diff --git a/.azure-pipelines/azure-pipelines-build-alpinevs.yml b/.azure-pipelines/azure-pipelines-build-alpinevs.yml new file mode 100644 index 00000000000..c2592c1f7a8 --- /dev/null +++ b/.azure-pipelines/azure-pipelines-build-alpinevs.yml @@ -0,0 +1,50 @@ +pr: none +trigger: none + + +name: $(TeamProject)_$(Build.DefinitionName)_$(SourceBranchName)_$(Date:yyyyMMdd)$(Rev:.r) + +resources: + repositories: + - repository: buildimage + type: github + name: sonic-net/sonic-buildimage + endpoint: sonic-net + ref: master + + +variables: +- template: .azure-pipelines/azure-pipelines-repd-build-variables.yml@buildimage +- template: .azure-pipelines/template-variables.yml@buildimage +- name: CACHE_MODE + value: rcache +- name: ENABLE_FIPS + value: y +- name: BUILD_BRANCH + ${{ if eq(variables['Build.Reason'], 'PullRequest') }}: + value: $(System.PullRequest.TargetBranch) + ${{ else }}: + value: $(Build.SourceBranchName) + + +parameters: + - name: SUBMODULE + type: string + default: ' ' + + - name: COMMIT_ID + type: string + default: ' ' + + +stages: + - stage: BuildAlpineVS + pool: sonicso1ES-amd64 + jobs: + - template: azure-pipelines-build.yml + parameters: + buildOptions: 'USERNAME=admin SONIC_BUILD_JOBS=$(nproc) ${{ variables.VERSION_CONTROL_OPTIONS }}' + jobGroups: + - name: alpinevs + SUBMODULE: ${{ parameters.SUBMODULE }} + COMMIT_ID: ${{ parameters.COMMIT_ID }} diff --git a/.azure-pipelines/azure-pipelines-build.yml b/.azure-pipelines/azure-pipelines-build.yml index 57ac72491ff..5e88584df22 100644 --- a/.azure-pipelines/azure-pipelines-build.yml +++ b/.azure-pipelines/azure-pipelines-build.yml @@ -58,6 +58,10 @@ jobs: dbg_image: yes asan_image: yes + - name: alpinevs + variables: + dbg_image: yes + - name: barefoot variables: docker_syncd_rpc_image: yes @@ -115,6 +119,12 @@ jobs: variables: PLATFORM_ARCH: arm64 + - name: aspeed-arm64 + pool: sonicso1ES-arm64 + variables: + PLATFORM_NAME: aspeed + PLATFORM_ARCH: arm64 + - name: vpp variables: dbg_image: yes @@ -127,6 +137,10 @@ jobs: if echo $(GROUP_NAME) | grep mellanox; then BUILD_OPTIONS="$BUILD_OPTIONS INCLUDE_DHCP_SERVER=y" fi + # ENABLE_SBOM=y emits CycloneDX SBOMs alongside each .bin / + # .img / .swi / .tar and standalone SBOMs for docker-ptf / + # docker-ptf-sai / docker-sonic-mgmt when those are built. + BUILD_OPTIONS="$BUILD_OPTIONS ENABLE_SBOM=y" if [ $(GROUP_NAME) == pensando ]; then make $BUILD_OPTIONS target/sonic-pensando.tar elif [ $(GROUP_NAME) == vs ]; then @@ -159,6 +173,8 @@ jobs: mv target/sonic-vpp.img.gz target/sonic-vpp-dbg.img.gz fi make $BUILD_OPTIONS target/sonic-vpp.img.gz + elif [ $(GROUP_NAME) == alpinevs ]; then + make $BUILD_OPTIONS target/sonic-alpinevs.img.gz else if [ $(dbg_image) == yes ]; then make $BUILD_OPTIONS INSTALL_DEBUG_TOOLS=y target/sonic-$(GROUP_NAME).bin diff --git a/.azure-pipelines/azure-pipelines-image-template.yml b/.azure-pipelines/azure-pipelines-image-template.yml index d018945625f..dc172b483bf 100644 --- a/.azure-pipelines/azure-pipelines-image-template.yml +++ b/.azure-pipelines/azure-pipelines-image-template.yml @@ -36,7 +36,7 @@ jobs: - script: | [ -n "$OVERRIDE_BUILD_OPTIONS" ] && OVERRIDE_BUILD_OPTIONS=$(OVERRIDE_BUILD_OPTIONS) BUILD_OPTIONS="$(BUILD_OPTIONS) $OVERRIDE_BUILD_OPTIONS" - if [ -n "$(CACHE_MODE)" ] && echo $(PLATFORM_AZP) | grep -E -q "^(vs|broadcom|mellanox|marvell-prestera-armhf|marvell-prestera-arm64|vpp|nvidia-bluefield)$"; then + if [ -n "$(CACHE_MODE)" ] && echo $(PLATFORM_AZP) | grep -E -q "^(vs|broadcom|mellanox|marvell-prestera-armhf|marvell-prestera-arm64|vpp|nvidia-bluefield|alpinevs)$"; then CACHE_OPTIONS="SONIC_DPKG_CACHE_METHOD=$(CACHE_MODE) SONIC_DPKG_CACHE_SOURCE=/nfs/dpkg_cache/$(PLATFORM_AZP)" BUILD_OPTIONS="$BUILD_OPTIONS $CACHE_OPTIONS" fi @@ -78,38 +78,56 @@ jobs: postSteps: - script: | BUILD_REASON=$(Build.Reason) + PTF_MODIFIED_IN_PR="False" echo "Build.Reason = $BUILD_REASON" echo "Build.DefinitionName = $BUILD_DEFINITIONNAME" if [[ "$BUILD_REASON" == "PullRequest" ]]; then - echo "Checking for changes to dockers/docker-ptf/Dockerfile.j2 in PR..." - # Get the target branch and check for changes - TARGET_BRANCH="origin/$(System.PullRequest.TargetBranch)" - echo "Comparing against target branch: $TARGET_BRANCH" - # Fetch target branch to ensure we have the latest - git fetch origin $(System.PullRequest.TargetBranch) - # Check if docker-ptf Dockerfile.j2 has changes + echo "Checking for changes to docker-ptf in PR..." + # Set PTF_MODIFIED to True if docker-ptf was not built from cache, otherwise set it to False # NOTE: The PTF_MODIFIED template parameter is of type string # Ensure to set it to "True" or "False" (not boolean true/false) - if git diff --name-only $TARGET_BRANCH...HEAD | grep -q "dockers/docker-ptf/Dockerfile.j2"; then - echo "docker-ptf/Dockerfile.j2 has been modified in this PR" - echo "##vso[task.setvariable variable=PTF_MODIFIED;isOutput=true]True" - else - echo "docker-ptf/Dockerfile.j2 has not been modified in this PR" + if [ ! -f "target/docker-ptf.gz.log" ]; then + echo "docker-ptf was not built in this PR, setting PTF_MODIFIED to False" echo "##vso[task.setvariable variable=PTF_MODIFIED;isOutput=true]False" + PTF_MODIFIED_IN_PR="False" + else + if grep -q "CACHE::LOADED" target/docker-ptf.gz.log; then + echo "docker-ptf was built from cache in this PR, setting PTF_MODIFIED to False" + echo "##vso[task.setvariable variable=PTF_MODIFIED;isOutput=true]False" + PTF_MODIFIED_IN_PR="False" + else + echo "docker-ptf was not built from cache in this PR, setting PTF_MODIFIED to True" + echo "##vso[task.setvariable variable=PTF_MODIFIED;isOutput=true]True" + PTF_MODIFIED_IN_PR="True" + fi fi else echo "Not a PR build, setting PTF_MODIFIED to false" echo "##vso[task.setvariable variable=PTF_MODIFIED;isOutput=true]False" + PTF_MODIFIED_IN_PR="False" fi + echo "PTF_MODIFIED_IN_PR = $PTF_MODIFIED_IN_PR" + # Prepare publish settings + PORT=443 + BRANCH=$(Build.SourceBranchName) + echo "Branch = $BRANCH" + PUSH_DOCKER="False" if [[ "$BUILD_REASON" != "PullRequest" && "$BUILD_DEFINITIONNAME" == "Azure.sonic-buildimage.official.vs" ]] then - PORT=443 - DOCKERS=$(ls target/docker-ptf.gz) - BRANCH=$(Build.SourceBranchName) - echo "Branch = $BRANCH" LABELS="$BRANCH" [[ "$BRANCH" == "master" ]] && LABELS="$LABELS latest" + DOCKERS=$(ls target/docker-ptf.gz) + PUSH_DOCKER="True" + elif [[ "$PTF_MODIFIED_IN_PR" == "True" ]] + then + LABELS="ptf-$SYSTEM_PULLREQUEST_PULLREQUESTNUMBER" + DOCKERS=$(ls target/docker-ptf.gz) + PUSH_DOCKER="True" + else + echo "Not publishing docker images since docker-ptf was not modified in this PR or build definition name is not Azure.sonic-buildimage.official.vs" + fi + if [[ "$PUSH_DOCKER" == "True" ]]; then for f in $DOCKERS; do echo $f echo "Labels = $LABELS" diff --git a/.azure-pipelines/baseline_test/baseline.test.buildimage.yml b/.azure-pipelines/baseline_test/baseline.test.buildimage.yml index 388e25010f1..3c245642281 100644 --- a/.azure-pipelines/baseline_test/baseline.test.buildimage.yml +++ b/.azure-pipelines/baseline_test/baseline.test.buildimage.yml @@ -45,6 +45,10 @@ parameters: type: boolean default: true + - name: INCLUDE_JOBS + type: string + default: "all" + variables: - template: ../azure-pipelines-repd-build-variables.yml - template: ../template-variables.yml @@ -69,6 +73,11 @@ stages: buildOptions: 'USERNAME=admin SONIC_BUILD_JOBS=$(nproc) BUILD_MULTIASIC_KVM=y INCLUDE_DHCP_SERVER=y ${{ variables.VERSION_CONTROL_OPTIONS }}' jobGroups: - name: vs + - template: ../azure-pipelines-build.yml + parameters: + buildOptions: 'USERNAME=admin SONIC_BUILD_JOBS=$(nproc) ${{ variables.VERSION_CONTROL_OPTIONS }}' + jobGroups: + - name: vpp - stage: Test_round_1 dependsOn: BuildVS @@ -76,12 +85,12 @@ stages: jobs: - template: .azure-pipelines/pr_test_template.yml@sonic-mgmt parameters: - GLOBAL_PARAMS: - BUILD_REASON: ${{ parameters.BUILD_REASON }} - RETRY_TIMES: ${{ parameters.RETRY_TIMES }} - STOP_ON_FAILURE: ${{ parameters.TEST_PLAN_STOP_ON_FAILURE }} - TEST_PLAN_NUM: ${{ parameters.TEST_PLAN_NUM }} + BUILD_REASON: ${{ parameters.BUILD_REASON }} + RETRY_TIMES: ${{ parameters.RETRY_TIMES }} + STOP_ON_FAILURE: ${{ parameters.TEST_PLAN_STOP_ON_FAILURE }} + TEST_PLAN_NUM: ${{ parameters.TEST_PLAN_NUM }} CHECKOUT_SONIC_MGMT: ${{ parameters.CHECKOUT_SONIC_MGMT }} + INCLUDE_JOBS: ${{ parameters.INCLUDE_JOBS }} - stage: Test_round_2 dependsOn: @@ -90,12 +99,12 @@ stages: jobs: - template: .azure-pipelines/pr_test_template.yml@sonic-mgmt parameters: - GLOBAL_PARAMS: - BUILD_REASON: ${{ parameters.BUILD_REASON }} - RETRY_TIMES: ${{ parameters.RETRY_TIMES }} - STOP_ON_FAILURE: ${{ parameters.TEST_PLAN_STOP_ON_FAILURE }} - TEST_PLAN_NUM: ${{ parameters.TEST_PLAN_NUM }} + BUILD_REASON: ${{ parameters.BUILD_REASON }} + RETRY_TIMES: ${{ parameters.RETRY_TIMES }} + STOP_ON_FAILURE: ${{ parameters.TEST_PLAN_STOP_ON_FAILURE }} + TEST_PLAN_NUM: ${{ parameters.TEST_PLAN_NUM }} CHECKOUT_SONIC_MGMT: ${{ parameters.CHECKOUT_SONIC_MGMT }} + INCLUDE_JOBS: ${{ parameters.INCLUDE_JOBS }} - stage: Test_round_3 dependsOn: @@ -104,12 +113,12 @@ stages: jobs: - template: .azure-pipelines/pr_test_template.yml@sonic-mgmt parameters: - GLOBAL_PARAMS: - BUILD_REASON: ${{ parameters.BUILD_REASON }} - RETRY_TIMES: ${{ parameters.RETRY_TIMES }} - STOP_ON_FAILURE: ${{ parameters.TEST_PLAN_STOP_ON_FAILURE }} - TEST_PLAN_NUM: ${{ parameters.TEST_PLAN_NUM }} + BUILD_REASON: ${{ parameters.BUILD_REASON }} + RETRY_TIMES: ${{ parameters.RETRY_TIMES }} + STOP_ON_FAILURE: ${{ parameters.TEST_PLAN_STOP_ON_FAILURE }} + TEST_PLAN_NUM: ${{ parameters.TEST_PLAN_NUM }} CHECKOUT_SONIC_MGMT: ${{ parameters.CHECKOUT_SONIC_MGMT }} + INCLUDE_JOBS: ${{ parameters.INCLUDE_JOBS }} - stage: Test_round_4 dependsOn: @@ -118,9 +127,9 @@ stages: jobs: - template: .azure-pipelines/pr_test_template.yml@sonic-mgmt parameters: - GLOBAL_PARAMS: - BUILD_REASON: ${{ parameters.BUILD_REASON }} - RETRY_TIMES: ${{ parameters.RETRY_TIMES }} - STOP_ON_FAILURE: ${{ parameters.TEST_PLAN_STOP_ON_FAILURE }} - TEST_PLAN_NUM: ${{ parameters.TEST_PLAN_NUM }} + BUILD_REASON: ${{ parameters.BUILD_REASON }} + RETRY_TIMES: ${{ parameters.RETRY_TIMES }} + STOP_ON_FAILURE: ${{ parameters.TEST_PLAN_STOP_ON_FAILURE }} + TEST_PLAN_NUM: ${{ parameters.TEST_PLAN_NUM }} CHECKOUT_SONIC_MGMT: ${{ parameters.CHECKOUT_SONIC_MGMT }} + INCLUDE_JOBS: ${{ parameters.INCLUDE_JOBS }} diff --git a/.azure-pipelines/build-template.yml b/.azure-pipelines/build-template.yml index c078423e713..580fd02ca7a 100644 --- a/.azure-pipelines/build-template.yml +++ b/.azure-pipelines/build-template.yml @@ -83,52 +83,120 @@ jobs: sudo apt-get install -y acl export DOCKER_DATA_ROOT_FOR_MULTIARCH=/data/march/docker CACHE_OPTIONS="SONIC_DPKG_CACHE_METHOD=${{ parameters.cache_mode }} SONIC_DPKG_CACHE_SOURCE=/nfs/dpkg_cache/${{ parameters.platform }}" - ENABLE_DOCKER_BASE_PULL=y make configure PLATFORM=${{ parameters.platform }} PLATFORM_ARCH=${{ parameters.platform_arch }} + # ENABLE_SBOM=y emits CycloneDX SBOMs alongside every .bin and + # standalone SBOMs for docker-ptf / docker-ptf-sai. + ENABLE_DOCKER_BASE_PULL=y ENABLE_SBOM=y make configure PLATFORM=${{ parameters.platform }} PLATFORM_ARCH=${{ parameters.platform_arch }} trap "sudo rm -rf fsroot" EXIT if [ ${{ parameters.platform }} == vs ]; then if [ ${{ parameters.dbg_image }} == true ]; then - make USERNAME=admin $CACHE_OPTIONS SONIC_BUILD_JOBS=$(nproc) INSTALL_DEBUG_TOOLS=y target/sonic-vs.img.gz && \ + make USERNAME=admin $CACHE_OPTIONS ENABLE_SBOM=y SONIC_BUILD_JOBS=$(nproc) INSTALL_DEBUG_TOOLS=y target/sonic-vs.img.gz && \ mv target/sonic-vs.img.gz target/sonic-vs-dbg.img.gz fi - make USERNAME=admin $CACHE_OPTIONS SONIC_BUILD_JOBS=$(nproc) target/docker-sonic-vs.gz target/sonic-vs.img.gz target/docker-ptf.gz - make USERNAME=admin $CACHE_OPTIONS SONIC_BUILD_JOBS=$(nproc) target/docker-ptf-sai.gz + make USERNAME=admin $CACHE_OPTIONS ENABLE_SBOM=y SONIC_BUILD_JOBS=$(nproc) target/docker-sonic-vs.gz target/sonic-vs.img.gz target/docker-ptf.gz + make USERNAME=admin $CACHE_OPTIONS ENABLE_SBOM=y SONIC_BUILD_JOBS=$(nproc) target/docker-ptf-sai.gz + elif [ ${{ parameters.platform }} == alpinevs ]; then + make USERNAME=admin SONIC_BUILD_JOB=2 $CACHE_OPTIONS ENABLE_SBOM=y target/sonic-alpinevs.img.gz else if [ ${{ parameters.dbg_image }} == true ]; then - make USERNAME=admin $CACHE_OPTIONS SONIC_BUILD_JOBS=$(nproc) INSTALL_DEBUG_TOOLS=y target/sonic-${{ parameters.platform }}.bin && \ + make USERNAME=admin $CACHE_OPTIONS ENABLE_SBOM=y SONIC_BUILD_JOBS=$(nproc) INSTALL_DEBUG_TOOLS=y target/sonic-${{ parameters.platform }}.bin && \ mv target/sonic-${{ parameters.platform }}.bin target/sonic-${{ parameters.platform }}-dbg.bin fi if [ ${{ parameters.swi_image }} == true ]; then - make USERNAME=admin $CACHE_OPTIONS SONIC_BUILD_JOBS=$(nproc) ENABLE_IMAGE_SIGNATURE=y target/sonic-aboot-${{ parameters.platform }}.swi + make USERNAME=admin $CACHE_OPTIONS ENABLE_SBOM=y SONIC_BUILD_JOBS=$(nproc) ENABLE_IMAGE_SIGNATURE=y target/sonic-aboot-${{ parameters.platform }}.swi fi if [ ${{ parameters.sync_rpc_image }} == true ]; then - make USERNAME=admin $CACHE_OPTIONS SONIC_BUILD_JOBS=$(nproc) ENABLE_SYNCD_RPC=y target/docker-syncd-${{ parameters.platform_short }}-rpc.gz + make USERNAME=admin $CACHE_OPTIONS ENABLE_SBOM=y SONIC_BUILD_JOBS=$(nproc) ENABLE_SYNCD_RPC=y target/docker-syncd-${{ parameters.platform_short }}-rpc.gz # workaround for issue in rules/sairedis.dep, git ls-files will list un-exist files for cache pushd ./src/sonic-sairedis/SAI git stash popd if [ ${{ parameters.platform }} == broadcom ]; then - make USERNAME=admin $CACHE_OPTIONS SONIC_BUILD_JOBS=$(nproc) ENABLE_SYNCD_RPC=y SAITHRIFT_V2=y target/docker-saiserverv2-brcm.gz + make USERNAME=admin $CACHE_OPTIONS ENABLE_SBOM=y SONIC_BUILD_JOBS=$(nproc) ENABLE_SYNCD_RPC=y SAITHRIFT_V2=y target/docker-saiserverv2-brcm.gz pushd ./src/sonic-sairedis/SAI git stash popd fi if [ ${{ parameters.platform }} == barefoot ]; then - make USERNAME=admin $CACHE_OPTIONS SONIC_BUILD_JOBS=$(nproc) SAITHRIFT_V2=y ENABLE_SYNCD_RPC=y target/docker-saiserverv2-bfn.gz + make USERNAME=admin $CACHE_OPTIONS ENABLE_SBOM=y SONIC_BUILD_JOBS=$(nproc) SAITHRIFT_V2=y ENABLE_SYNCD_RPC=y target/docker-saiserverv2-bfn.gz pushd ./src/sonic-sairedis/SAI git stash popd fi fi - make USERNAME=admin $CACHE_OPTIONS SONIC_BUILD_JOBS=$(nproc) target/sonic-${{ parameters.platform }}.bin + make USERNAME=admin $CACHE_OPTIONS ENABLE_SBOM=y SONIC_BUILD_JOBS=$(nproc) target/sonic-${{ parameters.platform }}.bin fi displayName: 'Build sonic image' + - script: | + set +e + # Run an SBOM-based vulnerability scan against each SBOM the + # build produced in this pipeline: the platform .bin/.img/.swi + # plus the docker-ptf / docker-ptf-sai test containers when + # the VS group built them. docker-sonic-mgmt is scanned in + # its own pipeline (docker-sonic-mgmt.yml) and is not built + # here. VEX statements under vex/ suppress CVEs that SONiC + # patches fix. Mirrors the legacy trivy policy: MEDIUM+ + # severity, fixed-only, fail on remaining unsuppressed + # findings. + OVERALL_RC=0 + mkdir -p $(Build.ArtifactStagingDirectory)/sbom-vuln + shopt -s nullglob + # Aggregate SBOMs the build emitted. SONiC produces several + # installer formats — .bin (ONIE), .swi (Arista aboot), + # .img.gz (VS/VPP) — plus standalone test-container SBOMs + # (note the .sbom. infix on the latter, which distinguishes + # them from per-container recipe fragments at + # target/docker-*.gz.cdx.json). + for sbom in \ + target/sonic-*.bin.cdx.json \ + target/sonic-*.swi.cdx.json \ + target/sonic-*.img.gz.cdx.json \ + target/docker-*.gz.sbom.cdx.json + do + # Derive a short name for this scan's outputs. Test-container + # SBOMs include a `.sbom` infix on disk (e.g. docker-ptf.gz.sbom.cdx.json) + # to distinguish them from per-container recipe fragments + # (docker-ptf.gz.cdx.json); strip it so the per-artifact + # output names match the underlying artifact extension: + # sonic-broadcom.bin.cdx.json -> sonic-broadcom.bin{.txt,.cdx.json} + # docker-ptf.gz.sbom.cdx.json -> docker-ptf.gz{.txt,.cdx.json} + name=$(basename "$sbom" .cdx.json) + name="${name%.sbom}" + # Azure Pipelines log-folding directive — wrap each SBOM's + # output so the log view shows a collapsible section per + # scan rather than one giant concatenated stream. + echo "##[group]SBOM vuln scan: $name" + python3 scripts/sbom_vuln_scan.py \ + --vex vex \ + --min-severity medium \ + --fail-on medium \ + --format both \ + --output "$(Build.ArtifactStagingDirectory)/sbom-vuln/${name}.cdx.json" \ + "$sbom" | tee "$(Build.ArtifactStagingDirectory)/sbom-vuln/${name}.txt" + RC=${PIPESTATUS[0]} + if [ "$RC" != "0" ]; then OVERALL_RC=$RC; fi + echo "##[endgroup]" + done + exit $OVERALL_RC + # Disabled for now; change to `succeededOrFailed()` to re-enable + # the SBOM-based vulnerability scan step. SBOM emission itself is + # unaffected — the .cdx.json sidecars are still produced by the + # `Build sonic image` step above. Only the post-build scan is + # gated. + condition: false + continueOnError: true + displayName: 'SBOM vulnerability scan' - template: cleanup.yml - publish: $(System.DefaultWorkingDirectory)/ artifact: sonic-buildimage.${{ parameters.platform }} displayName: "Archive sonic image" + - publish: $(Build.ArtifactStagingDirectory)/sbom-vuln + artifact: sbom-vuln-scan-results.${{ parameters.platform }} + displayName: "Archive SBOM vuln-scan results" + condition: always() + continueOnError: true - script: | set -x find target -name "*.log" | xargs -I{} cp {} $(Build.ArtifactStagingDirectory)/ diff --git a/.azure-pipelines/docker-ptf.yml b/.azure-pipelines/docker-ptf.yml new file mode 100644 index 00000000000..b2bc191e33c --- /dev/null +++ b/.azure-pipelines/docker-ptf.yml @@ -0,0 +1,201 @@ +# Starter pipeline +# Start with a minimal pipeline that you can customize to build and deploy your code. +# Add steps that build, run tests, deploy, and more: +# https://aka.ms/yaml +# Build and push docker-ptf image + +trigger: none +pr: + branches: + include: + - master + - 202??? + paths: + include: + - dockers/docker-ptf + +resources: + repositories: + - repository: sonic-mgmt + type: github + name: sonic-net/sonic-mgmt + ref: master + endpoint: sonic-net + +parameters: +- name: registry_url + type: string + default: sonicdev-microsoft.azurecr.io +- name: registry_conn + type: string + default: sonicdev + +stages: +- stage: Prepare + jobs: + - job: Prepare + steps: + - script: | + DEFAULT_MIRROR_URL_PREFIX=http://packages.trafficmanager.net + DEBIAN_TIMESTAMP=$(curl $DEFAULT_MIRROR_URL_PREFIX/debian-snapshot/debian/latest) + DEBIAN_SECURITY_TIMESTAMP=$(curl $DEFAULT_MIRROR_URL_PREFIX/debian-snapshot/debian-security/latest) + echo "DEBIAN_TIMESTAMP=$DEBIAN_TIMESTAMP, DEBIAN_SECURITY_TIMESTAMP=$DEBIAN_SECURITY_TIMESTAMP" + echo "##vso[task.setvariable variable=DEBIAN_TIMESTAMP;isOutput=true]$DEBIAN_TIMESTAMP" + echo "##vso[task.setvariable variable=DEBIAN_SECURITY_TIMESTAMP;isOutput=true]$DEBIAN_SECURITY_TIMESTAMP" + name: SetVersions + displayName: 'Set snapshot versions' + +- stage: Build + dependsOn: Prepare + variables: + - name: DEBIAN_TIMESTAMP + value: $[ stageDependencies.Prepare.Prepare.outputs['SetVersions.DEBIAN_TIMESTAMP'] ] + - name: DEBIAN_SECURITY_TIMESTAMP + value: $[ stageDependencies.Prepare.Prepare.outputs['SetVersions.DEBIAN_SECURITY_TIMESTAMP'] ] + - name: MIRROR_SNAPSHOT + value: 'y' + jobs: + - job: Build + pool: sonicso1ES-amd64 + timeoutInMinutes: 360 + steps: + - template: cleanup.yml + - checkout: self + clean: true + - script: | + set -x + sudo setfacl -R -b $(Agent.BuildDirectory) + displayName: 'setfacl' + + - script: | + echo "DEBIAN_TIMESTAMP=$DEBIAN_TIMESTAMP, DEBIAN_SECURITY_TIMESTAMP=$DEBIAN_SECURITY_TIMESTAMP" + if [ "$MIRROR_SNAPSHOT" == y ]; then + mkdir -p target/versions/default/ + echo "debian==$DEBIAN_TIMESTAMP" > target/versions/default/versions-mirror + echo "debian-security==$DEBIAN_SECURITY_TIMESTAMP" >> target/versions/default/versions-mirror + cat target/versions/default/versions-mirror + fi + displayName: 'Set snapshot versions' + + - bash: | + set -xe + git submodule update --init --recursive -- src/ptf src/ptf-py3 src/sonic-sairedis src/sonic-frr/frr src/sonic-swss-common + BUILD_OPTIONS="SONIC_BUILD_JOBS=$(nproc) DEFAULT_CONTAINER_REGISTRY=publicmirror.azurecr.io ENABLE_DOCKER_BASE_PULL=y MIRROR_SNAPSHOT=$MIRROR_SNAPSHOT + SONIC_BUILD_RETRY_COUNT=3 SONIC_BUILD_RETRY_INTERVAL=600 DOCKER_BUILDKIT=0 SONIC_VERSION_CONTROL_COMPONENTS=" + + make NOBUSTER=1 NOBULLSEYE=1 $BUILD_OPTIONS configure PLATFORM=vs NOTRIXIE=1 # docker-ptf is built for bookworm, disable trixie currently to save build time. will enable it after migrating to trixie. + make -f Makefile.work BLDENV=bookworm $BUILD_OPTIONS target/docker-ptf.gz + cp -r target $(Build.ArtifactStagingDirectory)/target + displayName: Build docker-ptf.gz + + - publish: $(Build.ArtifactStagingDirectory) + artifact: 'sonic-buildimage.vs' + displayName: "Archive docker image ptf" + + - bash: | + set -ex + docker load -i $(Build.ArtifactStagingDirectory)/target/docker-ptf.gz + docker tag docker-ptf:latest $REGISTRY_SERVER/docker-ptf:lastbuild + docker images + env: + REGISTRY_SERVER: ${{ parameters.registry_url }} + displayName: 'Load and tag docker-ptf as lastbuild' + + - task: Docker@2 + displayName: 'Push docker-ptf:lastbuild to registry' + condition: succeeded() + inputs: + containerRegistry: ${{ parameters.registry_conn }} + repository: docker-ptf + command: push + tags: lastbuild + +- stage: Test + dependsOn: Build + condition: and(succeeded(), in(dependencies.Build.result, 'Succeeded')) + variables: + - group: SONiC-Elastictest + - name: BUILD_BRANCH + value: $(Build.SourceBranchName) + jobs: + - job: trivy_scan + displayName: "[OPTIONAL] Trivy vulnerability scan (docker-ptf)" + pool: sonic-ubuntu-1c + continueOnError: true + timeoutInMinutes: 60 + steps: + - checkout: self + clean: true + fetchDepth: 1 + - download: current + artifact: 'sonic-buildimage.vs' + displayName: "Download docker-ptf artifact" + - script: | + set -ex + TRIVY_VERSION="0.70.0" + curl -fLO https://github.com/aquasecurity/trivy/releases/download/v${TRIVY_VERSION}/trivy_${TRIVY_VERSION}_Linux-64bit.deb + sudo apt install -y ./trivy_${TRIVY_VERSION}_Linux-64bit.deb + trivy --version + displayName: "Install Trivy" + - script: | + set -x + trivy image \ + --input $(Pipeline.Workspace)/sonic-buildimage.vs/target/docker-ptf.gz \ + --scanners vuln \ + --severity MEDIUM,HIGH,CRITICAL \ + --ignore-unfixed \ + --exit-code 1 \ + --format table \ + --no-progress \ + --timeout 30m \ + --output $(Build.ArtifactStagingDirectory)/trivy-docker-ptf.txt + TRIVY_EXIT=$? + echo "" + echo "=== Trivy Scan Results (docker-ptf) ===" + cat $(Build.ArtifactStagingDirectory)/trivy-docker-ptf.txt + exit $TRIVY_EXIT + displayName: "Trivy scan docker-ptf" + - publish: $(Build.ArtifactStagingDirectory)/trivy-docker-ptf.txt + artifact: trivy-scan-results + displayName: "Publish Trivy scan results" + condition: always() + continueOnError: true + + - template: .azure-pipelines/pr_test_template.yml@sonic-mgmt + parameters: + CHECKOUT_SONIC_MGMT: true + PTF_MODIFIED: 'True' + PTF_IMAGE_TAG: "lastbuild" + INCLUDE_JOBS: "t0_job,t1_job,t2_job,t0_2vlans_job,t0_sonic_job,dpu_job,t1_multi_asic_job" + OVERRIDE_PARAMS: + REPO_NAME: "sonic-mgmt" + +- stage: Publish + dependsOn: Test + condition: and(not(canceled()), ne(variables['Build.Reason'], 'PullRequest'), in(dependencies.Test.result, 'Succeeded', 'SucceededWithIssues')) + jobs: + - job: PublishAsLatest + pool: sonicso1ES-amd64 + timeoutInMinutes: 60 + steps: + - download: current + artifact: 'sonic-buildimage.vs' + displayName: "Download docker-ptf image" + + - bash: | + set -ex + docker load -i $(Pipeline.Workspace)/sonic-buildimage.vs/target/docker-ptf.gz + docker tag docker-ptf:latest $REGISTRY_SERVER/docker-ptf:latest + docker images + env: + REGISTRY_SERVER: ${{ parameters.registry_url }} + displayName: 'Load and tag docker-ptf as latest' + + - task: Docker@2 + displayName: 'Push docker-ptf:latest to registry' + condition: succeeded() + inputs: + containerRegistry: ${{ parameters.registry_conn }} + repository: docker-ptf + command: push + tags: latest diff --git a/.azure-pipelines/docker-sonic-mgmt.yml b/.azure-pipelines/docker-sonic-mgmt.yml index 9a0c5efa810..ce37f054fe3 100644 --- a/.azure-pipelines/docker-sonic-mgmt.yml +++ b/.azure-pipelines/docker-sonic-mgmt.yml @@ -55,8 +55,8 @@ stages: set -xe git submodule update --init --recursive -- src/sonic-platform-daemons src/sonic-genl-packet src/sonic-sairedis src/ptf src/sonic-device-data src/sonic-dash-api - make NOBUSTER=1 NOBULLSEYE=1 SONIC_BUILD_JOBS=$(nproc) DEFAULT_CONTAINER_REGISTRY=publicmirror.azurecr.io ENABLE_DOCKER_BASE_PULL=y configure PLATFORM=generic DOCKER_BUILDKIT=0 - make -f Makefile.work BLDENV=bookworm SONIC_BUILD_JOBS=$(nproc) DEFAULT_CONTAINER_REGISTRY=publicmirror.azurecr.io ENABLE_DOCKER_BASE_PULL=y target/docker-sonic-mgmt.gz + make NOBUSTER=1 NOBULLSEYE=1 SONIC_BUILD_JOBS=$(nproc) DEFAULT_CONTAINER_REGISTRY=publicmirror.azurecr.io ENABLE_DOCKER_BASE_PULL=y ENABLE_SBOM=y configure PLATFORM=generic DOCKER_BUILDKIT=0 + make -f Makefile.work BLDENV=bookworm SONIC_BUILD_JOBS=$(nproc) DEFAULT_CONTAINER_REGISTRY=publicmirror.azurecr.io ENABLE_DOCKER_BASE_PULL=y ENABLE_SBOM=y target/docker-sonic-mgmt.gz cp -r target $(Build.ArtifactStagingDirectory)/target env: REGISTRY_SERVER: ${{ parameters.registry_url }} @@ -92,16 +92,78 @@ stages: - name: BUILD_BRANCH value: $(Build.SourceBranchName) jobs: - - template: .azure-pipelines/pr_test_template.yml@sonic-mgmt - parameters: - CHECKOUT_SONIC_MGMT: true - OVERRIDE_PARAMS: - REPO_NAME: "sonic-mgmt" - SETUP_CONTAINER_PARAMS: "-i ${{ parameters.registry_url }}/docker-sonic-mgmt:lastbuild" + - job: sbom_vuln_scan + displayName: "[OPTIONAL] SBOM-based vulnerability scan (docker-sonic-mgmt)" + # Disabled for now; remove this `condition: false` (or change to + # `and(succeeded(), in(dependencies.Build.result, 'Succeeded'))`) + # to re-enable the docker-sonic-mgmt SBOM vulnerability scan. + # The SBOM itself is still produced by the Build stage above + # when ENABLE_SBOM=y; only the post-build scan is gated. + condition: false + pool: sonic-ubuntu-1c + continueOnError: true + timeoutInMinutes: 30 + steps: + - checkout: self + clean: true + fetchDepth: 1 + - download: current + artifact: docker-sonic-mgmt + displayName: "Download docker-sonic-mgmt artifact (includes SBOM)" + - script: | + set -ex + sudo apt-get install -y python3-pip jq + displayName: "Install dependencies" + - script: | + set -x + SBOM=$(Pipeline.Workspace)/docker-sonic-mgmt/target/docker-sonic-mgmt.gz.sbom.cdx.json + if [ ! -f "$SBOM" ]; then + echo "::error::SBOM not found at $SBOM — was the build invoked with ENABLE_SBOM=y?" + ls -la $(Pipeline.Workspace)/docker-sonic-mgmt/target/ | head -30 + exit 1 + fi + echo "SBOM: $SBOM" + echo "Component count: $(jq '.components | length' "$SBOM")" + displayName: "Verify SBOM artifact is present" + - script: | + set -x + # Mirror the prior trivy policy: report MEDIUM/HIGH/CRITICAL, + # filter to fixed CVEs only, fail the job on any unsuppressed + # finding. VEX statements under vex/ are applied first. + REPORT=$(Build.ArtifactStagingDirectory)/sbom-vuln-sonic-mgmt + python3 scripts/sbom_vuln_scan.py \ + --vex vex \ + --min-severity medium \ + --fail-on medium \ + --format both \ + --output "${REPORT}.cdx.json" \ + $(Pipeline.Workspace)/docker-sonic-mgmt/target/docker-sonic-mgmt.gz.sbom.cdx.json \ + | tee "${REPORT}.txt" + EXIT=${PIPESTATUS[0]} + echo "" + echo "=== SBOM vulnerability scan results (docker-sonic-mgmt) ===" + echo "Full CycloneDX VEX report: ${REPORT}.cdx.json" + echo "Human-readable table: ${REPORT}.txt" + exit $EXIT + displayName: "SBOM vulnerability scan (docker-sonic-mgmt)" + - publish: $(Build.ArtifactStagingDirectory) + artifact: sbom-vuln-scan-results + displayName: "Publish SBOM vuln-scan results" + condition: always() + continueOnError: true + + - template: .azure-pipelines/pr_test_template.yml@sonic-mgmt + parameters: + CHECKOUT_SONIC_MGMT: true + # todo: enable vpp build in sonic-mgmt docker image build pipeline, and add vpp test pipeline back. + INCLUDE_JOBS: "all" + OVERRIDE_PARAMS: + REPO_NAME: "sonic-mgmt" + SETUP_CONTAINER_PARAMS: "-i ${{ parameters.registry_url }}/docker-sonic-mgmt:lastbuild" - stage: Publish dependsOn: Test - condition: and(succeeded(), in(dependencies.Test.result, 'Succeeded')) + condition: and(not(canceled()), in(dependencies.Test.result, 'Succeeded', 'SucceededWithIssues')) jobs: - job: PublishAsLatest pool: sonicso1ES-amd64 diff --git a/.azure-pipelines/template-daemon.yml b/.azure-pipelines/template-daemon.yml index f1e369e188d..e256ccdb4fb 100644 --- a/.azure-pipelines/template-daemon.yml +++ b/.azure-pipelines/template-daemon.yml @@ -6,7 +6,8 @@ steps: sleep 120 now=$(date +%s) pids=$(ps -C docker-buildx -o pid,etime,args | grep "docker-buildx buildx build" | awk '{print $1}') - for pid in $pids + pidsold=$(ps -C docker -o pid,etime,args | grep "docker build" | cut -d" " -f2) + for pid in $pids $pidsold do start_ticks=$(awk '{print $22}' /proc/$pid/stat) boot_time=$(awk '/btime/ {print $2}' /proc/stat) diff --git a/.github/CODEOWNERS b/.github/CODEOWNERS index 97cc5ec31fa..0142dba85df 100644 --- a/.github/CODEOWNERS +++ b/.github/CODEOWNERS @@ -64,7 +64,6 @@ # yang /src/sonic-yang-models/ @praveen-li @dgsudharsan @rathnasabapathyv @venkatmahalingam @qiluo-msft /src/sonic-yang-mgmt/ @sonic-net/sonic-management -/src/libyang/ @sonic-net/sonic-management /src/libyang3/ @sonic-net/sonic-management /src/libyang3-py3/ @sonic-net/sonic-management diff --git a/.github/copilot-instructions.md b/.github/copilot-instructions.md index 72eb46397fa..d8e634fe6a0 100644 --- a/.github/copilot-instructions.md +++ b/.github/copilot-instructions.md @@ -79,6 +79,15 @@ make target/debs/bookworm/swss_1.0.0_amd64.deb - **Single logical change per PR**: Isolate each commit to one component/bugfix/feature - **Submodule updates**: When updating a submodule, reference the PR in the submodule repo - **PR description**: Include what changed, why, and how to test +- **PR description template**: Fill out all sections of the [PR template](pull_request_template.md) when submitting a pull request: + - **Why I did it**: Explain motivation and context for the change + - **Work item tracking**: Microsoft ADO number if applicable + - **How I did it**: Describe the implementation approach + - **How to verify it**: Provide steps or commands to test the change + - **Which release branch to backport**: Check applicable release branches if this is a fix + - **Tested branch**: Provide the tested image version + - **Description for the changelog**: One-line summary for the changelog + - **Link to config_db schema for YANG module changes**: If modifying YANG models, link to the relevant section ## Common Patterns diff --git a/.github/pull_request_template.md b/.github/pull_request_template.md index ee88b1075c1..17fa3fc38f8 100644 --- a/.github/pull_request_template.md +++ b/.github/pull_request_template.md @@ -38,6 +38,7 @@ If PR needs to be backported, then the PR must be tested against the base branch - [ ] 202411 - [ ] 202505 - [ ] 202511 +- [ ] 202605 #### Tested branch (Please provide the tested image version) diff --git a/.gitignore b/.gitignore index 2949a5aa34d..f099552bac2 100644 --- a/.gitignore +++ b/.gitignore @@ -12,6 +12,11 @@ fsroot/ fsroot-*/ fs.* target/ + +# Auto-extracted OpenVEX statements (regenerated from src/*/patches/ +# during the build by scripts/sbom_extract_vex_from_patches.py). +# Manually-authored VEX statements live in vex/manual/ and ARE tracked. +vex/auto/ *.deb *.udeb *.changes @@ -66,6 +71,9 @@ src/**/debian/build/ src/**/debian/files src/**/debian/stamp-autotools-files +# checksum file to detect sonic-frr patch-set changes +src/sonic-frr/.sonic-frr-patch-*.sha1 + # .o files src/**/*.o diff --git a/.gitmodules b/.gitmodules index 7d99999ee9a..b1767c6cfda 100644 --- a/.gitmodules +++ b/.gitmodules @@ -45,8 +45,7 @@ url = https://github.com/sonic-net/sonic-platform-pdk-pde [submodule "src/sonic-frr/frr"] path = src/sonic-frr/frr - url = https://github.com/sonic-net/sonic-frr.git - branch = frr-10.4.1 + url = https://github.com/FRRouting/frr.git [submodule "platform/p4/p4-hlir/p4-hlir-v1.1"] path = platform/p4/p4-hlir/p4-hlir-v1.1 url = https://github.com/p4lang/p4-hlir.git @@ -148,3 +147,14 @@ [submodule "platform/alpinevs"] path = platform/alpinevs url = https://github.com/sonic-net/sonic-alpine/ +[submodule "src/sonic-redfish"] + path = src/sonic-redfish + url = https://github.com/sonic-net/sonic-redfish +[submodule "platform/aspeed/sonic-platform-modules-arista"] + path = platform/aspeed/sonic-platform-modules-arista + url = https://github.com/aristanetworks/sonic + +[submodule "platform/broadcom/saibcm-modules"] + path = platform/broadcom/saibcm-modules + url = https://github.com/sonic-net/saibcm-modules.git + branch = sdk-6.5.35-xgs diff --git a/Makefile b/Makefile index 2b22e71cd64..1bfff79bdfe 100644 --- a/Makefile +++ b/Makefile @@ -88,7 +88,7 @@ endif bullseye: @echo "+++ Making $@ +++" -ifeq ($(NOBUSTER), 0) +ifeq ($(NOBULLSEYE), 0) $(MAKE) -f Makefile.work bullseye endif @@ -118,13 +118,13 @@ endef .PHONY: $(PLATFORM_PATH) $(PLATFORM_PATH): - @echo "+++ Cheking $@ +++" + @echo "+++ Checking $@ +++" $(PLATFORM_CHECKOUT_CMD) configure : $(PLATFORM_PATH) $(call make_work, $@) -clean showtag docker-cleanup sonic-slave-build sonic-slave-bash : +clean showtag docker-cleanup clean-docker sonic-slave-build sonic-slave-bash : $(call make_work, $@) # Freeze the versions, see more detail options: scripts/versions_manager.py freeze -h diff --git a/Makefile.cache b/Makefile.cache index d32a259c76c..858ac86fa57 100644 --- a/Makefile.cache +++ b/Makefile.cache @@ -30,7 +30,7 @@ # There are two types of source code packages used by the SONiC repo. # # 1. Module source code is maintained as part of main repo -# Eg: sonic-utilities, Plaform files etc +# Eg: sonic-utilities, Platform files etc # # Some module source code is maintained outside the sonic repo, but # the build framework is part of sonic main repo. @@ -66,9 +66,51 @@ # Common files and FLAGS # Run the 'touch cache.skip.common' command in the base directory to exclude the common files from caching -SONIC_COMMON_FILES_LIST := $(if $(wildcard cache.skip.common),, .platform slave.mk rules/functions Makefile.cache) +# +# Cache scope design: +# SONIC_COMMON_FILES_LIST tracks files whose changes affect ALL package outputs. +# slave.mk is intentionally excluded because: +# - It is 1800+ lines and changed ~20 times per 6 months +# - Most changes (new targets, platform additions, cosmetic) do NOT affect +# existing package outputs +# - Including it causes 100% cache invalidation on every slave.mk commit +# - Per-package .dep files already track package-specific dependencies +# Instead, SONIC_CACHE_RECIPE_VER acts as a manual version stamp. +# Bump it when a slave.mk change genuinely affects package build output +# (e.g., dpkg build recipe changes, compiler flag changes, install logic changes). +# +SONIC_CACHE_RECIPE_VER := 1 +# Git object hash of slave.mk when SONIC_CACHE_RECIPE_VER was last set/bumped. +# Used by the guard below to detect unreviewed slave.mk changes. +SONIC_CACHE_RECIPE_VER_BASELINE := 348388b6882c0c90f4a1c7170d0e33cf9c0e645b + +# Guard: warn if slave.mk changed since SONIC_CACHE_RECIPE_VER was last reviewed. +# This catches the case where someone modifies slave.mk build recipes without +# bumping the cache version, which could serve stale cached packages. +# To resolve: review whether the slave.mk change affects package output. +# - If yes: bump SONIC_CACHE_RECIPE_VER and update the baseline hash. +# - If no: just update the baseline hash. +SONIC_CACHE_SLAVE_HASH := $(if $(wildcard .git),$(shell git hash-object slave.mk 2>/dev/null)) +ifneq ($(SONIC_CACHE_SLAVE_HASH),) +ifneq ($(SONIC_CACHE_SLAVE_HASH),$(SONIC_CACHE_RECIPE_VER_BASELINE)) +ifneq ($(SONIC_DPKG_CACHE_METHOD),none) +ifneq ($(SONIC_DPKG_CACHE_METHOD),) +$(warning [CACHE] slave.mk has changed since SONIC_CACHE_RECIPE_VER was last set.) +$(warning [CACHE] Review whether the change affects package build output:) +$(warning [CACHE] If YES: bump SONIC_CACHE_RECIPE_VER in Makefile.cache and update SONIC_CACHE_RECIPE_VER_BASELINE to: $(SONIC_CACHE_SLAVE_HASH)) +$(warning [CACHE] If NO: just update SONIC_CACHE_RECIPE_VER_BASELINE to: $(SONIC_CACHE_SLAVE_HASH)) +endif +endif +endif +endif + +# SONIC_COMMON_FILES_LIST enumerates files that invalidate the cache when changed. +# It includes common files like .platform, rules/functions, Makefile.cache etc. +# NOTE: slave.mk is intentionally NOT included here; see SONIC_CACHE_RECIPE_VER above. +SONIC_COMMON_FILES_LIST := $(if $(wildcard cache.skip.common),, .platform rules/functions Makefile.cache) SONIC_DEVICE_FILES_LIST := $(shell git ls-files -s device | grep -v ^120000 | grep -Eo device.*) -SONIC_COMMON_FLAGS_LIST := $(CONFIGURED_PLATFORM) \ +SONIC_COMMON_FLAGS_LIST := $(SONIC_CACHE_RECIPE_VER) \ + $(CONFIGURED_PLATFORM) \ $(CONFIGURED_ARCH) \ $(BLDENV) \ $(MIRROR_URLS) $(MIRROR_SECURITY_URLS) \ @@ -186,7 +228,7 @@ define GET_MOD_DEP_SHA $(eval $(1)_DEP_MOD_SHA_FILES := $(foreach dfile,$($(1)_MOD_DEP_PKGS), \ $($(dfile)_DEP_FLAGS_FILE) $($(dfile)_MOD_HASH_FILE) $($(dfile)_SMOD_HASH_FILE)) ) $(eval $(1)_DEP_FILES_MISSING := $(filter-out $(wildcard $($(1)_DEP_MOD_SHA_FILES)),$($(1)_DEP_MOD_SHA_FILES)) ) - $(if $($(1)_DEP_FILES_MISSING), $(warning "[ DPKG ] Dependecy file(s) are not found for $(1) : $($(1)_DEP_FILES_MISSING))) + $(if $($(1)_DEP_FILES_MISSING), $(warning "[ DPKG ] Dependency file(s) are not found for $(1) : $($(1)_DEP_FILES_MISSING))) # Include package dependencies hash values into package hash calculation $(eval $(1)_DEP_PKGS_SHA := $(foreach dfile,$($(1)_MOD_DEP_PKGS),$($(dfile)_DEP_MOD_SHA) $($(dfile)_MOD_HASH))) @@ -196,7 +238,7 @@ define GET_MOD_DEP_SHA endef -# Retrive the list of files that are modified for the target. The files can be from +# Retrieve the list of files that are modified for the target. The files can be from # 1. Any of dependent target is modified # 2. Files from the target dependency list # 3. Files from submodule dependency list if the target is a submodule @@ -238,10 +280,10 @@ define LOAD_FROM_CACHE $(eval $(1)_MOD_CACHE_FILE := $(1)-$($(1)_DEP_MOD_SHA)-$($(1)_MOD_HASH).tgz) $(if $(MDEBUG), $(info $(1)_MODE_CACHE_FILE := $($(1)_MOD_CACHE_FILE))) - # Retrive and log files list that are modified for the target. + # Retrieve and log files list that are modified for the target. $(call GET_MODIFIED_FILES,$(1)) $(if $($(1)_FILES_MODIFIED), - echo "Target $(1) dependencies are modifed - global cache skipped" >> $($(1)_DST_PATH)/$(1).log + echo "Target $(1) dependencies are modified - global cache skipped" >> $($(1)_DST_PATH)/$(1).log echo "Modified dependencies are : [$($(1)_FILES_MODIFIED)] " >> $($(1)_DST_PATH)/$(1).log $(eval $(1)_CACHE_DIR := $(SONIC_DPKG_LOCAL_CACHE_DIR))) @@ -287,13 +329,13 @@ define SAVE_INTO_CACHE $(eval $(1)_MOD_CACHE_FILE := $(1)-$($(1)_DEP_MOD_SHA)-$($(1)_MOD_HASH).tgz) $(if $(MDEBUG), $(info $(1)_MOD_CACHE_FILE := $($(1)_MOD_CACHE_FILE))) - # Retrive and log files list that are modified for the target. + # Retrieve and log files list that are modified for the target. $(call GET_MODIFIED_FILES,$(1)) $(eval MOD_CACHE_FILE=$($(1)_MOD_CACHE_FILE)) $(call MOD_LOCK,$(1),$(SONIC_DPKG_CACHE_DIR),$(MOD_CACHE_LOCK_SUFFIX),$(MOD_CACHE_LOCK_TIMEOUT)) $(if $($(1)_FILES_MODIFIED), - echo "Target $(1) dependencies are modifed - global save cache skipped" >> $($(1)_DST_PATH)/$(1).log + echo "Target $(1) dependencies are modified - global save cache skipped" >> $($(1)_DST_PATH)/$(1).log $(eval $(1)_CACHE_DIR := $(SONIC_DPKG_LOCAL_CACHE_DIR)) ) cp $($(1)_DST_PATH)/$(1).log $($(1)_DST_PATH)/$(1).cached.log @@ -442,7 +484,7 @@ $(foreach pkg, $(SONIC_MAKE_DEBS) $(SONIC_DPKG_DEBS) $(SONIC_ONLINE_DEBS) $(SONI # DPGK framework creates three dependency files for each target. # 1. Flags file (.flags) # 2. Dependency file (.dep), -# 3. Dependecy SHA hash file (.sha) +# 3. Dependency SHA hash file (.sha) # 4. If the target is a submodule, corresponding dependency file and hash file are created # sub module dependency file (.smdep) # sub module hash file (.smsha) @@ -461,9 +503,9 @@ $(foreach pkg, $(SONIC_MAKE_DEBS) $(SONIC_DPKG_DEBS) $(SONIC_ONLINE_DEBS) $(SONI # SONIC_SANITIZER_ON=y # etc # If any of the ENV flag variables are modified, the target needs to be rebuilt as -# the content of flag file is changed becase of value of ENV variable is changed. +# the content of flag file is changed because of value of ENV variable is changed. # -# [2] .dep => contains the dependency files list for a target. Eeach traget can have one or more dependency files. +# [2] .dep => contains the dependency files list for a target. Each target can have one or more dependency files. # If any of the ENV flag variables are modified, the target needs to be rebuilt. # For example: Dependency files list for 'bash' module # rules/bash.mk @@ -486,9 +528,9 @@ $(foreach pkg, $(SONIC_MAKE_DEBS) $(SONIC_DPKG_DEBS) $(SONIC_ONLINE_DEBS) $(SONI -# ruiles for <.flags> file creation +# rules for <.flags> file creation # -# Each target defines a variable called '_DEP_FLAGS' that contais a list of environment flags for that target and +# Each target defines a variable called '_DEP_FLAGS' that contains a list of environment flags for that target and # that indicates that target needs to be rebuilt if any of the dependent flags are changed. # An environmental dependency flags file is created with the name as ‘.flags’ for each target. # This file contains the values of target environment flags and gets updated only when there is a change in the flag's value. @@ -606,7 +648,8 @@ $(addsuffix .$(3),$(addprefix $(2)/, $(1))) : $(2)/%.$(3) : \ @$$(eval $$*_DEP_FILES_MODIFIED := $$? ) @$$(file >$$@.tmp,$$($$*_DEP_FILES)) @cat $$@.tmp |xargs git hash-object >$$@.sha.tmp - @if ! cmp -s $$@.sha.tmp $$@.sha; then cp $$@.tmp $$@; cp $$@.sha.tmp $$@.sha; fi + @if ! cmp -s $$@.sha.tmp $$@.sha; then cp $$@.tmp $$@; cp $$@.sha.tmp $$@.sha; \ + elif [ -n "$$(filter %.flags,$$?)" ]; then touch $$@; fi @rm -f $$@.tmp $$@.sha.tmp @$$(if $$(MDEBUG), $$(info DEP: $$@, MOD:$$?)) endef diff --git a/Makefile.work b/Makefile.work index 629b3d2d1b4..2334f650d11 100644 --- a/Makefile.work +++ b/Makefile.work @@ -75,11 +75,7 @@ SHELL = /bin/bash USER := $(shell id -un) PWD := $(shell realpath $(shell pwd)) USER_LC := $(shell echo $(USER) | tr A-Z a-z) -ifneq ($(DEFAULT_CONTAINER_REGISTRY),) -DOCKER_MACHINE := $(shell docker run --rm $(DEFAULT_CONTAINER_REGISTRY)/debian:trixie uname -m) -else -DOCKER_MACHINE := $(shell docker run --rm debian:trixie uname -m) -endif +DOCKER_MACHINE := $(shell docker info | grep Architecture: | awk '{print $$2}') HOST_DOCKERD_GID := $(shell getent group docker | cut -d : -f3) comma := , @@ -204,12 +200,14 @@ $(shell test -d $(SONIC_VERSION_CACHE_SOURCE) || \ $(shell \ SONIC_VERSION_CONTROL_COMPONENTS=$(SONIC_VERSION_CONTROL_COMPONENTS) \ TRUSTED_GPG_URLS=$(TRUSTED_GPG_URLS) \ - PACKAGE_URL_PREFIX=$(PACKAGE_URL_PREFIX) \ + BUILD_PACKAGES_URL=$(BUILD_PACKAGES_URL) \ DISTRO=$(BLDENV) \ SONIC_VERSION_CACHE=$(SONIC_VERSION_CACHE) \ SONIC_VERSION_CACHE_SOURCE=$(SONIC_VERSION_CACHE_SOURCE) \ DBGOPT='$(DBGOPT)' \ MIRROR_SNAPSHOT=$(MIRROR_SNAPSHOT) \ + BUILD_PUBLIC_URL=$(BUILD_PUBLIC_URL) \ + BUILD_SNAPSHOT_URL=$(BUILD_SNAPSHOT_URL) \ PIP_HTTP_TIMEOUT=$(PIP_HTTP_TIMEOUT) \ scripts/generate_buildinfo_config.sh) @@ -220,6 +218,8 @@ $(shell CONFIGURED_ARCH=$(CONFIGURED_ARCH) \ INCLUDE_FIPS=$(INCLUDE_FIPS) \ DOCKER_EXTRA_OPTS=$(DOCKER_EXTRA_OPTS) \ DEFAULT_CONTAINER_REGISTRY=$(DEFAULT_CONTAINER_REGISTRY) \ + BUILD_PUBLIC_URL=$(BUILD_PUBLIC_URL) \ + BUILD_SNAPSHOT_URL=$(BUILD_SNAPSHOT_URL) \ FIPS_VERSION=$(FIPS_VERSION) \ FIPS_GOLANG_MAIN_VERSION=$(FIPS_GOLANG_MAIN_VERSION) \ FIPS_GOLANG_VERSION=$(FIPS_GOLANG_VERSION) \ @@ -232,16 +232,19 @@ $(shell CONFIGURED_ARCH=$(CONFIGURED_ARCH) \ ifeq ($(CROSS_BUILD_ENVIRON), y) $(shell SONIC_VERSION_CONTROL_COMPONENTS=$(SONIC_VERSION_CONTROL_COMPONENTS) \ - MIRROR_SNAPSHOT=$(MIRROR_SNAPSHOT) scripts/build_mirror_config.sh $(SLAVE_DIR) amd64 $(BLDENV)) + MIRROR_SNAPSHOT=$(MIRROR_SNAPSHOT) BUILD_SNAPSHOT_URL=$(BUILD_SNAPSHOT_URL) scripts/build_mirror_config.sh $(SLAVE_DIR) amd64 $(BLDENV)) endif $(shell SONIC_VERSION_CONTROL_COMPONENTS=$(SONIC_VERSION_CONTROL_COMPONENTS) \ - MIRROR_SNAPSHOT=$(MIRROR_SNAPSHOT) scripts/build_mirror_config.sh $(SLAVE_DIR) $(CONFIGURED_ARCH) $(BLDENV)) + MIRROR_SNAPSHOT=$(MIRROR_SNAPSHOT) BUILD_SNAPSHOT_URL=$(BUILD_SNAPSHOT_URL) scripts/build_mirror_config.sh $(SLAVE_DIR) $(CONFIGURED_ARCH) $(BLDENV)) PREPARE_DOCKER=BUILD_SLAVE=y \ DEFAULT_CONTAINER_REGISTRY=$(DEFAULT_CONTAINER_REGISTRY) \ SONIC_VERSION_CACHE=$(SONIC_VERSION_CACHE) \ DBGOPT='$(DBGOPT)' \ MIRROR_SNAPSHOT=$(MIRROR_SNAPSHOT) \ + BUILD_PUBLIC_URL=$(BUILD_PUBLIC_URL) \ + BUILD_SNAPSHOT_URL=$(BUILD_SNAPSHOT_URL) \ + ENABLE_SBOM=$(ENABLE_SBOM) \ scripts/prepare_docker_buildinfo.sh \ $(SLAVE_BASE_IMAGE) \ $(SLAVE_DIR)/Dockerfile \ @@ -287,6 +290,17 @@ OVERLAY_MODULE_CHECK := \ BUILD_TIMESTAMP := $(shell date +%Y%m%d\.%H%M%S) +# SOURCE_DATE_EPOCH is the reproducible-build convention for stamping +# generated artifacts (SBOMs, in-toto attestations, etc.) with a +# deterministic time. Default to the timestamp of the HEAD git commit +# so two builds of the same source produce byte-identical SBOMs; can +# be overridden by passing SOURCE_DATE_EPOCH= explicitly from the +# environment, which is what reproducible-build CI typically does. +ifeq ($(SOURCE_DATE_EPOCH),) +SOURCE_DATE_EPOCH := $(shell git -C $(SOURCE_TREE) log -1 --format=%ct HEAD 2>/dev/null || date +%s) +endif +export SOURCE_DATE_EPOCH + # Create separate Docker lockfiles for saving vs. loading an image. ifeq ($(DOCKER_LOCKDIR),) override DOCKER_LOCKDIR := /tmp/docklock @@ -294,7 +308,7 @@ endif DOCKER_LOCKFILE_SAVE := $(DOCKER_LOCKDIR)/docker_save.lock $(shell mkdir -m 0777 -p $(DOCKER_LOCKDIR)) $(shell [ -f $(DOCKER_LOCKFILE_SAVE) ] || (touch $(DOCKER_LOCKFILE_SAVE) && chmod 0777 $(DOCKER_LOCKFILE_SAVE))) -$(shell [ -d $(DOCKER_ROOT) ] && docker run --rm -v $(DOCKER_ROOT)\:/mount $(DEFAULT_CONTAINER_REGISTRY)debian:bookworm sh -c 'rm -rf /mount/*') +$(shell [ -d $(DOCKER_ROOT) ] && sudo rm -rf $(DOCKER_ROOT)/*) $(shell mkdir -p $(DOCKER_ROOT)) ifeq ($(DOCKER_BUILDER_MOUNT),) @@ -305,6 +319,68 @@ ifeq ($(DOCKER_BUILDER_WORKDIR),) override DOCKER_BUILDER_WORKDIR := "/sonic" endif +# Empty by default; only set when building from a git worktree (see below). For +# a normal clone it expands to nothing, so the in-container build command is +# unchanged. +SONIC_WT_GITDIR_FIXUP := + +# Support building from a git worktree (https://github.com/sonic-net/sonic-buildimage/issues/28002). +# +# In a normal clone, $(PWD)/.git is a real directory mounted into the container +# as part of $(PWD):/sonic, so in-container git (including submodule git used by +# e.g. src/sonic-frr) works. In a git worktree, $(PWD)/.git is a *file* pointing +# into the parent repo's git dir, and each submodule's .git pointer plus its +# core.worktree back-reference resolve to paths OUTSIDE the $(PWD):/sonic mount, +# so in-container git fails with "fatal: not a git repository" (Error 128). +# +# To make worktree builds work, additionally bind-mount, only when building from +# a worktree (for a normal clone these are empty and nothing changes): +# 1. the parent repo's common git dir at the same absolute path the worktree's +# .git pointers reference inside the container, and +# 2. the worktree tree itself at its parent-relative basename path, so each +# submodule gitdir's core.worktree back-reference resolves onto the real +# tree instead of a non-existent path. +# We also run the build from that basename path (DOCKER_BUILDER_WORKDIR), so the +# work tree git infers from core.worktree matches the build working directory; +# otherwise git reports the submodule is not a work tree and tools like stg fail +# with "Not inside a git worktree". /sonic stays mounted for paths that +# reference it directly. Both mounts are read-write because package builds such +# as FRR run git fetch/checkout, stg, and gbp dch, which write to the git dir. +# +# Note: these helper variables are deliberately NOT named GIT_DIR / GIT_COMMON_DIR +# because those are environment variable names git itself honors; reusing them +# here would leak into child git invocations and break them. +SONIC_WT_GIT_DIR := $(shell git -C $(PWD) rev-parse --git-dir 2>/dev/null) +SONIC_WT_GIT_COMMON_DIR := $(shell git -C $(PWD) rev-parse --git-common-dir 2>/dev/null) +ifeq ($(GIT_WORKTREE_MOUNTS),) +ifneq ($(SONIC_WT_GIT_DIR),$(SONIC_WT_GIT_COMMON_DIR)) +ifneq ($(SONIC_WT_GIT_COMMON_DIR),) +# Absolute path to the parent repo's common git dir (e.g. /data/foo/.git). +SONIC_WT_GIT_COMMON_DIR_ABS := $(shell cd $(PWD) && realpath $(SONIC_WT_GIT_COMMON_DIR) 2>/dev/null) +# Basename of the parent repo working dir (the dir that contains .git), e.g. foo. +SONIC_WT_PARENT_BASENAME := $(shell basename $(patsubst %/.git,%,$(SONIC_WT_GIT_COMMON_DIR_ABS))) +# Basename of this worktree, used by submodule core.worktree back-references. +SONIC_WT_BASENAME := $(shell basename $(PWD)) +ifneq ($(SONIC_WT_GIT_COMMON_DIR_ABS),) +override GIT_WORKTREE_MOUNTS := -v $(SONIC_WT_GIT_COMMON_DIR_ABS):/$(SONIC_WT_PARENT_BASENAME)/.git:rw -v $(PWD):/$(SONIC_WT_BASENAME):rw +# Run the build from the worktree-basename mount so git's inferred work tree +# (from each submodule's core.worktree back-reference) matches the working dir. +override DOCKER_BUILDER_WORKDIR := "/$(SONIC_WT_BASENAME)" +# git worktree add records the top-level worktree .git as an ABSOLUTE gitdir +# path into the parent repo, unlike submodule .git pointers which are relative +# (the init target normalizes those). That absolute host path does not exist at +# the same location inside the container, so in-container git fails and slave.mk +# derives an empty SONIC_IMAGE_VERSION, which produces an invalid ".0-" docker +# image tag. Normalize the top-level pointer to a relative gitdir so it resolves +# both on the host and inside the container (the worktree dir and the parent +# .git keep the same relative relationship in both locations). Run as the first +# step of the in-container build command. +override SONIC_WT_GITDIR_FIXUP := echo gitdir: ../$(SONIC_WT_PARENT_BASENAME)/.git/worktrees/$(SONIC_WT_BASENAME) > /$(SONIC_WT_BASENAME)/.git; +endif +endif +endif +endif + # Consider removing the --ulimit flag once nothing older # than Bullseye is being used as a slave container. # Build container memory limit (set SONIC_BUILD_MEMORY=none to disable). @@ -320,8 +396,20 @@ ifneq ($(SONIC_BUILD_MEMORY),none) endif endif -DOCKER_RUN := docker run --rm=true --privileged --init \ +# When using native dockerd (DooD), we don't need --privileged for Docker-in-Docker. +# Use specific capabilities instead for better security. +# When using DinD (default), --privileged is required for the nested dockerd. +ifeq ($(strip $(SONIC_CONFIG_USE_NATIVE_DOCKERD_FOR_BUILD)),y) +DOCKER_PRIVMODE := --cap-add SYS_ADMIN --cap-add SYS_CHROOT --cap-add NET_ADMIN \ + --cap-add MKNOD --cap-add DAC_OVERRIDE \ + --security-opt apparmor=unconfined --security-opt seccomp=unconfined +else +DOCKER_PRIVMODE := --privileged +endif + +DOCKER_RUN := docker run --rm=true $(DOCKER_PRIVMODE) --init \ -v $(DOCKER_BUILDER_MOUNT) \ + $(GIT_WORKTREE_MOUNTS) \ -v "$(DOCKER_LOCKDIR):$(DOCKER_LOCKDIR)" \ -w $(DOCKER_BUILDER_WORKDIR) \ $(SONIC_BUILD_MEMORY_FLAGS) \ @@ -361,6 +449,11 @@ ifneq ($(SECURE_UPGRADE_PROD_SIGNING_TOOL),) DOCKER_RUN += -v $(SECURE_UPGRADE_PROD_SIGNING_TOOL):/sonic/scripts/$(shell basename -- $(SECURE_UPGRADE_PROD_SIGNING_TOOL)):ro endif +# Pass the Signing prod tool arguments as environment variable to avoid make command-line parsing issues +ifneq ($(SECURE_UPGRADE_PROD_TOOL_ARGS),) + DOCKER_RUN += -e "SECURE_UPGRADE_PROD_TOOL_ARGS=$(SECURE_UPGRADE_PROD_TOOL_ARGS)" +endif + ifneq ($(SONIC_DPKG_CACHE_SOURCE),) DOCKER_RUN += -v "$(SONIC_DPKG_CACHE_SOURCE):/dpkg_cache:rw" endif @@ -445,21 +538,27 @@ SPLIT_LOG = 2>&1 | tee DOCKER_BASE_LOG = $(SLAVE_DIR)/$(SLAVE_BASE_IMAGE)_$(SLAVE_BASE_TAG).log DOCKER_LOG = $(SLAVE_DIR)/$(SLAVE_IMAGE)_$(SLAVE_TAG).log +# When SONIC_CONFIG_USE_DOCKER_CACHE is enabled, allow Docker layer caching +# by omitting --no-cache. This speeds up incremental builds significantly. +ifneq ($(strip $(SONIC_CONFIG_USE_DOCKER_CACHE)),y) +DOCKER_NO_CACHE_FLAG = --no-cache +endif -DOCKER_SLAVE_BASE_BUILD = docker build --no-cache \ +DOCKER_SLAVE_BASE_BUILD = docker build $(DOCKER_NO_CACHE_FLAG) \ -t $(SLAVE_BASE_IMAGE):$(SLAVE_BASE_TAG) \ --build-arg http_proxy=$(http_proxy) \ --build-arg https_proxy=$(https_proxy) \ --build-arg no_proxy=$(no_proxy) \ --build-arg SONIC_VERSION_CACHE=$(SONIC_VERSION_CACHE) \ --build-arg SONIC_VERSION_CONTROL_COMPONENTS=$(SONIC_VERSION_CONTROL_COMPONENTS) \ + --build-arg ENABLE_SBOM=$(ENABLE_SBOM) \ $(SLAVE_DIR) \ $(SPLIT_LOG) $(DOCKER_BASE_LOG) DOCKER_BASE_PULL = docker pull \ $(REGISTRY_SERVER):$(REGISTRY_PORT)$(REGISTRY_SERVER_PATH)/$(SLAVE_BASE_IMAGE):$(SLAVE_BASE_TAG) -DOCKER_USER_BUILD = docker build --no-cache \ +DOCKER_USER_BUILD = docker build $(DOCKER_NO_CACHE_FLAG) \ --build-arg user=$(USER) \ --build-arg uid=$(shell id -u) \ --build-arg guid=$(shell id -g) \ @@ -563,7 +662,6 @@ SONIC_BUILD_INSTRUCTION := $(MAKE) \ USERNAME=$(USERNAME) \ CHANGE_DEFAULT_PASSWORD=$(CHANGE_DEFAULT_PASSWORD) \ SONIC_BUILD_JOBS=$(SONIC_BUILD_JOBS) \ - SONIC_USE_DOCKER_BUILDKIT=$(SONIC_USE_DOCKER_BUILDKIT) \ VS_PREPARE_MEM=$(VS_PREPARE_MEM) \ KERNEL_PROCURE_METHOD=$(KERNEL_PROCURE_METHOD) \ SONIC_DPKG_CACHE_METHOD=$(SONIC_DPKG_CACHE_METHOD) \ @@ -577,6 +675,7 @@ SONIC_BUILD_INSTRUCTION := $(MAKE) \ DOCKER_LOCKDIR=$(DOCKER_LOCKDIR) \ DOCKER_LOCKFILE_SAVE=$(DOCKER_LOCKFILE_SAVE) \ SONIC_CONFIG_USE_NATIVE_DOCKERD_FOR_BUILD=$(SONIC_CONFIG_USE_NATIVE_DOCKERD_FOR_BUILD) \ + SONIC_CONFIG_USE_DOCKER_CACHE=$(SONIC_CONFIG_USE_DOCKER_CACHE) \ SONIC_INCLUDE_SYSTEM_TELEMETRY=$(INCLUDE_SYSTEM_TELEMETRY) \ SONIC_INCLUDE_SYSTEM_GNMI=$(INCLUDE_SYSTEM_GNMI) \ SONIC_INCLUDE_SYSTEM_BMP=$(INCLUDE_SYSTEM_BMP) \ @@ -585,6 +684,7 @@ SONIC_BUILD_INSTRUCTION := $(MAKE) \ INCLUDE_DHCP_RELAY=$(INCLUDE_DHCP_RELAY) \ INCLUDE_DHCP_SERVER=$(INCLUDE_DHCP_SERVER) \ INCLUDE_MACSEC=$(INCLUDE_MACSEC) \ + INCLUDE_STP=$(INCLUDE_STP) \ INCLUDE_ICCPD=$(INCLUDE_ICCPD) \ SONIC_INCLUDE_RESTAPI=$(INCLUDE_RESTAPI) \ SONIC_INCLUDE_MUX=$(INCLUDE_MUX) \ @@ -599,7 +699,6 @@ SONIC_BUILD_INSTRUCTION := $(MAKE) \ SECURE_UPGRADE_SIGNING_CERT=$(SECURE_UPGRADE_SIGNING_CERT) \ SECURE_UPGRADE_KERNEL_CAFILE=$(SECURE_UPGRADE_KERNEL_CAFILE) \ SECURE_UPGRADE_PROD_SIGNING_TOOL=$(SECURE_UPGRADE_PROD_SIGNING_TOOL) \ - SECURE_UPGRADE_PROD_TOOL_ARGS="\"'$(SECURE_UPGRADE_PROD_TOOL_ARGS)'\"" \ SONIC_DEFAULT_CONTAINER_REGISTRY=$(DEFAULT_CONTAINER_REGISTRY) \ ENABLE_HOST_SERVICE_ON_START=$(ENABLE_HOST_SERVICE_ON_START) \ SLAVE_DIR=$(SLAVE_DIR) \ @@ -614,6 +713,8 @@ SONIC_BUILD_INSTRUCTION := $(MAKE) \ MIRROR_URLS=$(MIRROR_URLS) \ MIRROR_SECURITY_URLS=$(MIRROR_SECURITY_URLS) \ MIRROR_SNAPSHOT=$(MIRROR_SNAPSHOT) \ + BUILD_PUBLIC_URL=$(BUILD_PUBLIC_URL) \ + BUILD_SNAPSHOT_URL=$(BUILD_SNAPSHOT_URL) \ SONIC_VERSION_CONTROL_COMPONENTS=$(SONIC_VERSION_CONTROL_COMPONENTS) \ ONIE_IMAGE_PART_SIZE=$(ONIE_IMAGE_PART_SIZE) \ SONIC_OS_VERSION=$(SONIC_OS_VERSION) \ @@ -623,6 +724,13 @@ SONIC_BUILD_INSTRUCTION := $(MAKE) \ SONIC_PTF_ENV_PY_VER=$(SONIC_PTF_ENV_PY_VER) \ ENABLE_MULTIDB=$(ENABLE_MULTIDB) \ ENABLE_VRF_STRICT=$(ENABLE_VRF_STRICT) \ + ENABLE_FRR_TCMALLOC=$(ENABLE_FRR_TCMALLOC) \ + ENABLE_SBOM=$(ENABLE_SBOM) \ + SBOM_FORMAT=$(SBOM_FORMAT) \ + SBOM_SCAN_TOOL=$(SBOM_SCAN_TOOL) \ + SBOM_INCLUDE_LICENSES=$(SBOM_INCLUDE_LICENSES) \ + SBOM_STRICT=$(SBOM_STRICT) \ + SOURCE_DATE_EPOCH=$(SOURCE_DATE_EPOCH) \ $(SONIC_OVERRIDE_BUILD_VARS) .PHONY: sonic-slave-build sonic-slave-bash init reset @@ -644,8 +752,11 @@ endif export MIRROR_URLS export MIRROR_SECURITY_URLS export MIRROR_SNAPSHOT +export BUILD_PUBLIC_URL +export BUILD_SNAPSHOT_URL export SONIC_VERSION_CONTROL_COMPONENTS export PIP_HTTP_TIMEOUT +export SECURE_UPGRADE_PROD_TOOL_ARGS %:: | sonic-build-hooks ifneq ($(filter y, $(MULTIARCH_QEMU_ENVIRON) $(CROSS_BUILD_ENVIRON)),) @@ -661,7 +772,7 @@ endif $(Q)$(DOCKER_RUN) \ $(SLAVE_IMAGE):$(SLAVE_TAG) \ - bash -c "$(SONIC_BUILD_INSTRUCTION) $@ SONIC_BUILD_TARGET=$@; $(COLLECT_BUILD_VERSION); $(SLAVE_SHELL)" + bash -c "$(SONIC_WT_GITDIR_FIXUP) $(SONIC_BUILD_INSTRUCTION) $@ SONIC_BUILD_TARGET=$@; $(COLLECT_BUILD_VERSION); $(SLAVE_SHELL)" $(Q)$(docker-image-cleanup) docker-cleanup: diff --git a/README.buildsystem.md b/README.buildsystem.md index 74ec12182a8..8bae63e6ac4 100644 --- a/README.buildsystem.md +++ b/README.buildsystem.md @@ -42,7 +42,7 @@ You can find a make rule for every target that is defined in recipe there. *Makefile* is a wrapper over sonic-slave docker image. Every part of build is executed in a docker container called sonic-slave, specifically crafted for this environment. -If build is started for the first time on a particular host, a new sonic-slave image will be built form *sonic-slave/Dockerfile* on the machine. +If build is started for the first time on a particular host, a new sonic-slave image will be built from *sonic-slave/Dockerfile* on the machine. It might take some time, so be patient. After that all subsequent make commands will be executed inside this container. *Makefile* takes every target that is passed to make command and delegates it as an entry point to a container, @@ -119,7 +119,7 @@ SONIC_PYTHON_STDEB_DEBS += $(SOME_NEW_DEB) # add package to this target group **SONIC_MAKE_DEBS** This is a bit more flexible case. -If you have to do some specific type of build or apply paths prior to build, just define your own Makefile and add it to buildimage. +If you have to do some specific type of build or apply patches prior to build, just define your own Makefile and add it to buildimage. Define: ```make SOME_NEW_DEB = some_new_deb.deb # name of your package @@ -267,7 +267,7 @@ _Recommend: Rename image built using INSTALL_DEBUG_TOOLS=y to mark it explicit. * start process under dbg * attach gdb to running process * Set required source dir from under /src as needed - * May use /debug to record all geb logs or any spew from debug session. + * May use /debug to record all gdb logs or any spew from debug session. ### To enhance debug dockers * Add to `_DBG_IMAGE_PACKAGES`, additional debug tools that will be pre-installed during build. diff --git a/README.md b/README.md index 22bd8b32504..04234489d54 100644 --- a/README.md +++ b/README.md @@ -8,6 +8,16 @@ [![Nvidia-Bluefield](https://dev.azure.com/mssonic/build/_apis/build/status/nvidia/Azure.sonic-buildimage.official.nvidia-bluefield?branchName=master&label=Nvidia-Bluefield)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=1665&branchName=master) [![VS](https://dev.azure.com/mssonic/build/_apis/build/status/vs/Azure.sonic-buildimage.official.vs?branchName=master&label=VS)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=142&branchName=master) +*202605 builds*: + +[![Broadcom](https://dev.azure.com/mssonic/build/_apis/build/status/broadcom/Azure.sonic-buildimage.official.broadcom?branchName=202605&label=Broadcom)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=138&branchName=202605) +[![Mellanox](https://dev.azure.com/mssonic/build/_apis/build/status/mellanox/Azure.sonic-buildimage.official.mellanox?branchName=202605&label=Mellanox)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=139&branchName=202605) +[![Marvell-Teralynx](https://dev.azure.com/mssonic/build/_apis/build/status/innovium/Azure.sonic-buildimage.official.marvell-teralynx?branchName=202605&label=Marvell-Teralynx)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=2432&branchName=202605) +[![Marvell-Prestera(armhf)](https://dev.azure.com/mssonic/build/_apis/build/status/marvell/Azure.sonic-buildimage.official.marvell-prestera-armhf?branchName=202605&label=Marvell-Prestera-armhf)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=141&branchName=202605) +[![Marvell-Prestera(arm64)](https://dev.azure.com/mssonic/build/_apis/build/status/marvell/Azure.sonic-buildimage.official.marvell-prestera-arm64?branchName=202605&label=Marvell-Prestera-arm64)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=999&branchName=202605) +[![Nvidia-Bluefield](https://dev.azure.com/mssonic/build/_apis/build/status/nvidia/Azure.sonic-buildimage.official.nvidia-bluefield?branchName=202605&label=Nvidia-Bluefield)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=1665&branchName=202605) +[![VS](https://dev.azure.com/mssonic/build/_apis/build/status/vs/Azure.sonic-buildimage.official.vs?branchName=202605&label=VS)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=142&branchName=202605) + *202511 builds*: [![Broadcom](https://dev.azure.com/mssonic/build/_apis/build/status/broadcom/Azure.sonic-buildimage.official.broadcom?branchName=202511&label=Broadcom)](https://dev.azure.com/mssonic/build/_build/latest?definitionId=138&branchName=202511) @@ -62,7 +72,7 @@ All SONiC project build pipelines can be found at [Download Portal for SONiC Ima Following are the instructions on how to build an [(ONIE)](https://github.com/opencomputeproject/onie) compatible network operating system (NOS) installer image for network switches, and also how to build docker images running inside the NOS. -Note that SONiC images are build per ASIC platform. +Note that SONiC images are built per ASIC platform. Switches using the same ASIC platform share a common image. For a list of supported switches and ASIC, please refer to this [list](https://github.com/sonic-net/SONiC/wiki/Supported-Devices-and-Platforms) @@ -80,7 +90,11 @@ Any server can be a build image server as long as it has: > options to expose the full KVM interface to the VM > (e.g. [the KVM paravirtualization support on VirtualBox](https://www.virtualbox.org/manual/ch10.html#gimproviders)). -A good choice of OS for building SONiC is currently Ubuntu 22.04. +A good choice of OS for building SONiC is currently Ubuntu 22.04 or Ubuntu 24.04. + +> **Note (Ubuntu 24.04):** Python 3.12+ removed the `imp` module, which breaks the +> legacy `j2cli` package. The prerequisites script and manual steps below install +> `jinjanator` instead, which is a drop-in replacement that works on all Python versions. ## Automated prerequisites installation and repository cloning @@ -90,6 +104,17 @@ For convenience, you can use the automated prerequisites script to handle both p curl -sSL https://raw.githubusercontent.com/sonic-net/sonic-buildimage/master/scripts/prerequisites.sh | bash ``` +If you have already cloned the repo, run it locally to install only the prerequisites +(the script detects an existing clone at `SONIC_DIR` and skips the clone/checkout step): +```shell +cd ~/sonic-buildimage # or wherever your clone lives +SONIC_DIR=$(pwd) bash scripts/prerequisites.sh +``` + +> **Tip:** You can override clone location and branch: +> `SONIC_DIR=~/my-sonic BRANCH=202511 bash scripts/prerequisites.sh` +> When `SONIC_DIR` already exists, only prerequisites are installed — no second clone. + This script will automatically: * Install required packages (pip, jinja, Docker) * Configure Docker for non-root usage @@ -117,7 +142,7 @@ pip3 install --user jinjanator * If you are using Linux kernel 5.3 or newer, then you must use Docker 20.10.10 or newer. This is because older Docker versions did not allow the `clone3` syscall, which is now used in Bookworm. > Note: If a previous installation of Docker using snap was present on the -> system, remove it and also remove docker from snap before reinstallating docker. +> system, remove it and also remove docker from snap before reinstalling docker. > This will avoid [known bugs that falsely report read-only filesystems issues](https://stackoverflow.com/questions/52526219/docker-mkdir-read-only-file-system) > during the build process. @@ -157,6 +182,36 @@ make configure PLATFORM=[ASIC_VENDOR] make SONIC_BUILD_JOBS=4 all ``` +### Build performance tips + +**Parallelism vs memory:** Each parallel job can use 4–6 GB RAM during C++ compilation, +plus a ~4 GB base overhead. Rule of thumb: `(JOBS × 6 GB) + 4 GB ≤ available RAM`: + +| JOBS | Approx RAM needed | Typical VS build time | +|------|-------------------|----------------------| +| 1 | ~10 GB | ~3 hours | +| 4 | ~28 GB | ~1.5 hours | +| 8 | ~52 GB | ~1 hour | + +**Contain OOM in the build container** (protects host processes): +```shell +# Add to rules/config.user (persists across rebases): +SONIC_BUILD_MEMORY = 24g +``` + +**Skip tests for faster iteration:** +```shell +make SONIC_BUILD_JOBS=4 BUILD_SKIP_TEST=y all +``` + +**Use a persistent config file** instead of CLI overrides — create `rules/config.user` (gitignored): +```makefile +SONIC_CONFIG_BUILD_JOBS = 4 +BUILD_SKIP_TEST = y +SONIC_BUILD_MEMORY = 24g +DEFAULT_BUILD_LOG_TIMESTAMP = simple +``` + The supported ASIC vendors are: * PLATFORM=barefoot @@ -299,6 +354,18 @@ For details refer to [SONiC Buildimage Guide](https://github.com/sonic-net/sonic Please refer to [SONiC roadmap](https://github.com/sonic-net/SONiC/wiki/Sonic-Roadmap-Planning) on the SAI version for each SONiC release. +## Software Bill of Materials (SBOM) and vulnerability scanning + +Opt-in SBOM generation and SBOM-based vulnerability scanning are +supported via `ENABLE_SBOM=y` at build time. The default build path +is unchanged; enabling SBOM adds CycloneDX 1.6 + SPDX 2.3 + SLSA +v1.0 in-toto provenance sidecars per built artifact, along with +standalone CycloneDX scanner output for vulnerability reports. + +See [README.sbom.md](README.sbom.md) for the full design, build +flag reference, vulnerability-report quick start, VEX workflow, +reproducibility notes, and known limitations. + ## Notes * If you are running make for the first time, a sonic-slave-${USER} docker image diff --git a/README.sbom.md b/README.sbom.md new file mode 100644 index 00000000000..e3bed1f825e --- /dev/null +++ b/README.sbom.md @@ -0,0 +1,670 @@ +# SBOM Generation for SONiC Builds + +A CycloneDX 1.6 Software Bill of Materials, an SPDX 2.3 conversion, +and an unsigned SLSA v1.0 provenance attestation are emitted alongside +every `target/sonic-.bin` when the build is invoked with +`ENABLE_SBOM=y`. Default builds are unaffected. + +## Contents + +- [Quick start](#quick-start) +- [Configuration](#configuration) +- [Scope](#scope) +- [Architecture](#architecture) +- [Component categories](#component-categories) +- [License resolution](#license-resolution) +- [Tools](#tools) +- [Reproducibility](#reproducibility) +- [Attestation and signing](#attestation-and-signing) +- [Vulnerability scanning](#vulnerability-scanning) +- [Verification](#verification) +- [Querying dependencies](#querying-dependencies) +- [Known limitations](#known-limitations) +- [File map](#file-map) + +## Quick start + +Enable for one build: + +```bash +make ENABLE_SBOM=y target/sonic-broadcom.bin +``` + +Output, alongside the `.bin`: + +``` +target/sonic-.bin installer image +target/sonic-.bin.cdx.json CycloneDX 1.6 SBOM (primary) +target/sonic-.bin.spdx.json SPDX 2.3 (when SBOM_FORMAT in spdx, both) +target/sonic-.bin.intoto.json unsigned SLSA v1.0 provenance +``` + +Test containers that get built but don't ship in any `.bin` +(`docker-ptf`, `docker-ptf-sai`, `docker-sonic-mgmt`) each get a +standalone sidecar SBOM: + +``` +target/docker-ptf.gz.sbom.cdx.json +target/docker-ptf-sai.gz.sbom.cdx.json +target/docker-sonic-mgmt.gz.sbom.cdx.json +``` + +Generate a vulnerability report from the SBOM (a standalone post-build +step, not part of the build): + +```bash +python3 scripts/sbom_vuln_scan.py target/sonic-broadcom.bin.cdx.json +# Writes target/sonic-broadcom.bin.vuln.json + prints a table. +# Add --vex vex/ to apply suppressions. --fail-on critical for CI gating. +``` + +The SBOM is *not* embedded inside the `.bin`. Release engineering +publishes the sibling files alongside it. + +## Configuration + +| Variable | Default | Meaning | +|---|---|---| +| `ENABLE_SBOM` | `n` | Master switch. When `n`, no SBOM hooks fire and no extra tools are installed. | +| `SBOM_FORMAT` | `both` | `cyclonedx`, `spdx`, or `both`. SPDX is a downstream conversion via `cyclonedx-cli` (auto-fetched), so emitting both is essentially free. | +| `SBOM_SCAN_TOOL` | `syft` | Binary scanner for transitive deps: `syft` or `trivy`. | +| `SBOM_INCLUDE_LICENSES` | `y` | Whether to harvest copyrights and resolve SPDX licenses. | +| `SBOM_STRICT` | `y` | When `y`, the build fails if a critical SBOM input is missing — host rootfs (`fsroot-/`), any `.gz` in `SBOM_INSTALLER_DOCKERS`, or the scanner binary. Set to `n` for debugging or one-off partial emits. Soft optional features (SPDX conversion, provenance, license resolution) always warn-and-continue regardless. | + +These variables are surfaced in the `Build Configuration` dump that +SONiC prints at the start of every build, so you can confirm the state. + +## Scope + +Two SBOM kinds are emitted, with different scopes: + +**The aggregate `.bin` SBOM** (`target/sonic-.bin.cdx.json`) +covers what ships on the DUT inside the installer payload: the host +root filesystem, the kernel + every shipped module, the bootloader, +and every container the build packaged into the `.bin`. Build slaves, +the SDK build environment, and any container gated by an `INCLUDE_*` +flag set to `n` are automatically excluded — the aggregator reads the +docker list `slave.mk` itself computed for the active `PLATFORM`, no +hand-curated allow-list. + +**Per-container sidecar SBOMs** (`target/.gz.sbom.cdx.json`) +are emitted for test containers that get built but don't ship in any +`.bin` and so wouldn't otherwise be represented: + +- `docker-ptf`, `docker-ptf-sai` — PTF test harness +- `docker-sonic-mgmt` — automation harness + +These exist so security tooling has a CycloneDX surface for them +distinct from the production `.bin` SBOM. The other ~30 in-scope +containers don't get a sidecar — they're already covered by the +aggregate `.bin` SBOM. + +When you enable an optional container (`INCLUDE_PDE=y`, etc.) it +ships, so it appears in the `.bin` SBOM. The filter tracks the +build's own opt-ins. + +Always out-of-scope (never gets any SBOM): + +- `sonic-slave-*` build slave images. +- `docker-sonic-sdk-buildenv` (SDK build environment). +- Build-time-only debs and wheels (`_TEST = y` recipes, build deps + that `apt autoremove` strips before `fs.squashfs` is sealed). + +## Architecture + +Four independent sources contribute components to the final SBOM, +merged in priority order (first source wins for any given component): + +``` ++----------------+ +----------------+ +----------------+ +----------------+ +| Recipe-emit | >> | Observation | >> | Lockfile | >> | Scanner | +| | | | | parsing | | (syft/trivy) | +| Authoritative | | dpkg/pip in | | go.sum, npm / | | Catch-all over | +| for ~250 SONiC | | the assembled | | pnpm / yarn | | the assembled | +| .debs + per- | | rootfs and | | locks from in- | | rootfs and | +| .deb language | | containers. | | tree builds. | | each container.| +| deps (Rust / | | | | (Rust is via | | | +| Go / Python). | | | | recipe-emit, | | | +| | | | | not lockfile.) | | | ++----------------+ +----------------+ +----------------+ +----------------+ + | | | | + +-----------------------+-----------------------+-----------------------+ + v + +-----------------------+ + | Merge (purl + nva + | + | normalized-version) | + +-----------------------+ + v + target/sonic-.bin.cdx.json +``` + +**Why hybrid.** Recipe-driven emit owns the locally-built artifacts +(versions, submodule SHAs, patch series, per-.deb Rust/Go/Python +language-dep attribution) that a binary scanner has no way to recover. +Observation owns transitive apt/pip deps. Lockfile parsing adds the +language-ecosystem transitive deps in ecosystems the per-.deb +introspection above doesn't already cover. Scanner is the wide net +for anything else. None of the four alone is complete; the union is. + +**Dedupe by `(purl, name+version+arch, name+normalized-version+arch)`.** +The normalized-version key strips Debian epochs (`1:`) and downstream +suffixes (`+fips`, `+sonic`, `+bN`, `+debNuM`) so recipe-emit's +a recipe-emit ` ` matches observation's `:+fips`. +Legitimately distinct upstream versions of the same package across +different Debian releases stay distinct. + +**Dynamic, not enumerated.** The recipe layer only fires when make +actually invokes that recipe; observation only sees what got +installed. Builds for different `PLATFORM` values produce different +SBOMs automatically because the build invokes different recipes. +`SONIC_VERSION_CONTROL_COMPONENTS` overrides (where pins float to +mirror-latest) are reflected too — observation records what was +actually installed. + +## Component categories + +How each pattern is captured. Concrete CycloneDX shapes are visible in +`target/.../*.cdx.json` after a build; one representative example is +shown after this list. + +- **SONiC-native code** (sonic-net submodule). Primary PURL: + `pkg:github/sonic-net/@`. `externalReferences` records + the submodule URL and pinned commit. No pedigree unless a sibling + `src/.patch/` exists. + +- **Patched upstream Debian sources** (`dget` + sidecar patches in + `src//patch/`). Primary: `pkg:deb/sonic/@`. + `pedigree.ancestors[0]` records the upstream Debian `.dsc` URL + + MD5 from `versions-web`; `pedigree.patches[]` enumerates each + applied patch with its SHA-256. + +- **Forked upstream with nested submodule** (the FRR pattern: + `src/sonic-frr` is a sonic-net wrapper holding patches; the nested + `src/sonic-frr/frr` is FRRouting upstream). Primary: + `pkg:deb/sonic/frr@`. Ancestor: + `pkg:github/FRRouting/frr@`. Patches + aggregate + patch-set SHA-1 in pedigree. Same handling for sonic-p4rt, + sonic-sysmgr (gnoi), wpasupplicant. + +- **Direct upstream submodule with sidecar patches** (scapy, ptf, + ptf-py3, supervisor, redis-dump-load). Primary derived from the + artifact filename (PyPI for wheels, deb for debs). Ancestor: + `pkg:github//@`. Patches from the + sidecar directory. + +- **Upstream apt/dpkg packages** (everything apt-installed into the + rootfs or a container, ~1000+ debs). Captured by observation: + `dpkg-query` against each scope. PURL form + `pkg:deb/debian/@?arch=`. Mirror snapshot + timestamp attached via `externalReferences.comment`. + +- **Python packages.** Locally-built wheels and stdeb debs follow the + SONiC-native or direct-upstream rules. PyPI installs in + containers/rootfs are observation + (`pkg:pypi/@`) from `pip3 freeze`. `uv pip` installs + are caught by the scanner pass since uv writes standard + `dist-info/` directories. + +- **Docker container images.** One `type: container` component per + shipped container with image digest. Per-container observation + components nested under it via `dependencies[]`. Base image SHAs + recorded from `files/build/versions/default/versions-docker`. + +- **Kernel and out-of-tree modules.** Linux kernel built from Debian + source + ~200 SONiC patches enumerated in pedigree. Each kernel + module (`opennsl-modules`, `sx-kernel`, `ionic-modules`, every + `sonic-platform-modules-*`) has a `dependencies[]` edge pointing + at the kernel image's `bom-ref` so consumers can reason about + kernel-ABI risk. + +- **Vendor SDKs and HALs** (Broadcom SAI, Mellanox SDK, NVIDIA + BlueField, Marvell Teralynx, Pensando, Arista PHY Credo). Recipe + emits `type: library` with `supplier.name` derived from URL + pattern, the EULA name as license, and a build-time-computed + SHA-256. + +- **Language-ecosystem transitive deps.** Per-scope `go.sum`, + `package-lock.json`, `pnpm-lock.yaml`, `yarn.lock` are harvested by + the build hook into `lockfiles.tar.gz`. Each entry becomes a + `pkg:golang/` or `pkg:npm/` component with the SHA-256 from the + lockfile preserved. Rust crate inventory is *not* harvested this + way — see the next bullet. + +- **Per-.deb language dependency attribution.** Every SONiC-built + `.deb` is introspected at fragment-emit time + (`scripts/sbom_fragment.py`). A single `dpkg-deb -x` extraction + feeds three harvesters: + + - **Rust** — for each ELF, `rust-audit-info` reads the `.dep-v0` + section that `cargo-auditable` embedded. Emits each crate as + `purl=pkg:cargo/@` with + `sonic:fragment_kind=recipe-emit-rust`. + - **Go** — for each ELF, `go version -m` parses the + `runtime/debug.BuildInfo` table from the `.go.buildinfo` section. + Emits each module as `purl=pkg:golang/@` with + `sonic:fragment_kind=recipe-emit-go`. Replacement directives + (`=>`) are honored so the recorded version is what actually + shipped. + - **Python** — walk for `*.dist-info/METADATA` files and parse + Name + Version. Emits each as `purl=pkg:pypi/@` + with `sonic:fragment_kind=recipe-emit-python`. SONiC `.debs` + today don't ship dist-info content (Python is staged via dpkg + into `/usr/lib/python3/dist-packages/` without metadata), so + Python attribution here is currently a no-op — but the harvester + activates automatically as soon as a `.deb` recipe starts + bundling a venv or installing wheels into `debian//`. + + Every emitted component carries `sonic:source_deb=`. + `build_sbom.py:build_dependency_graph()` reverses + `sonic:source_deb` into `dependsOn` edges from the `.deb`'s + `bom-ref` to each language-dep component so a consumer can walk + `swss_*.deb -> tokio@1.x` (Rust) or `sonic-gnmi_*.deb -> + github.com/openconfig/gnmi@v0.10` (Go) directly without parsing + properties. + +### Example component (forked-upstream pattern after pedigree resolution) + +```json +{ + "bom-ref": "pkg:deb/sonic/frr@?arch=", + "type": "library", + "name": "frr", + "version": "", + "purl": "pkg:deb/sonic/frr@?arch=", + "supplier": {"name": "SONiC build (forked upstream)"}, + "pedigree": { + "ancestors": [{ + "name": "frr", + "version": "", + "purl": "pkg:github/FRRouting/frr@", + "externalReferences": [{"type": "vcs", "url": "https://github.com/FRRouting/frr"}] + }], + "patches": [ + {"type": "unofficial", + "diff": {"url": "file://src/sonic-frr/patch/.patch", + "hashes": [{"alg": "SHA-256", "content": ""}]}} + ], + "notes": "patch-set sha1: " + } +} +``` + +## License resolution + +Three sources, applied in priority order: + +1. **Per-recipe override.** Recipes can declare + `$()_LICENSE = ""` in `rules/*.mk`. The + build helper passes it through to the fragment generator as + `ARTIFACT_LICENSE`. Authoritative for SONiC-native packages where + no `debian/copyright` ships. + +2. **DEP-5 `debian/copyright`.** The build hook tars every + `/usr/share/doc/*/copyright` from each scope into a sidecar + tarball (before `apt autoremove` and the doc-strip at the end of + the rootfs build wipe it). The resolver parses any file declaring + `Format: ...copyright-format/1.0/` and maps `License:` stanzas + to SPDX via `scripts/sbom_license_map.json` (~100 mappings). + +3. **`licensecheck` fallback** (from `devscripts`) for non-DEP-5 + copyright files; output goes through the same SPDX table. + +Components ending up `NOASSERTION` are counted at end-of-build: + +``` +[build_sbom.py] License resolution: 1182/1266 resolved (93.4%); 84 NOASSERTION +``` + +### Maintaining `scripts/sbom_license_map.json` + +The license-header → SPDX-identifier map is **manually curated**. Each +entry maps a free-form license declaration string (as it appears in +`License:` stanzas of Debian DEP-5 `debian/copyright` files, or as +`licensecheck` reports them) to a valid SPDX-2.3 identifier. + +To add a new mapping when a previously-unmapped `License:` keyword +shows up in a build's `NOASSERTION` set: + +1. Run a build with `ENABLE_SBOM=y`. The aggregator logs the count + of unresolved components: `License resolution: X/Y resolved …; N + NOASSERTION`. +2. Drill into the generated `target/.bin.cdx.json` and + grep for components with no `licenses[]` entry; check their + `pedigree.notes` or external references to find the source + `License:` keyword the resolver couldn't match. +3. Look up the corresponding SPDX identifier at + . +4. Add an entry to `scripts/sbom_license_map.json`: + ```json + "BSD-3-Clause variant from foo project": "BSD-3-Clause" + ``` +5. Re-run the build (or just the aggregator) and verify the count + of resolved components increases. + +The map is intentionally not auto-generated: false-positive risk is +too high for license declarations that differ in legally-meaningful +ways. A new mapping should be reviewed by someone who has read the +underlying license text at least once. + +## Tools + +When `ENABLE_SBOM=y`, the build invokes `scripts/install_sbom_tool.sh` +to fetch `syft`, `cyclonedx-cli` (if SPDX requested), and `grype` (for +post-build vuln scanning). The script wgets a pinned upstream release, +verifies its SHA-256 against a value hardcoded in the script, and +caches the binary under `target/sbom-tools/`. Subsequent builds use the +cache. + +Because the `wget` runs through SONiC's existing build-hook shim, the +URL + MD5 lands in `versions-web` like every other web-fetched +artifact — no manual pin editing required. + +For standalone vuln scanning outside a build, the same script +auto-fetches into `~/.cache/sonic-sbom/`. + +The aggregator additionally caches per-file scanner output under +`target/sbom-tools/syft-cache/-.json`, keyed by SHA-256 +of the input archive. A SONiC platform with multiple ASIC variants +(e.g. broadcom, broadcom-dnx, broadcom-legacy-th) invokes +`build_sbom.py` once per variant; without the cache, syft would +re-scan the ~28 docker `.gz` files that are identical across variants +three times. The cache short-circuits 2nd and 3rd hits. `dir:` scans +(host rootfs) are not cached because `fsroot-/` differs per +variant. `make reset` wipes `target/` and therefore invalidates the +cache automatically — no stale entries across resets. + +The license resolver's output is similarly memoized so it is not +recomputed once per ASIC variant. Same `make reset` invalidation +as the scanner cache; transparent to operators. + +## Reproducibility + +Two byte-identical builds of the same source produce byte-identical +SBOMs. `Makefile.work` sets `SOURCE_DATE_EPOCH` automatically from +the HEAD git commit's author timestamp (falling back to wall-clock +`date +%s` only when the source tree isn't a git checkout), and +exports it through to the slave container, so all SBOM timestamps +are derived from source state rather than build wall-clock. Component +ordering is sorted. License resolution depends only on on-disk files ++ the static translation table. Override is supported by passing +`SOURCE_DATE_EPOCH=` explicitly to `make`. + +Cross-host reproducibility check: + +```bash +python3 scripts/sbom_diff.py old-host.cdx.json new-host.cdx.json +# Exit 0 if equivalent at the component level; non-zero on drift. +# --quiet for one-line summary; --json out.json for tooling. +``` + +The diff ignores timestamps and aggregator-internal metadata. It +compares version, hashes, licenses, pedigree.ancestors, and patch +hashes. + +## Attestation and signing + +The build emits an **unsigned** SLSA v1.0 / in-toto v1 provenance at +`target/sonic-.bin.intoto.json` capturing the `.bin` +SHA-256, the `sonic-buildimage` git commit, the active build slave +image digests, the build's external parameters (`PLATFORM`, +`CONFIGURED_ARCH`, `INCLUDE_*`, etc.), and a content-hash reference to +the SBOM. The document is reproducible. + +**No signing happens inside the build.** Two reasons: (1) SONiC's +`SECURE_UPGRADE_*` keys answer a different question ("permitted to +boot on this hardware?"); reusing them for attestation expands their +blast radius; (2) production signing often requires per-invocation +human approval — release engineering needs to batch all artifacts +under one key access in their own toolchain. + +Recommended post-build workflow (operator chooses the tool): + +```bash +# Sigstore cosign +cosign sign-blob --yes --key cosign.key \ + --output-signature target/sonic-broadcom.bin.cdx.json.sig \ + target/sonic-broadcom.bin.cdx.json + +# Or OpenSSL PKCS#7 +openssl cms -sign -binary -in target/sonic-broadcom.bin.cdx.json \ + -signer attestation.crt -inkey attestation.key \ + -outform DER -out target/sonic-broadcom.bin.cdx.json.p7s +``` + +## Vulnerability scanning + +Decoupled from the build by design: the SBOM is reproducible, a CVE +report cannot be (new CVEs are disclosed daily). A six-month-old SBOM +can be re-scanned against today's CVE data without rebuilding. + +Standalone Python scripts, not make targets: + +```bash +# Default report (table + sibling .vuln.json) +python3 scripts/sbom_vuln_scan.py target/sonic-broadcom.bin.cdx.json + +# With VEX suppression and CI gating +python3 scripts/sbom_vuln_scan.py --vex vex/ --fail-on critical \ + target/sonic-broadcom.bin.cdx.json + +# Drift between two reports +python3 scripts/sbom_vuln_diff.py release-202503.vuln.json release-202504.vuln.json +``` + +The scanner (`grype` by default) reads the SBOM directly. Without +VEX, every locally-patched component flags upstream CVEs (since +`pedigree.ancestors` records the unpatched version). VEX suppresses +those that the SONiC patches actually fix. + +The table written to stdout has one row per finding, sorted by +severity descending: + +``` +SEVERITY ID ECOSYS PKG VERSION STATE FIX +------------------------------------------------------------------------------------------------------------ +Critical CVE-2024-3094 deb xz-utils 5.4.1-1 fixed 5.6.1+really5.4.5-1 +Critical CVE-2024-45337 go golang.org/x/crypto v0.24.0 fixed 0.31.0 +Critical CVE-2021-3711 rust openssl-src 111.10.2+1.1.1g fixed 111.16.0 +Critical CVE-2021-44906 npm minimist 1.2.5 fixed 1.2.6 +Critical CVE-2026-7210 py python3.13 3.13.5-2+deb13u2 fixed ... +High CVE-2026-34040 go github.com/docker/docker v28.5.2+incompatible not-fixed - +``` + +`ECOSYS` is derived from the PURL type (`deb`, `rust`, `go`, `npm`, +`py`, `gem`, `java`, `oci`, `github`, `generic`). `FIX` is the +suggested upgrade version when grype's advisory data names one, or +`-` for `not-fixed` advisories. GHSA aliases for CVE-primary findings +are preserved in the sidecar `.cdx.json` as +`vulnerabilities[].references[]` per the CycloneDX 1.6 schema. + +### VEX + +VEX files live in `vex/` as OpenVEX JSON (grype's `--vex` flag +rejects YAML). `vex/README.md` documents the schema, status taxonomy, +and triage workflow. Curated statements live at the top level and are +checked in; the `vex/auto/` subdirectory is **gitignored** and +regenerated on every SBOM build by `scripts/sbom_extract_vex_from_patches.py`, +which scans `src/**/*.patch` for CVE markers and emits `not_affected` +statements per patch-mentioned CVE. The regeneration is wired into +`scripts/build_sbom.sh` so the auto-VEX set always reflects the +current state of `src/*/patches/` — a patch that introduces or +removes a CVE marker is reflected on the very next build. +Re-invocations against an unchanged patch set short-circuit; +changing any tracked patch forces a rescan on the next build. + +```json +{ + "@context": "https://openvex.dev/ns/v0.2.0", + "@id": "https://github.com/sonic-net/sonic-buildimage/vex/", + "author": "", + "timestamp": "", + "version": 1, + "statements": [{ + "vulnerability": {"name": "CVE-YYYY-NNNNN"}, + "products": [{"@id": "pkg:deb/sonic/@"}], + "status": "not_affected", + "justification": "vulnerable_code_not_in_execute_path", + "impact_statement": "Fixed by SONiC patch ", + "references": [""] + }] +} +``` + +Auto-extracted entries use a generic `pkg:generic/` PURL +because the extractor doesn't know which downstream debs the patch +ships in; promoting them to curated files with concrete PURLs +improves suppression rate. + +## Verification + +```bash +# Schema-validate the SBOM +cyclonedx-cli validate --input-file target/sonic-.bin.cdx.json + +# Component count +jq '.components | length' target/sonic-.bin.cdx.json + +# Locally-patched components +jq '.components[] | select(.pedigree.patches) | .name' \ + target/sonic-.bin.cdx.json + +# Components without resolved licenses +jq '.components[] | select(.licenses == null or .licenses == []) | .name' \ + target/sonic-.bin.cdx.json +``` + +## Querying dependencies + +The CycloneDX `dependencies[]` graph supports direct walks without +parsing string properties. The bom-ref of a SONiC-built `.deb` +matches its source identity — `pkg:github/sonic-net/@` +for components built from a sonic-net submodule, +`pkg:deb/sonic/@?arch=` for patched-upstream +Debian sources. + +```bash +SBOM=target/sonic-.bin.cdx.json + +# What does sonic-swss depend on? +# Returns 10 sibling SONiC fragments (libteam-*, libnexthopgroup-*, +# sonic-sairedis, sonic-dash-api, sonic-stp, sonic-swss-common) +# plus every Rust crate linked into swss's binaries (~190 today). +jq --arg ref "pkg:github/sonic-net/sonic-swss@" \ + '.dependencies[] | select(.ref | startswith($ref)) | .dependsOn' \ + "$SBOM" + +# Which .deb ships tokio@1.x ? +# recipe-emit-rust components carry sonic:source_deb=; +# the same attribution is mirrored as a dependsOn edge from the +# .deb to the crate, so either property or graph walk works. +jq '.components[] | select(.purl | startswith("pkg:cargo/tokio@")) | + {name, version, + source_deb: ([.properties[]? | select(.name=="sonic:source_deb") | .value] + | first)}' "$SBOM" + +# Reverse: list every Rust crate that swss ships +jq --arg ref "pkg:github/sonic-net/sonic-swss@" \ + '.dependencies[] | select(.ref | startswith($ref)) | + .dependsOn | map(select(startswith("pkg:cargo/")))' "$SBOM" + +# Same idea for Go modules in sonic-gnmi +jq --arg ref "pkg:github/sonic-net/sonic-gnmi@" \ + '.dependencies[] | select(.ref | startswith($ref)) | + .dependsOn | map(select(startswith("pkg:golang/")))' "$SBOM" + +# What declared build/runtime .deb deps did a recipe make? +# These remain as space-separated string properties for analytics +# that need the build-vs-runtime split (CycloneDX dependencies[] is +# one unscoped graph and doesn't distinguish the two). +jq --arg ref "pkg:github/sonic-net/sonic-swss@" \ + '.components[] | select(.["bom-ref"] | startswith($ref)) | + {build_depends: [.properties[]? | select(.name=="sonic:build_depends") | .value], + runtime_depends: [.properties[]? | select(.name=="sonic:runtime_depends") | .value], + unresolved_deps: [.properties[]? | select(.name=="sonic:unresolved_deps") | .value]}' \ + "$SBOM" + +# Walk the kernel-module → kernel-image edges (out-of-tree modules +# whose runtime ABI is pinned to the kernel) +jq '.dependencies[] + | select(.dependsOn[] | startswith("pkg:deb/sonic/linux-image-")) + | .ref' "$SBOM" + +# Cross-reference: which SONiC .debs declared an unresolvable dep? +# Useful to audit gaps between $(pkg)_DEPENDS declarations and the +# set of recipe-emit fragments we actually produced. +jq '.components[] + | select(.properties[]? | select(.name=="sonic:unresolved_deps")) + | {name, version, + unresolved: ([.properties[] | select(.name=="sonic:unresolved_deps") | .value] | first)}' \ + "$SBOM" +``` + +Tools that understand CycloneDX `dependencies[]` natively work +without any of these `jq` queries — e.g. `cyclonedx-cli analyze`, +or piping the SBOM into a graph visualizer. The examples above +exist for ad-hoc analysis from a shell. + +## Known limitations + +- **Per-.deb language dependency attribution is scoped to SONiC- + built `.debs`.** `scripts/sbom_fragment.py` introspects each + SONiC-built `.deb` and harvests Rust crates (from cargo-auditable + `.dep-v0` ELF sections via `rust-audit-info`), Go modules (from + `runtime/debug.BuildInfo` via `go version -m`), and Python + distributions (from `*.dist-info/METADATA` walk). Components are + scoped at the `.deb` level via `sonic:source_deb`, *not* per-binary + within the `.deb`. Upstream Debian-archive `.debs` are intentionally + out of scope — their language-dep metadata is captured by the syft + scanner pass plus the observation manifests, not by `.deb` + introspection. + +- **`uv pip` skips the `pip3` build-hook shim**, so its installs are + absent from the observation manifest. They still reach the SBOM via + the scanner pass — uv writes standard `dist-info/` directories — but + their `sonic:fragment_kind` property reads `scanner` rather than + `observation`. + +- **Vendored static libraries** statically linked into binaries (a + `.deb` that bundles libcurl instead of dynamic-linking) are + undetectable without source-code scanning. Not closed by this + design. + +- **Pip artifacts lack hashes** from pin time because SONiC's + Python version-control doesn't use `--require-hashes`. The scanner + may compute installation-time hashes from `RECORD` as a best-effort + substitute. + +- **Broadcom XGS SAI** historically used `_SKIP_VERSION=y`. The SBOM + computes SHA-256 of the downloaded artifact independently and + ignores the recipe flag. + +- **Vendor EULA license names** are recorded as declared (e.g., + "Broadcom Inc. proprietary (EULA)") but not normalised to SPDX + expressions, since most are not SPDX-listed. + +## File map + +Files that exist for this design. + +| Path | Role | +|---|---| +| `rules/config` | Defines the four SBOM configuration variables. | +| `Makefile.work` | Threads SBOM variables into the slave-container environment. | +| `slave.mk` | Defines the `sbom_emit_fragment` helper, calls it from each `SONIC_*` artifact recipe, invokes `build_sbom.sh` between rootfs assembly and `.bin` wrap, and exposes the recipe context (installer docker/deb/wheel lists) to the aggregator. | +| `build_image.sh` | Emits the `.cdx.json` sibling after the `.bin` is wrapped. | +| `scripts/install_sbom_tool.sh` | Auto-fetches syft, grype, cyclonedx-cli with SHA-256 verify into `target/sbom-tools/`. | +| `scripts/build_sbom.py` | Aggregator. Walks fragments, runs the scanner, parses lockfiles, resolves licenses, dedupes, builds the CycloneDX `dependencies[]` graph (kernel-module → kernel-image edges, declared `.deb` build/runtime deps, recipe-emit-{rust,go,python} → owning `.deb` edges), and writes the SBOM + SPDX + provenance. | +| `scripts/build_sbom.sh` | Thin shim that execs `build_sbom.py`. | +| `scripts/sbom_fragment.py` | Per-recipe fragment generator. Knows the four ancestor patterns, the vendor-supplier URL table, and the per-`.deb` language-dep harvesters (Rust via `rust-audit-info`, Go via `go version -m`, Python via `*.dist-info/METADATA` walk). | +| `scripts/sbom_resolve_licenses.py` | DEP-5 parser + licensecheck fallback + SPDX translation. | +| `scripts/sbom_license_map.json` | ~100 Debian License header strings mapped to SPDX. | +| `scripts/sbom_parse_lockfiles.py` | Parses `go.sum`, `package-lock.json`, `pnpm-lock.yaml`, `yarn.lock` from harvested archives. Also parses `Cargo.lock` defensively for legacy archives — but Rust attribution comes from `sbom_fragment.py`'s `.dep-v0` introspection, not from this parser. | +| `scripts/sbom_emit_provenance.py` | Emits the unsigned SLSA v1.0 / in-toto provenance document. | +| `scripts/sbom_diff.py` | Reproducibility comparison between two SBOMs. | +| `scripts/sbom_vuln_scan.py` | Standalone CVE scanner (invokes grype, applies VEX). | +| `scripts/sbom_vuln_diff.py` | Standalone drift analysis between two vuln reports. | +| `scripts/sbom_extract_vex_from_patches.py` | Auto-VEX from CVE markers in patch metadata. | +| `vex/` | OpenVEX statements (curated at top level, auto in `vex/auto/`). | +| `vex/README.md` | VEX schema and triage workflow. | +| `src/sonic-build-hooks/scripts/collect_version_files` | Extended to harvest `copyrights.tar.gz` and `lockfiles.tar.gz` per scope when `ENABLE_SBOM=y`. | +| `scripts/prepare_docker_buildinfo.sh` | Injects `ENV ENABLE_SBOM` into each container's Dockerfile so the harvest hook sees the right value at install time. | diff --git a/ThirdPartyLicenses.txt b/ThirdPartyLicenses.txt index f0fab67246e..22f96ad4cfc 100644 --- a/ThirdPartyLicenses.txt +++ b/ThirdPartyLicenses.txt @@ -978,7 +978,6 @@ Microsoft is offering you a license to use the following components, to the exte */ 4. apt-clean, apt-gzip-indexes, apt-no-languages imported from docker v1.11.1 -5. gnoic imported from https://github.com/karimra/gnoic using Apache License 2.0 /* * Apache License * Version 2.0, January 2004 diff --git a/azure-pipelines.yml b/azure-pipelines.yml index f07a8969d06..21d68808a1f 100644 --- a/azure-pipelines.yml +++ b/azure-pipelines.yml @@ -73,6 +73,12 @@ stages: jobGroups: - name: vpp continueOnError: true + - template: .azure-pipelines/azure-pipelines-build.yml + parameters: + buildOptions: 'USERNAME=admin SONIC_BUILD_JOBS=2 ${{ variables.VERSION_CONTROL_OPTIONS }}' + jobGroups: + - name: alpinevs + continueOnError: true - stage: Build pool: sonicso1ES-amd64 @@ -111,6 +117,11 @@ stages: pool: sonicso1ES-arm64 variables: PLATFORM_ARCH: arm64 + - name: aspeed-arm64 + pool: sonicso1ES-arm64 + variables: + PLATFORM_NAME: aspeed + PLATFORM_ARCH: arm64 - stage: Test dependsOn: BuildVS @@ -122,7 +133,9 @@ stages: - name: testbed_file value: vtestbed.csv - name: PTF_MODIFIED - value: $[ coalesce(stageDependencies.BuildVS.vs.outputs['PublishAndSetPtfTag.PTF_MODIFIED'], stageDependencies.BuildVS.vs.outputs['script.PTF_MODIFIED'], stageDependencies.BuildVS.vs.outputs['script1.PTF_MODIFIED'], 'False') ] + # $[ coalesce(stageDependencies.BuildVS.vs.outputs['PublishAndSetPtfTag.PTF_MODIFIED'], stageDependencies.BuildVS.vs.outputs['script.PTF_MODIFIED'], stageDependencies.BuildVS.vs.outputs['script1.PTF_MODIFIED'], 'False') ] + # Disable in-PR testing of docker-ptf image; To be re-enabled after image can be uploaded to approved ACR + value: 'False' # For every test job: # continueOnError: false means it's a required test job and will block merge if it fails @@ -208,5 +221,125 @@ stages: - template: .azure-pipelines/pr_test_template.yml@sonic-mgmt parameters: CHECKOUT_SONIC_MGMT: ${{ parameters.CHECKOUT_SONIC_MGMT }} - GLOBAL_PARAMS: - PTF_MODIFIED: $(PTF_MODIFIED) + PTF_MODIFIED: $(PTF_MODIFIED) + +# Unified SBOM-based vulnerability scan — informational, runs after +# both build stages so every CycloneDX SBOM produced is in scope. +# Lives in its own stage (not inside Test) because the Test stage +# dependsOn BuildVS only — putting the scan there meant the .bin +# SBOMs from the Build stage (broadcom, mellanox, etc.) hadn't been +# uploaded as artifacts yet when the scan ran. VulnScan dependsOn +# BuildVS + Build so the scan only fires once every *.cdx.json +# sidecar this pipeline produces is on the artifact server. +# +# Runs after Test (rather than in parallel with it) is fine — this +# is non-gating telemetry, and putting it in its own stage avoids +# duplicating the Test stage's KVM-test machinery just to add deps. +# +# docker-sonic-mgmt is scanned by its own pipeline +# (.azure-pipelines/docker-sonic-mgmt.yml) and is intentionally out +# of scope here: the main pipeline never builds it, so there is no +# docker-sonic-mgmt.gz.sbom.cdx.json artifact for this scan to +# consume. The scan step logs a one-line pointer to the other +# pipeline so readers don't wonder why ptf is listed and mgmt isn't. +- stage: VulnScan + displayName: "Vuln Scan" + dependsOn: + - BuildVS + - Build + # Disabled for now; remove this `condition: false` (or change to + # `not(canceled())`) to re-enable the SBOM-based vulnerability + # scan stage. The SBOM artifacts themselves continue to be + # produced when ENABLE_SBOM=y — only the post-build scan is gated. + condition: false + jobs: + - job: sbom_vuln_scan + displayName: "[OPTIONAL] SBOM-based vulnerability scan (all artifacts)" + pool: sonic-ubuntu-1c + continueOnError: true + timeoutInMinutes: 60 + steps: + - checkout: self + clean: true + fetchDepth: 1 + - task: DownloadPipelineArtifact@2 + inputs: + # Narrow to aggregate SBOMs only: the top-level installer + # (sonic-.bin / .swi / .img.gz) and the standalone + # test-container SBOMs (docker-*.gz.sbom.cdx.json — note the + # .sbom. infix that distinguishes them from per-container + # recipe fragments). The recipe-emit fragments under + # target/debs/, target/python-wheels/, and target/docker-*.gz.cdx.json + # are build-internal plumbing; scanning them duplicates work + # already done by the .bin aggregate scan. + patterns: | + **/target/sonic-*.bin.cdx.json + **/target/sonic-*.swi.cdx.json + **/target/sonic-*.img.gz.cdx.json + **/target/docker-*.gz.sbom.cdx.json + displayName: "Download aggregate SBOM sidecars" + - script: | + set -ex + sudo apt-get install -y python3-pip jq + displayName: "Install dependencies" + - script: | + set +e + OVERALL_RC=0 + FOUND=0 + mkdir -p $(Build.ArtifactStagingDirectory)/sbom-vuln + shopt -s nullglob globstar + # Note for log readers: docker-sonic-mgmt is built and scanned + # in its own pipeline (.azure-pipelines/docker-sonic-mgmt.yml). + # Its vuln report lives there as the sbom-vuln-scan-results + # artifact of that pipeline's runs. That's why ptf appears + # below but mgmt does not. + echo "Note: docker-sonic-mgmt is scanned in .azure-pipelines/docker-sonic-mgmt.yml; not built in this pipeline." + echo "" + # Walk only the aggregate SBOMs at the top of each artifact's + # target/ directory. Recipe fragments under target/debs/ or + # target/python-wheels/ are not matched by these patterns. + for sbom in \ + $(Pipeline.Workspace)/*/target/sonic-*.bin.cdx.json \ + $(Pipeline.Workspace)/*/target/sonic-*.swi.cdx.json \ + $(Pipeline.Workspace)/*/target/sonic-*.img.gz.cdx.json \ + $(Pipeline.Workspace)/*/target/docker-*.gz.sbom.cdx.json + do + FOUND=$((FOUND+1)) + # Derive a short name for this scan's outputs. Test-container + # SBOMs include a `.sbom` infix on disk (e.g. docker-ptf.gz.sbom.cdx.json) + # to distinguish them from per-container recipe fragments + # (docker-ptf.gz.cdx.json); strip it so the per-artifact + # output names match the underlying artifact extension: + # sonic-broadcom.bin.cdx.json -> sonic-broadcom.bin{.txt,.cdx.json} + # docker-ptf.gz.sbom.cdx.json -> docker-ptf.gz{.txt,.cdx.json} + name=$(basename "$sbom" .cdx.json) + name="${name%.sbom}" + # Azure Pipelines log-folding directive — wrap each SBOM's + # output so the log view shows a collapsible section per + # scan rather than one giant concatenated stream. + echo "##[group]SBOM vuln scan: $name" + python3 scripts/sbom_vuln_scan.py \ + --vex vex \ + --min-severity medium \ + --fail-on medium \ + --format both \ + --output "$(Build.ArtifactStagingDirectory)/sbom-vuln/${name}.cdx.json" \ + "$sbom" \ + | tee "$(Build.ArtifactStagingDirectory)/sbom-vuln/${name}.txt" + RC=${PIPESTATUS[0]} + if [ "$RC" != "0" ]; then OVERALL_RC=$RC; fi + echo "##[endgroup]" + done + if [ "$FOUND" = "0" ]; then + echo "::error::No SBOM files found under $(Pipeline.Workspace) — were the build stages invoked with ENABLE_SBOM=y?" + exit 1 + fi + echo "" + echo "=== SBOM vulnerability scan: $FOUND SBOM(s) scanned ===" + exit $OVERALL_RC + displayName: "SBOM vulnerability scan (all artifacts)" + - publish: $(Build.ArtifactStagingDirectory)/sbom-vuln + artifact: sbom-vuln-scan-results + displayName: "Publish SBOM vuln-scan results" + condition: always() + continueOnError: true diff --git a/build_debian.sh b/build_debian.sh index b0395ca0637..e91cd08d77a 100755 --- a/build_debian.sh +++ b/build_debian.sh @@ -16,11 +16,7 @@ exit 1 } -## Password for the default user -[ -n "$PASSWORD" ] || { - echo "Error: no or empty PASSWORD" - exit 1 -} +## Password for the default user (empty is allowed; means no password on console, SSH blocked) ## Include common functions . functions.sh @@ -31,8 +27,8 @@ set -x -e CONFIGURED_ARCH=$([ -f .arch ] && cat .arch || echo amd64) ## docker engine version (with platform) -DOCKER_VERSION=5:28.2.2-1~debian.13~$IMAGE_DISTRO -CONTAINERD_IO_VERSION=1.7.27-1 +DOCKER_VERSION=5:28.5.2-1~debian.13~$IMAGE_DISTRO +CONTAINERD_IO_VERSION=1.7.28-2~debian.13~$IMAGE_DISTRO LINUX_KERNEL_VERSION=6.12.41+deb13 ## Working directory to prepare the file system @@ -120,8 +116,7 @@ sudo LANG=C chroot $FILESYSTEM_ROOT mount ## Pointing apt to public apt mirrors and getting latest packages, needed for latest security updates scripts/build_mirror_config.sh files/apt $CONFIGURED_ARCH $IMAGE_DISTRO sudo cp files/apt/sources.list.$CONFIGURED_ARCH $FILESYSTEM_ROOT/etc/apt/sources.list -sudo cp files/apt/apt-retries-count $FILESYSTEM_ROOT/etc/apt/apt.conf.d/ -sudo cp files/apt/apt.conf.d/{81norecommends,apt-{clean,gzip-indexes,no-languages},no-check-valid-until} $FILESYSTEM_ROOT/etc/apt/apt.conf.d/ +sudo cp files/apt/apt.conf.d/{81norecommends,apt-{clean,gzip-indexes,no-languages,timeout-n-retries},no-check-valid-until} $FILESYSTEM_ROOT/etc/apt/apt.conf.d/ ## Note: set lang to prevent locale warnings in your chroot sudo LANG=C chroot $FILESYSTEM_ROOT apt-get -y update @@ -165,15 +160,14 @@ fi ## Update initramfs for booting with squashfs+overlay cat files/initramfs-tools/modules | sudo tee -a $FILESYSTEM_ROOT/etc/initramfs-tools/modules > /dev/null -## Install kbuild for sign-file into docker image (not fsroot) -sudo LANG=C DEBIAN_FRONTEND=noninteractive apt -y --allow-downgrades install ./$debs_path/linux-kbuild-${LINUX_KERNEL_VERSION}*_${CONFIGURED_ARCH}.deb - ## Hook into initramfs: change fs type from vfat to ext4 on arista switches sudo mkdir -p $FILESYSTEM_ROOT/etc/initramfs-tools/scripts/init-premount/ sudo cp files/initramfs-tools/arista-convertfs $FILESYSTEM_ROOT/etc/initramfs-tools/scripts/init-premount/arista-convertfs sudo chmod +x $FILESYSTEM_ROOT/etc/initramfs-tools/scripts/init-premount/arista-convertfs sudo cp files/initramfs-tools/arista-hook $FILESYSTEM_ROOT/etc/initramfs-tools/scripts/init-premount/arista-hook sudo chmod +x $FILESYSTEM_ROOT/etc/initramfs-tools/scripts/init-premount/arista-hook +sudo cp files/initramfs-tools/arista-wait-blockdev $FILESYSTEM_ROOT/etc/initramfs-tools/scripts/init-premount/arista-wait-blockdev +sudo chmod +x $FILESYSTEM_ROOT/etc/initramfs-tools/scripts/init-premount/arista-wait-blockdev sudo cp files/initramfs-tools/mke2fs $FILESYSTEM_ROOT/etc/initramfs-tools/hooks/mke2fs sudo chmod +x $FILESYSTEM_ROOT/etc/initramfs-tools/hooks/mke2fs sudo cp files/initramfs-tools/setfacl $FILESYSTEM_ROOT/etc/initramfs-tools/hooks/setfacl @@ -202,6 +196,8 @@ sudo cp files/initramfs-tools/union-mount $FILESYSTEM_ROOT/etc/initramfs-tools/s sudo chmod +x $FILESYSTEM_ROOT/etc/initramfs-tools/scripts/init-bottom/union-mount sudo cp files/initramfs-tools/varlog $FILESYSTEM_ROOT/etc/initramfs-tools/scripts/init-bottom/varlog sudo chmod +x $FILESYSTEM_ROOT/etc/initramfs-tools/scripts/init-bottom/varlog +sudo cp files/initramfs-tools/swi2bin $FILESYSTEM_ROOT/etc/initramfs-tools/scripts/init-bottom/swi2bin +sudo chmod +x $FILESYSTEM_ROOT/etc/initramfs-tools/scripts/init-bottom/swi2bin # Management interface (eth0) dhcp can be optionally turned off (during a migration from another NOS to SONiC) #sudo cp files/initramfs-tools/mgmt-intf-dhcp $FILESYSTEM_ROOT/etc/initramfs-tools/scripts/init-bottom/mgmt-intf-dhcp #sudo chmod +x $FILESYSTEM_ROOT/etc/initramfs-tools/scripts/init-bottom/mgmt-intf-dhcp @@ -244,7 +240,7 @@ sudo LANG=C chroot $FILESYSTEM_ROOT apt-get -y install docker-ce=${DOCKER_VERSIO install_kubernetes () { local ver="$1" ## Install k8s package from storage - local storage_prefix="https://packages.trafficmanager.net/public/kubernetes" + local storage_prefix="$BUILD_PUBLIC_URL/kubernetes" sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT curl -o /tmp/cri-tools.deb -fsSL \ ${storage_prefix}/cri-tools_${KUBERNETES_CRI_TOOLS_VERSION}_${CONFIGURED_ARCH}.deb sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT curl -o /tmp/kubernetes-cni.deb -fsSL \ @@ -297,7 +293,12 @@ sudo cp files/docker/docker.service.conf $_ ## Note: user should be in the group with the same name, and also in sudo/docker/redis groups sudo LANG=C chroot $FILESYSTEM_ROOT useradd -G sudo,docker $USERNAME -c "$DEFAULT_USERINFO" -m -s /bin/bash ## Create password for the default user -echo "$USERNAME:$PASSWORD" | sudo LANG=C chroot $FILESYSTEM_ROOT chpasswd +## If PASSWORD is empty, delete the password (console login works, SSH blocked by PermitEmptyPasswords no) +if [ -n "$PASSWORD" ]; then + echo "$USERNAME:$PASSWORD" | sudo LANG=C chroot $FILESYSTEM_ROOT chpasswd +else + sudo LANG=C chroot $FILESYSTEM_ROOT passwd -d $USERNAME +fi ## Create redis group sudo LANG=C chroot $FILESYSTEM_ROOT groupadd -f redis @@ -324,6 +325,7 @@ sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y in isc-dhcp-client \ sudo \ vim \ + bash-completion \ tcpdump \ dbus \ openssh-server \ @@ -353,6 +355,7 @@ sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y in squashfs-tools \ $bootloader_packages \ rsyslog \ + rsyslog-relp \ screen \ hping3 \ tcptraceroute \ @@ -360,22 +363,20 @@ sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y in locales \ cgroup-tools \ ipmitool \ + freeipmi-tools \ ndisc6 \ - makedumpfile \ conntrack \ python3 \ python3-pip \ python-is-python3 \ cron \ - libprotobuf32t64 \ - libgrpc29t64 \ - libgrpc++1.51t64 \ haveged \ gpg \ dmidecode \ jq \ auditd \ linux-perf \ + util-linux-extra \ resolvconf \ lsof \ sysstat \ @@ -419,7 +420,7 @@ sudo LANG=C chroot $FILESYSTEM_ROOT /bin/bash -c "echo 'MODULES=most' >> /etc/in sudo mkdir -p /etc/initramfs-tools/scripts/init-premount sudo mkdir -p /etc/initramfs-tools/hooks -# Copy the network setup scriptgit +# Copy the network setup script sudo cp files/scripts/network_setup.sh /etc/initramfs-tools/scripts/init-premount/network_setup.sh # Copy the hook file @@ -452,12 +453,14 @@ if [[ $TARGET_BOOTLOADER == grub ]]; then ( cd $FILESYSTEM_ROOT; sudo rm -f $basename_deb_packages ) if [[ $CONFIGURED_ARCH == amd64 ]]; then - GRUB_PKG=grub-pc-bin + GRUB_PKGS='grub-efi-amd64-bin grub-pc-bin' elif [[ $CONFIGURED_ARCH == arm64 ]]; then - GRUB_PKG=grub-efi-arm64-bin + GRUB_PKGS=grub-efi-arm64-bin fi - sudo cp $debs_path/${GRUB_PKG}*.deb $FILESYSTEM_ROOT/$PLATFORM_DIR/grub + for grub_pkg in $GRUB_PKGS; do + sudo cp $debs_path/${grub_pkg}*.deb $FILESYSTEM_ROOT/$PLATFORM_DIR/grub + done fi ## Disable kexec supported reboot which was installed by default @@ -472,9 +475,17 @@ sudo rm -f $FILESYSTEM_ROOT/etc/ssh/ssh_host_*_key* sudo cp files/sshd/host-ssh-keygen.sh $FILESYSTEM_ROOT/usr/local/bin/ sudo mkdir $FILESYSTEM_ROOT/etc/systemd/system/ssh.service.d sudo cp files/sshd/override.conf $FILESYSTEM_ROOT/etc/systemd/system/ssh.service.d/override.conf + +# Mask systemd-ssh-generator: SONiC manages ssh.service directly and does not +# use the per-socket / AF_VSOCK units this generator creates. Starting with +# systemd 257.13 the generator exits non-zero on SONiC hosts, which pollutes +# syslog with an ERR-level message and trips loganalyzer in test runs. +# An /etc/ override pointing to /dev/null tells systemd to skip the generator. +sudo mkdir -p $FILESYSTEM_ROOT/etc/systemd/system-generators +sudo ln -sf /dev/null $FILESYSTEM_ROOT/etc/systemd/system-generators/systemd-ssh-generator # Config sshd # 1. Set 'UseDNS' to 'no' -# 2. Configure sshd to close all SSH connetions after 15 minutes of inactivity +# 2. Configure sshd to close all SSH connections after 15 minutes of inactivity sudo augtool -r $FILESYSTEM_ROOT <<'EOF' touch /files/etc/ssh/sshd_config/EmptyLineHack rename /files/etc/ssh/sshd_config/EmptyLineHack "" @@ -496,6 +507,14 @@ rm /files/etc/ssh/sshd_config/Banner set /files/etc/ssh/sshd_config/Banner /etc/issue rm /files/etc/ssh/sshd_config/LogLevel set /files/etc/ssh/sshd_config/LogLevel VERBOSE +rm /files/etc/ssh/sshd_config/PermitEmptyPasswords +set /files/etc/ssh/sshd_config/PermitEmptyPasswords no +ins #comment before /files/etc/ssh/sshd_config/PermitEmptyPasswords +set /files/etc/ssh/sshd_config/#comment[following-sibling::*[1][self::PermitEmptyPasswords]] "Deny SSH login with empty password; use console to set a real password first" +rm /files/etc/ssh/sshd_config/AllowAgentForwarding +set /files/etc/ssh/sshd_config/AllowAgentForwarding no +ins #comment before /files/etc/ssh/sshd_config/AllowAgentForwarding +set /files/etc/ssh/sshd_config/#comment[following-sibling::*[1][self::AllowAgentForwarding]] "Disable SSH agent forwarding - not required for SONiC operation" save quit EOF @@ -530,7 +549,7 @@ sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT pip3 install 'docke # Install scapy sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install python3-scapy -## Note: keep pip installed for maintainance purpose +## Note: keep pip installed for maintenance purpose # Install GCC, needed for building/installing some Python packages sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install gcc @@ -574,6 +593,19 @@ j2 files/build_templates/bmc_config.json.j2 | sudo tee $FILESYSTEM_ROOT/etc/soni sudo LANG=c chroot $FILESYSTEM_ROOT chmod 644 /etc/sonic/bmc_config.json sudo LANG=c chroot $FILESYSTEM_ROOT chown root:root /etc/sonic/bmc_config.json +# SED TPM bank addresses (platform-specific) +if [[ $CONFIGURED_PLATFORM == mellanox ]]; then + export sed_tpm_bank_a="0x81010001" + export sed_tpm_bank_b="0x81010002" +fi + +# Generate /etc/sonic/sed_config.conf when SED TPM bank addresses were set +if [ -n "$sed_tpm_bank_a" ] && [ -n "$sed_tpm_bank_b" ]; then + j2 files/build_templates/sed_config.conf.j2 | sudo tee $FILESYSTEM_ROOT/etc/sonic/sed_config.conf + sudo LANG=c chroot $FILESYSTEM_ROOT chmod 644 /etc/sonic/sed_config.conf + sudo LANG=c chroot $FILESYSTEM_ROOT chown root:root /etc/sonic/sed_config.conf +fi + ## Copy over clean-up script sudo cp ./files/scripts/core_cleanup.py $FILESYSTEM_ROOT/usr/bin/core_cleanup.py @@ -689,7 +721,7 @@ if [[ $SECURE_UPGRADE_MODE == 'dev' || $SECURE_UPGRADE_MODE == "prod" ]]; then sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt -y --allow-downgrades install $basename_deb_packages sudo rm $FILESYSTEM_ROOT/grub-efi*.deb - # debian secure boot dependecies + # debian secure boot dependencies sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install \ shim-unsigned @@ -749,12 +781,12 @@ if [[ $TARGET_BOOTLOADER == uboot ]]; then sudo LANG=C chroot $FILESYSTEM_ROOT mkimage -A arm -O linux -T ramdisk -C gzip -d /boot/$INITRD_FILE /boot/u${INITRD_FILE} ## Overwriting the initrd image with uInitrd sudo LANG=C chroot $FILESYSTEM_ROOT mv /boot/u${INITRD_FILE} /boot/$INITRD_FILE - elif [[ $CONFIGURED_ARCH == arm64 ]]; then + elif [[ $CONFIGURED_ARCH == arm64 && $CONFIGURED_PLATFORM != nokia-vs ]]; then if [[ $CONFIGURED_PLATFORM == pensando ]]; then ## copy device tree file into boot (XXX: need to compile dtb from dts) - sudo cp -v $FILESYSTEM_ROOT/usr/lib/linux-image-${LINUX_KERNEL_VERSION}-${CONFIGURED_ARCH}/pensando/elba-asic-psci.dtb $FILESYSTEM_ROOT/boot/ - sudo cp -v $FILESYSTEM_ROOT/usr/lib/linux-image-${LINUX_KERNEL_VERSION}-${CONFIGURED_ARCH}/pensando/elba-asic-psci-lipari.dtb $FILESYSTEM_ROOT/boot/ - sudo cp -v $FILESYSTEM_ROOT/usr/lib/linux-image-${LINUX_KERNEL_VERSION}-${CONFIGURED_ARCH}/pensando/elba-asic-psci-mtfuji.dtb $FILESYSTEM_ROOT/boot/ + sudo cp -v $FILESYSTEM_ROOT/usr/lib/linux-image-${LINUX_KERNEL_VERSION}-sonic-${CONFIGURED_ARCH}/pensando/elba-asic-psci.dtb $FILESYSTEM_ROOT/boot/ + sudo cp -v $FILESYSTEM_ROOT/usr/lib/linux-image-${LINUX_KERNEL_VERSION}-sonic-${CONFIGURED_ARCH}/pensando/elba-asic-psci-lipari.dtb $FILESYSTEM_ROOT/boot/ + sudo cp -v $FILESYSTEM_ROOT/usr/lib/linux-image-${LINUX_KERNEL_VERSION}-sonic-${CONFIGURED_ARCH}/pensando/elba-asic-psci-mtfuji.dtb $FILESYSTEM_ROOT/boot/ sudo cp -v $PLATFORM_DIR/pensando/install_file $FILESYSTEM_ROOT/boot/ ## make kernel as gzip file sudo LANG=C chroot $FILESYSTEM_ROOT gzip /boot/${KERNEL_FILE} @@ -764,7 +796,43 @@ if [[ $TARGET_BOOTLOADER == uboot ]]; then ## Overwriting the initrd image with uInitrd sudo LANG=C chroot $FILESYSTEM_ROOT mv /boot/u${INITRD_FILE} /boot/$INITRD_FILE else - sudo cp -v $PLATFORM_DIR/$CONFIGURED_PLATFORM/sonic_fit.its $FILESYSTEM_ROOT/boot/ + # Check if sonic_fit.its uses placeholders (template-based) + if grep -q "__KERNEL_VERSION__\|__KERNEL_PATH__" $PLATFORM_DIR/$CONFIGURED_PLATFORM/sonic_fit.its 2>/dev/null; then + # Generate sonic_fit.its with actual kernel version + # Detect the actual installed kernel version from the filesystem + # The kernel package may have a different version suffix than LINUX_KERNEL_VERSION + KERNEL_FILE=$(ls $FILESYSTEM_ROOT/boot/vmlinuz-* 2>/dev/null | head -1) + if [ -z "$KERNEL_FILE" ]; then + echo "Error: No kernel found in $FILESYSTEM_ROOT/boot/" + exit 1 + fi + KERNEL_VERSION_FULL=$(basename "$KERNEL_FILE" | sed 's/^vmlinuz-//') + + # Replace placeholders with actual paths + KERNEL_PATH="/boot/vmlinuz-${KERNEL_VERSION_FULL}" + INITRD_PATH="/boot/initrd.img-${KERNEL_VERSION_FULL}" + + # For aspeed platform, construct DTB directory path + # The FIT image template contains multiple DTBs, we only substitute the directory path + if [[ $CONFIGURED_PLATFORM == aspeed ]]; then + DTB_DIR_PATH="/usr/lib/linux-image-${KERNEL_VERSION_FULL}/aspeed" + else + DTB_DIR_PATH="/usr/lib/linux-image-${KERNEL_VERSION_FULL}/${CONFIGURED_PLATFORM}" + fi + + # Substitute placeholders in sonic_fit.its template + sed -e "s|__KERNEL_PATH__|${KERNEL_PATH}|g" \ + -e "s|__INITRD_PATH__|${INITRD_PATH}|g" \ + -e "s|__DTB_PATH_ASPEED__|${DTB_DIR_PATH}|g" \ + $PLATFORM_DIR/$CONFIGURED_PLATFORM/sonic_fit.its > /tmp/sonic_fit.its.tmp + + sudo cp -v /tmp/sonic_fit.its.tmp $FILESYSTEM_ROOT/boot/sonic_fit.its + rm -f /tmp/sonic_fit.its.tmp + else + # Platform uses hardcoded paths - copy as-is + sudo cp -v $PLATFORM_DIR/$CONFIGURED_PLATFORM/sonic_fit.its $FILESYSTEM_ROOT/boot/ + fi + sudo LANG=C chroot $FILESYSTEM_ROOT mkimage -f /boot/sonic_fit.its /boot/sonic_${CONFIGURED_ARCH}.fit fi fi @@ -775,6 +843,12 @@ SONIC_VERSION_CACHE=${SONIC_VERSION_CACHE} \ DBGOPT="${DBGOPT}" \ scripts/collect_host_image_version_files.sh $CONFIGURED_ARCH $IMAGE_DISTRO $TARGET_PATH $FILESYSTEM_ROOT +# SBOM license harvest happens uniformly via the per-scope +# collect_version_files hook (see src/sonic-build-hooks/scripts/collect_version_files). +# That runs inside the chroot via post_run_buildinfo (line 21 of +# collect_host_image_version_files.sh) before /usr/share/doc/* is wiped +# below at line ~838. + # Remove GCC sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y remove gcc @@ -808,7 +882,7 @@ sudo mkdir $FILESYSTEM_ROOT/host if [[ "$CHANGE_DEFAULT_PASSWORD" == "y" ]]; then - ## Expire default password for exitsing users that can do login + ## Expire default password for existing users that can do login default_users=$(cat $FILESYSTEM_ROOT/etc/passwd | grep "/home"| grep ":/bin/bash\|:/bin/sh" | awk -F ":" '{print $1}' 2> /dev/null) for user in $default_users do @@ -826,8 +900,6 @@ sudo mkdir -p $FILESYSTEM_ROOT/var/lib/docker ## Clear DNS configuration inherited from the build server sudo rm -f $FILESYSTEM_ROOT/etc/resolvconf/resolv.conf.d/original sudo cp files/image_config/resolv-config/resolv.conf.head $FILESYSTEM_ROOT/etc/resolvconf/resolv.conf.d/head -sudo rm -f $FILESYSTEM_ROOT/etc/resolv.conf -sudo touch $FILESYSTEM_ROOT/etc/resolv.conf ## Optimize filesystem size if [ "$BUILD_REDUCE_IMAGE_SIZE" = "y" ]; then diff --git a/build_debug_docker_j2.sh b/build_debug_docker_j2.sh index 7227b5f6f0d..22f67c14c59 100755 --- a/build_debug_docker_j2.sh +++ b/build_debug_docker_j2.sh @@ -18,12 +18,12 @@ debs/{{ deb }}{{' '}} {%- endfor -%} debs/ -RUN apt update +RUN apt-get update RUN dpkg -i \ {% for deb in $2.split(' ') -%} debs/{{ deb }}{{' '}} -{%- endfor %} || apt -y install -f --no-remove +{%- endfor %} || apt-get -y install -f --no-remove {% endif %} {% endif %} diff --git a/build_image.sh b/build_image.sh index 687de0db624..07ba04998a1 100755 --- a/build_image.sh +++ b/build_image.sh @@ -174,7 +174,7 @@ elif [ "$IMAGE_TYPE" = "kvm" ]; then # Generate single asic KVM image generate_kvm_image if [ "$BUILD_MULTIASIC_KVM" == "y" ]; then - # Genrate 4-asic KVM image + # Generate 4-asic KVM image generate_kvm_image 4 # Generate 6-asic KVM image generate_kvm_image 6 diff --git a/platform/broadcom/saibcm-modules/GFILE b/device/arista/arm64-arista_goldfinch-r0/99-switchCpu.rules similarity index 100% rename from platform/broadcom/saibcm-modules/GFILE rename to device/arista/arm64-arista_goldfinch-r0/99-switchCpu.rules diff --git a/device/arista/arm64-arista_goldfinch-r0/asic.conf b/device/arista/arm64-arista_goldfinch-r0/asic.conf new file mode 100644 index 00000000000..58c5d5348bb --- /dev/null +++ b/device/arista/arm64-arista_goldfinch-r0/asic.conf @@ -0,0 +1 @@ +NUM_ASIC=1 diff --git a/device/arista/arm64-arista_goldfinch-r0/default_sku b/device/arista/arm64-arista_goldfinch-r0/default_sku new file mode 100644 index 00000000000..5d606b9b2a5 --- /dev/null +++ b/device/arista/arm64-arista_goldfinch-r0/default_sku @@ -0,0 +1 @@ +Arista-Goldfinch empty diff --git a/device/arista/arm64-arista_goldfinch-r0/installer.conf b/device/arista/arm64-arista_goldfinch-r0/installer.conf new file mode 100644 index 00000000000..5e7af2709b5 --- /dev/null +++ b/device/arista/arm64-arista_goldfinch-r0/installer.conf @@ -0,0 +1,13 @@ +# Console configuration for AST2720 platform +# CONSOLE_DEV=12 means ttyS12 +CONSOLE_DEV=12 +CONSOLE_SPEED=115200 + +# Early console for debugging (UART12 on AST2720) +EARLYCON="earlycon=uart8250,mmio32,0x14c33b00" + +# Variable log size (MB) +VAR_LOG_SIZE=512 + +# Additional kernel command line arguments +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="" diff --git a/device/arista/arm64-arista_goldfinch-r0/platform.json b/device/arista/arm64-arista_goldfinch-r0/platform.json new file mode 100644 index 00000000000..11f3d47f1ee --- /dev/null +++ b/device/arista/arm64-arista_goldfinch-r0/platform.json @@ -0,0 +1,17 @@ +{ + "chassis": { + "name": "Goldfinch", + "thermal_manager": false, + "status_led": {}, + "components": [ + { + "name": "BIOS" + } + ], + "fans": [], + "psus": [], + "thermals": [], + "sfps": [] + }, + "interfaces": {} +} diff --git a/device/arista/arm64-arista_goldfinch-r0/platform_asic b/device/arista/arm64-arista_goldfinch-r0/platform_asic new file mode 100644 index 00000000000..708a833cb62 --- /dev/null +++ b/device/arista/arm64-arista_goldfinch-r0/platform_asic @@ -0,0 +1 @@ +aspeed \ No newline at end of file diff --git a/device/arista/arm64-arista_goldfinch-r0/platform_components.json b/device/arista/arm64-arista_goldfinch-r0/platform_components.json new file mode 100644 index 00000000000..9727bf58b23 --- /dev/null +++ b/device/arista/arm64-arista_goldfinch-r0/platform_components.json @@ -0,0 +1,9 @@ +{ + "chassis": { + "Goldfinch": { + "component": { + "BIOS": {} + } + } + } +} diff --git a/device/arista/arm64-arista_goldfinch-r0/platform_env.conf b/device/arista/arm64-arista_goldfinch-r0/platform_env.conf new file mode 100644 index 00000000000..b7947ba31fb --- /dev/null +++ b/device/arista/arm64-arista_goldfinch-r0/platform_env.conf @@ -0,0 +1,2 @@ +# BMC platform environment +switch_bmc=1 diff --git a/device/arista/arm64-arista_goldfinch-r0/pmon_daemon_control.json b/device/arista/arm64-arista_goldfinch-r0/pmon_daemon_control.json new file mode 100644 index 00000000000..28d11f93f94 --- /dev/null +++ b/device/arista/arm64-arista_goldfinch-r0/pmon_daemon_control.json @@ -0,0 +1,19 @@ +{ + "skip_thermalctld": false, + "skip_ledd": true, + "skip_xcvrd": true, + "skip_psud": true, + "skip_syseepromd": false, + "skip_pcied": true, + "skip_chassisd": true, + "skip_fancontrol": true, + "include_sensormond": false, + "thermalctld": { + "thermal_monitor_initial_interval": 5, + "thermal_monitor_update_interval": 60, + "thermal_monitor_update_elapsed_threshold": 30, + "enable_liquid_cooling": true, + "liquid_cooling_update_interval": 0.5 + } +} + diff --git a/platform/broadcom/saibcm-modules/GFILES b/device/arista/arm64-arista_goldfinch-r0/switch_cpu_console.conf similarity index 100% rename from platform/broadcom/saibcm-modules/GFILES rename to device/arista/arm64-arista_goldfinch-r0/switch_cpu_console.conf diff --git a/device/arista/arm64-arista_goldfinch-r0/system_health_monitoring_config.json b/device/arista/arm64-arista_goldfinch-r0/system_health_monitoring_config.json new file mode 100644 index 00000000000..cba7bcd72d8 --- /dev/null +++ b/device/arista/arm64-arista_goldfinch-r0/system_health_monitoring_config.json @@ -0,0 +1,7 @@ +{ + "services_to_ignore": [], + "devices_to_ignore": ["psu", "fan", "asic"], + "user_defined_checkers": [], + "polling_interval": 300 +} + diff --git a/device/arista/arm64-arista_goldfinch-r0/udevprefix.conf b/device/arista/arm64-arista_goldfinch-r0/udevprefix.conf new file mode 100644 index 00000000000..8b137891791 --- /dev/null +++ b/device/arista/arm64-arista_goldfinch-r0/udevprefix.conf @@ -0,0 +1 @@ + diff --git a/device/arista/x86_64-arista_7050_qx32/Arista-7050-Q16S64/port_config.ini b/device/arista/x86_64-arista_7050_qx32/Arista-7050-Q16S64/port_config.ini index 1cc6c91b130..e4b1591bf9f 100644 --- a/device/arista/x86_64-arista_7050_qx32/Arista-7050-Q16S64/port_config.ini +++ b/device/arista/x86_64-arista_7050_qx32/Arista-7050-Q16S64/port_config.ini @@ -1,57 +1,57 @@ -# name lanes alias index -Ethernet0 125,126,127,128 Ethernet1/1 1 -Ethernet4 121,122,123,124 Ethernet2/1 2 -Ethernet8 13,14,15,16 Ethernet3/1 3 -Ethernet12 9,10,11,12 Ethernet4/1 4 -Ethernet16 17,18,19,20 Ethernet5/1 5 -Ethernet20 21,22,23,24 Ethernet6/1 6 -Ethernet24 25,26,27,28 Ethernet7/1 7 -Ethernet28 29,30,31,32 Ethernet8/1 8 -Ethernet32 37,38,39,40 Ethernet9/1 9 -Ethernet36 33,34,35,36 Ethernet10/1 10 -Ethernet40 45,46,47,48 Ethernet11/1 11 -Ethernet44 41,42,43,44 Ethernet12/1 12 -Ethernet48 53,54,55,56 Ethernet13/1 13 -Ethernet52 49,50,51,52 Ethernet14/1 14 -Ethernet56 69,70,71,72 Ethernet15/1 15 -Ethernet60 65,66,67,68 Ethernet16/1 16 -Ethernet64 77 Ethernet17/1 17 -Ethernet65 78 Ethernet17/2 17 -Ethernet66 79 Ethernet17/3 17 -Ethernet67 80 Ethernet17/4 17 -Ethernet68 73 Ethernet18/1 18 -Ethernet69 74 Ethernet18/2 18 -Ethernet70 75 Ethernet18/3 18 -Ethernet71 76 Ethernet18/4 18 -Ethernet72 93 Ethernet19/1 19 -Ethernet73 94 Ethernet19/2 19 -Ethernet74 95 Ethernet19/3 19 -Ethernet75 96 Ethernet19/4 19 -Ethernet76 89 Ethernet20/1 20 -Ethernet77 90 Ethernet20/2 20 -Ethernet78 91 Ethernet20/3 20 -Ethernet79 92 Ethernet20/4 20 -Ethernet80 101 Ethernet21/1 21 -Ethernet81 102 Ethernet21/2 21 -Ethernet82 103 Ethernet21/3 21 -Ethernet83 104 Ethernet21/4 21 -Ethernet84 97 Ethernet22/1 22 -Ethernet85 98 Ethernet22/2 22 -Ethernet86 99 Ethernet22/3 22 -Ethernet87 100 Ethernet22/4 22 -Ethernet88 109 Ethernet23/1 23 -Ethernet89 110 Ethernet23/2 23 -Ethernet90 111 Ethernet23/3 23 -Ethernet91 112 Ethernet23/4 23 -Ethernet92 105 Ethernet24/1 24 -Ethernet93 106 Ethernet24/2 24 -Ethernet94 107 Ethernet24/3 24 -Ethernet95 108 Ethernet24/4 24 -Ethernet96 61,62,63,64 Ethernet25 25 -Ethernet100 57,58,59,60 Ethernet26 26 -Ethernet104 81,82,83,84 Ethernet27 27 -Ethernet108 85,86,87,88 Ethernet28 28 -Ethernet112 117,118,119,120 Ethernet29 29 -Ethernet116 113,114,115,116 Ethernet30 30 -Ethernet120 5,6,7,8 Ethernet31 31 -Ethernet124 1,2,3,4 Ethernet32 32 +# name lanes alias index subport +Ethernet0 125,126,127,128 Ethernet1/1 1 0 +Ethernet4 121,122,123,124 Ethernet2/1 2 0 +Ethernet8 13,14,15,16 Ethernet3/1 3 0 +Ethernet12 9,10,11,12 Ethernet4/1 4 0 +Ethernet16 17,18,19,20 Ethernet5/1 5 0 +Ethernet20 21,22,23,24 Ethernet6/1 6 0 +Ethernet24 25,26,27,28 Ethernet7/1 7 0 +Ethernet28 29,30,31,32 Ethernet8/1 8 0 +Ethernet32 37,38,39,40 Ethernet9/1 9 0 +Ethernet36 33,34,35,36 Ethernet10/1 10 0 +Ethernet40 45,46,47,48 Ethernet11/1 11 0 +Ethernet44 41,42,43,44 Ethernet12/1 12 0 +Ethernet48 53,54,55,56 Ethernet13/1 13 0 +Ethernet52 49,50,51,52 Ethernet14/1 14 0 +Ethernet56 69,70,71,72 Ethernet15/1 15 0 +Ethernet60 65,66,67,68 Ethernet16/1 16 0 +Ethernet64 77 Ethernet17/1 17 1 +Ethernet65 78 Ethernet17/2 17 2 +Ethernet66 79 Ethernet17/3 17 3 +Ethernet67 80 Ethernet17/4 17 4 +Ethernet68 73 Ethernet18/1 18 1 +Ethernet69 74 Ethernet18/2 18 2 +Ethernet70 75 Ethernet18/3 18 3 +Ethernet71 76 Ethernet18/4 18 4 +Ethernet72 93 Ethernet19/1 19 1 +Ethernet73 94 Ethernet19/2 19 2 +Ethernet74 95 Ethernet19/3 19 3 +Ethernet75 96 Ethernet19/4 19 4 +Ethernet76 89 Ethernet20/1 20 1 +Ethernet77 90 Ethernet20/2 20 2 +Ethernet78 91 Ethernet20/3 20 3 +Ethernet79 92 Ethernet20/4 20 4 +Ethernet80 101 Ethernet21/1 21 1 +Ethernet81 102 Ethernet21/2 21 2 +Ethernet82 103 Ethernet21/3 21 3 +Ethernet83 104 Ethernet21/4 21 4 +Ethernet84 97 Ethernet22/1 22 1 +Ethernet85 98 Ethernet22/2 22 2 +Ethernet86 99 Ethernet22/3 22 3 +Ethernet87 100 Ethernet22/4 22 4 +Ethernet88 109 Ethernet23/1 23 1 +Ethernet89 110 Ethernet23/2 23 2 +Ethernet90 111 Ethernet23/3 23 3 +Ethernet91 112 Ethernet23/4 23 4 +Ethernet92 105 Ethernet24/1 24 1 +Ethernet93 106 Ethernet24/2 24 2 +Ethernet94 107 Ethernet24/3 24 3 +Ethernet95 108 Ethernet24/4 24 4 +Ethernet96 61,62,63,64 Ethernet25 25 0 +Ethernet100 57,58,59,60 Ethernet26 26 0 +Ethernet104 81,82,83,84 Ethernet27 27 0 +Ethernet108 85,86,87,88 Ethernet28 28 0 +Ethernet112 117,118,119,120 Ethernet29 29 0 +Ethernet116 113,114,115,116 Ethernet30 30 0 +Ethernet120 5,6,7,8 Ethernet31 31 0 +Ethernet124 1,2,3,4 Ethernet32 32 0 diff --git a/device/arista/x86_64-arista_7050cx3_32c/platform.json b/device/arista/x86_64-arista_7050cx3_32c/platform.json index 016f3d89e00..01ec16ae385 100644 --- a/device/arista/x86_64-arista_7050cx3_32c/platform.json +++ b/device/arista/x86_64-arista_7050cx3_32c/platform.json @@ -9,10 +9,10 @@ "name": "Scd(addr=0000:00:18.7)" }, { - "name": "Scd(addr=0000:02:00.0)" + "name": "PuffinPrimeSysCpld(addr=9-0023)" }, { - "name": "PuffinPrimeSysCpld(addr=9-0023)" + "name": "Scd(addr=0000:02:00.0)" } ], "fans": [], diff --git a/device/arista/x86_64-arista_7050cx3_32c/platform_components.json b/device/arista/x86_64-arista_7050cx3_32c/platform_components.json index d74f80bc583..f6c7d52ae12 100644 --- a/device/arista/x86_64-arista_7050cx3_32c/platform_components.json +++ b/device/arista/x86_64-arista_7050cx3_32c/platform_components.json @@ -4,8 +4,8 @@ "component": { "Aboot()": {}, "Scd(addr=0000:00:18.7)": {}, - "Scd(addr=0000:02:00.0)": {}, - "PuffinPrimeSysCpld(addr=9-0023)": {} + "PuffinPrimeSysCpld(addr=9-0023)": {}, + "Scd(addr=0000:02:00.0)": {} } } } diff --git a/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-C28S16/port_config.ini b/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-C28S16/port_config.ini index 817b0b653ca..4382b7ad2bb 100644 --- a/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-C28S16/port_config.ini +++ b/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-C28S16/port_config.ini @@ -1,46 +1,46 @@ -# name lanes alias index speed -Ethernet0 1 Ethernet1/1 1 10000 -Ethernet1 2 Ethernet1/2 1 10000 -Ethernet2 3 Ethernet1/3 1 10000 -Ethernet3 4 Ethernet1/4 1 10000 -Ethernet4 5 Ethernet2/1 2 10000 -Ethernet5 6 Ethernet2/2 2 10000 -Ethernet6 7 Ethernet2/3 2 10000 -Ethernet7 8 Ethernet2/4 2 10000 -Ethernet8 9 Ethernet3/1 3 10000 -Ethernet9 10 Ethernet3/2 3 10000 -Ethernet10 11 Ethernet3/3 3 10000 -Ethernet11 12 Ethernet3/4 3 10000 -Ethernet12 13 Ethernet4/1 4 10000 -Ethernet13 14 Ethernet4/2 4 10000 -Ethernet14 15 Ethernet4/3 4 10000 -Ethernet15 16 Ethernet4/4 4 10000 -Ethernet16 21,22,23,24 Ethernet5/1 5 100000 -Ethernet20 17,18,19,20 Ethernet6/1 6 100000 -Ethernet24 25,26,27,28 Ethernet7/1 7 100000 -Ethernet28 29,30,31,32 Ethernet8/1 8 100000 -Ethernet32 37,38,39,40 Ethernet9/1 9 100000 -Ethernet36 33,34,35,36 Ethernet10/1 10 100000 -Ethernet40 41,42,43,44 Ethernet11/1 11 100000 -Ethernet44 45,46,47,48 Ethernet12/1 12 100000 -Ethernet48 53,54,55,56 Ethernet13/1 13 100000 -Ethernet52 49,50,51,52 Ethernet14/1 14 100000 -Ethernet56 57,58,59,60 Ethernet15/1 15 100000 -Ethernet60 61,62,63,64 Ethernet16/1 16 100000 -Ethernet64 69,70,71,72 Ethernet17/1 17 100000 -Ethernet68 65,66,67,68 Ethernet18/1 18 100000 -Ethernet72 73,74,75,76 Ethernet19/1 19 100000 -Ethernet76 77,78,79,80 Ethernet20/1 20 100000 -Ethernet80 85,86,87,88 Ethernet21/1 21 100000 -Ethernet84 81,82,83,84 Ethernet22/1 22 100000 -Ethernet88 89,90,91,92 Ethernet23/1 23 100000 -Ethernet92 93,94,95,96 Ethernet24/1 24 100000 -Ethernet96 101,102,103,104 Ethernet25/1 25 100000 -Ethernet100 97,98,99,100 Ethernet26/1 26 100000 -Ethernet104 105,106,107,108 Ethernet27/1 27 100000 -Ethernet108 109,110,111,112 Ethernet28/1 28 100000 -Ethernet112 117,118,119,120 Ethernet29/1 29 100000 -Ethernet116 113,114,115,116 Ethernet30/1 30 100000 -Ethernet120 121,122,123,124 Ethernet31/1 31 100000 -Ethernet124 125,126,127,128 Ethernet32/1 32 100000 -Ethernet128 129 Ethernet33 33 10000 +# name lanes alias index speed subport +Ethernet0 1 Ethernet1/1 1 10000 1 +Ethernet1 2 Ethernet1/2 1 10000 2 +Ethernet2 3 Ethernet1/3 1 10000 3 +Ethernet3 4 Ethernet1/4 1 10000 4 +Ethernet4 5 Ethernet2/1 2 10000 1 +Ethernet5 6 Ethernet2/2 2 10000 2 +Ethernet6 7 Ethernet2/3 2 10000 3 +Ethernet7 8 Ethernet2/4 2 10000 4 +Ethernet8 9 Ethernet3/1 3 10000 1 +Ethernet9 10 Ethernet3/2 3 10000 2 +Ethernet10 11 Ethernet3/3 3 10000 3 +Ethernet11 12 Ethernet3/4 3 10000 4 +Ethernet12 13 Ethernet4/1 4 10000 1 +Ethernet13 14 Ethernet4/2 4 10000 2 +Ethernet14 15 Ethernet4/3 4 10000 3 +Ethernet15 16 Ethernet4/4 4 10000 4 +Ethernet16 21,22,23,24 Ethernet5/1 5 100000 0 +Ethernet20 17,18,19,20 Ethernet6/1 6 100000 0 +Ethernet24 25,26,27,28 Ethernet7/1 7 100000 0 +Ethernet28 29,30,31,32 Ethernet8/1 8 100000 0 +Ethernet32 37,38,39,40 Ethernet9/1 9 100000 0 +Ethernet36 33,34,35,36 Ethernet10/1 10 100000 0 +Ethernet40 41,42,43,44 Ethernet11/1 11 100000 0 +Ethernet44 45,46,47,48 Ethernet12/1 12 100000 0 +Ethernet48 53,54,55,56 Ethernet13/1 13 100000 0 +Ethernet52 49,50,51,52 Ethernet14/1 14 100000 0 +Ethernet56 57,58,59,60 Ethernet15/1 15 100000 0 +Ethernet60 61,62,63,64 Ethernet16/1 16 100000 0 +Ethernet64 69,70,71,72 Ethernet17/1 17 100000 0 +Ethernet68 65,66,67,68 Ethernet18/1 18 100000 0 +Ethernet72 73,74,75,76 Ethernet19/1 19 100000 0 +Ethernet76 77,78,79,80 Ethernet20/1 20 100000 0 +Ethernet80 85,86,87,88 Ethernet21/1 21 100000 0 +Ethernet84 81,82,83,84 Ethernet22/1 22 100000 0 +Ethernet88 89,90,91,92 Ethernet23/1 23 100000 0 +Ethernet92 93,94,95,96 Ethernet24/1 24 100000 0 +Ethernet96 101,102,103,104 Ethernet25/1 25 100000 0 +Ethernet100 97,98,99,100 Ethernet26/1 26 100000 0 +Ethernet104 105,106,107,108 Ethernet27/1 27 100000 0 +Ethernet108 109,110,111,112 Ethernet28/1 28 100000 0 +Ethernet112 117,118,119,120 Ethernet29/1 29 100000 0 +Ethernet116 113,114,115,116 Ethernet30/1 30 100000 0 +Ethernet120 121,122,123,124 Ethernet31/1 31 100000 0 +Ethernet124 125,126,127,128 Ethernet32/1 32 100000 0 +Ethernet128 129 Ethernet33 33 10000 0 diff --git a/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-C6S104/port_config.ini b/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-C6S104/port_config.ini index 9731a3a6be6..c8a393cbe49 100644 --- a/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-C6S104/port_config.ini +++ b/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-C6S104/port_config.ini @@ -1,112 +1,112 @@ -# name lanes alias index speed -Ethernet0 1 Ethernet1/1 1 10000 -Ethernet1 2 Ethernet1/2 1 10000 -Ethernet2 3 Ethernet1/3 1 10000 -Ethernet3 4 Ethernet1/4 1 10000 -Ethernet4 5 Ethernet2/1 2 10000 -Ethernet5 6 Ethernet2/2 2 10000 -Ethernet6 7 Ethernet2/3 2 10000 -Ethernet7 8 Ethernet2/4 2 10000 -Ethernet8 9 Ethernet3/1 3 10000 -Ethernet9 10 Ethernet3/2 3 10000 -Ethernet10 11 Ethernet3/3 3 10000 -Ethernet11 12 Ethernet3/4 3 10000 -Ethernet12 13 Ethernet4/1 4 10000 -Ethernet13 14 Ethernet4/2 4 10000 -Ethernet14 15 Ethernet4/3 4 10000 -Ethernet15 16 Ethernet4/4 4 10000 -Ethernet16 21 Ethernet5/1 5 10000 -Ethernet17 22 Ethernet5/2 5 10000 -Ethernet18 23 Ethernet5/3 5 10000 -Ethernet19 24 Ethernet5/4 5 10000 -Ethernet20 17 Ethernet6/1 6 10000 -Ethernet21 18 Ethernet6/2 6 10000 -Ethernet22 19 Ethernet6/3 6 10000 -Ethernet23 20 Ethernet6/4 6 10000 -Ethernet24 25 Ethernet7/1 7 10000 -Ethernet25 26 Ethernet7/2 7 10000 -Ethernet26 27 Ethernet7/3 7 10000 -Ethernet27 28 Ethernet7/4 7 10000 -Ethernet28 29 Ethernet8/1 8 10000 -Ethernet29 30 Ethernet8/2 8 10000 -Ethernet30 31 Ethernet8/3 8 10000 -Ethernet31 32 Ethernet8/4 8 10000 -Ethernet32 37 Ethernet9/1 9 10000 -Ethernet33 38 Ethernet9/2 9 10000 -Ethernet34 39 Ethernet9/3 9 10000 -Ethernet35 40 Ethernet9/4 9 10000 -Ethernet36 33 Ethernet10/1 10 10000 -Ethernet37 34 Ethernet10/2 10 10000 -Ethernet38 35 Ethernet10/3 10 10000 -Ethernet39 36 Ethernet10/4 10 10000 -Ethernet40 41 Ethernet11/1 11 10000 -Ethernet41 42 Ethernet11/2 11 10000 -Ethernet42 43 Ethernet11/3 11 10000 -Ethernet43 44 Ethernet11/4 11 10000 -Ethernet44 45 Ethernet12/1 12 10000 -Ethernet45 46 Ethernet12/2 12 10000 -Ethernet46 47 Ethernet12/3 12 10000 -Ethernet47 48 Ethernet12/4 12 10000 -Ethernet48 53 Ethernet13/1 13 10000 -Ethernet49 54 Ethernet13/2 13 10000 -Ethernet50 55 Ethernet13/3 13 10000 -Ethernet51 56 Ethernet13/4 13 10000 -Ethernet52 49 Ethernet14/1 14 10000 -Ethernet53 50 Ethernet14/2 14 10000 -Ethernet54 51 Ethernet14/3 14 10000 -Ethernet55 52 Ethernet14/4 14 10000 -Ethernet56 57 Ethernet15/1 15 10000 -Ethernet57 58 Ethernet15/2 15 10000 -Ethernet58 59 Ethernet15/3 15 10000 -Ethernet59 60 Ethernet15/4 15 10000 -Ethernet60 61 Ethernet16/1 16 10000 -Ethernet61 62 Ethernet16/2 16 10000 -Ethernet62 63 Ethernet16/3 16 10000 -Ethernet63 64 Ethernet16/4 16 10000 -Ethernet64 69 Ethernet17/1 17 10000 -Ethernet65 70 Ethernet17/2 17 10000 -Ethernet66 71 Ethernet17/3 17 10000 -Ethernet67 72 Ethernet17/4 17 10000 -Ethernet68 65 Ethernet18/1 18 10000 -Ethernet69 66 Ethernet18/2 18 10000 -Ethernet70 67 Ethernet18/3 18 10000 -Ethernet71 68 Ethernet18/4 18 10000 -Ethernet72 73 Ethernet19/1 19 10000 -Ethernet73 74 Ethernet19/2 19 10000 -Ethernet74 75 Ethernet19/3 19 10000 -Ethernet75 76 Ethernet19/4 19 10000 -Ethernet76 77 Ethernet20/1 20 10000 -Ethernet77 78 Ethernet20/2 20 10000 -Ethernet78 79 Ethernet20/3 20 10000 -Ethernet79 80 Ethernet20/4 20 10000 -Ethernet80 85 Ethernet21/1 21 10000 -Ethernet81 86 Ethernet21/2 21 10000 -Ethernet82 87 Ethernet21/3 21 10000 -Ethernet83 88 Ethernet21/4 21 10000 -Ethernet84 81 Ethernet22/1 22 10000 -Ethernet85 82 Ethernet22/2 22 10000 -Ethernet86 83 Ethernet22/3 22 10000 -Ethernet87 84 Ethernet22/4 22 10000 -Ethernet88 89 Ethernet23/1 23 10000 -Ethernet89 90 Ethernet23/2 23 10000 -Ethernet90 91 Ethernet23/3 23 10000 -Ethernet91 92 Ethernet23/4 23 10000 -Ethernet92 93 Ethernet24/1 24 10000 -Ethernet93 94 Ethernet24/2 24 10000 -Ethernet94 95 Ethernet24/3 24 10000 -Ethernet95 96 Ethernet24/4 24 10000 -Ethernet96 101 Ethernet25/1 25 10000 -Ethernet97 102 Ethernet25/2 25 10000 -Ethernet98 103 Ethernet25/3 25 10000 -Ethernet99 104 Ethernet25/4 25 10000 -Ethernet100 97 Ethernet26/1 26 10000 -Ethernet101 98 Ethernet26/2 26 10000 -Ethernet102 99 Ethernet26/3 26 10000 -Ethernet103 100 Ethernet26/4 26 10000 -Ethernet104 105,106,107,108 Ethernet27/1 27 100000 -Ethernet108 109,110,111,112 Ethernet28/1 28 100000 -Ethernet112 117,118,119,120 Ethernet29/1 29 100000 -Ethernet116 113,114,115,116 Ethernet30/1 30 100000 -Ethernet120 121,122,123,124 Ethernet31/1 31 100000 -Ethernet124 125,126,127,128 Ethernet32/1 32 100000 -Ethernet128 129 Ethernet33 33 10000 +# name lanes alias index speed subport +Ethernet0 1 Ethernet1/1 1 10000 1 +Ethernet1 2 Ethernet1/2 1 10000 2 +Ethernet2 3 Ethernet1/3 1 10000 3 +Ethernet3 4 Ethernet1/4 1 10000 4 +Ethernet4 5 Ethernet2/1 2 10000 1 +Ethernet5 6 Ethernet2/2 2 10000 2 +Ethernet6 7 Ethernet2/3 2 10000 3 +Ethernet7 8 Ethernet2/4 2 10000 4 +Ethernet8 9 Ethernet3/1 3 10000 1 +Ethernet9 10 Ethernet3/2 3 10000 2 +Ethernet10 11 Ethernet3/3 3 10000 3 +Ethernet11 12 Ethernet3/4 3 10000 4 +Ethernet12 13 Ethernet4/1 4 10000 1 +Ethernet13 14 Ethernet4/2 4 10000 2 +Ethernet14 15 Ethernet4/3 4 10000 3 +Ethernet15 16 Ethernet4/4 4 10000 4 +Ethernet16 21 Ethernet5/1 5 10000 1 +Ethernet17 22 Ethernet5/2 5 10000 2 +Ethernet18 23 Ethernet5/3 5 10000 3 +Ethernet19 24 Ethernet5/4 5 10000 4 +Ethernet20 17 Ethernet6/1 6 10000 1 +Ethernet21 18 Ethernet6/2 6 10000 2 +Ethernet22 19 Ethernet6/3 6 10000 3 +Ethernet23 20 Ethernet6/4 6 10000 4 +Ethernet24 25 Ethernet7/1 7 10000 1 +Ethernet25 26 Ethernet7/2 7 10000 2 +Ethernet26 27 Ethernet7/3 7 10000 3 +Ethernet27 28 Ethernet7/4 7 10000 4 +Ethernet28 29 Ethernet8/1 8 10000 1 +Ethernet29 30 Ethernet8/2 8 10000 2 +Ethernet30 31 Ethernet8/3 8 10000 3 +Ethernet31 32 Ethernet8/4 8 10000 4 +Ethernet32 37 Ethernet9/1 9 10000 1 +Ethernet33 38 Ethernet9/2 9 10000 2 +Ethernet34 39 Ethernet9/3 9 10000 3 +Ethernet35 40 Ethernet9/4 9 10000 4 +Ethernet36 33 Ethernet10/1 10 10000 1 +Ethernet37 34 Ethernet10/2 10 10000 2 +Ethernet38 35 Ethernet10/3 10 10000 3 +Ethernet39 36 Ethernet10/4 10 10000 4 +Ethernet40 41 Ethernet11/1 11 10000 1 +Ethernet41 42 Ethernet11/2 11 10000 2 +Ethernet42 43 Ethernet11/3 11 10000 3 +Ethernet43 44 Ethernet11/4 11 10000 4 +Ethernet44 45 Ethernet12/1 12 10000 1 +Ethernet45 46 Ethernet12/2 12 10000 2 +Ethernet46 47 Ethernet12/3 12 10000 3 +Ethernet47 48 Ethernet12/4 12 10000 4 +Ethernet48 53 Ethernet13/1 13 10000 1 +Ethernet49 54 Ethernet13/2 13 10000 2 +Ethernet50 55 Ethernet13/3 13 10000 3 +Ethernet51 56 Ethernet13/4 13 10000 4 +Ethernet52 49 Ethernet14/1 14 10000 1 +Ethernet53 50 Ethernet14/2 14 10000 2 +Ethernet54 51 Ethernet14/3 14 10000 3 +Ethernet55 52 Ethernet14/4 14 10000 4 +Ethernet56 57 Ethernet15/1 15 10000 1 +Ethernet57 58 Ethernet15/2 15 10000 2 +Ethernet58 59 Ethernet15/3 15 10000 3 +Ethernet59 60 Ethernet15/4 15 10000 4 +Ethernet60 61 Ethernet16/1 16 10000 1 +Ethernet61 62 Ethernet16/2 16 10000 2 +Ethernet62 63 Ethernet16/3 16 10000 3 +Ethernet63 64 Ethernet16/4 16 10000 4 +Ethernet64 69 Ethernet17/1 17 10000 1 +Ethernet65 70 Ethernet17/2 17 10000 2 +Ethernet66 71 Ethernet17/3 17 10000 3 +Ethernet67 72 Ethernet17/4 17 10000 4 +Ethernet68 65 Ethernet18/1 18 10000 1 +Ethernet69 66 Ethernet18/2 18 10000 2 +Ethernet70 67 Ethernet18/3 18 10000 3 +Ethernet71 68 Ethernet18/4 18 10000 4 +Ethernet72 73 Ethernet19/1 19 10000 1 +Ethernet73 74 Ethernet19/2 19 10000 2 +Ethernet74 75 Ethernet19/3 19 10000 3 +Ethernet75 76 Ethernet19/4 19 10000 4 +Ethernet76 77 Ethernet20/1 20 10000 1 +Ethernet77 78 Ethernet20/2 20 10000 2 +Ethernet78 79 Ethernet20/3 20 10000 3 +Ethernet79 80 Ethernet20/4 20 10000 4 +Ethernet80 85 Ethernet21/1 21 10000 1 +Ethernet81 86 Ethernet21/2 21 10000 2 +Ethernet82 87 Ethernet21/3 21 10000 3 +Ethernet83 88 Ethernet21/4 21 10000 4 +Ethernet84 81 Ethernet22/1 22 10000 1 +Ethernet85 82 Ethernet22/2 22 10000 2 +Ethernet86 83 Ethernet22/3 22 10000 3 +Ethernet87 84 Ethernet22/4 22 10000 4 +Ethernet88 89 Ethernet23/1 23 10000 1 +Ethernet89 90 Ethernet23/2 23 10000 2 +Ethernet90 91 Ethernet23/3 23 10000 3 +Ethernet91 92 Ethernet23/4 23 10000 4 +Ethernet92 93 Ethernet24/1 24 10000 1 +Ethernet93 94 Ethernet24/2 24 10000 2 +Ethernet94 95 Ethernet24/3 24 10000 3 +Ethernet95 96 Ethernet24/4 24 10000 4 +Ethernet96 101 Ethernet25/1 25 10000 1 +Ethernet97 102 Ethernet25/2 25 10000 2 +Ethernet98 103 Ethernet25/3 25 10000 3 +Ethernet99 104 Ethernet25/4 25 10000 4 +Ethernet100 97 Ethernet26/1 26 10000 1 +Ethernet101 98 Ethernet26/2 26 10000 2 +Ethernet102 99 Ethernet26/3 26 10000 3 +Ethernet103 100 Ethernet26/4 26 10000 4 +Ethernet104 105,106,107,108 Ethernet27/1 27 100000 0 +Ethernet108 109,110,111,112 Ethernet28/1 28 100000 0 +Ethernet112 117,118,119,120 Ethernet29/1 29 100000 0 +Ethernet116 113,114,115,116 Ethernet30/1 30 100000 0 +Ethernet120 121,122,123,124 Ethernet31/1 31 100000 0 +Ethernet124 125,126,127,128 Ethernet32/1 32 100000 0 +Ethernet128 129 Ethernet33 33 10000 0 diff --git a/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-D48C8/port_config.ini b/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-D48C8/port_config.ini index 25670f87d9c..0851711bbd3 100644 --- a/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-D48C8/port_config.ini +++ b/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-D48C8/port_config.ini @@ -1,57 +1,57 @@ -# name lanes alias index speed -Ethernet0 1,2 Ethernet1/1 1 50000 -Ethernet2 3,4 Ethernet1/3 1 50000 -Ethernet4 5,6 Ethernet2/1 2 50000 -Ethernet6 7,8 Ethernet2/3 2 50000 -Ethernet8 9,10 Ethernet3/1 3 50000 -Ethernet10 11,12 Ethernet3/3 3 50000 -Ethernet12 13,14 Ethernet4/1 4 50000 -Ethernet14 15,16 Ethernet4/3 4 50000 -Ethernet16 21,22 Ethernet5/1 5 50000 -Ethernet18 23,24 Ethernet5/3 5 50000 -Ethernet20 17,18 Ethernet6/1 6 50000 -Ethernet22 19,20 Ethernet6/3 6 50000 -Ethernet24 25,26,27,28 Ethernet7/1 7 100000 -Ethernet28 29,30,31,32 Ethernet8/1 8 100000 -Ethernet32 37,38,39,40 Ethernet9/1 9 100000 -Ethernet36 33,34,35,36 Ethernet10/1 10 100000 -Ethernet40 41,42 Ethernet11/1 11 50000 -Ethernet42 43,44 Ethernet11/3 11 50000 -Ethernet44 45,46 Ethernet12/1 12 50000 -Ethernet46 47,48 Ethernet12/3 12 50000 -Ethernet48 53,54 Ethernet13/1 13 50000 -Ethernet50 55,56 Ethernet13/3 13 50000 -Ethernet52 49,50 Ethernet14/1 14 50000 -Ethernet54 51,52 Ethernet14/3 14 50000 -Ethernet56 57,58 Ethernet15/1 15 50000 -Ethernet58 59,60 Ethernet15/3 15 50000 -Ethernet60 61,62 Ethernet16/1 16 50000 -Ethernet62 63,64 Ethernet16/3 16 50000 -Ethernet64 69,70 Ethernet17/1 17 50000 -Ethernet66 71,72 Ethernet17/3 17 50000 -Ethernet68 65,66 Ethernet18/1 18 50000 -Ethernet70 67,68 Ethernet18/3 18 50000 -Ethernet72 73,74 Ethernet19/1 19 50000 -Ethernet74 75,76 Ethernet19/3 19 50000 -Ethernet76 77,78 Ethernet20/1 20 50000 -Ethernet78 79,80 Ethernet20/3 20 50000 -Ethernet80 85,86 Ethernet21/1 21 50000 -Ethernet82 87,88 Ethernet21/3 21 50000 -Ethernet84 81,82 Ethernet22/1 22 50000 -Ethernet86 83,84 Ethernet22/3 22 50000 -Ethernet88 89,90,91,92 Ethernet23/1 23 100000 -Ethernet92 93,94,95,96 Ethernet24/1 24 100000 -Ethernet96 101,102,103,104 Ethernet25/1 25 100000 -Ethernet100 97,98,99,100 Ethernet26/1 26 100000 -Ethernet104 105,106 Ethernet27/1 27 50000 -Ethernet106 107,108 Ethernet27/3 27 50000 -Ethernet108 109,110 Ethernet28/1 28 50000 -Ethernet110 111,112 Ethernet28/3 28 50000 -Ethernet112 117,118 Ethernet29/1 29 50000 -Ethernet114 119,120 Ethernet29/3 29 50000 -Ethernet116 113,114 Ethernet30/1 30 50000 -Ethernet118 115,116 Ethernet30/3 30 50000 -Ethernet120 121,122 Ethernet31/1 31 50000 -Ethernet122 123,124 Ethernet31/3 31 50000 -Ethernet124 125,126 Ethernet32/1 32 50000 -Ethernet126 127,128 Ethernet32/3 32 50000 +# name lanes alias index speed subport +Ethernet0 1,2 Ethernet1/1 1 50000 1 +Ethernet2 3,4 Ethernet1/3 1 50000 2 +Ethernet4 5,6 Ethernet2/1 2 50000 1 +Ethernet6 7,8 Ethernet2/3 2 50000 2 +Ethernet8 9,10 Ethernet3/1 3 50000 1 +Ethernet10 11,12 Ethernet3/3 3 50000 2 +Ethernet12 13,14 Ethernet4/1 4 50000 1 +Ethernet14 15,16 Ethernet4/3 4 50000 2 +Ethernet16 21,22 Ethernet5/1 5 50000 1 +Ethernet18 23,24 Ethernet5/3 5 50000 2 +Ethernet20 17,18 Ethernet6/1 6 50000 1 +Ethernet22 19,20 Ethernet6/3 6 50000 2 +Ethernet24 25,26,27,28 Ethernet7/1 7 100000 0 +Ethernet28 29,30,31,32 Ethernet8/1 8 100000 0 +Ethernet32 37,38,39,40 Ethernet9/1 9 100000 0 +Ethernet36 33,34,35,36 Ethernet10/1 10 100000 0 +Ethernet40 41,42 Ethernet11/1 11 50000 1 +Ethernet42 43,44 Ethernet11/3 11 50000 2 +Ethernet44 45,46 Ethernet12/1 12 50000 1 +Ethernet46 47,48 Ethernet12/3 12 50000 2 +Ethernet48 53,54 Ethernet13/1 13 50000 1 +Ethernet50 55,56 Ethernet13/3 13 50000 2 +Ethernet52 49,50 Ethernet14/1 14 50000 1 +Ethernet54 51,52 Ethernet14/3 14 50000 2 +Ethernet56 57,58 Ethernet15/1 15 50000 1 +Ethernet58 59,60 Ethernet15/3 15 50000 2 +Ethernet60 61,62 Ethernet16/1 16 50000 1 +Ethernet62 63,64 Ethernet16/3 16 50000 2 +Ethernet64 69,70 Ethernet17/1 17 50000 1 +Ethernet66 71,72 Ethernet17/3 17 50000 2 +Ethernet68 65,66 Ethernet18/1 18 50000 1 +Ethernet70 67,68 Ethernet18/3 18 50000 2 +Ethernet72 73,74 Ethernet19/1 19 50000 1 +Ethernet74 75,76 Ethernet19/3 19 50000 2 +Ethernet76 77,78 Ethernet20/1 20 50000 1 +Ethernet78 79,80 Ethernet20/3 20 50000 2 +Ethernet80 85,86 Ethernet21/1 21 50000 1 +Ethernet82 87,88 Ethernet21/3 21 50000 2 +Ethernet84 81,82 Ethernet22/1 22 50000 1 +Ethernet86 83,84 Ethernet22/3 22 50000 2 +Ethernet88 89,90,91,92 Ethernet23/1 23 100000 0 +Ethernet92 93,94,95,96 Ethernet24/1 24 100000 0 +Ethernet96 101,102,103,104 Ethernet25/1 25 100000 0 +Ethernet100 97,98,99,100 Ethernet26/1 26 100000 0 +Ethernet104 105,106 Ethernet27/1 27 50000 1 +Ethernet106 107,108 Ethernet27/3 27 50000 2 +Ethernet108 109,110 Ethernet28/1 28 50000 1 +Ethernet110 111,112 Ethernet28/3 28 50000 2 +Ethernet112 117,118 Ethernet29/1 29 50000 1 +Ethernet114 119,120 Ethernet29/3 29 50000 2 +Ethernet116 113,114 Ethernet30/1 30 50000 1 +Ethernet118 115,116 Ethernet30/3 30 50000 2 +Ethernet120 121,122 Ethernet31/1 31 50000 1 +Ethernet122 123,124 Ethernet31/3 31 50000 2 +Ethernet124 125,126 Ethernet32/1 32 50000 1 +Ethernet126 127,128 Ethernet32/3 32 50000 2 diff --git a/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-S128/port_config.ini b/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-S128/port_config.ini index 68f46a0b6c7..161c5159262 100644 --- a/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-S128/port_config.ini +++ b/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-S128/port_config.ini @@ -1,130 +1,130 @@ -# name lanes alias index speed -Ethernet0 1 Ethernet1/1 1 10000 -Ethernet1 2 Ethernet1/2 1 10000 -Ethernet2 3 Ethernet1/3 1 10000 -Ethernet3 4 Ethernet1/4 1 10000 -Ethernet4 5 Ethernet2/1 2 10000 -Ethernet5 6 Ethernet2/2 2 10000 -Ethernet6 7 Ethernet2/3 2 10000 -Ethernet7 8 Ethernet2/4 2 10000 -Ethernet8 9 Ethernet3/1 3 10000 -Ethernet9 10 Ethernet3/2 3 10000 -Ethernet10 11 Ethernet3/3 3 10000 -Ethernet11 12 Ethernet3/4 3 10000 -Ethernet12 13 Ethernet4/1 4 10000 -Ethernet13 14 Ethernet4/2 4 10000 -Ethernet14 15 Ethernet4/3 4 10000 -Ethernet15 16 Ethernet4/4 4 10000 -Ethernet16 21 Ethernet5/1 5 10000 -Ethernet17 22 Ethernet5/2 5 10000 -Ethernet18 23 Ethernet5/3 5 10000 -Ethernet19 24 Ethernet5/4 5 10000 -Ethernet20 17 Ethernet6/1 6 10000 -Ethernet21 18 Ethernet6/2 6 10000 -Ethernet22 19 Ethernet6/3 6 10000 -Ethernet23 20 Ethernet6/4 6 10000 -Ethernet24 25 Ethernet7/1 7 10000 -Ethernet25 26 Ethernet7/2 7 10000 -Ethernet26 27 Ethernet7/3 7 10000 -Ethernet27 28 Ethernet7/4 7 10000 -Ethernet28 29 Ethernet8/1 8 10000 -Ethernet29 30 Ethernet8/2 8 10000 -Ethernet30 31 Ethernet8/3 8 10000 -Ethernet31 32 Ethernet8/4 8 10000 -Ethernet32 37 Ethernet9/1 9 10000 -Ethernet33 38 Ethernet9/2 9 10000 -Ethernet34 39 Ethernet9/3 9 10000 -Ethernet35 40 Ethernet9/4 9 10000 -Ethernet36 33 Ethernet10/1 10 10000 -Ethernet37 34 Ethernet10/2 10 10000 -Ethernet38 35 Ethernet10/3 10 10000 -Ethernet39 36 Ethernet10/4 10 10000 -Ethernet40 41 Ethernet11/1 11 10000 -Ethernet41 42 Ethernet11/2 11 10000 -Ethernet42 43 Ethernet11/3 11 10000 -Ethernet43 44 Ethernet11/4 11 10000 -Ethernet44 45 Ethernet12/1 12 10000 -Ethernet45 46 Ethernet12/2 12 10000 -Ethernet46 47 Ethernet12/3 12 10000 -Ethernet47 48 Ethernet12/4 12 10000 -Ethernet48 53 Ethernet13/1 13 10000 -Ethernet49 54 Ethernet13/2 13 10000 -Ethernet50 55 Ethernet13/3 13 10000 -Ethernet51 56 Ethernet13/4 13 10000 -Ethernet52 49 Ethernet14/1 14 10000 -Ethernet53 50 Ethernet14/2 14 10000 -Ethernet54 51 Ethernet14/3 14 10000 -Ethernet55 52 Ethernet14/4 14 10000 -Ethernet56 57 Ethernet15/1 15 10000 -Ethernet57 58 Ethernet15/2 15 10000 -Ethernet58 59 Ethernet15/3 15 10000 -Ethernet59 60 Ethernet15/4 15 10000 -Ethernet60 61 Ethernet16/1 16 10000 -Ethernet61 62 Ethernet16/2 16 10000 -Ethernet62 63 Ethernet16/3 16 10000 -Ethernet63 64 Ethernet16/4 16 10000 -Ethernet64 69 Ethernet17/1 17 10000 -Ethernet65 70 Ethernet17/2 17 10000 -Ethernet66 71 Ethernet17/3 17 10000 -Ethernet67 72 Ethernet17/4 17 10000 -Ethernet68 65 Ethernet18/1 18 10000 -Ethernet69 66 Ethernet18/2 18 10000 -Ethernet70 67 Ethernet18/3 18 10000 -Ethernet71 68 Ethernet18/4 18 10000 -Ethernet72 73 Ethernet19/1 19 10000 -Ethernet73 74 Ethernet19/2 19 10000 -Ethernet74 75 Ethernet19/3 19 10000 -Ethernet75 76 Ethernet19/4 19 10000 -Ethernet76 77 Ethernet20/1 20 10000 -Ethernet77 78 Ethernet20/2 20 10000 -Ethernet78 79 Ethernet20/3 20 10000 -Ethernet79 80 Ethernet20/4 20 10000 -Ethernet80 85 Ethernet21/1 21 10000 -Ethernet81 86 Ethernet21/2 21 10000 -Ethernet82 87 Ethernet21/3 21 10000 -Ethernet83 88 Ethernet21/4 21 10000 -Ethernet84 81 Ethernet22/1 22 10000 -Ethernet85 82 Ethernet22/2 22 10000 -Ethernet86 83 Ethernet22/3 22 10000 -Ethernet87 84 Ethernet22/4 22 10000 -Ethernet88 89 Ethernet23/1 23 10000 -Ethernet89 90 Ethernet23/2 23 10000 -Ethernet90 91 Ethernet23/3 23 10000 -Ethernet91 92 Ethernet23/4 23 10000 -Ethernet92 93 Ethernet24/1 24 10000 -Ethernet93 94 Ethernet24/2 24 10000 -Ethernet94 95 Ethernet24/3 24 10000 -Ethernet95 96 Ethernet24/4 24 10000 -Ethernet96 101 Ethernet25/1 25 10000 -Ethernet97 102 Ethernet25/2 25 10000 -Ethernet98 103 Ethernet25/3 25 10000 -Ethernet99 104 Ethernet25/4 25 10000 -Ethernet100 97 Ethernet26/1 26 10000 -Ethernet101 98 Ethernet26/2 26 10000 -Ethernet102 99 Ethernet26/3 26 10000 -Ethernet103 100 Ethernet26/4 26 10000 -Ethernet104 105 Ethernet27/1 27 10000 -Ethernet105 106 Ethernet27/2 27 10000 -Ethernet106 107 Ethernet27/3 27 10000 -Ethernet107 108 Ethernet27/4 27 10000 -Ethernet108 109 Ethernet28/1 28 10000 -Ethernet109 110 Ethernet28/2 28 10000 -Ethernet110 111 Ethernet28/3 28 10000 -Ethernet111 112 Ethernet28/4 28 10000 -Ethernet112 117 Ethernet29/1 29 10000 -Ethernet113 118 Ethernet29/2 29 10000 -Ethernet114 119 Ethernet29/3 29 10000 -Ethernet115 120 Ethernet29/4 29 10000 -Ethernet116 113 Ethernet30/1 30 10000 -Ethernet117 114 Ethernet30/2 30 10000 -Ethernet118 115 Ethernet30/3 30 10000 -Ethernet119 116 Ethernet30/4 30 10000 -Ethernet120 121 Ethernet31/1 31 10000 -Ethernet121 122 Ethernet31/2 31 10000 -Ethernet122 123 Ethernet31/3 31 10000 -Ethernet123 124 Ethernet31/4 31 10000 -Ethernet124 125 Ethernet32/1 32 10000 -Ethernet125 126 Ethernet32/2 32 10000 -Ethernet126 127 Ethernet32/3 32 10000 -Ethernet127 128 Ethernet32/4 32 10000 -Ethernet128 129 Ethernet33 33 10000 +# name lanes alias index speed subport +Ethernet0 1 Ethernet1/1 1 10000 1 +Ethernet1 2 Ethernet1/2 1 10000 2 +Ethernet2 3 Ethernet1/3 1 10000 3 +Ethernet3 4 Ethernet1/4 1 10000 4 +Ethernet4 5 Ethernet2/1 2 10000 1 +Ethernet5 6 Ethernet2/2 2 10000 2 +Ethernet6 7 Ethernet2/3 2 10000 3 +Ethernet7 8 Ethernet2/4 2 10000 4 +Ethernet8 9 Ethernet3/1 3 10000 1 +Ethernet9 10 Ethernet3/2 3 10000 2 +Ethernet10 11 Ethernet3/3 3 10000 3 +Ethernet11 12 Ethernet3/4 3 10000 4 +Ethernet12 13 Ethernet4/1 4 10000 1 +Ethernet13 14 Ethernet4/2 4 10000 2 +Ethernet14 15 Ethernet4/3 4 10000 3 +Ethernet15 16 Ethernet4/4 4 10000 4 +Ethernet16 21 Ethernet5/1 5 10000 1 +Ethernet17 22 Ethernet5/2 5 10000 2 +Ethernet18 23 Ethernet5/3 5 10000 3 +Ethernet19 24 Ethernet5/4 5 10000 4 +Ethernet20 17 Ethernet6/1 6 10000 1 +Ethernet21 18 Ethernet6/2 6 10000 2 +Ethernet22 19 Ethernet6/3 6 10000 3 +Ethernet23 20 Ethernet6/4 6 10000 4 +Ethernet24 25 Ethernet7/1 7 10000 1 +Ethernet25 26 Ethernet7/2 7 10000 2 +Ethernet26 27 Ethernet7/3 7 10000 3 +Ethernet27 28 Ethernet7/4 7 10000 4 +Ethernet28 29 Ethernet8/1 8 10000 1 +Ethernet29 30 Ethernet8/2 8 10000 2 +Ethernet30 31 Ethernet8/3 8 10000 3 +Ethernet31 32 Ethernet8/4 8 10000 4 +Ethernet32 37 Ethernet9/1 9 10000 1 +Ethernet33 38 Ethernet9/2 9 10000 2 +Ethernet34 39 Ethernet9/3 9 10000 3 +Ethernet35 40 Ethernet9/4 9 10000 4 +Ethernet36 33 Ethernet10/1 10 10000 1 +Ethernet37 34 Ethernet10/2 10 10000 2 +Ethernet38 35 Ethernet10/3 10 10000 3 +Ethernet39 36 Ethernet10/4 10 10000 4 +Ethernet40 41 Ethernet11/1 11 10000 1 +Ethernet41 42 Ethernet11/2 11 10000 2 +Ethernet42 43 Ethernet11/3 11 10000 3 +Ethernet43 44 Ethernet11/4 11 10000 4 +Ethernet44 45 Ethernet12/1 12 10000 1 +Ethernet45 46 Ethernet12/2 12 10000 2 +Ethernet46 47 Ethernet12/3 12 10000 3 +Ethernet47 48 Ethernet12/4 12 10000 4 +Ethernet48 53 Ethernet13/1 13 10000 1 +Ethernet49 54 Ethernet13/2 13 10000 2 +Ethernet50 55 Ethernet13/3 13 10000 3 +Ethernet51 56 Ethernet13/4 13 10000 4 +Ethernet52 49 Ethernet14/1 14 10000 1 +Ethernet53 50 Ethernet14/2 14 10000 2 +Ethernet54 51 Ethernet14/3 14 10000 3 +Ethernet55 52 Ethernet14/4 14 10000 4 +Ethernet56 57 Ethernet15/1 15 10000 1 +Ethernet57 58 Ethernet15/2 15 10000 2 +Ethernet58 59 Ethernet15/3 15 10000 3 +Ethernet59 60 Ethernet15/4 15 10000 4 +Ethernet60 61 Ethernet16/1 16 10000 1 +Ethernet61 62 Ethernet16/2 16 10000 2 +Ethernet62 63 Ethernet16/3 16 10000 3 +Ethernet63 64 Ethernet16/4 16 10000 4 +Ethernet64 69 Ethernet17/1 17 10000 1 +Ethernet65 70 Ethernet17/2 17 10000 2 +Ethernet66 71 Ethernet17/3 17 10000 3 +Ethernet67 72 Ethernet17/4 17 10000 4 +Ethernet68 65 Ethernet18/1 18 10000 1 +Ethernet69 66 Ethernet18/2 18 10000 2 +Ethernet70 67 Ethernet18/3 18 10000 3 +Ethernet71 68 Ethernet18/4 18 10000 4 +Ethernet72 73 Ethernet19/1 19 10000 1 +Ethernet73 74 Ethernet19/2 19 10000 2 +Ethernet74 75 Ethernet19/3 19 10000 3 +Ethernet75 76 Ethernet19/4 19 10000 4 +Ethernet76 77 Ethernet20/1 20 10000 1 +Ethernet77 78 Ethernet20/2 20 10000 2 +Ethernet78 79 Ethernet20/3 20 10000 3 +Ethernet79 80 Ethernet20/4 20 10000 4 +Ethernet80 85 Ethernet21/1 21 10000 1 +Ethernet81 86 Ethernet21/2 21 10000 2 +Ethernet82 87 Ethernet21/3 21 10000 3 +Ethernet83 88 Ethernet21/4 21 10000 4 +Ethernet84 81 Ethernet22/1 22 10000 1 +Ethernet85 82 Ethernet22/2 22 10000 2 +Ethernet86 83 Ethernet22/3 22 10000 3 +Ethernet87 84 Ethernet22/4 22 10000 4 +Ethernet88 89 Ethernet23/1 23 10000 1 +Ethernet89 90 Ethernet23/2 23 10000 2 +Ethernet90 91 Ethernet23/3 23 10000 3 +Ethernet91 92 Ethernet23/4 23 10000 4 +Ethernet92 93 Ethernet24/1 24 10000 1 +Ethernet93 94 Ethernet24/2 24 10000 2 +Ethernet94 95 Ethernet24/3 24 10000 3 +Ethernet95 96 Ethernet24/4 24 10000 4 +Ethernet96 101 Ethernet25/1 25 10000 1 +Ethernet97 102 Ethernet25/2 25 10000 2 +Ethernet98 103 Ethernet25/3 25 10000 3 +Ethernet99 104 Ethernet25/4 25 10000 4 +Ethernet100 97 Ethernet26/1 26 10000 1 +Ethernet101 98 Ethernet26/2 26 10000 2 +Ethernet102 99 Ethernet26/3 26 10000 3 +Ethernet103 100 Ethernet26/4 26 10000 4 +Ethernet104 105 Ethernet27/1 27 10000 1 +Ethernet105 106 Ethernet27/2 27 10000 2 +Ethernet106 107 Ethernet27/3 27 10000 3 +Ethernet107 108 Ethernet27/4 27 10000 4 +Ethernet108 109 Ethernet28/1 28 10000 1 +Ethernet109 110 Ethernet28/2 28 10000 2 +Ethernet110 111 Ethernet28/3 28 10000 3 +Ethernet111 112 Ethernet28/4 28 10000 4 +Ethernet112 117 Ethernet29/1 29 10000 1 +Ethernet113 118 Ethernet29/2 29 10000 2 +Ethernet114 119 Ethernet29/3 29 10000 3 +Ethernet115 120 Ethernet29/4 29 10000 4 +Ethernet116 113 Ethernet30/1 30 10000 1 +Ethernet117 114 Ethernet30/2 30 10000 2 +Ethernet118 115 Ethernet30/3 30 10000 3 +Ethernet119 116 Ethernet30/4 30 10000 4 +Ethernet120 121 Ethernet31/1 31 10000 1 +Ethernet121 122 Ethernet31/2 31 10000 2 +Ethernet122 123 Ethernet31/3 31 10000 3 +Ethernet123 124 Ethernet31/4 31 10000 4 +Ethernet124 125 Ethernet32/1 32 10000 1 +Ethernet125 126 Ethernet32/2 32 10000 2 +Ethernet126 127 Ethernet32/3 32 10000 3 +Ethernet127 128 Ethernet32/4 32 10000 4 +Ethernet128 129 Ethernet33 33 10000 0 diff --git a/device/arista/x86_64-arista_7050cx3_32s/media_settings.json b/device/arista/x86_64-arista_7050cx3_32s/media_settings.json index da448db4d70..aab6cacd60c 100644 --- a/device/arista/x86_64-arista_7050cx3_32s/media_settings.json +++ b/device/arista/x86_64-arista_7050cx3_32s/media_settings.json @@ -9,14 +9,6 @@ "lane3": "0x105004" } }, - "COPPER25": { - "preemphasis": { - "lane0": "0x45808", - "lane1": "0x45808", - "lane2": "0x45808", - "lane3": "0x45808" - } - }, "OPTICAL10": { "preemphasis": { "lane0": "0x14410a", @@ -43,14 +35,6 @@ "lane3": "0x105004" } }, - "COPPER25": { - "preemphasis": { - "lane0": "0x45808", - "lane1": "0x45808", - "lane2": "0x45808", - "lane3": "0x45808" - } - }, "OPTICAL10": { "preemphasis": { "lane0": "0x14410a", @@ -77,14 +61,6 @@ "lane3": "0x105004" } }, - "COPPER25": { - "preemphasis": { - "lane0": "0x45808", - "lane1": "0x45808", - "lane2": "0x45808", - "lane3": "0x45808" - } - }, "OPTICAL10": { "preemphasis": { "lane0": "0x14410a", @@ -111,14 +87,6 @@ "lane3": "0x105004" } }, - "COPPER25": { - "preemphasis": { - "lane0": "0x45808", - "lane1": "0x45808", - "lane2": "0x45808", - "lane3": "0x45808" - } - }, "OPTICAL10": { "preemphasis": { "lane0": "0x14410a", @@ -145,14 +113,6 @@ "lane3": "0x105004" } }, - "COPPER25": { - "preemphasis": { - "lane0": "0x45808", - "lane1": "0x45808", - "lane2": "0x45808", - "lane3": "0x45808" - } - }, "OPTICAL10": { "preemphasis": { "lane0": "0x14410a", @@ -179,14 +139,6 @@ "lane3": "0x105004" } }, - "COPPER25": { - "preemphasis": { - "lane0": "0x45808", - "lane1": "0x45808", - "lane2": "0x45808", - "lane3": "0x45808" - } - }, "OPTICAL10": { "preemphasis": { "lane0": "0x14410a", @@ -213,14 +165,6 @@ "lane3": "0x105004" } }, - "COPPER25": { - "preemphasis": { - "lane0": "0x45808", - "lane1": "0x45808", - "lane2": "0x45808", - "lane3": "0x45808" - } - }, "OPTICAL10": { "preemphasis": { "lane0": "0x14410a", @@ -247,14 +191,6 @@ "lane3": "0x105004" } }, - "COPPER25": { - "preemphasis": { - "lane0": "0x45808", - "lane1": "0x45808", - "lane2": "0x45808", - "lane3": "0x45808" - } - }, "OPTICAL10": { "preemphasis": { "lane0": "0x14410a", @@ -281,14 +217,6 @@ "lane3": "0x105004" } }, - "COPPER25": { - "preemphasis": { - "lane0": "0x45808", - "lane1": "0x45808", - "lane2": "0x45808", - "lane3": "0x45808" - } - }, "OPTICAL10": { "preemphasis": { "lane0": "0x14410a", @@ -315,14 +243,6 @@ "lane3": "0x105004" } }, - "COPPER25": { - "preemphasis": { - "lane0": "0x45808", - "lane1": "0x45808", - "lane2": "0x45808", - "lane3": "0x45808" - } - }, "OPTICAL10": { "preemphasis": { "lane0": "0x14410a", @@ -349,14 +269,6 @@ "lane3": "0x105004" } }, - "COPPER25": { - "preemphasis": { - "lane0": "0x580c", - "lane1": "0x580c", - "lane2": "0x580c", - "lane3": "0x580c" - } - }, "OPTICAL10": { "preemphasis": { "lane0": "0x14410a", @@ -383,14 +295,6 @@ "lane3": "0x105004" } }, - "COPPER25": { - "preemphasis": { - "lane0": "0x580c", - "lane1": "0x580c", - "lane2": "0x580c", - "lane3": "0x580c" - } - }, "OPTICAL10": { "preemphasis": { "lane0": "0x14410a", @@ -417,14 +321,6 @@ "lane3": "0x6004" } }, - "COPPER25": { - "preemphasis": { - "lane0": "0x580c", - "lane1": "0x580c", - "lane2": "0x580c", - "lane3": "0x580c" - } - }, "OPTICAL10": { "preemphasis": { "lane0": "0x410a", @@ -451,14 +347,6 @@ "lane3": "0x6004" } }, - "COPPER25": { - "preemphasis": { - "lane0": "0x580c", - "lane1": "0x580c", - "lane2": "0x580c", - "lane3": "0x580c" - } - }, "OPTICAL10": { "preemphasis": { "lane0": "0x410a", @@ -485,14 +373,6 @@ "lane3": "0x6004" } }, - "COPPER25": { - "preemphasis": { - "lane0": "0x580c", - "lane1": "0x580c", - "lane2": "0x580c", - "lane3": "0x580c" - } - }, "OPTICAL10": { "preemphasis": { "lane0": "0x410a", @@ -519,14 +399,6 @@ "lane3": "0x6004" } }, - "COPPER25": { - "preemphasis": { - "lane0": "0x580c", - "lane1": "0x580c", - "lane2": "0x580c", - "lane3": "0x580c" - } - }, "OPTICAL10": { "preemphasis": { "lane0": "0x410a", @@ -553,14 +425,6 @@ "lane3": "0x6004" } }, - "COPPER25": { - "preemphasis": { - "lane0": "0x580c", - "lane1": "0x580c", - "lane2": "0x580c", - "lane3": "0x580c" - } - }, "OPTICAL10": { "preemphasis": { "lane0": "0x410a", @@ -587,14 +451,6 @@ "lane3": "0x6004" } }, - "COPPER25": { - "preemphasis": { - "lane0": "0x580c", - "lane1": "0x580c", - "lane2": "0x580c", - "lane3": "0x580c" - } - }, "OPTICAL10": { "preemphasis": { "lane0": "0x410a", @@ -621,14 +477,6 @@ "lane3": "0x6004" } }, - "COPPER25": { - "preemphasis": { - "lane0": "0x580c", - "lane1": "0x580c", - "lane2": "0x580c", - "lane3": "0x580c" - } - }, "OPTICAL10": { "preemphasis": { "lane0": "0x410a", @@ -655,14 +503,6 @@ "lane3": "0x6004" } }, - "COPPER25": { - "preemphasis": { - "lane0": "0x580c", - "lane1": "0x580c", - "lane2": "0x580c", - "lane3": "0x580c" - } - }, "OPTICAL10": { "preemphasis": { "lane0": "0x410a", @@ -689,14 +529,6 @@ "lane3": "0x105004" } }, - "COPPER25": { - "preemphasis": { - "lane0": "0x580c", - "lane1": "0x580c", - "lane2": "0x580c", - "lane3": "0x580c" - } - }, "OPTICAL10": { "preemphasis": { "lane0": "0x14410a", @@ -723,14 +555,6 @@ "lane3": "0x105004" } }, - "COPPER25": { - "preemphasis": { - "lane0": "0x580c", - "lane1": "0x580c", - "lane2": "0x580c", - "lane3": "0x580c" - } - }, "OPTICAL10": { "preemphasis": { "lane0": "0x14410a", @@ -757,14 +581,6 @@ "lane3": "0x105004" } }, - "COPPER25": { - "preemphasis": { - "lane0": "0x580c", - "lane1": "0x580c", - "lane2": "0x580c", - "lane3": "0x580c" - } - }, "OPTICAL10": { "preemphasis": { "lane0": "0x14410a", @@ -791,14 +607,6 @@ "lane3": "0x105004" } }, - "COPPER25": { - "preemphasis": { - "lane0": "0x580c", - "lane1": "0x580c", - "lane2": "0x580c", - "lane3": "0x580c" - } - }, "OPTICAL10": { "preemphasis": { "lane0": "0x14410a", @@ -825,14 +633,6 @@ "lane3": "0x105004" } }, - "COPPER25": { - "preemphasis": { - "lane0": "0x580c", - "lane1": "0x580c", - "lane2": "0x580c", - "lane3": "0x580c" - } - }, "OPTICAL10": { "preemphasis": { "lane0": "0x14410a", @@ -859,14 +659,6 @@ "lane3": "0x105004" } }, - "COPPER25": { - "preemphasis": { - "lane0": "0x580c", - "lane1": "0x580c", - "lane2": "0x580c", - "lane3": "0x580c" - } - }, "OPTICAL10": { "preemphasis": { "lane0": "0x14410a", @@ -893,14 +685,6 @@ "lane3": "0x105004" } }, - "COPPER25": { - "preemphasis": { - "lane0": "0x85804", - "lane1": "0x85804", - "lane2": "0x85804", - "lane3": "0x85804" - } - }, "OPTICAL10": { "preemphasis": { "lane0": "0x14410a", @@ -927,14 +711,6 @@ "lane3": "0x105004" } }, - "COPPER25": { - "preemphasis": { - "lane0": "0x85804", - "lane1": "0x85804", - "lane2": "0x85804", - "lane3": "0x85804" - } - }, "OPTICAL10": { "preemphasis": { "lane0": "0x14410a", @@ -961,14 +737,6 @@ "lane3": "0x105004" } }, - "COPPER25": { - "preemphasis": { - "lane0": "0x85804", - "lane1": "0x85804", - "lane2": "0x85804", - "lane3": "0x85804" - } - }, "OPTICAL10": { "preemphasis": { "lane0": "0x14410a", @@ -995,14 +763,6 @@ "lane3": "0x105004" } }, - "COPPER25": { - "preemphasis": { - "lane0": "0x85804", - "lane1": "0x85804", - "lane2": "0x85804", - "lane3": "0x85804" - } - }, "OPTICAL10": { "preemphasis": { "lane0": "0x14410a", @@ -1029,14 +789,6 @@ "lane3": "0x105004" } }, - "COPPER25": { - "preemphasis": { - "lane0": "0x85804", - "lane1": "0x85804", - "lane2": "0x85804", - "lane3": "0x85804" - } - }, "OPTICAL10": { "preemphasis": { "lane0": "0x14410a", @@ -1063,14 +815,6 @@ "lane3": "0x105004" } }, - "COPPER25": { - "preemphasis": { - "lane0": "0x85804", - "lane1": "0x85804", - "lane2": "0x85804", - "lane3": "0x85804" - } - }, "OPTICAL10": { "preemphasis": { "lane0": "0x14410a", diff --git a/device/arista/x86_64-arista_7050sx3_48yc8/Arista-7050SX3-48YC8-S48Q8/hwsku.json b/device/arista/x86_64-arista_7050sx3_48yc8/Arista-7050SX3-48YC8-S48Q8/hwsku.json new file mode 100644 index 00000000000..5d0f6c1fe39 --- /dev/null +++ b/device/arista/x86_64-arista_7050sx3_48yc8/Arista-7050SX3-48YC8-S48Q8/hwsku.json @@ -0,0 +1,172 @@ +{ + "interfaces": { + "Ethernet0": { + "default_brkout_mode": "1x10G" + }, + "Ethernet1": { + "default_brkout_mode": "1x10G" + }, + "Ethernet2": { + "default_brkout_mode": "1x10G" + }, + "Ethernet3": { + "default_brkout_mode": "1x10G" + }, + "Ethernet4": { + "default_brkout_mode": "1x10G" + }, + "Ethernet5": { + "default_brkout_mode": "1x10G" + }, + "Ethernet6": { + "default_brkout_mode": "1x10G" + }, + "Ethernet7": { + "default_brkout_mode": "1x10G" + }, + "Ethernet8": { + "default_brkout_mode": "1x10G" + }, + "Ethernet9": { + "default_brkout_mode": "1x10G" + }, + "Ethernet10": { + "default_brkout_mode": "1x10G" + }, + "Ethernet11": { + "default_brkout_mode": "1x10G" + }, + "Ethernet12": { + "default_brkout_mode": "1x10G" + }, + "Ethernet13": { + "default_brkout_mode": "1x10G" + }, + "Ethernet14": { + "default_brkout_mode": "1x10G" + }, + "Ethernet15": { + "default_brkout_mode": "1x10G" + }, + "Ethernet16": { + "default_brkout_mode": "1x10G" + }, + "Ethernet17": { + "default_brkout_mode": "1x10G" + }, + "Ethernet18": { + "default_brkout_mode": "1x10G" + }, + "Ethernet19": { + "default_brkout_mode": "1x10G" + }, + "Ethernet20": { + "default_brkout_mode": "1x10G" + }, + "Ethernet21": { + "default_brkout_mode": "1x10G" + }, + "Ethernet22": { + "default_brkout_mode": "1x10G" + }, + "Ethernet23": { + "default_brkout_mode": "1x10G" + }, + "Ethernet24": { + "default_brkout_mode": "1x10G" + }, + "Ethernet25": { + "default_brkout_mode": "1x10G" + }, + "Ethernet26": { + "default_brkout_mode": "1x10G" + }, + "Ethernet27": { + "default_brkout_mode": "1x10G" + }, + "Ethernet28": { + "default_brkout_mode": "1x10G" + }, + "Ethernet29": { + "default_brkout_mode": "1x10G" + }, + "Ethernet30": { + "default_brkout_mode": "1x10G" + }, + "Ethernet31": { + "default_brkout_mode": "1x10G" + }, + "Ethernet32": { + "default_brkout_mode": "1x10G" + }, + "Ethernet33": { + "default_brkout_mode": "1x10G" + }, + "Ethernet34": { + "default_brkout_mode": "1x10G" + }, + "Ethernet35": { + "default_brkout_mode": "1x10G" + }, + "Ethernet36": { + "default_brkout_mode": "1x10G" + }, + "Ethernet37": { + "default_brkout_mode": "1x10G" + }, + "Ethernet38": { + "default_brkout_mode": "1x10G" + }, + "Ethernet39": { + "default_brkout_mode": "1x10G" + }, + "Ethernet40": { + "default_brkout_mode": "1x10G" + }, + "Ethernet41": { + "default_brkout_mode": "1x10G" + }, + "Ethernet42": { + "default_brkout_mode": "1x10G" + }, + "Ethernet43": { + "default_brkout_mode": "1x10G" + }, + "Ethernet44": { + "default_brkout_mode": "1x10G" + }, + "Ethernet45": { + "default_brkout_mode": "1x10G" + }, + "Ethernet46": { + "default_brkout_mode": "1x10G" + }, + "Ethernet47": { + "default_brkout_mode": "1x10G" + }, + "Ethernet48": { + "default_brkout_mode": "1x40G" + }, + "Ethernet52": { + "default_brkout_mode": "1x40G" + }, + "Ethernet56": { + "default_brkout_mode": "1x40G" + }, + "Ethernet60": { + "default_brkout_mode": "1x40G" + }, + "Ethernet64": { + "default_brkout_mode": "1x40G" + }, + "Ethernet68": { + "default_brkout_mode": "1x40G" + }, + "Ethernet72": { + "default_brkout_mode": "1x40G" + }, + "Ethernet76": { + "default_brkout_mode": "1x40G" + } + } +} diff --git a/device/arista/x86_64-arista_7050sx3_48yc8/Arista-7050SX3-48YC8-S48Q8/port_config.ini b/device/arista/x86_64-arista_7050sx3_48yc8/Arista-7050SX3-48YC8-S48Q8/port_config.ini new file mode 100644 index 00000000000..b6205c9bcfc --- /dev/null +++ b/device/arista/x86_64-arista_7050sx3_48yc8/Arista-7050SX3-48YC8-S48Q8/port_config.ini @@ -0,0 +1,57 @@ +# name lanes alias index speed +Ethernet0 1 Ethernet1 1 10000 +Ethernet1 2 Ethernet2 2 10000 +Ethernet2 3 Ethernet3 3 10000 +Ethernet3 4 Ethernet4 4 10000 +Ethernet4 5 Ethernet5 5 10000 +Ethernet5 6 Ethernet6 6 10000 +Ethernet6 7 Ethernet7 7 10000 +Ethernet7 8 Ethernet8 8 10000 +Ethernet8 9 Ethernet9 9 10000 +Ethernet9 10 Ethernet10 10 10000 +Ethernet10 11 Ethernet11 11 10000 +Ethernet11 12 Ethernet12 12 10000 +Ethernet12 13 Ethernet13 13 10000 +Ethernet13 14 Ethernet14 14 10000 +Ethernet14 15 Ethernet15 15 10000 +Ethernet15 16 Ethernet16 16 10000 +Ethernet16 17 Ethernet17 17 10000 +Ethernet17 18 Ethernet18 18 10000 +Ethernet18 19 Ethernet19 19 10000 +Ethernet19 20 Ethernet20 20 10000 +Ethernet20 21 Ethernet21 21 10000 +Ethernet21 22 Ethernet22 22 10000 +Ethernet22 23 Ethernet23 23 10000 +Ethernet23 24 Ethernet24 24 10000 +Ethernet24 57 Ethernet25 25 10000 +Ethernet25 58 Ethernet26 26 10000 +Ethernet26 59 Ethernet27 27 10000 +Ethernet27 60 Ethernet28 28 10000 +Ethernet28 61 Ethernet29 29 10000 +Ethernet29 62 Ethernet30 30 10000 +Ethernet30 63 Ethernet31 31 10000 +Ethernet31 64 Ethernet32 32 10000 +Ethernet32 65 Ethernet33 33 10000 +Ethernet33 66 Ethernet34 34 10000 +Ethernet34 67 Ethernet35 35 10000 +Ethernet35 68 Ethernet36 36 10000 +Ethernet36 69 Ethernet37 37 10000 +Ethernet37 70 Ethernet38 38 10000 +Ethernet38 71 Ethernet39 39 10000 +Ethernet39 72 Ethernet40 40 10000 +Ethernet40 73 Ethernet41 41 10000 +Ethernet41 74 Ethernet42 42 10000 +Ethernet42 75 Ethernet43 43 10000 +Ethernet43 76 Ethernet44 44 10000 +Ethernet44 77 Ethernet45 45 10000 +Ethernet45 78 Ethernet46 46 10000 +Ethernet46 79 Ethernet47 47 10000 +Ethernet47 80 Ethernet48 48 10000 +Ethernet48 25,26,27,28 Ethernet49/1 49 40000 +Ethernet52 29,30,31,32 Ethernet50/1 50 40000 +Ethernet56 33,34,35,36 Ethernet51/1 51 40000 +Ethernet60 37,38,39,40 Ethernet52/1 52 40000 +Ethernet64 41,42,43,44 Ethernet53/1 53 40000 +Ethernet68 45,46,47,48 Ethernet54/1 54 40000 +Ethernet72 49,50,51,52 Ethernet55/1 55 40000 +Ethernet76 53,54,55,56 Ethernet56/1 56 40000 diff --git a/device/arista/x86_64-arista_7050sx3_48yc8/Arista-7050SX3-48YC8-S48Q8/sai.profile b/device/arista/x86_64-arista_7050sx3_48yc8/Arista-7050SX3-48YC8-S48Q8/sai.profile new file mode 100644 index 00000000000..5d6f1a07e53 --- /dev/null +++ b/device/arista/x86_64-arista_7050sx3_48yc8/Arista-7050SX3-48YC8-S48Q8/sai.profile @@ -0,0 +1,2 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td3-a7050sx3_48yc8-48x10G+8x40G.config.bcm +SAI_NUM_ECMP_MEMBERS=64 diff --git a/device/arista/x86_64-arista_7050sx3_48yc8/Arista-7050SX3-48YC8-S48Q8/td3-a7050sx3_48yc8-48x10G+8x40G.config.bcm b/device/arista/x86_64-arista_7050sx3_48yc8/Arista-7050SX3-48YC8-S48Q8/td3-a7050sx3_48yc8-48x10G+8x40G.config.bcm new file mode 100644 index 00000000000..0de133883cd --- /dev/null +++ b/device/arista/x86_64-arista_7050sx3_48yc8/Arista-7050SX3-48YC8-S48Q8/td3-a7050sx3_48yc8-48x10G+8x40G.config.bcm @@ -0,0 +1,541 @@ +PHY_AN_ALLOW_PLL_CHANGE=1 +arl_clean_timeout_usec=15000000 +asf_mem_profile=2 +bcm_num_cos=10 +bcm_stat_flags=1 +bcm_stat_jumbo=9236 +bcm_tunnel_term_compatible_mode=1 +cdma_timeout_usec=15000000 +core_clock_frequency=1525 +dma_desc_timeout_usec=15000000 +dpp_clock_ratio=2:3 +fpem_mem_entries=0 +higig2_hdr_mode=1 +ifp_inports_support_enable=1 +ipv6_lpm_128b_enable=1 +l2xmsg_mode=1 +l2_mem_entries=32768 +l3_alpm_enable=2 +l3_max_ecmp_mode=1 +l3_mem_entries=16384 +max_vp_lags=0 +miim_intr_enable=0 +module_64ports=1 +multicast_l2_range=16383 +multicast_l3_range=0 +os=unix +oversubscribe_mode=1 +pbmp_xport_xe=0x1ffffffe1ffffffe +phy_an_c73_1=1 +phy_an_c73_2=1 +phy_an_c73_3=1 +phy_an_c73_4=1 +phy_an_c73_5=1 +phy_an_c73_6=1 +phy_an_c73_7=1 +phy_an_c73_8=1 +phy_an_c73_9=1 +phy_an_c73_10=1 +phy_an_c73_11=1 +phy_an_c73_12=1 +phy_an_c73_13=1 +phy_an_c73_14=1 +phy_an_c73_15=1 +phy_an_c73_16=1 +phy_an_c73_17=1 +phy_an_c73_18=1 +phy_an_c73_19=1 +phy_an_c73_20=1 +phy_an_c73_21=1 +phy_an_c73_22=1 +phy_an_c73_23=1 +phy_an_c73_24=1 +phy_an_c73_25=0 +phy_an_c73_26=0 +phy_an_c73_27=0 +phy_an_c73_28=0 +phy_an_c73_33=1 +phy_an_c73_34=1 +phy_an_c73_35=1 +phy_an_c73_36=1 +phy_an_c73_37=1 +phy_an_c73_38=1 +phy_an_c73_39=1 +phy_an_c73_40=1 +phy_an_c73_41=1 +phy_an_c73_42=1 +phy_an_c73_43=1 +phy_an_c73_44=1 +phy_an_c73_45=1 +phy_an_c73_46=1 +phy_an_c73_47=1 +phy_an_c73_48=1 +phy_an_c73_49=1 +phy_an_c73_50=1 +phy_an_c73_51=1 +phy_an_c73_52=1 +phy_an_c73_53=1 +phy_an_c73_54=1 +phy_an_c73_55=1 +phy_an_c73_56=1 +phy_an_c73_57=0 +phy_an_c73_58=0 +phy_an_c73_59=0 +phy_an_c73_60=0 +phy_chain_rx_lane_map_physical{1.0}=0x0123 +phy_chain_rx_lane_map_physical{5.0}=0x0123 +phy_chain_rx_lane_map_physical{9.0}=0x0123 +phy_chain_rx_lane_map_physical{13.0}=0x0123 +phy_chain_rx_lane_map_physical{17.0}=0x0123 +phy_chain_rx_lane_map_physical{21.0}=0x0123 +phy_chain_rx_lane_map_physical{25.0}=0x0213 +phy_chain_rx_lane_map_physical{29.0}=0x2031 +phy_chain_rx_lane_map_physical{33.0}=0x1302 +phy_chain_rx_lane_map_physical{37.0}=0x3120 +phy_chain_rx_lane_map_physical{41.0}=0x2031 +phy_chain_rx_lane_map_physical{45.0}=0x0213 +phy_chain_rx_lane_map_physical{49.0}=0x2031 +phy_chain_rx_lane_map_physical{53.0}=0x0213 +phy_chain_rx_lane_map_physical{57.0}=0x3210 +phy_chain_rx_lane_map_physical{61.0}=0x3210 +phy_chain_rx_lane_map_physical{65.0}=0x3210 +phy_chain_rx_lane_map_physical{69.0}=0x3210 +phy_chain_rx_lane_map_physical{73.0}=0x3210 +phy_chain_rx_lane_map_physical{77.0}=0x3210 +phy_chain_rx_polarity_flip_physical{1.0}=0x0 +phy_chain_rx_polarity_flip_physical{2.0}=0x1 +phy_chain_rx_polarity_flip_physical{3.0}=0x0 +phy_chain_rx_polarity_flip_physical{4.0}=0x1 +phy_chain_rx_polarity_flip_physical{5.0}=0x1 +phy_chain_rx_polarity_flip_physical{6.0}=0x0 +phy_chain_rx_polarity_flip_physical{7.0}=0x1 +phy_chain_rx_polarity_flip_physical{8.0}=0x0 +phy_chain_rx_polarity_flip_physical{9.0}=0x1 +phy_chain_rx_polarity_flip_physical{10.0}=0x0 +phy_chain_rx_polarity_flip_physical{11.0}=0x1 +phy_chain_rx_polarity_flip_physical{12.0}=0x0 +phy_chain_rx_polarity_flip_physical{13.0}=0x1 +phy_chain_rx_polarity_flip_physical{14.0}=0x0 +phy_chain_rx_polarity_flip_physical{15.0}=0x1 +phy_chain_rx_polarity_flip_physical{16.0}=0x0 +phy_chain_rx_polarity_flip_physical{17.0}=0x0 +phy_chain_rx_polarity_flip_physical{18.0}=0x1 +phy_chain_rx_polarity_flip_physical{19.0}=0x0 +phy_chain_rx_polarity_flip_physical{20.0}=0x1 +phy_chain_rx_polarity_flip_physical{21.0}=0x1 +phy_chain_rx_polarity_flip_physical{22.0}=0x0 +phy_chain_rx_polarity_flip_physical{23.0}=0x1 +phy_chain_rx_polarity_flip_physical{24.0}=0x0 +phy_chain_rx_polarity_flip_physical{25.0}=0x0 +phy_chain_rx_polarity_flip_physical{26.0}=0x0 +phy_chain_rx_polarity_flip_physical{27.0}=0x0 +phy_chain_rx_polarity_flip_physical{28.0}=0x0 +phy_chain_rx_polarity_flip_physical{29.0}=0x0 +phy_chain_rx_polarity_flip_physical{30.0}=0x0 +phy_chain_rx_polarity_flip_physical{31.0}=0x1 +phy_chain_rx_polarity_flip_physical{32.0}=0x1 +phy_chain_rx_polarity_flip_physical{33.0}=0x1 +phy_chain_rx_polarity_flip_physical{34.0}=0x1 +phy_chain_rx_polarity_flip_physical{35.0}=0x0 +phy_chain_rx_polarity_flip_physical{36.0}=0x0 +phy_chain_rx_polarity_flip_physical{37.0}=0x1 +phy_chain_rx_polarity_flip_physical{38.0}=0x0 +phy_chain_rx_polarity_flip_physical{39.0}=0x0 +phy_chain_rx_polarity_flip_physical{40.0}=0x0 +phy_chain_rx_polarity_flip_physical{41.0}=0x1 +phy_chain_rx_polarity_flip_physical{42.0}=0x0 +phy_chain_rx_polarity_flip_physical{43.0}=0x0 +phy_chain_rx_polarity_flip_physical{44.0}=0x1 +phy_chain_rx_polarity_flip_physical{45.0}=0x1 +phy_chain_rx_polarity_flip_physical{46.0}=0x0 +phy_chain_rx_polarity_flip_physical{47.0}=0x0 +phy_chain_rx_polarity_flip_physical{48.0}=0x1 +phy_chain_rx_polarity_flip_physical{49.0}=0x0 +phy_chain_rx_polarity_flip_physical{50.0}=0x0 +phy_chain_rx_polarity_flip_physical{51.0}=0x0 +phy_chain_rx_polarity_flip_physical{52.0}=0x1 +phy_chain_rx_polarity_flip_physical{53.0}=0x1 +phy_chain_rx_polarity_flip_physical{54.0}=0x0 +phy_chain_rx_polarity_flip_physical{55.0}=0x0 +phy_chain_rx_polarity_flip_physical{56.0}=0x1 +phy_chain_rx_polarity_flip_physical{57.0}=0x0 +phy_chain_rx_polarity_flip_physical{58.0}=0x1 +phy_chain_rx_polarity_flip_physical{59.0}=0x0 +phy_chain_rx_polarity_flip_physical{60.0}=0x1 +phy_chain_rx_polarity_flip_physical{61.0}=0x1 +phy_chain_rx_polarity_flip_physical{62.0}=0x0 +phy_chain_rx_polarity_flip_physical{63.0}=0x1 +phy_chain_rx_polarity_flip_physical{64.0}=0x0 +phy_chain_rx_polarity_flip_physical{65.0}=0x0 +phy_chain_rx_polarity_flip_physical{66.0}=0x1 +phy_chain_rx_polarity_flip_physical{67.0}=0x0 +phy_chain_rx_polarity_flip_physical{68.0}=0x1 +phy_chain_rx_polarity_flip_physical{69.0}=0x0 +phy_chain_rx_polarity_flip_physical{70.0}=0x1 +phy_chain_rx_polarity_flip_physical{71.0}=0x0 +phy_chain_rx_polarity_flip_physical{72.0}=0x1 +phy_chain_rx_polarity_flip_physical{73.0}=0x0 +phy_chain_rx_polarity_flip_physical{74.0}=0x1 +phy_chain_rx_polarity_flip_physical{75.0}=0x0 +phy_chain_rx_polarity_flip_physical{76.0}=0x1 +phy_chain_rx_polarity_flip_physical{77.0}=0x1 +phy_chain_rx_polarity_flip_physical{78.0}=0x0 +phy_chain_rx_polarity_flip_physical{79.0}=0x1 +phy_chain_rx_polarity_flip_physical{80.0}=0x0 +phy_chain_tx_lane_map_physical{1.0}=0x0123 +phy_chain_tx_lane_map_physical{5.0}=0x0123 +phy_chain_tx_lane_map_physical{9.0}=0x0123 +phy_chain_tx_lane_map_physical{13.0}=0x0123 +phy_chain_tx_lane_map_physical{17.0}=0x0123 +phy_chain_tx_lane_map_physical{21.0}=0x0123 +phy_chain_tx_lane_map_physical{25.0}=0x0123 +phy_chain_tx_lane_map_physical{29.0}=0x3210 +phy_chain_tx_lane_map_physical{33.0}=0x0123 +phy_chain_tx_lane_map_physical{37.0}=0x3201 +phy_chain_tx_lane_map_physical{41.0}=0x3201 +phy_chain_tx_lane_map_physical{45.0}=0x0123 +phy_chain_tx_lane_map_physical{49.0}=0x3201 +phy_chain_tx_lane_map_physical{53.0}=0x0132 +phy_chain_tx_lane_map_physical{57.0}=0x3210 +phy_chain_tx_lane_map_physical{61.0}=0x3210 +phy_chain_tx_lane_map_physical{65.0}=0x3210 +phy_chain_tx_lane_map_physical{69.0}=0x3210 +phy_chain_tx_lane_map_physical{73.0}=0x3210 +phy_chain_tx_lane_map_physical{77.0}=0x3210 +phy_chain_tx_polarity_flip_physical{1.0}=0x0 +phy_chain_tx_polarity_flip_physical{2.0}=0x0 +phy_chain_tx_polarity_flip_physical{3.0}=0x0 +phy_chain_tx_polarity_flip_physical{4.0}=0x0 +phy_chain_tx_polarity_flip_physical{5.0}=0x0 +phy_chain_tx_polarity_flip_physical{6.0}=0x0 +phy_chain_tx_polarity_flip_physical{7.0}=0x0 +phy_chain_tx_polarity_flip_physical{8.0}=0x0 +phy_chain_tx_polarity_flip_physical{9.0}=0x0 +phy_chain_tx_polarity_flip_physical{10.0}=0x0 +phy_chain_tx_polarity_flip_physical{11.0}=0x0 +phy_chain_tx_polarity_flip_physical{12.0}=0x0 +phy_chain_tx_polarity_flip_physical{13.0}=0x0 +phy_chain_tx_polarity_flip_physical{14.0}=0x0 +phy_chain_tx_polarity_flip_physical{15.0}=0x0 +phy_chain_tx_polarity_flip_physical{16.0}=0x0 +phy_chain_tx_polarity_flip_physical{17.0}=0x0 +phy_chain_tx_polarity_flip_physical{18.0}=0x0 +phy_chain_tx_polarity_flip_physical{19.0}=0x0 +phy_chain_tx_polarity_flip_physical{20.0}=0x0 +phy_chain_tx_polarity_flip_physical{21.0}=0x0 +phy_chain_tx_polarity_flip_physical{22.0}=0x0 +phy_chain_tx_polarity_flip_physical{23.0}=0x0 +phy_chain_tx_polarity_flip_physical{24.0}=0x0 +phy_chain_tx_polarity_flip_physical{25.0}=0x0 +phy_chain_tx_polarity_flip_physical{26.0}=0x0 +phy_chain_tx_polarity_flip_physical{27.0}=0x0 +phy_chain_tx_polarity_flip_physical{28.0}=0x0 +phy_chain_tx_polarity_flip_physical{29.0}=0x0 +phy_chain_tx_polarity_flip_physical{30.0}=0x0 +phy_chain_tx_polarity_flip_physical{31.0}=0x0 +phy_chain_tx_polarity_flip_physical{32.0}=0x0 +phy_chain_tx_polarity_flip_physical{33.0}=0x0 +phy_chain_tx_polarity_flip_physical{34.0}=0x0 +phy_chain_tx_polarity_flip_physical{35.0}=0x0 +phy_chain_tx_polarity_flip_physical{36.0}=0x0 +phy_chain_tx_polarity_flip_physical{37.0}=0x0 +phy_chain_tx_polarity_flip_physical{38.0}=0x0 +phy_chain_tx_polarity_flip_physical{39.0}=0x0 +phy_chain_tx_polarity_flip_physical{40.0}=0x1 +phy_chain_tx_polarity_flip_physical{41.0}=0x0 +phy_chain_tx_polarity_flip_physical{42.0}=0x0 +phy_chain_tx_polarity_flip_physical{43.0}=0x0 +phy_chain_tx_polarity_flip_physical{44.0}=0x0 +phy_chain_tx_polarity_flip_physical{45.0}=0x0 +phy_chain_tx_polarity_flip_physical{46.0}=0x0 +phy_chain_tx_polarity_flip_physical{47.0}=0x0 +phy_chain_tx_polarity_flip_physical{48.0}=0x1 +phy_chain_tx_polarity_flip_physical{49.0}=0x1 +phy_chain_tx_polarity_flip_physical{50.0}=0x0 +phy_chain_tx_polarity_flip_physical{51.0}=0x0 +phy_chain_tx_polarity_flip_physical{52.0}=0x0 +phy_chain_tx_polarity_flip_physical{53.0}=0x0 +phy_chain_tx_polarity_flip_physical{54.0}=0x0 +phy_chain_tx_polarity_flip_physical{55.0}=0x0 +phy_chain_tx_polarity_flip_physical{56.0}=0x0 +phy_chain_tx_polarity_flip_physical{57.0}=0x1 +phy_chain_tx_polarity_flip_physical{58.0}=0x1 +phy_chain_tx_polarity_flip_physical{59.0}=0x1 +phy_chain_tx_polarity_flip_physical{60.0}=0x1 +phy_chain_tx_polarity_flip_physical{61.0}=0x1 +phy_chain_tx_polarity_flip_physical{62.0}=0x1 +phy_chain_tx_polarity_flip_physical{63.0}=0x1 +phy_chain_tx_polarity_flip_physical{64.0}=0x0 +phy_chain_tx_polarity_flip_physical{65.0}=0x0 +phy_chain_tx_polarity_flip_physical{66.0}=0x0 +phy_chain_tx_polarity_flip_physical{67.0}=0x0 +phy_chain_tx_polarity_flip_physical{68.0}=0x0 +phy_chain_tx_polarity_flip_physical{69.0}=0x0 +phy_chain_tx_polarity_flip_physical{70.0}=0x0 +phy_chain_tx_polarity_flip_physical{71.0}=0x0 +phy_chain_tx_polarity_flip_physical{72.0}=0x0 +phy_chain_tx_polarity_flip_physical{73.0}=0x0 +phy_chain_tx_polarity_flip_physical{74.0}=0x0 +phy_chain_tx_polarity_flip_physical{75.0}=0x0 +phy_chain_tx_polarity_flip_physical{76.0}=0x0 +phy_chain_tx_polarity_flip_physical{77.0}=0x0 +phy_chain_tx_polarity_flip_physical{78.0}=0x0 +phy_chain_tx_polarity_flip_physical{79.0}=0x0 +phy_chain_tx_polarity_flip_physical{80.0}=0x0 +portmap_1=1:10 +portmap_2=2:10 +portmap_3=3:10 +portmap_4=4:10 +portmap_5=5:10 +portmap_6=6:10 +portmap_7=7:10 +portmap_8=8:10 +portmap_9=9:10 +portmap_10=10:10 +portmap_11=11:10 +portmap_12=12:10 +portmap_13=13:10 +portmap_14=14:10 +portmap_15=15:10 +portmap_16=16:10 +portmap_17=17:10 +portmap_18=18:10 +portmap_19=19:10 +portmap_20=20:10 +portmap_21=21:10 +portmap_22=22:10 +portmap_23=23:10 +portmap_24=24:10 +portmap_25=25:40 +portmap_26=29:40 +portmap_27=33:40 +portmap_28=37:40 +portmap_33=57:10 +portmap_34=58:10 +portmap_35=59:10 +portmap_36=60:10 +portmap_37=61:10 +portmap_38=62:10 +portmap_39=63:10 +portmap_40=64:10 +portmap_41=65:10 +portmap_42=66:10 +portmap_43=67:10 +portmap_44=68:10 +portmap_45=69:10 +portmap_46=70:10 +portmap_47=71:10 +portmap_48=72:10 +portmap_49=73:10 +portmap_50=74:10 +portmap_51=75:10 +portmap_52=76:10 +portmap_53=77:10 +portmap_54=78:10 +portmap_55=79:10 +portmap_56=80:10 +portmap_57=41:40 +portmap_58=45:40 +portmap_59=49:40 +portmap_60=53:40 +port_flex_enable=1 +port_init_autoneg_1=0 +port_init_autoneg_5=0 +port_init_autoneg_9=0 +port_init_autoneg_13=0 +port_init_autoneg_17=0 +port_init_autoneg_21=0 +port_init_autoneg_25=0 +port_init_autoneg_26=0 +port_init_autoneg_27=0 +port_init_autoneg_28=0 +port_init_autoneg_33=0 +port_init_autoneg_37=0 +port_init_autoneg_41=0 +port_init_autoneg_45=0 +port_init_autoneg_49=0 +port_init_autoneg_53=0 +port_init_autoneg_57=0 +port_init_autoneg_58=0 +port_init_autoneg_59=0 +port_init_autoneg_60=0 +port_phy_addr_1=0xff +port_phy_addr_5=0xff +port_phy_addr_9=0xff +port_phy_addr_13=0xff +port_phy_addr_17=0xff +port_phy_addr_21=0xff +port_phy_addr_25=0xff +port_phy_addr_26=0xff +port_phy_addr_27=0xff +port_phy_addr_28=0xff +port_phy_addr_33=0xff +port_phy_addr_37=0xff +port_phy_addr_41=0xff +port_phy_addr_45=0xff +port_phy_addr_49=0xff +port_phy_addr_53=0xff +port_phy_addr_57=0xff +port_phy_addr_58=0xff +port_phy_addr_59=0xff +port_phy_addr_60=0xff +robust_hash_disable_egress_vlan=1 +robust_hash_disable_mpls=1 +robust_hash_disable_vlan=1 +serdes_core_rx_polarity_flip_physical{1}=0xa +serdes_core_rx_polarity_flip_physical{5}=0x5 +serdes_core_rx_polarity_flip_physical{9}=0x5 +serdes_core_rx_polarity_flip_physical{13}=0x5 +serdes_core_rx_polarity_flip_physical{17}=0xa +serdes_core_rx_polarity_flip_physical{21}=0x5 +serdes_core_rx_polarity_flip_physical{25}=0x0 +serdes_core_rx_polarity_flip_physical{29}=0xc +serdes_core_rx_polarity_flip_physical{33}=0x3 +serdes_core_rx_polarity_flip_physical{37}=0x1 +serdes_core_rx_polarity_flip_physical{41}=0x9 +serdes_core_rx_polarity_flip_physical{45}=0x9 +serdes_core_rx_polarity_flip_physical{49}=0x8 +serdes_core_rx_polarity_flip_physical{53}=0x9 +serdes_core_rx_polarity_flip_physical{57}=0xa +serdes_core_rx_polarity_flip_physical{61}=0x5 +serdes_core_rx_polarity_flip_physical{65}=0xa +serdes_core_rx_polarity_flip_physical{69}=0xa +serdes_core_rx_polarity_flip_physical{73}=0xa +serdes_core_rx_polarity_flip_physical{77}=0x5 +serdes_core_tx_polarity_flip_physical{1}=0x0 +serdes_core_tx_polarity_flip_physical{5}=0x0 +serdes_core_tx_polarity_flip_physical{9}=0x0 +serdes_core_tx_polarity_flip_physical{13}=0x0 +serdes_core_tx_polarity_flip_physical{17}=0x0 +serdes_core_tx_polarity_flip_physical{21}=0x0 +serdes_core_tx_polarity_flip_physical{25}=0x0 +serdes_core_tx_polarity_flip_physical{29}=0x0 +serdes_core_tx_polarity_flip_physical{33}=0x0 +serdes_core_tx_polarity_flip_physical{37}=0x8 +serdes_core_tx_polarity_flip_physical{41}=0x0 +serdes_core_tx_polarity_flip_physical{45}=0x8 +serdes_core_tx_polarity_flip_physical{49}=0x1 +serdes_core_tx_polarity_flip_physical{53}=0x0 +serdes_core_tx_polarity_flip_physical{57}=0xf +serdes_core_tx_polarity_flip_physical{61}=0x7 +serdes_core_tx_polarity_flip_physical{65}=0x0 +serdes_core_tx_polarity_flip_physical{69}=0x0 +serdes_core_tx_polarity_flip_physical{73}=0x0 +serdes_core_tx_polarity_flip_physical{77}=0x0 +tdma_timeout_usec=15000000 +tslam_timeout_usec=15000000 +disable_pcie_firmware_check=1 + +# tuning +serdes_driver_current_1=0xf +serdes_driver_current_2=0xf +serdes_driver_current_3=0xf +serdes_driver_current_4=0xf +serdes_driver_current_5=0xf +serdes_driver_current_6=0xf +serdes_driver_current_7=0xf +serdes_driver_current_8=0xf +serdes_driver_current_9=0xf +serdes_driver_current_10=0xf +serdes_driver_current_11=0xf +serdes_driver_current_12=0xf +serdes_driver_current_13=0xf +serdes_driver_current_14=0xf +serdes_driver_current_15=0xf +serdes_driver_current_16=0xf +serdes_driver_current_17=0xf +serdes_driver_current_18=0xf +serdes_driver_current_19=0xf +serdes_driver_current_20=0xf +serdes_driver_current_21=0xf +serdes_driver_current_22=0xf +serdes_driver_current_23=0xf +serdes_driver_current_24=0xf +serdes_driver_current_25=0xf +serdes_driver_current_26=0xf +serdes_driver_current_27=0xf +serdes_driver_current_28=0xf +serdes_driver_current_33=0xf +serdes_driver_current_34=0xf +serdes_driver_current_35=0xf +serdes_driver_current_36=0xf +serdes_driver_current_37=0xf +serdes_driver_current_38=0xf +serdes_driver_current_39=0xf +serdes_driver_current_40=0xf +serdes_driver_current_41=0xf +serdes_driver_current_42=0xf +serdes_driver_current_43=0xf +serdes_driver_current_44=0xf +serdes_driver_current_45=0xf +serdes_driver_current_46=0xf +serdes_driver_current_47=0xf +serdes_driver_current_48=0xf +serdes_driver_current_49=0xf +serdes_driver_current_50=0xf +serdes_driver_current_51=0xf +serdes_driver_current_52=0xf +serdes_driver_current_53=0xf +serdes_driver_current_54=0xf +serdes_driver_current_55=0xf +serdes_driver_current_56=0xf +serdes_driver_current_57=0xf +serdes_driver_current_58=0xf +serdes_driver_current_59=0xf +serdes_driver_current_60=0xf +serdes_preemphasis_1=0x164105 +serdes_preemphasis_2=0x164105 +serdes_preemphasis_3=0x164105 +serdes_preemphasis_4=0x164105 +serdes_preemphasis_5=0x164105 +serdes_preemphasis_6=0x164105 +serdes_preemphasis_7=0x164105 +serdes_preemphasis_8=0x164105 +serdes_preemphasis_9=0x164105 +serdes_preemphasis_10=0x164105 +serdes_preemphasis_11=0x164105 +serdes_preemphasis_12=0x164105 +serdes_preemphasis_13=0x164105 +serdes_preemphasis_14=0x164105 +serdes_preemphasis_15=0x164105 +serdes_preemphasis_16=0x124105 +serdes_preemphasis_17=0x123f05 +serdes_preemphasis_18=0x123f05 +serdes_preemphasis_19=0x123f05 +serdes_preemphasis_20=0x123f05 +serdes_preemphasis_21=0x123f05 +serdes_preemphasis_22=0x123f05 +serdes_preemphasis_23=0x103c05 +serdes_preemphasis_24=0x103c05 +serdes_preemphasis_25=0x82e06 +serdes_preemphasis_26=0x92e05 +serdes_preemphasis_27=0x93006 +serdes_preemphasis_28=0x93006 +serdes_preemphasis_33=0x103c05 +serdes_preemphasis_34=0x103c05 +serdes_preemphasis_35=0x123f05 +serdes_preemphasis_36=0x123f05 +serdes_preemphasis_37=0x123f05 +serdes_preemphasis_38=0x123f05 +serdes_preemphasis_39=0x123f05 +serdes_preemphasis_40=0x123f05 +serdes_preemphasis_41=0x124105 +serdes_preemphasis_42=0x164105 +serdes_preemphasis_43=0x164105 +serdes_preemphasis_44=0x164105 +serdes_preemphasis_45=0x164105 +serdes_preemphasis_46=0x164105 +serdes_preemphasis_47=0x164105 +serdes_preemphasis_48=0x164105 +serdes_preemphasis_49=0x164105 +serdes_preemphasis_50=0x164105 +serdes_preemphasis_51=0x164105 +serdes_preemphasis_52=0x164105 +serdes_preemphasis_53=0x164105 +serdes_preemphasis_54=0x164105 +serdes_preemphasis_55=0x164105 +serdes_preemphasis_56=0x144105 +serdes_preemphasis_57=0x93006 +serdes_preemphasis_58=0x93006 +serdes_preemphasis_59=0x82d05 +serdes_preemphasis_60=0x82d05 diff --git a/device/arista/x86_64-arista_7050sx3_48yc8/Arista-7050SX3-48YC8/buffers_defaults_t0.j2 b/device/arista/x86_64-arista_7050sx3_48yc8/Arista-7050SX3-48YC8/buffers_defaults_t0.j2 deleted file mode 100644 index 20bbd231388..00000000000 --- a/device/arista/x86_64-arista_7050sx3_48yc8/Arista-7050SX3-48YC8/buffers_defaults_t0.j2 +++ /dev/null @@ -1,49 +0,0 @@ -{%- set default_cable = '5m' %} - -{%- macro generate_port_lists(PORT_ALL) %} - {# Generate list of ports #} - {%- for port_idx in range(0,48) %} - {%- if PORT_ALL.append("Ethernet%d" % port_idx) %}{%- endif %} - {%- endfor %} - {%- for port_idx in range(0,8) %} - {%- if PORT_ALL.append("Ethernet%d" % (48 + port_idx * 4)) %}{%- endif %} - {%- endfor %} -{%- endmacro %} - -{%- macro generate_buffer_pool_and_profiles() %} - "BUFFER_POOL": { - "ingress_lossless_pool": { - "size": "10875072", - "type": "ingress", - "mode": "dynamic", - "xoff": "4194112" - }, - "egress_lossy_pool": { - "size": "9243812", - "type": "egress", - "mode": "dynamic" - }, - "egress_lossless_pool": { - "size": "15982720", - "type": "egress", - "mode": "static" - } - }, - "BUFFER_PROFILE": { - "ingress_lossy_profile": { - "pool":"ingress_lossless_pool", - "size":"0", - "dynamic_th":"3" - }, - "egress_lossless_profile": { - "pool":"egress_lossless_pool", - "size":"1518", - "static_th":"15982720" - }, - "egress_lossy_profile": { - "pool":"egress_lossy_pool", - "size":"1518", - "dynamic_th":"3" - } - }, -{%- endmacro %} diff --git a/device/arista/x86_64-arista_7050sx3_48yc8/Arista-7050SX3-48YC8/hwsku.json b/device/arista/x86_64-arista_7050sx3_48yc8/Arista-7050SX3-48YC8/hwsku.json new file mode 100644 index 00000000000..f42a605675d --- /dev/null +++ b/device/arista/x86_64-arista_7050sx3_48yc8/Arista-7050SX3-48YC8/hwsku.json @@ -0,0 +1,172 @@ +{ + "interfaces": { + "Ethernet0": { + "default_brkout_mode": "1x25G" + }, + "Ethernet1": { + "default_brkout_mode": "1x25G" + }, + "Ethernet2": { + "default_brkout_mode": "1x25G" + }, + "Ethernet3": { + "default_brkout_mode": "1x25G" + }, + "Ethernet4": { + "default_brkout_mode": "1x25G" + }, + "Ethernet5": { + "default_brkout_mode": "1x25G" + }, + "Ethernet6": { + "default_brkout_mode": "1x25G" + }, + "Ethernet7": { + "default_brkout_mode": "1x25G" + }, + "Ethernet8": { + "default_brkout_mode": "1x25G" + }, + "Ethernet9": { + "default_brkout_mode": "1x25G" + }, + "Ethernet10": { + "default_brkout_mode": "1x25G" + }, + "Ethernet11": { + "default_brkout_mode": "1x25G" + }, + "Ethernet12": { + "default_brkout_mode": "1x25G" + }, + "Ethernet13": { + "default_brkout_mode": "1x25G" + }, + "Ethernet14": { + "default_brkout_mode": "1x25G" + }, + "Ethernet15": { + "default_brkout_mode": "1x25G" + }, + "Ethernet16": { + "default_brkout_mode": "1x25G" + }, + "Ethernet17": { + "default_brkout_mode": "1x25G" + }, + "Ethernet18": { + "default_brkout_mode": "1x25G" + }, + "Ethernet19": { + "default_brkout_mode": "1x25G" + }, + "Ethernet20": { + "default_brkout_mode": "1x25G" + }, + "Ethernet21": { + "default_brkout_mode": "1x25G" + }, + "Ethernet22": { + "default_brkout_mode": "1x25G" + }, + "Ethernet23": { + "default_brkout_mode": "1x25G" + }, + "Ethernet24": { + "default_brkout_mode": "1x25G" + }, + "Ethernet25": { + "default_brkout_mode": "1x25G" + }, + "Ethernet26": { + "default_brkout_mode": "1x25G" + }, + "Ethernet27": { + "default_brkout_mode": "1x25G" + }, + "Ethernet28": { + "default_brkout_mode": "1x25G" + }, + "Ethernet29": { + "default_brkout_mode": "1x25G" + }, + "Ethernet30": { + "default_brkout_mode": "1x25G" + }, + "Ethernet31": { + "default_brkout_mode": "1x25G" + }, + "Ethernet32": { + "default_brkout_mode": "1x25G" + }, + "Ethernet33": { + "default_brkout_mode": "1x25G" + }, + "Ethernet34": { + "default_brkout_mode": "1x25G" + }, + "Ethernet35": { + "default_brkout_mode": "1x25G" + }, + "Ethernet36": { + "default_brkout_mode": "1x25G" + }, + "Ethernet37": { + "default_brkout_mode": "1x25G" + }, + "Ethernet38": { + "default_brkout_mode": "1x25G" + }, + "Ethernet39": { + "default_brkout_mode": "1x25G" + }, + "Ethernet40": { + "default_brkout_mode": "1x25G" + }, + "Ethernet41": { + "default_brkout_mode": "1x25G" + }, + "Ethernet42": { + "default_brkout_mode": "1x25G" + }, + "Ethernet43": { + "default_brkout_mode": "1x25G" + }, + "Ethernet44": { + "default_brkout_mode": "1x25G" + }, + "Ethernet45": { + "default_brkout_mode": "1x25G" + }, + "Ethernet46": { + "default_brkout_mode": "1x25G" + }, + "Ethernet47": { + "default_brkout_mode": "1x25G" + }, + "Ethernet48": { + "default_brkout_mode": "1x100G" + }, + "Ethernet52": { + "default_brkout_mode": "1x100G" + }, + "Ethernet56": { + "default_brkout_mode": "1x100G" + }, + "Ethernet60": { + "default_brkout_mode": "1x100G" + }, + "Ethernet64": { + "default_brkout_mode": "1x100G" + }, + "Ethernet68": { + "default_brkout_mode": "1x100G" + }, + "Ethernet72": { + "default_brkout_mode": "1x100G" + }, + "Ethernet76": { + "default_brkout_mode": "1x100G" + } + } +} diff --git a/device/arista/x86_64-arista_7050sx3_48yc8/Arista-7050SX3-48YC8/pg_profile_lookup.ini b/device/arista/x86_64-arista_7050sx3_48yc8/Arista-7050SX3-48YC8/pg_profile_lookup.ini deleted file mode 100644 index 0b5d680edda..00000000000 --- a/device/arista/x86_64-arista_7050sx3_48yc8/Arista-7050SX3-48YC8/pg_profile_lookup.ini +++ /dev/null @@ -1,17 +0,0 @@ -# PG lossless profiles. -# speed cable size xon xoff threshold xon_offset - 10000 5m 1248 2288 35776 0 2288 - 25000 5m 1248 2288 53248 0 2288 - 40000 5m 1248 2288 66560 0 2288 - 50000 5m 1248 2288 79872 0 2288 - 100000 5m 1248 2288 165568 0 2288 - 10000 40m 1248 2288 37024 0 2288 - 25000 40m 1248 2288 56160 0 2288 - 40000 40m 1248 2288 71552 0 2288 - 50000 40m 1248 2288 85696 0 2288 - 100000 40m 1248 2288 177632 0 2288 - 10000 300m 1248 2288 46176 0 2288 - 25000 300m 1248 2288 79040 0 2288 - 40000 300m 1248 2288 108160 0 2288 - 50000 300m 1248 2288 141856 0 2288 - 100000 300m 1248 2288 268736 0 2288 diff --git a/device/arista/x86_64-arista_7050sx3_48yc8/Arista-7050SX3-48YC8/qos.json.j2 b/device/arista/x86_64-arista_7050sx3_48yc8/Arista-7050SX3-48YC8/qos.json.j2 deleted file mode 100644 index 34002048afd..00000000000 --- a/device/arista/x86_64-arista_7050sx3_48yc8/Arista-7050SX3-48YC8/qos.json.j2 +++ /dev/null @@ -1,21 +0,0 @@ -{%- macro generate_wred_profiles() %} - "WRED_PROFILE": { - "AZURE_LOSSLESS" : { - "wred_green_enable" : "true", - "wred_yellow_enable" : "true", - "wred_red_enable" : "true", - "ecn" : "ecn_all", - "green_max_threshold" : "2097152", - "green_min_threshold" : "250000", - "yellow_max_threshold" : "2097152", - "yellow_min_threshold" : "1048576", - "red_max_threshold" : "2097152", - "red_min_threshold" : "1048576", - "green_drop_probability" : "5", - "yellow_drop_probability": "5", - "red_drop_probability" : "5" - } - }, -{%- endmacro %} - -{%- include 'qos_config.j2' %} diff --git a/device/arista/x86_64-arista_7050sx3_48yc8/Arista-7050SX3-48YC8/td3-a7050sx3_48yc8-48x25G+8x100G.config.bcm b/device/arista/x86_64-arista_7050sx3_48yc8/Arista-7050SX3-48YC8/td3-a7050sx3_48yc8-48x25G+8x100G.config.bcm index 7783b318d8a..4bb7bd44e43 100644 --- a/device/arista/x86_64-arista_7050sx3_48yc8/Arista-7050SX3-48YC8/td3-a7050sx3_48yc8-48x25G+8x100G.config.bcm +++ b/device/arista/x86_64-arista_7050sx3_48yc8/Arista-7050SX3-48YC8/td3-a7050sx3_48yc8-48x25G+8x100G.config.bcm @@ -12,12 +12,12 @@ dpp_clock_ratio=2:3 fpem_mem_entries=0 higig2_hdr_mode=1 ifp_inports_support_enable=1 -ipv6_lpm_128b_enable=0 +ipv6_lpm_128b_enable=1 l2xmsg_mode=1 -l2_mem_entries=163840 +l2_mem_entries=32768 l3_alpm_enable=2 l3_max_ecmp_mode=1 -l3_mem_entries=147456 +l3_mem_entries=16384 max_vp_lags=0 miim_intr_enable=0 module_64ports=1 diff --git a/device/arista/x86_64-arista_7050sx3_48yc8/pcie.yaml b/device/arista/x86_64-arista_7050sx3_48yc8/pcie.yaml deleted file mode 100644 index 0b9ece287ab..00000000000 --- a/device/arista/x86_64-arista_7050sx3_48yc8/pcie.yaml +++ /dev/null @@ -1,158 +0,0 @@ -- bus: '00' - dev: '00' - fn: '0' - id: '1576' - name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 15h (Models 60h-6fh) - Processor Root Complex' -- bus: '00' - dev: '00' - fn: '2' - id: '1577' - name: 'IOMMU: Advanced Micro Devices, Inc. [AMD] Family 15h (Models 60h-6fh) I/O - Memory Management Unit' -- bus: '00' - dev: '02' - fn: '0' - id: 157b - name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 15h (Models 60h-6fh) - Host Bridge' -- bus: '00' - dev: '02' - fn: '2' - id: 157c - name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Family 15h (Models 60h-6fh) - Processor Root Port' -- bus: '00' - dev: '02' - fn: '3' - id: 157c - name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Family 15h (Models 60h-6fh) - Processor Root Port' -- bus: '00' - dev: '02' - fn: '4' - id: 157c - name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Family 15h (Models 60h-6fh) - Processor Root Port' -- bus: '00' - dev: '02' - fn: '5' - id: 157c - name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Family 15h (Models 60h-6fh) - Processor Root Port' -- bus: '00' - dev: '03' - fn: '0' - id: 157b - name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 15h (Models 60h-6fh) - Host Bridge' -- bus: '00' - dev: '03' - fn: '1' - id: 157c - name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Family 15h (Models 60h-6fh) - Processor Root Port' -- bus: '00' - dev: '03' - fn: '2' - id: 157c - name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Family 15h (Models 60h-6fh) - Processor Root Port' -- bus: '00' - dev: 08 - fn: '0' - id: '1578' - name: 'Encryption controller: Advanced Micro Devices, Inc. [AMD] Carrizo Platform - Security Processor' -- bus: '00' - dev: 09 - fn: '2' - id: 157a - name: 'Audio device: Advanced Micro Devices, Inc. [AMD] Family 15h (Models 60h-6fh) - Audio Controller' -- bus: '00' - dev: '10' - fn: '0' - id: '7914' - name: 'USB controller: Advanced Micro Devices, Inc. [AMD] FCH USB XHCI Controller - (rev 20)' -- bus: '00' - dev: '11' - fn: '0' - id: '7904' - name: 'SATA controller: Advanced Micro Devices, Inc. [AMD] FCH SATA Controller [AHCI - mode] (rev 49)' -- bus: '00' - dev: '12' - fn: '0' - id: '7908' - name: 'USB controller: Advanced Micro Devices, Inc. [AMD] FCH USB EHCI Controller - (rev 49)' -- bus: '00' - dev: '14' - fn: '0' - id: 790b - name: 'SMBus: Advanced Micro Devices, Inc. [AMD] FCH SMBus Controller (rev 4a)' -- bus: '00' - dev: '14' - fn: '3' - id: 790e - name: 'ISA bridge: Advanced Micro Devices, Inc. [AMD] FCH LPC Bridge (rev 11)' -- bus: '00' - dev: '14' - fn: '7' - id: '7906' - name: 'SD Host controller: Advanced Micro Devices, Inc. [AMD] FCH SD Flash Controller - (rev 01)' -- bus: '00' - dev: '18' - fn: '0' - id: '1570' - name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 15h (Models 60h-6fh) - Processor Function 0' -- bus: '00' - dev: '18' - fn: '1' - id: '1571' - name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 15h (Models 60h-6fh) - Processor Function 1' -- bus: '00' - dev: '18' - fn: '2' - id: '1572' - name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 15h (Models 60h-6fh) - Processor Function 2' -- bus: '00' - dev: '18' - fn: '3' - id: '1573' - name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 15h (Models 60h-6fh) - Processor Function 3' -- bus: '00' - dev: '18' - fn: '4' - id: '1574' - name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 15h (Models 60h-6fh) - Processor Function 4' -- bus: '00' - dev: '18' - fn: '5' - id: '1575' - name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 15h (Models 60h-6fh) - Processor Function 5' -- bus: '01' - dev: '00' - fn: '0' - id: '1682' - name: 'Ethernet controller: Broadcom Limited NetXtreme BCM57762 Gigabit Ethernet - PCIe (rev 01)' -- bus: '02' - dev: '00' - fn: '0' - id: '0001' - name: 'System peripheral: Arastra Inc. Device 0001 (rev 01)' -- bus: '05' - dev: '00' - fn: '0' - id: b770 - name: 'Ethernet controller: Broadcom Limited Device b770 (rev 01)' diff --git a/device/arista/x86_64-arista_7050sx3_48yc8/pcie.yaml b/device/arista/x86_64-arista_7050sx3_48yc8/pcie.yaml new file mode 120000 index 00000000000..df18a601d82 --- /dev/null +++ b/device/arista/x86_64-arista_7050sx3_48yc8/pcie.yaml @@ -0,0 +1 @@ +../x86_64-arista_common/pcie.yaml \ No newline at end of file diff --git a/device/arista/x86_64-arista_7050sx3_48yc8/platform.json b/device/arista/x86_64-arista_7050sx3_48yc8/platform.json new file mode 100644 index 00000000000..2e4f03678e8 --- /dev/null +++ b/device/arista/x86_64-arista_7050sx3_48yc8/platform.json @@ -0,0 +1,935 @@ +{ + "chassis": { + "name": "DCS-7050SX3-48YC8", + "components": [ + { + "name": "Aboot()" + }, + { + "name": "Scd(addr=0000:00:09.0)" + }, + { + "name": "Ucd90160(addr=8-004e)" + }, + { + "name": "Ucd90320(addr=12-0011)" + }, + { + "name": "Scd(addr=0000:02:00.0)" + } + ], + "fans": [], + "fan_drawers": [ + { + "name": "slot1", + "fans": [ + { + "name": "fan1" + }, + { + "name": "fan2" + } + ] + }, + { + "name": "slot2", + "fans": [ + { + "name": "fan3" + }, + { + "name": "fan4" + } + ] + } + ], + "psus": [ + { + "name": "psu1", + "fans": [ + { + "name": "psu1/1" + } + ] + }, + { + "name": "psu2", + "fans": [ + { + "name": "psu2/1" + } + ] + } + ], + "thermals": [ + { + "name": "Cpu temp sensor", + "controllable": false + }, + { + "name": "CPU board temp sensor", + "controllable": false + }, + { + "name": "Back-panel temp sensor", + "controllable": false + }, + { + "name": "Switch Card temp sensor", + "controllable": false + }, + { + "name": "Front-panel temp sensor", + "controllable": false + }, + { + "name": "Front PCB temp sensor", + "controllable": false + } + ], + "sfps": [ + { + "name": "sfp1" + }, + { + "name": "sfp2" + }, + { + "name": "sfp3" + }, + { + "name": "sfp4" + }, + { + "name": "sfp5" + }, + { + "name": "sfp6" + }, + { + "name": "sfp7" + }, + { + "name": "sfp8" + }, + { + "name": "sfp9" + }, + { + "name": "sfp10" + }, + { + "name": "sfp11" + }, + { + "name": "sfp12" + }, + { + "name": "sfp13" + }, + { + "name": "sfp14" + }, + { + "name": "sfp15" + }, + { + "name": "sfp16" + }, + { + "name": "sfp17" + }, + { + "name": "sfp18" + }, + { + "name": "sfp19" + }, + { + "name": "sfp20" + }, + { + "name": "sfp21" + }, + { + "name": "sfp22" + }, + { + "name": "sfp23" + }, + { + "name": "sfp24" + }, + { + "name": "sfp25" + }, + { + "name": "sfp26" + }, + { + "name": "sfp27" + }, + { + "name": "sfp28" + }, + { + "name": "sfp29" + }, + { + "name": "sfp30" + }, + { + "name": "sfp31" + }, + { + "name": "sfp32" + }, + { + "name": "sfp33" + }, + { + "name": "sfp34" + }, + { + "name": "sfp35" + }, + { + "name": "sfp36" + }, + { + "name": "sfp37" + }, + { + "name": "sfp38" + }, + { + "name": "sfp39" + }, + { + "name": "sfp40" + }, + { + "name": "sfp41" + }, + { + "name": "sfp42" + }, + { + "name": "sfp43" + }, + { + "name": "sfp44" + }, + { + "name": "sfp45" + }, + { + "name": "sfp46" + }, + { + "name": "sfp47" + }, + { + "name": "sfp48" + }, + { + "name": "qsfp49" + }, + { + "name": "qsfp50" + }, + { + "name": "qsfp51" + }, + { + "name": "qsfp52" + }, + { + "name": "qsfp53" + }, + { + "name": "qsfp54" + }, + { + "name": "qsfp55" + }, + { + "name": "qsfp56" + } + ] + }, + "interfaces": { + "Ethernet0": { + "index": "1", + "lanes": "1", + "breakout_modes": { + "1x25G": [ + "Ethernet1" + ], + "1x10G": [ + "Ethernet1" + ] + } + }, + "Ethernet1": { + "index": "2", + "lanes": "2", + "breakout_modes": { + "1x25G": [ + "Ethernet2" + ], + "1x10G": [ + "Ethernet2" + ] + } + }, + "Ethernet2": { + "index": "3", + "lanes": "3", + "breakout_modes": { + "1x25G": [ + "Ethernet3" + ], + "1x10G": [ + "Ethernet3" + ] + } + }, + "Ethernet3": { + "index": "4", + "lanes": "4", + "breakout_modes": { + "1x25G": [ + "Ethernet4" + ], + "1x10G": [ + "Ethernet4" + ] + } + }, + "Ethernet4": { + "index": "5", + "lanes": "5", + "breakout_modes": { + "1x25G": [ + "Ethernet5" + ], + "1x10G": [ + "Ethernet5" + ] + } + }, + "Ethernet5": { + "index": "6", + "lanes": "6", + "breakout_modes": { + "1x25G": [ + "Ethernet6" + ], + "1x10G": [ + "Ethernet6" + ] + } + }, + "Ethernet6": { + "index": "7", + "lanes": "7", + "breakout_modes": { + "1x25G": [ + "Ethernet7" + ], + "1x10G": [ + "Ethernet7" + ] + } + }, + "Ethernet7": { + "index": "8", + "lanes": "8", + "breakout_modes": { + "1x25G": [ + "Ethernet8" + ], + "1x10G": [ + "Ethernet8" + ] + } + }, + "Ethernet8": { + "index": "9", + "lanes": "9", + "breakout_modes": { + "1x25G": [ + "Ethernet9" + ], + "1x10G": [ + "Ethernet9" + ] + } + }, + "Ethernet9": { + "index": "10", + "lanes": "10", + "breakout_modes": { + "1x25G": [ + "Ethernet10" + ], + "1x10G": [ + "Ethernet10" + ] + } + }, + "Ethernet10": { + "index": "11", + "lanes": "11", + "breakout_modes": { + "1x25G": [ + "Ethernet11" + ], + "1x10G": [ + "Ethernet11" + ] + } + }, + "Ethernet11": { + "index": "12", + "lanes": "12", + "breakout_modes": { + "1x25G": [ + "Ethernet12" + ], + "1x10G": [ + "Ethernet12" + ] + } + }, + "Ethernet12": { + "index": "13", + "lanes": "13", + "breakout_modes": { + "1x25G": [ + "Ethernet13" + ], + "1x10G": [ + "Ethernet13" + ] + } + }, + "Ethernet13": { + "index": "14", + "lanes": "14", + "breakout_modes": { + "1x25G": [ + "Ethernet14" + ], + "1x10G": [ + "Ethernet14" + ] + } + }, + "Ethernet14": { + "index": "15", + "lanes": "15", + "breakout_modes": { + "1x25G": [ + "Ethernet15" + ], + "1x10G": [ + "Ethernet15" + ] + } + }, + "Ethernet15": { + "index": "16", + "lanes": "16", + "breakout_modes": { + "1x25G": [ + "Ethernet16" + ], + "1x10G": [ + "Ethernet16" + ] + } + }, + "Ethernet16": { + "index": "17", + "lanes": "17", + "breakout_modes": { + "1x25G": [ + "Ethernet17" + ], + "1x10G": [ + "Ethernet17" + ] + } + }, + "Ethernet17": { + "index": "18", + "lanes": "18", + "breakout_modes": { + "1x25G": [ + "Ethernet18" + ], + "1x10G": [ + "Ethernet18" + ] + } + }, + "Ethernet18": { + "index": "19", + "lanes": "19", + "breakout_modes": { + "1x25G": [ + "Ethernet19" + ], + "1x10G": [ + "Ethernet19" + ] + } + }, + "Ethernet19": { + "index": "20", + "lanes": "20", + "breakout_modes": { + "1x25G": [ + "Ethernet20" + ], + "1x10G": [ + "Ethernet20" + ] + } + }, + "Ethernet20": { + "index": "21", + "lanes": "21", + "breakout_modes": { + "1x25G": [ + "Ethernet21" + ], + "1x10G": [ + "Ethernet21" + ] + } + }, + "Ethernet21": { + "index": "22", + "lanes": "22", + "breakout_modes": { + "1x25G": [ + "Ethernet22" + ], + "1x10G": [ + "Ethernet22" + ] + } + }, + "Ethernet22": { + "index": "23", + "lanes": "23", + "breakout_modes": { + "1x25G": [ + "Ethernet23" + ], + "1x10G": [ + "Ethernet23" + ] + } + }, + "Ethernet23": { + "index": "24", + "lanes": "24", + "breakout_modes": { + "1x25G": [ + "Ethernet24" + ], + "1x10G": [ + "Ethernet24" + ] + } + }, + "Ethernet24": { + "index": "25", + "lanes": "57", + "breakout_modes": { + "1x25G": [ + "Ethernet25" + ], + "1x10G": [ + "Ethernet25" + ] + } + }, + "Ethernet25": { + "index": "26", + "lanes": "58", + "breakout_modes": { + "1x25G": [ + "Ethernet26" + ], + "1x10G": [ + "Ethernet26" + ] + } + }, + "Ethernet26": { + "index": "27", + "lanes": "59", + "breakout_modes": { + "1x25G": [ + "Ethernet27" + ], + "1x10G": [ + "Ethernet27" + ] + } + }, + "Ethernet27": { + "index": "28", + "lanes": "60", + "breakout_modes": { + "1x25G": [ + "Ethernet28" + ], + "1x10G": [ + "Ethernet28" + ] + } + }, + "Ethernet28": { + "index": "29", + "lanes": "61", + "breakout_modes": { + "1x25G": [ + "Ethernet29" + ], + "1x10G": [ + "Ethernet29" + ] + } + }, + "Ethernet29": { + "index": "30", + "lanes": "62", + "breakout_modes": { + "1x25G": [ + "Ethernet30" + ], + "1x10G": [ + "Ethernet30" + ] + } + }, + "Ethernet30": { + "index": "31", + "lanes": "63", + "breakout_modes": { + "1x25G": [ + "Ethernet31" + ], + "1x10G": [ + "Ethernet31" + ] + } + }, + "Ethernet31": { + "index": "32", + "lanes": "64", + "breakout_modes": { + "1x25G": [ + "Ethernet32" + ], + "1x10G": [ + "Ethernet32" + ] + } + }, + "Ethernet32": { + "index": "33", + "lanes": "65", + "breakout_modes": { + "1x25G": [ + "Ethernet33" + ], + "1x10G": [ + "Ethernet33" + ] + } + }, + "Ethernet33": { + "index": "34", + "lanes": "66", + "breakout_modes": { + "1x25G": [ + "Ethernet34" + ], + "1x10G": [ + "Ethernet34" + ] + } + }, + "Ethernet34": { + "index": "35", + "lanes": "67", + "breakout_modes": { + "1x25G": [ + "Ethernet35" + ], + "1x10G": [ + "Ethernet35" + ] + } + }, + "Ethernet35": { + "index": "36", + "lanes": "68", + "breakout_modes": { + "1x25G": [ + "Ethernet36" + ], + "1x10G": [ + "Ethernet36" + ] + } + }, + "Ethernet36": { + "index": "37", + "lanes": "69", + "breakout_modes": { + "1x25G": [ + "Ethernet37" + ], + "1x10G": [ + "Ethernet37" + ] + } + }, + "Ethernet37": { + "index": "38", + "lanes": "70", + "breakout_modes": { + "1x25G": [ + "Ethernet38" + ], + "1x10G": [ + "Ethernet38" + ] + } + }, + "Ethernet38": { + "index": "39", + "lanes": "71", + "breakout_modes": { + "1x25G": [ + "Ethernet39" + ], + "1x10G": [ + "Ethernet39" + ] + } + }, + "Ethernet39": { + "index": "40", + "lanes": "72", + "breakout_modes": { + "1x25G": [ + "Ethernet40" + ], + "1x10G": [ + "Ethernet40" + ] + } + }, + "Ethernet40": { + "index": "41", + "lanes": "73", + "breakout_modes": { + "1x25G": [ + "Ethernet41" + ], + "1x10G": [ + "Ethernet41" + ] + } + }, + "Ethernet41": { + "index": "42", + "lanes": "74", + "breakout_modes": { + "1x25G": [ + "Ethernet42" + ], + "1x10G": [ + "Ethernet42" + ] + } + }, + "Ethernet42": { + "index": "43", + "lanes": "75", + "breakout_modes": { + "1x25G": [ + "Ethernet43" + ], + "1x10G": [ + "Ethernet43" + ] + } + }, + "Ethernet43": { + "index": "44", + "lanes": "76", + "breakout_modes": { + "1x25G": [ + "Ethernet44" + ], + "1x10G": [ + "Ethernet44" + ] + } + }, + "Ethernet44": { + "index": "45", + "lanes": "77", + "breakout_modes": { + "1x25G": [ + "Ethernet45" + ], + "1x10G": [ + "Ethernet45" + ] + } + }, + "Ethernet45": { + "index": "46", + "lanes": "78", + "breakout_modes": { + "1x25G": [ + "Ethernet46" + ], + "1x10G": [ + "Ethernet46" + ] + } + }, + "Ethernet46": { + "index": "47", + "lanes": "79", + "breakout_modes": { + "1x25G": [ + "Ethernet47" + ], + "1x10G": [ + "Ethernet47" + ] + } + }, + "Ethernet47": { + "index": "48", + "lanes": "80", + "breakout_modes": { + "1x25G": [ + "Ethernet48" + ], + "1x10G": [ + "Ethernet48" + ] + } + }, + "Ethernet48": { + "index": "49,49,49,49", + "lanes": "25,26,27,28", + "breakout_modes": { + "1x100G": [ + "Ethernet49/1" + ], + "1x40G": [ + "Ethernet49/1" + ] + } + }, + "Ethernet52": { + "index": "50,50,50,50", + "lanes": "29,30,31,32", + "breakout_modes": { + "1x100G": [ + "Ethernet50/1" + ], + "1x40G": [ + "Ethernet50/1" + ] + } + }, + "Ethernet56": { + "index": "51,51,51,51", + "lanes": "33,34,35,36", + "breakout_modes": { + "1x100G": [ + "Ethernet51/1" + ], + "1x40G": [ + "Ethernet51/1" + ] + } + }, + "Ethernet60": { + "index": "52,52,52,52", + "lanes": "37,38,39,40", + "breakout_modes": { + "1x100G": [ + "Ethernet52/1" + ], + "1x40G": [ + "Ethernet52/1" + ] + } + }, + "Ethernet64": { + "index": "53,53,53,53", + "lanes": "41,42,43,44", + "breakout_modes": { + "1x100G": [ + "Ethernet53/1" + ], + "1x40G": [ + "Ethernet53/1" + ] + } + }, + "Ethernet68": { + "index": "54,54,54,54", + "lanes": "45,46,47,48", + "breakout_modes": { + "1x100G": [ + "Ethernet54/1" + ], + "1x40G": [ + "Ethernet54/1" + ] + } + }, + "Ethernet72": { + "index": "55,55,55,55", + "lanes": "49,50,51,52", + "breakout_modes": { + "1x100G": [ + "Ethernet55/1" + ], + "1x40G": [ + "Ethernet55/1" + ] + } + }, + "Ethernet76": { + "index": "56,56,56,56", + "lanes": "53,54,55,56", + "breakout_modes": { + "1x100G": [ + "Ethernet56/1" + ], + "1x40G": [ + "Ethernet56/1" + ] + } + } + } +} \ No newline at end of file diff --git a/device/arista/x86_64-arista_7050sx3_48yc8/platform_components.json b/device/arista/x86_64-arista_7050sx3_48yc8/platform_components.json new file mode 100644 index 00000000000..d1775ce1f7d --- /dev/null +++ b/device/arista/x86_64-arista_7050sx3_48yc8/platform_components.json @@ -0,0 +1,13 @@ +{ + "chassis": { + "DCS-7050SX3-48YC8": { + "component": { + "Aboot()": {}, + "Scd(addr=0000:00:09.0)": {}, + "Ucd90160(addr=8-004e)": {}, + "Ucd90320(addr=12-0011)": {}, + "Scd(addr=0000:02:00.0)": {} + } + } + } +} diff --git a/device/arista/x86_64-arista_7050sx3_48yc8/platform_env.conf b/device/arista/x86_64-arista_7050sx3_48yc8/platform_env.conf new file mode 100644 index 00000000000..283e1c0ce71 --- /dev/null +++ b/device/arista/x86_64-arista_7050sx3_48yc8/platform_env.conf @@ -0,0 +1 @@ +usemsi=1 diff --git a/device/arista/x86_64-arista_7050sx3_48yc8/sensors.conf b/device/arista/x86_64-arista_7050sx3_48yc8/sensors.conf index 92cf81cf931..29c04020770 100644 --- a/device/arista/x86_64-arista_7050sx3_48yc8/sensors.conf +++ b/device/arista/x86_64-arista_7050sx3_48yc8/sensors.conf @@ -5,7 +5,7 @@ bus "i2c-9" "SCD 0000:02:00.0 SMBus master 0 bus 0" bus "i2c-10" "SCD 0000:02:00.0 SMBus master 0 bus 1" bus "i2c-11" "SCD 0000:02:00.0 SMBus master 0 bus 2" -bus "i2c-73" "SCD 0000:00:09.0 SMBus master 0 bus 2" +bus "i2c-73" "SCD 0000:00:09.0 SMBus master 0 bus 0" chip "k10temp-pci-00c3" label temp1 "Cpu temp sensor" diff --git a/device/arista/x86_64-arista_7050sx3_48yc8c/Arista-7050SX3-48YC8C b/device/arista/x86_64-arista_7050sx3_48yc8c/Arista-7050SX3-48YC8C new file mode 120000 index 00000000000..159934a20f0 --- /dev/null +++ b/device/arista/x86_64-arista_7050sx3_48yc8c/Arista-7050SX3-48YC8C @@ -0,0 +1 @@ +../x86_64-arista_7050sx3_48yc8/Arista-7050SX3-48YC8/ \ No newline at end of file diff --git a/device/arista/x86_64-arista_7050sx3_48yc8c/Arista-7050SX3-48YC8C-S48Q8 b/device/arista/x86_64-arista_7050sx3_48yc8c/Arista-7050SX3-48YC8C-S48Q8 new file mode 120000 index 00000000000..b12de7f9aae --- /dev/null +++ b/device/arista/x86_64-arista_7050sx3_48yc8c/Arista-7050SX3-48YC8C-S48Q8 @@ -0,0 +1 @@ +../x86_64-arista_7050sx3_48yc8/Arista-7050SX3-48YC8-S48Q8 \ No newline at end of file diff --git a/device/arista/x86_64-arista_7050sx3_48yc8c/default_sku b/device/arista/x86_64-arista_7050sx3_48yc8c/default_sku new file mode 100644 index 00000000000..ccc11689455 --- /dev/null +++ b/device/arista/x86_64-arista_7050sx3_48yc8c/default_sku @@ -0,0 +1 @@ +Arista-7050SX3-48YC8C t1 diff --git a/device/arista/x86_64-arista_7050sx3_48yc8c/pcie.yaml b/device/arista/x86_64-arista_7050sx3_48yc8c/pcie.yaml new file mode 120000 index 00000000000..df18a601d82 --- /dev/null +++ b/device/arista/x86_64-arista_7050sx3_48yc8c/pcie.yaml @@ -0,0 +1 @@ +../x86_64-arista_common/pcie.yaml \ No newline at end of file diff --git a/device/arista/x86_64-arista_7050sx3_48yc8c/platform.json b/device/arista/x86_64-arista_7050sx3_48yc8c/platform.json new file mode 100644 index 00000000000..c8a81e9a879 --- /dev/null +++ b/device/arista/x86_64-arista_7050sx3_48yc8c/platform.json @@ -0,0 +1,928 @@ +{ + "chassis": { + "name": "DCS-7050SX3-48YC8C", + "components": [ + { + "name": "Aboot()" + }, + { + "name": "Scd(addr=0000:00:18.7)" + }, + { + "name": "PuffinPrimeSysCpld(addr=9-0023)" + }, + { + "name": "Scd(addr=0000:02:00.0)" + } + ], + "fans": [], + "fan_drawers": [ + { + "name": "slot1", + "fans": [ + { + "name": "fan1" + }, + { + "name": "fan2" + } + ] + }, + { + "name": "slot2", + "fans": [ + { + "name": "fan3" + }, + { + "name": "fan4" + } + ] + } + ], + "psus": [ + { + "name": "psu1", + "fans": [ + { + "name": "psu1/1" + } + ] + }, + { + "name": "psu2", + "fans": [ + { + "name": "psu2/1" + } + ] + } + ], + "thermals": [ + { + "name": "Cpu temp sensor", + "controllable": false + }, + { + "name": "Cpu board temp sensor", + "controllable": false + }, + { + "name": "Back-panel temp sensor", + "controllable": false + }, + { + "name": "Switch Card temp sensor", + "controllable": false + }, + { + "name": "Front-panel temp sensor", + "controllable": false + } + ], + "sfps": [ + { + "name": "sfp1" + }, + { + "name": "sfp2" + }, + { + "name": "sfp3" + }, + { + "name": "sfp4" + }, + { + "name": "sfp5" + }, + { + "name": "sfp6" + }, + { + "name": "sfp7" + }, + { + "name": "sfp8" + }, + { + "name": "sfp9" + }, + { + "name": "sfp10" + }, + { + "name": "sfp11" + }, + { + "name": "sfp12" + }, + { + "name": "sfp13" + }, + { + "name": "sfp14" + }, + { + "name": "sfp15" + }, + { + "name": "sfp16" + }, + { + "name": "sfp17" + }, + { + "name": "sfp18" + }, + { + "name": "sfp19" + }, + { + "name": "sfp20" + }, + { + "name": "sfp21" + }, + { + "name": "sfp22" + }, + { + "name": "sfp23" + }, + { + "name": "sfp24" + }, + { + "name": "sfp25" + }, + { + "name": "sfp26" + }, + { + "name": "sfp27" + }, + { + "name": "sfp28" + }, + { + "name": "sfp29" + }, + { + "name": "sfp30" + }, + { + "name": "sfp31" + }, + { + "name": "sfp32" + }, + { + "name": "sfp33" + }, + { + "name": "sfp34" + }, + { + "name": "sfp35" + }, + { + "name": "sfp36" + }, + { + "name": "sfp37" + }, + { + "name": "sfp38" + }, + { + "name": "sfp39" + }, + { + "name": "sfp40" + }, + { + "name": "sfp41" + }, + { + "name": "sfp42" + }, + { + "name": "sfp43" + }, + { + "name": "sfp44" + }, + { + "name": "sfp45" + }, + { + "name": "sfp46" + }, + { + "name": "sfp47" + }, + { + "name": "sfp48" + }, + { + "name": "qsfp49" + }, + { + "name": "qsfp50" + }, + { + "name": "qsfp51" + }, + { + "name": "qsfp52" + }, + { + "name": "qsfp53" + }, + { + "name": "qsfp54" + }, + { + "name": "qsfp55" + }, + { + "name": "qsfp56" + } + ] + }, + "interfaces": { + "Ethernet0": { + "index": "1", + "lanes": "1", + "breakout_modes": { + "1x25G": [ + "Ethernet1" + ], + "1x10G": [ + "Ethernet1" + ] + } + }, + "Ethernet1": { + "index": "2", + "lanes": "2", + "breakout_modes": { + "1x25G": [ + "Ethernet2" + ], + "1x10G": [ + "Ethernet2" + ] + } + }, + "Ethernet2": { + "index": "3", + "lanes": "3", + "breakout_modes": { + "1x25G": [ + "Ethernet3" + ], + "1x10G": [ + "Ethernet3" + ] + } + }, + "Ethernet3": { + "index": "4", + "lanes": "4", + "breakout_modes": { + "1x25G": [ + "Ethernet4" + ], + "1x10G": [ + "Ethernet4" + ] + } + }, + "Ethernet4": { + "index": "5", + "lanes": "5", + "breakout_modes": { + "1x25G": [ + "Ethernet5" + ], + "1x10G": [ + "Ethernet5" + ] + } + }, + "Ethernet5": { + "index": "6", + "lanes": "6", + "breakout_modes": { + "1x25G": [ + "Ethernet6" + ], + "1x10G": [ + "Ethernet6" + ] + } + }, + "Ethernet6": { + "index": "7", + "lanes": "7", + "breakout_modes": { + "1x25G": [ + "Ethernet7" + ], + "1x10G": [ + "Ethernet7" + ] + } + }, + "Ethernet7": { + "index": "8", + "lanes": "8", + "breakout_modes": { + "1x25G": [ + "Ethernet8" + ], + "1x10G": [ + "Ethernet8" + ] + } + }, + "Ethernet8": { + "index": "9", + "lanes": "9", + "breakout_modes": { + "1x25G": [ + "Ethernet9" + ], + "1x10G": [ + "Ethernet9" + ] + } + }, + "Ethernet9": { + "index": "10", + "lanes": "10", + "breakout_modes": { + "1x25G": [ + "Ethernet10" + ], + "1x10G": [ + "Ethernet10" + ] + } + }, + "Ethernet10": { + "index": "11", + "lanes": "11", + "breakout_modes": { + "1x25G": [ + "Ethernet11" + ], + "1x10G": [ + "Ethernet11" + ] + } + }, + "Ethernet11": { + "index": "12", + "lanes": "12", + "breakout_modes": { + "1x25G": [ + "Ethernet12" + ], + "1x10G": [ + "Ethernet12" + ] + } + }, + "Ethernet12": { + "index": "13", + "lanes": "13", + "breakout_modes": { + "1x25G": [ + "Ethernet13" + ], + "1x10G": [ + "Ethernet13" + ] + } + }, + "Ethernet13": { + "index": "14", + "lanes": "14", + "breakout_modes": { + "1x25G": [ + "Ethernet14" + ], + "1x10G": [ + "Ethernet14" + ] + } + }, + "Ethernet14": { + "index": "15", + "lanes": "15", + "breakout_modes": { + "1x25G": [ + "Ethernet15" + ], + "1x10G": [ + "Ethernet15" + ] + } + }, + "Ethernet15": { + "index": "16", + "lanes": "16", + "breakout_modes": { + "1x25G": [ + "Ethernet16" + ], + "1x10G": [ + "Ethernet16" + ] + } + }, + "Ethernet16": { + "index": "17", + "lanes": "17", + "breakout_modes": { + "1x25G": [ + "Ethernet17" + ], + "1x10G": [ + "Ethernet17" + ] + } + }, + "Ethernet17": { + "index": "18", + "lanes": "18", + "breakout_modes": { + "1x25G": [ + "Ethernet18" + ], + "1x10G": [ + "Ethernet18" + ] + } + }, + "Ethernet18": { + "index": "19", + "lanes": "19", + "breakout_modes": { + "1x25G": [ + "Ethernet19" + ], + "1x10G": [ + "Ethernet19" + ] + } + }, + "Ethernet19": { + "index": "20", + "lanes": "20", + "breakout_modes": { + "1x25G": [ + "Ethernet20" + ], + "1x10G": [ + "Ethernet20" + ] + } + }, + "Ethernet20": { + "index": "21", + "lanes": "21", + "breakout_modes": { + "1x25G": [ + "Ethernet21" + ], + "1x10G": [ + "Ethernet21" + ] + } + }, + "Ethernet21": { + "index": "22", + "lanes": "22", + "breakout_modes": { + "1x25G": [ + "Ethernet22" + ], + "1x10G": [ + "Ethernet22" + ] + } + }, + "Ethernet22": { + "index": "23", + "lanes": "23", + "breakout_modes": { + "1x25G": [ + "Ethernet23" + ], + "1x10G": [ + "Ethernet23" + ] + } + }, + "Ethernet23": { + "index": "24", + "lanes": "24", + "breakout_modes": { + "1x25G": [ + "Ethernet24" + ], + "1x10G": [ + "Ethernet24" + ] + } + }, + "Ethernet24": { + "index": "25", + "lanes": "57", + "breakout_modes": { + "1x25G": [ + "Ethernet25" + ], + "1x10G": [ + "Ethernet25" + ] + } + }, + "Ethernet25": { + "index": "26", + "lanes": "58", + "breakout_modes": { + "1x25G": [ + "Ethernet26" + ], + "1x10G": [ + "Ethernet26" + ] + } + }, + "Ethernet26": { + "index": "27", + "lanes": "59", + "breakout_modes": { + "1x25G": [ + "Ethernet27" + ], + "1x10G": [ + "Ethernet27" + ] + } + }, + "Ethernet27": { + "index": "28", + "lanes": "60", + "breakout_modes": { + "1x25G": [ + "Ethernet28" + ], + "1x10G": [ + "Ethernet28" + ] + } + }, + "Ethernet28": { + "index": "29", + "lanes": "61", + "breakout_modes": { + "1x25G": [ + "Ethernet29" + ], + "1x10G": [ + "Ethernet29" + ] + } + }, + "Ethernet29": { + "index": "30", + "lanes": "62", + "breakout_modes": { + "1x25G": [ + "Ethernet30" + ], + "1x10G": [ + "Ethernet30" + ] + } + }, + "Ethernet30": { + "index": "31", + "lanes": "63", + "breakout_modes": { + "1x25G": [ + "Ethernet31" + ], + "1x10G": [ + "Ethernet31" + ] + } + }, + "Ethernet31": { + "index": "32", + "lanes": "64", + "breakout_modes": { + "1x25G": [ + "Ethernet32" + ], + "1x10G": [ + "Ethernet32" + ] + } + }, + "Ethernet32": { + "index": "33", + "lanes": "65", + "breakout_modes": { + "1x25G": [ + "Ethernet33" + ], + "1x10G": [ + "Ethernet33" + ] + } + }, + "Ethernet33": { + "index": "34", + "lanes": "66", + "breakout_modes": { + "1x25G": [ + "Ethernet34" + ], + "1x10G": [ + "Ethernet34" + ] + } + }, + "Ethernet34": { + "index": "35", + "lanes": "67", + "breakout_modes": { + "1x25G": [ + "Ethernet35" + ], + "1x10G": [ + "Ethernet35" + ] + } + }, + "Ethernet35": { + "index": "36", + "lanes": "68", + "breakout_modes": { + "1x25G": [ + "Ethernet36" + ], + "1x10G": [ + "Ethernet36" + ] + } + }, + "Ethernet36": { + "index": "37", + "lanes": "69", + "breakout_modes": { + "1x25G": [ + "Ethernet37" + ], + "1x10G": [ + "Ethernet37" + ] + } + }, + "Ethernet37": { + "index": "38", + "lanes": "70", + "breakout_modes": { + "1x25G": [ + "Ethernet38" + ], + "1x10G": [ + "Ethernet38" + ] + } + }, + "Ethernet38": { + "index": "39", + "lanes": "71", + "breakout_modes": { + "1x25G": [ + "Ethernet39" + ], + "1x10G": [ + "Ethernet39" + ] + } + }, + "Ethernet39": { + "index": "40", + "lanes": "72", + "breakout_modes": { + "1x25G": [ + "Ethernet40" + ], + "1x10G": [ + "Ethernet40" + ] + } + }, + "Ethernet40": { + "index": "41", + "lanes": "73", + "breakout_modes": { + "1x25G": [ + "Ethernet41" + ], + "1x10G": [ + "Ethernet41" + ] + } + }, + "Ethernet41": { + "index": "42", + "lanes": "74", + "breakout_modes": { + "1x25G": [ + "Ethernet42" + ], + "1x10G": [ + "Ethernet42" + ] + } + }, + "Ethernet42": { + "index": "43", + "lanes": "75", + "breakout_modes": { + "1x25G": [ + "Ethernet43" + ], + "1x10G": [ + "Ethernet43" + ] + } + }, + "Ethernet43": { + "index": "44", + "lanes": "76", + "breakout_modes": { + "1x25G": [ + "Ethernet44" + ], + "1x10G": [ + "Ethernet44" + ] + } + }, + "Ethernet44": { + "index": "45", + "lanes": "77", + "breakout_modes": { + "1x25G": [ + "Ethernet45" + ], + "1x10G": [ + "Ethernet45" + ] + } + }, + "Ethernet45": { + "index": "46", + "lanes": "78", + "breakout_modes": { + "1x25G": [ + "Ethernet46" + ], + "1x10G": [ + "Ethernet46" + ] + } + }, + "Ethernet46": { + "index": "47", + "lanes": "79", + "breakout_modes": { + "1x25G": [ + "Ethernet47" + ], + "1x10G": [ + "Ethernet47" + ] + } + }, + "Ethernet47": { + "index": "48", + "lanes": "80", + "breakout_modes": { + "1x25G": [ + "Ethernet48" + ], + "1x10G": [ + "Ethernet48" + ] + } + }, + "Ethernet48": { + "index": "49,49,49,49", + "lanes": "25,26,27,28", + "breakout_modes": { + "1x100G": [ + "Ethernet49/1" + ], + "1x40G": [ + "Ethernet49/1" + ] + } + }, + "Ethernet52": { + "index": "50,50,50,50", + "lanes": "29,30,31,32", + "breakout_modes": { + "1x100G": [ + "Ethernet50/1" + ], + "1x40G": [ + "Ethernet50/1" + ] + } + }, + "Ethernet56": { + "index": "51,51,51,51", + "lanes": "33,34,35,36", + "breakout_modes": { + "1x100G": [ + "Ethernet51/1" + ], + "1x40G": [ + "Ethernet51/1" + ] + } + }, + "Ethernet60": { + "index": "52,52,52,52", + "lanes": "37,38,39,40", + "breakout_modes": { + "1x100G": [ + "Ethernet52/1" + ], + "1x40G": [ + "Ethernet52/1" + ] + } + }, + "Ethernet64": { + "index": "53,53,53,53", + "lanes": "41,42,43,44", + "breakout_modes": { + "1x100G": [ + "Ethernet53/1" + ], + "1x40G": [ + "Ethernet53/1" + ] + } + }, + "Ethernet68": { + "index": "54,54,54,54", + "lanes": "45,46,47,48", + "breakout_modes": { + "1x100G": [ + "Ethernet54/1" + ], + "1x40G": [ + "Ethernet54/1" + ] + } + }, + "Ethernet72": { + "index": "55,55,55,55", + "lanes": "49,50,51,52", + "breakout_modes": { + "1x100G": [ + "Ethernet55/1" + ], + "1x40G": [ + "Ethernet55/1" + ] + } + }, + "Ethernet76": { + "index": "56,56,56,56", + "lanes": "53,54,55,56", + "breakout_modes": { + "1x100G": [ + "Ethernet56/1" + ], + "1x40G": [ + "Ethernet56/1" + ] + } + } + } +} \ No newline at end of file diff --git a/device/arista/x86_64-arista_7050sx3_48yc8c/platform_asic b/device/arista/x86_64-arista_7050sx3_48yc8c/platform_asic new file mode 120000 index 00000000000..40835f4ad36 --- /dev/null +++ b/device/arista/x86_64-arista_7050sx3_48yc8c/platform_asic @@ -0,0 +1 @@ +../x86_64-arista_7050sx3_48yc8/platform_asic \ No newline at end of file diff --git a/device/arista/x86_64-arista_7050sx3_48yc8c/platform_components.json b/device/arista/x86_64-arista_7050sx3_48yc8c/platform_components.json new file mode 100644 index 00000000000..714da69d32b --- /dev/null +++ b/device/arista/x86_64-arista_7050sx3_48yc8c/platform_components.json @@ -0,0 +1,12 @@ +{ + "chassis": { + "DCS-7050SX3-48YC8C": { + "component": { + "Aboot()": {}, + "Scd(addr=0000:00:18.7)": {}, + "PuffinPrimeSysCpld(addr=9-0023)": {}, + "Scd(addr=0000:02:00.0)": {} + } + } + } +} \ No newline at end of file diff --git a/device/arista/x86_64-arista_7050sx3_48yc8c/platform_env.conf b/device/arista/x86_64-arista_7050sx3_48yc8c/platform_env.conf new file mode 120000 index 00000000000..87c35ffd31c --- /dev/null +++ b/device/arista/x86_64-arista_7050sx3_48yc8c/platform_env.conf @@ -0,0 +1 @@ +../x86_64-arista_7050sx3_48yc8/platform_env.conf \ No newline at end of file diff --git a/device/arista/x86_64-arista_7050sx3_48yc8c/platform_reboot b/device/arista/x86_64-arista_7050sx3_48yc8c/platform_reboot new file mode 120000 index 00000000000..7f94a49e38b --- /dev/null +++ b/device/arista/x86_64-arista_7050sx3_48yc8c/platform_reboot @@ -0,0 +1 @@ +../x86_64-arista_common/platform_reboot \ No newline at end of file diff --git a/device/arista/x86_64-arista_7050sx3_48yc8c/plugins/eeprom.py b/device/arista/x86_64-arista_7050sx3_48yc8c/plugins/eeprom.py new file mode 120000 index 00000000000..35cfaff3de4 --- /dev/null +++ b/device/arista/x86_64-arista_7050sx3_48yc8c/plugins/eeprom.py @@ -0,0 +1 @@ +../../x86_64-arista_common/plugins/eeprom.py \ No newline at end of file diff --git a/device/arista/x86_64-arista_7050sx3_48yc8c/plugins/led_control.py b/device/arista/x86_64-arista_7050sx3_48yc8c/plugins/led_control.py new file mode 120000 index 00000000000..8d733780117 --- /dev/null +++ b/device/arista/x86_64-arista_7050sx3_48yc8c/plugins/led_control.py @@ -0,0 +1 @@ +../../x86_64-arista_common/plugins/led_control.py \ No newline at end of file diff --git a/device/arista/x86_64-arista_7050sx3_48yc8c/plugins/psuutil.py b/device/arista/x86_64-arista_7050sx3_48yc8c/plugins/psuutil.py new file mode 120000 index 00000000000..2b0024ade96 --- /dev/null +++ b/device/arista/x86_64-arista_7050sx3_48yc8c/plugins/psuutil.py @@ -0,0 +1 @@ +../../x86_64-arista_common/plugins/psuutil.py \ No newline at end of file diff --git a/device/arista/x86_64-arista_7050sx3_48yc8c/plugins/sfputil.py b/device/arista/x86_64-arista_7050sx3_48yc8c/plugins/sfputil.py new file mode 120000 index 00000000000..c333e23763d --- /dev/null +++ b/device/arista/x86_64-arista_7050sx3_48yc8c/plugins/sfputil.py @@ -0,0 +1 @@ +../../x86_64-arista_common/plugins/sfputil.py \ No newline at end of file diff --git a/device/arista/x86_64-arista_7050sx3_48yc8c/pmon_daemon_control.json b/device/arista/x86_64-arista_7050sx3_48yc8c/pmon_daemon_control.json new file mode 120000 index 00000000000..51d5ab7b005 --- /dev/null +++ b/device/arista/x86_64-arista_7050sx3_48yc8c/pmon_daemon_control.json @@ -0,0 +1 @@ +../x86_64-arista_common/pmon_daemon_control.json \ No newline at end of file diff --git a/device/arista/x86_64-arista_7050sx3_48yc8c/sensors.conf b/device/arista/x86_64-arista_7050sx3_48yc8c/sensors.conf new file mode 100644 index 00000000000..ef54005d956 --- /dev/null +++ b/device/arista/x86_64-arista_7050sx3_48yc8c/sensors.conf @@ -0,0 +1,39 @@ +# libsensors configuration file for DCS-7050SX3-48YC8C +# ------------------------------------------------ +# + +bus "i2c-5" "SCD 0000:00:18.7 SMBus master 0 bus 0" +bus "i2c-13" "SCD 0000:02:00.0 SMBus master 0 bus 0" +bus "i2c-14" "SCD 0000:02:00.0 SMBus master 0 bus 1" +bus "i2c-15" "SCD 0000:02:00.0 SMBus master 0 bus 2" + +chip "k10temp-pci-00c3" + label temp1 "Cpu temp sensor" + +chip "max6658-i2c-5-4c" + label temp1 "Cpu board temp sensor" + set temp2_max 75 + set temp2_crit 85 + + label temp2 "Back panel temp sensor" + set temp2_max 75 + set temp2_crit 85 + +chip "max6658-i2c-15-4c" + label temp1 "Switch Board temp sensor" + set temp1_max 100 + set temp1_crit 110 + + label temp2 "Front inlet temp sensor" + set temp2_max 75 + set temp2_crit 85 + +chip "pmbus-i2c-13-58" + label temp1 "Power supply 1 inlet sensor" + label temp2 "Power supply 1 primary hotspot sensor" + label temp3 "Power supply 1 secondary hotspot sensor" + +chip "pmbus-i2c-14-58" + label temp1 "Power supply 2 inlet sensor" + label temp2 "Power supply 2 primary hotspot sensor" + label temp3 "Power supply 2 secondary hotspot sensor" diff --git a/device/arista/x86_64-arista_7050sx3_48yc8c/system_health_monitoring_config.json b/device/arista/x86_64-arista_7050sx3_48yc8c/system_health_monitoring_config.json new file mode 120000 index 00000000000..1185f771fa8 --- /dev/null +++ b/device/arista/x86_64-arista_7050sx3_48yc8c/system_health_monitoring_config.json @@ -0,0 +1 @@ +../x86_64-arista_common/system_health_monitoring_config.json \ No newline at end of file diff --git a/device/arista/x86_64-arista_7050sx3_48yc8c/thermal_policy.json b/device/arista/x86_64-arista_7050sx3_48yc8c/thermal_policy.json new file mode 120000 index 00000000000..0991dc7f363 --- /dev/null +++ b/device/arista/x86_64-arista_7050sx3_48yc8c/thermal_policy.json @@ -0,0 +1 @@ +../x86_64-arista_common/thermal_policy.json \ No newline at end of file diff --git a/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-C32/port_config.ini b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-C32/port_config.ini index bfe4a721141..a913c61157d 100644 --- a/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-C32/port_config.ini +++ b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-C32/port_config.ini @@ -1,33 +1,33 @@ -# name lanes alias index -Ethernet0 33,34,35,36 Ethernet1/1 1 -Ethernet4 37,38,39,40 Ethernet2/1 2 -Ethernet8 41,42,43,44 Ethernet3/1 3 -Ethernet12 45,46,47,48 Ethernet4/1 4 -Ethernet16 49,50,51,52 Ethernet5/1 5 -Ethernet20 53,54,55,56 Ethernet6/1 6 -Ethernet24 57,58,59,60 Ethernet7/1 7 -Ethernet28 61,62,63,64 Ethernet8/1 8 -Ethernet32 65,66,67,68 Ethernet9/1 9 -Ethernet36 69,70,71,72 Ethernet10/1 10 -Ethernet40 73,74,75,76 Ethernet11/1 11 -Ethernet44 77,78,79,80 Ethernet12/1 12 -Ethernet48 81,82,83,84 Ethernet13/1 13 -Ethernet52 85,86,87,88 Ethernet14/1 14 -Ethernet56 89,90,91,92 Ethernet15/1 15 -Ethernet60 93,94,95,96 Ethernet16/1 16 -Ethernet64 97,98,99,100 Ethernet17/1 17 -Ethernet68 101,102,103,104 Ethernet18/1 18 -Ethernet72 105,106,107,108 Ethernet19/1 19 -Ethernet76 109,110,111,112 Ethernet20/1 20 -Ethernet80 113,114,115,116 Ethernet21/1 21 -Ethernet84 117,118,119,120 Ethernet22/1 22 -Ethernet88 121,122,123,124 Ethernet23/1 23 -Ethernet92 125,126,127,128 Ethernet24/1 24 -Ethernet96 1,2,3,4 Ethernet25/1 25 -Ethernet100 5,6,7,8 Ethernet26/1 26 -Ethernet104 9,10,11,12 Ethernet27/1 27 -Ethernet108 13,14,15,16 Ethernet28/1 28 -Ethernet112 17,18,19,20 Ethernet29/1 29 -Ethernet116 21,22,23,24 Ethernet30/1 30 -Ethernet120 25,26,27,28 Ethernet31/1 31 -Ethernet124 29,30,31,32 Ethernet32/1 32 +# name lanes alias index speed +Ethernet0 33,34,35,36 Ethernet1/1 1 100000 +Ethernet4 37,38,39,40 Ethernet2/1 2 100000 +Ethernet8 41,42,43,44 Ethernet3/1 3 100000 +Ethernet12 45,46,47,48 Ethernet4/1 4 100000 +Ethernet16 49,50,51,52 Ethernet5/1 5 100000 +Ethernet20 53,54,55,56 Ethernet6/1 6 100000 +Ethernet24 57,58,59,60 Ethernet7/1 7 100000 +Ethernet28 61,62,63,64 Ethernet8/1 8 100000 +Ethernet32 65,66,67,68 Ethernet9/1 9 100000 +Ethernet36 69,70,71,72 Ethernet10/1 10 100000 +Ethernet40 73,74,75,76 Ethernet11/1 11 100000 +Ethernet44 77,78,79,80 Ethernet12/1 12 100000 +Ethernet48 81,82,83,84 Ethernet13/1 13 100000 +Ethernet52 85,86,87,88 Ethernet14/1 14 100000 +Ethernet56 89,90,91,92 Ethernet15/1 15 100000 +Ethernet60 93,94,95,96 Ethernet16/1 16 100000 +Ethernet64 97,98,99,100 Ethernet17/1 17 100000 +Ethernet68 101,102,103,104 Ethernet18/1 18 100000 +Ethernet72 105,106,107,108 Ethernet19/1 19 100000 +Ethernet76 109,110,111,112 Ethernet20/1 20 100000 +Ethernet80 113,114,115,116 Ethernet21/1 21 100000 +Ethernet84 117,118,119,120 Ethernet22/1 22 100000 +Ethernet88 121,122,123,124 Ethernet23/1 23 100000 +Ethernet92 125,126,127,128 Ethernet24/1 24 100000 +Ethernet96 1,2,3,4 Ethernet25/1 25 100000 +Ethernet100 5,6,7,8 Ethernet26/1 26 100000 +Ethernet104 9,10,11,12 Ethernet27/1 27 100000 +Ethernet108 13,14,15,16 Ethernet28/1 28 100000 +Ethernet112 17,18,19,20 Ethernet29/1 29 100000 +Ethernet116 21,22,23,24 Ethernet30/1 30 100000 +Ethernet120 25,26,27,28 Ethernet31/1 31 100000 +Ethernet124 29,30,31,32 Ethernet32/1 32 100000 diff --git a/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-C32/sai.profile b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-C32/sai.profile index 66f88f894c3..40125c4bf39 100644 --- a/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-C32/sai.profile +++ b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-C32/sai.profile @@ -1,2 +1,9 @@ SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th-a7060-cx32s-32x100G-t1.config.bcm SAI_NUM_ECMP_MEMBERS=64 +# BROADCOM_LEGACY_SAI_COMPAT: TH1 (BCM56960) has no streaming telemetry platform driver; +# sai_query_stats_st_capability crashes in brcm_sai_st_pd_ctr_cap_list_get. +SAI_STATS_ST_CAPABILITY_SUPPORTED=0 + +# BROADCOM_LEGACY_SAI_COMPAT: sai_get_stats_ext is not supported for switch objects on TH1 (BCM56960). +# Setting to 0 disables use_sai_stats_ext in FlexCounter for COUNTER_TYPE_SWITCH. +SAI_STATS_EXT_SWITCH_SUPPORTED=0 diff --git a/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-D48C8/port_config.ini b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-D48C8/port_config.ini index 0366a339f6f..3abbf802a7f 100644 --- a/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-D48C8/port_config.ini +++ b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-D48C8/port_config.ini @@ -1,57 +1,57 @@ -# name lanes alias index speed -Ethernet0 33,34 Ethernet1/1 1 50000 -Ethernet2 35,36 Ethernet1/3 1 50000 -Ethernet4 37,38 Ethernet2/1 2 50000 -Ethernet6 39,40 Ethernet2/3 2 50000 -Ethernet8 41,42 Ethernet3/1 3 50000 -Ethernet10 43,44 Ethernet3/3 3 50000 -Ethernet12 45,46 Ethernet4/1 4 50000 -Ethernet14 47,48 Ethernet4/3 4 50000 -Ethernet16 49,50 Ethernet5/1 5 50000 -Ethernet18 51,52 Ethernet5/3 5 50000 -Ethernet20 53,54 Ethernet6/1 6 50000 -Ethernet22 55,56 Ethernet6/3 6 50000 -Ethernet24 57,58,59,60 Ethernet7/1 7 100000 -Ethernet28 61,62,63,64 Ethernet8/1 8 100000 -Ethernet32 65,66,67,68 Ethernet9/1 9 100000 -Ethernet36 69,70,71,72 Ethernet10/1 10 100000 -Ethernet40 73,74 Ethernet11/1 11 50000 -Ethernet42 75,76 Ethernet11/3 11 50000 -Ethernet44 77,78 Ethernet12/1 12 50000 -Ethernet46 79,80 Ethernet12/3 12 50000 -Ethernet48 81,82 Ethernet13/1 13 50000 -Ethernet50 83,84 Ethernet13/3 13 50000 -Ethernet52 85,86 Ethernet14/1 14 50000 -Ethernet54 87,88 Ethernet14/3 14 50000 -Ethernet56 89,90 Ethernet15/1 15 50000 -Ethernet58 91,92 Ethernet15/3 15 50000 -Ethernet60 93,94 Ethernet16/1 16 50000 -Ethernet62 95,96 Ethernet16/3 16 50000 -Ethernet64 97,98 Ethernet17/1 17 50000 -Ethernet66 99,100 Ethernet17/3 17 50000 -Ethernet68 101,102 Ethernet18/1 18 50000 -Ethernet70 103,104 Ethernet18/3 18 50000 -Ethernet72 105,106 Ethernet19/1 19 50000 -Ethernet74 107,108 Ethernet19/3 19 50000 -Ethernet76 109,110 Ethernet20/1 20 50000 -Ethernet78 111,112 Ethernet20/3 20 50000 -Ethernet80 113,114 Ethernet21/1 21 50000 -Ethernet82 115,116 Ethernet21/3 21 50000 -Ethernet84 117,118 Ethernet22/1 22 50000 -Ethernet86 119,120 Ethernet22/3 22 50000 -Ethernet88 121,122,123,124 Ethernet23/1 23 100000 -Ethernet92 125,126,127,128 Ethernet24/1 24 100000 -Ethernet96 1,2,3,4 Ethernet25/1 25 100000 -Ethernet100 5,6,7,8 Ethernet26/1 26 100000 -Ethernet104 9,10 Ethernet27/1 27 50000 -Ethernet106 11,12 Ethernet27/3 27 50000 -Ethernet108 13,14 Ethernet28/1 28 50000 -Ethernet110 15,16 Ethernet28/3 28 50000 -Ethernet112 17,18 Ethernet29/1 29 50000 -Ethernet114 19,20 Ethernet29/3 29 50000 -Ethernet116 21,22 Ethernet30/1 30 50000 -Ethernet118 23,24 Ethernet30/3 30 50000 -Ethernet120 25,26 Ethernet31/1 31 50000 -Ethernet122 27,28 Ethernet31/3 31 50000 -Ethernet124 29,30 Ethernet32/1 32 50000 -Ethernet126 31,32 Ethernet32/3 32 50000 +# name lanes alias index speed subport +Ethernet0 33,34 Ethernet1/1 1 50000 1 +Ethernet2 35,36 Ethernet1/3 1 50000 2 +Ethernet4 37,38 Ethernet2/1 2 50000 1 +Ethernet6 39,40 Ethernet2/3 2 50000 2 +Ethernet8 41,42 Ethernet3/1 3 50000 1 +Ethernet10 43,44 Ethernet3/3 3 50000 2 +Ethernet12 45,46 Ethernet4/1 4 50000 1 +Ethernet14 47,48 Ethernet4/3 4 50000 2 +Ethernet16 49,50 Ethernet5/1 5 50000 1 +Ethernet18 51,52 Ethernet5/3 5 50000 2 +Ethernet20 53,54 Ethernet6/1 6 50000 1 +Ethernet22 55,56 Ethernet6/3 6 50000 2 +Ethernet24 57,58,59,60 Ethernet7/1 7 100000 0 +Ethernet28 61,62,63,64 Ethernet8/1 8 100000 0 +Ethernet32 65,66,67,68 Ethernet9/1 9 100000 0 +Ethernet36 69,70,71,72 Ethernet10/1 10 100000 0 +Ethernet40 73,74 Ethernet11/1 11 50000 1 +Ethernet42 75,76 Ethernet11/3 11 50000 2 +Ethernet44 77,78 Ethernet12/1 12 50000 1 +Ethernet46 79,80 Ethernet12/3 12 50000 2 +Ethernet48 81,82 Ethernet13/1 13 50000 1 +Ethernet50 83,84 Ethernet13/3 13 50000 2 +Ethernet52 85,86 Ethernet14/1 14 50000 1 +Ethernet54 87,88 Ethernet14/3 14 50000 2 +Ethernet56 89,90 Ethernet15/1 15 50000 1 +Ethernet58 91,92 Ethernet15/3 15 50000 2 +Ethernet60 93,94 Ethernet16/1 16 50000 1 +Ethernet62 95,96 Ethernet16/3 16 50000 2 +Ethernet64 97,98 Ethernet17/1 17 50000 1 +Ethernet66 99,100 Ethernet17/3 17 50000 2 +Ethernet68 101,102 Ethernet18/1 18 50000 1 +Ethernet70 103,104 Ethernet18/3 18 50000 2 +Ethernet72 105,106 Ethernet19/1 19 50000 1 +Ethernet74 107,108 Ethernet19/3 19 50000 2 +Ethernet76 109,110 Ethernet20/1 20 50000 1 +Ethernet78 111,112 Ethernet20/3 20 50000 2 +Ethernet80 113,114 Ethernet21/1 21 50000 1 +Ethernet82 115,116 Ethernet21/3 21 50000 2 +Ethernet84 117,118 Ethernet22/1 22 50000 1 +Ethernet86 119,120 Ethernet22/3 22 50000 2 +Ethernet88 121,122,123,124 Ethernet23/1 23 100000 0 +Ethernet92 125,126,127,128 Ethernet24/1 24 100000 0 +Ethernet96 1,2,3,4 Ethernet25/1 25 100000 0 +Ethernet100 5,6,7,8 Ethernet26/1 26 100000 0 +Ethernet104 9,10 Ethernet27/1 27 50000 1 +Ethernet106 11,12 Ethernet27/3 27 50000 2 +Ethernet108 13,14 Ethernet28/1 28 50000 1 +Ethernet110 15,16 Ethernet28/3 28 50000 2 +Ethernet112 17,18 Ethernet29/1 29 50000 1 +Ethernet114 19,20 Ethernet29/3 29 50000 2 +Ethernet116 21,22 Ethernet30/1 30 50000 1 +Ethernet118 23,24 Ethernet30/3 30 50000 2 +Ethernet120 25,26 Ethernet31/1 31 50000 1 +Ethernet122 27,28 Ethernet31/3 31 50000 2 +Ethernet124 29,30 Ethernet32/1 32 50000 1 +Ethernet126 31,32 Ethernet32/3 32 50000 2 diff --git a/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-D48C8/sai.profile b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-D48C8/sai.profile index 692f79decc1..d30aca7862c 100644 --- a/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-D48C8/sai.profile +++ b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-D48C8/sai.profile @@ -1,2 +1,9 @@ SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th-a7060-cx32s-8x100G+48x50G.config.bcm SAI_NUM_ECMP_MEMBERS=64 +# BROADCOM_LEGACY_SAI_COMPAT: TH1 (BCM56960) has no streaming telemetry platform driver; +# sai_query_stats_st_capability crashes in brcm_sai_st_pd_ctr_cap_list_get. +SAI_STATS_ST_CAPABILITY_SUPPORTED=0 + +# BROADCOM_LEGACY_SAI_COMPAT: sai_get_stats_ext is not supported for switch objects on TH1 (BCM56960). +# Setting to 0 disables use_sai_stats_ext in FlexCounter for COUNTER_TYPE_SWITCH. +SAI_STATS_EXT_SWITCH_SUPPORTED=0 diff --git a/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-Q24C8/sai.profile b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-Q24C8/sai.profile index 08abf119894..1d42106777d 100644 --- a/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-Q24C8/sai.profile +++ b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-Q24C8/sai.profile @@ -1,2 +1,9 @@ SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th-a7060-cx32s-8x100G+24x40G.config.bcm SAI_NUM_ECMP_MEMBERS=64 +# BROADCOM_LEGACY_SAI_COMPAT: TH1 (BCM56960) has no streaming telemetry platform driver; +# sai_query_stats_st_capability crashes in brcm_sai_st_pd_ctr_cap_list_get. +SAI_STATS_ST_CAPABILITY_SUPPORTED=0 + +# BROADCOM_LEGACY_SAI_COMPAT: sai_get_stats_ext is not supported for switch objects on TH1 (BCM56960). +# Setting to 0 disables use_sai_stats_ext in FlexCounter for COUNTER_TYPE_SWITCH. +SAI_STATS_EXT_SWITCH_SUPPORTED=0 diff --git a/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-Q32/media_settings.json b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-Q32/media_settings.json index c87165f0ed5..7fdbb4f25cb 100644 --- a/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-Q32/media_settings.json +++ b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-Q32/media_settings.json @@ -1,26 +1,30 @@ { "GLOBAL_MEDIA_SETTINGS": { "1-6": { - ".*": { + "COPPER10": { + "unreliable_los": "off" + }, + "OPTICAL10": { "interface_type": "sr4", "unreliable_los": "on" - } - }, "11-22": { - ".*": { + "COPPER10": { + "unreliable_los": "off" + }, + "OPTICAL10": { "interface_type": "sr4", "unreliable_los": "on" - } - }, "27-30": { - ".*": { + "COPPER10": { + "unreliable_los": "off" + }, + "OPTICAL10": { "interface_type": "sr4", "unreliable_los": "on" - } } } diff --git a/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-Q32/port_config.ini b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-Q32/port_config.ini index bfe4a721141..47b79780ade 100644 --- a/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-Q32/port_config.ini +++ b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-Q32/port_config.ini @@ -1,33 +1,33 @@ -# name lanes alias index -Ethernet0 33,34,35,36 Ethernet1/1 1 -Ethernet4 37,38,39,40 Ethernet2/1 2 -Ethernet8 41,42,43,44 Ethernet3/1 3 -Ethernet12 45,46,47,48 Ethernet4/1 4 -Ethernet16 49,50,51,52 Ethernet5/1 5 -Ethernet20 53,54,55,56 Ethernet6/1 6 -Ethernet24 57,58,59,60 Ethernet7/1 7 -Ethernet28 61,62,63,64 Ethernet8/1 8 -Ethernet32 65,66,67,68 Ethernet9/1 9 -Ethernet36 69,70,71,72 Ethernet10/1 10 -Ethernet40 73,74,75,76 Ethernet11/1 11 -Ethernet44 77,78,79,80 Ethernet12/1 12 -Ethernet48 81,82,83,84 Ethernet13/1 13 -Ethernet52 85,86,87,88 Ethernet14/1 14 -Ethernet56 89,90,91,92 Ethernet15/1 15 -Ethernet60 93,94,95,96 Ethernet16/1 16 -Ethernet64 97,98,99,100 Ethernet17/1 17 -Ethernet68 101,102,103,104 Ethernet18/1 18 -Ethernet72 105,106,107,108 Ethernet19/1 19 -Ethernet76 109,110,111,112 Ethernet20/1 20 -Ethernet80 113,114,115,116 Ethernet21/1 21 -Ethernet84 117,118,119,120 Ethernet22/1 22 -Ethernet88 121,122,123,124 Ethernet23/1 23 -Ethernet92 125,126,127,128 Ethernet24/1 24 -Ethernet96 1,2,3,4 Ethernet25/1 25 -Ethernet100 5,6,7,8 Ethernet26/1 26 -Ethernet104 9,10,11,12 Ethernet27/1 27 -Ethernet108 13,14,15,16 Ethernet28/1 28 -Ethernet112 17,18,19,20 Ethernet29/1 29 -Ethernet116 21,22,23,24 Ethernet30/1 30 -Ethernet120 25,26,27,28 Ethernet31/1 31 -Ethernet124 29,30,31,32 Ethernet32/1 32 +# name lanes alias index speed +Ethernet0 33,34,35,36 Ethernet1/1 1 40000 +Ethernet4 37,38,39,40 Ethernet2/1 2 40000 +Ethernet8 41,42,43,44 Ethernet3/1 3 40000 +Ethernet12 45,46,47,48 Ethernet4/1 4 40000 +Ethernet16 49,50,51,52 Ethernet5/1 5 40000 +Ethernet20 53,54,55,56 Ethernet6/1 6 40000 +Ethernet24 57,58,59,60 Ethernet7/1 7 40000 +Ethernet28 61,62,63,64 Ethernet8/1 8 40000 +Ethernet32 65,66,67,68 Ethernet9/1 9 40000 +Ethernet36 69,70,71,72 Ethernet10/1 10 40000 +Ethernet40 73,74,75,76 Ethernet11/1 11 40000 +Ethernet44 77,78,79,80 Ethernet12/1 12 40000 +Ethernet48 81,82,83,84 Ethernet13/1 13 40000 +Ethernet52 85,86,87,88 Ethernet14/1 14 40000 +Ethernet56 89,90,91,92 Ethernet15/1 15 40000 +Ethernet60 93,94,95,96 Ethernet16/1 16 40000 +Ethernet64 97,98,99,100 Ethernet17/1 17 40000 +Ethernet68 101,102,103,104 Ethernet18/1 18 40000 +Ethernet72 105,106,107,108 Ethernet19/1 19 40000 +Ethernet76 109,110,111,112 Ethernet20/1 20 40000 +Ethernet80 113,114,115,116 Ethernet21/1 21 40000 +Ethernet84 117,118,119,120 Ethernet22/1 22 40000 +Ethernet88 121,122,123,124 Ethernet23/1 23 40000 +Ethernet92 125,126,127,128 Ethernet24/1 24 40000 +Ethernet96 1,2,3,4 Ethernet25/1 25 40000 +Ethernet100 5,6,7,8 Ethernet26/1 26 40000 +Ethernet104 9,10,11,12 Ethernet27/1 27 40000 +Ethernet108 13,14,15,16 Ethernet28/1 28 40000 +Ethernet112 17,18,19,20 Ethernet29/1 29 40000 +Ethernet116 21,22,23,24 Ethernet30/1 30 40000 +Ethernet120 25,26,27,28 Ethernet31/1 31 40000 +Ethernet124 29,30,31,32 Ethernet32/1 32 40000 diff --git a/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-Q32/sai.profile.j2 b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-Q32/sai.profile.j2 index 5a50185247a..ec9b1bf1e2f 100644 --- a/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-Q32/sai.profile.j2 +++ b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-Q32/sai.profile.j2 @@ -12,3 +12,11 @@ {# Write the contents of sai_ profile_filename to sai.profile file #} {{ sai_profile_contents }} SAI_NUM_ECMP_MEMBERS=64 + +# BROADCOM_LEGACY_SAI_COMPAT: TH1 (BCM56960) has no streaming telemetry platform driver; +# sai_query_stats_st_capability crashes in brcm_sai_st_pd_ctr_cap_list_get. +SAI_STATS_ST_CAPABILITY_SUPPORTED=0 + +# BROADCOM_LEGACY_SAI_COMPAT: sai_get_stats_ext is not supported for switch objects on TH1 (BCM56960). +# Setting to 0 disables use_sai_stats_ext in FlexCounter for COUNTER_TYPE_SWITCH. +SAI_STATS_EXT_SWITCH_SUPPORTED=0 diff --git a/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-T96C8/port_config.ini b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-T96C8/port_config.ini index ddb80965e1d..ee3961233d4 100644 --- a/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-T96C8/port_config.ini +++ b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-T96C8/port_config.ini @@ -1,105 +1,105 @@ -# name lanes alias index speed -Ethernet0 33 Ethernet1/1 1 25000 -Ethernet1 34 Ethernet1/2 1 25000 -Ethernet2 35 Ethernet1/3 1 25000 -Ethernet3 36 Ethernet1/4 1 25000 -Ethernet4 37 Ethernet2/1 2 25000 -Ethernet5 38 Ethernet2/2 2 25000 -Ethernet6 39 Ethernet2/3 2 25000 -Ethernet7 40 Ethernet2/4 2 25000 -Ethernet8 41 Ethernet3/1 3 25000 -Ethernet9 42 Ethernet3/2 3 25000 -Ethernet10 43 Ethernet3/3 3 25000 -Ethernet11 44 Ethernet3/4 3 25000 -Ethernet12 45 Ethernet4/1 4 25000 -Ethernet13 46 Ethernet4/2 4 25000 -Ethernet14 47 Ethernet4/3 4 25000 -Ethernet15 48 Ethernet4/4 4 25000 -Ethernet16 49 Ethernet5/1 5 25000 -Ethernet17 50 Ethernet5/2 5 25000 -Ethernet18 51 Ethernet5/3 5 25000 -Ethernet19 52 Ethernet5/4 5 25000 -Ethernet20 53 Ethernet6/1 6 25000 -Ethernet21 54 Ethernet6/2 6 25000 -Ethernet22 55 Ethernet6/3 6 25000 -Ethernet23 56 Ethernet6/4 6 25000 -Ethernet24 57,58,59,60 Ethernet7/1 7 100000 -Ethernet28 61,62,63,64 Ethernet8/1 8 100000 -Ethernet32 65,66,67,68 Ethernet9/1 9 100000 -Ethernet36 69,70,71,72 Ethernet10/1 10 100000 -Ethernet40 73 Ethernet11/1 11 25000 -Ethernet41 74 Ethernet11/2 11 25000 -Ethernet42 75 Ethernet11/3 11 25000 -Ethernet43 76 Ethernet11/4 11 25000 -Ethernet44 77 Ethernet12/1 12 25000 -Ethernet45 78 Ethernet12/2 12 25000 -Ethernet46 79 Ethernet12/3 12 25000 -Ethernet47 80 Ethernet12/4 12 25000 -Ethernet48 81 Ethernet13/1 13 25000 -Ethernet49 82 Ethernet13/2 13 25000 -Ethernet50 83 Ethernet13/3 13 25000 -Ethernet51 84 Ethernet13/4 13 25000 -Ethernet52 85 Ethernet14/1 14 25000 -Ethernet53 86 Ethernet14/2 14 25000 -Ethernet54 87 Ethernet14/3 14 25000 -Ethernet55 88 Ethernet14/4 14 25000 -Ethernet56 89 Ethernet15/1 15 25000 -Ethernet57 90 Ethernet15/2 15 25000 -Ethernet58 91 Ethernet15/3 15 25000 -Ethernet59 92 Ethernet15/4 15 25000 -Ethernet60 93 Ethernet16/1 16 25000 -Ethernet61 94 Ethernet16/2 16 25000 -Ethernet62 95 Ethernet16/3 16 25000 -Ethernet63 96 Ethernet16/4 16 25000 -Ethernet64 97 Ethernet17/1 17 25000 -Ethernet65 98 Ethernet17/2 17 25000 -Ethernet66 99 Ethernet17/3 17 25000 -Ethernet67 100 Ethernet17/4 17 25000 -Ethernet68 101 Ethernet18/1 18 25000 -Ethernet69 102 Ethernet18/2 18 25000 -Ethernet70 103 Ethernet18/3 18 25000 -Ethernet71 104 Ethernet18/4 18 25000 -Ethernet72 105 Ethernet19/1 19 25000 -Ethernet73 106 Ethernet19/2 19 25000 -Ethernet74 107 Ethernet19/3 19 25000 -Ethernet75 108 Ethernet19/4 19 25000 -Ethernet76 109 Ethernet20/1 20 25000 -Ethernet77 110 Ethernet20/2 20 25000 -Ethernet78 111 Ethernet20/3 20 25000 -Ethernet79 112 Ethernet20/4 20 25000 -Ethernet80 113 Ethernet21/1 21 25000 -Ethernet81 114 Ethernet21/2 21 25000 -Ethernet82 115 Ethernet21/3 21 25000 -Ethernet83 116 Ethernet21/4 21 25000 -Ethernet84 117 Ethernet22/1 22 25000 -Ethernet85 118 Ethernet22/2 22 25000 -Ethernet86 119 Ethernet22/3 22 25000 -Ethernet87 120 Ethernet22/4 22 25000 -Ethernet88 121,122,123,124 Ethernet23/1 23 100000 -Ethernet92 125,126,127,128 Ethernet24/1 24 100000 -Ethernet96 1,2,3,4 Ethernet25/1 25 100000 -Ethernet100 5,6,7,8 Ethernet26/1 26 100000 -Ethernet104 9 Ethernet27/1 27 25000 -Ethernet105 10 Ethernet27/2 27 25000 -Ethernet106 11 Ethernet27/3 27 25000 -Ethernet107 12 Ethernet27/4 27 25000 -Ethernet108 13 Ethernet28/1 28 25000 -Ethernet109 14 Ethernet28/2 28 25000 -Ethernet110 15 Ethernet28/3 28 25000 -Ethernet111 16 Ethernet28/4 28 25000 -Ethernet112 17 Ethernet29/1 29 25000 -Ethernet113 18 Ethernet29/2 29 25000 -Ethernet114 19 Ethernet29/3 29 25000 -Ethernet115 20 Ethernet29/4 29 25000 -Ethernet116 21 Ethernet30/1 30 25000 -Ethernet117 22 Ethernet30/2 30 25000 -Ethernet118 23 Ethernet30/3 30 25000 -Ethernet119 24 Ethernet30/4 30 25000 -Ethernet120 25 Ethernet31/1 31 25000 -Ethernet121 26 Ethernet31/2 31 25000 -Ethernet122 27 Ethernet31/3 31 25000 -Ethernet123 28 Ethernet31/4 31 25000 -Ethernet124 29 Ethernet32/1 32 25000 -Ethernet125 30 Ethernet32/2 32 25000 -Ethernet126 31 Ethernet32/3 32 25000 -Ethernet127 32 Ethernet32/4 32 25000 +# name lanes alias index speed subport +Ethernet0 33 Ethernet1/1 1 25000 1 +Ethernet1 34 Ethernet1/2 1 25000 2 +Ethernet2 35 Ethernet1/3 1 25000 3 +Ethernet3 36 Ethernet1/4 1 25000 4 +Ethernet4 37 Ethernet2/1 2 25000 1 +Ethernet5 38 Ethernet2/2 2 25000 2 +Ethernet6 39 Ethernet2/3 2 25000 3 +Ethernet7 40 Ethernet2/4 2 25000 4 +Ethernet8 41 Ethernet3/1 3 25000 1 +Ethernet9 42 Ethernet3/2 3 25000 2 +Ethernet10 43 Ethernet3/3 3 25000 3 +Ethernet11 44 Ethernet3/4 3 25000 4 +Ethernet12 45 Ethernet4/1 4 25000 1 +Ethernet13 46 Ethernet4/2 4 25000 2 +Ethernet14 47 Ethernet4/3 4 25000 3 +Ethernet15 48 Ethernet4/4 4 25000 4 +Ethernet16 49 Ethernet5/1 5 25000 1 +Ethernet17 50 Ethernet5/2 5 25000 2 +Ethernet18 51 Ethernet5/3 5 25000 3 +Ethernet19 52 Ethernet5/4 5 25000 4 +Ethernet20 53 Ethernet6/1 6 25000 1 +Ethernet21 54 Ethernet6/2 6 25000 2 +Ethernet22 55 Ethernet6/3 6 25000 3 +Ethernet23 56 Ethernet6/4 6 25000 4 +Ethernet24 57,58,59,60 Ethernet7/1 7 100000 0 +Ethernet28 61,62,63,64 Ethernet8/1 8 100000 0 +Ethernet32 65,66,67,68 Ethernet9/1 9 100000 0 +Ethernet36 69,70,71,72 Ethernet10/1 10 100000 0 +Ethernet40 73 Ethernet11/1 11 25000 1 +Ethernet41 74 Ethernet11/2 11 25000 2 +Ethernet42 75 Ethernet11/3 11 25000 3 +Ethernet43 76 Ethernet11/4 11 25000 4 +Ethernet44 77 Ethernet12/1 12 25000 1 +Ethernet45 78 Ethernet12/2 12 25000 2 +Ethernet46 79 Ethernet12/3 12 25000 3 +Ethernet47 80 Ethernet12/4 12 25000 4 +Ethernet48 81 Ethernet13/1 13 25000 1 +Ethernet49 82 Ethernet13/2 13 25000 2 +Ethernet50 83 Ethernet13/3 13 25000 3 +Ethernet51 84 Ethernet13/4 13 25000 4 +Ethernet52 85 Ethernet14/1 14 25000 1 +Ethernet53 86 Ethernet14/2 14 25000 2 +Ethernet54 87 Ethernet14/3 14 25000 3 +Ethernet55 88 Ethernet14/4 14 25000 4 +Ethernet56 89 Ethernet15/1 15 25000 1 +Ethernet57 90 Ethernet15/2 15 25000 2 +Ethernet58 91 Ethernet15/3 15 25000 3 +Ethernet59 92 Ethernet15/4 15 25000 4 +Ethernet60 93 Ethernet16/1 16 25000 1 +Ethernet61 94 Ethernet16/2 16 25000 2 +Ethernet62 95 Ethernet16/3 16 25000 3 +Ethernet63 96 Ethernet16/4 16 25000 4 +Ethernet64 97 Ethernet17/1 17 25000 1 +Ethernet65 98 Ethernet17/2 17 25000 2 +Ethernet66 99 Ethernet17/3 17 25000 3 +Ethernet67 100 Ethernet17/4 17 25000 4 +Ethernet68 101 Ethernet18/1 18 25000 1 +Ethernet69 102 Ethernet18/2 18 25000 2 +Ethernet70 103 Ethernet18/3 18 25000 3 +Ethernet71 104 Ethernet18/4 18 25000 4 +Ethernet72 105 Ethernet19/1 19 25000 1 +Ethernet73 106 Ethernet19/2 19 25000 2 +Ethernet74 107 Ethernet19/3 19 25000 3 +Ethernet75 108 Ethernet19/4 19 25000 4 +Ethernet76 109 Ethernet20/1 20 25000 1 +Ethernet77 110 Ethernet20/2 20 25000 2 +Ethernet78 111 Ethernet20/3 20 25000 3 +Ethernet79 112 Ethernet20/4 20 25000 4 +Ethernet80 113 Ethernet21/1 21 25000 1 +Ethernet81 114 Ethernet21/2 21 25000 2 +Ethernet82 115 Ethernet21/3 21 25000 3 +Ethernet83 116 Ethernet21/4 21 25000 4 +Ethernet84 117 Ethernet22/1 22 25000 1 +Ethernet85 118 Ethernet22/2 22 25000 2 +Ethernet86 119 Ethernet22/3 22 25000 3 +Ethernet87 120 Ethernet22/4 22 25000 4 +Ethernet88 121,122,123,124 Ethernet23/1 23 100000 0 +Ethernet92 125,126,127,128 Ethernet24/1 24 100000 0 +Ethernet96 1,2,3,4 Ethernet25/1 25 100000 0 +Ethernet100 5,6,7,8 Ethernet26/1 26 100000 0 +Ethernet104 9 Ethernet27/1 27 25000 1 +Ethernet105 10 Ethernet27/2 27 25000 2 +Ethernet106 11 Ethernet27/3 27 25000 3 +Ethernet107 12 Ethernet27/4 27 25000 4 +Ethernet108 13 Ethernet28/1 28 25000 1 +Ethernet109 14 Ethernet28/2 28 25000 2 +Ethernet110 15 Ethernet28/3 28 25000 3 +Ethernet111 16 Ethernet28/4 28 25000 4 +Ethernet112 17 Ethernet29/1 29 25000 1 +Ethernet113 18 Ethernet29/2 29 25000 2 +Ethernet114 19 Ethernet29/3 29 25000 3 +Ethernet115 20 Ethernet29/4 29 25000 4 +Ethernet116 21 Ethernet30/1 30 25000 1 +Ethernet117 22 Ethernet30/2 30 25000 2 +Ethernet118 23 Ethernet30/3 30 25000 3 +Ethernet119 24 Ethernet30/4 30 25000 4 +Ethernet120 25 Ethernet31/1 31 25000 1 +Ethernet121 26 Ethernet31/2 31 25000 2 +Ethernet122 27 Ethernet31/3 31 25000 3 +Ethernet123 28 Ethernet31/4 31 25000 4 +Ethernet124 29 Ethernet32/1 32 25000 1 +Ethernet125 30 Ethernet32/2 32 25000 2 +Ethernet126 31 Ethernet32/3 32 25000 3 +Ethernet127 32 Ethernet32/4 32 25000 4 diff --git a/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-T96C8/sai.profile b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-T96C8/sai.profile index f9a1e2bdc4d..7f4370d4e2f 100644 --- a/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-T96C8/sai.profile +++ b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S-T96C8/sai.profile @@ -1,2 +1,9 @@ SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th-a7060-cx32s-8x100G+96x25G.config.bcm SAI_NUM_ECMP_MEMBERS=64 +# BROADCOM_LEGACY_SAI_COMPAT: TH1 (BCM56960) has no streaming telemetry platform driver; +# sai_query_stats_st_capability crashes in brcm_sai_st_pd_ctr_cap_list_get. +SAI_STATS_ST_CAPABILITY_SUPPORTED=0 + +# BROADCOM_LEGACY_SAI_COMPAT: sai_get_stats_ext is not supported for switch objects on TH1 (BCM56960). +# Setting to 0 disables use_sai_stats_ext in FlexCounter for COUNTER_TYPE_SWITCH. +SAI_STATS_EXT_SWITCH_SUPPORTED=0 diff --git a/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S/port_config.ini b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S/port_config.ini index d44f6f541fa..a51c51639fd 100644 --- a/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S/port_config.ini +++ b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S/port_config.ini @@ -1,35 +1,35 @@ -# name lanes alias index -Ethernet0 33,34,35,36 Ethernet1/1 1 -Ethernet4 37,38,39,40 Ethernet2/1 2 -Ethernet8 41,42,43,44 Ethernet3/1 3 -Ethernet12 45,46,47,48 Ethernet4/1 4 -Ethernet16 49,50,51,52 Ethernet5/1 5 -Ethernet20 53,54,55,56 Ethernet6/1 6 -Ethernet24 57,58,59,60 Ethernet7/1 7 -Ethernet28 61,62,63,64 Ethernet8/1 8 -Ethernet32 65,66,67,68 Ethernet9/1 9 -Ethernet36 69,70,71,72 Ethernet10/1 10 -Ethernet40 73,74,75,76 Ethernet11/1 11 -Ethernet44 77,78,79,80 Ethernet12/1 12 -Ethernet48 81,82,83,84 Ethernet13/1 13 -Ethernet52 85,86,87,88 Ethernet14/1 14 -Ethernet56 89,90,91,92 Ethernet15/1 15 -Ethernet60 93,94,95,96 Ethernet16/1 16 -Ethernet64 97,98,99,100 Ethernet17/1 17 -Ethernet68 101,102,103,104 Ethernet18/1 18 -Ethernet72 105,106,107,108 Ethernet19/1 19 -Ethernet76 109,110,111,112 Ethernet20/1 20 -Ethernet80 113,114,115,116 Ethernet21/1 21 -Ethernet84 117,118,119,120 Ethernet22/1 22 -Ethernet88 121,122,123,124 Ethernet23/1 23 -Ethernet92 125,126,127,128 Ethernet24/1 24 -Ethernet96 1,2,3,4 Ethernet25/1 25 -Ethernet100 5,6,7,8 Ethernet26/1 26 -Ethernet104 9,10,11,12 Ethernet27/1 27 -Ethernet108 13,14,15,16 Ethernet28/1 28 -Ethernet112 17,18,19,20 Ethernet29/1 29 -Ethernet116 21,22,23,24 Ethernet30/1 30 -Ethernet120 25,26,27,28 Ethernet31/1 31 -Ethernet124 29,30,31,32 Ethernet32/1 32 -Ethernet128 129 Ethernet33 33 -Ethernet129 131 Ethernet34 34 +# name lanes alias index speed +Ethernet0 33,34,35,36 Ethernet1/1 1 100000 +Ethernet4 37,38,39,40 Ethernet2/1 2 100000 +Ethernet8 41,42,43,44 Ethernet3/1 3 100000 +Ethernet12 45,46,47,48 Ethernet4/1 4 100000 +Ethernet16 49,50,51,52 Ethernet5/1 5 100000 +Ethernet20 53,54,55,56 Ethernet6/1 6 100000 +Ethernet24 57,58,59,60 Ethernet7/1 7 100000 +Ethernet28 61,62,63,64 Ethernet8/1 8 100000 +Ethernet32 65,66,67,68 Ethernet9/1 9 100000 +Ethernet36 69,70,71,72 Ethernet10/1 10 100000 +Ethernet40 73,74,75,76 Ethernet11/1 11 100000 +Ethernet44 77,78,79,80 Ethernet12/1 12 100000 +Ethernet48 81,82,83,84 Ethernet13/1 13 100000 +Ethernet52 85,86,87,88 Ethernet14/1 14 100000 +Ethernet56 89,90,91,92 Ethernet15/1 15 100000 +Ethernet60 93,94,95,96 Ethernet16/1 16 100000 +Ethernet64 97,98,99,100 Ethernet17/1 17 100000 +Ethernet68 101,102,103,104 Ethernet18/1 18 100000 +Ethernet72 105,106,107,108 Ethernet19/1 19 100000 +Ethernet76 109,110,111,112 Ethernet20/1 20 100000 +Ethernet80 113,114,115,116 Ethernet21/1 21 100000 +Ethernet84 117,118,119,120 Ethernet22/1 22 100000 +Ethernet88 121,122,123,124 Ethernet23/1 23 100000 +Ethernet92 125,126,127,128 Ethernet24/1 24 100000 +Ethernet96 1,2,3,4 Ethernet25/1 25 100000 +Ethernet100 5,6,7,8 Ethernet26/1 26 100000 +Ethernet104 9,10,11,12 Ethernet27/1 27 100000 +Ethernet108 13,14,15,16 Ethernet28/1 28 100000 +Ethernet112 17,18,19,20 Ethernet29/1 29 100000 +Ethernet116 21,22,23,24 Ethernet30/1 30 100000 +Ethernet120 25,26,27,28 Ethernet31/1 31 100000 +Ethernet124 29,30,31,32 Ethernet32/1 32 100000 +Ethernet128 129 Ethernet33 33 10000 +Ethernet129 131 Ethernet34 34 10000 diff --git a/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S/sai.profile b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S/sai.profile index 28ab4255723..04c6164dd24 100644 --- a/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S/sai.profile +++ b/device/arista/x86_64-arista_7060_cx32s/Arista-7060CX-32S/sai.profile @@ -1 +1,8 @@ SAI_INIT_CONFIG_FILE=/usr/share/sonic/platform/th-a7060-cx32s-flex-all.config.bcm +# BROADCOM_LEGACY_SAI_COMPAT: TH1 (BCM56960) has no streaming telemetry platform driver; +# sai_query_stats_st_capability crashes in brcm_sai_st_pd_ctr_cap_list_get. +SAI_STATS_ST_CAPABILITY_SUPPORTED=0 + +# BROADCOM_LEGACY_SAI_COMPAT: sai_get_stats_ext is not supported for switch objects on TH1 (BCM56960). +# Setting to 0 disables use_sai_stats_ext in FlexCounter for COUNTER_TYPE_SWITCH. +SAI_STATS_EXT_SWITCH_SUPPORTED=0 diff --git a/device/arista/x86_64-arista_7060_cx32s/platform_asic b/device/arista/x86_64-arista_7060_cx32s/platform_asic index 96046765276..7974af6a10a 100644 --- a/device/arista/x86_64-arista_7060_cx32s/platform_asic +++ b/device/arista/x86_64-arista_7060_cx32s/platform_asic @@ -1 +1 @@ -broadcom +broadcom-legacy-th diff --git a/device/arista/x86_64-arista_7060dx5_64s/Arista-7060DX5-64S/blackhawk.xml b/device/arista/x86_64-arista_7060dx5_64s/Arista-7060DX5-64S/blackhawk.xml index 11bfbc5b681..813e6482a59 100644 --- a/device/arista/x86_64-arista_7060dx5_64s/Arista-7060DX5-64S/blackhawk.xml +++ b/device/arista/x86_64-arista_7060dx5_64s/Arista-7060DX5-64S/blackhawk.xml @@ -1,6 +1,6 @@ - CSDK-BH + blackhawk retimer 0 diff --git a/device/arista/x86_64-arista_7060px4_32/Arista-7060PX4-C64/port_config.ini b/device/arista/x86_64-arista_7060px4_32/Arista-7060PX4-C64/port_config.ini index 3a643598649..82ef01d559b 100644 --- a/device/arista/x86_64-arista_7060px4_32/Arista-7060PX4-C64/port_config.ini +++ b/device/arista/x86_64-arista_7060px4_32/Arista-7060PX4-C64/port_config.ini @@ -1,67 +1,67 @@ -# name lanes alias index speed -Ethernet0 1,2,3,4 Ethernet1/1 1 100000 -Ethernet4 5,6,7,8 Ethernet1/5 1 100000 -Ethernet8 9,10,11,12 Ethernet2/1 2 100000 -Ethernet12 13,14,15,16 Ethernet2/5 2 100000 -Ethernet16 17,18,19,20 Ethernet3/1 3 100000 -Ethernet20 21,22,23,24 Ethernet3/5 3 100000 -Ethernet24 25,26,27,28 Ethernet4/1 4 100000 -Ethernet28 29,30,31,32 Ethernet4/5 4 100000 -Ethernet32 33,34,35,36 Ethernet5/1 5 100000 -Ethernet36 37,38,39,40 Ethernet5/5 5 100000 -Ethernet40 41,42,43,44 Ethernet6/1 6 100000 -Ethernet44 45,46,47,48 Ethernet6/5 6 100000 -Ethernet48 49,50,51,52 Ethernet7/1 7 100000 -Ethernet52 53,54,55,56 Ethernet7/5 7 100000 -Ethernet56 57,58,59,60 Ethernet8/1 8 100000 -Ethernet60 61,62,63,64 Ethernet8/5 8 100000 -Ethernet64 65,66,67,68 Ethernet9/1 9 100000 -Ethernet68 69,70,71,72 Ethernet9/5 9 100000 -Ethernet72 73,74,75,76 Ethernet10/1 10 100000 -Ethernet76 77,78,79,80 Ethernet10/5 10 100000 -Ethernet80 81,82,83,84 Ethernet11/1 11 100000 -Ethernet84 85,86,87,88 Ethernet11/5 11 100000 -Ethernet88 89,90,91,92 Ethernet12/1 12 100000 -Ethernet92 93,94,95,96 Ethernet12/5 12 100000 -Ethernet96 97,98,99,100 Ethernet13/1 13 100000 -Ethernet100 101,102,103,104 Ethernet13/5 13 100000 -Ethernet104 105,106,107,108 Ethernet14/1 14 100000 -Ethernet108 109,110,111,112 Ethernet14/5 14 100000 -Ethernet112 113,114,115,116 Ethernet15/1 15 100000 -Ethernet116 117,118,119,120 Ethernet15/5 15 100000 -Ethernet120 121,122,123,124 Ethernet16/1 16 100000 -Ethernet124 125,126,127,128 Ethernet16/5 16 100000 -Ethernet128 129,130,131,132 Ethernet17/1 17 100000 -Ethernet132 133,134,135,136 Ethernet17/5 17 100000 -Ethernet136 137,138,139,140 Ethernet18/1 18 100000 -Ethernet140 141,142,143,144 Ethernet18/5 18 100000 -Ethernet144 145,146,147,148 Ethernet19/1 19 100000 -Ethernet148 149,150,151,152 Ethernet19/5 19 100000 -Ethernet152 153,154,155,156 Ethernet20/1 20 100000 -Ethernet156 157,158,159,160 Ethernet20/5 20 100000 -Ethernet160 161,162,163,164 Ethernet21/1 21 100000 -Ethernet164 165,166,167,168 Ethernet21/5 21 100000 -Ethernet168 169,170,171,172 Ethernet22/1 22 100000 -Ethernet172 173,174,175,176 Ethernet22/5 22 100000 -Ethernet176 177,178,179,180 Ethernet23/1 23 100000 -Ethernet180 181,182,183,184 Ethernet23/5 23 100000 -Ethernet184 185,186,187,188 Ethernet24/1 24 100000 -Ethernet188 189,190,191,192 Ethernet24/5 24 100000 -Ethernet192 193,194,195,196 Ethernet25/1 25 100000 -Ethernet196 197,198,199,200 Ethernet25/5 25 100000 -Ethernet200 201,202,203,204 Ethernet26/1 26 100000 -Ethernet204 205,206,207,208 Ethernet26/5 26 100000 -Ethernet208 209,210,211,212 Ethernet27/1 27 100000 -Ethernet212 213,214,215,216 Ethernet27/5 27 100000 -Ethernet216 217,218,219,220 Ethernet28/1 28 100000 -Ethernet220 221,222,223,224 Ethernet28/5 28 100000 -Ethernet224 225,226,227,228 Ethernet29/1 29 100000 -Ethernet228 229,230,231,232 Ethernet29/5 29 100000 -Ethernet232 233,234,235,236 Ethernet30/1 30 100000 -Ethernet236 237,238,239,240 Ethernet30/5 30 100000 -Ethernet240 241,242,243,244 Ethernet31/1 31 100000 -Ethernet244 245,246,247,248 Ethernet31/5 31 100000 -Ethernet248 249,250,251,252 Ethernet32/1 32 100000 -Ethernet252 253,254,255,256 Ethernet32/5 32 100000 -Ethernet256 258 Ethernet33 33 10000 -Ethernet260 257 Ethernet34 34 10000 +# name lanes alias index speed subport +Ethernet0 1,2,3,4 Ethernet1/1 1 100000 1 +Ethernet4 5,6,7,8 Ethernet1/5 1 100000 2 +Ethernet8 9,10,11,12 Ethernet2/1 2 100000 1 +Ethernet12 13,14,15,16 Ethernet2/5 2 100000 2 +Ethernet16 17,18,19,20 Ethernet3/1 3 100000 1 +Ethernet20 21,22,23,24 Ethernet3/5 3 100000 2 +Ethernet24 25,26,27,28 Ethernet4/1 4 100000 1 +Ethernet28 29,30,31,32 Ethernet4/5 4 100000 2 +Ethernet32 33,34,35,36 Ethernet5/1 5 100000 1 +Ethernet36 37,38,39,40 Ethernet5/5 5 100000 2 +Ethernet40 41,42,43,44 Ethernet6/1 6 100000 1 +Ethernet44 45,46,47,48 Ethernet6/5 6 100000 2 +Ethernet48 49,50,51,52 Ethernet7/1 7 100000 1 +Ethernet52 53,54,55,56 Ethernet7/5 7 100000 2 +Ethernet56 57,58,59,60 Ethernet8/1 8 100000 1 +Ethernet60 61,62,63,64 Ethernet8/5 8 100000 2 +Ethernet64 65,66,67,68 Ethernet9/1 9 100000 1 +Ethernet68 69,70,71,72 Ethernet9/5 9 100000 2 +Ethernet72 73,74,75,76 Ethernet10/1 10 100000 1 +Ethernet76 77,78,79,80 Ethernet10/5 10 100000 2 +Ethernet80 81,82,83,84 Ethernet11/1 11 100000 1 +Ethernet84 85,86,87,88 Ethernet11/5 11 100000 2 +Ethernet88 89,90,91,92 Ethernet12/1 12 100000 1 +Ethernet92 93,94,95,96 Ethernet12/5 12 100000 2 +Ethernet96 97,98,99,100 Ethernet13/1 13 100000 1 +Ethernet100 101,102,103,104 Ethernet13/5 13 100000 2 +Ethernet104 105,106,107,108 Ethernet14/1 14 100000 1 +Ethernet108 109,110,111,112 Ethernet14/5 14 100000 2 +Ethernet112 113,114,115,116 Ethernet15/1 15 100000 1 +Ethernet116 117,118,119,120 Ethernet15/5 15 100000 2 +Ethernet120 121,122,123,124 Ethernet16/1 16 100000 1 +Ethernet124 125,126,127,128 Ethernet16/5 16 100000 2 +Ethernet128 129,130,131,132 Ethernet17/1 17 100000 1 +Ethernet132 133,134,135,136 Ethernet17/5 17 100000 2 +Ethernet136 137,138,139,140 Ethernet18/1 18 100000 1 +Ethernet140 141,142,143,144 Ethernet18/5 18 100000 2 +Ethernet144 145,146,147,148 Ethernet19/1 19 100000 1 +Ethernet148 149,150,151,152 Ethernet19/5 19 100000 2 +Ethernet152 153,154,155,156 Ethernet20/1 20 100000 1 +Ethernet156 157,158,159,160 Ethernet20/5 20 100000 2 +Ethernet160 161,162,163,164 Ethernet21/1 21 100000 1 +Ethernet164 165,166,167,168 Ethernet21/5 21 100000 2 +Ethernet168 169,170,171,172 Ethernet22/1 22 100000 1 +Ethernet172 173,174,175,176 Ethernet22/5 22 100000 2 +Ethernet176 177,178,179,180 Ethernet23/1 23 100000 1 +Ethernet180 181,182,183,184 Ethernet23/5 23 100000 2 +Ethernet184 185,186,187,188 Ethernet24/1 24 100000 1 +Ethernet188 189,190,191,192 Ethernet24/5 24 100000 2 +Ethernet192 193,194,195,196 Ethernet25/1 25 100000 1 +Ethernet196 197,198,199,200 Ethernet25/5 25 100000 2 +Ethernet200 201,202,203,204 Ethernet26/1 26 100000 1 +Ethernet204 205,206,207,208 Ethernet26/5 26 100000 2 +Ethernet208 209,210,211,212 Ethernet27/1 27 100000 1 +Ethernet212 213,214,215,216 Ethernet27/5 27 100000 2 +Ethernet216 217,218,219,220 Ethernet28/1 28 100000 1 +Ethernet220 221,222,223,224 Ethernet28/5 28 100000 2 +Ethernet224 225,226,227,228 Ethernet29/1 29 100000 1 +Ethernet228 229,230,231,232 Ethernet29/5 29 100000 2 +Ethernet232 233,234,235,236 Ethernet30/1 30 100000 1 +Ethernet236 237,238,239,240 Ethernet30/5 30 100000 2 +Ethernet240 241,242,243,244 Ethernet31/1 31 100000 1 +Ethernet244 245,246,247,248 Ethernet31/5 31 100000 2 +Ethernet248 249,250,251,252 Ethernet32/1 32 100000 1 +Ethernet252 253,254,255,256 Ethernet32/5 32 100000 2 +Ethernet256 258 Ethernet33 33 10000 0 +Ethernet260 257 Ethernet34 34 10000 0 diff --git a/device/arista/x86_64-arista_7060px5_64s/Arista-7060PX5-64S/blackhawk.xml b/device/arista/x86_64-arista_7060px5_64s/Arista-7060PX5-64S/blackhawk.xml index b9fe12f1e47..ad54146441d 100644 --- a/device/arista/x86_64-arista_7060px5_64s/Arista-7060PX5-64S/blackhawk.xml +++ b/device/arista/x86_64-arista_7060px5_64s/Arista-7060PX5-64S/blackhawk.xml @@ -1,6 +1,6 @@ - CSDK-BH + blackhawk 0 retimer 1 diff --git a/device/arista/x86_64-arista_7060px5_64s/Arista-7060PX5-64S/gearbox_config.json b/device/arista/x86_64-arista_7060px5_64s/Arista-7060PX5-64S/gearbox_config.json index 853ad935e8c..dcd2c525217 100644 --- a/device/arista/x86_64-arista_7060px5_64s/Arista-7060PX5-64S/gearbox_config.json +++ b/device/arista/x86_64-arista_7060px5_64s/Arista-7060PX5-64S/gearbox_config.json @@ -5,7 +5,7 @@ "name": "phy1_1", "address": "1", "lib_name": "", - "firmware_path": "/usr/etc/credo/firmware/bh.lz4.fw.1.5.5.bin", + "firmware_path": "/usr/etc/credo/firmware/blackhawk", "config_file": "/usr/share/sonic/hwsku/phy1_config.json", "sai_init_config_file": "", "phy_access": "mdio", @@ -18,7 +18,7 @@ "name": "phy1_2", "address": "2", "lib_name": "", - "firmware_path": "/usr/etc/credo/firmware/bh.lz4.fw.1.5.5.bin", + "firmware_path": "/usr/etc/credo/firmware/blackhawk", "config_file": "/usr/share/sonic/hwsku/phy2_config.json", "sai_init_config_file": "", "phy_access": "mdio", @@ -31,7 +31,7 @@ "name": "phy2_1", "address": "3", "lib_name": "", - "firmware_path": "/usr/etc/credo/firmware/bh.lz4.fw.1.5.5.bin", + "firmware_path": "/usr/etc/credo/firmware/blackhawk", "config_file": "/usr/share/sonic/hwsku/phy3_config.json", "sai_init_config_file": "", "phy_access": "mdio", @@ -44,7 +44,7 @@ "name": "phy2_2", "address": "4", "lib_name": "", - "firmware_path": "/usr/etc/credo/firmware/bh.lz4.fw.1.5.5.bin", + "firmware_path": "/usr/etc/credo/firmware/blackhawk", "config_file": "/usr/share/sonic/hwsku/phy4_config.json", "sai_init_config_file": "", "phy_access": "mdio", @@ -57,7 +57,7 @@ "name": "phy3_1", "address": "5", "lib_name": "", - "firmware_path": "/usr/etc/credo/firmware/bh.lz4.fw.1.5.5.bin", + "firmware_path": "/usr/etc/credo/firmware/blackhawk", "config_file": "/usr/share/sonic/hwsku/phy5_config.json", "sai_init_config_file": "", "phy_access": "mdio", @@ -70,7 +70,7 @@ "name": "phy3_2", "address": "6", "lib_name": "", - "firmware_path": "/usr/etc/credo/firmware/bh.lz4.fw.1.5.5.bin", + "firmware_path": "/usr/etc/credo/firmware/blackhawk", "config_file": "/usr/share/sonic/hwsku/phy6_config.json", "sai_init_config_file": "", "phy_access": "mdio", @@ -83,7 +83,7 @@ "name": "phy4_1", "address": "7", "lib_name": "", - "firmware_path": "/usr/etc/credo/firmware/bh.lz4.fw.1.5.5.bin", + "firmware_path": "/usr/etc/credo/firmware/blackhawk", "config_file": "/usr/share/sonic/hwsku/phy7_config.json", "sai_init_config_file": "", "phy_access": "mdio", @@ -96,7 +96,7 @@ "name": "phy4_2", "address": "8", "lib_name": "", - "firmware_path": "/usr/etc/credo/firmware/bh.lz4.fw.1.5.5.bin", + "firmware_path": "/usr/etc/credo/firmware/blackhawk", "config_file": "/usr/share/sonic/hwsku/phy8_config.json", "sai_init_config_file": "", "phy_access": "mdio", diff --git a/device/arista/x86_64-arista_7060px5_64s/Arista-7060PX5-64S/psai.profile b/device/arista/x86_64-arista_7060px5_64s/Arista-7060PX5-64S/psai.profile index c4d6b362ecf..eb241e3d356 100644 --- a/device/arista/x86_64-arista_7060px5_64s/Arista-7060PX5-64S/psai.profile +++ b/device/arista/x86_64-arista_7060px5_64s/Arista-7060PX5-64S/psai.profile @@ -1 +1 @@ -SAI_KEY_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/blackhawk.xml +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/blackhawk.xml diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-FANOUT/th5-a7060x6-16pe-384c.config.bcm b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-FANOUT/th5-a7060x6-16pe-384c.config.bcm index f11c8c4d354..837a45eca58 100644 --- a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-FANOUT/th5-a7060x6-16pe-384c.config.bcm +++ b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-FANOUT/th5-a7060x6-16pe-384c.config.bcm @@ -25,6 +25,7 @@ bcm_device: 0: global: pktio_mode: 1 + sai_switch_pcie_hotswap_disable: 1 default_cpu_tx_queue: 7 vlan_flooding_l2mc_num_reserved: 0 ipv6_lpm_128b_enable: 1 diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-LAB/th5-a7060x6-16pe-384c.config.bcm b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-LAB/th5-a7060x6-16pe-384c.config.bcm index b846dd8ac28..9124e064892 100644 --- a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-LAB/th5-a7060x6-16pe-384c.config.bcm +++ b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2-LAB/th5-a7060x6-16pe-384c.config.bcm @@ -25,6 +25,7 @@ bcm_device: 0: global: pktio_mode: 1 + sai_switch_pcie_hotswap_disable: 1 default_cpu_tx_queue: 7 vlan_flooding_l2mc_num_reserved: 0 ipv6_lpm_128b_enable: 1 diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/th5-a7060x6-16pe-384c.config.bcm b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/th5-a7060x6-16pe-384c.config.bcm index bdd0e7704ba..f46fb2db594 100644 --- a/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/th5-a7060x6-16pe-384c.config.bcm +++ b/device/arista/x86_64-arista_7060x6_16pe_384c/Arista-7060X6-16PE-384C-O128S2/th5-a7060x6-16pe-384c.config.bcm @@ -25,6 +25,7 @@ bcm_device: 0: global: pktio_mode: 1 + sai_switch_pcie_hotswap_disable: 1 default_cpu_tx_queue: 7 vlan_flooding_l2mc_num_reserved: 0 ipv6_lpm_128b_enable: 1 diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/installer.conf b/device/arista/x86_64-arista_7060x6_16pe_384c/installer.conf new file mode 100644 index 00000000000..609eb2d05a2 --- /dev/null +++ b/device/arista/x86_64-arista_7060x6_16pe_384c/installer.conf @@ -0,0 +1,2 @@ +ARISTA_SID="Redstart*Moby" +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="modprobe.blacklist=snd_hda_intel,hdaudio,amd_sfh" diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c/sensors.conf b/device/arista/x86_64-arista_7060x6_16pe_384c/sensors.conf index 2c6337e2308..96aad20cdbd 100644 --- a/device/arista/x86_64-arista_7060x6_16pe_384c/sensors.conf +++ b/device/arista/x86_64-arista_7060x6_16pe_384c/sensors.conf @@ -1,14 +1,40 @@ +bus "i2c-16" "SCD 0000:03:00.0 SMBus master 1 bus 3" bus "i2c-19" "SCD 0000:06:00.0 SMBus master 0 bus 0" +bus "i2c-35" "SCD 0000:06:00.0 SMBus master 2 bus 4" +bus "i2c-37" "SCD 0000:05:00.0 SMBus master 0 bus 0" + +chip "k10temp-pci-00c3" + label temp1 "Cpu temp sensor" chip "max6581-i2c-19-4d" + label temp1 "Switch Card temp sensor" + label temp2 "TH5 PCB Left" + label temp3 "TH5 PCB Right" + label temp4 "Inlet Ambiant Air" ignore temp5 ignore temp6 + label temp7 "TH5 Diode 1" + label temp8 "TH5 Diode 2" chip "nvme-pci-0400" - # TODO: sensors complaining about tempX_min and tempX_max ignore temp2 ignore temp3 ignore temp4 ignore temp5 ignore temp6 ignore temp7 + +chip "pmbus-i2c-35-10" + label temp1 "Power supply 1 internal sensor" + ignore temp2 + +chip "pmbus-i2c-35-12" + label temp1 "Power supply 2 internal sensor" + ignore temp2 + +chip "tmp75-i2c-16-48" + label temp1 "Outlet" + +chip "tmp75-i2c-37-4a" + label temp1 "Port Card" + diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2-FANOUT/th5-a7060x6-16pe-384c.config.bcm b/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2-FANOUT/th5-a7060x6-16pe-384c.config.bcm index b72a072372a..a9cda08a850 100644 --- a/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2-FANOUT/th5-a7060x6-16pe-384c.config.bcm +++ b/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2-FANOUT/th5-a7060x6-16pe-384c.config.bcm @@ -23,6 +23,7 @@ bcm_device: 0: global: pktio_mode: 1 + sai_switch_pcie_hotswap_disable: 1 default_cpu_tx_queue: 7 vlan_flooding_l2mc_num_reserved: 0 ipv6_lpm_128b_enable: 1 diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2-LAB/th5-a7060x6-16pe-384c.config.bcm b/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2-LAB/th5-a7060x6-16pe-384c.config.bcm index 9d995c5a854..706201965ea 100644 --- a/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2-LAB/th5-a7060x6-16pe-384c.config.bcm +++ b/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2-LAB/th5-a7060x6-16pe-384c.config.bcm @@ -23,6 +23,7 @@ bcm_device: 0: global: pktio_mode: 1 + sai_switch_pcie_hotswap_disable: 1 default_cpu_tx_queue: 7 vlan_flooding_l2mc_num_reserved: 0 ipv6_lpm_128b_enable: 1 diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2/buffers_defaults_t0.j2 b/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2/buffers_defaults_t0.j2 index 95a3ca75b8c..08fbcd7d766 100644 --- a/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2/buffers_defaults_t0.j2 +++ b/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2/buffers_defaults_t0.j2 @@ -20,7 +20,7 @@ "ingress_lossy_profile": { "pool": "ingress_lossless_pool", "size": "0", - "static_th": "82682080" + "static_th": "82434938" }, "egress_lossy_profile": { "pool": "egress_lossless_pool", @@ -30,7 +30,7 @@ "egress_lossless_profile": { "pool": "egress_lossless_pool", "size": "0", - "static_th": "82682080" + "static_th": "82434938" } }, {%- endmacro %} diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2/buffers_defaults_t1.j2 b/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2/buffers_defaults_t1.j2 index 95a3ca75b8c..08fbcd7d766 100644 --- a/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2/buffers_defaults_t1.j2 +++ b/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2/buffers_defaults_t1.j2 @@ -20,7 +20,7 @@ "ingress_lossy_profile": { "pool": "ingress_lossless_pool", "size": "0", - "static_th": "82682080" + "static_th": "82434938" }, "egress_lossy_profile": { "pool": "egress_lossless_pool", @@ -30,7 +30,7 @@ "egress_lossless_profile": { "pool": "egress_lossless_pool", "size": "0", - "static_th": "82682080" + "static_th": "82434938" } }, {%- endmacro %} diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2/th5-a7060x6-16pe-384c.config.bcm b/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2/th5-a7060x6-16pe-384c.config.bcm index 9c93afc7e69..9eb04f3eef9 100644 --- a/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2/th5-a7060x6-16pe-384c.config.bcm +++ b/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S2/th5-a7060x6-16pe-384c.config.bcm @@ -23,6 +23,7 @@ bcm_device: 0: global: pktio_mode: 1 + sai_switch_pcie_hotswap_disable: 1 default_cpu_tx_queue: 7 vlan_flooding_l2mc_num_reserved: 0 ipv6_lpm_128b_enable: 1 diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S4/th5-a7060x6-16pe-384c.config.bcm b/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S4/th5-a7060x6-16pe-384c.config.bcm index 6038288e116..86b8d87a4db 100644 --- a/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S4/th5-a7060x6-16pe-384c.config.bcm +++ b/device/arista/x86_64-arista_7060x6_16pe_384c_b/Arista-7060X6-16PE-384C-B-O128S4/th5-a7060x6-16pe-384c.config.bcm @@ -23,6 +23,7 @@ bcm_device: 0: global: pktio_mode: 1 + sai_switch_pcie_hotswap_disable: 1 default_cpu_tx_queue: 7 vlan_flooding_l2mc_num_reserved: 0 ipv6_lpm_128b_enable: 1 diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c_b/platform.json b/device/arista/x86_64-arista_7060x6_16pe_384c_b/platform.json index d8eda80d7a2..70ba3ebdf17 100644 --- a/device/arista/x86_64-arista_7060x6_16pe_384c_b/platform.json +++ b/device/arista/x86_64-arista_7060x6_16pe_384c_b/platform.json @@ -1,4 +1,8 @@ { + "asic_sensors": { + "poll_interval": "10", + "poll_admin_status": "enable" + }, "chassis": { "name": "DCS-7060X6-16PE-384C", "components": [ diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c_b/sensors.conf b/device/arista/x86_64-arista_7060x6_16pe_384c_b/sensors.conf deleted file mode 100644 index 2c6337e2308..00000000000 --- a/device/arista/x86_64-arista_7060x6_16pe_384c_b/sensors.conf +++ /dev/null @@ -1,14 +0,0 @@ -bus "i2c-19" "SCD 0000:06:00.0 SMBus master 0 bus 0" - -chip "max6581-i2c-19-4d" - ignore temp5 - ignore temp6 - -chip "nvme-pci-0400" - # TODO: sensors complaining about tempX_min and tempX_max - ignore temp2 - ignore temp3 - ignore temp4 - ignore temp5 - ignore temp6 - ignore temp7 diff --git a/device/arista/x86_64-arista_7060x6_16pe_384c_b/sensors.conf b/device/arista/x86_64-arista_7060x6_16pe_384c_b/sensors.conf new file mode 120000 index 00000000000..322a1382b35 --- /dev/null +++ b/device/arista/x86_64-arista_7060x6_16pe_384c_b/sensors.conf @@ -0,0 +1 @@ +../x86_64-arista_7060x6_16pe_384c/sensors.conf \ No newline at end of file diff --git a/device/arista/x86_64-arista_7060x6_32pe/Arista-7060X6-32PE/th5-a7060x6-32pe.config.bcm b/device/arista/x86_64-arista_7060x6_32pe/Arista-7060X6-32PE/th5-a7060x6-32pe.config.bcm index 27a61e1d227..6b845782d4d 100644 --- a/device/arista/x86_64-arista_7060x6_32pe/Arista-7060X6-32PE/th5-a7060x6-32pe.config.bcm +++ b/device/arista/x86_64-arista_7060x6_32pe/Arista-7060X6-32PE/th5-a7060x6-32pe.config.bcm @@ -25,6 +25,7 @@ bcm_device: 0: global: pktio_mode: 1 + sai_switch_pcie_hotswap_disable: 1 default_cpu_tx_queue: 7 vlan_flooding_l2mc_num_reserved: 0 ipv6_lpm_128b_enable: 1 diff --git a/device/arista/x86_64-arista_7060x6_32pe/installer.conf b/device/arista/x86_64-arista_7060x6_32pe/installer.conf new file mode 100644 index 00000000000..0e8ad6c9afe --- /dev/null +++ b/device/arista/x86_64-arista_7060x6_32pe/installer.conf @@ -0,0 +1,2 @@ +ARISTA_SID="*MorandaP" +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="modprobe.blacklist=snd_hda_intel,hdaudio,amd_sfh" diff --git a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-256x200G/th5-a7060x6-64de.config.bcm b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-256x200G/th5-a7060x6-64de.config.bcm index 0e3eb3e1e1c..d51e491fcb9 100644 --- a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-256x200G/th5-a7060x6-64de.config.bcm +++ b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-256x200G/th5-a7060x6-64de.config.bcm @@ -25,6 +25,7 @@ bcm_device: 0: global: pktio_mode: 1 + sai_switch_pcie_hotswap_disable: 1 default_cpu_tx_queue: 7 vlan_flooding_l2mc_num_reserved: 0 ipv6_lpm_128b_enable: 1 diff --git a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-O128S2/th5-a7060x6-64de.config.bcm b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-O128S2/th5-a7060x6-64de.config.bcm index f734b2b2967..726e6612275 100644 --- a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-O128S2/th5-a7060x6-64de.config.bcm +++ b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE-O128S2/th5-a7060x6-64de.config.bcm @@ -25,6 +25,7 @@ bcm_device: 0: global: pktio_mode: 1 + sai_switch_pcie_hotswap_disable: 1 default_cpu_tx_queue: 7 vlan_flooding_l2mc_num_reserved: 0 ipv6_lpm_128b_enable: 1 diff --git a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE/th5-a7060x6-64de.config.bcm b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE/th5-a7060x6-64de.config.bcm index 6bb04e4c8c4..6877516421e 100644 --- a/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE/th5-a7060x6-64de.config.bcm +++ b/device/arista/x86_64-arista_7060x6_64de/Arista-7060X6-64DE/th5-a7060x6-64de.config.bcm @@ -25,6 +25,7 @@ bcm_device: 0: global: pktio_mode: 1 + sai_switch_pcie_hotswap_disable: 1 default_cpu_tx_queue: 7 vlan_flooding_l2mc_num_reserved: 0 ipv6_lpm_128b_enable: 1 diff --git a/device/arista/x86_64-arista_7060x6_64de/media_settings.json b/device/arista/x86_64-arista_7060x6_64de/media_settings.json new file mode 100644 index 00000000000..86f5ac53bfa --- /dev/null +++ b/device/arista/x86_64-arista_7060x6_64de/media_settings.json @@ -0,0 +1,20044 @@ +{ + "PORT_MEDIA_SETTINGS": { + "1": { + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": "0x6", + "lane5": "0x6", + "lane6": "0x6", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "OPTICAL50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "main": { + "lane0": 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+ }, + "pre1": { + "lane0": "0xfffffff7", + "lane1": "0xfffffff7", + "lane2": "0xfffffff7", + "lane3": "0xfffffff7", + "lane4": "0xfffffff7", + "lane5": "0xfffffff3", + "lane6": "0xfffffff7", + "lane7": "0xfffffff7" + }, + "main": { + "lane0": "0x9e", + "lane1": "0x9e", + "lane2": "0x9e", + "lane3": "0x9e", + "lane4": "0x9e", + "lane5": "0x98", + "lane6": "0x9e", + "lane7": "0x9e" + }, + "post1": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0x0", + "lane6": "0xffffffff", + "lane7": "0xffffffff" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0xfffffffe", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "OPTICAL25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffc", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "main": { + "lane0": "0x63", + "lane1": "0x63", + "lane2": "0x63", + "lane3": "0x63", + "lane4": "0x63", + "lane5": "0x67", + "lane6": "0x63", + "lane7": "0x63" + }, + "post1": { + "lane0": "0xffffffea", + "lane1": "0xffffffea", + "lane2": "0xffffffea", + "lane3": "0xffffffea", + "lane4": "0xffffffea", + "lane5": "0xffffffec", + "lane6": "0xffffffea", + "lane7": "0xffffffea" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "COPPER50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x4", + "lane1": "0x4", + "lane2": "0x4", + "lane3": "0x4", + "lane4": "0x4", + "lane5": "0x4", + "lane6": "0x4", + "lane7": "0x4" + }, + "pre1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "main": { + "lane0": "0x6b", + "lane1": "0x6b", + "lane2": "0x6b", + "lane3": "0x6b", + "lane4": "0x6b", + "lane5": "0x6b", + "lane6": "0x6b", + "lane7": "0x6b" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "65": { + "COPPER10": { + "pre1": { + "lane0": "0x2" + }, + "main": { + "lane0": "0x1f" + }, + "post1": { + "lane0": "0xc" + }, + "post2": { + "lane0": "0x0" + }, + "post3": { + "lane0": "0x0" + } + }, + "OPTICAL10": { + "pre1": { + "lane0": "0x0" + }, + "main": { + "lane0": "0x1f" + }, + "post1": { + "lane0": "0xb" + }, + "post2": { + "lane0": "0x0" + }, + "post3": { + "lane0": "0x0" + } + } + }, + "66": { + "COPPER10": { + "pre1": { + "lane0": "0x2" + }, + "main": { + "lane0": "0x1f" + }, + "post1": { + "lane0": "0xc" + }, + "post2": { + "lane0": "0x0" + }, + "post3": { + "lane0": "0x0" + } + }, + "OPTICAL10": { + "pre1": { + "lane0": "0x0" + }, + "main": { + "lane0": "0x1f" + }, + "post1": { + "lane0": "0xb" + }, + "post2": { + "lane0": "0x0" + }, + "post3": { + "lane0": "0x0" + } + } + } + } +} diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/th5-a7060x6-64pe.config.bcm b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/th5-a7060x6-64pe.config.bcm index 5926e8e5700..195d68e9c78 100644 --- a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/th5-a7060x6-64pe.config.bcm +++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/th5-a7060x6-64pe.config.bcm @@ -24,6 +24,7 @@ bcm_device: 0: global: pktio_mode: 1 + sai_switch_pcie_hotswap_disable: 1 default_cpu_tx_queue: 7 vlan_flooding_l2mc_num_reserved: 0 ipv6_lpm_128b_enable: 1 diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/th5-a7060x6-64pe.config.bcm b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/th5-a7060x6-64pe.config.bcm index 7988dc91185..2ab38ca0cf8 100644 --- a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/th5-a7060x6-64pe.config.bcm +++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-64x400G/th5-a7060x6-64pe.config.bcm @@ -25,6 +25,7 @@ bcm_device: 0: global: pktio_mode: 1 + sai_switch_pcie_hotswap_disable: 1 default_cpu_tx_queue: 7 vlan_flooding_l2mc_num_reserved: 0 ipv6_lpm_128b_enable: 1 diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C224O8/th5-a7060x6-64pe.config.bcm b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C224O8/th5-a7060x6-64pe.config.bcm index de8cc994a29..df28f1133dd 100644 --- a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C224O8/th5-a7060x6-64pe.config.bcm +++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C224O8/th5-a7060x6-64pe.config.bcm @@ -24,6 +24,7 @@ bcm_device: 0: global: pktio_mode: 1 + sai_switch_pcie_hotswap_disable: 1 default_cpu_tx_queue: 7 vlan_flooding_l2mc_num_reserved: 0 ipv6_lpm_128b_enable: 1 diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/th5-a7060x6-64pe.config.bcm b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/th5-a7060x6-64pe.config.bcm index b51dbdec15d..e8797d3ebed 100644 --- a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/th5-a7060x6-64pe.config.bcm +++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-C256S2/th5-a7060x6-64pe.config.bcm @@ -24,6 +24,7 @@ bcm_device: 0: global: pktio_mode: 1 + sai_switch_pcie_hotswap_disable: 1 default_cpu_tx_queue: 7 vlan_flooding_l2mc_num_reserved: 0 ipv6_lpm_128b_enable: 1 diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-O128S2/th5-a7060x6-64pe.config.bcm b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-O128S2/th5-a7060x6-64pe.config.bcm index d33dcdf6340..50e5265b54b 100644 --- a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-O128S2/th5-a7060x6-64pe.config.bcm +++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-O128S2/th5-a7060x6-64pe.config.bcm @@ -25,6 +25,7 @@ bcm_device: 0: global: pktio_mode: 1 + sai_switch_pcie_hotswap_disable: 1 default_cpu_tx_queue: 7 vlan_flooding_l2mc_num_reserved: 0 ipv6_lpm_128b_enable: 1 diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-P32O64/th5-a7060x6-64pe.config.bcm b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-P32O64/th5-a7060x6-64pe.config.bcm index 98f66d899ed..37d9bd1bee6 100644 --- a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-P32O64/th5-a7060x6-64pe.config.bcm +++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-P32O64/th5-a7060x6-64pe.config.bcm @@ -25,6 +25,7 @@ bcm_device: 0: global: pktio_mode: 1 + sai_switch_pcie_hotswap_disable: 1 default_cpu_tx_queue: 7 vlan_flooding_l2mc_num_reserved: 0 ipv6_lpm_128b_enable: 1 diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-P32V128/th5-a7060x6-64pe.config.bcm b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-P32V128/th5-a7060x6-64pe.config.bcm index a7c59047b2c..0c383ff550d 100644 --- a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-P32V128/th5-a7060x6-64pe.config.bcm +++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-P32V128/th5-a7060x6-64pe.config.bcm @@ -25,6 +25,7 @@ bcm_device: 0: global: pktio_mode: 1 + sai_switch_pcie_hotswap_disable: 1 default_cpu_tx_queue: 7 vlan_flooding_l2mc_num_reserved: 0 ipv6_lpm_128b_enable: 1 diff --git a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/th5-a7060x6-64pe.config.bcm b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/th5-a7060x6-64pe.config.bcm index b9bfe57cefd..b49972729a7 100644 --- a/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/th5-a7060x6-64pe.config.bcm +++ b/device/arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE/th5-a7060x6-64pe.config.bcm @@ -25,6 +25,7 @@ bcm_device: 0: global: pktio_mode: 1 + sai_switch_pcie_hotswap_disable: 1 default_cpu_tx_queue: 7 vlan_flooding_l2mc_num_reserved: 0 ipv6_lpm_128b_enable: 1 diff --git a/device/arista/x86_64-arista_7060x6_64pe/installer.conf b/device/arista/x86_64-arista_7060x6_64pe/installer.conf new file mode 100644 index 00000000000..693cca6c1e5 --- /dev/null +++ b/device/arista/x86_64-arista_7060x6_64pe/installer.conf @@ -0,0 +1,2 @@ +ARISTA_SID="Shearwater*QuicksilverP" +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="modprobe.blacklist=snd_hda_intel,hdaudio" diff --git a/device/arista/x86_64-arista_7060x6_64pe/media_settings.json b/device/arista/x86_64-arista_7060x6_64pe/media_settings.json index 5236e4450e4..6c7af79208e 100644 --- a/device/arista/x86_64-arista_7060x6_64pe/media_settings.json +++ b/device/arista/x86_64-arista_7060x6_64pe/media_settings.json @@ -1,8 +1,8 @@ { "PORT_MEDIA_SETTINGS": { "1": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EOLO138HG5HSDLC)": { - "speed:100GAUI-1-S|800G.*": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1|EOLO138HG5HSDLC)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { "pre3": { "lane0": "0xfffffffe", "lane1": "0xfffffffe", @@ -128,11 +128,321 @@ "lane7": "0x00000000" } } + }, + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": "0x6", + "lane5": "0x6", + "lane6": "0x6", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "OPTICAL50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "main": { + "lane0": "0x9f", + "lane1": "0x9f", + "lane2": "0x9f", + "lane3": "0x9f", + "lane4": "0x9f", + "lane5": "0x9f", + "lane6": "0x9f", + "lane7": "0x9f" + }, + "post1": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xffffffff" + }, + "post2": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + } + }, + "OPTICAL25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "main": { + "lane0": "0x66", + "lane1": "0x66", + "lane2": "0x66", + "lane3": "0x66", + "lane4": "0x66", + "lane5": "0x66", + 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"lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } } }, "6": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EOLO138HG5HSDLC)": { - "speed:100GAUI-1-S|800G.*": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1|EOLO138HG5HSDLC)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { "pre3": { "lane0": "0xfffffffe", "lane1": "0xfffffffe", @@ -778,11 +2328,321 @@ "lane7": "0x00000000" } } + }, + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": "0x6", + "lane5": "0x6", + "lane6": "0x6", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe4", + "lane3": "0xffffffe8", + "lane4": "0xffffffe4", + "lane5": "0xffffffe8", + "lane6": "0xffffffe4", + "lane7": "0xffffffe8" + }, + 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"lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "main": { + "lane0": "0x6b", + "lane1": "0x6b", + "lane2": "0x6b", + "lane3": "0x6b", + "lane4": "0x6b", + "lane5": "0x6b", + "lane6": "0x6b", + "lane7": "0x6b" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } } }, "9": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EOLO138HG5HSDLC)": { - "speed:100GAUI-1-S|800G.*": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1|EOLO138HG5HSDLC)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { "pre3": { "lane0": "0xffffffff", "lane1": "0xffffffff", @@ -1168,11 +3648,321 @@ "lane7": "0x00000000" } } + }, + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": "0x6", + "lane5": "0x6", + "lane6": "0x6", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x80", + "lane1": "0x80", + "lane2": "0x80", + "lane3": "0x80", + "lane4": "0x80", + "lane5": "0x80", + "lane6": "0x80", + "lane7": "0x80" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "OPTICAL50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffb", + "lane1": "0xfffffffb", + "lane2": "0xfffffffb", + "lane3": "0xfffffffb", + "lane4": "0xfffffffb", + "lane5": "0xfffffffb", + "lane6": "0xfffffffb", + "lane7": "0xfffffffb" + }, + "main": { + "lane0": "0xa2", + "lane1": "0xa2", + "lane2": "0xa2", + "lane3": "0xa2", + "lane4": "0xa2", + "lane5": "0xa2", + "lane6": "0xa2", + "lane7": "0xa2" + }, + "post1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post2": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xffffffff" + } + }, + "OPTICAL25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "main": { + "lane0": "0x66", + "lane1": "0x66", + "lane2": "0x66", + "lane3": "0x66", + "lane4": "0x66", + "lane5": "0x66", + "lane6": "0x66", + "lane7": "0x66" + }, + "post1": { + "lane0": "0xffffffed", + "lane1": "0xffffffed", + "lane2": "0xffffffed", + "lane3": "0xffffffed", + "lane4": "0xffffffed", + "lane5": "0xffffffed", + "lane6": "0xffffffed", + "lane7": "0xffffffed" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "COPPER50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x4", + "lane1": "0x4", + "lane2": "0x4", + "lane3": "0x4", + "lane4": "0x4", + "lane5": "0x4", + "lane6": "0x4", + "lane7": "0x4" + }, + "pre1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "main": { + "lane0": "0x6b", + "lane1": "0x6b", + "lane2": "0x6b", + "lane3": "0x6b", + "lane4": "0x6b", + "lane5": "0x6b", + "lane6": "0x6b", + "lane7": "0x6b" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } } }, "10": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EOLO138HG5HSDLC)": { - "speed:100GAUI-1-S|800G.*": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1|EOLO138HG5HSDLC)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { "pre3": { "lane0": "0xffffffff", "lane1": "0xffffffff", @@ -1298,11 +4088,321 @@ "lane7": "0x00000000" } } + }, + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": "0x6", + "lane5": "0x6", + "lane6": "0x6", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xfffffff0", + "lane1": "0xfffffff0", + "lane2": "0xfffffff0", + "lane3": "0xfffffff0", + "lane4": "0xfffffff0", + "lane5": "0xfffffff0", + "lane6": "0xfffffff0", + "lane7": "0xfffffff0" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "OPTICAL50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffb", + "lane1": "0xfffffffb", + "lane2": "0xfffffffb", + "lane3": "0xfffffffb", + "lane4": "0xfffffffb", + "lane5": "0xfffffffb", + "lane6": "0xfffffffb", + "lane7": "0xfffffffb" + }, + "main": { + "lane0": "0xa2", + "lane1": "0xa2", + "lane2": "0xa2", + "lane3": "0xa2", + "lane4": "0xa2", + "lane5": "0xa2", + "lane6": "0xa2", + "lane7": "0xa2" + }, + "post1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post2": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xffffffff" + } + }, + "OPTICAL25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "main": { + "lane0": "0x66", + "lane1": "0x66", + "lane2": "0x66", + "lane3": "0x66", + "lane4": "0x66", + "lane5": "0x66", + "lane6": "0x66", + "lane7": "0x66" + }, + "post1": { + "lane0": "0xffffffed", + "lane1": "0xffffffed", + "lane2": "0xffffffed", + "lane3": "0xffffffed", + "lane4": "0xffffffed", + "lane5": "0xffffffed", + "lane6": "0xffffffed", + "lane7": "0xffffffed" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "COPPER50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x4", + "lane1": "0x4", + "lane2": "0x4", + "lane3": "0x4", + "lane4": "0x4", + "lane5": "0x4", + "lane6": "0x4", + "lane7": "0x4" + }, + "pre1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "main": { + "lane0": "0x6b", + "lane1": "0x6b", + "lane2": "0x6b", + "lane3": "0x6b", + "lane4": "0x6b", + "lane5": "0x6b", + "lane6": "0x6b", + "lane7": "0x6b" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } } }, "11": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EOLO138HG5HSDLC)": { - "speed:100GAUI-1-S|800G.*": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1|EOLO138HG5HSDLC)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { "pre3": { "lane0": "0xfffffffe", "lane1": "0xfffffffe", @@ -1428,11 +4528,321 @@ "lane7": "0x00000000" } } + }, + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": 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+ "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } } }, "12": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EOLO138HG5HSDLC)": { - "speed:100GAUI-1-S|800G.*": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1|EOLO138HG5HSDLC)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { "pre3": { "lane0": "0xfffffffe", "lane1": "0xfffffffe", @@ -1558,11 +4968,321 @@ "lane7": "0x00000000" } } + }, + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": "0x6", + "lane5": "0x6", + "lane6": "0x6", + "lane7": "0x6" + }, + "pre1": { + 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"lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } } }, "14": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EOLO138HG5HSDLC)": { - "speed:100GAUI-1-S|800G.*": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1|EOLO138HG5HSDLC)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { "pre3": { "lane0": "0xfffffffe", "lane1": "0xfffffffe", @@ -1818,11 +5848,321 @@ "lane7": "0x00000000" } } + }, + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": "0x6", + "lane5": "0x6", + "lane6": "0x6", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x80", + "lane1": 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"speed:100GAUI-1-S|400GAUI-4-S|800G.*": { "pre3": { "lane0": "0xfffffffe", "lane1": "0xfffffffe", @@ -2078,11 +6728,321 @@ "lane7": "0x00000000" } } + }, + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": "0x6", + "lane5": "0x6", + "lane6": "0x6", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0", + "lane4": "0xffffffe0", + "lane5": "0xffffffe0", + "lane6": "0xffffffe0", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x80", + "lane1": "0x80", + "lane2": "0x80", + "lane3": "0x80", + "lane4": "0x80", + "lane5": "0x80", + "lane6": "0x80", + "lane7": "0x80" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": 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+ "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "main": { + "lane0": "0x6b", + "lane1": "0x6b", + "lane2": "0x6b", + "lane3": "0x6b", + "lane4": "0x6b", + "lane5": "0x6b", + "lane6": "0x6b", + "lane7": "0x6b" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } } }, "17": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EOLO138HG5HSDLC)": { - "speed:100GAUI-1-S|800G.*": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1|EOLO138HG5HSDLC)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { "pre3": { "lane0": "0xffffffff", "lane1": "0xffffffff", @@ -2208,11 +7168,321 @@ "lane7": "0x00000000" } } + }, + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": "0x6", + "lane5": "0x6", + "lane6": "0x6", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0", + "lane4": "0xffffffe0", + "lane5": "0xffffffe0", + "lane6": "0xffffffe0", + "lane7": "0xffffffe0" + }, + "main": { + "lane0": "0x80", + "lane1": "0x80", + "lane2": "0x80", + "lane3": "0x80", + "lane4": "0x80", + "lane5": "0x80", + "lane6": "0x80", + "lane7": "0x80" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "OPTICAL50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffb", + "lane1": "0xfffffffb", + "lane2": "0xfffffffb", + "lane3": "0xfffffffb", + "lane4": "0xfffffffb", + "lane5": "0xfffffffb", + "lane6": "0xfffffffb", + "lane7": "0xfffffffb" + }, + "main": { + "lane0": "0xa2", + "lane1": "0xa2", + "lane2": "0xa2", + "lane3": "0xa2", + "lane4": "0xa2", + "lane5": "0xa2", + "lane6": "0xa2", + "lane7": "0xa2" + }, + "post1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post2": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xffffffff" + } + }, + "OPTICAL25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "main": { + "lane0": "0x66", + "lane1": "0x66", + "lane2": "0x66", + "lane3": "0x66", + "lane4": "0x66", + "lane5": "0x66", + "lane6": "0x66", + "lane7": "0x66" + }, + "post1": { + "lane0": "0xffffffed", + "lane1": "0xffffffed", + "lane2": "0xffffffed", + "lane3": "0xffffffed", + "lane4": "0xffffffed", + "lane5": "0xffffffed", + "lane6": "0xffffffed", + "lane7": "0xffffffed" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "COPPER50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x4", + "lane1": "0x4", + "lane2": "0x4", + "lane3": "0x4", + "lane4": "0x4", + "lane5": "0x4", + "lane6": "0x4", + "lane7": "0x4" + }, + "pre1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "main": { + "lane0": "0x6b", + "lane1": "0x6b", + "lane2": "0x6b", + "lane3": "0x6b", + "lane4": "0x6b", + "lane5": "0x6b", + "lane6": "0x6b", + "lane7": "0x6b" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } } }, "18": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EOLO138HG5HSDLC)": { - "speed:100GAUI-1-S|800G.*": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1|EOLO138HG5HSDLC)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { "pre3": { "lane0": "0xffffffff", "lane1": "0xffffffff", @@ -2338,11 +7608,321 @@ "lane7": "0x00000000" } } + }, + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": "0x6", + "lane5": "0x6", + "lane6": "0x6", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe0", + "lane3": "0xffffffe4", + "lane4": "0xffffffe0", + "lane5": "0xffffffe4", + "lane6": "0xffffffe0", + "lane7": "0xffffffe0" + }, + "main": { + "lane0": "0x80", + "lane1": "0x80", + "lane2": "0x80", + "lane3": "0x80", + "lane4": "0x80", + "lane5": "0x80", + "lane6": "0x80", + "lane7": "0x80" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffffc", + "lane3": "0xfffffff8", + "lane4": "0xfffffffc", + "lane5": "0xfffffff8", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "OPTICAL50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffb", + "lane2": "0xfffffffd", + "lane3": "0xfffffffb", + "lane4": "0xfffffffd", + "lane5": "0xfffffffb", + "lane6": "0xfffffffd", + "lane7": "0xfffffffb" + }, + "main": { + "lane0": "0xa3", + "lane1": "0xa2", + "lane2": "0xa3", + "lane3": "0xa2", + "lane4": "0xa3", + "lane5": "0xa2", + "lane6": "0xa3", + "lane7": "0xa2" + }, + "post1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post2": { + "lane0": "0xfffffffe", + "lane1": "0xffffffff", + "lane2": "0xfffffffe", + "lane3": "0xffffffff", + "lane4": "0xfffffffe", + "lane5": "0xffffffff", + "lane6": "0xfffffffe", + "lane7": "0xffffffff" + } + }, + "OPTICAL25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "main": { + "lane0": "0x66", + "lane1": "0x66", + "lane2": "0x66", + "lane3": "0x66", + "lane4": "0x66", + "lane5": "0x66", + "lane6": "0x66", + "lane7": "0x66" + }, + "post1": { + "lane0": "0xffffffed", + "lane1": "0xffffffed", + "lane2": "0xffffffed", + "lane3": "0xffffffed", + "lane4": "0xffffffed", + "lane5": "0xffffffed", + "lane6": "0xffffffed", + "lane7": "0xffffffed" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "COPPER50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x4", + "lane1": "0x4", + "lane2": "0x4", + "lane3": "0x4", + "lane4": "0x4", + "lane5": "0x4", + "lane6": "0x4", + "lane7": "0x4" + }, + "pre1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "main": { + "lane0": "0x6b", + "lane1": "0x6b", + "lane2": "0x6b", + "lane3": "0x6b", + "lane4": "0x6b", + "lane5": "0x6b", + "lane6": "0x6b", + "lane7": "0x6b" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } } }, "19": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EOLO138HG5HSDLC)": { - "speed:100GAUI-1-S|800G.*": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1|EOLO138HG5HSDLC)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { "pre3": { "lane0": "0xfffffffe", "lane1": "0xfffffffe", @@ -2468,11 +8048,321 @@ "lane7": "0x00000000" } } + }, + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": "0x6", + "lane5": "0x6", + "lane6": "0x6", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe4", + "lane4": "0xffffffe0", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x80", + "lane1": "0x80", + "lane2": "0x80", + "lane3": "0x80", + "lane4": "0x80", + "lane5": "0x80", + "lane6": "0x80", + "lane7": "0x80" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffff8", + "lane4": "0xfffffffc", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "OPTICAL50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x1", + "lane2": "0x0", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x0", + "lane7": "0x1" + }, + "pre1": { + "lane0": "0xfffffffb", + "lane1": "0xfffffff3", + "lane2": "0xfffffffb", + "lane3": "0xfffffff3", + "lane4": "0xfffffffb", + "lane5": "0xfffffff3", + "lane6": "0xfffffffb", + "lane7": "0xfffffff3" + }, + "main": { + "lane0": "0x9d", + "lane1": "0x98", + "lane2": "0x9d", + "lane3": "0x98", + "lane4": "0x9d", + "lane5": "0x98", + "lane6": "0x9d", + "lane7": "0x98" + }, + "post1": { + "lane0": "0xfffffffd", + "lane1": "0x0", + "lane2": "0xfffffffd", + "lane3": "0x0", + "lane4": "0xfffffffd", + "lane5": "0x0", + "lane6": "0xfffffffd", + "lane7": "0x0" + }, + "post2": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffe", + "lane2": "0xfffffffd", + "lane3": "0xfffffffe", + "lane4": "0xfffffffd", + "lane5": "0xfffffffe", + "lane6": "0xfffffffd", + "lane7": "0xfffffffe" + } + }, + "OPTICAL25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff9", + "lane1": "0xfffffffc", + "lane2": "0xfffffff9", + "lane3": "0xfffffffc", + "lane4": "0xfffffff9", + "lane5": "0xfffffffc", + "lane6": "0xfffffff9", + "lane7": "0xfffffffc" + }, + "main": { + "lane0": "0x52", + "lane1": "0x67", + "lane2": "0x52", + "lane3": "0x67", + "lane4": "0x52", + "lane5": "0x67", + "lane6": "0x52", + "lane7": "0x67" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xffffffec", + "lane2": "0xfffffff8", + "lane3": "0xffffffec", + "lane4": "0xfffffff8", + "lane5": "0xffffffec", + "lane6": "0xfffffff8", + "lane7": "0xffffffec" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "COPPER50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x4", + "lane1": "0x4", + "lane2": "0x4", + "lane3": "0x4", + "lane4": "0x4", + "lane5": "0x4", + "lane6": "0x4", + "lane7": "0x4" + }, + "pre1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "main": { + "lane0": "0x6b", + "lane1": "0x6b", + "lane2": "0x6b", + "lane3": "0x6b", + "lane4": "0x6b", + "lane5": "0x6b", + "lane6": "0x6b", + "lane7": "0x6b" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } } }, "20": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EOLO138HG5HSDLC)": { - "speed:100GAUI-1-S|800G.*": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1|EOLO138HG5HSDLC)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { "pre3": { "lane0": "0xfffffffe", "lane1": "0xfffffffe", @@ -2598,11 +8488,321 @@ "lane7": "0x00000000" } } + }, + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": "0x6", + "lane5": "0x6", + "lane6": "0x6", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0", + "lane4": "0xffffffe0", + "lane5": "0xffffffe0", + "lane6": "0xffffffe0", + "lane7": "0xffffffe0" + }, + "main": { + "lane0": "0x80", + "lane1": "0x80", + "lane2": "0x80", + "lane3": "0x80", + "lane4": "0x80", + "lane5": "0x80", + "lane6": "0x80", + "lane7": "0x80" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "OPTICAL50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + 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"lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "COPPER50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x4", + "lane1": "0x4", + "lane2": "0x4", + "lane3": "0x4", + "lane4": "0x4", + "lane5": "0x4", + "lane6": "0x4", + "lane7": "0x4" + }, + "pre1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": 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"lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } } }, "21": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EOLO138HG5HSDLC)": { - "speed:100GAUI-1-S|800G.*": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1|EOLO138HG5HSDLC)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { "pre3": { "lane0": "0xffffffff", "lane1": "0xffffffff", @@ -2728,11 +8928,321 @@ "lane7": "0x00000000" } } + }, + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": "0x6", + "lane5": "0x6", + "lane6": "0x6", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe0", + 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"lane1": "0x80", + "lane2": "0x80", + "lane3": "0x80", + "lane4": "0x80", + "lane5": "0x80", + "lane6": "0x80", + "lane7": "0x80" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "OPTICAL50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffb", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "main": { + "lane0": "0xa3", + "lane1": "0xa2", + "lane2": "0xa3", + "lane3": "0xa3", + "lane4": "0xa3", + "lane5": "0xa3", + "lane6": "0xa3", + "lane7": "0xa3" + }, + "post1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post2": { + "lane0": "0xfffffffe", + "lane1": "0xffffffff", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + } + }, + "OPTICAL25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0x0", + 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"EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1|EOLO138HG5HSDLC)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { "pre3": { "lane0": "0xfffffffe", "lane1": "0xfffffffe", @@ -2988,11 +9808,321 @@ "lane7": "0x00000000" } } + }, + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": "0x6", + "lane5": "0x6", + "lane6": "0x6", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0", + "lane4": "0xffffffe0", + "lane5": "0xffffffe0", + "lane6": "0xffffffe0", + "lane7": "0xffffffe0" + }, + "main": { + "lane0": "0x80", + "lane1": "0x80", + "lane2": "0x80", + "lane3": "0x80", + "lane4": "0x80", + "lane5": "0x80", + "lane6": "0x80", + "lane7": "0x80" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": 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"lane5": "0x9d", + "lane6": "0x9d", + "lane7": "0x9d" + }, + "post1": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "post2": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + } + }, + "OPTICAL25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff9", + "lane1": "0xfffffff9", + "lane2": "0xfffffff9", + "lane3": "0xfffffff9", + "lane4": "0xfffffff9", + "lane5": "0xfffffff9", + "lane6": "0xfffffff9", + "lane7": "0xfffffff9" + }, + "main": { + "lane0": "0x52", + "lane1": "0x52", + "lane2": "0x52", + "lane3": "0x52", + "lane4": "0x52", + "lane5": "0x52", + "lane6": "0x52", + "lane7": "0x52" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "COPPER50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x4", + "lane1": "0x4", + "lane2": "0x4", + "lane3": "0x4", + "lane4": "0x4", + "lane5": "0x4", + "lane6": "0x4", + "lane7": "0x4" + }, + "pre1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "main": { + "lane0": "0x6b", + "lane1": "0x6b", + "lane2": "0x6b", + "lane3": "0x6b", + "lane4": "0x6b", + "lane5": "0x6b", + "lane6": "0x6b", + "lane7": "0x6b" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } } }, "24": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EOLO138HG5HSDLC)": { - "speed:100GAUI-1-S|800G.*": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1|EOLO138HG5HSDLC)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { "pre3": { "lane0": "0xfffffffe", "lane1": "0xfffffffe", @@ -3118,11 +10248,321 @@ "lane7": "0x00000000" } } + }, + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": "0x6", + "lane5": "0x6", + "lane6": "0x6", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0", + "lane4": "0xffffffe0", + "lane5": "0xffffffe0", + "lane6": "0xffffffe0", + "lane7": "0xffffffe0" + }, + "main": { + "lane0": "0x80", + "lane1": "0x80", + "lane2": "0x80", + "lane3": "0x80", + "lane4": "0x80", + "lane5": "0x80", + "lane6": "0x80", + "lane7": "0x80" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": 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"lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "post2": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + } + }, + "OPTICAL25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff9", + "lane1": "0xfffffff9", + "lane2": "0xfffffff9", + "lane3": "0xfffffff9", + "lane4": "0xfffffff9", + "lane5": "0xfffffff9", + "lane6": "0xfffffff9", + "lane7": "0xfffffff9" + }, + "main": { + "lane0": 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+ "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "main": { + "lane0": "0x6b", + "lane1": "0x6b", + "lane2": "0x6b", + "lane3": "0x6b", + "lane4": "0x6b", + "lane5": "0x6b", + "lane6": "0x6b", + "lane7": "0x6b" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } } }, "25": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EOLO138HG5HSDLC)": { - "speed:100GAUI-1-S|800G.*": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1|EOLO138HG5HSDLC)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { "pre3": { "lane0": "0xffffffff", "lane1": "0xffffffff", @@ -3248,11 +10688,321 @@ "lane7": "0x00000000" } } + }, + "OPTICAL100": { + "pre3": { + "lane0": "0xfffffffc", + "lane1": "0x0", + "lane2": "0xfffffffc", + "lane3": "0x0", + "lane4": "0xfffffffc", + "lane5": "0x0", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "pre2": { + "lane0": "0xa", + "lane1": "0x6", + "lane2": "0xa", + "lane3": "0x6", + "lane4": "0xa", + "lane5": "0x6", + "lane6": "0xa", + "lane7": "0xa" + }, + "pre1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe0", + "lane2": "0xffffffe8", + "lane3": "0xffffffe0", + "lane4": "0xffffffe8", + "lane5": "0xffffffe0", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "main": { + "lane0": "0x80", + "lane1": "0x80", + "lane2": "0x80", + "lane3": "0x80", + "lane4": "0x80", + "lane5": "0x80", + "lane6": "0x80", + "lane7": "0x80" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "OPTICAL50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "main": { + "lane0": "0xa3", + "lane1": "0xa3", + "lane2": "0xa3", + "lane3": "0xa3", + "lane4": "0xa3", + "lane5": "0xa3", + "lane6": "0xa3", + "lane7": "0xa3" + }, + "post1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post2": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + } + }, + "OPTICAL25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "main": { + "lane0": "0x47", + "lane1": "0x47", + "lane2": "0x47", + "lane3": "0x47", + "lane4": "0x47", + "lane5": "0x47", + "lane6": "0x47", + "lane7": "0x47" + }, + "post1": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "COPPER50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x4", + "lane1": "0x4", + "lane2": "0x4", + "lane3": "0x4", + "lane4": "0x4", + "lane5": "0x4", + "lane6": "0x4", + "lane7": "0x4" + }, + "pre1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "main": { + "lane0": "0x6b", + "lane1": "0x6b", + "lane2": "0x6b", + "lane3": "0x6b", + "lane4": "0x6b", + "lane5": "0x6b", + "lane6": "0x6b", + "lane7": "0x6b" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } } }, "26": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EOLO138HG5HSDLC)": { - "speed:100GAUI-1-S|800G.*": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1|EOLO138HG5HSDLC)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { "pre3": { "lane0": "0xffffffff", "lane1": "0xffffffff", @@ -3378,14 +11128,324 @@ "lane7": "0x00000000" } } - } - }, - "27": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EOLO138HG5HSDLC)": { - "speed:100GAUI-1-S|800G.*": { - "pre3": { - "lane0": "0xfffffffe", - "lane1": "0xfffffffe", + }, + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": "0x6", + "lane5": "0x6", + "lane6": "0x6", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0", + "lane4": "0xffffffe0", + "lane5": "0xffffffe0", + "lane6": "0xffffffe0", + "lane7": "0xffffffe0" + }, + "main": { + "lane0": "0x80", + "lane1": "0x80", + "lane2": "0x80", + "lane3": "0x80", + "lane4": "0x80", + "lane5": "0x80", + "lane6": "0x80", + "lane7": "0x80" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "OPTICAL50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "main": { + "lane0": "0xa3", + "lane1": "0xa3", + "lane2": "0xa3", + "lane3": "0xa3", + "lane4": "0xa3", + "lane5": "0xa3", + "lane6": "0xa3", + "lane7": "0xa3" + }, + "post1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post2": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + } + }, + "OPTICAL25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "main": { + "lane0": "0x47", + "lane1": "0x47", + "lane2": "0x47", + "lane3": "0x47", + "lane4": "0x47", + "lane5": "0x47", + "lane6": "0x47", + "lane7": "0x47" + }, + "post1": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "COPPER50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x4", + "lane1": "0x4", + "lane2": "0x4", + "lane3": "0x4", + "lane4": "0x4", + "lane5": "0x4", + "lane6": "0x4", + "lane7": "0x4" + }, + "pre1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "main": { + "lane0": "0x6b", + "lane1": "0x6b", + "lane2": "0x6b", + "lane3": "0x6b", + "lane4": "0x6b", + "lane5": "0x6b", + "lane6": "0x6b", + "lane7": "0x6b" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "27": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1|EOLO138HG5HSDLC)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { + "pre3": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", "lane2": "0xfffffffe", "lane3": "0xfffffffe", "lane4": "0xfffffffe", @@ -3508,11 +11568,321 @@ "lane7": "0x00000000" } } + }, + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": "0x6", + "lane5": "0x6", + "lane6": "0x6", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0", + "lane4": "0xffffffe0", + "lane5": "0xffffffe0", + "lane6": "0xffffffe0", + "lane7": "0xffffffe0" + }, + "main": { + "lane0": "0x80", + "lane1": "0x80", + "lane2": "0x80", + "lane3": "0x80", + "lane4": "0x80", + "lane5": "0x80", + "lane6": "0x80", + "lane7": "0x80" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "OPTICAL50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffb", + "lane1": "0xfffffffb", + "lane2": "0xfffffffb", + "lane3": "0xfffffffb", + "lane4": "0xfffffffb", + "lane5": "0xfffffffb", + "lane6": "0xfffffffb", + "lane7": "0xfffffffb" + }, + "main": { + "lane0": "0x9d", + "lane1": "0x9d", + "lane2": "0x9d", + "lane3": "0x9d", + "lane4": "0x9d", + "lane5": "0x9d", + "lane6": "0x9d", + "lane7": "0x9d" + }, + "post1": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "post2": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + } + }, + "OPTICAL25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff9", + "lane1": "0xfffffff9", + "lane2": "0xfffffff9", + "lane3": "0xfffffff9", + "lane4": "0xfffffff9", + "lane5": "0xfffffff9", + "lane6": "0xfffffff9", + "lane7": "0xfffffff9" + }, + "main": { + "lane0": "0x52", + "lane1": "0x52", + "lane2": "0x52", + "lane3": "0x52", + "lane4": "0x52", + "lane5": "0x52", + "lane6": "0x52", + "lane7": "0x52" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "COPPER50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x4", + "lane1": "0x4", + "lane2": "0x4", + "lane3": "0x4", + "lane4": "0x4", + "lane5": "0x4", + "lane6": "0x4", + "lane7": "0x4" + }, + "pre1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "main": { + "lane0": "0x6b", + "lane1": "0x6b", + "lane2": "0x6b", + "lane3": "0x6b", + "lane4": "0x6b", + "lane5": "0x6b", + "lane6": "0x6b", + "lane7": "0x6b" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } } }, "28": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EOLO138HG5HSDLC)": { - "speed:100GAUI-1-S|800G.*": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1|EOLO138HG5HSDLC)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { "pre3": { "lane0": "0xfffffffe", "lane1": "0xfffffffe", @@ -3638,11 +12008,321 @@ "lane7": "0x00000000" } } + }, + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + 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"0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffb", + "lane1": "0xfffffffb", + "lane2": "0xfffffffb", + "lane3": "0xfffffffb", + "lane4": "0xfffffffb", + "lane5": "0xfffffffb", + "lane6": "0xfffffffb", + "lane7": "0xfffffffb" + }, + "main": { + "lane0": "0x9d", + "lane1": "0x9d", + "lane2": "0x9d", + "lane3": "0x9d", + "lane4": "0x9d", + "lane5": "0x9d", + "lane6": "0x9d", + "lane7": "0x9d" + }, + "post1": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "post2": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + } + }, + "OPTICAL25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff9", + "lane1": "0xfffffff9", + "lane2": "0xfffffff9", + "lane3": "0xfffffff9", + "lane4": "0xfffffff9", + "lane5": "0xfffffff9", + "lane6": "0xfffffff9", + "lane7": "0xfffffff9" + }, + "main": { + "lane0": "0x52", + "lane1": "0x52", + "lane2": "0x52", + "lane3": "0x52", + "lane4": "0x52", + "lane5": "0x52", + "lane6": "0x52", + "lane7": "0x52" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "COPPER50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x4", + "lane1": "0x4", + "lane2": "0x4", + "lane3": "0x4", + "lane4": "0x4", + "lane5": "0x4", + "lane6": "0x4", + "lane7": "0x4" + }, + "pre1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "main": { + "lane0": "0x6b", + "lane1": "0x6b", + "lane2": "0x6b", + "lane3": "0x6b", + "lane4": "0x6b", + "lane5": "0x6b", + "lane6": "0x6b", + "lane7": "0x6b" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } } }, "29": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EOLO138HG5HSDLC)": { - "speed:100GAUI-1-S|800G.*": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1|EOLO138HG5HSDLC)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { "pre3": { "lane0": "0xffffffff", "lane1": "0xffffffff", @@ -3768,11 +12448,321 @@ "lane7": "0x00000000" } } + }, + "OPTICAL100": { + "pre3": { + "lane0": "0xfffffffc", + "lane1": "0x0", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "pre2": { + "lane0": "0xa", + "lane1": "0x6", + "lane2": "0xa", + "lane3": "0xa", + "lane4": "0xa", + "lane5": "0xa", + "lane6": "0xa", + "lane7": "0xa" + }, + "pre1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe0", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "main": { + "lane0": "0x80", + "lane1": "0x80", + "lane2": "0x80", + "lane3": "0x80", + "lane4": "0x80", + "lane5": "0x80", + "lane6": "0x80", + "lane7": "0x80" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "OPTICAL50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "main": { + "lane0": "0xa3", + "lane1": "0xa3", + "lane2": "0xa3", + "lane3": "0xa3", + "lane4": "0xa3", + "lane5": "0xa3", + "lane6": "0xa3", + "lane7": "0xa3" + }, + "post1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post2": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + } + }, + "OPTICAL25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "main": { + "lane0": "0x47", + "lane1": "0x47", + "lane2": "0x47", + "lane3": "0x47", + "lane4": "0x47", + "lane5": "0x47", + "lane6": "0x47", + "lane7": "0x47" + }, + "post1": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "COPPER50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x4", + "lane1": "0x4", + "lane2": "0x4", + "lane3": "0x4", + "lane4": "0x4", + "lane5": "0x4", + "lane6": "0x4", + "lane7": "0x4" + }, + "pre1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "main": { + "lane0": "0x6b", + "lane1": "0x6b", + "lane2": "0x6b", + "lane3": "0x6b", + "lane4": "0x6b", + "lane5": "0x6b", + "lane6": "0x6b", + "lane7": "0x6b" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } } }, "30": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EOLO138HG5HSDLC)": { - "speed:100GAUI-1-S|800G.*": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1|EOLO138HG5HSDLC)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { "pre3": { "lane0": "0xffffffff", "lane1": "0xffffffff", @@ -3898,12 +12888,322 @@ "lane7": "0x00000000" } } + }, + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": "0x6", + "lane5": "0x6", + "lane6": "0x6", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0", + "lane4": "0xffffffe0", + "lane5": "0xffffffe0", + "lane6": "0xffffffe0", + "lane7": "0xffffffe0" + }, + "main": { + "lane0": "0x80", + "lane1": "0x80", + "lane2": "0x80", + "lane3": "0x80", + "lane4": "0x80", + "lane5": "0x80", + "lane6": "0x80", + "lane7": "0x80" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "OPTICAL50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "main": { + "lane0": "0xa3", + "lane1": "0xa3", + "lane2": "0xa3", + "lane3": "0xa3", + "lane4": "0xa3", + "lane5": "0xa3", + "lane6": "0xa3", + "lane7": "0xa3" + }, + "post1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post2": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + } + }, + "OPTICAL25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": 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+ "lane7": "0x0" + }, + "pre2": { + "lane0": "0x4", + "lane1": "0x4", + "lane2": "0x4", + "lane3": "0x4", + "lane4": "0x4", + "lane5": "0x4", + "lane6": "0x4", + "lane7": "0x4" + }, + "pre1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "main": { + "lane0": "0x6b", + "lane1": "0x6b", + "lane2": "0x6b", + "lane3": "0x6b", + "lane4": "0x6b", + "lane5": "0x6b", + "lane6": "0x6b", + "lane7": "0x6b" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } } }, "31": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EOLO138HG5HSDLC)": { - "speed:100GAUI-1-S|800G.*": { - "pre3": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1|EOLO138HG5HSDLC)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { + "pre3": { "lane0": "0xfffffffe", "lane1": "0xfffffffe", "lane2": "0xfffffffe", @@ -4028,12 +13328,322 @@ "lane7": "0x00000000" } } + }, + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": "0x6", + "lane5": "0x6", + "lane6": "0x6", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0", + "lane4": "0xffffffe0", + "lane5": "0xffffffe0", + "lane6": "0xffffffe0", + "lane7": "0xffffffe0" + }, + "main": { + "lane0": "0x80", + "lane1": "0x80", + "lane2": "0x80", + "lane3": "0x80", + "lane4": "0x80", + "lane5": "0x80", + "lane6": "0x80", + "lane7": "0x80" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "OPTICAL50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffb", + "lane1": "0xfffffffb", + "lane2": "0xfffffffb", + "lane3": "0xfffffffb", + "lane4": "0xfffffffb", + "lane5": "0xfffffffb", + "lane6": "0xfffffffb", + "lane7": "0xfffffffb" + }, + "main": { + "lane0": "0x9d", + "lane1": "0x9d", + "lane2": "0x9d", + "lane3": "0x9d", + "lane4": "0x9d", + "lane5": "0x9d", + "lane6": "0x9d", + "lane7": "0x9d" + }, + "post1": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "post2": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + } + }, + "OPTICAL25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff9", + "lane1": "0xfffffff9", + "lane2": "0xfffffff9", + "lane3": "0xfffffff9", + "lane4": "0xfffffff9", + "lane5": "0xfffffff9", + "lane6": "0xfffffff9", + "lane7": "0xfffffff9" + }, + "main": { + "lane0": "0x52", + "lane1": "0x52", + "lane2": "0x52", + "lane3": "0x52", + "lane4": "0x52", + "lane5": "0x52", + "lane6": "0x52", + "lane7": "0x52" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "COPPER50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x4", + "lane1": "0x4", + "lane2": "0x4", + "lane3": "0x4", + "lane4": "0x4", + "lane5": "0x4", + "lane6": "0x4", + "lane7": "0x4" + }, + "pre1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "main": { + "lane0": "0x6b", + "lane1": "0x6b", + "lane2": "0x6b", + "lane3": "0x6b", + "lane4": "0x6b", + "lane5": "0x6b", + "lane6": "0x6b", + "lane7": "0x6b" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } } }, "32": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EOLO138HG5HSDLC)": { - "speed:100GAUI-1-S|800G.*": { - "pre3": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1|EOLO138HG5HSDLC)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { + "pre3": { "lane0": "0xfffffffe", "lane1": "0xfffffffe", "lane2": "0xfffffffe", @@ -4158,11 +13768,321 @@ "lane7": "0x00000000" } } + }, + "OPTICAL100": { + "pre3": { + "lane0": "0xfffffffc", + "lane1": "0x0", + "lane2": "0xfffffffc", + "lane3": "0x0", + "lane4": "0xfffffffc", + "lane5": "0x0", + "lane6": "0xfffffffc", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0xa", + "lane1": "0x6", + "lane2": "0xa", + "lane3": "0x6", + "lane4": "0xa", + "lane5": "0x6", + "lane6": "0xa", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe0", + "lane2": "0xffffffe8", + "lane3": "0xffffffe0", + "lane4": "0xffffffe8", + "lane5": "0xffffffe0", + "lane6": "0xffffffe8", + "lane7": "0xffffffe0" + }, + "main": { + "lane0": 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+ "lane5": "0xfffffffb", + "lane6": "0xfffffffb", + "lane7": "0xfffffffb" + }, + "main": { + "lane0": "0x9d", + "lane1": "0x9d", + "lane2": "0x9d", + "lane3": "0x9d", + "lane4": "0x9d", + "lane5": "0x9d", + "lane6": "0x9d", + "lane7": "0x9d" + }, + "post1": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "post2": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + } + }, + "OPTICAL25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff9", + "lane1": "0xfffffff9", + "lane2": "0xfffffff9", + "lane3": "0xfffffff9", + "lane4": "0xfffffff9", + "lane5": "0xfffffff9", + "lane6": "0xfffffff9", + "lane7": "0xfffffff9" + }, + "main": { + "lane0": "0x52", + "lane1": "0x52", + "lane2": "0x52", + "lane3": "0x52", + "lane4": "0x52", + "lane5": "0x52", + "lane6": "0x52", + "lane7": "0x52" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "COPPER50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x4", + "lane1": "0x4", + "lane2": "0x4", + "lane3": "0x4", + "lane4": "0x4", + "lane5": "0x4", + "lane6": "0x4", + "lane7": "0x4" + }, + "pre1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "main": { + "lane0": "0x6b", + "lane1": "0x6b", + "lane2": "0x6b", + "lane3": "0x6b", + "lane4": "0x6b", + "lane5": "0x6b", + "lane6": "0x6b", + "lane7": "0x6b" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } } }, "33": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EOLO138HG5HSDLC)": { - "speed:100GAUI-1-S|800G.*": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1|EOLO138HG5HSDLC)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { "pre3": { "lane0": "0xffffffff", "lane1": "0xffffffff", @@ -4288,11 +14208,321 @@ "lane7": "0x00000000" } } + }, + "OPTICAL100": { + "pre3": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "pre2": { + "lane0": "0xa", + "lane1": "0xa", + "lane2": "0xa", + "lane3": "0xa", + "lane4": "0xa", + "lane5": "0xa", + "lane6": "0xa", + "lane7": "0xa" + }, + "pre1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "main": { + "lane0": "0x80", + "lane1": "0x80", + "lane2": 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"0xfffffffd", + "lane7": "0xfffffffd" + }, + "main": { + "lane0": "0xa3", + "lane1": "0xa3", + "lane2": "0xa3", + "lane3": "0xa3", + "lane4": "0xa3", + "lane5": "0xa3", + "lane6": "0xa3", + "lane7": "0xa3" + }, + "post1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post2": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + } + }, + "OPTICAL25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + 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"lane7": "0x00000000" } } + }, + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": "0x6", + "lane5": "0x6", + "lane6": "0x6", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0", + "lane4": "0xffffffe0", + "lane5": "0xffffffe0", + "lane6": "0xffffffe0", + "lane7": "0xffffffe0" + }, + "main": { + "lane0": "0x80", + "lane1": "0x80", + "lane2": "0x80", + "lane3": "0x80", + "lane4": "0x80", + "lane5": "0x80", + "lane6": "0x80", + "lane7": "0x80" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post2": { + "lane0": "0x0", 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"lane7": "0x52" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "COPPER50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x4", + "lane1": "0x4", + "lane2": "0x4", + "lane3": "0x4", + "lane4": "0x4", + "lane5": "0x4", + "lane6": "0x4", + "lane7": "0x4" + }, + "pre1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x78", + "lane1": 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+ "lane1": "0x0", + "lane2": "0xfffffffc", + "lane3": "0x0", + "lane4": "0xfffffffc", + "lane5": "0x0", + "lane6": "0xfffffffc", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0xa", + "lane1": "0x6", + "lane2": "0xa", + "lane3": "0x6", + "lane4": "0xa", + "lane5": "0x6", + "lane6": "0xa", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe0", + "lane2": "0xffffffe8", + "lane3": "0xffffffe0", + "lane4": "0xffffffe8", + "lane5": "0xffffffe0", + "lane6": "0xffffffe8", + "lane7": "0xffffffe0" + }, + "main": { + "lane0": "0x80", + "lane1": "0x80", + "lane2": "0x80", + "lane3": "0x80", + "lane4": "0x80", + "lane5": "0x80", + "lane6": "0x80", + "lane7": "0x80" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "OPTICAL50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffb", + "lane1": "0xfffffffb", + "lane2": "0xfffffffb", + "lane3": "0xfffffffb", + "lane4": "0xfffffffb", + "lane5": "0xfffffffb", + "lane6": "0xfffffffb", + "lane7": "0xfffffffb" + }, + "main": { + "lane0": "0x9d", + "lane1": "0x9d", + "lane2": "0x9d", + "lane3": "0x9d", + "lane4": "0x9d", + "lane5": "0x9d", + "lane6": "0x9d", + "lane7": "0x9d" + }, + "post1": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": 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+ "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + 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"lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": "0x6", + "lane5": "0x6", + "lane6": "0x6", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0", + "lane4": "0xffffffe0", + "lane5": "0xffffffe0", + "lane6": "0xffffffe0", + "lane7": "0xffffffe0" + }, + "main": { + "lane0": "0x80", + "lane1": "0x80", + "lane2": "0x80", + "lane3": "0x80", + "lane4": "0x80", + "lane5": "0x80", + "lane6": "0x80", + "lane7": "0x80" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "OPTICAL50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "main": { + "lane0": "0xa3", + "lane1": "0xa3", + "lane2": "0xa3", + "lane3": "0xa3", + "lane4": "0xa3", + "lane5": "0xa3", + "lane6": "0xa3", + "lane7": "0xa3" + }, + "post1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post2": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + } + }, + "OPTICAL25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "main": { + "lane0": "0x47", + "lane1": "0x47", + "lane2": "0x47", + "lane3": "0x47", + "lane4": "0x47", + "lane5": "0x47", + "lane6": "0x47", + "lane7": "0x47" + }, + "post1": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "COPPER50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x4", + "lane1": "0x4", + "lane2": "0x4", + "lane3": "0x4", + "lane4": "0x4", + "lane5": "0x4", + "lane6": "0x4", + "lane7": "0x4" + }, + "pre1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "main": { + "lane0": "0x6b", + "lane1": "0x6b", + "lane2": "0x6b", + "lane3": "0x6b", + "lane4": "0x6b", + "lane5": "0x6b", + "lane6": "0x6b", + "lane7": "0x6b" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } } }, "38": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EOLO138HG5HSDLC)": { - "speed:100GAUI-1-S|800G.*": { - "pre3": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1|EOLO138HG5HSDLC)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { + "pre3": { "lane0": "0xffffffff", "lane1": "0xffffffff", "lane2": "0xffffffff", @@ -4938,11 +16408,321 @@ "lane7": "0x00000000" } } + }, + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": "0x6", + "lane5": "0x6", + "lane6": "0x6", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0", + "lane4": "0xffffffe0", + "lane5": "0xffffffe0", + "lane6": "0xffffffe0", + "lane7": "0xffffffe0" + }, + "main": { + "lane0": "0x80", + "lane1": "0x80", + "lane2": "0x80", + "lane3": "0x80", + "lane4": "0x80", + "lane5": "0x80", + "lane6": "0x80", + "lane7": "0x80" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "OPTICAL50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "main": { + "lane0": "0xa3", + "lane1": "0xa3", + "lane2": "0xa3", + "lane3": "0xa3", + "lane4": "0xa3", + "lane5": "0xa3", + "lane6": "0xa3", + "lane7": "0xa3" + }, + "post1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post2": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + } + }, + "OPTICAL25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "main": { + "lane0": "0x47", + "lane1": "0x47", + "lane2": "0x47", + "lane3": "0x47", + "lane4": "0x47", + "lane5": "0x47", + "lane6": "0x47", + "lane7": "0x47" + }, + "post1": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "COPPER50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x4", + "lane1": "0x4", + "lane2": "0x4", + "lane3": "0x4", + "lane4": "0x4", + "lane5": "0x4", + "lane6": "0x4", + "lane7": "0x4" + }, + "pre1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "main": { + "lane0": "0x6b", + "lane1": "0x6b", + "lane2": "0x6b", + "lane3": "0x6b", + "lane4": "0x6b", + "lane5": "0x6b", + "lane6": "0x6b", + "lane7": "0x6b" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } } }, "39": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EOLO138HG5HSDLC)": { - "speed:100GAUI-1-S|800G.*": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1|EOLO138HG5HSDLC)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { "pre3": { "lane0": "0xffffffff", "lane1": "0xffffffff", @@ -5004,7 +16784,7 @@ "lane7": "0xfffffff7" } } - }, + }, "PINEWAVE-(L-OS8CNS\\d{3}-NMT|L-OSG8CNS\\d{3}-NMT|L-OH8CNH-NME)": { "speed:100GAUI-1-L C2M (Annex 120G)|400GAUI-4-L C2M (Annex 120G)|LEI-400G-PAM4-4|LEI-800G-PAM4-8|LEI-200G-PAM4-2|LEI-100G-PAM4-1": { "pre3": { @@ -5068,11 +16848,321 @@ "lane7": "0x00000000" } } + }, + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": "0x6", + "lane5": "0x6", + "lane6": "0x6", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0", + "lane4": "0xffffffe0", + "lane5": "0xffffffe0", + "lane6": "0xffffffe0", + "lane7": "0xffffffe0" + }, + "main": { + "lane0": "0x80", + "lane1": "0x80", + "lane2": "0x80", + "lane3": "0x80", + "lane4": "0x80", + "lane5": "0x80", + "lane6": "0x80", + "lane7": "0x80" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "OPTICAL50": { + "pre3": { + "lane0": "0x0", + "lane1": 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"lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + } + }, + "OPTICAL25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff9", + "lane1": "0xfffffff9", + "lane2": "0xfffffff9", + "lane3": "0xfffffff9", + "lane4": "0xfffffff9", + "lane5": "0xfffffff9", + "lane6": "0xfffffff9", + "lane7": "0xfffffff9" + }, + "main": { + "lane0": "0x52", + "lane1": "0x52", + "lane2": "0x52", + "lane3": "0x52", + "lane4": "0x52", + "lane5": "0x52", + "lane6": "0x52", + "lane7": "0x52" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": 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"lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } } }, "42": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EOLO138HG5HSDLC)": { - "speed:100GAUI-1-S|800G.*": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1|EOLO138HG5HSDLC)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { "pre3": { "lane0": "0xffffffff", "lane1": "0xffffffff", @@ -5458,11 +18168,321 @@ "lane7": "0x00000000" } } + }, + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": "0x6", + "lane5": "0x6", + "lane6": "0x6", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0", + "lane4": "0xffffffe0", + "lane5": "0xffffffe0", + "lane6": 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"lane6": "0x80", + "lane7": "0x80" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "OPTICAL50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffb", + "lane1": "0xfffffffb", + "lane2": "0xfffffffb", + "lane3": "0xfffffffb", + "lane4": "0xfffffffb", + "lane5": "0xfffffffb", + "lane6": "0xfffffffb", + "lane7": "0xfffffffb" + }, + "main": { + "lane0": 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"0xfffffff9", + "lane3": "0xfffffff9", + "lane4": "0xfffffff9", + "lane5": "0xfffffff9", + "lane6": "0xfffffff9", + "lane7": "0xfffffff9" + }, + "main": { + "lane0": "0x52", + "lane1": "0x52", + "lane2": "0x52", + "lane3": "0x52", + "lane4": "0x52", + "lane5": "0x52", + "lane6": "0x52", + "lane7": "0x52" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "COPPER50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x4", + "lane1": "0x4", + "lane2": "0x4", + "lane3": "0x4", + "lane4": "0x4", + "lane5": "0x4", + "lane6": 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"lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "main": { + "lane0": "0x6b", + "lane1": "0x6b", + "lane2": "0x6b", + "lane3": "0x6b", + "lane4": "0x6b", + "lane5": "0x6b", + "lane6": "0x6b", + "lane7": "0x6b" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } } }, "46": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EOLO138HG5HSDLC)": { - "speed:100GAUI-1-S|800G.*": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1|EOLO138HG5HSDLC)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { "pre3": { "lane0": "0xffffffff", "lane1": "0xffffffff", @@ -5978,11 +19928,321 @@ "lane7": "0x00000000" } } + }, + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": "0x6", + "lane5": "0x6", + "lane6": "0x6", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe4", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0", + "lane4": "0xffffffe0", + "lane5": "0xffffffe0", + "lane6": "0xffffffe0", + "lane7": "0xffffffe0" + }, + "main": { + "lane0": "0x80", + "lane1": "0x80", + "lane2": "0x80", + "lane3": "0x80", + "lane4": "0x80", + "lane5": "0x80", + "lane6": "0x80", + "lane7": "0x80" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffff8", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post2": { + "lane0": "0x0", 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+ "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + 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"0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + } + }, + "OPTICAL25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff9", + "lane1": "0xfffffff9", + "lane2": "0xfffffff9", + "lane3": "0xfffffff9", + "lane4": "0xfffffff9", + "lane5": "0xfffffff9", + "lane6": "0xfffffff9", + "lane7": "0xfffffff9" + }, + "main": { + "lane0": "0x52", + "lane1": "0x52", + "lane2": "0x52", + "lane3": "0x52", + "lane4": "0x52", + "lane5": "0x52", + "lane6": "0x52", + "lane7": "0x52" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": 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"lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "main": { + "lane0": "0x6b", + "lane1": "0x6b", + "lane2": "0x6b", + "lane3": "0x6b", + "lane4": "0x6b", + "lane5": "0x6b", + "lane6": "0x6b", + "lane7": "0x6b" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } } }, "48": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EOLO138HG5HSDLC)": { - "speed:100GAUI-1-S|800G.*": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1|EOLO138HG5HSDLC)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { "pre3": { "lane0": "0xffffffff", "lane1": "0xffffffff", @@ -6238,11 +20808,321 @@ "lane7": "0x00000000" } } + }, + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": 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"0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + } + }, + "OPTICAL25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff9", + "lane1": "0xfffffff9", + "lane2": "0xfffffff9", + "lane3": "0xfffffff9", + "lane4": "0xfffffff9", + "lane5": "0xfffffff9", + "lane6": "0xfffffff9", + "lane7": "0xfffffff9" + }, + "main": { + "lane0": "0x52", + "lane1": "0x52", + "lane2": "0x52", + "lane3": "0x52", + "lane4": "0x52", + "lane5": "0x52", + "lane6": "0x52", + "lane7": "0x52" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": 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"lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "main": { + "lane0": "0x6b", + "lane1": "0x6b", + "lane2": "0x6b", + "lane3": "0x6b", + "lane4": "0x6b", + "lane5": "0x6b", + "lane6": "0x6b", + "lane7": "0x6b" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } } }, "49": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EOLO138HG5HSDLC)": { - "speed:100GAUI-1-S|800G.*": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1|EOLO138HG5HSDLC)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { "pre3": { "lane0": "0xfffffffe", "lane1": "0xfffffffe", @@ -6368,11 +21248,321 @@ "lane7": "0x00000000" } } + }, + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": 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+ "lane6": "0x0", + "lane7": "0x0" + } + }, + "COPPER50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x4", + "lane1": "0x4", + "lane2": "0x4", + "lane3": "0x4", + "lane4": "0x4", + "lane5": "0x4", + "lane6": "0x4", + "lane7": "0x4" + }, + "pre1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + 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"lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } } }, "51": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EOLO138HG5HSDLC)": { - "speed:100GAUI-1-S|800G.*": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1|EOLO138HG5HSDLC)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { "pre3": { "lane0": "0xfffffffe", "lane1": "0xfffffffe", @@ -6628,11 +22128,321 @@ "lane7": "0x00000000" } } + }, + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": "0x6", + "lane5": "0x6", + "lane6": "0x6", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + 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+ "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } } }, "57": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EOLO138HG5HSDLC)": { - "speed:100GAUI-1-S|800G.*": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1|EOLO138HG5HSDLC)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { "pre3": { "lane0": "0xfffffffe", "lane1": "0xfffffffe", @@ -7408,11 +24768,321 @@ "lane7": "0x00000000" } } + }, + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": "0x6", + "lane5": "0x6", + "lane6": "0x6", + "lane7": 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+ "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": 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"0xffffffff", @@ -8058,11 +26968,321 @@ "lane7": "0x00000000" } } + }, + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": "0x6", + "lane5": "0x6", + "lane6": "0x6", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "OPTICAL50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "main": { + "lane0": "0x9f", + "lane1": "0x9f", + "lane2": "0x9f", + "lane3": "0x9f", + "lane4": "0x9f", + "lane5": "0x9f", + "lane6": "0x9f", + "lane7": "0x9f" + }, + "post1": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xffffffff" + }, + "post2": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + } + }, + "OPTICAL25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "main": { + "lane0": "0x66", + "lane1": "0x66", + "lane2": "0x66", + "lane3": "0x66", + "lane4": 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}, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "main": { + "lane0": "0x6b", + "lane1": "0x6b", + "lane2": "0x6b", + "lane3": "0x6b", + "lane4": "0x6b", + "lane5": "0x6b", + "lane6": "0x6b", + "lane7": "0x6b" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } } }, "63": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EOLO138HG5HSDLC)": { - "speed:100GAUI-1-S|800G.*": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1|EOLO138HG5HSDLC)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { "pre3": { "lane0": "0xffffffff", "lane1": "0xffffffff", @@ -8188,11 +27408,321 @@ "lane7": "0x00000000" } } + }, + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": "0x6", + "lane5": "0x6", + "lane6": "0x6", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe8", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x74", + "lane1": "0x74", + "lane2": "0x74", + "lane3": "0x74", + "lane4": "0x74", + "lane5": "0x74", + "lane6": "0x78", + "lane7": "0x74" + }, + "post1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "OPTICAL50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff3", + "lane1": "0xfffffff7", + "lane2": "0xfffffff3", + "lane3": "0xfffffff7", + "lane4": "0xfffffff3", + "lane5": "0xfffffff7", + "lane6": "0xfffffff3", + "lane7": "0xfffffff7" + }, + "main": { + "lane0": "0x98", + "lane1": "0x9e", + "lane2": "0x98", + "lane3": "0x9e", + "lane4": "0x98", + "lane5": "0x9e", + "lane6": "0x98", + "lane7": "0x9e" + }, + "post1": { + "lane0": "0x0", + "lane1": "0xffffffff", + "lane2": "0x0", + "lane3": "0xffffffff", + "lane4": "0x0", + "lane5": "0xffffffff", + "lane6": "0x0", + "lane7": "0xffffffff" + }, + "post2": { + "lane0": "0xfffffffe", + "lane1": "0x0", + "lane2": "0xfffffffe", + "lane3": "0x0", + "lane4": "0xfffffffe", + "lane5": "0x0", + "lane6": "0xfffffffe", + "lane7": "0x0" + } + }, + "OPTICAL25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffa", + "lane2": "0xfffffffc", + "lane3": "0xfffffffa", + "lane4": "0xfffffffc", + "lane5": "0xfffffffa", + "lane6": "0xfffffffc", + "lane7": "0xfffffffa" + }, + "main": { + "lane0": "0x67", + "lane1": "0x63", + "lane2": "0x67", + "lane3": "0x63", + "lane4": "0x67", + "lane5": "0x63", + "lane6": "0x67", + "lane7": "0x63" + }, + "post1": { + "lane0": "0xffffffec", + "lane1": "0xffffffea", + "lane2": "0xffffffec", + "lane3": "0xffffffea", + "lane4": "0xffffffec", + "lane5": "0xffffffea", + "lane6": "0xffffffec", + "lane7": "0xffffffea" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "COPPER50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x4", + "lane1": "0x4", + "lane2": "0x4", + "lane3": "0x4", + "lane4": "0x4", + "lane5": "0x4", + "lane6": "0x4", + "lane7": "0x4" + }, + "pre1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "main": { + "lane0": "0x6b", + "lane1": "0x6b", + "lane2": "0x6b", + "lane3": "0x6b", + "lane4": "0x6b", + "lane5": "0x6b", + "lane6": "0x6b", + "lane7": "0x6b" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } } }, "64": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EOLO138HG5HSDLC)": { - "speed:100GAUI-1-S|800G.*": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1|EOLO138HG5HSDLC)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { "pre3": { "lane0": "0xffffffff", "lane1": "0xffffffff", @@ -8318,6 +27848,388 @@ "lane7": "0x00000000" } } + }, + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": "0x6", + "lane5": "0x6", + "lane6": "0x6", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe8", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x74", + "lane1": "0x74", + "lane2": "0x74", + "lane3": "0x74", + "lane4": "0x74", + "lane5": "0x74", + "lane6": "0x78", + "lane7": "0x74" + }, + "post1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "OPTICAL50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff7", + "lane1": "0xfffffff7", + "lane2": "0xfffffff7", + "lane3": "0xfffffff7", + "lane4": "0xfffffff7", + "lane5": "0xfffffff7", + "lane6": "0xfffffff3", + "lane7": "0xfffffff7" + }, + "main": { + "lane0": "0x9e", + "lane1": "0x9e", + "lane2": "0x9e", + "lane3": "0x9e", + "lane4": "0x9e", + "lane5": "0x9e", + "lane6": "0x98", + "lane7": "0x9e" + }, + "post1": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0x0", + "lane7": "0xffffffff" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0xfffffffe", + "lane7": "0x0" + } + }, + "OPTICAL25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffc", + "lane7": "0xfffffffa" + }, + "main": { + "lane0": "0x63", + "lane1": "0x63", + "lane2": "0x63", + "lane3": "0x63", + "lane4": "0x63", + "lane5": "0x63", + "lane6": "0x67", + "lane7": "0x63" + }, + "post1": { + "lane0": "0xffffffea", + "lane1": "0xffffffea", + "lane2": "0xffffffea", + "lane3": "0xffffffea", + "lane4": "0xffffffea", + "lane5": "0xffffffea", + "lane6": "0xffffffec", + "lane7": "0xffffffea" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "COPPER50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x4", + "lane1": "0x4", + "lane2": "0x4", + "lane3": "0x4", + "lane4": "0x4", + "lane5": "0x4", + "lane6": "0x4", + "lane7": "0x4" + }, + "pre1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "main": { + "lane0": "0x6b", + "lane1": "0x6b", + "lane2": "0x6b", + "lane3": "0x6b", + "lane4": "0x6b", + "lane5": "0x6b", + "lane6": "0x6b", + "lane7": "0x6b" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "65": { + "OPTICAL10": { + "pre1": { + "lane0": "0x0" + }, + "main": { + "lane0": "0x1f" + }, + "post1": { + "lane0": "0xb" + }, + "post2": { + "lane0": "0x0" + }, + "post3": { + "lane0": "0x0" + } + }, + "COPPER10": { + "pre1": { + "lane0": "0x2" + }, + "main": { + "lane0": "0x1f" + }, + "post1": { + "lane0": "0xc" + }, + "post2": { + "lane0": "0x0" + }, + "post3": { + "lane0": "0x0" + } + } + }, + "66": { + "OPTICAL10": { + "pre1": { + "lane0": "0x0" + }, + "main": { + "lane0": "0x1f" + }, + "post1": { + "lane0": "0xb" + }, + "post2": { + "lane0": "0x0" + }, + "post3": { + "lane0": "0x0" + } + }, + "COPPER10": { + "pre1": { + "lane0": "0x2" + }, + "main": { + "lane0": "0x1f" + }, + "post1": { + "lane0": "0xc" + }, + "post2": { + "lane0": "0x0" + }, + "post3": { + "lane0": "0x0" + } } } } diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C448O16/buffers_defaults_t0.j2 b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C448O16/buffers_defaults_t0.j2 index 1013d7b29dc..50ee8119309 100644 --- a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C448O16/buffers_defaults_t0.j2 +++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C448O16/buffers_defaults_t0.j2 @@ -5,12 +5,12 @@ {%- macro generate_buffer_pool_and_profiles() %} "BUFFER_POOL": { "ingress_lossy_pool": { - "size": "162910774", + "size": "164624512", "type": "ingress", "mode": "dynamic" }, "egress_lossy_pool": { - "size": "162910774", + "size": "164624512", "type": "egress", "mode": "dynamic" } @@ -19,7 +19,7 @@ "ingress_lossy_profile": { "pool": "ingress_lossy_pool", "size": "0", - "static_th": "165364160" + "static_th": "82434938" }, {# fallback when no DEVICE_NEIGHBOR_METADATA -#} "egress_lossy_profile": { @@ -35,17 +35,17 @@ "queue1_downlink_lossy_profile": { "pool": "egress_lossy_pool", "size": "1778", - "dynamic_th": "-7" + "dynamic_th": "3" }, "queue2_downlink_lossy_profile": { "pool": "egress_lossy_pool", "size": "1778", - "dynamic_th": "-7" + "dynamic_th": "3" }, "queue3_downlink_lossy_profile": { "pool": "egress_lossy_pool", "size": "1778", - "dynamic_th": "-7" + "dynamic_th": "3" }, "queue4_downlink_lossy_profile": { "pool": "egress_lossy_pool", @@ -70,17 +70,17 @@ "queue1_uplink_lossy_profile": { "pool": "egress_lossy_pool", "size": "1778", - "dynamic_th": "-7" + "dynamic_th": "3" }, "queue2_uplink_lossy_profile": { "pool": "egress_lossy_pool", "size": "1778", - "dynamic_th": "-7" + "dynamic_th": "3" }, "queue3_uplink_lossy_profile": { "pool": "egress_lossy_pool", "size": "1778", - "dynamic_th": "-7" + "dynamic_th": "3" }, "queue4_uplink_lossy_profile": { "pool": "egress_lossy_pool", @@ -108,7 +108,7 @@ {% if DEVICE_METADATA and DEVICE_METADATA['localhost'] - and DEVICE_METADATA['localhost'].type == "LeafRouter" + and DEVICE_METADATA['localhost'].type in ('LeafRouter', 'ToRRouter', 'BackEndLeafRouter', 'BackEndToRRouter') and DEVICE_NEIGHBOR and DEVICE_NEIGHBOR_METADATA %} {%- macro generate_queue_buffers(ports) %} @@ -117,7 +117,7 @@ {% if DEVICE_NEIGHBOR[port] and DEVICE_NEIGHBOR[port].name and DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[port].name] - and DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[port].name].type in ('LeafRouter', 'SpineRouter') %} + and DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[port].name].type in ('LeafRouter', 'SpineRouter', 'BackEndLeafRouter', 'BackEndSpineRouter') %} "{{ port }}|0": { "profile": "queue0_uplink_lossy_profile" }, diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C448O16/buffers_defaults_t1.j2 b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C448O16/buffers_defaults_t1.j2 index 1013d7b29dc..50ee8119309 100644 --- a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C448O16/buffers_defaults_t1.j2 +++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C448O16/buffers_defaults_t1.j2 @@ -5,12 +5,12 @@ {%- macro generate_buffer_pool_and_profiles() %} "BUFFER_POOL": { "ingress_lossy_pool": { - "size": "162910774", + "size": "164624512", "type": "ingress", "mode": "dynamic" }, "egress_lossy_pool": { - "size": "162910774", + "size": "164624512", "type": "egress", "mode": "dynamic" } @@ -19,7 +19,7 @@ "ingress_lossy_profile": { "pool": "ingress_lossy_pool", "size": "0", - "static_th": "165364160" + "static_th": "82434938" }, {# fallback when no DEVICE_NEIGHBOR_METADATA -#} "egress_lossy_profile": { @@ -35,17 +35,17 @@ "queue1_downlink_lossy_profile": { "pool": "egress_lossy_pool", "size": "1778", - "dynamic_th": "-7" + "dynamic_th": "3" }, "queue2_downlink_lossy_profile": { "pool": "egress_lossy_pool", "size": "1778", - "dynamic_th": "-7" + "dynamic_th": "3" }, "queue3_downlink_lossy_profile": { "pool": "egress_lossy_pool", "size": "1778", - "dynamic_th": "-7" + "dynamic_th": "3" }, "queue4_downlink_lossy_profile": { "pool": "egress_lossy_pool", @@ -70,17 +70,17 @@ "queue1_uplink_lossy_profile": { "pool": "egress_lossy_pool", "size": "1778", - "dynamic_th": "-7" + "dynamic_th": "3" }, "queue2_uplink_lossy_profile": { "pool": "egress_lossy_pool", "size": "1778", - "dynamic_th": "-7" + "dynamic_th": "3" }, "queue3_uplink_lossy_profile": { "pool": "egress_lossy_pool", "size": "1778", - "dynamic_th": "-7" + "dynamic_th": "3" }, "queue4_uplink_lossy_profile": { "pool": "egress_lossy_pool", @@ -108,7 +108,7 @@ {% if DEVICE_METADATA and DEVICE_METADATA['localhost'] - and DEVICE_METADATA['localhost'].type == "LeafRouter" + and DEVICE_METADATA['localhost'].type in ('LeafRouter', 'ToRRouter', 'BackEndLeafRouter', 'BackEndToRRouter') and DEVICE_NEIGHBOR and DEVICE_NEIGHBOR_METADATA %} {%- macro generate_queue_buffers(ports) %} @@ -117,7 +117,7 @@ {% if DEVICE_NEIGHBOR[port] and DEVICE_NEIGHBOR[port].name and DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[port].name] - and DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[port].name].type in ('LeafRouter', 'SpineRouter') %} + and DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[port].name].type in ('LeafRouter', 'SpineRouter', 'BackEndLeafRouter', 'BackEndSpineRouter') %} "{{ port }}|0": { "profile": "queue0_uplink_lossy_profile" }, diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C448O16/hwsku.json b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C448O16/hwsku.json index fe246439058..daeacb2ffd2 100644 --- a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C448O16/hwsku.json +++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C448O16/hwsku.json @@ -1,260 +1,196 @@ { "interfaces": { "Ethernet0": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet8": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet16": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet24": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet32": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet40": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet48": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet56": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet64": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet72": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet80": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet88": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet96": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet104": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet112": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet120": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet128": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet136": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet144": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet152": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet160": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet168": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet176": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet184": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet192": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet200": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet208": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet216": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet224": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet232": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet240": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet248": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet256": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet264": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet272": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet280": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet288": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet296": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet304": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet312": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet320": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet328": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet336": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet344": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet352": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet360": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet368": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet376": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet384": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet392": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet400": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet408": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet416": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet424": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet432": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet440": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet448": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet456": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet464": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet472": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet480": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet488": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet496": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet504": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" } } } diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C448O16/th5-a7060x6-64pe.config.bcm b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C448O16/th5-a7060x6-64pe.config.bcm index e7cc2589696..c3c641d5f4c 100644 --- a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C448O16/th5-a7060x6-64pe.config.bcm +++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C448O16/th5-a7060x6-64pe.config.bcm @@ -25,6 +25,7 @@ bcm_device: 0: global: pktio_mode: 1 + sai_switch_pcie_hotswap_disable: 1 default_cpu_tx_queue: 7 vlan_flooding_l2mc_num_reserved: 0 ipv6_lpm_128b_enable: 1 diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C512S2/buffers_defaults_t0.j2 b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C512S2/buffers_defaults_t0.j2 index 6d06e5afb64..7ae01e7d7b9 100644 --- a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C512S2/buffers_defaults_t0.j2 +++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C512S2/buffers_defaults_t0.j2 @@ -5,12 +5,12 @@ {%- macro generate_buffer_pool_and_profiles() %} "BUFFER_POOL": { "ingress_lossy_pool": { - "size": "163593526", + "size": "165335712", "type": "ingress", "mode": "dynamic" }, "egress_lossy_pool": { - "size": "163593526", + "size": "165335712", "type": "egress", "mode": "dynamic" } @@ -19,7 +19,7 @@ "ingress_lossy_profile": { "pool": "ingress_lossy_pool", "size": "0", - "static_th": "165364160" + "static_th": "82434938" }, {# fallback when no DEVICE_NEIGHBOR_METADATA -#} "egress_lossy_profile": { @@ -35,17 +35,17 @@ "queue1_downlink_lossy_profile": { "pool": "egress_lossy_pool", "size": "1778", - "dynamic_th": "-7" + "dynamic_th": "3" }, "queue2_downlink_lossy_profile": { "pool": "egress_lossy_pool", "size": "1778", - "dynamic_th": "-7" + "dynamic_th": "3" }, "queue3_downlink_lossy_profile": { "pool": "egress_lossy_pool", "size": "1778", - "dynamic_th": "-7" + "dynamic_th": "3" }, "queue4_downlink_lossy_profile": { "pool": "egress_lossy_pool", @@ -70,17 +70,17 @@ "queue1_uplink_lossy_profile": { "pool": "egress_lossy_pool", "size": "1778", - "dynamic_th": "-7" + "dynamic_th": "3" }, "queue2_uplink_lossy_profile": { "pool": "egress_lossy_pool", "size": "1778", - "dynamic_th": "-7" + "dynamic_th": "3" }, "queue3_uplink_lossy_profile": { "pool": "egress_lossy_pool", "size": "1778", - "dynamic_th": "-7" + "dynamic_th": "3" }, "queue4_uplink_lossy_profile": { "pool": "egress_lossy_pool", @@ -108,7 +108,7 @@ {% if DEVICE_METADATA and DEVICE_METADATA['localhost'] - and DEVICE_METADATA['localhost'].type == "ToRRouter" + and DEVICE_METADATA['localhost'].type in ('LeafRouter', 'ToRRouter', 'BackEndLeafRouter', 'BackEndToRRouter') and DEVICE_NEIGHBOR and DEVICE_NEIGHBOR_METADATA %} {%- macro generate_queue_buffers(ports) %} @@ -117,7 +117,7 @@ {% if DEVICE_NEIGHBOR[port] and DEVICE_NEIGHBOR[port].name and DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[port].name] - and DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[port].name].type in ('LeafRouter', 'ToRRouter') %} + and DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[port].name].type in ('LeafRouter', 'ToRRouter', 'BackEndLeafRouter', 'BackEndToRRouter') %} "{{ port }}|0": { "profile": "queue0_uplink_lossy_profile" }, diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C512S2/buffers_defaults_t1.j2 b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C512S2/buffers_defaults_t1.j2 index 6d06e5afb64..7ae01e7d7b9 100644 --- a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C512S2/buffers_defaults_t1.j2 +++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C512S2/buffers_defaults_t1.j2 @@ -5,12 +5,12 @@ {%- macro generate_buffer_pool_and_profiles() %} "BUFFER_POOL": { "ingress_lossy_pool": { - "size": "163593526", + "size": "165335712", "type": "ingress", "mode": "dynamic" }, "egress_lossy_pool": { - "size": "163593526", + "size": "165335712", "type": "egress", "mode": "dynamic" } @@ -19,7 +19,7 @@ "ingress_lossy_profile": { "pool": "ingress_lossy_pool", "size": "0", - "static_th": "165364160" + "static_th": "82434938" }, {# fallback when no DEVICE_NEIGHBOR_METADATA -#} "egress_lossy_profile": { @@ -35,17 +35,17 @@ "queue1_downlink_lossy_profile": { "pool": "egress_lossy_pool", "size": "1778", - "dynamic_th": "-7" + "dynamic_th": "3" }, "queue2_downlink_lossy_profile": { "pool": "egress_lossy_pool", "size": "1778", - "dynamic_th": "-7" + "dynamic_th": "3" }, "queue3_downlink_lossy_profile": { "pool": "egress_lossy_pool", "size": "1778", - "dynamic_th": "-7" + "dynamic_th": "3" }, "queue4_downlink_lossy_profile": { "pool": "egress_lossy_pool", @@ -70,17 +70,17 @@ "queue1_uplink_lossy_profile": { "pool": "egress_lossy_pool", "size": "1778", - "dynamic_th": "-7" + "dynamic_th": "3" }, "queue2_uplink_lossy_profile": { "pool": "egress_lossy_pool", "size": "1778", - "dynamic_th": "-7" + "dynamic_th": "3" }, "queue3_uplink_lossy_profile": { "pool": "egress_lossy_pool", "size": "1778", - "dynamic_th": "-7" + "dynamic_th": "3" }, "queue4_uplink_lossy_profile": { "pool": "egress_lossy_pool", @@ -108,7 +108,7 @@ {% if DEVICE_METADATA and DEVICE_METADATA['localhost'] - and DEVICE_METADATA['localhost'].type == "ToRRouter" + and DEVICE_METADATA['localhost'].type in ('LeafRouter', 'ToRRouter', 'BackEndLeafRouter', 'BackEndToRRouter') and DEVICE_NEIGHBOR and DEVICE_NEIGHBOR_METADATA %} {%- macro generate_queue_buffers(ports) %} @@ -117,7 +117,7 @@ {% if DEVICE_NEIGHBOR[port] and DEVICE_NEIGHBOR[port].name and DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[port].name] - and DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[port].name].type in ('LeafRouter', 'ToRRouter') %} + and DEVICE_NEIGHBOR_METADATA[DEVICE_NEIGHBOR[port].name].type in ('LeafRouter', 'ToRRouter', 'BackEndLeafRouter', 'BackEndToRRouter') %} "{{ port }}|0": { "profile": "queue0_uplink_lossy_profile" }, diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C512S2/hwsku.json b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C512S2/hwsku.json index cce931728fd..c23e7322deb 100644 --- a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C512S2/hwsku.json +++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C512S2/hwsku.json @@ -1,260 +1,196 @@ { "interfaces": { "Ethernet0": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet8": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet16": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet24": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet32": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet40": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet48": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet56": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet64": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet72": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet80": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet88": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet96": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet104": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet112": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet120": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet128": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet136": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet144": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet152": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet160": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet168": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet176": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet184": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet192": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet200": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet208": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet216": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet224": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet232": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet240": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet248": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet256": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet264": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet272": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet280": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet288": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet296": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet304": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet312": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet320": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet328": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet336": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet344": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet352": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet360": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet368": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet376": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet384": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet392": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet400": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet408": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet416": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet424": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet432": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet440": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet448": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet456": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet464": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet472": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet480": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet488": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet496": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet504": { - "default_brkout_mode": "8x100G", - "autoneg": "on" + "default_brkout_mode": "8x100G" }, "Ethernet512": { "default_brkout_mode": "1x10G" diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C512S2/th5-a7060x6-64pe.config.bcm b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C512S2/th5-a7060x6-64pe.config.bcm index ee2a07306d0..3e90cf7e9e1 100644 --- a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C512S2/th5-a7060x6-64pe.config.bcm +++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-C512S2/th5-a7060x6-64pe.config.bcm @@ -25,6 +25,7 @@ bcm_device: 0: global: pktio_mode: 1 + sai_switch_pcie_hotswap_disable: 1 default_cpu_tx_queue: 7 vlan_flooding_l2mc_num_reserved: 0 ipv6_lpm_128b_enable: 1 diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128/buffers.json.j2 b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128/buffers.json.j2 index 1555b9fa4ab..5143ea68c6c 100644 --- a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128/buffers.json.j2 +++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128/buffers.json.j2 @@ -1,6 +1,8 @@ {# set default_topo based on switch_role #} -{%- if DEVICE_METADATA is defined and 'lowerspinerouter' in DEVICE_METADATA['localhost']['type'].lower() -%} +{%- if DEVICE_METADATA is defined and ('lowerspinerouter' in DEVICE_METADATA['localhost']['type'].lower() or 'fabricregionalhub' == DEVICE_METADATA['localhost']['type'].lower()) -%} {%- set default_topo = 'lt2' %} +{%- elif DEVICE_METADATA is defined and 'fabricspinerouter' in DEVICE_METADATA['localhost']['type'].lower() -%} +{%- set default_topo = 'ft2' %} {%- else %} {%- set default_topo = 't1' %} {%- endif %} diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128/buffers_defaults_ft2.j2 b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128/buffers_defaults_ft2.j2 new file mode 100644 index 00000000000..bf47ec9141f --- /dev/null +++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128/buffers_defaults_ft2.j2 @@ -0,0 +1,36 @@ +{%- set default_cable = '5m' %} + +{%- include 'buffer_ports.j2' %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "164075364", + "type": "ingress", + "mode": "dynamic", + "xoff": "49418240" + }, + "egress_lossless_pool": { + "size": "164075364", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool": "ingress_lossless_pool", + "size": "0", + "static_th": "82434938" + }, + "egress_lossy_profile": { + "pool": "egress_lossless_pool", + "size": "1778", + "dynamic_th": "0" + }, + "egress_lossless_profile": { + "pool": "egress_lossless_pool", + "size": "0", + "static_th": "82434938" + } + }, +{%- endmacro %} diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128/buffers_defaults_lt2.j2 b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128/buffers_defaults_lt2.j2 index 03a61f42416..bf47ec9141f 100644 --- a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128/buffers_defaults_lt2.j2 +++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128/buffers_defaults_lt2.j2 @@ -20,7 +20,7 @@ "ingress_lossy_profile": { "pool": "ingress_lossless_pool", "size": "0", - "static_th": "165364160" + "static_th": "82434938" }, "egress_lossy_profile": { "pool": "egress_lossless_pool", @@ -30,7 +30,7 @@ "egress_lossless_profile": { "pool": "egress_lossless_pool", "size": "0", - "static_th": "165364160" + "static_th": "82434938" } }, {%- endmacro %} diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128/buffers_defaults_t0.j2 b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128/buffers_defaults_t0.j2 index 6d5f92f60e1..5fec9e6818d 100644 --- a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128/buffers_defaults_t0.j2 +++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128/buffers_defaults_t0.j2 @@ -5,13 +5,13 @@ {%- macro generate_buffer_pool_and_profiles() %} "BUFFER_POOL": { "ingress_lossless_pool": { - "size": "164075364", + "size": "164505640", "type": "ingress", "mode": "dynamic", "xoff": "22010624" }, "egress_lossless_pool": { - "size": "164075364", + "size": "164505640", "type": "egress", "mode": "static" } @@ -20,7 +20,7 @@ "ingress_lossy_profile": { "pool": "ingress_lossless_pool", "size": "0", - "static_th": "165364160" + "static_th": "82434938" }, "egress_lossy_profile": { "pool": "egress_lossless_pool", @@ -30,7 +30,7 @@ "egress_lossless_profile": { "pool": "egress_lossless_pool", "size": "0", - "static_th": "165364160" + "static_th": "82434938" } }, {%- endmacro %} diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128/buffers_defaults_t1.j2 b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128/buffers_defaults_t1.j2 index 6d5f92f60e1..5fec9e6818d 100644 --- a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128/buffers_defaults_t1.j2 +++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128/buffers_defaults_t1.j2 @@ -5,13 +5,13 @@ {%- macro generate_buffer_pool_and_profiles() %} "BUFFER_POOL": { "ingress_lossless_pool": { - "size": "164075364", + "size": "164505640", "type": "ingress", "mode": "dynamic", "xoff": "22010624" }, "egress_lossless_pool": { - "size": "164075364", + "size": "164505640", "type": "egress", "mode": "static" } @@ -20,7 +20,7 @@ "ingress_lossy_profile": { "pool": "ingress_lossless_pool", "size": "0", - "static_th": "165364160" + "static_th": "82434938" }, "egress_lossy_profile": { "pool": "egress_lossless_pool", @@ -30,7 +30,7 @@ "egress_lossless_profile": { "pool": "egress_lossless_pool", "size": "0", - "static_th": "165364160" + "static_th": "82434938" } }, {%- endmacro %} diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128/hwsku.json b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128/hwsku.json index a200919c1a4..f3fe3efcc13 100644 --- a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128/hwsku.json +++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128/hwsku.json @@ -1,260 +1,196 @@ { "interfaces": { "Ethernet0": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet8": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet16": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet24": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet32": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet40": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet48": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet56": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet64": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet72": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet80": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet88": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet96": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet104": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet112": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet120": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet128": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet136": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet144": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet152": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet160": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet168": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet176": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet184": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet192": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet200": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet208": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet216": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet224": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet232": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet240": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet248": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet256": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet264": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet272": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet280": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet288": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet296": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet304": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet312": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet320": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet328": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet336": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet344": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet352": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet360": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet368": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet376": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet384": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet392": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet400": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet408": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet416": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet424": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet432": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet440": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet448": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet456": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet464": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet472": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet480": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet488": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet496": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet504": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" } } } diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128/qos.json.j2 b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128/qos.json.j2 index 3fb4d4fc087..5ccf581d664 100644 --- a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128/qos.json.j2 +++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128/qos.json.j2 @@ -1,4 +1,4 @@ -{%- if DEVICE_METADATA is defined and 'lowerspinerouter' in DEVICE_METADATA['localhost']['type'].lower() -%} +{%- if DEVICE_METADATA is defined and ('lowerspinerouter' in DEVICE_METADATA['localhost']['type'].lower() or 'fabricspinerouter' in DEVICE_METADATA['localhost']['type'].lower() or 'fabricregionalhub' == DEVICE_METADATA['localhost']['type'].lower()) -%} {# Do nothing for lt2 #} diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128/sai.profile.j2 b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128/sai.profile.j2 index 095d2aafe62..2634bdba1ce 100644 --- a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128/sai.profile.j2 +++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128/sai.profile.j2 @@ -1,7 +1,7 @@ {# Get sai.profile based on switch_role #} {%- if DEVICE_METADATA is defined -%} {%- set switch_role = DEVICE_METADATA['localhost']['type'] -%} -{%- if 'lowerspinerouter' in switch_role.lower() %} +{%- if 'lowerspinerouter' in switch_role.lower() or 'fabricspinerouter' in switch_role.lower() or 'fabricregionalhub' == switch_role.lower() %} {% set sai_profile_contents = 'SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th5-a7060x6-64pe-lt2.config.bcm' -%} {%- else %} {%- set sai_profile_contents = 'SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th5-a7060x6-64pe.config.bcm' -%} diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128/th5-a7060x6-64pe-lt2.config.bcm b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128/th5-a7060x6-64pe-lt2.config.bcm index b91cf18b48b..842a51aed21 100644 --- a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128/th5-a7060x6-64pe-lt2.config.bcm +++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128/th5-a7060x6-64pe-lt2.config.bcm @@ -22,6 +22,7 @@ bcm_device: 0: global: pktio_mode: 1 + sai_switch_pcie_hotswap_disable: 1 default_cpu_tx_queue: 7 vlan_flooding_l2mc_num_reserved: 0 ipv6_lpm_128b_enable: 1 diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128/th5-a7060x6-64pe.config.bcm b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128/th5-a7060x6-64pe.config.bcm index 6d88ec1df63..7448d3cea5b 100644 --- a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128/th5-a7060x6-64pe.config.bcm +++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128/th5-a7060x6-64pe.config.bcm @@ -22,6 +22,7 @@ bcm_device: 0: global: pktio_mode: 1 + sai_switch_pcie_hotswap_disable: 1 default_cpu_tx_queue: 7 vlan_flooding_l2mc_num_reserved: 0 ipv6_lpm_128b_enable: 1 diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128S2/hwsku.json b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128S2/hwsku.json index 1650c128d35..b40939ff01f 100644 --- a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128S2/hwsku.json +++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128S2/hwsku.json @@ -1,260 +1,196 @@ { "interfaces": { "Ethernet0": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet8": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet16": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet24": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet32": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet40": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet48": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet56": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet64": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet72": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet80": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet88": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet96": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet104": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet112": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet120": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet128": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet136": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet144": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet152": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet160": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet168": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet176": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet184": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet192": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet200": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet208": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet216": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet224": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet232": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet240": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet248": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet256": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet264": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet272": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet280": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet288": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet296": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet304": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet312": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet320": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet328": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet336": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet344": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet352": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet360": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet368": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet376": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet384": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet392": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet400": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet408": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet416": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet424": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet432": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet440": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet448": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet456": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet464": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet472": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet480": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet488": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet496": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet504": { - "default_brkout_mode": "2x400G", - "autoneg": "on" + "default_brkout_mode": "2x400G" }, "Ethernet512": { "default_brkout_mode": "1x10G" diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128S2/th5-a7060x6-64pe.config.bcm b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128S2/th5-a7060x6-64pe.config.bcm index 7e111372ae3..2ecd6a36335 100644 --- a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128S2/th5-a7060x6-64pe.config.bcm +++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-O128S2/th5-a7060x6-64pe.config.bcm @@ -25,6 +25,7 @@ bcm_device: 0: global: pktio_mode: 1 + sai_switch_pcie_hotswap_disable: 1 default_cpu_tx_queue: 7 vlan_flooding_l2mc_num_reserved: 0 ipv6_lpm_128b_enable: 1 diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P28O72/th5-a7060x6-64pe.config.bcm b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P28O72/th5-a7060x6-64pe.config.bcm index 5c3daa523e8..0648a29588a 100644 --- a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P28O72/th5-a7060x6-64pe.config.bcm +++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P28O72/th5-a7060x6-64pe.config.bcm @@ -25,6 +25,7 @@ bcm_device: 0: global: pktio_mode: 1 + sai_switch_pcie_hotswap_disable: 1 default_cpu_tx_queue: 7 vlan_flooding_l2mc_num_reserved: 0 ipv6_lpm_128b_enable: 1 diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P32O64/buffers_defaults_lt2.j2 b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P32O64/buffers_defaults_lt2.j2 index f810dbc67ac..38598f07b4f 100644 --- a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P32O64/buffers_defaults_lt2.j2 +++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P32O64/buffers_defaults_lt2.j2 @@ -5,13 +5,13 @@ {%- macro generate_buffer_pool_and_profiles() %} "BUFFER_POOL": { "ingress_lossless_pool": { - "size": "147226020", + "size": "164619432", "type": "ingress", "mode": "dynamic", "xoff": "33690560" }, "egress_lossless_pool": { - "size": "147226020", + "size": "164619432", "type": "egress", "mode": "static" } @@ -25,12 +25,12 @@ "egress_lossless_profile": { "pool": "egress_lossless_pool", "size": "0", - "static_th": "165364160" + "static_th": "82434938" }, "ingress_lossy_profile": { "pool": "ingress_lossless_pool", "size": "0", - "static_th": "165364160" + "static_th": "82434938" } }, {%- endmacro %} diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P32O64/buffers_defaults_t1.j2 b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P32O64/buffers_defaults_t1.j2 index 1b7c711dcf5..952fd06d718 100644 --- a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P32O64/buffers_defaults_t1.j2 +++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P32O64/buffers_defaults_t1.j2 @@ -25,12 +25,12 @@ "egress_lossless_profile": { "pool": "egress_lossless_pool", "size": "0", - "static_th": "165364160" + "static_th": "82434938" }, "ingress_lossy_profile": { "pool": "ingress_lossless_pool", "size": "0", - "static_th": "165364160" + "static_th": "82434938" } }, {%- endmacro %} diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P32O64/th5-a7060x6-64pe.config.bcm b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P32O64/th5-a7060x6-64pe.config.bcm index 79332296519..2e09893c26d 100644 --- a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P32O64/th5-a7060x6-64pe.config.bcm +++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P32O64/th5-a7060x6-64pe.config.bcm @@ -25,6 +25,7 @@ bcm_device: 0: global: pktio_mode: 1 + sai_switch_pcie_hotswap_disable: 1 default_cpu_tx_queue: 7 vlan_flooding_l2mc_num_reserved: 0 ipv6_lpm_128b_enable: 1 diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P32V128/buffers_defaults_t0.j2 b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P32V128/buffers_defaults_t0.j2 index d3a81f4c866..6d1e2197dc3 100644 --- a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P32V128/buffers_defaults_t0.j2 +++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P32V128/buffers_defaults_t0.j2 @@ -25,12 +25,12 @@ "egress_lossless_profile": { "pool": "egress_lossless_pool", "size": "0", - "static_th": "165364160" + "static_th": "82434938" }, "ingress_lossy_profile": { "pool": "ingress_lossless_pool", "size": "0", - "static_th": "165364160" + "static_th": "82434938" } }, {%- endmacro %} diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P32V128/th5-a7060x6-64pe.config.bcm b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P32V128/th5-a7060x6-64pe.config.bcm index 4552ad54399..a1e948ead3b 100644 --- a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P32V128/th5-a7060x6-64pe.config.bcm +++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P32V128/th5-a7060x6-64pe.config.bcm @@ -25,6 +25,7 @@ bcm_device: 0: global: pktio_mode: 1 + sai_switch_pcie_hotswap_disable: 1 default_cpu_tx_queue: 7 vlan_flooding_l2mc_num_reserved: 0 ipv6_lpm_128b_enable: 1 diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P64/buffers_defaults_ft2.j2 b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P64/buffers_defaults_ft2.j2 index fff8c1e9e13..3847327fa55 100644 --- a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P64/buffers_defaults_ft2.j2 +++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P64/buffers_defaults_ft2.j2 @@ -5,13 +5,13 @@ {%- macro generate_buffer_pool_and_profiles() %} "BUFFER_POOL": { "ingress_lossless_pool": { - "size": "164302948", + "size": "164733224", "type": "ingress", "mode": "dynamic", "xoff": "17962880" }, "egress_lossless_pool": { - "size": "164302948", + "size": "164733224", "type": "egress", "mode": "static" } @@ -25,12 +25,12 @@ "egress_lossless_profile": { "pool": "egress_lossless_pool", "size": "0", - "static_th": "165364160" + "static_th": "82434938" }, "ingress_lossy_profile": { "pool": "ingress_lossless_pool", "size": "0", - "static_th": "165364160" + "static_th": "82434938" } }, {%- endmacro %} diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P64/th5-a7060x6-64pe.config.bcm b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P64/th5-a7060x6-64pe.config.bcm index c1106adb02c..c0fe2e23c5d 100644 --- a/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P64/th5-a7060x6-64pe.config.bcm +++ b/device/arista/x86_64-arista_7060x6_64pe_b/Arista-7060X6-64PE-B-P64/th5-a7060x6-64pe.config.bcm @@ -25,6 +25,7 @@ bcm_device: 0: global: pktio_mode: 1 + sai_switch_pcie_hotswap_disable: 1 default_cpu_tx_queue: 7 vlan_flooding_l2mc_num_reserved: 0 ipv6_lpm_128b_enable: 1 diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/installer.conf b/device/arista/x86_64-arista_7060x6_64pe_b/installer.conf new file mode 100644 index 00000000000..6cc2e45188a --- /dev/null +++ b/device/arista/x86_64-arista_7060x6_64pe_b/installer.conf @@ -0,0 +1,2 @@ +ARISTA_SID="Redstart*QuicksilverP512" +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="modprobe.blacklist=snd_hda_intel,hdaudio,amd_sfh" diff --git a/device/arista/x86_64-arista_7060x6_64pe_b/media_settings.json b/device/arista/x86_64-arista_7060x6_64pe_b/media_settings.json index 176509c8444..7411cf0f2f7 100644 --- a/device/arista/x86_64-arista_7060x6_64pe_b/media_settings.json +++ b/device/arista/x86_64-arista_7060x6_64pe_b/media_settings.json @@ -1,8 +1,8 @@ { "PORT_MEDIA_SETTINGS": { "1": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1)": { - "speed:100GAUI-1-S|800G.*": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { "pre3": { "lane0": "0xfffffffe", "lane1": "0xfffffffe", @@ -223,6 +223,366 @@ } } }, + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": "0x6", + "lane5": "0x6", + "lane6": "0x6", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x1", + "lane7": "0x0" + } + }, + "OPTICAL50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "main": { + "lane0": "0x9f", + "lane1": "0x9f", + "lane2": "0x9f", + "lane3": "0x9f", + "lane4": "0x9f", + "lane5": "0x9f", + "lane6": "0x9f", + "lane7": "0x9f" + }, + "post1": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xffffffff" + }, + "post2": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x1", + "lane7": "0x0" + } + }, + "OPTICAL25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "main": { + "lane0": "0x66", + "lane1": "0x66", + "lane2": "0x66", + "lane3": "0x66", + "lane4": "0x66", + "lane5": "0x66", + "lane6": "0x66", + "lane7": "0x66" + }, + "post1": { + "lane0": "0xffffffe9", + "lane1": "0xffffffe9", + "lane2": "0xffffffe9", + "lane3": "0xffffffe9", + "lane4": "0xffffffe9", + "lane5": "0xffffffe9", + "lane6": "0xffffffe9", + "lane7": "0xffffffe9" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x1", + "lane7": "0x0" + } + }, + "COPPER50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x4", + "lane1": "0x4", + "lane2": "0x4", + "lane3": "0x4", + "lane4": "0x4", + "lane5": "0x4", + "lane6": "0x4", + "lane7": "0x4" + }, + "pre1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x1", + "lane7": "0x0" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "main": { + "lane0": "0x6b", + "lane1": "0x6b", + "lane2": "0x6b", + "lane3": "0x6b", + "lane4": "0x6b", + "lane5": "0x6b", + "lane6": "0x6b", + "lane7": "0x6b" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x1", + "lane7": "0x0" + } + }, "Default": { "rxpolarity": { "lane0": "0x0", @@ -237,8 +597,8 @@ } }, "2": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1)": { - "speed:100GAUI-1-S|800G.*": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { "pre3": { "lane0": "0xfffffffe", "lane1": "0xfffffffe", @@ -459,7 +819,67 @@ } } }, - "Default": { + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": "0x6", + "lane5": "0x6", + "lane6": "0x6", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x74", + "lane1": "0x74", + "lane2": "0x74", + "lane3": "0x74", + "lane4": "0x74", + "lane5": "0x74", + "lane6": "0x74", + "lane7": "0x74" + }, + "post1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, "rxpolarity": { "lane0": "0x0", "lane1": "0x1", @@ -470,94 +890,394 @@ "lane6": "0x0", "lane7": "0x0" } - } - }, - "3": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1)": { - "speed:100GAUI-1-S|800G.*": { - "pre3": { - "lane0": "0xfffffffe", - "lane1": "0xfffffffe", - "lane2": "0xfffffffe", - "lane3": "0xfffffffe", - "lane4": "0xfffffffe", - "lane5": "0xfffffffe", - "lane6": "0xfffffffe", - "lane7": "0xfffffffe" - }, - "pre2": { - "lane0": "0x00000008", - "lane1": "0x00000008", - "lane2": "0x00000008", - "lane3": "0x00000008", - "lane4": "0x00000008", - "lane5": "0x00000008", - "lane6": "0x00000008", - "lane7": "0x00000008" - }, - "pre1": { - "lane0": "0xffffffe3", - "lane1": "0xffffffe3", - "lane2": "0xffffffe3", - "lane3": "0xffffffe3", - "lane4": "0xffffffe3", - "lane5": "0xffffffe3", - "lane6": "0xffffffe3", - "lane7": "0xffffffe3" - }, - "main": { - "lane0": "0x00000064", - "lane1": "0x00000064", - "lane2": "0x00000064", - "lane3": "0x00000064", - "lane4": "0x00000064", - "lane5": "0x00000064", - "lane6": "0x00000064", - "lane7": "0x00000064" - }, - "post1": { - "lane0": "0xfffffff8", - "lane1": "0xfffffff8", - "lane2": "0xfffffff8", - "lane3": "0xfffffff8", - "lane4": "0xfffffff8", - "lane5": "0xfffffff8", - "lane6": "0xfffffff8", - "lane7": "0xfffffff8" - }, - "post2": { - "lane0": "0xfffffff3", - "lane1": "0xfffffff3", - "lane2": "0xfffffff3", - "lane3": "0xfffffff3", - "lane4": "0xfffffff3", - "lane5": "0xfffffff3", - "lane6": "0xfffffff3", - "lane7": "0xfffffff3" - }, - "rxpolarity": { - "lane0": "0x1", - "lane1": "0x0", - "lane2": "0x1", - "lane3": "0x0", - "lane4": "0x1", - "lane5": "0x0", - "lane6": "0x1", - "lane7": "0x0" - } - } }, - "EOPTOLINK-EOLO138HG5HSDLC": { - "speed:100GAUI-1-S|800G.*": { - "pre3": { - "lane0": "0xfffffffe", - "lane1": "0xfffffffe", - "lane2": "0xfffffffe", - "lane3": "0xfffffffe", - "lane4": "0xfffffffe", - "lane5": "0xfffffffe", - "lane6": "0xfffffffe", - "lane7": "0xfffffffe" + "OPTICAL50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "main": { + "lane0": "0x9f", + "lane1": "0x9f", + "lane2": "0x9f", + "lane3": "0x9f", + "lane4": "0x9f", + "lane5": "0x9f", + "lane6": "0x9f", + "lane7": "0x9f" + }, + "post1": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xffffffff" + }, + "post2": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "OPTICAL25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "main": { + "lane0": "0x66", + "lane1": "0x66", + "lane2": "0x66", + "lane3": "0x66", + "lane4": "0x66", + "lane5": "0x66", + "lane6": "0x66", + "lane7": "0x66" + }, + "post1": { + "lane0": "0xffffffe9", + "lane1": "0xffffffe9", + "lane2": "0xffffffe9", + "lane3": "0xffffffe9", + "lane4": "0xffffffe9", + "lane5": "0xffffffe9", + "lane6": "0xffffffe9", + "lane7": "0xffffffe9" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "COPPER50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x4", + "lane1": "0x4", + "lane2": "0x4", + "lane3": "0x4", + "lane4": "0x4", + "lane5": "0x4", + "lane6": "0x4", + "lane7": "0x4" + }, + "pre1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "main": { + "lane0": "0x6b", + "lane1": "0x6b", + "lane2": "0x6b", + "lane3": "0x6b", + "lane4": "0x6b", + "lane5": "0x6b", + "lane6": "0x6b", + "lane7": "0x6b" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "Default": { + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "3": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { + "pre3": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "pre2": { + "lane0": "0x00000008", + "lane1": "0x00000008", + "lane2": "0x00000008", + "lane3": "0x00000008", + "lane4": "0x00000008", + "lane5": "0x00000008", + "lane6": "0x00000008", + "lane7": "0x00000008" + }, + "pre1": { + "lane0": "0xffffffe3", + "lane1": "0xffffffe3", + "lane2": "0xffffffe3", + "lane3": "0xffffffe3", + "lane4": "0xffffffe3", + "lane5": "0xffffffe3", + "lane6": "0xffffffe3", + "lane7": "0xffffffe3" + }, + "main": { + "lane0": "0x00000064", + "lane1": "0x00000064", + "lane2": "0x00000064", + "lane3": "0x00000064", + "lane4": "0x00000064", + "lane5": "0x00000064", + "lane6": "0x00000064", + "lane7": "0x00000064" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0xfffffff3", + "lane1": "0xfffffff3", + "lane2": "0xfffffff3", + "lane3": "0xfffffff3", + "lane4": "0xfffffff3", + "lane5": "0xfffffff3", + "lane6": "0xfffffff3", + "lane7": "0xfffffff3" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x0" + } + } + }, + "EOPTOLINK-EOLO138HG5HSDLC": { + "speed:100GAUI-1-S|800G.*": { + "pre3": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" }, "pre2": { "lane0": "0x00000008", @@ -695,7 +1415,67 @@ } } }, - "Default": { + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": "0x6", + "lane5": "0x6", + "lane6": "0x6", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x74", + "lane1": "0x74", + "lane2": "0x74", + "lane3": "0x74", + "lane4": "0x74", + "lane5": "0x74", + "lane6": "0x74", + "lane7": "0x74" + }, + "post1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, "rxpolarity": { "lane0": "0x1", "lane1": "0x0", @@ -706,25 +1486,325 @@ "lane6": "0x1", "lane7": "0x0" } - } - }, - "4": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1)": { - "speed:100GAUI-1-S|800G.*": { - "pre3": { - "lane0": "0xfffffffe", - "lane1": "0xfffffffe", - "lane2": "0xfffffffe", - "lane3": "0xfffffffe", - "lane4": "0xfffffffe", - "lane5": "0xfffffffe", - "lane6": "0xfffffffe", - "lane7": "0xfffffffe" - }, - "pre2": { - "lane0": "0x00000008", - "lane1": "0x00000008", - "lane2": "0x00000008", + }, + "OPTICAL50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff7", + "lane1": "0xfffffff7", + "lane2": "0xfffffff7", + "lane3": "0xfffffff7", + "lane4": "0xfffffff7", + "lane5": "0xfffffff7", + "lane6": "0xfffffff7", + "lane7": "0xfffffff7" + }, + "main": { + "lane0": "0x9e", + "lane1": "0x9e", + "lane2": "0x9e", + "lane3": "0x9e", + "lane4": "0x9e", + "lane5": "0x9e", + "lane6": "0x9e", + "lane7": "0x9e" + }, + "post1": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xffffffff" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x0" + } + }, + "OPTICAL25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "main": { + "lane0": "0x63", + "lane1": "0x63", + "lane2": "0x63", + "lane3": "0x63", + "lane4": "0x63", + "lane5": "0x63", + "lane6": "0x63", + "lane7": "0x63" + }, + "post1": { + "lane0": "0xffffffea", + "lane1": "0xffffffea", + "lane2": "0xffffffea", + "lane3": "0xffffffea", + "lane4": "0xffffffea", + "lane5": "0xffffffea", + "lane6": "0xffffffea", + "lane7": "0xffffffea" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x0" + } + }, + "COPPER50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x4", + "lane1": "0x4", + "lane2": "0x4", + "lane3": "0x4", + "lane4": "0x4", + "lane5": "0x4", + "lane6": "0x4", + "lane7": "0x4" + }, + "pre1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x0" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "main": { + "lane0": "0x6b", + "lane1": "0x6b", + "lane2": "0x6b", + "lane3": "0x6b", + "lane4": "0x6b", + "lane5": "0x6b", + "lane6": "0x6b", + "lane7": "0x6b" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x0" + } + }, + "Default": { + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x0" + } + } + }, + "4": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { + "pre3": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "pre2": { + "lane0": "0x00000008", + "lane1": "0x00000008", + "lane2": "0x00000008", "lane3": "0x00000008", "lane4": "0x00000008", "lane5": "0x00000008", @@ -931,7 +2011,67 @@ } } }, - "Default": { + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": "0x6", + "lane5": "0x6", + "lane6": "0x6", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, "rxpolarity": { "lane0": "0x1", "lane1": "0x0", @@ -942,86 +2082,386 @@ "lane6": "0x1", "lane7": "0x0" } - } - }, - "5": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1)": { - "speed:100GAUI-1-S|800G.*": { - "pre3": { - "lane0": "0xfffffffe", - "lane1": "0xfffffffe", - "lane2": "0xfffffffe", - "lane3": "0xfffffffe", - "lane4": "0xfffffffe", - "lane5": "0xfffffffe", - "lane6": "0xfffffffe", - "lane7": "0xfffffffe" - }, - "pre2": { - "lane0": "0x00000008", - "lane1": "0x00000008", - "lane2": "0x00000008", - "lane3": "0x00000008", - "lane4": "0x00000008", - "lane5": "0x00000008", - "lane6": "0x00000008", - "lane7": "0x00000008" - }, - "pre1": { - "lane0": "0xffffffe3", - "lane1": "0xffffffe3", - "lane2": "0xffffffe3", - "lane3": "0xffffffe3", - "lane4": "0xffffffe3", - "lane5": "0xffffffe3", - "lane6": "0xffffffe3", - "lane7": "0xffffffe3" - }, - "main": { - "lane0": "0x0000005d", - "lane1": "0x0000005d", - "lane2": "0x0000005d", - "lane3": "0x0000005d", - "lane4": "0x0000005d", - "lane5": "0x0000005d", - "lane6": "0x0000005d", - "lane7": "0x0000005d" - }, - "post1": { - "lane0": "0xfffffff3", - "lane1": "0xfffffff3", - "lane2": "0xfffffff3", - "lane3": "0xfffffff3", - "lane4": "0xfffffff3", - "lane5": "0xfffffff3", - "lane6": "0xfffffff3", - "lane7": "0xfffffff3" - }, - "post2": { - "lane0": "0xfffffff5", - "lane1": "0xfffffff5", - "lane2": "0xfffffff5", - "lane3": "0xfffffff5", - "lane4": "0xfffffff5", - "lane5": "0xfffffff5", - "lane6": "0xfffffff5", - "lane7": "0xfffffff5" - }, - "rxpolarity": { - "lane0": "0x0", - "lane1": "0x0", - "lane2": "0x1", - "lane3": "0x1", - "lane4": "0x0", - "lane5": "0x1", - "lane6": "0x1", - "lane7": "0x0" - } - } }, - "EOPTOLINK-EOLO138HG5HSDLC": { - "speed:100GAUI-1-S|800G.*": { - "pre3": { + "OPTICAL50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x1", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x1", + "lane5": "0x1", + "lane6": "0x1", + "lane7": "0x1" + }, + "pre1": { + "lane0": "0xfffffff3", + "lane1": "0xfffffff3", + "lane2": "0xfffffff3", + "lane3": "0xfffffff3", + "lane4": "0xfffffff3", + "lane5": "0xfffffff3", + "lane6": "0xfffffff3", + "lane7": "0xfffffff3" + }, + "main": { + "lane0": "0x98", + "lane1": "0x98", + "lane2": "0x98", + "lane3": "0x98", + "lane4": "0x98", + "lane5": "0x98", + "lane6": "0x98", + "lane7": "0x98" + }, + "post1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post2": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x0" + } + }, + "OPTICAL25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "main": { + "lane0": "0x67", + "lane1": "0x67", + "lane2": "0x67", + "lane3": "0x67", + "lane4": "0x67", + "lane5": "0x67", + "lane6": "0x67", + "lane7": "0x67" + }, + "post1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x0" + } + }, + "COPPER50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x4", + "lane1": "0x4", + "lane2": "0x4", + "lane3": "0x4", + "lane4": "0x4", + "lane5": "0x4", + "lane6": "0x4", + "lane7": "0x4" + }, + "pre1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x0" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "main": { + "lane0": "0x6b", + "lane1": "0x6b", + "lane2": "0x6b", + "lane3": "0x6b", + "lane4": "0x6b", + "lane5": "0x6b", + "lane6": "0x6b", + "lane7": "0x6b" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x0" + } + }, + "Default": { + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x0" + } + } + }, + "5": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { + "pre3": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "pre2": { + "lane0": "0x00000008", + "lane1": "0x00000008", + "lane2": "0x00000008", + "lane3": "0x00000008", + "lane4": "0x00000008", + "lane5": "0x00000008", + "lane6": "0x00000008", + "lane7": "0x00000008" + }, + "pre1": { + "lane0": "0xffffffe3", + "lane1": "0xffffffe3", + "lane2": "0xffffffe3", + "lane3": "0xffffffe3", + "lane4": "0xffffffe3", + "lane5": "0xffffffe3", + "lane6": "0xffffffe3", + "lane7": "0xffffffe3" + }, + "main": { + "lane0": "0x0000005d", + "lane1": "0x0000005d", + "lane2": "0x0000005d", + "lane3": "0x0000005d", + "lane4": "0x0000005d", + "lane5": "0x0000005d", + "lane6": "0x0000005d", + "lane7": "0x0000005d" + }, + "post1": { + "lane0": "0xfffffff3", + "lane1": "0xfffffff3", + "lane2": "0xfffffff3", + "lane3": "0xfffffff3", + "lane4": "0xfffffff3", + "lane5": "0xfffffff3", + "lane6": "0xfffffff3", + "lane7": "0xfffffff3" + }, + "post2": { + "lane0": "0xfffffff5", + "lane1": "0xfffffff5", + "lane2": "0xfffffff5", + "lane3": "0xfffffff5", + "lane4": "0xfffffff5", + "lane5": "0xfffffff5", + "lane6": "0xfffffff5", + "lane7": "0xfffffff5" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x1", + "lane7": "0x0" + } + } + }, + "EOPTOLINK-EOLO138HG5HSDLC": { + "speed:100GAUI-1-S|800G.*": { + "pre3": { "lane0": "0xfffffffe", "lane1": "0xfffffffe", "lane2": "0xfffffffe", @@ -1167,7 +2607,67 @@ } } }, - "Default": { + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": "0x6", + "lane5": "0x6", + "lane6": "0x6", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xfffffff0", + "lane1": "0xfffffff0", + "lane2": "0xfffffff0", + "lane3": "0xfffffff0", + "lane4": "0xfffffff0", + "lane5": "0xfffffff0", + "lane6": "0xfffffff0", + "lane7": "0xfffffff0" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, "rxpolarity": { "lane0": "0x0", "lane1": "0x0", @@ -1178,25 +2678,325 @@ "lane6": "0x1", "lane7": "0x0" } - } - }, - "6": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1)": { - "speed:100GAUI-1-S|800G.*": { - "pre3": { - "lane0": "0xfffffffe", - "lane1": "0xfffffffe", - "lane2": "0xfffffffe", - "lane3": "0xfffffffe", - "lane4": "0xfffffffe", - "lane5": "0xfffffffe", - "lane6": "0xfffffffe", - "lane7": "0xfffffffe" - }, - "pre2": { - "lane0": "0x00000008", - "lane1": "0x00000008", - "lane2": "0x00000008", + }, + "OPTICAL50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffb", + "lane1": "0xfffffffb", + "lane2": "0xfffffffb", + "lane3": "0xfffffffb", + "lane4": "0xfffffffb", + "lane5": "0xfffffffb", + "lane6": "0xfffffffb", + "lane7": "0xfffffffb" + }, + "main": { + "lane0": "0xa2", + "lane1": "0xa2", + "lane2": "0xa2", + "lane3": "0xa2", + "lane4": "0xa2", + "lane5": "0xa2", + "lane6": "0xa2", + "lane7": "0xa2" + }, + "post1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post2": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xffffffff" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x1", + "lane7": "0x0" + } + }, + "OPTICAL25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "main": { + "lane0": "0x66", + "lane1": "0x66", + "lane2": "0x66", + "lane3": "0x66", + "lane4": "0x66", + "lane5": "0x66", + "lane6": "0x66", + "lane7": "0x66" + }, + "post1": { + "lane0": "0xffffffed", + "lane1": "0xffffffed", + "lane2": "0xffffffed", + "lane3": "0xffffffed", + "lane4": "0xffffffed", + "lane5": "0xffffffed", + "lane6": "0xffffffed", + "lane7": "0xffffffed" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x1", + "lane7": "0x0" + } + }, + "COPPER50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x4", + "lane1": "0x4", + "lane2": "0x4", + "lane3": "0x4", + "lane4": "0x4", + "lane5": "0x4", + "lane6": "0x4", + "lane7": "0x4" + }, + "pre1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x1", + "lane7": "0x0" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "main": { + "lane0": "0x6b", + "lane1": "0x6b", + "lane2": "0x6b", + "lane3": "0x6b", + "lane4": "0x6b", + "lane5": "0x6b", + "lane6": "0x6b", + "lane7": "0x6b" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x1", + "lane7": "0x0" + } + }, + "Default": { + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x1", + "lane7": "0x0" + } + } + }, + "6": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { + "pre3": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "pre2": { + "lane0": "0x00000008", + "lane1": "0x00000008", + "lane2": "0x00000008", "lane3": "0x00000008", "lane4": "0x00000008", "lane5": "0x00000008", @@ -1403,7 +3203,67 @@ } } }, - "Default": { + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": "0x6", + "lane5": "0x6", + "lane6": "0x6", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe4", + "lane3": "0xffffffe8", + "lane4": "0xffffffe4", + "lane5": "0xffffffe8", + "lane6": "0xffffffe4", + "lane7": "0xffffffe8" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xfffffff0", + "lane3": "0xffffffec", + "lane4": "0xfffffff0", + "lane5": "0xffffffec", + "lane6": "0xfffffff0", + "lane7": "0xffffffec" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, "rxpolarity": { "lane0": "0x0", "lane1": "0x0", @@ -1414,86 +3274,386 @@ "lane6": "0x1", "lane7": "0x0" } - } - }, - "7": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1)": { - "speed:100GAUI-1-S|800G.*": { - "pre3": { - "lane0": "0xfffffffd", - "lane1": "0xfffffffd", - "lane2": "0xfffffffd", - "lane3": "0xfffffffd", - "lane4": "0xfffffffd", - "lane5": "0xfffffffd", - "lane6": "0xfffffffd", - "lane7": "0xfffffffd" - }, - "pre2": { - "lane0": "0x00000008", - "lane1": "0x00000008", - "lane2": "0x00000008", - "lane3": "0x00000008", - "lane4": "0x00000008", - "lane5": "0x00000008", - "lane6": "0x00000008", - "lane7": "0x00000008" - }, - "pre1": { - "lane0": "0xffffffe4", - "lane1": "0xffffffe4", - "lane2": "0xffffffe4", - "lane3": "0xffffffe4", - "lane4": "0xffffffe4", - "lane5": "0xffffffe4", - "lane6": "0xffffffe4", - "lane7": "0xffffffe4" - }, - "main": { - "lane0": "0x0000005a", - "lane1": "0x0000005a", - "lane2": "0x0000005a", - "lane3": "0x0000005a", - "lane4": "0x0000005a", - "lane5": "0x0000005a", - "lane6": "0x0000005a", - "lane7": "0x0000005a" - }, - "post1": { - "lane0": "0xfffffff3", - "lane1": "0xfffffff3", - "lane2": "0xfffffff3", - "lane3": "0xfffffff3", - "lane4": "0xfffffff3", - "lane5": "0xfffffff3", - "lane6": "0xfffffff3", - "lane7": "0xfffffff3" - }, - "post2": { - "lane0": "0xfffffff3", - "lane1": "0xfffffff3", - "lane2": "0xfffffff3", - "lane3": "0xfffffff3", - "lane4": "0xfffffff3", - "lane5": "0xfffffff3", - "lane6": "0xfffffff3", - "lane7": "0xfffffff3" - }, - "rxpolarity": { - "lane0": "0x1", - "lane1": "0x1", - "lane2": "0x1", - "lane3": "0x0", - "lane4": "0x1", - "lane5": "0x0", - "lane6": "0x0", - "lane7": "0x1" - } - } }, - "EOPTOLINK-EOLO138HG5HSDLC": { - "speed:100GAUI-1-S|800G.*": { - "pre3": { + "OPTICAL50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffb", + "lane4": "0xfffffffb", + "lane5": "0xfffffffb", + "lane6": "0xfffffffa", + "lane7": "0xfffffffb" + }, + "main": { + "lane0": "0x9f", + "lane1": "0x9f", + "lane2": "0x9f", + "lane3": "0xa2", + "lane4": "0xa2", + "lane5": "0xa2", + "lane6": "0x9f", + "lane7": "0xa2" + }, + "post1": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0xffffffff", + "lane7": "0x0" + }, + "post2": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xfffffffe", + "lane7": "0xffffffff" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x1", + "lane7": "0x0" + } + }, + "OPTICAL25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffe", + "lane7": "0xfffffffa" + }, + "main": { + "lane0": "0x66", + "lane1": "0x66", + "lane2": "0x66", + "lane3": "0x66", + "lane4": "0x66", + "lane5": "0x66", + "lane6": "0x66", + "lane7": "0x66" + }, + "post1": { + "lane0": "0xffffffe9", + "lane1": "0xffffffe9", + "lane2": "0xffffffe9", + "lane3": "0xffffffed", + "lane4": "0xffffffed", + "lane5": "0xffffffed", + "lane6": "0xffffffe9", + "lane7": "0xffffffed" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x1", + "lane7": "0x0" + } + }, + "COPPER50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x4", + "lane1": "0x4", + "lane2": "0x4", + "lane3": "0x4", + "lane4": "0x4", + "lane5": "0x4", + "lane6": "0x4", + "lane7": "0x4" + }, + "pre1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x1", + "lane7": "0x0" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "main": { + "lane0": "0x6b", + "lane1": "0x6b", + "lane2": "0x6b", + "lane3": "0x6b", + "lane4": "0x6b", + "lane5": "0x6b", + "lane6": "0x6b", + "lane7": "0x6b" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x1", + "lane7": "0x0" + } + }, + "Default": { + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x1", + "lane7": "0x0" + } + } + }, + "7": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { + "pre3": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "pre2": { + "lane0": "0x00000008", + "lane1": "0x00000008", + "lane2": "0x00000008", + "lane3": "0x00000008", + "lane4": "0x00000008", + "lane5": "0x00000008", + "lane6": "0x00000008", + "lane7": "0x00000008" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x0000005a", + "lane1": "0x0000005a", + "lane2": "0x0000005a", + "lane3": "0x0000005a", + "lane4": "0x0000005a", + "lane5": "0x0000005a", + "lane6": "0x0000005a", + "lane7": "0x0000005a" + }, + "post1": { + "lane0": "0xfffffff3", + "lane1": "0xfffffff3", + "lane2": "0xfffffff3", + "lane3": "0xfffffff3", + "lane4": "0xfffffff3", + "lane5": "0xfffffff3", + "lane6": "0xfffffff3", + "lane7": "0xfffffff3" + }, + "post2": { + "lane0": "0xfffffff3", + "lane1": "0xfffffff3", + "lane2": "0xfffffff3", + "lane3": "0xfffffff3", + "lane4": "0xfffffff3", + "lane5": "0xfffffff3", + "lane6": "0xfffffff3", + "lane7": "0xfffffff3" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x1" + } + } + }, + "EOPTOLINK-EOLO138HG5HSDLC": { + "speed:100GAUI-1-S|800G.*": { + "pre3": { "lane0": "0xfffffffd", "lane1": "0xfffffffd", "lane2": "0xfffffffd", @@ -1639,7 +3799,67 @@ } } }, - "Default": { + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": "0x6", + "lane5": "0x6", + "lane6": "0x6", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe8", + "lane4": "0xffffffe4", + "lane5": "0xffffffe8", + "lane6": "0xffffffe4", + "lane7": "0xffffffe8" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xfffffff0", + "lane1": "0xfffffff0", + "lane2": "0xfffffff0", + "lane3": "0xffffffec", + "lane4": "0xfffffff0", + "lane5": "0xffffffec", + "lane6": "0xfffffff0", + "lane7": "0xffffffec" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, "rxpolarity": { "lane0": "0x1", "lane1": "0x1", @@ -1650,29 +3870,329 @@ "lane6": "0x0", "lane7": "0x1" } - } - }, - "8": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1)": { - "speed:100GAUI-1-S|800G.*": { - "pre3": { - "lane0": "0xfffffffd", - "lane1": "0xfffffffd", - "lane2": "0xfffffffd", - "lane3": "0xfffffffd", - "lane4": "0xfffffffd", - "lane5": "0xfffffffd", - "lane6": "0xfffffffd", - "lane7": "0xfffffffd" - }, - "pre2": { - "lane0": "0x00000008", - "lane1": "0x00000008", - "lane2": "0x00000008", - "lane3": "0x00000008", - "lane4": "0x00000008", - "lane5": "0x00000008", - "lane6": "0x00000008", + }, + "OPTICAL50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x1", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x1", + "lane5": "0x1", + "lane6": "0x1", + "lane7": "0x1" + }, + "pre1": { + "lane0": "0xfffffff3", + "lane1": "0xfffffff3", + "lane2": "0xfffffff3", + "lane3": "0xfffffff3", + "lane4": "0xfffffff3", + "lane5": "0xfffffff3", + "lane6": "0xfffffff3", + "lane7": "0xfffffff3" + }, + "main": { + "lane0": "0x98", + "lane1": "0x98", + "lane2": "0x98", + "lane3": "0x98", + "lane4": "0x98", + "lane5": "0x98", + "lane6": "0x98", + "lane7": "0x98" + }, + "post1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post2": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x1" + } + }, + "OPTICAL25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "main": { + "lane0": "0x67", + "lane1": "0x67", + "lane2": "0x67", + "lane3": "0x67", + "lane4": "0x67", + "lane5": "0x67", + "lane6": "0x67", + "lane7": "0x67" + }, + "post1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x1" + } + }, + "COPPER50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x4", + "lane1": "0x4", + "lane2": "0x4", + "lane3": "0x4", + "lane4": "0x4", + "lane5": "0x4", + "lane6": "0x4", + "lane7": "0x4" + }, + "pre1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x1" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "main": { + "lane0": "0x6b", + "lane1": "0x6b", + "lane2": "0x6b", + "lane3": "0x6b", + "lane4": "0x6b", + "lane5": "0x6b", + "lane6": "0x6b", + "lane7": "0x6b" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x1" + } + }, + "Default": { + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x1" + } + } + }, + "8": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { + "pre3": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "pre2": { + "lane0": "0x00000008", + "lane1": "0x00000008", + "lane2": "0x00000008", + "lane3": "0x00000008", + "lane4": "0x00000008", + "lane5": "0x00000008", + "lane6": "0x00000008", "lane7": "0x00000008" }, "pre1": { @@ -1875,7 +4395,67 @@ } } }, - "Default": { + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": "0x6", + "lane5": "0x6", + "lane6": "0x6", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xfffffff0", + "lane1": "0xfffffff0", + "lane2": "0xfffffff0", + "lane3": "0xfffffff0", + "lane4": "0xfffffff0", + "lane5": "0xfffffff0", + "lane6": "0xfffffff0", + "lane7": "0xfffffff0" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, "rxpolarity": { "lane0": "0x0", "lane1": "0x1", @@ -1886,81 +4466,381 @@ "lane6": "0x1", "lane7": "0x1" } - } - }, - "9": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1)": { - "speed:100GAUI-1-S|800G.*": { - "pre3": { - "lane0": "0xffffffff", - "lane1": "0xffffffff", - "lane2": "0xffffffff", - "lane3": "0xffffffff", - "lane4": "0xffffffff", - "lane5": "0xffffffff", - "lane6": "0xffffffff", - "lane7": "0xffffffff" - }, - "pre2": { - "lane0": "0x00000006", - "lane1": "0x00000006", - "lane2": "0x00000006", - "lane3": "0x00000006", - "lane4": "0x00000006", - "lane5": "0x00000006", - "lane6": "0x00000006", - "lane7": "0x00000006" - }, - "pre1": { - "lane0": "0xffffffe6", - "lane1": "0xffffffe6", - "lane2": "0xffffffe6", - "lane3": "0xffffffe6", - "lane4": "0xffffffe6", - "lane5": "0xffffffe6", - "lane6": "0xffffffe6", - "lane7": "0xffffffe6" - }, - "main": { - "lane0": "0x00000068", - "lane1": "0x00000068", - "lane2": "0x00000068", - "lane3": "0x00000068", - "lane4": "0x00000068", - "lane5": "0x00000068", - "lane6": "0x00000068", - "lane7": "0x00000068" - }, - "post1": { - "lane0": "0xfffffffa", - "lane1": "0xfffffffa", - "lane2": "0xfffffffa", - "lane3": "0xfffffffa", - "lane4": "0xfffffffa", - "lane5": "0xfffffffa", - "lane6": "0xfffffffa", - "lane7": "0xfffffffa" - }, - "post2": { - "lane0": "0xfffffff2", - "lane1": "0xfffffff2", - "lane2": "0xfffffff2", - "lane3": "0xfffffff2", - "lane4": "0xfffffff2", - "lane5": "0xfffffff2", - "lane6": "0xfffffff2", - "lane7": "0xfffffff2" - }, - "rxpolarity": { - "lane0": "0x0", - "lane1": "0x0", - "lane2": "0x1", - "lane3": "0x1", - "lane4": "0x0", - "lane5": "0x1", - "lane6": "0x1", - "lane7": "0x0" - } + }, + "OPTICAL50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x1", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x1", + "lane5": "0x1", + "lane6": "0x1", + "lane7": "0x1" + }, + "pre1": { + "lane0": "0xfffffff3", + "lane1": "0xfffffff3", + "lane2": "0xfffffff3", + "lane3": "0xfffffff3", + "lane4": "0xfffffff3", + "lane5": "0xfffffff3", + "lane6": "0xfffffff3", + "lane7": "0xfffffff3" + }, + "main": { + "lane0": "0x98", + "lane1": "0x98", + "lane2": "0x98", + "lane3": "0x98", + "lane4": "0x98", + "lane5": "0x98", + "lane6": "0x98", + "lane7": "0x98" + }, + "post1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post2": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "OPTICAL25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "main": { + "lane0": "0x67", + "lane1": "0x67", + "lane2": "0x67", + "lane3": "0x67", + "lane4": "0x67", + "lane5": "0x67", + "lane6": "0x67", + "lane7": "0x67" + }, + "post1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "COPPER50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x4", + "lane1": "0x4", + "lane2": "0x4", + "lane3": "0x4", + "lane4": "0x4", + "lane5": "0x4", + "lane6": "0x4", + "lane7": "0x4" + }, + "pre1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "main": { + "lane0": "0x6b", + "lane1": "0x6b", + "lane2": "0x6b", + "lane3": "0x6b", + "lane4": "0x6b", + "lane5": "0x6b", + "lane6": "0x6b", + "lane7": "0x6b" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "Default": { + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + } + }, + "9": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { + "pre3": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xffffffff" + }, + "pre2": { + "lane0": "0x00000006", + "lane1": "0x00000006", + "lane2": "0x00000006", + "lane3": "0x00000006", + "lane4": "0x00000006", + "lane5": "0x00000006", + "lane6": "0x00000006", + "lane7": "0x00000006" + }, + "pre1": { + "lane0": "0xffffffe6", + "lane1": "0xffffffe6", + "lane2": "0xffffffe6", + "lane3": "0xffffffe6", + "lane4": "0xffffffe6", + "lane5": "0xffffffe6", + "lane6": "0xffffffe6", + "lane7": "0xffffffe6" + }, + "main": { + "lane0": "0x00000068", + "lane1": "0x00000068", + "lane2": "0x00000068", + "lane3": "0x00000068", + "lane4": "0x00000068", + "lane5": "0x00000068", + "lane6": "0x00000068", + "lane7": "0x00000068" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x1", + "lane7": "0x0" + } } }, "EOPTOLINK-EOLO138HG5HSDLC": { @@ -2111,7 +4991,67 @@ } } }, - "Default": { + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": "0x6", + "lane5": "0x6", + "lane6": "0x6", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x80", + "lane1": "0x80", + "lane2": "0x80", + "lane3": "0x80", + "lane4": "0x80", + "lane5": "0x80", + "lane6": "0x80", + "lane7": "0x80" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, "rxpolarity": { "lane0": "0x0", "lane1": "0x0", @@ -2122,29 +5062,329 @@ "lane6": "0x1", "lane7": "0x0" } - } - }, - "10": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1)": { - "speed:100GAUI-1-S|800G.*": { - "pre3": { - "lane0": "0xffffffff", - "lane1": "0xffffffff", - "lane2": "0xffffffff", - "lane3": "0xffffffff", - "lane4": "0xffffffff", - "lane5": "0xffffffff", - "lane6": "0xffffffff", - "lane7": "0xffffffff" - }, - "pre2": { - "lane0": "0x00000006", - "lane1": "0x00000006", - "lane2": "0x00000006", - "lane3": "0x00000006", - "lane4": "0x00000006", - "lane5": "0x00000006", - "lane6": "0x00000006", + }, + "OPTICAL50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffb", + "lane1": "0xfffffffb", + "lane2": "0xfffffffb", + "lane3": "0xfffffffb", + "lane4": "0xfffffffb", + "lane5": "0xfffffffb", + "lane6": "0xfffffffb", + "lane7": "0xfffffffb" + }, + "main": { + "lane0": "0xa2", + "lane1": "0xa2", + "lane2": "0xa2", + "lane3": "0xa2", + "lane4": "0xa2", + "lane5": "0xa2", + "lane6": "0xa2", + "lane7": "0xa2" + }, + "post1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post2": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xffffffff" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x1", + "lane7": "0x0" + } + }, + "OPTICAL25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "main": { + "lane0": "0x66", + "lane1": "0x66", + "lane2": "0x66", + "lane3": "0x66", + "lane4": "0x66", + "lane5": "0x66", + "lane6": "0x66", + "lane7": "0x66" + }, + "post1": { + "lane0": "0xffffffed", + "lane1": "0xffffffed", + "lane2": "0xffffffed", + "lane3": "0xffffffed", + "lane4": "0xffffffed", + "lane5": "0xffffffed", + "lane6": "0xffffffed", + "lane7": "0xffffffed" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x1", + "lane7": "0x0" + } + }, + "COPPER50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x4", + "lane1": "0x4", + "lane2": "0x4", + "lane3": "0x4", + "lane4": "0x4", + "lane5": "0x4", + "lane6": "0x4", + "lane7": "0x4" + }, + "pre1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x1", + "lane7": "0x0" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "main": { + "lane0": "0x6b", + "lane1": "0x6b", + "lane2": "0x6b", + "lane3": "0x6b", + "lane4": "0x6b", + "lane5": "0x6b", + "lane6": "0x6b", + "lane7": "0x6b" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x1", + "lane7": "0x0" + } + }, + "Default": { + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x1", + "lane7": "0x0" + } + } + }, + "10": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { + "pre3": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xffffffff" + }, + "pre2": { + "lane0": "0x00000006", + "lane1": "0x00000006", + "lane2": "0x00000006", + "lane3": "0x00000006", + "lane4": "0x00000006", + "lane5": "0x00000006", + "lane6": "0x00000006", "lane7": "0x00000006" }, "pre1": { @@ -2347,7 +5587,67 @@ } } }, - "Default": { + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": "0x6", + "lane5": "0x6", + "lane6": "0x6", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xfffffff0", + "lane1": "0xfffffff0", + "lane2": "0xfffffff0", + "lane3": "0xfffffff0", + "lane4": "0xfffffff0", + "lane5": "0xfffffff0", + "lane6": "0xfffffff0", + "lane7": "0xfffffff0" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, "rxpolarity": { "lane0": "0x0", "lane1": "0x0", @@ -2358,81 +5658,381 @@ "lane6": "0x1", "lane7": "0x0" } - } - }, - "11": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1)": { - "speed:100GAUI-1-S|800G.*": { - "pre3": { - "lane0": "0xfffffffe", - "lane1": "0xfffffffe", - "lane2": "0xfffffffe", - "lane3": "0xfffffffe", - "lane4": "0xfffffffe", - "lane5": "0xfffffffe", - "lane6": "0xfffffffe", - "lane7": "0xfffffffe" - }, - "pre2": { - "lane0": "0x00000007", - "lane1": "0x00000007", - "lane2": "0x00000007", - "lane3": "0x00000007", - "lane4": "0x00000007", - "lane5": "0x00000007", - "lane6": "0x00000007", - "lane7": "0x00000007" - }, - "pre1": { - "lane0": "0xffffffe5", - "lane1": "0xffffffe5", - "lane2": "0xffffffe5", - "lane3": "0xffffffe5", - "lane4": "0xffffffe5", - "lane5": "0xffffffe5", - "lane6": "0xffffffe5", - "lane7": "0xffffffe5" - }, - "main": { - "lane0": "0x0000005c", - "lane1": "0x0000005c", - "lane2": "0x0000005c", - "lane3": "0x0000005c", - "lane4": "0x0000005c", - "lane5": "0x0000005c", - "lane6": "0x0000005c", - "lane7": "0x0000005c" - }, - "post1": { - "lane0": "0xfffffff3", - "lane1": "0xfffffff3", - "lane2": "0xfffffff3", - "lane3": "0xfffffff3", - "lane4": "0xfffffff3", - "lane5": "0xfffffff3", - "lane6": "0xfffffff3", - "lane7": "0xfffffff3" - }, - "post2": { - "lane0": "0xfffffff4", - "lane1": "0xfffffff4", - "lane2": "0xfffffff4", - "lane3": "0xfffffff4", - "lane4": "0xfffffff4", - "lane5": "0xfffffff4", - "lane6": "0xfffffff4", - "lane7": "0xfffffff4" - }, - "rxpolarity": { - "lane0": "0x0", - "lane1": "0x1", - "lane2": "0x1", - "lane3": "0x0", - "lane4": "0x0", - "lane5": "0x0", - "lane6": "0x1", - "lane7": "0x1" - } + }, + "OPTICAL50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffb", + "lane1": "0xfffffffb", + "lane2": "0xfffffffb", + "lane3": "0xfffffffb", + "lane4": "0xfffffffb", + "lane5": "0xfffffffb", + "lane6": "0xfffffffb", + "lane7": "0xfffffffb" + }, + "main": { + "lane0": "0xa2", + "lane1": "0xa2", + "lane2": "0xa2", + "lane3": "0xa2", + "lane4": "0xa2", + "lane5": "0xa2", + "lane6": "0xa2", + "lane7": "0xa2" + }, + "post1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post2": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xffffffff" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x1", + "lane7": "0x0" + } + }, + "OPTICAL25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "main": { + "lane0": "0x66", + "lane1": "0x66", + "lane2": "0x66", + "lane3": "0x66", + "lane4": "0x66", + "lane5": "0x66", + "lane6": "0x66", + "lane7": "0x66" + }, + "post1": { + "lane0": "0xffffffed", + "lane1": "0xffffffed", + "lane2": "0xffffffed", + "lane3": "0xffffffed", + "lane4": "0xffffffed", + "lane5": "0xffffffed", + "lane6": "0xffffffed", + "lane7": "0xffffffed" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x1", + "lane7": "0x0" + } + }, + "COPPER50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x4", + "lane1": "0x4", + "lane2": "0x4", + "lane3": "0x4", + "lane4": "0x4", + "lane5": "0x4", + "lane6": "0x4", + "lane7": "0x4" + }, + "pre1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x1", + "lane7": "0x0" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "main": { + "lane0": "0x6b", + "lane1": "0x6b", + "lane2": "0x6b", + "lane3": "0x6b", + "lane4": "0x6b", + "lane5": "0x6b", + "lane6": "0x6b", + "lane7": "0x6b" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x1", + "lane7": "0x0" + } + }, + "Default": { + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x1", + "lane7": "0x0" + } + } + }, + "11": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { + "pre3": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "pre2": { + "lane0": "0x00000007", + "lane1": "0x00000007", + "lane2": "0x00000007", + "lane3": "0x00000007", + "lane4": "0x00000007", + "lane5": "0x00000007", + "lane6": "0x00000007", + "lane7": "0x00000007" + }, + "pre1": { + "lane0": "0xffffffe5", + "lane1": "0xffffffe5", + "lane2": "0xffffffe5", + "lane3": "0xffffffe5", + "lane4": "0xffffffe5", + "lane5": "0xffffffe5", + "lane6": "0xffffffe5", + "lane7": "0xffffffe5" + }, + "main": { + "lane0": "0x0000005c", + "lane1": "0x0000005c", + "lane2": "0x0000005c", + "lane3": "0x0000005c", + "lane4": "0x0000005c", + "lane5": "0x0000005c", + "lane6": "0x0000005c", + "lane7": "0x0000005c" + }, + "post1": { + "lane0": "0xfffffff3", + "lane1": "0xfffffff3", + "lane2": "0xfffffff3", + "lane3": "0xfffffff3", + "lane4": "0xfffffff3", + "lane5": "0xfffffff3", + "lane6": "0xfffffff3", + "lane7": "0xfffffff3" + }, + "post2": { + "lane0": "0xfffffff4", + "lane1": "0xfffffff4", + "lane2": "0xfffffff4", + "lane3": "0xfffffff4", + "lane4": "0xfffffff4", + "lane5": "0xfffffff4", + "lane6": "0xfffffff4", + "lane7": "0xfffffff4" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } } }, "EOPTOLINK-EOLO138HG5HSDLC": { @@ -2583,7 +6183,67 @@ } } }, - "Default": { + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": "0x6", + "lane5": "0x6", + "lane6": "0x6", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x80", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xfffffff0", + "lane1": "0xfffffff0", + "lane2": "0xfffffff8", + "lane3": "0xfffffff0", + "lane4": "0xfffffff0", + "lane5": "0xfffffff0", + "lane6": "0xfffffff0", + "lane7": "0xfffffff0" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, "rxpolarity": { "lane0": "0x0", "lane1": "0x1", @@ -2594,29 +6254,329 @@ "lane6": "0x1", "lane7": "0x1" } - } - }, - "12": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1)": { - "speed:100GAUI-1-S|800G.*": { - "pre3": { - "lane0": "0xfffffffe", - "lane1": "0xfffffffe", - "lane2": "0xfffffffe", - "lane3": "0xfffffffe", - "lane4": "0xfffffffe", - "lane5": "0xfffffffe", - "lane6": "0xfffffffe", - "lane7": "0xfffffffe" - }, - "pre2": { - "lane0": "0x00000007", - "lane1": "0x00000007", - "lane2": "0x00000007", - "lane3": "0x00000007", - "lane4": "0x00000007", - "lane5": "0x00000007", - "lane6": "0x00000007", + }, + "OPTICAL50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x1", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x1", + "lane5": "0x1", + "lane6": "0x1", + "lane7": "0x1" + }, + "pre1": { + "lane0": "0xfffffff3", + "lane1": "0xfffffff3", + "lane2": "0xfffffff3", + "lane3": "0xfffffff3", + "lane4": "0xfffffff3", + "lane5": "0xfffffff3", + "lane6": "0xfffffff3", + "lane7": "0xfffffff3" + }, + "main": { + "lane0": "0x98", + "lane1": "0x98", + "lane2": "0x98", + "lane3": "0x98", + "lane4": "0x98", + "lane5": "0x98", + "lane6": "0x98", + "lane7": "0x98" + }, + "post1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post2": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "OPTICAL25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "main": { + "lane0": "0x67", + "lane1": "0x67", + "lane2": "0x67", + "lane3": "0x67", + "lane4": "0x67", + "lane5": "0x67", + "lane6": "0x67", + "lane7": "0x67" + }, + "post1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "COPPER50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x4", + "lane1": "0x4", + "lane2": "0x4", + "lane3": "0x4", + "lane4": "0x4", + "lane5": "0x4", + "lane6": "0x4", + "lane7": "0x4" + }, + "pre1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "main": { + "lane0": "0x6b", + "lane1": "0x6b", + "lane2": "0x6b", + "lane3": "0x6b", + "lane4": "0x6b", + "lane5": "0x6b", + "lane6": "0x6b", + "lane7": "0x6b" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "Default": { + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + } + }, + "12": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { + "pre3": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "pre2": { + "lane0": "0x00000007", + "lane1": "0x00000007", + "lane2": "0x00000007", + "lane3": "0x00000007", + "lane4": "0x00000007", + "lane5": "0x00000007", + "lane6": "0x00000007", "lane7": "0x00000007" }, "pre1": { @@ -2819,7 +6779,67 @@ } } }, - "Default": { + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": "0x6", + "lane5": "0x6", + "lane6": "0x6", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x80", + "lane1": "0x80", + "lane2": "0x80", + "lane3": "0x80", + "lane4": "0x80", + "lane5": "0x80", + "lane6": "0x80", + "lane7": "0x80" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, "rxpolarity": { "lane0": "0x0", "lane1": "0x1", @@ -2830,81 +6850,381 @@ "lane6": "0x1", "lane7": "0x1" } - } - }, - "13": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1)": { - "speed:100GAUI-1-S|800G.*": { - "pre3": { - "lane0": "0xfffffffe", - "lane1": "0xfffffffe", - "lane2": "0xfffffffe", - "lane3": "0xfffffffe", - "lane4": "0xfffffffe", - "lane5": "0xfffffffe", - "lane6": "0xfffffffe", - "lane7": "0xfffffffe" - }, - "pre2": { - "lane0": "0x00000007", - "lane1": "0x00000007", - "lane2": "0x00000007", - "lane3": "0x00000007", - "lane4": "0x00000007", - "lane5": "0x00000007", - "lane6": "0x00000007", - "lane7": "0x00000007" - }, - "pre1": { - "lane0": "0xffffffe5", - "lane1": "0xffffffe5", - "lane2": "0xffffffe5", - "lane3": "0xffffffe5", - "lane4": "0xffffffe5", - "lane5": "0xffffffe5", - "lane6": "0xffffffe5", - "lane7": "0xffffffe5" - }, - "main": { - "lane0": "0x0000005e", - "lane1": "0x0000005e", - "lane2": "0x0000005e", - "lane3": "0x0000005e", - "lane4": "0x0000005e", - "lane5": "0x0000005e", - "lane6": "0x0000005e", - "lane7": "0x0000005e" - }, - "post1": { - "lane0": "0xfffffff3", - "lane1": "0xfffffff3", - "lane2": "0xfffffff3", - "lane3": "0xfffffff3", - "lane4": "0xfffffff3", - "lane5": "0xfffffff3", - "lane6": "0xfffffff3", - "lane7": "0xfffffff3" - }, - "post2": { - "lane0": "0xfffffff5", - "lane1": "0xfffffff5", - "lane2": "0xfffffff5", - "lane3": "0xfffffff5", - "lane4": "0xfffffff5", - "lane5": "0xfffffff5", - "lane6": "0xfffffff5", - "lane7": "0xfffffff5" - }, - "rxpolarity": { - "lane0": "0x0", - "lane1": "0x0", - "lane2": "0x1", - "lane3": "0x1", - "lane4": "0x0", - "lane5": "0x1", - "lane6": "0x1", - "lane7": "0x0" - } + }, + "OPTICAL50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x0", + "lane7": "0x1" + }, + "pre1": { + "lane0": "0xfffffffb", + "lane1": "0xfffffffb", + "lane2": "0xfffffffb", + "lane3": "0xfffffffb", + "lane4": "0xfffffffb", + "lane5": "0xfffffff3", + "lane6": "0xfffffffb", + "lane7": "0xfffffff3" + }, + "main": { + "lane0": "0x9d", + "lane1": "0x9d", + "lane2": "0x9d", + "lane3": "0x9d", + "lane4": "0x9d", + "lane5": "0x98", + "lane6": "0x9d", + "lane7": "0x98" + }, + "post1": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0x0", + "lane6": "0xfffffffd", + "lane7": "0x0" + }, + "post2": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffe", + "lane6": "0xfffffffd", + "lane7": "0xfffffffe" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "OPTICAL25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff9", + "lane1": "0xfffffff9", + "lane2": "0xfffffff9", + "lane3": "0xfffffff9", + "lane4": "0xfffffff9", + "lane5": "0xfffffffc", + "lane6": "0xfffffff9", + "lane7": "0xfffffffc" + }, + "main": { + "lane0": "0x52", + "lane1": "0x52", + "lane2": "0x52", + "lane3": "0x52", + "lane4": "0x52", + "lane5": "0x67", + "lane6": "0x52", + "lane7": "0x67" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xffffffec", + "lane6": "0xfffffff8", + "lane7": "0xffffffec" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "COPPER50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x4", + "lane1": "0x4", + "lane2": "0x4", + "lane3": "0x4", + "lane4": "0x4", + "lane5": "0x4", + "lane6": "0x4", + "lane7": "0x4" + }, + "pre1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "main": { + "lane0": "0x6b", + "lane1": "0x6b", + "lane2": "0x6b", + "lane3": "0x6b", + "lane4": "0x6b", + "lane5": "0x6b", + "lane6": "0x6b", + "lane7": "0x6b" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "Default": { + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + } + }, + "13": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { + "pre3": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "pre2": { + "lane0": "0x00000007", + "lane1": "0x00000007", + "lane2": "0x00000007", + "lane3": "0x00000007", + "lane4": "0x00000007", + "lane5": "0x00000007", + "lane6": "0x00000007", + "lane7": "0x00000007" + }, + "pre1": { + "lane0": "0xffffffe5", + "lane1": "0xffffffe5", + "lane2": "0xffffffe5", + "lane3": "0xffffffe5", + "lane4": "0xffffffe5", + "lane5": "0xffffffe5", + "lane6": "0xffffffe5", + "lane7": "0xffffffe5" + }, + "main": { + "lane0": "0x0000005e", + "lane1": "0x0000005e", + "lane2": "0x0000005e", + "lane3": "0x0000005e", + "lane4": "0x0000005e", + "lane5": "0x0000005e", + "lane6": "0x0000005e", + "lane7": "0x0000005e" + }, + "post1": { + "lane0": "0xfffffff3", + "lane1": "0xfffffff3", + "lane2": "0xfffffff3", + "lane3": "0xfffffff3", + "lane4": "0xfffffff3", + "lane5": "0xfffffff3", + "lane6": "0xfffffff3", + "lane7": "0xfffffff3" + }, + "post2": { + "lane0": "0xfffffff5", + "lane1": "0xfffffff5", + "lane2": "0xfffffff5", + "lane3": "0xfffffff5", + "lane4": "0xfffffff5", + "lane5": "0xfffffff5", + "lane6": "0xfffffff5", + "lane7": "0xfffffff5" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x1", + "lane7": "0x0" + } } }, "EOPTOLINK-EOLO138HG5HSDLC": { @@ -3055,7 +7375,67 @@ } } }, - "Default": { + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": "0x6", + "lane5": "0x6", + "lane6": "0x6", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0", + "lane4": "0xffffffe0", + "lane5": "0xffffffe0", + "lane6": "0xffffffe0", + "lane7": "0xffffffe0" + }, + "main": { + "lane0": "0x80", + "lane1": "0x80", + "lane2": "0x80", + "lane3": "0x80", + "lane4": "0x80", + "lane5": "0x80", + "lane6": "0x80", + "lane7": "0x80" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, "rxpolarity": { "lane0": "0x0", "lane1": "0x0", @@ -3066,35 +7446,335 @@ "lane6": "0x1", "lane7": "0x0" } - } - }, - "14": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1)": { - "speed:100GAUI-1-S|800G.*": { - "pre3": { - "lane0": "0xfffffffe", - "lane1": "0xfffffffe", - "lane2": "0xfffffffe", - "lane3": "0xfffffffe", - "lane4": "0xfffffffe", - "lane5": "0xfffffffe", - "lane6": "0xfffffffe", - "lane7": "0xfffffffe" - }, - "pre2": { - "lane0": "0x00000007", - "lane1": "0x00000007", - "lane2": "0x00000007", - "lane3": "0x00000007", - "lane4": "0x00000007", - "lane5": "0x00000007", - "lane6": "0x00000007", - "lane7": "0x00000007" - }, - "pre1": { - "lane0": "0xffffffe5", - "lane1": "0xffffffe5", - "lane2": "0xffffffe5", + }, + "OPTICAL50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffb", + "lane1": "0xfffffffb", + "lane2": "0xfffffffb", + "lane3": "0xfffffffb", + "lane4": "0xfffffffb", + "lane5": "0xfffffffb", + "lane6": "0xfffffffb", + "lane7": "0xfffffffb" + }, + "main": { + "lane0": "0xa2", + "lane1": "0xa2", + "lane2": "0xa2", + "lane3": "0xa2", + "lane4": "0xa2", + "lane5": "0xa2", + "lane6": "0xa2", + "lane7": "0xa2" + }, + "post1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post2": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xffffffff" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x1", + "lane7": "0x0" + } + }, + "OPTICAL25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "main": { + "lane0": "0x66", + "lane1": "0x66", + "lane2": "0x66", + "lane3": "0x66", + "lane4": "0x66", + "lane5": "0x66", + "lane6": "0x66", + "lane7": "0x66" + }, + "post1": { + "lane0": "0xffffffed", + "lane1": "0xffffffed", + "lane2": "0xffffffed", + "lane3": "0xffffffed", + "lane4": "0xffffffed", + "lane5": "0xffffffed", + "lane6": "0xffffffed", + "lane7": "0xffffffed" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x1", + "lane7": "0x0" + } + }, + "COPPER50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x4", + "lane1": "0x4", + "lane2": "0x4", + "lane3": "0x4", + "lane4": "0x4", + "lane5": "0x4", + "lane6": "0x4", + "lane7": "0x4" + }, + "pre1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x1", + "lane7": "0x0" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "main": { + "lane0": "0x6b", + "lane1": "0x6b", + "lane2": "0x6b", + "lane3": "0x6b", + "lane4": "0x6b", + "lane5": "0x6b", + "lane6": "0x6b", + "lane7": "0x6b" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x1", + "lane7": "0x0" + } + }, + "Default": { + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x1", + "lane7": "0x0" + } + } + }, + "14": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { + "pre3": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "pre2": { + "lane0": "0x00000007", + "lane1": "0x00000007", + "lane2": "0x00000007", + "lane3": "0x00000007", + "lane4": "0x00000007", + "lane5": "0x00000007", + "lane6": "0x00000007", + "lane7": "0x00000007" + }, + "pre1": { + "lane0": "0xffffffe5", + "lane1": "0xffffffe5", + "lane2": "0xffffffe5", "lane3": "0xffffffe5", "lane4": "0xffffffe5", "lane5": "0xffffffe5", @@ -3291,7 +7971,67 @@ } } }, - "Default": { + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": "0x6", + "lane5": "0x6", + "lane6": "0x6", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x80", + "lane1": "0x80", + "lane2": "0x80", + "lane3": "0x80", + "lane4": "0x80", + "lane5": "0x80", + "lane6": "0x80", + "lane7": "0x80" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, "rxpolarity": { "lane0": "0x0", "lane1": "0x0", @@ -3302,75 +8042,375 @@ "lane6": "0x1", "lane7": "0x0" } - } - }, - "15": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1)": { - "speed:100GAUI-1-S|800G.*": { - "pre3": { - "lane0": "0xfffffffe", - "lane1": "0xfffffffe", - "lane2": "0xfffffffe", - "lane3": "0xfffffffe", - "lane4": "0xfffffffe", - "lane5": "0xfffffffe", - "lane6": "0xfffffffe", - "lane7": "0xfffffffe" - }, - "pre2": { - "lane0": "0x00000007", - "lane1": "0x00000007", - "lane2": "0x00000007", - "lane3": "0x00000007", - "lane4": "0x00000007", - "lane5": "0x00000007", - "lane6": "0x00000007", - "lane7": "0x00000007" - }, - "pre1": { - "lane0": "0xffffffe5", - "lane1": "0xffffffe5", - "lane2": "0xffffffe5", - "lane3": "0xffffffe5", - "lane4": "0xffffffe5", - "lane5": "0xffffffe5", - "lane6": "0xffffffe5", - "lane7": "0xffffffe5" - }, - "main": { - "lane0": "0x0000005f", - "lane1": "0x0000005f", - "lane2": "0x0000005f", - "lane3": "0x0000005f", - "lane4": "0x0000005f", - "lane5": "0x0000005f", - "lane6": "0x0000005f", - "lane7": "0x0000005f" - }, - "post1": { - "lane0": "0xfffffff5", - "lane1": "0xfffffff5", - "lane2": "0xfffffff5", - "lane3": "0xfffffff5", - "lane4": "0xfffffff5", - "lane5": "0xfffffff5", - "lane6": "0xfffffff5", - "lane7": "0xfffffff5" - }, - "post2": { - "lane0": "0xfffffff3", - "lane1": "0xfffffff3", - "lane2": "0xfffffff3", - "lane3": "0xfffffff3", - "lane4": "0xfffffff3", - "lane5": "0xfffffff3", - "lane6": "0xfffffff3", - "lane7": "0xfffffff3" - }, - "rxpolarity": { - "lane0": "0x0", - "lane1": "0x1", - "lane2": "0x1", + }, + "OPTICAL50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffb", + "lane2": "0xfffffffd", + "lane3": "0xfffffffb", + "lane4": "0xfffffffd", + "lane5": "0xfffffffb", + "lane6": "0xfffffffd", + "lane7": "0xfffffffb" + }, + "main": { + "lane0": "0xa3", + "lane1": "0xa2", + "lane2": "0xa3", + "lane3": "0xa2", + "lane4": "0xa3", + "lane5": "0xa2", + "lane6": "0xa3", + "lane7": "0xa2" + }, + "post1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post2": { + "lane0": "0xfffffffe", + "lane1": "0xffffffff", + "lane2": "0xfffffffe", + "lane3": "0xffffffff", + "lane4": "0xfffffffe", + "lane5": "0xffffffff", + "lane6": "0xfffffffe", + "lane7": "0xffffffff" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x1", + "lane7": "0x0" + } + }, + "OPTICAL25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "main": { + "lane0": "0x66", + "lane1": "0x66", + "lane2": "0x66", + "lane3": "0x66", + "lane4": "0x66", + "lane5": "0x66", + "lane6": "0x66", + "lane7": "0x66" + }, + "post1": { + "lane0": "0xffffffed", + "lane1": "0xffffffed", + "lane2": "0xffffffed", + "lane3": "0xffffffed", + "lane4": "0xffffffed", + "lane5": "0xffffffed", + "lane6": "0xffffffed", + "lane7": "0xffffffed" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x1", + "lane7": "0x0" + } + }, + "COPPER50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x4", + "lane1": "0x4", + "lane2": "0x4", + "lane3": "0x4", + "lane4": "0x4", + "lane5": "0x4", + "lane6": "0x4", + "lane7": "0x4" + }, + "pre1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x1", + "lane7": "0x0" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "main": { + "lane0": "0x6b", + "lane1": "0x6b", + "lane2": "0x6b", + "lane3": "0x6b", + "lane4": "0x6b", + "lane5": "0x6b", + "lane6": "0x6b", + "lane7": "0x6b" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x1", + "lane7": "0x0" + } + }, + "Default": { + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x1", + "lane7": "0x0" + } + } + }, + "15": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { + "pre3": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "pre2": { + "lane0": "0x00000007", + "lane1": "0x00000007", + "lane2": "0x00000007", + "lane3": "0x00000007", + "lane4": "0x00000007", + "lane5": "0x00000007", + "lane6": "0x00000007", + "lane7": "0x00000007" + }, + "pre1": { + "lane0": "0xffffffe5", + "lane1": "0xffffffe5", + "lane2": "0xffffffe5", + "lane3": "0xffffffe5", + "lane4": "0xffffffe5", + "lane5": "0xffffffe5", + "lane6": "0xffffffe5", + "lane7": "0xffffffe5" + }, + "main": { + "lane0": "0x0000005f", + "lane1": "0x0000005f", + "lane2": "0x0000005f", + "lane3": "0x0000005f", + "lane4": "0x0000005f", + "lane5": "0x0000005f", + "lane6": "0x0000005f", + "lane7": "0x0000005f" + }, + "post1": { + "lane0": "0xfffffff5", + "lane1": "0xfffffff5", + "lane2": "0xfffffff5", + "lane3": "0xfffffff5", + "lane4": "0xfffffff5", + "lane5": "0xfffffff5", + "lane6": "0xfffffff5", + "lane7": "0xfffffff5" + }, + "post2": { + "lane0": "0xfffffff3", + "lane1": "0xfffffff3", + "lane2": "0xfffffff3", + "lane3": "0xfffffff3", + "lane4": "0xfffffff3", + "lane5": "0xfffffff3", + "lane6": "0xfffffff3", + "lane7": "0xfffffff3" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x1", + "lane2": "0x1", "lane3": "0x0", "lane4": "0x0", "lane5": "0x0", @@ -3527,7 +8567,67 @@ } } }, - "Default": { + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": "0x6", + "lane5": "0x6", + "lane6": "0x6", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x80", + "lane1": "0x80", + "lane2": "0x80", + "lane3": "0x80", + "lane4": "0x80", + "lane5": "0x80", + "lane6": "0x80", + "lane7": "0x80" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, "rxpolarity": { "lane0": "0x0", "lane1": "0x1", @@ -3538,35 +8638,335 @@ "lane6": "0x1", "lane7": "0x1" } - } - }, - "16": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1)": { - "speed:100GAUI-1-S|800G.*": { - "pre3": { - "lane0": "0xfffffffe", - "lane1": "0xfffffffe", - "lane2": "0xfffffffe", - "lane3": "0xfffffffe", - "lane4": "0xfffffffe", - "lane5": "0xfffffffe", - "lane6": "0xfffffffe", - "lane7": "0xfffffffe" - }, - "pre2": { - "lane0": "0x00000007", - "lane1": "0x00000007", - "lane2": "0x00000007", - "lane3": "0x00000007", - "lane4": "0x00000007", - "lane5": "0x00000007", - "lane6": "0x00000007", - "lane7": "0x00000007" - }, - "pre1": { - "lane0": "0xffffffe5", - "lane1": "0xffffffe5", - "lane2": "0xffffffe5", + }, + "OPTICAL50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x1", + "lane2": "0x0", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x0", + "lane7": "0x1" + }, + "pre1": { + "lane0": "0xfffffffb", + "lane1": "0xfffffff3", + "lane2": "0xfffffffb", + "lane3": "0xfffffff3", + "lane4": "0xfffffffb", + "lane5": "0xfffffff3", + "lane6": "0xfffffffb", + "lane7": "0xfffffff3" + }, + "main": { + "lane0": "0x9d", + "lane1": "0x98", + "lane2": "0x9d", + "lane3": "0x98", + "lane4": "0x9d", + "lane5": "0x98", + "lane6": "0x9d", + "lane7": "0x98" + }, + "post1": { + "lane0": "0xfffffffd", + "lane1": "0x0", + "lane2": "0xfffffffd", + "lane3": "0x0", + "lane4": "0xfffffffd", + "lane5": "0x0", + "lane6": "0xfffffffd", + "lane7": "0x0" + }, + "post2": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffe", + "lane2": "0xfffffffd", + "lane3": "0xfffffffe", + "lane4": "0xfffffffd", + "lane5": "0xfffffffe", + "lane6": "0xfffffffd", + "lane7": "0xfffffffe" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "OPTICAL25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff9", + "lane1": "0xfffffffc", + "lane2": "0xfffffff9", + "lane3": "0xfffffffc", + "lane4": "0xfffffff9", + "lane5": "0xfffffffc", + "lane6": "0xfffffff9", + "lane7": "0xfffffffc" + }, + "main": { + "lane0": "0x52", + "lane1": "0x67", + "lane2": "0x52", + "lane3": "0x67", + "lane4": "0x52", + "lane5": "0x67", + "lane6": "0x52", + "lane7": "0x67" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xffffffec", + "lane2": "0xfffffff8", + "lane3": "0xffffffec", + "lane4": "0xfffffff8", + "lane5": "0xffffffec", + "lane6": "0xfffffff8", + "lane7": "0xffffffec" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "COPPER50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x4", + "lane1": "0x4", + "lane2": "0x4", + "lane3": "0x4", + "lane4": "0x4", + "lane5": "0x4", + "lane6": "0x4", + "lane7": "0x4" + }, + "pre1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "main": { + "lane0": "0x6b", + "lane1": "0x6b", + "lane2": "0x6b", + "lane3": "0x6b", + "lane4": "0x6b", + "lane5": "0x6b", + "lane6": "0x6b", + "lane7": "0x6b" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "Default": { + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + } + }, + "16": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { + "pre3": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "pre2": { + "lane0": "0x00000007", + "lane1": "0x00000007", + "lane2": "0x00000007", + "lane3": "0x00000007", + "lane4": "0x00000007", + "lane5": "0x00000007", + "lane6": "0x00000007", + "lane7": "0x00000007" + }, + "pre1": { + "lane0": "0xffffffe5", + "lane1": "0xffffffe5", + "lane2": "0xffffffe5", "lane3": "0xffffffe5", "lane4": "0xffffffe5", "lane5": "0xffffffe5", @@ -3763,7 +9163,67 @@ } } }, - "Default": { + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": "0x6", + "lane5": "0x6", + "lane6": "0x6", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0", + "lane4": "0xffffffe0", + "lane5": "0xffffffe0", + "lane6": "0xffffffe0", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x80", + "lane1": "0x80", + "lane2": "0x80", + "lane3": "0x80", + "lane4": "0x80", + "lane5": "0x80", + "lane6": "0x80", + "lane7": "0x80" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, "rxpolarity": { "lane0": "0x0", "lane1": "0x1", @@ -3774,79 +9234,379 @@ "lane6": "0x1", "lane7": "0x1" } - } - }, - "17": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1)": { - "speed:100GAUI-1-S|800G.*": { - "pre3": { - "lane0": "0xffffffff", - "lane1": "0xffffffff", - "lane2": "0xffffffff", - "lane3": "0xffffffff", - "lane4": "0xffffffff", - "lane5": "0xffffffff", - "lane6": "0xffffffff", - "lane7": "0xffffffff" - }, - "pre2": { - "lane0": "0x00000006", - "lane1": "0x00000006", - "lane2": "0x00000006", - "lane3": "0x00000006", - "lane4": "0x00000006", - "lane5": "0x00000006", - "lane6": "0x00000006", - "lane7": "0x00000006" - }, - "pre1": { - "lane0": "0xffffffea", - "lane1": "0xffffffea", - "lane2": "0xffffffea", - "lane3": "0xffffffea", - "lane4": "0xffffffea", - "lane5": "0xffffffea", - "lane6": "0xffffffea", - "lane7": "0xffffffea" - }, - "main": { - "lane0": "0x0000005c", - "lane1": "0x0000005c", - "lane2": "0x0000005c", - "lane3": "0x0000005c", - "lane4": "0x0000005c", - "lane5": "0x0000005c", - "lane6": "0x0000005c", - "lane7": "0x0000005c" - }, - "post1": { - "lane0": "0xfffffff9", - "lane1": "0xfffffff9", - "lane2": "0xfffffff9", - "lane3": "0xfffffff9", - "lane4": "0xfffffff9", - "lane5": "0xfffffff9", - "lane6": "0xfffffff9", - "lane7": "0xfffffff9" - }, - "post2": { - "lane0": "0xfffffff6", - "lane1": "0xfffffff6", - "lane2": "0xfffffff6", - "lane3": "0xfffffff6", - "lane4": "0xfffffff6", - "lane5": "0xfffffff6", - "lane6": "0xfffffff6", - "lane7": "0xfffffff6" - }, - "rxpolarity": { - "lane0": "0x0", - "lane1": "0x0", - "lane2": "0x0", - "lane3": "0x1", - "lane4": "0x0", - "lane5": "0x0", - "lane6": "0x0", + }, + "OPTICAL50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffb", + "lane1": "0xfffffffb", + "lane2": "0xfffffffb", + "lane3": "0xfffffffb", + "lane4": "0xfffffffb", + "lane5": "0xfffffffb", + "lane6": "0xfffffffb", + "lane7": "0xfffffffb" + }, + "main": { + "lane0": "0x9d", + "lane1": "0x9d", + "lane2": "0x9d", + "lane3": "0x9d", + "lane4": "0x9d", + "lane5": "0x9d", + "lane6": "0x9d", + "lane7": "0x9d" + }, + "post1": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "post2": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "OPTICAL25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff9", + "lane1": "0xfffffff9", + "lane2": "0xfffffff9", + "lane3": "0xfffffff9", + "lane4": "0xfffffff9", + "lane5": "0xfffffff9", + "lane6": "0xfffffff9", + "lane7": "0xfffffff9" + }, + "main": { + "lane0": "0x52", + "lane1": "0x52", + "lane2": "0x52", + "lane3": "0x52", + "lane4": "0x52", + "lane5": "0x52", + "lane6": "0x52", + "lane7": "0x52" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "COPPER50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x4", + "lane1": "0x4", + "lane2": "0x4", + "lane3": "0x4", + "lane4": "0x4", + "lane5": "0x4", + "lane6": "0x4", + "lane7": "0x4" + }, + "pre1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "main": { + "lane0": "0x6b", + "lane1": "0x6b", + "lane2": "0x6b", + "lane3": "0x6b", + "lane4": "0x6b", + "lane5": "0x6b", + "lane6": "0x6b", + "lane7": "0x6b" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "Default": { + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + } + }, + "17": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { + "pre3": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xffffffff" + }, + "pre2": { + "lane0": "0x00000006", + "lane1": "0x00000006", + "lane2": "0x00000006", + "lane3": "0x00000006", + "lane4": "0x00000006", + "lane5": "0x00000006", + "lane6": "0x00000006", + "lane7": "0x00000006" + }, + "pre1": { + "lane0": "0xffffffea", + "lane1": "0xffffffea", + "lane2": "0xffffffea", + "lane3": "0xffffffea", + "lane4": "0xffffffea", + "lane5": "0xffffffea", + "lane6": "0xffffffea", + "lane7": "0xffffffea" + }, + "main": { + "lane0": "0x0000005c", + "lane1": "0x0000005c", + "lane2": "0x0000005c", + "lane3": "0x0000005c", + "lane4": "0x0000005c", + "lane5": "0x0000005c", + "lane6": "0x0000005c", + "lane7": "0x0000005c" + }, + "post1": { + "lane0": "0xfffffff9", + "lane1": "0xfffffff9", + "lane2": "0xfffffff9", + "lane3": "0xfffffff9", + "lane4": "0xfffffff9", + "lane5": "0xfffffff9", + "lane6": "0xfffffff9", + "lane7": "0xfffffff9" + }, + "post2": { + "lane0": "0xfffffff6", + "lane1": "0xfffffff6", + "lane2": "0xfffffff6", + "lane3": "0xfffffff6", + "lane4": "0xfffffff6", + "lane5": "0xfffffff6", + "lane6": "0xfffffff6", + "lane7": "0xfffffff6" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", "lane7": "0x1" } } @@ -3999,7 +9759,67 @@ } } }, - "Default": { + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": "0x6", + "lane5": "0x6", + "lane6": "0x6", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0", + "lane4": "0xffffffe0", + "lane5": "0xffffffe0", + "lane6": "0xffffffe0", + "lane7": "0xffffffe0" + }, + "main": { + "lane0": "0x80", + "lane1": "0x80", + "lane2": "0x80", + "lane3": "0x80", + "lane4": "0x80", + "lane5": "0x80", + "lane6": "0x80", + "lane7": "0x80" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, "rxpolarity": { "lane0": "0x0", "lane1": "0x0", @@ -4010,39 +9830,339 @@ "lane6": "0x0", "lane7": "0x1" } - } - }, - "18": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1)": { - "speed:100GAUI-1-S|800G.*": { - "pre3": { - "lane0": "0xffffffff", - "lane1": "0xffffffff", - "lane2": "0xffffffff", - "lane3": "0xffffffff", - "lane4": "0xffffffff", - "lane5": "0xffffffff", - "lane6": "0xffffffff", - "lane7": "0xffffffff" - }, - "pre2": { - "lane0": "0x00000006", - "lane1": "0x00000006", - "lane2": "0x00000006", - "lane3": "0x00000006", - "lane4": "0x00000006", - "lane5": "0x00000006", - "lane6": "0x00000006", - "lane7": "0x00000006" - }, - "pre1": { - "lane0": "0xffffffea", - "lane1": "0xffffffea", - "lane2": "0xffffffea", - "lane3": "0xffffffea", - "lane4": "0xffffffea", - "lane5": "0xffffffea", - "lane6": "0xffffffea", + }, + "OPTICAL50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffb", + "lane1": "0xfffffffb", + "lane2": "0xfffffffb", + "lane3": "0xfffffffb", + "lane4": "0xfffffffb", + "lane5": "0xfffffffb", + "lane6": "0xfffffffb", + "lane7": "0xfffffffb" + }, + "main": { + "lane0": "0xa2", + "lane1": "0xa2", + "lane2": "0xa2", + "lane3": "0xa2", + "lane4": "0xa2", + "lane5": "0xa2", + "lane6": "0xa2", + "lane7": "0xa2" + }, + "post1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post2": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xffffffff" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x1" + } + }, + "OPTICAL25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "main": { + "lane0": "0x66", + "lane1": "0x66", + "lane2": "0x66", + "lane3": "0x66", + "lane4": "0x66", + "lane5": "0x66", + "lane6": "0x66", + "lane7": "0x66" + }, + "post1": { + "lane0": "0xffffffed", + "lane1": "0xffffffed", + "lane2": "0xffffffed", + "lane3": "0xffffffed", + "lane4": "0xffffffed", + "lane5": "0xffffffed", + "lane6": "0xffffffed", + "lane7": "0xffffffed" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x1" + } + }, + "COPPER50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x4", + "lane1": "0x4", + "lane2": "0x4", + "lane3": "0x4", + "lane4": "0x4", + "lane5": "0x4", + "lane6": "0x4", + "lane7": "0x4" + }, + "pre1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x1" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "main": { + "lane0": "0x6b", + "lane1": "0x6b", + "lane2": "0x6b", + "lane3": "0x6b", + "lane4": "0x6b", + "lane5": "0x6b", + "lane6": "0x6b", + "lane7": "0x6b" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x1" + } + }, + "Default": { + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x1" + } + } + }, + "18": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { + "pre3": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xffffffff" + }, + "pre2": { + "lane0": "0x00000006", + "lane1": "0x00000006", + "lane2": "0x00000006", + "lane3": "0x00000006", + "lane4": "0x00000006", + "lane5": "0x00000006", + "lane6": "0x00000006", + "lane7": "0x00000006" + }, + "pre1": { + "lane0": "0xffffffea", + "lane1": "0xffffffea", + "lane2": "0xffffffea", + "lane3": "0xffffffea", + "lane4": "0xffffffea", + "lane5": "0xffffffea", + "lane6": "0xffffffea", "lane7": "0xffffffea" }, "main": { @@ -4235,7 +10355,67 @@ } } }, - "Default": { + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": "0x6", + "lane5": "0x6", + "lane6": "0x6", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe0", + "lane3": "0xffffffe4", + "lane4": "0xffffffe0", + "lane5": "0xffffffe4", + "lane6": "0xffffffe0", + "lane7": "0xffffffe0" + }, + "main": { + "lane0": "0x80", + "lane1": "0x80", + "lane2": "0x80", + "lane3": "0x80", + "lane4": "0x80", + "lane5": "0x80", + "lane6": "0x80", + "lane7": "0x80" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffffc", + "lane3": "0xfffffff8", + "lane4": "0xfffffffc", + "lane5": "0xfffffff8", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, "rxpolarity": { "lane0": "0x0", "lane1": "0x0", @@ -4246,71 +10426,371 @@ "lane6": "0x0", "lane7": "0x1" } - } - }, - "19": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1)": { - "speed:100GAUI-1-S|800G.*": { - "pre3": { - "lane0": "0xfffffffe", - "lane1": "0xfffffffe", - "lane2": "0xfffffffe", - "lane3": "0xfffffffe", - "lane4": "0xfffffffe", - "lane5": "0xfffffffe", - "lane6": "0xfffffffe", - "lane7": "0xfffffffe" - }, - "pre2": { - "lane0": "0x00000007", - "lane1": "0x00000007", - "lane2": "0x00000007", - "lane3": "0x00000007", - "lane4": "0x00000007", - "lane5": "0x00000007", - "lane6": "0x00000007", - "lane7": "0x00000007" - }, - "pre1": { - "lane0": "0xffffffe5", - "lane1": "0xffffffe5", - "lane2": "0xffffffe5", - "lane3": "0xffffffe5", - "lane4": "0xffffffe5", - "lane5": "0xffffffe5", - "lane6": "0xffffffe5", - "lane7": "0xffffffe5" - }, - "main": { - "lane0": "0x00000060", - "lane1": "0x00000060", - "lane2": "0x00000060", - "lane3": "0x00000060", - "lane4": "0x00000060", - "lane5": "0x00000060", - "lane6": "0x00000060", - "lane7": "0x00000060" - }, - "post1": { - "lane0": "0xfffffff5", - "lane1": "0xfffffff5", - "lane2": "0xfffffff5", - "lane3": "0xfffffff5", - "lane4": "0xfffffff5", - "lane5": "0xfffffff5", - "lane6": "0xfffffff5", - "lane7": "0xfffffff5" - }, - "post2": { - "lane0": "0xfffffff3", - "lane1": "0xfffffff3", - "lane2": "0xfffffff3", - "lane3": "0xfffffff3", - "lane4": "0xfffffff3", - "lane5": "0xfffffff3", - "lane6": "0xfffffff3", - "lane7": "0xfffffff3" - }, + }, + "OPTICAL50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffb", + "lane2": "0xfffffffd", + "lane3": "0xfffffffb", + "lane4": "0xfffffffd", + "lane5": "0xfffffffb", + "lane6": "0xfffffffd", + "lane7": "0xfffffffb" + }, + "main": { + "lane0": "0xa3", + "lane1": "0xa2", + "lane2": "0xa3", + "lane3": "0xa2", + "lane4": "0xa3", + "lane5": "0xa2", + "lane6": "0xa3", + "lane7": "0xa2" + }, + "post1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post2": { + "lane0": "0xfffffffe", + "lane1": "0xffffffff", + "lane2": "0xfffffffe", + "lane3": "0xffffffff", + "lane4": "0xfffffffe", + "lane5": "0xffffffff", + "lane6": "0xfffffffe", + "lane7": "0xffffffff" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x1" + } + }, + "OPTICAL25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "main": { + "lane0": "0x66", + "lane1": "0x66", + "lane2": "0x66", + "lane3": "0x66", + "lane4": "0x66", + "lane5": "0x66", + "lane6": "0x66", + "lane7": "0x66" + }, + "post1": { + "lane0": "0xffffffed", + "lane1": "0xffffffed", + "lane2": "0xffffffed", + "lane3": "0xffffffed", + "lane4": "0xffffffed", + "lane5": "0xffffffed", + "lane6": "0xffffffed", + "lane7": "0xffffffed" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x1" + } + }, + "COPPER50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x4", + "lane1": "0x4", + "lane2": "0x4", + "lane3": "0x4", + "lane4": "0x4", + "lane5": "0x4", + "lane6": "0x4", + "lane7": "0x4" + }, + "pre1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x1" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "main": { + "lane0": "0x6b", + "lane1": "0x6b", + "lane2": "0x6b", + "lane3": "0x6b", + "lane4": "0x6b", + "lane5": "0x6b", + "lane6": "0x6b", + "lane7": "0x6b" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x1" + } + }, + "Default": { + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x1" + } + } + }, + "19": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { + "pre3": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "pre2": { + "lane0": "0x00000007", + "lane1": "0x00000007", + "lane2": "0x00000007", + "lane3": "0x00000007", + "lane4": "0x00000007", + "lane5": "0x00000007", + "lane6": "0x00000007", + "lane7": "0x00000007" + }, + "pre1": { + "lane0": "0xffffffe5", + "lane1": "0xffffffe5", + "lane2": "0xffffffe5", + "lane3": "0xffffffe5", + "lane4": "0xffffffe5", + "lane5": "0xffffffe5", + "lane6": "0xffffffe5", + "lane7": "0xffffffe5" + }, + "main": { + "lane0": "0x00000060", + "lane1": "0x00000060", + "lane2": "0x00000060", + "lane3": "0x00000060", + "lane4": "0x00000060", + "lane5": "0x00000060", + "lane6": "0x00000060", + "lane7": "0x00000060" + }, + "post1": { + "lane0": "0xfffffff5", + "lane1": "0xfffffff5", + "lane2": "0xfffffff5", + "lane3": "0xfffffff5", + "lane4": "0xfffffff5", + "lane5": "0xfffffff5", + "lane6": "0xfffffff5", + "lane7": "0xfffffff5" + }, + "post2": { + "lane0": "0xfffffff3", + "lane1": "0xfffffff3", + "lane2": "0xfffffff3", + "lane3": "0xfffffff3", + "lane4": "0xfffffff3", + "lane5": "0xfffffff3", + "lane6": "0xfffffff3", + "lane7": "0xfffffff3" + }, "rxpolarity": { "lane0": "0x1", "lane1": "0x0", @@ -4471,7 +10951,67 @@ } } }, - "Default": { + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": "0x6", + "lane5": "0x6", + "lane6": "0x6", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe4", + "lane4": "0xffffffe0", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x80", + "lane1": "0x80", + "lane2": "0x80", + "lane3": "0x80", + "lane4": "0x80", + "lane5": "0x80", + "lane6": "0x80", + "lane7": "0x80" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffff8", + "lane4": "0xfffffffc", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, "rxpolarity": { "lane0": "0x1", "lane1": "0x0", @@ -4482,39 +11022,339 @@ "lane6": "0x1", "lane7": "0x1" } - } - }, - "20": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1)": { - "speed:100GAUI-1-S|800G.*": { - "pre3": { - "lane0": "0xfffffffe", - "lane1": "0xfffffffe", - "lane2": "0xfffffffe", - "lane3": "0xfffffffe", - "lane4": "0xfffffffe", - "lane5": "0xfffffffe", - "lane6": "0xfffffffe", - "lane7": "0xfffffffe" - }, - "pre2": { - "lane0": "0x00000007", - "lane1": "0x00000007", - "lane2": "0x00000007", - "lane3": "0x00000007", - "lane4": "0x00000007", - "lane5": "0x00000007", - "lane6": "0x00000007", - "lane7": "0x00000007" - }, - "pre1": { - "lane0": "0xffffffe5", - "lane1": "0xffffffe5", - "lane2": "0xffffffe5", - "lane3": "0xffffffe5", - "lane4": "0xffffffe5", - "lane5": "0xffffffe5", - "lane6": "0xffffffe5", + }, + "OPTICAL50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x1", + "lane2": "0x0", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x0", + "lane7": "0x1" + }, + "pre1": { + "lane0": "0xfffffffb", + "lane1": "0xfffffff3", + "lane2": "0xfffffffb", + "lane3": "0xfffffff3", + "lane4": "0xfffffffb", + "lane5": "0xfffffff3", + "lane6": "0xfffffffb", + "lane7": "0xfffffff3" + }, + "main": { + "lane0": "0x9d", + "lane1": "0x98", + "lane2": "0x9d", + "lane3": "0x98", + "lane4": "0x9d", + "lane5": "0x98", + "lane6": "0x9d", + "lane7": "0x98" + }, + "post1": { + "lane0": "0xfffffffd", + "lane1": "0x0", + "lane2": "0xfffffffd", + "lane3": "0x0", + "lane4": "0xfffffffd", + "lane5": "0x0", + "lane6": "0xfffffffd", + "lane7": "0x0" + }, + "post2": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffe", + "lane2": "0xfffffffd", + "lane3": "0xfffffffe", + "lane4": "0xfffffffd", + "lane5": "0xfffffffe", + "lane6": "0xfffffffd", + "lane7": "0xfffffffe" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "OPTICAL25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff9", + "lane1": "0xfffffffc", + "lane2": "0xfffffff9", + "lane3": "0xfffffffc", + "lane4": "0xfffffff9", + "lane5": "0xfffffffc", + "lane6": "0xfffffff9", + "lane7": "0xfffffffc" + }, + "main": { + "lane0": "0x52", + "lane1": "0x67", + "lane2": "0x52", + "lane3": "0x67", + "lane4": "0x52", + "lane5": "0x67", + "lane6": "0x52", + "lane7": "0x67" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xffffffec", + "lane2": "0xfffffff8", + "lane3": "0xffffffec", + "lane4": "0xfffffff8", + "lane5": "0xffffffec", + "lane6": "0xfffffff8", + "lane7": "0xffffffec" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "COPPER50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x4", + "lane1": "0x4", + "lane2": "0x4", + "lane3": "0x4", + "lane4": "0x4", + "lane5": "0x4", + "lane6": "0x4", + "lane7": "0x4" + }, + "pre1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "main": { + "lane0": "0x6b", + "lane1": "0x6b", + "lane2": "0x6b", + "lane3": "0x6b", + "lane4": "0x6b", + "lane5": "0x6b", + "lane6": "0x6b", + "lane7": "0x6b" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "Default": { + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + } + }, + "20": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { + "pre3": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "pre2": { + "lane0": "0x00000007", + "lane1": "0x00000007", + "lane2": "0x00000007", + "lane3": "0x00000007", + "lane4": "0x00000007", + "lane5": "0x00000007", + "lane6": "0x00000007", + "lane7": "0x00000007" + }, + "pre1": { + "lane0": "0xffffffe5", + "lane1": "0xffffffe5", + "lane2": "0xffffffe5", + "lane3": "0xffffffe5", + "lane4": "0xffffffe5", + "lane5": "0xffffffe5", + "lane6": "0xffffffe5", "lane7": "0xffffffe5" }, "main": { @@ -4707,7 +11547,67 @@ } } }, - "Default": { + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": "0x6", + "lane5": "0x6", + "lane6": "0x6", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0", + "lane4": "0xffffffe0", + "lane5": "0xffffffe0", + "lane6": "0xffffffe0", + "lane7": "0xffffffe0" + }, + "main": { + "lane0": "0x80", + "lane1": "0x80", + "lane2": "0x80", + "lane3": "0x80", + "lane4": "0x80", + "lane5": "0x80", + "lane6": "0x80", + "lane7": "0x80" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, "rxpolarity": { "lane0": "0x1", "lane1": "0x0", @@ -4718,75 +11618,375 @@ "lane6": "0x1", "lane7": "0x1" } - } - }, - "21": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1)": { - "speed:100GAUI-1-S|800G.*": { - "pre3": { - "lane0": "0xffffffff", - "lane1": "0xffffffff", - "lane2": "0xffffffff", - "lane3": "0xffffffff", - "lane4": "0xffffffff", - "lane5": "0xffffffff", - "lane6": "0xffffffff", - "lane7": "0xffffffff" - }, - "pre2": { - "lane0": "0x00000006", - "lane1": "0x00000006", - "lane2": "0x00000006", - "lane3": "0x00000006", - "lane4": "0x00000006", - "lane5": "0x00000006", - "lane6": "0x00000006", - "lane7": "0x00000006" - }, - "pre1": { - "lane0": "0xffffffe7", - "lane1": "0xffffffe7", - "lane2": "0xffffffe7", - "lane3": "0xffffffe7", - "lane4": "0xffffffe7", - "lane5": "0xffffffe7", - "lane6": "0xffffffe7", - "lane7": "0xffffffe7" - }, - "main": { - "lane0": "0x00000064", - "lane1": "0x00000064", - "lane2": "0x00000064", - "lane3": "0x00000064", - "lane4": "0x00000064", - "lane5": "0x00000064", - "lane6": "0x00000064", - "lane7": "0x00000064" - }, - "post1": { - "lane0": "0xfffffff5", - "lane1": "0xfffffff5", - "lane2": "0xfffffff5", - "lane3": "0xfffffff5", - "lane4": "0xfffffff5", - "lane5": "0xfffffff5", - "lane6": "0xfffffff5", - "lane7": "0xfffffff5" - }, - "post2": { - "lane0": "0xfffffff4", - "lane1": "0xfffffff4", - "lane2": "0xfffffff4", - "lane3": "0xfffffff4", - "lane4": "0xfffffff4", - "lane5": "0xfffffff4", - "lane6": "0xfffffff4", - "lane7": "0xfffffff4" - }, - "rxpolarity": { - "lane0": "0x0", - "lane1": "0x0", - "lane2": "0x0", + }, + "OPTICAL50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffb", + "lane1": "0xfffffffb", + "lane2": "0xfffffffb", + "lane3": "0xfffffffb", + "lane4": "0xfffffffb", + "lane5": "0xfffffffb", + "lane6": "0xfffffffb", + "lane7": "0xfffffffb" + }, + "main": { + "lane0": "0x9d", + "lane1": "0x9d", + "lane2": "0x9d", + "lane3": "0x9d", + "lane4": "0x9d", + "lane5": "0x9d", + "lane6": "0x9d", + "lane7": "0x9d" + }, + "post1": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "post2": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "OPTICAL25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff9", + "lane1": "0xfffffff9", + "lane2": "0xfffffff9", + "lane3": "0xfffffff9", + "lane4": "0xfffffff9", + "lane5": "0xfffffff9", + "lane6": "0xfffffff9", + "lane7": "0xfffffff9" + }, + "main": { + "lane0": "0x52", + "lane1": "0x52", + "lane2": "0x52", + "lane3": "0x52", + "lane4": "0x52", + "lane5": "0x52", + "lane6": "0x52", + "lane7": "0x52" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "COPPER50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x4", + "lane1": "0x4", + "lane2": "0x4", + "lane3": "0x4", + "lane4": "0x4", + "lane5": "0x4", + "lane6": "0x4", + "lane7": "0x4" + }, + "pre1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "main": { + "lane0": "0x6b", + "lane1": "0x6b", + "lane2": "0x6b", + "lane3": "0x6b", + "lane4": "0x6b", + "lane5": "0x6b", + "lane6": "0x6b", + "lane7": "0x6b" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "Default": { + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + } + }, + "21": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { + "pre3": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xffffffff" + }, + "pre2": { + "lane0": "0x00000006", + "lane1": "0x00000006", + "lane2": "0x00000006", + "lane3": "0x00000006", + "lane4": "0x00000006", + "lane5": "0x00000006", + "lane6": "0x00000006", + "lane7": "0x00000006" + }, + "pre1": { + "lane0": "0xffffffe7", + "lane1": "0xffffffe7", + "lane2": "0xffffffe7", + "lane3": "0xffffffe7", + "lane4": "0xffffffe7", + "lane5": "0xffffffe7", + "lane6": "0xffffffe7", + "lane7": "0xffffffe7" + }, + "main": { + "lane0": "0x00000064", + "lane1": "0x00000064", + "lane2": "0x00000064", + "lane3": "0x00000064", + "lane4": "0x00000064", + "lane5": "0x00000064", + "lane6": "0x00000064", + "lane7": "0x00000064" + }, + "post1": { + "lane0": "0xfffffff5", + "lane1": "0xfffffff5", + "lane2": "0xfffffff5", + "lane3": "0xfffffff5", + "lane4": "0xfffffff5", + "lane5": "0xfffffff5", + "lane6": "0xfffffff5", + "lane7": "0xfffffff5" + }, + "post2": { + "lane0": "0xfffffff4", + "lane1": "0xfffffff4", + "lane2": "0xfffffff4", + "lane3": "0xfffffff4", + "lane4": "0xfffffff4", + "lane5": "0xfffffff4", + "lane6": "0xfffffff4", + "lane7": "0xfffffff4" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", "lane3": "0x1", "lane4": "0x0", "lane5": "0x0", @@ -4943,7 +12143,67 @@ } } }, - "Default": { + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": "0x6", + "lane5": "0x6", + "lane6": "0x6", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0", + "lane4": "0xffffffe0", + "lane5": "0xffffffe0", + "lane6": "0xffffffe0", + "lane7": "0xffffffe0" + }, + "main": { + "lane0": "0x80", + "lane1": "0x80", + "lane2": "0x80", + "lane3": "0x80", + "lane4": "0x80", + "lane5": "0x80", + "lane6": "0x80", + "lane7": "0x80" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, "rxpolarity": { "lane0": "0x0", "lane1": "0x0", @@ -4954,43 +12214,343 @@ "lane6": "0x0", "lane7": "0x1" } - } - }, - "22": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1)": { - "speed:100GAUI-1-S|800G.*": { - "pre3": { - "lane0": "0xffffffff", - "lane1": "0xffffffff", - "lane2": "0xffffffff", - "lane3": "0xffffffff", - "lane4": "0xffffffff", - "lane5": "0xffffffff", - "lane6": "0xffffffff", - "lane7": "0xffffffff" - }, - "pre2": { - "lane0": "0x00000006", - "lane1": "0x00000006", - "lane2": "0x00000006", - "lane3": "0x00000006", - "lane4": "0x00000006", - "lane5": "0x00000006", - "lane6": "0x00000006", - "lane7": "0x00000006" - }, - "pre1": { - "lane0": "0xffffffe7", - "lane1": "0xffffffe7", - "lane2": "0xffffffe7", - "lane3": "0xffffffe7", - "lane4": "0xffffffe7", - "lane5": "0xffffffe7", - "lane6": "0xffffffe7", - "lane7": "0xffffffe7" - }, - "main": { - "lane0": "0x00000064", + }, + "OPTICAL50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "main": { + "lane0": "0xa3", + "lane1": "0xa3", + "lane2": "0xa3", + "lane3": "0xa3", + "lane4": "0xa3", + "lane5": "0xa3", + "lane6": "0xa3", + "lane7": "0xa3" + }, + "post1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post2": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x1" + } + }, + "OPTICAL25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "main": { + "lane0": "0x47", + "lane1": "0x47", + "lane2": "0x47", + "lane3": "0x47", + "lane4": "0x47", + "lane5": "0x47", + "lane6": "0x47", + "lane7": "0x47" + }, + "post1": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x1" + } + }, + "COPPER50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x4", + "lane1": "0x4", + "lane2": "0x4", + "lane3": "0x4", + "lane4": "0x4", + "lane5": "0x4", + "lane6": "0x4", + "lane7": "0x4" + }, + "pre1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x1" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "main": { + "lane0": "0x6b", + "lane1": "0x6b", + "lane2": "0x6b", + "lane3": "0x6b", + "lane4": "0x6b", + "lane5": "0x6b", + "lane6": "0x6b", + "lane7": "0x6b" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x1" + } + }, + "Default": { + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x1" + } + } + }, + "22": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { + "pre3": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xffffffff" + }, + "pre2": { + "lane0": "0x00000006", + "lane1": "0x00000006", + "lane2": "0x00000006", + "lane3": "0x00000006", + "lane4": "0x00000006", + "lane5": "0x00000006", + "lane6": "0x00000006", + "lane7": "0x00000006" + }, + "pre1": { + "lane0": "0xffffffe7", + "lane1": "0xffffffe7", + "lane2": "0xffffffe7", + "lane3": "0xffffffe7", + "lane4": "0xffffffe7", + "lane5": "0xffffffe7", + "lane6": "0xffffffe7", + "lane7": "0xffffffe7" + }, + "main": { + "lane0": "0x00000064", "lane1": "0x00000064", "lane2": "0x00000064", "lane3": "0x00000064", @@ -5179,7 +12739,67 @@ } } }, - "Default": { + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": "0x6", + "lane5": "0x6", + "lane6": "0x6", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0", + "lane4": "0xffffffe0", + "lane5": "0xffffffe0", + "lane6": "0xffffffe0", + "lane7": "0xffffffe0" + }, + "main": { + "lane0": "0x80", + "lane1": "0x80", + "lane2": "0x80", + "lane3": "0x80", + "lane4": "0x80", + "lane5": "0x80", + "lane6": "0x80", + "lane7": "0x80" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, "rxpolarity": { "lane0": "0x0", "lane1": "0x0", @@ -5190,59 +12810,359 @@ "lane6": "0x0", "lane7": "0x1" } - } - }, - "23": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1)": { - "speed:100GAUI-1-S|800G.*": { - "pre3": { - "lane0": "0xfffffffe", - "lane1": "0xfffffffe", - "lane2": "0xfffffffe", - "lane3": "0xfffffffe", - "lane4": "0xfffffffe", - "lane5": "0xfffffffe", - "lane6": "0xfffffffe", - "lane7": "0xfffffffe" - }, - "pre2": { - "lane0": "0x00000006", - "lane1": "0x00000006", - "lane2": "0x00000006", - "lane3": "0x00000006", - "lane4": "0x00000006", - "lane5": "0x00000006", - "lane6": "0x00000006", - "lane7": "0x00000006" - }, - "pre1": { - "lane0": "0xffffffe8", - "lane1": "0xffffffe8", - "lane2": "0xffffffe8", - "lane3": "0xffffffe8", - "lane4": "0xffffffe8", - "lane5": "0xffffffe8", - "lane6": "0xffffffe8", - "lane7": "0xffffffe8" - }, - "main": { - "lane0": "0x0000005f", - "lane1": "0x0000005f", - "lane2": "0x0000005f", - "lane3": "0x0000005f", - "lane4": "0x0000005f", - "lane5": "0x0000005f", - "lane6": "0x0000005f", - "lane7": "0x0000005f" - }, - "post1": { - "lane0": "0xfffffffa", - "lane1": "0xfffffffa", - "lane2": "0xfffffffa", - "lane3": "0xfffffffa", - "lane4": "0xfffffffa", - "lane5": "0xfffffffa", - "lane6": "0xfffffffa", + }, + "OPTICAL50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffb", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "main": { + "lane0": "0xa3", + "lane1": "0xa2", + "lane2": "0xa3", + "lane3": "0xa3", + "lane4": "0xa3", + "lane5": "0xa3", + "lane6": "0xa3", + "lane7": "0xa3" + }, + "post1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post2": { + "lane0": "0xfffffffe", + "lane1": "0xffffffff", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x1" + } + }, + "OPTICAL25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0x0", + "lane1": "0xfffffffa", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "main": { + "lane0": "0x47", + "lane1": "0x66", + "lane2": "0x47", + "lane3": "0x47", + "lane4": "0x47", + "lane5": "0x47", + "lane6": "0x47", + "lane7": "0x47" + }, + "post1": { + "lane0": "0xfffffffd", + "lane1": "0xffffffed", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x1" + } + }, + "COPPER50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x4", + "lane1": "0x4", + "lane2": "0x4", + "lane3": "0x4", + "lane4": "0x4", + "lane5": "0x4", + "lane6": "0x4", + "lane7": "0x4" + }, + "pre1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x1" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "main": { + "lane0": "0x6b", + "lane1": "0x6b", + "lane2": "0x6b", + "lane3": "0x6b", + "lane4": "0x6b", + "lane5": "0x6b", + "lane6": "0x6b", + "lane7": "0x6b" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x1" + } + }, + "Default": { + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x1" + } + } + }, + "23": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { + "pre3": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "pre2": { + "lane0": "0x00000006", + "lane1": "0x00000006", + "lane2": "0x00000006", + "lane3": "0x00000006", + "lane4": "0x00000006", + "lane5": "0x00000006", + "lane6": "0x00000006", + "lane7": "0x00000006" + }, + "pre1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "main": { + "lane0": "0x0000005f", + "lane1": "0x0000005f", + "lane2": "0x0000005f", + "lane3": "0x0000005f", + "lane4": "0x0000005f", + "lane5": "0x0000005f", + "lane6": "0x0000005f", + "lane7": "0x0000005f" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", "lane7": "0xfffffffa" }, "post2": { @@ -5415,7 +13335,67 @@ } } }, - "Default": { + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": "0x6", + "lane5": "0x6", + "lane6": "0x6", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0", + "lane4": "0xffffffe0", + "lane5": "0xffffffe0", + "lane6": "0xffffffe0", + "lane7": "0xffffffe0" + }, + "main": { + "lane0": "0x80", + "lane1": "0x80", + "lane2": "0x80", + "lane3": "0x80", + "lane4": "0x80", + "lane5": "0x80", + "lane6": "0x80", + "lane7": "0x80" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, "rxpolarity": { "lane0": "0x1", "lane1": "0x0", @@ -5426,44 +13406,344 @@ "lane6": "0x1", "lane7": "0x1" } - } - }, - "24": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1)": { - "speed:100GAUI-1-S|800G.*": { - "pre3": { - "lane0": "0xfffffffe", - "lane1": "0xfffffffe", - "lane2": "0xfffffffe", - "lane3": "0xfffffffe", - "lane4": "0xfffffffe", - "lane5": "0xfffffffe", - "lane6": "0xfffffffe", - "lane7": "0xfffffffe" - }, - "pre2": { - "lane0": "0x00000006", - "lane1": "0x00000006", - "lane2": "0x00000006", - "lane3": "0x00000006", - "lane4": "0x00000006", - "lane5": "0x00000006", - "lane6": "0x00000006", - "lane7": "0x00000006" - }, - "pre1": { - "lane0": "0xffffffe8", - "lane1": "0xffffffe8", - "lane2": "0xffffffe8", - "lane3": "0xffffffe8", - "lane4": "0xffffffe8", - "lane5": "0xffffffe8", - "lane6": "0xffffffe8", - "lane7": "0xffffffe8" - }, - "main": { - "lane0": "0x0000005f", - "lane1": "0x0000005f", + }, + "OPTICAL50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffb", + "lane1": "0xfffffffb", + "lane2": "0xfffffffb", + "lane3": "0xfffffffb", + "lane4": "0xfffffffb", + "lane5": "0xfffffffb", + "lane6": "0xfffffffb", + "lane7": "0xfffffffb" + }, + "main": { + "lane0": "0x9d", + "lane1": "0x9d", + "lane2": "0x9d", + "lane3": "0x9d", + "lane4": "0x9d", + "lane5": "0x9d", + "lane6": "0x9d", + "lane7": "0x9d" + }, + "post1": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "post2": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "OPTICAL25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff9", + "lane1": "0xfffffff9", + "lane2": "0xfffffff9", + "lane3": "0xfffffff9", + "lane4": "0xfffffff9", + "lane5": "0xfffffff9", + "lane6": "0xfffffff9", + "lane7": "0xfffffff9" + }, + "main": { + "lane0": "0x52", + "lane1": "0x52", + "lane2": "0x52", + "lane3": "0x52", + "lane4": "0x52", + "lane5": "0x52", + "lane6": "0x52", + "lane7": "0x52" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "COPPER50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x4", + "lane1": "0x4", + "lane2": "0x4", + "lane3": "0x4", + "lane4": "0x4", + "lane5": "0x4", + "lane6": "0x4", + "lane7": "0x4" + }, + "pre1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "main": { + "lane0": "0x6b", + "lane1": "0x6b", + "lane2": "0x6b", + "lane3": "0x6b", + "lane4": "0x6b", + "lane5": "0x6b", + "lane6": "0x6b", + "lane7": "0x6b" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "Default": { + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + } + }, + "24": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { + "pre3": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "pre2": { + "lane0": "0x00000006", + "lane1": "0x00000006", + "lane2": "0x00000006", + "lane3": "0x00000006", + "lane4": "0x00000006", + "lane5": "0x00000006", + "lane6": "0x00000006", + "lane7": "0x00000006" + }, + "pre1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "main": { + "lane0": "0x0000005f", + "lane1": "0x0000005f", "lane2": "0x0000005f", "lane3": "0x0000005f", "lane4": "0x0000005f", @@ -5651,7 +13931,67 @@ } } }, - "Default": { + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": "0x6", + "lane5": "0x6", + "lane6": "0x6", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0", + "lane4": "0xffffffe0", + "lane5": "0xffffffe0", + "lane6": "0xffffffe0", + "lane7": "0xffffffe0" + }, + "main": { + "lane0": "0x80", + "lane1": "0x80", + "lane2": "0x80", + "lane3": "0x80", + "lane4": "0x80", + "lane5": "0x80", + "lane6": "0x80", + "lane7": "0x80" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, "rxpolarity": { "lane0": "0x1", "lane1": "0x0", @@ -5662,74 +14002,374 @@ "lane6": "0x1", "lane7": "0x1" } - } - }, - "25": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1)": { - "speed:100GAUI-1-S|800G.*": { - "pre3": { - "lane0": "0xffffffff", - "lane1": "0xffffffff", - "lane2": "0xffffffff", - "lane3": "0xffffffff", - "lane4": "0xffffffff", - "lane5": "0xffffffff", - "lane6": "0xffffffff", - "lane7": "0xffffffff" - }, - "pre2": { - "lane0": "0x00000005", - "lane1": "0x00000005", - "lane2": "0x00000005", - "lane3": "0x00000005", - "lane4": "0x00000005", - "lane5": "0x00000005", - "lane6": "0x00000005", - "lane7": "0x00000005" - }, - "pre1": { - "lane0": "0xffffffeb", - "lane1": "0xffffffeb", - "lane2": "0xffffffeb", - "lane3": "0xffffffeb", - "lane4": "0xffffffeb", - "lane5": "0xffffffeb", - "lane6": "0xffffffeb", - "lane7": "0xffffffeb" - }, - "main": { - "lane0": "0x00000056", - "lane1": "0x00000056", - "lane2": "0x00000056", - "lane3": "0x00000056", - "lane4": "0x00000056", - "lane5": "0x00000056", - "lane6": "0x00000056", - "lane7": "0x00000056" - }, - "post1": { - "lane0": "0xfffffff5", - "lane1": "0xfffffff5", - "lane2": "0xfffffff5", - "lane3": "0xfffffff5", - "lane4": "0xfffffff5", - "lane5": "0xfffffff5", - "lane6": "0xfffffff5", - "lane7": "0xfffffff5" - }, - "post2": { - "lane0": "0xfffffff6", - "lane1": "0xfffffff6", - "lane2": "0xfffffff6", - "lane3": "0xfffffff6", - "lane4": "0xfffffff6", - "lane5": "0xfffffff6", - "lane6": "0xfffffff6", - "lane7": "0xfffffff6" - }, - "rxpolarity": { - "lane0": "0x1", - "lane1": "0x0", + }, + "OPTICAL50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffb", + "lane1": "0xfffffffb", + "lane2": "0xfffffffb", + "lane3": "0xfffffffb", + "lane4": "0xfffffffb", + "lane5": "0xfffffffb", + "lane6": "0xfffffffb", + "lane7": "0xfffffffb" + }, + "main": { + "lane0": "0x9d", + "lane1": "0x9d", + "lane2": "0x9d", + "lane3": "0x9d", + "lane4": "0x9d", + "lane5": "0x9d", + "lane6": "0x9d", + "lane7": "0x9d" + }, + "post1": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "post2": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "OPTICAL25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff9", + "lane1": "0xfffffff9", + "lane2": "0xfffffff9", + "lane3": "0xfffffff9", + "lane4": "0xfffffff9", + "lane5": "0xfffffff9", + "lane6": "0xfffffff9", + "lane7": "0xfffffff9" + }, + "main": { + "lane0": "0x52", + "lane1": "0x52", + "lane2": "0x52", + "lane3": "0x52", + "lane4": "0x52", + "lane5": "0x52", + "lane6": "0x52", + "lane7": "0x52" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "COPPER50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x4", + "lane1": "0x4", + "lane2": "0x4", + "lane3": "0x4", + "lane4": "0x4", + "lane5": "0x4", + "lane6": "0x4", + "lane7": "0x4" + }, + "pre1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "main": { + "lane0": "0x6b", + "lane1": "0x6b", + "lane2": "0x6b", + "lane3": "0x6b", + "lane4": "0x6b", + "lane5": "0x6b", + "lane6": "0x6b", + "lane7": "0x6b" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "Default": { + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + } + }, + "25": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { + "pre3": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xffffffff" + }, + "pre2": { + "lane0": "0x00000005", + "lane1": "0x00000005", + "lane2": "0x00000005", + "lane3": "0x00000005", + "lane4": "0x00000005", + "lane5": "0x00000005", + "lane6": "0x00000005", + "lane7": "0x00000005" + }, + "pre1": { + "lane0": "0xffffffeb", + "lane1": "0xffffffeb", + "lane2": "0xffffffeb", + "lane3": "0xffffffeb", + "lane4": "0xffffffeb", + "lane5": "0xffffffeb", + "lane6": "0xffffffeb", + "lane7": "0xffffffeb" + }, + "main": { + "lane0": "0x00000056", + "lane1": "0x00000056", + "lane2": "0x00000056", + "lane3": "0x00000056", + "lane4": "0x00000056", + "lane5": "0x00000056", + "lane6": "0x00000056", + "lane7": "0x00000056" + }, + "post1": { + "lane0": "0xfffffff5", + "lane1": "0xfffffff5", + "lane2": "0xfffffff5", + "lane3": "0xfffffff5", + "lane4": "0xfffffff5", + "lane5": "0xfffffff5", + "lane6": "0xfffffff5", + "lane7": "0xfffffff5" + }, + "post2": { + "lane0": "0xfffffff6", + "lane1": "0xfffffff6", + "lane2": "0xfffffff6", + "lane3": "0xfffffff6", + "lane4": "0xfffffff6", + "lane5": "0xfffffff6", + "lane6": "0xfffffff6", + "lane7": "0xfffffff6" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", "lane2": "0x0", "lane3": "0x0", "lane4": "0x1", @@ -5887,7 +14527,67 @@ } } }, - "Default": { + "OPTICAL100": { + "pre3": { + "lane0": "0xfffffffc", + "lane1": "0x0", + "lane2": "0xfffffffc", + "lane3": "0x0", + "lane4": "0xfffffffc", + "lane5": "0x0", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "pre2": { + "lane0": "0xa", + "lane1": "0x6", + "lane2": "0xa", + "lane3": "0x6", + "lane4": "0xa", + "lane5": "0x6", + "lane6": "0xa", + "lane7": "0xa" + }, + "pre1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe0", + "lane2": "0xffffffe8", + "lane3": "0xffffffe0", + "lane4": "0xffffffe8", + "lane5": "0xffffffe0", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "main": { + "lane0": "0x80", + "lane1": "0x80", + "lane2": "0x80", + "lane3": "0x80", + "lane4": "0x80", + "lane5": "0x80", + "lane6": "0x80", + "lane7": "0x80" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, "rxpolarity": { "lane0": "0x1", "lane1": "0x0", @@ -5898,49 +14598,349 @@ "lane6": "0x0", "lane7": "0x0" } - } - }, - "26": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1)": { - "speed:100GAUI-1-S|800G.*": { - "pre3": { - "lane0": "0xffffffff", - "lane1": "0xffffffff", - "lane2": "0xffffffff", - "lane3": "0xffffffff", - "lane4": "0xffffffff", - "lane5": "0xffffffff", - "lane6": "0xffffffff", - "lane7": "0xffffffff" - }, - "pre2": { - "lane0": "0x00000005", - "lane1": "0x00000005", - "lane2": "0x00000005", - "lane3": "0x00000005", - "lane4": "0x00000005", - "lane5": "0x00000005", - "lane6": "0x00000005", - "lane7": "0x00000005" - }, - "pre1": { - "lane0": "0xffffffeb", - "lane1": "0xffffffeb", - "lane2": "0xffffffeb", - "lane3": "0xffffffeb", - "lane4": "0xffffffeb", - "lane5": "0xffffffeb", - "lane6": "0xffffffeb", - "lane7": "0xffffffeb" - }, - "main": { - "lane0": "0x00000056", - "lane1": "0x00000056", - "lane2": "0x00000056", - "lane3": "0x00000056", - "lane4": "0x00000056", - "lane5": "0x00000056", - "lane6": "0x00000056", + }, + "OPTICAL50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "main": { + "lane0": "0xa3", + "lane1": "0xa3", + "lane2": "0xa3", + "lane3": "0xa3", + "lane4": "0xa3", + "lane5": "0xa3", + "lane6": "0xa3", + "lane7": "0xa3" + }, + "post1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post2": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "OPTICAL25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "main": { + "lane0": "0x47", + "lane1": "0x47", + "lane2": "0x47", + "lane3": "0x47", + "lane4": "0x47", + "lane5": "0x47", + "lane6": "0x47", + "lane7": "0x47" + }, + "post1": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "COPPER50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x4", + "lane1": "0x4", + "lane2": "0x4", + "lane3": "0x4", + "lane4": "0x4", + "lane5": "0x4", + "lane6": "0x4", + "lane7": "0x4" + }, + "pre1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "main": { + "lane0": "0x6b", + "lane1": "0x6b", + "lane2": "0x6b", + "lane3": "0x6b", + "lane4": "0x6b", + "lane5": "0x6b", + "lane6": "0x6b", + "lane7": "0x6b" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "Default": { + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "26": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { + "pre3": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xffffffff" + }, + "pre2": { + "lane0": "0x00000005", + "lane1": "0x00000005", + "lane2": "0x00000005", + "lane3": "0x00000005", + "lane4": "0x00000005", + "lane5": "0x00000005", + "lane6": "0x00000005", + "lane7": "0x00000005" + }, + "pre1": { + "lane0": "0xffffffeb", + "lane1": "0xffffffeb", + "lane2": "0xffffffeb", + "lane3": "0xffffffeb", + "lane4": "0xffffffeb", + "lane5": "0xffffffeb", + "lane6": "0xffffffeb", + "lane7": "0xffffffeb" + }, + "main": { + "lane0": "0x00000056", + "lane1": "0x00000056", + "lane2": "0x00000056", + "lane3": "0x00000056", + "lane4": "0x00000056", + "lane5": "0x00000056", + "lane6": "0x00000056", "lane7": "0x00000056" }, "post1": { @@ -6123,7 +15123,67 @@ } } }, - "Default": { + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": "0x6", + "lane5": "0x6", + "lane6": "0x6", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0", + "lane4": "0xffffffe0", + "lane5": "0xffffffe0", + "lane6": "0xffffffe0", + "lane7": "0xffffffe0" + }, + "main": { + "lane0": "0x80", + "lane1": "0x80", + "lane2": "0x80", + "lane3": "0x80", + "lane4": "0x80", + "lane5": "0x80", + "lane6": "0x80", + "lane7": "0x80" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, "rxpolarity": { "lane0": "0x0", "lane1": "0x0", @@ -6134,53 +15194,353 @@ "lane6": "0x0", "lane7": "0x1" } - } - }, - "27": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1)": { - "speed:100GAUI-1-S|800G.*": { - "pre3": { - "lane0": "0xfffffffe", - "lane1": "0xfffffffe", - "lane2": "0xfffffffe", - "lane3": "0xfffffffe", - "lane4": "0xfffffffe", - "lane5": "0xfffffffe", - "lane6": "0xfffffffe", - "lane7": "0xfffffffe" - }, - "pre2": { - "lane0": "0x00000007", - "lane1": "0x00000007", - "lane2": "0x00000007", - "lane3": "0x00000007", - "lane4": "0x00000007", - "lane5": "0x00000007", - "lane6": "0x00000007", - "lane7": "0x00000007" - }, - "pre1": { - "lane0": "0xffffffe8", - "lane1": "0xffffffe8", - "lane2": "0xffffffe8", - "lane3": "0xffffffe8", - "lane4": "0xffffffe8", - "lane5": "0xffffffe8", - "lane6": "0xffffffe8", - "lane7": "0xffffffe8" - }, - "main": { - "lane0": "0x00000052", - "lane1": "0x00000052", - "lane2": "0x00000052", - "lane3": "0x00000052", - "lane4": "0x00000052", - "lane5": "0x00000052", - "lane6": "0x00000052", - "lane7": "0x00000052" - }, - "post1": { - "lane0": "0xfffffff5", + }, + "OPTICAL50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "main": { + "lane0": "0xa3", + "lane1": "0xa3", + "lane2": "0xa3", + "lane3": "0xa3", + "lane4": "0xa3", + "lane5": "0xa3", + "lane6": "0xa3", + "lane7": "0xa3" + }, + "post1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post2": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x1" + } + }, + "OPTICAL25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "main": { + "lane0": "0x47", + "lane1": "0x47", + "lane2": "0x47", + "lane3": "0x47", + "lane4": "0x47", + "lane5": "0x47", + "lane6": "0x47", + "lane7": "0x47" + }, + "post1": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x1" + } + }, + "COPPER50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x4", + "lane1": "0x4", + "lane2": "0x4", + "lane3": "0x4", + "lane4": "0x4", + "lane5": "0x4", + "lane6": "0x4", + "lane7": "0x4" + }, + "pre1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x1" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "main": { + "lane0": "0x6b", + "lane1": "0x6b", + "lane2": "0x6b", + "lane3": "0x6b", + "lane4": "0x6b", + "lane5": "0x6b", + "lane6": "0x6b", + "lane7": "0x6b" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x1" + } + }, + "Default": { + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x1" + } + } + }, + "27": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { + "pre3": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "pre2": { + "lane0": "0x00000007", + "lane1": "0x00000007", + "lane2": "0x00000007", + "lane3": "0x00000007", + "lane4": "0x00000007", + "lane5": "0x00000007", + "lane6": "0x00000007", + "lane7": "0x00000007" + }, + "pre1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "main": { + "lane0": "0x00000052", + "lane1": "0x00000052", + "lane2": "0x00000052", + "lane3": "0x00000052", + "lane4": "0x00000052", + "lane5": "0x00000052", + "lane6": "0x00000052", + "lane7": "0x00000052" + }, + "post1": { + "lane0": "0xfffffff5", "lane1": "0xfffffff5", "lane2": "0xfffffff5", "lane3": "0xfffffff5", @@ -6359,7 +15719,67 @@ } } }, - "Default": { + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": "0x6", + "lane5": "0x6", + "lane6": "0x6", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0", + "lane4": "0xffffffe0", + "lane5": "0xffffffe0", + "lane6": "0xffffffe0", + "lane7": "0xffffffe0" + }, + "main": { + "lane0": "0x80", + "lane1": "0x80", + "lane2": "0x80", + "lane3": "0x80", + "lane4": "0x80", + "lane5": "0x80", + "lane6": "0x80", + "lane7": "0x80" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, "rxpolarity": { "lane0": "0x1", "lane1": "0x0", @@ -6370,49 +15790,349 @@ "lane6": "0x1", "lane7": "0x1" } - } - }, - "28": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1)": { - "speed:100GAUI-1-S|800G.*": { - "pre3": { - "lane0": "0xfffffffe", - "lane1": "0xfffffffe", - "lane2": "0xfffffffe", - "lane3": "0xfffffffe", - "lane4": "0xfffffffe", - "lane5": "0xfffffffe", - "lane6": "0xfffffffe", - "lane7": "0xfffffffe" - }, - "pre2": { - "lane0": "0x00000007", - "lane1": "0x00000007", - "lane2": "0x00000007", - "lane3": "0x00000007", - "lane4": "0x00000007", - "lane5": "0x00000007", - "lane6": "0x00000007", - "lane7": "0x00000007" - }, - "pre1": { - "lane0": "0xffffffe8", - "lane1": "0xffffffe8", - "lane2": "0xffffffe8", - "lane3": "0xffffffe8", - "lane4": "0xffffffe8", - "lane5": "0xffffffe8", - "lane6": "0xffffffe8", - "lane7": "0xffffffe8" - }, - "main": { - "lane0": "0x00000052", - "lane1": "0x00000052", - "lane2": "0x00000052", - "lane3": "0x00000052", - "lane4": "0x00000052", - "lane5": "0x00000052", - "lane6": "0x00000052", + }, + "OPTICAL50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffb", + "lane1": "0xfffffffb", + "lane2": "0xfffffffb", + "lane3": "0xfffffffb", + "lane4": "0xfffffffb", + "lane5": "0xfffffffb", + "lane6": "0xfffffffb", + "lane7": "0xfffffffb" + }, + "main": { + "lane0": "0x9d", + "lane1": "0x9d", + "lane2": "0x9d", + "lane3": "0x9d", + "lane4": "0x9d", + "lane5": "0x9d", + "lane6": "0x9d", + "lane7": "0x9d" + }, + "post1": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "post2": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "OPTICAL25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff9", + "lane1": "0xfffffff9", + "lane2": "0xfffffff9", + "lane3": "0xfffffff9", + "lane4": "0xfffffff9", + "lane5": "0xfffffff9", + "lane6": "0xfffffff9", + "lane7": "0xfffffff9" + }, + "main": { + "lane0": "0x52", + "lane1": "0x52", + "lane2": "0x52", + "lane3": "0x52", + "lane4": "0x52", + "lane5": "0x52", + "lane6": "0x52", + "lane7": "0x52" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "COPPER50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x4", + "lane1": "0x4", + "lane2": "0x4", + "lane3": "0x4", + "lane4": "0x4", + "lane5": "0x4", + "lane6": "0x4", + "lane7": "0x4" + }, + "pre1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "main": { + "lane0": "0x6b", + "lane1": "0x6b", + "lane2": "0x6b", + "lane3": "0x6b", + "lane4": "0x6b", + "lane5": "0x6b", + "lane6": "0x6b", + "lane7": "0x6b" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "Default": { + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + } + }, + "28": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { + "pre3": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "pre2": { + "lane0": "0x00000007", + "lane1": "0x00000007", + "lane2": "0x00000007", + "lane3": "0x00000007", + "lane4": "0x00000007", + "lane5": "0x00000007", + "lane6": "0x00000007", + "lane7": "0x00000007" + }, + "pre1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "main": { + "lane0": "0x00000052", + "lane1": "0x00000052", + "lane2": "0x00000052", + "lane3": "0x00000052", + "lane4": "0x00000052", + "lane5": "0x00000052", + "lane6": "0x00000052", "lane7": "0x00000052" }, "post1": { @@ -6595,7 +16315,67 @@ } } }, - "Default": { + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": "0x6", + "lane5": "0x6", + "lane6": "0x6", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0", + "lane4": "0xffffffe0", + "lane5": "0xffffffe0", + "lane6": "0xffffffe0", + "lane7": "0xffffffe0" + }, + "main": { + "lane0": "0x80", + "lane1": "0x80", + "lane2": "0x80", + "lane3": "0x80", + "lane4": "0x80", + "lane5": "0x80", + "lane6": "0x80", + "lane7": "0x80" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, "rxpolarity": { "lane0": "0x1", "lane1": "0x0", @@ -6606,69 +16386,369 @@ "lane6": "0x1", "lane7": "0x1" } - } - }, - "29": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1)": { - "speed:100GAUI-1-S|800G.*": { - "pre3": { - "lane0": "0xffffffff", - "lane1": "0xffffffff", - "lane2": "0xffffffff", - "lane3": "0xffffffff", - "lane4": "0xffffffff", - "lane5": "0xffffffff", - "lane6": "0xffffffff", - "lane7": "0xffffffff" - }, - "pre2": { - "lane0": "0x00000004", - "lane1": "0x00000004", - "lane2": "0x00000004", - "lane3": "0x00000004", - "lane4": "0x00000004", - "lane5": "0x00000004", - "lane6": "0x00000004", - "lane7": "0x00000004" - }, - "pre1": { - "lane0": "0xffffffed", - "lane1": "0xffffffed", - "lane2": "0xffffffed", - "lane3": "0xffffffed", - "lane4": "0xffffffed", - "lane5": "0xffffffed", - "lane6": "0xffffffed", - "lane7": "0xffffffed" - }, - "main": { - "lane0": "0x00000056", - "lane1": "0x00000056", - "lane2": "0x00000056", - "lane3": "0x00000056", - "lane4": "0x00000056", - "lane5": "0x00000056", - "lane6": "0x00000056", - "lane7": "0x00000056" - }, - "post1": { - "lane0": "0xfffffffb", - "lane1": "0xfffffffb", - "lane2": "0xfffffffb", - "lane3": "0xfffffffb", - "lane4": "0xfffffffb", - "lane5": "0xfffffffb", - "lane6": "0xfffffffb", - "lane7": "0xfffffffb" - }, - "post2": { - "lane0": "0xfffffff7", - "lane1": "0xfffffff7", - "lane2": "0xfffffff7", - "lane3": "0xfffffff7", - "lane4": "0xfffffff7", - "lane5": "0xfffffff7", - "lane6": "0xfffffff7", + }, + "OPTICAL50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffb", + "lane1": "0xfffffffb", + "lane2": "0xfffffffb", + "lane3": "0xfffffffb", + "lane4": "0xfffffffb", + "lane5": "0xfffffffb", + "lane6": "0xfffffffb", + "lane7": "0xfffffffb" + }, + "main": { + "lane0": "0x9d", + "lane1": "0x9d", + "lane2": "0x9d", + "lane3": "0x9d", + "lane4": "0x9d", + "lane5": "0x9d", + "lane6": "0x9d", + "lane7": "0x9d" + }, + "post1": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "post2": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "OPTICAL25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff9", + "lane1": "0xfffffff9", + "lane2": "0xfffffff9", + "lane3": "0xfffffff9", + "lane4": "0xfffffff9", + "lane5": "0xfffffff9", + "lane6": "0xfffffff9", + "lane7": "0xfffffff9" + }, + "main": { + "lane0": "0x52", + "lane1": "0x52", + "lane2": "0x52", + "lane3": "0x52", + "lane4": "0x52", + "lane5": "0x52", + "lane6": "0x52", + "lane7": "0x52" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "COPPER50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x4", + "lane1": "0x4", + "lane2": "0x4", + "lane3": "0x4", + "lane4": "0x4", + "lane5": "0x4", + "lane6": "0x4", + "lane7": "0x4" + }, + "pre1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "main": { + "lane0": "0x6b", + "lane1": "0x6b", + "lane2": "0x6b", + "lane3": "0x6b", + "lane4": "0x6b", + "lane5": "0x6b", + "lane6": "0x6b", + "lane7": "0x6b" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "Default": { + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + } + }, + "29": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { + "pre3": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xffffffff" + }, + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004", + "lane4": "0x00000004", + "lane5": "0x00000004", + "lane6": "0x00000004", + "lane7": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffed", + "lane1": "0xffffffed", + "lane2": "0xffffffed", + "lane3": "0xffffffed", + "lane4": "0xffffffed", + "lane5": "0xffffffed", + "lane6": "0xffffffed", + "lane7": "0xffffffed" + }, + "main": { + "lane0": "0x00000056", + "lane1": "0x00000056", + "lane2": "0x00000056", + "lane3": "0x00000056", + "lane4": "0x00000056", + "lane5": "0x00000056", + "lane6": "0x00000056", + "lane7": "0x00000056" + }, + "post1": { + "lane0": "0xfffffffb", + "lane1": "0xfffffffb", + "lane2": "0xfffffffb", + "lane3": "0xfffffffb", + "lane4": "0xfffffffb", + "lane5": "0xfffffffb", + "lane6": "0xfffffffb", + "lane7": "0xfffffffb" + }, + "post2": { + "lane0": "0xfffffff7", + "lane1": "0xfffffff7", + "lane2": "0xfffffff7", + "lane3": "0xfffffff7", + "lane4": "0xfffffff7", + "lane5": "0xfffffff7", + "lane6": "0xfffffff7", "lane7": "0xfffffff7" }, "rxpolarity": { @@ -6831,7 +16911,67 @@ } } }, - "Default": { + "OPTICAL100": { + "pre3": { + "lane0": "0xfffffffc", + "lane1": "0x0", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "pre2": { + "lane0": "0xa", + "lane1": "0x6", + "lane2": "0xa", + "lane3": "0xa", + "lane4": "0xa", + "lane5": "0xa", + "lane6": "0xa", + "lane7": "0xa" + }, + "pre1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe0", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "main": { + "lane0": "0x80", + "lane1": "0x80", + "lane2": "0x80", + "lane3": "0x80", + "lane4": "0x80", + "lane5": "0x80", + "lane6": "0x80", + "lane7": "0x80" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, "rxpolarity": { "lane0": "0x1", "lane1": "0x1", @@ -6842,56 +16982,356 @@ "lane6": "0x0", "lane7": "0x0" } - } - }, - "30": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1)": { - "speed:100GAUI-1-S|800G.*": { - "pre3": { - "lane0": "0xffffffff", - "lane1": "0xffffffff", - "lane2": "0xffffffff", - "lane3": "0xffffffff", - "lane4": "0xffffffff", - "lane5": "0xffffffff", - "lane6": "0xffffffff", - "lane7": "0xffffffff" - }, - "pre2": { - "lane0": "0x00000004", - "lane1": "0x00000004", - "lane2": "0x00000004", - "lane3": "0x00000004", - "lane4": "0x00000004", - "lane5": "0x00000004", - "lane6": "0x00000004", - "lane7": "0x00000004" - }, - "pre1": { - "lane0": "0xffffffed", - "lane1": "0xffffffed", - "lane2": "0xffffffed", - "lane3": "0xffffffed", - "lane4": "0xffffffed", - "lane5": "0xffffffed", - "lane6": "0xffffffed", - "lane7": "0xffffffed" - }, - "main": { - "lane0": "0x00000056", - "lane1": "0x00000056", - "lane2": "0x00000056", - "lane3": "0x00000056", - "lane4": "0x00000056", - "lane5": "0x00000056", - "lane6": "0x00000056", - "lane7": "0x00000056" - }, - "post1": { - "lane0": "0xfffffffb", - "lane1": "0xfffffffb", - "lane2": "0xfffffffb", - "lane3": "0xfffffffb", + }, + "OPTICAL50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "main": { + "lane0": "0xa3", + "lane1": "0xa3", + "lane2": "0xa3", + "lane3": "0xa3", + "lane4": "0xa3", + "lane5": "0xa3", + "lane6": "0xa3", + "lane7": "0xa3" + }, + "post1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post2": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x1", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x1", + "lane5": "0x1", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "OPTICAL25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "main": { + "lane0": "0x47", + "lane1": "0x47", + "lane2": "0x47", + "lane3": "0x47", + "lane4": "0x47", + "lane5": "0x47", + "lane6": "0x47", + "lane7": "0x47" + }, + "post1": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x1", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x1", + "lane5": "0x1", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "COPPER50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x4", + "lane1": "0x4", + "lane2": "0x4", + "lane3": "0x4", + "lane4": "0x4", + "lane5": "0x4", + "lane6": "0x4", + "lane7": "0x4" + }, + "pre1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x1", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x1", + "lane5": "0x1", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "main": { + "lane0": "0x6b", + "lane1": "0x6b", + "lane2": "0x6b", + "lane3": "0x6b", + "lane4": "0x6b", + "lane5": "0x6b", + "lane6": "0x6b", + "lane7": "0x6b" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x1", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x1", + "lane5": "0x1", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "Default": { + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x1", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x1", + "lane5": "0x1", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "30": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { + "pre3": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xffffffff" + }, + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004", + "lane4": "0x00000004", + "lane5": "0x00000004", + "lane6": "0x00000004", + "lane7": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffed", + "lane1": "0xffffffed", + "lane2": "0xffffffed", + "lane3": "0xffffffed", + "lane4": "0xffffffed", + "lane5": "0xffffffed", + "lane6": "0xffffffed", + "lane7": "0xffffffed" + }, + "main": { + "lane0": "0x00000056", + "lane1": "0x00000056", + "lane2": "0x00000056", + "lane3": "0x00000056", + "lane4": "0x00000056", + "lane5": "0x00000056", + "lane6": "0x00000056", + "lane7": "0x00000056" + }, + "post1": { + "lane0": "0xfffffffb", + "lane1": "0xfffffffb", + "lane2": "0xfffffffb", + "lane3": "0xfffffffb", "lane4": "0xfffffffb", "lane5": "0xfffffffb", "lane6": "0xfffffffb", @@ -7067,7 +17507,67 @@ } } }, - "Default": { + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": "0x6", + "lane5": "0x6", + "lane6": "0x6", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0", + "lane4": "0xffffffe0", + "lane5": "0xffffffe0", + "lane6": "0xffffffe0", + "lane7": "0xffffffe0" + }, + "main": { + "lane0": "0x80", + "lane1": "0x80", + "lane2": "0x80", + "lane3": "0x80", + "lane4": "0x80", + "lane5": "0x80", + "lane6": "0x80", + "lane7": "0x80" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, "rxpolarity": { "lane0": "0x1", "lane1": "0x1", @@ -7078,46 +17578,346 @@ "lane6": "0x0", "lane7": "0x0" } - } - }, - "31": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1)": { - "speed:100GAUI-1-S|800G.*": { - "pre3": { - "lane0": "0xfffffffe", - "lane1": "0xfffffffe", - "lane2": "0xfffffffe", - "lane3": "0xfffffffe", - "lane4": "0xfffffffe", - "lane5": "0xfffffffe", - "lane6": "0xfffffffe", - "lane7": "0xfffffffe" - }, - "pre2": { - "lane0": "0x00000006", - "lane1": "0x00000006", - "lane2": "0x00000006", - "lane3": "0x00000006", - "lane4": "0x00000006", - "lane5": "0x00000006", - "lane6": "0x00000006", - "lane7": "0x00000006" - }, - "pre1": { - "lane0": "0xffffffe8", - "lane1": "0xffffffe8", - "lane2": "0xffffffe8", - "lane3": "0xffffffe8", - "lane4": "0xffffffe8", - "lane5": "0xffffffe8", - "lane6": "0xffffffe8", - "lane7": "0xffffffe8" - }, - "main": { - "lane0": "0x00000056", - "lane1": "0x00000056", - "lane2": "0x00000056", - "lane3": "0x00000056", + }, + "OPTICAL50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "main": { + "lane0": "0xa3", + "lane1": "0xa3", + "lane2": "0xa3", + "lane3": "0xa3", + "lane4": "0xa3", + "lane5": "0xa3", + "lane6": "0xa3", + "lane7": "0xa3" + }, + "post1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post2": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x1", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x1", + "lane5": "0x1", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "OPTICAL25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "main": { + "lane0": "0x47", + "lane1": "0x47", + "lane2": "0x47", + "lane3": "0x47", + "lane4": "0x47", + "lane5": "0x47", + "lane6": "0x47", + "lane7": "0x47" + }, + "post1": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x1", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x1", + "lane5": "0x1", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "COPPER50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x4", + "lane1": "0x4", + "lane2": "0x4", + "lane3": "0x4", + "lane4": "0x4", + "lane5": "0x4", + "lane6": "0x4", + "lane7": "0x4" + }, + "pre1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x1", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x1", + "lane5": "0x1", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "main": { + "lane0": "0x6b", + "lane1": "0x6b", + "lane2": "0x6b", + "lane3": "0x6b", + "lane4": "0x6b", + "lane5": "0x6b", + "lane6": "0x6b", + "lane7": "0x6b" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x1", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x1", + "lane5": "0x1", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "Default": { + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x1", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x1", + "lane5": "0x1", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "31": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { + "pre3": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "pre2": { + "lane0": "0x00000006", + "lane1": "0x00000006", + "lane2": "0x00000006", + "lane3": "0x00000006", + "lane4": "0x00000006", + "lane5": "0x00000006", + "lane6": "0x00000006", + "lane7": "0x00000006" + }, + "pre1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "main": { + "lane0": "0x00000056", + "lane1": "0x00000056", + "lane2": "0x00000056", + "lane3": "0x00000056", "lane4": "0x00000056", "lane5": "0x00000056", "lane6": "0x00000056", @@ -7303,7 +18103,67 @@ } } }, - "Default": { + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": "0x6", + "lane5": "0x6", + "lane6": "0x6", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0", + "lane4": "0xffffffe0", + "lane5": "0xffffffe0", + "lane6": "0xffffffe0", + "lane7": "0xffffffe0" + }, + "main": { + "lane0": "0x80", + "lane1": "0x80", + "lane2": "0x80", + "lane3": "0x80", + "lane4": "0x80", + "lane5": "0x80", + "lane6": "0x80", + "lane7": "0x80" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, "rxpolarity": { "lane0": "0x1", "lane1": "0x0", @@ -7314,56 +18174,356 @@ "lane6": "0x1", "lane7": "0x1" } - } - }, - "32": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1)": { - "speed:100GAUI-1-S|800G.*": { - "pre3": { - "lane0": "0xfffffffe", - "lane1": "0xfffffffe", - "lane2": "0xfffffffe", - "lane3": "0xfffffffe", - "lane4": "0xfffffffe", - "lane5": "0xfffffffe", - "lane6": "0xfffffffe", - "lane7": "0xfffffffe" - }, - "pre2": { - "lane0": "0x00000006", - "lane1": "0x00000006", - "lane2": "0x00000006", - "lane3": "0x00000006", - "lane4": "0x00000006", - "lane5": "0x00000006", - "lane6": "0x00000006", - "lane7": "0x00000006" - }, - "pre1": { - "lane0": "0xffffffe8", - "lane1": "0xffffffe8", - "lane2": "0xffffffe8", - "lane3": "0xffffffe8", - "lane4": "0xffffffe8", - "lane5": "0xffffffe8", - "lane6": "0xffffffe8", - "lane7": "0xffffffe8" - }, - "main": { - "lane0": "0x00000056", - "lane1": "0x00000056", - "lane2": "0x00000056", - "lane3": "0x00000056", - "lane4": "0x00000056", - "lane5": "0x00000056", - "lane6": "0x00000056", - "lane7": "0x00000056" - }, - "post1": { - "lane0": "0xfffffff7", - "lane1": "0xfffffff7", - "lane2": "0xfffffff7", - "lane3": "0xfffffff7", + }, + "OPTICAL50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffb", + "lane1": "0xfffffffb", + "lane2": "0xfffffffb", + "lane3": "0xfffffffb", + "lane4": "0xfffffffb", + "lane5": "0xfffffffb", + "lane6": "0xfffffffb", + "lane7": "0xfffffffb" + }, + "main": { + "lane0": "0x9d", + "lane1": "0x9d", + "lane2": "0x9d", + "lane3": "0x9d", + "lane4": "0x9d", + "lane5": "0x9d", + "lane6": "0x9d", + "lane7": "0x9d" + }, + "post1": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "post2": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "OPTICAL25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff9", + "lane1": "0xfffffff9", + "lane2": "0xfffffff9", + "lane3": "0xfffffff9", + "lane4": "0xfffffff9", + "lane5": "0xfffffff9", + "lane6": "0xfffffff9", + "lane7": "0xfffffff9" + }, + "main": { + "lane0": "0x52", + "lane1": "0x52", + "lane2": "0x52", + "lane3": "0x52", + "lane4": "0x52", + "lane5": "0x52", + "lane6": "0x52", + "lane7": "0x52" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "COPPER50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x4", + "lane1": "0x4", + "lane2": "0x4", + "lane3": "0x4", + "lane4": "0x4", + "lane5": "0x4", + "lane6": "0x4", + "lane7": "0x4" + }, + "pre1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "main": { + "lane0": "0x6b", + "lane1": "0x6b", + "lane2": "0x6b", + "lane3": "0x6b", + "lane4": "0x6b", + "lane5": "0x6b", + "lane6": "0x6b", + "lane7": "0x6b" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "Default": { + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + } + }, + "32": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { + "pre3": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "pre2": { + "lane0": "0x00000006", + "lane1": "0x00000006", + "lane2": "0x00000006", + "lane3": "0x00000006", + "lane4": "0x00000006", + "lane5": "0x00000006", + "lane6": "0x00000006", + "lane7": "0x00000006" + }, + "pre1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "main": { + "lane0": "0x00000056", + "lane1": "0x00000056", + "lane2": "0x00000056", + "lane3": "0x00000056", + "lane4": "0x00000056", + "lane5": "0x00000056", + "lane6": "0x00000056", + "lane7": "0x00000056" + }, + "post1": { + "lane0": "0xfffffff7", + "lane1": "0xfffffff7", + "lane2": "0xfffffff7", + "lane3": "0xfffffff7", "lane4": "0xfffffff7", "lane5": "0xfffffff7", "lane6": "0xfffffff7", @@ -7539,7 +18699,67 @@ } } }, - "Default": { + "OPTICAL100": { + "pre3": { + "lane0": "0xfffffffc", + "lane1": "0x0", + "lane2": "0xfffffffc", + "lane3": "0x0", + "lane4": "0xfffffffc", + "lane5": "0x0", + "lane6": "0xfffffffc", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0xa", + "lane1": "0x6", + "lane2": "0xa", + "lane3": "0x6", + "lane4": "0xa", + "lane5": "0x6", + "lane6": "0xa", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe0", + "lane2": "0xffffffe8", + "lane3": "0xffffffe0", + "lane4": "0xffffffe8", + "lane5": "0xffffffe0", + "lane6": "0xffffffe8", + "lane7": "0xffffffe0" + }, + "main": { + "lane0": "0x80", + "lane1": "0x80", + "lane2": "0x80", + "lane3": "0x80", + "lane4": "0x80", + "lane5": "0x80", + "lane6": "0x80", + "lane7": "0x80" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, "rxpolarity": { "lane0": "0x1", "lane1": "0x0", @@ -7550,66 +18770,366 @@ "lane6": "0x1", "lane7": "0x1" } - } - }, - "33": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1)": { - "speed:100GAUI-1-S|800G.*": { - "pre3": { - "lane0": "0xffffffff", - "lane1": "0xffffffff", - "lane2": "0xffffffff", - "lane3": "0xffffffff", - "lane4": "0xffffffff", - "lane5": "0xffffffff", - "lane6": "0xffffffff", - "lane7": "0xffffffff" - }, - "pre2": { - "lane0": "0x00000005", - "lane1": "0x00000005", - "lane2": "0x00000005", - "lane3": "0x00000005", - "lane4": "0x00000005", - "lane5": "0x00000005", - "lane6": "0x00000005", - "lane7": "0x00000005" - }, - "pre1": { - "lane0": "0xffffffee", - "lane1": "0xffffffee", - "lane2": "0xffffffee", - "lane3": "0xffffffee", - "lane4": "0xffffffee", - "lane5": "0xffffffee", - "lane6": "0xffffffee", - "lane7": "0xffffffee" - }, - "main": { - "lane0": "0x00000059", - "lane1": "0x00000059", - "lane2": "0x00000059", - "lane3": "0x00000059", - "lane4": "0x00000059", - "lane5": "0x00000059", - "lane6": "0x00000059", - "lane7": "0x00000059" - }, - "post1": { - "lane0": "0xfffffffa", - "lane1": "0xfffffffa", - "lane2": "0xfffffffa", - "lane3": "0xfffffffa", - "lane4": "0xfffffffa", - "lane5": "0xfffffffa", - "lane6": "0xfffffffa", - "lane7": "0xfffffffa" - }, - "post2": { - "lane0": "0xfffffff7", - "lane1": "0xfffffff7", - "lane2": "0xfffffff7", - "lane3": "0xfffffff7", + }, + "OPTICAL50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffb", + "lane1": "0xfffffffb", + "lane2": "0xfffffffb", + "lane3": "0xfffffffb", + "lane4": "0xfffffffb", + "lane5": "0xfffffffb", + "lane6": "0xfffffffb", + "lane7": "0xfffffffb" + }, + "main": { + "lane0": "0x9d", + "lane1": "0x9d", + "lane2": "0x9d", + "lane3": "0x9d", + "lane4": "0x9d", + "lane5": "0x9d", + "lane6": "0x9d", + "lane7": "0x9d" + }, + "post1": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "post2": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "OPTICAL25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff9", + "lane1": "0xfffffff9", + "lane2": "0xfffffff9", + "lane3": "0xfffffff9", + "lane4": "0xfffffff9", + "lane5": "0xfffffff9", + "lane6": "0xfffffff9", + "lane7": "0xfffffff9" + }, + "main": { + "lane0": "0x52", + "lane1": "0x52", + "lane2": "0x52", + "lane3": "0x52", + "lane4": "0x52", + "lane5": "0x52", + "lane6": "0x52", + "lane7": "0x52" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "COPPER50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x4", + "lane1": "0x4", + "lane2": "0x4", + "lane3": "0x4", + "lane4": "0x4", + "lane5": "0x4", + "lane6": "0x4", + "lane7": "0x4" + }, + "pre1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "main": { + "lane0": "0x6b", + "lane1": "0x6b", + "lane2": "0x6b", + "lane3": "0x6b", + "lane4": "0x6b", + "lane5": "0x6b", + "lane6": "0x6b", + "lane7": "0x6b" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "Default": { + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + } + }, + "33": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { + "pre3": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xffffffff" + }, + "pre2": { + "lane0": "0x00000005", + "lane1": "0x00000005", + "lane2": "0x00000005", + "lane3": "0x00000005", + "lane4": "0x00000005", + "lane5": "0x00000005", + "lane6": "0x00000005", + "lane7": "0x00000005" + }, + "pre1": { + "lane0": "0xffffffee", + "lane1": "0xffffffee", + "lane2": "0xffffffee", + "lane3": "0xffffffee", + "lane4": "0xffffffee", + "lane5": "0xffffffee", + "lane6": "0xffffffee", + "lane7": "0xffffffee" + }, + "main": { + "lane0": "0x00000059", + "lane1": "0x00000059", + "lane2": "0x00000059", + "lane3": "0x00000059", + "lane4": "0x00000059", + "lane5": "0x00000059", + "lane6": "0x00000059", + "lane7": "0x00000059" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0xfffffff7", + "lane1": "0xfffffff7", + "lane2": "0xfffffff7", + "lane3": "0xfffffff7", "lane4": "0xfffffff7", "lane5": "0xfffffff7", "lane6": "0xfffffff7", @@ -7775,7 +19295,67 @@ } } }, - "Default": { + "OPTICAL100": { + "pre3": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "pre2": { + "lane0": "0xa", + "lane1": "0xa", + "lane2": "0xa", + "lane3": "0xa", + "lane4": "0xa", + "lane5": "0xa", + "lane6": "0xa", + "lane7": "0xa" + }, + "pre1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "main": { + "lane0": "0x80", + "lane1": "0x80", + "lane2": "0x80", + "lane3": "0x80", + "lane4": "0x80", + "lane5": "0x80", + "lane6": "0x80", + "lane7": "0x80" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, "rxpolarity": { "lane0": "0x1", "lane1": "0x1", @@ -7786,60 +19366,360 @@ "lane6": "0x0", "lane7": "0x0" } - } - }, - "34": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1)": { - "speed:100GAUI-1-S|800G.*": { - "pre3": { - "lane0": "0xffffffff", - "lane1": "0xffffffff", - "lane2": "0xffffffff", - "lane3": "0xffffffff", - "lane4": "0xffffffff", - "lane5": "0xffffffff", - "lane6": "0xffffffff", - "lane7": "0xffffffff" - }, - "pre2": { - "lane0": "0x00000005", - "lane1": "0x00000005", - "lane2": "0x00000005", - "lane3": "0x00000005", - "lane4": "0x00000005", - "lane5": "0x00000005", - "lane6": "0x00000005", - "lane7": "0x00000005" - }, - "pre1": { - "lane0": "0xffffffee", - "lane1": "0xffffffee", - "lane2": "0xffffffee", - "lane3": "0xffffffee", - "lane4": "0xffffffee", - "lane5": "0xffffffee", - "lane6": "0xffffffee", - "lane7": "0xffffffee" - }, - "main": { - "lane0": "0x00000059", - "lane1": "0x00000059", - "lane2": "0x00000059", - "lane3": "0x00000059", - "lane4": "0x00000059", - "lane5": "0x00000059", - "lane6": "0x00000059", - "lane7": "0x00000059" - }, - "post1": { - "lane0": "0xfffffffa", - "lane1": "0xfffffffa", - "lane2": "0xfffffffa", - "lane3": "0xfffffffa", - "lane4": "0xfffffffa", - "lane5": "0xfffffffa", - "lane6": "0xfffffffa", - "lane7": "0xfffffffa" + }, + "OPTICAL50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "main": { + "lane0": "0xa3", + "lane1": "0xa3", + "lane2": "0xa3", + "lane3": "0xa3", + "lane4": "0xa3", + "lane5": "0xa3", + "lane6": "0xa3", + "lane7": "0xa3" + }, + "post1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post2": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x1", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x1", + "lane5": "0x1", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "OPTICAL25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "main": { + "lane0": "0x47", + "lane1": "0x47", + "lane2": "0x47", + "lane3": "0x47", + "lane4": "0x47", + "lane5": "0x47", + "lane6": "0x47", + "lane7": "0x47" + }, + "post1": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x1", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x1", + "lane5": "0x1", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "COPPER50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x4", + "lane1": "0x4", + "lane2": "0x4", + "lane3": "0x4", + "lane4": "0x4", + "lane5": "0x4", + "lane6": "0x4", + "lane7": "0x4" + }, + "pre1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x1", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x1", + "lane5": "0x1", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "main": { + "lane0": "0x6b", + "lane1": "0x6b", + "lane2": "0x6b", + "lane3": "0x6b", + "lane4": "0x6b", + "lane5": "0x6b", + "lane6": "0x6b", + "lane7": "0x6b" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x1", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x1", + "lane5": "0x1", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "Default": { + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x1", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x1", + "lane5": "0x1", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "34": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { + "pre3": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xffffffff" + }, + "pre2": { + "lane0": "0x00000005", + "lane1": "0x00000005", + "lane2": "0x00000005", + "lane3": "0x00000005", + "lane4": "0x00000005", + "lane5": "0x00000005", + "lane6": "0x00000005", + "lane7": "0x00000005" + }, + "pre1": { + "lane0": "0xffffffee", + "lane1": "0xffffffee", + "lane2": "0xffffffee", + "lane3": "0xffffffee", + "lane4": "0xffffffee", + "lane5": "0xffffffee", + "lane6": "0xffffffee", + "lane7": "0xffffffee" + }, + "main": { + "lane0": "0x00000059", + "lane1": "0x00000059", + "lane2": "0x00000059", + "lane3": "0x00000059", + "lane4": "0x00000059", + "lane5": "0x00000059", + "lane6": "0x00000059", + "lane7": "0x00000059" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" }, "post2": { "lane0": "0xfffffff7", @@ -8011,7 +19891,67 @@ } } }, - "Default": { + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": "0x6", + "lane5": "0x6", + "lane6": "0x6", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0", + "lane4": "0xffffffe0", + "lane5": "0xffffffe0", + "lane6": "0xffffffe0", + "lane7": "0xffffffe0" + }, + "main": { + "lane0": "0x80", + "lane1": "0x80", + "lane2": "0x80", + "lane3": "0x80", + "lane4": "0x80", + "lane5": "0x80", + "lane6": "0x80", + "lane7": "0x80" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, "rxpolarity": { "lane0": "0x1", "lane1": "0x1", @@ -8022,42 +19962,342 @@ "lane6": "0x0", "lane7": "0x0" } - } - }, - "35": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1)": { - "speed:100GAUI-1-S|800G.*": { - "pre3": { - "lane0": "0xfffffffe", - "lane1": "0xfffffffe", - "lane2": "0xfffffffe", - "lane3": "0xfffffffe", - "lane4": "0xfffffffe", - "lane5": "0xfffffffe", - "lane6": "0xfffffffe", - "lane7": "0xfffffffe" - }, - "pre2": { - "lane0": "0x00000007", - "lane1": "0x00000007", - "lane2": "0x00000007", - "lane3": "0x00000007", - "lane4": "0x00000007", - "lane5": "0x00000007", - "lane6": "0x00000007", - "lane7": "0x00000007" - }, - "pre1": { - "lane0": "0xffffffe7", - "lane1": "0xffffffe7", - "lane2": "0xffffffe7", - "lane3": "0xffffffe7", - "lane4": "0xffffffe7", - "lane5": "0xffffffe7", - "lane6": "0xffffffe7", - "lane7": "0xffffffe7" - }, - "main": { + }, + "OPTICAL50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "main": { + "lane0": "0xa3", + "lane1": "0xa3", + "lane2": "0xa3", + "lane3": "0xa3", + "lane4": "0xa3", + "lane5": "0xa3", + "lane6": "0xa3", + "lane7": "0xa3" + }, + "post1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post2": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x1", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x1", + "lane5": "0x1", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "OPTICAL25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "main": { + "lane0": "0x47", + "lane1": "0x47", + "lane2": "0x47", + "lane3": "0x47", + "lane4": "0x47", + "lane5": "0x47", + "lane6": "0x47", + "lane7": "0x47" + }, + "post1": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x1", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x1", + "lane5": "0x1", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "COPPER50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x4", + "lane1": "0x4", + "lane2": "0x4", + "lane3": "0x4", + "lane4": "0x4", + "lane5": "0x4", + "lane6": "0x4", + "lane7": "0x4" + }, + "pre1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x1", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x1", + "lane5": "0x1", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "main": { + "lane0": "0x6b", + "lane1": "0x6b", + "lane2": "0x6b", + "lane3": "0x6b", + "lane4": "0x6b", + "lane5": "0x6b", + "lane6": "0x6b", + "lane7": "0x6b" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x1", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x1", + "lane5": "0x1", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "Default": { + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x1", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x1", + "lane5": "0x1", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "35": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { + "pre3": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "pre2": { + "lane0": "0x00000007", + "lane1": "0x00000007", + "lane2": "0x00000007", + "lane3": "0x00000007", + "lane4": "0x00000007", + "lane5": "0x00000007", + "lane6": "0x00000007", + "lane7": "0x00000007" + }, + "pre1": { + "lane0": "0xffffffe7", + "lane1": "0xffffffe7", + "lane2": "0xffffffe7", + "lane3": "0xffffffe7", + "lane4": "0xffffffe7", + "lane5": "0xffffffe7", + "lane6": "0xffffffe7", + "lane7": "0xffffffe7" + }, + "main": { "lane0": "0x00000056", "lane1": "0x00000056", "lane2": "0x00000056", @@ -8247,7 +20487,67 @@ } } }, - "Default": { + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": "0x6", + "lane5": "0x6", + "lane6": "0x6", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0", + "lane4": "0xffffffe0", + "lane5": "0xffffffe0", + "lane6": "0xffffffe0", + "lane7": "0xffffffe0" + }, + "main": { + "lane0": "0x80", + "lane1": "0x80", + "lane2": "0x80", + "lane3": "0x80", + "lane4": "0x80", + "lane5": "0x80", + "lane6": "0x80", + "lane7": "0x80" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, "rxpolarity": { "lane0": "0x0", "lane1": "0x0", @@ -8258,60 +20558,360 @@ "lane6": "0x0", "lane7": "0x1" } - } - }, - "36": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1)": { - "speed:100GAUI-1-S|800G.*": { - "pre3": { - "lane0": "0xfffffffe", - "lane1": "0xfffffffe", - "lane2": "0xfffffffe", - "lane3": "0xfffffffe", - "lane4": "0xfffffffe", - "lane5": "0xfffffffe", - "lane6": "0xfffffffe", - "lane7": "0xfffffffe" - }, - "pre2": { - "lane0": "0x00000007", - "lane1": "0x00000007", - "lane2": "0x00000007", - "lane3": "0x00000007", - "lane4": "0x00000007", - "lane5": "0x00000007", - "lane6": "0x00000007", - "lane7": "0x00000007" - }, - "pre1": { - "lane0": "0xffffffe7", - "lane1": "0xffffffe7", - "lane2": "0xffffffe7", - "lane3": "0xffffffe7", - "lane4": "0xffffffe7", - "lane5": "0xffffffe7", - "lane6": "0xffffffe7", - "lane7": "0xffffffe7" - }, - "main": { - "lane0": "0x00000056", - "lane1": "0x00000056", - "lane2": "0x00000056", - "lane3": "0x00000056", - "lane4": "0x00000056", - "lane5": "0x00000056", - "lane6": "0x00000056", - "lane7": "0x00000056" - }, - "post1": { - "lane0": "0xfffffff9", - "lane1": "0xfffffff9", - "lane2": "0xfffffff9", - "lane3": "0xfffffff9", - "lane4": "0xfffffff9", - "lane5": "0xfffffff9", - "lane6": "0xfffffff9", - "lane7": "0xfffffff9" + }, + "OPTICAL50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffb", + "lane1": "0xfffffffb", + "lane2": "0xfffffffb", + "lane3": "0xfffffffb", + "lane4": "0xfffffffb", + "lane5": "0xfffffffb", + "lane6": "0xfffffffb", + "lane7": "0xfffffffb" + }, + "main": { + "lane0": "0x9d", + "lane1": "0x9d", + "lane2": "0x9d", + "lane3": "0x9d", + "lane4": "0x9d", + "lane5": "0x9d", + "lane6": "0x9d", + "lane7": "0x9d" + }, + "post1": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "post2": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x1" + } + }, + "OPTICAL25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff9", + "lane1": "0xfffffff9", + "lane2": "0xfffffff9", + "lane3": "0xfffffff9", + "lane4": "0xfffffff9", + "lane5": "0xfffffff9", + "lane6": "0xfffffff9", + "lane7": "0xfffffff9" + }, + "main": { + "lane0": "0x52", + "lane1": "0x52", + "lane2": "0x52", + "lane3": "0x52", + "lane4": "0x52", + "lane5": "0x52", + "lane6": "0x52", + "lane7": "0x52" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x1" + } + }, + "COPPER50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x4", + "lane1": "0x4", + "lane2": "0x4", + "lane3": "0x4", + "lane4": "0x4", + "lane5": "0x4", + "lane6": "0x4", + "lane7": "0x4" + }, + "pre1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x1" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "main": { + "lane0": "0x6b", + "lane1": "0x6b", + "lane2": "0x6b", + "lane3": "0x6b", + "lane4": "0x6b", + "lane5": "0x6b", + "lane6": "0x6b", + "lane7": "0x6b" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x1" + } + }, + "Default": { + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x1" + } + } + }, + "36": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { + "pre3": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "pre2": { + "lane0": "0x00000007", + "lane1": "0x00000007", + "lane2": "0x00000007", + "lane3": "0x00000007", + "lane4": "0x00000007", + "lane5": "0x00000007", + "lane6": "0x00000007", + "lane7": "0x00000007" + }, + "pre1": { + "lane0": "0xffffffe7", + "lane1": "0xffffffe7", + "lane2": "0xffffffe7", + "lane3": "0xffffffe7", + "lane4": "0xffffffe7", + "lane5": "0xffffffe7", + "lane6": "0xffffffe7", + "lane7": "0xffffffe7" + }, + "main": { + "lane0": "0x00000056", + "lane1": "0x00000056", + "lane2": "0x00000056", + "lane3": "0x00000056", + "lane4": "0x00000056", + "lane5": "0x00000056", + "lane6": "0x00000056", + "lane7": "0x00000056" + }, + "post1": { + "lane0": "0xfffffff9", + "lane1": "0xfffffff9", + "lane2": "0xfffffff9", + "lane3": "0xfffffff9", + "lane4": "0xfffffff9", + "lane5": "0xfffffff9", + "lane6": "0xfffffff9", + "lane7": "0xfffffff9" }, "post2": { "lane0": "0xfffffff5", @@ -8483,7 +21083,67 @@ } } }, - "Default": { + "OPTICAL100": { + "pre3": { + "lane0": "0xfffffffc", + "lane1": "0x0", + "lane2": "0xfffffffc", + "lane3": "0x0", + "lane4": "0xfffffffc", + "lane5": "0x0", + "lane6": "0xfffffffc", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0xa", + "lane1": "0x6", + "lane2": "0xa", + "lane3": "0x6", + "lane4": "0xa", + "lane5": "0x6", + "lane6": "0xa", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe0", + "lane2": "0xffffffe8", + "lane3": "0xffffffe0", + "lane4": "0xffffffe8", + "lane5": "0xffffffe0", + "lane6": "0xffffffe8", + "lane7": "0xffffffe0" + }, + "main": { + "lane0": "0x80", + "lane1": "0x80", + "lane2": "0x80", + "lane3": "0x80", + "lane4": "0x80", + "lane5": "0x80", + "lane6": "0x80", + "lane7": "0x80" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, "rxpolarity": { "lane0": "0x0", "lane1": "0x0", @@ -8494,62 +21154,362 @@ "lane6": "0x0", "lane7": "0x1" } - } - }, - "37": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1)": { - "speed:100GAUI-1-S|800G.*": { - "pre3": { - "lane0": "0xffffffff", - "lane1": "0xffffffff", - "lane2": "0xffffffff", - "lane3": "0xffffffff", - "lane4": "0xffffffff", - "lane5": "0xffffffff", - "lane6": "0xffffffff", - "lane7": "0xffffffff" - }, - "pre2": { - "lane0": "0x00000005", - "lane1": "0x00000005", - "lane2": "0x00000005", - "lane3": "0x00000005", - "lane4": "0x00000005", - "lane5": "0x00000005", - "lane6": "0x00000005", - "lane7": "0x00000005" - }, - "pre1": { - "lane0": "0xffffffea", - "lane1": "0xffffffea", - "lane2": "0xffffffea", - "lane3": "0xffffffea", - "lane4": "0xffffffea", - "lane5": "0xffffffea", - "lane6": "0xffffffea", - "lane7": "0xffffffea" - }, - "main": { - "lane0": "0x00000055", - "lane1": "0x00000055", - "lane2": "0x00000055", - "lane3": "0x00000055", - "lane4": "0x00000055", - "lane5": "0x00000055", - "lane6": "0x00000055", - "lane7": "0x00000055" - }, - "post1": { - "lane0": "0xfffffff5", - "lane1": "0xfffffff5", - "lane2": "0xfffffff5", - "lane3": "0xfffffff5", - "lane4": "0xfffffff5", - "lane5": "0xfffffff5", - "lane6": "0xfffffff5", - "lane7": "0xfffffff5" - }, - "post2": { + }, + "OPTICAL50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffb", + "lane1": "0xfffffffb", + "lane2": "0xfffffffb", + "lane3": "0xfffffffb", + "lane4": "0xfffffffb", + "lane5": "0xfffffffb", + "lane6": "0xfffffffb", + "lane7": "0xfffffffb" + }, + "main": { + "lane0": "0x9d", + "lane1": "0x9d", + "lane2": "0x9d", + "lane3": "0x9d", + "lane4": "0x9d", + "lane5": "0x9d", + "lane6": "0x9d", + "lane7": "0x9d" + }, + "post1": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "post2": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x1" + } + }, + "OPTICAL25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff9", + "lane1": "0xfffffff9", + "lane2": "0xfffffff9", + "lane3": "0xfffffff9", + "lane4": "0xfffffff9", + "lane5": "0xfffffff9", + "lane6": "0xfffffff9", + "lane7": "0xfffffff9" + }, + "main": { + "lane0": "0x52", + "lane1": "0x52", + "lane2": "0x52", + "lane3": "0x52", + "lane4": "0x52", + "lane5": "0x52", + "lane6": "0x52", + "lane7": "0x52" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x1" + } + }, + "COPPER50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x4", + "lane1": "0x4", + "lane2": "0x4", + "lane3": "0x4", + "lane4": "0x4", + "lane5": "0x4", + "lane6": "0x4", + "lane7": "0x4" + }, + "pre1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x1" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "main": { + "lane0": "0x6b", + "lane1": "0x6b", + "lane2": "0x6b", + "lane3": "0x6b", + "lane4": "0x6b", + "lane5": "0x6b", + "lane6": "0x6b", + "lane7": "0x6b" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x1" + } + }, + "Default": { + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x1" + } + } + }, + "37": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { + "pre3": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xffffffff" + }, + "pre2": { + "lane0": "0x00000005", + "lane1": "0x00000005", + "lane2": "0x00000005", + "lane3": "0x00000005", + "lane4": "0x00000005", + "lane5": "0x00000005", + "lane6": "0x00000005", + "lane7": "0x00000005" + }, + "pre1": { + "lane0": "0xffffffea", + "lane1": "0xffffffea", + "lane2": "0xffffffea", + "lane3": "0xffffffea", + "lane4": "0xffffffea", + "lane5": "0xffffffea", + "lane6": "0xffffffea", + "lane7": "0xffffffea" + }, + "main": { + "lane0": "0x00000055", + "lane1": "0x00000055", + "lane2": "0x00000055", + "lane3": "0x00000055", + "lane4": "0x00000055", + "lane5": "0x00000055", + "lane6": "0x00000055", + "lane7": "0x00000055" + }, + "post1": { + "lane0": "0xfffffff5", + "lane1": "0xfffffff5", + "lane2": "0xfffffff5", + "lane3": "0xfffffff5", + "lane4": "0xfffffff5", + "lane5": "0xfffffff5", + "lane6": "0xfffffff5", + "lane7": "0xfffffff5" + }, + "post2": { "lane0": "0xfffffff7", "lane1": "0xfffffff7", "lane2": "0xfffffff7", @@ -8719,7 +21679,67 @@ } } }, - "Default": { + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": "0x6", + "lane5": "0x6", + "lane6": "0x6", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0", + "lane4": "0xffffffe0", + "lane5": "0xffffffe0", + "lane6": "0xffffffe0", + "lane7": "0xffffffe0" + }, + "main": { + "lane0": "0x80", + "lane1": "0x80", + "lane2": "0x80", + "lane3": "0x80", + "lane4": "0x80", + "lane5": "0x80", + "lane6": "0x80", + "lane7": "0x80" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, "rxpolarity": { "lane0": "0x1", "lane1": "0x0", @@ -8730,56 +21750,356 @@ "lane6": "0x1", "lane7": "0x1" } - } - }, - "38": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1)": { - "speed:100GAUI-1-S|800G.*": { - "pre3": { - "lane0": "0xffffffff", - "lane1": "0xffffffff", - "lane2": "0xffffffff", - "lane3": "0xffffffff", - "lane4": "0xffffffff", - "lane5": "0xffffffff", - "lane6": "0xffffffff", - "lane7": "0xffffffff" - }, - "pre2": { - "lane0": "0x00000005", - "lane1": "0x00000005", - "lane2": "0x00000005", - "lane3": "0x00000005", - "lane4": "0x00000005", - "lane5": "0x00000005", - "lane6": "0x00000005", - "lane7": "0x00000005" - }, - "pre1": { - "lane0": "0xffffffea", - "lane1": "0xffffffea", - "lane2": "0xffffffea", - "lane3": "0xffffffea", - "lane4": "0xffffffea", - "lane5": "0xffffffea", - "lane6": "0xffffffea", - "lane7": "0xffffffea" - }, - "main": { - "lane0": "0x00000055", - "lane1": "0x00000055", - "lane2": "0x00000055", - "lane3": "0x00000055", - "lane4": "0x00000055", - "lane5": "0x00000055", - "lane6": "0x00000055", - "lane7": "0x00000055" - }, - "post1": { - "lane0": "0xfffffff5", - "lane1": "0xfffffff5", - "lane2": "0xfffffff5", - "lane3": "0xfffffff5", + }, + "OPTICAL50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "main": { + "lane0": "0xa3", + "lane1": "0xa3", + "lane2": "0xa3", + "lane3": "0xa3", + "lane4": "0xa3", + "lane5": "0xa3", + "lane6": "0xa3", + "lane7": "0xa3" + }, + "post1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post2": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "OPTICAL25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "main": { + "lane0": "0x47", + "lane1": "0x47", + "lane2": "0x47", + "lane3": "0x47", + "lane4": "0x47", + "lane5": "0x47", + "lane6": "0x47", + "lane7": "0x47" + }, + "post1": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "COPPER50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x4", + "lane1": "0x4", + "lane2": "0x4", + "lane3": "0x4", + "lane4": "0x4", + "lane5": "0x4", + "lane6": "0x4", + "lane7": "0x4" + }, + "pre1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "main": { + "lane0": "0x6b", + "lane1": "0x6b", + "lane2": "0x6b", + "lane3": "0x6b", + "lane4": "0x6b", + "lane5": "0x6b", + "lane6": "0x6b", + "lane7": "0x6b" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "Default": { + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + } + }, + "38": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { + "pre3": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xffffffff" + }, + "pre2": { + "lane0": "0x00000005", + "lane1": "0x00000005", + "lane2": "0x00000005", + "lane3": "0x00000005", + "lane4": "0x00000005", + "lane5": "0x00000005", + "lane6": "0x00000005", + "lane7": "0x00000005" + }, + "pre1": { + "lane0": "0xffffffea", + "lane1": "0xffffffea", + "lane2": "0xffffffea", + "lane3": "0xffffffea", + "lane4": "0xffffffea", + "lane5": "0xffffffea", + "lane6": "0xffffffea", + "lane7": "0xffffffea" + }, + "main": { + "lane0": "0x00000055", + "lane1": "0x00000055", + "lane2": "0x00000055", + "lane3": "0x00000055", + "lane4": "0x00000055", + "lane5": "0x00000055", + "lane6": "0x00000055", + "lane7": "0x00000055" + }, + "post1": { + "lane0": "0xfffffff5", + "lane1": "0xfffffff5", + "lane2": "0xfffffff5", + "lane3": "0xfffffff5", "lane4": "0xfffffff5", "lane5": "0xfffffff5", "lane6": "0xfffffff5", @@ -8955,7 +22275,67 @@ } } }, - "Default": { + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": "0x6", + "lane5": "0x6", + "lane6": "0x6", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0", + "lane4": "0xffffffe0", + "lane5": "0xffffffe0", + "lane6": "0xffffffe0", + "lane7": "0xffffffe0" + }, + "main": { + "lane0": "0x80", + "lane1": "0x80", + "lane2": "0x80", + "lane3": "0x80", + "lane4": "0x80", + "lane5": "0x80", + "lane6": "0x80", + "lane7": "0x80" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, "rxpolarity": { "lane0": "0x1", "lane1": "0x0", @@ -8966,46 +22346,346 @@ "lane6": "0x1", "lane7": "0x1" } - } - }, - "39": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1)": { - "speed:100GAUI-1-S|800G.*": { - "pre3": { - "lane0": "0xffffffff", - "lane1": "0xffffffff", - "lane2": "0xffffffff", - "lane3": "0xffffffff", - "lane4": "0xffffffff", - "lane5": "0xffffffff", - "lane6": "0xffffffff", - "lane7": "0xffffffff" - }, - "pre2": { - "lane0": "0x00000005", - "lane1": "0x00000005", - "lane2": "0x00000005", - "lane3": "0x00000005", - "lane4": "0x00000005", - "lane5": "0x00000005", - "lane6": "0x00000005", - "lane7": "0x00000005" - }, - "pre1": { - "lane0": "0xffffffea", - "lane1": "0xffffffea", - "lane2": "0xffffffea", - "lane3": "0xffffffea", - "lane4": "0xffffffea", - "lane5": "0xffffffea", - "lane6": "0xffffffea", - "lane7": "0xffffffea" - }, - "main": { - "lane0": "0x00000055", - "lane1": "0x00000055", - "lane2": "0x00000055", - "lane3": "0x00000055", + }, + "OPTICAL50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "main": { + "lane0": "0xa3", + "lane1": "0xa3", + "lane2": "0xa3", + "lane3": "0xa3", + "lane4": "0xa3", + "lane5": "0xa3", + "lane6": "0xa3", + "lane7": "0xa3" + }, + "post1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post2": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "OPTICAL25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "main": { + "lane0": "0x47", + "lane1": "0x47", + "lane2": "0x47", + "lane3": "0x47", + "lane4": "0x47", + "lane5": "0x47", + "lane6": "0x47", + "lane7": "0x47" + }, + "post1": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "COPPER50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x4", + "lane1": "0x4", + "lane2": "0x4", + "lane3": "0x4", + "lane4": "0x4", + "lane5": "0x4", + "lane6": "0x4", + "lane7": "0x4" + }, + "pre1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "main": { + "lane0": "0x6b", + "lane1": "0x6b", + "lane2": "0x6b", + "lane3": "0x6b", + "lane4": "0x6b", + "lane5": "0x6b", + "lane6": "0x6b", + "lane7": "0x6b" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "Default": { + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + } + }, + "39": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { + "pre3": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xffffffff" + }, + "pre2": { + "lane0": "0x00000005", + "lane1": "0x00000005", + "lane2": "0x00000005", + "lane3": "0x00000005", + "lane4": "0x00000005", + "lane5": "0x00000005", + "lane6": "0x00000005", + "lane7": "0x00000005" + }, + "pre1": { + "lane0": "0xffffffea", + "lane1": "0xffffffea", + "lane2": "0xffffffea", + "lane3": "0xffffffea", + "lane4": "0xffffffea", + "lane5": "0xffffffea", + "lane6": "0xffffffea", + "lane7": "0xffffffea" + }, + "main": { + "lane0": "0x00000055", + "lane1": "0x00000055", + "lane2": "0x00000055", + "lane3": "0x00000055", "lane4": "0x00000055", "lane5": "0x00000055", "lane6": "0x00000055", @@ -9191,7 +22871,67 @@ } } }, - "Default": { + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": "0x6", + "lane5": "0x6", + "lane6": "0x6", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0", + "lane4": "0xffffffe0", + "lane5": "0xffffffe0", + "lane6": "0xffffffe0", + "lane7": "0xffffffe0" + }, + "main": { + "lane0": "0x80", + "lane1": "0x80", + "lane2": "0x80", + "lane3": "0x80", + "lane4": "0x80", + "lane5": "0x80", + "lane6": "0x80", + "lane7": "0x80" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, "rxpolarity": { "lane0": "0x1", "lane1": "0x0", @@ -9202,56 +22942,356 @@ "lane6": "0x0", "lane7": "0x0" } - } - }, - "40": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1)": { - "speed:100GAUI-1-S|800G.*": { - "pre3": { - "lane0": "0xffffffff", - "lane1": "0xffffffff", - "lane2": "0xffffffff", - "lane3": "0xffffffff", - "lane4": "0xffffffff", - "lane5": "0xffffffff", - "lane6": "0xffffffff", - "lane7": "0xffffffff" - }, - "pre2": { - "lane0": "0x00000005", - "lane1": "0x00000005", - "lane2": "0x00000005", - "lane3": "0x00000005", - "lane4": "0x00000005", - "lane5": "0x00000005", - "lane6": "0x00000005", - "lane7": "0x00000005" - }, - "pre1": { - "lane0": "0xffffffea", - "lane1": "0xffffffea", - "lane2": "0xffffffea", - "lane3": "0xffffffea", - "lane4": "0xffffffea", - "lane5": "0xffffffea", - "lane6": "0xffffffea", - "lane7": "0xffffffea" - }, - "main": { - "lane0": "0x00000055", - "lane1": "0x00000055", - "lane2": "0x00000055", - "lane3": "0x00000055", - "lane4": "0x00000055", - "lane5": "0x00000055", - "lane6": "0x00000055", - "lane7": "0x00000055" - }, - "post1": { - "lane0": "0xfffffff5", - "lane1": "0xfffffff5", - "lane2": "0xfffffff5", - "lane3": "0xfffffff5", + }, + "OPTICAL50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffb", + "lane1": "0xfffffffb", + "lane2": "0xfffffffb", + "lane3": "0xfffffffb", + "lane4": "0xfffffffb", + "lane5": "0xfffffffb", + "lane6": "0xfffffffb", + "lane7": "0xfffffffb" + }, + "main": { + "lane0": "0x9d", + "lane1": "0x9d", + "lane2": "0x9d", + "lane3": "0x9d", + "lane4": "0x9d", + "lane5": "0x9d", + "lane6": "0x9d", + "lane7": "0x9d" + }, + "post1": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "post2": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "OPTICAL25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff9", + "lane1": "0xfffffff9", + "lane2": "0xfffffff9", + "lane3": "0xfffffff9", + "lane4": "0xfffffff9", + "lane5": "0xfffffff9", + "lane6": "0xfffffff9", + "lane7": "0xfffffff9" + }, + "main": { + "lane0": "0x52", + "lane1": "0x52", + "lane2": "0x52", + "lane3": "0x52", + "lane4": "0x52", + "lane5": "0x52", + "lane6": "0x52", + "lane7": "0x52" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "COPPER50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x4", + "lane1": "0x4", + "lane2": "0x4", + "lane3": "0x4", + "lane4": "0x4", + "lane5": "0x4", + "lane6": "0x4", + "lane7": "0x4" + }, + "pre1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "main": { + "lane0": "0x6b", + "lane1": "0x6b", + "lane2": "0x6b", + "lane3": "0x6b", + "lane4": "0x6b", + "lane5": "0x6b", + "lane6": "0x6b", + "lane7": "0x6b" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "Default": { + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "40": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { + "pre3": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xffffffff" + }, + "pre2": { + "lane0": "0x00000005", + "lane1": "0x00000005", + "lane2": "0x00000005", + "lane3": "0x00000005", + "lane4": "0x00000005", + "lane5": "0x00000005", + "lane6": "0x00000005", + "lane7": "0x00000005" + }, + "pre1": { + "lane0": "0xffffffea", + "lane1": "0xffffffea", + "lane2": "0xffffffea", + "lane3": "0xffffffea", + "lane4": "0xffffffea", + "lane5": "0xffffffea", + "lane6": "0xffffffea", + "lane7": "0xffffffea" + }, + "main": { + "lane0": "0x00000055", + "lane1": "0x00000055", + "lane2": "0x00000055", + "lane3": "0x00000055", + "lane4": "0x00000055", + "lane5": "0x00000055", + "lane6": "0x00000055", + "lane7": "0x00000055" + }, + "post1": { + "lane0": "0xfffffff5", + "lane1": "0xfffffff5", + "lane2": "0xfffffff5", + "lane3": "0xfffffff5", "lane4": "0xfffffff5", "lane5": "0xfffffff5", "lane6": "0xfffffff5", @@ -9427,7 +23467,67 @@ } } }, - "Default": { + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": "0x6", + "lane5": "0x6", + "lane6": "0x6", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0", + "lane4": "0xffffffe0", + "lane5": "0xffffffe0", + "lane6": "0xffffffe0", + "lane7": "0xffffffe0" + }, + "main": { + "lane0": "0x80", + "lane1": "0x80", + "lane2": "0x80", + "lane3": "0x80", + "lane4": "0x80", + "lane5": "0x80", + "lane6": "0x80", + "lane7": "0x80" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, "rxpolarity": { "lane0": "0x0", "lane1": "0x0", @@ -9438,62 +23538,362 @@ "lane6": "0x0", "lane7": "0x1" } - } - }, - "41": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1)": { - "speed:100GAUI-1-S|800G.*": { - "pre3": { - "lane0": "0xffffffff", - "lane1": "0xffffffff", - "lane2": "0xffffffff", - "lane3": "0xffffffff", - "lane4": "0xffffffff", - "lane5": "0xffffffff", - "lane6": "0xffffffff", - "lane7": "0xffffffff" - }, - "pre2": { - "lane0": "0x00000006", - "lane1": "0x00000006", - "lane2": "0x00000006", - "lane3": "0x00000006", - "lane4": "0x00000006", - "lane5": "0x00000006", - "lane6": "0x00000006", - "lane7": "0x00000006" - }, - "pre1": { - "lane0": "0xffffffe6", - "lane1": "0xffffffe6", - "lane2": "0xffffffe6", - "lane3": "0xffffffe6", - "lane4": "0xffffffe6", - "lane5": "0xffffffe6", - "lane6": "0xffffffe6", - "lane7": "0xffffffe6" - }, - "main": { - "lane0": "0x00000064", - "lane1": "0x00000064", - "lane2": "0x00000064", - "lane3": "0x00000064", - "lane4": "0x00000064", - "lane5": "0x00000064", - "lane6": "0x00000064", - "lane7": "0x00000064" - }, - "post1": { - "lane0": "0xfffffff6", - "lane1": "0xfffffff6", - "lane2": "0xfffffff6", - "lane3": "0xfffffff6", - "lane4": "0xfffffff6", - "lane5": "0xfffffff6", - "lane6": "0xfffffff6", - "lane7": "0xfffffff6" - }, - "post2": { + }, + "OPTICAL50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffb", + "lane1": "0xfffffffb", + "lane2": "0xfffffffb", + "lane3": "0xfffffffb", + "lane4": "0xfffffffb", + "lane5": "0xfffffffb", + "lane6": "0xfffffffb", + "lane7": "0xfffffffb" + }, + "main": { + "lane0": "0x9d", + "lane1": "0x9d", + "lane2": "0x9d", + "lane3": "0x9d", + "lane4": "0x9d", + "lane5": "0x9d", + "lane6": "0x9d", + "lane7": "0x9d" + }, + "post1": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "post2": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x1" + } + }, + "OPTICAL25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff9", + "lane1": "0xfffffff9", + "lane2": "0xfffffff9", + "lane3": "0xfffffff9", + "lane4": "0xfffffff9", + "lane5": "0xfffffff9", + "lane6": "0xfffffff9", + "lane7": "0xfffffff9" + }, + "main": { + "lane0": "0x52", + "lane1": "0x52", + "lane2": "0x52", + "lane3": "0x52", + "lane4": "0x52", + "lane5": "0x52", + "lane6": "0x52", + "lane7": "0x52" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x1" + } + }, + "COPPER50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x4", + "lane1": "0x4", + "lane2": "0x4", + "lane3": "0x4", + "lane4": "0x4", + "lane5": "0x4", + "lane6": "0x4", + "lane7": "0x4" + }, + "pre1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x1" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "main": { + "lane0": "0x6b", + "lane1": "0x6b", + "lane2": "0x6b", + "lane3": "0x6b", + "lane4": "0x6b", + "lane5": "0x6b", + "lane6": "0x6b", + "lane7": "0x6b" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x1" + } + }, + "Default": { + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x1" + } + } + }, + "41": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { + "pre3": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xffffffff" + }, + "pre2": { + "lane0": "0x00000006", + "lane1": "0x00000006", + "lane2": "0x00000006", + "lane3": "0x00000006", + "lane4": "0x00000006", + "lane5": "0x00000006", + "lane6": "0x00000006", + "lane7": "0x00000006" + }, + "pre1": { + "lane0": "0xffffffe6", + "lane1": "0xffffffe6", + "lane2": "0xffffffe6", + "lane3": "0xffffffe6", + "lane4": "0xffffffe6", + "lane5": "0xffffffe6", + "lane6": "0xffffffe6", + "lane7": "0xffffffe6" + }, + "main": { + "lane0": "0x00000064", + "lane1": "0x00000064", + "lane2": "0x00000064", + "lane3": "0x00000064", + "lane4": "0x00000064", + "lane5": "0x00000064", + "lane6": "0x00000064", + "lane7": "0x00000064" + }, + "post1": { + "lane0": "0xfffffff6", + "lane1": "0xfffffff6", + "lane2": "0xfffffff6", + "lane3": "0xfffffff6", + "lane4": "0xfffffff6", + "lane5": "0xfffffff6", + "lane6": "0xfffffff6", + "lane7": "0xfffffff6" + }, + "post2": { "lane0": "0xfffffff3", "lane1": "0xfffffff3", "lane2": "0xfffffff3", @@ -9663,7 +24063,67 @@ } } }, - "Default": { + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": "0x6", + "lane5": "0x6", + "lane6": "0x6", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0", + "lane4": "0xffffffe0", + "lane5": "0xffffffe0", + "lane6": "0xffffffe0", + "lane7": "0xffffffe0" + }, + "main": { + "lane0": "0x80", + "lane1": "0x80", + "lane2": "0x80", + "lane3": "0x80", + "lane4": "0x80", + "lane5": "0x80", + "lane6": "0x80", + "lane7": "0x80" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, "rxpolarity": { "lane0": "0x1", "lane1": "0x0", @@ -9674,56 +24134,356 @@ "lane6": "0x1", "lane7": "0x1" } - } - }, - "42": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1)": { - "speed:100GAUI-1-S|800G.*": { - "pre3": { - "lane0": "0xffffffff", - "lane1": "0xffffffff", - "lane2": "0xffffffff", - "lane3": "0xffffffff", - "lane4": "0xffffffff", - "lane5": "0xffffffff", - "lane6": "0xffffffff", - "lane7": "0xffffffff" - }, - "pre2": { - "lane0": "0x00000006", - "lane1": "0x00000006", - "lane2": "0x00000006", - "lane3": "0x00000006", - "lane4": "0x00000006", - "lane5": "0x00000006", - "lane6": "0x00000006", - "lane7": "0x00000006" - }, - "pre1": { - "lane0": "0xffffffe6", - "lane1": "0xffffffe6", - "lane2": "0xffffffe6", - "lane3": "0xffffffe6", - "lane4": "0xffffffe6", - "lane5": "0xffffffe6", - "lane6": "0xffffffe6", - "lane7": "0xffffffe6" - }, - "main": { - "lane0": "0x00000064", - "lane1": "0x00000064", - "lane2": "0x00000064", - "lane3": "0x00000064", - "lane4": "0x00000064", - "lane5": "0x00000064", - "lane6": "0x00000064", - "lane7": "0x00000064" - }, - "post1": { - "lane0": "0xfffffff6", - "lane1": "0xfffffff6", - "lane2": "0xfffffff6", - "lane3": "0xfffffff6", + }, + "OPTICAL50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "main": { + "lane0": "0xa3", + "lane1": "0xa3", + "lane2": "0xa3", + "lane3": "0xa3", + "lane4": "0xa3", + "lane5": "0xa3", + "lane6": "0xa3", + "lane7": "0xa3" + }, + "post1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post2": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "OPTICAL25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "main": { + "lane0": "0x47", + "lane1": "0x47", + "lane2": "0x47", + "lane3": "0x47", + "lane4": "0x47", + "lane5": "0x47", + "lane6": "0x47", + "lane7": "0x47" + }, + "post1": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "COPPER50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x4", + "lane1": "0x4", + "lane2": "0x4", + "lane3": "0x4", + "lane4": "0x4", + "lane5": "0x4", + "lane6": "0x4", + "lane7": "0x4" + }, + "pre1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "main": { + "lane0": "0x6b", + "lane1": "0x6b", + "lane2": "0x6b", + "lane3": "0x6b", + "lane4": "0x6b", + "lane5": "0x6b", + "lane6": "0x6b", + "lane7": "0x6b" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "Default": { + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + } + }, + "42": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { + "pre3": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xffffffff" + }, + "pre2": { + "lane0": "0x00000006", + "lane1": "0x00000006", + "lane2": "0x00000006", + "lane3": "0x00000006", + "lane4": "0x00000006", + "lane5": "0x00000006", + "lane6": "0x00000006", + "lane7": "0x00000006" + }, + "pre1": { + "lane0": "0xffffffe6", + "lane1": "0xffffffe6", + "lane2": "0xffffffe6", + "lane3": "0xffffffe6", + "lane4": "0xffffffe6", + "lane5": "0xffffffe6", + "lane6": "0xffffffe6", + "lane7": "0xffffffe6" + }, + "main": { + "lane0": "0x00000064", + "lane1": "0x00000064", + "lane2": "0x00000064", + "lane3": "0x00000064", + "lane4": "0x00000064", + "lane5": "0x00000064", + "lane6": "0x00000064", + "lane7": "0x00000064" + }, + "post1": { + "lane0": "0xfffffff6", + "lane1": "0xfffffff6", + "lane2": "0xfffffff6", + "lane3": "0xfffffff6", "lane4": "0xfffffff6", "lane5": "0xfffffff6", "lane6": "0xfffffff6", @@ -9899,7 +24659,67 @@ } } }, - "Default": { + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": "0x6", + "lane5": "0x6", + "lane6": "0x6", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0", + "lane4": "0xffffffe0", + "lane5": "0xffffffe0", + "lane6": "0xffffffe0", + "lane7": "0xffffffe0" + }, + "main": { + "lane0": "0x80", + "lane1": "0x80", + "lane2": "0x80", + "lane3": "0x80", + "lane4": "0x80", + "lane5": "0x80", + "lane6": "0x80", + "lane7": "0x80" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, "rxpolarity": { "lane0": "0x1", "lane1": "0x0", @@ -9910,46 +24730,346 @@ "lane6": "0x1", "lane7": "0x1" } - } - }, - "43": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1)": { - "speed:100GAUI-1-S|800G.*": { - "pre3": { - "lane0": "0xffffffff", - "lane1": "0xffffffff", - "lane2": "0xffffffff", - "lane3": "0xffffffff", - "lane4": "0xffffffff", - "lane5": "0xffffffff", - "lane6": "0xffffffff", - "lane7": "0xffffffff" - }, - "pre2": { - "lane0": "0x00000006", - "lane1": "0x00000006", - "lane2": "0x00000006", - "lane3": "0x00000006", - "lane4": "0x00000006", - "lane5": "0x00000006", - "lane6": "0x00000006", - "lane7": "0x00000006" - }, - "pre1": { - "lane0": "0xffffffe6", - "lane1": "0xffffffe6", - "lane2": "0xffffffe6", - "lane3": "0xffffffe6", - "lane4": "0xffffffe6", - "lane5": "0xffffffe6", - "lane6": "0xffffffe6", - "lane7": "0xffffffe6" - }, - "main": { - "lane0": "0x00000064", - "lane1": "0x00000064", - "lane2": "0x00000064", - "lane3": "0x00000064", + }, + "OPTICAL50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "main": { + "lane0": "0xa3", + "lane1": "0xa3", + "lane2": "0xa3", + "lane3": "0xa3", + "lane4": "0xa3", + "lane5": "0xa3", + "lane6": "0xa3", + "lane7": "0xa3" + }, + "post1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post2": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "OPTICAL25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "main": { + "lane0": "0x47", + "lane1": "0x47", + "lane2": "0x47", + "lane3": "0x47", + "lane4": "0x47", + "lane5": "0x47", + "lane6": "0x47", + "lane7": "0x47" + }, + "post1": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "COPPER50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x4", + "lane1": "0x4", + "lane2": "0x4", + "lane3": "0x4", + "lane4": "0x4", + "lane5": "0x4", + "lane6": "0x4", + "lane7": "0x4" + }, + "pre1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "main": { + "lane0": "0x6b", + "lane1": "0x6b", + "lane2": "0x6b", + "lane3": "0x6b", + "lane4": "0x6b", + "lane5": "0x6b", + "lane6": "0x6b", + "lane7": "0x6b" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "Default": { + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + } + }, + "43": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { + "pre3": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xffffffff" + }, + "pre2": { + "lane0": "0x00000006", + "lane1": "0x00000006", + "lane2": "0x00000006", + "lane3": "0x00000006", + "lane4": "0x00000006", + "lane5": "0x00000006", + "lane6": "0x00000006", + "lane7": "0x00000006" + }, + "pre1": { + "lane0": "0xffffffe6", + "lane1": "0xffffffe6", + "lane2": "0xffffffe6", + "lane3": "0xffffffe6", + "lane4": "0xffffffe6", + "lane5": "0xffffffe6", + "lane6": "0xffffffe6", + "lane7": "0xffffffe6" + }, + "main": { + "lane0": "0x00000064", + "lane1": "0x00000064", + "lane2": "0x00000064", + "lane3": "0x00000064", "lane4": "0x00000064", "lane5": "0x00000064", "lane6": "0x00000064", @@ -10135,7 +25255,67 @@ } } }, - "Default": { + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": "0x6", + "lane5": "0x6", + "lane6": "0x6", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0", + "lane4": "0xffffffe0", + "lane5": "0xffffffe0", + "lane6": "0xffffffe0", + "lane7": "0xffffffe0" + }, + "main": { + "lane0": "0x80", + "lane1": "0x80", + "lane2": "0x80", + "lane3": "0x80", + "lane4": "0x80", + "lane5": "0x80", + "lane6": "0x80", + "lane7": "0x80" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, "rxpolarity": { "lane0": "0x0", "lane1": "0x0", @@ -10146,56 +25326,356 @@ "lane6": "0x0", "lane7": "0x1" } - } - }, - "44": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1)": { - "speed:100GAUI-1-S|800G.*": { - "pre3": { - "lane0": "0xffffffff", - "lane1": "0xffffffff", - "lane2": "0xffffffff", - "lane3": "0xffffffff", - "lane4": "0xffffffff", - "lane5": "0xffffffff", - "lane6": "0xffffffff", - "lane7": "0xffffffff" - }, - "pre2": { - "lane0": "0x00000006", - "lane1": "0x00000006", - "lane2": "0x00000006", - "lane3": "0x00000006", - "lane4": "0x00000006", - "lane5": "0x00000006", - "lane6": "0x00000006", - "lane7": "0x00000006" - }, - "pre1": { - "lane0": "0xffffffe6", - "lane1": "0xffffffe6", - "lane2": "0xffffffe6", - "lane3": "0xffffffe6", - "lane4": "0xffffffe6", - "lane5": "0xffffffe6", - "lane6": "0xffffffe6", - "lane7": "0xffffffe6" - }, - "main": { - "lane0": "0x00000064", - "lane1": "0x00000064", - "lane2": "0x00000064", - "lane3": "0x00000064", - "lane4": "0x00000064", - "lane5": "0x00000064", - "lane6": "0x00000064", - "lane7": "0x00000064" - }, - "post1": { - "lane0": "0xfffffff6", - "lane1": "0xfffffff6", - "lane2": "0xfffffff6", - "lane3": "0xfffffff6", + }, + "OPTICAL50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffb", + "lane1": "0xfffffffb", + "lane2": "0xfffffffb", + "lane3": "0xfffffffb", + "lane4": "0xfffffffb", + "lane5": "0xfffffffb", + "lane6": "0xfffffffb", + "lane7": "0xfffffffb" + }, + "main": { + "lane0": "0x9d", + "lane1": "0x9d", + "lane2": "0x9d", + "lane3": "0x9d", + "lane4": "0x9d", + "lane5": "0x9d", + "lane6": "0x9d", + "lane7": "0x9d" + }, + "post1": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "post2": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x1" + } + }, + "OPTICAL25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff9", + "lane1": "0xfffffff9", + "lane2": "0xfffffff9", + "lane3": "0xfffffff9", + "lane4": "0xfffffff9", + "lane5": "0xfffffff9", + "lane6": "0xfffffff9", + "lane7": "0xfffffff9" + }, + "main": { + "lane0": "0x52", + "lane1": "0x52", + "lane2": "0x52", + "lane3": "0x52", + "lane4": "0x52", + "lane5": "0x52", + "lane6": "0x52", + "lane7": "0x52" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x1" + } + }, + "COPPER50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x4", + "lane1": "0x4", + "lane2": "0x4", + "lane3": "0x4", + "lane4": "0x4", + "lane5": "0x4", + "lane6": "0x4", + "lane7": "0x4" + }, + "pre1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x1" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "main": { + "lane0": "0x6b", + "lane1": "0x6b", + "lane2": "0x6b", + "lane3": "0x6b", + "lane4": "0x6b", + "lane5": "0x6b", + "lane6": "0x6b", + "lane7": "0x6b" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x1" + } + }, + "Default": { + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x1" + } + } + }, + "44": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { + "pre3": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xffffffff" + }, + "pre2": { + "lane0": "0x00000006", + "lane1": "0x00000006", + "lane2": "0x00000006", + "lane3": "0x00000006", + "lane4": "0x00000006", + "lane5": "0x00000006", + "lane6": "0x00000006", + "lane7": "0x00000006" + }, + "pre1": { + "lane0": "0xffffffe6", + "lane1": "0xffffffe6", + "lane2": "0xffffffe6", + "lane3": "0xffffffe6", + "lane4": "0xffffffe6", + "lane5": "0xffffffe6", + "lane6": "0xffffffe6", + "lane7": "0xffffffe6" + }, + "main": { + "lane0": "0x00000064", + "lane1": "0x00000064", + "lane2": "0x00000064", + "lane3": "0x00000064", + "lane4": "0x00000064", + "lane5": "0x00000064", + "lane6": "0x00000064", + "lane7": "0x00000064" + }, + "post1": { + "lane0": "0xfffffff6", + "lane1": "0xfffffff6", + "lane2": "0xfffffff6", + "lane3": "0xfffffff6", "lane4": "0xfffffff6", "lane5": "0xfffffff6", "lane6": "0xfffffff6", @@ -10371,7 +25851,67 @@ } } }, - "Default": { + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": "0x6", + "lane5": "0x6", + "lane6": "0x6", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0", + "lane4": "0xffffffe0", + "lane5": "0xffffffe0", + "lane6": "0xffffffe0", + "lane7": "0xffffffe0" + }, + "main": { + "lane0": "0x80", + "lane1": "0x80", + "lane2": "0x80", + "lane3": "0x80", + "lane4": "0x80", + "lane5": "0x80", + "lane6": "0x80", + "lane7": "0x80" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, "rxpolarity": { "lane0": "0x0", "lane1": "0x0", @@ -10382,62 +25922,362 @@ "lane6": "0x0", "lane7": "0x1" } - } - }, - "45": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1)": { - "speed:100GAUI-1-S|800G.*": { - "pre3": { - "lane0": "0xffffffff", - "lane1": "0xffffffff", - "lane2": "0xffffffff", - "lane3": "0xffffffff", - "lane4": "0xffffffff", - "lane5": "0xffffffff", - "lane6": "0xffffffff", - "lane7": "0xffffffff" - }, - "pre2": { - "lane0": "0x00000006", - "lane1": "0x00000006", - "lane2": "0x00000006", - "lane3": "0x00000006", - "lane4": "0x00000006", - "lane5": "0x00000006", - "lane6": "0x00000006", - "lane7": "0x00000006" - }, - "pre1": { - "lane0": "0xffffffe7", - "lane1": "0xffffffe7", - "lane2": "0xffffffe7", - "lane3": "0xffffffe7", - "lane4": "0xffffffe7", - "lane5": "0xffffffe7", - "lane6": "0xffffffe7", - "lane7": "0xffffffe7" - }, - "main": { - "lane0": "0x00000063", - "lane1": "0x00000063", - "lane2": "0x00000063", - "lane3": "0x00000063", - "lane4": "0x00000063", - "lane5": "0x00000063", - "lane6": "0x00000063", - "lane7": "0x00000063" - }, - "post1": { - "lane0": "0xfffffff5", - "lane1": "0xfffffff5", - "lane2": "0xfffffff5", - "lane3": "0xfffffff5", - "lane4": "0xfffffff5", - "lane5": "0xfffffff5", - "lane6": "0xfffffff5", - "lane7": "0xfffffff5" - }, - "post2": { + }, + "OPTICAL50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffb", + "lane1": "0xfffffffb", + "lane2": "0xfffffffb", + "lane3": "0xfffffffb", + "lane4": "0xfffffffb", + "lane5": "0xfffffffb", + "lane6": "0xfffffffb", + "lane7": "0xfffffffb" + }, + "main": { + "lane0": "0x9d", + "lane1": "0x9d", + "lane2": "0x9d", + "lane3": "0x9d", + "lane4": "0x9d", + "lane5": "0x9d", + "lane6": "0x9d", + "lane7": "0x9d" + }, + "post1": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "post2": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x1" + } + }, + "OPTICAL25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff9", + "lane1": "0xfffffff9", + "lane2": "0xfffffff9", + "lane3": "0xfffffff9", + "lane4": "0xfffffff9", + "lane5": "0xfffffff9", + "lane6": "0xfffffff9", + "lane7": "0xfffffff9" + }, + "main": { + "lane0": "0x52", + "lane1": "0x52", + "lane2": "0x52", + "lane3": "0x52", + "lane4": "0x52", + "lane5": "0x52", + "lane6": "0x52", + "lane7": "0x52" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x1" + } + }, + "COPPER50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x4", + "lane1": "0x4", + "lane2": "0x4", + "lane3": "0x4", + "lane4": "0x4", + "lane5": "0x4", + "lane6": "0x4", + "lane7": "0x4" + }, + "pre1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x1" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "main": { + "lane0": "0x6b", + "lane1": "0x6b", + "lane2": "0x6b", + "lane3": "0x6b", + "lane4": "0x6b", + "lane5": "0x6b", + "lane6": "0x6b", + "lane7": "0x6b" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x1" + } + }, + "Default": { + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x1" + } + } + }, + "45": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { + "pre3": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xffffffff" + }, + "pre2": { + "lane0": "0x00000006", + "lane1": "0x00000006", + "lane2": "0x00000006", + "lane3": "0x00000006", + "lane4": "0x00000006", + "lane5": "0x00000006", + "lane6": "0x00000006", + "lane7": "0x00000006" + }, + "pre1": { + "lane0": "0xffffffe7", + "lane1": "0xffffffe7", + "lane2": "0xffffffe7", + "lane3": "0xffffffe7", + "lane4": "0xffffffe7", + "lane5": "0xffffffe7", + "lane6": "0xffffffe7", + "lane7": "0xffffffe7" + }, + "main": { + "lane0": "0x00000063", + "lane1": "0x00000063", + "lane2": "0x00000063", + "lane3": "0x00000063", + "lane4": "0x00000063", + "lane5": "0x00000063", + "lane6": "0x00000063", + "lane7": "0x00000063" + }, + "post1": { + "lane0": "0xfffffff5", + "lane1": "0xfffffff5", + "lane2": "0xfffffff5", + "lane3": "0xfffffff5", + "lane4": "0xfffffff5", + "lane5": "0xfffffff5", + "lane6": "0xfffffff5", + "lane7": "0xfffffff5" + }, + "post2": { "lane0": "0xfffffff4", "lane1": "0xfffffff4", "lane2": "0xfffffff4", @@ -10607,7 +26447,67 @@ } } }, - "Default": { + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": "0x6", + "lane5": "0x6", + "lane6": "0x6", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0", + "lane4": "0xffffffe0", + "lane5": "0xffffffe0", + "lane6": "0xffffffe0", + "lane7": "0xffffffe0" + }, + "main": { + "lane0": "0x80", + "lane1": "0x80", + "lane2": "0x80", + "lane3": "0x80", + "lane4": "0x80", + "lane5": "0x80", + "lane6": "0x80", + "lane7": "0x80" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, "rxpolarity": { "lane0": "0x1", "lane1": "0x0", @@ -10618,56 +26518,356 @@ "lane6": "0x1", "lane7": "0x1" } - } - }, - "46": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1)": { - "speed:100GAUI-1-S|800G.*": { - "pre3": { - "lane0": "0xffffffff", - "lane1": "0xffffffff", - "lane2": "0xffffffff", - "lane3": "0xffffffff", - "lane4": "0xffffffff", - "lane5": "0xffffffff", - "lane6": "0xffffffff", - "lane7": "0xffffffff" - }, - "pre2": { - "lane0": "0x00000006", - "lane1": "0x00000006", - "lane2": "0x00000006", - "lane3": "0x00000006", - "lane4": "0x00000006", - "lane5": "0x00000006", - "lane6": "0x00000006", - "lane7": "0x00000006" - }, - "pre1": { - "lane0": "0xffffffe7", - "lane1": "0xffffffe7", - "lane2": "0xffffffe7", - "lane3": "0xffffffe7", - "lane4": "0xffffffe7", - "lane5": "0xffffffe7", - "lane6": "0xffffffe7", - "lane7": "0xffffffe7" - }, - "main": { - "lane0": "0x00000063", - "lane1": "0x00000063", - "lane2": "0x00000063", - "lane3": "0x00000063", - "lane4": "0x00000063", - "lane5": "0x00000063", - "lane6": "0x00000063", - "lane7": "0x00000063" - }, - "post1": { - "lane0": "0xfffffff5", - "lane1": "0xfffffff5", - "lane2": "0xfffffff5", - "lane3": "0xfffffff5", + }, + "OPTICAL50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffb", + "lane1": "0xfffffffb", + "lane2": "0xfffffffb", + "lane3": "0xfffffffb", + "lane4": "0xfffffffb", + "lane5": "0xfffffffb", + "lane6": "0xfffffffb", + "lane7": "0xfffffffb" + }, + "main": { + "lane0": "0xa2", + "lane1": "0xa2", + "lane2": "0xa2", + "lane3": "0xa2", + "lane4": "0xa2", + "lane5": "0xa2", + "lane6": "0xa2", + "lane7": "0xa2" + }, + "post1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post2": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xffffffff" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "OPTICAL25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "main": { + "lane0": "0x66", + "lane1": "0x66", + "lane2": "0x66", + "lane3": "0x66", + "lane4": "0x66", + "lane5": "0x66", + "lane6": "0x66", + "lane7": "0x66" + }, + "post1": { + "lane0": "0xffffffed", + "lane1": "0xffffffed", + "lane2": "0xffffffed", + "lane3": "0xffffffed", + "lane4": "0xffffffed", + "lane5": "0xffffffed", + "lane6": "0xffffffed", + "lane7": "0xffffffed" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "COPPER50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x4", + "lane1": "0x4", + "lane2": "0x4", + "lane3": "0x4", + "lane4": "0x4", + "lane5": "0x4", + "lane6": "0x4", + "lane7": "0x4" + }, + "pre1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "main": { + "lane0": "0x6b", + "lane1": "0x6b", + "lane2": "0x6b", + "lane3": "0x6b", + "lane4": "0x6b", + "lane5": "0x6b", + "lane6": "0x6b", + "lane7": "0x6b" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "Default": { + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + } + }, + "46": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { + "pre3": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xffffffff" + }, + "pre2": { + "lane0": "0x00000006", + "lane1": "0x00000006", + "lane2": "0x00000006", + "lane3": "0x00000006", + "lane4": "0x00000006", + "lane5": "0x00000006", + "lane6": "0x00000006", + "lane7": "0x00000006" + }, + "pre1": { + "lane0": "0xffffffe7", + "lane1": "0xffffffe7", + "lane2": "0xffffffe7", + "lane3": "0xffffffe7", + "lane4": "0xffffffe7", + "lane5": "0xffffffe7", + "lane6": "0xffffffe7", + "lane7": "0xffffffe7" + }, + "main": { + "lane0": "0x00000063", + "lane1": "0x00000063", + "lane2": "0x00000063", + "lane3": "0x00000063", + "lane4": "0x00000063", + "lane5": "0x00000063", + "lane6": "0x00000063", + "lane7": "0x00000063" + }, + "post1": { + "lane0": "0xfffffff5", + "lane1": "0xfffffff5", + "lane2": "0xfffffff5", + "lane3": "0xfffffff5", "lane4": "0xfffffff5", "lane5": "0xfffffff5", "lane6": "0xfffffff5", @@ -10843,7 +27043,67 @@ } } }, - "Default": { + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": "0x6", + "lane5": "0x6", + "lane6": "0x6", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe4", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0", + "lane4": "0xffffffe0", + "lane5": "0xffffffe0", + "lane6": "0xffffffe0", + "lane7": "0xffffffe0" + }, + "main": { + "lane0": "0x80", + "lane1": "0x80", + "lane2": "0x80", + "lane3": "0x80", + "lane4": "0x80", + "lane5": "0x80", + "lane6": "0x80", + "lane7": "0x80" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffff8", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, "rxpolarity": { "lane0": "0x1", "lane1": "0x0", @@ -10854,54 +27114,354 @@ "lane6": "0x1", "lane7": "0x1" } - } - }, - "47": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1)": { - "speed:100GAUI-1-S|800G.*": { - "pre3": { - "lane0": "0xffffffff", - "lane1": "0xffffffff", - "lane2": "0xffffffff", - "lane3": "0xffffffff", - "lane4": "0xffffffff", - "lane5": "0xffffffff", - "lane6": "0xffffffff", - "lane7": "0xffffffff" - }, - "pre2": { - "lane0": "0x00000006", - "lane1": "0x00000006", - "lane2": "0x00000006", - "lane3": "0x00000006", - "lane4": "0x00000006", - "lane5": "0x00000006", - "lane6": "0x00000006", - "lane7": "0x00000006" - }, - "pre1": { - "lane0": "0xffffffe7", - "lane1": "0xffffffe7", - "lane2": "0xffffffe7", - "lane3": "0xffffffe7", - "lane4": "0xffffffe7", - "lane5": "0xffffffe7", - "lane6": "0xffffffe7", - "lane7": "0xffffffe7" - }, - "main": { - "lane0": "0x00000063", - "lane1": "0x00000063", - "lane2": "0x00000063", - "lane3": "0x00000063", - "lane4": "0x00000063", - "lane5": "0x00000063", - "lane6": "0x00000063", - "lane7": "0x00000063" - }, - "post1": { - "lane0": "0xfffffff5", - "lane1": "0xfffffff5", + }, + "OPTICAL50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffb", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffb", + "lane6": "0xfffffffd", + "lane7": "0xfffffffb" + }, + "main": { + "lane0": "0xa3", + "lane1": "0xa2", + "lane2": "0xa3", + "lane3": "0xa3", + "lane4": "0xa3", + "lane5": "0xa2", + "lane6": "0xa3", + "lane7": "0xa2" + }, + "post1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post2": { + "lane0": "0xfffffffe", + "lane1": "0xffffffff", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xffffffff", + "lane6": "0xfffffffe", + "lane7": "0xffffffff" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "OPTICAL25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0x0", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "main": { + "lane0": "0x66", + "lane1": "0x66", + "lane2": "0x66", + "lane3": "0x47", + "lane4": "0x66", + "lane5": "0x66", + "lane6": "0x66", + "lane7": "0x66" + }, + "post1": { + "lane0": "0xffffffed", + "lane1": "0xffffffed", + "lane2": "0xffffffed", + "lane3": "0xfffffffd", + "lane4": "0xffffffed", + "lane5": "0xffffffed", + "lane6": "0xffffffed", + "lane7": "0xffffffed" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "COPPER50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x4", + "lane1": "0x4", + "lane2": "0x4", + "lane3": "0x4", + "lane4": "0x4", + "lane5": "0x4", + "lane6": "0x4", + "lane7": "0x4" + }, + "pre1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "main": { + "lane0": "0x6b", + "lane1": "0x6b", + "lane2": "0x6b", + "lane3": "0x6b", + "lane4": "0x6b", + "lane5": "0x6b", + "lane6": "0x6b", + "lane7": "0x6b" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "Default": { + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + } + }, + "47": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { + "pre3": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xffffffff" + }, + "pre2": { + "lane0": "0x00000006", + "lane1": "0x00000006", + "lane2": "0x00000006", + "lane3": "0x00000006", + "lane4": "0x00000006", + "lane5": "0x00000006", + "lane6": "0x00000006", + "lane7": "0x00000006" + }, + "pre1": { + "lane0": "0xffffffe7", + "lane1": "0xffffffe7", + "lane2": "0xffffffe7", + "lane3": "0xffffffe7", + "lane4": "0xffffffe7", + "lane5": "0xffffffe7", + "lane6": "0xffffffe7", + "lane7": "0xffffffe7" + }, + "main": { + "lane0": "0x00000063", + "lane1": "0x00000063", + "lane2": "0x00000063", + "lane3": "0x00000063", + "lane4": "0x00000063", + "lane5": "0x00000063", + "lane6": "0x00000063", + "lane7": "0x00000063" + }, + "post1": { + "lane0": "0xfffffff5", + "lane1": "0xfffffff5", "lane2": "0xfffffff5", "lane3": "0xfffffff5", "lane4": "0xfffffff5", @@ -11079,7 +27639,67 @@ } } }, - "Default": { + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": "0x6", + "lane5": "0x6", + "lane6": "0x6", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0", + "lane4": "0xffffffe0", + "lane5": "0xffffffe0", + "lane6": "0xffffffe0", + "lane7": "0xffffffe0" + }, + "main": { + "lane0": "0x80", + "lane1": "0x80", + "lane2": "0x80", + "lane3": "0x80", + "lane4": "0x80", + "lane5": "0x80", + "lane6": "0x80", + "lane7": "0x80" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, "rxpolarity": { "lane0": "0x0", "lane1": "0x0", @@ -11090,55 +27710,355 @@ "lane6": "0x0", "lane7": "0x1" } - } - }, - "48": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1)": { - "speed:100GAUI-1-S|800G.*": { - "pre3": { - "lane0": "0xffffffff", - "lane1": "0xffffffff", - "lane2": "0xffffffff", - "lane3": "0xffffffff", - "lane4": "0xffffffff", - "lane5": "0xffffffff", - "lane6": "0xffffffff", - "lane7": "0xffffffff" - }, - "pre2": { - "lane0": "0x00000006", - "lane1": "0x00000006", - "lane2": "0x00000006", - "lane3": "0x00000006", - "lane4": "0x00000006", - "lane5": "0x00000006", - "lane6": "0x00000006", - "lane7": "0x00000006" - }, - "pre1": { - "lane0": "0xffffffe7", - "lane1": "0xffffffe7", - "lane2": "0xffffffe7", - "lane3": "0xffffffe7", - "lane4": "0xffffffe7", - "lane5": "0xffffffe7", - "lane6": "0xffffffe7", - "lane7": "0xffffffe7" - }, - "main": { - "lane0": "0x00000063", - "lane1": "0x00000063", - "lane2": "0x00000063", - "lane3": "0x00000063", - "lane4": "0x00000063", - "lane5": "0x00000063", - "lane6": "0x00000063", - "lane7": "0x00000063" - }, - "post1": { - "lane0": "0xfffffff5", - "lane1": "0xfffffff5", - "lane2": "0xfffffff5", + }, + "OPTICAL50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffb", + "lane1": "0xfffffffb", + "lane2": "0xfffffffb", + "lane3": "0xfffffffb", + "lane4": "0xfffffffb", + "lane5": "0xfffffffb", + "lane6": "0xfffffffb", + "lane7": "0xfffffffb" + }, + "main": { + "lane0": "0x9d", + "lane1": "0x9d", + "lane2": "0x9d", + "lane3": "0x9d", + "lane4": "0x9d", + "lane5": "0x9d", + "lane6": "0x9d", + "lane7": "0x9d" + }, + "post1": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "post2": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x1" + } + }, + "OPTICAL25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff9", + "lane1": "0xfffffff9", + "lane2": "0xfffffff9", + "lane3": "0xfffffff9", + "lane4": "0xfffffff9", + "lane5": "0xfffffff9", + "lane6": "0xfffffff9", + "lane7": "0xfffffff9" + }, + "main": { + "lane0": "0x52", + "lane1": "0x52", + "lane2": "0x52", + "lane3": "0x52", + "lane4": "0x52", + "lane5": "0x52", + "lane6": "0x52", + "lane7": "0x52" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x1" + } + }, + "COPPER50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x4", + "lane1": "0x4", + "lane2": "0x4", + "lane3": "0x4", + "lane4": "0x4", + "lane5": "0x4", + "lane6": "0x4", + "lane7": "0x4" + }, + "pre1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x1" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "main": { + "lane0": "0x6b", + "lane1": "0x6b", + "lane2": "0x6b", + "lane3": "0x6b", + "lane4": "0x6b", + "lane5": "0x6b", + "lane6": "0x6b", + "lane7": "0x6b" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x1" + } + }, + "Default": { + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x1" + } + } + }, + "48": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { + "pre3": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xffffffff" + }, + "pre2": { + "lane0": "0x00000006", + "lane1": "0x00000006", + "lane2": "0x00000006", + "lane3": "0x00000006", + "lane4": "0x00000006", + "lane5": "0x00000006", + "lane6": "0x00000006", + "lane7": "0x00000006" + }, + "pre1": { + "lane0": "0xffffffe7", + "lane1": "0xffffffe7", + "lane2": "0xffffffe7", + "lane3": "0xffffffe7", + "lane4": "0xffffffe7", + "lane5": "0xffffffe7", + "lane6": "0xffffffe7", + "lane7": "0xffffffe7" + }, + "main": { + "lane0": "0x00000063", + "lane1": "0x00000063", + "lane2": "0x00000063", + "lane3": "0x00000063", + "lane4": "0x00000063", + "lane5": "0x00000063", + "lane6": "0x00000063", + "lane7": "0x00000063" + }, + "post1": { + "lane0": "0xfffffff5", + "lane1": "0xfffffff5", + "lane2": "0xfffffff5", "lane3": "0xfffffff5", "lane4": "0xfffffff5", "lane5": "0xfffffff5", @@ -11315,7 +28235,67 @@ } } }, - "Default": { + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": "0x6", + "lane5": "0x6", + "lane6": "0x6", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0", + "lane4": "0xffffffe0", + "lane5": "0xffffffe0", + "lane6": "0xffffffe0", + "lane7": "0xffffffe0" + }, + "main": { + "lane0": "0x80", + "lane1": "0x80", + "lane2": "0x80", + "lane3": "0x80", + "lane4": "0x80", + "lane5": "0x80", + "lane6": "0x80", + "lane7": "0x80" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, "rxpolarity": { "lane0": "0x0", "lane1": "0x0", @@ -11326,63 +28306,363 @@ "lane6": "0x0", "lane7": "0x1" } - } - }, - "49": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1)": { - "speed:100GAUI-1-S|800G.*": { - "pre3": { - "lane0": "0xfffffffe", - "lane1": "0xfffffffe", - "lane2": "0xfffffffe", - "lane3": "0xfffffffe", - "lane4": "0xfffffffe", - "lane5": "0xfffffffe", - "lane6": "0xfffffffe", - "lane7": "0xfffffffe" - }, - "pre2": { - "lane0": "0x00000007", - "lane1": "0x00000007", - "lane2": "0x00000007", - "lane3": "0x00000007", - "lane4": "0x00000007", - "lane5": "0x00000007", - "lane6": "0x00000007", - "lane7": "0x00000007" - }, - "pre1": { - "lane0": "0xffffffe5", - "lane1": "0xffffffe5", - "lane2": "0xffffffe5", - "lane3": "0xffffffe5", - "lane4": "0xffffffe5", - "lane5": "0xffffffe5", - "lane6": "0xffffffe5", - "lane7": "0xffffffe5" - }, - "main": { - "lane0": "0x0000005f", - "lane1": "0x0000005f", - "lane2": "0x0000005f", - "lane3": "0x0000005f", - "lane4": "0x0000005f", - "lane5": "0x0000005f", - "lane6": "0x0000005f", - "lane7": "0x0000005f" - }, - "post1": { - "lane0": "0xfffffff3", - "lane1": "0xfffffff3", - "lane2": "0xfffffff3", - "lane3": "0xfffffff3", - "lane4": "0xfffffff3", - "lane5": "0xfffffff3", - "lane6": "0xfffffff3", - "lane7": "0xfffffff3" - }, - "post2": { - "lane0": "0xfffffff3", + }, + "OPTICAL50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffb", + "lane1": "0xfffffffb", + "lane2": "0xfffffffb", + "lane3": "0xfffffffb", + "lane4": "0xfffffffb", + "lane5": "0xfffffffb", + "lane6": "0xfffffffb", + "lane7": "0xfffffffb" + }, + "main": { + "lane0": "0x9d", + "lane1": "0x9d", + "lane2": "0x9d", + "lane3": "0x9d", + "lane4": "0x9d", + "lane5": "0x9d", + "lane6": "0x9d", + "lane7": "0x9d" + }, + "post1": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "post2": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x1" + } + }, + "OPTICAL25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff9", + "lane1": "0xfffffff9", + "lane2": "0xfffffff9", + "lane3": "0xfffffff9", + "lane4": "0xfffffff9", + "lane5": "0xfffffff9", + "lane6": "0xfffffff9", + "lane7": "0xfffffff9" + }, + "main": { + "lane0": "0x52", + "lane1": "0x52", + "lane2": "0x52", + "lane3": "0x52", + "lane4": "0x52", + "lane5": "0x52", + "lane6": "0x52", + "lane7": "0x52" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x1" + } + }, + "COPPER50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x4", + "lane1": "0x4", + "lane2": "0x4", + "lane3": "0x4", + "lane4": "0x4", + "lane5": "0x4", + "lane6": "0x4", + "lane7": "0x4" + }, + "pre1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x1" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "main": { + "lane0": "0x6b", + "lane1": "0x6b", + "lane2": "0x6b", + "lane3": "0x6b", + "lane4": "0x6b", + "lane5": "0x6b", + "lane6": "0x6b", + "lane7": "0x6b" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x1" + } + }, + "Default": { + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x1" + } + } + }, + "49": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { + "pre3": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "pre2": { + "lane0": "0x00000007", + "lane1": "0x00000007", + "lane2": "0x00000007", + "lane3": "0x00000007", + "lane4": "0x00000007", + "lane5": "0x00000007", + "lane6": "0x00000007", + "lane7": "0x00000007" + }, + "pre1": { + "lane0": "0xffffffe5", + "lane1": "0xffffffe5", + "lane2": "0xffffffe5", + "lane3": "0xffffffe5", + "lane4": "0xffffffe5", + "lane5": "0xffffffe5", + "lane6": "0xffffffe5", + "lane7": "0xffffffe5" + }, + "main": { + "lane0": "0x0000005f", + "lane1": "0x0000005f", + "lane2": "0x0000005f", + "lane3": "0x0000005f", + "lane4": "0x0000005f", + "lane5": "0x0000005f", + "lane6": "0x0000005f", + "lane7": "0x0000005f" + }, + "post1": { + "lane0": "0xfffffff3", + "lane1": "0xfffffff3", + "lane2": "0xfffffff3", + "lane3": "0xfffffff3", + "lane4": "0xfffffff3", + "lane5": "0xfffffff3", + "lane6": "0xfffffff3", + "lane7": "0xfffffff3" + }, + "post2": { + "lane0": "0xfffffff3", "lane1": "0xfffffff3", "lane2": "0xfffffff3", "lane3": "0xfffffff3", @@ -11551,7 +28831,67 @@ } } }, - "Default": { + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": "0x6", + "lane5": "0x6", + "lane6": "0x6", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe4", + "lane4": "0xffffffe0", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x80", + "lane1": "0x80", + "lane2": "0x80", + "lane3": "0x80", + "lane4": "0x80", + "lane5": "0x80", + "lane6": "0x80", + "lane7": "0x80" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffff8", + "lane4": "0xfffffffc", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, "rxpolarity": { "lane0": "0x0", "lane1": "0x1", @@ -11562,55 +28902,355 @@ "lane6": "0x1", "lane7": "0x1" } - } - }, - "50": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1)": { - "speed:100GAUI-1-S|800G.*": { - "pre3": { - "lane0": "0xfffffffe", - "lane1": "0xfffffffe", - "lane2": "0xfffffffe", - "lane3": "0xfffffffe", - "lane4": "0xfffffffe", - "lane5": "0xfffffffe", - "lane6": "0xfffffffe", - "lane7": "0xfffffffe" - }, - "pre2": { - "lane0": "0x00000007", - "lane1": "0x00000007", - "lane2": "0x00000007", - "lane3": "0x00000007", - "lane4": "0x00000007", - "lane5": "0x00000007", - "lane6": "0x00000007", - "lane7": "0x00000007" - }, - "pre1": { - "lane0": "0xffffffe5", - "lane1": "0xffffffe5", - "lane2": "0xffffffe5", - "lane3": "0xffffffe5", - "lane4": "0xffffffe5", - "lane5": "0xffffffe5", - "lane6": "0xffffffe5", - "lane7": "0xffffffe5" - }, - "main": { - "lane0": "0x0000005f", - "lane1": "0x0000005f", - "lane2": "0x0000005f", - "lane3": "0x0000005f", - "lane4": "0x0000005f", - "lane5": "0x0000005f", - "lane6": "0x0000005f", - "lane7": "0x0000005f" - }, - "post1": { - "lane0": "0xfffffff3", - "lane1": "0xfffffff3", - "lane2": "0xfffffff3", + }, + "OPTICAL50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffb", + "lane1": "0xfffffffb", + "lane2": "0xfffffffb", + "lane3": "0xfffffffb", + "lane4": "0xfffffffb", + "lane5": "0xfffffffb", + "lane6": "0xfffffffb", + "lane7": "0xfffffffb" + }, + "main": { + "lane0": "0xa2", + "lane1": "0xa2", + "lane2": "0xa2", + "lane3": "0xa2", + "lane4": "0xa2", + "lane5": "0xa2", + "lane6": "0xa2", + "lane7": "0xa2" + }, + "post1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post2": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xffffffff" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "OPTICAL25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "main": { + "lane0": "0x66", + "lane1": "0x66", + "lane2": "0x66", + "lane3": "0x66", + "lane4": "0x66", + "lane5": "0x66", + "lane6": "0x66", + "lane7": "0x66" + }, + "post1": { + "lane0": "0xffffffed", + "lane1": "0xffffffed", + "lane2": "0xffffffed", + "lane3": "0xffffffed", + "lane4": "0xffffffed", + "lane5": "0xffffffed", + "lane6": "0xffffffed", + "lane7": "0xffffffed" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "COPPER50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x4", + "lane1": "0x4", + "lane2": "0x4", + "lane3": "0x4", + "lane4": "0x4", + "lane5": "0x4", + "lane6": "0x4", + "lane7": "0x4" + }, + "pre1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "main": { + "lane0": "0x6b", + "lane1": "0x6b", + "lane2": "0x6b", + "lane3": "0x6b", + "lane4": "0x6b", + "lane5": "0x6b", + "lane6": "0x6b", + "lane7": "0x6b" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "Default": { + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + } + }, + "50": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { + "pre3": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "pre2": { + "lane0": "0x00000007", + "lane1": "0x00000007", + "lane2": "0x00000007", + "lane3": "0x00000007", + "lane4": "0x00000007", + "lane5": "0x00000007", + "lane6": "0x00000007", + "lane7": "0x00000007" + }, + "pre1": { + "lane0": "0xffffffe5", + "lane1": "0xffffffe5", + "lane2": "0xffffffe5", + "lane3": "0xffffffe5", + "lane4": "0xffffffe5", + "lane5": "0xffffffe5", + "lane6": "0xffffffe5", + "lane7": "0xffffffe5" + }, + "main": { + "lane0": "0x0000005f", + "lane1": "0x0000005f", + "lane2": "0x0000005f", + "lane3": "0x0000005f", + "lane4": "0x0000005f", + "lane5": "0x0000005f", + "lane6": "0x0000005f", + "lane7": "0x0000005f" + }, + "post1": { + "lane0": "0xfffffff3", + "lane1": "0xfffffff3", + "lane2": "0xfffffff3", "lane3": "0xfffffff3", "lane4": "0xfffffff3", "lane5": "0xfffffff3", @@ -11787,7 +29427,67 @@ } } }, - "Default": { + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": "0x6", + "lane5": "0x6", + "lane6": "0x6", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x80", + "lane1": "0x80", + "lane2": "0x80", + "lane3": "0x80", + "lane4": "0x80", + "lane5": "0x80", + "lane6": "0x80", + "lane7": "0x80" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, "rxpolarity": { "lane0": "0x0", "lane1": "0x1", @@ -11798,55 +29498,355 @@ "lane6": "0x1", "lane7": "0x1" } - } - }, - "51": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1)": { - "speed:100GAUI-1-S|800G.*": { - "pre3": { - "lane0": "0xfffffffe", - "lane1": "0xfffffffe", - "lane2": "0xfffffffe", - "lane3": "0xfffffffe", - "lane4": "0xfffffffe", - "lane5": "0xfffffffe", - "lane6": "0xfffffffe", - "lane7": "0xfffffffe" - }, - "pre2": { - "lane0": "0x00000007", - "lane1": "0x00000007", - "lane2": "0x00000007", - "lane3": "0x00000007", - "lane4": "0x00000007", - "lane5": "0x00000007", - "lane6": "0x00000007", - "lane7": "0x00000007" - }, - "pre1": { - "lane0": "0xffffffe5", - "lane1": "0xffffffe5", - "lane2": "0xffffffe5", - "lane3": "0xffffffe5", - "lane4": "0xffffffe5", - "lane5": "0xffffffe5", - "lane6": "0xffffffe5", - "lane7": "0xffffffe5" - }, - "main": { - "lane0": "0x0000005f", - "lane1": "0x0000005f", - "lane2": "0x0000005f", - "lane3": "0x0000005f", - "lane4": "0x0000005f", - "lane5": "0x0000005f", - "lane6": "0x0000005f", - "lane7": "0x0000005f" - }, - "post1": { - "lane0": "0xfffffff3", - "lane1": "0xfffffff3", - "lane2": "0xfffffff3", + }, + "OPTICAL50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffb", + "lane2": "0xfffffffd", + "lane3": "0xfffffffb", + "lane4": "0xfffffffd", + "lane5": "0xfffffffb", + "lane6": "0xfffffffd", + "lane7": "0xfffffffb" + }, + "main": { + "lane0": "0xa3", + "lane1": "0xa2", + "lane2": "0xa3", + "lane3": "0xa2", + "lane4": "0xa3", + "lane5": "0xa2", + "lane6": "0xa3", + "lane7": "0xa2" + }, + "post1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post2": { + "lane0": "0xfffffffe", + "lane1": "0xffffffff", + "lane2": "0xfffffffe", + "lane3": "0xffffffff", + "lane4": "0xfffffffe", + "lane5": "0xffffffff", + "lane6": "0xfffffffe", + "lane7": "0xffffffff" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "OPTICAL25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "main": { + "lane0": "0x66", + "lane1": "0x66", + "lane2": "0x66", + "lane3": "0x66", + "lane4": "0x66", + "lane5": "0x66", + "lane6": "0x66", + "lane7": "0x66" + }, + "post1": { + "lane0": "0xffffffed", + "lane1": "0xffffffed", + "lane2": "0xffffffed", + "lane3": "0xffffffed", + "lane4": "0xffffffed", + "lane5": "0xffffffed", + "lane6": "0xffffffed", + "lane7": "0xffffffed" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "COPPER50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x4", + "lane1": "0x4", + "lane2": "0x4", + "lane3": "0x4", + "lane4": "0x4", + "lane5": "0x4", + "lane6": "0x4", + "lane7": "0x4" + }, + "pre1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "main": { + "lane0": "0x6b", + "lane1": "0x6b", + "lane2": "0x6b", + "lane3": "0x6b", + "lane4": "0x6b", + "lane5": "0x6b", + "lane6": "0x6b", + "lane7": "0x6b" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "Default": { + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + } + }, + "51": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { + "pre3": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "pre2": { + "lane0": "0x00000007", + "lane1": "0x00000007", + "lane2": "0x00000007", + "lane3": "0x00000007", + "lane4": "0x00000007", + "lane5": "0x00000007", + "lane6": "0x00000007", + "lane7": "0x00000007" + }, + "pre1": { + "lane0": "0xffffffe5", + "lane1": "0xffffffe5", + "lane2": "0xffffffe5", + "lane3": "0xffffffe5", + "lane4": "0xffffffe5", + "lane5": "0xffffffe5", + "lane6": "0xffffffe5", + "lane7": "0xffffffe5" + }, + "main": { + "lane0": "0x0000005f", + "lane1": "0x0000005f", + "lane2": "0x0000005f", + "lane3": "0x0000005f", + "lane4": "0x0000005f", + "lane5": "0x0000005f", + "lane6": "0x0000005f", + "lane7": "0x0000005f" + }, + "post1": { + "lane0": "0xfffffff3", + "lane1": "0xfffffff3", + "lane2": "0xfffffff3", "lane3": "0xfffffff3", "lane4": "0xfffffff3", "lane5": "0xfffffff3", @@ -12023,7 +30023,67 @@ } } }, - "Default": { + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": "0x6", + "lane5": "0x6", + "lane6": "0x6", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x80", + "lane1": "0x80", + "lane2": "0x80", + "lane3": "0x80", + "lane4": "0x80", + "lane5": "0x80", + "lane6": "0x80", + "lane7": "0x80" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, "rxpolarity": { "lane0": "0x0", "lane1": "0x0", @@ -12034,55 +30094,355 @@ "lane6": "0x1", "lane7": "0x0" } - } - }, - "52": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1)": { - "speed:100GAUI-1-S|800G.*": { - "pre3": { - "lane0": "0xfffffffe", - "lane1": "0xfffffffe", - "lane2": "0xfffffffe", - "lane3": "0xfffffffe", - "lane4": "0xfffffffe", - "lane5": "0xfffffffe", - "lane6": "0xfffffffe", - "lane7": "0xfffffffe" - }, - "pre2": { - "lane0": "0x00000007", - "lane1": "0x00000007", - "lane2": "0x00000007", - "lane3": "0x00000007", - "lane4": "0x00000007", - "lane5": "0x00000007", - "lane6": "0x00000007", - "lane7": "0x00000007" - }, - "pre1": { - "lane0": "0xffffffe5", - "lane1": "0xffffffe5", - "lane2": "0xffffffe5", - "lane3": "0xffffffe5", - "lane4": "0xffffffe5", - "lane5": "0xffffffe5", - "lane6": "0xffffffe5", - "lane7": "0xffffffe5" - }, - "main": { - "lane0": "0x0000005f", - "lane1": "0x0000005f", - "lane2": "0x0000005f", - "lane3": "0x0000005f", - "lane4": "0x0000005f", - "lane5": "0x0000005f", - "lane6": "0x0000005f", - "lane7": "0x0000005f" - }, - "post1": { - "lane0": "0xfffffff3", - "lane1": "0xfffffff3", - "lane2": "0xfffffff3", + }, + "OPTICAL50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x1", + "lane2": "0x0", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x0", + "lane7": "0x1" + }, + "pre1": { + "lane0": "0xfffffffb", + "lane1": "0xfffffff3", + "lane2": "0xfffffffb", + "lane3": "0xfffffff3", + "lane4": "0xfffffffb", + "lane5": "0xfffffff3", + "lane6": "0xfffffffb", + "lane7": "0xfffffff3" + }, + "main": { + "lane0": "0x9d", + "lane1": "0x98", + "lane2": "0x9d", + "lane3": "0x98", + "lane4": "0x9d", + "lane5": "0x98", + "lane6": "0x9d", + "lane7": "0x98" + }, + "post1": { + "lane0": "0xfffffffd", + "lane1": "0x0", + "lane2": "0xfffffffd", + "lane3": "0x0", + "lane4": "0xfffffffd", + "lane5": "0x0", + "lane6": "0xfffffffd", + "lane7": "0x0" + }, + "post2": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffe", + "lane2": "0xfffffffd", + "lane3": "0xfffffffe", + "lane4": "0xfffffffd", + "lane5": "0xfffffffe", + "lane6": "0xfffffffd", + "lane7": "0xfffffffe" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x1", + "lane7": "0x0" + } + }, + "OPTICAL25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff9", + "lane1": "0xfffffffc", + "lane2": "0xfffffff9", + "lane3": "0xfffffffc", + "lane4": "0xfffffff9", + "lane5": "0xfffffffc", + "lane6": "0xfffffff9", + "lane7": "0xfffffffc" + }, + "main": { + "lane0": "0x52", + "lane1": "0x67", + "lane2": "0x52", + "lane3": "0x67", + "lane4": "0x52", + "lane5": "0x67", + "lane6": "0x52", + "lane7": "0x67" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xffffffec", + "lane2": "0xfffffff8", + "lane3": "0xffffffec", + "lane4": "0xfffffff8", + "lane5": "0xffffffec", + "lane6": "0xfffffff8", + "lane7": "0xffffffec" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x1", + "lane7": "0x0" + } + }, + "COPPER50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x4", + "lane1": "0x4", + "lane2": "0x4", + "lane3": "0x4", + "lane4": "0x4", + "lane5": "0x4", + "lane6": "0x4", + "lane7": "0x4" + }, + "pre1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x1", + "lane7": "0x0" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "main": { + "lane0": "0x6b", + "lane1": "0x6b", + "lane2": "0x6b", + "lane3": "0x6b", + "lane4": "0x6b", + "lane5": "0x6b", + "lane6": "0x6b", + "lane7": "0x6b" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x1", + "lane7": "0x0" + } + }, + "Default": { + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x1", + "lane7": "0x0" + } + } + }, + "52": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { + "pre3": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "pre2": { + "lane0": "0x00000007", + "lane1": "0x00000007", + "lane2": "0x00000007", + "lane3": "0x00000007", + "lane4": "0x00000007", + "lane5": "0x00000007", + "lane6": "0x00000007", + "lane7": "0x00000007" + }, + "pre1": { + "lane0": "0xffffffe5", + "lane1": "0xffffffe5", + "lane2": "0xffffffe5", + "lane3": "0xffffffe5", + "lane4": "0xffffffe5", + "lane5": "0xffffffe5", + "lane6": "0xffffffe5", + "lane7": "0xffffffe5" + }, + "main": { + "lane0": "0x0000005f", + "lane1": "0x0000005f", + "lane2": "0x0000005f", + "lane3": "0x0000005f", + "lane4": "0x0000005f", + "lane5": "0x0000005f", + "lane6": "0x0000005f", + "lane7": "0x0000005f" + }, + "post1": { + "lane0": "0xfffffff3", + "lane1": "0xfffffff3", + "lane2": "0xfffffff3", "lane3": "0xfffffff3", "lane4": "0xfffffff3", "lane5": "0xfffffff3", @@ -12259,7 +30619,67 @@ } } }, - "Default": { + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": "0x6", + "lane5": "0x6", + "lane6": "0x6", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe0", + "lane5": "0xffffffe4", + "lane6": "0xffffffe0", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x80", + "lane1": "0x80", + "lane2": "0x80", + "lane3": "0x80", + "lane4": "0x80", + "lane5": "0x80", + "lane6": "0x80", + "lane7": "0x80" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffffc", + "lane5": "0xfffffff8", + "lane6": "0xfffffffc", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, "rxpolarity": { "lane0": "0x0", "lane1": "0x0", @@ -12270,59 +30690,359 @@ "lane6": "0x1", "lane7": "0x0" } - } - }, - "53": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1)": { - "speed:100GAUI-1-S|800G.*": { - "pre3": { - "lane0": "0xfffffffe", - "lane1": "0xfffffffe", - "lane2": "0xfffffffe", - "lane3": "0xfffffffe", - "lane4": "0xfffffffe", - "lane5": "0xfffffffe", - "lane6": "0xfffffffe", - "lane7": "0xfffffffe" - }, - "pre2": { - "lane0": "0x00000007", - "lane1": "0x00000007", - "lane2": "0x00000007", - "lane3": "0x00000007", - "lane4": "0x00000007", - "lane5": "0x00000007", - "lane6": "0x00000007", - "lane7": "0x00000007" - }, - "pre1": { - "lane0": "0xffffffe4", - "lane1": "0xffffffe4", - "lane2": "0xffffffe4", - "lane3": "0xffffffe4", - "lane4": "0xffffffe4", - "lane5": "0xffffffe4", - "lane6": "0xffffffe4", - "lane7": "0xffffffe4" - }, - "main": { - "lane0": "0x00000064", - "lane1": "0x00000064", - "lane2": "0x00000064", - "lane3": "0x00000064", - "lane4": "0x00000064", - "lane5": "0x00000064", - "lane6": "0x00000064", - "lane7": "0x00000064" - }, - "post1": { - "lane0": "0xfffffffa", - "lane1": "0xfffffffa", - "lane2": "0xfffffffa", - "lane3": "0xfffffffa", - "lane4": "0xfffffffa", - "lane5": "0xfffffffa", - "lane6": "0xfffffffa", + }, + "OPTICAL50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffb", + "lane1": "0xfffffffb", + "lane2": "0xfffffffb", + "lane3": "0xfffffffb", + "lane4": "0xfffffffb", + "lane5": "0xfffffffb", + "lane6": "0xfffffffb", + "lane7": "0xfffffffb" + }, + "main": { + "lane0": "0x9d", + "lane1": "0x9d", + "lane2": "0x9d", + "lane3": "0x9d", + "lane4": "0x9d", + "lane5": "0x9d", + "lane6": "0x9d", + "lane7": "0x9d" + }, + "post1": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "post2": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x1", + "lane7": "0x0" + } + }, + "OPTICAL25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff9", + "lane1": "0xfffffff9", + "lane2": "0xfffffff9", + "lane3": "0xfffffff9", + "lane4": "0xfffffff9", + "lane5": "0xfffffff9", + "lane6": "0xfffffff9", + "lane7": "0xfffffff9" + }, + "main": { + "lane0": "0x52", + "lane1": "0x52", + "lane2": "0x52", + "lane3": "0x52", + "lane4": "0x52", + "lane5": "0x52", + "lane6": "0x52", + "lane7": "0x52" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x1", + "lane7": "0x0" + } + }, + "COPPER50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x4", + "lane1": "0x4", + "lane2": "0x4", + "lane3": "0x4", + "lane4": "0x4", + "lane5": "0x4", + "lane6": "0x4", + "lane7": "0x4" + }, + "pre1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x1", + "lane7": "0x0" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "main": { + "lane0": "0x6b", + "lane1": "0x6b", + "lane2": "0x6b", + "lane3": "0x6b", + "lane4": "0x6b", + "lane5": "0x6b", + "lane6": "0x6b", + "lane7": "0x6b" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x1", + "lane7": "0x0" + } + }, + "Default": { + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x1", + "lane7": "0x0" + } + } + }, + "53": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { + "pre3": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "pre2": { + "lane0": "0x00000007", + "lane1": "0x00000007", + "lane2": "0x00000007", + "lane3": "0x00000007", + "lane4": "0x00000007", + "lane5": "0x00000007", + "lane6": "0x00000007", + "lane7": "0x00000007" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x00000064", + "lane1": "0x00000064", + "lane2": "0x00000064", + "lane3": "0x00000064", + "lane4": "0x00000064", + "lane5": "0x00000064", + "lane6": "0x00000064", + "lane7": "0x00000064" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", "lane7": "0xfffffffa" }, "post2": { @@ -12495,7 +31215,67 @@ } } }, - "Default": { + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": "0x6", + "lane5": "0x6", + "lane6": "0x6", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x80", + "lane1": "0x80", + "lane2": "0x80", + "lane3": "0x80", + "lane4": "0x80", + "lane5": "0x80", + "lane6": "0x80", + "lane7": "0x80" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, "rxpolarity": { "lane0": "0x0", "lane1": "0x1", @@ -12506,59 +31286,359 @@ "lane6": "0x1", "lane7": "0x1" } - } - }, - "54": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1)": { - "speed:100GAUI-1-S|800G.*": { - "pre3": { - "lane0": "0xfffffffe", - "lane1": "0xfffffffe", - "lane2": "0xfffffffe", - "lane3": "0xfffffffe", - "lane4": "0xfffffffe", - "lane5": "0xfffffffe", - "lane6": "0xfffffffe", - "lane7": "0xfffffffe" - }, - "pre2": { - "lane0": "0x00000007", - "lane1": "0x00000007", - "lane2": "0x00000007", - "lane3": "0x00000007", - "lane4": "0x00000007", - "lane5": "0x00000007", - "lane6": "0x00000007", - "lane7": "0x00000007" - }, - "pre1": { - "lane0": "0xffffffe4", - "lane1": "0xffffffe4", - "lane2": "0xffffffe4", - "lane3": "0xffffffe4", - "lane4": "0xffffffe4", - "lane5": "0xffffffe4", - "lane6": "0xffffffe4", - "lane7": "0xffffffe4" - }, - "main": { - "lane0": "0x00000064", - "lane1": "0x00000064", - "lane2": "0x00000064", - "lane3": "0x00000064", - "lane4": "0x00000064", - "lane5": "0x00000064", - "lane6": "0x00000064", - "lane7": "0x00000064" - }, - "post1": { - "lane0": "0xfffffffa", - "lane1": "0xfffffffa", - "lane2": "0xfffffffa", - "lane3": "0xfffffffa", - "lane4": "0xfffffffa", - "lane5": "0xfffffffa", - "lane6": "0xfffffffa", + }, + "OPTICAL50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffb", + "lane1": "0xfffffffb", + "lane2": "0xfffffffb", + "lane3": "0xfffffffb", + "lane4": "0xfffffffb", + "lane5": "0xfffffffb", + "lane6": "0xfffffffb", + "lane7": "0xfffffffb" + }, + "main": { + "lane0": "0xa2", + "lane1": "0xa2", + "lane2": "0xa2", + "lane3": "0xa2", + "lane4": "0xa2", + "lane5": "0xa2", + "lane6": "0xa2", + "lane7": "0xa2" + }, + "post1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post2": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xffffffff" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "OPTICAL25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "main": { + "lane0": "0x66", + "lane1": "0x66", + "lane2": "0x66", + "lane3": "0x66", + "lane4": "0x66", + "lane5": "0x66", + "lane6": "0x66", + "lane7": "0x66" + }, + "post1": { + "lane0": "0xffffffed", + "lane1": "0xffffffed", + "lane2": "0xffffffed", + "lane3": "0xffffffed", + "lane4": "0xffffffed", + "lane5": "0xffffffed", + "lane6": "0xffffffed", + "lane7": "0xffffffed" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "COPPER50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x4", + "lane1": "0x4", + "lane2": "0x4", + "lane3": "0x4", + "lane4": "0x4", + "lane5": "0x4", + "lane6": "0x4", + "lane7": "0x4" + }, + "pre1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "main": { + "lane0": "0x6b", + "lane1": "0x6b", + "lane2": "0x6b", + "lane3": "0x6b", + "lane4": "0x6b", + "lane5": "0x6b", + "lane6": "0x6b", + "lane7": "0x6b" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "Default": { + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + } + }, + "54": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { + "pre3": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "pre2": { + "lane0": "0x00000007", + "lane1": "0x00000007", + "lane2": "0x00000007", + "lane3": "0x00000007", + "lane4": "0x00000007", + "lane5": "0x00000007", + "lane6": "0x00000007", + "lane7": "0x00000007" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x00000064", + "lane1": "0x00000064", + "lane2": "0x00000064", + "lane3": "0x00000064", + "lane4": "0x00000064", + "lane5": "0x00000064", + "lane6": "0x00000064", + "lane7": "0x00000064" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", "lane7": "0xfffffffa" }, "post2": { @@ -12731,7 +31811,67 @@ } } }, - "Default": { + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": "0x6", + "lane5": "0x6", + "lane6": "0x6", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x80", + "lane1": "0x78", + "lane2": "0x80", + "lane3": "0x80", + "lane4": "0x80", + "lane5": "0x80", + "lane6": "0x80", + "lane7": "0x80" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff0", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, "rxpolarity": { "lane0": "0x0", "lane1": "0x1", @@ -12742,51 +31882,351 @@ "lane6": "0x1", "lane7": "0x1" } - } - }, - "55": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1)": { - "speed:100GAUI-1-S|800G.*": { - "pre3": { - "lane0": "0xfffffffe", - "lane1": "0xfffffffe", - "lane2": "0xfffffffe", - "lane3": "0xfffffffe", - "lane4": "0xfffffffe", - "lane5": "0xfffffffe", - "lane6": "0xfffffffe", - "lane7": "0xfffffffe" - }, - "pre2": { - "lane0": "0x00000007", - "lane1": "0x00000007", - "lane2": "0x00000007", - "lane3": "0x00000007", - "lane4": "0x00000007", - "lane5": "0x00000007", - "lane6": "0x00000007", - "lane7": "0x00000007" - }, - "pre1": { - "lane0": "0xffffffe4", - "lane1": "0xffffffe4", - "lane2": "0xffffffe4", - "lane3": "0xffffffe4", - "lane4": "0xffffffe4", - "lane5": "0xffffffe4", - "lane6": "0xffffffe4", - "lane7": "0xffffffe4" - }, - "main": { - "lane0": "0x00000064", - "lane1": "0x00000064", - "lane2": "0x00000064", - "lane3": "0x00000064", - "lane4": "0x00000064", - "lane5": "0x00000064", - "lane6": "0x00000064", - "lane7": "0x00000064" - }, + }, + "OPTICAL50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffb", + "lane1": "0xfffffffb", + "lane2": "0xfffffffd", + "lane3": "0xfffffffb", + "lane4": "0xfffffffb", + "lane5": "0xfffffffb", + "lane6": "0xfffffffb", + "lane7": "0xfffffffb" + }, + "main": { + "lane0": "0xa2", + "lane1": "0xa2", + "lane2": "0xa3", + "lane3": "0xa2", + "lane4": "0xa2", + "lane5": "0xa2", + "lane6": "0xa2", + "lane7": "0xa2" + }, + "post1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post2": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xfffffffe", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xffffffff" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "OPTICAL25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "main": { + "lane0": "0x66", + "lane1": "0x66", + "lane2": "0x66", + "lane3": "0x66", + "lane4": "0x66", + "lane5": "0x66", + "lane6": "0x66", + "lane7": "0x66" + }, + "post1": { + "lane0": "0xffffffed", + "lane1": "0xffffffed", + "lane2": "0xffffffed", + "lane3": "0xffffffed", + "lane4": "0xffffffed", + "lane5": "0xffffffed", + "lane6": "0xffffffed", + "lane7": "0xffffffed" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "COPPER50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x4", + "lane1": "0x4", + "lane2": "0x4", + "lane3": "0x4", + "lane4": "0x4", + "lane5": "0x4", + "lane6": "0x4", + "lane7": "0x4" + }, + "pre1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + 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"0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "Default": { + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + } + }, + "55": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { + "pre3": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "pre2": { + "lane0": "0x00000007", + "lane1": "0x00000007", + "lane2": "0x00000007", + "lane3": "0x00000007", + "lane4": "0x00000007", + "lane5": "0x00000007", + "lane6": "0x00000007", + "lane7": "0x00000007" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x00000064", + "lane1": "0x00000064", + "lane2": "0x00000064", + "lane3": "0x00000064", + "lane4": "0x00000064", + "lane5": "0x00000064", + "lane6": "0x00000064", + "lane7": "0x00000064" + }, "post1": { "lane0": "0xfffffffa", "lane1": "0xfffffffa", @@ -12967,7 +32407,67 @@ } } }, - "Default": { + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": "0x6", + "lane5": "0x6", + "lane6": "0x6", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x80", + "lane1": "0x78", + "lane2": "0x80", + "lane3": "0x78", + "lane4": "0x80", + "lane5": "0x80", + "lane6": "0x80", + "lane7": "0x80" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff0", + "lane2": "0xfffffff8", + "lane3": "0xfffffff0", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, "rxpolarity": { "lane0": "0x0", "lane1": "0x0", @@ -12978,59 +32478,359 @@ "lane6": "0x1", "lane7": "0x0" } - } - }, - "56": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1)": { - "speed:100GAUI-1-S|800G.*": { - "pre3": { - "lane0": "0xfffffffe", - "lane1": "0xfffffffe", - "lane2": "0xfffffffe", - "lane3": "0xfffffffe", - "lane4": "0xfffffffe", - "lane5": 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"lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x1", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x0", + "lane7": "0x1" + }, + "pre1": { + "lane0": "0xfffffff3", + "lane1": "0xfffffff3", + "lane2": "0xfffffff3", + "lane3": "0xfffffff3", + "lane4": "0xfffffffb", + "lane5": "0xfffffff3", + "lane6": "0xfffffffb", + "lane7": "0xfffffff3" + }, + "main": { + "lane0": "0x98", + "lane1": "0x98", + "lane2": "0x98", + "lane3": "0x98", + "lane4": "0x9d", + "lane5": "0x98", + "lane6": "0x9d", + "lane7": "0x98" + }, + "post1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0xfffffffd", + "lane5": "0x0", + "lane6": "0xfffffffd", + "lane7": "0x0" + }, + "post2": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffd", + "lane5": "0xfffffffe", + "lane6": "0xfffffffd", + "lane7": "0xfffffffe" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x1", + "lane7": "0x0" + } + }, + "OPTICAL25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffff9", + "lane5": "0xfffffffc", + "lane6": "0xfffffff9", + "lane7": "0xfffffffc" + }, + "main": { + "lane0": "0x67", + "lane1": "0x67", + "lane2": "0x67", + "lane3": "0x67", + "lane4": "0x52", + "lane5": "0x67", + "lane6": "0x52", + "lane7": "0x67" + }, + "post1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xfffffff8", + "lane5": "0xffffffec", + "lane6": "0xfffffff8", + "lane7": "0xffffffec" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x1", + "lane7": "0x0" + } + }, + "COPPER50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x4", + "lane1": "0x4", + "lane2": "0x4", + "lane3": "0x4", + "lane4": "0x4", + "lane5": "0x4", + "lane6": "0x4", + "lane7": "0x4" + }, + "pre1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x1", + "lane7": "0x0" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": 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"0x0" + } + }, + "Default": { + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x1", + "lane7": "0x0" + } + } + }, + "56": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { + "pre3": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "pre2": { + "lane0": "0x00000007", + "lane1": "0x00000007", + "lane2": "0x00000007", + "lane3": "0x00000007", + "lane4": "0x00000007", + "lane5": "0x00000007", + "lane6": "0x00000007", + "lane7": "0x00000007" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x00000064", + "lane1": "0x00000064", + "lane2": "0x00000064", + "lane3": "0x00000064", + "lane4": "0x00000064", + "lane5": "0x00000064", + "lane6": "0x00000064", + "lane7": "0x00000064" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", "lane7": "0xfffffffa" }, "post2": { @@ -13203,22 +33003,978 @@ } } }, - "Default": { + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": "0x6", + "lane5": "0x6", + "lane6": "0x6", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + 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"lane2": "0x0", + "lane3": "0x0", "lane4": "0x0", - "lane5": "0x1", - "lane6": "0x1", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "main": { + "lane0": "0x6b", + "lane1": "0x6b", + "lane2": "0x6b", + "lane3": "0x6b", + "lane4": "0x6b", + "lane5": "0x6b", + "lane6": "0x6b", + "lane7": "0x6b" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x1" + } + }, + "Default": { + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x1" } } }, - "57": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1)": { - "speed:100GAUI-1-S|800G.*": { + "58": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { "pre3": { "lane0": "0xfffffffe", "lane1": "0xfffffffe", @@ -13280,13 +34036,13 @@ "lane7": "0xfffffff4" }, "rxpolarity": { - "lane0": "0x1", + "lane0": "0x0", "lane1": "0x1", "lane2": "0x1", "lane3": "0x0", - "lane4": "0x1", + "lane4": "0x0", "lane5": "0x0", - "lane6": "0x0", + "lane6": "0x1", "lane7": "0x1" } } @@ -13354,13 +34110,13 @@ "lane7": "0xfffffff4" }, "rxpolarity": { - "lane0": "0x0", + "lane0": "0x1", "lane1": "0x0", "lane2": "0x0", "lane3": "0x1", - "lane4": "0x0", + "lane4": "0x1", "lane5": "0x1", - "lane6": "0x1", + "lane6": "0x0", "lane7": "0x0" } } @@ -13428,33 +34184,393 @@ "lane7": "0x00000000" }, "rxpolarity": { - "lane0": "0x1", + "lane0": "0x0", "lane1": "0x1", "lane2": "0x1", "lane3": "0x0", - "lane4": "0x1", + "lane4": "0x0", "lane5": "0x0", - "lane6": "0x0", + "lane6": "0x1", "lane7": "0x1" } } }, - "Default": { + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": "0x6", + "lane5": "0x6", + "lane6": "0x6", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xfffffff0", + "lane1": "0xfffffff0", + "lane2": "0xfffffff0", + "lane3": "0xfffffff0", + "lane4": "0xfffffff0", + "lane5": "0xfffffff0", + "lane6": "0xfffffff0", + "lane7": "0xfffffff0" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "OPTICAL50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffb", + "lane1": "0xfffffffb", + "lane2": "0xfffffffb", + "lane3": "0xfffffffb", + "lane4": "0xfffffffb", + "lane5": "0xfffffffb", + "lane6": "0xfffffffb", + "lane7": "0xfffffffb" + }, + "main": { + "lane0": "0xa2", + "lane1": "0xa2", + "lane2": "0xa2", + "lane3": "0xa2", + "lane4": "0xa2", + "lane5": "0xa2", + "lane6": "0xa2", + "lane7": "0xa2" + }, + "post1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post2": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xffffffff" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "OPTICAL25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "main": { + "lane0": "0x66", + "lane1": "0x66", + "lane2": "0x66", + "lane3": "0x66", + "lane4": "0x66", + "lane5": "0x66", + "lane6": "0x66", + "lane7": "0x66" + }, + "post1": { + "lane0": "0xffffffed", + "lane1": "0xffffffed", + "lane2": "0xffffffed", + "lane3": "0xffffffed", + "lane4": "0xffffffed", + "lane5": "0xffffffed", + "lane6": "0xffffffed", + "lane7": "0xffffffed" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "COPPER50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x4", + "lane1": "0x4", + "lane2": "0x4", + "lane3": "0x4", + "lane4": "0x4", + "lane5": "0x4", + "lane6": "0x4", + "lane7": "0x4" + }, + "pre1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, "rxpolarity": { - "lane0": "0x1", + "lane0": "0x0", "lane1": "0x1", "lane2": "0x1", "lane3": "0x0", - "lane4": "0x1", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "main": { + "lane0": "0x6b", + "lane1": "0x6b", + "lane2": "0x6b", + "lane3": "0x6b", + "lane4": "0x6b", + "lane5": "0x6b", + "lane6": "0x6b", + "lane7": "0x6b" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", "lane5": "0x0", "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x1" + } + }, + "Default": { + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x1", "lane7": "0x1" } } }, - "58": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1)": { - "speed:100GAUI-1-S|800G.*": { + "59": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { "pre3": { "lane0": "0xfffffffe", "lane1": "0xfffffffe", @@ -13517,13 +34633,13 @@ }, "rxpolarity": { "lane0": "0x0", - "lane1": "0x1", + "lane1": "0x0", "lane2": "0x1", - "lane3": "0x0", + "lane3": "0x1", "lane4": "0x0", - "lane5": "0x0", + "lane5": "0x1", "lane6": "0x1", - "lane7": "0x1" + "lane7": "0x0" } } }, @@ -13591,13 +34707,13 @@ }, "rxpolarity": { "lane0": "0x1", - "lane1": "0x0", + "lane1": "0x1", "lane2": "0x0", - "lane3": "0x1", + "lane3": "0x0", "lane4": "0x1", - "lane5": "0x1", + "lane5": "0x0", "lane6": "0x0", - "lane7": "0x0" + "lane7": "0x1" } } }, @@ -13665,32 +34781,392 @@ }, "rxpolarity": { "lane0": "0x0", - "lane1": "0x1", + "lane1": "0x0", "lane2": "0x1", - "lane3": "0x0", + "lane3": "0x1", "lane4": "0x0", - "lane5": "0x0", + "lane5": "0x1", "lane6": "0x1", - "lane7": "0x1" + "lane7": "0x0" } } }, + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": "0x6", + "lane5": "0x6", + "lane6": "0x6", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xfffffff0", + "lane1": "0xfffffff0", + "lane2": "0xfffffff0", + "lane3": "0xfffffff0", + "lane4": "0xfffffff0", + "lane5": "0xfffffff0", + "lane6": "0xfffffff0", + "lane7": "0xfffffff0" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x1", + "lane7": "0x0" + } + }, + "OPTICAL50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x1", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x1", + "lane5": "0x1", + "lane6": "0x1", + "lane7": "0x1" + }, + "pre1": { + "lane0": "0xfffffff3", + "lane1": "0xfffffff3", + "lane2": "0xfffffff3", + "lane3": "0xfffffff3", + "lane4": "0xfffffff3", + "lane5": "0xfffffff3", + "lane6": "0xfffffff3", + "lane7": "0xfffffff3" + }, + "main": { + "lane0": "0x98", + "lane1": "0x98", + "lane2": "0x98", + "lane3": "0x98", + "lane4": "0x98", + "lane5": "0x98", + "lane6": "0x98", + "lane7": "0x98" + }, + "post1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post2": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x1", + "lane7": "0x0" + } + }, + "OPTICAL25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "main": { + "lane0": "0x67", + "lane1": "0x67", + "lane2": "0x67", + "lane3": "0x67", + "lane4": "0x67", + "lane5": "0x67", + "lane6": "0x67", + "lane7": "0x67" + }, + "post1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x1", + "lane7": "0x0" + } + }, + "COPPER50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x4", + "lane1": "0x4", + "lane2": "0x4", + "lane3": "0x4", + "lane4": "0x4", + "lane5": "0x4", + "lane6": "0x4", + "lane7": "0x4" + }, + "pre1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x1", + "lane7": "0x0" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "main": { + "lane0": "0x6b", + "lane1": "0x6b", + "lane2": "0x6b", + "lane3": "0x6b", + "lane4": "0x6b", + "lane5": "0x6b", + "lane6": "0x6b", + "lane7": "0x6b" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x1", + "lane7": "0x0" + } + }, "Default": { "rxpolarity": { "lane0": "0x0", - "lane1": "0x1", + "lane1": "0x0", "lane2": "0x1", - "lane3": "0x0", + "lane3": "0x1", "lane4": "0x0", - "lane5": "0x0", + "lane5": "0x1", "lane6": "0x1", - "lane7": "0x1" + "lane7": "0x0" } } }, - "59": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1)": { - "speed:100GAUI-1-S|800G.*": { + "60": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { "pre3": { "lane0": "0xfffffffe", "lane1": "0xfffffffe", @@ -13911,7 +35387,67 @@ } } }, - "Default": { + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": "0x6", + "lane5": "0x6", + "lane6": "0x6", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xfffffff0", + "lane1": "0xfffffff0", + "lane2": "0xfffffff0", + "lane3": "0xfffffff0", + "lane4": "0xfffffff0", + "lane5": "0xfffffff0", + "lane6": "0xfffffff0", + "lane7": "0xfffffff0" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, "rxpolarity": { "lane0": "0x0", "lane1": "0x0", @@ -13922,229 +35458,293 @@ "lane6": "0x1", "lane7": "0x0" } - } - }, - "60": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1)": { - "speed:100GAUI-1-S|800G.*": { - "pre3": { - "lane0": "0xfffffffe", - "lane1": "0xfffffffe", - "lane2": "0xfffffffe", - "lane3": "0xfffffffe", - "lane4": "0xfffffffe", - "lane5": "0xfffffffe", - "lane6": "0xfffffffe", - "lane7": "0xfffffffe" - }, - "pre2": { - "lane0": "0x00000007", - "lane1": "0x00000007", - "lane2": "0x00000007", - "lane3": "0x00000007", - "lane4": "0x00000007", - "lane5": "0x00000007", - "lane6": "0x00000007", - "lane7": "0x00000007" - }, - "pre1": { - "lane0": "0xffffffe5", - "lane1": "0xffffffe5", - "lane2": "0xffffffe5", - "lane3": "0xffffffe5", - "lane4": "0xffffffe5", - "lane5": "0xffffffe5", - "lane6": "0xffffffe5", - "lane7": "0xffffffe5" - }, - "main": { - "lane0": "0x0000005f", - "lane1": "0x0000005f", - "lane2": "0x0000005f", - "lane3": "0x0000005f", - "lane4": "0x0000005f", - "lane5": "0x0000005f", - "lane6": "0x0000005f", - "lane7": "0x0000005f" - }, - "post1": { - "lane0": "0xfffffff3", - "lane1": "0xfffffff3", - "lane2": "0xfffffff3", - "lane3": "0xfffffff3", - "lane4": "0xfffffff3", - "lane5": "0xfffffff3", - "lane6": "0xfffffff3", - "lane7": "0xfffffff3" - }, - "post2": { - "lane0": "0xfffffff4", - "lane1": "0xfffffff4", - "lane2": "0xfffffff4", - "lane3": "0xfffffff4", - "lane4": "0xfffffff4", - "lane5": "0xfffffff4", - "lane6": "0xfffffff4", - "lane7": "0xfffffff4" - }, - "rxpolarity": { - "lane0": "0x0", - "lane1": "0x0", - "lane2": "0x1", - "lane3": "0x1", - "lane4": "0x0", - "lane5": "0x1", - "lane6": "0x1", - "lane7": "0x0" - } + }, + "OPTICAL50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x1", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x1", + "lane5": "0x1", + "lane6": "0x1", + "lane7": "0x1" + }, + "pre1": { + "lane0": "0xfffffff3", + "lane1": "0xfffffff3", + "lane2": "0xfffffff3", + "lane3": "0xfffffff3", + "lane4": "0xfffffff3", + "lane5": "0xfffffff3", + "lane6": "0xfffffff3", + "lane7": "0xfffffff3" + }, + "main": { + "lane0": "0x98", + "lane1": "0x98", + "lane2": "0x98", + "lane3": "0x98", + "lane4": "0x98", + "lane5": "0x98", + "lane6": "0x98", + "lane7": "0x98" + }, + "post1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post2": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x1", + "lane7": "0x0" } }, - "EOPTOLINK-EOLO138HG5HSDLC": { - "speed:100GAUI-1-S|800G.*": { - "pre3": { - "lane0": "0xfffffffe", - "lane1": "0xfffffffe", - "lane2": "0xfffffffe", - "lane3": "0xfffffffe", - "lane4": "0xfffffffe", - "lane5": "0xfffffffe", - "lane6": "0xfffffffe", - "lane7": "0xfffffffe" - }, - "pre2": { - "lane0": "0x00000007", - "lane1": "0x00000007", - "lane2": "0x00000007", - "lane3": "0x00000007", - "lane4": "0x00000007", - "lane5": "0x00000007", - "lane6": "0x00000007", - "lane7": "0x00000007" - }, - "pre1": { - "lane0": "0xffffffe5", - "lane1": "0xffffffe5", - "lane2": "0xffffffe5", - "lane3": "0xffffffe5", - "lane4": "0xffffffe5", - "lane5": "0xffffffe5", - "lane6": "0xffffffe5", - "lane7": "0xffffffe5" - }, - "main": { - "lane0": "0x0000005f", - "lane1": "0x0000005f", - "lane2": "0x0000005f", - "lane3": "0x0000005f", - "lane4": "0x0000005f", - "lane5": "0x0000005f", - "lane6": "0x0000005f", - "lane7": "0x0000005f" - }, - "post1": { - "lane0": "0xfffffff3", - "lane1": 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"lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "main": { + "lane0": "0x67", + "lane1": "0x67", + "lane2": "0x67", + "lane3": "0x67", + "lane4": "0x67", + "lane5": "0x67", + "lane6": "0x67", + "lane7": "0x67" + }, + "post1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x1", + "lane7": "0x0" } }, - "PINEWAVE-(L-OS8CNS\\d{3}-NMT|L-OSG8CNS\\d{3}-NMT|L-OH8CNH-NME)": { - "speed:100GAUI-1-L C2M (Annex 120G)|400GAUI-4-L C2M (Annex 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"0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x1", + "lane7": "0x0" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "main": { + "lane0": "0x6b", + "lane1": "0x6b", + "lane2": "0x6b", + "lane3": "0x6b", + "lane4": "0x6b", + "lane5": "0x6b", + "lane6": "0x6b", + "lane7": "0x6b" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x1", + "lane7": "0x0" } }, "Default": { @@ -14161,8 +35761,8 @@ } }, "61": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1)": { - "speed:100GAUI-1-S|800G.*": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { "pre3": { "lane0": "0xffffffff", "lane1": "0xffffffff", @@ -14383,6 +35983,366 @@ } } }, + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": "0x6", + "lane5": "0x6", + "lane6": "0x6", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe4", + "lane6": "0xffffffe8", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x74", + "lane6": "0x78", + "lane7": "0x74" + }, + "post1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x1", + "lane7": "0x0" + } + }, + "OPTICAL50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "main": { + "lane0": "0x9f", + "lane1": "0x9f", + "lane2": "0x9f", + "lane3": "0x9f", + "lane4": "0x9f", + "lane5": "0x9f", + "lane6": "0x9f", + "lane7": "0x9f" + }, + "post1": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xffffffff" + }, + "post2": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x1", + "lane7": "0x0" + } + }, + "OPTICAL25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "main": { + "lane0": "0x66", + "lane1": "0x66", + "lane2": "0x66", + "lane3": "0x66", + "lane4": "0x66", + "lane5": "0x66", + "lane6": "0x66", + "lane7": "0x66" + }, + "post1": { + "lane0": "0xffffffe9", + "lane1": "0xffffffe9", + "lane2": "0xffffffe9", + "lane3": "0xffffffe9", + "lane4": "0xffffffe9", + "lane5": "0xffffffe9", + "lane6": "0xffffffe9", + "lane7": "0xffffffe9" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x1", + "lane7": "0x0" + } + }, + "COPPER50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x4", + "lane1": "0x4", + "lane2": "0x4", + "lane3": "0x4", + "lane4": "0x4", + "lane5": "0x4", + "lane6": "0x4", + "lane7": "0x4" + }, + "pre1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x1", + "lane7": "0x0" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "main": { + "lane0": "0x6b", + "lane1": "0x6b", + "lane2": "0x6b", + "lane3": "0x6b", + "lane4": "0x6b", + "lane5": "0x6b", + "lane6": "0x6b", + "lane7": "0x6b" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x1", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x1", + "lane7": "0x0" + } + }, "Default": { "rxpolarity": { "lane0": "0x1", @@ -14397,8 +36357,8 @@ } }, "62": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1)": { - "speed:100GAUI-1-S|800G.*": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { "pre3": { "lane0": "0xffffffff", "lane1": "0xffffffff", @@ -14619,6 +36579,366 @@ } } }, + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": "0x6", + "lane5": "0x6", + "lane6": "0x6", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x1", + "lane7": "0x0" + } + }, + "OPTICAL50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "main": { + "lane0": "0x9f", + "lane1": "0x9f", + "lane2": "0x9f", + "lane3": "0x9f", + "lane4": "0x9f", + "lane5": "0x9f", + "lane6": "0x9f", + "lane7": "0x9f" + }, + "post1": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xffffffff" + }, + "post2": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x1", + "lane7": "0x0" + } + }, + "OPTICAL25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe", + "lane4": "0xfffffffe", + "lane5": "0xfffffffe", + "lane6": "0xfffffffe", + "lane7": "0xfffffffe" + }, + "main": { + "lane0": "0x66", + "lane1": "0x66", + "lane2": "0x66", + "lane3": "0x66", + "lane4": "0x66", + "lane5": "0x66", + "lane6": "0x66", + "lane7": "0x66" + }, + "post1": { + "lane0": "0xffffffe9", + "lane1": "0xffffffe9", + "lane2": "0xffffffe9", + "lane3": "0xffffffe9", + "lane4": "0xffffffe9", + "lane5": "0xffffffe9", + "lane6": "0xffffffe9", + "lane7": "0xffffffe9" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x1", + "lane7": "0x0" + } + }, + "COPPER50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x4", + "lane1": "0x4", + "lane2": "0x4", + "lane3": "0x4", + "lane4": "0x4", + "lane5": "0x4", + "lane6": "0x4", + "lane7": "0x4" + }, + "pre1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x1", + "lane7": "0x0" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "main": { + "lane0": "0x6b", + "lane1": "0x6b", + "lane2": "0x6b", + "lane3": "0x6b", + "lane4": "0x6b", + "lane5": "0x6b", + "lane6": "0x6b", + "lane7": "0x6b" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x1", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x1", + "lane7": "0x0" + } + }, "Default": { "rxpolarity": { "lane0": "0x0", @@ -14633,8 +36953,8 @@ } }, "63": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1)": { - "speed:100GAUI-1-S|800G.*": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { "pre3": { "lane0": "0xffffffff", "lane1": "0xffffffff", @@ -14855,6 +37175,366 @@ } } }, + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": "0x6", + "lane5": "0x6", + "lane6": "0x6", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe8", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x74", + "lane1": "0x74", + "lane2": "0x74", + "lane3": "0x74", + "lane4": "0x74", + "lane5": "0x74", + "lane6": "0x78", + "lane7": "0x74" + }, + "post1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x1", + "lane2": "0x0", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x0", + "lane7": "0x1" + } + }, + "OPTICAL50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x1", + "lane1": "0x0", + "lane2": "0x1", + "lane3": "0x0", + "lane4": "0x1", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff3", + "lane1": "0xfffffff7", + "lane2": "0xfffffff3", + "lane3": "0xfffffff7", + "lane4": "0xfffffff3", + "lane5": "0xfffffff7", + "lane6": "0xfffffff3", + "lane7": "0xfffffff7" + }, + "main": { + "lane0": "0x98", + "lane1": "0x9e", + "lane2": "0x98", + "lane3": "0x9e", + "lane4": "0x98", + "lane5": "0x9e", + "lane6": "0x98", + "lane7": "0x9e" + }, + "post1": { + "lane0": "0x0", + "lane1": "0xffffffff", + "lane2": "0x0", + "lane3": "0xffffffff", + "lane4": "0x0", + "lane5": "0xffffffff", + "lane6": "0x0", + "lane7": "0xffffffff" + }, + "post2": { + "lane0": "0xfffffffe", + "lane1": "0x0", + "lane2": "0xfffffffe", + "lane3": "0x0", + "lane4": "0xfffffffe", + "lane5": "0x0", + "lane6": "0xfffffffe", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x1", + "lane2": "0x0", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x0", + "lane7": "0x1" + } + }, + "OPTICAL25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffa", + "lane2": "0xfffffffc", + "lane3": "0xfffffffa", + "lane4": "0xfffffffc", + "lane5": "0xfffffffa", + "lane6": "0xfffffffc", + "lane7": "0xfffffffa" + }, + "main": { + "lane0": "0x67", + "lane1": "0x63", + "lane2": "0x67", + "lane3": "0x63", + "lane4": "0x67", + "lane5": "0x63", + "lane6": "0x67", + "lane7": "0x63" + }, + "post1": { + "lane0": "0xffffffec", + "lane1": "0xffffffea", + "lane2": "0xffffffec", + "lane3": "0xffffffea", + "lane4": "0xffffffec", + "lane5": "0xffffffea", + "lane6": "0xffffffec", + "lane7": "0xffffffea" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x1", + "lane2": "0x0", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x0", + "lane7": "0x1" + } + }, + "COPPER50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x4", + "lane1": "0x4", + "lane2": "0x4", + "lane3": "0x4", + "lane4": "0x4", + "lane5": "0x4", + "lane6": "0x4", + "lane7": "0x4" + }, + "pre1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x1", + "lane2": "0x0", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x0", + "lane7": "0x1" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "main": { + "lane0": "0x6b", + "lane1": "0x6b", + "lane2": "0x6b", + "lane3": "0x6b", + "lane4": "0x6b", + "lane5": "0x6b", + "lane6": "0x6b", + "lane7": "0x6b" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x1", + "lane2": "0x0", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x0", + "lane7": "0x1" + } + }, "Default": { "rxpolarity": { "lane0": "0x0", @@ -14869,8 +37549,8 @@ } }, "64": { - "EOPTOLINK-(EO138HGPCT\\d{2}SL1)": { - "speed:100GAUI-1-S|800G.*": { + "EOPTOLINK-(EO138HGPCT\\d{2}SL1|EO138HGPCT\\d{2}CSL1)": { + "speed:100GAUI-1-S|400GAUI-4-S|800G.*": { "pre3": { "lane0": "0xffffffff", "lane1": "0xffffffff", @@ -15091,6 +37771,366 @@ } } }, + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x6", + "lane1": "0x6", + "lane2": "0x6", + "lane3": "0x6", + "lane4": "0x6", + "lane5": "0x6", + "lane6": "0x6", + "lane7": "0x6" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe8", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x74", + "lane1": "0x74", + "lane2": "0x74", + "lane3": "0x74", + "lane4": "0x74", + "lane5": "0x74", + "lane6": "0x78", + "lane7": "0x74" + }, + "post1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x1", + "lane2": "0x0", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x0", + "lane7": "0x1" + } + }, + "OPTICAL50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x1", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff7", + "lane1": "0xfffffff7", + "lane2": "0xfffffff7", + "lane3": "0xfffffff7", + "lane4": "0xfffffff7", + "lane5": "0xfffffff7", + "lane6": "0xfffffff3", + "lane7": "0xfffffff7" + }, + "main": { + "lane0": "0x9e", + "lane1": "0x9e", + "lane2": "0x9e", + "lane3": "0x9e", + "lane4": "0x9e", + "lane5": "0x9e", + "lane6": "0x98", + "lane7": "0x9e" + }, + "post1": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0x0", + "lane7": "0xffffffff" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0xfffffffe", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x1", + "lane2": "0x0", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x0", + "lane7": "0x1" + } + }, + "OPTICAL25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffc", + "lane7": "0xfffffffa" + }, + "main": { + "lane0": "0x63", + "lane1": "0x63", + "lane2": "0x63", + "lane3": "0x63", + "lane4": "0x63", + "lane5": "0x63", + "lane6": "0x67", + "lane7": "0x63" + }, + "post1": { + "lane0": "0xffffffea", + "lane1": "0xffffffea", + "lane2": "0xffffffea", + "lane3": "0xffffffea", + "lane4": "0xffffffea", + "lane5": "0xffffffea", + "lane6": "0xffffffec", + "lane7": "0xffffffea" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x1", + "lane2": "0x0", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x0", + "lane7": "0x1" + } + }, + "COPPER50": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x4", + "lane1": "0x4", + "lane2": "0x4", + "lane3": "0x4", + "lane4": "0x4", + "lane5": "0x4", + "lane6": "0x4", + "lane7": "0x4" + }, + "pre1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78", + "lane4": "0x78", + "lane5": "0x78", + "lane6": "0x78", + "lane7": "0x78" + }, + "post1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x1", + "lane2": "0x0", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x0", + "lane7": "0x1" + } + }, + "COPPER25": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "main": { + "lane0": "0x6b", + "lane1": "0x6b", + "lane2": "0x6b", + "lane3": "0x6b", + "lane4": "0x6b", + "lane5": "0x6b", + "lane6": "0x6b", + "lane7": "0x6b" + }, + "post1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "rxpolarity": { + "lane0": "0x0", + "lane1": "0x1", + "lane2": "0x0", + "lane3": "0x1", + "lane4": "0x0", + "lane5": "0x1", + "lane6": "0x0", + "lane7": "0x1" + } + }, "Default": { "rxpolarity": { "lane0": "0x0", @@ -15103,6 +38143,78 @@ "lane7": "0x1" } } + }, + "65": { + "OPTICAL10": { + "pre1": { + "lane0": "0x0" + }, + "main": { + "lane0": "0x1f" + }, + "post1": { + "lane0": "0xb" + }, + "post2": { + "lane0": "0x0" + }, + "post3": { + "lane0": "0x0" + } + }, + "COPPER10": { + "pre1": { + "lane0": "0x2" + }, + "main": { + "lane0": "0x1f" + }, + "post1": { + "lane0": "0xc" + }, + "post2": { + "lane0": "0x0" + }, + "post3": { + "lane0": "0x0" + } + } + }, + "66": { + "OPTICAL10": { + "pre1": { + "lane0": "0x0" + }, + "main": { + "lane0": "0x1f" + }, + "post1": { + "lane0": "0xb" + }, + "post2": { + "lane0": "0x0" + }, + "post3": { + "lane0": "0x0" + } + }, + "COPPER10": { + "pre1": { + "lane0": "0x2" + }, + "main": { + "lane0": "0x1f" + }, + "post1": { + "lane0": "0xc" + }, + "post2": { + "lane0": "0x0" + }, + "post3": { + "lane0": "0x0" + } + } } } } diff --git a/device/arista/x86_64-arista_7170_64c/Arista-7170-Q59S20/port_config.ini b/device/arista/x86_64-arista_7170_64c/Arista-7170-Q59S20/port_config.ini index 67a78736bb8..0a9588247ed 100644 --- a/device/arista/x86_64-arista_7170_64c/Arista-7170-Q59S20/port_config.ini +++ b/device/arista/x86_64-arista_7170_64c/Arista-7170-Q59S20/port_config.ini @@ -1,80 +1,80 @@ -# name lanes alias speed index autoneg -Ethernet0 0,1,2,3 Ethernet1/1 40000 1 off -Ethernet4 4,5,6,7 Ethernet2/1 40000 2 off -Ethernet8 8,9,10,11 Ethernet3/1 40000 3 off -Ethernet12 12,13,14,15 Ethernet4/1 40000 4 off -Ethernet16 16,17,18,19 Ethernet5/1 40000 5 off -Ethernet20 20,21,22,23 Ethernet6/1 40000 6 off -Ethernet24 24,25,26,27 Ethernet7/1 40000 7 off -Ethernet28 28,29,30,31 Ethernet8/1 40000 8 off -Ethernet32 32,33,34,35 Ethernet9/1 40000 9 on -Ethernet36 36,37,38,39 Ethernet10/1 40000 10 on -Ethernet40 40,41,42,43 Ethernet11/1 40000 11 on -Ethernet44 44,45,46,47 Ethernet12/1 40000 12 on -Ethernet48 48,49,50,51 Ethernet13/1 40000 13 on -Ethernet52 52,53,54,55 Ethernet14/1 40000 14 on -Ethernet56 56,57,58,59 Ethernet15/1 40000 15 on -Ethernet60 60,61,62,63 Ethernet16/1 40000 16 on -Ethernet64 64,65,66,67 Ethernet17/1 40000 17 on -Ethernet68 68,69,70,71 Ethernet18/1 40000 18 on -Ethernet72 72,73,74,75 Ethernet19/1 40000 19 on -Ethernet76 76,77,78,79 Ethernet20/1 40000 20 on -Ethernet80 80 Ethernet21/1 10000 21 off -Ethernet81 81 Ethernet21/2 10000 21 off -Ethernet82 82 Ethernet21/3 10000 21 off -Ethernet83 83 Ethernet21/4 10000 21 off -Ethernet84 84 Ethernet22/1 10000 22 off -Ethernet85 85 Ethernet22/2 10000 22 off -Ethernet86 86 Ethernet22/3 10000 22 off -Ethernet87 87 Ethernet22/4 10000 22 off -Ethernet88 88,89,90,91 Ethernet23/1 40000 23 off -Ethernet92 92,93,94,95 Ethernet24/1 40000 24 off -Ethernet96 96,97,98,99 Ethernet25/1 40000 25 off -Ethernet100 100,101,102,103 Ethernet26/1 40000 26 off -Ethernet104 104,105,106,107 Ethernet27/1 40000 27 off -Ethernet108 108,109,110,111 Ethernet28/1 40000 28 off -Ethernet112 112,113,114,115 Ethernet29/1 40000 29 off -Ethernet116 116,117,118,119 Ethernet30/1 40000 30 off -Ethernet120 120,121,122,123 Ethernet31/1 40000 31 off -Ethernet124 124,125,126,127 Ethernet32/1 40000 32 off -Ethernet128 128 Ethernet33/1 10000 33 off -Ethernet129 129 Ethernet33/2 10000 33 off -Ethernet130 130 Ethernet33/3 10000 33 off -Ethernet131 131 Ethernet33/4 10000 33 off -Ethernet132 132 Ethernet34/1 10000 34 off -Ethernet133 133 Ethernet34/2 10000 34 off -Ethernet134 134 Ethernet34/3 10000 34 off -Ethernet135 135 Ethernet34/4 10000 34 off -Ethernet136 136 Ethernet35/1 10000 35 off -Ethernet137 137 Ethernet35/2 10000 35 off -Ethernet138 138 Ethernet35/3 10000 35 off -Ethernet139 139 Ethernet35/4 10000 35 off -Ethernet140 140,141,142,143 Ethernet36/1 40000 36 off -Ethernet144 144,145,146,147 Ethernet37/1 40000 37 off -Ethernet148 148,149,150,151 Ethernet38/1 40000 38 off -Ethernet152 152,153,154,155 Ethernet39/1 40000 39 off -Ethernet156 156,157,158,159 Ethernet40/1 40000 40 off -Ethernet160 160,161,162,163 Ethernet41/1 40000 41 on -Ethernet164 164,165,166,167 Ethernet42/1 40000 42 on -Ethernet168 168,169,170,171 Ethernet43/1 40000 43 on -Ethernet172 172,173,174,175 Ethernet44/1 40000 44 on -Ethernet176 176,177,178,179 Ethernet45/1 40000 45 on -Ethernet180 180,181,182,183 Ethernet46/1 40000 46 on -Ethernet184 184,185,186,187 Ethernet47/1 40000 47 on -Ethernet188 188,189,190,191 Ethernet48/1 40000 48 on -Ethernet192 192,193,194,195 Ethernet49/1 40000 49 on -Ethernet196 196,197,198,199 Ethernet50/1 40000 50 on -Ethernet200 200,201,202,203 Ethernet51/1 40000 51 on -Ethernet204 204,205,206,207 Ethernet52/1 40000 52 on -Ethernet208 208,209,210,211 Ethernet53/1 40000 53 on -Ethernet212 212,213,214,215 Ethernet54/1 40000 54 on -Ethernet216 216,217,218,219 Ethernet55/1 40000 55 on -Ethernet220 220,221,222,223 Ethernet56/1 40000 56 on -Ethernet224 224,225,226,227 Ethernet57/1 40000 57 on -Ethernet228 228,229,230,231 Ethernet58/1 40000 58 on -Ethernet232 232,233,234,235 Ethernet59/1 40000 59 on -Ethernet236 236,237,238,239 Ethernet60/1 40000 60 on -Ethernet240 240,241,242,243 Ethernet61/1 40000 61 on -Ethernet244 244,245,246,247 Ethernet62/1 40000 62 on -Ethernet248 248,249,250,251 Ethernet63/1 40000 63 on -Ethernet252 252,253,254,255 Ethernet64/1 40000 64 on +# name lanes alias speed index autoneg subport +Ethernet0 0,1,2,3 Ethernet1/1 40000 1 off 0 +Ethernet4 4,5,6,7 Ethernet2/1 40000 2 off 0 +Ethernet8 8,9,10,11 Ethernet3/1 40000 3 off 0 +Ethernet12 12,13,14,15 Ethernet4/1 40000 4 off 0 +Ethernet16 16,17,18,19 Ethernet5/1 40000 5 off 0 +Ethernet20 20,21,22,23 Ethernet6/1 40000 6 off 0 +Ethernet24 24,25,26,27 Ethernet7/1 40000 7 off 0 +Ethernet28 28,29,30,31 Ethernet8/1 40000 8 off 0 +Ethernet32 32,33,34,35 Ethernet9/1 40000 9 on 0 +Ethernet36 36,37,38,39 Ethernet10/1 40000 10 on 0 +Ethernet40 40,41,42,43 Ethernet11/1 40000 11 on 0 +Ethernet44 44,45,46,47 Ethernet12/1 40000 12 on 0 +Ethernet48 48,49,50,51 Ethernet13/1 40000 13 on 0 +Ethernet52 52,53,54,55 Ethernet14/1 40000 14 on 0 +Ethernet56 56,57,58,59 Ethernet15/1 40000 15 on 0 +Ethernet60 60,61,62,63 Ethernet16/1 40000 16 on 0 +Ethernet64 64,65,66,67 Ethernet17/1 40000 17 on 0 +Ethernet68 68,69,70,71 Ethernet18/1 40000 18 on 0 +Ethernet72 72,73,74,75 Ethernet19/1 40000 19 on 0 +Ethernet76 76,77,78,79 Ethernet20/1 40000 20 on 0 +Ethernet80 80 Ethernet21/1 10000 21 off 1 +Ethernet81 81 Ethernet21/2 10000 21 off 2 +Ethernet82 82 Ethernet21/3 10000 21 off 3 +Ethernet83 83 Ethernet21/4 10000 21 off 4 +Ethernet84 84 Ethernet22/1 10000 22 off 1 +Ethernet85 85 Ethernet22/2 10000 22 off 2 +Ethernet86 86 Ethernet22/3 10000 22 off 3 +Ethernet87 87 Ethernet22/4 10000 22 off 4 +Ethernet88 88,89,90,91 Ethernet23/1 40000 23 off 0 +Ethernet92 92,93,94,95 Ethernet24/1 40000 24 off 0 +Ethernet96 96,97,98,99 Ethernet25/1 40000 25 off 0 +Ethernet100 100,101,102,103 Ethernet26/1 40000 26 off 0 +Ethernet104 104,105,106,107 Ethernet27/1 40000 27 off 0 +Ethernet108 108,109,110,111 Ethernet28/1 40000 28 off 0 +Ethernet112 112,113,114,115 Ethernet29/1 40000 29 off 0 +Ethernet116 116,117,118,119 Ethernet30/1 40000 30 off 0 +Ethernet120 120,121,122,123 Ethernet31/1 40000 31 off 0 +Ethernet124 124,125,126,127 Ethernet32/1 40000 32 off 0 +Ethernet128 128 Ethernet33/1 10000 33 off 1 +Ethernet129 129 Ethernet33/2 10000 33 off 2 +Ethernet130 130 Ethernet33/3 10000 33 off 3 +Ethernet131 131 Ethernet33/4 10000 33 off 4 +Ethernet132 132 Ethernet34/1 10000 34 off 1 +Ethernet133 133 Ethernet34/2 10000 34 off 2 +Ethernet134 134 Ethernet34/3 10000 34 off 3 +Ethernet135 135 Ethernet34/4 10000 34 off 4 +Ethernet136 136 Ethernet35/1 10000 35 off 1 +Ethernet137 137 Ethernet35/2 10000 35 off 2 +Ethernet138 138 Ethernet35/3 10000 35 off 3 +Ethernet139 139 Ethernet35/4 10000 35 off 4 +Ethernet140 140,141,142,143 Ethernet36/1 40000 36 off 0 +Ethernet144 144,145,146,147 Ethernet37/1 40000 37 off 0 +Ethernet148 148,149,150,151 Ethernet38/1 40000 38 off 0 +Ethernet152 152,153,154,155 Ethernet39/1 40000 39 off 0 +Ethernet156 156,157,158,159 Ethernet40/1 40000 40 off 0 +Ethernet160 160,161,162,163 Ethernet41/1 40000 41 on 0 +Ethernet164 164,165,166,167 Ethernet42/1 40000 42 on 0 +Ethernet168 168,169,170,171 Ethernet43/1 40000 43 on 0 +Ethernet172 172,173,174,175 Ethernet44/1 40000 44 on 0 +Ethernet176 176,177,178,179 Ethernet45/1 40000 45 on 0 +Ethernet180 180,181,182,183 Ethernet46/1 40000 46 on 0 +Ethernet184 184,185,186,187 Ethernet47/1 40000 47 on 0 +Ethernet188 188,189,190,191 Ethernet48/1 40000 48 on 0 +Ethernet192 192,193,194,195 Ethernet49/1 40000 49 on 0 +Ethernet196 196,197,198,199 Ethernet50/1 40000 50 on 0 +Ethernet200 200,201,202,203 Ethernet51/1 40000 51 on 0 +Ethernet204 204,205,206,207 Ethernet52/1 40000 52 on 0 +Ethernet208 208,209,210,211 Ethernet53/1 40000 53 on 0 +Ethernet212 212,213,214,215 Ethernet54/1 40000 54 on 0 +Ethernet216 216,217,218,219 Ethernet55/1 40000 55 on 0 +Ethernet220 220,221,222,223 Ethernet56/1 40000 56 on 0 +Ethernet224 224,225,226,227 Ethernet57/1 40000 57 on 0 +Ethernet228 228,229,230,231 Ethernet58/1 40000 58 on 0 +Ethernet232 232,233,234,235 Ethernet59/1 40000 59 on 0 +Ethernet236 236,237,238,239 Ethernet60/1 40000 60 on 0 +Ethernet240 240,241,242,243 Ethernet61/1 40000 61 on 0 +Ethernet244 244,245,246,247 Ethernet62/1 40000 62 on 0 +Ethernet248 248,249,250,251 Ethernet63/1 40000 63 on 0 +Ethernet252 252,253,254,255 Ethernet64/1 40000 64 on 0 diff --git a/device/arista/x86_64-arista_720dt_48s/installer.conf b/device/arista/x86_64-arista_720dt_48s/installer.conf new file mode 100644 index 00000000000..dc7ed80563f --- /dev/null +++ b/device/arista/x86_64-arista_720dt_48s/installer.conf @@ -0,0 +1,2 @@ +ARISTA_SID="PikeIslandZ PikeIslandZ-F PikeIslandZ-R PikeIslandZ-F PikeIslandZ-R" +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="" diff --git a/device/arista/x86_64-arista_720dt_48s_mgx/Arista-720DT-DC-G48S4 b/device/arista/x86_64-arista_720dt_48s_mgx/Arista-720DT-DC-G48S4 new file mode 120000 index 00000000000..4f3c4fb3a4f --- /dev/null +++ b/device/arista/x86_64-arista_720dt_48s_mgx/Arista-720DT-DC-G48S4 @@ -0,0 +1 @@ +Arista-720DT-MGX-G48S4 \ No newline at end of file diff --git a/device/arista/x86_64-arista_720dt_48s_mgx/Arista-720DT-MGX-G48S4 b/device/arista/x86_64-arista_720dt_48s_mgx/Arista-720DT-MGX-G48S4 new file mode 120000 index 00000000000..819d710df9a --- /dev/null +++ b/device/arista/x86_64-arista_720dt_48s_mgx/Arista-720DT-MGX-G48S4 @@ -0,0 +1 @@ +../x86_64-arista_720dt_48s/Arista-720DT-48S \ No newline at end of file diff --git a/device/arista/x86_64-arista_720dt_48s_mgx/default_sku b/device/arista/x86_64-arista_720dt_48s_mgx/default_sku index e2a3401c75a..cdba4a2fa50 100644 --- a/device/arista/x86_64-arista_720dt_48s_mgx/default_sku +++ b/device/arista/x86_64-arista_720dt_48s_mgx/default_sku @@ -1 +1 @@ -Arista-720DT-48S-MGX t1 +Arista-720DT-MGX-G48S4 t1 diff --git a/device/arista/x86_64-arista_720dt_48s_mgx/installer.conf b/device/arista/x86_64-arista_720dt_48s_mgx/installer.conf new file mode 100644 index 00000000000..386aa5b49bc --- /dev/null +++ b/device/arista/x86_64-arista_720dt_48s_mgx/installer.conf @@ -0,0 +1,2 @@ +ARISTA_SID="PikeIslandZ-MGX" +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="" diff --git a/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D108C10/port_config.ini b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D108C10/port_config.ini index 1ea0f1d505a..4f7adeebb0a 100644 --- a/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D108C10/port_config.ini +++ b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D108C10/port_config.ini @@ -1,121 +1,121 @@ -# name lanes alias index speed -Ethernet0 77,78,79,80 Ethernet1/1 1 100000 -Ethernet4 65,66,67,68 Ethernet2/1 2 100000 -Ethernet8 85,86 Ethernet3/1 3 50000 -Ethernet10 87,88 Ethernet3/3 3 50000 -Ethernet12 89,90 Ethernet4/1 4 50000 -Ethernet14 91,92 Ethernet4/3 4 50000 -Ethernet16 109,110 Ethernet5/1 5 50000 -Ethernet18 111,112 Ethernet5/3 5 50000 -Ethernet20 97,98 Ethernet6/1 6 50000 -Ethernet22 99,100 Ethernet6/3 6 50000 -Ethernet24 5,6 Ethernet7/1 7 50000 -Ethernet26 7,8 Ethernet7/3 7 50000 -Ethernet28 13,14 Ethernet8/1 8 50000 -Ethernet30 15,16 Ethernet8/3 8 50000 -Ethernet32 25,26 Ethernet9/1 9 50000 -Ethernet34 27,28 Ethernet9/3 9 50000 -Ethernet36 21,22 Ethernet10/1 10 50000 -Ethernet38 23,24 Ethernet10/3 10 50000 -Ethernet40 37,38 Ethernet11/1 11 50000 -Ethernet42 39,40 Ethernet11/3 11 50000 -Ethernet44 45,46 Ethernet12/1 12 50000 -Ethernet46 47,48 Ethernet12/3 12 50000 -Ethernet48 57,58,59,60 Ethernet13/1 13 100000 -Ethernet52 53,54,55,56 Ethernet14/1 14 100000 -Ethernet56 117,118,119,120 Ethernet15/1 15 100000 -Ethernet60 121,122,123,124 Ethernet16/1 16 100000 -Ethernet64 141,142,143,144 Ethernet17/1 17 100000 -Ethernet68 133,134,135,136 Ethernet18/1 18 100000 -Ethernet72 197,198,199,200 Ethernet19/1 19 100000 -Ethernet76 205,206,207,208 Ethernet20/1 20 100000 -Ethernet80 217,218 Ethernet21/1 21 50000 -Ethernet82 219,220 Ethernet21/3 21 50000 -Ethernet84 213,214 Ethernet22/1 22 50000 -Ethernet86 215,216 Ethernet22/3 22 50000 -Ethernet88 229,230 Ethernet23/1 23 50000 -Ethernet90 231,232 Ethernet23/3 23 50000 -Ethernet92 237,238 Ethernet24/1 24 50000 -Ethernet94 239,240 Ethernet24/3 24 50000 -Ethernet96 249,250 Ethernet25/1 25 50000 -Ethernet98 251,252 Ethernet25/3 25 50000 -Ethernet100 245,246 Ethernet26/1 26 50000 -Ethernet102 247,248 Ethernet26/3 26 50000 -Ethernet104 149,150 Ethernet27/1 27 50000 -Ethernet106 151,152 Ethernet27/3 27 50000 -Ethernet108 153,154 Ethernet28/1 28 50000 -Ethernet110 155,156 Ethernet28/3 28 50000 -Ethernet112 173,174 Ethernet29/1 29 50000 -Ethernet114 175,176 Ethernet29/3 29 50000 -Ethernet116 161,162 Ethernet30/1 30 50000 -Ethernet118 163,164 Ethernet30/3 30 50000 -Ethernet120 181,182 Ethernet31/1 31 50000 -Ethernet122 183,184 Ethernet31/3 31 50000 -Ethernet124 185,186 Ethernet32/1 32 50000 -Ethernet126 187,188 Ethernet32/3 32 50000 -Ethernet128 69,70 Ethernet33/1 33 50000 -Ethernet130 71,72 Ethernet33/3 33 50000 -Ethernet132 73,74 Ethernet34/1 34 50000 -Ethernet134 75,76 Ethernet34/3 34 50000 -Ethernet136 93,94 Ethernet35/1 35 50000 -Ethernet138 95,96 Ethernet35/3 35 50000 -Ethernet140 81,82 Ethernet36/1 36 50000 -Ethernet142 83,84 Ethernet36/3 36 50000 -Ethernet144 101,102 Ethernet37/1 37 50000 -Ethernet146 103,104 Ethernet37/3 37 50000 -Ethernet148 105,106 Ethernet38/1 38 50000 -Ethernet150 107,108 Ethernet38/3 38 50000 -Ethernet152 9,10 Ethernet39/1 39 50000 -Ethernet154 11,12 Ethernet39/3 39 50000 -Ethernet156 1,2 Ethernet40/1 40 50000 -Ethernet158 3,4 Ethernet40/3 40 50000 -Ethernet160 17,18 Ethernet41/1 41 50000 -Ethernet162 19,20 Ethernet41/3 41 50000 -Ethernet164 29,30 Ethernet42/1 42 50000 -Ethernet166 31,32 Ethernet42/3 42 50000 -Ethernet168 41,42 Ethernet43/1 43 50000 -Ethernet170 43,44 Ethernet43/3 43 50000 -Ethernet172 33,34 Ethernet44/1 44 50000 -Ethernet174 35,36 Ethernet44/3 44 50000 -Ethernet176 49,50 Ethernet45/1 45 50000 -Ethernet178 51,52 Ethernet45/3 45 50000 -Ethernet180 61,62 Ethernet46/1 46 50000 -Ethernet182 63,64 Ethernet46/3 46 50000 -Ethernet184 125,126 Ethernet47/1 47 50000 -Ethernet186 127,128 Ethernet47/3 47 50000 -Ethernet188 113,114 Ethernet48/1 48 50000 -Ethernet190 115,116 Ethernet48/3 48 50000 -Ethernet192 129,130 Ethernet49/1 49 50000 -Ethernet194 131,132 Ethernet49/3 49 50000 -Ethernet196 137,138 Ethernet50/1 50 50000 -Ethernet198 139,140 Ethernet50/3 50 50000 -Ethernet200 201,202 Ethernet51/1 51 50000 -Ethernet202 203,204 Ethernet51/3 51 50000 -Ethernet204 193,194 Ethernet52/1 52 50000 -Ethernet206 195,196 Ethernet52/3 52 50000 -Ethernet208 209,210 Ethernet53/1 53 50000 -Ethernet210 211,212 Ethernet53/3 53 50000 -Ethernet212 221,222 Ethernet54/1 54 50000 -Ethernet214 223,224 Ethernet54/3 54 50000 -Ethernet216 233,234 Ethernet55/1 55 50000 -Ethernet218 235,236 Ethernet55/3 55 50000 -Ethernet220 225,226 Ethernet56/1 56 50000 -Ethernet222 227,228 Ethernet56/3 56 50000 -Ethernet224 241,242 Ethernet57/1 57 50000 -Ethernet226 243,244 Ethernet57/3 57 50000 -Ethernet228 253,254 Ethernet58/1 58 50000 -Ethernet230 255,256 Ethernet58/3 58 50000 -Ethernet232 157,158 Ethernet59/1 59 50000 -Ethernet234 159,160 Ethernet59/3 59 50000 -Ethernet236 145,146 Ethernet60/1 60 50000 -Ethernet238 147,148 Ethernet60/3 60 50000 -Ethernet240 165,166 Ethernet61/1 61 50000 -Ethernet242 167,168 Ethernet61/3 61 50000 -Ethernet244 169,170 Ethernet62/1 62 50000 -Ethernet246 171,172 Ethernet62/3 62 50000 -Ethernet248 189,190 Ethernet63/1 63 50000 -Ethernet250 191,192 Ethernet63/3 63 50000 -Ethernet252 177,178 Ethernet64/1 64 50000 -Ethernet254 179,180 Ethernet64/3 64 50000 -Ethernet256 257 Ethernet65 65 10000 -Ethernet260 259 Ethernet66 66 10000 +# name lanes alias index speed subport +Ethernet0 77,78,79,80 Ethernet1/1 1 100000 0 +Ethernet4 65,66,67,68 Ethernet2/1 2 100000 0 +Ethernet8 85,86 Ethernet3/1 3 50000 1 +Ethernet10 87,88 Ethernet3/3 3 50000 2 +Ethernet12 89,90 Ethernet4/1 4 50000 1 +Ethernet14 91,92 Ethernet4/3 4 50000 2 +Ethernet16 109,110 Ethernet5/1 5 50000 1 +Ethernet18 111,112 Ethernet5/3 5 50000 2 +Ethernet20 97,98 Ethernet6/1 6 50000 1 +Ethernet22 99,100 Ethernet6/3 6 50000 2 +Ethernet24 5,6 Ethernet7/1 7 50000 1 +Ethernet26 7,8 Ethernet7/3 7 50000 2 +Ethernet28 13,14 Ethernet8/1 8 50000 1 +Ethernet30 15,16 Ethernet8/3 8 50000 2 +Ethernet32 25,26 Ethernet9/1 9 50000 1 +Ethernet34 27,28 Ethernet9/3 9 50000 2 +Ethernet36 21,22 Ethernet10/1 10 50000 1 +Ethernet38 23,24 Ethernet10/3 10 50000 2 +Ethernet40 37,38 Ethernet11/1 11 50000 1 +Ethernet42 39,40 Ethernet11/3 11 50000 2 +Ethernet44 45,46 Ethernet12/1 12 50000 1 +Ethernet46 47,48 Ethernet12/3 12 50000 2 +Ethernet48 57,58,59,60 Ethernet13/1 13 100000 0 +Ethernet52 53,54,55,56 Ethernet14/1 14 100000 0 +Ethernet56 117,118,119,120 Ethernet15/1 15 100000 0 +Ethernet60 121,122,123,124 Ethernet16/1 16 100000 0 +Ethernet64 141,142,143,144 Ethernet17/1 17 100000 0 +Ethernet68 133,134,135,136 Ethernet18/1 18 100000 0 +Ethernet72 197,198,199,200 Ethernet19/1 19 100000 0 +Ethernet76 205,206,207,208 Ethernet20/1 20 100000 0 +Ethernet80 217,218 Ethernet21/1 21 50000 1 +Ethernet82 219,220 Ethernet21/3 21 50000 2 +Ethernet84 213,214 Ethernet22/1 22 50000 1 +Ethernet86 215,216 Ethernet22/3 22 50000 2 +Ethernet88 229,230 Ethernet23/1 23 50000 1 +Ethernet90 231,232 Ethernet23/3 23 50000 2 +Ethernet92 237,238 Ethernet24/1 24 50000 1 +Ethernet94 239,240 Ethernet24/3 24 50000 2 +Ethernet96 249,250 Ethernet25/1 25 50000 1 +Ethernet98 251,252 Ethernet25/3 25 50000 2 +Ethernet100 245,246 Ethernet26/1 26 50000 1 +Ethernet102 247,248 Ethernet26/3 26 50000 2 +Ethernet104 149,150 Ethernet27/1 27 50000 1 +Ethernet106 151,152 Ethernet27/3 27 50000 2 +Ethernet108 153,154 Ethernet28/1 28 50000 1 +Ethernet110 155,156 Ethernet28/3 28 50000 2 +Ethernet112 173,174 Ethernet29/1 29 50000 1 +Ethernet114 175,176 Ethernet29/3 29 50000 2 +Ethernet116 161,162 Ethernet30/1 30 50000 1 +Ethernet118 163,164 Ethernet30/3 30 50000 2 +Ethernet120 181,182 Ethernet31/1 31 50000 1 +Ethernet122 183,184 Ethernet31/3 31 50000 2 +Ethernet124 185,186 Ethernet32/1 32 50000 1 +Ethernet126 187,188 Ethernet32/3 32 50000 2 +Ethernet128 69,70 Ethernet33/1 33 50000 1 +Ethernet130 71,72 Ethernet33/3 33 50000 2 +Ethernet132 73,74 Ethernet34/1 34 50000 1 +Ethernet134 75,76 Ethernet34/3 34 50000 2 +Ethernet136 93,94 Ethernet35/1 35 50000 1 +Ethernet138 95,96 Ethernet35/3 35 50000 2 +Ethernet140 81,82 Ethernet36/1 36 50000 1 +Ethernet142 83,84 Ethernet36/3 36 50000 2 +Ethernet144 101,102 Ethernet37/1 37 50000 1 +Ethernet146 103,104 Ethernet37/3 37 50000 2 +Ethernet148 105,106 Ethernet38/1 38 50000 1 +Ethernet150 107,108 Ethernet38/3 38 50000 2 +Ethernet152 9,10 Ethernet39/1 39 50000 1 +Ethernet154 11,12 Ethernet39/3 39 50000 2 +Ethernet156 1,2 Ethernet40/1 40 50000 1 +Ethernet158 3,4 Ethernet40/3 40 50000 2 +Ethernet160 17,18 Ethernet41/1 41 50000 1 +Ethernet162 19,20 Ethernet41/3 41 50000 2 +Ethernet164 29,30 Ethernet42/1 42 50000 1 +Ethernet166 31,32 Ethernet42/3 42 50000 2 +Ethernet168 41,42 Ethernet43/1 43 50000 1 +Ethernet170 43,44 Ethernet43/3 43 50000 2 +Ethernet172 33,34 Ethernet44/1 44 50000 1 +Ethernet174 35,36 Ethernet44/3 44 50000 2 +Ethernet176 49,50 Ethernet45/1 45 50000 1 +Ethernet178 51,52 Ethernet45/3 45 50000 2 +Ethernet180 61,62 Ethernet46/1 46 50000 1 +Ethernet182 63,64 Ethernet46/3 46 50000 2 +Ethernet184 125,126 Ethernet47/1 47 50000 1 +Ethernet186 127,128 Ethernet47/3 47 50000 2 +Ethernet188 113,114 Ethernet48/1 48 50000 1 +Ethernet190 115,116 Ethernet48/3 48 50000 2 +Ethernet192 129,130 Ethernet49/1 49 50000 1 +Ethernet194 131,132 Ethernet49/3 49 50000 2 +Ethernet196 137,138 Ethernet50/1 50 50000 1 +Ethernet198 139,140 Ethernet50/3 50 50000 2 +Ethernet200 201,202 Ethernet51/1 51 50000 1 +Ethernet202 203,204 Ethernet51/3 51 50000 2 +Ethernet204 193,194 Ethernet52/1 52 50000 1 +Ethernet206 195,196 Ethernet52/3 52 50000 2 +Ethernet208 209,210 Ethernet53/1 53 50000 1 +Ethernet210 211,212 Ethernet53/3 53 50000 2 +Ethernet212 221,222 Ethernet54/1 54 50000 1 +Ethernet214 223,224 Ethernet54/3 54 50000 2 +Ethernet216 233,234 Ethernet55/1 55 50000 1 +Ethernet218 235,236 Ethernet55/3 55 50000 2 +Ethernet220 225,226 Ethernet56/1 56 50000 1 +Ethernet222 227,228 Ethernet56/3 56 50000 2 +Ethernet224 241,242 Ethernet57/1 57 50000 1 +Ethernet226 243,244 Ethernet57/3 57 50000 2 +Ethernet228 253,254 Ethernet58/1 58 50000 1 +Ethernet230 255,256 Ethernet58/3 58 50000 2 +Ethernet232 157,158 Ethernet59/1 59 50000 1 +Ethernet234 159,160 Ethernet59/3 59 50000 2 +Ethernet236 145,146 Ethernet60/1 60 50000 1 +Ethernet238 147,148 Ethernet60/3 60 50000 2 +Ethernet240 165,166 Ethernet61/1 61 50000 1 +Ethernet242 167,168 Ethernet61/3 61 50000 2 +Ethernet244 169,170 Ethernet62/1 62 50000 1 +Ethernet246 171,172 Ethernet62/3 62 50000 2 +Ethernet248 189,190 Ethernet63/1 63 50000 1 +Ethernet250 191,192 Ethernet63/3 63 50000 2 +Ethernet252 177,178 Ethernet64/1 64 50000 1 +Ethernet254 179,180 Ethernet64/3 64 50000 2 +Ethernet256 257 Ethernet65 65 10000 0 +Ethernet260 259 Ethernet66 66 10000 0 diff --git a/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D108C8/port_config.ini b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D108C8/port_config.ini index c06fdd581ec..151bdad3272 100644 --- a/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D108C8/port_config.ini +++ b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D108C8/port_config.ini @@ -1,123 +1,123 @@ -# name lanes alias index speed -Ethernet0 77,78 Ethernet1/1 1 50000 -Ethernet2 79,80 Ethernet1/3 1 50000 -Ethernet4 65,66 Ethernet2/1 2 50000 -Ethernet6 67,68 Ethernet2/3 2 50000 -Ethernet8 85,86 Ethernet3/1 3 50000 -Ethernet10 87,88 Ethernet3/3 3 50000 -Ethernet12 89,90 Ethernet4/1 4 50000 -Ethernet14 91,92 Ethernet4/3 4 50000 -Ethernet16 109,110 Ethernet5/1 5 50000 -Ethernet18 111,112 Ethernet5/3 5 50000 -Ethernet20 97,98 Ethernet6/1 6 50000 -Ethernet22 99,100 Ethernet6/3 6 50000 -Ethernet24 5,6 Ethernet7/1 7 50000 -Ethernet26 7,8 Ethernet7/3 7 50000 -Ethernet28 13,14 Ethernet8/1 8 50000 -Ethernet30 15,16 Ethernet8/3 8 50000 -Ethernet32 25,26 Ethernet9/1 9 50000 -Ethernet34 27,28 Ethernet9/3 9 50000 -Ethernet36 21,22 Ethernet10/1 10 50000 -Ethernet38 23,24 Ethernet10/3 10 50000 -Ethernet40 37,38 Ethernet11/1 11 50000 -Ethernet42 39,40 Ethernet11/3 11 50000 -Ethernet44 45,46 Ethernet12/1 12 50000 -Ethernet46 47,48 Ethernet12/3 12 50000 -Ethernet48 57,58,59,60 Ethernet13/1 13 100000 -Ethernet52 53,54,55,56 Ethernet14/1 14 100000 -Ethernet56 117,118,119,120 Ethernet15/1 15 100000 -Ethernet60 121,122,123,124 Ethernet16/1 16 100000 -Ethernet64 141,142,143,144 Ethernet17/1 17 100000 -Ethernet68 133,134,135,136 Ethernet18/1 18 100000 -Ethernet72 197,198,199,200 Ethernet19/1 19 100000 -Ethernet76 205,206,207,208 Ethernet20/1 20 100000 -Ethernet80 217,218 Ethernet21/1 21 50000 -Ethernet82 219,220 Ethernet21/3 21 50000 -Ethernet84 213,214 Ethernet22/1 22 50000 -Ethernet86 215,216 Ethernet22/3 22 50000 -Ethernet88 229,230 Ethernet23/1 23 50000 -Ethernet90 231,232 Ethernet23/3 23 50000 -Ethernet92 237,238 Ethernet24/1 24 50000 -Ethernet94 239,240 Ethernet24/3 24 50000 -Ethernet96 249,250 Ethernet25/1 25 50000 -Ethernet98 251,252 Ethernet25/3 25 50000 -Ethernet100 245,246 Ethernet26/1 26 50000 -Ethernet102 247,248 Ethernet26/3 26 50000 -Ethernet104 149,150 Ethernet27/1 27 50000 -Ethernet106 151,152 Ethernet27/3 27 50000 -Ethernet108 153,154 Ethernet28/1 28 50000 -Ethernet110 155,156 Ethernet28/3 28 50000 -Ethernet112 173,174 Ethernet29/1 29 50000 -Ethernet114 175,176 Ethernet29/3 29 50000 -Ethernet116 161,162 Ethernet30/1 30 50000 -Ethernet118 163,164 Ethernet30/3 30 50000 -Ethernet120 181,182 Ethernet31/1 31 50000 -Ethernet122 183,184 Ethernet31/3 31 50000 -Ethernet124 185,186 Ethernet32/1 32 50000 -Ethernet126 187,188 Ethernet32/3 32 50000 -Ethernet128 69,70 Ethernet33/1 33 50000 -Ethernet130 71,72 Ethernet33/3 33 50000 -Ethernet132 73,74 Ethernet34/1 34 50000 -Ethernet134 75,76 Ethernet34/3 34 50000 -Ethernet136 93,94 Ethernet35/1 35 50000 -Ethernet138 95,96 Ethernet35/3 35 50000 -Ethernet140 81,82 Ethernet36/1 36 50000 -Ethernet142 83,84 Ethernet36/3 36 50000 -Ethernet144 101,102 Ethernet37/1 37 50000 -Ethernet146 103,104 Ethernet37/3 37 50000 -Ethernet148 105,106 Ethernet38/1 38 50000 -Ethernet150 107,108 Ethernet38/3 38 50000 -Ethernet152 9,10 Ethernet39/1 39 50000 -Ethernet154 11,12 Ethernet39/3 39 50000 -Ethernet156 1,2 Ethernet40/1 40 50000 -Ethernet158 3,4 Ethernet40/3 40 50000 -Ethernet160 17,18 Ethernet41/1 41 50000 -Ethernet162 19,20 Ethernet41/3 41 50000 -Ethernet164 29,30 Ethernet42/1 42 50000 -Ethernet166 31,32 Ethernet42/3 42 50000 -Ethernet168 41,42 Ethernet43/1 43 50000 -Ethernet170 43,44 Ethernet43/3 43 50000 -Ethernet172 33,34 Ethernet44/1 44 50000 -Ethernet174 35,36 Ethernet44/3 44 50000 -Ethernet176 49,50 Ethernet45/1 45 50000 -Ethernet178 51,52 Ethernet45/3 45 50000 -Ethernet180 61,62 Ethernet46/1 46 50000 -Ethernet182 63,64 Ethernet46/3 46 50000 -Ethernet184 125,126 Ethernet47/1 47 50000 -Ethernet186 127,128 Ethernet47/3 47 50000 -Ethernet188 113,114 Ethernet48/1 48 50000 -Ethernet190 115,116 Ethernet48/3 48 50000 -Ethernet192 129,130 Ethernet49/1 49 50000 -Ethernet194 131,132 Ethernet49/3 49 50000 -Ethernet196 137,138 Ethernet50/1 50 50000 -Ethernet198 139,140 Ethernet50/3 50 50000 -Ethernet200 201,202 Ethernet51/1 51 50000 -Ethernet202 203,204 Ethernet51/3 51 50000 -Ethernet204 193,194 Ethernet52/1 52 50000 -Ethernet206 195,196 Ethernet52/3 52 50000 -Ethernet208 209,210 Ethernet53/1 53 50000 -Ethernet210 211,212 Ethernet53/3 53 50000 -Ethernet212 221,222 Ethernet54/1 54 50000 -Ethernet214 223,224 Ethernet54/3 54 50000 -Ethernet216 233,234 Ethernet55/1 55 50000 -Ethernet218 235,236 Ethernet55/3 55 50000 -Ethernet220 225,226 Ethernet56/1 56 50000 -Ethernet222 227,228 Ethernet56/3 56 50000 -Ethernet224 241,242 Ethernet57/1 57 50000 -Ethernet226 243,244 Ethernet57/3 57 50000 -Ethernet228 253,254 Ethernet58/1 58 50000 -Ethernet230 255,256 Ethernet58/3 58 50000 -Ethernet232 157,158 Ethernet59/1 59 50000 -Ethernet234 159,160 Ethernet59/3 59 50000 -Ethernet236 145,146 Ethernet60/1 60 50000 -Ethernet238 147,148 Ethernet60/3 60 50000 -Ethernet240 165,166 Ethernet61/1 61 50000 -Ethernet242 167,168 Ethernet61/3 61 50000 -Ethernet244 169,170 Ethernet62/1 62 50000 -Ethernet246 171,172 Ethernet62/3 62 50000 -Ethernet248 189,190 Ethernet63/1 63 50000 -Ethernet250 191,192 Ethernet63/3 63 50000 -Ethernet252 177,178 Ethernet64/1 64 50000 -Ethernet254 179,180 Ethernet64/3 64 50000 -Ethernet256 257 Ethernet65 65 10000 -Ethernet260 259 Ethernet66 66 10000 +# name lanes alias index speed subport +Ethernet0 77,78 Ethernet1/1 1 50000 1 +Ethernet2 79,80 Ethernet1/3 1 50000 2 +Ethernet4 65,66 Ethernet2/1 2 50000 1 +Ethernet6 67,68 Ethernet2/3 2 50000 2 +Ethernet8 85,86 Ethernet3/1 3 50000 1 +Ethernet10 87,88 Ethernet3/3 3 50000 2 +Ethernet12 89,90 Ethernet4/1 4 50000 1 +Ethernet14 91,92 Ethernet4/3 4 50000 2 +Ethernet16 109,110 Ethernet5/1 5 50000 1 +Ethernet18 111,112 Ethernet5/3 5 50000 2 +Ethernet20 97,98 Ethernet6/1 6 50000 1 +Ethernet22 99,100 Ethernet6/3 6 50000 2 +Ethernet24 5,6 Ethernet7/1 7 50000 1 +Ethernet26 7,8 Ethernet7/3 7 50000 2 +Ethernet28 13,14 Ethernet8/1 8 50000 1 +Ethernet30 15,16 Ethernet8/3 8 50000 2 +Ethernet32 25,26 Ethernet9/1 9 50000 1 +Ethernet34 27,28 Ethernet9/3 9 50000 2 +Ethernet36 21,22 Ethernet10/1 10 50000 1 +Ethernet38 23,24 Ethernet10/3 10 50000 2 +Ethernet40 37,38 Ethernet11/1 11 50000 1 +Ethernet42 39,40 Ethernet11/3 11 50000 2 +Ethernet44 45,46 Ethernet12/1 12 50000 1 +Ethernet46 47,48 Ethernet12/3 12 50000 2 +Ethernet48 57,58,59,60 Ethernet13/1 13 100000 0 +Ethernet52 53,54,55,56 Ethernet14/1 14 100000 0 +Ethernet56 117,118,119,120 Ethernet15/1 15 100000 0 +Ethernet60 121,122,123,124 Ethernet16/1 16 100000 0 +Ethernet64 141,142,143,144 Ethernet17/1 17 100000 0 +Ethernet68 133,134,135,136 Ethernet18/1 18 100000 0 +Ethernet72 197,198,199,200 Ethernet19/1 19 100000 0 +Ethernet76 205,206,207,208 Ethernet20/1 20 100000 0 +Ethernet80 217,218 Ethernet21/1 21 50000 1 +Ethernet82 219,220 Ethernet21/3 21 50000 2 +Ethernet84 213,214 Ethernet22/1 22 50000 1 +Ethernet86 215,216 Ethernet22/3 22 50000 2 +Ethernet88 229,230 Ethernet23/1 23 50000 1 +Ethernet90 231,232 Ethernet23/3 23 50000 2 +Ethernet92 237,238 Ethernet24/1 24 50000 1 +Ethernet94 239,240 Ethernet24/3 24 50000 2 +Ethernet96 249,250 Ethernet25/1 25 50000 1 +Ethernet98 251,252 Ethernet25/3 25 50000 2 +Ethernet100 245,246 Ethernet26/1 26 50000 1 +Ethernet102 247,248 Ethernet26/3 26 50000 2 +Ethernet104 149,150 Ethernet27/1 27 50000 1 +Ethernet106 151,152 Ethernet27/3 27 50000 2 +Ethernet108 153,154 Ethernet28/1 28 50000 1 +Ethernet110 155,156 Ethernet28/3 28 50000 2 +Ethernet112 173,174 Ethernet29/1 29 50000 1 +Ethernet114 175,176 Ethernet29/3 29 50000 2 +Ethernet116 161,162 Ethernet30/1 30 50000 1 +Ethernet118 163,164 Ethernet30/3 30 50000 2 +Ethernet120 181,182 Ethernet31/1 31 50000 1 +Ethernet122 183,184 Ethernet31/3 31 50000 2 +Ethernet124 185,186 Ethernet32/1 32 50000 1 +Ethernet126 187,188 Ethernet32/3 32 50000 2 +Ethernet128 69,70 Ethernet33/1 33 50000 1 +Ethernet130 71,72 Ethernet33/3 33 50000 2 +Ethernet132 73,74 Ethernet34/1 34 50000 1 +Ethernet134 75,76 Ethernet34/3 34 50000 2 +Ethernet136 93,94 Ethernet35/1 35 50000 1 +Ethernet138 95,96 Ethernet35/3 35 50000 2 +Ethernet140 81,82 Ethernet36/1 36 50000 1 +Ethernet142 83,84 Ethernet36/3 36 50000 2 +Ethernet144 101,102 Ethernet37/1 37 50000 1 +Ethernet146 103,104 Ethernet37/3 37 50000 2 +Ethernet148 105,106 Ethernet38/1 38 50000 1 +Ethernet150 107,108 Ethernet38/3 38 50000 2 +Ethernet152 9,10 Ethernet39/1 39 50000 1 +Ethernet154 11,12 Ethernet39/3 39 50000 2 +Ethernet156 1,2 Ethernet40/1 40 50000 1 +Ethernet158 3,4 Ethernet40/3 40 50000 2 +Ethernet160 17,18 Ethernet41/1 41 50000 1 +Ethernet162 19,20 Ethernet41/3 41 50000 2 +Ethernet164 29,30 Ethernet42/1 42 50000 1 +Ethernet166 31,32 Ethernet42/3 42 50000 2 +Ethernet168 41,42 Ethernet43/1 43 50000 1 +Ethernet170 43,44 Ethernet43/3 43 50000 2 +Ethernet172 33,34 Ethernet44/1 44 50000 1 +Ethernet174 35,36 Ethernet44/3 44 50000 2 +Ethernet176 49,50 Ethernet45/1 45 50000 1 +Ethernet178 51,52 Ethernet45/3 45 50000 2 +Ethernet180 61,62 Ethernet46/1 46 50000 1 +Ethernet182 63,64 Ethernet46/3 46 50000 2 +Ethernet184 125,126 Ethernet47/1 47 50000 1 +Ethernet186 127,128 Ethernet47/3 47 50000 2 +Ethernet188 113,114 Ethernet48/1 48 50000 1 +Ethernet190 115,116 Ethernet48/3 48 50000 2 +Ethernet192 129,130 Ethernet49/1 49 50000 1 +Ethernet194 131,132 Ethernet49/3 49 50000 2 +Ethernet196 137,138 Ethernet50/1 50 50000 1 +Ethernet198 139,140 Ethernet50/3 50 50000 2 +Ethernet200 201,202 Ethernet51/1 51 50000 1 +Ethernet202 203,204 Ethernet51/3 51 50000 2 +Ethernet204 193,194 Ethernet52/1 52 50000 1 +Ethernet206 195,196 Ethernet52/3 52 50000 2 +Ethernet208 209,210 Ethernet53/1 53 50000 1 +Ethernet210 211,212 Ethernet53/3 53 50000 2 +Ethernet212 221,222 Ethernet54/1 54 50000 1 +Ethernet214 223,224 Ethernet54/3 54 50000 2 +Ethernet216 233,234 Ethernet55/1 55 50000 1 +Ethernet218 235,236 Ethernet55/3 55 50000 2 +Ethernet220 225,226 Ethernet56/1 56 50000 1 +Ethernet222 227,228 Ethernet56/3 56 50000 2 +Ethernet224 241,242 Ethernet57/1 57 50000 1 +Ethernet226 243,244 Ethernet57/3 57 50000 2 +Ethernet228 253,254 Ethernet58/1 58 50000 1 +Ethernet230 255,256 Ethernet58/3 58 50000 2 +Ethernet232 157,158 Ethernet59/1 59 50000 1 +Ethernet234 159,160 Ethernet59/3 59 50000 2 +Ethernet236 145,146 Ethernet60/1 60 50000 1 +Ethernet238 147,148 Ethernet60/3 60 50000 2 +Ethernet240 165,166 Ethernet61/1 61 50000 1 +Ethernet242 167,168 Ethernet61/3 61 50000 2 +Ethernet244 169,170 Ethernet62/1 62 50000 1 +Ethernet246 171,172 Ethernet62/3 62 50000 2 +Ethernet248 189,190 Ethernet63/1 63 50000 1 +Ethernet250 191,192 Ethernet63/3 63 50000 2 +Ethernet252 177,178 Ethernet64/1 64 50000 1 +Ethernet254 179,180 Ethernet64/3 64 50000 2 +Ethernet256 257 Ethernet65 65 10000 0 +Ethernet260 259 Ethernet66 66 10000 0 diff --git a/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D92C16/port_config.ini b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D92C16/port_config.ini index 49bd6fd6885..0768776933b 100644 --- a/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D92C16/port_config.ini +++ b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D92C16/port_config.ini @@ -1,115 +1,115 @@ -# name lanes alias index speed -Ethernet0 77,78 Ethernet1/1 1 50000 -Ethernet2 79,80 Ethernet1/3 1 50000 -Ethernet4 65,66 Ethernet2/1 2 50000 -Ethernet6 67,68 Ethernet2/3 2 50000 -Ethernet8 85,86 Ethernet3/1 3 50000 -Ethernet10 87,88 Ethernet3/3 3 50000 -Ethernet12 89,90 Ethernet4/1 4 50000 -Ethernet14 91,92 Ethernet4/3 4 50000 -Ethernet16 109,110 Ethernet5/1 5 50000 -Ethernet18 111,112 Ethernet5/3 5 50000 -Ethernet20 97,98 Ethernet6/1 6 50000 -Ethernet22 99,100 Ethernet6/3 6 50000 -Ethernet24 5,6 Ethernet7/1 7 50000 -Ethernet26 7,8 Ethernet7/3 7 50000 -Ethernet28 13,14 Ethernet8/1 8 50000 -Ethernet30 15,16 Ethernet8/3 8 50000 -Ethernet32 25,26 Ethernet9/1 9 50000 -Ethernet34 27,28 Ethernet9/3 9 50000 -Ethernet36 21,22 Ethernet10/1 10 50000 -Ethernet38 23,24 Ethernet10/3 10 50000 -Ethernet40 37,38 Ethernet11/1 11 50000 -Ethernet42 39,40 Ethernet11/3 11 50000 -Ethernet44 45,46 Ethernet12/1 12 50000 -Ethernet46 47,48 Ethernet12/3 12 50000 -Ethernet48 57,58,59,60 Ethernet13/1 13 100000 -Ethernet52 53,54,55,56 Ethernet14/1 14 100000 -Ethernet56 117,118,119,120 Ethernet15/1 15 100000 -Ethernet60 121,122,123,124 Ethernet16/1 16 100000 -Ethernet64 141,142,143,144 Ethernet17/1 17 100000 -Ethernet68 133,134,135,136 Ethernet18/1 18 100000 -Ethernet72 197,198,199,200 Ethernet19/1 19 100000 -Ethernet76 205,206,207,208 Ethernet20/1 20 100000 -Ethernet80 217,218 Ethernet21/1 21 50000 -Ethernet82 219,220 Ethernet21/3 21 50000 -Ethernet84 213,214 Ethernet22/1 22 50000 -Ethernet86 215,216 Ethernet22/3 22 50000 -Ethernet88 229,230 Ethernet23/1 23 50000 -Ethernet90 231,232 Ethernet23/3 23 50000 -Ethernet92 237,238 Ethernet24/1 24 50000 -Ethernet94 239,240 Ethernet24/3 24 50000 -Ethernet96 249,250 Ethernet25/1 25 50000 -Ethernet98 251,252 Ethernet25/3 25 50000 -Ethernet100 245,246 Ethernet26/1 26 50000 -Ethernet102 247,248 Ethernet26/3 26 50000 -Ethernet104 149,150 Ethernet27/1 27 50000 -Ethernet106 151,152 Ethernet27/3 27 50000 -Ethernet108 153,154 Ethernet28/1 28 50000 -Ethernet110 155,156 Ethernet28/3 28 50000 -Ethernet112 173,174 Ethernet29/1 29 50000 -Ethernet114 175,176 Ethernet29/3 29 50000 -Ethernet116 161,162 Ethernet30/1 30 50000 -Ethernet118 163,164 Ethernet30/3 30 50000 -Ethernet120 181,182 Ethernet31/1 31 50000 -Ethernet122 183,184 Ethernet31/3 31 50000 -Ethernet124 185,186 Ethernet32/1 32 50000 -Ethernet126 187,188 Ethernet32/3 32 50000 -Ethernet128 69,70 Ethernet33/1 33 50000 -Ethernet130 71,72 Ethernet33/3 33 50000 -Ethernet132 73,74 Ethernet34/1 34 50000 -Ethernet134 75,76 Ethernet34/3 34 50000 -Ethernet136 93,94 Ethernet35/1 35 50000 -Ethernet138 95,96 Ethernet35/3 35 50000 -Ethernet140 81,82 Ethernet36/1 36 50000 -Ethernet142 83,84 Ethernet36/3 36 50000 -Ethernet144 101,102 Ethernet37/1 37 50000 -Ethernet146 103,104 Ethernet37/3 37 50000 -Ethernet148 105,106 Ethernet38/1 38 50000 -Ethernet150 107,108 Ethernet38/3 38 50000 -Ethernet152 9,10 Ethernet39/1 39 50000 -Ethernet154 11,12 Ethernet39/3 39 50000 -Ethernet156 1,2 Ethernet40/1 40 50000 -Ethernet158 3,4 Ethernet40/3 40 50000 -Ethernet160 17,18 Ethernet41/1 41 50000 -Ethernet162 19,20 Ethernet41/3 41 50000 -Ethernet164 29,30 Ethernet42/1 42 50000 -Ethernet166 31,32 Ethernet42/3 42 50000 -Ethernet168 41,42 Ethernet43/1 43 50000 -Ethernet170 43,44 Ethernet43/3 43 50000 -Ethernet172 33,34 Ethernet44/1 44 50000 -Ethernet174 35,36 Ethernet44/3 44 50000 -Ethernet176 49,50,51,52 Ethernet45/1 45 100000 -Ethernet180 61,62,63,64 Ethernet46/1 46 100000 -Ethernet184 125,126,127,128 Ethernet47/1 47 100000 -Ethernet188 113,114,115,116 Ethernet48/1 48 100000 -Ethernet192 129,130,131,132 Ethernet49/1 49 100000 -Ethernet196 137,138,139,140 Ethernet50/1 50 100000 -Ethernet200 201,202,203,204 Ethernet51/1 51 100000 -Ethernet204 193,194,195,196 Ethernet52/1 52 100000 -Ethernet208 209,210 Ethernet53/1 53 50000 -Ethernet210 211,212 Ethernet53/3 53 50000 -Ethernet212 221,222 Ethernet54/1 54 50000 -Ethernet214 223,224 Ethernet54/3 54 50000 -Ethernet216 233,234 Ethernet55/1 55 50000 -Ethernet218 235,236 Ethernet55/3 55 50000 -Ethernet220 225,226 Ethernet56/1 56 50000 -Ethernet222 227,228 Ethernet56/3 56 50000 -Ethernet224 241,242 Ethernet57/1 57 50000 -Ethernet226 243,244 Ethernet57/3 57 50000 -Ethernet228 253,254 Ethernet58/1 58 50000 -Ethernet230 255,256 Ethernet58/3 58 50000 -Ethernet232 157,158 Ethernet59/1 59 50000 -Ethernet234 159,160 Ethernet59/3 59 50000 -Ethernet236 145,146 Ethernet60/1 60 50000 -Ethernet238 147,148 Ethernet60/3 60 50000 -Ethernet240 165,166 Ethernet61/1 61 50000 -Ethernet242 167,168 Ethernet61/3 61 50000 -Ethernet244 169,170 Ethernet62/1 62 50000 -Ethernet246 171,172 Ethernet62/3 62 50000 -Ethernet248 189,190 Ethernet63/1 63 50000 -Ethernet250 191,192 Ethernet63/3 63 50000 -Ethernet252 177,178 Ethernet64/1 64 50000 -Ethernet254 179,180 Ethernet64/3 64 50000 -Ethernet256 257 Ethernet65 65 10000 -Ethernet260 259 Ethernet66 66 10000 +# name lanes alias index speed subport +Ethernet0 77,78 Ethernet1/1 1 50000 1 +Ethernet2 79,80 Ethernet1/3 1 50000 2 +Ethernet4 65,66 Ethernet2/1 2 50000 1 +Ethernet6 67,68 Ethernet2/3 2 50000 2 +Ethernet8 85,86 Ethernet3/1 3 50000 1 +Ethernet10 87,88 Ethernet3/3 3 50000 2 +Ethernet12 89,90 Ethernet4/1 4 50000 1 +Ethernet14 91,92 Ethernet4/3 4 50000 2 +Ethernet16 109,110 Ethernet5/1 5 50000 1 +Ethernet18 111,112 Ethernet5/3 5 50000 2 +Ethernet20 97,98 Ethernet6/1 6 50000 1 +Ethernet22 99,100 Ethernet6/3 6 50000 2 +Ethernet24 5,6 Ethernet7/1 7 50000 1 +Ethernet26 7,8 Ethernet7/3 7 50000 2 +Ethernet28 13,14 Ethernet8/1 8 50000 1 +Ethernet30 15,16 Ethernet8/3 8 50000 2 +Ethernet32 25,26 Ethernet9/1 9 50000 1 +Ethernet34 27,28 Ethernet9/3 9 50000 2 +Ethernet36 21,22 Ethernet10/1 10 50000 1 +Ethernet38 23,24 Ethernet10/3 10 50000 2 +Ethernet40 37,38 Ethernet11/1 11 50000 1 +Ethernet42 39,40 Ethernet11/3 11 50000 2 +Ethernet44 45,46 Ethernet12/1 12 50000 1 +Ethernet46 47,48 Ethernet12/3 12 50000 2 +Ethernet48 57,58,59,60 Ethernet13/1 13 100000 0 +Ethernet52 53,54,55,56 Ethernet14/1 14 100000 0 +Ethernet56 117,118,119,120 Ethernet15/1 15 100000 0 +Ethernet60 121,122,123,124 Ethernet16/1 16 100000 0 +Ethernet64 141,142,143,144 Ethernet17/1 17 100000 0 +Ethernet68 133,134,135,136 Ethernet18/1 18 100000 0 +Ethernet72 197,198,199,200 Ethernet19/1 19 100000 0 +Ethernet76 205,206,207,208 Ethernet20/1 20 100000 0 +Ethernet80 217,218 Ethernet21/1 21 50000 1 +Ethernet82 219,220 Ethernet21/3 21 50000 2 +Ethernet84 213,214 Ethernet22/1 22 50000 1 +Ethernet86 215,216 Ethernet22/3 22 50000 2 +Ethernet88 229,230 Ethernet23/1 23 50000 1 +Ethernet90 231,232 Ethernet23/3 23 50000 2 +Ethernet92 237,238 Ethernet24/1 24 50000 1 +Ethernet94 239,240 Ethernet24/3 24 50000 2 +Ethernet96 249,250 Ethernet25/1 25 50000 1 +Ethernet98 251,252 Ethernet25/3 25 50000 2 +Ethernet100 245,246 Ethernet26/1 26 50000 1 +Ethernet102 247,248 Ethernet26/3 26 50000 2 +Ethernet104 149,150 Ethernet27/1 27 50000 1 +Ethernet106 151,152 Ethernet27/3 27 50000 2 +Ethernet108 153,154 Ethernet28/1 28 50000 1 +Ethernet110 155,156 Ethernet28/3 28 50000 2 +Ethernet112 173,174 Ethernet29/1 29 50000 1 +Ethernet114 175,176 Ethernet29/3 29 50000 2 +Ethernet116 161,162 Ethernet30/1 30 50000 1 +Ethernet118 163,164 Ethernet30/3 30 50000 2 +Ethernet120 181,182 Ethernet31/1 31 50000 1 +Ethernet122 183,184 Ethernet31/3 31 50000 2 +Ethernet124 185,186 Ethernet32/1 32 50000 1 +Ethernet126 187,188 Ethernet32/3 32 50000 2 +Ethernet128 69,70 Ethernet33/1 33 50000 1 +Ethernet130 71,72 Ethernet33/3 33 50000 2 +Ethernet132 73,74 Ethernet34/1 34 50000 1 +Ethernet134 75,76 Ethernet34/3 34 50000 2 +Ethernet136 93,94 Ethernet35/1 35 50000 1 +Ethernet138 95,96 Ethernet35/3 35 50000 2 +Ethernet140 81,82 Ethernet36/1 36 50000 1 +Ethernet142 83,84 Ethernet36/3 36 50000 2 +Ethernet144 101,102 Ethernet37/1 37 50000 1 +Ethernet146 103,104 Ethernet37/3 37 50000 2 +Ethernet148 105,106 Ethernet38/1 38 50000 1 +Ethernet150 107,108 Ethernet38/3 38 50000 2 +Ethernet152 9,10 Ethernet39/1 39 50000 1 +Ethernet154 11,12 Ethernet39/3 39 50000 2 +Ethernet156 1,2 Ethernet40/1 40 50000 1 +Ethernet158 3,4 Ethernet40/3 40 50000 2 +Ethernet160 17,18 Ethernet41/1 41 50000 1 +Ethernet162 19,20 Ethernet41/3 41 50000 2 +Ethernet164 29,30 Ethernet42/1 42 50000 1 +Ethernet166 31,32 Ethernet42/3 42 50000 2 +Ethernet168 41,42 Ethernet43/1 43 50000 1 +Ethernet170 43,44 Ethernet43/3 43 50000 2 +Ethernet172 33,34 Ethernet44/1 44 50000 1 +Ethernet174 35,36 Ethernet44/3 44 50000 2 +Ethernet176 49,50,51,52 Ethernet45/1 45 100000 0 +Ethernet180 61,62,63,64 Ethernet46/1 46 100000 0 +Ethernet184 125,126,127,128 Ethernet47/1 47 100000 0 +Ethernet188 113,114,115,116 Ethernet48/1 48 100000 0 +Ethernet192 129,130,131,132 Ethernet49/1 49 100000 0 +Ethernet196 137,138,139,140 Ethernet50/1 50 100000 0 +Ethernet200 201,202,203,204 Ethernet51/1 51 100000 0 +Ethernet204 193,194,195,196 Ethernet52/1 52 100000 0 +Ethernet208 209,210 Ethernet53/1 53 50000 1 +Ethernet210 211,212 Ethernet53/3 53 50000 2 +Ethernet212 221,222 Ethernet54/1 54 50000 1 +Ethernet214 223,224 Ethernet54/3 54 50000 2 +Ethernet216 233,234 Ethernet55/1 55 50000 1 +Ethernet218 235,236 Ethernet55/3 55 50000 2 +Ethernet220 225,226 Ethernet56/1 56 50000 1 +Ethernet222 227,228 Ethernet56/3 56 50000 2 +Ethernet224 241,242 Ethernet57/1 57 50000 1 +Ethernet226 243,244 Ethernet57/3 57 50000 2 +Ethernet228 253,254 Ethernet58/1 58 50000 1 +Ethernet230 255,256 Ethernet58/3 58 50000 2 +Ethernet232 157,158 Ethernet59/1 59 50000 1 +Ethernet234 159,160 Ethernet59/3 59 50000 2 +Ethernet236 145,146 Ethernet60/1 60 50000 1 +Ethernet238 147,148 Ethernet60/3 60 50000 2 +Ethernet240 165,166 Ethernet61/1 61 50000 1 +Ethernet242 167,168 Ethernet61/3 61 50000 2 +Ethernet244 169,170 Ethernet62/1 62 50000 1 +Ethernet246 171,172 Ethernet62/3 62 50000 2 +Ethernet248 189,190 Ethernet63/1 63 50000 1 +Ethernet250 191,192 Ethernet63/3 63 50000 2 +Ethernet252 177,178 Ethernet64/1 64 50000 1 +Ethernet254 179,180 Ethernet64/3 64 50000 2 +Ethernet256 257 Ethernet65 65 10000 0 +Ethernet260 259 Ethernet66 66 10000 0 diff --git a/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D96C16/port_config.ini b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D96C16/port_config.ini index 49bd6fd6885..0768776933b 100644 --- a/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D96C16/port_config.ini +++ b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-D96C16/port_config.ini @@ -1,115 +1,115 @@ -# name lanes alias index speed -Ethernet0 77,78 Ethernet1/1 1 50000 -Ethernet2 79,80 Ethernet1/3 1 50000 -Ethernet4 65,66 Ethernet2/1 2 50000 -Ethernet6 67,68 Ethernet2/3 2 50000 -Ethernet8 85,86 Ethernet3/1 3 50000 -Ethernet10 87,88 Ethernet3/3 3 50000 -Ethernet12 89,90 Ethernet4/1 4 50000 -Ethernet14 91,92 Ethernet4/3 4 50000 -Ethernet16 109,110 Ethernet5/1 5 50000 -Ethernet18 111,112 Ethernet5/3 5 50000 -Ethernet20 97,98 Ethernet6/1 6 50000 -Ethernet22 99,100 Ethernet6/3 6 50000 -Ethernet24 5,6 Ethernet7/1 7 50000 -Ethernet26 7,8 Ethernet7/3 7 50000 -Ethernet28 13,14 Ethernet8/1 8 50000 -Ethernet30 15,16 Ethernet8/3 8 50000 -Ethernet32 25,26 Ethernet9/1 9 50000 -Ethernet34 27,28 Ethernet9/3 9 50000 -Ethernet36 21,22 Ethernet10/1 10 50000 -Ethernet38 23,24 Ethernet10/3 10 50000 -Ethernet40 37,38 Ethernet11/1 11 50000 -Ethernet42 39,40 Ethernet11/3 11 50000 -Ethernet44 45,46 Ethernet12/1 12 50000 -Ethernet46 47,48 Ethernet12/3 12 50000 -Ethernet48 57,58,59,60 Ethernet13/1 13 100000 -Ethernet52 53,54,55,56 Ethernet14/1 14 100000 -Ethernet56 117,118,119,120 Ethernet15/1 15 100000 -Ethernet60 121,122,123,124 Ethernet16/1 16 100000 -Ethernet64 141,142,143,144 Ethernet17/1 17 100000 -Ethernet68 133,134,135,136 Ethernet18/1 18 100000 -Ethernet72 197,198,199,200 Ethernet19/1 19 100000 -Ethernet76 205,206,207,208 Ethernet20/1 20 100000 -Ethernet80 217,218 Ethernet21/1 21 50000 -Ethernet82 219,220 Ethernet21/3 21 50000 -Ethernet84 213,214 Ethernet22/1 22 50000 -Ethernet86 215,216 Ethernet22/3 22 50000 -Ethernet88 229,230 Ethernet23/1 23 50000 -Ethernet90 231,232 Ethernet23/3 23 50000 -Ethernet92 237,238 Ethernet24/1 24 50000 -Ethernet94 239,240 Ethernet24/3 24 50000 -Ethernet96 249,250 Ethernet25/1 25 50000 -Ethernet98 251,252 Ethernet25/3 25 50000 -Ethernet100 245,246 Ethernet26/1 26 50000 -Ethernet102 247,248 Ethernet26/3 26 50000 -Ethernet104 149,150 Ethernet27/1 27 50000 -Ethernet106 151,152 Ethernet27/3 27 50000 -Ethernet108 153,154 Ethernet28/1 28 50000 -Ethernet110 155,156 Ethernet28/3 28 50000 -Ethernet112 173,174 Ethernet29/1 29 50000 -Ethernet114 175,176 Ethernet29/3 29 50000 -Ethernet116 161,162 Ethernet30/1 30 50000 -Ethernet118 163,164 Ethernet30/3 30 50000 -Ethernet120 181,182 Ethernet31/1 31 50000 -Ethernet122 183,184 Ethernet31/3 31 50000 -Ethernet124 185,186 Ethernet32/1 32 50000 -Ethernet126 187,188 Ethernet32/3 32 50000 -Ethernet128 69,70 Ethernet33/1 33 50000 -Ethernet130 71,72 Ethernet33/3 33 50000 -Ethernet132 73,74 Ethernet34/1 34 50000 -Ethernet134 75,76 Ethernet34/3 34 50000 -Ethernet136 93,94 Ethernet35/1 35 50000 -Ethernet138 95,96 Ethernet35/3 35 50000 -Ethernet140 81,82 Ethernet36/1 36 50000 -Ethernet142 83,84 Ethernet36/3 36 50000 -Ethernet144 101,102 Ethernet37/1 37 50000 -Ethernet146 103,104 Ethernet37/3 37 50000 -Ethernet148 105,106 Ethernet38/1 38 50000 -Ethernet150 107,108 Ethernet38/3 38 50000 -Ethernet152 9,10 Ethernet39/1 39 50000 -Ethernet154 11,12 Ethernet39/3 39 50000 -Ethernet156 1,2 Ethernet40/1 40 50000 -Ethernet158 3,4 Ethernet40/3 40 50000 -Ethernet160 17,18 Ethernet41/1 41 50000 -Ethernet162 19,20 Ethernet41/3 41 50000 -Ethernet164 29,30 Ethernet42/1 42 50000 -Ethernet166 31,32 Ethernet42/3 42 50000 -Ethernet168 41,42 Ethernet43/1 43 50000 -Ethernet170 43,44 Ethernet43/3 43 50000 -Ethernet172 33,34 Ethernet44/1 44 50000 -Ethernet174 35,36 Ethernet44/3 44 50000 -Ethernet176 49,50,51,52 Ethernet45/1 45 100000 -Ethernet180 61,62,63,64 Ethernet46/1 46 100000 -Ethernet184 125,126,127,128 Ethernet47/1 47 100000 -Ethernet188 113,114,115,116 Ethernet48/1 48 100000 -Ethernet192 129,130,131,132 Ethernet49/1 49 100000 -Ethernet196 137,138,139,140 Ethernet50/1 50 100000 -Ethernet200 201,202,203,204 Ethernet51/1 51 100000 -Ethernet204 193,194,195,196 Ethernet52/1 52 100000 -Ethernet208 209,210 Ethernet53/1 53 50000 -Ethernet210 211,212 Ethernet53/3 53 50000 -Ethernet212 221,222 Ethernet54/1 54 50000 -Ethernet214 223,224 Ethernet54/3 54 50000 -Ethernet216 233,234 Ethernet55/1 55 50000 -Ethernet218 235,236 Ethernet55/3 55 50000 -Ethernet220 225,226 Ethernet56/1 56 50000 -Ethernet222 227,228 Ethernet56/3 56 50000 -Ethernet224 241,242 Ethernet57/1 57 50000 -Ethernet226 243,244 Ethernet57/3 57 50000 -Ethernet228 253,254 Ethernet58/1 58 50000 -Ethernet230 255,256 Ethernet58/3 58 50000 -Ethernet232 157,158 Ethernet59/1 59 50000 -Ethernet234 159,160 Ethernet59/3 59 50000 -Ethernet236 145,146 Ethernet60/1 60 50000 -Ethernet238 147,148 Ethernet60/3 60 50000 -Ethernet240 165,166 Ethernet61/1 61 50000 -Ethernet242 167,168 Ethernet61/3 61 50000 -Ethernet244 169,170 Ethernet62/1 62 50000 -Ethernet246 171,172 Ethernet62/3 62 50000 -Ethernet248 189,190 Ethernet63/1 63 50000 -Ethernet250 191,192 Ethernet63/3 63 50000 -Ethernet252 177,178 Ethernet64/1 64 50000 -Ethernet254 179,180 Ethernet64/3 64 50000 -Ethernet256 257 Ethernet65 65 10000 -Ethernet260 259 Ethernet66 66 10000 +# name lanes alias index speed subport +Ethernet0 77,78 Ethernet1/1 1 50000 1 +Ethernet2 79,80 Ethernet1/3 1 50000 2 +Ethernet4 65,66 Ethernet2/1 2 50000 1 +Ethernet6 67,68 Ethernet2/3 2 50000 2 +Ethernet8 85,86 Ethernet3/1 3 50000 1 +Ethernet10 87,88 Ethernet3/3 3 50000 2 +Ethernet12 89,90 Ethernet4/1 4 50000 1 +Ethernet14 91,92 Ethernet4/3 4 50000 2 +Ethernet16 109,110 Ethernet5/1 5 50000 1 +Ethernet18 111,112 Ethernet5/3 5 50000 2 +Ethernet20 97,98 Ethernet6/1 6 50000 1 +Ethernet22 99,100 Ethernet6/3 6 50000 2 +Ethernet24 5,6 Ethernet7/1 7 50000 1 +Ethernet26 7,8 Ethernet7/3 7 50000 2 +Ethernet28 13,14 Ethernet8/1 8 50000 1 +Ethernet30 15,16 Ethernet8/3 8 50000 2 +Ethernet32 25,26 Ethernet9/1 9 50000 1 +Ethernet34 27,28 Ethernet9/3 9 50000 2 +Ethernet36 21,22 Ethernet10/1 10 50000 1 +Ethernet38 23,24 Ethernet10/3 10 50000 2 +Ethernet40 37,38 Ethernet11/1 11 50000 1 +Ethernet42 39,40 Ethernet11/3 11 50000 2 +Ethernet44 45,46 Ethernet12/1 12 50000 1 +Ethernet46 47,48 Ethernet12/3 12 50000 2 +Ethernet48 57,58,59,60 Ethernet13/1 13 100000 0 +Ethernet52 53,54,55,56 Ethernet14/1 14 100000 0 +Ethernet56 117,118,119,120 Ethernet15/1 15 100000 0 +Ethernet60 121,122,123,124 Ethernet16/1 16 100000 0 +Ethernet64 141,142,143,144 Ethernet17/1 17 100000 0 +Ethernet68 133,134,135,136 Ethernet18/1 18 100000 0 +Ethernet72 197,198,199,200 Ethernet19/1 19 100000 0 +Ethernet76 205,206,207,208 Ethernet20/1 20 100000 0 +Ethernet80 217,218 Ethernet21/1 21 50000 1 +Ethernet82 219,220 Ethernet21/3 21 50000 2 +Ethernet84 213,214 Ethernet22/1 22 50000 1 +Ethernet86 215,216 Ethernet22/3 22 50000 2 +Ethernet88 229,230 Ethernet23/1 23 50000 1 +Ethernet90 231,232 Ethernet23/3 23 50000 2 +Ethernet92 237,238 Ethernet24/1 24 50000 1 +Ethernet94 239,240 Ethernet24/3 24 50000 2 +Ethernet96 249,250 Ethernet25/1 25 50000 1 +Ethernet98 251,252 Ethernet25/3 25 50000 2 +Ethernet100 245,246 Ethernet26/1 26 50000 1 +Ethernet102 247,248 Ethernet26/3 26 50000 2 +Ethernet104 149,150 Ethernet27/1 27 50000 1 +Ethernet106 151,152 Ethernet27/3 27 50000 2 +Ethernet108 153,154 Ethernet28/1 28 50000 1 +Ethernet110 155,156 Ethernet28/3 28 50000 2 +Ethernet112 173,174 Ethernet29/1 29 50000 1 +Ethernet114 175,176 Ethernet29/3 29 50000 2 +Ethernet116 161,162 Ethernet30/1 30 50000 1 +Ethernet118 163,164 Ethernet30/3 30 50000 2 +Ethernet120 181,182 Ethernet31/1 31 50000 1 +Ethernet122 183,184 Ethernet31/3 31 50000 2 +Ethernet124 185,186 Ethernet32/1 32 50000 1 +Ethernet126 187,188 Ethernet32/3 32 50000 2 +Ethernet128 69,70 Ethernet33/1 33 50000 1 +Ethernet130 71,72 Ethernet33/3 33 50000 2 +Ethernet132 73,74 Ethernet34/1 34 50000 1 +Ethernet134 75,76 Ethernet34/3 34 50000 2 +Ethernet136 93,94 Ethernet35/1 35 50000 1 +Ethernet138 95,96 Ethernet35/3 35 50000 2 +Ethernet140 81,82 Ethernet36/1 36 50000 1 +Ethernet142 83,84 Ethernet36/3 36 50000 2 +Ethernet144 101,102 Ethernet37/1 37 50000 1 +Ethernet146 103,104 Ethernet37/3 37 50000 2 +Ethernet148 105,106 Ethernet38/1 38 50000 1 +Ethernet150 107,108 Ethernet38/3 38 50000 2 +Ethernet152 9,10 Ethernet39/1 39 50000 1 +Ethernet154 11,12 Ethernet39/3 39 50000 2 +Ethernet156 1,2 Ethernet40/1 40 50000 1 +Ethernet158 3,4 Ethernet40/3 40 50000 2 +Ethernet160 17,18 Ethernet41/1 41 50000 1 +Ethernet162 19,20 Ethernet41/3 41 50000 2 +Ethernet164 29,30 Ethernet42/1 42 50000 1 +Ethernet166 31,32 Ethernet42/3 42 50000 2 +Ethernet168 41,42 Ethernet43/1 43 50000 1 +Ethernet170 43,44 Ethernet43/3 43 50000 2 +Ethernet172 33,34 Ethernet44/1 44 50000 1 +Ethernet174 35,36 Ethernet44/3 44 50000 2 +Ethernet176 49,50,51,52 Ethernet45/1 45 100000 0 +Ethernet180 61,62,63,64 Ethernet46/1 46 100000 0 +Ethernet184 125,126,127,128 Ethernet47/1 47 100000 0 +Ethernet188 113,114,115,116 Ethernet48/1 48 100000 0 +Ethernet192 129,130,131,132 Ethernet49/1 49 100000 0 +Ethernet196 137,138,139,140 Ethernet50/1 50 100000 0 +Ethernet200 201,202,203,204 Ethernet51/1 51 100000 0 +Ethernet204 193,194,195,196 Ethernet52/1 52 100000 0 +Ethernet208 209,210 Ethernet53/1 53 50000 1 +Ethernet210 211,212 Ethernet53/3 53 50000 2 +Ethernet212 221,222 Ethernet54/1 54 50000 1 +Ethernet214 223,224 Ethernet54/3 54 50000 2 +Ethernet216 233,234 Ethernet55/1 55 50000 1 +Ethernet218 235,236 Ethernet55/3 55 50000 2 +Ethernet220 225,226 Ethernet56/1 56 50000 1 +Ethernet222 227,228 Ethernet56/3 56 50000 2 +Ethernet224 241,242 Ethernet57/1 57 50000 1 +Ethernet226 243,244 Ethernet57/3 57 50000 2 +Ethernet228 253,254 Ethernet58/1 58 50000 1 +Ethernet230 255,256 Ethernet58/3 58 50000 2 +Ethernet232 157,158 Ethernet59/1 59 50000 1 +Ethernet234 159,160 Ethernet59/3 59 50000 2 +Ethernet236 145,146 Ethernet60/1 60 50000 1 +Ethernet238 147,148 Ethernet60/3 60 50000 2 +Ethernet240 165,166 Ethernet61/1 61 50000 1 +Ethernet242 167,168 Ethernet61/3 61 50000 2 +Ethernet244 169,170 Ethernet62/1 62 50000 1 +Ethernet246 171,172 Ethernet62/3 62 50000 2 +Ethernet248 189,190 Ethernet63/1 63 50000 1 +Ethernet250 191,192 Ethernet63/3 63 50000 2 +Ethernet252 177,178 Ethernet64/1 64 50000 1 +Ethernet254 179,180 Ethernet64/3 64 50000 2 +Ethernet256 257 Ethernet65 65 10000 0 +Ethernet260 259 Ethernet66 66 10000 0 diff --git a/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-Q64/media_settings.json b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-Q64/media_settings.json index dca3dee1e4f..dcfcbba2ab0 100644 --- a/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-Q64/media_settings.json +++ b/device/arista/x86_64-arista_7260cx3_64/Arista-7260CX3-Q64/media_settings.json @@ -1,18 +1,21 @@ { "GLOBAL_MEDIA_SETTINGS": { "1-12": { - ".*": { + "COPPER10": { + "unreliable_los": "off" + }, + "OPTICAL10": { "interface_type": "sr4", "unreliable_los": "on" - } - }, "21-64": { - ".*": { + "COPPER10": { + "unreliable_los": "off" + }, + "OPTICAL10": { "interface_type": "sr4", "unreliable_los": "on" - } } } diff --git a/device/arista/x86_64-arista_7260cx3_64/platform.json b/device/arista/x86_64-arista_7260cx3_64/platform.json index 522c5b61b0c..963533977fb 100644 --- a/device/arista/x86_64-arista_7260cx3_64/platform.json +++ b/device/arista/x86_64-arista_7260cx3_64/platform.json @@ -12,13 +12,13 @@ "name": "Scd(addr=0000:ff:0b.3)" }, { - "name": "Ucd90160(addr=74-004e)" + "name": "RookSysCpld(addr=81-0023)" }, { - "name": "Ucd90120A(addr=83-0034)" + "name": "Ucd90160(addr=74-004e)" }, { - "name": "RookSysCpld(addr=81-0023)" + "name": "Ucd90120A(addr=83-0034)" } ], "fans": [], diff --git a/device/arista/x86_64-arista_7260cx3_64/platform_components.json b/device/arista/x86_64-arista_7260cx3_64/platform_components.json index a95e59009f0..dedfa95199b 100644 --- a/device/arista/x86_64-arista_7260cx3_64/platform_components.json +++ b/device/arista/x86_64-arista_7260cx3_64/platform_components.json @@ -5,9 +5,9 @@ "Aboot()": {}, "Scd(addr=0000:06:00.0)": {}, "Scd(addr=0000:ff:0b.3)": {}, + "RookSysCpld(addr=81-0023)": {}, "Ucd90160(addr=74-004e)": {}, - "Ucd90120A(addr=83-0034)": {}, - "RookSysCpld(addr=81-0023)": {} + "Ucd90120A(addr=83-0034)": {} } } } diff --git a/device/arista/x86_64-arista_7280cr3_32d4/Arista-7280CR3-C32D4/jr2-a7280cr3-32d4-32x100G+4x400G.config.bcm b/device/arista/x86_64-arista_7280cr3_32d4/Arista-7280CR3-C32D4/jr2-a7280cr3-32d4-32x100G+4x400G.config.bcm index 7530e40e6a5..8f65ec96a4f 100644 --- a/device/arista/x86_64-arista_7280cr3_32d4/Arista-7280CR3-C32D4/jr2-a7280cr3-32d4-32x100G+4x400G.config.bcm +++ b/device/arista/x86_64-arista_7280cr3_32d4/Arista-7280CR3-C32D4/jr2-a7280cr3-32d4-32x100G+4x400G.config.bcm @@ -751,3 +751,4 @@ dma_desc_aggregator_buff_size_kb.BCM8869X=100 dma_desc_aggregator_timeout_usec.BCM8869X=1000 dma_desc_aggregator_enable_specific_MDB_LPM.BCM8869X=1 dma_desc_aggregator_enable_specific_MDB_FEC.BCM8869X=1 +sai_ecmp_group_members_increment=8 diff --git a/device/arista/x86_64-arista_7280cr3_32d4/Arista-7280CR3-C40/jr2-a7280cr3-32d4-40x100G.config.bcm b/device/arista/x86_64-arista_7280cr3_32d4/Arista-7280CR3-C40/jr2-a7280cr3-32d4-40x100G.config.bcm index e30cd5f384c..5bf607f250f 100644 --- a/device/arista/x86_64-arista_7280cr3_32d4/Arista-7280CR3-C40/jr2-a7280cr3-32d4-40x100G.config.bcm +++ b/device/arista/x86_64-arista_7280cr3_32d4/Arista-7280CR3-C40/jr2-a7280cr3-32d4-40x100G.config.bcm @@ -768,3 +768,4 @@ dma_desc_aggregator_buff_size_kb.BCM8869X=100 dma_desc_aggregator_timeout_usec.BCM8869X=1000 dma_desc_aggregator_enable_specific_MDB_LPM.BCM8869X=1 dma_desc_aggregator_enable_specific_MDB_FEC.BCM8869X=1 +sai_ecmp_group_members_increment=8 diff --git a/device/arista/x86_64-arista_7280cr3_32d4/Arista-7280CR3-C40/port_config.ini b/device/arista/x86_64-arista_7280cr3_32d4/Arista-7280CR3-C40/port_config.ini index 2ba638aee50..38f934b82cd 100644 --- a/device/arista/x86_64-arista_7280cr3_32d4/Arista-7280CR3-C40/port_config.ini +++ b/device/arista/x86_64-arista_7280cr3_32d4/Arista-7280CR3-C40/port_config.ini @@ -1,41 +1,41 @@ -# name lanes alias index speed -Ethernet0 0,1 Ethernet1/1 1 100000 -Ethernet4 2,3 Ethernet2/1 2 100000 -Ethernet8 4,5 Ethernet3/1 3 100000 -Ethernet12 6,7 Ethernet4/1 4 100000 -Ethernet16 8,9 Ethernet5/1 5 100000 -Ethernet20 10,11 Ethernet6/1 6 100000 -Ethernet24 12,13 Ethernet7/1 7 100000 -Ethernet28 14,15 Ethernet8/1 8 100000 -Ethernet32 16,17 Ethernet9/1 9 100000 -Ethernet36 18,19 Ethernet10/1 10 100000 -Ethernet40 20,21 Ethernet11/1 11 100000 -Ethernet44 22,23 Ethernet12/1 12 100000 -Ethernet48 24,25 Ethernet13/1 13 100000 -Ethernet52 26,27 Ethernet14/1 14 100000 -Ethernet56 28,29 Ethernet15/1 15 100000 -Ethernet60 30,31 Ethernet16/1 16 100000 -Ethernet64 72,73 Ethernet17/1 17 100000 -Ethernet68 74,75 Ethernet18/1 18 100000 -Ethernet72 76,77 Ethernet19/1 19 100000 -Ethernet76 78,79 Ethernet20/1 20 100000 -Ethernet80 64,65 Ethernet21/1 21 100000 -Ethernet84 66,67 Ethernet22/1 22 100000 -Ethernet88 68,69 Ethernet23/1 23 100000 -Ethernet92 70,71 Ethernet24/1 24 100000 -Ethernet96 56,57 Ethernet25/1 25 100000 -Ethernet100 58,59 Ethernet26/1 26 100000 -Ethernet104 60,61 Ethernet27/1 27 100000 -Ethernet108 62,63 Ethernet28/1 28 100000 -Ethernet112 48,49 Ethernet29/1 29 100000 -Ethernet116 50,51 Ethernet30/1 30 100000 -Ethernet120 52,53 Ethernet31/1 31 100000 -Ethernet124 54,55 Ethernet32/1 32 100000 -Ethernet128 32,33,34,35 Ethernet33/1 33 100000 -Ethernet132 36,37,38,39 Ethernet33/5 33 100000 -Ethernet136 40,41,42,43 Ethernet34/1 34 100000 -Ethernet140 44,45,46,47 Ethernet34/5 34 100000 -Ethernet144 88,89,90,91 Ethernet35/1 35 100000 -Ethernet148 92,93,94,95 Ethernet35/5 35 100000 -Ethernet152 80,81,82,83 Ethernet36/1 36 100000 -Ethernet156 84,85,86,87 Ethernet36/5 36 100000 +# name lanes alias index speed subport +Ethernet0 0,1 Ethernet1/1 1 100000 0 +Ethernet4 2,3 Ethernet2/1 2 100000 0 +Ethernet8 4,5 Ethernet3/1 3 100000 0 +Ethernet12 6,7 Ethernet4/1 4 100000 0 +Ethernet16 8,9 Ethernet5/1 5 100000 0 +Ethernet20 10,11 Ethernet6/1 6 100000 0 +Ethernet24 12,13 Ethernet7/1 7 100000 0 +Ethernet28 14,15 Ethernet8/1 8 100000 0 +Ethernet32 16,17 Ethernet9/1 9 100000 0 +Ethernet36 18,19 Ethernet10/1 10 100000 0 +Ethernet40 20,21 Ethernet11/1 11 100000 0 +Ethernet44 22,23 Ethernet12/1 12 100000 0 +Ethernet48 24,25 Ethernet13/1 13 100000 0 +Ethernet52 26,27 Ethernet14/1 14 100000 0 +Ethernet56 28,29 Ethernet15/1 15 100000 0 +Ethernet60 30,31 Ethernet16/1 16 100000 0 +Ethernet64 72,73 Ethernet17/1 17 100000 0 +Ethernet68 74,75 Ethernet18/1 18 100000 0 +Ethernet72 76,77 Ethernet19/1 19 100000 0 +Ethernet76 78,79 Ethernet20/1 20 100000 0 +Ethernet80 64,65 Ethernet21/1 21 100000 0 +Ethernet84 66,67 Ethernet22/1 22 100000 0 +Ethernet88 68,69 Ethernet23/1 23 100000 0 +Ethernet92 70,71 Ethernet24/1 24 100000 0 +Ethernet96 56,57 Ethernet25/1 25 100000 0 +Ethernet100 58,59 Ethernet26/1 26 100000 0 +Ethernet104 60,61 Ethernet27/1 27 100000 0 +Ethernet108 62,63 Ethernet28/1 28 100000 0 +Ethernet112 48,49 Ethernet29/1 29 100000 0 +Ethernet116 50,51 Ethernet30/1 30 100000 0 +Ethernet120 52,53 Ethernet31/1 31 100000 0 +Ethernet124 54,55 Ethernet32/1 32 100000 0 +Ethernet128 32,33,34,35 Ethernet33/1 33 100000 1 +Ethernet132 36,37,38,39 Ethernet33/5 33 100000 2 +Ethernet136 40,41,42,43 Ethernet34/1 34 100000 1 +Ethernet140 44,45,46,47 Ethernet34/5 34 100000 2 +Ethernet144 88,89,90,91 Ethernet35/1 35 100000 1 +Ethernet148 92,93,94,95 Ethernet35/5 35 100000 2 +Ethernet152 80,81,82,83 Ethernet36/1 36 100000 1 +Ethernet156 84,85,86,87 Ethernet36/5 36 100000 2 diff --git a/device/arista/x86_64-arista_7280cr3_32p4/Arista-7280CR3-C28S8/jr2-a7280cr3-32p4-28x100G-8x10G.config.bcm b/device/arista/x86_64-arista_7280cr3_32p4/Arista-7280CR3-C28S8/jr2-a7280cr3-32p4-28x100G-8x10G.config.bcm index f9a5d0f36ff..7a99b0e861c 100644 --- a/device/arista/x86_64-arista_7280cr3_32p4/Arista-7280CR3-C28S8/jr2-a7280cr3-32p4-28x100G-8x10G.config.bcm +++ b/device/arista/x86_64-arista_7280cr3_32p4/Arista-7280CR3-C28S8/jr2-a7280cr3-32p4-28x100G-8x10G.config.bcm @@ -739,3 +739,4 @@ dma_desc_aggregator_buff_size_kb.BCM8869X=100 dma_desc_aggregator_timeout_usec.BCM8869X=1000 dma_desc_aggregator_enable_specific_MDB_LPM.BCM8869X=1 dma_desc_aggregator_enable_specific_MDB_FEC.BCM8869X=1 +sai_ecmp_group_members_increment=8 diff --git a/device/arista/x86_64-arista_7280cr3_32p4/Arista-7280CR3-C28S8/port_config.ini b/device/arista/x86_64-arista_7280cr3_32p4/Arista-7280CR3-C28S8/port_config.ini index cb1c2a4663e..10c037284b1 100644 --- a/device/arista/x86_64-arista_7280cr3_32p4/Arista-7280CR3-C28S8/port_config.ini +++ b/device/arista/x86_64-arista_7280cr3_32p4/Arista-7280CR3-C28S8/port_config.ini @@ -1,37 +1,37 @@ -# name lanes alias index speed -Ethernet0 0,1 Ethernet1/1 1 100000 -Ethernet4 2,3 Ethernet2/1 2 100000 -Ethernet8 4,5 Ethernet3/1 3 100000 -Ethernet12 6,7 Ethernet4/1 4 100000 -Ethernet16 8,9 Ethernet5/1 5 100000 -Ethernet20 10,11 Ethernet6/1 6 100000 -Ethernet24 12,13 Ethernet7/1 7 100000 -Ethernet28 14,15 Ethernet8/1 8 100000 -Ethernet32 16,17 Ethernet9/1 9 100000 -Ethernet36 18,19 Ethernet10/1 10 100000 -Ethernet40 20,21 Ethernet11/1 11 100000 -Ethernet44 22,23 Ethernet12/1 12 100000 -Ethernet48 24,25 Ethernet13/1 13 100000 -Ethernet52 26,27 Ethernet14/1 14 100000 -Ethernet56 28,29 Ethernet15/1 15 100000 -Ethernet60 30,31 Ethernet16/1 16 100000 -Ethernet64 72,73 Ethernet17/1 17 100000 -Ethernet68 74,75 Ethernet18/1 18 100000 -Ethernet72 76,77 Ethernet19/1 19 100000 -Ethernet76 78,79 Ethernet20/1 20 100000 -Ethernet80 64,65 Ethernet21/1 21 100000 -Ethernet84 66,67 Ethernet22/1 22 100000 -Ethernet88 68,69 Ethernet23/1 23 100000 -Ethernet92 70,71 Ethernet24/1 24 100000 -Ethernet96 56,57 Ethernet25/1 25 100000 -Ethernet100 58,59 Ethernet26/1 26 100000 -Ethernet104 60,61 Ethernet27/1 27 100000 -Ethernet108 62,63 Ethernet28/1 28 100000 -Ethernet112 48 Ethernet29/1 29 10000 -Ethernet113 49 Ethernet29/2 29 10000 -Ethernet114 50 Ethernet29/3 29 10000 -Ethernet115 51 Ethernet29/4 29 10000 -Ethernet120 52 Ethernet31/1 31 10000 -Ethernet121 53 Ethernet31/2 31 10000 -Ethernet122 54 Ethernet31/3 31 10000 -Ethernet123 55 Ethernet31/4 31 10000 +# name lanes alias index speed subport +Ethernet0 0,1 Ethernet1/1 1 100000 0 +Ethernet4 2,3 Ethernet2/1 2 100000 0 +Ethernet8 4,5 Ethernet3/1 3 100000 0 +Ethernet12 6,7 Ethernet4/1 4 100000 0 +Ethernet16 8,9 Ethernet5/1 5 100000 0 +Ethernet20 10,11 Ethernet6/1 6 100000 0 +Ethernet24 12,13 Ethernet7/1 7 100000 0 +Ethernet28 14,15 Ethernet8/1 8 100000 0 +Ethernet32 16,17 Ethernet9/1 9 100000 0 +Ethernet36 18,19 Ethernet10/1 10 100000 0 +Ethernet40 20,21 Ethernet11/1 11 100000 0 +Ethernet44 22,23 Ethernet12/1 12 100000 0 +Ethernet48 24,25 Ethernet13/1 13 100000 0 +Ethernet52 26,27 Ethernet14/1 14 100000 0 +Ethernet56 28,29 Ethernet15/1 15 100000 0 +Ethernet60 30,31 Ethernet16/1 16 100000 0 +Ethernet64 72,73 Ethernet17/1 17 100000 0 +Ethernet68 74,75 Ethernet18/1 18 100000 0 +Ethernet72 76,77 Ethernet19/1 19 100000 0 +Ethernet76 78,79 Ethernet20/1 20 100000 0 +Ethernet80 64,65 Ethernet21/1 21 100000 0 +Ethernet84 66,67 Ethernet22/1 22 100000 0 +Ethernet88 68,69 Ethernet23/1 23 100000 0 +Ethernet92 70,71 Ethernet24/1 24 100000 0 +Ethernet96 56,57 Ethernet25/1 25 100000 0 +Ethernet100 58,59 Ethernet26/1 26 100000 0 +Ethernet104 60,61 Ethernet27/1 27 100000 0 +Ethernet108 62,63 Ethernet28/1 28 100000 0 +Ethernet112 48 Ethernet29/1 29 10000 1 +Ethernet113 49 Ethernet29/2 29 10000 2 +Ethernet114 50 Ethernet29/3 29 10000 3 +Ethernet115 51 Ethernet29/4 29 10000 4 +Ethernet120 52 Ethernet31/1 31 10000 1 +Ethernet121 53 Ethernet31/2 31 10000 2 +Ethernet122 54 Ethernet31/3 31 10000 3 +Ethernet123 55 Ethernet31/4 31 10000 4 diff --git a/device/arista/x86_64-arista_7280cr3_32p4/Arista-7280CR3-C32P4/jr2-a7280cr3-32p4-32x100G+4x400G.config.bcm b/device/arista/x86_64-arista_7280cr3_32p4/Arista-7280CR3-C32P4/jr2-a7280cr3-32p4-32x100G+4x400G.config.bcm index 7bd0fdea82c..a44fa669d03 100644 --- a/device/arista/x86_64-arista_7280cr3_32p4/Arista-7280CR3-C32P4/jr2-a7280cr3-32p4-32x100G+4x400G.config.bcm +++ b/device/arista/x86_64-arista_7280cr3_32p4/Arista-7280CR3-C32P4/jr2-a7280cr3-32p4-32x100G+4x400G.config.bcm @@ -741,3 +741,4 @@ dma_desc_aggregator_buff_size_kb.BCM8869X=100 dma_desc_aggregator_timeout_usec.BCM8869X=1000 dma_desc_aggregator_enable_specific_MDB_LPM.BCM8869X=1 dma_desc_aggregator_enable_specific_MDB_FEC.BCM8869X=1 +sai_ecmp_group_members_increment=8 diff --git a/device/arista/x86_64-arista_7280cr3_32p4/Arista-7280CR3-C40/jr2-a7280cr3-32p4-40x100G.config.bcm b/device/arista/x86_64-arista_7280cr3_32p4/Arista-7280CR3-C40/jr2-a7280cr3-32p4-40x100G.config.bcm index 8acc88016a2..2a8d27d3ea4 100644 --- a/device/arista/x86_64-arista_7280cr3_32p4/Arista-7280CR3-C40/jr2-a7280cr3-32p4-40x100G.config.bcm +++ b/device/arista/x86_64-arista_7280cr3_32p4/Arista-7280CR3-C40/jr2-a7280cr3-32p4-40x100G.config.bcm @@ -759,3 +759,4 @@ dma_desc_aggregator_buff_size_kb.BCM8869X=100 dma_desc_aggregator_timeout_usec.BCM8869X=1000 dma_desc_aggregator_enable_specific_MDB_LPM.BCM8869X=1 dma_desc_aggregator_enable_specific_MDB_FEC.BCM8869X=1 +sai_ecmp_group_members_increment=8 diff --git a/device/arista/x86_64-arista_7280cr3_32p4/Arista-7280CR3-C40/port_config.ini b/device/arista/x86_64-arista_7280cr3_32p4/Arista-7280CR3-C40/port_config.ini index 57067b1875d..0d30f2dfd17 100644 --- a/device/arista/x86_64-arista_7280cr3_32p4/Arista-7280CR3-C40/port_config.ini +++ b/device/arista/x86_64-arista_7280cr3_32p4/Arista-7280CR3-C40/port_config.ini @@ -1,41 +1,41 @@ -# name lanes alias index speed fec -Ethernet0 0,1 Ethernet1/1 1 100000 rs -Ethernet4 2,3 Ethernet2/1 2 100000 rs -Ethernet8 4,5 Ethernet3/1 3 100000 rs -Ethernet12 6,7 Ethernet4/1 4 100000 rs -Ethernet16 8,9 Ethernet5/1 5 100000 rs -Ethernet20 10,11 Ethernet6/1 6 100000 rs -Ethernet24 12,13 Ethernet7/1 7 100000 rs -Ethernet28 14,15 Ethernet8/1 8 100000 rs -Ethernet32 16,17 Ethernet9/1 9 100000 rs -Ethernet36 18,19 Ethernet10/1 10 100000 rs -Ethernet40 20,21 Ethernet11/1 11 100000 rs -Ethernet44 22,23 Ethernet12/1 12 100000 rs -Ethernet48 24,25 Ethernet13/1 13 100000 rs -Ethernet52 26,27 Ethernet14/1 14 100000 rs -Ethernet56 28,29 Ethernet15/1 15 100000 rs -Ethernet60 30,31 Ethernet16/1 16 100000 rs -Ethernet64 72,73 Ethernet17/1 17 100000 rs -Ethernet68 74,75 Ethernet18/1 18 100000 rs -Ethernet72 76,77 Ethernet19/1 19 100000 rs -Ethernet76 78,79 Ethernet20/1 20 100000 rs -Ethernet80 64,65 Ethernet21/1 21 100000 rs -Ethernet84 66,67 Ethernet22/1 22 100000 rs -Ethernet88 68,69 Ethernet23/1 23 100000 rs -Ethernet92 70,71 Ethernet24/1 24 100000 rs -Ethernet96 56,57 Ethernet25/1 25 100000 rs -Ethernet100 58,59 Ethernet26/1 26 100000 rs -Ethernet104 60,61 Ethernet27/1 27 100000 rs -Ethernet108 62,63 Ethernet28/1 28 100000 rs -Ethernet112 48,49 Ethernet29/1 29 100000 rs -Ethernet116 50,51 Ethernet30/1 30 100000 rs -Ethernet120 52,53 Ethernet31/1 31 100000 rs -Ethernet124 54,55 Ethernet32/1 32 100000 rs -Ethernet128 32,33,34,35 Ethernet33/1 33 100000 rs -Ethernet132 36,37,38,39 Ethernet33/5 33 100000 rs -Ethernet136 40,41,42,43 Ethernet34/1 34 100000 rs -Ethernet140 44,45,46,47 Ethernet34/5 34 100000 rs -Ethernet144 88,89,90,91 Ethernet35/1 35 100000 rs -Ethernet148 92,93,94,95 Ethernet35/5 35 100000 rs -Ethernet152 80,81,82,83 Ethernet36/1 36 100000 rs -Ethernet156 84,85,86,87 Ethernet36/5 36 100000 rs +# name lanes alias index speed fec subport +Ethernet0 0,1 Ethernet1/1 1 100000 rs 0 +Ethernet4 2,3 Ethernet2/1 2 100000 rs 0 +Ethernet8 4,5 Ethernet3/1 3 100000 rs 0 +Ethernet12 6,7 Ethernet4/1 4 100000 rs 0 +Ethernet16 8,9 Ethernet5/1 5 100000 rs 0 +Ethernet20 10,11 Ethernet6/1 6 100000 rs 0 +Ethernet24 12,13 Ethernet7/1 7 100000 rs 0 +Ethernet28 14,15 Ethernet8/1 8 100000 rs 0 +Ethernet32 16,17 Ethernet9/1 9 100000 rs 0 +Ethernet36 18,19 Ethernet10/1 10 100000 rs 0 +Ethernet40 20,21 Ethernet11/1 11 100000 rs 0 +Ethernet44 22,23 Ethernet12/1 12 100000 rs 0 +Ethernet48 24,25 Ethernet13/1 13 100000 rs 0 +Ethernet52 26,27 Ethernet14/1 14 100000 rs 0 +Ethernet56 28,29 Ethernet15/1 15 100000 rs 0 +Ethernet60 30,31 Ethernet16/1 16 100000 rs 0 +Ethernet64 72,73 Ethernet17/1 17 100000 rs 0 +Ethernet68 74,75 Ethernet18/1 18 100000 rs 0 +Ethernet72 76,77 Ethernet19/1 19 100000 rs 0 +Ethernet76 78,79 Ethernet20/1 20 100000 rs 0 +Ethernet80 64,65 Ethernet21/1 21 100000 rs 0 +Ethernet84 66,67 Ethernet22/1 22 100000 rs 0 +Ethernet88 68,69 Ethernet23/1 23 100000 rs 0 +Ethernet92 70,71 Ethernet24/1 24 100000 rs 0 +Ethernet96 56,57 Ethernet25/1 25 100000 rs 0 +Ethernet100 58,59 Ethernet26/1 26 100000 rs 0 +Ethernet104 60,61 Ethernet27/1 27 100000 rs 0 +Ethernet108 62,63 Ethernet28/1 28 100000 rs 0 +Ethernet112 48,49 Ethernet29/1 29 100000 rs 0 +Ethernet116 50,51 Ethernet30/1 30 100000 rs 0 +Ethernet120 52,53 Ethernet31/1 31 100000 rs 0 +Ethernet124 54,55 Ethernet32/1 32 100000 rs 0 +Ethernet128 32,33,34,35 Ethernet33/1 33 100000 rs 1 +Ethernet132 36,37,38,39 Ethernet33/5 33 100000 rs 2 +Ethernet136 40,41,42,43 Ethernet34/1 34 100000 rs 1 +Ethernet140 44,45,46,47 Ethernet34/5 34 100000 rs 2 +Ethernet144 88,89,90,91 Ethernet35/1 35 100000 rs 1 +Ethernet148 92,93,94,95 Ethernet35/5 35 100000 rs 2 +Ethernet152 80,81,82,83 Ethernet36/1 36 100000 rs 1 +Ethernet156 84,85,86,87 Ethernet36/5 36 100000 rs 2 diff --git a/device/arista/x86_64-arista_7280cr3mk_32p4/Arista-7280CR3-C40/gearbox_config.json b/device/arista/x86_64-arista_7280cr3mk_32p4/Arista-7280CR3-C40/gearbox_config.json index 11ba880428e..957aa9663fd 100644 --- a/device/arista/x86_64-arista_7280cr3mk_32p4/Arista-7280CR3-C40/gearbox_config.json +++ b/device/arista/x86_64-arista_7280cr3mk_32p4/Arista-7280CR3-C40/gearbox_config.json @@ -5,7 +5,7 @@ "name": "phy1", "address": "1", "lib_name": "", - "firmware_path": "/usr/etc/credo/firmware/owl.lz4.fw.1.94.0.bin", + "firmware_path": "/usr/etc/credo/firmware/owl", "config_file": "/usr/share/sonic/hwsku/phy1_config.json", "sai_init_config_file": "", "phy_access": "mdio", @@ -19,7 +19,7 @@ "name": "phy2", "address": "2", "lib_name": "", - "firmware_path": "/usr/etc/credo/firmware/owl.lz4.fw.1.94.0.bin", + "firmware_path": "/usr/etc/credo/firmware/owl", "config_file": "/usr/share/sonic/hwsku/phy2_config.json", "sai_init_config_file": "", "phy_access": "mdio", @@ -33,7 +33,7 @@ "name": "phy3", "address": "3", "lib_name": "", - "firmware_path": "/usr/etc/credo/firmware/owl.lz4.fw.1.94.0.bin", + "firmware_path": "/usr/etc/credo/firmware/owl", "config_file": "/usr/share/sonic/hwsku/phy3_config.json", "sai_init_config_file": "", "phy_access": "mdio", @@ -47,7 +47,7 @@ "name": "phy4", "address": "4", "lib_name": "", - "firmware_path": "/usr/etc/credo/firmware/owl.lz4.fw.1.94.0.bin", + "firmware_path": "/usr/etc/credo/firmware/owl", "config_file": "/usr/share/sonic/hwsku/phy4_config.json", "sai_init_config_file": "", "phy_access": "mdio", @@ -61,7 +61,7 @@ "name": "phy5", "address": "5", "lib_name": "", - "firmware_path": "/usr/etc/credo/firmware/owl.lz4.fw.1.94.0.bin", + "firmware_path": "/usr/etc/credo/firmware/owl", "config_file": "/usr/share/sonic/hwsku/phy5_config.json", "sai_init_config_file": "", "phy_access": "mdio", @@ -75,7 +75,7 @@ "name": "phy6", "address": "6", "lib_name": "", - "firmware_path": "/usr/etc/credo/firmware/owl.lz4.fw.1.94.0.bin", + "firmware_path": "/usr/etc/credo/firmware/owl", "config_file": "/usr/share/sonic/hwsku/phy6_config.json", "sai_init_config_file": "", "phy_access": "mdio", @@ -89,7 +89,7 @@ "name": "phy7", "address": "7", "lib_name": "", - "firmware_path": "/usr/etc/credo/firmware/owl.lz4.fw.1.94.0.bin", + "firmware_path": "/usr/etc/credo/firmware/owl", "config_file": "/usr/share/sonic/hwsku/phy7_config.json", "sai_init_config_file": "", "phy_access": "mdio", @@ -103,7 +103,7 @@ "name": "phy8", "address": "8", "lib_name": "", - "firmware_path": "/usr/etc/credo/firmware/owl.lz4.fw.1.94.0.bin", + "firmware_path": "/usr/etc/credo/firmware/owl", "config_file": "/usr/share/sonic/hwsku/phy8_config.json", "sai_init_config_file": "", "phy_access": "mdio", diff --git a/device/arista/x86_64-arista_7280dr3a_36/Arista-7280DR3A-36/0/jr2p-a7280dra3-36-36x400G.config.bcm b/device/arista/x86_64-arista_7280dr3a_36/Arista-7280DR3A-36/0/jr2p-a7280dra3-36-36x400G.config.bcm index ce14d611cf5..5c53d7197f0 100644 --- a/device/arista/x86_64-arista_7280dr3a_36/Arista-7280DR3A-36/0/jr2p-a7280dra3-36-36x400G.config.bcm +++ b/device/arista/x86_64-arista_7280dr3a_36/Arista-7280DR3A-36/0/jr2p-a7280dra3-36-36x400G.config.bcm @@ -986,3 +986,5 @@ sai_pfc_dlr_init_capability=0 sai_default_cpu_tx_tc=7 sai_disable_srcmacqedstmac_ctrl=1 sai_lag_default_crc_hash=1 +sai_ecmp_group_members_increment=8 +sai_instru_stat_accum_enable=1 diff --git a/device/arista/x86_64-arista_7280dr3a_36/Arista-7280DR3A-36/0/sai_postinit_cmd.soc b/device/arista/x86_64-arista_7280dr3a_36/Arista-7280DR3A-36/0/sai_postinit_cmd.soc index 80338902b82..1c60ec09883 100644 --- a/device/arista/x86_64-arista_7280dr3a_36/Arista-7280DR3A-36/0/sai_postinit_cmd.soc +++ b/device/arista/x86_64-arista_7280dr3a_36/Arista-7280DR3A-36/0/sai_postinit_cmd.soc @@ -1,29 +1,61 @@ -INTeRrupt ENAble id=2209 -INTeRrupt ENAble id=2210 -INTeRrupt ENAble id=2211 -INTeRrupt ENAble id=2212 -INTeRrupt ENAble id=2213 -INTeRrupt ENAble id=2214 -INTeRrupt ENAble id=2215 -INTeRrupt ENAble id=2216 -INTeRrupt ENAble id=2217 -INTeRrupt ENAble id=2218 -INTeRrupt ENAble id=2219 -INTeRrupt ENAble id=2220 -INTeRrupt ENAble id=2221 -INTeRrupt ENAble id=2222 -INTeRrupt ENAble id=2223 -INTeRrupt ENAble id=2224 -INTeRrupt ENAble id=2225 -INTeRrupt ENAble id=2226 +# Core=0 +INTeRrupt ENAble id=2209 p=0 +INTeRrupt ENAble id=2210 p=0 +INTeRrupt ENAble id=2211 p=0 +INTeRrupt ENAble id=2212 p=0 +INTeRrupt ENAble id=2213 p=0 +INTeRrupt ENAble id=2214 p=0 +INTeRrupt ENAble id=2215 p=0 +INTeRrupt ENAble id=2216 p=0 +INTeRrupt ENAble id=2217 p=0 +INTeRrupt ENAble id=2218 p=0 +INTeRrupt ENAble id=2219 p=0 +INTeRrupt ENAble id=2220 p=0 +INTeRrupt ENAble id=2221 p=0 +INTeRrupt ENAble id=2222 p=0 +INTeRrupt ENAble id=2223 p=0 +INTeRrupt ENAble id=2224 p=0 +INTeRrupt ENAble id=2225 p=0 +INTeRrupt ENAble id=2226 p=0 -INTeRrupt ENAble id=482 -INTeRrupt ENAble id=483 -INTeRrupt ENAble id=484 -INTeRrupt ENAble id=485 -INTeRrupt ENAble id=486 -INTeRrupt ENAble id=487 -INTeRrupt ENAble id=488 +INTeRrupt ENAble id=482 p=0 +INTeRrupt ENAble id=483 p=0 +INTeRrupt ENAble id=484 p=0 +INTeRrupt ENAble id=485 p=0 +INTeRrupt ENAble id=486 p=0 +INTeRrupt ENAble id=487 p=0 +INTeRrupt ENAble id=488 p=0 -INTeRrupt ENAble id=1597 -debug intr error \ No newline at end of file +INTeRrupt ENAble id=1597 p=0 + +# Core=1 +INTeRrupt ENAble id=2209 p=1 +INTeRrupt ENAble id=2210 p=1 +INTeRrupt ENAble id=2211 p=1 +INTeRrupt ENAble id=2212 p=1 +INTeRrupt ENAble id=2213 p=1 +INTeRrupt ENAble id=2214 p=1 +INTeRrupt ENAble id=2215 p=1 +INTeRrupt ENAble id=2216 p=1 +INTeRrupt ENAble id=2217 p=1 +INTeRrupt ENAble id=2218 p=1 +INTeRrupt ENAble id=2219 p=1 +INTeRrupt ENAble id=2220 p=1 +INTeRrupt ENAble id=2221 p=1 +INTeRrupt ENAble id=2222 p=1 +INTeRrupt ENAble id=2223 p=1 +INTeRrupt ENAble id=2224 p=1 +INTeRrupt ENAble id=2225 p=1 +INTeRrupt ENAble id=2226 p=1 + +INTeRrupt ENAble id=482 p=1 +INTeRrupt ENAble id=483 p=1 +INTeRrupt ENAble id=484 p=1 +INTeRrupt ENAble id=485 p=1 +INTeRrupt ENAble id=486 p=1 +INTeRrupt ENAble id=487 p=1 +INTeRrupt ENAble id=488 p=1 + +INTeRrupt ENAble id=1597 p=1 + +debug intr error diff --git a/device/arista/x86_64-arista_7280dr3a_36/Arista-7280DR3A-36/1/jr2p-a7280dra3-36-36x400G.config.bcm b/device/arista/x86_64-arista_7280dr3a_36/Arista-7280DR3A-36/1/jr2p-a7280dra3-36-36x400G.config.bcm index 587530eb3b3..50a82439c0c 100644 --- a/device/arista/x86_64-arista_7280dr3a_36/Arista-7280DR3A-36/1/jr2p-a7280dra3-36-36x400G.config.bcm +++ b/device/arista/x86_64-arista_7280dr3a_36/Arista-7280DR3A-36/1/jr2p-a7280dra3-36-36x400G.config.bcm @@ -985,3 +985,5 @@ sai_pfc_dlr_init_capability=0 sai_default_cpu_tx_tc=7 sai_disable_srcmacqedstmac_ctrl=1 sai_lag_default_crc_hash=1 +sai_ecmp_group_members_increment=8 +sai_instru_stat_accum_enable=1 diff --git a/device/arista/x86_64-arista_7280dr3a_36/Arista-7280DR3A-36/1/sai_postinit_cmd.soc b/device/arista/x86_64-arista_7280dr3a_36/Arista-7280DR3A-36/1/sai_postinit_cmd.soc index 80338902b82..1c60ec09883 100644 --- a/device/arista/x86_64-arista_7280dr3a_36/Arista-7280DR3A-36/1/sai_postinit_cmd.soc +++ b/device/arista/x86_64-arista_7280dr3a_36/Arista-7280DR3A-36/1/sai_postinit_cmd.soc @@ -1,29 +1,61 @@ -INTeRrupt ENAble id=2209 -INTeRrupt ENAble id=2210 -INTeRrupt ENAble id=2211 -INTeRrupt ENAble id=2212 -INTeRrupt ENAble id=2213 -INTeRrupt ENAble id=2214 -INTeRrupt ENAble id=2215 -INTeRrupt ENAble id=2216 -INTeRrupt ENAble id=2217 -INTeRrupt ENAble id=2218 -INTeRrupt ENAble id=2219 -INTeRrupt ENAble id=2220 -INTeRrupt ENAble id=2221 -INTeRrupt ENAble id=2222 -INTeRrupt ENAble id=2223 -INTeRrupt ENAble id=2224 -INTeRrupt ENAble id=2225 -INTeRrupt ENAble id=2226 +# Core=0 +INTeRrupt ENAble id=2209 p=0 +INTeRrupt ENAble id=2210 p=0 +INTeRrupt ENAble id=2211 p=0 +INTeRrupt ENAble id=2212 p=0 +INTeRrupt ENAble id=2213 p=0 +INTeRrupt ENAble id=2214 p=0 +INTeRrupt ENAble id=2215 p=0 +INTeRrupt ENAble id=2216 p=0 +INTeRrupt ENAble id=2217 p=0 +INTeRrupt ENAble id=2218 p=0 +INTeRrupt ENAble id=2219 p=0 +INTeRrupt ENAble id=2220 p=0 +INTeRrupt ENAble id=2221 p=0 +INTeRrupt ENAble id=2222 p=0 +INTeRrupt ENAble id=2223 p=0 +INTeRrupt ENAble id=2224 p=0 +INTeRrupt ENAble id=2225 p=0 +INTeRrupt ENAble id=2226 p=0 -INTeRrupt ENAble id=482 -INTeRrupt ENAble id=483 -INTeRrupt ENAble id=484 -INTeRrupt ENAble id=485 -INTeRrupt ENAble id=486 -INTeRrupt ENAble id=487 -INTeRrupt ENAble id=488 +INTeRrupt ENAble id=482 p=0 +INTeRrupt ENAble id=483 p=0 +INTeRrupt ENAble id=484 p=0 +INTeRrupt ENAble id=485 p=0 +INTeRrupt ENAble id=486 p=0 +INTeRrupt ENAble id=487 p=0 +INTeRrupt ENAble id=488 p=0 -INTeRrupt ENAble id=1597 -debug intr error \ No newline at end of file +INTeRrupt ENAble id=1597 p=0 + +# Core=1 +INTeRrupt ENAble id=2209 p=1 +INTeRrupt ENAble id=2210 p=1 +INTeRrupt ENAble id=2211 p=1 +INTeRrupt ENAble id=2212 p=1 +INTeRrupt ENAble id=2213 p=1 +INTeRrupt ENAble id=2214 p=1 +INTeRrupt ENAble id=2215 p=1 +INTeRrupt ENAble id=2216 p=1 +INTeRrupt ENAble id=2217 p=1 +INTeRrupt ENAble id=2218 p=1 +INTeRrupt ENAble id=2219 p=1 +INTeRrupt ENAble id=2220 p=1 +INTeRrupt ENAble id=2221 p=1 +INTeRrupt ENAble id=2222 p=1 +INTeRrupt ENAble id=2223 p=1 +INTeRrupt ENAble id=2224 p=1 +INTeRrupt ENAble id=2225 p=1 +INTeRrupt ENAble id=2226 p=1 + +INTeRrupt ENAble id=482 p=1 +INTeRrupt ENAble id=483 p=1 +INTeRrupt ENAble id=484 p=1 +INTeRrupt ENAble id=485 p=1 +INTeRrupt ENAble id=486 p=1 +INTeRrupt ENAble id=487 p=1 +INTeRrupt ENAble id=488 p=1 + +INTeRrupt ENAble id=1597 p=1 + +debug intr error diff --git a/device/arista/x86_64-arista_7280dr3a_36/platform.json b/device/arista/x86_64-arista_7280dr3a_36/platform.json index 29de56b4ac1..5ac1fe2cc5a 100644 --- a/device/arista/x86_64-arista_7280dr3a_36/platform.json +++ b/device/arista/x86_64-arista_7280dr3a_36/platform.json @@ -8,6 +8,9 @@ { "name": "Scd(addr=0000:00:18.7)" }, + { + "name": "CormorantSysCpld(addr=13-0023)" + }, { "name": "Adm1266(addr=10-004f)" }, @@ -16,9 +19,6 @@ }, { "name": "Scd(addr=0000:01:00.0)" - }, - { - "name": "CormorantSysCpld(addr=13-0023)" } ], "fans": [], diff --git a/device/arista/x86_64-arista_7280dr3ak_36/platform.json b/device/arista/x86_64-arista_7280dr3ak_36/platform.json index 9a2ef2b50ad..1521c74b141 100644 --- a/device/arista/x86_64-arista_7280dr3ak_36/platform.json +++ b/device/arista/x86_64-arista_7280dr3ak_36/platform.json @@ -8,6 +8,9 @@ { "name": "Scd(addr=0000:00:18.7)" }, + { + "name": "CormorantSysCpld(addr=13-0023)" + }, { "name": "Adm1266(addr=10-004f)" }, @@ -16,9 +19,6 @@ }, { "name": "Scd(addr=0000:01:00.0)" - }, - { - "name": "CormorantSysCpld(addr=13-0023)" } ], "fans": [], diff --git a/device/arista/x86_64-arista_7280dr3ak_36s/platform.json b/device/arista/x86_64-arista_7280dr3ak_36s/platform.json index edecf41d7fd..8b36a087b1c 100644 --- a/device/arista/x86_64-arista_7280dr3ak_36s/platform.json +++ b/device/arista/x86_64-arista_7280dr3ak_36s/platform.json @@ -8,6 +8,9 @@ { "name": "Scd(addr=0000:00:18.7)" }, + { + "name": "CormorantSysCpld(addr=13-0023)" + }, { "name": "Adm1266(addr=10-004f)" }, @@ -16,9 +19,6 @@ }, { "name": "Scd(addr=0000:01:00.0)" - }, - { - "name": "CormorantSysCpld(addr=13-0023)" } ], "fans": [], diff --git a/device/arista/x86_64-arista_7280dr3am_36/platform.json b/device/arista/x86_64-arista_7280dr3am_36/platform.json index eadc1e6ab70..454c05081b2 100644 --- a/device/arista/x86_64-arista_7280dr3am_36/platform.json +++ b/device/arista/x86_64-arista_7280dr3am_36/platform.json @@ -8,6 +8,9 @@ { "name": "Scd(addr=0000:00:18.7)" }, + { + "name": "CormorantSysCpld(addr=13-0023)" + }, { "name": "Adm1266(addr=10-004f)" }, @@ -16,9 +19,6 @@ }, { "name": "Scd(addr=0000:01:00.0)" - }, - { - "name": "CormorantSysCpld(addr=13-0023)" } ], "fans": [], diff --git a/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/buffers_defaults_t2.j2 b/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/buffers_defaults_t2.j2 index bb66f2bc079..3634f2149ff 100644 --- a/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/buffers_defaults_t2.j2 +++ b/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/buffers_defaults_t2.j2 @@ -15,13 +15,7 @@ {%- macro generate_port_lists(PORT_ALL) %} {# Generate list of ports #} - {%- for port_idx in range(0,128,8) %} - {%- if PORT_ALL.append("Ethernet%d" % (port_idx)) %}{%- endif %} - {%- endfor %} - {%- for port_idx in range(128,256,4) %} - {%- if PORT_ALL.append("Ethernet%d" % (port_idx)) %}{%- endif %} - {%- endfor %} - {%- for port_idx in range(256,384,8) %} + {%- for port_idx in range(0,256,4) %} {%- if PORT_ALL.append("Ethernet%d" % (port_idx)) %}{%- endif %} {%- endfor %} {%- endmacro %} @@ -29,10 +23,10 @@ {%- macro generate_buffer_pool_and_profiles() %} "BUFFER_POOL": { "ingress_lossless_pool": { - "size": "12884901888", + "size": "25766440000", "type": "both", "mode": "dynamic", - "xoff": "3225378816" + "xoff": "2863254732" } }, "BUFFER_PROFILE": { diff --git a/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/data/bcm_port_lane_map.json b/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/data/bcm_port_lane_map.json new file mode 100644 index 00000000000..88ecaca57ae --- /dev/null +++ b/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/data/bcm_port_lane_map.json @@ -0,0 +1,3848 @@ +{ + "port_speed_lane_map": { + "1": { + "100G": "CGE8", + "400G": "CDGE4_8" + }, + "2": { + "100G": "CGE9", + "400G": "CDGE4_9" + }, + "3": { + "100G": "CGE10", + "400G": "CDGE4_10" + }, + "4": { + "100G": "CGE11", + "400G": "CDGE4_11" + }, + "5": { + "100G": "CGE12", + "400G": "CDGE4_12" + }, + "6": { + "100G": "CGE13", + "400G": "CDGE4_13" + }, + "7": { + "100G": "CGE14", + "400G": "CDGE4_14" + }, + "8": { + "100G": "CGE15", + "400G": "CDGE4_15" + }, + "9": { + "100G": "CGE30", + "400G": "CDGE4_30" + }, + "10": { + "100G": "CGE31", + "400G": "CDGE4_31" + }, + "11": { + "100G": "CGE24", + "400G": "CDGE4_24" + }, + "12": { + "100G": "CGE25", + "400G": "CDGE4_25" + }, + "13": { + "100G": "CGE28", + "400G": "CDGE4_28" + }, + "14": { + "100G": "CGE29", + "400G": "CDGE4_29" + }, + "15": { + "100G": "CGE26", + "400G": "CDGE4_26" + }, + "16": { + "100G": "CGE27", + "400G": "CDGE4_27" + }, + "17": { + "100G": "CDGE4_18", + "400G": "CDGE4_18" + }, + "18": { + "100G": "CDGE4_19", + "400G": "CDGE4_19" + }, + "19": { + "100G": "CDGE4_16", + "400G": "CDGE4_16" + }, + "20": { + "100G": "CDGE4_17", + "400G": "CDGE4_17" + }, + "21": { + "100G": "CDGE4_22", + "400G": "CDGE4_22" + }, + "22": { + "100G": "CDGE4_23", + "400G": "CDGE4_23" + }, + "23": { + "100G": "CDGE4_20", + "400G": "CDGE4_20" + }, + "24": { + "100G": "CDGE4_21", + "400G": "CDGE4_21" + }, + "25": { + "100G": "CDGE4_4", + "400G": "CDGE4_4" + }, + "26": { + "100G": "CDGE4_5", + "400G": "CDGE4_5" + }, + "27": { + "100G": "CDGE4_6", + "400G": "CDGE4_6" + }, + "28": { + "100G": "CDGE4_7", + "400G": "CDGE4_7" + }, + "29": { + "100G": "CDGE4_0", + "400G": "CDGE4_0" + }, + "30": { + "100G": "CDGE4_1", + "400G": "CDGE4_1" + }, + "31": { + "100G": "CDGE4_2", + "400G": "CDGE4_2" + }, + "32": { + "100G": "CDGE4_3", + "400G": "CDGE4_3" + }, + "33": { + "100G": "CDGE4_42", + "400G": "CDGE4_42" + }, + "34": { + "100G": "CDGE4_43", + "400G": "CDGE4_43" + }, + "35": { + "100G": "CDGE4_40", + "400G": "CDGE4_40" + }, + "36": { + "100G": "CDGE4_41", + "400G": "CDGE4_41" + }, + "37": { + "100G": "CDGE4_46", + "400G": "CDGE4_46" + }, + "38": { + "100G": "CDGE4_47", + "400G": "CDGE4_47" + }, + "39": { + "100G": "CDGE4_44", + "400G": "CDGE4_44" + }, + "40": { + "100G": "CDGE4_45", + "400G": "CDGE4_45" + }, + "41": { + "100G": "CDGE4_62", + "400G": "CDGE4_62" + }, + "42": { + "100G": "CDGE4_63", + "400G": "CDGE4_63" + }, + "43": { + "100G": "CDGE4_60", + "400G": "CDGE4_60" + }, + "44": { + "100G": "CDGE4_61", + "400G": "CDGE4_61" + }, + "45": { + "100G": "CDGE4_58", + "400G": "CDGE4_58" + }, + "46": { + "100G": "CDGE4_59", + "400G": "CDGE4_59" + }, + "47": { + "100G": "CDGE4_56", + "400G": "CDGE4_56" + }, + "48": { + "100G": "CDGE4_57", + "400G": "CDGE4_57" + }, + "49": { + "100G": "CGE52", + "400G": "CDGE4_52" + }, + "50": { + "100G": "CGE53", + "400G": "CDGE4_53" + }, + "51": { + "100G": "CGE50", + "400G": "CDGE4_50" + }, + "52": { + "100G": "CGE51", + "400G": "CDGE4_51" + }, + "53": { + "100G": "CGE54", + "400G": "CDGE4_54" + }, + "54": { + "100G": "CGE55", + "400G": "CDGE4_55" + }, + "55": { + "100G": "CGE48", + "400G": "CDGE4_48" + }, + "56": { + "100G": "CGE49", + "400G": "CDGE4_49" + }, + "57": { + "100G": "CGE38", + "400G": "CDGE4_38" + }, + "58": { + "100G": "CGE39", + "400G": "CDGE4_39" + }, + "59": { + "100G": "CGE36", + "400G": "CDGE4_36" + }, + "60": { + "100G": "CGE37", + "400G": "CDGE4_37" + }, + "61": { + "100G": "CGE34", + "400G": "CDGE4_34" + }, + "62": { + "100G": "CGE35", + "400G": "CDGE4_35" + }, + "63": { + "100G": "CGE32", + "400G": "CDGE4_32" + }, + "64": { + "100G": "CGE33", + "400G": "CDGE4_33" + } + }, + "lane_to_serdes_map": { + "0": { + "100G": "rx2:tx0", + "400G": "rx2:tx0" + }, + "1": { + "100G": "rx0:tx3", + "400G": "rx0:tx3" + }, + "2": { + "100G": "rx3:tx2", + "400G": "rx3:tx2" + }, + "3": { + "100G": "rx1:tx1", + "400G": "rx1:tx1" + }, + "4": { + "100G": "rx4:tx4", + "400G": "rx4:tx4" + }, + "5": { + "100G": "rx5:tx6", + "400G": "rx5:tx6" + }, + "6": { + "100G": "rx6:tx5", + "400G": "rx6:tx5" + }, + "7": { + "100G": "rx7:tx7", + "400G": "rx7:tx7" + }, + "8": { + "100G": "rx12:tx12", + "400G": "rx12:tx12" + }, + "9": { + "100G": "rx13:tx15", + "400G": "rx13:tx15" + }, + "10": { + "100G": "rx14:tx13", + "400G": "rx14:tx13" + }, + "11": { + "100G": "rx15:tx14", + "400G": "rx15:tx14" + }, + "12": { + "100G": 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{ + "100G": "rx25:tx27", + "400G": "rx25:tx27" + }, + "30": { + "100G": "rx27:tx25", + "400G": "rx27:tx25" + }, + "31": { + "100G": "rx24:tx26", + "400G": "rx24:tx26" + }, + "32": { + "100G": "rx39:tx34", + "400G": "rx35:tx35" + }, + "33": { + "100G": "rx34:tx39", + "400G": "rx37:tx36" + }, + "34": { + "100G": "rx37:tx36", + "400G": "rx33:tx33" + }, + "35": { + "100G": "rx35:tx35", + "400G": "rx32:tx38" + }, + "36": { + "100G": "rx32:tx38", + "400G": "rx36:tx37" + }, + "37": { + "100G": "rx33:tx33", + "400G": "rx38:tx32" + }, + "38": { + "100G": "rx38:tx32", + "400G": "rx34:tx39" + }, + "39": { + "100G": "rx36:tx37", + "400G": "rx39:tx34" + }, + "40": { + "100G": "rx46:tx40", + "400G": "rx46:tx40" + }, + "41": { + "100G": "rx44:tx45", + "400G": "rx44:tx45" + }, + "42": { + "100G": "rx40:tx46", + "400G": "rx47:tx42" + }, + "43": { + "100G": "rx41:tx41", + "400G": "rx42:tx47" + }, + "44": { + "100G": "rx45:tx44", + "400G": "rx45:tx44" + }, + "45": { + "100G": "rx43:tx43", + "400G": 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}, + "400G": { + "system_lanes": [4, 6, 8, 10], + "line_lanes": [24, 25, 26, 27, 20, 21, 22, 23] + } + } + }, + "Ethernet16": { + "phy_id": 3, + "speed_lane_map": { + "100G": { + "system_lanes": [8, 10, 12, 14], + "line_lanes": [24, 25, 26, 27] + }, + "400G": { + "system_lanes": [4, 6, 8, 10], + "line_lanes": [24, 25, 26, 27, 20, 21, 22, 23] + } + } + }, + "Ethernet20": { + "phy_id": 3, + "speed_lane_map": { + "100G": { + "system_lanes": [0, 2, 4, 6], + "line_lanes": [16, 17, 18, 19] + }, + "400G": { + "system_lanes": [0, 2, 12, 14], + "line_lanes": [16, 17, 18, 19, 28, 29, 30, 31] + } + } + }, + "Ethernet24": { + "phy_id": 4, + "speed_lane_map": { + "100G": { + "system_lanes": [0, 2, 4, 6], + "line_lanes": [16, 17, 18, 19] + }, + "400G": { + "system_lanes": [0, 2, 12, 14], + "line_lanes": [16, 17, 18, 19, 28, 29, 30, 31] + } + } + }, + "Ethernet28": { + "phy_id": 4, + "speed_lane_map": { + "100G": { + "system_lanes": [8, 10, 12, 14], + "line_lanes": [24, 25, 26, 27] + }, + "400G": { + "system_lanes": [4, 6, 8, 10], + "line_lanes": [24, 25, 26, 27, 20, 21, 22, 23] + } + } + }, + "Ethernet32": { + "phy_id": 5, + "speed_lane_map": { + "100G": { + "system_lanes": [8, 10, 12, 14], + "line_lanes": [24, 25, 26, 27] + }, + "400G": { + "system_lanes": [4, 6, 8, 10], + "line_lanes": [24, 25, 26, 27, 20, 21, 22, 23] + } + } + }, + "Ethernet36": { + "phy_id": 5, + "speed_lane_map": { + "100G": { + "system_lanes": [0, 2, 4, 6], + "line_lanes": [16, 17, 18, 19] + }, + "400G": { + "system_lanes": [0, 2, 12, 14], + "line_lanes": [16, 17, 18, 19, 28, 29, 30, 31] + } + } + }, + "Ethernet40": { + "phy_id": 7, + "speed_lane_map": { + "100G": { + "system_lanes": [0, 2, 4, 6], + "line_lanes": [16, 17, 18, 19] + }, + "400G": { + "system_lanes": [0, 2, 12, 14], + "line_lanes": [16, 17, 18, 19, 28, 29, 30, 31] + } + } + }, + "Ethernet44": { + "phy_id": 7, + "speed_lane_map": { + "100G": { + "system_lanes": [8, 10, 12, 14], + "line_lanes": [24, 25, 26, 27] + }, + "400G": { + "system_lanes": [4, 6, 8, 10], + "line_lanes": [24, 25, 26, 27, 20, 21, 22, 23] + } + } + }, + "Ethernet48": { + "phy_id": 6, + "speed_lane_map": { + "100G": { + "system_lanes": [8, 10, 12, 14], + "line_lanes": [24, 25, 26, 27] + }, + "400G": { + "system_lanes": [4, 6, 8, 10], + "line_lanes": [24, 25, 26, 27, 20, 21, 22, 23] + } + } + }, + "Ethernet52": { + "phy_id": 6, + "speed_lane_map": { + "100G": { + "system_lanes": [0, 2, 4, 6], + "line_lanes": [16, 17, 18, 19] + }, + "400G": { + "system_lanes": [0, 2, 12, 14], + "line_lanes": [16, 17, 18, 19, 28, 29, 30, 31] + } + } + }, + "Ethernet56": { + "phy_id": 8, + "speed_lane_map": { + "100G": { + "system_lanes": [0, 2, 4, 6], + "line_lanes": [16, 17, 18, 19] + }, + "400G": { + "system_lanes": [0, 2, 12, 14], + "line_lanes": [16, 17, 18, 19, 28, 29, 30, 31] + } + } + }, + "Ethernet60": { + "phy_id": 8, + "speed_lane_map": { + "100G": { + "system_lanes": [8, 10, 12, 14], + "line_lanes": [24, 25, 26, 27] + }, + "400G": { + "system_lanes": [4, 6, 8, 10], + "line_lanes": [24, 25, 26, 27, 20, 21, 22, 23] + } + } + }, + "Ethernet192": { + "phy_id": 9, + "speed_lane_map": { + "100G": { + "system_lanes": [8, 10, 12, 14], + "line_lanes": [24, 25, 26, 27] + }, + "400G": { + "system_lanes": [4, 6, 8, 10], + "line_lanes": [24, 25, 26, 27, 20, 21, 22, 23] + } + } + }, + "Ethernet196": { + "phy_id": 9, + "speed_lane_map": { + "100G": { + "system_lanes": [0, 2, 4, 6], + "line_lanes": [16, 17, 18, 19] + }, + "400G": { + "system_lanes": [0, 2, 12, 14], + "line_lanes": [16, 17, 18, 19, 28, 29, 30, 31] + } + } + }, + "Ethernet200": { + "phy_id": 11, + "speed_lane_map": { + "100G": { + "system_lanes": [0, 2, 4, 6], + "line_lanes": [16, 17, 18, 19] + }, + "400G": { + "system_lanes": [0, 2, 12, 14], + "line_lanes": [16, 17, 18, 19, 28, 29, 30, 31] + } + } + }, + "Ethernet204": { + "phy_id": 11, + "speed_lane_map": { + "100G": { + "system_lanes": [8, 10, 12, 14], + "line_lanes": [24, 25, 26, 27] + }, + "400G": { + "system_lanes": [4, 6, 8, 10], + "line_lanes": [24, 25, 26, 27, 20, 21, 22, 23] + } + } + }, + "Ethernet208": { + "phy_id": 14, + "speed_lane_map": { + "100G": { + "system_lanes": [8, 10, 12, 14], + "line_lanes": [24, 25, 26, 27] + }, + "400G": { + "system_lanes": [4, 6, 8, 10], + "line_lanes": [24, 25, 26, 27, 20, 21, 22, 23] + } + } + }, + "Ethernet212": { + "phy_id": 14, + "speed_lane_map": { + "100G": { + "system_lanes": [0, 2, 4, 6], + "line_lanes": [16, 17, 18, 19] + }, + "400G": { + "system_lanes": [0, 2, 12, 14], + "line_lanes": [16, 17, 18, 19, 28, 29, 30, 31] + } + } + }, + "Ethernet216": { + "phy_id": 10, + "speed_lane_map": { + "100G": { + "system_lanes": [0, 2, 4, 6], + "line_lanes": [16, 17, 18, 19] + }, + "400G": { + "system_lanes": [0, 2, 12, 14], + "line_lanes": [16, 17, 18, 19, 28, 29, 30, 31] + } + } + }, + "Ethernet220": { + "phy_id": 10, + "speed_lane_map": { + "100G": { + "system_lanes": [8, 10, 12, 14], + "line_lanes": [24, 25, 26, 27] + }, + "400G": { + "system_lanes": [4, 6, 8, 10], + "line_lanes": [24, 25, 26, 27, 20, 21, 22, 23] + } + } + }, + "Ethernet224": { + "phy_id": 12, + "speed_lane_map": { + "100G": { + "system_lanes": [8, 10, 12, 14], + "line_lanes": [24, 25, 26, 27] + }, + "400G": { + "system_lanes": [4, 6, 8, 10], + "line_lanes": [24, 25, 26, 27, 20, 21, 22, 23] + } + } + }, + "Ethernet228": { + "phy_id": 12, + "speed_lane_map": { + "100G": { + "system_lanes": [0, 2, 4, 6], + "line_lanes": [16, 17, 18, 19] + }, + "400G": { + "system_lanes": [0, 2, 12, 14], + "line_lanes": [16, 17, 18, 19, 28, 29, 30, 31] + } + } + }, + "Ethernet232": { + "phy_id": 13, + "speed_lane_map": { + "100G": { + "system_lanes": [0, 2, 4, 6], + "line_lanes": [16, 17, 18, 19] + }, + "400G": { + "system_lanes": [0, 2, 12, 14], + "line_lanes": [16, 17, 18, 19, 28, 29, 30, 31] + } + } + }, + "Ethernet236": { + "phy_id": 13, + "speed_lane_map": { + "100G": { + "system_lanes": [8, 10, 12, 14], + "line_lanes": [24, 25, 26, 27] + }, + "400G": { + "system_lanes": [4, 6, 8, 10], + "line_lanes": [24, 25, 26, 27, 20, 21, 22, 23] + } + } + }, + "Ethernet240": { + "phy_id": 15, + "speed_lane_map": { + "100G": { + "system_lanes": [8, 10, 12, 14], + "line_lanes": [24, 25, 26, 27] + }, + "400G": { + "system_lanes": [4, 6, 8, 10], + "line_lanes": [24, 25, 26, 27, 20, 21, 22, 23] + } + } + }, + "Ethernet244": { + "phy_id": 15, + "speed_lane_map": { + "100G": { + "system_lanes": [0, 2, 4, 6], + "line_lanes": [16, 17, 18, 19] + }, + "400G": { + "system_lanes": [0, 2, 12, 14], + "line_lanes": [16, 17, 18, 19, 28, 29, 30, 31] + } + } + }, + "Ethernet248": { + "phy_id": 16, + "speed_lane_map": { + "100G": { + "system_lanes": [0, 2, 4, 6], + "line_lanes": [16, 17, 18, 19] + }, + "400G": { + "system_lanes": [0, 2, 12, 14], + "line_lanes": [16, 17, 18, 19, 28, 29, 30, 31] + } + } + }, + "Ethernet252": { + "phy_id": 16, + "speed_lane_map": { + "100G": { + "system_lanes": [8, 10, 12, 14], + "line_lanes": [24, 25, 26, 27] + }, + "400G": { + "system_lanes": [4, 6, 8, 10], + "line_lanes": [24, 25, 26, 27, 20, 21, 22, 23] + } + } + } +} diff --git a/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/gearbox_400G_PAM4_optic.xml b/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/gearbox_400G_PAM4_optic.xml deleted file mode 100644 index 8be6884276b..00000000000 --- a/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/gearbox_400G_PAM4_optic.xml +++ /dev/null @@ -1,885 +0,0 @@ - - - crt88322 - bitmux - - 0 - 2 - bitmux - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0 - 2 - bitmux - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0 - 2 - bitmux - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0 - 2 - bitmux - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0 - 2 - bitmux - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0 - 2 - bitmux - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0 - 2 - bitmux - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0 - 2 - bitmux - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0 - 2 - bitmux - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0 - 2 - bitmux - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0 - 2 - bitmux - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0 - 2 - bitmux - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0 - 2 - bitmux - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0 - 2 - bitmux - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0 - 2 - bitmux - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 0 - 2 - bitmux - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/gearbox_config.json b/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/gearbox_config.json deleted file mode 100644 index 58246a8e8ba..00000000000 --- a/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/gearbox_config.json +++ /dev/null @@ -1,902 +0,0 @@ -{ - "phys": [ - { - "phy_id": 1, - "name": "phy1", - "address": "1", - "lib_name": "", - "firmware_path": "/usr/etc/credo/firmware/SE_LR.lz4.fw.1.4.5.bin", - "config_file": "/usr/share/sonic/hwsku/phy1_config.json", - "sai_init_config_file": "", - "phy_access": "mdio", - "bus_id": 0, - "context_id": 1, - "macsec_ipg": 352, - "hwinfo": "mdio0_0_0/0" - }, - { - "phy_id": 2, - "name": "phy2", - "address": "2", - "lib_name": "", - "firmware_path": "/usr/etc/credo/firmware/SE_LR.lz4.fw.1.4.5.bin", - "config_file": "/usr/share/sonic/hwsku/phy2_config.json", - "sai_init_config_file": "", - "phy_access": "mdio", - "bus_id": 0, - "context_id": 1, - "macsec_ipg": 352, - "hwinfo": "mdio1_0_0/0" - }, - { - "phy_id": 3, - "name": "phy3", - "address": "3", - "lib_name": "", - "firmware_path": "/usr/etc/credo/firmware/SE_LR.lz4.fw.1.4.5.bin", - "config_file": "/usr/share/sonic/hwsku/phy3_config.json", - "sai_init_config_file": "", - "phy_access": "mdio", - "bus_id": 0, - "context_id": 1, - "macsec_ipg": 352, - "hwinfo": "mdio2_0_0/0" - }, - { - "phy_id": 4, - "name": "phy4", - "address": "4", - "lib_name": "", - "firmware_path": "/usr/etc/credo/firmware/SE_LR.lz4.fw.1.4.5.bin", - "config_file": "/usr/share/sonic/hwsku/phy4_config.json", - "sai_init_config_file": "", - "phy_access": "mdio", - "bus_id": 0, - "context_id": 1, - "macsec_ipg": 352, - "hwinfo": "mdio3_0_0/0" - }, - { - "phy_id": 5, - "name": "phy5", - "address": "5", - "lib_name": "", - "firmware_path": "/usr/etc/credo/firmware/SE_LR.lz4.fw.1.4.5.bin", - "config_file": "/usr/share/sonic/hwsku/phy5_config.json", - "sai_init_config_file": "", - "phy_access": "mdio", - "bus_id": 0, - "context_id": 1, - "macsec_ipg": 352, - "hwinfo": "mdio4_0_0/0" - }, - { - "phy_id": 6, - "name": "phy6", - "address": "6", - "lib_name": "", - "firmware_path": "/usr/etc/credo/firmware/SE_LR.lz4.fw.1.4.5.bin", - "config_file": "/usr/share/sonic/hwsku/phy6_config.json", - "sai_init_config_file": "", - "phy_access": "mdio", - "bus_id": 0, - "context_id": 1, - "macsec_ipg": 352, - "hwinfo": "mdio5_0_0/0" - }, - { - "phy_id": 7, - "name": "phy7", - "address": "7", - "lib_name": "", - "firmware_path": "/usr/etc/credo/firmware/SE_LR.lz4.fw.1.4.5.bin", - "config_file": "/usr/share/sonic/hwsku/phy7_config.json", - "sai_init_config_file": "", - "phy_access": "mdio", - "bus_id": 0, - "context_id": 1, - "macsec_ipg": 352, - "hwinfo": "mdio6_0_0/0" - }, - { - "phy_id": 8, - "name": "phy8", - "address": "8", - "lib_name": "", - "firmware_path": "/usr/etc/credo/firmware/SE_LR.lz4.fw.1.4.5.bin", - "config_file": "/usr/share/sonic/hwsku/phy8_config.json", - "sai_init_config_file": "", - "phy_access": "mdio", - "bus_id": 0, - "context_id": 1, - "macsec_ipg": 352, - "hwinfo": "mdio7_0_0/0" - }, - { - "phy_id": 9, - "name": "phy9", - "address": "9", - "lib_name": "", - "firmware_path": "/usr/etc/credo/firmware/SE_LR.lz4.fw.1.4.5.bin", - "config_file": "/usr/share/sonic/hwsku/phy9_config.json", - "sai_init_config_file": "", - "phy_access": "mdio", - "bus_id": 0, - "context_id": 1, - "macsec_ipg": 352, - "hwinfo": "mdio8_0_0/0" - }, - { - "phy_id": 10, - "name": "phy10", - "address": "10", - "lib_name": "", - "firmware_path": "/usr/etc/credo/firmware/SE_LR.lz4.fw.1.4.5.bin", - "config_file": "/usr/share/sonic/hwsku/phy10_config.json", - "sai_init_config_file": "", - "phy_access": "mdio", - "bus_id": 0, - "context_id": 1, - "macsec_ipg": 352, - "hwinfo": "mdio9_0_0/0" - }, - { - "phy_id": 11, - "name": "phy11", - "address": "11", - "lib_name": "", - "firmware_path": "/usr/etc/credo/firmware/SE_LR.lz4.fw.1.4.5.bin", - "config_file": "/usr/share/sonic/hwsku/phy11_config.json", - "sai_init_config_file": "", - "phy_access": "mdio", - "bus_id": 0, - "context_id": 1, - "macsec_ipg": 352, - "hwinfo": "mdio10_0_0/0" - }, - { - "phy_id": 12, - "name": "phy12", - "address": "12", - "lib_name": "", - "firmware_path": "/usr/etc/credo/firmware/SE_LR.lz4.fw.1.4.5.bin", - "config_file": "/usr/share/sonic/hwsku/phy12_config.json", - "sai_init_config_file": "", - "phy_access": "mdio", - "bus_id": 0, - "context_id": 1, - "macsec_ipg": 352, - "hwinfo": "mdio11_0_0/0" - }, - { - "phy_id": 13, - "name": "phy13", - "address": "13", - "lib_name": "", - "firmware_path": "/usr/etc/credo/firmware/SE_LR.lz4.fw.1.4.5.bin", - "config_file": "/usr/share/sonic/hwsku/phy13_config.json", - "sai_init_config_file": "", - "phy_access": "mdio", - "bus_id": 0, - "context_id": 1, - "macsec_ipg": 352, - "hwinfo": "mdio12_0_0/0" - }, - { - "phy_id": 14, - "name": "phy14", - "address": "14", - "lib_name": "", - "firmware_path": "/usr/etc/credo/firmware/SE_LR.lz4.fw.1.4.5.bin", - "config_file": "/usr/share/sonic/hwsku/phy14_config.json", - "sai_init_config_file": "", - "phy_access": "mdio", - "bus_id": 0, - "context_id": 1, - "macsec_ipg": 352, - "hwinfo": "mdio13_0_0/0" - }, - { - "phy_id": 15, - "name": "phy15", - "address": "15", - "lib_name": "", - "firmware_path": "/usr/etc/credo/firmware/SE_LR.lz4.fw.1.4.5.bin", - "config_file": "/usr/share/sonic/hwsku/phy15_config.json", - "sai_init_config_file": "", - "phy_access": "mdio", - "bus_id": 0, - "context_id": 1, - "macsec_ipg": 352, - "hwinfo": "mdio14_0_0/0" - }, - { - "phy_id": 16, - "name": "phy16", - "address": "16", - "lib_name": "", - "firmware_path": "/usr/etc/credo/firmware/SE_LR.lz4.fw.1.4.5.bin", - "config_file": "/usr/share/sonic/hwsku/phy16_config.json", - "sai_init_config_file": "", - "phy_access": "mdio", - "bus_id": 0, - "context_id": 1, - "macsec_ipg": 352, - "hwinfo": "mdio15_0_0/0" - } - ], - "interfaces": [ - { - "name": "Ethernet0", - "index": 1, - "phy_id": 1, - "system_lanes": [ - 4, - 6, - 8, - 10 - ], - "line_lanes": [ - 20, - 21, - 22, - 23, - 24, - 25, - 26, - 27 - ] - }, - { - "name": "Ethernet8", - "index": 2, - "phy_id": 1, - "system_lanes": [ - 0, - 2, - 12, - 14 - ], - "line_lanes": [ - 16, - 17, - 18, - 19, - 28, - 29, - 30, - 31 - ] - }, - { - "name": "Ethernet16", - "index": 3, - "phy_id": 2, - "system_lanes": [ - 0, - 2, - 12, - 14 - ], - "line_lanes": [ - 16, - 17, - 18, - 19, - 28, - 29, - 30, - 31 - ] - }, - { - "name": "Ethernet24", - "index": 4, - "phy_id": 2, - "system_lanes": [ - 4, - 6, - 8, - 10 - ], - "line_lanes": [ - 20, - 21, - 22, - 23, - 24, - 25, - 26, - 27 - ] - }, - { - "name": "Ethernet32", - "index": 5, - "phy_id": 3, - "system_lanes": [ - 4, - 6, - 8, - 10 - ], - "line_lanes": [ - 20, - 21, - 22, - 23, - 24, - 25, - 26, - 27 - ] - }, - { - "name": "Ethernet40", - "index": 6, - "phy_id": 3, - "system_lanes": [ - 0, - 2, - 12, - 14 - ], - "line_lanes": [ - 16, - 17, - 18, - 19, - 28, - 29, - 30, - 31 - ] - }, - { - "name": "Ethernet48", - "index": 7, - "phy_id": 4, - "system_lanes": [ - 0, - 2, - 12, - 14 - ], - "line_lanes": [ - 16, - 17, - 18, - 19, - 28, - 29, - 30, - 31 - ] - }, - { - "name": "Ethernet56", - "index": 8, - "phy_id": 4, - "system_lanes": [ - 4, - 6, - 8, - 10 - ], - "line_lanes": [ - 20, - 21, - 22, - 23, - 24, - 25, - 26, - 27 - ] - }, - { - "name": "Ethernet64", - "index": 9, - "phy_id": 5, - "system_lanes": [ - 4, - 6, - 8, - 10 - ], - "line_lanes": [ - 20, - 21, - 22, - 23, - 24, - 25, - 26, - 27 - ] - }, - { - "name": "Ethernet72", - "index": 10, - "phy_id": 5, - "system_lanes": [ - 0, - 2, - 12, - 14 - ], - "line_lanes": [ - 16, - 17, - 18, - 19, - 28, - 29, - 30, - 31 - ] - }, - { - "name": "Ethernet80", - "index": 11, - "phy_id": 7, - "system_lanes": [ - 0, - 2, - 12, - 14 - ], - "line_lanes": [ - 16, - 17, - 18, - 19, - 28, - 29, - 30, - 31 - ] - }, - { - "name": "Ethernet88", - "index": 12, - "phy_id": 7, - "system_lanes": [ - 4, - 6, - 8, - 10 - ], - "line_lanes": [ - 20, - 21, - 22, - 23, - 24, - 25, - 26, - 27 - ] - }, - { - "name": "Ethernet96", - "index": 13, - "phy_id": 6, - "system_lanes": [ - 4, - 6, - 8, - 10 - ], - "line_lanes": [ - 20, - 21, - 22, - 23, - 24, - 25, - 26, - 27 - ] - }, - { - "name": "Ethernet104", - "index": 14, - "phy_id": 6, - "system_lanes": [ - 0, - 2, - 12, - 14 - ], - "line_lanes": [ - 16, - 17, - 18, - 19, - 28, - 29, - 30, - 31 - ] - }, - { - "name": "Ethernet112", - "index": 15, - "phy_id": 8, - "system_lanes": [ - 0, - 2, - 12, - 14 - ], - "line_lanes": [ - 16, - 17, - 18, - 19, - 28, - 29, - 30, - 31 - ] - }, - { - "name": "Ethernet120", - "index": 16, - "phy_id": 8, - "system_lanes": [ - 4, - 6, - 8, - 10 - ], - "line_lanes": [ - 20, - 21, - 22, - 23, - 24, - 25, - 26, - 27 - ] - }, - { - "name": "Ethernet256", - "index": 49, - "phy_id": 9, - "system_lanes": [ - 4, - 6, - 8, - 10 - ], - "line_lanes": [ - 20, - 21, - 22, - 23, - 24, - 25, - 26, - 27 - ] - }, - { - "name": "Ethernet264", - "index": 50, - "phy_id": 9, - "system_lanes": [ - 0, - 2, - 12, - 14 - ], - "line_lanes": [ - 16, - 17, - 18, - 19, - 28, - 29, - 30, - 31 - ] - }, - { - "name": "Ethernet272", - "index": 51, - "phy_id": 11, - "system_lanes": [ - 0, - 2, - 12, - 14 - ], - "line_lanes": [ - 16, - 17, - 18, - 19, - 28, - 29, - 30, - 31 - ] - }, - { - "name": "Ethernet280", - "index": 52, - "phy_id": 11, - "system_lanes": [ - 4, - 6, - 8, - 10 - ], - "line_lanes": [ - 20, - 21, - 22, - 23, - 24, - 25, - 26, - 27 - ] - }, - { - "name": "Ethernet288", - "index": 53, - "phy_id": 14, - "system_lanes": [ - 4, - 6, - 8, - 10 - ], - "line_lanes": [ - 20, - 21, - 22, - 23, - 24, - 25, - 26, - 27 - ] - }, - { - "name": "Ethernet296", - "index": 54, - "phy_id": 14, - "system_lanes": [ - 0, - 2, - 12, - 14 - ], - "line_lanes": [ - 16, - 17, - 18, - 19, - 28, - 29, - 30, - 31 - ] - }, - { - "name": "Ethernet304", - "index": 55, - "phy_id": 10, - "system_lanes": [ - 0, - 2, - 12, - 14 - ], - "line_lanes": [ - 16, - 17, - 18, - 19, - 28, - 29, - 30, - 31 - ] - }, - { - "name": "Ethernet312", - "index": 56, - "phy_id": 10, - "system_lanes": [ - 4, - 6, - 8, - 10 - ], - "line_lanes": [ - 20, - 21, - 22, - 23, - 24, - 25, - 26, - 27 - ] - }, - { - "name": "Ethernet320", - "index": 57, - "phy_id": 12, - "system_lanes": [ - 4, - 6, - 8, - 10 - ], - "line_lanes": [ - 20, - 21, - 22, - 23, - 24, - 25, - 26, - 27 - ] - }, - { - "name": "Ethernet328", - "index": 58, - "phy_id": 12, - "system_lanes": [ - 0, - 2, - 12, - 14 - ], - "line_lanes": [ - 16, - 17, - 18, - 19, - 28, - 29, - 30, - 31 - ] - }, - { - "name": "Ethernet336", - "index": 59, - "phy_id": 13, - "system_lanes": [ - 0, - 2, - 12, - 14 - ], - "line_lanes": [ - 16, - 17, - 18, - 19, - 28, - 29, - 30, - 31 - ] - }, - { - "name": "Ethernet344", - "index": 60, - "phy_id": 13, - "system_lanes": [ - 4, - 6, - 8, - 10 - ], - "line_lanes": [ - 20, - 21, - 22, - 23, - 24, - 25, - 26, - 27 - ] - }, - { - "name": "Ethernet352", - "index": 61, - "phy_id": 15, - "system_lanes": [ - 4, - 6, - 8, - 10 - ], - "line_lanes": [ - 20, - 21, - 22, - 23, - 24, - 25, - 26, - 27 - ] - }, - { - "name": "Ethernet360", - "index": 62, - "phy_id": 15, - "system_lanes": [ - 0, - 2, - 12, - 14 - ], - "line_lanes": [ - 16, - 17, - 18, - 19, - 28, - 29, - 30, - 31 - ] - }, - { - "name": "Ethernet368", - "index": 63, - "phy_id": 16, - "system_lanes": [ - 0, - 2, - 12, - 14 - ], - "line_lanes": [ - 16, - 17, - 18, - 19, - 28, - 29, - 30, - 31 - ] - }, - { - "name": "Ethernet376", - "index": 64, - "phy_id": 16, - "system_lanes": [ - 4, - 6, - 8, - 10 - ], - "line_lanes": [ - 20, - 21, - 22, - 23, - 24, - 25, - 26, - 27 - ] - } - ] -} diff --git a/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/hwsku-init b/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/hwsku-init new file mode 100755 index 00000000000..84b54850e8f --- /dev/null +++ b/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/hwsku-init @@ -0,0 +1 @@ +python3 /usr/share/sonic/hwsku/hwsku_init.py diff --git a/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/hwsku_config.json b/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/hwsku_config.json new file mode 100644 index 00000000000..cd14cd1a42a --- /dev/null +++ b/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/hwsku_config.json @@ -0,0 +1,24 @@ +{ + "gearbox_config": { + "file": "gearbox_config.json", + "template": "gearbox_config.json.j2", + "template_data": "gearbox_intf_config", + "port_speed_lane_map": "data/gearbox_port_speed_map.json" + }, + "phy_profile_config": { + "file": "gearbox_400G_PAM4_optic.xml", + "template": "gearbox_400G_PAM4_optic.xml.j2", + "template_data": "phy_profile" + }, + "phy_config": { + "file": "phy{}_config.json", + "template": "phy_config.json.j2", + "template_data": "phy_port_config" + }, + "bcm_config": { + "file": "q3d-a7280R4-32QFx400G-32DFx400G.config.bcm", + "template" : "q3d-a7280R4-32QFx400G-32DFx400G.config.bcm.j2", + "template_data" : "bcm_port_lane_config", + "port_lane_map" : "data/bcm_port_lane_map.json" + } +} diff --git a/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/hwsku_init.py b/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/hwsku_init.py new file mode 100755 index 00000000000..0a65d42fad3 --- /dev/null +++ b/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/hwsku_init.py @@ -0,0 +1,27 @@ +import argparse +import os +from hwsku_init_impl import HwSKUInit + +DEFAULT_HWSKU_DIR = '/usr/share/sonic/hwsku' + +def __main__(): + parser = argparse.ArgumentParser(description='Initialize for a given hwsku') + parser.add_argument('-s', '--hwsku_dir', help='path of hwsku directory') + parser.add_argument('-n', '--asic_id', help='asic id') + parser.add_argument('-c', '--config_db_file', help='config db file') + + args = parser.parse_args() + + hwsku_dir = args.hwsku_dir if args.hwsku_dir else DEFAULT_HWSKU_DIR + asic_id = int(args.asic_id) if args.asic_id else None + config_db_file = args.config_db_file if args.config_db_file else None + + if asic_id is not None: + asic_dir = os.path.join(hwsku_dir, str(asic_id)) + else: + asic_dir = hwsku_dir + + HwSKUInit(asic_dir, config_db_file).do_init() + +if __name__ == '__main__': + __main__() diff --git a/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/hwsku_init_impl.py b/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/hwsku_init_impl.py new file mode 100644 index 00000000000..393bd3862ac --- /dev/null +++ b/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/hwsku_init_impl.py @@ -0,0 +1,103 @@ +from hwsku_init_lib import GearboxPortConfig, PhyPortConfig, PortSpeed, HwSKUInitBase + +class HwSKUInit(HwSKUInitBase): + def generate_gearbox_config(self): + gearbox_config = self.hwsku_config.get('gearbox_config') + if not gearbox_config: + # This SKU does not require to generate gearbox config. + self.logger.info('Skip generating gearbox config because no config found.') + return + + # Load speed & lane map for gearbox ports. + gb_port_speed_lane_map = self.load_sku_json_file(gearbox_config['port_speed_lane_map']) + if not gb_port_speed_lane_map: + self.logger.info('Skip generating gearbox config because no port speed lane map found') + return + + # Generate gearbox and phy port config based on port's configured speed. + gb_port_config = [] + phy_port_config = {} + phy_profile = {} + port_config = self.read_ext_port_config() + port_names = list(port_config.keys()) + port_names.sort(key=lambda port_name: int(port_name.replace('Ethernet', ''))) + for port in port_names: + port_speed_lane_map = gb_port_speed_lane_map.get(port) + if not port_speed_lane_map: + # No gearbox port for this port. + continue + + config = port_config[ port ] + index = int(config['index']) + speed = PortSpeed(config['speed']) + phy_id = port_speed_lane_map['phy_id'] + system_lanes = port_speed_lane_map['speed_lane_map'][speed.shortName()]['system_lanes'] + line_lanes = port_speed_lane_map['speed_lane_map'][speed.shortName()]['line_lanes'] + gb_port_config.append(GearboxPortConfig(port, index, phy_id, system_lanes, line_lanes)) + + phy_port_config_list = phy_port_config.setdefault(phy_id, []) + system_speed = speed.value() //len(system_lanes) + line_speed = speed.value() //len(line_lanes) + phy_port_config_list.append(PhyPortConfig(index, system_speed, line_speed)) + + profile = phy_profile.setdefault(phy_id, {}) + if speed.shortName() == '400G': + profile['topology'] = 2 + profile['mode'] = 'bitmux' + else: + profile['topology'] = 1 + profile['mode'] = 'retimer' + + # Render templates to generate gearbox and phy config files. + self.render_template(gearbox_config['template'], gearbox_config['template_data'], gb_port_config, + gearbox_config['file']) + self.logger.info('Generated gearbox config: {}'.format(gearbox_config['file'])) + phy_config = self.hwsku_config['phy_config'] + for phy_id in sorted(phy_port_config.keys()): + self.render_template(phy_config['template'], phy_config['template_data'], phy_port_config[ phy_id ], + phy_config['file'].format(phy_id)) + self.logger.info('Generated phy config: {}'.format(phy_config['file'].format(phy_id))) + phy_profile_config = self.hwsku_config['phy_profile_config'] + self.render_template(phy_profile_config['template'], phy_profile_config['template_data'], phy_profile, + phy_profile_config['file']) + self.logger.info('Generated phy profile: {}'.format(phy_profile_config['file'])) + + def generate_bcm_config(self): + sku_bcm_config = self.hwsku_config.get('bcm_config') + if not sku_bcm_config: + # This SKU does not require to generate bcm config. + self.logger.info('Skip generating bcm config because no config found.') + return + + bcm_port_lane_map = self.load_sku_json_file(sku_bcm_config['port_lane_map']) + port_config = self.read_ext_port_config() + bcm_port_lane_config = { 'port_map' : {}, + 'speed_lane_map' : {}, + 'lane_to_serdes_map' : {}, + 'phy_polarity_flip' : {} } + for port in port_config: + config = port_config[port] + index = int(config['index']) + bcm_port_lane_config['port_map'][index] = {'core_id': config['core_id'], + 'core_port_id': config['core_port_id'] } + speed = PortSpeed(config['speed']) + bcm_port_lane_config['speed_lane_map'][index] = bcm_port_lane_map['port_speed_lane_map'][str(index)][speed.shortName()] + + for lane in config['lanes'].split(','): + lane = int(lane) + bcm_port_lane_config['lane_to_serdes_map'][lane] = bcm_port_lane_map['lane_to_serdes_map'][str(lane)][speed.shortName()] + bcm_port_lane_config['phy_polarity_flip'][lane] = bcm_port_lane_map['phy_polarity_flip'][str(lane)][speed.shortName()] + + # Render templates to generate bcm config + self.render_template(sku_bcm_config['template'], sku_bcm_config['template_data'], bcm_port_lane_config, + sku_bcm_config['file']) + self.logger.info('Generated bcm config: {}'.format(sku_bcm_config['file'])) + + def do_init(self): + if self.hwsku_config is None: + # The SKU does not require any runtime initialization. + self.logger.info('Skip hwsku-init because no hwsku config found.') + return + + self.generate_gearbox_config() + self.generate_bcm_config() diff --git a/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/hwsku_init_lib.py b/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/hwsku_init_lib.py new file mode 100644 index 00000000000..86120a13c18 --- /dev/null +++ b/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/hwsku_init_lib.py @@ -0,0 +1,94 @@ +from dataclasses import dataclass +from jinja2 import Environment, FileSystemLoader +import json +import logging +import os +import re +from swsscommon.swsscommon import ConfigDBConnector +import sys + +ASIC_TEMPLATE_DIR = 'template' +HWSKU_CONFIG_FILE = 'hwsku_config.json' + +@dataclass +class GearboxPortConfig(): + name : str + index : int + phy_id : int + system_lanes : list + line_lanes : list + +@dataclass +class PhyPortConfig(): + index : int + system_speed : int + line_speed : int + +class PortSpeed(): + def __init__(self, speed): # unit: mbps + if type(speed) == str: + speed = int(speed) + self.speed = speed + + def value(self): + return self.speed + + def shortName(self): + return f'{self.speed//1000}G' + +class HwSKUInitBase(): + def __init__(self, asic_dir, config_db_file): + self.create_logger() + + self.asic_dir = asic_dir + self.logger.info(f'asic path: {self.asic_dir}') + self.config_db_file = config_db_file + self.hwsku_config = self.load_sku_json_file(HWSKU_CONFIG_FILE) + self.logger.info(f'hwsku config: {str(self.hwsku_config)}') + + def create_logger(self): + self.logger = logging.getLogger('hwsku-init') + self.logger.setLevel(logging.DEBUG) + handler = logging.StreamHandler(sys.stdout) + handler.setLevel(logging.DEBUG) + handler.setFormatter(logging.Formatter('%(asctime)s %(levelname)s %(name)s - %(message)s')) + self.logger.addHandler(handler) + + def get_sku_file_path(self, file_name): + return os.path.join(self.asic_dir, file_name) + + def load_sku_json_file(self, file_name): + data = None + try: + with open(self.get_sku_file_path(file_name)) as f: + data = json.load(f) + except FileNotFoundError: + pass + return data + + def read_ext_port_config(self): + if self.config_db_file: + with open(self.config_db_file) as f: + data = json.load(f) + port_config = data['PORT'] + else: + config_db = ConfigDBConnector() + config_db.connect() + port_config = config_db.get_table('PORT') + return {port : config for port, config in port_config.items() if config['role'] == 'Ext'} + + def render_template(self, template_file, data_name, data, output_file=None): + # nosemgrep: python.flask.security.xss.audit.direct-use-of-jinja2.direct-use-of-jinja2 + env = Environment(loader=FileSystemLoader(self.get_sku_file_path(ASIC_TEMPLATE_DIR))) + + template = env.get_template(template_file) + + # nosemgrep: python.lang.security.audit.eval-detected.eval-detected + output = eval(f'template.render({data_name}=data)') + if output_file: + with open(self.get_sku_file_path(output_file), 'w') as f: + f.write(output) + return output + + def do_init(self): + pass diff --git a/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/pg_profile_lookup.ini b/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/pg_profile_lookup.ini index b0b75b0653a..a1e5d18ccf4 100644 --- a/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/pg_profile_lookup.ini +++ b/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/pg_profile_lookup.ini @@ -1,17 +1,17 @@ # PG lossless profiles. # speed cable size xon xoff threshold xon_offset - 40000 30m 0 2560 45056 -6 181753 - 100000 30m 0 2560 57344 -6 363506 - 400000 30m 0 2560 131072 -5 1454025 - 800000 30m 0 2560 233472 -4 2908050 - 40000 300m 0 2560 61440 -6 181753 - 100000 300m 0 2560 102400 -6 363506 - 400000 300m 0 2560 311296 -5 1454025 - 800000 300m 0 2560 589824 -4 2908050 - 40000 1000m 0 2560 110592 -6 181753 - 100000 1000m 0 2560 221184 -6 363506 - 400000 1000m 0 2560 778240 -5 1454025 - 800000 1000m 0 2560 1519616 -4 2908050 + 40000 30m 0 2560 176128 -6 181753 + 100000 30m 0 2560 385024 -6 363506 + 400000 30m 0 2560 1441792 -5 1454025 + 800000 30m 0 2560 2850816 -4 2908050 + 40000 300m 0 2560 176128 -6 181753 + 100000 300m 0 2560 385024 -6 363506 + 400000 300m 0 2560 1441792 -5 1454025 + 800000 300m 0 2560 2850816 -4 2908050 + 40000 1000m 0 2560 176128 -6 181753 + 100000 1000m 0 2560 385024 -6 363506 + 400000 1000m 0 2560 1441792 -5 1454025 + 800000 1000m 0 2560 2850816 -4 2908050 40000 2000m 0 2560 176128 -6 181753 100000 2000m 0 2560 385024 -6 363506 400000 2000m 0 2560 1441792 -5 1454025 diff --git a/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/phy10_config.json b/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/phy10_config.json deleted file mode 100644 index 694482468fd..00000000000 --- a/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/phy10_config.json +++ /dev/null @@ -1,59 +0,0 @@ -{ - "lanes": [ - { - "index": 200, - "local_lane_id": 0, - "system_side": true, - "tx_polarity": 0, - "rx_polarity": 0, - "line_tx_lanemap": 0, - "line_rx_lanemap": 0, - "line_to_system_lanemap": 0, - "mdio_addr": "" - } - ], - "ports": [ - { - "index": 55, - "mdio_addr": "", - "system_speed": 100000, - "system_fec": "rs", - "system_auto_neg": false, - "system_loopback": "none", - "system_training": false, - "line_speed": 50000, - "line_fec": "rs", - "line_auto_neg": false, - "line_loopback": "none", - "line_training": false, - "line_media_type": "fiber", - "line_intf_type": "none", - "line_adver_speed": [], - "line_adver_fec": [], - "line_adver_auto_neg": false, - "line_adver_asym_pause": false, - "line_adver_media_type": "fiber" - }, - { - "index": 56, - "mdio_addr": "", - "system_speed": 100000, - "system_fec": "rs", - "system_auto_neg": false, - "system_loopback": "none", - "system_training": false, - "line_speed": 50000, - "line_fec": "rs", - "line_auto_neg": false, - "line_loopback": "none", - "line_training": false, - "line_media_type": "fiber", - "line_intf_type": "none", - "line_adver_speed": [], - "line_adver_fec": [], - "line_adver_auto_neg": false, - "line_adver_asym_pause": false, - "line_adver_media_type": "fiber" - } - ] -} diff --git a/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/phy11_config.json b/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/phy11_config.json deleted file mode 100644 index 3e45edb65c9..00000000000 --- a/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/phy11_config.json +++ /dev/null @@ -1,59 +0,0 @@ -{ - "lanes": [ - { - "index": 200, - "local_lane_id": 0, - "system_side": true, - "tx_polarity": 0, - "rx_polarity": 0, - "line_tx_lanemap": 0, - "line_rx_lanemap": 0, - "line_to_system_lanemap": 0, - "mdio_addr": "" - } - ], - "ports": [ - { - "index": 51, - "mdio_addr": "", - "system_speed": 100000, - "system_fec": "rs", - "system_auto_neg": false, - "system_loopback": "none", - "system_training": false, - "line_speed": 50000, - "line_fec": "rs", - "line_auto_neg": false, - "line_loopback": "none", - "line_training": false, - "line_media_type": "fiber", - "line_intf_type": "none", - "line_adver_speed": [], - "line_adver_fec": [], - "line_adver_auto_neg": false, - "line_adver_asym_pause": false, - "line_adver_media_type": "fiber" - }, - { - "index": 52, - "mdio_addr": "", - "system_speed": 100000, - "system_fec": "rs", - "system_auto_neg": false, - "system_loopback": "none", - "system_training": false, - "line_speed": 50000, - "line_fec": "rs", - "line_auto_neg": false, - "line_loopback": "none", - "line_training": false, - "line_media_type": "fiber", - "line_intf_type": "none", - "line_adver_speed": [], - "line_adver_fec": [], - "line_adver_auto_neg": false, - "line_adver_asym_pause": false, - "line_adver_media_type": "fiber" - } - ] -} diff --git a/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/phy12_config.json b/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/phy12_config.json deleted file mode 100644 index 89bf294c73c..00000000000 --- a/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/phy12_config.json +++ /dev/null @@ -1,59 +0,0 @@ -{ - "lanes": [ - { - "index": 200, - "local_lane_id": 0, - "system_side": true, - "tx_polarity": 0, - "rx_polarity": 0, - "line_tx_lanemap": 0, - "line_rx_lanemap": 0, - "line_to_system_lanemap": 0, - "mdio_addr": "" - } - ], - "ports": [ - { - "index": 57, - "mdio_addr": "", - "system_speed": 100000, - "system_fec": "rs", - "system_auto_neg": false, - "system_loopback": "none", - "system_training": false, - "line_speed": 50000, - "line_fec": "rs", - "line_auto_neg": false, - "line_loopback": "none", - "line_training": false, - "line_media_type": "fiber", - "line_intf_type": "none", - "line_adver_speed": [], - "line_adver_fec": [], - "line_adver_auto_neg": false, - "line_adver_asym_pause": false, - "line_adver_media_type": "fiber" - }, - { - "index": 58, - "mdio_addr": "", - "system_speed": 100000, - "system_fec": "rs", - "system_auto_neg": false, - "system_loopback": "none", - "system_training": false, - "line_speed": 50000, - "line_fec": "rs", - "line_auto_neg": false, - "line_loopback": "none", - "line_training": false, - "line_media_type": "fiber", - "line_intf_type": "none", - "line_adver_speed": [], - "line_adver_fec": [], - "line_adver_auto_neg": false, - "line_adver_asym_pause": false, - "line_adver_media_type": "fiber" - } - ] -} diff --git a/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/phy13_config.json b/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/phy13_config.json deleted file mode 100644 index 7cd83fdda29..00000000000 --- a/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/phy13_config.json +++ /dev/null @@ -1,59 +0,0 @@ -{ - "lanes": [ - { - "index": 200, - "local_lane_id": 0, - "system_side": true, - "tx_polarity": 0, - "rx_polarity": 0, - "line_tx_lanemap": 0, - "line_rx_lanemap": 0, - "line_to_system_lanemap": 0, - "mdio_addr": "" - } - ], - "ports": [ - { - "index": 59, - "mdio_addr": "", - "system_speed": 100000, - "system_fec": "rs", - "system_auto_neg": false, - "system_loopback": "none", - "system_training": false, - "line_speed": 50000, - "line_fec": "rs", - "line_auto_neg": false, - "line_loopback": "none", - "line_training": false, - "line_media_type": "fiber", - "line_intf_type": "none", - "line_adver_speed": [], - "line_adver_fec": [], - "line_adver_auto_neg": false, - "line_adver_asym_pause": false, - "line_adver_media_type": "fiber" - }, - { - "index": 60, - "mdio_addr": "", - "system_speed": 100000, - "system_fec": "rs", - "system_auto_neg": false, - "system_loopback": "none", - "system_training": false, - "line_speed": 50000, - "line_fec": "rs", - "line_auto_neg": false, - "line_loopback": "none", - "line_training": false, - "line_media_type": "fiber", - "line_intf_type": "none", - "line_adver_speed": [], - "line_adver_fec": [], - "line_adver_auto_neg": false, - "line_adver_asym_pause": false, - "line_adver_media_type": "fiber" - } - ] -} diff --git a/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/phy14_config.json b/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/phy14_config.json deleted file mode 100644 index 88c1888a54b..00000000000 --- a/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/phy14_config.json +++ /dev/null @@ -1,59 +0,0 @@ -{ - "lanes": [ - { - "index": 200, - "local_lane_id": 0, - "system_side": true, - "tx_polarity": 0, - "rx_polarity": 0, - "line_tx_lanemap": 0, - "line_rx_lanemap": 0, - "line_to_system_lanemap": 0, - "mdio_addr": "" - } - ], - "ports": [ - { - "index": 53, - "mdio_addr": "", - "system_speed": 100000, - "system_fec": "rs", - "system_auto_neg": false, - "system_loopback": "none", - "system_training": false, - "line_speed": 50000, - "line_fec": "rs", - "line_auto_neg": false, - "line_loopback": "none", - "line_training": false, - "line_media_type": "fiber", - "line_intf_type": "none", - "line_adver_speed": [], - "line_adver_fec": [], - "line_adver_auto_neg": false, - "line_adver_asym_pause": false, - "line_adver_media_type": "fiber" - }, - { - "index": 54, - "mdio_addr": "", - "system_speed": 100000, - "system_fec": "rs", - "system_auto_neg": false, - "system_loopback": "none", - "system_training": false, - "line_speed": 50000, - "line_fec": "rs", - "line_auto_neg": false, - "line_loopback": "none", - "line_training": false, - "line_media_type": "fiber", - "line_intf_type": "none", - "line_adver_speed": [], - "line_adver_fec": [], - "line_adver_auto_neg": false, - "line_adver_asym_pause": false, - "line_adver_media_type": "fiber" - } - ] -} diff --git a/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/phy15_config.json b/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/phy15_config.json deleted file mode 100644 index 73dea722b2e..00000000000 --- a/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/phy15_config.json +++ /dev/null @@ -1,59 +0,0 @@ -{ - "lanes": [ - { - "index": 200, - "local_lane_id": 0, - "system_side": true, - "tx_polarity": 0, - "rx_polarity": 0, - "line_tx_lanemap": 0, - "line_rx_lanemap": 0, - "line_to_system_lanemap": 0, - "mdio_addr": "" - } - ], - "ports": [ - { - "index": 61, - "mdio_addr": "", - "system_speed": 100000, - "system_fec": "rs", - "system_auto_neg": false, - "system_loopback": "none", - "system_training": false, - "line_speed": 50000, - "line_fec": "rs", - "line_auto_neg": false, - "line_loopback": "none", - "line_training": false, - "line_media_type": "fiber", - "line_intf_type": "none", - "line_adver_speed": [], - "line_adver_fec": [], - "line_adver_auto_neg": false, - "line_adver_asym_pause": false, - "line_adver_media_type": "fiber" - }, - { - "index": 62, - "mdio_addr": "", - "system_speed": 100000, - "system_fec": "rs", - "system_auto_neg": false, - "system_loopback": "none", - "system_training": false, - "line_speed": 50000, - "line_fec": "rs", - "line_auto_neg": false, - "line_loopback": "none", - "line_training": false, - "line_media_type": "fiber", - "line_intf_type": "none", - "line_adver_speed": [], - "line_adver_fec": [], - "line_adver_auto_neg": false, - "line_adver_asym_pause": false, - "line_adver_media_type": "fiber" - } - ] -} diff --git a/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/phy16_config.json b/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/phy16_config.json deleted file mode 100644 index 4e7cee13c29..00000000000 --- a/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/phy16_config.json +++ /dev/null @@ -1,59 +0,0 @@ -{ - "lanes": [ - { - "index": 200, - "local_lane_id": 0, - "system_side": true, - "tx_polarity": 0, - "rx_polarity": 0, - "line_tx_lanemap": 0, - "line_rx_lanemap": 0, - "line_to_system_lanemap": 0, - "mdio_addr": "" - } - ], - "ports": [ - { - "index": 63, - "mdio_addr": "", - "system_speed": 100000, - "system_fec": "rs", - "system_auto_neg": false, - "system_loopback": "none", - "system_training": false, - "line_speed": 50000, - "line_fec": "rs", - "line_auto_neg": false, - "line_loopback": "none", - "line_training": false, - "line_media_type": "fiber", - "line_intf_type": "none", - "line_adver_speed": [], - "line_adver_fec": [], - "line_adver_auto_neg": false, - "line_adver_asym_pause": false, - "line_adver_media_type": "fiber" - }, - { - "index": 64, - "mdio_addr": "", - "system_speed": 100000, - "system_fec": "rs", - "system_auto_neg": false, - "system_loopback": "none", - "system_training": false, - "line_speed": 50000, - "line_fec": "rs", - "line_auto_neg": false, - "line_loopback": "none", - "line_training": false, - "line_media_type": "fiber", - "line_intf_type": "none", - "line_adver_speed": [], - "line_adver_fec": [], - "line_adver_auto_neg": false, - "line_adver_asym_pause": false, - "line_adver_media_type": "fiber" - } - ] -} diff --git a/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/phy1_config.json b/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/phy1_config.json deleted file mode 100644 index bb3938886fd..00000000000 --- a/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/phy1_config.json +++ /dev/null @@ -1,59 +0,0 @@ -{ - "lanes": [ - { - "index": 200, - "local_lane_id": 0, - "system_side": true, - "tx_polarity": 0, - "rx_polarity": 0, - "line_tx_lanemap": 0, - "line_rx_lanemap": 0, - "line_to_system_lanemap": 0, - "mdio_addr": "" - } - ], - "ports": [ - { - "index": 1, - "mdio_addr": "", - "system_speed": 100000, - "system_fec": "rs", - "system_auto_neg": false, - "system_loopback": "none", - "system_training": false, - "line_speed": 50000, - "line_fec": "rs", - "line_auto_neg": false, - "line_loopback": "none", - "line_training": false, - "line_media_type": "fiber", - "line_intf_type": "none", - "line_adver_speed": [], - "line_adver_fec": [], - "line_adver_auto_neg": false, - "line_adver_asym_pause": false, - "line_adver_media_type": "fiber" - }, - { - "index": 2, - "mdio_addr": "", - "system_speed": 100000, - "system_fec": "rs", - "system_auto_neg": false, - "system_loopback": "none", - "system_training": false, - "line_speed": 50000, - "line_fec": "rs", - "line_auto_neg": false, - "line_loopback": "none", - "line_training": false, - "line_media_type": "fiber", - "line_intf_type": "none", - "line_adver_speed": [], - "line_adver_fec": [], - "line_adver_auto_neg": false, - "line_adver_asym_pause": false, - "line_adver_media_type": "fiber" - } - ] -} diff --git a/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/phy2_config.json b/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/phy2_config.json deleted file mode 100644 index db73036821d..00000000000 --- a/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/phy2_config.json +++ /dev/null @@ -1,59 +0,0 @@ -{ - "lanes": [ - { - "index": 200, - "local_lane_id": 0, - "system_side": true, - "tx_polarity": 0, - "rx_polarity": 0, - "line_tx_lanemap": 0, - "line_rx_lanemap": 0, - "line_to_system_lanemap": 0, - "mdio_addr": "" - } - ], - "ports": [ - { - "index": 3, - "mdio_addr": "", - "system_speed": 100000, - "system_fec": "rs", - "system_auto_neg": false, - "system_loopback": "none", - "system_training": false, - "line_speed": 50000, - "line_fec": "rs", - "line_auto_neg": false, - "line_loopback": "none", - "line_training": false, - "line_media_type": "fiber", - "line_intf_type": "none", - "line_adver_speed": [], - "line_adver_fec": [], - "line_adver_auto_neg": false, - "line_adver_asym_pause": false, - "line_adver_media_type": "fiber" - }, - { - "index": 4, - "mdio_addr": "", - "system_speed": 100000, - "system_fec": "rs", - "system_auto_neg": false, - "system_loopback": "none", - "system_training": false, - "line_speed": 50000, - "line_fec": "rs", - "line_auto_neg": false, - "line_loopback": "none", - "line_training": false, - "line_media_type": "fiber", - "line_intf_type": "none", - "line_adver_speed": [], - "line_adver_fec": [], - "line_adver_auto_neg": false, - "line_adver_asym_pause": false, - "line_adver_media_type": "fiber" - } - ] -} diff --git a/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/phy3_config.json b/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/phy3_config.json deleted file mode 100644 index 4dfef9d4a28..00000000000 --- a/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/phy3_config.json +++ /dev/null @@ -1,59 +0,0 @@ -{ - "lanes": [ - { - "index": 200, - "local_lane_id": 0, - "system_side": true, - "tx_polarity": 0, - "rx_polarity": 0, - "line_tx_lanemap": 0, - "line_rx_lanemap": 0, - "line_to_system_lanemap": 0, - "mdio_addr": "" - } - ], - "ports": [ - { - "index": 5, - "mdio_addr": "", - "system_speed": 100000, - "system_fec": "rs", - "system_auto_neg": false, - "system_loopback": "none", - "system_training": false, - "line_speed": 50000, - "line_fec": "rs", - "line_auto_neg": false, - "line_loopback": "none", - "line_training": false, - "line_media_type": "fiber", - "line_intf_type": "none", - "line_adver_speed": [], - "line_adver_fec": [], - "line_adver_auto_neg": false, - "line_adver_asym_pause": false, - "line_adver_media_type": "fiber" - }, - { - "index": 6, - "mdio_addr": "", - "system_speed": 100000, - "system_fec": "rs", - "system_auto_neg": false, - "system_loopback": "none", - "system_training": false, - "line_speed": 50000, - "line_fec": "rs", - "line_auto_neg": false, - "line_loopback": "none", - "line_training": false, - "line_media_type": "fiber", - "line_intf_type": "none", - "line_adver_speed": [], - "line_adver_fec": [], - "line_adver_auto_neg": false, - "line_adver_asym_pause": false, - "line_adver_media_type": "fiber" - } - ] -} diff --git a/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/phy4_config.json b/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/phy4_config.json deleted file mode 100644 index 66c3bf17297..00000000000 --- a/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/phy4_config.json +++ /dev/null @@ -1,59 +0,0 @@ -{ - "lanes": [ - { - "index": 200, - "local_lane_id": 0, - "system_side": true, - "tx_polarity": 0, - "rx_polarity": 0, - "line_tx_lanemap": 0, - "line_rx_lanemap": 0, - "line_to_system_lanemap": 0, - "mdio_addr": "" - } - ], - "ports": [ - { - "index": 7, - "mdio_addr": "", - "system_speed": 100000, - "system_fec": "rs", - "system_auto_neg": false, - "system_loopback": "none", - "system_training": false, - "line_speed": 50000, - "line_fec": "rs", - "line_auto_neg": false, - "line_loopback": "none", - "line_training": false, - "line_media_type": "fiber", - "line_intf_type": "none", - "line_adver_speed": [], - "line_adver_fec": [], - "line_adver_auto_neg": false, - "line_adver_asym_pause": false, - "line_adver_media_type": "fiber" - }, - { - "index": 8, - "mdio_addr": "", - "system_speed": 100000, - "system_fec": "rs", - "system_auto_neg": false, - "system_loopback": "none", - "system_training": false, - "line_speed": 50000, - "line_fec": "rs", - "line_auto_neg": false, - "line_loopback": "none", - "line_training": false, - "line_media_type": "fiber", - "line_intf_type": "none", - "line_adver_speed": [], - "line_adver_fec": [], - "line_adver_auto_neg": false, - "line_adver_asym_pause": false, - "line_adver_media_type": "fiber" - } - ] -} diff --git a/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/phy5_config.json b/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/phy5_config.json deleted file mode 100644 index bbcdad1d7fb..00000000000 --- a/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/phy5_config.json +++ /dev/null @@ -1,59 +0,0 @@ -{ - "lanes": [ - { - "index": 200, - "local_lane_id": 0, - "system_side": true, - "tx_polarity": 0, - "rx_polarity": 0, - "line_tx_lanemap": 0, - "line_rx_lanemap": 0, - "line_to_system_lanemap": 0, - "mdio_addr": "" - } - ], - "ports": [ - { - "index": 9, - "mdio_addr": "", - "system_speed": 100000, - "system_fec": "rs", - "system_auto_neg": false, - "system_loopback": "none", - "system_training": false, - "line_speed": 50000, - "line_fec": "rs", - "line_auto_neg": false, - "line_loopback": "none", - "line_training": false, - "line_media_type": "fiber", - "line_intf_type": "none", - "line_adver_speed": [], - "line_adver_fec": [], - "line_adver_auto_neg": false, - "line_adver_asym_pause": false, - "line_adver_media_type": "fiber" - }, - { - "index": 10, - "mdio_addr": "", - "system_speed": 100000, - "system_fec": "rs", - "system_auto_neg": false, - "system_loopback": "none", - "system_training": false, - "line_speed": 50000, - "line_fec": "rs", - "line_auto_neg": false, - "line_loopback": "none", - "line_training": false, - "line_media_type": "fiber", - "line_intf_type": "none", - "line_adver_speed": [], - "line_adver_fec": [], - "line_adver_auto_neg": false, - "line_adver_asym_pause": false, - "line_adver_media_type": "fiber" - } - ] -} diff --git a/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/phy6_config.json b/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/phy6_config.json deleted file mode 100644 index c15d0f25d0a..00000000000 --- a/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/phy6_config.json +++ /dev/null @@ -1,59 +0,0 @@ -{ - "lanes": [ - { - "index": 200, - "local_lane_id": 0, - "system_side": true, - "tx_polarity": 0, - "rx_polarity": 0, - "line_tx_lanemap": 0, - "line_rx_lanemap": 0, - "line_to_system_lanemap": 0, - "mdio_addr": "" - } - ], - "ports": [ - { - "index": 13, - "mdio_addr": "", - "system_speed": 100000, - "system_fec": "rs", - "system_auto_neg": false, - "system_loopback": "none", - "system_training": false, - "line_speed": 50000, - "line_fec": "rs", - "line_auto_neg": false, - "line_loopback": "none", - "line_training": false, - "line_media_type": "fiber", - "line_intf_type": "none", - "line_adver_speed": [], - "line_adver_fec": [], - "line_adver_auto_neg": false, - "line_adver_asym_pause": false, - "line_adver_media_type": "fiber" - }, - { - "index": 14, - "mdio_addr": "", - "system_speed": 100000, - "system_fec": "rs", - "system_auto_neg": false, - "system_loopback": "none", - "system_training": false, - "line_speed": 50000, - "line_fec": "rs", - "line_auto_neg": false, - "line_loopback": "none", - "line_training": false, - "line_media_type": "fiber", - "line_intf_type": "none", - "line_adver_speed": [], - "line_adver_fec": [], - "line_adver_auto_neg": false, - "line_adver_asym_pause": false, - "line_adver_media_type": "fiber" - } - ] -} diff --git a/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/phy7_config.json b/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/phy7_config.json deleted file mode 100644 index 440467a1219..00000000000 --- a/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/phy7_config.json +++ /dev/null @@ -1,59 +0,0 @@ -{ - "lanes": [ - { - "index": 200, - "local_lane_id": 0, - "system_side": true, - "tx_polarity": 0, - "rx_polarity": 0, - "line_tx_lanemap": 0, - "line_rx_lanemap": 0, - "line_to_system_lanemap": 0, - "mdio_addr": "" - } - ], - "ports": [ - { - "index": 11, - "mdio_addr": "", - "system_speed": 100000, - "system_fec": "rs", - "system_auto_neg": false, - "system_loopback": "none", - "system_training": false, - "line_speed": 50000, - "line_fec": "rs", - "line_auto_neg": false, - "line_loopback": "none", - "line_training": false, - "line_media_type": "fiber", - "line_intf_type": "none", - "line_adver_speed": [], - "line_adver_fec": [], - "line_adver_auto_neg": false, - "line_adver_asym_pause": false, - "line_adver_media_type": "fiber" - }, - { - "index": 12, - "mdio_addr": "", - "system_speed": 100000, - "system_fec": "rs", - "system_auto_neg": false, - "system_loopback": "none", - "system_training": false, - "line_speed": 50000, - "line_fec": "rs", - "line_auto_neg": false, - "line_loopback": "none", - "line_training": false, - "line_media_type": "fiber", - "line_intf_type": "none", - "line_adver_speed": [], - "line_adver_fec": [], - "line_adver_auto_neg": false, - "line_adver_asym_pause": false, - "line_adver_media_type": "fiber" - } - ] -} diff --git a/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/phy8_config.json b/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/phy8_config.json deleted file mode 100644 index d067bd371da..00000000000 --- a/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/phy8_config.json +++ /dev/null @@ -1,59 +0,0 @@ -{ - "lanes": [ - { - "index": 200, - "local_lane_id": 0, - "system_side": true, - "tx_polarity": 0, - "rx_polarity": 0, - "line_tx_lanemap": 0, - "line_rx_lanemap": 0, - "line_to_system_lanemap": 0, - "mdio_addr": "" - } - ], - "ports": [ - { - "index": 15, - "mdio_addr": "", - "system_speed": 100000, - "system_fec": "rs", - "system_auto_neg": false, - "system_loopback": "none", - "system_training": false, - "line_speed": 50000, - "line_fec": "rs", - "line_auto_neg": false, - "line_loopback": "none", - "line_training": false, - "line_media_type": "fiber", - "line_intf_type": "none", - "line_adver_speed": [], - "line_adver_fec": [], - "line_adver_auto_neg": false, - "line_adver_asym_pause": false, - "line_adver_media_type": "fiber" - }, - { - "index": 16, - "mdio_addr": "", - "system_speed": 100000, - "system_fec": "rs", - "system_auto_neg": false, - "system_loopback": "none", - "system_training": false, - "line_speed": 50000, - "line_fec": "rs", - "line_auto_neg": false, - "line_loopback": "none", - "line_training": false, - "line_media_type": "fiber", - "line_intf_type": "none", - "line_adver_speed": [], - "line_adver_fec": [], - "line_adver_auto_neg": false, - "line_adver_asym_pause": false, - "line_adver_media_type": "fiber" - } - ] -} diff --git a/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/phy9_config.json b/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/phy9_config.json deleted file mode 100644 index a10e9d2a547..00000000000 --- a/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/phy9_config.json +++ /dev/null @@ -1,59 +0,0 @@ -{ - "lanes": [ - { - "index": 200, - "local_lane_id": 0, - "system_side": true, - "tx_polarity": 0, - "rx_polarity": 0, - "line_tx_lanemap": 0, - "line_rx_lanemap": 0, - "line_to_system_lanemap": 0, - "mdio_addr": "" - } - ], - "ports": [ - { - "index": 49, - "mdio_addr": "", - "system_speed": 100000, - "system_fec": "rs", - "system_auto_neg": false, - "system_loopback": "none", - "system_training": false, - "line_speed": 50000, - "line_fec": "rs", - "line_auto_neg": false, - "line_loopback": "none", - "line_training": false, - "line_media_type": "fiber", - "line_intf_type": "none", - "line_adver_speed": [], - "line_adver_fec": [], - "line_adver_auto_neg": false, - "line_adver_asym_pause": false, - "line_adver_media_type": "fiber" - }, - { - "index": 50, - "mdio_addr": "", - "system_speed": 100000, - "system_fec": "rs", - "system_auto_neg": false, - "system_loopback": "none", - "system_training": false, - "line_speed": 50000, - "line_fec": "rs", - "line_auto_neg": false, - "line_loopback": "none", - "line_training": false, - "line_media_type": "fiber", - "line_intf_type": "none", - "line_adver_speed": [], - "line_adver_fec": [], - "line_adver_auto_neg": false, - "line_adver_asym_pause": false, - "line_adver_media_type": "fiber" - } - ] -} diff --git a/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/port_config.ini b/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/port_config.ini index bcc91ee4c5b..75c7de14b34 100644 --- a/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/port_config.ini +++ b/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/port_config.ini @@ -1,66 +1,66 @@ # name lanes alias index role speed asic_port_name core_id core_port_id num_voq Ethernet0 35,34,33,32 etp1 1 Ext 400000 Eth0 1 1 8 -Ethernet8 37,36,39,38 etp2 2 Ext 400000 Eth8 1 2 8 -Ethernet16 40,41,42,43 etp3 3 Ext 400000 Eth16 1 3 8 -Ethernet24 46,47,44,45 etp4 4 Ext 400000 Eth24 1 4 8 -Ethernet32 50,51,48,49 etp5 5 Ext 400000 Eth32 1 5 8 -Ethernet40 52,53,54,55 etp6 6 Ext 400000 Eth40 1 6 8 -Ethernet48 56,57,58,59 etp7 7 Ext 400000 Eth48 1 7 8 -Ethernet56 62,63,60,61 etp8 8 Ext 400000 Eth56 1 8 8 -Ethernet64 123,122,121,120 etp9 9 Ext 400000 Eth64 3 9 8 -Ethernet72 125,124,127,126 etp10 10 Ext 400000 Eth72 3 10 8 -Ethernet80 96,97,98,99 etp11 11 Ext 400000 Eth80 3 11 8 -Ethernet88 102,103,100,101 etp12 12 Ext 400000 Eth88 3 12 8 -Ethernet96 114,115,112,113 etp13 13 Ext 400000 Eth96 3 13 8 -Ethernet104 116,117,118,119 etp14 14 Ext 400000 Eth104 3 14 8 -Ethernet112 104,105,106,107 etp15 15 Ext 400000 Eth112 3 15 8 -Ethernet120 110,111,108,109 etp16 16 Ext 400000 Eth120 3 16 8 -Ethernet128 72,73,74,75 etp17 17 Ext 400000 Eth128 2 17 8 -Ethernet132 76,77,78,79 etp18 18 Ext 400000 Eth132 2 18 8 -Ethernet136 64,65,66,67 etp19 19 Ext 400000 Eth136 2 19 8 -Ethernet140 68,69,70,71 etp20 20 Ext 400000 Eth140 2 20 8 -Ethernet144 88,89,90,91 etp21 21 Ext 400000 Eth144 2 21 8 -Ethernet148 92,93,94,95 etp22 22 Ext 400000 Eth148 2 22 8 -Ethernet152 80,81,82,83 etp23 23 Ext 400000 Eth152 2 23 8 -Ethernet156 84,85,86,87 etp24 24 Ext 400000 Eth156 2 24 8 -Ethernet160 16,17,18,19 etp25 25 Ext 400000 Eth160 0 25 8 -Ethernet164 20,21,22,23 etp26 26 Ext 400000 Eth164 0 26 8 -Ethernet168 24,25,26,27 etp27 27 Ext 400000 Eth168 0 27 8 -Ethernet172 28,29,30,31 etp28 28 Ext 400000 Eth172 0 28 8 -Ethernet176 0,1,2,3 etp29 29 Ext 400000 Eth176 0 29 8 -Ethernet180 4,5,6,7 etp30 30 Ext 400000 Eth180 0 30 8 -Ethernet184 8,9,10,11 etp31 31 Ext 400000 Eth184 0 31 8 -Ethernet188 12,13,14,15 etp32 32 Ext 400000 Eth188 0 32 8 -Ethernet192 168,169,170,171 etp33 33 Ext 400000 Eth192 5 33 8 -Ethernet196 172,173,174,175 etp34 34 Ext 400000 Eth196 5 34 8 -Ethernet200 160,161,162,163 etp35 35 Ext 400000 Eth200 5 35 8 -Ethernet204 164,165,166,167 etp36 36 Ext 400000 Eth204 5 36 8 -Ethernet208 184,185,186,187 etp37 37 Ext 400000 Eth208 5 37 8 -Ethernet212 188,189,190,191 etp38 38 Ext 400000 Eth212 5 38 8 -Ethernet216 176,177,178,179 etp39 39 Ext 400000 Eth216 5 39 8 -Ethernet220 180,181,182,183 etp40 40 Ext 400000 Eth220 5 40 8 -Ethernet224 248,249,250,251 etp41 41 Ext 400000 Eth224 7 41 8 -Ethernet228 252,253,254,255 etp42 42 Ext 400000 Eth228 7 42 8 -Ethernet232 240,241,242,243 etp43 43 Ext 400000 Eth232 7 43 8 -Ethernet236 244,245,246,247 etp44 44 Ext 400000 Eth236 7 44 8 -Ethernet240 232,233,234,235 etp45 45 Ext 400000 Eth240 7 45 8 -Ethernet244 236,237,238,239 etp46 46 Ext 400000 Eth244 7 46 8 -Ethernet248 224,225,226,227 etp47 47 Ext 400000 Eth248 7 47 8 -Ethernet252 228,229,230,231 etp48 48 Ext 400000 Eth252 7 48 8 -Ethernet256 210,211,208,209 etp49 49 Ext 400000 Eth256 6 49 8 -Ethernet264 212,213,214,215 etp50 50 Ext 400000 Eth264 6 50 8 -Ethernet272 200,201,202,203 etp51 51 Ext 400000 Eth272 6 51 8 -Ethernet280 206,207,204,205 etp52 52 Ext 400000 Eth280 6 52 8 -Ethernet288 219,218,217,216 etp53 53 Ext 400000 Eth288 6 53 8 -Ethernet296 221,220,223,222 etp54 54 Ext 400000 Eth296 6 54 8 -Ethernet304 192,193,194,195 etp55 55 Ext 400000 Eth304 6 55 8 -Ethernet312 198,199,196,197 etp56 56 Ext 400000 Eth312 6 56 8 -Ethernet320 154,155,152,153 etp57 57 Ext 400000 Eth320 4 57 8 -Ethernet328 156,157,158,159 etp58 58 Ext 400000 Eth328 4 58 8 -Ethernet336 144,145,146,147 etp59 59 Ext 400000 Eth336 4 59 8 -Ethernet344 150,151,148,149 etp60 60 Ext 400000 Eth344 4 60 8 -Ethernet352 139,138,137,136 etp61 61 Ext 400000 Eth352 4 61 8 -Ethernet360 141,140,143,142 etp62 62 Ext 400000 Eth360 4 62 8 -Ethernet368 128,129,130,131 etp63 63 Ext 400000 Eth368 4 63 8 -Ethernet376 134,135,132,133 etp64 64 Ext 400000 Eth376 4 64 8 +Ethernet4 37,36,39,38 etp2 2 Ext 400000 Eth4 1 2 8 +Ethernet8 40,41,42,43 etp3 3 Ext 400000 Eth8 1 3 8 +Ethernet12 46,47,44,45 etp4 4 Ext 400000 Eth12 1 4 8 +Ethernet16 50,51,48,49 etp5 5 Ext 400000 Eth16 1 5 8 +Ethernet20 52,53,54,55 etp6 6 Ext 400000 Eth20 1 6 8 +Ethernet24 56,57,58,59 etp7 7 Ext 400000 Eth24 1 7 8 +Ethernet28 62,63,60,61 etp8 8 Ext 400000 Eth28 1 8 8 +Ethernet32 123,122,121,120 etp9 9 Ext 400000 Eth32 3 9 8 +Ethernet36 125,124,127,126 etp10 10 Ext 400000 Eth36 3 10 8 +Ethernet40 96,97,98,99 etp11 11 Ext 400000 Eth40 3 11 8 +Ethernet44 102,103,100,101 etp12 12 Ext 400000 Eth44 3 12 8 +Ethernet48 114,115,112,113 etp13 13 Ext 400000 Eth48 3 13 8 +Ethernet52 116,117,118,119 etp14 14 Ext 400000 Eth52 3 14 8 +Ethernet56 104,105,106,107 etp15 15 Ext 400000 Eth56 3 15 8 +Ethernet60 110,111,108,109 etp16 16 Ext 400000 Eth60 3 16 8 +Ethernet64 72,73,74,75 etp17 17 Ext 400000 Eth64 2 17 8 +Ethernet68 76,77,78,79 etp18 18 Ext 400000 Eth68 2 18 8 +Ethernet72 64,65,66,67 etp19 19 Ext 400000 Eth72 2 19 8 +Ethernet76 68,69,70,71 etp20 20 Ext 400000 Eth76 2 20 8 +Ethernet80 88,89,90,91 etp21 21 Ext 400000 Eth80 2 21 8 +Ethernet84 92,93,94,95 etp22 22 Ext 400000 Eth84 2 22 8 +Ethernet88 80,81,82,83 etp23 23 Ext 400000 Eth88 2 23 8 +Ethernet92 84,85,86,87 etp24 24 Ext 400000 Eth92 2 24 8 +Ethernet96 16,17,18,19 etp25 25 Ext 400000 Eth96 0 25 8 +Ethernet100 20,21,22,23 etp26 26 Ext 400000 Eth100 0 26 8 +Ethernet104 24,25,26,27 etp27 27 Ext 400000 Eth104 0 27 8 +Ethernet108 28,29,30,31 etp28 28 Ext 400000 Eth108 0 28 8 +Ethernet112 0,1,2,3 etp29 29 Ext 400000 Eth112 0 29 8 +Ethernet116 4,5,6,7 etp30 30 Ext 400000 Eth116 0 30 8 +Ethernet120 8,9,10,11 etp31 31 Ext 400000 Eth120 0 31 8 +Ethernet124 12,13,14,15 etp32 32 Ext 400000 Eth124 0 32 8 +Ethernet128 168,169,170,171 etp33 33 Ext 400000 Eth128 5 33 8 +Ethernet132 172,173,174,175 etp34 34 Ext 400000 Eth132 5 34 8 +Ethernet136 160,161,162,163 etp35 35 Ext 400000 Eth136 5 35 8 +Ethernet140 164,165,166,167 etp36 36 Ext 400000 Eth140 5 36 8 +Ethernet144 184,185,186,187 etp37 37 Ext 400000 Eth144 5 37 8 +Ethernet148 188,189,190,191 etp38 38 Ext 400000 Eth148 5 38 8 +Ethernet152 176,177,178,179 etp39 39 Ext 400000 Eth152 5 39 8 +Ethernet156 180,181,182,183 etp40 40 Ext 400000 Eth156 5 40 8 +Ethernet160 248,249,250,251 etp41 41 Ext 400000 Eth160 7 41 8 +Ethernet164 252,253,254,255 etp42 42 Ext 400000 Eth164 7 42 8 +Ethernet168 240,241,242,243 etp43 43 Ext 400000 Eth168 7 43 8 +Ethernet172 244,245,246,247 etp44 44 Ext 400000 Eth172 7 44 8 +Ethernet176 232,233,234,235 etp45 45 Ext 400000 Eth176 7 45 8 +Ethernet180 236,237,238,239 etp46 46 Ext 400000 Eth180 7 46 8 +Ethernet184 224,225,226,227 etp47 47 Ext 400000 Eth184 7 47 8 +Ethernet188 228,229,230,231 etp48 48 Ext 400000 Eth188 7 48 8 +Ethernet192 210,211,208,209 etp49 49 Ext 400000 Eth192 6 49 8 +Ethernet196 212,213,214,215 etp50 50 Ext 400000 Eth196 6 50 8 +Ethernet200 200,201,202,203 etp51 51 Ext 400000 Eth200 6 51 8 +Ethernet204 206,207,204,205 etp52 52 Ext 400000 Eth204 6 52 8 +Ethernet208 219,218,217,216 etp53 53 Ext 400000 Eth208 6 53 8 +Ethernet212 221,220,223,222 etp54 54 Ext 400000 Eth212 6 54 8 +Ethernet216 192,193,194,195 etp55 55 Ext 400000 Eth216 6 55 8 +Ethernet220 198,199,196,197 etp56 56 Ext 400000 Eth220 6 56 8 +Ethernet224 154,155,152,153 etp57 57 Ext 400000 Eth224 4 57 8 +Ethernet228 156,157,158,159 etp58 58 Ext 400000 Eth228 4 58 8 +Ethernet232 144,145,146,147 etp59 59 Ext 400000 Eth232 4 59 8 +Ethernet236 150,151,148,149 etp60 60 Ext 400000 Eth236 4 60 8 +Ethernet240 139,138,137,136 etp61 61 Ext 400000 Eth240 4 61 8 +Ethernet244 141,140,143,142 etp62 62 Ext 400000 Eth244 4 62 8 +Ethernet248 128,129,130,131 etp63 63 Ext 400000 Eth248 4 63 8 +Ethernet252 134,135,132,133 etp64 64 Ext 400000 Eth252 4 64 8 Ethernet-Rec0 280 Recirc0 65 Rec 800000 Rcy0 0 65 8 diff --git a/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/q3d-a7280R4-32QFx400G-32DFx400G.config.bcm b/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/q3d-a7280R4-32QFx400G-32DFx400G.config.bcm deleted file mode 100644 index 90d59abdc45..00000000000 --- a/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/q3d-a7280R4-32QFx400G-32DFx400G.config.bcm +++ /dev/null @@ -1,1274 +0,0 @@ -soc_family=BCM8887X -system_ref_core_clock_khz=1600000 - -dpp_db_path=/usr/share/bcm/db -sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc -#################################################### -##Reference applications related properties - Start -#################################################### - -## PMF small EXEM connected stage: -# Options: IPMF2 - Ingress PMF 2 stage can perform small EXEM lookups. -# IPMF3 - Ingress PMF 3 stage can perform small EXEM lookups. -## PMF small EXEM connected stage: -# Options: IPMF2 - Ingress PMF 2 stage can perform small EXEM lookups. -# IPMF3 - Ingress PMF 3 stage can perform small EXEM lookups. -pmf_sexem3_stage=IPMF2 - -#################################################### -##Reference applications related properties - End -#################################################### - -# HW mode to support 1024 16-member system wide LAGs -trunk_group_max_members=16 - -# Disable link-training -port_init_cl72=0 - -###Default interfaces -#CPU interfaces -ucode_port_0=CPU.0:core_0.0 -ucode_port_200=CPU.8:core_1.200 -ucode_port_201=CPU.16:core_0.201 -ucode_port_202=CPU.24:core_2.202 -ucode_port_203=CPU.32:core_3.203 -ucode_port_204=CPU.4:core_6.204 -ucode_port_205=CPU.12:core_7.205 -ucode_port_206=CPU.20:core_4.206 -ucode_port_207=CPU.28:core_5.207 - -#NIF ETH interfaces on device -ucode_port_1=CDGE4_8:core_1.1 -ucode_port_2=CDGE4_9:core_1.2 -ucode_port_3=CDGE4_10:core_1.3 -ucode_port_4=CDGE4_11:core_1.4 -ucode_port_5=CDGE4_12:core_1.5 -ucode_port_6=CDGE4_13:core_1.6 -ucode_port_7=CDGE4_14:core_1.7 -ucode_port_8=CDGE4_15:core_1.8 -ucode_port_9=CDGE4_30:core_3.9 -ucode_port_10=CDGE4_31:core_3.10 -ucode_port_11=CDGE4_24:core_3.11 -ucode_port_12=CDGE4_25:core_3.12 -ucode_port_13=CDGE4_28:core_3.13 -ucode_port_14=CDGE4_29:core_3.14 -ucode_port_15=CDGE4_26:core_3.15 -ucode_port_16=CDGE4_27:core_3.16 -ucode_port_17=CDGE4_18:core_2.17 -ucode_port_18=CDGE4_19:core_2.18 -ucode_port_19=CDGE4_16:core_2.19 -ucode_port_20=CDGE4_17:core_2.20 -ucode_port_21=CDGE4_22:core_2.21 -ucode_port_22=CDGE4_23:core_2.22 -ucode_port_23=CDGE4_20:core_2.23 -ucode_port_24=CDGE4_21:core_2.24 -ucode_port_25=CDGE4_4:core_0.25 -ucode_port_26=CDGE4_5:core_0.26 -ucode_port_27=CDGE4_6:core_0.27 -ucode_port_28=CDGE4_7:core_0.28 -ucode_port_29=CDGE4_0:core_0.29 -ucode_port_30=CDGE4_1:core_0.30 -ucode_port_31=CDGE4_2:core_0.31 -ucode_port_32=CDGE4_3:core_0.32 -ucode_port_33=CDGE4_42:core_5.33 -ucode_port_34=CDGE4_43:core_5.34 -ucode_port_35=CDGE4_40:core_5.35 -ucode_port_36=CDGE4_41:core_5.36 -ucode_port_37=CDGE4_46:core_5.37 -ucode_port_38=CDGE4_47:core_5.38 -ucode_port_39=CDGE4_44:core_5.39 -ucode_port_40=CDGE4_45:core_5.40 -ucode_port_41=CDGE4_62:core_7.41 -ucode_port_42=CDGE4_63:core_7.42 -ucode_port_43=CDGE4_60:core_7.43 -ucode_port_44=CDGE4_61:core_7.44 -ucode_port_45=CDGE4_58:core_7.45 -ucode_port_46=CDGE4_59:core_7.46 -ucode_port_47=CDGE4_56:core_7.47 -ucode_port_48=CDGE4_57:core_7.48 -ucode_port_49=CDGE4_52:core_6.49 -ucode_port_50=CDGE4_53:core_6.50 -ucode_port_51=CDGE4_50:core_6.51 -ucode_port_52=CDGE4_51:core_6.52 -ucode_port_53=CDGE4_54:core_6.53 -ucode_port_54=CDGE4_55:core_6.54 -ucode_port_55=CDGE4_48:core_6.55 -ucode_port_56=CDGE4_49:core_6.56 -ucode_port_57=CDGE4_38:core_4.57 -ucode_port_58=CDGE4_39:core_4.58 -ucode_port_59=CDGE4_36:core_4.59 -ucode_port_60=CDGE4_37:core_4.60 -ucode_port_61=CDGE4_34:core_4.61 -ucode_port_62=CDGE4_35:core_4.62 -ucode_port_63=CDGE4_32:core_4.63 -ucode_port_64=CDGE4_33:core_4.64 - -#NIF default speeds -port_init_speed_xe=25000 -port_init_speed_xl=40000 -port_init_speed_le=50000 -port_init_speed_ce=100000 -port_init_speed_cc=200000 -port_init_speed_cd=400000 -port_init_speed_d3c=800000 -port_init_speed_il=10312 - -port_priorities=8 -port_priorities_sch=8 -port_priorities_0=2 -port_priorities_200=2 -port_priorities_201=2 -port_priorities_202=2 -port_priorities_203=2 -port_priorities_204=2 -port_priorities_205=2 -port_priorities_206=2 -port_priorities_207=2 - -#special ports -ucode_port_240=OLP0:core_0.240 -ucode_port_241=OLP1:core_0.241 -ucode_port_244=OLP0:core_4.240 -ucode_port_245=OLP1:core_4.241 -tm_port_header_type_in_240=INJECTED_2 -tm_port_header_type_out_240=RAW -tm_port_header_type_in_241=INJECTED_2 -tm_port_header_type_out_241=RAW -tm_port_header_type_in_244=INJECTED_2 -tm_port_header_type_out_244=RAW -tm_port_header_type_in_245=INJECTED_2 -tm_port_header_type_out_245=RAW - -# NIF lane mapping -lane_to_serdes_map_nif_lane0=rx2:tx0 -lane_to_serdes_map_nif_lane1=rx0:tx3 -lane_to_serdes_map_nif_lane2=rx3:tx2 -lane_to_serdes_map_nif_lane3=rx1:tx1 -lane_to_serdes_map_nif_lane4=rx4:tx4 -lane_to_serdes_map_nif_lane5=rx5:tx6 -lane_to_serdes_map_nif_lane6=rx6:tx5 -lane_to_serdes_map_nif_lane7=rx7:tx7 -lane_to_serdes_map_nif_lane8=rx12:tx12 -lane_to_serdes_map_nif_lane9=rx13:tx15 -lane_to_serdes_map_nif_lane10=rx14:tx13 -lane_to_serdes_map_nif_lane11=rx15:tx14 -lane_to_serdes_map_nif_lane12=rx8:tx9 -lane_to_serdes_map_nif_lane13=rx9:tx11 -lane_to_serdes_map_nif_lane14=rx10:tx10 -lane_to_serdes_map_nif_lane15=rx11:tx8 -lane_to_serdes_map_nif_lane16=rx18:tx16 -lane_to_serdes_map_nif_lane17=rx16:tx19 -lane_to_serdes_map_nif_lane18=rx19:tx18 -lane_to_serdes_map_nif_lane19=rx17:tx17 -lane_to_serdes_map_nif_lane20=rx20:tx20 -lane_to_serdes_map_nif_lane21=rx21:tx22 -lane_to_serdes_map_nif_lane22=rx22:tx21 -lane_to_serdes_map_nif_lane23=rx23:tx23 -lane_to_serdes_map_nif_lane24=rx31:tx31 -lane_to_serdes_map_nif_lane25=rx30:tx28 -lane_to_serdes_map_nif_lane26=rx29:tx29 -lane_to_serdes_map_nif_lane27=rx28:tx30 -lane_to_serdes_map_nif_lane28=rx26:tx24 -lane_to_serdes_map_nif_lane29=rx25:tx27 -lane_to_serdes_map_nif_lane30=rx27:tx25 -lane_to_serdes_map_nif_lane31=rx24:tx26 -lane_to_serdes_map_nif_lane32=rx35:tx35 -lane_to_serdes_map_nif_lane33=rx37:tx36 -lane_to_serdes_map_nif_lane34=rx33:tx33 -lane_to_serdes_map_nif_lane35=rx32:tx38 -lane_to_serdes_map_nif_lane36=rx36:tx37 -lane_to_serdes_map_nif_lane37=rx38:tx32 -lane_to_serdes_map_nif_lane38=rx34:tx39 -lane_to_serdes_map_nif_lane39=rx39:tx34 -lane_to_serdes_map_nif_lane40=rx46:tx40 -lane_to_serdes_map_nif_lane41=rx44:tx45 -lane_to_serdes_map_nif_lane42=rx47:tx42 -lane_to_serdes_map_nif_lane43=rx42:tx47 -lane_to_serdes_map_nif_lane44=rx45:tx44 -lane_to_serdes_map_nif_lane45=rx43:tx43 -lane_to_serdes_map_nif_lane46=rx40:tx46 -lane_to_serdes_map_nif_lane47=rx41:tx41 -lane_to_serdes_map_nif_lane48=rx49:tx50 -lane_to_serdes_map_nif_lane49=rx52:tx48 -lane_to_serdes_map_nif_lane50=rx55:tx55 -lane_to_serdes_map_nif_lane51=rx53:tx53 -lane_to_serdes_map_nif_lane52=rx50:tx51 -lane_to_serdes_map_nif_lane53=rx51:tx49 -lane_to_serdes_map_nif_lane54=rx48:tx52 -lane_to_serdes_map_nif_lane55=rx54:tx54 -lane_to_serdes_map_nif_lane56=rx63:tx57 -lane_to_serdes_map_nif_lane57=rx61:tx58 -lane_to_serdes_map_nif_lane58=rx59:tx60 -lane_to_serdes_map_nif_lane59=rx58:tx59 -lane_to_serdes_map_nif_lane60=rx60:tx62 -lane_to_serdes_map_nif_lane61=rx62:tx61 -lane_to_serdes_map_nif_lane62=rx56:tx56 -lane_to_serdes_map_nif_lane63=rx57:tx63 -lane_to_serdes_map_nif_lane64=rx71:tx69 -lane_to_serdes_map_nif_lane65=rx68:tx70 -lane_to_serdes_map_nif_lane66=rx69:tx68 -lane_to_serdes_map_nif_lane67=rx70:tx71 -lane_to_serdes_map_nif_lane68=rx67:tx64 -lane_to_serdes_map_nif_lane69=rx64:tx67 -lane_to_serdes_map_nif_lane70=rx66:tx66 -lane_to_serdes_map_nif_lane71=rx65:tx65 -lane_to_serdes_map_nif_lane72=rx75:tx74 -lane_to_serdes_map_nif_lane73=rx73:tx73 -lane_to_serdes_map_nif_lane74=rx74:tx72 -lane_to_serdes_map_nif_lane75=rx72:tx75 -lane_to_serdes_map_nif_lane76=rx77:tx76 -lane_to_serdes_map_nif_lane77=rx76:tx79 -lane_to_serdes_map_nif_lane78=rx79:tx77 -lane_to_serdes_map_nif_lane79=rx78:tx78 -lane_to_serdes_map_nif_lane80=rx87:tx85 -lane_to_serdes_map_nif_lane81=rx84:tx86 -lane_to_serdes_map_nif_lane82=rx85:tx84 -lane_to_serdes_map_nif_lane83=rx86:tx87 -lane_to_serdes_map_nif_lane84=rx83:tx80 -lane_to_serdes_map_nif_lane85=rx80:tx83 -lane_to_serdes_map_nif_lane86=rx82:tx82 -lane_to_serdes_map_nif_lane87=rx81:tx81 -lane_to_serdes_map_nif_lane88=rx91:tx89 -lane_to_serdes_map_nif_lane89=rx89:tx88 -lane_to_serdes_map_nif_lane90=rx90:tx90 -lane_to_serdes_map_nif_lane91=rx88:tx91 -lane_to_serdes_map_nif_lane92=rx93:tx92 -lane_to_serdes_map_nif_lane93=rx92:tx95 -lane_to_serdes_map_nif_lane94=rx95:tx93 -lane_to_serdes_map_nif_lane95=rx94:tx94 -lane_to_serdes_map_nif_lane96=rx97:tx102 -lane_to_serdes_map_nif_lane97=rx103:tx96 -lane_to_serdes_map_nif_lane98=rx100:tx98 -lane_to_serdes_map_nif_lane99=rx96:tx103 -lane_to_serdes_map_nif_lane100=rx99:tx100 -lane_to_serdes_map_nif_lane101=rx101:tx99 -lane_to_serdes_map_nif_lane102=rx102:tx97 -lane_to_serdes_map_nif_lane103=rx98:tx101 -lane_to_serdes_map_nif_lane104=rx109:tx105 -lane_to_serdes_map_nif_lane105=rx111:tx104 -lane_to_serdes_map_nif_lane106=rx110:tx110 -lane_to_serdes_map_nif_lane107=rx107:tx108 -lane_to_serdes_map_nif_lane108=rx108:tx111 -lane_to_serdes_map_nif_lane109=rx106:tx107 -lane_to_serdes_map_nif_lane110=rx104:tx106 -lane_to_serdes_map_nif_lane111=rx105:tx109 -lane_to_serdes_map_nif_lane112=rx112:tx118 -lane_to_serdes_map_nif_lane113=rx117:tx113 -lane_to_serdes_map_nif_lane114=rx116:tx116 -lane_to_serdes_map_nif_lane115=rx118:tx112 -lane_to_serdes_map_nif_lane116=rx114:tx115 -lane_to_serdes_map_nif_lane117=rx115:tx117 -lane_to_serdes_map_nif_lane118=rx113:tx119 -lane_to_serdes_map_nif_lane119=rx119:tx114 -lane_to_serdes_map_nif_lane120=rx122:tx123 -lane_to_serdes_map_nif_lane121=rx124:tx127 -lane_to_serdes_map_nif_lane122=rx121:tx125 -lane_to_serdes_map_nif_lane123=rx120:tx122 -lane_to_serdes_map_nif_lane124=rx127:tx120 -lane_to_serdes_map_nif_lane125=rx125:tx121 -lane_to_serdes_map_nif_lane126=rx123:tx124 -lane_to_serdes_map_nif_lane127=rx126:tx126 -lane_to_serdes_map_nif_lane128=rx134:tx128 -lane_to_serdes_map_nif_lane129=rx132:tx132 -lane_to_serdes_map_nif_lane130=rx128:tx131 -lane_to_serdes_map_nif_lane131=rx130:tx135 -lane_to_serdes_map_nif_lane132=rx129:tx129 -lane_to_serdes_map_nif_lane133=rx131:tx130 -lane_to_serdes_map_nif_lane134=rx135:tx134 -lane_to_serdes_map_nif_lane135=rx133:tx133 -lane_to_serdes_map_nif_lane136=rx139:tx138 -lane_to_serdes_map_nif_lane137=rx137:tx137 -lane_to_serdes_map_nif_lane138=rx141:tx141 -lane_to_serdes_map_nif_lane139=rx143:tx142 -lane_to_serdes_map_nif_lane140=rx140:tx140 -lane_to_serdes_map_nif_lane141=rx142:tx136 -lane_to_serdes_map_nif_lane142=rx138:tx143 -lane_to_serdes_map_nif_lane143=rx136:tx139 -lane_to_serdes_map_nif_lane144=rx150:tx144 -lane_to_serdes_map_nif_lane145=rx148:tx148 -lane_to_serdes_map_nif_lane146=rx144:tx147 -lane_to_serdes_map_nif_lane147=rx146:tx151 -lane_to_serdes_map_nif_lane148=rx145:tx145 -lane_to_serdes_map_nif_lane149=rx147:tx146 -lane_to_serdes_map_nif_lane150=rx151:tx150 -lane_to_serdes_map_nif_lane151=rx149:tx149 -lane_to_serdes_map_nif_lane152=rx153:tx158 -lane_to_serdes_map_nif_lane153=rx159:tx153 -lane_to_serdes_map_nif_lane154=rx156:tx156 -lane_to_serdes_map_nif_lane155=rx158:tx152 -lane_to_serdes_map_nif_lane156=rx154:tx155 -lane_to_serdes_map_nif_lane157=rx155:tx157 -lane_to_serdes_map_nif_lane158=rx152:tx159 -lane_to_serdes_map_nif_lane159=rx157:tx154 -lane_to_serdes_map_nif_lane160=rx164:tx165 -lane_to_serdes_map_nif_lane161=rx165:tx167 -lane_to_serdes_map_nif_lane162=rx166:tx164 -lane_to_serdes_map_nif_lane163=rx167:tx166 -lane_to_serdes_map_nif_lane164=rx162:tx163 -lane_to_serdes_map_nif_lane165=rx161:tx162 -lane_to_serdes_map_nif_lane166=rx163:tx161 -lane_to_serdes_map_nif_lane167=rx160:tx160 -lane_to_serdes_map_nif_lane168=rx170:tx168 -lane_to_serdes_map_nif_lane169=rx168:tx169 -lane_to_serdes_map_nif_lane170=rx171:tx170 -lane_to_serdes_map_nif_lane171=rx169:tx171 -lane_to_serdes_map_nif_lane172=rx174:tx173 -lane_to_serdes_map_nif_lane173=rx173:tx174 -lane_to_serdes_map_nif_lane174=rx172:tx172 -lane_to_serdes_map_nif_lane175=rx175:tx175 -lane_to_serdes_map_nif_lane176=rx180:tx181 -lane_to_serdes_map_nif_lane177=rx181:tx183 -lane_to_serdes_map_nif_lane178=rx182:tx180 -lane_to_serdes_map_nif_lane179=rx183:tx182 -lane_to_serdes_map_nif_lane180=rx178:tx179 -lane_to_serdes_map_nif_lane181=rx177:tx178 -lane_to_serdes_map_nif_lane182=rx179:tx177 -lane_to_serdes_map_nif_lane183=rx176:tx176 -lane_to_serdes_map_nif_lane184=rx187:tx186 -lane_to_serdes_map_nif_lane185=rx185:tx185 -lane_to_serdes_map_nif_lane186=rx186:tx184 -lane_to_serdes_map_nif_lane187=rx184:tx187 -lane_to_serdes_map_nif_lane188=rx189:tx188 -lane_to_serdes_map_nif_lane189=rx188:tx191 -lane_to_serdes_map_nif_lane190=rx191:tx189 -lane_to_serdes_map_nif_lane191=rx190:tx190 -lane_to_serdes_map_nif_lane192=rx199:tx193 -lane_to_serdes_map_nif_lane193=rx197:tx194 -lane_to_serdes_map_nif_lane194=rx195:tx196 -lane_to_serdes_map_nif_lane195=rx194:tx195 -lane_to_serdes_map_nif_lane196=rx196:tx198 -lane_to_serdes_map_nif_lane197=rx198:tx197 -lane_to_serdes_map_nif_lane198=rx192:tx192 -lane_to_serdes_map_nif_lane199=rx193:tx199 -lane_to_serdes_map_nif_lane200=rx207:tx201 -lane_to_serdes_map_nif_lane201=rx205:tx202 -lane_to_serdes_map_nif_lane202=rx203:tx204 -lane_to_serdes_map_nif_lane203=rx202:tx203 -lane_to_serdes_map_nif_lane204=rx204:tx206 -lane_to_serdes_map_nif_lane205=rx206:tx205 -lane_to_serdes_map_nif_lane206=rx200:tx200 -lane_to_serdes_map_nif_lane207=rx201:tx207 -lane_to_serdes_map_nif_lane208=rx208:tx212 -lane_to_serdes_map_nif_lane209=rx209:tx209 -lane_to_serdes_map_nif_lane210=rx212:tx210 -lane_to_serdes_map_nif_lane211=rx214:tx211 -lane_to_serdes_map_nif_lane212=rx210:tx213 -lane_to_serdes_map_nif_lane213=rx211:tx208 -lane_to_serdes_map_nif_lane214=rx213:tx214 -lane_to_serdes_map_nif_lane215=rx215:tx215 -lane_to_serdes_map_nif_lane216=rx222:tx221 -lane_to_serdes_map_nif_lane217=rx220:tx222 -lane_to_serdes_map_nif_lane218=rx217:tx223 -lane_to_serdes_map_nif_lane219=rx216:tx216 -lane_to_serdes_map_nif_lane220=rx221:tx218 -lane_to_serdes_map_nif_lane221=rx223:tx217 -lane_to_serdes_map_nif_lane222=rx218:tx219 -lane_to_serdes_map_nif_lane223=rx219:tx220 -lane_to_serdes_map_nif_lane224=rx231:tx230 -lane_to_serdes_map_nif_lane225=rx229:tx231 -lane_to_serdes_map_nif_lane226=rx230:tx228 -lane_to_serdes_map_nif_lane227=rx228:tx229 -lane_to_serdes_map_nif_lane228=rx226:tx225 -lane_to_serdes_map_nif_lane229=rx225:tx226 -lane_to_serdes_map_nif_lane230=rx224:tx224 -lane_to_serdes_map_nif_lane231=rx227:tx227 -lane_to_serdes_map_nif_lane232=rx234:tx233 -lane_to_serdes_map_nif_lane233=rx232:tx234 -lane_to_serdes_map_nif_lane234=rx235:tx232 -lane_to_serdes_map_nif_lane235=rx233:tx235 -lane_to_serdes_map_nif_lane236=rx237:tx239 -lane_to_serdes_map_nif_lane237=rx238:tx237 -lane_to_serdes_map_nif_lane238=rx239:tx238 -lane_to_serdes_map_nif_lane239=rx236:tx236 -lane_to_serdes_map_nif_lane240=rx247:tx247 -lane_to_serdes_map_nif_lane241=rx246:tx244 -lane_to_serdes_map_nif_lane242=rx245:tx245 -lane_to_serdes_map_nif_lane243=rx244:tx246 -lane_to_serdes_map_nif_lane244=rx242:tx240 -lane_to_serdes_map_nif_lane245=rx241:tx243 -lane_to_serdes_map_nif_lane246=rx243:tx241 -lane_to_serdes_map_nif_lane247=rx240:tx242 -lane_to_serdes_map_nif_lane248=rx250:tx249 -lane_to_serdes_map_nif_lane249=rx248:tx250 -lane_to_serdes_map_nif_lane250=rx251:tx248 -lane_to_serdes_map_nif_lane251=rx249:tx251 -lane_to_serdes_map_nif_lane252=rx253:tx255 -lane_to_serdes_map_nif_lane253=rx254:tx253 -lane_to_serdes_map_nif_lane254=rx255:tx254 -lane_to_serdes_map_nif_lane255=rx252:tx252 - -######################### -### High Availability ### -######################### - -sw_state_max_size=750000000 - -#location of warmboot NV memory -#Allowed options for dnx are - 3:external storage in filesystem 4:driver will save the state directly in shared memory -stable_location=4 - -# Note that each unit should have a unique filename and that adapter does not play well with tmp and dev/shm folders. -stable_filename=/dev/shm/warmboot_data_0 -stable_filename.1=/dev/shm/warmboot_data_1 -stable_filename.2=/dev/shm/warmboot_data_2 - -#Maximum size for NVM used for WB storage, must be larger than sw_state_max_size.BCM8885X -stable_size=800000000 - -######################### -######################### -######################### - -tm_port_header_type_in_0=INJECTED -tm_port_header_type_out_0=CPU - -tm_port_header_type_in_200=INJECTED -tm_port_header_type_out_200=ETH -tm_port_header_type_in_201=INJECTED -tm_port_header_type_out_201=ETH -tm_port_header_type_in_202=INJECTED -tm_port_header_type_out_202=ETH -tm_port_header_type_in_203=INJECTED -tm_port_header_type_out_203=ETH -tm_port_header_type_in_204=INJECTED -tm_port_header_type_out_204=ETH -tm_port_header_type_in_205=INJECTED -tm_port_header_type_out_205=ETH -tm_port_header_type_in_206=INJECTED -tm_port_header_type_out_206=ETH -tm_port_header_type_in_207=INJECTED -tm_port_header_type_out_207=ETH - - -### RCY -sai_recycle_port_lane_base=215 -ucode_port_65=RCY0:core_0.65 -tm_port_header_type_out_65=ETH -tm_port_header_type_in_65=ETH -port_init_speed_65=800000 -appl_param_rcy_mirror_ports_range=100-164 -ucode_port_100=RCY_MIRROR.0:core_0.100 -ucode_port_101=RCY_MIRROR.1:core_1.101 -ucode_port_102=RCY_MIRROR.2:core_1.102 -ucode_port_103=RCY_MIRROR.3:core_1.103 -ucode_port_104=RCY_MIRROR.4:core_1.104 -ucode_port_105=RCY_MIRROR.5:core_1.105 -ucode_port_106=RCY_MIRROR.6:core_1.106 -ucode_port_107=RCY_MIRROR.7:core_1.107 -ucode_port_108=RCY_MIRROR.8:core_1.108 -ucode_port_109=RCY_MIRROR.9:core_3.109 -ucode_port_110=RCY_MIRROR.10:core_3.110 -ucode_port_111=RCY_MIRROR.11:core_3.111 -ucode_port_112=RCY_MIRROR.12:core_3.112 -ucode_port_113=RCY_MIRROR.13:core_3.113 -ucode_port_114=RCY_MIRROR.14:core_3.114 -ucode_port_115=RCY_MIRROR.15:core_3.115 -ucode_port_116=RCY_MIRROR.16:core_3.116 -ucode_port_117=RCY_MIRROR.17:core_2.117 -ucode_port_118=RCY_MIRROR.18:core_2.118 -ucode_port_119=RCY_MIRROR.19:core_2.119 -ucode_port_120=RCY_MIRROR.20:core_2.120 -ucode_port_121=RCY_MIRROR.21:core_2.121 -ucode_port_122=RCY_MIRROR.22:core_2.122 -ucode_port_123=RCY_MIRROR.23:core_2.123 -ucode_port_124=RCY_MIRROR.24:core_2.124 -ucode_port_125=RCY_MIRROR.25:core_0.125 -ucode_port_126=RCY_MIRROR.26:core_0.126 -ucode_port_127=RCY_MIRROR.27:core_0.127 -ucode_port_128=RCY_MIRROR.28:core_0.128 -ucode_port_129=RCY_MIRROR.29:core_0.129 -ucode_port_130=RCY_MIRROR.30:core_0.130 -ucode_port_131=RCY_MIRROR.31:core_0.131 -ucode_port_132=RCY_MIRROR.32:core_0.132 -ucode_port_133=RCY_MIRROR.33:core_5.133 -ucode_port_134=RCY_MIRROR.34:core_5.134 -ucode_port_135=RCY_MIRROR.35:core_5.135 -ucode_port_136=RCY_MIRROR.36:core_5.136 -ucode_port_137=RCY_MIRROR.37:core_5.137 -ucode_port_138=RCY_MIRROR.38:core_5.138 -ucode_port_139=RCY_MIRROR.39:core_5.139 -ucode_port_140=RCY_MIRROR.40:core_5.140 -ucode_port_141=RCY_MIRROR.41:core_7.141 -ucode_port_142=RCY_MIRROR.42:core_7.142 -ucode_port_143=RCY_MIRROR.43:core_7.143 -ucode_port_144=RCY_MIRROR.44:core_7.144 -ucode_port_145=RCY_MIRROR.45:core_7.145 -ucode_port_146=RCY_MIRROR.46:core_7.146 -ucode_port_147=RCY_MIRROR.47:core_7.147 -ucode_port_148=RCY_MIRROR.48:core_7.148 -ucode_port_149=RCY_MIRROR.49:core_6.149 -ucode_port_150=RCY_MIRROR.50:core_6.150 -ucode_port_151=RCY_MIRROR.51:core_6.151 -ucode_port_152=RCY_MIRROR.52:core_6.152 -ucode_port_153=RCY_MIRROR.53:core_6.153 -ucode_port_154=RCY_MIRROR.54:core_6.154 -ucode_port_155=RCY_MIRROR.55:core_6.155 -ucode_port_156=RCY_MIRROR.56:core_6.156 -ucode_port_157=RCY_MIRROR.57:core_4.157 -ucode_port_158=RCY_MIRROR.58:core_4.158 -ucode_port_159=RCY_MIRROR.59:core_4.159 -ucode_port_160=RCY_MIRROR.60:core_4.160 -ucode_port_161=RCY_MIRROR.61:core_4.161 -ucode_port_162=RCY_MIRROR.62:core_4.162 -ucode_port_163=RCY_MIRROR.63:core_4.163 -ucode_port_164=RCY_MIRROR.64:core_4.164 -rcy_mirror_to_forward_port_map_100=0 -rcy_mirror_to_forward_port_map_101=1 -rcy_mirror_to_forward_port_map_102=2 -rcy_mirror_to_forward_port_map_103=3 -rcy_mirror_to_forward_port_map_104=4 -rcy_mirror_to_forward_port_map_105=5 -rcy_mirror_to_forward_port_map_106=6 -rcy_mirror_to_forward_port_map_107=7 -rcy_mirror_to_forward_port_map_108=8 -rcy_mirror_to_forward_port_map_109=9 -rcy_mirror_to_forward_port_map_110=10 -rcy_mirror_to_forward_port_map_111=11 -rcy_mirror_to_forward_port_map_112=12 -rcy_mirror_to_forward_port_map_113=13 -rcy_mirror_to_forward_port_map_114=14 -rcy_mirror_to_forward_port_map_115=15 -rcy_mirror_to_forward_port_map_116=16 -rcy_mirror_to_forward_port_map_117=17 -rcy_mirror_to_forward_port_map_118=18 -rcy_mirror_to_forward_port_map_119=19 -rcy_mirror_to_forward_port_map_120=20 -rcy_mirror_to_forward_port_map_121=21 -rcy_mirror_to_forward_port_map_122=22 -rcy_mirror_to_forward_port_map_123=23 -rcy_mirror_to_forward_port_map_124=24 -rcy_mirror_to_forward_port_map_125=25 -rcy_mirror_to_forward_port_map_126=26 -rcy_mirror_to_forward_port_map_127=27 -rcy_mirror_to_forward_port_map_128=28 -rcy_mirror_to_forward_port_map_129=29 -rcy_mirror_to_forward_port_map_130=30 -rcy_mirror_to_forward_port_map_131=31 -rcy_mirror_to_forward_port_map_132=32 -rcy_mirror_to_forward_port_map_133=33 -rcy_mirror_to_forward_port_map_134=34 -rcy_mirror_to_forward_port_map_135=35 -rcy_mirror_to_forward_port_map_136=36 -rcy_mirror_to_forward_port_map_137=37 -rcy_mirror_to_forward_port_map_138=38 -rcy_mirror_to_forward_port_map_139=39 -rcy_mirror_to_forward_port_map_140=40 -rcy_mirror_to_forward_port_map_141=41 -rcy_mirror_to_forward_port_map_142=42 -rcy_mirror_to_forward_port_map_143=43 -rcy_mirror_to_forward_port_map_144=44 -rcy_mirror_to_forward_port_map_145=45 -rcy_mirror_to_forward_port_map_146=46 -rcy_mirror_to_forward_port_map_147=47 -rcy_mirror_to_forward_port_map_148=48 -rcy_mirror_to_forward_port_map_149=49 -rcy_mirror_to_forward_port_map_150=50 -rcy_mirror_to_forward_port_map_151=51 -rcy_mirror_to_forward_port_map_152=52 -rcy_mirror_to_forward_port_map_153=53 -rcy_mirror_to_forward_port_map_154=54 -rcy_mirror_to_forward_port_map_155=55 -rcy_mirror_to_forward_port_map_156=56 -rcy_mirror_to_forward_port_map_157=57 -rcy_mirror_to_forward_port_map_158=58 -rcy_mirror_to_forward_port_map_159=59 -rcy_mirror_to_forward_port_map_160=60 -rcy_mirror_to_forward_port_map_161=61 -rcy_mirror_to_forward_port_map_162=62 -rcy_mirror_to_forward_port_map_163=63 -rcy_mirror_to_forward_port_map_164=64 - -# Set statically the region mode per region id -dtm_flow_mapping_mode_region_257=3 -dtm_flow_mapping_mode_region_258=3 -dtm_flow_mapping_mode_region_259=3 -dtm_flow_mapping_mode_region_260=3 -dtm_flow_mapping_mode_region_261=3 -dtm_flow_mapping_mode_region_262=3 -dtm_flow_mapping_mode_region_263=3 -dtm_flow_mapping_mode_region_264=3 -dtm_flow_mapping_mode_region_265=3 -dtm_flow_mapping_mode_region_266=7 -dtm_flow_mapping_mode_region_267=3 -dtm_flow_mapping_mode_region_268=3 -dtm_flow_mapping_mode_region_269=3 -dtm_flow_mapping_mode_region_270=3 -dtm_flow_mapping_mode_region_271=3 -dtm_flow_mapping_mode_region_272=3 -dtm_flow_mapping_mode_region_273=3 -dtm_flow_mapping_mode_region_274=3 -dtm_flow_mapping_mode_region_275=3 -dtm_flow_mapping_mode_region_276=3 -dtm_flow_mapping_mode_region_277=3 -dtm_flow_mapping_mode_region_278=3 -dtm_flow_mapping_mode_region_279=3 -dtm_flow_mapping_mode_region_280=3 -dtm_flow_mapping_mode_region_281=3 -dtm_flow_mapping_mode_region_282=3 -dtm_flow_mapping_mode_region_283=3 -dtm_flow_mapping_mode_region_284=3 -dtm_flow_mapping_mode_region_285=3 -dtm_flow_mapping_mode_region_286=3 -dtm_flow_mapping_mode_region_287=3 - -## Configure number of symmetric cores each region supports ## -dtm_flow_nof_remote_cores_region_1=2 -dtm_flow_nof_remote_cores_region_2=2 -dtm_flow_nof_remote_cores_region_3=2 -dtm_flow_nof_remote_cores_region_4=2 -dtm_flow_nof_remote_cores_region_5=2 -dtm_flow_nof_remote_cores_region_6=2 -dtm_flow_nof_remote_cores_region_7=2 -dtm_flow_nof_remote_cores_region_8=2 -dtm_flow_nof_remote_cores_region_9=2 -dtm_flow_nof_remote_cores_region_10=2 -dtm_flow_nof_remote_cores_region_11=2 -dtm_flow_nof_remote_cores_region_12=2 -dtm_flow_nof_remote_cores_region_13=2 -dtm_flow_nof_remote_cores_region_14=2 -dtm_flow_nof_remote_cores_region_15=2 -dtm_flow_nof_remote_cores_region_16=2 -dtm_flow_nof_remote_cores_region_17=2 -dtm_flow_nof_remote_cores_region_18=2 -dtm_flow_nof_remote_cores_region_19=2 -dtm_flow_nof_remote_cores_region_20=2 -dtm_flow_nof_remote_cores_region_21=2 -dtm_flow_nof_remote_cores_region_22=2 -dtm_flow_nof_remote_cores_region_23=2 -dtm_flow_nof_remote_cores_region_24=2 -dtm_flow_nof_remote_cores_region_25=2 -dtm_flow_nof_remote_cores_region_26=2 -dtm_flow_nof_remote_cores_region_27=2 -dtm_flow_nof_remote_cores_region_28=2 -dtm_flow_nof_remote_cores_region_29=2 -dtm_flow_nof_remote_cores_region_30=2 -dtm_flow_nof_remote_cores_region_31=2 -dtm_flow_nof_remote_cores_region_32=2 -dtm_flow_nof_remote_cores_region_33=2 -dtm_flow_nof_remote_cores_region_34=2 -dtm_flow_nof_remote_cores_region_35=2 -dtm_flow_nof_remote_cores_region_36=2 -dtm_flow_nof_remote_cores_region_37=2 -dtm_flow_nof_remote_cores_region_38=2 -dtm_flow_nof_remote_cores_region_39=2 -dtm_flow_nof_remote_cores_region_40=2 -dtm_flow_nof_remote_cores_region_41=2 -dtm_flow_nof_remote_cores_region_42=2 -dtm_flow_nof_remote_cores_region_43=2 -dtm_flow_nof_remote_cores_region_44=2 -dtm_flow_nof_remote_cores_region_45=2 -dtm_flow_nof_remote_cores_region_46=2 -dtm_flow_nof_remote_cores_region_47=2 -dtm_flow_nof_remote_cores_region_48=2 -dtm_flow_nof_remote_cores_region_49=2 -dtm_flow_nof_remote_cores_region_50=2 -dtm_flow_nof_remote_cores_region_51=2 -dtm_flow_nof_remote_cores_region_52=2 -dtm_flow_nof_remote_cores_region_53=2 -dtm_flow_nof_remote_cores_region_54=2 -dtm_flow_nof_remote_cores_region_55=2 -dtm_flow_nof_remote_cores_region_56=2 -dtm_flow_nof_remote_cores_region_57=2 -dtm_flow_nof_remote_cores_region_58=2 -dtm_flow_nof_remote_cores_region_59=2 -dtm_flow_nof_remote_cores_region_60=2 - -### MDB configuration ### -mdb_profile=Elastic-Balanced - -### Descriptor-DMA configuration ### -dma_desc_aggregator_chain_length_max=1000 -dma_desc_aggregator_buff_size_kb=100 -dma_desc_aggregator_timeout_usec=1000 -dma_desc_aggregator_enable_specific_MDB_LPM=1 -dma_desc_aggregator_enable_specific_MDB_FEC=1 - -### Outlif configuarion ### -outlif_logical_to_physical_phase_map_1=S1 -outlif_logical_to_physical_phase_map_2=L1 -outlif_logical_to_physical_phase_map_3=XL -outlif_logical_to_physical_phase_map_4=L2 -outlif_logical_to_physical_phase_map_5=M1 -outlif_logical_to_physical_phase_map_6=M2 -outlif_logical_to_physical_phase_map_7=M3 -outlif_logical_to_physical_phase_map_8=S2 - -### Outlif data granularity configuration ### -outlif_physical_phase_data_granularity_S1=60 -outlif_physical_phase_data_granularity_S2=60 -outlif_physical_phase_data_granularity_M1=60 -outlif_physical_phase_data_granularity_M2=60 -outlif_physical_phase_data_granularity_M3=60 -outlif_physical_phase_data_granularity_L1=60 -outlif_physical_phase_data_granularity_L2=60 -outlif_physical_phase_data_granularity_XL=60 - -## Fabric transmission mode -# Set the Connect mode to the Fabric -# Options: FE - presence of a Fabric device (single stage) -# SINGLE_FAP - stand-alone device -# MESH - devices in Mesh -# Note: If 'diag_chassis' is on, value will be override in dnx.soc -# to be FE instead of SINGLE_FAP. -fabric_connect_mode=SINGLE_FAP - -# -##Protocol trap look-up mode: -# Options: IN_LIF - Look-ups in the profile table are done by IN-LIF -# IN_PORT - Look-ups in the profile table are done by IN-PORT -protocol_traps_mode=IN_LIF - -# access definitions -schan_intr_enable=0 -tdma_intr_enable=0 -tslam_intr_enable=0 -miim_intr_enable=0 -schan_timeout_usec=300000 -tdma_timeout_usec=1000000 -tslam_timeout_usec=1000000 - -### Interrupts -appl_enable_intr_init=1 -polled_irq_mode=0 -# reduce CPU load, configure delay 100ms -polled_irq_delay=1000 - -# reduce the CPU load over adapter (caused by counter thread) -bcm_stat_interval=1000000 - -# shadow memory -mem_cache_enable_ecc=1 -mem_cache_enable_parity=1 - -# serdes_nif/fabric_clk_freq_in/out configuration -serdes_nif_clk_freq_in=2 -serdes_nif_clk_freq_out=1 -serdes_fabric_clk_freq_in=2 -serdes_fabric_clk_freq_out=1 - -dport_map_direct=1 - -rif_id_max=0x2000 - -# Port Polarity -phy_rx_polarity_flip_phy0=1 -phy_tx_polarity_flip_phy0=1 -phy_rx_polarity_flip_phy1=1 -phy_tx_polarity_flip_phy1=1 -phy_rx_polarity_flip_phy2=0 -phy_tx_polarity_flip_phy2=1 -phy_rx_polarity_flip_phy3=1 -phy_tx_polarity_flip_phy3=0 -phy_rx_polarity_flip_phy4=0 -phy_tx_polarity_flip_phy4=1 -phy_rx_polarity_flip_phy5=0 -phy_tx_polarity_flip_phy5=0 -phy_rx_polarity_flip_phy6=0 -phy_tx_polarity_flip_phy6=1 -phy_rx_polarity_flip_phy7=0 -phy_tx_polarity_flip_phy7=1 -phy_rx_polarity_flip_phy8=1 -phy_tx_polarity_flip_phy8=0 -phy_rx_polarity_flip_phy9=1 -phy_tx_polarity_flip_phy9=0 -phy_rx_polarity_flip_phy10=1 -phy_tx_polarity_flip_phy10=0 -phy_rx_polarity_flip_phy11=1 -phy_tx_polarity_flip_phy11=1 -phy_rx_polarity_flip_phy12=1 -phy_tx_polarity_flip_phy12=1 -phy_rx_polarity_flip_phy13=0 -phy_tx_polarity_flip_phy13=0 -phy_rx_polarity_flip_phy14=0 -phy_tx_polarity_flip_phy14=0 -phy_rx_polarity_flip_phy15=1 -phy_tx_polarity_flip_phy15=0 -phy_rx_polarity_flip_phy16=1 -phy_tx_polarity_flip_phy16=1 -phy_rx_polarity_flip_phy17=1 -phy_tx_polarity_flip_phy17=1 -phy_rx_polarity_flip_phy18=0 -phy_tx_polarity_flip_phy18=1 -phy_rx_polarity_flip_phy19=1 -phy_tx_polarity_flip_phy19=0 -phy_rx_polarity_flip_phy20=0 -phy_tx_polarity_flip_phy20=1 -phy_rx_polarity_flip_phy21=0 -phy_tx_polarity_flip_phy21=0 -phy_rx_polarity_flip_phy22=0 -phy_tx_polarity_flip_phy22=1 -phy_rx_polarity_flip_phy23=0 -phy_tx_polarity_flip_phy23=1 -phy_rx_polarity_flip_phy24=0 -phy_tx_polarity_flip_phy24=1 -phy_rx_polarity_flip_phy25=0 -phy_tx_polarity_flip_phy25=1 -phy_rx_polarity_flip_phy26=0 -phy_tx_polarity_flip_phy26=0 -phy_rx_polarity_flip_phy27=0 -phy_tx_polarity_flip_phy27=1 -phy_rx_polarity_flip_phy28=1 -phy_tx_polarity_flip_phy28=0 -phy_rx_polarity_flip_phy29=0 -phy_tx_polarity_flip_phy29=0 -phy_rx_polarity_flip_phy30=1 -phy_tx_polarity_flip_phy30=1 -phy_rx_polarity_flip_phy31=1 -phy_tx_polarity_flip_phy31=1 -phy_rx_polarity_flip_phy32=0 -phy_tx_polarity_flip_phy32=0 -phy_rx_polarity_flip_phy33=0 -phy_tx_polarity_flip_phy33=0 -phy_rx_polarity_flip_phy34=1 -phy_tx_polarity_flip_phy34=1 -phy_rx_polarity_flip_phy35=1 -phy_tx_polarity_flip_phy35=0 -phy_rx_polarity_flip_phy36=0 -phy_tx_polarity_flip_phy36=0 -phy_rx_polarity_flip_phy37=1 -phy_tx_polarity_flip_phy37=0 -phy_rx_polarity_flip_phy38=0 -phy_tx_polarity_flip_phy38=1 -phy_rx_polarity_flip_phy39=1 -phy_tx_polarity_flip_phy39=1 -phy_rx_polarity_flip_phy40=1 -phy_tx_polarity_flip_phy40=0 -phy_rx_polarity_flip_phy41=0 -phy_tx_polarity_flip_phy41=0 -phy_rx_polarity_flip_phy42=1 -phy_tx_polarity_flip_phy42=1 -phy_rx_polarity_flip_phy43=0 -phy_tx_polarity_flip_phy43=1 -phy_rx_polarity_flip_phy44=0 -phy_tx_polarity_flip_phy44=0 -phy_rx_polarity_flip_phy45=0 -phy_tx_polarity_flip_phy45=0 -phy_rx_polarity_flip_phy46=1 -phy_tx_polarity_flip_phy46=0 -phy_rx_polarity_flip_phy47=1 -phy_tx_polarity_flip_phy47=1 -phy_rx_polarity_flip_phy48=1 -phy_tx_polarity_flip_phy48=1 -phy_rx_polarity_flip_phy49=0 -phy_tx_polarity_flip_phy49=1 -phy_rx_polarity_flip_phy50=1 -phy_tx_polarity_flip_phy50=1 -phy_rx_polarity_flip_phy51=0 -phy_tx_polarity_flip_phy51=1 -phy_rx_polarity_flip_phy52=0 -phy_tx_polarity_flip_phy52=1 -phy_rx_polarity_flip_phy53=0 -phy_tx_polarity_flip_phy53=0 -phy_rx_polarity_flip_phy54=1 -phy_tx_polarity_flip_phy54=0 -phy_rx_polarity_flip_phy55=1 -phy_tx_polarity_flip_phy55=0 -phy_rx_polarity_flip_phy56=1 -phy_tx_polarity_flip_phy56=0 -phy_rx_polarity_flip_phy57=1 -phy_tx_polarity_flip_phy57=1 -phy_rx_polarity_flip_phy58=0 -phy_tx_polarity_flip_phy58=1 -phy_rx_polarity_flip_phy59=1 -phy_tx_polarity_flip_phy59=1 -phy_rx_polarity_flip_phy60=0 -phy_tx_polarity_flip_phy60=1 -phy_rx_polarity_flip_phy61=1 -phy_tx_polarity_flip_phy61=1 -phy_rx_polarity_flip_phy62=1 -phy_tx_polarity_flip_phy62=1 -phy_rx_polarity_flip_phy63=1 -phy_tx_polarity_flip_phy63=0 -phy_rx_polarity_flip_phy64=1 -phy_tx_polarity_flip_phy64=0 -phy_rx_polarity_flip_phy65=0 -phy_tx_polarity_flip_phy65=0 -phy_rx_polarity_flip_phy66=1 -phy_tx_polarity_flip_phy66=0 -phy_rx_polarity_flip_phy67=1 -phy_tx_polarity_flip_phy67=1 -phy_rx_polarity_flip_phy68=0 -phy_tx_polarity_flip_phy68=0 -phy_rx_polarity_flip_phy69=1 -phy_tx_polarity_flip_phy69=0 -phy_rx_polarity_flip_phy70=1 -phy_tx_polarity_flip_phy70=0 -phy_rx_polarity_flip_phy71=1 -phy_tx_polarity_flip_phy71=1 -phy_rx_polarity_flip_phy72=1 -phy_tx_polarity_flip_phy72=1 -phy_rx_polarity_flip_phy73=0 -phy_tx_polarity_flip_phy73=0 -phy_rx_polarity_flip_phy74=0 -phy_tx_polarity_flip_phy74=1 -phy_rx_polarity_flip_phy75=0 -phy_tx_polarity_flip_phy75=1 -phy_rx_polarity_flip_phy76=0 -phy_tx_polarity_flip_phy76=1 -phy_rx_polarity_flip_phy77=1 -phy_tx_polarity_flip_phy77=0 -phy_rx_polarity_flip_phy78=0 -phy_tx_polarity_flip_phy78=1 -phy_rx_polarity_flip_phy79=0 -phy_tx_polarity_flip_phy79=1 -phy_rx_polarity_flip_phy80=1 -phy_tx_polarity_flip_phy80=0 -phy_rx_polarity_flip_phy81=0 -phy_tx_polarity_flip_phy81=0 -phy_rx_polarity_flip_phy82=1 -phy_tx_polarity_flip_phy82=0 -phy_rx_polarity_flip_phy83=1 -phy_tx_polarity_flip_phy83=1 -phy_rx_polarity_flip_phy84=0 -phy_tx_polarity_flip_phy84=0 -phy_rx_polarity_flip_phy85=1 -phy_tx_polarity_flip_phy85=0 -phy_rx_polarity_flip_phy86=1 -phy_tx_polarity_flip_phy86=0 -phy_rx_polarity_flip_phy87=1 -phy_tx_polarity_flip_phy87=1 -phy_rx_polarity_flip_phy88=1 -phy_tx_polarity_flip_phy88=0 -phy_rx_polarity_flip_phy89=0 -phy_tx_polarity_flip_phy89=1 -phy_rx_polarity_flip_phy90=0 -phy_tx_polarity_flip_phy90=1 -phy_rx_polarity_flip_phy91=0 -phy_tx_polarity_flip_phy91=1 -phy_rx_polarity_flip_phy92=0 -phy_tx_polarity_flip_phy92=1 -phy_rx_polarity_flip_phy93=1 -phy_tx_polarity_flip_phy93=0 -phy_rx_polarity_flip_phy94=0 -phy_tx_polarity_flip_phy94=1 -phy_rx_polarity_flip_phy95=0 -phy_tx_polarity_flip_phy95=1 -phy_rx_polarity_flip_phy96=0 -phy_tx_polarity_flip_phy96=0 -phy_rx_polarity_flip_phy97=0 -phy_tx_polarity_flip_phy97=1 -phy_rx_polarity_flip_phy98=1 -phy_tx_polarity_flip_phy98=1 -phy_rx_polarity_flip_phy99=1 -phy_tx_polarity_flip_phy99=0 -phy_rx_polarity_flip_phy100=0 -phy_tx_polarity_flip_phy100=1 -phy_rx_polarity_flip_phy101=0 -phy_tx_polarity_flip_phy101=0 -phy_rx_polarity_flip_phy102=1 -phy_tx_polarity_flip_phy102=0 -phy_rx_polarity_flip_phy103=0 -phy_tx_polarity_flip_phy103=0 -phy_rx_polarity_flip_phy104=0 -phy_tx_polarity_flip_phy104=0 -phy_rx_polarity_flip_phy105=0 -phy_tx_polarity_flip_phy105=1 -phy_rx_polarity_flip_phy106=0 -phy_tx_polarity_flip_phy106=0 -phy_rx_polarity_flip_phy107=1 -phy_tx_polarity_flip_phy107=0 -phy_rx_polarity_flip_phy108=0 -phy_tx_polarity_flip_phy108=0 -phy_rx_polarity_flip_phy109=0 -phy_tx_polarity_flip_phy109=1 -phy_rx_polarity_flip_phy110=1 -phy_tx_polarity_flip_phy110=0 -phy_rx_polarity_flip_phy111=0 -phy_tx_polarity_flip_phy111=1 -phy_rx_polarity_flip_phy112=1 -phy_tx_polarity_flip_phy112=0 -phy_rx_polarity_flip_phy113=0 -phy_tx_polarity_flip_phy113=0 -phy_rx_polarity_flip_phy114=0 -phy_tx_polarity_flip_phy114=0 -phy_rx_polarity_flip_phy115=0 -phy_tx_polarity_flip_phy115=1 -phy_rx_polarity_flip_phy116=1 -phy_tx_polarity_flip_phy116=1 -phy_rx_polarity_flip_phy117=1 -phy_tx_polarity_flip_phy117=1 -phy_rx_polarity_flip_phy118=0 -phy_tx_polarity_flip_phy118=0 -phy_rx_polarity_flip_phy119=0 -phy_tx_polarity_flip_phy119=0 -phy_rx_polarity_flip_phy120=1 -phy_tx_polarity_flip_phy120=1 -phy_rx_polarity_flip_phy121=0 -phy_tx_polarity_flip_phy121=0 -phy_rx_polarity_flip_phy122=0 -phy_tx_polarity_flip_phy122=1 -phy_rx_polarity_flip_phy123=1 -phy_tx_polarity_flip_phy123=0 -phy_rx_polarity_flip_phy124=0 -phy_tx_polarity_flip_phy124=1 -phy_rx_polarity_flip_phy125=0 -phy_tx_polarity_flip_phy125=0 -phy_rx_polarity_flip_phy126=1 -phy_tx_polarity_flip_phy126=0 -phy_rx_polarity_flip_phy127=0 -phy_tx_polarity_flip_phy127=0 -phy_rx_polarity_flip_phy128=1 -phy_tx_polarity_flip_phy128=1 -phy_rx_polarity_flip_phy129=1 -phy_tx_polarity_flip_phy129=1 -phy_rx_polarity_flip_phy130=0 -phy_tx_polarity_flip_phy130=1 -phy_rx_polarity_flip_phy131=0 -phy_tx_polarity_flip_phy131=1 -phy_rx_polarity_flip_phy132=0 -phy_tx_polarity_flip_phy132=0 -phy_rx_polarity_flip_phy133=1 -phy_tx_polarity_flip_phy133=1 -phy_rx_polarity_flip_phy134=1 -phy_tx_polarity_flip_phy134=0 -phy_rx_polarity_flip_phy135=1 -phy_tx_polarity_flip_phy135=1 -phy_rx_polarity_flip_phy136=1 -phy_tx_polarity_flip_phy136=1 -phy_rx_polarity_flip_phy137=0 -phy_tx_polarity_flip_phy137=0 -phy_rx_polarity_flip_phy138=1 -phy_tx_polarity_flip_phy138=1 -phy_rx_polarity_flip_phy139=1 -phy_tx_polarity_flip_phy139=0 -phy_rx_polarity_flip_phy140=1 -phy_tx_polarity_flip_phy140=1 -phy_rx_polarity_flip_phy141=1 -phy_tx_polarity_flip_phy141=1 -phy_rx_polarity_flip_phy142=0 -phy_tx_polarity_flip_phy142=1 -phy_rx_polarity_flip_phy143=1 -phy_tx_polarity_flip_phy143=1 -phy_rx_polarity_flip_phy144=1 -phy_tx_polarity_flip_phy144=1 -phy_rx_polarity_flip_phy145=1 -phy_tx_polarity_flip_phy145=1 -phy_rx_polarity_flip_phy146=0 -phy_tx_polarity_flip_phy146=1 -phy_rx_polarity_flip_phy147=0 -phy_tx_polarity_flip_phy147=1 -phy_rx_polarity_flip_phy148=0 -phy_tx_polarity_flip_phy148=0 -phy_rx_polarity_flip_phy149=1 -phy_tx_polarity_flip_phy149=1 -phy_rx_polarity_flip_phy150=1 -phy_tx_polarity_flip_phy150=0 -phy_rx_polarity_flip_phy151=1 -phy_tx_polarity_flip_phy151=1 -phy_rx_polarity_flip_phy152=1 -phy_tx_polarity_flip_phy152=1 -phy_rx_polarity_flip_phy153=1 -phy_tx_polarity_flip_phy153=0 -phy_rx_polarity_flip_phy154=1 -phy_tx_polarity_flip_phy154=1 -phy_rx_polarity_flip_phy155=1 -phy_tx_polarity_flip_phy155=1 -phy_rx_polarity_flip_phy156=0 -phy_tx_polarity_flip_phy156=1 -phy_rx_polarity_flip_phy157=0 -phy_tx_polarity_flip_phy157=1 -phy_rx_polarity_flip_phy158=0 -phy_tx_polarity_flip_phy158=1 -phy_rx_polarity_flip_phy159=1 -phy_tx_polarity_flip_phy159=1 -phy_rx_polarity_flip_phy160=0 -phy_tx_polarity_flip_phy160=1 -phy_rx_polarity_flip_phy161=0 -phy_tx_polarity_flip_phy161=0 -phy_rx_polarity_flip_phy162=1 -phy_tx_polarity_flip_phy162=1 -phy_rx_polarity_flip_phy163=1 -phy_tx_polarity_flip_phy163=1 -phy_rx_polarity_flip_phy164=0 -phy_tx_polarity_flip_phy164=1 -phy_rx_polarity_flip_phy165=1 -phy_tx_polarity_flip_phy165=0 -phy_rx_polarity_flip_phy166=0 -phy_tx_polarity_flip_phy166=0 -phy_rx_polarity_flip_phy167=1 -phy_tx_polarity_flip_phy167=1 -phy_rx_polarity_flip_phy168=1 -phy_tx_polarity_flip_phy168=0 -phy_rx_polarity_flip_phy169=0 -phy_tx_polarity_flip_phy169=1 -phy_rx_polarity_flip_phy170=1 -phy_tx_polarity_flip_phy170=1 -phy_rx_polarity_flip_phy171=0 -phy_tx_polarity_flip_phy171=0 -phy_rx_polarity_flip_phy172=0 -phy_tx_polarity_flip_phy172=0 -phy_rx_polarity_flip_phy173=1 -phy_tx_polarity_flip_phy173=0 -phy_rx_polarity_flip_phy174=1 -phy_tx_polarity_flip_phy174=0 -phy_rx_polarity_flip_phy175=0 -phy_tx_polarity_flip_phy175=1 -phy_rx_polarity_flip_phy176=0 -phy_tx_polarity_flip_phy176=1 -phy_rx_polarity_flip_phy177=0 -phy_tx_polarity_flip_phy177=0 -phy_rx_polarity_flip_phy178=1 -phy_tx_polarity_flip_phy178=1 -phy_rx_polarity_flip_phy179=1 -phy_tx_polarity_flip_phy179=1 -phy_rx_polarity_flip_phy180=0 -phy_tx_polarity_flip_phy180=1 -phy_rx_polarity_flip_phy181=1 -phy_tx_polarity_flip_phy181=0 -phy_rx_polarity_flip_phy182=0 -phy_tx_polarity_flip_phy182=0 -phy_rx_polarity_flip_phy183=1 -phy_tx_polarity_flip_phy183=1 -phy_rx_polarity_flip_phy184=0 -phy_tx_polarity_flip_phy184=0 -phy_rx_polarity_flip_phy185=1 -phy_tx_polarity_flip_phy185=1 -phy_rx_polarity_flip_phy186=1 -phy_tx_polarity_flip_phy186=0 -phy_rx_polarity_flip_phy187=1 -phy_tx_polarity_flip_phy187=0 -phy_rx_polarity_flip_phy188=1 -phy_tx_polarity_flip_phy188=0 -phy_rx_polarity_flip_phy189=0 -phy_tx_polarity_flip_phy189=1 -phy_rx_polarity_flip_phy190=1 -phy_tx_polarity_flip_phy190=0 -phy_rx_polarity_flip_phy191=1 -phy_tx_polarity_flip_phy191=0 -phy_rx_polarity_flip_phy192=0 -phy_tx_polarity_flip_phy192=1 -phy_rx_polarity_flip_phy193=0 -phy_tx_polarity_flip_phy193=0 -phy_rx_polarity_flip_phy194=1 -phy_tx_polarity_flip_phy194=0 -phy_rx_polarity_flip_phy195=0 -phy_tx_polarity_flip_phy195=0 -phy_rx_polarity_flip_phy196=1 -phy_tx_polarity_flip_phy196=0 -phy_rx_polarity_flip_phy197=0 -phy_tx_polarity_flip_phy197=0 -phy_rx_polarity_flip_phy198=0 -phy_tx_polarity_flip_phy198=0 -phy_rx_polarity_flip_phy199=1 -phy_tx_polarity_flip_phy199=1 -phy_rx_polarity_flip_phy200=0 -phy_tx_polarity_flip_phy200=1 -phy_rx_polarity_flip_phy201=0 -phy_tx_polarity_flip_phy201=0 -phy_rx_polarity_flip_phy202=1 -phy_tx_polarity_flip_phy202=0 -phy_rx_polarity_flip_phy203=0 -phy_tx_polarity_flip_phy203=0 -phy_rx_polarity_flip_phy204=1 -phy_tx_polarity_flip_phy204=0 -phy_rx_polarity_flip_phy205=0 -phy_tx_polarity_flip_phy205=0 -phy_rx_polarity_flip_phy206=0 -phy_tx_polarity_flip_phy206=0 -phy_rx_polarity_flip_phy207=0 -phy_tx_polarity_flip_phy207=1 -phy_rx_polarity_flip_phy208=0 -phy_tx_polarity_flip_phy208=0 -phy_rx_polarity_flip_phy209=0 -phy_tx_polarity_flip_phy209=1 -phy_rx_polarity_flip_phy210=1 -phy_tx_polarity_flip_phy210=1 -phy_rx_polarity_flip_phy211=0 -phy_tx_polarity_flip_phy211=0 -phy_rx_polarity_flip_phy212=0 -phy_tx_polarity_flip_phy212=1 -phy_rx_polarity_flip_phy213=1 -phy_tx_polarity_flip_phy213=1 -phy_rx_polarity_flip_phy214=0 -phy_tx_polarity_flip_phy214=0 -phy_rx_polarity_flip_phy215=0 -phy_tx_polarity_flip_phy215=1 -phy_rx_polarity_flip_phy216=0 -phy_tx_polarity_flip_phy216=0 -phy_rx_polarity_flip_phy217=1 -phy_tx_polarity_flip_phy217=0 -phy_rx_polarity_flip_phy218=0 -phy_tx_polarity_flip_phy218=1 -phy_rx_polarity_flip_phy219=0 -phy_tx_polarity_flip_phy219=0 -phy_rx_polarity_flip_phy220=0 -phy_tx_polarity_flip_phy220=0 -phy_rx_polarity_flip_phy221=0 -phy_tx_polarity_flip_phy221=1 -phy_rx_polarity_flip_phy222=0 -phy_tx_polarity_flip_phy222=0 -phy_rx_polarity_flip_phy223=1 -phy_tx_polarity_flip_phy223=0 -phy_rx_polarity_flip_phy224=1 -phy_tx_polarity_flip_phy224=0 -phy_rx_polarity_flip_phy225=1 -phy_tx_polarity_flip_phy225=0 -phy_rx_polarity_flip_phy226=0 -phy_tx_polarity_flip_phy226=1 -phy_rx_polarity_flip_phy227=0 -phy_tx_polarity_flip_phy227=0 -phy_rx_polarity_flip_phy228=1 -phy_tx_polarity_flip_phy228=0 -phy_rx_polarity_flip_phy229=1 -phy_tx_polarity_flip_phy229=1 -phy_rx_polarity_flip_phy230=0 -phy_tx_polarity_flip_phy230=1 -phy_rx_polarity_flip_phy231=1 -phy_tx_polarity_flip_phy231=0 -phy_rx_polarity_flip_phy232=0 -phy_tx_polarity_flip_phy232=1 -phy_rx_polarity_flip_phy233=1 -phy_tx_polarity_flip_phy233=1 -phy_rx_polarity_flip_phy234=1 -phy_tx_polarity_flip_phy234=0 -phy_rx_polarity_flip_phy235=0 -phy_tx_polarity_flip_phy235=0 -phy_rx_polarity_flip_phy236=0 -phy_tx_polarity_flip_phy236=1 -phy_rx_polarity_flip_phy237=0 -phy_tx_polarity_flip_phy237=0 -phy_rx_polarity_flip_phy238=0 -phy_tx_polarity_flip_phy238=1 -phy_rx_polarity_flip_phy239=0 -phy_tx_polarity_flip_phy239=1 -phy_rx_polarity_flip_phy240=1 -phy_tx_polarity_flip_phy240=0 -phy_rx_polarity_flip_phy241=1 -phy_tx_polarity_flip_phy241=0 -phy_rx_polarity_flip_phy242=1 -phy_tx_polarity_flip_phy242=1 -phy_rx_polarity_flip_phy243=1 -phy_tx_polarity_flip_phy243=0 -phy_rx_polarity_flip_phy244=0 -phy_tx_polarity_flip_phy244=1 -phy_rx_polarity_flip_phy245=1 -phy_tx_polarity_flip_phy245=1 -phy_rx_polarity_flip_phy246=0 -phy_tx_polarity_flip_phy246=0 -phy_rx_polarity_flip_phy247=0 -phy_tx_polarity_flip_phy247=0 -phy_rx_polarity_flip_phy248=1 -phy_tx_polarity_flip_phy248=1 -phy_rx_polarity_flip_phy249=1 -phy_tx_polarity_flip_phy249=1 -phy_rx_polarity_flip_phy250=1 -phy_tx_polarity_flip_phy250=0 -phy_rx_polarity_flip_phy251=0 -phy_tx_polarity_flip_phy251=0 -phy_rx_polarity_flip_phy252=0 -phy_tx_polarity_flip_phy252=1 -phy_rx_polarity_flip_phy253=0 -phy_tx_polarity_flip_phy253=0 -phy_rx_polarity_flip_phy254=0 -phy_tx_polarity_flip_phy254=1 -phy_rx_polarity_flip_phy255=0 -phy_tx_polarity_flip_phy255=1 - -appl_param_nof_ports_per_modid=66 -xflow_macsec_secure_chan_to_num_secure_assoc_encrypt=2 -xflow_macsec_secure_chan_to_num_secure_assoc_decrypt=4 -sai_pfc_dlr_init_capability=0 -sai_default_cpu_tx_tc=7 -sai_disable_srcmacqedstmac_ctrl=1 -appl_param_active_links_thr_high=91 -appl_param_active_links_thr_low=1 diff --git a/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/sai_postinit_cmd.soc b/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/sai_postinit_cmd.soc index ed203b7ff11..93cccec8d60 100644 --- a/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/sai_postinit_cmd.soc +++ b/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/sai_postinit_cmd.soc @@ -1 +1,217 @@ -modreg TCAM_RESERVED_SPARE_2 RESERVED_SPARE_2=1 +# Core=0 +INTeRrupt ENAble id=2249 p=0 +INTeRrupt ENAble id=2250 p=0 +INTeRrupt ENAble id=2251 p=0 +INTeRrupt ENAble id=2252 p=0 +INTeRrupt ENAble id=2253 p=0 +INTeRrupt ENAble id=2254 p=0 +INTeRrupt ENAble id=2255 p=0 +INTeRrupt ENAble id=2256 p=0 +INTeRrupt ENAble id=2257 p=0 +INTeRrupt ENAble id=2258 p=0 +INTeRrupt ENAble id=2259 p=0 +INTeRrupt ENAble id=2260 p=0 +INTeRrupt ENAble id=2261 p=0 +INTeRrupt ENAble id=2262 p=0 +INTeRrupt ENAble id=2263 p=0 + +INTeRrupt ENAble id=540 p=0 +INTeRrupt ENAble id=541 p=0 +INTeRrupt ENAble id=542 p=0 +INTeRrupt ENAble id=543 p=0 +INTeRrupt ENAble id=544 p=0 +INTeRrupt ENAble id=545 p=0 +INTeRrupt ENAble id=546 p=0 + +INTeRrupt ENAble id=1529 p=0 + +# Core=1 +INTeRrupt ENAble id=2249 p=1 +INTeRrupt ENAble id=2250 p=1 +INTeRrupt ENAble id=2251 p=1 +INTeRrupt ENAble id=2252 p=1 +INTeRrupt ENAble id=2253 p=1 +INTeRrupt ENAble id=2254 p=1 +INTeRrupt ENAble id=2255 p=1 +INTeRrupt ENAble id=2256 p=1 +INTeRrupt ENAble id=2257 p=1 +INTeRrupt ENAble id=2258 p=1 +INTeRrupt ENAble id=2259 p=1 +INTeRrupt ENAble id=2260 p=1 +INTeRrupt ENAble id=2261 p=1 +INTeRrupt ENAble id=2262 p=1 +INTeRrupt ENAble id=2263 p=1 + +INTeRrupt ENAble id=540 p=1 +INTeRrupt ENAble id=541 p=1 +INTeRrupt ENAble id=542 p=1 +INTeRrupt ENAble id=543 p=1 +INTeRrupt ENAble id=544 p=1 +INTeRrupt ENAble id=545 p=1 +INTeRrupt ENAble id=546 p=1 + +INTeRrupt ENAble id=1529 p=1 + +# Core=2 +INTeRrupt ENAble id=2249 p=2 +INTeRrupt ENAble id=2250 p=2 +INTeRrupt ENAble id=2251 p=2 +INTeRrupt ENAble id=2252 p=2 +INTeRrupt ENAble id=2253 p=2 +INTeRrupt ENAble id=2254 p=2 +INTeRrupt ENAble id=2255 p=2 +INTeRrupt ENAble id=2256 p=2 +INTeRrupt ENAble id=2257 p=2 +INTeRrupt ENAble id=2258 p=2 +INTeRrupt ENAble id=2259 p=2 +INTeRrupt ENAble id=2260 p=2 +INTeRrupt ENAble id=2261 p=2 +INTeRrupt ENAble id=2262 p=2 +INTeRrupt ENAble id=2263 p=2 + +INTeRrupt ENAble id=540 p=2 +INTeRrupt ENAble id=541 p=2 +INTeRrupt ENAble id=542 p=2 +INTeRrupt ENAble id=543 p=2 +INTeRrupt ENAble id=544 p=2 +INTeRrupt ENAble id=545 p=2 +INTeRrupt ENAble id=546 p=2 + +INTeRrupt ENAble id=1529 p=2 + +# Core=3 +INTeRrupt ENAble id=2249 p=3 +INTeRrupt ENAble id=2250 p=3 +INTeRrupt ENAble id=2251 p=3 +INTeRrupt ENAble id=2252 p=3 +INTeRrupt ENAble id=2253 p=3 +INTeRrupt ENAble id=2254 p=3 +INTeRrupt ENAble id=2255 p=3 +INTeRrupt ENAble id=2256 p=3 +INTeRrupt ENAble id=2257 p=3 +INTeRrupt ENAble id=2258 p=3 +INTeRrupt ENAble id=2259 p=3 +INTeRrupt ENAble id=2260 p=3 +INTeRrupt ENAble id=2261 p=3 +INTeRrupt ENAble id=2262 p=3 +INTeRrupt ENAble id=2263 p=3 + +INTeRrupt ENAble id=540 p=3 +INTeRrupt ENAble id=541 p=3 +INTeRrupt ENAble id=542 p=3 +INTeRrupt ENAble id=543 p=3 +INTeRrupt ENAble id=544 p=3 +INTeRrupt ENAble id=545 p=3 +INTeRrupt ENAble id=546 p=3 + +INTeRrupt ENAble id=1529 p=3 + +# Core=4 +INTeRrupt ENAble id=2249 p=4 +INTeRrupt ENAble id=2250 p=4 +INTeRrupt ENAble id=2251 p=4 +INTeRrupt ENAble id=2252 p=4 +INTeRrupt ENAble id=2253 p=4 +INTeRrupt ENAble id=2254 p=4 +INTeRrupt ENAble id=2255 p=4 +INTeRrupt ENAble id=2256 p=4 +INTeRrupt ENAble id=2257 p=4 +INTeRrupt ENAble id=2258 p=4 +INTeRrupt ENAble id=2259 p=4 +INTeRrupt ENAble id=2260 p=4 +INTeRrupt ENAble id=2261 p=4 +INTeRrupt ENAble id=2262 p=4 +INTeRrupt ENAble id=2263 p=4 + +INTeRrupt ENAble id=540 p=4 +INTeRrupt ENAble id=541 p=4 +INTeRrupt ENAble id=542 p=4 +INTeRrupt ENAble id=543 p=4 +INTeRrupt ENAble id=544 p=4 +INTeRrupt ENAble id=545 p=4 +INTeRrupt ENAble id=546 p=4 + +INTeRrupt ENAble id=1529 p=4 + +# Core=5 +INTeRrupt ENAble id=2249 p=5 +INTeRrupt ENAble id=2250 p=5 +INTeRrupt ENAble id=2251 p=5 +INTeRrupt ENAble id=2252 p=5 +INTeRrupt ENAble id=2253 p=5 +INTeRrupt ENAble id=2254 p=5 +INTeRrupt ENAble id=2255 p=5 +INTeRrupt ENAble id=2256 p=5 +INTeRrupt ENAble id=2257 p=5 +INTeRrupt ENAble id=2258 p=5 +INTeRrupt ENAble id=2259 p=5 +INTeRrupt ENAble id=2260 p=5 +INTeRrupt ENAble id=2261 p=5 +INTeRrupt ENAble id=2262 p=5 +INTeRrupt ENAble id=2263 p=5 + +INTeRrupt ENAble id=540 p=5 +INTeRrupt ENAble id=541 p=5 +INTeRrupt ENAble id=542 p=5 +INTeRrupt ENAble id=543 p=5 +INTeRrupt ENAble id=544 p=5 +INTeRrupt ENAble id=545 p=5 +INTeRrupt ENAble id=546 p=5 + +INTeRrupt ENAble id=1529 p=5 + +# Core=6 +INTeRrupt ENAble id=2249 p=6 +INTeRrupt ENAble id=2250 p=6 +INTeRrupt ENAble id=2251 p=6 +INTeRrupt ENAble id=2252 p=6 +INTeRrupt ENAble id=2253 p=6 +INTeRrupt ENAble id=2254 p=6 +INTeRrupt ENAble id=2255 p=6 +INTeRrupt ENAble id=2256 p=6 +INTeRrupt ENAble id=2257 p=6 +INTeRrupt ENAble id=2258 p=6 +INTeRrupt ENAble id=2259 p=6 +INTeRrupt ENAble id=2260 p=6 +INTeRrupt ENAble id=2261 p=6 +INTeRrupt ENAble id=2262 p=6 +INTeRrupt ENAble id=2263 p=6 + +INTeRrupt ENAble id=540 p=6 +INTeRrupt ENAble id=541 p=6 +INTeRrupt ENAble id=542 p=6 +INTeRrupt ENAble id=543 p=6 +INTeRrupt ENAble id=544 p=6 +INTeRrupt ENAble id=545 p=6 +INTeRrupt ENAble id=546 p=6 + +INTeRrupt ENAble id=1529 p=6 + +# Core=7 +INTeRrupt ENAble id=2249 p=7 +INTeRrupt ENAble id=2250 p=7 +INTeRrupt ENAble id=2251 p=7 +INTeRrupt ENAble id=2252 p=7 +INTeRrupt ENAble id=2253 p=7 +INTeRrupt ENAble id=2254 p=7 +INTeRrupt ENAble id=2255 p=7 +INTeRrupt ENAble id=2256 p=7 +INTeRrupt ENAble id=2257 p=7 +INTeRrupt ENAble id=2258 p=7 +INTeRrupt ENAble id=2259 p=7 +INTeRrupt ENAble id=2260 p=7 +INTeRrupt ENAble id=2261 p=7 +INTeRrupt ENAble id=2262 p=7 +INTeRrupt ENAble id=2263 p=7 + +INTeRrupt ENAble id=540 p=7 +INTeRrupt ENAble id=541 p=7 +INTeRrupt ENAble id=542 p=7 +INTeRrupt ENAble id=543 p=7 +INTeRrupt ENAble id=544 p=7 +INTeRrupt ENAble id=545 p=7 +INTeRrupt ENAble id=546 p=7 + +INTeRrupt ENAble id=1529 p=7 + +debug intr error diff --git a/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/template/gearbox_400G_PAM4_optic.xml.j2 b/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/template/gearbox_400G_PAM4_optic.xml.j2 new file mode 100644 index 00000000000..8d4537ec8a4 --- /dev/null +++ b/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/template/gearbox_400G_PAM4_optic.xml.j2 @@ -0,0 +1,885 @@ + + + crt88322 + bitmux + + 0 + {{ phy_profile[1]["topology"] }} + {{ phy_profile[1]["mode"] }} + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + 0 + {{ phy_profile[2]["topology"] }} + {{ phy_profile[2]["mode"] }} + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + 0 + {{ phy_profile[3]["topology"] }} + {{ phy_profile[3]["mode"] }} + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + 0 + {{ phy_profile[4]["topology"] }} + {{ phy_profile[4]["mode"] }} + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + 0 + {{ phy_profile[5]["topology"] }} + {{ phy_profile[5]["mode"] }} + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + 0 + {{ phy_profile[6]["topology"] }} + {{ phy_profile[6]["mode"] }} + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + 0 + {{ phy_profile[7]["topology"] }} + {{ phy_profile[7]["mode"] }} + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + 0 + {{ phy_profile[8]["topology"] }} + {{ phy_profile[8]["mode"] }} + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + 0 + {{ phy_profile[9]["topology"] }} + {{ phy_profile[9]["mode"] }} + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + 0 + {{ phy_profile[10]["topology"] }} + {{ phy_profile[10]["mode"] }} + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + 0 + {{ phy_profile[11]["topology"] }} + {{ phy_profile[11]["mode"] }} + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + 0 + {{ phy_profile[12]["topology"] }} + {{ phy_profile[12]["mode"] }} + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + 0 + {{ phy_profile[13]["topology"] }} + {{ phy_profile[13]["mode"] }} + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + 0 + {{ phy_profile[14]["topology"] }} + {{ phy_profile[14]["mode"] }} + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + 0 + {{ phy_profile[15]["topology"] }} + {{ phy_profile[15]["mode"] }} + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + 0 + {{ phy_profile[16]["topology"] }} + {{ phy_profile[16]["mode"] }} + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/template/gearbox_config.json.j2 b/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/template/gearbox_config.json.j2 new file mode 100644 index 00000000000..fe03dacf7a6 --- /dev/null +++ b/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/template/gearbox_config.json.j2 @@ -0,0 +1,259 @@ +{ + "phys": [ + { + "phy_id": 1, + "name": "phy1", + "address": "1", + "lib_name": "", + "firmware_path": "/usr/etc/credo/firmware/SE_LR", + "config_file": "/usr/share/sonic/hwsku/phy1_config.json", + "sai_init_config_file": "", + "phy_access": "mdio", + "bus_id": 0, + "context_id": 1, + "macsec_supported": false, + "macsec_ipg": 352, + "hwinfo": "mdio0_0_0/0" + }, + { + "phy_id": 2, + "name": "phy2", + "address": "2", + "lib_name": "", + "firmware_path": "/usr/etc/credo/firmware/SE_LR", + "config_file": "/usr/share/sonic/hwsku/phy2_config.json", + "sai_init_config_file": "", + "phy_access": "mdio", + "bus_id": 0, + "context_id": 1, + "macsec_supported": false, + "macsec_ipg": 352, + "hwinfo": "mdio1_0_0/0" + }, + { + "phy_id": 3, + "name": "phy3", + "address": "3", + "lib_name": "", + "firmware_path": "/usr/etc/credo/firmware/SE_LR", + "config_file": "/usr/share/sonic/hwsku/phy3_config.json", + "sai_init_config_file": "", + "phy_access": "mdio", + "bus_id": 0, + "context_id": 1, + "macsec_supported": false, + "macsec_ipg": 352, + "hwinfo": "mdio2_0_0/0" + }, + { + "phy_id": 4, + "name": "phy4", + "address": "4", + "lib_name": "", + "firmware_path": "/usr/etc/credo/firmware/SE_LR", + "config_file": "/usr/share/sonic/hwsku/phy4_config.json", + "sai_init_config_file": "", + "phy_access": "mdio", + "bus_id": 0, + "context_id": 1, + "macsec_supported": false, + "macsec_ipg": 352, + "hwinfo": "mdio3_0_0/0" + }, + { + "phy_id": 5, + "name": "phy5", + "address": "5", + "lib_name": "", + "firmware_path": "/usr/etc/credo/firmware/SE_LR", + "config_file": "/usr/share/sonic/hwsku/phy5_config.json", + "sai_init_config_file": "", + "phy_access": "mdio", + "bus_id": 0, + "context_id": 1, + "macsec_supported": false, + "macsec_ipg": 352, + "hwinfo": "mdio4_0_0/0" + }, + { + "phy_id": 6, + "name": "phy6", + "address": "6", + "lib_name": "", + "firmware_path": "/usr/etc/credo/firmware/SE_LR", + "config_file": "/usr/share/sonic/hwsku/phy6_config.json", + "sai_init_config_file": "", + "phy_access": "mdio", + "bus_id": 0, + "context_id": 1, + "macsec_supported": false, + "macsec_ipg": 352, + "hwinfo": "mdio5_0_0/0" + }, + { + "phy_id": 7, + "name": "phy7", + "address": "7", + "lib_name": "", + "firmware_path": "/usr/etc/credo/firmware/SE_LR", + "config_file": "/usr/share/sonic/hwsku/phy7_config.json", + "sai_init_config_file": "", + "phy_access": "mdio", + "bus_id": 0, + "context_id": 1, + "macsec_supported": false, + "macsec_ipg": 352, + "hwinfo": "mdio6_0_0/0" + }, + { + "phy_id": 8, + "name": "phy8", + "address": "8", + "lib_name": "", + "firmware_path": "/usr/etc/credo/firmware/SE_LR", + "config_file": "/usr/share/sonic/hwsku/phy8_config.json", + "sai_init_config_file": "", + "phy_access": "mdio", + "bus_id": 0, + "context_id": 1, + "macsec_supported": false, + "macsec_ipg": 352, + "hwinfo": "mdio7_0_0/0" + }, + { + "phy_id": 9, + "name": "phy9", + "address": "9", + "lib_name": "", + "firmware_path": "/usr/etc/credo/firmware/SE_LR", + "config_file": "/usr/share/sonic/hwsku/phy9_config.json", + "sai_init_config_file": "", + "phy_access": "mdio", + "bus_id": 0, + "context_id": 1, + "macsec_supported": false, + "macsec_ipg": 352, + "hwinfo": "mdio8_0_0/0" + }, + { + "phy_id": 10, + "name": "phy10", + "address": "10", + "lib_name": "", + "firmware_path": "/usr/etc/credo/firmware/SE_LR", + "config_file": "/usr/share/sonic/hwsku/phy10_config.json", + "sai_init_config_file": "", + "phy_access": "mdio", + "bus_id": 0, + "context_id": 1, + "macsec_supported": false, + "macsec_ipg": 352, + "hwinfo": "mdio9_0_0/0" + }, + { + "phy_id": 11, + "name": "phy11", + "address": "11", + "lib_name": "", + "firmware_path": "/usr/etc/credo/firmware/SE_LR", + "config_file": "/usr/share/sonic/hwsku/phy11_config.json", + "sai_init_config_file": "", + "phy_access": "mdio", + "bus_id": 0, + "context_id": 1, + "macsec_supported": false, + "macsec_ipg": 352, + "hwinfo": "mdio10_0_0/0" + }, + { + "phy_id": 12, + "name": "phy12", + "address": "12", + "lib_name": "", + "firmware_path": "/usr/etc/credo/firmware/SE_LR", + "config_file": "/usr/share/sonic/hwsku/phy12_config.json", + "sai_init_config_file": "", + "phy_access": "mdio", + "bus_id": 0, + "context_id": 1, + "macsec_supported": false, + "macsec_ipg": 352, + "hwinfo": "mdio11_0_0/0" + }, + { + "phy_id": 13, + "name": "phy13", + "address": "13", + "lib_name": "", + "firmware_path": "/usr/etc/credo/firmware/SE_LR", + "config_file": "/usr/share/sonic/hwsku/phy13_config.json", + "sai_init_config_file": "", + "phy_access": "mdio", + "bus_id": 0, + "context_id": 1, + "macsec_supported": false, + "macsec_ipg": 352, + "hwinfo": "mdio12_0_0/0" + }, + { + "phy_id": 14, + "name": "phy14", + "address": "14", + "lib_name": "", + "firmware_path": "/usr/etc/credo/firmware/SE_LR", + "config_file": "/usr/share/sonic/hwsku/phy14_config.json", + "sai_init_config_file": "", + "phy_access": "mdio", + "bus_id": 0, + "context_id": 1, + "macsec_supported": false, + "macsec_ipg": 352, + "hwinfo": "mdio13_0_0/0" + }, + { + "phy_id": 15, + "name": "phy15", + "address": "15", + "lib_name": "", + "firmware_path": "/usr/etc/credo/firmware/SE_LR", + "config_file": "/usr/share/sonic/hwsku/phy15_config.json", + "sai_init_config_file": "", + "phy_access": "mdio", + "bus_id": 0, + "context_id": 1, + "macsec_supported": false, + "macsec_ipg": 352, + "hwinfo": "mdio14_0_0/0" + }, + { + "phy_id": 16, + "name": "phy16", + "address": "16", + "lib_name": "", + "firmware_path": "/usr/etc/credo/firmware/SE_LR", + "config_file": "/usr/share/sonic/hwsku/phy16_config.json", + "sai_init_config_file": "", + "phy_access": "mdio", + "bus_id": 0, + "context_id": 1, + "macsec_supported": false, + "macsec_ipg": 352, + "hwinfo": "mdio15_0_0/0" + } + ], + "interfaces": [ +{% for intf_config in gearbox_intf_config %} { + "name": "{{ intf_config.name }}", + "index": {{ intf_config.index }}, + "phy_id": {{ intf_config.phy_id }}, + "system_lanes": [ +{% for lane in intf_config.system_lanes %} {{ lane }}{% if not loop.last %},{%- endif %} +{% endfor %} ], + "line_lanes": [ +{% for lane in intf_config.line_lanes %} {{ lane }}{% if not loop.last %},{%- endif %} +{% endfor %} ] +{% if loop.last %} } +{% else %} }, +{% endif -%} +{% endfor %} ] +} diff --git a/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/template/phy_config.json.j2 b/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/template/phy_config.json.j2 new file mode 100644 index 00000000000..cac128e3bfa --- /dev/null +++ b/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/template/phy_config.json.j2 @@ -0,0 +1,40 @@ +{ + "lanes": [ + { + "index": 200, + "local_lane_id": 0, + "system_side": true, + "tx_polarity": 0, + "rx_polarity": 0, + "line_tx_lanemap": 0, + "line_rx_lanemap": 0, + "line_to_system_lanemap": 0, + "mdio_addr": "" + } + ], + "ports": [ +{% for port_config in phy_port_config %} { + "index": {{ port_config.index }}, + "mdio_addr": "", + "system_speed": {{ port_config.system_speed }}, + "system_fec": "rs", + "system_auto_neg": false, + "system_loopback": "none", + "system_training": false, + "line_speed": {{ port_config.line_speed }}, + "line_fec": "rs", + "line_auto_neg": false, + "line_loopback": "none", + "line_training": false, + "line_media_type": "fiber", + "line_intf_type": "none", + "line_adver_speed": [], + "line_adver_fec": [], + "line_adver_auto_neg": false, + "line_adver_asym_pause": false, + "line_adver_media_type": "fiber" +{% if loop.last %} } +{% else %} }, +{% endif -%} +{% endfor %} ] +} diff --git a/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/template/q3d-a7280R4-32QFx400G-32DFx400G.config.bcm.j2 b/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/template/q3d-a7280R4-32QFx400G-32DFx400G.config.bcm.j2 new file mode 100644 index 00000000000..9ecf10594c4 --- /dev/null +++ b/device/arista/x86_64-arista_7280r4_32qf_32df/Arista-7280R4-32QF-32DF-64O/template/q3d-a7280R4-32QFx400G-32DFx400G.config.bcm.j2 @@ -0,0 +1,451 @@ +soc_family=BCM8887X +system_ref_core_clock_khz=1600000 + +dpp_db_path=/usr/share/bcm/db +sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc +#################################################### +##Reference applications related properties - Start +#################################################### + +## PMF small EXEM connected stage: +# Options: IPMF2 - Ingress PMF 2 stage can perform small EXEM lookups. +# IPMF3 - Ingress PMF 3 stage can perform small EXEM lookups. +## PMF small EXEM connected stage: +# Options: IPMF2 - Ingress PMF 2 stage can perform small EXEM lookups. +# IPMF3 - Ingress PMF 3 stage can perform small EXEM lookups. +pmf_sexem3_stage=IPMF2 + +#################################################### +##Reference applications related properties - End +#################################################### + +# HW mode to support 1024 16-member system wide LAGs +trunk_group_max_members=16 + +# Disable link-training +port_init_cl72=0 + +###Default interfaces +#CPU interfaces +ucode_port_0=CPU.0:core_0.0 +ucode_port_200=CPU.8:core_1.200 +ucode_port_201=CPU.16:core_0.201 +ucode_port_202=CPU.24:core_2.202 +ucode_port_203=CPU.32:core_3.203 +ucode_port_204=CPU.4:core_6.204 +ucode_port_205=CPU.12:core_7.205 +ucode_port_206=CPU.20:core_4.206 +ucode_port_207=CPU.28:core_5.207 + +#NIF ETH interfaces on device +{% for port_id, speed_lane in bcm_port_lane_config['speed_lane_map']|dictsort -%} +ucode_port_{{ port_id }}={{ speed_lane }}:core_{{ bcm_port_lane_config['port_map'][port_id].core_id }}.{{ bcm_port_lane_config['port_map'][port_id].core_port_id }} +{% endfor %} +#NIF default speeds +port_init_speed_xe=25000 +port_init_speed_xl=40000 +port_init_speed_le=50000 +port_init_speed_ce=100000 +port_init_speed_cc=200000 +port_init_speed_cd=400000 +port_init_speed_d3c=800000 +port_init_speed_il=10312 + +port_priorities=8 +port_priorities_sch=8 +port_priorities_0=2 +port_priorities_200=2 +port_priorities_201=2 +port_priorities_202=2 +port_priorities_203=2 +port_priorities_204=2 +port_priorities_205=2 +port_priorities_206=2 +port_priorities_207=2 + +#special ports +ucode_port_240=OLP0:core_0.240 +ucode_port_241=OLP1:core_0.241 +ucode_port_244=OLP0:core_4.240 +ucode_port_245=OLP1:core_4.241 +tm_port_header_type_in_240=INJECTED_2 +tm_port_header_type_out_240=RAW +tm_port_header_type_in_241=INJECTED_2 +tm_port_header_type_out_241=RAW +tm_port_header_type_in_244=INJECTED_2 +tm_port_header_type_out_244=RAW +tm_port_header_type_in_245=INJECTED_2 +tm_port_header_type_out_245=RAW + +# NIF lane mapping +{% for lane, serdes in bcm_port_lane_config['lane_to_serdes_map']|dictsort -%} +lane_to_serdes_map_nif_lane{{ lane }}={{ serdes }} +{% endfor %} +######################### +### High Availability ### +######################### + +sw_state_max_size=750000000 + +#location of warmboot NV memory +#Allowed options for dnx are - 3:external storage in filesystem 4:driver will save the state directly in shared memory +stable_location=4 + +# Note that each unit should have a unique filename and that adapter does not play well with tmp and dev/shm folders. +stable_filename=/dev/shm/warmboot_data_0 +stable_filename.1=/dev/shm/warmboot_data_1 +stable_filename.2=/dev/shm/warmboot_data_2 + +#Maximum size for NVM used for WB storage, must be larger than sw_state_max_size.BCM8885X +stable_size=800000000 + +######################### +######################### +######################### + +tm_port_header_type_in_0=INJECTED +tm_port_header_type_out_0=CPU + +tm_port_header_type_in_200=INJECTED +tm_port_header_type_out_200=ETH +tm_port_header_type_in_201=INJECTED +tm_port_header_type_out_201=ETH +tm_port_header_type_in_202=INJECTED +tm_port_header_type_out_202=ETH +tm_port_header_type_in_203=INJECTED +tm_port_header_type_out_203=ETH +tm_port_header_type_in_204=INJECTED +tm_port_header_type_out_204=ETH +tm_port_header_type_in_205=INJECTED +tm_port_header_type_out_205=ETH +tm_port_header_type_in_206=INJECTED +tm_port_header_type_out_206=ETH +tm_port_header_type_in_207=INJECTED +tm_port_header_type_out_207=ETH + + +### RCY +sai_recycle_port_lane_base=215 +ucode_port_65=RCY0:core_0.65 +tm_port_header_type_out_65=ETH +tm_port_header_type_in_65=ETH +port_init_speed_65=800000 +appl_param_rcy_mirror_ports_range=100-164 +ucode_port_100=RCY_MIRROR.0:core_0.100 +ucode_port_101=RCY_MIRROR.1:core_1.101 +ucode_port_102=RCY_MIRROR.2:core_1.102 +ucode_port_103=RCY_MIRROR.3:core_1.103 +ucode_port_104=RCY_MIRROR.4:core_1.104 +ucode_port_105=RCY_MIRROR.5:core_1.105 +ucode_port_106=RCY_MIRROR.6:core_1.106 +ucode_port_107=RCY_MIRROR.7:core_1.107 +ucode_port_108=RCY_MIRROR.8:core_1.108 +ucode_port_109=RCY_MIRROR.9:core_3.109 +ucode_port_110=RCY_MIRROR.10:core_3.110 +ucode_port_111=RCY_MIRROR.11:core_3.111 +ucode_port_112=RCY_MIRROR.12:core_3.112 +ucode_port_113=RCY_MIRROR.13:core_3.113 +ucode_port_114=RCY_MIRROR.14:core_3.114 +ucode_port_115=RCY_MIRROR.15:core_3.115 +ucode_port_116=RCY_MIRROR.16:core_3.116 +ucode_port_117=RCY_MIRROR.17:core_2.117 +ucode_port_118=RCY_MIRROR.18:core_2.118 +ucode_port_119=RCY_MIRROR.19:core_2.119 +ucode_port_120=RCY_MIRROR.20:core_2.120 +ucode_port_121=RCY_MIRROR.21:core_2.121 +ucode_port_122=RCY_MIRROR.22:core_2.122 +ucode_port_123=RCY_MIRROR.23:core_2.123 +ucode_port_124=RCY_MIRROR.24:core_2.124 +ucode_port_125=RCY_MIRROR.25:core_0.125 +ucode_port_126=RCY_MIRROR.26:core_0.126 +ucode_port_127=RCY_MIRROR.27:core_0.127 +ucode_port_128=RCY_MIRROR.28:core_0.128 +ucode_port_129=RCY_MIRROR.29:core_0.129 +ucode_port_130=RCY_MIRROR.30:core_0.130 +ucode_port_131=RCY_MIRROR.31:core_0.131 +ucode_port_132=RCY_MIRROR.32:core_0.132 +ucode_port_133=RCY_MIRROR.33:core_5.133 +ucode_port_134=RCY_MIRROR.34:core_5.134 +ucode_port_135=RCY_MIRROR.35:core_5.135 +ucode_port_136=RCY_MIRROR.36:core_5.136 +ucode_port_137=RCY_MIRROR.37:core_5.137 +ucode_port_138=RCY_MIRROR.38:core_5.138 +ucode_port_139=RCY_MIRROR.39:core_5.139 +ucode_port_140=RCY_MIRROR.40:core_5.140 +ucode_port_141=RCY_MIRROR.41:core_7.141 +ucode_port_142=RCY_MIRROR.42:core_7.142 +ucode_port_143=RCY_MIRROR.43:core_7.143 +ucode_port_144=RCY_MIRROR.44:core_7.144 +ucode_port_145=RCY_MIRROR.45:core_7.145 +ucode_port_146=RCY_MIRROR.46:core_7.146 +ucode_port_147=RCY_MIRROR.47:core_7.147 +ucode_port_148=RCY_MIRROR.48:core_7.148 +ucode_port_149=RCY_MIRROR.49:core_6.149 +ucode_port_150=RCY_MIRROR.50:core_6.150 +ucode_port_151=RCY_MIRROR.51:core_6.151 +ucode_port_152=RCY_MIRROR.52:core_6.152 +ucode_port_153=RCY_MIRROR.53:core_6.153 +ucode_port_154=RCY_MIRROR.54:core_6.154 +ucode_port_155=RCY_MIRROR.55:core_6.155 +ucode_port_156=RCY_MIRROR.56:core_6.156 +ucode_port_157=RCY_MIRROR.57:core_4.157 +ucode_port_158=RCY_MIRROR.58:core_4.158 +ucode_port_159=RCY_MIRROR.59:core_4.159 +ucode_port_160=RCY_MIRROR.60:core_4.160 +ucode_port_161=RCY_MIRROR.61:core_4.161 +ucode_port_162=RCY_MIRROR.62:core_4.162 +ucode_port_163=RCY_MIRROR.63:core_4.163 +ucode_port_164=RCY_MIRROR.64:core_4.164 +rcy_mirror_to_forward_port_map_100=0 +rcy_mirror_to_forward_port_map_101=1 +rcy_mirror_to_forward_port_map_102=2 +rcy_mirror_to_forward_port_map_103=3 +rcy_mirror_to_forward_port_map_104=4 +rcy_mirror_to_forward_port_map_105=5 +rcy_mirror_to_forward_port_map_106=6 +rcy_mirror_to_forward_port_map_107=7 +rcy_mirror_to_forward_port_map_108=8 +rcy_mirror_to_forward_port_map_109=9 +rcy_mirror_to_forward_port_map_110=10 +rcy_mirror_to_forward_port_map_111=11 +rcy_mirror_to_forward_port_map_112=12 +rcy_mirror_to_forward_port_map_113=13 +rcy_mirror_to_forward_port_map_114=14 +rcy_mirror_to_forward_port_map_115=15 +rcy_mirror_to_forward_port_map_116=16 +rcy_mirror_to_forward_port_map_117=17 +rcy_mirror_to_forward_port_map_118=18 +rcy_mirror_to_forward_port_map_119=19 +rcy_mirror_to_forward_port_map_120=20 +rcy_mirror_to_forward_port_map_121=21 +rcy_mirror_to_forward_port_map_122=22 +rcy_mirror_to_forward_port_map_123=23 +rcy_mirror_to_forward_port_map_124=24 +rcy_mirror_to_forward_port_map_125=25 +rcy_mirror_to_forward_port_map_126=26 +rcy_mirror_to_forward_port_map_127=27 +rcy_mirror_to_forward_port_map_128=28 +rcy_mirror_to_forward_port_map_129=29 +rcy_mirror_to_forward_port_map_130=30 +rcy_mirror_to_forward_port_map_131=31 +rcy_mirror_to_forward_port_map_132=32 +rcy_mirror_to_forward_port_map_133=33 +rcy_mirror_to_forward_port_map_134=34 +rcy_mirror_to_forward_port_map_135=35 +rcy_mirror_to_forward_port_map_136=36 +rcy_mirror_to_forward_port_map_137=37 +rcy_mirror_to_forward_port_map_138=38 +rcy_mirror_to_forward_port_map_139=39 +rcy_mirror_to_forward_port_map_140=40 +rcy_mirror_to_forward_port_map_141=41 +rcy_mirror_to_forward_port_map_142=42 +rcy_mirror_to_forward_port_map_143=43 +rcy_mirror_to_forward_port_map_144=44 +rcy_mirror_to_forward_port_map_145=45 +rcy_mirror_to_forward_port_map_146=46 +rcy_mirror_to_forward_port_map_147=47 +rcy_mirror_to_forward_port_map_148=48 +rcy_mirror_to_forward_port_map_149=49 +rcy_mirror_to_forward_port_map_150=50 +rcy_mirror_to_forward_port_map_151=51 +rcy_mirror_to_forward_port_map_152=52 +rcy_mirror_to_forward_port_map_153=53 +rcy_mirror_to_forward_port_map_154=54 +rcy_mirror_to_forward_port_map_155=55 +rcy_mirror_to_forward_port_map_156=56 +rcy_mirror_to_forward_port_map_157=57 +rcy_mirror_to_forward_port_map_158=58 +rcy_mirror_to_forward_port_map_159=59 +rcy_mirror_to_forward_port_map_160=60 +rcy_mirror_to_forward_port_map_161=61 +rcy_mirror_to_forward_port_map_162=62 +rcy_mirror_to_forward_port_map_163=63 +rcy_mirror_to_forward_port_map_164=64 + +# Set statically the region mode per region id +dtm_flow_mapping_mode_region_257=3 +dtm_flow_mapping_mode_region_258=3 +dtm_flow_mapping_mode_region_259=3 +dtm_flow_mapping_mode_region_260=3 +dtm_flow_mapping_mode_region_261=3 +dtm_flow_mapping_mode_region_262=3 +dtm_flow_mapping_mode_region_263=3 +dtm_flow_mapping_mode_region_264=3 +dtm_flow_mapping_mode_region_265=3 +dtm_flow_mapping_mode_region_266=7 +dtm_flow_mapping_mode_region_267=3 +dtm_flow_mapping_mode_region_268=3 +dtm_flow_mapping_mode_region_269=3 +dtm_flow_mapping_mode_region_270=3 +dtm_flow_mapping_mode_region_271=3 +dtm_flow_mapping_mode_region_272=3 +dtm_flow_mapping_mode_region_273=3 +dtm_flow_mapping_mode_region_274=3 +dtm_flow_mapping_mode_region_275=3 +dtm_flow_mapping_mode_region_276=3 +dtm_flow_mapping_mode_region_277=3 +dtm_flow_mapping_mode_region_278=3 +dtm_flow_mapping_mode_region_279=3 +dtm_flow_mapping_mode_region_280=3 +dtm_flow_mapping_mode_region_281=3 +dtm_flow_mapping_mode_region_282=3 +dtm_flow_mapping_mode_region_283=3 +dtm_flow_mapping_mode_region_284=3 +dtm_flow_mapping_mode_region_285=3 +dtm_flow_mapping_mode_region_286=3 +dtm_flow_mapping_mode_region_287=3 + +## Configure number of symmetric cores each region supports ## +dtm_flow_nof_remote_cores_region_1=2 +dtm_flow_nof_remote_cores_region_2=2 +dtm_flow_nof_remote_cores_region_3=2 +dtm_flow_nof_remote_cores_region_4=2 +dtm_flow_nof_remote_cores_region_5=2 +dtm_flow_nof_remote_cores_region_6=2 +dtm_flow_nof_remote_cores_region_7=2 +dtm_flow_nof_remote_cores_region_8=2 +dtm_flow_nof_remote_cores_region_9=2 +dtm_flow_nof_remote_cores_region_10=2 +dtm_flow_nof_remote_cores_region_11=2 +dtm_flow_nof_remote_cores_region_12=2 +dtm_flow_nof_remote_cores_region_13=2 +dtm_flow_nof_remote_cores_region_14=2 +dtm_flow_nof_remote_cores_region_15=2 +dtm_flow_nof_remote_cores_region_16=2 +dtm_flow_nof_remote_cores_region_17=2 +dtm_flow_nof_remote_cores_region_18=2 +dtm_flow_nof_remote_cores_region_19=2 +dtm_flow_nof_remote_cores_region_20=2 +dtm_flow_nof_remote_cores_region_21=2 +dtm_flow_nof_remote_cores_region_22=2 +dtm_flow_nof_remote_cores_region_23=2 +dtm_flow_nof_remote_cores_region_24=2 +dtm_flow_nof_remote_cores_region_25=2 +dtm_flow_nof_remote_cores_region_26=2 +dtm_flow_nof_remote_cores_region_27=2 +dtm_flow_nof_remote_cores_region_28=2 +dtm_flow_nof_remote_cores_region_29=2 +dtm_flow_nof_remote_cores_region_30=2 +dtm_flow_nof_remote_cores_region_31=2 +dtm_flow_nof_remote_cores_region_32=2 +dtm_flow_nof_remote_cores_region_33=2 +dtm_flow_nof_remote_cores_region_34=2 +dtm_flow_nof_remote_cores_region_35=2 +dtm_flow_nof_remote_cores_region_36=2 +dtm_flow_nof_remote_cores_region_37=2 +dtm_flow_nof_remote_cores_region_38=2 +dtm_flow_nof_remote_cores_region_39=2 +dtm_flow_nof_remote_cores_region_40=2 +dtm_flow_nof_remote_cores_region_41=2 +dtm_flow_nof_remote_cores_region_42=2 +dtm_flow_nof_remote_cores_region_43=2 +dtm_flow_nof_remote_cores_region_44=2 +dtm_flow_nof_remote_cores_region_45=2 +dtm_flow_nof_remote_cores_region_46=2 +dtm_flow_nof_remote_cores_region_47=2 +dtm_flow_nof_remote_cores_region_48=2 +dtm_flow_nof_remote_cores_region_49=2 +dtm_flow_nof_remote_cores_region_50=2 +dtm_flow_nof_remote_cores_region_51=2 +dtm_flow_nof_remote_cores_region_52=2 +dtm_flow_nof_remote_cores_region_53=2 +dtm_flow_nof_remote_cores_region_54=2 +dtm_flow_nof_remote_cores_region_55=2 +dtm_flow_nof_remote_cores_region_56=2 +dtm_flow_nof_remote_cores_region_57=2 +dtm_flow_nof_remote_cores_region_58=2 +dtm_flow_nof_remote_cores_region_59=2 +dtm_flow_nof_remote_cores_region_60=2 + +### MDB configuration ### +mdb_profile=Elastic-Balanced + +### Descriptor-DMA configuration ### +dma_desc_aggregator_chain_length_max=1000 +dma_desc_aggregator_buff_size_kb=100 +dma_desc_aggregator_timeout_usec=1000 +dma_desc_aggregator_enable_specific_MDB_LPM=1 +dma_desc_aggregator_enable_specific_MDB_FEC=1 + +### Outlif configuarion ### +outlif_logical_to_physical_phase_map_1=S1 +outlif_logical_to_physical_phase_map_2=L1 +outlif_logical_to_physical_phase_map_3=XL +outlif_logical_to_physical_phase_map_4=L2 +outlif_logical_to_physical_phase_map_5=M1 +outlif_logical_to_physical_phase_map_6=M2 +outlif_logical_to_physical_phase_map_7=M3 +outlif_logical_to_physical_phase_map_8=S2 + +### Outlif data granularity configuration ### +outlif_physical_phase_data_granularity_S1=60 +outlif_physical_phase_data_granularity_S2=60 +outlif_physical_phase_data_granularity_M1=60 +outlif_physical_phase_data_granularity_M2=60 +outlif_physical_phase_data_granularity_M3=60 +outlif_physical_phase_data_granularity_L1=60 +outlif_physical_phase_data_granularity_L2=60 +outlif_physical_phase_data_granularity_XL=60 + +## Fabric transmission mode +# Set the Connect mode to the Fabric +# Options: FE - presence of a Fabric device (single stage) +# SINGLE_FAP - stand-alone device +# MESH - devices in Mesh +# Note: If 'diag_chassis' is on, value will be override in dnx.soc +# to be FE instead of SINGLE_FAP. +fabric_connect_mode=SINGLE_FAP + +# +##Protocol trap look-up mode: +# Options: IN_LIF - Look-ups in the profile table are done by IN-LIF +# IN_PORT - Look-ups in the profile table are done by IN-PORT +protocol_traps_mode=IN_LIF + +# access definitions +schan_intr_enable=0 +tdma_intr_enable=0 +tslam_intr_enable=0 +miim_intr_enable=0 +schan_timeout_usec=300000 +tdma_timeout_usec=1000000 +tslam_timeout_usec=1000000 + +### Interrupts +appl_enable_intr_init=1 +polled_irq_mode=0 +# reduce CPU load, configure delay 100ms +polled_irq_delay=1000 + +# reduce the CPU load over adapter (caused by counter thread) +bcm_stat_interval=1000000 + +# shadow memory +mem_cache_enable_ecc=1 +mem_cache_enable_parity=1 + +# serdes_nif/fabric_clk_freq_in/out configuration +serdes_nif_clk_freq_in=2 +serdes_nif_clk_freq_out=1 +serdes_fabric_clk_freq_in=2 +serdes_fabric_clk_freq_out=1 + +dport_map_direct=1 + +rif_id_max=0x2000 + +# Port Polarity +{% for phy, polarity_flip in bcm_port_lane_config['phy_polarity_flip']|dictsort -%} +phy_rx_polarity_flip_phy{{ phy }}={{ polarity_flip['rx'] }} +phy_tx_polarity_flip_phy{{ phy }}={{ polarity_flip['tx'] }} +{% endfor %} +appl_param_nof_ports_per_modid=66 +xflow_macsec_secure_chan_to_num_secure_assoc_encrypt=2 +xflow_macsec_secure_chan_to_num_secure_assoc_decrypt=4 +sai_pfc_dlr_init_capability=0 +sai_default_cpu_tx_tc=7 +sai_disable_srcmacqedstmac_ctrl=1 +appl_param_active_links_thr_high=91 +appl_param_active_links_thr_low=1 +sai_ecmp_group_members_increment=8 +sai_instru_stat_accum_enable=1 diff --git a/device/arista/x86_64-arista_7280r4_32qf_32df/chassisdb.conf b/device/arista/x86_64-arista_7280r4_32qf_32df/chassisdb.conf deleted file mode 100644 index 3ce45b2fb9c..00000000000 --- a/device/arista/x86_64-arista_7280r4_32qf_32df/chassisdb.conf +++ /dev/null @@ -1,4 +0,0 @@ -start_chassis_db=1 -chassis_db_address=240.127.1.1 -lag_id_start=1 -lag_id_end=1023 diff --git a/device/arista/x86_64-arista_7280r4_32qf_32df/installer.conf b/device/arista/x86_64-arista_7280r4_32qf_32df/installer.conf new file mode 100644 index 00000000000..d5dd67178b7 --- /dev/null +++ b/device/arista/x86_64-arista_7280r4_32qf_32df/installer.conf @@ -0,0 +1,2 @@ +ARISTA_SID="*CitrineDd" +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="modprobe.blacklist=snd_hda_intel,hdaudio,amd_sfh" diff --git a/device/arista/x86_64-arista_7280r4_32qf_32df/platform.json b/device/arista/x86_64-arista_7280r4_32qf_32df/platform.json index 786c61580b3..92e51518734 100644 --- a/device/arista/x86_64-arista_7280r4_32qf_32df/platform.json +++ b/device/arista/x86_64-arista_7280r4_32qf_32df/platform.json @@ -145,6 +145,62 @@ { "name": "D1 Temp diode 1", "controllable": false + }, + { + "name": "POS0V75_VDDC_D0", + "controllable": false + }, + { + "name": "POS3V3_OPTICS_A", + "controllable": false + }, + { + "name": "POS1V2_HBM_D0", + "controllable": false + }, + { + "name": "POS0V9_D0", + "controllable": false + }, + { + "name": "POS0V75_D0", + "controllable": false + }, + { + "name": "POS1V2_VAA_PHY", + "controllable": false + }, + { + "name": "POS0V75_VDD_PHY1", + "controllable": false + }, + { + "name": "POS0V75_VDD_PHY2", + "controllable": false + }, + { + "name": "POS0V75_VDDC_D1", + "controllable": false + }, + { + "name": "POS3V3_OPTICS_B", + "controllable": false + }, + { + "name": "POS1V2_HBM_D1", + "controllable": false + }, + { + "name": "POS0V9_D1", + "controllable": false + }, + { + "name": "POS0V75_D1", + "controllable": false + }, + { + "name": "POS0V8_PBVDD", + "controllable": false } ], "sfps": [ diff --git a/device/arista/x86_64-arista_7280r4_32qf_32df/platform_env.conf b/device/arista/x86_64-arista_7280r4_32qf_32df/platform_env.conf index a5640bdb87a..f227780a65b 100644 --- a/device/arista/x86_64-arista_7280r4_32qf_32df/platform_env.conf +++ b/device/arista/x86_64-arista_7280r4_32qf_32df/platform_env.conf @@ -1,4 +1,3 @@ SYNCD_SHM_SIZE=1gb dmasize=64M usemsi=1 -disaggregated_chassis=1 diff --git a/device/arista/x86_64-arista_7280r4_32qf_32df/sensors.conf b/device/arista/x86_64-arista_7280r4_32qf_32df/sensors.conf index 1e8a379fa41..921a4464e92 100644 --- a/device/arista/x86_64-arista_7280r4_32qf_32df/sensors.conf +++ b/device/arista/x86_64-arista_7280r4_32qf_32df/sensors.conf @@ -1,3 +1,86 @@ +bus "i2c-16" "SCD 0000:04:00.0 SMBus master 1 bus 3" +bus "i2c-19" "SCD 0000:06:00.0 SMBus master 0 bus 0" +bus "i2c-22" "SCD 0000:06:00.0 SMBus master 0 bus 3" +bus "i2c-23" "SCD 0000:06:00.0 SMBus master 0 bus 4" +bus "i2c-24" "SCD 0000:06:00.0 SMBus master 0 bus 5" +bus "i2c-25" "SCD 0000:06:00.0 SMBus master 0 bus 6" + +chip "k10temp-pci-00c3" + label temp1 "Cpu temp sensor" + +chip "tmp75-i2c-16-48" + label temp1 "Outlet" + +chip "tmp75-i2c-19-48" + label temp1 "Management Card" + +chip "amax31732-i2c-19-1c" + label temp1 "PCB Temp Near Q3D" + label temp2 "D0 Temp diode 0" + label temp3 "D0 Temp diode 1" + label temp4 "D1 Temp diode 0" + label temp5 "D1 Temp diode 1" + +chip "raa228228-i2c-24-45" + label temp1 "POS0V75_VDDC_D0" + label temp2 "POS3V3_OPTICS_A" + ignore temp3 + +chip "isl68226-i2c-24-4c" + label temp1 "POS1V2_HBM_D0" + label temp2 "POS0V9_D0" + label temp3 "POS0V75_D0" + ignore temp4 + ignore temp5 + ignore temp6 + ignore temp7 + +chip "isl68226-i2c-24-4f" + label temp1 "POS1V2_VAA_PHY" + label temp2 "POS0V75_VDD_PHY1" + label temp3 "POS0V75_VDD_PHY2" + ignore temp4 + ignore temp5 + ignore temp6 + ignore temp7 + +chip "raa228228-i2c-25-45" + label temp1 "POS0V75_VDDC_D1" + label temp2 "POS3V3_OPTICS_B" + ignore temp3 + +chip "isl68226-i2c-25-4c" + label temp1 "POS1V2_HBM_D1" + label temp2 "POS0V9_D1" + label temp3 "POS0V75_D1" + ignore temp4 + ignore temp5 + ignore temp6 + ignore temp7 + +chip "isl68223-i2c-25-47" + label temp1 "POS0V8_PBVDD" + ignore temp2 + ignore temp3 + ignore temp4 + ignore temp5 + +chip "dps800-i2c-22-58" + label temp1 "Power supply 1 inlet sensor" + label temp2 "Power supply 1 secondary hotspot sensor" + label temp3 "Power supply 1 primary hotspot sensor" + + ignore fan3 + ignore fan4 + +chip "dps800-i2c-23-58" + label temp1 "Power supply 2 inlet sensor" + label temp2 "Power supply 2 secondary hotspot sensor" + label temp3 "Power supply 2 primary hotspot sensor" + + ignore fan3 + ignore fan4 + chip "nvme-pci-0500" ignore temp2 ignore temp3 diff --git a/device/arista/x86_64-arista_7280r4_32qf_32df/services.conf b/device/arista/x86_64-arista_7280r4_32qf_32df/services.conf new file mode 100644 index 00000000000..2a0a236a8af --- /dev/null +++ b/device/arista/x86_64-arista_7280r4_32qf_32df/services.conf @@ -0,0 +1 @@ +startup_tsa_tsb.service diff --git a/device/arista/x86_64-arista_7280r4_32qf_32df/startup-tsa-tsb.conf b/device/arista/x86_64-arista_7280r4_32qf_32df/startup-tsa-tsb.conf new file mode 100644 index 00000000000..15033749325 --- /dev/null +++ b/device/arista/x86_64-arista_7280r4_32qf_32df/startup-tsa-tsb.conf @@ -0,0 +1 @@ +STARTUP_TSB_TIMER=900 diff --git a/device/arista/x86_64-arista_7280r4k_32qf_32df/chassisdb.conf b/device/arista/x86_64-arista_7280r4k_32qf_32df/chassisdb.conf deleted file mode 120000 index 47fda17eed7..00000000000 --- a/device/arista/x86_64-arista_7280r4k_32qf_32df/chassisdb.conf +++ /dev/null @@ -1 +0,0 @@ -../x86_64-arista_7280r4_32qf_32df/chassisdb.conf \ No newline at end of file diff --git a/device/arista/x86_64-arista_7280r4k_32qf_32df/installer.conf b/device/arista/x86_64-arista_7280r4k_32qf_32df/installer.conf new file mode 100644 index 00000000000..3dbfa81e3d7 --- /dev/null +++ b/device/arista/x86_64-arista_7280r4k_32qf_32df/installer.conf @@ -0,0 +1,2 @@ +ARISTA_SID="*CitrineDdBk" +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="modprobe.blacklist=snd_hda_intel,hdaudio,amd_sfh" diff --git a/device/arista/x86_64-arista_7280r4k_32qf_32df/platform.json b/device/arista/x86_64-arista_7280r4k_32qf_32df/platform.json index 266d88a5d41..1891eddc6d6 100644 --- a/device/arista/x86_64-arista_7280r4k_32qf_32df/platform.json +++ b/device/arista/x86_64-arista_7280r4k_32qf_32df/platform.json @@ -145,6 +145,62 @@ { "name": "D1 Temp diode 1", "controllable": false + }, + { + "name": "POS0V75_VDDC_D0", + "controllable": false + }, + { + "name": "POS3V3_OPTICS_A", + "controllable": false + }, + { + "name": "POS1V2_HBM_D0", + "controllable": false + }, + { + "name": "POS0V9_D0", + "controllable": false + }, + { + "name": "POS0V75_D0", + "controllable": false + }, + { + "name": "POS1V2_VAA_PHY", + "controllable": false + }, + { + "name": "POS0V75_VDD_PHY1", + "controllable": false + }, + { + "name": "POS0V75_VDD_PHY2", + "controllable": false + }, + { + "name": "POS0V75_VDDC_D1", + "controllable": false + }, + { + "name": "POS3V3_OPTICS_B", + "controllable": false + }, + { + "name": "POS1V2_HBM_D1", + "controllable": false + }, + { + "name": "POS0V9_D1", + "controllable": false + }, + { + "name": "POS0V75_D1", + "controllable": false + }, + { + "name": "POS0V8_PBVDD", + "controllable": false } ], "sfps": [ diff --git a/device/arista/x86_64-arista_7280r4k_32qf_32df/platform_env.conf b/device/arista/x86_64-arista_7280r4k_32qf_32df/platform_env.conf index cbf9b6975e3..bd9184f1b89 100644 --- a/device/arista/x86_64-arista_7280r4k_32qf_32df/platform_env.conf +++ b/device/arista/x86_64-arista_7280r4k_32qf_32df/platform_env.conf @@ -1,5 +1,4 @@ SYNCD_SHM_SIZE=1gb dmasize=64M usemsi=1 -disaggregated_chassis=1 macsec_enabled=1 diff --git a/device/arista/x86_64-arista_7280r4k_32qf_32df/services.conf b/device/arista/x86_64-arista_7280r4k_32qf_32df/services.conf new file mode 120000 index 00000000000..1126a0a50cf --- /dev/null +++ b/device/arista/x86_64-arista_7280r4k_32qf_32df/services.conf @@ -0,0 +1 @@ +../x86_64-arista_7280r4_32qf_32df/services.conf \ No newline at end of file diff --git a/device/arista/x86_64-arista_7280r4k_32qf_32df/startup-tsa-tsb.conf b/device/arista/x86_64-arista_7280r4k_32qf_32df/startup-tsa-tsb.conf new file mode 120000 index 00000000000..082f4e44b05 --- /dev/null +++ b/device/arista/x86_64-arista_7280r4k_32qf_32df/startup-tsa-tsb.conf @@ -0,0 +1 @@ +../x86_64-arista_7280r4_32qf_32df/startup-tsa-tsb.conf \ No newline at end of file diff --git a/device/arista/x86_64-arista_7800r3_48cq2_lc/Arista-7800R3-48CQ2-C48/jr2-a7280cr3-32d4-40x100G.config.bcm b/device/arista/x86_64-arista_7800r3_48cq2_lc/Arista-7800R3-48CQ2-C48/jr2-a7280cr3-32d4-40x100G.config.bcm index fd144c75440..b7332cc204d 100644 --- a/device/arista/x86_64-arista_7800r3_48cq2_lc/Arista-7800R3-48CQ2-C48/jr2-a7280cr3-32d4-40x100G.config.bcm +++ b/device/arista/x86_64-arista_7800r3_48cq2_lc/Arista-7800R3-48CQ2-C48/jr2-a7280cr3-32d4-40x100G.config.bcm @@ -485,16 +485,16 @@ ucode_port_154.BCM8869X=RCY_MIRROR.27:core_1.142 port_priorities.BCM8869X=8 -tm_port_header_type_in_0.BCM8869X=INJECTED_2_PP +tm_port_header_type_in_0.BCM8869X=INJECTED tm_port_header_type_out_0.BCM8869X=CPU -tm_port_header_type_in_200.BCM8869X=INJECTED_2_PP +tm_port_header_type_in_200.BCM8869X=INJECTED tm_port_header_type_out_200.BCM8869X=ETH -tm_port_header_type_in_201.BCM8869X=INJECTED_2_PP +tm_port_header_type_in_201.BCM8869X=INJECTED tm_port_header_type_out_201.BCM8869X=ETH -tm_port_header_type_in_202.BCM8869X=INJECTED_2_PP +tm_port_header_type_in_202.BCM8869X=INJECTED tm_port_header_type_out_202.BCM8869X=ETH -tm_port_header_type_in_203.BCM8869X=INJECTED_2_PP +tm_port_header_type_in_203.BCM8869X=INJECTED tm_port_header_type_out_203.BCM8869X=ETH sat_enable.BCM8869X=1 @@ -866,3 +866,5 @@ sai_disable_srcmacqedstmac_ctrl=1 appl_param_active_links_thr_high=58 appl_param_active_links_thr_low=1 custom_feature_start_tx_threshold=20 +sai_ecmp_group_members_increment=8 +sai_instru_stat_accum_enable=1 diff --git a/device/arista/x86_64-arista_7800r3_48cq2_lc/Arista-7800R3-48CQ2-C48/sai_postinit_cmd.soc b/device/arista/x86_64-arista_7800r3_48cq2_lc/Arista-7800R3-48CQ2-C48/sai_postinit_cmd.soc index 2fce7563d90..9003e99ee4c 100644 --- a/device/arista/x86_64-arista_7800r3_48cq2_lc/Arista-7800R3-48CQ2-C48/sai_postinit_cmd.soc +++ b/device/arista/x86_64-arista_7800r3_48cq2_lc/Arista-7800R3-48CQ2-C48/sai_postinit_cmd.soc @@ -1,28 +1,59 @@ -INTeRrupt ENAble id=1550 -INTeRrupt ENAble id=1551 -INTeRrupt ENAble id=1552 -INTeRrupt ENAble id=1553 -INTeRrupt ENAble id=1554 -INTeRrupt ENAble id=1555 -INTeRrupt ENAble id=1556 -INTeRrupt ENAble id=1557 -INTeRrupt ENAble id=1558 -INTeRrupt ENAble id=1559 -INTeRrupt ENAble id=1560 -INTeRrupt ENAble id=1561 -INTeRrupt ENAble id=1562 -INTeRrupt ENAble id=1563 -INTeRrupt ENAble id=1564 -INTeRrupt ENAble id=1565 -INTeRrupt ENAble id=1566 -INTeRrupt ENAble id=1567 +# Core=0 +INTeRrupt ENAble id=1550 p=0 +INTeRrupt ENAble id=1551 p=0 +INTeRrupt ENAble id=1552 p=0 +INTeRrupt ENAble id=1553 p=0 +INTeRrupt ENAble id=1554 p=0 +INTeRrupt ENAble id=1555 p=0 +INTeRrupt ENAble id=1556 p=0 +INTeRrupt ENAble id=1557 p=0 +INTeRrupt ENAble id=1558 p=0 +INTeRrupt ENAble id=1559 p=0 +INTeRrupt ENAble id=1560 p=0 +INTeRrupt ENAble id=1561 p=0 +INTeRrupt ENAble id=1562 p=0 +INTeRrupt ENAble id=1563 p=0 +INTeRrupt ENAble id=1564 p=0 +INTeRrupt ENAble id=1565 p=0 +INTeRrupt ENAble id=1566 p=0 +INTeRrupt ENAble id=1567 p=0 -INTeRrupt ENAble id=1296 -INTeRrupt ENAble id=1297 -INTeRrupt ENAble id=1298 -INTeRrupt ENAble id=1299 -INTeRrupt ENAble id=1661 -INTeRrupt ENAble id=1662 +INTeRrupt ENAble id=1296 p=0 +INTeRrupt ENAble id=1297 p=0 +INTeRrupt ENAble id=1298 p=0 +INTeRrupt ENAble id=1299 p=0 +INTeRrupt ENAble id=1661 p=0 +INTeRrupt ENAble id=1662 p=0 + +INTeRrupt ENAble id=1093 p=0 + +# Core=1 +INTeRrupt ENAble id=1550 p=1 +INTeRrupt ENAble id=1551 p=1 +INTeRrupt ENAble id=1552 p=1 +INTeRrupt ENAble id=1553 p=1 +INTeRrupt ENAble id=1554 p=1 +INTeRrupt ENAble id=1555 p=1 +INTeRrupt ENAble id=1556 p=1 +INTeRrupt ENAble id=1557 p=1 +INTeRrupt ENAble id=1558 p=1 +INTeRrupt ENAble id=1559 p=1 +INTeRrupt ENAble id=1560 p=1 +INTeRrupt ENAble id=1561 p=1 +INTeRrupt ENAble id=1562 p=1 +INTeRrupt ENAble id=1563 p=1 +INTeRrupt ENAble id=1564 p=1 +INTeRrupt ENAble id=1565 p=1 +INTeRrupt ENAble id=1566 p=1 +INTeRrupt ENAble id=1567 p=1 + +INTeRrupt ENAble id=1296 p=1 +INTeRrupt ENAble id=1297 p=1 +INTeRrupt ENAble id=1298 p=1 +INTeRrupt ENAble id=1299 p=1 +INTeRrupt ENAble id=1661 p=1 +INTeRrupt ENAble id=1662 p=1 + +INTeRrupt ENAble id=1093 p=1 -INTeRrupt ENAble id=1093 debug intr error diff --git a/device/arista/x86_64-arista_7800r3_48cq2_lc/platform_env.conf b/device/arista/x86_64-arista_7800r3_48cq2_lc/platform_env.conf index 76c93ccf17c..d07cd771b9b 100644 --- a/device/arista/x86_64-arista_7800r3_48cq2_lc/platform_env.conf +++ b/device/arista/x86_64-arista_7800r3_48cq2_lc/platform_env.conf @@ -1,3 +1,3 @@ SYNCD_SHM_SIZE=1gb usemsi=1 -dmasize=512M +dmasize=32M diff --git a/device/arista/x86_64-arista_7800r3_48cqm2_lc/Arista-7800R3-48CQM2-C48/gearbox_config.json b/device/arista/x86_64-arista_7800r3_48cqm2_lc/Arista-7800R3-48CQM2-C48/gearbox_config.json index b082868e95b..d59d3bea1c9 100644 --- a/device/arista/x86_64-arista_7800r3_48cqm2_lc/Arista-7800R3-48CQM2-C48/gearbox_config.json +++ b/device/arista/x86_64-arista_7800r3_48cqm2_lc/Arista-7800R3-48CQM2-C48/gearbox_config.json @@ -5,7 +5,7 @@ "name": "phy1", "address": "1", "lib_name": "", - "firmware_path": "/usr/etc/credo/firmware/owl.lz4.fw.1.94.0.bin", + "firmware_path": "/usr/etc/credo/firmware/owl", "config_file": "/usr/share/sonic/hwsku/phy1_config.json", "sai_init_config_file": "", "phy_access": "mdio", @@ -19,7 +19,7 @@ "name": "phy2", "address": "2", "lib_name": "", - "firmware_path": "/usr/etc/credo/firmware/owl.lz4.fw.1.94.0.bin", + "firmware_path": "/usr/etc/credo/firmware/owl", "config_file": "/usr/share/sonic/hwsku/phy2_config.json", "sai_init_config_file": "", "phy_access": "mdio", @@ -33,7 +33,7 @@ "name": "phy3", "address": "3", "lib_name": "", - "firmware_path": "/usr/etc/credo/firmware/owl.lz4.fw.1.94.0.bin", + "firmware_path": "/usr/etc/credo/firmware/owl", "config_file": "/usr/share/sonic/hwsku/phy3_config.json", "sai_init_config_file": "", "phy_access": "mdio", @@ -47,7 +47,7 @@ "name": "phy4", "address": "4", "lib_name": "", - "firmware_path": "/usr/etc/credo/firmware/owl.lz4.fw.1.94.0.bin", + "firmware_path": "/usr/etc/credo/firmware/owl", "config_file": "/usr/share/sonic/hwsku/phy4_config.json", "sai_init_config_file": "", "phy_access": "mdio", @@ -61,7 +61,7 @@ "name": "phy5", "address": "5", "lib_name": "", - "firmware_path": "/usr/etc/credo/firmware/owl.lz4.fw.1.94.0.bin", + "firmware_path": "/usr/etc/credo/firmware/owl", "config_file": "/usr/share/sonic/hwsku/phy5_config.json", "sai_init_config_file": "", "phy_access": "mdio", @@ -75,7 +75,7 @@ "name": "phy6", "address": "6", "lib_name": "", - "firmware_path": "/usr/etc/credo/firmware/owl.lz4.fw.1.94.0.bin", + "firmware_path": "/usr/etc/credo/firmware/owl", "config_file": "/usr/share/sonic/hwsku/phy6_config.json", "sai_init_config_file": "", "phy_access": "mdio", @@ -89,7 +89,7 @@ "name": "phy7", "address": "7", "lib_name": "", - "firmware_path": "/usr/etc/credo/firmware/owl.lz4.fw.1.94.0.bin", + "firmware_path": "/usr/etc/credo/firmware/owl", "config_file": "/usr/share/sonic/hwsku/phy7_config.json", "sai_init_config_file": "", "phy_access": "mdio", @@ -103,7 +103,7 @@ "name": "phy8", "address": "8", "lib_name": "", - "firmware_path": "/usr/etc/credo/firmware/owl.lz4.fw.1.94.0.bin", + "firmware_path": "/usr/etc/credo/firmware/owl", "config_file": "/usr/share/sonic/hwsku/phy8_config.json", "sai_init_config_file": "", "phy_access": "mdio", @@ -117,7 +117,7 @@ "name": "phy9", "address": "9", "lib_name": "", - "firmware_path": "/usr/etc/credo/firmware/owl.lz4.fw.1.94.0.bin", + "firmware_path": "/usr/etc/credo/firmware/owl", "config_file": "/usr/share/sonic/hwsku/phy9_config.json", "sai_init_config_file": "", "phy_access": "mdio", @@ -131,7 +131,7 @@ "name": "phy10", "address": "10", "lib_name": "", - "firmware_path": "/usr/etc/credo/firmware/owl.lz4.fw.1.94.0.bin", + "firmware_path": "/usr/etc/credo/firmware/owl", "config_file": "/usr/share/sonic/hwsku/phy10_config.json", "sai_init_config_file": "", "phy_access": "mdio", @@ -145,7 +145,7 @@ "name": "phy11", "address": "11", "lib_name": "", - "firmware_path": "/usr/etc/credo/firmware/owl.lz4.fw.1.94.0.bin", + "firmware_path": "/usr/etc/credo/firmware/owl", "config_file": "/usr/share/sonic/hwsku/phy11_config.json", "sai_init_config_file": "", "phy_access": "mdio", @@ -159,7 +159,7 @@ "name": "phy12", "address": "12", "lib_name": "", - "firmware_path": "/usr/etc/credo/firmware/owl.lz4.fw.1.94.0.bin", + "firmware_path": "/usr/etc/credo/firmware/owl", "config_file": "/usr/share/sonic/hwsku/phy12_config.json", "sai_init_config_file": "", "phy_access": "mdio", diff --git a/device/arista/x86_64-arista_7800r3_48cqm2_lc/Arista-7800R3-48CQM2-C48/sai_postinit_cmd.soc b/device/arista/x86_64-arista_7800r3_48cqm2_lc/Arista-7800R3-48CQM2-C48/sai_postinit_cmd.soc index 2fce7563d90..9003e99ee4c 100644 --- a/device/arista/x86_64-arista_7800r3_48cqm2_lc/Arista-7800R3-48CQM2-C48/sai_postinit_cmd.soc +++ b/device/arista/x86_64-arista_7800r3_48cqm2_lc/Arista-7800R3-48CQM2-C48/sai_postinit_cmd.soc @@ -1,28 +1,59 @@ -INTeRrupt ENAble id=1550 -INTeRrupt ENAble id=1551 -INTeRrupt ENAble id=1552 -INTeRrupt ENAble id=1553 -INTeRrupt ENAble id=1554 -INTeRrupt ENAble id=1555 -INTeRrupt ENAble id=1556 -INTeRrupt ENAble id=1557 -INTeRrupt ENAble id=1558 -INTeRrupt ENAble id=1559 -INTeRrupt ENAble id=1560 -INTeRrupt ENAble id=1561 -INTeRrupt ENAble id=1562 -INTeRrupt ENAble id=1563 -INTeRrupt ENAble id=1564 -INTeRrupt ENAble id=1565 -INTeRrupt ENAble id=1566 -INTeRrupt ENAble id=1567 +# Core=0 +INTeRrupt ENAble id=1550 p=0 +INTeRrupt ENAble id=1551 p=0 +INTeRrupt ENAble id=1552 p=0 +INTeRrupt ENAble id=1553 p=0 +INTeRrupt ENAble id=1554 p=0 +INTeRrupt ENAble id=1555 p=0 +INTeRrupt ENAble id=1556 p=0 +INTeRrupt ENAble id=1557 p=0 +INTeRrupt ENAble id=1558 p=0 +INTeRrupt ENAble id=1559 p=0 +INTeRrupt ENAble id=1560 p=0 +INTeRrupt ENAble id=1561 p=0 +INTeRrupt ENAble id=1562 p=0 +INTeRrupt ENAble id=1563 p=0 +INTeRrupt ENAble id=1564 p=0 +INTeRrupt ENAble id=1565 p=0 +INTeRrupt ENAble id=1566 p=0 +INTeRrupt ENAble id=1567 p=0 -INTeRrupt ENAble id=1296 -INTeRrupt ENAble id=1297 -INTeRrupt ENAble id=1298 -INTeRrupt ENAble id=1299 -INTeRrupt ENAble id=1661 -INTeRrupt ENAble id=1662 +INTeRrupt ENAble id=1296 p=0 +INTeRrupt ENAble id=1297 p=0 +INTeRrupt ENAble id=1298 p=0 +INTeRrupt ENAble id=1299 p=0 +INTeRrupt ENAble id=1661 p=0 +INTeRrupt ENAble id=1662 p=0 + +INTeRrupt ENAble id=1093 p=0 + +# Core=1 +INTeRrupt ENAble id=1550 p=1 +INTeRrupt ENAble id=1551 p=1 +INTeRrupt ENAble id=1552 p=1 +INTeRrupt ENAble id=1553 p=1 +INTeRrupt ENAble id=1554 p=1 +INTeRrupt ENAble id=1555 p=1 +INTeRrupt ENAble id=1556 p=1 +INTeRrupt ENAble id=1557 p=1 +INTeRrupt ENAble id=1558 p=1 +INTeRrupt ENAble id=1559 p=1 +INTeRrupt ENAble id=1560 p=1 +INTeRrupt ENAble id=1561 p=1 +INTeRrupt ENAble id=1562 p=1 +INTeRrupt ENAble id=1563 p=1 +INTeRrupt ENAble id=1564 p=1 +INTeRrupt ENAble id=1565 p=1 +INTeRrupt ENAble id=1566 p=1 +INTeRrupt ENAble id=1567 p=1 + +INTeRrupt ENAble id=1296 p=1 +INTeRrupt ENAble id=1297 p=1 +INTeRrupt ENAble id=1298 p=1 +INTeRrupt ENAble id=1299 p=1 +INTeRrupt ENAble id=1661 p=1 +INTeRrupt ENAble id=1662 p=1 + +INTeRrupt ENAble id=1093 p=1 -INTeRrupt ENAble id=1093 debug intr error diff --git a/device/arista/x86_64-arista_7800r3_48cqm2_lc/platform_env.conf b/device/arista/x86_64-arista_7800r3_48cqm2_lc/platform_env.conf index 76c93ccf17c..d07cd771b9b 100644 --- a/device/arista/x86_64-arista_7800r3_48cqm2_lc/platform_env.conf +++ b/device/arista/x86_64-arista_7800r3_48cqm2_lc/platform_env.conf @@ -1,3 +1,3 @@ SYNCD_SHM_SIZE=1gb usemsi=1 -dmasize=512M +dmasize=32M diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/0/j2p-a7800r3a-36d-36x400G.config.bcm b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/0/j2p-a7800r3a-36d-36x400G.config.bcm index 0edb735f6ee..26d0a80fb9d 100644 --- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/0/j2p-a7800r3a-36d-36x400G.config.bcm +++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/0/j2p-a7800r3a-36d-36x400G.config.bcm @@ -240,16 +240,16 @@ stable_size=800000000 ######################### ######################### -tm_port_header_type_in_0=INJECTED_2_PP +tm_port_header_type_in_0=INJECTED tm_port_header_type_out_0=CPU -tm_port_header_type_in_200=INJECTED_2_PP +tm_port_header_type_in_200=INJECTED tm_port_header_type_out_200=ETH -tm_port_header_type_in_201=INJECTED_2_PP +tm_port_header_type_in_201=INJECTED tm_port_header_type_out_201=ETH -tm_port_header_type_in_202=INJECTED_2_PP +tm_port_header_type_in_202=INJECTED tm_port_header_type_out_202=ETH -tm_port_header_type_in_203=INJECTED_2_PP +tm_port_header_type_in_203=INJECTED tm_port_header_type_out_203=ETH ### RCY @@ -1020,3 +1020,5 @@ sai_disable_srcmacqedstmac_ctrl=1 appl_param_active_links_thr_high=91 appl_param_active_links_thr_low=1 custom_feature_start_tx_threshold=20 +sai_ecmp_group_members_increment=8 +sai_instru_stat_accum_enable=1 diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/0/sai_postinit_cmd.soc b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/0/sai_postinit_cmd.soc index 80338902b82..1c60ec09883 100644 --- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/0/sai_postinit_cmd.soc +++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/0/sai_postinit_cmd.soc @@ -1,29 +1,61 @@ -INTeRrupt ENAble id=2209 -INTeRrupt ENAble id=2210 -INTeRrupt ENAble id=2211 -INTeRrupt ENAble id=2212 -INTeRrupt ENAble id=2213 -INTeRrupt ENAble id=2214 -INTeRrupt ENAble id=2215 -INTeRrupt ENAble id=2216 -INTeRrupt ENAble id=2217 -INTeRrupt ENAble id=2218 -INTeRrupt ENAble id=2219 -INTeRrupt ENAble id=2220 -INTeRrupt ENAble id=2221 -INTeRrupt ENAble id=2222 -INTeRrupt ENAble id=2223 -INTeRrupt ENAble id=2224 -INTeRrupt ENAble id=2225 -INTeRrupt ENAble id=2226 +# Core=0 +INTeRrupt ENAble id=2209 p=0 +INTeRrupt ENAble id=2210 p=0 +INTeRrupt ENAble id=2211 p=0 +INTeRrupt ENAble id=2212 p=0 +INTeRrupt ENAble id=2213 p=0 +INTeRrupt ENAble id=2214 p=0 +INTeRrupt ENAble id=2215 p=0 +INTeRrupt ENAble id=2216 p=0 +INTeRrupt ENAble id=2217 p=0 +INTeRrupt ENAble id=2218 p=0 +INTeRrupt ENAble id=2219 p=0 +INTeRrupt ENAble id=2220 p=0 +INTeRrupt ENAble id=2221 p=0 +INTeRrupt ENAble id=2222 p=0 +INTeRrupt ENAble id=2223 p=0 +INTeRrupt ENAble id=2224 p=0 +INTeRrupt ENAble id=2225 p=0 +INTeRrupt ENAble id=2226 p=0 -INTeRrupt ENAble id=482 -INTeRrupt ENAble id=483 -INTeRrupt ENAble id=484 -INTeRrupt ENAble id=485 -INTeRrupt ENAble id=486 -INTeRrupt ENAble id=487 -INTeRrupt ENAble id=488 +INTeRrupt ENAble id=482 p=0 +INTeRrupt ENAble id=483 p=0 +INTeRrupt ENAble id=484 p=0 +INTeRrupt ENAble id=485 p=0 +INTeRrupt ENAble id=486 p=0 +INTeRrupt ENAble id=487 p=0 +INTeRrupt ENAble id=488 p=0 -INTeRrupt ENAble id=1597 -debug intr error \ No newline at end of file +INTeRrupt ENAble id=1597 p=0 + +# Core=1 +INTeRrupt ENAble id=2209 p=1 +INTeRrupt ENAble id=2210 p=1 +INTeRrupt ENAble id=2211 p=1 +INTeRrupt ENAble id=2212 p=1 +INTeRrupt ENAble id=2213 p=1 +INTeRrupt ENAble id=2214 p=1 +INTeRrupt ENAble id=2215 p=1 +INTeRrupt ENAble id=2216 p=1 +INTeRrupt ENAble id=2217 p=1 +INTeRrupt ENAble id=2218 p=1 +INTeRrupt ENAble id=2219 p=1 +INTeRrupt ENAble id=2220 p=1 +INTeRrupt ENAble id=2221 p=1 +INTeRrupt ENAble id=2222 p=1 +INTeRrupt ENAble id=2223 p=1 +INTeRrupt ENAble id=2224 p=1 +INTeRrupt ENAble id=2225 p=1 +INTeRrupt ENAble id=2226 p=1 + +INTeRrupt ENAble id=482 p=1 +INTeRrupt ENAble id=483 p=1 +INTeRrupt ENAble id=484 p=1 +INTeRrupt ENAble id=485 p=1 +INTeRrupt ENAble id=486 p=1 +INTeRrupt ENAble id=487 p=1 +INTeRrupt ENAble id=488 p=1 + +INTeRrupt ENAble id=1597 p=1 + +debug intr error diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/1/j2p-a7800r3a-36d-36x400G.config.bcm b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/1/j2p-a7800r3a-36d-36x400G.config.bcm index eb9d27f3ade..3cc1fcb5a1a 100644 --- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/1/j2p-a7800r3a-36d-36x400G.config.bcm +++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/1/j2p-a7800r3a-36d-36x400G.config.bcm @@ -240,16 +240,16 @@ stable_size=800000000 ######################### ######################### -tm_port_header_type_in_0=INJECTED_2_PP +tm_port_header_type_in_0=INJECTED tm_port_header_type_out_0=CPU -tm_port_header_type_in_200=INJECTED_2_PP +tm_port_header_type_in_200=INJECTED tm_port_header_type_out_200=ETH -tm_port_header_type_in_201=INJECTED_2_PP +tm_port_header_type_in_201=INJECTED tm_port_header_type_out_201=ETH -tm_port_header_type_in_202=INJECTED_2_PP +tm_port_header_type_in_202=INJECTED tm_port_header_type_out_202=ETH -tm_port_header_type_in_203=INJECTED_2_PP +tm_port_header_type_in_203=INJECTED tm_port_header_type_out_203=ETH ### RCY @@ -1020,3 +1020,5 @@ sai_disable_srcmacqedstmac_ctrl=1 appl_param_active_links_thr_high=91 appl_param_active_links_thr_low=1 custom_feature_start_tx_threshold=20 +sai_ecmp_group_members_increment=8 +sai_instru_stat_accum_enable=1 diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/1/sai_postinit_cmd.soc b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/1/sai_postinit_cmd.soc index 80338902b82..1c60ec09883 100644 --- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/1/sai_postinit_cmd.soc +++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C36/1/sai_postinit_cmd.soc @@ -1,29 +1,61 @@ -INTeRrupt ENAble id=2209 -INTeRrupt ENAble id=2210 -INTeRrupt ENAble id=2211 -INTeRrupt ENAble id=2212 -INTeRrupt ENAble id=2213 -INTeRrupt ENAble id=2214 -INTeRrupt ENAble id=2215 -INTeRrupt ENAble id=2216 -INTeRrupt ENAble id=2217 -INTeRrupt ENAble id=2218 -INTeRrupt ENAble id=2219 -INTeRrupt ENAble id=2220 -INTeRrupt ENAble id=2221 -INTeRrupt ENAble id=2222 -INTeRrupt ENAble id=2223 -INTeRrupt ENAble id=2224 -INTeRrupt ENAble id=2225 -INTeRrupt ENAble id=2226 +# Core=0 +INTeRrupt ENAble id=2209 p=0 +INTeRrupt ENAble id=2210 p=0 +INTeRrupt ENAble id=2211 p=0 +INTeRrupt ENAble id=2212 p=0 +INTeRrupt ENAble id=2213 p=0 +INTeRrupt ENAble id=2214 p=0 +INTeRrupt ENAble id=2215 p=0 +INTeRrupt ENAble id=2216 p=0 +INTeRrupt ENAble id=2217 p=0 +INTeRrupt ENAble id=2218 p=0 +INTeRrupt ENAble id=2219 p=0 +INTeRrupt ENAble id=2220 p=0 +INTeRrupt ENAble id=2221 p=0 +INTeRrupt ENAble id=2222 p=0 +INTeRrupt ENAble id=2223 p=0 +INTeRrupt ENAble id=2224 p=0 +INTeRrupt ENAble id=2225 p=0 +INTeRrupt ENAble id=2226 p=0 -INTeRrupt ENAble id=482 -INTeRrupt ENAble id=483 -INTeRrupt ENAble id=484 -INTeRrupt ENAble id=485 -INTeRrupt ENAble id=486 -INTeRrupt ENAble id=487 -INTeRrupt ENAble id=488 +INTeRrupt ENAble id=482 p=0 +INTeRrupt ENAble id=483 p=0 +INTeRrupt ENAble id=484 p=0 +INTeRrupt ENAble id=485 p=0 +INTeRrupt ENAble id=486 p=0 +INTeRrupt ENAble id=487 p=0 +INTeRrupt ENAble id=488 p=0 -INTeRrupt ENAble id=1597 -debug intr error \ No newline at end of file +INTeRrupt ENAble id=1597 p=0 + +# Core=1 +INTeRrupt ENAble id=2209 p=1 +INTeRrupt ENAble id=2210 p=1 +INTeRrupt ENAble id=2211 p=1 +INTeRrupt ENAble id=2212 p=1 +INTeRrupt ENAble id=2213 p=1 +INTeRrupt ENAble id=2214 p=1 +INTeRrupt ENAble id=2215 p=1 +INTeRrupt ENAble id=2216 p=1 +INTeRrupt ENAble id=2217 p=1 +INTeRrupt ENAble id=2218 p=1 +INTeRrupt ENAble id=2219 p=1 +INTeRrupt ENAble id=2220 p=1 +INTeRrupt ENAble id=2221 p=1 +INTeRrupt ENAble id=2222 p=1 +INTeRrupt ENAble id=2223 p=1 +INTeRrupt ENAble id=2224 p=1 +INTeRrupt ENAble id=2225 p=1 +INTeRrupt ENAble id=2226 p=1 + +INTeRrupt ENAble id=482 p=1 +INTeRrupt ENAble id=483 p=1 +INTeRrupt ENAble id=484 p=1 +INTeRrupt ENAble id=485 p=1 +INTeRrupt ENAble id=486 p=1 +INTeRrupt ENAble id=487 p=1 +INTeRrupt ENAble id=488 p=1 + +INTeRrupt ENAble id=1597 p=1 + +debug intr error diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/0/j2p-a7800r3a-36d-36x400G.config.bcm b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/0/j2p-a7800r3a-36d-36x400G.config.bcm index 24aaf4a1127..6c1084c2cb3 100644 --- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/0/j2p-a7800r3a-36d-36x400G.config.bcm +++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/0/j2p-a7800r3a-36d-36x400G.config.bcm @@ -258,16 +258,16 @@ stable_size=800000000 ######################### ######################### -tm_port_header_type_in_0=INJECTED_2_PP +tm_port_header_type_in_0=INJECTED tm_port_header_type_out_0=CPU -tm_port_header_type_in_200=INJECTED_2_PP +tm_port_header_type_in_200=INJECTED tm_port_header_type_out_200=ETH -tm_port_header_type_in_201=INJECTED_2_PP +tm_port_header_type_in_201=INJECTED tm_port_header_type_out_201=ETH -tm_port_header_type_in_202=INJECTED_2_PP +tm_port_header_type_in_202=INJECTED tm_port_header_type_out_202=ETH -tm_port_header_type_in_203=INJECTED_2_PP +tm_port_header_type_in_203=INJECTED tm_port_header_type_out_203=ETH ### RCY @@ -1037,3 +1037,5 @@ sai_disable_srcmacqedstmac_ctrl=1 appl_param_active_links_thr_high=91 appl_param_active_links_thr_low=1 custom_feature_start_tx_threshold=20 +sai_ecmp_group_members_increment=8 +sai_instru_stat_accum_enable=1 diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/0/port_config.ini b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/0/port_config.ini index e38d580c72c..3675136a72c 100644 --- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/0/port_config.ini +++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/0/port_config.ini @@ -1,39 +1,39 @@ -# name lanes alias index role speed asic_port_name core_id core_port_id num_voq -Ethernet0 72,73,74,75 Ethernet1/1 1 Ext 100000 Eth0 1 1 8 -Ethernet4 76,77,78,79 Ethernet1/5 1 Ext 100000 Eth4 1 2 8 -Ethernet8 80,81,82,83 Ethernet2/1 2 Ext 100000 Eth8 1 3 8 -Ethernet12 84,85,86,87 Ethernet2/5 2 Ext 100000 Eth12 1 4 8 -Ethernet16 88,89,90,91 Ethernet3/1 3 Ext 100000 Eth16 1 5 8 -Ethernet20 92,93,94,95 Ethernet3/5 3 Ext 100000 Eth20 1 6 8 -Ethernet24 96,97,98,99 Ethernet4/1 4 Ext 100000 Eth24 1 7 8 -Ethernet28 100,101,102,103 Ethernet4/5 4 Ext 100000 Eth28 1 8 8 -Ethernet32 104,105,106,107 Ethernet5/1 5 Ext 100000 Eth32 1 9 8 -Ethernet36 108,109,110,111 Ethernet5/5 5 Ext 100000 Eth36 1 10 8 -Ethernet40 112,113,114,115 Ethernet6/1 6 Ext 100000 Eth40 1 11 8 -Ethernet44 116,117,118,119 Ethernet6/5 6 Ext 100000 Eth44 1 12 8 -Ethernet48 120,121,122,123 Ethernet7/1 7 Ext 100000 Eth48 1 13 8 -Ethernet52 124,125,126,127 Ethernet7/5 7 Ext 100000 Eth52 1 14 8 -Ethernet56 128,129,130,131 Ethernet8/1 8 Ext 100000 Eth56 1 15 8 -Ethernet60 132,133,134,135 Ethernet8/5 8 Ext 100000 Eth60 1 16 8 -Ethernet64 136,137,138,139 Ethernet9/1 9 Ext 100000 Eth64 1 17 8 -Ethernet68 140,141,142,143 Ethernet9/5 9 Ext 100000 Eth68 1 18 8 -Ethernet72 64,65,66,67 Ethernet10/1 10 Ext 100000 Eth72 0 19 8 -Ethernet76 68,69,70,71 Ethernet10/5 10 Ext 100000 Eth76 0 20 8 -Ethernet80 56,57,58,59 Ethernet11/1 11 Ext 100000 Eth80 0 21 8 -Ethernet84 60,61,62,63 Ethernet11/5 11 Ext 100000 Eth84 0 22 8 -Ethernet88 48,49,50,51 Ethernet12/1 12 Ext 100000 Eth88 0 23 8 -Ethernet92 52,53,54,55 Ethernet12/5 12 Ext 100000 Eth92 0 24 8 -Ethernet96 40,41,42,43 Ethernet13/1 13 Ext 100000 Eth96 0 25 8 -Ethernet100 44,45,46,47 Ethernet13/5 13 Ext 100000 Eth100 0 26 8 -Ethernet104 32,33,34,35 Ethernet14/1 14 Ext 100000 Eth104 0 27 8 -Ethernet108 36,37,38,39 Ethernet14/5 14 Ext 100000 Eth108 0 28 8 -Ethernet112 24,25,26,27 Ethernet15/1 15 Ext 100000 Eth112 0 29 8 -Ethernet116 28,29,30,31 Ethernet15/5 15 Ext 100000 Eth116 0 30 8 -Ethernet120 16,17,18,19 Ethernet16/1 16 Ext 100000 Eth120 0 31 8 -Ethernet124 20,21,22,23 Ethernet16/5 16 Ext 100000 Eth124 0 32 8 -Ethernet128 8,9,10,11 Ethernet17/1 17 Ext 100000 Eth128 0 33 8 -Ethernet132 12,13,14,15 Ethernet17/5 17 Ext 100000 Eth132 0 34 8 -Ethernet136 0,1,2,3 Ethernet18/1 18 Ext 100000 Eth136 0 35 8 -Ethernet140 4,5,6,7 Ethernet18/5 18 Ext 100000 Eth140 0 36 8 -Ethernet-Rec0 221 Recirc0/0 37 Rec 400000 Rcy0 0 221 8 -Ethernet-IB0 222 Recirc0/1 38 Inb 400000 Rcy1 1 222 8 +# name lanes alias index role speed asic_port_name core_id core_port_id num_voq subport +Ethernet0 72,73,74,75 Ethernet1/1 1 Ext 100000 Eth0 1 1 8 1 +Ethernet4 76,77,78,79 Ethernet1/5 1 Ext 100000 Eth4 1 2 8 2 +Ethernet8 80,81,82,83 Ethernet2/1 2 Ext 100000 Eth8 1 3 8 1 +Ethernet12 84,85,86,87 Ethernet2/5 2 Ext 100000 Eth12 1 4 8 2 +Ethernet16 88,89,90,91 Ethernet3/1 3 Ext 100000 Eth16 1 5 8 1 +Ethernet20 92,93,94,95 Ethernet3/5 3 Ext 100000 Eth20 1 6 8 2 +Ethernet24 96,97,98,99 Ethernet4/1 4 Ext 100000 Eth24 1 7 8 1 +Ethernet28 100,101,102,103 Ethernet4/5 4 Ext 100000 Eth28 1 8 8 2 +Ethernet32 104,105,106,107 Ethernet5/1 5 Ext 100000 Eth32 1 9 8 1 +Ethernet36 108,109,110,111 Ethernet5/5 5 Ext 100000 Eth36 1 10 8 2 +Ethernet40 112,113,114,115 Ethernet6/1 6 Ext 100000 Eth40 1 11 8 1 +Ethernet44 116,117,118,119 Ethernet6/5 6 Ext 100000 Eth44 1 12 8 2 +Ethernet48 120,121,122,123 Ethernet7/1 7 Ext 100000 Eth48 1 13 8 1 +Ethernet52 124,125,126,127 Ethernet7/5 7 Ext 100000 Eth52 1 14 8 2 +Ethernet56 128,129,130,131 Ethernet8/1 8 Ext 100000 Eth56 1 15 8 1 +Ethernet60 132,133,134,135 Ethernet8/5 8 Ext 100000 Eth60 1 16 8 2 +Ethernet64 136,137,138,139 Ethernet9/1 9 Ext 100000 Eth64 1 17 8 1 +Ethernet68 140,141,142,143 Ethernet9/5 9 Ext 100000 Eth68 1 18 8 2 +Ethernet72 64,65,66,67 Ethernet10/1 10 Ext 100000 Eth72 0 19 8 1 +Ethernet76 68,69,70,71 Ethernet10/5 10 Ext 100000 Eth76 0 20 8 2 +Ethernet80 56,57,58,59 Ethernet11/1 11 Ext 100000 Eth80 0 21 8 1 +Ethernet84 60,61,62,63 Ethernet11/5 11 Ext 100000 Eth84 0 22 8 2 +Ethernet88 48,49,50,51 Ethernet12/1 12 Ext 100000 Eth88 0 23 8 1 +Ethernet92 52,53,54,55 Ethernet12/5 12 Ext 100000 Eth92 0 24 8 2 +Ethernet96 40,41,42,43 Ethernet13/1 13 Ext 100000 Eth96 0 25 8 1 +Ethernet100 44,45,46,47 Ethernet13/5 13 Ext 100000 Eth100 0 26 8 2 +Ethernet104 32,33,34,35 Ethernet14/1 14 Ext 100000 Eth104 0 27 8 1 +Ethernet108 36,37,38,39 Ethernet14/5 14 Ext 100000 Eth108 0 28 8 2 +Ethernet112 24,25,26,27 Ethernet15/1 15 Ext 100000 Eth112 0 29 8 1 +Ethernet116 28,29,30,31 Ethernet15/5 15 Ext 100000 Eth116 0 30 8 2 +Ethernet120 16,17,18,19 Ethernet16/1 16 Ext 100000 Eth120 0 31 8 1 +Ethernet124 20,21,22,23 Ethernet16/5 16 Ext 100000 Eth124 0 32 8 2 +Ethernet128 8,9,10,11 Ethernet17/1 17 Ext 100000 Eth128 0 33 8 1 +Ethernet132 12,13,14,15 Ethernet17/5 17 Ext 100000 Eth132 0 34 8 2 +Ethernet136 0,1,2,3 Ethernet18/1 18 Ext 100000 Eth136 0 35 8 1 +Ethernet140 4,5,6,7 Ethernet18/5 18 Ext 100000 Eth140 0 36 8 2 +Ethernet-Rec0 221 Recirc0/0 37 Rec 400000 Rcy0 0 221 8 0 +Ethernet-IB0 222 Recirc0/1 38 Inb 400000 Rcy1 1 222 8 0 diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/0/sai_postinit_cmd.soc b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/0/sai_postinit_cmd.soc index 80338902b82..1c60ec09883 100644 --- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/0/sai_postinit_cmd.soc +++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/0/sai_postinit_cmd.soc @@ -1,29 +1,61 @@ -INTeRrupt ENAble id=2209 -INTeRrupt ENAble id=2210 -INTeRrupt ENAble id=2211 -INTeRrupt ENAble id=2212 -INTeRrupt ENAble id=2213 -INTeRrupt ENAble id=2214 -INTeRrupt ENAble id=2215 -INTeRrupt ENAble id=2216 -INTeRrupt ENAble id=2217 -INTeRrupt ENAble id=2218 -INTeRrupt ENAble id=2219 -INTeRrupt ENAble id=2220 -INTeRrupt ENAble id=2221 -INTeRrupt ENAble id=2222 -INTeRrupt ENAble id=2223 -INTeRrupt ENAble id=2224 -INTeRrupt ENAble id=2225 -INTeRrupt ENAble id=2226 +# Core=0 +INTeRrupt ENAble id=2209 p=0 +INTeRrupt ENAble id=2210 p=0 +INTeRrupt ENAble id=2211 p=0 +INTeRrupt ENAble id=2212 p=0 +INTeRrupt ENAble id=2213 p=0 +INTeRrupt ENAble id=2214 p=0 +INTeRrupt ENAble id=2215 p=0 +INTeRrupt ENAble id=2216 p=0 +INTeRrupt ENAble id=2217 p=0 +INTeRrupt ENAble id=2218 p=0 +INTeRrupt ENAble id=2219 p=0 +INTeRrupt ENAble id=2220 p=0 +INTeRrupt ENAble id=2221 p=0 +INTeRrupt ENAble id=2222 p=0 +INTeRrupt ENAble id=2223 p=0 +INTeRrupt ENAble id=2224 p=0 +INTeRrupt ENAble id=2225 p=0 +INTeRrupt ENAble id=2226 p=0 -INTeRrupt ENAble id=482 -INTeRrupt ENAble id=483 -INTeRrupt ENAble id=484 -INTeRrupt ENAble id=485 -INTeRrupt ENAble id=486 -INTeRrupt ENAble id=487 -INTeRrupt ENAble id=488 +INTeRrupt ENAble id=482 p=0 +INTeRrupt ENAble id=483 p=0 +INTeRrupt ENAble id=484 p=0 +INTeRrupt ENAble id=485 p=0 +INTeRrupt ENAble id=486 p=0 +INTeRrupt ENAble id=487 p=0 +INTeRrupt ENAble id=488 p=0 -INTeRrupt ENAble id=1597 -debug intr error \ No newline at end of file +INTeRrupt ENAble id=1597 p=0 + +# Core=1 +INTeRrupt ENAble id=2209 p=1 +INTeRrupt ENAble id=2210 p=1 +INTeRrupt ENAble id=2211 p=1 +INTeRrupt ENAble id=2212 p=1 +INTeRrupt ENAble id=2213 p=1 +INTeRrupt ENAble id=2214 p=1 +INTeRrupt ENAble id=2215 p=1 +INTeRrupt ENAble id=2216 p=1 +INTeRrupt ENAble id=2217 p=1 +INTeRrupt ENAble id=2218 p=1 +INTeRrupt ENAble id=2219 p=1 +INTeRrupt ENAble id=2220 p=1 +INTeRrupt ENAble id=2221 p=1 +INTeRrupt ENAble id=2222 p=1 +INTeRrupt ENAble id=2223 p=1 +INTeRrupt ENAble id=2224 p=1 +INTeRrupt ENAble id=2225 p=1 +INTeRrupt ENAble id=2226 p=1 + +INTeRrupt ENAble id=482 p=1 +INTeRrupt ENAble id=483 p=1 +INTeRrupt ENAble id=484 p=1 +INTeRrupt ENAble id=485 p=1 +INTeRrupt ENAble id=486 p=1 +INTeRrupt ENAble id=487 p=1 +INTeRrupt ENAble id=488 p=1 + +INTeRrupt ENAble id=1597 p=1 + +debug intr error diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/1/j2p-a7800r3a-36d-36x400G.config.bcm b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/1/j2p-a7800r3a-36d-36x400G.config.bcm index aec0840c774..c9e68a4c687 100644 --- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/1/j2p-a7800r3a-36d-36x400G.config.bcm +++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/1/j2p-a7800r3a-36d-36x400G.config.bcm @@ -258,16 +258,16 @@ stable_size=800000000 ######################### ######################### -tm_port_header_type_in_0=INJECTED_2_PP +tm_port_header_type_in_0=INJECTED tm_port_header_type_out_0=CPU -tm_port_header_type_in_200=INJECTED_2_PP +tm_port_header_type_in_200=INJECTED tm_port_header_type_out_200=ETH -tm_port_header_type_in_201=INJECTED_2_PP +tm_port_header_type_in_201=INJECTED tm_port_header_type_out_201=ETH -tm_port_header_type_in_202=INJECTED_2_PP +tm_port_header_type_in_202=INJECTED tm_port_header_type_out_202=ETH -tm_port_header_type_in_203=INJECTED_2_PP +tm_port_header_type_in_203=INJECTED tm_port_header_type_out_203=ETH ### RCY @@ -1037,3 +1037,5 @@ sai_disable_srcmacqedstmac_ctrl=1 appl_param_active_links_thr_high=91 appl_param_active_links_thr_low=1 custom_feature_start_tx_threshold=20 +sai_ecmp_group_members_increment=8 +sai_instru_stat_accum_enable=1 diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/1/port_config.ini b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/1/port_config.ini index ce3155c5275..f392cec09d2 100644 --- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/1/port_config.ini +++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/1/port_config.ini @@ -1,39 +1,39 @@ -# name lanes alias index role speed asic_port_name core_id core_port_id num_voq -Ethernet144 72,73,74,75 Ethernet19/1 19 Ext 100000 Eth144 1 1 8 -Ethernet148 76,77,78,79 Ethernet19/5 19 Ext 100000 Eth148 1 2 8 -Ethernet152 80,81,82,83 Ethernet20/1 20 Ext 100000 Eth152 1 3 8 -Ethernet156 84,85,86,87 Ethernet20/5 20 Ext 100000 Eth156 1 4 8 -Ethernet160 88,89,90,91 Ethernet21/1 21 Ext 100000 Eth160 1 5 8 -Ethernet164 92,93,94,95 Ethernet21/5 21 Ext 100000 Eth164 1 6 8 -Ethernet168 96,97,98,99 Ethernet22/1 22 Ext 100000 Eth168 1 7 8 -Ethernet172 100,101,102,103 Ethernet22/5 22 Ext 100000 Eth172 1 8 8 -Ethernet176 104,105,106,107 Ethernet23/1 23 Ext 100000 Eth176 1 9 8 -Ethernet180 108,109,110,111 Ethernet23/5 23 Ext 100000 Eth180 1 10 8 -Ethernet184 112,113,114,115 Ethernet24/1 24 Ext 100000 Eth184 1 11 8 -Ethernet188 116,117,118,119 Ethernet24/5 24 Ext 100000 Eth188 1 12 8 -Ethernet192 120,121,122,123 Ethernet25/1 25 Ext 100000 Eth192 1 13 8 -Ethernet196 124,125,126,127 Ethernet25/5 25 Ext 100000 Eth196 1 14 8 -Ethernet200 128,129,130,131 Ethernet26/1 26 Ext 100000 Eth200 1 15 8 -Ethernet204 132,133,134,135 Ethernet26/5 26 Ext 100000 Eth204 1 16 8 -Ethernet208 136,137,138,139 Ethernet27/1 27 Ext 100000 Eth208 1 17 8 -Ethernet212 140,141,142,143 Ethernet27/5 27 Ext 100000 Eth212 1 18 8 -Ethernet216 64,65,66,67 Ethernet28/1 28 Ext 100000 Eth216 0 19 8 -Ethernet220 68,69,70,71 Ethernet28/5 28 Ext 100000 Eth220 0 20 8 -Ethernet224 56,57,58,59 Ethernet29/1 29 Ext 100000 Eth224 0 21 8 -Ethernet228 60,61,62,63 Ethernet29/5 29 Ext 100000 Eth228 0 22 8 -Ethernet232 48,49,50,51 Ethernet30/1 30 Ext 100000 Eth232 0 23 8 -Ethernet236 52,53,54,55 Ethernet30/5 30 Ext 100000 Eth236 0 24 8 -Ethernet240 40,41,42,43 Ethernet31/1 31 Ext 100000 Eth240 0 25 8 -Ethernet244 44,45,46,47 Ethernet31/5 31 Ext 100000 Eth244 0 26 8 -Ethernet248 32,33,34,35 Ethernet32/1 32 Ext 100000 Eth248 0 27 8 -Ethernet252 36,37,38,39 Ethernet32/5 32 Ext 100000 Eth252 0 28 8 -Ethernet256 24,25,26,27 Ethernet33/1 33 Ext 100000 Eth256 0 29 8 -Ethernet260 28,29,30,31 Ethernet33/5 33 Ext 100000 Eth260 0 30 8 -Ethernet264 16,17,18,19 Ethernet34/1 34 Ext 100000 Eth264 0 31 8 -Ethernet268 20,21,22,23 Ethernet34/5 34 Ext 100000 Eth268 0 32 8 -Ethernet272 8,9,10,11 Ethernet35/1 35 Ext 100000 Eth272 0 33 8 -Ethernet276 12,13,14,15 Ethernet35/5 35 Ext 100000 Eth276 0 34 8 -Ethernet280 0,1,2,3 Ethernet36/1 36 Ext 100000 Eth280 0 35 8 -Ethernet284 4,5,6,7 Ethernet36/5 36 Ext 100000 Eth284 0 36 8 -Ethernet-Rec1 221 Recirc1/0 39 Rec 400000 Rcy0 0 221 8 -Ethernet-IB1 222 Recirc1/1 40 Inb 400000 Rcy1 1 222 8 +# name lanes alias index role speed asic_port_name core_id core_port_id num_voq subport +Ethernet144 72,73,74,75 Ethernet19/1 19 Ext 100000 Eth144 1 1 8 1 +Ethernet148 76,77,78,79 Ethernet19/5 19 Ext 100000 Eth148 1 2 8 2 +Ethernet152 80,81,82,83 Ethernet20/1 20 Ext 100000 Eth152 1 3 8 1 +Ethernet156 84,85,86,87 Ethernet20/5 20 Ext 100000 Eth156 1 4 8 2 +Ethernet160 88,89,90,91 Ethernet21/1 21 Ext 100000 Eth160 1 5 8 1 +Ethernet164 92,93,94,95 Ethernet21/5 21 Ext 100000 Eth164 1 6 8 2 +Ethernet168 96,97,98,99 Ethernet22/1 22 Ext 100000 Eth168 1 7 8 1 +Ethernet172 100,101,102,103 Ethernet22/5 22 Ext 100000 Eth172 1 8 8 2 +Ethernet176 104,105,106,107 Ethernet23/1 23 Ext 100000 Eth176 1 9 8 1 +Ethernet180 108,109,110,111 Ethernet23/5 23 Ext 100000 Eth180 1 10 8 2 +Ethernet184 112,113,114,115 Ethernet24/1 24 Ext 100000 Eth184 1 11 8 1 +Ethernet188 116,117,118,119 Ethernet24/5 24 Ext 100000 Eth188 1 12 8 2 +Ethernet192 120,121,122,123 Ethernet25/1 25 Ext 100000 Eth192 1 13 8 1 +Ethernet196 124,125,126,127 Ethernet25/5 25 Ext 100000 Eth196 1 14 8 2 +Ethernet200 128,129,130,131 Ethernet26/1 26 Ext 100000 Eth200 1 15 8 1 +Ethernet204 132,133,134,135 Ethernet26/5 26 Ext 100000 Eth204 1 16 8 2 +Ethernet208 136,137,138,139 Ethernet27/1 27 Ext 100000 Eth208 1 17 8 1 +Ethernet212 140,141,142,143 Ethernet27/5 27 Ext 100000 Eth212 1 18 8 2 +Ethernet216 64,65,66,67 Ethernet28/1 28 Ext 100000 Eth216 0 19 8 1 +Ethernet220 68,69,70,71 Ethernet28/5 28 Ext 100000 Eth220 0 20 8 2 +Ethernet224 56,57,58,59 Ethernet29/1 29 Ext 100000 Eth224 0 21 8 1 +Ethernet228 60,61,62,63 Ethernet29/5 29 Ext 100000 Eth228 0 22 8 2 +Ethernet232 48,49,50,51 Ethernet30/1 30 Ext 100000 Eth232 0 23 8 1 +Ethernet236 52,53,54,55 Ethernet30/5 30 Ext 100000 Eth236 0 24 8 2 +Ethernet240 40,41,42,43 Ethernet31/1 31 Ext 100000 Eth240 0 25 8 1 +Ethernet244 44,45,46,47 Ethernet31/5 31 Ext 100000 Eth244 0 26 8 2 +Ethernet248 32,33,34,35 Ethernet32/1 32 Ext 100000 Eth248 0 27 8 1 +Ethernet252 36,37,38,39 Ethernet32/5 32 Ext 100000 Eth252 0 28 8 2 +Ethernet256 24,25,26,27 Ethernet33/1 33 Ext 100000 Eth256 0 29 8 1 +Ethernet260 28,29,30,31 Ethernet33/5 33 Ext 100000 Eth260 0 30 8 2 +Ethernet264 16,17,18,19 Ethernet34/1 34 Ext 100000 Eth264 0 31 8 1 +Ethernet268 20,21,22,23 Ethernet34/5 34 Ext 100000 Eth268 0 32 8 2 +Ethernet272 8,9,10,11 Ethernet35/1 35 Ext 100000 Eth272 0 33 8 1 +Ethernet276 12,13,14,15 Ethernet35/5 35 Ext 100000 Eth276 0 34 8 2 +Ethernet280 0,1,2,3 Ethernet36/1 36 Ext 100000 Eth280 0 35 8 1 +Ethernet284 4,5,6,7 Ethernet36/5 36 Ext 100000 Eth284 0 36 8 2 +Ethernet-Rec1 221 Recirc1/0 39 Rec 400000 Rcy0 0 221 8 0 +Ethernet-IB1 222 Recirc1/1 40 Inb 400000 Rcy1 1 222 8 0 diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/1/sai_postinit_cmd.soc b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/1/sai_postinit_cmd.soc index 80338902b82..1c60ec09883 100644 --- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/1/sai_postinit_cmd.soc +++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-C72/1/sai_postinit_cmd.soc @@ -1,29 +1,61 @@ -INTeRrupt ENAble id=2209 -INTeRrupt ENAble id=2210 -INTeRrupt ENAble id=2211 -INTeRrupt ENAble id=2212 -INTeRrupt ENAble id=2213 -INTeRrupt ENAble id=2214 -INTeRrupt ENAble id=2215 -INTeRrupt ENAble id=2216 -INTeRrupt ENAble id=2217 -INTeRrupt ENAble id=2218 -INTeRrupt ENAble id=2219 -INTeRrupt ENAble id=2220 -INTeRrupt ENAble id=2221 -INTeRrupt ENAble id=2222 -INTeRrupt ENAble id=2223 -INTeRrupt ENAble id=2224 -INTeRrupt ENAble id=2225 -INTeRrupt ENAble id=2226 +# Core=0 +INTeRrupt ENAble id=2209 p=0 +INTeRrupt ENAble id=2210 p=0 +INTeRrupt ENAble id=2211 p=0 +INTeRrupt ENAble id=2212 p=0 +INTeRrupt ENAble id=2213 p=0 +INTeRrupt ENAble id=2214 p=0 +INTeRrupt ENAble id=2215 p=0 +INTeRrupt ENAble id=2216 p=0 +INTeRrupt ENAble id=2217 p=0 +INTeRrupt ENAble id=2218 p=0 +INTeRrupt ENAble id=2219 p=0 +INTeRrupt ENAble id=2220 p=0 +INTeRrupt ENAble id=2221 p=0 +INTeRrupt ENAble id=2222 p=0 +INTeRrupt ENAble id=2223 p=0 +INTeRrupt ENAble id=2224 p=0 +INTeRrupt ENAble id=2225 p=0 +INTeRrupt ENAble id=2226 p=0 -INTeRrupt ENAble id=482 -INTeRrupt ENAble id=483 -INTeRrupt ENAble id=484 -INTeRrupt ENAble id=485 -INTeRrupt ENAble id=486 -INTeRrupt ENAble id=487 -INTeRrupt ENAble id=488 +INTeRrupt ENAble id=482 p=0 +INTeRrupt ENAble id=483 p=0 +INTeRrupt ENAble id=484 p=0 +INTeRrupt ENAble id=485 p=0 +INTeRrupt ENAble id=486 p=0 +INTeRrupt ENAble id=487 p=0 +INTeRrupt ENAble id=488 p=0 -INTeRrupt ENAble id=1597 -debug intr error \ No newline at end of file +INTeRrupt ENAble id=1597 p=0 + +# Core=1 +INTeRrupt ENAble id=2209 p=1 +INTeRrupt ENAble id=2210 p=1 +INTeRrupt ENAble id=2211 p=1 +INTeRrupt ENAble id=2212 p=1 +INTeRrupt ENAble id=2213 p=1 +INTeRrupt ENAble id=2214 p=1 +INTeRrupt ENAble id=2215 p=1 +INTeRrupt ENAble id=2216 p=1 +INTeRrupt ENAble id=2217 p=1 +INTeRrupt ENAble id=2218 p=1 +INTeRrupt ENAble id=2219 p=1 +INTeRrupt ENAble id=2220 p=1 +INTeRrupt ENAble id=2221 p=1 +INTeRrupt ENAble id=2222 p=1 +INTeRrupt ENAble id=2223 p=1 +INTeRrupt ENAble id=2224 p=1 +INTeRrupt ENAble id=2225 p=1 +INTeRrupt ENAble id=2226 p=1 + +INTeRrupt ENAble id=482 p=1 +INTeRrupt ENAble id=483 p=1 +INTeRrupt ENAble id=484 p=1 +INTeRrupt ENAble id=485 p=1 +INTeRrupt ENAble id=486 p=1 +INTeRrupt ENAble id=487 p=1 +INTeRrupt ENAble id=488 p=1 + +INTeRrupt ENAble id=1597 p=1 + +debug intr error diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/0/j2p-a7800r3a-36d-36x400G.config.bcm b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/0/j2p-a7800r3a-36d-36x400G.config.bcm index 41af46ac406..af6a2e0c55d 100644 --- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/0/j2p-a7800r3a-36d-36x400G.config.bcm +++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/0/j2p-a7800r3a-36d-36x400G.config.bcm @@ -240,16 +240,16 @@ stable_size=800000000 ######################### ######################### -tm_port_header_type_in_0=INJECTED_2_PP +tm_port_header_type_in_0=INJECTED tm_port_header_type_out_0=CPU -tm_port_header_type_in_200=INJECTED_2_PP +tm_port_header_type_in_200=INJECTED tm_port_header_type_out_200=ETH -tm_port_header_type_in_201=INJECTED_2_PP +tm_port_header_type_in_201=INJECTED tm_port_header_type_out_201=ETH -tm_port_header_type_in_202=INJECTED_2_PP +tm_port_header_type_in_202=INJECTED tm_port_header_type_out_202=ETH -tm_port_header_type_in_203=INJECTED_2_PP +tm_port_header_type_in_203=INJECTED tm_port_header_type_out_203=ETH ### RCY @@ -1057,3 +1057,5 @@ sai_disable_srcmacqedstmac_ctrl=1 appl_param_active_links_thr_high=91 appl_param_active_links_thr_low=1 custom_feature_start_tx_threshold=20 +sai_ecmp_group_members_increment=8 +sai_instru_stat_accum_enable=1 diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/0/sai_postinit_cmd.soc b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/0/sai_postinit_cmd.soc index 80338902b82..1c60ec09883 100644 --- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/0/sai_postinit_cmd.soc +++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/0/sai_postinit_cmd.soc @@ -1,29 +1,61 @@ -INTeRrupt ENAble id=2209 -INTeRrupt ENAble id=2210 -INTeRrupt ENAble id=2211 -INTeRrupt ENAble id=2212 -INTeRrupt ENAble id=2213 -INTeRrupt ENAble id=2214 -INTeRrupt ENAble id=2215 -INTeRrupt ENAble id=2216 -INTeRrupt ENAble id=2217 -INTeRrupt ENAble id=2218 -INTeRrupt ENAble id=2219 -INTeRrupt ENAble id=2220 -INTeRrupt ENAble id=2221 -INTeRrupt ENAble id=2222 -INTeRrupt ENAble id=2223 -INTeRrupt ENAble id=2224 -INTeRrupt ENAble id=2225 -INTeRrupt ENAble id=2226 +# Core=0 +INTeRrupt ENAble id=2209 p=0 +INTeRrupt ENAble id=2210 p=0 +INTeRrupt ENAble id=2211 p=0 +INTeRrupt ENAble id=2212 p=0 +INTeRrupt ENAble id=2213 p=0 +INTeRrupt ENAble id=2214 p=0 +INTeRrupt ENAble id=2215 p=0 +INTeRrupt ENAble id=2216 p=0 +INTeRrupt ENAble id=2217 p=0 +INTeRrupt ENAble id=2218 p=0 +INTeRrupt ENAble id=2219 p=0 +INTeRrupt ENAble id=2220 p=0 +INTeRrupt ENAble id=2221 p=0 +INTeRrupt ENAble id=2222 p=0 +INTeRrupt ENAble id=2223 p=0 +INTeRrupt ENAble id=2224 p=0 +INTeRrupt ENAble id=2225 p=0 +INTeRrupt ENAble id=2226 p=0 -INTeRrupt ENAble id=482 -INTeRrupt ENAble id=483 -INTeRrupt ENAble id=484 -INTeRrupt ENAble id=485 -INTeRrupt ENAble id=486 -INTeRrupt ENAble id=487 -INTeRrupt ENAble id=488 +INTeRrupt ENAble id=482 p=0 +INTeRrupt ENAble id=483 p=0 +INTeRrupt ENAble id=484 p=0 +INTeRrupt ENAble id=485 p=0 +INTeRrupt ENAble id=486 p=0 +INTeRrupt ENAble id=487 p=0 +INTeRrupt ENAble id=488 p=0 -INTeRrupt ENAble id=1597 -debug intr error \ No newline at end of file +INTeRrupt ENAble id=1597 p=0 + +# Core=1 +INTeRrupt ENAble id=2209 p=1 +INTeRrupt ENAble id=2210 p=1 +INTeRrupt ENAble id=2211 p=1 +INTeRrupt ENAble id=2212 p=1 +INTeRrupt ENAble id=2213 p=1 +INTeRrupt ENAble id=2214 p=1 +INTeRrupt ENAble id=2215 p=1 +INTeRrupt ENAble id=2216 p=1 +INTeRrupt ENAble id=2217 p=1 +INTeRrupt ENAble id=2218 p=1 +INTeRrupt ENAble id=2219 p=1 +INTeRrupt ENAble id=2220 p=1 +INTeRrupt ENAble id=2221 p=1 +INTeRrupt ENAble id=2222 p=1 +INTeRrupt ENAble id=2223 p=1 +INTeRrupt ENAble id=2224 p=1 +INTeRrupt ENAble id=2225 p=1 +INTeRrupt ENAble id=2226 p=1 + +INTeRrupt ENAble id=482 p=1 +INTeRrupt ENAble id=483 p=1 +INTeRrupt ENAble id=484 p=1 +INTeRrupt ENAble id=485 p=1 +INTeRrupt ENAble id=486 p=1 +INTeRrupt ENAble id=487 p=1 +INTeRrupt ENAble id=488 p=1 + +INTeRrupt ENAble id=1597 p=1 + +debug intr error diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/1/j2p-a7800r3a-36d-36x400G.config.bcm b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/1/j2p-a7800r3a-36d-36x400G.config.bcm index c9cd0a31689..a956489a5df 100644 --- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/1/j2p-a7800r3a-36d-36x400G.config.bcm +++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/1/j2p-a7800r3a-36d-36x400G.config.bcm @@ -240,16 +240,16 @@ stable_size=800000000 ######################### ######################### -tm_port_header_type_in_0=INJECTED_2_PP +tm_port_header_type_in_0=INJECTED tm_port_header_type_out_0=CPU -tm_port_header_type_in_200=INJECTED_2_PP +tm_port_header_type_in_200=INJECTED tm_port_header_type_out_200=ETH -tm_port_header_type_in_201=INJECTED_2_PP +tm_port_header_type_in_201=INJECTED tm_port_header_type_out_201=ETH -tm_port_header_type_in_202=INJECTED_2_PP +tm_port_header_type_in_202=INJECTED tm_port_header_type_out_202=ETH -tm_port_header_type_in_203=INJECTED_2_PP +tm_port_header_type_in_203=INJECTED tm_port_header_type_out_203=ETH ### RCY @@ -1057,3 +1057,5 @@ sai_disable_srcmacqedstmac_ctrl=1 appl_param_active_links_thr_high=91 appl_param_active_links_thr_low=1 custom_feature_start_tx_threshold=20 +sai_ecmp_group_members_increment=8 +sai_instru_stat_accum_enable=1 diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/1/sai_postinit_cmd.soc b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/1/sai_postinit_cmd.soc index 80338902b82..1c60ec09883 100644 --- a/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/1/sai_postinit_cmd.soc +++ b/device/arista/x86_64-arista_7800r3a_36d2_lc/Arista-7800R3A-36D2-D36/1/sai_postinit_cmd.soc @@ -1,29 +1,61 @@ -INTeRrupt ENAble id=2209 -INTeRrupt ENAble id=2210 -INTeRrupt ENAble id=2211 -INTeRrupt ENAble id=2212 -INTeRrupt ENAble id=2213 -INTeRrupt ENAble id=2214 -INTeRrupt ENAble id=2215 -INTeRrupt ENAble id=2216 -INTeRrupt ENAble id=2217 -INTeRrupt ENAble id=2218 -INTeRrupt ENAble id=2219 -INTeRrupt ENAble id=2220 -INTeRrupt ENAble id=2221 -INTeRrupt ENAble id=2222 -INTeRrupt ENAble id=2223 -INTeRrupt ENAble id=2224 -INTeRrupt ENAble id=2225 -INTeRrupt ENAble id=2226 +# Core=0 +INTeRrupt ENAble id=2209 p=0 +INTeRrupt ENAble id=2210 p=0 +INTeRrupt ENAble id=2211 p=0 +INTeRrupt ENAble id=2212 p=0 +INTeRrupt ENAble id=2213 p=0 +INTeRrupt ENAble id=2214 p=0 +INTeRrupt ENAble id=2215 p=0 +INTeRrupt ENAble id=2216 p=0 +INTeRrupt ENAble id=2217 p=0 +INTeRrupt ENAble id=2218 p=0 +INTeRrupt ENAble id=2219 p=0 +INTeRrupt ENAble id=2220 p=0 +INTeRrupt ENAble id=2221 p=0 +INTeRrupt ENAble id=2222 p=0 +INTeRrupt ENAble id=2223 p=0 +INTeRrupt ENAble id=2224 p=0 +INTeRrupt ENAble id=2225 p=0 +INTeRrupt ENAble id=2226 p=0 -INTeRrupt ENAble id=482 -INTeRrupt ENAble id=483 -INTeRrupt ENAble id=484 -INTeRrupt ENAble id=485 -INTeRrupt ENAble id=486 -INTeRrupt ENAble id=487 -INTeRrupt ENAble id=488 +INTeRrupt ENAble id=482 p=0 +INTeRrupt ENAble id=483 p=0 +INTeRrupt ENAble id=484 p=0 +INTeRrupt ENAble id=485 p=0 +INTeRrupt ENAble id=486 p=0 +INTeRrupt ENAble id=487 p=0 +INTeRrupt ENAble id=488 p=0 -INTeRrupt ENAble id=1597 -debug intr error \ No newline at end of file +INTeRrupt ENAble id=1597 p=0 + +# Core=1 +INTeRrupt ENAble id=2209 p=1 +INTeRrupt ENAble id=2210 p=1 +INTeRrupt ENAble id=2211 p=1 +INTeRrupt ENAble id=2212 p=1 +INTeRrupt ENAble id=2213 p=1 +INTeRrupt ENAble id=2214 p=1 +INTeRrupt ENAble id=2215 p=1 +INTeRrupt ENAble id=2216 p=1 +INTeRrupt ENAble id=2217 p=1 +INTeRrupt ENAble id=2218 p=1 +INTeRrupt ENAble id=2219 p=1 +INTeRrupt ENAble id=2220 p=1 +INTeRrupt ENAble id=2221 p=1 +INTeRrupt ENAble id=2222 p=1 +INTeRrupt ENAble id=2223 p=1 +INTeRrupt ENAble id=2224 p=1 +INTeRrupt ENAble id=2225 p=1 +INTeRrupt ENAble id=2226 p=1 + +INTeRrupt ENAble id=482 p=1 +INTeRrupt ENAble id=483 p=1 +INTeRrupt ENAble id=484 p=1 +INTeRrupt ENAble id=485 p=1 +INTeRrupt ENAble id=486 p=1 +INTeRrupt ENAble id=487 p=1 +INTeRrupt ENAble id=488 p=1 + +INTeRrupt ENAble id=1597 p=1 + +debug intr error diff --git a/device/aspeed/arm64-aspeed_ast2700_evb-r0/99-switchCpu.rules b/device/aspeed/arm64-aspeed_ast2700_evb-r0/99-switchCpu.rules new file mode 100644 index 00000000000..a733ca71b86 --- /dev/null +++ b/device/aspeed/arm64-aspeed_ast2700_evb-r0/99-switchCpu.rules @@ -0,0 +1,4 @@ +# Aspeed AST2700 EVB: Dummy placeholder for switch CPU console +# The EVB does not have a physical switch CPU console connection +# This file exists to prevent errors in sonic-platform-init.sh + diff --git a/device/aspeed/arm64-aspeed_ast2700_evb-r0/asic.conf b/device/aspeed/arm64-aspeed_ast2700_evb-r0/asic.conf new file mode 100644 index 00000000000..35c5884f133 --- /dev/null +++ b/device/aspeed/arm64-aspeed_ast2700_evb-r0/asic.conf @@ -0,0 +1,2 @@ +# aspeed-ast2700 doesn't have a switch asic but SONIC assumes NUM_ASIC to be atleast 1 +NUM_ASIC=1 diff --git a/device/aspeed/arm64-aspeed_ast2700_evb-r0/default_sku b/device/aspeed/arm64-aspeed_ast2700_evb-r0/default_sku new file mode 100644 index 00000000000..44c055e79b1 --- /dev/null +++ b/device/aspeed/arm64-aspeed_ast2700_evb-r0/default_sku @@ -0,0 +1 @@ +AST2700-EVB-BMC empty diff --git a/device/aspeed/arm64-aspeed_ast2700_evb-r0/installer.conf b/device/aspeed/arm64-aspeed_ast2700_evb-r0/installer.conf new file mode 100644 index 00000000000..bd4fd1caa65 --- /dev/null +++ b/device/aspeed/arm64-aspeed_ast2700_evb-r0/installer.conf @@ -0,0 +1,13 @@ +# Console configuration for AST2700 EVB platform +# CONSOLE_DEV=12 means ttyS12 +CONSOLE_DEV=12 +CONSOLE_SPEED=115200 + +# Early console for debugging (UART12 on AST2700) +EARLYCON="earlycon=uart8250,mmio32,0x14c33b00" + +# Variable log size(MB) +VAR_LOG_SIZE=512 + +# Additional kernel command line arguments +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="" diff --git a/device/aspeed/arm64-aspeed_ast2700_evb-r0/platform.json b/device/aspeed/arm64-aspeed_ast2700_evb-r0/platform.json new file mode 100644 index 00000000000..719ceaaecbb --- /dev/null +++ b/device/aspeed/arm64-aspeed_ast2700_evb-r0/platform.json @@ -0,0 +1,20 @@ +{ + "chassis": { + "name": "AST2700-EVB-BMC", + "thermal_manager": false, + "status_led": { + "controllable": true, + "colors": ["green", "amber", "off"] + }, + "components": [ + { + "name": "BIOS" + } + ], + "fans": [], + "psus": [], + "thermals": [], + "sfps": [] + }, + "interfaces": {} +} diff --git a/device/aspeed/arm64-aspeed_ast2700_evb-r0/platform_asic b/device/aspeed/arm64-aspeed_ast2700_evb-r0/platform_asic new file mode 100644 index 00000000000..708a833cb62 --- /dev/null +++ b/device/aspeed/arm64-aspeed_ast2700_evb-r0/platform_asic @@ -0,0 +1 @@ +aspeed \ No newline at end of file diff --git a/device/aspeed/arm64-aspeed_ast2700_evb-r0/platform_components.json b/device/aspeed/arm64-aspeed_ast2700_evb-r0/platform_components.json new file mode 100644 index 00000000000..40cb46e42c4 --- /dev/null +++ b/device/aspeed/arm64-aspeed_ast2700_evb-r0/platform_components.json @@ -0,0 +1,9 @@ +{ + "chassis": { + "AST2700-EVB-BMC": { + "component": { + "BIOS": {} + } + } + } +} diff --git a/device/aspeed/arm64-aspeed_ast2700_evb-r0/platform_env.conf b/device/aspeed/arm64-aspeed_ast2700_evb-r0/platform_env.conf new file mode 100644 index 00000000000..bcd3149cc04 --- /dev/null +++ b/device/aspeed/arm64-aspeed_ast2700_evb-r0/platform_env.conf @@ -0,0 +1 @@ +# BMC platform environment diff --git a/device/aspeed/arm64-aspeed_ast2700_evb-r0/pmon_daemon_control.json b/device/aspeed/arm64-aspeed_ast2700_evb-r0/pmon_daemon_control.json new file mode 100644 index 00000000000..de0341b4f0a --- /dev/null +++ b/device/aspeed/arm64-aspeed_ast2700_evb-r0/pmon_daemon_control.json @@ -0,0 +1,17 @@ +{ + "skip_thermalctld": false, + "skip_ledd": true, + "skip_xcvrd": true, + "skip_psud": true, + "skip_syseepromd": true, + "skip_pcied": true, + "skip_chassisd": true, + "skip_fancontrol": true, + "include_sensormond": false, + "thermalctld": { + "thermal_monitor_initial_interval": 5, + "thermal_monitor_update_interval": 60, + "thermal_monitor_update_elapsed_threshold": 30 + } +} + diff --git a/device/aspeed/arm64-aspeed_ast2700_evb-r0/switch_cpu_console.conf b/device/aspeed/arm64-aspeed_ast2700_evb-r0/switch_cpu_console.conf new file mode 100644 index 00000000000..38e2b35d08f --- /dev/null +++ b/device/aspeed/arm64-aspeed_ast2700_evb-r0/switch_cpu_console.conf @@ -0,0 +1,12 @@ +# Console configuration for Aspeed AST2700 EVB +# This file defines console port settings for the switch CPU console + +# Baud rate for the switch CPU console (default: 115200) +CONSOLE_BAUD_RATE=115200 + +# Flow control: 0=disabled, 1=enabled (default: 0) +CONSOLE_FLOW_CONTROL=0 + +# Remote device name shown in consutil +CONSOLE_REMOTE_DEVICE=EVB + diff --git a/device/aspeed/arm64-aspeed_ast2700_evb-r0/system_health_monitoring_config.json b/device/aspeed/arm64-aspeed_ast2700_evb-r0/system_health_monitoring_config.json new file mode 100644 index 00000000000..59fb8ad3be7 --- /dev/null +++ b/device/aspeed/arm64-aspeed_ast2700_evb-r0/system_health_monitoring_config.json @@ -0,0 +1,12 @@ +{ + "services_to_ignore": [], + "devices_to_ignore": ["psu", "fan", "asic"], + "user_defined_checkers": [], + "polling_interval": 300, + "led_color": { + "fault": "amber", + "normal": "green", + "booting": "amber_blink" + } +} + diff --git a/device/aspeed/arm64-aspeed_ast2700_evb-r0/udevprefix.conf b/device/aspeed/arm64-aspeed_ast2700_evb-r0/udevprefix.conf new file mode 100644 index 00000000000..af15b82b629 --- /dev/null +++ b/device/aspeed/arm64-aspeed_ast2700_evb-r0/udevprefix.conf @@ -0,0 +1,2 @@ +ttySwitchCpu + diff --git a/device/aspeed/arm64-aspeed_nvidia_ast2700_bmc-r0/bmc.json b/device/aspeed/arm64-aspeed_nvidia_ast2700_bmc-r0/bmc.json new file mode 100644 index 00000000000..b30023541fc --- /dev/null +++ b/device/aspeed/arm64-aspeed_nvidia_ast2700_bmc-r0/bmc.json @@ -0,0 +1,7 @@ +{ + "bmc_if_name": "usb0", + "bmc_if_addr": "169.254.0.2", + "bmc_addr": "169.254.0.1", + "bmc_net_mask": "255.255.255.252" +} + \ No newline at end of file diff --git a/device/aspeed/arm64-aspeed_nvidia_ast2700_bmc-r0/default_sku b/device/aspeed/arm64-aspeed_nvidia_ast2700_bmc-r0/default_sku new file mode 100644 index 00000000000..a44e3efa484 --- /dev/null +++ b/device/aspeed/arm64-aspeed_nvidia_ast2700_bmc-r0/default_sku @@ -0,0 +1 @@ +NVIDIA-AST2700-BMC empty diff --git a/device/aspeed/arm64-aspeed_nvidia_ast2700_bmc-r0/fw_env b/device/aspeed/arm64-aspeed_nvidia_ast2700_bmc-r0/fw_env new file mode 100644 index 00000000000..7edf4ebe0f8 --- /dev/null +++ b/device/aspeed/arm64-aspeed_nvidia_ast2700_bmc-r0/fw_env @@ -0,0 +1 @@ +/dev/mmcblk0boot0 0x0000 0x20000 diff --git a/device/aspeed/arm64-aspeed_nvidia_ast2700_bmc-r0/installer.conf b/device/aspeed/arm64-aspeed_nvidia_ast2700_bmc-r0/installer.conf new file mode 100644 index 00000000000..cc7698657e9 --- /dev/null +++ b/device/aspeed/arm64-aspeed_nvidia_ast2700_bmc-r0/installer.conf @@ -0,0 +1,11 @@ +# Console configuration for NVIDIA AST2700 BMC platform +# linuxargs: console=ttyS12,115200n8 earlycon (see platform/aspeed/scripts/sonic-uboot-env-init.sh) +CONSOLE_DEV=12 +CONSOLE_SPEED=115200 +EARLYCON="earlycon" + +# Variable log size(MB) +VAR_LOG_SIZE=512 + +# Additional kernel command line arguments +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="" diff --git a/device/aspeed/arm64-aspeed_nvidia_ast2700_bmc-r0/platform.json b/device/aspeed/arm64-aspeed_nvidia_ast2700_bmc-r0/platform.json new file mode 100644 index 00000000000..88e39e0b32e --- /dev/null +++ b/device/aspeed/arm64-aspeed_nvidia_ast2700_bmc-r0/platform.json @@ -0,0 +1,14 @@ +{ + "chassis": { + "name": "NVIDIA-AST2700-BMC", + "model": "NVIDIA AST2700 BMC", + "thermal_manager": false, + "liquid_cooled": true, + "components": [], + "fans": [], + "psus": [], + "thermals": [], + "sfps": [] + }, + "interfaces": {} +} diff --git a/device/aspeed/arm64-aspeed_nvidia_ast2700_bmc-r0/platform_asic b/device/aspeed/arm64-aspeed_nvidia_ast2700_bmc-r0/platform_asic new file mode 100644 index 00000000000..708a833cb62 --- /dev/null +++ b/device/aspeed/arm64-aspeed_nvidia_ast2700_bmc-r0/platform_asic @@ -0,0 +1 @@ +aspeed \ No newline at end of file diff --git a/device/aspeed/arm64-aspeed_nvidia_ast2700_bmc-r0/platform_components.json b/device/aspeed/arm64-aspeed_nvidia_ast2700_bmc-r0/platform_components.json new file mode 100644 index 00000000000..9e66031e25a --- /dev/null +++ b/device/aspeed/arm64-aspeed_nvidia_ast2700_bmc-r0/platform_components.json @@ -0,0 +1,8 @@ +{ + "chassis": { + "NVIDIA-AST2700-BMC": { + "component": { + } + } + } +} diff --git a/device/aspeed/arm64-aspeed_nvidia_ast2700_bmc-r0/platform_env.conf b/device/aspeed/arm64-aspeed_nvidia_ast2700_bmc-r0/platform_env.conf new file mode 100644 index 00000000000..b7947ba31fb --- /dev/null +++ b/device/aspeed/arm64-aspeed_nvidia_ast2700_bmc-r0/platform_env.conf @@ -0,0 +1,2 @@ +# BMC platform environment +switch_bmc=1 diff --git a/device/aspeed/arm64-aspeed_nvidia_ast2700_bmc-r0/pmon_daemon_control.json b/device/aspeed/arm64-aspeed_nvidia_ast2700_bmc-r0/pmon_daemon_control.json new file mode 100644 index 00000000000..6f68dbf1615 --- /dev/null +++ b/device/aspeed/arm64-aspeed_nvidia_ast2700_bmc-r0/pmon_daemon_control.json @@ -0,0 +1,18 @@ +{ + "skip_thermalctld": false, + "skip_ledd": true, + "skip_xcvrd": true, + "skip_psud": true, + "skip_syseepromd": false, + "skip_pcied": true, + "skip_chassisd": true, + "skip_chassis_db_init": false, + "skip_fancontrol": true, + "include_sensormond": false, + "thermalctld": { + "thermal_monitor_initial_interval": 5, + "thermal_monitor_update_interval": 60, + "thermal_monitor_update_elapsed_threshold": 30, + "enable_liquid_cooling": true + } +} diff --git a/device/aspeed/arm64-aspeed_nvidia_ast2700_bmc-r0/system_health_monitoring_config.json b/device/aspeed/arm64-aspeed_nvidia_ast2700_bmc-r0/system_health_monitoring_config.json new file mode 100644 index 00000000000..b223b634b94 --- /dev/null +++ b/device/aspeed/arm64-aspeed_nvidia_ast2700_bmc-r0/system_health_monitoring_config.json @@ -0,0 +1,11 @@ +{ + "services_to_ignore": [], + "devices_to_ignore": ["psu", "fan", "asic"], + "user_defined_checkers": [], + "polling_interval": 300, + "led_color": { + "fault": "amber", + "normal": "green", + "booting": "amber_blink" + } +} diff --git a/device/arista/x86_64-arista_7050sx3_48yc8/Arista-7050SX3-48YC8/buffers.json.j2 b/device/dell/x86_64-dell_s3248t-r0/DELL-S3248T/buffers.json.j2 similarity index 100% rename from device/arista/x86_64-arista_7050sx3_48yc8/Arista-7050SX3-48YC8/buffers.json.j2 rename to device/dell/x86_64-dell_s3248t-r0/DELL-S3248T/buffers.json.j2 diff --git a/device/dell/x86_64-dell_s3248t-r0/DELL-S3248T/buffers_defaults_t0.j2 b/device/dell/x86_64-dell_s3248t-r0/DELL-S3248T/buffers_defaults_t0.j2 new file mode 100644 index 00000000000..bfd81d10049 --- /dev/null +++ b/device/dell/x86_64-dell_s3248t-r0/DELL-S3248T/buffers_defaults_t0.j2 @@ -0,0 +1,41 @@ +{%- set default_cable = '5m' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {% for port_idx in range(0,32) %} + {% if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{% endif %} + {% endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "8192000", + "type": "ingress", + "mode": "dynamic", + "xoff": "196608" + }, + "egress_lossless_pool": { + "size": "8388608", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"0", + "static_th":"8388608" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, +{%- endmacro %} diff --git a/device/dell/x86_64-dell_s3248t-r0/DELL-S3248T/buffers_defaults_t1.j2 b/device/dell/x86_64-dell_s3248t-r0/DELL-S3248T/buffers_defaults_t1.j2 new file mode 100644 index 00000000000..3b9cd1f104d --- /dev/null +++ b/device/dell/x86_64-dell_s3248t-r0/DELL-S3248T/buffers_defaults_t1.j2 @@ -0,0 +1,41 @@ +{%- set default_cable = '300m' %} + +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {% for port_idx in range(0,32) %} + {% if PORT_ALL.append("Ethernet%d" % (port_idx * 4)) %}{% endif %} + {% endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "8192000", + "type": "ingress", + "mode": "dynamic", + "xoff": "196608" + }, + "egress_lossless_pool": { + "size": "8388608", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "dynamic_th":"3" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"0", + "static_th":"8388608" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"1518", + "dynamic_th":"3" + } + }, +{%- endmacro %} diff --git a/device/dell/x86_64-dell_s3248t-r0/DELL-S3248T/copp_capabilities_config.j2 b/device/dell/x86_64-dell_s3248t-r0/DELL-S3248T/copp_capabilities_config.j2 new file mode 100644 index 00000000000..2272281a395 --- /dev/null +++ b/device/dell/x86_64-dell_s3248t-r0/DELL-S3248T/copp_capabilities_config.j2 @@ -0,0 +1,4 @@ +{ + "copp_feat_eapol": true, + "copp_rx_rate":15000 +} diff --git a/device/dell/x86_64-dell_s3248t-r0/DELL-S3248T/copp_platform_config.j2 b/device/dell/x86_64-dell_s3248t-r0/DELL-S3248T/copp_platform_config.j2 new file mode 100644 index 00000000000..c69f957fe92 --- /dev/null +++ b/device/dell/x86_64-dell_s3248t-r0/DELL-S3248T/copp_platform_config.j2 @@ -0,0 +1,145 @@ +{ + "COPP_GROUP": { + "copp-system-lacp": { + "cir":"250", + "cbs":"250" + }, + "copp-system-udld": { + "cir":"250", + "cbs":"250" + }, + "copp-system-stp": { + "cir":"8000", + "cbs":"8000" + }, + "copp-system-bfd": { + "cir":"750", + "cbs":"750" + }, + "copp-system-lldp": { + "cir":"250", + "cbs":"250" + }, + "copp-system-vrrp": { + "cir":"250", + "cbs":"250" + }, + "copp-system-iccp": { + "cir":"2500", + "cbs":"2500" + }, + "copp-system-ospf": { + "cir":"2500", + "cbs":"2500" + }, + "copp-system-bgp": { + "cir":"5000", + "cbs":"5000" + }, + "copp-system-pim": { + "cir":"2500", + "cbs":"2500" + }, + "copp-system-igmp": { + "cir":"1000", + "cbs":"1000" + }, + "copp-system-suppress": { + "cir":"1500", + "cbs":"1500" + }, + "copp-system-arp": { + "cir":"1500", + "cbs":"1500" + }, + "copp-system-dhcp": { + "cir":"100", + "cbs":"100" + }, + "copp-system-icmp": { + "cir":"500", + "cbs":"500" + }, + "copp-system-ip2me": { + "cir":"3000", + "cbs":"3000" + }, + "copp-system-subnet": { + "cir":"1000", + "cbs":"1000" + }, + "copp-system-mtu": { + "cir":"250", + "cbs":"250" + }, + "copp-system-sflow": { + "cir":"4000", + "cbs":"4000" + } + }, + "SCHEDULER": { + "copp-scheduler-policy@23": { + "pir": "250" + }, + "copp-scheduler-policy@22": { + "pir": "250" + }, + "copp-scheduler-policy@21": { + "pir": "8000" + }, + "copp-scheduler-policy@20": { + "pir": "750" + }, + "copp-scheduler-policy@19": { + "pir": "2500" + }, + "copp-scheduler-policy@18": { + "pir": "250" + }, + "copp-scheduler-policy@17": { + "pir": "250" + }, + "copp-scheduler-policy@16": { + "pir": "2500" + }, + "copp-scheduler-policy@15": { + "pir": "2500" + }, + "copp-scheduler-policy@14": { + "pir": "5000" + }, + "copp-scheduler-policy@13": { + "pir": "2500" + }, + "copp-scheduler-policy@12": { + "pir": "1000" + }, + "copp-scheduler-policy@11": { + "pir": "1500" + }, + "copp-scheduler-policy@10": { + "pir": "1500" + }, + "copp-scheduler-policy@9": { + "pir": "150" + }, + "copp-scheduler-policy@8": { + "pir": "500" + }, + "copp-scheduler-policy@7": { + "pir": "3000" + }, + "copp-scheduler-policy@6": { + "pir": "1000" + }, + "copp-scheduler-policy@4": { + "pir": "250" + }, + "copp-scheduler-policy@3": { + "pir": "4000" + }, + "copp-scheduler-policy@1": { + "pir": "100" + } + } +} diff --git a/device/dell/x86_64-dell_s3248t-r0/DELL-S3248T/custom_led.bin b/device/dell/x86_64-dell_s3248t-r0/DELL-S3248T/custom_led.bin new file mode 100644 index 00000000000..b0583eea39d Binary files /dev/null and b/device/dell/x86_64-dell_s3248t-r0/DELL-S3248T/custom_led.bin differ diff --git a/device/dell/x86_64-dell_s3248t-r0/DELL-S3248T/hwsku.json b/device/dell/x86_64-dell_s3248t-r0/DELL-S3248T/hwsku.json new file mode 100644 index 00000000000..eb795ebe494 --- /dev/null +++ b/device/dell/x86_64-dell_s3248t-r0/DELL-S3248T/hwsku.json @@ -0,0 +1,10 @@ +{ + "interfaces": { + "Ethernet52": { + "default_brkout_mode": "1x100G[40G]" + }, + "Ethernet56": { + "default_brkout_mode": "1x100G[40G]" + } + } +} diff --git a/device/dell/x86_64-dell_s3248t-r0/DELL-S3248T/hx5-s3248t-48x1G+4x10G.config.bcm b/device/dell/x86_64-dell_s3248t-r0/DELL-S3248T/hx5-s3248t-48x1G+4x10G.config.bcm new file mode 100644 index 00000000000..c331ede1e50 --- /dev/null +++ b/device/dell/x86_64-dell_s3248t-r0/DELL-S3248T/hx5-s3248t-48x1G+4x10G.config.bcm @@ -0,0 +1,285 @@ +port_init_autoneg=0 +bcm_num_cos=8 +bcm_stat_interval=2000000 +bcm_tunnel_term_compatible_mode=1 +cdma_timeout_usec=3000000 +flow_init_mode=1 +ifa_enable=0 +ifp_inports_support_enable=1 +ipv6_lpm_128b_enable=0x1 +l2xmsg_mode=1 +l2xmsg_hostbuf_size=16384 +sai_brcm_sonic_trap_group=1 + +sai_crm_hw_nh_group_cnt=1 +sai_crm_hw_nh_group_member_cnt=1 +#Default L3 profile + +l2_mem_entries=32768 +l3_alpm_enable=2 +l3_alpm_ipv6_128b_bkt_rsvd=1 +l3_max_ecmp_mode=1 +l3_mem_entries=16348 +lpm_scaling_enable=0 +memlist_enable=1 +reglist_enable=1 +schan_intr_enable=0 +stable_size=0x6400000 +tdma_timeout_usec=3000000 + +pfc_deadlock_seq_control=1 + +#Port and PHY configs + +pbmp_xport_xe=0x1FFFFFFFFFFFFFFE +port_gmii_mode_33=1 +port_gmii_mode_17=1 +port_gmii_mode_1=1 +portmap_1=1:1 +portmap_2=2:1 +portmap_3=3:1 +portmap_4=4:1 +portmap_5=5:1 +portmap_6=6:1 +portmap_7=7:1 +portmap_8=8:1 +portmap_9=9:1 +portmap_10=10:1 +portmap_11=11:1 +portmap_12=12:1 +portmap_13=13:1 +portmap_14=14:1 +portmap_15=15:1 +portmap_16=16:1 +portmap_17=17:1 +portmap_18=18:1 +portmap_19=19:1 +portmap_20=20:1 +portmap_21=21:1 +portmap_22=22:1 +portmap_23=23:1 +portmap_24=24:1 +portmap_25=25:1 +portmap_26=26:1 +portmap_27=27:1 +portmap_28=28:1 +portmap_29=29:1 +portmap_30=30:1 +portmap_31=31:1 +portmap_32=32:1 +portmap_33=33:1 +portmap_34=34:1 +portmap_35=35:1 +portmap_36=36:1 +portmap_37=37:1 +portmap_38=38:1 +portmap_39=39:1 +portmap_40=40:1 +portmap_41=41:1 +portmap_42=42:1 +portmap_43=43:1 +portmap_44=44:1 +portmap_45=45:1 +portmap_46=46:1 +portmap_47=47:1 +portmap_48=48:1 +portmap_49=64:10 +portmap_50=63:10 +portmap_51=62:10 +portmap_52=61:10 +portmap_53=69:100 +portmap_57=73:100 +phy_chain_tx_lane_map_physical{33.0}=0x2301 +phy_chain_rx_lane_map_physical{33.0}=0x2301 +phy_port_primary_and_offset_1=0x0100 +phy_port_primary_and_offset_2=0x0101 +phy_port_primary_and_offset_3=0x0102 +phy_port_primary_and_offset_4=0x0103 +phy_port_primary_and_offset_5=0x0104 +phy_port_primary_and_offset_6=0x0105 +phy_port_primary_and_offset_7=0x0106 +phy_port_primary_and_offset_8=0x0107 +phy_port_primary_and_offset_9=0x0900 +phy_port_primary_and_offset_10=0x0901 +phy_port_primary_and_offset_11=0x0902 +phy_port_primary_and_offset_12=0x0903 +phy_port_primary_and_offset_13=0x0904 +phy_port_primary_and_offset_14=0x0905 +phy_port_primary_and_offset_15=0x0906 +phy_port_primary_and_offset_16=0x0907 +phy_port_primary_and_offset_17=0x1200 +phy_port_primary_and_offset_18=0x1201 +phy_port_primary_and_offset_19=0x1202 +phy_port_primary_and_offset_20=0x1203 +phy_port_primary_and_offset_21=0x1204 +phy_port_primary_and_offset_22=0x1205 +phy_port_primary_and_offset_23=0x1206 +phy_port_primary_and_offset_24=0x1207 +phy_port_primary_and_offset_25=0x2000 +phy_port_primary_and_offset_26=0x2001 +phy_port_primary_and_offset_27=0x2002 +phy_port_primary_and_offset_28=0x2003 +phy_port_primary_and_offset_29=0x2004 +phy_port_primary_and_offset_30=0x2005 +phy_port_primary_and_offset_31=0x2006 +phy_port_primary_and_offset_32=0x2007 +phy_port_primary_and_offset_33=0x2900 +phy_port_primary_and_offset_34=0x2901 +phy_port_primary_and_offset_35=0x2902 +phy_port_primary_and_offset_36=0x2903 +phy_port_primary_and_offset_37=0x2904 +phy_port_primary_and_offset_38=0x2905 +phy_port_primary_and_offset_39=0x2906 +phy_port_primary_and_offset_40=0x2907 +phy_port_primary_and_offset_41=0x3200 +phy_port_primary_and_offset_42=0x3201 +phy_port_primary_and_offset_43=0x3202 +phy_port_primary_and_offset_44=0x3203 +phy_port_primary_and_offset_45=0x3204 +phy_port_primary_and_offset_46=0x3205 +phy_port_primary_and_offset_47=0x3206 +phy_port_primary_and_offset_48=0x3207 +port_phy_addr_1=0x0 +port_phy_addr_2=0x1 +port_phy_addr_3=0x2 +port_phy_addr_4=0x3 +port_phy_addr_5=0x4 +port_phy_addr_6=0x5 +port_phy_addr_7=0x6 +port_phy_addr_8=0x7 +port_phy_addr_9=0x9 +port_phy_addr_10=0xa +port_phy_addr_11=0xb +port_phy_addr_12=0xc +port_phy_addr_13=0xd +port_phy_addr_14=0xe +port_phy_addr_15=0xf +port_phy_addr_16=0x10 +port_phy_addr_17=0x12 +port_phy_addr_18=0x13 +port_phy_addr_19=0x14 +port_phy_addr_20=0x15 +port_phy_addr_21=0x16 +port_phy_addr_22=0x17 +port_phy_addr_23=0x18 +port_phy_addr_24=0x19 +port_phy_addr_25=0x20 +port_phy_addr_26=0x21 +port_phy_addr_27=0x22 +port_phy_addr_28=0x23 +port_phy_addr_29=0x24 +port_phy_addr_30=0x25 +port_phy_addr_31=0x26 +port_phy_addr_32=0x27 +port_phy_addr_33=0x29 +port_phy_addr_34=0x2a +port_phy_addr_35=0x2b +port_phy_addr_36=0x2c +port_phy_addr_37=0x2d +port_phy_addr_38=0x2e +port_phy_addr_39=0x2f +port_phy_addr_40=0x30 +port_phy_addr_41=0x32 +port_phy_addr_42=0x33 +port_phy_addr_43=0x34 +port_phy_addr_44=0x35 +port_phy_addr_45=0x36 +port_phy_addr_46=0x37 +port_phy_addr_47=0x38 +port_phy_addr_48=0x39 +port_phy_addr_49=0x40 +phy_force_firmware_load_50=0x01 +port_phy_addr_50=0x41 +phy_force_firmware_load_51=0x01 +port_phy_addr_51=0x42 +phy_force_firmware_load_52=0x01 +port_phy_addr_52=0x43 +port_phy_addr_61=0x44 +port_phy_addr_62=0x45 +port_phy_addr_63=0x46 +port_phy_addr_64=0x47 +phy_pcs_repeater_49=0x01 +phy_pcs_repeater_50=0x01 +phy_pcs_repeater_51=0x01 +phy_pcs_repeater_52=0x01 +dport_map_port_1=1 +dport_map_port_2=2 +dport_map_port_3=3 +dport_map_port_4=4 +dport_map_port_5=5 +dport_map_port_6=6 +dport_map_port_7=7 +dport_map_port_8=8 +dport_map_port_9=9 +dport_map_port_10=10 +dport_map_port_11=11 +dport_map_port_12=12 +dport_map_port_13=13 +dport_map_port_14=14 +dport_map_port_15=15 +dport_map_port_16=16 +dport_map_port_17=17 +dport_map_port_18=18 +dport_map_port_19=19 +dport_map_port_20=20 +dport_map_port_21=21 +dport_map_port_22=22 +dport_map_port_23=23 +dport_map_port_24=24 +dport_map_port_25=25 +dport_map_port_26=26 +dport_map_port_27=27 +dport_map_port_28=28 +dport_map_port_29=29 +dport_map_port_30=30 +dport_map_port_31=31 +dport_map_port_32=32 +dport_map_port_33=33 +dport_map_port_34=34 +dport_map_port_35=35 +dport_map_port_36=36 +dport_map_port_37=37 +dport_map_port_38=38 +dport_map_port_39=39 +dport_map_port_40=40 +dport_map_port_41=41 +dport_map_port_42=42 +dport_map_port_43=43 +dport_map_port_44=44 +dport_map_port_45=45 +dport_map_port_46=46 +dport_map_port_47=47 +dport_map_port_48=48 +dport_map_port_49=49 +dport_map_port_50=50 +dport_map_port_51=51 +dport_map_port_52=52 +dport_map_port_53=53 +dport_map_port_54=54 +dport_map_port_55=55 +dport_map_port_56=56 +dport_map_port_57=57 +dport_map_port_58=58 +dport_map_port_59=59 +dport_map_port_60=60 +port_flex_enable=1 +sai_preinit_cmd_file=/usr/share/sonic/hwsku/sai_preinit_cmd.soc +sai_legacy_ledproc_linkscan_cb=0 +sai_fdb_entry_l2_discard_src_enable=1 +sai_interface_type_auto_detect=0 +xphy_primary_core_num_70=0x44 +xphy_primary_core_num_71=0x44 +xphy_primary_core_num_64=0x40 +core_clock_frequency=893 +xphy_primary_core_num_65=0x40 +xphy_primary_core_num_66=0x40 +phy_force_firmware_load=0x11 +phy_an_c73=1 +xphy_primary_core_num_67=0x40 +host_as_route_disable=1 +xphy_primary_core_num_68=0x44 +xphy_primary_core_num_69=0x44 +sai_mmu_max_buffer_profiles=20 +#MDIO clock change +rate_ext_mdio_divisor=0xff +mdio_output_delay=0x5 diff --git a/device/dell/x86_64-dell_s3248t-r0/DELL-S3248T/linkscan_led_fw.bin b/device/dell/x86_64-dell_s3248t-r0/DELL-S3248T/linkscan_led_fw.bin new file mode 100644 index 00000000000..e86cdc1ef64 Binary files /dev/null and b/device/dell/x86_64-dell_s3248t-r0/DELL-S3248T/linkscan_led_fw.bin differ diff --git a/device/dell/x86_64-dell_s3248t-r0/DELL-S3248T/pg_profile_lookup.ini b/device/dell/x86_64-dell_s3248t-r0/DELL-S3248T/pg_profile_lookup.ini new file mode 100644 index 00000000000..6d91d03ae68 --- /dev/null +++ b/device/dell/x86_64-dell_s3248t-r0/DELL-S3248T/pg_profile_lookup.ini @@ -0,0 +1,17 @@ +# PG lossless profiles. +# speed cable size xon xoff threshold xon_offset + 10000 5m 9427 0 50176 1 3584 + 25000 5m 9427 0 50176 1 3584 + 40000 5m 9427 0 50176 1 3584 + 50000 5m 9427 0 50176 1 3584 + 100000 5m 9427 0 50176 1 3584 + 10000 40m 9427 0 50176 1 3584 + 25000 40m 9427 0 50176 1 3584 + 40000 40m 9427 0 50176 1 3584 + 50000 40m 9427 0 50176 1 3584 + 100000 40m 9427 0 50176 1 3584 + 10000 300m 9427 0 50176 1 3584 + 25000 300m 9427 0 50176 1 3584 + 40000 300m 9427 0 50176 1 3584 + 50000 300m 9427 0 50176 1 3584 + 100000 300m 9427 0 50176 1 3584 diff --git a/device/dell/x86_64-dell_s3248t-r0/DELL-S3248T/platform-def.json b/device/dell/x86_64-dell_s3248t-r0/DELL-S3248T/platform-def.json new file mode 100644 index 00000000000..0e9eb396965 --- /dev/null +++ b/device/dell/x86_64-dell_s3248t-r0/DELL-S3248T/platform-def.json @@ -0,0 +1,45 @@ +{ + "fec-mode": { + "Ethernet52-59": { + "1": { + "1000": [ "none" ], + "10000": [ "none", "fc" ], + "25000": [ "none", "fc", "rs" ] + }, + "4": { + "40000": [ "none", "fc" ], + "100000": [ "none", "rs" ] + } + } + }, + "default-fec-mode": { + "Ethernet52-59": { + "1": { + "1000": "none", + "10000": "none", + "25000": "none" + }, + "4": { + "40000": "none", + "100000": "none" + } + } + }, + "default-autoneg-mode": { + "Ethernet0-47": { + "autoneg": "on" + } + }, + "native-port-supported-speeds": { + "Ethernet0-47": { + "1": ["1000","100","10"] + }, + "Ethernet48-51": { + "1": ["10000","1000"] + }, + "Ethernet52-59": { + "4": ["100000","40000"], + "1": ["25000","10000","1000"] + } + } +} diff --git a/device/dell/x86_64-dell_s3248t-r0/DELL-S3248T/port_config.ini b/device/dell/x86_64-dell_s3248t-r0/DELL-S3248T/port_config.ini new file mode 100644 index 00000000000..6c790713590 --- /dev/null +++ b/device/dell/x86_64-dell_s3248t-r0/DELL-S3248T/port_config.ini @@ -0,0 +1,55 @@ +# name lanes alias index speed autoneg +Ethernet0 1 oneGigE1/1 1 1000 on +Ethernet1 2 oneGigE1/2 2 1000 on +Ethernet2 3 oneGigE1/3 3 1000 on +Ethernet3 4 oneGigE1/4 4 1000 on +Ethernet4 5 oneGigE1/5 5 1000 on +Ethernet5 6 oneGigE1/6 6 1000 on +Ethernet6 7 oneGigE1/7 7 1000 on +Ethernet7 8 oneGigE1/8 8 1000 on +Ethernet8 9 oneGigE1/9 9 1000 on +Ethernet9 10 oneGigE1/10 10 1000 on +Ethernet10 11 oneGigE1/11 11 1000 on +Ethernet11 12 oneGigE1/12 12 1000 on +Ethernet12 13 oneGigE1/13 13 1000 on +Ethernet13 14 oneGigE1/14 14 1000 on +Ethernet14 15 oneGigE1/15 15 1000 on +Ethernet15 16 oneGigE1/16 16 1000 on +Ethernet16 17 oneGigE1/17 17 1000 on +Ethernet17 18 oneGigE1/18 18 1000 on +Ethernet18 19 oneGigE1/19 19 1000 on +Ethernet19 20 oneGigE1/20 20 1000 on +Ethernet20 21 oneGigE1/21 21 1000 on +Ethernet21 22 oneGigE1/22 22 1000 on +Ethernet22 23 oneGigE1/23 23 1000 on +Ethernet23 24 oneGigE1/24 24 1000 on +Ethernet24 25 oneGigE1/25 25 1000 on +Ethernet25 26 oneGigE1/26 26 1000 on +Ethernet26 27 oneGigE1/27 27 1000 on +Ethernet27 28 oneGigE1/28 28 1000 on +Ethernet28 29 oneGigE1/29 29 1000 on +Ethernet29 30 oneGigE1/30 30 1000 on +Ethernet30 31 oneGigE1/31 31 1000 on +Ethernet31 32 oneGigE1/32 32 1000 on +Ethernet32 33 oneGigE1/33 33 1000 on +Ethernet33 34 oneGigE1/34 34 1000 on +Ethernet34 35 oneGigE1/35 35 1000 on +Ethernet35 36 oneGigE1/36 36 1000 on +Ethernet36 37 oneGigE1/37 37 1000 on +Ethernet37 38 oneGigE1/38 38 1000 on +Ethernet38 39 oneGigE1/39 39 1000 on +Ethernet39 40 oneGigE1/40 40 1000 on +Ethernet40 41 oneGigE1/41 41 1000 on +Ethernet41 42 oneGigE1/42 42 1000 on +Ethernet42 43 oneGigE1/43 43 1000 on +Ethernet43 44 oneGigE1/44 44 1000 on +Ethernet44 45 oneGigE1/45 45 1000 on +Ethernet45 46 oneGigE1/46 46 1000 on +Ethernet46 47 oneGigE1/47 47 1000 on +Ethernet47 48 oneGigE1/48 48 1000 on +Ethernet48 64 tenGigE1/49 49 10000 off +Ethernet49 63 tenGigE1/50 50 10000 off +Ethernet50 62 tenGigE1/51 51 10000 off +Ethernet51 61 tenGigE1/52 52 10000 off +Ethernet52 69,70,71,72 hundredGigE1/53 53 100000 off +Ethernet56 73,74,75,76 hundredGigE1/54 54 100000 off diff --git a/device/dell/x86_64-dell_s3248t-r0/DELL-S3248T/qos.json.j2 b/device/dell/x86_64-dell_s3248t-r0/DELL-S3248T/qos.json.j2 new file mode 100644 index 00000000000..ee67c6e2622 --- /dev/null +++ b/device/dell/x86_64-dell_s3248t-r0/DELL-S3248T/qos.json.j2 @@ -0,0 +1 @@ +{%- include 'qos_config_t1.j2' %} diff --git a/device/dell/x86_64-dell_s3248t-r0/DELL-S3248T/qos_config_t1.j2 b/device/dell/x86_64-dell_s3248t-r0/DELL-S3248T/qos_config_t1.j2 new file mode 100644 index 00000000000..5fe5324a85c --- /dev/null +++ b/device/dell/x86_64-dell_s3248t-r0/DELL-S3248T/qos_config_t1.j2 @@ -0,0 +1,175 @@ +{%- set PORT_ALL = [] %} +{%- for port in PORT %} + {%- if PORT_ALL.append(port) %}{% endif %} +{%- endfor %} +{%- if PORT_ALL | sort_by_port_index %}{% endif %} + +{%- set port_names_list_all = [] %} +{%- for port in PORT_ALL %} + {%- if port_names_list_all.append(port) %}{% endif %} +{%- endfor %} +{%- set port_names_all = port_names_list_all | join(',') -%} + + +{%- set PORT_ACTIVE = [] %} +{%- if DEVICE_NEIGHBOR is not defined %} + {%- set PORT_ACTIVE = PORT_ALL %} +{%- else %} + {%- for port in DEVICE_NEIGHBOR.keys() %} + {%- if PORT_ACTIVE.append(port) %}{%- endif %} + {%- endfor %} +{%- endif %} +{%- if PORT_ACTIVE | sort_by_port_index %}{% endif %} + +{%- set port_names_list_active = [] %} +{%- for port in PORT_ACTIVE %} + {%- if port_names_list_active.append(port) %}{%- endif %} +{%- endfor %} +{%- set port_names_active = port_names_list_active | join(',') -%} + + +{%- set pfc_to_pg_map_supported_asics = ['mellanox', 'barefoot', 'marvell'] -%} + + +{ +{% if generate_tc_to_pg_map is defined %} + {{- generate_tc_to_pg_map() }} +{% else %} + "TC_TO_PRIORITY_GROUP_MAP": { + "AZURE": { + "0": "0", + "1": "0", + "2": "0", + "3": "3", + "4": "4", + "5": "0", + "6": "0", + "7": "7" + } + }, +{% endif %} + "MAP_PFC_PRIORITY_TO_QUEUE": { + "AZURE": { + "0": "0", + "1": "1", + "2": "2", + "3": "3", + "4": "4", + "5": "5", + "6": "6", + "7": "7" + } + }, + "TC_TO_QUEUE_MAP": { + "AZURE": { + "0": "0", + "1": "1", + "2": "2", + "3": "3", + "4": "4", + "5": "5", + "6": "6", + "7": "7" + } + }, + "DSCP_TO_TC_MAP": { + "AZURE": { + "0" : "1", + "1" : "1", + "2" : "1", + "3" : "3", + "4" : "4", + "5" : "2", + "6" : "1", + "7" : "1", + "8" : "0", + "9" : "1", + "10": "1", + "11": "1", + "12": "1", + "13": "1", + "14": "1", + "15": "1", + "16": "1", + "17": "1", + "18": "1", + "19": "1", + "20": "1", + "21": "1", + "22": "1", + "23": "1", + "24": "1", + "25": "1", + "26": "1", + "27": "1", + "28": "1", + "29": "1", + "30": "1", + "31": "1", + "32": "1", + "33": "1", + "34": "1", + "35": "1", + "36": "1", + "37": "1", + "38": "1", + "39": "1", + "40": "1", + "41": "1", + "42": "1", + "43": "1", + "44": "1", + "45": "1", + "46": "5", + "47": "1", + "48": "6", + "49": "1", + "50": "1", + "51": "1", + "52": "1", + "53": "1", + "54": "1", + "55": "1", + "56": "1", + "57": "1", + "58": "1", + "59": "1", + "60": "1", + "61": "1", + "62": "1", + "63": "1" + } + }, + "SCHEDULER": { + "scheduler.0": { + "type" : "DWRR", + "weight": "14" + }, + "scheduler.1": { + "type" : "DWRR", + "weight": "15" + } + }, +{% if asic_type in pfc_to_pg_map_supported_asics %} + "PFC_PRIORITY_TO_PRIORITY_GROUP_MAP": { + "AZURE": { + "3": "3", + "4": "4" + } + }, +{% endif %} + "PORT_QOS_MAP": { +{% for port in PORT_ACTIVE %} + "{{ port }}": { + "dscp_to_tc_map" : "[DSCP_TO_TC_MAP|AZURE]", + "tc_to_queue_map" : "[TC_TO_QUEUE_MAP|AZURE]", + "tc_to_pg_map" : "[TC_TO_PRIORITY_GROUP_MAP|AZURE]", + "pfc_to_queue_map": "[MAP_PFC_PRIORITY_TO_QUEUE|AZURE]", +{% if asic_type in pfc_to_pg_map_supported_asics %} + "pfc_to_pg_map" : "[PFC_PRIORITY_TO_PRIORITY_GROUP_MAP|AZURE]", +{% endif %} + "pfc_enable" : "3,4" + }{% if not loop.last %},{% endif %} +{% endfor %} + } +} diff --git a/device/dell/x86_64-dell_s3248t-r0/DELL-S3248T/sai.profile b/device/dell/x86_64-dell_s3248t-r0/DELL-S3248T/sai.profile new file mode 100644 index 00000000000..39ed541441c --- /dev/null +++ b/device/dell/x86_64-dell_s3248t-r0/DELL-S3248T/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/hx5-s3248t-48x1G+4x10G.config.bcm diff --git a/device/dell/x86_64-dell_s3248t-r0/DELL-S3248T/sai_preinit_cmd.soc b/device/dell/x86_64-dell_s3248t-r0/DELL-S3248T/sai_preinit_cmd.soc new file mode 100644 index 00000000000..4d62900f898 --- /dev/null +++ b/device/dell/x86_64-dell_s3248t-r0/DELL-S3248T/sai_preinit_cmd.soc @@ -0,0 +1,2 @@ +m0 load 0 0x0 /usr/share/sonic/hwsku/linkscan_led_fw.bin +m0 load 0 0x3800 /usr/share/sonic/hwsku/custom_led.bin diff --git a/device/dell/x86_64-dell_s3248t-r0/default_sku b/device/dell/x86_64-dell_s3248t-r0/default_sku new file mode 100644 index 00000000000..ae2bb4a6fea --- /dev/null +++ b/device/dell/x86_64-dell_s3248t-r0/default_sku @@ -0,0 +1 @@ +DELL-S3248T t1 diff --git a/device/dell/x86_64-dell_s3248t-r0/init_cfg.json b/device/dell/x86_64-dell_s3248t-r0/init_cfg.json new file mode 100644 index 00000000000..e104fd15a34 --- /dev/null +++ b/device/dell/x86_64-dell_s3248t-r0/init_cfg.json @@ -0,0 +1,7 @@ +{ + "FEATURE": { + "warm-reboot": { + "state": "not-supported" + } + } +} diff --git a/device/dell/x86_64-dell_s3248t-r0/installer.conf b/device/dell/x86_64-dell_s3248t-r0/installer.conf new file mode 100644 index 00000000000..d1581d64f7e --- /dev/null +++ b/device/dell/x86_64-dell_s3248t-r0/installer.conf @@ -0,0 +1,4 @@ +CONSOLE_PORT=0x3f8 +CONSOLE_DEV=0 +RESTRICTED_PLATFORM=y +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="intel_iommu=off irqfixup" diff --git a/device/dell/x86_64-dell_s3248t-r0/led_proc_init.soc b/device/dell/x86_64-dell_s3248t-r0/led_proc_init.soc new file mode 100644 index 00000000000..1e0ec2bfe27 --- /dev/null +++ b/device/dell/x86_64-dell_s3248t-r0/led_proc_init.soc @@ -0,0 +1,7 @@ +# LED microprocessor initialization for Dell S3248T +# +# +#Led0 +m0 load 0 0x3800 /usr/share/sonic/hwsku/custom_led.bin +led start +led auto on diff --git a/device/dell/x86_64-dell_s3248t-r0/media_settings.json b/device/dell/x86_64-dell_s3248t-r0/media_settings.json new file mode 100644 index 00000000000..06e553029ce --- /dev/null +++ b/device/dell/x86_64-dell_s3248t-r0/media_settings.json @@ -0,0 +1,111 @@ +{ + "GLOBAL_MEDIA_SETTINGS": { + "49-52": { + "SFP\\+-CR-.*": { + "preemphasis": { + "lane0": "0x002000" + } + } + }, + "53-54": { + "(QSFP\\+-CR-.*)|(SFP\\+-CR-.*)": { + "preemphasis": { + "lane0": "0x0c490f", + "lane1": "0x0f490c", + "lane2": "0x0c490f", + "lane3": "0x0f490c" + } + }, + "(QSFP28-CR-.*)|(SFP28-CR-.*)": { + "preemphasis": { + "lane0": "0x0c490f", + "lane1": "0x0f490c", + "lane2": "0x0c490f", + "lane3": "0x0f490c" + } + } + } + }, + "PORT_MEDIA_SETTINGS": { + "49": { + "SFP\\+-.*": { + "preemphasis": { + "lane0": "0x082402" + } + } + }, + "50": { + "SFP\\+-.*": { + "preemphasis": { + "lane0": "0x082402" + } + } + }, + "51": { + "SFP\\+-.*": { + "preemphasis": { + "lane0": "0x082402" + } + } + }, + "52": { + "SFP\\+-.*": { + "preemphasis": { + "lane0": "0x082402" + } + } + }, + "53": { + "QSFP\\+-.*": { + "preemphasis": { + "lane0": "0x194a01", + "lane1": "0x194803", + "lane2": "0x194902", + "lane3": "0x194902" + } + }, + "(QSFP28-.*)|(SFP28-.*)": { + "preemphasis": { + "lane0": "0x194a01", + "lane1": "0x194803", + "lane2": "0x194902", + "lane3": "0x194902" + } + }, + "SFP\\+-.*": { + "preemphasis": { + "lane0": "0x194a01", + "lane1": "0x194803", + "lane2": "0x194902", + "lane3": "0x194902" + } + } + }, + "54": { + "QSFP\\+-.*": { + "preemphasis": { + "lane0": "0x194902", + "lane1": "0x194902", + "lane2": "0x194902", + "lane3": "0x194902" + } + }, + "(QSFP28-.*)|(SFP28-.*)": { + "preemphasis": { + "lane0": "0x194902", + "lane1": "0x194902", + "lane2": "0x194902", + "lane3": "0x194902" + } + }, + "SFP\\+-.*": { + "preemphasis": { + "lane0": "0x194902", + "lane1": "0x194902", + "lane2": "0x194902", + "lane3": "0x194902" + } + } + } + } +} diff --git a/device/dell/x86_64-dell_s3248t-r0/platform.json b/device/dell/x86_64-dell_s3248t-r0/platform.json new file mode 100644 index 00000000000..85697186b25 --- /dev/null +++ b/device/dell/x86_64-dell_s3248t-r0/platform.json @@ -0,0 +1,361 @@ +{ + "chassis": { + "name": "S3248T-ON", + "status_led": { + "controllable": true, + "colors": ["green", "blink_green", "yellow", "blink_yellow"] + }, + "thermal_manager" : true, + "components": [ + { + "name": "BIOS" + }, + { + "name": "CPU CPLD" + }, + { + "name": "SYS CPLD" + }, + { + "name": "PCIe" + } + ], + "fans": [ + { + "name": "FanTray1-Fan1", + "speed": { + "controllable":false + }, + "status_led": { + "available": false + } + }, + { + "name": "FanTray2-Fan1", + "speed": { + "controllable":false + }, + "status_led": { + "available": false + } + }, + { + "name": "FanTray3-Fan1", + "speed": { + "controllable":false + }, + "status_led": { + "available": false + } + } + ], + "fan_drawers":[ + { + "name": "FanTray1", + "status_led": { + "controllable": true, + "colors": ["off", "green", "yellow"] + }, + "fans": [ + { + "name": "FanTray1-Fan1", + "speed": { + "controllable":false + }, + "status_led": { + "available": false + } + } + ] + }, + { + "name": "FanTray2", + "status_led": { + "controllable": true, + "colors": ["off", "green", "yellow"] + }, + "fans": [ + { + "name": "FanTray2-Fan1", + "speed": { + "controllable":false + }, + "status_led": { + "available": false + } + } + ] + }, + { + "name": "FanTray3", + "status_led": { + "controllable": true, + "colors": ["off", "green", "yellow"] + }, + "fans": [ + { + "name": "FanTray3-Fan1", + "speed": { + "controllable":false + }, + "status_led": { + "available": false + } + } + ] + } + ], + "psus": [ + { + "name": "PSU1", + "status_led": { + "controllable": false + }, + "fans": [ + { + "name": "PSU1 Fan", + "speed": { + "controllable": false + }, + "status_led": { + "available": false + } + } + ] + }, + { + "name": "PSU2", + "status_led": { + "controllable": false + }, + "fans": [ + { + "name": "PSU2 Fan", + "speed": { + "controllable": false + }, + "status_led": { + "available": false + } + } + ] + } + ], + "thermals": [ + { + "name": "CPU On-board Temperature", + "controllable": false, + "low-crit-threshold": false, + "high-crit-threshold": false, + "minimum-recorded": false, + "maximum-recorded": false + }, + { + "name": "Main board Temperature", + "controllable": false, + "low-crit-threshold": false, + "high-crit-threshold": false, + "minimum-recorded": false, + "maximum-recorded": false + }, + { + "name": "Underneath CPU Temperature", + "controllable": false, + "low-crit-threshold": false, + "high-crit-threshold": false, + "minimum-recorded": false, + "maximum-recorded": false + }, + { + "name": "PSU inlet Temperature", + "controllable": false, + "low-crit-threshold": false, + "high-crit-threshold": false, + "minimum-recorded": false, + "maximum-recorded": false + }, + { + "name": "Front plate inlet Temperature", + "controllable": false, + "low-crit-threshold": false, + "high-crit-threshold": false, + "minimum-recorded": false, + "maximum-recorded": false + }, + { + "name": "Fan board Temperature", + "controllable": false, + "low-crit-threshold": false, + "high-crit-threshold": false, + "minimum-recorded": false, + "maximum-recorded": false + } + ], + "modules": [], + "sfps": [ + { + "name": "RJ45" + }, + { + "name": "RJ45" + }, + { + "name": "RJ45" + }, + { + "name": "RJ45" + }, + { + "name": "RJ45" + }, + { + "name": "RJ45" + }, + { + "name": "RJ45" + }, + { + "name": "RJ45" + }, + { + "name": "RJ45" + }, + { + "name": "RJ45" + }, + { + "name": "RJ45" + }, + { + "name": "RJ45" + }, + { + "name": "RJ45" + }, + { + "name": "RJ45" + }, + { + "name": "RJ45" + }, + { + "name": "RJ45" + }, + { + "name": "RJ45" + }, + { + "name": "RJ45" + }, + { + "name": "RJ45" + }, + { + "name": "RJ45" + }, + { + "name": "RJ45" + }, + { + "name": "RJ45" + }, + { + "name": "RJ45" + }, + { + "name": "RJ45" + }, + { + "name": "RJ45" + }, + { + "name": "RJ45" + }, + { + "name": "RJ45" + }, + { + "name": "RJ45" + }, + { + "name": "RJ45" + }, + { + "name": "RJ45" + }, + { + "name": "RJ45" + }, + { + "name": "RJ45" + }, + { + "name": "RJ45" + }, + { + "name": "RJ45" + }, + { + "name": "RJ45" + }, + { + "name": "RJ45" + }, + { + "name": "RJ45" + }, + { + "name": "RJ45" + }, + { + "name": "RJ45" + }, + { + "name": "RJ45" + }, + { + "name": "RJ45" + }, + { + "name": "RJ45" + }, + { + "name": "RJ45" + }, + { + "name": "RJ45" + }, + { + "name": "RJ45" + }, + { + "name": "RJ45" + }, + { + "name": "RJ45" + }, + { + "name": "RJ45" + }, + { + "name": "SFP/SFP+" + }, + { + "name": "SFP/SFP+" + }, + { + "name": "SFP/SFP+" + }, + { + "name": "SFP/SFP+" + }, + { + "name": "QSFP+/QSFP28" + }, + { + "name": "QSFP+/QSFP28" + } + ] + }, + "interfaces": {} +} diff --git a/device/dell/x86_64-dell_s3248t-r0/platform_asic b/device/dell/x86_64-dell_s3248t-r0/platform_asic new file mode 100644 index 00000000000..96046765276 --- /dev/null +++ b/device/dell/x86_64-dell_s3248t-r0/platform_asic @@ -0,0 +1 @@ +broadcom diff --git a/device/dell/x86_64-dell_s3248t-r0/plugins/eeprom.py b/device/dell/x86_64-dell_s3248t-r0/plugins/eeprom.py new file mode 100644 index 00000000000..6cd3048e812 --- /dev/null +++ b/device/dell/x86_64-dell_s3248t-r0/plugins/eeprom.py @@ -0,0 +1,22 @@ +#!/usr/bin/python3 + +""" + Dell S3248T + + Platform and model specific eeprom subclass, inherits from the base class, + and provides the followings: + - the eeprom format definition + - specific encoder/decoder if there is special need +""" + +try: + from sonic_eeprom import eeprom_tlvinfo +except ImportError as err: + raise ImportError(str(err) + "- required module not found") + + +class board(eeprom_tlvinfo.TlvInfoDecoder): + + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/class/i2c-adapter/i2c-2/2-0050/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) diff --git a/device/dell/x86_64-dell_s3248t-r0/plugins/fanutil.py b/device/dell/x86_64-dell_s3248t-r0/plugins/fanutil.py new file mode 100644 index 00000000000..2bb7c079a75 --- /dev/null +++ b/device/dell/x86_64-dell_s3248t-r0/plugins/fanutil.py @@ -0,0 +1,72 @@ +""" + fanutil.py + Platform-specific FAN status interface for SONiC +""" + +import os +import sys +from sonic_py_common.general import getstatusoutput_noshell + +SENSORS_CMD = ["docker", "exec", "-i", "pmon", "/usr/bin/sensors"] +DOCKER_SENSORS_CMD = "/usr/bin/sensors" + + +try: + from sonic_fan.fan_base import FanBase +except ImportError as err: + raise ImportError(str(err) + "- required module not found") + + +class FanUtil(FanBase): + """Platform-specific FanUtil class""" + _fan_mapping = { + 1 : '0', + 2 : '1', + 3 : '2' + } + + def __init__(self): + FanBase.__init__(self) + + def isDockerEnv(self): + num_docker = open('/proc/self/cgroup', 'r').read().count(":/docker") + if num_docker > 0: + return True + + def get_num_fans(self): + S3248T_MAX_FANTRAYS = 3 + return S3248T_MAX_FANTRAYS + + def get_presence(self, idx): + sysfs_path = "/sys/devices/platform/dell-s3248t-cpld.0/fan" + self._fan_mapping[idx] + "_prs" + return int(open(sysfs_path).read(), 16) + + def get_direction(self, idx): + sysfs_path = "/sys/devices/platform/dell-s3248t-cpld.0/fan" + self._fan_mapping[idx] + "_dir" + return open(sysfs_path).read() + + def get_speed(self, idx): + dockerenv = self.isDockerEnv() + if not dockerenv: + status, cmd_output = getstatusoutput_noshell(SENSORS_CMD) + else: + status, cmd_output = getstatusoutput_noshell(DOCKER_SENSORS_CMD) + + if status: + print('Failed to execute sensors command') + sys.exit(0) + fan_id = 'Fan ' + str(idx) + found = False + for line in cmd_output.splitlines(): + if line.startswith('emc2305-i2c-7-2c'): + found = True + if found and line.startswith(fan_id): + return line.split()[3] + return 0.0 + + def get_status(self, idx): + sysfs_path = "/sys/devices/platform/dell-s3248t-cpld.0/fan" + self._fan_mapping[idx] + "_prs" + return int(open(sysfs_path).read(), 16) + + def set_speed(self, idx): + return False diff --git a/device/dell/x86_64-dell_s3248t-r0/plugins/pcie.yaml b/device/dell/x86_64-dell_s3248t-r0/plugins/pcie.yaml new file mode 100644 index 00000000000..dd804926856 --- /dev/null +++ b/device/dell/x86_64-dell_s3248t-r0/plugins/pcie.yaml @@ -0,0 +1,16 @@ +- bus: '02' + dev: '00' + fn: '0' + id: '1533' + name: 'Ethernet controller: Intel Corporation I210 Gigabit Network Connection (rev + 03)' +- bus: '01' + dev: '00' + fn: '0' + id: b371 + name: 'Ethernet controller: Broadcom Limited BCM56371 Switch ASIC (rev 02)' +- bus: '00' + dev: '14' + fn: '0' + id: 19c2 + name: 'SATA controller: Intel Corporation DNV SATA Controller 1 (rev 11)' diff --git a/device/dell/x86_64-dell_s3248t-r0/plugins/psuutil.py b/device/dell/x86_64-dell_s3248t-r0/plugins/psuutil.py new file mode 100644 index 00000000000..14efe9db9de --- /dev/null +++ b/device/dell/x86_64-dell_s3248t-r0/plugins/psuutil.py @@ -0,0 +1,190 @@ +""" + psuutil.py + Platform-specific PSU status interface for SONiC +""" + +import os +import sys +from sonic_py_common.general import getstatusoutput_noshell + +SENSORS_CMD = ["docker", "exec", "-i", "pmon", "/usr/bin/sensors"] +DOCKER_SENSORS_CMD = "/usr/bin/sensors" + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as err: + raise ImportError(str(err) + "- required module not found") + + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + _psu_mapping = { + 1 : '0', + 2 : '1' + } + + def __init__(self): + PsuBase.__init__(self) + + def isDockerEnv(self): + num_docker = open('/proc/self/cgroup', 'r').read().count(":/docker") + if num_docker > 0: + return True + else: + return False + + def remove_nonnumeric(self, text): + digits='0123456789.' + return ''.join(c for c in text if c in digits) + + def get_cpld_register(self, reg_name): + cpld_dir = "/sys/devices/platform/dell-s3248t-cpld.0/" + retval = 'ERR' + reg_file = cpld_dir +'/' + reg_name + if (not os.path.isfile(reg_file)): + return retval + + try: + with open(reg_file, 'r') as fd: + retval = fd.read() + except Exception as error: + print("Unable to open ", reg_file, "file !") + + retval = retval.rstrip('\r\n') + return retval + + def get_num_psus(self): + """ + Retrieves the number of PSUs available on the device + :return: An integer, the number of PSUs available on the device + """ + S3248T_MAX_PSUS = 2 + return S3248T_MAX_PSUS + + def get_psu_status(self, index): + """ + Retrieves the oprational status of power supply unit (PSU) defined + by index + :param index: An integer, index of the PSU of which to query status + :return: Boolean, True if PSU is operating properly, False if PSU is\ + faulty + """ + status = 0 + psu_status = self.get_cpld_register('psu'+self._psu_mapping[index]+'_status') + if (psu_status != 'ERR'): + status = int(psu_status, 10) + + presence = self.get_psu_presence(index) + return (status & presence) + + def get_psu_presence(self, index): + """ + Retrieves the presence status of power supply unit (PSU) defined + by index + :param index: An integer, index of the PSU of which to query status + :return: Boolean, True if PSU is plugged, False if not + """ + status = 0 + psu_presence = self.get_cpld_register('psu'+self._psu_mapping[index]+'_prs') + if (psu_presence != 'ERR'): + status = int(psu_presence, 10) + + return status + + def get_sensor(self): + dockerenv = self.isDockerEnv() + if not dockerenv: + status, cmd_output = getstatusoutput_noshell(SENSORS_CMD) + else: + status, cmd_output = getstatusoutput_noshell(DOCKER_SENSORS_CMD) + + if status: + print('Failed to execute sensors command') + sys.exit(0) + return cmd_output + + def get_output_current(self, index): + cmd_output= self.get_sensor() + sensor_name = 'dps460-i2c-10' if index == 1 else 'dps460-i2c-11' + found = False + for line in cmd_output.splitlines(): + if line.startswith(sensor_name): + found = True + if found: + if 'Output Current' in line : + return float(self.remove_nonnumeric(line.split()[2])) + return 0.0 + + def get_output_voltage(self, index): + cmd_output= self.get_sensor() + sensor_name = 'dps460-i2c-10' if index == 1 else 'dps460-i2c-11' + found = False + for line in cmd_output.splitlines(): + if line.startswith(sensor_name): + found = True + if found: + if 'Output Voltage' in line : + return float(self.remove_nonnumeric(line.split()[2])) + return 0.0 + + def get_fan_rpm(self, index, fan_index): + if fan_index > 1 : return 0.0 + cmd_output= self.get_sensor() + sensor_name = 'dps460-i2c-10' if index == 1 else 'dps460-i2c-11' + found = False + for line in cmd_output.splitlines(): + if line.startswith(sensor_name): + found = True + if found: + if 'Fan RPM' in line : + return self.remove_nonnumeric(line.split()[2]) + return 0.0 + + def get_output_power(self, index): + cmd_output= self.get_sensor() + sensor_name = 'dps460-i2c-10' if index == 1 else 'dps460-i2c-11' + found = False + for line in cmd_output.splitlines(): + if line.startswith(sensor_name): + found = True + if found: + if 'Output Power' in line : + return float(self.remove_nonnumeric(line.split()[2])) + return 0.0 + + def get_direction(self, index): + psuid = '0' if index == 1 else '1' + sysfs_path = '/sys/devices/platform/dell-s3248t-cpld.0/psu' + psuid + '_prs' + found_psu = int(open(sysfs_path).read()) + if not found_psu : return '' + bus_no = '10' if index == 1 else '11' + sysfs_path = "/sys/bus/i2c/devices/" + bus_no + "-0056/eeprom" + val = (open(sysfs_path, "rb").read())[0xe1:0xe8] + dir = 'F2B' if 'FORWARD' == val else 'B2F' + return dir + + def get_serial(self, index): + psuid = '0' if index == 1 else '1' + sysfs_path = '/sys/devices/platform/dell-s3248t-cpld.0/psu' + psuid + '_prs' + found_psu = int(open(sysfs_path).read()) + if not found_psu : return '' + bus_no = '10' if index == 1 else '11' + sysfs_path = "/sys/bus/i2c/devices/" + bus_no + "-0056/eeprom" + val = (open(sysfs_path, "rb").read())[0xc4:0xd9] + return val + + def get_model(self, index): + psuid = '0' if index == 1 else '1' + sysfs_path = '/sys/devices/platform/dell-s3248t-cpld.0/psu' + psuid + '_prs' + found_psu = int(open(sysfs_path).read()) + if not found_psu : return '' + bus_no = '10' if index == 1 else '11' + sysfs_path = "/sys/bus/i2c/devices/" + bus_no + "-0056/eeprom" + val = (open(sysfs_path, "rb").read())[0x50:0x62] + return val + + def get_mfr_id(self, index): + psuid = '0' if index == 1 else '1' + sysfs_path = '/sys/devices/platform/dell-s3248t-cpld.0/psu' + psuid + '_prs' + found_psu = int(open(sysfs_path).read()) + return 'DELTA' if found_psu else '' diff --git a/device/dell/x86_64-dell_s3248t-r0/plugins/sfputil.py b/device/dell/x86_64-dell_s3248t-r0/plugins/sfputil.py new file mode 100644 index 00000000000..e05fadde9ca --- /dev/null +++ b/device/dell/x86_64-dell_s3248t-r0/plugins/sfputil.py @@ -0,0 +1,176 @@ +""" + sfputil.py + Platform-specific SFP transceiver interface for SONiC +""" + +try: + import time + import datetime + import os + import struct + import traceback + from socket import * + from select import * + from sonic_sfp.sfputilbase import SfpUtilBase +except ImportError as err: + raise ImportError("%s - required module not found" % str(err)) + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + + PORT_START = 1 + PORT_END = 52 + PORTS_IN_BLOCK = 52 + SFP_PORT_START = 49 + SFP_PORT_END = 52 + + EEPROM_OFFSET = 14 + + _port_to_eeprom_mapping = {} + _sfpp_port_i2c_mapping = { + 49 : 20, + 50 : 21, + 51 : 22, + 52 : 23 + } + port_dict = {} + + @property + def port_start(self): + return self.PORT_START + + @property + def port_end(self): + return self.PORT_END + + @property + def qsfp_ports(self) : + return range(self.SFP_PORT_END+1, self.SFP_PORT_END+1) + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + @property + def get_transceiver_status(self): + + try: + sfp_modprs_path = "/sys/devices/platform/dell-s3248t-cpld.0/sfp_modprs" + reg_file = open(sfp_modprs_path) + + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = reg_file.readline().rstrip() + + reg_file.close() + + return int(content, 16) + + + def __init__(self): + + sfpplus_eeprom_path = "/sys/class/i2c-adapter/i2c-{0}/{0}-0050/eeprom" + + for x in range(self.SFP_PORT_START, self.SFP_PORT_END + 1): + self.port_to_eeprom_mapping[x] = sfpplus_eeprom_path.format(self._sfpp_port_i2c_mapping[x]) + # Get Transceiver status + self.modprs_register = self.get_transceiver_status + + SfpUtilBase.__init__(self) + + def get_presence(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + if port_num < self.SFP_PORT_START : + return False + port_num -= self.SFP_PORT_START + try: + sfp_modprs_path = "/sys/devices/platform/dell-s3248t-cpld.0/sfp_modprs" + reg_file = open(sfp_modprs_path) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = reg_file.readline().rstrip() + + # content is a string containing the hex representation of the register + reg_value = int(content, 16) + + # Mask off the bit corresponding to our port + mask = (1 << port_num) + + # ModPrsL is active low + if (reg_value & mask) == 0: + return True + + return False + + def get_low_power_mode(self, port_num): + return False + + def set_low_power_mode(self, port_num, lpmode): + return False + + def reset(self, port_num): + return False + + def get_transceiver_change_event(self, timeout=0): + + start_time = time.time() + port = self.SFP_PORT_START + forever = False + + if timeout == 0: + forever = True + elif timeout > 0: + timeout = timeout / float(1000) # Convert to secs + else: + print 'get_transceiver_change_event:Invalid timeout value', timeout + return False, {} + + end_time = start_time + timeout + if start_time > end_time: + print 'get_transceiver_change_event:' \ + 'time wrap / invalid timeout value', timeout + + return False, {} # Time wrap or possibly incorrect timeout + + while timeout >= 0: + # Check for OIR events and return updated port_dict + reg_value = self.get_transceiver_status + if reg_value != self.modprs_register: + changed_ports = self.modprs_register ^ reg_value + while port >= self.SFP_PORT_START and port <= self.SFP_PORT_END: + + # Mask off the bit corresponding to our port + mask = (1 << (port - self.SFP_PORT_START)) + + if changed_ports & mask: + # ModPrsL is active low + if reg_value & mask == 0: + self.port_dict[port] = '1' + else: + self.port_dict[port] = '0' + + port += 1 + + # Update reg value + self.modprs_register = reg_value + return True, self.port_dict + + if forever: + time.sleep(1) + else: + timeout = end_time - time.time() + if timeout >= 1: + time.sleep(1) # We poll at 1 second granularity + else: + if timeout > 0: + time.sleep(timeout) + return True, {} + print "get_transceiver_change_event: Should not reach here." + return False, {} diff --git a/device/dell/x86_64-dell_s3248t-r0/pmon_daemon_control.json b/device/dell/x86_64-dell_s3248t-r0/pmon_daemon_control.json new file mode 100644 index 00000000000..4f701c3b340 --- /dev/null +++ b/device/dell/x86_64-dell_s3248t-r0/pmon_daemon_control.json @@ -0,0 +1,3 @@ +{ + "skip_ledd": true +} diff --git a/device/dell/x86_64-dell_s3248t-r0/port-locator.soc b/device/dell/x86_64-dell_s3248t-r0/port-locator.soc new file mode 100644 index 00000000000..d5fd3294150 --- /dev/null +++ b/device/dell/x86_64-dell_s3248t-r0/port-locator.soc @@ -0,0 +1,134 @@ +# LED interface controls +config add sai_led_intf_enable_0=1 +config add sai_led_intf_head_0=0 +config add sai_led_intf_tail_0=55 +config add sai_led_intf_bits_0=4 + +# LED data patterns for ON/OFF +config add sai_led_patt_off_0=0xf +config add sai_led_patt_on_0=0x7 + +config add sai_led_patt_off_1=0x0 +config add sai_led_patt_on_1=0x4 + +config add sai_led_patt_off_2=0x0 +config add sai_led_patt_on_2=0x2 + +config add sai_led_patt_off_3=0x0 +config add sai_led_patt_on_3=0x8 + +# Physical Port --> LED Port (1-based indexing) +# 1-lane RJ45 port [1-1] Ethernet0 Eth1/1 +config add sai_led_portmap_1=56 +# 1-lane RJ45 port [2-2] Ethernet1 Eth1/2 +config add sai_led_portmap_2=55 +# 1-lane RJ45 port [3-3] Ethernet2 Eth1/3 +config add sai_led_portmap_3=54 +# 1-lane RJ45 port [4-4] Ethernet3 Eth1/4 +config add sai_led_portmap_4=53 +# 1-lane RJ45 port [5-5] Ethernet4 Eth1/5 +config add sai_led_portmap_5=52 +# 1-lane RJ45 port [6-6] Ethernet5 Eth1/6 +config add sai_led_portmap_6=51 +# 1-lane RJ45 port [7-7] Ethernet6 Eth1/7 +config add sai_led_portmap_7=50 +# 1-lane RJ45 port [8-8] Ethernet7 Eth1/8 +config add sai_led_portmap_8=49 +# 1-lane RJ45 port [9-9] Ethernet8 Eth1/9 +config add sai_led_portmap_9=48 +# 1-lane RJ45 port [10-10] Ethernet9 Eth1/10 +config add sai_led_portmap_10=47 +# 1-lane RJ45 port [11-11] Ethernet10 Eth1/11 +config add sai_led_portmap_11=46 +# 1-lane RJ45 port [12-12] Ethernet11 Eth1/12 +config add sai_led_portmap_12=45 +# 1-lane RJ45 port [13-13] Ethernet12 Eth1/13 +config add sai_led_portmap_13=44 +# 1-lane RJ45 port [14-14] Ethernet13 Eth1/14 +config add sai_led_portmap_14=43 +# 1-lane RJ45 port [15-15] Ethernet14 Eth1/15 +config add sai_led_portmap_15=42 +# 1-lane RJ45 port [16-16] Ethernet15 Eth1/16 +config add sai_led_portmap_16=41 +# 1-lane RJ45 port [17-17] Ethernet16 Eth1/17 +config add sai_led_portmap_17=40 +# 1-lane RJ45 port [18-18] Ethernet17 Eth1/18 +config add sai_led_portmap_18=39 +# 1-lane RJ45 port [19-19] Ethernet18 Eth1/19 +config add sai_led_portmap_19=38 +# 1-lane RJ45 port [20-20] Ethernet19 Eth1/20 +config add sai_led_portmap_20=37 +# 1-lane RJ45 port [21-21] Ethernet20 Eth1/21 +config add sai_led_portmap_21=36 +# 1-lane RJ45 port [22-22] Ethernet21 Eth1/22 +config add sai_led_portmap_22=35 +# 1-lane RJ45 port [23-23] Ethernet22 Eth1/23 +config add sai_led_portmap_23=34 +# 1-lane RJ45 port [24-24] Ethernet23 Eth1/24 +config add sai_led_portmap_24=33 +# 1-lane RJ45 port [25-25] Ethernet24 Eth1/25 +config add sai_led_portmap_25=32 +# 1-lane RJ45 port [26-26] Ethernet25 Eth1/26 +config add sai_led_portmap_26=31 +# 1-lane RJ45 port [27-27] Ethernet26 Eth1/27 +config add sai_led_portmap_27=30 +# 1-lane RJ45 port [28-28] Ethernet27 Eth1/28 +config add sai_led_portmap_28=29 +# 1-lane RJ45 port [29-29] Ethernet28 Eth1/29 +config add sai_led_portmap_29=28 +# 1-lane RJ45 port [30-30] Ethernet29 Eth1/30 +config add sai_led_portmap_30=27 +# 1-lane RJ45 port [31-31] Ethernet30 Eth1/31 +config add sai_led_portmap_31=26 +# 1-lane RJ45 port [32-32] Ethernet31 Eth1/32 +config add sai_led_portmap_32=25 +# 1-lane RJ45 port [33-33] Ethernet32 Eth1/33 +config add sai_led_portmap_33=24 +# 1-lane RJ45 port [34-34] Ethernet33 Eth1/34 +config add sai_led_portmap_34=23 +# 1-lane RJ45 port [35-35] Ethernet34 Eth1/35 +config add sai_led_portmap_35=22 +# 1-lane RJ45 port [36-36] Ethernet35 Eth1/36 +config add sai_led_portmap_36=21 +# 1-lane RJ45 port [37-37] Ethernet36 Eth1/37 +config add sai_led_portmap_37=20 +# 1-lane RJ45 port [38-38] Ethernet37 Eth1/38 +config add sai_led_portmap_38=19 +# 1-lane RJ45 port [39-39] Ethernet38 Eth1/39 +config add sai_led_portmap_39=18 +# 1-lane RJ45 port [40-40] Ethernet39 Eth1/40 +config add sai_led_portmap_40=17 +# 1-lane RJ45 port [41-41] Ethernet40 Eth1/41 +config add sai_led_portmap_41=16 +# 1-lane RJ45 port [42-42] Ethernet41 Eth1/42 +config add sai_led_portmap_42=15 +# 1-lane RJ45 port [43-43] Ethernet42 Eth1/43 +config add sai_led_portmap_43=14 +# 1-lane RJ45 port [44-44] Ethernet43 Eth1/44 +config add sai_led_portmap_44=13 +# 1-lane RJ45 port [45-45] Ethernet44 Eth1/45 +config add sai_led_portmap_45=12 +# 1-lane RJ45 port [46-46] Ethernet45 Eth1/46 +config add sai_led_portmap_46=11 +# 1-lane RJ45 port [47-47] Ethernet46 Eth1/47 +config add sai_led_portmap_47=10 +# 1-lane RJ45 port [48-48] Ethernet47 Eth1/48 +config add sai_led_portmap_48=9 +# 1-lane SFP port [64-64] Ethernet48 Eth1/49 +config add sai_led_portmap_64=8 +config add sai_led_pattmap_64=1 +# 1-lane SFP port [63-63] Ethernet49 Eth1/50 +config add sai_led_portmap_63=7 +config add sai_led_pattmap_63=2 +# 1-lane SFP port [62-62] Ethernet50 Eth1/51 +config add sai_led_portmap_62=6 +config add sai_led_pattmap_62=1 +# 1-lane SFP port [61-61] Ethernet51 Eth1/52 +config add sai_led_portmap_61=5 +config add sai_led_pattmap_61=2 +# QSFP [69-72] +config add sai_led_portmap_69=4 +config add sai_led_pattmap_69=3 +# QSFP [73-76] +config add sai_led_portmap_73=2 +config add sai_led_pattmap_73=3 diff --git a/device/dell/x86_64-dell_s3248t-r0/sensors.conf b/device/dell/x86_64-dell_s3248t-r0/sensors.conf new file mode 100644 index 00000000000..d75b59fa0f2 --- /dev/null +++ b/device/dell/x86_64-dell_s3248t-r0/sensors.conf @@ -0,0 +1,70 @@ +# libsensors configuration file for Dell S3248T +# The i2c bus portion is omit because adapter name +# changes every time when system boot up. + +bus "i2c-7" "i2c-0-mux (chan_id 5)" +bus "i2c-5" "i2c-0-mux (chan_id 3)" +bus "i2c-10" "i2c-5-mux (chan_id 0)" +bus "i2c-11" "i2c-5-mux (chan_id 1)" + +chip "tmp75-i2c-7-48" + label temp1 "CPU On-board Temperature" + set temp1_max 76 + set temp1_max_hyst 71 +chip "tmp75-i2c-7-49" + label temp1 "Main board Temperature" + set temp1_max 83 + set temp1_max_hyst 78 +chip "tmp75-i2c-7-4a" + label temp1 "Underneath CPU Temperature" + set temp1_max 80 + set temp1_max_hyst 75 +chip "tmp75-i2c-7-4b" + label temp1 "PSU inlet Temperature" + set temp1_max 79 + set temp1_max_hyst 74 +chip "tmp75-i2c-7-4c" + label temp1 "Front plate inlet Temperature" + set temp1_max 76 + set temp1_max_hyst 71 +chip "tmp75-i2c-7-4f" + label temp1 "Fan board Temperature" + set temp1_max 79 + set temp1_max_hyst 74 + +chip "emc2305-i2c-7-2c" + ignore fan4 + ignore fan5 + label fan1 "Fan 1 " + label fan2 "Fan 2 " + label fan3 "Fan 3 " + +chip "dps460-i2c-10-5e" + label power1 "Input Power" + label power2 "Output Power" + label curr1 "Input Current" + label curr2 "Output Current" + label in1 "Input Voltage" + ignore in2 + label in3 "Output Voltage" + label fan1 "Fan RPM" + ignore fan2 + ignore fan3 + label temp1 "FAN Inlet Temperature" + label temp2 "Input Circuit Temperature" + label temp3 "Output Circuit Temperature" + +chip "dps460-i2c-11-5e" + label power1 "Input Power" + label power2 "Output Power" + label curr1 "Input Current" + label curr2 "Output Current" + label in1 "Input Voltage" + ignore in2 + label in3 "Output Voltage" + label fan1 "Fan RPM" + ignore fan2 + ignore fan3 + label temp1 "FAN Inlet Temperature" + label temp2 "Input Circuit Temperature" + label temp3 "Output Circuit Temperature" diff --git a/device/dell/x86_64-dell_s3248t-r0/system_health_monitoring_config.json b/device/dell/x86_64-dell_s3248t-r0/system_health_monitoring_config.json new file mode 100644 index 00000000000..dc20d412147 --- /dev/null +++ b/device/dell/x86_64-dell_s3248t-r0/system_health_monitoring_config.json @@ -0,0 +1,11 @@ +{ + "services_to_ignore": [], + "devices_to_ignore": ["fan.speed","psu.temperature","psu.voltage","asic"], + "user_defined_checkers": [], + "polling_interval": 60, + "led_color": { + "fault" : "blink_yellow", + "normal" : "green", + "booting": "blink_green" + } +} diff --git a/device/dell/x86_64-dell_s3248t-r0/thermal_policy.json b/device/dell/x86_64-dell_s3248t-r0/thermal_policy.json new file mode 100644 index 00000000000..8955c19fb52 --- /dev/null +++ b/device/dell/x86_64-dell_s3248t-r0/thermal_policy.json @@ -0,0 +1,55 @@ +{ + "thermal_control_algorithm": { + "run_at_boot_up": "True", + "fan_speed_when_suspend": "80" + }, + "info_types": [ + { + "type": "fan_info" + }, + { + "type": "chassis_info" + } + ], + "policies": [ + { + "name": "temp_beyond_high_critical_threshold", + "conditions": [ + { + "type": "switch_over_temperature" + } + ], + "actions": [ + { + "type": "switch_thermal_shutdown" + } + ] + }, + { + "name": "any fan fault", + "conditions": [ + { + "type": "fan_any_fault" + } + ], + "actions": [ + { + "type": "fan_all_set_max_speed" + } + ] + }, + { + "name": "all fan normal", + "conditions": [ + { + "type": "fan_all_normal" + } + ], + "actions": [ + { + "type": "fan_all_set_thermal_level_speed" + } + ] + } + ] +} diff --git a/device/dell/x86_64-dell_s3248t-r0/warm-reboot.conf b/device/dell/x86_64-dell_s3248t-r0/warm-reboot.conf new file mode 100644 index 00000000000..389f44a4c95 --- /dev/null +++ b/device/dell/x86_64-dell_s3248t-r0/warm-reboot.conf @@ -0,0 +1 @@ +WARM_REBOOT_SUPPORT=0 diff --git a/device/dell/x86_64-dell_z9864f-r0/Dell-Z9864f-O64/buffers.json.j2 b/device/dell/x86_64-dell_z9864f-r0/Dell-Z9864f-O64/buffers.json.j2 new file mode 100644 index 00000000000..0b1cb2c541b --- /dev/null +++ b/device/dell/x86_64-dell_z9864f-r0/Dell-Z9864f-O64/buffers.json.j2 @@ -0,0 +1,2 @@ +{%- set default_topo = 't1' %} +{%- include 'buffers_config.j2' %} diff --git a/device/dell/x86_64-dell_z9864f-r0/Dell-Z9864f-O64/buffers_defaults_t0.j2 b/device/dell/x86_64-dell_z9864f-r0/Dell-Z9864f-O64/buffers_defaults_t0.j2 new file mode 100644 index 00000000000..8707d1ff4d0 --- /dev/null +++ b/device/dell/x86_64-dell_z9864f-r0/Dell-Z9864f-O64/buffers_defaults_t0.j2 @@ -0,0 +1,59 @@ + +{%- set default_cable = '5m' %} + +{%- macro generate_buffer_pool_and_profiles() %} + + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "162539680", + "type": "ingress", + "mode": "dynamic", + "xoff": "33374584" + }, + "egress_lossless_pool": { + "size": "162539680", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "static_th":"165867080" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"0", + "static_th":"165867080" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"1778", + "dynamic_th":"0" + }, + "egress_lossy_cpu_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"9398", + "dynamic_th":"-2" + } + }, +{%- endmacro %} + +{%- macro generate_mc_queue_buffers(PORT_ACTIVE) %} +{% for port in PORT_ACTIVE %} + "{{ port }}|8": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "{{ port }}|9": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "{{ port }}|10": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "{{ port }}|11": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }{% if not loop.last %},{% endif %} + +{% endfor %} +{%- endmacro %} diff --git a/device/dell/x86_64-dell_z9864f-r0/Dell-Z9864f-O64/buffers_defaults_t1.j2 b/device/dell/x86_64-dell_z9864f-r0/Dell-Z9864f-O64/buffers_defaults_t1.j2 new file mode 100644 index 00000000000..29353b46d9f --- /dev/null +++ b/device/dell/x86_64-dell_z9864f-r0/Dell-Z9864f-O64/buffers_defaults_t1.j2 @@ -0,0 +1,59 @@ + +{%- set default_cable = '40m' %} + +{%- macro generate_buffer_pool_and_profiles() %} + + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "162539680", + "type": "ingress", + "mode": "dynamic", + "xoff": "33374584" + }, + "egress_lossless_pool": { + "size": "162539680", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"[BUFFER_POOL|ingress_lossless_pool]", + "size":"0", + "static_th":"165867080" + }, + "egress_lossless_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"0", + "static_th":"165867080" + }, + "egress_lossy_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"1778", + "dynamic_th":"0" + }, + "egress_lossy_cpu_profile": { + "pool":"[BUFFER_POOL|egress_lossless_pool]", + "size":"9398", + "dynamic_th":"-2" + } + }, +{%- endmacro %} + +{%- macro generate_mc_queue_buffers(PORT_ACTIVE) %} +{% for port in PORT_ACTIVE %} + "{{ port }}|8": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "{{ port }}|9": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "{{ port }}|10": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }, + "{{ port }}|11": { + "profile" : "[BUFFER_PROFILE|egress_lossy_profile]" + }{% if not loop.last %},{% endif %} + +{% endfor %} +{%- endmacro %} diff --git a/device/dell/x86_64-dell_z9864f-r0/Dell-Z9864f-O64/hwsku.json b/device/dell/x86_64-dell_z9864f-r0/Dell-Z9864f-O64/hwsku.json new file mode 100644 index 00000000000..72e2e54c591 --- /dev/null +++ b/device/dell/x86_64-dell_z9864f-r0/Dell-Z9864f-O64/hwsku.json @@ -0,0 +1,202 @@ +{ + "interfaces": { + "Ethernet0": { + "default_brkout_mode": "1x800G" + }, + "Ethernet8": { + "default_brkout_mode": "1x800G" + }, + "Ethernet16": { + "default_brkout_mode": "1x800G" + }, + "Ethernet24": { + "default_brkout_mode": "1x800G" + }, + "Ethernet32": { + "default_brkout_mode": "1x800G" + }, + "Ethernet40": { + "default_brkout_mode": "1x800G" + }, + "Ethernet48": { + "default_brkout_mode": "1x800G" + }, + "Ethernet56": { + "default_brkout_mode": "1x800G" + }, + "Ethernet64": { + "default_brkout_mode": "1x800G" + }, + "Ethernet72": { + "default_brkout_mode": "1x800G" + }, + "Ethernet80": { + "default_brkout_mode": "1x800G" + }, + "Ethernet88": { + "default_brkout_mode": "1x800G" + }, + "Ethernet96": { + "default_brkout_mode": "1x800G" + }, + "Ethernet104": { + "default_brkout_mode": "1x800G" + }, + "Ethernet112": { + "default_brkout_mode": "1x800G" + }, + "Ethernet120": { + "default_brkout_mode": "1x800G" + }, + "Ethernet128": { + "default_brkout_mode": "1x800G" + }, + "Ethernet136": { + "default_brkout_mode": "1x800G" + }, + "Ethernet144": { + "default_brkout_mode": "1x800G" + }, + "Ethernet152": { + "default_brkout_mode": "1x800G" + }, + "Ethernet160": { + "default_brkout_mode": "1x800G" + }, + "Ethernet168": { + "default_brkout_mode": "1x800G" + }, + "Ethernet176": { + "default_brkout_mode": "1x800G" + }, + "Ethernet184": { + "default_brkout_mode": "1x800G" + }, + "Ethernet192": { + "default_brkout_mode": "1x800G" + }, + "Ethernet200": { + "default_brkout_mode": "1x800G" + }, + "Ethernet208": { + "default_brkout_mode": "1x800G" + }, + "Ethernet216": { + "default_brkout_mode": "1x800G" + }, + "Ethernet224": { + "default_brkout_mode": "1x800G" + }, + "Ethernet232": { + "default_brkout_mode": "1x800G" + }, + "Ethernet240": { + "default_brkout_mode": "1x800G" + }, + "Ethernet248": { + "default_brkout_mode": "1x800G" + }, + "Ethernet256": { + "default_brkout_mode": "1x800G" + }, + "Ethernet264": { + "default_brkout_mode": "1x800G" + }, + "Ethernet272": { + "default_brkout_mode": "1x800G" + }, + "Ethernet280": { + "default_brkout_mode": "1x800G" + }, + "Ethernet288": { + "default_brkout_mode": "1x800G" + }, + "Ethernet296": { + "default_brkout_mode": "1x800G" + }, + "Ethernet304": { + "default_brkout_mode": "1x800G" + }, + "Ethernet312": { + "default_brkout_mode": "1x800G" + }, + "Ethernet320": { + "default_brkout_mode": "1x800G" + }, + "Ethernet328": { + "default_brkout_mode": "1x800G" + }, + "Ethernet336": { + "default_brkout_mode": "1x800G" + }, + "Ethernet344": { + "default_brkout_mode": "1x800G" + }, + "Ethernet352": { + "default_brkout_mode": "1x800G" + }, + "Ethernet360": { + "default_brkout_mode": "1x800G" + }, + "Ethernet368": { + "default_brkout_mode": "1x800G" + }, + "Ethernet376": { + "default_brkout_mode": "1x800G" + }, + "Ethernet384": { + "default_brkout_mode": "1x800G" + }, + "Ethernet392": { + "default_brkout_mode": "1x800G" + }, + "Ethernet400": { + "default_brkout_mode": "1x800G" + }, + "Ethernet408": { + "default_brkout_mode": "1x800G" + }, + "Ethernet416": { + "default_brkout_mode": "1x800G" + }, + "Ethernet424": { + "default_brkout_mode": "1x800G" + }, + "Ethernet432": { + "default_brkout_mode": "1x800G" + }, + "Ethernet440": { + "default_brkout_mode": "1x800G" + }, + "Ethernet448": { + "default_brkout_mode": "1x800G" + }, + "Ethernet456": { + "default_brkout_mode": "1x800G" + }, + "Ethernet464": { + "default_brkout_mode": "1x800G" + }, + "Ethernet472": { + "default_brkout_mode": "1x800G" + }, + "Ethernet480": { + "default_brkout_mode": "1x800G" + }, + "Ethernet488": { + "default_brkout_mode": "1x800G" + }, + "Ethernet496": { + "default_brkout_mode": "1x800G" + }, + "Ethernet504": { + "default_brkout_mode": "1x800G" + }, + "Ethernet512": { + "default_brkout_mode": "1x25G" + }, + "Ethernet513": { + "default_brkout_mode": "1x25G" + } + } +} diff --git a/device/dell/x86_64-dell_z9864f-r0/Dell-Z9864f-O64/pg_profile_lookup.ini b/device/dell/x86_64-dell_z9864f-r0/Dell-Z9864f-O64/pg_profile_lookup.ini new file mode 100644 index 00000000000..6d152b60f6e --- /dev/null +++ b/device/dell/x86_64-dell_z9864f-r0/Dell-Z9864f-O64/pg_profile_lookup.ini @@ -0,0 +1,26 @@ +# PG lossless profiles. +# speed cable size xon xoff threshold xon_offset + 10000 5m 18796 0 91440 0 3556 + 25000 5m 18796 0 91440 0 3556 + 40000 5m 18796 0 106934 0 3556 + 50000 5m 18796 0 106934 0 3556 + 100000 5m 18796 0 147066 0 3556 + 200000 5m 18796 0 229362 0 3556 + 400000 5m 18796 0 393192 0 3556 + 800000 5m 18796 0 729488 0 3556 + 10000 40m 18796 0 94742 0 3556 + 25000 40m 18796 0 94742 0 3556 + 40000 40m 18796 0 113538 0 3556 + 50000 40m 18796 0 113538 0 3556 + 100000 40m 18796 0 160274 0 3556 + 200000 40m 18796 0 255778 0 3556 + 400000 40m 18796 0 446024 0 3556 + 800000 40m 18796 0 835406 0 3556 + 10000 300m 18796 0 258572 0 3556 + 25000 300m 18796 0 258572 0 3556 + 40000 300m 18796 0 258572 0 3556 + 50000 300m 18796 0 258572 0 3556 + 100000 300m 18796 0 258572 0 3556 + 200000 300m 18796 0 452374 0 3556 + 400000 300m 18796 0 839216 0 3556 + 800000 300m 18796 0 1621536 0 3556 diff --git a/device/dell/x86_64-dell_z9864f-r0/Dell-Z9864f-O64/platform-def.json b/device/dell/x86_64-dell_z9864f-r0/Dell-Z9864f-O64/platform-def.json new file mode 100644 index 00000000000..22aa9f273b8 --- /dev/null +++ b/device/dell/x86_64-dell_z9864f-r0/Dell-Z9864f-O64/platform-def.json @@ -0,0 +1,206 @@ +{ + "comments": "In Z9864F, each software lane actually maps to one or two physical lanes in the NPU", + "fec-mode": { + "Ethernet0-511": { + "1": { + "50000": [ "rs","rs544" ], + "100000": [ "rs","rs544","rs544_2xn" ] + }, + "2":{ + "50000": [ "none", "rs" ], + "100000": [ "rs","rs544" ], + "200000": [ "rs","rs544","rs544_2xn" ] + }, + "4": { + "100000": [ "none", "rs" ], + "200000": [ "rs","rs544_2xn" ], + "400000": [ "rs","rs544_2xn" ] + }, + "8": ["rs","rs544_2xn" ] + }, + "Ethernet512-513": { + "1": [ "none", "rs" ] + } + }, + "default-fec-mode": { + "Ethernet0-511": { + "1": { + "50000": "rs", + "100000": "rs" + }, + "2": { + "50000": "none", + "100000": "rs", + "200000": "rs" + }, + "4": { + "100000": "none", + "200000": "rs", + "400000": "rs" + }, + "8": "rs" + } + }, + "native-port-supported-speeds": { + "Ethernet0-511": { + "8": ["800000","400000"], + "4": ["400000","200000"], + "2": ["200000","100000"], + "1": ["100000","50000"] + }, + "Ethernet512-513": { + "1": ["10000","1000"] + } + }, + "autoneg-mode": { + "Ethernet0-511": { + "8": { + "800000":["bam", "msa"] + } + } + }, + "default-an-extended-mode": { + "Ethernet0-511": { + "8": { + "800000" : "bam" + } + } + }, + "chips" : { + "total-chips": 1, + "1": { + "total-pipelines": 32, + "max-ports": 320, + "pipelines": { + "1": { + "max-ports": 10, + "ports": ["Ethernet0", "Ethernet264"] + }, + "2": { + "max-ports": 10, + "ports": ["Ethernet8", "Ethernet256"] + }, + "3": { + "max-ports": 10, + "ports": ["Ethernet16", "Ethernet280"] + }, + "4": { + "max-ports": 10, + "ports": ["Ethernet24", "Ethernet272"] + }, + "5": { + "max-ports": 10, + "ports": ["Ethernet32", "Ethernet296"] + }, + "6": { + "max-ports": 10, + "ports": ["Ethernet40", "Ethernet288"] + }, + "7": { + "max-ports": 10, + "ports": ["Ethernet48", "Ethernet312"] + }, + "8": { + "max-ports": 10, + "ports": ["Ethernet56", "Ethernet304"] + }, + "9": { + "max-ports": 10, + "ports": ["Ethernet64", "Ethernet328"] + }, + "10": { + "max-ports": 10, + "ports": ["Ethernet72", "Ethernet320"] + }, + "11": { + "max-ports": 10, + "ports": ["Ethernet80", "Ethernet344"] + }, + "12": { + "max-ports": 10, + "ports": ["Ethernet88", "Ethernet336"] + }, + "13": { + "max-ports": 10, + "ports": ["Ethernet96", "Ethernet360"] + }, + "14": { + "max-ports": 10, + "ports": ["Ethernet104", "Ethernet352"] + }, + "15": { + "max-ports": 10, + "ports": ["Ethernet112", "Ethernet376"] + }, + "16": { + "max-ports": 10, + "ports": ["Ethernet120", "Ethernet368"] + }, + "17": { + "max-ports": 10, + "ports": ["Ethernet128", "Ethernet392"] + }, + "18": { + "max-ports": 10, + "ports": ["Ethernet136", "Ethernet384"] + }, + "19": { + "max-ports": 10, + "ports": ["Ethernet144", "Ethernet408"] + }, + "20": { + "max-ports": 10, + "ports": ["Ethernet152", "Ethernet400"] + }, + "21": { + "max-ports": 10, + "ports": ["Ethernet160", "Ethernet424"] + }, + "22": { + "max-ports": 10, + "ports": ["Ethernet168", "Ethernet416"] + }, + "23": { + "max-ports": 10, + "ports": ["Ethernet176", "Ethernet440"] + }, + "24": { + "max-ports": 10, + "ports": ["Ethernet184", "Ethernet432"] + }, + "25": { + "max-ports": 10, + "ports": ["Ethernet192", "Ethernet456"] + }, + "26": { + "max-ports": 10, + "ports": ["Ethernet200", "Ethernet448"] + }, + "27": { + "max-ports": 10, + "ports": ["Ethernet208", "Ethernet472"] + }, + "28": { + "max-ports": 10, + "ports": ["Ethernet216", "Ethernet464"] + }, + "29": { + "max-ports": 10, + "ports": ["Ethernet224", "Ethernet488"] + }, + "30": { + "max-ports": 10, + "ports": ["Ethernet232", "Ethernet480"] + }, + "31": { + "max-ports": 10, + "ports": ["Ethernet240", "Ethernet504"] + }, + "32": { + "max-ports": 10, + "ports": ["Ethernet248", "Ethernet496"] + } + } + } + } +} diff --git a/device/dell/x86_64-dell_z9864f-r0/Dell-Z9864f-O64/platform_qos.json b/device/dell/x86_64-dell_z9864f-r0/Dell-Z9864f-O64/platform_qos.json new file mode 100644 index 00000000000..56137073093 --- /dev/null +++ b/device/dell/x86_64-dell_z9864f-r0/Dell-Z9864f-O64/platform_qos.json @@ -0,0 +1,12 @@ +{ + "QOS_CAPABILITY_TABLE|qos": { + "buffer_mode": "lossless", + "buffer_dynamic_tuning": "true", + "pool_xoff_default": "33374584", + "pool_xoff_max": "66749168", + "profile_static_th": "165867080", + "profile_xoff_min": "91186", + "profile_xoff_max": "66749168", + "roce_hash": "true" + } +} diff --git a/device/dell/x86_64-dell_z9864f-r0/Dell-Z9864f-O64/port_config.ini b/device/dell/x86_64-dell_z9864f-r0/Dell-Z9864f-O64/port_config.ini new file mode 100644 index 00000000000..0d0a2499aac --- /dev/null +++ b/device/dell/x86_64-dell_z9864f-r0/Dell-Z9864f-O64/port_config.ini @@ -0,0 +1,67 @@ +# name lanes alias index speed +Ethernet0 1,2,3,4,5,6,7,8 etp1 1 800000 +Ethernet8 17,18,19,20,21,22,23,24 etp2 2 800000 +Ethernet16 33,34,35,36,37,38,39,40 etp3 3 800000 +Ethernet24 49,50,51,52,53,54,55,56 etp4 4 800000 +Ethernet32 65,66,67,68,69,70,71,72 etp5 5 800000 +Ethernet40 81,82,83,84,85,86,87,88 etp6 6 800000 +Ethernet48 97,98,99,100,101,102,103,104 etp7 7 800000 +Ethernet56 113,114,115,116,117,118,119,120 etp8 8 800000 +Ethernet64 129,130,131,132,133,134,135,136 etp9 9 800000 +Ethernet72 145,146,147,148,149,150,151,152 etp10 10 800000 +Ethernet80 161,162,163,164,165,166,167,168 etp11 11 800000 +Ethernet88 177,178,179,180,181,182,183,184 etp12 12 800000 +Ethernet96 193,194,195,196,197,198,199,200 etp13 13 800000 +Ethernet104 209,210,211,212,213,214,215,216 etp14 14 800000 +Ethernet112 233,234,235,236,237,238,239,240 etp15 15 800000 +Ethernet120 249,250,251,252,253,254,255,256 etp16 16 800000 +Ethernet128 257,258,259,260,261,262,263,264 etp17 17 800000 +Ethernet136 273,274,275,276,277,278,279,280 etp18 18 800000 +Ethernet144 297,298,299,300,301,302,303,304 etp19 19 800000 +Ethernet152 313,314,315,316,317,318,319,320 etp20 20 800000 +Ethernet160 329,330,331,332,333,334,335,336 etp21 21 800000 +Ethernet168 345,346,347,348,349,350,351,352 etp22 22 800000 +Ethernet176 361,362,363,364,365,366,367,368 etp23 23 800000 +Ethernet184 377,378,379,380,381,382,383,384 etp24 24 800000 +Ethernet192 393,394,395,396,397,398,399,400 etp25 25 800000 +Ethernet200 409,410,411,412,413,414,415,416 etp26 26 800000 +Ethernet208 425,426,427,428,429,430,431,432 etp27 27 800000 +Ethernet216 441,442,443,444,445,446,447,448 etp28 28 800000 +Ethernet224 457,458,459,460,461,462,463,464 etp29 29 800000 +Ethernet232 473,474,475,476,477,478,479,480 etp30 30 800000 +Ethernet240 489,490,491,492,493,494,495,496 etp31 31 800000 +Ethernet248 505,506,507,508,509,510,511,512 etp32 32 800000 +Ethernet256 25,26,27,28,29,30,31,32 etp33 33 800000 +Ethernet264 9,10,11,12,13,14,15,16 etp34 34 800000 +Ethernet272 57,58,59,60,61,62,63,64 etp35 35 800000 +Ethernet280 41,42,43,44,45,46,47,48 etp36 36 800000 +Ethernet288 89,90,91,92,93,94,95,96 etp37 37 800000 +Ethernet296 73,74,75,76,77,78,79,80 etp38 38 800000 +Ethernet304 121,122,123,124,125,126,127,128 etp39 39 800000 +Ethernet312 105,106,107,108,109,110,111,112 etp40 40 800000 +Ethernet320 153,154,155,156,157,158,159,160 etp41 41 800000 +Ethernet328 137,138,139,140,141,142,143,144 etp42 42 800000 +Ethernet336 185,186,187,188,189,190,191,192 etp43 43 800000 +Ethernet344 169,170,171,172,173,174,175,176 etp44 44 800000 +Ethernet352 217,218,219,220,221,222,223,224 etp45 45 800000 +Ethernet360 201,202,203,204,205,206,207,208 etp46 46 800000 +Ethernet368 241,242,243,244,245,246,247,248 etp47 47 800000 +Ethernet376 225,226,227,228,229,230,231,232 etp48 48 800000 +Ethernet384 281,282,283,284,285,286,287,288 etp49 49 800000 +Ethernet392 265,266,267,268,269,270,271,272 etp50 50 800000 +Ethernet400 305,306,307,308,309,310,311,312 etp51 51 800000 +Ethernet408 289,290,291,292,293,294,295,296 etp52 52 800000 +Ethernet416 337,338,339,340,341,342,343,344 etp53 53 800000 +Ethernet424 321,322,323,324,325,326,327,328 etp54 54 800000 +Ethernet432 369,370,371,372,373,374,375,376 etp55 55 800000 +Ethernet440 353,354,355,356,357,358,359,360 etp56 56 800000 +Ethernet448 401,402,403,404,405,406,407,408 etp57 57 800000 +Ethernet456 385,386,387,388,389,390,391,392 etp58 58 800000 +Ethernet464 433,434,435,436,437,438,439,440 etp59 59 800000 +Ethernet472 417,418,419,420,421,422,423,424 etp60 60 800000 +Ethernet480 465,466,467,468,469,470,471,472 etp61 61 800000 +Ethernet488 449,450,451,452,453,454,455,456 etp62 62 800000 +Ethernet496 497,498,499,500,501,502,503,504 etp63 63 800000 +Ethernet504 481,482,483,484,485,486,487,488 etp64 64 800000 +Ethernet512 515 etp65 65 25000 +Ethernet513 516 etp66 66 25000 diff --git a/device/dell/x86_64-dell_z9864f-r0/Dell-Z9864f-O64/qos.json.j2 b/device/dell/x86_64-dell_z9864f-r0/Dell-Z9864f-O64/qos.json.j2 new file mode 100644 index 00000000000..ea1b478e721 --- /dev/null +++ b/device/dell/x86_64-dell_z9864f-r0/Dell-Z9864f-O64/qos.json.j2 @@ -0,0 +1,3 @@ +{%- macro generate_pfc_prio_to_pg_map() %} +{%- endmacro %} +{%- include 'qos_config.j2' %} diff --git a/device/dell/x86_64-dell_z9864f-r0/Dell-Z9864f-O64/sai.profile b/device/dell/x86_64-dell_z9864f-r0/Dell-Z9864f-O64/sai.profile new file mode 100644 index 00000000000..078916eba91 --- /dev/null +++ b/device/dell/x86_64-dell_z9864f-r0/Dell-Z9864f-O64/sai.profile @@ -0,0 +1,2 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th5_z9864f_64x800lt.yml +SAI_NUM_ECMP_MEMBERS=128 diff --git a/device/dell/x86_64-dell_z9864f-r0/Dell-Z9864f-O64/th5_z9864f_64x800lt.yml b/device/dell/x86_64-dell_z9864f-r0/Dell-Z9864f-O64/th5_z9864f_64x800lt.yml new file mode 100755 index 00000000000..05d3dd5085c --- /dev/null +++ b/device/dell/x86_64-dell_z9864f-r0/Dell-Z9864f-O64/th5_z9864f_64x800lt.yml @@ -0,0 +1,1211 @@ +# +# +# Z9864F 64x800G port configuration. +# v0130_23 +--- +bcm_device: + 0: + global: + pktio_mode: 1 + vlan_flooding_l2mc_num_reserved: 0 + ipv6_lpm_128b_enable: 1 + shared_block_mask_section: uc_bc + skip_protocol_default_entries: 1 + # LTSW uses value 1 for ALPM combined mode + l3_alpm_template: 1 + l3_alpm_hit_skip: 1 + sai_feat_tail_timestamp : 1 + sai_field_group_auto_prioritize: 1 + #l3_intf_vlan_split_egress for MTU at L3IF + l3_intf_vlan_split_egress : 1 + pfc_deadlock_seq_control : 1 + sai_tunnel_support: 1 + sai_tunnel_vxlan_scale: 0 + bcm_tunnel_term_compatible_mode: 1 + l3_ecmp_member_first_lkup_mem_size: 12288 + l3_ecmp_member_secondary_mem_size: 4096 + riot_overlay_l3_egress_mem_size: 16384 + riot_overlay_l3_intf_mem_size: 4096 + sai_tunnel_ecmp_sharing_mode: 0 + sai_l3_byte1_udf_disable: 1 + sai_svi_my_station_optimization : 1 + sai_tcam_opt_support_all_rifs_disable: 1 + sai_l3_neighbor_discard_flag_capable: 0 + sai_l3_route_discard_flag_capable: 0 + # nbr_bcast (0-Default/LargeIFP-DB, 1-Small-IFP-DB, 2-Disable) + # Disable to save on MGID(512) resources + sai_nbr_bcast_ifp_optimized: 2 + #For PPIU Mode, Set resources for counters in global mode counters like ACL, etc + global_flexctr_ing_action_num_reserved: 20 + global_flexctr_ing_pool_num_reserved: 8 + global_flexctr_ing_op_profile_num_reserved: 20 + global_flexctr_ing_group_num_reserved: 2 + global_flexctr_egr_action_num_reserved: 8 + global_flexctr_egr_pool_num_reserved: 5 + global_flexctr_egr_op_profile_num_reserved: 10 + global_flexctr_egr_group_num_reserved: 1 + vlan_default_port: 1 + sai_create_dflt_trap: 1 + default_cpu_tx_queue: 7 + sai_port_queue_ecn_counter: 1 + ecmp_dlb_port_speeds: 1 + sai_crm_hw_nh_group_cnt: 1 + sai_crm_hw_nh_group_member_cnt: 1 + sai_common_hash_crc: 1 + sai_fast_convergence_support: 1 + sai_cpu_mirror_queue: 28 + sai_cpu_drop_mirror_queue: 29 + sai_led_ploc_mode: 1 + # Modify RX Drops scope . Removes RDROP, PDISC, VLANDR, RIPD4,RIPD6 + sai_adjust_port_if_in_discards: 1 + stat_custom_receive0_management_mode: 1 +--- +device: + 0: + PC_PM_CORE: + ? + PC_PM_ID: 1 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x30217465 + TX_LANE_MAP: 0x67452301 + RX_POLARITY_FLIP: 0xE7 + TX_POLARITY_FLIP: 0x27 + ? + PC_PM_ID: 3 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x03124756 + TX_LANE_MAP: 0x65742301 + RX_POLARITY_FLIP: 0xC2 + TX_POLARITY_FLIP: 0x97 + ? + PC_PM_ID: 4 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x12037654 + TX_LANE_MAP: 0x74653021 + RX_POLARITY_FLIP: 0x0E + TX_POLARITY_FLIP: 0x3A + ? + PC_PM_ID: 2 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x32107654 + TX_LANE_MAP: 0x47560312 + RX_POLARITY_FLIP: 0x4E + TX_POLARITY_FLIP: 0x24 + ? + PC_PM_ID: 5 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x15267430 + TX_LANE_MAP: 0x21463057 + RX_POLARITY_FLIP: 0x1A + TX_POLARITY_FLIP: 0xA6 + ? + PC_PM_ID: 7 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x36051274 + TX_LANE_MAP: 0x25041376 + RX_POLARITY_FLIP: 0xF5 + TX_POLARITY_FLIP: 0x07 + ? + PC_PM_ID: 8 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x05362471 + TX_LANE_MAP: 0x04253716 + RX_POLARITY_FLIP: 0x07 + TX_POLARITY_FLIP: 0xF0 + ? + PC_PM_ID: 6 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x65032471 + TX_LANE_MAP: 0x40527361 + RX_POLARITY_FLIP: 0x47 + TX_POLARITY_FLIP: 0xA1 + ? + PC_PM_ID: 9 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x63502147 + TX_LANE_MAP: 0x20451376 + RX_POLARITY_FLIP: 0xD8 + TX_POLARITY_FLIP: 0x87 + ? + PC_PM_ID: 11 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x36051274 + TX_LANE_MAP: 0x25041376 + RX_POLARITY_FLIP: 0xF5 + TX_POLARITY_FLIP: 0x07 + ? + PC_PM_ID: 12 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x05362471 + TX_LANE_MAP: 0x04253716 + RX_POLARITY_FLIP: 0x07 + TX_POLARITY_FLIP: 0xF0 + ? + PC_PM_ID: 10 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x65032471 + TX_LANE_MAP: 0x40527361 + RX_POLARITY_FLIP: 0x47 + TX_POLARITY_FLIP: 0xE1 + ? + PC_PM_ID: 13 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x63502147 + TX_LANE_MAP: 0x20451376 + RX_POLARITY_FLIP: 0xD8 + TX_POLARITY_FLIP: 0x87 + ? + PC_PM_ID: 15 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x36051274 + TX_LANE_MAP: 0x25041376 + RX_POLARITY_FLIP: 0xF5 + TX_POLARITY_FLIP: 0x07 + ? + PC_PM_ID: 16 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x05362471 + TX_LANE_MAP: 0x04253716 + RX_POLARITY_FLIP: 0x07 + TX_POLARITY_FLIP: 0xF0 + ? + PC_PM_ID: 14 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x65032471 + TX_LANE_MAP: 0x40527361 + RX_POLARITY_FLIP: 0x47 + TX_POLARITY_FLIP: 0xE1 + ? + PC_PM_ID: 17 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x34076521 + TX_LANE_MAP: 0x56024731 + RX_POLARITY_FLIP: 0x0C + TX_POLARITY_FLIP: 0x58 + ? + PC_PM_ID: 19 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x43705612 + TX_LANE_MAP: 0x52604731 + RX_POLARITY_FLIP: 0x1D + TX_POLARITY_FLIP: 0xE8 + ? + PC_PM_ID: 20 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x70436215 + TX_LANE_MAP: 0x60527341 + RX_POLARITY_FLIP: 0xB6 + TX_POLARITY_FLIP: 0x4F + ? + PC_PM_ID: 18 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x30746215 + TX_LANE_MAP: 0x06253714 + RX_POLARITY_FLIP: 0xF6 + TX_POLARITY_FLIP: 0x9E + ? + PC_PM_ID: 21 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x34076521 + TX_LANE_MAP: 0x56024731 + RX_POLARITY_FLIP: 0x0C + TX_POLARITY_FLIP: 0x58 + ? + PC_PM_ID: 23 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x43705612 + TX_LANE_MAP: 0x52604731 + RX_POLARITY_FLIP: 0x1D + TX_POLARITY_FLIP: 0xE8 + ? + PC_PM_ID: 24 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x70436215 + TX_LANE_MAP: 0x60527341 + RX_POLARITY_FLIP: 0xB6 + TX_POLARITY_FLIP: 0x4F + ? + PC_PM_ID: 22 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x30746215 + TX_LANE_MAP: 0x06253714 + RX_POLARITY_FLIP: 0xF6 + TX_POLARITY_FLIP: 0x9E + ? + PC_PM_ID: 25 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x34076521 + TX_LANE_MAP: 0x56024731 + RX_POLARITY_FLIP: 0x0C + TX_POLARITY_FLIP: 0x58 + ? + PC_PM_ID: 27 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x43705612 + TX_LANE_MAP: 0x52604731 + RX_POLARITY_FLIP: 0x1D + TX_POLARITY_FLIP: 0xF8 + ? + PC_PM_ID: 28 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x27160543 + TX_LANE_MAP: 0x63415072 + RX_POLARITY_FLIP: 0xB9 + TX_POLARITY_FLIP: 0x81 + ? + PC_PM_ID: 26 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x30746215 + TX_LANE_MAP: 0x06253714 + RX_POLARITY_FLIP: 0xF6 + TX_POLARITY_FLIP: 0x9E + ? + PC_PM_ID: 30 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x56471203 + TX_LANE_MAP: 0x01234567 + RX_POLARITY_FLIP: 0x81 + TX_POLARITY_FLIP: 0x8D + ? + PC_PM_ID: 32 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x65742130 + TX_LANE_MAP: 0x03124567 + RX_POLARITY_FLIP: 0x53 + TX_POLARITY_FLIP: 0x0D + ? + PC_PM_ID: 31 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x74651032 + TX_LANE_MAP: 0x12035647 + RX_POLARITY_FLIP: 0x16 + TX_POLARITY_FLIP: 0x3A + ? + PC_PM_ID: 29 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x54761032 + TX_LANE_MAP: 0x21306574 + RX_POLARITY_FLIP: 0xC6 + TX_POLARITY_FLIP: 0x24 + ? + PC_PM_ID: 33 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x74653021 + TX_LANE_MAP: 0x23016745 + RX_POLARITY_FLIP: 0xE7 + TX_POLARITY_FLIP: 0xD8 + ? + PC_PM_ID: 35 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x47560312 + TX_LANE_MAP: 0x21306745 + RX_POLARITY_FLIP: 0xCA + TX_POLARITY_FLIP: 0x68 + ? + PC_PM_ID: 36 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x56473210 + TX_LANE_MAP: 0x30217465 + RX_POLARITY_FLIP: 0x16 + TX_POLARITY_FLIP: 0x5C + ? + PC_PM_ID: 34 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x76543210 + TX_LANE_MAP: 0x03124756 + RX_POLARITY_FLIP: 0xC6 + TX_POLARITY_FLIP: 0xBD + ? + PC_PM_ID: 38 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x70431256 + TX_LANE_MAP: 0x02563147 + RX_POLARITY_FLIP: 0xFC + TX_POLARITY_FLIP: 0x2D + ? + PC_PM_ID: 40 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x07342165 + TX_LANE_MAP: 0x06253147 + RX_POLARITY_FLIP: 0xED + TX_POLARITY_FLIP: 0x1D + ? + PC_PM_ID: 39 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x34071562 + TX_LANE_MAP: 0x25061437 + RX_POLARITY_FLIP: 0x46 + TX_POLARITY_FLIP: 0xB6 + ? + PC_PM_ID: 37 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x21674305 + TX_LANE_MAP: 0x41637250 + RX_POLARITY_FLIP: 0x09 + TX_POLARITY_FLIP: 0x53 + ? + PC_PM_ID: 42 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x70431256 + TX_LANE_MAP: 0x02563147 + RX_POLARITY_FLIP: 0xFC + TX_POLARITY_FLIP: 0xAD + ? + PC_PM_ID: 44 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x07342165 + TX_LANE_MAP: 0x06253147 + RX_POLARITY_FLIP: 0xED + TX_POLARITY_FLIP: 0x1D + ? + PC_PM_ID: 43 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x34071562 + TX_LANE_MAP: 0x25061437 + RX_POLARITY_FLIP: 0x46 + TX_POLARITY_FLIP: 0xB6 + ? + PC_PM_ID: 41 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x74301562 + TX_LANE_MAP: 0x52604173 + RX_POLARITY_FLIP: 0x06 + TX_POLARITY_FLIP: 0x68 + ? + PC_PM_ID: 46 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x70431256 + TX_LANE_MAP: 0x02563147 + RX_POLARITY_FLIP: 0xFC + TX_POLARITY_FLIP: 0xAD + ? + PC_PM_ID: 48 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x07342165 + TX_LANE_MAP: 0x06253147 + RX_POLARITY_FLIP: 0xED + TX_POLARITY_FLIP: 0x1D + ? + PC_PM_ID: 47 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x34071562 + TX_LANE_MAP: 0x25061437 + RX_POLARITY_FLIP: 0x46 + TX_POLARITY_FLIP: 0xB6 + ? + PC_PM_ID: 45 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x74301562 + TX_LANE_MAP: 0x52604173 + RX_POLARITY_FLIP: 0x06 + TX_POLARITY_FLIP: 0x68 + ? + PC_PM_ID: 50 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x05367412 + TX_LANE_MAP: 0x45207613 + RX_POLARITY_FLIP: 0x4E + TX_POLARITY_FLIP: 0xD2 + ? + PC_PM_ID: 52 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x50634721 + TX_LANE_MAP: 0x40527613 + RX_POLARITY_FLIP: 0x9C + TX_POLARITY_FLIP: 0x62 + ? + PC_PM_ID: 51 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x63507124 + TX_LANE_MAP: 0x52406173 + RX_POLARITY_FLIP: 0x92 + TX_POLARITY_FLIP: 0x69 + ? + PC_PM_ID: 49 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x03657124 + TX_LANE_MAP: 0x25041637 + RX_POLARITY_FLIP: 0xE2 + TX_POLARITY_FLIP: 0x87 + ? + PC_PM_ID: 54 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x05367412 + TX_LANE_MAP: 0x45207613 + RX_POLARITY_FLIP: 0x4E + TX_POLARITY_FLIP: 0xD2 + ? + PC_PM_ID: 56 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x50634721 + TX_LANE_MAP: 0x40527613 + RX_POLARITY_FLIP: 0x9C + TX_POLARITY_FLIP: 0x62 + ? + PC_PM_ID: 55 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x63507124 + TX_LANE_MAP: 0x52406173 + RX_POLARITY_FLIP: 0x92 + TX_POLARITY_FLIP: 0x69 + ? + PC_PM_ID: 53 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x03657124 + TX_LANE_MAP: 0x25041637 + RX_POLARITY_FLIP: 0xE2 + TX_POLARITY_FLIP: 0x87 + ? + PC_PM_ID: 58 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x05367412 + TX_LANE_MAP: 0x45207613 + RX_POLARITY_FLIP: 0x4E + TX_POLARITY_FLIP: 0xD2 + ? + PC_PM_ID: 60 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x26153074 + TX_LANE_MAP: 0x41625730 + RX_POLARITY_FLIP: 0xA4 + TX_POLARITY_FLIP: 0xE6 + ? + PC_PM_ID: 59 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x63507124 + TX_LANE_MAP: 0x52406173 + RX_POLARITY_FLIP: 0x92 + TX_POLARITY_FLIP: 0x79 + ? + PC_PM_ID: 57 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x03657124 + TX_LANE_MAP: 0x25041637 + RX_POLARITY_FLIP: 0xE2 + TX_POLARITY_FLIP: 0x87 + ? + PC_PM_ID: 62 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x12035647 + TX_LANE_MAP: 0x45670123 + RX_POLARITY_FLIP: 0x83 + TX_POLARITY_FLIP: 0x72 + ? + PC_PM_ID: 64 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x21306574 + TX_LANE_MAP: 0x47560123 + RX_POLARITY_FLIP: 0x53 + TX_POLARITY_FLIP: 0xF2 + ? + PC_PM_ID: 63 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x30215476 + TX_LANE_MAP: 0x56471203 + RX_POLARITY_FLIP: 0x94 + TX_POLARITY_FLIP: 0x5C + ? + PC_PM_ID: 61 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x10325476 + TX_LANE_MAP: 0x65742130 + RX_POLARITY_FLIP: 0xE4 + TX_POLARITY_FLIP: 0xBD +... +--- +device: + 0: + PC_PORT_PHYS_MAP: + ? + # CPU port + PORT_ID: 0 + : + PC_PHYS_PORT_ID: 0 + ? + PORT_ID: 1 + : + PC_PHYS_PORT_ID: 1 + ? + PORT_ID: 2 + : + PC_PHYS_PORT_ID: 9 + ? + PORT_ID: 11 + : + PC_PHYS_PORT_ID: 17 + ? + PORT_ID: 12 + : + PC_PHYS_PORT_ID: 25 + ? + PORT_ID: 22 + : + PC_PHYS_PORT_ID: 33 + ? + PORT_ID: 23 + : + PC_PHYS_PORT_ID: 41 + ? + PORT_ID: 33 + : + PC_PHYS_PORT_ID: 49 + ? + PORT_ID: 34 + : + PC_PHYS_PORT_ID: 57 + ? + PORT_ID: 44 + : + PC_PHYS_PORT_ID: 65 + ? + PORT_ID: 45 + : + PC_PHYS_PORT_ID: 73 + ? + PORT_ID: 55 + : + PC_PHYS_PORT_ID: 81 + ? + PORT_ID: 56 + : + PC_PHYS_PORT_ID: 89 + ? + PORT_ID: 66 + : + PC_PHYS_PORT_ID: 97 + ? + PORT_ID: 67 + : + PC_PHYS_PORT_ID: 105 + ? + PORT_ID: 77 + : + PC_PHYS_PORT_ID: 113 + ? + PORT_ID: 78 + : + PC_PHYS_PORT_ID: 121 + ? + PORT_ID: 88 + : + PC_PHYS_PORT_ID: 129 + ? + PORT_ID: 89 + : + PC_PHYS_PORT_ID: 137 + ? + PORT_ID: 99 + : + PC_PHYS_PORT_ID: 145 + ? + PORT_ID: 100 + : + PC_PHYS_PORT_ID: 153 + ? + PORT_ID: 110 + : + PC_PHYS_PORT_ID: 161 + ? + PORT_ID: 111 + : + PC_PHYS_PORT_ID: 169 + ? + PORT_ID: 121 + : + PC_PHYS_PORT_ID: 177 + ? + PORT_ID: 122 + : + PC_PHYS_PORT_ID: 185 + ? + PORT_ID: 132 + : + PC_PHYS_PORT_ID: 193 + ? + PORT_ID: 133 + : + PC_PHYS_PORT_ID: 201 + ? + PORT_ID: 143 + : + PC_PHYS_PORT_ID: 209 + ? + PORT_ID: 144 + : + PC_PHYS_PORT_ID: 217 + ? + PORT_ID: 154 + : + PC_PHYS_PORT_ID: 225 + ? + PORT_ID: 155 + : + PC_PHYS_PORT_ID: 233 + ? + PORT_ID: 165 + : + PC_PHYS_PORT_ID: 241 + ? + PORT_ID: 166 + : + PC_PHYS_PORT_ID: 249 + ? + PORT_ID: 176 + : + PC_PHYS_PORT_ID: 257 + ? + PORT_ID: 177 + : + PC_PHYS_PORT_ID: 265 + ? + PORT_ID: 187 + : + PC_PHYS_PORT_ID: 273 + ? + PORT_ID: 188 + : + PC_PHYS_PORT_ID: 281 + ? + PORT_ID: 198 + : + PC_PHYS_PORT_ID: 289 + ? + PORT_ID: 199 + : + PC_PHYS_PORT_ID: 297 + ? + PORT_ID: 209 + : + PC_PHYS_PORT_ID: 305 + ? + PORT_ID: 210 + : + PC_PHYS_PORT_ID: 313 + ? + PORT_ID: 220 + : + PC_PHYS_PORT_ID: 321 + ? + PORT_ID: 221 + : + PC_PHYS_PORT_ID: 329 + ? + PORT_ID: 231 + : + PC_PHYS_PORT_ID: 337 + ? + PORT_ID: 232 + : + PC_PHYS_PORT_ID: 345 + ? + PORT_ID: 242 + : + PC_PHYS_PORT_ID: 353 + ? + PORT_ID: 243 + : + PC_PHYS_PORT_ID: 361 + ? + PORT_ID: 253 + : + PC_PHYS_PORT_ID: 369 + ? + PORT_ID: 254 + : + PC_PHYS_PORT_ID: 377 + ? + PORT_ID: 264 + : + PC_PHYS_PORT_ID: 385 + ? + PORT_ID: 265 + : + PC_PHYS_PORT_ID: 393 + ? + PORT_ID: 275 + : + PC_PHYS_PORT_ID: 401 + ? + PORT_ID: 276 + : + PC_PHYS_PORT_ID: 409 + ? + PORT_ID: 286 + : + PC_PHYS_PORT_ID: 417 + ? + PORT_ID: 287 + : + PC_PHYS_PORT_ID: 425 + ? + PORT_ID: 297 + : + PC_PHYS_PORT_ID: 433 + ? + PORT_ID: 298 + : + PC_PHYS_PORT_ID: 441 + ? + PORT_ID: 308 + : + PC_PHYS_PORT_ID: 449 + ? + PORT_ID: 309 + : + PC_PHYS_PORT_ID: 457 + ? + PORT_ID: 319 + : + PC_PHYS_PORT_ID: 465 + ? + PORT_ID: 320 + : + PC_PHYS_PORT_ID: 473 + ? + PORT_ID: 330 + : + PC_PHYS_PORT_ID: 481 + ? + PORT_ID: 331 + : + PC_PHYS_PORT_ID: 489 + ? + PORT_ID: 341 + : + PC_PHYS_PORT_ID: 497 + ? + PORT_ID: 342 + : + PC_PHYS_PORT_ID: 505 + # mgmt port + ? + PORT_ID: 186 + : + PC_PHYS_PORT_ID: 516 + ? + PORT_ID: 274 + : + PC_PHYS_PORT_ID: 515 +... +--- +device: + 0: + PC_PORT: + ? + PORT_ID: [[1, 2], + [11, 12], + [22, 23], + [33, 34], + [44, 45], + [55, 56], + [66, 67], + [77, 78], + [88, 89], + [99, 100], + [110, 111], + [121, 122], + [132, 133], + [143, 144], + [154, 155], + [165, 166], + [176, 177], + [187, 188], + [198, 199], + [209, 210], + [220, 221], + [231, 232], + [242, 243], + [253, 254], + [264, 265], + [275, 276], + [286, 287], + [297, 298], + [308, 309], + [319, 320], + [330, 331], + [341, 342]] + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + #LINK_TRAINING: 1 + ? + PORT_ID: [186, 274] + : + ENABLE: 0 + SPEED: 10000 + NUM_LANES: 1 + MAX_FRAME_SIZE: 9416 +... +--- +device: + 0: + # Per pipe flex counter configuration + CTR_EFLEX_CONFIG: + CTR_ING_EFLEX_OPERMODE_PIPEUNIQUE: 1 + CTR_ING_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1 + CTR_EGR_EFLEX_OPERMODE_PIPEUNIQUE: 1 + CTR_EGR_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1 + + # IFP mode + FP_CONFIG: + FP_ING_OPERMODE: GLOBAL_PIPE_AWARE + + DEVICE_CONFIG: + AUTOLOAD_BOARD_SETTINGS: 0 +... + +#Lossless buffer configs +--- +device: + 0: + TM_THD_CONFIG: + SKIP_BUFFER_RESERVATION: 0 + THRESHOLD_MODE: LOSSY + + TM_SCHEDULER_CONFIG: + NUM_MC_Q: NUM_MC_Q_4 + + TM_ING_PORT_PRI_GRP: + ? + PORT_ID: [[1,20], [22,42], [44,64], [66,86], [88,108], [110,130], [132,152], [154,174], [176,196], [198,218], [220,240], [242,262], [264,284], [286,306], [308,328], [330,350]] + TM_PRI_GRP_ID: [[3,4]] + : + LOSSLESS: 0 +... + +--- +device: + 0: + # Q-Group reservations + TM_THD_Q_GRP: + ? + PORT_ID: [[1,20], [22,42], [44,64], [66,86], [88,108], [110,130], [132,152], [154,174], [176,196], [198,218], [220,240], [242,262], [264,284], [286,306], [308,328], [330,350]] + : + UC_Q_GRP_MIN_GUARANTEE_CELLS: 14 + MC_Q_GRP_MIN_GUARANTEE_CELLS: 14 +... + +#mgmt port diff --git a/device/dell/x86_64-dell_z9864f-r0/custom_led.bin b/device/dell/x86_64-dell_z9864f-r0/custom_led.bin new file mode 100644 index 00000000000..c1ff83e4593 Binary files /dev/null and b/device/dell/x86_64-dell_z9864f-r0/custom_led.bin differ diff --git a/device/dell/x86_64-dell_z9864f-r0/default_sku b/device/dell/x86_64-dell_z9864f-r0/default_sku new file mode 100644 index 00000000000..05d39be1c67 --- /dev/null +++ b/device/dell/x86_64-dell_z9864f-r0/default_sku @@ -0,0 +1 @@ +Dell-Z9864f-O64 t1 diff --git a/device/dell/x86_64-dell_z9864f-r0/init_cfg.json b/device/dell/x86_64-dell_z9864f-r0/init_cfg.json new file mode 100644 index 00000000000..e104fd15a34 --- /dev/null +++ b/device/dell/x86_64-dell_z9864f-r0/init_cfg.json @@ -0,0 +1,7 @@ +{ + "FEATURE": { + "warm-reboot": { + "state": "not-supported" + } + } +} diff --git a/device/dell/x86_64-dell_z9864f-r0/installer.conf b/device/dell/x86_64-dell_z9864f-r0/installer.conf new file mode 100644 index 00000000000..a9c8c7dc07d --- /dev/null +++ b/device/dell/x86_64-dell_z9864f-r0/installer.conf @@ -0,0 +1,3 @@ +CONSOLE_PORT=0x03f8 +CONSOLE_DEV=0 +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="intel_iommu=off irqfixup i2c-smbus.disable_spd=1" diff --git a/device/dell/x86_64-dell_z9864f-r0/led_proc_init.soc b/device/dell/x86_64-dell_z9864f-r0/led_proc_init.soc new file mode 100644 index 00000000000..c683151c041 --- /dev/null +++ b/device/dell/x86_64-dell_z9864f-r0/led_proc_init.soc @@ -0,0 +1,7 @@ +# LED microprocessor initialization for Dell z9432 +# +# +led 0 stop +led 0 load /usr/share/sonic/platform/custom_led.bin +led start +led auto on diff --git a/device/dell/x86_64-dell_z9864f-r0/media_settings.json b/device/dell/x86_64-dell_z9864f-r0/media_settings.json new file mode 100644 index 00000000000..e18bce7b389 --- /dev/null +++ b/device/dell/x86_64-dell_z9864f-r0/media_settings.json @@ -0,0 +1,78403 @@ +{ + "SPEED_MEDIA_SETTINGS": { + "1": { + "100000,(.*-LPO)": { + "medium": "backplane", + "main": { + "lane0": "0x64", + "lane1": "0x64", + "lane2": "0x64", + "lane3": "0x64", + "lane4": "0x64", + "lane5": "0x64", + "lane6": "0x64", + "lane7": "0x64" + }, + "post1": { + "lane0": "0xffffffed", + "lane1": "0xffffffed", + "lane2": "0xffffffed", + "lane3": "0xffffffed", + "lane4": "0xffffffed", + "lane5": "0xffffffed", + "lane6": "0xffffffed", + "lane7": "0xffffffed" + }, + "post2": { + "lane0": "0x01", + "lane1": "0x01", + "lane2": "0x01", + "lane3": "0x01", + "lane4": "0x01", + "lane5": "0x01", + "lane6": "0x01", + "lane7": "0x01" + }, + "pre1": { + "lane0": "0xffffffe1", + "lane1": "0xffffffe1", + "lane2": "0xffffffe1", + "lane3": "0xffffffe1", + "lane4": "0xffffffe1", + "lane5": "0xffffffe1", + "lane6": "0xffffffe1", + "lane7": "0xffffffe1" + }, + "pre2": { + "lane0": "0x0A", + "lane1": "0x0A", + "lane2": "0x0A", + "lane3": "0x0A", + "lane4": "0x0A", + "lane5": "0x0A", + "lane6": "0x0A", + "lane7": "0x0A" + }, + "pre3": { + "lane0": "0xfffffffd", + "lane1": "0xfffffffd", + "lane2": "0xfffffffd", + "lane3": "0xfffffffd", + "lane4": "0xfffffffd", + "lane5": "0xfffffffd", + "lane6": "0xfffffffd", + "lane7": "0xfffffffd" + }, + "nlc_upper": { + "lane0": "4", + "lane1": "4", + "lane2": "4", + "lane3": "4", + "lane4": "4", + "lane5": "4", + "lane6": "4", + "lane7": "4" + }, + "nlc_lower": { + "lane0": "4", + "lane1": "4", + "lane2": "4", + "lane3": "4", + "lane4": "4", + "lane5": "4", + "lane6": "4", + "lane7": "4" + }, + "ecd_auto": { + "lane0": "on", + "lane1": "on", + "lane2": "on", + "lane3": "on", + "lane4": "on", + "lane5": "on", + "lane6": "on", + "lane7": "on" + }, + "reach_mode": { + "lane0": "nr", + "lane1": "nr", + "lane2": "nr", + "lane3": "nr", + "lane4": "nr", + "lane5": "nr", + "lane6": "nr", + "lane7": "nr" + } + + }, + "100000,((OSFP112-DR*)|(OSFP112-VR*)|(OSFP112-SR*)|(OSFP112-FR*))": { + "medium": "backplane", + "main": { + "lane0": "0x8C", + "lane1": "0x8C", + "lane2": "0x8C", + "lane3": "0x8C", + "lane4": "0x8C", + "lane5": "0x8C", + "lane6": "0x8C", + "lane7": "0x8C" + }, + "post1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post2": { + "lane0": "0x00", + "lane1": "0x00", + "lane2": "0x00", + "lane3": "0x00", + "lane4": "0x00", + "lane5": "0x00", + "lane6": "0x00", + "lane7": "0x00" + }, + "pre1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8", + "lane4": "0xffffffe8", + "lane5": "0xffffffe8", + "lane6": "0xffffffe8", + "lane7": "0xffffffe8" + }, + "pre2": { + "lane0": "0x04", + "lane1": "0x04", + "lane2": "0x04", + "lane3": "0x04", + "lane4": "0x04", + "lane5": "0x04", + "lane6": "0x04", + "lane7": "0x04" + }, + "pre3": { + "lane0": "0x00", + "lane1": "0x00", + "lane2": "0x00", + "lane3": "0x00", + "lane4": "0x00", + "lane5": "0x00", + "lane6": "0x00", + "lane7": "0x00" + } + }, + "100000,OSFP112-CR-1\\.0": { + "medium": "copper", + "main": { + "lane0": "0xA8", + "lane1": "0xA8", + "lane2": "0xA8", + "lane3": "0xA8", + "lane4": "0xA8", + "lane5": "0xA8", + "lane6": "0xA8", + "lane7": "0xA8" + }, + "post1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post2": { + "lane0": "0x00", + "lane1": "0x00", + "lane2": "0x00", + "lane3": "0x00", + "lane4": "0x00", + "lane5": "0x00", + "lane6": "0x00", + "lane7": "0x00" + }, + "pre1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x00", + "lane1": "0x00", + "lane2": "0x00", + "lane3": "0x00", + "lane4": "0x00", + "lane5": "0x00", + "lane6": "0x00", + "lane7": "0x00" + }, + "pre3": { + "lane0": "0x00", + "lane1": "0x00", + "lane2": "0x00", + "lane3": "0x00", + "lane4": "0x00", + "lane5": "0x00", + "lane6": "0x00", + "lane7": "0x00" + }, + "nlc_upper": { + "lane0": "0", + "lane1": "0", + "lane2": "0", + "lane3": "0", + "lane4": "0", + "lane5": "0", + "lane6": "0", + "lane7": "0" + }, + "nlc_lower": { + "lane0": "0", + "lane1": "0", + "lane2": "0", + "lane3": "0", + "lane4": "0", + "lane5": "0", + "lane6": "0", + "lane7": "0" + }, + "ecd_auto": { + "lane0": "off", + "lane1": "off", + "lane2": "off", + "lane3": "off", + "lane4": "off", + "lane5": "off", + "lane6": "off", + "lane7": "off" + }, + "reach_mode": { + "lane0": "er", + "lane1": "er", + "lane2": "er", + "lane3": "er", + "lane4": "er", + "lane5": "er", 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"lane0": "0x63", + "lane1": "0x63", + "lane2": "0x63", + "lane3": "0x63", + "lane4": "0x63", + "lane5": "0x63", + "lane6": "0x63", + "lane7": "0x63" + }, + "post1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "post2": { + "lane0": "0x00", + "lane1": "0x00", + "lane2": "0x00", + "lane3": "0x00", + "lane4": "0x00", + "lane5": "0x00", + "lane6": "0x00", + "lane7": "0x00" + }, + "pre1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x00", + "lane1": "0x00", + "lane2": "0x00", + "lane3": "0x00", + "lane4": "0x00", + "lane5": "0x00", + "lane6": "0x00", + "lane7": "0x00" + }, + "pre3": { + "lane0": "0x00", + "lane1": "0x00", + "lane2": "0x00", + "lane3": "0x00", + "lane4": "0x00", + "lane5": "0x00", + "lane6": "0x00", + "lane7": "0x00" + }, + "rev_polarity_rx": { + "lane0": "on", + "lane1": "on", + "lane2": "off", + "lane3": "on", + "lane4": "on", + "lane5": "off", + "lane6": "off", + "lane7": "off" + }, + "rev_polarity_tx": { + "lane0": "off", + "lane1": "on", + "lane2": "off", + "lane3": "off", + "lane4": "off", + "lane5": "off", + "lane6": "on", + "lane7": "off" + } + + } + } + } +} diff --git a/device/dell/x86_64-dell_z9864f-r0/pcie.yaml b/device/dell/x86_64-dell_z9864f-r0/pcie.yaml new file mode 100644 index 00000000000..5b6966eccdb --- /dev/null +++ b/device/dell/x86_64-dell_z9864f-r0/pcie.yaml @@ -0,0 +1,30 @@ +- domain: '0000' + bus: '03' + dev: '00' + fn: '0' + id: '1533' + name: 'Ethernet controller: Intel Corporation I210 Gigabit Network Connection (rev 03)' +- domain: '0000' + bus: '15' + dev: '00' + fn: '0' + id: 'f990' + name: 'Ethernet controller: Broadcom Limited Device f990 (rev 11)' +- domain: '0000' + bus: '02' + dev: '00' + fn: '0' + id: '9c1d' + name: 'Lattice Semiconductor Corporation Device 9c1d (rev 01)' +- domain: '0000' + bus: '00' + dev: '0e' + fn: '0' + id: '18f2' + name: 'SATA controller: Intel Corporation Device 18f2 (rev 11)' +- domain: '0000' + bus: '01' + dev: '00' + fn: '0' + id: '1602' + name: 'Non-Volatile memory controller: Device 1bc0:1602 (rev 01)' diff --git a/device/dell/x86_64-dell_z9864f-r0/platform.json b/device/dell/x86_64-dell_z9864f-r0/platform.json new file mode 100644 index 00000000000..213e99cfc95 --- /dev/null +++ b/device/dell/x86_64-dell_z9864f-r0/platform.json @@ -0,0 +1,4647 @@ +{ + "chassis": { + "name": "Z9864F-ON", + "thermal_manager": false, + "status_led": { + "controllable": true, + "colors": [ + "green", + "blinking_green", + "amber", + "blinking_amber" + ] + }, + "components": [ + { + "name": "BIOS" + }, + { + "name": "FPGA" + }, + { + "name": "BMC" + }, + { + "name": "System CPLD" + }, + { + "name": "Secondary CPLD 1" + }, + { + "name": "Secondary CPLD 2" + }, + { + "name": "PCIe" + } + ], + "fans": [ + { + "name": "FanTray1-Fan1", + "speed": { + "controllable": false + }, + "status_led": { + "available": false + } + }, + { + "name": "FanTray1-Fan2", + "speed": { + "controllable": false + }, + "status_led": { + "available": false + } + }, + { + "name": "FanTray2-Fan1", + "speed": { + "controllable": false + }, + "status_led": { + "available": false + } + }, + { + "name": "FanTray2-Fan2", + "speed": { + "controllable": false + }, + "status_led": { + "available": false + } + }, + { + "name": "FanTray3-Fan1", + "speed": { + "controllable": false + }, + "status_led": { + "available": false + } + }, + { + "name": "FanTray3-Fan2", + "speed": { + "controllable": false + }, + "status_led": { + "available": false + } + }, + { + "name": "FanTray4-Fan1", + "speed": { + "controllable": false + }, + "status_led": { + "available": false + } + }, + { + "name": "FanTray4-Fan2", + "speed": { + "controllable": false + }, + "status_led": { + "available": false + } + } + ], + "fan_drawers": [ + { + "name": "FanTray1", + "status_led": { + "controllable": false + }, + "fans": [ + { + "name": "FanTray1-Fan1", + "speed": { + "controllable": false + }, + "status_led": { + "available": false + } + }, + { + "name": "FanTray1-Fan2", + "speed": { + "controllable": false + }, + "status_led": { + "available": false + } + } + ] + }, + { + "name": "FanTray2", + "status_led": { + "controllable": false + }, + "fans": [ + { + "name": "FanTray2-Fan1", + "speed": { + "controllable": false + }, + "status_led": { + "available": false + } + }, + { + "name": "FanTray2-Fan2", + "speed": { + "controllable": false + }, + "status_led": { + "available": false + } + } + ] + }, + { + "name": "FanTray3", + "status_led": { + "controllable": false + }, + "fans": [ + { + "name": "FanTray3-Fan1", + "speed": { + "controllable": false + }, + "status_led": { + "available": false + } + }, + { + "name": "FanTray3-Fan2", + "speed": { + "controllable": false + }, + "status_led": { + "available": false + } + } + ] + }, + { + "name": "FanTray4", + "status_led": { + "controllable": false + }, + "fans": [ + { + "name": "FanTray4-Fan1", + "speed": { + "controllable": false + }, + "status_led": { + "available": false + } + }, + { + "name": "FanTray4-Fan2", + "speed": { + "controllable": false + }, + "status_led": { + "available": false + } + } + ] + } + ], + "psus": [ + { + "name": "PSU1", + "status_led": { + "controllable": false + }, + "fans": [ + { + "name": "PSU1 Fan", + "speed": { + "controllable": false + }, + "status_led": { + "available": false + } + } + ] + }, + { + "name": "PSU2", + "status_led": { + "controllable": false + }, + "fans": [ + { + "name": "PSU2 Fan", + "speed": { + "controllable": false + }, + "status_led": { + "available": false + } + } + ] + } + ], + "thermals": [ + { + "name": "CPU Temp", + "controllable": false, + "low-crit-threshold": false, + "minimum-recorded": false, + "maximum-recorded": false + }, + { + "name": "FAN Right Temp", + "controllable": false, + "low-crit-threshold": false, + "minimum-recorded": false, + "maximum-recorded": false + }, + { + "name": "FAN Left Temp", + "controllable": false, + "low-crit-threshold": false, + "minimum-recorded": false, + "maximum-recorded": false + }, + { + "name": "NPU Front Temp", + "controllable": false, + "low-crit-threshold": false, + "minimum-recorded": false, + "maximum-recorded": false + }, + { + "name": "NPU Temp", + "controllable": false, + "low-crit-threshold": false, + "minimum-recorded": false, + "maximum-recorded": false + }, + { + "name": "PSU1 AF Temp", + "controllable": false, + "low-crit-threshold": false, + "high-threshold": false, + "minimum-recorded": false, + "maximum-recorded": false + }, + { + "name": "PSU1 Front Temp", + "controllable": false, + "low-crit-threshold": false, + "high-threshold": false, + "minimum-recorded": false, + "maximum-recorded": false + }, + { + "name": "PSU1 Rear Temp", + "controllable": false, + "low-crit-threshold": false, + "high-threshold": false, + "minimum-recorded": false, + "maximum-recorded": false + }, + { + "name": "PSU2 AF Temp", + "controllable": false, + "low-crit-threshold": false, + "high-threshold": false, + "minimum-recorded": false, + "maximum-recorded": false + }, + { + "name": "PSU2 Front Temp", + "controllable": false, + "low-crit-threshold": false, + "high-threshold": false, + "minimum-recorded": false, + "maximum-recorded": false + }, + { + "name": "PSU2 Rear Temp", + "controllable": false, + "low-crit-threshold": false, + "high-threshold": false, + "minimum-recorded": false, + "maximum-recorded": false + }, + { + "name": "PT Left Top Temp", + "controllable": false, + "low-crit-threshold": false, + "minimum-recorded": false, + "maximum-recorded": false + }, + { + "name": "PT Left Bottom Temp", + "controllable": false, + "low-crit-threshold": false, + "minimum-recorded": false, + "maximum-recorded": false + }, + { + "name": "PT Right Top Temp", + "controllable": false, + "low-crit-threshold": false, + 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"breakout_modes": { + "1x800G": [ + "etp61" + ], + "1x400G(8)": [ + "etp61" + ], + "1x100G(4)": [ + "etp61" + ], + "2x400G(8)": [ + "etp61a", + "etp61b" + ], + "2x200G(8)": [ + "etp61a", + "etp61b" + ], + "2x100G(8)": [ + "etp61a", + "etp61b" + ], + "2x50G(8)": [ + "etp61a", + "etp61b" + ], + "4x200G": [ + "etp61a", + "etp61b", + "etp61c", + "etp61d" + ], + "4x100G(8)": [ + "etp61a", + "etp61b", + "etp61c", + "etp61d" + ], + "8x100G": [ + "etp61a", + "etp61b", + "etp61c", + "etp61d", + "etp61e", + "etp61f", + "etp61g", + "etp61h" + ], + "8x50G": [ + "etp61a", + "etp61b", + "etp61c", + "etp61d", + "etp61e", + "etp61f", + "etp61g", + "etp61h" + ] + } + }, + "Ethernet488": { + "index": "62,62,62,62,62,62,62,62", + "lanes": "449,450,451,452,453,454,455,456", + "breakout_modes": { + "1x800G": [ + "etp62" + ], + "1x400G(8)": [ + "etp62" + ], + "1x100G(4)": [ + "etp62" + ], + "2x400G(8)": [ + "etp62a", + "etp62b" + ], + "2x200G(8)": [ + "etp62a", + "etp62b" + ], + "2x100G(8)": [ + "etp62a", + "etp62b" + ], + "2x50G(8)": [ + "etp62a", + "etp62b" + ], + "4x200G": [ + "etp62a", + "etp62b", + "etp62c", + "etp62d" + ], + "4x100G(8)": [ + "etp62a", + "etp62b", + "etp62c", + "etp62d" + ], + "8x100G": [ + "etp62a", + "etp62b", + "etp62c", + "etp62d", + "etp62e", + "etp62f", + "etp62g", + "etp62h" + ], + "8x50G": [ + "etp62a", + "etp62b", + "etp62c", + "etp62d", + "etp62e", + "etp62f", + "etp62g", + "etp62h" + ] + } + }, + "Ethernet496": { + "index": "63,63,63,63,63,63,63,63", + "lanes": "497,498,499,500,501,502,503,504", + "breakout_modes": { + "1x800G": [ + "etp63" + ], + "1x400G(8)": [ + "etp63" + ], + "1x100G(4)": [ + "etp63" + ], + "2x400G(8)": [ + "etp63a", + "etp63b" + ], + "2x200G(8)": [ + "etp63a", + "etp63b" + ], + "2x100G(8)": [ + "etp63a", + "etp63b" + ], + "2x50G(8)": [ + "etp63a", + "etp63b" + ], + "4x200G": [ + "etp63a", + "etp63b", + "etp63c", + "etp63d" + ], + "4x100G(8)": [ + "etp63a", + "etp63b", + "etp63c", + "etp63d" + ], + "8x100G": [ + "etp63a", + "etp63b", + "etp63c", + "etp63d", + "etp63e", + "etp63f", + "etp63g", + "etp63h" + ], + "8x50G": [ + "etp63a", + "etp63b", + "etp63c", + "etp63d", + "etp63e", + "etp63f", + "etp63g", + "etp63h" + ] + } + }, + "Ethernet504": { + "index": "64,64,64,64,64,64,64,64", + "lanes": "481,482,483,484,485,486,487,488", + "breakout_modes": { + "1x800G": [ + "etp64" + ], + "1x400G(8)": [ + "etp64" + ], + "1x100G(4)": [ + "etp64" + ], + "2x400G(8)": [ + "etp64a", + "etp64b" + ], + "2x200G(8)": [ + "etp64a", + "etp64b" + ], + "2x100G(8)": [ + "etp64a", + "etp64b" + ], + "2x50G(8)": [ + "etp64a", + "etp64b" + ], + "4x200G": [ + "etp64a", + "etp64b", + "etp64c", + "etp64d" + ], + "4x100G(8)": [ + "etp64a", + "etp64b", + "etp64c", + "etp64d" + ], + "8x100G": [ + "etp64a", + "etp64b", + "etp64c", + "etp64d", + "etp64e", + "etp64f", + "etp64g", + "etp64h" + ], + "8x50G": [ + "etp64a", + "etp64b", + "etp64c", + "etp64d", + "etp64e", + "etp64f", + "etp64g", + "etp64h" + ] + } + }, + "Ethernet512": { + "index": "65", + "lanes": "515", + "breakout_modes": { + "1x25G": [ + "etp65" + ], + "1x10G": [ + "etp65" + ] + } + }, + "Ethernet513": { + "index": "66", + "lanes": "516", + "breakout_modes": { + "1x25G": [ + "etp66" + ], + "1x10G": [ + "etp66" + ] + } + } + } +} diff --git a/device/dell/x86_64-dell_z9864f-r0/platform_asic b/device/dell/x86_64-dell_z9864f-r0/platform_asic new file mode 100644 index 00000000000..96046765276 --- /dev/null +++ b/device/dell/x86_64-dell_z9864f-r0/platform_asic @@ -0,0 +1 @@ +broadcom diff --git a/device/dell/x86_64-dell_z9864f-r0/platform_env.conf b/device/dell/x86_64-dell_z9864f-r0/platform_env.conf new file mode 100644 index 00000000000..fb92510b68e --- /dev/null +++ b/device/dell/x86_64-dell_z9864f-r0/platform_env.conf @@ -0,0 +1 @@ +is_ltsw_chip=1 \ No newline at end of file diff --git a/device/dell/x86_64-dell_z9864f-r0/plugins/eeprom.py b/device/dell/x86_64-dell_z9864f-r0/plugins/eeprom.py new file mode 100644 index 00000000000..3665310fc86 --- /dev/null +++ b/device/dell/x86_64-dell_z9864f-r0/plugins/eeprom.py @@ -0,0 +1,31 @@ +#!/usr/bin/env python + +############################################################################# +# DellEMC Z9864f +# +# Platform and model specific eeprom subclass, inherits from the base class, +# and provides the followings: +# - the eeprom format definition +# - specific encoder/decoder if there is special need +############################################################################# + +try: + import os.path + from sonic_eeprom import eeprom_tlvinfo +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + + +class board(eeprom_tlvinfo.TlvInfoDecoder): + + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = None + for b in (0, 1): + f = '/sys/class/i2c-adapter/i2c-{0}/{0}-0050/eeprom'.format(b) + if os.path.exists(f): + self.eeprom_path = f + break + if self.eeprom_path is None: + return + + super(board, self).__init__(self.eeprom_path, 0, '', True) diff --git a/device/dell/x86_64-dell_z9864f-r0/plugins/fanutil.py b/device/dell/x86_64-dell_z9864f-r0/plugins/fanutil.py new file mode 100644 index 00000000000..e9d606fae66 --- /dev/null +++ b/device/dell/x86_64-dell_z9864f-r0/plugins/fanutil.py @@ -0,0 +1,177 @@ +#!/usr/bin/python3 + +############################################################################# +# Dell Z9864F +# +# Module contains an implementation of SONiC FAN Base API and +# provides various info about the FANs which are available in the platform +# +############################################################################# + +import os.path +import logging +import commands + +try: + from sonic_fan.fan_base import FanBase +except ImportError, e: + raise ImportError(str(e) + '- required module not found') + + +class FanUtil(FanBase): + + """Platform-specific FANutil class""" + + FANTRAY_NUM_ON_MAIN_BOARD = 4 + NUM_FANS_PERTRAY = 2 + FANTRAY_NUM_START_IDX = 1 + FRU_FAN_START_IDX = 3 + IPMI_FAN_PRESENCE = 'ipmitool sensor get FAN{0}_prsnt' + IPMI_FAN_FRONT_SPEED = 'ipmitool sdr get Fan{0}_Front_rpm' + IPMI_FAN_REAR_SPEED = 'ipmitool sdr get Fan{0}_Rear_rpm' + IPMI_FRU_DATA = 'ipmitool fru print {0}' + + def __init__(self, log_level=logging.DEBUG): + FanBase.__init__(self) + self.num_fans = self.FANTRAY_NUM_ON_MAIN_BOARD \ + * self.NUM_FANS_PERTRAY + + def get_fan_status(self, fan_id): + try: + (ret_status, ipmi_cmd_ret) = \ + commands.getstatusoutput(self.IPMI_FAN_PRESENCE.format(fan_id)) + if ret_status == 0: + return ipmi_cmd_ret.splitlines()[5].strip(' ' + ).strip('[]') + except Exception: + logging.error('Failed to execute : %s' + % self.IPMI_FAN_PRESENCE.format(fan_id)) + + def get_front_fan_speed(self, fan_id): + try: + (ret_status, ipmi_cmd_ret) = \ + commands.getstatusoutput(self.IPMI_FAN_FRONT_SPEED.format(fan_id)) + if ret_status == 0: + rdata = ipmi_cmd_ret.splitlines()[3].split(':' + )[1].split(' ')[1] + return rdata + except Exception: + logging.error('Failed to execute : %s' + % self.IPMI_FAN_FRONT_SPEED.format(fan_id)) + + def get_rear_fan_speed(self, fan_id): + try: + (ret_status, ipmi_cmd_ret) = \ + commands.getstatusoutput(self.IPMI_FAN_REAR_SPEED.format(fan_id)) + if ret_status == 0: + rdata = ipmi_cmd_ret.splitlines()[3].split(':' + )[1].split(' ')[1] + return rdata + except Exception: + + logging.error('Failed to execute : %s' + % self.IPMI_FAN_REAR_SPEED.format(fan_id)) + + # Read FAN FRU info + + def get_fan_direction_from_fru(self, fru_id, reg_name): + output = None + try: + (status, ipmi_fru_list) = \ + commands.getstatusoutput(self.IPMI_FRU_DATA.format(fru_id)) + if status == 0: + for item in ipmi_fru_list.split('\n'): + if reg_name in item: + output = item.strip() + if output is None: + logging.error('\nFailed to fetch: ' + + reg_name + ' sensor ') + output = output.split(':')[1].strip(' ') + if output == 'F2B' or output == 'B2F': + return output + except Exception: + logging.error('Failed to execute:' + ipmi_fru_list) + + def get_num_fans(self): + return self.num_fans + + def get_presence(self, index): + if index is None: + return False + + if index < self.FANTRAY_NUM_START_IDX or index \ + > self.FANTRAY_NUM_START_IDX + self.num_fans - 1: + logging.error('Invalid FAN index:%d', index) + return False + + tray_index = (index - 1) / self.NUM_FANS_PERTRAY + 1 + + if self.get_fan_status(tray_index) == 'Device Present': + return True + else: + return False + + def get_status(self, index): + if index is None: + return False + + if index < self.FANTRAY_NUM_START_IDX or index \ + > self.FANTRAY_NUM_START_IDX + self.num_fans - 1: + logging.error('Invalid FAN index:%d', index) + return False + + tray_index = (index - 1) / self.NUM_FANS_PERTRAY + 1 + fantray_front_speed = self.get_front_fan_speed(tray_index) + fantray_rear_speed = self.get_rear_fan_speed(tray_index) + + if fantray_front_speed != '0' and fantray_rear_speed != '0': + return True + else: + return False + + def get_direction(self, index): + if index is None: + return None + + if index < self.FANTRAY_NUM_START_IDX or index \ + > self.FANTRAY_NUM_START_IDX + self.num_fans - 1: + logging.error('Invalid FAN index:%d', index) + return None + + tray_index = (index - 1) / self.NUM_FANS_PERTRAY + fru_id = self.FRU_FAN_START_IDX + tray_index + direction = self.get_fan_direction_from_fru(fru_id, + 'Board Extra') + + if direction == 'B2F': + return 'INTAKE' + elif direction == 'F2B': + return 'EXHAUST' + else: + return None + + def get_speed(self, index): + if index is None: + return 0 + + if index < self.FANTRAY_NUM_START_IDX or index \ + > self.FANTRAY_NUM_START_IDX + self.num_fans - 1: + logging.error('Invalid FAN index:%d', index) + return 0 + + tray_index = (index - 1) / self.NUM_FANS_PERTRAY + 1 + + if index % 2 != 0: + fantray_speed = self.get_front_fan_speed(tray_index) + else: + fantray_speed = self.get_rear_fan_speed(tray_index) + + if self.get_presence(index) == True: + return int(fantray_speed.strip()) + else: + return 0 + + def set_speed(self, val): + logging.error('Not allowed to set fan speed!') + + return False diff --git a/device/dell/x86_64-dell_z9864f-r0/plugins/psuutil.py b/device/dell/x86_64-dell_z9864f-r0/plugins/psuutil.py new file mode 100644 index 00000000000..a3f13c01423 --- /dev/null +++ b/device/dell/x86_64-dell_z9864f-r0/plugins/psuutil.py @@ -0,0 +1,287 @@ +# +# psuutil.py +# Platform-specific PSU status interface for SONiC +# +import os.path +import logging +import commands +import sys + +Z9864F_MAX_PSUS = 2 +FRU_PSUL = 11 +FRU_PSUR = 12 + + +try: + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + IPMI_PSU1_DATA = "ipmitool raw 0x04 0x2d 0x40 | awk '{print substr($0,9,1)}'" + IPMI_PSU2_DATA = "ipmitool raw 0x04 0x2d 0x30 | awk '{print substr($0,9,1)}'" + IPMI_PSU_VOUT = "ipmitool sdr get PSU{0}_Out_volt" + IPMI_PSU_POUT = "ipmitool sdr get PSU{0}_Out_watt" + IPMI_PSU_COUT = "ipmitool sdr get PSU{0}_Out_amp" + IPMI_PSU_FAN_SPEED = "ipmitool sdr get PSU{0}_Fan" + IPMI_FRU = "ipmitool fru" + IPMI_FRU_DATA = "ipmitool fru print {0}" + + def __init__(self): + PsuBase.__init__(self) + + def isDockerEnv(self): + num_docker = open('/proc/self/cgroup', 'r').read().count(":/docker") + if num_docker > 0: + return True + else: + return False + + def get_psu_vout(self,index): + try: + ret_status, ipmi_cmd_ret = commands.getstatusoutput(self.IPMI_PSU_VOUT.format(index)) + if ret_status == 0: + rdata = ipmi_cmd_ret.splitlines()[3].split(':')[1].split(' ')[1] + return rdata + + except Exception: + logging.error('Failed to execute : %s'%self.IPMI_PSU_VOUT.format(index)) + + def get_psu_cout(self,index): + try: + ret_status, ipmi_cmd_ret = commands.getstatusoutput(self.IPMI_PSU_COUT.format(index)) + if ret_status == 0: + rdata = ipmi_cmd_ret.splitlines()[3].split(':')[1].split(' ')[1] + return rdata + + except Exception: + logging.error('Failed to execute : %s'%self.IPMI_PSU_COUT.format(index)) + + def get_psu_pout(self,index): + try: + ret_status, ipmi_cmd_ret = commands.getstatusoutput(self.IPMI_PSU_POUT.format(index)) + if ret_status == 0: + rdata = ipmi_cmd_ret.splitlines()[3].split(':')[1].split(' ')[1] + return rdata + + except Exception: + logging.error('Failed to execute : %s'%self.IPMI_PSU_POUT.format(index)) + + def get_psu_fan_speed(self,index): + try: + ret_status, ipmi_cmd_ret = commands.getstatusoutput(self.IPMI_PSU_FAN_SPEED.format(index)) + if ret_status == 0: + rdata = ipmi_cmd_ret.splitlines()[3].split(':')[1].split(' ')[1] + return rdata + + except Exception: + logging.error('Failed to execute : %s'%self.IPMI_PSU_FAN_SPEED.format(index)) + + + #Fetch FRU Data for given fruid + def get_psu_airflow(self, index): + if index == 1: + fru_id = 'FRU_PSUL' + else: + fru_id = 'FRU_PSUR' + + ret_status, ipmi_cmd_ret = commands.getstatusoutput(self.IPMI_FRU) + if ret_status: + logging.error('Failed to execute ipmitool: '+ self.IPMI_FRU) + + found_fru = False + for line in ipmi_cmd_ret.splitlines(): + if line.startswith('FRU Device Description') and fru_id in line.split(':')[1] : + found_fru = True + if found_fru and line.startswith(' Board Product '): + return ' B2F' if 'PS/IO' in line else ' F2B' + return '' + + # Read FRU info + def get_fru_info(self,fru_id,reg_name): + output = None + Found = False + try: + status, ipmi_fru_list = commands.getstatusoutput(self.IPMI_FRU_DATA.format(fru_id)) + if status == 0: + for item in ipmi_fru_list.split("\n"): + if reg_name == item.split(':')[0].strip(' '): + output = item.strip() + output = output.split(':')[1] + Found = True + break; + + if not Found: + logging.error('\nFailed to fetch: ' + reg_name + ' sensor ') + + return output + except Exception: + logging.error('Failed to execute:' + ipmi_fru_list) + + def get_num_psus(self): + """ + Retrieves the number of PSUs available on the device + :return: An integer, the number of PSUs available on the device + """ + Z9864F_MAX_PSUS = 2 + return Z9864F_MAX_PSUS + + def get_psu_status(self, index): + """ + Retrieves the oprational status of power supply unit (PSU) defined + by index + :param index: An integer, index of the PSU of which to query status + :return: Boolean, True if PSU is operating properly, False if PSU is\ + faulty + """ + psu_status = '0' + + if index == 1: + cmd_status, psu_status = commands.getstatusoutput(self.IPMI_PSU1_DATA) + elif index == 2: + cmd_status, psu_status = commands.getstatusoutput(self.IPMI_PSU2_DATA) + else: + logging.error("Invalid PSU number:" + index) + + if cmd_status: + logging.error('Failed to execute ipmitool') + + return (not int(psu_status, 16) > 1) + + def get_psu_presence(self, index): + """ + Retrieves the presence status of power supply unit (PSU) defined + by index + :param index: An integer, index of the PSU of which to query status + :return: Boolean, True if PSU is plugged, False if not + """ + psu_status = '0' + + if index == 1: + cmd_status, psu_status = commands.getstatusoutput(self.IPMI_PSU1_DATA) + elif index == 2: + cmd_status, psu_status = commands.getstatusoutput(self.IPMI_PSU2_DATA) + else: + logging.error("Invalid PSU number:" + index) + + if cmd_status: + logging.error('Failed to execute ipmitool') + + return (int(psu_status, 16) & 1) + + def get_output_voltage(self, index): + """ + Retrieves the ouput volatage in milli volts of a power supply unit (PSU) defined + by 1-based index + :param idx: An integer, 1-based index of the PSU of which to query o/p volatge + :return: A float, value of o/p voltage in Volts if PSU is good, else zero + """ + if index is None: + return 0.0 + psuvoltage=self.get_psu_vout(index) + return float(psuvoltage.strip()) + + def get_output_current(self, index): + """ + Retrieves the output current in milli amperes of a power supply unit (PSU) defined + by 1-based index + :param idx: An integer, 1-based index of the PSU of which to query o/p current + :return: A float, value of o/p current in Amps if PSU is good, else zero + """ + if index is None: + return 0.0 + psucurrent=self.get_psu_cout(index) + return float(psucurrent.strip()) + + def get_output_power(self, index): + """ + Retrieves the output power in micro watts of a power supply unit (PSU) defined + by 1-based index + :param index: An integer, 1-based index of the PSU of which to query o/p power + :return: An integer, value of o/p power in micro Watts if PSU is good, else zero + """ + if index is None: + return 0.0 + psupower=self.get_psu_pout(index) + return float(psupower.strip()) + + def get_fan_rpm(self, index, fan_idx): + """ + Retrieves the speed of fan, in rpm, denoted by 1-based of a power + supply unit (PSU) defined by 1-based index + :param idx: An integer, 1-based index of the PSU of which to query fan speed + :param fan_idx: An integer, 1-based index of the PSU-fan of which to query speed + :return: An integer, value of PSU-fan speed in rpm if PSU-fan is good, else zero + """ + if index is None: + return 0 + fanrpm=self.get_psu_fan_speed(index) + return int(fanrpm.strip()) + + def get_serial(self, index): + """ + Retrieves the serial number of a power supply unit (PSU) defined + by 1-based index + :param idx: An integer, 1-based index of the PSU of which to query serial number + :return: String, denoting serial number of the PSU unit + """ + if index is None: + return None + if index == 1: + fru_id = FRU_PSUL + else: + fru_id = FRU_PSUR + + return self.get_fru_info(fru_id,'Board Serial') + + def get_model(self, index): + """ + Retrieves the model number/name of a power supply unit (PSU) defined + by 1-based index + :param idx: An integer, 1-based index of the PSU of which to query model number + :return: String, denoting model number/name + """ + if index is None: + return None + if index == 1: + fru_id = FRU_PSUL + else: + fru_id = FRU_PSUR + + return self.get_fru_info(fru_id,'Board Part Number') + + def get_mfr_id(self, index): + """ + Retrieves the manufacturing id of a power supply unit (PSU) defined + by 1-based index + :param idx: An integer, 1-based index of the PSU of which to query mfr id + :return: String, denoting manufacturing id + """ + if index is None: + return None + if index == 1: + fru_id = FRU_PSUL + else: + fru_id = FRU_PSUR + + return self.get_fru_info(fru_id,'Board Mfg') + + def get_direction(self, index): + """ + Retrieves the airflow direction of a power supply unit (PSU) defined + by 1-based index + :param idx: An integer, 1-based index of the PSU of which to query airflow direction + :return: String, denoting the airflow direction + """ + if index is None: + return None + + direction=self.get_psu_airflow(index).strip() + if direction == 'B2F': + return "INTAKE" + elif direction == 'F2B': + return "EXHAUST" + else: + return None diff --git a/device/dell/x86_64-dell_z9864f-r0/plugins/sfputil.py b/device/dell/x86_64-dell_z9864f-r0/plugins/sfputil.py new file mode 100644 index 00000000000..15b274399a4 --- /dev/null +++ b/device/dell/x86_64-dell_z9864f-r0/plugins/sfputil.py @@ -0,0 +1,250 @@ +# sfputil.py +# +# Platform-specific SFP transceiver interface for SONiC +# + +try: + import struct + import sys + import getopt + import time + import select + import os + import logging + from sonic_sfp.sfputilbase import SfpUtilBase + from mmap import * + +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + +#from xcvrd +SFP_STATUS_REMOVED = '0' +SFP_STATUS_INSERTED = '1' + + + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + + PORT_START = 1 + PORT_END = 66 + PORTS_IN_BLOCK = 64 + + BASE_RES_PATH = "/sys/bus/pci/devices/0000:02:00.0/resource0" + + _port_to_eeprom_mapping = {} + + _global_port_pres_dict = {} + + @property + def port_start(self): + return self.PORT_START + + @property + def port_end(self): + return self.PORT_END + + @property + def qsfp_ports(self): + return range(self.PORT_START, self.PORTS_IN_BLOCK + 1) + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + def pci_mem_read(self, mm, offset): + mm.seek(offset) + read_data_stream = mm.read(4) + reg_val = struct.unpack('I', read_data_stream) + mem_val = str(reg_val)[1:-2] + # print "reg_val read:%x"%reg_val + return mem_val + + def pci_mem_write(self, mm, offset, data): + mm.seek(offset) + # print "data to write:%x"%data + mm.write(struct.pack('I', data)) + + def pci_set_value(self, resource, val, offset): + fd = os.open(resource, os.O_RDWR) + mm = mmap(fd, 0) + val = self.pci_mem_write(mm, offset, val) + mm.close() + os.close(fd) + return val + + def pci_get_value(self, resource, offset): + fd = os.open(resource, os.O_RDWR) + mm = mmap(fd, 0) + val = self.pci_mem_read(mm, offset) + mm.close() + os.close(fd) + return val + + def init_global_port_presence(self): + for port_num in range(self.port_start, (self.port_end + 1)): + presence = self.get_presence(port_num) + if(presence): + self._global_port_pres_dict[port_num] = '1' + else: + self._global_port_pres_dict[port_num] = '0' + + def mod_pres(self): + port_pres_mask =0 + for port_num in range(self.port_start, (self.port_end + 1)): + presence = self.get_presence(port_num) + if(presence): + self._global_port_pres_dict[port_num] = '1' + port_val = (1 << (port_num -1)) + port_pres_mask = (port_pres_mask | port_val) + else: + self._global_port_pres_dict[port_num] = '0' + port_val = ~(1 << (port_num -1)) + port_pres_mask = (port_pres_mask & port_val) + + return port_pres_mask + + + def __init__(self): + eeprom_path = "/sys/class/i2c-adapter/i2c-{0}/{0}-0050/eeprom" + + for x in range(self.port_start, self.port_end + 1): + self.port_to_eeprom_mapping[x] = eeprom_path.format(x+1) + self.init_global_port_presence() + SfpUtilBase.__init__(self) + + def get_presence(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + # Port offset starts with 0x4004 + port_offset = 16388 + ((port_num-1) * 16) + + status = self.pci_get_value(self.BASE_RES_PATH, port_offset) + reg_value = int(status) + + # Absence of status throws error + if (reg_value == ""): + return False + + # Mask off 4th bit for presence + mask = (1 << 4) + + # Mask off 1st bit for presence 33,34 + if (port_num > 64): + mask = (1 << 0) + + # ModPrsL is active low + if reg_value & mask == 0: + return True + + return False + + def get_low_power_mode(self, port_num): + + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + # Port offset starts with 0x4000 + port_offset = 16384 + ((port_num-1) * 16) + + status = self.pci_get_value(self.BASE_RES_PATH, port_offset) + reg_value = int(status) + + # Absence of status throws error + if (reg_value == ""): + return False + + # Mask off 4th bit for presence + mask = (1 << 6) + + # LPMode is active high + if reg_value & mask == 0: + return False + + return True + + def set_low_power_mode(self, port_num, lpmode): + + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + # Port offset starts with 0x4000 + port_offset = 16384 + ((port_num-1) * 16) + + status = self.pci_get_value(self.BASE_RES_PATH, port_offset) + reg_value = int(status) + + # Absence of status throws error + if (reg_value == ""): + return False + + # Mask off 4th bit for presence + mask = (1 << 6) + + # LPMode is active high; set or clear the bit accordingly + if lpmode is True: + reg_value = reg_value | mask + else: + reg_value = reg_value & ~mask + + # Convert our register value back to a hex string and write back + status = self.pci_set_value(self.BASE_RES_PATH, reg_value, port_offset) + + return True + + def reset(self, port_num): + + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + # Port offset starts with 0x4000 + port_offset = 16384 + ((port_num-1) * 16) + + status = self.pci_get_value(self.BASE_RES_PATH, port_offset) + reg_value = int(status) + + # Absence of status throws error + if (reg_value == ""): + return False + + # Mask off 4th bit for presence + mask = (1 << 6) + + # ResetL is active low + reg_value = reg_value & ~mask + + # Convert our register value back to a hex string and write back + status = self.pci_set_value(self.BASE_RES_PATH, reg_value, port_offset) + + # Sleep 1 second to allow it to settle + time.sleep(1) + + reg_value = reg_value | mask + + # Convert our register value back to a hex string and write back + status = self.pci_set_value(self.BASE_RES_PATH, reg_value, port_offset) + + return True + + def get_transceiver_change_event(self): + port_dict = {} + while True: + for port_num in range(self.port_start, (self.port_end + 1)): + presence = self.get_presence(port_num) + if(presence and self._global_port_pres_dict[port_num] == '0'): + self._global_port_pres_dict[port_num] = '1' + port_dict[port_num] = '1' + elif(not presence and + self._global_port_pres_dict[port_num] == '1'): + self._global_port_pres_dict[port_num] = '0' + port_dict[port_num] = '0' + + if(len(port_dict) > 0): + return True, port_dict + + time.sleep(0.5) diff --git a/device/dell/x86_64-dell_z9864f-r0/plugins/ssd_util.py b/device/dell/x86_64-dell_z9864f-r0/plugins/ssd_util.py new file mode 100644 index 00000000000..027749deabe --- /dev/null +++ b/device/dell/x86_64-dell_z9864f-r0/plugins/ssd_util.py @@ -0,0 +1,112 @@ +""" +ssd_util.py +Platform-specific nvme supported SSD interface for SONiC +""" + +from subprocess import Popen, PIPE, CalledProcessError +from re import findall +from os.path import exists +from sonic_platform_base.sonic_ssd.ssd_base import SsdBase + +NOT_AVAILABLE = "N/A" + + +class SsdUtil(SsdBase): + + def __init__(self, disk_dev): + """ + Constructor + Args: + disk_dev: Linux device name to get parameters for + """ + + disk_dev = "/dev/nvme0" + super().__init__(disk_dev) + if not isinstance(disk_dev, str): + raise TypeError("disk dev type wrong {}".format(type(disk_dev))) + + if not exists(disk_dev): + raise RuntimeError("disk dev {} not found".format(disk_dev)) + + self.model = NOT_AVAILABLE + self.serial = NOT_AVAILABLE + self.firmware = NOT_AVAILABLE + self.temperature = NOT_AVAILABLE + self.health = NOT_AVAILABLE + + inno_disk = ["smartctl", "-a", disk_dev] + self.ssd_info = self._execute_shell(inno_disk) + + self.model = self._parse_re(r'Model Number:\s*(.+?)\n', self.ssd_info) + self.serial = self._parse_re(r'Serial Number:\s*(.+?)\n', self.ssd_info) + self.firmware = self._parse_re(r'Firmware Version:\s*(.+?)\n', self.ssd_info) + temp_temperature = self._parse_re(r'Temperature:\s*(.+?)\n', self.ssd_info) + self.temperature = self._parse_re(r"^([\S]+)", temp_temperature) + temp_health = self._parse_re(r'Percentage Used:\s*(.+?)\n', self.ssd_info) + self.health = (100 - int(float(temp_health.replace("%", "")))) + + @staticmethod + def _execute_shell(cmd): + try: + output = "" + process = Popen(cmd, universal_newlines=True, stdout=PIPE) + output, _ = process.communicate() + except CalledProcessError as err: + print("Exception when calling smartctl -> %s\n" %(err)) + pass + return output + + @staticmethod + def _parse_re(pattern, buffer): + res_list = findall(pattern, buffer) + return res_list[0] if res_list else NOT_AVAILABLE + + def get_health(self): + """ + Retrieves current disk health in percentages + Returns: + A float number of current ssd health + e.g. 83.5 + """ + return self.health + + def get_temperature(self): + """ + Retrieves current disk temperature in Celsius + Returns: + A float number of current temperature in Celsius + e.g. 40.1 + """ + return self.temperature + + def get_model(self): + """ + Retrieves model for the given disk device + Returns: + A string holding disk model as provided by the manufacturer + """ + return self.model + + def get_firmware(self): + """ + Retrieves firmware version for the given disk device + Returns: + A string holding disk firmware version as provided by the manufacturer + """ + return self.firmware + + def get_serial(self): + """ + Retrieves serial number for the given disk device + Returns: + A string holding disk serial number as provided by the manufacturer + """ + return self.serial + + def get_vendor_output(self): + """ + Retrieves vendor specific data for the given disk device + Returns: + A string holding some vendor specific disk information + """ + return self.ssd_info diff --git a/device/dell/x86_64-dell_z9864f-r0/pmon_daemon_control.json b/device/dell/x86_64-dell_z9864f-r0/pmon_daemon_control.json new file mode 100644 index 00000000000..0c42f485aca --- /dev/null +++ b/device/dell/x86_64-dell_z9864f-r0/pmon_daemon_control.json @@ -0,0 +1,4 @@ +{ + "skip_ledd": true, + "start_ipmievd": true +} diff --git a/device/dell/x86_64-dell_z9864f-r0/port-locator.bin b/device/dell/x86_64-dell_z9864f-r0/port-locator.bin new file mode 100755 index 00000000000..8d7b3d77b94 Binary files /dev/null and b/device/dell/x86_64-dell_z9864f-r0/port-locator.bin differ diff --git a/device/dell/x86_64-dell_z9864f-r0/port_power_threshold.json b/device/dell/x86_64-dell_z9864f-r0/port_power_threshold.json new file mode 100644 index 00000000000..45a935ed921 --- /dev/null +++ b/device/dell/x86_64-dell_z9864f-r0/port_power_threshold.json @@ -0,0 +1,402 @@ +{ + "normal_airflow": { + "1": { + "max_power_alarm": "20" + }, + "2": { + "max_power_alarm": "19" + }, + "3": { + "max_power_alarm": "20" + }, + "4": { + "max_power_alarm": "19" + }, + "5": { + "max_power_alarm": "20" + }, + "6": { + "max_power_alarm": "19" + }, + "7": { + "max_power_alarm": "20" + }, + "8": { + "max_power_alarm": "19" + }, + "9": { + "max_power_alarm": "20" + }, + "10": { + "max_power_alarm": "19" + }, + "11": { + "max_power_alarm": "20" + }, + "12": { + "max_power_alarm": "19" + }, + "13": { + "max_power_alarm": "20" + }, + "14": { + "max_power_alarm": "19" + }, + "15": { + "max_power_alarm": "20" + }, + "16": { + "max_power_alarm": "19" + }, + "17": { + "max_power_alarm": "20" + }, + "18": { + "max_power_alarm": "19" + }, + "19": { + "max_power_alarm": "20" + }, + "20": { + "max_power_alarm": "19" + }, + "21": { + "max_power_alarm": "20" + }, + "22": { + "max_power_alarm": "19" + }, + "23": { + "max_power_alarm": "20" + }, + "24": { + "max_power_alarm": "19" + }, + "25": { + "max_power_alarm": "20" + }, + "26": { + "max_power_alarm": "19" + }, + "27": { + "max_power_alarm": "20" + }, + "28": { + "max_power_alarm": "19" + }, + "29": { + "max_power_alarm": "20" + }, + "30": { + "max_power_alarm": "19" + }, + "31": { + "max_power_alarm": "20" + }, + "32": { + "max_power_alarm": "19" + }, + "33": { + "max_power_alarm": "19" + }, + "34": { + "max_power_alarm": "20" + }, + "35": { + "max_power_alarm": "19" + }, + "36": { + "max_power_alarm": "20" + }, + "37": { + "max_power_alarm": "19" + }, + "38": { + "max_power_alarm": "20" + }, + "39": { + "max_power_alarm": "19" + }, + "40": { + "max_power_alarm": "20" + }, + "41": { + "max_power_alarm": "19" + }, + "42": { + "max_power_alarm": "20" + }, + "43": { + "max_power_alarm": "19" + }, + "44": { + "max_power_alarm": "20" + }, + "45": { + "max_power_alarm": "19" + }, + "46": { + "max_power_alarm": "20" + }, + "47": { + "max_power_alarm": "19" + }, + "48": { + "max_power_alarm": "20" + }, + "49": { + "max_power_alarm": "19" + }, + "50": { + "max_power_alarm": "20" + }, + "51": { + "max_power_alarm": "19" + }, + "52": { + "max_power_alarm": "20" + }, + "53": { + "max_power_alarm": "19" + }, + "54": { + "max_power_alarm": "20" + }, + "55": { + "max_power_alarm": "19" + }, + "56": { + "max_power_alarm": "20" + }, + "57": { + "max_power_alarm": "19" + }, + "58": { + "max_power_alarm": "20" + }, + "59": { + "max_power_alarm": "19" + }, + "60": { + "max_power_alarm": "20" + }, + "61": { + "max_power_alarm": "19" + }, + "62": { + "max_power_alarm": "20" + }, + "63": { + "max_power_alarm": "19" + }, + "64": { + "max_power_alarm": "20" + }, + "65": { + "max_power_alarm": "10" + }, + "66": { + "max_power_alarm": "10" + } + }, + "reverse_airflow": { + "1": { + "max_power_alarm": "12" + }, + "2": { + "max_power_alarm": "11" + }, + "3": { + "max_power_alarm": "12" + }, + "4": { + "max_power_alarm": "11" + }, + "5": { + "max_power_alarm": "12" + }, + "6": { + "max_power_alarm": "11" + }, + "7": { + "max_power_alarm": "12" + }, + "8": { + "max_power_alarm": "11" + }, + "9": { + "max_power_alarm": "12" + }, + "10": { + "max_power_alarm": "11" + }, + "11": { + "max_power_alarm": "10" + }, + "12": { + "max_power_alarm": "9" + }, + "13": { + "max_power_alarm": "7" + }, + "14": { + "max_power_alarm": "6" + }, + "15": { + "max_power_alarm": "7" + }, + "16": { + "max_power_alarm": "6" + }, + "17": { + "max_power_alarm": "7" + }, + "18": { + "max_power_alarm": "6" + }, + "19": { + "max_power_alarm": "7" + }, + "20": { + "max_power_alarm": "6" + }, + "21": { + "max_power_alarm": "10" + }, + "22": { + "max_power_alarm": "9" + }, + "23": { + "max_power_alarm": "12" + }, + "24": { + "max_power_alarm": "11" + }, + "25": { + "max_power_alarm": "12" + }, + "26": { + "max_power_alarm": "11" + }, + "27": { + "max_power_alarm": "12" + }, + "28": { + "max_power_alarm": "11" + }, + "29": { + "max_power_alarm": "12" + }, + "30": { + "max_power_alarm": "11" + }, + "31": { + "max_power_alarm": "12" + }, + "32": { + "max_power_alarm": "11" + }, + "33": { + "max_power_alarm": "18" + }, + "34": { + "max_power_alarm": "19" + }, + "35": { + "max_power_alarm": "18" + }, + "36": { + "max_power_alarm": "19" + }, + "37": { + "max_power_alarm": "18" + }, + "38": { + "max_power_alarm": "19" + }, + "39": { + "max_power_alarm": "18" + }, + "40": { + "max_power_alarm": "19" + }, + "41": { + "max_power_alarm": "18" + }, + "42": { + "max_power_alarm": "19" + }, + "43": { + "max_power_alarm": "18" + }, + "44": { + "max_power_alarm": "19" + }, + "45": { + "max_power_alarm": "18" + }, + "46": { + "max_power_alarm": "19" + }, + "47": { + "max_power_alarm": "18" + }, + "48": { + "max_power_alarm": "19" + }, + "49": { + "max_power_alarm": "18" + }, + "50": { + "max_power_alarm": "19" + }, + "51": { + "max_power_alarm": "18" + }, + "52": { + "max_power_alarm": "19" + }, + "53": { + "max_power_alarm": "18" + }, + "54": { + "max_power_alarm": "19" + }, + "55": { + "max_power_alarm": "18" + }, + "56": { + "max_power_alarm": "19" + }, + "57": { + "max_power_alarm": "18" + }, + "58": { + "max_power_alarm": "19" + }, + "59": { + "max_power_alarm": "18" + }, + "60": { + "max_power_alarm": "19" + }, + "61": { + "max_power_alarm": "18" + }, + "62": { + "max_power_alarm": "19" + }, + "63": { + "max_power_alarm": "18" + }, + "64": { + "max_power_alarm": "19" + }, + "65": { + "max_power_alarm": "10" + }, + "66": { + "max_power_alarm": "10" + } + } +} diff --git a/device/dell/x86_64-dell_z9864f-r0/warm-reboot.conf b/device/dell/x86_64-dell_z9864f-r0/warm-reboot.conf new file mode 100644 index 00000000000..389f44a4c95 --- /dev/null +++ b/device/dell/x86_64-dell_z9864f-r0/warm-reboot.conf @@ -0,0 +1 @@ +WARM_REBOOT_SUPPORT=0 diff --git a/device/marvell/x86_64-marvell_common/platform_asic b/device/marvell/x86_64-marvell_common/platform_asic new file mode 100644 index 00000000000..a657472d7ad --- /dev/null +++ b/device/marvell/x86_64-marvell_common/platform_asic @@ -0,0 +1 @@ +marvell-teralynx diff --git a/device/marvell/x86_64-marvell_common/tl_0x1b58/config_teralynx_low.yaml b/device/marvell/x86_64-marvell_common/tl_0x1b58/config_teralynx_low.yaml new file mode 100644 index 00000000000..05d897bd38a --- /dev/null +++ b/device/marvell/x86_64-marvell_common/tl_0x1b58/config_teralynx_low.yaml @@ -0,0 +1,69 @@ +ifcs: + options: + log_level: "warn" +nodes: +- node_id: "0" + options: + sd_low_power_mode_global_default: "true" + sku: "configs/sku/teralynx.yaml" + netdev: + - auto_create: "no" + multi_interface: "yes" + buffer_management_mode: "api_driven" + pt01: "896" + max_lossless_tc: "2" + ilpm_enable: "1" + forward_profile: "IFCS_FORWARD_PROFILE_ID_PROFILE_E" + ecmp_hierarchical_enable: "1" + multicast_lag_resolution_enable: "1" + led_cfg_sck_rate: "0x5" + led_refresh_precliff_timer: "0x18eec2" + led_refresh_cliff_timer: "0x15e" + led_cfg_pic_stream_mode: "1" + led_refresh_tmr_ctl_enable: "1" + bfd_config: + - offload_enable: "true" + txring: + - txring_id: "0" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "1" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "2" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "3" + desc_count: "1024" + prio: "1" + netdev: "true" + rxring: + - rxring_id: "0" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "0, 3, 6, 9, 12, 15, 18, 21, 24, 27, 30, 33, 36, 39" + - rxring_id: "1" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "1, 4, 7, 10, 13, 16, 19, 22, 25, 28, 31, 34, 37, 40" + - rxring_id: "2" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "2, 5, 11, 14, 17, 20, 23, 26, 29, 32, 35, 38, 41, 47" + - rxring_id: "3" + desc_count: "1024" + prio: "1" + queues: "42, 43, 44, 45, 46" + - rxring_id: "4" + desc_count: "1024" + prio: "1" + queues: "8" + sys_clk: "1720" + ifc_clk: "1200" + mac_clk: "1340" diff --git a/device/marvell/x86_64-marvell_common/tl_0x1b58/ivm.sai.config_high.yaml b/device/marvell/x86_64-marvell_common/tl_0x1b58/ivm.sai.config_high.yaml new file mode 100644 index 00000000000..89fc7635b02 --- /dev/null +++ b/device/marvell/x86_64-marvell_common/tl_0x1b58/ivm.sai.config_high.yaml @@ -0,0 +1,3 @@ +IFCS_INIT_FILE : "/tmp/sdk_config/config_teralynx.yaml" +IFCS_SKU_FILE : "/tmp/sdk_config/teralynx.yaml" +IVM_SAI_DATAPATH_CONFIG_FILE: "/tmp/sdk_config/ivm.sai.datapath.config.yaml" \ No newline at end of file diff --git a/device/marvell/x86_64-marvell_common/tl_0x1b58/ivm.sai.config_low.yaml b/device/marvell/x86_64-marvell_common/tl_0x1b58/ivm.sai.config_low.yaml new file mode 100644 index 00000000000..196e2a1e4a3 --- /dev/null +++ b/device/marvell/x86_64-marvell_common/tl_0x1b58/ivm.sai.config_low.yaml @@ -0,0 +1,6 @@ +IFCS_INNO_CLI_PORT : "9999" +IFCS_TARGET : "device" +INNOVIUM_DIR : "/innovium" +PYTHONPATH : "$INNOVIUM_DIR:$INNOVIUM_DIR/cmds:$INNOVIUM_DIR/scripts:$INNOVIUM_DIR/test/:$INNOVIUM_DIR/test/utils:$INNOVIUM_DIR/utils:$INNOVIUM_DIR/pyctypes:$INNOVIUM_DIR/ifcs_cmds:$INNOVIUM_DIR/testutil" +IVM_SAI_PARAM_A0016: "1, 1, 0, 0, 1" +IVM_SAI_PARAM_A0059: "TRUE" diff --git a/device/marvell/x86_64-marvell_common/tl_0x1b58/ivm.sai.datapath.config_low.yaml b/device/marvell/x86_64-marvell_common/tl_0x1b58/ivm.sai.datapath.config_low.yaml new file mode 100644 index 00000000000..891b0b3e283 --- /dev/null +++ b/device/marvell/x86_64-marvell_common/tl_0x1b58/ivm.sai.datapath.config_low.yaml @@ -0,0 +1,9 @@ +ISAI_PARAM_P0_0_LS : "4608 4608 4608 4608 2880 2880" +ISAI_PARAM_P0_1_LS : "2226 1946 1946 1890 1218 1218" +ISAI_PARAM_P0_1_ALS : "434 154 154 98 98 98" +ISAI_PARAM_P1_0_LS : "1536 1536 1536 1536 960 960" +ISAI_PARAM_P1_0_LL : "3072 3072 3072 3072 1920 1920" +ISAI_PARAM_P1_1_LS : "1778 1498 1498 1442 938 938" +ISAI_PARAM_P1_1_LL : "2478 2478 2478 2478 2478 2478" +ISAI_PARAM_P1_1_ALS : "434 154 154 98 98 98" +ISAI_PARAM_P1_1_ALL : "126 126 126 126 126 126" diff --git a/device/marvell/x86_64-marvell_common/tl_0x1b58/teralynx_low.yaml b/device/marvell/x86_64-marvell_common/tl_0x1b58/teralynx_low.yaml new file mode 100644 index 00000000000..ae4d463fe95 --- /dev/null +++ b/device/marvell/x86_64-marvell_common/tl_0x1b58/teralynx_low.yaml @@ -0,0 +1,61 @@ +sku: teralynx + +device_id: 0x1b58 + +# Hardware constraint information +hardware: + num_ibs: 6 + ib_active: 0,1,2,3,4,5 + + ports_per_ib: 32, 32, 32, 32, 20, 20 + recirc_port_num: 32, 32, 32, 32, 32, 32 + cpu_port_num: 33 + cpu_port_ib: 0 + mgmt_port_num: 33 + mgmt_port_ibs: 1,2 + + pics_per_ib: 6, 7, 6, 5, 5, 5 + pic_ports_per_pic: 8 + max_serdes_speed: 50 + + num_shared_pics: 2 + + isg [0-4]: + ib: 0 + pic_id: "[0-4]" + + isg [5-9]: + ib: 5 + pic_id: "[0-4]" + + isg [10-14]: + ib: 1 + pic_id: "[0-4]" + + isg [16-20]: + ib: 3 + pic_id: "[0-4]" + + isg [21-25]: + ib: 4 + pic_id: "[0-4]" + + isg [26-30]: + ib: 2 + pic_id: "[0-4]" + + isg 15: + mode: "8:0" + ib: 1 + pic_id: 5 + + isg 31: + mode: "8:0" + ib: 0 + pic_id: 5 + + isg 32: + mode: "1:1" + ib: 1, 2 + pic_id: 6 + diff --git a/device/marvell/x86_64-marvell_common/tl_0x6000/config_teralynx_low.yaml b/device/marvell/x86_64-marvell_common/tl_0x6000/config_teralynx_low.yaml new file mode 100644 index 00000000000..e8f0c6907cb --- /dev/null +++ b/device/marvell/x86_64-marvell_common/tl_0x6000/config_teralynx_low.yaml @@ -0,0 +1,63 @@ +ifcs: + options: + log_level: "warn" +nodes: +- node_id: "0" + options: + sku: "configs/sku/teralynx.yaml" + netdev: + - auto_create: "no" + multi_interface: "yes" + buffer_management_mode: "api_driven" + pt01: "896" + wred_cr_ip_proto_list: "17" + cr_assignment_mode: "1" + max_lossless_tc: "2" + forward_profile: "IFCS_FORWARD_PROFILE_ID_PROFILE_E" + ecmp_hierarchical_enable: "1" + multicast_lag_resolution_enable: "1" + skip_pll_check: "false" + sys_clk: "1800" + ifc_clk: "1800" + mac_clk: "1600" + ecmp_alb_enable: "1" + alb_port_state_enable: "1" + ecmp_alb_timeout_step_size: "2" + txring: + - txring_id: "0" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "1" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "2" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "3" + desc_count: "1024" + prio: "1" + netdev: "true" + rxring: + - rxring_id: "0" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "0, 4, 8, 12, 16, 20, 24, 28, 32, 36, 40, 44" + - rxring_id: "1" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "1, 5, 9, 13, 17, 21, 25, 29, 33, 37, 41, 45" + - rxring_id: "2" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "2, 6, 10, 14, 18, 22, 26, 30, 34, 38, 42, 46" + - rxring_id: "3" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "3, 7, 11, 15, 19, 23, 27, 31, 35, 39, 43, 47" diff --git a/device/marvell/x86_64-marvell_common/tl_0x6000/ivm.sai.config_high.yaml b/device/marvell/x86_64-marvell_common/tl_0x6000/ivm.sai.config_high.yaml new file mode 100644 index 00000000000..0f82d046dd6 --- /dev/null +++ b/device/marvell/x86_64-marvell_common/tl_0x6000/ivm.sai.config_high.yaml @@ -0,0 +1,3 @@ +IFCS_INIT_FILE : "/tmp/sdk_config/config_teralynx.yaml" +IFCS_SKU_FILE : "/tmp/sdk_config/teralynx.yaml" +IVM_SAI_DATAPATH_CONFIG_FILE: "/tmp/sdk_config/ivm.sai.datapath.config.yaml" diff --git a/device/marvell/x86_64-marvell_common/tl_0x6000/ivm.sai.config_low.yaml b/device/marvell/x86_64-marvell_common/tl_0x6000/ivm.sai.config_low.yaml new file mode 100644 index 00000000000..cadaee7141d --- /dev/null +++ b/device/marvell/x86_64-marvell_common/tl_0x6000/ivm.sai.config_low.yaml @@ -0,0 +1,6 @@ +IFCS_INNO_CLI_PORT : "9999" +IFCS_TARGET : "device" +INNOVIUM_DIR : "/innovium" +PYTHONPATH : "$INNOVIUM_DIR:$INNOVIUM_DIR/cmds:$INNOVIUM_DIR/scripts:$INNOVIUM_DIR/test/:$INNOVIUM_DIR/test/utils:$INNOVIUM_DIR/utils:$INNOVIUM_DIR/pyctypes:$INNOVIUM_DIR/ifcs_cmds:$INNOVIUM_DIR/testutil" +IVM_SAI_PARAM_A0016: "1,1,0,0,1" +IVM_SAI_PARAM_A0059: "TRUE" diff --git a/device/marvell/x86_64-marvell_common/tl_0x6000/ivm.sai.datapath.config_low.yaml b/device/marvell/x86_64-marvell_common/tl_0x6000/ivm.sai.datapath.config_low.yaml new file mode 100644 index 00000000000..5a57a132a27 --- /dev/null +++ b/device/marvell/x86_64-marvell_common/tl_0x6000/ivm.sai.datapath.config_low.yaml @@ -0,0 +1,10 @@ +ISAI_PARAM_A000 : "0" +ISAI_PARAM_P0_0_LS : "2304 2304 2304 2304 2304 2304 2304 2304" +ISAI_PARAM_P0_1_LS : "1736 1616 1616 1592 1592 1592 1592 1592" +ISAI_PARAM_P0_1_ALS : "200 80 80 56 56 56 56 56" +ISAI_PARAM_P1_0_LS : "768 768 768 768 768 768 768 768" +ISAI_PARAM_P1_0_LL : "1536 1536 1536 1536 1536 1536 1536 1536" +ISAI_PARAM_P1_1_LS : "1352 1232 1232 1208 1208 1208 1208 1208" +ISAI_PARAM_P1_1_LL : "3138 3138 3138 3138 3138 3138 3138 3138" +ISAI_PARAM_P1_1_ALS : "200 80 80 56 56 56 56 56" +ISAI_PARAM_P1_1_ALL : "86 86 86 86 86 86 86 86" diff --git a/device/marvell/x86_64-marvell_common/tl_0x6000/teralynx_low.yaml b/device/marvell/x86_64-marvell_common/tl_0x6000/teralynx_low.yaml new file mode 100644 index 00000000000..731f60a09e8 --- /dev/null +++ b/device/marvell/x86_64-marvell_common/tl_0x6000/teralynx_low.yaml @@ -0,0 +1,170 @@ +sku: teralynx + +device_id: 0x6000 + +# Hardware constraint information +hardware: + num_ibs: 8 + ib_active: 0,1,2,3,4,5,6,7 + + ports_per_ib: 66, 66, 66, 66, 66, 66, 66, 66 + recirc_port_num: 64, 64, 64, 64, 64, 64, 64, 64 + cpu_port_num: 65 + cpu_port_ib: 0 + mgmt_port_num: 65, 65 + mgmt_port_ibs: 1,2 + + pics_per_ib: 8, 9, 9, 8, 8, 8, 8, 8 + pic_ports_per_pic: 8 + max_serdes_speed: 100 + + num_shared_pics: 0 + + isg [0-7]: + ib: 0 + pic_id: "[0-7]" + + isg [8-15]: + ib: 4 + pic_id: "[0-7]" + + isg 16: + ib: 6 + pic_id: 7 + + isg 17: + ib: 6 + pic_id: 6 + + isg 18: + ib: 6 + pic_id: 5 + + isg 19: + ib: 6 + pic_id: 4 + + isg 20: + ib: 6 + pic_id: 3 + + isg 21: + ib: 6 + pic_id: 2 + + isg 22: + ib: 6 + pic_id: 1 + + isg 23: + ib: 6 + pic_id: 0 + + isg 24: + ib: 2 + pic_id: 7 + + isg 25: + ib: 2 + pic_id: 6 + + isg 26: + ib: 2 + pic_id: 5 + + isg 27: + ib: 2 + pic_id: 4 + + isg 28: + ib: 2 + pic_id: 3 + + isg 29: + ib: 2 + pic_id: 2 + + isg 30: + ib: 2 + pic_id: 1 + + isg 31: + ib: 2 + pic_id: 0 + + isg [32-39]: + ib: 3 + pic_id: "[0-7]" + + isg [40-47]: + ib: 7 + pic_id: "[0-7]" + + isg 48: + ib: 5 + pic_id: 7 + + isg 49: + ib: 5 + pic_id: 6 + + isg 50: + ib: 5 + pic_id: 5 + + isg 51: + ib: 5 + pic_id: 4 + + isg 52: + ib: 5 + pic_id: 3 + + isg 53: + ib: 5 + pic_id: 2 + + isg 54: + ib: 5 + pic_id: 1 + + isg 55: + ib: 5 + pic_id: 0 + + isg 56: + ib: 1 + pic_id: 7 + + isg 57: + ib: 1 + pic_id: 6 + + isg 58: + ib: 1 + pic_id: 5 + + isg 59: + ib: 1 + pic_id: 4 + + isg 60: + ib: 1 + pic_id: 3 + + isg 61: + ib: 1 + pic_id: 2 + + isg 62: + ib: 1 + pic_id: 1 + + isg 63: + ib: 1 + pic_id: 0 + + isg 64: + mode: "1:1" + ib: 1, 2 + pic_id: 8 diff --git a/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_128x400G-2x10G/buffers.json.j2 b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_128x400G-2x10G/buffers.json.j2 new file mode 100755 index 00000000000..3952ba88deb --- /dev/null +++ b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_128x400G-2x10G/buffers.json.j2 @@ -0,0 +1,3 @@ +{%- set default_topo = default_topo | default('t1', true) %} +{%- include 'buffers_config.j2' %} + diff --git a/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_128x400G-2x10G/buffers_defaults_def_lossy.j2 b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_128x400G-2x10G/buffers_defaults_def_lossy.j2 new file mode 100755 index 00000000000..df3a836c6cf --- /dev/null +++ b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_128x400G-2x10G/buffers_defaults_def_lossy.j2 @@ -0,0 +1,51 @@ +{%- set default_cable = '40m' %} + +{# BUFFER_POOL, BUFFER_PROFILE #} +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "lossy_pool": { + "size": "182386688", + "type": "egress", + "mode": "dynamic", + "xoff": "0" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"lossy_pool", + "size":"0", + "static_th":"22798336" + }, + "egress_lossy_profile": { + "pool":"lossy_pool", + "size":"1518", + "dynamic_th":"2" + } + }, +{%- endmacro %} + + +{# BUFFER_PG #} +{%- macro generate_pg_profils(port_names_active) %} + "BUFFER_PG": { +{% for port in port_names_active.split(',') %} + "{{ port }}|0-7": { + "profile" : "ingress_lossy_profile" + }{% if not loop.last %},{% endif %} + +{% endfor %} + }, +{%- endmacro %} + + +{# BUFFER_QUEUE #} +{%- macro generate_queue_buffers(port_names_active) %} + "BUFFER_QUEUE": { +{% for port in port_names_active.split(',') %} + "{{ port }}|0-7": { + "profile" : "egress_lossy_profile" + }{% if not loop.last %},{% endif %} + +{% endfor %} + } +{%- endmacro %} diff --git a/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_128x400G-2x10G/buffers_defaults_t0.j2 b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_128x400G-2x10G/buffers_defaults_t0.j2 new file mode 100755 index 00000000000..59524186cb8 --- /dev/null +++ b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_128x400G-2x10G/buffers_defaults_t0.j2 @@ -0,0 +1,120 @@ +{%- set default_cable = '40m' %} + +{%- macro generate_service_port_list(PORT_SERVICE) -%} + {%- if PORT_SERVICE.append("Ethernet512") %}{% endif %} + {%- if PORT_SERVICE.append("Ethernet513") %}{% endif %} +{%- endmacro %} + +{%- set PORT_SERVICE = [] %} +{%- if generate_service_port_list is defined %} + {%- if generate_service_port_list(PORT_SERVICE) %}{% endif %} +{%- endif %} + +{# BUFFER_POOL, BUFFER_PROFILE #} +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "158630302", + "type": "ingress", + "mode": "dynamic", + "xoff": "71577600" + }, + "lossy_pool": { + "size": "56012386", + "type": "egress", + "mode": "dynamic", + "xoff": "0" + }, + "egress_lossless_pool": { + "size": "214642688", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossless_profile": { + "pool":"ingress_lossless_pool", + "xoff":"135520", + "size":"1518", + "dynamic_th":"1", + "xon_offset":"9408" + }, + "egress_lossless_profile": { + "pool":"ingress_lossless_pool", + "size":"0", + "static_th":"22798336" + }, + "ingress_lossy_profile": { + "pool":"lossy_pool", + "size":"0", + "static_th":"22798336" + }, + "egress_lossy_profile": { + "pool":"lossy_pool", + "size":"1518", + "dynamic_th":"2" + } + }, +{%- endmacro %} + +{# BUFFER_PG #} +{%- macro generate_pg_profils(port_names_active) %} + "BUFFER_PG": { +{% for port in port_names_active.split(',') %} +{% if port in PORT_SERVICE %} + "{{ port }}|3-4": { + "profile" : "ingress_lossy_profile" + }, +{% else %} + "{{ port }}|3-4": { + "profile" : "ingress_lossless_profile" + }, +{% endif %} +{% endfor %} +{% for port in port_names_active.split(',') %} + "{{ port }}|0": { + "profile" : "ingress_lossy_profile" + }, +{% endfor %} +{% for port in port_names_active.split(',') %} + "{{ port }}|1-2": { + "profile" : "ingress_lossy_profile" + }, +{% endfor %} +{% for port in port_names_active.split(',') %} + "{{ port }}|5-7": { + "profile" : "ingress_lossy_profile" + }{% if not loop.last %},{% endif %} + +{% endfor %} + }, +{%- endmacro %} + +{# BUFFER_QUEUE #} +{%- macro generate_queue_buffers(port_names_active) %} + "BUFFER_QUEUE": { +{% for port in port_names_active.split(',') %} +{% if port in PORT_SERVICE %} + "{{ port }}|3-4": { + "profile" : "egress_lossy_profile" + }, +{% else %} + "{{ port }}|3-4": { + "profile" : "egress_lossless_profile" + }, +{% endif %} +{% endfor %} +{% for port in port_names_active.split(',') %} + "{{ port }}|0-2": { + "profile" : "egress_lossy_profile" + }, +{% endfor %} +{% for port in port_names_active.split(',') %} + "{{ port }}|5-7": { + "profile" : "egress_lossy_profile" + }{% if not loop.last %},{% endif %} + +{% endfor %} + } +{%- endmacro %} + diff --git a/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_128x400G-2x10G/buffers_defaults_t1.j2 b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_128x400G-2x10G/buffers_defaults_t1.j2 new file mode 100755 index 00000000000..59524186cb8 --- /dev/null +++ b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_128x400G-2x10G/buffers_defaults_t1.j2 @@ -0,0 +1,120 @@ +{%- set default_cable = '40m' %} + +{%- macro generate_service_port_list(PORT_SERVICE) -%} + {%- if PORT_SERVICE.append("Ethernet512") %}{% endif %} + {%- if PORT_SERVICE.append("Ethernet513") %}{% endif %} +{%- endmacro %} + +{%- set PORT_SERVICE = [] %} +{%- if generate_service_port_list is defined %} + {%- if generate_service_port_list(PORT_SERVICE) %}{% endif %} +{%- endif %} + +{# BUFFER_POOL, BUFFER_PROFILE #} +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "158630302", + "type": "ingress", + "mode": "dynamic", + "xoff": "71577600" + }, + "lossy_pool": { + "size": "56012386", + "type": "egress", + "mode": "dynamic", + "xoff": "0" + }, + "egress_lossless_pool": { + "size": "214642688", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossless_profile": { + "pool":"ingress_lossless_pool", + "xoff":"135520", + "size":"1518", + "dynamic_th":"1", + "xon_offset":"9408" + }, + "egress_lossless_profile": { + "pool":"ingress_lossless_pool", + "size":"0", + "static_th":"22798336" + }, + "ingress_lossy_profile": { + "pool":"lossy_pool", + "size":"0", + "static_th":"22798336" + }, + "egress_lossy_profile": { + "pool":"lossy_pool", + "size":"1518", + "dynamic_th":"2" + } + }, +{%- endmacro %} + +{# BUFFER_PG #} +{%- macro generate_pg_profils(port_names_active) %} + "BUFFER_PG": { +{% for port in port_names_active.split(',') %} +{% if port in PORT_SERVICE %} + "{{ port }}|3-4": { + "profile" : "ingress_lossy_profile" + }, +{% else %} + "{{ port }}|3-4": { + "profile" : "ingress_lossless_profile" + }, +{% endif %} +{% endfor %} +{% for port in port_names_active.split(',') %} + "{{ port }}|0": { + "profile" : "ingress_lossy_profile" + }, +{% endfor %} +{% for port in port_names_active.split(',') %} + "{{ port }}|1-2": { + "profile" : "ingress_lossy_profile" + }, +{% endfor %} +{% for port in port_names_active.split(',') %} + "{{ port }}|5-7": { + "profile" : "ingress_lossy_profile" + }{% if not loop.last %},{% endif %} + +{% endfor %} + }, +{%- endmacro %} + +{# BUFFER_QUEUE #} +{%- macro generate_queue_buffers(port_names_active) %} + "BUFFER_QUEUE": { +{% for port in port_names_active.split(',') %} +{% if port in PORT_SERVICE %} + "{{ port }}|3-4": { + "profile" : "egress_lossy_profile" + }, +{% else %} + "{{ port }}|3-4": { + "profile" : "egress_lossless_profile" + }, +{% endif %} +{% endfor %} +{% for port in port_names_active.split(',') %} + "{{ port }}|0-2": { + "profile" : "egress_lossy_profile" + }, +{% endfor %} +{% for port in port_names_active.split(',') %} + "{{ port }}|5-7": { + "profile" : "egress_lossy_profile" + }{% if not loop.last %},{% endif %} + +{% endfor %} + } +{%- endmacro %} + diff --git a/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_128x400G-2x10G/config_tl10_d64p512t_128x400G-2x10G.yaml b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_128x400G-2x10G/config_tl10_d64p512t_128x400G-2x10G.yaml new file mode 100644 index 00000000000..cecef76f3a4 --- /dev/null +++ b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_128x400G-2x10G/config_tl10_d64p512t_128x400G-2x10G.yaml @@ -0,0 +1,1274 @@ +ifcs: + options: + log_level: "warn" +nodes: +- node_id: "0" + options: + sku: "configs/sku/teralynx.MVTX9180" + netdev: + - auto_create: "no" + multi_interface: "yes" + buffer_management_mode: "api_driven" + pt01: "896" + wred_cr_ip_proto_list: "17" + cr_assignment_mode: "1" + max_lossless_tc: "2" + ilpm_enable: "1" + forward_profile: "IFCS_FORWARD_PROFILE_ID_PROFILE_E" + ecmp_hierarchical_enable: "1" + intf_outer_l2_term_mode: "loose" + multicast_lag_resolution_enable: "1" + skip_pll_check: "false" + sys_clk: "1800" + ifc_clk: "1800" + mac_clk: "1600" + ecmp_alb_enable: "1" + alb_port_state_enable: "1" + ecmp_alb_timeout_step_size: "2" + bfd_config: + - offload_enable: "true" + txring: + - txring_id: "0" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "1" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "2" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "3" + desc_count: "1024" + prio: "1" + netdev: "true" + rxring: + - rxring_id: "0" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "0, 4, 8, 12, 16, 20, 24, 28, 32, 36, 40, 44" + - rxring_id: "1" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "1, 9, 13, 17, 21, 25, 29, 33, 37, 41, 45" + - rxring_id: "2" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "2, 6, 10, 14, 18, 22, 26, 30, 34, 38, 42, 46" + - rxring_id: "3" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "3, 7, 11, 15, 19, 23, 27, 31, 35, 39, 43, 47" + - rxring_id: "4" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "5" + ib: + - id: "0" + temp_threshold: "92" + - id: "1" + temp_threshold: "92" + - id: "2" + temp_threshold: "92" + - id: "3" + temp_threshold: "92" + - id: "4" + temp_threshold: "92" + - id: "5" + temp_threshold: "92" + - id: "6" + temp_threshold: "92" + - id: "7" + temp_threshold: "92" + devports: + - id: "0" + sysport: "1000" + type: "cpu" + - fec: "NONE" + id: "513" + lanes: "0:1" + serdes_group: "64" + speed: "10G" + #auto_neg: "true" + #link_training: "true" + #bp_tech_ability: "10GBASE_KR" + sysport: "513" + type: "mgmt 0" + - fec: "NONE" + id: "514" + lanes: "1:1" + serdes_group: "64" + speed: "10G" + #auto_neg: "true" + #link_training: "true" + #bp_tech_ability: "10GBASE_KR" + sysport: "514" + type: "mgmt 1" + - fec: "KPFEC" + id: "489" + lanes: "0:4" + serdes_group: "61" + speed: "400G" + sysport: "489" + type: "eth" + - fec: "KPFEC" + id: "493" + lanes: "4:4" + serdes_group: "61" + speed: "400G" + sysport: "493" + type: "eth" + - fec: "KPFEC" + id: "505" + lanes: "0:4" + serdes_group: "63" + speed: "400G" + sysport: "505" + type: "eth" + - fec: "KPFEC" + id: "509" + lanes: "4:4" + serdes_group: "63" + speed: "400G" + sysport: "509" + type: "eth" + - fec: "KPFEC" + id: "441" + lanes: "0:4" + serdes_group: "55" + speed: "400G" + sysport: "441" + type: "eth" + - fec: "KPFEC" + id: "445" + lanes: "4:4" + serdes_group: "55" + speed: "400G" + sysport: "445" + type: "eth" + - fec: "KPFEC" + id: "425" + lanes: "0:4" + serdes_group: "53" + speed: "400G" + sysport: "425" + type: "eth" + - fec: "KPFEC" + id: "429" + lanes: "4:4" + serdes_group: "53" + speed: "400G" + sysport: "429" + type: "eth" + - fec: "KPFEC" + id: "41" + lanes: "0:4" + serdes_group: "5" + speed: "400G" + sysport: "41" + type: "eth" + - fec: "KPFEC" + id: "45" + lanes: "4:4" + serdes_group: "5" + speed: "400G" + sysport: "45" + type: "eth" + - fec: "KPFEC" + id: "49" + lanes: "0:4" + serdes_group: "6" + speed: "400G" + sysport: "49" + type: "eth" + - fec: "KPFEC" + id: "53" + lanes: "4:4" + serdes_group: "6" + speed: "400G" + sysport: "53" + type: "eth" + - fec: "KPFEC" + id: "153" + lanes: "0:4" + serdes_group: "19" + speed: "400G" + sysport: "153" + type: "eth" + - fec: "KPFEC" + id: "157" + lanes: "4:4" + serdes_group: "19" + speed: "400G" + sysport: "157" + type: "eth" + - fec: "KPFEC" + id: "137" + lanes: "0:4" + serdes_group: "17" + speed: "400G" + sysport: "137" + type: "eth" + - fec: "KPFEC" + id: "141" + lanes: "4:4" + serdes_group: "17" + speed: "400G" + sysport: "141" + type: "eth" + - fec: "KPFEC" + id: "1" + lanes: "0:4" + serdes_group: "0" + speed: "400G" + sysport: "1" + type: "eth" + - fec: "KPFEC" + id: "5" + lanes: "4:4" + serdes_group: "0" + speed: "400G" + sysport: "5" + type: "eth" + - fec: "KPFEC" + id: "17" + lanes: "0:4" + serdes_group: "2" + speed: "400G" + sysport: "17" + type: "eth" + - fec: "KPFEC" + id: "21" + lanes: "4:4" + serdes_group: "2" + speed: "400G" + sysport: "21" + type: "eth" + - fec: "KPFEC" + id: "81" + lanes: "0:4" + serdes_group: "10" + speed: "400G" + sysport: "81" + type: "eth" + - fec: "KPFEC" + id: "85" + lanes: "4:4" + serdes_group: "10" + speed: "400G" + sysport: "85" + type: "eth" + - fec: "KPFEC" + id: "65" + lanes: "0:4" + serdes_group: "8" + speed: "400G" + sysport: "65" + type: "eth" + - fec: "KPFEC" + id: "69" + lanes: "4:4" + serdes_group: "8" + speed: "400G" + sysport: "69" + type: "eth" + - fec: "KPFEC" + id: "97" + lanes: "0:4" + serdes_group: "12" + speed: "400G" + sysport: "97" + type: "eth" + - fec: "KPFEC" + id: "101" + lanes: "4:4" + serdes_group: "12" + speed: "400G" + sysport: "101" + type: "eth" + - fec: "KPFEC" + id: "113" + lanes: "0:4" + serdes_group: "14" + speed: "400G" + sysport: "113" + type: "eth" + - fec: "KPFEC" + id: "117" + lanes: "4:4" + serdes_group: "14" + speed: "400G" + sysport: "117" + type: "eth" + - fec: "KPFEC" + id: "193" + lanes: "0:4" + serdes_group: "24" + speed: "400G" + sysport: "193" + type: "eth" + - fec: "KPFEC" + id: "197" + lanes: "4:4" + serdes_group: "24" + speed: "400G" + sysport: "197" + type: "eth" + - fec: "KPFEC" + id: "177" + lanes: "0:4" + serdes_group: "22" + speed: "400G" + sysport: "177" + type: "eth" + - fec: "KPFEC" + id: "181" + lanes: "4:4" + serdes_group: "22" + speed: "400G" + sysport: "181" + type: "eth" + - fec: "KPFEC" + id: "33" + lanes: "0:4" + serdes_group: "4" + speed: "400G" + sysport: "33" + type: "eth" + - fec: "KPFEC" + id: "37" + lanes: "4:4" + serdes_group: "4" + speed: "400G" + sysport: "37" + type: "eth" + - fec: "KPFEC" + id: "57" + lanes: "0:4" + serdes_group: "7" + speed: "400G" + sysport: "57" + type: "eth" + - fec: "KPFEC" + id: "61" + lanes: "4:4" + serdes_group: "7" + speed: "400G" + sysport: "61" + type: "eth" + - fec: "KPFEC" + id: "161" + lanes: "0:4" + serdes_group: "20" + speed: "400G" + sysport: "161" + type: "eth" + - fec: "KPFEC" + id: "165" + lanes: "4:4" + serdes_group: "20" + speed: "400G" + sysport: "165" + type: "eth" + - fec: "KPFEC" + id: "129" + lanes: "0:4" + serdes_group: "16" + speed: "400G" + sysport: "129" + type: "eth" + - fec: "KPFEC" + id: "133" + lanes: "4:4" + serdes_group: "16" + speed: "400G" + sysport: "133" + type: "eth" + - fec: "KPFEC" + id: "217" + lanes: "0:4" + serdes_group: "27" + speed: "400G" + sysport: "217" + type: "eth" + - fec: "KPFEC" + id: "221" + lanes: "4:4" + serdes_group: "27" + speed: "400G" + sysport: "221" + type: "eth" + - fec: "KPFEC" + id: "241" + lanes: "0:4" + serdes_group: "30" + speed: "400G" + sysport: "241" + type: "eth" + - fec: "KPFEC" + id: "245" + lanes: "4:4" + serdes_group: "30" + speed: "400G" + sysport: "245" + type: "eth" + - fec: "KPFEC" + id: "233" + lanes: "0:4" + serdes_group: "29" + speed: "400G" + sysport: "233" + type: "eth" + - fec: "KPFEC" + id: "237" + lanes: "4:4" + serdes_group: "29" + speed: "400G" + sysport: "237" + type: "eth" + - fec: "KPFEC" + id: "209" + lanes: "0:4" + serdes_group: "26" + speed: "400G" + sysport: "209" + type: "eth" + - fec: "KPFEC" + id: "213" + lanes: "4:4" + serdes_group: "26" + speed: "400G" + sysport: "213" + type: "eth" + - fec: "KPFEC" + id: "105" + lanes: "0:4" + serdes_group: "13" + speed: "400G" + sysport: "105" + type: "eth" + - fec: "KPFEC" + id: "109" + lanes: "4:4" + serdes_group: "13" + speed: "400G" + sysport: "109" + type: "eth" + - fec: "KPFEC" + id: "121" + lanes: "0:4" + serdes_group: "15" + speed: "400G" + sysport: "121" + type: "eth" + - fec: "KPFEC" + id: "125" + lanes: "4:4" + serdes_group: "15" + speed: "400G" + sysport: "125" + type: "eth" + - fec: "KPFEC" + id: "169" + lanes: "0:4" + serdes_group: "21" + speed: "400G" + sysport: "169" + type: "eth" + - fec: "KPFEC" + id: "173" + lanes: "4:4" + serdes_group: "21" + speed: "400G" + sysport: "173" + type: "eth" + - fec: "KPFEC" + id: "145" + lanes: "0:4" + serdes_group: "18" + speed: "400G" + sysport: "145" + type: "eth" + - fec: "KPFEC" + id: "149" + lanes: "4:4" + serdes_group: "18" + speed: "400G" + sysport: "149" + type: "eth" + - fec: "KPFEC" + id: "265" + lanes: "0:4" + serdes_group: "33" + speed: "400G" + sysport: "265" + type: "eth" + - fec: "KPFEC" + id: "269" + lanes: "4:4" + serdes_group: "33" + speed: "400G" + sysport: "269" + type: "eth" + - fec: "KPFEC" + id: "289" + lanes: "0:4" + serdes_group: "36" + speed: "400G" + sysport: "289" + type: "eth" + - fec: "KPFEC" + id: "293" + lanes: "4:4" + serdes_group: "36" + speed: "400G" + sysport: "293" + type: "eth" + - fec: "KPFEC" + id: "297" + lanes: "0:4" + serdes_group: "37" + speed: "400G" + sysport: "297" + type: "eth" + - fec: "KPFEC" + id: "301" + lanes: "4:4" + serdes_group: "37" + speed: "400G" + sysport: "301" + type: "eth" + - fec: "KPFEC" + id: "273" + lanes: "0:4" + serdes_group: "34" + speed: "400G" + sysport: "273" + type: "eth" + - fec: "KPFEC" + id: "277" + lanes: "4:4" + serdes_group: "34" + speed: "400G" + sysport: "277" + type: "eth" + - fec: "KPFEC" + id: "225" + lanes: "0:4" + serdes_group: "28" + speed: "400G" + sysport: "225" + type: "eth" + - fec: "KPFEC" + id: "229" + lanes: "4:4" + serdes_group: "28" + speed: "400G" + sysport: "229" + type: "eth" + - fec: "KPFEC" + id: "249" + lanes: "0:4" + serdes_group: "31" + speed: "400G" + sysport: "249" + type: "eth" + - fec: "KPFEC" + id: "253" + lanes: "4:4" + serdes_group: "31" + speed: "400G" + sysport: "253" + type: "eth" + - fec: "KPFEC" + id: "201" + lanes: "0:4" + serdes_group: "25" + speed: "400G" + sysport: "201" + type: "eth" + - fec: "KPFEC" + id: "205" + lanes: "4:4" + serdes_group: "25" + speed: "400G" + sysport: "205" + type: "eth" + - fec: "KPFEC" + id: "185" + lanes: "0:4" + serdes_group: "23" + speed: "400G" + sysport: "185" + type: "eth" + - fec: "KPFEC" + id: "189" + lanes: "4:4" + serdes_group: "23" + speed: "400G" + sysport: "189" + type: "eth" + - fec: "KPFEC" + id: "393" + lanes: "0:4" + serdes_group: "49" + speed: "400G" + sysport: "393" + type: "eth" + - fec: "KPFEC" + id: "397" + lanes: "4:4" + serdes_group: "49" + speed: "400G" + sysport: "397" + type: "eth" + - fec: "KPFEC" + id: "409" + lanes: "0:4" + serdes_group: "51" + speed: "400G" + sysport: "409" + type: "eth" + - fec: "KPFEC" + id: "413" + lanes: "4:4" + serdes_group: "51" + speed: "400G" + sysport: "413" + type: "eth" + - fec: "KPFEC" + id: "329" + lanes: "0:4" + serdes_group: "41" + speed: "400G" + sysport: "329" + type: "eth" + - fec: "KPFEC" + id: "333" + lanes: "4:4" + serdes_group: "41" + speed: "400G" + sysport: "333" + type: "eth" + - fec: "KPFEC" + id: "313" + lanes: "0:4" + serdes_group: "39" + speed: "400G" + sysport: "313" + type: "eth" + - fec: "KPFEC" + id: "317" + lanes: "4:4" + serdes_group: "39" + speed: "400G" + sysport: "317" + type: "eth" + - fec: "KPFEC" + id: "257" + lanes: "0:4" + serdes_group: "32" + speed: "400G" + sysport: "257" + type: "eth" + - fec: "KPFEC" + id: "261" + lanes: "4:4" + serdes_group: "32" + speed: "400G" + sysport: "261" + type: "eth" + - fec: "KPFEC" + id: "281" + lanes: "0:4" + serdes_group: "35" + speed: "400G" + sysport: "281" + type: "eth" + - fec: "KPFEC" + id: "285" + lanes: "4:4" + serdes_group: "35" + speed: "400G" + sysport: "285" + type: "eth" + - fec: "KPFEC" + id: "321" + lanes: "0:4" + serdes_group: "40" + speed: "400G" + sysport: "321" + type: "eth" + - fec: "KPFEC" + id: "325" + lanes: "4:4" + serdes_group: "40" + speed: "400G" + sysport: "325" + type: "eth" + - fec: "KPFEC" + id: "305" + lanes: "0:4" + serdes_group: "38" + speed: "400G" + sysport: "305" + type: "eth" + - fec: "KPFEC" + id: "309" + lanes: "4:4" + serdes_group: "38" + speed: "400G" + sysport: "309" + type: "eth" + - fec: "KPFEC" + id: "457" + lanes: "0:4" + serdes_group: "57" + speed: "400G" + sysport: "457" + type: "eth" + - fec: "KPFEC" + id: "461" + lanes: "4:4" + serdes_group: "57" + speed: "400G" + sysport: "461" + type: "eth" + - fec: "KPFEC" + id: "465" + lanes: "0:4" + serdes_group: "58" + speed: "400G" + sysport: "465" + type: "eth" + - fec: "KPFEC" + id: "469" + lanes: "4:4" + serdes_group: "58" + speed: "400G" + sysport: "469" + type: "eth" + - fec: "KPFEC" + id: "369" + lanes: "0:4" + serdes_group: "46" + speed: "400G" + sysport: "369" + type: "eth" + - fec: "KPFEC" + id: "373" + lanes: "4:4" + serdes_group: "46" + speed: "400G" + sysport: "373" + type: "eth" + - fec: "KPFEC" + id: "353" + lanes: "0:4" + serdes_group: "44" + speed: "400G" + sysport: "353" + type: "eth" + - fec: "KPFEC" + id: "357" + lanes: "4:4" + serdes_group: "44" + speed: "400G" + sysport: "357" + type: "eth" + - fec: "KPFEC" + id: "385" + lanes: "0:4" + serdes_group: "48" + speed: "400G" + sysport: "385" + type: "eth" + - fec: "KPFEC" + id: "389" + lanes: "4:4" + serdes_group: "48" + speed: "400G" + sysport: "389" + type: "eth" + - fec: "KPFEC" + id: "401" + lanes: "0:4" + serdes_group: "50" + speed: "400G" + sysport: "401" + type: "eth" + - fec: "KPFEC" + id: "405" + lanes: "4:4" + serdes_group: "50" + speed: "400G" + sysport: "405" + type: "eth" + - fec: "KPFEC" + id: "361" + lanes: "0:4" + serdes_group: "45" + speed: "400G" + sysport: "361" + type: "eth" + - fec: "KPFEC" + id: "365" + lanes: "4:4" + serdes_group: "45" + speed: "400G" + sysport: "365" + type: "eth" + - fec: "KPFEC" + id: "337" + lanes: "0:4" + serdes_group: "42" + speed: "400G" + sysport: "337" + type: "eth" + - fec: "KPFEC" + id: "341" + lanes: "4:4" + serdes_group: "42" + speed: "400G" + sysport: "341" + type: "eth" + - fec: "KPFEC" + id: "481" + lanes: "0:4" + serdes_group: "60" + speed: "400G" + sysport: "481" + type: "eth" + - fec: "KPFEC" + id: "485" + lanes: "4:4" + serdes_group: "60" + speed: "400G" + sysport: "485" + type: "eth" + - fec: "KPFEC" + id: "497" + lanes: "0:4" + serdes_group: "62" + speed: "400G" + sysport: "497" + type: "eth" + - fec: "KPFEC" + id: "501" + lanes: "4:4" + serdes_group: "62" + speed: "400G" + sysport: "501" + type: "eth" + - fec: "KPFEC" + id: "433" + lanes: "0:4" + serdes_group: "54" + speed: "400G" + sysport: "433" + type: "eth" + - fec: "KPFEC" + id: "437" + lanes: "4:4" + serdes_group: "54" + speed: "400G" + sysport: "437" + type: "eth" + - fec: "KPFEC" + id: "417" + lanes: "0:4" + serdes_group: "52" + speed: "400G" + sysport: "417" + type: "eth" + - fec: "KPFEC" + id: "421" + lanes: "4:4" + serdes_group: "52" + speed: "400G" + sysport: "421" + type: "eth" + - fec: "KPFEC" + id: "449" + lanes: "0:4" + serdes_group: "56" + speed: "400G" + sysport: "449" + type: "eth" + - fec: "KPFEC" + id: "453" + lanes: "4:4" + serdes_group: "56" + speed: "400G" + sysport: "453" + type: "eth" + - fec: "KPFEC" + id: "473" + lanes: "0:4" + serdes_group: "59" + speed: "400G" + sysport: "473" + type: "eth" + - fec: "KPFEC" + id: "477" + lanes: "4:4" + serdes_group: "59" + speed: "400G" + sysport: "477" + type: "eth" + - fec: "KPFEC" + id: "377" + lanes: "0:4" + serdes_group: "47" + speed: "400G" + sysport: "377" + type: "eth" + - fec: "KPFEC" + id: "381" + lanes: "4:4" + serdes_group: "47" + speed: "400G" + sysport: "381" + type: "eth" + - fec: "KPFEC" + id: "345" + lanes: "0:4" + serdes_group: "43" + speed: "400G" + sysport: "345" + type: "eth" + - fec: "KPFEC" + id: "349" + lanes: "4:4" + serdes_group: "43" + speed: "400G" + sysport: "349" + type: "eth" + - fec: "KPFEC" + id: "9" + lanes: "0:4" + serdes_group: "1" + speed: "400G" + sysport: "9" + type: "eth" + - fec: "KPFEC" + id: "13" + lanes: "4:4" + serdes_group: "1" + speed: "400G" + sysport: "13" + type: "eth" + - fec: "KPFEC" + id: "25" + lanes: "0:4" + serdes_group: "3" + speed: "400G" + sysport: "25" + type: "eth" + - fec: "KPFEC" + id: "29" + lanes: "4:4" + serdes_group: "3" + speed: "400G" + sysport: "29" + type: "eth" + - fec: "KPFEC" + id: "89" + lanes: "0:4" + serdes_group: "11" + speed: "400G" + sysport: "89" + type: "eth" + - fec: "KPFEC" + id: "93" + lanes: "4:4" + serdes_group: "11" + speed: "400G" + sysport: "93" + type: "eth" + - fec: "KPFEC" + id: "73" + lanes: "0:4" + serdes_group: "9" + speed: "400G" + sysport: "73" + type: "eth" + - fec: "KPFEC" + id: "77" + lanes: "4:4" + serdes_group: "9" + speed: "400G" + sysport: "77" + type: "eth" + isg: + - id: "0" + lane_swap: "23016754" + rx_polarity: "10001000" + tx_polarity: "00001111" + - id: "1" + lane_swap: "32107645" + rx_polarity: "00100110" + tx_polarity: "10100011" + - id: "2" + lane_swap: "01236457" + rx_polarity: "10010001" + tx_polarity: "10001111" + - id: "3" + lane_swap: "10324675" + rx_polarity: "11000110" + tx_polarity: "11111010" + - id: "4" + lane_swap: "23016754" + rx_polarity: "10001000" + tx_polarity: "00001111" + - id: "5" + lane_swap: "32104675" + rx_polarity: "01001111" + tx_polarity: "11100010" + - id: "6" + lane_swap: "12306475" + rx_polarity: "10011011" + tx_polarity: "11001110" + - id: "7" + lane_swap: "21034657" + rx_polarity: "11001110" + tx_polarity: "10011011" + - id: "8" + lane_swap: "30127465" + rx_polarity: "10111011" + tx_polarity: "11011101" + - id: "9" + lane_swap: "03214756" + rx_polarity: "11011101" + tx_polarity: "10111011" + - id: "10" + lane_swap: "12306475" + rx_polarity: "10011011" + tx_polarity: "10001110" + - id: "11" + lane_swap: "21034657" + rx_polarity: "11001110" + tx_polarity: "10011011" + - id: "12" + lane_swap: "30127465" + rx_polarity: "11110100" + tx_polarity: "10010111" + - id: "13" + lane_swap: "03214756" + rx_polarity: "11011101" + tx_polarity: "10111011" + - id: "14" + lane_swap: "12306475" + rx_polarity: "11010100" + tx_polarity: "10000100" + - id: "15" + lane_swap: "21034657" + rx_polarity: "11001110" + tx_polarity: "10011011" + - id: "16" + lane_swap: "03214756" + rx_polarity: "01010101" + tx_polarity: "01000111" + - id: "17" + lane_swap: "03124756" + rx_polarity: "11011101" + tx_polarity: "00000100" + - id: "18" + lane_swap: "30217465" + rx_polarity: "01000100" + tx_polarity: "01110010" + - id: "19" + lane_swap: "12035746" + rx_polarity: "00000010" + tx_polarity: "10001000" + - id: "20" + lane_swap: "21034657" + rx_polarity: "00100110" + tx_polarity: "10010111" + - id: "21" + lane_swap: "21307564" + rx_polarity: "11001000" + tx_polarity: "01010010" + - id: "22" + lane_swap: "03124756" + rx_polarity: "00000010" + tx_polarity: "10111011" + - id: "23" + lane_swap: "30217465" + rx_polarity: "00011011" + tx_polarity: "01111010" + - id: "24" + lane_swap: "12035746" + rx_polarity: "01010010" + tx_polarity: "00110111" + - id: "25" + lane_swap: "21307564" + rx_polarity: "10000111" + tx_polarity: "01000110" + - id: "26" + lane_swap: "47562103" + rx_polarity: "01111111" + tx_polarity: "01111110" + - id: "27" + lane_swap: "46572103" + rx_polarity: "00000101" + tx_polarity: "10110011" + - id: "28" + lane_swap: "64751230" + rx_polarity: "10101000" + tx_polarity: "00100110" + - id: "29" + lane_swap: "47560123" + rx_polarity: "01111100" + tx_polarity: "10111001" + - id: "30" + lane_swap: "57460123" + rx_polarity: "00001100" + tx_polarity: "00100111" + - id: "31" + lane_swap: "75641032" + rx_polarity: "01100000" + tx_polarity: "00100111" + - id: "32" + lane_swap: "03214657" + rx_polarity: "10100010" + tx_polarity: "00011101" + - id: "33" + lane_swap: "30126475" + rx_polarity: "00110111" + tx_polarity: "00011000" + - id: "34" + lane_swap: "32107465" + rx_polarity: "01000000" + tx_polarity: "01000110" + - id: "35" + lane_swap: "21034756" + rx_polarity: "10110101" + tx_polarity: "00111101" + - id: "36" + lane_swap: "12307465" + rx_polarity: "00010111" + tx_polarity: "01101011" + - id: "37" + lane_swap: "32106475" + rx_polarity: "11100000" + tx_polarity: "10100101" + - id: "38" + lane_swap: "47560312" + rx_polarity: "10010010" + tx_polarity: "10101011" + - id: "39" + lane_swap: "47560312" + rx_polarity: "01110010" + tx_polarity: "11101110" + - id: "40" + lane_swap: "56470213" + rx_polarity: "11100011" + tx_polarity: "10001111" + - id: "41" + lane_swap: "56470213" + rx_polarity: "00110011" + tx_polarity: "11101010" + - id: "42" + lane_swap: "74653021" + rx_polarity: "01000100" + tx_polarity: "01110010" + - id: "43" + lane_swap: "46570321" + rx_polarity: "00110100" + tx_polarity: "10110100" + - id: "44" + lane_swap: "47560312" + rx_polarity: "00100010" + tx_polarity: "00000100" + - id: "45" + lane_swap: "65742031" + rx_polarity: "01000000" + tx_polarity: "01000011" + - id: "46" + lane_swap: "56470213" + rx_polarity: "11101100" + tx_polarity: "00000000" + - id: "47" + lane_swap: "46572301" + rx_polarity: "01010111" + tx_polarity: "11100100" + - id: "48" + lane_swap: "74653012" + rx_polarity: "10111011" + tx_polarity: "11011101" + - id: "49" + lane_swap: "47560321" + rx_polarity: "10010010" + tx_polarity: "11110001" + - id: "50" + lane_swap: "65743210" + rx_polarity: "00010011" + tx_polarity: "11011111" + - id: "51" + lane_swap: "56472301" + rx_polarity: "10010000" + tx_polarity: "01011001" + - id: "52" + lane_swap: "74653012" + rx_polarity: "10111011" + tx_polarity: "11011101" + - id: "53" + lane_swap: "47560321" + rx_polarity: "11011101" + tx_polarity: "11111011" + - id: "54" + lane_swap: "65743210" + rx_polarity: "00010011" + tx_polarity: "11011111" + - id: "55" + lane_swap: "56472301" + rx_polarity: "11011111" + tx_polarity: "00010011" + - id: "56" + lane_swap: "74653012" + rx_polarity: "10111011" + tx_polarity: "11011101" + - id: "57" + lane_swap: "47560321" + rx_polarity: "11011101" + tx_polarity: "10111011" + - id: "58" + lane_swap: "67542103" + rx_polarity: "01010100" + tx_polarity: "00101111" + - id: "59" + lane_swap: "76451230" + rx_polarity: "11000010" + tx_polarity: "10010011" + - id: "60" + lane_swap: "54670123" + rx_polarity: "01010011" + tx_polarity: "10001001" + - id: "61" + lane_swap: "45761032" + rx_polarity: "01100110" + tx_polarity: "10011010" + - id: "62" + lane_swap: "67542103" + rx_polarity: "11110010" + tx_polarity: "01001001" + - id: "63" + lane_swap: "76451230" + rx_polarity: "01000010" + tx_polarity: "00011011" + - id: "64" + lane_swap: "01234567" + rx_polarity: "01000000" + tx_polarity: "00000000" + #pre1: "-4,-4,-4,-4,-4,-4,-4,-4" + #pre2: "-1,-1,-1,-1,-1,-1,-1,-1" + #post: "-4,-4,-4,-4,-4,-4,-4,-4" + #main: "52,52,52,52,52,52,52,52" diff --git a/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_128x400G-2x10G/ivm.sai.config.yaml b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_128x400G-2x10G/ivm.sai.config.yaml new file mode 100755 index 00000000000..f0b91d77fd6 --- /dev/null +++ b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_128x400G-2x10G/ivm.sai.config.yaml @@ -0,0 +1,14 @@ +IFCS_INIT_FILE : "/usr/share/sonic/hwsku/config_tl10_d64p512t_128x400G-2x10G.yaml" +IFCS_SKU_FILE : "/usr/share/sonic/hwsku/teralynx.MVTX9180" +IFCS_INNO_CLI_PORT : "9999" +IFCS_TARGET : "device" +INNOVIUM_DIR : "/innovium" +PYTHONPATH : "$INNOVIUM_DIR:$INNOVIUM_DIR/cmds:$INNOVIUM_DIR/scripts:$INNOVIUM_DIR/test/:$INNOVIUM_DIR/test/utils:$INNOVIUM_DIR/utils:$INNOVIUM_DIR/pyctypes:$INNOVIUM_DIR/ifcs_cmds:$INNOVIUM_DIR/testutil" +IVM_SAI_DATAPATH_CONFIG_FILE: "/usr/share/sonic/hwsku/ivm.sai.datapath.config.yaml" +IVM_SAI_PARAM_A0008: "64" +IVM_SAI_PARAM_A0016: "1,1,0,0,1" +IVM_SAI_PARAM_A0003: "4" +IVM_SAI_PARAM_A0059: "TRUE" +IVM_SAI_PARAM_A0007: "9" +IVM_SAI_PARAM_A003D: "1" +IVM_SAI_PARAM_A0068: "TRUE" diff --git a/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_128x400G-2x10G/ivm.sai.datapath.config.yaml b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_128x400G-2x10G/ivm.sai.datapath.config.yaml new file mode 100755 index 00000000000..a1b1db409e6 --- /dev/null +++ b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_128x400G-2x10G/ivm.sai.datapath.config.yaml @@ -0,0 +1,11 @@ +#Queue Type +ISAI_PARAM_A000 : "0" +ISAI_PARAM_P0_0_LS : "2304 2304 2304 2304 2304 2304 2304 2304" +ISAI_PARAM_P0_1_LS : "1736 1616 1616 1592 1592 1592 1592 1592" +ISAI_PARAM_P0_1_ALS : "200 80 80 56 56 56 56 56" +ISAI_PARAM_P1_0_LS : "768 768 768 768 768 768 768 768" +ISAI_PARAM_P1_0_LL : "1536 1536 1536 1536 1536 1536 1536 1536" +ISAI_PARAM_P1_1_LS : "1352 1232 1232 1208 1208 1208 1208 1208" +ISAI_PARAM_P1_1_LL : "3138 3138 3138 3138 3138 3138 3138 3138" +ISAI_PARAM_P1_1_ALS : "200 80 80 56 56 56 56 56" +ISAI_PARAM_P1_1_ALL : "86 86 86 86 86 86 86 86" diff --git a/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_128x400G-2x10G/pg_profile_lookup.ini b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_128x400G-2x10G/pg_profile_lookup.ini new file mode 100755 index 00000000000..3da08e28378 --- /dev/null +++ b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_128x400G-2x10G/pg_profile_lookup.ini @@ -0,0 +1,38 @@ +# PG lossless profiles. +# speed cable size xon xoff threshold xon_offset + 25000 1m 1518 0 18304 1 13824 + 50000 1m 1518 0 23808 1 13824 + 100000 1m 1518 0 39680 1 13824 + 200000 1m 1518 0 68864 1 13824 + 400000 1m 1518 0 127360 1 13824 + 800000 1m 1518 0 244864 1 13824 + 25000 2m 1518 0 18304 1 13824 + 50000 2m 1518 0 23808 1 13824 + 100000 2m 1518 0 39680 1 13824 + 200000 2m 1518 0 69504 1 13824 + 400000 2m 1518 0 127360 1 13824 + 800000 2m 1518 0 244864 1 13824 + 25000 5m 1518 0 18304 1 13824 + 50000 5m 1518 0 24064 1 13824 + 100000 5m 1518 0 40064 1 13824 + 200000 5m 1518 0 70272 1 13824 + 400000 5m 1518 0 129920 1 13824 + 800000 5m 1518 0 247424 1 13824 + 25000 40m 1518 0 19840 1 13824 + 50000 40m 1518 0 26240 1 13824 + 100000 40m 1518 0 44544 1 13824 + 200000 40m 1518 0 78848 1 13824 + 400000 40m 1518 0 147072 1 13824 + 800000 40m 1518 0 285312 1 13824 + 25000 100m 1518 0 22016 1 13824 + 50000 100m 1518 0 30080 1 13824 + 100000 100m 1518 0 52224 1 13824 + 200000 100m 1518 0 94464 1 13824 + 400000 100m 1518 0 178560 1 13824 + 800000 100m 1518 0 345984 1 13824 + 25000 300m 1518 0 29696 1 13824 + 50000 300m 1518 0 43008 1 13824 + 100000 300m 1518 0 77824 1 13824 + 200000 300m 1518 0 145536 1 13824 + 400000 300m 1518 0 280960 1 13824 + 800000 300m 1518 0 550528 1 13824 diff --git a/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_128x400G-2x10G/port_config.ini b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_128x400G-2x10G/port_config.ini new file mode 100755 index 00000000000..00f8beab066 --- /dev/null +++ b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_128x400G-2x10G/port_config.ini @@ -0,0 +1,132 @@ +# name lanes alias fec autoneg index speed subport +Ethernet0 1,2,3,4 etp1a rs off 0 400000 1 +Ethernet4 5,6,7,8 etp1b rs off 0 400000 2 +Ethernet8 17,18,19,20 etp2a rs off 1 400000 1 +Ethernet12 21,22,23,24 etp2b rs off 1 400000 2 +Ethernet16 25,26,27,28 etp3a rs off 2 400000 1 +Ethernet20 29,30,31,32 etp3b rs off 2 400000 2 +Ethernet24 9,10,11,12 etp4a rs off 3 400000 1 +Ethernet28 13,14,15,16 etp4b rs off 3 400000 2 +Ethernet32 33,34,35,36 etp5a rs off 4 400000 1 +Ethernet36 37,38,39,40 etp5b rs off 4 400000 2 +Ethernet40 57,58,59,60 etp6a rs off 5 400000 1 +Ethernet44 61,62,63,64 etp6b rs off 5 400000 2 +Ethernet48 49,50,51,52 etp7a rs off 6 400000 1 +Ethernet52 53,54,55,56 etp7b rs off 6 400000 2 +Ethernet56 41,42,43,44 etp8a rs off 7 400000 1 +Ethernet60 45,46,47,48 etp8b rs off 7 400000 2 +Ethernet64 73,74,75,76 etp9a rs off 8 400000 1 +Ethernet68 77,78,79,80 etp9b rs off 8 400000 2 +Ethernet72 89,90,91,92 etp10a rs off 9 400000 1 +Ethernet76 93,94,95,96 etp10b rs off 9 400000 2 +Ethernet80 81,82,83,84 etp11a rs off 10 400000 1 +Ethernet84 85,86,87,88 etp11b rs off 10 400000 2 +Ethernet88 65,66,67,68 etp12a rs off 11 400000 1 +Ethernet92 69,70,71,72 etp12b rs off 11 400000 2 +Ethernet96 105,106,107,108 etp13a rs off 12 400000 1 +Ethernet100 109,110,111,112 etp13b rs off 12 400000 2 +Ethernet104 121,122,123,124 etp14a rs off 13 400000 1 +Ethernet108 125,126,127,128 etp14b rs off 13 400000 2 +Ethernet112 113,114,115,116 etp15a rs off 14 400000 1 +Ethernet116 117,118,119,120 etp15b rs off 14 400000 2 +Ethernet120 97,98,99,100 etp16a rs off 15 400000 1 +Ethernet124 101,102,103,104 etp16b rs off 15 400000 2 +Ethernet128 129,130,131,132 etp17a rs off 16 400000 1 +Ethernet132 133,134,135,136 etp17b rs off 16 400000 2 +Ethernet136 161,162,163,164 etp18a rs off 17 400000 1 +Ethernet140 165,166,167,168 etp18b rs off 17 400000 2 +Ethernet144 153,154,155,156 etp19a rs off 18 400000 1 +Ethernet148 157,158,159,160 etp19b rs off 18 400000 2 +Ethernet152 137,138,139,140 etp20a rs off 19 400000 1 +Ethernet156 141,142,143,144 etp20b rs off 19 400000 2 +Ethernet160 145,146,147,148 etp21a rs off 20 400000 1 +Ethernet164 149,150,151,152 etp21b rs off 20 400000 2 +Ethernet168 169,170,171,172 etp22a rs off 21 400000 1 +Ethernet172 173,174,175,176 etp22b rs off 21 400000 2 +Ethernet176 193,194,195,196 etp23a rs off 22 400000 1 +Ethernet180 197,198,199,200 etp23b rs off 22 400000 2 +Ethernet184 177,178,179,180 etp24a rs off 23 400000 1 +Ethernet188 181,182,183,184 etp24b rs off 23 400000 2 +Ethernet192 185,186,187,188 etp25a rs off 24 400000 1 +Ethernet196 189,190,191,192 etp25b rs off 24 400000 2 +Ethernet200 201,202,203,204 etp26a rs off 25 400000 1 +Ethernet204 205,206,207,208 etp26b rs off 25 400000 2 +Ethernet208 233,234,235,236 etp27a rs off 26 400000 1 +Ethernet212 237,238,239,240 etp27b rs off 26 400000 2 +Ethernet216 209,210,211,212 etp28a rs off 27 400000 1 +Ethernet220 213,214,215,216 etp28b rs off 27 400000 2 +Ethernet224 225,226,227,228 etp29a rs off 28 400000 1 +Ethernet228 229,230,231,232 etp29b rs off 28 400000 2 +Ethernet232 249,250,251,252 etp30a rs off 29 400000 1 +Ethernet236 253,254,255,256 etp30b rs off 29 400000 2 +Ethernet240 241,242,243,244 etp31a rs off 30 400000 1 +Ethernet244 245,246,247,248 etp31b rs off 30 400000 2 +Ethernet248 217,218,219,220 etp32a rs off 31 400000 1 +Ethernet252 221,222,223,224 etp32b rs off 31 400000 2 +Ethernet256 257,258,259,260 etp33a rs off 32 400000 1 +Ethernet260 261,262,263,264 etp33b rs off 32 400000 2 +Ethernet264 281,282,283,284 etp34a rs off 33 400000 1 +Ethernet268 285,286,287,288 etp34b rs off 33 400000 2 +Ethernet272 289,290,291,292 etp35a rs off 34 400000 1 +Ethernet276 293,294,295,296 etp35b rs off 34 400000 2 +Ethernet280 265,266,267,268 etp36a rs off 35 400000 1 +Ethernet284 269,270,271,272 etp36b rs off 35 400000 2 +Ethernet288 305,306,307,308 etp37a rs off 36 400000 1 +Ethernet292 309,310,311,312 etp37b rs off 36 400000 2 +Ethernet296 321,322,323,324 etp38a rs off 37 400000 1 +Ethernet300 325,326,327,328 etp38b rs off 37 400000 2 +Ethernet304 297,298,299,300 etp39a rs off 38 400000 1 +Ethernet308 301,302,303,304 etp39b rs off 38 400000 2 +Ethernet312 273,274,275,276 etp40a rs off 39 400000 1 +Ethernet316 277,278,279,280 etp40b rs off 39 400000 2 +Ethernet320 313,314,315,316 etp41a rs off 40 400000 1 +Ethernet324 317,318,319,320 etp41b rs off 40 400000 2 +Ethernet328 329,330,331,332 etp42a rs off 41 400000 1 +Ethernet332 333,334,335,336 etp42b rs off 41 400000 2 +Ethernet336 361,362,363,364 etp43a rs off 42 400000 1 +Ethernet340 365,366,367,368 etp43b rs off 42 400000 2 +Ethernet344 337,338,339,340 etp44a rs off 43 400000 1 +Ethernet348 341,342,343,344 etp44b rs off 43 400000 2 +Ethernet352 353,354,355,356 etp45a rs off 44 400000 1 +Ethernet356 357,358,359,360 etp45b rs off 44 400000 2 +Ethernet360 369,370,371,372 etp46a rs off 45 400000 1 +Ethernet364 373,374,375,376 etp46b rs off 45 400000 2 +Ethernet368 377,378,379,380 etp47a rs off 46 400000 1 +Ethernet372 381,382,383,384 etp47b rs off 46 400000 2 +Ethernet376 345,346,347,348 etp48a rs off 47 400000 1 +Ethernet380 349,350,351,352 etp48b rs off 47 400000 2 +Ethernet384 385,386,387,388 etp49a rs off 48 400000 1 +Ethernet388 389,390,391,392 etp49b rs off 48 400000 2 +Ethernet392 401,402,403,404 etp50a rs off 49 400000 1 +Ethernet396 405,406,407,408 etp50b rs off 49 400000 2 +Ethernet400 409,410,411,412 etp51a rs off 50 400000 1 +Ethernet404 413,414,415,416 etp51b rs off 50 400000 2 +Ethernet408 393,394,395,396 etp52a rs off 51 400000 1 +Ethernet412 397,398,399,400 etp52b rs off 51 400000 2 +Ethernet416 417,418,419,420 etp53a rs off 52 400000 1 +Ethernet420 421,422,423,424 etp53b rs off 52 400000 2 +Ethernet424 433,434,435,436 etp54a rs off 53 400000 1 +Ethernet428 437,438,439,440 etp54b rs off 53 400000 2 +Ethernet432 441,442,443,444 etp55a rs off 54 400000 1 +Ethernet436 445,446,447,448 etp55b rs off 54 400000 2 +Ethernet440 425,426,427,428 etp56a rs off 55 400000 1 +Ethernet444 429,430,431,432 etp56b rs off 55 400000 2 +Ethernet448 449,450,451,452 etp57a rs off 56 400000 1 +Ethernet452 453,454,455,456 etp57b rs off 56 400000 2 +Ethernet456 473,474,475,476 etp58a rs off 57 400000 1 +Ethernet460 477,478,479,480 etp58b rs off 57 400000 2 +Ethernet464 465,466,467,468 etp59a rs off 58 400000 1 +Ethernet468 469,470,471,472 etp59b rs off 58 400000 2 +Ethernet472 457,458,459,460 etp60a rs off 59 400000 1 +Ethernet476 461,462,463,464 etp60b rs off 59 400000 2 +Ethernet480 489,490,491,492 etp61a rs off 60 400000 1 +Ethernet484 493,494,495,496 etp61b rs off 60 400000 2 +Ethernet488 505,506,507,508 etp62a rs off 61 400000 1 +Ethernet492 509,510,511,512 etp62b rs off 61 400000 2 +Ethernet496 497,498,499,500 etp63a rs off 62 400000 1 +Ethernet500 501,502,503,504 etp63b rs off 62 400000 2 +Ethernet504 481,482,483,484 etp64a rs off 63 400000 1 +Ethernet508 485,486,487,488 etp64b rs off 63 400000 2 +Ethernet512 513 etp65 none off 64 10000 1 +Ethernet513 514 etp66 none off 65 10000 1 + diff --git a/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_128x400G-2x10G/qos.json.j2 b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_128x400G-2x10G/qos.json.j2 new file mode 100755 index 00000000000..3801545c5eb --- /dev/null +++ b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_128x400G-2x10G/qos.json.j2 @@ -0,0 +1,107 @@ +{%- set PORT_LOSSY = [] %} + +{%- set default_topo = default_topo | default('t1', true) %} + +{% if default_topo == 'def_lossy' %} +{% for port in PORT %} + {%- if PORT_LOSSY.append(port) %}{% endif %} +{% endfor %} +{% endif %} + +{%- macro generate_service_port_list(PORT_SERVICE) -%} + {%- if PORT_SERVICE.append("Ethernet512") %}{% endif %} + {%- if PORT_SERVICE.append("Ethernet513") %}{% endif %} +{%- endmacro %} + +{%- set PORT_SERVICE = [] %} +{%- if generate_service_port_list is defined %} + {%- if generate_service_port_list(PORT_SERVICE) %}{% endif %} +{%- endif %} + +{%- macro generate_tc_to_pg_map_per_sku() %} + "TC_TO_PRIORITY_GROUP_MAP": { + "AZURE": { + "0": "0", + "1": "0", + "2": "0", + "3": "3", + "4": "4", + "5": "0", + "6": "0", + "7": "0" + }, + "AZURE_LOSSY": { + "0": "0", + "1": "0", + "2": "0", + "3": "1", + "4": "2", + "5": "0", + "6": "0", + "7": "0" + } + }, +{%- endmacro -%} + +{%- macro generate_scheduler_per_sku() -%} + "SCHEDULER": { + "scheduler.0": { + "type" : "STRICT" + }, + "scheduler.1": { + "type" : "DWRR", + "weight": "1" + } + }, +{%- endmacro -%} + +{%- macro generate_global_dscp_to_tc_map() -%} +{%- endmacro -%} + +{# QUEUE #} +{%- macro generate_queue_config(port_names_active) %} + "QUEUE": { +{% for port in port_names_active.split(',') %} + "{{ port }}|0-2": { + "scheduler": "scheduler.1" + }, + "{{ port }}|3-4": { +{% if port not in PORT_SERVICE and port not in PORT_LOSSY %} + "wred_profile" : "AZURE_LOSSLESS", +{% endif %} + "scheduler" : "scheduler.1" + }, + "{{ port }}|5-6": { + "scheduler": "scheduler.1" + }, + "{{ port }}|7": { + "scheduler": "scheduler.0" + }{{ "," if not loop.last else "" }} +{% endfor %} + } +{%- endmacro %} + +{# PORT_QOS_MAP #} +{%- macro generate_port_qos_map(port_names_active) %} + "PORT_QOS_MAP": { +{% for port in port_names_active.split(',') %} + "{{ port }}": { +{% if port in PORT_SERVICE or port in PORT_LOSSY %} + "dscp_to_tc_map" : "AZURE", + "tc_to_pg_map" : "AZURE_LOSSY", + "tc_to_queue_map" : "AZURE" +{% else %} + "dscp_to_tc_map" : "AZURE", + "tc_to_pg_map" : "AZURE", + "tc_to_queue_map" : "AZURE", + "pfc_to_queue_map" : "AZURE", + "pfc_enable" : "3,4", + "pfcwd_sw_enable" : "3,4" +{% endif %} + }{{ "," if not loop.last else "" }} +{% endfor %} + }, +{%- endmacro %} + + +{%- include 'qos_config.j2' %} diff --git a/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_128x400G-2x10G/qos_defaults_def_lossy.j2 b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_128x400G-2x10G/qos_defaults_def_lossy.j2 new file mode 100755 index 00000000000..c1170619bc6 --- /dev/null +++ b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_128x400G-2x10G/qos_defaults_def_lossy.j2 @@ -0,0 +1,121 @@ +{% set port_names_list = [] %} +{% for port in PORT %} + {%- if port_names_list.append(port) %}{% endif %} +{% endfor %} +{% set port_names = port_names_list | join(',') -%} + + +{ + "TC_TO_QUEUE_MAP":{ + "AZURE":{ + "0":"0", + "1":"1", + "2":"2", + "3":"3", + "4":"4", + "5":"5", + "6":"6", + "7":"7" + } + }, + "TC_TO_PRIORITY_GROUP_MAP": { + "AZURE": { + "0": "0", + "1": "0", + "2": "0", + "3": "1", + "4": "2", + "5": "0", + "6": "0", + "7": "0" + } + }, + "DSCP_TO_TC_MAP": { + "AZURE": { + "0":"0", + "1":"0", + "2":"0", + "3":"0", + "4":"0", + "5":"0", + "6":"0", + "7":"0", + "8":"0", + "9":"0", + "10":"0", + "11":"0", + "12":"0", + "13":"0", + "14":"0", + "15":"0", + "16":"0", + "17":"0", + "18":"0", + "19":"0", + "20":"0", + "21":"0", + "22":"0", + "23":"0", + "24":"0", + "25":"0", + "26":"0", + "27":"0", + "28":"0", + "29":"0", + "30":"0", + "31":"0", + "32":"0", + "33":"0", + "34":"0", + "35":"0", + "36":"0", + "37":"0", + "38":"0", + "39":"0", + "40":"0", + "41":"0", + "42":"0", + "43":"0", + "44":"0", + "45":"0", + "46":"0", + "47":"0", + "48":"0", + "49":"0", + "50":"0", + "51":"0", + "52":"0", + "53":"0", + "54":"0", + "55":"0", + "56":"0", + "57":"0", + "58":"0", + "59":"0", + "60":"0", + "61":"0", + "62":"0", + "63":"0" + } + }, + "PORT_QOS_MAP": { +{% for port in port_names_list %} + "{{ port }}": { + "tc_to_pg_map": "AZURE", + "tc_to_queue_map": "AZURE", + "dscp_to_tc_map": "AZURE" + }{% if not loop.last %},{% endif %} + +{% endfor %} + }, + "SCHEDULER": { + "scheduler.7": { + "type": "STRICT" + } + }, + "QUEUE": { + "{{ port_names }}|7": { + "scheduler": "[SCHEDULER|scheduler.7]" + } + } +} diff --git a/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_128x400G-2x10G/sai.profile b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_128x400G-2x10G/sai.profile new file mode 100755 index 00000000000..aba4fc81fb1 --- /dev/null +++ b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_128x400G-2x10G/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/ivm.sai.config.yaml diff --git a/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_128x400G-2x10G/teralynx.MVTX9180 b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_128x400G-2x10G/teralynx.MVTX9180 new file mode 100755 index 00000000000..e310d0be06a --- /dev/null +++ b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_128x400G-2x10G/teralynx.MVTX9180 @@ -0,0 +1,170 @@ +sku: teralynx.MVTX9180 + +device_id: 0x6000 + +# Hardware constraint information +hardware: + num_ibs: 8 + ib_active: 0,1,2,3,4,5,6,7 + + ports_per_ib: 66, 66, 66, 66, 66, 66, 66, 66 + recirc_port_num: 64, 64, 64, 64, 64, 64, 64, 64 + cpu_port_num: 65 + cpu_port_ib: 0 + mgmt_port_num: 65, 65 + mgmt_port_ibs: 1,2 + + pics_per_ib: 8, 9, 9, 8, 8, 8, 8, 8 + pic_ports_per_pic: 8 + max_serdes_speed: 100 + + num_shared_pics: 0 + + isg [0-7]: + ib: 0 + pic_id: [0-7] + + isg [8-15]: + ib: 4 + pic_id: [0-7] + + isg 16: + ib: 6 + pic_id: 7 + + isg 17: + ib: 6 + pic_id: 6 + + isg 18: + ib: 6 + pic_id: 5 + + isg 19: + ib: 6 + pic_id: 4 + + isg 20: + ib: 6 + pic_id: 3 + + isg 21: + ib: 6 + pic_id: 2 + + isg 22: + ib: 6 + pic_id: 1 + + isg 23: + ib: 6 + pic_id: 0 + + isg 24: + ib: 2 + pic_id: 7 + + isg 25: + ib: 2 + pic_id: 6 + + isg 26: + ib: 2 + pic_id: 5 + + isg 27: + ib: 2 + pic_id: 4 + + isg 28: + ib: 2 + pic_id: 3 + + isg 29: + ib: 2 + pic_id: 2 + + isg 30: + ib: 2 + pic_id: 1 + + isg 31: + ib: 2 + pic_id: 0 + + isg [32-39]: + ib: 3 + pic_id: [0-7] + + isg [40-47]: + ib: 7 + pic_id: [0-7] + + isg 48: + ib: 5 + pic_id: 7 + + isg 49: + ib: 5 + pic_id: 6 + + isg 50: + ib: 5 + pic_id: 5 + + isg 51: + ib: 5 + pic_id: 4 + + isg 52: + ib: 5 + pic_id: 3 + + isg 53: + ib: 5 + pic_id: 2 + + isg 54: + ib: 5 + pic_id: 1 + + isg 55: + ib: 5 + pic_id: 0 + + isg 56: + ib: 1 + pic_id: 7 + + isg 57: + ib: 1 + pic_id: 6 + + isg 58: + ib: 1 + pic_id: 5 + + isg 59: + ib: 1 + pic_id: 4 + + isg 60: + ib: 1 + pic_id: 3 + + isg 61: + ib: 1 + pic_id: 2 + + isg 62: + ib: 1 + pic_id: 1 + + isg 63: + ib: 1 + pic_id: 0 + + isg 64: + mode: 1:1 + ib: 1, 2 + pic_id: 8 diff --git a/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_256x200G-2x10G/buffers.json.j2 b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_256x200G-2x10G/buffers.json.j2 new file mode 100644 index 00000000000..3952ba88deb --- /dev/null +++ b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_256x200G-2x10G/buffers.json.j2 @@ -0,0 +1,3 @@ +{%- set default_topo = default_topo | default('t1', true) %} +{%- include 'buffers_config.j2' %} + diff --git a/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_256x200G-2x10G/buffers_defaults_def_lossy.j2 b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_256x200G-2x10G/buffers_defaults_def_lossy.j2 new file mode 100644 index 00000000000..df3a836c6cf --- /dev/null +++ b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_256x200G-2x10G/buffers_defaults_def_lossy.j2 @@ -0,0 +1,51 @@ +{%- set default_cable = '40m' %} + +{# BUFFER_POOL, BUFFER_PROFILE #} +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "lossy_pool": { + "size": "182386688", + "type": "egress", + "mode": "dynamic", + "xoff": "0" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"lossy_pool", + "size":"0", + "static_th":"22798336" + }, + "egress_lossy_profile": { + "pool":"lossy_pool", + "size":"1518", + "dynamic_th":"2" + } + }, +{%- endmacro %} + + +{# BUFFER_PG #} +{%- macro generate_pg_profils(port_names_active) %} + "BUFFER_PG": { +{% for port in port_names_active.split(',') %} + "{{ port }}|0-7": { + "profile" : "ingress_lossy_profile" + }{% if not loop.last %},{% endif %} + +{% endfor %} + }, +{%- endmacro %} + + +{# BUFFER_QUEUE #} +{%- macro generate_queue_buffers(port_names_active) %} + "BUFFER_QUEUE": { +{% for port in port_names_active.split(',') %} + "{{ port }}|0-7": { + "profile" : "egress_lossy_profile" + }{% if not loop.last %},{% endif %} + +{% endfor %} + } +{%- endmacro %} diff --git a/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_256x200G-2x10G/buffers_defaults_t0.j2 b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_256x200G-2x10G/buffers_defaults_t0.j2 new file mode 100755 index 00000000000..59524186cb8 --- /dev/null +++ b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_256x200G-2x10G/buffers_defaults_t0.j2 @@ -0,0 +1,120 @@ +{%- set default_cable = '40m' %} + +{%- macro generate_service_port_list(PORT_SERVICE) -%} + {%- if PORT_SERVICE.append("Ethernet512") %}{% endif %} + {%- if PORT_SERVICE.append("Ethernet513") %}{% endif %} +{%- endmacro %} + +{%- set PORT_SERVICE = [] %} +{%- if generate_service_port_list is defined %} + {%- if generate_service_port_list(PORT_SERVICE) %}{% endif %} +{%- endif %} + +{# BUFFER_POOL, BUFFER_PROFILE #} +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "158630302", + "type": "ingress", + "mode": "dynamic", + "xoff": "71577600" + }, + "lossy_pool": { + "size": "56012386", + "type": "egress", + "mode": "dynamic", + "xoff": "0" + }, + "egress_lossless_pool": { + "size": "214642688", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossless_profile": { + "pool":"ingress_lossless_pool", + "xoff":"135520", + "size":"1518", + "dynamic_th":"1", + "xon_offset":"9408" + }, + "egress_lossless_profile": { + "pool":"ingress_lossless_pool", + "size":"0", + "static_th":"22798336" + }, + "ingress_lossy_profile": { + "pool":"lossy_pool", + "size":"0", + "static_th":"22798336" + }, + "egress_lossy_profile": { + "pool":"lossy_pool", + "size":"1518", + "dynamic_th":"2" + } + }, +{%- endmacro %} + +{# BUFFER_PG #} +{%- macro generate_pg_profils(port_names_active) %} + "BUFFER_PG": { +{% for port in port_names_active.split(',') %} +{% if port in PORT_SERVICE %} + "{{ port }}|3-4": { + "profile" : "ingress_lossy_profile" + }, +{% else %} + "{{ port }}|3-4": { + "profile" : "ingress_lossless_profile" + }, +{% endif %} +{% endfor %} +{% for port in port_names_active.split(',') %} + "{{ port }}|0": { + "profile" : "ingress_lossy_profile" + }, +{% endfor %} +{% for port in port_names_active.split(',') %} + "{{ port }}|1-2": { + "profile" : "ingress_lossy_profile" + }, +{% endfor %} +{% for port in port_names_active.split(',') %} + "{{ port }}|5-7": { + "profile" : "ingress_lossy_profile" + }{% if not loop.last %},{% endif %} + +{% endfor %} + }, +{%- endmacro %} + +{# BUFFER_QUEUE #} +{%- macro generate_queue_buffers(port_names_active) %} + "BUFFER_QUEUE": { +{% for port in port_names_active.split(',') %} +{% if port in PORT_SERVICE %} + "{{ port }}|3-4": { + "profile" : "egress_lossy_profile" + }, +{% else %} + "{{ port }}|3-4": { + "profile" : "egress_lossless_profile" + }, +{% endif %} +{% endfor %} +{% for port in port_names_active.split(',') %} + "{{ port }}|0-2": { + "profile" : "egress_lossy_profile" + }, +{% endfor %} +{% for port in port_names_active.split(',') %} + "{{ port }}|5-7": { + "profile" : "egress_lossy_profile" + }{% if not loop.last %},{% endif %} + +{% endfor %} + } +{%- endmacro %} + diff --git a/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_256x200G-2x10G/buffers_defaults_t1.j2 b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_256x200G-2x10G/buffers_defaults_t1.j2 new file mode 100644 index 00000000000..59524186cb8 --- /dev/null +++ b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_256x200G-2x10G/buffers_defaults_t1.j2 @@ -0,0 +1,120 @@ +{%- set default_cable = '40m' %} + +{%- macro generate_service_port_list(PORT_SERVICE) -%} + {%- if PORT_SERVICE.append("Ethernet512") %}{% endif %} + {%- if PORT_SERVICE.append("Ethernet513") %}{% endif %} +{%- endmacro %} + +{%- set PORT_SERVICE = [] %} +{%- if generate_service_port_list is defined %} + {%- if generate_service_port_list(PORT_SERVICE) %}{% endif %} +{%- endif %} + +{# BUFFER_POOL, BUFFER_PROFILE #} +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "158630302", + "type": "ingress", + "mode": "dynamic", + "xoff": "71577600" + }, + "lossy_pool": { + "size": "56012386", + "type": "egress", + "mode": "dynamic", + "xoff": "0" + }, + "egress_lossless_pool": { + "size": "214642688", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossless_profile": { + "pool":"ingress_lossless_pool", + "xoff":"135520", + "size":"1518", + "dynamic_th":"1", + "xon_offset":"9408" + }, + "egress_lossless_profile": { + "pool":"ingress_lossless_pool", + "size":"0", + "static_th":"22798336" + }, + "ingress_lossy_profile": { + "pool":"lossy_pool", + "size":"0", + "static_th":"22798336" + }, + "egress_lossy_profile": { + "pool":"lossy_pool", + "size":"1518", + "dynamic_th":"2" + } + }, +{%- endmacro %} + +{# BUFFER_PG #} +{%- macro generate_pg_profils(port_names_active) %} + "BUFFER_PG": { +{% for port in port_names_active.split(',') %} +{% if port in PORT_SERVICE %} + "{{ port }}|3-4": { + "profile" : "ingress_lossy_profile" + }, +{% else %} + "{{ port }}|3-4": { + "profile" : "ingress_lossless_profile" + }, +{% endif %} +{% endfor %} +{% for port in port_names_active.split(',') %} + "{{ port }}|0": { + "profile" : "ingress_lossy_profile" + }, +{% endfor %} +{% for port in port_names_active.split(',') %} + "{{ port }}|1-2": { + "profile" : "ingress_lossy_profile" + }, +{% endfor %} +{% for port in port_names_active.split(',') %} + "{{ port }}|5-7": { + "profile" : "ingress_lossy_profile" + }{% if not loop.last %},{% endif %} + +{% endfor %} + }, +{%- endmacro %} + +{# BUFFER_QUEUE #} +{%- macro generate_queue_buffers(port_names_active) %} + "BUFFER_QUEUE": { +{% for port in port_names_active.split(',') %} +{% if port in PORT_SERVICE %} + "{{ port }}|3-4": { + "profile" : "egress_lossy_profile" + }, +{% else %} + "{{ port }}|3-4": { + "profile" : "egress_lossless_profile" + }, +{% endif %} +{% endfor %} +{% for port in port_names_active.split(',') %} + "{{ port }}|0-2": { + "profile" : "egress_lossy_profile" + }, +{% endfor %} +{% for port in port_names_active.split(',') %} + "{{ port }}|5-7": { + "profile" : "egress_lossy_profile" + }{% if not loop.last %},{% endif %} + +{% endfor %} + } +{%- endmacro %} + diff --git a/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_256x200G-2x10G/config_tl10_d64p512t_256x200G.yaml b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_256x200G-2x10G/config_tl10_d64p512t_256x200G.yaml new file mode 100644 index 00000000000..53d8adb655e --- /dev/null +++ b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_256x200G-2x10G/config_tl10_d64p512t_256x200G.yaml @@ -0,0 +1,2170 @@ +ifcs: + options: + log_level: "warn" +nodes: +- node_id: "0" + options: + sku: "configs/sku/teralynx.MVTX9180" + netdev: + - auto_create: "no" + multi_interface: "yes" + buffer_management_mode: "api_driven" + pt01: "896" + wred_cr_ip_proto_list: "17" + cr_assignment_mode: "1" + max_lossless_tc: "2" + ilpm_enable: "1" + forward_profile: "IFCS_FORWARD_PROFILE_ID_PROFILE_E" + ecmp_hierarchical_enable: "1" + intf_outer_l2_term_mode: "loose" + multicast_lag_resolution_enable: "1" + skip_pll_check: "false" + sys_clk: "1800" + ifc_clk: "1800" + mac_clk: "1600" + ecmp_alb_enable: "1" + alb_port_state_enable: "1" + ecmp_alb_timeout_step_size: "2" + bfd_config: + - offload_enable: "true" + txring: + - txring_id: "0" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "1" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "2" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "3" + desc_count: "1024" + prio: "1" + netdev: "true" + rxring: + - rxring_id: "0" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "0, 4, 8, 12, 16, 20, 24, 28, 32, 36, 40, 44" + - rxring_id: "1" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "1, 9, 13, 17, 21, 25, 29, 33, 37, 41, 45" + - rxring_id: "2" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "2, 6, 10, 14, 18, 22, 26, 30, 34, 38, 42, 46" + - rxring_id: "3" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "3, 7, 11, 15, 19, 23, 27, 31, 35, 39, 43, 47" + - rxring_id: "4" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "5" + ib: + - id: "0" + temp_threshold: "92" + - id: "1" + temp_threshold: "92" + - id: "2" + temp_threshold: "92" + - id: "3" + temp_threshold: "92" + - id: "4" + temp_threshold: "92" + - id: "5" + temp_threshold: "92" + - id: "6" + temp_threshold: "92" + - id: "7" + temp_threshold: "92" + devports: + - id: "0" + sysport: "1000" + type: "cpu" + - fec: "NONE" + id: "513" + lanes: "0:1" + serdes_group: "64" + speed: "10G" + #auto_neg: "true" + #link_training: "true" + #bp_tech_ability: "10GBASE_KR" + sysport: "513" + type: "mgmt 0" + - fec: "NONE" + id: "514" + lanes: "1:1" + serdes_group: "64" + speed: "10G" + #auto_neg: "true" + #link_training: "true" + #bp_tech_ability: "10GBASE_KR" + sysport: "514" + type: "mgmt 1" + - fec: "KPFEC" + id: "489" + lanes: "0:2" + serdes_group: "61" + speed: "200G" + sysport: "489" + type: "eth" + - fec: "KPFEC" + id: "491" + lanes: "2:2" + serdes_group: "61" + speed: "200G" + sysport: "491" + type: "eth" + - fec: "KPFEC" + id: "493" + lanes: "4:2" + serdes_group: "61" + speed: "200G" + sysport: "493" + type: "eth" + - fec: "KPFEC" + id: "495" + lanes: "6:2" + serdes_group: "61" + speed: "200G" + sysport: "495" + type: "eth" + - fec: "KPFEC" + id: "505" + lanes: "0:2" + serdes_group: "63" + speed: "200G" + sysport: "505" + type: "eth" + - fec: "KPFEC" + id: "507" + lanes: "2:2" + serdes_group: "63" + speed: "200G" + sysport: "507" + type: "eth" + - fec: "KPFEC" + id: "509" + lanes: "4:2" + serdes_group: "63" + speed: "200G" + sysport: "509" + type: "eth" + - fec: "KPFEC" + id: "511" + lanes: "6:2" + serdes_group: "63" + speed: "200G" + sysport: "511" + type: "eth" + - fec: "KPFEC" + id: "441" + lanes: "0:2" + serdes_group: "55" + speed: "200G" + sysport: "441" + type: "eth" + - fec: "KPFEC" + id: "443" + lanes: "2:2" + serdes_group: "55" + speed: "200G" + sysport: "443" + type: "eth" + - fec: "KPFEC" + id: "445" + lanes: "4:2" + serdes_group: "55" + speed: "200G" + sysport: "445" + type: "eth" + - fec: "KPFEC" + id: "447" + lanes: "6:2" + serdes_group: "55" + speed: "200G" + sysport: "447" + type: "eth" + - fec: "KPFEC" + id: "425" + lanes: "0:2" + serdes_group: "53" + speed: "200G" + sysport: "425" + type: "eth" + - fec: "KPFEC" + id: "427" + lanes: "2:2" + serdes_group: "53" + speed: "200G" + sysport: "427" + type: "eth" + - fec: "KPFEC" + id: "429" + lanes: "4:2" + serdes_group: "53" + speed: "200G" + sysport: "429" + type: "eth" + - fec: "KPFEC" + id: "431" + lanes: "6:2" + serdes_group: "53" + speed: "200G" + sysport: "431" + type: "eth" + - fec: "KPFEC" + id: "41" + lanes: "0:2" + serdes_group: "5" + speed: "200G" + sysport: "41" + type: "eth" + - fec: "KPFEC" + id: "43" + lanes: "2:2" + serdes_group: "5" + speed: "200G" + sysport: "43" + type: "eth" + - fec: "KPFEC" + id: "45" + lanes: "4:2" + serdes_group: "5" + speed: "200G" + sysport: "45" + type: "eth" + - fec: "KPFEC" + id: "47" + lanes: "6:2" + serdes_group: "5" + speed: "200G" + sysport: "47" + type: "eth" + - fec: "KPFEC" + id: "49" + lanes: "0:2" + serdes_group: "6" + speed: "200G" + sysport: "49" + type: "eth" + - fec: "KPFEC" + id: "51" + lanes: "2:2" + serdes_group: "6" + speed: "200G" + sysport: "51" + type: "eth" + - fec: "KPFEC" + id: "53" + lanes: "4:2" + serdes_group: "6" + speed: "200G" + sysport: "53" + type: "eth" + - fec: "KPFEC" + id: "55" + lanes: "6:2" + serdes_group: "6" + speed: "200G" + sysport: "55" + type: "eth" + - fec: "KPFEC" + id: "153" + lanes: "0:2" + serdes_group: "19" + speed: "200G" + sysport: "153" + type: "eth" + - fec: "KPFEC" + id: "155" + lanes: "2:2" + serdes_group: "19" + speed: "200G" + sysport: "155" + type: "eth" + - fec: "KPFEC" + id: "157" + lanes: "4:2" + serdes_group: "19" + speed: "200G" + sysport: "157" + type: "eth" + - fec: "KPFEC" + id: "159" + lanes: "6:2" + serdes_group: "19" + speed: "200G" + sysport: "159" + type: "eth" + - fec: "KPFEC" + id: "137" + lanes: "0:2" + serdes_group: "17" + speed: "200G" + sysport: "137" + type: "eth" + - fec: "KPFEC" + id: "139" + lanes: "2:2" + serdes_group: "17" + speed: "200G" + sysport: "139" + type: "eth" + - fec: "KPFEC" + id: "141" + lanes: "4:2" + serdes_group: "17" + speed: "200G" + sysport: "141" + type: "eth" + - fec: "KPFEC" + id: "143" + lanes: "6:2" + serdes_group: "17" + speed: "200G" + sysport: "143" + type: "eth" + - fec: "KPFEC" + id: "1" + lanes: "0:2" + serdes_group: "0" + speed: "200G" + sysport: "1" + type: "eth" + - fec: "KPFEC" + id: "3" + lanes: "2:2" + serdes_group: "0" + speed: "200G" + sysport: "3" + type: "eth" + - fec: "KPFEC" + id: "5" + lanes: "4:2" + serdes_group: "0" + speed: "200G" + sysport: "5" + type: "eth" + - fec: "KPFEC" + id: "7" + lanes: "6:2" + serdes_group: "0" + speed: "200G" + sysport: "7" + type: "eth" + - fec: "KPFEC" + id: "17" + lanes: "0:2" + serdes_group: "2" + speed: "200G" + sysport: "17" + type: "eth" + - fec: "KPFEC" + id: "19" + lanes: "2:2" + serdes_group: "2" + speed: "200G" + sysport: "19" + type: "eth" + - fec: "KPFEC" + id: "21" + lanes: "4:2" + serdes_group: "2" + speed: "200G" + sysport: "21" + type: "eth" + - fec: "KPFEC" + id: "23" + lanes: "6:2" + serdes_group: "2" + speed: "200G" + sysport: "23" + type: "eth" + - fec: "KPFEC" + id: "81" + lanes: "0:2" + serdes_group: "10" + speed: "200G" + sysport: "81" + type: "eth" + - fec: "KPFEC" + id: "83" + lanes: "2:2" + serdes_group: "10" + speed: "200G" + sysport: "83" + type: "eth" + - fec: "KPFEC" + id: "85" + lanes: "4:2" + serdes_group: "10" + speed: "200G" + sysport: "85" + type: "eth" + - fec: "KPFEC" + id: "87" + lanes: "6:2" + serdes_group: "10" + speed: "200G" + sysport: "87" + type: "eth" + - fec: "KPFEC" + id: "65" + lanes: "0:2" + serdes_group: "8" + speed: "200G" + sysport: "65" + type: "eth" + - fec: "KPFEC" + id: "67" + lanes: "2:2" + serdes_group: "8" + speed: "200G" + sysport: "67" + type: "eth" + - fec: "KPFEC" + id: "69" + lanes: "4:2" + serdes_group: "8" + speed: "200G" + sysport: "69" + type: "eth" + - fec: "KPFEC" + id: "71" + lanes: "6:2" + serdes_group: "8" + speed: "200G" + sysport: "71" + type: "eth" + - fec: "KPFEC" + id: "97" + lanes: "0:2" + serdes_group: "12" + speed: "200G" + sysport: "97" + type: "eth" + - fec: "KPFEC" + id: "99" + lanes: "2:2" + serdes_group: "12" + speed: "200G" + sysport: "99" + type: "eth" + - fec: "KPFEC" + id: "101" + lanes: "4:2" + serdes_group: "12" + speed: "200G" + sysport: "101" + type: "eth" + - fec: "KPFEC" + id: "103" + lanes: "6:2" + serdes_group: "12" + speed: "200G" + sysport: "103" + type: "eth" + - fec: "KPFEC" + id: "113" + lanes: "0:2" + serdes_group: "14" + speed: "200G" + sysport: "113" + type: "eth" + - fec: "KPFEC" + id: "115" + lanes: "2:2" + serdes_group: "14" + speed: "200G" + sysport: "115" + type: "eth" + - fec: "KPFEC" + id: "117" + lanes: "4:2" + serdes_group: "14" + speed: "200G" + sysport: "117" + type: "eth" + - fec: "KPFEC" + id: "119" + lanes: "6:2" + serdes_group: "14" + speed: "200G" + sysport: "119" + type: "eth" + - fec: "KPFEC" + id: "193" + lanes: "0:2" + serdes_group: "24" + speed: "200G" + sysport: "193" + type: "eth" + - fec: "KPFEC" + id: "195" + lanes: "2:2" + serdes_group: "24" + speed: "200G" + sysport: "195" + type: "eth" + - fec: "KPFEC" + id: "197" + lanes: "4:2" + serdes_group: "24" + speed: "200G" + sysport: "197" + type: "eth" + - fec: "KPFEC" + id: "199" + lanes: "6:2" + serdes_group: "24" + speed: "200G" + sysport: "199" + type: "eth" + - fec: "KPFEC" + id: "177" + lanes: "0:2" + serdes_group: "22" + speed: "200G" + sysport: "177" + type: "eth" + - fec: "KPFEC" + id: "179" + lanes: "2:2" + serdes_group: "22" + speed: "200G" + sysport: "179" + type: "eth" + - fec: "KPFEC" + id: "181" + lanes: "4:2" + serdes_group: "22" + speed: "200G" + sysport: "181" + type: "eth" + - fec: "KPFEC" + id: "183" + lanes: "6:2" + serdes_group: "22" + speed: "200G" + sysport: "183" + type: "eth" + - fec: "KPFEC" + id: "33" + lanes: "0:2" + serdes_group: "4" + speed: "200G" + sysport: "33" + type: "eth" + - fec: "KPFEC" + id: "35" + lanes: "2:2" + serdes_group: "4" + speed: "200G" + sysport: "35" + type: "eth" + - fec: "KPFEC" + id: "37" + lanes: "4:2" + serdes_group: "4" + speed: "200G" + sysport: "37" + type: "eth" + - fec: "KPFEC" + id: "39" + lanes: "6:2" + serdes_group: "4" + speed: "200G" + sysport: "39" + type: "eth" + - fec: "KPFEC" + id: "57" + lanes: "0:2" + serdes_group: "7" + speed: "200G" + sysport: "57" + type: "eth" + - fec: "KPFEC" + id: "59" + lanes: "2:2" + serdes_group: "7" + speed: "200G" + sysport: "59" + type: "eth" + - fec: "KPFEC" + id: "61" + lanes: "4:2" + serdes_group: "7" + speed: "200G" + sysport: "61" + type: "eth" + - fec: "KPFEC" + id: "63" + lanes: "6:2" + serdes_group: "7" + speed: "200G" + sysport: "63" + type: "eth" + - fec: "KPFEC" + id: "161" + lanes: "0:2" + serdes_group: "20" + speed: "200G" + sysport: "161" + type: "eth" + - fec: "KPFEC" + id: "163" + lanes: "2:2" + serdes_group: "20" + speed: "200G" + sysport: "163" + type: "eth" + - fec: "KPFEC" + id: "165" + lanes: "4:2" + serdes_group: "20" + speed: "200G" + sysport: "165" + type: "eth" + - fec: "KPFEC" + id: "167" + lanes: "6:2" + serdes_group: "20" + speed: "200G" + sysport: "167" + type: "eth" + - fec: "KPFEC" + id: "129" + lanes: "0:2" + serdes_group: "16" + speed: "200G" + sysport: "129" + type: "eth" + - fec: "KPFEC" + id: "131" + lanes: "2:2" + serdes_group: "16" + speed: "200G" + sysport: "131" + type: "eth" + - fec: "KPFEC" + id: "133" + lanes: "4:2" + serdes_group: "16" + speed: "200G" + sysport: "133" + type: "eth" + - fec: "KPFEC" + id: "135" + lanes: "6:2" + serdes_group: "16" + speed: "200G" + sysport: "135" + type: "eth" + - fec: "KPFEC" + id: "217" + lanes: "0:2" + serdes_group: "27" + speed: "200G" + sysport: "217" + type: "eth" + - fec: "KPFEC" + id: "219" + lanes: "2:2" + serdes_group: "27" + speed: "200G" + sysport: "219" + type: "eth" + - fec: "KPFEC" + id: "221" + lanes: "4:2" + serdes_group: "27" + speed: "200G" + sysport: "221" + type: "eth" + - fec: "KPFEC" + id: "223" + lanes: "6:2" + serdes_group: "27" + speed: "200G" + sysport: "223" + type: "eth" + - fec: "KPFEC" + id: "241" + lanes: "0:2" + serdes_group: "30" + speed: "200G" + sysport: "241" + type: "eth" + - fec: "KPFEC" + id: "243" + lanes: "2:2" + serdes_group: "30" + speed: "200G" + sysport: "243" + type: "eth" + - fec: "KPFEC" + id: "245" + lanes: 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lanes: "4:2" + serdes_group: "45" + speed: "200G" + sysport: "365" + type: "eth" + - fec: "KPFEC" + id: "367" + lanes: "6:2" + serdes_group: "45" + speed: "200G" + sysport: "367" + type: "eth" + - fec: "KPFEC" + id: "337" + lanes: "0:2" + serdes_group: "42" + speed: "200G" + sysport: "337" + type: "eth" + - fec: "KPFEC" + id: "339" + lanes: "2:2" + serdes_group: "42" + speed: "200G" + sysport: "339" + type: "eth" + - fec: "KPFEC" + id: "341" + lanes: "4:2" + serdes_group: "42" + speed: "200G" + sysport: "341" + type: "eth" + - fec: "KPFEC" + id: "343" + lanes: "6:2" + serdes_group: "42" + speed: "200G" + sysport: "343" + type: "eth" + - fec: "KPFEC" + id: "481" + lanes: "0:2" + serdes_group: "60" + speed: "200G" + sysport: "481" + type: "eth" + - fec: "KPFEC" + id: "483" + lanes: "2:2" + serdes_group: "60" + speed: "200G" + sysport: "483" + type: "eth" + - fec: "KPFEC" + id: "485" + lanes: "4:2" + serdes_group: "60" + speed: "200G" + sysport: "485" + type: "eth" + - fec: "KPFEC" + id: "487" + lanes: "6:2" + serdes_group: "60" + speed: "200G" + sysport: "487" + type: "eth" + - fec: "KPFEC" + id: "497" + lanes: "0:2" + serdes_group: "62" + speed: "200G" + sysport: "497" + type: "eth" + - fec: "KPFEC" + id: "499" + lanes: "2:2" + serdes_group: "62" + speed: "200G" + sysport: "499" + type: "eth" + - fec: "KPFEC" + id: "501" + lanes: "4:2" + serdes_group: "62" + speed: "200G" + sysport: "501" + type: "eth" + - fec: "KPFEC" + id: "503" + lanes: "6:2" + serdes_group: "62" + speed: "200G" + sysport: "503" + type: "eth" + - fec: "KPFEC" + id: "433" + lanes: "0:2" + serdes_group: "54" + speed: "200G" + sysport: "433" + type: "eth" + - fec: "KPFEC" + id: "435" + lanes: "2:2" + serdes_group: "54" + speed: "200G" + sysport: "435" + type: "eth" + - fec: "KPFEC" + id: "437" + lanes: "4:2" + serdes_group: "54" + speed: "200G" + sysport: "437" + type: "eth" + - fec: "KPFEC" + id: "439" + lanes: "6:2" + serdes_group: "54" + speed: "200G" + sysport: "439" + type: "eth" + - fec: "KPFEC" + id: "417" + lanes: "0:2" + serdes_group: "52" + speed: "200G" + sysport: "417" + type: "eth" + - fec: "KPFEC" + id: "419" + lanes: "2:2" + serdes_group: "52" + speed: "200G" + sysport: "419" + type: "eth" + - fec: "KPFEC" + id: "421" + lanes: "4:2" + serdes_group: "52" + speed: "200G" + sysport: "421" + type: "eth" + - fec: "KPFEC" + id: "423" + lanes: "6:2" + serdes_group: "52" + speed: "200G" + sysport: "423" + type: "eth" + - fec: "KPFEC" + id: "449" + lanes: "0:2" + serdes_group: "56" + speed: "200G" + sysport: "449" + type: "eth" + - fec: "KPFEC" + id: "451" + lanes: "2:2" + serdes_group: "56" + speed: "200G" + sysport: "451" + type: "eth" + - fec: "KPFEC" + id: "453" + lanes: "4:2" + serdes_group: "56" + speed: "200G" + sysport: "453" + type: "eth" + - fec: "KPFEC" + id: "455" + lanes: "6:2" + serdes_group: "56" + speed: "200G" + sysport: "455" + type: "eth" + - fec: "KPFEC" + id: "473" + lanes: "0:2" + serdes_group: "59" + speed: "200G" + sysport: "473" + type: "eth" + - fec: "KPFEC" + id: "475" + lanes: "2:2" + serdes_group: "59" + speed: "200G" + sysport: "475" + type: "eth" + - fec: "KPFEC" + id: "477" + lanes: "4:2" + serdes_group: "59" + speed: "200G" + sysport: "477" + type: "eth" + - fec: "KPFEC" + id: "479" + lanes: "6:2" + serdes_group: "59" + speed: "200G" + sysport: "479" + type: "eth" + - fec: "KPFEC" + id: "377" + lanes: "0:2" + serdes_group: "47" + speed: "200G" + sysport: "377" + type: "eth" + - fec: "KPFEC" + id: "379" + lanes: "2:2" + serdes_group: "47" + speed: "200G" + sysport: "379" + type: "eth" + - fec: "KPFEC" + id: "381" + lanes: "4:2" + serdes_group: "47" + speed: "200G" + sysport: "381" + type: "eth" + - fec: "KPFEC" + id: "383" + lanes: "6:2" + serdes_group: "47" + speed: "200G" + sysport: "383" + type: "eth" + - fec: "KPFEC" + id: "345" + lanes: "0:2" + serdes_group: "43" + speed: "200G" + sysport: "345" + type: "eth" + - fec: "KPFEC" + id: "347" + lanes: "2:2" + serdes_group: "43" + speed: "200G" + sysport: "347" + type: "eth" + - fec: "KPFEC" + id: "349" + lanes: "4:2" + serdes_group: "43" + speed: "200G" + sysport: "349" + type: "eth" + - fec: "KPFEC" + id: "351" + lanes: "6:2" + serdes_group: "43" + speed: "200G" + sysport: "351" + type: "eth" + - fec: "KPFEC" + id: "9" + lanes: "0:2" + serdes_group: "1" + speed: "200G" + sysport: "9" + type: "eth" + - fec: "KPFEC" + id: "11" + lanes: "2:2" + serdes_group: "1" + speed: "200G" + sysport: "11" + type: "eth" + - fec: "KPFEC" + id: "13" + lanes: "4:2" + serdes_group: "1" + speed: "200G" + sysport: "13" + type: "eth" + - fec: "KPFEC" + id: "15" + lanes: "6:2" + serdes_group: "1" + speed: "200G" + sysport: "15" + type: "eth" + - fec: "KPFEC" + id: "25" + lanes: "0:2" + serdes_group: "3" + speed: "200G" + sysport: "25" + type: "eth" + - fec: "KPFEC" + id: "27" + lanes: "2:2" + serdes_group: "3" + speed: "200G" + sysport: "27" + type: "eth" + - fec: "KPFEC" + id: "29" + lanes: "4:2" + serdes_group: "3" + speed: "200G" + sysport: "29" + type: "eth" + - fec: "KPFEC" + id: "31" + lanes: "6:2" + serdes_group: "3" + speed: "200G" + sysport: "31" + type: "eth" + - fec: "KPFEC" + id: "89" + lanes: "0:2" + serdes_group: "11" + speed: "200G" + sysport: "89" + type: "eth" + - fec: "KPFEC" + id: "91" + lanes: "2:2" + serdes_group: "11" + speed: "200G" + sysport: "91" + type: "eth" + - fec: "KPFEC" + id: "93" + lanes: "4:2" + serdes_group: "11" + speed: "200G" + sysport: "93" + type: "eth" + - fec: "KPFEC" + id: "95" + lanes: "6:2" + serdes_group: "11" + speed: "200G" + sysport: "95" + type: "eth" + - fec: "KPFEC" + id: "73" + lanes: "0:2" + serdes_group: "9" + speed: "200G" + sysport: "73" + type: "eth" + - fec: "KPFEC" + id: "75" + lanes: "2:2" + serdes_group: "9" + speed: "200G" + sysport: "75" + type: "eth" + - fec: "KPFEC" + id: "77" + lanes: "4:2" + serdes_group: "9" + speed: "200G" + sysport: "77" + type: "eth" + - fec: "KPFEC" + id: "79" + lanes: "6:2" + serdes_group: "9" + speed: "200G" + sysport: "79" + type: "eth" + isg: + - id: "0" + lane_swap: "23016754" + rx_polarity: "10001000" + tx_polarity: "00001111" + - id: "1" + lane_swap: "32107645" + rx_polarity: "00100110" + tx_polarity: "10100011" + - id: "2" + lane_swap: "01236457" + rx_polarity: "10010001" + tx_polarity: "10001111" + - id: "3" + lane_swap: "10324675" + rx_polarity: "11000110" + tx_polarity: "11111010" + - id: "4" + lane_swap: "23016754" + rx_polarity: "10001000" + tx_polarity: "00001111" + - id: "5" + lane_swap: "32104675" + rx_polarity: "01001111" + tx_polarity: "11100010" + - id: "6" + lane_swap: "12306475" + rx_polarity: "10011011" + tx_polarity: "11001110" + - id: "7" + lane_swap: "21034657" + rx_polarity: "11001110" + tx_polarity: "10011011" + - id: "8" + lane_swap: "30127465" + rx_polarity: "10111011" + tx_polarity: "11011101" + - id: "9" + lane_swap: "03214756" + rx_polarity: "11011101" + tx_polarity: "10111011" + - id: "10" + lane_swap: "12306475" + rx_polarity: "10011011" + tx_polarity: "10001110" + - id: "11" + lane_swap: "21034657" + rx_polarity: "11001110" + tx_polarity: "10011011" + - id: "12" + lane_swap: "30127465" + rx_polarity: "11110100" + tx_polarity: "10010111" + - id: "13" + lane_swap: "03214756" + rx_polarity: "11011101" + tx_polarity: "10111011" + - id: "14" + lane_swap: "12306475" + rx_polarity: "11010100" + tx_polarity: "10000100" + - id: "15" + lane_swap: "21034657" + rx_polarity: "11001110" + tx_polarity: "10011011" + - id: "16" + lane_swap: "03214756" + rx_polarity: "01010101" + tx_polarity: "01000111" + - id: "17" + lane_swap: "03124756" + rx_polarity: "11011101" + tx_polarity: "00000100" + - id: "18" + lane_swap: "30217465" + rx_polarity: "01000100" + tx_polarity: "01110010" + - id: "19" + lane_swap: "12035746" + rx_polarity: "00000010" + tx_polarity: "10001000" + - id: "20" + lane_swap: "21034657" + rx_polarity: "00100110" + tx_polarity: "10010111" + - id: "21" + lane_swap: "21307564" + rx_polarity: "11001000" + tx_polarity: "01010010" + - id: "22" + lane_swap: "03124756" + rx_polarity: "00000010" + tx_polarity: "10111011" + - id: "23" + lane_swap: "30217465" + rx_polarity: "00011011" + tx_polarity: "01111010" + - id: "24" + lane_swap: "12035746" + rx_polarity: "01010010" + tx_polarity: "00110111" + - id: "25" + lane_swap: "21307564" + rx_polarity: "10000111" + tx_polarity: "01000110" + - id: "26" + lane_swap: "47562103" + rx_polarity: "01111111" + tx_polarity: "01111110" + - id: "27" + lane_swap: "46572103" + rx_polarity: "00000101" + tx_polarity: "10110011" + - id: "28" + lane_swap: "64751230" + rx_polarity: "10101000" + tx_polarity: "00100110" + - id: "29" + lane_swap: "47560123" + rx_polarity: "01111100" + tx_polarity: "10111001" + - id: "30" + lane_swap: "57460123" + rx_polarity: "00001100" + tx_polarity: "00100111" + - id: "31" + lane_swap: "75641032" + rx_polarity: "01100000" + tx_polarity: "00100111" + - id: "32" + lane_swap: "03214657" + rx_polarity: "10100010" + tx_polarity: "00011101" + - id: "33" + lane_swap: "30126475" + rx_polarity: "00110111" + tx_polarity: "00011000" + - id: "34" + lane_swap: "32107465" + rx_polarity: "01000000" + tx_polarity: "01000110" + - id: "35" + lane_swap: "21034756" + rx_polarity: "10110101" + tx_polarity: "00111101" + - id: "36" + lane_swap: "12307465" + rx_polarity: "00010111" + tx_polarity: "01101011" + - id: "37" + lane_swap: "32106475" + rx_polarity: "11100000" + tx_polarity: "10100101" + - id: "38" + lane_swap: "47560312" + rx_polarity: "10010010" + tx_polarity: "10101011" + - id: "39" + lane_swap: "47560312" + rx_polarity: "01110010" + tx_polarity: "11101110" + - id: "40" + lane_swap: "56470213" + rx_polarity: "11100011" + tx_polarity: "10001111" + - id: "41" + lane_swap: "56470213" + rx_polarity: "00110011" + tx_polarity: "11101010" + - id: "42" + lane_swap: "74653021" + rx_polarity: "01000100" + tx_polarity: "01110010" + - id: "43" + lane_swap: "46570321" + rx_polarity: "00110100" + tx_polarity: "10110100" + - id: "44" + lane_swap: "47560312" + rx_polarity: "00100010" + tx_polarity: "00000100" + - id: "45" + lane_swap: "65742031" + rx_polarity: "01000000" + tx_polarity: "01000011" + - id: "46" + lane_swap: "56470213" + rx_polarity: "11101100" + tx_polarity: "00000000" + - id: "47" + lane_swap: "46572301" + rx_polarity: "01010111" + tx_polarity: "11100100" + - id: "48" + lane_swap: "74653012" + rx_polarity: "10111011" + tx_polarity: "11011101" + - id: "49" + lane_swap: "47560321" + rx_polarity: "10010010" + tx_polarity: "11110001" + - id: "50" + lane_swap: "65743210" + rx_polarity: "00010011" + tx_polarity: "11011111" + - id: "51" + lane_swap: "56472301" + rx_polarity: "10010000" + tx_polarity: "01011001" + - id: "52" + lane_swap: "74653012" + rx_polarity: "10111011" + tx_polarity: "11011101" + - id: "53" + lane_swap: "47560321" + rx_polarity: "11011101" + tx_polarity: "11111011" + - id: "54" + lane_swap: "65743210" + rx_polarity: "00010011" + tx_polarity: "11011111" + - id: "55" + lane_swap: "56472301" + rx_polarity: "11011111" + tx_polarity: "00010011" + - id: "56" + lane_swap: "74653012" + rx_polarity: "10111011" + tx_polarity: "11011101" + - id: "57" + lane_swap: "47560321" + rx_polarity: "11011101" + tx_polarity: "10111011" + - id: "58" + lane_swap: "67542103" + rx_polarity: "01010100" + tx_polarity: "00101111" + - id: "59" + lane_swap: "76451230" + rx_polarity: "11000010" + tx_polarity: "10010011" + - id: "60" + lane_swap: "54670123" + rx_polarity: "01010011" + tx_polarity: "10001001" + - id: "61" + lane_swap: "45761032" + rx_polarity: "01100110" + tx_polarity: "10011010" + - id: "62" + lane_swap: "67542103" + rx_polarity: "11110010" + tx_polarity: "01001001" + - id: "63" + lane_swap: "76451230" + rx_polarity: "01000010" + tx_polarity: "00011011" + - id: "64" + lane_swap: "01234567" + rx_polarity: "01000000" + tx_polarity: "00000000" + #pre1: "-4,-4,-4,-4,-4,-4,-4,-4" + #pre2: "-1,-1,-1,-1,-1,-1,-1,-1" + #post: "-4,-4,-4,-4,-4,-4,-4,-4" + #main: "52,52,52,52,52,52,52,52" diff --git a/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_256x200G-2x10G/ivm.sai.config.yaml b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_256x200G-2x10G/ivm.sai.config.yaml new file mode 100755 index 00000000000..31f93aa94f8 --- /dev/null +++ b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_256x200G-2x10G/ivm.sai.config.yaml @@ -0,0 +1,14 @@ +IFCS_INIT_FILE : "/usr/share/sonic/hwsku/config_tl10_d64p512t_256x200G.yaml" +IFCS_SKU_FILE : "/usr/share/sonic/hwsku/teralynx.MVTX9180" +IFCS_INNO_CLI_PORT : "9999" +IFCS_TARGET : "device" +INNOVIUM_DIR : "/innovium" +PYTHONPATH : "$INNOVIUM_DIR:$INNOVIUM_DIR/cmds:$INNOVIUM_DIR/scripts:$INNOVIUM_DIR/test/:$INNOVIUM_DIR/test/utils:$INNOVIUM_DIR/utils:$INNOVIUM_DIR/pyctypes:$INNOVIUM_DIR/ifcs_cmds:$INNOVIUM_DIR/testutil" +IVM_SAI_DATAPATH_CONFIG_FILE: "/usr/share/sonic/hwsku/ivm.sai.datapath.config.yaml" +IVM_SAI_PARAM_A0008: "64" +IVM_SAI_PARAM_A0016: "1,1,0,0,1" +IVM_SAI_PARAM_A0003: "4" +IVM_SAI_PARAM_A0059: "TRUE" +IVM_SAI_PARAM_A0007: "9" +IVM_SAI_PARAM_A003D: "1" +IVM_SAI_PARAM_A0068: "TRUE" diff --git a/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_256x200G-2x10G/ivm.sai.datapath.config.yaml b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_256x200G-2x10G/ivm.sai.datapath.config.yaml new file mode 100644 index 00000000000..a1b1db409e6 --- /dev/null +++ b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_256x200G-2x10G/ivm.sai.datapath.config.yaml @@ -0,0 +1,11 @@ +#Queue Type +ISAI_PARAM_A000 : "0" +ISAI_PARAM_P0_0_LS : "2304 2304 2304 2304 2304 2304 2304 2304" +ISAI_PARAM_P0_1_LS : "1736 1616 1616 1592 1592 1592 1592 1592" +ISAI_PARAM_P0_1_ALS : "200 80 80 56 56 56 56 56" +ISAI_PARAM_P1_0_LS : "768 768 768 768 768 768 768 768" +ISAI_PARAM_P1_0_LL : "1536 1536 1536 1536 1536 1536 1536 1536" +ISAI_PARAM_P1_1_LS : "1352 1232 1232 1208 1208 1208 1208 1208" +ISAI_PARAM_P1_1_LL : "3138 3138 3138 3138 3138 3138 3138 3138" +ISAI_PARAM_P1_1_ALS : "200 80 80 56 56 56 56 56" +ISAI_PARAM_P1_1_ALL : "86 86 86 86 86 86 86 86" diff --git a/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_256x200G-2x10G/pg_profile_lookup.ini b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_256x200G-2x10G/pg_profile_lookup.ini new file mode 100644 index 00000000000..3da08e28378 --- /dev/null +++ b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_256x200G-2x10G/pg_profile_lookup.ini @@ -0,0 +1,38 @@ +# PG lossless profiles. +# speed cable size xon xoff threshold xon_offset + 25000 1m 1518 0 18304 1 13824 + 50000 1m 1518 0 23808 1 13824 + 100000 1m 1518 0 39680 1 13824 + 200000 1m 1518 0 68864 1 13824 + 400000 1m 1518 0 127360 1 13824 + 800000 1m 1518 0 244864 1 13824 + 25000 2m 1518 0 18304 1 13824 + 50000 2m 1518 0 23808 1 13824 + 100000 2m 1518 0 39680 1 13824 + 200000 2m 1518 0 69504 1 13824 + 400000 2m 1518 0 127360 1 13824 + 800000 2m 1518 0 244864 1 13824 + 25000 5m 1518 0 18304 1 13824 + 50000 5m 1518 0 24064 1 13824 + 100000 5m 1518 0 40064 1 13824 + 200000 5m 1518 0 70272 1 13824 + 400000 5m 1518 0 129920 1 13824 + 800000 5m 1518 0 247424 1 13824 + 25000 40m 1518 0 19840 1 13824 + 50000 40m 1518 0 26240 1 13824 + 100000 40m 1518 0 44544 1 13824 + 200000 40m 1518 0 78848 1 13824 + 400000 40m 1518 0 147072 1 13824 + 800000 40m 1518 0 285312 1 13824 + 25000 100m 1518 0 22016 1 13824 + 50000 100m 1518 0 30080 1 13824 + 100000 100m 1518 0 52224 1 13824 + 200000 100m 1518 0 94464 1 13824 + 400000 100m 1518 0 178560 1 13824 + 800000 100m 1518 0 345984 1 13824 + 25000 300m 1518 0 29696 1 13824 + 50000 300m 1518 0 43008 1 13824 + 100000 300m 1518 0 77824 1 13824 + 200000 300m 1518 0 145536 1 13824 + 400000 300m 1518 0 280960 1 13824 + 800000 300m 1518 0 550528 1 13824 diff --git a/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_256x200G-2x10G/port_config.ini b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_256x200G-2x10G/port_config.ini new file mode 100644 index 00000000000..746d268656b --- /dev/null +++ b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_256x200G-2x10G/port_config.ini @@ -0,0 +1,259 @@ +#name lanes alias fec autoneg index speed subport +Ethernet0 1,2 etp1a rs off 0 200000 1 +Ethernet2 3,4 etp1b rs off 0 200000 2 +Ethernet4 5,6 etp1c rs off 0 200000 3 +Ethernet6 7,8 etp1d rs off 0 200000 4 +Ethernet8 17,18 etp2a rs off 1 200000 1 +Ethernet10 19,20 etp2b rs off 1 200000 2 +Ethernet12 21,22 etp2c rs off 1 200000 3 +Ethernet14 23,24 etp2d rs off 1 200000 4 +Ethernet16 25,26 etp3a rs off 2 200000 1 +Ethernet18 27,28 etp3b rs off 2 200000 2 +Ethernet20 29,30 etp3c rs off 2 200000 3 +Ethernet22 31,32 etp3d rs off 2 200000 4 +Ethernet24 9,10 etp4a rs off 3 200000 1 +Ethernet26 11,12 etp4b rs off 3 200000 2 +Ethernet28 13,14 etp4c rs off 3 200000 3 +Ethernet30 15,16 etp4d rs off 3 200000 4 +Ethernet32 33,34 etp5a rs off 4 200000 1 +Ethernet34 35,36 etp5b rs off 4 200000 2 +Ethernet36 37,38 etp5c rs off 4 200000 3 +Ethernet38 39,40 etp5d rs off 4 200000 4 +Ethernet40 57,58 etp6a rs off 5 200000 1 +Ethernet42 59,60 etp6b rs off 5 200000 2 +Ethernet44 61,62 etp6c rs off 5 200000 3 +Ethernet46 63,64 etp6d rs off 5 200000 4 +Ethernet48 49,50 etp7a rs off 6 200000 1 +Ethernet50 51,52 etp7b rs off 6 200000 2 +Ethernet52 53,54 etp7c rs off 6 200000 3 +Ethernet54 55,56 etp7d rs off 6 200000 4 +Ethernet56 41,42 etp8a rs off 7 200000 1 +Ethernet58 43,44 etp8b rs off 7 200000 2 +Ethernet60 45,46 etp8c rs off 7 200000 3 +Ethernet62 47,48 etp8d rs off 7 200000 4 +Ethernet64 73,74 etp9a rs off 8 200000 1 +Ethernet66 75,76 etp9b rs off 8 200000 2 +Ethernet68 77,78 etp9c rs off 8 200000 3 +Ethernet70 79,80 etp9d rs off 8 200000 4 +Ethernet72 89,90 etp10a rs off 9 200000 1 +Ethernet74 91,92 etp10b rs off 9 200000 2 +Ethernet76 93,94 etp10c rs off 9 200000 3 +Ethernet78 95,96 etp10d rs off 9 200000 4 +Ethernet80 81,82 etp11a rs off 10 200000 1 +Ethernet82 83,84 etp11b rs off 10 200000 2 +Ethernet84 85,86 etp11c rs off 10 200000 3 +Ethernet86 87,88 etp11d rs off 10 200000 4 +Ethernet88 65,66 etp12a rs off 11 200000 1 +Ethernet90 67,68 etp12b rs off 11 200000 2 +Ethernet92 69,70 etp12c rs off 11 200000 3 +Ethernet94 71,72 etp12d rs off 11 200000 4 +Ethernet96 105,106 etp13a rs off 12 200000 1 +Ethernet98 107,108 etp13b rs off 12 200000 2 +Ethernet100 109,110 etp13c rs off 12 200000 3 +Ethernet102 111,112 etp13d rs off 12 200000 4 +Ethernet104 121,122 etp14a rs off 13 200000 1 +Ethernet106 123,124 etp14b rs off 13 200000 2 +Ethernet108 125,126 etp14c rs off 13 200000 3 +Ethernet110 127,128 etp14d rs off 13 200000 4 +Ethernet112 113,114 etp15a rs off 14 200000 1 +Ethernet114 115,116 etp15b rs off 14 200000 2 +Ethernet116 117,118 etp15c rs off 14 200000 3 +Ethernet118 119,120 etp15d rs off 14 200000 4 +Ethernet120 97,98 etp16a rs off 15 200000 1 +Ethernet122 99,100 etp16b rs off 15 200000 2 +Ethernet124 101,102 etp16c rs off 15 200000 3 +Ethernet126 103,104 etp16d rs off 15 200000 4 +Ethernet128 129,130 etp17a rs off 16 200000 1 +Ethernet130 131,132 etp17b rs off 16 200000 2 +Ethernet132 133,134 etp17c rs off 16 200000 3 +Ethernet134 135,136 etp17d rs off 16 200000 4 +Ethernet136 161,162 etp18a rs off 17 200000 1 +Ethernet138 163,164 etp18b rs off 17 200000 2 +Ethernet140 165,166 etp18c rs off 17 200000 3 +Ethernet142 167,168 etp18d rs off 17 200000 4 +Ethernet144 153,154 etp19a rs off 18 200000 1 +Ethernet146 155,156 etp19b rs off 18 200000 2 +Ethernet148 157,158 etp19c rs off 18 200000 3 +Ethernet150 159,160 etp19d rs off 18 200000 4 +Ethernet152 137,138 etp20a rs off 19 200000 1 +Ethernet154 139,140 etp20b rs off 19 200000 2 +Ethernet156 141,142 etp20c rs off 19 200000 3 +Ethernet158 143,144 etp20d rs off 19 200000 4 +Ethernet160 145,146 etp21a rs off 20 200000 1 +Ethernet162 147,148 etp21b rs off 20 200000 2 +Ethernet164 149,150 etp21c rs off 20 200000 3 +Ethernet166 151,152 etp21d rs off 20 200000 4 +Ethernet168 169,170 etp22a rs off 21 200000 1 +Ethernet170 171,172 etp22b rs off 21 200000 2 +Ethernet172 173,174 etp22c rs off 21 200000 3 +Ethernet174 175,176 etp22d rs off 21 200000 4 +Ethernet176 193,194 etp23a rs off 22 200000 1 +Ethernet178 195,196 etp23b rs off 22 200000 2 +Ethernet180 197,198 etp23c rs off 22 200000 3 +Ethernet182 199,200 etp23d rs off 22 200000 4 +Ethernet184 177,178 etp24a rs off 23 200000 1 +Ethernet186 179,180 etp24b rs off 23 200000 2 +Ethernet188 181,182 etp24c rs off 23 200000 3 +Ethernet190 183,184 etp24d rs off 23 200000 4 +Ethernet192 185,186 etp25a rs off 24 200000 1 +Ethernet194 187,188 etp25b rs off 24 200000 2 +Ethernet196 189,190 etp25c rs off 24 200000 3 +Ethernet198 191,192 etp25d rs off 24 200000 4 +Ethernet200 201,202 etp26a rs off 25 200000 1 +Ethernet202 203,204 etp26b rs off 25 200000 2 +Ethernet204 205,206 etp26c rs off 25 200000 3 +Ethernet206 207,208 etp26d rs off 25 200000 4 +Ethernet208 233,234 etp27a rs off 26 200000 1 +Ethernet210 235,236 etp27b rs off 26 200000 2 +Ethernet212 237,238 etp27c rs off 26 200000 3 +Ethernet214 239,240 etp27d rs off 26 200000 4 +Ethernet216 209,210 etp28a rs off 27 200000 1 +Ethernet218 211,212 etp28b rs off 27 200000 2 +Ethernet220 213,214 etp28c rs off 27 200000 3 +Ethernet222 215,216 etp28d rs off 27 200000 4 +Ethernet224 225,226 etp29a rs off 28 200000 1 +Ethernet226 227,228 etp29b rs off 28 200000 2 +Ethernet228 229,230 etp29c rs off 28 200000 3 +Ethernet230 231,232 etp29d rs off 28 200000 4 +Ethernet232 249,250 etp30a rs off 29 200000 1 +Ethernet234 251,252 etp30b rs off 29 200000 2 +Ethernet236 253,254 etp30c rs off 29 200000 3 +Ethernet238 255,256 etp30d rs off 29 200000 4 +Ethernet240 241,242 etp31a rs off 30 200000 1 +Ethernet242 243,244 etp31b rs off 30 200000 2 +Ethernet244 245,246 etp31c rs off 30 200000 3 +Ethernet246 247,248 etp31d rs off 30 200000 4 +Ethernet248 217,218 etp32a rs off 31 200000 1 +Ethernet250 219,220 etp32b rs off 31 200000 2 +Ethernet252 221,222 etp32c rs off 31 200000 3 +Ethernet254 223,224 etp32d rs off 31 200000 4 +Ethernet256 257,258 etp33a rs off 32 200000 1 +Ethernet258 259,260 etp33b rs off 32 200000 2 +Ethernet260 261,262 etp33c rs off 32 200000 3 +Ethernet262 263,264 etp33d rs off 32 200000 4 +Ethernet264 281,282 etp34a rs off 33 200000 1 +Ethernet266 283,284 etp34b rs off 33 200000 2 +Ethernet268 285,286 etp34c rs off 33 200000 3 +Ethernet270 287,288 etp34d rs off 33 200000 4 +Ethernet272 289,290 etp35a rs off 34 200000 1 +Ethernet274 291,292 etp35b rs off 34 200000 2 +Ethernet276 293,294 etp35c rs off 34 200000 3 +Ethernet278 295,296 etp35d rs off 34 200000 4 +Ethernet280 265,266 etp36a rs off 35 200000 1 +Ethernet282 267,268 etp36b rs off 35 200000 2 +Ethernet284 269,270 etp36c rs off 35 200000 3 +Ethernet286 271,272 etp36d rs off 35 200000 4 +Ethernet288 305,306 etp37a rs off 36 200000 1 +Ethernet290 307,308 etp37b rs off 36 200000 2 +Ethernet292 309,310 etp37c rs off 36 200000 3 +Ethernet294 311,312 etp37d rs off 36 200000 4 +Ethernet296 321,322 etp38a rs off 37 200000 1 +Ethernet298 323,324 etp38b rs off 37 200000 2 +Ethernet300 325,326 etp38c rs off 37 200000 3 +Ethernet302 327,328 etp38d rs off 37 200000 4 +Ethernet304 297,298 etp39a rs off 38 200000 1 +Ethernet306 299,300 etp39b rs off 38 200000 2 +Ethernet308 301,302 etp39c rs off 38 200000 3 +Ethernet310 303,304 etp39d rs off 38 200000 4 +Ethernet312 273,274 etp40a rs off 39 200000 1 +Ethernet314 275,276 etp40b rs off 39 200000 2 +Ethernet316 277,278 etp40c rs off 39 200000 3 +Ethernet318 279,280 etp40d rs off 39 200000 4 +Ethernet320 313,314 etp41a rs off 40 200000 1 +Ethernet322 315,316 etp41b rs off 40 200000 2 +Ethernet324 317,318 etp41c rs off 40 200000 3 +Ethernet326 319,320 etp41d rs off 40 200000 4 +Ethernet328 329,330 etp42a rs off 41 200000 1 +Ethernet330 331,332 etp42b rs off 41 200000 2 +Ethernet332 333,334 etp42c rs off 41 200000 3 +Ethernet334 335,336 etp42d rs off 41 200000 4 +Ethernet336 361,362 etp43a rs off 42 200000 1 +Ethernet338 363,364 etp43b rs off 42 200000 2 +Ethernet340 365,366 etp43c rs off 42 200000 3 +Ethernet342 367,368 etp43d rs off 42 200000 4 +Ethernet344 337,338 etp44a rs off 43 200000 1 +Ethernet346 339,340 etp44b rs off 43 200000 2 +Ethernet348 341,342 etp44c rs off 43 200000 3 +Ethernet350 343,344 etp44d rs off 43 200000 4 +Ethernet352 353,354 etp45a rs off 44 200000 1 +Ethernet354 355,356 etp45b rs off 44 200000 2 +Ethernet356 357,358 etp45c rs off 44 200000 3 +Ethernet358 359,360 etp45d rs off 44 200000 4 +Ethernet360 369,370 etp46a rs off 45 200000 1 +Ethernet362 371,372 etp46b rs off 45 200000 2 +Ethernet364 373,374 etp46c rs off 45 200000 3 +Ethernet366 375,376 etp46d rs off 45 200000 4 +Ethernet368 377,378 etp47a rs off 46 200000 1 +Ethernet370 379,380 etp47b rs off 46 200000 2 +Ethernet372 381,382 etp47c rs off 46 200000 3 +Ethernet374 383,384 etp47d rs off 46 200000 4 +Ethernet376 345,346 etp48a rs off 47 200000 1 +Ethernet378 347,348 etp48b rs off 47 200000 2 +Ethernet380 349,350 etp48c rs off 47 200000 3 +Ethernet382 351,352 etp48d rs off 47 200000 4 +Ethernet384 385,386 etp49a rs off 48 200000 1 +Ethernet386 387,388 etp49b rs off 48 200000 2 +Ethernet388 389,390 etp49c rs off 48 200000 3 +Ethernet390 391,392 etp49d rs off 48 200000 4 +Ethernet392 401,402 etp50a rs off 49 200000 1 +Ethernet394 403,404 etp50b rs off 49 200000 2 +Ethernet396 405,406 etp50c rs off 49 200000 3 +Ethernet398 407,408 etp50d rs off 49 200000 4 +Ethernet400 409,410 etp51a rs off 50 200000 1 +Ethernet402 411,412 etp51b rs off 50 200000 2 +Ethernet404 413,414 etp51c rs off 50 200000 3 +Ethernet406 415,416 etp51d rs off 50 200000 4 +Ethernet408 393,394 etp52a rs off 51 200000 1 +Ethernet410 395,396 etp52b rs off 51 200000 2 +Ethernet412 397,398 etp52c rs off 51 200000 3 +Ethernet414 399,400 etp52d rs off 51 200000 4 +Ethernet416 417,418 etp53a rs off 52 200000 1 +Ethernet418 419,420 etp53b rs off 52 200000 2 +Ethernet420 421,422 etp53c rs off 52 200000 3 +Ethernet422 423,424 etp53d rs off 52 200000 4 +Ethernet424 433,434 etp54a rs off 53 200000 1 +Ethernet426 435,436 etp54b rs off 53 200000 2 +Ethernet428 437,438 etp54c rs off 53 200000 3 +Ethernet430 439,440 etp54d rs off 53 200000 4 +Ethernet432 441,442 etp55a rs off 54 200000 1 +Ethernet434 443,444 etp55b rs off 54 200000 2 +Ethernet436 445,446 etp55c rs off 54 200000 3 +Ethernet438 447,448 etp55d rs off 54 200000 4 +Ethernet440 425,426 etp56a rs off 55 200000 1 +Ethernet442 427,428 etp56b rs off 55 200000 2 +Ethernet444 429,430 etp56c rs off 55 200000 3 +Ethernet446 431,432 etp56d rs off 55 200000 4 +Ethernet448 449,450 etp57a rs off 56 200000 1 +Ethernet450 451,452 etp57b rs off 56 200000 2 +Ethernet452 453,454 etp57c rs off 56 200000 3 +Ethernet454 455,456 etp57d rs off 56 200000 4 +Ethernet456 473,474 etp58a rs off 57 200000 1 +Ethernet458 475,476 etp58b rs off 57 200000 2 +Ethernet460 477,478 etp58c rs off 57 200000 3 +Ethernet462 479,480 etp58d rs off 57 200000 4 +Ethernet464 465,466 etp59a rs off 58 200000 1 +Ethernet466 467,468 etp59b rs off 58 200000 2 +Ethernet468 469,470 etp59c rs off 58 200000 3 +Ethernet470 471,472 etp59d rs off 58 200000 4 +Ethernet472 457,458 etp60a rs off 59 200000 1 +Ethernet474 459,460 etp60b rs off 59 200000 2 +Ethernet476 461,462 etp60c rs off 59 200000 3 +Ethernet478 463,464 etp60d rs off 59 200000 4 +Ethernet480 489,490 etp61a rs off 60 200000 1 +Ethernet482 491,492 etp61b rs off 60 200000 2 +Ethernet484 493,494 etp61c rs off 60 200000 3 +Ethernet486 495,496 etp61d rs off 60 200000 4 +Ethernet488 505,506 etp62a rs off 61 200000 1 +Ethernet490 507,508 etp62b rs off 61 200000 2 +Ethernet492 509,510 etp62c rs off 61 200000 3 +Ethernet494 511,512 etp62d rs off 61 200000 4 +Ethernet496 497,498 etp63a rs off 62 200000 1 +Ethernet498 499,500 etp63b rs off 62 200000 2 +Ethernet500 501,502 etp63c rs off 62 200000 3 +Ethernet502 503,504 etp63d rs off 62 200000 4 +Ethernet504 481,482 etp64a rs off 63 200000 1 +Ethernet506 483,484 etp64b rs off 63 200000 2 +Ethernet508 485,486 etp64c rs off 63 200000 3 +Ethernet510 487,488 etp64d rs off 63 200000 4 +Ethernet512 513 etp65 none off 64 10000 1 +Ethernet513 514 etp66 none off 65 10000 1 \ No newline at end of file diff --git a/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_256x200G-2x10G/qos.json.j2 b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_256x200G-2x10G/qos.json.j2 new file mode 100755 index 00000000000..3801545c5eb --- /dev/null +++ b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_256x200G-2x10G/qos.json.j2 @@ -0,0 +1,107 @@ +{%- set PORT_LOSSY = [] %} + +{%- set default_topo = default_topo | default('t1', true) %} + +{% if default_topo == 'def_lossy' %} +{% for port in PORT %} + {%- if PORT_LOSSY.append(port) %}{% endif %} +{% endfor %} +{% endif %} + +{%- macro generate_service_port_list(PORT_SERVICE) -%} + {%- if PORT_SERVICE.append("Ethernet512") %}{% endif %} + {%- if PORT_SERVICE.append("Ethernet513") %}{% endif %} +{%- endmacro %} + +{%- set PORT_SERVICE = [] %} +{%- if generate_service_port_list is defined %} + {%- if generate_service_port_list(PORT_SERVICE) %}{% endif %} +{%- endif %} + +{%- macro generate_tc_to_pg_map_per_sku() %} + "TC_TO_PRIORITY_GROUP_MAP": { + "AZURE": { + "0": "0", + "1": "0", + "2": "0", + "3": "3", + "4": "4", + "5": "0", + "6": "0", + "7": "0" + }, + "AZURE_LOSSY": { + "0": "0", + "1": "0", + "2": "0", + "3": "1", + "4": "2", + "5": "0", + "6": "0", + "7": "0" + } + }, +{%- endmacro -%} + +{%- macro generate_scheduler_per_sku() -%} + "SCHEDULER": { + "scheduler.0": { + "type" : "STRICT" + }, + "scheduler.1": { + "type" : "DWRR", + "weight": "1" + } + }, +{%- endmacro -%} + +{%- macro generate_global_dscp_to_tc_map() -%} +{%- endmacro -%} + +{# QUEUE #} +{%- macro generate_queue_config(port_names_active) %} + "QUEUE": { +{% for port in port_names_active.split(',') %} + "{{ port }}|0-2": { + "scheduler": "scheduler.1" + }, + "{{ port }}|3-4": { +{% if port not in PORT_SERVICE and port not in PORT_LOSSY %} + "wred_profile" : "AZURE_LOSSLESS", +{% endif %} + "scheduler" : "scheduler.1" + }, + "{{ port }}|5-6": { + "scheduler": "scheduler.1" + }, + "{{ port }}|7": { + "scheduler": "scheduler.0" + }{{ "," if not loop.last else "" }} +{% endfor %} + } +{%- endmacro %} + +{# PORT_QOS_MAP #} +{%- macro generate_port_qos_map(port_names_active) %} + "PORT_QOS_MAP": { +{% for port in port_names_active.split(',') %} + "{{ port }}": { +{% if port in PORT_SERVICE or port in PORT_LOSSY %} + "dscp_to_tc_map" : "AZURE", + "tc_to_pg_map" : "AZURE_LOSSY", + "tc_to_queue_map" : "AZURE" +{% else %} + "dscp_to_tc_map" : "AZURE", + "tc_to_pg_map" : "AZURE", + "tc_to_queue_map" : "AZURE", + "pfc_to_queue_map" : "AZURE", + "pfc_enable" : "3,4", + "pfcwd_sw_enable" : "3,4" +{% endif %} + }{{ "," if not loop.last else "" }} +{% endfor %} + }, +{%- endmacro %} + + +{%- include 'qos_config.j2' %} diff --git a/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_256x200G-2x10G/qos_defaults_def_lossy.j2 b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_256x200G-2x10G/qos_defaults_def_lossy.j2 new file mode 100755 index 00000000000..c1170619bc6 --- /dev/null +++ b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_256x200G-2x10G/qos_defaults_def_lossy.j2 @@ -0,0 +1,121 @@ +{% set port_names_list = [] %} +{% for port in PORT %} + {%- if port_names_list.append(port) %}{% endif %} +{% endfor %} +{% set port_names = port_names_list | join(',') -%} + + +{ + "TC_TO_QUEUE_MAP":{ + "AZURE":{ + "0":"0", + "1":"1", + "2":"2", + "3":"3", + "4":"4", + "5":"5", + "6":"6", + "7":"7" + } + }, + "TC_TO_PRIORITY_GROUP_MAP": { + "AZURE": { + "0": "0", + "1": "0", + "2": "0", + "3": "1", + "4": "2", + "5": "0", + "6": "0", + "7": "0" + } + }, + "DSCP_TO_TC_MAP": { + "AZURE": { + "0":"0", + "1":"0", + "2":"0", + "3":"0", + "4":"0", + "5":"0", + "6":"0", + "7":"0", + "8":"0", + "9":"0", + "10":"0", + "11":"0", + "12":"0", + "13":"0", + "14":"0", + "15":"0", + "16":"0", + "17":"0", + "18":"0", + "19":"0", + "20":"0", + "21":"0", + "22":"0", + "23":"0", + "24":"0", + "25":"0", + "26":"0", + "27":"0", + "28":"0", + "29":"0", + "30":"0", + "31":"0", + "32":"0", + "33":"0", + "34":"0", + "35":"0", + "36":"0", + "37":"0", + "38":"0", + "39":"0", + "40":"0", + "41":"0", + "42":"0", + "43":"0", + "44":"0", + "45":"0", + "46":"0", + "47":"0", + "48":"0", + "49":"0", + "50":"0", + "51":"0", + "52":"0", + "53":"0", + "54":"0", + "55":"0", + "56":"0", + "57":"0", + "58":"0", + "59":"0", + "60":"0", + "61":"0", + "62":"0", + "63":"0" + } + }, + "PORT_QOS_MAP": { +{% for port in port_names_list %} + "{{ port }}": { + "tc_to_pg_map": "AZURE", + "tc_to_queue_map": "AZURE", + "dscp_to_tc_map": "AZURE" + }{% if not loop.last %},{% endif %} + +{% endfor %} + }, + "SCHEDULER": { + "scheduler.7": { + "type": "STRICT" + } + }, + "QUEUE": { + "{{ port_names }}|7": { + "scheduler": "[SCHEDULER|scheduler.7]" + } + } +} diff --git a/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_256x200G-2x10G/sai.profile b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_256x200G-2x10G/sai.profile new file mode 100644 index 00000000000..aba4fc81fb1 --- /dev/null +++ b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_256x200G-2x10G/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/ivm.sai.config.yaml diff --git a/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_256x200G-2x10G/teralynx.MVTX9180 b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_256x200G-2x10G/teralynx.MVTX9180 new file mode 100644 index 00000000000..e310d0be06a --- /dev/null +++ b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_256x200G-2x10G/teralynx.MVTX9180 @@ -0,0 +1,170 @@ +sku: teralynx.MVTX9180 + +device_id: 0x6000 + +# Hardware constraint information +hardware: + num_ibs: 8 + ib_active: 0,1,2,3,4,5,6,7 + + ports_per_ib: 66, 66, 66, 66, 66, 66, 66, 66 + recirc_port_num: 64, 64, 64, 64, 64, 64, 64, 64 + cpu_port_num: 65 + cpu_port_ib: 0 + mgmt_port_num: 65, 65 + mgmt_port_ibs: 1,2 + + pics_per_ib: 8, 9, 9, 8, 8, 8, 8, 8 + pic_ports_per_pic: 8 + max_serdes_speed: 100 + + num_shared_pics: 0 + + isg [0-7]: + ib: 0 + pic_id: [0-7] + + isg [8-15]: + ib: 4 + pic_id: [0-7] + + isg 16: + ib: 6 + pic_id: 7 + + isg 17: + ib: 6 + pic_id: 6 + + isg 18: + ib: 6 + pic_id: 5 + + isg 19: + ib: 6 + pic_id: 4 + + isg 20: + ib: 6 + pic_id: 3 + + isg 21: + ib: 6 + pic_id: 2 + + isg 22: + ib: 6 + pic_id: 1 + + isg 23: + ib: 6 + pic_id: 0 + + isg 24: + ib: 2 + pic_id: 7 + + isg 25: + ib: 2 + pic_id: 6 + + isg 26: + ib: 2 + pic_id: 5 + + isg 27: + ib: 2 + pic_id: 4 + + isg 28: + ib: 2 + pic_id: 3 + + isg 29: + ib: 2 + pic_id: 2 + + isg 30: + ib: 2 + pic_id: 1 + + isg 31: + ib: 2 + pic_id: 0 + + isg [32-39]: + ib: 3 + pic_id: [0-7] + + isg [40-47]: + ib: 7 + pic_id: [0-7] + + isg 48: + ib: 5 + pic_id: 7 + + isg 49: + ib: 5 + pic_id: 6 + + isg 50: + ib: 5 + pic_id: 5 + + isg 51: + ib: 5 + pic_id: 4 + + isg 52: + ib: 5 + pic_id: 3 + + isg 53: + ib: 5 + pic_id: 2 + + isg 54: + ib: 5 + pic_id: 1 + + isg 55: + ib: 5 + pic_id: 0 + + isg 56: + ib: 1 + pic_id: 7 + + isg 57: + ib: 1 + pic_id: 6 + + isg 58: + ib: 1 + pic_id: 5 + + isg 59: + ib: 1 + pic_id: 4 + + isg 60: + ib: 1 + pic_id: 3 + + isg 61: + ib: 1 + pic_id: 2 + + isg 62: + ib: 1 + pic_id: 1 + + isg 63: + ib: 1 + pic_id: 0 + + isg 64: + mode: 1:1 + ib: 1, 2 + pic_id: 8 diff --git a/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_512x100G-2x10G/buffers.json.j2 b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_512x100G-2x10G/buffers.json.j2 new file mode 100644 index 00000000000..3952ba88deb --- /dev/null +++ b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_512x100G-2x10G/buffers.json.j2 @@ -0,0 +1,3 @@ +{%- set default_topo = default_topo | default('t1', true) %} +{%- include 'buffers_config.j2' %} + diff --git a/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_512x100G-2x10G/buffers_defaults_def_lossy.j2 b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_512x100G-2x10G/buffers_defaults_def_lossy.j2 new file mode 100644 index 00000000000..df3a836c6cf --- /dev/null +++ b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_512x100G-2x10G/buffers_defaults_def_lossy.j2 @@ -0,0 +1,51 @@ +{%- set default_cable = '40m' %} + +{# BUFFER_POOL, BUFFER_PROFILE #} +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "lossy_pool": { + "size": "182386688", + "type": "egress", + "mode": "dynamic", + "xoff": "0" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"lossy_pool", + "size":"0", + "static_th":"22798336" + }, + "egress_lossy_profile": { + "pool":"lossy_pool", + "size":"1518", + "dynamic_th":"2" + } + }, +{%- endmacro %} + + +{# BUFFER_PG #} +{%- macro generate_pg_profils(port_names_active) %} + "BUFFER_PG": { +{% for port in port_names_active.split(',') %} + "{{ port }}|0-7": { + "profile" : "ingress_lossy_profile" + }{% if not loop.last %},{% endif %} + +{% endfor %} + }, +{%- endmacro %} + + +{# BUFFER_QUEUE #} +{%- macro generate_queue_buffers(port_names_active) %} + "BUFFER_QUEUE": { +{% for port in port_names_active.split(',') %} + "{{ port }}|0-7": { + "profile" : "egress_lossy_profile" + }{% if not loop.last %},{% endif %} + +{% endfor %} + } +{%- endmacro %} diff --git a/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_512x100G-2x10G/buffers_defaults_t0.j2 b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_512x100G-2x10G/buffers_defaults_t0.j2 new file mode 100755 index 00000000000..59524186cb8 --- /dev/null +++ b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_512x100G-2x10G/buffers_defaults_t0.j2 @@ -0,0 +1,120 @@ +{%- set default_cable = '40m' %} + +{%- macro generate_service_port_list(PORT_SERVICE) -%} + {%- if PORT_SERVICE.append("Ethernet512") %}{% endif %} + {%- if PORT_SERVICE.append("Ethernet513") %}{% endif %} +{%- endmacro %} + +{%- set PORT_SERVICE = [] %} +{%- if generate_service_port_list is defined %} + {%- if generate_service_port_list(PORT_SERVICE) %}{% endif %} +{%- endif %} + +{# BUFFER_POOL, BUFFER_PROFILE #} +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "158630302", + "type": "ingress", + "mode": "dynamic", + "xoff": "71577600" + }, + "lossy_pool": { + "size": "56012386", + "type": "egress", + "mode": "dynamic", + "xoff": "0" + }, + "egress_lossless_pool": { + "size": "214642688", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossless_profile": { + "pool":"ingress_lossless_pool", + "xoff":"135520", + "size":"1518", + "dynamic_th":"1", + "xon_offset":"9408" + }, + "egress_lossless_profile": { + "pool":"ingress_lossless_pool", + "size":"0", + "static_th":"22798336" + }, + "ingress_lossy_profile": { + "pool":"lossy_pool", + "size":"0", + "static_th":"22798336" + }, + "egress_lossy_profile": { + "pool":"lossy_pool", + "size":"1518", + "dynamic_th":"2" + } + }, +{%- endmacro %} + +{# BUFFER_PG #} +{%- macro generate_pg_profils(port_names_active) %} + "BUFFER_PG": { +{% for port in port_names_active.split(',') %} +{% if port in PORT_SERVICE %} + "{{ port }}|3-4": { + "profile" : "ingress_lossy_profile" + }, +{% else %} + "{{ port }}|3-4": { + "profile" : "ingress_lossless_profile" + }, +{% endif %} +{% endfor %} +{% for port in port_names_active.split(',') %} + "{{ port }}|0": { + "profile" : "ingress_lossy_profile" + }, +{% endfor %} +{% for port in port_names_active.split(',') %} + "{{ port }}|1-2": { + "profile" : "ingress_lossy_profile" + }, +{% endfor %} +{% for port in port_names_active.split(',') %} + "{{ port }}|5-7": { + "profile" : "ingress_lossy_profile" + }{% if not loop.last %},{% endif %} + +{% endfor %} + }, +{%- endmacro %} + +{# BUFFER_QUEUE #} +{%- macro generate_queue_buffers(port_names_active) %} + "BUFFER_QUEUE": { +{% for port in port_names_active.split(',') %} +{% if port in PORT_SERVICE %} + "{{ port }}|3-4": { + "profile" : "egress_lossy_profile" + }, +{% else %} + "{{ port }}|3-4": { + "profile" : "egress_lossless_profile" + }, +{% endif %} +{% endfor %} +{% for port in port_names_active.split(',') %} + "{{ port }}|0-2": { + "profile" : "egress_lossy_profile" + }, +{% endfor %} +{% for port in port_names_active.split(',') %} + "{{ port }}|5-7": { + "profile" : "egress_lossy_profile" + }{% if not loop.last %},{% endif %} + +{% endfor %} + } +{%- endmacro %} + diff --git a/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_512x100G-2x10G/buffers_defaults_t1.j2 b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_512x100G-2x10G/buffers_defaults_t1.j2 new file mode 100644 index 00000000000..59524186cb8 --- /dev/null +++ b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_512x100G-2x10G/buffers_defaults_t1.j2 @@ -0,0 +1,120 @@ +{%- set default_cable = '40m' %} + +{%- macro generate_service_port_list(PORT_SERVICE) -%} + {%- if PORT_SERVICE.append("Ethernet512") %}{% endif %} + {%- if PORT_SERVICE.append("Ethernet513") %}{% endif %} +{%- endmacro %} + +{%- set PORT_SERVICE = [] %} +{%- if generate_service_port_list is defined %} + {%- if generate_service_port_list(PORT_SERVICE) %}{% endif %} +{%- endif %} + +{# BUFFER_POOL, BUFFER_PROFILE #} +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "158630302", + "type": "ingress", + "mode": "dynamic", + "xoff": "71577600" + }, + "lossy_pool": { + "size": "56012386", + "type": "egress", + "mode": "dynamic", + "xoff": "0" + }, + "egress_lossless_pool": { + "size": "214642688", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossless_profile": { + "pool":"ingress_lossless_pool", + "xoff":"135520", + "size":"1518", + "dynamic_th":"1", + "xon_offset":"9408" + }, + "egress_lossless_profile": { + "pool":"ingress_lossless_pool", + "size":"0", + "static_th":"22798336" + }, + "ingress_lossy_profile": { + "pool":"lossy_pool", + "size":"0", + "static_th":"22798336" + }, + "egress_lossy_profile": { + "pool":"lossy_pool", + "size":"1518", + "dynamic_th":"2" + } + }, +{%- endmacro %} + +{# BUFFER_PG #} +{%- macro generate_pg_profils(port_names_active) %} + "BUFFER_PG": { +{% for port in port_names_active.split(',') %} +{% if port in PORT_SERVICE %} + "{{ port }}|3-4": { + "profile" : "ingress_lossy_profile" + }, +{% else %} + "{{ port }}|3-4": { + "profile" : "ingress_lossless_profile" + }, +{% endif %} +{% endfor %} +{% for port in port_names_active.split(',') %} + "{{ port }}|0": { + "profile" : "ingress_lossy_profile" + }, +{% endfor %} +{% for port in port_names_active.split(',') %} + "{{ port }}|1-2": { + "profile" : "ingress_lossy_profile" + }, +{% endfor %} +{% for port in port_names_active.split(',') %} + "{{ port }}|5-7": { + "profile" : "ingress_lossy_profile" + }{% if not loop.last %},{% endif %} + +{% endfor %} + }, +{%- endmacro %} + +{# BUFFER_QUEUE #} +{%- macro generate_queue_buffers(port_names_active) %} + "BUFFER_QUEUE": { +{% for port in port_names_active.split(',') %} +{% if port in PORT_SERVICE %} + "{{ port }}|3-4": { + "profile" : "egress_lossy_profile" + }, +{% else %} + "{{ port }}|3-4": { + "profile" : "egress_lossless_profile" + }, +{% endif %} +{% endfor %} +{% for port in port_names_active.split(',') %} + "{{ port }}|0-2": { + "profile" : "egress_lossy_profile" + }, +{% endfor %} +{% for port in port_names_active.split(',') %} + "{{ port }}|5-7": { + "profile" : "egress_lossy_profile" + }{% if not loop.last %},{% endif %} + +{% endfor %} + } +{%- endmacro %} + diff --git a/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_512x100G-2x10G/config_tl10_d64p512t_512x100G.yaml b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_512x100G-2x10G/config_tl10_d64p512t_512x100G.yaml new file mode 100644 index 00000000000..93947e3c8ce --- /dev/null +++ b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_512x100G-2x10G/config_tl10_d64p512t_512x100G.yaml @@ -0,0 +1,3962 @@ +ifcs: + options: + log_level: "warn" +nodes: +- node_id: "0" + options: + sku: "configs/sku/teralynx.MVTX9180" + netdev: + - auto_create: "no" + multi_interface: "yes" + buffer_management_mode: "api_driven" + pt01: "896" + wred_cr_ip_proto_list: "17" + cr_assignment_mode: "1" + max_lossless_tc: "2" + ilpm_enable: "1" + forward_profile: "IFCS_FORWARD_PROFILE_ID_PROFILE_E" + ecmp_hierarchical_enable: "1" + intf_outer_l2_term_mode: "loose" + multicast_lag_resolution_enable: "1" + skip_pll_check: "false" + sys_clk: "1800" + ifc_clk: "1800" + mac_clk: "1600" + ecmp_alb_enable: "1" + alb_port_state_enable: "1" + ecmp_alb_timeout_step_size: "2" + bfd_config: + - offload_enable: "true" + txring: + - txring_id: "0" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "1" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "2" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "3" + desc_count: "1024" + prio: "1" + netdev: "true" + rxring: + - rxring_id: "0" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "0, 4, 8, 12, 16, 20, 24, 28, 32, 36, 40, 44" + - rxring_id: "1" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "1, 9, 13, 17, 21, 25, 29, 33, 37, 41, 45" + - rxring_id: "2" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "2, 6, 10, 14, 18, 22, 26, 30, 34, 38, 42, 46" + - rxring_id: "3" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "3, 7, 11, 15, 19, 23, 27, 31, 35, 39, 43, 47" + - rxring_id: "4" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "5" + ib: + - id: "0" + temp_threshold: "92" + - id: "1" + temp_threshold: "92" + - id: "2" + temp_threshold: "92" + - id: "3" + temp_threshold: "92" + - id: "4" + temp_threshold: "92" + - id: "5" + temp_threshold: "92" + - id: "6" + temp_threshold: "92" + - id: "7" + temp_threshold: "92" + devports: + - id: "0" + sysport: "1000" + type: "cpu" + - fec: "NONE" + id: "513" + lanes: "0:1" + serdes_group: "64" + speed: "10G" + #auto_neg: "true" + #link_training: "true" + #bp_tech_ability: "10GBASE_KR" + sysport: "513" + type: "mgmt 0" + - fec: "NONE" + id: "514" + lanes: "1:1" + serdes_group: "64" + speed: "10G" + #auto_neg: "true" + #link_training: "true" + #bp_tech_ability: "10GBASE_KR" + sysport: "514" + type: "mgmt 1" + - fec: "KPFEC" + id: "489" + lanes: "0:1" + serdes_group: "61" + speed: "100G" + sysport: "489" + type: "eth" + - fec: "KPFEC" + id: "490" + lanes: "1:1" + serdes_group: "61" + speed: "100G" + sysport: "490" + type: "eth" + - fec: "KPFEC" + id: "491" + lanes: "2:1" + serdes_group: "61" + speed: "100G" + sysport: "491" + type: "eth" + - fec: "KPFEC" + id: "492" + lanes: "3:1" + serdes_group: "61" + speed: "100G" + sysport: "492" + type: "eth" + - fec: "KPFEC" + id: "493" + lanes: "4:1" + serdes_group: "61" + speed: "100G" + sysport: "493" + type: "eth" + - fec: "KPFEC" + id: "494" + lanes: "5:1" + serdes_group: "61" + speed: "100G" + sysport: "494" + type: "eth" + - fec: "KPFEC" + id: "495" + lanes: "6:1" + serdes_group: "61" + speed: "100G" + sysport: "495" + type: "eth" + - fec: "KPFEC" + id: "496" + lanes: "7:1" + serdes_group: "61" + speed: "100G" + sysport: "496" + type: "eth" + - fec: "KPFEC" + id: "505" + lanes: "0:1" + serdes_group: "63" + speed: "100G" + sysport: "505" + type: "eth" + - fec: "KPFEC" + id: "506" + lanes: "1:1" + serdes_group: "63" + speed: "100G" + sysport: "506" + type: "eth" + - fec: "KPFEC" + id: "507" + lanes: "2:1" + serdes_group: "63" + speed: "100G" + sysport: "507" + type: "eth" + - fec: "KPFEC" + id: "508" + lanes: "3:1" + serdes_group: "63" + speed: "100G" + sysport: "508" + type: "eth" + - fec: "KPFEC" + id: "509" + lanes: "4:1" + serdes_group: "63" + speed: "100G" + sysport: "509" + type: "eth" + - fec: "KPFEC" + id: "510" + lanes: "5:1" + serdes_group: "63" + speed: "100G" + sysport: "510" + type: "eth" + - fec: "KPFEC" + id: "511" + lanes: "6:1" + serdes_group: "63" + speed: "100G" + sysport: "511" + type: "eth" + - fec: "KPFEC" + id: "512" + lanes: "7:1" + serdes_group: "63" + speed: "100G" + sysport: "512" + type: "eth" + - fec: "KPFEC" + id: "441" + lanes: "0:1" + serdes_group: "55" + speed: "100G" + sysport: "441" + type: "eth" + - fec: "KPFEC" + id: "442" + lanes: "1:1" + serdes_group: "55" + speed: "100G" + sysport: "442" + type: "eth" + - fec: "KPFEC" + id: "443" + lanes: "2:1" + serdes_group: "55" + speed: "100G" + sysport: "443" + type: "eth" + - fec: "KPFEC" + id: "444" + lanes: "3:1" + serdes_group: "55" + speed: "100G" + sysport: "444" + type: "eth" + - fec: "KPFEC" + id: "445" + lanes: "4:1" + serdes_group: "55" + speed: "100G" + sysport: "445" + type: "eth" + - fec: "KPFEC" + id: "446" + lanes: "5:1" + serdes_group: "55" + speed: "100G" + sysport: "446" + type: "eth" + - fec: "KPFEC" + id: "447" + lanes: "6:1" + serdes_group: "55" + speed: "100G" + sysport: "447" + type: "eth" + - fec: "KPFEC" + id: "448" + lanes: "7:1" + serdes_group: "55" + speed: "100G" + sysport: "448" + type: "eth" + - fec: "KPFEC" + id: "425" + lanes: "0:1" + serdes_group: "53" + speed: "100G" + sysport: "425" + type: "eth" + - fec: "KPFEC" + id: "426" + lanes: "1:1" + serdes_group: "53" + speed: "100G" + sysport: "426" + type: "eth" + - fec: "KPFEC" + id: "427" + lanes: "2:1" + serdes_group: "53" + speed: "100G" + sysport: "427" + type: "eth" + - fec: "KPFEC" + id: "428" + lanes: "3:1" + serdes_group: "53" + speed: "100G" + sysport: "428" + type: "eth" + - fec: "KPFEC" + id: "429" + lanes: "4:1" + serdes_group: "53" + speed: "100G" + sysport: "429" + type: "eth" + - fec: "KPFEC" + id: "430" + lanes: "5:1" + serdes_group: "53" + speed: "100G" + sysport: "430" + type: "eth" + - fec: "KPFEC" + id: "431" + lanes: "6:1" + serdes_group: "53" + speed: "100G" + sysport: "431" + type: "eth" + - fec: "KPFEC" + id: "432" + lanes: "7:1" + serdes_group: "53" + speed: "100G" + sysport: "432" + type: "eth" + - fec: "KPFEC" + id: "41" + lanes: "0:1" + serdes_group: "5" + speed: "100G" + sysport: "41" + type: "eth" + - fec: "KPFEC" + id: "42" + lanes: "1:1" + serdes_group: "5" + speed: "100G" + sysport: "42" + type: "eth" + - fec: "KPFEC" + id: "43" + lanes: "2:1" + serdes_group: "5" + speed: "100G" + sysport: "43" + type: "eth" + - fec: "KPFEC" + id: "44" + lanes: "3:1" + serdes_group: "5" + speed: "100G" + sysport: "44" + type: "eth" + - fec: "KPFEC" + id: "45" + lanes: "4:1" + serdes_group: "5" + speed: "100G" + sysport: "45" + type: "eth" + - fec: "KPFEC" + id: "46" + lanes: "5:1" + serdes_group: "5" + speed: "100G" + sysport: "46" + type: "eth" + - fec: "KPFEC" + id: "47" + lanes: "6:1" + serdes_group: "5" + speed: "100G" + sysport: "47" + type: "eth" + - fec: "KPFEC" + id: "48" + lanes: "7:1" + serdes_group: "5" + speed: "100G" + sysport: "48" + type: "eth" + - fec: "KPFEC" + id: "49" + lanes: "0:1" + serdes_group: "6" + speed: "100G" + sysport: "49" + type: "eth" + - fec: "KPFEC" + id: "50" + lanes: "1:1" + serdes_group: "6" + speed: "100G" + sysport: "50" + type: "eth" + - fec: "KPFEC" + id: "51" + lanes: "2:1" + serdes_group: "6" + speed: "100G" + sysport: "51" + type: "eth" + - fec: "KPFEC" + id: "52" + lanes: "3:1" + serdes_group: "6" + speed: "100G" + sysport: "52" + type: "eth" + - fec: "KPFEC" + id: "53" + lanes: "4:1" + serdes_group: "6" + speed: "100G" + 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"eth" + - fec: "KPFEC" + id: "237" + lanes: "4:1" + serdes_group: "29" + speed: "100G" + sysport: "237" + type: "eth" + - fec: "KPFEC" + id: "238" + lanes: "5:1" + serdes_group: "29" + speed: "100G" + sysport: "238" + type: "eth" + - fec: "KPFEC" + id: "239" + lanes: "6:1" + serdes_group: "29" + speed: "100G" + sysport: "239" + type: "eth" + - fec: "KPFEC" + id: "240" + lanes: "7:1" + serdes_group: "29" + speed: "100G" + sysport: "240" + type: "eth" + - fec: "KPFEC" + id: "209" + lanes: "0:1" + serdes_group: "26" + speed: "100G" + sysport: "209" + type: "eth" + - fec: "KPFEC" + id: "210" + lanes: "1:1" + serdes_group: "26" + speed: "100G" + sysport: "210" + type: "eth" + - fec: "KPFEC" + id: "211" + lanes: "2:1" + serdes_group: "26" + speed: "100G" + sysport: "211" + type: "eth" + - fec: "KPFEC" + id: "212" + lanes: "3:1" + serdes_group: "26" + speed: "100G" + sysport: "212" + type: "eth" + - fec: "KPFEC" + id: "213" + lanes: "4:1" + serdes_group: "26" + speed: "100G" + sysport: "213" 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sysport: "110" + type: "eth" + - fec: "KPFEC" + id: "111" + lanes: "6:1" + serdes_group: "13" + speed: "100G" + sysport: "111" + type: "eth" + - fec: "KPFEC" + id: "112" + lanes: "7:1" + serdes_group: "13" + speed: "100G" + sysport: "112" + type: "eth" + - fec: "KPFEC" + id: "121" + lanes: "0:1" + serdes_group: "15" + speed: "100G" + sysport: "121" + type: "eth" + - fec: "KPFEC" + id: "122" + lanes: "1:1" + serdes_group: "15" + speed: "100G" + sysport: "122" + type: "eth" + - fec: "KPFEC" + id: "123" + lanes: "2:1" + serdes_group: "15" + speed: "100G" + sysport: "123" + type: "eth" + - fec: "KPFEC" + id: "124" + lanes: "3:1" + serdes_group: "15" + speed: "100G" + sysport: "124" + type: "eth" + - fec: "KPFEC" + id: "125" + lanes: "4:1" + serdes_group: "15" + speed: "100G" + sysport: "125" + type: "eth" + - fec: "KPFEC" + id: "126" + lanes: "5:1" + serdes_group: "15" + speed: "100G" + sysport: "126" + type: "eth" + - fec: "KPFEC" + id: "127" + lanes: "6:1" + serdes_group: "15" + speed: "100G" + sysport: "127" + type: "eth" + - fec: "KPFEC" + id: "128" + lanes: "7:1" + serdes_group: "15" + speed: "100G" + sysport: "128" + type: "eth" + - fec: "KPFEC" + id: "169" + lanes: "0:1" + serdes_group: "21" + speed: "100G" + sysport: "169" + type: "eth" + - fec: "KPFEC" + id: "170" + lanes: "1:1" + serdes_group: "21" + speed: "100G" + sysport: "170" + type: "eth" + - fec: "KPFEC" + id: "171" + lanes: "2:1" + serdes_group: "21" + speed: "100G" + sysport: "171" + type: "eth" + - fec: "KPFEC" + id: "172" + lanes: "3:1" + serdes_group: "21" + speed: "100G" + sysport: "172" + type: "eth" + - fec: "KPFEC" + id: "173" + lanes: "4:1" + serdes_group: "21" + speed: "100G" + sysport: "173" + type: "eth" + - fec: "KPFEC" + id: "174" + lanes: "5:1" + serdes_group: "21" + speed: "100G" + sysport: "174" + type: "eth" + - fec: "KPFEC" + id: "175" + lanes: "6:1" + serdes_group: "21" + speed: "100G" + sysport: "175" + type: "eth" + - fec: "KPFEC" + id: "176" + lanes: "7:1" + serdes_group: "21" + speed: "100G" + sysport: "176" + type: "eth" + - fec: "KPFEC" + id: "145" + lanes: "0:1" + serdes_group: "18" + speed: "100G" + sysport: "145" + type: "eth" + - fec: "KPFEC" + id: "146" + lanes: "1:1" + serdes_group: "18" + speed: "100G" + sysport: "146" + type: "eth" + - fec: "KPFEC" + id: "147" + lanes: "2:1" + serdes_group: "18" + speed: "100G" + sysport: "147" + type: "eth" + - fec: "KPFEC" + id: "148" + lanes: "3:1" + serdes_group: "18" + speed: "100G" + sysport: "148" + type: "eth" + - fec: "KPFEC" + id: "149" + lanes: "4:1" + serdes_group: "18" + speed: "100G" + sysport: "149" + type: "eth" + - fec: "KPFEC" + id: "150" + lanes: "5:1" + serdes_group: "18" + speed: "100G" + sysport: "150" + type: "eth" + - fec: "KPFEC" + id: "151" + lanes: "6:1" + serdes_group: "18" + speed: "100G" + sysport: "151" + type: "eth" + - fec: "KPFEC" + id: "152" + lanes: "7:1" + serdes_group: "18" + speed: "100G" + sysport: "152" + type: "eth" + - fec: "KPFEC" + id: "265" + lanes: "0:1" + serdes_group: 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serdes_group: "36" + speed: "100G" + sysport: "290" + type: "eth" + - fec: "KPFEC" + id: "291" + lanes: "2:1" + serdes_group: "36" + speed: "100G" + sysport: "291" + type: "eth" + - fec: "KPFEC" + id: "292" + lanes: "3:1" + serdes_group: "36" + speed: "100G" + sysport: "292" + type: "eth" + - fec: "KPFEC" + id: "293" + lanes: "4:1" + serdes_group: "36" + speed: "100G" + sysport: "293" + type: "eth" + - fec: "KPFEC" + id: "294" + lanes: "5:1" + serdes_group: "36" + speed: "100G" + sysport: "294" + type: "eth" + - fec: "KPFEC" + id: "295" + lanes: "6:1" + serdes_group: "36" + speed: "100G" + sysport: "295" + type: "eth" + - fec: "KPFEC" + id: "296" + lanes: "7:1" + serdes_group: "36" + speed: "100G" + sysport: "296" + type: "eth" + - fec: "KPFEC" + id: "297" + lanes: "0:1" + serdes_group: "37" + speed: "100G" + sysport: "297" + type: "eth" + - fec: "KPFEC" + id: "298" + lanes: "1:1" + serdes_group: "37" + speed: "100G" + sysport: "298" + type: "eth" + - fec: "KPFEC" + id: "299" + lanes: "2:1" + serdes_group: "37" + speed: "100G" + sysport: "299" + type: "eth" + - fec: "KPFEC" + id: "300" + lanes: "3:1" + serdes_group: "37" + speed: "100G" + sysport: "300" + type: "eth" + - fec: "KPFEC" + id: "301" + lanes: "4:1" + serdes_group: "37" + speed: "100G" + sysport: "301" + type: "eth" + - fec: "KPFEC" + id: "302" + lanes: "5:1" + serdes_group: "37" + speed: "100G" + sysport: "302" + type: "eth" + - fec: "KPFEC" + id: "303" + lanes: "6:1" + serdes_group: "37" + speed: "100G" + sysport: "303" + type: "eth" + - fec: "KPFEC" + id: "304" + lanes: "7:1" + serdes_group: "37" + speed: "100G" + sysport: "304" + type: "eth" + - fec: "KPFEC" + id: "273" + lanes: "0:1" + serdes_group: "34" + speed: "100G" + sysport: "273" + type: "eth" + - fec: "KPFEC" + id: "274" + lanes: "1:1" + serdes_group: "34" + speed: "100G" + sysport: "274" + type: "eth" + - fec: "KPFEC" + id: "275" + lanes: "2:1" + serdes_group: "34" + speed: "100G" + sysport: "275" + type: "eth" + - fec: "KPFEC" + id: "276" + lanes: "3:1" + serdes_group: "34" + speed: "100G" + sysport: "276" + type: "eth" + - fec: "KPFEC" + id: "277" + lanes: "4:1" + serdes_group: "34" + speed: "100G" + sysport: "277" + type: "eth" + - fec: "KPFEC" + id: "278" + lanes: "5:1" + serdes_group: "34" + speed: "100G" + sysport: "278" + type: "eth" + - fec: "KPFEC" + id: "279" + lanes: "6:1" + serdes_group: "34" + speed: "100G" + sysport: "279" + type: "eth" + - fec: "KPFEC" + id: "280" + lanes: "7:1" + serdes_group: "34" + speed: "100G" + sysport: "280" + type: "eth" + - fec: "KPFEC" + id: "225" + lanes: "0:1" + serdes_group: "28" + speed: "100G" + sysport: "225" + type: "eth" + - fec: "KPFEC" + id: "226" + lanes: "1:1" + serdes_group: "28" + speed: "100G" + sysport: "226" + type: "eth" + - fec: "KPFEC" + id: "227" + lanes: "2:1" + serdes_group: "28" + speed: "100G" + sysport: "227" + type: "eth" + - fec: "KPFEC" + id: "228" + lanes: "3:1" + serdes_group: "28" + speed: "100G" + sysport: "228" + type: "eth" + - fec: "KPFEC" + id: "229" + lanes: "4:1" + serdes_group: "28" + speed: "100G" + sysport: "229" + type: "eth" + - fec: "KPFEC" + id: "230" + lanes: "5:1" + serdes_group: "28" + speed: "100G" + sysport: "230" + type: "eth" + - fec: "KPFEC" + id: "231" + lanes: "6:1" + serdes_group: "28" + speed: "100G" + sysport: "231" + type: "eth" + - fec: "KPFEC" + id: "232" + lanes: "7:1" + serdes_group: "28" + speed: "100G" + sysport: "232" + type: "eth" + - fec: "KPFEC" + id: "249" + lanes: "0:1" + serdes_group: "31" + speed: "100G" + sysport: "249" + type: "eth" + - fec: "KPFEC" + id: "250" + lanes: "1:1" + serdes_group: "31" + speed: "100G" + sysport: "250" + type: "eth" + - fec: "KPFEC" + id: "251" + lanes: "2:1" + serdes_group: "31" + speed: "100G" + sysport: "251" + type: "eth" + - fec: "KPFEC" + id: "252" + lanes: "3:1" + serdes_group: "31" + speed: "100G" + sysport: "252" + type: "eth" + - fec: "KPFEC" + id: "253" + lanes: "4:1" + serdes_group: "31" + speed: "100G" + sysport: "253" + type: "eth" + - fec: "KPFEC" + id: "254" + lanes: "5:1" + serdes_group: "31" + speed: "100G" + sysport: "254" + type: "eth" + - fec: "KPFEC" + id: "255" + lanes: "6:1" + serdes_group: "31" + speed: "100G" + sysport: "255" + type: "eth" + - fec: "KPFEC" + id: "256" + lanes: "7:1" + serdes_group: "31" + speed: "100G" + sysport: "256" + type: "eth" + - fec: "KPFEC" + id: "201" + lanes: "0:1" + serdes_group: "25" + speed: "100G" + sysport: "201" + type: "eth" + - fec: "KPFEC" + id: "202" + lanes: "1:1" + serdes_group: "25" + speed: "100G" + sysport: "202" + type: "eth" + - fec: "KPFEC" + id: "203" + lanes: "2:1" + serdes_group: "25" + speed: "100G" + sysport: "203" + type: "eth" + - fec: "KPFEC" + id: "204" + lanes: "3:1" + serdes_group: "25" + speed: "100G" + sysport: "204" + type: "eth" + - fec: "KPFEC" + id: "205" + lanes: "4:1" + serdes_group: "25" + speed: "100G" + sysport: "205" + type: "eth" + - fec: "KPFEC" + id: "206" + lanes: "5:1" + serdes_group: "25" + speed: "100G" + sysport: "206" + type: "eth" + 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"eth" + - fec: "KPFEC" + id: "192" + lanes: "7:1" + serdes_group: "23" + speed: "100G" + sysport: "192" + type: "eth" + - fec: "KPFEC" + id: "393" + lanes: "0:1" + serdes_group: "49" + speed: "100G" + sysport: "393" + type: "eth" + - fec: "KPFEC" + id: "394" + lanes: "1:1" + serdes_group: "49" + speed: "100G" + sysport: "394" + type: "eth" + - fec: "KPFEC" + id: "395" + lanes: "2:1" + serdes_group: "49" + speed: "100G" + sysport: "395" + type: "eth" + - fec: "KPFEC" + id: "396" + lanes: "3:1" + serdes_group: "49" + speed: "100G" + sysport: "396" + type: "eth" + - fec: "KPFEC" + id: "397" + lanes: "4:1" + serdes_group: "49" + speed: "100G" + sysport: "397" + type: "eth" + - fec: "KPFEC" + id: "398" + lanes: "5:1" + serdes_group: "49" + speed: "100G" + sysport: "398" + type: "eth" + - fec: "KPFEC" + id: "399" + lanes: "6:1" + serdes_group: "49" + speed: "100G" + sysport: "399" + type: "eth" + - fec: "KPFEC" + id: "400" + lanes: "7:1" + serdes_group: "49" + speed: "100G" + sysport: "400" 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speed: "100G" + sysport: "502" + type: "eth" + - fec: "KPFEC" + id: "503" + lanes: "6:1" + serdes_group: "62" + speed: "100G" + sysport: "503" + type: "eth" + - fec: "KPFEC" + id: "504" + lanes: "7:1" + serdes_group: "62" + speed: "100G" + sysport: "504" + type: "eth" + - fec: "KPFEC" + id: "433" + lanes: "0:1" + serdes_group: "54" + speed: "100G" + sysport: "433" + type: "eth" + - fec: "KPFEC" + id: "434" + lanes: "1:1" + serdes_group: "54" + speed: "100G" + sysport: "434" + type: "eth" + - fec: "KPFEC" + id: "435" + lanes: "2:1" + serdes_group: "54" + speed: "100G" + sysport: "435" + type: "eth" + - fec: "KPFEC" + id: "436" + lanes: "3:1" + serdes_group: "54" + speed: "100G" + sysport: "436" + type: "eth" + - fec: "KPFEC" + id: "437" + lanes: "4:1" + serdes_group: "54" + speed: "100G" + sysport: "437" + type: "eth" + - fec: "KPFEC" + id: "438" + lanes: "5:1" + serdes_group: "54" + speed: "100G" + sysport: "438" + type: "eth" + - fec: "KPFEC" + id: "439" + lanes: "6:1" + serdes_group: "54" + speed: "100G" + sysport: "439" + type: "eth" + - fec: "KPFEC" + id: "440" + lanes: "7:1" + serdes_group: "54" + speed: "100G" + sysport: "440" + type: "eth" + - fec: "KPFEC" + id: "417" + lanes: "0:1" + serdes_group: "52" + speed: "100G" + sysport: "417" + type: "eth" + - fec: "KPFEC" + id: "418" + lanes: "1:1" + serdes_group: "52" + speed: "100G" + sysport: "418" + type: "eth" + - fec: "KPFEC" + id: "419" + lanes: "2:1" + serdes_group: "52" + speed: "100G" + sysport: "419" + type: "eth" + - fec: "KPFEC" + id: "420" + lanes: "3:1" + serdes_group: "52" + speed: "100G" + sysport: "420" + type: "eth" + - fec: "KPFEC" + id: "421" + lanes: "4:1" + serdes_group: "52" + speed: "100G" + sysport: "421" + type: "eth" + - fec: "KPFEC" + id: "422" + lanes: "5:1" + serdes_group: "52" + speed: "100G" + sysport: "422" + type: "eth" + - fec: "KPFEC" + id: "423" + lanes: "6:1" + serdes_group: "52" + speed: "100G" + sysport: "423" + type: "eth" + - fec: "KPFEC" + id: "424" + lanes: "7:1" + serdes_group: "52" + speed: "100G" + sysport: "424" + type: "eth" + - fec: "KPFEC" + id: "449" + lanes: "0:1" + serdes_group: "56" + speed: "100G" + sysport: "449" + type: "eth" + - fec: "KPFEC" + id: "450" + lanes: "1:1" + serdes_group: "56" + speed: "100G" + sysport: "450" + type: "eth" + - fec: "KPFEC" + id: "451" + lanes: "2:1" + serdes_group: "56" + speed: "100G" + sysport: "451" + type: "eth" + - fec: "KPFEC" + id: "452" + lanes: "3:1" + serdes_group: "56" + speed: "100G" + sysport: "452" + type: "eth" + - fec: "KPFEC" + id: "453" + lanes: "4:1" + serdes_group: "56" + speed: "100G" + sysport: "453" + type: "eth" + - fec: "KPFEC" + id: "454" + lanes: "5:1" + serdes_group: "56" + speed: "100G" + sysport: "454" + type: "eth" + - fec: "KPFEC" + id: "455" + lanes: "6:1" + serdes_group: "56" + speed: "100G" + sysport: "455" + type: "eth" + - fec: "KPFEC" + id: "456" + lanes: "7:1" + serdes_group: "56" + speed: "100G" + sysport: "456" + type: "eth" + - fec: "KPFEC" + id: "473" + lanes: "0:1" + serdes_group: "59" + speed: "100G" + sysport: "473" + type: "eth" + - fec: "KPFEC" + id: "474" + lanes: "1:1" + serdes_group: "59" + speed: "100G" + sysport: "474" + type: "eth" + - fec: "KPFEC" + id: "475" + lanes: "2:1" + serdes_group: "59" + speed: "100G" + sysport: "475" + type: "eth" + - fec: "KPFEC" + id: "476" + lanes: "3:1" + serdes_group: "59" + speed: "100G" + sysport: "476" + type: "eth" + - fec: "KPFEC" + id: "477" + lanes: "4:1" + serdes_group: "59" + speed: "100G" + sysport: "477" + type: "eth" + - fec: "KPFEC" + id: "478" + lanes: "5:1" + serdes_group: "59" + speed: "100G" + sysport: "478" + type: "eth" + - fec: "KPFEC" + id: "479" + lanes: "6:1" + serdes_group: "59" + speed: "100G" + sysport: "479" + type: "eth" + - fec: "KPFEC" + id: "480" + lanes: "7:1" + serdes_group: "59" + speed: "100G" + sysport: "480" + type: "eth" + - fec: "KPFEC" + id: "377" + lanes: "0:1" + serdes_group: "47" + speed: "100G" + sysport: "377" + type: "eth" + - fec: "KPFEC" + id: "378" + lanes: "1:1" + serdes_group: "47" + speed: "100G" + sysport: "378" + type: "eth" + - fec: "KPFEC" + id: "379" + lanes: "2:1" + serdes_group: "47" + speed: "100G" + sysport: "379" + type: "eth" + - fec: "KPFEC" + id: "380" + lanes: "3:1" + serdes_group: "47" + speed: "100G" + sysport: "380" + type: "eth" + - fec: "KPFEC" + id: "381" + lanes: "4:1" + serdes_group: "47" + speed: "100G" + sysport: "381" + type: "eth" + - fec: "KPFEC" + id: "382" + lanes: "5:1" + serdes_group: "47" + speed: "100G" + sysport: "382" + type: "eth" + - fec: "KPFEC" + id: "383" + lanes: "6:1" + serdes_group: "47" + speed: "100G" + sysport: "383" + type: "eth" + - fec: "KPFEC" + id: "384" + lanes: "7:1" + serdes_group: "47" + speed: "100G" + sysport: "384" + type: "eth" + - fec: "KPFEC" + id: "345" + lanes: "0:1" + serdes_group: "43" + speed: "100G" + sysport: "345" + type: "eth" + - fec: "KPFEC" + id: "346" + lanes: "1:1" + serdes_group: "43" + speed: "100G" + sysport: "346" + type: "eth" + - fec: "KPFEC" + id: "347" + lanes: "2:1" + serdes_group: "43" + speed: "100G" + sysport: "347" + type: "eth" + - fec: "KPFEC" + id: "348" + lanes: "3:1" + serdes_group: "43" + speed: "100G" + sysport: "348" + type: "eth" + - fec: "KPFEC" + id: "349" + lanes: "4:1" + serdes_group: "43" + speed: "100G" + sysport: "349" + type: "eth" + - fec: "KPFEC" + id: "350" + lanes: "5:1" + serdes_group: "43" + speed: "100G" + sysport: "350" + type: "eth" + - fec: "KPFEC" + id: "351" + lanes: "6:1" + serdes_group: "43" + speed: "100G" + sysport: "351" + type: "eth" + - fec: "KPFEC" + id: "352" + lanes: "7:1" + serdes_group: "43" + speed: "100G" + sysport: "352" + type: "eth" + - fec: "KPFEC" + id: "9" + lanes: "0:1" + serdes_group: "1" + speed: "100G" + sysport: "9" + type: "eth" + - fec: "KPFEC" + id: "10" + lanes: "1:1" + serdes_group: "1" + speed: "100G" + sysport: "10" + type: "eth" + - fec: "KPFEC" + id: "11" + lanes: "2:1" + serdes_group: "1" + speed: "100G" + sysport: "11" + type: "eth" + - fec: "KPFEC" + id: "12" + lanes: "3:1" + serdes_group: "1" + speed: "100G" + sysport: "12" + type: "eth" + - fec: "KPFEC" + id: "13" + lanes: "4:1" + serdes_group: "1" + speed: "100G" + sysport: "13" + type: "eth" + - fec: "KPFEC" + id: "14" + lanes: "5:1" + serdes_group: "1" + speed: "100G" + sysport: "14" + type: "eth" + - fec: "KPFEC" + id: "15" + lanes: "6:1" + serdes_group: "1" + speed: "100G" + sysport: "15" + type: "eth" + - fec: "KPFEC" + id: "16" + lanes: "7:1" + serdes_group: "1" + speed: "100G" + sysport: "16" + type: "eth" + - fec: "KPFEC" + id: "25" + lanes: "0:1" + serdes_group: "3" + speed: "100G" + sysport: "25" + type: "eth" + - fec: "KPFEC" + id: "26" + lanes: "1:1" + serdes_group: "3" + speed: "100G" + sysport: "26" + type: "eth" + - fec: "KPFEC" + id: "27" + lanes: "2:1" + serdes_group: "3" + speed: "100G" + sysport: "27" + type: "eth" + - fec: "KPFEC" + id: "28" + lanes: "3:1" + serdes_group: "3" + speed: "100G" + sysport: "28" + type: "eth" + - fec: "KPFEC" + id: "29" + lanes: "4:1" + serdes_group: "3" + speed: "100G" + sysport: "29" + type: "eth" + - fec: "KPFEC" + id: "30" + lanes: "5:1" + serdes_group: "3" + speed: "100G" + sysport: "30" + type: "eth" + - fec: "KPFEC" + id: "31" + lanes: "6:1" + serdes_group: "3" + speed: "100G" + sysport: "31" + type: "eth" + - fec: "KPFEC" + id: "32" + lanes: "7:1" + serdes_group: "3" + speed: "100G" + sysport: "32" + type: "eth" + - fec: "KPFEC" + id: "89" + lanes: "0:1" + serdes_group: "11" + speed: "100G" + sysport: "89" + type: "eth" + - fec: "KPFEC" + id: "90" + lanes: "1:1" + serdes_group: "11" + speed: "100G" + sysport: "90" + type: "eth" + - fec: "KPFEC" + id: "91" + lanes: "2:1" + serdes_group: "11" + speed: "100G" + sysport: "91" + type: "eth" + - fec: "KPFEC" + id: "92" + lanes: "3:1" + serdes_group: "11" + speed: "100G" + sysport: "92" + type: "eth" + - fec: "KPFEC" + id: "93" + lanes: "4:1" + serdes_group: "11" + speed: "100G" + sysport: "93" + type: "eth" + - fec: "KPFEC" + id: "94" + lanes: "5:1" + serdes_group: "11" + speed: "100G" + sysport: "94" + type: "eth" + - fec: "KPFEC" + id: "95" + lanes: "6:1" + serdes_group: "11" + speed: "100G" + sysport: "95" + type: "eth" + - fec: "KPFEC" + id: "96" + lanes: "7:1" + serdes_group: "11" + speed: "100G" + sysport: "96" + type: "eth" + - fec: "KPFEC" + id: "73" + lanes: "0:1" + serdes_group: "9" + speed: "100G" + sysport: "73" + type: "eth" + - fec: "KPFEC" + id: "74" + lanes: "1:1" + serdes_group: "9" + speed: "100G" + sysport: "74" + type: "eth" + - fec: "KPFEC" + id: "75" + lanes: "2:1" + serdes_group: "9" + speed: "100G" + sysport: "75" + type: "eth" + - fec: "KPFEC" + id: "76" + lanes: "3:1" + serdes_group: "9" + speed: "100G" + sysport: "76" + type: "eth" + - fec: "KPFEC" + id: "77" + lanes: "4:1" + serdes_group: "9" + speed: "100G" + sysport: "77" + type: "eth" + - fec: "KPFEC" + id: "78" + lanes: "5:1" + serdes_group: "9" + speed: "100G" + sysport: "78" + type: "eth" + - fec: "KPFEC" + id: "79" + lanes: "6:1" + serdes_group: "9" + speed: "100G" + sysport: "79" + type: "eth" + - fec: "KPFEC" + id: "80" + lanes: "7:1" + serdes_group: "9" + speed: "100G" + sysport: "80" + type: "eth" + isg: + - id: "0" + lane_swap: "23016754" + rx_polarity: "10001000" + tx_polarity: "00001111" + - id: "1" + lane_swap: "32107645" + rx_polarity: "00100110" + tx_polarity: "10100011" + - id: "2" + lane_swap: "01236457" + rx_polarity: "10010001" + tx_polarity: "10001111" + - id: "3" + lane_swap: "10324675" + rx_polarity: "11000110" + tx_polarity: "11111010" + - id: "4" + lane_swap: "23016754" + rx_polarity: "10001000" + tx_polarity: "00001111" + - id: "5" + lane_swap: "32104675" + rx_polarity: "01001111" + tx_polarity: "11100010" + - id: "6" + lane_swap: "12306475" + rx_polarity: "10011011" + tx_polarity: "11001110" + - id: "7" + lane_swap: "21034657" + rx_polarity: "11001110" + tx_polarity: "10011011" + - id: "8" + lane_swap: "30127465" + rx_polarity: "10111011" + tx_polarity: "11011101" + - id: "9" + lane_swap: "03214756" + rx_polarity: "11011101" + tx_polarity: "10111011" + - id: "10" + lane_swap: "12306475" + rx_polarity: "10011011" + tx_polarity: "10001110" + - id: "11" + lane_swap: "21034657" + rx_polarity: "11001110" + tx_polarity: "10011011" + - id: "12" + lane_swap: "30127465" + rx_polarity: "11110100" + tx_polarity: "10010111" + - id: "13" + lane_swap: "03214756" + rx_polarity: "11011101" + tx_polarity: "10111011" + - id: "14" + lane_swap: "12306475" + rx_polarity: "11010100" + tx_polarity: "10000100" + - id: "15" + lane_swap: "21034657" + rx_polarity: "11001110" + tx_polarity: "10011011" + - id: "16" + lane_swap: "03214756" + rx_polarity: "01010101" + tx_polarity: "01000111" + - id: "17" + lane_swap: "03124756" + rx_polarity: "11011101" + tx_polarity: "00000100" + - id: "18" + lane_swap: "30217465" + rx_polarity: "01000100" + tx_polarity: "01110010" + - id: "19" + lane_swap: "12035746" + rx_polarity: "00000010" + tx_polarity: "10001000" + - id: "20" + lane_swap: "21034657" + rx_polarity: "00100110" + tx_polarity: "10010111" + - id: "21" + lane_swap: "21307564" + rx_polarity: "11001000" + tx_polarity: "01010010" + - id: "22" + lane_swap: "03124756" + rx_polarity: "00000010" + tx_polarity: "10111011" + - id: "23" + lane_swap: "30217465" + rx_polarity: "00011011" + tx_polarity: "01111010" + - id: "24" + lane_swap: "12035746" + rx_polarity: "01010010" + tx_polarity: "00110111" + - id: "25" + lane_swap: "21307564" + rx_polarity: "10000111" + tx_polarity: "01000110" + - id: "26" + lane_swap: "47562103" + rx_polarity: "01111111" + tx_polarity: "01111110" + - id: "27" + lane_swap: "46572103" + rx_polarity: "00000101" + tx_polarity: "10110011" + - id: "28" + lane_swap: "64751230" + rx_polarity: "10101000" + tx_polarity: "00100110" + - id: "29" + lane_swap: "47560123" + rx_polarity: "01111100" + tx_polarity: "10111001" + - id: "30" + lane_swap: "57460123" + rx_polarity: "00001100" + tx_polarity: "00100111" + - id: "31" + lane_swap: "75641032" + rx_polarity: "01100000" + tx_polarity: "00100111" + - id: "32" + lane_swap: "03214657" + rx_polarity: "10100010" + tx_polarity: "00011101" + - id: "33" + lane_swap: "30126475" + rx_polarity: "00110111" + tx_polarity: "00011000" + - id: "34" + lane_swap: "32107465" + rx_polarity: "01000000" + tx_polarity: "01000110" + - id: "35" + lane_swap: "21034756" + rx_polarity: "10110101" + tx_polarity: "00111101" + - id: "36" + lane_swap: "12307465" + rx_polarity: "00010111" + tx_polarity: "01101011" + - id: "37" + lane_swap: "32106475" + rx_polarity: "11100000" + tx_polarity: "10100101" + - id: "38" + lane_swap: "47560312" + rx_polarity: "10010010" + tx_polarity: "10101011" + - id: "39" + lane_swap: "47560312" + rx_polarity: "01110010" + tx_polarity: "11101110" + - id: "40" + lane_swap: "56470213" + rx_polarity: "11100011" + tx_polarity: "10001111" + - id: "41" + lane_swap: "56470213" + rx_polarity: "00110011" + tx_polarity: "11101010" + - id: "42" + lane_swap: "74653021" + rx_polarity: "01000100" + tx_polarity: "01110010" + - id: "43" + lane_swap: "46570321" + rx_polarity: "00110100" + tx_polarity: "10110100" + - id: "44" + lane_swap: "47560312" + rx_polarity: "00100010" + tx_polarity: "00000100" + - id: "45" + lane_swap: "65742031" + rx_polarity: "01000000" + tx_polarity: "01000011" + - id: "46" + lane_swap: "56470213" + rx_polarity: "11101100" + tx_polarity: "00000000" + - id: "47" + lane_swap: "46572301" + rx_polarity: "01010111" + tx_polarity: "11100100" + - id: "48" + lane_swap: "74653012" + rx_polarity: "10111011" + tx_polarity: "11011101" + - id: "49" + lane_swap: "47560321" + rx_polarity: "10010010" + tx_polarity: "11110001" + - id: "50" + lane_swap: "65743210" + rx_polarity: "00010011" + tx_polarity: "11011111" + - id: "51" + lane_swap: "56472301" + rx_polarity: "10010000" + tx_polarity: "01011001" + - id: "52" + lane_swap: "74653012" + rx_polarity: "10111011" + tx_polarity: "11011101" + - id: "53" + lane_swap: "47560321" + rx_polarity: "11011101" + tx_polarity: "11111011" + - id: "54" + lane_swap: "65743210" + rx_polarity: "00010011" + tx_polarity: "11011111" + - id: "55" + lane_swap: "56472301" + rx_polarity: "11011111" + tx_polarity: "00010011" + - id: "56" + lane_swap: "74653012" + rx_polarity: "10111011" + tx_polarity: "11011101" + - id: "57" + lane_swap: "47560321" + rx_polarity: "11011101" + tx_polarity: "10111011" + - id: "58" + lane_swap: "67542103" + rx_polarity: "01010100" + tx_polarity: "00101111" + - id: "59" + lane_swap: "76451230" + rx_polarity: "11000010" + tx_polarity: "10010011" + - id: "60" + lane_swap: "54670123" + rx_polarity: "01010011" + tx_polarity: "10001001" + - id: "61" + lane_swap: "45761032" + rx_polarity: "01100110" + tx_polarity: "10011010" + - id: "62" + lane_swap: "67542103" + rx_polarity: "11110010" + tx_polarity: "01001001" + - id: "63" + lane_swap: "76451230" + rx_polarity: "01000010" + tx_polarity: "00011011" + - id: "64" + lane_swap: "01234567" + rx_polarity: "01000000" + tx_polarity: "00000000" + #pre1: "-4,-4,-4,-4,-4,-4,-4,-4" + #pre2: "-1,-1,-1,-1,-1,-1,-1,-1" + #post: "-4,-4,-4,-4,-4,-4,-4,-4" + #main: "52,52,52,52,52,52,52,52" diff --git a/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_512x100G-2x10G/ivm.sai.config.yaml b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_512x100G-2x10G/ivm.sai.config.yaml new file mode 100755 index 00000000000..c7bddab720c --- /dev/null +++ b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_512x100G-2x10G/ivm.sai.config.yaml @@ -0,0 +1,14 @@ +IFCS_INIT_FILE : "/usr/share/sonic/hwsku/config_tl10_d64p512t_512x100G.yaml" +IFCS_SKU_FILE : "/usr/share/sonic/hwsku/teralynx.MVTX9180" +IFCS_INNO_CLI_PORT : "9999" +IFCS_TARGET : "device" +INNOVIUM_DIR : "/innovium" +PYTHONPATH : "$INNOVIUM_DIR:$INNOVIUM_DIR/cmds:$INNOVIUM_DIR/scripts:$INNOVIUM_DIR/test/:$INNOVIUM_DIR/test/utils:$INNOVIUM_DIR/utils:$INNOVIUM_DIR/pyctypes:$INNOVIUM_DIR/ifcs_cmds:$INNOVIUM_DIR/testutil" +IVM_SAI_DATAPATH_CONFIG_FILE: "/usr/share/sonic/hwsku/ivm.sai.datapath.config.yaml" +IVM_SAI_PARAM_A0008: "64" +IVM_SAI_PARAM_A0016: "1,1,0,0,1" +IVM_SAI_PARAM_A0003: "4" +IVM_SAI_PARAM_A0059: "TRUE" +IVM_SAI_PARAM_A0007: "9" +IVM_SAI_PARAM_A003D: "1" +IVM_SAI_PARAM_A0068: "TRUE" diff --git a/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_512x100G-2x10G/ivm.sai.datapath.config.yaml b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_512x100G-2x10G/ivm.sai.datapath.config.yaml new file mode 100644 index 00000000000..a1b1db409e6 --- /dev/null +++ b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_512x100G-2x10G/ivm.sai.datapath.config.yaml @@ -0,0 +1,11 @@ +#Queue Type +ISAI_PARAM_A000 : "0" +ISAI_PARAM_P0_0_LS : "2304 2304 2304 2304 2304 2304 2304 2304" +ISAI_PARAM_P0_1_LS : "1736 1616 1616 1592 1592 1592 1592 1592" +ISAI_PARAM_P0_1_ALS : "200 80 80 56 56 56 56 56" +ISAI_PARAM_P1_0_LS : "768 768 768 768 768 768 768 768" +ISAI_PARAM_P1_0_LL : "1536 1536 1536 1536 1536 1536 1536 1536" +ISAI_PARAM_P1_1_LS : "1352 1232 1232 1208 1208 1208 1208 1208" +ISAI_PARAM_P1_1_LL : "3138 3138 3138 3138 3138 3138 3138 3138" +ISAI_PARAM_P1_1_ALS : "200 80 80 56 56 56 56 56" +ISAI_PARAM_P1_1_ALL : "86 86 86 86 86 86 86 86" diff --git a/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_512x100G-2x10G/pg_profile_lookup.ini b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_512x100G-2x10G/pg_profile_lookup.ini new file mode 100644 index 00000000000..3da08e28378 --- /dev/null +++ b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_512x100G-2x10G/pg_profile_lookup.ini @@ -0,0 +1,38 @@ +# PG lossless profiles. +# speed cable size xon xoff threshold xon_offset + 25000 1m 1518 0 18304 1 13824 + 50000 1m 1518 0 23808 1 13824 + 100000 1m 1518 0 39680 1 13824 + 200000 1m 1518 0 68864 1 13824 + 400000 1m 1518 0 127360 1 13824 + 800000 1m 1518 0 244864 1 13824 + 25000 2m 1518 0 18304 1 13824 + 50000 2m 1518 0 23808 1 13824 + 100000 2m 1518 0 39680 1 13824 + 200000 2m 1518 0 69504 1 13824 + 400000 2m 1518 0 127360 1 13824 + 800000 2m 1518 0 244864 1 13824 + 25000 5m 1518 0 18304 1 13824 + 50000 5m 1518 0 24064 1 13824 + 100000 5m 1518 0 40064 1 13824 + 200000 5m 1518 0 70272 1 13824 + 400000 5m 1518 0 129920 1 13824 + 800000 5m 1518 0 247424 1 13824 + 25000 40m 1518 0 19840 1 13824 + 50000 40m 1518 0 26240 1 13824 + 100000 40m 1518 0 44544 1 13824 + 200000 40m 1518 0 78848 1 13824 + 400000 40m 1518 0 147072 1 13824 + 800000 40m 1518 0 285312 1 13824 + 25000 100m 1518 0 22016 1 13824 + 50000 100m 1518 0 30080 1 13824 + 100000 100m 1518 0 52224 1 13824 + 200000 100m 1518 0 94464 1 13824 + 400000 100m 1518 0 178560 1 13824 + 800000 100m 1518 0 345984 1 13824 + 25000 300m 1518 0 29696 1 13824 + 50000 300m 1518 0 43008 1 13824 + 100000 300m 1518 0 77824 1 13824 + 200000 300m 1518 0 145536 1 13824 + 400000 300m 1518 0 280960 1 13824 + 800000 300m 1518 0 550528 1 13824 diff --git a/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_512x100G-2x10G/port_config.ini b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_512x100G-2x10G/port_config.ini new file mode 100644 index 00000000000..493254818ab --- /dev/null +++ b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_512x100G-2x10G/port_config.ini @@ -0,0 +1,515 @@ +#name lanes alias fec autoneg index speed subport +Ethernet0 1 etp1a rs off 0 100000 1 +Ethernet1 2 etp1b rs off 0 100000 2 +Ethernet2 3 etp1c rs off 0 100000 3 +Ethernet3 4 etp1d rs off 0 100000 4 +Ethernet4 5 etp1e rs off 0 100000 5 +Ethernet5 6 etp1f rs off 0 100000 6 +Ethernet6 7 etp1g rs off 0 100000 7 +Ethernet7 8 etp1h rs off 0 100000 8 +Ethernet8 17 etp2a rs off 1 100000 1 +Ethernet9 18 etp2b rs off 1 100000 2 +Ethernet10 19 etp2c rs off 1 100000 3 +Ethernet11 20 etp2d rs off 1 100000 4 +Ethernet12 21 etp2e rs off 1 100000 5 +Ethernet13 22 etp2f rs off 1 100000 6 +Ethernet14 23 etp2g rs off 1 100000 7 +Ethernet15 24 etp2h rs off 1 100000 8 +Ethernet16 25 etp3a rs off 2 100000 1 +Ethernet17 26 etp3b rs off 2 100000 2 +Ethernet18 27 etp3c rs off 2 100000 3 +Ethernet19 28 etp3d rs off 2 100000 4 +Ethernet20 29 etp3e rs off 2 100000 5 +Ethernet21 30 etp3f rs off 2 100000 6 +Ethernet22 31 etp3g rs off 2 100000 7 +Ethernet23 32 etp3h rs off 2 100000 8 +Ethernet24 9 etp4a rs off 3 100000 1 +Ethernet25 10 etp4b rs off 3 100000 2 +Ethernet26 11 etp4c rs off 3 100000 3 +Ethernet27 12 etp4d rs off 3 100000 4 +Ethernet28 13 etp4e rs off 3 100000 5 +Ethernet29 14 etp4f rs off 3 100000 6 +Ethernet30 15 etp4g rs off 3 100000 7 +Ethernet31 16 etp4h rs off 3 100000 8 +Ethernet32 33 etp5a rs off 4 100000 1 +Ethernet33 34 etp5b rs off 4 100000 2 +Ethernet34 35 etp5c rs off 4 100000 3 +Ethernet35 36 etp5d rs off 4 100000 4 +Ethernet36 37 etp5e rs off 4 100000 5 +Ethernet37 38 etp5f rs off 4 100000 6 +Ethernet38 39 etp5g rs off 4 100000 7 +Ethernet39 40 etp5h rs off 4 100000 8 +Ethernet40 57 etp6a rs off 5 100000 1 +Ethernet41 58 etp6b rs off 5 100000 2 +Ethernet42 59 etp6c rs off 5 100000 3 +Ethernet43 60 etp6d rs off 5 100000 4 +Ethernet44 61 etp6e rs off 5 100000 5 +Ethernet45 62 etp6f rs off 5 100000 6 +Ethernet46 63 etp6g rs off 5 100000 7 +Ethernet47 64 etp6h rs off 5 100000 8 +Ethernet48 49 etp7a rs off 6 100000 1 +Ethernet49 50 etp7b rs off 6 100000 2 +Ethernet50 51 etp7c rs off 6 100000 3 +Ethernet51 52 etp7d rs off 6 100000 4 +Ethernet52 53 etp7e rs off 6 100000 5 +Ethernet53 54 etp7f rs off 6 100000 6 +Ethernet54 55 etp7g rs off 6 100000 7 +Ethernet55 56 etp7h rs off 6 100000 8 +Ethernet56 41 etp8a rs off 7 100000 1 +Ethernet57 42 etp8b rs off 7 100000 2 +Ethernet58 43 etp8c rs off 7 100000 3 +Ethernet59 44 etp8d rs off 7 100000 4 +Ethernet60 45 etp8e rs off 7 100000 5 +Ethernet61 46 etp8f rs off 7 100000 6 +Ethernet62 47 etp8g rs off 7 100000 7 +Ethernet63 48 etp8h rs off 7 100000 8 +Ethernet64 73 etp9a rs off 8 100000 1 +Ethernet65 74 etp9b rs off 8 100000 2 +Ethernet66 75 etp9c rs off 8 100000 3 +Ethernet67 76 etp9d rs off 8 100000 4 +Ethernet68 77 etp9e rs off 8 100000 5 +Ethernet69 78 etp9f rs off 8 100000 6 +Ethernet70 79 etp9g rs off 8 100000 7 +Ethernet71 80 etp9h rs off 8 100000 8 +Ethernet72 89 etp10a rs off 9 100000 1 +Ethernet73 90 etp10b rs off 9 100000 2 +Ethernet74 91 etp10c rs off 9 100000 3 +Ethernet75 92 etp10d rs off 9 100000 4 +Ethernet76 93 etp10e rs off 9 100000 5 +Ethernet77 94 etp10f rs off 9 100000 6 +Ethernet78 95 etp10g rs off 9 100000 7 +Ethernet79 96 etp10h rs off 9 100000 8 +Ethernet80 81 etp11a rs off 10 100000 1 +Ethernet81 82 etp11b rs off 10 100000 2 +Ethernet82 83 etp11c rs off 10 100000 3 +Ethernet83 84 etp11d rs off 10 100000 4 +Ethernet84 85 etp11e rs off 10 100000 5 +Ethernet85 86 etp11f rs off 10 100000 6 +Ethernet86 87 etp11g rs off 10 100000 7 +Ethernet87 88 etp11h rs off 10 100000 8 +Ethernet88 65 etp12a rs off 11 100000 1 +Ethernet89 66 etp12b rs off 11 100000 2 +Ethernet90 67 etp12c rs off 11 100000 3 +Ethernet91 68 etp12d rs off 11 100000 4 +Ethernet92 69 etp12e rs off 11 100000 5 +Ethernet93 70 etp12f rs off 11 100000 6 +Ethernet94 71 etp12g rs off 11 100000 7 +Ethernet95 72 etp12h rs off 11 100000 8 +Ethernet96 105 etp13a rs off 12 100000 1 +Ethernet97 106 etp13b rs off 12 100000 2 +Ethernet98 107 etp13c rs off 12 100000 3 +Ethernet99 108 etp13d rs off 12 100000 4 +Ethernet100 109 etp13e rs off 12 100000 5 +Ethernet101 110 etp13f rs off 12 100000 6 +Ethernet102 111 etp13g rs off 12 100000 7 +Ethernet103 112 etp13h rs off 12 100000 8 +Ethernet104 121 etp14a rs off 13 100000 1 +Ethernet105 122 etp14b rs off 13 100000 2 +Ethernet106 123 etp14c rs off 13 100000 3 +Ethernet107 124 etp14d rs off 13 100000 4 +Ethernet108 125 etp14e rs off 13 100000 5 +Ethernet109 126 etp14f rs off 13 100000 6 +Ethernet110 127 etp14g rs off 13 100000 7 +Ethernet111 128 etp14h rs off 13 100000 8 +Ethernet112 113 etp15a rs off 14 100000 1 +Ethernet113 114 etp15b rs off 14 100000 2 +Ethernet114 115 etp15c rs off 14 100000 3 +Ethernet115 116 etp15d rs off 14 100000 4 +Ethernet116 117 etp15e rs off 14 100000 5 +Ethernet117 118 etp15f rs off 14 100000 6 +Ethernet118 119 etp15g rs off 14 100000 7 +Ethernet119 120 etp15h rs off 14 100000 8 +Ethernet120 97 etp16a rs off 15 100000 1 +Ethernet121 98 etp16b rs off 15 100000 2 +Ethernet122 99 etp16c rs off 15 100000 3 +Ethernet123 100 etp16d rs off 15 100000 4 +Ethernet124 101 etp16e rs off 15 100000 5 +Ethernet125 102 etp16f rs off 15 100000 6 +Ethernet126 103 etp16g rs off 15 100000 7 +Ethernet127 104 etp16h rs off 15 100000 8 +Ethernet128 129 etp17a rs off 16 100000 1 +Ethernet129 130 etp17b rs off 16 100000 2 +Ethernet130 131 etp17c rs off 16 100000 3 +Ethernet131 132 etp17d rs off 16 100000 4 +Ethernet132 133 etp17e rs off 16 100000 5 +Ethernet133 134 etp17f rs off 16 100000 6 +Ethernet134 135 etp17g rs off 16 100000 7 +Ethernet135 136 etp17h rs off 16 100000 8 +Ethernet136 161 etp18a rs off 17 100000 1 +Ethernet137 162 etp18b rs off 17 100000 2 +Ethernet138 163 etp18c rs off 17 100000 3 +Ethernet139 164 etp18d rs off 17 100000 4 +Ethernet140 165 etp18e rs off 17 100000 5 +Ethernet141 166 etp18f rs off 17 100000 6 +Ethernet142 167 etp18g rs off 17 100000 7 +Ethernet143 168 etp18h rs off 17 100000 8 +Ethernet144 153 etp19a rs off 18 100000 1 +Ethernet145 154 etp19b rs off 18 100000 2 +Ethernet146 155 etp19c rs off 18 100000 3 +Ethernet147 156 etp19d rs off 18 100000 4 +Ethernet148 157 etp19e rs off 18 100000 5 +Ethernet149 158 etp19f rs off 18 100000 6 +Ethernet150 159 etp19g rs off 18 100000 7 +Ethernet151 160 etp19h rs off 18 100000 8 +Ethernet152 137 etp20a rs off 19 100000 1 +Ethernet153 138 etp20b rs off 19 100000 2 +Ethernet154 139 etp20c rs off 19 100000 3 +Ethernet155 140 etp20d rs off 19 100000 4 +Ethernet156 141 etp20e rs off 19 100000 5 +Ethernet157 142 etp20f rs off 19 100000 6 +Ethernet158 143 etp20g rs off 19 100000 7 +Ethernet159 144 etp20h rs off 19 100000 8 +Ethernet160 145 etp21a rs off 20 100000 1 +Ethernet161 146 etp21b rs off 20 100000 2 +Ethernet162 147 etp21c rs off 20 100000 3 +Ethernet163 148 etp21d rs off 20 100000 4 +Ethernet164 149 etp21e rs off 20 100000 5 +Ethernet165 150 etp21f rs off 20 100000 6 +Ethernet166 151 etp21g rs off 20 100000 7 +Ethernet167 152 etp21h rs off 20 100000 8 +Ethernet168 169 etp22a rs off 21 100000 1 +Ethernet169 170 etp22b rs off 21 100000 2 +Ethernet170 171 etp22c rs off 21 100000 3 +Ethernet171 172 etp22d rs off 21 100000 4 +Ethernet172 173 etp22e rs off 21 100000 5 +Ethernet173 174 etp22f rs off 21 100000 6 +Ethernet174 175 etp22g rs off 21 100000 7 +Ethernet175 176 etp22h rs off 21 100000 8 +Ethernet176 193 etp23a rs off 22 100000 1 +Ethernet177 194 etp23b rs off 22 100000 2 +Ethernet178 195 etp23c rs off 22 100000 3 +Ethernet179 196 etp23d rs off 22 100000 4 +Ethernet180 197 etp23e rs off 22 100000 5 +Ethernet181 198 etp23f rs off 22 100000 6 +Ethernet182 199 etp23g rs off 22 100000 7 +Ethernet183 200 etp23h rs off 22 100000 8 +Ethernet184 177 etp24a rs off 23 100000 1 +Ethernet185 178 etp24b rs off 23 100000 2 +Ethernet186 179 etp24c rs off 23 100000 3 +Ethernet187 180 etp24d rs off 23 100000 4 +Ethernet188 181 etp24e rs off 23 100000 5 +Ethernet189 182 etp24f rs off 23 100000 6 +Ethernet190 183 etp24g rs off 23 100000 7 +Ethernet191 184 etp24h rs off 23 100000 8 +Ethernet192 185 etp25a rs off 24 100000 1 +Ethernet193 186 etp25b rs off 24 100000 2 +Ethernet194 187 etp25c rs off 24 100000 3 +Ethernet195 188 etp25d rs off 24 100000 4 +Ethernet196 189 etp25e rs off 24 100000 5 +Ethernet197 190 etp25f rs off 24 100000 6 +Ethernet198 191 etp25g rs off 24 100000 7 +Ethernet199 192 etp25h rs off 24 100000 8 +Ethernet200 201 etp26a rs off 25 100000 1 +Ethernet201 202 etp26b rs off 25 100000 2 +Ethernet202 203 etp26c rs off 25 100000 3 +Ethernet203 204 etp26d rs off 25 100000 4 +Ethernet204 205 etp26e rs off 25 100000 5 +Ethernet205 206 etp26f rs off 25 100000 6 +Ethernet206 207 etp26g rs off 25 100000 7 +Ethernet207 208 etp26h rs off 25 100000 8 +Ethernet208 233 etp27a rs off 26 100000 1 +Ethernet209 234 etp27b rs off 26 100000 2 +Ethernet210 235 etp27c rs off 26 100000 3 +Ethernet211 236 etp27d rs off 26 100000 4 +Ethernet212 237 etp27e rs off 26 100000 5 +Ethernet213 238 etp27f rs off 26 100000 6 +Ethernet214 239 etp27g rs off 26 100000 7 +Ethernet215 240 etp27h rs off 26 100000 8 +Ethernet216 209 etp28a rs off 27 100000 1 +Ethernet217 210 etp28b rs off 27 100000 2 +Ethernet218 211 etp28c rs off 27 100000 3 +Ethernet219 212 etp28d rs off 27 100000 4 +Ethernet220 213 etp28e rs off 27 100000 5 +Ethernet221 214 etp28f rs off 27 100000 6 +Ethernet222 215 etp28g rs off 27 100000 7 +Ethernet223 216 etp28h rs off 27 100000 8 +Ethernet224 225 etp29a rs off 28 100000 1 +Ethernet225 226 etp29b rs off 28 100000 2 +Ethernet226 227 etp29c rs off 28 100000 3 +Ethernet227 228 etp29d rs off 28 100000 4 +Ethernet228 229 etp29e rs off 28 100000 5 +Ethernet229 230 etp29f rs off 28 100000 6 +Ethernet230 231 etp29g rs off 28 100000 7 +Ethernet231 232 etp29h rs off 28 100000 8 +Ethernet232 249 etp30a rs off 29 100000 1 +Ethernet233 250 etp30b rs off 29 100000 2 +Ethernet234 251 etp30c rs off 29 100000 3 +Ethernet235 252 etp30d rs off 29 100000 4 +Ethernet236 253 etp30e rs off 29 100000 5 +Ethernet237 254 etp30f rs off 29 100000 6 +Ethernet238 255 etp30g rs off 29 100000 7 +Ethernet239 256 etp30h rs off 29 100000 8 +Ethernet240 241 etp31a rs off 30 100000 1 +Ethernet241 242 etp31b rs off 30 100000 2 +Ethernet242 243 etp31c rs off 30 100000 3 +Ethernet243 244 etp31d rs off 30 100000 4 +Ethernet244 245 etp31e rs off 30 100000 5 +Ethernet245 246 etp31f rs off 30 100000 6 +Ethernet246 247 etp31g rs off 30 100000 7 +Ethernet247 248 etp31h rs off 30 100000 8 +Ethernet248 217 etp32a rs off 31 100000 1 +Ethernet249 218 etp32b rs off 31 100000 2 +Ethernet250 219 etp32c rs off 31 100000 3 +Ethernet251 220 etp32d rs off 31 100000 4 +Ethernet252 221 etp32e rs off 31 100000 5 +Ethernet253 222 etp32f rs off 31 100000 6 +Ethernet254 223 etp32g rs off 31 100000 7 +Ethernet255 224 etp32h rs off 31 100000 8 +Ethernet256 257 etp33a rs off 32 100000 1 +Ethernet257 258 etp33b rs off 32 100000 2 +Ethernet258 259 etp33c rs off 32 100000 3 +Ethernet259 260 etp33d rs off 32 100000 4 +Ethernet260 261 etp33e rs off 32 100000 5 +Ethernet261 262 etp33f rs off 32 100000 6 +Ethernet262 263 etp33g rs off 32 100000 7 +Ethernet263 264 etp33h rs off 32 100000 8 +Ethernet264 281 etp34a rs off 33 100000 1 +Ethernet265 282 etp34b rs off 33 100000 2 +Ethernet266 283 etp34c rs off 33 100000 3 +Ethernet267 284 etp34d rs off 33 100000 4 +Ethernet268 285 etp34e rs off 33 100000 5 +Ethernet269 286 etp34f rs off 33 100000 6 +Ethernet270 287 etp34g rs off 33 100000 7 +Ethernet271 288 etp34h rs off 33 100000 8 +Ethernet272 289 etp35a rs off 34 100000 1 +Ethernet273 290 etp35b rs off 34 100000 2 +Ethernet274 291 etp35c rs off 34 100000 3 +Ethernet275 292 etp35d rs off 34 100000 4 +Ethernet276 293 etp35e rs off 34 100000 5 +Ethernet277 294 etp35f rs off 34 100000 6 +Ethernet278 295 etp35g rs off 34 100000 7 +Ethernet279 296 etp35h rs off 34 100000 8 +Ethernet280 265 etp36a rs off 35 100000 1 +Ethernet281 266 etp36b rs off 35 100000 2 +Ethernet282 267 etp36c rs off 35 100000 3 +Ethernet283 268 etp36d rs off 35 100000 4 +Ethernet284 269 etp36e rs off 35 100000 5 +Ethernet285 270 etp36f rs off 35 100000 6 +Ethernet286 271 etp36g rs off 35 100000 7 +Ethernet287 272 etp36h rs off 35 100000 8 +Ethernet288 305 etp37a rs off 36 100000 1 +Ethernet289 306 etp37b rs off 36 100000 2 +Ethernet290 307 etp37c rs off 36 100000 3 +Ethernet291 308 etp37d rs off 36 100000 4 +Ethernet292 309 etp37e rs off 36 100000 5 +Ethernet293 310 etp37f rs off 36 100000 6 +Ethernet294 311 etp37g rs off 36 100000 7 +Ethernet295 312 etp37h rs off 36 100000 8 +Ethernet296 321 etp38a rs off 37 100000 1 +Ethernet297 322 etp38b rs off 37 100000 2 +Ethernet298 323 etp38c rs off 37 100000 3 +Ethernet299 324 etp38d rs off 37 100000 4 +Ethernet300 325 etp38e rs off 37 100000 5 +Ethernet301 326 etp38f rs off 37 100000 6 +Ethernet302 327 etp38g rs off 37 100000 7 +Ethernet303 328 etp38h rs off 37 100000 8 +Ethernet304 297 etp39a rs off 38 100000 1 +Ethernet305 298 etp39b rs off 38 100000 2 +Ethernet306 299 etp39c rs off 38 100000 3 +Ethernet307 300 etp39d rs off 38 100000 4 +Ethernet308 301 etp39e rs off 38 100000 5 +Ethernet309 302 etp39f rs off 38 100000 6 +Ethernet310 303 etp39g rs off 38 100000 7 +Ethernet311 304 etp39h rs off 38 100000 8 +Ethernet312 273 etp40a rs off 39 100000 1 +Ethernet313 274 etp40b rs off 39 100000 2 +Ethernet314 275 etp40c rs off 39 100000 3 +Ethernet315 276 etp40d rs off 39 100000 4 +Ethernet316 277 etp40e rs off 39 100000 5 +Ethernet317 278 etp40f rs off 39 100000 6 +Ethernet318 279 etp40g rs off 39 100000 7 +Ethernet319 280 etp40h rs off 39 100000 8 +Ethernet320 313 etp41a rs off 40 100000 1 +Ethernet321 314 etp41b rs off 40 100000 2 +Ethernet322 315 etp41c rs off 40 100000 3 +Ethernet323 316 etp41d rs off 40 100000 4 +Ethernet324 317 etp41e rs off 40 100000 5 +Ethernet325 318 etp41f rs off 40 100000 6 +Ethernet326 319 etp41g rs off 40 100000 7 +Ethernet327 320 etp41h rs off 40 100000 8 +Ethernet328 329 etp42a rs off 41 100000 1 +Ethernet329 330 etp42b rs off 41 100000 2 +Ethernet330 331 etp42c rs off 41 100000 3 +Ethernet331 332 etp42d rs off 41 100000 4 +Ethernet332 333 etp42e rs off 41 100000 5 +Ethernet333 334 etp42f rs off 41 100000 6 +Ethernet334 335 etp42g rs off 41 100000 7 +Ethernet335 336 etp42h rs off 41 100000 8 +Ethernet336 361 etp43a rs off 42 100000 1 +Ethernet337 362 etp43b rs off 42 100000 2 +Ethernet338 363 etp43c rs off 42 100000 3 +Ethernet339 364 etp43d rs off 42 100000 4 +Ethernet340 365 etp43e rs off 42 100000 5 +Ethernet341 366 etp43f rs off 42 100000 6 +Ethernet342 367 etp43g rs off 42 100000 7 +Ethernet343 368 etp43h rs off 42 100000 8 +Ethernet344 337 etp44a rs off 43 100000 1 +Ethernet345 338 etp44b rs off 43 100000 2 +Ethernet346 339 etp44c rs off 43 100000 3 +Ethernet347 340 etp44d rs off 43 100000 4 +Ethernet348 341 etp44e rs off 43 100000 5 +Ethernet349 342 etp44f rs off 43 100000 6 +Ethernet350 343 etp44g rs off 43 100000 7 +Ethernet351 344 etp44h rs off 43 100000 8 +Ethernet352 353 etp45a rs off 44 100000 1 +Ethernet353 354 etp45b rs off 44 100000 2 +Ethernet354 355 etp45c rs off 44 100000 3 +Ethernet355 356 etp45d rs off 44 100000 4 +Ethernet356 357 etp45e rs off 44 100000 5 +Ethernet357 358 etp45f rs off 44 100000 6 +Ethernet358 359 etp45g rs off 44 100000 7 +Ethernet359 360 etp45h rs off 44 100000 8 +Ethernet360 369 etp46a rs off 45 100000 1 +Ethernet361 370 etp46b rs off 45 100000 2 +Ethernet362 371 etp46c rs off 45 100000 3 +Ethernet363 372 etp46d rs off 45 100000 4 +Ethernet364 373 etp46e rs off 45 100000 5 +Ethernet365 374 etp46f rs off 45 100000 6 +Ethernet366 375 etp46g rs off 45 100000 7 +Ethernet367 376 etp46h rs off 45 100000 8 +Ethernet368 377 etp47a rs off 46 100000 1 +Ethernet369 378 etp47b rs off 46 100000 2 +Ethernet370 379 etp47c rs off 46 100000 3 +Ethernet371 380 etp47d rs off 46 100000 4 +Ethernet372 381 etp47e rs off 46 100000 5 +Ethernet373 382 etp47f rs off 46 100000 6 +Ethernet374 383 etp47g rs off 46 100000 7 +Ethernet375 384 etp47h rs off 46 100000 8 +Ethernet376 345 etp48a rs off 47 100000 1 +Ethernet377 346 etp48b rs off 47 100000 2 +Ethernet378 347 etp48c rs off 47 100000 3 +Ethernet379 348 etp48d rs off 47 100000 4 +Ethernet380 349 etp48e rs off 47 100000 5 +Ethernet381 350 etp48f rs off 47 100000 6 +Ethernet382 351 etp48g rs off 47 100000 7 +Ethernet383 352 etp48h rs off 47 100000 8 +Ethernet384 385 etp49a rs off 48 100000 1 +Ethernet385 386 etp49b rs off 48 100000 2 +Ethernet386 387 etp49c rs off 48 100000 3 +Ethernet387 388 etp49d rs off 48 100000 4 +Ethernet388 389 etp49e rs off 48 100000 5 +Ethernet389 390 etp49f rs off 48 100000 6 +Ethernet390 391 etp49g rs off 48 100000 7 +Ethernet391 392 etp49h rs off 48 100000 8 +Ethernet392 401 etp50a rs off 49 100000 1 +Ethernet393 402 etp50b rs off 49 100000 2 +Ethernet394 403 etp50c rs off 49 100000 3 +Ethernet395 404 etp50d rs off 49 100000 4 +Ethernet396 405 etp50e rs off 49 100000 5 +Ethernet397 406 etp50f rs off 49 100000 6 +Ethernet398 407 etp50g rs off 49 100000 7 +Ethernet399 408 etp50h rs off 49 100000 8 +Ethernet400 409 etp51a rs off 50 100000 1 +Ethernet401 410 etp51b rs off 50 100000 2 +Ethernet402 411 etp51c rs off 50 100000 3 +Ethernet403 412 etp51d rs off 50 100000 4 +Ethernet404 413 etp51e rs off 50 100000 5 +Ethernet405 414 etp51f rs off 50 100000 6 +Ethernet406 415 etp51g rs off 50 100000 7 +Ethernet407 416 etp51h rs off 50 100000 8 +Ethernet408 393 etp52a rs off 51 100000 1 +Ethernet409 394 etp52b rs off 51 100000 2 +Ethernet410 395 etp52c rs off 51 100000 3 +Ethernet411 396 etp52d rs off 51 100000 4 +Ethernet412 397 etp52e rs off 51 100000 5 +Ethernet413 398 etp52f rs off 51 100000 6 +Ethernet414 399 etp52g rs off 51 100000 7 +Ethernet415 400 etp52h rs off 51 100000 8 +Ethernet416 417 etp53a rs off 52 100000 1 +Ethernet417 418 etp53b rs off 52 100000 2 +Ethernet418 419 etp53c rs off 52 100000 3 +Ethernet419 420 etp53d rs off 52 100000 4 +Ethernet420 421 etp53e rs off 52 100000 5 +Ethernet421 422 etp53f rs off 52 100000 6 +Ethernet422 423 etp53g rs off 52 100000 7 +Ethernet423 424 etp53h rs off 52 100000 8 +Ethernet424 433 etp54a rs off 53 100000 1 +Ethernet425 434 etp54b rs off 53 100000 2 +Ethernet426 435 etp54c rs off 53 100000 3 +Ethernet427 436 etp54d rs off 53 100000 4 +Ethernet428 437 etp54e rs off 53 100000 5 +Ethernet429 438 etp54f rs off 53 100000 6 +Ethernet430 439 etp54g rs off 53 100000 7 +Ethernet431 440 etp54h rs off 53 100000 8 +Ethernet432 441 etp55a rs off 54 100000 1 +Ethernet433 442 etp55b rs off 54 100000 2 +Ethernet434 443 etp55c rs off 54 100000 3 +Ethernet435 444 etp55d rs off 54 100000 4 +Ethernet436 445 etp55e rs off 54 100000 5 +Ethernet437 446 etp55f rs off 54 100000 6 +Ethernet438 447 etp55g rs off 54 100000 7 +Ethernet439 448 etp55h rs off 54 100000 8 +Ethernet440 425 etp56a rs off 55 100000 1 +Ethernet441 426 etp56b rs off 55 100000 2 +Ethernet442 427 etp56c rs off 55 100000 3 +Ethernet443 428 etp56d rs off 55 100000 4 +Ethernet444 429 etp56e rs off 55 100000 5 +Ethernet445 430 etp56f rs off 55 100000 6 +Ethernet446 431 etp56g rs off 55 100000 7 +Ethernet447 432 etp56h rs off 55 100000 8 +Ethernet448 449 etp57a rs off 56 100000 1 +Ethernet449 450 etp57b rs off 56 100000 2 +Ethernet450 451 etp57c rs off 56 100000 3 +Ethernet451 452 etp57d rs off 56 100000 4 +Ethernet452 453 etp57e rs off 56 100000 5 +Ethernet453 454 etp57f rs off 56 100000 6 +Ethernet454 455 etp57g rs off 56 100000 7 +Ethernet455 456 etp57h rs off 56 100000 8 +Ethernet456 473 etp58a rs off 57 100000 1 +Ethernet457 474 etp58b rs off 57 100000 2 +Ethernet458 475 etp58c rs off 57 100000 3 +Ethernet459 476 etp58d rs off 57 100000 4 +Ethernet460 477 etp58e rs off 57 100000 5 +Ethernet461 478 etp58f rs off 57 100000 6 +Ethernet462 479 etp58g rs off 57 100000 7 +Ethernet463 480 etp58h rs off 57 100000 8 +Ethernet464 465 etp59a rs off 58 100000 1 +Ethernet465 466 etp59b rs off 58 100000 2 +Ethernet466 467 etp59c rs off 58 100000 3 +Ethernet467 468 etp59d rs off 58 100000 4 +Ethernet468 469 etp59e rs off 58 100000 5 +Ethernet469 470 etp59f rs off 58 100000 6 +Ethernet470 471 etp59g rs off 58 100000 7 +Ethernet471 472 etp59h rs off 58 100000 8 +Ethernet472 457 etp60a rs off 59 100000 1 +Ethernet473 458 etp60b rs off 59 100000 2 +Ethernet474 459 etp60c rs off 59 100000 3 +Ethernet475 460 etp60d rs off 59 100000 4 +Ethernet476 461 etp60e rs off 59 100000 5 +Ethernet477 462 etp60f rs off 59 100000 6 +Ethernet478 463 etp60g rs off 59 100000 7 +Ethernet479 464 etp60h rs off 59 100000 8 +Ethernet480 489 etp61a rs off 60 100000 1 +Ethernet481 490 etp61b rs off 60 100000 2 +Ethernet482 491 etp61c rs off 60 100000 3 +Ethernet483 492 etp61d rs off 60 100000 4 +Ethernet484 493 etp61e rs off 60 100000 5 +Ethernet485 494 etp61f rs off 60 100000 6 +Ethernet486 495 etp61g rs off 60 100000 7 +Ethernet487 496 etp61h rs off 60 100000 8 +Ethernet488 505 etp62a rs off 61 100000 1 +Ethernet489 506 etp62b rs off 61 100000 2 +Ethernet490 507 etp62c rs off 61 100000 3 +Ethernet491 508 etp62d rs off 61 100000 4 +Ethernet492 509 etp62e rs off 61 100000 5 +Ethernet493 510 etp62f rs off 61 100000 6 +Ethernet494 511 etp62g rs off 61 100000 7 +Ethernet495 512 etp62h rs off 61 100000 8 +Ethernet496 497 etp63a rs off 62 100000 1 +Ethernet497 498 etp63b rs off 62 100000 2 +Ethernet498 499 etp63c rs off 62 100000 3 +Ethernet499 500 etp63d rs off 62 100000 4 +Ethernet500 501 etp63e rs off 62 100000 5 +Ethernet501 502 etp63f rs off 62 100000 6 +Ethernet502 503 etp63g rs off 62 100000 7 +Ethernet503 504 etp63h rs off 62 100000 8 +Ethernet504 481 etp64a rs off 63 100000 1 +Ethernet505 482 etp64b rs off 63 100000 2 +Ethernet506 483 etp64c rs off 63 100000 3 +Ethernet507 484 etp64d rs off 63 100000 4 +Ethernet508 485 etp64e rs off 63 100000 5 +Ethernet509 486 etp64f rs off 63 100000 6 +Ethernet510 487 etp64g rs off 63 100000 7 +Ethernet511 488 etp64h rs off 63 100000 8 +Ethernet512 513 etp65 none off 64 10000 1 +Ethernet513 514 etp66 none off 65 10000 1 \ No newline at end of file diff --git a/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_512x100G-2x10G/qos.json.j2 b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_512x100G-2x10G/qos.json.j2 new file mode 100755 index 00000000000..3801545c5eb --- /dev/null +++ b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_512x100G-2x10G/qos.json.j2 @@ -0,0 +1,107 @@ +{%- set PORT_LOSSY = [] %} + +{%- set default_topo = default_topo | default('t1', true) %} + +{% if default_topo == 'def_lossy' %} +{% for port in PORT %} + {%- if PORT_LOSSY.append(port) %}{% endif %} +{% endfor %} +{% endif %} + +{%- macro generate_service_port_list(PORT_SERVICE) -%} + {%- if PORT_SERVICE.append("Ethernet512") %}{% endif %} + {%- if PORT_SERVICE.append("Ethernet513") %}{% endif %} +{%- endmacro %} + +{%- set PORT_SERVICE = [] %} +{%- if generate_service_port_list is defined %} + {%- if generate_service_port_list(PORT_SERVICE) %}{% endif %} +{%- endif %} + +{%- macro generate_tc_to_pg_map_per_sku() %} + "TC_TO_PRIORITY_GROUP_MAP": { + "AZURE": { + "0": "0", + "1": "0", + "2": "0", + "3": "3", + "4": "4", + "5": "0", + "6": "0", + "7": "0" + }, + "AZURE_LOSSY": { + "0": "0", + "1": "0", + "2": "0", + "3": "1", + "4": "2", + "5": "0", + "6": "0", + "7": "0" + } + }, +{%- endmacro -%} + +{%- macro generate_scheduler_per_sku() -%} + "SCHEDULER": { + "scheduler.0": { + "type" : "STRICT" + }, + "scheduler.1": { + "type" : "DWRR", + "weight": "1" + } + }, +{%- endmacro -%} + +{%- macro generate_global_dscp_to_tc_map() -%} +{%- endmacro -%} + +{# QUEUE #} +{%- macro generate_queue_config(port_names_active) %} + "QUEUE": { +{% for port in port_names_active.split(',') %} + "{{ port }}|0-2": { + "scheduler": "scheduler.1" + }, + "{{ port }}|3-4": { +{% if port not in PORT_SERVICE and port not in PORT_LOSSY %} + "wred_profile" : "AZURE_LOSSLESS", +{% endif %} + "scheduler" : "scheduler.1" + }, + "{{ port }}|5-6": { + "scheduler": "scheduler.1" + }, + "{{ port }}|7": { + "scheduler": "scheduler.0" + }{{ "," if not loop.last else "" }} +{% endfor %} + } +{%- endmacro %} + +{# PORT_QOS_MAP #} +{%- macro generate_port_qos_map(port_names_active) %} + "PORT_QOS_MAP": { +{% for port in port_names_active.split(',') %} + "{{ port }}": { +{% if port in PORT_SERVICE or port in PORT_LOSSY %} + "dscp_to_tc_map" : "AZURE", + "tc_to_pg_map" : "AZURE_LOSSY", + "tc_to_queue_map" : "AZURE" +{% else %} + "dscp_to_tc_map" : "AZURE", + "tc_to_pg_map" : "AZURE", + "tc_to_queue_map" : "AZURE", + "pfc_to_queue_map" : "AZURE", + "pfc_enable" : "3,4", + "pfcwd_sw_enable" : "3,4" +{% endif %} + }{{ "," if not loop.last else "" }} +{% endfor %} + }, +{%- endmacro %} + + +{%- include 'qos_config.j2' %} diff --git a/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_512x100G-2x10G/qos_defaults_def_lossy.j2 b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_512x100G-2x10G/qos_defaults_def_lossy.j2 new file mode 100755 index 00000000000..c1170619bc6 --- /dev/null +++ b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_512x100G-2x10G/qos_defaults_def_lossy.j2 @@ -0,0 +1,121 @@ +{% set port_names_list = [] %} +{% for port in PORT %} + {%- if port_names_list.append(port) %}{% endif %} +{% endfor %} +{% set port_names = port_names_list | join(',') -%} + + +{ + "TC_TO_QUEUE_MAP":{ + "AZURE":{ + "0":"0", + "1":"1", + "2":"2", + "3":"3", + "4":"4", + "5":"5", + "6":"6", + "7":"7" + } + }, + "TC_TO_PRIORITY_GROUP_MAP": { + "AZURE": { + "0": "0", + "1": "0", + "2": "0", + "3": "1", + "4": "2", + "5": "0", + "6": "0", + "7": "0" + } + }, + "DSCP_TO_TC_MAP": { + "AZURE": { + "0":"0", + "1":"0", + "2":"0", + "3":"0", + "4":"0", + "5":"0", + "6":"0", + "7":"0", + "8":"0", + "9":"0", + "10":"0", + "11":"0", + "12":"0", + "13":"0", + "14":"0", + "15":"0", + "16":"0", + "17":"0", + "18":"0", + "19":"0", + "20":"0", + "21":"0", + "22":"0", + "23":"0", + "24":"0", + "25":"0", + "26":"0", + "27":"0", + "28":"0", + "29":"0", + "30":"0", + "31":"0", + "32":"0", + "33":"0", + "34":"0", + "35":"0", + "36":"0", + "37":"0", + "38":"0", + "39":"0", + "40":"0", + "41":"0", + "42":"0", + "43":"0", + "44":"0", + "45":"0", + "46":"0", + "47":"0", + "48":"0", + "49":"0", + "50":"0", + "51":"0", + "52":"0", + "53":"0", + "54":"0", + "55":"0", + "56":"0", + "57":"0", + "58":"0", + "59":"0", + "60":"0", + "61":"0", + "62":"0", + "63":"0" + } + }, + "PORT_QOS_MAP": { +{% for port in port_names_list %} + "{{ port }}": { + "tc_to_pg_map": "AZURE", + "tc_to_queue_map": "AZURE", + "dscp_to_tc_map": "AZURE" + }{% if not loop.last %},{% endif %} + +{% endfor %} + }, + "SCHEDULER": { + "scheduler.7": { + "type": "STRICT" + } + }, + "QUEUE": { + "{{ port_names }}|7": { + "scheduler": "[SCHEDULER|scheduler.7]" + } + } +} diff --git a/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_512x100G-2x10G/sai.profile b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_512x100G-2x10G/sai.profile new file mode 100644 index 00000000000..aba4fc81fb1 --- /dev/null +++ b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_512x100G-2x10G/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/ivm.sai.config.yaml diff --git a/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_512x100G-2x10G/teralynx.MVTX9180 b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_512x100G-2x10G/teralynx.MVTX9180 new file mode 100644 index 00000000000..e310d0be06a --- /dev/null +++ b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_512x100G-2x10G/teralynx.MVTX9180 @@ -0,0 +1,170 @@ +sku: teralynx.MVTX9180 + +device_id: 0x6000 + +# Hardware constraint information +hardware: + num_ibs: 8 + ib_active: 0,1,2,3,4,5,6,7 + + ports_per_ib: 66, 66, 66, 66, 66, 66, 66, 66 + recirc_port_num: 64, 64, 64, 64, 64, 64, 64, 64 + cpu_port_num: 65 + cpu_port_ib: 0 + mgmt_port_num: 65, 65 + mgmt_port_ibs: 1,2 + + pics_per_ib: 8, 9, 9, 8, 8, 8, 8, 8 + pic_ports_per_pic: 8 + max_serdes_speed: 100 + + num_shared_pics: 0 + + isg [0-7]: + ib: 0 + pic_id: [0-7] + + isg [8-15]: + ib: 4 + pic_id: [0-7] + + isg 16: + ib: 6 + pic_id: 7 + + isg 17: + ib: 6 + pic_id: 6 + + isg 18: + ib: 6 + pic_id: 5 + + isg 19: + ib: 6 + pic_id: 4 + + isg 20: + ib: 6 + pic_id: 3 + + isg 21: + ib: 6 + pic_id: 2 + + isg 22: + ib: 6 + pic_id: 1 + + isg 23: + ib: 6 + pic_id: 0 + + isg 24: + ib: 2 + pic_id: 7 + + isg 25: + ib: 2 + pic_id: 6 + + isg 26: + ib: 2 + pic_id: 5 + + isg 27: + ib: 2 + pic_id: 4 + + isg 28: + ib: 2 + pic_id: 3 + + isg 29: + ib: 2 + pic_id: 2 + + isg 30: + ib: 2 + pic_id: 1 + + isg 31: + ib: 2 + pic_id: 0 + + isg [32-39]: + ib: 3 + pic_id: [0-7] + + isg [40-47]: + ib: 7 + pic_id: [0-7] + + isg 48: + ib: 5 + pic_id: 7 + + isg 49: + ib: 5 + pic_id: 6 + + isg 50: + ib: 5 + pic_id: 5 + + isg 51: + ib: 5 + pic_id: 4 + + isg 52: + ib: 5 + pic_id: 3 + + isg 53: + ib: 5 + pic_id: 2 + + isg 54: + ib: 5 + pic_id: 1 + + isg 55: + ib: 5 + pic_id: 0 + + isg 56: + ib: 1 + pic_id: 7 + + isg 57: + ib: 1 + pic_id: 6 + + isg 58: + ib: 1 + pic_id: 5 + + isg 59: + ib: 1 + pic_id: 4 + + isg 60: + ib: 1 + pic_id: 3 + + isg 61: + ib: 1 + pic_id: 2 + + isg 62: + ib: 1 + pic_id: 1 + + isg 63: + ib: 1 + pic_id: 0 + + isg 64: + mode: 1:1 + ib: 1, 2 + pic_id: 8 diff --git a/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_64x800G-2x10G/buffers.json.j2 b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_64x800G-2x10G/buffers.json.j2 new file mode 100755 index 00000000000..3952ba88deb --- /dev/null +++ b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_64x800G-2x10G/buffers.json.j2 @@ -0,0 +1,3 @@ +{%- set default_topo = default_topo | default('t1', true) %} +{%- include 'buffers_config.j2' %} + diff --git a/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_64x800G-2x10G/buffers_defaults_def_lossy.j2 b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_64x800G-2x10G/buffers_defaults_def_lossy.j2 new file mode 100755 index 00000000000..df3a836c6cf --- /dev/null +++ b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_64x800G-2x10G/buffers_defaults_def_lossy.j2 @@ -0,0 +1,51 @@ +{%- set default_cable = '40m' %} + +{# BUFFER_POOL, BUFFER_PROFILE #} +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "lossy_pool": { + "size": "182386688", + "type": "egress", + "mode": "dynamic", + "xoff": "0" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"lossy_pool", + "size":"0", + "static_th":"22798336" + }, + "egress_lossy_profile": { + "pool":"lossy_pool", + "size":"1518", + "dynamic_th":"2" + } + }, +{%- endmacro %} + + +{# BUFFER_PG #} +{%- macro generate_pg_profils(port_names_active) %} + "BUFFER_PG": { +{% for port in port_names_active.split(',') %} + "{{ port }}|0-7": { + "profile" : "ingress_lossy_profile" + }{% if not loop.last %},{% endif %} + +{% endfor %} + }, +{%- endmacro %} + + +{# BUFFER_QUEUE #} +{%- macro generate_queue_buffers(port_names_active) %} + "BUFFER_QUEUE": { +{% for port in port_names_active.split(',') %} + "{{ port }}|0-7": { + "profile" : "egress_lossy_profile" + }{% if not loop.last %},{% endif %} + +{% endfor %} + } +{%- endmacro %} diff --git a/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_64x800G-2x10G/buffers_defaults_t0.j2 b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_64x800G-2x10G/buffers_defaults_t0.j2 new file mode 100755 index 00000000000..59524186cb8 --- /dev/null +++ b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_64x800G-2x10G/buffers_defaults_t0.j2 @@ -0,0 +1,120 @@ +{%- set default_cable = '40m' %} + +{%- macro generate_service_port_list(PORT_SERVICE) -%} + {%- if PORT_SERVICE.append("Ethernet512") %}{% endif %} + {%- if PORT_SERVICE.append("Ethernet513") %}{% endif %} +{%- endmacro %} + +{%- set PORT_SERVICE = [] %} +{%- if generate_service_port_list is defined %} + {%- if generate_service_port_list(PORT_SERVICE) %}{% endif %} +{%- endif %} + +{# BUFFER_POOL, BUFFER_PROFILE #} +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "158630302", + "type": "ingress", + "mode": "dynamic", + "xoff": "71577600" + }, + "lossy_pool": { + "size": "56012386", + "type": "egress", + "mode": "dynamic", + "xoff": "0" + }, + "egress_lossless_pool": { + "size": "214642688", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossless_profile": { + "pool":"ingress_lossless_pool", + "xoff":"135520", + "size":"1518", + "dynamic_th":"1", + "xon_offset":"9408" + }, + "egress_lossless_profile": { + "pool":"ingress_lossless_pool", + "size":"0", + "static_th":"22798336" + }, + "ingress_lossy_profile": { + "pool":"lossy_pool", + "size":"0", + "static_th":"22798336" + }, + "egress_lossy_profile": { + "pool":"lossy_pool", + "size":"1518", + "dynamic_th":"2" + } + }, +{%- endmacro %} + +{# BUFFER_PG #} +{%- macro generate_pg_profils(port_names_active) %} + "BUFFER_PG": { +{% for port in port_names_active.split(',') %} +{% if port in PORT_SERVICE %} + "{{ port }}|3-4": { + "profile" : "ingress_lossy_profile" + }, +{% else %} + "{{ port }}|3-4": { + "profile" : "ingress_lossless_profile" + }, +{% endif %} +{% endfor %} +{% for port in port_names_active.split(',') %} + "{{ port }}|0": { + "profile" : "ingress_lossy_profile" + }, +{% endfor %} +{% for port in port_names_active.split(',') %} + "{{ port }}|1-2": { + "profile" : "ingress_lossy_profile" + }, +{% endfor %} +{% for port in port_names_active.split(',') %} + "{{ port }}|5-7": { + "profile" : "ingress_lossy_profile" + }{% if not loop.last %},{% endif %} + +{% endfor %} + }, +{%- endmacro %} + +{# BUFFER_QUEUE #} +{%- macro generate_queue_buffers(port_names_active) %} + "BUFFER_QUEUE": { +{% for port in port_names_active.split(',') %} +{% if port in PORT_SERVICE %} + "{{ port }}|3-4": { + "profile" : "egress_lossy_profile" + }, +{% else %} + "{{ port }}|3-4": { + "profile" : "egress_lossless_profile" + }, +{% endif %} +{% endfor %} +{% for port in port_names_active.split(',') %} + "{{ port }}|0-2": { + "profile" : "egress_lossy_profile" + }, +{% endfor %} +{% for port in port_names_active.split(',') %} + "{{ port }}|5-7": { + "profile" : "egress_lossy_profile" + }{% if not loop.last %},{% endif %} + +{% endfor %} + } +{%- endmacro %} + diff --git a/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_64x800G-2x10G/buffers_defaults_t1.j2 b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_64x800G-2x10G/buffers_defaults_t1.j2 new file mode 100755 index 00000000000..59524186cb8 --- /dev/null +++ b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_64x800G-2x10G/buffers_defaults_t1.j2 @@ -0,0 +1,120 @@ +{%- set default_cable = '40m' %} + +{%- macro generate_service_port_list(PORT_SERVICE) -%} + {%- if PORT_SERVICE.append("Ethernet512") %}{% endif %} + {%- if PORT_SERVICE.append("Ethernet513") %}{% endif %} +{%- endmacro %} + +{%- set PORT_SERVICE = [] %} +{%- if generate_service_port_list is defined %} + {%- if generate_service_port_list(PORT_SERVICE) %}{% endif %} +{%- endif %} + +{# BUFFER_POOL, BUFFER_PROFILE #} +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "158630302", + "type": "ingress", + "mode": "dynamic", + "xoff": "71577600" + }, + "lossy_pool": { + "size": "56012386", + "type": "egress", + "mode": "dynamic", + "xoff": "0" + }, + "egress_lossless_pool": { + "size": "214642688", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossless_profile": { + "pool":"ingress_lossless_pool", + "xoff":"135520", + "size":"1518", + "dynamic_th":"1", + "xon_offset":"9408" + }, + "egress_lossless_profile": { + "pool":"ingress_lossless_pool", + "size":"0", + "static_th":"22798336" + }, + "ingress_lossy_profile": { + "pool":"lossy_pool", + "size":"0", + "static_th":"22798336" + }, + "egress_lossy_profile": { + "pool":"lossy_pool", + "size":"1518", + "dynamic_th":"2" + } + }, +{%- endmacro %} + +{# BUFFER_PG #} +{%- macro generate_pg_profils(port_names_active) %} + "BUFFER_PG": { +{% for port in port_names_active.split(',') %} +{% if port in PORT_SERVICE %} + "{{ port }}|3-4": { + "profile" : "ingress_lossy_profile" + }, +{% else %} + "{{ port }}|3-4": { + "profile" : "ingress_lossless_profile" + }, +{% endif %} +{% endfor %} +{% for port in port_names_active.split(',') %} + "{{ port }}|0": { + "profile" : "ingress_lossy_profile" + }, +{% endfor %} +{% for port in port_names_active.split(',') %} + "{{ port }}|1-2": { + "profile" : "ingress_lossy_profile" + }, +{% endfor %} +{% for port in port_names_active.split(',') %} + "{{ port }}|5-7": { + "profile" : "ingress_lossy_profile" + }{% if not loop.last %},{% endif %} + +{% endfor %} + }, +{%- endmacro %} + +{# BUFFER_QUEUE #} +{%- macro generate_queue_buffers(port_names_active) %} + "BUFFER_QUEUE": { +{% for port in port_names_active.split(',') %} +{% if port in PORT_SERVICE %} + "{{ port }}|3-4": { + "profile" : "egress_lossy_profile" + }, +{% else %} + "{{ port }}|3-4": { + "profile" : "egress_lossless_profile" + }, +{% endif %} +{% endfor %} +{% for port in port_names_active.split(',') %} + "{{ port }}|0-2": { + "profile" : "egress_lossy_profile" + }, +{% endfor %} +{% for port in port_names_active.split(',') %} + "{{ port }}|5-7": { + "profile" : "egress_lossy_profile" + }{% if not loop.last %},{% endif %} + +{% endfor %} + } +{%- endmacro %} + diff --git a/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_64x800G-2x10G/config_tl10_d64p512t_64x800G-2x10G.yaml b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_64x800G-2x10G/config_tl10_d64p512t_64x800G-2x10G.yaml new file mode 100644 index 00000000000..d5c40814855 --- /dev/null +++ b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_64x800G-2x10G/config_tl10_d64p512t_64x800G-2x10G.yaml @@ -0,0 +1,825 @@ +ifcs: + options: + log_level: "warn" +nodes: +- node_id: "0" + options: + sku: "configs/sku/teralynx.MVTX9180" + netdev: + - auto_create: "no" + multi_interface: "yes" + buffer_management_mode: "api_driven" + pt01: "896" + wred_cr_ip_proto_list: "17" + cr_assignment_mode: "1" + max_lossless_tc: "2" + forward_profile: "IFCS_FORWARD_PROFILE_ID_PROFILE_E" + ecmp_hierarchical_enable: "1" + intf_outer_l2_term_mode: "loose" + multicast_lag_resolution_enable: "1" + skip_pll_check: "false" + sys_clk: "1800" + ifc_clk: "1800" + mac_clk: "1600" + ecmp_alb_enable: "1" + alb_port_state_enable: "1" + ecmp_alb_timeout_step_size: "2" + bfd_config: + - offload_enable: "true" + txring: + - txring_id: "0" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "1" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "2" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "3" + desc_count: "1024" + prio: "1" + netdev: "true" + rxring: + - rxring_id: "0" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "0, 4, 8, 12, 16, 20, 24, 28, 32, 36, 40, 44" + - rxring_id: "1" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "1, 9, 13, 17, 21, 25, 29, 33, 37, 41, 45" + - rxring_id: "2" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "2, 6, 10, 14, 18, 22, 26, 30, 34, 38, 42, 46" + - rxring_id: "3" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "3, 7, 11, 15, 19, 23, 27, 31, 35, 39, 43, 47" + - rxring_id: "4" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "5" + ib: + - id: "0" + temp_threshold: "92" + - id: "1" + temp_threshold: "92" + - id: "2" + temp_threshold: "92" + - id: "3" + temp_threshold: "92" + - id: "4" + temp_threshold: "92" + - id: "5" + temp_threshold: "92" + - id: "6" + temp_threshold: "92" + - id: "7" + temp_threshold: "92" + devports: + - id: "0" + sysport: "1000" + type: "cpu" + - fec: "NONE" + id: "513" + lanes: "0:1" + serdes_group: "64" + speed: "10G" + #auto_neg: "true" + #link_training: "true" + #bp_tech_ability: "10GBASE_KR" + sysport: "513" + type: "mgmt 0" + - fec: "NONE" + id: "514" + lanes: "1:1" + serdes_group: "64" + speed: "10G" + #auto_neg: "true" + #link_training: "true" + #bp_tech_ability: "10GBASE_KR" + sysport: "514" + type: "mgmt 1" + - fec: "KPFEC" + id: "489" + lanes: "0:8" + serdes_group: "61" + speed: "800G" + sysport: "489" + type: "eth" + - fec: "KPFEC" + id: "505" + lanes: "0:8" + serdes_group: "63" + speed: "800G" + sysport: "505" + type: "eth" + - fec: "KPFEC" + id: "441" + lanes: "0:8" + serdes_group: "55" + speed: "800G" + sysport: "441" + type: "eth" + - fec: "KPFEC" + id: "425" + lanes: "0:8" + serdes_group: "53" + speed: "800G" + sysport: "425" + type: "eth" + - fec: "KPFEC" + id: "41" + lanes: "0:8" + serdes_group: "5" + speed: "800G" + sysport: "41" + type: "eth" + - fec: "KPFEC" + id: "49" + lanes: "0:8" + serdes_group: "6" + speed: "800G" + sysport: "49" + type: "eth" + - fec: "KPFEC" + id: "153" + lanes: "0:8" + serdes_group: "19" + speed: "800G" + sysport: "153" + type: "eth" + - fec: "KPFEC" + id: "137" + lanes: "0:8" + serdes_group: "17" + speed: "800G" + sysport: "137" + type: "eth" + - fec: "KPFEC" + id: "1" + lanes: "0:8" + serdes_group: "0" + speed: "800G" + sysport: "1" + type: "eth" + - fec: "KPFEC" + id: "17" + lanes: "0:8" + serdes_group: "2" + speed: "800G" + sysport: "17" + type: "eth" + - fec: "KPFEC" + id: "81" + lanes: "0:8" + serdes_group: "10" + speed: "800G" + sysport: "81" + type: "eth" + - fec: "KPFEC" + id: "65" + lanes: "0:8" + serdes_group: "8" + speed: "800G" + sysport: "65" + type: "eth" + - fec: "KPFEC" + id: "97" + lanes: "0:8" + serdes_group: "12" + speed: "800G" + sysport: "97" + type: "eth" + - fec: "KPFEC" + id: "113" + lanes: "0:8" + serdes_group: "14" + speed: "800G" + sysport: "113" + type: "eth" + - fec: "KPFEC" + id: "193" + lanes: "0:8" + serdes_group: "24" + speed: "800G" + sysport: "193" + type: "eth" + - fec: "KPFEC" + id: "177" + lanes: "0:8" + serdes_group: "22" + speed: "800G" + sysport: "177" + type: "eth" + - fec: "KPFEC" + id: "33" + lanes: "0:8" + serdes_group: "4" + speed: "800G" + sysport: "33" + type: "eth" + - fec: "KPFEC" + id: "57" + lanes: "0:8" + serdes_group: "7" + speed: "800G" + sysport: "57" + type: "eth" + - fec: "KPFEC" + id: "161" + lanes: "0:8" + serdes_group: "20" + speed: "800G" + sysport: "161" + type: "eth" + - fec: "KPFEC" + id: "129" + lanes: "0:8" + serdes_group: "16" + speed: "800G" + sysport: "129" + type: "eth" + - fec: "KPFEC" + id: "217" + lanes: "0:8" + serdes_group: "27" + speed: "800G" + sysport: "217" + type: "eth" + - fec: "KPFEC" + id: "241" + lanes: "0:8" + serdes_group: "30" + speed: "800G" + sysport: "241" + type: "eth" + - fec: "KPFEC" + id: "233" + lanes: "0:8" + serdes_group: "29" + speed: "800G" + sysport: "233" + type: "eth" + - fec: "KPFEC" + id: "209" + lanes: "0:8" + serdes_group: "26" + speed: "800G" + sysport: "209" + type: "eth" + - fec: "KPFEC" + id: "105" + lanes: "0:8" + serdes_group: "13" + speed: "800G" + sysport: "105" + type: "eth" + - fec: "KPFEC" + id: "121" + lanes: "0:8" + serdes_group: "15" + speed: "800G" + sysport: "121" + type: "eth" + - fec: "KPFEC" + id: "169" + lanes: "0:8" + serdes_group: "21" + speed: "800G" + sysport: "169" + type: "eth" + - fec: "KPFEC" + id: "145" + lanes: "0:8" + serdes_group: "18" + speed: "800G" + sysport: "145" + type: "eth" + - fec: "KPFEC" + id: "265" + lanes: "0:8" + serdes_group: "33" + speed: "800G" + sysport: "265" + type: "eth" + - fec: "KPFEC" + id: "289" + lanes: "0:8" + serdes_group: "36" + speed: "800G" + sysport: "289" + type: "eth" + - fec: "KPFEC" + id: "297" + lanes: "0:8" + serdes_group: "37" + speed: "800G" + sysport: "297" + type: "eth" + - fec: "KPFEC" + id: "273" + lanes: "0:8" + serdes_group: "34" + speed: "800G" + sysport: "273" + type: "eth" + - fec: "KPFEC" + id: "225" + lanes: "0:8" + serdes_group: "28" + speed: "800G" + sysport: "225" + type: "eth" + - fec: "KPFEC" + id: "249" + lanes: "0:8" + serdes_group: "31" + speed: "800G" + sysport: "249" + type: "eth" + - fec: "KPFEC" + id: "201" + lanes: "0:8" + serdes_group: "25" + speed: "800G" + sysport: "201" + type: "eth" + - fec: "KPFEC" + id: "185" + lanes: "0:8" + serdes_group: "23" + speed: "800G" + sysport: "185" + type: "eth" + - fec: "KPFEC" + id: "393" + lanes: "0:8" + serdes_group: "49" + speed: "800G" + sysport: "393" + type: "eth" + - fec: "KPFEC" + id: "409" + lanes: "0:8" + serdes_group: "51" + speed: "800G" + sysport: "409" + type: "eth" + - fec: "KPFEC" + id: "329" + lanes: "0:8" + serdes_group: "41" + speed: "800G" + sysport: "329" + type: "eth" + - fec: "KPFEC" + id: "313" + lanes: "0:8" + serdes_group: "39" + speed: "800G" + sysport: "313" + type: "eth" + - fec: "KPFEC" + id: "257" + lanes: "0:8" + serdes_group: "32" + speed: "800G" + sysport: "257" + type: "eth" + - fec: "KPFEC" + id: "281" + lanes: "0:8" + serdes_group: "35" + speed: "800G" + sysport: "281" + type: "eth" + - fec: "KPFEC" + id: "321" + lanes: "0:8" + serdes_group: "40" + speed: "800G" + sysport: "321" + type: "eth" + - fec: "KPFEC" + id: "305" + lanes: "0:8" + serdes_group: "38" + speed: "800G" + sysport: "305" + type: "eth" + - fec: "KPFEC" + id: "457" + lanes: "0:8" + serdes_group: "57" + speed: "800G" + sysport: "457" + type: "eth" + - fec: "KPFEC" + id: "465" + lanes: "0:8" + serdes_group: "58" + speed: "800G" + sysport: "465" + type: "eth" + - fec: "KPFEC" + id: "369" + lanes: "0:8" + serdes_group: "46" + speed: "800G" + sysport: "369" + type: "eth" + - fec: "KPFEC" + id: "353" + lanes: "0:8" + serdes_group: "44" + speed: "800G" + sysport: "353" + type: "eth" + - fec: "KPFEC" + id: "385" + lanes: "0:8" + serdes_group: "48" + speed: "800G" + sysport: "385" + type: "eth" + - fec: "KPFEC" + id: "401" + lanes: "0:8" + serdes_group: "50" + speed: "800G" + sysport: "401" + type: "eth" + - fec: "KPFEC" + id: "361" + lanes: "0:8" + serdes_group: "45" + speed: "800G" + sysport: "361" + type: "eth" + - fec: "KPFEC" + id: "337" + lanes: "0:8" + serdes_group: "42" + speed: "800G" + sysport: "337" + type: "eth" + - fec: "KPFEC" + id: "481" + lanes: "0:8" + serdes_group: "60" + speed: "800G" + sysport: "481" + type: "eth" + - fec: "KPFEC" + id: "497" + lanes: "0:8" + serdes_group: "62" + speed: "800G" + sysport: "497" + type: "eth" + - fec: "KPFEC" + id: "433" + lanes: "0:8" + serdes_group: "54" + speed: "800G" + sysport: "433" + type: "eth" + - fec: "KPFEC" + id: "417" + lanes: "0:8" + serdes_group: "52" + speed: "800G" + sysport: "417" + type: "eth" + - fec: "KPFEC" + id: "449" + lanes: "0:8" + serdes_group: "56" + speed: "800G" + sysport: "449" + type: "eth" + - fec: "KPFEC" + id: "473" + lanes: "0:8" + serdes_group: "59" + speed: "800G" + sysport: "473" + type: "eth" + - fec: "KPFEC" + id: "377" + lanes: "0:8" + serdes_group: "47" + speed: "800G" + sysport: "377" + type: "eth" + - fec: "KPFEC" + id: "345" + lanes: "0:8" + serdes_group: "43" + speed: "800G" + sysport: "345" + type: "eth" + - fec: "KPFEC" + id: "9" + lanes: "0:8" + serdes_group: "1" + speed: "800G" + sysport: "9" + type: "eth" + - fec: "KPFEC" + id: "25" + lanes: "0:8" + serdes_group: "3" + speed: "800G" + sysport: "25" + type: "eth" + - fec: "KPFEC" + id: "89" + lanes: "0:8" + serdes_group: "11" + speed: "800G" + sysport: "89" + type: "eth" + - fec: "KPFEC" + id: "73" + lanes: "0:8" + serdes_group: "9" + speed: "800G" + sysport: "73" + type: "eth" + isg: + - id: "0" + lane_swap: "23016754" + rx_polarity: "10001000" + tx_polarity: "00001111" + - id: "1" + lane_swap: "32107645" + rx_polarity: "00100110" + tx_polarity: "10100011" + - id: "2" + lane_swap: "01236457" + rx_polarity: "10010001" + tx_polarity: "10001111" + - id: "3" + lane_swap: "10324675" + rx_polarity: "11000110" + tx_polarity: "11111010" + - id: "4" + lane_swap: "23016754" + rx_polarity: "10001000" + tx_polarity: "00001111" + - id: "5" + lane_swap: "32104675" + rx_polarity: "01001111" + tx_polarity: "11100010" + - id: "6" + lane_swap: "12306475" + rx_polarity: "10011011" + tx_polarity: "11001110" + - id: "7" + lane_swap: "21034657" + rx_polarity: "11001110" + tx_polarity: "10011011" + - id: "8" + lane_swap: "30127465" + rx_polarity: "10111011" + tx_polarity: "11011101" + - id: "9" + lane_swap: "03214756" + rx_polarity: "11011101" + tx_polarity: "10111011" + - id: "10" + lane_swap: "12306475" + rx_polarity: "10011011" + tx_polarity: "10001110" + - id: "11" + lane_swap: "21034657" + rx_polarity: "11001110" + tx_polarity: "10011011" + - id: "12" + lane_swap: "30127465" + rx_polarity: "11110100" + tx_polarity: "10010111" + - id: "13" + lane_swap: "03214756" + rx_polarity: "11011101" + tx_polarity: "10111011" + - id: "14" + lane_swap: "12306475" + rx_polarity: "11010100" + tx_polarity: "10000100" + - id: "15" + lane_swap: "21034657" + rx_polarity: "11001110" + tx_polarity: "10011011" + - id: "16" + lane_swap: "03214756" + rx_polarity: "01010101" + tx_polarity: "01000111" + - id: "17" + lane_swap: "03124756" + rx_polarity: "11011101" + tx_polarity: "00000100" + - id: "18" + lane_swap: "30217465" + rx_polarity: "01000100" + tx_polarity: "01110010" + - id: "19" + lane_swap: "12035746" + rx_polarity: "00000010" + tx_polarity: "10001000" + - id: "20" + lane_swap: "21034657" + rx_polarity: "00100110" + tx_polarity: "10010111" + - id: "21" + lane_swap: "21307564" + rx_polarity: "11001000" + tx_polarity: "01010010" + - id: "22" + lane_swap: "03124756" + rx_polarity: "00000010" + tx_polarity: "10111011" + - id: "23" + lane_swap: "30217465" + rx_polarity: "00011011" + tx_polarity: "01111010" + - id: "24" + lane_swap: "12035746" + rx_polarity: "01010010" + tx_polarity: "00110111" + - id: "25" + lane_swap: "21307564" + rx_polarity: "10000111" + tx_polarity: "01000110" + - id: "26" + lane_swap: "47562103" + rx_polarity: "01111111" + tx_polarity: "01111110" + - id: "27" + lane_swap: "46572103" + rx_polarity: "00000101" + tx_polarity: "10110011" + - id: "28" + lane_swap: "64751230" + rx_polarity: "10101000" + tx_polarity: "00100110" + - id: "29" + lane_swap: "47560123" + rx_polarity: "01111100" + tx_polarity: "10111001" + - id: "30" + lane_swap: "57460123" + rx_polarity: "00001100" + tx_polarity: "00100111" + - id: "31" + lane_swap: "75641032" + rx_polarity: "01100000" + tx_polarity: "00100111" + - id: "32" + lane_swap: "03214657" + rx_polarity: "10100010" + tx_polarity: "00011101" + - id: "33" + lane_swap: "30126475" + rx_polarity: "00110111" + tx_polarity: "00011000" + - id: "34" + lane_swap: "32107465" + rx_polarity: "01000000" + tx_polarity: "01000110" + - id: "35" + lane_swap: "21034756" + rx_polarity: "10110101" + tx_polarity: "00111101" + - id: "36" + lane_swap: "12307465" + rx_polarity: "00010111" + tx_polarity: "01101011" + - id: "37" + lane_swap: "32106475" + rx_polarity: "11100000" + tx_polarity: "10100101" + - id: "38" + lane_swap: "47560312" + rx_polarity: "10010010" + tx_polarity: "10101011" + - id: "39" + lane_swap: "47560312" + rx_polarity: "01110010" + tx_polarity: "11101110" + - id: "40" + lane_swap: "56470213" + rx_polarity: "11100011" + tx_polarity: "10001111" + - id: "41" + lane_swap: "56470213" + rx_polarity: "00110011" + tx_polarity: "11101010" + - id: "42" + lane_swap: "74653021" + rx_polarity: "01000100" + tx_polarity: "01110010" + - id: "43" + lane_swap: "46570321" + rx_polarity: "00110100" + tx_polarity: "10110100" + - id: "44" + lane_swap: "47560312" + rx_polarity: "00100010" + tx_polarity: "00000100" + - id: "45" + lane_swap: "65742031" + rx_polarity: "01000000" + tx_polarity: "01000011" + - id: "46" + lane_swap: "56470213" + rx_polarity: "11101100" + tx_polarity: "00000000" + - id: "47" + lane_swap: "46572301" + rx_polarity: "01010111" + tx_polarity: "11100100" + - id: "48" + lane_swap: "74653012" + rx_polarity: "10111011" + tx_polarity: "11011101" + - id: "49" + lane_swap: "47560321" + rx_polarity: "10010010" + tx_polarity: "11110001" + - id: "50" + lane_swap: "65743210" + rx_polarity: "00010011" + tx_polarity: "11011111" + - id: "51" + lane_swap: "56472301" + rx_polarity: "10010000" + tx_polarity: "01011001" + - id: "52" + lane_swap: "74653012" + rx_polarity: "10111011" + tx_polarity: "11011101" + - id: "53" + lane_swap: "47560321" + rx_polarity: "11011101" + tx_polarity: "11111011" + - id: "54" + lane_swap: "65743210" + rx_polarity: "00010011" + tx_polarity: "11011111" + - id: "55" + lane_swap: "56472301" + rx_polarity: "11011111" + tx_polarity: "00010011" + - id: "56" + lane_swap: "74653012" + rx_polarity: "10111011" + tx_polarity: "11011101" + - id: "57" + lane_swap: "47560321" + rx_polarity: "11011101" + tx_polarity: "10111011" + - id: "58" + lane_swap: "67542103" + rx_polarity: "01010100" + tx_polarity: "00101111" + - id: "59" + lane_swap: "76451230" + rx_polarity: "11000010" + tx_polarity: "10010011" + - id: "60" + lane_swap: "54670123" + rx_polarity: "01010011" + tx_polarity: "10001001" + - id: "61" + lane_swap: "45761032" + rx_polarity: "01100110" + tx_polarity: "10011010" + - id: "62" + lane_swap: "67542103" + rx_polarity: "11110010" + tx_polarity: "01001001" + - id: "63" + lane_swap: "76451230" + rx_polarity: "01000010" + tx_polarity: "00011011" + - id: "64" + lane_swap: "01234567" + rx_polarity: "01000000" + tx_polarity: "00000000" + #pre1: "-4,-4,-4,-4,-4,-4,-4,-4" + #pre2: "-1,-1,-1,-1,-1,-1,-1,-1" + #post: "-4,-4,-4,-4,-4,-4,-4,-4" + #main: "52,52,52,52,52,52,52,52" diff --git a/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_64x800G-2x10G/hwsku.json b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_64x800G-2x10G/hwsku.json new file mode 100644 index 00000000000..b4e9281ce83 --- /dev/null +++ b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_64x800G-2x10G/hwsku.json @@ -0,0 +1,398 @@ +{ + "interfaces": { + "Ethernet0": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet8": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet16": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet24": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet32": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet40": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet48": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet56": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet64": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet72": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet80": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet88": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet96": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet104": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet112": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet120": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet128": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet136": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet144": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet152": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet160": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet168": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet176": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet184": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet192": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet200": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet208": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet216": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet224": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet232": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet240": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet248": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet256": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet264": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet272": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet280": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet288": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet296": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet304": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet312": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet320": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet328": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet336": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet344": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet352": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet360": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet368": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet376": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet384": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet392": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet400": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet408": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet416": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet424": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet432": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet440": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet448": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet456": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet464": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet472": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet480": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet488": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet496": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet504": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet512": { + "default_brkout_mode": "1x10G", + "subport": "1", + "fec": "none" + }, + "Ethernet513": { + "default_brkout_mode": "1x10G", + "subport": "1", + "fec": "none" + } + } +} diff --git a/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_64x800G-2x10G/ivm.sai.config.yaml b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_64x800G-2x10G/ivm.sai.config.yaml new file mode 100755 index 00000000000..76b7aaed04b --- /dev/null +++ b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_64x800G-2x10G/ivm.sai.config.yaml @@ -0,0 +1,14 @@ +IFCS_INIT_FILE : "/usr/share/sonic/hwsku/config_tl10_d64p512t_64x800G-2x10G.yaml" +IFCS_SKU_FILE : "/usr/share/sonic/hwsku/teralynx.MVTX9180" +IFCS_INNO_CLI_PORT : "9999" +IFCS_TARGET : "device" +INNOVIUM_DIR : "/innovium" +PYTHONPATH : "$INNOVIUM_DIR:$INNOVIUM_DIR/cmds:$INNOVIUM_DIR/scripts:$INNOVIUM_DIR/test/:$INNOVIUM_DIR/test/utils:$INNOVIUM_DIR/utils:$INNOVIUM_DIR/pyctypes:$INNOVIUM_DIR/ifcs_cmds:$INNOVIUM_DIR/testutil" +IVM_SAI_DATAPATH_CONFIG_FILE: "/usr/share/sonic/hwsku/ivm.sai.datapath.config.yaml" +IVM_SAI_PARAM_A0008: "64" +IVM_SAI_PARAM_A0016: "1,1,0,0,1" +IVM_SAI_PARAM_A0003: "4" +IVM_SAI_PARAM_A0059: "TRUE" +IVM_SAI_PARAM_A0007: "9" +IVM_SAI_PARAM_A003D: "1" +IVM_SAI_PARAM_A0068: "TRUE" diff --git a/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_64x800G-2x10G/ivm.sai.datapath.config.yaml b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_64x800G-2x10G/ivm.sai.datapath.config.yaml new file mode 100755 index 00000000000..a1b1db409e6 --- /dev/null +++ b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_64x800G-2x10G/ivm.sai.datapath.config.yaml @@ -0,0 +1,11 @@ +#Queue Type +ISAI_PARAM_A000 : "0" +ISAI_PARAM_P0_0_LS : "2304 2304 2304 2304 2304 2304 2304 2304" +ISAI_PARAM_P0_1_LS : "1736 1616 1616 1592 1592 1592 1592 1592" +ISAI_PARAM_P0_1_ALS : "200 80 80 56 56 56 56 56" +ISAI_PARAM_P1_0_LS : "768 768 768 768 768 768 768 768" +ISAI_PARAM_P1_0_LL : "1536 1536 1536 1536 1536 1536 1536 1536" +ISAI_PARAM_P1_1_LS : "1352 1232 1232 1208 1208 1208 1208 1208" +ISAI_PARAM_P1_1_LL : "3138 3138 3138 3138 3138 3138 3138 3138" +ISAI_PARAM_P1_1_ALS : "200 80 80 56 56 56 56 56" +ISAI_PARAM_P1_1_ALL : "86 86 86 86 86 86 86 86" diff --git a/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_64x800G-2x10G/pg_profile_lookup.ini b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_64x800G-2x10G/pg_profile_lookup.ini new file mode 100755 index 00000000000..3da08e28378 --- /dev/null +++ b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_64x800G-2x10G/pg_profile_lookup.ini @@ -0,0 +1,38 @@ +# PG lossless profiles. +# speed cable size xon xoff threshold xon_offset + 25000 1m 1518 0 18304 1 13824 + 50000 1m 1518 0 23808 1 13824 + 100000 1m 1518 0 39680 1 13824 + 200000 1m 1518 0 68864 1 13824 + 400000 1m 1518 0 127360 1 13824 + 800000 1m 1518 0 244864 1 13824 + 25000 2m 1518 0 18304 1 13824 + 50000 2m 1518 0 23808 1 13824 + 100000 2m 1518 0 39680 1 13824 + 200000 2m 1518 0 69504 1 13824 + 400000 2m 1518 0 127360 1 13824 + 800000 2m 1518 0 244864 1 13824 + 25000 5m 1518 0 18304 1 13824 + 50000 5m 1518 0 24064 1 13824 + 100000 5m 1518 0 40064 1 13824 + 200000 5m 1518 0 70272 1 13824 + 400000 5m 1518 0 129920 1 13824 + 800000 5m 1518 0 247424 1 13824 + 25000 40m 1518 0 19840 1 13824 + 50000 40m 1518 0 26240 1 13824 + 100000 40m 1518 0 44544 1 13824 + 200000 40m 1518 0 78848 1 13824 + 400000 40m 1518 0 147072 1 13824 + 800000 40m 1518 0 285312 1 13824 + 25000 100m 1518 0 22016 1 13824 + 50000 100m 1518 0 30080 1 13824 + 100000 100m 1518 0 52224 1 13824 + 200000 100m 1518 0 94464 1 13824 + 400000 100m 1518 0 178560 1 13824 + 800000 100m 1518 0 345984 1 13824 + 25000 300m 1518 0 29696 1 13824 + 50000 300m 1518 0 43008 1 13824 + 100000 300m 1518 0 77824 1 13824 + 200000 300m 1518 0 145536 1 13824 + 400000 300m 1518 0 280960 1 13824 + 800000 300m 1518 0 550528 1 13824 diff --git a/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_64x800G-2x10G/port_config.ini b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_64x800G-2x10G/port_config.ini new file mode 100755 index 00000000000..252fefdd911 --- /dev/null +++ b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_64x800G-2x10G/port_config.ini @@ -0,0 +1,67 @@ +# name lanes alias fec autoneg index speed subport +Ethernet0 1,2,3,4,5,6,7,8 etp1 rs off 0 800000 1 +Ethernet8 17,18,19,20,21,22,23,24 etp2 rs off 1 800000 1 +Ethernet16 25,26,27,28,29,30,31,32 etp3 rs off 2 800000 1 +Ethernet24 9,10,11,12,13,14,15,16 etp4 rs off 3 800000 1 +Ethernet32 33,34,35,36,37,38,39,40 etp5 rs off 4 800000 1 +Ethernet40 57,58,59,60,61,62,63,64 etp6 rs off 5 800000 1 +Ethernet48 49,50,51,52,53,54,55,56 etp7 rs off 6 800000 1 +Ethernet56 41,42,43,44,45,46,47,48 etp8 rs off 7 800000 1 +Ethernet64 73,74,75,76,77,78,79,80 etp9 rs off 8 800000 1 +Ethernet72 89,90,91,92,93,94,95,96 etp10 rs off 9 800000 1 +Ethernet80 81,82,83,84,85,86,87,88 etp11 rs off 10 800000 1 +Ethernet88 65,66,67,68,69,70,71,72 etp12 rs off 11 800000 1 +Ethernet96 105,106,107,108,109,110,111,112 etp13 rs off 12 800000 1 +Ethernet104 121,122,123,124,125,126,127,128 etp14 rs off 13 800000 1 +Ethernet112 113,114,115,116,117,118,119,120 etp15 rs off 14 800000 1 +Ethernet120 97,98,99,100,101,102,103,104 etp16 rs off 15 800000 1 +Ethernet128 129,130,131,132,133,134,135,136 etp17 rs off 16 800000 1 +Ethernet136 161,162,163,164,165,166,167,168 etp18 rs off 17 800000 1 +Ethernet144 153,154,155,156,157,158,159,160 etp19 rs off 18 800000 1 +Ethernet152 137,138,139,140,141,142,143,144 etp20 rs off 19 800000 1 +Ethernet160 145,146,147,148,149,150,151,152 etp21 rs off 20 800000 1 +Ethernet168 169,170,171,172,173,174,175,176 etp22 rs off 21 800000 1 +Ethernet176 193,194,195,196,197,198,199,200 etp23 rs off 22 800000 1 +Ethernet184 177,178,179,180,181,182,183,184 etp24 rs off 23 800000 1 +Ethernet192 185,186,187,188,189,190,191,192 etp25 rs off 24 800000 1 +Ethernet200 201,202,203,204,205,206,207,208 etp26 rs off 25 800000 1 +Ethernet208 233,234,235,236,237,238,239,240 etp27 rs off 26 800000 1 +Ethernet216 209,210,211,212,213,214,215,216 etp28 rs off 27 800000 1 +Ethernet224 225,226,227,228,229,230,231,232 etp29 rs off 28 800000 1 +Ethernet232 249,250,251,252,253,254,255,256 etp30 rs off 29 800000 1 +Ethernet240 241,242,243,244,245,246,247,248 etp31 rs off 30 800000 1 +Ethernet248 217,218,219,220,221,222,223,224 etp32 rs off 31 800000 1 +Ethernet256 257,258,259,260,261,262,263,264 etp33 rs off 32 800000 1 +Ethernet264 281,282,283,284,285,286,287,288 etp34 rs off 33 800000 1 +Ethernet272 289,290,291,292,293,294,295,296 etp35 rs off 34 800000 1 +Ethernet280 265,266,267,268,269,270,271,272 etp36 rs off 35 800000 1 +Ethernet288 305,306,307,308,309,310,311,312 etp37 rs off 36 800000 1 +Ethernet296 321,322,323,324,325,326,327,328 etp38 rs off 37 800000 1 +Ethernet304 297,298,299,300,301,302,303,304 etp39 rs off 38 800000 1 +Ethernet312 273,274,275,276,277,278,279,280 etp40 rs off 39 800000 1 +Ethernet320 313,314,315,316,317,318,319,320 etp41 rs off 40 800000 1 +Ethernet328 329,330,331,332,333,334,335,336 etp42 rs off 41 800000 1 +Ethernet336 361,362,363,364,365,366,367,368 etp43 rs off 42 800000 1 +Ethernet344 337,338,339,340,341,342,343,344 etp44 rs off 43 800000 1 +Ethernet352 353,354,355,356,357,358,359,360 etp45 rs off 44 800000 1 +Ethernet360 369,370,371,372,373,374,375,376 etp46 rs off 45 800000 1 +Ethernet368 377,378,379,380,381,382,383,384 etp47 rs off 46 800000 1 +Ethernet376 345,346,347,348,349,350,351,352 etp48 rs off 47 800000 1 +Ethernet384 385,386,387,388,389,390,391,392 etp49 rs off 48 800000 1 +Ethernet392 401,402,403,404,405,406,407,408 etp50 rs off 49 800000 1 +Ethernet400 409,410,411,412,413,414,415,416 etp51 rs off 50 800000 1 +Ethernet408 393,394,395,396,397,398,399,400 etp52 rs off 51 800000 1 +Ethernet416 417,418,419,420,421,422,423,424 etp53 rs off 52 800000 1 +Ethernet424 433,434,435,436,437,438,439,440 etp54 rs off 53 800000 1 +Ethernet432 441,442,443,444,445,446,447,448 etp55 rs off 54 800000 1 +Ethernet440 425,426,427,428,429,430,431,432 etp56 rs off 55 800000 1 +Ethernet448 449,450,451,452,453,454,455,456 etp57 rs off 56 800000 1 +Ethernet456 473,474,475,476,477,478,479,480 etp58 rs off 57 800000 1 +Ethernet464 465,466,467,468,469,470,471,472 etp59 rs off 58 800000 1 +Ethernet472 457,458,459,460,461,462,463,464 etp60 rs off 59 800000 1 +Ethernet480 489,490,491,492,493,494,495,496 etp61 rs off 60 800000 1 +Ethernet488 505,506,507,508,509,510,511,512 etp62 rs off 61 800000 1 +Ethernet496 497,498,499,500,501,502,503,504 etp63 rs off 62 800000 1 +Ethernet504 481,482,483,484,485,486,487,488 etp64 rs off 63 800000 1 +Ethernet512 513 etp65 none off 64 10000 1 +Ethernet513 514 etp66 none off 65 10000 1 diff --git a/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_64x800G-2x10G/qos.json.j2 b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_64x800G-2x10G/qos.json.j2 new file mode 100755 index 00000000000..3801545c5eb --- /dev/null +++ b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_64x800G-2x10G/qos.json.j2 @@ -0,0 +1,107 @@ +{%- set PORT_LOSSY = [] %} + +{%- set default_topo = default_topo | default('t1', true) %} + +{% if default_topo == 'def_lossy' %} +{% for port in PORT %} + {%- if PORT_LOSSY.append(port) %}{% endif %} +{% endfor %} +{% endif %} + +{%- macro generate_service_port_list(PORT_SERVICE) -%} + {%- if PORT_SERVICE.append("Ethernet512") %}{% endif %} + {%- if PORT_SERVICE.append("Ethernet513") %}{% endif %} +{%- endmacro %} + +{%- set PORT_SERVICE = [] %} +{%- if generate_service_port_list is defined %} + {%- if generate_service_port_list(PORT_SERVICE) %}{% endif %} +{%- endif %} + +{%- macro generate_tc_to_pg_map_per_sku() %} + "TC_TO_PRIORITY_GROUP_MAP": { + "AZURE": { + "0": "0", + "1": "0", + "2": "0", + "3": "3", + "4": "4", + "5": "0", + "6": "0", + "7": "0" + }, + "AZURE_LOSSY": { + "0": "0", + "1": "0", + "2": "0", + "3": "1", + "4": "2", + "5": "0", + "6": "0", + "7": "0" + } + }, +{%- endmacro -%} + +{%- macro generate_scheduler_per_sku() -%} + "SCHEDULER": { + "scheduler.0": { + "type" : "STRICT" + }, + "scheduler.1": { + "type" : "DWRR", + "weight": "1" + } + }, +{%- endmacro -%} + +{%- macro generate_global_dscp_to_tc_map() -%} +{%- endmacro -%} + +{# QUEUE #} +{%- macro generate_queue_config(port_names_active) %} + "QUEUE": { +{% for port in port_names_active.split(',') %} + "{{ port }}|0-2": { + "scheduler": "scheduler.1" + }, + "{{ port }}|3-4": { +{% if port not in PORT_SERVICE and port not in PORT_LOSSY %} + "wred_profile" : "AZURE_LOSSLESS", +{% endif %} + "scheduler" : "scheduler.1" + }, + "{{ port }}|5-6": { + "scheduler": "scheduler.1" + }, + "{{ port }}|7": { + "scheduler": "scheduler.0" + }{{ "," if not loop.last else "" }} +{% endfor %} + } +{%- endmacro %} + +{# PORT_QOS_MAP #} +{%- macro generate_port_qos_map(port_names_active) %} + "PORT_QOS_MAP": { +{% for port in port_names_active.split(',') %} + "{{ port }}": { +{% if port in PORT_SERVICE or port in PORT_LOSSY %} + "dscp_to_tc_map" : "AZURE", + "tc_to_pg_map" : "AZURE_LOSSY", + "tc_to_queue_map" : "AZURE" +{% else %} + "dscp_to_tc_map" : "AZURE", + "tc_to_pg_map" : "AZURE", + "tc_to_queue_map" : "AZURE", + "pfc_to_queue_map" : "AZURE", + "pfc_enable" : "3,4", + "pfcwd_sw_enable" : "3,4" +{% endif %} + }{{ "," if not loop.last else "" }} +{% endfor %} + }, +{%- endmacro %} + + +{%- include 'qos_config.j2' %} diff --git a/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_64x800G-2x10G/qos_defaults_def_lossy.j2 b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_64x800G-2x10G/qos_defaults_def_lossy.j2 new file mode 100755 index 00000000000..c1170619bc6 --- /dev/null +++ b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_64x800G-2x10G/qos_defaults_def_lossy.j2 @@ -0,0 +1,121 @@ +{% set port_names_list = [] %} +{% for port in PORT %} + {%- if port_names_list.append(port) %}{% endif %} +{% endfor %} +{% set port_names = port_names_list | join(',') -%} + + +{ + "TC_TO_QUEUE_MAP":{ + "AZURE":{ + "0":"0", + "1":"1", + "2":"2", + "3":"3", + "4":"4", + "5":"5", + "6":"6", + "7":"7" + } + }, + "TC_TO_PRIORITY_GROUP_MAP": { + "AZURE": { + "0": "0", + "1": "0", + "2": "0", + "3": "1", + "4": "2", + "5": "0", + "6": "0", + "7": "0" + } + }, + "DSCP_TO_TC_MAP": { + "AZURE": { + "0":"0", + "1":"0", + "2":"0", + "3":"0", + "4":"0", + "5":"0", + "6":"0", + "7":"0", + "8":"0", + "9":"0", + "10":"0", + "11":"0", + "12":"0", + "13":"0", + "14":"0", + "15":"0", + "16":"0", + "17":"0", + "18":"0", + "19":"0", + "20":"0", + "21":"0", + "22":"0", + "23":"0", + "24":"0", + "25":"0", + "26":"0", + "27":"0", + "28":"0", + "29":"0", + "30":"0", + "31":"0", + "32":"0", + "33":"0", + "34":"0", + "35":"0", + "36":"0", + "37":"0", + "38":"0", + "39":"0", + "40":"0", + "41":"0", + "42":"0", + "43":"0", + "44":"0", + "45":"0", + "46":"0", + "47":"0", + "48":"0", + "49":"0", + "50":"0", + "51":"0", + "52":"0", + "53":"0", + "54":"0", + "55":"0", + "56":"0", + "57":"0", + "58":"0", + "59":"0", + "60":"0", + "61":"0", + "62":"0", + "63":"0" + } + }, + "PORT_QOS_MAP": { +{% for port in port_names_list %} + "{{ port }}": { + "tc_to_pg_map": "AZURE", + "tc_to_queue_map": "AZURE", + "dscp_to_tc_map": "AZURE" + }{% if not loop.last %},{% endif %} + +{% endfor %} + }, + "SCHEDULER": { + "scheduler.7": { + "type": "STRICT" + } + }, + "QUEUE": { + "{{ port_names }}|7": { + "scheduler": "[SCHEDULER|scheduler.7]" + } + } +} diff --git a/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_64x800G-2x10G/sai.profile b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_64x800G-2x10G/sai.profile new file mode 100755 index 00000000000..aba4fc81fb1 --- /dev/null +++ b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_64x800G-2x10G/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/ivm.sai.config.yaml diff --git a/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_64x800G-2x10G/teralynx.MVTX9180 b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_64x800G-2x10G/teralynx.MVTX9180 new file mode 100755 index 00000000000..e310d0be06a --- /dev/null +++ b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_64x800G-2x10G/teralynx.MVTX9180 @@ -0,0 +1,170 @@ +sku: teralynx.MVTX9180 + +device_id: 0x6000 + +# Hardware constraint information +hardware: + num_ibs: 8 + ib_active: 0,1,2,3,4,5,6,7 + + ports_per_ib: 66, 66, 66, 66, 66, 66, 66, 66 + recirc_port_num: 64, 64, 64, 64, 64, 64, 64, 64 + cpu_port_num: 65 + cpu_port_ib: 0 + mgmt_port_num: 65, 65 + mgmt_port_ibs: 1,2 + + pics_per_ib: 8, 9, 9, 8, 8, 8, 8, 8 + pic_ports_per_pic: 8 + max_serdes_speed: 100 + + num_shared_pics: 0 + + isg [0-7]: + ib: 0 + pic_id: [0-7] + + isg [8-15]: + ib: 4 + pic_id: [0-7] + + isg 16: + ib: 6 + pic_id: 7 + + isg 17: + ib: 6 + pic_id: 6 + + isg 18: + ib: 6 + pic_id: 5 + + isg 19: + ib: 6 + pic_id: 4 + + isg 20: + ib: 6 + pic_id: 3 + + isg 21: + ib: 6 + pic_id: 2 + + isg 22: + ib: 6 + pic_id: 1 + + isg 23: + ib: 6 + pic_id: 0 + + isg 24: + ib: 2 + pic_id: 7 + + isg 25: + ib: 2 + pic_id: 6 + + isg 26: + ib: 2 + pic_id: 5 + + isg 27: + ib: 2 + pic_id: 4 + + isg 28: + ib: 2 + pic_id: 3 + + isg 29: + ib: 2 + pic_id: 2 + + isg 30: + ib: 2 + pic_id: 1 + + isg 31: + ib: 2 + pic_id: 0 + + isg [32-39]: + ib: 3 + pic_id: [0-7] + + isg [40-47]: + ib: 7 + pic_id: [0-7] + + isg 48: + ib: 5 + pic_id: 7 + + isg 49: + ib: 5 + pic_id: 6 + + isg 50: + ib: 5 + pic_id: 5 + + isg 51: + ib: 5 + pic_id: 4 + + isg 52: + ib: 5 + pic_id: 3 + + isg 53: + ib: 5 + pic_id: 2 + + isg 54: + ib: 5 + pic_id: 1 + + isg 55: + ib: 5 + pic_id: 0 + + isg 56: + ib: 1 + pic_id: 7 + + isg 57: + ib: 1 + pic_id: 6 + + isg 58: + ib: 1 + pic_id: 5 + + isg 59: + ib: 1 + pic_id: 4 + + isg 60: + ib: 1 + pic_id: 3 + + isg 61: + ib: 1 + pic_id: 2 + + isg 62: + ib: 1 + pic_id: 1 + + isg 63: + ib: 1 + pic_id: 0 + + isg 64: + mode: 1:1 + ib: 1, 2 + pic_id: 8 diff --git a/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_64x800G-2x10G_lab/buffers.json.j2 b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_64x800G-2x10G_lab/buffers.json.j2 new file mode 100755 index 00000000000..3952ba88deb --- /dev/null +++ b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_64x800G-2x10G_lab/buffers.json.j2 @@ -0,0 +1,3 @@ +{%- set default_topo = default_topo | default('t1', true) %} +{%- include 'buffers_config.j2' %} + diff --git a/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_64x800G-2x10G_lab/buffers_defaults_def_lossy.j2 b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_64x800G-2x10G_lab/buffers_defaults_def_lossy.j2 new file mode 100755 index 00000000000..df3a836c6cf --- /dev/null +++ b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_64x800G-2x10G_lab/buffers_defaults_def_lossy.j2 @@ -0,0 +1,51 @@ +{%- set default_cable = '40m' %} + +{# BUFFER_POOL, BUFFER_PROFILE #} +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "lossy_pool": { + "size": "182386688", + "type": "egress", + "mode": "dynamic", + "xoff": "0" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"lossy_pool", + "size":"0", + "static_th":"22798336" + }, + "egress_lossy_profile": { + "pool":"lossy_pool", + "size":"1518", + "dynamic_th":"2" + } + }, +{%- endmacro %} + + +{# BUFFER_PG #} +{%- macro generate_pg_profils(port_names_active) %} + "BUFFER_PG": { +{% for port in port_names_active.split(',') %} + "{{ port }}|0-7": { + "profile" : "ingress_lossy_profile" + }{% if not loop.last %},{% endif %} + +{% endfor %} + }, +{%- endmacro %} + + +{# BUFFER_QUEUE #} +{%- macro generate_queue_buffers(port_names_active) %} + "BUFFER_QUEUE": { +{% for port in port_names_active.split(',') %} + "{{ port }}|0-7": { + "profile" : "egress_lossy_profile" + }{% if not loop.last %},{% endif %} + +{% endfor %} + } +{%- endmacro %} diff --git a/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_64x800G-2x10G_lab/buffers_defaults_t0.j2 b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_64x800G-2x10G_lab/buffers_defaults_t0.j2 new file mode 100755 index 00000000000..59524186cb8 --- /dev/null +++ b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_64x800G-2x10G_lab/buffers_defaults_t0.j2 @@ -0,0 +1,120 @@ +{%- set default_cable = '40m' %} + +{%- macro generate_service_port_list(PORT_SERVICE) -%} + {%- if PORT_SERVICE.append("Ethernet512") %}{% endif %} + {%- if PORT_SERVICE.append("Ethernet513") %}{% endif %} +{%- endmacro %} + +{%- set PORT_SERVICE = [] %} +{%- if generate_service_port_list is defined %} + {%- if generate_service_port_list(PORT_SERVICE) %}{% endif %} +{%- endif %} + +{# BUFFER_POOL, BUFFER_PROFILE #} +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "158630302", + "type": "ingress", + "mode": "dynamic", + "xoff": "71577600" + }, + "lossy_pool": { + "size": "56012386", + "type": "egress", + "mode": "dynamic", + "xoff": "0" + }, + "egress_lossless_pool": { + "size": "214642688", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossless_profile": { + "pool":"ingress_lossless_pool", + "xoff":"135520", + "size":"1518", + "dynamic_th":"1", + "xon_offset":"9408" + }, + "egress_lossless_profile": { + "pool":"ingress_lossless_pool", + "size":"0", + "static_th":"22798336" + }, + "ingress_lossy_profile": { + "pool":"lossy_pool", + "size":"0", + "static_th":"22798336" + }, + "egress_lossy_profile": { + "pool":"lossy_pool", + "size":"1518", + "dynamic_th":"2" + } + }, +{%- endmacro %} + +{# BUFFER_PG #} +{%- macro generate_pg_profils(port_names_active) %} + "BUFFER_PG": { +{% for port in port_names_active.split(',') %} +{% if port in PORT_SERVICE %} + "{{ port }}|3-4": { + "profile" : "ingress_lossy_profile" + }, +{% else %} + "{{ port }}|3-4": { + "profile" : "ingress_lossless_profile" + }, +{% endif %} +{% endfor %} +{% for port in port_names_active.split(',') %} + "{{ port }}|0": { + "profile" : "ingress_lossy_profile" + }, +{% endfor %} +{% for port in port_names_active.split(',') %} + "{{ port }}|1-2": { + "profile" : "ingress_lossy_profile" + }, +{% endfor %} +{% for port in port_names_active.split(',') %} + "{{ port }}|5-7": { + "profile" : "ingress_lossy_profile" + }{% if not loop.last %},{% endif %} + +{% endfor %} + }, +{%- endmacro %} + +{# BUFFER_QUEUE #} +{%- macro generate_queue_buffers(port_names_active) %} + "BUFFER_QUEUE": { +{% for port in port_names_active.split(',') %} +{% if port in PORT_SERVICE %} + "{{ port }}|3-4": { + "profile" : "egress_lossy_profile" + }, +{% else %} + "{{ port }}|3-4": { + "profile" : "egress_lossless_profile" + }, +{% endif %} +{% endfor %} +{% for port in port_names_active.split(',') %} + "{{ port }}|0-2": { + "profile" : "egress_lossy_profile" + }, +{% endfor %} +{% for port in port_names_active.split(',') %} + "{{ port }}|5-7": { + "profile" : "egress_lossy_profile" + }{% if not loop.last %},{% endif %} + +{% endfor %} + } +{%- endmacro %} + diff --git a/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_64x800G-2x10G_lab/buffers_defaults_t1.j2 b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_64x800G-2x10G_lab/buffers_defaults_t1.j2 new file mode 100755 index 00000000000..59524186cb8 --- /dev/null +++ b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_64x800G-2x10G_lab/buffers_defaults_t1.j2 @@ -0,0 +1,120 @@ +{%- set default_cable = '40m' %} + +{%- macro generate_service_port_list(PORT_SERVICE) -%} + {%- if PORT_SERVICE.append("Ethernet512") %}{% endif %} + {%- if PORT_SERVICE.append("Ethernet513") %}{% endif %} +{%- endmacro %} + +{%- set PORT_SERVICE = [] %} +{%- if generate_service_port_list is defined %} + {%- if generate_service_port_list(PORT_SERVICE) %}{% endif %} +{%- endif %} + +{# BUFFER_POOL, BUFFER_PROFILE #} +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "158630302", + "type": "ingress", + "mode": "dynamic", + "xoff": "71577600" + }, + "lossy_pool": { + "size": "56012386", + "type": "egress", + "mode": "dynamic", + "xoff": "0" + }, + "egress_lossless_pool": { + "size": "214642688", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossless_profile": { + "pool":"ingress_lossless_pool", + "xoff":"135520", + "size":"1518", + "dynamic_th":"1", + "xon_offset":"9408" + }, + "egress_lossless_profile": { + "pool":"ingress_lossless_pool", + "size":"0", + "static_th":"22798336" + }, + "ingress_lossy_profile": { + "pool":"lossy_pool", + "size":"0", + "static_th":"22798336" + }, + "egress_lossy_profile": { + "pool":"lossy_pool", + "size":"1518", + "dynamic_th":"2" + } + }, +{%- endmacro %} + +{# BUFFER_PG #} +{%- macro generate_pg_profils(port_names_active) %} + "BUFFER_PG": { +{% for port in port_names_active.split(',') %} +{% if port in PORT_SERVICE %} + "{{ port }}|3-4": { + "profile" : "ingress_lossy_profile" + }, +{% else %} + "{{ port }}|3-4": { + "profile" : "ingress_lossless_profile" + }, +{% endif %} +{% endfor %} +{% for port in port_names_active.split(',') %} + "{{ port }}|0": { + "profile" : "ingress_lossy_profile" + }, +{% endfor %} +{% for port in port_names_active.split(',') %} + "{{ port }}|1-2": { + "profile" : "ingress_lossy_profile" + }, +{% endfor %} +{% for port in port_names_active.split(',') %} + "{{ port }}|5-7": { + "profile" : "ingress_lossy_profile" + }{% if not loop.last %},{% endif %} + +{% endfor %} + }, +{%- endmacro %} + +{# BUFFER_QUEUE #} +{%- macro generate_queue_buffers(port_names_active) %} + "BUFFER_QUEUE": { +{% for port in port_names_active.split(',') %} +{% if port in PORT_SERVICE %} + "{{ port }}|3-4": { + "profile" : "egress_lossy_profile" + }, +{% else %} + "{{ port }}|3-4": { + "profile" : "egress_lossless_profile" + }, +{% endif %} +{% endfor %} +{% for port in port_names_active.split(',') %} + "{{ port }}|0-2": { + "profile" : "egress_lossy_profile" + }, +{% endfor %} +{% for port in port_names_active.split(',') %} + "{{ port }}|5-7": { + "profile" : "egress_lossy_profile" + }{% if not loop.last %},{% endif %} + +{% endfor %} + } +{%- endmacro %} + diff --git a/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_64x800G-2x10G_lab/config_tl10_d64p512t_64x800G-2x10G.yaml b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_64x800G-2x10G_lab/config_tl10_d64p512t_64x800G-2x10G.yaml new file mode 100644 index 00000000000..752b5537163 --- /dev/null +++ b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_64x800G-2x10G_lab/config_tl10_d64p512t_64x800G-2x10G.yaml @@ -0,0 +1,827 @@ +ifcs: + options: + log_level: "warn" +nodes: +- node_id: "0" + options: + sku: "configs/sku/teralynx.MVTX9180" + netdev: + - auto_create: "no" + multi_interface: "yes" + buffer_management_mode: "api_driven" + pt01: "896" + wred_cr_ip_proto_list: "17" + stats_poll_interval: "1000" + cr_assignment_mode: "1" + max_lossless_tc: "2" + ilpm_enable: "1" + forward_profile: "IFCS_FORWARD_PROFILE_ID_PROFILE_E" + ecmp_hierarchical_enable: "1" + intf_outer_l2_term_mode: "loose" + multicast_lag_resolution_enable: "1" + skip_pll_check: "false" + sys_clk: "1800" + ifc_clk: "1800" + mac_clk: "1600" + ecmp_alb_enable: "1" + alb_port_state_enable: "1" + ecmp_alb_timeout_step_size: "2" + bfd_config: + - offload_enable: "true" + txring: + - txring_id: "0" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "1" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "2" + desc_count: "1024" + prio: "1" + netdev: "true" + - txring_id: "3" + desc_count: "1024" + prio: "1" + netdev: "true" + rxring: + - rxring_id: "0" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "0, 4, 8, 12, 16, 20, 24, 28, 32, 36, 40, 44" + - rxring_id: "1" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "1, 9, 13, 17, 21, 25, 29, 33, 37, 41, 45" + - rxring_id: "2" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "2, 6, 10, 14, 18, 22, 26, 30, 34, 38, 42, 46" + - rxring_id: "3" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "3, 7, 11, 15, 19, 23, 27, 31, 35, 39, 43, 47" + - rxring_id: "4" + desc_count: "1024" + prio: "1" + netdev: "true" + queues: "5" + ib: + - id: "0" + temp_threshold: "92" + - id: "1" + temp_threshold: "92" + - id: "2" + temp_threshold: "92" + - id: "3" + temp_threshold: "92" + - id: "4" + temp_threshold: "92" + - id: "5" + temp_threshold: "92" + - id: "6" + temp_threshold: "92" + - id: "7" + temp_threshold: "92" + devports: + - id: "0" + sysport: "1000" + type: "cpu" + - fec: "NONE" + id: "513" + lanes: "0:1" + serdes_group: "64" + speed: "10G" + #auto_neg: "true" + #link_training: "true" + #bp_tech_ability: "10GBASE_KR" + sysport: "513" + type: "mgmt 0" + - fec: "NONE" + id: "514" + lanes: "1:1" + serdes_group: "64" + speed: "10G" + #auto_neg: "true" + #link_training: "true" + #bp_tech_ability: "10GBASE_KR" + sysport: "514" + type: "mgmt 1" + - fec: "KPFEC" + id: "489" + lanes: "0:8" + serdes_group: "61" + speed: "800G" + sysport: "489" + type: "eth" + - fec: "KPFEC" + id: "505" + lanes: "0:8" + serdes_group: "63" + speed: "800G" + sysport: "505" + type: "eth" + - fec: "KPFEC" + id: "441" + lanes: "0:8" + serdes_group: "55" + speed: "800G" + sysport: "441" + type: "eth" + - fec: "KPFEC" + id: "425" + lanes: "0:8" + serdes_group: "53" + speed: "800G" + sysport: "425" + type: "eth" + - fec: "KPFEC" + id: "41" + lanes: "0:8" + serdes_group: "5" + speed: "800G" + sysport: "41" + type: "eth" + - fec: "KPFEC" + id: "49" + lanes: "0:8" + serdes_group: "6" + speed: "800G" + sysport: "49" + type: "eth" + - fec: "KPFEC" + id: "153" + lanes: "0:8" + serdes_group: "19" + speed: "800G" + sysport: "153" + type: "eth" + - fec: "KPFEC" + id: "137" + lanes: "0:8" + serdes_group: "17" + speed: "800G" + sysport: "137" + type: "eth" + - fec: "KPFEC" + id: "1" + lanes: "0:8" + serdes_group: "0" + speed: "800G" + sysport: "1" + type: "eth" + - fec: "KPFEC" + id: "17" + lanes: "0:8" + serdes_group: "2" + speed: "800G" + sysport: "17" + type: "eth" + - fec: "KPFEC" + id: "81" + lanes: "0:8" + serdes_group: "10" + speed: "800G" + sysport: "81" + type: "eth" + - fec: "KPFEC" + id: "65" + lanes: "0:8" + serdes_group: "8" + speed: "800G" + sysport: "65" + type: "eth" + - fec: "KPFEC" + id: "97" + lanes: "0:8" + serdes_group: "12" + speed: "800G" + sysport: "97" + type: "eth" + - fec: "KPFEC" + id: "113" + lanes: "0:8" + serdes_group: "14" + speed: "800G" + sysport: "113" + type: "eth" + - fec: "KPFEC" + id: "193" + lanes: "0:8" + serdes_group: "24" + speed: "800G" + sysport: "193" + type: "eth" + - fec: "KPFEC" + id: "177" + lanes: "0:8" + serdes_group: "22" + speed: "800G" + sysport: "177" + type: "eth" + - fec: "KPFEC" + id: "33" + lanes: "0:8" + serdes_group: "4" + speed: "800G" + sysport: "33" + type: "eth" + - fec: "KPFEC" + id: "57" + lanes: "0:8" + serdes_group: "7" + speed: "800G" + sysport: "57" + type: "eth" + - fec: "KPFEC" + id: "161" + lanes: "0:8" + serdes_group: "20" + speed: "800G" + sysport: "161" + type: "eth" + - fec: "KPFEC" + id: "129" + lanes: "0:8" + serdes_group: "16" + speed: "800G" + sysport: "129" + type: "eth" + - fec: "KPFEC" + id: "217" + lanes: "0:8" + serdes_group: "27" + speed: "800G" + sysport: "217" + type: "eth" + - fec: "KPFEC" + id: "241" + lanes: "0:8" + serdes_group: "30" + speed: "800G" + sysport: "241" + type: "eth" + - fec: "KPFEC" + id: "233" + lanes: "0:8" + serdes_group: "29" + speed: "800G" + sysport: "233" + type: "eth" + - fec: "KPFEC" + id: "209" + lanes: "0:8" + serdes_group: "26" + speed: "800G" + sysport: "209" + type: "eth" + - fec: "KPFEC" + id: "105" + lanes: "0:8" + serdes_group: "13" + speed: "800G" + sysport: "105" + type: "eth" + - fec: "KPFEC" + id: "121" + lanes: "0:8" + serdes_group: "15" + speed: "800G" + sysport: "121" + type: "eth" + - fec: "KPFEC" + id: "169" + lanes: "0:8" + serdes_group: "21" + speed: "800G" + sysport: "169" + type: "eth" + - fec: "KPFEC" + id: "145" + lanes: "0:8" + serdes_group: "18" + speed: "800G" + sysport: "145" + type: "eth" + - fec: "KPFEC" + id: "265" + lanes: "0:8" + serdes_group: "33" + speed: "800G" + sysport: "265" + type: "eth" + - fec: "KPFEC" + id: "289" + lanes: "0:8" + serdes_group: "36" + speed: "800G" + sysport: "289" + type: "eth" + - fec: "KPFEC" + id: "297" + lanes: "0:8" + serdes_group: "37" + speed: "800G" + sysport: "297" + type: "eth" + - fec: "KPFEC" + id: "273" + lanes: "0:8" + serdes_group: "34" + speed: "800G" + sysport: "273" + type: "eth" + - fec: "KPFEC" + id: "225" + lanes: "0:8" + serdes_group: "28" + speed: "800G" + sysport: "225" + type: "eth" + - fec: "KPFEC" + id: "249" + lanes: "0:8" + serdes_group: "31" + speed: "800G" + sysport: "249" + type: "eth" + - fec: "KPFEC" + id: "201" + lanes: "0:8" + serdes_group: "25" + speed: "800G" + sysport: "201" + type: "eth" + - fec: "KPFEC" + id: "185" + lanes: "0:8" + serdes_group: "23" + speed: "800G" + sysport: "185" + type: "eth" + - fec: "KPFEC" + id: "393" + lanes: "0:8" + serdes_group: "49" + speed: "800G" + sysport: "393" + type: "eth" + - fec: "KPFEC" + id: "409" + lanes: "0:8" + serdes_group: "51" + speed: "800G" + sysport: "409" + type: "eth" + - fec: "KPFEC" + id: "329" + lanes: "0:8" + serdes_group: "41" + speed: "800G" + sysport: "329" + type: "eth" + - fec: "KPFEC" + id: "313" + lanes: "0:8" + serdes_group: "39" + speed: "800G" + sysport: "313" + type: "eth" + - fec: "KPFEC" + id: "257" + lanes: "0:8" + serdes_group: "32" + speed: "800G" + sysport: "257" + type: "eth" + - fec: "KPFEC" + id: "281" + lanes: "0:8" + serdes_group: "35" + speed: "800G" + sysport: "281" + type: "eth" + - fec: "KPFEC" + id: "321" + lanes: "0:8" + serdes_group: "40" + speed: "800G" + sysport: "321" + type: "eth" + - fec: "KPFEC" + id: "305" + lanes: "0:8" + serdes_group: "38" + speed: "800G" + sysport: "305" + type: "eth" + - fec: "KPFEC" + id: "457" + lanes: "0:8" + serdes_group: "57" + speed: "800G" + sysport: "457" + type: "eth" + - fec: "KPFEC" + id: "465" + lanes: "0:8" + serdes_group: "58" + speed: "800G" + sysport: "465" + type: "eth" + - fec: "KPFEC" + id: "369" + lanes: "0:8" + serdes_group: "46" + speed: "800G" + sysport: "369" + type: "eth" + - fec: "KPFEC" + id: "353" + lanes: "0:8" + serdes_group: "44" + speed: "800G" + sysport: "353" + type: "eth" + - fec: "KPFEC" + id: "385" + lanes: "0:8" + serdes_group: "48" + speed: "800G" + sysport: "385" + type: "eth" + - fec: "KPFEC" + id: "401" + lanes: "0:8" + serdes_group: "50" + speed: "800G" + sysport: "401" + type: "eth" + - fec: "KPFEC" + id: "361" + lanes: "0:8" + serdes_group: "45" + speed: "800G" + sysport: "361" + type: "eth" + - fec: "KPFEC" + id: "337" + lanes: "0:8" + serdes_group: "42" + speed: "800G" + sysport: "337" + type: "eth" + - fec: "KPFEC" + id: "481" + lanes: "0:8" + serdes_group: "60" + speed: "800G" + sysport: "481" + type: "eth" + - fec: "KPFEC" + id: "497" + lanes: "0:8" + serdes_group: "62" + speed: "800G" + sysport: "497" + type: "eth" + - fec: "KPFEC" + id: "433" + lanes: "0:8" + serdes_group: "54" + speed: "800G" + sysport: "433" + type: "eth" + - fec: "KPFEC" + id: "417" + lanes: "0:8" + serdes_group: "52" + speed: "800G" + sysport: "417" + type: "eth" + - fec: "KPFEC" + id: "449" + lanes: "0:8" + serdes_group: "56" + speed: "800G" + sysport: "449" + type: "eth" + - fec: "KPFEC" + id: "473" + lanes: "0:8" + serdes_group: "59" + speed: "800G" + sysport: "473" + type: "eth" + - fec: "KPFEC" + id: "377" + lanes: "0:8" + serdes_group: "47" + speed: "800G" + sysport: "377" + type: "eth" + - fec: "KPFEC" + id: "345" + lanes: "0:8" + serdes_group: "43" + speed: "800G" + sysport: "345" + type: "eth" + - fec: "KPFEC" + id: "9" + lanes: "0:8" + serdes_group: "1" + speed: "800G" + sysport: "9" + type: "eth" + - fec: "KPFEC" + id: "25" + lanes: "0:8" + serdes_group: "3" + speed: "800G" + sysport: "25" + type: "eth" + - fec: "KPFEC" + id: "89" + lanes: "0:8" + serdes_group: "11" + speed: "800G" + sysport: "89" + type: "eth" + - fec: "KPFEC" + id: "73" + lanes: "0:8" + serdes_group: "9" + speed: "800G" + sysport: "73" + type: "eth" + isg: + - id: "0" + lane_swap: "23016754" + rx_polarity: "10001000" + tx_polarity: "00001111" + - id: "1" + lane_swap: "32107645" + rx_polarity: "00100110" + tx_polarity: "10100011" + - id: "2" + lane_swap: "01236457" + rx_polarity: "10010001" + tx_polarity: "10001111" + - id: "3" + lane_swap: "10324675" + rx_polarity: "11000110" + tx_polarity: "11111010" + - id: "4" + lane_swap: "23016754" + rx_polarity: "10001000" + tx_polarity: "00001111" + - id: "5" + lane_swap: "32104675" + rx_polarity: "01001111" + tx_polarity: "11100010" + - id: "6" + lane_swap: "12306475" + rx_polarity: "10011011" + tx_polarity: "11001110" + - id: "7" + lane_swap: "21034657" + rx_polarity: "11001110" + tx_polarity: "10011011" + - id: "8" + lane_swap: "30127465" + rx_polarity: "10111011" + tx_polarity: "11011101" + - id: "9" + lane_swap: "03214756" + rx_polarity: "11011101" + tx_polarity: "10111011" + - id: "10" + lane_swap: "12306475" + rx_polarity: "10011011" + tx_polarity: "10001110" + - id: "11" + lane_swap: "21034657" + rx_polarity: "11001110" + tx_polarity: "10011011" + - id: "12" + lane_swap: "30127465" + rx_polarity: "11110100" + tx_polarity: "10010111" + - id: "13" + lane_swap: "03214756" + rx_polarity: "11011101" + tx_polarity: "10111011" + - id: "14" + lane_swap: "12306475" + rx_polarity: "11010100" + tx_polarity: "10000100" + - id: "15" + lane_swap: "21034657" + rx_polarity: "11001110" + tx_polarity: "10011011" + - id: "16" + lane_swap: "03214756" + rx_polarity: "01010101" + tx_polarity: "01000111" + - id: "17" + lane_swap: "03124756" + rx_polarity: "11011101" + tx_polarity: "00000100" + - id: "18" + lane_swap: "30217465" + rx_polarity: "01000100" + tx_polarity: "01110010" + - id: "19" + lane_swap: "12035746" + rx_polarity: "00000010" + tx_polarity: "10001000" + - id: "20" + lane_swap: "21034657" + rx_polarity: "00100110" + tx_polarity: "10010111" + - id: "21" + lane_swap: "21307564" + rx_polarity: "11001000" + tx_polarity: "01010010" + - id: "22" + lane_swap: "03124756" + rx_polarity: "00000010" + tx_polarity: "10111011" + - id: "23" + lane_swap: "30217465" + rx_polarity: "00011011" + tx_polarity: "01111010" + - id: "24" + lane_swap: "12035746" + rx_polarity: "01010010" + tx_polarity: "00110111" + - id: "25" + lane_swap: "21307564" + rx_polarity: "10000111" + tx_polarity: "01000110" + - id: "26" + lane_swap: "47562103" + rx_polarity: "01111111" + tx_polarity: "01111110" + - id: "27" + lane_swap: "46572103" + rx_polarity: "00000101" + tx_polarity: "10110011" + - id: "28" + lane_swap: "64751230" + rx_polarity: "10101000" + tx_polarity: "00100110" + - id: "29" + lane_swap: "47560123" + rx_polarity: "01111100" + tx_polarity: "10111001" + - id: "30" + lane_swap: "57460123" + rx_polarity: "00001100" + tx_polarity: "00100111" + - id: "31" + lane_swap: "75641032" + rx_polarity: "01100000" + tx_polarity: "00100111" + - id: "32" + lane_swap: "03214657" + rx_polarity: "10100010" + tx_polarity: "00011101" + - id: "33" + lane_swap: "30126475" + rx_polarity: "00110111" + tx_polarity: "00011000" + - id: "34" + lane_swap: "32107465" + rx_polarity: "01000000" + tx_polarity: "01000110" + - id: "35" + lane_swap: "21034756" + rx_polarity: "10110101" + tx_polarity: "00111101" + - id: "36" + lane_swap: "12307465" + rx_polarity: "00010111" + tx_polarity: "01101011" + - id: "37" + lane_swap: "32106475" + rx_polarity: "11100000" + tx_polarity: "10100101" + - id: "38" + lane_swap: "47560312" + rx_polarity: "10010010" + tx_polarity: "10101011" + - id: "39" + lane_swap: "47560312" + rx_polarity: "01110010" + tx_polarity: "11101110" + - id: "40" + lane_swap: "56470213" + rx_polarity: "11100011" + tx_polarity: "10001111" + - id: "41" + lane_swap: "56470213" + rx_polarity: "00110011" + tx_polarity: "11101010" + - id: "42" + lane_swap: "74653021" + rx_polarity: "01000100" + tx_polarity: "01110010" + - id: "43" + lane_swap: "46570321" + rx_polarity: "00110100" + tx_polarity: "10110100" + - id: "44" + lane_swap: "47560312" + rx_polarity: "00100010" + tx_polarity: "00000100" + - id: "45" + lane_swap: "65742031" + rx_polarity: "01000000" + tx_polarity: "01000011" + - id: "46" + lane_swap: "56470213" + rx_polarity: "11101100" + tx_polarity: "00000000" + - id: "47" + lane_swap: "46572301" + rx_polarity: "01010111" + tx_polarity: "11100100" + - id: "48" + lane_swap: "74653012" + rx_polarity: "10111011" + tx_polarity: "11011101" + - id: "49" + lane_swap: "47560321" + rx_polarity: "10010010" + tx_polarity: "11110001" + - id: "50" + lane_swap: "65743210" + rx_polarity: "00010011" + tx_polarity: "11011111" + - id: "51" + lane_swap: "56472301" + rx_polarity: "10010000" + tx_polarity: "01011001" + - id: "52" + lane_swap: "74653012" + rx_polarity: "10111011" + tx_polarity: "11011101" + - id: "53" + lane_swap: "47560321" + rx_polarity: "11011101" + tx_polarity: "11111011" + - id: "54" + lane_swap: "65743210" + rx_polarity: "00010011" + tx_polarity: "11011111" + - id: "55" + lane_swap: "56472301" + rx_polarity: "11011111" + tx_polarity: "00010011" + - id: "56" + lane_swap: "74653012" + rx_polarity: "10111011" + tx_polarity: "11011101" + - id: "57" + lane_swap: "47560321" + rx_polarity: "11011101" + tx_polarity: "10111011" + - id: "58" + lane_swap: "67542103" + rx_polarity: "01010100" + tx_polarity: "00101111" + - id: "59" + lane_swap: "76451230" + rx_polarity: "11000010" + tx_polarity: "10010011" + - id: "60" + lane_swap: "54670123" + rx_polarity: "01010011" + tx_polarity: "10001001" + - id: "61" + lane_swap: "45761032" + rx_polarity: "01100110" + tx_polarity: "10011010" + - id: "62" + lane_swap: "67542103" + rx_polarity: "11110010" + tx_polarity: "01001001" + - id: "63" + lane_swap: "76451230" + rx_polarity: "01000010" + tx_polarity: "00011011" + - id: "64" + lane_swap: "01234567" + rx_polarity: "01000000" + tx_polarity: "00000000" + #pre1: "-4,-4,-4,-4,-4,-4,-4,-4" + #pre2: "-1,-1,-1,-1,-1,-1,-1,-1" + #post: "-4,-4,-4,-4,-4,-4,-4,-4" + #main: "52,52,52,52,52,52,52,52" diff --git a/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_64x800G-2x10G_lab/hwsku.json b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_64x800G-2x10G_lab/hwsku.json new file mode 100644 index 00000000000..b4e9281ce83 --- /dev/null +++ b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_64x800G-2x10G_lab/hwsku.json @@ -0,0 +1,398 @@ +{ + "interfaces": { + "Ethernet0": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet8": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet16": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet24": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet32": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet40": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet48": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet56": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet64": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet72": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet80": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet88": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet96": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet104": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet112": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet120": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet128": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet136": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet144": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet152": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet160": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet168": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet176": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet184": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet192": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet200": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet208": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet216": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet224": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet232": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet240": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet248": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet256": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet264": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet272": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet280": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet288": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet296": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet304": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet312": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet320": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet328": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet336": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet344": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet352": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet360": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet368": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet376": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet384": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet392": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet400": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet408": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet416": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet424": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet432": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet440": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet448": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet456": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet464": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet472": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet480": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet488": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet496": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet504": { + "default_brkout_mode": "1x800G[400G,200G]", + "subport": "1", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet512": { + "default_brkout_mode": "1x10G", + "subport": "1", + "fec": "none" + }, + "Ethernet513": { + "default_brkout_mode": "1x10G", + "subport": "1", + "fec": "none" + } + } +} diff --git a/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_64x800G-2x10G_lab/ivm.sai.config.yaml b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_64x800G-2x10G_lab/ivm.sai.config.yaml new file mode 100755 index 00000000000..0f8191b0428 --- /dev/null +++ b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_64x800G-2x10G_lab/ivm.sai.config.yaml @@ -0,0 +1,24 @@ +IFCS_INIT_FILE : "/usr/share/sonic/hwsku/config_tl10_d64p512t_64x800G-2x10G.yaml" +IFCS_SKU_FILE : "/usr/share/sonic/hwsku/teralynx.MVTX9180" +IFCS_INNO_CLI_PORT : "9999" +IFCS_TARGET : "device" +INNOVIUM_DIR : "/innovium" +PYTHONPATH : "$INNOVIUM_DIR:$INNOVIUM_DIR/cmds:$INNOVIUM_DIR/scripts:$INNOVIUM_DIR/test/:$INNOVIUM_DIR/test/utils:$INNOVIUM_DIR/utils:$INNOVIUM_DIR/pyctypes:$INNOVIUM_DIR/ifcs_cmds:$INNOVIUM_DIR/testutil" +IVM_SAI_DATAPATH_CONFIG_FILE: "/usr/share/sonic/hwsku/ivm.sai.datapath.config.yaml" +IVM_SAI_PARAM_A0008: "64" +IVM_SAI_PARAM_A0016: "1,1,0,0,1" +IVM_SAI_PARAM_A0003: "4" +IVM_SAI_PARAM_A0001: "TRUE" +IVM_SAI_PARAM_A0014: "TRUE" +IVM_SAI_PARAM_A0013: "1" +IVM_SAI_PARAM_A0059: "TRUE" +IVM_SAI_PARAM_A0056: "1" +IVM_SAI_PARAM_A005A: "41, 28, 29" +IVM_SAI_PARAM_A0007: "9" +IVM_SAI_PARAM_A0032: "1" +IVM_SAI_PARAM_A0058: "TRUE" +IVM_SAI_PARAM_A0063: "1" +IVM_SAI_PARAM_A005F: "1" +IVM_SAI_PARAM_A003D: "1" +IVM_SAI_PARAM_A0068: "TRUE" +IVM_SAI_PARAM_A0076: "1" diff --git a/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_64x800G-2x10G_lab/ivm.sai.datapath.config.yaml b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_64x800G-2x10G_lab/ivm.sai.datapath.config.yaml new file mode 100755 index 00000000000..1f851d32281 --- /dev/null +++ b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_64x800G-2x10G_lab/ivm.sai.datapath.config.yaml @@ -0,0 +1,16 @@ +#Queue Type +ISAI_PARAM_A000 : "0" +ISAI_PARAM_P0_0_LS : "2304 2304 2304 2304 2304 2304 2304 2304" +ISAI_PARAM_P0_1_LS : "1736 1616 1616 1592 1592 1592 1592 1592" +ISAI_PARAM_P0_1_ALS : "200 80 80 56 56 56 56 56" +ISAI_PARAM_P1_0_LS : "768 768 768 768 768 768 768 768" +ISAI_PARAM_P1_0_LL : "1536 1536 1536 1536 1536 1536 1536 1536" +ISAI_PARAM_P1_1_LS : "1352 1232 1232 1208 1208 1208 1208 1208" +ISAI_PARAM_P1_1_LL : "3138 3138 3138 3138 3138 3138 3138 3138" +ISAI_PARAM_P1_1_ALS : "200 80 80 56 56 56 56 56" +ISAI_PARAM_P1_1_ALL : "86 86 86 86 86 86 86 86" +IVM_SAI_DP_PARAM_B_3_LL_1 : "60 60 60 60 60 60 60 60" +ISAI_PARAM_0_LL_TM : "0" +ISAI_PARAM_0_LL_TV : "400" +ISAI_PARAM_0_LS_TM : "0" +ISAI_PARAM_0_LS_TV : "400" diff --git a/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_64x800G-2x10G_lab/pg_profile_lookup.ini b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_64x800G-2x10G_lab/pg_profile_lookup.ini new file mode 100755 index 00000000000..3da08e28378 --- /dev/null +++ b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_64x800G-2x10G_lab/pg_profile_lookup.ini @@ -0,0 +1,38 @@ +# PG lossless profiles. +# speed cable size xon xoff threshold xon_offset + 25000 1m 1518 0 18304 1 13824 + 50000 1m 1518 0 23808 1 13824 + 100000 1m 1518 0 39680 1 13824 + 200000 1m 1518 0 68864 1 13824 + 400000 1m 1518 0 127360 1 13824 + 800000 1m 1518 0 244864 1 13824 + 25000 2m 1518 0 18304 1 13824 + 50000 2m 1518 0 23808 1 13824 + 100000 2m 1518 0 39680 1 13824 + 200000 2m 1518 0 69504 1 13824 + 400000 2m 1518 0 127360 1 13824 + 800000 2m 1518 0 244864 1 13824 + 25000 5m 1518 0 18304 1 13824 + 50000 5m 1518 0 24064 1 13824 + 100000 5m 1518 0 40064 1 13824 + 200000 5m 1518 0 70272 1 13824 + 400000 5m 1518 0 129920 1 13824 + 800000 5m 1518 0 247424 1 13824 + 25000 40m 1518 0 19840 1 13824 + 50000 40m 1518 0 26240 1 13824 + 100000 40m 1518 0 44544 1 13824 + 200000 40m 1518 0 78848 1 13824 + 400000 40m 1518 0 147072 1 13824 + 800000 40m 1518 0 285312 1 13824 + 25000 100m 1518 0 22016 1 13824 + 50000 100m 1518 0 30080 1 13824 + 100000 100m 1518 0 52224 1 13824 + 200000 100m 1518 0 94464 1 13824 + 400000 100m 1518 0 178560 1 13824 + 800000 100m 1518 0 345984 1 13824 + 25000 300m 1518 0 29696 1 13824 + 50000 300m 1518 0 43008 1 13824 + 100000 300m 1518 0 77824 1 13824 + 200000 300m 1518 0 145536 1 13824 + 400000 300m 1518 0 280960 1 13824 + 800000 300m 1518 0 550528 1 13824 diff --git a/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_64x800G-2x10G_lab/port_config.ini b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_64x800G-2x10G_lab/port_config.ini new file mode 100755 index 00000000000..252fefdd911 --- /dev/null +++ b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_64x800G-2x10G_lab/port_config.ini @@ -0,0 +1,67 @@ +# name lanes alias fec autoneg index speed subport +Ethernet0 1,2,3,4,5,6,7,8 etp1 rs off 0 800000 1 +Ethernet8 17,18,19,20,21,22,23,24 etp2 rs off 1 800000 1 +Ethernet16 25,26,27,28,29,30,31,32 etp3 rs off 2 800000 1 +Ethernet24 9,10,11,12,13,14,15,16 etp4 rs off 3 800000 1 +Ethernet32 33,34,35,36,37,38,39,40 etp5 rs off 4 800000 1 +Ethernet40 57,58,59,60,61,62,63,64 etp6 rs off 5 800000 1 +Ethernet48 49,50,51,52,53,54,55,56 etp7 rs off 6 800000 1 +Ethernet56 41,42,43,44,45,46,47,48 etp8 rs off 7 800000 1 +Ethernet64 73,74,75,76,77,78,79,80 etp9 rs off 8 800000 1 +Ethernet72 89,90,91,92,93,94,95,96 etp10 rs off 9 800000 1 +Ethernet80 81,82,83,84,85,86,87,88 etp11 rs off 10 800000 1 +Ethernet88 65,66,67,68,69,70,71,72 etp12 rs off 11 800000 1 +Ethernet96 105,106,107,108,109,110,111,112 etp13 rs off 12 800000 1 +Ethernet104 121,122,123,124,125,126,127,128 etp14 rs off 13 800000 1 +Ethernet112 113,114,115,116,117,118,119,120 etp15 rs off 14 800000 1 +Ethernet120 97,98,99,100,101,102,103,104 etp16 rs off 15 800000 1 +Ethernet128 129,130,131,132,133,134,135,136 etp17 rs off 16 800000 1 +Ethernet136 161,162,163,164,165,166,167,168 etp18 rs off 17 800000 1 +Ethernet144 153,154,155,156,157,158,159,160 etp19 rs off 18 800000 1 +Ethernet152 137,138,139,140,141,142,143,144 etp20 rs off 19 800000 1 +Ethernet160 145,146,147,148,149,150,151,152 etp21 rs off 20 800000 1 +Ethernet168 169,170,171,172,173,174,175,176 etp22 rs off 21 800000 1 +Ethernet176 193,194,195,196,197,198,199,200 etp23 rs off 22 800000 1 +Ethernet184 177,178,179,180,181,182,183,184 etp24 rs off 23 800000 1 +Ethernet192 185,186,187,188,189,190,191,192 etp25 rs off 24 800000 1 +Ethernet200 201,202,203,204,205,206,207,208 etp26 rs off 25 800000 1 +Ethernet208 233,234,235,236,237,238,239,240 etp27 rs off 26 800000 1 +Ethernet216 209,210,211,212,213,214,215,216 etp28 rs off 27 800000 1 +Ethernet224 225,226,227,228,229,230,231,232 etp29 rs off 28 800000 1 +Ethernet232 249,250,251,252,253,254,255,256 etp30 rs off 29 800000 1 +Ethernet240 241,242,243,244,245,246,247,248 etp31 rs off 30 800000 1 +Ethernet248 217,218,219,220,221,222,223,224 etp32 rs off 31 800000 1 +Ethernet256 257,258,259,260,261,262,263,264 etp33 rs off 32 800000 1 +Ethernet264 281,282,283,284,285,286,287,288 etp34 rs off 33 800000 1 +Ethernet272 289,290,291,292,293,294,295,296 etp35 rs off 34 800000 1 +Ethernet280 265,266,267,268,269,270,271,272 etp36 rs off 35 800000 1 +Ethernet288 305,306,307,308,309,310,311,312 etp37 rs off 36 800000 1 +Ethernet296 321,322,323,324,325,326,327,328 etp38 rs off 37 800000 1 +Ethernet304 297,298,299,300,301,302,303,304 etp39 rs off 38 800000 1 +Ethernet312 273,274,275,276,277,278,279,280 etp40 rs off 39 800000 1 +Ethernet320 313,314,315,316,317,318,319,320 etp41 rs off 40 800000 1 +Ethernet328 329,330,331,332,333,334,335,336 etp42 rs off 41 800000 1 +Ethernet336 361,362,363,364,365,366,367,368 etp43 rs off 42 800000 1 +Ethernet344 337,338,339,340,341,342,343,344 etp44 rs off 43 800000 1 +Ethernet352 353,354,355,356,357,358,359,360 etp45 rs off 44 800000 1 +Ethernet360 369,370,371,372,373,374,375,376 etp46 rs off 45 800000 1 +Ethernet368 377,378,379,380,381,382,383,384 etp47 rs off 46 800000 1 +Ethernet376 345,346,347,348,349,350,351,352 etp48 rs off 47 800000 1 +Ethernet384 385,386,387,388,389,390,391,392 etp49 rs off 48 800000 1 +Ethernet392 401,402,403,404,405,406,407,408 etp50 rs off 49 800000 1 +Ethernet400 409,410,411,412,413,414,415,416 etp51 rs off 50 800000 1 +Ethernet408 393,394,395,396,397,398,399,400 etp52 rs off 51 800000 1 +Ethernet416 417,418,419,420,421,422,423,424 etp53 rs off 52 800000 1 +Ethernet424 433,434,435,436,437,438,439,440 etp54 rs off 53 800000 1 +Ethernet432 441,442,443,444,445,446,447,448 etp55 rs off 54 800000 1 +Ethernet440 425,426,427,428,429,430,431,432 etp56 rs off 55 800000 1 +Ethernet448 449,450,451,452,453,454,455,456 etp57 rs off 56 800000 1 +Ethernet456 473,474,475,476,477,478,479,480 etp58 rs off 57 800000 1 +Ethernet464 465,466,467,468,469,470,471,472 etp59 rs off 58 800000 1 +Ethernet472 457,458,459,460,461,462,463,464 etp60 rs off 59 800000 1 +Ethernet480 489,490,491,492,493,494,495,496 etp61 rs off 60 800000 1 +Ethernet488 505,506,507,508,509,510,511,512 etp62 rs off 61 800000 1 +Ethernet496 497,498,499,500,501,502,503,504 etp63 rs off 62 800000 1 +Ethernet504 481,482,483,484,485,486,487,488 etp64 rs off 63 800000 1 +Ethernet512 513 etp65 none off 64 10000 1 +Ethernet513 514 etp66 none off 65 10000 1 diff --git a/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_64x800G-2x10G_lab/qos.json.j2 b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_64x800G-2x10G_lab/qos.json.j2 new file mode 100755 index 00000000000..3801545c5eb --- /dev/null +++ b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_64x800G-2x10G_lab/qos.json.j2 @@ -0,0 +1,107 @@ +{%- set PORT_LOSSY = [] %} + +{%- set default_topo = default_topo | default('t1', true) %} + +{% if default_topo == 'def_lossy' %} +{% for port in PORT %} + {%- if PORT_LOSSY.append(port) %}{% endif %} +{% endfor %} +{% endif %} + +{%- macro generate_service_port_list(PORT_SERVICE) -%} + {%- if PORT_SERVICE.append("Ethernet512") %}{% endif %} + {%- if PORT_SERVICE.append("Ethernet513") %}{% endif %} +{%- endmacro %} + +{%- set PORT_SERVICE = [] %} +{%- if generate_service_port_list is defined %} + {%- if generate_service_port_list(PORT_SERVICE) %}{% endif %} +{%- endif %} + +{%- macro generate_tc_to_pg_map_per_sku() %} + "TC_TO_PRIORITY_GROUP_MAP": { + "AZURE": { + "0": "0", + "1": "0", + "2": "0", + "3": "3", + "4": "4", + "5": "0", + "6": "0", + "7": "0" + }, + "AZURE_LOSSY": { + "0": "0", + "1": "0", + "2": "0", + "3": "1", + "4": "2", + "5": "0", + "6": "0", + "7": "0" + } + }, +{%- endmacro -%} + +{%- macro generate_scheduler_per_sku() -%} + "SCHEDULER": { + "scheduler.0": { + "type" : "STRICT" + }, + "scheduler.1": { + "type" : "DWRR", + "weight": "1" + } + }, +{%- endmacro -%} + +{%- macro generate_global_dscp_to_tc_map() -%} +{%- endmacro -%} + +{# QUEUE #} +{%- macro generate_queue_config(port_names_active) %} + "QUEUE": { +{% for port in port_names_active.split(',') %} + "{{ port }}|0-2": { + "scheduler": "scheduler.1" + }, + "{{ port }}|3-4": { +{% if port not in PORT_SERVICE and port not in PORT_LOSSY %} + "wred_profile" : "AZURE_LOSSLESS", +{% endif %} + "scheduler" : "scheduler.1" + }, + "{{ port }}|5-6": { + "scheduler": "scheduler.1" + }, + "{{ port }}|7": { + "scheduler": "scheduler.0" + }{{ "," if not loop.last else "" }} +{% endfor %} + } +{%- endmacro %} + +{# PORT_QOS_MAP #} +{%- macro generate_port_qos_map(port_names_active) %} + "PORT_QOS_MAP": { +{% for port in port_names_active.split(',') %} + "{{ port }}": { +{% if port in PORT_SERVICE or port in PORT_LOSSY %} + "dscp_to_tc_map" : "AZURE", + "tc_to_pg_map" : "AZURE_LOSSY", + "tc_to_queue_map" : "AZURE" +{% else %} + "dscp_to_tc_map" : "AZURE", + "tc_to_pg_map" : "AZURE", + "tc_to_queue_map" : "AZURE", + "pfc_to_queue_map" : "AZURE", + "pfc_enable" : "3,4", + "pfcwd_sw_enable" : "3,4" +{% endif %} + }{{ "," if not loop.last else "" }} +{% endfor %} + }, +{%- endmacro %} + + +{%- include 'qos_config.j2' %} diff --git a/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_64x800G-2x10G_lab/qos_defaults_def_lossy.j2 b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_64x800G-2x10G_lab/qos_defaults_def_lossy.j2 new file mode 100755 index 00000000000..c1170619bc6 --- /dev/null +++ b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_64x800G-2x10G_lab/qos_defaults_def_lossy.j2 @@ -0,0 +1,121 @@ +{% set port_names_list = [] %} +{% for port in PORT %} + {%- if port_names_list.append(port) %}{% endif %} +{% endfor %} +{% set port_names = port_names_list | join(',') -%} + + +{ + "TC_TO_QUEUE_MAP":{ + "AZURE":{ + "0":"0", + "1":"1", + "2":"2", + "3":"3", + "4":"4", + "5":"5", + "6":"6", + "7":"7" + } + }, + "TC_TO_PRIORITY_GROUP_MAP": { + "AZURE": { + "0": "0", + "1": "0", + "2": "0", + "3": "1", + "4": "2", + "5": "0", + "6": "0", + "7": "0" + } + }, + "DSCP_TO_TC_MAP": { + "AZURE": { + "0":"0", + "1":"0", + "2":"0", + "3":"0", + "4":"0", + "5":"0", + "6":"0", + "7":"0", + "8":"0", + "9":"0", + "10":"0", + "11":"0", + "12":"0", + "13":"0", + "14":"0", + "15":"0", + "16":"0", + "17":"0", + "18":"0", + "19":"0", + "20":"0", + "21":"0", + "22":"0", + "23":"0", + "24":"0", + "25":"0", + "26":"0", + "27":"0", + "28":"0", + "29":"0", + "30":"0", + "31":"0", + "32":"0", + "33":"0", + "34":"0", + "35":"0", + "36":"0", + "37":"0", + "38":"0", + "39":"0", + "40":"0", + "41":"0", + "42":"0", + "43":"0", + "44":"0", + "45":"0", + "46":"0", + "47":"0", + "48":"0", + "49":"0", + "50":"0", + "51":"0", + "52":"0", + "53":"0", + "54":"0", + "55":"0", + "56":"0", + "57":"0", + "58":"0", + "59":"0", + "60":"0", + "61":"0", + "62":"0", + "63":"0" + } + }, + "PORT_QOS_MAP": { +{% for port in port_names_list %} + "{{ port }}": { + "tc_to_pg_map": "AZURE", + "tc_to_queue_map": "AZURE", + "dscp_to_tc_map": "AZURE" + }{% if not loop.last %},{% endif %} + +{% endfor %} + }, + "SCHEDULER": { + "scheduler.7": { + "type": "STRICT" + } + }, + "QUEUE": { + "{{ port_names }}|7": { + "scheduler": "[SCHEDULER|scheduler.7]" + } + } +} diff --git a/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_64x800G-2x10G_lab/sai.profile b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_64x800G-2x10G_lab/sai.profile new file mode 100755 index 00000000000..aba4fc81fb1 --- /dev/null +++ b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_64x800G-2x10G_lab/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/ivm.sai.config.yaml diff --git a/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_64x800G-2x10G_lab/teralynx.MVTX9180 b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_64x800G-2x10G_lab/teralynx.MVTX9180 new file mode 100755 index 00000000000..e310d0be06a --- /dev/null +++ b/device/marvell/x86_64-marvell_d64p512t-r0/d64p512t_64x800G-2x10G_lab/teralynx.MVTX9180 @@ -0,0 +1,170 @@ +sku: teralynx.MVTX9180 + +device_id: 0x6000 + +# Hardware constraint information +hardware: + num_ibs: 8 + ib_active: 0,1,2,3,4,5,6,7 + + ports_per_ib: 66, 66, 66, 66, 66, 66, 66, 66 + recirc_port_num: 64, 64, 64, 64, 64, 64, 64, 64 + cpu_port_num: 65 + cpu_port_ib: 0 + mgmt_port_num: 65, 65 + mgmt_port_ibs: 1,2 + + pics_per_ib: 8, 9, 9, 8, 8, 8, 8, 8 + pic_ports_per_pic: 8 + max_serdes_speed: 100 + + num_shared_pics: 0 + + isg [0-7]: + ib: 0 + pic_id: [0-7] + + isg [8-15]: + ib: 4 + pic_id: [0-7] + + isg 16: + ib: 6 + pic_id: 7 + + isg 17: + ib: 6 + pic_id: 6 + + isg 18: + ib: 6 + pic_id: 5 + + isg 19: + ib: 6 + pic_id: 4 + + isg 20: + ib: 6 + pic_id: 3 + + isg 21: + ib: 6 + pic_id: 2 + + isg 22: + ib: 6 + pic_id: 1 + + isg 23: + ib: 6 + pic_id: 0 + + isg 24: + ib: 2 + pic_id: 7 + + isg 25: + ib: 2 + pic_id: 6 + + isg 26: + ib: 2 + pic_id: 5 + + isg 27: + ib: 2 + pic_id: 4 + + isg 28: + ib: 2 + pic_id: 3 + + isg 29: + ib: 2 + pic_id: 2 + + isg 30: + ib: 2 + pic_id: 1 + + isg 31: + ib: 2 + pic_id: 0 + + isg [32-39]: + ib: 3 + pic_id: [0-7] + + isg [40-47]: + ib: 7 + pic_id: [0-7] + + isg 48: + ib: 5 + pic_id: 7 + + isg 49: + ib: 5 + pic_id: 6 + + isg 50: + ib: 5 + pic_id: 5 + + isg 51: + ib: 5 + pic_id: 4 + + isg 52: + ib: 5 + pic_id: 3 + + isg 53: + ib: 5 + pic_id: 2 + + isg 54: + ib: 5 + pic_id: 1 + + isg 55: + ib: 5 + pic_id: 0 + + isg 56: + ib: 1 + pic_id: 7 + + isg 57: + ib: 1 + pic_id: 6 + + isg 58: + ib: 1 + pic_id: 5 + + isg 59: + ib: 1 + pic_id: 4 + + isg 60: + ib: 1 + pic_id: 3 + + isg 61: + ib: 1 + pic_id: 2 + + isg 62: + ib: 1 + pic_id: 1 + + isg 63: + ib: 1 + pic_id: 0 + + isg 64: + mode: 1:1 + ib: 1, 2 + pic_id: 8 diff --git a/device/marvell/x86_64-marvell_d64p512t-r0/default_sku b/device/marvell/x86_64-marvell_d64p512t-r0/default_sku new file mode 100644 index 00000000000..6e2970223d0 --- /dev/null +++ b/device/marvell/x86_64-marvell_d64p512t-r0/default_sku @@ -0,0 +1 @@ +d64p512t_64x800G-2x10G t1 diff --git a/device/marvell/x86_64-marvell_d64p512t-r0/installer.conf b/device/marvell/x86_64-marvell_d64p512t-r0/installer.conf new file mode 100644 index 00000000000..004a3e95df1 --- /dev/null +++ b/device/marvell/x86_64-marvell_d64p512t-r0/installer.conf @@ -0,0 +1,4 @@ +CONSOLE_PORT=0x3f8 +CONSOLE_DEV=0 +CONSOLE_SPEED=115200 +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="modprobe.blacklist=i2c_ismt,ee1004 pcie_aspm=off intel_iommu=off" diff --git a/device/marvell/x86_64-marvell_d64p512t-r0/media_settings.json b/device/marvell/x86_64-marvell_d64p512t-r0/media_settings.json new file mode 100644 index 00000000000..0dd8905cef4 --- /dev/null +++ b/device/marvell/x86_64-marvell_d64p512t-r0/media_settings.json @@ -0,0 +1,14723 @@ +{ + "PORT_MEDIA_SETTINGS":{ + "0":{ + "OPTICAL100": { + "pre2": { + "lane0": "0x00000002", + "lane1": "0x00000002", + "lane2": "0x00000002", + "lane3": "0x00000002", + "lane4": "0x00000002", + "lane5": "0x00000002", + "lane6": "0x00000002", + "lane7": "0x00000002" + }, + "pre1":{ + "lane0": "0xfffffff7", + "lane1": "0xfffffff7", + "lane2": "0xfffffff7", + "lane3": "0xfffffff7", + "lane4": "0xfffffff7", + "lane5": "0xfffffff7", + "lane6": "0xfffffff7", + "lane7": "0xfffffff7" + }, + "main": { + "lane0": "0x0000002e", + "lane1": "0x0000002e", + "lane2": "0x0000002e", + "lane3": "0x0000002e", + "lane4": "0x0000002e", + "lane5": "0x0000002e", + "lane6": "0x0000002e", + "lane7": "0x0000002e" + }, + "post1":{ + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + } + }, + + "OPTICAL50": { + "pre1":{ + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xffffffff" + }, + "main": { + "lane0": "0x00000030", + "lane1": "0x00000030", + "lane2": "0x00000030", + "lane3": "0x00000030", + "lane4": "0x00000030", + "lane5": "0x00000030", + "lane6": "0x00000030", + "lane7": "0x00000030" + }, + "post1":{ + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + } + }, + + "OPTICAL25": { + "main": { + "lane0": "0x00000037", + "lane1": "0x00000037", + "lane2": "0x00000037", + "lane3": "0x00000037", + "lane4": "0x00000037", + "lane5": "0x00000037", + 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"0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "main": { + "lane0": "0x0000003f", + "lane1": "0x0000003f", + "lane2": "0x0000003f", + "lane3": "0x0000003f", + "lane4": "0x0000003f", + "lane5": "0x0000003f", + "lane6": "0x0000003f", + "lane7": "0x0000003f" + }, + "post1":{ + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + }, + + "COPPER25": { + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre1":{ + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "main": { + "lane0": "0x0000003f", + "lane1": "0x0000003f", + "lane2": "0x0000003f", + "lane3": "0x0000003f", + "lane4": "0x0000003f", + "lane5": "0x0000003f", + "lane6": "0x0000003f", + "lane7": "0x0000003f" + }, + "post1":{ + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + + "63":{ + "OPTICAL100": { + "pre2": { + "lane0": "0x00000002", + "lane1": "0x00000002", + "lane2": "0x00000002", + "lane3": "0x00000002", + "lane4": "0x00000002", + "lane5": "0x00000002", + "lane6": "0x00000002", + "lane7": "0x00000002" + }, + "pre1":{ + "lane0": "0xfffffff7", + "lane1": "0xfffffff7", + "lane2": "0xfffffff7", + "lane3": "0xfffffff7", + "lane4": "0xfffffff7", + "lane5": "0xfffffff7", + "lane6": "0xfffffff7", + "lane7": "0xfffffff7" + }, + "main": { + "lane0": "0x0000002e", + "lane1": "0x0000002e", + "lane2": "0x0000002e", + "lane3": "0x0000002e", + "lane4": "0x0000002e", + "lane5": "0x0000002e", + "lane6": "0x0000002e", + "lane7": "0x0000002e" + }, + "post1":{ + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + } + }, + + "OPTICAL50": { + "pre1":{ + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xffffffff" + }, + "main": { + "lane0": "0x00000030", + "lane1": "0x00000030", + "lane2": "0x00000030", + "lane3": "0x00000030", + "lane4": "0x00000030", + "lane5": "0x00000030", + "lane6": "0x00000030", + "lane7": "0x00000030" + }, + "post1":{ + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + } + }, + + "OPTICAL25": { + "main": { + "lane0": "0x00000037", + "lane1": "0x00000037", + "lane2": "0x00000037", + "lane3": "0x00000037", + "lane4": "0x00000037", + "lane5": "0x00000037", + "lane6": "0x00000037", + "lane7": "0x00000037" + }, + "post1":{ + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + } + }, + + "COPPER100": { + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre1":{ + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "main": { + "lane0": "0x0000003f", + "lane1": "0x0000003f", + "lane2": "0x0000003f", + "lane3": "0x0000003f", + "lane4": "0x0000003f", + "lane5": "0x0000003f", + "lane6": "0x0000003f", + "lane7": "0x0000003f" + }, + "post1":{ + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + }, + + "COPPER50": { + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre1":{ + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "main": { + "lane0": "0x0000003f", + "lane1": "0x0000003f", + "lane2": "0x0000003f", + "lane3": "0x0000003f", + "lane4": "0x0000003f", + "lane5": "0x0000003f", + "lane6": "0x0000003f", + "lane7": "0x0000003f" + }, + "post1":{ + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + }, + + "COPPER25": { + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre1":{ + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "main": { + "lane0": "0x0000003f", + "lane1": "0x0000003f", + "lane2": "0x0000003f", + "lane3": "0x0000003f", + "lane4": "0x0000003f", + "lane5": "0x0000003f", + "lane6": "0x0000003f", + "lane7": "0x0000003f" + }, + "post1":{ + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + } + } +} diff --git a/device/marvell/x86_64-marvell_d64p512t-r0/pcie_1.yaml b/device/marvell/x86_64-marvell_d64p512t-r0/pcie_1.yaml new file mode 100644 index 00000000000..82a29bf47ac --- /dev/null +++ b/device/marvell/x86_64-marvell_d64p512t-r0/pcie_1.yaml @@ -0,0 +1,374 @@ +- bus: '00' + dev: '00' + fn: '0' + id: 09a2 + name: 'System peripheral: Intel Corporation Ice Lake Memory Map/VT-d (rev 04)' +- bus: '00' + dev: '00' + fn: '1' + id: 09a4 + name: 'System peripheral: Intel Corporation Ice Lake Mesh 2 PCIe (rev 04)' +- bus: '00' + dev: '00' + fn: '2' + id: 09a3 + name: 'System peripheral: Intel Corporation Ice Lake RAS (rev 04)' +- bus: '00' + dev: '00' + fn: '3' + id: 09a5 + name: 'System peripheral: Intel Corporation Device 09a5 (rev 04)' +- bus: '00' + dev: '00' + fn: '4' + id: 0998 + name: 'Host bridge: Intel Corporation Ice Lake IEH' +- bus: '00' + dev: '01' + fn: '0' + id: '0b00' + name: 'System peripheral: Intel Corporation Ice Lake CBDMA [QuickData Technology]' +- bus: '00' + dev: '01' + fn: '1' + id: '0b00' + name: 'System peripheral: Intel Corporation Ice Lake CBDMA [QuickData Technology]' +- bus: '00' + dev: '01' + fn: '2' + id: '0b00' + name: 'System peripheral: Intel Corporation Ice Lake CBDMA [QuickData Technology]' +- bus: '00' + dev: '01' + fn: '3' + id: '0b00' + name: 'System peripheral: Intel Corporation Ice Lake CBDMA [QuickData Technology]' +- bus: '00' + dev: '01' + fn: '4' + id: '0b00' + name: 'System peripheral: Intel Corporation Ice Lake CBDMA [QuickData Technology]' +- bus: '00' + dev: '01' + fn: '5' + id: '0b00' + name: 'System peripheral: Intel Corporation Ice Lake CBDMA [QuickData Technology]' +- bus: '00' + dev: '01' + fn: '6' + id: '0b00' + name: 'System peripheral: Intel Corporation Ice Lake CBDMA [QuickData Technology]' +- bus: '00' + dev: '01' + fn: '7' + id: '0b00' + name: 'System peripheral: Intel Corporation Ice Lake CBDMA [QuickData Technology]' +- bus: '00' + dev: '02' + fn: '0' + id: 09a6 + name: 'System peripheral: Intel Corporation Ice Lake MSM' +- bus: '00' + dev: '02' + fn: '1' + id: 09a7 + name: 'System peripheral: Intel Corporation Ice Lake PMON MSM' +- bus: '00' + dev: '02' + fn: '4' + id: '3456' + name: 'Non-Essential Instrumentation [1300]: Intel Corporation Ice Lake NorthPeak + (rev 01)' +- bus: '00' + dev: 09 + fn: '0' + id: 18a4 + name: 'PCI bridge: Intel Corporation Device 18a4 (rev 11)' +- bus: '00' + dev: 0c + fn: '0' + id: 18a7 + name: 'PCI bridge: Intel Corporation Device 18a7 (rev 11)' +- bus: '00' + dev: 0e + fn: '0' + id: 18f2 + name: 'SATA controller: Intel Corporation Device 18f2 (rev 11)' +- bus: '00' + dev: 0f + fn: '0' + id: 18ac + name: 'System peripheral: Intel Corporation Device 18ac (rev 11)' +- bus: '00' + dev: '11' + fn: '0' + id: 18a9 + name: 'PCI bridge: Intel Corporation Device 18a9 (rev 11)' +- bus: '00' + dev: '18' + fn: '0' + id: 18d3 + name: 'Communication controller: Intel Corporation Atom Processor P5xxx Series MEI + Controller (rev 11)' +- bus: '00' + dev: '18' + fn: '1' + id: 18d4 + name: 'Communication controller: Intel Corporation Device 18d4 (rev 11)' +- bus: '00' + dev: '18' + fn: '4' + id: 18d6 + name: 'Communication controller: Intel Corporation Atom Processor P5xxx Series MEI + Controller (rev 11)' +- bus: '00' + dev: 1a + fn: '0' + id: 18d8 + name: 'Serial controller: Intel Corporation Device 18d8 (rev 11)' +- bus: '00' + dev: 1a + fn: '1' + id: 18d8 + name: 'Serial controller: Intel Corporation Device 18d8 (rev 11)' +- bus: '00' + dev: 1a + fn: '2' + id: 18d8 + name: 'Serial controller: Intel Corporation Device 18d8 (rev 11)' +- bus: '00' + dev: 1a + fn: '3' + id: 18d9 + name: 'Unassigned class [ff00]: Intel Corporation Device 18d9 (rev 11)' +- bus: '00' + dev: 1c + fn: '0' + id: 18db + name: 'SD Host controller: Intel Corporation Device 18db (rev 11)' +- bus: '00' + dev: 1d + fn: '0' + id: 0998 + name: 'Host bridge: Intel Corporation Ice Lake IEH' +- bus: '00' + dev: 1e + fn: '0' + id: 18d0 + name: 'USB controller: Intel Corporation Atom Processor P5xxx Series USB xHCI Controller + (rev 11)' +- bus: '00' + dev: 1f + fn: '0' + id: 18dc + name: 'ISA bridge: Intel Corporation Device 18dc (rev 11)' +- bus: '00' + dev: 1f + fn: '4' + id: 18df + name: 'SMBus: Intel Corporation Atom Processor P5xxx Series SMBus Controller (rev + 11)' +- bus: '00' + dev: 1f + fn: '5' + id: 18e0 + name: 'Serial bus controller: Intel Corporation Atom Processor P5xxx Series SPI + Controller (rev 11)' +- bus: '00' + dev: 1f + fn: '7' + id: 18e1 + name: 'Non-Essential Instrumentation [1300]: Intel Corporation Atom Processor P5xxx + Series Trace Hub (rev 11)' +- bus: '01' + dev: '00' + fn: '0' + id: '1602' + name: 'Non-Volatile memory controller: Innodisk Corporation Device 1602 (rev 01)' +- bus: '02' + dev: '00' + fn: '0' + id: 9c1d + name: 'Unassigned class [ff00]: Lattice Semiconductor Corporation Device 9c1d (rev + 01)' +- bus: '03' + dev: '00' + fn: '0' + id: '1533' + name: 'Ethernet controller: Intel Corporation I210 Gigabit Network Connection (rev + 03)' +- bus: '14' + dev: '00' + fn: '0' + id: 09a2 + name: 'System peripheral: Intel Corporation Ice Lake Memory Map/VT-d (rev 04)' +- bus: '14' + dev: '00' + fn: '1' + id: 09a4 + name: 'System peripheral: Intel Corporation Ice Lake Mesh 2 PCIe (rev 04)' +- bus: '14' + dev: '00' + fn: '2' + id: 09a3 + name: 'System peripheral: Intel Corporation Ice Lake RAS (rev 04)' +- bus: '14' + dev: '00' + fn: '3' + id: 09a5 + name: 'System peripheral: Intel Corporation Device 09a5 (rev 04)' +- bus: '14' + dev: '00' + fn: '4' + id: 0998 + name: 'Host bridge: Intel Corporation Ice Lake IEH' +- bus: '14' + dev: '02' + fn: '0' + id: 347a + name: 'PCI bridge: Intel Corporation Device 347a (rev 06)' +- bus: '15' + dev: '00' + fn: '0' + id: '6000' + name: 'Ethernet controller: Marvell Technology Group Ltd. Device 6000' +- bus: fe + dev: '00' + fn: '0' + id: '3450' + name: 'System peripheral: Intel Corporation Device 3450' +- bus: fe + dev: '00' + fn: '1' + id: '3451' + name: 'System peripheral: Intel Corporation Device 3451' +- bus: fe + dev: '00' + fn: '2' + id: '3452' + name: 'System peripheral: Intel Corporation Device 3452' +- bus: fe + dev: '00' + fn: '3' + id: 0998 + name: 'Host bridge: Intel Corporation Ice Lake IEH' +- bus: fe + dev: '00' + fn: '5' + id: '3455' + name: 'System peripheral: Intel Corporation Device 3455' +- bus: fe + dev: 0b + fn: '0' + id: '3448' + name: 'System peripheral: Intel Corporation Device 3448' +- bus: fe + dev: 0b + fn: '1' + id: '3448' + name: 'System peripheral: Intel Corporation Device 3448' +- bus: fe + dev: 0b + fn: '2' + id: 344b + name: 'System peripheral: Intel Corporation Device 344b' +- bus: fe + dev: 0c + fn: '0' + id: 344a + name: 'Performance counters: Intel Corporation Device 344a' +- bus: fe + dev: 1a + fn: '0' + id: '2880' + name: 'Performance counters: Intel Corporation Device 2880' +- bus: ff + dev: '00' + fn: '0' + id: 344c + name: 'System peripheral: Intel Corporation Device 344c' +- bus: ff + dev: '00' + fn: '1' + id: 344c + name: 'System peripheral: Intel Corporation Device 344c' +- bus: ff + dev: '00' + fn: '2' + id: 344c + name: 'System peripheral: Intel Corporation Device 344c' +- bus: ff + dev: '00' + fn: '3' + id: 344c + name: 'System peripheral: Intel Corporation Device 344c' +- bus: ff + dev: 0a + fn: '0' + id: 344d + name: 'System peripheral: Intel Corporation Device 344d' +- bus: ff + dev: 0a + fn: '1' + id: 344d + name: 'System peripheral: Intel Corporation Device 344d' +- bus: ff + dev: 0a + fn: '2' + id: 344d + name: 'System peripheral: Intel Corporation Device 344d' +- bus: ff + dev: 0a + fn: '3' + id: 344d + name: 'System peripheral: Intel Corporation Device 344d' +- bus: ff + dev: 1d + fn: '0' + id: 344f + name: 'System peripheral: Intel Corporation Device 344f' +- bus: ff + dev: 1d + fn: '1' + id: '3457' + name: 'System peripheral: Intel Corporation Device 3457' +- bus: ff + dev: 1e + fn: '0' + id: '3458' + name: 'System peripheral: Intel Corporation Device 3458 (rev 01)' +- bus: ff + dev: 1e + fn: '1' + id: '3459' + name: 'System peripheral: Intel Corporation Device 3459 (rev 01)' +- bus: ff + dev: 1e + fn: '2' + id: 345a + name: 'System peripheral: Intel Corporation Device 345a (rev 01)' +- bus: ff + dev: 1e + fn: '3' + id: 345b + name: 'System peripheral: Intel Corporation Device 345b (rev 01)' +- bus: ff + dev: 1e + fn: '4' + id: 345c + name: 'System peripheral: Intel Corporation Device 345c (rev 01)' +- bus: ff + dev: 1e + fn: '5' + id: 345d + name: 'System peripheral: Intel Corporation Device 345d (rev 01)' +- bus: ff + dev: 1e + fn: '6' + id: 345e + name: 'System peripheral: Intel Corporation Device 345e (rev 01)' +- bus: ff + dev: 1e + fn: '7' + id: 345f + name: 'System peripheral: Intel Corporation Device 345f (rev 01)' diff --git a/device/marvell/x86_64-marvell_d64p512t-r0/pddf/fancontrol b/device/marvell/x86_64-marvell_d64p512t-r0/pddf/fancontrol new file mode 100644 index 00000000000..1791f08417a --- /dev/null +++ b/device/marvell/x86_64-marvell_d64p512t-r0/pddf/fancontrol @@ -0,0 +1,13 @@ +INTERVAL=10 + +TEMPBUS=0x1 0x1 0x1 0x1 0x2 0x2 0x6 +TEMPADDR=0x49 0x4a 0x4b 0x4e 0x4e 0x4f 0x4f + +FANBUS=0x2 0x2 0x2 0x2 0x2 0x2 0x2 0x2 +FANADDR=0x4c 0x4c 0x4c 0x4c 0x2d 0x2d 0x2d 0x2d +FANREG=0x30 0x40 0x50 0x60 0x30 0x40 0x50 0x60 + +FAN_CTL_DRV=emc2305 +IPMI_RAW_ID=0x38 +IPMI_RAW_READ=0x2 +IPMI_RAW_WRITE=0x3 diff --git a/device/marvell/x86_64-marvell_d64p512t-r0/pddf/pd-plugin.json b/device/marvell/x86_64-marvell_d64p512t-r0/pddf/pd-plugin.json new file mode 100644 index 00000000000..420553ba01d --- /dev/null +++ b/device/marvell/x86_64-marvell_d64p512t-r0/pddf/pd-plugin.json @@ -0,0 +1,87 @@ +{ + + "XCVR": + { + "xcvr_present": + { + "i2c": + { + "valmap-OSFP": {"1":true, "0":false } + } + }, + "plug_status": + { + "inserted": "1", + "removed": "0" + } + }, + "PSU": + { + "psu_present": + { + "bmc": + { + "valmap": { "Presence detected":true} + } + }, + + "psu_power_good": + { + "bmc": + { + "valmap": { "ok":true } + } + }, + + "psu_fan_dir": + { + "bmc": + { + "valmap": { "F2B":"exhaust", "B2F":"intake" } + } + }, + + "PSU_FAN_MAX_SPEED_RPM":"29500" + }, + + "FAN": + { + "direction": + { + "bmc": + { + "valmap": {"1":"intake", "0":"exhaust"} + } + }, + + "present": + { + "bmc": + { + "valmap": {"Present":true, "Absent":false} + } + }, + + "state": + { + "bmc": + { + "valmap": {"ok":true} + } + }, + + "FAN_FRONT_MAX_SPEED_RPM":"15700", + "FAN_REAR_MAX_SPEED_RPM":"14600", + "FAN_SPEED_TOLERANCE_PERCENTAGE":"8" + }, + + "REBOOT_CAUSE": + { + "reboot_cause_file": "/host/reboot-cause/reboot-cause.txt" + }, + + "SYSSTATUS": + { + "sysstatus_sysfs_path": "/sys/kernel/pddf/devices/sysstatus/sysstatus_data/" + } +} diff --git a/device/marvell/x86_64-marvell_d64p512t-r0/pddf/pddf-device.json b/device/marvell/x86_64-marvell_d64p512t-r0/pddf/pddf-device.json new file mode 100644 index 00000000000..dda59f6b1c2 --- /dev/null +++ b/device/marvell/x86_64-marvell_d64p512t-r0/pddf/pddf-device.json @@ -0,0 +1,3371 @@ +{ + "PLATFORM": + { + "num_ports":66, + "num_psus":2, + "num_fantrays":4, + "num_fans_pertray":2, + "num_temps":8, + "pddf_dev_types": + { + "description":"x86_64-marvell_d64p512t-r0 - Below is the list of supported PDDF device types (chip names) for various components. If any component uses some other driver, we will create the client using 'echo > /new_device' method", + "CPLD": + [ + "i2c_cpld" + ], + "PSU": + [ + "psu_eeprom", + "psu_pmbus" + ], + "FAN": + [ + "fan_eeprom" + ], + "PORT_MODULE": + [ + "pddf_xcvr" + ] + }, + "std_kos": + [ + "i2c_smbus", + "i2c-i801", + "i2c_dev", + "i2c_mux_pca954x", + "at24", + "ipmi_devintf", + "ipmi_si", + "d64p512t_fpga", + "optoe" + ], + "pddf_kos": + [ + "pddf_client_module", + "pddf_cpld_module", + "pddf_cpld_driver", + "pddf_mux_module", + "pddf_psu_driver_module", + "pddf_xcvr_module", + "pddf_xcvr_driver_module" + ], + "custom_kos": + [ + "pddf_custom_sysstatus_module" + ] + }, + + "SYSTEM": + { + "dev_info": {"device_type":"CPU", "device_name":"ROOT_COMPLEX", "device_parent":null}, + "i2c": + { + "CONTROLLERS": + [ + { "dev_name":"i2c-0", "dev":"SMBUS0" }, + { "dev_name":"i2c-1", "dev":"FPGA_PORT_PLD" }, + { "dev_name":"i2c-2", "dev":"FPGA_SMBUS_MON" }, + { "dev_name":"i2c-3", "dev":"FPGA_SMBUS_PORT0" }, + { "dev_name":"i2c-4", "dev":"FPGA_SMBUS_PORT1" }, + { "dev_name":"i2c-5", "dev":"FPGA_SMBUS_PORT2" }, + { "dev_name":"i2c-6", "dev":"FPGA_SMBUS_PORT3" }, + { "dev_name":"i2c-7", "dev":"FPGA_SMBUS_PORT4" }, + { "dev_name":"i2c-8", "dev":"FPGA_SMBUS_PORT5" }, + { "dev_name":"i2c-9", "dev":"FPGA_SMBUS_PORT6" }, + { "dev_name":"i2c-10", "dev":"FPGA_SMBUS_PORT7" } + ] + } + }, + + "SMBUS0": + { + "dev_info": {"device_type": "SMBUS", "device_name": "SMBUS0", "device_parent": "SYSTEM"}, + "i2c": + { + "topo_info": {"dev_addr": "0x0"}, + "DEVICES": + [ + {"dev": "EEPROM1"}, + {"dev": "EEPROM2"}, + {"dev": "EEPROM3"}, + {"dev": "EEPROM4"}, + {"dev": "CPU_CPLD"} + ] + } + }, + + "FPGA_PORT_PLD": + { + "dev_info": {"device_type": "SMBUS", "device_name": "FPGA_PORT_PLD", "device_parent": "SYSTEM"}, + "i2c": + { + "topo_info": {"dev_addr": "0x1"}, + "DEVICES": + [ + {"dev": "PPLD-A"}, + {"dev": "PPLD-B"} + ] + } + }, + + "FPGA_SMBUS_MON": + { + "dev_info": {"device_type": "SMBUS", "device_name": "FPGA_SMBUS_MON", "device_parent": "SYSTEM"}, + "i2c": + { + "topo_info": {"dev_addr": "0x2"}, + "DEVICES": + [ + {"dev": "MUX1"}, + {"dev": "MUX2"} + ] + } + }, + + "FPGA_SMBUS_PORT0": + { + "dev_info": {"device_type": "SMBUS", "device_name": "FPGA_SMBUS_PORT0", "device_parent": "SYSTEM"}, + "i2c": + { + "topo_info": {"dev_addr": "0x3"}, + "DEVICES": + [ + {"dev": "MUX3"} + ] + } + }, + "FPGA_SMBUS_PORT1": + { + "dev_info": {"device_type": "SMBUS", "device_name": "FPGA_SMBUS_PORT1", "device_parent": "SYSTEM"}, + "i2c": + { + "topo_info": {"dev_addr": "0x4"}, + "DEVICES": + [ + {"dev": "MUX4"} + ] + } + }, + "FPGA_SMBUS_PORT2": + { + "dev_info": {"device_type": "SMBUS", "device_name": "FPGA_SMBUS_PORT2", "device_parent": "SYSTEM"}, + "i2c": + { + "topo_info": {"dev_addr": "0x5"}, + "DEVICES": + [ + {"dev": "MUX5"} + ] + } + }, + "FPGA_SMBUS_PORT3": + { + "dev_info": {"device_type": "SMBUS", "device_name": "FPGA_SMBUS_PORT3", "device_parent": "SYSTEM"}, + "i2c": + { + "topo_info": {"dev_addr": "0x6"}, + "DEVICES": + [ + {"dev": "MUX6"} + ] + } + }, + "FPGA_SMBUS_PORT4": + { + "dev_info": {"device_type": "SMBUS", "device_name": "FPGA_SMBUS_PORT4", "device_parent": "SYSTEM"}, + "i2c": + { + "topo_info": {"dev_addr": "0x7"}, + "DEVICES": + [ + {"dev": "MUX7"} + ] + } + }, + "FPGA_SMBUS_PORT5": + { + "dev_info": {"device_type": "SMBUS", "device_name": "FPGA_SMBUS_PORT5", "device_parent": "SYSTEM"}, + "i2c": + { + "topo_info": {"dev_addr": "0x8"}, + "DEVICES": + [ + {"dev": "MUX8"} + ] + } + }, + "FPGA_SMBUS_PORT6": + { + "dev_info": {"device_type": "SMBUS", "device_name": "FPGA_SMBUS_PORT6", "device_parent": "SYSTEM"}, + "i2c": + { + "topo_info": {"dev_addr": "0x9"}, + "DEVICES": + [ + {"dev": "MUX9"} + ] + } + }, + "FPGA_SMBUS_PORT7": + { + "dev_info": {"device_type": "SMBUS", "device_name": "FPGA_SMBUS_PORT7", "device_parent": "SYSTEM"}, + "i2c": + { + "topo_info": {"dev_addr": "0xa"}, + "DEVICES": + [ + {"dev": "MUX10"} + ] + } + }, + + "EEPROM1": + { + "dev_info": {"device_type": "EEPROM", "device_name": "EEPROM1", "device_parent": "SMBUS0"}, + "i2c": + { + "topo_info": {"parent_bus": "0x0", "dev_addr": "0x50", "dev_type": "24c02"}, + "dev_attr": {"access_mode": "BLOCK"}, + "attr_list": [ + {"attr_name": "eeprom"} + ] + } + }, + + "EEPROM2": + { + "dev_info": {"device_type": "EEPROM", "device_name": "EEPROM2", "device_parent": "SMBUS0"}, + "i2c": + { + "topo_info": {"parent_bus": "0x0", "dev_addr": "0x51", "dev_type": "24c02"}, + "dev_attr": {"access_mode": "BLOCK"}, + "attr_list": [ + {"attr_name": "eeprom"} + ] + } + }, + + "EEPROM3": + { + "dev_info": {"device_type": "EEPROM", "device_name": "EEPROM3", "device_parent": "SMBUS0"}, + "i2c": + { + "topo_info": {"parent_bus": "0x0", "dev_addr": "0x52", "dev_type": "24c02"}, + "dev_attr": {"access_mode": "BLOCK"}, + "attr_list": [ + {"attr_name": "eeprom"} + ] + } + }, + + "EEPROM4": + { + "dev_info": {"device_type": "EEPROM", "device_name": "EEPROM4", "device_parent": "SMBUS0"}, + "i2c": + { + "topo_info": {"parent_bus": "0x0", "dev_addr": "0x53", "dev_type": "24c02"}, + "dev_attr": {"access_mode": "BLOCK"}, + "attr_list": [ + {"attr_name": "eeprom"} + ] + } + }, + "CPU_CPLD": + { + "dev_info": {"device_type":"CPLD", "device_name":"CPU_CPLD", "device_parent":"SMBUS0"}, + "i2c": + { + "topo_info": {"parent_bus":"0x0", "dev_addr":"0x3d", "dev_type":"i2c_cpld"}, + "dev_attr":{} + } + }, + + "PPLD-A": + { + "dev_info": {"device_type":"CPLD", "device_name":"PPLD-A", "device_parent":"FPGA_PORT_PLD"}, + "i2c": + { + "topo_info": {"parent_bus":"0x1", "dev_addr":"0x41", "dev_type":"i2c_cpld"}, + "dev_attr":{} + } + }, + "PPLD-B": + { + "dev_info": {"device_type":"CPLD", "device_name":"PPLD-B", "device_parent":"FPGA_PORT_PLD"}, + "i2c": + { + "topo_info": {"parent_bus":"0x1", "dev_addr":"0x45", "dev_type":"i2c_cpld"}, + "dev_attr":{} + } + }, + "SYSSTATUS": + { + "dev_info":{ "device_type":"SYSSTAT", "device_name":"SYSSTATUS"}, + "dev_attr":{ }, + "attr_list": + [ + { "attr_name":"cpu_cpld_version","attr_devaddr":"0x3d", "attr_offset":"0x01","attr_mask":"0xff","attr_len":"0x1"}, + { "attr_name":"cpu_cpld_board_info","attr_devaddr":"0x3d", "attr_offset":"0x02","attr_mask":"0x0f","attr_len":"0x1"}, + { "attr_name":"cpld_a_version","attr_devaddr":"0x41", "attr_offset":"0x01","attr_mask":"0xff","attr_len":"0x1"}, + { "attr_name":"cpld_a_board_info","attr_devaddr":"0x41", "attr_offset":"0x02","attr_mask":"0x07","attr_len":"0x1"}, + { "attr_name":"cpld_b_version","attr_devaddr":"0x45", "attr_offset":"0x01","attr_mask":"0xff","attr_len":"0x1"}, + { "attr_name":"cpld_b_board_info","attr_devaddr":"0x45", "attr_offset":"0x02","attr_mask":"0x07","attr_len":"0x1"}, + { "attr_name":"power_status1","attr_devaddr":"0x3d", "attr_offset":"0x0d","attr_mask":"0xff","attr_len":"0x1"}, + { "attr_name":"power_status2","attr_devaddr":"0x3d", "attr_offset":"0x0e","attr_mask":"0xff","attr_len":"0x1"}, + { "attr_name":"watchdog_timeout","attr_devaddr":"0x3d", "attr_offset":"0x07","attr_mask":"0x70","attr_len":"0x1"}, + { "attr_name":"watchdog_enable","attr_devaddr":"0x3d", "attr_offset":"0x07","attr_mask":"0x08","attr_len":"0x1"}, + { "attr_name":"watchdog_clear","attr_devaddr":"0x3d", "attr_offset":"0x07","attr_mask":"0x01","attr_len":"0x1"}, + { "attr_name":"reset_cause","attr_devaddr":"0x3d", "attr_offset":"0x28","attr_mask":"0xff","attr_len":"0x1"} + ] + }, + + "MUX1": + { + "dev_info": { "device_type":"MUX", "device_name":"MUX1", "device_parent":"FPGA_SMBUS_MON"}, + "i2c": + { + "topo_info": { "parent_bus":"0x2", "dev_addr":"0x70", "dev_type":"pca9548"}, + "dev_attr": { "virt_bus":"0xe", "idle_state":"-2"}, + "channel": + [ + ] + } + }, + "MUX2": + { + "dev_info": { "device_type":"MUX", "device_name":"MUX2", "device_parent":"FPGA_SMBUS_MON"}, + "i2c": + { + "topo_info": { "parent_bus":"0x2", "dev_addr":"0x71", "dev_type":"pca9548"}, + "dev_attr": { "virt_bus":"0x16", "idle_state":"-2"}, + "channel": + [ + { "chn":"0", "dev":"PORT65" }, + { "chn":"1", "dev":"PORT66" } + ] + } + }, + "MUX3": + { + "dev_info": { "device_type":"MUX", "device_name":"MUX3", "device_parent":"FPGA_SMBUS_PORT0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x3", "dev_addr":"0x70", "dev_type":"pca9548"}, + "dev_attr": { "virt_bus":"0x1e", "idle_state":"-2"}, + "channel": + [ + { "chn":"0", "dev":"PORT1" }, + { "chn":"1", "dev":"PORT2" }, + { "chn":"2", "dev":"PORT3" }, + { "chn":"3", "dev":"PORT4" }, + { "chn":"4", "dev":"PORT5" }, + { "chn":"5", "dev":"PORT6" }, + { "chn":"6", "dev":"PORT7" }, + { "chn":"7", "dev":"PORT8" } + ] + } + }, + "MUX4": + { + "dev_info": { "device_type":"MUX", "device_name":"MUX4", "device_parent":"FPGA_SMBUS_PORT1"}, + "i2c": + { + "topo_info": { "parent_bus":"0x4", "dev_addr":"0x70", "dev_type":"pca9548"}, + "dev_attr": { "virt_bus":"0x26", "idle_state":"-2"}, + "channel": + [ + { "chn":"0", "dev":"PORT9" }, + { "chn":"1", "dev":"PORT10" }, + { "chn":"2", "dev":"PORT11" }, + { "chn":"3", "dev":"PORT12" }, + { "chn":"4", "dev":"PORT13" }, + { "chn":"5", "dev":"PORT14" }, + { "chn":"6", "dev":"PORT15" }, + { "chn":"7", "dev":"PORT16" } + ] + } + }, + "MUX5": + { + "dev_info": { "device_type":"MUX", "device_name":"MUX5", "device_parent":"FPGA_SMBUS_PORT2"}, + "i2c": + { + "topo_info": { "parent_bus":"0x5", "dev_addr":"0x70", "dev_type":"pca9548"}, + "dev_attr": { "virt_bus":"0x2e", "idle_state":"-2"}, + "channel": + [ + { "chn":"0", "dev":"PORT17" }, + { "chn":"1", "dev":"PORT18" }, + { "chn":"2", "dev":"PORT19" }, + { "chn":"3", "dev":"PORT20" }, + { "chn":"4", "dev":"PORT21" }, + { "chn":"5", "dev":"PORT22" }, + { "chn":"6", "dev":"PORT23" }, + { "chn":"7", "dev":"PORT24" } + ] + } + }, + "MUX6": + { + "dev_info": { "device_type":"MUX", "device_name":"MUX6", "device_parent":"FPGA_SMBUS_PORT3"}, + "i2c": + { + "topo_info": { "parent_bus":"0x6", "dev_addr":"0x70", "dev_type":"pca9548"}, + "dev_attr": { "virt_bus":"0x36", "idle_state":"-2"}, + "channel": + [ + { "chn":"0", "dev":"PORT25" }, + { "chn":"1", "dev":"PORT26" }, + { "chn":"2", "dev":"PORT27" }, + { "chn":"3", "dev":"PORT28" }, + { "chn":"4", "dev":"PORT29" }, + { "chn":"5", "dev":"PORT30" }, + { "chn":"6", "dev":"PORT31" }, + { "chn":"7", "dev":"PORT32" } + ] + } + }, + "MUX7": + { + "dev_info": { "device_type":"MUX", "device_name":"MUX7", "device_parent":"FPGA_SMBUS_PORT4"}, + "i2c": + { + "topo_info": { "parent_bus":"0x7", "dev_addr":"0x70", "dev_type":"pca9548"}, + "dev_attr": { "virt_bus":"0x3e", "idle_state":"-2"}, + "channel": + [ + { "chn":"0", "dev":"PORT33" }, + { "chn":"1", "dev":"PORT34" }, + { "chn":"2", "dev":"PORT35" }, + { "chn":"3", "dev":"PORT36" }, + { "chn":"4", "dev":"PORT37" }, + { "chn":"5", "dev":"PORT38" }, + { "chn":"6", "dev":"PORT39" }, + { "chn":"7", "dev":"PORT40" } + ] + } + }, + "MUX8": + { + "dev_info": { "device_type":"MUX", "device_name":"MUX8", "device_parent":"FPGA_SMBUS_PORT5"}, + "i2c": + { + "topo_info": { "parent_bus":"0x8", "dev_addr":"0x70", "dev_type":"pca9548"}, + "dev_attr": { "virt_bus":"0x46", "idle_state":"-2"}, + "channel": + [ + { "chn":"0", "dev":"PORT41" }, + { "chn":"1", "dev":"PORT42" }, + { "chn":"2", "dev":"PORT43" }, + { "chn":"3", "dev":"PORT44" }, + { "chn":"4", "dev":"PORT45" }, + { "chn":"5", "dev":"PORT46" }, + { "chn":"6", "dev":"PORT47" }, + { "chn":"7", "dev":"PORT48" } + ] + } + }, + "MUX9": + { + "dev_info": { "device_type":"MUX", "device_name":"MUX9", "device_parent":"FPGA_SMBUS_PORT6"}, + "i2c": + { + "topo_info": { "parent_bus":"0x9", "dev_addr":"0x70", "dev_type":"pca9548"}, + "dev_attr": { "virt_bus":"0x4e", "idle_state":"-2"}, + "channel": + [ + { "chn":"0", "dev":"PORT49" }, + { "chn":"1", "dev":"PORT50" }, + { "chn":"2", "dev":"PORT51" }, + { "chn":"3", "dev":"PORT52" }, + { "chn":"4", "dev":"PORT53" }, + { "chn":"5", "dev":"PORT54" }, + { "chn":"6", "dev":"PORT55" }, + { "chn":"7", "dev":"PORT56" } + ] + } + }, + "MUX10": + { + "dev_info": { "device_type":"MUX", "device_name":"MUX10", "device_parent":"FPGA_SMBUS_PORT7"}, + "i2c": + { + "topo_info": { "parent_bus":"0xa", "dev_addr":"0x70", "dev_type":"pca9548"}, + "dev_attr": { "virt_bus":"0x56", "idle_state":"-2"}, + "channel": + [ + { "chn":"0", "dev":"PORT57" }, + { "chn":"1", "dev":"PORT58" }, + { "chn":"2", "dev":"PORT59" }, + { "chn":"3", "dev":"PORT60" }, + { "chn":"4", "dev":"PORT61" }, + { "chn":"5", "dev":"PORT62" }, + { "chn":"6", "dev":"PORT63" }, + { "chn":"7", "dev":"PORT64" } + ] + } + }, + "PORT1": + { + "dev_info": { "device_type":"OSFP", "device_name":"PORT1", "device_parent":"MUX3"}, + "dev_attr": { "dev_idx":"1"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT1-EEPROM" }, + { "itf":"control", "dev":"PORT1-CTRL" } + ] + } + }, + "PORT1-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT1-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT1"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1e", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT1-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT1-CTRL", "device_parent":"MUX3", "virt_parent":"PORT1"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1e", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_reset", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x30", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x34", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_present", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x3c", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x40", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + "PORT2": + { + "dev_info": { "device_type":"OSFP", "device_name":"PORT2", "device_parent":"MUX3"}, + "dev_attr": { "dev_idx":"2"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT2-EEPROM" }, + { "itf":"control", "dev":"PORT2-CTRL" } + ] + } + }, + "PORT2-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT2-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT2"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1f", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT2-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT2-CTRL", "device_parent":"MUX3", "virt_parent":"PORT2"}, + "i2c": + { + "topo_info": { "parent_bus":"0x1f", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_reset", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x30", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x34", "attr_mask":"0x1", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_present", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x3c", "attr_mask":"0x1", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x40", "attr_mask":"0x1", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + "PORT3": + { + "dev_info": { "device_type":"OSFP", "device_name":"PORT3", "device_parent":"MUX3"}, + "dev_attr": { "dev_idx":"3"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT3-EEPROM" }, + { "itf":"control", "dev":"PORT3-CTRL" } + ] + } + }, + "PORT3-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT3-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT3"}, + "i2c": + { + "topo_info": { "parent_bus":"0x20", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT3-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT3-CTRL", "device_parent":"MUX3", "virt_parent":"PORT3"}, + "i2c": + { + "topo_info": { "parent_bus":"0x20", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_reset", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x30", "attr_mask":"0x2", "attr_cmpval":"0x4", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x34", "attr_mask":"0x2", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_present", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x3c", "attr_mask":"0x2", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x40", "attr_mask":"0x2", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + "PORT4": + { + "dev_info": { "device_type":"OSFP", "device_name":"PORT4", "device_parent":"MUX3"}, + "dev_attr": { "dev_idx":"4"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT4-EEPROM" }, + { "itf":"control", "dev":"PORT4-CTRL" } + ] + } + }, + "PORT4-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT4-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT4"}, + "i2c": + { + "topo_info": { "parent_bus":"0x21", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT4-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT4-CTRL", "device_parent":"MUX3", "virt_parent":"PORT4"}, + "i2c": + { + "topo_info": { "parent_bus":"0x21", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_reset", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x30", "attr_mask":"0x3", "attr_cmpval":"0x8", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x34", "attr_mask":"0x3", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_present", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x3c", "attr_mask":"0x3", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x40", "attr_mask":"0x3", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + "PORT5": + { + "dev_info": { "device_type":"OSFP", "device_name":"PORT5", "device_parent":"MUX3"}, + "dev_attr": { "dev_idx":"5"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT5-EEPROM" }, + { "itf":"control", "dev":"PORT5-CTRL" } + ] + } + }, + "PORT5-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT5-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT5"}, + "i2c": + { + "topo_info": { "parent_bus":"0x22", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT5-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT5-CTRL", "device_parent":"MUX3", "virt_parent":"PORT5"}, + "i2c": + { + "topo_info": { "parent_bus":"0x22", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_reset", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x30", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x34", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_present", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x3c", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x40", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + "PORT6": + { + "dev_info": { "device_type":"OSFP", "device_name":"PORT6", "device_parent":"MUX3"}, + "dev_attr": { "dev_idx":"6"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT6-EEPROM" }, + { "itf":"control", "dev":"PORT6-CTRL" } + ] + } + }, + "PORT6-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT6-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT6"}, + "i2c": + { + "topo_info": { "parent_bus":"0x23", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT6-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT6-CTRL", "device_parent":"MUX3", "virt_parent":"PORT6"}, + "i2c": + { + "topo_info": { "parent_bus":"0x23", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_reset", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x30", "attr_mask":"0x5", "attr_cmpval":"0x20", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x34", "attr_mask":"0x5", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_present", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x3c", "attr_mask":"0x5", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x40", "attr_mask":"0x5", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + "PORT7": + { + "dev_info": { "device_type":"OSFP", "device_name":"PORT7", "device_parent":"MUX3"}, + "dev_attr": { "dev_idx":"7"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT7-EEPROM" }, + { "itf":"control", "dev":"PORT7-CTRL" } + ] + } + }, + "PORT7-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT7-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT7"}, + "i2c": + { + "topo_info": { "parent_bus":"0x24", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT7-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT7-CTRL", "device_parent":"MUX3", "virt_parent":"PORT7"}, + "i2c": + { + "topo_info": { "parent_bus":"0x24", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_reset", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x30", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x34", "attr_mask":"0x6", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_present", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x3c", "attr_mask":"0x6", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x40", "attr_mask":"0x6", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + "PORT8": + { + "dev_info": { "device_type":"OSFP", "device_name":"PORT8", "device_parent":"MUX3"}, + "dev_attr": { "dev_idx":"8"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT8-EEPROM" }, + { "itf":"control", "dev":"PORT8-CTRL" } + ] + } + }, + "PORT8-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT8-EEPROM", "device_parent":"MUX3", "virt_parent":"PORT8"}, + "i2c": + { + "topo_info": { "parent_bus":"0x25", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT8-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT8-CTRL", "device_parent":"MUX3", "virt_parent":"PORT8"}, + "i2c": + { + "topo_info": { "parent_bus":"0x25", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_reset", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x30", "attr_mask":"0x7", "attr_cmpval":"0x80", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x34", "attr_mask":"0x7", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_present", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x3c", "attr_mask":"0x7", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x40", "attr_mask":"0x7", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + "PORT9": + { + "dev_info": { "device_type":"OSFP", "device_name":"PORT9", "device_parent":"MUX4"}, + "dev_attr": { "dev_idx":"9"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT9-EEPROM" }, + { "itf":"control", "dev":"PORT9-CTRL" } + ] + } + }, + "PORT9-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT9-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT9"}, + "i2c": + { + "topo_info": { "parent_bus":"0x26", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT9-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT9-CTRL", "device_parent":"MUX4", "virt_parent":"PORT9"}, + "i2c": + { + "topo_info": { "parent_bus":"0x26", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_reset", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x31", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x35", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_present", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x3d", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x41", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + "PORT10": + { + "dev_info": { "device_type":"OSFP", "device_name":"PORT10", "device_parent":"MUX4"}, + "dev_attr": { "dev_idx":"10"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT10-EEPROM" }, + { "itf":"control", "dev":"PORT10-CTRL" } + ] + } + }, + "PORT10-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT10-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT10"}, + "i2c": + { + "topo_info": { "parent_bus":"0x27", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT10-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT10-CTRL", "device_parent":"MUX4", "virt_parent":"PORT10"}, + "i2c": + { + "topo_info": { "parent_bus":"0x27", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_reset", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x31", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x35", "attr_mask":"0x1", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_present", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x3d", "attr_mask":"0x1", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x41", "attr_mask":"0x1", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + "PORT11": + { + "dev_info": { "device_type":"OSFP", "device_name":"PORT11", "device_parent":"MUX4"}, + "dev_attr": { "dev_idx":"11"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT11-EEPROM" }, + { "itf":"control", "dev":"PORT11-CTRL" } + ] + } + }, + "PORT11-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT11-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT11"}, + "i2c": + { + "topo_info": { "parent_bus":"0x28", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT11-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT11-CTRL", "device_parent":"MUX4", "virt_parent":"PORT11"}, + "i2c": + { + "topo_info": { "parent_bus":"0x28", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_reset", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x31", "attr_mask":"0x2", "attr_cmpval":"0x4", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x35", "attr_mask":"0x2", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_present", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x3d", "attr_mask":"0x2", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x41", "attr_mask":"0x2", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + "PORT12": + { + "dev_info": { "device_type":"OSFP", "device_name":"PORT12", "device_parent":"MUX4"}, + "dev_attr": { "dev_idx":"12"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT12-EEPROM" }, + { "itf":"control", "dev":"PORT12-CTRL" } + ] + } + }, + "PORT12-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT12-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT12"}, + "i2c": + { + "topo_info": { "parent_bus":"0x29", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT12-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT12-CTRL", "device_parent":"MUX4", "virt_parent":"PORT12"}, + "i2c": + { + "topo_info": { "parent_bus":"0x29", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_reset", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x31", "attr_mask":"0x3", "attr_cmpval":"0x8", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x35", "attr_mask":"0x3", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_present", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x3d", "attr_mask":"0x3", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x41", "attr_mask":"0x3", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + "PORT13": + { + "dev_info": { "device_type":"OSFP", "device_name":"PORT13", "device_parent":"MUX4"}, + "dev_attr": { "dev_idx":"13"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT13-EEPROM" }, + { "itf":"control", "dev":"PORT13-CTRL" } + ] + } + }, + "PORT13-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT13-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT13"}, + "i2c": + { + "topo_info": { "parent_bus":"0x2a", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT13-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT13-CTRL", "device_parent":"MUX4", "virt_parent":"PORT13"}, + "i2c": + { + "topo_info": { "parent_bus":"0x2a", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_reset", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x31", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x35", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_present", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x3d", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x41", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + "PORT14": + { + "dev_info": { "device_type":"OSFP", "device_name":"PORT14", "device_parent":"MUX4"}, + "dev_attr": { "dev_idx":"14"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT14-EEPROM" }, + { "itf":"control", "dev":"PORT14-CTRL" } + ] + } + }, + "PORT14-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT14-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT14"}, + "i2c": + { + "topo_info": { "parent_bus":"0x2b", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT14-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT14-CTRL", "device_parent":"MUX4", "virt_parent":"PORT14"}, + "i2c": + { + "topo_info": { "parent_bus":"0x2b", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_reset", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x31", "attr_mask":"0x5", "attr_cmpval":"0x20", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x35", "attr_mask":"0x5", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_present", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x3d", "attr_mask":"0x5", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x41", "attr_mask":"0x5", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + "PORT15": + { + "dev_info": { "device_type":"OSFP", "device_name":"PORT15", "device_parent":"MUX4"}, + "dev_attr": { "dev_idx":"15"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT15-EEPROM" }, + { "itf":"control", "dev":"PORT15-CTRL" } + ] + } + }, + "PORT15-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT15-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT15"}, + "i2c": + { + "topo_info": { "parent_bus":"0x2c", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT15-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT15-CTRL", "device_parent":"MUX4", "virt_parent":"PORT15"}, + "i2c": + { + "topo_info": { "parent_bus":"0x2c", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_reset", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x31", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x35", "attr_mask":"0x6", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_present", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x3d", "attr_mask":"0x6", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x41", "attr_mask":"0x6", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + "PORT16": + { + "dev_info": { "device_type":"OSFP", "device_name":"PORT16", "device_parent":"MUX4"}, + "dev_attr": { "dev_idx":"16"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT16-EEPROM" }, + { "itf":"control", "dev":"PORT16-CTRL" } + ] + } + }, + "PORT16-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT16-EEPROM", "device_parent":"MUX4", "virt_parent":"PORT16"}, + "i2c": + { + "topo_info": { "parent_bus":"0x2d", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT16-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT16-CTRL", "device_parent":"MUX4", "virt_parent":"PORT16"}, + "i2c": + { + "topo_info": { "parent_bus":"0x2d", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_reset", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x31", "attr_mask":"0x7", "attr_cmpval":"0x80", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x35", "attr_mask":"0x7", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_present", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x3d", "attr_mask":"0x7", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x41", "attr_mask":"0x7", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + "PORT17": + { + "dev_info": { "device_type":"OSFP", "device_name":"PORT17", "device_parent":"MUX5"}, + "dev_attr": { "dev_idx":"17"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT17-EEPROM" }, + { "itf":"control", "dev":"PORT17-CTRL" } + ] + } + }, + "PORT17-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT17-EEPROM", "device_parent":"MUX5", "virt_parent":"PORT17"}, + "i2c": + { + "topo_info": { "parent_bus":"0x2e", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT17-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT17-CTRL", "device_parent":"MUX5", "virt_parent":"PORT17"}, + "i2c": + { + "topo_info": { "parent_bus":"0x2e", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_reset", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x32", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x36", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_present", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x3e", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x42", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + "PORT18": + { + "dev_info": { "device_type":"OSFP", "device_name":"PORT18", "device_parent":"MUX5"}, + "dev_attr": { "dev_idx":"18"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT18-EEPROM" }, + { "itf":"control", "dev":"PORT18-CTRL" } + ] + } + }, + "PORT18-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT18-EEPROM", "device_parent":"MUX5", "virt_parent":"PORT18"}, + "i2c": + { + "topo_info": { "parent_bus":"0x2f", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT18-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT18-CTRL", "device_parent":"MUX5", "virt_parent":"PORT18"}, + "i2c": + { + "topo_info": { "parent_bus":"0x2f", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_reset", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x32", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x36", "attr_mask":"0x1", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_present", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x3e", "attr_mask":"0x1", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x42", "attr_mask":"0x1", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + "PORT19": + { + "dev_info": { "device_type":"OSFP", "device_name":"PORT19", "device_parent":"MUX5"}, + "dev_attr": { "dev_idx":"19"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT19-EEPROM" }, + { "itf":"control", "dev":"PORT19-CTRL" } + ] + } + }, + "PORT19-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT19-EEPROM", "device_parent":"MUX5", "virt_parent":"PORT19"}, + "i2c": + { + "topo_info": { "parent_bus":"0x30", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT19-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT19-CTRL", "device_parent":"MUX5", "virt_parent":"PORT19"}, + "i2c": + { + "topo_info": { "parent_bus":"0x30", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_reset", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x32", "attr_mask":"0x2", "attr_cmpval":"0x4", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x36", "attr_mask":"0x2", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_present", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x3e", "attr_mask":"0x2", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x42", "attr_mask":"0x2", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + "PORT20": + { + "dev_info": { "device_type":"OSFP", "device_name":"PORT20", "device_parent":"MUX5"}, + "dev_attr": { "dev_idx":"20"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT20-EEPROM" }, + { "itf":"control", "dev":"PORT20-CTRL" } + ] + } + }, + "PORT20-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT20-EEPROM", "device_parent":"MUX5", "virt_parent":"PORT20"}, + "i2c": + { + "topo_info": { "parent_bus":"0x31", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT20-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT20-CTRL", "device_parent":"MUX5", "virt_parent":"PORT20"}, + "i2c": + { + "topo_info": { "parent_bus":"0x31", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_reset", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x32", "attr_mask":"0x3", "attr_cmpval":"0x8", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x36", "attr_mask":"0x3", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_present", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x3e", "attr_mask":"0x3", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x42", "attr_mask":"0x3", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + "PORT21": + { + "dev_info": { "device_type":"OSFP", "device_name":"PORT21", "device_parent":"MUX5"}, + "dev_attr": { "dev_idx":"21"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT21-EEPROM" }, + { "itf":"control", "dev":"PORT21-CTRL" } + ] + } + }, + "PORT21-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT21-EEPROM", "device_parent":"MUX5", "virt_parent":"PORT21"}, + "i2c": + { + "topo_info": { "parent_bus":"0x32", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT21-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT21-CTRL", "device_parent":"MUX5", "virt_parent":"PORT21"}, + "i2c": + { + "topo_info": { "parent_bus":"0x32", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_reset", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x32", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x36", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_present", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x3e", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x42", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + "PORT22": + { + "dev_info": { "device_type":"OSFP", "device_name":"PORT22", "device_parent":"MUX5"}, + "dev_attr": { "dev_idx":"22"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT22-EEPROM" }, + { "itf":"control", "dev":"PORT22-CTRL" } + ] + } + }, + "PORT22-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT22-EEPROM", "device_parent":"MUX5", "virt_parent":"PORT22"}, + "i2c": + { + "topo_info": { "parent_bus":"0x33", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT22-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT22-CTRL", "device_parent":"MUX5", "virt_parent":"PORT22"}, + "i2c": + { + "topo_info": { "parent_bus":"0x33", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_reset", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x32", "attr_mask":"0x5", "attr_cmpval":"0x20", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x36", "attr_mask":"0x5", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_present", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x3e", "attr_mask":"0x5", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x42", "attr_mask":"0x5", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + "PORT23": + { + "dev_info": { "device_type":"OSFP", "device_name":"PORT23", "device_parent":"MUX5"}, + "dev_attr": { "dev_idx":"23"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT23-EEPROM" }, + { "itf":"control", "dev":"PORT23-CTRL" } + ] + } + }, + "PORT23-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT23-EEPROM", "device_parent":"MUX5", "virt_parent":"PORT23"}, + "i2c": + { + "topo_info": { "parent_bus":"0x34", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT23-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT23-CTRL", "device_parent":"MUX5", "virt_parent":"PORT23"}, + "i2c": + { + "topo_info": { "parent_bus":"0x34", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_reset", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x32", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x36", "attr_mask":"0x6", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_present", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x3e", "attr_mask":"0x6", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x42", "attr_mask":"0x6", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + "PORT24": + { + "dev_info": { "device_type":"OSFP", "device_name":"PORT24", "device_parent":"MUX5"}, + "dev_attr": { "dev_idx":"24"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT24-EEPROM" }, + { "itf":"control", "dev":"PORT24-CTRL" } + ] + } + }, + "PORT24-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT24-EEPROM", "device_parent":"MUX5", "virt_parent":"PORT24"}, + "i2c": + { + "topo_info": { "parent_bus":"0x35", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT24-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT24-CTRL", "device_parent":"MUX5", "virt_parent":"PORT24"}, + "i2c": + { + "topo_info": { "parent_bus":"0x35", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_reset", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x32", "attr_mask":"0x7", "attr_cmpval":"0x80", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x36", "attr_mask":"0x7", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_present", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x3e", "attr_mask":"0x7", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x42", "attr_mask":"0x7", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + "PORT25": + { + "dev_info": { "device_type":"OSFP", "device_name":"PORT25", "device_parent":"MUX6"}, + "dev_attr": { "dev_idx":"25"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT25-EEPROM" }, + { "itf":"control", "dev":"PORT25-CTRL" } + ] + } + }, + "PORT25-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT25-EEPROM", "device_parent":"MUX6", "virt_parent":"PORT25"}, + "i2c": + { + "topo_info": { "parent_bus":"0x36", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT25-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT25-CTRL", "device_parent":"MUX6", "virt_parent":"PORT25"}, + "i2c": + { + "topo_info": { "parent_bus":"0x36", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_reset", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x33", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x37", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_present", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x3f", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x43", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + "PORT26": + { + "dev_info": { "device_type":"OSFP", "device_name":"PORT26", "device_parent":"MUX6"}, + "dev_attr": { "dev_idx":"26"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT26-EEPROM" }, + { "itf":"control", "dev":"PORT26-CTRL" } + ] + } + }, + "PORT26-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT26-EEPROM", "device_parent":"MUX6", "virt_parent":"PORT26"}, + "i2c": + { + "topo_info": { "parent_bus":"0x37", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT26-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT26-CTRL", "device_parent":"MUX6", "virt_parent":"PORT26"}, + "i2c": + { + "topo_info": { "parent_bus":"0x37", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_reset", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x33", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x37", "attr_mask":"0x1", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_present", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x3f", "attr_mask":"0x1", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x43", "attr_mask":"0x1", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + "PORT27": + { + "dev_info": { "device_type":"OSFP", "device_name":"PORT27", "device_parent":"MUX6"}, + "dev_attr": { "dev_idx":"27"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT27-EEPROM" }, + { "itf":"control", "dev":"PORT27-CTRL" } + ] + } + }, + "PORT27-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT27-EEPROM", "device_parent":"MUX6", "virt_parent":"PORT27"}, + "i2c": + { + "topo_info": { "parent_bus":"0x38", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT27-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT27-CTRL", "device_parent":"MUX6", "virt_parent":"PORT27"}, + "i2c": + { + "topo_info": { "parent_bus":"0x38", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_reset", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x33", "attr_mask":"0x2", "attr_cmpval":"0x4", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x37", "attr_mask":"0x2", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_present", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x3f", "attr_mask":"0x2", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x43", "attr_mask":"0x2", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + "PORT28": + { + "dev_info": { "device_type":"OSFP", "device_name":"PORT28", "device_parent":"MUX6"}, + "dev_attr": { "dev_idx":"28"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT28-EEPROM" }, + { "itf":"control", "dev":"PORT28-CTRL" } + ] + } + }, + "PORT28-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT28-EEPROM", "device_parent":"MUX6", "virt_parent":"PORT28"}, + "i2c": + { + "topo_info": { "parent_bus":"0x39", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT28-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT28-CTRL", "device_parent":"MUX6", "virt_parent":"PORT28"}, + "i2c": + { + "topo_info": { "parent_bus":"0x39", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_reset", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x33", "attr_mask":"0x3", "attr_cmpval":"0x8", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x37", "attr_mask":"0x3", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_present", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x3f", "attr_mask":"0x3", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x43", "attr_mask":"0x3", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + "PORT29": + { + "dev_info": { "device_type":"OSFP", "device_name":"PORT29", "device_parent":"MUX6"}, + "dev_attr": { "dev_idx":"29"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT29-EEPROM" }, + { "itf":"control", "dev":"PORT29-CTRL" } + ] + } + }, + "PORT29-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT29-EEPROM", "device_parent":"MUX6", "virt_parent":"PORT29"}, + "i2c": + { + "topo_info": { "parent_bus":"0x3a", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT29-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT29-CTRL", "device_parent":"MUX6", "virt_parent":"PORT29"}, + "i2c": + { + "topo_info": { "parent_bus":"0x3a", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_reset", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x33", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x37", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_present", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x3f", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x43", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + "PORT30": + { + "dev_info": { "device_type":"OSFP", "device_name":"PORT30", "device_parent":"MUX6"}, + "dev_attr": { "dev_idx":"30"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT30-EEPROM" }, + { "itf":"control", "dev":"PORT30-CTRL" } + ] + } + }, + "PORT30-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT30-EEPROM", "device_parent":"MUX6", "virt_parent":"PORT30"}, + "i2c": + { + "topo_info": { "parent_bus":"0x3b", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT30-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT30-CTRL", "device_parent":"MUX6", "virt_parent":"PORT30"}, + "i2c": + { + "topo_info": { "parent_bus":"0x3b", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_reset", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x33", "attr_mask":"0x5", "attr_cmpval":"0x20", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x37", "attr_mask":"0x5", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_present", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x3f", "attr_mask":"0x5", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x43", "attr_mask":"0x5", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + "PORT31": + { + "dev_info": { "device_type":"OSFP", "device_name":"PORT31", "device_parent":"MUX6"}, + "dev_attr": { "dev_idx":"31"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT31-EEPROM" }, + { "itf":"control", "dev":"PORT31-CTRL" } + ] + } + }, + "PORT31-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT31-EEPROM", "device_parent":"MUX6", "virt_parent":"PORT31"}, + "i2c": + { + "topo_info": { "parent_bus":"0x3c", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT31-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT31-CTRL", "device_parent":"MUX6", "virt_parent":"PORT31"}, + "i2c": + { + "topo_info": { "parent_bus":"0x3c", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_reset", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x33", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x37", "attr_mask":"0x6", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_present", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x3f", "attr_mask":"0x6", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x43", "attr_mask":"0x6", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + "PORT32": + { + "dev_info": { "device_type":"OSFP", "device_name":"PORT32", "device_parent":"MUX6"}, + "dev_attr": { "dev_idx":"32"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT32-EEPROM" }, + { "itf":"control", "dev":"PORT32-CTRL" } + ] + } + }, + "PORT32-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT32-EEPROM", "device_parent":"MUX6", "virt_parent":"PORT32"}, + "i2c": + { + "topo_info": { "parent_bus":"0x3d", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT32-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT32-CTRL", "device_parent":"MUX6", "virt_parent":"PORT32"}, + "i2c": + { + "topo_info": { "parent_bus":"0x3d", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_reset", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x33", "attr_mask":"0x7", "attr_cmpval":"0x80", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x37", "attr_mask":"0x7", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_present", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x3f", "attr_mask":"0x7", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x43", "attr_mask":"0x7", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + "PORT33": + { + "dev_info": { "device_type":"OSFP", "device_name":"PORT33", "device_parent":"MUX7"}, + "dev_attr": { "dev_idx":"33"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT33-EEPROM" }, + { "itf":"control", "dev":"PORT33-CTRL" } + ] + } + }, + "PORT33-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT33-EEPROM", "device_parent":"MUX7", "virt_parent":"PORT33"}, + "i2c": + { + "topo_info": { "parent_bus":"0x3e", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT33-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT33-CTRL", "device_parent":"MUX7", "virt_parent":"PORT33"}, + "i2c": + { + "topo_info": { "parent_bus":"0x3e", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_reset", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x30", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x34", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_present", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x3c", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x40", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + "PORT34": + { + "dev_info": { "device_type":"OSFP", "device_name":"PORT34", "device_parent":"MUX7"}, + "dev_attr": { "dev_idx":"34"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT34-EEPROM" }, + { "itf":"control", "dev":"PORT34-CTRL" } + ] + } + }, + "PORT34-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT34-EEPROM", "device_parent":"MUX7", "virt_parent":"PORT34"}, + "i2c": + { + "topo_info": { "parent_bus":"0x3f", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT34-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT34-CTRL", "device_parent":"MUX7", "virt_parent":"PORT34"}, + "i2c": + { + "topo_info": { "parent_bus":"0x3f", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_reset", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x30", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x34", "attr_mask":"0x1", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_present", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x3c", "attr_mask":"0x1", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x40", "attr_mask":"0x1", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + "PORT35": + { + "dev_info": { "device_type":"OSFP", "device_name":"PORT35", "device_parent":"MUX7"}, + "dev_attr": { "dev_idx":"35"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT35-EEPROM" }, + { "itf":"control", "dev":"PORT35-CTRL" } + ] + } + }, + "PORT35-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT35-EEPROM", "device_parent":"MUX7", "virt_parent":"PORT35"}, + "i2c": + { + "topo_info": { "parent_bus":"0x40", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT35-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT35-CTRL", "device_parent":"MUX7", "virt_parent":"PORT35"}, + "i2c": + { + "topo_info": { "parent_bus":"0x40", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_reset", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x30", "attr_mask":"0x2", "attr_cmpval":"0x4", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x34", "attr_mask":"0x2", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_present", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x3c", "attr_mask":"0x2", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x40", "attr_mask":"0x2", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + "PORT36": + { + "dev_info": { "device_type":"OSFP", "device_name":"PORT36", "device_parent":"MUX7"}, + "dev_attr": { "dev_idx":"36"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT36-EEPROM" }, + { "itf":"control", "dev":"PORT36-CTRL" } + ] + } + }, + "PORT36-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT36-EEPROM", "device_parent":"MUX7", "virt_parent":"PORT36"}, + "i2c": + { + "topo_info": { "parent_bus":"0x41", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT36-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT36-CTRL", "device_parent":"MUX7", "virt_parent":"PORT36"}, + "i2c": + { + "topo_info": { "parent_bus":"0x41", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_reset", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x30", "attr_mask":"0x3", "attr_cmpval":"0x8", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x34", "attr_mask":"0x3", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_present", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x3c", "attr_mask":"0x3", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x40", "attr_mask":"0x3", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + "PORT37": + { + "dev_info": { "device_type":"OSFP", "device_name":"PORT37", "device_parent":"MUX7"}, + "dev_attr": { "dev_idx":"37"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT37-EEPROM" }, + { "itf":"control", "dev":"PORT37-CTRL" } + ] + } + }, + "PORT37-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT37-EEPROM", "device_parent":"MUX7", "virt_parent":"PORT37"}, + "i2c": + { + "topo_info": { "parent_bus":"0x42", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT37-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT37-CTRL", "device_parent":"MUX7", "virt_parent":"PORT37"}, + "i2c": + { + "topo_info": { "parent_bus":"0x42", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_reset", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x30", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x34", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_present", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x3c", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x40", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + "PORT38": + { + "dev_info": { "device_type":"OSFP", "device_name":"PORT38", "device_parent":"MUX7"}, + "dev_attr": { "dev_idx":"38"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT38-EEPROM" }, + { "itf":"control", "dev":"PORT38-CTRL" } + ] + } + }, + "PORT38-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT38-EEPROM", "device_parent":"MUX7", "virt_parent":"PORT38"}, + "i2c": + { + "topo_info": { "parent_bus":"0x43", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT38-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT38-CTRL", "device_parent":"MUX7", "virt_parent":"PORT38"}, + "i2c": + { + "topo_info": { "parent_bus":"0x43", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_reset", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x30", "attr_mask":"0x5", "attr_cmpval":"0x20", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x34", "attr_mask":"0x5", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_present", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x3c", "attr_mask":"0x5", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x40", "attr_mask":"0x5", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + "PORT39": + { + "dev_info": { "device_type":"OSFP", "device_name":"PORT39", "device_parent":"MUX7"}, + "dev_attr": { "dev_idx":"39"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT39-EEPROM" }, + { "itf":"control", "dev":"PORT39-CTRL" } + ] + } + }, + "PORT39-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT39-EEPROM", "device_parent":"MUX7", "virt_parent":"PORT39"}, + "i2c": + { + "topo_info": { "parent_bus":"0x44", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT39-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT39-CTRL", "device_parent":"MUX7", "virt_parent":"PORT39"}, + "i2c": + { + "topo_info": { "parent_bus":"0x44", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_reset", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x30", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x34", "attr_mask":"0x6", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_present", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x3c", "attr_mask":"0x6", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x40", "attr_mask":"0x6", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + "PORT40": + { + "dev_info": { "device_type":"OSFP", "device_name":"PORT40", "device_parent":"MUX7"}, + "dev_attr": { "dev_idx":"40"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT40-EEPROM" }, + { "itf":"control", "dev":"PORT40-CTRL" } + ] + } + }, + "PORT40-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT40-EEPROM", "device_parent":"MUX7", "virt_parent":"PORT40"}, + "i2c": + { + "topo_info": { "parent_bus":"0x45", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT40-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT40-CTRL", "device_parent":"MUX7", "virt_parent":"PORT40"}, + "i2c": + { + "topo_info": { "parent_bus":"0x45", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_reset", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x30", "attr_mask":"0x7", "attr_cmpval":"0x80", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x34", "attr_mask":"0x7", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_present", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x3c", "attr_mask":"0x7", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x40", "attr_mask":"0x7", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + "PORT41": + { + "dev_info": { "device_type":"OSFP", "device_name":"PORT41", "device_parent":"MUX8"}, + "dev_attr": { "dev_idx":"41"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT41-EEPROM" }, + { "itf":"control", "dev":"PORT41-CTRL" } + ] + } + }, + "PORT41-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT41-EEPROM", "device_parent":"MUX8", "virt_parent":"PORT41"}, + "i2c": + { + "topo_info": { "parent_bus":"0x46", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT41-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT41-CTRL", "device_parent":"MUX8", "virt_parent":"PORT41"}, + "i2c": + { + "topo_info": { "parent_bus":"0x46", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_reset", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x31", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x35", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_present", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x3d", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x41", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + "PORT42": + { + "dev_info": { "device_type":"OSFP", "device_name":"PORT42", "device_parent":"MUX8"}, + "dev_attr": { "dev_idx":"42"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT42-EEPROM" }, + { "itf":"control", "dev":"PORT42-CTRL" } + ] + } + }, + "PORT42-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT42-EEPROM", "device_parent":"MUX8", "virt_parent":"PORT42"}, + "i2c": + { + "topo_info": { "parent_bus":"0x47", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT42-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT42-CTRL", "device_parent":"MUX8", "virt_parent":"PORT42"}, + "i2c": + { + "topo_info": { "parent_bus":"0x47", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_reset", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x31", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x35", "attr_mask":"0x1", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_present", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x3d", "attr_mask":"0x1", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x41", "attr_mask":"0x1", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + "PORT43": + { + "dev_info": { "device_type":"OSFP", "device_name":"PORT43", "device_parent":"MUX8"}, + "dev_attr": { "dev_idx":"43"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT43-EEPROM" }, + { "itf":"control", "dev":"PORT43-CTRL" } + ] + } + }, + "PORT43-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT43-EEPROM", "device_parent":"MUX8", "virt_parent":"PORT43"}, + "i2c": + { + "topo_info": { "parent_bus":"0x48", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT43-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT43-CTRL", "device_parent":"MUX8", "virt_parent":"PORT43"}, + "i2c": + { + "topo_info": { "parent_bus":"0x48", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_reset", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x31", "attr_mask":"0x2", "attr_cmpval":"0x4", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x35", "attr_mask":"0x2", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_present", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x3d", "attr_mask":"0x2", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x41", "attr_mask":"0x2", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + "PORT44": + { + "dev_info": { "device_type":"OSFP", "device_name":"PORT44", "device_parent":"MUX8"}, + "dev_attr": { "dev_idx":"44"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT44-EEPROM" }, + { "itf":"control", "dev":"PORT44-CTRL" } + ] + } + }, + "PORT44-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT44-EEPROM", "device_parent":"MUX8", "virt_parent":"PORT44"}, + "i2c": + { + "topo_info": { "parent_bus":"0x49", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT44-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT44-CTRL", "device_parent":"MUX8", "virt_parent":"PORT44"}, + "i2c": + { + "topo_info": { "parent_bus":"0x49", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_reset", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x31", "attr_mask":"0x3", "attr_cmpval":"0x8", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x35", "attr_mask":"0x3", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_present", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x3d", "attr_mask":"0x3", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x41", "attr_mask":"0x3", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + "PORT45": + { + "dev_info": { "device_type":"OSFP", "device_name":"PORT45", "device_parent":"MUX8"}, + "dev_attr": { "dev_idx":"45"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT45-EEPROM" }, + { "itf":"control", "dev":"PORT45-CTRL" } + ] + } + }, + "PORT45-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT45-EEPROM", "device_parent":"MUX8", "virt_parent":"PORT45"}, + "i2c": + { + "topo_info": { "parent_bus":"0x4a", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT45-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT45-CTRL", "device_parent":"MUX8", "virt_parent":"PORT45"}, + "i2c": + { + "topo_info": { "parent_bus":"0x4a", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_reset", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x31", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x35", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_present", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x3d", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x41", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + "PORT46": + { + "dev_info": { "device_type":"OSFP", "device_name":"PORT46", "device_parent":"MUX8"}, + "dev_attr": { "dev_idx":"46"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT46-EEPROM" }, + { "itf":"control", "dev":"PORT46-CTRL" } + ] + } + }, + "PORT46-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT46-EEPROM", "device_parent":"MUX8", "virt_parent":"PORT46"}, + "i2c": + { + "topo_info": { "parent_bus":"0x4b", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT46-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT46-CTRL", "device_parent":"MUX8", "virt_parent":"PORT46"}, + "i2c": + { + "topo_info": { "parent_bus":"0x4b", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_reset", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x31", "attr_mask":"0x5", "attr_cmpval":"0x20", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x35", "attr_mask":"0x5", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_present", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x3d", "attr_mask":"0x5", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x41", "attr_mask":"0x5", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + "PORT47": + { + "dev_info": { "device_type":"OSFP", "device_name":"PORT47", "device_parent":"MUX8"}, + "dev_attr": { "dev_idx":"47"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT47-EEPROM" }, + { "itf":"control", "dev":"PORT47-CTRL" } + ] + } + }, + "PORT47-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT47-EEPROM", "device_parent":"MUX8", "virt_parent":"PORT47"}, + "i2c": + { + "topo_info": { "parent_bus":"0x4c", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT47-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT47-CTRL", "device_parent":"MUX8", "virt_parent":"PORT47"}, + "i2c": + { + "topo_info": { "parent_bus":"0x4c", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_reset", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x31", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x35", "attr_mask":"0x6", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_present", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x3d", "attr_mask":"0x6", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x41", "attr_mask":"0x6", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + "PORT48": + { + "dev_info": { "device_type":"OSFP", "device_name":"PORT48", "device_parent":"MUX8"}, + "dev_attr": { "dev_idx":"48"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT48-EEPROM" }, + { "itf":"control", "dev":"PORT48-CTRL" } + ] + } + }, + "PORT48-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT48-EEPROM", "device_parent":"MUX8", "virt_parent":"PORT48"}, + "i2c": + { + "topo_info": { "parent_bus":"0x4d", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT48-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT48-CTRL", "device_parent":"MUX8", "virt_parent":"PORT48"}, + "i2c": + { + "topo_info": { "parent_bus":"0x4d", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_reset", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x31", "attr_mask":"0x7", "attr_cmpval":"0x80", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x35", "attr_mask":"0x7", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_present", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x3d", "attr_mask":"0x7", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x41", "attr_mask":"0x7", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + "PORT49": + { + "dev_info": { "device_type":"OSFP", "device_name":"PORT49", "device_parent":"MUX9"}, + "dev_attr": { "dev_idx":"49"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT49-EEPROM" }, + { "itf":"control", "dev":"PORT49-CTRL" } + ] + } + }, + "PORT49-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT49-EEPROM", "device_parent":"MUX9", "virt_parent":"PORT49"}, + "i2c": + { + "topo_info": { "parent_bus":"0x4e", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT49-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT49-CTRL", "device_parent":"MUX9", "virt_parent":"PORT49"}, + "i2c": + { + "topo_info": { "parent_bus":"0x4e", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_reset", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x32", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x36", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_present", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x3e", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x42", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + "PORT50": + { + "dev_info": { "device_type":"OSFP", "device_name":"PORT50", "device_parent":"MUX9"}, + "dev_attr": { "dev_idx":"50"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT50-EEPROM" }, + { "itf":"control", "dev":"PORT50-CTRL" } + ] + } + }, + "PORT50-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT50-EEPROM", "device_parent":"MUX9", "virt_parent":"PORT50"}, + "i2c": + { + "topo_info": { "parent_bus":"0x4f", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT50-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT50-CTRL", "device_parent":"MUX9", "virt_parent":"PORT50"}, + "i2c": + { + "topo_info": { "parent_bus":"0x4f", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_reset", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x32", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x36", "attr_mask":"0x1", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_present", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x3e", "attr_mask":"0x1", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x42", "attr_mask":"0x1", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + "PORT51": + { + "dev_info": { "device_type":"OSFP", "device_name":"PORT51", "device_parent":"MUX9"}, + "dev_attr": { "dev_idx":"51"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT51-EEPROM" }, + { "itf":"control", "dev":"PORT51-CTRL" } + ] + } + }, + "PORT51-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT51-EEPROM", "device_parent":"MUX9", "virt_parent":"PORT51"}, + "i2c": + { + "topo_info": { "parent_bus":"0x50", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT51-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT51-CTRL", "device_parent":"MUX9", "virt_parent":"PORT51"}, + "i2c": + { + "topo_info": { "parent_bus":"0x50", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_reset", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x32", "attr_mask":"0x2", "attr_cmpval":"0x4", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x36", "attr_mask":"0x2", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_present", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x3e", "attr_mask":"0x2", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x42", "attr_mask":"0x2", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + "PORT52": + { + "dev_info": { "device_type":"OSFP", "device_name":"PORT52", "device_parent":"MUX9"}, + "dev_attr": { "dev_idx":"52"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT52-EEPROM" }, + { "itf":"control", "dev":"PORT52-CTRL" } + ] + } + }, + "PORT52-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT52-EEPROM", "device_parent":"MUX9", "virt_parent":"PORT52"}, + "i2c": + { + "topo_info": { "parent_bus":"0x51", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT52-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT52-CTRL", "device_parent":"MUX9", "virt_parent":"PORT52"}, + "i2c": + { + "topo_info": { "parent_bus":"0x51", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_reset", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x32", "attr_mask":"0x3", "attr_cmpval":"0x8", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x36", "attr_mask":"0x3", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_present", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x3e", "attr_mask":"0x3", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x42", "attr_mask":"0x3", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + "PORT53": + { + "dev_info": { "device_type":"OSFP", "device_name":"PORT53", "device_parent":"MUX9"}, + "dev_attr": { "dev_idx":"53"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT53-EEPROM" }, + { "itf":"control", "dev":"PORT53-CTRL" } + ] + } + }, + "PORT53-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT53-EEPROM", "device_parent":"MUX9", "virt_parent":"PORT53"}, + "i2c": + { + "topo_info": { "parent_bus":"0x52", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT53-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT53-CTRL", "device_parent":"MUX9", "virt_parent":"PORT53"}, + "i2c": + { + "topo_info": { "parent_bus":"0x52", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_reset", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x32", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x36", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_present", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x3e", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x42", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + "PORT54": + { + "dev_info": { "device_type":"OSFP", "device_name":"PORT54", "device_parent":"MUX9"}, + "dev_attr": { "dev_idx":"54"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT54-EEPROM" }, + { "itf":"control", "dev":"PORT54-CTRL" } + ] + } + }, + "PORT54-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT54-EEPROM", "device_parent":"MUX9", "virt_parent":"PORT54"}, + "i2c": + { + "topo_info": { "parent_bus":"0x53", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT54-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT54-CTRL", "device_parent":"MUX9", "virt_parent":"PORT54"}, + "i2c": + { + "topo_info": { "parent_bus":"0x53", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_reset", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x32", "attr_mask":"0x5", "attr_cmpval":"0x20", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x36", "attr_mask":"0x5", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_present", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x3e", "attr_mask":"0x5", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x42", "attr_mask":"0x5", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + "PORT55": + { + "dev_info": { "device_type":"OSFP", "device_name":"PORT55", "device_parent":"MUX9"}, + "dev_attr": { "dev_idx":"55"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT55-EEPROM" }, + { "itf":"control", "dev":"PORT55-CTRL" } + ] + } + }, + "PORT55-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT55-EEPROM", "device_parent":"MUX9", "virt_parent":"PORT55"}, + "i2c": + { + "topo_info": { "parent_bus":"0x54", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT55-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT55-CTRL", "device_parent":"MUX9", "virt_parent":"PORT55"}, + "i2c": + { + "topo_info": { "parent_bus":"0x54", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_reset", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x32", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x36", "attr_mask":"0x6", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_present", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x3e", "attr_mask":"0x6", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x42", "attr_mask":"0x6", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + "PORT56": + { + "dev_info": { "device_type":"OSFP", "device_name":"PORT56", "device_parent":"MUX9"}, + "dev_attr": { "dev_idx":"56"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT56-EEPROM" }, + { "itf":"control", "dev":"PORT56-CTRL" } + ] + } + }, + "PORT56-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT56-EEPROM", "device_parent":"MUX9", "virt_parent":"PORT56"}, + "i2c": + { + "topo_info": { "parent_bus":"0x55", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT56-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT56-CTRL", "device_parent":"MUX9", "virt_parent":"PORT56"}, + "i2c": + { + "topo_info": { "parent_bus":"0x55", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_reset", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x32", "attr_mask":"0x7", "attr_cmpval":"0x80", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x36", "attr_mask":"0x7", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_present", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x3e", "attr_mask":"0x7", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x42", "attr_mask":"0x7", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + "PORT57": + { + "dev_info": { "device_type":"OSFP", "device_name":"PORT57", "device_parent":"MUX10"}, + "dev_attr": { "dev_idx":"57"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT57-EEPROM" }, + { "itf":"control", "dev":"PORT57-CTRL" } + ] + } + }, + "PORT57-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT57-EEPROM", "device_parent":"MUX10", "virt_parent":"PORT57"}, + "i2c": + { + "topo_info": { "parent_bus":"0x56", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT57-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT57-CTRL", "device_parent":"MUX10", "virt_parent":"PORT57"}, + "i2c": + { + "topo_info": { "parent_bus":"0x56", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_reset", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x33", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x37", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_present", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x3f", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x43", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + "PORT58": + { + "dev_info": { "device_type":"OSFP", "device_name":"PORT58", "device_parent":"MUX10"}, + "dev_attr": { "dev_idx":"58"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT58-EEPROM" }, + { "itf":"control", "dev":"PORT58-CTRL" } + ] + } + }, + "PORT58-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT58-EEPROM", "device_parent":"MUX10", "virt_parent":"PORT58"}, + "i2c": + { + "topo_info": { "parent_bus":"0x57", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT58-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT58-CTRL", "device_parent":"MUX10", "virt_parent":"PORT58"}, + "i2c": + { + "topo_info": { "parent_bus":"0x57", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_reset", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x33", "attr_mask":"0x1", "attr_cmpval":"0x2", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x37", "attr_mask":"0x1", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_present", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x3f", "attr_mask":"0x1", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x43", "attr_mask":"0x1", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + "PORT59": + { + "dev_info": { "device_type":"OSFP", "device_name":"PORT59", "device_parent":"MUX10"}, + "dev_attr": { "dev_idx":"59"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT59-EEPROM" }, + { "itf":"control", "dev":"PORT59-CTRL" } + ] + } + }, + "PORT59-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT59-EEPROM", "device_parent":"MUX10", "virt_parent":"PORT59"}, + "i2c": + { + "topo_info": { "parent_bus":"0x58", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT59-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT59-CTRL", "device_parent":"MUX10", "virt_parent":"PORT59"}, + "i2c": + { + "topo_info": { "parent_bus":"0x58", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_reset", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x33", "attr_mask":"0x2", "attr_cmpval":"0x4", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x37", "attr_mask":"0x2", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_present", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x3f", "attr_mask":"0x2", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x43", "attr_mask":"0x2", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + "PORT60": + { + "dev_info": { "device_type":"OSFP", "device_name":"PORT60", "device_parent":"MUX10"}, + "dev_attr": { "dev_idx":"60"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT60-EEPROM" }, + { "itf":"control", "dev":"PORT60-CTRL" } + ] + } + }, + "PORT60-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT60-EEPROM", "device_parent":"MUX10", "virt_parent":"PORT60"}, + "i2c": + { + "topo_info": { "parent_bus":"0x59", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT60-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT60-CTRL", "device_parent":"MUX10", "virt_parent":"PORT60"}, + "i2c": + { + "topo_info": { "parent_bus":"0x59", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_reset", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x33", "attr_mask":"0x3", "attr_cmpval":"0x8", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x37", "attr_mask":"0x3", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_present", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x3f", "attr_mask":"0x3", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x43", "attr_mask":"0x3", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + "PORT61": + { + "dev_info": { "device_type":"OSFP", "device_name":"PORT61", "device_parent":"MUX10"}, + "dev_attr": { "dev_idx":"61"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT61-EEPROM" }, + { "itf":"control", "dev":"PORT61-CTRL" } + ] + } + }, + "PORT61-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT61-EEPROM", "device_parent":"MUX10", "virt_parent":"PORT61"}, + "i2c": + { + "topo_info": { "parent_bus":"0x5a", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT61-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT61-CTRL", "device_parent":"MUX10", "virt_parent":"PORT61"}, + "i2c": + { + "topo_info": { "parent_bus":"0x5a", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_reset", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x33", "attr_mask":"0x4", "attr_cmpval":"0x10", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x37", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_present", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x3f", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x43", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + "PORT62": + { + "dev_info": { "device_type":"OSFP", "device_name":"PORT62", "device_parent":"MUX10"}, + "dev_attr": { "dev_idx":"62"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT62-EEPROM" }, + { "itf":"control", "dev":"PORT62-CTRL" } + ] + } + }, + "PORT62-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT62-EEPROM", "device_parent":"MUX10", "virt_parent":"PORT62"}, + "i2c": + { + "topo_info": { "parent_bus":"0x5b", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT62-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT62-CTRL", "device_parent":"MUX10", "virt_parent":"PORT62"}, + "i2c": + { + "topo_info": { "parent_bus":"0x5b", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_reset", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x33", "attr_mask":"0x5", "attr_cmpval":"0x20", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x37", "attr_mask":"0x5", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_present", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x3f", "attr_mask":"0x5", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x43", "attr_mask":"0x5", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + "PORT63": + { + "dev_info": { "device_type":"OSFP", "device_name":"PORT63", "device_parent":"MUX10"}, + "dev_attr": { "dev_idx":"63"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT63-EEPROM" }, + { "itf":"control", "dev":"PORT63-CTRL" } + ] + } + }, + "PORT63-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT63-EEPROM", "device_parent":"MUX10", "virt_parent":"PORT63"}, + "i2c": + { + "topo_info": { "parent_bus":"0x5c", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT63-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT63-CTRL", "device_parent":"MUX10", "virt_parent":"PORT63"}, + "i2c": + { + "topo_info": { "parent_bus":"0x5c", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_reset", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x33", "attr_mask":"0x6", "attr_cmpval":"0x40", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x37", "attr_mask":"0x6", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_present", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x3f", "attr_mask":"0x6", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x43", "attr_mask":"0x6", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + "PORT64": + { + "dev_info": { "device_type":"OSFP", "device_name":"PORT64", "device_parent":"MUX10"}, + "dev_attr": { "dev_idx":"64"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT64-EEPROM" }, + { "itf":"control", "dev":"PORT64-CTRL" } + ] + } + }, + "PORT64-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT64-EEPROM", "device_parent":"MUX10", "virt_parent":"PORT64"}, + "i2c": + { + "topo_info": { "parent_bus":"0x5d", "dev_addr":"0x50", "dev_type":"optoe3"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT64-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT64-CTRL", "device_parent":"MUX10", "virt_parent":"PORT64"}, + "i2c": + { + "topo_info": { "parent_bus":"0x5d", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_reset", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x33", "attr_mask":"0x7", "attr_cmpval":"0x80", "attr_len":"1"}, + {"attr_name":"xcvr_lpmode", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x37", "attr_mask":"0x7", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_present", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x3f", "attr_mask":"0x7", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_intr_status", "attr_devaddr":"0x45", "attr_devtype":"cpld", "attr_devname":"PPLD-B", "attr_offset":"0x43", "attr_mask":"0x7", "attr_cmpval":"0x0", "attr_len":"1"} + ] + } + }, + + "PORT65": + { + "dev_info": { "device_type":"SFP+", "device_name":"PORT65", "device_parent":"MUX2"}, + "dev_attr": { "dev_idx":"65"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT65-EEPROM" }, + { "itf":"control", "dev":"PORT65-CTRL" } + ] + } + }, + "PORT65-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT65-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT65"}, + "i2c": + { + "topo_info": { "parent_bus":"0x16", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT65-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT65-CTRL", "device_parent":"MUX2", "virt_parent":"PORT65"}, + "i2c": + { + "topo_info": { "parent_bus":"0x16", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x45", "attr_mask":"0x0", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_rxlos", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x45", "attr_mask":"0x1", "attr_cmpval":"0x1", "attr_len":"1"}, + {"attr_name":"xcvr_txfault", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x45", "attr_mask":"0x2", "attr_cmpval":"0x1", "attr_len":"1"}, + {"attr_name":"xcvr_txdisable", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x44", "attr_mask":"0x0", "attr_cmpval":"0x1", "attr_len":"1"} + ] + } + }, + + "PORT66": + { + "dev_info": { "device_type":"SFP+", "device_name":"PORT66", "device_parent":"MUX2"}, + "dev_attr": { "dev_idx":"66"}, + "i2c": + { + "interface": + [ + { "itf":"eeprom", "dev":"PORT66-EEPROM" }, + { "itf":"control", "dev":"PORT66-CTRL" } + ] + } + }, + "PORT66-EEPROM": + { + "dev_info": { "device_type":"", "device_name":"PORT66-EEPROM", "device_parent":"MUX2", "virt_parent":"PORT66"}, + "i2c": + { + "topo_info": { "parent_bus":"0x17", "dev_addr":"0x50", "dev_type":"optoe2"}, + "attr_list": + [ + { "attr_name":"eeprom"} + ] + } + }, + "PORT66-CTRL": + { + "dev_info": { "device_type":"", "device_name":"PORT66-CTRL", "device_parent":"MUX2", "virt_parent":"PORT66"}, + "i2c": + { + "topo_info": { "parent_bus":"0x17", "dev_addr":"0x66", "dev_type":"pddf_xcvr"}, + "attr_list": + [ + {"attr_name":"xcvr_present", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x45", "attr_mask":"0x4", "attr_cmpval":"0x0", "attr_len":"1"}, + {"attr_name":"xcvr_rxlos", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x45", "attr_mask":"0x5", "attr_cmpval":"0x1", "attr_len":"1"}, + {"attr_name":"xcvr_txfault", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x45", "attr_mask":"0x6", "attr_cmpval":"0x1", "attr_len":"1"}, + {"attr_name":"xcvr_txdisable", "attr_devaddr":"0x41", "attr_devtype":"cpld", "attr_devname":"PPLD-A", "attr_offset":"0x44", "attr_mask":"0x4", "attr_cmpval":"0x1", "attr_len":"1"} + ] + } + }, + + "PSU1": + { + "dev_info": { "device_type":"PSU"}, + "dev_attr": { "dev_idx":"1", "num_psu_fans": "1"}, + "bmc": { + "ipmitool": { + "attr_list": + [ + { "attr_name":"psu_power_good", "bmc_cmd":"ipmitool sdr -c get PSU1_state", "raw": "0", "field_name":"PSU1_state", "separator":",", "field_pos":"3"}, + { "attr_name":"psu_present", "bmc_cmd":"ipmitool sdr -c get PSU1_state", "raw": "0", "field_name":"PSU1_state", "separator":",", "field_pos":"5"}, + { "attr_name":"psu_model_name", "bmc_cmd":"ipmitool fru print 5", "raw": "0", "field_name":"Product Part Number", "separator":":","field_pos":"2"}, + { "attr_name":"psu_serial_num", "bmc_cmd":"ipmitool fru print 5", "raw": "0", "field_name":"Product Serial", "separator":":","field_pos":"2"}, + { "attr_name":"psu_revision", "bmc_cmd":"ipmitool fru print 5", "raw": "0", "field_name":"Product Version", "separator":":","field_pos":"2"}, + { "attr_name":"psu_mfr_id", "bmc_cmd":"ipmitool fru print 5", "raw": "0", "field_name":"Product Manufacturer", "separator":":", "field_pos":"2"}, + { "attr_name":"psu_p_out", "bmc_cmd":"ipmitool sensor reading PSU1_Out_watt", "raw": "0", "field_name":"PSU1_Out_watt", "separator":"|", "field_pos":"2", "mult":"1000000"}, + { "attr_name":"psu_v_out", "bmc_cmd":"ipmitool sensor reading PSU1_Out_volt", "raw":"0", "field_name" : "PSU1_Out_volt", "separator":"|", "field_pos":"2", "mult":"1000"}, + { "attr_name":"psu_i_out", "bmc_cmd":"ipmitool sensor reading PSU1_Out_amp", "raw":"0", "field_name" : "PSU1_Out_amp", "separator":"|", "field_pos":"2", "mult":"1000"}, + { "attr_name":"psu_v_in", "bmc_cmd":"ipmitool sensor reading PSU1_In_volt", "raw":"0", "field_name" : "PSU1_In_volt", "separator":"|", "field_pos":"2", "mult":"1000"}, + { "attr_name":"psu_i_in", "bmc_cmd":"ipmitool sensor reading PSU1_In_amp", "raw":"0", "field_name" : "PSU1_In_amp", "separator":"|", "field_pos":"2", "mult":"1000"}, + { "attr_name":"psu_p_in", "bmc_cmd":"ipmitool sensor reading PSU1_In_watt", "raw": "0", "field_name":"PSU1_In_watt", "separator":"|", "field_pos":"2", "mult":"1000000"}, + { "attr_name":"psu_temp1_input", "bmc_cmd":"ipmitool sensor reading PSU1_Rear_temp", "raw": "0", "field_name":"PSU1_Rear_temp", "separator":"|", "field_pos":"2", "mult":"1000"}, + { "attr_name":"psu_fan1_speed_rpm", "bmc_cmd":"ipmitool sensor reading PSU1_rpm", "raw":"0", "field_name" : "PSU1_rpm", "separator":"|", "field_pos":"2", "mult":"1"}, + { "attr_name":"psu_fan_dir", "bmc_cmd":"ipmitool raw 0x0a 0x11 0x01 0x2f 0x00 0x01 | awk '{print substr($0,6,1)}'", "raw": "1", "type":"mask", "mask":"0x1"}, + { "attr_name":"psu_temp1_high_threshold", "bmc_cmd":"ipmitool sensor", "raw":"0", "field_name" : "PSU1_Rear_temp", "separator":"|", "field_pos":"9", "mult":"1000"} + ] + } + } + }, + + "PSU2": + { + "dev_info": { "device_type":"PSU"}, + "dev_attr": { "dev_idx":"2", "num_psu_fans": "1"}, + "bmc": { + "ipmitool": { + "attr_list": + [ + { "attr_name":"psu_power_good", "bmc_cmd":"ipmitool sdr -c get PSU2_state", "raw": "0", "field_name":"PSU2_state", "separator":",", "field_pos":"3"}, + { "attr_name":"psu_present", "bmc_cmd":"ipmitool sdr -c get PSU2_state", "raw": "0", "field_name":"PSU2_state", "separator":",", "field_pos":"5"}, + { "attr_name":"psu_model_name", "bmc_cmd":"ipmitool fru print 6", "raw": "0", "field_name":"Product Part Number", "separator":":","field_pos":"2"}, + { "attr_name":"psu_serial_num", "bmc_cmd":"ipmitool fru print 6", "raw": "0", "field_name":"Product Serial", "separator":":","field_pos":"2"}, + { "attr_name":"psu_mfr_id", "bmc_cmd":"ipmitool fru print 6", "raw": "0", "field_name":"Product Manufacturer", "separator":":", "field_pos":"2"}, + { "attr_name":"psu_revision", "bmc_cmd":"ipmitool fru print 6", "raw": "0", "field_name":"Product Version", "separator":":","field_pos":"2"}, + { "attr_name":"psu_p_out", "bmc_cmd":"ipmitool sensor reading PSU2_Out_watt", "raw": "0", "field_name":"PSU2_Out_watt", "separator":"|", "field_pos":"2", "mult":"1000000"}, + { "attr_name":"psu_v_out", "bmc_cmd":"ipmitool sensor reading PSU2_Out_volt", "raw":"0", "field_name" : "PSU2_Out_volt", "separator":"|", "field_pos":"2", "mult":"1000"}, + { "attr_name":"psu_i_out", "bmc_cmd":"ipmitool sensor reading PSU2_Out_amp", "raw":"0", "field_name" : "PSU2_Out_amp", "separator":"|", "field_pos":"2", "mult":"1000"}, + { "attr_name":"psu_v_in", "bmc_cmd":"ipmitool sensor reading PSU2_In_volt", "raw":"0", "field_name" : "PSU2_In_volt", "separator":"|", "field_pos":"2", "mult":"1000"}, + { "attr_name":"psu_i_in", "bmc_cmd":"ipmitool sensor reading PSU2_In_amp", "raw":"0", "field_name" : "PSU2_In_amp", "separator":"|", "field_pos":"2", "mult":"1000"}, + { "attr_name":"psu_p_in", "bmc_cmd":"ipmitool sensor reading PSU2_In_watt", "raw": "0", "field_name":"PSU2_In_watt", "separator":"|", "field_pos":"2", "mult":"1000000"}, + { "attr_name":"psu_temp1_input", "bmc_cmd":"ipmitool sensor reading PSU2_Rear_temp", "raw": "0", "field_name":"PSU2_Rear_temp", "separator":"|", "field_pos":"2", "mult":"1000"}, + { "attr_name":"psu_fan1_speed_rpm", "bmc_cmd":"ipmitool sensor reading PSU2_rpm", "raw":"0", "field_name" : "PSU2_rpm", "separator":"|", "field_pos":"2", "mult":"1"}, + { "attr_name":"psu_fan_dir", "bmc_cmd":"ipmitool raw 0x0a 0x11 0x01 0x2f 0x00 0x01 | awk '{print substr($0,6,1)}'", "raw": "1", "type":"mask", "mask":"0x1"}, + { "attr_name":"psu_temp1_high_threshold", "bmc_cmd":"ipmitool sensor", "raw":"0", "field_name" : "PSU2_Rear_temp", "separator":"|", "field_pos":"9", "mult":"1000"} + ] + } + } + }, + + "FAN-CTRL": + { + "dev_info": { "device_type":"FAN"}, + "bmc": { + "ipmitool": { + "attr_list": + [ + { "attr_name":"fan1_present", "bmc_cmd":"ipmitool sdr -c get FAN1_prsnt", "raw":"0", "field_name" : "FAN1_prsnt", "separator":",", "field_pos":"5"}, + { "attr_name":"fan2_present", "bmc_cmd":"ipmitool sdr -c get FAN1_prsnt", "raw":"0", "field_name" : "FAN1_prsnt", "separator":",", "field_pos":"5"}, + { "attr_name":"fan3_present", "bmc_cmd":"ipmitool sdr -c get FAN2_prsnt", "raw":"0", "field_name" : "FAN2_prsnt", "separator":",", "field_pos":"5"}, + { "attr_name":"fan4_present", "bmc_cmd":"ipmitool sdr -c get FAN2_prsnt", "raw":"0", "field_name" : "FAN2_prsnt", "separator":",", "field_pos":"5"}, + { "attr_name":"fan5_present", "bmc_cmd":"ipmitool sdr -c get FAN3_prsnt", "raw":"0", "field_name" : "FAN3_prsnt", "separator":",", "field_pos":"5"}, + { "attr_name":"fan6_present", "bmc_cmd":"ipmitool sdr -c get FAN3_prsnt", "raw":"0", "field_name" : "FAN3_prsnt", "separator":",", "field_pos":"5"}, + { "attr_name":"fan7_present", "bmc_cmd":"ipmitool sdr -c get FAN4_prsnt", "raw":"0", "field_name" : "FAN4_prsnt", "separator":",", "field_pos":"5"}, + { "attr_name":"fan8_present", "bmc_cmd":"ipmitool sdr -c get FAN4_prsnt", "raw":"0", "field_name" : "FAN4_prsnt", "separator":",", "field_pos":"5"}, + { "attr_name":"fan1_input", "bmc_cmd":"ipmitool sensor reading FAN1_Front_rpm", "raw":"0", "field_name" : "FAN1_Front_rpm", "separator":"|", "field_pos":"2", "mult":"1"}, + { "attr_name":"fan2_input", "bmc_cmd":"ipmitool sensor reading FAN1_Rear_rpm", "raw":"0", "field_name" : "FAN1_Rear_rpm", "separator":"|", "field_pos":"2", "mult":"1"}, + { "attr_name":"fan3_input", "bmc_cmd":"ipmitool sensor reading FAN2_Front_rpm", "raw":"0", "field_name" : "FAN2_Front_rpm", "separator":"|", "field_pos":"2", "mult":"1"}, + { "attr_name":"fan4_input", "bmc_cmd":"ipmitool sensor reading FAN2_Rear_rpm", "raw":"0", "field_name" : "FAN2_Rear_rpm", "separator":"|", "field_pos":"2", "mult":"1"}, + { "attr_name":"fan5_input", "bmc_cmd":"ipmitool sensor reading FAN3_Front_rpm", "raw":"0", "field_name" : "FAN3_Front_rpm", "separator":"|", "field_pos":"2", "mult":"1"}, + { "attr_name":"fan6_input", "bmc_cmd":"ipmitool sensor reading FAN3_Rear_rpm", "raw":"0", "field_name" : "FAN3_Rear_rpm", "separator":"|", "field_pos":"2", "mult":"1"}, + { "attr_name":"fan7_input", "bmc_cmd":"ipmitool sensor reading FAN4_Front_rpm", "raw":"0", "field_name" : "FAN4_Front_rpm", "separator":"|", "field_pos":"2", "mult":"1"}, + { "attr_name":"fan8_input", "bmc_cmd":"ipmitool sensor reading FAN4_Rear_rpm", "raw":"0", "field_name" : "FAN4_Rear_rpm", "separator":"|", "field_pos":"2", "mult":"1"}, + { "attr_name":"fan1_pwm", "bmc_cmd":"ipmitool raw 0x38 0x2 0x2 0x4c 0x30 0x1", "raw":"1", "type":"mask", "mask":"0xff"}, + { "attr_name":"fan2_pwm", "bmc_cmd":"ipmitool raw 0x38 0x2 0x2 0x4c 0x40 0x1", "raw":"1", "type":"mask", "mask":"0xff"}, + { "attr_name":"fan3_pwm", "bmc_cmd":"ipmitool raw 0x38 0x2 0x2 0x4c 0x50 0x1", "raw":"1", "type":"mask", "mask":"0xff"}, + { "attr_name":"fan4_pwm", "bmc_cmd":"ipmitool raw 0x38 0x2 0x2 0x4c 0x60 0x1", "raw":"1", "type":"mask", "mask":"0xff"}, + { "attr_name":"fan5_pwm", "bmc_cmd":"ipmitool raw 0x38 0x2 0x2 0x2d 0x30 0x1", "raw":"1", "type":"mask", "mask":"0xff"}, + { "attr_name":"fan6_pwm", "bmc_cmd":"ipmitool raw 0x38 0x2 0x2 0x2d 0x40 0x1", "raw":"1", "type":"mask", "mask":"0xff"}, + { "attr_name":"fan7_pwm", "bmc_cmd":"ipmitool raw 0x38 0x2 0x2 0x2d 0x50 0x1", "raw":"1", "type":"mask", "mask":"0xff"}, + { "attr_name":"fan8_pwm", "bmc_cmd":"ipmitool raw 0x38 0x2 0x2 0x2d 0x60 0x1", "raw":"1", "type":"mask", "mask":"0xff"}, + { "attr_name":"fan1_fault", "bmc_cmd":"ipmitool sdr -c get FAN1_Front_state", "raw":"0", "field_name" : "FAN1_Front_state", "separator":",", "field_pos":"3"}, + { "attr_name":"fan2_fault", "bmc_cmd":"ipmitool sdr -c get FAN1_Front_state", "raw":"0", "field_name" : "FAN1_Front_state", "separator":",", "field_pos":"3"}, + { "attr_name":"fan3_fault", "bmc_cmd":"ipmitool sdr -c get FAN2_Front_state", "raw":"0", "field_name" : "FAN2_Front_state", "separator":",", "field_pos":"3"}, + { "attr_name":"fan4_fault", "bmc_cmd":"ipmitool sdr -c get FAN2_Front_state", "raw":"0", "field_name" : "FAN2_Front_state", "separator":",", "field_pos":"3"}, + { "attr_name":"fan5_fault", "bmc_cmd":"ipmitool sdr -c get FAN3_Front_state", "raw":"0", "field_name" : "FAN3_Front_state", "separator":",", "field_pos":"3"}, + { "attr_name":"fan6_fault", "bmc_cmd":"ipmitool sdr -c get FAN3_Front_state", "raw":"0", "field_name" : "FAN3_Front_state", "separator":",", "field_pos":"3"}, + { "attr_name":"fan7_fault", "bmc_cmd":"ipmitool sdr -c get FAN4_Front_state", "raw":"0", "field_name" : "FAN4_Front_state", "separator":",", "field_pos":"3"}, + { "attr_name":"fan8_fault", "bmc_cmd":"ipmitool sdr -c get FAN4_Front_state", "raw":"0", "field_name" : "FAN4_Front_state", "separator":",", "field_pos":"3"} + ] + } + } + }, + + "TEMP1": + { + "dev_info": { "device_type": "TEMP_SENSOR"}, + "dev_attr": { "display_name": "MB_LEFT"}, + "bmc": { + "ipmitool": { + "attr_list": [ + { "attr_name": "temp1_input", "bmc_cmd": "ipmitool sdr -c get MB_LEFT", "raw": "0", "field_name": "MB_LEFT", "field_pos": "2", "separator": ","}, + { "attr_name": "temp1_high_crit_threshold", "bmc_cmd": "ipmitool sdr -c get MB_LEFT", "raw": "0", "field_name": "MB_LEFT", "field_pos": "12", "separator": ","}, + { "attr_name": "temp1_high_threshold", "bmc_cmd": "ipmitool sdr -c get MB_LEFT", "raw": "0", "field_name": "MB_LEFT", "field_pos": "13", "separator": ","} + ] + } + } + }, + + "TEMP2": + { + "dev_info": { "device_type": "TEMP_SENSOR"}, + "dev_attr": { "display_name": "MB_RIGHT"}, + "bmc": { + "ipmitool": { + "attr_list": [ + { "attr_name": "temp1_input", "bmc_cmd": "ipmitool sdr -c get MB_RIGHT", "raw": "0", "field_name": "MB_RIGHT", "field_pos": "2", "separator": ","}, + { "attr_name": "temp1_high_crit_threshold", "bmc_cmd": "ipmitool sdr -c get MB_RIGHT", "raw": "0", "field_name": "MB_RIGHT", "field_pos": "12", "separator": ","}, + { "attr_name": "temp1_high_threshold", "bmc_cmd": "ipmitool sdr -c get MB_RIGHT", "raw": "0", "field_name": "MB_RIGHT", "field_pos": "13", "separator": ","} + ] + } + } + }, + + "TEMP3": + { + "dev_info": { "device_type": "TEMP_SENSOR"}, + "dev_attr": { "display_name": "MB_NPU"}, + "bmc": { + "ipmitool": { + "attr_list": [ + { "attr_name": "temp1_input", "bmc_cmd": "ipmitool sdr -c get MB_NPU", "raw": "0", "field_name": "MB_NPU", "field_pos": "2", "separator": ","}, + { "attr_name": "temp1_high_crit_threshold", "bmc_cmd": "ipmitool sdr -c get MB_NPU", "raw": "0", "field_name": "MB_NPU", "field_pos": "12", "separator": ","}, + { "attr_name": "temp1_high_threshold", "bmc_cmd": "ipmitool sdr -c get MB_NPU", "raw": "0", "field_name": "MB_NPU", "field_pos": "13", "separator": ","} + ] + } + } + }, + + "TEMP4": + { + "dev_info": { "device_type": "TEMP_SENSOR"}, + "dev_attr": { "display_name": "MB_QSFP"}, + "bmc": { + "ipmitool": { + "attr_list": [ + { "attr_name": "temp1_input", "bmc_cmd": "ipmitool sdr -c get MB_QSFP", "raw": "0", "field_name": "MB_QSFP", "field_pos": "2", "separator": ","}, + { "attr_name": "temp1_high_crit_threshold", "bmc_cmd": "ipmitool sdr -c get MB_QSFP", "raw": "0", "field_name": "MB_QSFP", "field_pos": "12", "separator": ","}, + { "attr_name": "temp1_high_threshold", "bmc_cmd": "ipmitool sdr -c get MB_QSFP", "raw": "0", "field_name": "MB_QSFP", "field_pos": "13", "separator": ","} + ] + } + } + }, + + "TEMP5": + { + "dev_info": { "device_type": "TEMP_SENSOR"}, + "dev_attr": { "display_name": "FAN_LEFT"}, + "bmc": { + "ipmitool": { + "attr_list": [ + { "attr_name": "temp1_input", "bmc_cmd": "ipmitool sdr -c get FAN_LEFT", "raw": "0", "field_name": "FAN_LEFT", "field_pos": "2", "separator": ","}, + { "attr_name": "temp1_high_crit_threshold", "bmc_cmd": "ipmitool sdr -c get FAN_LEFT", "raw": "0", "field_name": "FAN_LEFT", "field_pos": "12", "separator": ","}, + { "attr_name": "temp1_high_threshold", "bmc_cmd": "ipmitool sdr -c get FAN_LEFT", "raw": "0", "field_name": "FAN_LEFT", "field_pos": "13", "separator": ","} + ] + } + } + }, + + "TEMP6": + { + "dev_info": { "device_type": "TEMP_SENSOR"}, + "dev_attr": { "display_name": "FAN_RIGHT"}, + "bmc": { + "ipmitool": { + "attr_list": [ + { "attr_name": "temp1_input", "bmc_cmd": "ipmitool sdr -c get FAN_RIGHT", "raw": "0", "field_name": "FAN_RIGHT", "field_pos": "2", "separator": ","}, + { "attr_name": "temp1_high_crit_threshold", "bmc_cmd": "ipmitool sdr -c get FAN_RIGHT", "raw": "0", "field_name": "FAN_RIGHT", "field_pos": "12", "separator": ","}, + { "attr_name": "temp1_high_threshold", "bmc_cmd": "ipmitool sdr -c get FAN_RIGHT", "raw": "0", "field_name": "FAN_RIGHT", "field_pos": "13", "separator": ","} + ] + } + } + }, + + "TEMP7": + { + "dev_info": { "device_type": "TEMP_SENSOR"}, + "dev_attr": { "display_name": "CPU"}, + "bmc": { + "ipmitool": { + "attr_list": [ + { "attr_name": "temp1_input", "bmc_cmd": "ipmitool sdr -c get CPU", "raw": "0", "field_name": "CPU", "field_pos": "2", "separator": ","} + ] + } + } + }, + + "TEMP8": + { + "dev_info": { "device_type": "TEMP_SENSOR"}, + "dev_attr": { "display_name": "CPU_PECI"}, + "bmc": { + "ipmitool": { + "attr_list": [ + { "attr_name": "temp1_input", "bmc_cmd": "ipmitool sdr -c get CPU_PECI", "raw": "0", "field_name": "CPU_PECI", "field_pos": "2", "separator": ","}, + { "attr_name": "temp1_high_crit_threshold", "bmc_cmd": "ipmitool sdr -c get CPU_PECI", "raw": "0", "field_name": "CPU_PECI", "field_pos": "12", "separator": ","}, + { "attr_name": "temp1_high_threshold", "bmc_cmd": "ipmitool sdr -c get CPU_PECI", "raw": "0", "field_name": "CPU_PECI", "field_pos": "13", "separator": ","} + ] + } + } + } +} + diff --git a/platform/broadcom/saibcm-modules/GPATH b/device/marvell/x86_64-marvell_d64p512t-r0/pddf_support similarity index 100% rename from platform/broadcom/saibcm-modules/GPATH rename to device/marvell/x86_64-marvell_d64p512t-r0/pddf_support diff --git a/device/marvell/x86_64-marvell_d64p512t-r0/platform.json b/device/marvell/x86_64-marvell_d64p512t-r0/platform.json new file mode 100644 index 00000000000..c5d150d69dd --- /dev/null +++ b/device/marvell/x86_64-marvell_d64p512t-r0/platform.json @@ -0,0 +1,1572 @@ +{ + "chassis": { + "name": "x86_64-marvell_d64p512t-r0", + "thermal_manager": true, + "disk":{ + "device": "/dev/nvme0" + }, + "status_led": { + "controllable": false + }, + "components": [ + { + "name": "BIOS" + }, + { + "name": "CPU CPLD" + }, + { + "name": "SSD" + }, + { + "name": "SysFPGA" + }, + { + "name": "BMC" + }, + { + "name": "Port CPLD-A" + }, + { + "name": "Port CPLD-B" + } + ], + "fans": [ + { + "name": "Fantray1_1", + "status_led": { + "controllable": false, + "colors": ["off", "red", "amber", "green"] + }, + "speed": { + "controllable": false, + "minimum": 30, + "maximum": 100 + } + }, + { + "name": "Fantray1_2", + "status_led": { + "controllable": false, + "colors": ["off", "red", "amber", "green"] + }, + "speed": { + "controllable": false, + "minimum": 30, + "maximum": 100 + } + }, + { + "name": "Fantray2_1", + "status_led": { + "controllable": false, + "colors": ["off", "red", "amber", "green"] + }, + "speed": { + "controllable": false, + "minimum": 30, + "maximum": 100 + } + }, + { + "name": "Fantray2_2", + "status_led": { + "controllable": false, + "colors": ["off", "red", "amber", "green"] + }, + "speed": { + "controllable": false, + "minimum": 30, + "maximum": 100 + } + }, + { + "name": "Fantray3_1", + "status_led": { + "controllable": false, + "colors": ["off", "red", "amber", "green"] + }, + "speed": { + "controllable": false, + "minimum": 30, + "maximum": 100 + } + }, + { + "name": "Fantray3_2", + "status_led": { + "controllable": false, + "colors": ["off", "red", "amber", "green"] + }, + "speed": { + "controllable": false, + "minimum": 30, + "maximum": 100 + } + }, + { + "name": "Fantray4_1", + "status_led": { + "controllable": false, + "colors": ["off", "red", "amber", "green"] + }, + "speed": { + "controllable": false, + "minimum": 30, + "maximum": 100 + } + }, + { + "name": "Fantray4_2", + "status_led": { + "controllable": false, + "colors": ["off", "red", "amber", "green"] + }, + "speed": { + "controllable": false, + "minimum": 30, + "maximum": 100 + } + } + ], + "fan_drawers":[ + { + "name": "Fantray1", + "num_fans" : 2, + "status_led": { + "controllable": false, + "colors": ["off", "amber", "green"] + }, + "fans": [ + { + "name": "Fantray1_1", + "status_led": { + "controllable": false + }, + "speed": { + "controllable": false + } + }, + { + "name": "Fantray1_2", + "status_led": { + "controllable": false + }, + "speed": { + "controllable": false + } + } + ] + }, + { + "name": "Fantray2", + "num_fans" : 2, + "status_led": { + "controllable": false, + "colors": ["off", "amber", "green"] + }, + "fans": [ + { + "name": "Fantray2_1", + "status_led": { + "controllable": false + }, + "speed": { + "controllable": false + } + }, + { + "name": "Fantray2_2", + "status_led": { + "controllable": false + }, + "speed": { + "controllable": false + } + } + ] + }, + { + "name": "Fantray3", + "num_fans" : 2, + "status_led": { + "controllable": false, + "colors": ["off", "amber", "green"] + }, + "fans": [ + { + "name": "Fantray3_1", + "status_led": { + "controllable": false + }, + "speed": { + "controllable": false + } + }, + { + "name": "Fantray3_2", + "status_led": { + "controllable": false + }, + "speed": { + "controllable": false + } + } + ] + }, + { + "name": "Fantray4", + "num_fans" : 2, + "status_led": { + "controllable": false, + "colors": ["off", "amber", "green"] + }, + "fans": [ + { + "name": "Fantray4_1", + "status_led": { + "controllable": false + }, + "speed": { + "controllable": false + } + }, + { + "name": "Fantray4_2", + "status_led": { + "controllable": false + }, + "speed": { + "controllable": false + } + } + ] + } + ], + "psus": [ + { + "name": "PSU1", + "status_led": { + "controllable": false, + "colors": ["off", "amber", "green"] + }, + "fans": [ + { + "name": "PSU1_FAN1", + "status_led": { + "available" : false + }, + + "speed": { + "controllable": false, + "minimum": 20, + "maximum": 100 + } + } + ] + }, + { + "name": "PSU2", + "status_led": { + "controllable": false, + "colors": ["off", "amber", "green"] + }, + "fans": [ + { + "name": "PSU2_FAN1", + "status_led": { + "available" : false + }, + + "speed": { + "controllable": false, + "minimum": 20, + "maximum": 100 + } + } + ] + } + ], + "thermals": [ + { + "name": "MB_LEFT", + "controllable": false + }, + { + "name": "MB_NPU", + "controllable": false + }, + { + "name": "MB_QSFP", + "controllable": false + }, + { + "name": "MB_RIGHT", + "controllable": false + }, + { + "name": "FAN_LEFT", + "controllable": false + }, + { + "name": "FAN_RIGHT", + "controllable": false + }, + { + "name": "CPU", + "controllable": false, + "low-crit-threshold": false, + "high-crit-threshold": false, + "low-threshold": false, + "high-threshold": false, + "minimum-recorded": false, + "maximum-recorded": false + }, + { + "name": "CPU_PECI", + "controllable": false + } + ], + "modules": [], + "sfps": [ + { + "name": "PORT1", + "thermals": [ + { + "name": "OSFP module 1 Temp" + } + ] + }, + { + "name": "PORT2", + "thermals": [ + { + "name": "OSFP module 2 Temp" + } + ] + }, + { + "name": "PORT3", + "thermals": [ + { + "name": "OSFP module 3 Temp" + } + ] + }, + { + "name": "PORT4", + "thermals": [ + { + "name": "OSFP module 4 Temp" + } + ] + }, + { + "name": "PORT5", + "thermals": [ + { + "name": "OSFP module 5 Temp" + } + ] + }, + { + "name": "PORT6", + "thermals": [ + { + "name": "OSFP module 6 Temp" + } + ] + }, + { + "name": "PORT7", + "thermals": [ + { + "name": "OSFP module 7 Temp" + } + ] + }, + { + "name": "PORT8", + "thermals": [ + { + "name": "OSFP module 8 Temp" + } + ] + }, + { + "name": "PORT9", + "thermals": [ + { + "name": "OSFP module 9 Temp" + } + ] + }, + { + "name": "PORT10", + "thermals": [ + { + "name": "OSFP module 10 Temp" + } + ] + }, + { + "name": "PORT11", + "thermals": [ + { + "name": "OSFP module 11 Temp" + } + ] + }, + { + "name": "PORT12", + "thermals": [ + { + "name": "OSFP module 12 Temp" + } + ] + }, + { + "name": "PORT13", + "thermals": [ + { + "name": "OSFP module 13 Temp" + } + ] + }, + { + "name": "PORT14", + "thermals": [ + { + "name": "OSFP module 14 Temp" + } + ] + }, + { + "name": "PORT15", + "thermals": [ + { + "name": "OSFP module 15 Temp" + } + ] + }, + { + "name": "PORT16", + "thermals": [ + { + "name": "OSFP module 16 Temp" + } + ] + }, + { + "name": "PORT17", + "thermals": [ + { + "name": "OSFP module 17 Temp" + } + ] + }, + { + "name": "PORT18", + "thermals": [ + { + "name": "OSFP module 18 Temp" + } + ] + }, + { + "name": "PORT19", + "thermals": [ + { + "name": "OSFP module 19 Temp" + } + ] + }, + { + "name": "PORT20", + "thermals": [ + { + "name": "OSFP module 20 Temp" + } + ] + }, + { + "name": "PORT21", + "thermals": [ + { + "name": "OSFP module 21 Temp" + } + ] + }, + { + "name": "PORT22", + "thermals": [ + { + "name": "OSFP module 22 Temp" + } + ] + }, + { + "name": "PORT23", + "thermals": [ + { + "name": "OSFP module 23 Temp" + } + ] + }, + { + "name": "PORT24", + "thermals": [ + { + "name": "OSFP module 24 Temp" + } + ] + }, + { + "name": "PORT25", + "thermals": [ + { + "name": "OSFP module 25 Temp" + } + ] + }, + { + "name": "PORT26", + "thermals": [ + { + "name": "OSFP module 26 Temp" + } + ] + }, + { + "name": "PORT27", + "thermals": [ + { + "name": "OSFP module 27 Temp" + } + ] + }, + { + "name": "PORT28", + "thermals": [ + { + "name": "OSFP module 28 Temp" + } + ] + }, + { + "name": "PORT29", + "thermals": [ + { + "name": "OSFP module 29 Temp" + } + ] + }, + { + "name": "PORT30", + "thermals": [ + { + "name": "OSFP module 30 Temp" + } + ] + }, + { + "name": "PORT31", + "thermals": [ + { + "name": "OSFP module 31 Temp" + } + ] + }, + { + "name": "PORT32", + "thermals": [ + { + "name": "OSFP module 32 Temp" + } + ] + }, + { + "name": "PORT33", + "thermals": [ + { + "name": "OSFP module 33 Temp" + } + ] + }, + { + "name": "PORT34", + "thermals": [ + { + "name": "OSFP module 34 Temp" + } + ] + }, + { + "name": "PORT35", + "thermals": [ + { + "name": "OSFP module 35 Temp" + } + ] + }, + { + "name": "PORT36", + "thermals": [ + { + "name": "OSFP module 36 Temp" + } + ] + }, + { + "name": "PORT37", + "thermals": [ + { + "name": "OSFP module 37 Temp" + } + ] + }, + { + "name": "PORT38", + "thermals": [ + { + "name": "OSFP module 38 Temp" + } + ] + }, + { + "name": "PORT39", + "thermals": [ + { + "name": "OSFP module 39 Temp" + } + ] + }, + { + "name": "PORT40", + "thermals": [ + { + "name": "OSFP module 40 Temp" + } + ] + }, + { + "name": "PORT41", + "thermals": [ + { + "name": "OSFP module 41 Temp" + } + ] + }, + { + "name": "PORT42", + "thermals": [ + { + "name": "OSFP module 42 Temp" + } + ] + }, + { + "name": "PORT43", + "thermals": [ + { + "name": "OSFP module 43 Temp" + } + ] + }, + { + "name": "PORT44", + "thermals": [ + { + "name": "OSFP module 44 Temp" + } + ] + }, + { + "name": "PORT45", + "thermals": [ + { + "name": "OSFP module 45 Temp" + } + ] + }, + { + "name": "PORT46", + "thermals": [ + { + "name": "OSFP module 46 Temp" + } + ] + }, + { + "name": "PORT47", + "thermals": [ + { + "name": "OSFP module 47 Temp" + } + ] + }, + { + "name": "PORT48", + "thermals": [ + { + "name": "OSFP module 48 Temp" + } + ] + }, + { + "name": "PORT49", + "thermals": [ + { + "name": "OSFP module 49 Temp" + } + ] + }, + { + "name": "PORT50", + "thermals": [ + { + "name": "OSFP module 50 Temp" + } + ] + }, + { + "name": "PORT51", + "thermals": [ + { + "name": "OSFP module 51 Temp" + } + ] + }, + { + "name": "PORT52", + "thermals": [ + { + "name": "OSFP module 52 Temp" + } + ] + }, + { + "name": "PORT53", + "thermals": [ + { + "name": "OSFP module 53 Temp" + } + ] + }, + { + "name": "PORT54", + "thermals": [ + { + "name": "OSFP module 54 Temp" + } + ] + }, + { + "name": "PORT55", + "thermals": [ + { + "name": "OSFP module 55 Temp" + } + ] + }, + { + "name": "PORT56", + "thermals": [ + { + "name": "OSFP module 56 Temp" + } + ] + }, + { + "name": "PORT57", + "thermals": [ + { + "name": "OSFP module 57 Temp" + } + ] + }, + { + "name": "PORT58", + "thermals": [ + { + "name": "OSFP module 58 Temp" + } + ] + }, + { + "name": "PORT59", + "thermals": [ + { + "name": "OSFP module 59 Temp" + } + ] + }, + { + "name": "PORT60", + "thermals": [ + { + "name": "OSFP module 60 Temp" + } + ] + }, + { + "name": "PORT61", + "thermals": [ + { + "name": "OSFP module 61 Temp" + } + ] + }, + { + "name": "PORT62", + "thermals": [ + { + "name": "OSFP module 62 Temp" + } + ] + }, + { + "name": "PORT63", + "thermals": [ + { + "name": "OSFP module 63 Temp" + } + ] + }, + { + "name": "PORT64", + "thermals": [ + { + "name": "OSFP module 64 Temp" + } + ] + }, + { + "name": "PORT65" + }, + { + "name": "PORT66" + } + ] + }, + "interfaces": { + "Ethernet0": { + "breakout_modes": { + "1x800G[400G,200G]": ["etp1"], + "2x400G[200G,100G]": ["etp1a", "etp1b"], + "4x200G[100G,50G]": ["etp1a", "etp1b", "etp1c", "etp1d"], + "8x100G[50G]": ["etp1a", "etp1b", "etp1c", "etp1d", "etp1e", "etp1f", "etp1g", "etp1h"], + "8x25G": ["etp1a", "etp1b", "etp1c", "etp1d", "etp1e", "etp1f", "etp1g", "etp1h"] + }, + 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"1x800G[400G,200G]": ["etp11"], + "2x400G[200G,100G]": ["etp11a", "etp11b"], + "4x200G[100G,50G]": ["etp11a", "etp11b", "etp11c", "etp11d"], + "8x100G[50G]": ["etp11a", "etp11b", "etp11c", "etp11d", "etp11e", "etp11f", "etp11g", "etp11h"], + "8x25G": ["etp11a", "etp11b", "etp11c", "etp11d", "etp11e", "etp11f", "etp11g", "etp11h"] + }, + "index": "10,10,10,10,10,10,10,10", + "lanes": "81,82,83,84,85,86,87,88" + }, + "Ethernet88": { + "breakout_modes": { + "1x800G[400G,200G]": ["etp12"], + "2x400G[200G,100G]": ["etp12a", "etp12b"], + "4x200G[100G,50G]": ["etp12a", "etp12b", "etp12c", "etp12d"], + "8x100G[50G]": ["etp12a", "etp12b", "etp12c", "etp12d", "etp12e", "etp12f", "etp12g", "etp12h"], + "8x25G": ["etp12a", "etp12b", "etp12c", "etp12d", "etp12e", "etp12f", "etp12g", "etp12h"] + }, + "index": "11,11,11,11,11,11,11,11", + "lanes": "65,66,67,68,69,70,71,72" + }, + "Ethernet96": { + "breakout_modes": { + "1x800G[400G,200G]": ["etp13"], + "2x400G[200G,100G]": ["etp13a", "etp13b"], + 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"etp19c", "etp19d", "etp19e", "etp19f", "etp19g", "etp19h"] + }, + "index": "18,18,18,18,18,18,18,18", + "lanes": "153,154,155,156,157,158,159,160" + }, + "Ethernet152": { + "breakout_modes": { + "1x800G[400G,200G]": ["etp20"], + "2x400G[200G,100G]": ["etp20a", "etp20b"], + "4x200G[100G,50G]": ["etp20a", "etp20b", "etp20c", "etp20d"], + "8x100G[50G]": ["etp20a", "etp20b", "etp20c", "etp20d", "etp20e", "etp20f", "etp20g", "etp20h"], + "8x25G": ["etp20a", "etp20b", "etp20c", "etp20d", "etp20e", "etp20f", "etp20g", "etp20h"] + }, + "index": "19,19,19,19,19,19,19,19", + "lanes": "137,138,139,140,141,142,143,144" + }, + "Ethernet160": { + "breakout_modes": { + "1x800G[400G,200G]": ["etp21"], + "2x400G[200G,100G]": ["etp21a", "etp21b"], + "4x200G[100G,50G]": ["etp21a", "etp21b", "etp21c", "etp21d"], + "8x100G[50G]": ["etp21a", "etp21b", "etp21c", "etp21d", "etp21e", "etp21f", "etp21g", "etp21h"], + "8x25G": ["etp21a", "etp21b", "etp21c", "etp21d", "etp21e", "etp21f", "etp21g", "etp21h"] + }, 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"breakout_modes": { + "1x800G[400G,200G]": ["etp26"], + "2x400G[200G,100G]": ["etp26a", "etp26b"], + "4x200G[100G,50G]": ["etp26a", "etp26b", "etp26c", "etp26d"], + "8x100G[50G]": ["etp26a", "etp26b", "etp26c", "etp26d", "etp26e", "etp26f", "etp26g", "etp26h"], + "8x25G": ["etp26a", "etp26b", "etp26c", "etp26d", "etp26e", "etp26f", "etp26g", "etp26h"] + }, + "index": "25,25,25,25,25,25,25,25", + "lanes": "201,202,203,204,205,206,207,208" + }, + "Ethernet208": { + "breakout_modes": { + "1x800G[400G,200G]": ["etp27"], + "2x400G[200G,100G]": ["etp27a", "etp27b"], + "4x200G[100G,50G]": ["etp27a", "etp27b", "etp27c", "etp27d"], + "8x100G[50G]": ["etp27a", "etp27b", "etp27c", "etp27d", "etp27e", "etp27f", "etp27g", "etp27h"], + "8x25G": ["etp27a", "etp27b", "etp27c", "etp27d", "etp27e", "etp27f", "etp27g", "etp27h"] + }, + "index": "26,26,26,26,26,26,26,26", + "lanes": "233,234,235,236,237,238,239,240" + }, + "Ethernet216": { + "breakout_modes": { + "1x800G[400G,200G]": ["etp28"], + "2x400G[200G,100G]": ["etp28a", "etp28b"], + "4x200G[100G,50G]": ["etp28a", "etp28b", "etp28c", "etp28d"], + "8x100G[50G]": ["etp28a", "etp28b", "etp28c", "etp28d", "etp28e", "etp28f", "etp28g", "etp28h"], + "8x25G": ["etp28a", "etp28b", "etp28c", "etp28d", "etp28e", "etp28f", "etp28g", "etp28h"] + }, + "index": "27,27,27,27,27,27,27,27", + "lanes": "209,210,211,212,213,214,215,216" + }, + "Ethernet224": { + "breakout_modes": { + "1x800G[400G,200G]": ["etp29"], + "2x400G[200G,100G]": ["etp29a", "etp29b"], + "4x200G[100G,50G]": ["etp29a", "etp29b", "etp29c", "etp29d"], + "8x100G[50G]": ["etp29a", "etp29b", "etp29c", "etp29d", "etp29e", "etp29f", "etp29g", "etp29h"], + "8x25G": ["etp29a", "etp29b", "etp29c", "etp29d", "etp29e", "etp29f", "etp29g", "etp29h"] + }, + "index": "28,28,28,28,28,28,28,28", + "lanes": "225,226,227,228,229,230,231,232" + }, + "Ethernet232": { + "breakout_modes": { + "1x800G[400G,200G]": ["etp30"], + "2x400G[200G,100G]": ["etp30a", "etp30b"], + "4x200G[100G,50G]": ["etp30a", "etp30b", "etp30c", "etp30d"], + "8x100G[50G]": ["etp30a", "etp30b", "etp30c", "etp30d", "etp30e", "etp30f", "etp30g", "etp30h"], + "8x25G": ["etp30a", "etp30b", "etp30c", "etp30d", "etp30e", "etp30f", "etp30g", "etp30h"] + }, + "index": "29,29,29,29,29,29,29,29", + "lanes": "249,250,251,252,253,254,255,256" + }, + "Ethernet240": { + "breakout_modes": { + "1x800G[400G,200G]": ["etp31"], + "2x400G[200G,100G]": ["etp31a", "etp31b"], + "4x200G[100G,50G]": ["etp31a", "etp31b", "etp31c", "etp31d"], + "8x100G[50G]": ["etp31a", "etp31b", "etp31c", "etp31d", "etp31e", "etp31f", "etp31g", "etp31h"], + "8x25G": ["etp31a", "etp31b", "etp31c", "etp31d", "etp31e", "etp31f", "etp31g", "etp31h"] + }, + "index": "30,30,30,30,30,30,30,30", + "lanes": "241,242,243,244,245,246,247,248" + }, + "Ethernet248": { + "breakout_modes": { + "1x800G[400G,200G]": ["etp32"], + "2x400G[200G,100G]": ["etp32a", "etp32b"], + "4x200G[100G,50G]": ["etp32a", "etp32b", "etp32c", "etp32d"], + "8x100G[50G]": ["etp32a", "etp32b", "etp32c", "etp32d", "etp32e", "etp32f", "etp32g", "etp32h"], + "8x25G": ["etp32a", "etp32b", "etp32c", "etp32d", "etp32e", "etp32f", "etp32g", "etp32h"] + }, + "index": "31,31,31,31,31,31,31,31", + "lanes": "217,218,219,220,221,222,223,224" + }, + "Ethernet256": { + "breakout_modes": { + "1x800G[400G,200G]": ["etp33"], + "2x400G[200G,100G]": ["etp33a", "etp33b"], + "4x200G[100G,50G]": ["etp33a", "etp33b", "etp33c", "etp33d"], + "8x100G[50G]": ["etp33a", "etp33b", "etp33c", "etp33d", "etp33e", "etp33f", "etp33g", "etp33h"], + "8x25G": ["etp33a", "etp33b", "etp33c", "etp33d", "etp33e", "etp33f", "etp33g", "etp33h"] + }, + "index": "32,32,32,32,32,32,32,32", + "lanes": "257,258,259,260,261,262,263,264" + }, + "Ethernet264": { + "breakout_modes": { + "1x800G[400G,200G]": ["etp34"], + "2x400G[200G,100G]": ["etp34a", "etp34b"], + "4x200G[100G,50G]": ["etp34a", "etp34b", "etp34c", "etp34d"], + "8x100G[50G]": ["etp34a", "etp34b", "etp34c", "etp34d", "etp34e", "etp34f", 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"etp36d", "etp36e", "etp36f", "etp36g", "etp36h"] + }, + "index": "35,35,35,35,35,35,35,35", + "lanes": "265,266,267,268,269,270,271,272" + }, + "Ethernet288": { + "breakout_modes": { + "1x800G[400G,200G]": ["etp37"], + "2x400G[200G,100G]": ["etp37a", "etp37b"], + "4x200G[100G,50G]": ["etp37a", "etp37b", "etp37c", "etp37d"], + "8x100G[50G]": ["etp37a", "etp37b", "etp37c", "etp37d", "etp37e", "etp37f", "etp37g", "etp37h"], + "8x25G": ["etp37a", "etp37b", "etp37c", "etp37d", "etp37e", "etp37f", "etp37g", "etp37h"] + }, + "index": "36,36,36,36,36,36,36,36", + "lanes": "305,306,307,308,309,310,311,312" + }, + "Ethernet296": { + "breakout_modes": { + "1x800G[400G,200G]": ["etp38"], + "2x400G[200G,100G]": ["etp38a", "etp38b"], + "4x200G[100G,50G]": ["etp38a", "etp38b", "etp38c", "etp38d"], + "8x100G[50G]": ["etp38a", "etp38b", "etp38c", "etp38d", "etp38e", "etp38f", "etp38g", "etp38h"], + "8x25G": ["etp38a", "etp38b", "etp38c", "etp38d", "etp38e", "etp38f", "etp38g", "etp38h"] + }, + "index": "37,37,37,37,37,37,37,37", + "lanes": "321,322,323,324,325,326,327,328" + }, + "Ethernet304": { + "breakout_modes": { + "1x800G[400G,200G]": ["etp39"], + "2x400G[200G,100G]": ["etp39a", "etp39b"], + "4x200G[100G,50G]": ["etp39a", "etp39b", "etp39c", "etp39d"], + "8x100G[50G]": ["etp39a", "etp39b", "etp39c", "etp39d", "etp39e", "etp39f", "etp39g", "etp39h"], + "8x25G": ["etp39a", "etp39b", "etp39c", "etp39d", "etp39e", "etp39f", "etp39g", "etp39h"] + }, + "index": "38,38,38,38,38,38,38,38", + "lanes": "297,298,299,300,301,302,303,304" + }, + "Ethernet312": { + "breakout_modes": { + "1x800G[400G,200G]": ["etp40"], + "2x400G[200G,100G]": ["etp40a", "etp40b"], + "4x200G[100G,50G]": ["etp40a", "etp40b", "etp40c", "etp40d"], + "8x100G[50G]": ["etp40a", "etp40b", "etp40c", "etp40d", "etp40e", "etp40f", "etp40g", "etp40h"], + "8x25G": ["etp40a", "etp40b", "etp40c", "etp40d", "etp40e", "etp40f", "etp40g", "etp40h"] + }, + "index": "39,39,39,39,39,39,39,39", + "lanes": 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"breakout_modes": { + "1x800G[400G,200G]": ["etp43"], + "2x400G[200G,100G]": ["etp43a", "etp43b"], + "4x200G[100G,50G]": ["etp43a", "etp43b", "etp43c", "etp43d"], + "8x100G[50G]": ["etp43a", "etp43b", "etp43c", "etp43d", "etp43e", "etp43f", "etp43g", "etp43h"], + "8x25G": ["etp43a", "etp43b", "etp43c", "etp43d", "etp43e", "etp43f", "etp43g", "etp43h"] + }, + "index": "42,42,42,42,42,42,42,42", + "lanes": "361,362,363,364,365,366,367,368" + }, + "Ethernet344": { + "breakout_modes": { + "1x800G[400G,200G]": ["etp44"], + "2x400G[200G,100G]": ["etp44a", "etp44b"], + "4x200G[100G,50G]": ["etp44a", "etp44b", "etp44c", "etp44d"], + "8x100G[50G]": ["etp44a", "etp44b", "etp44c", "etp44d", "etp44e", "etp44f", "etp44g", "etp44h"], + "8x25G": ["etp44a", "etp44b", "etp44c", "etp44d", "etp44e", "etp44f", "etp44g", "etp44h"] + }, + "index": "43,43,43,43,43,43,43,43", + "lanes": "337,338,339,340,341,342,343,344" + }, + "Ethernet352": { + "breakout_modes": { + "1x800G[400G,200G]": ["etp45"], + "2x400G[200G,100G]": ["etp45a", "etp45b"], + "4x200G[100G,50G]": ["etp45a", "etp45b", "etp45c", "etp45d"], + "8x100G[50G]": ["etp45a", "etp45b", "etp45c", "etp45d", "etp45e", "etp45f", "etp45g", "etp45h"], + "8x25G": ["etp45a", "etp45b", "etp45c", "etp45d", "etp45e", "etp45f", "etp45g", "etp45h"] + }, + "index": "44,44,44,44,44,44,44,44", + "lanes": "353,354,355,356,357,358,359,360" + }, + "Ethernet360": { + "breakout_modes": { + "1x800G[400G,200G]": ["etp46"], + "2x400G[200G,100G]": ["etp46a", "etp46b"], + "4x200G[100G,50G]": ["etp46a", "etp46b", "etp46c", "etp46d"], + "8x100G[50G]": ["etp46a", "etp46b", "etp46c", "etp46d", "etp46e", "etp46f", "etp46g", "etp46h"], + "8x25G": ["etp46a", "etp46b", "etp46c", "etp46d", "etp46e", "etp46f", "etp46g", "etp46h"] + }, + "index": "45,45,45,45,45,45,45,45", + "lanes": "369,370,371,372,373,374,375,376" + }, + "Ethernet368": { + "breakout_modes": { + "1x800G[400G,200G]": ["etp47"], + "2x400G[200G,100G]": ["etp47a", "etp47b"], + "4x200G[100G,50G]": ["etp47a", "etp47b", "etp47c", "etp47d"], + "8x100G[50G]": ["etp47a", "etp47b", "etp47c", "etp47d", "etp47e", "etp47f", "etp47g", "etp47h"], + "8x25G": ["etp47a", "etp47b", "etp47c", "etp47d", "etp47e", "etp47f", "etp47g", "etp47h"] + }, + "index": "46,46,46,46,46,46,46,46", + "lanes": "377,378,379,380,381,382,383,384" + }, + "Ethernet376": { + "breakout_modes": { + "1x800G[400G,200G]": ["etp48"], + "2x400G[200G,100G]": ["etp48a", "etp48b"], + "4x200G[100G,50G]": ["etp48a", "etp48b", "etp48c", "etp48d"], + "8x100G[50G]": ["etp48a", "etp48b", "etp48c", "etp48d", "etp48e", "etp48f", "etp48g", "etp48h"], + "8x25G": ["etp48a", "etp48b", "etp48c", "etp48d", "etp48e", "etp48f", "etp48g", "etp48h"] + }, + "index": "47,47,47,47,47,47,47,47", + "lanes": "345,346,347,348,349,350,351,352" + }, + "Ethernet384": { + "breakout_modes": { + "1x800G[400G,200G]": ["etp49"], + "2x400G[200G,100G]": ["etp49a", "etp49b"], + "4x200G[100G,50G]": ["etp49a", "etp49b", "etp49c", "etp49d"], + "8x100G[50G]": ["etp49a", "etp49b", "etp49c", "etp49d", "etp49e", "etp49f", "etp49g", "etp49h"], + "8x25G": ["etp49a", "etp49b", "etp49c", "etp49d", "etp49e", "etp49f", "etp49g", "etp49h"] + }, + "index": "48,48,48,48,48,48,48,48", + "lanes": "385,386,387,388,389,390,391,392" + }, + "Ethernet392": { + "breakout_modes": { + "1x800G[400G,200G]": ["etp50"], + "2x400G[200G,100G]": ["etp50a", "etp50b"], + "4x200G[100G,50G]": ["etp50a", "etp50b", "etp50c", "etp50d"], + "8x100G[50G]": ["etp50a", "etp50b", "etp50c", "etp50d", "etp50e", "etp50f", "etp50g", "etp50h"], + "8x25G": ["etp50a", "etp50b", "etp50c", "etp50d", "etp50e", "etp50f", "etp50g", "etp50h"] + }, + "index": "49,49,49,49,49,49,49,49", + "lanes": "401,402,403,404,405,406,407,408" + }, + "Ethernet400": { + "breakout_modes": { + "1x800G[400G,200G]": ["etp51"], + "2x400G[200G,100G]": ["etp51a", "etp51b"], + "4x200G[100G,50G]": ["etp51a", "etp51b", "etp51c", "etp51d"], + "8x100G[50G]": ["etp51a", "etp51b", "etp51c", "etp51d", "etp51e", "etp51f", "etp51g", "etp51h"], + "8x25G": ["etp51a", "etp51b", "etp51c", "etp51d", "etp51e", "etp51f", "etp51g", "etp51h"] + }, + "index": "50,50,50,50,50,50,50,50", + "lanes": "409,410,411,412,413,414,415,416" + }, + "Ethernet408": { + "breakout_modes": { + "1x800G[400G,200G]": ["etp52"], + "2x400G[200G,100G]": ["etp52a", "etp52b"], + "4x200G[100G,50G]": ["etp52a", "etp52b", "etp52c", "etp52d"], + "8x100G[50G]": ["etp52a", "etp52b", "etp52c", "etp52d", "etp52e", "etp52f", "etp52g", "etp52h"], + "8x25G": ["etp52a", "etp52b", "etp52c", "etp52d", "etp52e", "etp52f", "etp52g", "etp52h"] + }, + "index": "51,51,51,51,51,51,51,51", + "lanes": "393,394,395,396,397,398,399,400" + }, + "Ethernet416": { + "breakout_modes": { + "1x800G[400G,200G]": ["etp53"], + "2x400G[200G,100G]": ["etp53a", "etp53b"], + "4x200G[100G,50G]": ["etp53a", "etp53b", "etp53c", "etp53d"], + "8x100G[50G]": ["etp53a", "etp53b", "etp53c", "etp53d", "etp53e", "etp53f", "etp53g", "etp53h"], + "8x25G": ["etp53a", "etp53b", "etp53c", "etp53d", "etp53e", "etp53f", "etp53g", "etp53h"] + }, + "index": "52,52,52,52,52,52,52,52", + "lanes": "417,418,419,420,421,422,423,424" + }, + "Ethernet424": { + "breakout_modes": { + "1x800G[400G,200G]": ["etp54"], + "2x400G[200G,100G]": ["etp54a", "etp54b"], + "4x200G[100G,50G]": ["etp54a", "etp54b", "etp54c", "etp54d"], + "8x100G[50G]": ["etp54a", "etp54b", "etp54c", "etp54d", "etp54e", "etp54f", "etp54g", "etp54h"], + "8x25G": ["etp54a", "etp54b", "etp54c", "etp54d", "etp54e", "etp54f", "etp54g", "etp54h"] + }, + "index": "53,53,53,53,53,53,53,53", + "lanes": "433,434,435,436,437,438,439,440" + }, + "Ethernet432": { + "breakout_modes": { + "1x800G[400G,200G]": ["etp55"], + "2x400G[200G,100G]": ["etp55a", "etp55b"], + "4x200G[100G,50G]": ["etp55a", "etp55b", "etp55c", "etp55d"], + "8x100G[50G]": ["etp55a", "etp55b", "etp55c", "etp55d", "etp55e", "etp55f", "etp55g", "etp55h"], + "8x25G": ["etp55a", "etp55b", "etp55c", "etp55d", "etp55e", "etp55f", "etp55g", "etp55h"] + }, + "index": "54,54,54,54,54,54,54,54", + "lanes": "441,442,443,444,445,446,447,448" + }, + "Ethernet440": { + "breakout_modes": { + "1x800G[400G,200G]": ["etp56"], + "2x400G[200G,100G]": ["etp56a", "etp56b"], + "4x200G[100G,50G]": ["etp56a", "etp56b", "etp56c", "etp56d"], + "8x100G[50G]": ["etp56a", "etp56b", "etp56c", "etp56d", "etp56e", "etp56f", "etp56g", "etp56h"], + "8x25G": ["etp56a", "etp56b", "etp56c", "etp56d", "etp56e", "etp56f", "etp56g", "etp56h"] + }, + "index": "55,55,55,55,55,55,55,55", + "lanes": "425,426,427,428,429,430,431,432" + }, + "Ethernet448": { + "breakout_modes": { + "1x800G[400G,200G]": ["etp57"], + "2x400G[200G,100G]": ["etp57a", "etp57b"], + "4x200G[100G,50G]": ["etp57a", "etp57b", "etp57c", "etp57d"], + "8x100G[50G]": ["etp57a", "etp57b", "etp57c", "etp57d", "etp57e", "etp57f", "etp57g", "etp57h"], + "8x25G": ["etp57a", "etp57b", "etp57c", "etp57d", "etp57e", "etp57f", "etp57g", "etp57h"] + }, + "index": "56,56,56,56,56,56,56,56", + "lanes": "449,450,451,452,453,454,455,456" + }, + "Ethernet456": { + "breakout_modes": { + "1x800G[400G,200G]": ["etp58"], + "2x400G[200G,100G]": ["etp58a", "etp58b"], + "4x200G[100G,50G]": ["etp58a", "etp58b", "etp58c", "etp58d"], + "8x100G[50G]": ["etp58a", "etp58b", "etp58c", "etp58d", "etp58e", "etp58f", "etp58g", "etp58h"], + "8x25G": ["etp58a", "etp58b", "etp58c", "etp58d", "etp58e", "etp58f", "etp58g", "etp58h"] + }, + "index": "57,57,57,57,57,57,57,57", + "lanes": "473,474,475,476,477,478,479,480" + }, + "Ethernet464": { + "breakout_modes": { + "1x800G[400G,200G]": ["etp59"], + "2x400G[200G,100G]": ["etp59a", "etp59b"], + "4x200G[100G,50G]": ["etp59a", "etp59b", "etp59c", "etp59d"], + "8x100G[50G]": ["etp59a", "etp59b", "etp59c", "etp59d", "etp59e", "etp59f", "etp59g", "etp59h"], + "8x25G": ["etp59a", "etp59b", "etp59c", "etp59d", "etp59e", "etp59f", "etp59g", "etp59h"] + }, + "index": "58,58,58,58,58,58,58,58", + "lanes": "465,466,467,468,469,470,471,472" + }, + "Ethernet472": { + "breakout_modes": { + "1x800G[400G,200G]": ["etp60"], + "2x400G[200G,100G]": ["etp60a", "etp60b"], + "4x200G[100G,50G]": ["etp60a", "etp60b", "etp60c", "etp60d"], + "8x100G[50G]": ["etp60a", "etp60b", "etp60c", "etp60d", "etp60e", "etp60f", "etp60g", "etp60h"], + "8x25G": ["etp60a", "etp60b", "etp60c", "etp60d", "etp60e", "etp60f", "etp60g", "etp60h"] + }, + "index": "59,59,59,59,59,59,59,59", + "lanes": "457,458,459,460,461,462,463,464" + }, + "Ethernet480": { + "breakout_modes": { + "1x800G[400G,200G]": ["etp61"], + "2x400G[200G,100G]": ["etp61a", "etp61b"], + "4x200G[100G,50G]": ["etp61a", "etp61b", "etp61c", "etp61d"], + "8x100G[50G]": ["etp61a", "etp61b", "etp61c", "etp61d", "etp61e", "etp61f", "etp61g", "etp61h"], + "8x25G": ["etp61a", "etp61b", "etp61c", "etp61d", "etp61e", "etp61f", "etp61g", "etp61h"] + }, + "index": "60,60,60,60,60,60,60,60", + "lanes": "489,490,491,492,493,494,495,496" + }, + "Ethernet488": { + "breakout_modes": { + "1x800G[400G,200G]": ["etp62"], + "2x400G[200G,100G]": ["etp62a", "etp62b"], + "4x200G[100G,50G]": ["etp62a", "etp62b", "etp62c", "etp62d"], + "8x100G[50G]": ["etp62a", "etp62b", "etp62c", "etp62d", "etp62e", "etp62f", "etp62g", "etp62h"], + "8x25G": ["etp62a", "etp62b", "etp62c", "etp62d", "etp62e", "etp62f", "etp62g", "etp62h"] + }, + "index": "61,61,61,61,61,61,61,61", + "lanes": "505,506,507,508,509,510,511,512" + }, + "Ethernet496": { + "breakout_modes": { + "1x800G[400G,200G]": ["etp63"], + "2x400G[200G,100G]": ["etp63a", "etp63b"], + "4x200G[100G,50G]": ["etp63a", "etp63b", "etp63c", "etp63d"], + "8x100G[50G]": ["etp63a", "etp63b", "etp63c", "etp63d", "etp63e", "etp63f", "etp63g", "etp63h"], + "8x25G": ["etp63a", "etp63b", "etp63c", "etp63d", "etp63e", "etp63f", "etp63g", "etp63h"] + }, + "index": "62,62,62,62,62,62,62,62", + "lanes": "497,498,499,500,501,502,503,504" + }, + "Ethernet504": { + "breakout_modes": { + "1x800G[400G,200G]": ["etp64"], + "2x400G[200G,100G]": ["etp64a", "etp64b"], + "4x200G[100G,50G]": ["etp64a", "etp64b", "etp64c", "etp64d"], + "8x100G[50G]": ["etp64a", "etp64b", "etp64c", "etp64d", "etp64e", "etp64f", "etp64g", "etp64h"], + "8x25G": ["etp64a", "etp64b", "etp64c", "etp64d", "etp64e", "etp64f", "etp64g", "etp64h"] + }, + "index": "63,63,63,63,63,63,63,63", + "lanes": "481,482,483,484,485,486,487,488" + }, + "Ethernet512": { + "breakout_modes": { + "1x10G": ["etp65"] + }, + "index": "64", + "lanes": "513" + }, + "Ethernet513": { + "breakout_modes": { + "1x10G": ["etp66"] + }, + "index": "65", + "lanes": "514" + } + } +} diff --git a/device/marvell/x86_64-marvell_d64p512t-r0/platform_asic b/device/marvell/x86_64-marvell_d64p512t-r0/platform_asic new file mode 100644 index 00000000000..a657472d7ad --- /dev/null +++ b/device/marvell/x86_64-marvell_d64p512t-r0/platform_asic @@ -0,0 +1 @@ +marvell-teralynx diff --git a/device/marvell/x86_64-marvell_d64p512t-r0/pmon_daemon_control.json b/device/marvell/x86_64-marvell_d64p512t-r0/pmon_daemon_control.json new file mode 100644 index 00000000000..94b0feaf662 --- /dev/null +++ b/device/marvell/x86_64-marvell_d64p512t-r0/pmon_daemon_control.json @@ -0,0 +1,4 @@ +{ + "skip_ledd":true, + "skip_fancontrol": true +} diff --git a/device/marvell/x86_64-marvell_d64p512t-r0/system_health_monitoring_config.json b/device/marvell/x86_64-marvell_d64p512t-r0/system_health_monitoring_config.json new file mode 100644 index 00000000000..e02a567f0f6 --- /dev/null +++ b/device/marvell/x86_64-marvell_d64p512t-r0/system_health_monitoring_config.json @@ -0,0 +1,11 @@ +{ + "services_to_ignore": [], + "devices_to_ignore": [], + "user_defined_checkers": [], + "polling_interval": 60, + "led_color": { + "fault": "red", + "normal": "green", + "booting": "flashing green" + } +} diff --git a/device/marvell/x86_64-marvell_d64p512t-r0/thermal_policy.json b/device/marvell/x86_64-marvell_d64p512t-r0/thermal_policy.json new file mode 100644 index 00000000000..0d47c16dc9b --- /dev/null +++ b/device/marvell/x86_64-marvell_d64p512t-r0/thermal_policy.json @@ -0,0 +1,111 @@ +{ + "thermal_control_algorithm": { + "run_at_boot_up": "true", + "fan_speed_when_suspend": "100" + }, + "info_types": [ + { + "type": "chassis_info" + }, + { + "type": "fan_info" + }, + { + "type": "thermal_info" + }, + { + "type": "psu_info" + } + + ], + "policies": [ + { + "name": "all fan presence / thermal no warning", + "conditions": [ + { + "type": "fan.all.presence" + }, + { + "type": "fan.all.good" + }, + { + "type": "thermal.all.good" + } + ], + "actions": [ + { + "type": "thermal_control.control", + "status": "true" + } + ] + }, + { + "name": "any fan absence", + "conditions": [ + { + "type": "fan.any.absence" + } + ], + "actions": [ + { + "type": "thermal_control.control", + "status": "false" + }, + { + "type": "fan.all.set_speed", + "speed": "100" + } + ] + }, + { + "name": "any psu absence", + "conditions": [ + { + "type": "psu.any.absence" + } + ], + "actions": [ + { + "type": "thermal_control.control", + "status": "false" + }, + { + "type": "fan.all.set_speed", + "speed": "100" + } + ] + }, + { + "name": "any fan broken", + "conditions": [ + { + "type": "fan.any.fault" + } + ], + "actions": [ + { + "type": "thermal_control.control", + "status": "false" + }, + { + "type": "fan.all.set_speed", + "speed": "100" + } + ] + }, + { + "name": "temperature above high critical threshold", + "conditions": [ + { + "type": "thermal.over.high_critical_threshold" + } + ], + "actions": [ + { + "type": "thermal.all.log_alarm", + "alarm_type": "Major" + } + ] + } + ] +} diff --git a/device/marvell/x86_64-marvell_d64p512t-r0/topo.conf b/device/marvell/x86_64-marvell_d64p512t-r0/topo.conf new file mode 100644 index 00000000000..795ea43143e --- /dev/null +++ b/device/marvell/x86_64-marvell_d64p512t-r0/topo.conf @@ -0,0 +1 @@ +t1 diff --git a/device/marvell/x86_64-marvell_dbmvtx9180-r0/dbmvtx9180_64x100G/config_teralynx_MVTX9180_64x100G.yaml b/device/marvell/x86_64-marvell_dbmvtx9180-r0/dbmvtx9180_64x100G/config_teralynx_MVTX9180_64x100G.yaml index 1abf66695d3..bed1dbe9fa1 100644 --- a/device/marvell/x86_64-marvell_dbmvtx9180-r0/dbmvtx9180_64x100G/config_teralynx_MVTX9180_64x100G.yaml +++ b/device/marvell/x86_64-marvell_dbmvtx9180-r0/dbmvtx9180_64x100G/config_teralynx_MVTX9180_64x100G.yaml @@ -24,6 +24,9 @@ nodes: sys_clk: "1800" ifc_clk: "1800" mac_clk: "1600" + ecmp_alb_enable: "1" + alb_port_state_enable: "1" + ecmp_alb_timeout_step_size: "2" txring: - txring_id: "0" desc_count: "1024" diff --git a/device/mellanox/x86_64-mlnx_lssn2700-r0/create_only_config_db_buffers.json b/device/mellanox/x86_64-mlnx_lssn2700-r0/create_only_config_db_buffers.json new file mode 120000 index 00000000000..87e12387fcd --- /dev/null +++ b/device/mellanox/x86_64-mlnx_lssn2700-r0/create_only_config_db_buffers.json @@ -0,0 +1 @@ +../x86_64-mlnx_msn2700-r0/create_only_config_db_buffers.json \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2010-r0/create_only_config_db_buffers.json b/device/mellanox/x86_64-mlnx_msn2010-r0/create_only_config_db_buffers.json new file mode 120000 index 00000000000..87e12387fcd --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2010-r0/create_only_config_db_buffers.json @@ -0,0 +1 @@ +../x86_64-mlnx_msn2700-r0/create_only_config_db_buffers.json \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2010-r0/platform.json b/device/mellanox/x86_64-mlnx_msn2010-r0/platform.json index d48b4e8e8fc..a56b35e6565 100644 --- a/device/mellanox/x86_64-mlnx_msn2010-r0/platform.json +++ b/device/mellanox/x86_64-mlnx_msn2010-r0/platform.json @@ -48,7 +48,8 @@ ], "thermals": [ { - "name": "ASIC" + "name": "ASIC", + "polling_interval": 3 }, { "name": "Ambient Fan Side Temp" diff --git a/device/mellanox/x86_64-mlnx_msn2100-r0/create_only_config_db_buffers.json b/device/mellanox/x86_64-mlnx_msn2100-r0/create_only_config_db_buffers.json new file mode 120000 index 00000000000..87e12387fcd --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2100-r0/create_only_config_db_buffers.json @@ -0,0 +1 @@ +../x86_64-mlnx_msn2700-r0/create_only_config_db_buffers.json \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2100-r0/platform.json b/device/mellanox/x86_64-mlnx_msn2100-r0/platform.json index 485a3614b66..6fd99cbe546 100644 --- a/device/mellanox/x86_64-mlnx_msn2100-r0/platform.json +++ b/device/mellanox/x86_64-mlnx_msn2100-r0/platform.json @@ -48,7 +48,8 @@ ], "thermals": [ { - "name": "ASIC" + "name": "ASIC", + "polling_interval": 3 }, { "name": "Ambient Fan Side Temp" diff --git a/device/mellanox/x86_64-mlnx_msn2410-r0/create_only_config_db_buffers.json b/device/mellanox/x86_64-mlnx_msn2410-r0/create_only_config_db_buffers.json new file mode 120000 index 00000000000..87e12387fcd --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2410-r0/create_only_config_db_buffers.json @@ -0,0 +1 @@ +../x86_64-mlnx_msn2700-r0/create_only_config_db_buffers.json \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2410-r0/platform.json b/device/mellanox/x86_64-mlnx_msn2410-r0/platform.json index 98a60a5e898..2875600f4b6 100644 --- a/device/mellanox/x86_64-mlnx_msn2410-r0/platform.json +++ b/device/mellanox/x86_64-mlnx_msn2410-r0/platform.json @@ -98,7 +98,8 @@ ], "thermals": [ { - "name": "ASIC" + "name": "ASIC", + "polling_interval": 3 }, { "name": "Ambient Fan Side Temp" diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/create_only_config_db_buffers.json b/device/mellanox/x86_64-mlnx_msn2700-r0/create_only_config_db_buffers.json similarity index 100% rename from device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/create_only_config_db_buffers.json rename to device/mellanox/x86_64-mlnx_msn2700-r0/create_only_config_db_buffers.json diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/platform.json b/device/mellanox/x86_64-mlnx_msn2700-r0/platform.json index 22599926e3f..b01d84bbcbc 100644 --- a/device/mellanox/x86_64-mlnx_msn2700-r0/platform.json +++ b/device/mellanox/x86_64-mlnx_msn2700-r0/platform.json @@ -98,7 +98,8 @@ ], "thermals": [ { - "name": "ASIC" + "name": "ASIC", + "polling_interval": 3 }, { "name": "Ambient Fan Side Temp" diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/pmon_daemon_control.json b/device/mellanox/x86_64-mlnx_msn2700-r0/pmon_daemon_control.json index 8ffea7b92f8..75dc93d387a 100644 --- a/device/mellanox/x86_64-mlnx_msn2700-r0/pmon_daemon_control.json +++ b/device/mellanox/x86_64-mlnx_msn2700-r0/pmon_daemon_control.json @@ -3,6 +3,9 @@ "skip_fancontrol": true, "delay_xcvrd": true, "skip_xcvrd_cmis_mgr": true, - "delay_non_critical_daemon": true + "delay_non_critical_daemon": true, + "xcvrd": { + "dom_temperature_poll_interval": 20 + } } diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/system_health_monitoring_config.json b/device/mellanox/x86_64-mlnx_msn2700-r0/system_health_monitoring_config.json index bff6ab4b38e..031d299c74f 100644 --- a/device/mellanox/x86_64-mlnx_msn2700-r0/system_health_monitoring_config.json +++ b/device/mellanox/x86_64-mlnx_msn2700-r0/system_health_monitoring_config.json @@ -4,8 +4,8 @@ "user_defined_checkers": [], "polling_interval": 60, "led_color": { - "fault": "orange", + "fault": "red", "normal": "green", - "booting": "orange_blink" + "booting": "red_blink" } } diff --git a/device/mellanox/x86_64-mlnx_msn2700_simx-r0/create_only_config_db_buffers.json b/device/mellanox/x86_64-mlnx_msn2700_simx-r0/create_only_config_db_buffers.json new file mode 120000 index 00000000000..87e12387fcd --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2700_simx-r0/create_only_config_db_buffers.json @@ -0,0 +1 @@ +../x86_64-mlnx_msn2700-r0/create_only_config_db_buffers.json \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2700_simx-r0/system_health_monitoring_config.json b/device/mellanox/x86_64-mlnx_msn2700_simx-r0/system_health_monitoring_config.json index 23cb74dd3f9..a9ffcdcf83f 100644 --- a/device/mellanox/x86_64-mlnx_msn2700_simx-r0/system_health_monitoring_config.json +++ b/device/mellanox/x86_64-mlnx_msn2700_simx-r0/system_health_monitoring_config.json @@ -4,8 +4,8 @@ "user_defined_checkers": [], "polling_interval": 60, "led_color": { - "fault": "orange", + "fault": "red", "normal": "green", - "booting": "orange_blink" + "booting": "red_blink" } } diff --git a/device/mellanox/x86_64-mlnx_msn2700a1-r0/create_only_config_db_buffers.json b/device/mellanox/x86_64-mlnx_msn2700a1-r0/create_only_config_db_buffers.json new file mode 120000 index 00000000000..87e12387fcd --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2700a1-r0/create_only_config_db_buffers.json @@ -0,0 +1 @@ +../x86_64-mlnx_msn2700-r0/create_only_config_db_buffers.json \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2700a1-r0/platform.json b/device/mellanox/x86_64-mlnx_msn2700a1-r0/platform.json index 05749fadd03..97c6bb0622e 100644 --- a/device/mellanox/x86_64-mlnx_msn2700a1-r0/platform.json +++ b/device/mellanox/x86_64-mlnx_msn2700a1-r0/platform.json @@ -101,7 +101,8 @@ ], "thermals": [ { - "name": "ASIC" + "name": "ASIC", + "polling_interval": 3 }, { "name": "Ambient Fan Side Temp" diff --git a/device/mellanox/x86_64-mlnx_msn2740-r0/create_only_config_db_buffers.json b/device/mellanox/x86_64-mlnx_msn2740-r0/create_only_config_db_buffers.json new file mode 120000 index 00000000000..87e12387fcd --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn2740-r0/create_only_config_db_buffers.json @@ -0,0 +1 @@ +../x86_64-mlnx_msn2700-r0/create_only_config_db_buffers.json \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn2740-r0/platform.json b/device/mellanox/x86_64-mlnx_msn2740-r0/platform.json index 387742f4e3a..10b7782e4b4 100644 --- a/device/mellanox/x86_64-mlnx_msn2740-r0/platform.json +++ b/device/mellanox/x86_64-mlnx_msn2740-r0/platform.json @@ -83,7 +83,8 @@ ], "thermals": [ { - "name": "ASIC" + "name": "ASIC", + "polling_interval": 3 }, { "name": "Ambient Fan Side Temp" diff --git a/device/mellanox/x86_64-mlnx_msn3420-r0/create_only_config_db_buffers.json b/device/mellanox/x86_64-mlnx_msn3420-r0/create_only_config_db_buffers.json new file mode 120000 index 00000000000..87e12387fcd --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn3420-r0/create_only_config_db_buffers.json @@ -0,0 +1 @@ +../x86_64-mlnx_msn2700-r0/create_only_config_db_buffers.json \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn3420-r0/platform.json b/device/mellanox/x86_64-mlnx_msn3420-r0/platform.json index b2848ae909d..a230e2e7310 100644 --- a/device/mellanox/x86_64-mlnx_msn3420-r0/platform.json +++ b/device/mellanox/x86_64-mlnx_msn3420-r0/platform.json @@ -109,7 +109,8 @@ ], "thermals": [ { - "name": "ASIC" + "name": "ASIC", + "polling_interval": 3 }, { "name": "Ambient Fan Side Temp" diff --git a/device/mellanox/x86_64-mlnx_msn3420-r0/system_health_monitoring_config.json b/device/mellanox/x86_64-mlnx_msn3420-r0/system_health_monitoring_config.json deleted file mode 120000 index 98df66c27ca..00000000000 --- a/device/mellanox/x86_64-mlnx_msn3420-r0/system_health_monitoring_config.json +++ /dev/null @@ -1 +0,0 @@ -../x86_64-mlnx_msn2700-r0/system_health_monitoring_config.json \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn3420-r0/system_health_monitoring_config.json b/device/mellanox/x86_64-mlnx_msn3420-r0/system_health_monitoring_config.json new file mode 100644 index 00000000000..4fddaab2305 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn3420-r0/system_health_monitoring_config.json @@ -0,0 +1,11 @@ +{ + "services_to_ignore": [], + "devices_to_ignore": ["psu.voltage"], + "user_defined_checkers": [], + "polling_interval": 60, + "led_color": { + "fault": "amber", + "normal": "green", + "booting": "amber_blink" + } +} diff --git a/device/mellanox/x86_64-mlnx_msn3700-r0/create_only_config_db_buffers.json b/device/mellanox/x86_64-mlnx_msn3700-r0/create_only_config_db_buffers.json new file mode 120000 index 00000000000..87e12387fcd --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn3700-r0/create_only_config_db_buffers.json @@ -0,0 +1 @@ +../x86_64-mlnx_msn2700-r0/create_only_config_db_buffers.json \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn3700-r0/platform.json b/device/mellanox/x86_64-mlnx_msn3700-r0/platform.json index df6deb892b4..1c6454a5590 100644 --- a/device/mellanox/x86_64-mlnx_msn3700-r0/platform.json +++ b/device/mellanox/x86_64-mlnx_msn3700-r0/platform.json @@ -120,7 +120,8 @@ ], "thermals": [ { - "name": "ASIC" + "name": "ASIC", + "polling_interval": 3 }, { "name": "Ambient COMEX Temp" diff --git a/device/mellanox/x86_64-mlnx_msn3700_simx-r0/create_only_config_db_buffers.json b/device/mellanox/x86_64-mlnx_msn3700_simx-r0/create_only_config_db_buffers.json new file mode 120000 index 00000000000..87e12387fcd --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn3700_simx-r0/create_only_config_db_buffers.json @@ -0,0 +1 @@ +../x86_64-mlnx_msn2700-r0/create_only_config_db_buffers.json \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn3700c-r0/create_only_config_db_buffers.json b/device/mellanox/x86_64-mlnx_msn3700c-r0/create_only_config_db_buffers.json new file mode 120000 index 00000000000..87e12387fcd --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn3700c-r0/create_only_config_db_buffers.json @@ -0,0 +1 @@ +../x86_64-mlnx_msn2700-r0/create_only_config_db_buffers.json \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn3700c-r0/platform.json b/device/mellanox/x86_64-mlnx_msn3700c-r0/platform.json index 3eafd31ca3b..8fe8dbcaac3 100644 --- a/device/mellanox/x86_64-mlnx_msn3700c-r0/platform.json +++ b/device/mellanox/x86_64-mlnx_msn3700c-r0/platform.json @@ -98,7 +98,8 @@ ], "thermals": [ { - "name": "ASIC" + "name": "ASIC", + "polling_interval": 3 }, { "name": "Ambient COMEX Temp" diff --git a/device/mellanox/x86_64-mlnx_msn3800-r0/create_only_config_db_buffers.json b/device/mellanox/x86_64-mlnx_msn3800-r0/create_only_config_db_buffers.json new file mode 120000 index 00000000000..87e12387fcd --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn3800-r0/create_only_config_db_buffers.json @@ -0,0 +1 @@ +../x86_64-mlnx_msn2700-r0/create_only_config_db_buffers.json \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn3800-r0/platform.json b/device/mellanox/x86_64-mlnx_msn3800-r0/platform.json index fa50c885084..8a209ac6bf2 100644 --- a/device/mellanox/x86_64-mlnx_msn3800-r0/platform.json +++ b/device/mellanox/x86_64-mlnx_msn3800-r0/platform.json @@ -81,7 +81,8 @@ ], "thermals": [ { - "name": "ASIC" + "name": "ASIC", + "polling_interval": 3 }, { "name": "Ambient COMEX Temp" diff --git a/device/mellanox/x86_64-mlnx_msn4410-r0/create_only_config_db_buffers.json b/device/mellanox/x86_64-mlnx_msn4410-r0/create_only_config_db_buffers.json new file mode 120000 index 00000000000..87e12387fcd --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4410-r0/create_only_config_db_buffers.json @@ -0,0 +1 @@ +../x86_64-mlnx_msn2700-r0/create_only_config_db_buffers.json \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn4410-r0/platform.json b/device/mellanox/x86_64-mlnx_msn4410-r0/platform.json index f357ea2a48b..288d759269f 100644 --- a/device/mellanox/x86_64-mlnx_msn4410-r0/platform.json +++ b/device/mellanox/x86_64-mlnx_msn4410-r0/platform.json @@ -120,7 +120,8 @@ ], "thermals": [ { - "name": "ASIC" + "name": "ASIC", + "polling_interval": 3 }, { "name": "Ambient COMEX Temp" diff --git a/device/mellanox/x86_64-mlnx_msn4600-r0/create_only_config_db_buffers.json b/device/mellanox/x86_64-mlnx_msn4600-r0/create_only_config_db_buffers.json new file mode 120000 index 00000000000..87e12387fcd --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4600-r0/create_only_config_db_buffers.json @@ -0,0 +1 @@ +../x86_64-mlnx_msn2700-r0/create_only_config_db_buffers.json \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn4600-r0/platform.json b/device/mellanox/x86_64-mlnx_msn4600-r0/platform.json index e4f4845dfe3..52193d785de 100644 --- a/device/mellanox/x86_64-mlnx_msn4600-r0/platform.json +++ b/device/mellanox/x86_64-mlnx_msn4600-r0/platform.json @@ -78,7 +78,8 @@ ], "thermals": [ { - "name": "ASIC" + "name": "ASIC", + "polling_interval": 3 }, { "name": "Ambient COMEX Temp" diff --git a/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/hwsku.json b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/hwsku.json index 839ad08f525..3e8f23a0eee 100644 --- a/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/hwsku.json +++ b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/hwsku.json @@ -1,308 +1,232 @@ { "interfaces": { "Ethernet0":{ - "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", - "subport": "0" + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]" }, "Ethernet4":{ - "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", - "subport": "0" + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]" }, "Ethernet8":{ - "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", - "subport": "0" + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]" }, "Ethernet12":{ - "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", - "subport": "0" + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]" }, "Ethernet16":{ - "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", - "subport": "0" + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]" }, "Ethernet20":{ - "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", - "subport": "0" + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]" }, "Ethernet24":{ - "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", - "subport": "0" + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]" }, "Ethernet28":{ - "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", - "subport": "0" + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]" }, "Ethernet32":{ - "default_brkout_mode": "2x50G[25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "2x50G[25G,10G,1G]" }, "Ethernet34":{ - "default_brkout_mode": "2x50G[25G,10G,1G]", - "subport": "2" + "default_brkout_mode": "2x50G[25G,10G,1G]" }, "Ethernet36":{ - "default_brkout_mode": "2x50G[25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "2x50G[25G,10G,1G]" }, "Ethernet38":{ - "default_brkout_mode": "2x50G[25G,10G,1G]", - "subport": "2" + "default_brkout_mode": "2x50G[25G,10G,1G]" }, "Ethernet40":{ - "default_brkout_mode": "2x50G[25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "2x50G[25G,10G,1G]" }, "Ethernet42":{ - "default_brkout_mode": "2x50G[25G,10G,1G]", - "subport": "2" + "default_brkout_mode": "2x50G[25G,10G,1G]" }, "Ethernet44":{ - "default_brkout_mode": "2x50G[25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "2x50G[25G,10G,1G]" }, "Ethernet46":{ - "default_brkout_mode": "2x50G[25G,10G,1G]", - "subport": "2" + "default_brkout_mode": "2x50G[25G,10G,1G]" }, "Ethernet48":{ - "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", - "subport": "0" + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]" }, "Ethernet52":{ - "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", - "subport": "0" + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]" }, "Ethernet56":{ - "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", - "subport": "0" + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]" }, "Ethernet60":{ - "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", - "subport": "0" + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]" }, "Ethernet64":{ - "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", - "subport": "0" + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]" }, "Ethernet68":{ - "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", - "subport": "0" + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]" }, "Ethernet72":{ - "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", - "subport": "0" + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]" }, "Ethernet76":{ - "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", - "subport": "0" + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]" }, "Ethernet80":{ - "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", - "subport": "0" + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]" }, "Ethernet84":{ - "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", - "subport": "0" + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]" }, "Ethernet88":{ - "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", - "subport": "0" + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]" }, "Ethernet92":{ - "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", - "subport": "0" + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]" }, "Ethernet96":{ - "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", - "subport": "0" + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]" }, "Ethernet100":{ - "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", - "subport": "0" + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]" }, "Ethernet104":{ - "default_brkout_mode": "2x50G[25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "2x50G[25G,10G,1G]" }, "Ethernet106":{ - "default_brkout_mode": "2x50G[25G,10G,1G]", - "subport": "2" + "default_brkout_mode": "2x50G[25G,10G,1G]" }, "Ethernet108":{ - "default_brkout_mode": "2x50G[25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "2x50G[25G,10G,1G]" }, "Ethernet110":{ - "default_brkout_mode": "2x50G[25G,10G,1G]", - "subport": "2" + "default_brkout_mode": "2x50G[25G,10G,1G]" }, "Ethernet112":{ - "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", - "subport": "0" + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]" }, "Ethernet116":{ - "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", - "subport": "0" + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]" }, "Ethernet120":{ - "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", - "subport": "0" + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]" }, "Ethernet124":{ - "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", - "subport": "0" + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]" }, "Ethernet128":{ - "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", - "subport": "0" + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]" }, "Ethernet132":{ - "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", - "subport": "0" + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]" }, "Ethernet136":{ - "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", - "subport": "0" + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]" }, "Ethernet140":{ - "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", - "subport": "0" + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]" }, "Ethernet144":{ - "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", - "subport": "0" + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]" }, "Ethernet148":{ - "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", - "subport": "0" + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]" }, "Ethernet152":{ - "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", - "subport": "0" + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]" }, "Ethernet156":{ - "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", - "subport": "0" + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]" }, "Ethernet160":{ - "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", - "subport": "0" + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]" }, "Ethernet164":{ - "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", - "subport": "0" + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]" }, "Ethernet168":{ - "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", - "subport": "0" + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]" }, "Ethernet172":{ - "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", - "subport": "0" + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]" }, "Ethernet176":{ - "default_brkout_mode": "2x50G[25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "2x50G[25G,10G,1G]" }, "Ethernet178":{ - "default_brkout_mode": "2x50G[25G,10G,1G]", - "subport": "2" + "default_brkout_mode": "2x50G[25G,10G,1G]" }, "Ethernet180":{ - "default_brkout_mode": "2x50G[25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "2x50G[25G,10G,1G]" }, "Ethernet182":{ - "default_brkout_mode": "2x50G[25G,10G,1G]", - "subport": "2" + "default_brkout_mode": "2x50G[25G,10G,1G]" }, "Ethernet184":{ - "default_brkout_mode": "2x50G[25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "2x50G[25G,10G,1G]" }, "Ethernet186":{ - "default_brkout_mode": "2x50G[25G,10G,1G]", - "subport": "2" + "default_brkout_mode": "2x50G[25G,10G,1G]" }, "Ethernet188":{ - "default_brkout_mode": "2x50G[25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "2x50G[25G,10G,1G]" }, "Ethernet190":{ - "default_brkout_mode": "2x50G[25G,10G,1G]", - "subport": "2" + "default_brkout_mode": "2x50G[25G,10G,1G]" }, "Ethernet192":{ - "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", - "subport": "0" + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]" }, "Ethernet196":{ - "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", - "subport": "0" + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]" }, "Ethernet200":{ - "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", - "subport": "0" + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]" }, "Ethernet204":{ - "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", - "subport": "0" + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]" }, "Ethernet208":{ - "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", - "subport": "0" + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]" }, "Ethernet212":{ - "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", - "subport": "0" + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]" }, "Ethernet216":{ - "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", - "subport": "0" + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]" }, "Ethernet220":{ - "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", - "subport": "0" + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]" }, "Ethernet224":{ - "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", - "subport": "0" + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]" }, "Ethernet228":{ - "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", - "subport": "0" + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]" }, "Ethernet232":{ - "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", - "subport": "0" + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]" }, "Ethernet236":{ - "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", - "subport": "0" + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]" }, "Ethernet240":{ - "default_brkout_mode": "2x50G[25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "2x50G[25G,10G,1G]" }, "Ethernet242":{ - "default_brkout_mode": "2x50G[25G,10G,1G]", - "subport": "2" + "default_brkout_mode": "2x50G[25G,10G,1G]" }, "Ethernet244":{ - "default_brkout_mode": "2x50G[25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "2x50G[25G,10G,1G]" }, "Ethernet246":{ - "default_brkout_mode": "2x50G[25G,10G,1G]", - "subport": "2" + "default_brkout_mode": "2x50G[25G,10G,1G]" }, "Ethernet248":{ - "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", - "subport": "0" + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]" }, "Ethernet252":{ - "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]", - "subport": "0" + "default_brkout_mode": "1x100G[50G,40G,25G,10G,1G]" } } } diff --git a/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/sai.profile b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/sai.profile index 2bde3a0748a..cdd85497aec 100644 --- a/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/sai.profile +++ b/device/mellanox/x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-D24C52/sai.profile @@ -1 +1,2 @@ SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_4600c_24x50g_52x100g.xml +SAI_NOT_DROP_SIP_DIP_LINK_LOCAL=1 diff --git a/device/mellanox/x86_64-mlnx_msn4600c-r0/create_only_config_db_buffers.json b/device/mellanox/x86_64-mlnx_msn4600c-r0/create_only_config_db_buffers.json new file mode 120000 index 00000000000..87e12387fcd --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4600c-r0/create_only_config_db_buffers.json @@ -0,0 +1 @@ +../x86_64-mlnx_msn2700-r0/create_only_config_db_buffers.json \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn4600c-r0/platform.json b/device/mellanox/x86_64-mlnx_msn4600c-r0/platform.json index 70c5c60a550..0d977d9d95b 100644 --- a/device/mellanox/x86_64-mlnx_msn4600c-r0/platform.json +++ b/device/mellanox/x86_64-mlnx_msn4600c-r0/platform.json @@ -78,7 +78,8 @@ ], "thermals": [ { - "name": "ASIC" + "name": "ASIC", + "polling_interval": 3 }, { "name": "Ambient COMEX Temp" diff --git a/device/mellanox/x86_64-mlnx_msn4600c-r0/system_health_monitoring_config.json b/device/mellanox/x86_64-mlnx_msn4600c-r0/system_health_monitoring_config.json deleted file mode 120000 index 98df66c27ca..00000000000 --- a/device/mellanox/x86_64-mlnx_msn4600c-r0/system_health_monitoring_config.json +++ /dev/null @@ -1 +0,0 @@ -../x86_64-mlnx_msn2700-r0/system_health_monitoring_config.json \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn4600c-r0/system_health_monitoring_config.json b/device/mellanox/x86_64-mlnx_msn4600c-r0/system_health_monitoring_config.json new file mode 100644 index 00000000000..4fddaab2305 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4600c-r0/system_health_monitoring_config.json @@ -0,0 +1,11 @@ +{ + "services_to_ignore": [], + "devices_to_ignore": ["psu.voltage"], + "user_defined_checkers": [], + "polling_interval": 60, + "led_color": { + "fault": "amber", + "normal": "green", + "booting": "amber_blink" + } +} diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-A96C8V8/sai.profile b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-A96C8V8/sai.profile index a1542c6e163..5cb423c7dd2 100644 --- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-A96C8V8/sai.profile +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-A96C8V8/sai.profile @@ -1 +1,2 @@ SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_4700_8x200g_8x100g_96x25g.xml +SAI_NOT_DROP_SIP_DIP_LINK_LOCAL=1 diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-C128/hwsku.json b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-C128/hwsku.json index 2692ca30c65..867637000a1 100644 --- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-C128/hwsku.json +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-C128/hwsku.json @@ -1,516 +1,388 @@ { "interfaces": { "Ethernet0": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet2": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "2" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet4": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "3" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet6": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "4" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet8": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet10": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "2" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet12": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "3" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet14": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "4" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet16": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet18": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "2" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet20": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "3" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet22": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "4" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet24": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet26": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "2" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet28": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "3" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet30": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "4" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet32": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet34": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "2" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet36": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "3" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet38": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "4" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet40": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet42": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "2" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet44": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "3" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet46": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "4" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet48": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet50": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "2" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet52": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "3" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet54": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "4" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet56": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet58": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "2" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet60": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "3" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet62": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "4" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet64": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet66": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "2" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet68": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "3" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet70": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "4" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet72": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet74": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "2" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet76": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "3" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet78": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "4" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet80": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet82": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "2" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet84": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "3" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet86": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "4" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet88": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet90": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "2" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet92": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "3" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet94": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "4" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet96": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet98": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "2" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet100": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "3" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet102": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "4" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet104": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet106": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "2" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet108": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "3" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet110": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "4" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet112": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet114": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "2" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet116": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "3" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet118": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "4" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet120": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet122": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "2" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet124": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "3" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet126": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "4" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet128": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet130": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "2" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet132": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "3" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet134": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "4" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet136": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet138": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "2" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet140": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "3" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet142": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "4" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet144": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet146": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "2" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet148": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "3" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet150": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "4" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet152": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet154": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "2" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet156": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "3" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet158": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "4" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet160": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet162": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "2" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet164": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "3" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet166": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "4" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet168": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet170": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "2" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet172": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "3" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet174": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "4" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet176": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet178": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "2" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet180": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "3" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet182": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "4" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet184": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet186": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "2" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet188": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "3" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet190": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "4" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet192": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet194": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "2" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet196": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "3" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet198": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "4" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet200": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet202": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "2" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet204": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "3" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet206": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "4" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet208": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet210": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "2" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet212": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "3" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet214": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "4" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet216": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet218": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "2" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet220": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "3" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet222": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "4" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet224": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet226": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "2" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet228": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "3" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet230": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "4" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet232": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet234": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "2" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet236": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "3" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet238": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "4" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet240": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet242": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "2" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet244": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "3" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet246": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "4" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet248": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet250": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "2" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet252": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "3" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet254": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "4" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" } } } diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-C128/sai.profile b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-C128/sai.profile index ad101126795..a576618a30e 100644 --- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-C128/sai.profile +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-C128/sai.profile @@ -1 +1,2 @@ SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_4700_128x100g.xml +SAI_NOT_DROP_SIP_DIP_LINK_LOCAL=1 diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/hwsku.json b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/hwsku.json index 194730c605a..c44238f96af 100644 --- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/hwsku.json +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/hwsku.json @@ -1,138 +1,106 @@ { "interfaces": { "Ethernet0": { - "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]" }, "Ethernet8": { - "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]" }, "Ethernet16": { - "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]" }, "Ethernet24": { - "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]" }, "Ethernet32": { - "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]" }, "Ethernet40": { - "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]" }, "Ethernet48": { - "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]" }, "Ethernet56": { - "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]" }, "Ethernet64": { - "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]" }, "Ethernet72": { - "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]" }, "Ethernet80": { - "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]" }, "Ethernet88": { - "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]" }, "Ethernet96": { - "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]" }, "Ethernet104": { - "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]" }, "Ethernet112": { - "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]" }, "Ethernet120": { - "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]" }, "Ethernet128": { - "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]" }, "Ethernet136": { - "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]" }, "Ethernet144": { - "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]" }, "Ethernet152": { - "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]" }, "Ethernet160": { - "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]" }, "Ethernet168": { - "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]" }, "Ethernet176": { - "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]" }, "Ethernet184": { - "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]" }, "Ethernet192": { - "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]" }, "Ethernet200": { - "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]" }, "Ethernet208": { - "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]" }, "Ethernet216": { - "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]" }, "Ethernet224": { "default_brkout_mode": "1x200G[400G,100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "on", "role": "Dpc" }, "Ethernet232": { "default_brkout_mode": "1x200G[400G,100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "on", "role": "Dpc" }, "Ethernet240": { "default_brkout_mode": "1x200G[400G,100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "on", "role": "Dpc" }, "Ethernet248": { "default_brkout_mode": "1x200G[400G,100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "on", "role": "Dpc" } diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/pmon_daemon_control.json b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/pmon_daemon_control.json index 208fa63ca29..dfeaa9d37b3 100644 --- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/pmon_daemon_control.json +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/pmon_daemon_control.json @@ -1,6 +1,9 @@ { "skip_ledd": true, "skip_fancontrol": true, - "skip_xcvrd_cmis_mgr": false + "skip_xcvrd_cmis_mgr": false, + "xcvrd": { + "dom_temperature_poll_interval": 20 + } } diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/sai.profile b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/sai.profile index b49fe9c199a..60f0bb9e12e 100644 --- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/sai.profile +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/sai.profile @@ -1,2 +1,3 @@ SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_4700_32x400g.xml SAI_INDEPENDENT_MODULE_MODE=1 +SAI_NOT_DROP_SIP_DIP_LINK_LOCAL=1 diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/hwsku.json b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/hwsku.json index d317f873764..bef4dbba758 100644 --- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/hwsku.json +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/hwsku.json @@ -2,282 +2,226 @@ "interfaces": { "Ethernet0": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet4": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet8": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet12": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet16": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet20": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet24": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet28": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet32": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet36": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet40": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet44": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet48": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet52": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet56": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet60": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet64": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet68": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet72": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet76": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet80": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet84": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet88": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet92": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet96": { "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet104": { "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet112": { "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet120": { "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet128": { "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet136": { "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet144": { "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet152": { "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet160": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet164": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet168": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet172": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet176": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet180": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet184": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet188": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet192": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet196": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet200": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet204": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet208": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet212": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet216": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet220": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet224": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet228": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet232": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet236": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet240": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet244": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet248": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet252": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" } } diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/media_settings.json b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/media_settings.json index 063f1e6b0ea..6d0202ee348 100644 --- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/media_settings.json +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/media_settings.json @@ -1,1294 +1,2082 @@ { - "GLOBAL_MEDIA_SETTINGS": { - "1-32": { - "QSFP-DD-sm_media_interface": { - "speed:100GAUI-2": { - "pre2": { - "lane0": "0x00000000", - "lane1": "0x00000000", - "lane2": "0x00000000", - "lane3": "0x00000000", - "lane4": "0x00000000", - "lane5": "0x00000000", - "lane6": "0x00000000", - "lane7": "0x00000000" - }, - "pre1": { - "lane0": "0xfffffffe", - "lane1": "0xfffffffe", - "lane2": "0xfffffffe", - "lane3": "0xfffffffe", - "lane4": "0xfffffffe", - "lane5": "0xfffffffe", - "lane6": "0xfffffffe", - "lane7": "0xfffffffe" - }, - "main": { - "lane0": "0x00000020", - "lane1": "0x00000020", - "lane2": "0x00000020", - "lane3": "0x00000020", - "lane4": "0x00000020", - "lane5": "0x00000020", - "lane6": "0x00000020", - "lane7": "0x00000020" - }, - "post1": { - "lane0": "0x00000006", - "lane1": "0x00000006", - "lane2": "0x00000006", - "lane3": "0x00000006", - "lane4": "0x00000006", - "lane5": "0x00000006", - "lane6": "0x00000006", - "lane7": "0x00000006" - }, - "ob_alev_out": { - "lane0": "0x0000000f", - "lane1": "0x0000000f", - "lane2": "0x0000000f", - "lane3": "0x0000000f", - "lane4": "0x0000000f", - "lane5": "0x0000000f", - "lane6": "0x0000000f", - "lane7": "0x0000000f" - }, - "idriver": { - "lane0": "0x0000003c", - "lane1": "0x0000003c", - "lane2": "0x0000003c", - "lane3": "0x0000003c", - "lane4": "0x0000003c", - "lane5": "0x0000003c", - "lane6": "0x0000003c", - "lane7": "0x0000003c" - }, - "ob_m2lp": { - "lane0": "0x00000004", - "lane1": "0x00000004", - "lane2": "0x00000004", - "lane3": "0x00000004", - "lane4": "0x00000004", - "lane5": "0x00000004", - "lane6": "0x00000004", - "lane7": "0x00000004" - }, - "obplev": { - "lane0": "0x00000069", - "lane1": "0x00000069", - "lane2": "0x00000069", - "lane3": "0x00000069", - "lane4": "0x00000069", - "lane5": "0x00000069", - "lane6": "0x00000069", - "lane7": "0x00000069" - }, - "obnlev": { - "lane0": "0x0000005f", - "lane1": "0x0000005f", - "lane2": "0x0000005f", - "lane3": "0x0000005f", - "lane4": "0x0000005f", - "lane5": "0x0000005f", - "lane6": "0x0000005f", - "lane7": "0x0000005f" - }, - "regn_bfm1p": { - "lane0": "0x0000001e", - "lane1": "0x0000001e", - "lane2": "0x0000001e", - "lane3": "0x0000001e", - "lane4": "0x0000001e", - "lane5": "0x0000001e", - "lane6": "0x0000001e", - "lane7": "0x0000001e" - }, - "regn_bfm1n": { - "lane0": "0x000000aa", - "lane1": "0x000000aa", - "lane2": "0x000000aa", - "lane3": "0x000000aa", - "lane4": "0x000000aa", - "lane5": "0x000000aa", - "lane6": "0x000000aa", - "lane7": "0x000000aa" - } - }, - "speed:200GAUI-4": { - "pre2": { - "lane0": "0x00000000", - "lane1": "0x00000000", - "lane2": "0x00000000", - "lane3": "0x00000000", - "lane4": "0x00000000", - "lane5": "0x00000000", - "lane6": "0x00000000", - "lane7": "0x00000000" - }, - "pre1": { - "lane0": "0xfffffffe", - "lane1": "0xfffffffe", - "lane2": "0xfffffffe", - "lane3": "0xfffffffe", - "lane4": "0xfffffffe", - "lane5": "0xfffffffe", - "lane6": "0xfffffffe", - "lane7": "0xfffffffe" - }, - "main": { - "lane0": "0x00000020", - "lane1": "0x00000020", - "lane2": "0x00000020", - "lane3": "0x00000020", - "lane4": "0x00000020", - "lane5": "0x00000020", - "lane6": "0x00000020", - "lane7": "0x00000020" - }, - "post1": { - "lane0": "0x00000006", - "lane1": "0x00000006", - "lane2": "0x00000006", - "lane3": "0x00000006", - "lane4": "0x00000006", - "lane5": "0x00000006", - "lane6": "0x00000006", - "lane7": "0x00000006" - }, - "ob_alev_out": { - "lane0": "0x0000000f", - "lane1": "0x0000000f", - "lane2": "0x0000000f", - "lane3": "0x0000000f", - "lane4": "0x0000000f", - "lane5": "0x0000000f", - "lane6": "0x0000000f", - "lane7": "0x0000000f" - }, - "idriver": { - "lane0": "0x0000003c", - "lane1": "0x0000003c", - "lane2": "0x0000003c", - "lane3": "0x0000003c", - "lane4": "0x0000003c", - "lane5": "0x0000003c", - "lane6": "0x0000003c", - "lane7": "0x0000003c" - }, - "ob_m2lp": { - "lane0": "0x00000004", - "lane1": "0x00000004", - "lane2": "0x00000004", - "lane3": "0x00000004", - "lane4": "0x00000004", - "lane5": "0x00000004", - "lane6": "0x00000004", - "lane7": "0x00000004" - }, - "obplev": { - "lane0": "0x00000069", - "lane1": "0x00000069", - "lane2": "0x00000069", - "lane3": "0x00000069", - "lane4": "0x00000069", - "lane5": "0x00000069", - "lane6": "0x00000069", - "lane7": "0x00000069" - }, - "obnlev": { - "lane0": "0x0000005f", - "lane1": "0x0000005f", - "lane2": "0x0000005f", - "lane3": "0x0000005f", - "lane4": "0x0000005f", - "lane5": "0x0000005f", - "lane6": "0x0000005f", - "lane7": "0x0000005f" - }, - "regn_bfm1p": { - "lane0": "0x0000001e", - "lane1": "0x0000001e", - "lane2": "0x0000001e", - "lane3": "0x0000001e", - "lane4": "0x0000001e", - "lane5": "0x0000001e", - "lane6": "0x0000001e", - "lane7": "0x0000001e" - }, - "regn_bfm1n": { - "lane0": "0x000000aa", - "lane1": "0x000000aa", - "lane2": "0x000000aa", - "lane3": "0x000000aa", - "lane4": "0x000000aa", - "lane5": "0x000000aa", - "lane6": "0x000000aa", - "lane7": "0x000000aa" - } - }, - "speed:400GAUI-8": { - "pre2": { - "lane0": "0x00000000", - "lane1": "0x00000000", - "lane2": "0x00000000", - "lane3": "0x00000000", - "lane4": "0x00000000", - "lane5": "0x00000000", - "lane6": "0x00000000", - "lane7": "0x00000000" - }, - "pre1": { - "lane0": "0xfffffffe", - "lane1": "0xfffffffe", - "lane2": "0xfffffffe", - "lane3": "0xfffffffe", - "lane4": "0xfffffffe", - "lane5": "0xfffffffe", - "lane6": "0xfffffffe", - "lane7": "0xfffffffe" - }, - "main": { - "lane0": "0x00000020", - "lane1": "0x00000020", - "lane2": "0x00000020", - "lane3": "0x00000020", - "lane4": "0x00000020", - "lane5": "0x00000020", - "lane6": "0x00000020", - "lane7": "0x00000020" - }, - "post1": { - "lane0": "0x00000006", - "lane1": "0x00000006", - "lane2": "0x00000006", - "lane3": "0x00000006", - "lane4": "0x00000006", - "lane5": "0x00000006", - "lane6": "0x00000006", - "lane7": "0x00000006" - }, - "ob_alev_out": { - "lane0": "0x0000000f", - "lane1": "0x0000000f", - "lane2": "0x0000000f", - "lane3": "0x0000000f", - "lane4": "0x0000000f", - "lane5": "0x0000000f", - "lane6": "0x0000000f", - "lane7": "0x0000000f" - }, - "idriver": { - "lane0": "0x0000003c", - "lane1": "0x0000003c", - "lane2": "0x0000003c", - "lane3": "0x0000003c", - "lane4": "0x0000003c", - "lane5": "0x0000003c", - "lane6": "0x0000003c", - "lane7": "0x0000003c" - }, - "ob_m2lp": { - "lane0": "0x00000004", - "lane1": "0x00000004", - "lane2": "0x00000004", - "lane3": "0x00000004", - "lane4": "0x00000004", - "lane5": "0x00000004", - "lane6": "0x00000004", - "lane7": "0x00000004" - }, - "obplev": { - "lane0": "0x00000069", - "lane1": "0x00000069", - "lane2": "0x00000069", - "lane3": "0x00000069", - "lane4": "0x00000069", - "lane5": "0x00000069", - "lane6": "0x00000069", - "lane7": "0x00000069" - }, - "obnlev": { - "lane0": "0x0000005f", - "lane1": "0x0000005f", - "lane2": "0x0000005f", - "lane3": "0x0000005f", - "lane4": "0x0000005f", - "lane5": "0x0000005f", - "lane6": "0x0000005f", - "lane7": "0x0000005f" - }, - "regn_bfm1p": { - "lane0": "0x0000001e", - "lane1": "0x0000001e", - "lane2": "0x0000001e", - "lane3": "0x0000001e", - "lane4": "0x0000001e", - "lane5": "0x0000001e", - "lane6": "0x0000001e", - "lane7": "0x0000001e" - }, - "regn_bfm1n": { - "lane0": "0x000000aa", - "lane1": "0x000000aa", - "lane2": "0x000000aa", - "lane3": "0x000000aa", - "lane4": "0x000000aa", - "lane5": "0x000000aa", - "lane6": "0x000000aa", - "lane7": "0x000000aa" - } - } - }, - "QSFP-DD-active_cable_media_interface": { - "speed:CAUI-4": { - "pre2": { - "lane0": "0x00000000", - "lane1": "0x00000000", - "lane2": "0x00000000", - "lane3": "0x00000000", - "lane4": "0x00000000", - "lane5": "0x00000000", - "lane6": "0x00000000", - "lane7": "0x00000000" - }, - "pre1": { - "lane0": "0xfffffff3", - "lane1": "0xfffffff3", - "lane2": "0xfffffff3", - "lane3": "0xfffffff3", - "lane4": "0xfffffff3", - "lane5": "0xfffffff3", - "lane6": "0xfffffff3", - "lane7": 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"lane6":"0x00000020", + "lane7":"0x00000020" + }, + "post1":{ + "lane0":"0x00000006", + "lane1":"0x00000006", + "lane2":"0x00000006", + "lane3":"0x00000006", + "lane4":"0x00000006", + "lane5":"0x00000006", + "lane6":"0x00000006", + "lane7":"0x00000006" + }, + "ob_alev_out":{ + "lane0":"0x0000000f", + "lane1":"0x0000000f", + "lane2":"0x0000000f", + "lane3":"0x0000000f", + "lane4":"0x0000000f", + "lane5":"0x0000000f", + "lane6":"0x0000000f", + "lane7":"0x0000000f" + }, + "idriver":{ + "lane0":"0x0000003c", + "lane1":"0x0000003c", + "lane2":"0x0000003c", + "lane3":"0x0000003c", + "lane4":"0x0000003c", + "lane5":"0x0000003c", + "lane6":"0x0000003c", + "lane7":"0x0000003c" + }, + "ob_m2lp":{ + "lane0":"0x00000004", + "lane1":"0x00000004", + "lane2":"0x00000004", + "lane3":"0x00000004", + "lane4":"0x00000004", + "lane5":"0x00000004", + "lane6":"0x00000004", + "lane7":"0x00000004" + }, + "obplev":{ + "lane0":"0x00000069", + "lane1":"0x00000069", + "lane2":"0x00000069", + "lane3":"0x00000069", + "lane4":"0x00000069", + "lane5":"0x00000069", + "lane6":"0x00000069", + "lane7":"0x00000069" + }, + "obnlev":{ + "lane0":"0x0000005f", + "lane1":"0x0000005f", + "lane2":"0x0000005f", + "lane3":"0x0000005f", + "lane4":"0x0000005f", + "lane5":"0x0000005f", + "lane6":"0x0000005f", + "lane7":"0x0000005f" + }, + "regn_bfm1p":{ + "lane0":"0x0000001e", + "lane1":"0x0000001e", + "lane2":"0x0000001e", + "lane3":"0x0000001e", + "lane4":"0x0000001e", + "lane5":"0x0000001e", + "lane6":"0x0000001e", + "lane7":"0x0000001e" + }, + "regn_bfm1n":{ + "lane0":"0x000000aa", + "lane1":"0x000000aa", + "lane2":"0x000000aa", + "lane3":"0x000000aa", + "lane4":"0x000000aa", + "lane5":"0x000000aa", + "lane6":"0x000000aa", + "lane7":"0x000000aa" + } + }, + "speed:100GAUI-2":{ + "pre2":{ + "lane0":"0x00000000", + "lane1":"0x00000000", + "lane2":"0x00000000", + "lane3":"0x00000000", + "lane4":"0x00000000", + "lane5":"0x00000000", + "lane6":"0x00000000", + "lane7":"0x00000000" + }, + "pre1":{ + "lane0":"0xfffffffe", + "lane1":"0xfffffffe", + "lane2":"0xfffffffe", + "lane3":"0xfffffffe", + "lane4":"0xfffffffe", + "lane5":"0xfffffffe", + "lane6":"0xfffffffe", + "lane7":"0xfffffffe" + }, + "main":{ + "lane0":"0x00000020", + "lane1":"0x00000020", + "lane2":"0x00000020", + "lane3":"0x00000020", + "lane4":"0x00000020", + "lane5":"0x00000020", + "lane6":"0x00000020", + "lane7":"0x00000020" + }, + "post1":{ + "lane0":"0x00000006", + "lane1":"0x00000006", + "lane2":"0x00000006", + "lane3":"0x00000006", + "lane4":"0x00000006", + "lane5":"0x00000006", + "lane6":"0x00000006", + "lane7":"0x00000006" + }, + "ob_alev_out":{ + "lane0":"0x0000000f", + "lane1":"0x0000000f", + "lane2":"0x0000000f", + "lane3":"0x0000000f", + "lane4":"0x0000000f", + "lane5":"0x0000000f", + "lane6":"0x0000000f", + "lane7":"0x0000000f" + }, + "idriver":{ + "lane0":"0x0000003c", + "lane1":"0x0000003c", + "lane2":"0x0000003c", + "lane3":"0x0000003c", + "lane4":"0x0000003c", + "lane5":"0x0000003c", + "lane6":"0x0000003c", + "lane7":"0x0000003c" + }, + "ob_m2lp":{ + "lane0":"0x00000004", + "lane1":"0x00000004", + "lane2":"0x00000004", + "lane3":"0x00000004", + "lane4":"0x00000004", + "lane5":"0x00000004", + "lane6":"0x00000004", + "lane7":"0x00000004" + }, + "obplev":{ + "lane0":"0x00000069", + "lane1":"0x00000069", + "lane2":"0x00000069", + "lane3":"0x00000069", + "lane4":"0x00000069", + "lane5":"0x00000069", + "lane6":"0x00000069", + "lane7":"0x00000069" + }, + "obnlev":{ + "lane0":"0x0000005f", + "lane1":"0x0000005f", + "lane2":"0x0000005f", + "lane3":"0x0000005f", + "lane4":"0x0000005f", + "lane5":"0x0000005f", + "lane6":"0x0000005f", + "lane7":"0x0000005f" + }, + "regn_bfm1p":{ + "lane0":"0x0000001e", + "lane1":"0x0000001e", + "lane2":"0x0000001e", + "lane3":"0x0000001e", + "lane4":"0x0000001e", + "lane5":"0x0000001e", + "lane6":"0x0000001e", + "lane7":"0x0000001e" + }, + "regn_bfm1n":{ + "lane0":"0x000000aa", + "lane1":"0x000000aa", + "lane2":"0x000000aa", + "lane3":"0x000000aa", + "lane4":"0x000000aa", + "lane5":"0x000000aa", + "lane6":"0x000000aa", + "lane7":"0x000000aa" + } + }, + "speed:400GAUI-8":{ + "pre2":{ + "lane0":"0x00000000", + "lane1":"0x00000000", + "lane2":"0x00000000", + "lane3":"0x00000000", + "lane4":"0x00000000", + "lane5":"0x00000000", + "lane6":"0x00000000", + "lane7":"0x00000000" + }, + "pre1":{ + "lane0":"0xfffffffe", + "lane1":"0xfffffffe", + "lane2":"0xfffffffe", + "lane3":"0xfffffffe", + "lane4":"0xfffffffe", + "lane5":"0xfffffffe", + "lane6":"0xfffffffe", + "lane7":"0xfffffffe" + }, + "main":{ + "lane0":"0x00000020", + "lane1":"0x00000020", + "lane2":"0x00000020", + "lane3":"0x00000020", + "lane4":"0x00000020", + "lane5":"0x00000020", + "lane6":"0x00000020", + "lane7":"0x00000020" + }, + "post1":{ + "lane0":"0x00000006", + "lane1":"0x00000006", + "lane2":"0x00000006", + "lane3":"0x00000006", + "lane4":"0x00000006", + "lane5":"0x00000006", + "lane6":"0x00000006", + "lane7":"0x00000006" + }, + "ob_alev_out":{ + "lane0":"0x0000000f", + "lane1":"0x0000000f", + "lane2":"0x0000000f", + "lane3":"0x0000000f", + "lane4":"0x0000000f", + "lane5":"0x0000000f", + "lane6":"0x0000000f", + "lane7":"0x0000000f" + }, + "idriver":{ + "lane0":"0x0000003c", + "lane1":"0x0000003c", + "lane2":"0x0000003c", + "lane3":"0x0000003c", + "lane4":"0x0000003c", + "lane5":"0x0000003c", + "lane6":"0x0000003c", + "lane7":"0x0000003c" + }, + "ob_m2lp":{ + "lane0":"0x00000004", + "lane1":"0x00000004", + "lane2":"0x00000004", + "lane3":"0x00000004", + "lane4":"0x00000004", + "lane5":"0x00000004", + "lane6":"0x00000004", + "lane7":"0x00000004" + }, + "obplev":{ + "lane0":"0x00000069", + "lane1":"0x00000069", + "lane2":"0x00000069", + "lane3":"0x00000069", + "lane4":"0x00000069", + "lane5":"0x00000069", + "lane6":"0x00000069", + "lane7":"0x00000069" + }, + "obnlev":{ + "lane0":"0x0000005f", + "lane1":"0x0000005f", + "lane2":"0x0000005f", + "lane3":"0x0000005f", + "lane4":"0x0000005f", + "lane5":"0x0000005f", + "lane6":"0x0000005f", + "lane7":"0x0000005f" + }, + "regn_bfm1p":{ + "lane0":"0x0000001e", + "lane1":"0x0000001e", + "lane2":"0x0000001e", + "lane3":"0x0000001e", + "lane4":"0x0000001e", + "lane5":"0x0000001e", + "lane6":"0x0000001e", + "lane7":"0x0000001e" + }, + "regn_bfm1n":{ + "lane0":"0x000000aa", + "lane1":"0x000000aa", + "lane2":"0x000000aa", + "lane3":"0x000000aa", + "lane4":"0x000000aa", + "lane5":"0x000000aa", + "lane6":"0x000000aa", + "lane7":"0x000000aa" + } + } + }, + "QSFP\\+-active_cable_media_interface":{ + "speed:CAUI-4":{ + "idriver":{ + "lane0":"0x00000028", + "lane1":"0x00000028", + "lane2":"0x00000028", + "lane3":"0x00000028" + }, + "pre1":{ + "lane0":"0xfffffff3", + "lane1":"0xfffffff3", + "lane2":"0xfffffff3", + "lane3":"0xfffffff3" + }, + "pre2":{ + "lane0":"0x00000000", + "lane1":"0x00000000", + "lane2":"0x00000000", + "lane3":"0x00000000" + }, + "main":{ + "lane0":"0x00000033", + "lane1":"0x00000033", + "lane2":"0x00000033", + "lane3":"0x00000033" + }, + "post1":{ + "lane0":"0x00000000", + "lane1":"0x00000000", + "lane2":"0x00000000", + "lane3":"0x00000000" + }, + "ob_m2lp":{ + "lane0":"0x00000000", + "lane1":"0x00000000", + "lane2":"0x00000000", + "lane3":"0x00000000" + }, + "ob_alev_out":{ + "lane0":"0x0000000f", + "lane1":"0x0000000f", + "lane2":"0x0000000f", + "lane3":"0x0000000f" + }, + "obplev":{ + "lane0":"0x00000050", + "lane1":"0x00000050", + "lane2":"0x00000050", + "lane3":"0x00000050" + }, + "obnlev":{ + "lane0":"0x00000078", + "lane1":"0x00000078", + "lane2":"0x00000078", + "lane3":"0x00000078" + }, + "regn_bfm1p":{ + "lane0":"0x0000003c", + "lane1":"0x0000003c", + "lane2":"0x0000003c", + "lane3":"0x0000003c" + }, + "regn_bfm1n":{ + "lane0":"0x0000008c", + "lane1":"0x0000008c", + "lane2":"0x0000008c", + "lane3":"0x0000008c" + } + }, + "speed:200GAUI-4":{ + "pre2":{ + "lane0":"0x00000000", + "lane1":"0x00000000", + "lane2":"0x00000000", + "lane3":"0x00000000" + }, + "pre1":{ + "lane0":"0xfffffffe", + "lane1":"0xfffffffe", + "lane2":"0xfffffffe", + "lane3":"0xfffffffe" + }, + "main":{ + "lane0":"0x00000020", + "lane1":"0x00000020", + "lane2":"0x00000020", + "lane3":"0x00000020" + }, + "post1":{ + "lane0":"0x00000006", + "lane1":"0x00000006", + "lane2":"0x00000006", + "lane3":"0x00000006" + }, + "ob_alev_out":{ + "lane0":"0x0000000f", + "lane1":"0x0000000f", + "lane2":"0x0000000f", + "lane3":"0x0000000f" + }, + "idriver":{ + "lane0":"0x0000003c", + "lane1":"0x0000003c", + "lane2":"0x0000003c", + "lane3":"0x0000003c" + }, + "ob_m2lp":{ + "lane0":"0x00000004", + "lane1":"0x00000004", + "lane2":"0x00000004", + "lane3":"0x00000004" + }, + "obplev":{ + "lane0":"0x00000069", + "lane1":"0x00000069", + "lane2":"0x00000069", + "lane3":"0x00000069" + }, + "obnlev":{ + "lane0":"0x0000005f", + "lane1":"0x0000005f", + "lane2":"0x0000005f", + "lane3":"0x0000005f" + }, + "regn_bfm1p":{ + "lane0":"0x0000001e", + "lane1":"0x0000001e", + "lane2":"0x0000001e", + "lane3":"0x0000001e" + }, + "regn_bfm1n":{ + "lane0":"0x000000aa", + "lane1":"0x000000aa", + "lane2":"0x000000aa", + "lane3":"0x000000aa" + } + } + }, + "QSFP\\+C-active_cable_media_interface":{ + "speed:CAUI-4":{ + "idriver":{ + "lane0":"0x00000028", + "lane1":"0x00000028", + "lane2":"0x00000028", + "lane3":"0x00000028" + }, + "pre1":{ + "lane0":"0xfffffff3", + "lane1":"0xfffffff3", + "lane2":"0xfffffff3", + "lane3":"0xfffffff3" + }, + "pre2":{ + "lane0":"0x00000000", + "lane1":"0x00000000", + "lane2":"0x00000000", + "lane3":"0x00000000" + }, + "main":{ + "lane0":"0x00000033", + "lane1":"0x00000033", + "lane2":"0x00000033", + "lane3":"0x00000033" + }, + "post1":{ + "lane0":"0x00000000", + "lane1":"0x00000000", + "lane2":"0x00000000", + "lane3":"0x00000000" + }, + "ob_m2lp":{ + "lane0":"0x00000000", + "lane1":"0x00000000", + "lane2":"0x00000000", + "lane3":"0x00000000" + }, + "ob_alev_out":{ + "lane0":"0x0000000f", + "lane1":"0x0000000f", + "lane2":"0x0000000f", + "lane3":"0x0000000f" + }, + "obplev":{ + "lane0":"0x00000050", + "lane1":"0x00000050", + "lane2":"0x00000050", + "lane3":"0x00000050" + }, + "obnlev":{ + "lane0":"0x00000078", + "lane1":"0x00000078", + "lane2":"0x00000078", + "lane3":"0x00000078" + }, + "regn_bfm1p":{ + "lane0":"0x0000003c", + "lane1":"0x0000003c", + "lane2":"0x0000003c", + "lane3":"0x0000003c" + }, + "regn_bfm1n":{ + "lane0":"0x0000008c", + "lane1":"0x0000008c", + "lane2":"0x0000008c", + "lane3":"0x0000008c" + } + }, + "speed:200GAUI-4":{ + "pre2":{ + "lane0":"0x00000000", + "lane1":"0x00000000", + "lane2":"0x00000000", + "lane3":"0x00000000" + }, + "pre1":{ + "lane0":"0xfffffffe", + "lane1":"0xfffffffe", + "lane2":"0xfffffffe", + "lane3":"0xfffffffe" + }, + "main":{ + "lane0":"0x00000020", + "lane1":"0x00000020", + "lane2":"0x00000020", + "lane3":"0x00000020" + }, + "post1":{ + "lane0":"0x00000006", + "lane1":"0x00000006", + "lane2":"0x00000006", + "lane3":"0x00000006" + }, + "ob_alev_out":{ + "lane0":"0x0000000f", + "lane1":"0x0000000f", + "lane2":"0x0000000f", + "lane3":"0x0000000f" + }, + "idriver":{ + "lane0":"0x0000003c", + "lane1":"0x0000003c", + "lane2":"0x0000003c", + "lane3":"0x0000003c" + }, + "ob_m2lp":{ + "lane0":"0x00000004", + "lane1":"0x00000004", + "lane2":"0x00000004", + "lane3":"0x00000004" + }, + "obplev":{ + "lane0":"0x00000069", + "lane1":"0x00000069", + "lane2":"0x00000069", + "lane3":"0x00000069" + }, + "obnlev":{ + "lane0":"0x0000005f", + "lane1":"0x0000005f", + "lane2":"0x0000005f", + "lane3":"0x0000005f" + }, + "regn_bfm1p":{ + "lane0":"0x0000001e", + "lane1":"0x0000001e", + "lane2":"0x0000001e", + "lane3":"0x0000001e" + }, + "regn_bfm1n":{ + "lane0":"0x000000aa", + "lane1":"0x000000aa", + "lane2":"0x000000aa", + "lane3":"0x000000aa" } } } - } - } + } + } } diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/pmon_daemon_control.json b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/pmon_daemon_control.json index 3ada0d34478..ccb77bbff0a 100644 --- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/pmon_daemon_control.json +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/pmon_daemon_control.json @@ -2,5 +2,8 @@ "skip_ledd": true, "skip_fancontrol": true, "delay_xcvrd": false, - "skip_xcvrd_cmis_mgr": false + "skip_xcvrd_cmis_mgr": false, + "xcvrd": { + "dom_temperature_poll_interval": 20 + } } diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/hwsku.json b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/hwsku.json index e3aa3f8d77d..7c48d52c27c 100644 --- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/hwsku.json +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/hwsku.json @@ -2,282 +2,226 @@ "interfaces": { "Ethernet0": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet4": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet8": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet12": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet16": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet20": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet24": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet28": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet32": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet36": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet40": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet44": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet48": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet52": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet56": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet60": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet64": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet68": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet72": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet76": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet80": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet84": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet88": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet92": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet96": { "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet104": { "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet112": { "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet120": { "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet128": { "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet136": { "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet144": { "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet152": { "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet160": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet164": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet168": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet172": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet176": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet180": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet184": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet188": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet192": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet196": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet200": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet204": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet208": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet212": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet216": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet220": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet224": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet228": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet232": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet236": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet240": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet244": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet248": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet252": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" } } diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/pmon_daemon_control.json b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/pmon_daemon_control.json index 3ada0d34478..ccb77bbff0a 100644 --- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/pmon_daemon_control.json +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/pmon_daemon_control.json @@ -2,5 +2,8 @@ "skip_ledd": true, "skip_fancontrol": true, "delay_xcvrd": false, - "skip_xcvrd_cmis_mgr": false + "skip_xcvrd_cmis_mgr": false, + "xcvrd": { + "dom_temperature_poll_interval": 20 + } } diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V48C32/hwsku.json b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V48C32/hwsku.json index 4fef978209d..50d2faec289 100644 --- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V48C32/hwsku.json +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V48C32/hwsku.json @@ -1,324 +1,244 @@ { "interfaces": { "Ethernet0": { - "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" }, "Ethernet4": { - "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2" + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" }, "Ethernet8": { - "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" }, "Ethernet12": { - "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2" + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" }, "Ethernet16": { - "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" }, "Ethernet20": { - "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2" + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" }, "Ethernet24": { - "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" }, "Ethernet28": { - "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2" + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" }, "Ethernet32": { - "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" }, "Ethernet36": { - "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2" + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" }, "Ethernet40": { - "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" }, "Ethernet44": { - "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2" + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" }, "Ethernet48": { - "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" }, "Ethernet52": { - "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2" + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" }, "Ethernet56": { - "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" }, "Ethernet60": { - "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2" + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" }, "Ethernet64": { - "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" }, "Ethernet68": { - "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2" + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" }, "Ethernet72": { - "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" }, "Ethernet76": { - "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2" + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" }, "Ethernet80": { - "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" }, "Ethernet84": { - "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2" + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" }, "Ethernet88": { - "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" }, "Ethernet92": { - "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2" + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" }, "Ethernet96": { - "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" }, "Ethernet100": { - "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2" + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" }, "Ethernet104": { - "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" }, "Ethernet108": { - "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2" + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" }, "Ethernet112": { - "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" }, "Ethernet116": { - "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2" + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" }, "Ethernet120": { - "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" }, "Ethernet124": { - "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2" + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" }, "Ethernet128": { - "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" }, "Ethernet132": { - "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2" + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" }, "Ethernet136": { - "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" }, "Ethernet140": { - "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2" + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" }, "Ethernet144": { - "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" }, "Ethernet148": { - "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2" + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" }, "Ethernet152": { - "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" }, "Ethernet156": { - "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2" + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" }, "Ethernet160": { - "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" }, "Ethernet164": { - "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2" + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" }, "Ethernet168": { - "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" }, "Ethernet172": { - "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2" + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" }, "Ethernet176": { - "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" }, "Ethernet180": { - "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2" + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" }, "Ethernet184": { - "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" }, "Ethernet188": { - "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2" + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" }, "Ethernet192": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet194": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "2" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet196": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "3" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet198": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "4" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet200": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet202": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "2" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet204": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "3" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet206": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "4" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet208": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet210": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "2" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet212": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "3" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet214": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "4" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet216": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet218": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "2" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet220": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "3" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet222": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "4" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet224": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet226": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "2" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet228": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "3" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet230": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "4" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet232": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet234": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "2" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet236": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "3" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet238": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "4" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet240": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet242": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "2" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet244": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "3" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet246": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "4" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet248": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "1" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet250": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "2" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet252": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "3" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" }, "Ethernet254": { - "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "4" + "default_brkout_mode": "4x100G[50G,25G,10G,1G]" } } } diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V48C32/sai.profile b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V48C32/sai.profile index 5a780a8cc72..948ec42d3be 100644 --- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V48C32/sai.profile +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V48C32/sai.profile @@ -1 +1,2 @@ SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_4700_32x100g_48x200g.xml +SAI_NOT_DROP_SIP_DIP_LINK_LOCAL=1 diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/hwsku.json b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/hwsku.json index 4915aa51b85..9088b7dc97f 100644 --- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/hwsku.json +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/hwsku.json @@ -2,322 +2,258 @@ "interfaces": { "Ethernet0": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet4": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet8": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet12": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet16": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet20": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet24": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet28": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet32": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet36": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet40": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet44": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet48": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet52": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet56": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet60": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet64": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet68": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet72": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet76": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet80": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet84": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet88": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet92": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet96": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet100": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet104": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet108": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet112": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet116": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet120": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet124": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet128": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet132": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet136": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet140": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet144": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet148": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet152": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet156": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet160": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet164": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet168": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet172": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet176": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet180": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet184": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet188": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet192": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet196": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet200": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet204": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet208": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet212": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet216": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet220": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet224": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet228": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet232": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet236": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet240": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet244": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet248": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet252": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" } } diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/pmon_daemon_control.json b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/pmon_daemon_control.json index 208fa63ca29..dfeaa9d37b3 100644 --- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/pmon_daemon_control.json +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/pmon_daemon_control.json @@ -1,6 +1,9 @@ { "skip_ledd": true, "skip_fancontrol": true, - "skip_xcvrd_cmis_mgr": false + "skip_xcvrd_cmis_mgr": false, + "xcvrd": { + "dom_temperature_poll_interval": 20 + } } diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/sai.profile b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/sai.profile index 2ba019b874e..2b4210864e8 100644 --- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/sai.profile +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/sai.profile @@ -1,2 +1,3 @@ SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_4700_64x200g.xml SAI_INDEPENDENT_MODULE_MODE=1 +SAI_NOT_DROP_SIP_DIP_LINK_LOCAL=1 diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/create_only_config_db_buffers.json b/device/mellanox/x86_64-mlnx_msn4700-r0/create_only_config_db_buffers.json new file mode 120000 index 00000000000..87e12387fcd --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/create_only_config_db_buffers.json @@ -0,0 +1 @@ +../x86_64-mlnx_msn2700-r0/create_only_config_db_buffers.json \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/platform.json b/device/mellanox/x86_64-mlnx_msn4700-r0/platform.json index 49211914ec5..75cd94965b8 100644 --- a/device/mellanox/x86_64-mlnx_msn4700-r0/platform.json +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/platform.json @@ -120,7 +120,8 @@ ], "thermals": [ { - "name": "ASIC" + "name": "ASIC", + "polling_interval": 3 }, { "name": "Ambient COMEX Temp" diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/pmon_daemon_control.json b/device/mellanox/x86_64-mlnx_msn4700-r0/pmon_daemon_control.json index fefdfb32739..7981c6ffe53 100644 --- a/device/mellanox/x86_64-mlnx_msn4700-r0/pmon_daemon_control.json +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/pmon_daemon_control.json @@ -1,6 +1,9 @@ { "skip_ledd": true, "skip_fancontrol": true, - "skip_xcvrd_cmis_mgr": true + "skip_xcvrd_cmis_mgr": true, + "xcvrd": { + "dom_temperature_poll_interval": 20 + } } diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/system_health_monitoring_config.json b/device/mellanox/x86_64-mlnx_msn4700-r0/system_health_monitoring_config.json index 6a5d7d19e9b..9d9ade6d30b 100644 --- a/device/mellanox/x86_64-mlnx_msn4700-r0/system_health_monitoring_config.json +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/system_health_monitoring_config.json @@ -4,8 +4,8 @@ "user_defined_checkers": [], "polling_interval": 60, "led_color": { - "fault": "orange", + "fault": "amber", "normal": "green", - "booting": "orange_blink" + "booting": "amber_blink" } } diff --git a/device/mellanox/x86_64-mlnx_msn4700_simx-r0/create_only_config_db_buffers.json b/device/mellanox/x86_64-mlnx_msn4700_simx-r0/create_only_config_db_buffers.json new file mode 120000 index 00000000000..87e12387fcd --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4700_simx-r0/create_only_config_db_buffers.json @@ -0,0 +1 @@ +../x86_64-mlnx_msn2700-r0/create_only_config_db_buffers.json \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn4700_simx-r0/platform.json b/device/mellanox/x86_64-mlnx_msn4700_simx-r0/platform.json index 480edaa95a1..911dc1703d0 100644 --- a/device/mellanox/x86_64-mlnx_msn4700_simx-r0/platform.json +++ b/device/mellanox/x86_64-mlnx_msn4700_simx-r0/platform.json @@ -1,6 +1,6 @@ { "chassis": { - "name": "MSN4700_SIMX", + "name": "MSN4700", "components": [ { "name": "ONIE" @@ -120,7 +120,8 @@ ], "thermals": [ { - "name": "ASIC" + "name": "ASIC", + "polling_interval": 3 }, { "name": "Ambient COMEX Temp" diff --git a/device/mellanox/x86_64-mlnx_msn4700_simx-r0/system_health_monitoring_config.json b/device/mellanox/x86_64-mlnx_msn4700_simx-r0/system_health_monitoring_config.json deleted file mode 120000 index 42fe945344c..00000000000 --- a/device/mellanox/x86_64-mlnx_msn4700_simx-r0/system_health_monitoring_config.json +++ /dev/null @@ -1 +0,0 @@ -../x86_64-mlnx_msn2700_simx-r0/system_health_monitoring_config.json \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn4700_simx-r0/system_health_monitoring_config.json b/device/mellanox/x86_64-mlnx_msn4700_simx-r0/system_health_monitoring_config.json new file mode 100644 index 00000000000..41ec1c2339f --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4700_simx-r0/system_health_monitoring_config.json @@ -0,0 +1,11 @@ +{ + "services_to_ignore": [], + "devices_to_ignore": ["psu","asic","fan"], + "user_defined_checkers": [], + "polling_interval": 60, + "led_color": { + "fault": "amber", + "normal": "green", + "booting": "amber_blink" + } +} diff --git a/device/mellanox/x86_64-mlnx_x86-r5.0.1400/create_only_config_db_buffers.json b/device/mellanox/x86_64-mlnx_x86-r5.0.1400/create_only_config_db_buffers.json new file mode 120000 index 00000000000..87e12387fcd --- /dev/null +++ b/device/mellanox/x86_64-mlnx_x86-r5.0.1400/create_only_config_db_buffers.json @@ -0,0 +1 @@ +../x86_64-mlnx_msn2700-r0/create_only_config_db_buffers.json \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn2201-r0/create_only_config_db_buffers.json b/device/mellanox/x86_64-nvidia_sn2201-r0/create_only_config_db_buffers.json new file mode 120000 index 00000000000..87e12387fcd --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn2201-r0/create_only_config_db_buffers.json @@ -0,0 +1 @@ +../x86_64-mlnx_msn2700-r0/create_only_config_db_buffers.json \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn2201-r0/platform.json b/device/mellanox/x86_64-nvidia_sn2201-r0/platform.json index b0ab1479391..1911ec858ef 100644 --- a/device/mellanox/x86_64-nvidia_sn2201-r0/platform.json +++ b/device/mellanox/x86_64-nvidia_sn2201-r0/platform.json @@ -100,7 +100,8 @@ "name": "CPU Core 1 Temp" }, { - "name": "ASIC" + "name": "ASIC", + "polling_interval": 3 }, { "name": "SODIMM 1 Temp" diff --git a/device/mellanox/x86_64-nvidia_sn2201-r0/system_health_monitoring_config.json b/device/mellanox/x86_64-nvidia_sn2201-r0/system_health_monitoring_config.json deleted file mode 120000 index 98df66c27ca..00000000000 --- a/device/mellanox/x86_64-nvidia_sn2201-r0/system_health_monitoring_config.json +++ /dev/null @@ -1 +0,0 @@ -../x86_64-mlnx_msn2700-r0/system_health_monitoring_config.json \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn2201-r0/system_health_monitoring_config.json b/device/mellanox/x86_64-nvidia_sn2201-r0/system_health_monitoring_config.json new file mode 100644 index 00000000000..4fddaab2305 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn2201-r0/system_health_monitoring_config.json @@ -0,0 +1,11 @@ +{ + "services_to_ignore": [], + "devices_to_ignore": ["psu.voltage"], + "user_defined_checkers": [], + "polling_interval": 60, + "led_color": { + "fault": "amber", + "normal": "green", + "booting": "amber_blink" + } +} diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-C48/hwsku.json b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-C48/hwsku.json index 8d924c28ffe..e44ce4acc2c 100644 --- a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-C48/hwsku.json +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-C48/hwsku.json @@ -2,265 +2,213 @@ "interfaces": { "Ethernet0": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet4": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet8": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet12": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet16": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet20": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet24": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet28": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet32": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet36": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet40": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet44": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet48": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet52": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet56": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet60": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet64": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet68": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet72": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet76": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet80": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet84": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet88": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet92": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet96": { "default_brkout_mode": "1x100G[400G,200G,100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet104": { "default_brkout_mode": "1x100G[400G,200G,100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet112": { "default_brkout_mode": "1x100G[400G,200G,100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet120": { "default_brkout_mode": "1x100G[400G,200G,100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet128": { "default_brkout_mode": "1x100G[400G,200G,100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet136": { "default_brkout_mode": "1x100G[400G,200G,100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet144": { "default_brkout_mode": "1x100G[400G,200G,100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet152": { "default_brkout_mode": "1x100G[400G,200G,100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet160": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet164": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet168": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet172": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet176": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet180": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet184": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet188": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet192": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet196": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet200": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet204": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet208": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet212": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet216": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet220": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet224": { "default_brkout_mode": "1x400G", - "subport": "1", "autoneg": "on", "role" : "Dpc" }, "Ethernet232": { "default_brkout_mode": "1x400G", - "subport": "1", "autoneg": "on", "role" : "Dpc" }, "Ethernet240": { "default_brkout_mode": "1x400G", - "subport": "1", "autoneg": "on", "role" : "Dpc" }, "Ethernet248": { "default_brkout_mode": "1x400G", - "subport": "1", "autoneg": "on", "role" : "Dpc" } diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/hwsku.json b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/hwsku.json index 41e245c85e1..6df186c12ff 100644 --- a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/hwsku.json +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O28/hwsku.json @@ -2,165 +2,133 @@ "interfaces": { "Ethernet0": { "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet8": { "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet16": { "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet24": { "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet32": { "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet40": { "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet48": { "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet56": { "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet64": { "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet72": { "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet80": { "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet88": { "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet96": { "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet104": { "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet112": { "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet120": { "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet128": { "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet136": { "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet144": { "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet152": { "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet160": { "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet168": { "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet176": { "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet184": { "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet192": { "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet200": { "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet208": { "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet216": { "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet224": { "default_brkout_mode": "1x400G", - "subport": "1", "autoneg": "on", "role": "Dpc" }, "Ethernet232": { "default_brkout_mode": "1x400G", - "subport": "1", "autoneg": "on", "role": "Dpc" }, "Ethernet240": { "default_brkout_mode": "1x400G", - "subport": "1", "autoneg": "on", "role": "Dpc" }, "Ethernet248": { "default_brkout_mode": "1x400G", - "subport": "1", "autoneg": "on", "role": "Dpc" } diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O4X96/buffers.json.j2 b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O4X96/buffers.json.j2 new file mode 120000 index 00000000000..91bf6407d93 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O4X96/buffers.json.j2 @@ -0,0 +1 @@ +../Mellanox-SN4280-O28/buffers.json.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O4X96/buffers_defaults_objects.j2 b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O4X96/buffers_defaults_objects.j2 new file mode 120000 index 00000000000..09998eb836e --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O4X96/buffers_defaults_objects.j2 @@ -0,0 +1 @@ +../../x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O28/buffers_defaults_objects.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O4X96/buffers_defaults_t0.j2 b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O4X96/buffers_defaults_t0.j2 new file mode 100644 index 00000000000..658c9800dba --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O4X96/buffers_defaults_t0.j2 @@ -0,0 +1,42 @@ +{# + Copyright (c) 2022-2024 NVIDIA CORPORATION & AFFILIATES. + Apache-2.0 + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + http://www.apache.org/licenses/LICENSE-2.0 + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +#} +{% set default_cable = '0m' %} +{%-set ports2cable = { + 'torrouter_server' : '0m', + 'leafrouter_torrouter' : '0m', + 'spinerouter_leafrouter' : '0m' + } +-%} +{% set ingress_lossless_pool_size = '54222848' %} +{% set ingress_lossless_pool_xoff = '0' %} +{% set egress_lossless_pool_size = '60817392' %} +{% set egress_lossy_pool_size = '54222848' %} + +{% import 'buffers_defaults_objects.j2' as defs with context %} + +{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %} +{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }} +{%- endmacro %} diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O4X96/buffers_defaults_t1.j2 b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O4X96/buffers_defaults_t1.j2 new file mode 100644 index 00000000000..658c9800dba --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O4X96/buffers_defaults_t1.j2 @@ -0,0 +1,42 @@ +{# + Copyright (c) 2022-2024 NVIDIA CORPORATION & AFFILIATES. + Apache-2.0 + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + http://www.apache.org/licenses/LICENSE-2.0 + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +#} +{% set default_cable = '0m' %} +{%-set ports2cable = { + 'torrouter_server' : '0m', + 'leafrouter_torrouter' : '0m', + 'spinerouter_leafrouter' : '0m' + } +-%} +{% set ingress_lossless_pool_size = '54222848' %} +{% set ingress_lossless_pool_xoff = '0' %} +{% set egress_lossless_pool_size = '60817392' %} +{% set egress_lossy_pool_size = '54222848' %} + +{% import 'buffers_defaults_objects.j2' as defs with context %} + +{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %} +{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }} +{%- endmacro %} diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O4X96/buffers_dynamic.json.j2 b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O4X96/buffers_dynamic.json.j2 new file mode 120000 index 00000000000..4de460cb275 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O4X96/buffers_dynamic.json.j2 @@ -0,0 +1 @@ +../Mellanox-SN4280-O28/buffers_dynamic.json.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O4X96/hwsku.json b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O4X96/hwsku.json new file mode 100644 index 00000000000..08900fb6165 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O4X96/hwsku.json @@ -0,0 +1,420 @@ +{ + "interfaces": { + "Ethernet0": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet1": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet2": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet3": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet8": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet9": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet10": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet11": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet16": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet17": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet18": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet19": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet24": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet25": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet26": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet27": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet32": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet33": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet34": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet35": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet40": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet41": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet42": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet43": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet48": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet49": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet50": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet51": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet56": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet57": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet58": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet59": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet64": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet65": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet66": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet67": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet72": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet73": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet74": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet75": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet80": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet81": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet82": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet83": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet88": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet89": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet90": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet91": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet96": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]" + }, + "Ethernet104": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]" + }, + "Ethernet112": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]" + }, + "Ethernet120": { + "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]" + }, + "Ethernet128": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet129": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet130": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet131": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet136": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet137": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet138": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet139": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet144": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet145": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet146": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet147": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet152": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet153": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet154": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet155": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet160": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet161": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet162": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet163": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet168": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet169": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet170": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet171": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet176": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet177": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet178": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet179": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet184": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet185": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet186": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet187": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet192": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet193": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet194": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet195": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet200": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet201": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet202": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet203": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet208": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet209": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet210": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet211": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet216": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet217": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet218": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet219": { + "default_brkout_mode": "4x25G(4)[10G,1G]", + "autoneg": "off" + }, + "Ethernet224": { + "default_brkout_mode": "1x400G", + "role": "Dpc", + "autoneg": "on" + }, + "Ethernet232": { + "default_brkout_mode": "1x400G", + "role": "Dpc", + "autoneg": "on" + }, + "Ethernet240": { + "default_brkout_mode": "1x400G", + "role": "Dpc", + "autoneg": "on" + }, + "Ethernet248": { + "default_brkout_mode": "1x400G", + "role": "Dpc", + "autoneg": "on" + } + } +} diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O4X96/media_settings.json b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O4X96/media_settings.json new file mode 120000 index 00000000000..e5be1770d56 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O4X96/media_settings.json @@ -0,0 +1 @@ +../../x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/media_settings.json \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O4X96/optics_si_settings.json b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O4X96/optics_si_settings.json new file mode 120000 index 00000000000..32c35c300d5 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O4X96/optics_si_settings.json @@ -0,0 +1 @@ +../../x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/optics_si_settings.json \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O4X96/pg_profile_lookup.ini b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O4X96/pg_profile_lookup.ini new file mode 120000 index 00000000000..914dcd8b7fa --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O4X96/pg_profile_lookup.ini @@ -0,0 +1 @@ +../Mellanox-SN4280-O28/pg_profile_lookup.ini \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O4X96/pmon_daemon_control.json b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O4X96/pmon_daemon_control.json new file mode 120000 index 00000000000..5f26f0b03a9 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O4X96/pmon_daemon_control.json @@ -0,0 +1 @@ +../../x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/pmon_daemon_control.json \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O4X96/port_config.ini b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O4X96/port_config.ini new file mode 100644 index 00000000000..65d0acbe904 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O4X96/port_config.ini @@ -0,0 +1,105 @@ +# name lanes alias index speed fec +Ethernet0 0 etp1a 1 25000 none +Ethernet1 1 etp1b 1 25000 none +Ethernet2 2 etp1c 1 25000 none +Ethernet3 3 etp1d 1 25000 none +Ethernet8 8 etp2a 2 25000 none +Ethernet9 9 etp2b 2 25000 none +Ethernet10 10 etp2c 2 25000 none +Ethernet11 11 etp2d 2 25000 none +Ethernet16 16 etp3a 3 25000 none +Ethernet17 17 etp3b 3 25000 none +Ethernet18 18 etp3c 3 25000 none +Ethernet19 19 etp3d 3 25000 none +Ethernet24 24 etp4a 4 25000 none +Ethernet25 25 etp4b 4 25000 none +Ethernet26 26 etp4c 4 25000 none +Ethernet27 27 etp4d 4 25000 none +Ethernet32 32 etp5a 5 25000 none +Ethernet33 33 etp5b 5 25000 none +Ethernet34 34 etp5c 5 25000 none +Ethernet35 35 etp5d 5 25000 none +Ethernet40 40 etp6a 6 25000 none +Ethernet41 41 etp6b 6 25000 none +Ethernet42 42 etp6c 6 25000 none +Ethernet43 43 etp6d 6 25000 none +Ethernet48 48 etp7a 7 25000 none +Ethernet49 49 etp7b 7 25000 none +Ethernet50 50 etp7c 7 25000 none +Ethernet51 51 etp7d 7 25000 none +Ethernet56 56 etp8a 8 25000 none +Ethernet57 57 etp8b 8 25000 none +Ethernet58 58 etp8c 8 25000 none +Ethernet59 59 etp8d 8 25000 none +Ethernet64 64 etp9a 9 25000 none +Ethernet65 65 etp9b 9 25000 none +Ethernet66 66 etp9c 9 25000 none +Ethernet67 67 etp9d 9 25000 none +Ethernet72 72 etp10a 10 25000 none +Ethernet73 73 etp10b 10 25000 none +Ethernet74 74 etp10c 10 25000 none +Ethernet75 75 etp10d 10 25000 none +Ethernet80 80 etp11a 11 25000 none +Ethernet81 81 etp11b 11 25000 none +Ethernet82 82 etp11c 11 25000 none +Ethernet83 83 etp11d 11 25000 none +Ethernet88 88 etp12a 12 25000 none +Ethernet89 89 etp12b 12 25000 none +Ethernet90 90 etp12c 12 25000 none +Ethernet91 91 etp12d 12 25000 none +Ethernet96 96,97,98,99,100,101,102,103 etp13 13 400000 rs +Ethernet104 104,105,106,107,108,109,110,111 etp14 14 400000 rs +Ethernet112 112,113,114,115,116,117,118,119 etp15 15 400000 rs +Ethernet120 120,121,122,123,124,125,126,127 etp16 16 400000 rs +Ethernet128 128 etp17a 17 25000 none +Ethernet129 129 etp17b 17 25000 none +Ethernet130 130 etp17c 17 25000 none +Ethernet131 131 etp17d 17 25000 none +Ethernet136 136 etp18a 18 25000 none +Ethernet137 137 etp18b 18 25000 none +Ethernet138 138 etp18c 18 25000 none +Ethernet139 139 etp18d 18 25000 none +Ethernet144 144 etp19a 19 25000 none +Ethernet145 145 etp19b 19 25000 none +Ethernet146 146 etp19c 19 25000 none +Ethernet147 147 etp19d 19 25000 none +Ethernet152 152 etp20a 20 25000 none +Ethernet153 153 etp20b 20 25000 none +Ethernet154 154 etp20c 20 25000 none +Ethernet155 155 etp20d 20 25000 none +Ethernet160 160 etp21a 21 25000 none +Ethernet161 161 etp21b 21 25000 none +Ethernet162 162 etp21c 21 25000 none +Ethernet163 163 etp21d 21 25000 none +Ethernet168 168 etp22a 22 25000 none +Ethernet169 169 etp22b 22 25000 none +Ethernet170 170 etp22c 22 25000 none +Ethernet171 171 etp22d 22 25000 none +Ethernet176 176 etp23a 23 25000 none +Ethernet177 177 etp23b 23 25000 none +Ethernet178 178 etp23c 23 25000 none +Ethernet179 179 etp23d 23 25000 none +Ethernet184 184 etp24a 24 25000 none +Ethernet185 185 etp24b 24 25000 none +Ethernet186 186 etp24c 24 25000 none +Ethernet187 187 etp24d 24 25000 none +Ethernet192 192 etp25a 25 25000 none +Ethernet193 193 etp25b 25 25000 none +Ethernet194 194 etp25c 25 25000 none +Ethernet195 195 etp25d 25 25000 none +Ethernet200 200 etp26a 26 25000 none +Ethernet201 201 etp26b 26 25000 none +Ethernet202 202 etp26c 26 25000 none +Ethernet203 203 etp26d 26 25000 none +Ethernet208 208 etp27a 27 25000 none +Ethernet209 209 etp27b 27 25000 none +Ethernet210 210 etp27c 27 25000 none +Ethernet211 211 etp27d 27 25000 none +Ethernet216 216 etp28a 28 25000 none +Ethernet217 217 etp28b 28 25000 none +Ethernet218 218 etp28c 28 25000 none +Ethernet219 219 etp28d 28 25000 none +Ethernet224 224,225,226,227,228,229,230,231 etp29 29 400000 none +Ethernet232 232,233,234,235,236,237,238,239 etp30 30 400000 none +Ethernet240 240,241,242,243,244,245,246,247 etp31 31 400000 none +Ethernet248 248,249,250,251,252,253,254,255 etp32 32 400000 none diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O4X96/qos.json.j2 b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O4X96/qos.json.j2 new file mode 120000 index 00000000000..eccf286dc87 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O4X96/qos.json.j2 @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/qos.json.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O4X96/sai.profile b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O4X96/sai.profile new file mode 100644 index 00000000000..430d3bf4ce3 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O4X96/sai.profile @@ -0,0 +1,5 @@ +SAI_INDEPENDENT_MODULE_MODE=1 +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_4280_4x400g_96x25g.xml +SAI_DEFAULT_SWITCHING_MODE_STORE_FORWARD=1 +SAI_NOT_DROP_SIP_DIP_LINK_LOCAL=1 +SAI_ACL_MULTI_BINDING_ENABLED=1 diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O4X96/sai_4280_4x400g_96x25g.xml b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O4X96/sai_4280_4x400g_96x25g.xml new file mode 120000 index 00000000000..563ede5a0ad --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O4X96/sai_4280_4x400g_96x25g.xml @@ -0,0 +1 @@ +../Mellanox-SN4280-O28/sai_4280.xml \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C40/hwsku.json b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C40/hwsku.json index 9d25e434c1c..1790673ab1c 100644 --- a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C40/hwsku.json +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C40/hwsku.json @@ -2,265 +2,213 @@ "interfaces": { "Ethernet0": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet4": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet8": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet12": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet16": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet20": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet24": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet28": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet32": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet36": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet40": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet44": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet48": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet52": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet56": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet60": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet64": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet68": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet72": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet76": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet80": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet84": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet88": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet92": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet96": { "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet104": { "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet112": { "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet120": { "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet128": { "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet136": { "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet144": { "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet152": { "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet160": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet164": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet168": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet172": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet176": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet180": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet184": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet188": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet192": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet196": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet200": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet204": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet208": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet212": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet216": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet220": { "default_brkout_mode": "2x100G[200G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet224": { "default_brkout_mode": "1x400G", - "subport": "1", "autoneg": "on", "role" : "Dpc" }, "Ethernet232": { "default_brkout_mode": "1x400G", - "subport": "1", "autoneg": "on", "role" : "Dpc" }, "Ethernet240": { "default_brkout_mode": "1x400G", - "subport": "1", "autoneg": "on", "role" : "Dpc" }, "Ethernet248": { "default_brkout_mode": "1x400G", - "subport": "1", "autoneg": "on", "role" : "Dpc" } diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C80/hwsku.json b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C80/hwsku.json index 1171fd733d2..1251cfb265c 100644 --- a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C80/hwsku.json +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8C80/hwsku.json @@ -2,465 +2,373 @@ "interfaces": { "Ethernet0": { "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet2": { "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet4": { "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "3", "autoneg": "off" }, "Ethernet6": { "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "4", "autoneg": "off" }, "Ethernet8": { "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet10": { "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet12": { "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "3", "autoneg": "off" }, "Ethernet14": { "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "4", "autoneg": "off" }, "Ethernet16": { "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet18": { "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet20": { "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "3", "autoneg": "off" }, "Ethernet22": { "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "4", "autoneg": "off" }, "Ethernet24": { "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet26": { "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet28": { "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "3", "autoneg": "off" }, "Ethernet30": { "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "4", "autoneg": "off" }, "Ethernet32": { "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet34": { "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet36": { "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "3", "autoneg": "off" }, "Ethernet38": { "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "4", "autoneg": "off" }, "Ethernet40": { "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet42": { "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet44": { "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "3", "autoneg": "off" }, "Ethernet46": { "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "4", "autoneg": "off" }, "Ethernet48": { "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet50": { "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet52": { "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "3", "autoneg": "off" }, "Ethernet54": { "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "4", "autoneg": "off" }, "Ethernet56": { "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet58": { "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet60": { "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "3", "autoneg": "off" }, "Ethernet62": { "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "4", "autoneg": "off" }, "Ethernet64": { "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet66": { "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet68": { "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "3", "autoneg": "off" }, "Ethernet70": { "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "4", "autoneg": "off" }, "Ethernet72": { "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet74": { "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet76": { "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "3", "autoneg": "off" }, "Ethernet78": { "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "4", "autoneg": "off" }, "Ethernet80": { "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet82": { "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet84": { "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "3", "autoneg": "off" }, "Ethernet86": { "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "4", "autoneg": "off" }, "Ethernet88": { "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet90": { "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet92": { "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "3", "autoneg": "off" }, "Ethernet94": { "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "4", "autoneg": "off" }, "Ethernet96": { "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet104": { "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet112": { "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet120": { "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet128": { "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet136": { "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet144": { "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet152": { "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet160": { "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet162": { "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet164": { "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "3", "autoneg": "off" }, "Ethernet166": { "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "4", "autoneg": "off" }, "Ethernet168": { "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet170": { "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet172": { "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "3", "autoneg": "off" }, "Ethernet174": { "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "4", "autoneg": "off" }, "Ethernet176": { "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet178": { "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet180": { "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "3", "autoneg": "off" }, "Ethernet182": { "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "4", "autoneg": "off" }, "Ethernet184": { "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet186": { "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet188": { "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "3", "autoneg": "off" }, "Ethernet190": { "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "4", "autoneg": "off" }, "Ethernet192": { "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet194": { "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet196": { "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "3", "autoneg": "off" }, "Ethernet198": { "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "4", "autoneg": "off" }, "Ethernet200": { "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet202": { "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet204": { "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "3", "autoneg": "off" }, "Ethernet206": { "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "4", "autoneg": "off" }, "Ethernet208": { "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet210": { "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet212": { "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "3", "autoneg": "off" }, "Ethernet214": { "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "4", "autoneg": "off" }, "Ethernet216": { "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet218": { "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet220": { "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "3", "autoneg": "off" }, "Ethernet222": { "default_brkout_mode": "4x100G[50G,25G,10G,1G]", - "subport": "4", "autoneg": "off" }, "Ethernet224": { "default_brkout_mode": "1x400G", - "subport": "1", "autoneg": "on", "role": "Dpc" }, "Ethernet232": { "default_brkout_mode": "1x400G", - "subport": "1", "autoneg": "on", "role": "Dpc" }, "Ethernet240": { "default_brkout_mode": "1x400G", - "subport": "1", "autoneg": "on", "role": "Dpc" }, "Ethernet248": { "default_brkout_mode": "1x400G", - "subport": "1", "autoneg": "on", "role": "Dpc" } diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/hwsku.json b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/hwsku.json index 898cd281a40..9dec7b1b028 100644 --- a/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/hwsku.json +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/Mellanox-SN4280-O8V40/hwsku.json @@ -2,265 +2,213 @@ "interfaces": { "Ethernet0": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet4": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet8": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet12": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet16": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet20": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet24": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet28": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet32": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet36": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet40": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet44": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet48": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet52": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet56": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet60": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet64": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet68": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet72": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet76": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet80": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet84": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet88": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet92": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet96": { "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet104": { "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet112": { "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet120": { "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet128": { "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet136": { "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet144": { "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet152": { "default_brkout_mode": "1x400G[200G,100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet160": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet164": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet168": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet172": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet176": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet180": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet184": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet188": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet192": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet196": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet200": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet204": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet208": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet212": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet216": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "1", "autoneg": "off" }, "Ethernet220": { "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]", - "subport": "2", "autoneg": "off" }, "Ethernet224": { "default_brkout_mode": "1x400G", - "subport": "1", "autoneg": "on", "role" : "Dpc" }, "Ethernet232": { "default_brkout_mode": "1x400G", - "subport": "1", "autoneg": "on", "role" : "Dpc" }, "Ethernet240": { "default_brkout_mode": "1x400G", - "subport": "1", "autoneg": "on", "role" : "Dpc" }, "Ethernet248": { "default_brkout_mode": "1x400G", - "subport": "1", "autoneg": "on", "role" : "Dpc" } diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/create_only_config_db_buffers.json b/device/mellanox/x86_64-nvidia_sn4280-r0/create_only_config_db_buffers.json new file mode 120000 index 00000000000..87e12387fcd --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/create_only_config_db_buffers.json @@ -0,0 +1 @@ +../x86_64-mlnx_msn2700-r0/create_only_config_db_buffers.json \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/installer.conf b/device/mellanox/x86_64-nvidia_sn4280-r0/installer.conf index c8322e67b15..f06f23e928f 100644 --- a/device/mellanox/x86_64-nvidia_sn4280-r0/installer.conf +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/installer.conf @@ -1 +1 @@ -ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="libata.force=noncq ima_hash=sha384 amd_iommu=off cpufreq.default_governor=performance" +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="libata.force=noncq ima_hash=sha384 amd_iommu=off cpufreq.default_governor=performance modprobe.blacklist=mlxreg_dpu" diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/module_sensors_ignore_conf/ignore_sensors_DPU0.conf b/device/mellanox/x86_64-nvidia_sn4280-r0/module_sensors_ignore_conf/ignore_sensors_DPU0.conf index 6d093c56d00..c3ae301019d 100644 --- a/device/mellanox/x86_64-nvidia_sn4280-r0/module_sensors_ignore_conf/ignore_sensors_DPU0.conf +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/module_sensors_ignore_conf/ignore_sensors_DPU0.conf @@ -28,3 +28,6 @@ bus "i2c-18" "i2c-1-mux (chan_id 17)" ignore temp1 ignore temp2 ignore curr6 + +chip "mlx5-pci-0800" + ignore temp1 diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/module_sensors_ignore_conf/ignore_sensors_DPU1.conf b/device/mellanox/x86_64-nvidia_sn4280-r0/module_sensors_ignore_conf/ignore_sensors_DPU1.conf index 096cbae4c48..1c3350e2ae3 100644 --- a/device/mellanox/x86_64-nvidia_sn4280-r0/module_sensors_ignore_conf/ignore_sensors_DPU1.conf +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/module_sensors_ignore_conf/ignore_sensors_DPU1.conf @@ -28,3 +28,6 @@ bus "i2c-19" "i2c-1-mux (chan_id 18)" ignore temp1 ignore temp2 ignore curr6 + +chip "mlx5-pci-0700" + ignore temp1 diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/module_sensors_ignore_conf/ignore_sensors_DPU2.conf b/device/mellanox/x86_64-nvidia_sn4280-r0/module_sensors_ignore_conf/ignore_sensors_DPU2.conf index ba21c0675fc..649ea366ce5 100644 --- a/device/mellanox/x86_64-nvidia_sn4280-r0/module_sensors_ignore_conf/ignore_sensors_DPU2.conf +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/module_sensors_ignore_conf/ignore_sensors_DPU2.conf @@ -28,3 +28,6 @@ bus "i2c-20" "i2c-1-mux (chan_id 19)" ignore temp1 ignore temp2 ignore curr6 + +chip "mlx5-pci-0100" + ignore temp1 diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/module_sensors_ignore_conf/ignore_sensors_DPU3.conf b/device/mellanox/x86_64-nvidia_sn4280-r0/module_sensors_ignore_conf/ignore_sensors_DPU3.conf index debd18340a1..6e04fb2bb57 100644 --- a/device/mellanox/x86_64-nvidia_sn4280-r0/module_sensors_ignore_conf/ignore_sensors_DPU3.conf +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/module_sensors_ignore_conf/ignore_sensors_DPU3.conf @@ -28,3 +28,6 @@ bus "i2c-21" "i2c-1-mux (chan_id 20)" ignore temp1 ignore temp2 ignore curr6 + +chip "mlx5-pci-0200" + ignore temp1 diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/platform.json b/device/mellanox/x86_64-nvidia_sn4280-r0/platform.json index d299fb0d4b9..2c2bd3fdc69 100644 --- a/device/mellanox/x86_64-nvidia_sn4280-r0/platform.json +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/platform.json @@ -86,7 +86,8 @@ ], "thermals": [ { - "name": "ASIC" + "name": "ASIC", + "polling_interval": 3 }, { "name": "Ambient Fan Side Temp" @@ -647,6 +648,11 @@ } } }, + "mgmt_interfaces": { + "eth0": { + "pci_bus_info": "0000:0a:00.4" + } + }, "DPUS": { "dpu0": { "midplane_interface": "dpu0", @@ -701,5 +707,7 @@ "bus_info": "0000:02:00.0" } }, - "dpu_halt_services_timeout": 180 + "dpu_halt_services_timeout": 180, + "dpu_shutdown_timeout": 240 + } diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/system_health_monitoring_config.json b/device/mellanox/x86_64-nvidia_sn4280-r0/system_health_monitoring_config.json deleted file mode 120000 index 98df66c27ca..00000000000 --- a/device/mellanox/x86_64-nvidia_sn4280-r0/system_health_monitoring_config.json +++ /dev/null @@ -1 +0,0 @@ -../x86_64-mlnx_msn2700-r0/system_health_monitoring_config.json \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn4280-r0/system_health_monitoring_config.json b/device/mellanox/x86_64-nvidia_sn4280-r0/system_health_monitoring_config.json new file mode 100644 index 00000000000..4fddaab2305 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280-r0/system_health_monitoring_config.json @@ -0,0 +1,11 @@ +{ + "services_to_ignore": [], + "devices_to_ignore": ["psu.voltage"], + "user_defined_checkers": [], + "polling_interval": 60, + "led_color": { + "fault": "amber", + "normal": "green", + "booting": "amber_blink" + } +} diff --git a/device/mellanox/x86_64-nvidia_sn4280_simx-r0/create_only_config_db_buffers.json b/device/mellanox/x86_64-nvidia_sn4280_simx-r0/create_only_config_db_buffers.json new file mode 120000 index 00000000000..87e12387fcd --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280_simx-r0/create_only_config_db_buffers.json @@ -0,0 +1 @@ +../x86_64-mlnx_msn2700-r0/create_only_config_db_buffers.json \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn4280_simx-r0/platform.json b/device/mellanox/x86_64-nvidia_sn4280_simx-r0/platform.json index e0640c0ce02..0e987c09118 100644 --- a/device/mellanox/x86_64-nvidia_sn4280_simx-r0/platform.json +++ b/device/mellanox/x86_64-nvidia_sn4280_simx-r0/platform.json @@ -1,6 +1,6 @@ { "chassis": { - "name": "SN4280_SIMX", + "name": "SN4280", "components": [ { "name": "ONIE" @@ -86,7 +86,8 @@ ], "thermals": [ { - "name": "ASIC" + "name": "ASIC", + "polling_interval": 3 }, { "name": "Ambient Fan Side Temp" diff --git a/device/mellanox/x86_64-nvidia_sn4280_simx-r0/system_health_monitoring_config.json b/device/mellanox/x86_64-nvidia_sn4280_simx-r0/system_health_monitoring_config.json deleted file mode 120000 index 42fe945344c..00000000000 --- a/device/mellanox/x86_64-nvidia_sn4280_simx-r0/system_health_monitoring_config.json +++ /dev/null @@ -1 +0,0 @@ -../x86_64-mlnx_msn2700_simx-r0/system_health_monitoring_config.json \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn4280_simx-r0/system_health_monitoring_config.json b/device/mellanox/x86_64-nvidia_sn4280_simx-r0/system_health_monitoring_config.json new file mode 100644 index 00000000000..41ec1c2339f --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4280_simx-r0/system_health_monitoring_config.json @@ -0,0 +1,11 @@ +{ + "services_to_ignore": [], + "devices_to_ignore": ["psu","asic","fan"], + "user_defined_checkers": [], + "polling_interval": 60, + "led_color": { + "fault": "amber", + "normal": "green", + "booting": "amber_blink" + } +} diff --git a/device/mellanox/x86_64-nvidia_sn4800-r0/create_only_config_db_buffers.json b/device/mellanox/x86_64-nvidia_sn4800-r0/create_only_config_db_buffers.json new file mode 120000 index 00000000000..87e12387fcd --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4800-r0/create_only_config_db_buffers.json @@ -0,0 +1 @@ +../x86_64-mlnx_msn2700-r0/create_only_config_db_buffers.json \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn4800-r0/platform.json b/device/mellanox/x86_64-nvidia_sn4800-r0/platform.json index 69dc1afcf38..cf62d028324 100644 --- a/device/mellanox/x86_64-nvidia_sn4800-r0/platform.json +++ b/device/mellanox/x86_64-nvidia_sn4800-r0/platform.json @@ -131,7 +131,8 @@ ], "thermals": [ { - "name": "ASIC" + "name": "ASIC", + "polling_interval": 3 }, { "name": "Ambient Fan Side Temp" diff --git a/device/mellanox/x86_64-nvidia_sn4800_simx-r0/create_only_config_db_buffers.json b/device/mellanox/x86_64-nvidia_sn4800_simx-r0/create_only_config_db_buffers.json new file mode 120000 index 00000000000..87e12387fcd --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn4800_simx-r0/create_only_config_db_buffers.json @@ -0,0 +1 @@ +../x86_64-mlnx_msn2700-r0/create_only_config_db_buffers.json \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn5400-r0/create_only_config_db_buffers.json b/device/mellanox/x86_64-nvidia_sn5400-r0/create_only_config_db_buffers.json new file mode 120000 index 00000000000..87e12387fcd --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5400-r0/create_only_config_db_buffers.json @@ -0,0 +1 @@ +../x86_64-mlnx_msn2700-r0/create_only_config_db_buffers.json \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn5400-r0/platform.json b/device/mellanox/x86_64-nvidia_sn5400-r0/platform.json index b2c0264ba14..1c71901e62b 100644 --- a/device/mellanox/x86_64-nvidia_sn5400-r0/platform.json +++ b/device/mellanox/x86_64-nvidia_sn5400-r0/platform.json @@ -104,7 +104,8 @@ ], "thermals": [ { - "name": "ASIC" + "name": "ASIC", + "polling_interval": 3 }, { "name": "Ambient Fan Side Temp" diff --git a/device/mellanox/x86_64-nvidia_sn5400_simx-r0/create_only_config_db_buffers.json b/device/mellanox/x86_64-nvidia_sn5400_simx-r0/create_only_config_db_buffers.json new file mode 120000 index 00000000000..87e12387fcd --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5400_simx-r0/create_only_config_db_buffers.json @@ -0,0 +1 @@ +../x86_64-mlnx_msn2700-r0/create_only_config_db_buffers.json \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn5400_simx-r0/platform.json b/device/mellanox/x86_64-nvidia_sn5400_simx-r0/platform.json index ff58f12eda7..11d64c0e38b 100644 --- a/device/mellanox/x86_64-nvidia_sn5400_simx-r0/platform.json +++ b/device/mellanox/x86_64-nvidia_sn5400_simx-r0/platform.json @@ -1,6 +1,6 @@ { "chassis": { - "name": "SN5400_SIMX", + "name": "SN5400", "components": [ { "name": "ONIE" @@ -107,7 +107,8 @@ ], "thermals": [ { - "name": "ASIC" + "name": "ASIC", + "polling_interval": 3 }, { "name": "Ambient Fan Side Temp" diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/buffers_defaults_t0.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/buffers_defaults_t0.j2 index 5e4be75b823..2a0fd52b401 100644 --- a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/buffers_defaults_t0.j2 +++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/buffers_defaults_t0.j2 @@ -22,10 +22,10 @@ 'spinerouter_leafrouter' : '0m' } -%} -{% set ingress_lossless_pool_size = '144129024' %} +{% set ingress_lossless_pool_size = '125752320' %} {% set ingress_lossless_pool_xoff = '0' %} {% set egress_lossless_pool_size = '158229504' %} -{% set egress_lossy_pool_size = '144129024' %} +{% set egress_lossy_pool_size = '125752320' %} {% import 'buffers_defaults_objects.j2' as defs with context %} diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/buffers_defaults_t1.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/buffers_defaults_t1.j2 index 5e4be75b823..2a0fd52b401 100644 --- a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/buffers_defaults_t1.j2 +++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/buffers_defaults_t1.j2 @@ -22,10 +22,10 @@ 'spinerouter_leafrouter' : '0m' } -%} -{% set ingress_lossless_pool_size = '144129024' %} +{% set ingress_lossless_pool_size = '125752320' %} {% set ingress_lossless_pool_xoff = '0' %} {% set egress_lossless_pool_size = '158229504' %} -{% set egress_lossy_pool_size = '144129024' %} +{% set egress_lossy_pool_size = '125752320' %} {% import 'buffers_defaults_objects.j2' as defs with context %} diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/pmon_daemon_control.json b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/pmon_daemon_control.json index 281b96b71cc..1aaeefed3c2 100644 --- a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/pmon_daemon_control.json +++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/pmon_daemon_control.json @@ -1,5 +1,8 @@ { "skip_ledd": true, "skip_fancontrol": true, - "skip_xcvrd_cmis_mgr": false + "skip_xcvrd_cmis_mgr": false, + "xcvrd": { + "dom_temperature_poll_interval": 20 + } } diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/port_config.ini b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/port_config.ini index be9e26624a0..15e98143e98 100644 --- a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/port_config.ini +++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/port_config.ini @@ -1,6 +1,6 @@ ## ## SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES -## Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +## Copyright (c) 2024-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ## Apache-2.0 ## ## Licensed under the Apache License, Version 2.0 (the "License"); @@ -16,237 +16,237 @@ ## limitations under the License. ## -# name lanes alias index speed autoneg subport -Ethernet0 0 etp1a 1 100000 off 1 -Ethernet1 1 etp1b 1 100000 off 2 -Ethernet2 2 etp1c 1 100000 off 3 -Ethernet3 3 etp1d 1 100000 off 4 -Ethernet4 4 etp1e 1 100000 off 5 -Ethernet5 5 etp1f 1 100000 off 6 -Ethernet6 6 etp1g 1 100000 off 7 -Ethernet7 7 etp1h 1 100000 off 8 -Ethernet16 16 etp3a 3 100000 off 1 -Ethernet17 17 etp3b 3 100000 off 2 -Ethernet18 18 etp3c 3 100000 off 3 -Ethernet19 19 etp3d 3 100000 off 4 -Ethernet20 20 etp3e 3 100000 off 5 -Ethernet21 21 etp3f 3 100000 off 6 -Ethernet22 22 etp3g 3 100000 off 7 -Ethernet23 23 etp3h 3 100000 off 8 -Ethernet32 32 etp5a 5 100000 off 1 -Ethernet33 33 etp5b 5 100000 off 2 -Ethernet34 34 etp5c 5 100000 off 3 -Ethernet35 35 etp5d 5 100000 off 4 -Ethernet36 36 etp5e 5 100000 off 5 -Ethernet37 37 etp5f 5 100000 off 6 -Ethernet38 38 etp5g 5 100000 off 7 -Ethernet39 39 etp5h 5 100000 off 8 -Ethernet48 48 etp7a 7 100000 off 1 -Ethernet49 49 etp7b 7 100000 off 2 -Ethernet50 50 etp7c 7 100000 off 3 -Ethernet51 51 etp7d 7 100000 off 4 -Ethernet52 52 etp7e 7 100000 off 5 -Ethernet53 53 etp7f 7 100000 off 6 -Ethernet54 54 etp7g 7 100000 off 7 -Ethernet55 55 etp7h 7 100000 off 8 -Ethernet64 64 etp9a 9 100000 off 1 -Ethernet65 65 etp9b 9 100000 off 2 -Ethernet66 66 etp9c 9 100000 off 3 -Ethernet67 67 etp9d 9 100000 off 4 -Ethernet68 68 etp9e 9 100000 off 5 -Ethernet69 69 etp9f 9 100000 off 6 -Ethernet70 70 etp9g 9 100000 off 7 -Ethernet71 71 etp9h 9 100000 off 8 -Ethernet80 80 etp11a 11 100000 off 1 -Ethernet81 81 etp11b 11 100000 off 2 -Ethernet82 82 etp11c 11 100000 off 3 -Ethernet83 83 etp11d 11 100000 off 4 -Ethernet84 84 etp11e 11 100000 off 5 -Ethernet85 85 etp11f 11 100000 off 6 -Ethernet86 86 etp11g 11 100000 off 7 -Ethernet87 87 etp11h 11 100000 off 8 -Ethernet96 96,97,98,99 etp13a 13 400000 off 1 -Ethernet100 100,101,102,103 etp13b 13 400000 off 2 -Ethernet112 112 etp15a 15 100000 off 1 -Ethernet113 113 etp15b 15 100000 off 2 -Ethernet114 114 etp15c 15 100000 off 3 -Ethernet115 115 etp15d 15 100000 off 4 -Ethernet116 116 etp15e 15 100000 off 5 -Ethernet117 117 etp15f 15 100000 off 6 -Ethernet118 118 etp15g 15 100000 off 7 -Ethernet119 119 etp15h 15 100000 off 8 -Ethernet128 128,129,130,131 etp17a 17 400000 off 1 -Ethernet132 132,133,134,135 etp17b 17 400000 off 2 -Ethernet144 144 etp19a 19 100000 off 1 -Ethernet145 145 etp19b 19 100000 off 2 -Ethernet146 146 etp19c 19 100000 off 3 -Ethernet147 147 etp19d 19 100000 off 4 -Ethernet148 148 etp19e 19 100000 off 5 -Ethernet149 149 etp19f 19 100000 off 6 -Ethernet150 150 etp19g 19 100000 off 7 -Ethernet151 151 etp19h 19 100000 off 8 -Ethernet160 160 etp21a 21 100000 off 1 -Ethernet161 161 etp21b 21 100000 off 2 -Ethernet162 162 etp21c 21 100000 off 3 -Ethernet163 163 etp21d 21 100000 off 4 -Ethernet164 164 etp21e 21 100000 off 5 -Ethernet165 165 etp21f 21 100000 off 6 -Ethernet166 166 etp21g 21 100000 off 7 -Ethernet167 167 etp21h 21 100000 off 8 -Ethernet176 176 etp23a 23 100000 off 1 -Ethernet177 177 etp23b 23 100000 off 2 -Ethernet178 178 etp23c 23 100000 off 3 -Ethernet179 179 etp23d 23 100000 off 4 -Ethernet180 180 etp23e 23 100000 off 5 -Ethernet181 181 etp23f 23 100000 off 6 -Ethernet182 182 etp23g 23 100000 off 7 -Ethernet183 183 etp23h 23 100000 off 8 -Ethernet192 192 etp25a 25 100000 off 1 -Ethernet193 193 etp25b 25 100000 off 2 -Ethernet194 194 etp25c 25 100000 off 3 -Ethernet195 195 etp25d 25 100000 off 4 -Ethernet196 196 etp25e 25 100000 off 5 -Ethernet197 197 etp25f 25 100000 off 6 -Ethernet198 198 etp25g 25 100000 off 7 -Ethernet199 199 etp25h 25 100000 off 8 -Ethernet208 208 etp27a 27 100000 off 1 -Ethernet209 209 etp27b 27 100000 off 2 -Ethernet210 210 etp27c 27 100000 off 3 -Ethernet211 211 etp27d 27 100000 off 4 -Ethernet212 212 etp27e 27 100000 off 5 -Ethernet213 213 etp27f 27 100000 off 6 -Ethernet214 214 etp27g 27 100000 off 7 -Ethernet215 215 etp27h 27 100000 off 8 -Ethernet224 224 etp29a 29 100000 off 1 -Ethernet225 225 etp29b 29 100000 off 2 -Ethernet226 226 etp29c 29 100000 off 3 -Ethernet227 227 etp29d 29 100000 off 4 -Ethernet228 228 etp29e 29 100000 off 5 -Ethernet229 229 etp29f 29 100000 off 6 -Ethernet230 230 etp29g 29 100000 off 7 -Ethernet231 231 etp29h 29 100000 off 8 -Ethernet240 240 etp31a 31 100000 off 1 -Ethernet241 241 etp31b 31 100000 off 2 -Ethernet242 242 etp31c 31 100000 off 3 -Ethernet243 243 etp31d 31 100000 off 4 -Ethernet244 244 etp31e 31 100000 off 5 -Ethernet245 245 etp31f 31 100000 off 6 -Ethernet246 246 etp31g 31 100000 off 7 -Ethernet247 247 etp31h 31 100000 off 8 -Ethernet256 256 etp33a 33 100000 off 1 -Ethernet257 257 etp33b 33 100000 off 2 -Ethernet258 258 etp33c 33 100000 off 3 -Ethernet259 259 etp33d 33 100000 off 4 -Ethernet260 260 etp33e 33 100000 off 5 -Ethernet261 261 etp33f 33 100000 off 6 -Ethernet262 262 etp33g 33 100000 off 7 -Ethernet263 263 etp33h 33 100000 off 8 -Ethernet272 272 etp35a 35 100000 off 1 -Ethernet273 273 etp35b 35 100000 off 2 -Ethernet274 274 etp35c 35 100000 off 3 -Ethernet275 275 etp35d 35 100000 off 4 -Ethernet276 276 etp35e 35 100000 off 5 -Ethernet277 277 etp35f 35 100000 off 6 -Ethernet278 278 etp35g 35 100000 off 7 -Ethernet279 279 etp35h 35 100000 off 8 -Ethernet288 288 etp37a 37 100000 off 1 -Ethernet289 289 etp37b 37 100000 off 2 -Ethernet290 290 etp37c 37 100000 off 3 -Ethernet291 291 etp37d 37 100000 off 4 -Ethernet292 292 etp37e 37 100000 off 5 -Ethernet293 293 etp37f 37 100000 off 6 -Ethernet294 294 etp37g 37 100000 off 7 -Ethernet295 295 etp37h 37 100000 off 8 -Ethernet304 304 etp39a 39 100000 off 1 -Ethernet305 305 etp39b 39 100000 off 2 -Ethernet306 306 etp39c 39 100000 off 3 -Ethernet307 307 etp39d 39 100000 off 4 -Ethernet308 308 etp39e 39 100000 off 5 -Ethernet309 309 etp39f 39 100000 off 6 -Ethernet310 310 etp39g 39 100000 off 7 -Ethernet311 311 etp39h 39 100000 off 8 -Ethernet320 320 etp41a 41 100000 off 1 -Ethernet321 321 etp41b 41 100000 off 2 -Ethernet322 322 etp41c 41 100000 off 3 -Ethernet323 323 etp41d 41 100000 off 4 -Ethernet324 324 etp41e 41 100000 off 5 -Ethernet325 325 etp41f 41 100000 off 6 -Ethernet326 326 etp41g 41 100000 off 7 -Ethernet327 327 etp41h 41 100000 off 8 -Ethernet336 336 etp43a 43 100000 off 1 -Ethernet337 337 etp43b 43 100000 off 2 -Ethernet338 338 etp43c 43 100000 off 3 -Ethernet339 339 etp43d 43 100000 off 4 -Ethernet340 340 etp43e 43 100000 off 5 -Ethernet341 341 etp43f 43 100000 off 6 -Ethernet342 342 etp43g 43 100000 off 7 -Ethernet343 343 etp43h 43 100000 off 8 -Ethernet352 352,353,354,355 etp45a 45 400000 off 1 -Ethernet356 356,357,358,359 etp45b 45 400000 off 2 -Ethernet368 368 etp47a 47 100000 off 1 -Ethernet369 369 etp47b 47 100000 off 2 -Ethernet370 370 etp47c 47 100000 off 3 -Ethernet371 371 etp47d 47 100000 off 4 -Ethernet372 372 etp47e 47 100000 off 5 -Ethernet373 373 etp47f 47 100000 off 6 -Ethernet374 374 etp47g 47 100000 off 7 -Ethernet375 375 etp47h 47 100000 off 8 -Ethernet384 384,385,386,387 etp49a 49 400000 off 1 -Ethernet388 388,389,390,391 etp49b 49 400000 off 2 -Ethernet400 400 etp51a 51 100000 off 1 -Ethernet401 401 etp51b 51 100000 off 2 -Ethernet402 402 etp51c 51 100000 off 3 -Ethernet403 403 etp51d 51 100000 off 4 -Ethernet404 404 etp51e 51 100000 off 5 -Ethernet405 405 etp51f 51 100000 off 6 -Ethernet406 406 etp51g 51 100000 off 7 -Ethernet407 407 etp51h 51 100000 off 8 -Ethernet416 416 etp53a 53 100000 off 1 -Ethernet417 417 etp53b 53 100000 off 2 -Ethernet418 418 etp53c 53 100000 off 3 -Ethernet419 419 etp53d 53 100000 off 4 -Ethernet420 420 etp53e 53 100000 off 5 -Ethernet421 421 etp53f 53 100000 off 6 -Ethernet422 422 etp53g 53 100000 off 7 -Ethernet423 423 etp53h 53 100000 off 8 -Ethernet432 432 etp55a 55 100000 off 1 -Ethernet433 433 etp55b 55 100000 off 2 -Ethernet434 434 etp55c 55 100000 off 3 -Ethernet435 435 etp55d 55 100000 off 4 -Ethernet436 436 etp55e 55 100000 off 5 -Ethernet437 437 etp55f 55 100000 off 6 -Ethernet438 438 etp55g 55 100000 off 7 -Ethernet439 439 etp55h 55 100000 off 8 -Ethernet448 448 etp57a 57 100000 off 1 -Ethernet449 449 etp57b 57 100000 off 2 -Ethernet450 450 etp57c 57 100000 off 3 -Ethernet451 451 etp57d 57 100000 off 4 -Ethernet452 452 etp57e 57 100000 off 5 -Ethernet453 453 etp57f 57 100000 off 6 -Ethernet454 454 etp57g 57 100000 off 7 -Ethernet455 455 etp57h 57 100000 off 8 -Ethernet464 464 etp59a 59 100000 off 1 -Ethernet465 465 etp59b 59 100000 off 2 -Ethernet466 466 etp59c 59 100000 off 3 -Ethernet467 467 etp59d 59 100000 off 4 -Ethernet468 468 etp59e 59 100000 off 5 -Ethernet469 469 etp59f 59 100000 off 6 -Ethernet470 470 etp59g 59 100000 off 7 -Ethernet471 471 etp59h 59 100000 off 8 -Ethernet480 480 etp61a 61 100000 off 1 -Ethernet481 481 etp61b 61 100000 off 2 -Ethernet482 482 etp61c 61 100000 off 3 -Ethernet483 483 etp61d 61 100000 off 4 -Ethernet484 484 etp61e 61 100000 off 5 -Ethernet485 485 etp61f 61 100000 off 6 -Ethernet486 486 etp61g 61 100000 off 7 -Ethernet487 487 etp61h 61 100000 off 8 -Ethernet496 496 etp63a 63 100000 off 1 -Ethernet497 497 etp63b 63 100000 off 2 -Ethernet498 498 etp63c 63 100000 off 3 -Ethernet499 499 etp63d 63 100000 off 4 -Ethernet500 500 etp63e 63 100000 off 5 -Ethernet501 501 etp63f 63 100000 off 6 -Ethernet502 502 etp63g 63 100000 off 7 -Ethernet503 503 etp63h 63 100000 off 8 +# name lanes alias index speed autoneg +Ethernet0 0 etp1a 1 100000 off +Ethernet1 1 etp1b 1 100000 off +Ethernet2 2 etp1c 1 100000 off +Ethernet3 3 etp1d 1 100000 off +Ethernet4 4 etp1e 1 100000 off +Ethernet5 5 etp1f 1 100000 off +Ethernet6 6 etp1g 1 100000 off +Ethernet7 7 etp1h 1 100000 off +Ethernet16 16 etp3a 3 100000 off +Ethernet17 17 etp3b 3 100000 off +Ethernet18 18 etp3c 3 100000 off +Ethernet19 19 etp3d 3 100000 off +Ethernet20 20 etp3e 3 100000 off +Ethernet21 21 etp3f 3 100000 off +Ethernet22 22 etp3g 3 100000 off +Ethernet23 23 etp3h 3 100000 off +Ethernet32 32 etp5a 5 100000 off +Ethernet33 33 etp5b 5 100000 off +Ethernet34 34 etp5c 5 100000 off +Ethernet35 35 etp5d 5 100000 off +Ethernet36 36 etp5e 5 100000 off +Ethernet37 37 etp5f 5 100000 off +Ethernet38 38 etp5g 5 100000 off +Ethernet39 39 etp5h 5 100000 off +Ethernet48 48 etp7a 7 100000 off +Ethernet49 49 etp7b 7 100000 off +Ethernet50 50 etp7c 7 100000 off +Ethernet51 51 etp7d 7 100000 off +Ethernet52 52 etp7e 7 100000 off +Ethernet53 53 etp7f 7 100000 off +Ethernet54 54 etp7g 7 100000 off +Ethernet55 55 etp7h 7 100000 off +Ethernet64 64 etp9a 9 100000 off +Ethernet65 65 etp9b 9 100000 off +Ethernet66 66 etp9c 9 100000 off +Ethernet67 67 etp9d 9 100000 off +Ethernet68 68 etp9e 9 100000 off +Ethernet69 69 etp9f 9 100000 off +Ethernet70 70 etp9g 9 100000 off +Ethernet71 71 etp9h 9 100000 off +Ethernet80 80 etp11a 11 100000 off +Ethernet81 81 etp11b 11 100000 off +Ethernet82 82 etp11c 11 100000 off +Ethernet83 83 etp11d 11 100000 off +Ethernet84 84 etp11e 11 100000 off +Ethernet85 85 etp11f 11 100000 off +Ethernet86 86 etp11g 11 100000 off +Ethernet87 87 etp11h 11 100000 off +Ethernet96 96,97,98,99 etp13a 13 400000 off +Ethernet100 100,101,102,103 etp13b 13 400000 off +Ethernet112 112 etp15a 15 100000 off +Ethernet113 113 etp15b 15 100000 off +Ethernet114 114 etp15c 15 100000 off +Ethernet115 115 etp15d 15 100000 off +Ethernet116 116 etp15e 15 100000 off +Ethernet117 117 etp15f 15 100000 off +Ethernet118 118 etp15g 15 100000 off +Ethernet119 119 etp15h 15 100000 off +Ethernet128 128,129,130,131 etp17a 17 400000 off +Ethernet132 132,133,134,135 etp17b 17 400000 off +Ethernet144 144 etp19a 19 100000 off +Ethernet145 145 etp19b 19 100000 off +Ethernet146 146 etp19c 19 100000 off +Ethernet147 147 etp19d 19 100000 off +Ethernet148 148 etp19e 19 100000 off +Ethernet149 149 etp19f 19 100000 off +Ethernet150 150 etp19g 19 100000 off +Ethernet151 151 etp19h 19 100000 off +Ethernet160 160 etp21a 21 100000 off +Ethernet161 161 etp21b 21 100000 off +Ethernet162 162 etp21c 21 100000 off +Ethernet163 163 etp21d 21 100000 off +Ethernet164 164 etp21e 21 100000 off +Ethernet165 165 etp21f 21 100000 off +Ethernet166 166 etp21g 21 100000 off +Ethernet167 167 etp21h 21 100000 off +Ethernet176 176 etp23a 23 100000 off +Ethernet177 177 etp23b 23 100000 off +Ethernet178 178 etp23c 23 100000 off +Ethernet179 179 etp23d 23 100000 off +Ethernet180 180 etp23e 23 100000 off +Ethernet181 181 etp23f 23 100000 off +Ethernet182 182 etp23g 23 100000 off +Ethernet183 183 etp23h 23 100000 off +Ethernet192 192 etp25a 25 100000 off +Ethernet193 193 etp25b 25 100000 off +Ethernet194 194 etp25c 25 100000 off +Ethernet195 195 etp25d 25 100000 off +Ethernet196 196 etp25e 25 100000 off +Ethernet197 197 etp25f 25 100000 off +Ethernet198 198 etp25g 25 100000 off +Ethernet199 199 etp25h 25 100000 off +Ethernet208 208 etp27a 27 100000 off +Ethernet209 209 etp27b 27 100000 off +Ethernet210 210 etp27c 27 100000 off +Ethernet211 211 etp27d 27 100000 off +Ethernet212 212 etp27e 27 100000 off +Ethernet213 213 etp27f 27 100000 off +Ethernet214 214 etp27g 27 100000 off +Ethernet215 215 etp27h 27 100000 off +Ethernet224 224 etp29a 29 100000 off +Ethernet225 225 etp29b 29 100000 off +Ethernet226 226 etp29c 29 100000 off +Ethernet227 227 etp29d 29 100000 off +Ethernet228 228 etp29e 29 100000 off +Ethernet229 229 etp29f 29 100000 off +Ethernet230 230 etp29g 29 100000 off +Ethernet231 231 etp29h 29 100000 off +Ethernet240 240 etp31a 31 100000 off +Ethernet241 241 etp31b 31 100000 off +Ethernet242 242 etp31c 31 100000 off +Ethernet243 243 etp31d 31 100000 off +Ethernet244 244 etp31e 31 100000 off +Ethernet245 245 etp31f 31 100000 off +Ethernet246 246 etp31g 31 100000 off +Ethernet247 247 etp31h 31 100000 off +Ethernet256 256 etp33a 33 100000 off +Ethernet257 257 etp33b 33 100000 off +Ethernet258 258 etp33c 33 100000 off +Ethernet259 259 etp33d 33 100000 off +Ethernet260 260 etp33e 33 100000 off +Ethernet261 261 etp33f 33 100000 off +Ethernet262 262 etp33g 33 100000 off +Ethernet263 263 etp33h 33 100000 off +Ethernet272 272 etp35a 35 100000 off +Ethernet273 273 etp35b 35 100000 off +Ethernet274 274 etp35c 35 100000 off +Ethernet275 275 etp35d 35 100000 off +Ethernet276 276 etp35e 35 100000 off +Ethernet277 277 etp35f 35 100000 off +Ethernet278 278 etp35g 35 100000 off +Ethernet279 279 etp35h 35 100000 off +Ethernet288 288 etp37a 37 100000 off +Ethernet289 289 etp37b 37 100000 off +Ethernet290 290 etp37c 37 100000 off +Ethernet291 291 etp37d 37 100000 off +Ethernet292 292 etp37e 37 100000 off +Ethernet293 293 etp37f 37 100000 off +Ethernet294 294 etp37g 37 100000 off +Ethernet295 295 etp37h 37 100000 off +Ethernet304 304 etp39a 39 100000 off +Ethernet305 305 etp39b 39 100000 off +Ethernet306 306 etp39c 39 100000 off +Ethernet307 307 etp39d 39 100000 off +Ethernet308 308 etp39e 39 100000 off +Ethernet309 309 etp39f 39 100000 off +Ethernet310 310 etp39g 39 100000 off +Ethernet311 311 etp39h 39 100000 off +Ethernet320 320 etp41a 41 100000 off +Ethernet321 321 etp41b 41 100000 off +Ethernet322 322 etp41c 41 100000 off +Ethernet323 323 etp41d 41 100000 off +Ethernet324 324 etp41e 41 100000 off +Ethernet325 325 etp41f 41 100000 off +Ethernet326 326 etp41g 41 100000 off +Ethernet327 327 etp41h 41 100000 off +Ethernet336 336 etp43a 43 100000 off +Ethernet337 337 etp43b 43 100000 off +Ethernet338 338 etp43c 43 100000 off +Ethernet339 339 etp43d 43 100000 off +Ethernet340 340 etp43e 43 100000 off +Ethernet341 341 etp43f 43 100000 off +Ethernet342 342 etp43g 43 100000 off +Ethernet343 343 etp43h 43 100000 off +Ethernet352 352,353,354,355 etp45a 45 400000 off +Ethernet356 356,357,358,359 etp45b 45 400000 off +Ethernet368 368 etp47a 47 100000 off +Ethernet369 369 etp47b 47 100000 off +Ethernet370 370 etp47c 47 100000 off +Ethernet371 371 etp47d 47 100000 off +Ethernet372 372 etp47e 47 100000 off +Ethernet373 373 etp47f 47 100000 off +Ethernet374 374 etp47g 47 100000 off +Ethernet375 375 etp47h 47 100000 off +Ethernet384 384,385,386,387 etp49a 49 400000 off +Ethernet388 388,389,390,391 etp49b 49 400000 off +Ethernet400 400 etp51a 51 100000 off +Ethernet401 401 etp51b 51 100000 off +Ethernet402 402 etp51c 51 100000 off +Ethernet403 403 etp51d 51 100000 off +Ethernet404 404 etp51e 51 100000 off +Ethernet405 405 etp51f 51 100000 off +Ethernet406 406 etp51g 51 100000 off +Ethernet407 407 etp51h 51 100000 off +Ethernet416 416 etp53a 53 100000 off +Ethernet417 417 etp53b 53 100000 off +Ethernet418 418 etp53c 53 100000 off +Ethernet419 419 etp53d 53 100000 off +Ethernet420 420 etp53e 53 100000 off +Ethernet421 421 etp53f 53 100000 off +Ethernet422 422 etp53g 53 100000 off +Ethernet423 423 etp53h 53 100000 off +Ethernet432 432 etp55a 55 100000 off +Ethernet433 433 etp55b 55 100000 off +Ethernet434 434 etp55c 55 100000 off +Ethernet435 435 etp55d 55 100000 off +Ethernet436 436 etp55e 55 100000 off +Ethernet437 437 etp55f 55 100000 off +Ethernet438 438 etp55g 55 100000 off +Ethernet439 439 etp55h 55 100000 off +Ethernet448 448 etp57a 57 100000 off +Ethernet449 449 etp57b 57 100000 off +Ethernet450 450 etp57c 57 100000 off +Ethernet451 451 etp57d 57 100000 off +Ethernet452 452 etp57e 57 100000 off +Ethernet453 453 etp57f 57 100000 off +Ethernet454 454 etp57g 57 100000 off +Ethernet455 455 etp57h 57 100000 off +Ethernet464 464 etp59a 59 100000 off +Ethernet465 465 etp59b 59 100000 off +Ethernet466 466 etp59c 59 100000 off +Ethernet467 467 etp59d 59 100000 off +Ethernet468 468 etp59e 59 100000 off +Ethernet469 469 etp59f 59 100000 off +Ethernet470 470 etp59g 59 100000 off +Ethernet471 471 etp59h 59 100000 off +Ethernet480 480 etp61a 61 100000 off +Ethernet481 481 etp61b 61 100000 off +Ethernet482 482 etp61c 61 100000 off +Ethernet483 483 etp61d 61 100000 off +Ethernet484 484 etp61e 61 100000 off +Ethernet485 485 etp61f 61 100000 off +Ethernet486 486 etp61g 61 100000 off +Ethernet487 487 etp61h 61 100000 off +Ethernet496 496 etp63a 63 100000 off +Ethernet497 497 etp63b 63 100000 off +Ethernet498 498 etp63c 63 100000 off +Ethernet499 499 etp63d 63 100000 off +Ethernet500 500 etp63e 63 100000 off +Ethernet501 501 etp63f 63 100000 off +Ethernet502 502 etp63g 63 100000 off +Ethernet503 503 etp63h 63 100000 off Ethernet512 512 etp65 65 10000 diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/sai.profile b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/sai.profile index c27ec9fdaff..ba2278123d8 100644 --- a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/sai.profile +++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C224O8/sai.profile @@ -3,3 +3,5 @@ SAI_INDEPENDENT_MODULE_MODE=1 SAI_DEFAULT_SWITCHING_MODE_STORE_FORWARD=1 SAI_NOT_DROP_SIP_DIP_LINK_LOCAL=1 SAI_KEY_DISABLE_PORT_ALPHA=1 +SAI_DROP_OVER_MAX_KEY_LIST=1,65 +SAI_DROP_OVER_MAX_VALUE_LIST=307200 diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/buffers_defaults_t0.j2 b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/buffers_defaults_t0.j2 index a2390d76524..2a0fd52b401 100644 --- a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/buffers_defaults_t0.j2 +++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/buffers_defaults_t0.j2 @@ -22,10 +22,10 @@ 'spinerouter_leafrouter' : '0m' } -%} -{% set ingress_lossless_pool_size = '142703616' %} +{% set ingress_lossless_pool_size = '125752320' %} {% set ingress_lossless_pool_xoff = '0' %} {% set egress_lossless_pool_size = '158229504' %} -{% set egress_lossy_pool_size = '142703616' %} +{% set egress_lossy_pool_size = '125752320' %} {% import 'buffers_defaults_objects.j2' as defs with context %} diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/pmon_daemon_control.json b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/pmon_daemon_control.json index 281b96b71cc..1aaeefed3c2 100644 --- a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/pmon_daemon_control.json +++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/pmon_daemon_control.json @@ -1,5 +1,8 @@ { "skip_ledd": true, "skip_fancontrol": true, - "skip_xcvrd_cmis_mgr": false + "skip_xcvrd_cmis_mgr": false, + "xcvrd": { + "dom_temperature_poll_interval": 20 + } } diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/port_config.ini b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/port_config.ini index b680de8371f..c1af3146f69 100644 --- a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/port_config.ini +++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/port_config.ini @@ -1,6 +1,6 @@ ## ## SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES -## Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +## Copyright (c) 2024-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ## Apache-2.0 ## ## Licensed under the Apache License, Version 2.0 (the "License"); @@ -14,263 +14,262 @@ ## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. ## See the License for the specific language governing permissions and ## limitations under the License. -## -# name lanes alias index speed autoneg subport -Ethernet0 0 etp1a 1 100000 off 1 -Ethernet1 1 etp1b 1 100000 off 2 -Ethernet2 2 etp1c 1 100000 off 3 -Ethernet3 3 etp1d 1 100000 off 4 -Ethernet4 4 etp1e 1 100000 off 5 -Ethernet5 5 etp1f 1 100000 off 6 -Ethernet6 6 etp1g 1 100000 off 7 -Ethernet7 7 etp1h 1 100000 off 8 -Ethernet16 16 etp3a 3 100000 off 1 -Ethernet17 17 etp3b 3 100000 off 2 -Ethernet18 18 etp3c 3 100000 off 3 -Ethernet19 19 etp3d 3 100000 off 4 -Ethernet20 20 etp3e 3 100000 off 5 -Ethernet21 21 etp3f 3 100000 off 6 -Ethernet22 22 etp3g 3 100000 off 7 -Ethernet23 23 etp3h 3 100000 off 8 -Ethernet32 32 etp5a 5 100000 off 1 -Ethernet33 33 etp5b 5 100000 off 2 -Ethernet34 34 etp5c 5 100000 off 3 -Ethernet35 35 etp5d 5 100000 off 4 -Ethernet36 36 etp5e 5 100000 off 5 -Ethernet37 37 etp5f 5 100000 off 6 -Ethernet38 38 etp5g 5 100000 off 7 -Ethernet39 39 etp5h 5 100000 off 8 -Ethernet48 48 etp7a 7 100000 off 1 -Ethernet49 49 etp7b 7 100000 off 2 -Ethernet50 50 etp7c 7 100000 off 3 -Ethernet51 51 etp7d 7 100000 off 4 -Ethernet52 52 etp7e 7 100000 off 5 -Ethernet53 53 etp7f 7 100000 off 6 -Ethernet54 54 etp7g 7 100000 off 7 -Ethernet55 55 etp7h 7 100000 off 8 -Ethernet64 64 etp9a 9 100000 off 1 -Ethernet65 65 etp9b 9 100000 off 2 -Ethernet66 66 etp9c 9 100000 off 3 -Ethernet67 67 etp9d 9 100000 off 4 -Ethernet68 68 etp9e 9 100000 off 5 -Ethernet69 69 etp9f 9 100000 off 6 -Ethernet70 70 etp9g 9 100000 off 7 -Ethernet71 71 etp9h 9 100000 off 8 -Ethernet80 80 etp11a 11 100000 off 1 -Ethernet81 81 etp11b 11 100000 off 2 -Ethernet82 82 etp11c 11 100000 off 3 -Ethernet83 83 etp11d 11 100000 off 4 -Ethernet84 84 etp11e 11 100000 off 5 -Ethernet85 85 etp11f 11 100000 off 6 -Ethernet86 86 etp11g 11 100000 off 7 -Ethernet87 87 etp11h 11 100000 off 8 -Ethernet96 96 etp13a 13 100000 off 1 -Ethernet97 97 etp13b 13 100000 off 2 -Ethernet98 98 etp13c 13 100000 off 3 -Ethernet99 99 etp13d 13 100000 off 4 -Ethernet100 100 etp13e 13 100000 off 5 -Ethernet101 101 etp13f 13 100000 off 6 -Ethernet102 102 etp13g 13 100000 off 7 -Ethernet103 103 etp13h 13 100000 off 8 -Ethernet112 112 etp15a 15 100000 off 1 -Ethernet113 113 etp15b 15 100000 off 2 -Ethernet114 114 etp15c 15 100000 off 3 -Ethernet115 115 etp15d 15 100000 off 4 -Ethernet116 116 etp15e 15 100000 off 5 -Ethernet117 117 etp15f 15 100000 off 6 -Ethernet118 118 etp15g 15 100000 off 7 -Ethernet119 119 etp15h 15 100000 off 8 -Ethernet128 128 etp17a 17 100000 off 1 -Ethernet129 129 etp17b 17 100000 off 2 -Ethernet130 130 etp17c 17 100000 off 3 -Ethernet131 131 etp17d 17 100000 off 4 -Ethernet132 132 etp17e 17 100000 off 5 -Ethernet133 133 etp17f 17 100000 off 6 -Ethernet134 134 etp17g 17 100000 off 7 -Ethernet135 135 etp17h 17 100000 off 8 -Ethernet144 144 etp19a 19 100000 off 1 -Ethernet145 145 etp19b 19 100000 off 2 -Ethernet146 146 etp19c 19 100000 off 3 -Ethernet147 147 etp19d 19 100000 off 4 -Ethernet148 148 etp19e 19 100000 off 5 -Ethernet149 149 etp19f 19 100000 off 6 -Ethernet150 150 etp19g 19 100000 off 7 -Ethernet151 151 etp19h 19 100000 off 8 -Ethernet160 160 etp21a 21 100000 off 1 -Ethernet161 161 etp21b 21 100000 off 2 -Ethernet162 162 etp21c 21 100000 off 3 -Ethernet163 163 etp21d 21 100000 off 4 -Ethernet164 164 etp21e 21 100000 off 5 -Ethernet165 165 etp21f 21 100000 off 6 -Ethernet166 166 etp21g 21 100000 off 7 -Ethernet167 167 etp21h 21 100000 off 8 -Ethernet176 176 etp23a 23 100000 off 1 -Ethernet177 177 etp23b 23 100000 off 2 -Ethernet178 178 etp23c 23 100000 off 3 -Ethernet179 179 etp23d 23 100000 off 4 -Ethernet180 180 etp23e 23 100000 off 5 -Ethernet181 181 etp23f 23 100000 off 6 -Ethernet182 182 etp23g 23 100000 off 7 -Ethernet183 183 etp23h 23 100000 off 8 -Ethernet192 192 etp25a 25 100000 off 1 -Ethernet193 193 etp25b 25 100000 off 2 -Ethernet194 194 etp25c 25 100000 off 3 -Ethernet195 195 etp25d 25 100000 off 4 -Ethernet196 196 etp25e 25 100000 off 5 -Ethernet197 197 etp25f 25 100000 off 6 -Ethernet198 198 etp25g 25 100000 off 7 -Ethernet199 199 etp25h 25 100000 off 8 -Ethernet208 208 etp27a 27 100000 off 1 -Ethernet209 209 etp27b 27 100000 off 2 -Ethernet210 210 etp27c 27 100000 off 3 -Ethernet211 211 etp27d 27 100000 off 4 -Ethernet212 212 etp27e 27 100000 off 5 -Ethernet213 213 etp27f 27 100000 off 6 -Ethernet214 214 etp27g 27 100000 off 7 -Ethernet215 215 etp27h 27 100000 off 8 -Ethernet224 224 etp29a 29 100000 off 1 -Ethernet225 225 etp29b 29 100000 off 2 -Ethernet226 226 etp29c 29 100000 off 3 -Ethernet227 227 etp29d 29 100000 off 4 -Ethernet228 228 etp29e 29 100000 off 5 -Ethernet229 229 etp29f 29 100000 off 6 -Ethernet230 230 etp29g 29 100000 off 7 -Ethernet231 231 etp29h 29 100000 off 8 -Ethernet240 240 etp31a 31 100000 off 1 -Ethernet241 241 etp31b 31 100000 off 2 -Ethernet242 242 etp31c 31 100000 off 3 -Ethernet243 243 etp31d 31 100000 off 4 -Ethernet244 244 etp31e 31 100000 off 5 -Ethernet245 245 etp31f 31 100000 off 6 -Ethernet246 246 etp31g 31 100000 off 7 -Ethernet247 247 etp31h 31 100000 off 8 -Ethernet256 256 etp33a 33 100000 off 1 -Ethernet257 257 etp33b 33 100000 off 2 -Ethernet258 258 etp33c 33 100000 off 3 -Ethernet259 259 etp33d 33 100000 off 4 -Ethernet260 260 etp33e 33 100000 off 5 -Ethernet261 261 etp33f 33 100000 off 6 -Ethernet262 262 etp33g 33 100000 off 7 -Ethernet263 263 etp33h 33 100000 off 8 -Ethernet272 272 etp35a 35 100000 off 1 -Ethernet273 273 etp35b 35 100000 off 2 -Ethernet274 274 etp35c 35 100000 off 3 -Ethernet275 275 etp35d 35 100000 off 4 -Ethernet276 276 etp35e 35 100000 off 5 -Ethernet277 277 etp35f 35 100000 off 6 -Ethernet278 278 etp35g 35 100000 off 7 -Ethernet279 279 etp35h 35 100000 off 8 -Ethernet288 288 etp37a 37 100000 off 1 -Ethernet289 289 etp37b 37 100000 off 2 -Ethernet290 290 etp37c 37 100000 off 3 -Ethernet291 291 etp37d 37 100000 off 4 -Ethernet292 292 etp37e 37 100000 off 5 -Ethernet293 293 etp37f 37 100000 off 6 -Ethernet294 294 etp37g 37 100000 off 7 -Ethernet295 295 etp37h 37 100000 off 8 -Ethernet304 304 etp39a 39 100000 off 1 -Ethernet305 305 etp39b 39 100000 off 2 -Ethernet306 306 etp39c 39 100000 off 3 -Ethernet307 307 etp39d 39 100000 off 4 -Ethernet308 308 etp39e 39 100000 off 5 -Ethernet309 309 etp39f 39 100000 off 6 -Ethernet310 310 etp39g 39 100000 off 7 -Ethernet311 311 etp39h 39 100000 off 8 -Ethernet320 320 etp41a 41 100000 off 1 -Ethernet321 321 etp41b 41 100000 off 2 -Ethernet322 322 etp41c 41 100000 off 3 -Ethernet323 323 etp41d 41 100000 off 4 -Ethernet324 324 etp41e 41 100000 off 5 -Ethernet325 325 etp41f 41 100000 off 6 -Ethernet326 326 etp41g 41 100000 off 7 -Ethernet327 327 etp41h 41 100000 off 8 -Ethernet336 336 etp43a 43 100000 off 1 -Ethernet337 337 etp43b 43 100000 off 2 -Ethernet338 338 etp43c 43 100000 off 3 -Ethernet339 339 etp43d 43 100000 off 4 -Ethernet340 340 etp43e 43 100000 off 5 -Ethernet341 341 etp43f 43 100000 off 6 -Ethernet342 342 etp43g 43 100000 off 7 -Ethernet343 343 etp43h 43 100000 off 8 -Ethernet352 352 etp45a 45 100000 off 1 -Ethernet353 353 etp45b 45 100000 off 2 -Ethernet354 354 etp45c 45 100000 off 3 -Ethernet355 355 etp45d 45 100000 off 4 -Ethernet356 356 etp45e 45 100000 off 5 -Ethernet357 357 etp45f 45 100000 off 6 -Ethernet358 358 etp45g 45 100000 off 7 -Ethernet359 359 etp45h 45 100000 off 8 -Ethernet368 368 etp47a 47 100000 off 1 -Ethernet369 369 etp47b 47 100000 off 2 -Ethernet370 370 etp47c 47 100000 off 3 -Ethernet371 371 etp47d 47 100000 off 4 -Ethernet372 372 etp47e 47 100000 off 5 -Ethernet373 373 etp47f 47 100000 off 6 -Ethernet374 374 etp47g 47 100000 off 7 -Ethernet375 375 etp47h 47 100000 off 8 -Ethernet384 384 etp49a 49 100000 off 1 -Ethernet385 385 etp49b 49 100000 off 2 -Ethernet386 386 etp49c 49 100000 off 3 -Ethernet387 387 etp49d 49 100000 off 4 -Ethernet388 388 etp49e 49 100000 off 5 -Ethernet389 389 etp49f 49 100000 off 6 -Ethernet390 390 etp49g 49 100000 off 7 -Ethernet391 391 etp49h 49 100000 off 8 -Ethernet400 400 etp51a 51 100000 off 1 -Ethernet401 401 etp51b 51 100000 off 2 -Ethernet402 402 etp51c 51 100000 off 3 -Ethernet403 403 etp51d 51 100000 off 4 -Ethernet404 404 etp51e 51 100000 off 5 -Ethernet405 405 etp51f 51 100000 off 6 -Ethernet406 406 etp51g 51 100000 off 7 -Ethernet407 407 etp51h 51 100000 off 8 -Ethernet416 416 etp53a 53 100000 off 1 -Ethernet417 417 etp53b 53 100000 off 2 -Ethernet418 418 etp53c 53 100000 off 3 -Ethernet419 419 etp53d 53 100000 off 4 -Ethernet420 420 etp53e 53 100000 off 5 -Ethernet421 421 etp53f 53 100000 off 6 -Ethernet422 422 etp53g 53 100000 off 7 -Ethernet423 423 etp53h 53 100000 off 8 -Ethernet432 432 etp55a 55 100000 off 1 -Ethernet433 433 etp55b 55 100000 off 2 -Ethernet434 434 etp55c 55 100000 off 3 -Ethernet435 435 etp55d 55 100000 off 4 -Ethernet436 436 etp55e 55 100000 off 5 -Ethernet437 437 etp55f 55 100000 off 6 -Ethernet438 438 etp55g 55 100000 off 7 -Ethernet439 439 etp55h 55 100000 off 8 -Ethernet448 448 etp57a 57 100000 off 1 -Ethernet449 449 etp57b 57 100000 off 2 -Ethernet450 450 etp57c 57 100000 off 3 -Ethernet451 451 etp57d 57 100000 off 4 -Ethernet452 452 etp57e 57 100000 off 5 -Ethernet453 453 etp57f 57 100000 off 6 -Ethernet454 454 etp57g 57 100000 off 7 -Ethernet455 455 etp57h 57 100000 off 8 -Ethernet464 464 etp59a 59 100000 off 1 -Ethernet465 465 etp59b 59 100000 off 2 -Ethernet466 466 etp59c 59 100000 off 3 -Ethernet467 467 etp59d 59 100000 off 4 -Ethernet468 468 etp59e 59 100000 off 5 -Ethernet469 469 etp59f 59 100000 off 6 -Ethernet470 470 etp59g 59 100000 off 7 -Ethernet471 471 etp59h 59 100000 off 8 -Ethernet480 480 etp61a 61 100000 off 1 -Ethernet481 481 etp61b 61 100000 off 2 -Ethernet482 482 etp61c 61 100000 off 3 -Ethernet483 483 etp61d 61 100000 off 4 -Ethernet484 484 etp61e 61 100000 off 5 -Ethernet485 485 etp61f 61 100000 off 6 -Ethernet486 486 etp61g 61 100000 off 7 -Ethernet487 487 etp61h 61 100000 off 8 -Ethernet496 496 etp63a 63 100000 off 1 -Ethernet497 497 etp63b 63 100000 off 2 -Ethernet498 498 etp63c 63 100000 off 3 -Ethernet499 499 etp63d 63 100000 off 4 -Ethernet500 500 etp63e 63 100000 off 5 -Ethernet501 501 etp63f 63 100000 off 6 -Ethernet502 502 etp63g 63 100000 off 7 -Ethernet503 503 etp63h 63 100000 off 8 -Ethernet512 512 etp65 65 10000 +# name lanes alias index speed autoneg +Ethernet0 0 etp1a 1 100000 off +Ethernet1 1 etp1b 1 100000 off +Ethernet2 2 etp1c 1 100000 off +Ethernet3 3 etp1d 1 100000 off +Ethernet4 4 etp1e 1 100000 off +Ethernet5 5 etp1f 1 100000 off +Ethernet6 6 etp1g 1 100000 off +Ethernet7 7 etp1h 1 100000 off +Ethernet16 16 etp3a 3 100000 off +Ethernet17 17 etp3b 3 100000 off +Ethernet18 18 etp3c 3 100000 off +Ethernet19 19 etp3d 3 100000 off +Ethernet20 20 etp3e 3 100000 off +Ethernet21 21 etp3f 3 100000 off +Ethernet22 22 etp3g 3 100000 off +Ethernet23 23 etp3h 3 100000 off +Ethernet32 32 etp5a 5 100000 off +Ethernet33 33 etp5b 5 100000 off +Ethernet34 34 etp5c 5 100000 off +Ethernet35 35 etp5d 5 100000 off +Ethernet36 36 etp5e 5 100000 off +Ethernet37 37 etp5f 5 100000 off +Ethernet38 38 etp5g 5 100000 off +Ethernet39 39 etp5h 5 100000 off +Ethernet48 48 etp7a 7 100000 off +Ethernet49 49 etp7b 7 100000 off +Ethernet50 50 etp7c 7 100000 off +Ethernet51 51 etp7d 7 100000 off +Ethernet52 52 etp7e 7 100000 off +Ethernet53 53 etp7f 7 100000 off +Ethernet54 54 etp7g 7 100000 off +Ethernet55 55 etp7h 7 100000 off +Ethernet64 64 etp9a 9 100000 off +Ethernet65 65 etp9b 9 100000 off +Ethernet66 66 etp9c 9 100000 off +Ethernet67 67 etp9d 9 100000 off +Ethernet68 68 etp9e 9 100000 off +Ethernet69 69 etp9f 9 100000 off +Ethernet70 70 etp9g 9 100000 off +Ethernet71 71 etp9h 9 100000 off +Ethernet80 80 etp11a 11 100000 off +Ethernet81 81 etp11b 11 100000 off +Ethernet82 82 etp11c 11 100000 off +Ethernet83 83 etp11d 11 100000 off +Ethernet84 84 etp11e 11 100000 off +Ethernet85 85 etp11f 11 100000 off +Ethernet86 86 etp11g 11 100000 off +Ethernet87 87 etp11h 11 100000 off +Ethernet96 96 etp13a 13 100000 off +Ethernet97 97 etp13b 13 100000 off +Ethernet98 98 etp13c 13 100000 off +Ethernet99 99 etp13d 13 100000 off +Ethernet100 100 etp13e 13 100000 off +Ethernet101 101 etp13f 13 100000 off +Ethernet102 102 etp13g 13 100000 off +Ethernet103 103 etp13h 13 100000 off +Ethernet112 112 etp15a 15 100000 off +Ethernet113 113 etp15b 15 100000 off +Ethernet114 114 etp15c 15 100000 off +Ethernet115 115 etp15d 15 100000 off +Ethernet116 116 etp15e 15 100000 off +Ethernet117 117 etp15f 15 100000 off +Ethernet118 118 etp15g 15 100000 off +Ethernet119 119 etp15h 15 100000 off +Ethernet128 128 etp17a 17 100000 off +Ethernet129 129 etp17b 17 100000 off +Ethernet130 130 etp17c 17 100000 off +Ethernet131 131 etp17d 17 100000 off +Ethernet132 132 etp17e 17 100000 off +Ethernet133 133 etp17f 17 100000 off +Ethernet134 134 etp17g 17 100000 off +Ethernet135 135 etp17h 17 100000 off +Ethernet144 144 etp19a 19 100000 off +Ethernet145 145 etp19b 19 100000 off +Ethernet146 146 etp19c 19 100000 off +Ethernet147 147 etp19d 19 100000 off +Ethernet148 148 etp19e 19 100000 off +Ethernet149 149 etp19f 19 100000 off +Ethernet150 150 etp19g 19 100000 off +Ethernet151 151 etp19h 19 100000 off +Ethernet160 160 etp21a 21 100000 off +Ethernet161 161 etp21b 21 100000 off +Ethernet162 162 etp21c 21 100000 off +Ethernet163 163 etp21d 21 100000 off +Ethernet164 164 etp21e 21 100000 off +Ethernet165 165 etp21f 21 100000 off +Ethernet166 166 etp21g 21 100000 off +Ethernet167 167 etp21h 21 100000 off +Ethernet176 176 etp23a 23 100000 off +Ethernet177 177 etp23b 23 100000 off +Ethernet178 178 etp23c 23 100000 off +Ethernet179 179 etp23d 23 100000 off +Ethernet180 180 etp23e 23 100000 off +Ethernet181 181 etp23f 23 100000 off +Ethernet182 182 etp23g 23 100000 off +Ethernet183 183 etp23h 23 100000 off +Ethernet192 192 etp25a 25 100000 off +Ethernet193 193 etp25b 25 100000 off +Ethernet194 194 etp25c 25 100000 off +Ethernet195 195 etp25d 25 100000 off +Ethernet196 196 etp25e 25 100000 off +Ethernet197 197 etp25f 25 100000 off +Ethernet198 198 etp25g 25 100000 off +Ethernet199 199 etp25h 25 100000 off +Ethernet208 208 etp27a 27 100000 off +Ethernet209 209 etp27b 27 100000 off +Ethernet210 210 etp27c 27 100000 off +Ethernet211 211 etp27d 27 100000 off +Ethernet212 212 etp27e 27 100000 off +Ethernet213 213 etp27f 27 100000 off +Ethernet214 214 etp27g 27 100000 off +Ethernet215 215 etp27h 27 100000 off +Ethernet224 224 etp29a 29 100000 off +Ethernet225 225 etp29b 29 100000 off +Ethernet226 226 etp29c 29 100000 off +Ethernet227 227 etp29d 29 100000 off +Ethernet228 228 etp29e 29 100000 off +Ethernet229 229 etp29f 29 100000 off +Ethernet230 230 etp29g 29 100000 off +Ethernet231 231 etp29h 29 100000 off +Ethernet240 240 etp31a 31 100000 off +Ethernet241 241 etp31b 31 100000 off +Ethernet242 242 etp31c 31 100000 off +Ethernet243 243 etp31d 31 100000 off +Ethernet244 244 etp31e 31 100000 off +Ethernet245 245 etp31f 31 100000 off +Ethernet246 246 etp31g 31 100000 off +Ethernet247 247 etp31h 31 100000 off +Ethernet256 256 etp33a 33 100000 off +Ethernet257 257 etp33b 33 100000 off +Ethernet258 258 etp33c 33 100000 off +Ethernet259 259 etp33d 33 100000 off +Ethernet260 260 etp33e 33 100000 off +Ethernet261 261 etp33f 33 100000 off +Ethernet262 262 etp33g 33 100000 off +Ethernet263 263 etp33h 33 100000 off +Ethernet272 272 etp35a 35 100000 off +Ethernet273 273 etp35b 35 100000 off +Ethernet274 274 etp35c 35 100000 off +Ethernet275 275 etp35d 35 100000 off +Ethernet276 276 etp35e 35 100000 off +Ethernet277 277 etp35f 35 100000 off +Ethernet278 278 etp35g 35 100000 off +Ethernet279 279 etp35h 35 100000 off +Ethernet288 288 etp37a 37 100000 off +Ethernet289 289 etp37b 37 100000 off +Ethernet290 290 etp37c 37 100000 off +Ethernet291 291 etp37d 37 100000 off +Ethernet292 292 etp37e 37 100000 off +Ethernet293 293 etp37f 37 100000 off +Ethernet294 294 etp37g 37 100000 off +Ethernet295 295 etp37h 37 100000 off +Ethernet304 304 etp39a 39 100000 off +Ethernet305 305 etp39b 39 100000 off +Ethernet306 306 etp39c 39 100000 off +Ethernet307 307 etp39d 39 100000 off +Ethernet308 308 etp39e 39 100000 off +Ethernet309 309 etp39f 39 100000 off +Ethernet310 310 etp39g 39 100000 off +Ethernet311 311 etp39h 39 100000 off +Ethernet320 320 etp41a 41 100000 off +Ethernet321 321 etp41b 41 100000 off +Ethernet322 322 etp41c 41 100000 off +Ethernet323 323 etp41d 41 100000 off +Ethernet324 324 etp41e 41 100000 off +Ethernet325 325 etp41f 41 100000 off +Ethernet326 326 etp41g 41 100000 off +Ethernet327 327 etp41h 41 100000 off +Ethernet336 336 etp43a 43 100000 off +Ethernet337 337 etp43b 43 100000 off +Ethernet338 338 etp43c 43 100000 off +Ethernet339 339 etp43d 43 100000 off +Ethernet340 340 etp43e 43 100000 off +Ethernet341 341 etp43f 43 100000 off +Ethernet342 342 etp43g 43 100000 off +Ethernet343 343 etp43h 43 100000 off +Ethernet352 352 etp45a 45 100000 off +Ethernet353 353 etp45b 45 100000 off +Ethernet354 354 etp45c 45 100000 off +Ethernet355 355 etp45d 45 100000 off +Ethernet356 356 etp45e 45 100000 off +Ethernet357 357 etp45f 45 100000 off +Ethernet358 358 etp45g 45 100000 off +Ethernet359 359 etp45h 45 100000 off +Ethernet368 368 etp47a 47 100000 off +Ethernet369 369 etp47b 47 100000 off +Ethernet370 370 etp47c 47 100000 off +Ethernet371 371 etp47d 47 100000 off +Ethernet372 372 etp47e 47 100000 off +Ethernet373 373 etp47f 47 100000 off +Ethernet374 374 etp47g 47 100000 off +Ethernet375 375 etp47h 47 100000 off +Ethernet384 384 etp49a 49 100000 off +Ethernet385 385 etp49b 49 100000 off +Ethernet386 386 etp49c 49 100000 off +Ethernet387 387 etp49d 49 100000 off +Ethernet388 388 etp49e 49 100000 off +Ethernet389 389 etp49f 49 100000 off +Ethernet390 390 etp49g 49 100000 off +Ethernet391 391 etp49h 49 100000 off +Ethernet400 400 etp51a 51 100000 off +Ethernet401 401 etp51b 51 100000 off +Ethernet402 402 etp51c 51 100000 off +Ethernet403 403 etp51d 51 100000 off +Ethernet404 404 etp51e 51 100000 off +Ethernet405 405 etp51f 51 100000 off +Ethernet406 406 etp51g 51 100000 off +Ethernet407 407 etp51h 51 100000 off +Ethernet416 416 etp53a 53 100000 off +Ethernet417 417 etp53b 53 100000 off +Ethernet418 418 etp53c 53 100000 off +Ethernet419 419 etp53d 53 100000 off +Ethernet420 420 etp53e 53 100000 off +Ethernet421 421 etp53f 53 100000 off +Ethernet422 422 etp53g 53 100000 off +Ethernet423 423 etp53h 53 100000 off +Ethernet432 432 etp55a 55 100000 off +Ethernet433 433 etp55b 55 100000 off +Ethernet434 434 etp55c 55 100000 off +Ethernet435 435 etp55d 55 100000 off +Ethernet436 436 etp55e 55 100000 off +Ethernet437 437 etp55f 55 100000 off +Ethernet438 438 etp55g 55 100000 off +Ethernet439 439 etp55h 55 100000 off +Ethernet448 448 etp57a 57 100000 off +Ethernet449 449 etp57b 57 100000 off +Ethernet450 450 etp57c 57 100000 off +Ethernet451 451 etp57d 57 100000 off +Ethernet452 452 etp57e 57 100000 off +Ethernet453 453 etp57f 57 100000 off +Ethernet454 454 etp57g 57 100000 off +Ethernet455 455 etp57h 57 100000 off +Ethernet464 464 etp59a 59 100000 off +Ethernet465 465 etp59b 59 100000 off +Ethernet466 466 etp59c 59 100000 off +Ethernet467 467 etp59d 59 100000 off +Ethernet468 468 etp59e 59 100000 off +Ethernet469 469 etp59f 59 100000 off +Ethernet470 470 etp59g 59 100000 off +Ethernet471 471 etp59h 59 100000 off +Ethernet480 480 etp61a 61 100000 off +Ethernet481 481 etp61b 61 100000 off +Ethernet482 482 etp61c 61 100000 off +Ethernet483 483 etp61d 61 100000 off +Ethernet484 484 etp61e 61 100000 off +Ethernet485 485 etp61f 61 100000 off +Ethernet486 486 etp61g 61 100000 off +Ethernet487 487 etp61h 61 100000 off +Ethernet496 496 etp63a 63 100000 off +Ethernet497 497 etp63b 63 100000 off +Ethernet498 498 etp63c 63 100000 off +Ethernet499 499 etp63d 63 100000 off +Ethernet500 500 etp63e 63 100000 off +Ethernet501 501 etp63f 63 100000 off +Ethernet502 502 etp63g 63 100000 off +Ethernet503 503 etp63h 63 100000 off +Ethernet512 512 etp65 65 10 \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/sai.profile b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/sai.profile index c27ec9fdaff..ba2278123d8 100644 --- a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/sai.profile +++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/sai.profile @@ -3,3 +3,5 @@ SAI_INDEPENDENT_MODULE_MODE=1 SAI_DEFAULT_SWITCHING_MODE_STORE_FORWARD=1 SAI_NOT_DROP_SIP_DIP_LINK_LOCAL=1 SAI_KEY_DISABLE_PORT_ALPHA=1 +SAI_DROP_OVER_MAX_KEY_LIST=1,65 +SAI_DROP_OVER_MAX_VALUE_LIST=307200 diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-O128/hwsku.json b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-O128/hwsku.json index b7049aa37aa..7a28a7f776d 100644 --- a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-O128/hwsku.json +++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-O128/hwsku.json @@ -2,642 +2,514 @@ "interfaces": { "Ethernet0": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet4": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet8": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet12": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet16": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet20": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet24": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet28": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet32": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet36": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet40": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet44": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet48": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet52": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet56": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet60": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet64": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet68": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet72": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet76": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet80": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet84": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet88": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet92": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet96": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet100": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet104": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet108": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet112": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet116": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet120": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet124": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet128": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet132": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet136": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet140": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet144": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet148": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet152": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet156": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet160": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet164": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet168": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet172": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet176": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet180": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet184": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet188": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet192": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet196": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet200": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet204": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet208": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet212": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet216": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet220": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet224": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet228": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet232": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet236": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet240": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet244": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet248": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet252": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet256": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet260": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet264": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet268": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet272": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet276": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet280": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet284": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet288": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet292": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet296": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet300": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet304": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet308": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet312": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet316": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet320": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet324": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet328": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet332": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet336": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet340": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet344": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet348": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet352": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet356": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet360": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet364": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet368": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet372": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet376": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet380": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet384": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet388": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet392": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet396": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet400": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet404": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet408": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet412": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet416": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet420": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet424": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet428": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet432": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet436": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet440": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet444": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet448": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet452": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet456": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet460": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet464": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet468": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet472": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet476": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet480": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet484": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet488": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet492": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet496": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet500": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet504": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet508": { "default_brkout_mode": "2x400G[200G,100G,50G,40G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet512": { diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-O128/pmon_daemon_control.json b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-O128/pmon_daemon_control.json index 208fa63ca29..dfeaa9d37b3 100644 --- a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-O128/pmon_daemon_control.json +++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-O128/pmon_daemon_control.json @@ -1,6 +1,9 @@ { "skip_ledd": true, "skip_fancontrol": true, - "skip_xcvrd_cmis_mgr": false + "skip_xcvrd_cmis_mgr": false, + "xcvrd": { + "dom_temperature_poll_interval": 20 + } } diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-O128/sai.profile b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-O128/sai.profile index 3fd37cabc97..1cf3e48e352 100644 --- a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-O128/sai.profile +++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-O128/sai.profile @@ -1,3 +1,4 @@ SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_sn5600_128x400g_1x25g.xml SAI_INDEPENDENT_MODULE_MODE=1 +SAI_NOT_DROP_SIP_DIP_LINK_LOCAL=1 SAI_HOSTIF_OPER_STATUS_UPDATE_BY_APP=1 diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/hwsku.json b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/hwsku.json index be1f3c62d1f..a84f0c70943 100644 --- a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/hwsku.json +++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/hwsku.json @@ -2,1282 +2,1026 @@ "interfaces": { "Ethernet0": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet2": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet4": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "3", "autoneg": "off" }, "Ethernet6": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "4", "autoneg": "off" }, "Ethernet8": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet10": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet12": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "3", "autoneg": "off" }, "Ethernet14": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "4", "autoneg": "off" }, "Ethernet16": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet18": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet20": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "3", "autoneg": "off" }, "Ethernet22": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "4", "autoneg": "off" }, "Ethernet24": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet26": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet28": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "3", "autoneg": "off" }, "Ethernet30": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "4", "autoneg": "off" }, "Ethernet32": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet34": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet36": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "3", "autoneg": "off" }, "Ethernet38": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "4", "autoneg": "off" }, "Ethernet40": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet42": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet44": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "3", "autoneg": "off" }, "Ethernet46": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "4", "autoneg": "off" }, "Ethernet48": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet50": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet52": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "3", "autoneg": "off" }, "Ethernet54": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "4", "autoneg": "off" }, "Ethernet56": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet58": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet60": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "3", "autoneg": "off" }, "Ethernet62": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "4", "autoneg": "off" }, "Ethernet64": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet66": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet68": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "3", "autoneg": "off" }, "Ethernet70": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "4", "autoneg": "off" }, "Ethernet72": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet74": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet76": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "3", "autoneg": "off" }, "Ethernet78": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "4", "autoneg": "off" }, "Ethernet80": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet82": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet84": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "3", "autoneg": "off" }, "Ethernet86": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "4", "autoneg": "off" }, "Ethernet88": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet90": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet92": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "3", "autoneg": "off" }, "Ethernet94": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "4", "autoneg": "off" }, "Ethernet96": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet98": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet100": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "3", "autoneg": "off" }, "Ethernet102": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "4", "autoneg": "off" }, "Ethernet104": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet106": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet108": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "3", "autoneg": "off" }, "Ethernet110": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "4", "autoneg": "off" }, "Ethernet112": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet114": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet116": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "3", "autoneg": "off" }, "Ethernet118": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "4", "autoneg": "off" }, "Ethernet120": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet122": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet124": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "3", "autoneg": "off" }, "Ethernet126": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "4", "autoneg": "off" }, "Ethernet128": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet130": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet132": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "3", "autoneg": "off" }, "Ethernet134": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "4", "autoneg": "off" }, "Ethernet136": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet138": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet140": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "3", "autoneg": "off" }, "Ethernet142": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "4", "autoneg": "off" }, "Ethernet144": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet146": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet148": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "3", "autoneg": "off" }, "Ethernet150": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "4", "autoneg": "off" }, "Ethernet152": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet154": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet156": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "3", "autoneg": "off" }, "Ethernet158": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "4", "autoneg": "off" }, "Ethernet160": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet162": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet164": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "3", "autoneg": "off" }, "Ethernet166": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "4", "autoneg": "off" }, "Ethernet168": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet170": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet172": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "3", "autoneg": "off" }, "Ethernet174": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "4", "autoneg": "off" }, "Ethernet176": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet178": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet180": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "3", "autoneg": "off" }, "Ethernet182": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "4", "autoneg": "off" }, "Ethernet184": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet186": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet188": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "3", "autoneg": "off" }, "Ethernet190": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "4", "autoneg": "off" }, "Ethernet192": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet194": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet196": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "3", "autoneg": "off" }, "Ethernet198": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "4", "autoneg": "off" }, "Ethernet200": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet202": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet204": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "3", "autoneg": "off" }, "Ethernet206": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "4", "autoneg": "off" }, "Ethernet208": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet210": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet212": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "3", "autoneg": "off" }, "Ethernet214": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "4", "autoneg": "off" }, "Ethernet216": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet218": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet220": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "3", "autoneg": "off" }, "Ethernet222": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "4", "autoneg": "off" }, "Ethernet224": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet226": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet228": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "3", "autoneg": "off" }, "Ethernet230": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "4", "autoneg": "off" }, "Ethernet232": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet234": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet236": { 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"4x200G[100G,50G,25G,10G]", - "subport": "4", "autoneg": "off" }, "Ethernet480": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet482": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet484": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "3", "autoneg": "off" }, "Ethernet486": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "4", "autoneg": "off" }, "Ethernet488": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet490": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet492": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "3", "autoneg": "off" }, "Ethernet494": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "4", "autoneg": "off" }, "Ethernet496": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet498": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet500": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "3", "autoneg": "off" }, "Ethernet502": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "4", "autoneg": "off" }, "Ethernet504": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "1", "autoneg": "off" }, "Ethernet506": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "2", "autoneg": "off" }, "Ethernet508": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "3", "autoneg": "off" }, "Ethernet510": { "default_brkout_mode": "4x200G[100G,50G,25G,10G]", - "subport": "4", "autoneg": "off" }, "Ethernet512": { diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/pmon_daemon_control.json b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/pmon_daemon_control.json index 208fa63ca29..dfeaa9d37b3 100644 --- a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/pmon_daemon_control.json +++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/pmon_daemon_control.json @@ -1,6 +1,9 @@ { "skip_ledd": true, "skip_fancontrol": true, - "skip_xcvrd_cmis_mgr": false + "skip_xcvrd_cmis_mgr": false, + "xcvrd": { + "dom_temperature_poll_interval": 20 + } } diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/sai.profile b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/sai.profile index e4e957aefcd..ceb88f1a68f 100644 --- a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/sai.profile +++ b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/sai.profile @@ -1,3 +1,4 @@ SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_5600_256x200g.xml SAI_INDEPENDENT_MODULE_MODE=1 +SAI_NOT_DROP_SIP_DIP_LINK_LOCAL=1 SAI_KEY_DISABLE_PORT_ALPHA=1 diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/create_only_config_db_buffers.json b/device/mellanox/x86_64-nvidia_sn5600-r0/create_only_config_db_buffers.json new file mode 120000 index 00000000000..87e12387fcd --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5600-r0/create_only_config_db_buffers.json @@ -0,0 +1 @@ +../x86_64-mlnx_msn2700-r0/create_only_config_db_buffers.json \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/platform.json b/device/mellanox/x86_64-nvidia_sn5600-r0/platform.json index daa9d1231f3..1401815b02f 100644 --- a/device/mellanox/x86_64-nvidia_sn5600-r0/platform.json +++ b/device/mellanox/x86_64-nvidia_sn5600-r0/platform.json @@ -107,7 +107,8 @@ ], "thermals": [ { - "name": "ASIC" + "name": "ASIC", + "polling_interval": 3 }, { "name": "Ambient Fan Side Temp" diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/pmon_daemon_control.json b/device/mellanox/x86_64-nvidia_sn5600-r0/pmon_daemon_control.json index fefdfb32739..7981c6ffe53 100644 --- a/device/mellanox/x86_64-nvidia_sn5600-r0/pmon_daemon_control.json +++ b/device/mellanox/x86_64-nvidia_sn5600-r0/pmon_daemon_control.json @@ -1,6 +1,9 @@ { "skip_ledd": true, "skip_fancontrol": true, - "skip_xcvrd_cmis_mgr": true + "skip_xcvrd_cmis_mgr": true, + "xcvrd": { + "dom_temperature_poll_interval": 20 + } } diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/system_health_monitoring_config.json b/device/mellanox/x86_64-nvidia_sn5600-r0/system_health_monitoring_config.json deleted file mode 120000 index 98df66c27ca..00000000000 --- a/device/mellanox/x86_64-nvidia_sn5600-r0/system_health_monitoring_config.json +++ /dev/null @@ -1 +0,0 @@ -../x86_64-mlnx_msn2700-r0/system_health_monitoring_config.json \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/system_health_monitoring_config.json b/device/mellanox/x86_64-nvidia_sn5600-r0/system_health_monitoring_config.json new file mode 100644 index 00000000000..4fddaab2305 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5600-r0/system_health_monitoring_config.json @@ -0,0 +1,11 @@ +{ + "services_to_ignore": [], + "devices_to_ignore": ["psu.voltage"], + "user_defined_checkers": [], + "polling_interval": 60, + "led_color": { + "fault": "amber", + "normal": "green", + "booting": "amber_blink" + } +} diff --git a/device/mellanox/x86_64-nvidia_sn5600_simx-r0/create_only_config_db_buffers.json b/device/mellanox/x86_64-nvidia_sn5600_simx-r0/create_only_config_db_buffers.json new file mode 120000 index 00000000000..87e12387fcd --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5600_simx-r0/create_only_config_db_buffers.json @@ -0,0 +1 @@ +../x86_64-mlnx_msn2700-r0/create_only_config_db_buffers.json \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn5600_simx-r0/platform.json b/device/mellanox/x86_64-nvidia_sn5600_simx-r0/platform.json index a10a478c4ac..5f89ee07c22 100644 --- a/device/mellanox/x86_64-nvidia_sn5600_simx-r0/platform.json +++ b/device/mellanox/x86_64-nvidia_sn5600_simx-r0/platform.json @@ -1,6 +1,6 @@ { "chassis": { - "name": "SN5600_SIMX", + "name": "SN5600", "components": [ { "name": "ONIE" @@ -95,7 +95,8 @@ ], "thermals": [ { - "name": "ASIC" + "name": "ASIC", + "polling_interval": 3 }, { "name": "Ambient COMEX Temp" diff --git a/device/mellanox/x86_64-nvidia_sn5600_simx-r0/system_health_monitoring_config.json b/device/mellanox/x86_64-nvidia_sn5600_simx-r0/system_health_monitoring_config.json deleted file mode 120000 index 42fe945344c..00000000000 --- a/device/mellanox/x86_64-nvidia_sn5600_simx-r0/system_health_monitoring_config.json +++ /dev/null @@ -1 +0,0 @@ -../x86_64-mlnx_msn2700_simx-r0/system_health_monitoring_config.json \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn5600_simx-r0/system_health_monitoring_config.json b/device/mellanox/x86_64-nvidia_sn5600_simx-r0/system_health_monitoring_config.json new file mode 100644 index 00000000000..41ec1c2339f --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5600_simx-r0/system_health_monitoring_config.json @@ -0,0 +1,11 @@ +{ + "services_to_ignore": [], + "devices_to_ignore": ["psu","asic","fan"], + "user_defined_checkers": [], + "polling_interval": 60, + "led_color": { + "fault": "amber", + "normal": "green", + "booting": "amber_blink" + } +} diff --git a/device/mellanox/x86_64-nvidia_sn5610n-r0/Mellanox-SN5610N-C224O8/pmon_daemon_control.json b/device/mellanox/x86_64-nvidia_sn5610n-r0/Mellanox-SN5610N-C224O8/pmon_daemon_control.json index 208fa63ca29..dfeaa9d37b3 100644 --- a/device/mellanox/x86_64-nvidia_sn5610n-r0/Mellanox-SN5610N-C224O8/pmon_daemon_control.json +++ b/device/mellanox/x86_64-nvidia_sn5610n-r0/Mellanox-SN5610N-C224O8/pmon_daemon_control.json @@ -1,6 +1,9 @@ { "skip_ledd": true, "skip_fancontrol": true, - "skip_xcvrd_cmis_mgr": false + "skip_xcvrd_cmis_mgr": false, + "xcvrd": { + "dom_temperature_poll_interval": 20 + } } diff --git a/device/mellanox/x86_64-nvidia_sn5610n-r0/Mellanox-SN5610N-C224O8/port_config.ini b/device/mellanox/x86_64-nvidia_sn5610n-r0/Mellanox-SN5610N-C224O8/port_config.ini index 7efebf19d66..4a7d3e64e80 100644 --- a/device/mellanox/x86_64-nvidia_sn5610n-r0/Mellanox-SN5610N-C224O8/port_config.ini +++ b/device/mellanox/x86_64-nvidia_sn5610n-r0/Mellanox-SN5610N-C224O8/port_config.ini @@ -1,6 +1,6 @@ ## ## SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES -## Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +## Copyright (c) 2024-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ## Apache-2.0 ## ## Licensed under the Apache License, Version 2.0 (the "License"); @@ -16,238 +16,238 @@ ## limitations under the License. ## -# name lanes alias index speed autoneg subport -Ethernet0 0 etp1a 1 100000 off 1 -Ethernet1 1 etp1b 1 100000 off 2 -Ethernet2 2 etp1c 1 100000 off 3 -Ethernet3 3 etp1d 1 100000 off 4 -Ethernet4 4 etp1e 1 100000 off 5 -Ethernet5 5 etp1f 1 100000 off 6 -Ethernet6 6 etp1g 1 100000 off 7 -Ethernet7 7 etp1h 1 100000 off 8 -Ethernet16 16 etp3a 3 100000 off 1 -Ethernet17 17 etp3b 3 100000 off 2 -Ethernet18 18 etp3c 3 100000 off 3 -Ethernet19 19 etp3d 3 100000 off 4 -Ethernet20 20 etp3e 3 100000 off 5 -Ethernet21 21 etp3f 3 100000 off 6 -Ethernet22 22 etp3g 3 100000 off 7 -Ethernet23 23 etp3h 3 100000 off 8 -Ethernet32 32 etp5a 5 100000 off 1 -Ethernet33 33 etp5b 5 100000 off 2 -Ethernet34 34 etp5c 5 100000 off 3 -Ethernet35 35 etp5d 5 100000 off 4 -Ethernet36 36 etp5e 5 100000 off 5 -Ethernet37 37 etp5f 5 100000 off 6 -Ethernet38 38 etp5g 5 100000 off 7 -Ethernet39 39 etp5h 5 100000 off 8 -Ethernet48 48 etp7a 7 100000 off 1 -Ethernet49 49 etp7b 7 100000 off 2 -Ethernet50 50 etp7c 7 100000 off 3 -Ethernet51 51 etp7d 7 100000 off 4 -Ethernet52 52 etp7e 7 100000 off 5 -Ethernet53 53 etp7f 7 100000 off 6 -Ethernet54 54 etp7g 7 100000 off 7 -Ethernet55 55 etp7h 7 100000 off 8 -Ethernet64 64 etp9a 9 100000 off 1 -Ethernet65 65 etp9b 9 100000 off 2 -Ethernet66 66 etp9c 9 100000 off 3 -Ethernet67 67 etp9d 9 100000 off 4 -Ethernet68 68 etp9e 9 100000 off 5 -Ethernet69 69 etp9f 9 100000 off 6 -Ethernet70 70 etp9g 9 100000 off 7 -Ethernet71 71 etp9h 9 100000 off 8 -Ethernet80 80 etp11a 11 100000 off 1 -Ethernet81 81 etp11b 11 100000 off 2 -Ethernet82 82 etp11c 11 100000 off 3 -Ethernet83 83 etp11d 11 100000 off 4 -Ethernet84 84 etp11e 11 100000 off 5 -Ethernet85 85 etp11f 11 100000 off 6 -Ethernet86 86 etp11g 11 100000 off 7 -Ethernet87 87 etp11h 11 100000 off 8 -Ethernet96 96,97,98,99 etp13a 13 400000 off 1 -Ethernet100 100,101,102,103 etp13b 13 400000 off 2 -Ethernet112 112 etp15a 15 100000 off 1 -Ethernet113 113 etp15b 15 100000 off 2 -Ethernet114 114 etp15c 15 100000 off 3 -Ethernet115 115 etp15d 15 100000 off 4 -Ethernet116 116 etp15e 15 100000 off 5 -Ethernet117 117 etp15f 15 100000 off 6 -Ethernet118 118 etp15g 15 100000 off 7 -Ethernet119 119 etp15h 15 100000 off 8 -Ethernet128 128,129,130,131 etp17a 17 400000 off 1 -Ethernet132 132,133,134,135 etp17b 17 400000 off 2 -Ethernet144 144 etp19a 19 100000 off 1 -Ethernet145 145 etp19b 19 100000 off 2 -Ethernet146 146 etp19c 19 100000 off 3 -Ethernet147 147 etp19d 19 100000 off 4 -Ethernet148 148 etp19e 19 100000 off 5 -Ethernet149 149 etp19f 19 100000 off 6 -Ethernet150 150 etp19g 19 100000 off 7 -Ethernet151 151 etp19h 19 100000 off 8 -Ethernet160 160 etp21a 21 100000 off 1 -Ethernet161 161 etp21b 21 100000 off 2 -Ethernet162 162 etp21c 21 100000 off 3 -Ethernet163 163 etp21d 21 100000 off 4 -Ethernet164 164 etp21e 21 100000 off 5 -Ethernet165 165 etp21f 21 100000 off 6 -Ethernet166 166 etp21g 21 100000 off 7 -Ethernet167 167 etp21h 21 100000 off 8 -Ethernet176 176 etp23a 23 100000 off 1 -Ethernet177 177 etp23b 23 100000 off 2 -Ethernet178 178 etp23c 23 100000 off 3 -Ethernet179 179 etp23d 23 100000 off 4 -Ethernet180 180 etp23e 23 100000 off 5 -Ethernet181 181 etp23f 23 100000 off 6 -Ethernet182 182 etp23g 23 100000 off 7 -Ethernet183 183 etp23h 23 100000 off 8 -Ethernet192 192 etp25a 25 100000 off 1 -Ethernet193 193 etp25b 25 100000 off 2 -Ethernet194 194 etp25c 25 100000 off 3 -Ethernet195 195 etp25d 25 100000 off 4 -Ethernet196 196 etp25e 25 100000 off 5 -Ethernet197 197 etp25f 25 100000 off 6 -Ethernet198 198 etp25g 25 100000 off 7 -Ethernet199 199 etp25h 25 100000 off 8 -Ethernet208 208 etp27a 27 100000 off 1 -Ethernet209 209 etp27b 27 100000 off 2 -Ethernet210 210 etp27c 27 100000 off 3 -Ethernet211 211 etp27d 27 100000 off 4 -Ethernet212 212 etp27e 27 100000 off 5 -Ethernet213 213 etp27f 27 100000 off 6 -Ethernet214 214 etp27g 27 100000 off 7 -Ethernet215 215 etp27h 27 100000 off 8 -Ethernet224 224 etp29a 29 100000 off 1 -Ethernet225 225 etp29b 29 100000 off 2 -Ethernet226 226 etp29c 29 100000 off 3 -Ethernet227 227 etp29d 29 100000 off 4 -Ethernet228 228 etp29e 29 100000 off 5 -Ethernet229 229 etp29f 29 100000 off 6 -Ethernet230 230 etp29g 29 100000 off 7 -Ethernet231 231 etp29h 29 100000 off 8 -Ethernet240 240 etp31a 31 100000 off 1 -Ethernet241 241 etp31b 31 100000 off 2 -Ethernet242 242 etp31c 31 100000 off 3 -Ethernet243 243 etp31d 31 100000 off 4 -Ethernet244 244 etp31e 31 100000 off 5 -Ethernet245 245 etp31f 31 100000 off 6 -Ethernet246 246 etp31g 31 100000 off 7 -Ethernet247 247 etp31h 31 100000 off 8 -Ethernet256 256 etp33a 33 100000 off 1 -Ethernet257 257 etp33b 33 100000 off 2 -Ethernet258 258 etp33c 33 100000 off 3 -Ethernet259 259 etp33d 33 100000 off 4 -Ethernet260 260 etp33e 33 100000 off 5 -Ethernet261 261 etp33f 33 100000 off 6 -Ethernet262 262 etp33g 33 100000 off 7 -Ethernet263 263 etp33h 33 100000 off 8 -Ethernet272 272 etp35a 35 100000 off 1 -Ethernet273 273 etp35b 35 100000 off 2 -Ethernet274 274 etp35c 35 100000 off 3 -Ethernet275 275 etp35d 35 100000 off 4 -Ethernet276 276 etp35e 35 100000 off 5 -Ethernet277 277 etp35f 35 100000 off 6 -Ethernet278 278 etp35g 35 100000 off 7 -Ethernet279 279 etp35h 35 100000 off 8 -Ethernet288 288 etp37a 37 100000 off 1 -Ethernet289 289 etp37b 37 100000 off 2 -Ethernet290 290 etp37c 37 100000 off 3 -Ethernet291 291 etp37d 37 100000 off 4 -Ethernet292 292 etp37e 37 100000 off 5 -Ethernet293 293 etp37f 37 100000 off 6 -Ethernet294 294 etp37g 37 100000 off 7 -Ethernet295 295 etp37h 37 100000 off 8 -Ethernet304 304 etp39a 39 100000 off 1 -Ethernet305 305 etp39b 39 100000 off 2 -Ethernet306 306 etp39c 39 100000 off 3 -Ethernet307 307 etp39d 39 100000 off 4 -Ethernet308 308 etp39e 39 100000 off 5 -Ethernet309 309 etp39f 39 100000 off 6 -Ethernet310 310 etp39g 39 100000 off 7 -Ethernet311 311 etp39h 39 100000 off 8 -Ethernet320 320 etp41a 41 100000 off 1 -Ethernet321 321 etp41b 41 100000 off 2 -Ethernet322 322 etp41c 41 100000 off 3 -Ethernet323 323 etp41d 41 100000 off 4 -Ethernet324 324 etp41e 41 100000 off 5 -Ethernet325 325 etp41f 41 100000 off 6 -Ethernet326 326 etp41g 41 100000 off 7 -Ethernet327 327 etp41h 41 100000 off 8 -Ethernet336 336 etp43a 43 100000 off 1 -Ethernet337 337 etp43b 43 100000 off 2 -Ethernet338 338 etp43c 43 100000 off 3 -Ethernet339 339 etp43d 43 100000 off 4 -Ethernet340 340 etp43e 43 100000 off 5 -Ethernet341 341 etp43f 43 100000 off 6 -Ethernet342 342 etp43g 43 100000 off 7 -Ethernet343 343 etp43h 43 100000 off 8 -Ethernet352 352,353,354,355 etp45a 45 400000 off 1 -Ethernet356 356,357,358,359 etp45b 45 400000 off 2 -Ethernet368 368 etp47a 47 100000 off 1 -Ethernet369 369 etp47b 47 100000 off 2 -Ethernet370 370 etp47c 47 100000 off 3 -Ethernet371 371 etp47d 47 100000 off 4 -Ethernet372 372 etp47e 47 100000 off 5 -Ethernet373 373 etp47f 47 100000 off 6 -Ethernet374 374 etp47g 47 100000 off 7 -Ethernet375 375 etp47h 47 100000 off 8 -Ethernet384 384,385,386,387 etp49a 49 400000 off 1 -Ethernet388 388,389,390,391 etp49b 49 400000 off 2 -Ethernet400 400 etp51a 51 100000 off 1 -Ethernet401 401 etp51b 51 100000 off 2 -Ethernet402 402 etp51c 51 100000 off 3 -Ethernet403 403 etp51d 51 100000 off 4 -Ethernet404 404 etp51e 51 100000 off 5 -Ethernet405 405 etp51f 51 100000 off 6 -Ethernet406 406 etp51g 51 100000 off 7 -Ethernet407 407 etp51h 51 100000 off 8 -Ethernet416 416 etp53a 53 100000 off 1 -Ethernet417 417 etp53b 53 100000 off 2 -Ethernet418 418 etp53c 53 100000 off 3 -Ethernet419 419 etp53d 53 100000 off 4 -Ethernet420 420 etp53e 53 100000 off 5 -Ethernet421 421 etp53f 53 100000 off 6 -Ethernet422 422 etp53g 53 100000 off 7 -Ethernet423 423 etp53h 53 100000 off 8 -Ethernet432 432 etp55a 55 100000 off 1 -Ethernet433 433 etp55b 55 100000 off 2 -Ethernet434 434 etp55c 55 100000 off 3 -Ethernet435 435 etp55d 55 100000 off 4 -Ethernet436 436 etp55e 55 100000 off 5 -Ethernet437 437 etp55f 55 100000 off 6 -Ethernet438 438 etp55g 55 100000 off 7 -Ethernet439 439 etp55h 55 100000 off 8 -Ethernet448 448 etp57a 57 100000 off 1 -Ethernet449 449 etp57b 57 100000 off 2 -Ethernet450 450 etp57c 57 100000 off 3 -Ethernet451 451 etp57d 57 100000 off 4 -Ethernet452 452 etp57e 57 100000 off 5 -Ethernet453 453 etp57f 57 100000 off 6 -Ethernet454 454 etp57g 57 100000 off 7 -Ethernet455 455 etp57h 57 100000 off 8 -Ethernet464 464 etp59a 59 100000 off 1 -Ethernet465 465 etp59b 59 100000 off 2 -Ethernet466 466 etp59c 59 100000 off 3 -Ethernet467 467 etp59d 59 100000 off 4 -Ethernet468 468 etp59e 59 100000 off 5 -Ethernet469 469 etp59f 59 100000 off 6 -Ethernet470 470 etp59g 59 100000 off 7 -Ethernet471 471 etp59h 59 100000 off 8 -Ethernet480 480 etp61a 61 100000 off 1 -Ethernet481 481 etp61b 61 100000 off 2 -Ethernet482 482 etp61c 61 100000 off 3 -Ethernet483 483 etp61d 61 100000 off 4 -Ethernet484 484 etp61e 61 100000 off 5 -Ethernet485 485 etp61f 61 100000 off 6 -Ethernet486 486 etp61g 61 100000 off 7 -Ethernet487 487 etp61h 61 100000 off 8 -Ethernet496 496 etp63a 63 100000 off 1 -Ethernet497 497 etp63b 63 100000 off 2 -Ethernet498 498 etp63c 63 100000 off 3 -Ethernet499 499 etp63d 63 100000 off 4 -Ethernet500 500 etp63e 63 100000 off 5 -Ethernet501 501 etp63f 63 100000 off 6 -Ethernet502 502 etp63g 63 100000 off 7 -Ethernet503 503 etp63h 63 100000 off 8 +# name lanes alias index speed autoneg +Ethernet0 0 etp1a 1 100000 off +Ethernet1 1 etp1b 1 100000 off +Ethernet2 2 etp1c 1 100000 off +Ethernet3 3 etp1d 1 100000 off +Ethernet4 4 etp1e 1 100000 off +Ethernet5 5 etp1f 1 100000 off +Ethernet6 6 etp1g 1 100000 off +Ethernet7 7 etp1h 1 100000 off +Ethernet16 16 etp3a 3 100000 off +Ethernet17 17 etp3b 3 100000 off +Ethernet18 18 etp3c 3 100000 off +Ethernet19 19 etp3d 3 100000 off +Ethernet20 20 etp3e 3 100000 off +Ethernet21 21 etp3f 3 100000 off +Ethernet22 22 etp3g 3 100000 off +Ethernet23 23 etp3h 3 100000 off +Ethernet32 32 etp5a 5 100000 off +Ethernet33 33 etp5b 5 100000 off +Ethernet34 34 etp5c 5 100000 off +Ethernet35 35 etp5d 5 100000 off +Ethernet36 36 etp5e 5 100000 off +Ethernet37 37 etp5f 5 100000 off +Ethernet38 38 etp5g 5 100000 off +Ethernet39 39 etp5h 5 100000 off +Ethernet48 48 etp7a 7 100000 off +Ethernet49 49 etp7b 7 100000 off +Ethernet50 50 etp7c 7 100000 off +Ethernet51 51 etp7d 7 100000 off +Ethernet52 52 etp7e 7 100000 off +Ethernet53 53 etp7f 7 100000 off +Ethernet54 54 etp7g 7 100000 off +Ethernet55 55 etp7h 7 100000 off +Ethernet64 64 etp9a 9 100000 off +Ethernet65 65 etp9b 9 100000 off +Ethernet66 66 etp9c 9 100000 off +Ethernet67 67 etp9d 9 100000 off +Ethernet68 68 etp9e 9 100000 off +Ethernet69 69 etp9f 9 100000 off +Ethernet70 70 etp9g 9 100000 off +Ethernet71 71 etp9h 9 100000 off +Ethernet80 80 etp11a 11 100000 off +Ethernet81 81 etp11b 11 100000 off +Ethernet82 82 etp11c 11 100000 off +Ethernet83 83 etp11d 11 100000 off +Ethernet84 84 etp11e 11 100000 off +Ethernet85 85 etp11f 11 100000 off +Ethernet86 86 etp11g 11 100000 off +Ethernet87 87 etp11h 11 100000 off +Ethernet96 96,97,98,99 etp13a 13 400000 off +Ethernet100 100,101,102,103 etp13b 13 400000 off +Ethernet112 112 etp15a 15 100000 off +Ethernet113 113 etp15b 15 100000 off +Ethernet114 114 etp15c 15 100000 off +Ethernet115 115 etp15d 15 100000 off +Ethernet116 116 etp15e 15 100000 off +Ethernet117 117 etp15f 15 100000 off +Ethernet118 118 etp15g 15 100000 off +Ethernet119 119 etp15h 15 100000 off +Ethernet128 128,129,130,131 etp17a 17 400000 off +Ethernet132 132,133,134,135 etp17b 17 400000 off +Ethernet144 144 etp19a 19 100000 off +Ethernet145 145 etp19b 19 100000 off +Ethernet146 146 etp19c 19 100000 off +Ethernet147 147 etp19d 19 100000 off +Ethernet148 148 etp19e 19 100000 off +Ethernet149 149 etp19f 19 100000 off +Ethernet150 150 etp19g 19 100000 off +Ethernet151 151 etp19h 19 100000 off +Ethernet160 160 etp21a 21 100000 off +Ethernet161 161 etp21b 21 100000 off +Ethernet162 162 etp21c 21 100000 off +Ethernet163 163 etp21d 21 100000 off +Ethernet164 164 etp21e 21 100000 off +Ethernet165 165 etp21f 21 100000 off +Ethernet166 166 etp21g 21 100000 off +Ethernet167 167 etp21h 21 100000 off +Ethernet176 176 etp23a 23 100000 off +Ethernet177 177 etp23b 23 100000 off +Ethernet178 178 etp23c 23 100000 off +Ethernet179 179 etp23d 23 100000 off +Ethernet180 180 etp23e 23 100000 off +Ethernet181 181 etp23f 23 100000 off +Ethernet182 182 etp23g 23 100000 off +Ethernet183 183 etp23h 23 100000 off +Ethernet192 192 etp25a 25 100000 off +Ethernet193 193 etp25b 25 100000 off +Ethernet194 194 etp25c 25 100000 off +Ethernet195 195 etp25d 25 100000 off +Ethernet196 196 etp25e 25 100000 off +Ethernet197 197 etp25f 25 100000 off +Ethernet198 198 etp25g 25 100000 off +Ethernet199 199 etp25h 25 100000 off +Ethernet208 208 etp27a 27 100000 off +Ethernet209 209 etp27b 27 100000 off +Ethernet210 210 etp27c 27 100000 off +Ethernet211 211 etp27d 27 100000 off +Ethernet212 212 etp27e 27 100000 off +Ethernet213 213 etp27f 27 100000 off +Ethernet214 214 etp27g 27 100000 off +Ethernet215 215 etp27h 27 100000 off +Ethernet224 224 etp29a 29 100000 off +Ethernet225 225 etp29b 29 100000 off +Ethernet226 226 etp29c 29 100000 off +Ethernet227 227 etp29d 29 100000 off +Ethernet228 228 etp29e 29 100000 off +Ethernet229 229 etp29f 29 100000 off +Ethernet230 230 etp29g 29 100000 off +Ethernet231 231 etp29h 29 100000 off +Ethernet240 240 etp31a 31 100000 off +Ethernet241 241 etp31b 31 100000 off +Ethernet242 242 etp31c 31 100000 off +Ethernet243 243 etp31d 31 100000 off +Ethernet244 244 etp31e 31 100000 off +Ethernet245 245 etp31f 31 100000 off +Ethernet246 246 etp31g 31 100000 off +Ethernet247 247 etp31h 31 100000 off +Ethernet256 256 etp33a 33 100000 off +Ethernet257 257 etp33b 33 100000 off +Ethernet258 258 etp33c 33 100000 off +Ethernet259 259 etp33d 33 100000 off +Ethernet260 260 etp33e 33 100000 off +Ethernet261 261 etp33f 33 100000 off +Ethernet262 262 etp33g 33 100000 off +Ethernet263 263 etp33h 33 100000 off +Ethernet272 272 etp35a 35 100000 off +Ethernet273 273 etp35b 35 100000 off +Ethernet274 274 etp35c 35 100000 off +Ethernet275 275 etp35d 35 100000 off +Ethernet276 276 etp35e 35 100000 off +Ethernet277 277 etp35f 35 100000 off +Ethernet278 278 etp35g 35 100000 off +Ethernet279 279 etp35h 35 100000 off +Ethernet288 288 etp37a 37 100000 off +Ethernet289 289 etp37b 37 100000 off +Ethernet290 290 etp37c 37 100000 off +Ethernet291 291 etp37d 37 100000 off +Ethernet292 292 etp37e 37 100000 off +Ethernet293 293 etp37f 37 100000 off +Ethernet294 294 etp37g 37 100000 off +Ethernet295 295 etp37h 37 100000 off +Ethernet304 304 etp39a 39 100000 off +Ethernet305 305 etp39b 39 100000 off +Ethernet306 306 etp39c 39 100000 off +Ethernet307 307 etp39d 39 100000 off +Ethernet308 308 etp39e 39 100000 off +Ethernet309 309 etp39f 39 100000 off +Ethernet310 310 etp39g 39 100000 off +Ethernet311 311 etp39h 39 100000 off +Ethernet320 320 etp41a 41 100000 off +Ethernet321 321 etp41b 41 100000 off +Ethernet322 322 etp41c 41 100000 off +Ethernet323 323 etp41d 41 100000 off +Ethernet324 324 etp41e 41 100000 off +Ethernet325 325 etp41f 41 100000 off +Ethernet326 326 etp41g 41 100000 off +Ethernet327 327 etp41h 41 100000 off +Ethernet336 336 etp43a 43 100000 off +Ethernet337 337 etp43b 43 100000 off +Ethernet338 338 etp43c 43 100000 off +Ethernet339 339 etp43d 43 100000 off +Ethernet340 340 etp43e 43 100000 off +Ethernet341 341 etp43f 43 100000 off +Ethernet342 342 etp43g 43 100000 off +Ethernet343 343 etp43h 43 100000 off +Ethernet352 352,353,354,355 etp45a 45 400000 off +Ethernet356 356,357,358,359 etp45b 45 400000 off +Ethernet368 368 etp47a 47 100000 off +Ethernet369 369 etp47b 47 100000 off +Ethernet370 370 etp47c 47 100000 off +Ethernet371 371 etp47d 47 100000 off +Ethernet372 372 etp47e 47 100000 off +Ethernet373 373 etp47f 47 100000 off +Ethernet374 374 etp47g 47 100000 off +Ethernet375 375 etp47h 47 100000 off +Ethernet384 384,385,386,387 etp49a 49 400000 off +Ethernet388 388,389,390,391 etp49b 49 400000 off +Ethernet400 400 etp51a 51 100000 off +Ethernet401 401 etp51b 51 100000 off +Ethernet402 402 etp51c 51 100000 off +Ethernet403 403 etp51d 51 100000 off +Ethernet404 404 etp51e 51 100000 off +Ethernet405 405 etp51f 51 100000 off +Ethernet406 406 etp51g 51 100000 off +Ethernet407 407 etp51h 51 100000 off +Ethernet416 416 etp53a 53 100000 off +Ethernet417 417 etp53b 53 100000 off +Ethernet418 418 etp53c 53 100000 off +Ethernet419 419 etp53d 53 100000 off +Ethernet420 420 etp53e 53 100000 off +Ethernet421 421 etp53f 53 100000 off +Ethernet422 422 etp53g 53 100000 off +Ethernet423 423 etp53h 53 100000 off +Ethernet432 432 etp55a 55 100000 off +Ethernet433 433 etp55b 55 100000 off +Ethernet434 434 etp55c 55 100000 off +Ethernet435 435 etp55d 55 100000 off +Ethernet436 436 etp55e 55 100000 off +Ethernet437 437 etp55f 55 100000 off +Ethernet438 438 etp55g 55 100000 off +Ethernet439 439 etp55h 55 100000 off +Ethernet448 448 etp57a 57 100000 off +Ethernet449 449 etp57b 57 100000 off +Ethernet450 450 etp57c 57 100000 off +Ethernet451 451 etp57d 57 100000 off +Ethernet452 452 etp57e 57 100000 off +Ethernet453 453 etp57f 57 100000 off +Ethernet454 454 etp57g 57 100000 off +Ethernet455 455 etp57h 57 100000 off +Ethernet464 464 etp59a 59 100000 off +Ethernet465 465 etp59b 59 100000 off +Ethernet466 466 etp59c 59 100000 off +Ethernet467 467 etp59d 59 100000 off +Ethernet468 468 etp59e 59 100000 off +Ethernet469 469 etp59f 59 100000 off +Ethernet470 470 etp59g 59 100000 off +Ethernet471 471 etp59h 59 100000 off +Ethernet480 480 etp61a 61 100000 off +Ethernet481 481 etp61b 61 100000 off +Ethernet482 482 etp61c 61 100000 off +Ethernet483 483 etp61d 61 100000 off +Ethernet484 484 etp61e 61 100000 off +Ethernet485 485 etp61f 61 100000 off +Ethernet486 486 etp61g 61 100000 off +Ethernet487 487 etp61h 61 100000 off +Ethernet496 496 etp63a 63 100000 off +Ethernet497 497 etp63b 63 100000 off +Ethernet498 498 etp63c 63 100000 off +Ethernet499 499 etp63d 63 100000 off +Ethernet500 500 etp63e 63 100000 off +Ethernet501 501 etp63f 63 100000 off +Ethernet502 502 etp63g 63 100000 off +Ethernet503 503 etp63h 63 100000 off Ethernet512 512 etp65 65 10000 Ethernet520 520 etp66 66 10000 diff --git a/device/mellanox/x86_64-nvidia_sn5610n-r0/Mellanox-SN5610N-C256S2/pmon_daemon_control.json b/device/mellanox/x86_64-nvidia_sn5610n-r0/Mellanox-SN5610N-C256S2/pmon_daemon_control.json index 208fa63ca29..dfeaa9d37b3 100644 --- a/device/mellanox/x86_64-nvidia_sn5610n-r0/Mellanox-SN5610N-C256S2/pmon_daemon_control.json +++ b/device/mellanox/x86_64-nvidia_sn5610n-r0/Mellanox-SN5610N-C256S2/pmon_daemon_control.json @@ -1,6 +1,9 @@ { "skip_ledd": true, "skip_fancontrol": true, - "skip_xcvrd_cmis_mgr": false + "skip_xcvrd_cmis_mgr": false, + "xcvrd": { + "dom_temperature_poll_interval": 20 + } } diff --git a/device/mellanox/x86_64-nvidia_sn5610n-r0/Mellanox-SN5610N-C256S2/port_config.ini b/device/mellanox/x86_64-nvidia_sn5610n-r0/Mellanox-SN5610N-C256S2/port_config.ini index de5ac2fee31..7f5ef4136f2 100644 --- a/device/mellanox/x86_64-nvidia_sn5610n-r0/Mellanox-SN5610N-C256S2/port_config.ini +++ b/device/mellanox/x86_64-nvidia_sn5610n-r0/Mellanox-SN5610N-C256S2/port_config.ini @@ -1,6 +1,6 @@ ## ## SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES -## Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +## Copyright (c) 2024-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. ## Apache-2.0 ## ## Licensed under the Apache License, Version 2.0 (the "License"); @@ -16,262 +16,261 @@ ## limitations under the License. ## -# name lanes alias index speed autoneg subport -Ethernet0 0 etp1a 1 100000 off 1 -Ethernet1 1 etp1b 1 100000 off 2 -Ethernet2 2 etp1c 1 100000 off 3 -Ethernet3 3 etp1d 1 100000 off 4 -Ethernet4 4 etp1e 1 100000 off 5 -Ethernet5 5 etp1f 1 100000 off 6 -Ethernet6 6 etp1g 1 100000 off 7 -Ethernet7 7 etp1h 1 100000 off 8 -Ethernet16 16 etp3a 3 100000 off 1 -Ethernet17 17 etp3b 3 100000 off 2 -Ethernet18 18 etp3c 3 100000 off 3 -Ethernet19 19 etp3d 3 100000 off 4 -Ethernet20 20 etp3e 3 100000 off 5 -Ethernet21 21 etp3f 3 100000 off 6 -Ethernet22 22 etp3g 3 100000 off 7 -Ethernet23 23 etp3h 3 100000 off 8 -Ethernet32 32 etp5a 5 100000 off 1 -Ethernet33 33 etp5b 5 100000 off 2 -Ethernet34 34 etp5c 5 100000 off 3 -Ethernet35 35 etp5d 5 100000 off 4 -Ethernet36 36 etp5e 5 100000 off 5 -Ethernet37 37 etp5f 5 100000 off 6 -Ethernet38 38 etp5g 5 100000 off 7 -Ethernet39 39 etp5h 5 100000 off 8 -Ethernet48 48 etp7a 7 100000 off 1 -Ethernet49 49 etp7b 7 100000 off 2 -Ethernet50 50 etp7c 7 100000 off 3 -Ethernet51 51 etp7d 7 100000 off 4 -Ethernet52 52 etp7e 7 100000 off 5 -Ethernet53 53 etp7f 7 100000 off 6 -Ethernet54 54 etp7g 7 100000 off 7 -Ethernet55 55 etp7h 7 100000 off 8 -Ethernet64 64 etp9a 9 100000 off 1 -Ethernet65 65 etp9b 9 100000 off 2 -Ethernet66 66 etp9c 9 100000 off 3 -Ethernet67 67 etp9d 9 100000 off 4 -Ethernet68 68 etp9e 9 100000 off 5 -Ethernet69 69 etp9f 9 100000 off 6 -Ethernet70 70 etp9g 9 100000 off 7 -Ethernet71 71 etp9h 9 100000 off 8 -Ethernet80 80 etp11a 11 100000 off 1 -Ethernet81 81 etp11b 11 100000 off 2 -Ethernet82 82 etp11c 11 100000 off 3 -Ethernet83 83 etp11d 11 100000 off 4 -Ethernet84 84 etp11e 11 100000 off 5 -Ethernet85 85 etp11f 11 100000 off 6 -Ethernet86 86 etp11g 11 100000 off 7 -Ethernet87 87 etp11h 11 100000 off 8 -Ethernet96 96 etp13a 13 100000 off 1 -Ethernet97 97 etp13b 13 100000 off 2 -Ethernet98 98 etp13c 13 100000 off 3 -Ethernet99 99 etp13d 13 100000 off 4 -Ethernet100 100 etp13e 13 100000 off 5 -Ethernet101 101 etp13f 13 100000 off 6 -Ethernet102 102 etp13g 13 100000 off 7 -Ethernet103 103 etp13h 13 100000 off 8 -Ethernet112 112 etp15a 15 100000 off 1 -Ethernet113 113 etp15b 15 100000 off 2 -Ethernet114 114 etp15c 15 100000 off 3 -Ethernet115 115 etp15d 15 100000 off 4 -Ethernet116 116 etp15e 15 100000 off 5 -Ethernet117 117 etp15f 15 100000 off 6 -Ethernet118 118 etp15g 15 100000 off 7 -Ethernet119 119 etp15h 15 100000 off 8 -Ethernet128 128 etp17a 17 100000 off 1 -Ethernet129 129 etp17b 17 100000 off 2 -Ethernet130 130 etp17c 17 100000 off 3 -Ethernet131 131 etp17d 17 100000 off 4 -Ethernet132 132 etp17e 17 100000 off 5 -Ethernet133 133 etp17f 17 100000 off 6 -Ethernet134 134 etp17g 17 100000 off 7 -Ethernet135 135 etp17h 17 100000 off 8 -Ethernet144 144 etp19a 19 100000 off 1 -Ethernet145 145 etp19b 19 100000 off 2 -Ethernet146 146 etp19c 19 100000 off 3 -Ethernet147 147 etp19d 19 100000 off 4 -Ethernet148 148 etp19e 19 100000 off 5 -Ethernet149 149 etp19f 19 100000 off 6 -Ethernet150 150 etp19g 19 100000 off 7 -Ethernet151 151 etp19h 19 100000 off 8 -Ethernet160 160 etp21a 21 100000 off 1 -Ethernet161 161 etp21b 21 100000 off 2 -Ethernet162 162 etp21c 21 100000 off 3 -Ethernet163 163 etp21d 21 100000 off 4 -Ethernet164 164 etp21e 21 100000 off 5 -Ethernet165 165 etp21f 21 100000 off 6 -Ethernet166 166 etp21g 21 100000 off 7 -Ethernet167 167 etp21h 21 100000 off 8 -Ethernet176 176 etp23a 23 100000 off 1 -Ethernet177 177 etp23b 23 100000 off 2 -Ethernet178 178 etp23c 23 100000 off 3 -Ethernet179 179 etp23d 23 100000 off 4 -Ethernet180 180 etp23e 23 100000 off 5 -Ethernet181 181 etp23f 23 100000 off 6 -Ethernet182 182 etp23g 23 100000 off 7 -Ethernet183 183 etp23h 23 100000 off 8 -Ethernet192 192 etp25a 25 100000 off 1 -Ethernet193 193 etp25b 25 100000 off 2 -Ethernet194 194 etp25c 25 100000 off 3 -Ethernet195 195 etp25d 25 100000 off 4 -Ethernet196 196 etp25e 25 100000 off 5 -Ethernet197 197 etp25f 25 100000 off 6 -Ethernet198 198 etp25g 25 100000 off 7 -Ethernet199 199 etp25h 25 100000 off 8 -Ethernet208 208 etp27a 27 100000 off 1 -Ethernet209 209 etp27b 27 100000 off 2 -Ethernet210 210 etp27c 27 100000 off 3 -Ethernet211 211 etp27d 27 100000 off 4 -Ethernet212 212 etp27e 27 100000 off 5 -Ethernet213 213 etp27f 27 100000 off 6 -Ethernet214 214 etp27g 27 100000 off 7 -Ethernet215 215 etp27h 27 100000 off 8 -Ethernet224 224 etp29a 29 100000 off 1 -Ethernet225 225 etp29b 29 100000 off 2 -Ethernet226 226 etp29c 29 100000 off 3 -Ethernet227 227 etp29d 29 100000 off 4 -Ethernet228 228 etp29e 29 100000 off 5 -Ethernet229 229 etp29f 29 100000 off 6 -Ethernet230 230 etp29g 29 100000 off 7 -Ethernet231 231 etp29h 29 100000 off 8 -Ethernet240 240 etp31a 31 100000 off 1 -Ethernet241 241 etp31b 31 100000 off 2 -Ethernet242 242 etp31c 31 100000 off 3 -Ethernet243 243 etp31d 31 100000 off 4 -Ethernet244 244 etp31e 31 100000 off 5 -Ethernet245 245 etp31f 31 100000 off 6 -Ethernet246 246 etp31g 31 100000 off 7 -Ethernet247 247 etp31h 31 100000 off 8 -Ethernet256 256 etp33a 33 100000 off 1 -Ethernet257 257 etp33b 33 100000 off 2 -Ethernet258 258 etp33c 33 100000 off 3 -Ethernet259 259 etp33d 33 100000 off 4 -Ethernet260 260 etp33e 33 100000 off 5 -Ethernet261 261 etp33f 33 100000 off 6 -Ethernet262 262 etp33g 33 100000 off 7 -Ethernet263 263 etp33h 33 100000 off 8 -Ethernet272 272 etp35a 35 100000 off 1 -Ethernet273 273 etp35b 35 100000 off 2 -Ethernet274 274 etp35c 35 100000 off 3 -Ethernet275 275 etp35d 35 100000 off 4 -Ethernet276 276 etp35e 35 100000 off 5 -Ethernet277 277 etp35f 35 100000 off 6 -Ethernet278 278 etp35g 35 100000 off 7 -Ethernet279 279 etp35h 35 100000 off 8 -Ethernet288 288 etp37a 37 100000 off 1 -Ethernet289 289 etp37b 37 100000 off 2 -Ethernet290 290 etp37c 37 100000 off 3 -Ethernet291 291 etp37d 37 100000 off 4 -Ethernet292 292 etp37e 37 100000 off 5 -Ethernet293 293 etp37f 37 100000 off 6 -Ethernet294 294 etp37g 37 100000 off 7 -Ethernet295 295 etp37h 37 100000 off 8 -Ethernet304 304 etp39a 39 100000 off 1 -Ethernet305 305 etp39b 39 100000 off 2 -Ethernet306 306 etp39c 39 100000 off 3 -Ethernet307 307 etp39d 39 100000 off 4 -Ethernet308 308 etp39e 39 100000 off 5 -Ethernet309 309 etp39f 39 100000 off 6 -Ethernet310 310 etp39g 39 100000 off 7 -Ethernet311 311 etp39h 39 100000 off 8 -Ethernet320 320 etp41a 41 100000 off 1 -Ethernet321 321 etp41b 41 100000 off 2 -Ethernet322 322 etp41c 41 100000 off 3 -Ethernet323 323 etp41d 41 100000 off 4 -Ethernet324 324 etp41e 41 100000 off 5 -Ethernet325 325 etp41f 41 100000 off 6 -Ethernet326 326 etp41g 41 100000 off 7 -Ethernet327 327 etp41h 41 100000 off 8 -Ethernet336 336 etp43a 43 100000 off 1 -Ethernet337 337 etp43b 43 100000 off 2 -Ethernet338 338 etp43c 43 100000 off 3 -Ethernet339 339 etp43d 43 100000 off 4 -Ethernet340 340 etp43e 43 100000 off 5 -Ethernet341 341 etp43f 43 100000 off 6 -Ethernet342 342 etp43g 43 100000 off 7 -Ethernet343 343 etp43h 43 100000 off 8 -Ethernet352 352 etp45a 45 100000 off 1 -Ethernet353 353 etp45b 45 100000 off 2 -Ethernet354 354 etp45c 45 100000 off 3 -Ethernet355 355 etp45d 45 100000 off 4 -Ethernet356 356 etp45e 45 100000 off 5 -Ethernet357 357 etp45f 45 100000 off 6 -Ethernet358 358 etp45g 45 100000 off 7 -Ethernet359 359 etp45h 45 100000 off 8 -Ethernet368 368 etp47a 47 100000 off 1 -Ethernet369 369 etp47b 47 100000 off 2 -Ethernet370 370 etp47c 47 100000 off 3 -Ethernet371 371 etp47d 47 100000 off 4 -Ethernet372 372 etp47e 47 100000 off 5 -Ethernet373 373 etp47f 47 100000 off 6 -Ethernet374 374 etp47g 47 100000 off 7 -Ethernet375 375 etp47h 47 100000 off 8 -Ethernet384 384 etp49a 49 100000 off 1 -Ethernet385 385 etp49b 49 100000 off 2 -Ethernet386 386 etp49c 49 100000 off 3 -Ethernet387 387 etp49d 49 100000 off 4 -Ethernet388 388 etp49e 49 100000 off 5 -Ethernet389 389 etp49f 49 100000 off 6 -Ethernet390 390 etp49g 49 100000 off 7 -Ethernet391 391 etp49h 49 100000 off 8 -Ethernet400 400 etp51a 51 100000 off 1 -Ethernet401 401 etp51b 51 100000 off 2 -Ethernet402 402 etp51c 51 100000 off 3 -Ethernet403 403 etp51d 51 100000 off 4 -Ethernet404 404 etp51e 51 100000 off 5 -Ethernet405 405 etp51f 51 100000 off 6 -Ethernet406 406 etp51g 51 100000 off 7 -Ethernet407 407 etp51h 51 100000 off 8 -Ethernet416 416 etp53a 53 100000 off 1 -Ethernet417 417 etp53b 53 100000 off 2 -Ethernet418 418 etp53c 53 100000 off 3 -Ethernet419 419 etp53d 53 100000 off 4 -Ethernet420 420 etp53e 53 100000 off 5 -Ethernet421 421 etp53f 53 100000 off 6 -Ethernet422 422 etp53g 53 100000 off 7 -Ethernet423 423 etp53h 53 100000 off 8 -Ethernet432 432 etp55a 55 100000 off 1 -Ethernet433 433 etp55b 55 100000 off 2 -Ethernet434 434 etp55c 55 100000 off 3 -Ethernet435 435 etp55d 55 100000 off 4 -Ethernet436 436 etp55e 55 100000 off 5 -Ethernet437 437 etp55f 55 100000 off 6 -Ethernet438 438 etp55g 55 100000 off 7 -Ethernet439 439 etp55h 55 100000 off 8 -Ethernet448 448 etp57a 57 100000 off 1 -Ethernet449 449 etp57b 57 100000 off 2 -Ethernet450 450 etp57c 57 100000 off 3 -Ethernet451 451 etp57d 57 100000 off 4 -Ethernet452 452 etp57e 57 100000 off 5 -Ethernet453 453 etp57f 57 100000 off 6 -Ethernet454 454 etp57g 57 100000 off 7 -Ethernet455 455 etp57h 57 100000 off 8 -Ethernet464 464 etp59a 59 100000 off 1 -Ethernet465 465 etp59b 59 100000 off 2 -Ethernet466 466 etp59c 59 100000 off 3 -Ethernet467 467 etp59d 59 100000 off 4 -Ethernet468 468 etp59e 59 100000 off 5 -Ethernet469 469 etp59f 59 100000 off 6 -Ethernet470 470 etp59g 59 100000 off 7 -Ethernet471 471 etp59h 59 100000 off 8 -Ethernet480 480 etp61a 61 100000 off 1 -Ethernet481 481 etp61b 61 100000 off 2 -Ethernet482 482 etp61c 61 100000 off 3 -Ethernet483 483 etp61d 61 100000 off 4 -Ethernet484 484 etp61e 61 100000 off 5 -Ethernet485 485 etp61f 61 100000 off 6 -Ethernet486 486 etp61g 61 100000 off 7 -Ethernet487 487 etp61h 61 100000 off 8 -Ethernet496 496 etp63a 63 100000 off 1 -Ethernet497 497 etp63b 63 100000 off 2 -Ethernet498 498 etp63c 63 100000 off 3 -Ethernet499 499 etp63d 63 100000 off 4 -Ethernet500 500 etp63e 63 100000 off 5 -Ethernet501 501 etp63f 63 100000 off 6 -Ethernet502 502 etp63g 63 100000 off 7 -Ethernet503 503 etp63h 63 100000 off 8 +# name lanes alias index speed autthernet0 0 etp1a 1 100000 off +Ethernet1 1 etp1b 1 100000 off +Ethernet2 2 etp1c 1 100000 off +Ethernet3 3 etp1d 1 100000 off +Ethernet4 4 etp1e 1 100000 off +Ethernet5 5 etp1f 1 100000 off +Ethernet6 6 etp1g 1 100000 off +Ethernet7 7 etp1h 1 100000 off +Ethernet16 16 etp3a 3 100000 off +Ethernet17 17 etp3b 3 100000 off +Ethernet18 18 etp3c 3 100000 off +Ethernet19 19 etp3d 3 100000 off +Ethernet20 20 etp3e 3 100000 off +Ethernet21 21 etp3f 3 100000 off +Ethernet22 22 etp3g 3 100000 off +Ethernet23 23 etp3h 3 100000 off +Ethernet32 32 etp5a 5 100000 off +Ethernet33 33 etp5b 5 100000 off +Ethernet34 34 etp5c 5 100000 off +Ethernet35 35 etp5d 5 100000 off +Ethernet36 36 etp5e 5 100000 off +Ethernet37 37 etp5f 5 100000 off +Ethernet38 38 etp5g 5 100000 off +Ethernet39 39 etp5h 5 100000 off +Ethernet48 48 etp7a 7 100000 off +Ethernet49 49 etp7b 7 100000 off +Ethernet50 50 etp7c 7 100000 off +Ethernet51 51 etp7d 7 100000 off +Ethernet52 52 etp7e 7 100000 off +Ethernet53 53 etp7f 7 100000 off +Ethernet54 54 etp7g 7 100000 off +Ethernet55 55 etp7h 7 100000 off +Ethernet64 64 etp9a 9 100000 off +Ethernet65 65 etp9b 9 100000 off +Ethernet66 66 etp9c 9 100000 off +Ethernet67 67 etp9d 9 100000 off +Ethernet68 68 etp9e 9 100000 off +Ethernet69 69 etp9f 9 100000 off +Ethernet70 70 etp9g 9 100000 off +Ethernet71 71 etp9h 9 100000 off +Ethernet80 80 etp11a 11 100000 off +Ethernet81 81 etp11b 11 100000 off +Ethernet82 82 etp11c 11 100000 off +Ethernet83 83 etp11d 11 100000 off +Ethernet84 84 etp11e 11 100000 off +Ethernet85 85 etp11f 11 100000 off +Ethernet86 86 etp11g 11 100000 off +Ethernet87 87 etp11h 11 100000 off +Ethernet96 96 etp13a 13 100000 off +Ethernet97 97 etp13b 13 100000 off +Ethernet98 98 etp13c 13 100000 off +Ethernet99 99 etp13d 13 100000 off +Ethernet100 100 etp13e 13 100000 off +Ethernet101 101 etp13f 13 100000 off +Ethernet102 102 etp13g 13 100000 off +Ethernet103 103 etp13h 13 100000 off +Ethernet112 112 etp15a 15 100000 off +Ethernet113 113 etp15b 15 100000 off +Ethernet114 114 etp15c 15 100000 off +Ethernet115 115 etp15d 15 100000 off +Ethernet116 116 etp15e 15 100000 off +Ethernet117 117 etp15f 15 100000 off +Ethernet118 118 etp15g 15 100000 off +Ethernet119 119 etp15h 15 100000 off +Ethernet128 128 etp17a 17 100000 off +Ethernet129 129 etp17b 17 100000 off +Ethernet130 130 etp17c 17 100000 off +Ethernet131 131 etp17d 17 100000 off +Ethernet132 132 etp17e 17 100000 off +Ethernet133 133 etp17f 17 100000 off +Ethernet134 134 etp17g 17 100000 off +Ethernet135 135 etp17h 17 100000 off +Ethernet144 144 etp19a 19 100000 off +Ethernet145 145 etp19b 19 100000 off +Ethernet146 146 etp19c 19 100000 off +Ethernet147 147 etp19d 19 100000 off +Ethernet148 148 etp19e 19 100000 off +Ethernet149 149 etp19f 19 100000 off +Ethernet150 150 etp19g 19 100000 off +Ethernet151 151 etp19h 19 100000 off +Ethernet160 160 etp21a 21 100000 off +Ethernet161 161 etp21b 21 100000 off +Ethernet162 162 etp21c 21 100000 off +Ethernet163 163 etp21d 21 100000 off +Ethernet164 164 etp21e 21 100000 off +Ethernet165 165 etp21f 21 100000 off +Ethernet166 166 etp21g 21 100000 off +Ethernet167 167 etp21h 21 100000 off +Ethernet176 176 etp23a 23 100000 off +Ethernet177 177 etp23b 23 100000 off +Ethernet178 178 etp23c 23 100000 off +Ethernet179 179 etp23d 23 100000 off +Ethernet180 180 etp23e 23 100000 off +Ethernet181 181 etp23f 23 100000 off +Ethernet182 182 etp23g 23 100000 off +Ethernet183 183 etp23h 23 100000 off +Ethernet192 192 etp25a 25 100000 off +Ethernet193 193 etp25b 25 100000 off +Ethernet194 194 etp25c 25 100000 off +Ethernet195 195 etp25d 25 100000 off +Ethernet196 196 etp25e 25 100000 off +Ethernet197 197 etp25f 25 100000 off +Ethernet198 198 etp25g 25 100000 off +Ethernet199 199 etp25h 25 100000 off +Ethernet208 208 etp27a 27 100000 off +Ethernet209 209 etp27b 27 100000 off +Ethernet210 210 etp27c 27 100000 off +Ethernet211 211 etp27d 27 100000 off +Ethernet212 212 etp27e 27 100000 off +Ethernet213 213 etp27f 27 100000 off +Ethernet214 214 etp27g 27 100000 off +Ethernet215 215 etp27h 27 100000 off +Ethernet224 224 etp29a 29 100000 off +Ethernet225 225 etp29b 29 100000 off +Ethernet226 226 etp29c 29 100000 off +Ethernet227 227 etp29d 29 100000 off +Ethernet228 228 etp29e 29 100000 off +Ethernet229 229 etp29f 29 100000 off +Ethernet230 230 etp29g 29 100000 off +Ethernet231 231 etp29h 29 100000 off +Ethernet240 240 etp31a 31 100000 off +Ethernet241 241 etp31b 31 100000 off +Ethernet242 242 etp31c 31 100000 off +Ethernet243 243 etp31d 31 100000 off +Ethernet244 244 etp31e 31 100000 off +Ethernet245 245 etp31f 31 100000 off +Ethernet246 246 etp31g 31 100000 off +Ethernet247 247 etp31h 31 100000 off +Ethernet256 256 etp33a 33 100000 off +Ethernet257 257 etp33b 33 100000 off +Ethernet258 258 etp33c 33 100000 off +Ethernet259 259 etp33d 33 100000 off +Ethernet260 260 etp33e 33 100000 off +Ethernet261 261 etp33f 33 100000 off +Ethernet262 262 etp33g 33 100000 off +Ethernet263 263 etp33h 33 100000 off +Ethernet272 272 etp35a 35 100000 off +Ethernet273 273 etp35b 35 100000 off +Ethernet274 274 etp35c 35 100000 off +Ethernet275 275 etp35d 35 100000 off +Ethernet276 276 etp35e 35 100000 off +Ethernet277 277 etp35f 35 100000 off +Ethernet278 278 etp35g 35 100000 off +Ethernet279 279 etp35h 35 100000 off +Ethernet288 288 etp37a 37 100000 off +Ethernet289 289 etp37b 37 100000 off +Ethernet290 290 etp37c 37 100000 off +Ethernet291 291 etp37d 37 100000 off +Ethernet292 292 etp37e 37 100000 off +Ethernet293 293 etp37f 37 100000 off +Ethernet294 294 etp37g 37 100000 off +Ethernet295 295 etp37h 37 100000 off +Ethernet304 304 etp39a 39 100000 off +Ethernet305 305 etp39b 39 100000 off +Ethernet306 306 etp39c 39 100000 off +Ethernet307 307 etp39d 39 100000 off +Ethernet308 308 etp39e 39 100000 off +Ethernet309 309 etp39f 39 100000 off +Ethernet310 310 etp39g 39 100000 off +Ethernet311 311 etp39h 39 100000 off +Ethernet320 320 etp41a 41 100000 off +Ethernet321 321 etp41b 41 100000 off +Ethernet322 322 etp41c 41 100000 off +Ethernet323 323 etp41d 41 100000 off +Ethernet324 324 etp41e 41 100000 off +Ethernet325 325 etp41f 41 100000 off +Ethernet326 326 etp41g 41 100000 off +Ethernet327 327 etp41h 41 100000 off +Ethernet336 336 etp43a 43 100000 off +Ethernet337 337 etp43b 43 100000 off +Ethernet338 338 etp43c 43 100000 off +Ethernet339 339 etp43d 43 100000 off +Ethernet340 340 etp43e 43 100000 off +Ethernet341 341 etp43f 43 100000 off +Ethernet342 342 etp43g 43 100000 off +Ethernet343 343 etp43h 43 100000 off +Ethernet352 352 etp45a 45 100000 off +Ethernet353 353 etp45b 45 100000 off +Ethernet354 354 etp45c 45 100000 off +Ethernet355 355 etp45d 45 100000 off +Ethernet356 356 etp45e 45 100000 off +Ethernet357 357 etp45f 45 100000 off +Ethernet358 358 etp45g 45 100000 off +Ethernet359 359 etp45h 45 100000 off +Ethernet368 368 etp47a 47 100000 off +Ethernet369 369 etp47b 47 100000 off +Ethernet370 370 etp47c 47 100000 off +Ethernet371 371 etp47d 47 100000 off +Ethernet372 372 etp47e 47 100000 off +Ethernet373 373 etp47f 47 100000 off +Ethernet374 374 etp47g 47 100000 off +Ethernet375 375 etp47h 47 100000 off +Ethernet384 384 etp49a 49 100000 off +Ethernet385 385 etp49b 49 100000 off +Ethernet386 386 etp49c 49 100000 off +Ethernet387 387 etp49d 49 100000 off +Ethernet388 388 etp49e 49 100000 off +Ethernet389 389 etp49f 49 100000 off +Ethernet390 390 etp49g 49 100000 off +Ethernet391 391 etp49h 49 100000 off +Ethernet400 400 etp51a 51 100000 off +Ethernet401 401 etp51b 51 100000 off +Ethernet402 402 etp51c 51 100000 off +Ethernet403 403 etp51d 51 100000 off +Ethernet404 404 etp51e 51 100000 off +Ethernet405 405 etp51f 51 100000 off +Ethernet406 406 etp51g 51 100000 off +Ethernet407 407 etp51h 51 100000 off +Ethernet416 416 etp53a 53 100000 off +Ethernet417 417 etp53b 53 100000 off +Ethernet418 418 etp53c 53 100000 off +Ethernet419 419 etp53d 53 100000 off +Ethernet420 420 etp53e 53 100000 off +Ethernet421 421 etp53f 53 100000 off +Ethernet422 422 etp53g 53 100000 off +Ethernet423 423 etp53h 53 100000 off +Ethernet432 432 etp55a 55 100000 off +Ethernet433 433 etp55b 55 100000 off +Ethernet434 434 etp55c 55 100000 off +Ethernet435 435 etp55d 55 100000 off +Ethernet436 436 etp55e 55 100000 off +Ethernet437 437 etp55f 55 100000 off +Ethernet438 438 etp55g 55 100000 off +Ethernet439 439 etp55h 55 100000 off +Ethernet448 448 etp57a 57 100000 off +Ethernet449 449 etp57b 57 100000 off +Ethernet450 450 etp57c 57 100000 off +Ethernet451 451 etp57d 57 100000 off +Ethernet452 452 etp57e 57 100000 off +Ethernet453 453 etp57f 57 100000 off +Ethernet454 454 etp57g 57 100000 off +Ethernet455 455 etp57h 57 100000 off +Ethernet464 464 etp59a 59 100000 off +Ethernet465 465 etp59b 59 100000 off +Ethernet466 466 etp59c 59 100000 off +Ethernet467 467 etp59d 59 100000 off +Ethernet468 468 etp59e 59 100000 off +Ethernet469 469 etp59f 59 100000 off +Ethernet470 470 etp59g 59 100000 off +Ethernet471 471 etp59h 59 100000 off +Ethernet480 480 etp61a 61 100000 off +Ethernet481 481 etp61b 61 100000 off +Ethernet482 482 etp61c 61 100000 off +Ethernet483 483 etp61d 61 100000 off +Ethernet484 484 etp61e 61 100000 off +Ethernet485 485 etp61f 61 100000 off +Ethernet486 486 etp61g 61 100000 off +Ethernet487 487 etp61h 61 100000 off +Ethernet496 496 etp63a 63 100000 off +Ethernet497 497 etp63b 63 100000 off +Ethernet498 498 etp63c 63 100000 off +Ethernet499 499 etp63d 63 100000 off +Ethernet500 500 etp63e 63 100000 off +Ethernet501 501 etp63f 63 100000 off +Ethernet502 502 etp63g 63 100000 off +Ethernet503 503 etp63h 63 100000 off Ethernet512 512 etp65 65 10000 Ethernet520 520 etp66 66 10000 diff --git a/device/mellanox/x86_64-nvidia_sn5610n-r0/create_only_config_db_buffers.json b/device/mellanox/x86_64-nvidia_sn5610n-r0/create_only_config_db_buffers.json new file mode 120000 index 00000000000..87e12387fcd --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5610n-r0/create_only_config_db_buffers.json @@ -0,0 +1 @@ +../x86_64-mlnx_msn2700-r0/create_only_config_db_buffers.json \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn5610n-r0/platform.json b/device/mellanox/x86_64-nvidia_sn5610n-r0/platform.json index 230ef0fbd88..3a7d15f1eb6 100644 --- a/device/mellanox/x86_64-nvidia_sn5610n-r0/platform.json +++ b/device/mellanox/x86_64-nvidia_sn5610n-r0/platform.json @@ -138,7 +138,8 @@ ], "thermals": [ { - "name": "ASIC" + "name": "ASIC", + "polling_interval": 3 }, { "name": "Ambient Fan Side Temp" diff --git a/device/mellanox/x86_64-nvidia_sn5610n-r0/pmon_daemon_control.json b/device/mellanox/x86_64-nvidia_sn5610n-r0/pmon_daemon_control.json index fefdfb32739..7981c6ffe53 100644 --- a/device/mellanox/x86_64-nvidia_sn5610n-r0/pmon_daemon_control.json +++ b/device/mellanox/x86_64-nvidia_sn5610n-r0/pmon_daemon_control.json @@ -1,6 +1,9 @@ { "skip_ledd": true, "skip_fancontrol": true, - "skip_xcvrd_cmis_mgr": true + "skip_xcvrd_cmis_mgr": true, + "xcvrd": { + "dom_temperature_poll_interval": 20 + } } diff --git a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C448O16/hwsku.json b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C448O16/hwsku.json index 4e96edde0ba..becb9f79212 100644 --- a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C448O16/hwsku.json +++ b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C448O16/hwsku.json @@ -2,2322 +2,1858 @@ "interfaces": { "Ethernet0": { "default_brkout_mode": "8x100G[50G]", - "subport": "1", "autoneg": "off" }, "Ethernet1": { "default_brkout_mode": "8x100G[50G]", - "subport": "2", "autoneg": "off" }, "Ethernet2": { "default_brkout_mode": "8x100G[50G]", - "subport": "3", "autoneg": "off" }, "Ethernet3": { "default_brkout_mode": "8x100G[50G]", - "subport": "4", "autoneg": "off" }, "Ethernet4": { "default_brkout_mode": "8x100G[50G]", - "subport": "5", "autoneg": "off" }, "Ethernet5": { "default_brkout_mode": "8x100G[50G]", - "subport": "6", "autoneg": "off" }, "Ethernet6": { "default_brkout_mode": "8x100G[50G]", - "subport": "7", "autoneg": "off" }, "Ethernet7": { "default_brkout_mode": "8x100G[50G]", - "subport": "8", "autoneg": "off" }, "Ethernet8": { "default_brkout_mode": "8x100G[50G]", - "subport": "1", "autoneg": "off" }, "Ethernet9": { "default_brkout_mode": "8x100G[50G]", - "subport": "2", "autoneg": "off" }, "Ethernet10": { "default_brkout_mode": "8x100G[50G]", - "subport": "3", "autoneg": "off" }, "Ethernet11": { "default_brkout_mode": "8x100G[50G]", - "subport": "4", "autoneg": "off" }, "Ethernet12": { "default_brkout_mode": "8x100G[50G]", - "subport": "5", "autoneg": "off" }, "Ethernet13": { "default_brkout_mode": "8x100G[50G]", - "subport": "6", "autoneg": "off" }, "Ethernet14": { "default_brkout_mode": "8x100G[50G]", - "subport": "7", "autoneg": "off" }, "Ethernet15": { "default_brkout_mode": "8x100G[50G]", - "subport": "8", "autoneg": "off" }, "Ethernet16": { "default_brkout_mode": "8x100G[50G]", - "subport": "1", "autoneg": "off" }, "Ethernet17": { "default_brkout_mode": "8x100G[50G]", - "subport": "2", "autoneg": "off" }, "Ethernet18": { "default_brkout_mode": "8x100G[50G]", - "subport": "3", "autoneg": "off" }, "Ethernet19": { "default_brkout_mode": "8x100G[50G]", - "subport": "4", "autoneg": "off" }, "Ethernet20": { "default_brkout_mode": "8x100G[50G]", - "subport": "5", "autoneg": "off" }, "Ethernet21": { "default_brkout_mode": "8x100G[50G]", - "subport": "6", "autoneg": "off" }, "Ethernet22": { "default_brkout_mode": "8x100G[50G]", - "subport": "7", "autoneg": "off" }, "Ethernet23": { "default_brkout_mode": "8x100G[50G]", - "subport": "8", "autoneg": "off" }, "Ethernet24": { "default_brkout_mode": "8x100G[50G]", - "subport": "1", "autoneg": "off" }, "Ethernet25": { "default_brkout_mode": "8x100G[50G]", - "subport": "2", "autoneg": "off" }, "Ethernet26": { "default_brkout_mode": "8x100G[50G]", - "subport": "3", "autoneg": "off" }, "Ethernet27": { "default_brkout_mode": "8x100G[50G]", - "subport": "4", "autoneg": "off" }, "Ethernet28": { "default_brkout_mode": "8x100G[50G]", - "subport": "5", "autoneg": "off" }, "Ethernet29": { "default_brkout_mode": "8x100G[50G]", - "subport": "6", "autoneg": "off" }, "Ethernet30": { "default_brkout_mode": "8x100G[50G]", - "subport": "7", "autoneg": "off" }, "Ethernet31": { "default_brkout_mode": "8x100G[50G]", - "subport": "8", "autoneg": "off" }, "Ethernet32": { "default_brkout_mode": "8x100G[50G]", - "subport": "1", "autoneg": "off" }, "Ethernet33": { "default_brkout_mode": "8x100G[50G]", - "subport": "2", "autoneg": "off" }, "Ethernet34": { "default_brkout_mode": "8x100G[50G]", - "subport": "3", "autoneg": "off" }, "Ethernet35": { "default_brkout_mode": "8x100G[50G]", - "subport": "4", "autoneg": "off" }, "Ethernet36": { "default_brkout_mode": "8x100G[50G]", - "subport": "5", "autoneg": "off" }, "Ethernet37": { "default_brkout_mode": "8x100G[50G]", - "subport": "6", "autoneg": "off" }, "Ethernet38": { "default_brkout_mode": "8x100G[50G]", - "subport": "7", "autoneg": "off" }, "Ethernet39": { "default_brkout_mode": "8x100G[50G]", - "subport": "8", "autoneg": "off" }, "Ethernet40": { "default_brkout_mode": "8x100G[50G]", - "subport": "1", "autoneg": "off" }, "Ethernet41": { "default_brkout_mode": "8x100G[50G]", - "subport": "2", "autoneg": "off" }, "Ethernet42": { "default_brkout_mode": "8x100G[50G]", - "subport": "3", "autoneg": "off" }, "Ethernet43": { "default_brkout_mode": "8x100G[50G]", - "subport": "4", "autoneg": "off" }, "Ethernet44": { "default_brkout_mode": "8x100G[50G]", - "subport": "5", "autoneg": "off" }, "Ethernet45": { "default_brkout_mode": "8x100G[50G]", - "subport": "6", "autoneg": "off" }, "Ethernet46": { "default_brkout_mode": "8x100G[50G]", - "subport": "7", "autoneg": "off" }, "Ethernet47": { "default_brkout_mode": "8x100G[50G]", - "subport": "8", "autoneg": "off" }, "Ethernet48": { "default_brkout_mode": "8x100G[50G]", - "subport": "1", "autoneg": "off" }, "Ethernet49": { "default_brkout_mode": "8x100G[50G]", - "subport": "2", "autoneg": "off" }, "Ethernet50": { "default_brkout_mode": "8x100G[50G]", - "subport": "3", "autoneg": "off" }, "Ethernet51": { "default_brkout_mode": "8x100G[50G]", - "subport": "4", "autoneg": "off" }, "Ethernet52": { "default_brkout_mode": "8x100G[50G]", - "subport": "5", "autoneg": "off" }, "Ethernet53": { "default_brkout_mode": "8x100G[50G]", - "subport": "6", "autoneg": "off" }, "Ethernet54": { "default_brkout_mode": "8x100G[50G]", - "subport": "7", "autoneg": "off" }, "Ethernet55": { "default_brkout_mode": "8x100G[50G]", - "subport": "8", "autoneg": "off" }, "Ethernet56": { "default_brkout_mode": "8x100G[50G]", - "subport": "1", "autoneg": "off" }, "Ethernet57": { "default_brkout_mode": "8x100G[50G]", - "subport": "2", "autoneg": "off" }, "Ethernet58": { "default_brkout_mode": "8x100G[50G]", - "subport": "3", "autoneg": "off" }, "Ethernet59": { "default_brkout_mode": "8x100G[50G]", - "subport": "4", "autoneg": "off" }, "Ethernet60": { "default_brkout_mode": "8x100G[50G]", - "subport": "5", "autoneg": "off" }, "Ethernet61": { "default_brkout_mode": "8x100G[50G]", - "subport": "6", "autoneg": "off" }, "Ethernet62": { "default_brkout_mode": "8x100G[50G]", - "subport": "7", "autoneg": "off" }, "Ethernet63": { "default_brkout_mode": "8x100G[50G]", - "subport": "8", "autoneg": "off" }, "Ethernet64": { "default_brkout_mode": "8x100G[50G]", - "subport": "1", "autoneg": "off" }, "Ethernet65": { "default_brkout_mode": "8x100G[50G]", - "subport": "2", "autoneg": "off" }, "Ethernet66": { "default_brkout_mode": "8x100G[50G]", - "subport": "3", "autoneg": "off" }, "Ethernet67": { "default_brkout_mode": "8x100G[50G]", - "subport": "4", "autoneg": "off" }, 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"subport": "2", "autoneg": "off" }, "Ethernet458": { "default_brkout_mode": "8x100G[50G]", - "subport": "3", "autoneg": "off" }, "Ethernet459": { "default_brkout_mode": "8x100G[50G]", - "subport": "4", "autoneg": "off" }, "Ethernet460": { "default_brkout_mode": "8x100G[50G]", - "subport": "5", "autoneg": "off" }, "Ethernet461": { "default_brkout_mode": "8x100G[50G]", - "subport": "6", "autoneg": "off" }, "Ethernet462": { "default_brkout_mode": "8x100G[50G]", - "subport": "7", "autoneg": "off" }, "Ethernet463": { "default_brkout_mode": "8x100G[50G]", - "subport": "8", "autoneg": "off" }, "Ethernet464": { "default_brkout_mode": "8x100G[50G]", - "subport": "1", "autoneg": "off" }, "Ethernet465": { "default_brkout_mode": "8x100G[50G]", - "subport": "2", "autoneg": "off" }, "Ethernet466": { "default_brkout_mode": "8x100G[50G]", - "subport": "3", "autoneg": "off" }, "Ethernet467": { "default_brkout_mode": "8x100G[50G]", - "subport": "4", "autoneg": "off" }, "Ethernet468": { "default_brkout_mode": "8x100G[50G]", - "subport": "5", "autoneg": "off" }, "Ethernet469": { "default_brkout_mode": "8x100G[50G]", - "subport": "6", "autoneg": "off" }, "Ethernet470": { "default_brkout_mode": "8x100G[50G]", - "subport": "7", "autoneg": "off" }, "Ethernet471": { "default_brkout_mode": "8x100G[50G]", - "subport": "8", "autoneg": "off" }, "Ethernet472": { "default_brkout_mode": "8x100G[50G]", - "subport": "1", "autoneg": "off" }, "Ethernet473": { "default_brkout_mode": "8x100G[50G]", - "subport": "2", "autoneg": "off" }, "Ethernet474": { "default_brkout_mode": "8x100G[50G]", - "subport": "3", "autoneg": "off" }, "Ethernet475": { "default_brkout_mode": "8x100G[50G]", - "subport": "4", "autoneg": "off" }, "Ethernet476": { "default_brkout_mode": "8x100G[50G]", - "subport": "5", "autoneg": "off" }, "Ethernet477": { "default_brkout_mode": "8x100G[50G]", - "subport": "6", "autoneg": "off" }, "Ethernet478": { "default_brkout_mode": "8x100G[50G]", - "subport": "7", "autoneg": "off" }, "Ethernet479": { "default_brkout_mode": "8x100G[50G]", - "subport": "8", "autoneg": "off" }, "Ethernet480": { "default_brkout_mode": "8x100G[50G]", - "subport": "1", "autoneg": "off" }, "Ethernet481": { "default_brkout_mode": "8x100G[50G]", - "subport": "2", "autoneg": "off" }, "Ethernet482": { "default_brkout_mode": "8x100G[50G]", - "subport": "3", "autoneg": "off" }, "Ethernet483": { "default_brkout_mode": "8x100G[50G]", - "subport": "4", "autoneg": "off" }, "Ethernet484": { "default_brkout_mode": "8x100G[50G]", - "subport": "5", "autoneg": "off" }, "Ethernet485": { "default_brkout_mode": "8x100G[50G]", - "subport": "6", "autoneg": "off" }, "Ethernet486": { "default_brkout_mode": "8x100G[50G]", - "subport": "7", "autoneg": "off" }, "Ethernet487": { "default_brkout_mode": "8x100G[50G]", - "subport": "8", "autoneg": "off" }, "Ethernet488": { "default_brkout_mode": "8x100G[50G]", - "subport": "1", "autoneg": "off" }, "Ethernet489": { "default_brkout_mode": "8x100G[50G]", - "subport": "2", "autoneg": "off" }, "Ethernet490": { "default_brkout_mode": "8x100G[50G]", - "subport": "3", "autoneg": "off" }, "Ethernet491": { "default_brkout_mode": "8x100G[50G]", - "subport": "4", "autoneg": "off" }, "Ethernet492": { "default_brkout_mode": "8x100G[50G]", - "subport": "5", "autoneg": "off" }, "Ethernet493": { "default_brkout_mode": "8x100G[50G]", - "subport": "6", "autoneg": "off" }, "Ethernet494": { "default_brkout_mode": "8x100G[50G]", - "subport": "7", "autoneg": "off" }, "Ethernet495": { "default_brkout_mode": "8x100G[50G]", - "subport": "8", "autoneg": "off" }, "Ethernet496": { "default_brkout_mode": "8x100G[50G]", - "subport": "1", "autoneg": "off" }, "Ethernet497": { "default_brkout_mode": "8x100G[50G]", - "subport": "2", "autoneg": "off" }, "Ethernet498": { "default_brkout_mode": "8x100G[50G]", - "subport": "3", "autoneg": "off" }, "Ethernet499": { "default_brkout_mode": "8x100G[50G]", - "subport": "4", "autoneg": "off" }, "Ethernet500": { "default_brkout_mode": "8x100G[50G]", - "subport": "5", "autoneg": "off" }, "Ethernet501": { "default_brkout_mode": "8x100G[50G]", - "subport": "6", "autoneg": "off" }, "Ethernet502": { "default_brkout_mode": "8x100G[50G]", - "subport": "7", "autoneg": "off" }, "Ethernet503": { "default_brkout_mode": "8x100G[50G]", - "subport": "8", "autoneg": "off" }, "Ethernet504": { "default_brkout_mode": "8x100G[50G]", - "subport": "1", "autoneg": "off" }, "Ethernet505": { "default_brkout_mode": "8x100G[50G]", - "subport": "2", "autoneg": "off" }, "Ethernet506": { "default_brkout_mode": "8x100G[50G]", - "subport": "3", "autoneg": "off" }, "Ethernet507": { "default_brkout_mode": "8x100G[50G]", - "subport": "4", "autoneg": "off" }, "Ethernet508": { "default_brkout_mode": "8x100G[50G]", - "subport": "5", "autoneg": "off" }, "Ethernet509": { "default_brkout_mode": "8x100G[50G]", - "subport": "6", "autoneg": "off" }, "Ethernet510": { "default_brkout_mode": "8x100G[50G]", - "subport": "7", "autoneg": "off" }, "Ethernet511": { "default_brkout_mode": "8x100G[50G]", - "subport": "8", "autoneg": "off" }, "Ethernet512": { diff --git a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C448O16/sai.profile b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C448O16/sai.profile index 48d3deae762..8addd8c2123 100644 --- a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C448O16/sai.profile +++ b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C448O16/sai.profile @@ -2,3 +2,7 @@ SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_5640_448x100g_16x400g.xml SAI_KEY_SPC5_LOSSY_SCHEDULING=1 SAI_INDEPENDENT_MODULE_MODE=1 SAI_KEY_DISABLE_PORT_ALPHA=1 +SAI_DROP_OVER_MAX_KEY_LIST=1,66 +SAI_DROP_OVER_MAX_VALUE_LIST=307200 +SAI_KEY_INGRESS_PG_XOFF_STAT_LOSSY_HR_ENABLED=1 +SAI_KEY_TX_SQUELCH_MODE=2 diff --git a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C448O16/sai_5640_448x100g_16x400g.xml b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C448O16/sai_5640_448x100g_16x400g.xml index a1fcfe94ed3..fe67fcf7c48 100644 --- a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C448O16/sai_5640_448x100g_16x400g.xml +++ b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C448O16/sai_5640_448x100g_16x400g.xml @@ -23,7 +23,7 @@ 00:02:03:04:05:00 - 0 + 1 66 diff --git a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C508O1X2/buffers.json.j2 b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C508O1X2/buffers.json.j2 new file mode 120000 index 00000000000..add8bf8bb7c --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C508O1X2/buffers.json.j2 @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/buffers.json.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C508O1X2/buffers_defaults_objects.j2 b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C508O1X2/buffers_defaults_objects.j2 new file mode 120000 index 00000000000..e404fb0aae1 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C508O1X2/buffers_defaults_objects.j2 @@ -0,0 +1 @@ +../../x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/buffers_defaults_objects.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C508O1X2/buffers_defaults_t0.j2 b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C508O1X2/buffers_defaults_t0.j2 new file mode 100644 index 00000000000..23d66c91858 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C508O1X2/buffers_defaults_t0.j2 @@ -0,0 +1,54 @@ +{# + SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES + Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + Apache-2.0 + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +#} +{% set default_cable = '0m' %} +{%-set ports2cable = { + 'torrouter_server' : '0m', + 'leafrouter_torrouter' : '0m', + 'spinerouter_leafrouter' : '0m' + } +-%} +{% set ingress_lossless_pool_size = '95112192' %} +{% set ingress_lossless_pool_xoff = '0' %} +{% set egress_lossless_pool_size = '136209408' %} +{% set egress_lossy_pool_size = '95112192' %} + +{% import 'buffers_defaults_objects.j2' as defs with context %} + +{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %} +{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_queue_buffers_with_extra_lossless_queues_with_inactive_ports(port_names_active, port_names_extra_queues, port_names_inactive) %} +{{ defs.generate_queue_buffers_with_extra_lossless_queues(port_names_active, port_names_extra_queues, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_pg_profiles_with_extra_lossless_pgs_with_inactive_ports(port_names_active, port_names_extra_pgs, port_names_inactive) %} +{{ defs.generate_pg_profiles_with_extra_lossless_pgs(port_names_active, port_names_extra_pgs, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }} +{%- endmacro %} diff --git a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C508O1X2/buffers_defaults_t1.j2 b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C508O1X2/buffers_defaults_t1.j2 new file mode 100644 index 00000000000..23d66c91858 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C508O1X2/buffers_defaults_t1.j2 @@ -0,0 +1,54 @@ +{# + SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES + Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + Apache-2.0 + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +#} +{% set default_cable = '0m' %} +{%-set ports2cable = { + 'torrouter_server' : '0m', + 'leafrouter_torrouter' : '0m', + 'spinerouter_leafrouter' : '0m' + } +-%} +{% set ingress_lossless_pool_size = '95112192' %} +{% set ingress_lossless_pool_xoff = '0' %} +{% set egress_lossless_pool_size = '136209408' %} +{% set egress_lossy_pool_size = '95112192' %} + +{% import 'buffers_defaults_objects.j2' as defs with context %} + +{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %} +{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_queue_buffers_with_extra_lossless_queues_with_inactive_ports(port_names_active, port_names_extra_queues, port_names_inactive) %} +{{ defs.generate_queue_buffers_with_extra_lossless_queues(port_names_active, port_names_extra_queues, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_pg_profiles_with_extra_lossless_pgs_with_inactive_ports(port_names_active, port_names_extra_pgs, port_names_inactive) %} +{{ defs.generate_pg_profiles_with_extra_lossless_pgs(port_names_active, port_names_extra_pgs, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }} +{%- endmacro %} diff --git a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C508O1X2/buffers_dynamic.json.j2 b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C508O1X2/buffers_dynamic.json.j2 new file mode 120000 index 00000000000..8c4117c6621 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C508O1X2/buffers_dynamic.json.j2 @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/buffers_dynamic.json.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C508O1X2/create_only_config_db_buffers.json b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C508O1X2/create_only_config_db_buffers.json new file mode 120000 index 00000000000..8d697471a09 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C508O1X2/create_only_config_db_buffers.json @@ -0,0 +1 @@ +../Mellanox-SN5640-C512S2/create_only_config_db_buffers.json \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C508O1X2/hwsku.json b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C508O1X2/hwsku.json new file mode 100644 index 00000000000..8be96916c08 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C508O1X2/hwsku.json @@ -0,0 +1,2046 @@ +{ + "interfaces": { + "Ethernet0": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet1": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet2": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet3": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet4": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet5": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet6": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet7": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet8": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet9": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet10": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet11": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet12": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet13": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet14": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet15": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet16": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet17": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet18": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet19": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet20": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet21": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet22": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet23": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet24": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet25": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet26": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet27": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet28": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet29": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet30": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet31": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet32": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet33": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet34": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet35": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet36": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet37": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet38": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet39": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet40": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet41": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet42": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet43": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet44": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet45": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet46": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet47": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet48": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet49": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet50": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet51": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + 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"default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet413": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet414": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet415": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet416": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet417": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet418": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet419": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet420": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet421": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet422": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet423": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet424": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet425": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet426": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet427": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet428": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet429": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet430": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet431": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet432": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet433": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet434": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet435": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet436": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet437": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet438": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet439": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet440": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet441": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet442": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet443": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet444": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet445": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet446": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet447": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet448": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet449": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet450": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet451": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet452": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet453": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet454": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet455": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet456": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet457": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet458": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet459": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet460": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet461": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet462": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet463": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet464": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet465": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet466": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet467": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet468": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet469": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet470": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet471": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet472": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet473": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet474": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet475": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet476": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet477": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet478": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet479": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet480": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet481": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet482": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet483": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet484": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet485": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet486": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet487": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet488": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet489": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet490": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet491": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet492": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet493": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet494": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet495": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet496": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet497": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet498": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet499": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet500": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet501": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet502": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet503": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet504": { + "default_brkout_mode": "4x100G(4)+1x400G(4)", + "autoneg": "off" + }, + "Ethernet505": { + "default_brkout_mode": "4x100G(4)+1x400G(4)", + "autoneg": "off" + }, + "Ethernet506": { + "default_brkout_mode": "4x100G(4)+1x400G(4)", + "autoneg": "off" + }, + "Ethernet507": { + "default_brkout_mode": "4x100G(4)+1x400G(4)", + "autoneg": "off" + }, + "Ethernet508": { + "default_brkout_mode": "4x100G(4)+1x400G(4)", + "autoneg": "off" + }, + "Ethernet512": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet520": { + "default_brkout_mode": "1x25G[10G]" + } + } +} diff --git a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C508O1X2/pg_profile_lookup.ini b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C508O1X2/pg_profile_lookup.ini new file mode 120000 index 00000000000..e45bddfeec7 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C508O1X2/pg_profile_lookup.ini @@ -0,0 +1 @@ +../Mellanox-SN5640-C512X2/pg_profile_lookup.ini \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C508O1X2/pmon_daemon_control.json b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C508O1X2/pmon_daemon_control.json new file mode 100644 index 00000000000..90465cdfa87 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C508O1X2/pmon_daemon_control.json @@ -0,0 +1,8 @@ +{ + "skip_ledd": true, + "skip_fancontrol": true, + "skip_xcvrd_cmis_mgr": true, + "xcvrd": { + "dom_temperature_poll_interval": 20 + } +} diff --git a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C508O1X2/port_config.ini b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C508O1X2/port_config.ini new file mode 100644 index 00000000000..b3f724f6993 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C508O1X2/port_config.ini @@ -0,0 +1,530 @@ +## +## SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +## Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +## Apache-2.0 +## +## Licensed under the Apache License, Version 2.0 (the "License"); +## you may not use this file except in compliance with the License. +## You may obtain a copy of the License at +## +## http://www.apache.org/licenses/LICENSE-2.0 +## +## Unless required by applicable law or agreed to in writing, software +## distributed under the License is distributed on an "AS IS" BASIS, +## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +## See the License for the specific language governing permissions and +## limitations under the License. +## + +# name lanes alias index speed +Ethernet0 0 etp1a 1 100000 +Ethernet1 1 etp1b 1 100000 +Ethernet2 2 etp1c 1 100000 +Ethernet3 3 etp1d 1 100000 +Ethernet4 4 etp1e 1 100000 +Ethernet5 5 etp1f 1 100000 +Ethernet6 6 etp1g 1 100000 +Ethernet7 7 etp1h 1 100000 +Ethernet8 8 etp2a 2 100000 +Ethernet9 9 etp2b 2 100000 +Ethernet10 10 etp2c 2 100000 +Ethernet11 11 etp2d 2 100000 +Ethernet12 12 etp2e 2 100000 +Ethernet13 13 etp2f 2 100000 +Ethernet14 14 etp2g 2 100000 +Ethernet15 15 etp2h 2 100000 +Ethernet16 16 etp3a 3 100000 +Ethernet17 17 etp3b 3 100000 +Ethernet18 18 etp3c 3 100000 +Ethernet19 19 etp3d 3 100000 +Ethernet20 20 etp3e 3 100000 +Ethernet21 21 etp3f 3 100000 +Ethernet22 22 etp3g 3 100000 +Ethernet23 23 etp3h 3 100000 +Ethernet24 24 etp4a 4 100000 +Ethernet25 25 etp4b 4 100000 +Ethernet26 26 etp4c 4 100000 +Ethernet27 27 etp4d 4 100000 +Ethernet28 28 etp4e 4 100000 +Ethernet29 29 etp4f 4 100000 +Ethernet30 30 etp4g 4 100000 +Ethernet31 31 etp4h 4 100000 +Ethernet32 32 etp5a 5 100000 +Ethernet33 33 etp5b 5 100000 +Ethernet34 34 etp5c 5 100000 +Ethernet35 35 etp5d 5 100000 +Ethernet36 36 etp5e 5 100000 +Ethernet37 37 etp5f 5 100000 +Ethernet38 38 etp5g 5 100000 +Ethernet39 39 etp5h 5 100000 +Ethernet40 40 etp6a 6 100000 +Ethernet41 41 etp6b 6 100000 +Ethernet42 42 etp6c 6 100000 +Ethernet43 43 etp6d 6 100000 +Ethernet44 44 etp6e 6 100000 +Ethernet45 45 etp6f 6 100000 +Ethernet46 46 etp6g 6 100000 +Ethernet47 47 etp6h 6 100000 +Ethernet48 48 etp7a 7 100000 +Ethernet49 49 etp7b 7 100000 +Ethernet50 50 etp7c 7 100000 +Ethernet51 51 etp7d 7 100000 +Ethernet52 52 etp7e 7 100000 +Ethernet53 53 etp7f 7 100000 +Ethernet54 54 etp7g 7 100000 +Ethernet55 55 etp7h 7 100000 +Ethernet56 56 etp8a 8 100000 +Ethernet57 57 etp8b 8 100000 +Ethernet58 58 etp8c 8 100000 +Ethernet59 59 etp8d 8 100000 +Ethernet60 60 etp8e 8 100000 +Ethernet61 61 etp8f 8 100000 +Ethernet62 62 etp8g 8 100000 +Ethernet63 63 etp8h 8 100000 +Ethernet64 64 etp9a 9 100000 +Ethernet65 65 etp9b 9 100000 +Ethernet66 66 etp9c 9 100000 +Ethernet67 67 etp9d 9 100000 +Ethernet68 68 etp9e 9 100000 +Ethernet69 69 etp9f 9 100000 +Ethernet70 70 etp9g 9 100000 +Ethernet71 71 etp9h 9 100000 +Ethernet72 72 etp10a 10 100000 +Ethernet73 73 etp10b 10 100000 +Ethernet74 74 etp10c 10 100000 +Ethernet75 75 etp10d 10 100000 +Ethernet76 76 etp10e 10 100000 +Ethernet77 77 etp10f 10 100000 +Ethernet78 78 etp10g 10 100000 +Ethernet79 79 etp10h 10 100000 +Ethernet80 80 etp11a 11 100000 +Ethernet81 81 etp11b 11 100000 +Ethernet82 82 etp11c 11 100000 +Ethernet83 83 etp11d 11 100000 +Ethernet84 84 etp11e 11 100000 +Ethernet85 85 etp11f 11 100000 +Ethernet86 86 etp11g 11 100000 +Ethernet87 87 etp11h 11 100000 +Ethernet88 88 etp12a 12 100000 +Ethernet89 89 etp12b 12 100000 +Ethernet90 90 etp12c 12 100000 +Ethernet91 91 etp12d 12 100000 +Ethernet92 92 etp12e 12 100000 +Ethernet93 93 etp12f 12 100000 +Ethernet94 94 etp12g 12 100000 +Ethernet95 95 etp12h 12 100000 +Ethernet96 96 etp13a 13 100000 +Ethernet97 97 etp13b 13 100000 +Ethernet98 98 etp13c 13 100000 +Ethernet99 99 etp13d 13 100000 +Ethernet100 100 etp13e 13 100000 +Ethernet101 101 etp13f 13 100000 +Ethernet102 102 etp13g 13 100000 +Ethernet103 103 etp13h 13 100000 +Ethernet104 104 etp14a 14 100000 +Ethernet105 105 etp14b 14 100000 +Ethernet106 106 etp14c 14 100000 +Ethernet107 107 etp14d 14 100000 +Ethernet108 108 etp14e 14 100000 +Ethernet109 109 etp14f 14 100000 +Ethernet110 110 etp14g 14 100000 +Ethernet111 111 etp14h 14 100000 +Ethernet112 112 etp15a 15 100000 +Ethernet113 113 etp15b 15 100000 +Ethernet114 114 etp15c 15 100000 +Ethernet115 115 etp15d 15 100000 +Ethernet116 116 etp15e 15 100000 +Ethernet117 117 etp15f 15 100000 +Ethernet118 118 etp15g 15 100000 +Ethernet119 119 etp15h 15 100000 +Ethernet120 120 etp16a 16 100000 +Ethernet121 121 etp16b 16 100000 +Ethernet122 122 etp16c 16 100000 +Ethernet123 123 etp16d 16 100000 +Ethernet124 124 etp16e 16 100000 +Ethernet125 125 etp16f 16 100000 +Ethernet126 126 etp16g 16 100000 +Ethernet127 127 etp16h 16 100000 +Ethernet128 128 etp17a 17 100000 +Ethernet129 129 etp17b 17 100000 +Ethernet130 130 etp17c 17 100000 +Ethernet131 131 etp17d 17 100000 +Ethernet132 132 etp17e 17 100000 +Ethernet133 133 etp17f 17 100000 +Ethernet134 134 etp17g 17 100000 +Ethernet135 135 etp17h 17 100000 +Ethernet136 136 etp18a 18 100000 +Ethernet137 137 etp18b 18 100000 +Ethernet138 138 etp18c 18 100000 +Ethernet139 139 etp18d 18 100000 +Ethernet140 140 etp18e 18 100000 +Ethernet141 141 etp18f 18 100000 +Ethernet142 142 etp18g 18 100000 +Ethernet143 143 etp18h 18 100000 +Ethernet144 144 etp19a 19 100000 +Ethernet145 145 etp19b 19 100000 +Ethernet146 146 etp19c 19 100000 +Ethernet147 147 etp19d 19 100000 +Ethernet148 148 etp19e 19 100000 +Ethernet149 149 etp19f 19 100000 +Ethernet150 150 etp19g 19 100000 +Ethernet151 151 etp19h 19 100000 +Ethernet152 152 etp20a 20 100000 +Ethernet153 153 etp20b 20 100000 +Ethernet154 154 etp20c 20 100000 +Ethernet155 155 etp20d 20 100000 +Ethernet156 156 etp20e 20 100000 +Ethernet157 157 etp20f 20 100000 +Ethernet158 158 etp20g 20 100000 +Ethernet159 159 etp20h 20 100000 +Ethernet160 160 etp21a 21 100000 +Ethernet161 161 etp21b 21 100000 +Ethernet162 162 etp21c 21 100000 +Ethernet163 163 etp21d 21 100000 +Ethernet164 164 etp21e 21 100000 +Ethernet165 165 etp21f 21 100000 +Ethernet166 166 etp21g 21 100000 +Ethernet167 167 etp21h 21 100000 +Ethernet168 168 etp22a 22 100000 +Ethernet169 169 etp22b 22 100000 +Ethernet170 170 etp22c 22 100000 +Ethernet171 171 etp22d 22 100000 +Ethernet172 172 etp22e 22 100000 +Ethernet173 173 etp22f 22 100000 +Ethernet174 174 etp22g 22 100000 +Ethernet175 175 etp22h 22 100000 +Ethernet176 176 etp23a 23 100000 +Ethernet177 177 etp23b 23 100000 +Ethernet178 178 etp23c 23 100000 +Ethernet179 179 etp23d 23 100000 +Ethernet180 180 etp23e 23 100000 +Ethernet181 181 etp23f 23 100000 +Ethernet182 182 etp23g 23 100000 +Ethernet183 183 etp23h 23 100000 +Ethernet184 184 etp24a 24 100000 +Ethernet185 185 etp24b 24 100000 +Ethernet186 186 etp24c 24 100000 +Ethernet187 187 etp24d 24 100000 +Ethernet188 188 etp24e 24 100000 +Ethernet189 189 etp24f 24 100000 +Ethernet190 190 etp24g 24 100000 +Ethernet191 191 etp24h 24 100000 +Ethernet192 192 etp25a 25 100000 +Ethernet193 193 etp25b 25 100000 +Ethernet194 194 etp25c 25 100000 +Ethernet195 195 etp25d 25 100000 +Ethernet196 196 etp25e 25 100000 +Ethernet197 197 etp25f 25 100000 +Ethernet198 198 etp25g 25 100000 +Ethernet199 199 etp25h 25 100000 +Ethernet200 200 etp26a 26 100000 +Ethernet201 201 etp26b 26 100000 +Ethernet202 202 etp26c 26 100000 +Ethernet203 203 etp26d 26 100000 +Ethernet204 204 etp26e 26 100000 +Ethernet205 205 etp26f 26 100000 +Ethernet206 206 etp26g 26 100000 +Ethernet207 207 etp26h 26 100000 +Ethernet208 208 etp27a 27 100000 +Ethernet209 209 etp27b 27 100000 +Ethernet210 210 etp27c 27 100000 +Ethernet211 211 etp27d 27 100000 +Ethernet212 212 etp27e 27 100000 +Ethernet213 213 etp27f 27 100000 +Ethernet214 214 etp27g 27 100000 +Ethernet215 215 etp27h 27 100000 +Ethernet216 216 etp28a 28 100000 +Ethernet217 217 etp28b 28 100000 +Ethernet218 218 etp28c 28 100000 +Ethernet219 219 etp28d 28 100000 +Ethernet220 220 etp28e 28 100000 +Ethernet221 221 etp28f 28 100000 +Ethernet222 222 etp28g 28 100000 +Ethernet223 223 etp28h 28 100000 +Ethernet224 224 etp29a 29 100000 +Ethernet225 225 etp29b 29 100000 +Ethernet226 226 etp29c 29 100000 +Ethernet227 227 etp29d 29 100000 +Ethernet228 228 etp29e 29 100000 +Ethernet229 229 etp29f 29 100000 +Ethernet230 230 etp29g 29 100000 +Ethernet231 231 etp29h 29 100000 +Ethernet232 232 etp30a 30 100000 +Ethernet233 233 etp30b 30 100000 +Ethernet234 234 etp30c 30 100000 +Ethernet235 235 etp30d 30 100000 +Ethernet236 236 etp30e 30 100000 +Ethernet237 237 etp30f 30 100000 +Ethernet238 238 etp30g 30 100000 +Ethernet239 239 etp30h 30 100000 +Ethernet240 240 etp31a 31 100000 +Ethernet241 241 etp31b 31 100000 +Ethernet242 242 etp31c 31 100000 +Ethernet243 243 etp31d 31 100000 +Ethernet244 244 etp31e 31 100000 +Ethernet245 245 etp31f 31 100000 +Ethernet246 246 etp31g 31 100000 +Ethernet247 247 etp31h 31 100000 +Ethernet248 248 etp32a 32 100000 +Ethernet249 249 etp32b 32 100000 +Ethernet250 250 etp32c 32 100000 +Ethernet251 251 etp32d 32 100000 +Ethernet252 252 etp32e 32 100000 +Ethernet253 253 etp32f 32 100000 +Ethernet254 254 etp32g 32 100000 +Ethernet255 255 etp32h 32 100000 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285 etp36f 36 100000 +Ethernet286 286 etp36g 36 100000 +Ethernet287 287 etp36h 36 100000 +Ethernet288 288 etp37a 37 100000 +Ethernet289 289 etp37b 37 100000 +Ethernet290 290 etp37c 37 100000 +Ethernet291 291 etp37d 37 100000 +Ethernet292 292 etp37e 37 100000 +Ethernet293 293 etp37f 37 100000 +Ethernet294 294 etp37g 37 100000 +Ethernet295 295 etp37h 37 100000 +Ethernet296 296 etp38a 38 100000 +Ethernet297 297 etp38b 38 100000 +Ethernet298 298 etp38c 38 100000 +Ethernet299 299 etp38d 38 100000 +Ethernet300 300 etp38e 38 100000 +Ethernet301 301 etp38f 38 100000 +Ethernet302 302 etp38g 38 100000 +Ethernet303 303 etp38h 38 100000 +Ethernet304 304 etp39a 39 100000 +Ethernet305 305 etp39b 39 100000 +Ethernet306 306 etp39c 39 100000 +Ethernet307 307 etp39d 39 100000 +Ethernet308 308 etp39e 39 100000 +Ethernet309 309 etp39f 39 100000 +Ethernet310 310 etp39g 39 100000 +Ethernet311 311 etp39h 39 100000 +Ethernet312 312 etp40a 40 100000 +Ethernet313 313 etp40b 40 100000 +Ethernet314 314 etp40c 40 100000 +Ethernet315 315 etp40d 40 100000 +Ethernet316 316 etp40e 40 100000 +Ethernet317 317 etp40f 40 100000 +Ethernet318 318 etp40g 40 100000 +Ethernet319 319 etp40h 40 100000 +Ethernet320 320 etp41a 41 100000 +Ethernet321 321 etp41b 41 100000 +Ethernet322 322 etp41c 41 100000 +Ethernet323 323 etp41d 41 100000 +Ethernet324 324 etp41e 41 100000 +Ethernet325 325 etp41f 41 100000 +Ethernet326 326 etp41g 41 100000 +Ethernet327 327 etp41h 41 100000 +Ethernet328 328 etp42a 42 100000 +Ethernet329 329 etp42b 42 100000 +Ethernet330 330 etp42c 42 100000 +Ethernet331 331 etp42d 42 100000 +Ethernet332 332 etp42e 42 100000 +Ethernet333 333 etp42f 42 100000 +Ethernet334 334 etp42g 42 100000 +Ethernet335 335 etp42h 42 100000 +Ethernet336 336 etp43a 43 100000 +Ethernet337 337 etp43b 43 100000 +Ethernet338 338 etp43c 43 100000 +Ethernet339 339 etp43d 43 100000 +Ethernet340 340 etp43e 43 100000 +Ethernet341 341 etp43f 43 100000 +Ethernet342 342 etp43g 43 100000 +Ethernet343 343 etp43h 43 100000 +Ethernet344 344 etp44a 44 100000 +Ethernet345 345 etp44b 44 100000 +Ethernet346 346 etp44c 44 100000 +Ethernet347 347 etp44d 44 100000 +Ethernet348 348 etp44e 44 100000 +Ethernet349 349 etp44f 44 100000 +Ethernet350 350 etp44g 44 100000 +Ethernet351 351 etp44h 44 100000 +Ethernet352 352 etp45a 45 100000 +Ethernet353 353 etp45b 45 100000 +Ethernet354 354 etp45c 45 100000 +Ethernet355 355 etp45d 45 100000 +Ethernet356 356 etp45e 45 100000 +Ethernet357 357 etp45f 45 100000 +Ethernet358 358 etp45g 45 100000 +Ethernet359 359 etp45h 45 100000 +Ethernet360 360 etp46a 46 100000 +Ethernet361 361 etp46b 46 100000 +Ethernet362 362 etp46c 46 100000 +Ethernet363 363 etp46d 46 100000 +Ethernet364 364 etp46e 46 100000 +Ethernet365 365 etp46f 46 100000 +Ethernet366 366 etp46g 46 100000 +Ethernet367 367 etp46h 46 100000 +Ethernet368 368 etp47a 47 100000 +Ethernet369 369 etp47b 47 100000 +Ethernet370 370 etp47c 47 100000 +Ethernet371 371 etp47d 47 100000 +Ethernet372 372 etp47e 47 100000 +Ethernet373 373 etp47f 47 100000 +Ethernet374 374 etp47g 47 100000 +Ethernet375 375 etp47h 47 100000 +Ethernet376 376 etp48a 48 100000 +Ethernet377 377 etp48b 48 100000 +Ethernet378 378 etp48c 48 100000 +Ethernet379 379 etp48d 48 100000 +Ethernet380 380 etp48e 48 100000 +Ethernet381 381 etp48f 48 100000 +Ethernet382 382 etp48g 48 100000 +Ethernet383 383 etp48h 48 100000 +Ethernet384 384 etp49a 49 100000 +Ethernet385 385 etp49b 49 100000 +Ethernet386 386 etp49c 49 100000 +Ethernet387 387 etp49d 49 100000 +Ethernet388 388 etp49e 49 100000 +Ethernet389 389 etp49f 49 100000 +Ethernet390 390 etp49g 49 100000 +Ethernet391 391 etp49h 49 100000 +Ethernet392 392 etp50a 50 100000 +Ethernet393 393 etp50b 50 100000 +Ethernet394 394 etp50c 50 100000 +Ethernet395 395 etp50d 50 100000 +Ethernet396 396 etp50e 50 100000 +Ethernet397 397 etp50f 50 100000 +Ethernet398 398 etp50g 50 100000 +Ethernet399 399 etp50h 50 100000 +Ethernet400 400 etp51a 51 100000 +Ethernet401 401 etp51b 51 100000 +Ethernet402 402 etp51c 51 100000 +Ethernet403 403 etp51d 51 100000 +Ethernet404 404 etp51e 51 100000 +Ethernet405 405 etp51f 51 100000 +Ethernet406 406 etp51g 51 100000 +Ethernet407 407 etp51h 51 100000 +Ethernet408 408 etp52a 52 100000 +Ethernet409 409 etp52b 52 100000 +Ethernet410 410 etp52c 52 100000 +Ethernet411 411 etp52d 52 100000 +Ethernet412 412 etp52e 52 100000 +Ethernet413 413 etp52f 52 100000 +Ethernet414 414 etp52g 52 100000 +Ethernet415 415 etp52h 52 100000 +Ethernet416 416 etp53a 53 100000 +Ethernet417 417 etp53b 53 100000 +Ethernet418 418 etp53c 53 100000 +Ethernet419 419 etp53d 53 100000 +Ethernet420 420 etp53e 53 100000 +Ethernet421 421 etp53f 53 100000 +Ethernet422 422 etp53g 53 100000 +Ethernet423 423 etp53h 53 100000 +Ethernet424 424 etp54a 54 100000 +Ethernet425 425 etp54b 54 100000 +Ethernet426 426 etp54c 54 100000 +Ethernet427 427 etp54d 54 100000 +Ethernet428 428 etp54e 54 100000 +Ethernet429 429 etp54f 54 100000 +Ethernet430 430 etp54g 54 100000 +Ethernet431 431 etp54h 54 100000 +Ethernet432 432 etp55a 55 100000 +Ethernet433 433 etp55b 55 100000 +Ethernet434 434 etp55c 55 100000 +Ethernet435 435 etp55d 55 100000 +Ethernet436 436 etp55e 55 100000 +Ethernet437 437 etp55f 55 100000 +Ethernet438 438 etp55g 55 100000 +Ethernet439 439 etp55h 55 100000 +Ethernet440 440 etp56a 56 100000 +Ethernet441 441 etp56b 56 100000 +Ethernet442 442 etp56c 56 100000 +Ethernet443 443 etp56d 56 100000 +Ethernet444 444 etp56e 56 100000 +Ethernet445 445 etp56f 56 100000 +Ethernet446 446 etp56g 56 100000 +Ethernet447 447 etp56h 56 100000 +Ethernet448 448 etp57a 57 100000 +Ethernet449 449 etp57b 57 100000 +Ethernet450 450 etp57c 57 100000 +Ethernet451 451 etp57d 57 100000 +Ethernet452 452 etp57e 57 100000 +Ethernet453 453 etp57f 57 100000 +Ethernet454 454 etp57g 57 100000 +Ethernet455 455 etp57h 57 100000 +Ethernet456 456 etp58a 58 100000 +Ethernet457 457 etp58b 58 100000 +Ethernet458 458 etp58c 58 100000 +Ethernet459 459 etp58d 58 100000 +Ethernet460 460 etp58e 58 100000 +Ethernet461 461 etp58f 58 100000 +Ethernet462 462 etp58g 58 100000 +Ethernet463 463 etp58h 58 100000 +Ethernet464 464 etp59a 59 100000 +Ethernet465 465 etp59b 59 100000 +Ethernet466 466 etp59c 59 100000 +Ethernet467 467 etp59d 59 100000 +Ethernet468 468 etp59e 59 100000 +Ethernet469 469 etp59f 59 100000 +Ethernet470 470 etp59g 59 100000 +Ethernet471 471 etp59h 59 100000 +Ethernet472 472 etp60a 60 100000 +Ethernet473 473 etp60b 60 100000 +Ethernet474 474 etp60c 60 100000 +Ethernet475 475 etp60d 60 100000 +Ethernet476 476 etp60e 60 100000 +Ethernet477 477 etp60f 60 100000 +Ethernet478 478 etp60g 60 100000 +Ethernet479 479 etp60h 60 100000 +Ethernet480 480 etp61a 61 100000 +Ethernet481 481 etp61b 61 100000 +Ethernet482 482 etp61c 61 100000 +Ethernet483 483 etp61d 61 100000 +Ethernet484 484 etp61e 61 100000 +Ethernet485 485 etp61f 61 100000 +Ethernet486 486 etp61g 61 100000 +Ethernet487 487 etp61h 61 100000 +Ethernet488 488 etp62a 62 100000 +Ethernet489 489 etp62b 62 100000 +Ethernet490 490 etp62c 62 100000 +Ethernet491 491 etp62d 62 100000 +Ethernet492 492 etp62e 62 100000 +Ethernet493 493 etp62f 62 100000 +Ethernet494 494 etp62g 62 100000 +Ethernet495 495 etp62h 62 100000 +Ethernet496 496 etp63a 63 100000 +Ethernet497 497 etp63b 63 100000 +Ethernet498 498 etp63c 63 100000 +Ethernet499 499 etp63d 63 100000 +Ethernet500 500 etp63e 63 100000 +Ethernet501 501 etp63f 63 100000 +Ethernet502 502 etp63g 63 100000 +Ethernet503 503 etp63h 63 100000 +Ethernet504 504 etp64a 64 100000 +Ethernet505 505 etp64b 64 100000 +Ethernet506 506 etp64c 64 100000 +Ethernet507 507 etp64d 64 100000 +Ethernet508 508,509,510,511 etp64e 64 400000 +Ethernet512 512 etp65 65 25000 +Ethernet520 520 etp66 66 25000 diff --git a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C508O1X2/qos.json.j2 b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C508O1X2/qos.json.j2 new file mode 120000 index 00000000000..462ffcd7e1f --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C508O1X2/qos.json.j2 @@ -0,0 +1 @@ +../../x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/qos.json.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C508O1X2/sai.profile b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C508O1X2/sai.profile new file mode 100644 index 00000000000..db10a4951b6 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C508O1X2/sai.profile @@ -0,0 +1,7 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_5640_512x100g.xml +SAI_KEY_SPC5_LOSSY_SCHEDULING=1 +SAI_KEY_DISABLE_PORT_ALPHA=1 +SAI_DROP_OVER_MAX_KEY_LIST=1,66 +SAI_DROP_OVER_MAX_VALUE_LIST=307200 +SAI_KEY_INGRESS_PG_XOFF_STAT_LOSSY_HR_ENABLED=1 +SAI_KEY_TX_SQUELCH_MODE=2 diff --git a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C508O1X2/sai_5640_512x100g.xml b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C508O1X2/sai_5640_512x100g.xml new file mode 120000 index 00000000000..5719736f4ac --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C508O1X2/sai_5640_512x100g.xml @@ -0,0 +1 @@ +../Mellanox-SN5640-C512S2/sai_5640_512x100g.xml \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C508O1X2/traffic_config.j2 b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C508O1X2/traffic_config.j2 new file mode 120000 index 00000000000..6a1603fc279 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C508O1X2/traffic_config.j2 @@ -0,0 +1 @@ +../Mellanox-SN5640-C512S2/traffic_config.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512S2/buffers_defaults_t0.j2 b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512S2/buffers_defaults_t0.j2 index 3488f25dd73..dbb65b34069 100644 --- a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512S2/buffers_defaults_t0.j2 +++ b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512S2/buffers_defaults_t0.j2 @@ -22,10 +22,10 @@ 'spinerouter_leafrouter' : '0m' } -%} -{% set ingress_lossless_pool_size = '105419776' %} +{% set ingress_lossless_pool_size = '103732224' %} {% set ingress_lossless_pool_xoff = '0' %} {% set egress_lossless_pool_size = '136209408' %} -{% set egress_lossy_pool_size = '105419776' %} +{% set egress_lossy_pool_size = '103732224' %} {% import 'buffers_defaults_objects.j2' as defs with context %} diff --git a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512S2/buffers_defaults_t1.j2 b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512S2/buffers_defaults_t1.j2 index 3488f25dd73..dbb65b34069 100644 --- a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512S2/buffers_defaults_t1.j2 +++ b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512S2/buffers_defaults_t1.j2 @@ -22,10 +22,10 @@ 'spinerouter_leafrouter' : '0m' } -%} -{% set ingress_lossless_pool_size = '105419776' %} +{% set ingress_lossless_pool_size = '103732224' %} {% set ingress_lossless_pool_xoff = '0' %} {% set egress_lossless_pool_size = '136209408' %} -{% set egress_lossy_pool_size = '105419776' %} +{% set egress_lossy_pool_size = '103732224' %} {% import 'buffers_defaults_objects.j2' as defs with context %} diff --git a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512S2/hwsku.json b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512S2/hwsku.json index 31c3d7a60e1..62100ac898b 100644 --- a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512S2/hwsku.json +++ b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512S2/hwsku.json @@ -2,2562 +2,2050 @@ "interfaces": { "Ethernet0": { "default_brkout_mode": "8x100G[50G]", - "subport": "1", "autoneg": "off" }, "Ethernet1": { "default_brkout_mode": "8x100G[50G]", - "subport": "2", "autoneg": "off" }, "Ethernet2": { "default_brkout_mode": "8x100G[50G]", - "subport": "3", "autoneg": "off" }, "Ethernet3": { "default_brkout_mode": "8x100G[50G]", - "subport": "4", "autoneg": "off" }, "Ethernet4": { "default_brkout_mode": "8x100G[50G]", - "subport": "5", "autoneg": "off" }, "Ethernet5": { "default_brkout_mode": "8x100G[50G]", - "subport": "6", "autoneg": "off" }, "Ethernet6": { "default_brkout_mode": "8x100G[50G]", - "subport": "7", "autoneg": "off" }, "Ethernet7": { "default_brkout_mode": "8x100G[50G]", - "subport": "8", "autoneg": "off" }, "Ethernet8": { "default_brkout_mode": "8x100G[50G]", - "subport": "1", "autoneg": "off" }, "Ethernet9": { "default_brkout_mode": "8x100G[50G]", - "subport": "2", "autoneg": "off" }, "Ethernet10": { "default_brkout_mode": "8x100G[50G]", - "subport": "3", "autoneg": "off" }, "Ethernet11": { "default_brkout_mode": "8x100G[50G]", - "subport": "4", "autoneg": "off" }, "Ethernet12": { "default_brkout_mode": "8x100G[50G]", - "subport": "5", "autoneg": "off" }, "Ethernet13": { "default_brkout_mode": "8x100G[50G]", - "subport": "6", "autoneg": "off" }, "Ethernet14": { "default_brkout_mode": "8x100G[50G]", - "subport": "7", "autoneg": "off" }, "Ethernet15": { "default_brkout_mode": "8x100G[50G]", - "subport": "8", "autoneg": "off" }, "Ethernet16": { "default_brkout_mode": "8x100G[50G]", - "subport": "1", "autoneg": "off" }, "Ethernet17": { "default_brkout_mode": "8x100G[50G]", - "subport": "2", "autoneg": "off" }, "Ethernet18": { "default_brkout_mode": "8x100G[50G]", - "subport": "3", "autoneg": "off" }, "Ethernet19": { "default_brkout_mode": "8x100G[50G]", - "subport": "4", "autoneg": "off" }, "Ethernet20": { "default_brkout_mode": "8x100G[50G]", - "subport": "5", "autoneg": "off" }, "Ethernet21": { "default_brkout_mode": "8x100G[50G]", - "subport": "6", "autoneg": "off" }, "Ethernet22": { "default_brkout_mode": "8x100G[50G]", - "subport": "7", "autoneg": "off" }, "Ethernet23": { "default_brkout_mode": "8x100G[50G]", - "subport": "8", "autoneg": "off" }, "Ethernet24": { "default_brkout_mode": "8x100G[50G]", - "subport": "1", "autoneg": "off" }, "Ethernet25": { "default_brkout_mode": "8x100G[50G]", - "subport": "2", "autoneg": "off" }, "Ethernet26": { "default_brkout_mode": "8x100G[50G]", - "subport": "3", "autoneg": "off" }, "Ethernet27": { "default_brkout_mode": "8x100G[50G]", - "subport": "4", "autoneg": "off" }, "Ethernet28": { "default_brkout_mode": "8x100G[50G]", - "subport": "5", "autoneg": "off" }, "Ethernet29": { "default_brkout_mode": "8x100G[50G]", - "subport": "6", "autoneg": "off" }, "Ethernet30": { "default_brkout_mode": "8x100G[50G]", - "subport": "7", "autoneg": "off" }, "Ethernet31": { "default_brkout_mode": "8x100G[50G]", - "subport": "8", "autoneg": "off" }, "Ethernet32": { "default_brkout_mode": "8x100G[50G]", - "subport": "1", "autoneg": "off" }, "Ethernet33": { "default_brkout_mode": "8x100G[50G]", - "subport": "2", "autoneg": "off" }, "Ethernet34": { "default_brkout_mode": "8x100G[50G]", - "subport": "3", "autoneg": "off" }, "Ethernet35": { "default_brkout_mode": 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"subport": "2", "autoneg": "off" }, "Ethernet378": { "default_brkout_mode": "8x100G[50G]", - "subport": "3", "autoneg": "off" }, "Ethernet379": { "default_brkout_mode": "8x100G[50G]", - "subport": "4", "autoneg": "off" }, "Ethernet380": { "default_brkout_mode": "8x100G[50G]", - "subport": "5", "autoneg": "off" }, "Ethernet381": { "default_brkout_mode": "8x100G[50G]", - "subport": "6", "autoneg": "off" }, "Ethernet382": { "default_brkout_mode": "8x100G[50G]", - "subport": "7", "autoneg": "off" }, "Ethernet383": { "default_brkout_mode": "8x100G[50G]", - "subport": "8", "autoneg": "off" }, "Ethernet384": { "default_brkout_mode": "8x100G[50G]", - "subport": "1", "autoneg": "off" }, "Ethernet385": { "default_brkout_mode": "8x100G[50G]", - "subport": "2", "autoneg": "off" }, "Ethernet386": { "default_brkout_mode": "8x100G[50G]", - "subport": "3", "autoneg": "off" }, "Ethernet387": { "default_brkout_mode": "8x100G[50G]", - "subport": "4", "autoneg": "off" }, "Ethernet388": { "default_brkout_mode": "8x100G[50G]", - "subport": "5", "autoneg": "off" }, "Ethernet389": { "default_brkout_mode": "8x100G[50G]", - "subport": "6", "autoneg": "off" }, "Ethernet390": { "default_brkout_mode": "8x100G[50G]", - "subport": "7", "autoneg": "off" }, "Ethernet391": { "default_brkout_mode": "8x100G[50G]", - "subport": "8", "autoneg": "off" }, "Ethernet392": { "default_brkout_mode": "8x100G[50G]", - "subport": "1", "autoneg": "off" }, "Ethernet393": { "default_brkout_mode": "8x100G[50G]", - "subport": "2", "autoneg": "off" }, "Ethernet394": { "default_brkout_mode": "8x100G[50G]", - "subport": "3", "autoneg": "off" }, "Ethernet395": { "default_brkout_mode": "8x100G[50G]", - "subport": "4", "autoneg": "off" }, "Ethernet396": { "default_brkout_mode": "8x100G[50G]", - "subport": "5", "autoneg": "off" }, "Ethernet397": { "default_brkout_mode": "8x100G[50G]", - "subport": "6", "autoneg": "off" }, "Ethernet398": { "default_brkout_mode": "8x100G[50G]", - "subport": "7", "autoneg": "off" }, "Ethernet399": { "default_brkout_mode": "8x100G[50G]", - "subport": "8", "autoneg": "off" }, "Ethernet400": { "default_brkout_mode": "8x100G[50G]", - "subport": "1", "autoneg": "off" }, "Ethernet401": { "default_brkout_mode": "8x100G[50G]", - "subport": "2", "autoneg": "off" }, "Ethernet402": { "default_brkout_mode": "8x100G[50G]", - "subport": "3", "autoneg": "off" }, "Ethernet403": { "default_brkout_mode": "8x100G[50G]", - "subport": "4", "autoneg": "off" }, "Ethernet404": { "default_brkout_mode": "8x100G[50G]", - "subport": "5", "autoneg": "off" }, "Ethernet405": { "default_brkout_mode": "8x100G[50G]", - "subport": "6", "autoneg": "off" }, "Ethernet406": { "default_brkout_mode": "8x100G[50G]", - "subport": "7", "autoneg": "off" }, "Ethernet407": { "default_brkout_mode": "8x100G[50G]", - "subport": "8", "autoneg": "off" }, "Ethernet408": { "default_brkout_mode": "8x100G[50G]", - "subport": "1", "autoneg": "off" }, "Ethernet409": { "default_brkout_mode": "8x100G[50G]", - "subport": "2", "autoneg": "off" }, "Ethernet410": { "default_brkout_mode": "8x100G[50G]", - "subport": "3", "autoneg": "off" }, "Ethernet411": { "default_brkout_mode": "8x100G[50G]", - "subport": "4", "autoneg": "off" }, "Ethernet412": { "default_brkout_mode": "8x100G[50G]", - "subport": "5", "autoneg": "off" }, "Ethernet413": { "default_brkout_mode": "8x100G[50G]", - "subport": "6", "autoneg": "off" }, "Ethernet414": { "default_brkout_mode": "8x100G[50G]", - "subport": "7", "autoneg": "off" }, "Ethernet415": { "default_brkout_mode": "8x100G[50G]", - "subport": "8", "autoneg": "off" }, "Ethernet416": { "default_brkout_mode": "8x100G[50G]", - "subport": "1", "autoneg": "off" }, "Ethernet417": { "default_brkout_mode": "8x100G[50G]", - "subport": "2", "autoneg": "off" }, "Ethernet418": { "default_brkout_mode": "8x100G[50G]", - "subport": "3", "autoneg": "off" }, "Ethernet419": { "default_brkout_mode": "8x100G[50G]", - "subport": "4", "autoneg": "off" }, "Ethernet420": { "default_brkout_mode": "8x100G[50G]", - "subport": "5", "autoneg": "off" }, "Ethernet421": { "default_brkout_mode": "8x100G[50G]", - "subport": "6", "autoneg": "off" }, "Ethernet422": { "default_brkout_mode": "8x100G[50G]", - "subport": "7", "autoneg": "off" }, "Ethernet423": { "default_brkout_mode": "8x100G[50G]", - "subport": "8", "autoneg": "off" }, "Ethernet424": { "default_brkout_mode": "8x100G[50G]", - "subport": "1", "autoneg": "off" }, "Ethernet425": { "default_brkout_mode": "8x100G[50G]", - "subport": "2", "autoneg": "off" }, "Ethernet426": { "default_brkout_mode": "8x100G[50G]", - "subport": "3", "autoneg": "off" }, "Ethernet427": { "default_brkout_mode": "8x100G[50G]", - "subport": "4", "autoneg": "off" }, "Ethernet428": { "default_brkout_mode": "8x100G[50G]", - "subport": "5", "autoneg": "off" }, "Ethernet429": { "default_brkout_mode": "8x100G[50G]", - "subport": "6", "autoneg": "off" }, "Ethernet430": { "default_brkout_mode": "8x100G[50G]", - "subport": "7", "autoneg": "off" }, "Ethernet431": { "default_brkout_mode": "8x100G[50G]", - "subport": "8", "autoneg": "off" }, "Ethernet432": { "default_brkout_mode": "8x100G[50G]", - "subport": "1", "autoneg": "off" }, "Ethernet433": { "default_brkout_mode": "8x100G[50G]", - "subport": "2", "autoneg": "off" }, "Ethernet434": { "default_brkout_mode": "8x100G[50G]", - "subport": "3", "autoneg": "off" }, "Ethernet435": { "default_brkout_mode": "8x100G[50G]", - "subport": "4", "autoneg": "off" }, "Ethernet436": { "default_brkout_mode": "8x100G[50G]", - "subport": "5", "autoneg": "off" }, "Ethernet437": { "default_brkout_mode": "8x100G[50G]", - "subport": "6", "autoneg": "off" }, "Ethernet438": { "default_brkout_mode": "8x100G[50G]", - "subport": "7", "autoneg": "off" }, "Ethernet439": { "default_brkout_mode": "8x100G[50G]", - "subport": "8", "autoneg": "off" }, "Ethernet440": { "default_brkout_mode": "8x100G[50G]", - "subport": "1", "autoneg": "off" }, "Ethernet441": { "default_brkout_mode": "8x100G[50G]", - "subport": "2", "autoneg": "off" }, "Ethernet442": { "default_brkout_mode": "8x100G[50G]", - "subport": "3", "autoneg": "off" }, "Ethernet443": { "default_brkout_mode": "8x100G[50G]", - "subport": "4", "autoneg": "off" }, "Ethernet444": { "default_brkout_mode": "8x100G[50G]", - "subport": "5", "autoneg": "off" }, "Ethernet445": { "default_brkout_mode": "8x100G[50G]", - "subport": "6", "autoneg": "off" }, "Ethernet446": { "default_brkout_mode": "8x100G[50G]", - "subport": "7", "autoneg": "off" }, "Ethernet447": { "default_brkout_mode": "8x100G[50G]", - "subport": "8", "autoneg": "off" }, "Ethernet448": { "default_brkout_mode": "8x100G[50G]", - "subport": "1", "autoneg": "off" }, "Ethernet449": { "default_brkout_mode": "8x100G[50G]", - "subport": "2", "autoneg": "off" }, "Ethernet450": { "default_brkout_mode": "8x100G[50G]", - "subport": "3", "autoneg": "off" }, "Ethernet451": { "default_brkout_mode": "8x100G[50G]", - "subport": "4", "autoneg": "off" }, "Ethernet452": { "default_brkout_mode": "8x100G[50G]", - "subport": "5", "autoneg": "off" }, "Ethernet453": { "default_brkout_mode": "8x100G[50G]", - "subport": "6", "autoneg": "off" }, "Ethernet454": { "default_brkout_mode": "8x100G[50G]", - "subport": "7", "autoneg": "off" }, "Ethernet455": { "default_brkout_mode": "8x100G[50G]", - "subport": "8", "autoneg": "off" }, "Ethernet456": { "default_brkout_mode": "8x100G[50G]", - "subport": "1", "autoneg": "off" }, "Ethernet457": { "default_brkout_mode": "8x100G[50G]", - "subport": "2", "autoneg": "off" }, "Ethernet458": { "default_brkout_mode": "8x100G[50G]", - "subport": "3", "autoneg": "off" }, "Ethernet459": { "default_brkout_mode": "8x100G[50G]", - "subport": "4", "autoneg": "off" }, "Ethernet460": { "default_brkout_mode": "8x100G[50G]", - "subport": "5", "autoneg": "off" }, "Ethernet461": { "default_brkout_mode": "8x100G[50G]", - "subport": "6", "autoneg": "off" }, "Ethernet462": { "default_brkout_mode": "8x100G[50G]", - "subport": "7", "autoneg": "off" }, "Ethernet463": { "default_brkout_mode": "8x100G[50G]", - "subport": "8", "autoneg": "off" }, "Ethernet464": { "default_brkout_mode": "8x100G[50G]", - "subport": "1", "autoneg": "off" }, "Ethernet465": { "default_brkout_mode": "8x100G[50G]", - "subport": "2", "autoneg": "off" }, "Ethernet466": { "default_brkout_mode": "8x100G[50G]", - "subport": "3", "autoneg": "off" }, "Ethernet467": { "default_brkout_mode": "8x100G[50G]", - "subport": "4", "autoneg": "off" }, "Ethernet468": { "default_brkout_mode": "8x100G[50G]", - "subport": "5", "autoneg": "off" }, "Ethernet469": { "default_brkout_mode": "8x100G[50G]", - "subport": "6", "autoneg": "off" }, "Ethernet470": { "default_brkout_mode": "8x100G[50G]", - "subport": "7", "autoneg": "off" }, "Ethernet471": { "default_brkout_mode": "8x100G[50G]", - "subport": "8", "autoneg": "off" }, "Ethernet472": { "default_brkout_mode": "8x100G[50G]", - "subport": "1", "autoneg": "off" }, "Ethernet473": { "default_brkout_mode": "8x100G[50G]", - "subport": "2", "autoneg": "off" }, "Ethernet474": { "default_brkout_mode": "8x100G[50G]", - "subport": "3", "autoneg": "off" }, "Ethernet475": { "default_brkout_mode": "8x100G[50G]", - "subport": "4", "autoneg": "off" }, "Ethernet476": { "default_brkout_mode": "8x100G[50G]", - "subport": "5", "autoneg": "off" }, "Ethernet477": { "default_brkout_mode": "8x100G[50G]", - "subport": "6", "autoneg": "off" }, "Ethernet478": { "default_brkout_mode": "8x100G[50G]", - "subport": "7", "autoneg": "off" }, "Ethernet479": { "default_brkout_mode": "8x100G[50G]", - "subport": "8", "autoneg": "off" }, "Ethernet480": { "default_brkout_mode": "8x100G[50G]", - "subport": "1", "autoneg": "off" }, "Ethernet481": { "default_brkout_mode": "8x100G[50G]", - "subport": "2", "autoneg": "off" }, "Ethernet482": { "default_brkout_mode": "8x100G[50G]", - "subport": "3", "autoneg": "off" }, "Ethernet483": { "default_brkout_mode": "8x100G[50G]", - "subport": "4", "autoneg": "off" }, "Ethernet484": { "default_brkout_mode": "8x100G[50G]", - "subport": "5", "autoneg": "off" }, "Ethernet485": { "default_brkout_mode": "8x100G[50G]", - "subport": "6", "autoneg": "off" }, "Ethernet486": { "default_brkout_mode": "8x100G[50G]", - "subport": "7", "autoneg": "off" }, "Ethernet487": { "default_brkout_mode": "8x100G[50G]", - "subport": "8", "autoneg": "off" }, "Ethernet488": { "default_brkout_mode": "8x100G[50G]", - "subport": "1", "autoneg": "off" }, "Ethernet489": { "default_brkout_mode": "8x100G[50G]", - "subport": "2", "autoneg": "off" }, "Ethernet490": { "default_brkout_mode": "8x100G[50G]", - "subport": "3", "autoneg": "off" }, "Ethernet491": { "default_brkout_mode": "8x100G[50G]", - "subport": "4", "autoneg": "off" }, "Ethernet492": { "default_brkout_mode": "8x100G[50G]", - "subport": "5", "autoneg": "off" }, "Ethernet493": { "default_brkout_mode": "8x100G[50G]", - "subport": "6", "autoneg": "off" }, "Ethernet494": { "default_brkout_mode": "8x100G[50G]", - "subport": "7", "autoneg": "off" }, "Ethernet495": { "default_brkout_mode": "8x100G[50G]", - "subport": "8", "autoneg": "off" }, "Ethernet496": { "default_brkout_mode": "8x100G[50G]", - "subport": "1", "autoneg": "off" }, "Ethernet497": { "default_brkout_mode": "8x100G[50G]", - "subport": "2", "autoneg": "off" }, "Ethernet498": { "default_brkout_mode": "8x100G[50G]", - "subport": "3", "autoneg": "off" }, "Ethernet499": { "default_brkout_mode": "8x100G[50G]", - "subport": "4", "autoneg": "off" }, "Ethernet500": { "default_brkout_mode": "8x100G[50G]", - "subport": "5", "autoneg": "off" }, "Ethernet501": { "default_brkout_mode": "8x100G[50G]", - "subport": "6", "autoneg": "off" }, "Ethernet502": { "default_brkout_mode": "8x100G[50G]", - "subport": "7", "autoneg": "off" }, "Ethernet503": { "default_brkout_mode": "8x100G[50G]", - "subport": "8", "autoneg": "off" }, "Ethernet504": { "default_brkout_mode": "8x100G[50G]", - "subport": "1", "autoneg": "off" }, "Ethernet505": { "default_brkout_mode": "8x100G[50G]", - "subport": "2", "autoneg": "off" }, "Ethernet506": { "default_brkout_mode": "8x100G[50G]", - "subport": "3", "autoneg": "off" }, "Ethernet507": { "default_brkout_mode": "8x100G[50G]", - "subport": "4", "autoneg": "off" }, "Ethernet508": { "default_brkout_mode": "8x100G[50G]", - "subport": "5", "autoneg": "off" }, "Ethernet509": { "default_brkout_mode": "8x100G[50G]", - "subport": "6", "autoneg": "off" }, "Ethernet510": { "default_brkout_mode": "8x100G[50G]", - "subport": "7", "autoneg": "off" }, "Ethernet511": { "default_brkout_mode": "8x100G[50G]", - "subport": "8", "autoneg": "off" }, "Ethernet512": { diff --git a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512S2/sai.profile b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512S2/sai.profile index df8f73d4c36..1a6c598c16f 100644 --- a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512S2/sai.profile +++ b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512S2/sai.profile @@ -2,3 +2,7 @@ SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_5640_512x100g.xml SAI_KEY_SPC5_LOSSY_SCHEDULING=1 SAI_INDEPENDENT_MODULE_MODE=1 SAI_KEY_DISABLE_PORT_ALPHA=1 +SAI_DROP_OVER_MAX_KEY_LIST=1,66 +SAI_DROP_OVER_MAX_VALUE_LIST=307200 +SAI_KEY_INGRESS_PG_XOFF_STAT_LOSSY_HR_ENABLED=1 +SAI_KEY_TX_SQUELCH_MODE=2 diff --git a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512S2/sai_5640_512x100g.xml b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512S2/sai_5640_512x100g.xml index 79d74aadc8c..7d481cc0aad 100644 --- a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512S2/sai_5640_512x100g.xml +++ b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512S2/sai_5640_512x100g.xml @@ -1,7 +1,7 @@ - 0 + 1 66 diff --git a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512X2/buffers.json.j2 b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512X2/buffers.json.j2 new file mode 120000 index 00000000000..add8bf8bb7c --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512X2/buffers.json.j2 @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/buffers.json.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512X2/buffers_defaults_objects.j2 b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512X2/buffers_defaults_objects.j2 new file mode 120000 index 00000000000..e404fb0aae1 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512X2/buffers_defaults_objects.j2 @@ -0,0 +1 @@ +../../x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/buffers_defaults_objects.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512X2/buffers_defaults_t0.j2 b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512X2/buffers_defaults_t0.j2 new file mode 100644 index 00000000000..d030b08f07e --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512X2/buffers_defaults_t0.j2 @@ -0,0 +1,54 @@ +{# + SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES + Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + Apache-2.0 + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +#} +{% set default_cable = '0m' %} +{%-set ports2cable = { + 'torrouter_server' : '0m', + 'leafrouter_torrouter' : '0m', + 'spinerouter_leafrouter' : '0m' + } +-%} +{% set ingress_lossless_pool_size = '94934016' %} +{% set ingress_lossless_pool_xoff = '0' %} +{% set egress_lossless_pool_size = '136209408' %} +{% set egress_lossy_pool_size = '94934016' %} + +{% import 'buffers_defaults_objects.j2' as defs with context %} + +{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %} +{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_queue_buffers_with_extra_lossless_queues_with_inactive_ports(port_names_active, port_names_extra_queues, port_names_inactive) %} +{{ defs.generate_queue_buffers_with_extra_lossless_queues(port_names_active, port_names_extra_queues, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_pg_profiles_with_extra_lossless_pgs_with_inactive_ports(port_names_active, port_names_extra_pgs, port_names_inactive) %} +{{ defs.generate_pg_profiles_with_extra_lossless_pgs(port_names_active, port_names_extra_pgs, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }} +{%- endmacro %} diff --git a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512X2/buffers_defaults_t1.j2 b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512X2/buffers_defaults_t1.j2 new file mode 100644 index 00000000000..d030b08f07e --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512X2/buffers_defaults_t1.j2 @@ -0,0 +1,54 @@ +{# + SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES + Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + Apache-2.0 + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +#} +{% set default_cable = '0m' %} +{%-set ports2cable = { + 'torrouter_server' : '0m', + 'leafrouter_torrouter' : '0m', + 'spinerouter_leafrouter' : '0m' + } +-%} +{% set ingress_lossless_pool_size = '94934016' %} +{% set ingress_lossless_pool_xoff = '0' %} +{% set egress_lossless_pool_size = '136209408' %} +{% set egress_lossy_pool_size = '94934016' %} + +{% import 'buffers_defaults_objects.j2' as defs with context %} + +{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %} +{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_queue_buffers_with_extra_lossless_queues_with_inactive_ports(port_names_active, port_names_extra_queues, port_names_inactive) %} +{{ defs.generate_queue_buffers_with_extra_lossless_queues(port_names_active, port_names_extra_queues, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_pg_profiles_with_extra_lossless_pgs_with_inactive_ports(port_names_active, port_names_extra_pgs, port_names_inactive) %} +{{ defs.generate_pg_profiles_with_extra_lossless_pgs(port_names_active, port_names_extra_pgs, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }} +{%- endmacro %} diff --git a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512X2/buffers_dynamic.json.j2 b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512X2/buffers_dynamic.json.j2 new file mode 120000 index 00000000000..8c4117c6621 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512X2/buffers_dynamic.json.j2 @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/buffers_dynamic.json.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512X2/create_only_config_db_buffers.json b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512X2/create_only_config_db_buffers.json new file mode 120000 index 00000000000..8d697471a09 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512X2/create_only_config_db_buffers.json @@ -0,0 +1 @@ +../Mellanox-SN5640-C512S2/create_only_config_db_buffers.json \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512X2/hwsku.json b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512X2/hwsku.json new file mode 100644 index 00000000000..be934cc41a1 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512X2/hwsku.json @@ -0,0 +1,2058 @@ +{ + "interfaces": { + "Ethernet0": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet1": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet2": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet3": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet4": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet5": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet6": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet7": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet8": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet9": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet10": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet11": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet12": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet13": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet14": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet15": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet16": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet17": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet18": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet19": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet20": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet21": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet22": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet23": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet24": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet25": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet26": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet27": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet28": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet29": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet30": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet31": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet32": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet33": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet34": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet35": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet36": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet37": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet38": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet39": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet40": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet41": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet42": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet43": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet44": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet45": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet46": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet47": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet48": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet49": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet50": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet51": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet52": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet53": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet54": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet55": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet56": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet57": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet58": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet59": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet60": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet61": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet62": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet63": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet64": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet65": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet66": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet67": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet68": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet69": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet70": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet71": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet72": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet73": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet74": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet75": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet76": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet77": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet78": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet79": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet80": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet81": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet82": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet83": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet84": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet85": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet86": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet87": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet88": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet89": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet90": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet91": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet92": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet93": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet94": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet95": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet96": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet97": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet98": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet99": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet100": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet101": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet102": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet103": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet104": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet105": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet106": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet107": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet108": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet109": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet110": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet111": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet112": { + 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"default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet497": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet498": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet499": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet500": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet501": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet502": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet503": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet504": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet505": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet506": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet507": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet508": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet509": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet510": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet511": { + "default_brkout_mode": "8x100G[50G]", + "autoneg": "off" + }, + "Ethernet512": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet520": { + "default_brkout_mode": "1x25G[10G]" + } + } +} diff --git a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512X2/media_settings.json b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512X2/media_settings.json new file mode 120000 index 00000000000..bb10e748618 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512X2/media_settings.json @@ -0,0 +1 @@ +../../x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/media_settings.json \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512X2/optics_si_settings.json b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512X2/optics_si_settings.json new file mode 120000 index 00000000000..84477b1a15d --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512X2/optics_si_settings.json @@ -0,0 +1 @@ +../../x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/optics_si_settings.json \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512X2/pg_profile_lookup.ini b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512X2/pg_profile_lookup.ini new file mode 100644 index 00000000000..f5cb600552c --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512X2/pg_profile_lookup.ini @@ -0,0 +1,61 @@ +## +## SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +## Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +## Apache-2.0 +## +## Licensed under the Apache License, Version 2.0 (the "License"); +## you may not use this file except in compliance with the License. +## You may obtain a copy of the License at +## +## http://www.apache.org/licenses/LICENSE-2.0 +## +## Unless required by applicable law or agreed to in writing, software +## distributed under the License is distributed on an "AS IS" BASIS, +## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +## See the License for the specific language governing permissions and +## limitations under the License. +## +# PG lossless profiles. +# speed cable size xon xoff threshold +10000 5m 19456 19456 20480 0 +25000 5m 19456 19456 21504 0 +50000 5m 19456 19456 26624 0 +100000 5m 19456 19456 44032 0 +200000 5m 19456 19456 50176 0 +400000 5m 19456 19456 86016 0 +10000 30m 19456 19456 20480 0 +25000 30m 19456 19456 22528 0 +50000 30m 19456 19456 27648 0 +100000 30m 19456 19456 48128 0 +200000 30m 19456 19456 57344 0 +400000 30m 19456 19456 99328 0 +10000 40m 19456 19456 20480 0 +25000 40m 19456 19456 22528 0 +50000 40m 19456 19456 28672 0 +100000 40m 19456 19456 49152 0 +200000 40m 19456 19456 60416 0 +400000 40m 19456 19456 104448 0 +10000 200m 19456 19456 22528 0 +25000 200m 19456 19456 27648 0 +50000 200m 19456 19456 39936 0 +100000 200m 19456 19456 70656 0 +200000 200m 19456 19456 102400 0 +400000 200m 19456 19456 190464 0 +10000 250m 19456 19456 23552 0 +25000 250m 19456 19456 29696 0 +50000 250m 19456 19456 43008 0 +100000 250m 19456 19456 76800 0 +200000 250m 19456 19456 116736 0 +400000 250m 19456 19456 217088 0 +10000 300m 19456 19456 23552 0 +25000 300m 19456 19456 30720 0 +50000 300m 19456 19456 46080 0 +100000 300m 19456 19456 83968 0 +200000 300m 19456 19456 130048 0 +400000 300m 19456 19456 243712 0 +10000 1000m 19456 19456 33792 0 +25000 1000m 19456 19456 54272 0 +50000 1000m 19456 19456 93184 0 +100000 1000m 19456 19456 177152 0 +200000 1000m 19456 19456 317440 0 +400000 1000m 19456 19456 619520 0 diff --git a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512X2/pmon_daemon_control.json b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512X2/pmon_daemon_control.json new file mode 120000 index 00000000000..e31c68ca746 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512X2/pmon_daemon_control.json @@ -0,0 +1 @@ +../../x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/pmon_daemon_control.json \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512X2/port_config.ini b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512X2/port_config.ini new file mode 100644 index 00000000000..da1ec1ae418 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512X2/port_config.ini @@ -0,0 +1,533 @@ +## +## SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +## Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +## Apache-2.0 +## +## Licensed under the Apache License, Version 2.0 (the "License"); +## you may not use this file except in compliance with the License. +## You may obtain a copy of the License at +## +## http://www.apache.org/licenses/LICENSE-2.0 +## +## Unless required by applicable law or agreed to in writing, software +## distributed under the License is distributed on an "AS IS" BASIS, +## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +## See the License for the specific language governing permissions and +## limitations under the License. +## + +# name lanes alias index speed +Ethernet0 0 etp1a 1 100000 +Ethernet1 1 etp1b 1 100000 +Ethernet2 2 etp1c 1 100000 +Ethernet3 3 etp1d 1 100000 +Ethernet4 4 etp1e 1 100000 +Ethernet5 5 etp1f 1 100000 +Ethernet6 6 etp1g 1 100000 +Ethernet7 7 etp1h 1 100000 +Ethernet8 8 etp2a 2 100000 +Ethernet9 9 etp2b 2 100000 +Ethernet10 10 etp2c 2 100000 +Ethernet11 11 etp2d 2 100000 +Ethernet12 12 etp2e 2 100000 +Ethernet13 13 etp2f 2 100000 +Ethernet14 14 etp2g 2 100000 +Ethernet15 15 etp2h 2 100000 +Ethernet16 16 etp3a 3 100000 +Ethernet17 17 etp3b 3 100000 +Ethernet18 18 etp3c 3 100000 +Ethernet19 19 etp3d 3 100000 +Ethernet20 20 etp3e 3 100000 +Ethernet21 21 etp3f 3 100000 +Ethernet22 22 etp3g 3 100000 +Ethernet23 23 etp3h 3 100000 +Ethernet24 24 etp4a 4 100000 +Ethernet25 25 etp4b 4 100000 +Ethernet26 26 etp4c 4 100000 +Ethernet27 27 etp4d 4 100000 +Ethernet28 28 etp4e 4 100000 +Ethernet29 29 etp4f 4 100000 +Ethernet30 30 etp4g 4 100000 +Ethernet31 31 etp4h 4 100000 +Ethernet32 32 etp5a 5 100000 +Ethernet33 33 etp5b 5 100000 +Ethernet34 34 etp5c 5 100000 +Ethernet35 35 etp5d 5 100000 +Ethernet36 36 etp5e 5 100000 +Ethernet37 37 etp5f 5 100000 +Ethernet38 38 etp5g 5 100000 +Ethernet39 39 etp5h 5 100000 +Ethernet40 40 etp6a 6 100000 +Ethernet41 41 etp6b 6 100000 +Ethernet42 42 etp6c 6 100000 +Ethernet43 43 etp6d 6 100000 +Ethernet44 44 etp6e 6 100000 +Ethernet45 45 etp6f 6 100000 +Ethernet46 46 etp6g 6 100000 +Ethernet47 47 etp6h 6 100000 +Ethernet48 48 etp7a 7 100000 +Ethernet49 49 etp7b 7 100000 +Ethernet50 50 etp7c 7 100000 +Ethernet51 51 etp7d 7 100000 +Ethernet52 52 etp7e 7 100000 +Ethernet53 53 etp7f 7 100000 +Ethernet54 54 etp7g 7 100000 +Ethernet55 55 etp7h 7 100000 +Ethernet56 56 etp8a 8 100000 +Ethernet57 57 etp8b 8 100000 +Ethernet58 58 etp8c 8 100000 +Ethernet59 59 etp8d 8 100000 +Ethernet60 60 etp8e 8 100000 +Ethernet61 61 etp8f 8 100000 +Ethernet62 62 etp8g 8 100000 +Ethernet63 63 etp8h 8 100000 +Ethernet64 64 etp9a 9 100000 +Ethernet65 65 etp9b 9 100000 +Ethernet66 66 etp9c 9 100000 +Ethernet67 67 etp9d 9 100000 +Ethernet68 68 etp9e 9 100000 +Ethernet69 69 etp9f 9 100000 +Ethernet70 70 etp9g 9 100000 +Ethernet71 71 etp9h 9 100000 +Ethernet72 72 etp10a 10 100000 +Ethernet73 73 etp10b 10 100000 +Ethernet74 74 etp10c 10 100000 +Ethernet75 75 etp10d 10 100000 +Ethernet76 76 etp10e 10 100000 +Ethernet77 77 etp10f 10 100000 +Ethernet78 78 etp10g 10 100000 +Ethernet79 79 etp10h 10 100000 +Ethernet80 80 etp11a 11 100000 +Ethernet81 81 etp11b 11 100000 +Ethernet82 82 etp11c 11 100000 +Ethernet83 83 etp11d 11 100000 +Ethernet84 84 etp11e 11 100000 +Ethernet85 85 etp11f 11 100000 +Ethernet86 86 etp11g 11 100000 +Ethernet87 87 etp11h 11 100000 +Ethernet88 88 etp12a 12 100000 +Ethernet89 89 etp12b 12 100000 +Ethernet90 90 etp12c 12 100000 +Ethernet91 91 etp12d 12 100000 +Ethernet92 92 etp12e 12 100000 +Ethernet93 93 etp12f 12 100000 +Ethernet94 94 etp12g 12 100000 +Ethernet95 95 etp12h 12 100000 +Ethernet96 96 etp13a 13 100000 +Ethernet97 97 etp13b 13 100000 +Ethernet98 98 etp13c 13 100000 +Ethernet99 99 etp13d 13 100000 +Ethernet100 100 etp13e 13 100000 +Ethernet101 101 etp13f 13 100000 +Ethernet102 102 etp13g 13 100000 +Ethernet103 103 etp13h 13 100000 +Ethernet104 104 etp14a 14 100000 +Ethernet105 105 etp14b 14 100000 +Ethernet106 106 etp14c 14 100000 +Ethernet107 107 etp14d 14 100000 +Ethernet108 108 etp14e 14 100000 +Ethernet109 109 etp14f 14 100000 +Ethernet110 110 etp14g 14 100000 +Ethernet111 111 etp14h 14 100000 +Ethernet112 112 etp15a 15 100000 +Ethernet113 113 etp15b 15 100000 +Ethernet114 114 etp15c 15 100000 +Ethernet115 115 etp15d 15 100000 +Ethernet116 116 etp15e 15 100000 +Ethernet117 117 etp15f 15 100000 +Ethernet118 118 etp15g 15 100000 +Ethernet119 119 etp15h 15 100000 +Ethernet120 120 etp16a 16 100000 +Ethernet121 121 etp16b 16 100000 +Ethernet122 122 etp16c 16 100000 +Ethernet123 123 etp16d 16 100000 +Ethernet124 124 etp16e 16 100000 +Ethernet125 125 etp16f 16 100000 +Ethernet126 126 etp16g 16 100000 +Ethernet127 127 etp16h 16 100000 +Ethernet128 128 etp17a 17 100000 +Ethernet129 129 etp17b 17 100000 +Ethernet130 130 etp17c 17 100000 +Ethernet131 131 etp17d 17 100000 +Ethernet132 132 etp17e 17 100000 +Ethernet133 133 etp17f 17 100000 +Ethernet134 134 etp17g 17 100000 +Ethernet135 135 etp17h 17 100000 +Ethernet136 136 etp18a 18 100000 +Ethernet137 137 etp18b 18 100000 +Ethernet138 138 etp18c 18 100000 +Ethernet139 139 etp18d 18 100000 +Ethernet140 140 etp18e 18 100000 +Ethernet141 141 etp18f 18 100000 +Ethernet142 142 etp18g 18 100000 +Ethernet143 143 etp18h 18 100000 +Ethernet144 144 etp19a 19 100000 +Ethernet145 145 etp19b 19 100000 +Ethernet146 146 etp19c 19 100000 +Ethernet147 147 etp19d 19 100000 +Ethernet148 148 etp19e 19 100000 +Ethernet149 149 etp19f 19 100000 +Ethernet150 150 etp19g 19 100000 +Ethernet151 151 etp19h 19 100000 +Ethernet152 152 etp20a 20 100000 +Ethernet153 153 etp20b 20 100000 +Ethernet154 154 etp20c 20 100000 +Ethernet155 155 etp20d 20 100000 +Ethernet156 156 etp20e 20 100000 +Ethernet157 157 etp20f 20 100000 +Ethernet158 158 etp20g 20 100000 +Ethernet159 159 etp20h 20 100000 +Ethernet160 160 etp21a 21 100000 +Ethernet161 161 etp21b 21 100000 +Ethernet162 162 etp21c 21 100000 +Ethernet163 163 etp21d 21 100000 +Ethernet164 164 etp21e 21 100000 +Ethernet165 165 etp21f 21 100000 +Ethernet166 166 etp21g 21 100000 +Ethernet167 167 etp21h 21 100000 +Ethernet168 168 etp22a 22 100000 +Ethernet169 169 etp22b 22 100000 +Ethernet170 170 etp22c 22 100000 +Ethernet171 171 etp22d 22 100000 +Ethernet172 172 etp22e 22 100000 +Ethernet173 173 etp22f 22 100000 +Ethernet174 174 etp22g 22 100000 +Ethernet175 175 etp22h 22 100000 +Ethernet176 176 etp23a 23 100000 +Ethernet177 177 etp23b 23 100000 +Ethernet178 178 etp23c 23 100000 +Ethernet179 179 etp23d 23 100000 +Ethernet180 180 etp23e 23 100000 +Ethernet181 181 etp23f 23 100000 +Ethernet182 182 etp23g 23 100000 +Ethernet183 183 etp23h 23 100000 +Ethernet184 184 etp24a 24 100000 +Ethernet185 185 etp24b 24 100000 +Ethernet186 186 etp24c 24 100000 +Ethernet187 187 etp24d 24 100000 +Ethernet188 188 etp24e 24 100000 +Ethernet189 189 etp24f 24 100000 +Ethernet190 190 etp24g 24 100000 +Ethernet191 191 etp24h 24 100000 +Ethernet192 192 etp25a 25 100000 +Ethernet193 193 etp25b 25 100000 +Ethernet194 194 etp25c 25 100000 +Ethernet195 195 etp25d 25 100000 +Ethernet196 196 etp25e 25 100000 +Ethernet197 197 etp25f 25 100000 +Ethernet198 198 etp25g 25 100000 +Ethernet199 199 etp25h 25 100000 +Ethernet200 200 etp26a 26 100000 +Ethernet201 201 etp26b 26 100000 +Ethernet202 202 etp26c 26 100000 +Ethernet203 203 etp26d 26 100000 +Ethernet204 204 etp26e 26 100000 +Ethernet205 205 etp26f 26 100000 +Ethernet206 206 etp26g 26 100000 +Ethernet207 207 etp26h 26 100000 +Ethernet208 208 etp27a 27 100000 +Ethernet209 209 etp27b 27 100000 +Ethernet210 210 etp27c 27 100000 +Ethernet211 211 etp27d 27 100000 +Ethernet212 212 etp27e 27 100000 +Ethernet213 213 etp27f 27 100000 +Ethernet214 214 etp27g 27 100000 +Ethernet215 215 etp27h 27 100000 +Ethernet216 216 etp28a 28 100000 +Ethernet217 217 etp28b 28 100000 +Ethernet218 218 etp28c 28 100000 +Ethernet219 219 etp28d 28 100000 +Ethernet220 220 etp28e 28 100000 +Ethernet221 221 etp28f 28 100000 +Ethernet222 222 etp28g 28 100000 +Ethernet223 223 etp28h 28 100000 +Ethernet224 224 etp29a 29 100000 +Ethernet225 225 etp29b 29 100000 +Ethernet226 226 etp29c 29 100000 +Ethernet227 227 etp29d 29 100000 +Ethernet228 228 etp29e 29 100000 +Ethernet229 229 etp29f 29 100000 +Ethernet230 230 etp29g 29 100000 +Ethernet231 231 etp29h 29 100000 +Ethernet232 232 etp30a 30 100000 +Ethernet233 233 etp30b 30 100000 +Ethernet234 234 etp30c 30 100000 +Ethernet235 235 etp30d 30 100000 +Ethernet236 236 etp30e 30 100000 +Ethernet237 237 etp30f 30 100000 +Ethernet238 238 etp30g 30 100000 +Ethernet239 239 etp30h 30 100000 +Ethernet240 240 etp31a 31 100000 +Ethernet241 241 etp31b 31 100000 +Ethernet242 242 etp31c 31 100000 +Ethernet243 243 etp31d 31 100000 +Ethernet244 244 etp31e 31 100000 +Ethernet245 245 etp31f 31 100000 +Ethernet246 246 etp31g 31 100000 +Ethernet247 247 etp31h 31 100000 +Ethernet248 248 etp32a 32 100000 +Ethernet249 249 etp32b 32 100000 +Ethernet250 250 etp32c 32 100000 +Ethernet251 251 etp32d 32 100000 +Ethernet252 252 etp32e 32 100000 +Ethernet253 253 etp32f 32 100000 +Ethernet254 254 etp32g 32 100000 +Ethernet255 255 etp32h 32 100000 +Ethernet256 256 etp33a 33 100000 +Ethernet257 257 etp33b 33 100000 +Ethernet258 258 etp33c 33 100000 +Ethernet259 259 etp33d 33 100000 +Ethernet260 260 etp33e 33 100000 +Ethernet261 261 etp33f 33 100000 +Ethernet262 262 etp33g 33 100000 +Ethernet263 263 etp33h 33 100000 +Ethernet264 264 etp34a 34 100000 +Ethernet265 265 etp34b 34 100000 +Ethernet266 266 etp34c 34 100000 +Ethernet267 267 etp34d 34 100000 +Ethernet268 268 etp34e 34 100000 +Ethernet269 269 etp34f 34 100000 +Ethernet270 270 etp34g 34 100000 +Ethernet271 271 etp34h 34 100000 +Ethernet272 272 etp35a 35 100000 +Ethernet273 273 etp35b 35 100000 +Ethernet274 274 etp35c 35 100000 +Ethernet275 275 etp35d 35 100000 +Ethernet276 276 etp35e 35 100000 +Ethernet277 277 etp35f 35 100000 +Ethernet278 278 etp35g 35 100000 +Ethernet279 279 etp35h 35 100000 +Ethernet280 280 etp36a 36 100000 +Ethernet281 281 etp36b 36 100000 +Ethernet282 282 etp36c 36 100000 +Ethernet283 283 etp36d 36 100000 +Ethernet284 284 etp36e 36 100000 +Ethernet285 285 etp36f 36 100000 +Ethernet286 286 etp36g 36 100000 +Ethernet287 287 etp36h 36 100000 +Ethernet288 288 etp37a 37 100000 +Ethernet289 289 etp37b 37 100000 +Ethernet290 290 etp37c 37 100000 +Ethernet291 291 etp37d 37 100000 +Ethernet292 292 etp37e 37 100000 +Ethernet293 293 etp37f 37 100000 +Ethernet294 294 etp37g 37 100000 +Ethernet295 295 etp37h 37 100000 +Ethernet296 296 etp38a 38 100000 +Ethernet297 297 etp38b 38 100000 +Ethernet298 298 etp38c 38 100000 +Ethernet299 299 etp38d 38 100000 +Ethernet300 300 etp38e 38 100000 +Ethernet301 301 etp38f 38 100000 +Ethernet302 302 etp38g 38 100000 +Ethernet303 303 etp38h 38 100000 +Ethernet304 304 etp39a 39 100000 +Ethernet305 305 etp39b 39 100000 +Ethernet306 306 etp39c 39 100000 +Ethernet307 307 etp39d 39 100000 +Ethernet308 308 etp39e 39 100000 +Ethernet309 309 etp39f 39 100000 +Ethernet310 310 etp39g 39 100000 +Ethernet311 311 etp39h 39 100000 +Ethernet312 312 etp40a 40 100000 +Ethernet313 313 etp40b 40 100000 +Ethernet314 314 etp40c 40 100000 +Ethernet315 315 etp40d 40 100000 +Ethernet316 316 etp40e 40 100000 +Ethernet317 317 etp40f 40 100000 +Ethernet318 318 etp40g 40 100000 +Ethernet319 319 etp40h 40 100000 +Ethernet320 320 etp41a 41 100000 +Ethernet321 321 etp41b 41 100000 +Ethernet322 322 etp41c 41 100000 +Ethernet323 323 etp41d 41 100000 +Ethernet324 324 etp41e 41 100000 +Ethernet325 325 etp41f 41 100000 +Ethernet326 326 etp41g 41 100000 +Ethernet327 327 etp41h 41 100000 +Ethernet328 328 etp42a 42 100000 +Ethernet329 329 etp42b 42 100000 +Ethernet330 330 etp42c 42 100000 +Ethernet331 331 etp42d 42 100000 +Ethernet332 332 etp42e 42 100000 +Ethernet333 333 etp42f 42 100000 +Ethernet334 334 etp42g 42 100000 +Ethernet335 335 etp42h 42 100000 +Ethernet336 336 etp43a 43 100000 +Ethernet337 337 etp43b 43 100000 +Ethernet338 338 etp43c 43 100000 +Ethernet339 339 etp43d 43 100000 +Ethernet340 340 etp43e 43 100000 +Ethernet341 341 etp43f 43 100000 +Ethernet342 342 etp43g 43 100000 +Ethernet343 343 etp43h 43 100000 +Ethernet344 344 etp44a 44 100000 +Ethernet345 345 etp44b 44 100000 +Ethernet346 346 etp44c 44 100000 +Ethernet347 347 etp44d 44 100000 +Ethernet348 348 etp44e 44 100000 +Ethernet349 349 etp44f 44 100000 +Ethernet350 350 etp44g 44 100000 +Ethernet351 351 etp44h 44 100000 +Ethernet352 352 etp45a 45 100000 +Ethernet353 353 etp45b 45 100000 +Ethernet354 354 etp45c 45 100000 +Ethernet355 355 etp45d 45 100000 +Ethernet356 356 etp45e 45 100000 +Ethernet357 357 etp45f 45 100000 +Ethernet358 358 etp45g 45 100000 +Ethernet359 359 etp45h 45 100000 +Ethernet360 360 etp46a 46 100000 +Ethernet361 361 etp46b 46 100000 +Ethernet362 362 etp46c 46 100000 +Ethernet363 363 etp46d 46 100000 +Ethernet364 364 etp46e 46 100000 +Ethernet365 365 etp46f 46 100000 +Ethernet366 366 etp46g 46 100000 +Ethernet367 367 etp46h 46 100000 +Ethernet368 368 etp47a 47 100000 +Ethernet369 369 etp47b 47 100000 +Ethernet370 370 etp47c 47 100000 +Ethernet371 371 etp47d 47 100000 +Ethernet372 372 etp47e 47 100000 +Ethernet373 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100000 +Ethernet491 491 etp62d 62 100000 +Ethernet492 492 etp62e 62 100000 +Ethernet493 493 etp62f 62 100000 +Ethernet494 494 etp62g 62 100000 +Ethernet495 495 etp62h 62 100000 +Ethernet496 496 etp63a 63 100000 +Ethernet497 497 etp63b 63 100000 +Ethernet498 498 etp63c 63 100000 +Ethernet499 499 etp63d 63 100000 +Ethernet500 500 etp63e 63 100000 +Ethernet501 501 etp63f 63 100000 +Ethernet502 502 etp63g 63 100000 +Ethernet503 503 etp63h 63 100000 +Ethernet504 504 etp64a 64 100000 +Ethernet505 505 etp64b 64 100000 +Ethernet506 506 etp64c 64 100000 +Ethernet507 507 etp64d 64 100000 +Ethernet508 508 etp64e 64 100000 +Ethernet509 509 etp64f 64 100000 +Ethernet510 510 etp64g 64 100000 +Ethernet511 511 etp64h 64 100000 +Ethernet512 512 etp65 65 25000 +Ethernet520 520 etp66 66 25000 diff --git a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512X2/qos.json.j2 b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512X2/qos.json.j2 new file mode 120000 index 00000000000..462ffcd7e1f --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512X2/qos.json.j2 @@ -0,0 +1 @@ +../../x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/qos.json.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512X2/sai.profile b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512X2/sai.profile new file mode 120000 index 00000000000..bb806ae7e29 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512X2/sai.profile @@ -0,0 +1 @@ +../Mellanox-SN5640-C512S2/sai.profile \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512X2/sai_5640_512x100g.xml b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512X2/sai_5640_512x100g.xml new file mode 120000 index 00000000000..5719736f4ac --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512X2/sai_5640_512x100g.xml @@ -0,0 +1 @@ +../Mellanox-SN5640-C512S2/sai_5640_512x100g.xml \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512X2/traffic_config.j2 b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512X2/traffic_config.j2 new file mode 120000 index 00000000000..6a1603fc279 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512X2/traffic_config.j2 @@ -0,0 +1 @@ +../Mellanox-SN5640-C512S2/traffic_config.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-O128X2/buffers.json.j2 b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-O128X2/buffers.json.j2 new file mode 120000 index 00000000000..add8bf8bb7c --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-O128X2/buffers.json.j2 @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/buffers.json.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-O128X2/buffers_defaults_objects.j2 b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-O128X2/buffers_defaults_objects.j2 new file mode 120000 index 00000000000..e404fb0aae1 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-O128X2/buffers_defaults_objects.j2 @@ -0,0 +1 @@ +../../x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/buffers_defaults_objects.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-O128X2/buffers_defaults_t0.j2 b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-O128X2/buffers_defaults_t0.j2 new file mode 100644 index 00000000000..e8d1aa5b6af --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-O128X2/buffers_defaults_t0.j2 @@ -0,0 +1,54 @@ +{# + SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES + Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + Apache-2.0 + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +#} +{% set default_cable = '0m' %} +{%-set ports2cable = { + 'torrouter_server' : '0m', + 'leafrouter_torrouter' : '0m', + 'spinerouter_leafrouter' : '0m' + } +-%} +{% set ingress_lossless_pool_size = '117740544' %} +{% set ingress_lossless_pool_xoff = '0' %} +{% set egress_lossless_pool_size = '136209408' %} +{% set egress_lossy_pool_size = '117740544' %} + +{% import 'buffers_defaults_objects.j2' as defs with context %} + +{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %} +{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_queue_buffers_with_extra_lossless_queues_with_inactive_ports(port_names_active, port_names_extra_queues, port_names_inactive) %} +{{ defs.generate_queue_buffers_with_extra_lossless_queues(port_names_active, port_names_extra_queues, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_pg_profiles_with_extra_lossless_pgs_with_inactive_ports(port_names_active, port_names_extra_pgs, port_names_inactive) %} +{{ defs.generate_pg_profiles_with_extra_lossless_pgs(port_names_active, port_names_extra_pgs, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }} +{%- endmacro %} diff --git a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-O128X2/buffers_defaults_t1.j2 b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-O128X2/buffers_defaults_t1.j2 new file mode 100644 index 00000000000..e8d1aa5b6af --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-O128X2/buffers_defaults_t1.j2 @@ -0,0 +1,54 @@ +{# + SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES + Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + Apache-2.0 + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +#} +{% set default_cable = '0m' %} +{%-set ports2cable = { + 'torrouter_server' : '0m', + 'leafrouter_torrouter' : '0m', + 'spinerouter_leafrouter' : '0m' + } +-%} +{% set ingress_lossless_pool_size = '117740544' %} +{% set ingress_lossless_pool_xoff = '0' %} +{% set egress_lossless_pool_size = '136209408' %} +{% set egress_lossy_pool_size = '117740544' %} + +{% import 'buffers_defaults_objects.j2' as defs with context %} + +{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %} +{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_queue_buffers_with_extra_lossless_queues_with_inactive_ports(port_names_active, port_names_extra_queues, port_names_inactive) %} +{{ defs.generate_queue_buffers_with_extra_lossless_queues(port_names_active, port_names_extra_queues, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_pg_profiles_with_extra_lossless_pgs_with_inactive_ports(port_names_active, port_names_extra_pgs, port_names_inactive) %} +{{ defs.generate_pg_profiles_with_extra_lossless_pgs(port_names_active, port_names_extra_pgs, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }} +{%- endmacro %} diff --git a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-O128X2/buffers_defaults_t2.j2 b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-O128X2/buffers_defaults_t2.j2 new file mode 120000 index 00000000000..011f8817d64 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-O128X2/buffers_defaults_t2.j2 @@ -0,0 +1 @@ +buffers_defaults_t1.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-O128X2/buffers_dynamic.json.j2 b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-O128X2/buffers_dynamic.json.j2 new file mode 120000 index 00000000000..8c4117c6621 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-O128X2/buffers_dynamic.json.j2 @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/buffers_dynamic.json.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-O128X2/create_only_config_db_buffers.json b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-O128X2/create_only_config_db_buffers.json new file mode 120000 index 00000000000..8d697471a09 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-O128X2/create_only_config_db_buffers.json @@ -0,0 +1 @@ +../Mellanox-SN5640-C512S2/create_only_config_db_buffers.json \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-O128X2/hwsku.json b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-O128X2/hwsku.json new file mode 100644 index 00000000000..917fa9068f0 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-O128X2/hwsku.json @@ -0,0 +1,522 @@ +{ + "interfaces": { + "Ethernet0": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet4": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet8": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet12": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet16": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet20": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet24": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet28": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet32": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet36": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet40": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet44": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet48": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet52": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet56": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet60": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet64": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet68": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet72": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet76": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet80": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet84": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet88": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet92": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet96": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet100": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet104": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet108": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet112": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet116": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet120": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet124": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet128": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet132": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet136": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet140": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet144": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet148": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet152": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet156": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet160": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet164": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet168": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet172": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet176": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet180": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet184": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet188": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet192": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet196": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet200": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet204": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet208": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet212": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet216": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet220": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet224": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet228": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet232": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet236": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet240": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet244": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet248": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet252": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet256": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet260": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet264": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet268": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet272": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet276": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet280": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet284": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet288": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet292": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet296": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet300": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet304": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet308": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet312": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet316": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet320": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet324": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet328": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet332": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet336": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet340": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet344": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet348": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet352": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet356": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet360": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet364": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet368": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet372": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet376": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet380": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet384": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet388": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet392": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet396": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet400": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet404": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet408": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet412": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet416": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet420": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet424": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet428": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet432": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet436": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet440": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet444": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet448": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet452": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet456": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet460": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet464": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet468": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet472": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet476": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet480": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet484": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet488": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet492": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet496": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet500": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet504": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet508": { + "default_brkout_mode": "2x400G[200G]", + "autoneg": "off" + }, + "Ethernet512": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet520": { + "default_brkout_mode": "1x25G[10G]" + } + } +} diff --git a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-O128X2/media_settings.json b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-O128X2/media_settings.json new file mode 120000 index 00000000000..bb10e748618 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-O128X2/media_settings.json @@ -0,0 +1 @@ +../../x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/media_settings.json \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-O128X2/optics_si_settings.json b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-O128X2/optics_si_settings.json new file mode 120000 index 00000000000..84477b1a15d --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-O128X2/optics_si_settings.json @@ -0,0 +1 @@ +../../x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/optics_si_settings.json \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-O128X2/pg_profile_lookup.ini b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-O128X2/pg_profile_lookup.ini new file mode 120000 index 00000000000..e45bddfeec7 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-O128X2/pg_profile_lookup.ini @@ -0,0 +1 @@ +../Mellanox-SN5640-C512X2/pg_profile_lookup.ini \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-O128X2/pmon_daemon_control.json b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-O128X2/pmon_daemon_control.json new file mode 120000 index 00000000000..e31c68ca746 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-O128X2/pmon_daemon_control.json @@ -0,0 +1 @@ +../../x86_64-nvidia_sn5600-r0/Mellanox-SN5600-V256/pmon_daemon_control.json \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-O128X2/port_config.ini b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-O128X2/port_config.ini new file mode 100644 index 00000000000..aa975a83a7b --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-O128X2/port_config.ini @@ -0,0 +1,149 @@ +## +## SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +## Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +## Apache-2.0 +## +## Licensed under the Apache License, Version 2.0 (the "License"); +## you may not use this file except in compliance with the License. +## You may obtain a copy of the License at +## +## http://www.apache.org/licenses/LICENSE-2.0 +## +## Unless required by applicable law or agreed to in writing, software +## distributed under the License is distributed on an "AS IS" BASIS, +## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +## See the License for the specific language governing permissions and +## limitations under the License. +## + +# name lanes alias index speed +Ethernet0 0,1,2,3 etp1a 1 400000 +Ethernet4 4,5,6,7 etp1b 1 400000 +Ethernet8 8,9,10,11 etp2a 2 400000 +Ethernet12 12,13,14,15 etp2b 2 400000 +Ethernet16 16,17,18,19 etp3a 3 400000 +Ethernet20 20,21,22,23 etp3b 3 400000 +Ethernet24 24,25,26,27 etp4a 4 400000 +Ethernet28 28,29,30,31 etp4b 4 400000 +Ethernet32 32,33,34,35 etp5a 5 400000 +Ethernet36 36,37,38,39 etp5b 5 400000 +Ethernet40 40,41,42,43 etp6a 6 400000 +Ethernet44 44,45,46,47 etp6b 6 400000 +Ethernet48 48,49,50,51 etp7a 7 400000 +Ethernet52 52,53,54,55 etp7b 7 400000 +Ethernet56 56,57,58,59 etp8a 8 400000 +Ethernet60 60,61,62,63 etp8b 8 400000 +Ethernet64 64,65,66,67 etp9a 9 400000 +Ethernet68 68,69,70,71 etp9b 9 400000 +Ethernet72 72,73,74,75 etp10a 10 400000 +Ethernet76 76,77,78,79 etp10b 10 400000 +Ethernet80 80,81,82,83 etp11a 11 400000 +Ethernet84 84,85,86,87 etp11b 11 400000 +Ethernet88 88,89,90,91 etp12a 12 400000 +Ethernet92 92,93,94,95 etp12b 12 400000 +Ethernet96 96,97,98,99 etp13a 13 400000 +Ethernet100 100,101,102,103 etp13b 13 400000 +Ethernet104 104,105,106,107 etp14a 14 400000 +Ethernet108 108,109,110,111 etp14b 14 400000 +Ethernet112 112,113,114,115 etp15a 15 400000 +Ethernet116 116,117,118,119 etp15b 15 400000 +Ethernet120 120,121,122,123 etp16a 16 400000 +Ethernet124 124,125,126,127 etp16b 16 400000 +Ethernet128 128,129,130,131 etp17a 17 400000 +Ethernet132 132,133,134,135 etp17b 17 400000 +Ethernet136 136,137,138,139 etp18a 18 400000 +Ethernet140 140,141,142,143 etp18b 18 400000 +Ethernet144 144,145,146,147 etp19a 19 400000 +Ethernet148 148,149,150,151 etp19b 19 400000 +Ethernet152 152,153,154,155 etp20a 20 400000 +Ethernet156 156,157,158,159 etp20b 20 400000 +Ethernet160 160,161,162,163 etp21a 21 400000 +Ethernet164 164,165,166,167 etp21b 21 400000 +Ethernet168 168,169,170,171 etp22a 22 400000 +Ethernet172 172,173,174,175 etp22b 22 400000 +Ethernet176 176,177,178,179 etp23a 23 400000 +Ethernet180 180,181,182,183 etp23b 23 400000 +Ethernet184 184,185,186,187 etp24a 24 400000 +Ethernet188 188,189,190,191 etp24b 24 400000 +Ethernet192 192,193,194,195 etp25a 25 400000 +Ethernet196 196,197,198,199 etp25b 25 400000 +Ethernet200 200,201,202,203 etp26a 26 400000 +Ethernet204 204,205,206,207 etp26b 26 400000 +Ethernet208 208,209,210,211 etp27a 27 400000 +Ethernet212 212,213,214,215 etp27b 27 400000 +Ethernet216 216,217,218,219 etp28a 28 400000 +Ethernet220 220,221,222,223 etp28b 28 400000 +Ethernet224 224,225,226,227 etp29a 29 400000 +Ethernet228 228,229,230,231 etp29b 29 400000 +Ethernet232 232,233,234,235 etp30a 30 400000 +Ethernet236 236,237,238,239 etp30b 30 400000 +Ethernet240 240,241,242,243 etp31a 31 400000 +Ethernet244 244,245,246,247 etp31b 31 400000 +Ethernet248 248,249,250,251 etp32a 32 400000 +Ethernet252 252,253,254,255 etp32b 32 400000 +Ethernet256 256,257,258,259 etp33a 33 400000 +Ethernet260 260,261,262,263 etp33b 33 400000 +Ethernet264 264,265,266,267 etp34a 34 400000 +Ethernet268 268,269,270,271 etp34b 34 400000 +Ethernet272 272,273,274,275 etp35a 35 400000 +Ethernet276 276,277,278,279 etp35b 35 400000 +Ethernet280 280,281,282,283 etp36a 36 400000 +Ethernet284 284,285,286,287 etp36b 36 400000 +Ethernet288 288,289,290,291 etp37a 37 400000 +Ethernet292 292,293,294,295 etp37b 37 400000 +Ethernet296 296,297,298,299 etp38a 38 400000 +Ethernet300 300,301,302,303 etp38b 38 400000 +Ethernet304 304,305,306,307 etp39a 39 400000 +Ethernet308 308,309,310,311 etp39b 39 400000 +Ethernet312 312,313,314,315 etp40a 40 400000 +Ethernet316 316,317,318,319 etp40b 40 400000 +Ethernet320 320,321,322,323 etp41a 41 400000 +Ethernet324 324,325,326,327 etp41b 41 400000 +Ethernet328 328,329,330,331 etp42a 42 400000 +Ethernet332 332,333,334,335 etp42b 42 400000 +Ethernet336 336,337,338,339 etp43a 43 400000 +Ethernet340 340,341,342,343 etp43b 43 400000 +Ethernet344 344,345,346,347 etp44a 44 400000 +Ethernet348 348,349,350,351 etp44b 44 400000 +Ethernet352 352,353,354,355 etp45a 45 400000 +Ethernet356 356,357,358,359 etp45b 45 400000 +Ethernet360 360,361,362,363 etp46a 46 400000 +Ethernet364 364,365,366,367 etp46b 46 400000 +Ethernet368 368,369,370,371 etp47a 47 400000 +Ethernet372 372,373,374,375 etp47b 47 400000 +Ethernet376 376,377,378,379 etp48a 48 400000 +Ethernet380 380,381,382,383 etp48b 48 400000 +Ethernet384 384,385,386,387 etp49a 49 400000 +Ethernet388 388,389,390,391 etp49b 49 400000 +Ethernet392 392,393,394,395 etp50a 50 400000 +Ethernet396 396,397,398,399 etp50b 50 400000 +Ethernet400 400,401,402,403 etp51a 51 400000 +Ethernet404 404,405,406,407 etp51b 51 400000 +Ethernet408 408,409,410,411 etp52a 52 400000 +Ethernet412 412,413,414,415 etp52b 52 400000 +Ethernet416 416,417,418,419 etp53a 53 400000 +Ethernet420 420,421,422,423 etp53b 53 400000 +Ethernet424 424,425,426,427 etp54a 54 400000 +Ethernet428 428,429,430,431 etp54b 54 400000 +Ethernet432 432,433,434,435 etp55a 55 400000 +Ethernet436 436,437,438,439 etp55b 55 400000 +Ethernet440 440,441,442,443 etp56a 56 400000 +Ethernet444 444,445,446,447 etp56b 56 400000 +Ethernet448 448,449,450,451 etp57a 57 400000 +Ethernet452 452,453,454,455 etp57b 57 400000 +Ethernet456 456,457,458,459 etp58a 58 400000 +Ethernet460 460,461,462,463 etp58b 58 400000 +Ethernet464 464,465,466,467 etp59a 59 400000 +Ethernet468 468,469,470,471 etp59b 59 400000 +Ethernet472 472,473,474,475 etp60a 60 400000 +Ethernet476 476,477,478,479 etp60b 60 400000 +Ethernet480 480,481,482,483 etp61a 61 400000 +Ethernet484 484,485,486,487 etp61b 61 400000 +Ethernet488 488,489,490,491 etp62a 62 400000 +Ethernet492 492,493,494,495 etp62b 62 400000 +Ethernet496 496,497,498,499 etp63a 63 400000 +Ethernet500 500,501,502,503 etp63b 63 400000 +Ethernet504 504,505,506,507 etp64a 64 400000 +Ethernet508 508,509,510,511 etp64b 64 400000 +Ethernet512 512 etp65 65 25000 +Ethernet520 520 etp66 66 25000 diff --git a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-O128X2/qos.json.j2 b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-O128X2/qos.json.j2 new file mode 120000 index 00000000000..462ffcd7e1f --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-O128X2/qos.json.j2 @@ -0,0 +1 @@ +../../x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/qos.json.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-O128X2/sai.profile b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-O128X2/sai.profile new file mode 120000 index 00000000000..bb806ae7e29 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-O128X2/sai.profile @@ -0,0 +1 @@ +../Mellanox-SN5640-C512S2/sai.profile \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-O128X2/sai_5640_512x100g.xml b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-O128X2/sai_5640_512x100g.xml new file mode 120000 index 00000000000..5719736f4ac --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-O128X2/sai_5640_512x100g.xml @@ -0,0 +1 @@ +../Mellanox-SN5640-C512S2/sai_5640_512x100g.xml \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-O128X2/traffic_config.j2 b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-O128X2/traffic_config.j2 new file mode 120000 index 00000000000..6a1603fc279 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5640-r0/Mellanox-SN5640-O128X2/traffic_config.j2 @@ -0,0 +1 @@ +../Mellanox-SN5640-C512S2/traffic_config.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn5640-r0/create_only_config_db_buffers.json b/device/mellanox/x86_64-nvidia_sn5640-r0/create_only_config_db_buffers.json new file mode 120000 index 00000000000..87e12387fcd --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5640-r0/create_only_config_db_buffers.json @@ -0,0 +1 @@ +../x86_64-mlnx_msn2700-r0/create_only_config_db_buffers.json \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn5640-r0/platform.json b/device/mellanox/x86_64-nvidia_sn5640-r0/platform.json old mode 100644 new mode 100755 index 125ca03abd7..aed579e9e8d --- a/device/mellanox/x86_64-nvidia_sn5640-r0/platform.json +++ b/device/mellanox/x86_64-nvidia_sn5640-r0/platform.json @@ -138,7 +138,8 @@ ], "thermals": [ { - "name": "ASIC" + "name": "ASIC", + "polling_interval": 3 }, { "name": "Ambient Fan Side Temp" @@ -692,7 +693,9 @@ "1x400G": ["etp1"], "2x400G[200G]": ["etp1a", "etp1b"], "4x200G[100G]": ["etp1a", "etp1b", "etp1c", "etp1d"], - "8x100G[50G]": ["etp1a", "etp1b", "etp1c", "etp1d", "etp1e", "etp1f", "etp1g", "etp1h"] + "8x100G[50G]": ["etp1a", "etp1b", "etp1c", "etp1d", "etp1e", "etp1f", "etp1g", "etp1h"], + "4x100G(4)+1x400G(4)": ["etp1a", "etp1b", "etp1c", "etp1d", "etp1e"], + "1x400G(4)+4x100G(4)": ["etp1a", "etp1b", "etp1c", "etp1d", "etp1e"] } }, "Ethernet8": { @@ -702,7 +705,9 @@ "1x400G": ["etp2"], "2x400G[200G]": ["etp2a", "etp2b"], "4x200G[100G]": ["etp2a", "etp2b", "etp2c", "etp2d"], - "8x100G[50G]": ["etp2a", "etp2b", "etp2c", "etp2d", "etp2e", "etp2f", "etp2g","etp2h"] + "8x100G[50G]": ["etp2a", "etp2b", "etp2c", "etp2d", "etp2e", "etp2f", "etp2g","etp2h"], + "4x100G(4)+1x400G(4)": ["etp2a", "etp2b", "etp2c", "etp2d", "etp2e"], + "1x400G(4)+4x100G(4)": ["etp2a", "etp2b", "etp2c", "etp2d", "etp2e"] } }, "Ethernet16": { @@ -712,7 +717,9 @@ "1x400G": ["etp3"], "2x400G[200G]": ["etp3a", "etp3b"], "4x200G[100G]": ["etp3a", "etp3b", "etp3c", "etp3d"], - "8x100G[50G]": ["etp3a", "etp3b", "etp3c", "etp3d", "etp3e", "etp3f", "etp3g", "etp3h"] + "8x100G[50G]": ["etp3a", "etp3b", "etp3c", "etp3d", "etp3e", "etp3f", "etp3g", "etp3h"], + "4x100G(4)+1x400G(4)": ["etp3a", "etp3b", "etp3c", "etp3d", "etp3e"], + "1x400G(4)+4x100G(4)": ["etp3a", "etp3b", "etp3c", "etp3d", "etp3e"] } }, "Ethernet24": { @@ -722,7 +729,9 @@ "1x400G": ["etp4"], "2x400G[200G]": ["etp4a", "etp4b"], "4x200G[100G]": ["etp4a", "etp4b", "etp4c", "etp4d"], - "8x100G[50G]": ["etp4a", "etp4b", "etp4c", "etp4d", "etp4e", "etp4f", "etp4g", "etp4h"] + "8x100G[50G]": ["etp4a", "etp4b", "etp4c", "etp4d", "etp4e", "etp4f", "etp4g", "etp4h"], + "4x100G(4)+1x400G(4)": ["etp4a", "etp4b", "etp4c", "etp4d", "etp4e"], + "1x400G(4)+4x100G(4)": ["etp4a", "etp4b", "etp4c", "etp4d", "etp4e"] } }, "Ethernet32": { @@ -732,7 +741,9 @@ "1x400G": ["etp5"], "2x400G[200G]": ["etp5a", "etp5b"], "4x200G[100G]": ["etp5a", "etp5b", "etp5c", "etp5d"], - "8x100G[50G]": ["etp5a", "etp5b", "etp5c", "etp5d", "etp5e", "etp5f", "etp5g", "etp5h"] + "8x100G[50G]": ["etp5a", "etp5b", "etp5c", "etp5d", "etp5e", "etp5f", "etp5g", "etp5h"], + "4x100G(4)+1x400G(4)": ["etp5a", "etp5b", "etp5c", "etp5d", "etp5e"], + "1x400G(4)+4x100G(4)": ["etp5a", "etp5b", "etp5c", "etp5d", "etp5e"] } }, "Ethernet40": { @@ -742,7 +753,9 @@ "1x400G": ["etp6"], "2x400G[200G]": ["etp6a", "etp6b"], "4x200G[100G]": ["etp6a", "etp6b", "etp6c", "etp6d"], - "8x100G[50G]": ["etp6a", "etp6b", "etp6c", "etp6d", "etp6e", "etp6f", "etp6g", "etp6h"] + "8x100G[50G]": ["etp6a", "etp6b", "etp6c", "etp6d", "etp6e", "etp6f", "etp6g", "etp6h"], + "4x100G(4)+1x400G(4)": ["etp6a", "etp6b", "etp6c", "etp6d", "etp6e"], + "1x400G(4)+4x100G(4)": ["etp6a", "etp6b", "etp6c", "etp6d", "etp6e"] } }, "Ethernet48": { @@ -752,7 +765,9 @@ "1x400G": ["etp7"], "2x400G[200G]": ["etp7a", "etp7b"], "4x200G[100G]": ["etp7a", "etp7b", "etp7c", "etp7d"], - "8x100G[50G]": ["etp7a", "etp7b", "etp7c", "etp7d", "etp7e", "etp7f", "etp7g", "etp7h"] + "8x100G[50G]": ["etp7a", "etp7b", "etp7c", "etp7d", "etp7e", "etp7f", "etp7g", "etp7h"], + "4x100G(4)+1x400G(4)": ["etp7a", "etp7b", "etp7c", "etp7d", "etp7e"], + "1x400G(4)+4x100G(4)": ["etp7a", "etp7b", "etp7c", "etp7d", "etp7e"] } }, "Ethernet56": { @@ -762,7 +777,9 @@ "1x400G": ["etp8"], "2x400G[200G]": ["etp8a", "etp8b"], "4x200G[100G]": ["etp8a", "etp8b", "etp8c", "etp8d"], - "8x100G[50G]": ["etp8a", "etp8b", "etp8c", "etp8d", "etp8e", "etp8f", "etp8g", "etp8h"] + "8x100G[50G]": ["etp8a", "etp8b", "etp8c", "etp8d", "etp8e", "etp8f", "etp8g", "etp8h"], + "4x100G(4)+1x400G(4)": ["etp8a", "etp8b", "etp8c", "etp8d", "etp8e"], + "1x400G(4)+4x100G(4)": ["etp8a", "etp8b", "etp8c", "etp8d", "etp8e"] } }, "Ethernet64": { @@ -772,7 +789,9 @@ "1x400G": ["etp9"], "2x400G[200G]": ["etp9a", "etp9b"], "4x200G[100G]": ["etp9a", "etp9b", "etp9c", "etp9d"], - "8x100G[50G]": ["etp9a", "etp9b", "etp9c", "etp9d", "etp9e", "etp9f", "etp9g", "etp9h"] + "8x100G[50G]": ["etp9a", "etp9b", "etp9c", "etp9d", "etp9e", "etp9f", "etp9g", "etp9h"], + "4x100G(4)+1x400G(4)": ["etp9a", "etp9b", "etp9c", "etp9d", "etp9e"], + "1x400G(4)+4x100G(4)": ["etp9a", "etp9b", "etp9c", "etp9d", "etp9e"] } }, "Ethernet72": { @@ -782,7 +801,9 @@ "1x400G": ["etp10"], "2x400G[200G]": ["etp10a", "etp10b"], "4x200G[100G]": ["etp10a", "etp10b", "etp10c", "etp10d"], - "8x100G[50G]": ["etp10a", "etp10b", "etp10c", "etp10d", "etp10e", "etp10f", "etp10g", "etp10h"] + "8x100G[50G]": ["etp10a", "etp10b", "etp10c", "etp10d", "etp10e", "etp10f", "etp10g", "etp10h"], + "4x100G(4)+1x400G(4)": ["etp10a", "etp10b", "etp10c", "etp10d", "etp10e"], + "1x400G(4)+4x100G(4)": ["etp10a", "etp10b", "etp10c", "etp10d", "etp10e"] } }, "Ethernet80": { @@ -792,7 +813,9 @@ "1x400G": ["etp11"], "2x400G[200G]": ["etp11a", "etp11b"], "4x200G[100G]": ["etp11a", "etp11b", "etp11c", "etp11d"], - "8x100G[50G]": ["etp11a", "etp11b", "etp11c", "etp11d", "etp11e", "etp11f", "etp11g", "etp11h"] + "8x100G[50G]": ["etp11a", "etp11b", "etp11c", "etp11d", "etp11e", "etp11f", "etp11g", "etp11h"], + "4x100G(4)+1x400G(4)": ["etp11a", "etp11b", "etp11c", "etp11d", "etp11e"], + "1x400G(4)+4x100G(4)": ["etp11a", "etp11b", "etp11c", "etp11d", "etp11e"] } }, "Ethernet88": { @@ -802,7 +825,9 @@ "1x400G": ["etp12"], "2x400G[200G]": ["etp12a", "etp12b"], "4x200G[100G]": ["etp12a", "etp12b", "etp12c", "etp12d"], - "8x100G[50G]": ["etp12a", "etp12b", "etp12c", "etp12d", "etp12e", "etp12f", "etp12g", "etp12h"] + "8x100G[50G]": ["etp12a", "etp12b", "etp12c", "etp12d", "etp12e", "etp12f", "etp12g", "etp12h"], + "4x100G(4)+1x400G(4)": ["etp12a", "etp12b", "etp12c", "etp12d", "etp12e"], + "1x400G(4)+4x100G(4)": ["etp12a", "etp12b", "etp12c", "etp12d", "etp12e"] } }, "Ethernet96": { @@ -812,7 +837,9 @@ "1x400G": ["etp13"], "2x400G[200G]": ["etp13a", "etp13b"], "4x200G[100G]": ["etp13a", "etp13b", "etp13c", "etp13d"], - "8x100G[50G]": ["etp13a", "etp13b", "etp13c", "etp13d", "etp13e", "etp13f", "etp13g", "etp13h"] + "8x100G[50G]": ["etp13a", "etp13b", "etp13c", "etp13d", "etp13e", "etp13f", "etp13g", "etp13h"], + "4x100G(4)+1x400G(4)": ["etp13a", "etp13b", "etp13c", "etp13d", "etp13e"], + "1x400G(4)+4x100G(4)": ["etp13a", "etp13b", "etp13c", "etp13d", "etp13e"] } }, "Ethernet104": { @@ -822,7 +849,9 @@ "1x400G": ["etp14"], "2x400G[200G]": ["etp14a", "etp14b"], "4x200G[100G]": ["etp14a", "etp14b", "etp14c", "etp14d"], - "8x100G[50G]": ["etp14a", "etp14b", "etp14c", "etp14d", "etp14e", "etp14f", "etp14g", "etp14h"] + "8x100G[50G]": ["etp14a", "etp14b", "etp14c", "etp14d", "etp14e", "etp14f", "etp14g", "etp14h"], + "4x100G(4)+1x400G(4)": ["etp14a", "etp14b", "etp14c", "etp14d", "etp14e"], + "1x400G(4)+4x100G(4)": ["etp14a", "etp14b", "etp14c", "etp14d", "etp14e"] } }, "Ethernet112": { @@ -832,7 +861,9 @@ "1x400G": ["etp15"], "2x400G[200G]": ["etp15a", "etp15b"], "4x200G[100G]": ["etp15a", "etp15b", "etp15c", "etp15d"], - "8x100G[50G]": ["etp15a", "etp15b", "etp15c", "etp15d", "etp15e", "etp15f", "etp15g", "etp15h"] + "8x100G[50G]": ["etp15a", "etp15b", "etp15c", "etp15d", "etp15e", "etp15f", "etp15g", "etp15h"], + "4x100G(4)+1x400G(4)": ["etp15a", "etp15b", "etp15c", "etp15d", "etp15e"], + "1x400G(4)+4x100G(4)": ["etp15a", "etp15b", "etp15c", "etp15d", "etp15e"] } }, "Ethernet120": { @@ -842,7 +873,9 @@ "1x400G": ["etp16"], "2x400G[200G]": ["etp16a", "etp16b"], "4x200G[100G]": ["etp16a", "etp16b", "etp16c", "etp16d"], - "8x100G[50G]": ["etp16a", "etp16b", "etp16c", "etp16d", "etp16e", "etp16f", "etp16g", "etp16h"] + "8x100G[50G]": ["etp16a", "etp16b", "etp16c", "etp16d", "etp16e", "etp16f", "etp16g", "etp16h"], + "4x100G(4)+1x400G(4)": ["etp16a", "etp16b", "etp16c", "etp16d", "etp16e"], + "1x400G(4)+4x100G(4)": ["etp16a", "etp16b", "etp16c", "etp16d", "etp16e"] } }, "Ethernet128": { @@ -852,7 +885,9 @@ "1x400G": ["etp17"], "2x400G[200G]": ["etp17a", "etp17b"], "4x200G[100G]": ["etp17a", "etp17b", "etp17c", "etp17d"], - "8x100G[50G]": ["etp17a", "etp17b", "etp17c", "etp17d", "etp17e", "etp17f", "etp17g", "etp17h"] + "8x100G[50G]": ["etp17a", "etp17b", "etp17c", "etp17d", "etp17e", "etp17f", "etp17g", "etp17h"], + "4x100G(4)+1x400G(4)": ["etp17a", "etp17b", "etp17c", "etp17d", "etp17e"], + "1x400G(4)+4x100G(4)": ["etp17a", "etp17b", "etp17c", "etp17d", "etp17e"] } }, "Ethernet136": { @@ -862,7 +897,9 @@ "1x400G": ["etp18"], "2x400G[200G]": ["etp18a", "etp18b"], "4x200G[100G]": ["etp18a", "etp18b", "etp18c", "etp18d"], - "8x100G[50G]": ["etp18a", "etp18b", "etp18c", "etp18d", "etp18e", "etp18f", "etp18g", "etp18h"] + "8x100G[50G]": ["etp18a", "etp18b", "etp18c", "etp18d", "etp18e", "etp18f", "etp18g", "etp18h"], + "4x100G(4)+1x400G(4)": ["etp18a", "etp18b", "etp18c", "etp18d", "etp18e"], + "1x400G(4)+4x100G(4)": ["etp18a", "etp18b", "etp18c", "etp18d", "etp18e"] } }, "Ethernet144": { @@ -872,7 +909,9 @@ "1x400G": ["etp19"], "2x400G[200G]": ["etp19a", "etp19b"], "4x200G[100G]": ["etp19a", "etp19b", "etp19c", "etp19d"], - "8x100G[50G]": ["etp19a", "etp19b", "etp19c", "etp19d", "etp19e", "etp19f", "etp19g", "etp19h"] + "8x100G[50G]": ["etp19a", "etp19b", "etp19c", "etp19d", "etp19e", "etp19f", "etp19g", "etp19h"], + "4x100G(4)+1x400G(4)": ["etp19a", "etp19b", "etp19c", "etp19d", "etp19e"], + "1x400G(4)+4x100G(4)": ["etp19a", "etp19b", "etp19c", "etp19d", "etp19e"] } }, "Ethernet152": { @@ -882,7 +921,9 @@ "1x400G": ["etp20"], "2x400G[200G]": ["etp20a", "etp20b"], "4x200G[100G]": ["etp20a", "etp20b", "etp20c", "etp20d"], - "8x100G[50G]": ["etp20a", "etp20b", "etp20c", "etp20d", "etp20e", "etp20f", "etp20g", "etp20h"] + "8x100G[50G]": ["etp20a", "etp20b", "etp20c", "etp20d", "etp20e", "etp20f", "etp20g", "etp20h"], + "4x100G(4)+1x400G(4)": ["etp20a", "etp20b", "etp20c", "etp20d", "etp20e"], + "1x400G(4)+4x100G(4)": ["etp20a", "etp20b", "etp20c", "etp20d", "etp20e"] } }, "Ethernet160": { @@ -892,7 +933,9 @@ "1x400G": ["etp21"], "2x400G[200G]": ["etp21a", "etp21b"], "4x200G[100G]": ["etp21a", "etp21b", "etp21c", "etp21d"], - "8x100G[50G]": ["etp21a", "etp21b", "etp21c", "etp21d", "etp21e", "etp21f", "etp21g", "etp21h"] + "8x100G[50G]": ["etp21a", "etp21b", "etp21c", "etp21d", "etp21e", "etp21f", "etp21g", "etp21h"], + "4x100G(4)+1x400G(4)": ["etp21a", "etp21b", "etp21c", "etp21d", "etp21e"], + "1x400G(4)+4x100G(4)": ["etp21a", "etp21b", "etp21c", "etp21d", "etp21e"] } }, "Ethernet168": { @@ -902,7 +945,9 @@ "1x400G": ["etp22"], "2x400G[200G]": ["etp22a", "etp22b"], "4x200G[100G]": ["etp22a", "etp22b", "etp22c", "etp22d"], - "8x100G[50G]": ["etp22a", "etp22b", "etp22c", "etp22d", "etp22e", "etp22f", "etp22g", "etp22h"] + "8x100G[50G]": ["etp22a", "etp22b", "etp22c", "etp22d", "etp22e", "etp22f", "etp22g", "etp22h"], + "4x100G(4)+1x400G(4)": ["etp22a", "etp22b", "etp22c", "etp22d", "etp22e"], + "1x400G(4)+4x100G(4)": ["etp22a", "etp22b", "etp22c", "etp22d", "etp22e"] } }, "Ethernet176": { @@ -912,7 +957,9 @@ "1x400G": ["etp23"], "2x400G[200G]": ["etp23a", "etp23b"], "4x200G[100G]": ["etp23a", "etp23b", "etp23c", "etp23d"], - "8x100G[50G]": ["etp23a", "etp23b", "etp23c", "etp23d", "etp23e", "etp23f", "etp23g", "etp23h"] + "8x100G[50G]": ["etp23a", "etp23b", "etp23c", "etp23d", "etp23e", "etp23f", "etp23g", "etp23h"], + "4x100G(4)+1x400G(4)": ["etp23a", "etp23b", "etp23c", "etp23d", "etp23e"], + "1x400G(4)+4x100G(4)": ["etp23a", "etp23b", "etp23c", "etp23d", "etp23e"] } }, "Ethernet184": { @@ -922,7 +969,9 @@ "1x400G": ["etp24"], "2x400G[200G]": ["etp24a", "etp24b"], "4x200G[100G]": ["etp24a", "etp24b", "etp24c", "etp24d"], - "8x100G[50G]": ["etp24a", "etp24b", "etp24c", "etp24d", "etp24e", "etp24f", "etp24g", "etp24h"] + "8x100G[50G]": ["etp24a", "etp24b", "etp24c", "etp24d", "etp24e", "etp24f", "etp24g", "etp24h"], + "4x100G(4)+1x400G(4)": ["etp24a", "etp24b", "etp24c", "etp24d", "etp24e"], + "1x400G(4)+4x100G(4)": ["etp24a", "etp24b", "etp24c", "etp24d", "etp24e"] } }, "Ethernet192": { @@ -932,7 +981,9 @@ "1x400G": ["etp25"], "2x400G[200G]": ["etp25a", "etp25b"], "4x200G[100G]": ["etp25a", "etp25b", "etp25c", "etp25d"], - "8x100G[50G]": ["etp25a", "etp25b", "etp25c", "etp25d", "etp25e", "etp25f", "etp25g", "etp25h"] + "8x100G[50G]": ["etp25a", "etp25b", "etp25c", "etp25d", "etp25e", "etp25f", "etp25g", "etp25h"], + "4x100G(4)+1x400G(4)": ["etp25a", "etp25b", "etp25c", "etp25d", "etp25e"], + "1x400G(4)+4x100G(4)": ["etp25a", "etp25b", "etp25c", "etp25d", "etp25e"] } }, "Ethernet200": { @@ -942,7 +993,9 @@ "1x400G": ["etp26"], "2x400G[200G]": ["etp26a", "etp26b"], "4x200G[100G]": ["etp26a", "etp26b", "etp26c", "etp26d"], - "8x100G[50G]": ["etp26a", "etp26b", "etp26c", "etp26d", "etp26e", "etp26f", "etp26g", "etp26h"] + "8x100G[50G]": ["etp26a", "etp26b", "etp26c", "etp26d", "etp26e", "etp26f", "etp26g", "etp26h"], + "4x100G(4)+1x400G(4)": ["etp26a", "etp26b", "etp26c", "etp26d", "etp26e"], + "1x400G(4)+4x100G(4)": ["etp26a", "etp26b", "etp26c", "etp26d", "etp26e"] } }, "Ethernet208": { @@ -952,7 +1005,9 @@ "1x400G": ["etp27"], "2x400G[200G]": ["etp27a", "etp27b"], "4x200G[100G]": ["etp27a", "etp27b", "etp27c", "etp27d"], - "8x100G[50G]": ["etp27a", "etp27b", "etp27c", "etp27d", "etp27e", "etp27f", "etp27g", "etp27h"] + "8x100G[50G]": ["etp27a", "etp27b", "etp27c", "etp27d", "etp27e", "etp27f", "etp27g", "etp27h"], + "4x100G(4)+1x400G(4)": ["etp27a", "etp27b", "etp27c", "etp27d", "etp27e"], + "1x400G(4)+4x100G(4)": ["etp27a", "etp27b", "etp27c", "etp27d", "etp27e"] } }, "Ethernet216": { @@ -962,7 +1017,9 @@ "1x400G": ["etp28"], "2x400G[200G]": ["etp28a", "etp28b"], "4x200G[100G]": ["etp28a", "etp28b", "etp28c", "etp28d"], - "8x100G[50G]": ["etp28a", "etp28b", "etp28c", "etp28d", "etp28e", "etp28f", "etp28g", "etp28h"] + "8x100G[50G]": ["etp28a", "etp28b", "etp28c", "etp28d", "etp28e", "etp28f", "etp28g", "etp28h"], + "4x100G(4)+1x400G(4)": ["etp28a", "etp28b", "etp28c", "etp28d", "etp28e"], + "1x400G(4)+4x100G(4)": ["etp28a", "etp28b", "etp28c", "etp28d", "etp28e"] } }, "Ethernet224": { @@ -972,7 +1029,9 @@ "1x400G": ["etp29"], "2x400G[200G]": ["etp29a", "etp29b"], "4x200G[100G]": ["etp29a", "etp29b", "etp29c", "etp29d"], - "8x100G[50G]": ["etp29a", "etp29b", "etp29c", "etp29d", "etp29e", "etp29f", "etp29g", "etp29h"] + "8x100G[50G]": ["etp29a", "etp29b", "etp29c", "etp29d", "etp29e", "etp29f", "etp29g", "etp29h"], + "4x100G(4)+1x400G(4)": ["etp29a", "etp29b", "etp29c", "etp29d", "etp29e"], + "1x400G(4)+4x100G(4)": ["etp29a", "etp29b", "etp29c", "etp29d", "etp29e"] } }, "Ethernet232": { @@ -982,7 +1041,9 @@ "1x400G": ["etp30"], "2x400G[200G]": ["etp30a", "etp30b"], "4x200G[100G]": ["etp30a", "etp30b", "etp30c", "etp30d"], - "8x100G[50G]": ["etp30a", "etp30b", "etp30c", "etp30d", "etp30e", "etp30f", "etp30g", "etp30h"] + "8x100G[50G]": ["etp30a", "etp30b", "etp30c", "etp30d", "etp30e", "etp30f", "etp30g", "etp30h"], + "4x100G(4)+1x400G(4)": ["etp30a", "etp30b", "etp30c", "etp30d", "etp30e"], + "1x400G(4)+4x100G(4)": ["etp30a", "etp30b", "etp30c", "etp30d", "etp30e"] } }, "Ethernet240": { @@ -992,7 +1053,9 @@ "1x400G": ["etp31"], "2x400G[200G]": ["etp31a", "etp31b"], "4x200G[100G]": ["etp31a", "etp31b", "etp31c", "etp31d"], - "8x100G[50G]": ["etp31a", "etp31b", "etp31c", "etp31d", "etp31e", "etp31f", "etp31g", "etp31h"] + "8x100G[50G]": ["etp31a", "etp31b", "etp31c", "etp31d", "etp31e", "etp31f", "etp31g", "etp31h"], + "4x100G(4)+1x400G(4)": ["etp31a", "etp31b", "etp31c", "etp31d", "etp31e"], + "1x400G(4)+4x100G(4)": ["etp31a", "etp31b", "etp31c", "etp31d", "etp31e"] } }, "Ethernet248": { @@ -1002,7 +1065,9 @@ "1x400G": ["etp32"], "2x400G[200G]": ["etp32a", "etp32b"], "4x200G[100G]": ["etp32a", "etp32b", "etp32c", "etp32d"], - "8x100G[50G]": ["etp32a", "etp32b", "etp32c", "etp32d", "etp32e", "etp32f", "etp32g", "etp32h"] + "8x100G[50G]": ["etp32a", "etp32b", "etp32c", "etp32d", "etp32e", "etp32f", "etp32g", "etp32h"], + "4x100G(4)+1x400G(4)": ["etp32a", "etp32b", "etp32c", "etp32d", "etp32e"], + "1x400G(4)+4x100G(4)": ["etp32a", "etp32b", "etp32c", "etp32d", "etp32e"] } }, "Ethernet256": { @@ -1012,7 +1077,9 @@ "1x400G": ["etp33"], "2x400G[200G]": ["etp33a", "etp33b"], "4x200G[100G]": ["etp33a", "etp33b", "etp33c", "etp33d"], - "8x100G[50G]": ["etp33a", "etp33b", "etp33c", "etp33d", "etp33e", "etp33f", "etp33g", "etp33h"] + "8x100G[50G]": ["etp33a", "etp33b", "etp33c", "etp33d", "etp33e", "etp33f", "etp33g", "etp33h"], + "4x100G(4)+1x400G(4)": ["etp33a", "etp33b", "etp33c", "etp33d", "etp33e"], + "1x400G(4)+4x100G(4)": ["etp33a", "etp33b", "etp33c", "etp33d", "etp33e"] } }, "Ethernet264": { @@ -1022,7 +1089,9 @@ "1x400G": ["etp34"], "2x400G[200G]": ["etp34a", "etp34b"], "4x200G[100G]": ["etp34a", "etp34b", "etp34c", "etp34d"], - "8x100G[50G]": ["etp34a", "etp34b", "etp34c", "etp34d", "etp34e", "etp34f", "etp34g", "etp34h"] + "8x100G[50G]": ["etp34a", "etp34b", "etp34c", "etp34d", "etp34e", "etp34f", "etp34g", "etp34h"], + "4x100G(4)+1x400G(4)": ["etp34a", "etp34b", "etp34c", "etp34d", "etp34e"], + "1x400G(4)+4x100G(4)": ["etp34a", "etp34b", "etp34c", "etp34d", "etp34e"] } }, "Ethernet272": { @@ -1032,7 +1101,9 @@ "1x400G": ["etp35"], "2x400G[200G]": ["etp35a", "etp35b"], "4x200G[100G]": ["etp35a", "etp35b", "etp35c", "etp35d"], - "8x100G[50G]": ["etp35a", "etp35b", "etp35c", "etp35d", "etp35e", "etp35f", "etp35g", "etp35h"] + "8x100G[50G]": ["etp35a", "etp35b", "etp35c", "etp35d", "etp35e", "etp35f", "etp35g", "etp35h"], + "4x100G(4)+1x400G(4)": ["etp35a", "etp35b", "etp35c", "etp35d", "etp35e"], + "1x400G(4)+4x100G(4)": ["etp35a", "etp35b", "etp35c", "etp35d", "etp35e"] } }, "Ethernet280": { @@ -1042,7 +1113,9 @@ "1x400G": ["etp36"], "2x400G[200G]": ["etp36a", "etp36b"], "4x200G[100G]": ["etp36a", "etp36b", "etp36c", "etp36d"], - "8x100G[50G]": ["etp36a", "etp36b", "etp36c", "etp36d", "etp36e", "etp36f", "etp36g", "etp36h"] + "8x100G[50G]": ["etp36a", "etp36b", "etp36c", "etp36d", "etp36e", "etp36f", "etp36g", "etp36h"], + "4x100G(4)+1x400G(4)": ["etp36a", "etp36b", "etp36c", "etp36d", "etp36e"], + "1x400G(4)+4x100G(4)": ["etp36a", "etp36b", "etp36c", "etp36d", "etp36e"] } }, "Ethernet288": { @@ -1052,7 +1125,9 @@ "1x400G": ["etp37"], "2x400G[200G]": ["etp37a", "etp37b"], "4x200G[100G]": ["etp37a", "etp37b", "etp37c", "etp37d"], - "8x100G[50G]": ["etp37a", "etp37b", "etp37c", "etp37d", "etp37e", "etp37f", "etp37g", "etp37h"] + "8x100G[50G]": ["etp37a", "etp37b", "etp37c", "etp37d", "etp37e", "etp37f", "etp37g", "etp37h"], + "4x100G(4)+1x400G(4)": ["etp37a", "etp37b", "etp37c", "etp37d", "etp37e"], + "1x400G(4)+4x100G(4)": ["etp37a", "etp37b", "etp37c", "etp37d", "etp37e"] } }, "Ethernet296": { @@ -1062,7 +1137,9 @@ "1x400G": ["etp38"], "2x400G[200G]": ["etp38a", "etp38b"], "4x200G[100G]": ["etp38a", "etp38b", "etp38c", "etp38d"], - "8x100G[50G]": ["etp38a", "etp38b", "etp38c", "etp38d", "etp38e", "etp38f", "etp38g", "etp38h"] + "8x100G[50G]": ["etp38a", "etp38b", "etp38c", "etp38d", "etp38e", "etp38f", "etp38g", "etp38h"], + "4x100G(4)+1x400G(4)": ["etp38a", "etp38b", "etp38c", "etp38d", "etp38e"], + "1x400G(4)+4x100G(4)": ["etp38a", "etp38b", "etp38c", "etp38d", "etp38e"] } }, "Ethernet304": { @@ -1072,7 +1149,9 @@ "1x400G": ["etp39"], "2x400G[200G]": ["etp39a", "etp39b"], "4x200G[100G]": ["etp39a", "etp39b", "etp39c", "etp39d" ], - "8x100G[50G]": ["etp39a", "etp39b", "etp39c", "etp39d", "etp39e", "etp39f", "etp39g", "etp39h"] + "8x100G[50G]": ["etp39a", "etp39b", "etp39c", "etp39d", "etp39e", "etp39f", "etp39g", "etp39h"], + "4x100G(4)+1x400G(4)": ["etp39a", "etp39b", "etp39c", "etp39d", "etp39e"], + "1x400G(4)+4x100G(4)": ["etp39a", "etp39b", "etp39c", "etp39d", "etp39e"] } }, "Ethernet312": { @@ -1082,7 +1161,9 @@ "1x400G": ["etp40"], "2x400G[200G]": ["etp40a", "etp40b"], "4x200G[100G]": ["etp40a", "etp40b", "etp40c", "etp40d"], - "8x100G[50G]": ["etp40a", "etp40b", "etp40c", "etp40d", "etp40e", "etp40f", "etp40g", "etp40h"] + "8x100G[50G]": ["etp40a", "etp40b", "etp40c", "etp40d", "etp40e", "etp40f", "etp40g", "etp40h"], + "4x100G(4)+1x400G(4)": ["etp40a", "etp40b", "etp40c", "etp40d", "etp40e"], + "1x400G(4)+4x100G(4)": ["etp40a", "etp40b", "etp40c", "etp40d", "etp40e"] } }, "Ethernet320": { @@ -1092,7 +1173,9 @@ "1x400G": ["etp41"], "2x400G[200G]": ["etp41a", "etp41b"], "4x200G[100G]": ["etp41a", "etp41b", "etp41c", "etp41d"], - "8x100G[50G]": ["etp41a", "etp41b", "etp41c", "etp41d", "etp41e", "etp41f", "etp41g", "etp41h"] + "8x100G[50G]": ["etp41a", "etp41b", "etp41c", "etp41d", "etp41e", "etp41f", "etp41g", "etp41h"], + "4x100G(4)+1x400G(4)": ["etp41a", "etp41b", "etp41c", "etp41d", "etp41e"], + "1x400G(4)+4x100G(4)": ["etp41a", "etp41b", "etp41c", "etp41d", "etp41e"] } }, "Ethernet328": { @@ -1102,7 +1185,9 @@ "1x400G": ["etp42"], "2x400G[200G]": ["etp42a", "etp42b"], "4x200G[100G]": ["etp42a", "etp42b", "etp42c", "etp42d"], - "8x100G[50G]": ["etp42a", "etp42b", "etp42c", "etp42d", "etp42e", "etp42f", "etp42g", "etp42h"] + "8x100G[50G]": ["etp42a", "etp42b", "etp42c", "etp42d", "etp42e", "etp42f", "etp42g", "etp42h"], + "4x100G(4)+1x400G(4)": ["etp42a", "etp42b", "etp42c", "etp42d", "etp42e"], + "1x400G(4)+4x100G(4)": ["etp42a", "etp42b", "etp42c", "etp42d", "etp42e"] } }, "Ethernet336": { @@ -1112,7 +1197,9 @@ "1x400G": ["etp43"], "2x400G[200G]": ["etp43a", "etp43b"], "4x200G[100G]": ["etp43a", "etp43b", "etp43c", "etp43d"], - "8x100G[50G]": ["etp43a", "etp43b", "etp43c", "etp43d", "etp43e", "etp43f", "etp43g", "etp43h"] + "8x100G[50G]": ["etp43a", "etp43b", "etp43c", "etp43d", "etp43e", "etp43f", "etp43g", "etp43h"], + "4x100G(4)+1x400G(4)": ["etp43a", "etp43b", "etp43c", "etp43d", "etp43e"], + "1x400G(4)+4x100G(4)": ["etp43a", "etp43b", "etp43c", "etp43d", "etp43e"] } }, "Ethernet344": { @@ -1122,7 +1209,9 @@ "1x400G": ["etp44"], "2x400G[200G]": ["etp44a", "etp44b"], "4x200G[100G]": ["etp44a", "etp44b", "etp44c", "etp44d"], - "8x100G[50G]": ["etp44a", "etp44b", "etp44c", "etp44d", "etp44e", "etp44f", "etp44g", "etp44h"] + "8x100G[50G]": ["etp44a", "etp44b", "etp44c", "etp44d", "etp44e", "etp44f", "etp44g", "etp44h"], + "4x100G(4)+1x400G(4)": ["etp44a", "etp44b", "etp44c", "etp44d", "etp44e"], + "1x400G(4)+4x100G(4)": ["etp44a", "etp44b", "etp44c", "etp44d", "etp44e"] } }, "Ethernet352": { @@ -1132,7 +1221,9 @@ "1x400G": ["etp45"], "2x400G[200G]": ["etp45a", "etp45b"], "4x200G[100G]": ["etp45a", "etp45b", "etp45c", "etp45d"], - "8x100G[50G]": ["etp45a", "etp45b", "etp45c", "etp45d", "etp45e", "etp45f", "etp45g", "etp45h"] + "8x100G[50G]": ["etp45a", "etp45b", "etp45c", "etp45d", "etp45e", "etp45f", "etp45g", "etp45h"], + "4x100G(4)+1x400G(4)": ["etp45a", "etp45b", "etp45c", "etp45d", "etp45e"], + "1x400G(4)+4x100G(4)": ["etp45a", "etp45b", "etp45c", "etp45d", "etp45e"] } }, "Ethernet360": { @@ -1142,7 +1233,9 @@ "1x400G": ["etp46"], "2x400G[200G]": ["etp46a", "etp46b"], "4x200G[100G]": ["etp46a", "etp46b", "etp46c", "etp46d"], - "8x100G[50G]": ["etp46a", "etp46b", "etp46c", "etp46d", "etp46e", "etp46f", "etp46g", "etp46h"] + "8x100G[50G]": ["etp46a", "etp46b", "etp46c", "etp46d", "etp46e", "etp46f", "etp46g", "etp46h"], + "4x100G(4)+1x400G(4)": ["etp46a", "etp46b", "etp46c", "etp46d", "etp46e"], + "1x400G(4)+4x100G(4)": ["etp46a", "etp46b", "etp46c", "etp46d", "etp46e"] } }, "Ethernet368": { @@ -1152,7 +1245,9 @@ "1x400G": ["etp47"], "2x400G[200G]": ["etp47a", "etp47b"], "4x200G[100G]": ["etp47a", "etp47b", "etp47c", "etp47d"], - "8x100G[50G]": ["etp47a", "etp47b","etp47c", "etp47d", "etp47e", "etp47f", "etp47g", "etp47h"] + "8x100G[50G]": ["etp47a", "etp47b","etp47c", "etp47d", "etp47e", "etp47f", "etp47g", "etp47h"], + "4x100G(4)+1x400G(4)": ["etp47a", "etp47b","etp47c", "etp47d", "etp47e"], + "1x400G(4)+4x100G(4)": ["etp47a", "etp47b","etp47c", "etp47d", "etp47e"] } }, "Ethernet376": { @@ -1162,7 +1257,9 @@ "1x400G": ["etp48"], "2x400G[200G]": ["etp48a", "etp48b"], "4x200G[100G]": ["etp48a", "etp48b", "etp48c", "etp48d"], - "8x100G[50G]": ["etp48a", "etp48b", "etp48c", "etp48d", "etp48e", "etp48f", "etp48g", "etp48h"] + "8x100G[50G]": ["etp48a", "etp48b", "etp48c", "etp48d", "etp48e", "etp48f", "etp48g", "etp48h"], + "4x100G(4)+1x400G(4)": ["etp48a", "etp48b", "etp48c", "etp48d", "etp48e"], + "1x400G(4)+4x100G(4)": ["etp48a", "etp48b", "etp48c", "etp48d", "etp48e"] } }, "Ethernet384": { @@ -1172,7 +1269,9 @@ "1x400G": ["etp49"], "2x400G[200G]": ["etp49a", "etp49b"], "4x200G[100G]": ["etp49a", "etp49b", "etp49c", "etp49d"], - "8x100G[50G]": ["etp49a", "etp49b", "etp49c", "etp49d", "etp49e", "etp49f", "etp49g", "etp49h"] + "8x100G[50G]": ["etp49a", "etp49b", "etp49c", "etp49d", "etp49e", "etp49f", "etp49g", "etp49h"], + "4x100G(4)+1x400G(4)": ["etp49a", "etp49b", "etp49c", "etp49d", "etp49e"], + "1x400G(4)+4x100G(4)": ["etp49a", "etp49b", "etp49c", "etp49d", "etp49e"] } }, "Ethernet392": { @@ -1182,7 +1281,9 @@ "1x400G": ["etp50"], "2x400G[200G]": ["etp50a", "etp50b"], "4x200G[100G]": ["etp50a", "etp50b", "etp50c", "etp50d"], - "8x100G[50G]": ["etp50a", "etp50b", "etp50c", "etp50d", "etp50e", "etp50f", "etp50g", "etp50h"] + "8x100G[50G]": ["etp50a", "etp50b", "etp50c", "etp50d", "etp50e", "etp50f", "etp50g", "etp50h"], + "4x100G(4)+1x400G(4)": ["etp50a", "etp50b", "etp50c", "etp50d", "etp50e"], + "1x400G(4)+4x100G(4)": ["etp50a", "etp50b", "etp50c", "etp50d", "etp50e"] } }, "Ethernet400": { @@ -1192,7 +1293,9 @@ "1x400G": ["etp51"], "2x400G[200G]": ["etp51a", "etp51b"], "4x200G[100G]": ["etp51a", "etp51b", "etp51c", "etp51d"], - "8x100G[50G]": ["etp51a", "etp51b", "etp51c", "etp51d", "etp51e", "etp51f", "etp51g", "etp51h"] + "8x100G[50G]": ["etp51a", "etp51b", "etp51c", "etp51d", "etp51e", "etp51f", "etp51g", "etp51h"], + "4x100G(4)+1x400G(4)": ["etp51a", "etp51b", "etp51c", "etp51d", "etp51e"], + "1x400G(4)+4x100G(4)": ["etp51a", "etp51b", "etp51c", "etp51d", "etp51e"] } }, "Ethernet408": { @@ -1202,7 +1305,9 @@ "1x400G": ["etp52"], "2x400G[200G]": ["etp52a", "etp52b"], "4x200G[100G]": ["etp52a", "etp52b", "etp52c", "etp52d"], - "8x100G[50G]": ["etp52a", "etp52b", "etp52c", "etp52d", "etp52e", "etp52f", "etp52g", "etp52h"] + "8x100G[50G]": ["etp52a", "etp52b", "etp52c", "etp52d", "etp52e", "etp52f", "etp52g", "etp52h"], + "4x100G(4)+1x400G(4)": ["etp52a", "etp52b", "etp52c", "etp52d", "etp52e"], + "1x400G(4)+4x100G(4)": ["etp52a", "etp52b", "etp52c", "etp52d", "etp52e"] } }, "Ethernet416": { @@ -1212,7 +1317,9 @@ "1x400G": ["etp53"], "2x400G[200G]": ["etp53a", "etp53b"], "4x200G[100G]": ["etp53a", "etp53b", "etp53c", "etp53d"], - "8x100G[50G]": ["etp53a", "etp53b", "etp53c", "etp53d", "etp53e", "etp53f", "etp53g", "etp53h"] + "8x100G[50G]": ["etp53a", "etp53b", "etp53c", "etp53d", "etp53e", "etp53f", "etp53g", "etp53h"], + "4x100G(4)+1x400G(4)": ["etp53a", "etp53b", "etp53c", "etp53d", "etp53e"], + "1x400G(4)+4x100G(4)": ["etp53a", "etp53b", "etp53c", "etp53d", "etp53e"] } }, "Ethernet424": { @@ -1222,7 +1329,9 @@ "1x400G": ["etp54"], "2x400G[200G]": ["etp54a", "etp54b"], "4x200G[100G]": ["etp54a", "etp54b", "etp54c", "etp54d"], - "8x100G[50G]": ["etp54a", "etp54b", "etp54c", "etp54d", "etp54e", "etp54f", "etp54g", "etp54h"] + "8x100G[50G]": ["etp54a", "etp54b", "etp54c", "etp54d", "etp54e", "etp54f", "etp54g", "etp54h"], + "4x100G(4)+1x400G(4)": ["etp54a", "etp54b", "etp54c", "etp54d", "etp54e"], + "1x400G(4)+4x100G(4)": ["etp54a", "etp54b", "etp54c", "etp54d", "etp54e"] } }, "Ethernet432": { @@ -1232,7 +1341,9 @@ "1x400G": ["etp55"], "2x400G[200G]": ["etp55a", "etp55b"], "4x200G[100G]": ["etp55a", "etp55b", "etp55c", "etp55d"], - "8x100G[50G]": ["etp55a", "etp55b", "etp55c", "etp55d", "etp55e", "etp55f", "etp55g", "etp55h"] + "8x100G[50G]": ["etp55a", "etp55b", "etp55c", "etp55d", "etp55e", "etp55f", "etp55g", "etp55h"], + "4x100G(4)+1x400G(4)": ["etp55a", "etp55b", "etp55c", "etp55d", "etp55e"], + "1x400G(4)+4x100G(4)": ["etp55a", "etp55b", "etp55c", "etp55d", "etp55e"] } }, "Ethernet440": { @@ -1242,7 +1353,9 @@ "1x400G": ["etp56"], "2x400G[200G]": ["etp56a", "etp56b"], "4x200G[100G]": ["etp56a", "etp56b", "etp56c", "etp56d"], - "8x100G[50G]": ["etp56a", "etp56b", "etp56c", "etp56d", "etp56e", "etp56f", "etp56g", "etp56h"] + "8x100G[50G]": ["etp56a", "etp56b", "etp56c", "etp56d", "etp56e", "etp56f", "etp56g", "etp56h"], + "4x100G(4)+1x400G(4)": ["etp56a", "etp56b", "etp56c", "etp56d", "etp56e"], + "1x400G(4)+4x100G(4)": ["etp56a", "etp56b", "etp56c", "etp56d", "etp56e"] } }, "Ethernet448": { @@ -1252,7 +1365,9 @@ "1x400G": ["etp57"], "2x400G[200G]": ["etp57a", "etp57b"], "4x200G[100G]": ["etp57a", "etp57b", "etp57c", "etp57d"], - "8x100G[50G]": ["etp57a", "etp57b", "etp57c", "etp57d", "etp57e", "etp57f", "etp57g", "etp57h"] + "8x100G[50G]": ["etp57a", "etp57b", "etp57c", "etp57d", "etp57e", "etp57f", "etp57g", "etp57h"], + "4x100G(4)+1x400G(4)": ["etp57a", "etp57b", "etp57c", "etp57d", "etp57e"], + "1x400G(4)+4x100G(4)": ["etp57a", "etp57b", "etp57c", "etp57d", "etp57e"] } }, "Ethernet456": { @@ -1262,7 +1377,9 @@ "1x400G": ["etp58"], "2x400G[200G]": ["etp58a", "etp58b"], "4x200G[100G]": ["etp58a", "etp58b", "etp58c", "etp58d"], - "8x100G[50G]": ["etp58a", "etp58b", "etp58c", "etp58d", "etp58e", "etp58f", "etp58g", "etp58h"] + "8x100G[50G]": ["etp58a", "etp58b", "etp58c", "etp58d", "etp58e", "etp58f", "etp58g", "etp58h"], + "4x100G(4)+1x400G(4)": ["etp58a", "etp58b", "etp58c", "etp58d", "etp58e"], + "1x400G(4)+4x100G(4)": ["etp58a", "etp58b", "etp58c", "etp58d", "etp58e"] } }, "Ethernet464": { @@ -1272,7 +1389,9 @@ "1x400G": ["etp59"], "2x400G[200G]": ["etp59a", "etp59b"], "4x200G[100G]": ["etp59a", "etp59b", "etp59c", "etp59d"], - "8x100G[50G]": ["etp59a", "etp59b", "etp59c", "etp59d", "etp59e", "etp59f", "etp59g", "etp59h"] + "8x100G[50G]": ["etp59a", "etp59b", "etp59c", "etp59d", "etp59e", "etp59f", "etp59g", "etp59h"], + "4x100G(4)+1x400G(4)": ["etp59a", "etp59b", "etp59c", "etp59d", "etp59e"], + "1x400G(4)+4x100G(4)": ["etp59a", "etp59b", "etp59c", "etp59d", "etp59e"] } }, "Ethernet472": { @@ -1282,7 +1401,9 @@ "1x400G": ["etp60"], "2x400G[200G]": ["etp60a", "etp60b"], "4x200G[100G]": ["etp60a", "etp60b", "etp60c", "etp60d"], - "8x100G[50G]": ["etp60a", "etp60b", "etp60c", "etp60d", "etp60e", "etp60f", "etp60g", "etp60h"] + "8x100G[50G]": ["etp60a", "etp60b", "etp60c", "etp60d", "etp60e", "etp60f", "etp60g", "etp60h"], + "4x100G(4)+1x400G(4)": ["etp60a", "etp60b", "etp60c", "etp60d", "etp60e"], + "1x400G(4)+4x100G(4)": ["etp60a", "etp60b", "etp60c", "etp60d", "etp60e"] } }, "Ethernet480": { @@ -1292,7 +1413,9 @@ "1x400G": ["etp61"], "2x400G[200G]": ["etp61a", "etp61b"], "4x200G[100G]": ["etp61a", "etp61b", "etp61c", "etp61d"], - "8x100G[50G]": ["etp61a", "etp61b", "etp61c", "etp61d", "etp61e", "etp61f", "etp61g", "etp61h"] + "8x100G[50G]": ["etp61a", "etp61b", "etp61c", "etp61d", "etp61e", "etp61f", "etp61g", "etp61h"], + "4x100G(4)+1x400G(4)": ["etp61a", "etp61b", "etp61c", "etp61d", "etp61e"], + "1x400G(4)+4x100G(4)": ["etp61a", "etp61b", "etp61c", "etp61d", "etp61e"] } }, "Ethernet488": { @@ -1302,7 +1425,9 @@ "1x400G": ["etp62"], "2x400G[200G]": ["etp62a", "etp62b"], "4x200G[100G]": ["etp62a", "etp62b", "etp62c", "etp62d"], - "8x100G[50G]": ["etp62a", "etp62b", "etp62c", "etp62d", "etp62e", "etp62f", "etp62g", "etp62h"] + "8x100G[50G]": ["etp62a", "etp62b", "etp62c", "etp62d", "etp62e", "etp62f", "etp62g", "etp62h"], + "4x100G(4)+1x400G(4)": ["etp62a", "etp62b", "etp62c", "etp62d", "etp62e"], + "1x400G(4)+4x100G(4)": ["etp62a", "etp62b", "etp62c", "etp62d", "etp62e"] } }, "Ethernet496": { @@ -1312,7 +1437,9 @@ "1x400G": ["etp63"], "2x400G[200G]": ["etp63a", "etp63b"], "4x200G[100G]": ["etp63a", "etp63b", "etp63c", "etp63d"], - "8x100G[50G]": ["etp63a", "etp63b", "etp63c", "etp63d", "etp63e", "etp63f", "etp63g", "etp63h"] + "8x100G[50G]": ["etp63a", "etp63b", "etp63c", "etp63d", "etp63e", "etp63f", "etp63g", "etp63h"], + "4x100G(4)+1x400G(4)": ["etp63a", "etp63b", "etp63c", "etp63d", "etp63e"], + "1x400G(4)+4x100G(4)": ["etp63a", "etp63b", "etp63c", "etp63d", "etp63e"] } }, "Ethernet504": { @@ -1322,7 +1449,9 @@ "1x400G": ["etp64"], "2x400G[200G]": ["etp64a", "etp64b"], "4x200G[100G]": ["etp64a", "etp64b", "etp64c", "etp64d"], - "8x100G[50G]": ["etp64a", "etp64b", "etp64c", "etp64d", "etp64e", "etp64f", "etp64g", "etp64h"] + "8x100G[50G]": ["etp64a", "etp64b", "etp64c", "etp64d", "etp64e", "etp64f", "etp64g", "etp64h"], + "4x100G(4)+1x400G(4)": ["etp64a", "etp64b", "etp64c", "etp64d", "etp64e"], + "1x400G(4)+4x100G(4)": ["etp64a", "etp64b", "etp64c", "etp64d", "etp64e"] } }, "Ethernet512": { diff --git a/device/mellanox/x86_64-nvidia_sn5640-r0/pmon_daemon_control.json b/device/mellanox/x86_64-nvidia_sn5640-r0/pmon_daemon_control.json index fefdfb32739..7981c6ffe53 100644 --- a/device/mellanox/x86_64-nvidia_sn5640-r0/pmon_daemon_control.json +++ b/device/mellanox/x86_64-nvidia_sn5640-r0/pmon_daemon_control.json @@ -1,6 +1,9 @@ { "skip_ledd": true, "skip_fancontrol": true, - "skip_xcvrd_cmis_mgr": true + "skip_xcvrd_cmis_mgr": true, + "xcvrd": { + "dom_temperature_poll_interval": 20 + } } diff --git a/device/mellanox/x86_64-nvidia_sn5640-r0/system_health_monitoring_config.json b/device/mellanox/x86_64-nvidia_sn5640-r0/system_health_monitoring_config.json deleted file mode 120000 index 98df66c27ca..00000000000 --- a/device/mellanox/x86_64-nvidia_sn5640-r0/system_health_monitoring_config.json +++ /dev/null @@ -1 +0,0 @@ -../x86_64-mlnx_msn2700-r0/system_health_monitoring_config.json \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn5640-r0/system_health_monitoring_config.json b/device/mellanox/x86_64-nvidia_sn5640-r0/system_health_monitoring_config.json new file mode 100644 index 00000000000..4fddaab2305 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5640-r0/system_health_monitoring_config.json @@ -0,0 +1,11 @@ +{ + "services_to_ignore": [], + "devices_to_ignore": ["psu.voltage"], + "user_defined_checkers": [], + "polling_interval": 60, + "led_color": { + "fault": "amber", + "normal": "green", + "booting": "amber_blink" + } +} diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/buffers.json.j2 b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/buffers.json.j2 deleted file mode 120000 index 784bd5c08d1..00000000000 --- a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/buffers.json.j2 +++ /dev/null @@ -1 +0,0 @@ -../../x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D48C8/buffers.json.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/buffers_defaults_objects.j2 b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/buffers_defaults_objects.j2 deleted file mode 120000 index c01aebb7ae1..00000000000 --- a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/buffers_defaults_objects.j2 +++ /dev/null @@ -1 +0,0 @@ -../../x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D48C8/buffers_defaults_objects.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/buffers_defaults_t0.j2 b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/buffers_defaults_t0.j2 deleted file mode 100644 index 517e37b6e05..00000000000 --- a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/buffers_defaults_t0.j2 +++ /dev/null @@ -1,47 +0,0 @@ -{# - Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. - Apache-2.0 - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -#} -{% set default_cable = '40m' %} -{% set ingress_lossless_pool_size = '57828352' %} -{% set ingress_lossless_pool_xoff = '22544384' %} -{% set egress_lossless_pool_size = '136209408' %} -{% set egress_lossy_pool_size = '57828352' %} - -{% import 'buffers_defaults_objects.j2' as defs with context %} - -{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %} -{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }} -{%- endmacro %} - -{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %} -{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }} -{%- endmacro %} - -{%- macro generate_queue_buffers_with_extra_lossless_queues_with_inactive_ports(port_names_active, port_names_extra_queues, port_names_inactive) %} -{{ defs.generate_queue_buffers_with_extra_lossless_queues(port_names_active, port_names_extra_queues, port_names_inactive) }} -{%- endmacro %} - -{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %} -{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }} -{%- endmacro %} - -{%- macro generate_pg_profiles_with_extra_lossless_pgs_with_inactive_ports(port_names_active, port_names_extra_pgs, port_names_inactive) %} -{{ defs.generate_pg_profiles_with_extra_lossless_pgs(port_names_active, port_names_extra_pgs, port_names_inactive) }} -{%- endmacro %} - -{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %} -{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }} -{%- endmacro %} diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/buffers_defaults_t1.j2 b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/buffers_defaults_t1.j2 deleted file mode 100644 index 59dd8cf5564..00000000000 --- a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/buffers_defaults_t1.j2 +++ /dev/null @@ -1,47 +0,0 @@ -{# - Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. - Apache-2.0 - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -#} -{% set default_cable = '300m' %} -{% set ingress_lossless_pool_size = '40002560' %} -{% set ingress_lossless_pool_xoff = '40370176' %} -{% set egress_lossless_pool_size = '136209408' %} -{% set egress_lossy_pool_size = '40002560' %} - -{% import 'buffers_defaults_objects.j2' as defs with context %} - -{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %} -{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }} -{%- endmacro %} - -{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %} -{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }} -{%- endmacro %} - -{%- macro generate_queue_buffers_with_extra_lossless_queues_with_inactive_ports(port_names_active, port_names_extra_queues, port_names_inactive) %} -{{ defs.generate_queue_buffers_with_extra_lossless_queues(port_names_active, port_names_extra_queues, port_names_inactive) }} -{%- endmacro %} - -{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %} -{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }} -{%- endmacro %} - -{%- macro generate_pg_profiles_with_extra_lossless_pgs_with_inactive_ports(port_names_active, port_names_extra_pgs, port_names_inactive) %} -{{ defs.generate_pg_profiles_with_extra_lossless_pgs(port_names_active, port_names_extra_pgs, port_names_inactive) }} -{%- endmacro %} - -{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %} -{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }} -{%- endmacro %} diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/buffers_dynamic.json.j2 b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/buffers_dynamic.json.j2 deleted file mode 100644 index b2cc958b7c4..00000000000 --- a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/buffers_dynamic.json.j2 +++ /dev/null @@ -1,16 +0,0 @@ -{# - Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. - Apache-2.0 - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - http://www.apache.org/licenses/LICENSE-2.0 - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -#} -{%- set default_topo = 't0' %} -{%- set dynamic_mode = 'true' %} -{%- include 'buffers_config.j2' %} diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/pg_profile_lookup.ini b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/pg_profile_lookup.ini deleted file mode 100644 index 33878b38c6c..00000000000 --- a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/pg_profile_lookup.ini +++ /dev/null @@ -1,42 +0,0 @@ -## -## Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. -## Apache-2.0 -## -## Licensed under the Apache License, Version 2.0 (the "License"); -## you may not use this file except in compliance with the License. -## You may obtain a copy of the License at -## -## http://www.apache.org/licenses/LICENSE-2.0 -## -## Unless required by applicable law or agreed to in writing, software -## distributed under the License is distributed on an "AS IS" BASIS, -## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -## See the License for the specific language governing permissions and -## limitations under the License. -## -# PG lossless profiles. -# speed cable size xon xoff threshold -10000 5m 19456 19456 20480 0 -25000 5m 19456 19456 21504 0 -50000 5m 19456 19456 26624 0 -100000 5m 19456 19456 44032 0 -200000 5m 19456 19456 50176 0 -400000 5m 19456 19456 86016 0 -10000 30m 19456 19456 20480 0 -25000 30m 19456 19456 22528 0 -50000 30m 19456 19456 27648 0 -100000 30m 19456 19456 48128 0 -200000 30m 19456 19456 57344 0 -400000 30m 19456 19456 99328 0 -10000 40m 19456 19456 20480 0 -25000 40m 19456 19456 22528 0 -50000 40m 19456 19456 28672 0 -100000 40m 19456 19456 49152 0 -200000 40m 19456 19456 60416 0 -400000 40m 19456 19456 104448 0 -10000 300m 19456 19456 23552 0 -25000 300m 19456 19456 30720 0 -50000 300m 19456 19456 46080 0 -100000 300m 19456 19456 83968 0 -200000 300m 19456 19456 130048 0 -400000 300m 19456 19456 243712 0 diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/port_config.ini b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/port_config.ini deleted file mode 100644 index 640299159ff..00000000000 --- a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/port_config.ini +++ /dev/null @@ -1,532 +0,0 @@ -## -## Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. -## Apache-2.0 -## -## Licensed under the Apache License, Version 2.0 (the "License"); -## you may not use this file except in compliance with the License. -## You may obtain a copy of the License at -## -## http://www.apache.org/licenses/LICENSE-2.0 -## -## Unless required by applicable law or agreed to in writing, software -## distributed under the License is distributed on an "AS IS" BASIS, -## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -## See the License for the specific language governing permissions and -## limitations under the License. -## - -# name lanes alias index -Ethernet0 0 etp1a 1 -Ethernet1 1 etp1b 1 -Ethernet2 2 etp1c 1 -Ethernet3 3 etp1d 1 -Ethernet4 4 etp1e 1 -Ethernet5 5 etp1f 1 -Ethernet6 6 etp1g 1 -Ethernet7 7 etp1h 1 -Ethernet8 8 etp2a 2 -Ethernet9 9 etp2b 2 -Ethernet10 10 etp2c 2 -Ethernet11 11 etp2d 2 -Ethernet12 12 etp2e 2 -Ethernet13 13 etp2f 2 -Ethernet14 14 etp2g 2 -Ethernet15 15 etp2h 2 -Ethernet16 16 etp3a 3 -Ethernet17 17 etp3b 3 -Ethernet18 18 etp3c 3 -Ethernet19 19 etp3d 3 -Ethernet20 20 etp3e 3 -Ethernet21 21 etp3f 3 -Ethernet22 22 etp3g 3 -Ethernet23 23 etp3h 3 -Ethernet24 24 etp4a 4 -Ethernet25 25 etp4b 4 -Ethernet26 26 etp4c 4 -Ethernet27 27 etp4d 4 -Ethernet28 28 etp4e 4 -Ethernet29 29 etp4f 4 -Ethernet30 30 etp4g 4 -Ethernet31 31 etp4h 4 -Ethernet32 32 etp5a 5 -Ethernet33 33 etp5b 5 -Ethernet34 34 etp5c 5 -Ethernet35 35 etp5d 5 -Ethernet36 36 etp5e 5 -Ethernet37 37 etp5f 5 -Ethernet38 38 etp5g 5 -Ethernet39 39 etp5h 5 -Ethernet40 40 etp6a 6 -Ethernet41 41 etp6b 6 -Ethernet42 42 etp6c 6 -Ethernet43 43 etp6d 6 -Ethernet44 44 etp6e 6 -Ethernet45 45 etp6f 6 -Ethernet46 46 etp6g 6 -Ethernet47 47 etp6h 6 -Ethernet48 48 etp7a 7 -Ethernet49 49 etp7b 7 -Ethernet50 50 etp7c 7 -Ethernet51 51 etp7d 7 -Ethernet52 52 etp7e 7 -Ethernet53 53 etp7f 7 -Ethernet54 54 etp7g 7 -Ethernet55 55 etp7h 7 -Ethernet56 56 etp8a 8 -Ethernet57 57 etp8b 8 -Ethernet58 58 etp8c 8 -Ethernet59 59 etp8d 8 -Ethernet60 60 etp8e 8 -Ethernet61 61 etp8f 8 -Ethernet62 62 etp8g 8 -Ethernet63 63 etp8h 8 -Ethernet64 64 etp9a 9 -Ethernet65 65 etp9b 9 -Ethernet66 66 etp9c 9 -Ethernet67 67 etp9d 9 -Ethernet68 68 etp9e 9 -Ethernet69 69 etp9f 9 -Ethernet70 70 etp9g 9 -Ethernet71 71 etp9h 9 -Ethernet72 72 etp10a 10 -Ethernet73 73 etp10b 10 -Ethernet74 74 etp10c 10 -Ethernet75 75 etp10d 10 -Ethernet76 76 etp10e 10 -Ethernet77 77 etp10f 10 -Ethernet78 78 etp10g 10 -Ethernet79 79 etp10h 10 -Ethernet80 80 etp11a 11 -Ethernet81 81 etp11b 11 -Ethernet82 82 etp11c 11 -Ethernet83 83 etp11d 11 -Ethernet84 84 etp11e 11 -Ethernet85 85 etp11f 11 -Ethernet86 86 etp11g 11 -Ethernet87 87 etp11h 11 -Ethernet88 88 etp12a 12 -Ethernet89 89 etp12b 12 -Ethernet90 90 etp12c 12 -Ethernet91 91 etp12d 12 -Ethernet92 92 etp12e 12 -Ethernet93 93 etp12f 12 -Ethernet94 94 etp12g 12 -Ethernet95 95 etp12h 12 -Ethernet96 96 etp13a 13 -Ethernet97 97 etp13b 13 -Ethernet98 98 etp13c 13 -Ethernet99 99 etp13d 13 -Ethernet100 100 etp13e 13 -Ethernet101 101 etp13f 13 -Ethernet102 102 etp13g 13 -Ethernet103 103 etp13h 13 -Ethernet104 104 etp14a 14 -Ethernet105 105 etp14b 14 -Ethernet106 106 etp14c 14 -Ethernet107 107 etp14d 14 -Ethernet108 108 etp14e 14 -Ethernet109 109 etp14f 14 -Ethernet110 110 etp14g 14 -Ethernet111 111 etp14h 14 -Ethernet112 112 etp15a 15 -Ethernet113 113 etp15b 15 -Ethernet114 114 etp15c 15 -Ethernet115 115 etp15d 15 -Ethernet116 116 etp15e 15 -Ethernet117 117 etp15f 15 -Ethernet118 118 etp15g 15 -Ethernet119 119 etp15h 15 -Ethernet120 120 etp16a 16 -Ethernet121 121 etp16b 16 -Ethernet122 122 etp16c 16 -Ethernet123 123 etp16d 16 -Ethernet124 124 etp16e 16 -Ethernet125 125 etp16f 16 -Ethernet126 126 etp16g 16 -Ethernet127 127 etp16h 16 -Ethernet128 128 etp17a 17 -Ethernet129 129 etp17b 17 -Ethernet130 130 etp17c 17 -Ethernet131 131 etp17d 17 -Ethernet132 132 etp17e 17 -Ethernet133 133 etp17f 17 -Ethernet134 134 etp17g 17 -Ethernet135 135 etp17h 17 -Ethernet136 136 etp18a 18 -Ethernet137 137 etp18b 18 -Ethernet138 138 etp18c 18 -Ethernet139 139 etp18d 18 -Ethernet140 140 etp18e 18 -Ethernet141 141 etp18f 18 -Ethernet142 142 etp18g 18 -Ethernet143 143 etp18h 18 -Ethernet144 144 etp19a 19 -Ethernet145 145 etp19b 19 -Ethernet146 146 etp19c 19 -Ethernet147 147 etp19d 19 -Ethernet148 148 etp19e 19 -Ethernet149 149 etp19f 19 -Ethernet150 150 etp19g 19 -Ethernet151 151 etp19h 19 -Ethernet152 152 etp20a 20 -Ethernet153 153 etp20b 20 -Ethernet154 154 etp20c 20 -Ethernet155 155 etp20d 20 -Ethernet156 156 etp20e 20 -Ethernet157 157 etp20f 20 -Ethernet158 158 etp20g 20 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--git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/sai.profile b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/sai.profile deleted file mode 100644 index b31cf264e80..00000000000 --- a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/sai.profile +++ /dev/null @@ -1,2 +0,0 @@ -SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_5640.xml -SAI_KEY_SPC5_LOSSY_SCHEDULING=1 diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/sai_5640.xml b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/sai_5640.xml deleted file mode 100644 index 19f4446c774..00000000000 --- a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/sai_5640.xml +++ /dev/null @@ -1,631 +0,0 @@ - - - - - - - 00:02:03:04:05:00 - - - 0 - - - 66 - - - - - 481 - 8 - 0 - 3 - 1536 - 8 - true - - - 489 - 8 - 1 - 3 - 1536 - 8 - true - - - 505 - 8 - 2 - 3 - 1536 - 8 - true - - - 497 - 8 - 3 - 3 - 1536 - 8 - true - - - 449 - 8 - 4 - 3 - 1536 - 8 - true - - - 457 - 8 - 5 - 3 - 1536 - 8 - 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true - - - 161 - 8 - 55 - 3 - 1536 - 8 - true - - - 209 - 8 - 56 - 3 - 1536 - 8 - true - - - 217 - 8 - 57 - 3 - 1536 - 8 - true - - - 201 - 8 - 58 - 3 - 1536 - 8 - true - - - 193 - 8 - 59 - 3 - 1536 - 8 - true - - - 241 - 8 - 60 - 3 - 1536 - 8 - true - - - 249 - 8 - 61 - 3 - 1536 - 8 - true - - - 233 - 8 - 62 - 3 - 1536 - 8 - true - - - 225 - 8 - 63 - 3 - 1536 - 8 - true - - - 513 - 1 - 64 - 0 - 64 - true - - - 515 - 1 - 65 - 0 - 64 - true - - - - diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/Mellanox-SN5640-C512S2/buffers.json.j2 b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/Mellanox-SN5640-C512S2/buffers.json.j2 new file mode 120000 index 00000000000..95c9abcb498 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/Mellanox-SN5640-C512S2/buffers.json.j2 @@ -0,0 +1 @@ +../../x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512S2/buffers.json.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/Mellanox-SN5640-C512S2/buffers_defaults_objects.j2 b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/Mellanox-SN5640-C512S2/buffers_defaults_objects.j2 new file mode 120000 index 00000000000..b60c382bf33 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/Mellanox-SN5640-C512S2/buffers_defaults_objects.j2 @@ -0,0 +1 @@ +../../x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512S2/buffers_defaults_objects.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/Mellanox-SN5640-C512S2/buffers_defaults_t0.j2 b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/Mellanox-SN5640-C512S2/buffers_defaults_t0.j2 new file mode 120000 index 00000000000..1a34bc4b273 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/Mellanox-SN5640-C512S2/buffers_defaults_t0.j2 @@ -0,0 +1 @@ +../../x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512S2/buffers_defaults_t0.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/Mellanox-SN5640-C512S2/buffers_defaults_t1.j2 b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/Mellanox-SN5640-C512S2/buffers_defaults_t1.j2 new file mode 120000 index 00000000000..5b5d254f5f3 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/Mellanox-SN5640-C512S2/buffers_defaults_t1.j2 @@ -0,0 +1 @@ +../../x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512S2/buffers_defaults_t1.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/Mellanox-SN5640-C512S2/buffers_dynamic.json.j2 b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/Mellanox-SN5640-C512S2/buffers_dynamic.json.j2 new file mode 120000 index 00000000000..19f56502f5c --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/Mellanox-SN5640-C512S2/buffers_dynamic.json.j2 @@ -0,0 +1 @@ +../../x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512S2/buffers_dynamic.json.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/Mellanox-SN5640-C512S2/create_only_config_db_buffers.json b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/Mellanox-SN5640-C512S2/create_only_config_db_buffers.json new file mode 100644 index 00000000000..6feb156714f --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/Mellanox-SN5640-C512S2/create_only_config_db_buffers.json @@ -0,0 +1,7 @@ +{ + "DEVICE_METADATA": { + "localhost": { + "create_only_config_db_buffers": "true" + } + } +} diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/hwsku.json b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/Mellanox-SN5640-C512S2/hwsku.json similarity index 100% rename from device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/hwsku.json rename to device/mellanox/x86_64-nvidia_sn5640_simx-r0/Mellanox-SN5640-C512S2/hwsku.json diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/Mellanox-SN5640-C512S2/pg_profile_lookup.ini b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/Mellanox-SN5640-C512S2/pg_profile_lookup.ini new file mode 120000 index 00000000000..2ab918fcf2b --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/Mellanox-SN5640-C512S2/pg_profile_lookup.ini @@ -0,0 +1 @@ +../../x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512S2/pg_profile_lookup.ini \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/Mellanox-SN5640-C512S2/port_config.ini b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/Mellanox-SN5640-C512S2/port_config.ini new file mode 100644 index 00000000000..d6af98282a6 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/Mellanox-SN5640-C512S2/port_config.ini @@ -0,0 +1,533 @@ +## +## SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +## Copyright (c) 2024-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +## Apache-2.0 +## +## Licensed under the Apache License, Version 2.0 (the "License"); +## you may not use this file except in compliance with the License. +## You may obtain a copy of the License at +## +## http://www.apache.org/licenses/LICENSE-2.0 +## +## Unless required by applicable law or agreed to in writing, software +## distributed under the License is distributed on an "AS IS" BASIS, +## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +## See the License for the specific language governing permissions and +## limitations under the License. +## + +# name lanes alias index +Ethernet0 0 etp1a 1 +Ethernet1 1 etp1b 1 +Ethernet2 2 etp1c 1 +Ethernet3 3 etp1d 1 +Ethernet4 4 etp1e 1 +Ethernet5 5 etp1f 1 +Ethernet6 6 etp1g 1 +Ethernet7 7 etp1h 1 +Ethernet8 8 etp2a 2 +Ethernet9 9 etp2b 2 +Ethernet10 10 etp2c 2 +Ethernet11 11 etp2d 2 +Ethernet12 12 etp2e 2 +Ethernet13 13 etp2f 2 +Ethernet14 14 etp2g 2 +Ethernet15 15 etp2h 2 +Ethernet16 16 etp3a 3 +Ethernet17 17 etp3b 3 +Ethernet18 18 etp3c 3 +Ethernet19 19 etp3d 3 +Ethernet20 20 etp3e 3 +Ethernet21 21 etp3f 3 +Ethernet22 22 etp3g 3 +Ethernet23 23 etp3h 3 +Ethernet24 24 etp4a 4 +Ethernet25 25 etp4b 4 +Ethernet26 26 etp4c 4 +Ethernet27 27 etp4d 4 +Ethernet28 28 etp4e 4 +Ethernet29 29 etp4f 4 +Ethernet30 30 etp4g 4 +Ethernet31 31 etp4h 4 +Ethernet32 32 etp5a 5 +Ethernet33 33 etp5b 5 +Ethernet34 34 etp5c 5 +Ethernet35 35 etp5d 5 +Ethernet36 36 etp5e 5 +Ethernet37 37 etp5f 5 +Ethernet38 38 etp5g 5 +Ethernet39 39 etp5h 5 +Ethernet40 40 etp6a 6 +Ethernet41 41 etp6b 6 +Ethernet42 42 etp6c 6 +Ethernet43 43 etp6d 6 +Ethernet44 44 etp6e 6 +Ethernet45 45 etp6f 6 +Ethernet46 46 etp6g 6 +Ethernet47 47 etp6h 6 +Ethernet48 48 etp7a 7 +Ethernet49 49 etp7b 7 +Ethernet50 50 etp7c 7 +Ethernet51 51 etp7d 7 +Ethernet52 52 etp7e 7 +Ethernet53 53 etp7f 7 +Ethernet54 54 etp7g 7 +Ethernet55 55 etp7h 7 +Ethernet56 56 etp8a 8 +Ethernet57 57 etp8b 8 +Ethernet58 58 etp8c 8 +Ethernet59 59 etp8d 8 +Ethernet60 60 etp8e 8 +Ethernet61 61 etp8f 8 +Ethernet62 62 etp8g 8 +Ethernet63 63 etp8h 8 +Ethernet64 64 etp9a 9 +Ethernet65 65 etp9b 9 +Ethernet66 66 etp9c 9 +Ethernet67 67 etp9d 9 +Ethernet68 68 etp9e 9 +Ethernet69 69 etp9f 9 +Ethernet70 70 etp9g 9 +Ethernet71 71 etp9h 9 +Ethernet72 72 etp10a 10 +Ethernet73 73 etp10b 10 +Ethernet74 74 etp10c 10 +Ethernet75 75 etp10d 10 +Ethernet76 76 etp10e 10 +Ethernet77 77 etp10f 10 +Ethernet78 78 etp10g 10 +Ethernet79 79 etp10h 10 +Ethernet80 80 etp11a 11 +Ethernet81 81 etp11b 11 +Ethernet82 82 etp11c 11 +Ethernet83 83 etp11d 11 +Ethernet84 84 etp11e 11 +Ethernet85 85 etp11f 11 +Ethernet86 86 etp11g 11 +Ethernet87 87 etp11h 11 +Ethernet88 88 etp12a 12 +Ethernet89 89 etp12b 12 +Ethernet90 90 etp12c 12 +Ethernet91 91 etp12d 12 +Ethernet92 92 etp12e 12 +Ethernet93 93 etp12f 12 +Ethernet94 94 etp12g 12 +Ethernet95 95 etp12h 12 +Ethernet96 96 etp13a 13 +Ethernet97 97 etp13b 13 +Ethernet98 98 etp13c 13 +Ethernet99 99 etp13d 13 +Ethernet100 100 etp13e 13 +Ethernet101 101 etp13f 13 +Ethernet102 102 etp13g 13 +Ethernet103 103 etp13h 13 +Ethernet104 104 etp14a 14 +Ethernet105 105 etp14b 14 +Ethernet106 106 etp14c 14 +Ethernet107 107 etp14d 14 +Ethernet108 108 etp14e 14 +Ethernet109 109 etp14f 14 +Ethernet110 110 etp14g 14 +Ethernet111 111 etp14h 14 +Ethernet112 112 etp15a 15 +Ethernet113 113 etp15b 15 +Ethernet114 114 etp15c 15 +Ethernet115 115 etp15d 15 +Ethernet116 116 etp15e 15 +Ethernet117 117 etp15f 15 +Ethernet118 118 etp15g 15 +Ethernet119 119 etp15h 15 +Ethernet120 120 etp16a 16 +Ethernet121 121 etp16b 16 +Ethernet122 122 etp16c 16 +Ethernet123 123 etp16d 16 +Ethernet124 124 etp16e 16 +Ethernet125 125 etp16f 16 +Ethernet126 126 etp16g 16 +Ethernet127 127 etp16h 16 +Ethernet128 128 etp17a 17 +Ethernet129 129 etp17b 17 +Ethernet130 130 etp17c 17 +Ethernet131 131 etp17d 17 +Ethernet132 132 etp17e 17 +Ethernet133 133 etp17f 17 +Ethernet134 134 etp17g 17 +Ethernet135 135 etp17h 17 +Ethernet136 136 etp18a 18 +Ethernet137 137 etp18b 18 +Ethernet138 138 etp18c 18 +Ethernet139 139 etp18d 18 +Ethernet140 140 etp18e 18 +Ethernet141 141 etp18f 18 +Ethernet142 142 etp18g 18 +Ethernet143 143 etp18h 18 +Ethernet144 144 etp19a 19 +Ethernet145 145 etp19b 19 +Ethernet146 146 etp19c 19 +Ethernet147 147 etp19d 19 +Ethernet148 148 etp19e 19 +Ethernet149 149 etp19f 19 +Ethernet150 150 etp19g 19 +Ethernet151 151 etp19h 19 +Ethernet152 152 etp20a 20 +Ethernet153 153 etp20b 20 +Ethernet154 154 etp20c 20 +Ethernet155 155 etp20d 20 +Ethernet156 156 etp20e 20 +Ethernet157 157 etp20f 20 +Ethernet158 158 etp20g 20 +Ethernet159 159 etp20h 20 +Ethernet160 160 etp21a 21 +Ethernet161 161 etp21b 21 +Ethernet162 162 etp21c 21 +Ethernet163 163 etp21d 21 +Ethernet164 164 etp21e 21 +Ethernet165 165 etp21f 21 +Ethernet166 166 etp21g 21 +Ethernet167 167 etp21h 21 +Ethernet168 168 etp22a 22 +Ethernet169 169 etp22b 22 +Ethernet170 170 etp22c 22 +Ethernet171 171 etp22d 22 +Ethernet172 172 etp22e 22 +Ethernet173 173 etp22f 22 +Ethernet174 174 etp22g 22 +Ethernet175 175 etp22h 22 +Ethernet176 176 etp23a 23 +Ethernet177 177 etp23b 23 +Ethernet178 178 etp23c 23 +Ethernet179 179 etp23d 23 +Ethernet180 180 etp23e 23 +Ethernet181 181 etp23f 23 +Ethernet182 182 etp23g 23 +Ethernet183 183 etp23h 23 +Ethernet184 184 etp24a 24 +Ethernet185 185 etp24b 24 +Ethernet186 186 etp24c 24 +Ethernet187 187 etp24d 24 +Ethernet188 188 etp24e 24 +Ethernet189 189 etp24f 24 +Ethernet190 190 etp24g 24 +Ethernet191 191 etp24h 24 +Ethernet192 192 etp25a 25 +Ethernet193 193 etp25b 25 +Ethernet194 194 etp25c 25 +Ethernet195 195 etp25d 25 +Ethernet196 196 etp25e 25 +Ethernet197 197 etp25f 25 +Ethernet198 198 etp25g 25 +Ethernet199 199 etp25h 25 +Ethernet200 200 etp26a 26 +Ethernet201 201 etp26b 26 +Ethernet202 202 etp26c 26 +Ethernet203 203 etp26d 26 +Ethernet204 204 etp26e 26 +Ethernet205 205 etp26f 26 +Ethernet206 206 etp26g 26 +Ethernet207 207 etp26h 26 +Ethernet208 208 etp27a 27 +Ethernet209 209 etp27b 27 +Ethernet210 210 etp27c 27 +Ethernet211 211 etp27d 27 +Ethernet212 212 etp27e 27 +Ethernet213 213 etp27f 27 +Ethernet214 214 etp27g 27 +Ethernet215 215 etp27h 27 +Ethernet216 216 etp28a 28 +Ethernet217 217 etp28b 28 +Ethernet218 218 etp28c 28 +Ethernet219 219 etp28d 28 +Ethernet220 220 etp28e 28 +Ethernet221 221 etp28f 28 +Ethernet222 222 etp28g 28 +Ethernet223 223 etp28h 28 +Ethernet224 224 etp29a 29 +Ethernet225 225 etp29b 29 +Ethernet226 226 etp29c 29 +Ethernet227 227 etp29d 29 +Ethernet228 228 etp29e 29 +Ethernet229 229 etp29f 29 +Ethernet230 230 etp29g 29 +Ethernet231 231 etp29h 29 +Ethernet232 232 etp30a 30 +Ethernet233 233 etp30b 30 +Ethernet234 234 etp30c 30 +Ethernet235 235 etp30d 30 +Ethernet236 236 etp30e 30 +Ethernet237 237 etp30f 30 +Ethernet238 238 etp30g 30 +Ethernet239 239 etp30h 30 +Ethernet240 240 etp31a 31 +Ethernet241 241 etp31b 31 +Ethernet242 242 etp31c 31 +Ethernet243 243 etp31d 31 +Ethernet244 244 etp31e 31 +Ethernet245 245 etp31f 31 +Ethernet246 246 etp31g 31 +Ethernet247 247 etp31h 31 +Ethernet248 248 etp32a 32 +Ethernet249 249 etp32b 32 +Ethernet250 250 etp32c 32 +Ethernet251 251 etp32d 32 +Ethernet252 252 etp32e 32 +Ethernet253 253 etp32f 32 +Ethernet254 254 etp32g 32 +Ethernet255 255 etp32h 32 +Ethernet256 256 etp33a 33 +Ethernet257 257 etp33b 33 +Ethernet258 258 etp33c 33 +Ethernet259 259 etp33d 33 +Ethernet260 260 etp33e 33 +Ethernet261 261 etp33f 33 +Ethernet262 262 etp33g 33 +Ethernet263 263 etp33h 33 +Ethernet264 264 etp34a 34 +Ethernet265 265 etp34b 34 +Ethernet266 266 etp34c 34 +Ethernet267 267 etp34d 34 +Ethernet268 268 etp34e 34 +Ethernet269 269 etp34f 34 +Ethernet270 270 etp34g 34 +Ethernet271 271 etp34h 34 +Ethernet272 272 etp35a 35 +Ethernet273 273 etp35b 35 +Ethernet274 274 etp35c 35 +Ethernet275 275 etp35d 35 +Ethernet276 276 etp35e 35 +Ethernet277 277 etp35f 35 +Ethernet278 278 etp35g 35 +Ethernet279 279 etp35h 35 +Ethernet280 280 etp36a 36 +Ethernet281 281 etp36b 36 +Ethernet282 282 etp36c 36 +Ethernet283 283 etp36d 36 +Ethernet284 284 etp36e 36 +Ethernet285 285 etp36f 36 +Ethernet286 286 etp36g 36 +Ethernet287 287 etp36h 36 +Ethernet288 288 etp37a 37 +Ethernet289 289 etp37b 37 +Ethernet290 290 etp37c 37 +Ethernet291 291 etp37d 37 +Ethernet292 292 etp37e 37 +Ethernet293 293 etp37f 37 +Ethernet294 294 etp37g 37 +Ethernet295 295 etp37h 37 +Ethernet296 296 etp38a 38 +Ethernet297 297 etp38b 38 +Ethernet298 298 etp38c 38 +Ethernet299 299 etp38d 38 +Ethernet300 300 etp38e 38 +Ethernet301 301 etp38f 38 +Ethernet302 302 etp38g 38 +Ethernet303 303 etp38h 38 +Ethernet304 304 etp39a 39 +Ethernet305 305 etp39b 39 +Ethernet306 306 etp39c 39 +Ethernet307 307 etp39d 39 +Ethernet308 308 etp39e 39 +Ethernet309 309 etp39f 39 +Ethernet310 310 etp39g 39 +Ethernet311 311 etp39h 39 +Ethernet312 312 etp40a 40 +Ethernet313 313 etp40b 40 +Ethernet314 314 etp40c 40 +Ethernet315 315 etp40d 40 +Ethernet316 316 etp40e 40 +Ethernet317 317 etp40f 40 +Ethernet318 318 etp40g 40 +Ethernet319 319 etp40h 40 +Ethernet320 320 etp41a 41 +Ethernet321 321 etp41b 41 +Ethernet322 322 etp41c 41 +Ethernet323 323 etp41d 41 +Ethernet324 324 etp41e 41 +Ethernet325 325 etp41f 41 +Ethernet326 326 etp41g 41 +Ethernet327 327 etp41h 41 +Ethernet328 328 etp42a 42 +Ethernet329 329 etp42b 42 +Ethernet330 330 etp42c 42 +Ethernet331 331 etp42d 42 +Ethernet332 332 etp42e 42 +Ethernet333 333 etp42f 42 +Ethernet334 334 etp42g 42 +Ethernet335 335 etp42h 42 +Ethernet336 336 etp43a 43 +Ethernet337 337 etp43b 43 +Ethernet338 338 etp43c 43 +Ethernet339 339 etp43d 43 +Ethernet340 340 etp43e 43 +Ethernet341 341 etp43f 43 +Ethernet342 342 etp43g 43 +Ethernet343 343 etp43h 43 +Ethernet344 344 etp44a 44 +Ethernet345 345 etp44b 44 +Ethernet346 346 etp44c 44 +Ethernet347 347 etp44d 44 +Ethernet348 348 etp44e 44 +Ethernet349 349 etp44f 44 +Ethernet350 350 etp44g 44 +Ethernet351 351 etp44h 44 +Ethernet352 352 etp45a 45 +Ethernet353 353 etp45b 45 +Ethernet354 354 etp45c 45 +Ethernet355 355 etp45d 45 +Ethernet356 356 etp45e 45 +Ethernet357 357 etp45f 45 +Ethernet358 358 etp45g 45 +Ethernet359 359 etp45h 45 +Ethernet360 360 etp46a 46 +Ethernet361 361 etp46b 46 +Ethernet362 362 etp46c 46 +Ethernet363 363 etp46d 46 +Ethernet364 364 etp46e 46 +Ethernet365 365 etp46f 46 +Ethernet366 366 etp46g 46 +Ethernet367 367 etp46h 46 +Ethernet368 368 etp47a 47 +Ethernet369 369 etp47b 47 +Ethernet370 370 etp47c 47 +Ethernet371 371 etp47d 47 +Ethernet372 372 etp47e 47 +Ethernet373 373 etp47f 47 +Ethernet374 374 etp47g 47 +Ethernet375 375 etp47h 47 +Ethernet376 376 etp48a 48 +Ethernet377 377 etp48b 48 +Ethernet378 378 etp48c 48 +Ethernet379 379 etp48d 48 +Ethernet380 380 etp48e 48 +Ethernet381 381 etp48f 48 +Ethernet382 382 etp48g 48 +Ethernet383 383 etp48h 48 +Ethernet384 384 etp49a 49 +Ethernet385 385 etp49b 49 +Ethernet386 386 etp49c 49 +Ethernet387 387 etp49d 49 +Ethernet388 388 etp49e 49 +Ethernet389 389 etp49f 49 +Ethernet390 390 etp49g 49 +Ethernet391 391 etp49h 49 +Ethernet392 392 etp50a 50 +Ethernet393 393 etp50b 50 +Ethernet394 394 etp50c 50 +Ethernet395 395 etp50d 50 +Ethernet396 396 etp50e 50 +Ethernet397 397 etp50f 50 +Ethernet398 398 etp50g 50 +Ethernet399 399 etp50h 50 +Ethernet400 400 etp51a 51 +Ethernet401 401 etp51b 51 +Ethernet402 402 etp51c 51 +Ethernet403 403 etp51d 51 +Ethernet404 404 etp51e 51 +Ethernet405 405 etp51f 51 +Ethernet406 406 etp51g 51 +Ethernet407 407 etp51h 51 +Ethernet408 408 etp52a 52 +Ethernet409 409 etp52b 52 +Ethernet410 410 etp52c 52 +Ethernet411 411 etp52d 52 +Ethernet412 412 etp52e 52 +Ethernet413 413 etp52f 52 +Ethernet414 414 etp52g 52 +Ethernet415 415 etp52h 52 +Ethernet416 416 etp53a 53 +Ethernet417 417 etp53b 53 +Ethernet418 418 etp53c 53 +Ethernet419 419 etp53d 53 +Ethernet420 420 etp53e 53 +Ethernet421 421 etp53f 53 +Ethernet422 422 etp53g 53 +Ethernet423 423 etp53h 53 +Ethernet424 424 etp54a 54 +Ethernet425 425 etp54b 54 +Ethernet426 426 etp54c 54 +Ethernet427 427 etp54d 54 +Ethernet428 428 etp54e 54 +Ethernet429 429 etp54f 54 +Ethernet430 430 etp54g 54 +Ethernet431 431 etp54h 54 +Ethernet432 432 etp55a 55 +Ethernet433 433 etp55b 55 +Ethernet434 434 etp55c 55 +Ethernet435 435 etp55d 55 +Ethernet436 436 etp55e 55 +Ethernet437 437 etp55f 55 +Ethernet438 438 etp55g 55 +Ethernet439 439 etp55h 55 +Ethernet440 440 etp56a 56 +Ethernet441 441 etp56b 56 +Ethernet442 442 etp56c 56 +Ethernet443 443 etp56d 56 +Ethernet444 444 etp56e 56 +Ethernet445 445 etp56f 56 +Ethernet446 446 etp56g 56 +Ethernet447 447 etp56h 56 +Ethernet448 448 etp57a 57 +Ethernet449 449 etp57b 57 +Ethernet450 450 etp57c 57 +Ethernet451 451 etp57d 57 +Ethernet452 452 etp57e 57 +Ethernet453 453 etp57f 57 +Ethernet454 454 etp57g 57 +Ethernet455 455 etp57h 57 +Ethernet456 456 etp58a 58 +Ethernet457 457 etp58b 58 +Ethernet458 458 etp58c 58 +Ethernet459 459 etp58d 58 +Ethernet460 460 etp58e 58 +Ethernet461 461 etp58f 58 +Ethernet462 462 etp58g 58 +Ethernet463 463 etp58h 58 +Ethernet464 464 etp59a 59 +Ethernet465 465 etp59b 59 +Ethernet466 466 etp59c 59 +Ethernet467 467 etp59d 59 +Ethernet468 468 etp59e 59 +Ethernet469 469 etp59f 59 +Ethernet470 470 etp59g 59 +Ethernet471 471 etp59h 59 +Ethernet472 472 etp60a 60 +Ethernet473 473 etp60b 60 +Ethernet474 474 etp60c 60 +Ethernet475 475 etp60d 60 +Ethernet476 476 etp60e 60 +Ethernet477 477 etp60f 60 +Ethernet478 478 etp60g 60 +Ethernet479 479 etp60h 60 +Ethernet480 480 etp61a 61 +Ethernet481 481 etp61b 61 +Ethernet482 482 etp61c 61 +Ethernet483 483 etp61d 61 +Ethernet484 484 etp61e 61 +Ethernet485 485 etp61f 61 +Ethernet486 486 etp61g 61 +Ethernet487 487 etp61h 61 +Ethernet488 488 etp62a 62 +Ethernet489 489 etp62b 62 +Ethernet490 490 etp62c 62 +Ethernet491 491 etp62d 62 +Ethernet492 492 etp62e 62 +Ethernet493 493 etp62f 62 +Ethernet494 494 etp62g 62 +Ethernet495 495 etp62h 62 +Ethernet496 496 etp63a 63 +Ethernet497 497 etp63b 63 +Ethernet498 498 etp63c 63 +Ethernet499 499 etp63d 63 +Ethernet500 500 etp63e 63 +Ethernet501 501 etp63f 63 +Ethernet502 502 etp63g 63 +Ethernet503 503 etp63h 63 +Ethernet504 504 etp64a 64 +Ethernet505 505 etp64b 64 +Ethernet506 506 etp64c 64 +Ethernet507 507 etp64d 64 +Ethernet508 508 etp64e 64 +Ethernet509 509 etp64f 64 +Ethernet510 510 etp64g 64 +Ethernet511 511 etp64h 64 +Ethernet512 512 etp65 65 +Ethernet520 520 etp66 66 diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/Mellanox-SN5640-C512S2/qos.json.j2 b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/Mellanox-SN5640-C512S2/qos.json.j2 new file mode 120000 index 00000000000..462ffcd7e1f --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/Mellanox-SN5640-C512S2/qos.json.j2 @@ -0,0 +1 @@ +../../x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/qos.json.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/Mellanox-SN5640-C512S2/sai.profile b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/Mellanox-SN5640-C512S2/sai.profile new file mode 100644 index 00000000000..9654a4242e2 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/Mellanox-SN5640-C512S2/sai.profile @@ -0,0 +1,7 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_5640_512x100g.xml +SAI_KEY_SPC5_LOSSY_SCHEDULING=1 +#SAI_INDEPENDENT_MODULE_MODE=1 +SAI_KEY_DISABLE_PORT_ALPHA=1 +SAI_DROP_OVER_MAX_KEY_LIST=1,66 +SAI_DROP_OVER_MAX_VALUE_LIST=307200 +SAI_KEY_INGRESS_PG_XOFF_STAT_LOSSY_HR_ENABLED=1 diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/Mellanox-SN5640-C512S2/sai_5640_512x100g.xml b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/Mellanox-SN5640-C512S2/sai_5640_512x100g.xml new file mode 100644 index 00000000000..1056298cd5d --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/Mellanox-SN5640-C512S2/sai_5640_512x100g.xml @@ -0,0 +1,631 @@ + + + + + + + 00:02:03:04:05:00 + + + 0 + + + 66 + + + + + 481 + 8 + 0 + 3 + 1536 + 8 + true + + + 489 + 8 + 1 + 3 + 1536 + 8 + true + + + 505 + 8 + 2 + 3 + 1536 + 8 + true + + + 497 + 8 + 3 + 3 + 1536 + 8 + true + + + 449 + 8 + 4 + 3 + 1536 + 8 + true + + + 457 + 8 + 5 + 3 + 1536 + 8 + true + + + 473 + 8 + 6 + 3 + 1536 + 8 + true + + + 465 + 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+ 56 + 3 + 1536 + 8 + true + + + 217 + 8 + 57 + 3 + 1536 + 8 + true + + + 201 + 8 + 58 + 3 + 1536 + 8 + true + + + 193 + 8 + 59 + 3 + 1536 + 8 + true + + + 241 + 8 + 60 + 3 + 1536 + 8 + true + + + 249 + 8 + 61 + 3 + 1536 + 8 + true + + + 233 + 8 + 62 + 3 + 1536 + 8 + true + + + 225 + 8 + 63 + 3 + 1536 + 8 + true + + + 513 + 1 + 64 + 0 + 64 + true + + + 515 + 1 + 65 + 0 + 64 + true + + + + diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/supporting_bulk_counter_groups b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/Mellanox-SN5640-C512S2/supporting_bulk_counter_groups similarity index 100% rename from device/mellanox/x86_64-nvidia_sn5640_simx-r0/ACS-SN5640/supporting_bulk_counter_groups rename to device/mellanox/x86_64-nvidia_sn5640_simx-r0/Mellanox-SN5640-C512S2/supporting_bulk_counter_groups diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/Mellanox-SN5640-C512S2/traffic_config.j2 b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/Mellanox-SN5640-C512S2/traffic_config.j2 new file mode 120000 index 00000000000..459b2cd345e --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/Mellanox-SN5640-C512S2/traffic_config.j2 @@ -0,0 +1 @@ +../../x86_64-nvidia_sn5640-r0/Mellanox-SN5640-C512S2/traffic_config.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/create_only_config_db_buffers.json b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/create_only_config_db_buffers.json new file mode 120000 index 00000000000..87e12387fcd --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/create_only_config_db_buffers.json @@ -0,0 +1 @@ +../x86_64-mlnx_msn2700-r0/create_only_config_db_buffers.json \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/default_sku b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/default_sku index 2d1695dc3a9..1492363d1cf 100644 --- a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/default_sku +++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/default_sku @@ -1 +1 @@ -ACS-SN5640 t1 +Mellanox-SN5640-C512S2 t1 diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/platform.json b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/platform.json index 7300d35de2d..c0f4e63ab19 100644 --- a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/platform.json +++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/platform.json @@ -1,6 +1,6 @@ { "chassis": { - "name": "SN5640_SIMX", + "name": "SN5640", "components": [ { "name": "ONIE" @@ -138,7 +138,8 @@ ], "thermals": [ { - "name": "ASIC" + "name": "ASIC", + "polling_interval": 3 }, { "name": "Ambient Fan Side Temp" diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/system_health_monitoring_config.json b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/system_health_monitoring_config.json deleted file mode 120000 index 98df66c27ca..00000000000 --- a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/system_health_monitoring_config.json +++ /dev/null @@ -1 +0,0 @@ -../x86_64-mlnx_msn2700-r0/system_health_monitoring_config.json \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn5640_simx-r0/system_health_monitoring_config.json b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/system_health_monitoring_config.json new file mode 100644 index 00000000000..4fddaab2305 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn5640_simx-r0/system_health_monitoring_config.json @@ -0,0 +1,11 @@ +{ + "services_to_ignore": [], + "devices_to_ignore": ["psu.voltage"], + "user_defined_checkers": [], + "polling_interval": 60, + "led_color": { + "fault": "amber", + "normal": "green", + "booting": "amber_blink" + } +} diff --git a/device/mellanox/x86_64-nvidia_sn6600_ld-r0/ACS-SN6600_LD/pmon_daemon_control.json b/device/mellanox/x86_64-nvidia_sn6600_ld-r0/ACS-SN6600_LD/pmon_daemon_control.json new file mode 100644 index 00000000000..5888a1cd838 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn6600_ld-r0/ACS-SN6600_LD/pmon_daemon_control.json @@ -0,0 +1,11 @@ +{ + "skip_ledd": true, + "skip_xcvrd_cmis_mgr": true, + "thermalctld": { + "enable_liquid_cooling": true, + "liquid_cooling_update_interval": 0.5 + }, + "xcvrd": { + "dom_temperature_poll_interval": 20 + } +} diff --git a/device/mellanox/x86_64-nvidia_sn6600_ld-r0/ACS-SN6600_LD/port_config.ini b/device/mellanox/x86_64-nvidia_sn6600_ld-r0/ACS-SN6600_LD/port_config.ini index 6cd473f446c..37217b1ff00 100644 --- a/device/mellanox/x86_64-nvidia_sn6600_ld-r0/ACS-SN6600_LD/port_config.ini +++ b/device/mellanox/x86_64-nvidia_sn6600_ld-r0/ACS-SN6600_LD/port_config.ini @@ -144,5 +144,5 @@ Ethernet496 496,497,498,499 etp63a 63 400000 Ethernet500 500,501,502,503 etp63b 63 400000 Ethernet504 504,505,506,507 etp64a 64 400000 Ethernet508 508,509,510,511 etp64b 64 400000 -Ethernet514 514 etp65a 65 100000 -Ethernet515 515 etp65b 65 100000 +Ethernet512 512 etp65a 65 100000 +Ethernet513 513 etp65b 65 100000 diff --git a/device/mellanox/x86_64-nvidia_sn6600_ld-r0/ACS-SN6600_LD/sai_6600.xml b/device/mellanox/x86_64-nvidia_sn6600_ld-r0/ACS-SN6600_LD/sai_6600.xml index c187c91b94e..cd42126bcc0 100644 --- a/device/mellanox/x86_64-nvidia_sn6600_ld-r0/ACS-SN6600_LD/sai_6600.xml +++ b/device/mellanox/x86_64-nvidia_sn6600_ld-r0/ACS-SN6600_LD/sai_6600.xml @@ -18,7 +18,7 @@ --> - + 00:02:03:04:05:00 @@ -26,534 +26,5 @@ 1 - - 65 - - - - - 481 - 8 - 0 - - 7 - - 1536 - 8 - - - 489 - 8 - 1 - 7 - 1536 - 8 - - - 505 - 8 - 2 - 7 - 1536 - 8 - - - 497 - 8 - 3 - 7 - 1536 - 8 - - - 449 - 8 - 4 - 7 - 1536 - 8 - - - 457 - 8 - 5 - 7 - 1536 - 8 - - - 473 - 8 - 6 - 7 - 1536 - 8 - - - 465 - 8 - 7 - 7 - 1536 - 8 - - - 417 - 8 - 8 - 7 - 1536 - 8 - - - 425 - 8 - 9 - 7 - 1536 - 8 - - - 441 - 8 - 10 - 7 - 1536 - 8 - - - 433 - 8 - 11 - 7 - 1536 - 8 - - - 385 - 8 - 12 - 7 - 1536 - 8 - - - 393 - 8 - 13 - 7 - 1536 - 8 - - - 409 - 8 - 14 - 7 - 1536 - 8 - - - 401 - 8 - 15 - 7 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b/device/mellanox/x86_64-nvidia_sn6600_ld-r0/Mellanox-SN6600_LD-P128C2/buffers.json.j2 @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/buffers.json.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn6600_ld-r0/Mellanox-SN6600_LD-P128C2/buffers_defaults_objects.j2 b/device/mellanox/x86_64-nvidia_sn6600_ld-r0/Mellanox-SN6600_LD-P128C2/buffers_defaults_objects.j2 new file mode 120000 index 00000000000..e404fb0aae1 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn6600_ld-r0/Mellanox-SN6600_LD-P128C2/buffers_defaults_objects.j2 @@ -0,0 +1 @@ +../../x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/buffers_defaults_objects.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn6600_ld-r0/Mellanox-SN6600_LD-P128C2/buffers_defaults_t0.j2 b/device/mellanox/x86_64-nvidia_sn6600_ld-r0/Mellanox-SN6600_LD-P128C2/buffers_defaults_t0.j2 new file mode 100644 index 00000000000..786396f8bd1 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn6600_ld-r0/Mellanox-SN6600_LD-P128C2/buffers_defaults_t0.j2 @@ -0,0 +1,54 @@ +{# + SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES + Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + Apache-2.0 + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +#} +{% set default_cable = '0m' %} +{%-set ports2cable = { + 'torrouter_server' : '0m', + 'leafrouter_torrouter' : '0m', + 'spinerouter_leafrouter' : '0m' + } +-%} +{% set ingress_lossless_pool_size = '214429696' %} +{% set ingress_lossless_pool_xoff = '0' %} +{% set egress_lossless_pool_size = '224143360' %} +{% set egress_lossy_pool_size = '214429696' %} + +{% import 'buffers_defaults_objects.j2' as defs with context %} + +{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %} +{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_queue_buffers_with_extra_lossless_queues_with_inactive_ports(port_names_active, port_names_extra_queues, port_names_inactive) %} +{{ defs.generate_queue_buffers_with_extra_lossless_queues(port_names_active, port_names_extra_queues, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_pg_profiles_with_extra_lossless_pgs_with_inactive_ports(port_names_active, port_names_extra_pgs, port_names_inactive) %} +{{ defs.generate_pg_profiles_with_extra_lossless_pgs(port_names_active, port_names_extra_pgs, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }} +{%- endmacro %} diff --git a/device/mellanox/x86_64-nvidia_sn6600_ld-r0/Mellanox-SN6600_LD-P128C2/buffers_defaults_t1.j2 b/device/mellanox/x86_64-nvidia_sn6600_ld-r0/Mellanox-SN6600_LD-P128C2/buffers_defaults_t1.j2 new file mode 100644 index 00000000000..786396f8bd1 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn6600_ld-r0/Mellanox-SN6600_LD-P128C2/buffers_defaults_t1.j2 @@ -0,0 +1,54 @@ +{# + SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES + Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + Apache-2.0 + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +#} +{% set default_cable = '0m' %} +{%-set ports2cable = { + 'torrouter_server' : '0m', + 'leafrouter_torrouter' : '0m', + 'spinerouter_leafrouter' : '0m' + } +-%} +{% set ingress_lossless_pool_size = '214429696' %} +{% set ingress_lossless_pool_xoff = '0' %} +{% set egress_lossless_pool_size = '224143360' %} +{% set egress_lossy_pool_size = '214429696' %} + +{% import 'buffers_defaults_objects.j2' as defs with context %} + +{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %} +{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_queue_buffers_with_extra_lossless_queues_with_inactive_ports(port_names_active, port_names_extra_queues, port_names_inactive) %} +{{ defs.generate_queue_buffers_with_extra_lossless_queues(port_names_active, port_names_extra_queues, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_pg_profiles_with_extra_lossless_pgs_with_inactive_ports(port_names_active, port_names_extra_pgs, port_names_inactive) %} +{{ defs.generate_pg_profiles_with_extra_lossless_pgs(port_names_active, port_names_extra_pgs, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }} +{%- endmacro %} diff --git a/device/mellanox/x86_64-nvidia_sn6600_ld-r0/Mellanox-SN6600_LD-P128C2/buffers_dynamic.json.j2 b/device/mellanox/x86_64-nvidia_sn6600_ld-r0/Mellanox-SN6600_LD-P128C2/buffers_dynamic.json.j2 new file mode 120000 index 00000000000..8c4117c6621 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn6600_ld-r0/Mellanox-SN6600_LD-P128C2/buffers_dynamic.json.j2 @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/buffers_dynamic.json.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn6600_ld-r0/Mellanox-SN6600_LD-P128C2/create_only_config_db_buffers.json b/device/mellanox/x86_64-nvidia_sn6600_ld-r0/Mellanox-SN6600_LD-P128C2/create_only_config_db_buffers.json new file mode 100644 index 00000000000..6feb156714f --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn6600_ld-r0/Mellanox-SN6600_LD-P128C2/create_only_config_db_buffers.json @@ -0,0 +1,7 @@ +{ + "DEVICE_METADATA": { + "localhost": { + "create_only_config_db_buffers": "true" + } + } +} diff --git a/device/mellanox/x86_64-nvidia_sn6600_ld-r0/Mellanox-SN6600_LD-P128C2/hwsku.json b/device/mellanox/x86_64-nvidia_sn6600_ld-r0/Mellanox-SN6600_LD-P128C2/hwsku.json new file mode 100644 index 00000000000..afd780782d1 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn6600_ld-r0/Mellanox-SN6600_LD-P128C2/hwsku.json @@ -0,0 +1,394 @@ +{ + "interfaces": { + "Ethernet0": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet4": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet8": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet12": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet16": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet20": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet24": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet28": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet32": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet36": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet40": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet44": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet48": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet52": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet56": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet60": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet64": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet68": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet72": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet76": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet80": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet84": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet88": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet92": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet96": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet100": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet104": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet108": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet112": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet116": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet120": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet124": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet128": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet132": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet136": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet140": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet144": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet148": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet152": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet156": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet160": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet164": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet168": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet172": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet176": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet180": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet184": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet188": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet192": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet196": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet200": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet204": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet208": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet212": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet216": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet220": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet224": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet228": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet232": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet236": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet240": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet244": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet248": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet252": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet256": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet260": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet264": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet268": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet272": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet276": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet280": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet284": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet288": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet292": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet296": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet300": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet304": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet308": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet312": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet316": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet320": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet324": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet328": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet332": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet336": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet340": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet344": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet348": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet352": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet356": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet360": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet364": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet368": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet372": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet376": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet380": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet384": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet388": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet392": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet396": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet400": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet404": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet408": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet412": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet416": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet420": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet424": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet428": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet432": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet436": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet440": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet444": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet448": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet452": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet456": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet460": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet464": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet468": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet472": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet476": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet480": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet484": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet488": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet492": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet496": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet500": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet504": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet508": { + "default_brkout_mode": "2x800G[400G]" + }, + "Ethernet512": { + "default_brkout_mode": "2x100G" + }, + "Ethernet513": { + "default_brkout_mode": "2x100G" + } + } +} diff --git a/device/mellanox/x86_64-nvidia_sn6600_ld-r0/Mellanox-SN6600_LD-P128C2/media_settings.json b/device/mellanox/x86_64-nvidia_sn6600_ld-r0/Mellanox-SN6600_LD-P128C2/media_settings.json new file mode 100644 index 00000000000..6c6cb1904cb --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn6600_ld-r0/Mellanox-SN6600_LD-P128C2/media_settings.json @@ -0,0 +1,756 @@ +{ + "GLOBAL_MEDIA_SETTINGS": { + "1-64": { + "NVIDIA-980-9IAU(9-00XM0H|I-00XM0[REMB])": { + "speed:200GAUI-1": { + "tx_precoding": { + "lane0": "0x00000001", + "lane1": "0x00000001", + "lane2": "0x00000001", + "lane3": "0x00000001", + "lane4": "0x00000001", + "lane5": "0x00000001", + "lane6": "0x00000001", + "lane7": "0x00000001" + }, + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "main": { + "lane0": "0x0000003f", + "lane1": "0x0000003f", + "lane2": "0x0000003f", + "lane3": "0x0000003f", + "lane4": "0x0000003f", + "lane5": "0x0000003f", + "lane6": "0x0000003f", + "lane7": "0x0000003f" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + }, + "speed:400GAUI-2": { + "tx_precoding": { + "lane0": "0x00000001", + "lane1": "0x00000001", + "lane2": "0x00000001", + "lane3": "0x00000001", + "lane4": "0x00000001", + "lane5": "0x00000001", + "lane6": "0x00000001", + "lane7": "0x00000001" + }, + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "main": { + "lane0": "0x0000003f", + "lane1": "0x0000003f", + "lane2": "0x0000003f", + "lane3": "0x0000003f", + "lane4": "0x0000003f", + "lane5": "0x0000003f", + "lane6": "0x0000003f", + "lane7": "0x0000003f" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + }, + "speed:800GAUI-4": { + "tx_precoding": { + "lane0": "0x00000001", + "lane1": "0x00000001", + "lane2": "0x00000001", + "lane3": "0x00000001", + "lane4": "0x00000001", + "lane5": "0x00000001", + "lane6": "0x00000001", + "lane7": "0x00000001" + }, + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre1": { + "lane0": "0x00000000", + "lane1": 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"0x0000003f", + "lane1": "0x0000003f", + "lane2": "0x0000003f", + "lane3": "0x0000003f", + "lane4": "0x0000003f", + "lane5": "0x0000003f", + "lane6": "0x0000003f", + "lane7": "0x0000003f" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + }, + "speed:1.6TAUI-8": { + "tx_precoding": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "main": { + "lane0": "0x0000003f", + "lane1": "0x0000003f", + "lane2": "0x0000003f", + "lane3": "0x0000003f", + "lane4": "0x0000003f", + "lane5": "0x0000003f", + "lane6": "0x0000003f", + "lane7": "0x0000003f" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + } + } + } +} diff --git a/device/mellanox/x86_64-nvidia_sn6600_ld-r0/Mellanox-SN6600_LD-P128C2/optics_si_settings.json b/device/mellanox/x86_64-nvidia_sn6600_ld-r0/Mellanox-SN6600_LD-P128C2/optics_si_settings.json new file mode 100644 index 00000000000..c537e35509c --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn6600_ld-r0/Mellanox-SN6600_LD-P128C2/optics_si_settings.json @@ -0,0 +1,142 @@ +{ + "GLOBAL_MEDIA_SETTINGS": { + "1-64": { + "200G_SPEED": { + "Default": { + "OutputEqPreCursorTargetRx": { + "OutputEqPreCursorTargetRx1": 0, + "OutputEqPreCursorTargetRx2": 0, + "OutputEqPreCursorTargetRx3": 0, + "OutputEqPreCursorTargetRx4": 0, + "OutputEqPreCursorTargetRx5": 0, + "OutputEqPreCursorTargetRx6": 0, + "OutputEqPreCursorTargetRx7": 0, + "OutputEqPreCursorTargetRx8": 0 + }, + "OutputEqPostCursorTargetRx": { + "OutputEqPostCursorTargetRx1": 0, + "OutputEqPostCursorTargetRx2": 0, + "OutputEqPostCursorTargetRx3": 0, + "OutputEqPostCursorTargetRx4": 0, + "OutputEqPostCursorTargetRx5": 0, + "OutputEqPostCursorTargetRx6": 0, + "OutputEqPostCursorTargetRx7": 0, + "OutputEqPostCursorTargetRx8": 0 + }, + "OutputAmplitudeTargetRx": { + "OutputAmplitudeTargetRx1": 0, + "OutputAmplitudeTargetRx2": 0, + "OutputAmplitudeTargetRx3": 0, + "OutputAmplitudeTargetRx4": 0, + "OutputAmplitudeTargetRx5": 0, + "OutputAmplitudeTargetRx6": 0, + "OutputAmplitudeTargetRx7": 0, + "OutputAmplitudeTargetRx8": 0 + } + } + }, + "100G_SPEED": { + "Default": { + "OutputEqPreCursorTargetRx": { + "OutputEqPreCursorTargetRx1": 0, + "OutputEqPreCursorTargetRx2": 0, + "OutputEqPreCursorTargetRx3": 0, + "OutputEqPreCursorTargetRx4": 0, + "OutputEqPreCursorTargetRx5": 0, + "OutputEqPreCursorTargetRx6": 0, + "OutputEqPreCursorTargetRx7": 0, + "OutputEqPreCursorTargetRx8": 0 + }, + "OutputEqPostCursorTargetRx": { + "OutputEqPostCursorTargetRx1": 0, + "OutputEqPostCursorTargetRx2": 0, + "OutputEqPostCursorTargetRx3": 0, + "OutputEqPostCursorTargetRx4": 0, + "OutputEqPostCursorTargetRx5": 0, + "OutputEqPostCursorTargetRx6": 0, + "OutputEqPostCursorTargetRx7": 0, + "OutputEqPostCursorTargetRx8": 0 + }, + "OutputAmplitudeTargetRx": { + "OutputAmplitudeTargetRx1": 0, + "OutputAmplitudeTargetRx2": 0, + "OutputAmplitudeTargetRx3": 0, + "OutputAmplitudeTargetRx4": 0, + "OutputAmplitudeTargetRx5": 0, + "OutputAmplitudeTargetRx6": 0, + "OutputAmplitudeTargetRx7": 0, + "OutputAmplitudeTargetRx8": 0 + } + } + }, + "50G_SPEED": { + "Default": { + "OutputEqPreCursorTargetRx": { + "OutputEqPreCursorTargetRx1": 0, + "OutputEqPreCursorTargetRx2": 0, + "OutputEqPreCursorTargetRx3": 0, + "OutputEqPreCursorTargetRx4": 0, + "OutputEqPreCursorTargetRx5": 0, + "OutputEqPreCursorTargetRx6": 0, + "OutputEqPreCursorTargetRx7": 0, + "OutputEqPreCursorTargetRx8": 0 + }, + "OutputEqPostCursorTargetRx": { + "OutputEqPostCursorTargetRx1": 0, + "OutputEqPostCursorTargetRx2": 0, + "OutputEqPostCursorTargetRx3": 0, + "OutputEqPostCursorTargetRx4": 0, + "OutputEqPostCursorTargetRx5": 0, + "OutputEqPostCursorTargetRx6": 0, + "OutputEqPostCursorTargetRx7": 0, + "OutputEqPostCursorTargetRx8": 0 + }, + "OutputAmplitudeTargetRx": { + "OutputAmplitudeTargetRx1": 0, + "OutputAmplitudeTargetRx2": 0, + "OutputAmplitudeTargetRx3": 0, + "OutputAmplitudeTargetRx4": 0, + "OutputAmplitudeTargetRx5": 0, + "OutputAmplitudeTargetRx6": 0, + "OutputAmplitudeTargetRx7": 0, + "OutputAmplitudeTargetRx8": 0 + } + } + }, + "25G_SPEED": { + "Default": { + "OutputEqPreCursorTargetRx": { + "OutputEqPreCursorTargetRx1": 0, + "OutputEqPreCursorTargetRx2": 0, + "OutputEqPreCursorTargetRx3": 0, + "OutputEqPreCursorTargetRx4": 0, + "OutputEqPreCursorTargetRx5": 0, + "OutputEqPreCursorTargetRx6": 0, + "OutputEqPreCursorTargetRx7": 0, + "OutputEqPreCursorTargetRx8": 0 + }, + "OutputEqPostCursorTargetRx": { + "OutputEqPostCursorTargetRx1": 0, + "OutputEqPostCursorTargetRx2": 0, + "OutputEqPostCursorTargetRx3": 0, + "OutputEqPostCursorTargetRx4": 0, + "OutputEqPostCursorTargetRx5": 0, + "OutputEqPostCursorTargetRx6": 0, + "OutputEqPostCursorTargetRx7": 0, + "OutputEqPostCursorTargetRx8": 0 + }, + "OutputAmplitudeTargetRx": { + "OutputAmplitudeTargetRx1": 0, + "OutputAmplitudeTargetRx2": 0, + "OutputAmplitudeTargetRx3": 0, + "OutputAmplitudeTargetRx4": 0, + "OutputAmplitudeTargetRx5": 0, + "OutputAmplitudeTargetRx6": 0, + "OutputAmplitudeTargetRx7": 0, + "OutputAmplitudeTargetRx8": 0 + } + } + } + } + } +} \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn6600_ld-r0/Mellanox-SN6600_LD-P128C2/pg_profile_lookup.ini b/device/mellanox/x86_64-nvidia_sn6600_ld-r0/Mellanox-SN6600_LD-P128C2/pg_profile_lookup.ini new file mode 100644 index 00000000000..c34e27910d4 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn6600_ld-r0/Mellanox-SN6600_LD-P128C2/pg_profile_lookup.ini @@ -0,0 +1,33 @@ +## +## SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +## Copyright (c) 2025-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +## Apache-2.0 +## +## Licensed under the Apache License, Version 2.0 (the "License"); +## you may not use this file except in compliance with the License. +## You may obtain a copy of the License at +## +## http://www.apache.org/licenses/LICENSE-2.0 +## +## Unless required by applicable law or agreed to in writing, software +## distributed under the License is distributed on an "AS IS" BASIS, +## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +## See the License for the specific language governing permissions and +## limitations under the License. +## +# PG lossless profiles. +# speed cable size xon xoff threshold + 10000 5m 63488 43008 20480 0 + 25000 5m 64512 43008 21504 0 + 100000 5m 87040 43008 44032 0 + 200000 5m 91136 43008 48128 0 + 400000 5m 124928 43008 81920 0 + 800000 5m 190464 43008 147456 0 + 100000 40m 91136 43008 48128 0 + 200000 40m 101376 43008 58368 0 + 400000 40m 144384 43008 101376 0 + 800000 40m 229376 43008 186368 0 + 100000 300m 128000 43008 84992 0 + 200000 300m 173056 43008 130048 0 + 400000 300m 287744 43008 244736 0 + 800000 300m 516096 43008 473088 0 diff --git a/device/mellanox/x86_64-nvidia_sn6600_ld-r0/Mellanox-SN6600_LD-P128C2/port_config.ini b/device/mellanox/x86_64-nvidia_sn6600_ld-r0/Mellanox-SN6600_LD-P128C2/port_config.ini new file mode 100644 index 00000000000..90fa05e5815 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn6600_ld-r0/Mellanox-SN6600_LD-P128C2/port_config.ini @@ -0,0 +1,148 @@ +## +## SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +## Copyright (c) 2025-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +## Apache-2.0 +## +## Licensed under the Apache License, Version 2.0 (the "License"); +## you may not use this file except in compliance with the License. +## You may obtain a copy of the License at +## +## http://www.apache.org/licenses/LICENSE-2.0 +## +## Unless required by applicable law or agreed to in writing, software +## distributed under the License is distributed on an "AS IS" BASIS, +## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +## See the License for the specific language governing permissions and +## limitations under the License. +## +# name lanes alias index speed +Ethernet0 0,1,2,3 etp1a 1 800000 +Ethernet4 4,5,6,7 etp1b 1 800000 +Ethernet8 8,9,10,11 etp2a 2 800000 +Ethernet12 12,13,14,15 etp2b 2 800000 +Ethernet16 16,17,18,19 etp3a 3 800000 +Ethernet20 20,21,22,23 etp3b 3 800000 +Ethernet24 24,25,26,27 etp4a 4 800000 +Ethernet28 28,29,30,31 etp4b 4 800000 +Ethernet32 32,33,34,35 etp5a 5 800000 +Ethernet36 36,37,38,39 etp5b 5 800000 +Ethernet40 40,41,42,43 etp6a 6 800000 +Ethernet44 44,45,46,47 etp6b 6 800000 +Ethernet48 48,49,50,51 etp7a 7 800000 +Ethernet52 52,53,54,55 etp7b 7 800000 +Ethernet56 56,57,58,59 etp8a 8 800000 +Ethernet60 60,61,62,63 etp8b 8 800000 +Ethernet64 64,65,66,67 etp9a 9 800000 +Ethernet68 68,69,70,71 etp9b 9 800000 +Ethernet72 72,73,74,75 etp10a 10 800000 +Ethernet76 76,77,78,79 etp10b 10 800000 +Ethernet80 80,81,82,83 etp11a 11 800000 +Ethernet84 84,85,86,87 etp11b 11 800000 +Ethernet88 88,89,90,91 etp12a 12 800000 +Ethernet92 92,93,94,95 etp12b 12 800000 +Ethernet96 96,97,98,99 etp13a 13 800000 +Ethernet100 100,101,102,103 etp13b 13 800000 +Ethernet104 104,105,106,107 etp14a 14 800000 +Ethernet108 108,109,110,111 etp14b 14 800000 +Ethernet112 112,113,114,115 etp15a 15 800000 +Ethernet116 116,117,118,119 etp15b 15 800000 +Ethernet120 120,121,122,123 etp16a 16 800000 +Ethernet124 124,125,126,127 etp16b 16 800000 +Ethernet128 128,129,130,131 etp17a 17 800000 +Ethernet132 132,133,134,135 etp17b 17 800000 +Ethernet136 136,137,138,139 etp18a 18 800000 +Ethernet140 140,141,142,143 etp18b 18 800000 +Ethernet144 144,145,146,147 etp19a 19 800000 +Ethernet148 148,149,150,151 etp19b 19 800000 +Ethernet152 152,153,154,155 etp20a 20 800000 +Ethernet156 156,157,158,159 etp20b 20 800000 +Ethernet160 160,161,162,163 etp21a 21 800000 +Ethernet164 164,165,166,167 etp21b 21 800000 +Ethernet168 168,169,170,171 etp22a 22 800000 +Ethernet172 172,173,174,175 etp22b 22 800000 +Ethernet176 176,177,178,179 etp23a 23 800000 +Ethernet180 180,181,182,183 etp23b 23 800000 +Ethernet184 184,185,186,187 etp24a 24 800000 +Ethernet188 188,189,190,191 etp24b 24 800000 +Ethernet192 192,193,194,195 etp25a 25 800000 +Ethernet196 196,197,198,199 etp25b 25 800000 +Ethernet200 200,201,202,203 etp26a 26 800000 +Ethernet204 204,205,206,207 etp26b 26 800000 +Ethernet208 208,209,210,211 etp27a 27 800000 +Ethernet212 212,213,214,215 etp27b 27 800000 +Ethernet216 216,217,218,219 etp28a 28 800000 +Ethernet220 220,221,222,223 etp28b 28 800000 +Ethernet224 224,225,226,227 etp29a 29 800000 +Ethernet228 228,229,230,231 etp29b 29 800000 +Ethernet232 232,233,234,235 etp30a 30 800000 +Ethernet236 236,237,238,239 etp30b 30 800000 +Ethernet240 240,241,242,243 etp31a 31 800000 +Ethernet244 244,245,246,247 etp31b 31 800000 +Ethernet248 248,249,250,251 etp32a 32 800000 +Ethernet252 252,253,254,255 etp32b 32 800000 +Ethernet256 256,257,258,259 etp33a 33 800000 +Ethernet260 260,261,262,263 etp33b 33 800000 +Ethernet264 264,265,266,267 etp34a 34 800000 +Ethernet268 268,269,270,271 etp34b 34 800000 +Ethernet272 272,273,274,275 etp35a 35 800000 +Ethernet276 276,277,278,279 etp35b 35 800000 +Ethernet280 280,281,282,283 etp36a 36 800000 +Ethernet284 284,285,286,287 etp36b 36 800000 +Ethernet288 288,289,290,291 etp37a 37 800000 +Ethernet292 292,293,294,295 etp37b 37 800000 +Ethernet296 296,297,298,299 etp38a 38 800000 +Ethernet300 300,301,302,303 etp38b 38 800000 +Ethernet304 304,305,306,307 etp39a 39 800000 +Ethernet308 308,309,310,311 etp39b 39 800000 +Ethernet312 312,313,314,315 etp40a 40 800000 +Ethernet316 316,317,318,319 etp40b 40 800000 +Ethernet320 320,321,322,323 etp41a 41 800000 +Ethernet324 324,325,326,327 etp41b 41 800000 +Ethernet328 328,329,330,331 etp42a 42 800000 +Ethernet332 332,333,334,335 etp42b 42 800000 +Ethernet336 336,337,338,339 etp43a 43 800000 +Ethernet340 340,341,342,343 etp43b 43 800000 +Ethernet344 344,345,346,347 etp44a 44 800000 +Ethernet348 348,349,350,351 etp44b 44 800000 +Ethernet352 352,353,354,355 etp45a 45 800000 +Ethernet356 356,357,358,359 etp45b 45 800000 +Ethernet360 360,361,362,363 etp46a 46 800000 +Ethernet364 364,365,366,367 etp46b 46 800000 +Ethernet368 368,369,370,371 etp47a 47 800000 +Ethernet372 372,373,374,375 etp47b 47 800000 +Ethernet376 376,377,378,379 etp48a 48 800000 +Ethernet380 380,381,382,383 etp48b 48 800000 +Ethernet384 384,385,386,387 etp49a 49 800000 +Ethernet388 388,389,390,391 etp49b 49 800000 +Ethernet392 392,393,394,395 etp50a 50 800000 +Ethernet396 396,397,398,399 etp50b 50 800000 +Ethernet400 400,401,402,403 etp51a 51 800000 +Ethernet404 404,405,406,407 etp51b 51 800000 +Ethernet408 408,409,410,411 etp52a 52 800000 +Ethernet412 412,413,414,415 etp52b 52 800000 +Ethernet416 416,417,418,419 etp53a 53 800000 +Ethernet420 420,421,422,423 etp53b 53 800000 +Ethernet424 424,425,426,427 etp54a 54 800000 +Ethernet428 428,429,430,431 etp54b 54 800000 +Ethernet432 432,433,434,435 etp55a 55 800000 +Ethernet436 436,437,438,439 etp55b 55 800000 +Ethernet440 440,441,442,443 etp56a 56 800000 +Ethernet444 444,445,446,447 etp56b 56 800000 +Ethernet448 448,449,450,451 etp57a 57 800000 +Ethernet452 452,453,454,455 etp57b 57 800000 +Ethernet456 456,457,458,459 etp58a 58 800000 +Ethernet460 460,461,462,463 etp58b 58 800000 +Ethernet464 464,465,466,467 etp59a 59 800000 +Ethernet468 468,469,470,471 etp59b 59 800000 +Ethernet472 472,473,474,475 etp60a 60 800000 +Ethernet476 476,477,478,479 etp60b 60 800000 +Ethernet480 480,481,482,483 etp61a 61 800000 +Ethernet484 484,485,486,487 etp61b 61 800000 +Ethernet488 488,489,490,491 etp62a 62 800000 +Ethernet492 492,493,494,495 etp62b 62 800000 +Ethernet496 496,497,498,499 etp63a 63 800000 +Ethernet500 500,501,502,503 etp63b 63 800000 +Ethernet504 504,505,506,507 etp64a 64 800000 +Ethernet508 508,509,510,511 etp64b 64 800000 +Ethernet512 512 etp65a 65 100000 +Ethernet513 513 etp65b 65 100000 diff --git a/device/mellanox/x86_64-nvidia_sn6600_ld-r0/Mellanox-SN6600_LD-P128C2/qos.json.j2 b/device/mellanox/x86_64-nvidia_sn6600_ld-r0/Mellanox-SN6600_LD-P128C2/qos.json.j2 new file mode 120000 index 00000000000..462ffcd7e1f --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn6600_ld-r0/Mellanox-SN6600_LD-P128C2/qos.json.j2 @@ -0,0 +1 @@ +../../x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/qos.json.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn6600_ld-r0/Mellanox-SN6600_LD-P128C2/sai.profile b/device/mellanox/x86_64-nvidia_sn6600_ld-r0/Mellanox-SN6600_LD-P128C2/sai.profile new file mode 100644 index 00000000000..fdaefb53b50 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn6600_ld-r0/Mellanox-SN6600_LD-P128C2/sai.profile @@ -0,0 +1,5 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_6601_128x800g.xml +SAI_KEY_DISABLE_PORT_ALPHA=1 +SAI_KEY_INGRESS_PG_XOFF_STAT_LOSSY_HR_ENABLED=1 +SAI_KEY_TX_SQUELCH_MODE=2 +SAI_INDEPENDENT_MODULE_MODE=1 diff --git a/device/mellanox/x86_64-nvidia_sn6600_ld-r0/Mellanox-SN6600_LD-P128C2/sai_6601_128x800g.xml b/device/mellanox/x86_64-nvidia_sn6600_ld-r0/Mellanox-SN6600_LD-P128C2/sai_6601_128x800g.xml new file mode 100644 index 00000000000..56d969d9b21 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn6600_ld-r0/Mellanox-SN6600_LD-P128C2/sai_6601_128x800g.xml @@ -0,0 +1,29 @@ + + + + + + + 00:02:03:04:05:00 + + + 0 + + + diff --git a/device/mellanox/x86_64-nvidia_sn6600_ld-r0/Mellanox-SN6600_LD-P128C2/traffic_config.j2 b/device/mellanox/x86_64-nvidia_sn6600_ld-r0/Mellanox-SN6600_LD-P128C2/traffic_config.j2 new file mode 100644 index 00000000000..52a7e1e117a --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn6600_ld-r0/Mellanox-SN6600_LD-P128C2/traffic_config.j2 @@ -0,0 +1,18 @@ +{# + SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES + Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + Apache-2.0 + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + http://www.apache.org/licenses/LICENSE-2.0 + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +#} + +{%- set traffic_classification_enable = true %} + +{% set wred_threshold_limit = 224140416 %} diff --git a/device/mellanox/x86_64-nvidia_sn6600_ld-r0/Mellanox-SN6600_LD-P64O128C2/buffers.json.j2 b/device/mellanox/x86_64-nvidia_sn6600_ld-r0/Mellanox-SN6600_LD-P64O128C2/buffers.json.j2 new file mode 120000 index 00000000000..add8bf8bb7c --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn6600_ld-r0/Mellanox-SN6600_LD-P64O128C2/buffers.json.j2 @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/buffers.json.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn6600_ld-r0/Mellanox-SN6600_LD-P64O128C2/buffers_defaults_objects.j2 b/device/mellanox/x86_64-nvidia_sn6600_ld-r0/Mellanox-SN6600_LD-P64O128C2/buffers_defaults_objects.j2 new file mode 120000 index 00000000000..e404fb0aae1 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn6600_ld-r0/Mellanox-SN6600_LD-P64O128C2/buffers_defaults_objects.j2 @@ -0,0 +1 @@ +../../x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/buffers_defaults_objects.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn6600_ld-r0/Mellanox-SN6600_LD-P64O128C2/buffers_defaults_t0.j2 b/device/mellanox/x86_64-nvidia_sn6600_ld-r0/Mellanox-SN6600_LD-P64O128C2/buffers_defaults_t0.j2 new file mode 100644 index 00000000000..a8f942fa603 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn6600_ld-r0/Mellanox-SN6600_LD-P64O128C2/buffers_defaults_t0.j2 @@ -0,0 +1,54 @@ +{# + SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES + Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + Apache-2.0 + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +#} +{% set default_cable = '0m' %} +{%-set ports2cable = { + 'torrouter_server' : '0m', + 'leafrouter_torrouter' : '0m', + 'spinerouter_leafrouter' : '0m' + } +-%} +{% set ingress_lossless_pool_size = '209776640' %} +{% set ingress_lossless_pool_xoff = '0' %} +{% set egress_lossless_pool_size = '224143360' %} +{% set egress_lossy_pool_size = '209776640' %} + +{% import 'buffers_defaults_objects.j2' as defs with context %} + +{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %} +{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_queue_buffers_with_extra_lossless_queues_with_inactive_ports(port_names_active, port_names_extra_queues, port_names_inactive) %} +{{ defs.generate_queue_buffers_with_extra_lossless_queues(port_names_active, port_names_extra_queues, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_pg_profiles_with_extra_lossless_pgs_with_inactive_ports(port_names_active, port_names_extra_pgs, port_names_inactive) %} +{{ defs.generate_pg_profiles_with_extra_lossless_pgs(port_names_active, port_names_extra_pgs, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }} +{%- endmacro %} diff --git a/device/mellanox/x86_64-nvidia_sn6600_ld-r0/Mellanox-SN6600_LD-P64O128C2/buffers_defaults_t1.j2 b/device/mellanox/x86_64-nvidia_sn6600_ld-r0/Mellanox-SN6600_LD-P64O128C2/buffers_defaults_t1.j2 new file mode 100644 index 00000000000..a8f942fa603 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn6600_ld-r0/Mellanox-SN6600_LD-P64O128C2/buffers_defaults_t1.j2 @@ -0,0 +1,54 @@ +{# + SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES + Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + Apache-2.0 + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +#} +{% set default_cable = '0m' %} +{%-set ports2cable = { + 'torrouter_server' : '0m', + 'leafrouter_torrouter' : '0m', + 'spinerouter_leafrouter' : '0m' + } +-%} +{% set ingress_lossless_pool_size = '209776640' %} +{% set ingress_lossless_pool_xoff = '0' %} +{% set egress_lossless_pool_size = '224143360' %} +{% set egress_lossy_pool_size = '209776640' %} + +{% import 'buffers_defaults_objects.j2' as defs with context %} + +{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %} +{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_queue_buffers_with_extra_lossless_queues_with_inactive_ports(port_names_active, port_names_extra_queues, port_names_inactive) %} +{{ defs.generate_queue_buffers_with_extra_lossless_queues(port_names_active, port_names_extra_queues, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_pg_profiles_with_extra_lossless_pgs_with_inactive_ports(port_names_active, port_names_extra_pgs, port_names_inactive) %} +{{ defs.generate_pg_profiles_with_extra_lossless_pgs(port_names_active, port_names_extra_pgs, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }} +{%- endmacro %} diff --git a/device/mellanox/x86_64-nvidia_sn6600_ld-r0/Mellanox-SN6600_LD-P64O128C2/buffers_dynamic.json.j2 b/device/mellanox/x86_64-nvidia_sn6600_ld-r0/Mellanox-SN6600_LD-P64O128C2/buffers_dynamic.json.j2 new file mode 120000 index 00000000000..8c4117c6621 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn6600_ld-r0/Mellanox-SN6600_LD-P64O128C2/buffers_dynamic.json.j2 @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/buffers_dynamic.json.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn6600_ld-r0/Mellanox-SN6600_LD-P64O128C2/create_only_config_db_buffers.json b/device/mellanox/x86_64-nvidia_sn6600_ld-r0/Mellanox-SN6600_LD-P64O128C2/create_only_config_db_buffers.json new file mode 100644 index 00000000000..6feb156714f --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn6600_ld-r0/Mellanox-SN6600_LD-P64O128C2/create_only_config_db_buffers.json @@ -0,0 +1,7 @@ +{ + "DEVICE_METADATA": { + "localhost": { + "create_only_config_db_buffers": "true" + } + } +} diff --git a/device/mellanox/x86_64-nvidia_sn6600_ld-r0/Mellanox-SN6600_LD-P64O128C2/hwsku.json b/device/mellanox/x86_64-nvidia_sn6600_ld-r0/Mellanox-SN6600_LD-P64O128C2/hwsku.json new file mode 100644 index 00000000000..f931dce36c8 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn6600_ld-r0/Mellanox-SN6600_LD-P64O128C2/hwsku.json @@ -0,0 +1,972 @@ +{ + "interfaces": { + "Ethernet0": { + "default_brkout_mode": "2x400G[200G](4)+1x800G[400G](4)", + "subport": "1", + "autoneg": "off" + }, + "Ethernet2": { + "default_brkout_mode": "2x400G[200G](4)+1x800G[400G](4)", + "subport": "2", + "autoneg": "off" + }, + "Ethernet4": { + "default_brkout_mode": "2x400G[200G](4)+1x800G[400G](4)", + "subport": "3", + "autoneg": "off" + }, + "Ethernet8": { + "default_brkout_mode": "2x400G[200G](4)+1x800G[400G](4)", + "subport": "1", + "autoneg": "off" + }, + "Ethernet10": { + "default_brkout_mode": "2x400G[200G](4)+1x800G[400G](4)", + "subport": "2", + "autoneg": "off" + }, + "Ethernet12": { + "default_brkout_mode": "2x400G[200G](4)+1x800G[400G](4)", + "subport": "3", + "autoneg": "off" + }, + "Ethernet16": { + "default_brkout_mode": "2x400G[200G](4)+1x800G[400G](4)", + "subport": "1", + "autoneg": "off" + }, + "Ethernet18": { + "default_brkout_mode": "2x400G[200G](4)+1x800G[400G](4)", + "subport": "2", + "autoneg": "off" + }, + "Ethernet20": { + "default_brkout_mode": "2x400G[200G](4)+1x800G[400G](4)", + "subport": "3", + "autoneg": "off" + }, + "Ethernet24": { + "default_brkout_mode": "2x400G[200G](4)+1x800G[400G](4)", + "subport": "1", + "autoneg": "off" + }, + "Ethernet26": { + "default_brkout_mode": "2x400G[200G](4)+1x800G[400G](4)", + "subport": "2", + "autoneg": "off" + }, + "Ethernet28": { + "default_brkout_mode": "2x400G[200G](4)+1x800G[400G](4)", + "subport": "3", + "autoneg": "off" + }, + "Ethernet32": { + "default_brkout_mode": "2x400G[200G](4)+1x800G[400G](4)", + "subport": "1", + "autoneg": "off" + }, + "Ethernet34": { + "default_brkout_mode": "2x400G[200G](4)+1x800G[400G](4)", + "subport": "2", + "autoneg": "off" + }, + "Ethernet36": { + "default_brkout_mode": "2x400G[200G](4)+1x800G[400G](4)", + "subport": "3", + "autoneg": "off" + }, + "Ethernet40": { + "default_brkout_mode": "2x400G[200G](4)+1x800G[400G](4)", + "subport": "1", + "autoneg": "off" + }, + "Ethernet42": { + "default_brkout_mode": "2x400G[200G](4)+1x800G[400G](4)", + "subport": "2", + "autoneg": "off" + }, + "Ethernet44": { + "default_brkout_mode": "2x400G[200G](4)+1x800G[400G](4)", + "subport": "3", + "autoneg": "off" + }, + "Ethernet48": { + "default_brkout_mode": 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"2x400G[200G](4)+1x800G[400G](4)", + "subport": "1", + "autoneg": "off" + }, + "Ethernet330": { + "default_brkout_mode": "2x400G[200G](4)+1x800G[400G](4)", + "subport": "2", + "autoneg": "off" + }, + "Ethernet332": { + "default_brkout_mode": "2x400G[200G](4)+1x800G[400G](4)", + "subport": "3", + "autoneg": "off" + }, + "Ethernet336": { + "default_brkout_mode": "2x400G[200G](4)+1x800G[400G](4)", + "subport": "1", + "autoneg": "off" + }, + "Ethernet338": { + "default_brkout_mode": "2x400G[200G](4)+1x800G[400G](4)", + "subport": "2", + "autoneg": "off" + }, + "Ethernet340": { + "default_brkout_mode": "2x400G[200G](4)+1x800G[400G](4)", + "subport": "3", + "autoneg": "off" + }, + "Ethernet344": { + "default_brkout_mode": "2x400G[200G](4)+1x800G[400G](4)", + "subport": "1", + "autoneg": "off" + }, + "Ethernet346": { + "default_brkout_mode": "2x400G[200G](4)+1x800G[400G](4)", + "subport": "2", + "autoneg": "off" + }, + "Ethernet348": { + "default_brkout_mode": "2x400G[200G](4)+1x800G[400G](4)", + "subport": "3", + "autoneg": "off" + }, + "Ethernet352": { + "default_brkout_mode": "2x400G[200G](4)+1x800G[400G](4)", + "subport": "1", + "autoneg": "off" + }, + "Ethernet354": { + "default_brkout_mode": "2x400G[200G](4)+1x800G[400G](4)", + "subport": "2", + "autoneg": "off" + }, + "Ethernet356": { + "default_brkout_mode": "2x400G[200G](4)+1x800G[400G](4)", + "subport": "3", + "autoneg": "off" + }, + "Ethernet360": { + "default_brkout_mode": "2x400G[200G](4)+1x800G[400G](4)", + "subport": "1", + "autoneg": "off" + }, + "Ethernet362": { + "default_brkout_mode": "2x400G[200G](4)+1x800G[400G](4)", + "subport": "2", + "autoneg": "off" + }, + "Ethernet364": { + "default_brkout_mode": "2x400G[200G](4)+1x800G[400G](4)", + "subport": "3", + "autoneg": "off" + }, + "Ethernet368": { + "default_brkout_mode": "2x400G[200G](4)+1x800G[400G](4)", + "subport": "1", + "autoneg": "off" + }, + "Ethernet370": { + "default_brkout_mode": "2x400G[200G](4)+1x800G[400G](4)", + "subport": "2", + "autoneg": "off" + }, + "Ethernet372": { + "default_brkout_mode": "2x400G[200G](4)+1x800G[400G](4)", + "subport": "3", + "autoneg": "off" + }, + "Ethernet376": { + "default_brkout_mode": "2x400G[200G](4)+1x800G[400G](4)", + "subport": "1", + "autoneg": "off" + }, + "Ethernet378": { + "default_brkout_mode": "2x400G[200G](4)+1x800G[400G](4)", + "subport": "2", + "autoneg": "off" + }, + "Ethernet380": { + "default_brkout_mode": "2x400G[200G](4)+1x800G[400G](4)", + "subport": "3", + "autoneg": "off" + }, + "Ethernet384": { + "default_brkout_mode": "2x400G[200G](4)+1x800G[400G](4)", + "subport": "1", + "autoneg": "off" + }, + "Ethernet386": { + "default_brkout_mode": "2x400G[200G](4)+1x800G[400G](4)", + "subport": "2", + "autoneg": "off" + }, + "Ethernet388": { + "default_brkout_mode": "2x400G[200G](4)+1x800G[400G](4)", + "subport": "3", + "autoneg": "off" + }, + "Ethernet392": { + "default_brkout_mode": "2x400G[200G](4)+1x800G[400G](4)", + "subport": "1", + "autoneg": "off" + }, + "Ethernet394": { + "default_brkout_mode": "2x400G[200G](4)+1x800G[400G](4)", + "subport": "2", + "autoneg": "off" + }, + "Ethernet396": { + "default_brkout_mode": "2x400G[200G](4)+1x800G[400G](4)", + "subport": "3", + "autoneg": "off" + }, + "Ethernet400": { + "default_brkout_mode": "2x400G[200G](4)+1x800G[400G](4)", + "subport": "1", + "autoneg": "off" + }, + "Ethernet402": { + "default_brkout_mode": "2x400G[200G](4)+1x800G[400G](4)", + "subport": "2", + "autoneg": "off" + }, + "Ethernet404": { + "default_brkout_mode": "2x400G[200G](4)+1x800G[400G](4)", + "subport": "3", + "autoneg": "off" + }, + "Ethernet408": { + "default_brkout_mode": "2x400G[200G](4)+1x800G[400G](4)", + "subport": "1", + "autoneg": "off" + }, + "Ethernet410": { + "default_brkout_mode": "2x400G[200G](4)+1x800G[400G](4)", + "subport": "2", + "autoneg": "off" + }, + "Ethernet412": { + "default_brkout_mode": "2x400G[200G](4)+1x800G[400G](4)", + "subport": "3", + "autoneg": "off" + }, + "Ethernet416": { + "default_brkout_mode": "2x400G[200G](4)+1x800G[400G](4)", + "subport": "1", + "autoneg": "off" + }, + "Ethernet418": { + "default_brkout_mode": "2x400G[200G](4)+1x800G[400G](4)", + "subport": "2", + "autoneg": "off" + }, + "Ethernet420": { + "default_brkout_mode": "2x400G[200G](4)+1x800G[400G](4)", + "subport": "3", + "autoneg": "off" + }, + "Ethernet424": { + "default_brkout_mode": "2x400G[200G](4)+1x800G[400G](4)", + "subport": "1", + "autoneg": "off" + }, + "Ethernet426": { + "default_brkout_mode": "2x400G[200G](4)+1x800G[400G](4)", + "subport": "2", + "autoneg": "off" + }, + "Ethernet428": { + "default_brkout_mode": "2x400G[200G](4)+1x800G[400G](4)", + "subport": "3", + "autoneg": "off" + }, + "Ethernet432": { + "default_brkout_mode": "2x400G[200G](4)+1x800G[400G](4)", + "subport": "1", + "autoneg": "off" + }, + "Ethernet434": { + "default_brkout_mode": "2x400G[200G](4)+1x800G[400G](4)", + "subport": "2", + "autoneg": "off" + }, + "Ethernet436": { + "default_brkout_mode": "2x400G[200G](4)+1x800G[400G](4)", + "subport": "3", + "autoneg": "off" + }, + "Ethernet440": { + "default_brkout_mode": "2x400G[200G](4)+1x800G[400G](4)", + "subport": "1", + "autoneg": "off" + }, + "Ethernet442": { + "default_brkout_mode": "2x400G[200G](4)+1x800G[400G](4)", + "subport": "2", + "autoneg": "off" + }, + "Ethernet444": { + "default_brkout_mode": "2x400G[200G](4)+1x800G[400G](4)", + "subport": "3", + "autoneg": "off" + }, + "Ethernet448": { + "default_brkout_mode": "2x400G[200G](4)+1x800G[400G](4)", + "subport": "1", + "autoneg": "off" + }, + "Ethernet450": { + "default_brkout_mode": "2x400G[200G](4)+1x800G[400G](4)", + "subport": "2", + "autoneg": "off" + }, + "Ethernet452": { + "default_brkout_mode": "2x400G[200G](4)+1x800G[400G](4)", + "subport": "3", + "autoneg": "off" + }, + "Ethernet456": { + "default_brkout_mode": "2x400G[200G](4)+1x800G[400G](4)", + "subport": "1", + "autoneg": "off" + }, + "Ethernet458": { + "default_brkout_mode": "2x400G[200G](4)+1x800G[400G](4)", + "subport": "2", + "autoneg": "off" + }, + "Ethernet460": { + "default_brkout_mode": "2x400G[200G](4)+1x800G[400G](4)", + "subport": "3", + "autoneg": "off" + }, + "Ethernet464": { + "default_brkout_mode": "2x400G[200G](4)+1x800G[400G](4)", + "subport": "1", + "autoneg": "off" + }, + "Ethernet466": { + "default_brkout_mode": "2x400G[200G](4)+1x800G[400G](4)", + "subport": "2", + "autoneg": "off" + }, + "Ethernet468": { + "default_brkout_mode": "2x400G[200G](4)+1x800G[400G](4)", + "subport": "3", + "autoneg": "off" + }, + "Ethernet472": { + "default_brkout_mode": "2x400G[200G](4)+1x800G[400G](4)", + "subport": "1", + "autoneg": "off" + }, + "Ethernet474": { + "default_brkout_mode": "2x400G[200G](4)+1x800G[400G](4)", + "subport": "2", + "autoneg": "off" + }, + "Ethernet476": { + "default_brkout_mode": "2x400G[200G](4)+1x800G[400G](4)", + "subport": "3", + "autoneg": "off" + }, + "Ethernet480": { + "default_brkout_mode": "2x400G[200G](4)+1x800G[400G](4)", + "subport": "1", + "autoneg": "off" + }, + "Ethernet482": { + "default_brkout_mode": "2x400G[200G](4)+1x800G[400G](4)", + "subport": "2", + "autoneg": "off" + }, + "Ethernet484": { + "default_brkout_mode": "2x400G[200G](4)+1x800G[400G](4)", + "subport": "3", + "autoneg": "off" + }, + "Ethernet488": { + "default_brkout_mode": "2x400G[200G](4)+1x800G[400G](4)", + "subport": "1", + "autoneg": "off" + }, + "Ethernet490": { + "default_brkout_mode": "2x400G[200G](4)+1x800G[400G](4)", + "subport": "2", + "autoneg": "off" + }, + "Ethernet492": { + "default_brkout_mode": "2x400G[200G](4)+1x800G[400G](4)", + "subport": "3", + "autoneg": "off" + }, + "Ethernet496": { + "default_brkout_mode": "2x400G[200G](4)+1x800G[400G](4)", + "subport": "1", + "autoneg": "off" + }, + "Ethernet498": { + "default_brkout_mode": "2x400G[200G](4)+1x800G[400G](4)", + "subport": "2", + "autoneg": "off" + }, + "Ethernet500": { + "default_brkout_mode": "2x400G[200G](4)+1x800G[400G](4)", + "subport": "3", + "autoneg": "off" + }, + "Ethernet504": { + "default_brkout_mode": "2x400G[200G](4)+1x800G[400G](4)", + "subport": "1", + "autoneg": "off" + }, + "Ethernet506": { + "default_brkout_mode": "2x400G[200G](4)+1x800G[400G](4)", + "subport": "2", + "autoneg": "off" + }, + "Ethernet508": { + "default_brkout_mode": "2x400G[200G](4)+1x800G[400G](4)", + "subport": "3", + "autoneg": "off" + }, + "Ethernet512": { + "default_brkout_mode": "2x100G", + "autoneg": "off" + }, + "Ethernet513": { + "default_brkout_mode": "2x100G", + "autoneg": "off" + } + } +} diff --git a/device/mellanox/x86_64-nvidia_sn6600_ld-r0/Mellanox-SN6600_LD-P64O128C2/pg_profile_lookup.ini b/device/mellanox/x86_64-nvidia_sn6600_ld-r0/Mellanox-SN6600_LD-P64O128C2/pg_profile_lookup.ini new file mode 100644 index 00000000000..c34e27910d4 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn6600_ld-r0/Mellanox-SN6600_LD-P64O128C2/pg_profile_lookup.ini @@ -0,0 +1,33 @@ +## +## SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +## Copyright (c) 2025-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +## Apache-2.0 +## +## Licensed under the Apache License, Version 2.0 (the "License"); +## you may not use this file except in compliance with the License. +## You may obtain a copy of the License at +## +## http://www.apache.org/licenses/LICENSE-2.0 +## +## Unless required by applicable law or agreed to in writing, software +## distributed under the License is distributed on an "AS IS" BASIS, +## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +## See the License for the specific language governing permissions and +## limitations under the License. +## +# PG lossless profiles. +# speed cable size xon xoff threshold + 10000 5m 63488 43008 20480 0 + 25000 5m 64512 43008 21504 0 + 100000 5m 87040 43008 44032 0 + 200000 5m 91136 43008 48128 0 + 400000 5m 124928 43008 81920 0 + 800000 5m 190464 43008 147456 0 + 100000 40m 91136 43008 48128 0 + 200000 40m 101376 43008 58368 0 + 400000 40m 144384 43008 101376 0 + 800000 40m 229376 43008 186368 0 + 100000 300m 128000 43008 84992 0 + 200000 300m 173056 43008 130048 0 + 400000 300m 287744 43008 244736 0 + 800000 300m 516096 43008 473088 0 diff --git a/device/mellanox/x86_64-nvidia_sn6600_ld-r0/Mellanox-SN6600_LD-P64O128C2/pmon_daemon_control.json b/device/mellanox/x86_64-nvidia_sn6600_ld-r0/Mellanox-SN6600_LD-P64O128C2/pmon_daemon_control.json new file mode 120000 index 00000000000..3ea08b91450 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn6600_ld-r0/Mellanox-SN6600_LD-P64O128C2/pmon_daemon_control.json @@ -0,0 +1 @@ +../ACS-SN6600_LD/pmon_daemon_control.json \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn6600_ld-r0/Mellanox-SN6600_LD-P64O128C2/port_config.ini b/device/mellanox/x86_64-nvidia_sn6600_ld-r0/Mellanox-SN6600_LD-P64O128C2/port_config.ini new file mode 100644 index 00000000000..341d4583960 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn6600_ld-r0/Mellanox-SN6600_LD-P64O128C2/port_config.ini @@ -0,0 +1,212 @@ +## +## SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +## Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +## Apache-2.0 +## +## Licensed under the Apache License, Version 2.0 (the "License"); +## you may not use this file except in compliance with the License. +## You may obtain a copy of the License at +## +## http://www.apache.org/licenses/LICENSE-2.0 +## +## Unless required by applicable law or agreed to in writing, software +## distributed under the License is distributed on an "AS IS" BASIS, +## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +## See the License for the specific language governing permissions and +## limitations under the License. +## +# name lanes alias index speed +Ethernet0 0,1 etp1a 1 400000 +Ethernet2 2,3 etp1b 1 400000 +Ethernet4 4,5,6,7 etp1c 1 800000 +Ethernet8 8,9 etp2a 2 400000 +Ethernet10 10,11 etp2b 2 400000 +Ethernet12 12,13,14,15 etp2c 2 800000 +Ethernet16 16,17 etp3a 3 400000 +Ethernet18 18,19 etp3b 3 400000 +Ethernet20 20,21,22,23 etp3c 3 800000 +Ethernet24 24,25 etp4a 4 400000 +Ethernet26 26,27 etp4b 4 400000 +Ethernet28 28,29,30,31 etp4c 4 800000 +Ethernet32 32,33 etp5a 5 400000 +Ethernet34 34,35 etp5b 5 400000 +Ethernet36 36,37,38,39 etp5c 5 800000 +Ethernet40 40,41 etp6a 6 400000 +Ethernet42 42,43 etp6b 6 400000 +Ethernet44 44,45,46,47 etp6c 6 800000 +Ethernet48 48,49 etp7a 7 400000 +Ethernet50 50,51 etp7b 7 400000 +Ethernet52 52,53,54,55 etp7c 7 800000 +Ethernet56 56,57 etp8a 8 400000 +Ethernet58 58,59 etp8b 8 400000 +Ethernet60 60,61,62,63 etp8c 8 800000 +Ethernet64 64,65 etp9a 9 400000 +Ethernet66 66,67 etp9b 9 400000 +Ethernet68 68,69,70,71 etp9c 9 800000 +Ethernet72 72,73 etp10a 10 400000 +Ethernet74 74,75 etp10b 10 400000 +Ethernet76 76,77,78,79 etp10c 10 800000 +Ethernet80 80,81 etp11a 11 400000 +Ethernet82 82,83 etp11b 11 400000 +Ethernet84 84,85,86,87 etp11c 11 800000 +Ethernet88 88,89 etp12a 12 400000 +Ethernet90 90,91 etp12b 12 400000 +Ethernet92 92,93,94,95 etp12c 12 800000 +Ethernet96 96,97 etp13a 13 400000 +Ethernet98 98,99 etp13b 13 400000 +Ethernet100 100,101,102,103 etp13c 13 800000 +Ethernet104 104,105 etp14a 14 400000 +Ethernet106 106,107 etp14b 14 400000 +Ethernet108 108,109,110,111 etp14c 14 800000 +Ethernet112 112,113 etp15a 15 400000 +Ethernet114 114,115 etp15b 15 400000 +Ethernet116 116,117,118,119 etp15c 15 800000 +Ethernet120 120,121 etp16a 16 400000 +Ethernet122 122,123 etp16b 16 400000 +Ethernet124 124,125,126,127 etp16c 16 800000 +Ethernet128 128,129 etp17a 17 400000 +Ethernet130 130,131 etp17b 17 400000 +Ethernet132 132,133,134,135 etp17c 17 800000 +Ethernet136 136,137 etp18a 18 400000 +Ethernet138 138,139 etp18b 18 400000 +Ethernet140 140,141,142,143 etp18c 18 800000 +Ethernet144 144,145 etp19a 19 400000 +Ethernet146 146,147 etp19b 19 400000 +Ethernet148 148,149,150,151 etp19c 19 800000 +Ethernet152 152,153 etp20a 20 400000 +Ethernet154 154,155 etp20b 20 400000 +Ethernet156 156,157,158,159 etp20c 20 800000 +Ethernet160 160,161 etp21a 21 400000 +Ethernet162 162,163 etp21b 21 400000 +Ethernet164 164,165,166,167 etp21c 21 800000 +Ethernet168 168,169 etp22a 22 400000 +Ethernet170 170,171 etp22b 22 400000 +Ethernet172 172,173,174,175 etp22c 22 800000 +Ethernet176 176,177 etp23a 23 400000 +Ethernet178 178,179 etp23b 23 400000 +Ethernet180 180,181,182,183 etp23c 23 800000 +Ethernet184 184,185 etp24a 24 400000 +Ethernet186 186,187 etp24b 24 400000 +Ethernet188 188,189,190,191 etp24c 24 800000 +Ethernet192 192,193 etp25a 25 400000 +Ethernet194 194,195 etp25b 25 400000 +Ethernet196 196,197,198,199 etp25c 25 800000 +Ethernet200 200,201 etp26a 26 400000 +Ethernet202 202,203 etp26b 26 400000 +Ethernet204 204,205,206,207 etp26c 26 800000 +Ethernet208 208,209 etp27a 27 400000 +Ethernet210 210,211 etp27b 27 400000 +Ethernet212 212,213,214,215 etp27c 27 800000 +Ethernet216 216,217 etp28a 28 400000 +Ethernet218 218,219 etp28b 28 400000 +Ethernet220 220,221,222,223 etp28c 28 800000 +Ethernet224 224,225 etp29a 29 400000 +Ethernet226 226,227 etp29b 29 400000 +Ethernet228 228,229,230,231 etp29c 29 800000 +Ethernet232 232,233 etp30a 30 400000 +Ethernet234 234,235 etp30b 30 400000 +Ethernet236 236,237,238,239 etp30c 30 800000 +Ethernet240 240,241 etp31a 31 400000 +Ethernet242 242,243 etp31b 31 400000 +Ethernet244 244,245,246,247 etp31c 31 800000 +Ethernet248 248,249 etp32a 32 400000 +Ethernet250 250,251 etp32b 32 400000 +Ethernet252 252,253,254,255 etp32c 32 800000 +Ethernet256 256,257 etp33a 33 400000 +Ethernet258 258,259 etp33b 33 400000 +Ethernet260 260,261,262,263 etp33c 33 800000 +Ethernet264 264,265 etp34a 34 400000 +Ethernet266 266,267 etp34b 34 400000 +Ethernet268 268,269,270,271 etp34c 34 800000 +Ethernet272 272,273 etp35a 35 400000 +Ethernet274 274,275 etp35b 35 400000 +Ethernet276 276,277,278,279 etp35c 35 800000 +Ethernet280 280,281 etp36a 36 400000 +Ethernet282 282,283 etp36b 36 400000 +Ethernet284 284,285,286,287 etp36c 36 800000 +Ethernet288 288,289 etp37a 37 400000 +Ethernet290 290,291 etp37b 37 400000 +Ethernet292 292,293,294,295 etp37c 37 800000 +Ethernet296 296,297 etp38a 38 400000 +Ethernet298 298,299 etp38b 38 400000 +Ethernet300 300,301,302,303 etp38c 38 800000 +Ethernet304 304,305 etp39a 39 400000 +Ethernet306 306,307 etp39b 39 400000 +Ethernet308 308,309,310,311 etp39c 39 800000 +Ethernet312 312,313 etp40a 40 400000 +Ethernet314 314,315 etp40b 40 400000 +Ethernet316 316,317,318,319 etp40c 40 800000 +Ethernet320 320,321 etp41a 41 400000 +Ethernet322 322,323 etp41b 41 400000 +Ethernet324 324,325,326,327 etp41c 41 800000 +Ethernet328 328,329 etp42a 42 400000 +Ethernet330 330,331 etp42b 42 400000 +Ethernet332 332,333,334,335 etp42c 42 800000 +Ethernet336 336,337 etp43a 43 400000 +Ethernet338 338,339 etp43b 43 400000 +Ethernet340 340,341,342,343 etp43c 43 800000 +Ethernet344 344,345 etp44a 44 400000 +Ethernet346 346,347 etp44b 44 400000 +Ethernet348 348,349,350,351 etp44c 44 800000 +Ethernet352 352,353 etp45a 45 400000 +Ethernet354 354,355 etp45b 45 400000 +Ethernet356 356,357,358,359 etp45c 45 800000 +Ethernet360 360,361 etp46a 46 400000 +Ethernet362 362,363 etp46b 46 400000 +Ethernet364 364,365,366,367 etp46c 46 800000 +Ethernet368 368,369 etp47a 47 400000 +Ethernet370 370,371 etp47b 47 400000 +Ethernet372 372,373,374,375 etp47c 47 800000 +Ethernet376 376,377 etp48a 48 400000 +Ethernet378 378,379 etp48b 48 400000 +Ethernet380 380,381,382,383 etp48c 48 800000 +Ethernet384 384,385 etp49a 49 400000 +Ethernet386 386,387 etp49b 49 400000 +Ethernet388 388,389,390,391 etp49c 49 800000 +Ethernet392 392,393 etp50a 50 400000 +Ethernet394 394,395 etp50b 50 400000 +Ethernet396 396,397,398,399 etp50c 50 800000 +Ethernet400 400,401 etp51a 51 400000 +Ethernet402 402,403 etp51b 51 400000 +Ethernet404 404,405,406,407 etp51c 51 800000 +Ethernet408 408,409 etp52a 52 400000 +Ethernet410 410,411 etp52b 52 400000 +Ethernet412 412,413,414,415 etp52c 52 800000 +Ethernet416 416,417 etp53a 53 400000 +Ethernet418 418,419 etp53b 53 400000 +Ethernet420 420,421,422,423 etp53c 53 800000 +Ethernet424 424,425 etp54a 54 400000 +Ethernet426 426,427 etp54b 54 400000 +Ethernet428 428,429,430,431 etp54c 54 800000 +Ethernet432 432,433 etp55a 55 400000 +Ethernet434 434,435 etp55b 55 400000 +Ethernet436 436,437,438,439 etp55c 55 800000 +Ethernet440 440,441 etp56a 56 400000 +Ethernet442 442,443 etp56b 56 400000 +Ethernet444 444,445,446,447 etp56c 56 800000 +Ethernet448 448,449 etp57a 57 400000 +Ethernet450 450,451 etp57b 57 400000 +Ethernet452 452,453,454,455 etp57c 57 800000 +Ethernet456 456,457 etp58a 58 400000 +Ethernet458 458,459 etp58b 58 400000 +Ethernet460 460,461,462,463 etp58c 58 800000 +Ethernet464 464,465 etp59a 59 400000 +Ethernet466 466,467 etp59b 59 400000 +Ethernet468 468,469,470,471 etp59c 59 800000 +Ethernet472 472,473 etp60a 60 400000 +Ethernet474 474,475 etp60b 60 400000 +Ethernet476 476,477,478,479 etp60c 60 800000 +Ethernet480 480,481 etp61a 61 400000 +Ethernet482 482,483 etp61b 61 400000 +Ethernet484 484,485,486,487 etp61c 61 800000 +Ethernet488 488,489 etp62a 62 400000 +Ethernet490 490,491 etp62b 62 400000 +Ethernet492 492,493,494,495 etp62c 62 800000 +Ethernet496 496,497 etp63a 63 400000 +Ethernet498 498,499 etp63b 63 400000 +Ethernet500 500,501,502,503 etp63c 63 800000 +Ethernet504 504,505 etp64a 64 400000 +Ethernet506 506,507 etp64b 64 400000 +Ethernet508 508,509,510,511 etp64c 64 800000 +Ethernet512 512 etp65a 65 100000 +Ethernet513 513 etp65b 65 100000 diff --git a/device/mellanox/x86_64-nvidia_sn6600_ld-r0/Mellanox-SN6600_LD-P64O128C2/qos.json.j2 b/device/mellanox/x86_64-nvidia_sn6600_ld-r0/Mellanox-SN6600_LD-P64O128C2/qos.json.j2 new file mode 120000 index 00000000000..462ffcd7e1f --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn6600_ld-r0/Mellanox-SN6600_LD-P64O128C2/qos.json.j2 @@ -0,0 +1 @@ +../../x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/qos.json.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn6600_ld-r0/Mellanox-SN6600_LD-P64O128C2/sai.profile b/device/mellanox/x86_64-nvidia_sn6600_ld-r0/Mellanox-SN6600_LD-P64O128C2/sai.profile new file mode 100644 index 00000000000..b54d20ffcef --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn6600_ld-r0/Mellanox-SN6600_LD-P64O128C2/sai.profile @@ -0,0 +1,4 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_6601_128x400g_64x800g.xml +SAI_KEY_DISABLE_PORT_ALPHA=1 +SAI_KEY_INGRESS_PG_XOFF_STAT_LOSSY_HR_ENABLED=1 +SAI_KEY_TX_SQUELCH_MODE=2 diff --git a/device/mellanox/x86_64-nvidia_sn6600_ld-r0/Mellanox-SN6600_LD-P64O128C2/sai_6601_128x400g_64x800g.xml b/device/mellanox/x86_64-nvidia_sn6600_ld-r0/Mellanox-SN6600_LD-P64O128C2/sai_6601_128x400g_64x800g.xml new file mode 100644 index 00000000000..56d969d9b21 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn6600_ld-r0/Mellanox-SN6600_LD-P64O128C2/sai_6601_128x400g_64x800g.xml @@ -0,0 +1,29 @@ + + + + + + + 00:02:03:04:05:00 + + + 0 + + + diff --git a/device/mellanox/x86_64-nvidia_sn6600_ld-r0/Mellanox-SN6600_LD-P64O128C2/traffic_config.j2 b/device/mellanox/x86_64-nvidia_sn6600_ld-r0/Mellanox-SN6600_LD-P64O128C2/traffic_config.j2 new file mode 100644 index 00000000000..52a7e1e117a --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn6600_ld-r0/Mellanox-SN6600_LD-P64O128C2/traffic_config.j2 @@ -0,0 +1,18 @@ +{# + SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES + Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + Apache-2.0 + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + http://www.apache.org/licenses/LICENSE-2.0 + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +#} + +{%- set traffic_classification_enable = true %} + +{% set wred_threshold_limit = 224140416 %} diff --git a/device/mellanox/x86_64-nvidia_sn6600_ld-r0/create_only_config_db_buffers.json b/device/mellanox/x86_64-nvidia_sn6600_ld-r0/create_only_config_db_buffers.json new file mode 120000 index 00000000000..87e12387fcd --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn6600_ld-r0/create_only_config_db_buffers.json @@ -0,0 +1 @@ +../x86_64-mlnx_msn2700-r0/create_only_config_db_buffers.json \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn6600_ld-r0/installer.conf b/device/mellanox/x86_64-nvidia_sn6600_ld-r0/installer.conf index cb783508022..0010128e865 100644 --- a/device/mellanox/x86_64-nvidia_sn6600_ld-r0/installer.conf +++ b/device/mellanox/x86_64-nvidia_sn6600_ld-r0/installer.conf @@ -1 +1,2 @@ -ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="libata.force=noncq tpm_tis.interrupts=0 nosgx ima_hash=sha384 amd_iommu=off cpufreq.default_governor=performance" \ No newline at end of file +VAR_LOG_SIZE=8192 +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="libata.force=noncq tpm_tis.interrupts=0 nosgx ima_hash=sha384 cpufreq.default_governor=performance" diff --git a/device/mellanox/x86_64-nvidia_sn6600_ld-r0/pcie.yaml b/device/mellanox/x86_64-nvidia_sn6600_ld-r0/pcie.yaml index bead1736723..201eba9994a 100644 --- a/device/mellanox/x86_64-nvidia_sn6600_ld-r0/pcie.yaml +++ b/device/mellanox/x86_64-nvidia_sn6600_ld-r0/pcie.yaml @@ -33,11 +33,6 @@ id: 14b7 name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h-19h PCIe Dummy Host Bridge (rev 01)' -- bus: '00' - dev: '01' - fn: '1' - id: 14b8 - name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Family 17h-19h PCIe GPP Bridge' - bus: '00' dev: '01' fn: '2' @@ -148,73 +143,60 @@ id: '1680' name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Rembrandt Data Fabric: Device 18h; Function 7' -- bus: '03' +- bus: '01' + dev: '00' + fn: '0' + id: cf84 + name: 'Ethernet controller: Mellanox Technologies Spectrum-6 (rev a0)' +- bus: '02' dev: '00' fn: '0' id: '2268' name: 'Non-Volatile memory controller: Silicon Motion, Inc. SM2268XT (DRAM-less) NVMe SSD Controller (rev 10)' -- bus: '04' +- bus: '03' dev: '00' fn: '0' id: 145a name: 'Non-Essential Instrumentation [1300]: Advanced Micro Devices, Inc. [AMD/ATI] Dummy Function (absent graphics controller)' -- bus: '04' +- bus: '03' dev: '00' fn: '2' id: '1649' name: 'Encryption controller: Advanced Micro Devices, Inc. [AMD] Family 19h PSP/CCP' -- bus: '04' +- bus: '03' dev: '00' fn: '3' id: 161d name: 'USB controller: Advanced Micro Devices, Inc. [AMD] Rembrandt USB4 XHCI controller #3' -- bus: '04' - dev: '00' - fn: '4' - id: 161e - name: 'USB controller: Advanced Micro Devices, Inc. [AMD] Rembrandt USB4 XHCI controller - #4' -- bus: '04' +- bus: '03' dev: '00' fn: '5' id: 15e2 name: 'Multimedia controller: Advanced Micro Devices, Inc. [AMD] Audio Coprocessor (rev 60)' -- bus: '04' +- bus: '03' dev: '00' fn: '7' id: 15e4 name: 'Signal processing controller: Advanced Micro Devices, Inc. [AMD] Sensor Fusion Hub' -- bus: '05' +- bus: '04' dev: '00' fn: '0' id: 145a name: 'Non-Essential Instrumentation [1300]: Advanced Micro Devices, Inc. [AMD] Zeppelin/Raven/Raven2 PCIe Dummy Function (rev a1)' -- bus: '05' +- bus: '04' dev: '00' fn: '2' id: '1458' name: 'Ethernet controller: Advanced Micro Devices, Inc. [AMD] XGMAC 10GbE Controller' -- bus: '06' +- bus: '05' dev: '00' fn: '0' id: 145a name: 'Non-Essential Instrumentation [1300]: Advanced Micro Devices, Inc. [AMD] Zeppelin/Raven/Raven2 PCIe Dummy Function' -- bus: '06' - dev: '00' - fn: '3' - id: 15d6 - name: 'USB controller: Advanced Micro Devices, Inc. [AMD] Rembrandt USB4 XHCI controller - #5' -- bus: '06' - dev: '00' - fn: '4' - id: 15d7 - name: 'USB controller: Advanced Micro Devices, Inc. [AMD] Rembrandt USB4 XHCI controller - #6' diff --git a/device/mellanox/x86_64-nvidia_sn6600_ld-r0/platform.json b/device/mellanox/x86_64-nvidia_sn6600_ld-r0/platform.json index 8eec2204a13..aed1039e569 100644 --- a/device/mellanox/x86_64-nvidia_sn6600_ld-r0/platform.json +++ b/device/mellanox/x86_64-nvidia_sn6600_ld-r0/platform.json @@ -29,7 +29,14 @@ ], "fans": [], "fan_drawers": [], - "psus": [], + "pdbs": [ + { + "name": "PDB 1" + }, + { + "name": "PDB 2" + } + ], "leak_sensors": [ { "name": "leakage1" @@ -40,7 +47,8 @@ ], "thermals": [ { - "name": "ASIC" + "name": "ASIC", + "polling_interval": 3 }, { "name": "CPU Pack Temp" @@ -583,7 +591,8 @@ "1x800G": ["etp1"], "2x800G[400G]": ["etp1a", "etp1b"], "4x400G[200G]": ["etp1a", "etp1b", "etp1c", "etp1d"], - "8x200G[100G]": ["etp1a", "etp1b", "etp1c", "etp1d", "etp1e", "etp1f", "etp1g", "etp1h"] + "8x200G[100G]": ["etp1a", "etp1b", "etp1c", "etp1d", "etp1e", "etp1f", "etp1g", "etp1h"], + "2x400G[200G](4)+1x800G[400G](4)": ["etp1a", "etp1b", "etp1c"] } }, "Ethernet8": { @@ -593,7 +602,8 @@ "1x800G": ["etp2"], "2x800G[400G]": ["etp2a", "etp2b"], "4x400G[200G]": ["etp2a", "etp2b", "etp2c", "etp2d"], - "8x200G[100G]": ["etp2a", "etp2b", "etp2c", "etp2d", "etp2e", "etp2f", "etp2g", "etp2h"] + "8x200G[100G]": ["etp2a", "etp2b", "etp2c", "etp2d", "etp2e", "etp2f", "etp2g", "etp2h"], + "2x400G[200G](4)+1x800G[400G](4)": ["etp2a", "etp2b", "etp2c"] } }, "Ethernet16": { @@ -603,7 +613,8 @@ "1x800G": ["etp3"], "2x800G[400G]": ["etp3a", "etp3b"], "4x400G[200G]": ["etp3a", "etp3b", "etp3c", "etp3d"], - "8x200G[100G]": ["etp3a", "etp3b", "etp3c", "etp3d", "etp3e", "etp3f", "etp3g", "etp3h"] + "8x200G[100G]": ["etp3a", "etp3b", "etp3c", "etp3d", "etp3e", "etp3f", "etp3g", "etp3h"], + "2x400G[200G](4)+1x800G[400G](4)": ["etp3a", "etp3b", "etp3c"] } }, "Ethernet24": { @@ -613,7 +624,8 @@ "1x800G": ["etp4"], "2x800G[400G]": ["etp4a", "etp4b"], "4x400G[200G]": ["etp4a", "etp4b", "etp4c", "etp4d"], - "8x200G[100G]": ["etp4a", "etp4b", "etp4c", "etp4d", "etp4e", "etp4f", "etp4g", "etp4h"] + "8x200G[100G]": ["etp4a", "etp4b", "etp4c", "etp4d", "etp4e", "etp4f", "etp4g", "etp4h"], + "2x400G[200G](4)+1x800G[400G](4)": ["etp4a", "etp4b", "etp4c"] } }, "Ethernet32": { @@ -623,7 +635,8 @@ "1x800G": ["etp5"], "2x800G[400G]": ["etp5a", "etp5b"], "4x400G[200G]": ["etp5a", "etp5b", "etp5c", "etp5d"], - "8x200G[100G]": ["etp5a", "etp5b", "etp5c", "etp5d", "etp5e", "etp5f", "etp5g", "etp5h"] + "8x200G[100G]": ["etp5a", "etp5b", "etp5c", "etp5d", "etp5e", "etp5f", "etp5g", "etp5h"], + "2x400G[200G](4)+1x800G[400G](4)": ["etp5a", "etp5b", "etp5c"] } }, "Ethernet40": { @@ -633,7 +646,8 @@ "1x800G": ["etp6"], "2x800G[400G]": ["etp6a", "etp6b"], "4x400G[200G]": ["etp6a", "etp6b", "etp6c", "etp6d"], - "8x200G[100G]": ["etp6a", "etp6b", "etp6c", "etp6d", "etp6e", "etp6f", "etp6g", "etp6h"] + "8x200G[100G]": ["etp6a", "etp6b", "etp6c", "etp6d", "etp6e", "etp6f", "etp6g", "etp6h"], + "2x400G[200G](4)+1x800G[400G](4)": ["etp6a", "etp6b", "etp6c"] } }, "Ethernet48": { @@ -643,7 +657,8 @@ "1x800G": ["etp7"], "2x800G[400G]": ["etp7a", "etp7b"], "4x400G[200G]": ["etp7a", "etp7b", "etp7c", "etp7d"], - "8x200G[100G]": ["etp7a", "etp7b", "etp7c", "etp7d", "etp7e", "etp7f", "etp7g", "etp7h"] + "8x200G[100G]": ["etp7a", "etp7b", "etp7c", "etp7d", "etp7e", "etp7f", "etp7g", "etp7h"], + "2x400G[200G](4)+1x800G[400G](4)": ["etp7a", "etp7b", "etp7c"] } }, "Ethernet56": { @@ -653,7 +668,8 @@ "1x800G": ["etp8"], "2x800G[400G]": ["etp8a", "etp8b"], "4x400G[200G]": ["etp8a", "etp8b", "etp8c", "etp8d"], - "8x200G[100G]": ["etp8a", "etp8b", "etp8c", "etp8d", "etp8e", "etp8f", "etp8g", "etp8h"] + "8x200G[100G]": ["etp8a", "etp8b", "etp8c", "etp8d", "etp8e", "etp8f", "etp8g", "etp8h"], + "2x400G[200G](4)+1x800G[400G](4)": ["etp8a", "etp8b", "etp8c"] } }, "Ethernet64": { @@ -663,7 +679,8 @@ "1x800G": ["etp9"], "2x800G[400G]": ["etp9a", "etp9b"], "4x400G[200G]": ["etp9a", "etp9b", "etp9c", "etp9d"], - "8x200G[100G]": ["etp9a", "etp9b", "etp9c", "etp9d", "etp9e", "etp9f", "etp9g", "etp9h"] + "8x200G[100G]": ["etp9a", "etp9b", "etp9c", "etp9d", "etp9e", "etp9f", "etp9g", "etp9h"], + "2x400G[200G](4)+1x800G[400G](4)": ["etp9a", "etp9b", "etp9c"] } }, "Ethernet72": { @@ -673,7 +690,8 @@ "1x800G": ["etp10"], "2x800G[400G]": ["etp10a", "etp10b"], "4x400G[200G]": ["etp10a", "etp10b", "etp10c", "etp10d"], - "8x200G[100G]": ["etp10a", "etp10b", "etp10c", "etp10d", "etp10e", "etp10f", "etp10g", "etp10h"] + "8x200G[100G]": ["etp10a", "etp10b", "etp10c", "etp10d", "etp10e", "etp10f", "etp10g", "etp10h"], + "2x400G[200G](4)+1x800G[400G](4)": ["etp10a", "etp10b", "etp10c"] } }, "Ethernet80": { @@ -683,7 +701,8 @@ "1x800G": ["etp11"], "2x800G[400G]": ["etp11a", "etp11b"], "4x400G[200G]": ["etp11a", "etp11b", "etp11c", "etp11d"], - "8x200G[100G]": ["etp11a", "etp11b", "etp11c", "etp11d", "etp11e", "etp11f", "etp11g", "etp11h"] + "8x200G[100G]": ["etp11a", "etp11b", "etp11c", "etp11d", "etp11e", "etp11f", "etp11g", "etp11h"], + "2x400G[200G](4)+1x800G[400G](4)": ["etp11a", "etp11b", "etp11c"] } }, "Ethernet88": { @@ -693,7 +712,8 @@ "1x800G": ["etp12"], "2x800G[400G]": ["etp12a", "etp12b"], "4x400G[200G]": ["etp12a", "etp12b", "etp12c", "etp12d"], - "8x200G[100G]": ["etp12a", "etp12b", "etp12c", "etp12d", "etp12e", "etp12f", "etp12g", "etp12h"] + "8x200G[100G]": ["etp12a", "etp12b", "etp12c", "etp12d", "etp12e", "etp12f", "etp12g", "etp12h"], + "2x400G[200G](4)+1x800G[400G](4)": ["etp12a", "etp12b", "etp12c"] } }, "Ethernet96": { @@ -703,7 +723,8 @@ "1x800G": ["etp13"], "2x800G[400G]": ["etp13a", "etp13b"], "4x400G[200G]": ["etp13a", "etp13b", "etp13c", "etp13d"], - "8x200G[100G]": ["etp13a", "etp13b", "etp13c", "etp13d", "etp13e", "etp13f", "etp13g", "etp13h"] + "8x200G[100G]": ["etp13a", "etp13b", "etp13c", "etp13d", "etp13e", "etp13f", "etp13g", "etp13h"], + "2x400G[200G](4)+1x800G[400G](4)": ["etp13a", "etp13b", "etp13c"] } }, "Ethernet104": { @@ -713,7 +734,8 @@ "1x800G": ["etp14"], "2x800G[400G]": ["etp14a", "etp14b"], "4x400G[200G]": ["etp14a", "etp14b", "etp14c", "etp14d"], - "8x200G[100G]": ["etp14a", "etp14b", "etp14c", "etp14d", "etp14e", "etp14f", "etp14g", "etp14h"] + "8x200G[100G]": ["etp14a", "etp14b", "etp14c", "etp14d", "etp14e", "etp14f", "etp14g", "etp14h"], + "2x400G[200G](4)+1x800G[400G](4)": ["etp14a", "etp14b", "etp14c"] } }, "Ethernet112": { @@ -723,7 +745,8 @@ "1x800G": ["etp15"], "2x800G[400G]": ["etp15a", "etp15b"], "4x400G[200G]": ["etp15a", "etp15b", "etp15c", "etp15d"], - "8x200G[100G]": ["etp15a", "etp15b", "etp15c", "etp15d", "etp15e", "etp15f", "etp15g", "etp15h"] + "8x200G[100G]": ["etp15a", "etp15b", "etp15c", "etp15d", "etp15e", "etp15f", "etp15g", "etp15h"], + "2x400G[200G](4)+1x800G[400G](4)": ["etp15a", "etp15b", "etp15c"] } }, "Ethernet120": { @@ -733,7 +756,8 @@ "1x800G": ["etp16"], "2x800G[400G]": ["etp16a", "etp16b"], "4x400G[200G]": ["etp16a", "etp16b", "etp16c", "etp16d"], - "8x200G[100G]": ["etp16a", "etp16b", "etp16c", "etp16d", "etp16e", "etp16f", "etp16g", "etp16h"] + "8x200G[100G]": ["etp16a", "etp16b", "etp16c", "etp16d", "etp16e", "etp16f", "etp16g", "etp16h"], + "2x400G[200G](4)+1x800G[400G](4)": ["etp16a", "etp16b", "etp16c"] } }, "Ethernet128": { @@ -743,7 +767,8 @@ "1x800G": ["etp17"], "2x800G[400G]": ["etp17a", "etp17b"], "4x400G[200G]": ["etp17a", "etp17b", "etp17c", "etp17d"], - "8x200G[100G]": ["etp17a", "etp17b", "etp17c", "etp17d", "etp17e", "etp17f", "etp17g", "etp17h"] + "8x200G[100G]": ["etp17a", "etp17b", "etp17c", "etp17d", "etp17e", "etp17f", "etp17g", "etp17h"], + "2x400G[200G](4)+1x800G[400G](4)": ["etp17a", "etp17b", "etp17c"] } }, "Ethernet136": { @@ -753,7 +778,8 @@ "1x800G": ["etp18"], "2x800G[400G]": ["etp18a", "etp18b"], "4x400G[200G]": ["etp18a", "etp18b", "etp18c", "etp18d"], - "8x200G[100G]": ["etp18a", "etp18b", "etp18c", "etp18d", "etp18e", "etp18f", "etp18g", "etp18h"] + "8x200G[100G]": ["etp18a", "etp18b", "etp18c", "etp18d", "etp18e", "etp18f", "etp18g", "etp18h"], + "2x400G[200G](4)+1x800G[400G](4)": ["etp18a", "etp18b", "etp18c"] } }, "Ethernet144": { @@ -763,7 +789,8 @@ "1x800G": ["etp19"], "2x800G[400G]": ["etp19a", "etp19b"], "4x400G[200G]": ["etp19a", "etp19b", "etp19c", "etp19d"], - "8x200G[100G]": ["etp19a", "etp19b", "etp19c", "etp19d", "etp19e", "etp19f", "etp19g", "etp19h"] + "8x200G[100G]": ["etp19a", "etp19b", "etp19c", "etp19d", "etp19e", "etp19f", "etp19g", "etp19h"], + "2x400G[200G](4)+1x800G[400G](4)": ["etp19a", "etp19b", "etp19c"] } }, "Ethernet152": { @@ -773,7 +800,8 @@ "1x800G": ["etp20"], "2x800G[400G]": ["etp20a", "etp20b"], "4x400G[200G]": ["etp20a", "etp20b", "etp20c", "etp20d"], - "8x200G[100G]": ["etp20a", "etp20b", "etp20c", "etp20d", "etp20e", "etp20f", "etp20g", "etp20h"] + "8x200G[100G]": ["etp20a", "etp20b", "etp20c", "etp20d", "etp20e", "etp20f", "etp20g", "etp20h"], + "2x400G[200G](4)+1x800G[400G](4)": ["etp20a", "etp20b", "etp20c"] } }, "Ethernet160": { @@ -783,7 +811,8 @@ "1x800G": ["etp21"], "2x800G[400G]": ["etp21a", "etp21b"], "4x400G[200G]": ["etp21a", "etp21b", "etp21c", "etp21d"], - "8x200G[100G]": ["etp21a", "etp21b", "etp21c", "etp21d", "etp21e", "etp21f", "etp21g", "etp21h"] + "8x200G[100G]": ["etp21a", "etp21b", "etp21c", "etp21d", "etp21e", "etp21f", "etp21g", "etp21h"], + "2x400G[200G](4)+1x800G[400G](4)": ["etp21a", "etp21b", "etp21c"] } }, "Ethernet168": { @@ -793,7 +822,8 @@ "1x800G": ["etp22"], "2x800G[400G]": ["etp22a", "etp22b"], "4x400G[200G]": ["etp22a", "etp22b", "etp22c", "etp22d"], - "8x200G[100G]": ["etp22a", "etp22b", "etp22c", "etp22d", "etp22e", "etp22f", "etp22g", "etp22h"] + "8x200G[100G]": ["etp22a", "etp22b", "etp22c", "etp22d", "etp22e", "etp22f", "etp22g", "etp22h"], + "2x400G[200G](4)+1x800G[400G](4)": ["etp22a", "etp22b", "etp22c"] } }, "Ethernet176": { @@ -803,7 +833,8 @@ "1x800G": ["etp23"], "2x800G[400G]": ["etp23a", "etp23b"], "4x400G[200G]": ["etp23a", "etp23b", "etp23c", "etp23d"], - "8x200G[100G]": ["etp23a", "etp23b", "etp23c", "etp23d", "etp23e", "etp23f", "etp23g", "etp23h"] + "8x200G[100G]": ["etp23a", "etp23b", "etp23c", "etp23d", "etp23e", "etp23f", "etp23g", "etp23h"], + "2x400G[200G](4)+1x800G[400G](4)": ["etp23a", "etp23b", "etp23c"] } }, "Ethernet184": { @@ -813,7 +844,8 @@ "1x800G": ["etp24"], "2x800G[400G]": ["etp24a", "etp24b"], "4x400G[200G]": ["etp24a", "etp24b", "etp24c", "etp24d"], - "8x200G[100G]": ["etp24a", "etp24b", "etp24c", "etp24d", "etp24e", "etp24f", "etp24g", "etp24h"] + "8x200G[100G]": ["etp24a", "etp24b", "etp24c", "etp24d", "etp24e", "etp24f", "etp24g", "etp24h"], + "2x400G[200G](4)+1x800G[400G](4)": ["etp24a", "etp24b", "etp24c"] } }, "Ethernet192": { @@ -823,7 +855,8 @@ "1x800G": ["etp25"], "2x800G[400G]": ["etp25a", "etp25b"], "4x400G[200G]": ["etp25a", "etp25b", "etp25c", "etp25d"], - "8x200G[100G]": ["etp25a", "etp25b", "etp25c", "etp25d", "etp25e", "etp25f", "etp25g", "etp25h"] + "8x200G[100G]": ["etp25a", "etp25b", "etp25c", "etp25d", "etp25e", "etp25f", "etp25g", "etp25h"], + "2x400G[200G](4)+1x800G[400G](4)": ["etp25a", "etp25b", "etp25c"] } }, "Ethernet200": { @@ -833,7 +866,8 @@ "1x800G": ["etp26"], "2x800G[400G]": ["etp26a", "etp26b"], "4x400G[200G]": ["etp26a", "etp26b", "etp26c", "etp26d"], - "8x200G[100G]": ["etp26a", "etp26b", "etp26c", "etp26d", "etp26e", "etp26f", "etp26g", "etp26h"] + "8x200G[100G]": ["etp26a", "etp26b", "etp26c", "etp26d", "etp26e", "etp26f", "etp26g", "etp26h"], + "2x400G[200G](4)+1x800G[400G](4)": ["etp26a", "etp26b", "etp26c"] } }, "Ethernet208": { @@ -843,7 +877,8 @@ "1x800G": ["etp27"], "2x800G[400G]": ["etp27a", "etp27b"], "4x400G[200G]": ["etp27a", "etp27b", "etp27c", "etp27d"], - "8x200G[100G]": ["etp27a", "etp27b", "etp27c", "etp27d", "etp27e", "etp27f", "etp27g", "etp27h"] + "8x200G[100G]": ["etp27a", "etp27b", "etp27c", "etp27d", "etp27e", "etp27f", "etp27g", "etp27h"], + "2x400G[200G](4)+1x800G[400G](4)": ["etp27a", "etp27b", "etp27c"] } }, "Ethernet216": { @@ -853,7 +888,8 @@ "1x800G": ["etp28"], "2x800G[400G]": ["etp28a", "etp28b"], "4x400G[200G]": ["etp28a", "etp28b", "etp28c", "etp28d"], - "8x200G[100G]": ["etp28a", "etp28b", "etp28c", "etp28d", "etp28e", "etp28f", "etp28g", "etp28h"] + "8x200G[100G]": ["etp28a", "etp28b", "etp28c", "etp28d", "etp28e", "etp28f", "etp28g", "etp28h"], + "2x400G[200G](4)+1x800G[400G](4)": ["etp28a", "etp28b", "etp28c"] } }, "Ethernet224": { @@ -863,7 +899,8 @@ "1x800G": ["etp29"], "2x800G[400G]": ["etp29a", "etp29b"], "4x400G[200G]": ["etp29a", "etp29b", "etp29c", "etp29d"], - "8x200G[100G]": ["etp29a", "etp29b", "etp29c", "etp29d", "etp29e", "etp29f", "etp29g", "etp29h"] + "8x200G[100G]": ["etp29a", "etp29b", "etp29c", "etp29d", "etp29e", "etp29f", "etp29g", "etp29h"], + "2x400G[200G](4)+1x800G[400G](4)": ["etp29a", "etp29b", "etp29c"] } }, "Ethernet232": { @@ -873,7 +910,8 @@ "1x800G": ["etp30"], "2x800G[400G]": ["etp30a", "etp30b"], "4x400G[200G]": ["etp30a", "etp30b", "etp30c", "etp30d"], - "8x200G[100G]": ["etp30a", "etp30b", "etp30c", "etp30d", "etp30e", "etp30f", "etp30g", "etp30h"] + "8x200G[100G]": ["etp30a", "etp30b", "etp30c", "etp30d", "etp30e", "etp30f", "etp30g", "etp30h"], + "2x400G[200G](4)+1x800G[400G](4)": ["etp30a", "etp30b", "etp30c"] } }, "Ethernet240": { @@ -883,7 +921,8 @@ "1x800G": ["etp31"], "2x800G[400G]": ["etp31a", "etp31b"], "4x400G[200G]": ["etp31a", "etp31b", "etp31c", "etp31d"], - "8x200G[100G]": ["etp31a", "etp31b", "etp31c", "etp31d", "etp31e", "etp31f", "etp31g", "etp31h"] + "8x200G[100G]": ["etp31a", "etp31b", "etp31c", "etp31d", "etp31e", "etp31f", "etp31g", "etp31h"], + "2x400G[200G](4)+1x800G[400G](4)": ["etp31a", "etp31b", "etp31c"] } }, "Ethernet248": { @@ -893,7 +932,8 @@ "1x800G": ["etp32"], "2x800G[400G]": ["etp32a", "etp32b"], "4x400G[200G]": ["etp32a", "etp32b", "etp32c", "etp32d"], - "8x200G[100G]": ["etp32a", "etp32b", "etp32c", "etp32d", "etp32e", "etp32f", "etp32g", "etp32h"] + "8x200G[100G]": ["etp32a", "etp32b", "etp32c", "etp32d", "etp32e", "etp32f", "etp32g", "etp32h"], + "2x400G[200G](4)+1x800G[400G](4)": ["etp32a", "etp32b", "etp32c"] } }, "Ethernet256": { @@ -903,7 +943,8 @@ "1x800G": ["etp33"], "2x800G[400G]": ["etp33a", "etp33b"], "4x400G[200G]": ["etp33a", "etp33b", "etp33c", "etp33d"], - "8x200G[100G]": ["etp33a", "etp33b", "etp33c", "etp33d", "etp33e", "etp33f", "etp33g", "etp33h"] + "8x200G[100G]": ["etp33a", "etp33b", "etp33c", "etp33d", "etp33e", "etp33f", "etp33g", "etp33h"], + "2x400G[200G](4)+1x800G[400G](4)": ["etp33a", "etp33b", "etp33c"] } }, "Ethernet264": { @@ -913,7 +954,8 @@ "1x800G": ["etp34"], "2x800G[400G]": ["etp34a", "etp34b"], "4x400G[200G]": ["etp34a", "etp34b", "etp34c", "etp34d"], - "8x200G[100G]": ["etp34a", "etp34b", "etp34c", "etp34d", "etp34e", "etp34f", "etp34g", "etp34h"] + "8x200G[100G]": ["etp34a", "etp34b", "etp34c", "etp34d", "etp34e", "etp34f", "etp34g", "etp34h"], + "2x400G[200G](4)+1x800G[400G](4)": ["etp34a", "etp34b", "etp34c"] } }, "Ethernet272": { @@ -923,7 +965,8 @@ "1x800G": ["etp35"], "2x800G[400G]": ["etp35a", "etp35b"], "4x400G[200G]": ["etp35a", "etp35b", "etp35c", "etp35d"], - "8x200G[100G]": ["etp35a", "etp35b", "etp35c", "etp35d", "etp35e", "etp35f", "etp35g", "etp35h"] + "8x200G[100G]": ["etp35a", "etp35b", "etp35c", "etp35d", "etp35e", "etp35f", "etp35g", "etp35h"], + "2x400G[200G](4)+1x800G[400G](4)": ["etp35a", "etp35b", "etp35c"] } }, "Ethernet280": { @@ -933,7 +976,8 @@ "1x800G": ["etp36"], "2x800G[400G]": ["etp36a", "etp36b"], "4x400G[200G]": ["etp36a", "etp36b", "etp36c", "etp36d"], - "8x200G[100G]": ["etp36a", "etp36b", "etp36c", "etp36d", "etp36e", "etp36f", "etp36g", "etp36h"] + "8x200G[100G]": ["etp36a", "etp36b", "etp36c", "etp36d", "etp36e", "etp36f", "etp36g", "etp36h"], + "2x400G[200G](4)+1x800G[400G](4)": ["etp36a", "etp36b", "etp36c"] } }, "Ethernet288": { @@ -943,7 +987,8 @@ "1x800G": ["etp37"], "2x800G[400G]": ["etp37a", "etp37b"], "4x400G[200G]": ["etp37a", "etp37b", "etp37c", "etp37d"], - "8x200G[100G]": ["etp37a", "etp37b", "etp37c", "etp37d", "etp37e", "etp37f", "etp37g", "etp37h"] + "8x200G[100G]": ["etp37a", "etp37b", "etp37c", "etp37d", "etp37e", "etp37f", "etp37g", "etp37h"], + "2x400G[200G](4)+1x800G[400G](4)": ["etp37a", "etp37b", "etp37c"] } }, "Ethernet296": { @@ -953,7 +998,8 @@ "1x800G": ["etp38"], "2x800G[400G]": ["etp38a", "etp38b"], "4x400G[200G]": ["etp38a", "etp38b", "etp38c", "etp38d"], - "8x200G[100G]": ["etp38a", "etp38b", "etp38c", "etp38d", "etp38e", "etp38f", "etp38g", "etp38h"] + "8x200G[100G]": ["etp38a", "etp38b", "etp38c", "etp38d", "etp38e", "etp38f", "etp38g", "etp38h"], + "2x400G[200G](4)+1x800G[400G](4)": ["etp38a", "etp38b", "etp38c"] } }, "Ethernet304": { @@ -963,7 +1009,8 @@ "1x800G": ["etp39"], "2x800G[400G]": ["etp39a", "etp39b"], "4x400G[200G]": ["etp39a", "etp39b", "etp39c", "etp39d"], - "8x200G[100G]": ["etp39a", "etp39b", "etp39c", "etp39d", "etp39e", "etp39f", "etp39g", "etp39h"] + "8x200G[100G]": ["etp39a", "etp39b", "etp39c", "etp39d", "etp39e", "etp39f", "etp39g", "etp39h"], + "2x400G[200G](4)+1x800G[400G](4)": ["etp39a", "etp39b", "etp39c"] } }, "Ethernet312": { @@ -973,7 +1020,8 @@ "1x800G": ["etp40"], "2x800G[400G]": ["etp40a", "etp40b"], "4x400G[200G]": ["etp40a", "etp40b", "etp40c", "etp40d"], - "8x200G[100G]": ["etp40a", "etp40b", "etp40c", "etp40d", "etp40e", "etp40f", "etp40g", "etp40h"] + "8x200G[100G]": ["etp40a", "etp40b", "etp40c", "etp40d", "etp40e", "etp40f", "etp40g", "etp40h"], + "2x400G[200G](4)+1x800G[400G](4)": ["etp40a", "etp40b", "etp40c"] } }, "Ethernet320": { @@ -983,7 +1031,8 @@ "1x800G": ["etp41"], "2x800G[400G]": ["etp41a", "etp41b"], "4x400G[200G]": ["etp41a", "etp41b", "etp41c", "etp41d"], - "8x200G[100G]": ["etp41a", "etp41b", "etp41c", "etp41d", "etp41e", "etp41f", "etp41g", "etp41h"] + "8x200G[100G]": ["etp41a", "etp41b", "etp41c", "etp41d", "etp41e", "etp41f", "etp41g", "etp41h"], + "2x400G[200G](4)+1x800G[400G](4)": ["etp41a", "etp41b", "etp41c"] } }, "Ethernet328": { @@ -993,7 +1042,8 @@ "1x800G": ["etp42"], "2x800G[400G]": ["etp42a", "etp42b"], "4x400G[200G]": ["etp42a", "etp42b", "etp42c", "etp42d"], - "8x200G[100G]": ["etp42a", "etp42b", "etp42c", "etp42d", "etp42e", "etp42f", "etp42g", "etp42h"] + "8x200G[100G]": ["etp42a", "etp42b", "etp42c", "etp42d", "etp42e", "etp42f", "etp42g", "etp42h"], + "2x400G[200G](4)+1x800G[400G](4)": ["etp42a", "etp42b", "etp42c"] } }, "Ethernet336": { @@ -1003,7 +1053,8 @@ "1x800G": ["etp43"], "2x800G[400G]": ["etp43a", "etp43b"], "4x400G[200G]": ["etp43a", "etp43b", "etp43c", "etp43d"], - "8x200G[100G]": ["etp43a", "etp43b", "etp43c", "etp43d", "etp43e", "etp43f", "etp43g", "etp43h"] + "8x200G[100G]": ["etp43a", "etp43b", "etp43c", "etp43d", "etp43e", "etp43f", "etp43g", "etp43h"], + "2x400G[200G](4)+1x800G[400G](4)": ["etp43a", "etp43b", "etp43c"] } }, "Ethernet344": { @@ -1013,7 +1064,8 @@ "1x800G": ["etp44"], "2x800G[400G]": ["etp44a", "etp44b"], "4x400G[200G]": ["etp44a", "etp44b", "etp44c", "etp44d"], - "8x200G[100G]": ["etp44a", "etp44b", "etp44c", "etp44d", "etp44e", "etp44f", "etp44g", "etp44h"] + "8x200G[100G]": ["etp44a", "etp44b", "etp44c", "etp44d", "etp44e", "etp44f", "etp44g", "etp44h"], + "2x400G[200G](4)+1x800G[400G](4)": ["etp44a", "etp44b", "etp44c"] } }, "Ethernet352": { @@ -1023,7 +1075,8 @@ "1x800G": ["etp45"], "2x800G[400G]": ["etp45a", "etp45b"], "4x400G[200G]": ["etp45a", "etp45b", "etp45c", "etp45d"], - "8x200G[100G]": ["etp45a", "etp45b", "etp45c", "etp45d", "etp45e", "etp45f", "etp45g", "etp45h"] + "8x200G[100G]": ["etp45a", "etp45b", "etp45c", "etp45d", "etp45e", "etp45f", "etp45g", "etp45h"], + "2x400G[200G](4)+1x800G[400G](4)": ["etp45a", "etp45b", "etp45c"] } }, "Ethernet360": { @@ -1033,7 +1086,8 @@ "1x800G": ["etp46"], "2x800G[400G]": ["etp46a", "etp46b"], "4x400G[200G]": ["etp46a", "etp46b", "etp46c", "etp46d"], - "8x200G[100G]": ["etp46a", "etp46b", "etp46c", "etp46d", "etp46e", "etp46f", "etp46g", "etp46h"] + "8x200G[100G]": ["etp46a", "etp46b", "etp46c", "etp46d", "etp46e", "etp46f", "etp46g", "etp46h"], + "2x400G[200G](4)+1x800G[400G](4)": ["etp46a", "etp46b", "etp46c"] } }, "Ethernet368": { @@ -1043,7 +1097,8 @@ "1x800G": ["etp47"], "2x800G[400G]": ["etp47a", "etp47b"], "4x400G[200G]": ["etp47a", "etp47b", "etp47c", "etp47d"], - "8x200G[100G]": ["etp47a", "etp47b", "etp47c", "etp47d", "etp47e", "etp47f", "etp47g", "etp47h"] + "8x200G[100G]": ["etp47a", "etp47b", "etp47c", "etp47d", "etp47e", "etp47f", "etp47g", "etp47h"], + "2x400G[200G](4)+1x800G[400G](4)": ["etp47a", "etp47b", "etp47c"] } }, "Ethernet376": { @@ -1053,7 +1108,8 @@ "1x800G": ["etp48"], "2x800G[400G]": ["etp48a", "etp48b"], "4x400G[200G]": ["etp48a", "etp48b", "etp48c", "etp48d"], - "8x200G[100G]": ["etp48a", "etp48b", "etp48c", "etp48d", "etp48e", "etp48f", "etp48g", "etp48h"] + "8x200G[100G]": ["etp48a", "etp48b", "etp48c", "etp48d", "etp48e", "etp48f", "etp48g", "etp48h"], + "2x400G[200G](4)+1x800G[400G](4)": ["etp48a", "etp48b", "etp48c"] } }, "Ethernet384": { @@ -1063,7 +1119,8 @@ "1x800G": ["etp49"], "2x800G[400G]": ["etp49a", "etp49b"], "4x400G[200G]": ["etp49a", "etp49b", "etp49c", "etp49d"], - "8x200G[100G]": ["etp49a", "etp49b", "etp49c", "etp49d", "etp49e", "etp49f", "etp49g", "etp49h"] + "8x200G[100G]": ["etp49a", "etp49b", "etp49c", "etp49d", "etp49e", "etp49f", "etp49g", "etp49h"], + "2x400G[200G](4)+1x800G[400G](4)": ["etp49a", "etp49b", "etp49c"] } }, "Ethernet392": { @@ -1073,7 +1130,8 @@ "1x800G": ["etp50"], "2x800G[400G]": ["etp50a", "etp50b"], "4x400G[200G]": ["etp50a", "etp50b", "etp50c", "etp50d"], - "8x200G[100G]": ["etp50a", "etp50b", "etp50c", "etp50d", "etp50e", "etp50f", "etp50g", "etp50h"] + "8x200G[100G]": ["etp50a", "etp50b", "etp50c", "etp50d", "etp50e", "etp50f", "etp50g", "etp50h"], + "2x400G[200G](4)+1x800G[400G](4)": ["etp50a", "etp50b", "etp50c"] } }, "Ethernet400": { @@ -1083,7 +1141,8 @@ "1x800G": ["etp51"], "2x800G[400G]": ["etp51a", "etp51b"], "4x400G[200G]": ["etp51a", "etp51b", "etp51c", "etp51d"], - "8x200G[100G]": ["etp51a", "etp51b", "etp51c", "etp51d", "etp51e", "etp51f", "etp51g", "etp51h"] + "8x200G[100G]": ["etp51a", "etp51b", "etp51c", "etp51d", "etp51e", "etp51f", "etp51g", "etp51h"], + "2x400G[200G](4)+1x800G[400G](4)": ["etp51a", "etp51b", "etp51c"] } }, "Ethernet408": { @@ -1093,7 +1152,8 @@ "1x800G": ["etp52"], "2x800G[400G]": ["etp52a", "etp52b"], "4x400G[200G]": ["etp52a", "etp52b", "etp52c", "etp52d"], - "8x200G[100G]": ["etp52a", "etp52b", "etp52c", "etp52d", "etp52e", "etp52f", "etp52g", "etp52h"] + "8x200G[100G]": ["etp52a", "etp52b", "etp52c", "etp52d", "etp52e", "etp52f", "etp52g", "etp52h"], + "2x400G[200G](4)+1x800G[400G](4)": ["etp52a", "etp52b", "etp52c"] } }, "Ethernet416": { @@ -1103,7 +1163,8 @@ "1x800G": ["etp53"], "2x800G[400G]": ["etp53a", "etp53b"], "4x400G[200G]": ["etp53a", "etp53b", "etp53c", "etp53d"], - "8x200G[100G]": ["etp53a", "etp53b", "etp53c", "etp53d", "etp53e", "etp53f", "etp53g", "etp53h"] + "8x200G[100G]": ["etp53a", "etp53b", "etp53c", "etp53d", "etp53e", "etp53f", "etp53g", "etp53h"], + "2x400G[200G](4)+1x800G[400G](4)": ["etp53a", "etp53b", "etp53c"] } }, "Ethernet424": { @@ -1113,7 +1174,8 @@ "1x800G": ["etp54"], "2x800G[400G]": ["etp54a", "etp54b"], "4x400G[200G]": ["etp54a", "etp54b", "etp54c", "etp54d"], - "8x200G[100G]": ["etp54a", "etp54b", "etp54c", "etp54d", "etp54e", "etp54f", "etp54g", "etp54h"] + "8x200G[100G]": ["etp54a", "etp54b", "etp54c", "etp54d", "etp54e", "etp54f", "etp54g", "etp54h"], + "2x400G[200G](4)+1x800G[400G](4)": ["etp54a", "etp54b", "etp54c"] } }, "Ethernet432": { @@ -1123,7 +1185,8 @@ "1x800G": ["etp55"], "2x800G[400G]": ["etp55a", "etp55b"], "4x400G[200G]": ["etp55a", "etp55b", "etp55c", "etp55d"], - "8x200G[100G]": ["etp55a", "etp55b", "etp55c", "etp55d", "etp55e", "etp55f", "etp55g", "etp55h"] + "8x200G[100G]": ["etp55a", "etp55b", "etp55c", "etp55d", "etp55e", "etp55f", "etp55g", "etp55h"], + "2x400G[200G](4)+1x800G[400G](4)": ["etp55a", "etp55b", "etp55c"] } }, "Ethernet440": { @@ -1133,7 +1196,8 @@ "1x800G": ["etp56"], "2x800G[400G]": ["etp56a", "etp56b"], "4x400G[200G]": ["etp56a", "etp56b", "etp56c", "etp56d"], - "8x200G[100G]": ["etp56a", "etp56b", "etp56c", "etp56d", "etp56e", "etp56f", "etp56g", "etp56h"] + "8x200G[100G]": ["etp56a", "etp56b", "etp56c", "etp56d", "etp56e", "etp56f", "etp56g", "etp56h"], + "2x400G[200G](4)+1x800G[400G](4)": ["etp56a", "etp56b", "etp56c"] } }, "Ethernet448": { @@ -1143,7 +1207,8 @@ "1x800G": ["etp57"], "2x800G[400G]": ["etp57a", "etp57b"], "4x400G[200G]": ["etp57a", "etp57b", "etp57c", "etp57d"], - "8x200G[100G]": ["etp57a", "etp57b", "etp57c", "etp57d", "etp57e", "etp57f", "etp57g", "etp57h"] + "8x200G[100G]": ["etp57a", "etp57b", "etp57c", "etp57d", "etp57e", "etp57f", "etp57g", "etp57h"], + "2x400G[200G](4)+1x800G[400G](4)": ["etp57a", "etp57b", "etp57c"] } }, "Ethernet456": { @@ -1153,7 +1218,8 @@ "1x800G": ["etp58"], "2x800G[400G]": ["etp58a", "etp58b"], "4x400G[200G]": ["etp58a", "etp58b", "etp58c", "etp58d"], - "8x200G[100G]": ["etp58a", "etp58b", "etp58c", "etp58d", "etp58e", "etp58f", "etp58g", "etp58h"] + "8x200G[100G]": ["etp58a", "etp58b", "etp58c", "etp58d", "etp58e", "etp58f", "etp58g", "etp58h"], + "2x400G[200G](4)+1x800G[400G](4)": ["etp58a", "etp58b", "etp58c"] } }, "Ethernet464": { @@ -1163,7 +1229,8 @@ "1x800G": ["etp59"], "2x800G[400G]": ["etp59a", "etp59b"], "4x400G[200G]": ["etp59a", "etp59b", "etp59c", "etp59d"], - "8x200G[100G]": ["etp59a", "etp59b", "etp59c", "etp59d", "etp59e", "etp59f", "etp59g", "etp59h"] + "8x200G[100G]": ["etp59a", "etp59b", "etp59c", "etp59d", "etp59e", "etp59f", "etp59g", "etp59h"], + "2x400G[200G](4)+1x800G[400G](4)": ["etp59a", "etp59b", "etp59c"] } }, "Ethernet472": { @@ -1173,7 +1240,8 @@ "1x800G": ["etp60"], "2x800G[400G]": ["etp60a", "etp60b"], "4x400G[200G]": ["etp60a", "etp60b", "etp60c", "etp60d"], - "8x200G[100G]": ["etp60a", "etp60b", "etp60c", "etp60d", "etp60e", "etp60f", "etp60g", "etp60h"] + "8x200G[100G]": ["etp60a", "etp60b", "etp60c", "etp60d", "etp60e", "etp60f", "etp60g", "etp60h"], + "2x400G[200G](4)+1x800G[400G](4)": ["etp60a", "etp60b", "etp60c"] } }, "Ethernet480": { @@ -1183,7 +1251,8 @@ "1x800G": ["etp61"], "2x800G[400G]": ["etp61a", "etp61b"], "4x400G[200G]": ["etp61a", "etp61b", "etp61c", "etp61d"], - "8x200G[100G]": ["etp61a", "etp61b", "etp61c", "etp61d", "etp61e", "etp61f", "etp61g", "etp61h"] + "8x200G[100G]": ["etp61a", "etp61b", "etp61c", "etp61d", "etp61e", "etp61f", "etp61g", "etp61h"], + "2x400G[200G](4)+1x800G[400G](4)": ["etp61a", "etp61b", "etp61c"] } }, "Ethernet488": { @@ -1193,7 +1262,8 @@ "1x800G": ["etp62"], "2x800G[400G]": ["etp62a", "etp62b"], "4x400G[200G]": ["etp62a", "etp62b", "etp62c", "etp62d"], - "8x200G[100G]": ["etp62a", "etp62b", "etp62c", "etp62d", "etp62e", "etp62f", "etp62g", "etp62h"] + "8x200G[100G]": ["etp62a", "etp62b", "etp62c", "etp62d", "etp62e", "etp62f", "etp62g", "etp62h"], + "2x400G[200G](4)+1x800G[400G](4)": ["etp62a", "etp62b", "etp62c"] } }, "Ethernet496": { @@ -1203,7 +1273,8 @@ "1x800G": ["etp63"], "2x800G[400G]": ["etp63a", "etp63b"], "4x400G[200G]": ["etp63a", "etp63b", "etp63c", "etp63d"], - "8x200G[100G]": ["etp63a", "etp63b", "etp63c", "etp63d", "etp63e", "etp63f", "etp63g", "etp63h"] + "8x200G[100G]": ["etp63a", "etp63b", "etp63c", "etp63d", "etp63e", "etp63f", "etp63g", "etp63h"], + "2x400G[200G](4)+1x800G[400G](4)": ["etp63a", "etp63b", "etp63c"] } }, "Ethernet504": { @@ -1213,7 +1284,8 @@ "1x800G": ["etp64"], "2x800G[400G]": ["etp64a", "etp64b"], "4x400G[200G]": ["etp64a", "etp64b", "etp64c", "etp64d"], - "8x200G[100G]": ["etp64a", "etp64b", "etp64c", "etp64d", "etp64e", "etp64f", "etp64g", "etp64h"] + "8x200G[100G]": ["etp64a", "etp64b", "etp64c", "etp64d", "etp64e", "etp64f", "etp64g", "etp64h"], + "2x400G[200G](4)+1x800G[400G](4)": ["etp64a", "etp64b", "etp64c"] } }, "Ethernet512": { diff --git a/device/mellanox/x86_64-nvidia_sn6600_ld-r0/platform_env.conf b/device/mellanox/x86_64-nvidia_sn6600_ld-r0/platform_env.conf new file mode 100644 index 00000000000..b5772a8c933 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn6600_ld-r0/platform_env.conf @@ -0,0 +1 @@ +switch_host=1 diff --git a/device/mellanox/x86_64-nvidia_sn6600_ld-r0/pmon_daemon_control.json b/device/mellanox/x86_64-nvidia_sn6600_ld-r0/pmon_daemon_control.json index ca8217157e9..a849dbbe779 100644 --- a/device/mellanox/x86_64-nvidia_sn6600_ld-r0/pmon_daemon_control.json +++ b/device/mellanox/x86_64-nvidia_sn6600_ld-r0/pmon_daemon_control.json @@ -3,5 +3,8 @@ "thermalctld": { "enable_liquid_cooling": true, "liquid_cooling_update_interval": 0.5 - } + }, + "xcvrd": { + "dom_temperature_poll_interval": 20 + } } diff --git a/device/mellanox/x86_64-nvidia_sn6600_ld-r0/system_health_monitoring_config.json b/device/mellanox/x86_64-nvidia_sn6600_ld-r0/system_health_monitoring_config.json index cbe2d9a922a..e46ebd2ce5b 100644 --- a/device/mellanox/x86_64-nvidia_sn6600_ld-r0/system_health_monitoring_config.json +++ b/device/mellanox/x86_64-nvidia_sn6600_ld-r0/system_health_monitoring_config.json @@ -5,8 +5,8 @@ "include_devices": ["liquid_cooling"], "polling_interval": 60, "led_color": { - "fault": "orange", + "fault": "amber", "normal": "green", - "booting": "orange_blink" + "booting": "amber_blink" } } diff --git a/device/mellanox/x86_64-nvidia_sn6600_simx-r0/create_only_config_db_buffers.json b/device/mellanox/x86_64-nvidia_sn6600_simx-r0/create_only_config_db_buffers.json new file mode 120000 index 00000000000..87e12387fcd --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn6600_simx-r0/create_only_config_db_buffers.json @@ -0,0 +1 @@ +../x86_64-mlnx_msn2700-r0/create_only_config_db_buffers.json \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn6600_simx-r0/platform.json b/device/mellanox/x86_64-nvidia_sn6600_simx-r0/platform.json index d7b7964fe87..afed44db7a3 100644 --- a/device/mellanox/x86_64-nvidia_sn6600_simx-r0/platform.json +++ b/device/mellanox/x86_64-nvidia_sn6600_simx-r0/platform.json @@ -24,9 +24,18 @@ "name": "CPLD4" } ], + "pdbs": [ + { + "name": "PDB 1" + }, + { + "name": "PDB 2" + } + ], "thermals": [ { - "name": "ASIC" + "name": "ASIC", + "polling_interval": 3 }, { "name": "Ambient COMEX Temp" diff --git a/device/mellanox/x86_64-nvidia_sn6600_simx-r0/system_health_monitoring_config.json b/device/mellanox/x86_64-nvidia_sn6600_simx-r0/system_health_monitoring_config.json index 23cb74dd3f9..41ec1c2339f 100644 --- a/device/mellanox/x86_64-nvidia_sn6600_simx-r0/system_health_monitoring_config.json +++ b/device/mellanox/x86_64-nvidia_sn6600_simx-r0/system_health_monitoring_config.json @@ -4,8 +4,8 @@ "user_defined_checkers": [], "polling_interval": 60, "led_color": { - "fault": "orange", + "fault": "amber", "normal": "green", - "booting": "orange_blink" + "booting": "amber_blink" } } diff --git a/device/mellanox/x86_64-nvidia_sn6810_ld-r0/ACS-SN6810_LD/buffers.json.j2 b/device/mellanox/x86_64-nvidia_sn6810_ld-r0/ACS-SN6810_LD/buffers.json.j2 new file mode 120000 index 00000000000..add8bf8bb7c --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn6810_ld-r0/ACS-SN6810_LD/buffers.json.j2 @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/buffers.json.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn6810_ld-r0/ACS-SN6810_LD/buffers_defaults_objects.j2 b/device/mellanox/x86_64-nvidia_sn6810_ld-r0/ACS-SN6810_LD/buffers_defaults_objects.j2 new file mode 100644 index 00000000000..fa649ca092e --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn6810_ld-r0/ACS-SN6810_LD/buffers_defaults_objects.j2 @@ -0,0 +1,254 @@ +{# + SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES + Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + SPDX-License-Identifier: Apache-2.0 + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +#} + +{# Base on file: https://github.com/nvidia-sonic/sonic-buildimage/blob/master/device/mellanox/x86_64-mlnx_msn2700-r0/ACS-MSN2700/buffers_defaults_objects.j2 #} + +{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %} + "BUFFER_POOL": { + {% if dynamic_mode is not defined and port_names_inactive|length > 0 -%} + "ingress_zero_pool" : { + "mode": "static", + "type": "ingress", + "size": "0" + }, + {% endif -%} + "ingress_lossless_pool": { + {% if dynamic_mode is not defined -%} + "size": "{{ ingress_lossless_pool_size }}", + {% endif -%} + "type": "ingress", + "mode": "dynamic" + }, + "ingress_lossy_pool": { + {% if dynamic_mode is not defined -%} + "size": "{{ ingress_lossy_pool_size }}", + {% endif -%} + "type": "ingress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "{{ egress_lossless_pool_size }}", + "type": "egress", + "mode": "dynamic" + }, + "egress_lossy_pool": { + {% if dynamic_mode is not defined -%} + "size": "{{ egress_lossy_pool_size }}", + {% endif -%} + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + {% if dynamic_mode is not defined and port_names_inactive|length > 0 -%} + "ingress_lossy_pg_zero_profile" : { + "pool":"ingress_zero_pool", + "size":"0", + "static_th":"0" + }, + "ingress_lossless_zero_profile" : { + "pool":"ingress_lossless_pool", + "size":"0", + "dynamic_th":"-8" + }, + "ingress_lossy_zero_profile" : { + "pool":"ingress_lossy_pool", + "size":"0", + "dynamic_th":"-8" + }, + "egress_lossless_zero_profile" : { + "pool":"egress_lossless_pool", + "size":"0", + "dynamic_th":"-8" + }, + "egress_lossy_zero_profile" : { + "pool":"egress_lossy_pool", + "size":"0", + "dynamic_th":"-8" + }, + {% endif -%} + "ingress_lossless_profile": { + "pool":"ingress_lossless_pool", + "size":"0", + "dynamic_th":"1" + }, + "ingress_lossy_port_profile": { + "pool":"ingress_lossy_pool", + "size":"0", + "dynamic_th":"4" + }, + "egress_lossless_profile": { + "pool":"egress_lossless_pool", + "size":"0", + "dynamic_th":"7" + }, + "egress_lossy_profile": { + "pool":"egress_lossy_pool", + "size":"0", + "dynamic_th":"1" + }, + "q_lossy_profile": { + "pool":"egress_lossy_pool", + "size":"2048", + "dynamic_th":"0" + }, + "ingress_lossy_profile": { + "pool":"ingress_lossy_pool", + "size":"0", + "dynamic_th":"0" + } + }, +{%- endmacro %} + +{%- macro generate_profile_lists(port_names_active, port_names_inactive) %} + "BUFFER_PORT_INGRESS_PROFILE_LIST": { +{% for port in port_names_active.split(',') %} + "{{ port }}": { + "profile_list" : "ingress_lossless_profile,ingress_lossy_port_profile" + }{% if not loop.last %},{% endif %} + +{% endfor %} +{% if port_names_inactive|length > 0 %} +, +{% for port in port_names_inactive.split(',') %} + "{{ port }}": { +{% if dynamic_mode is defined %} + "profile_list" : "ingress_lossless_profile,ingress_lossy_port_profile" +{% else %} + "profile_list" : "ingress_lossless_zero_profile,ingress_lossy_zero_profile" +{% endif %} + }{% if not loop.last %},{% endif %} + +{% endfor %} +{% endif %} + }, + "BUFFER_PORT_EGRESS_PROFILE_LIST": { +{% for port in port_names_active.split(',') %} + "{{ port }}": { + "profile_list" : "egress_lossless_profile,egress_lossy_profile" + }{% if not loop.last %},{% endif %} + +{% endfor %} +{% if port_names_inactive|length > 0 %} +, +{% for port in port_names_inactive.split(',') %} + "{{ port }}": { +{% if dynamic_mode is defined %} + "profile_list" : "egress_lossless_profile,egress_lossy_profile" +{% else %} + "profile_list" : "egress_lossless_zero_profile,egress_lossy_zero_profile" +{% endif %} + }{% if not loop.last %},{% endif %} + +{% endfor %} +{% endif %} + } +{%- endmacro %} + +{%- macro generate_queue_buffers(port_names_active, port_names_inactive) %} + "BUFFER_QUEUE": { +{% for port in port_names_active.split(',') %} + "{{ port }}|3-4": { + "profile" : "egress_lossless_profile" + }, +{% endfor %} +{% for port in port_names_active.split(',') %} + "{{ port }}|0-2": { + "profile" : "q_lossy_profile" + }, +{% endfor %} +{% for port in port_names_active.split(',') %} + "{{ port }}|5-6": { + "profile" : "q_lossy_profile" + }{% if not loop.last %},{% endif %} + +{% endfor %} +{% if port_names_inactive|length > 0 %} +, +{% if dynamic_mode is defined %} +{% for port in port_names_inactive.split(',') %} + "{{ port }}|3-4": { + "profile" : "egress_lossless_profile" + }, +{% endfor %} +{% for port in port_names_inactive.split(',') %} + "{{ port }}|0-2": { + "profile" : "q_lossy_profile" + }, +{% endfor %} +{% for port in port_names_inactive.split(',') %} + "{{ port }}|5-6": { + "profile" : "q_lossy_profile" + }{% if not loop.last %},{% endif %} + +{% endfor %} +{% else %} +{% for port in port_names_inactive.split(',') %} + "{{ port }}|3-4": { + "profile" : "egress_lossless_zero_profile" + }, +{% endfor %} +{% for port in port_names_inactive.split(',') %} + "{{ port }}|0-2": { + "profile" : "q_lossy_profile" + }, +{% endfor %} +{% for port in port_names_inactive.split(',') %} + "{{ port }}|5-6": { + "profile" : "q_lossy_profile" + }{% if not loop.last %},{% endif %} + +{% endfor %} +{% endif %} +{% endif %} + } +{%- endmacro %} + +{%- macro generate_pg_profiles(port_names_active, port_names_inactive) %} + "BUFFER_PG": { +{% for port in port_names_active.split(',') %} +{% if dynamic_mode is defined %} + "{{ port }}|3-4": { + "profile" : "NULL" + }, +{% endif %} + "{{ port }}|0": { + "profile" : "ingress_lossy_profile" + }{% if not loop.last %},{% endif %} + +{% endfor %} +{% if port_names_inactive|length > 0 %} +{%- for port in port_names_inactive.split(',') %} + {%- if loop.first -%},{%- endif -%} +{% if dynamic_mode is defined %} + "{{ port }}|3-4": { + "profile" : "NULL" + }, +{% endif %} + "{{ port }}|0": { +{% if dynamic_mode is defined %} + "profile" : "ingress_lossy_profile" +{% else %} + "profile" : "ingress_lossy_pg_zero_profile" +{% endif %} + }{% if not loop.last %},{% endif %} + +{% endfor %} +{% endif %} + } +{%- endmacro %} diff --git a/device/mellanox/x86_64-nvidia_sn6810_ld-r0/ACS-SN6810_LD/buffers_defaults_t0.j2 b/device/mellanox/x86_64-nvidia_sn6810_ld-r0/ACS-SN6810_LD/buffers_defaults_t0.j2 new file mode 100644 index 00000000000..a73b4e514cc --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn6810_ld-r0/ACS-SN6810_LD/buffers_defaults_t0.j2 @@ -0,0 +1,40 @@ +{# + SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES + Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + Apache-2.0 + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +#} +{% set default_cable = '5m' %} +{% set ingress_lossless_pool_size = '81007616' %} +{% set ingress_lossy_pool_size = '81007616' %} +{% set egress_lossless_pool_size = '224143360' %} +{% set egress_lossy_pool_size = '81007616' %} + +{% import 'buffers_defaults_objects.j2' as defs with context %} + +{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %} +{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }} +{%- endmacro %} diff --git a/device/mellanox/x86_64-nvidia_sn6810_ld-r0/ACS-SN6810_LD/buffers_defaults_t1.j2 b/device/mellanox/x86_64-nvidia_sn6810_ld-r0/ACS-SN6810_LD/buffers_defaults_t1.j2 new file mode 100644 index 00000000000..30108aaba58 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn6810_ld-r0/ACS-SN6810_LD/buffers_defaults_t1.j2 @@ -0,0 +1,40 @@ +{# + SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES + Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + Apache-2.0 + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +#} +{% set default_cable = '40m' %} +{% set ingress_lossless_pool_size = '60167168' %} +{% set ingress_lossy_pool_size = '60167168' %} +{% set egress_lossless_pool_size = '224143360' %} +{% set egress_lossy_pool_size = '60167168' %} + +{% import 'buffers_defaults_objects.j2' as defs with context %} + +{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %} +{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }} +{%- endmacro %} diff --git a/device/mellanox/x86_64-nvidia_sn6810_ld-r0/ACS-SN6810_LD/buffers_dynamic.json.j2 b/device/mellanox/x86_64-nvidia_sn6810_ld-r0/ACS-SN6810_LD/buffers_dynamic.json.j2 new file mode 100644 index 00000000000..2c7f4fa1ae1 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn6810_ld-r0/ACS-SN6810_LD/buffers_dynamic.json.j2 @@ -0,0 +1,20 @@ +{# + SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES + Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + Apache-2.0 + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +#} +{%- set default_topo = 't0' %} +{%- set dynamic_mode = 'true' %} +{%- include 'buffers_config.j2' %} diff --git a/device/mellanox/x86_64-nvidia_sn6810_ld-r0/ACS-SN6810_LD/create_only_config_db_buffers.json b/device/mellanox/x86_64-nvidia_sn6810_ld-r0/ACS-SN6810_LD/create_only_config_db_buffers.json new file mode 100644 index 00000000000..6feb156714f --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn6810_ld-r0/ACS-SN6810_LD/create_only_config_db_buffers.json @@ -0,0 +1,7 @@ +{ + "DEVICE_METADATA": { + "localhost": { + "create_only_config_db_buffers": "true" + } + } +} diff --git a/device/mellanox/x86_64-nvidia_sn6810_ld-r0/ACS-SN6810_LD/hwsku.json b/device/mellanox/x86_64-nvidia_sn6810_ld-r0/ACS-SN6810_LD/hwsku.json new file mode 100644 index 00000000000..e72cc6a43a2 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn6810_ld-r0/ACS-SN6810_LD/hwsku.json @@ -0,0 +1,522 @@ +{ + "interfaces": { + "Ethernet0": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet4": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet8": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet12": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet16": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet20": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet24": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet28": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet32": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet36": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet40": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet44": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet48": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet52": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet56": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet60": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet64": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet68": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet72": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet76": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet80": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet84": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet88": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet92": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet96": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet100": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet104": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet108": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet112": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet116": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet120": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet124": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet128": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet132": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet136": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet140": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet144": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet148": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet152": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet156": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet160": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet164": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet168": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet172": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet176": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet180": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet184": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet188": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet192": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet196": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet200": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet204": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet208": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet212": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet216": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet220": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet224": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet228": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet232": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet236": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet240": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet244": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet248": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet252": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet256": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet260": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet264": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet268": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet272": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet276": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet280": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet284": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet288": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet292": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet296": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet300": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet304": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet308": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet312": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet316": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet320": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet324": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet328": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet332": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet336": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet340": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet344": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet348": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet352": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet356": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet360": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet364": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet368": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet372": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet376": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet380": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet384": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet388": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet392": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet396": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet400": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet404": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet408": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet412": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet416": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet420": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet424": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet428": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet432": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet436": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet440": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet444": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet448": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet452": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet456": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet460": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet464": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet468": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet472": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet476": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet480": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet484": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet488": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet492": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet496": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet500": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet504": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet508": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet512": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet513": { + "default_brkout_mode": "1x25G[10G]" + } + } +} \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn6810_ld-r0/ACS-SN6810_LD/pg_profile_lookup.ini b/device/mellanox/x86_64-nvidia_sn6810_ld-r0/ACS-SN6810_LD/pg_profile_lookup.ini new file mode 100644 index 00000000000..04129ddfb9e --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn6810_ld-r0/ACS-SN6810_LD/pg_profile_lookup.ini @@ -0,0 +1,33 @@ +## +## SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +## Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +## Apache-2.0 +## +## Licensed under the Apache License, Version 2.0 (the "License"); +## you may not use this file except in compliance with the License. +## You may obtain a copy of the License at +## +## http://www.apache.org/licenses/LICENSE-2.0 +## +## Unless required by applicable law or agreed to in writing, software +## distributed under the License is distributed on an "AS IS" BASIS, +## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +## See the License for the specific language governing permissions and +## limitations under the License. +## +# PG lossless profiles. +# speed cable size xon xoff threshold + 10000 5m 63488 43008 20480 0 + 25000 5m 64512 43008 21504 0 + 100000 5m 87040 43008 44032 0 + 200000 5m 91136 43008 48128 0 + 400000 5m 124928 43008 81920 0 + 800000 5m 190464 43008 147456 0 + 100000 40m 91136 43008 48128 0 + 200000 40m 101376 43008 58368 0 + 400000 40m 144384 43008 101376 0 + 800000 40m 229376 43008 186368 0 + 100000 300m 128000 43008 84992 0 + 200000 300m 173056 43008 130048 0 + 400000 300m 287744 43008 244736 0 + 800000 300m 516096 43008 473088 0 \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn6810_ld-r0/ACS-SN6810_LD/port_config.ini b/device/mellanox/x86_64-nvidia_sn6810_ld-r0/ACS-SN6810_LD/port_config.ini new file mode 100644 index 00000000000..68eb7a93e8a --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn6810_ld-r0/ACS-SN6810_LD/port_config.ini @@ -0,0 +1,150 @@ +## +## SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +## Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +## Apache-2.0 +## +## Licensed under the Apache License, Version 2.0 (the "License"); +## you may not use this file except in compliance with the License. +## You may obtain a copy of the License at +## +## http://www.apache.org/licenses/LICENSE-2.0 +## +## Unless required by applicable law or agreed to in writing, software +## distributed under the License is distributed on an "AS IS" BASIS, +## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +## See the License for the specific language governing permissions and +## limitations under the License. +## + +# name lanes alias index speed type +Ethernet0 0,1,2,3 etp1 1 800000 cpo +Ethernet4 4,5,6,7 etp2 1 800000 cpo +Ethernet8 8,9,10,11 etp3 1 800000 cpo +Ethernet12 12,13,14,15 etp4 1 800000 cpo +Ethernet16 16,17,18,19 etp5 1 800000 cpo +Ethernet20 20,21,22,23 etp6 1 800000 cpo +Ethernet24 24,25,26,27 etp7 1 800000 cpo +Ethernet28 28,29,30,31 etp8 1 800000 cpo +Ethernet32 32,33,34,35 etp9 2 800000 cpo +Ethernet36 36,37,38,39 etp10 2 800000 cpo +Ethernet40 40,41,42,43 etp11 2 800000 cpo +Ethernet44 44,45,46,47 etp12 2 800000 cpo +Ethernet48 48,49,50,51 etp13 2 800000 cpo +Ethernet52 52,53,54,55 etp14 2 800000 cpo +Ethernet56 56,57,58,59 etp15 2 800000 cpo +Ethernet60 60,61,62,63 etp16 2 800000 cpo +Ethernet64 64,65,66,67 etp17 3 800000 cpo +Ethernet68 68,69,70,71 etp18 3 800000 cpo +Ethernet72 72,73,74,75 etp19 3 800000 cpo +Ethernet76 76,77,78,79 etp20 3 800000 cpo +Ethernet80 80,81,82,83 etp21 3 800000 cpo +Ethernet84 84,85,86,87 etp22 3 800000 cpo +Ethernet88 88,89,90,91 etp23 3 800000 cpo +Ethernet92 92,93,94,95 etp24 3 800000 cpo +Ethernet96 96,97,98,99 etp25 4 800000 cpo +Ethernet100 100,101,102,103 etp26 4 800000 cpo +Ethernet104 104,105,106,107 etp27 4 800000 cpo +Ethernet108 108,109,110,111 etp28 4 800000 cpo +Ethernet112 112,113,114,115 etp29 4 800000 cpo +Ethernet116 116,117,118,119 etp30 4 800000 cpo +Ethernet120 120,121,122,123 etp31 4 800000 cpo +Ethernet124 124,125,126,127 etp32 4 800000 cpo +Ethernet128 128,129,130,131 etp33 5 800000 cpo +Ethernet132 132,133,134,135 etp34 5 800000 cpo +Ethernet136 136,137,138,139 etp35 5 800000 cpo +Ethernet140 140,141,142,143 etp36 5 800000 cpo +Ethernet144 144,145,146,147 etp37 5 800000 cpo +Ethernet148 148,149,150,151 etp38 5 800000 cpo +Ethernet152 152,153,154,155 etp39 5 800000 cpo +Ethernet156 156,157,158,159 etp40 5 800000 cpo +Ethernet160 160,161,162,163 etp41 6 800000 cpo +Ethernet164 164,165,166,167 etp42 6 800000 cpo +Ethernet168 168,169,170,171 etp43 6 800000 cpo +Ethernet172 172,173,174,175 etp44 6 800000 cpo +Ethernet176 176,177,178,179 etp45 6 800000 cpo +Ethernet180 180,181,182,183 etp46 6 800000 cpo +Ethernet184 184,185,186,187 etp47 6 800000 cpo +Ethernet188 188,189,190,191 etp48 6 800000 cpo +Ethernet192 192,193,194,195 etp49 7 800000 cpo +Ethernet196 196,197,198,199 etp50 7 800000 cpo +Ethernet200 200,201,202,203 etp51 7 800000 cpo +Ethernet204 204,205,206,207 etp52 7 800000 cpo +Ethernet208 208,209,210,211 etp53 7 800000 cpo +Ethernet212 212,213,214,215 etp54 7 800000 cpo +Ethernet216 216,217,218,219 etp55 7 800000 cpo +Ethernet220 220,221,222,223 etp56 7 800000 cpo +Ethernet224 224,225,226,227 etp57 8 800000 cpo +Ethernet228 228,229,230,231 etp58 8 800000 cpo +Ethernet232 232,233,234,235 etp59 8 800000 cpo +Ethernet236 236,237,238,239 etp60 8 800000 cpo +Ethernet240 240,241,242,243 etp61 8 800000 cpo +Ethernet244 244,245,246,247 etp62 8 800000 cpo +Ethernet248 248,249,250,251 etp63 8 800000 cpo +Ethernet252 252,253,254,255 etp64 8 800000 cpo +Ethernet256 256,257,258,259 etp65 9 800000 cpo +Ethernet260 260,261,262,263 etp66 9 800000 cpo +Ethernet264 264,265,266,267 etp67 9 800000 cpo +Ethernet268 268,269,270,271 etp68 9 800000 cpo +Ethernet272 272,273,274,275 etp69 9 800000 cpo +Ethernet276 276,277,278,279 etp70 9 800000 cpo +Ethernet280 280,281,282,283 etp71 9 800000 cpo +Ethernet284 284,285,286,287 etp72 9 800000 cpo +Ethernet288 288,289,290,291 etp73 10 800000 cpo +Ethernet292 292,293,294,295 etp74 10 800000 cpo +Ethernet296 296,297,298,299 etp75 10 800000 cpo +Ethernet300 300,301,302,303 etp76 10 800000 cpo +Ethernet304 304,305,306,307 etp77 10 800000 cpo +Ethernet308 308,309,310,311 etp78 10 800000 cpo +Ethernet312 312,313,314,315 etp79 10 800000 cpo +Ethernet316 316,317,318,319 etp80 10 800000 cpo +Ethernet320 320,321,322,323 etp81 11 800000 cpo +Ethernet324 324,325,326,327 etp82 11 800000 cpo +Ethernet328 328,329,330,331 etp83 11 800000 cpo +Ethernet332 332,333,334,335 etp84 11 800000 cpo +Ethernet336 336,337,338,339 etp85 11 800000 cpo +Ethernet340 340,341,342,343 etp86 11 800000 cpo +Ethernet344 344,345,346,347 etp87 11 800000 cpo +Ethernet348 348,349,350,351 etp88 11 800000 cpo +Ethernet352 352,353,354,355 etp89 12 800000 cpo +Ethernet356 356,357,358,359 etp90 12 800000 cpo +Ethernet360 360,361,362,363 etp91 12 800000 cpo +Ethernet364 364,365,366,367 etp92 12 800000 cpo +Ethernet368 368,369,370,371 etp93 12 800000 cpo +Ethernet372 372,373,374,375 etp94 12 800000 cpo +Ethernet376 376,377,378,379 etp95 12 800000 cpo +Ethernet380 380,381,382,383 etp96 12 800000 cpo +Ethernet384 384,385,386,387 etp97 13 800000 cpo +Ethernet388 388,389,390,391 etp98 13 800000 cpo +Ethernet392 392,393,394,395 etp99 13 800000 cpo +Ethernet396 396,397,398,399 etp100 13 800000 cpo +Ethernet400 400,401,402,403 etp101 13 800000 cpo +Ethernet404 404,405,406,407 etp102 13 800000 cpo +Ethernet408 408,409,410,411 etp103 13 800000 cpo +Ethernet412 412,413,414,415 etp104 13 800000 cpo +Ethernet416 416,417,418,419 etp105 14 800000 cpo +Ethernet420 420,421,422,423 etp106 14 800000 cpo +Ethernet424 424,425,426,427 etp107 14 800000 cpo +Ethernet428 428,429,430,431 etp108 14 800000 cpo +Ethernet432 432,433,434,435 etp109 14 800000 cpo +Ethernet436 436,437,438,439 etp110 14 800000 cpo +Ethernet440 440,441,442,443 etp111 14 800000 cpo +Ethernet444 444,445,446,447 etp112 14 800000 cpo +Ethernet448 448,449,450,451 etp113 15 800000 cpo +Ethernet452 452,453,454,455 etp114 15 800000 cpo +Ethernet456 456,457,458,459 etp115 15 800000 cpo +Ethernet460 460,461,462,463 etp116 15 800000 cpo +Ethernet464 464,465,466,467 etp117 15 800000 cpo +Ethernet468 468,469,470,471 etp118 15 800000 cpo +Ethernet472 472,473,474,475 etp119 15 800000 cpo +Ethernet476 476,477,478,479 etp120 15 800000 cpo +Ethernet480 480,481,482,483 etp121 16 800000 cpo +Ethernet484 484,485,486,487 etp122 16 800000 cpo +Ethernet488 488,489,490,491 etp123 16 800000 cpo +Ethernet492 492,493,494,495 etp124 16 800000 cpo +Ethernet496 496,497,498,499 etp125 16 800000 cpo +Ethernet500 500,501,502,503 etp126 16 800000 cpo +Ethernet504 504,505,506,507 etp127 16 800000 cpo +Ethernet508 508,509,510,511 etp128 16 800000 cpo +Ethernet512 512 etp129a 17 25000 sfp +Ethernet513 513 etp129b 17 25000 sfp + diff --git a/device/mellanox/x86_64-nvidia_sn6810_ld-r0/ACS-SN6810_LD/qos.json.j2 b/device/mellanox/x86_64-nvidia_sn6810_ld-r0/ACS-SN6810_LD/qos.json.j2 new file mode 120000 index 00000000000..eccf286dc87 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn6810_ld-r0/ACS-SN6810_LD/qos.json.j2 @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/qos.json.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn6810_ld-r0/ACS-SN6810_LD/sai.profile b/device/mellanox/x86_64-nvidia_sn6810_ld-r0/ACS-SN6810_LD/sai.profile new file mode 100644 index 00000000000..353155a4c76 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn6810_ld-r0/ACS-SN6810_LD/sai.profile @@ -0,0 +1,3 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_6810_LD_0ports.xml +SAI_KEY_SPC5_LOSSY_SCHEDULING=1 +SAI_DEFAULT_SWITCHING_MODE_STORE_FORWARD=1 diff --git a/device/mellanox/x86_64-nvidia_sn6810_ld-r0/ACS-SN6810_LD/sai_6810_LD_0ports.xml b/device/mellanox/x86_64-nvidia_sn6810_ld-r0/ACS-SN6810_LD/sai_6810_LD_0ports.xml new file mode 100644 index 00000000000..fc7f53b5a23 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn6810_ld-r0/ACS-SN6810_LD/sai_6810_LD_0ports.xml @@ -0,0 +1,29 @@ + + + + + + + 00:02:03:04:05:00 + + + 1 + + + diff --git a/device/mellanox/x86_64-nvidia_sn6810_ld-r0/ACS-SN6810_LD/traffic_config.j2 b/device/mellanox/x86_64-nvidia_sn6810_ld-r0/ACS-SN6810_LD/traffic_config.j2 new file mode 100644 index 00000000000..fd69aa4797c --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn6810_ld-r0/ACS-SN6810_LD/traffic_config.j2 @@ -0,0 +1,34 @@ +{# + SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES + Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + Apache-2.0 + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + http://www.apache.org/licenses/LICENSE-2.0 + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +#} + +{# Set traffic_classification_enable to true for Bison platform #} +{%- set traffic_classification_enable = true %} + +{# +The calculation formula for wred_threshold_limit is as follows: +egress_lossless_pool total size / 12 / 1024 +Where: +- egress_lossless_pool total size = 136209408 bytes +- 12 represents the number of queues +- 1024 is used to convert the unit from bytes to KB + +The result is 11084 (rounded down). + +So, wred_threshold_limit = 136209408 / 12 / 1024 = 11084 (KB per queue) + +The final total value is: +11084 (KB) * 12 (queues) * 1024 = 136200192 bytes +#} +{% set wred_threshold_limit = 136200192 %} diff --git a/device/mellanox/x86_64-nvidia_sn6810_ld-r0/bmc.json b/device/mellanox/x86_64-nvidia_sn6810_ld-r0/bmc.json new file mode 100644 index 00000000000..5f7f1dee66e --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn6810_ld-r0/bmc.json @@ -0,0 +1,7 @@ +{ + "bmc_if_name": "usb0", + "bmc_if_addr": "169.254.0.2", + "bmc_addr": "169.254.0.1", + "bmc_net_mask": "255.255.255.252" +} + diff --git a/device/mellanox/x86_64-nvidia_sn6810_ld-r0/default_sku b/device/mellanox/x86_64-nvidia_sn6810_ld-r0/default_sku new file mode 100644 index 00000000000..d2169fc3775 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn6810_ld-r0/default_sku @@ -0,0 +1 @@ +ACS-SN6810_LD t1 diff --git a/device/mellanox/x86_64-nvidia_sn6810_ld-r0/installer.conf b/device/mellanox/x86_64-nvidia_sn6810_ld-r0/installer.conf new file mode 100644 index 00000000000..0010128e865 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn6810_ld-r0/installer.conf @@ -0,0 +1,2 @@ +VAR_LOG_SIZE=8192 +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="libata.force=noncq tpm_tis.interrupts=0 nosgx ima_hash=sha384 cpufreq.default_governor=performance" diff --git a/device/mellanox/x86_64-nvidia_sn6810_ld-r0/pcie.yaml b/device/mellanox/x86_64-nvidia_sn6810_ld-r0/pcie.yaml new file mode 100644 index 00000000000..f7217cd2f31 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn6810_ld-r0/pcie.yaml @@ -0,0 +1,207 @@ +## +## SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +## Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +## SPDX-License-Identifier: Apache-2.0 +## +## Licensed under the Apache License, Version 2.0 (the "License"); +## you may not use this file except in compliance with the License. +## You may obtain a copy of the License at +## +## http://www.apache.org/licenses/LICENSE-2.0 +## +## Unless required by applicable law or agreed to in writing, software +## distributed under the License is distributed on an "AS IS" BASIS, +## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +## See the License for the specific language governing permissions and +## limitations under the License. +## + +- bus: '00' + dev: '00' + fn: '0' + id: 14b5 + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h-19h PCIe Root + Complex (rev 01)' +- bus: '00' + dev: '00' + fn: '2' + id: 14b6 + name: 'IOMMU: Advanced Micro Devices, Inc. [AMD] Family 17h-19h IOMMU' +- bus: '00' + dev: '01' + fn: '0' + id: 14b7 + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h-19h PCIe Dummy + Host Bridge (rev 01)' +- bus: '00' + dev: '01' + fn: '3' + id: 14b8 + name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Family 17h-19h PCIe GPP Bridge' +- bus: '00' + dev: '02' + fn: '0' + id: 14b7 + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h-19h PCIe Dummy + Host Bridge (rev 01)' +- bus: '00' + dev: '02' + fn: '2' + id: 14ba + name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Family 17h-19h PCIe GPP Bridge' +- bus: '00' + dev: '03' + fn: '0' + id: 14b7 + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h-19h PCIe Dummy + Host Bridge (rev 01)' +- bus: '00' + dev: '04' + fn: '0' + id: 14b7 + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h-19h PCIe Dummy + Host Bridge (rev 01)' +- bus: '00' + dev: 08 + fn: '0' + id: 14b7 + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h-19h PCIe Dummy + Host Bridge (rev 01)' +- bus: '00' + dev: 08 + fn: '1' + id: 14b9 + name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Family 17h-19h Internal PCIe + GPP Bridge (rev 10)' +- bus: '00' + dev: 08 + fn: '2' + id: 14b9 + name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Family 17h-19h Internal PCIe + GPP Bridge (rev 10)' +- bus: '00' + dev: 08 + fn: '3' + id: 14b9 + name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Family 17h-19h Internal PCIe + GPP Bridge (rev 10)' +- bus: '00' + dev: '14' + fn: '0' + id: 790b + name: 'SMBus: Advanced Micro Devices, Inc. [AMD] FCH SMBus Controller (rev 71)' +- bus: '00' + dev: '14' + fn: '3' + id: 790e + name: 'ISA bridge: Advanced Micro Devices, Inc. [AMD] FCH LPC Bridge (rev 51)' +- bus: '00' + dev: '18' + fn: '0' + id: '1679' + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Rembrandt Data Fabric: Device + 18h; Function 0' +- bus: '00' + dev: '18' + fn: '1' + id: 167a + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Rembrandt Data Fabric: Device + 18h; Function 1' +- bus: '00' + dev: '18' + fn: '2' + id: 167b + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Rembrandt Data Fabric: Device + 18h; Function 2' +- bus: '00' + dev: '18' + fn: '3' + id: 167c + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Rembrandt Data Fabric: Device + 18h; Function 3' +- bus: '00' + dev: '18' + fn: '4' + id: 167d + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Rembrandt Data Fabric: Device + 18h; Function 4' +- bus: '00' + dev: '18' + fn: '5' + id: 167e + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Rembrandt Data Fabric: Device + 18h; Function 5' +- bus: '00' + dev: '18' + fn: '6' + id: 167f + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Rembrandt Data Fabric: Device + 18h; Function 6' +- bus: '00' + dev: '18' + fn: '7' + id: '1680' + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Rembrandt Data Fabric: Device + 18h; Function 7' +- bus: '01' + dev: '00' + fn: '0' + id: '2268' + name: 'Non-Volatile memory controller: Silicon Motion, Inc. SM2268XT (DRAM-less) + NVMe SSD Controller (rev 10)' +- bus: '02' + dev: '00' + fn: '0' + id: cf84 + name: 'Ethernet controller: Mellanox Technologies Spectrum-6 (rev a0)' +- bus: '03' + dev: '00' + fn: '0' + id: 145a + name: 'Non-Essential Instrumentation [1300]: Advanced Micro Devices, Inc. [AMD/ATI] + Dummy Function (absent graphics controller)' +- bus: '03' + dev: '00' + fn: '2' + id: '1649' + name: 'Encryption controller: Advanced Micro Devices, Inc. [AMD] Family 19h PSP/CCP' +- bus: '03' + dev: '00' + fn: '3' + id: 161d + name: 'USB controller: Advanced Micro Devices, Inc. [AMD] Rembrandt USB4 XHCI controller + #3' +- bus: '03' + dev: '00' + fn: '5' + id: 15e2 + name: 'Multimedia controller: Advanced Micro Devices, Inc. [AMD] Audio Coprocessor + (rev 60)' +- bus: '03' + dev: '00' + fn: '7' + id: 15e4 + name: 'Signal processing controller: Advanced Micro Devices, Inc. [AMD] Sensor Fusion + Hub' +- bus: '04' + dev: '00' + fn: '0' + id: 145a + name: 'Non-Essential Instrumentation [1300]: Advanced Micro Devices, Inc. [AMD] + Zeppelin/Raven/Raven2 PCIe Dummy Function (rev a1)' +- bus: '04' + dev: '00' + fn: '2' + id: '1458' + name: 'Ethernet controller: Advanced Micro Devices, Inc. [AMD] XGMAC 10GbE Controller' +- bus: '04' + dev: '00' + fn: '3' + id: '1458' + name: 'Ethernet controller: Advanced Micro Devices, Inc. [AMD] XGMAC 10GbE Controller' +- bus: '05' + dev: '00' + fn: '0' + id: 145a + name: 'Non-Essential Instrumentation [1300]: Advanced Micro Devices, Inc. [AMD] + Zeppelin/Raven/Raven2 PCIe Dummy Function' \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn6810_ld-r0/platform.json b/device/mellanox/x86_64-nvidia_sn6810_ld-r0/platform.json new file mode 100644 index 00000000000..ac1e017b174 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn6810_ld-r0/platform.json @@ -0,0 +1,1240 @@ +{ + "chassis": { + "name": "SN6810_LD", + "components": [ + { + "name": "ONIE" + }, + { + "name": "SSD" + }, + { + "name": "BIOS" + }, + { + "name": "CPLD1" + }, + { + "name": "CPLD2" + }, + { + "name": "CPLD3" + }, + { + "name": "CPLD4" + }, + { + "name": "BMC" + } + ], + "fans": [], + "fan_drawers": [], + "psus": [], + "pdbs": [ + { + "name": "PDB 1" + } + ], + "leak_sensors": [ + { + "name": "leakage1" + }, + { + "name": "leakage2" + } + ], + "thermals": [ + { + "name": "ASIC", + "polling_interval": 3 + }, + { + "name": "CPU Pack Temp" + }, + { + "name": "SODIMM 1 Temp" + }, + { + "name": "SODIMM 2 Temp" + } + ], + "sfps": [ + { + "name": "sfp1", + "thermals": [ + { + "name": "xSFP module 1 Temp" + } + ] + } + ] + }, + "interfaces": { + "Ethernet0": { + "index": "1,1,1,1", + "lanes": "0,1,2,3", + "breakout_modes": { + "1x800G": ["etp1"], + "2x800G[400G]": ["etp1a", "etp1b"], + "4x400G[200G]": ["etp1a", "etp1b", "etp1c", "etp1d"] + } + }, + "Ethernet4": { + "index": "1,1,1,1", + "lanes": "4,5,6,7", + "breakout_modes": { + "1x800G": ["etp2"], + "2x800G[400G]": ["etp2a", "etp2b"], + "4x400G[200G]": ["etp2a", "etp2b", "etp2c", "etp2d"] + } + }, + "Ethernet8": { + "index": "1,1,1,1", + "lanes": "8,9,10,11", + "breakout_modes": { + "1x800G": ["etp3"], + "2x800G[400G]": ["etp3a", "etp3b"], + "4x400G[200G]": ["etp3a", "etp3b", "etp3c", "etp3d"] + } + }, + "Ethernet12": { + "index": "1,1,1,1", + "lanes": "12,13,14,15", + "breakout_modes": { + "1x800G": ["etp4"], + "2x800G[400G]": ["etp4a", "etp4b"], + "4x400G[200G]": ["etp4a", "etp4b", "etp4c", "etp4d"] + } + }, + "Ethernet16": { + "index": "1,1,1,1", + "lanes": "16,17,18,19", + "breakout_modes": { + "1x800G": ["etp5"], + "2x800G[400G]": ["etp5a", "etp5b"], + "4x400G[200G]": ["etp5a", "etp5b", "etp5c", "etp5d"] + } + }, + "Ethernet20": { + "index": "1,1,1,1", + "lanes": "20,21,22,23", + "breakout_modes": { + "1x800G": ["etp6"], + "2x800G[400G]": ["etp6a", "etp6b"], + "4x400G[200G]": ["etp6a", "etp6b", "etp6c", "etp6d"] + } + }, + "Ethernet24": { + "index": "1,1,1,1", + "lanes": "24,25,26,27", + "breakout_modes": { + "1x800G": ["etp7"], + "2x800G[400G]": ["etp7a", "etp7b"], + "4x400G[200G]": ["etp7a", "etp7b", "etp7c", "etp7d"] + } + }, + "Ethernet28": { + "index": "1,1,1,1", + "lanes": "28,29,30,31", + "breakout_modes": { + "1x800G": ["etp8"], + "2x800G[400G]": ["etp8a", "etp8b"], + "4x400G[200G]": ["etp8a", "etp8b", "etp8c", "etp8d"] + } + }, + "Ethernet32": { + "index": "2,2,2,2", + "lanes": "32,33,34,35", + "breakout_modes": { + "1x800G": ["etp9"], + "2x800G[400G]": ["etp9a", "etp9b"], + "4x400G[200G]": ["etp9a", "etp9b", "etp9c", "etp9d"] + } + }, + "Ethernet36": { + "index": "2,2,2,2", + "lanes": "36,37,38,39", + "breakout_modes": { + "1x800G": ["etp10"], + "2x800G[400G]": ["etp10a", "etp10b"], + "4x400G[200G]": ["etp10a", "etp10b", "etp10c", "etp10d"] + } + }, + "Ethernet40": { + "index": "2,2,2,2", + "lanes": "40,41,42,43", + "breakout_modes": { + "1x800G": ["etp11"], + "2x800G[400G]": ["etp11a", "etp11b"], + "4x400G[200G]": ["etp11a", "etp11b", "etp11c", "etp11d"] + } + }, + "Ethernet44": { + "index": "2,2,2,2", + "lanes": "44,45,46,47", + "breakout_modes": { + "1x800G": ["etp12"], + "2x800G[400G]": ["etp12a", "etp12b"], + "4x400G[200G]": ["etp12a", "etp12b", "etp12c", "etp12d"] + } + }, + "Ethernet48": { + "index": "2,2,2,2", + "lanes": "48,49,50,51", + "breakout_modes": { + "1x800G": ["etp13"], + "2x800G[400G]": ["etp13a", "etp13b"], + "4x400G[200G]": ["etp13a", "etp13b", "etp13c", "etp13d"] + } + }, + "Ethernet52": { + "index": "2,2,2,2", + "lanes": "52,53,54,55", + "breakout_modes": { + "1x800G": ["etp14"], + "2x800G[400G]": ["etp14a", "etp14b"], + "4x400G[200G]": ["etp14a", "etp14b", "etp14c", "etp14d"] + } + }, + "Ethernet56": { + "index": "2,2,2,2", + "lanes": "56,57,58,59", + "breakout_modes": { + "1x800G": ["etp15"], + "2x800G[400G]": ["etp15a", "etp15b"], + "4x400G[200G]": ["etp15a", "etp15b", "etp15c", "etp15d"] + } + }, + "Ethernet60": { + "index": "2,2,2,2", + "lanes": "60,61,62,63", + "breakout_modes": { + "1x800G": ["etp16"], + "2x800G[400G]": ["etp16a", "etp16b"], + "4x400G[200G]": ["etp16a", "etp16b", "etp16c", "etp16d"] + } + }, + "Ethernet64": { + "index": "3,3,3,3", + "lanes": "64,65,66,67", + "breakout_modes": { + "1x800G": ["etp17"], + "2x800G[400G]": ["etp17a", "etp17b"], + "4x400G[200G]": ["etp17a", "etp17b", "etp17c", "etp17d"] + } + }, + "Ethernet68": { + "index": "3,3,3,3", + "lanes": "68,69,70,71", + "breakout_modes": { + "1x800G": ["etp18"], + "2x800G[400G]": ["etp18a", "etp18b"], + "4x400G[200G]": ["etp18a", "etp18b", "etp18c", "etp18d"] + } + }, + "Ethernet72": { + "index": "3,3,3,3", + "lanes": "72,73,74,75", + "breakout_modes": { + "1x800G": ["etp19"], + "2x800G[400G]": ["etp19a", "etp19b"], + "4x400G[200G]": ["etp19a", "etp19b", "etp19c", "etp19d"] + } + }, + "Ethernet76": { + "index": "3,3,3,3", + "lanes": "76,77,78,79", + "breakout_modes": { + "1x800G": ["etp20"], + "2x800G[400G]": ["etp20a", "etp20b"], + "4x400G[200G]": ["etp20a", "etp20b", "etp20c", "etp20d"] + } + }, + "Ethernet80": { + "index": "3,3,3,3", + "lanes": "80,81,82,83", + "breakout_modes": { + "1x800G": ["etp21"], + "2x800G[400G]": ["etp21a", "etp21b"], + "4x400G[200G]": ["etp21a", "etp21b", "etp21c", "etp21d"] + } + }, + "Ethernet84": { + "index": "3,3,3,3", + "lanes": "84,85,86,87", + "breakout_modes": { + "1x800G": ["etp22"], + "2x800G[400G]": ["etp22a", "etp22b"], + "4x400G[200G]": ["etp22a", "etp22b", "etp22c", "etp22d"] + } + }, + "Ethernet88": { + "index": "3,3,3,3", + "lanes": "88,89,90,91", + "breakout_modes": { + "1x800G": ["etp23"], + "2x800G[400G]": ["etp23a", "etp23b"], + "4x400G[200G]": ["etp23a", "etp23b", "etp23c", "etp23d"] + } + }, + "Ethernet92": { + "index": "3,3,3,3", + "lanes": "92,93,94,95", + "breakout_modes": { + "1x800G": ["etp24"], + "2x800G[400G]": ["etp24a", "etp24b"], + "4x400G[200G]": ["etp24a", "etp24b", "etp24c", "etp24d"] + } + }, + "Ethernet96": { + "index": "4,4,4,4", + "lanes": "96,97,98,99", + "breakout_modes": { + "1x800G": ["etp25"], + "2x800G[400G]": ["etp25a", "etp25b"], + "4x400G[200G]": ["etp25a", "etp25b", "etp25c", "etp25d"] + } + }, + "Ethernet100": { + "index": "4,4,4,4", + "lanes": "100,101,102,103", + "breakout_modes": { + "1x800G": ["etp26"], + "2x800G[400G]": ["etp26a", "etp26b"], + "4x400G[200G]": ["etp26a", "etp26b", "etp26c", "etp26d"] + } + }, + "Ethernet104": { + "index": "4,4,4,4", + "lanes": "104,105,106,107", + "breakout_modes": { + "1x800G": ["etp27"], + "2x800G[400G]": ["etp27a", "etp27b"], + "4x400G[200G]": ["etp27a", "etp27b", "etp27c", "etp27d"] + } + }, + "Ethernet108": { + "index": "4,4,4,4", + "lanes": "108,109,110,111", + "breakout_modes": { + "1x800G": ["etp28"], + "2x800G[400G]": ["etp28a", "etp28b"], + "4x400G[200G]": ["etp28a", "etp28b", "etp28c", "etp28d"] + } + }, + "Ethernet112": { + "index": "4,4,4,4", + "lanes": "112,113,114,115", + "breakout_modes": { + "1x800G": ["etp29"], + "2x800G[400G]": ["etp29a", "etp29b"], + "4x400G[200G]": ["etp29a", "etp29b", "etp29c", "etp29d"] + } + }, + "Ethernet116": { + "index": "4,4,4,4", + "lanes": "116,117,118,119", + "breakout_modes": { + "1x800G": ["etp30"], + "2x800G[400G]": ["etp30a", "etp30b"], + "4x400G[200G]": ["etp30a", "etp30b", "etp30c", "etp30d"] + } + }, + "Ethernet120": { + "index": "4,4,4,4", + "lanes": "120,121,122,123", + "breakout_modes": { + "1x800G": ["etp31"], + "2x800G[400G]": ["etp31a", "etp31b"], + "4x400G[200G]": ["etp31a", "etp31b", "etp31c", "etp31d"] + } + }, + "Ethernet124": { + "index": "4,4,4,4", + "lanes": "124,125,126,127", + "breakout_modes": { + "1x800G": ["etp32"], + "2x800G[400G]": ["etp32a", "etp32b"], + "4x400G[200G]": ["etp32a", "etp32b", "etp32c", "etp32d"] + } + }, + "Ethernet128": { + "index": "5,5,5,5", + "lanes": "128,129,130,131", + "breakout_modes": { + "1x800G": ["etp33"], + "2x800G[400G]": ["etp33a", "etp33b"], + "4x400G[200G]": ["etp33a", "etp33b", "etp33c", "etp33d"] + } + }, + "Ethernet132": { + "index": "5,5,5,5", + "lanes": "132,133,134,135", + "breakout_modes": { + "1x800G": ["etp34"], + "2x800G[400G]": ["etp34a", "etp34b"], + "4x400G[200G]": ["etp34a", "etp34b", "etp34c", "etp34d"] + } + }, + "Ethernet136": { + "index": "5,5,5,5", + "lanes": "136,137,138,139", + "breakout_modes": { + "1x800G": ["etp35"], + "2x800G[400G]": ["etp35a", "etp35b"], + "4x400G[200G]": ["etp35a", "etp35b", "etp35c", "etp35d"] + } + }, + "Ethernet140": { + "index": "5,5,5,5", + "lanes": "140,141,142,143", + "breakout_modes": { + "1x800G": ["etp36"], + "2x800G[400G]": ["etp36a", "etp36b"], + "4x400G[200G]": ["etp36a", "etp36b", "etp36c", "etp36d"] + } + }, + "Ethernet144": { + "index": "5,5,5,5", + "lanes": "144,145,146,147", + "breakout_modes": { + "1x800G": ["etp37"], + "2x800G[400G]": ["etp37a", "etp37b"], + "4x400G[200G]": ["etp37a", "etp37b", "etp37c", "etp37d"] + } + }, + "Ethernet148": { + "index": "5,5,5,5", + "lanes": "148,149,150,151", + "breakout_modes": { + "1x800G": ["etp38"], + "2x800G[400G]": ["etp38a", "etp38b"], + "4x400G[200G]": ["etp38a", "etp38b", "etp38c", "etp38d"] + } + }, + "Ethernet152": { + "index": "5,5,5,5", + "lanes": "152,153,154,155", + "breakout_modes": { + "1x800G": ["etp39"], + "2x800G[400G]": ["etp39a", "etp39b"], + "4x400G[200G]": ["etp39a", "etp39b", "etp39c", "etp39d"] + } + }, + "Ethernet156": { + "index": "5,5,5,5", + "lanes": "156,157,158,159", + "breakout_modes": { + "1x800G": ["etp40"], + "2x800G[400G]": ["etp40a", "etp40b"], + "4x400G[200G]": ["etp40a", "etp40b", "etp40c", "etp40d"] + } + }, + "Ethernet160": { + "index": "6,6,6,6", + "lanes": "160,161,162,163", + "breakout_modes": { + "1x800G": ["etp41"], + "2x800G[400G]": ["etp41a", "etp41b"], + "4x400G[200G]": ["etp41a", "etp41b", "etp41c", "etp41d"] + } + }, + "Ethernet164": { + "index": "6,6,6,6", + "lanes": "164,165,166,167", + "breakout_modes": { + "1x800G": ["etp42"], + "2x800G[400G]": ["etp42a", "etp42b"], + "4x400G[200G]": ["etp42a", "etp42b", "etp42c", "etp42d"] + } + }, + "Ethernet168": { + "index": "6,6,6,6", + "lanes": "168,169,170,171", + "breakout_modes": { + "1x800G": ["etp43"], + "2x800G[400G]": ["etp43a", "etp43b"], + "4x400G[200G]": ["etp43a", "etp43b", "etp43c", "etp43d"] + } + }, + "Ethernet172": { + "index": "6,6,6,6", + "lanes": "172,173,174,175", + "breakout_modes": { + "1x800G": ["etp44"], + "2x800G[400G]": ["etp44a", "etp44b"], + "4x400G[200G]": ["etp44a", "etp44b", "etp44c", "etp44d"] + } + }, + "Ethernet176": { + "index": "6,6,6,6", + "lanes": "176,177,178,179", + "breakout_modes": { + "1x800G": ["etp45"], + "2x800G[400G]": ["etp45a", "etp45b"], + "4x400G[200G]": ["etp45a", "etp45b", "etp45c", "etp45d"] + } + }, + "Ethernet180": { + "index": "6,6,6,6", + "lanes": "180,181,182,183", + "breakout_modes": { + "1x800G": ["etp46"], + "2x800G[400G]": ["etp46a", "etp46b"], + "4x400G[200G]": ["etp46a", "etp46b", "etp46c", "etp46d"] + } + }, + "Ethernet184": { + "index": "6,6,6,6", + "lanes": "184,185,186,187", + "breakout_modes": { + "1x800G": ["etp47"], + "2x800G[400G]": ["etp47a", "etp47b"], + "4x400G[200G]": ["etp47a", "etp47b", "etp47c", "etp47d"] + } + }, + "Ethernet188": { + "index": "6,6,6,6", + "lanes": "188,189,190,191", + "breakout_modes": { + "1x800G": ["etp48"], + "2x800G[400G]": ["etp48a", "etp48b"], + "4x400G[200G]": ["etp48a", "etp48b", "etp48c", "etp48d"] + } + }, + "Ethernet192": { + "index": "7,7,7,7", + "lanes": "192,193,194,195", + "breakout_modes": { + "1x800G": ["etp49"], + "2x800G[400G]": ["etp49a", "etp49b"], + "4x400G[200G]": ["etp49a", "etp49b", "etp49c", "etp49d"] + } + }, + "Ethernet196": { + "index": "7,7,7,7", + "lanes": "196,197,198,199", + "breakout_modes": { + "1x800G": ["etp50"], + "2x800G[400G]": ["etp50a", "etp50b"], + "4x400G[200G]": ["etp50a", "etp50b", "etp50c", "etp50d"] + } + }, + "Ethernet200": { + "index": "7,7,7,7", + "lanes": "200,201,202,203", + "breakout_modes": { + "1x800G": ["etp51"], + "2x800G[400G]": ["etp51a", "etp51b"], + "4x400G[200G]": ["etp51a", "etp51b", "etp51c", "etp51d"] + } + }, + "Ethernet204": { + "index": "7,7,7,7", + "lanes": "204,205,206,207", + "breakout_modes": { + "1x800G": ["etp52"], + "2x800G[400G]": ["etp52a", "etp52b"], + "4x400G[200G]": ["etp52a", "etp52b", "etp52c", "etp52d"] + } + }, + "Ethernet208": { + "index": "7,7,7,7", + "lanes": "208,209,210,211", + "breakout_modes": { + "1x800G": ["etp53"], + "2x800G[400G]": ["etp53a", "etp53b"], + "4x400G[200G]": ["etp53a", "etp53b", "etp53c", "etp53d"] + } + }, + "Ethernet212": { + "index": "7,7,7,7", + "lanes": "212,213,214,215", + "breakout_modes": { + "1x800G": ["etp54"], + "2x800G[400G]": ["etp54a", "etp54b"], + "4x400G[200G]": ["etp54a", "etp54b", "etp54c", "etp54d"] + } + }, + "Ethernet216": { + "index": "7,7,7,7", + "lanes": "216,217,218,219", + "breakout_modes": { + "1x800G": ["etp55"], + "2x800G[400G]": ["etp55a", "etp55b"], + "4x400G[200G]": ["etp55a", "etp55b", "etp55c", "etp55d"] + } + }, + "Ethernet220": { + "index": "7,7,7,7", + "lanes": "220,221,222,223", + "breakout_modes": { + "1x800G": ["etp56"], + "2x800G[400G]": ["etp56a", "etp56b"], + "4x400G[200G]": ["etp56a", "etp56b", "etp56c", "etp56d"] + } + }, + "Ethernet224": { + "index": "8,8,8,8", + "lanes": "224,225,226,227", + "breakout_modes": { + "1x800G": ["etp57"], + "2x800G[400G]": ["etp57a", "etp57b"], + "4x400G[200G]": ["etp57a", "etp57b", "etp57c", "etp57d"] + } + }, + "Ethernet228": { + "index": "8,8,8,8", + "lanes": "228,229,230,231", + "breakout_modes": { + "1x800G": ["etp58"], + "2x800G[400G]": ["etp58a", "etp58b"], + "4x400G[200G]": ["etp58a", "etp58b", "etp58c", "etp58d"] + } + }, + "Ethernet232": { + "index": "8,8,8,8", + "lanes": "232,233,234,235", + "breakout_modes": { + "1x800G": ["etp59"], + "2x800G[400G]": ["etp59a", "etp59b"], + "4x400G[200G]": ["etp59a", "etp59b", "etp59c", "etp59d"] + } + }, + "Ethernet236": { + "index": "8,8,8,8", + "lanes": "236,237,238,239", + "breakout_modes": { + "1x800G": ["etp60"], + "2x800G[400G]": ["etp60a", "etp60b"], + "4x400G[200G]": ["etp60a", "etp60b", "etp60c", "etp60d"] + } + }, + "Ethernet240": { + "index": "8,8,8,8", + "lanes": "240,241,242,243", + "breakout_modes": { + "1x800G": ["etp61"], + "2x800G[400G]": ["etp61a", "etp61b"], + "4x400G[200G]": ["etp61a", "etp61b", "etp61c", "etp61d"] + } + }, + "Ethernet244": { + "index": "8,8,8,8", + "lanes": "244,245,246,247", + "breakout_modes": { + "1x800G": ["etp62"], + "2x800G[400G]": ["etp62a", "etp62b"], + "4x400G[200G]": ["etp62a", "etp62b", "etp62c", "etp62d"] + } + }, + "Ethernet248": { + "index": "8,8,8,8", + "lanes": "248,249,250,251", + "breakout_modes": { + "1x800G": ["etp63"], + "2x800G[400G]": ["etp63a", "etp63b"], + "4x400G[200G]": ["etp63a", "etp63b", "etp63c", "etp63d"] + } + }, + "Ethernet252": { + "index": "8,8,8,8", + "lanes": "252,253,254,255", + "breakout_modes": { + "1x800G": ["etp64"], + "2x800G[400G]": ["etp64a", "etp64b"], + "4x400G[200G]": ["etp64a", "etp64b", "etp64c", "etp64d"] + } + }, + "Ethernet256": { + "index": "9,9,9,9", + "lanes": "256,257,258,259", + "breakout_modes": { + "1x800G": ["etp65"], + "2x800G[400G]": ["etp65a", "etp65b"], + "4x400G[200G]": ["etp65a", "etp65b", "etp65c", "etp65d"] + } + }, + "Ethernet260": { + "index": "9,9,9,9", + "lanes": "260,261,262,263", + "breakout_modes": { + "1x800G": ["etp66"], + "2x800G[400G]": ["etp66a", "etp66b"], + "4x400G[200G]": ["etp66a", "etp66b", "etp66c", "etp66d"] + } + }, + "Ethernet264": { + "index": "9,9,9,9", + "lanes": "264,265,266,267", + "breakout_modes": { + "1x800G": ["etp67"], + "2x800G[400G]": ["etp67a", "etp67b"], + "4x400G[200G]": ["etp67a", "etp67b", "etp67c", "etp67d"] + } + }, + "Ethernet268": { + "index": "9,9,9,9", + "lanes": "268,269,270,271", + "breakout_modes": { + "1x800G": ["etp68"], + "2x800G[400G]": ["etp68a", "etp68b"], + "4x400G[200G]": ["etp68a", "etp68b", "etp68c", "etp68d"] + } + }, + "Ethernet272": { + "index": "9,9,9,9", + "lanes": "272,273,274,275", + "breakout_modes": { + "1x800G": ["etp69"], + "2x800G[400G]": ["etp69a", "etp69b"], + "4x400G[200G]": ["etp69a", "etp69b", "etp69c", "etp69d"] + } + }, + "Ethernet276": { + "index": "9,9,9,9", + "lanes": "276,277,278,279", + "breakout_modes": { + "1x800G": ["etp70"], + "2x800G[400G]": ["etp70a", "etp70b"], + "4x400G[200G]": ["etp70a", "etp70b", "etp70c", "etp70d"] + } + }, + "Ethernet280": { + "index": "9,9,9,9", + "lanes": "280,281,282,283", + "breakout_modes": { + "1x800G": ["etp71"], + "2x800G[400G]": ["etp71a", "etp71b"], + "4x400G[200G]": ["etp71a", "etp71b", "etp71c", "etp71d"] + } + }, + "Ethernet284": { + "index": "9,9,9,9", + "lanes": "284,285,286,287", + "breakout_modes": { + "1x800G": ["etp72"], + "2x800G[400G]": ["etp72a", "etp72b"], + "4x400G[200G]": ["etp72a", "etp72b", "etp72c", "etp72d"] + } + }, + "Ethernet288": { + "index": "10,10,10,10", + "lanes": "288,289,290,291", + "breakout_modes": { + "1x800G": ["etp73"], + "2x800G[400G]": ["etp73a", "etp73b"], + "4x400G[200G]": ["etp73a", "etp73b", "etp73c", "etp73d"] + } + }, + "Ethernet292": { + "index": "10,10,10,10", + "lanes": "292,293,294,295", + "breakout_modes": { + "1x800G": ["etp74"], + "2x800G[400G]": ["etp74a", "etp74b"], + "4x400G[200G]": ["etp74a", "etp74b", "etp74c", "etp74d"] + } + }, + "Ethernet296": { + "index": "10,10,10,10", + "lanes": "296,297,298,299", + "breakout_modes": { + "1x800G": ["etp75"], + "2x800G[400G]": ["etp75a", "etp75b"], + "4x400G[200G]": ["etp75a", "etp75b", "etp75c", "etp75d"] + } + }, + "Ethernet300": { + "index": "10,10,10,10", + "lanes": "300,301,302,303", + "breakout_modes": { + "1x800G": ["etp76"], + "2x800G[400G]": ["etp76a", "etp76b"], + "4x400G[200G]": ["etp76a", "etp76b", "etp76c", "etp76d"] + } + }, + "Ethernet304": { + "index": "10,10,10,10", + "lanes": "304,305,306,307", + "breakout_modes": { + "1x800G": ["etp77"], + "2x800G[400G]": ["etp77a", "etp77b"], + "4x400G[200G]": ["etp77a", "etp77b", "etp77c", "etp77d"] + } + }, + "Ethernet308": { + "index": "10,10,10,10", + "lanes": "308,309,310,311", + "breakout_modes": { + "1x800G": ["etp78"], + "2x800G[400G]": ["etp78a", "etp78b"], + "4x400G[200G]": ["etp78a", "etp78b", "etp78c", "etp78d"] + } + }, + "Ethernet312": { + "index": "10,10,10,10", + "lanes": "312,313,314,315", + "breakout_modes": { + "1x800G": ["etp79"], + "2x800G[400G]": ["etp79a", "etp79b"], + "4x400G[200G]": ["etp79a", "etp79b", "etp79c", "etp79d"] + } + }, + "Ethernet316": { + "index": "10,10,10,10", + "lanes": "316,317,318,319", + "breakout_modes": { + "1x800G": ["etp80"], + "2x800G[400G]": ["etp80a", "etp80b"], + "4x400G[200G]": ["etp80a", "etp80b", "etp80c", "etp80d"] + } + }, + "Ethernet320": { + "index": "11,11,11,11", + "lanes": "320,321,322,323", + "breakout_modes": { + "1x800G": ["etp81"], + "2x800G[400G]": ["etp81a", "etp81b"], + "4x400G[200G]": ["etp81a", "etp81b", "etp81c", "etp81d"] + } + }, + "Ethernet324": { + "index": "11,11,11,11", + "lanes": "324,325,326,327", + "breakout_modes": { + "1x800G": ["etp82"], + "2x800G[400G]": ["etp82a", "etp82b"], + "4x400G[200G]": ["etp82a", "etp82b", "etp82c", "etp82d"] + } + }, + "Ethernet328": { + "index": "11,11,11,11", + "lanes": "328,329,330,331", + "breakout_modes": { + "1x800G": ["etp83"], + "2x800G[400G]": ["etp83a", "etp83b"], + "4x400G[200G]": ["etp83a", "etp83b", "etp83c", "etp83d"] + } + }, + "Ethernet332": { + "index": "11,11,11,11", + "lanes": "332,333,334,335", + "breakout_modes": { + "1x800G": ["etp84"], + "2x800G[400G]": ["etp84a", "etp84b"], + "4x400G[200G]": ["etp84a", "etp84b", "etp84c", "etp84d"] + } + }, + "Ethernet336": { + "index": "11,11,11,11", + "lanes": "336,337,338,339", + "breakout_modes": { + "1x800G": ["etp85"], + "2x800G[400G]": ["etp85a", "etp85b"], + "4x400G[200G]": ["etp85a", "etp85b", "etp85c", "etp85d"] + } + }, + "Ethernet340": { + "index": "11,11,11,11", + "lanes": "340,341,342,343", + "breakout_modes": { + "1x800G": ["etp86"], + "2x800G[400G]": ["etp86a", "etp86b"], + "4x400G[200G]": ["etp86a", "etp86b", "etp86c", "etp86d"] + } + }, + "Ethernet344": { + "index": "11,11,11,11", + "lanes": "344,345,346,347", + "breakout_modes": { + "1x800G": ["etp87"], + "2x800G[400G]": ["etp87a", "etp87b"], + "4x400G[200G]": ["etp87a", "etp87b", "etp87c", "etp87d"] + } + }, + "Ethernet348": { + "index": "11,11,11,11", + "lanes": "348,349,350,351", + "breakout_modes": { + "1x800G": ["etp88"], + "2x800G[400G]": ["etp88a", "etp88b"], + "4x400G[200G]": ["etp88a", "etp88b", "etp88c", "etp88d"] + } + }, + "Ethernet352": { + "index": "12,12,12,12", + "lanes": "352,353,354,355", + "breakout_modes": { + "1x800G": ["etp89"], + "2x800G[400G]": ["etp89a", "etp89b"], + "4x400G[200G]": ["etp89a", "etp89b", "etp89c", "etp89d"] + } + }, + "Ethernet356": { + "index": "12,12,12,12", + "lanes": "356,357,358,359", + "breakout_modes": { + "1x800G": ["etp90"], + "2x800G[400G]": ["etp90a", "etp90b"], + "4x400G[200G]": ["etp90a", "etp90b", "etp90c", "etp90d"] + } + }, + "Ethernet360": { + "index": "12,12,12,12", + "lanes": "360,361,362,363", + "breakout_modes": { + "1x800G": ["etp91"], + "2x800G[400G]": ["etp91a", "etp91b"], + "4x400G[200G]": ["etp91a", "etp91b", "etp91c", "etp91d"] + } + }, + "Ethernet364": { + "index": "12,12,12,12", + "lanes": "364,365,366,367", + "breakout_modes": { + "1x800G": ["etp92"], + "2x800G[400G]": ["etp92a", "etp92b"], + "4x400G[200G]": ["etp92a", "etp92b", "etp92c", "etp92d"] + } + }, + "Ethernet368": { + "index": "12,12,12,12", + "lanes": "368,369,370,371", + "breakout_modes": { + "1x800G": ["etp93"], + "2x800G[400G]": ["etp93a", "etp93b"], + "4x400G[200G]": ["etp93a", "etp93b", "etp93c", "etp93d"] + } + }, + "Ethernet372": { + "index": "12,12,12,12", + "lanes": "372,373,374,375", + "breakout_modes": { + "1x800G": ["etp94"], + "2x800G[400G]": ["etp94a", "etp94b"], + "4x400G[200G]": ["etp94a", "etp94b", "etp94c", "etp94d"] + } + }, + "Ethernet376": { + "index": "12,12,12,12", + "lanes": "376,377,378,379", + "breakout_modes": { + "1x800G": ["etp95"], + "2x800G[400G]": ["etp95a", "etp95b"], + "4x400G[200G]": ["etp95a", "etp95b", "etp95c", "etp95d"] + } + }, + "Ethernet380": { + "index": "12,12,12,12", + "lanes": "380,381,382,383", + "breakout_modes": { + "1x800G": ["etp96"], + "2x800G[400G]": ["etp96a", "etp96b"], + "4x400G[200G]": ["etp96a", "etp96b", "etp96c", "etp96d"] + } + }, + "Ethernet384": { + "index": "13,13,13,13", + "lanes": "384,385,386,387", + "breakout_modes": { + "1x800G": ["etp97"], + "2x800G[400G]": ["etp97a", "etp97b"], + "4x400G[200G]": ["etp97a", "etp97b", "etp97c", "etp97d"] + } + }, + "Ethernet388": { + "index": "13,13,13,13", + "lanes": "388,389,390,391", + "breakout_modes": { + "1x800G": ["etp98"], + "2x800G[400G]": ["etp98a", "etp98b"], + "4x400G[200G]": ["etp98a", "etp98b", "etp98c", "etp98d"] + } + }, + "Ethernet392": { + "index": "13,13,13,13", + "lanes": "392,393,394,395", + "breakout_modes": { + "1x800G": ["etp99"], + "2x800G[400G]": ["etp99a", "etp99b"], + "4x400G[200G]": ["etp99a", "etp99b", "etp99c", "etp99d"] + } + }, + "Ethernet396": { + "index": "13,13,13,13", + "lanes": "396,397,398,399", + "breakout_modes": { + "1x800G": ["etp100"], + "2x800G[400G]": ["etp100a", "etp100b"], + "4x400G[200G]": ["etp100a", "etp100b", "etp100c", "etp100d"] + } + }, + "Ethernet400": { + "index": "13,13,13,13", + "lanes": "400,401,402,403", + "breakout_modes": { + "1x800G": ["etp101"], + "2x800G[400G]": ["etp101a", "etp101b"], + "4x400G[200G]": ["etp101a", "etp101b", "etp101c", "etp101d"] + } + }, + "Ethernet404": { + "index": "13,13,13,13", + "lanes": "404,405,406,407", + "breakout_modes": { + "1x800G": ["etp102"], + "2x800G[400G]": ["etp102a", "etp102b"], + "4x400G[200G]": ["etp102a", "etp102b", "etp102c", "etp102d"] + } + }, + "Ethernet408": { + "index": "13,13,13,13", + "lanes": "408,409,410,411", + "breakout_modes": { + "1x800G": ["etp103"], + "2x800G[400G]": ["etp103a", "etp103b"], + "4x400G[200G]": ["etp103a", "etp103b", "etp103c", "etp103d"] + } + }, + "Ethernet412": { + "index": "13,13,13,13", + "lanes": "412,413,414,415", + "breakout_modes": { + "1x800G": ["etp104"], + "2x800G[400G]": ["etp104a", "etp104b"], + "4x400G[200G]": ["etp104a", "etp104b", "etp104c", "etp104d"] + } + }, + "Ethernet416": { + "index": "14,14,14,14", + "lanes": "416,417,418,419", + "breakout_modes": { + "1x800G": ["etp105"], + "2x800G[400G]": ["etp105a", "etp105b"], + "4x400G[200G]": ["etp105a", "etp105b", "etp105c", "etp105d"] + } + }, + "Ethernet420": { + "index": "14,14,14,14", + "lanes": "420,421,422,423", + "breakout_modes": { + "1x800G": ["etp106"], + "2x800G[400G]": ["etp106a", "etp106b"], + "4x400G[200G]": ["etp106a", "etp106b", "etp106c", "etp106d"] + } + }, + "Ethernet424": { + "index": "14,14,14,14", + "lanes": "424,425,426,427", + "breakout_modes": { + "1x800G": ["etp107"], + "2x800G[400G]": ["etp107a", "etp107b"], + "4x400G[200G]": ["etp107a", "etp107b", "etp107c", "etp107d"] + } + }, + "Ethernet428": { + "index": "14,14,14,14", + "lanes": "428,429,430,431", + "breakout_modes": { + "1x800G": ["etp108"], + "2x800G[400G]": ["etp108a", "etp108b"], + "4x400G[200G]": ["etp108a", "etp108b", "etp108c", "etp108d"] + } + }, + "Ethernet432": { + "index": "14,14,14,14", + "lanes": "432,433,434,435", + "breakout_modes": { + "1x800G": ["etp109"], + "2x800G[400G]": ["etp109a", "etp109b"], + "4x400G[200G]": ["etp109a", "etp109b", "etp109c", "etp109d"] + } + }, + "Ethernet436": { + "index": "14,14,14,14", + "lanes": "436,437,438,439", + "breakout_modes": { + "1x800G": ["etp110"], + "2x800G[400G]": ["etp110a", "etp110b"], + "4x400G[200G]": ["etp110a", "etp110b", "etp110c", "etp110d"] + } + }, + "Ethernet440": { + "index": "14,14,14,14", + "lanes": "440,441,442,443", + "breakout_modes": { + "1x800G": ["etp111"], + "2x800G[400G]": ["etp111a", "etp111b"], + "4x400G[200G]": ["etp111a", "etp111b", "etp111c", "etp111d"] + } + }, + "Ethernet444": { + "index": "14,14,14,14", + "lanes": "444,445,446,447", + "breakout_modes": { + "1x800G": ["etp112"], + "2x800G[400G]": ["etp112a", "etp112b"], + "4x400G[200G]": ["etp112a", "etp112b", "etp112c", "etp112d"] + } + }, + "Ethernet448": { + "index": "15,15,15,15", + "lanes": "448,449,450,451", + "breakout_modes": { + "1x800G": ["etp113"], + "2x800G[400G]": ["etp113a", "etp113b"], + "4x400G[200G]": ["etp113a", "etp113b", "etp113c", "etp113d"] + } + }, + "Ethernet452": { + "index": "15,15,15,15", + "lanes": "452,453,454,455", + "breakout_modes": { + "1x800G": ["etp114"], + "2x800G[400G]": ["etp114a", "etp114b"], + "4x400G[200G]": ["etp114a", "etp114b", "etp114c", "etp114d"] + } + }, + "Ethernet456": { + "index": "15,15,15,15", + "lanes": "456,457,458,459", + "breakout_modes": { + "1x800G": ["etp115"], + "2x800G[400G]": ["etp115a", "etp115b"], + "4x400G[200G]": ["etp115a", "etp115b", "etp115c", "etp115d"] + } + }, + "Ethernet460": { + "index": "15,15,15,15", + "lanes": "460,461,462,463", + "breakout_modes": { + "1x800G": ["etp116"], + "2x800G[400G]": ["etp116a", "etp116b"], + "4x400G[200G]": ["etp116a", "etp116b", "etp116c", "etp116d"] + } + }, + "Ethernet464": { + "index": "15,15,15,15", + "lanes": "464,465,466,467", + "breakout_modes": { + "1x800G": ["etp117"], + "2x800G[400G]": ["etp117a", "etp117b"], + "4x400G[200G]": ["etp117a", "etp117b", "etp117c", "etp117d"] + } + }, + "Ethernet468": { + "index": "15,15,15,15", + "lanes": "468,469,470,471", + "breakout_modes": { + "1x800G": ["etp118"], + "2x800G[400G]": ["etp118a", "etp118b"], + "4x400G[200G]": ["etp118a", "etp118b", "etp118c", "etp118d"] + } + }, + "Ethernet472": { + "index": "15,15,15,15", + "lanes": "472,473,474,475", + "breakout_modes": { + "1x800G": ["etp119"], + "2x800G[400G]": ["etp119a", "etp119b"], + "4x400G[200G]": ["etp119a", "etp119b", "etp119c", "etp119d"] + } + }, + "Ethernet476": { + "index": "15,15,15,15", + "lanes": "476,477,478,479", + "breakout_modes": { + "1x800G": ["etp120"], + "2x800G[400G]": ["etp120a", "etp120b"], + "4x400G[200G]": ["etp120a", "etp120b", "etp120c", "etp120d"] + } + }, + "Ethernet480": { + "index": "16,16,16,16", + "lanes": "480,481,482,483", + "breakout_modes": { + "1x800G": ["etp121"], + "2x800G[400G]": ["etp121a", "etp121b"], + "4x400G[200G]": ["etp121a", "etp121b", "etp121c", "etp121d"] + } + }, + "Ethernet484": { + "index": "16,16,16,16", + "lanes": "484,485,486,487", + "breakout_modes": { + "1x800G": ["etp122"], + "2x800G[400G]": ["etp122a", "etp122b"], + "4x400G[200G]": ["etp122a", "etp122b", "etp122c", "etp122d"] + } + }, + "Ethernet488": { + "index": "16,16,16,16", + "lanes": "488,489,490,491", + "breakout_modes": { + "1x800G": ["etp123"], + "2x800G[400G]": ["etp123a", "etp123b"], + "4x400G[200G]": ["etp123a", "etp123b", "etp123c", "etp123d"] + } + }, + "Ethernet492": { + "index": "16,16,16,16", + "lanes": "492,493,494,495", + "breakout_modes": { + "1x800G": ["etp124"], + "2x800G[400G]": ["etp124a", "etp124b"], + "4x400G[200G]": ["etp124a", "etp124b", "etp124c", "etp124d"] + } + }, + "Ethernet496": { + "index": "16,16,16,16", + "lanes": "496,497,498,499", + "breakout_modes": { + "1x800G": ["etp125"], + "2x800G[400G]": ["etp125a", "etp125b"], + "4x400G[200G]": ["etp125a", "etp125b", "etp125c", "etp125d"] + } + }, + "Ethernet500": { + "index": "16,16,16,16", + "lanes": "500,501,502,503", + "breakout_modes": { + "1x800G": ["etp126"], + "2x800G[400G]": ["etp126a", "etp126b"], + "4x400G[200G]": ["etp126a", "etp126b", "etp126c", "etp126d"] + } + }, + "Ethernet504": { + "index": "16,16,16,16", + "lanes": "504,505,506,507", + "breakout_modes": { + "1x800G": ["etp127"], + "2x800G[400G]": ["etp127a", "etp127b"], + "4x400G[200G]": ["etp127a", "etp127b", "etp127c", "etp127d"] + } + }, + "Ethernet508": { + "index": "16,16,16,16", + "lanes": "508,509,510,511", + "breakout_modes": { + "1x800G": ["etp128"], + "2x800G[400G]": ["etp128a", "etp128b"], + "4x400G[200G]": ["etp128a", "etp128b", "etp128c", "etp128d"] + } + }, + "Ethernet512": { + "index": "17", + "lanes": "512", + "breakout_modes": { + "1x25G[10G]": ["etp129a"] + } + }, + "Ethernet513": { + "index": "17", + "lanes": "513", + "breakout_modes": { + "1x25G[10G]": ["etp129b"] + } + } + } +} diff --git a/device/mellanox/x86_64-nvidia_sn6810_ld-r0/platform_asic b/device/mellanox/x86_64-nvidia_sn6810_ld-r0/platform_asic new file mode 100644 index 00000000000..70c07488555 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn6810_ld-r0/platform_asic @@ -0,0 +1 @@ +mellanox diff --git a/device/mellanox/x86_64-nvidia_sn6810_ld-r0/platform_components.json b/device/mellanox/x86_64-nvidia_sn6810_ld-r0/platform_components.json new file mode 100644 index 00000000000..cd0f918486e --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn6810_ld-r0/platform_components.json @@ -0,0 +1,16 @@ +{ + "chassis": { + "SN6810_LD": { + "component": { + "ONIE": { }, + "SSD": { }, + "BIOS": { }, + "CPLD1": { }, + "CPLD2": { }, + "CPLD3": { }, + "CPLD4": { }, + "BMC": {} + } + } + } +} diff --git a/device/mellanox/x86_64-nvidia_sn6810_ld-r0/platform_env.conf b/device/mellanox/x86_64-nvidia_sn6810_ld-r0/platform_env.conf new file mode 100644 index 00000000000..b5772a8c933 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn6810_ld-r0/platform_env.conf @@ -0,0 +1 @@ +switch_host=1 diff --git a/device/mellanox/x86_64-nvidia_sn6810_ld-r0/platform_wait b/device/mellanox/x86_64-nvidia_sn6810_ld-r0/platform_wait new file mode 100755 index 00000000000..19a48fc1e5c --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn6810_ld-r0/platform_wait @@ -0,0 +1,3 @@ +#!/bin/bash + +sleep 60 diff --git a/device/mellanox/x86_64-nvidia_sn6810_ld-r0/pmon_daemon_control.json b/device/mellanox/x86_64-nvidia_sn6810_ld-r0/pmon_daemon_control.json new file mode 100644 index 00000000000..971fff26b08 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn6810_ld-r0/pmon_daemon_control.json @@ -0,0 +1,13 @@ +{ + "skip_ledd": true, + "skip_fancontrol": true, + "skip_xcvrd_cmis_mgr": true, + "thermalctld": { + "enable_liquid_cooling": true, + "liquid_cooling_update_interval": 0.5 + }, + "xcvrd": { + "dom_temperature_poll_interval": 20 + } +} + diff --git a/platform/broadcom/saibcm-modules/GRTAGS b/device/mellanox/x86_64-nvidia_sn6810_ld-r0/pmon_immediate_start similarity index 100% rename from platform/broadcom/saibcm-modules/GRTAGS rename to device/mellanox/x86_64-nvidia_sn6810_ld-r0/pmon_immediate_start diff --git a/device/mellanox/x86_64-nvidia_sn6810_ld-r0/pre_reboot_hook b/device/mellanox/x86_64-nvidia_sn6810_ld-r0/pre_reboot_hook new file mode 100755 index 00000000000..7baf0b929b5 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn6810_ld-r0/pre_reboot_hook @@ -0,0 +1,35 @@ +#!/bin/bash +# +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2020-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +declare -r EXIT_SUCCESS=0 +declare -r EXIT_ERROR=1 + +declare -r PENDING_COMPONENT_FW="/usr/bin/install-pending-fw.py" +declare -r FW_UPGRADE_SCRIPT="/usr/local/bin/mlnx-fw-manager" + + +${FW_UPGRADE_SCRIPT} --upgrade --verbose +EXIT_CODE=$? +if [[ ${EXIT_CODE} != ${EXIT_SUCCESS} ]]; then + echo "Failed to burn MLNX FW: errno=${EXIT_CODE}" + exit ${EXIT_ERROR} +fi + +${PENDING_COMPONENT_FW} + +exit ${EXIT_SUCCESS} \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn6810_ld-r0/psu_sensors.json b/device/mellanox/x86_64-nvidia_sn6810_ld-r0/psu_sensors.json new file mode 100644 index 00000000000..f20107ff549 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn6810_ld-r0/psu_sensors.json @@ -0,0 +1,514 @@ +{ + "platform": { + "MSN2410": { + "default": { + "bus": [ + "i2c-10", + "i2c-1-mux (chan_id 10)" + ], + "chip": { + "dps460-i2c-*-58": ["2", "R"], + "dps460-i2c-*-59": ["1", "L"] + } + } + }, + "MSN2700": { + "default": { + "bus": [ + "i2c-10", + "i2c-1-mux (chan_id 10)" + ], + "chip": { + "dps460-i2c-*-58": ["2", "R"], + "dps460-i2c-*-59": ["1", "L"] + } + } + }, + "MSN2700-A1": { + "default": { + "bus": [ + "i2c-10", + "i2c-1-mux (chan_id 10)" + ], + "chip": { + "dps460-i2c-*-58": ["2", "R"], + "dps460-i2c-*-59": ["1", "L"] + } + } + }, + "MSN2740": { + "default": { + "bus": [ + "i2c-4", + "i2c-1-mux (chan_id 3)" + ], + "chip": { + "dps460-i2c-*-58": ["2", "R"], + "dps460-i2c-*-59": ["1", "L"] + } + } + }, + "MSN3420": { + "default": { + "bus": [ + "i2c-4", + "i2c-1-mux (chan_id 3)" + ], + "chip": { + "dps460-i2c-*-58": ["2"], + "dps460-i2c-*-59": ["1"] + } + } + }, + "MSN3700": { + "default": { + "bus": [ + "i2c-4", + "i2c-1-mux (chan_id 3)" + ], + "chip": { + "dps460-i2c-*-58": ["2"], + "dps460-i2c-*-59": ["1"] + } + }, + "respin": { + "bus": [ + "i2c-4", + "i2c-1-mux (chan_id 3)" + ], + "chip": { + "dps460-i2c-*-58": ["1"], + "dps460-i2c-*-59": ["2"] + } + }, + "swb_respin": { + "bus": [ + "i2c-4", + "i2c-1-mux (chan_id 3)" + ], + "chip": { + "dps460-i2c-*-58": ["1"], + "dps460-i2c-*-59": ["2"] + } + } + }, + "MSN3700C": { + "default": { + "bus": [ + "i2c-4", + "i2c-1-mux (chan_id 3)" + ], + "chip": { + "dps460-i2c-*-58": ["2"], + "dps460-i2c-*-59": ["1"] + } + }, + "respin": { + "bus": [ + "i2c-4", + "i2c-1-mux (chan_id 3)" + ], + "chip": { + "dps460-i2c-*-58": ["1"], + "dps460-i2c-*-59": ["2"] + } + }, + "swb_respin": { + "bus": [ + "i2c-4", + "i2c-1-mux (chan_id 3)" + ], + "chip": { + "dps460-i2c-*-58": ["1"], + "dps460-i2c-*-59": ["2"] + } + } + }, + "MSN3800": { + "default": { + "bus": [ + "i2c-4", + "i2c-1-mux (chan_id 3)" + ], + "chip": { + "dps460-i2c-*-58": ["2"], + "dps460-i2c-*-59": ["1"] + } + } + }, + "MSN4410": { + "default": { + "bus": [ + "i2c-4", + "i2c-1-mux (chan_id 3)" + ], + "chip": { + "dps460-i2c-*-58": ["1", "L"], + "dps460-i2c-*-59": ["2", "R"] + } + }, + "a1": { + "bus": [ + "i2c-4", + "i2c-1-mux (chan_id 3)" + ], + "chip": { + "dps460-i2c-*-58": ["1", "L"], + "dps460-i2c-*-59": ["2", "R"] + } + } + }, + "MSN4600": { + "default": { + "bus": [ + "i2c-4", + "i2c-1-mux (chan_id 3)" + ], + "chip": { + "dps460-i2c-*-58": ["2", "R"], + "dps460-i2c-*-59": ["1", "L"] + } + } + }, + "MSN4600C": { + "default": { + "bus": [ + "i2c-4", + "i2c-1-mux (chan_id 3)" + ], + "chip": { + "dps460-i2c-*-58": ["2", "R"], + "dps460-i2c-*-59": ["1", "L"] + } + }, + "a1": { + "bus": [ + "i2c-4", + "i2c-1-mux (chan_id 3)" + ], + "chip": { + "dps460-i2c-*-58": ["1", "L"], + "dps460-i2c-*-59": ["2", "R"] + } + }, + "respin": { + "bus": [ + "i2c-4", + "i2c-1-mux (chan_id 3)" + ], + "chip": { + "dps460-i2c-*-58": ["2", "R"], + "dps460-i2c-*-59": ["1", "L"] + } + }, + "respin_a1": { + "bus": [ + "i2c-4", + "i2c-1-mux (chan_id 3)" + ], + "chip": { + "dps460-i2c-*-58": ["1", "L"], + "dps460-i2c-*-59": ["2", "R"] + } + } + }, + "MSN4700": { + "default": { + "bus": [ + "i2c-4", + "i2c-1-mux (chan_id 3)" + ], + "chip": { + "dps460-i2c-*-58": ["2", "R"], + "dps460-i2c-*-59": ["1", "L"] + } + }, + "a1": { + "bus": [ + "i2c-4", + "i2c-1-mux (chan_id 3)" + ], + "chip": { + "dps460-i2c-*-58": ["2", "R"], + "dps460-i2c-*-59": ["1", "L"] + } + } + }, + "SN2201": { + "default": { + "bus": [ + "i2c-3", + "i2c-1-mux (chan_id 1)" + ], + "chip": { + "pmbus-i2c-3-58": ["1"], + "pmbus-i2c-4-58": ["2"] + } + } + }, + "SN4280": { + "default": { + "bus": [ + "i2c-4", + "i2c-1-mux (chan_id 3)" + ], + "chip": { + "dps460-i2c-*-58": ["2", "R"], + "dps460-i2c-*-59": ["1", "L"] + } + } + }, + "SN5400": { + "default": { + "bus": [ + + ], + "chip": { + "dps460-i2c-*-59": ["1", "L"], + "dps460-i2c-*-5a": ["2", "R"] + } + } + }, + "SN5600": { + "default": { + "bus": [ + + ], + "chip": { + "dps460-i2c-*-59": ["1", "L"], + "dps460-i2c-*-5a": ["2", "R"] + } + } + }, + "SN5610N": { + "default": { + "bus": [ + + ], + "chip": { + "dps460-i2c-*-58": ["2", "R"], + "dps460-i2c-*-59": ["1", "L"], + "dps460-i2c-*-5a": ["4", "R"], + "dps460-i2c-*-5b": ["3", "R"] + } + } + }, + "SN5640": { + "default": { + "bus": [ + + ], + "chip": { + "dps460-i2c-*-58": ["2", "L"], + "dps460-i2c-*-59": ["1", "L"], + "dps460-i2c-*-5a": ["4", "R"], + "dps460-i2c-*-5b": ["3", "R"] + } + } + } + + }, + + "psu": { + "MTEF-AC-A": { + "label": [ + "in1 PSU 220V Rail (in)", + "in2 PSU 12V Rail (out)", + "fan1 PSU Fan 1", + "temp1 PSU Temp 1", + "temp2 PSU Temp 2", + "power1 PSU 220V Rail Pwr (in)", + "power2 PSU 12V Rail Pwr (out)", + "curr1 PSU 220V Rail Curr (in)", + "curr2 PSU 12V Rail Curr (out)" + ] + }, + "MTEF-AC-C": { + "label": [ + "in1 PSU 220V Rail (in)", + "in3 PSU 12V Rail (out)", + "fan1 PSU Fan 1", + "temp1 PSU Temp 1", + "temp2 PSU Temp 2", + "temp3 PSU Temp 3", + "power1 PSU 220V Rail Pwr (in)", + "power2 PSU 12V Rail Pwr (out)", + "curr1 PSU 220V Rail Curr (in)", + "curr2 PSU 12V Rail Curr (out)" + ], + "ignore": [ + "in2", + "fan2", + "fan3" + ], + "set": [ + "in3_lcrit in3_crit * 0.662", + "in3_min in3_crit * 0.745", + "in3_max in3_crit * 0.952" + ] + }, + "MTEF-AC-C-SS1": { + "label": [ + "in1 PSU 220V Rail (in)", + "in3 PSU 12V Rail (out)", + "fan1 PSU Fan 1", + "temp1 PSU Temp 1", + "temp2 PSU Temp 2", + "temp3 PSU Temp 3", + "power1 PSU 220V Rail Pwr (in)", + "power2 PSU 12V Rail Pwr (out)", + "curr1 PSU 220V Rail Curr (in)", + "curr2 PSU 12V Rail Curr (out)" + ], + "ignore": [ + "in2", + "fan2", + "fan3" + ], + "set": [ + "in3_lcrit in3_crit * 0.662", + "in3_min in3_crit * 0.745", + "in3_max in3_crit * 0.952" + ] + }, + "MTEF-AC-E": { + "label": [ + "in1 PSU 220V Rail (in)", + "in2 PSU 12V Rail (out)", + "fan1 PSU Fan 1", + "temp1 PSU Temp 1", + "temp2 PSU Temp 2", + "temp3 PSU Temp 3", + "power1 PSU 220V Rail Pwr (in)", + "power2 PSU 12V Rail Pwr (out)", + "curr1 PSU 220V Rail Curr (in)", + "curr2 PSU 12V Rail Curr (out)" + ] + }, + "MTEF-AC-F": { + "label": [ + "in1 PSU 220V Rail (in)", + "in3 PSU 12V Rail (out)", + "fan1 PSU Fan 1", + "temp1 PSU Temp 1", + "temp2 PSU Temp 2", + "temp3 PSU Temp 3", + "power1 PSU 220V Rail Pwr (in)", + "power2 PSU 12V Rail Pwr (out)", + "curr1 PSU 220V Rail Curr (in)", + "curr2 PSU 12V Rail Curr (out)" + ], + "ignore": [ + "in2" + ] + }, + "MTEF-AC-G-ACBEL": { + "label": [ + "in1 PSU 220V Rail (in)", + "in2 PSU 12V Rail (out)", + "fan1 PSU Fan 1", + "temp1 PSU Temp 1", + "temp2 PSU Temp 2", + "power1 PSU 220V Rail Pwr (in)", + "power2 PSU 12V Rail Pwr (out)", + "curr1 PSU 220V Rail Curr (in)", + "curr2 PSU 12V Rail Curr (out)" + ] + }, + "MTEF-AC-G-DELTA":{ + + }, + "MTEF-AC-I": { + "label": [ + "in1 PSU 220V Rail (in)", + "in2 PSU 12V Rail (out)", + "fan1 PSU Fan 1", + "temp1 PSU Temp 1", + "temp2 PSU Temp 2", + "power1 PSU 220V Rail Pwr (in)", + "power2 PSU 12V Rail Pwr (out)", + "curr1 PSU 220V Rail Curr (in)", + "curr2 PSU 12V Rail Curr (out)" + ] + }, + "MTEF-AC-M": { + "label": [ + "in1 PSU 220V Rail(in)", + "in2 PSU 12V Rail(out)", + "fan1 PSU Fan1", + "temp1 PSU Temp1", + "temp2 PSU Temp2", + "temp3 PSU Temp3", + "curr1 PSU 220V Rail Curr(in)", + "curr2 PSU 12V Rail Curr(out)", + "power1 PSU 220V Rail Pwr(in)", + "power2 PSU 12V Rail Pwr(out)" + ], + "ignore": [ + "in3", + "curr3", + "power3" + ] + }, + "930-9SPSU-00RA-00A" :{ + "label": [ + "in1 PSU 220V Rail (in)", + "in3 PSU 12V Rail (out)", + "fan1 PSU Fan 1", + "temp1 PSU Temp 1", + "temp2 PSU Temp 2", + "temp3 PSU Temp 3", + "power1 PSU 220V Rail Pwr (in)", + "power2 PSU 12V Rail Pwr (out)", + "curr1 PSU 220V Rail Curr (in)", + "curr2 PSU 12V Rail Curr (out)" + ], + "ignore": [ + "in2", + "fan2", + "fan3" + ] + }, + "930-9SPSU-00RA-00B" :{ + "label": [ + "in1 PSU 220V Rail (in)", + "in3 PSU 12V Rail (out)", + "fan1 PSU Fan 1", + "temp1 PSU Temp 1", + "temp2 PSU Temp 2", + "power1 PSU 220V Rail Pwr (in)", + "power2 PSU 12V Rail Pwr (out)", + "curr1 PSU 220V Rail Curr (in)", + "curr2 PSU 12V Rail Curr (out)" + ], + "ignore": [ + "in2" + ], + "set": [ + "power2_cap 0" + ] + }, + "930-9SPSU-00RA-00C" :{ + "label": [ + "in1 PSU 220V Rail (in)", + "in3 PSU 54V Rail (out)", + "fan1 PSU Fan 1", + "temp1 PSU Temp 1", + "temp2 PSU Temp 2", + "temp3 PSU Temp 3", + "power1 PSU 220V Rail Pwr (in)", + "power2 PSU 54V Rail Pwr (out)", + "curr1 PSU 220V Rail Curr (in)", + "curr2 PSU 54V Rail Curr (out)" + ], + "ignore": [ + "in2", + "fan2", + "fan3" + ], + "set": [ + "power2_cap 0" + ] + } + } +} diff --git a/device/mellanox/x86_64-nvidia_sn6810_ld-r0/psu_sensors_conf_updater b/device/mellanox/x86_64-nvidia_sn6810_ld-r0/psu_sensors_conf_updater new file mode 100644 index 00000000000..1c60a574085 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn6810_ld-r0/psu_sensors_conf_updater @@ -0,0 +1,81 @@ +#!/bin/bash + +function update_psu_sensors_configuration() { + local SENSORS_CONFIG_FILE="/tmp/sensors.conf" + local PSU_SENSORS_CONFIG="/usr/share/sonic/platform/psu_sensors.json" + + if [ -f $SENSORS_CONFIG_FILE ]; then + rm $SENSORS_CONFIG_FILE + fi + + if [ -z "$1" ]; then + echo "psu_sensors_conf_updater ERROR: no sensors configuration file had been selected" + return + else + cp $1 $SENSORS_CONFIG_FILE + fi + + platform=$(jq -r '.chassis.name' /usr/share/sonic/platform/platform.json) + # built-in psu, no need for dynamic configruation + if [[ "$platform" == "MSN2100" || "$platform" == "MSN2010" ]]; then return; fi + # incase we don't have this platform's info + if [[ $(jq -r --arg platform "$platform" '.platform[$platform]' $PSU_SENSORS_CONFIG) == "null" ]]; then return; fi + + local rev=$(cat "$1" | grep "Hardware revision" | awk '{print $NF}') + # incase we don't find the revision number + if [ ! $rev ]; then return; fi + # incase we don't have that revision's data + if [[ $(jq -r --arg platform "$platform" --arg rev "$rev" '.platform[$platform][$rev]' $PSU_SENSORS_CONFIG) == "null" ]]; then return; fi + + start_marker_number=$(grep -n "Power supplies" $SENSORS_CONFIG_FILE | cut -f1 -d:) + end_marker_number=$(($(tail -n +$(($start_marker_number + 1)) $SENSORS_CONFIG_FILE | grep -n '^$' | head -n 1 | cut -d: -f1) + $start_marker_number)) + # In some cases, the PSU sensor section may be at the end of the file, + # so using grep alone may not match it. Let's set the end marker + # to the total number of lines in the file directly. + if [ "$end_marker_number" == "$start_marker_number" ]; then + end_marker_number=$(wc -l $SENSORS_CONFIG_FILE | cut -f1 -d' ') + fi + + sed -i "${start_marker_number},${end_marker_number}d" $SENSORS_CONFIG_FILE + + echo "" >> $SENSORS_CONFIG_FILE + echo "# Power supplies" >> $SENSORS_CONFIG_FILE + + bus=$(jq -r --arg platform "$platform" --arg rev "$rev" '.platform[$platform][$rev].bus | map("\"" + . + "\"") | join(" ")' $PSU_SENSORS_CONFIG) + if [ "$bus" ]; then echo "bus $bus" >> $SENSORS_CONFIG_FILE; fi + + mapfile -t chips < <(jq -r --arg platform "$platform" --arg rev "$rev" '.platform[$platform][$rev].chip | to_entries[] | .key' $PSU_SENSORS_CONFIG ) + + for chip in "${chips[@]}"; do + number=$(jq -r --arg platform "$platform" --arg rev "$rev" --arg chip "$chip" '.platform[$platform][$rev].chip[$chip] | to_entries | .[0].value' $PSU_SENSORS_CONFIG) + side=$(jq -r --arg platform "$platform" --arg rev "$rev" --arg chip "$chip" '.platform[$platform][$rev].chip[$chip] | to_entries | .[1].value' $PSU_SENSORS_CONFIG) + psu=$(cat /var/run/hw-management/eeprom/psu${number}_vpd | grep "PN_VPD_FIELD" | cut -d ' ' -f 2 2>&1) + if [ ! "$psu" ]; then + echo "psu_sensors_conf_updater ERROR: Failed to read from /var/run/hw-management/eeprom/psu${number}_vpd" + # keep looking for the rest psus + continue + else + psu=$(echo "$psu" | sed -r 's/-PSR|-PSF//g') + if [ "$psu" == "MTEF-AC-G" ]; then + vendor=$(cat /var/run/hw-management/eeprom/psu${number}_vpd | grep "MFR_NAME:" | cut -d ' ' -f 2 2>&1) + psu="${psu}-${vendor}" + fi + + echo " chip \""$chip"\"" >> $SENSORS_CONFIG_FILE + mapfile -t opers < <(jq -r --arg psu "$psu" '.psu[$psu] | keys[]' $PSU_SENSORS_CONFIG) + for oper in "${opers[@]}"; do + if [ "$oper" == "label" ]; then + section=$(jq -r --arg psu "$psu" --arg oper "$oper" '.psu[$psu][$oper] | map(" " + $oper + " " + . + "\"") | join("\n")' $PSU_SENSORS_CONFIG) + if [[ ! "$side" || "$side" == "null" ]]; then + echo "$section" | sed "s/PSU/\"PSU-$number/g" >> $SENSORS_CONFIG_FILE + else + echo "$section" | sed "s/PSU/\"PSU-$number($side)/g" >> $SENSORS_CONFIG_FILE + fi + else + jq -r --arg psu "$psu" --arg oper "$oper" '.psu[$psu][$oper] | map(" " + $oper + " " + .) | join("\n")' $PSU_SENSORS_CONFIG >> $SENSORS_CONFIG_FILE + fi + done + fi + done + +} diff --git a/device/mellanox/x86_64-nvidia_sn6810_ld-r0/system_health_monitoring_config.json b/device/mellanox/x86_64-nvidia_sn6810_ld-r0/system_health_monitoring_config.json new file mode 100644 index 00000000000..8fa2a029608 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn6810_ld-r0/system_health_monitoring_config.json @@ -0,0 +1,12 @@ +{ + "services_to_ignore": [], + "devices_to_ignore": ["psu", "fan"], + "user_defined_checkers": [], + "polling_interval": 60, + "include_devices": ["liquid_cooling"], + "led_color": { + "fault": "amber", + "normal": "green", + "booting": "amber_blink" + } +} diff --git a/device/mellanox/x86_64-nvidia_sn6810_ld-r0/thermal_policy.json b/device/mellanox/x86_64-nvidia_sn6810_ld-r0/thermal_policy.json new file mode 100644 index 00000000000..3dce7f41485 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn6810_ld-r0/thermal_policy.json @@ -0,0 +1,10 @@ +{ + "thermal_control_algorithm": { + }, + "info_types": [ + + ], + "policies": [ + + ] +} diff --git a/device/mellanox/x86_64-nvidia_sn6810_ld_simx-r0/ACS-SN6810_LD/buffers.json.j2 b/device/mellanox/x86_64-nvidia_sn6810_ld_simx-r0/ACS-SN6810_LD/buffers.json.j2 new file mode 120000 index 00000000000..add8bf8bb7c --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn6810_ld_simx-r0/ACS-SN6810_LD/buffers.json.j2 @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/buffers.json.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn6810_ld_simx-r0/ACS-SN6810_LD/buffers_defaults_objects.j2 b/device/mellanox/x86_64-nvidia_sn6810_ld_simx-r0/ACS-SN6810_LD/buffers_defaults_objects.j2 new file mode 100644 index 00000000000..fa649ca092e --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn6810_ld_simx-r0/ACS-SN6810_LD/buffers_defaults_objects.j2 @@ -0,0 +1,254 @@ +{# + SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES + Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + SPDX-License-Identifier: Apache-2.0 + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +#} + +{# Base on file: https://github.com/nvidia-sonic/sonic-buildimage/blob/master/device/mellanox/x86_64-mlnx_msn2700-r0/ACS-MSN2700/buffers_defaults_objects.j2 #} + +{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %} + "BUFFER_POOL": { + {% if dynamic_mode is not defined and port_names_inactive|length > 0 -%} + "ingress_zero_pool" : { + "mode": "static", + "type": "ingress", + "size": "0" + }, + {% endif -%} + "ingress_lossless_pool": { + {% if dynamic_mode is not defined -%} + "size": "{{ ingress_lossless_pool_size }}", + {% endif -%} + "type": "ingress", + "mode": "dynamic" + }, + "ingress_lossy_pool": { + {% if dynamic_mode is not defined -%} + "size": "{{ ingress_lossy_pool_size }}", + {% endif -%} + "type": "ingress", + "mode": "dynamic" + }, + "egress_lossless_pool": { + "size": "{{ egress_lossless_pool_size }}", + "type": "egress", + "mode": "dynamic" + }, + "egress_lossy_pool": { + {% if dynamic_mode is not defined -%} + "size": "{{ egress_lossy_pool_size }}", + {% endif -%} + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + {% if dynamic_mode is not defined and port_names_inactive|length > 0 -%} + "ingress_lossy_pg_zero_profile" : { + "pool":"ingress_zero_pool", + "size":"0", + "static_th":"0" + }, + "ingress_lossless_zero_profile" : { + "pool":"ingress_lossless_pool", + "size":"0", + "dynamic_th":"-8" + }, + "ingress_lossy_zero_profile" : { + "pool":"ingress_lossy_pool", + "size":"0", + "dynamic_th":"-8" + }, + "egress_lossless_zero_profile" : { + "pool":"egress_lossless_pool", + "size":"0", + "dynamic_th":"-8" + }, + "egress_lossy_zero_profile" : { + "pool":"egress_lossy_pool", + "size":"0", + "dynamic_th":"-8" + }, + {% endif -%} + "ingress_lossless_profile": { + "pool":"ingress_lossless_pool", + "size":"0", + "dynamic_th":"1" + }, + "ingress_lossy_port_profile": { + "pool":"ingress_lossy_pool", + "size":"0", + "dynamic_th":"4" + }, + "egress_lossless_profile": { + "pool":"egress_lossless_pool", + "size":"0", + "dynamic_th":"7" + }, + "egress_lossy_profile": { + "pool":"egress_lossy_pool", + "size":"0", + "dynamic_th":"1" + }, + "q_lossy_profile": { + "pool":"egress_lossy_pool", + "size":"2048", + "dynamic_th":"0" + }, + "ingress_lossy_profile": { + "pool":"ingress_lossy_pool", + "size":"0", + "dynamic_th":"0" + } + }, +{%- endmacro %} + +{%- macro generate_profile_lists(port_names_active, port_names_inactive) %} + "BUFFER_PORT_INGRESS_PROFILE_LIST": { +{% for port in port_names_active.split(',') %} + "{{ port }}": { + "profile_list" : "ingress_lossless_profile,ingress_lossy_port_profile" + }{% if not loop.last %},{% endif %} + +{% endfor %} +{% if port_names_inactive|length > 0 %} +, +{% for port in port_names_inactive.split(',') %} + "{{ port }}": { +{% if dynamic_mode is defined %} + "profile_list" : "ingress_lossless_profile,ingress_lossy_port_profile" +{% else %} + "profile_list" : "ingress_lossless_zero_profile,ingress_lossy_zero_profile" +{% endif %} + }{% if not loop.last %},{% endif %} + +{% endfor %} +{% endif %} + }, + "BUFFER_PORT_EGRESS_PROFILE_LIST": { +{% for port in port_names_active.split(',') %} + "{{ port }}": { + "profile_list" : "egress_lossless_profile,egress_lossy_profile" + }{% if not loop.last %},{% endif %} + +{% endfor %} +{% if port_names_inactive|length > 0 %} +, +{% for port in port_names_inactive.split(',') %} + "{{ port }}": { +{% if dynamic_mode is defined %} + "profile_list" : "egress_lossless_profile,egress_lossy_profile" +{% else %} + "profile_list" : "egress_lossless_zero_profile,egress_lossy_zero_profile" +{% endif %} + }{% if not loop.last %},{% endif %} + +{% endfor %} +{% endif %} + } +{%- endmacro %} + +{%- macro generate_queue_buffers(port_names_active, port_names_inactive) %} + "BUFFER_QUEUE": { +{% for port in port_names_active.split(',') %} + "{{ port }}|3-4": { + "profile" : "egress_lossless_profile" + }, +{% endfor %} +{% for port in port_names_active.split(',') %} + "{{ port }}|0-2": { + "profile" : "q_lossy_profile" + }, +{% endfor %} +{% for port in port_names_active.split(',') %} + "{{ port }}|5-6": { + "profile" : "q_lossy_profile" + }{% if not loop.last %},{% endif %} + +{% endfor %} +{% if port_names_inactive|length > 0 %} +, +{% if dynamic_mode is defined %} +{% for port in port_names_inactive.split(',') %} + "{{ port }}|3-4": { + "profile" : "egress_lossless_profile" + }, +{% endfor %} +{% for port in port_names_inactive.split(',') %} + "{{ port }}|0-2": { + "profile" : "q_lossy_profile" + }, +{% endfor %} +{% for port in port_names_inactive.split(',') %} + "{{ port }}|5-6": { + "profile" : "q_lossy_profile" + }{% if not loop.last %},{% endif %} + +{% endfor %} +{% else %} +{% for port in port_names_inactive.split(',') %} + "{{ port }}|3-4": { + "profile" : "egress_lossless_zero_profile" + }, +{% endfor %} +{% for port in port_names_inactive.split(',') %} + "{{ port }}|0-2": { + "profile" : "q_lossy_profile" + }, +{% endfor %} +{% for port in port_names_inactive.split(',') %} + "{{ port }}|5-6": { + "profile" : "q_lossy_profile" + }{% if not loop.last %},{% endif %} + +{% endfor %} +{% endif %} +{% endif %} + } +{%- endmacro %} + +{%- macro generate_pg_profiles(port_names_active, port_names_inactive) %} + "BUFFER_PG": { +{% for port in port_names_active.split(',') %} +{% if dynamic_mode is defined %} + "{{ port }}|3-4": { + "profile" : "NULL" + }, +{% endif %} + "{{ port }}|0": { + "profile" : "ingress_lossy_profile" + }{% if not loop.last %},{% endif %} + +{% endfor %} +{% if port_names_inactive|length > 0 %} +{%- for port in port_names_inactive.split(',') %} + {%- if loop.first -%},{%- endif -%} +{% if dynamic_mode is defined %} + "{{ port }}|3-4": { + "profile" : "NULL" + }, +{% endif %} + "{{ port }}|0": { +{% if dynamic_mode is defined %} + "profile" : "ingress_lossy_profile" +{% else %} + "profile" : "ingress_lossy_pg_zero_profile" +{% endif %} + }{% if not loop.last %},{% endif %} + +{% endfor %} +{% endif %} + } +{%- endmacro %} diff --git a/device/mellanox/x86_64-nvidia_sn6810_ld_simx-r0/ACS-SN6810_LD/buffers_defaults_t0.j2 b/device/mellanox/x86_64-nvidia_sn6810_ld_simx-r0/ACS-SN6810_LD/buffers_defaults_t0.j2 new file mode 100644 index 00000000000..a73b4e514cc --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn6810_ld_simx-r0/ACS-SN6810_LD/buffers_defaults_t0.j2 @@ -0,0 +1,40 @@ +{# + SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES + Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + Apache-2.0 + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +#} +{% set default_cable = '5m' %} +{% set ingress_lossless_pool_size = '81007616' %} +{% set ingress_lossy_pool_size = '81007616' %} +{% set egress_lossless_pool_size = '224143360' %} +{% set egress_lossy_pool_size = '81007616' %} + +{% import 'buffers_defaults_objects.j2' as defs with context %} + +{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %} +{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }} +{%- endmacro %} diff --git a/device/mellanox/x86_64-nvidia_sn6810_ld_simx-r0/ACS-SN6810_LD/buffers_defaults_t1.j2 b/device/mellanox/x86_64-nvidia_sn6810_ld_simx-r0/ACS-SN6810_LD/buffers_defaults_t1.j2 new file mode 100644 index 00000000000..30108aaba58 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn6810_ld_simx-r0/ACS-SN6810_LD/buffers_defaults_t1.j2 @@ -0,0 +1,40 @@ +{# + SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES + Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + Apache-2.0 + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +#} +{% set default_cable = '40m' %} +{% set ingress_lossless_pool_size = '60167168' %} +{% set ingress_lossy_pool_size = '60167168' %} +{% set egress_lossless_pool_size = '224143360' %} +{% set egress_lossy_pool_size = '60167168' %} + +{% import 'buffers_defaults_objects.j2' as defs with context %} + +{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %} +{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }} +{%- endmacro %} diff --git a/device/mellanox/x86_64-nvidia_sn6810_ld_simx-r0/ACS-SN6810_LD/buffers_dynamic.json.j2 b/device/mellanox/x86_64-nvidia_sn6810_ld_simx-r0/ACS-SN6810_LD/buffers_dynamic.json.j2 new file mode 100644 index 00000000000..2c7f4fa1ae1 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn6810_ld_simx-r0/ACS-SN6810_LD/buffers_dynamic.json.j2 @@ -0,0 +1,20 @@ +{# + SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES + Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + Apache-2.0 + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +#} +{%- set default_topo = 't0' %} +{%- set dynamic_mode = 'true' %} +{%- include 'buffers_config.j2' %} diff --git a/device/mellanox/x86_64-nvidia_sn6810_ld_simx-r0/ACS-SN6810_LD/create_only_config_db_buffers.json b/device/mellanox/x86_64-nvidia_sn6810_ld_simx-r0/ACS-SN6810_LD/create_only_config_db_buffers.json new file mode 100644 index 00000000000..6feb156714f --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn6810_ld_simx-r0/ACS-SN6810_LD/create_only_config_db_buffers.json @@ -0,0 +1,7 @@ +{ + "DEVICE_METADATA": { + "localhost": { + "create_only_config_db_buffers": "true" + } + } +} diff --git a/device/mellanox/x86_64-nvidia_sn6810_ld_simx-r0/ACS-SN6810_LD/hwsku.json b/device/mellanox/x86_64-nvidia_sn6810_ld_simx-r0/ACS-SN6810_LD/hwsku.json new file mode 100644 index 00000000000..93aabee833f --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn6810_ld_simx-r0/ACS-SN6810_LD/hwsku.json @@ -0,0 +1,522 @@ +{ + "interfaces": { + "Ethernet0": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet4": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet8": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet12": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet16": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet20": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet24": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet28": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet32": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet36": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet40": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet44": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet48": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet52": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet56": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet60": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet64": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet68": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet72": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet76": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet80": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet84": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet88": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet92": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet96": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet100": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet104": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet108": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet112": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet116": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet120": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet124": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet128": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet132": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet136": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet140": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet144": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet148": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet152": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet156": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet160": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet164": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet168": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet172": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet176": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet180": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet184": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet188": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet192": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet196": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet200": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet204": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet208": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet212": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet216": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet220": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet224": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet228": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet232": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet236": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet240": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet244": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet248": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet252": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet256": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet260": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet264": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet268": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet272": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet276": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet280": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet284": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet288": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet292": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet296": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet300": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet304": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet308": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet312": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet316": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet320": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet324": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet328": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet332": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet336": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet340": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet344": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet348": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet352": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet356": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet360": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet364": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet368": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet372": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet376": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet380": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet384": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet388": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet392": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet396": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet400": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet404": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet408": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet412": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet416": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet420": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet424": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet428": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet432": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet436": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet440": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet444": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet448": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet452": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet456": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet460": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet464": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet468": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet472": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet476": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet480": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet484": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet488": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet492": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet496": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet500": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet504": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet508": { + "default_brkout_mode": "1x800G", + "port_type": "CPO" + }, + "Ethernet512": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet513": { + "default_brkout_mode": "1x25G[10G]" + } + } +} diff --git a/device/mellanox/x86_64-nvidia_sn6810_ld_simx-r0/ACS-SN6810_LD/pg_profile_lookup.ini b/device/mellanox/x86_64-nvidia_sn6810_ld_simx-r0/ACS-SN6810_LD/pg_profile_lookup.ini new file mode 100644 index 00000000000..04129ddfb9e --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn6810_ld_simx-r0/ACS-SN6810_LD/pg_profile_lookup.ini @@ -0,0 +1,33 @@ +## +## SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +## Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +## Apache-2.0 +## +## Licensed under the Apache License, Version 2.0 (the "License"); +## you may not use this file except in compliance with the License. +## You may obtain a copy of the License at +## +## http://www.apache.org/licenses/LICENSE-2.0 +## +## Unless required by applicable law or agreed to in writing, software +## distributed under the License is distributed on an "AS IS" BASIS, +## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +## See the License for the specific language governing permissions and +## limitations under the License. +## +# PG lossless profiles. +# speed cable size xon xoff threshold + 10000 5m 63488 43008 20480 0 + 25000 5m 64512 43008 21504 0 + 100000 5m 87040 43008 44032 0 + 200000 5m 91136 43008 48128 0 + 400000 5m 124928 43008 81920 0 + 800000 5m 190464 43008 147456 0 + 100000 40m 91136 43008 48128 0 + 200000 40m 101376 43008 58368 0 + 400000 40m 144384 43008 101376 0 + 800000 40m 229376 43008 186368 0 + 100000 300m 128000 43008 84992 0 + 200000 300m 173056 43008 130048 0 + 400000 300m 287744 43008 244736 0 + 800000 300m 516096 43008 473088 0 \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn6810_ld_simx-r0/ACS-SN6810_LD/port_config.ini b/device/mellanox/x86_64-nvidia_sn6810_ld_simx-r0/ACS-SN6810_LD/port_config.ini new file mode 100644 index 00000000000..3adb8e306d6 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn6810_ld_simx-r0/ACS-SN6810_LD/port_config.ini @@ -0,0 +1,149 @@ +## +## SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +## Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +## Apache-2.0 +## +## Licensed under the Apache License, Version 2.0 (the "License"); +## you may not use this file except in compliance with the License. +## You may obtain a copy of the License at +## +## http://www.apache.org/licenses/LICENSE-2.0 +## +## Unless required by applicable law or agreed to in writing, software +## distributed under the License is distributed on an "AS IS" BASIS, +## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +## See the License for the specific language governing permissions and +## limitations under the License. +## + +# name lanes alias index speed type +Ethernet0 0,1,2,3 etp1 1 800000 cpo +Ethernet4 4,5,6,7 etp2 1 800000 cpo +Ethernet8 8,9,10,11 etp3 1 800000 cpo +Ethernet12 12,13,14,15 etp4 1 800000 cpo +Ethernet16 16,17,18,19 etp5 1 800000 cpo +Ethernet20 20,21,22,23 etp6 1 800000 cpo +Ethernet24 24,25,26,27 etp7 1 800000 cpo +Ethernet28 28,29,30,31 etp8 1 800000 cpo +Ethernet32 32,33,34,35 etp9 2 800000 cpo +Ethernet36 36,37,38,39 etp10 2 800000 cpo +Ethernet40 40,41,42,43 etp11 2 800000 cpo +Ethernet44 44,45,46,47 etp12 2 800000 cpo +Ethernet48 48,49,50,51 etp13 2 800000 cpo +Ethernet52 52,53,54,55 etp14 2 800000 cpo +Ethernet56 56,57,58,59 etp15 2 800000 cpo +Ethernet60 60,61,62,63 etp16 2 800000 cpo +Ethernet64 64,65,66,67 etp17 3 800000 cpo +Ethernet68 68,69,70,71 etp18 3 800000 cpo +Ethernet72 72,73,74,75 etp19 3 800000 cpo +Ethernet76 76,77,78,79 etp20 3 800000 cpo +Ethernet80 80,81,82,83 etp21 3 800000 cpo +Ethernet84 84,85,86,87 etp22 3 800000 cpo +Ethernet88 88,89,90,91 etp23 3 800000 cpo +Ethernet92 92,93,94,95 etp24 3 800000 cpo +Ethernet96 96,97,98,99 etp25 4 800000 cpo +Ethernet100 100,101,102,103 etp26 4 800000 cpo +Ethernet104 104,105,106,107 etp27 4 800000 cpo +Ethernet108 108,109,110,111 etp28 4 800000 cpo +Ethernet112 112,113,114,115 etp29 4 800000 cpo +Ethernet116 116,117,118,119 etp30 4 800000 cpo +Ethernet120 120,121,122,123 etp31 4 800000 cpo +Ethernet124 124,125,126,127 etp32 4 800000 cpo +Ethernet128 128,129,130,131 etp33 5 800000 cpo +Ethernet132 132,133,134,135 etp34 5 800000 cpo +Ethernet136 136,137,138,139 etp35 5 800000 cpo +Ethernet140 140,141,142,143 etp36 5 800000 cpo +Ethernet144 144,145,146,147 etp37 5 800000 cpo +Ethernet148 148,149,150,151 etp38 5 800000 cpo +Ethernet152 152,153,154,155 etp39 5 800000 cpo +Ethernet156 156,157,158,159 etp40 5 800000 cpo +Ethernet160 160,161,162,163 etp41 6 800000 cpo +Ethernet164 164,165,166,167 etp42 6 800000 cpo +Ethernet168 168,169,170,171 etp43 6 800000 cpo +Ethernet172 172,173,174,175 etp44 6 800000 cpo +Ethernet176 176,177,178,179 etp45 6 800000 cpo +Ethernet180 180,181,182,183 etp46 6 800000 cpo +Ethernet184 184,185,186,187 etp47 6 800000 cpo +Ethernet188 188,189,190,191 etp48 6 800000 cpo +Ethernet192 192,193,194,195 etp49 7 800000 cpo +Ethernet196 196,197,198,199 etp50 7 800000 cpo +Ethernet200 200,201,202,203 etp51 7 800000 cpo +Ethernet204 204,205,206,207 etp52 7 800000 cpo +Ethernet208 208,209,210,211 etp53 7 800000 cpo +Ethernet212 212,213,214,215 etp54 7 800000 cpo +Ethernet216 216,217,218,219 etp55 7 800000 cpo +Ethernet220 220,221,222,223 etp56 7 800000 cpo +Ethernet224 224,225,226,227 etp57 8 800000 cpo +Ethernet228 228,229,230,231 etp58 8 800000 cpo +Ethernet232 232,233,234,235 etp59 8 800000 cpo +Ethernet236 236,237,238,239 etp60 8 800000 cpo +Ethernet240 240,241,242,243 etp61 8 800000 cpo +Ethernet244 244,245,246,247 etp62 8 800000 cpo +Ethernet248 248,249,250,251 etp63 8 800000 cpo +Ethernet252 252,253,254,255 etp64 8 800000 cpo +Ethernet256 256,257,258,259 etp65 9 800000 cpo +Ethernet260 260,261,262,263 etp66 9 800000 cpo +Ethernet264 264,265,266,267 etp67 9 800000 cpo +Ethernet268 268,269,270,271 etp68 9 800000 cpo +Ethernet272 272,273,274,275 etp69 9 800000 cpo +Ethernet276 276,277,278,279 etp70 9 800000 cpo +Ethernet280 280,281,282,283 etp71 9 800000 cpo +Ethernet284 284,285,286,287 etp72 9 800000 cpo +Ethernet288 288,289,290,291 etp73 10 800000 cpo +Ethernet292 292,293,294,295 etp74 10 800000 cpo +Ethernet296 296,297,298,299 etp75 10 800000 cpo +Ethernet300 300,301,302,303 etp76 10 800000 cpo +Ethernet304 304,305,306,307 etp77 10 800000 cpo +Ethernet308 308,309,310,311 etp78 10 800000 cpo +Ethernet312 312,313,314,315 etp79 10 800000 cpo +Ethernet316 316,317,318,319 etp80 10 800000 cpo +Ethernet320 320,321,322,323 etp81 11 800000 cpo +Ethernet324 324,325,326,327 etp82 11 800000 cpo +Ethernet328 328,329,330,331 etp83 11 800000 cpo +Ethernet332 332,333,334,335 etp84 11 800000 cpo +Ethernet336 336,337,338,339 etp85 11 800000 cpo +Ethernet340 340,341,342,343 etp86 11 800000 cpo +Ethernet344 344,345,346,347 etp87 11 800000 cpo +Ethernet348 348,349,350,351 etp88 11 800000 cpo +Ethernet352 352,353,354,355 etp89 12 800000 cpo +Ethernet356 356,357,358,359 etp90 12 800000 cpo +Ethernet360 360,361,362,363 etp91 12 800000 cpo +Ethernet364 364,365,366,367 etp92 12 800000 cpo +Ethernet368 368,369,370,371 etp93 12 800000 cpo +Ethernet372 372,373,374,375 etp94 12 800000 cpo +Ethernet376 376,377,378,379 etp95 12 800000 cpo +Ethernet380 380,381,382,383 etp96 12 800000 cpo +Ethernet384 384,385,386,387 etp97 13 800000 cpo +Ethernet388 388,389,390,391 etp98 13 800000 cpo +Ethernet392 392,393,394,395 etp99 13 800000 cpo +Ethernet396 396,397,398,399 etp100 13 800000 cpo +Ethernet400 400,401,402,403 etp101 13 800000 cpo +Ethernet404 404,405,406,407 etp102 13 800000 cpo +Ethernet408 408,409,410,411 etp103 13 800000 cpo +Ethernet412 412,413,414,415 etp104 13 800000 cpo +Ethernet416 416,417,418,419 etp105 14 800000 cpo +Ethernet420 420,421,422,423 etp106 14 800000 cpo +Ethernet424 424,425,426,427 etp107 14 800000 cpo +Ethernet428 428,429,430,431 etp108 14 800000 cpo +Ethernet432 432,433,434,435 etp109 14 800000 cpo +Ethernet436 436,437,438,439 etp110 14 800000 cpo +Ethernet440 440,441,442,443 etp111 14 800000 cpo +Ethernet444 444,445,446,447 etp112 14 800000 cpo +Ethernet448 448,449,450,451 etp113 15 800000 cpo +Ethernet452 452,453,454,455 etp114 15 800000 cpo +Ethernet456 456,457,458,459 etp115 15 800000 cpo +Ethernet460 460,461,462,463 etp116 15 800000 cpo +Ethernet464 464,465,466,467 etp117 15 800000 cpo +Ethernet468 468,469,470,471 etp118 15 800000 cpo +Ethernet472 472,473,474,475 etp119 15 800000 cpo +Ethernet476 476,477,478,479 etp120 15 800000 cpo +Ethernet480 480,481,482,483 etp121 16 800000 cpo +Ethernet484 484,485,486,487 etp122 16 800000 cpo +Ethernet488 488,489,490,491 etp123 16 800000 cpo +Ethernet492 492,493,494,495 etp124 16 800000 cpo +Ethernet496 496,497,498,499 etp125 16 800000 cpo +Ethernet500 500,501,502,503 etp126 16 800000 cpo +Ethernet504 504,505,506,507 etp127 16 800000 cpo +Ethernet508 508,509,510,511 etp128 16 800000 cpo +Ethernet512 512 etp129a 17 25000 sfp +Ethernet513 513 etp129b 17 25000 sfp \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn6810_ld_simx-r0/ACS-SN6810_LD/qos.json.j2 b/device/mellanox/x86_64-nvidia_sn6810_ld_simx-r0/ACS-SN6810_LD/qos.json.j2 new file mode 120000 index 00000000000..eccf286dc87 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn6810_ld_simx-r0/ACS-SN6810_LD/qos.json.j2 @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/qos.json.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn6810_ld_simx-r0/ACS-SN6810_LD/sai.profile b/device/mellanox/x86_64-nvidia_sn6810_ld_simx-r0/ACS-SN6810_LD/sai.profile new file mode 100644 index 00000000000..4783f6fb61d --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn6810_ld_simx-r0/ACS-SN6810_LD/sai.profile @@ -0,0 +1,3 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_6810_0ports.xml +SAI_KEY_SPC5_LOSSY_SCHEDULING=1 +SAI_DEFAULT_SWITCHING_MODE_STORE_FORWARD=1 diff --git a/device/mellanox/x86_64-nvidia_sn6810_ld_simx-r0/ACS-SN6810_LD/sai_6810_0ports.xml b/device/mellanox/x86_64-nvidia_sn6810_ld_simx-r0/ACS-SN6810_LD/sai_6810_0ports.xml new file mode 100644 index 00000000000..fc7f53b5a23 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn6810_ld_simx-r0/ACS-SN6810_LD/sai_6810_0ports.xml @@ -0,0 +1,29 @@ + + + + + + + 00:02:03:04:05:00 + + + 1 + + + diff --git a/device/mellanox/x86_64-nvidia_sn6810_ld_simx-r0/ACS-SN6810_LD/supporting_bulk_counter_groups b/device/mellanox/x86_64-nvidia_sn6810_ld_simx-r0/ACS-SN6810_LD/supporting_bulk_counter_groups new file mode 100644 index 00000000000..6faff6b1be2 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn6810_ld_simx-r0/ACS-SN6810_LD/supporting_bulk_counter_groups @@ -0,0 +1 @@ +QUEUE_WATERMARK_STAT_COUNTER,QUEUE_STAT_COUNTER,PG_WATERMARK_STAT_COUNTER,PFC_WD,PORT_STAT_COUNTER diff --git a/device/mellanox/x86_64-nvidia_sn6810_ld_simx-r0/ACS-SN6810_LD/traffic_config.j2 b/device/mellanox/x86_64-nvidia_sn6810_ld_simx-r0/ACS-SN6810_LD/traffic_config.j2 new file mode 100644 index 00000000000..fd69aa4797c --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn6810_ld_simx-r0/ACS-SN6810_LD/traffic_config.j2 @@ -0,0 +1,34 @@ +{# + SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES + Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + Apache-2.0 + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + http://www.apache.org/licenses/LICENSE-2.0 + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +#} + +{# Set traffic_classification_enable to true for Bison platform #} +{%- set traffic_classification_enable = true %} + +{# +The calculation formula for wred_threshold_limit is as follows: +egress_lossless_pool total size / 12 / 1024 +Where: +- egress_lossless_pool total size = 136209408 bytes +- 12 represents the number of queues +- 1024 is used to convert the unit from bytes to KB + +The result is 11084 (rounded down). + +So, wred_threshold_limit = 136209408 / 12 / 1024 = 11084 (KB per queue) + +The final total value is: +11084 (KB) * 12 (queues) * 1024 = 136200192 bytes +#} +{% set wred_threshold_limit = 136200192 %} diff --git a/device/mellanox/x86_64-nvidia_sn6810_ld_simx-r0/default_sku b/device/mellanox/x86_64-nvidia_sn6810_ld_simx-r0/default_sku new file mode 100644 index 00000000000..d2169fc3775 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn6810_ld_simx-r0/default_sku @@ -0,0 +1 @@ +ACS-SN6810_LD t1 diff --git a/device/mellanox/x86_64-nvidia_sn6810_ld_simx-r0/pcie.yaml b/device/mellanox/x86_64-nvidia_sn6810_ld_simx-r0/pcie.yaml new file mode 100644 index 00000000000..f7217cd2f31 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn6810_ld_simx-r0/pcie.yaml @@ -0,0 +1,207 @@ +## +## SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +## Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +## SPDX-License-Identifier: Apache-2.0 +## +## Licensed under the Apache License, Version 2.0 (the "License"); +## you may not use this file except in compliance with the License. +## You may obtain a copy of the License at +## +## http://www.apache.org/licenses/LICENSE-2.0 +## +## Unless required by applicable law or agreed to in writing, software +## distributed under the License is distributed on an "AS IS" BASIS, +## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +## See the License for the specific language governing permissions and +## limitations under the License. +## + +- bus: '00' + dev: '00' + fn: '0' + id: 14b5 + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h-19h PCIe Root + Complex (rev 01)' +- bus: '00' + dev: '00' + fn: '2' + id: 14b6 + name: 'IOMMU: Advanced Micro Devices, Inc. [AMD] Family 17h-19h IOMMU' +- bus: '00' + dev: '01' + fn: '0' + id: 14b7 + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h-19h PCIe Dummy + Host Bridge (rev 01)' +- bus: '00' + dev: '01' + fn: '3' + id: 14b8 + name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Family 17h-19h PCIe GPP Bridge' +- bus: '00' + dev: '02' + fn: '0' + id: 14b7 + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h-19h PCIe Dummy + Host Bridge (rev 01)' +- bus: '00' + dev: '02' + fn: '2' + id: 14ba + name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Family 17h-19h PCIe GPP Bridge' +- bus: '00' + dev: '03' + fn: '0' + id: 14b7 + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h-19h PCIe Dummy + Host Bridge (rev 01)' +- bus: '00' + dev: '04' + fn: '0' + id: 14b7 + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h-19h PCIe Dummy + Host Bridge (rev 01)' +- bus: '00' + dev: 08 + fn: '0' + id: 14b7 + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Family 17h-19h PCIe Dummy + Host Bridge (rev 01)' +- bus: '00' + dev: 08 + fn: '1' + id: 14b9 + name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Family 17h-19h Internal PCIe + GPP Bridge (rev 10)' +- bus: '00' + dev: 08 + fn: '2' + id: 14b9 + name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Family 17h-19h Internal PCIe + GPP Bridge (rev 10)' +- bus: '00' + dev: 08 + fn: '3' + id: 14b9 + name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Family 17h-19h Internal PCIe + GPP Bridge (rev 10)' +- bus: '00' + dev: '14' + fn: '0' + id: 790b + name: 'SMBus: Advanced Micro Devices, Inc. [AMD] FCH SMBus Controller (rev 71)' +- bus: '00' + dev: '14' + fn: '3' + id: 790e + name: 'ISA bridge: Advanced Micro Devices, Inc. [AMD] FCH LPC Bridge (rev 51)' +- bus: '00' + dev: '18' + fn: '0' + id: '1679' + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Rembrandt Data Fabric: Device + 18h; Function 0' +- bus: '00' + dev: '18' + fn: '1' + id: 167a + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Rembrandt Data Fabric: Device + 18h; Function 1' +- bus: '00' + dev: '18' + fn: '2' + id: 167b + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Rembrandt Data Fabric: Device + 18h; Function 2' +- bus: '00' + dev: '18' + fn: '3' + id: 167c + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Rembrandt Data Fabric: Device + 18h; Function 3' +- bus: '00' + dev: '18' + fn: '4' + id: 167d + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Rembrandt Data Fabric: Device + 18h; Function 4' +- bus: '00' + dev: '18' + fn: '5' + id: 167e + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Rembrandt Data Fabric: Device + 18h; Function 5' +- bus: '00' + dev: '18' + fn: '6' + id: 167f + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Rembrandt Data Fabric: Device + 18h; Function 6' +- bus: '00' + dev: '18' + fn: '7' + id: '1680' + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Rembrandt Data Fabric: Device + 18h; Function 7' +- bus: '01' + dev: '00' + fn: '0' + id: '2268' + name: 'Non-Volatile memory controller: Silicon Motion, Inc. SM2268XT (DRAM-less) + NVMe SSD Controller (rev 10)' +- bus: '02' + dev: '00' + fn: '0' + id: cf84 + name: 'Ethernet controller: Mellanox Technologies Spectrum-6 (rev a0)' +- bus: '03' + dev: '00' + fn: '0' + id: 145a + name: 'Non-Essential Instrumentation [1300]: Advanced Micro Devices, Inc. [AMD/ATI] + Dummy Function (absent graphics controller)' +- bus: '03' + dev: '00' + fn: '2' + id: '1649' + name: 'Encryption controller: Advanced Micro Devices, Inc. [AMD] Family 19h PSP/CCP' +- bus: '03' + dev: '00' + fn: '3' + id: 161d + name: 'USB controller: Advanced Micro Devices, Inc. [AMD] Rembrandt USB4 XHCI controller + #3' +- bus: '03' + dev: '00' + fn: '5' + id: 15e2 + name: 'Multimedia controller: Advanced Micro Devices, Inc. [AMD] Audio Coprocessor + (rev 60)' +- bus: '03' + dev: '00' + fn: '7' + id: 15e4 + name: 'Signal processing controller: Advanced Micro Devices, Inc. [AMD] Sensor Fusion + Hub' +- bus: '04' + dev: '00' + fn: '0' + id: 145a + name: 'Non-Essential Instrumentation [1300]: Advanced Micro Devices, Inc. [AMD] + Zeppelin/Raven/Raven2 PCIe Dummy Function (rev a1)' +- bus: '04' + dev: '00' + fn: '2' + id: '1458' + name: 'Ethernet controller: Advanced Micro Devices, Inc. [AMD] XGMAC 10GbE Controller' +- bus: '04' + dev: '00' + fn: '3' + id: '1458' + name: 'Ethernet controller: Advanced Micro Devices, Inc. [AMD] XGMAC 10GbE Controller' +- bus: '05' + dev: '00' + fn: '0' + id: 145a + name: 'Non-Essential Instrumentation [1300]: Advanced Micro Devices, Inc. [AMD] + Zeppelin/Raven/Raven2 PCIe Dummy Function' \ No newline at end of file diff --git a/device/mellanox/x86_64-nvidia_sn6810_ld_simx-r0/platform.json b/device/mellanox/x86_64-nvidia_sn6810_ld_simx-r0/platform.json new file mode 100644 index 00000000000..ac1e017b174 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn6810_ld_simx-r0/platform.json @@ -0,0 +1,1240 @@ +{ + "chassis": { + "name": "SN6810_LD", + "components": [ + { + "name": "ONIE" + }, + { + "name": "SSD" + }, + { + "name": "BIOS" + }, + { + "name": "CPLD1" + }, + { + "name": "CPLD2" + }, + { + "name": "CPLD3" + }, + { + "name": "CPLD4" + }, + { + "name": "BMC" + } + ], + "fans": [], + "fan_drawers": [], + "psus": [], + "pdbs": [ + { + "name": "PDB 1" + } + ], + "leak_sensors": [ + { + "name": "leakage1" + }, + { + "name": "leakage2" + } + ], + "thermals": [ + { + "name": "ASIC", + "polling_interval": 3 + }, + { + "name": "CPU Pack Temp" + }, + { + "name": "SODIMM 1 Temp" + }, + { + "name": "SODIMM 2 Temp" + } + ], + "sfps": [ + { + "name": "sfp1", + "thermals": [ + { + "name": "xSFP module 1 Temp" + } + ] + } + ] + }, + "interfaces": { + "Ethernet0": { + "index": "1,1,1,1", + "lanes": "0,1,2,3", + "breakout_modes": { + "1x800G": ["etp1"], + "2x800G[400G]": ["etp1a", "etp1b"], + "4x400G[200G]": ["etp1a", "etp1b", "etp1c", "etp1d"] + } + }, + "Ethernet4": { + "index": "1,1,1,1", + "lanes": "4,5,6,7", + "breakout_modes": { + "1x800G": ["etp2"], + "2x800G[400G]": ["etp2a", "etp2b"], + "4x400G[200G]": ["etp2a", "etp2b", "etp2c", "etp2d"] + } + }, + "Ethernet8": { + "index": "1,1,1,1", + "lanes": "8,9,10,11", + "breakout_modes": { + "1x800G": ["etp3"], + "2x800G[400G]": ["etp3a", "etp3b"], + "4x400G[200G]": ["etp3a", "etp3b", "etp3c", "etp3d"] + } + }, + "Ethernet12": { + "index": "1,1,1,1", + "lanes": "12,13,14,15", + "breakout_modes": { + "1x800G": ["etp4"], + "2x800G[400G]": ["etp4a", "etp4b"], + "4x400G[200G]": ["etp4a", "etp4b", "etp4c", "etp4d"] + } + }, + "Ethernet16": { + "index": "1,1,1,1", + "lanes": "16,17,18,19", + "breakout_modes": { + "1x800G": ["etp5"], + "2x800G[400G]": ["etp5a", "etp5b"], + "4x400G[200G]": ["etp5a", "etp5b", "etp5c", "etp5d"] + } + }, + "Ethernet20": { + "index": "1,1,1,1", + "lanes": "20,21,22,23", + "breakout_modes": { + "1x800G": ["etp6"], + "2x800G[400G]": ["etp6a", "etp6b"], + "4x400G[200G]": ["etp6a", "etp6b", "etp6c", "etp6d"] + } + }, + "Ethernet24": { + "index": "1,1,1,1", + "lanes": "24,25,26,27", + "breakout_modes": { + "1x800G": ["etp7"], + "2x800G[400G]": ["etp7a", "etp7b"], + "4x400G[200G]": ["etp7a", "etp7b", "etp7c", "etp7d"] + } + }, + "Ethernet28": { + "index": "1,1,1,1", + "lanes": "28,29,30,31", + "breakout_modes": { + "1x800G": ["etp8"], + "2x800G[400G]": ["etp8a", "etp8b"], + "4x400G[200G]": ["etp8a", "etp8b", "etp8c", "etp8d"] + } + }, + "Ethernet32": { + "index": "2,2,2,2", + "lanes": "32,33,34,35", + "breakout_modes": { + "1x800G": ["etp9"], + "2x800G[400G]": ["etp9a", "etp9b"], + "4x400G[200G]": ["etp9a", "etp9b", "etp9c", "etp9d"] + } + }, + "Ethernet36": { + "index": "2,2,2,2", + "lanes": "36,37,38,39", + "breakout_modes": { + "1x800G": ["etp10"], + "2x800G[400G]": ["etp10a", "etp10b"], + "4x400G[200G]": ["etp10a", "etp10b", "etp10c", "etp10d"] + } + }, + "Ethernet40": { + "index": "2,2,2,2", + "lanes": "40,41,42,43", + "breakout_modes": { + "1x800G": ["etp11"], + "2x800G[400G]": ["etp11a", "etp11b"], + "4x400G[200G]": ["etp11a", "etp11b", "etp11c", "etp11d"] + } + }, + "Ethernet44": { + "index": "2,2,2,2", + "lanes": "44,45,46,47", + "breakout_modes": { + "1x800G": ["etp12"], + "2x800G[400G]": ["etp12a", "etp12b"], + "4x400G[200G]": ["etp12a", "etp12b", "etp12c", "etp12d"] + } + }, + "Ethernet48": { + "index": "2,2,2,2", + "lanes": "48,49,50,51", + "breakout_modes": { + "1x800G": ["etp13"], + "2x800G[400G]": ["etp13a", "etp13b"], + "4x400G[200G]": ["etp13a", "etp13b", "etp13c", "etp13d"] + } + }, + "Ethernet52": { + "index": "2,2,2,2", + "lanes": "52,53,54,55", + "breakout_modes": { + "1x800G": ["etp14"], + "2x800G[400G]": ["etp14a", "etp14b"], + "4x400G[200G]": ["etp14a", "etp14b", "etp14c", "etp14d"] + } + }, + "Ethernet56": { + "index": "2,2,2,2", + "lanes": "56,57,58,59", + "breakout_modes": { + "1x800G": ["etp15"], + "2x800G[400G]": ["etp15a", "etp15b"], + "4x400G[200G]": ["etp15a", "etp15b", "etp15c", "etp15d"] + } + }, + "Ethernet60": { + "index": "2,2,2,2", + "lanes": "60,61,62,63", + "breakout_modes": { + "1x800G": ["etp16"], + "2x800G[400G]": ["etp16a", "etp16b"], + "4x400G[200G]": ["etp16a", "etp16b", "etp16c", "etp16d"] + } + }, + "Ethernet64": { + "index": "3,3,3,3", + "lanes": "64,65,66,67", + "breakout_modes": { + "1x800G": ["etp17"], + "2x800G[400G]": ["etp17a", "etp17b"], + "4x400G[200G]": ["etp17a", "etp17b", "etp17c", "etp17d"] + } + }, + "Ethernet68": { + "index": "3,3,3,3", + "lanes": "68,69,70,71", + "breakout_modes": { + "1x800G": ["etp18"], + "2x800G[400G]": ["etp18a", "etp18b"], + "4x400G[200G]": ["etp18a", "etp18b", "etp18c", "etp18d"] + } + }, + "Ethernet72": { + "index": "3,3,3,3", + "lanes": "72,73,74,75", + "breakout_modes": { + "1x800G": ["etp19"], + "2x800G[400G]": ["etp19a", "etp19b"], + "4x400G[200G]": ["etp19a", "etp19b", "etp19c", "etp19d"] + } + }, + "Ethernet76": { + "index": "3,3,3,3", + "lanes": "76,77,78,79", + "breakout_modes": { + "1x800G": ["etp20"], + "2x800G[400G]": ["etp20a", "etp20b"], + "4x400G[200G]": ["etp20a", "etp20b", "etp20c", "etp20d"] + } + }, + "Ethernet80": { + "index": "3,3,3,3", + "lanes": "80,81,82,83", + "breakout_modes": { + "1x800G": ["etp21"], + "2x800G[400G]": ["etp21a", "etp21b"], + "4x400G[200G]": ["etp21a", "etp21b", "etp21c", "etp21d"] + } + }, + "Ethernet84": { + "index": "3,3,3,3", + "lanes": "84,85,86,87", + "breakout_modes": { + "1x800G": ["etp22"], + "2x800G[400G]": ["etp22a", "etp22b"], + "4x400G[200G]": ["etp22a", "etp22b", "etp22c", "etp22d"] + } + }, + "Ethernet88": { + "index": "3,3,3,3", + "lanes": "88,89,90,91", + "breakout_modes": { + "1x800G": ["etp23"], + "2x800G[400G]": ["etp23a", "etp23b"], + "4x400G[200G]": ["etp23a", "etp23b", "etp23c", "etp23d"] + } + }, + "Ethernet92": { + "index": "3,3,3,3", + "lanes": "92,93,94,95", + "breakout_modes": { + "1x800G": ["etp24"], + "2x800G[400G]": ["etp24a", "etp24b"], + "4x400G[200G]": ["etp24a", "etp24b", "etp24c", "etp24d"] + } + }, + "Ethernet96": { + "index": "4,4,4,4", + "lanes": "96,97,98,99", + "breakout_modes": { + "1x800G": ["etp25"], + "2x800G[400G]": ["etp25a", "etp25b"], + "4x400G[200G]": ["etp25a", "etp25b", "etp25c", "etp25d"] + } + }, + "Ethernet100": { + "index": "4,4,4,4", + "lanes": "100,101,102,103", + "breakout_modes": { + "1x800G": ["etp26"], + "2x800G[400G]": ["etp26a", "etp26b"], + "4x400G[200G]": ["etp26a", "etp26b", "etp26c", "etp26d"] + } + }, + "Ethernet104": { + "index": "4,4,4,4", + "lanes": "104,105,106,107", + "breakout_modes": { + "1x800G": ["etp27"], + "2x800G[400G]": ["etp27a", "etp27b"], + "4x400G[200G]": ["etp27a", "etp27b", "etp27c", "etp27d"] + } + }, + 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["etp32"], + "2x800G[400G]": ["etp32a", "etp32b"], + "4x400G[200G]": ["etp32a", "etp32b", "etp32c", "etp32d"] + } + }, + "Ethernet128": { + "index": "5,5,5,5", + "lanes": "128,129,130,131", + "breakout_modes": { + "1x800G": ["etp33"], + "2x800G[400G]": ["etp33a", "etp33b"], + "4x400G[200G]": ["etp33a", "etp33b", "etp33c", "etp33d"] + } + }, + "Ethernet132": { + "index": "5,5,5,5", + "lanes": "132,133,134,135", + "breakout_modes": { + "1x800G": ["etp34"], + "2x800G[400G]": ["etp34a", "etp34b"], + "4x400G[200G]": ["etp34a", "etp34b", "etp34c", "etp34d"] + } + }, + "Ethernet136": { + "index": "5,5,5,5", + "lanes": "136,137,138,139", + "breakout_modes": { + "1x800G": ["etp35"], + "2x800G[400G]": ["etp35a", "etp35b"], + "4x400G[200G]": ["etp35a", "etp35b", "etp35c", "etp35d"] + } + }, + "Ethernet140": { + "index": "5,5,5,5", + "lanes": "140,141,142,143", + "breakout_modes": { + "1x800G": ["etp36"], + "2x800G[400G]": ["etp36a", "etp36b"], + "4x400G[200G]": ["etp36a", "etp36b", "etp36c", "etp36d"] + } + }, + "Ethernet144": { + "index": "5,5,5,5", + "lanes": "144,145,146,147", + "breakout_modes": { + "1x800G": ["etp37"], + "2x800G[400G]": ["etp37a", "etp37b"], + "4x400G[200G]": ["etp37a", "etp37b", "etp37c", "etp37d"] + } + }, + "Ethernet148": { + "index": "5,5,5,5", + "lanes": "148,149,150,151", + "breakout_modes": { + "1x800G": ["etp38"], + "2x800G[400G]": ["etp38a", "etp38b"], + "4x400G[200G]": ["etp38a", "etp38b", "etp38c", "etp38d"] + } + }, + "Ethernet152": { + "index": "5,5,5,5", + "lanes": "152,153,154,155", + "breakout_modes": { + "1x800G": ["etp39"], + "2x800G[400G]": ["etp39a", "etp39b"], + "4x400G[200G]": ["etp39a", "etp39b", "etp39c", "etp39d"] + } + }, + "Ethernet156": { + "index": "5,5,5,5", + "lanes": "156,157,158,159", + "breakout_modes": { + "1x800G": ["etp40"], + "2x800G[400G]": ["etp40a", "etp40b"], + "4x400G[200G]": ["etp40a", "etp40b", "etp40c", "etp40d"] + } + }, + "Ethernet160": { + "index": "6,6,6,6", + "lanes": "160,161,162,163", + "breakout_modes": { + "1x800G": ["etp41"], + "2x800G[400G]": ["etp41a", "etp41b"], + "4x400G[200G]": ["etp41a", "etp41b", "etp41c", "etp41d"] + } + }, + "Ethernet164": { + "index": "6,6,6,6", + "lanes": "164,165,166,167", + "breakout_modes": { + "1x800G": ["etp42"], + "2x800G[400G]": ["etp42a", "etp42b"], + "4x400G[200G]": ["etp42a", "etp42b", "etp42c", "etp42d"] + } + }, + "Ethernet168": { + "index": "6,6,6,6", + "lanes": "168,169,170,171", + "breakout_modes": { + "1x800G": ["etp43"], + "2x800G[400G]": ["etp43a", "etp43b"], + "4x400G[200G]": ["etp43a", "etp43b", "etp43c", "etp43d"] + } + }, + "Ethernet172": { + "index": "6,6,6,6", + "lanes": "172,173,174,175", + "breakout_modes": { + "1x800G": ["etp44"], + "2x800G[400G]": ["etp44a", "etp44b"], + "4x400G[200G]": ["etp44a", "etp44b", "etp44c", "etp44d"] + } + }, + "Ethernet176": { + "index": "6,6,6,6", + "lanes": "176,177,178,179", + "breakout_modes": { + "1x800G": ["etp45"], + "2x800G[400G]": ["etp45a", "etp45b"], + "4x400G[200G]": ["etp45a", "etp45b", "etp45c", "etp45d"] + } + }, + "Ethernet180": { + "index": "6,6,6,6", + "lanes": "180,181,182,183", + "breakout_modes": { + "1x800G": ["etp46"], + "2x800G[400G]": ["etp46a", "etp46b"], + "4x400G[200G]": ["etp46a", "etp46b", "etp46c", "etp46d"] + } + }, + "Ethernet184": { + "index": "6,6,6,6", + "lanes": "184,185,186,187", + "breakout_modes": { + "1x800G": ["etp47"], + "2x800G[400G]": ["etp47a", "etp47b"], + "4x400G[200G]": ["etp47a", "etp47b", "etp47c", "etp47d"] + } + }, + "Ethernet188": { + "index": "6,6,6,6", + "lanes": "188,189,190,191", + "breakout_modes": { + "1x800G": ["etp48"], + "2x800G[400G]": ["etp48a", "etp48b"], + "4x400G[200G]": ["etp48a", "etp48b", "etp48c", "etp48d"] + } + }, + "Ethernet192": { + "index": "7,7,7,7", + "lanes": "192,193,194,195", + "breakout_modes": { + "1x800G": ["etp49"], + "2x800G[400G]": ["etp49a", "etp49b"], + "4x400G[200G]": ["etp49a", "etp49b", "etp49c", "etp49d"] + } + }, + "Ethernet196": { + "index": "7,7,7,7", + "lanes": "196,197,198,199", + "breakout_modes": { + "1x800G": ["etp50"], + "2x800G[400G]": ["etp50a", "etp50b"], + "4x400G[200G]": ["etp50a", "etp50b", "etp50c", "etp50d"] + } + }, + "Ethernet200": { + "index": "7,7,7,7", + "lanes": "200,201,202,203", + "breakout_modes": { + "1x800G": ["etp51"], + "2x800G[400G]": ["etp51a", "etp51b"], + "4x400G[200G]": ["etp51a", "etp51b", "etp51c", "etp51d"] + } + }, + "Ethernet204": { + "index": "7,7,7,7", + "lanes": "204,205,206,207", + "breakout_modes": { + "1x800G": ["etp52"], + "2x800G[400G]": ["etp52a", "etp52b"], + "4x400G[200G]": ["etp52a", "etp52b", "etp52c", "etp52d"] + } + }, + "Ethernet208": { + "index": "7,7,7,7", + "lanes": "208,209,210,211", + "breakout_modes": { + "1x800G": ["etp53"], + "2x800G[400G]": ["etp53a", "etp53b"], + "4x400G[200G]": ["etp53a", "etp53b", "etp53c", "etp53d"] + } + }, + "Ethernet212": { + "index": "7,7,7,7", + "lanes": "212,213,214,215", + "breakout_modes": { + "1x800G": ["etp54"], + "2x800G[400G]": ["etp54a", "etp54b"], + "4x400G[200G]": ["etp54a", "etp54b", "etp54c", "etp54d"] + } + }, + "Ethernet216": { + "index": "7,7,7,7", + "lanes": "216,217,218,219", + "breakout_modes": { + "1x800G": ["etp55"], + "2x800G[400G]": ["etp55a", "etp55b"], + "4x400G[200G]": ["etp55a", "etp55b", "etp55c", "etp55d"] + } + }, + "Ethernet220": { + "index": "7,7,7,7", + "lanes": "220,221,222,223", + "breakout_modes": { + "1x800G": ["etp56"], + "2x800G[400G]": ["etp56a", "etp56b"], + "4x400G[200G]": ["etp56a", "etp56b", "etp56c", "etp56d"] + } + }, + "Ethernet224": { + "index": "8,8,8,8", + "lanes": "224,225,226,227", + "breakout_modes": { + "1x800G": ["etp57"], + "2x800G[400G]": ["etp57a", "etp57b"], + "4x400G[200G]": ["etp57a", "etp57b", "etp57c", "etp57d"] + } + }, + "Ethernet228": { + "index": "8,8,8,8", + "lanes": "228,229,230,231", + "breakout_modes": { + "1x800G": ["etp58"], + "2x800G[400G]": ["etp58a", "etp58b"], + "4x400G[200G]": ["etp58a", "etp58b", "etp58c", "etp58d"] + } + }, + "Ethernet232": { + "index": "8,8,8,8", + "lanes": "232,233,234,235", + "breakout_modes": { + "1x800G": ["etp59"], + "2x800G[400G]": ["etp59a", "etp59b"], + "4x400G[200G]": ["etp59a", "etp59b", "etp59c", "etp59d"] + } + }, + "Ethernet236": { + "index": "8,8,8,8", + "lanes": "236,237,238,239", + "breakout_modes": { + "1x800G": ["etp60"], + "2x800G[400G]": ["etp60a", "etp60b"], + "4x400G[200G]": ["etp60a", "etp60b", "etp60c", "etp60d"] + } + }, + "Ethernet240": { + "index": "8,8,8,8", + "lanes": "240,241,242,243", + "breakout_modes": { + "1x800G": ["etp61"], + "2x800G[400G]": ["etp61a", "etp61b"], + "4x400G[200G]": ["etp61a", "etp61b", "etp61c", "etp61d"] + } + }, + "Ethernet244": { + "index": "8,8,8,8", + "lanes": "244,245,246,247", + "breakout_modes": { + "1x800G": ["etp62"], + "2x800G[400G]": ["etp62a", "etp62b"], + "4x400G[200G]": ["etp62a", "etp62b", "etp62c", "etp62d"] + } + }, + "Ethernet248": { + "index": "8,8,8,8", + "lanes": "248,249,250,251", + "breakout_modes": { + "1x800G": ["etp63"], + "2x800G[400G]": ["etp63a", "etp63b"], + "4x400G[200G]": ["etp63a", "etp63b", "etp63c", "etp63d"] + } + }, + "Ethernet252": { + "index": "8,8,8,8", + "lanes": "252,253,254,255", + "breakout_modes": { + "1x800G": ["etp64"], + "2x800G[400G]": ["etp64a", "etp64b"], + "4x400G[200G]": ["etp64a", "etp64b", "etp64c", "etp64d"] + } + }, + "Ethernet256": { + "index": "9,9,9,9", + "lanes": "256,257,258,259", + "breakout_modes": { + "1x800G": ["etp65"], + "2x800G[400G]": ["etp65a", "etp65b"], + "4x400G[200G]": ["etp65a", "etp65b", "etp65c", "etp65d"] + } + }, + "Ethernet260": { + "index": "9,9,9,9", + "lanes": "260,261,262,263", + "breakout_modes": { + "1x800G": ["etp66"], + "2x800G[400G]": ["etp66a", "etp66b"], + "4x400G[200G]": ["etp66a", "etp66b", "etp66c", "etp66d"] + } + }, + "Ethernet264": { + "index": "9,9,9,9", + "lanes": "264,265,266,267", + "breakout_modes": { + "1x800G": ["etp67"], + "2x800G[400G]": ["etp67a", "etp67b"], + "4x400G[200G]": ["etp67a", "etp67b", "etp67c", "etp67d"] + } + }, + "Ethernet268": { + "index": "9,9,9,9", + "lanes": "268,269,270,271", + "breakout_modes": { + "1x800G": ["etp68"], + "2x800G[400G]": ["etp68a", "etp68b"], + "4x400G[200G]": ["etp68a", "etp68b", "etp68c", "etp68d"] + } + }, + "Ethernet272": { + "index": "9,9,9,9", + "lanes": "272,273,274,275", + "breakout_modes": { + "1x800G": ["etp69"], + "2x800G[400G]": ["etp69a", "etp69b"], + "4x400G[200G]": ["etp69a", "etp69b", "etp69c", "etp69d"] + } + }, + "Ethernet276": { + "index": "9,9,9,9", + "lanes": "276,277,278,279", + "breakout_modes": { + "1x800G": ["etp70"], + "2x800G[400G]": ["etp70a", "etp70b"], + "4x400G[200G]": ["etp70a", "etp70b", "etp70c", "etp70d"] + } + }, + "Ethernet280": { + "index": "9,9,9,9", + "lanes": "280,281,282,283", + "breakout_modes": { + "1x800G": ["etp71"], + "2x800G[400G]": ["etp71a", "etp71b"], + "4x400G[200G]": ["etp71a", "etp71b", "etp71c", "etp71d"] + } + }, + "Ethernet284": { + "index": "9,9,9,9", + "lanes": "284,285,286,287", + "breakout_modes": { + "1x800G": ["etp72"], + "2x800G[400G]": ["etp72a", "etp72b"], + "4x400G[200G]": ["etp72a", "etp72b", "etp72c", "etp72d"] + } + }, + "Ethernet288": { + "index": "10,10,10,10", + "lanes": "288,289,290,291", + "breakout_modes": { + "1x800G": ["etp73"], + "2x800G[400G]": ["etp73a", "etp73b"], + "4x400G[200G]": ["etp73a", "etp73b", "etp73c", "etp73d"] + } + }, + "Ethernet292": { + "index": "10,10,10,10", + "lanes": "292,293,294,295", + "breakout_modes": { + "1x800G": ["etp74"], + "2x800G[400G]": ["etp74a", "etp74b"], + "4x400G[200G]": ["etp74a", "etp74b", "etp74c", "etp74d"] + } + }, + "Ethernet296": { + "index": "10,10,10,10", + "lanes": "296,297,298,299", + "breakout_modes": { + "1x800G": ["etp75"], + "2x800G[400G]": ["etp75a", "etp75b"], + "4x400G[200G]": ["etp75a", "etp75b", "etp75c", "etp75d"] + } + }, + "Ethernet300": { + "index": "10,10,10,10", + "lanes": "300,301,302,303", + "breakout_modes": { + "1x800G": ["etp76"], + "2x800G[400G]": ["etp76a", "etp76b"], + "4x400G[200G]": ["etp76a", "etp76b", "etp76c", "etp76d"] + } + }, + "Ethernet304": { + "index": "10,10,10,10", + "lanes": "304,305,306,307", + "breakout_modes": { + "1x800G": ["etp77"], + "2x800G[400G]": ["etp77a", "etp77b"], + "4x400G[200G]": ["etp77a", "etp77b", "etp77c", "etp77d"] + } + }, + "Ethernet308": { + "index": "10,10,10,10", + "lanes": "308,309,310,311", + "breakout_modes": { + "1x800G": ["etp78"], + "2x800G[400G]": ["etp78a", "etp78b"], + "4x400G[200G]": ["etp78a", "etp78b", "etp78c", "etp78d"] + } + }, + "Ethernet312": { + "index": "10,10,10,10", + "lanes": "312,313,314,315", + "breakout_modes": { + "1x800G": ["etp79"], + "2x800G[400G]": ["etp79a", "etp79b"], + "4x400G[200G]": ["etp79a", "etp79b", "etp79c", "etp79d"] + } + }, + "Ethernet316": { + "index": "10,10,10,10", + "lanes": "316,317,318,319", + "breakout_modes": { + "1x800G": ["etp80"], + "2x800G[400G]": ["etp80a", "etp80b"], + "4x400G[200G]": ["etp80a", "etp80b", "etp80c", "etp80d"] + } + }, + "Ethernet320": { + "index": "11,11,11,11", + "lanes": "320,321,322,323", + "breakout_modes": { + "1x800G": ["etp81"], + "2x800G[400G]": ["etp81a", "etp81b"], + "4x400G[200G]": ["etp81a", "etp81b", "etp81c", "etp81d"] + } + }, + "Ethernet324": { + "index": "11,11,11,11", + "lanes": "324,325,326,327", + "breakout_modes": { + "1x800G": ["etp82"], + "2x800G[400G]": ["etp82a", "etp82b"], + "4x400G[200G]": ["etp82a", "etp82b", "etp82c", "etp82d"] + } + }, + "Ethernet328": { + "index": "11,11,11,11", + "lanes": "328,329,330,331", + "breakout_modes": { + "1x800G": ["etp83"], + "2x800G[400G]": ["etp83a", "etp83b"], + "4x400G[200G]": ["etp83a", "etp83b", "etp83c", "etp83d"] + } + }, + "Ethernet332": { + "index": "11,11,11,11", + "lanes": "332,333,334,335", + "breakout_modes": { + "1x800G": ["etp84"], + "2x800G[400G]": ["etp84a", "etp84b"], + "4x400G[200G]": ["etp84a", "etp84b", "etp84c", "etp84d"] + } + }, + "Ethernet336": { + "index": "11,11,11,11", + "lanes": "336,337,338,339", + "breakout_modes": { + "1x800G": ["etp85"], + "2x800G[400G]": ["etp85a", "etp85b"], + "4x400G[200G]": ["etp85a", "etp85b", "etp85c", "etp85d"] + } + }, + "Ethernet340": { + "index": "11,11,11,11", + "lanes": "340,341,342,343", + "breakout_modes": { + "1x800G": ["etp86"], + "2x800G[400G]": ["etp86a", "etp86b"], + "4x400G[200G]": ["etp86a", "etp86b", "etp86c", "etp86d"] + } + }, + "Ethernet344": { + "index": "11,11,11,11", + "lanes": "344,345,346,347", + "breakout_modes": { + "1x800G": ["etp87"], + "2x800G[400G]": ["etp87a", "etp87b"], + "4x400G[200G]": ["etp87a", "etp87b", "etp87c", "etp87d"] + } + }, + "Ethernet348": { + "index": "11,11,11,11", + "lanes": "348,349,350,351", + "breakout_modes": { + "1x800G": ["etp88"], + "2x800G[400G]": ["etp88a", "etp88b"], + "4x400G[200G]": ["etp88a", "etp88b", "etp88c", "etp88d"] + } + }, + "Ethernet352": { + "index": "12,12,12,12", + "lanes": "352,353,354,355", + "breakout_modes": { + "1x800G": ["etp89"], + "2x800G[400G]": ["etp89a", "etp89b"], + "4x400G[200G]": ["etp89a", "etp89b", "etp89c", "etp89d"] + } + }, + "Ethernet356": { + "index": "12,12,12,12", + "lanes": "356,357,358,359", + "breakout_modes": { + "1x800G": ["etp90"], + "2x800G[400G]": ["etp90a", "etp90b"], + "4x400G[200G]": ["etp90a", "etp90b", "etp90c", "etp90d"] + } + }, + "Ethernet360": { + "index": "12,12,12,12", + "lanes": "360,361,362,363", + "breakout_modes": { + "1x800G": ["etp91"], + "2x800G[400G]": ["etp91a", "etp91b"], + "4x400G[200G]": ["etp91a", "etp91b", "etp91c", "etp91d"] + } + }, + "Ethernet364": { + "index": "12,12,12,12", + "lanes": "364,365,366,367", + "breakout_modes": { + "1x800G": ["etp92"], + "2x800G[400G]": ["etp92a", "etp92b"], + "4x400G[200G]": ["etp92a", "etp92b", "etp92c", "etp92d"] + } + }, + "Ethernet368": { + "index": "12,12,12,12", + "lanes": "368,369,370,371", + "breakout_modes": { + "1x800G": ["etp93"], + "2x800G[400G]": ["etp93a", "etp93b"], + "4x400G[200G]": ["etp93a", "etp93b", "etp93c", "etp93d"] + } + }, + "Ethernet372": { + "index": "12,12,12,12", + "lanes": "372,373,374,375", + "breakout_modes": { + "1x800G": ["etp94"], + "2x800G[400G]": ["etp94a", "etp94b"], + "4x400G[200G]": ["etp94a", "etp94b", "etp94c", "etp94d"] + } + }, + "Ethernet376": { + "index": "12,12,12,12", + "lanes": "376,377,378,379", + "breakout_modes": { + "1x800G": ["etp95"], + "2x800G[400G]": ["etp95a", "etp95b"], + "4x400G[200G]": ["etp95a", "etp95b", "etp95c", "etp95d"] + } + }, + "Ethernet380": { + "index": "12,12,12,12", + "lanes": "380,381,382,383", + "breakout_modes": { + "1x800G": ["etp96"], + "2x800G[400G]": ["etp96a", "etp96b"], + "4x400G[200G]": ["etp96a", "etp96b", "etp96c", "etp96d"] + } + }, + "Ethernet384": { + "index": "13,13,13,13", + "lanes": "384,385,386,387", + "breakout_modes": { + "1x800G": ["etp97"], + "2x800G[400G]": ["etp97a", "etp97b"], + "4x400G[200G]": ["etp97a", "etp97b", "etp97c", "etp97d"] + } + }, + "Ethernet388": { + "index": "13,13,13,13", + "lanes": "388,389,390,391", + "breakout_modes": { + "1x800G": ["etp98"], + "2x800G[400G]": ["etp98a", "etp98b"], + "4x400G[200G]": ["etp98a", "etp98b", "etp98c", "etp98d"] + } + }, + "Ethernet392": { + "index": "13,13,13,13", + "lanes": "392,393,394,395", + "breakout_modes": { + "1x800G": ["etp99"], + "2x800G[400G]": ["etp99a", "etp99b"], + "4x400G[200G]": ["etp99a", "etp99b", "etp99c", "etp99d"] + } + }, + "Ethernet396": { + "index": "13,13,13,13", + "lanes": "396,397,398,399", + "breakout_modes": { + "1x800G": ["etp100"], + "2x800G[400G]": ["etp100a", "etp100b"], + "4x400G[200G]": ["etp100a", "etp100b", "etp100c", "etp100d"] + } + }, + "Ethernet400": { + "index": "13,13,13,13", + "lanes": "400,401,402,403", + "breakout_modes": { + "1x800G": ["etp101"], + "2x800G[400G]": ["etp101a", "etp101b"], + "4x400G[200G]": ["etp101a", "etp101b", "etp101c", "etp101d"] + } + }, + "Ethernet404": { + "index": "13,13,13,13", + "lanes": "404,405,406,407", + "breakout_modes": { + "1x800G": ["etp102"], + "2x800G[400G]": ["etp102a", "etp102b"], + "4x400G[200G]": ["etp102a", "etp102b", "etp102c", "etp102d"] + } + }, + "Ethernet408": { + "index": "13,13,13,13", + "lanes": "408,409,410,411", + "breakout_modes": { + "1x800G": ["etp103"], + "2x800G[400G]": ["etp103a", "etp103b"], + "4x400G[200G]": ["etp103a", "etp103b", "etp103c", "etp103d"] + } + }, + "Ethernet412": { + "index": "13,13,13,13", + "lanes": "412,413,414,415", + "breakout_modes": { + "1x800G": ["etp104"], + "2x800G[400G]": ["etp104a", "etp104b"], + "4x400G[200G]": ["etp104a", "etp104b", "etp104c", "etp104d"] + } + }, + "Ethernet416": { + "index": "14,14,14,14", + "lanes": "416,417,418,419", + "breakout_modes": { + "1x800G": ["etp105"], + "2x800G[400G]": ["etp105a", "etp105b"], + "4x400G[200G]": ["etp105a", "etp105b", "etp105c", "etp105d"] + } + }, + "Ethernet420": { + "index": "14,14,14,14", + "lanes": "420,421,422,423", + "breakout_modes": { + "1x800G": ["etp106"], + "2x800G[400G]": ["etp106a", "etp106b"], + "4x400G[200G]": ["etp106a", "etp106b", "etp106c", "etp106d"] + } + }, + "Ethernet424": { + "index": "14,14,14,14", + "lanes": "424,425,426,427", + "breakout_modes": { + "1x800G": ["etp107"], + "2x800G[400G]": ["etp107a", "etp107b"], + "4x400G[200G]": ["etp107a", "etp107b", "etp107c", "etp107d"] + } + }, + "Ethernet428": { + "index": "14,14,14,14", + "lanes": "428,429,430,431", + "breakout_modes": { + "1x800G": ["etp108"], + "2x800G[400G]": ["etp108a", "etp108b"], + "4x400G[200G]": ["etp108a", "etp108b", "etp108c", "etp108d"] + } + }, + "Ethernet432": { + "index": "14,14,14,14", + "lanes": "432,433,434,435", + "breakout_modes": { + "1x800G": ["etp109"], + "2x800G[400G]": ["etp109a", "etp109b"], + "4x400G[200G]": ["etp109a", "etp109b", "etp109c", "etp109d"] + } + }, + "Ethernet436": { + "index": "14,14,14,14", + "lanes": "436,437,438,439", + "breakout_modes": { + "1x800G": ["etp110"], + "2x800G[400G]": ["etp110a", "etp110b"], + "4x400G[200G]": ["etp110a", "etp110b", "etp110c", "etp110d"] + } + }, + "Ethernet440": { + "index": "14,14,14,14", + "lanes": "440,441,442,443", + "breakout_modes": { + "1x800G": ["etp111"], + "2x800G[400G]": ["etp111a", "etp111b"], + "4x400G[200G]": ["etp111a", "etp111b", "etp111c", "etp111d"] + } + }, + "Ethernet444": { + "index": "14,14,14,14", + "lanes": "444,445,446,447", + "breakout_modes": { + "1x800G": ["etp112"], + "2x800G[400G]": ["etp112a", "etp112b"], + "4x400G[200G]": ["etp112a", "etp112b", "etp112c", "etp112d"] + } + }, + "Ethernet448": { + "index": "15,15,15,15", + "lanes": "448,449,450,451", + "breakout_modes": { + "1x800G": ["etp113"], + "2x800G[400G]": ["etp113a", "etp113b"], + "4x400G[200G]": ["etp113a", "etp113b", "etp113c", "etp113d"] + } + }, + "Ethernet452": { + "index": "15,15,15,15", + "lanes": "452,453,454,455", + "breakout_modes": { + "1x800G": ["etp114"], + "2x800G[400G]": ["etp114a", "etp114b"], + "4x400G[200G]": ["etp114a", "etp114b", "etp114c", "etp114d"] + } + }, + "Ethernet456": { + "index": "15,15,15,15", + "lanes": "456,457,458,459", + "breakout_modes": { + "1x800G": ["etp115"], + "2x800G[400G]": ["etp115a", "etp115b"], + "4x400G[200G]": ["etp115a", "etp115b", "etp115c", "etp115d"] + } + }, + "Ethernet460": { + "index": "15,15,15,15", + "lanes": "460,461,462,463", + "breakout_modes": { + "1x800G": ["etp116"], + "2x800G[400G]": ["etp116a", "etp116b"], + "4x400G[200G]": ["etp116a", "etp116b", "etp116c", "etp116d"] + } + }, + "Ethernet464": { + "index": "15,15,15,15", + "lanes": "464,465,466,467", + "breakout_modes": { + "1x800G": ["etp117"], + "2x800G[400G]": ["etp117a", "etp117b"], + "4x400G[200G]": ["etp117a", "etp117b", "etp117c", "etp117d"] + } + }, + "Ethernet468": { + "index": "15,15,15,15", + "lanes": "468,469,470,471", + "breakout_modes": { + "1x800G": ["etp118"], + "2x800G[400G]": ["etp118a", "etp118b"], + "4x400G[200G]": ["etp118a", "etp118b", "etp118c", "etp118d"] + } + }, + "Ethernet472": { + "index": "15,15,15,15", + "lanes": "472,473,474,475", + "breakout_modes": { + "1x800G": ["etp119"], + "2x800G[400G]": ["etp119a", "etp119b"], + "4x400G[200G]": ["etp119a", "etp119b", "etp119c", "etp119d"] + } + }, + "Ethernet476": { + "index": "15,15,15,15", + "lanes": "476,477,478,479", + "breakout_modes": { + "1x800G": ["etp120"], + "2x800G[400G]": ["etp120a", "etp120b"], + "4x400G[200G]": ["etp120a", "etp120b", "etp120c", "etp120d"] + } + }, + "Ethernet480": { + "index": "16,16,16,16", + "lanes": "480,481,482,483", + "breakout_modes": { + "1x800G": ["etp121"], + "2x800G[400G]": ["etp121a", "etp121b"], + "4x400G[200G]": ["etp121a", "etp121b", "etp121c", "etp121d"] + } + }, + "Ethernet484": { + "index": "16,16,16,16", + "lanes": "484,485,486,487", + "breakout_modes": { + "1x800G": ["etp122"], + "2x800G[400G]": ["etp122a", "etp122b"], + "4x400G[200G]": ["etp122a", "etp122b", "etp122c", "etp122d"] + } + }, + "Ethernet488": { + "index": "16,16,16,16", + "lanes": "488,489,490,491", + "breakout_modes": { + "1x800G": ["etp123"], + "2x800G[400G]": ["etp123a", "etp123b"], + "4x400G[200G]": ["etp123a", "etp123b", "etp123c", "etp123d"] + } + }, + "Ethernet492": { + "index": "16,16,16,16", + "lanes": "492,493,494,495", + "breakout_modes": { + "1x800G": ["etp124"], + "2x800G[400G]": ["etp124a", "etp124b"], + "4x400G[200G]": ["etp124a", "etp124b", "etp124c", "etp124d"] + } + }, + "Ethernet496": { + "index": "16,16,16,16", + "lanes": "496,497,498,499", + "breakout_modes": { + "1x800G": ["etp125"], + "2x800G[400G]": ["etp125a", "etp125b"], + "4x400G[200G]": ["etp125a", "etp125b", "etp125c", "etp125d"] + } + }, + "Ethernet500": { + "index": "16,16,16,16", + "lanes": "500,501,502,503", + "breakout_modes": { + "1x800G": ["etp126"], + "2x800G[400G]": ["etp126a", "etp126b"], + "4x400G[200G]": ["etp126a", "etp126b", "etp126c", "etp126d"] + } + }, + "Ethernet504": { + "index": "16,16,16,16", + "lanes": "504,505,506,507", + "breakout_modes": { + "1x800G": ["etp127"], + "2x800G[400G]": ["etp127a", "etp127b"], + "4x400G[200G]": ["etp127a", "etp127b", "etp127c", "etp127d"] + } + }, + "Ethernet508": { + "index": "16,16,16,16", + "lanes": "508,509,510,511", + "breakout_modes": { + "1x800G": ["etp128"], + "2x800G[400G]": ["etp128a", "etp128b"], + "4x400G[200G]": ["etp128a", "etp128b", "etp128c", "etp128d"] + } + }, + "Ethernet512": { + "index": "17", + "lanes": "512", + "breakout_modes": { + "1x25G[10G]": ["etp129a"] + } + }, + "Ethernet513": { + "index": "17", + "lanes": "513", + "breakout_modes": { + "1x25G[10G]": ["etp129b"] + } + } + } +} diff --git a/device/mellanox/x86_64-nvidia_sn6810_ld_simx-r0/platform_asic b/device/mellanox/x86_64-nvidia_sn6810_ld_simx-r0/platform_asic new file mode 100644 index 00000000000..70c07488555 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn6810_ld_simx-r0/platform_asic @@ -0,0 +1 @@ +mellanox diff --git a/device/mellanox/x86_64-nvidia_sn6810_ld_simx-r0/platform_wait b/device/mellanox/x86_64-nvidia_sn6810_ld_simx-r0/platform_wait new file mode 100755 index 00000000000..ea76db07a6d --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn6810_ld_simx-r0/platform_wait @@ -0,0 +1,32 @@ +#!/usr/bin/python3 + +# +# Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES. +# Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +import sys +from sonic_platform.device_data import DeviceDataManager +from sonic_py_common.logger import Logger + + +logger = Logger(log_identifier='platform_wait') +logger.log_notice('Nvidia: Wait for PMON dependencies to be ready') +if DeviceDataManager.wait_platform_ready(): + logger.log_notice('Nvidia: PMON dependencies are ready') + sys.exit(0) +else: + logger.log_error('Nvidia: PMON dependencies are not ready: timeout') + sys.exit(-1) diff --git a/device/mellanox/x86_64-nvidia_sn6810_ld_simx-r0/pmon_daemon_control.json b/device/mellanox/x86_64-nvidia_sn6810_ld_simx-r0/pmon_daemon_control.json new file mode 100644 index 00000000000..13ba2493fe4 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn6810_ld_simx-r0/pmon_daemon_control.json @@ -0,0 +1,8 @@ +{ + "skip_ledd": true, + "skip_fancontrol": true, + "skip_thermalctld": true, + "skip_psud": true, + "skip_xcvrd_cmis_mgr": true, + "skip_pcied": true +} diff --git a/device/mellanox/x86_64-nvidia_sn6810_ld_simx-r0/syseeprom.hex b/device/mellanox/x86_64-nvidia_sn6810_ld_simx-r0/syseeprom.hex new file mode 100644 index 00000000000..84cdda1a3ef --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn6810_ld_simx-r0/syseeprom.hex @@ -0,0 +1,18 @@ +546c76496e666f000101ff2109534e353831305f4c4422144d534e343730 +302d575332464f0000000000000023184d54323034375830353538360000 +0000000000000000000024069c05919b5000251331312f31392f32303230 +2031343a30323a34302601002a0200fe2b084d656c6c616e6f78fd240000 +811900160101005600004d4c4e5802010c050e0210061207000000000000 +00000000fda4000081190092000301fd00004d5432303437583035353836 +0000000000000000000000004d534e343730302d575332464f0000000000 +00004141000000eab8c74c656f7061726420457468203430300000000000 +000000000000000000000000000000000000000000000000000000000000 +000000000000000000000000000000007a000000125c4d534e3437303000 +0000000000000000000000000000000000000000fd240000811900100003 +05e80000000000000000000000000000000000000000000000000000fd24 +00008119001e0011024700000d000000000000001c34da276c0000fe1c34 +da0300276c00fd240000811900120001067d000000460000080007070707 +0000000000000000000000000000fd1400008119000e0002079900003000 +200000000000281f7838365f36342d6e76696469615f736e353831305f6c +645f73696d782d72302919323032352e30352d352e332e303031372d3936 +30302d646576fe046771dc47 diff --git a/device/mellanox/x86_64-nvidia_sn6810_ld_simx-r0/system_health_monitoring_config.json b/device/mellanox/x86_64-nvidia_sn6810_ld_simx-r0/system_health_monitoring_config.json new file mode 100644 index 00000000000..8fa2a029608 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn6810_ld_simx-r0/system_health_monitoring_config.json @@ -0,0 +1,12 @@ +{ + "services_to_ignore": [], + "devices_to_ignore": ["psu", "fan"], + "user_defined_checkers": [], + "polling_interval": 60, + "include_devices": ["liquid_cooling"], + "led_color": { + "fault": "amber", + "normal": "green", + "booting": "amber_blink" + } +} diff --git a/device/mellanox/x86_64-nvidia_sn6810_ld_simx-r0/thermal_policy.json b/device/mellanox/x86_64-nvidia_sn6810_ld_simx-r0/thermal_policy.json new file mode 100644 index 00000000000..3dce7f41485 --- /dev/null +++ b/device/mellanox/x86_64-nvidia_sn6810_ld_simx-r0/thermal_policy.json @@ -0,0 +1,10 @@ +{ + "thermal_control_algorithm": { + }, + "info_types": [ + + ], + "policies": [ + + ] +} diff --git a/device/micas/x86_64-micas_m2-w6940-128qc-r0/M2-W6940-128QC/buffers.json.j2 b/device/micas/x86_64-micas_m2-w6940-128qc-r0/M2-W6940-128QC/buffers.json.j2 new file mode 100644 index 00000000000..0b1cb2c541b --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128qc-r0/M2-W6940-128QC/buffers.json.j2 @@ -0,0 +1,2 @@ +{%- set default_topo = 't1' %} +{%- include 'buffers_config.j2' %} diff --git a/device/micas/x86_64-micas_m2-w6940-128qc-r0/M2-W6940-128QC/buffers_defaults_ft2.j2 b/device/micas/x86_64-micas_m2-w6940-128qc-r0/M2-W6940-128QC/buffers_defaults_ft2.j2 new file mode 100644 index 00000000000..ef380c86c4a --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128qc-r0/M2-W6940-128QC/buffers_defaults_ft2.j2 @@ -0,0 +1,36 @@ + +{%- set default_cable = '5m' %} + +{%- macro generate_buffer_pool_and_profiles() %} + + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "162539680", + "type": "ingress", + "mode": "dynamic", + "xoff": "33374584" + }, + "egress_lossless_pool": { + "size": "162539680", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"ingress_lossless_pool", + "size":"0", + "static_th":"165867080" + }, + "egress_lossless_profile": { + "pool":"egress_lossless_pool", + "size":"0", + "static_th":"165867080" + }, + "egress_lossy_profile": { + "pool":"egress_lossless_pool", + "size":"1778", + "dynamic_th":"0" + } + }, +{%- endmacro %} diff --git a/device/micas/x86_64-micas_m2-w6940-128qc-r0/M2-W6940-128QC/buffers_defaults_lt2.j2 b/device/micas/x86_64-micas_m2-w6940-128qc-r0/M2-W6940-128QC/buffers_defaults_lt2.j2 new file mode 100644 index 00000000000..ef380c86c4a --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128qc-r0/M2-W6940-128QC/buffers_defaults_lt2.j2 @@ -0,0 +1,36 @@ + +{%- set default_cable = '5m' %} + +{%- macro generate_buffer_pool_and_profiles() %} + + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "162539680", + "type": "ingress", + "mode": "dynamic", + "xoff": "33374584" + }, + "egress_lossless_pool": { + "size": "162539680", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"ingress_lossless_pool", + "size":"0", + "static_th":"165867080" + }, + "egress_lossless_profile": { + "pool":"egress_lossless_pool", + "size":"0", + "static_th":"165867080" + }, + "egress_lossy_profile": { + "pool":"egress_lossless_pool", + "size":"1778", + "dynamic_th":"0" + } + }, +{%- endmacro %} diff --git a/device/micas/x86_64-micas_m2-w6940-128qc-r0/M2-W6940-128QC/buffers_defaults_t0.j2 b/device/micas/x86_64-micas_m2-w6940-128qc-r0/M2-W6940-128QC/buffers_defaults_t0.j2 new file mode 100644 index 00000000000..ef380c86c4a --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128qc-r0/M2-W6940-128QC/buffers_defaults_t0.j2 @@ -0,0 +1,36 @@ + +{%- set default_cable = '5m' %} + +{%- macro generate_buffer_pool_and_profiles() %} + + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "162539680", + "type": "ingress", + "mode": "dynamic", + "xoff": "33374584" + }, + "egress_lossless_pool": { + "size": "162539680", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"ingress_lossless_pool", + "size":"0", + "static_th":"165867080" + }, + "egress_lossless_profile": { + "pool":"egress_lossless_pool", + "size":"0", + "static_th":"165867080" + }, + "egress_lossy_profile": { + "pool":"egress_lossless_pool", + "size":"1778", + "dynamic_th":"0" + } + }, +{%- endmacro %} diff --git a/device/micas/x86_64-micas_m2-w6940-128qc-r0/M2-W6940-128QC/buffers_defaults_t1.j2 b/device/micas/x86_64-micas_m2-w6940-128qc-r0/M2-W6940-128QC/buffers_defaults_t1.j2 new file mode 100644 index 00000000000..847000e1640 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128qc-r0/M2-W6940-128QC/buffers_defaults_t1.j2 @@ -0,0 +1,36 @@ + +{%- set default_cable = '40m' %} + +{%- macro generate_buffer_pool_and_profiles() %} + + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "162539680", + "type": "ingress", + "mode": "dynamic", + "xoff": "33374584" + }, + "egress_lossless_pool": { + "size": "162539680", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"ingress_lossless_pool", + "size":"0", + "static_th":"165867080" + }, + "egress_lossless_profile": { + "pool":"egress_lossless_pool", + "size":"0", + "static_th":"165867080" + }, + "egress_lossy_profile": { + "pool":"egress_lossless_pool", + "size":"1778", + "dynamic_th":"0" + } + }, +{%- endmacro %} diff --git a/device/micas/x86_64-micas_m2-w6940-128qc-r0/M2-W6940-128QC/buffers_defaults_t2.j2 b/device/micas/x86_64-micas_m2-w6940-128qc-r0/M2-W6940-128QC/buffers_defaults_t2.j2 new file mode 100644 index 00000000000..ef380c86c4a --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128qc-r0/M2-W6940-128QC/buffers_defaults_t2.j2 @@ -0,0 +1,36 @@ + +{%- set default_cable = '5m' %} + +{%- macro generate_buffer_pool_and_profiles() %} + + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "162539680", + "type": "ingress", + "mode": "dynamic", + "xoff": "33374584" + }, + "egress_lossless_pool": { + "size": "162539680", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"ingress_lossless_pool", + "size":"0", + "static_th":"165867080" + }, + "egress_lossless_profile": { + "pool":"egress_lossless_pool", + "size":"0", + "static_th":"165867080" + }, + "egress_lossy_profile": { + "pool":"egress_lossless_pool", + "size":"1778", + "dynamic_th":"0" + } + }, +{%- endmacro %} diff --git a/device/micas/x86_64-micas_m2-w6940-128qc-r0/M2-W6940-128QC/pg_profile_lookup.ini b/device/micas/x86_64-micas_m2-w6940-128qc-r0/M2-W6940-128QC/pg_profile_lookup.ini new file mode 100644 index 00000000000..9b240cc8bf6 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128qc-r0/M2-W6940-128QC/pg_profile_lookup.ini @@ -0,0 +1,26 @@ +# PG lossless profiles. +# speed cable size xon xoff threshold xon_offset + 10000 5m 18796 0 91440 -2 3556 + 25000 5m 18796 0 91440 -2 3556 + 40000 5m 18796 0 106934 -2 3556 + 50000 5m 18796 0 106934 -2 3556 + 100000 5m 18796 0 147066 -2 3556 + 200000 5m 18796 0 229362 -2 3556 + 400000 5m 18796 0 393192 -2 3556 + 800000 5m 18796 0 729488 -2 3556 + 10000 40m 18796 0 94742 -2 3556 + 25000 40m 18796 0 94742 -2 3556 + 40000 40m 18796 0 113538 -2 3556 + 50000 40m 18796 0 113538 -2 3556 + 100000 40m 18796 0 160274 -2 3556 + 200000 40m 18796 0 255778 -2 3556 + 400000 40m 18796 0 446024 -2 3556 + 800000 40m 18796 0 835406 -2 3556 + 10000 300m 18796 0 258572 -2 3556 + 25000 300m 18796 0 258572 -2 3556 + 40000 300m 18796 0 258572 -2 3556 + 50000 300m 18796 0 258572 -2 3556 + 100000 300m 18796 0 258572 -2 3556 + 200000 300m 18796 0 452374 -2 3556 + 400000 300m 18796 0 839216 -2 3556 + 800000 300m 18796 0 1621536 -2 3556 diff --git a/device/micas/x86_64-micas_m2-w6940-128qc-r0/M2-W6940-128QC/qos.json.j2 b/device/micas/x86_64-micas_m2-w6940-128qc-r0/M2-W6940-128QC/qos.json.j2 new file mode 100644 index 00000000000..3e548325ea3 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128qc-r0/M2-W6940-128QC/qos.json.j2 @@ -0,0 +1 @@ +{%- include 'qos_config.j2' %} diff --git a/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/M2-W6940-128X1-FR4/buffers.json.j2 b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/M2-W6940-128X1-FR4/buffers.json.j2 new file mode 100644 index 00000000000..0b1cb2c541b --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/M2-W6940-128X1-FR4/buffers.json.j2 @@ -0,0 +1,2 @@ +{%- set default_topo = 't1' %} +{%- include 'buffers_config.j2' %} diff --git a/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/M2-W6940-128X1-FR4/buffers_defaults_ft2.j2 b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/M2-W6940-128X1-FR4/buffers_defaults_ft2.j2 new file mode 100644 index 00000000000..ef380c86c4a --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/M2-W6940-128X1-FR4/buffers_defaults_ft2.j2 @@ -0,0 +1,36 @@ + +{%- set default_cable = '5m' %} + +{%- macro generate_buffer_pool_and_profiles() %} + + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "162539680", + "type": "ingress", + "mode": "dynamic", + "xoff": "33374584" + }, + "egress_lossless_pool": { + "size": "162539680", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"ingress_lossless_pool", + "size":"0", + "static_th":"165867080" + }, + "egress_lossless_profile": { + "pool":"egress_lossless_pool", + "size":"0", + "static_th":"165867080" + }, + "egress_lossy_profile": { + "pool":"egress_lossless_pool", + "size":"1778", + "dynamic_th":"0" + } + }, +{%- endmacro %} diff --git a/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/M2-W6940-128X1-FR4/buffers_defaults_lt2.j2 b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/M2-W6940-128X1-FR4/buffers_defaults_lt2.j2 new file mode 100644 index 00000000000..ef380c86c4a --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/M2-W6940-128X1-FR4/buffers_defaults_lt2.j2 @@ -0,0 +1,36 @@ + +{%- set default_cable = '5m' %} + +{%- macro generate_buffer_pool_and_profiles() %} + + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "162539680", + "type": "ingress", + "mode": "dynamic", + "xoff": "33374584" + }, + "egress_lossless_pool": { + "size": "162539680", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"ingress_lossless_pool", + "size":"0", + "static_th":"165867080" + }, + "egress_lossless_profile": { + "pool":"egress_lossless_pool", + "size":"0", + "static_th":"165867080" + }, + "egress_lossy_profile": { + "pool":"egress_lossless_pool", + "size":"1778", + "dynamic_th":"0" + } + }, +{%- endmacro %} diff --git a/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/M2-W6940-128X1-FR4/buffers_defaults_t0.j2 b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/M2-W6940-128X1-FR4/buffers_defaults_t0.j2 new file mode 100644 index 00000000000..ef380c86c4a --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/M2-W6940-128X1-FR4/buffers_defaults_t0.j2 @@ -0,0 +1,36 @@ + +{%- set default_cable = '5m' %} + +{%- macro generate_buffer_pool_and_profiles() %} + + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "162539680", + "type": "ingress", + "mode": "dynamic", + "xoff": "33374584" + }, + "egress_lossless_pool": { + "size": "162539680", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"ingress_lossless_pool", + "size":"0", + "static_th":"165867080" + }, + "egress_lossless_profile": { + "pool":"egress_lossless_pool", + "size":"0", + "static_th":"165867080" + }, + "egress_lossy_profile": { + "pool":"egress_lossless_pool", + "size":"1778", + "dynamic_th":"0" + } + }, +{%- endmacro %} diff --git a/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/M2-W6940-128X1-FR4/buffers_defaults_t1.j2 b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/M2-W6940-128X1-FR4/buffers_defaults_t1.j2 new file mode 100644 index 00000000000..847000e1640 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/M2-W6940-128X1-FR4/buffers_defaults_t1.j2 @@ -0,0 +1,36 @@ + +{%- set default_cable = '40m' %} + +{%- macro generate_buffer_pool_and_profiles() %} + + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "162539680", + "type": "ingress", + "mode": "dynamic", + "xoff": "33374584" + }, + "egress_lossless_pool": { + "size": "162539680", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"ingress_lossless_pool", + "size":"0", + "static_th":"165867080" + }, + "egress_lossless_profile": { + "pool":"egress_lossless_pool", + "size":"0", + "static_th":"165867080" + }, + "egress_lossy_profile": { + "pool":"egress_lossless_pool", + "size":"1778", + "dynamic_th":"0" + } + }, +{%- endmacro %} diff --git a/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/M2-W6940-128X1-FR4/buffers_defaults_t2.j2 b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/M2-W6940-128X1-FR4/buffers_defaults_t2.j2 new file mode 100644 index 00000000000..ef380c86c4a --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/M2-W6940-128X1-FR4/buffers_defaults_t2.j2 @@ -0,0 +1,36 @@ + +{%- set default_cable = '5m' %} + +{%- macro generate_buffer_pool_and_profiles() %} + + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "162539680", + "type": "ingress", + "mode": "dynamic", + "xoff": "33374584" + }, + "egress_lossless_pool": { + "size": "162539680", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"ingress_lossless_pool", + "size":"0", + "static_th":"165867080" + }, + "egress_lossless_profile": { + "pool":"egress_lossless_pool", + "size":"0", + "static_th":"165867080" + }, + "egress_lossy_profile": { + "pool":"egress_lossless_pool", + "size":"1778", + "dynamic_th":"0" + } + }, +{%- endmacro %} diff --git a/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/M2-W6940-128X1-FR4/default_sku b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/M2-W6940-128X1-FR4/default_sku new file mode 100644 index 00000000000..9e41371997c --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/M2-W6940-128X1-FR4/default_sku @@ -0,0 +1 @@ +M2-W6940-128X1-FR4 l2 \ No newline at end of file diff --git a/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/M2-W6940-128X1-FR4/hwsku.json b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/M2-W6940-128X1-FR4/hwsku.json new file mode 100644 index 00000000000..76c4f2f08de --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/M2-W6940-128X1-FR4/hwsku.json @@ -0,0 +1,388 @@ +{ + "interfaces": { + "Ethernet0": { + "default_brkout_mode": "1x400G" + }, + "Ethernet1": { + "default_brkout_mode": "1x400G" + }, + "Ethernet2": { + "default_brkout_mode": "1x400G" + }, + "Ethernet3": { + "default_brkout_mode": "1x400G" + }, + "Ethernet4": { + "default_brkout_mode": "1x400G" + }, + "Ethernet5": { + "default_brkout_mode": "1x400G" + }, + "Ethernet6": { + "default_brkout_mode": "1x400G" + }, + "Ethernet7": { + "default_brkout_mode": "1x400G" + }, + "Ethernet8": { + "default_brkout_mode": "1x400G" + }, + "Ethernet9": { + "default_brkout_mode": "1x400G" + }, + "Ethernet10": { + "default_brkout_mode": "1x400G" + }, + "Ethernet11": { + "default_brkout_mode": "1x400G" + }, + "Ethernet12": { + "default_brkout_mode": "1x400G" + }, + "Ethernet13": { + "default_brkout_mode": "1x400G" + }, + "Ethernet14": { + "default_brkout_mode": "1x400G" + }, + "Ethernet15": { + "default_brkout_mode": "1x400G" + }, + "Ethernet16": { + "default_brkout_mode": "1x400G" + }, + "Ethernet17": { + "default_brkout_mode": "1x400G" + }, + "Ethernet18": { + "default_brkout_mode": "1x400G" + }, + "Ethernet19": { + "default_brkout_mode": "1x400G" + }, + "Ethernet20": { + "default_brkout_mode": "1x400G" + }, + "Ethernet21": { + "default_brkout_mode": "1x400G" + }, + "Ethernet22": { + "default_brkout_mode": "1x400G" + }, + "Ethernet23": { + "default_brkout_mode": "1x400G" + }, + "Ethernet24": { + "default_brkout_mode": "1x400G" + }, + "Ethernet25": { + "default_brkout_mode": "1x400G" + }, + "Ethernet26": { + "default_brkout_mode": "1x400G" + }, + "Ethernet27": { + "default_brkout_mode": "1x400G" + }, + "Ethernet28": { + "default_brkout_mode": "1x400G" + }, + "Ethernet29": { + "default_brkout_mode": "1x400G" + }, + "Ethernet30": { + "default_brkout_mode": "1x400G" + }, + "Ethernet31": { + "default_brkout_mode": "1x400G" + }, + "Ethernet32": { + "default_brkout_mode": "1x400G" + }, + "Ethernet33": { + "default_brkout_mode": "1x400G" + }, + "Ethernet34": { + "default_brkout_mode": "1x400G" + }, + "Ethernet35": { + "default_brkout_mode": "1x400G" + }, + "Ethernet36": { + "default_brkout_mode": "1x400G" + }, + "Ethernet37": { + "default_brkout_mode": "1x400G" + }, + "Ethernet38": { + "default_brkout_mode": "1x400G" + }, + "Ethernet39": { + "default_brkout_mode": "1x400G" + }, + "Ethernet40": { + "default_brkout_mode": "1x400G" + }, + "Ethernet41": { + "default_brkout_mode": "1x400G" + }, + "Ethernet42": { + "default_brkout_mode": "1x400G" + }, + "Ethernet43": { + "default_brkout_mode": "1x400G" + }, + "Ethernet44": { + "default_brkout_mode": "1x400G" + }, + "Ethernet45": { + "default_brkout_mode": "1x400G" + }, + "Ethernet46": { + "default_brkout_mode": "1x400G" + }, + "Ethernet47": { + "default_brkout_mode": "1x400G" + }, + "Ethernet48": { + "default_brkout_mode": "1x400G" + }, + "Ethernet49": { + "default_brkout_mode": "1x400G" + }, + "Ethernet50": { + "default_brkout_mode": "1x400G" + }, + "Ethernet51": { + "default_brkout_mode": "1x400G" + }, + "Ethernet52": { + "default_brkout_mode": "1x400G" + }, + "Ethernet53": { + "default_brkout_mode": "1x400G" + }, + "Ethernet54": { + "default_brkout_mode": "1x400G" + }, + "Ethernet55": { + "default_brkout_mode": "1x400G" + }, + "Ethernet56": { + "default_brkout_mode": "1x400G" + }, + "Ethernet57": { + "default_brkout_mode": "1x400G" + }, + "Ethernet58": { + "default_brkout_mode": "1x400G" + }, + "Ethernet59": { + "default_brkout_mode": "1x400G" + }, + "Ethernet60": { + "default_brkout_mode": "1x400G" + }, + "Ethernet61": { + "default_brkout_mode": "1x400G" + }, + "Ethernet62": { + "default_brkout_mode": "1x400G" + }, + "Ethernet63": { + "default_brkout_mode": "1x400G" + }, + "Ethernet64": { + "default_brkout_mode": "1x400G" + }, + "Ethernet65": { + "default_brkout_mode": "1x400G" + }, + "Ethernet66": { + "default_brkout_mode": "1x400G" + }, + "Ethernet67": { + "default_brkout_mode": "1x400G" + }, + "Ethernet68": { + "default_brkout_mode": "1x400G" + }, + "Ethernet69": { + "default_brkout_mode": "1x400G" + }, + "Ethernet70": { + "default_brkout_mode": "1x400G" + }, + "Ethernet71": { + "default_brkout_mode": "1x400G" + }, + "Ethernet72": { + "default_brkout_mode": "1x400G" + }, + "Ethernet73": { + "default_brkout_mode": "1x400G" + }, + "Ethernet74": { + "default_brkout_mode": "1x400G" + }, + "Ethernet75": { + "default_brkout_mode": "1x400G" + }, + "Ethernet76": { + "default_brkout_mode": "1x400G" + }, + "Ethernet77": { + "default_brkout_mode": "1x400G" + }, + "Ethernet78": { + "default_brkout_mode": "1x400G" + }, + "Ethernet79": { + "default_brkout_mode": "1x400G" + }, + "Ethernet80": { + "default_brkout_mode": "1x400G" + }, + "Ethernet81": { + "default_brkout_mode": "1x400G" + }, + "Ethernet82": { + "default_brkout_mode": "1x400G" + }, + "Ethernet83": { + "default_brkout_mode": "1x400G" + }, + "Ethernet84": { + "default_brkout_mode": "1x400G" + }, + "Ethernet85": { + "default_brkout_mode": "1x400G" + }, + "Ethernet86": { + "default_brkout_mode": "1x400G" + }, + "Ethernet87": { + "default_brkout_mode": "1x400G" + }, + "Ethernet88": { + "default_brkout_mode": "1x400G" + }, + "Ethernet89": { + "default_brkout_mode": "1x400G" + }, + "Ethernet90": { + "default_brkout_mode": "1x400G" + }, + "Ethernet91": { + "default_brkout_mode": "1x400G" + }, + "Ethernet92": { + "default_brkout_mode": "1x400G" + }, + "Ethernet93": { + "default_brkout_mode": "1x400G" + }, + "Ethernet94": { + "default_brkout_mode": "1x400G" + }, + "Ethernet95": { + "default_brkout_mode": "1x400G" + }, + "Ethernet96": { + "default_brkout_mode": "1x400G" + }, + "Ethernet97": { + "default_brkout_mode": "1x400G" + }, + "Ethernet98": { + "default_brkout_mode": "1x400G" + }, + "Ethernet99": { + "default_brkout_mode": "1x400G" + }, + "Ethernet100": { + "default_brkout_mode": "1x400G" + }, + "Ethernet101": { + "default_brkout_mode": "1x400G" + }, + "Ethernet102": { + "default_brkout_mode": "1x400G" + }, + "Ethernet103": { + "default_brkout_mode": "1x400G" + }, + "Ethernet104": { + "default_brkout_mode": "1x400G" + }, + "Ethernet105": { + "default_brkout_mode": "1x400G" + }, + "Ethernet106": { + "default_brkout_mode": "1x400G" + }, + "Ethernet107": { + "default_brkout_mode": "1x400G" + }, + "Ethernet108": { + "default_brkout_mode": "1x400G" + }, + "Ethernet109": { + "default_brkout_mode": "1x400G" + }, + "Ethernet110": { + "default_brkout_mode": "1x400G" + }, + "Ethernet111": { + "default_brkout_mode": "1x400G" + }, + "Ethernet112": { + "default_brkout_mode": "1x400G" + }, + "Ethernet113": { + "default_brkout_mode": "1x400G" + }, + "Ethernet114": { + "default_brkout_mode": "1x400G" + }, + "Ethernet115": { + "default_brkout_mode": "1x400G" + }, + "Ethernet116": { + "default_brkout_mode": "1x400G" + }, + "Ethernet117": { + "default_brkout_mode": "1x400G" + }, + "Ethernet118": { + "default_brkout_mode": "1x400G" + }, + "Ethernet119": { + "default_brkout_mode": "1x400G" + }, + "Ethernet120": { + "default_brkout_mode": "1x400G" + }, + "Ethernet121": { + "default_brkout_mode": "1x400G" + }, + "Ethernet122": { + "default_brkout_mode": "1x400G" + }, + "Ethernet123": { + "default_brkout_mode": "1x400G" + }, + "Ethernet124": { + "default_brkout_mode": "1x400G" + }, + "Ethernet125": { + "default_brkout_mode": "1x400G" + }, + "Ethernet126": { + "default_brkout_mode": "1x400G" + }, + "Ethernet127": { + "default_brkout_mode": "1x400G" + } + } +} diff --git a/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/M2-W6940-128X1-FR4/pg_profile_lookup.ini b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/M2-W6940-128X1-FR4/pg_profile_lookup.ini new file mode 100644 index 00000000000..9b240cc8bf6 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/M2-W6940-128X1-FR4/pg_profile_lookup.ini @@ -0,0 +1,26 @@ +# PG lossless profiles. +# speed cable size xon xoff threshold xon_offset + 10000 5m 18796 0 91440 -2 3556 + 25000 5m 18796 0 91440 -2 3556 + 40000 5m 18796 0 106934 -2 3556 + 50000 5m 18796 0 106934 -2 3556 + 100000 5m 18796 0 147066 -2 3556 + 200000 5m 18796 0 229362 -2 3556 + 400000 5m 18796 0 393192 -2 3556 + 800000 5m 18796 0 729488 -2 3556 + 10000 40m 18796 0 94742 -2 3556 + 25000 40m 18796 0 94742 -2 3556 + 40000 40m 18796 0 113538 -2 3556 + 50000 40m 18796 0 113538 -2 3556 + 100000 40m 18796 0 160274 -2 3556 + 200000 40m 18796 0 255778 -2 3556 + 400000 40m 18796 0 446024 -2 3556 + 800000 40m 18796 0 835406 -2 3556 + 10000 300m 18796 0 258572 -2 3556 + 25000 300m 18796 0 258572 -2 3556 + 40000 300m 18796 0 258572 -2 3556 + 50000 300m 18796 0 258572 -2 3556 + 100000 300m 18796 0 258572 -2 3556 + 200000 300m 18796 0 452374 -2 3556 + 400000 300m 18796 0 839216 -2 3556 + 800000 300m 18796 0 1621536 -2 3556 diff --git a/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/M2-W6940-128X1-FR4/port_config.ini b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/M2-W6940-128X1-FR4/port_config.ini new file mode 100644 index 00000000000..f24ea258a53 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/M2-W6940-128X1-FR4/port_config.ini @@ -0,0 +1,129 @@ +# name lanes alias index speed admin_status fec +Ethernet0 1,2,3,4 etp1 1 400000 down rs +Ethernet1 5,6,7,8 etp2 2 400000 down rs +Ethernet2 9,10,11,12 etp3 3 400000 down rs +Ethernet3 13,14,15,16 etp4 4 400000 down rs +Ethernet4 17,18,19,20 etp5 5 400000 down rs +Ethernet5 21,22,23,24 etp6 6 400000 down rs +Ethernet6 25,26,27,28 etp7 7 400000 down rs +Ethernet7 29,30,31,32 etp8 8 400000 down rs +Ethernet8 33,34,35,36 etp9 9 400000 down rs +Ethernet9 37,38,39,40 etp10 10 400000 down rs +Ethernet10 41,42,43,44 etp11 11 400000 down rs +Ethernet11 45,46,47,48 etp12 12 400000 down rs +Ethernet12 49,50,51,52 etp13 13 400000 down rs +Ethernet13 53,54,55,56 etp14 14 400000 down rs +Ethernet14 57,58,59,60 etp15 15 400000 down rs +Ethernet15 61,62,63,64 etp16 16 400000 down rs +Ethernet16 65,66,67,68 etp17 17 400000 down rs +Ethernet17 69,70,71,72 etp18 18 400000 down rs +Ethernet18 73,74,75,76 etp19 19 400000 down rs +Ethernet19 77,78,79,80 etp20 20 400000 down rs +Ethernet20 81,82,83,84 etp21 21 400000 down rs +Ethernet21 85,86,87,88 etp22 22 400000 down rs +Ethernet22 89,90,91,92 etp23 23 400000 down rs +Ethernet23 93,94,95,96 etp24 24 400000 down rs +Ethernet24 97,98,99,100 etp25 25 400000 down rs +Ethernet25 101,102,103,104 etp26 26 400000 down rs +Ethernet26 105,106,107,108 etp27 27 400000 down rs +Ethernet27 109,110,111,112 etp28 28 400000 down rs +Ethernet28 113,114,115,116 etp29 29 400000 down rs +Ethernet29 117,118,119,120 etp30 30 400000 down rs +Ethernet30 121,122,123,124 etp31 31 400000 down rs +Ethernet31 125,126,127,128 etp32 32 400000 down rs +Ethernet32 129,130,131,132 etp33 33 400000 down rs +Ethernet33 133,134,135,136 etp34 34 400000 down rs +Ethernet34 137,138,139,140 etp35 35 400000 down rs +Ethernet35 141,142,143,144 etp36 36 400000 down rs +Ethernet36 145,146,147,148 etp37 37 400000 down rs +Ethernet37 149,150,151,152 etp38 38 400000 down rs +Ethernet38 153,154,155,156 etp39 39 400000 down rs +Ethernet39 157,158,159,160 etp40 40 400000 down rs +Ethernet40 161,162,163,164 etp41 41 400000 down rs +Ethernet41 165,166,167,168 etp42 42 400000 down rs +Ethernet42 169,170,171,172 etp43 43 400000 down rs +Ethernet43 173,174,175,176 etp44 44 400000 down rs +Ethernet44 177,178,179,180 etp45 45 400000 down rs +Ethernet45 181,182,183,184 etp46 46 400000 down rs +Ethernet46 185,186,187,188 etp47 47 400000 down rs +Ethernet47 189,190,191,192 etp48 48 400000 down rs +Ethernet48 193,194,195,196 etp49 49 400000 down rs +Ethernet49 197,198,199,200 etp50 50 400000 down rs +Ethernet50 201,202,203,204 etp51 51 400000 down rs +Ethernet51 205,206,207,208 etp52 52 400000 down rs +Ethernet52 209,210,211,212 etp53 53 400000 down rs +Ethernet53 213,214,215,216 etp54 54 400000 down rs +Ethernet54 217,218,219,220 etp55 55 400000 down rs +Ethernet55 221,222,223,224 etp56 56 400000 down rs +Ethernet56 225,226,227,228 etp57 57 400000 down rs +Ethernet57 229,230,231,232 etp58 58 400000 down rs +Ethernet58 233,234,235,236 etp59 59 400000 down rs +Ethernet59 237,238,239,240 etp60 60 400000 down rs +Ethernet60 241,242,243,244 etp61 61 400000 down rs +Ethernet61 245,246,247,248 etp62 62 400000 down rs +Ethernet62 249,250,251,252 etp63 63 400000 down rs +Ethernet63 253,254,255,256 etp64 64 400000 down rs +Ethernet64 257,258,259,260 etp65 65 400000 down rs +Ethernet65 261,262,263,264 etp66 66 400000 down rs +Ethernet66 265,266,267,268 etp67 67 400000 down rs +Ethernet67 269,270,271,272 etp68 68 400000 down rs +Ethernet68 273,274,275,276 etp69 69 400000 down rs +Ethernet69 277,278,279,280 etp70 70 400000 down rs +Ethernet70 281,282,283,284 etp71 71 400000 down rs +Ethernet71 285,286,287,288 etp72 72 400000 down rs +Ethernet72 289,290,291,292 etp73 73 400000 down rs +Ethernet73 293,294,295,296 etp74 74 400000 down rs +Ethernet74 297,298,299,300 etp75 75 400000 down rs +Ethernet75 301,302,303,304 etp76 76 400000 down rs +Ethernet76 305,306,307,308 etp77 77 400000 down rs +Ethernet77 309,310,311,312 etp78 78 400000 down rs +Ethernet78 313,314,315,316 etp79 79 400000 down rs +Ethernet79 317,318,319,320 etp80 80 400000 down rs +Ethernet80 321,322,323,324 etp81 81 400000 down rs +Ethernet81 325,326,327,328 etp82 82 400000 down rs +Ethernet82 329,330,331,332 etp83 83 400000 down rs +Ethernet83 333,334,335,336 etp84 84 400000 down rs +Ethernet84 337,338,339,340 etp85 85 400000 down rs +Ethernet85 341,342,343,344 etp86 86 400000 down rs +Ethernet86 345,346,347,348 etp87 87 400000 down rs +Ethernet87 349,350,351,352 etp88 88 400000 down rs +Ethernet88 353,354,355,356 etp89 89 400000 down rs +Ethernet89 357,358,359,360 etp90 90 400000 down rs +Ethernet90 361,362,363,364 etp91 91 400000 down rs +Ethernet91 365,366,367,368 etp92 92 400000 down rs +Ethernet92 369,370,371,372 etp93 93 400000 down rs +Ethernet93 373,374,375,376 etp94 94 400000 down rs +Ethernet94 377,378,379,380 etp95 95 400000 down rs +Ethernet95 381,382,383,384 etp96 96 400000 down rs +Ethernet96 385,386,387,388 etp97 97 400000 down rs +Ethernet97 389,390,391,392 etp98 98 400000 down rs +Ethernet98 393,394,395,396 etp99 99 400000 down rs +Ethernet99 397,398,399,400 etp100 100 400000 down rs +Ethernet100 401,402,403,404 etp101 101 400000 down rs +Ethernet101 405,406,407,408 etp102 102 400000 down rs +Ethernet102 409,410,411,412 etp103 103 400000 down rs +Ethernet103 413,414,415,416 etp104 104 400000 down rs +Ethernet104 417,418,419,420 etp105 105 400000 down rs +Ethernet105 421,422,423,424 etp106 106 400000 down rs +Ethernet106 425,426,427,428 etp107 107 400000 down rs +Ethernet107 429,430,431,432 etp108 108 400000 down rs +Ethernet108 433,434,435,436 etp109 109 400000 down rs +Ethernet109 437,438,439,440 etp110 110 400000 down rs +Ethernet110 441,442,443,444 etp111 111 400000 down rs +Ethernet111 445,446,447,448 etp112 112 400000 down rs +Ethernet112 449,450,451,452 etp113 113 400000 down rs +Ethernet113 453,454,455,456 etp114 114 400000 down rs +Ethernet114 457,458,459,460 etp115 115 400000 down rs +Ethernet115 461,462,463,464 etp116 116 400000 down rs +Ethernet116 465,466,467,468 etp117 117 400000 down rs +Ethernet117 469,470,471,472 etp118 118 400000 down rs +Ethernet118 473,474,475,476 etp119 119 400000 down rs +Ethernet119 477,478,479,480 etp120 120 400000 down rs +Ethernet120 481,482,483,484 etp121 121 400000 down rs +Ethernet121 485,486,487,488 etp122 122 400000 down rs +Ethernet122 489,490,491,492 etp123 123 400000 down rs +Ethernet123 493,494,495,496 etp124 124 400000 down rs +Ethernet124 497,498,499,500 etp125 125 400000 down rs +Ethernet125 501,502,503,504 etp126 126 400000 down rs +Ethernet126 505,506,507,508 etp127 127 400000 down rs +Ethernet127 509,510,511,512 etp128 128 400000 down rs diff --git a/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/M2-W6940-128X1-FR4/qos.json.j2 b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/M2-W6940-128X1-FR4/qos.json.j2 new file mode 100644 index 00000000000..3e548325ea3 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/M2-W6940-128X1-FR4/qos.json.j2 @@ -0,0 +1 @@ +{%- include 'qos_config.j2' %} diff --git a/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/M2-W6940-128X1-FR4/sai.profile b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/M2-W6940-128X1-FR4/sai.profile new file mode 100644 index 00000000000..37bedaa27d3 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/M2-W6940-128X1-FR4/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th5-m2-w6940-128x1-fr4-128x400g.yml \ No newline at end of file diff --git a/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/M2-W6940-128X1-FR4/th5-m2-w6940-128x1-fr4-128x400g.yml b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/M2-W6940-128X1-FR4/th5-m2-w6940-128x1-fr4-128x400g.yml new file mode 100644 index 00000000000..ec8a4d20a1b --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/M2-W6940-128X1-FR4/th5-m2-w6940-128x1-fr4-128x400g.yml @@ -0,0 +1,1381 @@ +--- +device: + 0: + DEVICE_CONFIG: + AUTOLOAD_BOARD_SETTINGS: 0 +... +--- +device: + 0: + # Per pipe flex counter configuration + CTR_EFLEX_CONFIG: + CTR_ING_EFLEX_OPERMODE_PIPEUNIQUE: 1 + CTR_ING_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1 + CTR_EGR_EFLEX_OPERMODE_PIPEUNIQUE: 1 + CTR_EGR_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1 + FP_CONFIG: + FP_ING_OPERMODE: GLOBAL_PIPE_AWARE +... +--- +bcm_device: + 0: + global: + bcm_tunnel_term_compatible_mode: 1 + vlan_flooding_l2mc_num_reserved: 2048 + l3_alpm_template: 1 + l3_alpm2_bnk_threshold: 100 + uft_mode: 1 + l3_enable: 1 + l3_intf_vlan_split_egress: 1 + l2_hitbit_enable: 0 + pktio_mode: 1 + sai_pfc_defaults_disable: 1 + sai_optimized_mmu: 1 + global_flexctr_ing_action_num_reserved: 20 + global_flexctr_ing_pool_num_reserved: 8 + global_flexctr_ing_op_profile_num_reserved: 20 + global_flexctr_ing_group_num_reserved: 2 + global_flexctr_egr_action_num_reserved: 8 + global_flexctr_egr_pool_num_reserved: 5 + global_flexctr_egr_op_profile_num_reserved: 10 + global_flexctr_egr_group_num_reserved: 1 + flowtracker_flexctr_alloc_enable: 1 +... + +--- +device: + 0: + PC_PM_CORE: + ? + PC_PM_ID: 1 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x23106754 + TX_LANE_MAP: 0x32017645 + RX_POLARITY_FLIP: 0X22 + TX_POLARITY_FLIP: 0XEE + ? + PC_PM_ID: 2 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x30217465 + TX_LANE_MAP: 0x03124756 + RX_POLARITY_FLIP: 0X11 + TX_POLARITY_FLIP: 0X55 + ? + PC_PM_ID: 3 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x23106754 + TX_LANE_MAP: 0x32017645 + RX_POLARITY_FLIP: 0X22 + TX_POLARITY_FLIP: 0XEE + ? + PC_PM_ID: 4 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x30217465 + TX_LANE_MAP: 0x03124756 + RX_POLARITY_FLIP: 0X11 + TX_POLARITY_FLIP: 0X55 + ? + PC_PM_ID: 5 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x32017645 + TX_LANE_MAP: 0x23106754 + RX_POLARITY_FLIP: 0X41 + TX_POLARITY_FLIP: 0X7D + ? + PC_PM_ID: 6 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x01324576 + TX_LANE_MAP: 0x10236754 + RX_POLARITY_FLIP: 0X3D + TX_POLARITY_FLIP: 0XC3 + ? + PC_PM_ID: 7 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x01324576 + TX_LANE_MAP: 0x10236754 + RX_POLARITY_FLIP: 0X3D + TX_POLARITY_FLIP: 0X83 + ? + PC_PM_ID: 8 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x01324576 + TX_LANE_MAP: 0x10236754 + RX_POLARITY_FLIP: 0X3D + TX_POLARITY_FLIP: 0X27 + ? + PC_PM_ID: 9 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x10235467 + TX_LANE_MAP: 0x01327645 + RX_POLARITY_FLIP: 0X3E + TX_POLARITY_FLIP: 0X43 + ? + PC_PM_ID: 10 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x10235467 + TX_LANE_MAP: 0x01327645 + RX_POLARITY_FLIP: 0X3E + TX_POLARITY_FLIP: 0X43 + ? + PC_PM_ID: 11 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x10235467 + TX_LANE_MAP: 0x01327645 + RX_POLARITY_FLIP: 0X3E + TX_POLARITY_FLIP: 0X43 + ? + PC_PM_ID: 12 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x10235467 + TX_LANE_MAP: 0x01327645 + RX_POLARITY_FLIP: 0X3E + TX_POLARITY_FLIP: 0X43 + ? + PC_PM_ID: 13 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x01324576 + TX_LANE_MAP: 0x10236754 + RX_POLARITY_FLIP: 0X3D + TX_POLARITY_FLIP: 0X83 + ? + PC_PM_ID: 14 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x01324576 + TX_LANE_MAP: 0x10236754 + RX_POLARITY_FLIP: 0X3D + TX_POLARITY_FLIP: 0X83 + ? + PC_PM_ID: 15 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x01324576 + TX_LANE_MAP: 0x10236754 + RX_POLARITY_FLIP: 0X3D + TX_POLARITY_FLIP: 0X83 + ? + PC_PM_ID: 16 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x01324576 + TX_LANE_MAP: 0x10236754 + RX_POLARITY_FLIP: 0X3D + TX_POLARITY_FLIP: 0X83 + ? + PC_PM_ID: 17 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x67542310 + TX_LANE_MAP: 0x45763201 + RX_POLARITY_FLIP: 0XBC + TX_POLARITY_FLIP: 0XC1 + ? + PC_PM_ID: 18 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x67542310 + TX_LANE_MAP: 0x45763201 + RX_POLARITY_FLIP: 0XBC + TX_POLARITY_FLIP: 0XC1 + ? + PC_PM_ID: 19 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x67542310 + TX_LANE_MAP: 0x45763201 + RX_POLARITY_FLIP: 0XBC + TX_POLARITY_FLIP: 0XC1 + ? + PC_PM_ID: 20 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x67542310 + TX_LANE_MAP: 0x45763201 + RX_POLARITY_FLIP: 0XBC + TX_POLARITY_FLIP: 0XC1 + ? + PC_PM_ID: 21 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x76453201 + TX_LANE_MAP: 0x54672310 + RX_POLARITY_FLIP: 0X7C + TX_POLARITY_FLIP: 0XC2 + ? + PC_PM_ID: 22 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x76453201 + TX_LANE_MAP: 0x54672310 + RX_POLARITY_FLIP: 0X7C + TX_POLARITY_FLIP: 0XC2 + ? + PC_PM_ID: 23 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x76453201 + TX_LANE_MAP: 0x54672310 + RX_POLARITY_FLIP: 0X7C + TX_POLARITY_FLIP: 0XC2 + ? + PC_PM_ID: 24 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x76453201 + TX_LANE_MAP: 0x54672310 + RX_POLARITY_FLIP: 0X7C + TX_POLARITY_FLIP: 0XC2 + ? + PC_PM_ID: 25 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x67542310 + TX_LANE_MAP: 0x45763201 + RX_POLARITY_FLIP: 0XBC + TX_POLARITY_FLIP: 0XE4 + ? + PC_PM_ID: 26 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x67542310 + TX_LANE_MAP: 0x45763201 + RX_POLARITY_FLIP: 0XBC + TX_POLARITY_FLIP: 0XC1 + ? + PC_PM_ID: 27 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x67542310 + TX_LANE_MAP: 0x45763201 + RX_POLARITY_FLIP: 0XBC + TX_POLARITY_FLIP: 0XC3 + ? + PC_PM_ID: 28 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x54671023 + TX_LANE_MAP: 0x45760132 + RX_POLARITY_FLIP: 0X82 + TX_POLARITY_FLIP: 0XBE + ? + PC_PM_ID: 29 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x56471203 + TX_LANE_MAP: 0x65742130 + RX_POLARITY_FLIP: 0X88 + TX_POLARITY_FLIP: 0XAA + ? + PC_PM_ID: 30 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x45760132 + TX_LANE_MAP: 0x54671023 + RX_POLARITY_FLIP: 0X44 + TX_POLARITY_FLIP: 0X77 + ? + PC_PM_ID: 31 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x56471203 + TX_LANE_MAP: 0x65742130 + RX_POLARITY_FLIP: 0X88 + TX_POLARITY_FLIP: 0XAA + ? + PC_PM_ID: 32 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x45760132 + TX_LANE_MAP: 0x54671023 + RX_POLARITY_FLIP: 0X44 + TX_POLARITY_FLIP: 0X77 + ? + PC_PM_ID: 33 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x23106754 + TX_LANE_MAP: 0x32017645 + RX_POLARITY_FLIP: 0X22 + TX_POLARITY_FLIP: 0XEE + ? + PC_PM_ID: 34 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x30217465 + TX_LANE_MAP: 0x03124756 + RX_POLARITY_FLIP: 0X11 + TX_POLARITY_FLIP: 0X55 + ? + PC_PM_ID: 35 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x23106754 + TX_LANE_MAP: 0x32017645 + RX_POLARITY_FLIP: 0X22 + TX_POLARITY_FLIP: 0XEE + ? + PC_PM_ID: 36 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x30217465 + TX_LANE_MAP: 0x03124756 + RX_POLARITY_FLIP: 0X11 + TX_POLARITY_FLIP: 0X55 + ? + PC_PM_ID: 37 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x32017645 + TX_LANE_MAP: 0x23106754 + RX_POLARITY_FLIP: 0X41 + TX_POLARITY_FLIP: 0X7D + ? + PC_PM_ID: 38 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x01324576 + TX_LANE_MAP: 0x10236754 + RX_POLARITY_FLIP: 0X3D + TX_POLARITY_FLIP: 0XC3 + ? + PC_PM_ID: 39 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x01324576 + TX_LANE_MAP: 0x10236754 + RX_POLARITY_FLIP: 0X3D + TX_POLARITY_FLIP: 0X83 + ? + PC_PM_ID: 40 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x01324576 + TX_LANE_MAP: 0x10236754 + RX_POLARITY_FLIP: 0X3D + TX_POLARITY_FLIP: 0X27 + ? + PC_PM_ID: 41 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x10235467 + TX_LANE_MAP: 0x01327645 + RX_POLARITY_FLIP: 0X3E + TX_POLARITY_FLIP: 0X43 + ? + PC_PM_ID: 42 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x10235467 + TX_LANE_MAP: 0x01327645 + RX_POLARITY_FLIP: 0X3E + TX_POLARITY_FLIP: 0X43 + ? + PC_PM_ID: 43 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x10235467 + TX_LANE_MAP: 0x01327645 + RX_POLARITY_FLIP: 0X3E + TX_POLARITY_FLIP: 0X43 + ? + PC_PM_ID: 44 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x10235467 + TX_LANE_MAP: 0x01327645 + RX_POLARITY_FLIP: 0X3E + TX_POLARITY_FLIP: 0X43 + ? + PC_PM_ID: 45 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x01324576 + TX_LANE_MAP: 0x10236754 + RX_POLARITY_FLIP: 0X3D + TX_POLARITY_FLIP: 0X83 + ? + PC_PM_ID: 46 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x01324576 + TX_LANE_MAP: 0x10236754 + RX_POLARITY_FLIP: 0X3D + TX_POLARITY_FLIP: 0X83 + ? + PC_PM_ID: 47 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x01324576 + TX_LANE_MAP: 0x10236754 + RX_POLARITY_FLIP: 0X3D + TX_POLARITY_FLIP: 0X83 + ? + PC_PM_ID: 48 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x01324576 + TX_LANE_MAP: 0x10236754 + RX_POLARITY_FLIP: 0X3D + TX_POLARITY_FLIP: 0X83 + ? + PC_PM_ID: 49 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x67542310 + TX_LANE_MAP: 0x45763201 + RX_POLARITY_FLIP: 0XBC + TX_POLARITY_FLIP: 0XC1 + ? + PC_PM_ID: 50 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x67542310 + TX_LANE_MAP: 0x45763201 + RX_POLARITY_FLIP: 0XBC + TX_POLARITY_FLIP: 0XC1 + ? + PC_PM_ID: 51 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x67542310 + TX_LANE_MAP: 0x45763201 + RX_POLARITY_FLIP: 0XBC + TX_POLARITY_FLIP: 0XC1 + ? + PC_PM_ID: 52 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x67542310 + TX_LANE_MAP: 0x45763201 + RX_POLARITY_FLIP: 0XBC + TX_POLARITY_FLIP: 0XC1 + ? + PC_PM_ID: 53 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x76453201 + TX_LANE_MAP: 0x54672310 + RX_POLARITY_FLIP: 0X7C + TX_POLARITY_FLIP: 0XC2 + ? + PC_PM_ID: 54 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x76453201 + TX_LANE_MAP: 0x54672310 + RX_POLARITY_FLIP: 0X7C + TX_POLARITY_FLIP: 0XC2 + ? + PC_PM_ID: 55 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x76453201 + TX_LANE_MAP: 0x54672310 + RX_POLARITY_FLIP: 0X7C + TX_POLARITY_FLIP: 0XC2 + ? + PC_PM_ID: 56 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x76453201 + TX_LANE_MAP: 0x54672310 + RX_POLARITY_FLIP: 0X7C + TX_POLARITY_FLIP: 0XC2 + ? + PC_PM_ID: 57 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x67542310 + TX_LANE_MAP: 0x45763201 + RX_POLARITY_FLIP: 0XBC + TX_POLARITY_FLIP: 0XE4 + ? + PC_PM_ID: 58 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x67542310 + TX_LANE_MAP: 0x45763201 + RX_POLARITY_FLIP: 0XBC + TX_POLARITY_FLIP: 0XC1 + ? + PC_PM_ID: 59 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x67542310 + TX_LANE_MAP: 0x45763201 + RX_POLARITY_FLIP: 0XBC + TX_POLARITY_FLIP: 0XC3 + ? + PC_PM_ID: 60 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x54671023 + TX_LANE_MAP: 0x45760132 + RX_POLARITY_FLIP: 0X82 + TX_POLARITY_FLIP: 0XBE + ? + PC_PM_ID: 61 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x56471203 + TX_LANE_MAP: 0x65742130 + RX_POLARITY_FLIP: 0X88 + TX_POLARITY_FLIP: 0XAA + ? + PC_PM_ID: 62 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x45760132 + TX_LANE_MAP: 0x54671023 + RX_POLARITY_FLIP: 0X44 + TX_POLARITY_FLIP: 0X77 + ? + PC_PM_ID: 63 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x56471203 + TX_LANE_MAP: 0x65742130 + RX_POLARITY_FLIP: 0X88 + TX_POLARITY_FLIP: 0XAA + ? + PC_PM_ID: 64 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x45760132 + TX_LANE_MAP: 0x54671023 + RX_POLARITY_FLIP: 0X44 + TX_POLARITY_FLIP: 0X77 +... +--- +device: + 0: + PC_PORT_PHYS_MAP: + ? + PORT_ID: 1 + : + PC_PHYS_PORT_ID: 1 + ? + PORT_ID: 2 + : + PC_PHYS_PORT_ID: 5 + ? + PORT_ID: 3 + : + PC_PHYS_PORT_ID: 9 + ? + PORT_ID: 4 + : + PC_PHYS_PORT_ID: 13 + ? + PORT_ID: 11 + : + PC_PHYS_PORT_ID: 17 + ? + PORT_ID: 12 + : + PC_PHYS_PORT_ID: 21 + ? + PORT_ID: 13 + : + PC_PHYS_PORT_ID: 25 + ? + PORT_ID: 14 + : + PC_PHYS_PORT_ID: 29 + ? + PORT_ID: 22 + : + PC_PHYS_PORT_ID: 33 + ? + PORT_ID: 23 + : + PC_PHYS_PORT_ID: 37 + ? + PORT_ID: 24 + : + PC_PHYS_PORT_ID: 41 + ? + PORT_ID: 25 + : + PC_PHYS_PORT_ID: 45 + ? + PORT_ID: 33 + : + PC_PHYS_PORT_ID: 49 + ? + PORT_ID: 34 + : + PC_PHYS_PORT_ID: 53 + ? + PORT_ID: 35 + : + PC_PHYS_PORT_ID: 57 + ? + PORT_ID: 36 + : + PC_PHYS_PORT_ID: 61 + ? + PORT_ID: 44 + : + PC_PHYS_PORT_ID: 65 + ? + PORT_ID: 45 + : + PC_PHYS_PORT_ID: 69 + ? + PORT_ID: 46 + : + PC_PHYS_PORT_ID: 73 + ? + PORT_ID: 47 + : + PC_PHYS_PORT_ID: 77 + ? + PORT_ID: 55 + : + PC_PHYS_PORT_ID: 81 + ? + PORT_ID: 56 + : + PC_PHYS_PORT_ID: 85 + ? + PORT_ID: 57 + : + PC_PHYS_PORT_ID: 89 + ? + PORT_ID: 58 + : + PC_PHYS_PORT_ID: 93 + ? + PORT_ID: 66 + : + PC_PHYS_PORT_ID: 97 + ? + PORT_ID: 67 + : + PC_PHYS_PORT_ID: 101 + ? + PORT_ID: 68 + : + PC_PHYS_PORT_ID: 105 + ? + PORT_ID: 69 + : + PC_PHYS_PORT_ID: 109 + ? + PORT_ID: 77 + : + PC_PHYS_PORT_ID: 113 + ? + PORT_ID: 78 + : + PC_PHYS_PORT_ID: 117 + ? + PORT_ID: 79 + : + PC_PHYS_PORT_ID: 121 + ? + PORT_ID: 80 + : + PC_PHYS_PORT_ID: 125 + ? + PORT_ID: 88 + : + PC_PHYS_PORT_ID: 129 + ? + PORT_ID: 89 + : + PC_PHYS_PORT_ID: 133 + ? + PORT_ID: 90 + : + PC_PHYS_PORT_ID: 137 + ? + PORT_ID: 91 + : + PC_PHYS_PORT_ID: 141 + ? + PORT_ID: 99 + : + PC_PHYS_PORT_ID: 145 + ? + PORT_ID: 100 + : + PC_PHYS_PORT_ID: 149 + ? + PORT_ID: 101 + : + PC_PHYS_PORT_ID: 153 + ? + PORT_ID: 102 + : + PC_PHYS_PORT_ID: 157 + ? + PORT_ID: 110 + : + PC_PHYS_PORT_ID: 161 + ? + PORT_ID: 111 + : + PC_PHYS_PORT_ID: 165 + ? + PORT_ID: 112 + : + PC_PHYS_PORT_ID: 169 + ? + PORT_ID: 113 + : + PC_PHYS_PORT_ID: 173 + ? + PORT_ID: 121 + : + PC_PHYS_PORT_ID: 177 + ? + PORT_ID: 122 + : + PC_PHYS_PORT_ID: 181 + ? + PORT_ID: 123 + : + PC_PHYS_PORT_ID: 185 + ? + PORT_ID: 124 + : + PC_PHYS_PORT_ID: 189 + ? + PORT_ID: 132 + : + PC_PHYS_PORT_ID: 193 + ? + PORT_ID: 133 + : + PC_PHYS_PORT_ID: 197 + ? + PORT_ID: 134 + : + PC_PHYS_PORT_ID: 201 + ? + PORT_ID: 135 + : + PC_PHYS_PORT_ID: 205 + ? + PORT_ID: 143 + : + PC_PHYS_PORT_ID: 209 + ? + PORT_ID: 144 + : + PC_PHYS_PORT_ID: 213 + ? + PORT_ID: 145 + : + PC_PHYS_PORT_ID: 217 + ? + PORT_ID: 146 + : + PC_PHYS_PORT_ID: 221 + ? + PORT_ID: 154 + : + PC_PHYS_PORT_ID: 225 + ? + PORT_ID: 155 + : + PC_PHYS_PORT_ID: 229 + ? + PORT_ID: 156 + : + PC_PHYS_PORT_ID: 233 + ? + PORT_ID: 157 + : + PC_PHYS_PORT_ID: 237 + ? + PORT_ID: 165 + : + PC_PHYS_PORT_ID: 241 + ? + PORT_ID: 166 + : + PC_PHYS_PORT_ID: 245 + ? + PORT_ID: 167 + : + PC_PHYS_PORT_ID: 249 + ? + PORT_ID: 168 + : + PC_PHYS_PORT_ID: 253 + ? + PORT_ID: 176 + : + PC_PHYS_PORT_ID: 257 + ? + PORT_ID: 177 + : + PC_PHYS_PORT_ID: 261 + ? + PORT_ID: 178 + : + PC_PHYS_PORT_ID: 265 + ? + PORT_ID: 179 + : + PC_PHYS_PORT_ID: 269 + ? + PORT_ID: 187 + : + PC_PHYS_PORT_ID: 273 + ? + PORT_ID: 188 + : + PC_PHYS_PORT_ID: 277 + ? + PORT_ID: 189 + : + PC_PHYS_PORT_ID: 281 + ? + PORT_ID: 190 + : + PC_PHYS_PORT_ID: 285 + ? + PORT_ID: 198 + : + PC_PHYS_PORT_ID: 289 + ? + PORT_ID: 199 + : + PC_PHYS_PORT_ID: 293 + ? + PORT_ID: 200 + : + PC_PHYS_PORT_ID: 297 + ? + PORT_ID: 201 + : + PC_PHYS_PORT_ID: 301 + ? + PORT_ID: 209 + : + PC_PHYS_PORT_ID: 305 + ? + PORT_ID: 210 + : + PC_PHYS_PORT_ID: 309 + ? + PORT_ID: 211 + : + PC_PHYS_PORT_ID: 313 + ? + PORT_ID: 212 + : + PC_PHYS_PORT_ID: 317 + ? + PORT_ID: 220 + : + PC_PHYS_PORT_ID: 321 + ? + PORT_ID: 221 + : + PC_PHYS_PORT_ID: 325 + ? + PORT_ID: 222 + : + PC_PHYS_PORT_ID: 329 + ? + PORT_ID: 223 + : + PC_PHYS_PORT_ID: 333 + ? + PORT_ID: 231 + : + PC_PHYS_PORT_ID: 337 + ? + PORT_ID: 232 + : + PC_PHYS_PORT_ID: 341 + ? + PORT_ID: 233 + : + PC_PHYS_PORT_ID: 345 + ? + PORT_ID: 234 + : + PC_PHYS_PORT_ID: 349 + ? + PORT_ID: 242 + : + PC_PHYS_PORT_ID: 353 + ? + PORT_ID: 243 + : + PC_PHYS_PORT_ID: 357 + ? + PORT_ID: 244 + : + PC_PHYS_PORT_ID: 361 + ? + PORT_ID: 245 + : + PC_PHYS_PORT_ID: 365 + ? + PORT_ID: 253 + : + PC_PHYS_PORT_ID: 369 + ? + PORT_ID: 254 + : + PC_PHYS_PORT_ID: 373 + ? + PORT_ID: 255 + : + PC_PHYS_PORT_ID: 377 + ? + PORT_ID: 256 + : + PC_PHYS_PORT_ID: 381 + ? + PORT_ID: 264 + : + PC_PHYS_PORT_ID: 385 + ? + PORT_ID: 265 + : + PC_PHYS_PORT_ID: 389 + ? + PORT_ID: 266 + : + PC_PHYS_PORT_ID: 393 + ? + PORT_ID: 267 + : + PC_PHYS_PORT_ID: 397 + ? + PORT_ID: 275 + : + PC_PHYS_PORT_ID: 401 + ? + PORT_ID: 276 + : + PC_PHYS_PORT_ID: 405 + ? + PORT_ID: 277 + : + PC_PHYS_PORT_ID: 409 + ? + PORT_ID: 278 + : + PC_PHYS_PORT_ID: 413 + ? + PORT_ID: 286 + : + PC_PHYS_PORT_ID: 417 + ? + PORT_ID: 287 + : + PC_PHYS_PORT_ID: 421 + ? + PORT_ID: 288 + : + PC_PHYS_PORT_ID: 425 + ? + PORT_ID: 289 + : + PC_PHYS_PORT_ID: 429 + ? + PORT_ID: 297 + : + PC_PHYS_PORT_ID: 433 + ? + PORT_ID: 298 + : + PC_PHYS_PORT_ID: 437 + ? + PORT_ID: 299 + : + PC_PHYS_PORT_ID: 441 + ? + PORT_ID: 300 + : + PC_PHYS_PORT_ID: 445 + ? + PORT_ID: 308 + : + PC_PHYS_PORT_ID: 449 + ? + PORT_ID: 309 + : + PC_PHYS_PORT_ID: 453 + ? + PORT_ID: 310 + : + PC_PHYS_PORT_ID: 457 + ? + PORT_ID: 311 + : + PC_PHYS_PORT_ID: 461 + ? + PORT_ID: 319 + : + PC_PHYS_PORT_ID: 465 + ? + PORT_ID: 320 + : + PC_PHYS_PORT_ID: 469 + ? + PORT_ID: 321 + : + PC_PHYS_PORT_ID: 473 + ? + PORT_ID: 322 + : + PC_PHYS_PORT_ID: 477 + ? + PORT_ID: 330 + : + PC_PHYS_PORT_ID: 481 + ? + PORT_ID: 331 + : + PC_PHYS_PORT_ID: 485 + ? + PORT_ID: 332 + : + PC_PHYS_PORT_ID: 489 + ? + PORT_ID: 333 + : + PC_PHYS_PORT_ID: 493 + ? + PORT_ID: 341 + : + PC_PHYS_PORT_ID: 497 + ? + PORT_ID: 342 + : + PC_PHYS_PORT_ID: 501 + ? + PORT_ID: 343 + : + PC_PHYS_PORT_ID: 505 + ? + PORT_ID: 344 + : + PC_PHYS_PORT_ID: 509 +... + +--- +device: + 0: + PC_PORT: + ? + PORT_ID: [1, 2, 3, 4, 11, 12, 13, 14, 22, 23, 24, 25, 33, 34, 35, 36, 44, 45, 46, 47, 55, 56, 57, 58, 66, 67, 68, 69, 77, 78, 79, 80, 88, 89, 90, 91, 99, 100, 101, 102, 110, 111, 112, 113, 121, 122, 123, 124, 132, 133, 134, 135, 143, 144, 145, 146, 154, 155, 156, 157, 165, 166, 167, 168, 176, 177, 178, 179, 187, 188, 189, 190, 198, 199, 200, 201, 209, 210, 211, 212, 220, 221, 222, 223, 231, 232, 233, 234, 242, 243, 244, 245, 253, 254, 255, 256, 264, 265, 266, 267, 275, 276, 277, 278, 286, 287, 288, 289, 297, 298, 299, 300, 308, 309, 310, 311, 319, 320, 321, 322, 330, 331, 332, 333, 341, 342, 343, 344] + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 +... +--- +device: + 0: + PC_TX_TAPS: + ? + PORT_ID: [1, 2, 3, 4, 11, 12, 13, 14, 22, 23, 24, 25, 33, 34, 35, 36, 44, 45, 46, 47, 55, 56, 57, 58, 66, 67, 68, 69, 77, 78, 79, 80, 88, 89, 90, 91, 99, 100, 101, 102, 110, 111, 112, 113, 121, 122, 123, 124, 132, 133, 134, 135, 143, 144, 145, 146, 154, 155, 156, 157, 165, 166, 167, 168, 176, 177, 178, 179, 187, 188, 189, 190, 198, 199, 200, 201, 209, 210, 211, 212, 220, 221, 222, 223, 231, 232, 233, 234, 242, 243, 244, 245, 253, 254, 255, 256, 264, 265, 266, 267, 275, 276, 277, 278, 286, 287, 288, 289, 297, 298, 299, 300, 308, 309, 310, 311, 319, 320, 321, 322, 330, 331, 332, 333, 341, 342, 343, 344] + LANE_INDEX: [[0,3]] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_SIG_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TXFIR_TAP_MODE_AUTO: 0 + TX_PRE3_SIGN: 0 + TX_PRE3: 0 + TX_PRE3_AUTO: 0 + TX_PRE2_SIGN: 0 + TX_PRE2: 1 + TX_PRE2_AUTO: 0 + TX_PRE_SIGN: 1 + TX_PRE: 8 + TX_PRE_AUTO: 0 + TX_MAIN: 80 + TX_MAIN_AUTO: 0 + TX_POST_SIGN: 1 + TX_POST: 4 + TX_POST_AUTO: 0 + TX_POST2_SIGN: 1 + TX_POST2: 1 + TX_POST2_AUTO: 0 + TX_POST3_SIGN: 0 + TX_POST3: 0 + TX_POST3_AUTO: 0 +... diff --git a/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/M2-W6940-64X1-FR4/buffers.json.j2 b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/M2-W6940-64X1-FR4/buffers.json.j2 new file mode 100644 index 00000000000..0b1cb2c541b --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/M2-W6940-64X1-FR4/buffers.json.j2 @@ -0,0 +1,2 @@ +{%- set default_topo = 't1' %} +{%- include 'buffers_config.j2' %} diff --git a/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/M2-W6940-64X1-FR4/buffers_defaults_ft2.j2 b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/M2-W6940-64X1-FR4/buffers_defaults_ft2.j2 new file mode 100644 index 00000000000..ef380c86c4a --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/M2-W6940-64X1-FR4/buffers_defaults_ft2.j2 @@ -0,0 +1,36 @@ + +{%- set default_cable = '5m' %} + +{%- macro generate_buffer_pool_and_profiles() %} + + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "162539680", + "type": "ingress", + "mode": "dynamic", + "xoff": "33374584" + }, + "egress_lossless_pool": { + "size": "162539680", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"ingress_lossless_pool", + "size":"0", + "static_th":"165867080" + }, + "egress_lossless_profile": { + "pool":"egress_lossless_pool", + "size":"0", + "static_th":"165867080" + }, + "egress_lossy_profile": { + "pool":"egress_lossless_pool", + "size":"1778", + "dynamic_th":"0" + } + }, +{%- endmacro %} diff --git a/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/M2-W6940-64X1-FR4/buffers_defaults_lt2.j2 b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/M2-W6940-64X1-FR4/buffers_defaults_lt2.j2 new file mode 100644 index 00000000000..ef380c86c4a --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/M2-W6940-64X1-FR4/buffers_defaults_lt2.j2 @@ -0,0 +1,36 @@ + +{%- set default_cable = '5m' %} + +{%- macro generate_buffer_pool_and_profiles() %} + + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "162539680", + "type": "ingress", + "mode": "dynamic", + "xoff": "33374584" + }, + "egress_lossless_pool": { + "size": "162539680", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"ingress_lossless_pool", + "size":"0", + "static_th":"165867080" + }, + "egress_lossless_profile": { + "pool":"egress_lossless_pool", + "size":"0", + "static_th":"165867080" + }, + "egress_lossy_profile": { + "pool":"egress_lossless_pool", + "size":"1778", + "dynamic_th":"0" + } + }, +{%- endmacro %} diff --git a/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/M2-W6940-64X1-FR4/buffers_defaults_t0.j2 b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/M2-W6940-64X1-FR4/buffers_defaults_t0.j2 new file mode 100644 index 00000000000..ef380c86c4a --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/M2-W6940-64X1-FR4/buffers_defaults_t0.j2 @@ -0,0 +1,36 @@ + +{%- set default_cable = '5m' %} + +{%- macro generate_buffer_pool_and_profiles() %} + + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "162539680", + "type": "ingress", + "mode": "dynamic", + "xoff": "33374584" + }, + "egress_lossless_pool": { + "size": "162539680", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"ingress_lossless_pool", + "size":"0", + "static_th":"165867080" + }, + "egress_lossless_profile": { + "pool":"egress_lossless_pool", + "size":"0", + "static_th":"165867080" + }, + "egress_lossy_profile": { + "pool":"egress_lossless_pool", + "size":"1778", + "dynamic_th":"0" + } + }, +{%- endmacro %} diff --git a/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/M2-W6940-64X1-FR4/buffers_defaults_t1.j2 b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/M2-W6940-64X1-FR4/buffers_defaults_t1.j2 new file mode 100644 index 00000000000..847000e1640 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/M2-W6940-64X1-FR4/buffers_defaults_t1.j2 @@ -0,0 +1,36 @@ + +{%- set default_cable = '40m' %} + +{%- macro generate_buffer_pool_and_profiles() %} + + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "162539680", + "type": "ingress", + "mode": "dynamic", + "xoff": "33374584" + }, + "egress_lossless_pool": { + "size": "162539680", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"ingress_lossless_pool", + "size":"0", + "static_th":"165867080" + }, + "egress_lossless_profile": { + "pool":"egress_lossless_pool", + "size":"0", + "static_th":"165867080" + }, + "egress_lossy_profile": { + "pool":"egress_lossless_pool", + "size":"1778", + "dynamic_th":"0" + } + }, +{%- endmacro %} diff --git a/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/M2-W6940-64X1-FR4/buffers_defaults_t2.j2 b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/M2-W6940-64X1-FR4/buffers_defaults_t2.j2 new file mode 100644 index 00000000000..ef380c86c4a --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/M2-W6940-64X1-FR4/buffers_defaults_t2.j2 @@ -0,0 +1,36 @@ + +{%- set default_cable = '5m' %} + +{%- macro generate_buffer_pool_and_profiles() %} + + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "162539680", + "type": "ingress", + "mode": "dynamic", + "xoff": "33374584" + }, + "egress_lossless_pool": { + "size": "162539680", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"ingress_lossless_pool", + "size":"0", + "static_th":"165867080" + }, + "egress_lossless_profile": { + "pool":"egress_lossless_pool", + "size":"0", + "static_th":"165867080" + }, + "egress_lossy_profile": { + "pool":"egress_lossless_pool", + "size":"1778", + "dynamic_th":"0" + } + }, +{%- endmacro %} diff --git a/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/M2-W6940-64X1-FR4/default_sku b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/M2-W6940-64X1-FR4/default_sku new file mode 100644 index 00000000000..5a6e6e04ac6 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/M2-W6940-64X1-FR4/default_sku @@ -0,0 +1 @@ +M2-W6940-64X1-FR4 l2 \ No newline at end of file diff --git a/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/M2-W6940-64X1-FR4/hwsku.json b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/M2-W6940-64X1-FR4/hwsku.json new file mode 100644 index 00000000000..76c4f2f08de --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/M2-W6940-64X1-FR4/hwsku.json @@ -0,0 +1,388 @@ +{ + "interfaces": { + "Ethernet0": { + "default_brkout_mode": "1x400G" + }, + "Ethernet1": { + "default_brkout_mode": "1x400G" + }, + "Ethernet2": { + "default_brkout_mode": "1x400G" + }, + "Ethernet3": { + "default_brkout_mode": "1x400G" + }, + "Ethernet4": { + "default_brkout_mode": "1x400G" + }, + "Ethernet5": { + "default_brkout_mode": "1x400G" + }, + "Ethernet6": { + "default_brkout_mode": "1x400G" + }, + "Ethernet7": { + "default_brkout_mode": "1x400G" + }, + "Ethernet8": { + "default_brkout_mode": "1x400G" + }, + "Ethernet9": { + "default_brkout_mode": "1x400G" + }, + "Ethernet10": { + "default_brkout_mode": "1x400G" + }, + "Ethernet11": { + "default_brkout_mode": "1x400G" + }, + "Ethernet12": { + "default_brkout_mode": "1x400G" + }, + "Ethernet13": { + "default_brkout_mode": "1x400G" + }, + "Ethernet14": { + "default_brkout_mode": "1x400G" + }, + "Ethernet15": { + "default_brkout_mode": "1x400G" + }, + "Ethernet16": { + "default_brkout_mode": "1x400G" + }, + "Ethernet17": { + "default_brkout_mode": "1x400G" + }, + "Ethernet18": { + "default_brkout_mode": "1x400G" + }, + "Ethernet19": { + "default_brkout_mode": "1x400G" + }, + "Ethernet20": { + "default_brkout_mode": "1x400G" + }, + "Ethernet21": { + "default_brkout_mode": "1x400G" + }, + "Ethernet22": { + "default_brkout_mode": "1x400G" + }, + "Ethernet23": { + "default_brkout_mode": "1x400G" + }, + "Ethernet24": { + "default_brkout_mode": "1x400G" + }, + "Ethernet25": { + "default_brkout_mode": "1x400G" + }, + "Ethernet26": { + "default_brkout_mode": "1x400G" + }, + "Ethernet27": { + "default_brkout_mode": "1x400G" + }, + "Ethernet28": { + "default_brkout_mode": "1x400G" + }, + "Ethernet29": { + "default_brkout_mode": "1x400G" + }, + "Ethernet30": { + "default_brkout_mode": "1x400G" + }, + "Ethernet31": { + "default_brkout_mode": "1x400G" + }, + "Ethernet32": { + "default_brkout_mode": "1x400G" + }, + "Ethernet33": { + "default_brkout_mode": "1x400G" + }, + "Ethernet34": { + "default_brkout_mode": "1x400G" + }, + "Ethernet35": { + "default_brkout_mode": "1x400G" + }, + "Ethernet36": { + "default_brkout_mode": "1x400G" + }, + "Ethernet37": { + "default_brkout_mode": "1x400G" + }, + "Ethernet38": { + "default_brkout_mode": "1x400G" + }, + "Ethernet39": { + "default_brkout_mode": "1x400G" + }, + "Ethernet40": { + "default_brkout_mode": "1x400G" + }, + "Ethernet41": { + "default_brkout_mode": "1x400G" + }, + "Ethernet42": { + "default_brkout_mode": "1x400G" + }, + "Ethernet43": { + "default_brkout_mode": "1x400G" + }, + "Ethernet44": { + "default_brkout_mode": "1x400G" + }, + "Ethernet45": { + "default_brkout_mode": "1x400G" + }, + "Ethernet46": { + "default_brkout_mode": "1x400G" + }, + "Ethernet47": { + "default_brkout_mode": "1x400G" + }, + "Ethernet48": { + "default_brkout_mode": "1x400G" + }, + "Ethernet49": { + "default_brkout_mode": "1x400G" + }, + "Ethernet50": { + "default_brkout_mode": "1x400G" + }, + "Ethernet51": { + "default_brkout_mode": "1x400G" + }, + "Ethernet52": { + "default_brkout_mode": "1x400G" + }, + "Ethernet53": { + "default_brkout_mode": "1x400G" + }, + "Ethernet54": { + "default_brkout_mode": "1x400G" + }, + "Ethernet55": { + "default_brkout_mode": "1x400G" + }, + "Ethernet56": { + "default_brkout_mode": "1x400G" + }, + "Ethernet57": { + "default_brkout_mode": "1x400G" + }, + "Ethernet58": { + "default_brkout_mode": "1x400G" + }, + "Ethernet59": { + "default_brkout_mode": "1x400G" + }, + "Ethernet60": { + "default_brkout_mode": "1x400G" + }, + "Ethernet61": { + "default_brkout_mode": "1x400G" + }, + "Ethernet62": { + "default_brkout_mode": "1x400G" + }, + "Ethernet63": { + "default_brkout_mode": "1x400G" + }, + "Ethernet64": { + "default_brkout_mode": "1x400G" + }, + "Ethernet65": { + "default_brkout_mode": "1x400G" + }, + "Ethernet66": { + "default_brkout_mode": "1x400G" + }, + "Ethernet67": { + "default_brkout_mode": "1x400G" + }, + "Ethernet68": { + "default_brkout_mode": "1x400G" + }, + "Ethernet69": { + "default_brkout_mode": "1x400G" + }, + "Ethernet70": { + "default_brkout_mode": "1x400G" + }, + "Ethernet71": { + "default_brkout_mode": "1x400G" + }, + "Ethernet72": { + "default_brkout_mode": "1x400G" + }, + "Ethernet73": { + "default_brkout_mode": "1x400G" + }, + "Ethernet74": { + "default_brkout_mode": "1x400G" + }, + "Ethernet75": { + "default_brkout_mode": "1x400G" + }, + "Ethernet76": { + "default_brkout_mode": "1x400G" + }, + "Ethernet77": { + "default_brkout_mode": "1x400G" + }, + "Ethernet78": { + "default_brkout_mode": "1x400G" + }, + "Ethernet79": { + "default_brkout_mode": "1x400G" + }, + "Ethernet80": { + "default_brkout_mode": "1x400G" + }, + "Ethernet81": { + "default_brkout_mode": "1x400G" + }, + "Ethernet82": { + "default_brkout_mode": "1x400G" + }, + "Ethernet83": { + "default_brkout_mode": "1x400G" + }, + "Ethernet84": { + "default_brkout_mode": "1x400G" + }, + "Ethernet85": { + "default_brkout_mode": "1x400G" + }, + "Ethernet86": { + "default_brkout_mode": "1x400G" + }, + "Ethernet87": { + "default_brkout_mode": "1x400G" + }, + "Ethernet88": { + "default_brkout_mode": "1x400G" + }, + "Ethernet89": { + "default_brkout_mode": "1x400G" + }, + "Ethernet90": { + "default_brkout_mode": "1x400G" + }, + "Ethernet91": { + "default_brkout_mode": "1x400G" + }, + "Ethernet92": { + "default_brkout_mode": "1x400G" + }, + "Ethernet93": { + "default_brkout_mode": "1x400G" + }, + "Ethernet94": { + "default_brkout_mode": "1x400G" + }, + "Ethernet95": { + "default_brkout_mode": "1x400G" + }, + "Ethernet96": { + "default_brkout_mode": "1x400G" + }, + "Ethernet97": { + "default_brkout_mode": "1x400G" + }, + "Ethernet98": { + "default_brkout_mode": "1x400G" + }, + "Ethernet99": { + "default_brkout_mode": "1x400G" + }, + "Ethernet100": { + "default_brkout_mode": "1x400G" + }, + "Ethernet101": { + "default_brkout_mode": "1x400G" + }, + "Ethernet102": { + "default_brkout_mode": "1x400G" + }, + "Ethernet103": { + "default_brkout_mode": "1x400G" + }, + "Ethernet104": { + "default_brkout_mode": "1x400G" + }, + "Ethernet105": { + "default_brkout_mode": "1x400G" + }, + "Ethernet106": { + "default_brkout_mode": "1x400G" + }, + "Ethernet107": { + "default_brkout_mode": "1x400G" + }, + "Ethernet108": { + "default_brkout_mode": "1x400G" + }, + "Ethernet109": { + "default_brkout_mode": "1x400G" + }, + "Ethernet110": { + "default_brkout_mode": "1x400G" + }, + "Ethernet111": { + "default_brkout_mode": "1x400G" + }, + "Ethernet112": { + "default_brkout_mode": "1x400G" + }, + "Ethernet113": { + "default_brkout_mode": "1x400G" + }, + "Ethernet114": { + "default_brkout_mode": "1x400G" + }, + "Ethernet115": { + "default_brkout_mode": "1x400G" + }, + "Ethernet116": { + "default_brkout_mode": "1x400G" + }, + "Ethernet117": { + "default_brkout_mode": "1x400G" + }, + "Ethernet118": { + "default_brkout_mode": "1x400G" + }, + "Ethernet119": { + "default_brkout_mode": "1x400G" + }, + "Ethernet120": { + "default_brkout_mode": "1x400G" + }, + "Ethernet121": { + "default_brkout_mode": "1x400G" + }, + "Ethernet122": { + "default_brkout_mode": "1x400G" + }, + "Ethernet123": { + "default_brkout_mode": "1x400G" + }, + "Ethernet124": { + "default_brkout_mode": "1x400G" + }, + "Ethernet125": { + "default_brkout_mode": "1x400G" + }, + "Ethernet126": { + "default_brkout_mode": "1x400G" + }, + "Ethernet127": { + "default_brkout_mode": "1x400G" + } + } +} diff --git a/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/M2-W6940-64X1-FR4/pg_profile_lookup.ini b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/M2-W6940-64X1-FR4/pg_profile_lookup.ini new file mode 100644 index 00000000000..9b240cc8bf6 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/M2-W6940-64X1-FR4/pg_profile_lookup.ini @@ -0,0 +1,26 @@ +# PG lossless profiles. +# speed cable size xon xoff threshold xon_offset + 10000 5m 18796 0 91440 -2 3556 + 25000 5m 18796 0 91440 -2 3556 + 40000 5m 18796 0 106934 -2 3556 + 50000 5m 18796 0 106934 -2 3556 + 100000 5m 18796 0 147066 -2 3556 + 200000 5m 18796 0 229362 -2 3556 + 400000 5m 18796 0 393192 -2 3556 + 800000 5m 18796 0 729488 -2 3556 + 10000 40m 18796 0 94742 -2 3556 + 25000 40m 18796 0 94742 -2 3556 + 40000 40m 18796 0 113538 -2 3556 + 50000 40m 18796 0 113538 -2 3556 + 100000 40m 18796 0 160274 -2 3556 + 200000 40m 18796 0 255778 -2 3556 + 400000 40m 18796 0 446024 -2 3556 + 800000 40m 18796 0 835406 -2 3556 + 10000 300m 18796 0 258572 -2 3556 + 25000 300m 18796 0 258572 -2 3556 + 40000 300m 18796 0 258572 -2 3556 + 50000 300m 18796 0 258572 -2 3556 + 100000 300m 18796 0 258572 -2 3556 + 200000 300m 18796 0 452374 -2 3556 + 400000 300m 18796 0 839216 -2 3556 + 800000 300m 18796 0 1621536 -2 3556 diff --git a/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/M2-W6940-64X1-FR4/port_config.ini b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/M2-W6940-64X1-FR4/port_config.ini new file mode 100644 index 00000000000..01f74d97d9e --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/M2-W6940-64X1-FR4/port_config.ini @@ -0,0 +1,65 @@ +# name lanes alias index speed admin_status fec +Ethernet0 1,2,3,4,5,6,7,8 etp1 1 800000 down rs +Ethernet1 9,10,11,12,13,14,15,16 etp2 2 800000 down rs +Ethernet2 17,18,19,20,21,22,23,24 etp3 3 800000 down rs +Ethernet3 25,26,27,28,29,30,31,32 etp4 4 800000 down rs +Ethernet4 33,34,35,36,37,38,39,40 etp5 5 800000 down rs +Ethernet5 41,42,43,44,45,46,47,48 etp6 6 800000 down rs +Ethernet6 49,50,51,52,53,54,55,56 etp7 7 800000 down rs +Ethernet7 57,58,59,60,61,62,63,64 etp8 8 800000 down rs +Ethernet8 65,66,67,68,69,70,71,72 etp9 9 800000 down rs +Ethernet9 73,74,75,76,77,78,79,80 etp10 10 800000 down rs +Ethernet10 81,82,83,84,85,86,87,88 etp11 11 800000 down rs +Ethernet11 89,90,91,92,93,94,95,96 etp12 12 800000 down rs +Ethernet12 97,98,99,100,101,102,103,104 etp13 13 800000 down rs +Ethernet13 105,106,107,108,109,110,111,112 etp14 14 800000 down rs +Ethernet14 113,114,115,116,117,118,119,120 etp15 15 800000 down rs +Ethernet15 121,122,123,124,125,126,127,128 etp16 16 800000 down rs +Ethernet16 129,130,131,132,133,134,135,136 etp17 17 800000 down rs +Ethernet17 137,138,139,140,141,142,143,144 etp18 18 800000 down rs +Ethernet18 145,146,147,148,149,150,151,152 etp19 19 800000 down rs +Ethernet19 153,154,155,156,157,158,159,160 etp20 20 800000 down rs +Ethernet20 161,162,163,164,165,166,167,168 etp21 21 800000 down rs +Ethernet21 169,170,171,172,173,174,175,176 etp22 22 800000 down rs +Ethernet22 177,178,179,180,181,182,183,184 etp23 23 800000 down rs +Ethernet23 185,186,187,188,189,190,191,192 etp24 24 800000 down rs +Ethernet24 193,194,195,196,197,198,199,200 etp25 25 800000 down rs +Ethernet25 201,202,203,204,205,206,207,208 etp26 26 800000 down rs +Ethernet26 209,210,211,212,213,214,215,216 etp27 27 800000 down rs +Ethernet27 217,218,219,220,221,222,223,224 etp28 28 800000 down rs +Ethernet28 225,226,227,228,229,230,231,232 etp29 29 800000 down rs +Ethernet29 233,234,235,236,237,238,239,240 etp30 30 800000 down rs +Ethernet30 241,242,243,244,245,246,247,248 etp31 31 800000 down rs +Ethernet31 249,250,251,252,253,254,255,256 etp32 32 800000 down rs +Ethernet32 257,258,259,260,261,262,263,264 etp33 33 800000 down rs +Ethernet33 265,266,267,268,269,270,271,272 etp34 34 800000 down rs +Ethernet34 273,274,275,276,277,278,279,280 etp35 35 800000 down rs +Ethernet35 281,282,283,284,285,286,287,288 etp36 36 800000 down rs +Ethernet36 289,290,291,292,293,294,295,296 etp37 37 800000 down rs +Ethernet37 297,298,299,300,301,302,303,304 etp38 38 800000 down rs +Ethernet38 305,306,307,308,309,310,311,312 etp39 39 800000 down rs +Ethernet39 313,314,315,316,317,318,319,320 etp40 40 800000 down rs +Ethernet40 321,322,323,324,325,326,327,328 etp41 41 800000 down rs +Ethernet41 329,330,331,332,333,334,335,336 etp42 42 800000 down rs +Ethernet42 337,338,339,340,341,342,343,344 etp43 43 800000 down rs +Ethernet43 345,346,347,348,349,350,351,352 etp44 44 800000 down rs +Ethernet44 353,354,355,356,357,358,359,360 etp45 45 800000 down rs +Ethernet45 361,362,363,364,365,366,367,368 etp46 46 800000 down rs +Ethernet46 369,370,371,372,373,374,375,376 etp47 47 800000 down rs +Ethernet47 377,378,379,380,381,382,383,384 etp48 48 800000 down rs +Ethernet48 385,386,387,388,389,390,391,392 etp49 49 800000 down rs +Ethernet49 393,394,395,396,397,398,399,400 etp50 50 800000 down rs +Ethernet50 401,402,403,404,405,406,407,408 etp51 51 800000 down rs +Ethernet51 409,410,411,412,413,414,415,416 etp52 52 800000 down rs +Ethernet52 417,418,419,420,421,422,423,424 etp53 53 800000 down rs +Ethernet53 425,426,427,428,429,430,431,432 etp54 54 800000 down rs +Ethernet54 433,434,435,436,437,438,439,440 etp55 55 800000 down rs +Ethernet55 441,442,443,444,445,446,447,448 etp56 56 800000 down rs +Ethernet56 449,450,451,452,453,454,455,456 etp57 57 800000 down rs +Ethernet57 457,458,459,460,461,462,463,464 etp58 58 800000 down rs +Ethernet58 465,466,467,468,469,470,471,472 etp59 59 800000 down rs +Ethernet59 473,474,475,476,477,478,479,480 etp60 60 800000 down rs +Ethernet60 481,482,483,484,485,486,487,488 etp61 61 800000 down rs +Ethernet61 489,490,491,492,493,494,495,496 etp62 62 800000 down rs +Ethernet62 497,498,499,500,501,502,503,504 etp63 63 800000 down rs +Ethernet63 505,506,507,508,509,510,511,512 etp64 64 800000 down rs diff --git a/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/M2-W6940-64X1-FR4/qos.json.j2 b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/M2-W6940-64X1-FR4/qos.json.j2 new file mode 100644 index 00000000000..3e548325ea3 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/M2-W6940-64X1-FR4/qos.json.j2 @@ -0,0 +1 @@ +{%- include 'qos_config.j2' %} diff --git a/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/M2-W6940-64X1-FR4/sai.profile b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/M2-W6940-64X1-FR4/sai.profile new file mode 100644 index 00000000000..1636d96daa2 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/M2-W6940-64X1-FR4/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th5-m2-w6940-64x1-fr4-64x800g.yml \ No newline at end of file diff --git a/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/M2-W6940-64X1-FR4/th5-m2-w6940-64x1-fr4-64x800g.yml b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/M2-W6940-64X1-FR4/th5-m2-w6940-64x1-fr4-64x800g.yml new file mode 100644 index 00000000000..f1483b7acfa --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/M2-W6940-64X1-FR4/th5-m2-w6940-64x1-fr4-64x800g.yml @@ -0,0 +1,1136 @@ +--- +device: + 0: + DEVICE_CONFIG: + AUTOLOAD_BOARD_SETTINGS: 0 +... +--- +device: + 0: + # Per pipe flex counter configuration + CTR_EFLEX_CONFIG: + CTR_ING_EFLEX_OPERMODE_PIPEUNIQUE: 1 + CTR_ING_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1 + CTR_EGR_EFLEX_OPERMODE_PIPEUNIQUE: 1 + CTR_EGR_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1 +... +--- +device: + 0: + TM_SCHEDULER_CONFIG: + NUM_MC_Q: NUM_MC_Q_4 +... + +--- +device: + 0: + FP_CONFIG: + FP_ING_OPERMODE: GLOBAL_PIPE_AWARE +... +--- +bcm_device: + 0: + global: + bcm_tunnel_term_compatible_mode: 1 + vlan_flooding_l2mc_num_reserved: 2048 + l3_alpm_template: 1 + l3_alpm2_bnk_threshold: 100 + uft_mode: 1 + l3_enable: 1 + l3_intf_vlan_split_egress: 1 + l2_hitbit_enable: 0 + pktio_mode: 1 + sai_pfc_defaults_disable: 1 + sai_optimized_mmu: 1 + global_flexctr_ing_action_num_reserved: 20 + global_flexctr_ing_pool_num_reserved: 8 + global_flexctr_ing_op_profile_num_reserved: 20 + global_flexctr_ing_group_num_reserved: 2 + global_flexctr_egr_action_num_reserved: 8 + global_flexctr_egr_pool_num_reserved: 5 + global_flexctr_egr_op_profile_num_reserved: 10 + global_flexctr_egr_group_num_reserved: 1 + flowtracker_flexctr_alloc_enable: 1 +... + +--- +device: + 0: + PC_PM_CORE: + ? + PC_PM_ID: 1 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x23106754 + TX_LANE_MAP: 0x32017645 + RX_POLARITY_FLIP: 0X22 + TX_POLARITY_FLIP: 0XEE + ? + PC_PM_ID: 2 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x30217465 + TX_LANE_MAP: 0x03124756 + RX_POLARITY_FLIP: 0X11 + TX_POLARITY_FLIP: 0X55 + ? + PC_PM_ID: 3 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x23106754 + TX_LANE_MAP: 0x32017645 + RX_POLARITY_FLIP: 0X22 + TX_POLARITY_FLIP: 0XEE + ? + PC_PM_ID: 4 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x30217465 + TX_LANE_MAP: 0x03124756 + RX_POLARITY_FLIP: 0X11 + TX_POLARITY_FLIP: 0X55 + ? + PC_PM_ID: 5 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x32017645 + TX_LANE_MAP: 0x23106754 + RX_POLARITY_FLIP: 0x41 + TX_POLARITY_FLIP: 0x7D + ? + PC_PM_ID: 6 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x01324576 + TX_LANE_MAP: 0x10236754 + RX_POLARITY_FLIP: 0x3D + TX_POLARITY_FLIP: 0xC3 + ? + PC_PM_ID: 7 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x01324576 + TX_LANE_MAP: 0x10236754 + RX_POLARITY_FLIP: 0x3D + TX_POLARITY_FLIP: 0x83 + ? + PC_PM_ID: 8 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x01324576 + TX_LANE_MAP: 0x10236754 + RX_POLARITY_FLIP: 0x3D + TX_POLARITY_FLIP: 0x27 + ? + PC_PM_ID: 9 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x10235467 + TX_LANE_MAP: 0x01327645 + RX_POLARITY_FLIP: 0x3e + TX_POLARITY_FLIP: 0x43 + ? + PC_PM_ID: 10 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x10235467 + TX_LANE_MAP: 0x01327645 + RX_POLARITY_FLIP: 0x3e + TX_POLARITY_FLIP: 0x43 + ? + PC_PM_ID: 11 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x10235467 + TX_LANE_MAP: 0x01327645 + RX_POLARITY_FLIP: 0x3e + TX_POLARITY_FLIP: 0x43 + ? + PC_PM_ID: 12 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x10235467 + TX_LANE_MAP: 0x01327645 + RX_POLARITY_FLIP: 0x3e + TX_POLARITY_FLIP: 0x43 + ? + PC_PM_ID: 13 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x01324576 + TX_LANE_MAP: 0x10236754 + RX_POLARITY_FLIP: 0x3d + TX_POLARITY_FLIP: 0x83 + ? + PC_PM_ID: 14 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x01324576 + TX_LANE_MAP: 0x10236754 + RX_POLARITY_FLIP: 0x3d + TX_POLARITY_FLIP: 0x83 + ? + PC_PM_ID: 15 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x01324576 + TX_LANE_MAP: 0x10236754 + RX_POLARITY_FLIP: 0x3d + TX_POLARITY_FLIP: 0x83 + ? + PC_PM_ID: 16 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x01324576 + TX_LANE_MAP: 0x10236754 + RX_POLARITY_FLIP: 0x3d + TX_POLARITY_FLIP: 0x83 + ? + PC_PM_ID: 17 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x67542310 + TX_LANE_MAP: 0x45763201 + RX_POLARITY_FLIP: 0xbc + TX_POLARITY_FLIP: 0xc1 + ? + PC_PM_ID: 18 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x67542310 + TX_LANE_MAP: 0x45763201 + RX_POLARITY_FLIP: 0xbc + TX_POLARITY_FLIP: 0xc1 + ? + PC_PM_ID: 19 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x67542310 + TX_LANE_MAP: 0x45763201 + RX_POLARITY_FLIP: 0xbc + TX_POLARITY_FLIP: 0xc1 + ? + PC_PM_ID: 20 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x67542310 + TX_LANE_MAP: 0x45763201 + RX_POLARITY_FLIP: 0xbc + TX_POLARITY_FLIP: 0xc1 + ? + PC_PM_ID: 21 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x76453201 + TX_LANE_MAP: 0x54672310 + RX_POLARITY_FLIP: 0x7c + TX_POLARITY_FLIP: 0xc2 + ? + PC_PM_ID: 22 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x76453201 + TX_LANE_MAP: 0x54672310 + RX_POLARITY_FLIP: 0x7c + TX_POLARITY_FLIP: 0xc2 + ? + PC_PM_ID: 23 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x76453201 + TX_LANE_MAP: 0x54672310 + RX_POLARITY_FLIP: 0x7c + TX_POLARITY_FLIP: 0xc2 + ? + PC_PM_ID: 24 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x76453201 + TX_LANE_MAP: 0x54672310 + RX_POLARITY_FLIP: 0x7c + TX_POLARITY_FLIP: 0xc2 + ? + PC_PM_ID: 25 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x67542310 + TX_LANE_MAP: 0x45763201 + RX_POLARITY_FLIP: 0xbc + TX_POLARITY_FLIP: 0xe4 + ? + PC_PM_ID: 26 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x67542310 + TX_LANE_MAP: 0x45763201 + RX_POLARITY_FLIP: 0xbc + TX_POLARITY_FLIP: 0xc1 + ? + PC_PM_ID: 27 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x67542310 + TX_LANE_MAP: 0x45763201 + RX_POLARITY_FLIP: 0xbc + TX_POLARITY_FLIP: 0xc3 + ? + PC_PM_ID: 28 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x54671023 + TX_LANE_MAP: 0x45760132 + RX_POLARITY_FLIP: 0x82 + TX_POLARITY_FLIP: 0xbe + ? + PC_PM_ID: 29 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x56471203 + TX_LANE_MAP: 0x65742130 + RX_POLARITY_FLIP: 0x88 + TX_POLARITY_FLIP: 0xaa + ? + PC_PM_ID: 30 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x45760132 + TX_LANE_MAP: 0x54671023 + RX_POLARITY_FLIP: 0x44 + TX_POLARITY_FLIP: 0x77 + ? + PC_PM_ID: 31 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x56471203 + TX_LANE_MAP: 0x65742130 + RX_POLARITY_FLIP: 0x88 + TX_POLARITY_FLIP: 0xaa + ? + PC_PM_ID: 32 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x45760132 + TX_LANE_MAP: 0x54671023 + RX_POLARITY_FLIP: 0x44 + TX_POLARITY_FLIP: 0x77 + ? + PC_PM_ID: 33 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x23106754 + TX_LANE_MAP: 0x32017645 + RX_POLARITY_FLIP: 0x22 + TX_POLARITY_FLIP: 0xee + ? + PC_PM_ID: 34 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x30217465 + TX_LANE_MAP: 0x03124756 + RX_POLARITY_FLIP: 0x11 + TX_POLARITY_FLIP: 0x55 + ? + PC_PM_ID: 35 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x23106754 + TX_LANE_MAP: 0x32017645 + RX_POLARITY_FLIP: 0x22 + TX_POLARITY_FLIP: 0xee + ? + PC_PM_ID: 36 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x30217465 + TX_LANE_MAP: 0x03124756 + RX_POLARITY_FLIP: 0x11 + TX_POLARITY_FLIP: 0x55 + ? + PC_PM_ID: 37 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x32017645 + TX_LANE_MAP: 0x23106754 + RX_POLARITY_FLIP: 0x41 + TX_POLARITY_FLIP: 0x7d + ? + PC_PM_ID: 38 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x01324576 + TX_LANE_MAP: 0x10236754 + RX_POLARITY_FLIP: 0x3d + TX_POLARITY_FLIP: 0xc3 + ? + PC_PM_ID: 39 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x01324576 + TX_LANE_MAP: 0x10236754 + RX_POLARITY_FLIP: 0x3d + TX_POLARITY_FLIP: 0x83 + ? + PC_PM_ID: 40 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x01324576 + TX_LANE_MAP: 0x10236754 + RX_POLARITY_FLIP: 0x3d + TX_POLARITY_FLIP: 0x27 + ? + PC_PM_ID: 41 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x10235467 + TX_LANE_MAP: 0x01327645 + RX_POLARITY_FLIP: 0x3e + TX_POLARITY_FLIP: 0x43 + ? + PC_PM_ID: 42 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x10235467 + TX_LANE_MAP: 0x01327645 + RX_POLARITY_FLIP: 0x3e + TX_POLARITY_FLIP: 0x43 + ? + PC_PM_ID: 43 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x10235467 + TX_LANE_MAP: 0x01327645 + RX_POLARITY_FLIP: 0x3e + TX_POLARITY_FLIP: 0x43 + ? + PC_PM_ID: 44 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x10235467 + TX_LANE_MAP: 0x01327645 + RX_POLARITY_FLIP: 0x3e + TX_POLARITY_FLIP: 0x43 + ? + PC_PM_ID: 45 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x01324576 + TX_LANE_MAP: 0x10236754 + RX_POLARITY_FLIP: 0x3d + TX_POLARITY_FLIP: 0x83 + ? + PC_PM_ID: 46 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x01324576 + TX_LANE_MAP: 0x10236754 + RX_POLARITY_FLIP: 0x3d + TX_POLARITY_FLIP: 0x83 + ? + PC_PM_ID: 47 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x01324576 + TX_LANE_MAP: 0x10236754 + RX_POLARITY_FLIP: 0x3d + TX_POLARITY_FLIP: 0x83 + ? + PC_PM_ID: 48 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x01324576 + TX_LANE_MAP: 0x10236754 + RX_POLARITY_FLIP: 0x3d + TX_POLARITY_FLIP: 0x83 + ? + PC_PM_ID: 49 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x67542310 + TX_LANE_MAP: 0x45763201 + RX_POLARITY_FLIP: 0xbc + TX_POLARITY_FLIP: 0xc1 + ? + PC_PM_ID: 50 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x67542310 + TX_LANE_MAP: 0x45763201 + RX_POLARITY_FLIP: 0xbc + TX_POLARITY_FLIP: 0xc1 + ? + PC_PM_ID: 51 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x67542310 + TX_LANE_MAP: 0x45763201 + RX_POLARITY_FLIP: 0xbc + TX_POLARITY_FLIP: 0xc1 + ? + PC_PM_ID: 52 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x67542310 + TX_LANE_MAP: 0x45763201 + RX_POLARITY_FLIP: 0xbc + TX_POLARITY_FLIP: 0xc1 + ? + PC_PM_ID: 53 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x76453201 + TX_LANE_MAP: 0x54672310 + RX_POLARITY_FLIP: 0x7c + TX_POLARITY_FLIP: 0xc2 + ? + PC_PM_ID: 54 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x76453201 + TX_LANE_MAP: 0x54672310 + RX_POLARITY_FLIP: 0x7c + TX_POLARITY_FLIP: 0xc2 + ? + PC_PM_ID: 55 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x76453201 + TX_LANE_MAP: 0x54672310 + RX_POLARITY_FLIP: 0x7c + TX_POLARITY_FLIP: 0xc2 + ? + PC_PM_ID: 56 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x76453201 + TX_LANE_MAP: 0x54672310 + RX_POLARITY_FLIP: 0x7c + TX_POLARITY_FLIP: 0xc2 + ? + PC_PM_ID: 57 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x67542310 + TX_LANE_MAP: 0x45763201 + RX_POLARITY_FLIP: 0xbc + TX_POLARITY_FLIP: 0xe4 + ? + PC_PM_ID: 58 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x67542310 + TX_LANE_MAP: 0x45763201 + RX_POLARITY_FLIP: 0xbc + TX_POLARITY_FLIP: 0xc1 + ? + PC_PM_ID: 59 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x67542310 + TX_LANE_MAP: 0x45763201 + RX_POLARITY_FLIP: 0xbc + TX_POLARITY_FLIP: 0xc3 + ? + PC_PM_ID: 60 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x54671023 + TX_LANE_MAP: 0x45760132 + RX_POLARITY_FLIP: 0x82 + TX_POLARITY_FLIP: 0xbe + ? + PC_PM_ID: 61 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x56471203 + TX_LANE_MAP: 0x65742130 + RX_POLARITY_FLIP: 0X88 + TX_POLARITY_FLIP: 0XAA + ? + PC_PM_ID: 62 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x45760132 + TX_LANE_MAP: 0x54671023 + RX_POLARITY_FLIP: 0X44 + TX_POLARITY_FLIP: 0X77 + ? + PC_PM_ID: 63 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x56471203 + TX_LANE_MAP: 0x65742130 + RX_POLARITY_FLIP: 0X88 + TX_POLARITY_FLIP: 0XAA + ? + PC_PM_ID: 64 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x45760132 + TX_LANE_MAP: 0x54671023 + RX_POLARITY_FLIP: 0X44 + TX_POLARITY_FLIP: 0X77 +... + +--- +device: + 0: + PC_PORT_PHYS_MAP: + ? + PORT_ID: 1 + : + PC_PHYS_PORT_ID: 1 + ? + PORT_ID: 2 + : + PC_PHYS_PORT_ID: 9 + ? + PORT_ID: 11 + : + PC_PHYS_PORT_ID: 17 + ? + PORT_ID: 12 + : + PC_PHYS_PORT_ID: 25 + ? + PORT_ID: 22 + : + PC_PHYS_PORT_ID: 33 + ? + PORT_ID: 23 + : + PC_PHYS_PORT_ID: 41 + ? + PORT_ID: 33 + : + PC_PHYS_PORT_ID: 49 + ? + PORT_ID: 34 + : + PC_PHYS_PORT_ID: 57 + ? + PORT_ID: 44 + : + PC_PHYS_PORT_ID: 65 + ? + PORT_ID: 45 + : + PC_PHYS_PORT_ID: 73 + ? + PORT_ID: 55 + : + PC_PHYS_PORT_ID: 81 + ? + PORT_ID: 56 + : + PC_PHYS_PORT_ID: 89 + ? + PORT_ID: 66 + : + PC_PHYS_PORT_ID: 97 + ? + PORT_ID: 67 + : + PC_PHYS_PORT_ID: 105 + ? + PORT_ID: 77 + : + PC_PHYS_PORT_ID: 113 + ? + PORT_ID: 78 + : + PC_PHYS_PORT_ID: 121 + ? + PORT_ID: 88 + : + PC_PHYS_PORT_ID: 129 + ? + PORT_ID: 89 + : + PC_PHYS_PORT_ID: 137 + ? + PORT_ID: 99 + : + PC_PHYS_PORT_ID: 145 + ? + PORT_ID: 100 + : + PC_PHYS_PORT_ID: 153 + ? + PORT_ID: 110 + : + PC_PHYS_PORT_ID: 161 + ? + PORT_ID: 111 + : + PC_PHYS_PORT_ID: 169 + ? + PORT_ID: 121 + : + PC_PHYS_PORT_ID: 177 + ? + PORT_ID: 122 + : + PC_PHYS_PORT_ID: 185 + ? + PORT_ID: 132 + : + PC_PHYS_PORT_ID: 193 + ? + PORT_ID: 133 + : + PC_PHYS_PORT_ID: 201 + ? + PORT_ID: 143 + : + PC_PHYS_PORT_ID: 209 + ? + PORT_ID: 144 + : + PC_PHYS_PORT_ID: 217 + ? + PORT_ID: 154 + : + PC_PHYS_PORT_ID: 225 + ? + PORT_ID: 155 + : + PC_PHYS_PORT_ID: 233 + ? + PORT_ID: 165 + : + PC_PHYS_PORT_ID: 241 + ? + PORT_ID: 166 + : + PC_PHYS_PORT_ID: 249 + ? + PORT_ID: 176 + : + PC_PHYS_PORT_ID: 257 + ? + PORT_ID: 177 + : + PC_PHYS_PORT_ID: 265 + ? + PORT_ID: 187 + : + PC_PHYS_PORT_ID: 273 + ? + PORT_ID: 188 + : + PC_PHYS_PORT_ID: 281 + ? + PORT_ID: 198 + : + PC_PHYS_PORT_ID: 289 + ? + PORT_ID: 199 + : + PC_PHYS_PORT_ID: 297 + ? + PORT_ID: 209 + : + PC_PHYS_PORT_ID: 305 + ? + PORT_ID: 210 + : + PC_PHYS_PORT_ID: 313 + ? + PORT_ID: 220 + : + PC_PHYS_PORT_ID: 321 + ? + PORT_ID: 221 + : + PC_PHYS_PORT_ID: 329 + ? + PORT_ID: 231 + : + PC_PHYS_PORT_ID: 337 + ? + PORT_ID: 232 + : + PC_PHYS_PORT_ID: 345 + ? + PORT_ID: 242 + : + PC_PHYS_PORT_ID: 353 + ? + PORT_ID: 243 + : + PC_PHYS_PORT_ID: 361 + ? + PORT_ID: 253 + : + PC_PHYS_PORT_ID: 369 + ? + PORT_ID: 254 + : + PC_PHYS_PORT_ID: 377 + ? + PORT_ID: 264 + : + PC_PHYS_PORT_ID: 385 + ? + PORT_ID: 265 + : + PC_PHYS_PORT_ID: 393 + ? + PORT_ID: 275 + : + PC_PHYS_PORT_ID: 401 + ? + PORT_ID: 276 + : + PC_PHYS_PORT_ID: 409 + ? + PORT_ID: 286 + : + PC_PHYS_PORT_ID: 417 + ? + PORT_ID: 287 + : + PC_PHYS_PORT_ID: 425 + ? + PORT_ID: 297 + : + PC_PHYS_PORT_ID: 433 + ? + PORT_ID: 298 + : + PC_PHYS_PORT_ID: 441 + ? + PORT_ID: 308 + : + PC_PHYS_PORT_ID: 449 + ? + PORT_ID: 309 + : + PC_PHYS_PORT_ID: 457 + ? + PORT_ID: 319 + : + PC_PHYS_PORT_ID: 465 + ? + PORT_ID: 320 + : + PC_PHYS_PORT_ID: 473 + ? + PORT_ID: 330 + : + PC_PHYS_PORT_ID: 481 + ? + PORT_ID: 331 + : + PC_PHYS_PORT_ID: 489 + ? + PORT_ID: 341 + : + PC_PHYS_PORT_ID: 497 + ? + PORT_ID: 342 + : + PC_PHYS_PORT_ID: 505 +... +--- +device: + 0: + PC_PORT: + ? + PORT_ID: [1, 2, 11, 12, 22, 23, 33, 34, 44, 45, 55, 56, 66, 67, 77, 78, 88, 89, 99, 100, 110, 111, 121, 122, 132, 133, 143, 144, 154, 155, 165, 166, 176, 177, 187, 188, 198, 199, 209, 210, 220, 221, 231, 232, 242, 243, 253, 254, 264, 265, 275, 276, 286, 287, 297, 298, 308, 309, 319, 320, 330, 331, 341, 342] + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 +... +--- +device: + 0: + PC_TX_TAPS: + ? + PORT_ID: [1, 2, 11, 12, 22, 23, 33, 34, 44, 45, 55, 56, 66, 67, 77, 78, 88, 89, 99, 100, 110, 111, 121, 122, 132, 133, 143, 144, 154, 155, 165, 166, 176, 177, 187, 188, 198, 199, 209, 210, 220, 221, 231, 232, 242, 243, 253, 254, 264, 265, 275, 276, 286, 287, 297, 298, 308, 309, 319, 320, 330, 331, 341, 342] + LANE_INDEX: [[0,7]] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_SIG_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TXFIR_TAP_MODE_AUTO: 0 + TX_PRE3_SIGN: 0 + TX_PRE3: 0 + TX_PRE3_AUTO: 0 + TX_PRE2_SIGN: 0 + TX_PRE2: 1 + TX_PRE2_AUTO: 0 + TX_PRE_SIGN: 1 + TX_PRE: 8 + TX_PRE_AUTO: 0 + TX_MAIN: 80 + TX_MAIN_AUTO: 0 + TX_POST_SIGN: 1 + TX_POST: 4 + TX_POST_AUTO: 0 + TX_POST2_SIGN: 1 + TX_POST2: 1 + TX_POST2_AUTO: 0 + TX_POST3_SIGN: 0 + TX_POST3: 0 + TX_POST3_AUTO: 0 +... \ No newline at end of file diff --git a/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/custom_led.bin b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/custom_led.bin new file mode 100644 index 00000000000..51d43d12aaa Binary files /dev/null and b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/custom_led.bin differ diff --git a/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/default_sku b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/default_sku new file mode 100644 index 00000000000..4b05a0118f3 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/default_sku @@ -0,0 +1 @@ +M2-W6940-128X1-FR4 l2 diff --git a/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/dev.xml b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/dev.xml new file mode 100644 index 00000000000..ff340ba5dff --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/dev.xml @@ -0,0 +1,1192 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + 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b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/dev_0x40d9_v01_ac.xml new file mode 100644 index 00000000000..7d26a8c00ab --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/dev_0x40d9_v01_ac.xml @@ -0,0 +1,1655 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + 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decodeLength(value): + a = bitarray(8) + a.setall(True) + a[0:1] = 0 + a[1:2] = 0 + x = ord(a.tobytes()) + return x & ord(value) + + @staticmethod + def minToData(): + starttime = datetime(1996, 1, 1, 0, 0, 0) + endtime = datetime.now() + seconds = (endtime - starttime).total_seconds() + mins = seconds // 60 + m = int(round(mins)) + return m + + @staticmethod + def getTimeFormat(): + return datetime.now().strftime('%Y-%m-%d') + + @staticmethod + def getTypeLength(value): + if value is None or len(value) == 0: + return 0 + a = bitarray(8) + a.setall(False) + a[0:1] = 1 + a[1:2] = 1 + x = ord(a.tobytes()) + return x | len(value) + + @staticmethod + def checksum(b): + result = 0 + for item in b: + result += ord(item) + return (0x100 - (result & 0xff)) & 0xff + + +class BaseArea(object): + SUGGESTED_SIZE_COMMON_HEADER = 8 + SUGGESTED_SIZE_INTERNAL_USE_AREA = 72 + SUGGESTED_SIZE_CHASSIS_INFO_AREA = 32 + SUGGESTED_SIZE_BOARD_INFO_AREA = 80 + SUGGESTED_SIZE_PRODUCT_INFO_AREA = 80 + + INITVALUE = b'\x00' + resultvalue = INITVALUE * 256 + COMMON_HEAD_VERSION = b'\x01' + __childList = None + + def __init__(self, name="", size=0, offset=0): + self.__childList = [] + self._offset = offset + self.name = name + self._size = size + self._isPresent = False + self._data = b'\x00' * size + + @property + def childList(self): + return self.__childList + + @childList.setter + def childList(self, value): + self.__childList = value + + @property + def offset(self): + return self._offset + + @offset.setter + def offset(self, value): + self._offset = value + + @property + def size(self): + return self._size + + @size.setter + def size(self, value): + self._size = value + + @property + def data(self): + return self._data + + @data.setter + def data(self, value): + self._data = value + + @property + def isPresent(self): + return self._isPresent + + @isPresent.setter + def isPresent(self, value): + self._isPresent = value + + +class InternalUseArea(BaseArea): + pass + + +class ChassisInfoArea(BaseArea): + pass + + +class BoardInfoArea(BaseArea): + _boardTime = None + _fields = None + _mfg_date = None + areaversion = None + _boardversion = None + _language = None + + def __str__(self): + formatstr = "version : %x\n" \ + "length : %d \n" \ + "language : %x \n" \ + "mfg_date : %s \n" \ + "boardManufacturer : %s \n" \ + "boardProductName : %s \n" \ + "boardSerialNumber : %s \n" \ + "boardPartNumber : %s \n" \ + "fruFileId : %s \n" + + tmpstr = formatstr % (ord(self.boardversion), self.size, + self.language, self.getMfgRealData(), + self.boardManufacturer, self.boardProductName, + self.boardSerialNumber, self.boardPartNumber, + self.fruFileId) + for i in range(1, 11): + valtmp = "boardextra%d" % i + if hasattr(self, valtmp): + valtmpval = getattr(self, valtmp) + tmpstr += "boardextra%d : %s \n" % (i, valtmpval) + else: + break + + return tmpstr + + def todict(self): + dic = collections.OrderedDict() + dic["boardversion"] = ord(self.boardversion) + dic["boardlength"] = self.size + dic["boardlanguage"] = self.language + dic["boardmfg_date"] = self.getMfgRealData() + dic["boardManufacturer"] = self.boardManufacturer + dic["boardProductName"] = self.boardProductName + dic["boardSerialNumber"] = self.boardSerialNumber + dic["boardPartNumber"] = self.boardPartNumber + dic["boardfruFileId"] = self.fruFileId + for i in range(1, 11): + valtmp = "boardextra%d" % i + if hasattr(self, valtmp): + valtmpval = getattr(self, valtmp) + dic[valtmp] = valtmpval + else: + break + return dic + + def decodedata(self): + index = 0 + self.areaversion = self.data[index] + index += 1 + d_print("decode length :%d class size:%d" % + ((ord(self.data[index]) * 8), self.size)) + index += 2 + + timetmp = self.data[index: index + 3] + self.mfg_date = ord(timetmp[0]) | ( + ord(timetmp[1]) << 8) | (ord(timetmp[2]) << 16) + d_print("decode getMfgRealData :%s" % self.getMfgRealData()) + index += 3 + + templen = FruUtil.decodeLength(self.data[index]) + self.boardManufacturer = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode boardManufacturer:%s" % self.boardManufacturer) + + templen = FruUtil.decodeLength(self.data[index]) + self.boardProductName = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode boardProductName:%s" % self.boardProductName) + + templen = FruUtil.decodeLength(self.data[index]) + self.boardSerialNumber = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode boardSerialNumber:%s" % self.boardSerialNumber) + + templen = FruUtil.decodeLength(self.data[index]) + self.boardPartNumber = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode boardPartNumber:%s" % self.boardPartNumber) + + templen = FruUtil.decodeLength(self.data[index]) + self.fruFileId = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode fruFileId:%s" % self.fruFileId) + + for i in range(1, 11): + valtmp = "boardextra%d" % i + if self.data[index] != chr(0xc1): + templen = FruUtil.decodeLength(self.data[index]) + tmpval = self.data[index + 1: index + templen + 1] + setattr(self, valtmp, tmpval) + index += templen + 1 + d_print("decode boardextra%d:%s" % (i, tmpval)) + else: + break + + def fruSetValue(self, field, value): + tmp_field = getattr(self, field, None) + if tmp_field is not None: + setattr(self, field, value) + + def recalcute(self): + d_print("boardInfoArea version:%x" % ord(self.boardversion)) + d_print("boardInfoArea length:%d" % self.size) + d_print("boardInfoArea language:%x" % self.language) + self.mfg_date = FruUtil.minToData() + d_print("boardInfoArea mfg_date:%x" % self.mfg_date) + + self.data = chr(ord(self.boardversion)) + \ + chr(self.size // 8) + chr(self.language) + + self.data += chr(self.mfg_date & 0xFF) + self.data += chr((self.mfg_date >> 8) & 0xFF) + self.data += chr((self.mfg_date >> 16) & 0xFF) + + d_print("boardInfoArea boardManufacturer:%s" % self.boardManufacturer) + typelength = FruUtil.getTypeLength(self.boardManufacturer) + self.data += chr(typelength) + self.data += self.boardManufacturer + + d_print("boardInfoArea boardProductName:%s" % self.boardProductName) + self.data += chr(FruUtil.getTypeLength(self.boardProductName)) + self.data += self.boardProductName + + d_print("boardInfoArea boardSerialNumber:%s" % self.boardSerialNumber) + self.data += chr(FruUtil.getTypeLength(self.boardSerialNumber)) + self.data += self.boardSerialNumber + + d_print("boardInfoArea boardPartNumber:%s" % self.boardPartNumber) + self.data += chr(FruUtil.getTypeLength(self.boardPartNumber)) + self.data += self.boardPartNumber + + d_print("boardInfoArea fruFileId:%s" % self.fruFileId) + self.data += chr(FruUtil.getTypeLength(self.fruFileId)) + self.data += self.fruFileId + + for i in range(1, 11): + valtmp = "boardextra%d" % i + if hasattr(self, valtmp): + valtmpval = getattr(self, valtmp) + d_print("boardInfoArea boardextra%d:%s" % (i, valtmpval)) + self.data += chr(FruUtil.getTypeLength(valtmpval)) + if valtmpval is not None: + self.data += valtmpval + else: + break + + self.data += chr(0xc1) + + if len(self.data) > (self.size - 1): + incr = (len(self.data) - self.size) // 8 + 1 + self.size += incr * 8 + + self.data = self.data[0:1] + chr(self.size // 8) + self.data[2:] + d_print("self data:%d" % len(self.data)) + d_print("self size:%d" % self.size) + d_print("adjust size:%d" % (self.size - len(self.data) - 1)) + self.data = self.data.ljust((self.size - 1), chr(self.INITVALUE[0])) + + # checksum + checksum = FruUtil.checksum(self.data) + d_print("board info checksum:%x" % checksum) + self.data += chr(checksum) + + def getMfgRealData(self): + starttime = datetime(1996, 1, 1, 0, 0, 0) + mactime = starttime + timedelta(minutes=self.mfg_date) + return mactime + + @property + def language(self): + self._language = 25 + return self._language + + @property + def mfg_date(self): + return self._mfg_date + + @mfg_date.setter + def mfg_date(self, val): + self._mfg_date = val + + @property + def boardversion(self): + self._boardversion = self.COMMON_HEAD_VERSION + return self._boardversion + + @property + def fruFileId(self): + return self._FRUFileID + + @fruFileId.setter + def fruFileId(self, val): + self._FRUFileID = val + + @property + def boardPartNumber(self): + return self._boardPartNumber + + @boardPartNumber.setter + def boardPartNumber(self, val): + self._boardPartNumber = val + + @property + def boardSerialNumber(self): + return self._boardSerialNumber + + @boardSerialNumber.setter + def boardSerialNumber(self, val): + self._boardSerialNumber = val + + @property + def boardProductName(self): + return self._boradProductName + + @boardProductName.setter + def boardProductName(self, val): + self._boradProductName = val + + @property + def boardManufacturer(self): + return self._boardManufacturer + + @boardManufacturer.setter + def boardManufacturer(self, val): + self._boardManufacturer = val + + @property + def boardTime(self): + return self._boardTime + + @boardTime.setter + def boardTime(self, val): + self._boardTime = val + + @property + def fields(self): + return self._fields + + @fields.setter + def fields(self, val): + self._fields = val + + +class ProductInfoArea(BaseArea): + _productManufacturer = None + _productAssetTag = None + _FRUFileID = None + _language = None + + def __str__(self): + formatstr = "version : %x\n" \ + "length : %d \n" \ + "language : %x \n" \ + "productManufacturer : %s \n" \ + "productName : %s \n" \ + "productPartModelName: %s \n" \ + "productVersion : %s \n" \ + "productSerialNumber : %s \n" \ + "productAssetTag : %s \n" \ + "fruFileId : %s \n" + + tmpstr = formatstr % (ord(self.areaversion), self.size, + self.language, self.productManufacturer, + self.productName, self.productPartModelName, + self.productVersion, self.productSerialNumber, + self.productAssetTag, self.fruFileId) + + for i in range(1, 11): + valtmp = "productextra%d" % i + if hasattr(self, valtmp): + valtmpval = getattr(self, valtmp) + tmpstr += "productextra%d : %s \n" % (i, valtmpval) + else: + break + + return tmpstr + + def todict(self): + dic = collections.OrderedDict() + dic["productversion"] = ord(self.areaversion) + dic["productlength"] = self.size + dic["productlanguage"] = self.language + dic["productManufacturer"] = self.productManufacturer + dic["productName"] = self.productName + dic["productPartModelName"] = self.productPartModelName + dic["productVersion"] = int(self.productVersion, 16) + dic["productSerialNumber"] = self.productSerialNumber + dic["productAssetTag"] = self.productAssetTag + dic["productfruFileId"] = self.fruFileId + for i in range(1, 11): + valtmp = "productextra%d" % i + if hasattr(self, valtmp): + valtmpval = getattr(self, valtmp) + dic[valtmp] = valtmpval + else: + break + return dic + + def decodedata(self): + index = 0 + self.areaversion = self.data[index] # 0 + index += 1 + d_print("decode length %d" % (ord(self.data[index]) * 8)) + d_print("class size %d" % self.size) + index += 2 + + templen = FruUtil.decodeLength(self.data[index]) + self.productManufacturer = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode productManufacturer:%s" % self.productManufacturer) + + templen = FruUtil.decodeLength(self.data[index]) + self.productName = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode productName:%s" % self.productName) + + templen = FruUtil.decodeLength(self.data[index]) + self.productPartModelName = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode productPartModelName:%s" % self.productPartModelName) + + templen = FruUtil.decodeLength(self.data[index]) + self.productVersion = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode productVersion:%s" % self.productVersion) + + templen = FruUtil.decodeLength(self.data[index]) + self.productSerialNumber = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode productSerialNumber:%s" % self.productSerialNumber) + + templen = FruUtil.decodeLength(self.data[index]) + self.productAssetTag = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode productAssetTag:%s" % self.productAssetTag) + + templen = FruUtil.decodeLength(self.data[index]) + self.fruFileId = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode fruFileId:%s" % self.fruFileId) + + for i in range(1, 11): + valtmp = "productextra%d" % i + if self.data[index] != chr(0xc1) and index < self.size - 1: + templen = FruUtil.decodeLength(self.data[index]) + if templen == 0: + break + tmpval = self.data[index + 1: index + templen + 1] + d_print("decode boardextra%d:%s" % (i, tmpval)) + setattr(self, valtmp, tmpval) + index += templen + 1 + else: + break + + @property + def productVersion(self): + return self._productVersion + + @productVersion.setter + def productVersion(self, name): + self._productVersion = name + + @property + def areaversion(self): + self._areaversion = self.COMMON_HEAD_VERSION + return self._areaversion + + @areaversion.setter + def areaversion(self, name): + self._areaversion = name + + @property + def language(self): + self._language = 25 + return self._language + + @property + def productManufacturer(self): + return self._productManufacturer + + @productManufacturer.setter + def productManufacturer(self, name): + self._productManufacturer = name + + @property + def productName(self): + return self._productName + + @productName.setter + def productName(self, name): + self._productName = name + + @property + def productPartModelName(self): + return self._productPartModelName + + @productPartModelName.setter + def productPartModelName(self, name): + self._productPartModelName = name + + @property + def productSerialNumber(self): + return self._productSerialNumber + + @productSerialNumber.setter + def productSerialNumber(self, name): + self._productSerialNumber = name + + @property + def productAssetTag(self): + return self._productAssetTag + + @productAssetTag.setter + def productAssetTag(self, name): + self._productAssetTag = name + + @property + def fruFileId(self): + return self._FRUFileID + + @fruFileId.setter + def fruFileId(self, name): + self._FRUFileID = name + + def fruSetValue(self, field, value): + tmp_field = getattr(self, field, None) + if tmp_field is not None: + setattr(self, field, value) + + def recalcute(self): + d_print("product version:%x" % ord(self.areaversion)) + d_print("product length:%d" % self.size) + d_print("product language:%x" % self.language) + self.data = chr(ord(self.areaversion)) + \ + chr(self.size // 8) + chr(self.language) + + typelength = FruUtil.getTypeLength(self.productManufacturer) + self.data += chr(typelength) + self.data += self.productManufacturer + + self.data += chr(FruUtil.getTypeLength(self.productName)) + self.data += self.productName + + self.data += chr(FruUtil.getTypeLength(self.productPartModelName)) + self.data += self.productPartModelName + + self.data += chr(FruUtil.getTypeLength(self.productVersion)) + self.data += self.productVersion + + self.data += chr(FruUtil.getTypeLength(self.productSerialNumber)) + self.data += self.productSerialNumber + + self.data += chr(FruUtil.getTypeLength(self.productAssetTag)) + if self.productAssetTag is not None: + self.data += self.productAssetTag + + self.data += chr(FruUtil.getTypeLength(self.fruFileId)) + self.data += self.fruFileId + + for i in range(1, 11): + valtmp = "productextra%d" % i + if hasattr(self, valtmp): + valtmpval = getattr(self, valtmp) + d_print("boardInfoArea productextra%d:%s" % (i, valtmpval)) + self.data += chr(FruUtil.getTypeLength(valtmpval)) + if valtmpval is not None: + self.data += valtmpval + else: + break + + self.data += chr(0xc1) + if len(self.data) > (self.size - 1): + incr = (len(self.data) - self.size) // 8 + 1 + self.size += incr * 8 + d_print("self.data:%d" % len(self.data)) + d_print("self.size:%d" % self.size) + + self.data = self.data[0:1] + chr(self.size // 8) + self.data[2:] + self.data = self.data.ljust((self.size - 1), chr(self.INITVALUE[0])) + checksum = FruUtil.checksum(self.data) + d_print("board info checksum:%x" % checksum) + self.data += chr(checksum) + + +class MultiRecordArea(BaseArea): + pass + + +class Field(object): + + def __init__(self, fieldType="ASCII", fieldData=""): + self.fieldData = fieldData + self.fieldType = fieldType + + @property + def fieldType(self): + return self.fieldType + + @property + def fieldData(self): + return self.fieldData + + +class ipmifru(BaseArea): + _BoardInfoArea = None + _ProductInfoArea = None + _InternalUseArea = None + _ChassisInfoArea = None + _multiRecordArea = None + _productinfoAreaOffset = BaseArea.INITVALUE + _boardInfoAreaOffset = BaseArea.INITVALUE + _internalUserAreaOffset = BaseArea.INITVALUE + _chassicInfoAreaOffset = BaseArea.INITVALUE + _multiRecordAreaOffset = BaseArea.INITVALUE + _bindata = None + _bodybin = None + _version = BaseArea.COMMON_HEAD_VERSION + _zeroCheckSum = None + _frusize = 256 + + def __str__(self): + tmpstr = "" + if self.boardInfoArea.isPresent: + tmpstr += "\nboardinfoarea: \n" + tmpstr += self.boardInfoArea.__str__() + if self.productInfoArea.isPresent: + tmpstr += "\nproductinfoarea: \n" + tmpstr += self.productInfoArea.__str__() + return tmpstr + + def decodeBin(self, eeprom): + commonHead = eeprom[0:8] + d_print("decode version %x" % ord(commonHead[0])) + if ord(self.COMMON_HEAD_VERSION) != ord(commonHead[0]): + raise FruException("HEAD VERSION error,not Fru format!", -10) + if FruUtil.checksum(commonHead[0:7]) != ord(commonHead[7]): + strtemp = "check header checksum error [cal:%02x data:%02x]" % ( + FruUtil.checksum(commonHead[0:7]), ord(commonHead[7])) + raise FruException(strtemp, -3) + if ord(commonHead[1]) != ord(self.INITVALUE): + d_print("Internal Use Area is present") + self.internalUseArea = InternalUseArea( + name="Internal Use Area", size=self.SUGGESTED_SIZE_INTERNAL_USE_AREA) + self.internalUseArea.isPresent = True + self.internalUserAreaOffset = ord(commonHead[1]) + self.internalUseArea.data = eeprom[self.internalUserAreaOffset * 8: ( + self.internalUserAreaOffset * 8 + self.internalUseArea.size)] + if ord(commonHead[2]) != ord(self.INITVALUE): + d_print("Chassis Info Area is present") + self.chassisInfoArea = ChassisInfoArea( + name="Chassis Info Area", size=self.SUGGESTED_SIZE_CHASSIS_INFO_AREA) + self.chassisInfoArea.isPresent = True + self.chassicInfoAreaOffset = ord(commonHead[2]) + self.chassisInfoArea.data = eeprom[self.chassicInfoAreaOffset * 8: ( + self.chassicInfoAreaOffset * 8 + self.chassisInfoArea.size)] + if ord(commonHead[3]) != ord(self.INITVALUE): + self.boardInfoArea = BoardInfoArea( + name="Board Info Area", size=self.SUGGESTED_SIZE_BOARD_INFO_AREA) + self.boardInfoArea.isPresent = True + self.boardInfoAreaOffset = ord(commonHead[3]) + self.boardInfoArea.size = ord( + eeprom[self.boardInfoAreaOffset * 8 + 1]) * 8 + d_print("Board Info Area is present size:%d" % + (self.boardInfoArea.size)) + self.boardInfoArea.data = eeprom[self.boardInfoAreaOffset * 8: ( + self.boardInfoAreaOffset * 8 + self.boardInfoArea.size)] + if FruUtil.checksum(self.boardInfoArea.data[:-1]) != ord(self.boardInfoArea.data[-1:]): + strtmp = "check boardInfoArea checksum error[cal:%02x data:%02x]" % \ + (FruUtil.checksum( + self.boardInfoArea.data[:-1]), ord(self.boardInfoArea.data[-1:])) + raise FruException(strtmp, -3) + self.boardInfoArea.decodedata() + if ord(commonHead[4]) != ord(self.INITVALUE): + d_print("Product Info Area is present") + self.productInfoArea = ProductInfoArea( + name="Product Info Area ", size=self.SUGGESTED_SIZE_PRODUCT_INFO_AREA) + self.productInfoArea.isPresent = True + self.productinfoAreaOffset = ord(commonHead[4]) + d_print("length offset value: %02x" % + ord(eeprom[self.productinfoAreaOffset * 8 + 1])) + self.productInfoArea.size = ord( + eeprom[self.productinfoAreaOffset * 8 + 1]) * 8 + d_print("Product Info Area is present size:%d" % + (self.productInfoArea.size)) + + self.productInfoArea.data = eeprom[self.productinfoAreaOffset * 8: ( + self.productinfoAreaOffset * 8 + self.productInfoArea.size)] + if FruUtil.checksum(self.productInfoArea.data[:-1]) != ord(self.productInfoArea.data[-1:]): + strtmp = "check productInfoArea checksum error [cal:%02x data:%02x]" % ( + FruUtil.checksum(self.productInfoArea.data[:-1]), ord(self.productInfoArea.data[-1:])) + raise FruException(strtmp, -3) + self.productInfoArea.decodedata() + if ord(commonHead[5]) != ord(self.INITVALUE): + self.multiRecordArea = MultiRecordArea( + name="MultiRecord record Area ") + d_print("MultiRecord record present") + self.multiRecordArea.isPresent = True + self.multiRecordAreaOffset = ord(commonHead[5]) + self.multiRecordArea.data = eeprom[self.multiRecordAreaOffset * 8: ( + self.multiRecordAreaOffset * 8 + self.multiRecordArea.size)] + + def initDefault(self): + self.version = self.COMMON_HEAD_VERSION + self.internalUserAreaOffset = self.INITVALUE + self.chassicInfoAreaOffset = self.INITVALUE + self.boardInfoAreaOffset = self.INITVALUE + self.productinfoAreaOffset = self.INITVALUE + self.multiRecordAreaOffset = self.INITVALUE + self.zeroCheckSum = self.INITVALUE + self.offset = self.SUGGESTED_SIZE_COMMON_HEADER + self.productInfoArea = None + self.internalUseArea = None + self.boardInfoArea = None + self.chassisInfoArea = None + self.multiRecordArea = None + # self.recalcute() + + @property + def version(self): + return self._version + + @version.setter + def version(self, name): + self._version = name + + @property + def internalUserAreaOffset(self): + return self._internalUserAreaOffset + + @internalUserAreaOffset.setter + def internalUserAreaOffset(self, obj): + self._internalUserAreaOffset = obj + + @property + def chassicInfoAreaOffset(self): + return self._chassicInfoAreaOffset + + @chassicInfoAreaOffset.setter + def chassicInfoAreaOffset(self, obj): + self._chassicInfoAreaOffset = obj + + @property + def productinfoAreaOffset(self): + return self._productinfoAreaOffset + + @productinfoAreaOffset.setter + def productinfoAreaOffset(self, obj): + self._productinfoAreaOffset = obj + + @property + def boardInfoAreaOffset(self): + return self._boardInfoAreaOffset + + @boardInfoAreaOffset.setter + def boardInfoAreaOffset(self, obj): + self._boardInfoAreaOffset = obj + + @property + def multiRecordAreaOffset(self): + return self._multiRecordAreaOffset + + @multiRecordAreaOffset.setter + def multiRecordAreaOffset(self, obj): + self._multiRecordAreaOffset = obj + + @property + def zeroCheckSum(self): + return self._zeroCheckSum + + @zeroCheckSum.setter + def zeroCheckSum(self, obj): + self._zeroCheckSum = obj + + @property + def productInfoArea(self): + return self._ProductInfoArea + + @productInfoArea.setter + def productInfoArea(self, obj): + self._ProductInfoArea = obj + + @property + def internalUseArea(self): + return self._InternalUseArea + + @internalUseArea.setter + def internalUseArea(self, obj): + self.internalUseArea = obj + + @property + def boardInfoArea(self): + return self._BoardInfoArea + + @boardInfoArea.setter + def boardInfoArea(self, obj): + self._BoardInfoArea = obj + + @property + def chassisInfoArea(self): + return self._ChassisInfoArea + + @chassisInfoArea.setter + def chassisInfoArea(self, obj): + self._ChassisInfoArea = obj + + @property + def multiRecordArea(self): + return self._multiRecordArea + + @multiRecordArea.setter + def multiRecordArea(self, obj): + self._multiRecordArea = obj + + @property + def bindata(self): + return self._bindata + + @bindata.setter + def bindata(self, obj): + self._bindata = obj + + @property + def bodybin(self): + return self._bodybin + + @bodybin.setter + def bodybin(self, obj): + self._bodybin = obj + + def recalcuteCommonHead(self): + self.bindata = "" + self.offset = self.SUGGESTED_SIZE_COMMON_HEADER + d_print("common Header %d" % self.offset) + d_print("fru eeprom size %d" % self._frusize) + if self.internalUseArea is not None and self.internalUseArea.isPresent: + self.internalUserAreaOffset = self.offset // 8 + self.offset += self.internalUseArea.size + d_print("internalUseArea is present offset:%d" % self.offset) + + if self.chassisInfoArea is not None and self.chassisInfoArea.isPresent: + self.chassicInfoAreaOffset = self.offset // 8 + self.offset += self.chassisInfoArea.size + d_print("chassisInfoArea is present offset:%d" % self.offset) + + if self.boardInfoArea is not None and self.boardInfoArea.isPresent: + self.boardInfoAreaOffset = self.offset // 8 + self.offset += self.boardInfoArea.size + d_print("boardInfoArea is present offset:%d" % self.offset) + d_print("boardInfoArea is present size:%d" % + self.boardInfoArea.size) + + if self.productInfoArea is not None and self.productInfoArea.isPresent: + self.productinfoAreaOffset = self.offset // 8 + self.offset += self.productInfoArea.size + d_print("productInfoArea is present offset:%d" % self.offset) + + if self.multiRecordArea is not None and self.multiRecordArea.isPresent: + self.multiRecordAreaOffset = self.offset // 8 + d_print("multiRecordArea is present offset:%d" % self.offset) + + if self.internalUserAreaOffset == self.INITVALUE: + self.internalUserAreaOffset = 0 + if self.productinfoAreaOffset == self.INITVALUE: + self.productinfoAreaOffset = 0 + if self.chassicInfoAreaOffset == self.INITVALUE: + self.chassicInfoAreaOffset = 0 + if self.boardInfoAreaOffset == self.INITVALUE: + self.boardInfoAreaOffset = 0 + if self.multiRecordAreaOffset == self.INITVALUE: + self.multiRecordAreaOffset = 0 + + self.zeroCheckSum = (0x100 - ord(self.version) - self.internalUserAreaOffset - self.chassicInfoAreaOffset - self.productinfoAreaOffset + - self.boardInfoAreaOffset - self.multiRecordAreaOffset) & 0xff + d_print("zerochecksum:%x" % self.zeroCheckSum) + self.data = "" + self.data += chr(self.version[0]) + chr(self.internalUserAreaOffset) + chr(self.chassicInfoAreaOffset) + chr( + self.boardInfoAreaOffset) + chr(self.productinfoAreaOffset) + chr(self.multiRecordAreaOffset) + chr(self.INITVALUE[0]) + chr(self.zeroCheckSum) + + self.bindata = self.data + self.bodybin + totallen = len(self.bindata) + d_print("totallen %d" % totallen) + if totallen < self._frusize: + self.bindata = self.bindata.ljust(self._frusize, chr(self.INITVALUE[0])) + else: + raise FruException('bin data more than %d' % self._frusize, -2) + + def recalcutebin(self): + self.bodybin = "" + if self.internalUseArea is not None and self.internalUseArea.isPresent: + d_print("internalUseArea present") + self.bodybin += self.internalUseArea.data + if self.chassisInfoArea is not None and self.chassisInfoArea.isPresent: + d_print("chassisInfoArea present") + self.bodybin += self.chassisInfoArea.data + if self.boardInfoArea is not None and self.boardInfoArea.isPresent: + d_print("boardInfoArea present") + self.boardInfoArea.recalcute() + self.bodybin += self.boardInfoArea.data + if self.productInfoArea is not None and self.productInfoArea.isPresent: + d_print("productInfoAreapresent") + self.productInfoArea.recalcute() + self.bodybin += self.productInfoArea.data + if self.multiRecordArea is not None and self.multiRecordArea.isPresent: + d_print("multiRecordArea present") + self.bodybin += self.productInfoArea.data + + def recalcute(self, fru_eeprom_size=256): + self._frusize = fru_eeprom_size + self.recalcutebin() + self.recalcuteCommonHead() + + def setValue(self, area, field, value): + tmp_area = getattr(self, area, None) + if tmp_area is not None: + tmp_area.fruSetValue(field, value) diff --git a/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/installer.conf b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/installer.conf new file mode 100644 index 00000000000..eb8083bba3b --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/installer.conf @@ -0,0 +1,5 @@ +CONSOLE_SPEED=9600 +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="intel_idle.max_cstate=0 idle=poll intel_iommu=on iommu=pt modprobe.blacklist=ice,mei_me,i2c_i801,i2c_ismt" +CONSOLE_PORT=0x5060 +CONSOLE_DEV=0 +ONIE_IMAGE_PART_SIZE=1048576 \ No newline at end of file diff --git a/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/led_proc_init.soc b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/led_proc_init.soc new file mode 100644 index 00000000000..98cde1198fe --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/led_proc_init.soc @@ -0,0 +1,7 @@ +led load /usr/share/sonic/platform/custom_led.bin + +led auto on + +led start + +linkscan SwPortBitMap=xe,ce,cd,d3c diff --git a/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/monitor.py b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/monitor.py new file mode 100755 index 00000000000..4ae37a51b5d --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/monitor.py @@ -0,0 +1,415 @@ +#!/usr/bin/python3 +# * onboard temperature sensors +# * FAN trays +# * PSU +# +import os +import re +from lxml import etree as ET +import glob +import json +from decimal import Decimal +from fru import ipmifru +from plat_hal.interface import interface + +int_case = interface() +MAILBOX_DIR = "/sys/bus/i2c/devices/" +BOARD_ID_PATH = "/sys/module/platform_common/parameters/dfd_my_type" +BOARD_AIRFLOW_PATH = "/etc/sonic/.airflow" +SUB_VERSION_FILE = "/etc/sonic/.subversion" + + +CONFIG_NAME = "dev.xml" + + +def byteTostr(val): + strtmp = '' + for value in val: + strtmp += chr(value) + return strtmp + + +def typeTostr(val): + if isinstance(val, bytes): + strtmp = byteTostr(val) + return strtmp + return val + + +def get_board_id(): + if not os.path.exists(BOARD_ID_PATH): + return "NA" + with open(BOARD_ID_PATH) as fd: + id_str = fd.read().strip() + return "0x%x" % (int(id_str, 10)) + + +def getboardairflow(): + if not os.path.exists(BOARD_AIRFLOW_PATH): + return "NA" + with open(BOARD_AIRFLOW_PATH) as fd: + airflow_str = fd.read().strip() + data = json.loads(airflow_str) + airflow = data.get("board", "NA") + return airflow + + +def get_sub_version(): + if not os.path.exists(SUB_VERSION_FILE): + return "NA" + with open(SUB_VERSION_FILE) as fd: + sub_ver = fd.read().strip() + return sub_ver + + +boardid = get_board_id() +boardairflow = getboardairflow() +sub_ver = (get_sub_version()).replace("-", "_") + + +DEV_XML_FILE_LIST = [ + "dev_" + boardid + "_" + sub_ver + "_" + boardairflow + ".xml", + "dev_" + boardid + "_" + sub_ver + ".xml", + "dev_" + boardid + "_" + boardairflow + ".xml", + "dev_" + boardid + ".xml", + "dev_" + boardairflow + ".xml", +] + + +def dev_file_read(path, offset, read_len): + retval = "ERR" + val_list = [] + msg = "" + ret = "" + fd = -1 + + if not os.path.exists(path): + return False, "%s %s not found" % (retval, path) + + try: + fd = os.open(path, os.O_RDONLY) + os.lseek(fd, offset, os.SEEK_SET) + ret = os.read(fd, read_len) + for item in ret: + val_list.append(item) + except Exception as e: + msg = str(e) + return False, "%s %s" % (retval, msg) + finally: + if fd > 0: + os.close(fd) + return True, val_list + + +def getPMCreg(location): + retval = 'ERR' + if not os.path.isfile(location): + return "%s %s notfound" % (retval, location) + try: + with open(location, 'r') as fd: + retval = fd.read() + except Exception as error: + return "ERR %s" % str(error) + + retval = retval.rstrip('\r\n') + retval = retval.lstrip(" ") + return retval + + +# Get a mailbox register +def get_pmc_register(reg_name): + retval = 'ERR' + mb_reg_file = reg_name + filepath = glob.glob(mb_reg_file) + if len(filepath) == 0: + return "%s %s notfound" % (retval, mb_reg_file) + mb_reg_file = filepath[0] + if not os.path.isfile(mb_reg_file): + # print mb_reg_file, 'not found !' + return "%s %s notfound" % (retval, mb_reg_file) + try: + with open(mb_reg_file, 'rb') as fd: + retval = fd.read() + retval = typeTostr(retval) + except Exception as error: + retval = "%s %s read failed, msg: %s" % (retval, mb_reg_file, str(error)) + + retval = retval.rstrip('\r\n') + retval = retval.lstrip(" ") + return retval + + +class checktype(): + def __init__(self, test1): + self.test1 = test1 + + @staticmethod + def getValue(location, bit, data_type, coefficient=1, addend=0): + try: + value_t = get_pmc_register(location) + if value_t.startswith("ERR"): + return value_t + if value_t.startswith("NA") or value_t.startswith("ACCESS FAILED"): + return "ERR %s read failed" % location + if data_type == 1: + return float('%.1f' % ((float(value_t) / 1000) + addend)) + if data_type == 2: + return float('%.1f' % (float(value_t) / 100)) + if data_type == 3: + psu_status = int(value_t, 16) + return (psu_status & (1 << bit)) >> bit + if data_type == 4: + return int(value_t, 10) + if data_type == 5: + return float('%.1f' % (float(value_t) / 1000 / 1000)) + if data_type == 6: + return Decimal((float(value_t) * coefficient / 1000) + addend).quantize(Decimal('0.000')) + return value_t + except Exception as e: + value_t = "ERR %s" % str(e) + return value_t + + # fanFRU + @staticmethod + def decodeBinByValue(retval): + fru = ipmifru() + fru.decodeBin(retval) + return fru + + @staticmethod + def get_fan_eeprom_info(prob_t, root, fan_name): + try: + ret = int_case.get_fan_eeprom_info(fan_name) + if ret["NAME"] == int_case.na_ret or ret["HW"] == int_case.na_ret or ret["SN"] == int_case.na_ret: + return "ERR read eeprom information failed" + + fanpro = {} + fanpro['fan_type'] = ret["NAME"] + fanpro['hw_version'] = ret["HW"] + fanpro['sn'] = ret["SN"] + fan_display_name_dict = status.getDecodValue(root, "fan_display_name") + fan_name = fanpro['fan_type'].strip() + if len(fan_display_name_dict) == 0: + return fanpro + if fan_name not in fan_display_name_dict: + prob_t['errcode'] = -1 + prob_t['errmsg'] = '%s' % ("ERR fan name: %s not support" % fan_name) + else: + fanpro['fan_type'] = fan_display_name_dict[fan_name] + return fanpro + except Exception as error: + return "ERR " + str(error) + + @staticmethod + def getpsufruValue(prob_t, root, val): + try: + psu_match = False + psupro = {} + + ret = int_case.get_psu_fru_info(val) + if ret["HW"] == int_case.na_ret or ret["PN"] == int_case.na_ret or ret["SN"] == int_case.na_ret: + return "ERR read eeprom information failed" + + psupro['type1'] = ret["PN"] + psupro['sn'] = ret["SN"] + psupro['hw_version'] = ret["HW"] + + psu_dict = status.getDecodValue(root, "psutype") + psupro['type1'] = psupro['type1'].strip() + if len(psu_dict) == 0: + return psupro + for psu_name, display_name in psu_dict.items(): + if psu_name.strip() == psupro['type1']: + psupro['type1'] = display_name + psu_match = True + break + if psu_match is not True: + prob_t['errcode'] = -1 + prob_t['errmsg'] = '%s' % ("ERR psu name: %s not support" % psupro['type1']) + return psupro + except Exception as error: + return "ERR " + str(error) + + + +class status(): + def __init__(self, productname): + self.productname = productname + + @staticmethod + def getETroot(filename): + safe_parser = ET.XMLParser(resolve_entities=False, no_network=True, load_dtd=False,) + with open(filename, 'rb') as f: + xml_bytes = f.read() + root = ET.fromstring(xml_bytes, parser=safe_parser) + return root + + @staticmethod + def getDecodValue(collection, decode): + decodes = collection.find('decode') + testdecode = decodes.find(decode) + test = {} + if testdecode is None: + return test + for neighbor in testdecode.iter('code'): + test[neighbor.attrib["key"]] = neighbor.attrib["value"] + return test + + @staticmethod + def getfileValue(location): + return checktype.getValue(location, " ", " ") + + @staticmethod + def getETValue(a, filename, tagname): + root = status.getETroot(filename) + for neighbor in root.iter(tagname): + prob_t = {} + prob_t = dict(neighbor.attrib) + prob_t['errcode'] = 0 + prob_t['errmsg'] = '' + for pros in neighbor.iter("property"): + ret = dict(list(neighbor.attrib.items()) + list(pros.attrib.items())) + if ret.get('e2type') == 'fru' and ret.get("name") == "fru": # fan + fruval = checktype.get_fan_eeprom_info(prob_t, root, ret["fan_name"]) + if isinstance(fruval, str) and fruval.startswith("ERR"): + prob_t['errcode'] = -1 + prob_t['errmsg'] = fruval + break + prob_t.update(fruval) + continue + + if ret.get("name") == "psu": # psu + psuval = checktype.getpsufruValue(prob_t, root, ret["location"]) + if isinstance(psuval, str) and psuval.startswith("ERR"): + prob_t['errcode'] = -1 + prob_t['errmsg'] = psuval + break + prob_t.update(psuval) + continue + + if ret.get("gettype") == "config": + prob_t[ret["name"]] = ret["value"] + continue + + if 'type' not in ret.keys(): + val = "0" + else: + val = ret["type"] + if 'bit' not in ret.keys(): + bit = "0" + else: + bit = ret["bit"] + if 'coefficient' not in ret.keys(): + coefficient = 1 + else: + coefficient = float(ret["coefficient"]) + if 'addend' not in ret.keys(): + addend = 0 + else: + addend = float(ret["addend"]) + + s = checktype.getValue(ret["location"], int(bit), int(val), coefficient, addend) + if isinstance(s, str) and s.startswith("ERR"): + prob_t['errcode'] = -1 + prob_t['errmsg'] = s + break + if 'default' in ret.keys(): + rt = status.getDecodValue(root, ret['decode']) + prob_t['errmsg'] = rt[str(s)] + if str(s) != ret["default"]: + prob_t['errcode'] = -1 + break + else: + if 'decode' in ret.keys(): + rt = status.getDecodValue(root, ret['decode']) + if (ret['decode'] == "psutype" and s.replace("\x00", "").rstrip() not in rt): + prob_t['errcode'] = -1 + prob_t['errmsg'] = '%s' % ("ERR psu name: %s not support" % + (s.replace("\x00", "").rstrip())) + else: + s = rt[str(s).replace("\x00", "").rstrip()] + name = ret["name"] + prob_t[name] = str(s) + a.append(prob_t) + + @staticmethod + def getCPUValue(a, filename, tagname): + root = status.getETroot(filename) + for neighbor in root.iter(tagname): + location = neighbor.attrib["location"] + + filepath = glob.glob(location) + if len(filepath) == 0: + return + location = filepath[0] + L = [] + for dirpath, dirnames, filenames in os.walk(location): + for file in filenames: + if file.endswith("_input"): + b = re.findall(r'temp(\d+)_input', file) + idx = int(b[0]) + L.append(idx) + L = sorted(L) + for idx in L: + prob_t = {} + prob_t["name"] = getPMCreg("%s/temp%d_label" % (location, idx)) + prob_t["temp"] = float(getPMCreg("%s/temp%d_input" % (location, idx))) / 1000 + prob_t["alarm"] = float(getPMCreg("%s/temp%d_crit_alarm" % (location, idx))) / 1000 + prob_t["crit"] = float(getPMCreg("%s/temp%d_crit" % (location, idx))) / 1000 + prob_t["max"] = float(getPMCreg("%s/temp%d_max" % (location, idx))) / 1000 + a.append(prob_t) + + @staticmethod + def getFileName(): + fpath = os.path.dirname(os.path.realpath(__file__)) + for file in DEV_XML_FILE_LIST: + xml = fpath + "/" + file + if os.path.exists(xml): + return xml + return fpath + "/" + CONFIG_NAME + + @staticmethod + def checkFan(ret): + _filename = status.getFileName() + # _filename = "/usr/local/bin/" + status.getFileName() + _tagname = "fan" + status.getETValue(ret, _filename, _tagname) + + @staticmethod + def getTemp(ret): + _filename = status.getFileName() + # _filename = "/usr/local/bin/" + status.getFileName() + _tagname = "temp" + status.getETValue(ret, _filename, _tagname) + + @staticmethod + def getPsu(ret): + _filename = status.getFileName() + # _filename = "/usr/local/bin/" + status.getFileName() + _tagname = "psu" + status.getETValue(ret, _filename, _tagname) + + @staticmethod + def getcputemp(ret): + _filename = status.getFileName() + _tagname = "cpus" + status.getCPUValue(ret, _filename, _tagname) + + @staticmethod + def getDcdc(ret): + _filename = status.getFileName() + _tagname = "dcdc" + status.getETValue(ret, _filename, _tagname) + + @staticmethod + def getmactemp(ret): + _filename = status.getFileName() + _tagname = "mactemp" + status.getETValue(ret, _filename, _tagname) + + @staticmethod + def getmacpower(ret): + _filename = status.getFileName() + _tagname = "macpower" + status.getETValue(ret, _filename, _tagname) + diff --git a/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/pcie.yaml b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/pcie.yaml new file mode 100644 index 00000000000..debd2d9fe1b --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/pcie.yaml @@ -0,0 +1,453 @@ +- bus: '00' + dev: '00' + fn: '0' + id: 09a2 + name: 'System peripheral: Intel Corporation Device 09a2 (rev 04)' +- bus: '00' + dev: '00' + fn: '1' + id: 09a4 + name: 'System peripheral: Intel Corporation Device 09a4 (rev 04)' +- bus: '00' + dev: '00' + fn: '2' + id: 09a3 + name: 'System peripheral: Intel Corporation Device 09a3 (rev 04)' +- bus: '00' + dev: '00' + fn: '3' + id: 09a5 + name: 'System peripheral: Intel Corporation Device 09a5 (rev 04)' +- bus: '00' + dev: '00' + fn: '4' + id: 0998 + name: 'Host bridge: Intel Corporation Device 0998' +- bus: '00' + dev: '01' + fn: '0' + id: '0b00' + name: 'System peripheral: Intel Corporation Device 0b00' +- bus: '00' + dev: '01' + fn: '1' + id: '0b00' + name: 'System peripheral: Intel Corporation Device 0b00' +- bus: '00' + dev: '01' + fn: '2' + id: '0b00' + name: 'System peripheral: Intel Corporation Device 0b00' +- bus: '00' + dev: '01' + fn: '3' + id: '0b00' + name: 'System peripheral: Intel Corporation Device 0b00' +- bus: '00' + dev: '01' + fn: '4' + id: '0b00' + name: 'System peripheral: Intel Corporation Device 0b00' +- bus: '00' + dev: '01' + fn: '5' + id: '0b00' + name: 'System peripheral: Intel Corporation Device 0b00' +- bus: '00' + dev: '01' + fn: '6' + id: '0b00' + name: 'System peripheral: Intel Corporation Device 0b00' +- bus: '00' + dev: '01' + fn: '7' + id: '0b00' + name: 'System peripheral: Intel Corporation Device 0b00' +- bus: '00' + dev: '02' + fn: '0' + id: 09a6 + name: 'System peripheral: Intel Corporation Device 09a6' +- bus: '00' + dev: '02' + fn: '1' + id: 09a7 + name: 'System peripheral: Intel Corporation Device 09a7' +- bus: '00' + dev: '02' + fn: '4' + id: '3456' + name: 'Non-Essential Instrumentation [1300]: Intel Corporation Device 3456 (rev + 01)' +- bus: '00' + dev: '06' + fn: '0' + id: 18da + name: 'PCI bridge: Intel Corporation Device 18da (rev 11)' +- bus: '00' + dev: 0e + fn: '0' + id: 18f2 + name: 'SATA controller: Intel Corporation Device 18f2 (rev 11)' +- bus: '00' + dev: 0f + fn: '0' + id: 18ac + name: 'System peripheral: Intel Corporation Device 18ac (rev 11)' +- bus: '00' + dev: '10' + fn: '0' + id: 18a8 + name: 'PCI bridge: Intel Corporation Device 18a8 (rev 11)' +- bus: '00' + dev: '12' + fn: '0' + id: 18aa + name: 'PCI bridge: Intel Corporation Device 18aa (rev 11)' +- bus: '00' + dev: '13' + fn: '0' + id: 18ab + name: 'PCI bridge: Intel Corporation Device 18ab (rev 11)' +- bus: '00' + dev: '14' + fn: '0' + id: 18ad + name: 'PCI bridge: Intel Corporation Device 18ad (rev 11)' +- bus: '00' + dev: '18' + fn: '0' + id: 18d3 + name: 'Communication controller: Intel Corporation Device 18d3 (rev 11)' +- bus: '00' + dev: '18' + fn: '1' + id: 18d4 + name: 'Communication controller: Intel Corporation Device 18d4 (rev 11)' +- bus: '00' + dev: '18' + fn: '4' + id: 18d6 + name: 'Communication controller: Intel Corporation Device 18d6 (rev 11)' +- bus: '00' + dev: 1a + fn: '0' + id: 18d8 + name: 'Serial controller: Intel Corporation Device 18d8 (rev 11)' +- bus: '00' + dev: 1a + fn: '1' + id: 18d8 + name: 'Serial controller: Intel Corporation Device 18d8 (rev 11)' +- bus: '00' + dev: 1a + fn: '2' + id: 18d8 + name: 'Serial controller: Intel Corporation Device 18d8 (rev 11)' +- bus: '00' + dev: 1a + fn: '3' + id: 18d9 + name: 'Unassigned class [ff00]: Intel Corporation Device 18d9 (rev 11)' +- bus: '00' + dev: 1c + fn: '0' + id: 18db + name: 'SD Host controller: Intel Corporation Device 18db (rev 11)' +- bus: '00' + dev: 1d + fn: '0' + id: 0998 + name: 'Host bridge: Intel Corporation Device 0998' +- bus: '00' + dev: 1e + fn: '0' + id: 18d0 + name: 'USB controller: Intel Corporation Device 18d0 (rev 11)' +- bus: '00' + dev: 1f + fn: '0' + id: 18dc + name: 'ISA bridge: Intel Corporation Device 18dc (rev 11)' +- bus: '00' + dev: 1f + fn: '4' + id: 18df + name: 'SMBus: Intel Corporation Device 18df (rev 11)' +- bus: '00' + dev: 1f + fn: '5' + id: 18e0 + name: 'Serial bus controller [0c80]: Intel Corporation Device 18e0 (rev 11)' +- bus: '00' + dev: 1f + fn: '7' + id: 18e1 + name: 'Non-Essential Instrumentation [1300]: Intel Corporation Device 18e1 (rev + 11)' +- bus: '01' + dev: '00' + fn: '0' + id: 18ee + name: 'Co-processor: Intel Corporation Device 18ee (rev 11)' +- bus: '02' + dev: '00' + fn: '0' + id: f900 + name: 'Ethernet controller: Broadcom Inc. and subsidiaries Device f900 (rev 11)' +- bus: '03' + dev: '00' + fn: '0' + id: '7022' + name: 'SMBus: Device 1ded:7022' +- bus: '04' + dev: '00' + fn: '0' + id: '7021' + name: 'SMBus: Device 1ded:7021' +- bus: '05' + dev: '00' + fn: '0' + id: '1533' + name: 'Ethernet controller: Intel Corporation I210 Gigabit Network Connection (rev + 03)' +- bus: '14' + dev: '00' + fn: '0' + id: 09a2 + name: 'System peripheral: Intel Corporation Device 09a2 (rev 04)' +- bus: '14' + dev: '00' + fn: '1' + id: 09a4 + name: 'System peripheral: Intel Corporation Device 09a4 (rev 04)' +- bus: '14' + dev: '00' + fn: '2' + id: 09a3 + name: 'System peripheral: Intel Corporation Device 09a3 (rev 04)' +- bus: '14' + dev: '00' + fn: '3' + id: 09a5 + name: 'System peripheral: Intel Corporation Device 09a5 (rev 04)' +- bus: '14' + dev: '00' + fn: '4' + id: 0998 + name: 'Host bridge: Intel Corporation Device 0998' +- bus: f3 + dev: '00' + fn: '0' + id: 09a2 + name: 'System peripheral: Intel Corporation Device 09a2 (rev 04)' +- bus: f3 + dev: '00' + fn: '1' + id: 09a4 + name: 'System peripheral: Intel Corporation Device 09a4 (rev 04)' +- bus: f3 + dev: '00' + fn: '2' + id: 09a3 + name: 'System peripheral: Intel Corporation Device 09a3 (rev 04)' +- bus: f3 + dev: '00' + fn: '3' + id: 09a5 + name: 'System peripheral: Intel Corporation Device 09a5 (rev 04)' +- bus: f3 + dev: '00' + fn: '4' + id: 0998 + name: 'Host bridge: Intel Corporation Device 0998' +- bus: f3 + dev: '04' + fn: '0' + id: 18d1 + name: 'PCI bridge: Intel Corporation Device 18d1' +- bus: f4 + dev: '00' + fn: '0' + id: 124c + name: 'Ethernet controller: Intel Corporation Ethernet Connection E823-L for backplane' +- bus: f4 + dev: '00' + fn: '1' + id: 124c + name: 'Ethernet controller: Intel Corporation Ethernet Connection E823-L for backplane' +- bus: f4 + dev: '00' + fn: '2' + id: 124c + name: 'Ethernet controller: Intel Corporation Ethernet Connection E823-L for backplane' +- bus: f4 + dev: '00' + fn: '3' + id: 124c + name: 'Ethernet controller: Intel Corporation Ethernet Connection E823-L for backplane' +- bus: f4 + dev: '00' + fn: '4' + id: 124c + name: 'Ethernet controller: Intel Corporation Ethernet Connection E823-L for backplane' +- bus: fe + dev: '00' + fn: '0' + id: '3450' + name: 'System peripheral: Intel Corporation Device 3450' +- bus: fe + dev: '00' + fn: '1' + id: '3451' + name: 'System peripheral: Intel Corporation Device 3451' +- bus: fe + dev: '00' + fn: '2' + id: '3452' + name: 'System peripheral: Intel Corporation Device 3452' +- bus: fe + dev: '00' + fn: '3' + id: 0998 + name: 'Host bridge: Intel Corporation Device 0998' +- bus: fe + dev: '00' + fn: '5' + id: '3455' + name: 'System peripheral: Intel Corporation Device 3455' +- bus: fe + dev: 0b + fn: '0' + id: '3448' + name: 'System peripheral: Intel Corporation Device 3448' +- bus: fe + dev: 0b + fn: '1' + id: '3448' + name: 'System peripheral: Intel Corporation Device 3448' +- bus: fe + dev: 0b + fn: '2' + id: 344b + name: 'System peripheral: Intel Corporation Device 344b' +- bus: fe + dev: 0c + fn: '0' + id: 344a + name: 'Performance counters: Intel Corporation Device 344a' +- bus: fe + dev: 1a + fn: '0' + id: '2880' + name: 'Performance counters: Intel Corporation Device 2880' +- bus: ff + dev: '00' + fn: '0' + id: 344c + name: 'System peripheral: Intel Corporation Device 344c' +- bus: ff + dev: '00' + fn: '1' + id: 344c + name: 'System peripheral: Intel Corporation Device 344c' +- bus: ff + dev: '00' + fn: '2' + id: 344c + name: 'System peripheral: Intel Corporation Device 344c' +- bus: ff + dev: '00' + fn: '3' + id: 344c + name: 'System peripheral: Intel Corporation Device 344c' +- bus: ff + dev: '00' + fn: '4' + id: 344c + name: 'System peripheral: Intel Corporation Device 344c' +- bus: ff + dev: '00' + fn: '5' + id: 344c + name: 'System peripheral: Intel Corporation Device 344c' +- bus: ff + dev: 0a + fn: '0' + id: 344d + name: 'System peripheral: Intel Corporation Device 344d' +- bus: ff + dev: 0a + fn: '1' + id: 344d + name: 'System peripheral: Intel Corporation Device 344d' +- bus: ff + dev: 0a + fn: '2' + id: 344d + name: 'System peripheral: Intel Corporation Device 344d' +- bus: ff + dev: 0a + fn: '3' + id: 344d + name: 'System peripheral: Intel Corporation Device 344d' +- bus: ff + dev: 0a + fn: '4' + id: 344d + name: 'System peripheral: Intel Corporation Device 344d' +- bus: ff + dev: 0a + fn: '5' + id: 344d + name: 'System peripheral: Intel Corporation Device 344d' +- bus: ff + dev: 1d + fn: '0' + id: 344f + name: 'System peripheral: Intel Corporation Device 344f' +- bus: ff + dev: 1d + fn: '1' + id: '3457' + name: 'System peripheral: Intel Corporation Device 3457' +- bus: ff + dev: 1e + fn: '0' + id: '3458' + name: 'System peripheral: Intel Corporation Device 3458 (rev 01)' +- bus: ff + dev: 1e + fn: '1' + id: '3459' + name: 'System peripheral: Intel Corporation Device 3459 (rev 01)' +- bus: ff + dev: 1e + fn: '2' + id: 345a + name: 'System peripheral: Intel Corporation Device 345a (rev 01)' +- bus: ff + dev: 1e + fn: '3' + id: 345b + name: 'System peripheral: Intel Corporation Device 345b (rev 01)' +- bus: ff + dev: 1e + fn: '4' + id: 345c + name: 'System peripheral: Intel Corporation Device 345c (rev 01)' +- bus: ff + dev: 1e + fn: '5' + id: 345d + name: 'System peripheral: Intel Corporation Device 345d (rev 01)' +- bus: ff + dev: 1e + fn: '6' + id: 345e + name: 'System peripheral: Intel Corporation Device 345e (rev 01)' +- bus: ff + dev: 1e + fn: '7' + id: 345f + name: 'System peripheral: Intel Corporation Device 345f (rev 01)' diff --git a/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/platform.json b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/platform.json new file mode 100644 index 00000000000..6cc5bd12c6d --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/platform.json @@ -0,0 +1,6 @@ +{ + "chassis": { + "name": "M2-W6940-128X1-FR4" + }, + "interfaces": {} +} diff --git a/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/platform_asic b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/platform_asic new file mode 100644 index 00000000000..96046765276 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/platform_asic @@ -0,0 +1 @@ +broadcom diff --git a/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/platform_components.json b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/platform_components.json new file mode 100644 index 00000000000..6d70cafdfb9 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/platform_components.json @@ -0,0 +1,18 @@ +{ + "chassis": { + "M2-W6940-128X1-FR4": { + "component": { + "CPU CPLD": { }, + "SCM CPLD": { }, + "MCB CPLD": { }, + "SMB CPLD": { }, + "FCB_T CPLD": { }, + "FCB_B CPLD": { }, + "IOB FPGA": { }, + "DOM FPGA": { }, + "BIOS": { } + } + } + } +} + diff --git a/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/platform_env.conf b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/platform_env.conf new file mode 100644 index 00000000000..81f908f96d5 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/platform_env.conf @@ -0,0 +1,2 @@ +is_ltsw_chip=1 +SYNCD_SHM_SIZE=1g \ No newline at end of file diff --git a/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/plugins/sfputil.py b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/plugins/sfputil.py new file mode 100644 index 00000000000..06105481c5e --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/plugins/sfputil.py @@ -0,0 +1,225 @@ +# sfputil.py +# +# Platform-specific SFP transceiver interface for SONiC +# + +try: + import os + import time + import fcntl + from sonic_sfp.sfputilbase import SfpUtilBase +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + + I2C_MAX_ATTEMPT = 50 + LOCK_MAX_ATTEMPT = 100 + + BUS_START = 24 + BUS_END = 31 + BUS_NUM = 8 + + def __init__(self): + self.pidfile_dict = dict() + SfpUtilBase.__init__(self) + + def file_rw_lock(self, file_path): + pidfile = self.pidfile_dict.get(file_path, None) + if pidfile == None: + pidfile = open(file_path, "r") + self.pidfile_dict[file_path] = pidfile + if pidfile == None: + return False + # Retry 100 times to lock file + for i in range(0, 100): + try: + fcntl.flock(pidfile, fcntl.LOCK_EX | fcntl.LOCK_NB) + return True + except Exception: + time.sleep(0.05) + continue + + pidfile.close() + self.pidfile_dict[file_path] = None + return False + + def file_rw_unlock(self, file_path): + pidfile = self.pidfile_dict.get(file_path, None) + if pidfile == None: + return True + try: + fcntl.flock(pidfile, fcntl.LOCK_UN) + pidfile.close() + self.pidfile_dict[file_path] = None + return True + except Exception as e: + print("file unlock err, msg:%s" % (str(e))) + return False + + def _sfp_write_file_path(self, file_path, offset, num_bytes, val): + attempts = 0 + while attempts < self.I2C_MAX_ATTEMPT: + try: + file_path.seek(offset) + file_path.write(bytearray([val])[0:num_bytes]) + except: + attempts += 1 + time.sleep(0.05) + else: + return True + return False + + def _sfp_read_file_path(self, file_path, offset, num_bytes, target_page): + attempts = 0 + page_offset = 127 + while attempts < self.I2C_MAX_ATTEMPT: + try: + if offset > page_offset: + # verify page + file_path.seek(page_offset) + read_buf = file_path.read(1) + cur_page = read_buf[0] + + if cur_page != target_page: + self._sfp_write_file_path(file_path, page_offset, 1, target_page) + + file_path.seek(offset) + read_buf = file_path.read(num_bytes) + + except: + attempts += 1 + time.sleep(0.05) + else: + return True, read_buf + return False, None + + def _get_port_eeprom_path(self, devid): + sysfs_sfp_i2c_client_eeprom_path = "/sys/bus/i2c/devices/i2c-%d/%d-0050/eeprom" % (devid, devid) + return sysfs_sfp_i2c_client_eeprom_path + + def _read_eeprom_specific_bytes(self, sysfsfile_eeprom, offset, num_bytes, page): + eeprom_raw = [] + for i in range(0, num_bytes): + eeprom_raw.append("0x00") + + rv, raw = self._sfp_read_file_path(sysfsfile_eeprom, offset, num_bytes, page) + if rv == False: + return None + + try: + for n in range(0, num_bytes): + eeprom_raw[n] = hex(raw[n])[2:].zfill(2) + except: + return None + + return eeprom_raw + + def get_highest_temperature_cpo_oe(self): + hightest_temperature = -99999 + + read_eeprom_flag = False + temperature_valid_flag = False + + for bus in range(self.BUS_START, self.BUS_START+self.BUS_NUM): + offset = 14 + page = 0 + eeprom_path = self._get_port_eeprom_path(bus) + try: + if os.path.exists(eeprom_path) is False: + break + + with open(eeprom_path, mode="rb", buffering=0) as eeprom: + read_eeprom_flag = True + eeprom_raw = self._read_eeprom_specific_bytes(eeprom, offset, 2, page) + if len(eeprom_raw) != 0: + msb = int(eeprom_raw[0], 16) + lsb = int(eeprom_raw[1], 16) + + result = (msb << 8) | (lsb & 0xff) + # To support temperature below + if ((result & (1 << (16 - 1))) != 0): + result = result - (1 << 16) + result = float(result / 256.0) + if -50 <= result <= 200: + temperature_valid_flag = True + if hightest_temperature < result: + hightest_temperature = result + + except Exception as e: + pass + + # all port read eeprom fail + if read_eeprom_flag == False: + hightest_temperature = -99999 + + # all port temperature invalid + elif read_eeprom_flag == True and temperature_valid_flag == False: + hightest_temperature = -100000 + + hightest_temperature = round(hightest_temperature, 2) + + return hightest_temperature + + def get_highest_temperature_cpo_rlm(self): + hightest_temperature = -99999 + + read_eeprom_flag = False + temperature_valid_flag = False + + for bus in range(self.BUS_START, self.BUS_START+self.BUS_NUM): + + eeprom_path = self._get_port_eeprom_path(bus) + + if os.path.exists(eeprom_path) is False: + break + + for rlm_page in [176, 180]: # two rlm per oe + offset = 150 + page = rlm_page + try: + for i in range(0, self.LOCK_MAX_ATTEMPT): + ret = self.file_rw_lock(eeprom_path) + if ret is True: + break + time.sleep(0.001) + + if ret is False: + # FIXME + continue + + with open(eeprom_path, mode="r+b", buffering=0) as eeprom: + read_eeprom_flag = True + eeprom_raw = self._read_eeprom_specific_bytes(eeprom, offset, 2, page) + + if len(eeprom_raw) != 0: + msb = int(eeprom_raw[0], 16) + lsb = int(eeprom_raw[1], 16) + + result = (msb << 8) | (lsb & 0xff) + # To support temperature below 0 + if ((result & (1 << (16 - 1))) != 0): + result = result - (1 << 16) + result = float(result / 256.0) + if -50 <= result <= 200: + temperature_valid_flag = True + if hightest_temperature < result: + hightest_temperature = result + self.file_rw_unlock(eeprom_path) + + except Exception as e: + self.file_rw_unlock(eeprom_path) + pass + + # all port read eeprom fail + if read_eeprom_flag == False: + hightest_temperature = -99999 + + # all port temperature invalid + elif read_eeprom_flag == True and temperature_valid_flag == False: + hightest_temperature = -100000 + + hightest_temperature = round(hightest_temperature, 2) + + return hightest_temperature diff --git a/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/plugins/ssd_util.py b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/plugins/ssd_util.py new file mode 100755 index 00000000000..8a83ce07777 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/plugins/ssd_util.py @@ -0,0 +1,318 @@ +# +# ssd_util.py +# +# Generic implementation of the SSD health API +# SSD models supported: +# - InnoDisk +# - StorFly +# - Virtium + +try: + import re + import os + import subprocess + from sonic_platform_base.sonic_storage.storage_base import StorageBase +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + +SMARTCTL = "smartctl {} -a" +INNODISK = "iSmart -d {}" +VIRTIUM = "SmartCmd -m {}" +DISK_LIST_CMD = "fdisk -l -o Device" +DISK_FREE_CMD = "df -h" +MOUNT_CMD = "mount" + +NOT_AVAILABLE = "N/A" +PE_CYCLE = 3000 +FAIL_PERCENT = 95 + +# Set Vendor Specific IDs +INNODISK_HEALTH_ID = 169 +INNODISK_TEMPERATURE_ID = 194 + +class SsdUtil(StorageBase): + """ + Generic implementation of the SSD health API + """ + model = NOT_AVAILABLE + serial = NOT_AVAILABLE + firmware = NOT_AVAILABLE + temperature = NOT_AVAILABLE + health = NOT_AVAILABLE + remaining_life = NOT_AVAILABLE + sata_rate = NOT_AVAILABLE + ssd_info = NOT_AVAILABLE + vendor_ssd_info = NOT_AVAILABLE + + def __init__(self, diskdev): + self.vendor_ssd_utility = { + "Generic" : { "utility" : SMARTCTL, "parser" : self.parse_generic_ssd_info }, + "InnoDisk" : { "utility" : INNODISK, "parser" : self.parse_innodisk_info }, + "M.2" : { "utility" : INNODISK, "parser" : self.parse_innodisk_info }, + "StorFly" : { "utility" : VIRTIUM, "parser" : self.parse_virtium_info }, + "Virtium" : { "utility" : VIRTIUM, "parser" : self.parse_virtium_info } + } + + """ + The dict model_attr keys relate the vendors + LITEON : "ER2-GD","AF2MA31DTDLT" + Intel : "SSDSCKKB" + SMI : "SM619GXC" + samsung: "MZNLH" + ADATA : "IM2S3134N" + """ + self.model_attr = { + "ER2-GD" : { "temperature" : r"\n190\s+(.+?)\n", "remainingLife" : r"\n202\s+(.+?)\n" }, + "AF2MA31DTDLT" : { "temperature" : r"\n194\s+(.+?)\n", "remainingLife" : r"\n202\s+(.+?)\n" }, + "SSDSCK" : { "temperature" : r"\n194\s+(.+?)\n", "remainingLife" : r"\n233\s+(.+?)\n" }, + "SM619GXC" : { "temperature" : r"\n194\s+(.+?)\n", "remainingLife" : r"\n169\s+(.+?)\n" }, + "MZNLH" : { "temperature" : r"\n190\s+(.+?)\n", "remainingLife" : r"\n245\s+(.+?)\n" }, + "IM2S3134N" : { "temperature" : r"\n194\s+(.+?)\n", "remainingLife" : r"\n231\s+(.+?)\n" }, + "MTFDDAV240TCB-1AR1ZABAA" : { "temperature" : r"\n194\s+(.+?)\n", "remainingLife" : r"\n202\s+(.+?)\n" } + } + + self.key_list = list(self.model_attr.keys()) + self.attr_info_rule = r"[\s\S]*SMART Attributes Data Structure revision number: 1|SMART Error Log Version[\s\S]*" + self.dev = diskdev + # Generic part + self.fetch_generic_ssd_info(diskdev) + self.parse_generic_ssd_info() + self.fetch_vendor_ssd_info(diskdev, "Generic") + + # Known vendor part + if self.model: + model_short = self.model.split()[0] + if model_short in self.vendor_ssd_utility: + self.fetch_vendor_ssd_info(diskdev, model_short) + self.parse_vendor_ssd_info(model_short) + else: + # No handler registered for this disk model + pass + else: + # Failed to get disk model + self.model = "Unknown" + + def _execute_shell(self, cmd): + process = subprocess.Popen(cmd.split(), universal_newlines=True, stdout=subprocess.PIPE) + output, error = process.communicate() + exit_code = process.returncode + if exit_code: + return None + return output + + def _parse_re(self, pattern, buffer): + res_list = re.findall(pattern, str(buffer)) + return res_list[0] if res_list else NOT_AVAILABLE + + def fetch_generic_ssd_info(self, diskdev): + self.ssd_info = self._execute_shell(self.vendor_ssd_utility["Generic"]["utility"].format(diskdev)) + + # Health and temperature values may be overwritten with vendor specific data + def parse_generic_ssd_info(self): + if "nvme" in self.dev: + self.model = self._parse_re(r'Model Number:\s*(.+?)\n', self.ssd_info) + + health_raw = self._parse_re(r'Percentage Used\s*(.+?)\n', self.ssd_info) + if health_raw == NOT_AVAILABLE: + self.health = NOT_AVAILABLE + else: + health_raw = health_raw.split()[-1] + self.health = 100 - float(health_raw.strip('%')) + + temp_raw = self._parse_re(r'Temperature\s*(.+?)\n', self.ssd_info) + if temp_raw == NOT_AVAILABLE: + self.temperature = NOT_AVAILABLE + else: + temp_raw = temp_raw.split()[-2] + self.temperature = float(temp_raw) + else: + self.model = self._parse_re(r'Device Model:\s*(.+?)\n', self.ssd_info) + model_key = "" + for key in self.key_list: + if re.search(key, self.model): + model_key = key + break + if model_key != "": + self.remaining_life = self._parse_re(self.model_attr[model_key]["remainingLife"], re.sub(self.attr_info_rule,"",self.ssd_info)).split()[2] + self.temperature = self._parse_re(self.model_attr[model_key]["temperature"], re.sub(self.attr_info_rule,"",self.ssd_info)).split()[8] + self.health = self.remaining_life + # Get the LITEON ssd health value by (PE CYCLE - AVG ERASE CYCLE )/(PE CYCLE) + if model_key in ["ER2-GD", "AF2MA31DTDLT"]: + avg_erase = int(self._parse_re(r'\n173\s+(.+?)\n' ,re.sub(self.attr_info_rule,"",self.ssd_info)).split()[-1]) + self.health = int(round((PE_CYCLE - avg_erase)/PE_CYCLE*100,0)) + if self.remaining_life != NOT_AVAILABLE and int(self.remaining_life) < FAIL_PERCENT: + self.remaining_life = "Fail" + self.sata_rate = self._parse_re(r'SATA Version is:.*current: (.+?)\)\n', self.ssd_info) + self.serial = self._parse_re(r'Serial Number:\s*(.+?)\n', self.ssd_info) + self.firmware = self._parse_re(r'Firmware Version:\s*(.+?)\n', self.ssd_info) + + def parse_innodisk_info(self): + if self.vendor_ssd_info: + self.health = self._parse_re(r'Health:\s*(.+?)%', self.vendor_ssd_info) + self.temperature = self._parse_re(r'Temperature\s*\[\s*(.+?)\]', self.vendor_ssd_info) + else: + if self.health == NOT_AVAILABLE: + health_raw = self.parse_id_number(INNODISK_HEALTH_ID) + self.health = health_raw.split()[-1] + if self.temperature == NOT_AVAILABLE: + temp_raw = self.parse_id_number(INNODISK_TEMPERATURE_ID) + self.temperature = temp_raw.split()[-6] + + def parse_virtium_info(self): + if self.vendor_ssd_info: + self.temperature = self._parse_re(r'Temperature_Celsius\s*\d*\s*(\d+?)\s+', self.vendor_ssd_info) + nand_endurance = self._parse_re(r'NAND_Endurance\s*\d*\s*(\d+?)\s+', self.vendor_ssd_info) + avg_erase_count = self._parse_re(r'Average_Erase_Count\s*\d*\s*(\d+?)\s+', self.vendor_ssd_info) + try: + self.health = 100 - (float(avg_erase_count) * 100 / float(nand_endurance)) + except (ValueError, ZeroDivisionError): + # Invalid avg_erase_count or nand_endurance. + pass + + def fetch_vendor_ssd_info(self, diskdev, model): + self.vendor_ssd_info = self._execute_shell(self.vendor_ssd_utility[model]["utility"].format(diskdev)) + + def parse_vendor_ssd_info(self, model): + self.vendor_ssd_utility[model]["parser"]() + + def check_readonly2(self, partition, filesystem): + # parse mount cmd output info + mount_info = self._execute_shell(MOUNT_CMD) + for line in mount_info.split('\n'): + column_list = line.split() + if line == '': + continue + if column_list[0] == partition and column_list[2] == filesystem: + if column_list[5].split(',')[0][1:] == "ro": + return partition + else: + return NOT_AVAILABLE + return NOT_AVAILABLE + + def check_readonly(self, partition, filesystem): + ret = os.access(filesystem, os.W_OK) + if ret == False: + return partition + else: + return NOT_AVAILABLE + + def get_health(self): + """ + Retrieves current disk health in percentages + + Returns: + A float number of current ssd health + e.g. 83.5 + """ + if self.health == 'N/A': + return "NA" + else: + return float(self.health) + + def get_temperature(self): + """ + Retrieves current disk temperature in Celsius + + Returns: + A float number of current temperature in Celsius + e.g. 40.1 + """ + if self.temperature == 'N/A': + return 'NA' + else: + return float(self.temperature) + + def get_model(self): + """ + Retrieves model for the given disk device + + Returns: + A string holding disk model as provided by the manufacturer + """ + return self.model + + def get_firmware(self): + """ + Retrieves firmware version for the given disk device + + Returns: + A string holding disk firmware version as provided by the manufacturer + """ + return self.firmware + + def get_serial(self): + """ + Retrieves serial number for the given disk device + + Returns: + A string holding disk serial number as provided by the manufacturer + """ + return self.serial + def get_sata_rate(self): + """ + Retrieves SATA rate for the given disk device + Returns: + A string holding current SATA rate as provided by the manufacturer + """ + return self.sata_rate + def get_remaining_life(self): + """ + Retrieves remaining life for the given disk device + Returns: + A string holding disk remaining life as provided by the manufacturer + """ + return self.remaining_life + def get_vendor_output(self): + """ + Retrieves vendor specific data for the given disk device + + Returns: + A string holding some vendor specific disk information + """ + return self.vendor_ssd_info + + def parse_id_number(self, id): + return self._parse_re(r'{}\s*(.+?)\n'.format(id), self.ssd_info) + + def get_readonly_partition(self): + """ + Check the partition mount filesystem is readonly status,then output the result. + Returns: + The readonly partition list + """ + + ro_partition_list = [] + partition_list = [] + + # parse fdisk cmd output info + disk_info = self._execute_shell(DISK_LIST_CMD) + begin_flag = False + for line in disk_info.split('\n'): + if line == "Device": + begin_flag = True + continue + if begin_flag: + if line != "": + partition_list.append(line) + else: + break + + # parse df cmd output info + disk_free = self._execute_shell(DISK_FREE_CMD) + disk_dict = {} + line_num = 0 + for line in disk_free.split('\n'): + line_num = line_num + 1 + if line_num == 1 or line == "": + continue + column_list = line.split() + disk_dict[column_list[0]] = column_list[5] + + # get partition which is readonly + for partition in partition_list: + if partition in disk_dict: + ret = self.check_readonly(partition, disk_dict[partition]) + if (ret != NOT_AVAILABLE): + ro_partition_list.append(ret) + + return ro_partition_list diff --git a/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/pmon_daemon_control.json b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/pmon_daemon_control.json new file mode 100644 index 00000000000..099ff1d5b55 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/pmon_daemon_control.json @@ -0,0 +1,5 @@ +{ + "skip_ledd": true, + "skip_xcvrd": true, + "include_sensormond": true +} diff --git a/platform/broadcom/saibcm-modules/GTAGS b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/system_health_monitoring_config.json similarity index 100% rename from platform/broadcom/saibcm-modules/GTAGS rename to device/micas/x86_64-micas_m2-w6940-128x1-fr4-pure-pd-r0/system_health_monitoring_config.json diff --git a/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/M2-W6940-128X1-FR4/buffers.json.j2 b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/M2-W6940-128X1-FR4/buffers.json.j2 new file mode 100644 index 00000000000..0b1cb2c541b --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/M2-W6940-128X1-FR4/buffers.json.j2 @@ -0,0 +1,2 @@ +{%- set default_topo = 't1' %} +{%- include 'buffers_config.j2' %} diff --git a/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/M2-W6940-128X1-FR4/buffers_defaults_ft2.j2 b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/M2-W6940-128X1-FR4/buffers_defaults_ft2.j2 new file mode 100644 index 00000000000..ef380c86c4a --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/M2-W6940-128X1-FR4/buffers_defaults_ft2.j2 @@ -0,0 +1,36 @@ + +{%- set default_cable = '5m' %} + +{%- macro generate_buffer_pool_and_profiles() %} + + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "162539680", + "type": "ingress", + "mode": "dynamic", + "xoff": "33374584" + }, + "egress_lossless_pool": { + "size": "162539680", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"ingress_lossless_pool", + "size":"0", + "static_th":"165867080" + }, + "egress_lossless_profile": { + "pool":"egress_lossless_pool", + "size":"0", + "static_th":"165867080" + }, + "egress_lossy_profile": { + "pool":"egress_lossless_pool", + "size":"1778", + "dynamic_th":"0" + } + }, +{%- endmacro %} diff --git a/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/M2-W6940-128X1-FR4/buffers_defaults_lt2.j2 b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/M2-W6940-128X1-FR4/buffers_defaults_lt2.j2 new file mode 100644 index 00000000000..ef380c86c4a --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/M2-W6940-128X1-FR4/buffers_defaults_lt2.j2 @@ -0,0 +1,36 @@ + +{%- set default_cable = '5m' %} + +{%- macro generate_buffer_pool_and_profiles() %} + + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "162539680", + "type": "ingress", + "mode": "dynamic", + "xoff": "33374584" + }, + "egress_lossless_pool": { + "size": "162539680", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"ingress_lossless_pool", + "size":"0", + "static_th":"165867080" + }, + "egress_lossless_profile": { + "pool":"egress_lossless_pool", + "size":"0", + "static_th":"165867080" + }, + "egress_lossy_profile": { + "pool":"egress_lossless_pool", + "size":"1778", + "dynamic_th":"0" + } + }, +{%- endmacro %} diff --git a/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/M2-W6940-128X1-FR4/buffers_defaults_t0.j2 b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/M2-W6940-128X1-FR4/buffers_defaults_t0.j2 new file mode 100644 index 00000000000..ef380c86c4a --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/M2-W6940-128X1-FR4/buffers_defaults_t0.j2 @@ -0,0 +1,36 @@ + +{%- set default_cable = '5m' %} + +{%- macro generate_buffer_pool_and_profiles() %} + + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "162539680", + "type": "ingress", + "mode": "dynamic", + "xoff": "33374584" + }, + "egress_lossless_pool": { + "size": "162539680", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"ingress_lossless_pool", + "size":"0", + "static_th":"165867080" + }, + "egress_lossless_profile": { + "pool":"egress_lossless_pool", + "size":"0", + "static_th":"165867080" + }, + "egress_lossy_profile": { + "pool":"egress_lossless_pool", + "size":"1778", + "dynamic_th":"0" + } + }, +{%- endmacro %} diff --git a/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/M2-W6940-128X1-FR4/buffers_defaults_t1.j2 b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/M2-W6940-128X1-FR4/buffers_defaults_t1.j2 new file mode 100644 index 00000000000..847000e1640 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/M2-W6940-128X1-FR4/buffers_defaults_t1.j2 @@ -0,0 +1,36 @@ + +{%- set default_cable = '40m' %} + +{%- macro generate_buffer_pool_and_profiles() %} + + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "162539680", + "type": "ingress", + "mode": "dynamic", + "xoff": "33374584" + }, + "egress_lossless_pool": { + "size": "162539680", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"ingress_lossless_pool", + "size":"0", + "static_th":"165867080" + }, + "egress_lossless_profile": { + "pool":"egress_lossless_pool", + "size":"0", + "static_th":"165867080" + }, + "egress_lossy_profile": { + "pool":"egress_lossless_pool", + "size":"1778", + "dynamic_th":"0" + } + }, +{%- endmacro %} diff --git a/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/M2-W6940-128X1-FR4/buffers_defaults_t2.j2 b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/M2-W6940-128X1-FR4/buffers_defaults_t2.j2 new file mode 100644 index 00000000000..ef380c86c4a --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/M2-W6940-128X1-FR4/buffers_defaults_t2.j2 @@ -0,0 +1,36 @@ + +{%- set default_cable = '5m' %} + +{%- macro generate_buffer_pool_and_profiles() %} + + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "162539680", + "type": "ingress", + "mode": "dynamic", + "xoff": "33374584" + }, + "egress_lossless_pool": { + "size": "162539680", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"ingress_lossless_pool", + "size":"0", + "static_th":"165867080" + }, + "egress_lossless_profile": { + "pool":"egress_lossless_pool", + "size":"0", + "static_th":"165867080" + }, + "egress_lossy_profile": { + "pool":"egress_lossless_pool", + "size":"1778", + "dynamic_th":"0" + } + }, +{%- endmacro %} diff --git a/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/M2-W6940-128X1-FR4/default_sku b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/M2-W6940-128X1-FR4/default_sku new file mode 100644 index 00000000000..9e41371997c --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/M2-W6940-128X1-FR4/default_sku @@ -0,0 +1 @@ +M2-W6940-128X1-FR4 l2 \ No newline at end of file diff --git a/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/M2-W6940-128X1-FR4/hwsku.json b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/M2-W6940-128X1-FR4/hwsku.json new file mode 100644 index 00000000000..76c4f2f08de --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/M2-W6940-128X1-FR4/hwsku.json @@ -0,0 +1,388 @@ +{ + "interfaces": { + "Ethernet0": { + "default_brkout_mode": "1x400G" + }, + "Ethernet1": { + "default_brkout_mode": "1x400G" + }, + "Ethernet2": { + "default_brkout_mode": "1x400G" + }, + "Ethernet3": { + "default_brkout_mode": "1x400G" + }, + "Ethernet4": { + "default_brkout_mode": "1x400G" + }, + "Ethernet5": { + "default_brkout_mode": "1x400G" + }, + "Ethernet6": { + "default_brkout_mode": "1x400G" + }, + "Ethernet7": { + "default_brkout_mode": "1x400G" + }, + "Ethernet8": { + "default_brkout_mode": "1x400G" + }, + "Ethernet9": { + "default_brkout_mode": "1x400G" + }, + "Ethernet10": { + "default_brkout_mode": "1x400G" + }, + "Ethernet11": { + "default_brkout_mode": "1x400G" + }, + "Ethernet12": { + "default_brkout_mode": "1x400G" + }, + "Ethernet13": { + "default_brkout_mode": "1x400G" + }, + "Ethernet14": { + "default_brkout_mode": "1x400G" + }, + "Ethernet15": { + "default_brkout_mode": "1x400G" + }, + "Ethernet16": { + "default_brkout_mode": "1x400G" + }, + "Ethernet17": { + "default_brkout_mode": "1x400G" + }, + "Ethernet18": { + "default_brkout_mode": "1x400G" + }, + "Ethernet19": { + "default_brkout_mode": "1x400G" + }, + "Ethernet20": { + "default_brkout_mode": "1x400G" + }, + "Ethernet21": { + "default_brkout_mode": "1x400G" + }, + "Ethernet22": { + "default_brkout_mode": "1x400G" + }, + "Ethernet23": { + "default_brkout_mode": "1x400G" + }, + "Ethernet24": { + "default_brkout_mode": "1x400G" + }, + "Ethernet25": { + "default_brkout_mode": "1x400G" + }, + "Ethernet26": { + "default_brkout_mode": "1x400G" + }, + "Ethernet27": { + "default_brkout_mode": "1x400G" + }, + "Ethernet28": { + "default_brkout_mode": "1x400G" + }, + "Ethernet29": { + "default_brkout_mode": "1x400G" + }, + "Ethernet30": { + "default_brkout_mode": "1x400G" + }, + "Ethernet31": { + "default_brkout_mode": "1x400G" + }, + "Ethernet32": { + "default_brkout_mode": "1x400G" + }, + "Ethernet33": { + "default_brkout_mode": "1x400G" + }, + "Ethernet34": { + "default_brkout_mode": "1x400G" + }, + "Ethernet35": { + "default_brkout_mode": "1x400G" + }, + "Ethernet36": { + "default_brkout_mode": "1x400G" + }, + "Ethernet37": { + "default_brkout_mode": "1x400G" + }, + "Ethernet38": { + "default_brkout_mode": "1x400G" + }, + "Ethernet39": { + "default_brkout_mode": "1x400G" + }, + "Ethernet40": { + "default_brkout_mode": "1x400G" + }, + "Ethernet41": { + "default_brkout_mode": "1x400G" + }, + "Ethernet42": { + "default_brkout_mode": "1x400G" + }, + "Ethernet43": { + "default_brkout_mode": "1x400G" + }, + "Ethernet44": { + "default_brkout_mode": "1x400G" + }, + "Ethernet45": { + "default_brkout_mode": "1x400G" + }, + "Ethernet46": { + "default_brkout_mode": "1x400G" + }, + "Ethernet47": { + "default_brkout_mode": "1x400G" + }, + "Ethernet48": { + "default_brkout_mode": "1x400G" + }, + "Ethernet49": { + "default_brkout_mode": "1x400G" + }, + "Ethernet50": { + "default_brkout_mode": "1x400G" + }, + "Ethernet51": { + "default_brkout_mode": "1x400G" + }, + "Ethernet52": { + "default_brkout_mode": "1x400G" + }, + "Ethernet53": { + "default_brkout_mode": "1x400G" + }, + "Ethernet54": { + "default_brkout_mode": "1x400G" + }, + "Ethernet55": { + "default_brkout_mode": "1x400G" + }, + "Ethernet56": { + "default_brkout_mode": "1x400G" + }, + "Ethernet57": { + "default_brkout_mode": "1x400G" + }, + "Ethernet58": { + "default_brkout_mode": "1x400G" + }, + "Ethernet59": { + "default_brkout_mode": "1x400G" + }, + "Ethernet60": { + "default_brkout_mode": "1x400G" + }, + "Ethernet61": { + "default_brkout_mode": "1x400G" + }, + "Ethernet62": { + "default_brkout_mode": "1x400G" + }, + "Ethernet63": { + "default_brkout_mode": "1x400G" + }, + "Ethernet64": { + "default_brkout_mode": "1x400G" + }, + "Ethernet65": { + "default_brkout_mode": "1x400G" + }, + "Ethernet66": { + "default_brkout_mode": "1x400G" + }, + "Ethernet67": { + "default_brkout_mode": "1x400G" + }, + "Ethernet68": { + "default_brkout_mode": "1x400G" + }, + "Ethernet69": { + "default_brkout_mode": "1x400G" + }, + "Ethernet70": { + "default_brkout_mode": "1x400G" + }, + "Ethernet71": { + "default_brkout_mode": "1x400G" + }, + "Ethernet72": { + "default_brkout_mode": "1x400G" + }, + "Ethernet73": { + "default_brkout_mode": "1x400G" + }, + "Ethernet74": { + "default_brkout_mode": "1x400G" + }, + "Ethernet75": { + "default_brkout_mode": "1x400G" + }, + "Ethernet76": { + "default_brkout_mode": "1x400G" + }, + "Ethernet77": { + "default_brkout_mode": "1x400G" + }, + "Ethernet78": { + "default_brkout_mode": "1x400G" + }, + "Ethernet79": { + "default_brkout_mode": "1x400G" + }, + "Ethernet80": { + "default_brkout_mode": "1x400G" + }, + "Ethernet81": { + "default_brkout_mode": "1x400G" + }, + "Ethernet82": { + "default_brkout_mode": "1x400G" + }, + "Ethernet83": { + "default_brkout_mode": "1x400G" + }, + "Ethernet84": { + "default_brkout_mode": "1x400G" + }, + "Ethernet85": { + "default_brkout_mode": "1x400G" + }, + "Ethernet86": { + "default_brkout_mode": "1x400G" + }, + "Ethernet87": { + "default_brkout_mode": "1x400G" + }, + "Ethernet88": { + "default_brkout_mode": "1x400G" + }, + "Ethernet89": { + "default_brkout_mode": "1x400G" + }, + "Ethernet90": { + "default_brkout_mode": "1x400G" + }, + "Ethernet91": { + "default_brkout_mode": "1x400G" + }, + "Ethernet92": { + "default_brkout_mode": "1x400G" + }, + "Ethernet93": { + "default_brkout_mode": "1x400G" + }, + "Ethernet94": { + "default_brkout_mode": "1x400G" + }, + "Ethernet95": { + "default_brkout_mode": "1x400G" + }, + "Ethernet96": { + "default_brkout_mode": "1x400G" + }, + "Ethernet97": { + "default_brkout_mode": "1x400G" + }, + "Ethernet98": { + "default_brkout_mode": "1x400G" + }, + "Ethernet99": { + "default_brkout_mode": "1x400G" + }, + "Ethernet100": { + "default_brkout_mode": "1x400G" + }, + "Ethernet101": { + "default_brkout_mode": "1x400G" + }, + "Ethernet102": { + "default_brkout_mode": "1x400G" + }, + "Ethernet103": { + "default_brkout_mode": "1x400G" + }, + "Ethernet104": { + "default_brkout_mode": "1x400G" + }, + "Ethernet105": { + "default_brkout_mode": "1x400G" + }, + "Ethernet106": { + "default_brkout_mode": "1x400G" + }, + "Ethernet107": { + "default_brkout_mode": "1x400G" + }, + "Ethernet108": { + "default_brkout_mode": "1x400G" + }, + "Ethernet109": { + "default_brkout_mode": "1x400G" + }, + "Ethernet110": { + "default_brkout_mode": "1x400G" + }, + "Ethernet111": { + "default_brkout_mode": "1x400G" + }, + "Ethernet112": { + "default_brkout_mode": "1x400G" + }, + "Ethernet113": { + "default_brkout_mode": "1x400G" + }, + "Ethernet114": { + "default_brkout_mode": "1x400G" + }, + "Ethernet115": { + "default_brkout_mode": "1x400G" + }, + "Ethernet116": { + "default_brkout_mode": "1x400G" + }, + "Ethernet117": { + "default_brkout_mode": "1x400G" + }, + "Ethernet118": { + "default_brkout_mode": "1x400G" + }, + "Ethernet119": { + "default_brkout_mode": "1x400G" + }, + "Ethernet120": { + "default_brkout_mode": "1x400G" + }, + "Ethernet121": { + "default_brkout_mode": "1x400G" + }, + "Ethernet122": { + "default_brkout_mode": "1x400G" + }, + "Ethernet123": { + "default_brkout_mode": "1x400G" + }, + "Ethernet124": { + "default_brkout_mode": "1x400G" + }, + "Ethernet125": { + "default_brkout_mode": "1x400G" + }, + "Ethernet126": { + "default_brkout_mode": "1x400G" + }, + "Ethernet127": { + "default_brkout_mode": "1x400G" + } + } +} diff --git a/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/M2-W6940-128X1-FR4/pg_profile_lookup.ini b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/M2-W6940-128X1-FR4/pg_profile_lookup.ini new file mode 100644 index 00000000000..9b240cc8bf6 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/M2-W6940-128X1-FR4/pg_profile_lookup.ini @@ -0,0 +1,26 @@ +# PG lossless profiles. +# speed cable size xon xoff threshold xon_offset + 10000 5m 18796 0 91440 -2 3556 + 25000 5m 18796 0 91440 -2 3556 + 40000 5m 18796 0 106934 -2 3556 + 50000 5m 18796 0 106934 -2 3556 + 100000 5m 18796 0 147066 -2 3556 + 200000 5m 18796 0 229362 -2 3556 + 400000 5m 18796 0 393192 -2 3556 + 800000 5m 18796 0 729488 -2 3556 + 10000 40m 18796 0 94742 -2 3556 + 25000 40m 18796 0 94742 -2 3556 + 40000 40m 18796 0 113538 -2 3556 + 50000 40m 18796 0 113538 -2 3556 + 100000 40m 18796 0 160274 -2 3556 + 200000 40m 18796 0 255778 -2 3556 + 400000 40m 18796 0 446024 -2 3556 + 800000 40m 18796 0 835406 -2 3556 + 10000 300m 18796 0 258572 -2 3556 + 25000 300m 18796 0 258572 -2 3556 + 40000 300m 18796 0 258572 -2 3556 + 50000 300m 18796 0 258572 -2 3556 + 100000 300m 18796 0 258572 -2 3556 + 200000 300m 18796 0 452374 -2 3556 + 400000 300m 18796 0 839216 -2 3556 + 800000 300m 18796 0 1621536 -2 3556 diff --git a/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/M2-W6940-128X1-FR4/port_config.ini b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/M2-W6940-128X1-FR4/port_config.ini new file mode 100644 index 00000000000..f24ea258a53 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/M2-W6940-128X1-FR4/port_config.ini @@ -0,0 +1,129 @@ +# name lanes alias index speed admin_status fec +Ethernet0 1,2,3,4 etp1 1 400000 down rs +Ethernet1 5,6,7,8 etp2 2 400000 down rs +Ethernet2 9,10,11,12 etp3 3 400000 down rs +Ethernet3 13,14,15,16 etp4 4 400000 down rs +Ethernet4 17,18,19,20 etp5 5 400000 down rs +Ethernet5 21,22,23,24 etp6 6 400000 down rs +Ethernet6 25,26,27,28 etp7 7 400000 down rs +Ethernet7 29,30,31,32 etp8 8 400000 down rs +Ethernet8 33,34,35,36 etp9 9 400000 down rs +Ethernet9 37,38,39,40 etp10 10 400000 down rs +Ethernet10 41,42,43,44 etp11 11 400000 down rs +Ethernet11 45,46,47,48 etp12 12 400000 down rs +Ethernet12 49,50,51,52 etp13 13 400000 down rs +Ethernet13 53,54,55,56 etp14 14 400000 down rs +Ethernet14 57,58,59,60 etp15 15 400000 down rs +Ethernet15 61,62,63,64 etp16 16 400000 down rs +Ethernet16 65,66,67,68 etp17 17 400000 down rs +Ethernet17 69,70,71,72 etp18 18 400000 down rs +Ethernet18 73,74,75,76 etp19 19 400000 down rs +Ethernet19 77,78,79,80 etp20 20 400000 down rs +Ethernet20 81,82,83,84 etp21 21 400000 down rs +Ethernet21 85,86,87,88 etp22 22 400000 down rs +Ethernet22 89,90,91,92 etp23 23 400000 down rs +Ethernet23 93,94,95,96 etp24 24 400000 down rs +Ethernet24 97,98,99,100 etp25 25 400000 down rs +Ethernet25 101,102,103,104 etp26 26 400000 down rs +Ethernet26 105,106,107,108 etp27 27 400000 down rs +Ethernet27 109,110,111,112 etp28 28 400000 down rs +Ethernet28 113,114,115,116 etp29 29 400000 down rs +Ethernet29 117,118,119,120 etp30 30 400000 down rs +Ethernet30 121,122,123,124 etp31 31 400000 down rs +Ethernet31 125,126,127,128 etp32 32 400000 down rs +Ethernet32 129,130,131,132 etp33 33 400000 down rs +Ethernet33 133,134,135,136 etp34 34 400000 down rs +Ethernet34 137,138,139,140 etp35 35 400000 down rs +Ethernet35 141,142,143,144 etp36 36 400000 down rs +Ethernet36 145,146,147,148 etp37 37 400000 down rs +Ethernet37 149,150,151,152 etp38 38 400000 down rs +Ethernet38 153,154,155,156 etp39 39 400000 down rs +Ethernet39 157,158,159,160 etp40 40 400000 down rs +Ethernet40 161,162,163,164 etp41 41 400000 down rs +Ethernet41 165,166,167,168 etp42 42 400000 down rs +Ethernet42 169,170,171,172 etp43 43 400000 down rs +Ethernet43 173,174,175,176 etp44 44 400000 down rs +Ethernet44 177,178,179,180 etp45 45 400000 down rs +Ethernet45 181,182,183,184 etp46 46 400000 down rs +Ethernet46 185,186,187,188 etp47 47 400000 down rs +Ethernet47 189,190,191,192 etp48 48 400000 down rs +Ethernet48 193,194,195,196 etp49 49 400000 down rs +Ethernet49 197,198,199,200 etp50 50 400000 down rs +Ethernet50 201,202,203,204 etp51 51 400000 down rs +Ethernet51 205,206,207,208 etp52 52 400000 down rs +Ethernet52 209,210,211,212 etp53 53 400000 down rs +Ethernet53 213,214,215,216 etp54 54 400000 down rs +Ethernet54 217,218,219,220 etp55 55 400000 down rs +Ethernet55 221,222,223,224 etp56 56 400000 down rs +Ethernet56 225,226,227,228 etp57 57 400000 down rs +Ethernet57 229,230,231,232 etp58 58 400000 down rs +Ethernet58 233,234,235,236 etp59 59 400000 down rs +Ethernet59 237,238,239,240 etp60 60 400000 down rs +Ethernet60 241,242,243,244 etp61 61 400000 down rs +Ethernet61 245,246,247,248 etp62 62 400000 down rs +Ethernet62 249,250,251,252 etp63 63 400000 down rs +Ethernet63 253,254,255,256 etp64 64 400000 down rs +Ethernet64 257,258,259,260 etp65 65 400000 down rs +Ethernet65 261,262,263,264 etp66 66 400000 down rs +Ethernet66 265,266,267,268 etp67 67 400000 down rs +Ethernet67 269,270,271,272 etp68 68 400000 down rs +Ethernet68 273,274,275,276 etp69 69 400000 down rs +Ethernet69 277,278,279,280 etp70 70 400000 down rs +Ethernet70 281,282,283,284 etp71 71 400000 down rs +Ethernet71 285,286,287,288 etp72 72 400000 down rs +Ethernet72 289,290,291,292 etp73 73 400000 down rs +Ethernet73 293,294,295,296 etp74 74 400000 down rs +Ethernet74 297,298,299,300 etp75 75 400000 down rs +Ethernet75 301,302,303,304 etp76 76 400000 down rs +Ethernet76 305,306,307,308 etp77 77 400000 down rs +Ethernet77 309,310,311,312 etp78 78 400000 down rs +Ethernet78 313,314,315,316 etp79 79 400000 down rs +Ethernet79 317,318,319,320 etp80 80 400000 down rs +Ethernet80 321,322,323,324 etp81 81 400000 down rs +Ethernet81 325,326,327,328 etp82 82 400000 down rs +Ethernet82 329,330,331,332 etp83 83 400000 down rs +Ethernet83 333,334,335,336 etp84 84 400000 down rs +Ethernet84 337,338,339,340 etp85 85 400000 down rs +Ethernet85 341,342,343,344 etp86 86 400000 down rs +Ethernet86 345,346,347,348 etp87 87 400000 down rs +Ethernet87 349,350,351,352 etp88 88 400000 down rs +Ethernet88 353,354,355,356 etp89 89 400000 down rs +Ethernet89 357,358,359,360 etp90 90 400000 down rs +Ethernet90 361,362,363,364 etp91 91 400000 down rs +Ethernet91 365,366,367,368 etp92 92 400000 down rs +Ethernet92 369,370,371,372 etp93 93 400000 down rs +Ethernet93 373,374,375,376 etp94 94 400000 down rs +Ethernet94 377,378,379,380 etp95 95 400000 down rs +Ethernet95 381,382,383,384 etp96 96 400000 down rs +Ethernet96 385,386,387,388 etp97 97 400000 down rs +Ethernet97 389,390,391,392 etp98 98 400000 down rs +Ethernet98 393,394,395,396 etp99 99 400000 down rs +Ethernet99 397,398,399,400 etp100 100 400000 down rs +Ethernet100 401,402,403,404 etp101 101 400000 down rs +Ethernet101 405,406,407,408 etp102 102 400000 down rs +Ethernet102 409,410,411,412 etp103 103 400000 down rs +Ethernet103 413,414,415,416 etp104 104 400000 down rs +Ethernet104 417,418,419,420 etp105 105 400000 down rs +Ethernet105 421,422,423,424 etp106 106 400000 down rs +Ethernet106 425,426,427,428 etp107 107 400000 down rs +Ethernet107 429,430,431,432 etp108 108 400000 down rs +Ethernet108 433,434,435,436 etp109 109 400000 down rs +Ethernet109 437,438,439,440 etp110 110 400000 down rs +Ethernet110 441,442,443,444 etp111 111 400000 down rs +Ethernet111 445,446,447,448 etp112 112 400000 down rs +Ethernet112 449,450,451,452 etp113 113 400000 down rs +Ethernet113 453,454,455,456 etp114 114 400000 down rs +Ethernet114 457,458,459,460 etp115 115 400000 down rs +Ethernet115 461,462,463,464 etp116 116 400000 down rs +Ethernet116 465,466,467,468 etp117 117 400000 down rs +Ethernet117 469,470,471,472 etp118 118 400000 down rs +Ethernet118 473,474,475,476 etp119 119 400000 down rs +Ethernet119 477,478,479,480 etp120 120 400000 down rs +Ethernet120 481,482,483,484 etp121 121 400000 down rs +Ethernet121 485,486,487,488 etp122 122 400000 down rs +Ethernet122 489,490,491,492 etp123 123 400000 down rs +Ethernet123 493,494,495,496 etp124 124 400000 down rs +Ethernet124 497,498,499,500 etp125 125 400000 down rs +Ethernet125 501,502,503,504 etp126 126 400000 down rs +Ethernet126 505,506,507,508 etp127 127 400000 down rs +Ethernet127 509,510,511,512 etp128 128 400000 down rs diff --git a/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/M2-W6940-128X1-FR4/qos.json.j2 b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/M2-W6940-128X1-FR4/qos.json.j2 new file mode 100644 index 00000000000..3e548325ea3 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/M2-W6940-128X1-FR4/qos.json.j2 @@ -0,0 +1 @@ +{%- include 'qos_config.j2' %} diff --git a/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/M2-W6940-128X1-FR4/sai.profile b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/M2-W6940-128X1-FR4/sai.profile new file mode 100644 index 00000000000..37bedaa27d3 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/M2-W6940-128X1-FR4/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th5-m2-w6940-128x1-fr4-128x400g.yml \ No newline at end of file diff --git a/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/M2-W6940-128X1-FR4/th5-m2-w6940-128x1-fr4-128x400g.yml b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/M2-W6940-128X1-FR4/th5-m2-w6940-128x1-fr4-128x400g.yml new file mode 100644 index 00000000000..ec8a4d20a1b --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/M2-W6940-128X1-FR4/th5-m2-w6940-128x1-fr4-128x400g.yml @@ -0,0 +1,1381 @@ +--- +device: + 0: + DEVICE_CONFIG: + AUTOLOAD_BOARD_SETTINGS: 0 +... +--- +device: + 0: + # Per pipe flex counter configuration + CTR_EFLEX_CONFIG: + CTR_ING_EFLEX_OPERMODE_PIPEUNIQUE: 1 + CTR_ING_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1 + CTR_EGR_EFLEX_OPERMODE_PIPEUNIQUE: 1 + CTR_EGR_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1 + FP_CONFIG: + FP_ING_OPERMODE: GLOBAL_PIPE_AWARE +... +--- +bcm_device: + 0: + global: + bcm_tunnel_term_compatible_mode: 1 + vlan_flooding_l2mc_num_reserved: 2048 + l3_alpm_template: 1 + l3_alpm2_bnk_threshold: 100 + uft_mode: 1 + l3_enable: 1 + l3_intf_vlan_split_egress: 1 + l2_hitbit_enable: 0 + pktio_mode: 1 + sai_pfc_defaults_disable: 1 + sai_optimized_mmu: 1 + global_flexctr_ing_action_num_reserved: 20 + global_flexctr_ing_pool_num_reserved: 8 + global_flexctr_ing_op_profile_num_reserved: 20 + global_flexctr_ing_group_num_reserved: 2 + global_flexctr_egr_action_num_reserved: 8 + global_flexctr_egr_pool_num_reserved: 5 + global_flexctr_egr_op_profile_num_reserved: 10 + global_flexctr_egr_group_num_reserved: 1 + flowtracker_flexctr_alloc_enable: 1 +... + +--- +device: + 0: + PC_PM_CORE: + ? + PC_PM_ID: 1 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x23106754 + TX_LANE_MAP: 0x32017645 + RX_POLARITY_FLIP: 0X22 + TX_POLARITY_FLIP: 0XEE + ? + PC_PM_ID: 2 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x30217465 + TX_LANE_MAP: 0x03124756 + RX_POLARITY_FLIP: 0X11 + TX_POLARITY_FLIP: 0X55 + ? + PC_PM_ID: 3 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x23106754 + TX_LANE_MAP: 0x32017645 + RX_POLARITY_FLIP: 0X22 + TX_POLARITY_FLIP: 0XEE + ? + PC_PM_ID: 4 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x30217465 + TX_LANE_MAP: 0x03124756 + RX_POLARITY_FLIP: 0X11 + TX_POLARITY_FLIP: 0X55 + ? + PC_PM_ID: 5 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x32017645 + TX_LANE_MAP: 0x23106754 + RX_POLARITY_FLIP: 0X41 + TX_POLARITY_FLIP: 0X7D + ? + PC_PM_ID: 6 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x01324576 + TX_LANE_MAP: 0x10236754 + RX_POLARITY_FLIP: 0X3D + TX_POLARITY_FLIP: 0XC3 + ? + PC_PM_ID: 7 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x01324576 + TX_LANE_MAP: 0x10236754 + RX_POLARITY_FLIP: 0X3D + TX_POLARITY_FLIP: 0X83 + ? + PC_PM_ID: 8 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x01324576 + TX_LANE_MAP: 0x10236754 + RX_POLARITY_FLIP: 0X3D + TX_POLARITY_FLIP: 0X27 + ? + PC_PM_ID: 9 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x10235467 + TX_LANE_MAP: 0x01327645 + RX_POLARITY_FLIP: 0X3E + TX_POLARITY_FLIP: 0X43 + ? + PC_PM_ID: 10 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x10235467 + TX_LANE_MAP: 0x01327645 + RX_POLARITY_FLIP: 0X3E + TX_POLARITY_FLIP: 0X43 + ? + PC_PM_ID: 11 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x10235467 + TX_LANE_MAP: 0x01327645 + RX_POLARITY_FLIP: 0X3E + TX_POLARITY_FLIP: 0X43 + ? + PC_PM_ID: 12 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x10235467 + TX_LANE_MAP: 0x01327645 + RX_POLARITY_FLIP: 0X3E + TX_POLARITY_FLIP: 0X43 + ? + PC_PM_ID: 13 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x01324576 + TX_LANE_MAP: 0x10236754 + RX_POLARITY_FLIP: 0X3D + TX_POLARITY_FLIP: 0X83 + ? + PC_PM_ID: 14 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x01324576 + TX_LANE_MAP: 0x10236754 + RX_POLARITY_FLIP: 0X3D + TX_POLARITY_FLIP: 0X83 + ? + PC_PM_ID: 15 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x01324576 + TX_LANE_MAP: 0x10236754 + RX_POLARITY_FLIP: 0X3D + TX_POLARITY_FLIP: 0X83 + ? + PC_PM_ID: 16 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x01324576 + TX_LANE_MAP: 0x10236754 + RX_POLARITY_FLIP: 0X3D + TX_POLARITY_FLIP: 0X83 + ? + PC_PM_ID: 17 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x67542310 + TX_LANE_MAP: 0x45763201 + RX_POLARITY_FLIP: 0XBC + TX_POLARITY_FLIP: 0XC1 + ? + PC_PM_ID: 18 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x67542310 + TX_LANE_MAP: 0x45763201 + RX_POLARITY_FLIP: 0XBC + TX_POLARITY_FLIP: 0XC1 + ? + PC_PM_ID: 19 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x67542310 + TX_LANE_MAP: 0x45763201 + RX_POLARITY_FLIP: 0XBC + TX_POLARITY_FLIP: 0XC1 + ? + PC_PM_ID: 20 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x67542310 + TX_LANE_MAP: 0x45763201 + RX_POLARITY_FLIP: 0XBC + TX_POLARITY_FLIP: 0XC1 + ? + PC_PM_ID: 21 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x76453201 + TX_LANE_MAP: 0x54672310 + RX_POLARITY_FLIP: 0X7C + TX_POLARITY_FLIP: 0XC2 + ? + PC_PM_ID: 22 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x76453201 + TX_LANE_MAP: 0x54672310 + RX_POLARITY_FLIP: 0X7C + TX_POLARITY_FLIP: 0XC2 + ? + PC_PM_ID: 23 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x76453201 + TX_LANE_MAP: 0x54672310 + RX_POLARITY_FLIP: 0X7C + TX_POLARITY_FLIP: 0XC2 + ? + PC_PM_ID: 24 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x76453201 + TX_LANE_MAP: 0x54672310 + RX_POLARITY_FLIP: 0X7C + TX_POLARITY_FLIP: 0XC2 + ? + PC_PM_ID: 25 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x67542310 + TX_LANE_MAP: 0x45763201 + RX_POLARITY_FLIP: 0XBC + TX_POLARITY_FLIP: 0XE4 + ? + PC_PM_ID: 26 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x67542310 + TX_LANE_MAP: 0x45763201 + RX_POLARITY_FLIP: 0XBC + TX_POLARITY_FLIP: 0XC1 + ? + PC_PM_ID: 27 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x67542310 + TX_LANE_MAP: 0x45763201 + RX_POLARITY_FLIP: 0XBC + TX_POLARITY_FLIP: 0XC3 + ? + PC_PM_ID: 28 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x54671023 + TX_LANE_MAP: 0x45760132 + RX_POLARITY_FLIP: 0X82 + TX_POLARITY_FLIP: 0XBE + ? + PC_PM_ID: 29 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x56471203 + TX_LANE_MAP: 0x65742130 + RX_POLARITY_FLIP: 0X88 + TX_POLARITY_FLIP: 0XAA + ? + PC_PM_ID: 30 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x45760132 + TX_LANE_MAP: 0x54671023 + RX_POLARITY_FLIP: 0X44 + TX_POLARITY_FLIP: 0X77 + ? + PC_PM_ID: 31 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x56471203 + TX_LANE_MAP: 0x65742130 + RX_POLARITY_FLIP: 0X88 + TX_POLARITY_FLIP: 0XAA + ? + PC_PM_ID: 32 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x45760132 + TX_LANE_MAP: 0x54671023 + RX_POLARITY_FLIP: 0X44 + TX_POLARITY_FLIP: 0X77 + ? + PC_PM_ID: 33 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x23106754 + TX_LANE_MAP: 0x32017645 + RX_POLARITY_FLIP: 0X22 + TX_POLARITY_FLIP: 0XEE + ? + PC_PM_ID: 34 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x30217465 + TX_LANE_MAP: 0x03124756 + RX_POLARITY_FLIP: 0X11 + TX_POLARITY_FLIP: 0X55 + ? + PC_PM_ID: 35 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x23106754 + TX_LANE_MAP: 0x32017645 + RX_POLARITY_FLIP: 0X22 + TX_POLARITY_FLIP: 0XEE + ? + PC_PM_ID: 36 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x30217465 + TX_LANE_MAP: 0x03124756 + RX_POLARITY_FLIP: 0X11 + TX_POLARITY_FLIP: 0X55 + ? + PC_PM_ID: 37 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x32017645 + TX_LANE_MAP: 0x23106754 + RX_POLARITY_FLIP: 0X41 + TX_POLARITY_FLIP: 0X7D + ? + PC_PM_ID: 38 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x01324576 + TX_LANE_MAP: 0x10236754 + RX_POLARITY_FLIP: 0X3D + TX_POLARITY_FLIP: 0XC3 + ? + PC_PM_ID: 39 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x01324576 + TX_LANE_MAP: 0x10236754 + RX_POLARITY_FLIP: 0X3D + TX_POLARITY_FLIP: 0X83 + ? + PC_PM_ID: 40 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x01324576 + TX_LANE_MAP: 0x10236754 + RX_POLARITY_FLIP: 0X3D + TX_POLARITY_FLIP: 0X27 + ? + PC_PM_ID: 41 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x10235467 + TX_LANE_MAP: 0x01327645 + RX_POLARITY_FLIP: 0X3E + TX_POLARITY_FLIP: 0X43 + ? + PC_PM_ID: 42 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x10235467 + TX_LANE_MAP: 0x01327645 + RX_POLARITY_FLIP: 0X3E + TX_POLARITY_FLIP: 0X43 + ? + PC_PM_ID: 43 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x10235467 + TX_LANE_MAP: 0x01327645 + RX_POLARITY_FLIP: 0X3E + TX_POLARITY_FLIP: 0X43 + ? + PC_PM_ID: 44 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x10235467 + TX_LANE_MAP: 0x01327645 + RX_POLARITY_FLIP: 0X3E + TX_POLARITY_FLIP: 0X43 + ? + PC_PM_ID: 45 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x01324576 + TX_LANE_MAP: 0x10236754 + RX_POLARITY_FLIP: 0X3D + TX_POLARITY_FLIP: 0X83 + ? + PC_PM_ID: 46 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x01324576 + TX_LANE_MAP: 0x10236754 + RX_POLARITY_FLIP: 0X3D + TX_POLARITY_FLIP: 0X83 + ? + PC_PM_ID: 47 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x01324576 + TX_LANE_MAP: 0x10236754 + RX_POLARITY_FLIP: 0X3D + TX_POLARITY_FLIP: 0X83 + ? + PC_PM_ID: 48 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x01324576 + TX_LANE_MAP: 0x10236754 + RX_POLARITY_FLIP: 0X3D + TX_POLARITY_FLIP: 0X83 + ? + PC_PM_ID: 49 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x67542310 + TX_LANE_MAP: 0x45763201 + RX_POLARITY_FLIP: 0XBC + TX_POLARITY_FLIP: 0XC1 + ? + PC_PM_ID: 50 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x67542310 + TX_LANE_MAP: 0x45763201 + RX_POLARITY_FLIP: 0XBC + TX_POLARITY_FLIP: 0XC1 + ? + PC_PM_ID: 51 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x67542310 + TX_LANE_MAP: 0x45763201 + RX_POLARITY_FLIP: 0XBC + TX_POLARITY_FLIP: 0XC1 + ? + PC_PM_ID: 52 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x67542310 + TX_LANE_MAP: 0x45763201 + RX_POLARITY_FLIP: 0XBC + TX_POLARITY_FLIP: 0XC1 + ? + PC_PM_ID: 53 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x76453201 + TX_LANE_MAP: 0x54672310 + RX_POLARITY_FLIP: 0X7C + TX_POLARITY_FLIP: 0XC2 + ? + PC_PM_ID: 54 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x76453201 + TX_LANE_MAP: 0x54672310 + RX_POLARITY_FLIP: 0X7C + TX_POLARITY_FLIP: 0XC2 + ? + PC_PM_ID: 55 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x76453201 + TX_LANE_MAP: 0x54672310 + RX_POLARITY_FLIP: 0X7C + TX_POLARITY_FLIP: 0XC2 + ? + PC_PM_ID: 56 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x76453201 + TX_LANE_MAP: 0x54672310 + RX_POLARITY_FLIP: 0X7C + TX_POLARITY_FLIP: 0XC2 + ? + PC_PM_ID: 57 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x67542310 + TX_LANE_MAP: 0x45763201 + RX_POLARITY_FLIP: 0XBC + TX_POLARITY_FLIP: 0XE4 + ? + PC_PM_ID: 58 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x67542310 + TX_LANE_MAP: 0x45763201 + RX_POLARITY_FLIP: 0XBC + TX_POLARITY_FLIP: 0XC1 + ? + PC_PM_ID: 59 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x67542310 + TX_LANE_MAP: 0x45763201 + RX_POLARITY_FLIP: 0XBC + TX_POLARITY_FLIP: 0XC3 + ? + PC_PM_ID: 60 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x54671023 + TX_LANE_MAP: 0x45760132 + RX_POLARITY_FLIP: 0X82 + TX_POLARITY_FLIP: 0XBE + ? + PC_PM_ID: 61 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x56471203 + TX_LANE_MAP: 0x65742130 + RX_POLARITY_FLIP: 0X88 + TX_POLARITY_FLIP: 0XAA + ? + PC_PM_ID: 62 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x45760132 + TX_LANE_MAP: 0x54671023 + RX_POLARITY_FLIP: 0X44 + TX_POLARITY_FLIP: 0X77 + ? + PC_PM_ID: 63 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x56471203 + TX_LANE_MAP: 0x65742130 + RX_POLARITY_FLIP: 0X88 + TX_POLARITY_FLIP: 0XAA + ? + PC_PM_ID: 64 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x45760132 + TX_LANE_MAP: 0x54671023 + RX_POLARITY_FLIP: 0X44 + TX_POLARITY_FLIP: 0X77 +... +--- +device: + 0: + PC_PORT_PHYS_MAP: + ? + PORT_ID: 1 + : + PC_PHYS_PORT_ID: 1 + ? + PORT_ID: 2 + : + PC_PHYS_PORT_ID: 5 + ? + PORT_ID: 3 + : + PC_PHYS_PORT_ID: 9 + ? + PORT_ID: 4 + : + PC_PHYS_PORT_ID: 13 + ? + PORT_ID: 11 + : + PC_PHYS_PORT_ID: 17 + ? + PORT_ID: 12 + : + PC_PHYS_PORT_ID: 21 + ? + PORT_ID: 13 + : + PC_PHYS_PORT_ID: 25 + ? + PORT_ID: 14 + : + PC_PHYS_PORT_ID: 29 + ? + PORT_ID: 22 + : + PC_PHYS_PORT_ID: 33 + ? + PORT_ID: 23 + : + PC_PHYS_PORT_ID: 37 + ? + PORT_ID: 24 + : + PC_PHYS_PORT_ID: 41 + ? + PORT_ID: 25 + : + PC_PHYS_PORT_ID: 45 + ? + PORT_ID: 33 + : + PC_PHYS_PORT_ID: 49 + ? + PORT_ID: 34 + : + PC_PHYS_PORT_ID: 53 + ? + PORT_ID: 35 + : + PC_PHYS_PORT_ID: 57 + ? + PORT_ID: 36 + : + PC_PHYS_PORT_ID: 61 + ? + PORT_ID: 44 + : + PC_PHYS_PORT_ID: 65 + ? + PORT_ID: 45 + : + PC_PHYS_PORT_ID: 69 + ? + PORT_ID: 46 + : + PC_PHYS_PORT_ID: 73 + ? + PORT_ID: 47 + : + PC_PHYS_PORT_ID: 77 + ? + PORT_ID: 55 + : + PC_PHYS_PORT_ID: 81 + ? + PORT_ID: 56 + : + PC_PHYS_PORT_ID: 85 + ? + PORT_ID: 57 + : + PC_PHYS_PORT_ID: 89 + ? + PORT_ID: 58 + : + PC_PHYS_PORT_ID: 93 + ? + PORT_ID: 66 + : + PC_PHYS_PORT_ID: 97 + ? + PORT_ID: 67 + : + PC_PHYS_PORT_ID: 101 + ? + PORT_ID: 68 + : + PC_PHYS_PORT_ID: 105 + ? + PORT_ID: 69 + : + PC_PHYS_PORT_ID: 109 + ? + PORT_ID: 77 + : + PC_PHYS_PORT_ID: 113 + ? + PORT_ID: 78 + : + PC_PHYS_PORT_ID: 117 + ? + PORT_ID: 79 + : + PC_PHYS_PORT_ID: 121 + ? + PORT_ID: 80 + : + PC_PHYS_PORT_ID: 125 + ? + PORT_ID: 88 + : + PC_PHYS_PORT_ID: 129 + ? + PORT_ID: 89 + : + PC_PHYS_PORT_ID: 133 + ? + PORT_ID: 90 + : + PC_PHYS_PORT_ID: 137 + ? + PORT_ID: 91 + : + PC_PHYS_PORT_ID: 141 + ? + PORT_ID: 99 + : + PC_PHYS_PORT_ID: 145 + ? + PORT_ID: 100 + : + PC_PHYS_PORT_ID: 149 + ? + PORT_ID: 101 + : + PC_PHYS_PORT_ID: 153 + ? + PORT_ID: 102 + : + PC_PHYS_PORT_ID: 157 + ? + PORT_ID: 110 + : + PC_PHYS_PORT_ID: 161 + ? + PORT_ID: 111 + : + PC_PHYS_PORT_ID: 165 + ? + PORT_ID: 112 + : + PC_PHYS_PORT_ID: 169 + ? + PORT_ID: 113 + : + PC_PHYS_PORT_ID: 173 + ? + PORT_ID: 121 + : + PC_PHYS_PORT_ID: 177 + ? + PORT_ID: 122 + : + PC_PHYS_PORT_ID: 181 + ? + PORT_ID: 123 + : + PC_PHYS_PORT_ID: 185 + ? + PORT_ID: 124 + : + PC_PHYS_PORT_ID: 189 + ? + PORT_ID: 132 + : + PC_PHYS_PORT_ID: 193 + ? + PORT_ID: 133 + : + PC_PHYS_PORT_ID: 197 + ? + PORT_ID: 134 + : + PC_PHYS_PORT_ID: 201 + ? + PORT_ID: 135 + : + PC_PHYS_PORT_ID: 205 + ? + PORT_ID: 143 + : + PC_PHYS_PORT_ID: 209 + ? + PORT_ID: 144 + : + PC_PHYS_PORT_ID: 213 + ? + PORT_ID: 145 + : + PC_PHYS_PORT_ID: 217 + ? + PORT_ID: 146 + : + PC_PHYS_PORT_ID: 221 + ? + PORT_ID: 154 + : + PC_PHYS_PORT_ID: 225 + ? + PORT_ID: 155 + : + PC_PHYS_PORT_ID: 229 + ? + PORT_ID: 156 + : + PC_PHYS_PORT_ID: 233 + ? + PORT_ID: 157 + : + PC_PHYS_PORT_ID: 237 + ? + PORT_ID: 165 + : + PC_PHYS_PORT_ID: 241 + ? + PORT_ID: 166 + : + PC_PHYS_PORT_ID: 245 + ? + PORT_ID: 167 + : + PC_PHYS_PORT_ID: 249 + ? + PORT_ID: 168 + : + PC_PHYS_PORT_ID: 253 + ? + PORT_ID: 176 + : + PC_PHYS_PORT_ID: 257 + ? + PORT_ID: 177 + : + PC_PHYS_PORT_ID: 261 + ? + PORT_ID: 178 + : + PC_PHYS_PORT_ID: 265 + ? + PORT_ID: 179 + : + PC_PHYS_PORT_ID: 269 + ? + PORT_ID: 187 + : + PC_PHYS_PORT_ID: 273 + ? + PORT_ID: 188 + : + PC_PHYS_PORT_ID: 277 + ? + PORT_ID: 189 + : + PC_PHYS_PORT_ID: 281 + ? + PORT_ID: 190 + : + PC_PHYS_PORT_ID: 285 + ? + PORT_ID: 198 + : + PC_PHYS_PORT_ID: 289 + ? + PORT_ID: 199 + : + PC_PHYS_PORT_ID: 293 + ? + PORT_ID: 200 + : + PC_PHYS_PORT_ID: 297 + ? + PORT_ID: 201 + : + PC_PHYS_PORT_ID: 301 + ? + PORT_ID: 209 + : + PC_PHYS_PORT_ID: 305 + ? + PORT_ID: 210 + : + PC_PHYS_PORT_ID: 309 + ? + PORT_ID: 211 + : + PC_PHYS_PORT_ID: 313 + ? + PORT_ID: 212 + : + PC_PHYS_PORT_ID: 317 + ? + PORT_ID: 220 + : + PC_PHYS_PORT_ID: 321 + ? + PORT_ID: 221 + : + PC_PHYS_PORT_ID: 325 + ? + PORT_ID: 222 + : + PC_PHYS_PORT_ID: 329 + ? + PORT_ID: 223 + : + PC_PHYS_PORT_ID: 333 + ? + PORT_ID: 231 + : + PC_PHYS_PORT_ID: 337 + ? + PORT_ID: 232 + : + PC_PHYS_PORT_ID: 341 + ? + PORT_ID: 233 + : + PC_PHYS_PORT_ID: 345 + ? + PORT_ID: 234 + : + PC_PHYS_PORT_ID: 349 + ? + PORT_ID: 242 + : + PC_PHYS_PORT_ID: 353 + ? + PORT_ID: 243 + : + PC_PHYS_PORT_ID: 357 + ? + PORT_ID: 244 + : + PC_PHYS_PORT_ID: 361 + ? + PORT_ID: 245 + : + PC_PHYS_PORT_ID: 365 + ? + PORT_ID: 253 + : + PC_PHYS_PORT_ID: 369 + ? + PORT_ID: 254 + : + PC_PHYS_PORT_ID: 373 + ? + PORT_ID: 255 + : + PC_PHYS_PORT_ID: 377 + ? + PORT_ID: 256 + : + PC_PHYS_PORT_ID: 381 + ? + PORT_ID: 264 + : + PC_PHYS_PORT_ID: 385 + ? + PORT_ID: 265 + : + PC_PHYS_PORT_ID: 389 + ? + PORT_ID: 266 + : + PC_PHYS_PORT_ID: 393 + ? + PORT_ID: 267 + : + PC_PHYS_PORT_ID: 397 + ? + PORT_ID: 275 + : + PC_PHYS_PORT_ID: 401 + ? + PORT_ID: 276 + : + PC_PHYS_PORT_ID: 405 + ? + PORT_ID: 277 + : + PC_PHYS_PORT_ID: 409 + ? + PORT_ID: 278 + : + PC_PHYS_PORT_ID: 413 + ? + PORT_ID: 286 + : + PC_PHYS_PORT_ID: 417 + ? + PORT_ID: 287 + : + PC_PHYS_PORT_ID: 421 + ? + PORT_ID: 288 + : + PC_PHYS_PORT_ID: 425 + ? + PORT_ID: 289 + : + PC_PHYS_PORT_ID: 429 + ? + PORT_ID: 297 + : + PC_PHYS_PORT_ID: 433 + ? + PORT_ID: 298 + : + PC_PHYS_PORT_ID: 437 + ? + PORT_ID: 299 + : + PC_PHYS_PORT_ID: 441 + ? + PORT_ID: 300 + : + PC_PHYS_PORT_ID: 445 + ? + PORT_ID: 308 + : + PC_PHYS_PORT_ID: 449 + ? + PORT_ID: 309 + : + PC_PHYS_PORT_ID: 453 + ? + PORT_ID: 310 + : + PC_PHYS_PORT_ID: 457 + ? + PORT_ID: 311 + : + PC_PHYS_PORT_ID: 461 + ? + PORT_ID: 319 + : + PC_PHYS_PORT_ID: 465 + ? + PORT_ID: 320 + : + PC_PHYS_PORT_ID: 469 + ? + PORT_ID: 321 + : + PC_PHYS_PORT_ID: 473 + ? + PORT_ID: 322 + : + PC_PHYS_PORT_ID: 477 + ? + PORT_ID: 330 + : + PC_PHYS_PORT_ID: 481 + ? + PORT_ID: 331 + : + PC_PHYS_PORT_ID: 485 + ? + PORT_ID: 332 + : + PC_PHYS_PORT_ID: 489 + ? + PORT_ID: 333 + : + PC_PHYS_PORT_ID: 493 + ? + PORT_ID: 341 + : + PC_PHYS_PORT_ID: 497 + ? + PORT_ID: 342 + : + PC_PHYS_PORT_ID: 501 + ? + PORT_ID: 343 + : + PC_PHYS_PORT_ID: 505 + ? + PORT_ID: 344 + : + PC_PHYS_PORT_ID: 509 +... + +--- +device: + 0: + PC_PORT: + ? + PORT_ID: [1, 2, 3, 4, 11, 12, 13, 14, 22, 23, 24, 25, 33, 34, 35, 36, 44, 45, 46, 47, 55, 56, 57, 58, 66, 67, 68, 69, 77, 78, 79, 80, 88, 89, 90, 91, 99, 100, 101, 102, 110, 111, 112, 113, 121, 122, 123, 124, 132, 133, 134, 135, 143, 144, 145, 146, 154, 155, 156, 157, 165, 166, 167, 168, 176, 177, 178, 179, 187, 188, 189, 190, 198, 199, 200, 201, 209, 210, 211, 212, 220, 221, 222, 223, 231, 232, 233, 234, 242, 243, 244, 245, 253, 254, 255, 256, 264, 265, 266, 267, 275, 276, 277, 278, 286, 287, 288, 289, 297, 298, 299, 300, 308, 309, 310, 311, 319, 320, 321, 322, 330, 331, 332, 333, 341, 342, 343, 344] + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 +... +--- +device: + 0: + PC_TX_TAPS: + ? + PORT_ID: [1, 2, 3, 4, 11, 12, 13, 14, 22, 23, 24, 25, 33, 34, 35, 36, 44, 45, 46, 47, 55, 56, 57, 58, 66, 67, 68, 69, 77, 78, 79, 80, 88, 89, 90, 91, 99, 100, 101, 102, 110, 111, 112, 113, 121, 122, 123, 124, 132, 133, 134, 135, 143, 144, 145, 146, 154, 155, 156, 157, 165, 166, 167, 168, 176, 177, 178, 179, 187, 188, 189, 190, 198, 199, 200, 201, 209, 210, 211, 212, 220, 221, 222, 223, 231, 232, 233, 234, 242, 243, 244, 245, 253, 254, 255, 256, 264, 265, 266, 267, 275, 276, 277, 278, 286, 287, 288, 289, 297, 298, 299, 300, 308, 309, 310, 311, 319, 320, 321, 322, 330, 331, 332, 333, 341, 342, 343, 344] + LANE_INDEX: [[0,3]] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_SIG_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TXFIR_TAP_MODE_AUTO: 0 + TX_PRE3_SIGN: 0 + TX_PRE3: 0 + TX_PRE3_AUTO: 0 + TX_PRE2_SIGN: 0 + TX_PRE2: 1 + TX_PRE2_AUTO: 0 + TX_PRE_SIGN: 1 + TX_PRE: 8 + TX_PRE_AUTO: 0 + TX_MAIN: 80 + TX_MAIN_AUTO: 0 + TX_POST_SIGN: 1 + TX_POST: 4 + TX_POST_AUTO: 0 + TX_POST2_SIGN: 1 + TX_POST2: 1 + TX_POST2_AUTO: 0 + TX_POST3_SIGN: 0 + TX_POST3: 0 + TX_POST3_AUTO: 0 +... diff --git a/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/M2-W6940-64X1-FR4/buffers.json.j2 b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/M2-W6940-64X1-FR4/buffers.json.j2 new file mode 100644 index 00000000000..0b1cb2c541b --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/M2-W6940-64X1-FR4/buffers.json.j2 @@ -0,0 +1,2 @@ +{%- set default_topo = 't1' %} +{%- include 'buffers_config.j2' %} diff --git a/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/M2-W6940-64X1-FR4/buffers_defaults_ft2.j2 b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/M2-W6940-64X1-FR4/buffers_defaults_ft2.j2 new file mode 100644 index 00000000000..ef380c86c4a --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/M2-W6940-64X1-FR4/buffers_defaults_ft2.j2 @@ -0,0 +1,36 @@ + +{%- set default_cable = '5m' %} + +{%- macro generate_buffer_pool_and_profiles() %} + + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "162539680", + "type": "ingress", + "mode": "dynamic", + "xoff": "33374584" + }, + "egress_lossless_pool": { + "size": "162539680", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"ingress_lossless_pool", + "size":"0", + "static_th":"165867080" + }, + "egress_lossless_profile": { + "pool":"egress_lossless_pool", + "size":"0", + "static_th":"165867080" + }, + "egress_lossy_profile": { + "pool":"egress_lossless_pool", + "size":"1778", + "dynamic_th":"0" + } + }, +{%- endmacro %} diff --git a/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/M2-W6940-64X1-FR4/buffers_defaults_lt2.j2 b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/M2-W6940-64X1-FR4/buffers_defaults_lt2.j2 new file mode 100644 index 00000000000..ef380c86c4a --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/M2-W6940-64X1-FR4/buffers_defaults_lt2.j2 @@ -0,0 +1,36 @@ + +{%- set default_cable = '5m' %} + +{%- macro generate_buffer_pool_and_profiles() %} + + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "162539680", + "type": "ingress", + "mode": "dynamic", + "xoff": "33374584" + }, + "egress_lossless_pool": { + "size": "162539680", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"ingress_lossless_pool", + "size":"0", + "static_th":"165867080" + }, + "egress_lossless_profile": { + "pool":"egress_lossless_pool", + "size":"0", + "static_th":"165867080" + }, + "egress_lossy_profile": { + "pool":"egress_lossless_pool", + "size":"1778", + "dynamic_th":"0" + } + }, +{%- endmacro %} diff --git a/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/M2-W6940-64X1-FR4/buffers_defaults_t0.j2 b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/M2-W6940-64X1-FR4/buffers_defaults_t0.j2 new file mode 100644 index 00000000000..ef380c86c4a --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/M2-W6940-64X1-FR4/buffers_defaults_t0.j2 @@ -0,0 +1,36 @@ + +{%- set default_cable = '5m' %} + +{%- macro generate_buffer_pool_and_profiles() %} + + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "162539680", + "type": "ingress", + "mode": "dynamic", + "xoff": "33374584" + }, + "egress_lossless_pool": { + "size": "162539680", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"ingress_lossless_pool", + "size":"0", + "static_th":"165867080" + }, + "egress_lossless_profile": { + "pool":"egress_lossless_pool", + "size":"0", + "static_th":"165867080" + }, + "egress_lossy_profile": { + "pool":"egress_lossless_pool", + "size":"1778", + "dynamic_th":"0" + } + }, +{%- endmacro %} diff --git a/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/M2-W6940-64X1-FR4/buffers_defaults_t1.j2 b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/M2-W6940-64X1-FR4/buffers_defaults_t1.j2 new file mode 100644 index 00000000000..847000e1640 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/M2-W6940-64X1-FR4/buffers_defaults_t1.j2 @@ -0,0 +1,36 @@ + +{%- set default_cable = '40m' %} + +{%- macro generate_buffer_pool_and_profiles() %} + + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "162539680", + "type": "ingress", + "mode": "dynamic", + "xoff": "33374584" + }, + "egress_lossless_pool": { + "size": "162539680", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"ingress_lossless_pool", + "size":"0", + "static_th":"165867080" + }, + "egress_lossless_profile": { + "pool":"egress_lossless_pool", + "size":"0", + "static_th":"165867080" + }, + "egress_lossy_profile": { + "pool":"egress_lossless_pool", + "size":"1778", + "dynamic_th":"0" + } + }, +{%- endmacro %} diff --git a/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/M2-W6940-64X1-FR4/buffers_defaults_t2.j2 b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/M2-W6940-64X1-FR4/buffers_defaults_t2.j2 new file mode 100644 index 00000000000..ef380c86c4a --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/M2-W6940-64X1-FR4/buffers_defaults_t2.j2 @@ -0,0 +1,36 @@ + +{%- set default_cable = '5m' %} + +{%- macro generate_buffer_pool_and_profiles() %} + + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "162539680", + "type": "ingress", + "mode": "dynamic", + "xoff": "33374584" + }, + "egress_lossless_pool": { + "size": "162539680", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"ingress_lossless_pool", + "size":"0", + "static_th":"165867080" + }, + "egress_lossless_profile": { + "pool":"egress_lossless_pool", + "size":"0", + "static_th":"165867080" + }, + "egress_lossy_profile": { + "pool":"egress_lossless_pool", + "size":"1778", + "dynamic_th":"0" + } + }, +{%- endmacro %} diff --git a/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/M2-W6940-64X1-FR4/default_sku b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/M2-W6940-64X1-FR4/default_sku new file mode 100644 index 00000000000..5a6e6e04ac6 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/M2-W6940-64X1-FR4/default_sku @@ -0,0 +1 @@ +M2-W6940-64X1-FR4 l2 \ No newline at end of file diff --git a/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/M2-W6940-64X1-FR4/hwsku.json b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/M2-W6940-64X1-FR4/hwsku.json new file mode 100644 index 00000000000..fe0475d36ff --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/M2-W6940-64X1-FR4/hwsku.json @@ -0,0 +1,324 @@ +{ + "interfaces": { + "Ethernet0": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet8": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet16": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet24": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet32": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet40": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet48": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet56": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet64": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet72": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet80": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet88": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet96": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet104": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet112": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet120": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet128": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet136": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet144": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet152": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet160": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet168": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet176": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet184": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet192": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet200": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet208": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet216": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet224": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet232": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet240": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet248": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet256": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet264": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet272": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet280": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet288": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet296": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet304": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet312": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet320": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet328": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet336": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet344": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet352": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet360": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet368": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet376": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet384": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet392": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet400": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet408": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet416": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet424": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet432": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet440": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet448": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet456": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet464": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet472": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet480": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet488": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet496": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet504": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + } + } +} diff --git a/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/M2-W6940-64X1-FR4/pg_profile_lookup.ini b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/M2-W6940-64X1-FR4/pg_profile_lookup.ini new file mode 100644 index 00000000000..9b240cc8bf6 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/M2-W6940-64X1-FR4/pg_profile_lookup.ini @@ -0,0 +1,26 @@ +# PG lossless profiles. +# speed cable size xon xoff threshold xon_offset + 10000 5m 18796 0 91440 -2 3556 + 25000 5m 18796 0 91440 -2 3556 + 40000 5m 18796 0 106934 -2 3556 + 50000 5m 18796 0 106934 -2 3556 + 100000 5m 18796 0 147066 -2 3556 + 200000 5m 18796 0 229362 -2 3556 + 400000 5m 18796 0 393192 -2 3556 + 800000 5m 18796 0 729488 -2 3556 + 10000 40m 18796 0 94742 -2 3556 + 25000 40m 18796 0 94742 -2 3556 + 40000 40m 18796 0 113538 -2 3556 + 50000 40m 18796 0 113538 -2 3556 + 100000 40m 18796 0 160274 -2 3556 + 200000 40m 18796 0 255778 -2 3556 + 400000 40m 18796 0 446024 -2 3556 + 800000 40m 18796 0 835406 -2 3556 + 10000 300m 18796 0 258572 -2 3556 + 25000 300m 18796 0 258572 -2 3556 + 40000 300m 18796 0 258572 -2 3556 + 50000 300m 18796 0 258572 -2 3556 + 100000 300m 18796 0 258572 -2 3556 + 200000 300m 18796 0 452374 -2 3556 + 400000 300m 18796 0 839216 -2 3556 + 800000 300m 18796 0 1621536 -2 3556 diff --git a/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/M2-W6940-64X1-FR4/port_config.ini b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/M2-W6940-64X1-FR4/port_config.ini new file mode 100644 index 00000000000..3dfd547c4d2 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/M2-W6940-64X1-FR4/port_config.ini @@ -0,0 +1,65 @@ +# name lanes alias index speed admin_status fec +Ethernet0 1,2,3,4,5,6,7,8 etp1 1 800000 down rs +Ethernet8 9,10,11,12,13,14,15,16 etp2 2 800000 down rs +Ethernet16 17,18,19,20,21,22,23,24 etp3 3 800000 down rs +Ethernet24 25,26,27,28,29,30,31,32 etp4 4 800000 down rs +Ethernet32 33,34,35,36,37,38,39,40 etp5 5 800000 down rs +Ethernet40 41,42,43,44,45,46,47,48 etp6 6 800000 down rs +Ethernet48 49,50,51,52,53,54,55,56 etp7 7 800000 down rs +Ethernet56 57,58,59,60,61,62,63,64 etp8 8 800000 down rs +Ethernet64 65,66,67,68,69,70,71,72 etp9 9 800000 down rs +Ethernet72 73,74,75,76,77,78,79,80 etp10 10 800000 down rs +Ethernet80 81,82,83,84,85,86,87,88 etp11 11 800000 down rs +Ethernet88 89,90,91,92,93,94,95,96 etp12 12 800000 down rs +Ethernet96 97,98,99,100,101,102,103,104 etp13 13 800000 down rs +Ethernet104 105,106,107,108,109,110,111,112 etp14 14 800000 down rs +Ethernet112 113,114,115,116,117,118,119,120 etp15 15 800000 down rs +Ethernet120 121,122,123,124,125,126,127,128 etp16 16 800000 down rs +Ethernet128 129,130,131,132,133,134,135,136 etp17 17 800000 down rs +Ethernet136 137,138,139,140,141,142,143,144 etp18 18 800000 down rs +Ethernet144 145,146,147,148,149,150,151,152 etp19 19 800000 down rs +Ethernet152 153,154,155,156,157,158,159,160 etp20 20 800000 down rs +Ethernet160 161,162,163,164,165,166,167,168 etp21 21 800000 down rs +Ethernet168 169,170,171,172,173,174,175,176 etp22 22 800000 down rs +Ethernet176 177,178,179,180,181,182,183,184 etp23 23 800000 down rs +Ethernet184 185,186,187,188,189,190,191,192 etp24 24 800000 down rs +Ethernet192 193,194,195,196,197,198,199,200 etp25 25 800000 down rs +Ethernet200 201,202,203,204,205,206,207,208 etp26 26 800000 down rs +Ethernet208 209,210,211,212,213,214,215,216 etp27 27 800000 down rs +Ethernet216 217,218,219,220,221,222,223,224 etp28 28 800000 down rs +Ethernet224 225,226,227,228,229,230,231,232 etp29 29 800000 down rs +Ethernet232 233,234,235,236,237,238,239,240 etp30 30 800000 down rs +Ethernet240 241,242,243,244,245,246,247,248 etp31 31 800000 down rs +Ethernet248 249,250,251,252,253,254,255,256 etp32 32 800000 down rs +Ethernet256 257,258,259,260,261,262,263,264 etp33 33 800000 down rs +Ethernet264 265,266,267,268,269,270,271,272 etp34 34 800000 down rs +Ethernet272 273,274,275,276,277,278,279,280 etp35 35 800000 down rs +Ethernet280 281,282,283,284,285,286,287,288 etp36 36 800000 down rs +Ethernet288 289,290,291,292,293,294,295,296 etp37 37 800000 down rs +Ethernet296 297,298,299,300,301,302,303,304 etp38 38 800000 down rs +Ethernet304 305,306,307,308,309,310,311,312 etp39 39 800000 down rs +Ethernet312 313,314,315,316,317,318,319,320 etp40 40 800000 down rs +Ethernet320 321,322,323,324,325,326,327,328 etp41 41 800000 down rs +Ethernet328 329,330,331,332,333,334,335,336 etp42 42 800000 down rs +Ethernet336 337,338,339,340,341,342,343,344 etp43 43 800000 down rs +Ethernet344 345,346,347,348,349,350,351,352 etp44 44 800000 down rs +Ethernet352 353,354,355,356,357,358,359,360 etp45 45 800000 down rs +Ethernet360 361,362,363,364,365,366,367,368 etp46 46 800000 down rs +Ethernet368 369,370,371,372,373,374,375,376 etp47 47 800000 down rs +Ethernet376 377,378,379,380,381,382,383,384 etp48 48 800000 down rs +Ethernet384 385,386,387,388,389,390,391,392 etp49 49 800000 down rs +Ethernet392 393,394,395,396,397,398,399,400 etp50 50 800000 down rs +Ethernet400 401,402,403,404,405,406,407,408 etp51 51 800000 down rs +Ethernet408 409,410,411,412,413,414,415,416 etp52 52 800000 down rs +Ethernet416 417,418,419,420,421,422,423,424 etp53 53 800000 down rs +Ethernet424 425,426,427,428,429,430,431,432 etp54 54 800000 down rs +Ethernet432 433,434,435,436,437,438,439,440 etp55 55 800000 down rs +Ethernet440 441,442,443,444,445,446,447,448 etp56 56 800000 down rs +Ethernet448 449,450,451,452,453,454,455,456 etp57 57 800000 down rs +Ethernet456 457,458,459,460,461,462,463,464 etp58 58 800000 down rs +Ethernet464 465,466,467,468,469,470,471,472 etp59 59 800000 down rs +Ethernet472 473,474,475,476,477,478,479,480 etp60 60 800000 down rs +Ethernet480 481,482,483,484,485,486,487,488 etp61 61 800000 down rs +Ethernet488 489,490,491,492,493,494,495,496 etp62 62 800000 down rs +Ethernet496 497,498,499,500,501,502,503,504 etp63 63 800000 down rs +Ethernet504 505,506,507,508,509,510,511,512 etp64 64 800000 down rs diff --git a/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/M2-W6940-64X1-FR4/qos.json.j2 b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/M2-W6940-64X1-FR4/qos.json.j2 new file mode 100644 index 00000000000..3e548325ea3 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/M2-W6940-64X1-FR4/qos.json.j2 @@ -0,0 +1 @@ +{%- include 'qos_config.j2' %} diff --git a/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/M2-W6940-64X1-FR4/sai.profile b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/M2-W6940-64X1-FR4/sai.profile new file mode 100644 index 00000000000..1636d96daa2 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/M2-W6940-64X1-FR4/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th5-m2-w6940-64x1-fr4-64x800g.yml \ No newline at end of file diff --git a/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/M2-W6940-64X1-FR4/th5-m2-w6940-64x1-fr4-64x800g.yml b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/M2-W6940-64X1-FR4/th5-m2-w6940-64x1-fr4-64x800g.yml new file mode 100644 index 00000000000..f1483b7acfa --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/M2-W6940-64X1-FR4/th5-m2-w6940-64x1-fr4-64x800g.yml @@ -0,0 +1,1136 @@ +--- +device: + 0: + DEVICE_CONFIG: + AUTOLOAD_BOARD_SETTINGS: 0 +... +--- +device: + 0: + # Per pipe flex counter configuration + CTR_EFLEX_CONFIG: + CTR_ING_EFLEX_OPERMODE_PIPEUNIQUE: 1 + CTR_ING_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1 + CTR_EGR_EFLEX_OPERMODE_PIPEUNIQUE: 1 + CTR_EGR_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1 +... +--- +device: + 0: + TM_SCHEDULER_CONFIG: + NUM_MC_Q: NUM_MC_Q_4 +... + +--- +device: + 0: + FP_CONFIG: + FP_ING_OPERMODE: GLOBAL_PIPE_AWARE +... +--- +bcm_device: + 0: + global: + bcm_tunnel_term_compatible_mode: 1 + vlan_flooding_l2mc_num_reserved: 2048 + l3_alpm_template: 1 + l3_alpm2_bnk_threshold: 100 + uft_mode: 1 + l3_enable: 1 + l3_intf_vlan_split_egress: 1 + l2_hitbit_enable: 0 + pktio_mode: 1 + sai_pfc_defaults_disable: 1 + sai_optimized_mmu: 1 + global_flexctr_ing_action_num_reserved: 20 + global_flexctr_ing_pool_num_reserved: 8 + global_flexctr_ing_op_profile_num_reserved: 20 + global_flexctr_ing_group_num_reserved: 2 + global_flexctr_egr_action_num_reserved: 8 + global_flexctr_egr_pool_num_reserved: 5 + global_flexctr_egr_op_profile_num_reserved: 10 + global_flexctr_egr_group_num_reserved: 1 + flowtracker_flexctr_alloc_enable: 1 +... + +--- +device: + 0: + PC_PM_CORE: + ? + PC_PM_ID: 1 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x23106754 + TX_LANE_MAP: 0x32017645 + RX_POLARITY_FLIP: 0X22 + TX_POLARITY_FLIP: 0XEE + ? + PC_PM_ID: 2 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x30217465 + TX_LANE_MAP: 0x03124756 + RX_POLARITY_FLIP: 0X11 + TX_POLARITY_FLIP: 0X55 + ? + PC_PM_ID: 3 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x23106754 + TX_LANE_MAP: 0x32017645 + RX_POLARITY_FLIP: 0X22 + TX_POLARITY_FLIP: 0XEE + ? + PC_PM_ID: 4 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x30217465 + TX_LANE_MAP: 0x03124756 + RX_POLARITY_FLIP: 0X11 + TX_POLARITY_FLIP: 0X55 + ? + PC_PM_ID: 5 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x32017645 + TX_LANE_MAP: 0x23106754 + RX_POLARITY_FLIP: 0x41 + TX_POLARITY_FLIP: 0x7D + ? + PC_PM_ID: 6 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x01324576 + TX_LANE_MAP: 0x10236754 + RX_POLARITY_FLIP: 0x3D + TX_POLARITY_FLIP: 0xC3 + ? + PC_PM_ID: 7 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x01324576 + TX_LANE_MAP: 0x10236754 + RX_POLARITY_FLIP: 0x3D + TX_POLARITY_FLIP: 0x83 + ? + PC_PM_ID: 8 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x01324576 + TX_LANE_MAP: 0x10236754 + RX_POLARITY_FLIP: 0x3D + TX_POLARITY_FLIP: 0x27 + ? + PC_PM_ID: 9 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x10235467 + TX_LANE_MAP: 0x01327645 + RX_POLARITY_FLIP: 0x3e + TX_POLARITY_FLIP: 0x43 + ? + PC_PM_ID: 10 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x10235467 + TX_LANE_MAP: 0x01327645 + RX_POLARITY_FLIP: 0x3e + TX_POLARITY_FLIP: 0x43 + ? + PC_PM_ID: 11 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x10235467 + TX_LANE_MAP: 0x01327645 + RX_POLARITY_FLIP: 0x3e + TX_POLARITY_FLIP: 0x43 + ? + PC_PM_ID: 12 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x10235467 + TX_LANE_MAP: 0x01327645 + RX_POLARITY_FLIP: 0x3e + TX_POLARITY_FLIP: 0x43 + ? + PC_PM_ID: 13 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x01324576 + TX_LANE_MAP: 0x10236754 + RX_POLARITY_FLIP: 0x3d + TX_POLARITY_FLIP: 0x83 + ? + PC_PM_ID: 14 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x01324576 + TX_LANE_MAP: 0x10236754 + RX_POLARITY_FLIP: 0x3d + TX_POLARITY_FLIP: 0x83 + ? + PC_PM_ID: 15 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x01324576 + TX_LANE_MAP: 0x10236754 + RX_POLARITY_FLIP: 0x3d + TX_POLARITY_FLIP: 0x83 + ? + PC_PM_ID: 16 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x01324576 + TX_LANE_MAP: 0x10236754 + RX_POLARITY_FLIP: 0x3d + TX_POLARITY_FLIP: 0x83 + ? + PC_PM_ID: 17 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x67542310 + TX_LANE_MAP: 0x45763201 + RX_POLARITY_FLIP: 0xbc + TX_POLARITY_FLIP: 0xc1 + ? + PC_PM_ID: 18 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x67542310 + TX_LANE_MAP: 0x45763201 + RX_POLARITY_FLIP: 0xbc + TX_POLARITY_FLIP: 0xc1 + ? + PC_PM_ID: 19 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x67542310 + TX_LANE_MAP: 0x45763201 + RX_POLARITY_FLIP: 0xbc + TX_POLARITY_FLIP: 0xc1 + ? + PC_PM_ID: 20 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x67542310 + TX_LANE_MAP: 0x45763201 + RX_POLARITY_FLIP: 0xbc + TX_POLARITY_FLIP: 0xc1 + ? + PC_PM_ID: 21 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x76453201 + TX_LANE_MAP: 0x54672310 + RX_POLARITY_FLIP: 0x7c + TX_POLARITY_FLIP: 0xc2 + ? + PC_PM_ID: 22 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x76453201 + TX_LANE_MAP: 0x54672310 + RX_POLARITY_FLIP: 0x7c + TX_POLARITY_FLIP: 0xc2 + ? + PC_PM_ID: 23 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x76453201 + TX_LANE_MAP: 0x54672310 + RX_POLARITY_FLIP: 0x7c + TX_POLARITY_FLIP: 0xc2 + ? + PC_PM_ID: 24 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x76453201 + TX_LANE_MAP: 0x54672310 + RX_POLARITY_FLIP: 0x7c + TX_POLARITY_FLIP: 0xc2 + ? + PC_PM_ID: 25 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x67542310 + TX_LANE_MAP: 0x45763201 + RX_POLARITY_FLIP: 0xbc + TX_POLARITY_FLIP: 0xe4 + ? + PC_PM_ID: 26 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x67542310 + TX_LANE_MAP: 0x45763201 + RX_POLARITY_FLIP: 0xbc + TX_POLARITY_FLIP: 0xc1 + ? + PC_PM_ID: 27 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x67542310 + TX_LANE_MAP: 0x45763201 + RX_POLARITY_FLIP: 0xbc + TX_POLARITY_FLIP: 0xc3 + ? + PC_PM_ID: 28 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x54671023 + TX_LANE_MAP: 0x45760132 + RX_POLARITY_FLIP: 0x82 + TX_POLARITY_FLIP: 0xbe + ? + PC_PM_ID: 29 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x56471203 + TX_LANE_MAP: 0x65742130 + RX_POLARITY_FLIP: 0x88 + TX_POLARITY_FLIP: 0xaa + ? + PC_PM_ID: 30 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x45760132 + TX_LANE_MAP: 0x54671023 + RX_POLARITY_FLIP: 0x44 + TX_POLARITY_FLIP: 0x77 + ? + PC_PM_ID: 31 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x56471203 + TX_LANE_MAP: 0x65742130 + RX_POLARITY_FLIP: 0x88 + TX_POLARITY_FLIP: 0xaa + ? + PC_PM_ID: 32 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x45760132 + TX_LANE_MAP: 0x54671023 + RX_POLARITY_FLIP: 0x44 + TX_POLARITY_FLIP: 0x77 + ? + PC_PM_ID: 33 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x23106754 + TX_LANE_MAP: 0x32017645 + RX_POLARITY_FLIP: 0x22 + TX_POLARITY_FLIP: 0xee + ? + PC_PM_ID: 34 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x30217465 + TX_LANE_MAP: 0x03124756 + RX_POLARITY_FLIP: 0x11 + TX_POLARITY_FLIP: 0x55 + ? + PC_PM_ID: 35 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x23106754 + TX_LANE_MAP: 0x32017645 + RX_POLARITY_FLIP: 0x22 + TX_POLARITY_FLIP: 0xee + ? + PC_PM_ID: 36 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x30217465 + TX_LANE_MAP: 0x03124756 + RX_POLARITY_FLIP: 0x11 + TX_POLARITY_FLIP: 0x55 + ? + PC_PM_ID: 37 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x32017645 + TX_LANE_MAP: 0x23106754 + RX_POLARITY_FLIP: 0x41 + TX_POLARITY_FLIP: 0x7d + ? + PC_PM_ID: 38 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x01324576 + TX_LANE_MAP: 0x10236754 + RX_POLARITY_FLIP: 0x3d + TX_POLARITY_FLIP: 0xc3 + ? + PC_PM_ID: 39 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x01324576 + TX_LANE_MAP: 0x10236754 + RX_POLARITY_FLIP: 0x3d + TX_POLARITY_FLIP: 0x83 + ? + PC_PM_ID: 40 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x01324576 + TX_LANE_MAP: 0x10236754 + RX_POLARITY_FLIP: 0x3d + TX_POLARITY_FLIP: 0x27 + ? + PC_PM_ID: 41 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x10235467 + TX_LANE_MAP: 0x01327645 + RX_POLARITY_FLIP: 0x3e + TX_POLARITY_FLIP: 0x43 + ? + PC_PM_ID: 42 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x10235467 + TX_LANE_MAP: 0x01327645 + RX_POLARITY_FLIP: 0x3e + TX_POLARITY_FLIP: 0x43 + ? + PC_PM_ID: 43 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x10235467 + TX_LANE_MAP: 0x01327645 + RX_POLARITY_FLIP: 0x3e + TX_POLARITY_FLIP: 0x43 + ? + PC_PM_ID: 44 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x10235467 + TX_LANE_MAP: 0x01327645 + RX_POLARITY_FLIP: 0x3e + TX_POLARITY_FLIP: 0x43 + ? + PC_PM_ID: 45 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x01324576 + TX_LANE_MAP: 0x10236754 + RX_POLARITY_FLIP: 0x3d + TX_POLARITY_FLIP: 0x83 + ? + PC_PM_ID: 46 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x01324576 + TX_LANE_MAP: 0x10236754 + RX_POLARITY_FLIP: 0x3d + TX_POLARITY_FLIP: 0x83 + ? + PC_PM_ID: 47 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x01324576 + TX_LANE_MAP: 0x10236754 + RX_POLARITY_FLIP: 0x3d + TX_POLARITY_FLIP: 0x83 + ? + PC_PM_ID: 48 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x01324576 + TX_LANE_MAP: 0x10236754 + RX_POLARITY_FLIP: 0x3d + TX_POLARITY_FLIP: 0x83 + ? + PC_PM_ID: 49 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x67542310 + TX_LANE_MAP: 0x45763201 + RX_POLARITY_FLIP: 0xbc + TX_POLARITY_FLIP: 0xc1 + ? + PC_PM_ID: 50 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x67542310 + TX_LANE_MAP: 0x45763201 + RX_POLARITY_FLIP: 0xbc + TX_POLARITY_FLIP: 0xc1 + ? + PC_PM_ID: 51 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x67542310 + TX_LANE_MAP: 0x45763201 + RX_POLARITY_FLIP: 0xbc + TX_POLARITY_FLIP: 0xc1 + ? + PC_PM_ID: 52 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x67542310 + TX_LANE_MAP: 0x45763201 + RX_POLARITY_FLIP: 0xbc + TX_POLARITY_FLIP: 0xc1 + ? + PC_PM_ID: 53 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x76453201 + TX_LANE_MAP: 0x54672310 + RX_POLARITY_FLIP: 0x7c + TX_POLARITY_FLIP: 0xc2 + ? + PC_PM_ID: 54 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x76453201 + TX_LANE_MAP: 0x54672310 + RX_POLARITY_FLIP: 0x7c + TX_POLARITY_FLIP: 0xc2 + ? + PC_PM_ID: 55 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x76453201 + TX_LANE_MAP: 0x54672310 + RX_POLARITY_FLIP: 0x7c + TX_POLARITY_FLIP: 0xc2 + ? + PC_PM_ID: 56 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x76453201 + TX_LANE_MAP: 0x54672310 + RX_POLARITY_FLIP: 0x7c + TX_POLARITY_FLIP: 0xc2 + ? + PC_PM_ID: 57 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x67542310 + TX_LANE_MAP: 0x45763201 + RX_POLARITY_FLIP: 0xbc + TX_POLARITY_FLIP: 0xe4 + ? + PC_PM_ID: 58 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x67542310 + TX_LANE_MAP: 0x45763201 + RX_POLARITY_FLIP: 0xbc + TX_POLARITY_FLIP: 0xc1 + ? + PC_PM_ID: 59 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x67542310 + TX_LANE_MAP: 0x45763201 + RX_POLARITY_FLIP: 0xbc + TX_POLARITY_FLIP: 0xc3 + ? + PC_PM_ID: 60 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x54671023 + TX_LANE_MAP: 0x45760132 + RX_POLARITY_FLIP: 0x82 + TX_POLARITY_FLIP: 0xbe + ? + PC_PM_ID: 61 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x56471203 + TX_LANE_MAP: 0x65742130 + RX_POLARITY_FLIP: 0X88 + TX_POLARITY_FLIP: 0XAA + ? + PC_PM_ID: 62 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x45760132 + TX_LANE_MAP: 0x54671023 + RX_POLARITY_FLIP: 0X44 + TX_POLARITY_FLIP: 0X77 + ? + PC_PM_ID: 63 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x56471203 + TX_LANE_MAP: 0x65742130 + RX_POLARITY_FLIP: 0X88 + TX_POLARITY_FLIP: 0XAA + ? + PC_PM_ID: 64 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x45760132 + TX_LANE_MAP: 0x54671023 + RX_POLARITY_FLIP: 0X44 + TX_POLARITY_FLIP: 0X77 +... + +--- +device: + 0: + PC_PORT_PHYS_MAP: + ? + PORT_ID: 1 + : + PC_PHYS_PORT_ID: 1 + ? + PORT_ID: 2 + : + PC_PHYS_PORT_ID: 9 + ? + PORT_ID: 11 + : + PC_PHYS_PORT_ID: 17 + ? + PORT_ID: 12 + : + PC_PHYS_PORT_ID: 25 + ? + PORT_ID: 22 + : + PC_PHYS_PORT_ID: 33 + ? + PORT_ID: 23 + : + PC_PHYS_PORT_ID: 41 + ? + PORT_ID: 33 + : + PC_PHYS_PORT_ID: 49 + ? + PORT_ID: 34 + : + PC_PHYS_PORT_ID: 57 + ? + PORT_ID: 44 + : + PC_PHYS_PORT_ID: 65 + ? + PORT_ID: 45 + : + PC_PHYS_PORT_ID: 73 + ? + PORT_ID: 55 + : + PC_PHYS_PORT_ID: 81 + ? + PORT_ID: 56 + : + PC_PHYS_PORT_ID: 89 + ? + PORT_ID: 66 + : + PC_PHYS_PORT_ID: 97 + ? + PORT_ID: 67 + : + PC_PHYS_PORT_ID: 105 + ? + PORT_ID: 77 + : + PC_PHYS_PORT_ID: 113 + ? + PORT_ID: 78 + : + PC_PHYS_PORT_ID: 121 + ? + PORT_ID: 88 + : + PC_PHYS_PORT_ID: 129 + ? + PORT_ID: 89 + : + PC_PHYS_PORT_ID: 137 + ? + PORT_ID: 99 + : + PC_PHYS_PORT_ID: 145 + ? + PORT_ID: 100 + : + PC_PHYS_PORT_ID: 153 + ? + PORT_ID: 110 + : + PC_PHYS_PORT_ID: 161 + ? + PORT_ID: 111 + : + PC_PHYS_PORT_ID: 169 + ? + PORT_ID: 121 + : + PC_PHYS_PORT_ID: 177 + ? + PORT_ID: 122 + : + PC_PHYS_PORT_ID: 185 + ? + PORT_ID: 132 + : + PC_PHYS_PORT_ID: 193 + ? + PORT_ID: 133 + : + PC_PHYS_PORT_ID: 201 + ? + PORT_ID: 143 + : + PC_PHYS_PORT_ID: 209 + ? + PORT_ID: 144 + : + PC_PHYS_PORT_ID: 217 + ? + PORT_ID: 154 + : + PC_PHYS_PORT_ID: 225 + ? + PORT_ID: 155 + : + PC_PHYS_PORT_ID: 233 + ? + PORT_ID: 165 + : + PC_PHYS_PORT_ID: 241 + ? + PORT_ID: 166 + : + PC_PHYS_PORT_ID: 249 + ? + PORT_ID: 176 + : + PC_PHYS_PORT_ID: 257 + ? + PORT_ID: 177 + : + PC_PHYS_PORT_ID: 265 + ? + PORT_ID: 187 + : + PC_PHYS_PORT_ID: 273 + ? + PORT_ID: 188 + : + PC_PHYS_PORT_ID: 281 + ? + PORT_ID: 198 + : + PC_PHYS_PORT_ID: 289 + ? + PORT_ID: 199 + : + PC_PHYS_PORT_ID: 297 + ? + PORT_ID: 209 + : + PC_PHYS_PORT_ID: 305 + ? + PORT_ID: 210 + : + PC_PHYS_PORT_ID: 313 + ? + PORT_ID: 220 + : + PC_PHYS_PORT_ID: 321 + ? + PORT_ID: 221 + : + PC_PHYS_PORT_ID: 329 + ? + PORT_ID: 231 + : + PC_PHYS_PORT_ID: 337 + ? + PORT_ID: 232 + : + PC_PHYS_PORT_ID: 345 + ? + PORT_ID: 242 + : + PC_PHYS_PORT_ID: 353 + ? + PORT_ID: 243 + : + PC_PHYS_PORT_ID: 361 + ? + PORT_ID: 253 + : + PC_PHYS_PORT_ID: 369 + ? + PORT_ID: 254 + : + PC_PHYS_PORT_ID: 377 + ? + PORT_ID: 264 + : + PC_PHYS_PORT_ID: 385 + ? + PORT_ID: 265 + : + PC_PHYS_PORT_ID: 393 + ? + PORT_ID: 275 + : + PC_PHYS_PORT_ID: 401 + ? + PORT_ID: 276 + : + PC_PHYS_PORT_ID: 409 + ? + PORT_ID: 286 + : + PC_PHYS_PORT_ID: 417 + ? + PORT_ID: 287 + : + PC_PHYS_PORT_ID: 425 + ? + PORT_ID: 297 + : + PC_PHYS_PORT_ID: 433 + ? + PORT_ID: 298 + : + PC_PHYS_PORT_ID: 441 + ? + PORT_ID: 308 + : + PC_PHYS_PORT_ID: 449 + ? + PORT_ID: 309 + : + PC_PHYS_PORT_ID: 457 + ? + PORT_ID: 319 + : + PC_PHYS_PORT_ID: 465 + ? + PORT_ID: 320 + : + PC_PHYS_PORT_ID: 473 + ? + PORT_ID: 330 + : + PC_PHYS_PORT_ID: 481 + ? + PORT_ID: 331 + : + PC_PHYS_PORT_ID: 489 + ? + PORT_ID: 341 + : + PC_PHYS_PORT_ID: 497 + ? + PORT_ID: 342 + : + PC_PHYS_PORT_ID: 505 +... +--- +device: + 0: + PC_PORT: + ? + PORT_ID: [1, 2, 11, 12, 22, 23, 33, 34, 44, 45, 55, 56, 66, 67, 77, 78, 88, 89, 99, 100, 110, 111, 121, 122, 132, 133, 143, 144, 154, 155, 165, 166, 176, 177, 187, 188, 198, 199, 209, 210, 220, 221, 231, 232, 242, 243, 253, 254, 264, 265, 275, 276, 286, 287, 297, 298, 308, 309, 319, 320, 330, 331, 341, 342] + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 +... +--- +device: + 0: + PC_TX_TAPS: + ? + PORT_ID: [1, 2, 11, 12, 22, 23, 33, 34, 44, 45, 55, 56, 66, 67, 77, 78, 88, 89, 99, 100, 110, 111, 121, 122, 132, 133, 143, 144, 154, 155, 165, 166, 176, 177, 187, 188, 198, 199, 209, 210, 220, 221, 231, 232, 242, 243, 253, 254, 264, 265, 275, 276, 286, 287, 297, 298, 308, 309, 319, 320, 330, 331, 341, 342] + LANE_INDEX: [[0,7]] + : + TX_SIG_MODE: PC_SIG_MODE_PAM4 + TX_SIG_MODE_AUTO: 0 + TXFIR_TAP_MODE: PC_TXFIR_PAM4_TAPS_6 + TXFIR_TAP_MODE_AUTO: 0 + TX_PRE3_SIGN: 0 + TX_PRE3: 0 + TX_PRE3_AUTO: 0 + TX_PRE2_SIGN: 0 + TX_PRE2: 1 + TX_PRE2_AUTO: 0 + TX_PRE_SIGN: 1 + TX_PRE: 8 + TX_PRE_AUTO: 0 + TX_MAIN: 80 + TX_MAIN_AUTO: 0 + TX_POST_SIGN: 1 + TX_POST: 4 + TX_POST_AUTO: 0 + TX_POST2_SIGN: 1 + TX_POST2: 1 + TX_POST2_AUTO: 0 + TX_POST3_SIGN: 0 + TX_POST3: 0 + TX_POST3_AUTO: 0 +... \ No newline at end of file diff --git a/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/cpo.json b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/cpo.json new file mode 100644 index 00000000000..780664ef694 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/cpo.json @@ -0,0 +1,729 @@ +{ + "cpo_eeprom_mode": "joint", + "oes": { + "oe0": { + "index": 0, + "oe_cmis_path": "/sys/bus/i2c/devices/i2c-24/24-0050/" + }, + "oe1": { + "index": 1, + "oe_cmis_path": "/sys/bus/i2c/devices/i2c-25/25-0050/" + }, + "oe2": { + "index": 2, + "oe_cmis_path": "/sys/bus/i2c/devices/i2c-26/26-0050/" + }, + "oe3": { + "index": 3, + "oe_cmis_path": "/sys/bus/i2c/devices/i2c-27/27-0050/" + }, + "oe4": { + "index": 4, + "oe_cmis_path": "/sys/bus/i2c/devices/i2c-28/28-0050/" + }, + "oe5": { + "index": 5, + "oe_cmis_path": "/sys/bus/i2c/devices/i2c-29/29-0050/" + }, + "oe6": { + "index": 6, + "oe_cmis_path": "/sys/bus/i2c/devices/i2c-30/30-0050/" + }, + "oe7": { + "index": 7, + "oe_cmis_path": "/sys/bus/i2c/devices/i2c-31/31-0050/" + } + }, + "elss": { + "els0": { + "index": 0, + "base_page": 0, + "els_presence": { + "presence_file": "/dev/fpga1", + "presence_offset": "0x64", + "presence_len": "4", + "presence_value": "0", + "presence_bit": "8" + } + }, + "els1": { + "index": 1, + "base_page": 4, + "els_presence": { + "presence_file": "/dev/fpga1", + "presence_offset": "0x64", + "presence_len": "4", + "presence_value": "0", + "presence_bit": "9" + } + }, + "els2": { + "index": 2, + "base_page": 0, + "els_presence": { + "presence_file": "/dev/fpga1", + "presence_offset": "0x64", + "presence_len": "4", + "presence_value": "0", + "presence_bit": "10" + } + }, + "els3": { + "index": 3, + "base_page": 4, + "els_presence": { + "presence_file": "/dev/fpga1", + "presence_offset": "0x64", + "presence_len": "4", + "presence_value": "0", + "presence_bit": "11" + } + }, + "els4": { + "index": 4, + "base_page": 0, + "els_presence": { + "presence_file": "/dev/fpga1", + "presence_offset": "0x64", + "presence_len": "4", + "presence_value": "0", + "presence_bit": "12" + } + }, + "els5": { + "index": 5, + "base_page": 4, + "els_presence": { + "presence_file": "/dev/fpga1", + "presence_offset": "0x64", + "presence_len": "4", + "presence_value": "0", + "presence_bit": "13" + } + }, + "els6": { + "index": 6, + "base_page": 0, + "els_presence": { + "presence_file": "/dev/fpga1", + "presence_offset": "0x64", + "presence_len": "4", + "presence_value": "0", + "presence_bit": "14" + } + }, + "els7": { + "index": 7, + "base_page": 4, + "els_presence": { + "presence_file": "/dev/fpga1", + "presence_offset": "0x64", + "presence_len": "4", + "presence_value": "0", + "presence_bit": "15" + } + }, + "els8": { + "index": 8, + "base_page": 0, + "els_presence": { + "presence_file": "/dev/fpga1", + "presence_offset": "0x64", + "presence_len": "4", + "presence_value": "0", + "presence_bit": "24" + } + }, + "els9": { + "index": 9, + "base_page": 4, + "els_presence": { + "presence_file": "/dev/fpga1", + "presence_offset": "0x64", + "presence_len": "4", + "presence_value": "0", + "presence_bit": "25" + } + }, + "els10": { + "index": 10, + "base_page": 0, + "els_presence": { + "presence_file": "/dev/fpga1", + "presence_offset": "0x64", + "presence_len": "4", + "presence_value": "0", + "presence_bit": "26" + } + }, + "els11": { + "index": 11, + "base_page": 4, + "els_presence": { + "presence_file": "/dev/fpga1", + "presence_offset": "0x64", + "presence_len": "4", + "presence_value": "0", + "presence_bit": "27" + } + }, + "els12": { + "index": 12, + "base_page": 0, + "els_presence": { + "presence_file": "/dev/fpga1", + "presence_offset": "0x64", + "presence_len": "4", + "presence_value": "0", + "presence_bit": "28" + } + }, + "els13": { + "index": 13, + "base_page": 4, + "els_presence": { + "presence_file": "/dev/fpga1", + "presence_offset": "0x64", + "presence_len": "4", + "presence_value": "0", + "presence_bit": "29" + } + }, + "els14": { + "index": 14, + "base_page": 0, + "els_presence": { + "presence_file": "/dev/fpga1", + "presence_offset": "0x64", + "presence_len": "4", + "presence_value": "0", + "presence_bit": "30" + } + }, + "els15": { + "index": 15, + "base_page": 4, + "els_presence": { + "presence_file": "/dev/fpga1", + "presence_offset": "0x64", + "presence_len": "4", + "presence_value": "0", + "presence_bit": "31" + } + } + }, + "interfaces": { + "Ethernet0": { + "index": "1,1,1,1,1,1,1,1", + "lanes": "1,2,3,4,5,6,7,8", + "oe_id": 0, + "oe_bank_id": 0, + "els_id": 0, + "laser_ids": [4,5,6,7] + }, + "Ethernet8": { + "index": "2,2,2,2,2,2,2,2", + "lanes": "9,10,11,12,13,14,15,16", + "oe_id": 0, + "oe_bank_id": 1, + "els_id": 0, + "laser_ids": [4,5,6,7] + }, + "Ethernet16": { + "index": "3,3,3,3,3,3,3,3", + "lanes": "17,18,19,20,21,22,23,24", + "oe_id": 0, + "oe_bank_id": 2, + "els_id": 0, + "laser_ids": [0,1,2,3] + }, + "Ethernet24": { + "index": "4,4,4,4,4,4,4,4", + "lanes": "25,26,27,28,29,30,31,32", + "oe_id": 0, + "oe_bank_id": 3, + "els_id": 0, + "laser_ids": [0,1,2,3] + }, + "Ethernet32": { + "index": "5,5,5,5,5,5,5,5", + "lanes": "33,34,35,36,37,38,39,40", + "oe_id": 0, + "oe_bank_id": 4, + "els_id": 1, + "laser_ids": [4,5,6,7] + }, + "Ethernet40": { + "index": "6,6,6,6,6,6,6,6", + "lanes": "41,42,43,44,45,46,47,48", + "oe_id": 0, + "oe_bank_id": 5, + "els_id": 1, + "laser_ids": [4,5,6,7] + }, + "Ethernet48": { + "index": "7,7,7,7,7,7,7,7", + "lanes": "49,50,51,52,53,54,55,56", + "oe_id": 0, + "oe_bank_id": 6, + "els_id": 1, + "laser_ids": [0,1,2,3] + }, + "Ethernet56": { + "index": "8,8,8,8,8,8,8,8", + "lanes": "57,58,59,60,61,62,63,64", + "oe_id": 0, + "oe_bank_id": 7, + "els_id": 1, + "laser_ids": [0,1,2,3] + }, + "Ethernet64": { + "index": "9,9,9,9,9,9,9,9", + "lanes": "65,66,67,68,69,70,71,72", + "oe_id": 1, + "oe_bank_id": 8, + "els_id": 2, + "laser_ids": [4,5,6,7] + }, + "Ethernet72": { + "index": "10,10,10,10,10,10,10,10", + "lanes": "73,74,75,76,77,78,79,80", + "oe_id": 1, + "oe_bank_id": 9, + "els_id": 2, + "laser_ids": [4,5,6,7] + }, + "Ethernet80": { + "index": "11,11,11,11,11,11,11,11", + "lanes": "81,82,83,84,85,86,87,88", + "oe_id": 1, + "oe_bank_id": 10, + "els_id": 2, + "laser_ids": [0,1,2,3] + }, + "Ethernet88": { + "index": "12,12,12,12,12,12,12,12", + "lanes": "89,90,91,92,93,94,95,96", + "oe_id": 1, + "oe_bank_id": 11, + "els_id": 2, + "laser_ids": [0,1,2,3] + }, + "Ethernet96": { + "index": "13,13,13,13,13,13,13,13", + "lanes": "97,98,99,100,101,102,103,104", + "oe_id": 1, + "oe_bank_id": 12, + "els_id": 3, + "laser_ids": [4,5,6,7] + }, + "Ethernet104": { + "index": "14,14,14,14,14,14,14,14", + "lanes": "105,106,107,108,109,110,111,112", + "oe_id": 1, + "oe_bank_id": 13, + "els_id": 3, + "laser_ids": [4,5,6,7] + }, + "Ethernet112": { + "index": "15,15,15,15,15,15,15,15", + "lanes": "113,114,115,116,117,118,119,120", + "oe_id": 1, + "oe_bank_id": 14, + "els_id": 3, + "laser_ids": [0,1,2,3] + }, + "Ethernet120": { + "index": "16,16,16,16,16,16,16,16", + "lanes": "121,122,123,124,125,126,127,128", + "oe_id": 1, + "oe_bank_id": 15, + "els_id": 3, + "laser_ids": [0,1,2,3] + }, + "Ethernet128": { + "index": "17,17,17,17,17,17,17,17", + "lanes": "129,130,131,132,133,134,135,136", + "oe_id": 2, + "oe_bank_id": 16, + "els_id": 4, + "laser_ids": [4,5,6,7] + }, + "Ethernet136": { + "index": "18,18,18,18,18,18,18,18", + "lanes": "137,138,139,140,141,142,143,144", + "oe_id": 2, + "oe_bank_id": 17, + "els_id": 4, + "laser_ids": [4,5,6,7] + }, + "Ethernet144": { + "index": "19,19,19,19,19,19,19,19", + "lanes": "145,146,147,148,149,150,151,152", + "oe_id": 2, + "oe_bank_id": 18, + "els_id": 4, + "laser_ids": [0,1,2,3] + }, + "Ethernet152": { + "index": "20,20,20,20,20,20,20,20", + "lanes": "153,154,155,156,157,158,159,160", + "oe_id": 2, + "oe_bank_id": 19, + "els_id": 4, + "laser_ids": [0,1,2,3] + }, + "Ethernet160": { + "index": "21,21,21,21,21,21,21,21", + "lanes": "161,162,163,164,165,166,167,168", + "oe_id": 2, + "oe_bank_id": 20, + "els_id": 5, + "laser_ids": [4,5,6,7] + }, + "Ethernet168": { + "index": "22,22,22,22,22,22,22,22", + "lanes": "169,170,171,172,173,174,175,176", + "oe_id": 2, + "oe_bank_id": 21, + "els_id": 5, + "laser_ids": [4,5,6,7] + }, + "Ethernet176": { + "index": "23,23,23,23,23,23,23,23", + "lanes": "177,178,179,180,181,182,183,184", + "oe_id": 2, + "oe_bank_id": 22, + "els_id": 5, + "laser_ids": [0,1,2,3] + }, + "Ethernet184": { + "index": "24,24,24,24,24,24,24,24", + "lanes": "185,186,187,188,189,190,191,192", + "oe_id": 2, + "oe_bank_id": 23, + "els_id": 5, + "laser_ids": [0,1,2,3] + }, + "Ethernet192": { + "index": "25,25,25,25,25,25,25,25", + "lanes": "193,194,195,196,197,198,199,200", + "oe_id": 3, + "oe_bank_id": 24, + "els_id": 6, + "laser_ids": [4,5,6,7] + }, + "Ethernet200": { + "index": "26,26,26,26,26,26,26,26", + "lanes": "201,202,203,204,205,206,207,208", + "oe_id": 3, + "oe_bank_id": 25, + "els_id": 6, + "laser_ids": [4,5,6,7] + }, + "Ethernet208": { + "index": "27,27,27,27,27,27,27,27", + "lanes": "209,210,211,212,213,214,215,216", + "oe_id": 3, + "oe_bank_id": 26, + "els_id": 6, + "laser_ids": [0,1,2,3] + }, + "Ethernet216": { + "index": "28,28,28,28,28,28,28,28", + "lanes": "217,218,219,220,221,222,223,224", + "oe_id": 3, + "oe_bank_id": 27, + "els_id": 6, + "laser_ids": [0,1,2,3] + }, + "Ethernet224": { + "index": "29,29,29,29,29,29,29,29", + "lanes": "225,226,227,228,229,230,231,232", + "oe_id": 3, + "oe_bank_id": 28, + "els_id": 7, + "laser_ids": [4,5,6,7] + }, + "Ethernet232": { + "index": "30,30,30,30,30,30,30,30", + "lanes": "233,234,235,236,237,238,239,240", + "oe_id": 3, + "oe_bank_id": 29, + "els_id": 7, + "laser_ids": [4,5,6,7] + }, + "Ethernet240": { + "index": "31,31,31,31,31,31,31,31", + "lanes": "241,242,243,244,245,246,247,248", + "oe_id": 3, + "oe_bank_id": 30, + "els_id": 7, + "laser_ids": [0,1,2,3] + }, + "Ethernet248": { + "index": "32,32,32,32,32,32,32,32", + "lanes": "249,250,251,252,253,254,255,256", + "oe_id": 3, + "oe_bank_id": 31, + "els_id": 7, + "laser_ids": [0,1,2,3] + }, + "Ethernet256": { + "index": "33,33,33,33,33,33,33,33", + "lanes": "257,258,259,260,261,262,263,264", + "oe_id": 4, + "oe_bank_id": 32, + "els_id": 8, + "laser_ids": [4,5,6,7] + }, + "Ethernet264": { + "index": "34,34,34,34,34,34,34,34", + "lanes": "265,266,267,268,269,270,271,272", + "oe_id": 4, + "oe_bank_id": 33, + "els_id": 8, + "laser_ids": [4,5,6,7] + }, + "Ethernet272": { + "index": "35,35,35,35,35,35,35,35", + "lanes": "273,274,275,276,277,278,279,280", + "oe_id": 4, + "oe_bank_id": 34, + "els_id": 8, + "laser_ids": [0,1,2,3] + }, + "Ethernet280": { + "index": "36,36,36,36,36,36,36,36", + "lanes": "281,282,283,284,285,286,287,288", + "oe_id": 4, + "oe_bank_id": 35, + "els_id": 8, + "laser_ids": [0,1,2,3] + }, + "Ethernet288": { + "index": "37,37,37,37,37,37,37,37", + "lanes": "289,290,291,292,293,294,295,296", + "oe_id": 4, + "oe_bank_id": 36, + "els_id": 9, + "laser_ids": [4,5,6,7] + }, + "Ethernet296": { + "index": "38,38,38,38,38,38,38,38", + "lanes": "297,298,299,300,301,302,303,304", + "oe_id": 4, + "oe_bank_id": 37, + "els_id": 9, + "laser_ids": [4,5,6,7] + }, + "Ethernet304": { + "index": "39,39,39,39,39,39,39,39", + "lanes": "305,306,307,308,309,310,311,312", + "oe_id": 4, + "oe_bank_id": 38, + "els_id": 9, + "laser_ids": [0,1,2,3] + }, + "Ethernet312": { + "index": "40,40,40,40,40,40,40,40", + "lanes": "313,314,315,316,317,318,319,320", + "oe_id": 4, + "oe_bank_id": 39, + "els_id": 9, + "laser_ids": [0,1,2,3] + }, + "Ethernet320": { + "index": "41,41,41,41,41,41,41,41", + "lanes": "321,322,323,324,325,326,327,328", + "oe_id": 5, + "oe_bank_id": 40, + "els_id": 10, + "laser_ids": [4,5,6,7] + }, + "Ethernet328": { + "index": "42,42,42,42,42,42,42,42", + "lanes": "329,330,331,332,333,334,335,336", + "oe_id": 5, + "oe_bank_id": 41, + "els_id": 10, + "laser_ids": [4,5,6,7] + }, + "Ethernet336": { + "index": "43,43,43,43,43,43,43,43", + "lanes": "337,338,339,340,341,342,343,344", + "oe_id": 5, + "oe_bank_id": 42, + "els_id": 10, + "laser_ids": [0,1,2,3] + }, + "Ethernet344": { + "index": "44,44,44,44,44,44,44,44", + "lanes": "345,346,347,348,349,350,351,352", + "oe_id": 5, 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b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/fru.py @@ -0,0 +1,961 @@ +#!/usr/bin/python3 +import collections +from datetime import datetime, timedelta +from bitarray import bitarray + + +__DEBUG__ = "N" + + +class FruException(Exception): + def __init__(self, message='fruerror', code=-100): + err = 'errcode: {0} message:{1}'.format(code, message) + Exception.__init__(self, err) + self.code = code + self.message = message + + +def e_print(err): + print("ERROR: " + err) + + +def d_print(debug_info): + if __DEBUG__ == "Y": + print(debug_info) + + +class FruUtil(): + @staticmethod + def decodeLength(value): + a = bitarray(8) + a.setall(True) + a[0:1] = 0 + a[1:2] = 0 + x = ord(a.tobytes()) + return x & ord(value) + + @staticmethod + def minToData(): + starttime = datetime(1996, 1, 1, 0, 0, 0) + endtime = datetime.now() + seconds = (endtime - starttime).total_seconds() + mins = seconds // 60 + m = int(round(mins)) + return m + + @staticmethod + def getTimeFormat(): + return datetime.now().strftime('%Y-%m-%d') + + @staticmethod + def getTypeLength(value): + if value is None or len(value) == 0: + return 0 + a = bitarray(8) + a.setall(False) + a[0:1] = 1 + a[1:2] = 1 + x = ord(a.tobytes()) + return x | len(value) + + @staticmethod + def checksum(b): + result = 0 + for item in b: + result += ord(item) + return (0x100 - (result & 0xff)) & 0xff + + +class BaseArea(object): + SUGGESTED_SIZE_COMMON_HEADER = 8 + SUGGESTED_SIZE_INTERNAL_USE_AREA = 72 + SUGGESTED_SIZE_CHASSIS_INFO_AREA = 32 + SUGGESTED_SIZE_BOARD_INFO_AREA = 80 + SUGGESTED_SIZE_PRODUCT_INFO_AREA = 80 + + INITVALUE = b'\x00' + resultvalue = INITVALUE * 256 + COMMON_HEAD_VERSION = b'\x01' + __childList = None + + def __init__(self, name="", size=0, offset=0): + self.__childList = [] + self._offset = offset + self.name = name + self._size = size + self._isPresent = False + self._data = b'\x00' * size + + @property + def childList(self): + return self.__childList + + @childList.setter + def childList(self, value): + self.__childList = value + + @property + def offset(self): + return self._offset + + @offset.setter + def offset(self, value): + self._offset = value + + @property + def size(self): + return self._size + + @size.setter + def size(self, value): + self._size = value + + @property + def data(self): + return self._data + + @data.setter + def data(self, value): + self._data = value + + @property + def isPresent(self): + return self._isPresent + + @isPresent.setter + def isPresent(self, value): + self._isPresent = value + + +class InternalUseArea(BaseArea): + pass + + +class ChassisInfoArea(BaseArea): + pass + + +class BoardInfoArea(BaseArea): + _boardTime = None + _fields = None + _mfg_date = None + areaversion = None + _boardversion = None + _language = None + + def __str__(self): + formatstr = "version : %x\n" \ + "length : %d \n" \ + "language : %x \n" \ + "mfg_date : %s \n" \ + "boardManufacturer : %s \n" \ + "boardProductName : %s \n" \ + "boardSerialNumber : %s \n" \ + "boardPartNumber : %s \n" \ + "fruFileId : %s \n" + + tmpstr = formatstr % (ord(self.boardversion), self.size, + self.language, self.getMfgRealData(), + self.boardManufacturer, self.boardProductName, + self.boardSerialNumber, self.boardPartNumber, + self.fruFileId) + for i in range(1, 11): + valtmp = "boardextra%d" % i + if hasattr(self, valtmp): + valtmpval = getattr(self, valtmp) + tmpstr += "boardextra%d : %s \n" % (i, valtmpval) + else: + break + + return tmpstr + + def todict(self): + dic = collections.OrderedDict() + dic["boardversion"] = ord(self.boardversion) + dic["boardlength"] = self.size + dic["boardlanguage"] = self.language + dic["boardmfg_date"] = self.getMfgRealData() + dic["boardManufacturer"] = self.boardManufacturer + dic["boardProductName"] = self.boardProductName + dic["boardSerialNumber"] = self.boardSerialNumber + dic["boardPartNumber"] = self.boardPartNumber + dic["boardfruFileId"] = self.fruFileId + for i in range(1, 11): + valtmp = "boardextra%d" % i + if hasattr(self, valtmp): + valtmpval = getattr(self, valtmp) + dic[valtmp] = valtmpval + else: + break + return dic + + def decodedata(self): + index = 0 + self.areaversion = self.data[index] + index += 1 + d_print("decode length :%d class size:%d" % + ((ord(self.data[index]) * 8), self.size)) + index += 2 + + timetmp = self.data[index: index + 3] + self.mfg_date = ord(timetmp[0]) | ( + ord(timetmp[1]) << 8) | (ord(timetmp[2]) << 16) + d_print("decode getMfgRealData :%s" % self.getMfgRealData()) + index += 3 + + templen = FruUtil.decodeLength(self.data[index]) + self.boardManufacturer = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode boardManufacturer:%s" % self.boardManufacturer) + + templen = FruUtil.decodeLength(self.data[index]) + self.boardProductName = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode boardProductName:%s" % self.boardProductName) + + templen = FruUtil.decodeLength(self.data[index]) + self.boardSerialNumber = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode boardSerialNumber:%s" % self.boardSerialNumber) + + templen = FruUtil.decodeLength(self.data[index]) + self.boardPartNumber = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode boardPartNumber:%s" % self.boardPartNumber) + + templen = FruUtil.decodeLength(self.data[index]) + self.fruFileId = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode fruFileId:%s" % self.fruFileId) + + for i in range(1, 11): + valtmp = "boardextra%d" % i + if self.data[index] != chr(0xc1): + templen = FruUtil.decodeLength(self.data[index]) + tmpval = self.data[index + 1: index + templen + 1] + setattr(self, valtmp, tmpval) + index += templen + 1 + d_print("decode boardextra%d:%s" % (i, tmpval)) + else: + break + + def fruSetValue(self, field, value): + tmp_field = getattr(self, field, None) + if tmp_field is not None: + setattr(self, field, value) + + def recalcute(self): + d_print("boardInfoArea version:%x" % ord(self.boardversion)) + d_print("boardInfoArea length:%d" % self.size) + d_print("boardInfoArea language:%x" % self.language) + self.mfg_date = FruUtil.minToData() + d_print("boardInfoArea mfg_date:%x" % self.mfg_date) + + self.data = chr(ord(self.boardversion)) + \ + chr(self.size // 8) + chr(self.language) + + self.data += chr(self.mfg_date & 0xFF) + self.data += chr((self.mfg_date >> 8) & 0xFF) + self.data += chr((self.mfg_date >> 16) & 0xFF) + + d_print("boardInfoArea boardManufacturer:%s" % self.boardManufacturer) + typelength = FruUtil.getTypeLength(self.boardManufacturer) + self.data += chr(typelength) + self.data += self.boardManufacturer + + d_print("boardInfoArea boardProductName:%s" % self.boardProductName) + self.data += chr(FruUtil.getTypeLength(self.boardProductName)) + self.data += self.boardProductName + + d_print("boardInfoArea boardSerialNumber:%s" % self.boardSerialNumber) + self.data += chr(FruUtil.getTypeLength(self.boardSerialNumber)) + self.data += self.boardSerialNumber + + d_print("boardInfoArea boardPartNumber:%s" % self.boardPartNumber) + self.data += chr(FruUtil.getTypeLength(self.boardPartNumber)) + self.data += self.boardPartNumber + + d_print("boardInfoArea fruFileId:%s" % self.fruFileId) + self.data += chr(FruUtil.getTypeLength(self.fruFileId)) + self.data += self.fruFileId + + for i in range(1, 11): + valtmp = "boardextra%d" % i + if hasattr(self, valtmp): + valtmpval = getattr(self, valtmp) + d_print("boardInfoArea boardextra%d:%s" % (i, valtmpval)) + self.data += chr(FruUtil.getTypeLength(valtmpval)) + if valtmpval is not None: + self.data += valtmpval + else: + break + + self.data += chr(0xc1) + + if len(self.data) > (self.size - 1): + incr = (len(self.data) - self.size) // 8 + 1 + self.size += incr * 8 + + self.data = self.data[0:1] + chr(self.size // 8) + self.data[2:] + d_print("self data:%d" % len(self.data)) + d_print("self size:%d" % self.size) + d_print("adjust size:%d" % (self.size - len(self.data) - 1)) + self.data = self.data.ljust((self.size - 1), chr(self.INITVALUE[0])) + + # checksum + checksum = FruUtil.checksum(self.data) + d_print("board info checksum:%x" % checksum) + self.data += chr(checksum) + + def getMfgRealData(self): + starttime = datetime(1996, 1, 1, 0, 0, 0) + mactime = starttime + timedelta(minutes=self.mfg_date) + return mactime + + @property + def language(self): + self._language = 25 + return self._language + + @property + def mfg_date(self): + return self._mfg_date + + @mfg_date.setter + def mfg_date(self, val): + self._mfg_date = val + + @property + def boardversion(self): + self._boardversion = self.COMMON_HEAD_VERSION + return self._boardversion + + @property + def fruFileId(self): + return self._FRUFileID + + @fruFileId.setter + def fruFileId(self, val): + self._FRUFileID = val + + @property + def boardPartNumber(self): + return self._boardPartNumber + + @boardPartNumber.setter + def boardPartNumber(self, val): + self._boardPartNumber = val + + @property + def boardSerialNumber(self): + return self._boardSerialNumber + + @boardSerialNumber.setter + def boardSerialNumber(self, val): + self._boardSerialNumber = val + + @property + def boardProductName(self): + return self._boradProductName + + @boardProductName.setter + def boardProductName(self, val): + self._boradProductName = val + + @property + def boardManufacturer(self): + return self._boardManufacturer + + @boardManufacturer.setter + def boardManufacturer(self, val): + self._boardManufacturer = val + + @property + def boardTime(self): + return self._boardTime + + @boardTime.setter + def boardTime(self, val): + self._boardTime = val + + @property + def fields(self): + return self._fields + + @fields.setter + def fields(self, val): + self._fields = val + + +class ProductInfoArea(BaseArea): + _productManufacturer = None + _productAssetTag = None + _FRUFileID = None + _language = None + + def __str__(self): + formatstr = "version : %x\n" \ + "length : %d \n" \ + "language : %x \n" \ + "productManufacturer : %s \n" \ + "productName : %s \n" \ + "productPartModelName: %s \n" \ + "productVersion : %s \n" \ + "productSerialNumber : %s \n" \ + "productAssetTag : %s \n" \ + "fruFileId : %s \n" + + tmpstr = formatstr % (ord(self.areaversion), self.size, + self.language, self.productManufacturer, + self.productName, self.productPartModelName, + self.productVersion, self.productSerialNumber, + self.productAssetTag, self.fruFileId) + + for i in range(1, 11): + valtmp = "productextra%d" % i + if hasattr(self, valtmp): + valtmpval = getattr(self, valtmp) + tmpstr += "productextra%d : %s \n" % (i, valtmpval) + else: + break + + return tmpstr + + def todict(self): + dic = collections.OrderedDict() + dic["productversion"] = ord(self.areaversion) + dic["productlength"] = self.size + dic["productlanguage"] = self.language + dic["productManufacturer"] = self.productManufacturer + dic["productName"] = self.productName + dic["productPartModelName"] = self.productPartModelName + dic["productVersion"] = int(self.productVersion, 16) + dic["productSerialNumber"] = self.productSerialNumber + dic["productAssetTag"] = self.productAssetTag + dic["productfruFileId"] = self.fruFileId + for i in range(1, 11): + valtmp = "productextra%d" % i + if hasattr(self, valtmp): + valtmpval = getattr(self, valtmp) + dic[valtmp] = valtmpval + else: + break + return dic + + def decodedata(self): + index = 0 + self.areaversion = self.data[index] # 0 + index += 1 + d_print("decode length %d" % (ord(self.data[index]) * 8)) + d_print("class size %d" % self.size) + index += 2 + + templen = FruUtil.decodeLength(self.data[index]) + self.productManufacturer = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode productManufacturer:%s" % self.productManufacturer) + + templen = FruUtil.decodeLength(self.data[index]) + self.productName = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode productName:%s" % self.productName) + + templen = FruUtil.decodeLength(self.data[index]) + self.productPartModelName = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode productPartModelName:%s" % self.productPartModelName) + + templen = FruUtil.decodeLength(self.data[index]) + self.productVersion = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode productVersion:%s" % self.productVersion) + + templen = FruUtil.decodeLength(self.data[index]) + self.productSerialNumber = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode productSerialNumber:%s" % self.productSerialNumber) + + templen = FruUtil.decodeLength(self.data[index]) + self.productAssetTag = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode productAssetTag:%s" % self.productAssetTag) + + templen = FruUtil.decodeLength(self.data[index]) + self.fruFileId = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode fruFileId:%s" % self.fruFileId) + + for i in range(1, 11): + valtmp = "productextra%d" % i + if self.data[index] != chr(0xc1) and index < self.size - 1: + templen = FruUtil.decodeLength(self.data[index]) + if templen == 0: + break + tmpval = self.data[index + 1: index + templen + 1] + d_print("decode boardextra%d:%s" % (i, tmpval)) + setattr(self, valtmp, tmpval) + index += templen + 1 + else: + break + + @property + def productVersion(self): + return self._productVersion + + @productVersion.setter + def productVersion(self, name): + self._productVersion = name + + @property + def areaversion(self): + self._areaversion = self.COMMON_HEAD_VERSION + return self._areaversion + + @areaversion.setter + def areaversion(self, name): + self._areaversion = name + + @property + def language(self): + self._language = 25 + return self._language + + @property + def productManufacturer(self): + return self._productManufacturer + + @productManufacturer.setter + def productManufacturer(self, name): + self._productManufacturer = name + + @property + def productName(self): + return self._productName + + @productName.setter + def productName(self, name): + self._productName = name + + @property + def productPartModelName(self): + return self._productPartModelName + + @productPartModelName.setter + def productPartModelName(self, name): + self._productPartModelName = name + + @property + def productSerialNumber(self): + return self._productSerialNumber + + @productSerialNumber.setter + def productSerialNumber(self, name): + self._productSerialNumber = name + + @property + def productAssetTag(self): + return self._productAssetTag + + @productAssetTag.setter + def productAssetTag(self, name): + self._productAssetTag = name + + @property + def fruFileId(self): + return self._FRUFileID + + @fruFileId.setter + def fruFileId(self, name): + self._FRUFileID = name + + def fruSetValue(self, field, value): + tmp_field = getattr(self, field, None) + if tmp_field is not None: + setattr(self, field, value) + + def recalcute(self): + d_print("product version:%x" % ord(self.areaversion)) + d_print("product length:%d" % self.size) + d_print("product language:%x" % self.language) + self.data = chr(ord(self.areaversion)) + \ + chr(self.size // 8) + chr(self.language) + + typelength = FruUtil.getTypeLength(self.productManufacturer) + self.data += chr(typelength) + self.data += self.productManufacturer + + self.data += chr(FruUtil.getTypeLength(self.productName)) + self.data += self.productName + + self.data += chr(FruUtil.getTypeLength(self.productPartModelName)) + self.data += self.productPartModelName + + self.data += chr(FruUtil.getTypeLength(self.productVersion)) + self.data += self.productVersion + + self.data += chr(FruUtil.getTypeLength(self.productSerialNumber)) + self.data += self.productSerialNumber + + self.data += chr(FruUtil.getTypeLength(self.productAssetTag)) + if self.productAssetTag is not None: + self.data += self.productAssetTag + + self.data += chr(FruUtil.getTypeLength(self.fruFileId)) + self.data += self.fruFileId + + for i in range(1, 11): + valtmp = "productextra%d" % i + if hasattr(self, valtmp): + valtmpval = getattr(self, valtmp) + d_print("boardInfoArea productextra%d:%s" % (i, valtmpval)) + self.data += chr(FruUtil.getTypeLength(valtmpval)) + if valtmpval is not None: + self.data += valtmpval + else: + break + + self.data += chr(0xc1) + if len(self.data) > (self.size - 1): + incr = (len(self.data) - self.size) // 8 + 1 + self.size += incr * 8 + d_print("self.data:%d" % len(self.data)) + d_print("self.size:%d" % self.size) + + self.data = self.data[0:1] + chr(self.size // 8) + self.data[2:] + self.data = self.data.ljust((self.size - 1), chr(self.INITVALUE[0])) + checksum = FruUtil.checksum(self.data) + d_print("board info checksum:%x" % checksum) + self.data += chr(checksum) + + +class MultiRecordArea(BaseArea): + pass + + +class Field(object): + + def __init__(self, fieldType="ASCII", fieldData=""): + self.fieldData = fieldData + self.fieldType = fieldType + + @property + def fieldType(self): + return self.fieldType + + @property + def fieldData(self): + return self.fieldData + + +class ipmifru(BaseArea): + _BoardInfoArea = None + _ProductInfoArea = None + _InternalUseArea = None + _ChassisInfoArea = None + _multiRecordArea = None + _productinfoAreaOffset = BaseArea.INITVALUE + _boardInfoAreaOffset = BaseArea.INITVALUE + _internalUserAreaOffset = BaseArea.INITVALUE + _chassicInfoAreaOffset = BaseArea.INITVALUE + _multiRecordAreaOffset = BaseArea.INITVALUE + _bindata = None + _bodybin = None + _version = BaseArea.COMMON_HEAD_VERSION + _zeroCheckSum = None + _frusize = 256 + + def __str__(self): + tmpstr = "" + if self.boardInfoArea.isPresent: + tmpstr += "\nboardinfoarea: \n" + tmpstr += self.boardInfoArea.__str__() + if self.productInfoArea.isPresent: + tmpstr += "\nproductinfoarea: \n" + tmpstr += self.productInfoArea.__str__() + return tmpstr + + def decodeBin(self, eeprom): + commonHead = eeprom[0:8] + d_print("decode version %x" % ord(commonHead[0])) + if ord(self.COMMON_HEAD_VERSION) != ord(commonHead[0]): + raise FruException("HEAD VERSION error,not Fru format!", -10) + if FruUtil.checksum(commonHead[0:7]) != ord(commonHead[7]): + strtemp = "check header checksum error [cal:%02x data:%02x]" % ( + FruUtil.checksum(commonHead[0:7]), ord(commonHead[7])) + raise FruException(strtemp, -3) + if ord(commonHead[1]) != ord(self.INITVALUE): + d_print("Internal Use Area is present") + self.internalUseArea = InternalUseArea( + name="Internal Use Area", size=self.SUGGESTED_SIZE_INTERNAL_USE_AREA) + self.internalUseArea.isPresent = True + self.internalUserAreaOffset = ord(commonHead[1]) + self.internalUseArea.data = eeprom[self.internalUserAreaOffset * 8: ( + self.internalUserAreaOffset * 8 + self.internalUseArea.size)] + if ord(commonHead[2]) != ord(self.INITVALUE): + d_print("Chassis Info Area is present") + self.chassisInfoArea = ChassisInfoArea( + name="Chassis Info Area", size=self.SUGGESTED_SIZE_CHASSIS_INFO_AREA) + self.chassisInfoArea.isPresent = True + self.chassicInfoAreaOffset = ord(commonHead[2]) + self.chassisInfoArea.data = eeprom[self.chassicInfoAreaOffset * 8: ( + self.chassicInfoAreaOffset * 8 + self.chassisInfoArea.size)] + if ord(commonHead[3]) != ord(self.INITVALUE): + self.boardInfoArea = BoardInfoArea( + name="Board Info Area", size=self.SUGGESTED_SIZE_BOARD_INFO_AREA) + self.boardInfoArea.isPresent = True + self.boardInfoAreaOffset = ord(commonHead[3]) + self.boardInfoArea.size = ord( + eeprom[self.boardInfoAreaOffset * 8 + 1]) * 8 + d_print("Board Info Area is present size:%d" % + (self.boardInfoArea.size)) + self.boardInfoArea.data = eeprom[self.boardInfoAreaOffset * 8: ( + self.boardInfoAreaOffset * 8 + self.boardInfoArea.size)] + if FruUtil.checksum(self.boardInfoArea.data[:-1]) != ord(self.boardInfoArea.data[-1:]): + strtmp = "check boardInfoArea checksum error[cal:%02x data:%02x]" % \ + (FruUtil.checksum( + self.boardInfoArea.data[:-1]), ord(self.boardInfoArea.data[-1:])) + raise FruException(strtmp, -3) + self.boardInfoArea.decodedata() + if ord(commonHead[4]) != ord(self.INITVALUE): + d_print("Product Info Area is present") + self.productInfoArea = ProductInfoArea( + name="Product Info Area ", size=self.SUGGESTED_SIZE_PRODUCT_INFO_AREA) + self.productInfoArea.isPresent = True + self.productinfoAreaOffset = ord(commonHead[4]) + d_print("length offset value: %02x" % + ord(eeprom[self.productinfoAreaOffset * 8 + 1])) + self.productInfoArea.size = ord( + eeprom[self.productinfoAreaOffset * 8 + 1]) * 8 + d_print("Product Info Area is present size:%d" % + (self.productInfoArea.size)) + + self.productInfoArea.data = eeprom[self.productinfoAreaOffset * 8: ( + self.productinfoAreaOffset * 8 + self.productInfoArea.size)] + if FruUtil.checksum(self.productInfoArea.data[:-1]) != ord(self.productInfoArea.data[-1:]): + strtmp = "check productInfoArea checksum error [cal:%02x data:%02x]" % ( + FruUtil.checksum(self.productInfoArea.data[:-1]), ord(self.productInfoArea.data[-1:])) + raise FruException(strtmp, -3) + self.productInfoArea.decodedata() + if ord(commonHead[5]) != ord(self.INITVALUE): + self.multiRecordArea = MultiRecordArea( + name="MultiRecord record Area ") + d_print("MultiRecord record present") + self.multiRecordArea.isPresent = True + self.multiRecordAreaOffset = ord(commonHead[5]) + self.multiRecordArea.data = eeprom[self.multiRecordAreaOffset * 8: ( + self.multiRecordAreaOffset * 8 + self.multiRecordArea.size)] + + def initDefault(self): + self.version = self.COMMON_HEAD_VERSION + self.internalUserAreaOffset = self.INITVALUE + self.chassicInfoAreaOffset = self.INITVALUE + self.boardInfoAreaOffset = self.INITVALUE + self.productinfoAreaOffset = self.INITVALUE + self.multiRecordAreaOffset = self.INITVALUE + self.zeroCheckSum = self.INITVALUE + self.offset = self.SUGGESTED_SIZE_COMMON_HEADER + self.productInfoArea = None + self.internalUseArea = None + self.boardInfoArea = None + self.chassisInfoArea = None + self.multiRecordArea = None + # self.recalcute() + + @property + def version(self): + return self._version + + @version.setter + def version(self, name): + self._version = name + + @property + def internalUserAreaOffset(self): + return self._internalUserAreaOffset + + @internalUserAreaOffset.setter + def internalUserAreaOffset(self, obj): + self._internalUserAreaOffset = obj + + @property + def chassicInfoAreaOffset(self): + return self._chassicInfoAreaOffset + + @chassicInfoAreaOffset.setter + def chassicInfoAreaOffset(self, obj): + self._chassicInfoAreaOffset = obj + + @property + def productinfoAreaOffset(self): + return self._productinfoAreaOffset + + @productinfoAreaOffset.setter + def productinfoAreaOffset(self, obj): + self._productinfoAreaOffset = obj + + @property + def boardInfoAreaOffset(self): + return self._boardInfoAreaOffset + + @boardInfoAreaOffset.setter + def boardInfoAreaOffset(self, obj): + self._boardInfoAreaOffset = obj + + @property + def multiRecordAreaOffset(self): + return self._multiRecordAreaOffset + + @multiRecordAreaOffset.setter + def multiRecordAreaOffset(self, obj): + self._multiRecordAreaOffset = obj + + @property + def zeroCheckSum(self): + return self._zeroCheckSum + + @zeroCheckSum.setter + def zeroCheckSum(self, obj): + self._zeroCheckSum = obj + + @property + def productInfoArea(self): + return self._ProductInfoArea + + @productInfoArea.setter + def productInfoArea(self, obj): + self._ProductInfoArea = obj + + @property + def internalUseArea(self): + return self._InternalUseArea + + @internalUseArea.setter + def internalUseArea(self, obj): + self.internalUseArea = obj + + @property + def boardInfoArea(self): + return self._BoardInfoArea + + @boardInfoArea.setter + def boardInfoArea(self, obj): + self._BoardInfoArea = obj + + @property + def chassisInfoArea(self): + return self._ChassisInfoArea + + @chassisInfoArea.setter + def chassisInfoArea(self, obj): + self._ChassisInfoArea = obj + + @property + def multiRecordArea(self): + return self._multiRecordArea + + @multiRecordArea.setter + def multiRecordArea(self, obj): + self._multiRecordArea = obj + + @property + def bindata(self): + return self._bindata + + @bindata.setter + def bindata(self, obj): + self._bindata = obj + + @property + def bodybin(self): + return self._bodybin + + @bodybin.setter + def bodybin(self, obj): + self._bodybin = obj + + def recalcuteCommonHead(self): + self.bindata = "" + self.offset = self.SUGGESTED_SIZE_COMMON_HEADER + d_print("common Header %d" % self.offset) + d_print("fru eeprom size %d" % self._frusize) + if self.internalUseArea is not None and self.internalUseArea.isPresent: + self.internalUserAreaOffset = self.offset // 8 + self.offset += self.internalUseArea.size + d_print("internalUseArea is present offset:%d" % self.offset) + + if self.chassisInfoArea is not None and self.chassisInfoArea.isPresent: + self.chassicInfoAreaOffset = self.offset // 8 + self.offset += self.chassisInfoArea.size + d_print("chassisInfoArea is present offset:%d" % self.offset) + + if self.boardInfoArea is not None and self.boardInfoArea.isPresent: + self.boardInfoAreaOffset = self.offset // 8 + self.offset += self.boardInfoArea.size + d_print("boardInfoArea is present offset:%d" % self.offset) + d_print("boardInfoArea is present size:%d" % + self.boardInfoArea.size) + + if self.productInfoArea is not None and self.productInfoArea.isPresent: + self.productinfoAreaOffset = self.offset // 8 + self.offset += self.productInfoArea.size + d_print("productInfoArea is present offset:%d" % self.offset) + + if self.multiRecordArea is not None and self.multiRecordArea.isPresent: + self.multiRecordAreaOffset = self.offset // 8 + d_print("multiRecordArea is present offset:%d" % self.offset) + + if self.internalUserAreaOffset == self.INITVALUE: + self.internalUserAreaOffset = 0 + if self.productinfoAreaOffset == self.INITVALUE: + self.productinfoAreaOffset = 0 + if self.chassicInfoAreaOffset == self.INITVALUE: + self.chassicInfoAreaOffset = 0 + if self.boardInfoAreaOffset == self.INITVALUE: + self.boardInfoAreaOffset = 0 + if self.multiRecordAreaOffset == self.INITVALUE: + self.multiRecordAreaOffset = 0 + + self.zeroCheckSum = (0x100 - ord(self.version) - self.internalUserAreaOffset - self.chassicInfoAreaOffset - self.productinfoAreaOffset + - self.boardInfoAreaOffset - self.multiRecordAreaOffset) & 0xff + d_print("zerochecksum:%x" % self.zeroCheckSum) + self.data = "" + self.data += chr(self.version[0]) + chr(self.internalUserAreaOffset) + chr(self.chassicInfoAreaOffset) + chr( + self.boardInfoAreaOffset) + chr(self.productinfoAreaOffset) + chr(self.multiRecordAreaOffset) + chr(self.INITVALUE[0]) + chr(self.zeroCheckSum) + + self.bindata = self.data + self.bodybin + totallen = len(self.bindata) + d_print("totallen %d" % totallen) + if totallen < self._frusize: + self.bindata = self.bindata.ljust(self._frusize, chr(self.INITVALUE[0])) + else: + raise FruException('bin data more than %d' % self._frusize, -2) + + def recalcutebin(self): + self.bodybin = "" + if self.internalUseArea is not None and self.internalUseArea.isPresent: + d_print("internalUseArea present") + self.bodybin += self.internalUseArea.data + if self.chassisInfoArea is not None and self.chassisInfoArea.isPresent: + d_print("chassisInfoArea present") + self.bodybin += self.chassisInfoArea.data + if self.boardInfoArea is not None and self.boardInfoArea.isPresent: + d_print("boardInfoArea present") + self.boardInfoArea.recalcute() + self.bodybin += self.boardInfoArea.data + if self.productInfoArea is not None and self.productInfoArea.isPresent: + d_print("productInfoAreapresent") + self.productInfoArea.recalcute() + self.bodybin += self.productInfoArea.data + if self.multiRecordArea is not None and self.multiRecordArea.isPresent: + d_print("multiRecordArea present") + self.bodybin += self.productInfoArea.data + + def recalcute(self, fru_eeprom_size=256): + self._frusize = fru_eeprom_size + self.recalcutebin() + self.recalcuteCommonHead() + + def setValue(self, area, field, value): + tmp_area = getattr(self, area, None) + if tmp_area is not None: + tmp_area.fruSetValue(field, value) diff --git a/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/installer.conf b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/installer.conf new file mode 100644 index 00000000000..eb8083bba3b --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/installer.conf @@ -0,0 +1,5 @@ +CONSOLE_SPEED=9600 +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="intel_idle.max_cstate=0 idle=poll intel_iommu=on iommu=pt modprobe.blacklist=ice,mei_me,i2c_i801,i2c_ismt" +CONSOLE_PORT=0x5060 +CONSOLE_DEV=0 +ONIE_IMAGE_PART_SIZE=1048576 \ No newline at end of file diff --git a/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/led_proc_init.soc b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/led_proc_init.soc new file mode 100644 index 00000000000..98cde1198fe --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/led_proc_init.soc @@ -0,0 +1,7 @@ +led load /usr/share/sonic/platform/custom_led.bin + +led auto on + +led start + +linkscan SwPortBitMap=xe,ce,cd,d3c diff --git a/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/media_settings.json b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/media_settings.json new file mode 100644 index 00000000000..77d08d5b259 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/media_settings.json @@ -0,0 +1,258 @@ +{ + "GLOBAL_MEDIA_SETTINGS": { + "1-128": { + "Default": { + "speed:800.*": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre2": { + "lane0": "0x00000001", + "lane1": "0x00000001", + "lane2": "0x00000001", + "lane3": "0x00000001", + "lane4": "0x00000001", + "lane5": "0x00000001", + "lane6": "0x00000001", + "lane7": "0x00000001" + }, + "pre1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "main": { + "lane0": "0x00000050", + "lane1": "0x00000050", + "lane2": "0x00000050", + "lane3": "0x00000050", + "lane4": "0x00000050", + "lane5": "0x00000050", + "lane6": "0x00000050", + "lane7": "0x00000050" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post2": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xffffffff" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + }, + "speed:400.*": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "pre2": { + "lane0": "0x00000001", + "lane1": "0x00000001", + "lane2": "0x00000001", + "lane3": "0x00000001" + }, + "pre1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8" + }, + "main": { + "lane0": "0x00000050", + "lane1": "0x00000050", + "lane2": "0x00000050", + "lane3": "0x00000050" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc" + }, + "post2": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + }, + "speed:200.*": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "pre1": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe" + }, + "main": { + "lane0": "0x0000004B", + "lane1": "0x0000004B", + "lane2": "0x0000004B", + "lane3": "0x0000004B" + }, + "post1": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + }, + "speed:100.*": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "pre1": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe" + }, + "main": { + "lane0": "0x0000004B", + "lane1": "0x0000004B", + "lane2": "0x0000004B", + "lane3": "0x0000004B" + }, + "post1": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + }, + "speed:Default": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "pre2": { + "lane0": "0x00000001", + "lane1": "0x00000001", + "lane2": "0x00000001", + "lane3": "0x00000001" + }, + "pre1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8" + }, + "main": { + "lane0": "0x00000050", + "lane1": "0x00000050", + "lane2": "0x00000050", + "lane3": "0x00000050" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc" + }, + "post2": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + } + } + } +} + + diff --git a/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/monitor.py b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/monitor.py new file mode 100755 index 00000000000..4ae37a51b5d --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/monitor.py @@ -0,0 +1,415 @@ +#!/usr/bin/python3 +# * onboard temperature sensors +# * FAN trays +# * PSU +# +import os +import re +from lxml import etree as ET +import glob +import json +from decimal import Decimal +from fru import ipmifru +from plat_hal.interface import interface + +int_case = interface() +MAILBOX_DIR = "/sys/bus/i2c/devices/" +BOARD_ID_PATH = "/sys/module/platform_common/parameters/dfd_my_type" +BOARD_AIRFLOW_PATH = "/etc/sonic/.airflow" +SUB_VERSION_FILE = "/etc/sonic/.subversion" + + +CONFIG_NAME = "dev.xml" + + +def byteTostr(val): + strtmp = '' + for value in val: + strtmp += chr(value) + return strtmp + + +def typeTostr(val): + if isinstance(val, bytes): + strtmp = byteTostr(val) + return strtmp + return val + + +def get_board_id(): + if not os.path.exists(BOARD_ID_PATH): + return "NA" + with open(BOARD_ID_PATH) as fd: + id_str = fd.read().strip() + return "0x%x" % (int(id_str, 10)) + + +def getboardairflow(): + if not os.path.exists(BOARD_AIRFLOW_PATH): + return "NA" + with open(BOARD_AIRFLOW_PATH) as fd: + airflow_str = fd.read().strip() + data = json.loads(airflow_str) + airflow = data.get("board", "NA") + return airflow + + +def get_sub_version(): + if not os.path.exists(SUB_VERSION_FILE): + return "NA" + with open(SUB_VERSION_FILE) as fd: + sub_ver = fd.read().strip() + return sub_ver + + +boardid = get_board_id() +boardairflow = getboardairflow() +sub_ver = (get_sub_version()).replace("-", "_") + + +DEV_XML_FILE_LIST = [ + "dev_" + boardid + "_" + sub_ver + "_" + boardairflow + ".xml", + "dev_" + boardid + "_" + sub_ver + ".xml", + "dev_" + boardid + "_" + boardairflow + ".xml", + "dev_" + boardid + ".xml", + "dev_" + boardairflow + ".xml", +] + + +def dev_file_read(path, offset, read_len): + retval = "ERR" + val_list = [] + msg = "" + ret = "" + fd = -1 + + if not os.path.exists(path): + return False, "%s %s not found" % (retval, path) + + try: + fd = os.open(path, os.O_RDONLY) + os.lseek(fd, offset, os.SEEK_SET) + ret = os.read(fd, read_len) + for item in ret: + val_list.append(item) + except Exception as e: + msg = str(e) + return False, "%s %s" % (retval, msg) + finally: + if fd > 0: + os.close(fd) + return True, val_list + + +def getPMCreg(location): + retval = 'ERR' + if not os.path.isfile(location): + return "%s %s notfound" % (retval, location) + try: + with open(location, 'r') as fd: + retval = fd.read() + except Exception as error: + return "ERR %s" % str(error) + + retval = retval.rstrip('\r\n') + retval = retval.lstrip(" ") + return retval + + +# Get a mailbox register +def get_pmc_register(reg_name): + retval = 'ERR' + mb_reg_file = reg_name + filepath = glob.glob(mb_reg_file) + if len(filepath) == 0: + return "%s %s notfound" % (retval, mb_reg_file) + mb_reg_file = filepath[0] + if not os.path.isfile(mb_reg_file): + # print mb_reg_file, 'not found !' + return "%s %s notfound" % (retval, mb_reg_file) + try: + with open(mb_reg_file, 'rb') as fd: + retval = fd.read() + retval = typeTostr(retval) + except Exception as error: + retval = "%s %s read failed, msg: %s" % (retval, mb_reg_file, str(error)) + + retval = retval.rstrip('\r\n') + retval = retval.lstrip(" ") + return retval + + +class checktype(): + def __init__(self, test1): + self.test1 = test1 + + @staticmethod + def getValue(location, bit, data_type, coefficient=1, addend=0): + try: + value_t = get_pmc_register(location) + if value_t.startswith("ERR"): + return value_t + if value_t.startswith("NA") or value_t.startswith("ACCESS FAILED"): + return "ERR %s read failed" % location + if data_type == 1: + return float('%.1f' % ((float(value_t) / 1000) + addend)) + if data_type == 2: + return float('%.1f' % (float(value_t) / 100)) + if data_type == 3: + psu_status = int(value_t, 16) + return (psu_status & (1 << bit)) >> bit + if data_type == 4: + return int(value_t, 10) + if data_type == 5: + return float('%.1f' % (float(value_t) / 1000 / 1000)) + if data_type == 6: + return Decimal((float(value_t) * coefficient / 1000) + addend).quantize(Decimal('0.000')) + return value_t + except Exception as e: + value_t = "ERR %s" % str(e) + return value_t + + # fanFRU + @staticmethod + def decodeBinByValue(retval): + fru = ipmifru() + fru.decodeBin(retval) + return fru + + @staticmethod + def get_fan_eeprom_info(prob_t, root, fan_name): + try: + ret = int_case.get_fan_eeprom_info(fan_name) + if ret["NAME"] == int_case.na_ret or ret["HW"] == int_case.na_ret or ret["SN"] == int_case.na_ret: + return "ERR read eeprom information failed" + + fanpro = {} + fanpro['fan_type'] = ret["NAME"] + fanpro['hw_version'] = ret["HW"] + fanpro['sn'] = ret["SN"] + fan_display_name_dict = status.getDecodValue(root, "fan_display_name") + fan_name = fanpro['fan_type'].strip() + if len(fan_display_name_dict) == 0: + return fanpro + if fan_name not in fan_display_name_dict: + prob_t['errcode'] = -1 + prob_t['errmsg'] = '%s' % ("ERR fan name: %s not support" % fan_name) + else: + fanpro['fan_type'] = fan_display_name_dict[fan_name] + return fanpro + except Exception as error: + return "ERR " + str(error) + + @staticmethod + def getpsufruValue(prob_t, root, val): + try: + psu_match = False + psupro = {} + + ret = int_case.get_psu_fru_info(val) + if ret["HW"] == int_case.na_ret or ret["PN"] == int_case.na_ret or ret["SN"] == int_case.na_ret: + return "ERR read eeprom information failed" + + psupro['type1'] = ret["PN"] + psupro['sn'] = ret["SN"] + psupro['hw_version'] = ret["HW"] + + psu_dict = status.getDecodValue(root, "psutype") + psupro['type1'] = psupro['type1'].strip() + if len(psu_dict) == 0: + return psupro + for psu_name, display_name in psu_dict.items(): + if psu_name.strip() == psupro['type1']: + psupro['type1'] = display_name + psu_match = True + break + if psu_match is not True: + prob_t['errcode'] = -1 + prob_t['errmsg'] = '%s' % ("ERR psu name: %s not support" % psupro['type1']) + return psupro + except Exception as error: + return "ERR " + str(error) + + + +class status(): + def __init__(self, productname): + self.productname = productname + + @staticmethod + def getETroot(filename): + safe_parser = ET.XMLParser(resolve_entities=False, no_network=True, load_dtd=False,) + with open(filename, 'rb') as f: + xml_bytes = f.read() + root = ET.fromstring(xml_bytes, parser=safe_parser) + return root + + @staticmethod + def getDecodValue(collection, decode): + decodes = collection.find('decode') + testdecode = decodes.find(decode) + test = {} + if testdecode is None: + return test + for neighbor in testdecode.iter('code'): + test[neighbor.attrib["key"]] = neighbor.attrib["value"] + return test + + @staticmethod + def getfileValue(location): + return checktype.getValue(location, " ", " ") + + @staticmethod + def getETValue(a, filename, tagname): + root = status.getETroot(filename) + for neighbor in root.iter(tagname): + prob_t = {} + prob_t = dict(neighbor.attrib) + prob_t['errcode'] = 0 + prob_t['errmsg'] = '' + for pros in neighbor.iter("property"): + ret = dict(list(neighbor.attrib.items()) + list(pros.attrib.items())) + if ret.get('e2type') == 'fru' and ret.get("name") == "fru": # fan + fruval = checktype.get_fan_eeprom_info(prob_t, root, ret["fan_name"]) + if isinstance(fruval, str) and fruval.startswith("ERR"): + prob_t['errcode'] = -1 + prob_t['errmsg'] = fruval + break + prob_t.update(fruval) + continue + + if ret.get("name") == "psu": # psu + psuval = checktype.getpsufruValue(prob_t, root, ret["location"]) + if isinstance(psuval, str) and psuval.startswith("ERR"): + prob_t['errcode'] = -1 + prob_t['errmsg'] = psuval + break + prob_t.update(psuval) + continue + + if ret.get("gettype") == "config": + prob_t[ret["name"]] = ret["value"] + continue + + if 'type' not in ret.keys(): + val = "0" + else: + val = ret["type"] + if 'bit' not in ret.keys(): + bit = "0" + else: + bit = ret["bit"] + if 'coefficient' not in ret.keys(): + coefficient = 1 + else: + coefficient = float(ret["coefficient"]) + if 'addend' not in ret.keys(): + addend = 0 + else: + addend = float(ret["addend"]) + + s = checktype.getValue(ret["location"], int(bit), int(val), coefficient, addend) + if isinstance(s, str) and s.startswith("ERR"): + prob_t['errcode'] = -1 + prob_t['errmsg'] = s + break + if 'default' in ret.keys(): + rt = status.getDecodValue(root, ret['decode']) + prob_t['errmsg'] = rt[str(s)] + if str(s) != ret["default"]: + prob_t['errcode'] = -1 + break + else: + if 'decode' in ret.keys(): + rt = status.getDecodValue(root, ret['decode']) + if (ret['decode'] == "psutype" and s.replace("\x00", "").rstrip() not in rt): + prob_t['errcode'] = -1 + prob_t['errmsg'] = '%s' % ("ERR psu name: %s not support" % + (s.replace("\x00", "").rstrip())) + else: + s = rt[str(s).replace("\x00", "").rstrip()] + name = ret["name"] + prob_t[name] = str(s) + a.append(prob_t) + + @staticmethod + def getCPUValue(a, filename, tagname): + root = status.getETroot(filename) + for neighbor in root.iter(tagname): + location = neighbor.attrib["location"] + + filepath = glob.glob(location) + if len(filepath) == 0: + return + location = filepath[0] + L = [] + for dirpath, dirnames, filenames in os.walk(location): + for file in filenames: + if file.endswith("_input"): + b = re.findall(r'temp(\d+)_input', file) + idx = int(b[0]) + L.append(idx) + L = sorted(L) + for idx in L: + prob_t = {} + prob_t["name"] = getPMCreg("%s/temp%d_label" % (location, idx)) + prob_t["temp"] = float(getPMCreg("%s/temp%d_input" % (location, idx))) / 1000 + prob_t["alarm"] = float(getPMCreg("%s/temp%d_crit_alarm" % (location, idx))) / 1000 + prob_t["crit"] = float(getPMCreg("%s/temp%d_crit" % (location, idx))) / 1000 + prob_t["max"] = float(getPMCreg("%s/temp%d_max" % (location, idx))) / 1000 + a.append(prob_t) + + @staticmethod + def getFileName(): + fpath = os.path.dirname(os.path.realpath(__file__)) + for file in DEV_XML_FILE_LIST: + xml = fpath + "/" + file + if os.path.exists(xml): + return xml + return fpath + "/" + CONFIG_NAME + + @staticmethod + def checkFan(ret): + _filename = status.getFileName() + # _filename = "/usr/local/bin/" + status.getFileName() + _tagname = "fan" + status.getETValue(ret, _filename, _tagname) + + @staticmethod + def getTemp(ret): + _filename = status.getFileName() + # _filename = "/usr/local/bin/" + status.getFileName() + _tagname = "temp" + status.getETValue(ret, _filename, _tagname) + + @staticmethod + def getPsu(ret): + _filename = status.getFileName() + # _filename = "/usr/local/bin/" + status.getFileName() + _tagname = "psu" + status.getETValue(ret, _filename, _tagname) + + @staticmethod + def getcputemp(ret): + _filename = status.getFileName() + _tagname = "cpus" + status.getCPUValue(ret, _filename, _tagname) + + @staticmethod + def getDcdc(ret): + _filename = status.getFileName() + _tagname = "dcdc" + status.getETValue(ret, _filename, _tagname) + + @staticmethod + def getmactemp(ret): + _filename = status.getFileName() + _tagname = "mactemp" + status.getETValue(ret, _filename, _tagname) + + @staticmethod + def getmacpower(ret): + _filename = status.getFileName() + _tagname = "macpower" + status.getETValue(ret, _filename, _tagname) + diff --git a/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/pcie.yaml b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/pcie.yaml new file mode 100644 index 00000000000..debd2d9fe1b --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/pcie.yaml @@ -0,0 +1,453 @@ +- bus: '00' + dev: '00' + fn: '0' + id: 09a2 + name: 'System peripheral: Intel Corporation Device 09a2 (rev 04)' +- bus: '00' + dev: '00' + fn: '1' + id: 09a4 + name: 'System peripheral: Intel Corporation Device 09a4 (rev 04)' +- bus: '00' + dev: '00' + fn: '2' + id: 09a3 + name: 'System peripheral: Intel Corporation Device 09a3 (rev 04)' +- bus: '00' + dev: '00' + fn: '3' + id: 09a5 + name: 'System peripheral: Intel Corporation Device 09a5 (rev 04)' +- bus: '00' + dev: '00' + fn: '4' + id: 0998 + name: 'Host bridge: Intel Corporation Device 0998' +- bus: '00' + dev: '01' + fn: '0' + id: '0b00' + name: 'System peripheral: Intel Corporation Device 0b00' +- bus: '00' + dev: '01' + fn: '1' + id: '0b00' + name: 'System peripheral: Intel Corporation Device 0b00' +- bus: '00' + dev: '01' + fn: '2' + id: '0b00' + name: 'System peripheral: Intel Corporation Device 0b00' +- bus: '00' + dev: '01' + fn: '3' + id: '0b00' + name: 'System peripheral: Intel Corporation Device 0b00' +- bus: '00' + dev: '01' + fn: '4' + id: '0b00' + name: 'System peripheral: Intel Corporation Device 0b00' +- bus: '00' + dev: '01' + fn: '5' + id: '0b00' + name: 'System peripheral: Intel Corporation Device 0b00' +- bus: '00' + dev: '01' + fn: '6' + id: '0b00' + name: 'System peripheral: Intel Corporation Device 0b00' +- bus: '00' + dev: '01' + fn: '7' + id: '0b00' + name: 'System peripheral: Intel Corporation Device 0b00' +- bus: '00' + dev: '02' + fn: '0' + id: 09a6 + name: 'System peripheral: Intel Corporation Device 09a6' +- bus: '00' + dev: '02' + fn: '1' + id: 09a7 + name: 'System peripheral: Intel Corporation Device 09a7' +- bus: '00' + dev: '02' + fn: '4' + id: '3456' + name: 'Non-Essential Instrumentation [1300]: Intel Corporation Device 3456 (rev + 01)' +- bus: '00' + dev: '06' + fn: '0' + id: 18da + name: 'PCI bridge: Intel Corporation Device 18da (rev 11)' +- bus: '00' + dev: 0e + fn: '0' + id: 18f2 + name: 'SATA controller: Intel Corporation Device 18f2 (rev 11)' +- bus: '00' + dev: 0f + fn: '0' + id: 18ac + name: 'System peripheral: Intel Corporation Device 18ac (rev 11)' +- bus: '00' + dev: '10' + fn: '0' + id: 18a8 + name: 'PCI bridge: Intel Corporation Device 18a8 (rev 11)' +- bus: '00' + dev: '12' + fn: '0' + id: 18aa + name: 'PCI bridge: Intel Corporation Device 18aa (rev 11)' +- bus: '00' + dev: '13' + fn: '0' + id: 18ab + name: 'PCI bridge: Intel Corporation Device 18ab (rev 11)' +- bus: '00' + dev: '14' + fn: '0' + id: 18ad + name: 'PCI bridge: Intel Corporation Device 18ad (rev 11)' +- bus: '00' + dev: '18' + fn: '0' + id: 18d3 + name: 'Communication controller: Intel Corporation Device 18d3 (rev 11)' +- bus: '00' + dev: '18' + fn: '1' + id: 18d4 + name: 'Communication controller: Intel Corporation Device 18d4 (rev 11)' +- bus: '00' + dev: '18' + fn: '4' + id: 18d6 + name: 'Communication controller: Intel Corporation Device 18d6 (rev 11)' +- bus: '00' + dev: 1a + fn: '0' + id: 18d8 + name: 'Serial controller: Intel Corporation Device 18d8 (rev 11)' +- bus: '00' + dev: 1a + fn: '1' + id: 18d8 + name: 'Serial controller: Intel Corporation Device 18d8 (rev 11)' +- bus: '00' + dev: 1a + fn: '2' + id: 18d8 + name: 'Serial controller: Intel Corporation Device 18d8 (rev 11)' +- bus: '00' + dev: 1a + fn: '3' + id: 18d9 + name: 'Unassigned class [ff00]: Intel Corporation Device 18d9 (rev 11)' +- bus: '00' + dev: 1c + fn: '0' + id: 18db + name: 'SD Host controller: Intel Corporation Device 18db (rev 11)' +- bus: '00' + dev: 1d + fn: '0' + id: 0998 + name: 'Host bridge: Intel Corporation Device 0998' +- bus: '00' + dev: 1e + fn: '0' + id: 18d0 + name: 'USB controller: Intel Corporation Device 18d0 (rev 11)' +- bus: '00' + dev: 1f + fn: '0' + id: 18dc + name: 'ISA bridge: Intel Corporation Device 18dc (rev 11)' +- bus: '00' + dev: 1f + fn: '4' + id: 18df + name: 'SMBus: Intel Corporation Device 18df (rev 11)' +- bus: '00' + dev: 1f + fn: '5' + id: 18e0 + name: 'Serial bus controller [0c80]: Intel Corporation Device 18e0 (rev 11)' +- bus: '00' + dev: 1f + fn: '7' + id: 18e1 + name: 'Non-Essential Instrumentation [1300]: Intel Corporation Device 18e1 (rev + 11)' +- bus: '01' + dev: '00' + fn: '0' + id: 18ee + name: 'Co-processor: Intel Corporation Device 18ee (rev 11)' +- bus: '02' + dev: '00' + fn: '0' + id: f900 + name: 'Ethernet controller: Broadcom Inc. and subsidiaries Device f900 (rev 11)' +- bus: '03' + dev: '00' + fn: '0' + id: '7022' + name: 'SMBus: Device 1ded:7022' +- bus: '04' + dev: '00' + fn: '0' + id: '7021' + name: 'SMBus: Device 1ded:7021' +- bus: '05' + dev: '00' + fn: '0' + id: '1533' + name: 'Ethernet controller: Intel Corporation I210 Gigabit Network Connection (rev + 03)' +- bus: '14' + dev: '00' + fn: '0' + id: 09a2 + name: 'System peripheral: Intel Corporation Device 09a2 (rev 04)' +- bus: '14' + dev: '00' + fn: '1' + id: 09a4 + name: 'System peripheral: Intel Corporation Device 09a4 (rev 04)' +- bus: '14' + dev: '00' + fn: '2' + id: 09a3 + name: 'System peripheral: Intel Corporation Device 09a3 (rev 04)' +- bus: '14' + dev: '00' + fn: '3' + id: 09a5 + name: 'System peripheral: Intel Corporation Device 09a5 (rev 04)' +- bus: '14' + dev: '00' + fn: '4' + id: 0998 + name: 'Host bridge: Intel Corporation Device 0998' +- bus: f3 + dev: '00' + fn: '0' + id: 09a2 + name: 'System peripheral: Intel Corporation Device 09a2 (rev 04)' +- bus: f3 + dev: '00' + fn: '1' + id: 09a4 + name: 'System peripheral: Intel Corporation Device 09a4 (rev 04)' +- bus: f3 + dev: '00' + fn: '2' + id: 09a3 + name: 'System peripheral: Intel Corporation Device 09a3 (rev 04)' +- bus: f3 + dev: '00' + fn: '3' + id: 09a5 + name: 'System peripheral: Intel Corporation Device 09a5 (rev 04)' +- bus: f3 + dev: '00' + fn: '4' + id: 0998 + name: 'Host bridge: Intel Corporation Device 0998' +- bus: f3 + dev: '04' + fn: '0' + id: 18d1 + name: 'PCI bridge: Intel Corporation Device 18d1' +- bus: f4 + dev: '00' + fn: '0' + id: 124c + name: 'Ethernet controller: Intel Corporation Ethernet Connection E823-L for backplane' +- bus: f4 + dev: '00' + fn: '1' + id: 124c + name: 'Ethernet controller: Intel Corporation Ethernet Connection E823-L for backplane' +- bus: f4 + dev: '00' + fn: '2' + id: 124c + name: 'Ethernet controller: Intel Corporation Ethernet Connection E823-L for backplane' +- bus: f4 + dev: '00' + fn: '3' + id: 124c + name: 'Ethernet controller: Intel Corporation Ethernet Connection E823-L for backplane' +- bus: f4 + dev: '00' + fn: '4' + id: 124c + name: 'Ethernet controller: Intel Corporation Ethernet Connection E823-L for backplane' +- bus: fe + dev: '00' + fn: '0' + id: '3450' + name: 'System peripheral: Intel Corporation Device 3450' +- bus: fe + dev: '00' + fn: '1' + id: '3451' + name: 'System peripheral: Intel Corporation Device 3451' +- bus: fe + dev: '00' + fn: '2' + id: '3452' + name: 'System peripheral: Intel Corporation Device 3452' +- bus: fe + dev: '00' + fn: '3' + id: 0998 + name: 'Host bridge: Intel Corporation Device 0998' +- bus: fe + dev: '00' + fn: '5' + id: '3455' + name: 'System peripheral: Intel Corporation Device 3455' +- bus: fe + dev: 0b + fn: '0' + id: '3448' + name: 'System peripheral: Intel Corporation Device 3448' +- bus: fe + dev: 0b + fn: '1' + id: '3448' + name: 'System peripheral: Intel Corporation Device 3448' +- bus: fe + dev: 0b + fn: '2' + id: 344b + name: 'System peripheral: Intel Corporation Device 344b' +- bus: fe + dev: 0c + fn: '0' + id: 344a + name: 'Performance counters: Intel Corporation Device 344a' +- bus: fe + dev: 1a + fn: '0' + id: '2880' + name: 'Performance counters: Intel Corporation Device 2880' +- bus: ff + dev: '00' + fn: '0' + id: 344c + name: 'System peripheral: Intel Corporation Device 344c' +- bus: ff + dev: '00' + fn: '1' + id: 344c + name: 'System peripheral: Intel Corporation Device 344c' +- bus: ff + dev: '00' + fn: '2' + id: 344c + name: 'System peripheral: Intel Corporation Device 344c' +- bus: ff + dev: '00' + fn: '3' + id: 344c + name: 'System peripheral: Intel Corporation Device 344c' +- bus: ff + dev: '00' + fn: '4' + id: 344c + name: 'System peripheral: Intel Corporation Device 344c' +- bus: ff + dev: '00' + fn: '5' + id: 344c + name: 'System peripheral: Intel Corporation Device 344c' +- bus: ff + dev: 0a + fn: '0' + id: 344d + name: 'System peripheral: Intel Corporation Device 344d' +- bus: ff + dev: 0a + fn: '1' + id: 344d + name: 'System peripheral: Intel Corporation Device 344d' +- bus: ff + dev: 0a + fn: '2' + id: 344d + name: 'System peripheral: Intel Corporation Device 344d' +- bus: ff + dev: 0a + fn: '3' + id: 344d + name: 'System peripheral: Intel Corporation Device 344d' +- bus: ff + dev: 0a + fn: '4' + id: 344d + name: 'System peripheral: Intel Corporation Device 344d' +- bus: ff + dev: 0a + fn: '5' + id: 344d + name: 'System peripheral: Intel Corporation Device 344d' +- bus: ff + dev: 1d + fn: '0' + id: 344f + name: 'System peripheral: Intel Corporation Device 344f' +- bus: ff + dev: 1d + fn: '1' + id: '3457' + name: 'System peripheral: Intel Corporation Device 3457' +- bus: ff + dev: 1e + fn: '0' + id: '3458' + name: 'System peripheral: Intel Corporation Device 3458 (rev 01)' +- bus: ff + dev: 1e + fn: '1' + id: '3459' + name: 'System peripheral: Intel Corporation Device 3459 (rev 01)' +- bus: ff + dev: 1e + fn: '2' + id: 345a + name: 'System peripheral: Intel Corporation Device 345a (rev 01)' +- bus: ff + dev: 1e + fn: '3' + id: 345b + name: 'System peripheral: Intel Corporation Device 345b (rev 01)' +- bus: ff + dev: 1e + fn: '4' + id: 345c + name: 'System peripheral: Intel Corporation Device 345c (rev 01)' +- bus: ff + dev: 1e + fn: '5' + id: 345d + name: 'System peripheral: Intel Corporation Device 345d (rev 01)' +- bus: ff + dev: 1e + fn: '6' + id: 345e + name: 'System peripheral: Intel Corporation Device 345e (rev 01)' +- bus: ff + dev: 1e + fn: '7' + id: 345f + name: 'System peripheral: Intel Corporation Device 345f (rev 01)' diff --git a/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/platform.json b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/platform.json new file mode 100644 index 00000000000..a3cf2b61a99 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/platform.json @@ -0,0 +1,1351 @@ +{ + "chassis": { + "name": "M2-W6940-64X1-FR4" + }, + "interfaces": { + "Ethernet0": { + "index": "1,1,1,1,1,1,1,1", + "lanes": "1,2,3,4,5,6,7,8", + "breakout_modes": { + "1x800G": [ + "etp1" + ], + "2x400G": [ + "etp1a", + "etp1b" + ], + "2x200G": [ + "etp1a", + "etp1b" + ], + "2x100G": [ + "etp1a", + "etp1b" + ] + } + }, + "Ethernet8": { + "index": "2,2,2,2,2,2,2,2", + "lanes": "9,10,11,12,13,14,15,16", + "breakout_modes": { + "1x800G": [ + "etp2" + ], + "2x400G": [ + "etp2a", + "etp2b" + ], + "2x200G": [ + "etp2a", + "etp2b" + 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+ ] + } + }, + "Ethernet352": { + "index": "45,45,45,45,45,45,45,45", + "lanes": "353,354,355,356,357,358,359,360", + "breakout_modes": { + "1x800G": [ + "etp45" + ], + "2x400G": [ + "etp45a", + "etp45b" + ], + "2x200G": [ + "etp45a", + "etp45b" + ], + "2x100G": [ + "etp45a", + "etp45b" + ] + } + }, + "Ethernet360": { + "index": "46,46,46,46,46,46,46,46", + "lanes": "361,362,363,364,365,366,367,368", + "breakout_modes": { + "1x800G": [ + "etp46" + ], + "2x400G": [ + "etp46a", + "etp46b" + ], + "2x200G": [ + "etp46a", + "etp46b" + ], + "2x100G": [ + "etp46a", + "etp46b" + ] + } + }, + "Ethernet368": { + "index": "47,47,47,47,47,47,47,47", + "lanes": "369,370,371,372,373,374,375,376", + "breakout_modes": { + "1x800G": [ + "etp47" + ], + "2x400G": [ + "etp47a", + "etp47b" + ], + "2x200G": [ + "etp47a", + "etp47b" + ], + "2x100G": [ + "etp47a", + "etp47b" + ] + } + }, + "Ethernet376": { + "index": "48,48,48,48,48,48,48,48", + "lanes": "377,378,379,380,381,382,383,384", + "breakout_modes": { + "1x800G": [ + "etp48" + ], + "2x400G": [ + "etp48a", + "etp48b" + ], + "2x200G": [ + "etp48a", + "etp48b" + ], + "2x100G": [ + "etp48a", + "etp48b" + ] + } + }, + "Ethernet384": { + "index": "49,49,49,49,49,49,49,49", + "lanes": "385,386,387,388,389,390,391,392", + "breakout_modes": { + "1x800G": [ + "etp49" + ], + "2x400G": [ + "etp49a", + "etp49b" + ], + "2x200G": [ + "etp49a", + "etp49b" + ], + "2x100G": [ + "etp49a", + "etp49b" + ] + } + }, + "Ethernet392": { + "index": "50,50,50,50,50,50,50,50", + "lanes": "393,394,395,396,397,398,399,400", + "breakout_modes": { + "1x800G": [ + "etp50" + ], + "2x400G": [ + "etp50a", + "etp50b" + ], + "2x200G": [ + "etp50a", + "etp50b" + ], + "2x100G": [ + "etp50a", + "etp50b" + ] + } + }, + "Ethernet400": { + "index": "51,51,51,51,51,51,51,51", + "lanes": "401,402,403,404,405,406,407,408", + "breakout_modes": { + "1x800G": [ + "etp51" + ], + "2x400G": [ + "etp51a", + "etp51b" + ], + "2x200G": [ + "etp51a", + "etp51b" + ], + "2x100G": [ + "etp51a", + "etp51b" + ] + } + }, + "Ethernet408": { + "index": "52,52,52,52,52,52,52,52", + "lanes": "409,410,411,412,413,414,415,416", + "breakout_modes": { + "1x800G": [ + "etp52" + ], + "2x400G": [ + "etp52a", + "etp52b" + ], + "2x200G": [ + "etp52a", + "etp52b" + ], + "2x100G": [ + "etp52a", + "etp52b" + ] + } + }, + "Ethernet416": { + "index": "53,53,53,53,53,53,53,53", + "lanes": "417,418,419,420,421,422,423,424", + "breakout_modes": { + "1x800G": [ + "etp53" + ], + "2x400G": [ + "etp53a", + "etp53b" + ], + "2x200G": [ + "etp53a", + "etp53b" + ], + "2x100G": [ + "etp53a", + "etp53b" + ] + } + }, + "Ethernet424": { + "index": "54,54,54,54,54,54,54,54", + "lanes": "425,426,427,428,429,430,431,432", + "breakout_modes": { + "1x800G": [ + "etp54" + ], + "2x400G": [ + "etp54a", + "etp54b" + ], + "2x200G": [ + "etp54a", + "etp54b" + ], + "2x100G": [ + "etp54a", + "etp54b" + ] + } + }, + "Ethernet432": { + "index": "55,55,55,55,55,55,55,55", + "lanes": "433,434,435,436,437,438,439,440", + "breakout_modes": { + "1x800G": [ + "etp55" + ], + "2x400G": [ + "etp55a", + "etp55b" + ], + "2x200G": [ + "etp55a", + "etp55b" + ], + "2x100G": [ + "etp55a", + "etp55b" + ] + } + }, + "Ethernet440": { + "index": "56,56,56,56,56,56,56,56", + "lanes": "441,442,443,444,445,446,447,448", + "breakout_modes": { + "1x800G": [ + "etp56" + ], + "2x400G": [ + "etp56a", + "etp56b" + ], + "2x200G": [ + "etp56a", + "etp56b" + ], + "2x100G": [ + "etp56a", + "etp56b" + ] + } + }, + "Ethernet448": { + "index": "57,57,57,57,57,57,57,57", + "lanes": "449,450,451,452,453,454,455,456", + "breakout_modes": { + "1x800G": [ + "etp57" + ], + "2x400G": [ + "etp57a", + "etp57b" + ], + "2x200G": [ + "etp57a", + "etp57b" + ], + "2x100G": [ + "etp57a", + "etp57b" + ] + } + }, + "Ethernet456": { + "index": "58,58,58,58,58,58,58,58", + "lanes": "457,458,459,460,461,462,463,464", + "breakout_modes": { + "1x800G": [ + "etp58" + ], + "2x400G": [ + "etp58a", + "etp58b" + ], + "2x200G": [ + "etp58a", + "etp58b" + ], + "2x100G": [ + "etp58a", + "etp58b" + ] + } + }, + "Ethernet464": { + "index": "59,59,59,59,59,59,59,59", + "lanes": "465,466,467,468,469,470,471,472", + "breakout_modes": { + "1x800G": [ + "etp59" + ], + "2x400G": [ + "etp59a", + "etp59b" + ], + "2x200G": [ + "etp59a", + "etp59b" + ], + "2x100G": [ + "etp59a", + "etp59b" + ] + } + }, + "Ethernet472": { + "index": "60,60,60,60,60,60,60,60", + "lanes": "473,474,475,476,477,478,479,480", + "breakout_modes": { + "1x800G": [ + "etp60" + ], + "2x400G": [ + "etp60a", + "etp60b" + ], + "2x200G": [ + "etp60a", + "etp60b" + ], + "2x100G": [ + "etp60a", + "etp60b" + ] + } + }, + "Ethernet480": { + "index": "61,61,61,61,61,61,61,61", + "lanes": "481,482,483,484,485,486,487,488", + "breakout_modes": { + "1x800G": [ + "etp61" + ], + "2x400G": [ + "etp61a", + "etp61b" + ], + "2x200G": [ + "etp61a", + "etp61b" + ], + "2x100G": [ + "etp61a", + "etp61b" + ] + } + }, + "Ethernet488": { + "index": "62,62,62,62,62,62,62,62", + "lanes": "489,490,491,492,493,494,495,496", + "breakout_modes": { + "1x800G": [ + "etp62" + ], + "2x400G": [ + "etp62a", + "etp62b" + ], + "2x200G": [ + "etp62a", + "etp62b" + ], + "2x100G": [ + "etp62a", + "etp62b" + ] + } + }, + "Ethernet496": { + "index": "63,63,63,63,63,63,63,63", + "lanes": "497,498,499,500,501,502,503,504", + "breakout_modes": { + "1x800G": [ + "etp63" + ], + "2x400G": [ + "etp63a", + "etp63b" + ], + "2x200G": [ + "etp63a", + "etp63b" + ], + "2x100G": [ + "etp63a", + "etp63b" + ] + } + }, + "Ethernet504": { + "index": "64,64,64,64,64,64,64,64", + "lanes": "505,506,507,508,509,510,511,512", + "breakout_modes": { + "1x800G": [ + "etp64" + ], + "2x400G": [ + "etp64a", + "etp64b" + ], + "2x200G": [ + "etp64a", + "etp64b" + ], + "2x100G": [ + "etp64a", + "etp64b" + ] + } + } + } +} diff --git a/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/platform_asic b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/platform_asic new file mode 100644 index 00000000000..96046765276 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/platform_asic @@ -0,0 +1 @@ +broadcom diff --git a/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/platform_components.json b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/platform_components.json new file mode 100644 index 00000000000..6d70cafdfb9 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/platform_components.json @@ -0,0 +1,18 @@ +{ + "chassis": { + "M2-W6940-128X1-FR4": { + "component": { + "CPU CPLD": { }, + "SCM CPLD": { }, + "MCB CPLD": { }, + "SMB CPLD": { }, + "FCB_T CPLD": { }, + "FCB_B CPLD": { }, + "IOB FPGA": { }, + "DOM FPGA": { }, + "BIOS": { } + } + } + } +} + diff --git a/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/platform_env.conf b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/platform_env.conf new file mode 100644 index 00000000000..81f908f96d5 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/platform_env.conf @@ -0,0 +1,2 @@ +is_ltsw_chip=1 +SYNCD_SHM_SIZE=1g \ No newline at end of file diff --git a/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/plugins/sfputil.py b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/plugins/sfputil.py new file mode 100644 index 00000000000..06105481c5e --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/plugins/sfputil.py @@ -0,0 +1,225 @@ +# sfputil.py +# +# Platform-specific SFP transceiver interface for SONiC +# + +try: + import os + import time + import fcntl + from sonic_sfp.sfputilbase import SfpUtilBase +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + + I2C_MAX_ATTEMPT = 50 + LOCK_MAX_ATTEMPT = 100 + + BUS_START = 24 + BUS_END = 31 + BUS_NUM = 8 + + def __init__(self): + self.pidfile_dict = dict() + SfpUtilBase.__init__(self) + + def file_rw_lock(self, file_path): + pidfile = self.pidfile_dict.get(file_path, None) + if pidfile == None: + pidfile = open(file_path, "r") + self.pidfile_dict[file_path] = pidfile + if pidfile == None: + return False + # Retry 100 times to lock file + for i in range(0, 100): + try: + fcntl.flock(pidfile, fcntl.LOCK_EX | fcntl.LOCK_NB) + return True + except Exception: + time.sleep(0.05) + continue + + pidfile.close() + self.pidfile_dict[file_path] = None + return False + + def file_rw_unlock(self, file_path): + pidfile = self.pidfile_dict.get(file_path, None) + if pidfile == None: + return True + try: + fcntl.flock(pidfile, fcntl.LOCK_UN) + pidfile.close() + self.pidfile_dict[file_path] = None + return True + except Exception as e: + print("file unlock err, msg:%s" % (str(e))) + return False + + def _sfp_write_file_path(self, file_path, offset, num_bytes, val): + attempts = 0 + while attempts < self.I2C_MAX_ATTEMPT: + try: + file_path.seek(offset) + file_path.write(bytearray([val])[0:num_bytes]) + except: + attempts += 1 + time.sleep(0.05) + else: + return True + return False + + def _sfp_read_file_path(self, file_path, offset, num_bytes, target_page): + attempts = 0 + page_offset = 127 + while attempts < self.I2C_MAX_ATTEMPT: + try: + if offset > page_offset: + # verify page + file_path.seek(page_offset) + read_buf = file_path.read(1) + cur_page = read_buf[0] + + if cur_page != target_page: + self._sfp_write_file_path(file_path, page_offset, 1, target_page) + + file_path.seek(offset) + read_buf = file_path.read(num_bytes) + + except: + attempts += 1 + time.sleep(0.05) + else: + return True, read_buf + return False, None + + def _get_port_eeprom_path(self, devid): + sysfs_sfp_i2c_client_eeprom_path = "/sys/bus/i2c/devices/i2c-%d/%d-0050/eeprom" % (devid, devid) + return sysfs_sfp_i2c_client_eeprom_path + + def _read_eeprom_specific_bytes(self, sysfsfile_eeprom, offset, num_bytes, page): + eeprom_raw = [] + for i in range(0, num_bytes): + eeprom_raw.append("0x00") + + rv, raw = self._sfp_read_file_path(sysfsfile_eeprom, offset, num_bytes, page) + if rv == False: + return None + + try: + for n in range(0, num_bytes): + eeprom_raw[n] = hex(raw[n])[2:].zfill(2) + except: + return None + + return eeprom_raw + + def get_highest_temperature_cpo_oe(self): + hightest_temperature = -99999 + + read_eeprom_flag = False + temperature_valid_flag = False + + for bus in range(self.BUS_START, self.BUS_START+self.BUS_NUM): + offset = 14 + page = 0 + eeprom_path = self._get_port_eeprom_path(bus) + try: + if os.path.exists(eeprom_path) is False: + break + + with open(eeprom_path, mode="rb", buffering=0) as eeprom: + read_eeprom_flag = True + eeprom_raw = self._read_eeprom_specific_bytes(eeprom, offset, 2, page) + if len(eeprom_raw) != 0: + msb = int(eeprom_raw[0], 16) + lsb = int(eeprom_raw[1], 16) + + result = (msb << 8) | (lsb & 0xff) + # To support temperature below + if ((result & (1 << (16 - 1))) != 0): + result = result - (1 << 16) + result = float(result / 256.0) + if -50 <= result <= 200: + temperature_valid_flag = True + if hightest_temperature < result: + hightest_temperature = result + + except Exception as e: + pass + + # all port read eeprom fail + if read_eeprom_flag == False: + hightest_temperature = -99999 + + # all port temperature invalid + elif read_eeprom_flag == True and temperature_valid_flag == False: + hightest_temperature = -100000 + + hightest_temperature = round(hightest_temperature, 2) + + return hightest_temperature + + def get_highest_temperature_cpo_rlm(self): + hightest_temperature = -99999 + + read_eeprom_flag = False + temperature_valid_flag = False + + for bus in range(self.BUS_START, self.BUS_START+self.BUS_NUM): + + eeprom_path = self._get_port_eeprom_path(bus) + + if os.path.exists(eeprom_path) is False: + break + + for rlm_page in [176, 180]: # two rlm per oe + offset = 150 + page = rlm_page + try: + for i in range(0, self.LOCK_MAX_ATTEMPT): + ret = self.file_rw_lock(eeprom_path) + if ret is True: + break + time.sleep(0.001) + + if ret is False: + # FIXME + continue + + with open(eeprom_path, mode="r+b", buffering=0) as eeprom: + read_eeprom_flag = True + eeprom_raw = self._read_eeprom_specific_bytes(eeprom, offset, 2, page) + + if len(eeprom_raw) != 0: + msb = int(eeprom_raw[0], 16) + lsb = int(eeprom_raw[1], 16) + + result = (msb << 8) | (lsb & 0xff) + # To support temperature below 0 + if ((result & (1 << (16 - 1))) != 0): + result = result - (1 << 16) + result = float(result / 256.0) + if -50 <= result <= 200: + temperature_valid_flag = True + if hightest_temperature < result: + hightest_temperature = result + self.file_rw_unlock(eeprom_path) + + except Exception as e: + self.file_rw_unlock(eeprom_path) + pass + + # all port read eeprom fail + if read_eeprom_flag == False: + hightest_temperature = -99999 + + # all port temperature invalid + elif read_eeprom_flag == True and temperature_valid_flag == False: + hightest_temperature = -100000 + + hightest_temperature = round(hightest_temperature, 2) + + return hightest_temperature diff --git a/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/plugins/ssd_util.py b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/plugins/ssd_util.py new file mode 100755 index 00000000000..8a83ce07777 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/plugins/ssd_util.py @@ -0,0 +1,318 @@ +# +# ssd_util.py +# +# Generic implementation of the SSD health API +# SSD models supported: +# - InnoDisk +# - StorFly +# - Virtium + +try: + import re + import os + import subprocess + from sonic_platform_base.sonic_storage.storage_base import StorageBase +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + +SMARTCTL = "smartctl {} -a" +INNODISK = "iSmart -d {}" +VIRTIUM = "SmartCmd -m {}" +DISK_LIST_CMD = "fdisk -l -o Device" +DISK_FREE_CMD = "df -h" +MOUNT_CMD = "mount" + +NOT_AVAILABLE = "N/A" +PE_CYCLE = 3000 +FAIL_PERCENT = 95 + +# Set Vendor Specific IDs +INNODISK_HEALTH_ID = 169 +INNODISK_TEMPERATURE_ID = 194 + +class SsdUtil(StorageBase): + """ + Generic implementation of the SSD health API + """ + model = NOT_AVAILABLE + serial = NOT_AVAILABLE + firmware = NOT_AVAILABLE + temperature = NOT_AVAILABLE + health = NOT_AVAILABLE + remaining_life = NOT_AVAILABLE + sata_rate = NOT_AVAILABLE + ssd_info = NOT_AVAILABLE + vendor_ssd_info = NOT_AVAILABLE + + def __init__(self, diskdev): + self.vendor_ssd_utility = { + "Generic" : { "utility" : SMARTCTL, "parser" : self.parse_generic_ssd_info }, + "InnoDisk" : { "utility" : INNODISK, "parser" : self.parse_innodisk_info }, + "M.2" : { "utility" : INNODISK, "parser" : self.parse_innodisk_info }, + "StorFly" : { "utility" : VIRTIUM, "parser" : self.parse_virtium_info }, + "Virtium" : { "utility" : VIRTIUM, "parser" : self.parse_virtium_info } + } + + """ + The dict model_attr keys relate the vendors + LITEON : "ER2-GD","AF2MA31DTDLT" + Intel : "SSDSCKKB" + SMI : "SM619GXC" + samsung: "MZNLH" + ADATA : "IM2S3134N" + """ + self.model_attr = { + "ER2-GD" : { "temperature" : r"\n190\s+(.+?)\n", "remainingLife" : r"\n202\s+(.+?)\n" }, + "AF2MA31DTDLT" : { "temperature" : r"\n194\s+(.+?)\n", "remainingLife" : r"\n202\s+(.+?)\n" }, + "SSDSCK" : { "temperature" : r"\n194\s+(.+?)\n", "remainingLife" : r"\n233\s+(.+?)\n" }, + "SM619GXC" : { "temperature" : r"\n194\s+(.+?)\n", "remainingLife" : r"\n169\s+(.+?)\n" }, + "MZNLH" : { "temperature" : r"\n190\s+(.+?)\n", "remainingLife" : r"\n245\s+(.+?)\n" }, + "IM2S3134N" : { "temperature" : r"\n194\s+(.+?)\n", "remainingLife" : r"\n231\s+(.+?)\n" }, + "MTFDDAV240TCB-1AR1ZABAA" : { "temperature" : r"\n194\s+(.+?)\n", "remainingLife" : r"\n202\s+(.+?)\n" } + } + + self.key_list = list(self.model_attr.keys()) + self.attr_info_rule = r"[\s\S]*SMART Attributes Data Structure revision number: 1|SMART Error Log Version[\s\S]*" + self.dev = diskdev + # Generic part + self.fetch_generic_ssd_info(diskdev) + self.parse_generic_ssd_info() + self.fetch_vendor_ssd_info(diskdev, "Generic") + + # Known vendor part + if self.model: + model_short = self.model.split()[0] + if model_short in self.vendor_ssd_utility: + self.fetch_vendor_ssd_info(diskdev, model_short) + self.parse_vendor_ssd_info(model_short) + else: + # No handler registered for this disk model + pass + else: + # Failed to get disk model + self.model = "Unknown" + + def _execute_shell(self, cmd): + process = subprocess.Popen(cmd.split(), universal_newlines=True, stdout=subprocess.PIPE) + output, error = process.communicate() + exit_code = process.returncode + if exit_code: + return None + return output + + def _parse_re(self, pattern, buffer): + res_list = re.findall(pattern, str(buffer)) + return res_list[0] if res_list else NOT_AVAILABLE + + def fetch_generic_ssd_info(self, diskdev): + self.ssd_info = self._execute_shell(self.vendor_ssd_utility["Generic"]["utility"].format(diskdev)) + + # Health and temperature values may be overwritten with vendor specific data + def parse_generic_ssd_info(self): + if "nvme" in self.dev: + self.model = self._parse_re(r'Model Number:\s*(.+?)\n', self.ssd_info) + + health_raw = self._parse_re(r'Percentage Used\s*(.+?)\n', self.ssd_info) + if health_raw == NOT_AVAILABLE: + self.health = NOT_AVAILABLE + else: + health_raw = health_raw.split()[-1] + self.health = 100 - float(health_raw.strip('%')) + + temp_raw = self._parse_re(r'Temperature\s*(.+?)\n', self.ssd_info) + if temp_raw == NOT_AVAILABLE: + self.temperature = NOT_AVAILABLE + else: + temp_raw = temp_raw.split()[-2] + self.temperature = float(temp_raw) + else: + self.model = self._parse_re(r'Device Model:\s*(.+?)\n', self.ssd_info) + model_key = "" + for key in self.key_list: + if re.search(key, self.model): + model_key = key + break + if model_key != "": + self.remaining_life = self._parse_re(self.model_attr[model_key]["remainingLife"], re.sub(self.attr_info_rule,"",self.ssd_info)).split()[2] + self.temperature = self._parse_re(self.model_attr[model_key]["temperature"], re.sub(self.attr_info_rule,"",self.ssd_info)).split()[8] + self.health = self.remaining_life + # Get the LITEON ssd health value by (PE CYCLE - AVG ERASE CYCLE )/(PE CYCLE) + if model_key in ["ER2-GD", "AF2MA31DTDLT"]: + avg_erase = int(self._parse_re(r'\n173\s+(.+?)\n' ,re.sub(self.attr_info_rule,"",self.ssd_info)).split()[-1]) + self.health = int(round((PE_CYCLE - avg_erase)/PE_CYCLE*100,0)) + if self.remaining_life != NOT_AVAILABLE and int(self.remaining_life) < FAIL_PERCENT: + self.remaining_life = "Fail" + self.sata_rate = self._parse_re(r'SATA Version is:.*current: (.+?)\)\n', self.ssd_info) + self.serial = self._parse_re(r'Serial Number:\s*(.+?)\n', self.ssd_info) + self.firmware = self._parse_re(r'Firmware Version:\s*(.+?)\n', self.ssd_info) + + def parse_innodisk_info(self): + if self.vendor_ssd_info: + self.health = self._parse_re(r'Health:\s*(.+?)%', self.vendor_ssd_info) + self.temperature = self._parse_re(r'Temperature\s*\[\s*(.+?)\]', self.vendor_ssd_info) + else: + if self.health == NOT_AVAILABLE: + health_raw = self.parse_id_number(INNODISK_HEALTH_ID) + self.health = health_raw.split()[-1] + if self.temperature == NOT_AVAILABLE: + temp_raw = self.parse_id_number(INNODISK_TEMPERATURE_ID) + self.temperature = temp_raw.split()[-6] + + def parse_virtium_info(self): + if self.vendor_ssd_info: + self.temperature = self._parse_re(r'Temperature_Celsius\s*\d*\s*(\d+?)\s+', self.vendor_ssd_info) + nand_endurance = self._parse_re(r'NAND_Endurance\s*\d*\s*(\d+?)\s+', self.vendor_ssd_info) + avg_erase_count = self._parse_re(r'Average_Erase_Count\s*\d*\s*(\d+?)\s+', self.vendor_ssd_info) + try: + self.health = 100 - (float(avg_erase_count) * 100 / float(nand_endurance)) + except (ValueError, ZeroDivisionError): + # Invalid avg_erase_count or nand_endurance. + pass + + def fetch_vendor_ssd_info(self, diskdev, model): + self.vendor_ssd_info = self._execute_shell(self.vendor_ssd_utility[model]["utility"].format(diskdev)) + + def parse_vendor_ssd_info(self, model): + self.vendor_ssd_utility[model]["parser"]() + + def check_readonly2(self, partition, filesystem): + # parse mount cmd output info + mount_info = self._execute_shell(MOUNT_CMD) + for line in mount_info.split('\n'): + column_list = line.split() + if line == '': + continue + if column_list[0] == partition and column_list[2] == filesystem: + if column_list[5].split(',')[0][1:] == "ro": + return partition + else: + return NOT_AVAILABLE + return NOT_AVAILABLE + + def check_readonly(self, partition, filesystem): + ret = os.access(filesystem, os.W_OK) + if ret == False: + return partition + else: + return NOT_AVAILABLE + + def get_health(self): + """ + Retrieves current disk health in percentages + + Returns: + A float number of current ssd health + e.g. 83.5 + """ + if self.health == 'N/A': + return "NA" + else: + return float(self.health) + + def get_temperature(self): + """ + Retrieves current disk temperature in Celsius + + Returns: + A float number of current temperature in Celsius + e.g. 40.1 + """ + if self.temperature == 'N/A': + return 'NA' + else: + return float(self.temperature) + + def get_model(self): + """ + Retrieves model for the given disk device + + Returns: + A string holding disk model as provided by the manufacturer + """ + return self.model + + def get_firmware(self): + """ + Retrieves firmware version for the given disk device + + Returns: + A string holding disk firmware version as provided by the manufacturer + """ + return self.firmware + + def get_serial(self): + """ + Retrieves serial number for the given disk device + + Returns: + A string holding disk serial number as provided by the manufacturer + """ + return self.serial + def get_sata_rate(self): + """ + Retrieves SATA rate for the given disk device + Returns: + A string holding current SATA rate as provided by the manufacturer + """ + return self.sata_rate + def get_remaining_life(self): + """ + Retrieves remaining life for the given disk device + Returns: + A string holding disk remaining life as provided by the manufacturer + """ + return self.remaining_life + def get_vendor_output(self): + """ + Retrieves vendor specific data for the given disk device + + Returns: + A string holding some vendor specific disk information + """ + return self.vendor_ssd_info + + def parse_id_number(self, id): + return self._parse_re(r'{}\s*(.+?)\n'.format(id), self.ssd_info) + + def get_readonly_partition(self): + """ + Check the partition mount filesystem is readonly status,then output the result. + Returns: + The readonly partition list + """ + + ro_partition_list = [] + partition_list = [] + + # parse fdisk cmd output info + disk_info = self._execute_shell(DISK_LIST_CMD) + begin_flag = False + for line in disk_info.split('\n'): + if line == "Device": + begin_flag = True + continue + if begin_flag: + if line != "": + partition_list.append(line) + else: + break + + # parse df cmd output info + disk_free = self._execute_shell(DISK_FREE_CMD) + disk_dict = {} + line_num = 0 + for line in disk_free.split('\n'): + line_num = line_num + 1 + if line_num == 1 or line == "": + continue + column_list = line.split() + disk_dict[column_list[0]] = column_list[5] + + # get partition which is readonly + for partition in partition_list: + if partition in disk_dict: + ret = self.check_readonly(partition, disk_dict[partition]) + if (ret != NOT_AVAILABLE): + ro_partition_list.append(ret) + + return ro_partition_list diff --git a/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/pmon_daemon_control.json b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/pmon_daemon_control.json new file mode 100644 index 00000000000..cc5da6a11f7 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/pmon_daemon_control.json @@ -0,0 +1,5 @@ +{ + "skip_ledd": true, + "skip_xcvrd": false, + "include_sensormond": true +} diff --git a/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/system_health_monitoring_config.json b/device/micas/x86_64-micas_m2-w6940-128x1-fr4-r0/system_health_monitoring_config.json new file mode 100644 index 00000000000..e69de29bb2d diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/M2-W6940-64OC/buffers.json.j2 b/device/micas/x86_64-micas_m2-w6940-64oc-r0/M2-W6940-64OC/buffers.json.j2 new file mode 100644 index 00000000000..0b1cb2c541b --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/M2-W6940-64OC/buffers.json.j2 @@ -0,0 +1,2 @@ +{%- set default_topo = 't1' %} +{%- include 'buffers_config.j2' %} diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/M2-W6940-64OC/buffers_defaults_ft2.j2 b/device/micas/x86_64-micas_m2-w6940-64oc-r0/M2-W6940-64OC/buffers_defaults_ft2.j2 new file mode 100644 index 00000000000..ef380c86c4a --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/M2-W6940-64OC/buffers_defaults_ft2.j2 @@ -0,0 +1,36 @@ + +{%- set default_cable = '5m' %} + +{%- macro generate_buffer_pool_and_profiles() %} + + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "162539680", + "type": "ingress", + "mode": "dynamic", + "xoff": "33374584" + }, + "egress_lossless_pool": { + "size": "162539680", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"ingress_lossless_pool", + "size":"0", + "static_th":"165867080" + }, + "egress_lossless_profile": { + "pool":"egress_lossless_pool", + "size":"0", + "static_th":"165867080" + }, + "egress_lossy_profile": { + "pool":"egress_lossless_pool", + "size":"1778", + "dynamic_th":"0" + } + }, +{%- endmacro %} diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/M2-W6940-64OC/buffers_defaults_lt2.j2 b/device/micas/x86_64-micas_m2-w6940-64oc-r0/M2-W6940-64OC/buffers_defaults_lt2.j2 new file mode 100644 index 00000000000..ef380c86c4a --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/M2-W6940-64OC/buffers_defaults_lt2.j2 @@ -0,0 +1,36 @@ + +{%- set default_cable = '5m' %} + +{%- macro generate_buffer_pool_and_profiles() %} + + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "162539680", + "type": "ingress", + "mode": "dynamic", + "xoff": "33374584" + }, + "egress_lossless_pool": { + "size": "162539680", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"ingress_lossless_pool", + "size":"0", + "static_th":"165867080" + }, + "egress_lossless_profile": { + "pool":"egress_lossless_pool", + "size":"0", + "static_th":"165867080" + }, + "egress_lossy_profile": { + "pool":"egress_lossless_pool", + "size":"1778", + "dynamic_th":"0" + } + }, +{%- endmacro %} diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/M2-W6940-64OC/buffers_defaults_t0.j2 b/device/micas/x86_64-micas_m2-w6940-64oc-r0/M2-W6940-64OC/buffers_defaults_t0.j2 new file mode 100644 index 00000000000..ef380c86c4a --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/M2-W6940-64OC/buffers_defaults_t0.j2 @@ -0,0 +1,36 @@ + +{%- set default_cable = '5m' %} + +{%- macro generate_buffer_pool_and_profiles() %} + + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "162539680", + "type": "ingress", + "mode": "dynamic", + "xoff": "33374584" + }, + "egress_lossless_pool": { + "size": "162539680", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"ingress_lossless_pool", + "size":"0", + "static_th":"165867080" + }, + "egress_lossless_profile": { + "pool":"egress_lossless_pool", + "size":"0", + "static_th":"165867080" + }, + "egress_lossy_profile": { + "pool":"egress_lossless_pool", + "size":"1778", + "dynamic_th":"0" + } + }, +{%- endmacro %} diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/M2-W6940-64OC/buffers_defaults_t1.j2 b/device/micas/x86_64-micas_m2-w6940-64oc-r0/M2-W6940-64OC/buffers_defaults_t1.j2 new file mode 100644 index 00000000000..847000e1640 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/M2-W6940-64OC/buffers_defaults_t1.j2 @@ -0,0 +1,36 @@ + +{%- set default_cable = '40m' %} + +{%- macro generate_buffer_pool_and_profiles() %} + + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "162539680", + "type": "ingress", + "mode": "dynamic", + "xoff": "33374584" + }, + "egress_lossless_pool": { + "size": "162539680", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"ingress_lossless_pool", + "size":"0", + "static_th":"165867080" + }, + "egress_lossless_profile": { + "pool":"egress_lossless_pool", + "size":"0", + "static_th":"165867080" + }, + "egress_lossy_profile": { + "pool":"egress_lossless_pool", + "size":"1778", + "dynamic_th":"0" + } + }, +{%- endmacro %} diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/M2-W6940-64OC/buffers_defaults_t2.j2 b/device/micas/x86_64-micas_m2-w6940-64oc-r0/M2-W6940-64OC/buffers_defaults_t2.j2 new file mode 100644 index 00000000000..ef380c86c4a --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/M2-W6940-64OC/buffers_defaults_t2.j2 @@ -0,0 +1,36 @@ + +{%- set default_cable = '5m' %} + +{%- macro generate_buffer_pool_and_profiles() %} + + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "162539680", + "type": "ingress", + "mode": "dynamic", + "xoff": "33374584" + }, + "egress_lossless_pool": { + "size": "162539680", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"ingress_lossless_pool", + "size":"0", + "static_th":"165867080" + }, + "egress_lossless_profile": { + "pool":"egress_lossless_pool", + "size":"0", + "static_th":"165867080" + }, + "egress_lossy_profile": { + "pool":"egress_lossless_pool", + "size":"1778", + "dynamic_th":"0" + } + }, +{%- endmacro %} diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/M2-W6940-64OC/pg_profile_lookup.ini b/device/micas/x86_64-micas_m2-w6940-64oc-r0/M2-W6940-64OC/pg_profile_lookup.ini new file mode 100644 index 00000000000..9b240cc8bf6 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/M2-W6940-64OC/pg_profile_lookup.ini @@ -0,0 +1,26 @@ +# PG lossless profiles. +# speed cable size xon xoff threshold xon_offset + 10000 5m 18796 0 91440 -2 3556 + 25000 5m 18796 0 91440 -2 3556 + 40000 5m 18796 0 106934 -2 3556 + 50000 5m 18796 0 106934 -2 3556 + 100000 5m 18796 0 147066 -2 3556 + 200000 5m 18796 0 229362 -2 3556 + 400000 5m 18796 0 393192 -2 3556 + 800000 5m 18796 0 729488 -2 3556 + 10000 40m 18796 0 94742 -2 3556 + 25000 40m 18796 0 94742 -2 3556 + 40000 40m 18796 0 113538 -2 3556 + 50000 40m 18796 0 113538 -2 3556 + 100000 40m 18796 0 160274 -2 3556 + 200000 40m 18796 0 255778 -2 3556 + 400000 40m 18796 0 446024 -2 3556 + 800000 40m 18796 0 835406 -2 3556 + 10000 300m 18796 0 258572 -2 3556 + 25000 300m 18796 0 258572 -2 3556 + 40000 300m 18796 0 258572 -2 3556 + 50000 300m 18796 0 258572 -2 3556 + 100000 300m 18796 0 258572 -2 3556 + 200000 300m 18796 0 452374 -2 3556 + 400000 300m 18796 0 839216 -2 3556 + 800000 300m 18796 0 1621536 -2 3556 diff --git a/device/micas/x86_64-micas_m2-w6940-64oc-r0/M2-W6940-64OC/qos.json.j2 b/device/micas/x86_64-micas_m2-w6940-64oc-r0/M2-W6940-64OC/qos.json.j2 new file mode 100644 index 00000000000..3e548325ea3 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6940-64oc-r0/M2-W6940-64OC/qos.json.j2 @@ -0,0 +1 @@ +{%- include 'qos_config.j2' %} diff --git a/device/micas/x86_64-micas_m2-w6950-128oc-r0/M2-W6950-O128-COPPER/default_sku b/device/micas/x86_64-micas_m2-w6950-128oc-r0/M2-W6950-O128-COPPER/default_sku new file mode 100644 index 00000000000..cca556ccb7b --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6950-128oc-r0/M2-W6950-O128-COPPER/default_sku @@ -0,0 +1 @@ +M2-W6950-O128-COPPER l2 diff --git a/device/micas/x86_64-micas_m2-w6950-128oc-r0/M2-W6950-O128-COPPER/hwsku.json b/device/micas/x86_64-micas_m2-w6950-128oc-r0/M2-W6950-O128-COPPER/hwsku.json new file mode 100644 index 00000000000..276fda2943b --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6950-128oc-r0/M2-W6950-O128-COPPER/hwsku.json @@ -0,0 +1,654 @@ +{ + "interfaces": { + "Ethernet0": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet8": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet16": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet24": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet32": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet40": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet48": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet56": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet64": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet72": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet80": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet88": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet96": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet104": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet112": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet120": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet128": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet136": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet144": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet152": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet160": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet168": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet176": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet184": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet192": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet200": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet208": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet216": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet224": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet232": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet240": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet248": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet256": { + "default_brkout_mode": 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"lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + } + } +} \ No newline at end of file diff --git a/device/micas/x86_64-micas_m2-w6950-128oc-r0/M2-W6950-O128-COPPER/port_config.ini b/device/micas/x86_64-micas_m2-w6950-128oc-r0/M2-W6950-O128-COPPER/port_config.ini new file mode 100644 index 00000000000..6b950df1d23 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6950-128oc-r0/M2-W6950-O128-COPPER/port_config.ini @@ -0,0 +1,131 @@ +# name lanes alias index speed +Ethernet0 265,266,267,268,269,270,271,272 etp1 1 800000 +Ethernet8 297,298,299,300,301,302,303,304 etp2 2 800000 +Ethernet16 305,306,307,308,309,310,311,312 etp3 3 800000 +Ethernet24 313,314,315,316,317,318,319,320 etp4 4 800000 +Ethernet32 377,378,379,380,381,382,383,384 etp5 5 800000 +Ethernet40 369,370,371,372,373,374,375,376 etp6 6 800000 +Ethernet48 361,362,363,364,365,366,367,368 etp7 7 800000 +Ethernet56 329,330,331,332,333,334,335,336 etp8 8 800000 +Ethernet64 505,506,507,508,509,510,511,512 etp9 9 800000 +Ethernet72 497,498,499,500,501,502,503,504 etp10 10 800000 +Ethernet80 489,490,491,492,493,494,495,496 etp11 11 800000 +Ethernet88 457,458,459,460,461,462,463,464 etp12 12 800000 +Ethernet96 449,450,451,452,453,454,455,456 etp13 13 800000 +Ethernet104 465,466,467,468,469,470,471,472 etp14 14 800000 +Ethernet112 481,482,483,484,485,486,487,488 etp15 15 800000 +Ethernet120 473,474,475,476,477,478,479,480 etp16 16 800000 +Ethernet128 537,538,539,540,541,542,543,544 etp17 17 800000 +Ethernet136 545,546,547,548,549,550,551,552 etp18 18 800000 +Ethernet144 529,530,531,532,533,534,535,536 etp19 19 800000 +Ethernet152 513,514,515,516,517,518,519,520 etp20 20 800000 +Ethernet160 521,522,523,524,525,526,527,528 etp21 21 800000 +Ethernet168 553,554,555,556,557,558,559,560 etp22 22 800000 +Ethernet176 561,562,563,564,565,566,567,568 etp23 23 800000 +Ethernet184 569,570,571,572,573,574,575,576 etp24 24 800000 +Ethernet192 649,650,651,652,653,654,655,656 etp25 25 800000 +Ethernet200 681,682,683,684,685,686,687,688 etp26 26 800000 +Ethernet208 689,690,691,692,693,694,695,696 etp27 27 800000 +Ethernet216 697,698,699,700,701,702,703,704 etp28 28 800000 +Ethernet224 761,762,763,764,765,766,767,768 etp29 29 800000 +Ethernet232 753,754,755,756,757,758,759,760 etp30 30 800000 +Ethernet240 713,714,715,716,717,718,719,720 etp31 31 800000 +Ethernet248 745,746,747,748,749,750,751,752 etp32 32 800000 +Ethernet256 33,34,35,36,37,38,39,40 etp33 33 800000 +Ethernet264 1,2,3,4,5,6,7,8 etp34 34 800000 +Ethernet272 41,42,43,44,45,46,47,48 etp35 35 800000 +Ethernet280 57,58,59,60,61,62,63,64 etp36 36 800000 +Ethernet288 121,122,123,124,125,126,127,128 etp37 37 800000 +Ethernet296 105,106,107,108,109,110,111,112 etp38 38 800000 +Ethernet304 65,66,67,68,69,70,71,72 etp39 39 800000 +Ethernet312 97,98,99,100,101,102,103,104 etp40 40 800000 +Ethernet320 153,154,155,156,157,158,159,160 etp41 41 800000 +Ethernet328 145,146,147,148,149,150,151,152 etp42 42 800000 +Ethernet336 321,322,323,324,325,326,327,328 etp43 43 800000 +Ethernet344 353,354,355,356,357,358,359,360 etp44 44 800000 +Ethernet352 409,410,411,412,413,414,415,416 etp45 45 800000 +Ethernet360 401,402,403,404,405,406,407,408 etp46 46 800000 +Ethernet368 393,394,395,396,397,398,399,400 etp47 47 800000 +Ethernet376 433,434,435,436,437,438,439,440 etp48 48 800000 +Ethernet384 585,586,587,588,589,590,591,592 etp49 49 800000 +Ethernet392 625,626,627,628,629,630,631,632 etp50 50 800000 +Ethernet400 601,602,603,604,605,606,607,608 etp51 51 800000 +Ethernet408 593,594,595,596,597,598,599,600 etp52 52 800000 +Ethernet416 641,642,643,644,645,646,647,648 etp53 53 800000 +Ethernet424 673,674,675,676,677,678,679,680 etp54 54 800000 +Ethernet432 857,858,859,860,861,862,863,864 etp55 55 800000 +Ethernet440 849,850,851,852,853,854,855,856 etp56 56 800000 +Ethernet448 897,898,899,900,901,902,903,904 etp57 57 800000 +Ethernet456 929,930,931,932,933,934,935,936 etp58 58 800000 +Ethernet464 953,954,955,956,957,958,959,960 etp59 59 800000 +Ethernet472 937,938,939,940,941,942,943,944 etp60 60 800000 +Ethernet480 1001,1002,1003,1004,1005,1006,1007,1008 etp61 61 800000 +Ethernet488 1017,1018,1019,1020,1021,1022,1023,1024 etp62 62 800000 +Ethernet496 993,994,995,996,997,998,999,1000 etp63 63 800000 +Ethernet504 961,962,963,964,965,966,967,968 etp64 64 800000 +Ethernet512 17,18,19,20,21,22,23,24 etp65 65 800000 +Ethernet520 25,26,27,28,29,30,31,32 etp66 66 800000 +Ethernet528 49,50,51,52,53,54,55,56 etp67 67 800000 +Ethernet536 9,10,11,12,13,14,15,16 etp68 68 800000 +Ethernet544 73,74,75,76,77,78,79,80 etp69 69 800000 +Ethernet552 113,114,115,116,117,118,119,120 etp70 70 800000 +Ethernet560 89,90,91,92,93,94,95,96 etp71 71 800000 +Ethernet568 81,82,83,84,85,86,87,88 etp72 72 800000 +Ethernet576 129,130,131,132,133,134,135,136 etp73 73 800000 +Ethernet584 161,162,163,164,165,166,167,168 etp74 74 800000 +Ethernet592 345,346,347,348,349,350,351,352 etp75 75 800000 +Ethernet600 337,338,339,340,341,342,343,344 etp76 76 800000 +Ethernet608 385,386,387,388,389,390,391,392 etp77 77 800000 +Ethernet616 417,418,419,420,421,422,423,424 etp78 78 800000 +Ethernet624 441,442,443,444,445,446,447,448 etp79 79 800000 +Ethernet632 425,426,427,428,429,430,431,432 etp80 80 800000 +Ethernet640 633,634,635,636,637,638,639,640 etp81 81 800000 +Ethernet648 617,618,619,620,621,622,623,624 etp82 82 800000 +Ethernet656 577,578,579,580,581,582,583,584 etp83 83 800000 +Ethernet664 609,610,611,612,613,614,615,616 etp84 84 800000 +Ethernet672 665,666,667,668,669,670,671,672 etp85 85 800000 +Ethernet680 657,658,659,660,661,662,663,664 etp86 86 800000 +Ethernet688 833,834,835,836,837,838,839,840 etp87 87 800000 +Ethernet696 865,866,867,868,869,870,871,872 etp88 88 800000 +Ethernet704 921,922,923,924,925,926,927,928 etp89 89 800000 +Ethernet712 913,914,915,916,917,918,919,920 etp90 90 800000 +Ethernet720 905,906,907,908,909,910,911,912 etp91 91 800000 +Ethernet728 945,946,947,948,949,950,951,952 etp92 92 800000 +Ethernet736 1009,1010,1011,1012,1013,1014,1015,1016 etp93 93 800000 +Ethernet744 969,970,971,972,973,974,975,976 etp94 94 800000 +Ethernet752 977,978,979,980,981,982,983,984 etp95 95 800000 +Ethernet760 985,986,987,988,989,990,991,992 etp96 96 800000 +Ethernet768 209,210,211,212,213,214,215,216 etp97 97 800000 +Ethernet776 193,194,195,196,197,198,199,200 etp98 98 800000 +Ethernet784 225,226,227,228,229,230,231,232 etp99 99 800000 +Ethernet792 217,218,219,220,221,222,223,224 etp100 100 800000 +Ethernet800 281,282,283,284,285,286,287,288 etp101 101 800000 +Ethernet808 289,290,291,292,293,294,295,296 etp102 102 800000 +Ethernet816 257,258,259,260,261,262,263,264 etp103 103 800000 +Ethernet824 273,274,275,276,277,278,279,280 etp104 104 800000 +Ethernet832 201,202,203,204,205,206,207,208 etp105 105 800000 +Ethernet840 233,234,235,236,237,238,239,240 etp106 106 800000 +Ethernet848 241,242,243,244,245,246,247,248 etp107 107 800000 +Ethernet856 249,250,251,252,253,254,255,256 etp108 108 800000 +Ethernet864 185,186,187,188,189,190,191,192 etp109 109 800000 +Ethernet872 177,178,179,180,181,182,183,184 etp110 110 800000 +Ethernet880 169,170,171,172,173,174,175,176 etp111 111 800000 +Ethernet888 137,138,139,140,141,142,143,144 etp112 112 800000 +Ethernet896 841,842,843,844,845,846,847,848 etp113 113 800000 +Ethernet904 873,874,875,876,877,878,879,880 etp114 114 800000 +Ethernet912 881,882,883,884,885,886,887,888 etp115 115 800000 +Ethernet920 889,890,891,892,893,894,895,896 etp116 116 800000 +Ethernet928 825,826,827,828,829,830,831,832 etp117 117 800000 +Ethernet936 817,818,819,820,821,822,823,824 etp118 118 800000 +Ethernet944 809,810,811,812,813,814,815,816 etp119 119 800000 +Ethernet952 777,778,779,780,781,782,783,784 etp120 120 800000 +Ethernet960 721,722,723,724,725,726,727,728 etp121 121 800000 +Ethernet968 705,706,707,708,709,710,711,712 etp122 122 800000 +Ethernet976 737,738,739,740,741,742,743,744 etp123 123 800000 +Ethernet984 729,730,731,732,733,734,735,736 etp124 124 800000 +Ethernet992 793,794,795,796,797,798,799,800 etp125 125 800000 +Ethernet1000 801,802,803,804,805,806,807,808 etp126 126 800000 +Ethernet1008 785,786,787,788,789,790,791,792 etp127 127 800000 +Ethernet1016 769,770,771,772,773,774,775,776 etp128 128 800000 +Ethernet1024 1026,1027,1028,1029 etp129 129 100000 +Ethernet1025 0 etp130 130 1000 \ No newline at end of file diff --git a/device/micas/x86_64-micas_m2-w6950-128oc-r0/M2-W6950-O128-COPPER/sai.profile b/device/micas/x86_64-micas_m2-w6950-128oc-r0/M2-W6950-O128-COPPER/sai.profile new file mode 100644 index 00000000000..96e0c9c9dc7 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6950-128oc-r0/M2-W6950-O128-COPPER/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th6-m2-w6950-o128-copper-128x800G.config.yml diff --git a/device/micas/x86_64-micas_m2-w6950-128oc-r0/M2-W6950-O128-COPPER/sap_bcm_81394.cfg b/device/micas/x86_64-micas_m2-w6950-128oc-r0/M2-W6950-O128-COPPER/sap_bcm_81394.cfg new file mode 100644 index 00000000000..c8b29b322cc --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6950-128oc-r0/M2-W6950-O128-COPPER/sap_bcm_81394.cfg @@ -0,0 +1,246 @@ +# Configuration file version number. +# The current sap_bcm_81394.c does not read this field; it is compatibility/identification information. +# Modifying it will not affect the initialization process of the 81394 driver. +version=1 + +# ==================== +# Global Initialization Parameters +# ==================== + +# Number of slots on the board. +# sap_aperta_config_init() first reads this value into the global g_slot_num, +# then sap_bcm_platform_init() calls sap_slot_init() for 0 to g_slot_num-1. +# Missing this field will cause configuration initialization to fail directly. +plp_slot_num=1 + +# MDIO access type. The ':1' in the key is not a PHY address, but the mdio_id. +# The code first reads plp_phy_mdio_id:0x30=1, then looks up plp_mdio_accs_type:1. +# The value comes from sap_mdio_type_e: +# 0 = MAC +# 1 = SYSFS +# 2 = SYSFS_CUST +# The current value 2 indicates using the custom sysfs MDIO access path. +plp_mdio_accs_type:1=2 + +# Firmware loading method, saved to the global g_fw_load_method. +# The definitions in the 81394 driver are: +# 0 = Do not load +# 1 = Unicast load +# 2 = Broadcast load +# 3 = EEPROM load +# 4 = upgrade path +# 5 = skip +# 6 = full process +# The current value 1 means downloading firmware to each PHY via unicast. +plp_fw_load_method=1 + +# Enable or disable I2C slave. +# The code reads this into g_i2c_slave_en, but in the current main flow of the 81394, +# the corresponding register write logic is completely commented out. +# Therefore, this value is currently a "parsed but not effective by default" field. +plp_i2c_slave_en=0 + +# AVS I2C response address. +# This is also read into g_avs_i2c_resp_addr and used by sap_bcm_avs_init() to assemble register values. +# However, AVS initialization is not actually enabled in the current boot path, so this is just a reserved configuration. +avs_i2c_resp_addr=0x35 + +# Default enable/disable link training for the port's system side. +# If there is no per-port configuration for init_linktrain_sys, each port inherits this global value. +# In sap_aperta_post_port_init(), it calls sap_bcm_linktraining_set(..., true) only if the value is 1. +# 0 means do not automatically enable LT. +plp_port_linktrain_sys=0 + +# Default enable/disable link training for the port's line side. +# The semantics are the same as plp_port_linktrain_sys, applying to the line side. +plp_port_linktrain_line=0 + +# ==================== +# Profile 1 VCO Presets +# ==================== + +# VCO selection for Profile 1, octal 0, system side. +# The 81394 code forcibly reads this and saves it to phy_info->vco_octal_0_sys. +# Confirmed from public headers: +# 0 = bcmplpVco51G +# 1 = bcmplpVco53G +# The current value 1 means 53G VCO. +# Note: In this version of the 81394 implementation, this value is read but not used further in mode_config_set. +# It seems more like a field retained to share the configuration format with other chips in the family. +plp_profile_1_init_vco_octal_0_sys=1 + +# VCO selection for Profile 1, octal 0, line side. +# The current value 1 = 53G VCO. +plp_profile_1_init_vco_octal_0_line=1 + +# VCO selection for Profile 1, octal 1, system side. +# The current board type uses only one PHY at address 0x30 and the profile uses lanes=0,1, +# but the code still requires the VCO for octal 1 to be configured, otherwise configuration parsing fails. +plp_profile_1_init_vco_octal_1_sys=1 + +# VCO selection for Profile 1, octal 1, line side. +# The current value 1 = 53G VCO. +plp_profile_1_init_vco_octal_1_line=1 + +# ==================== +# Profile 1: 100G, split=1, Single port with 4 lanes +# Key format: plp_profile__speed__split_.: +# This is changed to a single 100G port, hence split_num=1, port_id=0. +# +# In the 81394 code, split_num is not hardcoded, but calculated by: +# phy_info->lane_num / port_info->lanes +# Therefore, to target split_1.0, the init_lanes below needs to provide 4 lane entries, +# and init_ports_lane_num must be configured as 4, indicating a 4-lane aggregated port. +# ==================== + +# FEC mode for the line side. +# For the 100G 4x25G scenario, the semantics from the original file are retained, where 3 = RSFEC. +# This still uses the 25.78125G/lane NRZ path, not 2x50G PAM4. +plp_profile_1_speed_100000_split_1.0:fec_line=3 + +# FEC mode for the system side. +# Consistent with the line side, configured as 3 = RSFEC. +plp_profile_1_speed_100000_split_1.0:fec_sys=3 + +# Interface type for the line side. +# In bcm_pm_interface_t, 7 = bcm_pm_InterfaceKR4. +# This is changed from the single-lane KR to 4-lane KR4, matching the 100G 4-lane port form factor. +plp_profile_1_speed_100000_split_1.0:iftype_line=7 + +# Interface type for the system side. +# Also changed to 7 = KR4, maintaining the lane count and interface width consistency between system/line sides. +plp_profile_1_speed_100000_split_1.0:iftype_sys=7 + +# Line side lane bitmask. +# 0xF = 0000 1111b, indicating selection of 4 consecutive lanes. +# With speed=100000, the code calculates the per-lane speed as 25.78125G. +plp_profile_1_speed_100000_split_1.0:lanemap_line=0xF + +# System side lane bitmask. +# Same as the line side, indicating a 4-lane passthrough port, not a gearbox/reverse-gearbox. +plp_profile_1_speed_100000_split_1.0:lanemap_sys=0xF + +# Force NR (No Retimer) bitmap for the system side. +# Currently not forced, keep as 0. +plp_profile_1_speed_100000_split_1.0:force_nr_sys=0x0 + +# Force NR (No Retimer) bitmap for the line side. +# Currently not forced, keep as 0. +plp_profile_1_speed_100000_split_1.0:force_nr_line=0x0 + +# Force ER (Eye Retimer) bitmap for the system side. +# Currently not forced, keep as 0. +plp_profile_1_speed_100000_split_1.0:force_er_sys=0x0 + +# Force ER (Eye Retimer) bitmap for the line side. +# Currently not forced, keep as 0. +plp_profile_1_speed_100000_split_1.0:force_er_line=0x0 + + +# ==================== +# PHY List +# ==================== + +# List of PHY addresses to initialize. +# sap_aperta_config_init() generates g_bcm_phy_infos based on this array. +# Currently, there is only one PHY at address 0x30. +plp_phy_addrs=0x30 + +# ==================== +# PHY 0x30 Base Attributes +# PHY address resolution method: +# bus_id = (phy_addr & 0x7c00)>>10; +# mdio_index = (phy_addr & 0x3e0)>>5; +# phy_addr = phy_addr & 0x1f; +# return dfd_utest_mdiodev_rd(mdio_index+bus_id, phy_addr, reg_addr, data); +# ==================== + +# The unit to which the PHY is bound. +# sap_slot_init() filters by unit and card_id to determine if this PHY should be initialized in the current round. +plp_phy_unit_id:0x30=0 + +# The card/slot number the PHY belongs to. +# The PHY is initialized only when this matches the outer slot_id. +plp_phy_card_id:0x30=0 + +# The mdio_id used by this PHY. +# The code will then use this mdio_id to look up plp_mdio_accs_type:. +plp_phy_mdio_id:0x30=1 + +# PHY chip name. +# For this version of the 81394 code, this is a compatibility field, as the chip_name is hardcoded to "aperta" in the source. +# Modifying it will not change the chip name used by the driver. +plp_phy_chip_name:0x30=aperta + +# MACsec option. +# The current 81394 file only reads and saves this to phy_info->macsec_option, with no subsequent use observed. +# Therefore, this is more of a reserved field. +plp_phy_macsec_option:0x30=0x0 + +# PTP option. +# Similar to macsec_option, currently only parsed and saved, not consumed in the main 81394 flow. +plp_phy_ptp_option:0x30=0x0 + +# The initialization profile ID used by this PHY. +# The '1' in all subsequent plp_profile_1_* key names is determined by this value. +plp_phy_init_profile_id:0x30=1 + +# The lane list for this PHY under Profile 1. +# This is changed to 0,1,2,3. This does not mean 4 independent logical ports, +# but rather to make phy_info->lane_num = 4, causing the code to calculate split_num = 1. +# The number of logical ports actually created is still determined by the next line, init_ports. +plp_profile_1_init_lanes:0x30=0-3 + +# The list of logical port numbers presented externally by this PHY under Profile 1. +# Changed to create only one logical port, port 1, to carry the 1x100G module. +plp_profile_1_init_ports:0x30=1 + +# The number of lanes occupied by each logical port under Profile 1. +# Changed to a single port occupying 4 lanes. +plp_profile_1_init_ports_lane_num:0x30=4 + +# The initial speed of each logical port under Profile 1. +# Changed to 100000 Mbps for a single port, i.e., 100G. +plp_profile_1_init_speed_mode:0x30=100000 + +# ==================== +# PHY 0x30 Global Lane Swap and Polarity Configuration +# These keys apply to the entire PHY, not a single port. +# ==================== + +# System side TX lane mapping. +# This value is parsed as 8 nibbles, lane by lane. +# lane_map_tx[lane_index] = GET_LANE_SWAP_OCTAL(value, lane_index). +# 0x76543210 represents logical 0->0, 1->1, 2->2... 7->7, which is an identity mapping. +plp_phy_tx_lane_map_sys:0x30=0x76543210 + +# System side RX lane mapping. +# Currently also an identity mapping. +plp_phy_rx_lane_map_sys:0x30=0x76543210 + +# Line side TX lane mapping. +# 0x76543120 indicates a lane swap on the line side, no longer a direct passthrough. +# The code calls bcm_plp_rxtx_laneswap_set() in sap_aperta_phy_init() to apply this. +plp_phy_tx_lane_map_line:0x30=0x76542301 + +# Line side RX lane mapping. +# Currently the same as TX, indicating that RX/TX both follow the same line-side swapping rules. +plp_phy_rx_lane_map_line:0x30=0x76542301 + +# Line side TX polarity flip bitmap. +# In sap_aperta_phy_init(), the current polarity is read, XORed with this value, and then written back. +# Therefore, a bit=1 means flip the polarity for the corresponding lane; 0 means leave it unchanged. +# The current 0x0 means no polarity flip on the line side TX. +plp_tx_polarity_flip_line:0x30=0x0 + +# Line side RX polarity flip bitmap. +# The current 0x0 means no polarity flip on the line side RX. +plp_rx_polarity_flip_line:0x30=0xF + +# System side TX polarity flip bitmap. +# The current 0x0 means no polarity flip on the system side TX. +plp_tx_polarity_flip_sys:0x30=0x0 + +# System side RX polarity flip bitmap. +# The current 0x0 means no polarity flip on the system side RX. +plp_rx_polarity_flip_sys:0x30=0x0 \ No newline at end of file diff --git a/device/micas/x86_64-micas_m2-w6950-128oc-r0/M2-W6950-O128-COPPER/th6-m2-w6950-o128-copper-128x800G.config.yml b/device/micas/x86_64-micas_m2-w6950-128oc-r0/M2-W6950-O128-COPPER/th6-m2-w6950-o128-copper-128x800G.config.yml new file mode 100644 index 00000000000..7a999355d8d --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6950-128oc-r0/M2-W6950-O128-COPPER/th6-m2-w6950-o128-copper-128x800G.config.yml @@ -0,0 +1,2195 @@ +--- +device: + 0: + DEVICE_CONFIG: + AUTOLOAD_BOARD_SETTINGS: 0 +... + +--- +device: + 0: + PC_PM_CORE: + ? + PC_PM_ID: 1 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x12360745 + RX_LANE_MAP: 0x34726150 + TX_POLARITY_FLIP: 0x57 + RX_POLARITY_FLIP: 0x39 + ? + PC_PM_ID: 2 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x56327140 + RX_LANE_MAP: 0x60317425 + TX_POLARITY_FLIP: 0x99 + RX_POLARITY_FLIP: 0x59 + ? + PC_PM_ID: 3 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x23145670 + RX_LANE_MAP: 0x57462103 + TX_POLARITY_FLIP: 0x6e + RX_POLARITY_FLIP: 0x19 + ? + PC_PM_ID: 4 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x45726013 + RX_LANE_MAP: 0x12360475 + TX_POLARITY_FLIP: 0x74 + RX_POLARITY_FLIP: 0x87 + ? + PC_PM_ID: 5 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x17204653 + RX_LANE_MAP: 0x54036127 + TX_POLARITY_FLIP: 0x3f + RX_POLARITY_FLIP: 0x77 + ? + PC_PM_ID: 6 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x14027653 + RX_LANE_MAP: 0x54217036 + TX_POLARITY_FLIP: 0x45 + RX_POLARITY_FLIP: 0x13 + ? + PC_PM_ID: 7 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x26351407 + RX_LANE_MAP: 0x52407163 + TX_POLARITY_FLIP: 0x43 + RX_POLARITY_FLIP: 0x10 + ? + PC_PM_ID: 8 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x45670321 + RX_LANE_MAP: 0x53274610 + TX_POLARITY_FLIP: 0xad + RX_POLARITY_FLIP: 0xd8 + ? + PC_PM_ID: 9 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x21705463 + RX_LANE_MAP: 0x46327105 + TX_POLARITY_FLIP: 0x95 + RX_POLARITY_FLIP: 0x40 + ? + PC_PM_ID: 10 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x12057463 + RX_LANE_MAP: 0x51740236 + TX_POLARITY_FLIP: 0xc8 + RX_POLARITY_FLIP: 0xf5 + ? + PC_PM_ID: 11 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x67105243 + RX_LANE_MAP: 0x40236715 + TX_POLARITY_FLIP: 0x10 + RX_POLARITY_FLIP: 0x05 + ? + PC_PM_ID: 12 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x23164507 + RX_LANE_MAP: 0x45712063 + TX_POLARITY_FLIP: 0xd7 + RX_POLARITY_FLIP: 0xb3 + ? + PC_PM_ID: 13 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x46570213 + RX_LANE_MAP: 0x71546032 + TX_POLARITY_FLIP: 0x69 + RX_POLARITY_FLIP: 0x51 + ? + PC_PM_ID: 14 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x17453206 + RX_LANE_MAP: 0x61257430 + TX_POLARITY_FLIP: 0xaa + RX_POLARITY_FLIP: 0x64 + ? + PC_PM_ID: 15 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x56327041 + RX_LANE_MAP: 0x50361427 + TX_POLARITY_FLIP: 0xe2 + RX_POLARITY_FLIP: 0xf8 + ? + PC_PM_ID: 16 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x07324651 + RX_LANE_MAP: 0x57624301 + TX_POLARITY_FLIP: 0x0d + RX_POLARITY_FLIP: 0xa0 + ? + PC_PM_ID: 17 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x01374526 + RX_LANE_MAP: 0x64751032 + TX_POLARITY_FLIP: 0x24 + RX_POLARITY_FLIP: 0x19 + ? + PC_PM_ID: 18 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x13024675 + RX_LANE_MAP: 0x61304275 + TX_POLARITY_FLIP: 0x10 + RX_POLARITY_FLIP: 0xa1 + ? + PC_PM_ID: 19 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x16452307 + RX_LANE_MAP: 0x50346721 + TX_POLARITY_FLIP: 0xc5 + RX_POLARITY_FLIP: 0xb8 + ? + PC_PM_ID: 20 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x32604571 + RX_LANE_MAP: 0x67205314 + TX_POLARITY_FLIP: 0x53 + RX_POLARITY_FLIP: 0xc0 + ? + PC_PM_ID: 21 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x46120573 + RX_LANE_MAP: 0x13526407 + TX_POLARITY_FLIP: 0x2e + RX_POLARITY_FLIP: 0xf6 + ? + PC_PM_ID: 22 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x20731645 + RX_LANE_MAP: 0x30412657 + TX_POLARITY_FLIP: 0xa0 + RX_POLARITY_FLIP: 0x04 + ? + PC_PM_ID: 23 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x13207465 + RX_LANE_MAP: 0x20316475 + TX_POLARITY_FLIP: 0x01 + RX_POLARITY_FLIP: 0x38 + ? + PC_PM_ID: 24 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x13027654 + RX_LANE_MAP: 0x61305274 + TX_POLARITY_FLIP: 0x90 + RX_POLARITY_FLIP: 0x88 + ? + PC_PM_ID: 25 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x23107465 + RX_LANE_MAP: 0x32107654 + TX_POLARITY_FLIP: 0x62 + RX_POLARITY_FLIP: 0x99 + ? + PC_PM_ID: 26 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x20731645 + RX_LANE_MAP: 0x03612547 + TX_POLARITY_FLIP: 0xed + RX_POLARITY_FLIP: 0xf7 + ? + PC_PM_ID: 27 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x13027654 + RX_LANE_MAP: 0x62307145 + TX_POLARITY_FLIP: 0x9d + RX_POLARITY_FLIP: 0xaa + ? + PC_PM_ID: 28 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x31064752 + RX_LANE_MAP: 0x02135764 + TX_POLARITY_FLIP: 0xf5 + RX_POLARITY_FLIP: 0xca + ? + PC_PM_ID: 29 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x12357064 + RX_LANE_MAP: 0x03216457 + TX_POLARITY_FLIP: 0x81 + RX_POLARITY_FLIP: 0x23 + ? + PC_PM_ID: 30 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x32106745 + RX_LANE_MAP: 0x61034275 + TX_POLARITY_FLIP: 0x11 + RX_POLARITY_FLIP: 0xc6 + ? + PC_PM_ID: 31 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x32014756 + RX_LANE_MAP: 0x13024576 + TX_POLARITY_FLIP: 0x20 + RX_POLARITY_FLIP: 0xce + ? + PC_PM_ID: 32 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x02376154 + RX_LANE_MAP: 0x03612547 + TX_POLARITY_FLIP: 0xd5 + RX_POLARITY_FLIP: 0xef + ? + PC_PM_ID: 33 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x02137564 + RX_LANE_MAP: 0x02637154 + TX_POLARITY_FLIP: 0xe7 + RX_POLARITY_FLIP: 0x20 + ? + PC_PM_ID: 34 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x01375264 + RX_LANE_MAP: 0x23507164 + TX_POLARITY_FLIP: 0x7f + RX_POLARITY_FLIP: 0x01 + ? + PC_PM_ID: 35 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x02134765 + RX_LANE_MAP: 0x13026745 + TX_POLARITY_FLIP: 0x1b + RX_POLARITY_FLIP: 0x82 + ? + PC_PM_ID: 36 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x23016745 + RX_LANE_MAP: 0x30162745 + TX_POLARITY_FLIP: 0xe6 + RX_POLARITY_FLIP: 0xc9 + ? + PC_PM_ID: 37 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x30412675 + RX_LANE_MAP: 0x32051674 + TX_POLARITY_FLIP: 0xa7 + RX_POLARITY_FLIP: 0x1b + ? + PC_PM_ID: 38 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x20314756 + RX_LANE_MAP: 0x10324576 + TX_POLARITY_FLIP: 0x73 + RX_POLARITY_FLIP: 0x91 + ? + PC_PM_ID: 39 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x20315746 + RX_LANE_MAP: 0x01534267 + TX_POLARITY_FLIP: 0x93 + RX_POLARITY_FLIP: 0x29 + ? + PC_PM_ID: 40 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x10732546 + RX_LANE_MAP: 0x23507164 + TX_POLARITY_FLIP: 0xdf + RX_POLARITY_FLIP: 0x81 + ? + PC_PM_ID: 41 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x07324651 + RX_LANE_MAP: 0x46357201 + TX_POLARITY_FLIP: 0xdf + RX_POLARITY_FLIP: 0x3a + ? + PC_PM_ID: 42 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x10324756 + RX_LANE_MAP: 0x10325746 + TX_POLARITY_FLIP: 0xbb + RX_POLARITY_FLIP: 0xee + ? + PC_PM_ID: 43 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x65073421 + RX_LANE_MAP: 0x53026714 + TX_POLARITY_FLIP: 0x7e + RX_POLARITY_FLIP: 0xc5 + ? + PC_PM_ID: 44 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x21057463 + RX_LANE_MAP: 0x47513260 + TX_POLARITY_FLIP: 0x65 + RX_POLARITY_FLIP: 0x07 + ? + PC_PM_ID: 45 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x47061235 + RX_LANE_MAP: 0x41276530 + TX_POLARITY_FLIP: 0x34 + RX_POLARITY_FLIP: 0xf1 + ? + PC_PM_ID: 46 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x02375164 + RX_LANE_MAP: 0x01437265 + TX_POLARITY_FLIP: 0x2b + RX_POLARITY_FLIP: 0xc6 + ? + PC_PM_ID: 47 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x01237564 + RX_LANE_MAP: 0x13607254 + TX_POLARITY_FLIP: 0xdb + RX_POLARITY_FLIP: 0x44 + ? + PC_PM_ID: 48 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x02137564 + RX_LANE_MAP: 0x13025476 + TX_POLARITY_FLIP: 0x74 + RX_POLARITY_FLIP: 0xce + ? + PC_PM_ID: 49 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x70152643 + RX_LANE_MAP: 0x76512043 + TX_POLARITY_FLIP: 0x73 + RX_POLARITY_FLIP: 0x55 + ? + PC_PM_ID: 50 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x04635271 + RX_LANE_MAP: 0x67235014 + TX_POLARITY_FLIP: 0xde + RX_POLARITY_FLIP: 0x25 + ? + PC_PM_ID: 51 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x76540213 + RX_LANE_MAP: 0x51376240 + TX_POLARITY_FLIP: 0xf1 + RX_POLARITY_FLIP: 0xc4 + ? + PC_PM_ID: 52 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x12375460 + RX_LANE_MAP: 0x54261037 + TX_POLARITY_FLIP: 0xe1 + RX_POLARITY_FLIP: 0x0f + ? + PC_PM_ID: 53 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x64301572 + RX_LANE_MAP: 0x63107425 + TX_POLARITY_FLIP: 0x5f + RX_POLARITY_FLIP: 0x17 + ? + PC_PM_ID: 54 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x45213670 + RX_LANE_MAP: 0x41062537 + TX_POLARITY_FLIP: 0xc6 + RX_POLARITY_FLIP: 0x08 + ? + PC_PM_ID: 55 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x25461073 + RX_LANE_MAP: 0x73215640 + TX_POLARITY_FLIP: 0xec + RX_POLARITY_FLIP: 0x0e + ? + PC_PM_ID: 56 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x30264571 + RX_LANE_MAP: 0x67452031 + TX_POLARITY_FLIP: 0x38 + RX_POLARITY_FLIP: 0x55 + ? + PC_PM_ID: 57 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x36270154 + RX_LANE_MAP: 0x36270154 + TX_POLARITY_FLIP: 0x89 + RX_POLARITY_FLIP: 0x23 + ? + PC_PM_ID: 58 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x02736154 + RX_LANE_MAP: 0x20341765 + TX_POLARITY_FLIP: 0xe0 + RX_POLARITY_FLIP: 0x7f + ? + PC_PM_ID: 59 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x32105764 + RX_LANE_MAP: 0x23017654 + TX_POLARITY_FLIP: 0xb5 + RX_POLARITY_FLIP: 0x96 + ? + PC_PM_ID: 60 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x63721045 + RX_LANE_MAP: 0x36270154 + TX_POLARITY_FLIP: 0x50 + RX_POLARITY_FLIP: 0x33 + ? + PC_PM_ID: 61 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x02341675 + RX_LANE_MAP: 0x02341675 + TX_POLARITY_FLIP: 0x20 + RX_POLARITY_FLIP: 0xc7 + ? + PC_PM_ID: 62 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x23106457 + RX_LANE_MAP: 0x23106754 + TX_POLARITY_FLIP: 0x90 + RX_POLARITY_FLIP: 0x26 + ? + PC_PM_ID: 63 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x63721045 + RX_LANE_MAP: 0x36170254 + TX_POLARITY_FLIP: 0x46 + RX_POLARITY_FLIP: 0x73 + ? + PC_PM_ID: 64 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x20371645 + RX_LANE_MAP: 0x20341765 + TX_POLARITY_FLIP: 0xd0 + RX_POLARITY_FLIP: 0x7f + ? + PC_PM_ID: 65 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x36270154 + RX_LANE_MAP: 0x63721045 + TX_POLARITY_FLIP: 0x7a + RX_POLARITY_FLIP: 0xec + ? + PC_PM_ID: 66 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x02736154 + RX_LANE_MAP: 0x02437156 + TX_POLARITY_FLIP: 0x13 + RX_POLARITY_FLIP: 0x40 + ? + PC_PM_ID: 67 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x32105764 + RX_LANE_MAP: 0x32106745 + TX_POLARITY_FLIP: 0x46 + RX_POLARITY_FLIP: 0x96 + ? + PC_PM_ID: 68 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x63721045 + RX_LANE_MAP: 0x63721045 + TX_POLARITY_FLIP: 0xa3 + RX_POLARITY_FLIP: 0xcc + ? + PC_PM_ID: 69 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x02341675 + RX_LANE_MAP: 0x20436157 + TX_POLARITY_FLIP: 0xd3 + RX_POLARITY_FLIP: 0x34 + ? + PC_PM_ID: 70 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x23106457 + RX_LANE_MAP: 0x32017645 + TX_POLARITY_FLIP: 0x63 + RX_POLARITY_FLIP: 0xe6 + ? + PC_PM_ID: 71 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x63721045 + RX_LANE_MAP: 0x63712045 + TX_POLARITY_FLIP: 0xb5 + RX_POLARITY_FLIP: 0x4c + ? + PC_PM_ID: 72 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x20371645 + RX_LANE_MAP: 0x02437156 + TX_POLARITY_FLIP: 0x23 + RX_POLARITY_FLIP: 0x40 + ? + PC_PM_ID: 73 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x13762540 + RX_LANE_MAP: 0x51764320 + TX_POLARITY_FLIP: 0xe0 + RX_POLARITY_FLIP: 0xaa + ? + PC_PM_ID: 74 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x62135470 + RX_LANE_MAP: 0x64025317 + TX_POLARITY_FLIP: 0xa0 + RX_POLARITY_FLIP: 0xea + ? + PC_PM_ID: 75 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x54761302 + RX_LANE_MAP: 0x50326741 + TX_POLARITY_FLIP: 0x0b + RX_POLARITY_FLIP: 0x7e + ? + PC_PM_ID: 76 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x34075261 + RX_LANE_MAP: 0x57021634 + TX_POLARITY_FLIP: 0x5a + RX_POLARITY_FLIP: 0xf0 + ? + PC_PM_ID: 77 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x75201463 + RX_LANE_MAP: 0x70126435 + TX_POLARITY_FLIP: 0xe4 + RX_POLARITY_FLIP: 0xaa + ? + PC_PM_ID: 78 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x67013542 + RX_LANE_MAP: 0x26034517 + TX_POLARITY_FLIP: 0xde + RX_POLARITY_FLIP: 0x7f + ? + PC_PM_ID: 79 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x46257310 + RX_LANE_MAP: 0x70265143 + TX_POLARITY_FLIP: 0x4c + RX_POLARITY_FLIP: 0xf5 + ? + PC_PM_ID: 80 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x21354670 + RX_LANE_MAP: 0x45673120 + TX_POLARITY_FLIP: 0xab + RX_POLARITY_FLIP: 0xaa + ? + PC_PM_ID: 81 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x36124750 + RX_LANE_MAP: 0x41237506 + TX_POLARITY_FLIP: 0x80 + RX_POLARITY_FLIP: 0x84 + ? + PC_PM_ID: 82 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x10324756 + RX_LANE_MAP: 0x01237564 + TX_POLARITY_FLIP: 0xbb + RX_POLARITY_FLIP: 0xdd + ? + PC_PM_ID: 83 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x24173560 + RX_LANE_MAP: 0x62015734 + TX_POLARITY_FLIP: 0xc5 + RX_POLARITY_FLIP: 0xf0 + ? + PC_PM_ID: 84 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x03247561 + RX_LANE_MAP: 0x51476032 + TX_POLARITY_FLIP: 0xf6 + RX_POLARITY_FLIP: 0xf2 + ? + PC_PM_ID: 85 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x06473512 + RX_LANE_MAP: 0x40256731 + TX_POLARITY_FLIP: 0x3e + RX_POLARITY_FLIP: 0x0a + ? + PC_PM_ID: 86 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x02375164 + RX_LANE_MAP: 0x10342756 + TX_POLARITY_FLIP: 0x2b + RX_POLARITY_FLIP: 0xc9 + ? + PC_PM_ID: 87 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x01237564 + RX_LANE_MAP: 0x31062745 + TX_POLARITY_FLIP: 0xdb + RX_POLARITY_FLIP: 0x88 + ? + PC_PM_ID: 88 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x02137564 + RX_LANE_MAP: 0x31204567 + TX_POLARITY_FLIP: 0x74 + RX_POLARITY_FLIP: 0xcd + ? + PC_PM_ID: 89 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x64751302 + RX_LANE_MAP: 0x45173620 + TX_POLARITY_FLIP: 0x24 + RX_POLARITY_FLIP: 0xfb + ? + PC_PM_ID: 90 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x01375264 + RX_LANE_MAP: 0x32051746 + TX_POLARITY_FLIP: 0x7f + RX_POLARITY_FLIP: 0x02 + ? + PC_PM_ID: 91 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x65471302 + RX_LANE_MAP: 0x54762031 + TX_POLARITY_FLIP: 0x1b + RX_POLARITY_FLIP: 0xbe + ? + PC_PM_ID: 92 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x45670123 + RX_LANE_MAP: 0x54726103 + TX_POLARITY_FLIP: 0x64 + RX_POLARITY_FLIP: 0x6c + ? + PC_PM_ID: 93 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x75264130 + RX_LANE_MAP: 0x47615023 + TX_POLARITY_FLIP: 0x25 + RX_POLARITY_FLIP: 0x27 + ? + PC_PM_ID: 94 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x20314756 + RX_LANE_MAP: 0x10324576 + TX_POLARITY_FLIP: 0x73 + RX_POLARITY_FLIP: 0x91 + ? + PC_PM_ID: 95 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x20315746 + RX_LANE_MAP: 0x10352476 + TX_POLARITY_FLIP: 0x93 + RX_POLARITY_FLIP: 0x16 + ? + PC_PM_ID: 96 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x10732546 + RX_LANE_MAP: 0x32051746 + TX_POLARITY_FLIP: 0xdf + RX_POLARITY_FLIP: 0x42 + ? + PC_PM_ID: 97 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x65741023 + RX_LANE_MAP: 0x45670123 + TX_POLARITY_FLIP: 0x76 + RX_POLARITY_FLIP: 0x66 + ? + PC_PM_ID: 98 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x45167320 + RX_LANE_MAP: 0x74521630 + TX_POLARITY_FLIP: 0x84 + RX_POLARITY_FLIP: 0x10 + ? + PC_PM_ID: 99 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x54760213 + RX_LANE_MAP: 0x45713062 + TX_POLARITY_FLIP: 0x89 + RX_POLARITY_FLIP: 0x55 + ? + PC_PM_ID: 100 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x52470631 + RX_LANE_MAP: 0x46753120 + TX_POLARITY_FLIP: 0xa0 + RX_POLARITY_FLIP: 0xac + ? + PC_PM_ID: 101 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x64703512 + RX_LANE_MAP: 0x75461230 + TX_POLARITY_FLIP: 0xbd + RX_POLARITY_FLIP: 0x3b + ? + PC_PM_ID: 102 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x45671032 + RX_LANE_MAP: 0x57243016 + TX_POLARITY_FLIP: 0xbb + RX_POLARITY_FLIP: 0x9c + ? + PC_PM_ID: 103 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x56470132 + RX_LANE_MAP: 0x67542031 + TX_POLARITY_FLIP: 0xf7 + RX_POLARITY_FLIP: 0x8c + ? + PC_PM_ID: 104 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x54613702 + RX_LANE_MAP: 0x74521630 + TX_POLARITY_FLIP: 0xa8 + RX_POLARITY_FLIP: 0x08 + ? + PC_PM_ID: 105 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x36054721 + RX_LANE_MAP: 0x75643210 + TX_POLARITY_FLIP: 0xb7 + RX_POLARITY_FLIP: 0xb9 + ? + PC_PM_ID: 106 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x75642031 + RX_LANE_MAP: 0x57240316 + TX_POLARITY_FLIP: 0xf7 + RX_POLARITY_FLIP: 0x7a + ? + PC_PM_ID: 107 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x45160723 + RX_LANE_MAP: 0x51376420 + TX_POLARITY_FLIP: 0xca + RX_POLARITY_FLIP: 0x43 + ? + PC_PM_ID: 108 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x65104273 + RX_LANE_MAP: 0x64325017 + TX_POLARITY_FLIP: 0xc9 + RX_POLARITY_FLIP: 0x1b + ? + PC_PM_ID: 109 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x75320641 + RX_LANE_MAP: 0x62501437 + TX_POLARITY_FLIP: 0xd1 + RX_POLARITY_FLIP: 0x81 + ? + PC_PM_ID: 110 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x45167320 + RX_LANE_MAP: 0x75621403 + TX_POLARITY_FLIP: 0xf5 + RX_POLARITY_FLIP: 0xdf + ? + PC_PM_ID: 111 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x65742013 + RX_LANE_MAP: 0x57461302 + TX_POLARITY_FLIP: 0xbf + RX_POLARITY_FLIP: 0xe3 + ? + PC_PM_ID: 112 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x54760213 + RX_LANE_MAP: 0x47250316 + TX_POLARITY_FLIP: 0xf9 + RX_POLARITY_FLIP: 0xee + ? + PC_PM_ID: 113 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x74305162 + RX_LANE_MAP: 0x75014236 + TX_POLARITY_FLIP: 0x8e + RX_POLARITY_FLIP: 0x01 + ? + PC_PM_ID: 114 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x03147562 + RX_LANE_MAP: 0x74513602 + TX_POLARITY_FLIP: 0x0e + RX_POLARITY_FLIP: 0x0a + ? + PC_PM_ID: 115 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x42305761 + RX_LANE_MAP: 0x63214705 + TX_POLARITY_FLIP: 0x08 + RX_POLARITY_FLIP: 0xfa + ? + PC_PM_ID: 116 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x17254603 + RX_LANE_MAP: 0x71456320 + TX_POLARITY_FLIP: 0x50 + RX_POLARITY_FLIP: 0x13 + ? + PC_PM_ID: 117 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x57461302 + RX_LANE_MAP: 0x72506431 + TX_POLARITY_FLIP: 0x69 + RX_POLARITY_FLIP: 0xaa + ? + PC_PM_ID: 118 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x45170632 + RX_LANE_MAP: 0x60247531 + TX_POLARITY_FLIP: 0x55 + RX_POLARITY_FLIP: 0xde + ? + PC_PM_ID: 119 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x40127653 + RX_LANE_MAP: 0x16325407 + TX_POLARITY_FLIP: 0x9f + RX_POLARITY_FLIP: 0x15 + ? + PC_PM_ID: 120 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x36124750 + RX_LANE_MAP: 0x41035267 + TX_POLARITY_FLIP: 0x97 + RX_POLARITY_FLIP: 0x0a + ? + PC_PM_ID: 121 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x36124507 + RX_LANE_MAP: 0x30716254 + TX_POLARITY_FLIP: 0xa2 + RX_POLARITY_FLIP: 0x83 + ? + PC_PM_ID: 122 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x41027653 + RX_LANE_MAP: 0x71326405 + TX_POLARITY_FLIP: 0x22 + RX_POLARITY_FLIP: 0x3c + ? + PC_PM_ID: 123 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x10265473 + RX_LANE_MAP: 0x46570321 + TX_POLARITY_FLIP: 0xbc + RX_POLARITY_FLIP: 0xb9 + ? + PC_PM_ID: 124 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x10327546 + RX_LANE_MAP: 0x06371425 + TX_POLARITY_FLIP: 0x44 + RX_POLARITY_FLIP: 0xe2 + ? + PC_PM_ID: 125 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x26304751 + RX_LANE_MAP: 0x67215304 + TX_POLARITY_FLIP: 0x05 + RX_POLARITY_FLIP: 0x77 + ? + PC_PM_ID: 126 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x06327451 + RX_LANE_MAP: 0x76305124 + TX_POLARITY_FLIP: 0x9b + RX_POLARITY_FLIP: 0x64 + ? + PC_PM_ID: 127 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x37241506 + RX_LANE_MAP: 0x40526371 + TX_POLARITY_FLIP: 0x64 + RX_POLARITY_FLIP: 0xbf + ? + PC_PM_ID: 128 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x67452103 + RX_LANE_MAP: 0x50264713 + TX_POLARITY_FLIP: 0x58 + RX_POLARITY_FLIP: 0x62 + ? + PC_PM_ID: 129 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x0123 + RX_LANE_MAP: 0x0123 + TX_POLARITY_FLIP: 0x0 + RX_POLARITY_FLIP: 0x0 +... + +--- +device: + 0: + PC_PORT_PHYS_MAP: + ? + # CPU port + PORT_ID: 0 + : + PC_PHYS_PORT_ID: 0 + ? + PORT_ID: 13 + : + PC_PHYS_PORT_ID: 1 + ? + PORT_ID: 105 + : + PC_PHYS_PORT_ID: 185 + ? + PORT_ID: 120 + : + PC_PHYS_PORT_ID: 193 + ? + PORT_ID: 121 + : + PC_PHYS_PORT_ID: 201 + ? + PORT_ID: 122 + : + PC_PHYS_PORT_ID: 209 + ? + PORT_ID: 123 + : + PC_PHYS_PORT_ID: 217 + ? + PORT_ID: 138 + : + PC_PHYS_PORT_ID: 225 + ? + PORT_ID: 16 + : + PC_PHYS_PORT_ID: 25 + ? + PORT_ID: 139 + : + PC_PHYS_PORT_ID: 233 + ? + PORT_ID: 140 + : + PC_PHYS_PORT_ID: 241 + ? + PORT_ID: 141 + : + PC_PHYS_PORT_ID: 249 + ? + PORT_ID: 156 + : + PC_PHYS_PORT_ID: 257 + ? + PORT_ID: 157 + : + PC_PHYS_PORT_ID: 265 + ? + PORT_ID: 158 + : + PC_PHYS_PORT_ID: 273 + ? + PORT_ID: 159 + : + PC_PHYS_PORT_ID: 281 + ? + PORT_ID: 174 + : + PC_PHYS_PORT_ID: 289 + ? + PORT_ID: 175 + : + PC_PHYS_PORT_ID: 297 + ? + PORT_ID: 176 + : + PC_PHYS_PORT_ID: 305 + ? + PORT_ID: 177 + : + PC_PHYS_PORT_ID: 313 + ? + PORT_ID: 30 + : + PC_PHYS_PORT_ID: 33 + ? + PORT_ID: 192 + : + PC_PHYS_PORT_ID: 321 + ? + PORT_ID: 193 + : + PC_PHYS_PORT_ID: 329 + ? + PORT_ID: 194 + : + PC_PHYS_PORT_ID: 337 + ? + PORT_ID: 195 + : + PC_PHYS_PORT_ID: 345 + ? + PORT_ID: 210 + : + PC_PHYS_PORT_ID: 353 + ? + PORT_ID: 211 + : + PC_PHYS_PORT_ID: 361 + ? + PORT_ID: 212 + : + PC_PHYS_PORT_ID: 369 + ? + PORT_ID: 213 + : + PC_PHYS_PORT_ID: 377 + ? + PORT_ID: 228 + : + PC_PHYS_PORT_ID: 385 + ? + PORT_ID: 31 + : + PC_PHYS_PORT_ID: 41 + ? + PORT_ID: 229 + : + PC_PHYS_PORT_ID: 393 + ? + PORT_ID: 230 + : + PC_PHYS_PORT_ID: 401 + ? + PORT_ID: 231 + : + PC_PHYS_PORT_ID: 409 + ? + PORT_ID: 246 + : + PC_PHYS_PORT_ID: 417 + ? + PORT_ID: 247 + : + PC_PHYS_PORT_ID: 425 + ? + PORT_ID: 248 + : + PC_PHYS_PORT_ID: 433 + ? + PORT_ID: 249 + : + PC_PHYS_PORT_ID: 441 + ? + PORT_ID: 264 + : + PC_PHYS_PORT_ID: 449 + ? + PORT_ID: 265 + : + PC_PHYS_PORT_ID: 457 + ? + PORT_ID: 32 + : + PC_PHYS_PORT_ID: 49 + ? + PORT_ID: 266 + : + PC_PHYS_PORT_ID: 465 + ? + PORT_ID: 267 + : + PC_PHYS_PORT_ID: 473 + ? + PORT_ID: 282 + : + PC_PHYS_PORT_ID: 481 + ? + PORT_ID: 283 + : + PC_PHYS_PORT_ID: 489 + ? + PORT_ID: 284 + : + PC_PHYS_PORT_ID: 497 + ? + PORT_ID: 285 + : + PC_PHYS_PORT_ID: 505 + ? + PORT_ID: 300 + : + PC_PHYS_PORT_ID: 513 + ? + PORT_ID: 301 + : + PC_PHYS_PORT_ID: 521 + ? + PORT_ID: 302 + : + PC_PHYS_PORT_ID: 529 + ? + PORT_ID: 33 + : + PC_PHYS_PORT_ID: 57 + ? + PORT_ID: 303 + : + PC_PHYS_PORT_ID: 537 + ? + PORT_ID: 318 + : + PC_PHYS_PORT_ID: 545 + ? + PORT_ID: 319 + : + PC_PHYS_PORT_ID: 553 + ? + PORT_ID: 320 + : + PC_PHYS_PORT_ID: 561 + ? + PORT_ID: 321 + : + PC_PHYS_PORT_ID: 569 + ? + PORT_ID: 336 + : + PC_PHYS_PORT_ID: 577 + ? + PORT_ID: 337 + : + PC_PHYS_PORT_ID: 585 + ? + PORT_ID: 338 + : + PC_PHYS_PORT_ID: 593 + ? + PORT_ID: 339 + : + PC_PHYS_PORT_ID: 601 + ? + PORT_ID: 354 + : + PC_PHYS_PORT_ID: 609 + ? + PORT_ID: 355 + : + PC_PHYS_PORT_ID: 617 + ? + PORT_ID: 356 + : + PC_PHYS_PORT_ID: 625 + ? + PORT_ID: 357 + : + PC_PHYS_PORT_ID: 633 + ? + PORT_ID: 48 + : + PC_PHYS_PORT_ID: 65 + ? + PORT_ID: 372 + : + PC_PHYS_PORT_ID: 641 + ? + PORT_ID: 373 + : + PC_PHYS_PORT_ID: 649 + ? + PORT_ID: 374 + : + PC_PHYS_PORT_ID: 657 + ? + PORT_ID: 375 + : + PC_PHYS_PORT_ID: 665 + ? + PORT_ID: 390 + : + PC_PHYS_PORT_ID: 673 + ? + PORT_ID: 391 + : + PC_PHYS_PORT_ID: 681 + ? + PORT_ID: 392 + : + PC_PHYS_PORT_ID: 689 + ? + PORT_ID: 393 + : + PC_PHYS_PORT_ID: 697 + ? + PORT_ID: 408 + : + PC_PHYS_PORT_ID: 705 + ? + PORT_ID: 49 + : + PC_PHYS_PORT_ID: 73 + ? + PORT_ID: 409 + : + PC_PHYS_PORT_ID: 713 + ? + PORT_ID: 410 + : + PC_PHYS_PORT_ID: 721 + ? + PORT_ID: 411 + : + PC_PHYS_PORT_ID: 729 + ? + PORT_ID: 426 + : + PC_PHYS_PORT_ID: 737 + ? + PORT_ID: 427 + : + PC_PHYS_PORT_ID: 745 + ? + PORT_ID: 428 + : + PC_PHYS_PORT_ID: 753 + ? + PORT_ID: 429 + : + PC_PHYS_PORT_ID: 761 + ? + PORT_ID: 444 + : + PC_PHYS_PORT_ID: 769 + ? + PORT_ID: 445 + : + PC_PHYS_PORT_ID: 777 + ? + PORT_ID: 50 + : + PC_PHYS_PORT_ID: 81 + ? + PORT_ID: 446 + : + PC_PHYS_PORT_ID: 785 + ? + PORT_ID: 447 + : + PC_PHYS_PORT_ID: 793 + ? + PORT_ID: 462 + : + PC_PHYS_PORT_ID: 801 + ? + PORT_ID: 463 + : + PC_PHYS_PORT_ID: 809 + ? + PORT_ID: 464 + : + PC_PHYS_PORT_ID: 817 + ? + PORT_ID: 465 + : + PC_PHYS_PORT_ID: 825 + ? + PORT_ID: 480 + : + PC_PHYS_PORT_ID: 833 + ? + PORT_ID: 481 + : + PC_PHYS_PORT_ID: 841 + ? + PORT_ID: 482 + : + PC_PHYS_PORT_ID: 849 + ? + PORT_ID: 51 + : + PC_PHYS_PORT_ID: 89 + ? + PORT_ID: 483 + : + PC_PHYS_PORT_ID: 857 + ? + PORT_ID: 498 + : + PC_PHYS_PORT_ID: 865 + ? + PORT_ID: 499 + : + PC_PHYS_PORT_ID: 873 + ? + PORT_ID: 500 + : + PC_PHYS_PORT_ID: 881 + ? + PORT_ID: 501 + : + PC_PHYS_PORT_ID: 889 + ? + PORT_ID: 14 + : + PC_PHYS_PORT_ID: 9 + ? + PORT_ID: 516 + : + PC_PHYS_PORT_ID: 897 + ? + PORT_ID: 517 + : + PC_PHYS_PORT_ID: 905 + ? + PORT_ID: 518 + : + PC_PHYS_PORT_ID: 913 + ? + PORT_ID: 519 + : + PC_PHYS_PORT_ID: 921 + ? + PORT_ID: 534 + : + PC_PHYS_PORT_ID: 929 + ? + PORT_ID: 535 + : + PC_PHYS_PORT_ID: 937 + ? + PORT_ID: 536 + : + PC_PHYS_PORT_ID: 945 + ? + PORT_ID: 537 + : + PC_PHYS_PORT_ID: 953 + ? + PORT_ID: 66 + : + PC_PHYS_PORT_ID: 97 + ? + PORT_ID: 552 + : + PC_PHYS_PORT_ID: 961 + ? + PORT_ID: 553 + : + PC_PHYS_PORT_ID: 969 + ? + PORT_ID: 554 + : + PC_PHYS_PORT_ID: 977 + ? + PORT_ID: 555 + : + PC_PHYS_PORT_ID: 985 + ? + PORT_ID: 570 + : + PC_PHYS_PORT_ID: 993 + ? + PORT_ID: 571 + : + PC_PHYS_PORT_ID: 1001 + ? + PORT_ID: 572 + : + PC_PHYS_PORT_ID: 1009 + ? + PORT_ID: 573 + : + PC_PHYS_PORT_ID: 1017 + ? + PORT_ID: 67 + : + PC_PHYS_PORT_ID: 105 + ? + PORT_ID: 68 + : + PC_PHYS_PORT_ID: 113 + ? + PORT_ID: 69 + : + PC_PHYS_PORT_ID: 121 + ? + PORT_ID: 84 + : + PC_PHYS_PORT_ID: 129 + ? + PORT_ID: 85 + : + PC_PHYS_PORT_ID: 137 + ? + PORT_ID: 86 + : + PC_PHYS_PORT_ID: 145 + ? + PORT_ID: 87 + : + PC_PHYS_PORT_ID: 153 + ? + PORT_ID: 15 + : + PC_PHYS_PORT_ID: 17 + ? + PORT_ID: 102 + : + PC_PHYS_PORT_ID: 161 + ? + PORT_ID: 103 + : + PC_PHYS_PORT_ID: 169 + ? + PORT_ID: 104 + : + PC_PHYS_PORT_ID: 177 + ? + PORT_ID: 268 + : + PC_PHYS_PORT_ID: 1026 + PC_PORT: + ? + PORT_ID: 0 + : + ENABLE: 1 + SPEED: 10000 + NUM_LANES: 1 + ? + PORT_ID: [13, 14, 15, 16, 30, 31, 32, 33, 48, 49, 50, 51, 66, 67, 68, 69, 84, 85, 86, 87, 102, 103, 104, 105, 120, 121, 122, 123, 138, 139, 140, 141, 156, 157, 158, 159, 174, 175, 176, 177, 192, 193, 194, 195, 210, 211, 212, 213, 228, 229, 230, 231, 246, 247, 248, 249, 264, 265, 266, 267, 282, 283, 284, 285, 300, 301, 302, 303, 318, 319, 320, 321, 336, 337, 338, 339, 354, 355, 356, 357, 372, 373, 374, 375, 390, 391, 392, 393, 408, 409, 410, 411, 426, 427, 428, 429, 444, 445, 446, 447, 462, 463, 464, 465, 480, 481, 482, 483, 498, 499, 500, 501, 516, 517, 518, 519, 534, 535, 536, 537, 552, 553, 554, 555, 570, 571, 572, 573] + : + ENABLE: 1 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_IEEE + LINK_TRAINING: 0 + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: [268] + : + ENABLE: 1 + SPEED: 100000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS528 + LINK_TRAINING: 0 + MAX_FRAME_SIZE: 9416 +... + +--- +device: + 0: + PC_PMD_FIRMWARE: + ? + PORT_ID: [192, 194, 195, 210, 213, 228, 229, 230, 231, 246, 247, 248, 249, 264, 265, 266, 267, 282, 283, 300, 301, 302, 303, 318, 319, 320, 336, 337, 338, 339, 354, 355, 356, 357, 372, 374, 375, 390] + : + MEDIUM_TYPE_AUTO: 0 + MEDIUM_TYPE: PC_PHY_MEDIUM_COPPER + NORMAL_REACH_PAM4_AUTO: 0 + NORMAL_REACH_PAM4: 255 + EXTENDED_REACH_PAM4_AUTO: 0 + EXTENDED_REACH_PAM4: 0 + ? + PORT_ID: [13, 14, 15, 16, 30, 31, 32, 33, 48, 49, 50, 51, 66, 67, 68, 69, 84, 85, 86, 87, 102, 103, 104, 105, 120, 121, 122, 123, 138, 139, 140, 141, 156, 157, 158, 159, 174, 175, 176, 177, 193, 211, 212, 284, 285, 321, 373, 391, 392, 393, 408, 409, 410, 411, 426, 427, 428, 429, 444, 445, 446, 447, 462, 463, 464, 465, 480, 481, 482, 483, 498, 499, 500, 501, 516, 517, 518, 519, 534, 535, 536, 537, 552, 553, 554, 555, 570, 571, 572, 573] + : + MEDIUM_TYPE_AUTO: 0 + MEDIUM_TYPE: PC_PHY_MEDIUM_COPPER + NORMAL_REACH_PAM4_AUTO: 0 + NORMAL_REACH_PAM4: 0 + EXTENDED_REACH_PAM4_AUTO: 0 + EXTENDED_REACH_PAM4: 255 + ? + PORT_ID: [268] + : + MEDIUM_TYPE_AUTO: 0 + MEDIUM_TYPE: PC_PHY_MEDIUM_BACKPLANE +... + +--- +device: + 0: + TM_SCHEDULER_CONFIG: + NUM_MC_Q: NUM_MC_Q_4 +... + +--- +bcm_device: + 0: + global: + bcm_tunnel_term_compatible_mode: 1 + vlan_flooding_l2mc_num_reserved: 2048 + l3_alpm_template: 2 + l3_alpm2_bnk_threshold: 100 + uft_mode: 1 + l3_enable: 1 + l2_hitbit_enable: 0 + stat_custom_receive0_management_mode: 1 + pktio_mode: 1 + sai_pfc_defaults_disable: 1 + sai_mac_policy_vfp_group: 0 + sai_skip_create_sys_efp_grp: 1 + sai_rdma_udf_disable: 1 + sai_trap_fp_action_drop_copy_to_cpu: 1 + sai_crm_hw_nh_group_cnt: 0 + riot_overlay_l3_intf_mem_size: 4096 + riot_overlay_l3_egress_mem_size: 8192 + l3_ecmp_member_first_lkup_mem_size: 8192 + l3_ecmp_member_secondary_mem_size: 8192 + failover_fixed_nh_offset_enable: 1 + sai_optimized_mmu: 0 + sai_async_fdb_nbr_enable: 1 + bcm_linkscan_interval: 100000 + sai_pfc_dlr_init_capability: 2 + sai_stats_support_mask: 0x804 +... + +--- +device: + 0: + # IFP mode + FP_CONFIG: + FP_ING_OPERMODE: GLOBAL_PIPE_AWARE +... + +--- +bcm_device: + 0: + port: + "*": + encap_mode: IEEE +... diff --git a/device/micas/x86_64-micas_m2-w6950-128oc-r0/M2-W6950-O128-LPO-N/default_sku b/device/micas/x86_64-micas_m2-w6950-128oc-r0/M2-W6950-O128-LPO-N/default_sku new file mode 100644 index 00000000000..bb54698a9d0 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6950-128oc-r0/M2-W6950-O128-LPO-N/default_sku @@ -0,0 +1 @@ +M2-W6950-O128-LPO-N l2 diff --git a/device/micas/x86_64-micas_m2-w6950-128oc-r0/M2-W6950-O128-LPO-N/hwsku.json b/device/micas/x86_64-micas_m2-w6950-128oc-r0/M2-W6950-O128-LPO-N/hwsku.json new file mode 100644 index 00000000000..276fda2943b --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6950-128oc-r0/M2-W6950-O128-LPO-N/hwsku.json @@ -0,0 +1,654 @@ +{ + "interfaces": { + "Ethernet0": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet8": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet16": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet24": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet32": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet40": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet48": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet56": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet64": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet72": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet80": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet88": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet96": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet104": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet112": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet120": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet128": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet136": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet144": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet152": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet160": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet168": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet176": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet184": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet192": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet200": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet208": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet216": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet224": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet232": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet240": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet248": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet256": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet264": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet272": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet280": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet288": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet296": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet304": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet312": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet320": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet328": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet336": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet344": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet352": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet360": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet368": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet376": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet384": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet392": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet400": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet408": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet416": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet424": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet432": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet440": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet448": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet456": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet464": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet472": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet480": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet488": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet496": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet504": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet512": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet520": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet528": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet536": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet544": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet552": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet560": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet568": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet576": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet584": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet592": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet600": { + "default_brkout_mode": "1x800G", + "autoneg": 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"default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet784": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet792": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet800": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet808": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet816": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet824": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet832": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet840": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet848": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet856": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet864": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet872": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet880": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet888": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet896": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet904": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet912": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet920": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet928": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet936": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet944": { + "default_brkout_mode": "1x800G", + "autoneg": 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"default_brkout_mode": "1x1G", + "autoneg": "off", + "fec": "none" + } + } +} \ No newline at end of file diff --git a/device/micas/x86_64-micas_m2-w6950-128oc-r0/M2-W6950-O128-LPO-N/media_settings.json b/device/micas/x86_64-micas_m2-w6950-128oc-r0/M2-W6950-O128-LPO-N/media_settings.json new file mode 100644 index 00000000000..267b5d2f3da --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6950-128oc-r0/M2-W6950-O128-LPO-N/media_settings.json @@ -0,0 +1,8196 @@ +{ + "PORT_MEDIA_SETTINGS": { + "1": { + "Default": { + "pre3": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xffffffff" + }, + "pre2": { + "lane0": "0x00000005", + "lane1": "0x00000005", + "lane2": "0x00000005", + "lane3": "0x00000005", + "lane4": "0x00000005", + "lane5": "0x00000005", + "lane6": "0x00000005", + "lane7": "0x00000005" + }, + "pre1": { + "lane0": "0xfffffff4", + "lane1": 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"lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + } + } + }, + "126": { + "Default": { + "pre3": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xffffffff" + }, + "pre2": { + "lane0": "0x00000005", + "lane1": "0x00000005", + "lane2": "0x00000005", + "lane3": "0x00000005", + "lane4": "0x00000005", + "lane5": "0x00000005", + "lane6": "0x00000005", + "lane7": "0x00000005" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x00000054", + "lane1": "0x00000054", + "lane2": "0x00000054", + "lane3": "0x00000054", + "lane4": "0x00000054", + "lane5": "0x00000054", + "lane6": "0x00000054", + "lane7": "0x00000054" + }, + "post1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "post2": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + } + } + }, + "127": { + "Default": { + "pre3": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xffffffff" + }, + "pre2": { + "lane0": "0x00000005", + "lane1": "0x00000005", + "lane2": "0x00000005", + "lane3": "0x00000005", + "lane4": "0x00000005", + "lane5": "0x00000005", + "lane6": "0x00000005", + "lane7": "0x00000005" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x00000054", + "lane1": "0x00000054", + "lane2": "0x00000054", + "lane3": "0x00000054", + "lane4": "0x00000054", + "lane5": "0x00000054", + "lane6": "0x00000054", + "lane7": "0x00000054" + }, + "post1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "post2": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + } + } + }, + "128": { + "Default": { + "pre3": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xffffffff" + }, + "pre2": { + "lane0": "0x00000005", + "lane1": "0x00000005", + "lane2": "0x00000005", + "lane3": "0x00000005", + "lane4": "0x00000005", + "lane5": "0x00000005", + "lane6": "0x00000005", + "lane7": "0x00000005" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x00000054", + "lane1": "0x00000054", + "lane2": "0x00000054", + "lane3": "0x00000054", + "lane4": "0x00000054", + "lane5": "0x00000054", + "lane6": "0x00000054", + "lane7": "0x00000054" + }, + "post1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "post2": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + } + } + } + } +} \ No newline at end of file diff --git a/device/micas/x86_64-micas_m2-w6950-128oc-r0/M2-W6950-O128-LPO-N/port_config.ini b/device/micas/x86_64-micas_m2-w6950-128oc-r0/M2-W6950-O128-LPO-N/port_config.ini new file mode 100644 index 00000000000..6b950df1d23 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6950-128oc-r0/M2-W6950-O128-LPO-N/port_config.ini @@ -0,0 +1,131 @@ +# name lanes alias index speed +Ethernet0 265,266,267,268,269,270,271,272 etp1 1 800000 +Ethernet8 297,298,299,300,301,302,303,304 etp2 2 800000 +Ethernet16 305,306,307,308,309,310,311,312 etp3 3 800000 +Ethernet24 313,314,315,316,317,318,319,320 etp4 4 800000 +Ethernet32 377,378,379,380,381,382,383,384 etp5 5 800000 +Ethernet40 369,370,371,372,373,374,375,376 etp6 6 800000 +Ethernet48 361,362,363,364,365,366,367,368 etp7 7 800000 +Ethernet56 329,330,331,332,333,334,335,336 etp8 8 800000 +Ethernet64 505,506,507,508,509,510,511,512 etp9 9 800000 +Ethernet72 497,498,499,500,501,502,503,504 etp10 10 800000 +Ethernet80 489,490,491,492,493,494,495,496 etp11 11 800000 +Ethernet88 457,458,459,460,461,462,463,464 etp12 12 800000 +Ethernet96 449,450,451,452,453,454,455,456 etp13 13 800000 +Ethernet104 465,466,467,468,469,470,471,472 etp14 14 800000 +Ethernet112 481,482,483,484,485,486,487,488 etp15 15 800000 +Ethernet120 473,474,475,476,477,478,479,480 etp16 16 800000 +Ethernet128 537,538,539,540,541,542,543,544 etp17 17 800000 +Ethernet136 545,546,547,548,549,550,551,552 etp18 18 800000 +Ethernet144 529,530,531,532,533,534,535,536 etp19 19 800000 +Ethernet152 513,514,515,516,517,518,519,520 etp20 20 800000 +Ethernet160 521,522,523,524,525,526,527,528 etp21 21 800000 +Ethernet168 553,554,555,556,557,558,559,560 etp22 22 800000 +Ethernet176 561,562,563,564,565,566,567,568 etp23 23 800000 +Ethernet184 569,570,571,572,573,574,575,576 etp24 24 800000 +Ethernet192 649,650,651,652,653,654,655,656 etp25 25 800000 +Ethernet200 681,682,683,684,685,686,687,688 etp26 26 800000 +Ethernet208 689,690,691,692,693,694,695,696 etp27 27 800000 +Ethernet216 697,698,699,700,701,702,703,704 etp28 28 800000 +Ethernet224 761,762,763,764,765,766,767,768 etp29 29 800000 +Ethernet232 753,754,755,756,757,758,759,760 etp30 30 800000 +Ethernet240 713,714,715,716,717,718,719,720 etp31 31 800000 +Ethernet248 745,746,747,748,749,750,751,752 etp32 32 800000 +Ethernet256 33,34,35,36,37,38,39,40 etp33 33 800000 +Ethernet264 1,2,3,4,5,6,7,8 etp34 34 800000 +Ethernet272 41,42,43,44,45,46,47,48 etp35 35 800000 +Ethernet280 57,58,59,60,61,62,63,64 etp36 36 800000 +Ethernet288 121,122,123,124,125,126,127,128 etp37 37 800000 +Ethernet296 105,106,107,108,109,110,111,112 etp38 38 800000 +Ethernet304 65,66,67,68,69,70,71,72 etp39 39 800000 +Ethernet312 97,98,99,100,101,102,103,104 etp40 40 800000 +Ethernet320 153,154,155,156,157,158,159,160 etp41 41 800000 +Ethernet328 145,146,147,148,149,150,151,152 etp42 42 800000 +Ethernet336 321,322,323,324,325,326,327,328 etp43 43 800000 +Ethernet344 353,354,355,356,357,358,359,360 etp44 44 800000 +Ethernet352 409,410,411,412,413,414,415,416 etp45 45 800000 +Ethernet360 401,402,403,404,405,406,407,408 etp46 46 800000 +Ethernet368 393,394,395,396,397,398,399,400 etp47 47 800000 +Ethernet376 433,434,435,436,437,438,439,440 etp48 48 800000 +Ethernet384 585,586,587,588,589,590,591,592 etp49 49 800000 +Ethernet392 625,626,627,628,629,630,631,632 etp50 50 800000 +Ethernet400 601,602,603,604,605,606,607,608 etp51 51 800000 +Ethernet408 593,594,595,596,597,598,599,600 etp52 52 800000 +Ethernet416 641,642,643,644,645,646,647,648 etp53 53 800000 +Ethernet424 673,674,675,676,677,678,679,680 etp54 54 800000 +Ethernet432 857,858,859,860,861,862,863,864 etp55 55 800000 +Ethernet440 849,850,851,852,853,854,855,856 etp56 56 800000 +Ethernet448 897,898,899,900,901,902,903,904 etp57 57 800000 +Ethernet456 929,930,931,932,933,934,935,936 etp58 58 800000 +Ethernet464 953,954,955,956,957,958,959,960 etp59 59 800000 +Ethernet472 937,938,939,940,941,942,943,944 etp60 60 800000 +Ethernet480 1001,1002,1003,1004,1005,1006,1007,1008 etp61 61 800000 +Ethernet488 1017,1018,1019,1020,1021,1022,1023,1024 etp62 62 800000 +Ethernet496 993,994,995,996,997,998,999,1000 etp63 63 800000 +Ethernet504 961,962,963,964,965,966,967,968 etp64 64 800000 +Ethernet512 17,18,19,20,21,22,23,24 etp65 65 800000 +Ethernet520 25,26,27,28,29,30,31,32 etp66 66 800000 +Ethernet528 49,50,51,52,53,54,55,56 etp67 67 800000 +Ethernet536 9,10,11,12,13,14,15,16 etp68 68 800000 +Ethernet544 73,74,75,76,77,78,79,80 etp69 69 800000 +Ethernet552 113,114,115,116,117,118,119,120 etp70 70 800000 +Ethernet560 89,90,91,92,93,94,95,96 etp71 71 800000 +Ethernet568 81,82,83,84,85,86,87,88 etp72 72 800000 +Ethernet576 129,130,131,132,133,134,135,136 etp73 73 800000 +Ethernet584 161,162,163,164,165,166,167,168 etp74 74 800000 +Ethernet592 345,346,347,348,349,350,351,352 etp75 75 800000 +Ethernet600 337,338,339,340,341,342,343,344 etp76 76 800000 +Ethernet608 385,386,387,388,389,390,391,392 etp77 77 800000 +Ethernet616 417,418,419,420,421,422,423,424 etp78 78 800000 +Ethernet624 441,442,443,444,445,446,447,448 etp79 79 800000 +Ethernet632 425,426,427,428,429,430,431,432 etp80 80 800000 +Ethernet640 633,634,635,636,637,638,639,640 etp81 81 800000 +Ethernet648 617,618,619,620,621,622,623,624 etp82 82 800000 +Ethernet656 577,578,579,580,581,582,583,584 etp83 83 800000 +Ethernet664 609,610,611,612,613,614,615,616 etp84 84 800000 +Ethernet672 665,666,667,668,669,670,671,672 etp85 85 800000 +Ethernet680 657,658,659,660,661,662,663,664 etp86 86 800000 +Ethernet688 833,834,835,836,837,838,839,840 etp87 87 800000 +Ethernet696 865,866,867,868,869,870,871,872 etp88 88 800000 +Ethernet704 921,922,923,924,925,926,927,928 etp89 89 800000 +Ethernet712 913,914,915,916,917,918,919,920 etp90 90 800000 +Ethernet720 905,906,907,908,909,910,911,912 etp91 91 800000 +Ethernet728 945,946,947,948,949,950,951,952 etp92 92 800000 +Ethernet736 1009,1010,1011,1012,1013,1014,1015,1016 etp93 93 800000 +Ethernet744 969,970,971,972,973,974,975,976 etp94 94 800000 +Ethernet752 977,978,979,980,981,982,983,984 etp95 95 800000 +Ethernet760 985,986,987,988,989,990,991,992 etp96 96 800000 +Ethernet768 209,210,211,212,213,214,215,216 etp97 97 800000 +Ethernet776 193,194,195,196,197,198,199,200 etp98 98 800000 +Ethernet784 225,226,227,228,229,230,231,232 etp99 99 800000 +Ethernet792 217,218,219,220,221,222,223,224 etp100 100 800000 +Ethernet800 281,282,283,284,285,286,287,288 etp101 101 800000 +Ethernet808 289,290,291,292,293,294,295,296 etp102 102 800000 +Ethernet816 257,258,259,260,261,262,263,264 etp103 103 800000 +Ethernet824 273,274,275,276,277,278,279,280 etp104 104 800000 +Ethernet832 201,202,203,204,205,206,207,208 etp105 105 800000 +Ethernet840 233,234,235,236,237,238,239,240 etp106 106 800000 +Ethernet848 241,242,243,244,245,246,247,248 etp107 107 800000 +Ethernet856 249,250,251,252,253,254,255,256 etp108 108 800000 +Ethernet864 185,186,187,188,189,190,191,192 etp109 109 800000 +Ethernet872 177,178,179,180,181,182,183,184 etp110 110 800000 +Ethernet880 169,170,171,172,173,174,175,176 etp111 111 800000 +Ethernet888 137,138,139,140,141,142,143,144 etp112 112 800000 +Ethernet896 841,842,843,844,845,846,847,848 etp113 113 800000 +Ethernet904 873,874,875,876,877,878,879,880 etp114 114 800000 +Ethernet912 881,882,883,884,885,886,887,888 etp115 115 800000 +Ethernet920 889,890,891,892,893,894,895,896 etp116 116 800000 +Ethernet928 825,826,827,828,829,830,831,832 etp117 117 800000 +Ethernet936 817,818,819,820,821,822,823,824 etp118 118 800000 +Ethernet944 809,810,811,812,813,814,815,816 etp119 119 800000 +Ethernet952 777,778,779,780,781,782,783,784 etp120 120 800000 +Ethernet960 721,722,723,724,725,726,727,728 etp121 121 800000 +Ethernet968 705,706,707,708,709,710,711,712 etp122 122 800000 +Ethernet976 737,738,739,740,741,742,743,744 etp123 123 800000 +Ethernet984 729,730,731,732,733,734,735,736 etp124 124 800000 +Ethernet992 793,794,795,796,797,798,799,800 etp125 125 800000 +Ethernet1000 801,802,803,804,805,806,807,808 etp126 126 800000 +Ethernet1008 785,786,787,788,789,790,791,792 etp127 127 800000 +Ethernet1016 769,770,771,772,773,774,775,776 etp128 128 800000 +Ethernet1024 1026,1027,1028,1029 etp129 129 100000 +Ethernet1025 0 etp130 130 1000 \ No newline at end of file diff --git a/device/micas/x86_64-micas_m2-w6950-128oc-r0/M2-W6950-O128-LPO-N/sai.profile b/device/micas/x86_64-micas_m2-w6950-128oc-r0/M2-W6950-O128-LPO-N/sai.profile new file mode 100644 index 00000000000..1f8c5eff688 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6950-128oc-r0/M2-W6950-O128-LPO-N/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th6-m2-w6950-o128-lpo-n-128x800G.config.yml diff --git a/device/micas/x86_64-micas_m2-w6950-128oc-r0/M2-W6950-O128-LPO-N/sap_bcm_81394.cfg b/device/micas/x86_64-micas_m2-w6950-128oc-r0/M2-W6950-O128-LPO-N/sap_bcm_81394.cfg new file mode 100644 index 00000000000..c8b29b322cc --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6950-128oc-r0/M2-W6950-O128-LPO-N/sap_bcm_81394.cfg @@ -0,0 +1,246 @@ +# Configuration file version number. +# The current sap_bcm_81394.c does not read this field; it is compatibility/identification information. +# Modifying it will not affect the initialization process of the 81394 driver. +version=1 + +# ==================== +# Global Initialization Parameters +# ==================== + +# Number of slots on the board. +# sap_aperta_config_init() first reads this value into the global g_slot_num, +# then sap_bcm_platform_init() calls sap_slot_init() for 0 to g_slot_num-1. +# Missing this field will cause configuration initialization to fail directly. +plp_slot_num=1 + +# MDIO access type. The ':1' in the key is not a PHY address, but the mdio_id. +# The code first reads plp_phy_mdio_id:0x30=1, then looks up plp_mdio_accs_type:1. +# The value comes from sap_mdio_type_e: +# 0 = MAC +# 1 = SYSFS +# 2 = SYSFS_CUST +# The current value 2 indicates using the custom sysfs MDIO access path. +plp_mdio_accs_type:1=2 + +# Firmware loading method, saved to the global g_fw_load_method. +# The definitions in the 81394 driver are: +# 0 = Do not load +# 1 = Unicast load +# 2 = Broadcast load +# 3 = EEPROM load +# 4 = upgrade path +# 5 = skip +# 6 = full process +# The current value 1 means downloading firmware to each PHY via unicast. +plp_fw_load_method=1 + +# Enable or disable I2C slave. +# The code reads this into g_i2c_slave_en, but in the current main flow of the 81394, +# the corresponding register write logic is completely commented out. +# Therefore, this value is currently a "parsed but not effective by default" field. +plp_i2c_slave_en=0 + +# AVS I2C response address. +# This is also read into g_avs_i2c_resp_addr and used by sap_bcm_avs_init() to assemble register values. +# However, AVS initialization is not actually enabled in the current boot path, so this is just a reserved configuration. +avs_i2c_resp_addr=0x35 + +# Default enable/disable link training for the port's system side. +# If there is no per-port configuration for init_linktrain_sys, each port inherits this global value. +# In sap_aperta_post_port_init(), it calls sap_bcm_linktraining_set(..., true) only if the value is 1. +# 0 means do not automatically enable LT. +plp_port_linktrain_sys=0 + +# Default enable/disable link training for the port's line side. +# The semantics are the same as plp_port_linktrain_sys, applying to the line side. +plp_port_linktrain_line=0 + +# ==================== +# Profile 1 VCO Presets +# ==================== + +# VCO selection for Profile 1, octal 0, system side. +# The 81394 code forcibly reads this and saves it to phy_info->vco_octal_0_sys. +# Confirmed from public headers: +# 0 = bcmplpVco51G +# 1 = bcmplpVco53G +# The current value 1 means 53G VCO. +# Note: In this version of the 81394 implementation, this value is read but not used further in mode_config_set. +# It seems more like a field retained to share the configuration format with other chips in the family. +plp_profile_1_init_vco_octal_0_sys=1 + +# VCO selection for Profile 1, octal 0, line side. +# The current value 1 = 53G VCO. +plp_profile_1_init_vco_octal_0_line=1 + +# VCO selection for Profile 1, octal 1, system side. +# The current board type uses only one PHY at address 0x30 and the profile uses lanes=0,1, +# but the code still requires the VCO for octal 1 to be configured, otherwise configuration parsing fails. +plp_profile_1_init_vco_octal_1_sys=1 + +# VCO selection for Profile 1, octal 1, line side. +# The current value 1 = 53G VCO. +plp_profile_1_init_vco_octal_1_line=1 + +# ==================== +# Profile 1: 100G, split=1, Single port with 4 lanes +# Key format: plp_profile__speed__split_.: +# This is changed to a single 100G port, hence split_num=1, port_id=0. +# +# In the 81394 code, split_num is not hardcoded, but calculated by: +# phy_info->lane_num / port_info->lanes +# Therefore, to target split_1.0, the init_lanes below needs to provide 4 lane entries, +# and init_ports_lane_num must be configured as 4, indicating a 4-lane aggregated port. +# ==================== + +# FEC mode for the line side. +# For the 100G 4x25G scenario, the semantics from the original file are retained, where 3 = RSFEC. +# This still uses the 25.78125G/lane NRZ path, not 2x50G PAM4. +plp_profile_1_speed_100000_split_1.0:fec_line=3 + +# FEC mode for the system side. +# Consistent with the line side, configured as 3 = RSFEC. +plp_profile_1_speed_100000_split_1.0:fec_sys=3 + +# Interface type for the line side. +# In bcm_pm_interface_t, 7 = bcm_pm_InterfaceKR4. +# This is changed from the single-lane KR to 4-lane KR4, matching the 100G 4-lane port form factor. +plp_profile_1_speed_100000_split_1.0:iftype_line=7 + +# Interface type for the system side. +# Also changed to 7 = KR4, maintaining the lane count and interface width consistency between system/line sides. +plp_profile_1_speed_100000_split_1.0:iftype_sys=7 + +# Line side lane bitmask. +# 0xF = 0000 1111b, indicating selection of 4 consecutive lanes. +# With speed=100000, the code calculates the per-lane speed as 25.78125G. +plp_profile_1_speed_100000_split_1.0:lanemap_line=0xF + +# System side lane bitmask. +# Same as the line side, indicating a 4-lane passthrough port, not a gearbox/reverse-gearbox. +plp_profile_1_speed_100000_split_1.0:lanemap_sys=0xF + +# Force NR (No Retimer) bitmap for the system side. +# Currently not forced, keep as 0. +plp_profile_1_speed_100000_split_1.0:force_nr_sys=0x0 + +# Force NR (No Retimer) bitmap for the line side. +# Currently not forced, keep as 0. +plp_profile_1_speed_100000_split_1.0:force_nr_line=0x0 + +# Force ER (Eye Retimer) bitmap for the system side. +# Currently not forced, keep as 0. +plp_profile_1_speed_100000_split_1.0:force_er_sys=0x0 + +# Force ER (Eye Retimer) bitmap for the line side. +# Currently not forced, keep as 0. +plp_profile_1_speed_100000_split_1.0:force_er_line=0x0 + + +# ==================== +# PHY List +# ==================== + +# List of PHY addresses to initialize. +# sap_aperta_config_init() generates g_bcm_phy_infos based on this array. +# Currently, there is only one PHY at address 0x30. +plp_phy_addrs=0x30 + +# ==================== +# PHY 0x30 Base Attributes +# PHY address resolution method: +# bus_id = (phy_addr & 0x7c00)>>10; +# mdio_index = (phy_addr & 0x3e0)>>5; +# phy_addr = phy_addr & 0x1f; +# return dfd_utest_mdiodev_rd(mdio_index+bus_id, phy_addr, reg_addr, data); +# ==================== + +# The unit to which the PHY is bound. +# sap_slot_init() filters by unit and card_id to determine if this PHY should be initialized in the current round. +plp_phy_unit_id:0x30=0 + +# The card/slot number the PHY belongs to. +# The PHY is initialized only when this matches the outer slot_id. +plp_phy_card_id:0x30=0 + +# The mdio_id used by this PHY. +# The code will then use this mdio_id to look up plp_mdio_accs_type:. +plp_phy_mdio_id:0x30=1 + +# PHY chip name. +# For this version of the 81394 code, this is a compatibility field, as the chip_name is hardcoded to "aperta" in the source. +# Modifying it will not change the chip name used by the driver. +plp_phy_chip_name:0x30=aperta + +# MACsec option. +# The current 81394 file only reads and saves this to phy_info->macsec_option, with no subsequent use observed. +# Therefore, this is more of a reserved field. +plp_phy_macsec_option:0x30=0x0 + +# PTP option. +# Similar to macsec_option, currently only parsed and saved, not consumed in the main 81394 flow. +plp_phy_ptp_option:0x30=0x0 + +# The initialization profile ID used by this PHY. +# The '1' in all subsequent plp_profile_1_* key names is determined by this value. +plp_phy_init_profile_id:0x30=1 + +# The lane list for this PHY under Profile 1. +# This is changed to 0,1,2,3. This does not mean 4 independent logical ports, +# but rather to make phy_info->lane_num = 4, causing the code to calculate split_num = 1. +# The number of logical ports actually created is still determined by the next line, init_ports. +plp_profile_1_init_lanes:0x30=0-3 + +# The list of logical port numbers presented externally by this PHY under Profile 1. +# Changed to create only one logical port, port 1, to carry the 1x100G module. +plp_profile_1_init_ports:0x30=1 + +# The number of lanes occupied by each logical port under Profile 1. +# Changed to a single port occupying 4 lanes. +plp_profile_1_init_ports_lane_num:0x30=4 + +# The initial speed of each logical port under Profile 1. +# Changed to 100000 Mbps for a single port, i.e., 100G. +plp_profile_1_init_speed_mode:0x30=100000 + +# ==================== +# PHY 0x30 Global Lane Swap and Polarity Configuration +# These keys apply to the entire PHY, not a single port. +# ==================== + +# System side TX lane mapping. +# This value is parsed as 8 nibbles, lane by lane. +# lane_map_tx[lane_index] = GET_LANE_SWAP_OCTAL(value, lane_index). +# 0x76543210 represents logical 0->0, 1->1, 2->2... 7->7, which is an identity mapping. +plp_phy_tx_lane_map_sys:0x30=0x76543210 + +# System side RX lane mapping. +# Currently also an identity mapping. +plp_phy_rx_lane_map_sys:0x30=0x76543210 + +# Line side TX lane mapping. +# 0x76543120 indicates a lane swap on the line side, no longer a direct passthrough. +# The code calls bcm_plp_rxtx_laneswap_set() in sap_aperta_phy_init() to apply this. +plp_phy_tx_lane_map_line:0x30=0x76542301 + +# Line side RX lane mapping. +# Currently the same as TX, indicating that RX/TX both follow the same line-side swapping rules. +plp_phy_rx_lane_map_line:0x30=0x76542301 + +# Line side TX polarity flip bitmap. +# In sap_aperta_phy_init(), the current polarity is read, XORed with this value, and then written back. +# Therefore, a bit=1 means flip the polarity for the corresponding lane; 0 means leave it unchanged. +# The current 0x0 means no polarity flip on the line side TX. +plp_tx_polarity_flip_line:0x30=0x0 + +# Line side RX polarity flip bitmap. +# The current 0x0 means no polarity flip on the line side RX. +plp_rx_polarity_flip_line:0x30=0xF + +# System side TX polarity flip bitmap. +# The current 0x0 means no polarity flip on the system side TX. +plp_tx_polarity_flip_sys:0x30=0x0 + +# System side RX polarity flip bitmap. +# The current 0x0 means no polarity flip on the system side RX. +plp_rx_polarity_flip_sys:0x30=0x0 \ No newline at end of file diff --git a/device/micas/x86_64-micas_m2-w6950-128oc-r0/M2-W6950-O128-LPO-N/th6-m2-w6950-o128-lpo-n-128x800G.config.yml b/device/micas/x86_64-micas_m2-w6950-128oc-r0/M2-W6950-O128-LPO-N/th6-m2-w6950-o128-lpo-n-128x800G.config.yml new file mode 100644 index 00000000000..232e09bcf8a --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6950-128oc-r0/M2-W6950-O128-LPO-N/th6-m2-w6950-o128-lpo-n-128x800G.config.yml @@ -0,0 +1,2182 @@ +--- +device: + 0: + DEVICE_CONFIG: + AUTOLOAD_BOARD_SETTINGS: 0 +... + +--- +device: + 0: + PC_PM_CORE: + ? + PC_PM_ID: 1 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x12360745 + RX_LANE_MAP: 0x34726150 + TX_POLARITY_FLIP: 0x57 + RX_POLARITY_FLIP: 0xc6 + ? + PC_PM_ID: 2 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x56327140 + RX_LANE_MAP: 0x60317425 + TX_POLARITY_FLIP: 0x99 + RX_POLARITY_FLIP: 0xa6 + ? + PC_PM_ID: 3 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x23145670 + RX_LANE_MAP: 0x57462103 + TX_POLARITY_FLIP: 0x6e + RX_POLARITY_FLIP: 0xe6 + ? + PC_PM_ID: 4 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x45726013 + RX_LANE_MAP: 0x12360475 + TX_POLARITY_FLIP: 0x74 + RX_POLARITY_FLIP: 0x78 + ? + PC_PM_ID: 5 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x17204653 + RX_LANE_MAP: 0x54036127 + TX_POLARITY_FLIP: 0x3f + RX_POLARITY_FLIP: 0x88 + ? + PC_PM_ID: 6 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x14027653 + RX_LANE_MAP: 0x54217036 + TX_POLARITY_FLIP: 0x45 + RX_POLARITY_FLIP: 0xec + ? + PC_PM_ID: 7 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x26351407 + RX_LANE_MAP: 0x52407163 + TX_POLARITY_FLIP: 0x43 + RX_POLARITY_FLIP: 0xef + ? + PC_PM_ID: 8 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x45670321 + RX_LANE_MAP: 0x53274610 + TX_POLARITY_FLIP: 0xad + RX_POLARITY_FLIP: 0x27 + ? + PC_PM_ID: 9 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x21705463 + RX_LANE_MAP: 0x46327105 + TX_POLARITY_FLIP: 0x95 + RX_POLARITY_FLIP: 0xbf + ? + PC_PM_ID: 10 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x12057463 + RX_LANE_MAP: 0x51740236 + TX_POLARITY_FLIP: 0xc8 + RX_POLARITY_FLIP: 0x0a + ? + PC_PM_ID: 11 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x67105243 + RX_LANE_MAP: 0x40236715 + TX_POLARITY_FLIP: 0x10 + RX_POLARITY_FLIP: 0xfa + ? + PC_PM_ID: 12 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x23164507 + RX_LANE_MAP: 0x45712063 + TX_POLARITY_FLIP: 0xd7 + RX_POLARITY_FLIP: 0x4c + ? + PC_PM_ID: 13 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x46570213 + RX_LANE_MAP: 0x71546032 + TX_POLARITY_FLIP: 0x69 + RX_POLARITY_FLIP: 0xae + ? + PC_PM_ID: 14 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x17453206 + RX_LANE_MAP: 0x61257430 + TX_POLARITY_FLIP: 0xaa + RX_POLARITY_FLIP: 0x9b + ? + PC_PM_ID: 15 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x56327041 + RX_LANE_MAP: 0x50361427 + TX_POLARITY_FLIP: 0xe2 + RX_POLARITY_FLIP: 0x7 + ? + PC_PM_ID: 16 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x07324651 + RX_LANE_MAP: 0x57624301 + TX_POLARITY_FLIP: 0x0d + RX_POLARITY_FLIP: 0x5f + ? + PC_PM_ID: 17 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x01374526 + RX_LANE_MAP: 0x64751032 + TX_POLARITY_FLIP: 0x24 + RX_POLARITY_FLIP: 0xe6 + ? + PC_PM_ID: 18 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x13024675 + RX_LANE_MAP: 0x61304275 + TX_POLARITY_FLIP: 0x10 + RX_POLARITY_FLIP: 0x5e + ? + PC_PM_ID: 19 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x16452307 + RX_LANE_MAP: 0x50346721 + TX_POLARITY_FLIP: 0xc5 + RX_POLARITY_FLIP: 0x47 + ? + PC_PM_ID: 20 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x32604571 + RX_LANE_MAP: 0x67205314 + TX_POLARITY_FLIP: 0x53 + RX_POLARITY_FLIP: 0x3f + ? + PC_PM_ID: 21 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x46120573 + RX_LANE_MAP: 0x13526407 + TX_POLARITY_FLIP: 0x2e + RX_POLARITY_FLIP: 0x9 + ? + PC_PM_ID: 22 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x20731645 + RX_LANE_MAP: 0x30412657 + TX_POLARITY_FLIP: 0xa0 + RX_POLARITY_FLIP: 0xfb + ? + PC_PM_ID: 23 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x13207465 + RX_LANE_MAP: 0x20316475 + TX_POLARITY_FLIP: 0x01 + RX_POLARITY_FLIP: 0xc7 + ? + PC_PM_ID: 24 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x13027654 + RX_LANE_MAP: 0x61305274 + TX_POLARITY_FLIP: 0x90 + RX_POLARITY_FLIP: 0x77 + ? + PC_PM_ID: 25 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x23107465 + RX_LANE_MAP: 0x32107654 + TX_POLARITY_FLIP: 0x62 + RX_POLARITY_FLIP: 0x66 + ? + PC_PM_ID: 26 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x20731645 + RX_LANE_MAP: 0x03612547 + TX_POLARITY_FLIP: 0xed + RX_POLARITY_FLIP: 0x8 + ? + PC_PM_ID: 27 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x13027654 + RX_LANE_MAP: 0x62307145 + TX_POLARITY_FLIP: 0x9d + RX_POLARITY_FLIP: 0x55 + ? + PC_PM_ID: 28 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x31064752 + RX_LANE_MAP: 0x02135764 + TX_POLARITY_FLIP: 0xf5 + RX_POLARITY_FLIP: 0x35 + ? + PC_PM_ID: 29 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x12357064 + RX_LANE_MAP: 0x03216457 + TX_POLARITY_FLIP: 0x81 + RX_POLARITY_FLIP: 0xdc + ? + PC_PM_ID: 30 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x32106745 + RX_LANE_MAP: 0x61034275 + TX_POLARITY_FLIP: 0x11 + RX_POLARITY_FLIP: 0x39 + ? + PC_PM_ID: 31 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x32014756 + RX_LANE_MAP: 0x13024576 + TX_POLARITY_FLIP: 0x20 + RX_POLARITY_FLIP: 0x31 + ? + PC_PM_ID: 32 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x02376154 + RX_LANE_MAP: 0x03612547 + TX_POLARITY_FLIP: 0xd5 + RX_POLARITY_FLIP: 0x10 + ? + PC_PM_ID: 33 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x02137564 + RX_LANE_MAP: 0x02637154 + TX_POLARITY_FLIP: 0xe7 + RX_POLARITY_FLIP: 0xdf + ? + PC_PM_ID: 34 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x01375264 + RX_LANE_MAP: 0x23507164 + TX_POLARITY_FLIP: 0x7f + RX_POLARITY_FLIP: 0xfe + ? + PC_PM_ID: 35 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x02134765 + RX_LANE_MAP: 0x13026745 + TX_POLARITY_FLIP: 0x1b + RX_POLARITY_FLIP: 0x7d + ? + PC_PM_ID: 36 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x23016745 + RX_LANE_MAP: 0x30162745 + TX_POLARITY_FLIP: 0xe6 + RX_POLARITY_FLIP: 0x36 + ? + PC_PM_ID: 37 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x30412675 + RX_LANE_MAP: 0x32051674 + TX_POLARITY_FLIP: 0xa7 + RX_POLARITY_FLIP: 0xe4 + ? + PC_PM_ID: 38 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x20314756 + RX_LANE_MAP: 0x10324576 + TX_POLARITY_FLIP: 0x73 + RX_POLARITY_FLIP: 0x6e + ? + PC_PM_ID: 39 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x20315746 + RX_LANE_MAP: 0x01534267 + TX_POLARITY_FLIP: 0x93 + RX_POLARITY_FLIP: 0xd6 + ? + PC_PM_ID: 40 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x10732546 + RX_LANE_MAP: 0x23507164 + TX_POLARITY_FLIP: 0xdf + RX_POLARITY_FLIP: 0x7e + ? + PC_PM_ID: 41 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x07324651 + RX_LANE_MAP: 0x46357201 + TX_POLARITY_FLIP: 0xdf + RX_POLARITY_FLIP: 0xc5 + ? + PC_PM_ID: 42 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x10324756 + RX_LANE_MAP: 0x10325746 + TX_POLARITY_FLIP: 0xbb + RX_POLARITY_FLIP: 0x11 + ? + PC_PM_ID: 43 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x65073421 + RX_LANE_MAP: 0x53026714 + TX_POLARITY_FLIP: 0x7e + RX_POLARITY_FLIP: 0x3a + ? + PC_PM_ID: 44 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x21057463 + RX_LANE_MAP: 0x47513260 + TX_POLARITY_FLIP: 0x65 + RX_POLARITY_FLIP: 0xf8 + ? + PC_PM_ID: 45 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x47061235 + RX_LANE_MAP: 0x41276530 + TX_POLARITY_FLIP: 0x34 + RX_POLARITY_FLIP: 0x0e + ? + PC_PM_ID: 46 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x02375164 + RX_LANE_MAP: 0x01437265 + TX_POLARITY_FLIP: 0x2b + RX_POLARITY_FLIP: 0x39 + ? + PC_PM_ID: 47 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x01237564 + RX_LANE_MAP: 0x13607254 + TX_POLARITY_FLIP: 0xdb + RX_POLARITY_FLIP: 0xbb + ? + PC_PM_ID: 48 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x02137564 + RX_LANE_MAP: 0x13025476 + TX_POLARITY_FLIP: 0x74 + RX_POLARITY_FLIP: 0x31 + ? + PC_PM_ID: 49 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x70152643 + RX_LANE_MAP: 0x76512043 + TX_POLARITY_FLIP: 0x73 + RX_POLARITY_FLIP: 0xaa + ? + PC_PM_ID: 50 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x04635271 + RX_LANE_MAP: 0x67235014 + TX_POLARITY_FLIP: 0xde + RX_POLARITY_FLIP: 0xda + ? + PC_PM_ID: 51 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x76540213 + RX_LANE_MAP: 0x51376240 + TX_POLARITY_FLIP: 0xf1 + RX_POLARITY_FLIP: 0x3b + ? + PC_PM_ID: 52 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x12375460 + RX_LANE_MAP: 0x54261037 + TX_POLARITY_FLIP: 0xe1 + RX_POLARITY_FLIP: 0xf0 + ? + PC_PM_ID: 53 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x64301572 + RX_LANE_MAP: 0x63107425 + TX_POLARITY_FLIP: 0x5f + RX_POLARITY_FLIP: 0xe8 + ? + PC_PM_ID: 54 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x45213670 + RX_LANE_MAP: 0x41062537 + TX_POLARITY_FLIP: 0xc6 + RX_POLARITY_FLIP: 0xf7 + ? + PC_PM_ID: 55 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x25461073 + RX_LANE_MAP: 0x73215640 + TX_POLARITY_FLIP: 0xec + RX_POLARITY_FLIP: 0xf1 + ? + PC_PM_ID: 56 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x30264571 + RX_LANE_MAP: 0x67452031 + TX_POLARITY_FLIP: 0x38 + RX_POLARITY_FLIP: 0xaa + ? + PC_PM_ID: 57 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x36270154 + RX_LANE_MAP: 0x36270154 + TX_POLARITY_FLIP: 0x89 + RX_POLARITY_FLIP: 0xdc + ? + PC_PM_ID: 58 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x02736154 + RX_LANE_MAP: 0x20341765 + TX_POLARITY_FLIP: 0xe0 + RX_POLARITY_FLIP: 0x80 + ? + PC_PM_ID: 59 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x32105764 + RX_LANE_MAP: 0x23017654 + TX_POLARITY_FLIP: 0xb5 + RX_POLARITY_FLIP: 0x69 + ? + PC_PM_ID: 60 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x63721045 + RX_LANE_MAP: 0x36270154 + TX_POLARITY_FLIP: 0x50 + RX_POLARITY_FLIP: 0xcc + ? + PC_PM_ID: 61 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x02341675 + RX_LANE_MAP: 0x02341675 + TX_POLARITY_FLIP: 0x20 + RX_POLARITY_FLIP: 0x38 + ? + PC_PM_ID: 62 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x23106457 + RX_LANE_MAP: 0x23106754 + TX_POLARITY_FLIP: 0x90 + RX_POLARITY_FLIP: 0xd9 + ? + PC_PM_ID: 63 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x63721045 + RX_LANE_MAP: 0x36170254 + TX_POLARITY_FLIP: 0x46 + RX_POLARITY_FLIP: 0x8c + ? + PC_PM_ID: 64 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x20371645 + RX_LANE_MAP: 0x20341765 + TX_POLARITY_FLIP: 0xd0 + RX_POLARITY_FLIP: 0x80 + ? + PC_PM_ID: 65 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x36270154 + RX_LANE_MAP: 0x63721045 + TX_POLARITY_FLIP: 0x7a + RX_POLARITY_FLIP: 0x13 + ? + PC_PM_ID: 66 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x02736154 + RX_LANE_MAP: 0x02437156 + TX_POLARITY_FLIP: 0x13 + RX_POLARITY_FLIP: 0xbf + ? + PC_PM_ID: 67 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x32105764 + RX_LANE_MAP: 0x32106745 + TX_POLARITY_FLIP: 0x46 + RX_POLARITY_FLIP: 0x69 + ? + PC_PM_ID: 68 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x63721045 + RX_LANE_MAP: 0x63721045 + TX_POLARITY_FLIP: 0xa3 + RX_POLARITY_FLIP: 0x33 + ? + PC_PM_ID: 69 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x02341675 + RX_LANE_MAP: 0x20436157 + TX_POLARITY_FLIP: 0xd3 + RX_POLARITY_FLIP: 0xcb + ? + PC_PM_ID: 70 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x23106457 + RX_LANE_MAP: 0x32017645 + TX_POLARITY_FLIP: 0x63 + RX_POLARITY_FLIP: 0x19 + ? + PC_PM_ID: 71 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x63721045 + RX_LANE_MAP: 0x63712045 + TX_POLARITY_FLIP: 0xb5 + RX_POLARITY_FLIP: 0xb3 + ? + PC_PM_ID: 72 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x20371645 + RX_LANE_MAP: 0x02437156 + TX_POLARITY_FLIP: 0x23 + RX_POLARITY_FLIP: 0xbf + ? + PC_PM_ID: 73 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x13762540 + RX_LANE_MAP: 0x51764320 + TX_POLARITY_FLIP: 0xe0 + RX_POLARITY_FLIP: 0x55 + ? + PC_PM_ID: 74 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x62135470 + RX_LANE_MAP: 0x64025317 + TX_POLARITY_FLIP: 0xa0 + RX_POLARITY_FLIP: 0x15 + ? + PC_PM_ID: 75 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x54761302 + RX_LANE_MAP: 0x50326741 + TX_POLARITY_FLIP: 0x0b + RX_POLARITY_FLIP: 0x81 + ? + PC_PM_ID: 76 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x34075261 + RX_LANE_MAP: 0x57021634 + TX_POLARITY_FLIP: 0x5a + RX_POLARITY_FLIP: 0x0f + ? + PC_PM_ID: 77 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x75201463 + RX_LANE_MAP: 0x70126435 + TX_POLARITY_FLIP: 0xe4 + RX_POLARITY_FLIP: 0x55 + ? + PC_PM_ID: 78 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x67013542 + RX_LANE_MAP: 0x26034517 + TX_POLARITY_FLIP: 0xde + RX_POLARITY_FLIP: 0x80 + ? + PC_PM_ID: 79 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x46257310 + RX_LANE_MAP: 0x70265143 + TX_POLARITY_FLIP: 0x4c + RX_POLARITY_FLIP: 0x0a + ? + PC_PM_ID: 80 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x21354670 + RX_LANE_MAP: 0x45673120 + TX_POLARITY_FLIP: 0xab + RX_POLARITY_FLIP: 0x55 + ? + PC_PM_ID: 81 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x36124750 + RX_LANE_MAP: 0x41237506 + TX_POLARITY_FLIP: 0x80 + RX_POLARITY_FLIP: 0x7b + ? + PC_PM_ID: 82 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x10324756 + RX_LANE_MAP: 0x01237564 + TX_POLARITY_FLIP: 0xbb + RX_POLARITY_FLIP: 0x22 + ? + PC_PM_ID: 83 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x24173560 + RX_LANE_MAP: 0x62015734 + TX_POLARITY_FLIP: 0xc5 + RX_POLARITY_FLIP: 0x0f + ? + PC_PM_ID: 84 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x03247561 + RX_LANE_MAP: 0x51476032 + TX_POLARITY_FLIP: 0xf6 + RX_POLARITY_FLIP: 0x0d + ? + PC_PM_ID: 85 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x06473512 + RX_LANE_MAP: 0x40256731 + TX_POLARITY_FLIP: 0x3e + RX_POLARITY_FLIP: 0xf5 + ? + PC_PM_ID: 86 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x02375164 + RX_LANE_MAP: 0x10342756 + TX_POLARITY_FLIP: 0x2b + RX_POLARITY_FLIP: 0x36 + ? + PC_PM_ID: 87 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x01237564 + RX_LANE_MAP: 0x31062745 + TX_POLARITY_FLIP: 0xdb + RX_POLARITY_FLIP: 0x77 + ? + PC_PM_ID: 88 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x02137564 + RX_LANE_MAP: 0x31204567 + TX_POLARITY_FLIP: 0x74 + RX_POLARITY_FLIP: 0x32 + ? + PC_PM_ID: 89 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x64751302 + RX_LANE_MAP: 0x45173620 + TX_POLARITY_FLIP: 0x24 + RX_POLARITY_FLIP: 0x4 + ? + PC_PM_ID: 90 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x01375264 + RX_LANE_MAP: 0x32051746 + TX_POLARITY_FLIP: 0x7f + RX_POLARITY_FLIP: 0xfd + ? + PC_PM_ID: 91 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x65471302 + RX_LANE_MAP: 0x54762031 + TX_POLARITY_FLIP: 0x1b + RX_POLARITY_FLIP: 0x41 + ? + PC_PM_ID: 92 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x45670123 + RX_LANE_MAP: 0x54726103 + TX_POLARITY_FLIP: 0x64 + RX_POLARITY_FLIP: 0x93 + ? + PC_PM_ID: 93 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x75264130 + RX_LANE_MAP: 0x47615023 + TX_POLARITY_FLIP: 0x25 + RX_POLARITY_FLIP: 0xd8 + ? + PC_PM_ID: 94 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x20314756 + RX_LANE_MAP: 0x10324576 + TX_POLARITY_FLIP: 0x73 + RX_POLARITY_FLIP: 0x6e + ? + PC_PM_ID: 95 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x20315746 + RX_LANE_MAP: 0x10352476 + TX_POLARITY_FLIP: 0x93 + RX_POLARITY_FLIP: 0xe9 + ? + PC_PM_ID: 96 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x10732546 + RX_LANE_MAP: 0x32051746 + TX_POLARITY_FLIP: 0xdf + RX_POLARITY_FLIP: 0xbd + ? + PC_PM_ID: 97 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x65741023 + RX_LANE_MAP: 0x45670123 + TX_POLARITY_FLIP: 0x76 + RX_POLARITY_FLIP: 0x99 + ? + PC_PM_ID: 98 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x45167320 + RX_LANE_MAP: 0x74521630 + TX_POLARITY_FLIP: 0x84 + RX_POLARITY_FLIP: 0xef + ? + PC_PM_ID: 99 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x54760213 + RX_LANE_MAP: 0x45713062 + TX_POLARITY_FLIP: 0x89 + RX_POLARITY_FLIP: 0xaa + ? + PC_PM_ID: 100 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x52470631 + RX_LANE_MAP: 0x46753120 + TX_POLARITY_FLIP: 0xa0 + RX_POLARITY_FLIP: 0x53 + ? + PC_PM_ID: 101 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x64703512 + RX_LANE_MAP: 0x75461230 + TX_POLARITY_FLIP: 0xbd + RX_POLARITY_FLIP: 0xc4 + ? + PC_PM_ID: 102 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x45671032 + RX_LANE_MAP: 0x57243016 + TX_POLARITY_FLIP: 0xbb + RX_POLARITY_FLIP: 0x63 + ? + PC_PM_ID: 103 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x56470132 + RX_LANE_MAP: 0x67542031 + TX_POLARITY_FLIP: 0xf7 + RX_POLARITY_FLIP: 0x73 + ? + PC_PM_ID: 104 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x54613702 + RX_LANE_MAP: 0x74521630 + TX_POLARITY_FLIP: 0xa8 + RX_POLARITY_FLIP: 0xf7 + ? + PC_PM_ID: 105 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x36054721 + RX_LANE_MAP: 0x75643210 + TX_POLARITY_FLIP: 0xb7 + RX_POLARITY_FLIP: 0x46 + ? + PC_PM_ID: 106 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x75642031 + RX_LANE_MAP: 0x57240316 + TX_POLARITY_FLIP: 0xf7 + RX_POLARITY_FLIP: 0x85 + ? + PC_PM_ID: 107 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x45160723 + RX_LANE_MAP: 0x51376420 + TX_POLARITY_FLIP: 0xca + RX_POLARITY_FLIP: 0xbc + ? + PC_PM_ID: 108 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x65104273 + RX_LANE_MAP: 0x64325017 + TX_POLARITY_FLIP: 0xc9 + RX_POLARITY_FLIP: 0xe4 + ? + PC_PM_ID: 109 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x75320641 + RX_LANE_MAP: 0x62501437 + TX_POLARITY_FLIP: 0xd1 + RX_POLARITY_FLIP: 0x7e + ? + PC_PM_ID: 110 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x45167320 + RX_LANE_MAP: 0x75621403 + TX_POLARITY_FLIP: 0xf5 + RX_POLARITY_FLIP: 0x20 + ? + PC_PM_ID: 111 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x65742013 + RX_LANE_MAP: 0x57461302 + TX_POLARITY_FLIP: 0xbf + RX_POLARITY_FLIP: 0x1c + ? + PC_PM_ID: 112 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x54760213 + RX_LANE_MAP: 0x47250316 + TX_POLARITY_FLIP: 0xf9 + RX_POLARITY_FLIP: 0x11 + ? + PC_PM_ID: 113 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x74305162 + RX_LANE_MAP: 0x75014236 + TX_POLARITY_FLIP: 0x8e + RX_POLARITY_FLIP: 0xfe + ? + PC_PM_ID: 114 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x03147562 + RX_LANE_MAP: 0x74513602 + TX_POLARITY_FLIP: 0x0e + RX_POLARITY_FLIP: 0xf5 + ? + PC_PM_ID: 115 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x42305761 + RX_LANE_MAP: 0x63214705 + TX_POLARITY_FLIP: 0x08 + RX_POLARITY_FLIP: 0x5 + ? + PC_PM_ID: 116 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x17254603 + RX_LANE_MAP: 0x71456320 + TX_POLARITY_FLIP: 0x50 + RX_POLARITY_FLIP: 0xec + ? + PC_PM_ID: 117 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x57461302 + RX_LANE_MAP: 0x72506431 + TX_POLARITY_FLIP: 0x69 + RX_POLARITY_FLIP: 0x55 + ? + PC_PM_ID: 118 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x45170632 + RX_LANE_MAP: 0x60247531 + TX_POLARITY_FLIP: 0x55 + RX_POLARITY_FLIP: 0x21 + ? + PC_PM_ID: 119 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x40127653 + RX_LANE_MAP: 0x16325407 + TX_POLARITY_FLIP: 0x9f + RX_POLARITY_FLIP: 0xea + ? + PC_PM_ID: 120 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x36124750 + RX_LANE_MAP: 0x41035267 + TX_POLARITY_FLIP: 0x97 + RX_POLARITY_FLIP: 0xf5 + ? + PC_PM_ID: 121 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x36124507 + RX_LANE_MAP: 0x30716254 + TX_POLARITY_FLIP: 0xa2 + RX_POLARITY_FLIP: 0x7c + ? + PC_PM_ID: 122 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x41027653 + RX_LANE_MAP: 0x71326405 + TX_POLARITY_FLIP: 0x22 + RX_POLARITY_FLIP: 0xc3 + ? + PC_PM_ID: 123 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x10265473 + RX_LANE_MAP: 0x46570321 + TX_POLARITY_FLIP: 0xbc + RX_POLARITY_FLIP: 0x46 + ? + PC_PM_ID: 124 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x10327546 + RX_LANE_MAP: 0x06371425 + TX_POLARITY_FLIP: 0x44 + RX_POLARITY_FLIP: 0x1d + ? + PC_PM_ID: 125 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x26304751 + RX_LANE_MAP: 0x67215304 + TX_POLARITY_FLIP: 0x05 + RX_POLARITY_FLIP: 0x88 + ? + PC_PM_ID: 126 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x06327451 + RX_LANE_MAP: 0x76305124 + TX_POLARITY_FLIP: 0x9b + RX_POLARITY_FLIP: 0x9b + ? + PC_PM_ID: 127 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x37241506 + RX_LANE_MAP: 0x40526371 + TX_POLARITY_FLIP: 0x64 + RX_POLARITY_FLIP: 0x40 + ? + PC_PM_ID: 128 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x67452103 + RX_LANE_MAP: 0x50264713 + TX_POLARITY_FLIP: 0x58 + RX_POLARITY_FLIP: 0x9d + ? + PC_PM_ID: 129 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x0123 + RX_LANE_MAP: 0x0123 + TX_POLARITY_FLIP: 0x0 + RX_POLARITY_FLIP: 0x0 +... + +--- +device: + 0: + PC_PORT_PHYS_MAP: + ? + # CPU port + PORT_ID: 0 + : + PC_PHYS_PORT_ID: 0 + ? + PORT_ID: 13 + : + PC_PHYS_PORT_ID: 1 + ? + PORT_ID: 105 + : + PC_PHYS_PORT_ID: 185 + ? + PORT_ID: 120 + : + PC_PHYS_PORT_ID: 193 + ? + PORT_ID: 121 + : + PC_PHYS_PORT_ID: 201 + ? + PORT_ID: 122 + : + PC_PHYS_PORT_ID: 209 + ? + PORT_ID: 123 + : + PC_PHYS_PORT_ID: 217 + ? + PORT_ID: 138 + : + PC_PHYS_PORT_ID: 225 + ? + PORT_ID: 16 + : + PC_PHYS_PORT_ID: 25 + ? + PORT_ID: 139 + : + PC_PHYS_PORT_ID: 233 + ? + PORT_ID: 140 + : + PC_PHYS_PORT_ID: 241 + ? + PORT_ID: 141 + : + PC_PHYS_PORT_ID: 249 + ? + PORT_ID: 156 + : + PC_PHYS_PORT_ID: 257 + ? + PORT_ID: 157 + : + PC_PHYS_PORT_ID: 265 + ? + PORT_ID: 158 + : + PC_PHYS_PORT_ID: 273 + ? + PORT_ID: 159 + : + PC_PHYS_PORT_ID: 281 + ? + PORT_ID: 174 + : + PC_PHYS_PORT_ID: 289 + ? + PORT_ID: 175 + : + PC_PHYS_PORT_ID: 297 + ? + PORT_ID: 176 + : + PC_PHYS_PORT_ID: 305 + ? + PORT_ID: 177 + : + PC_PHYS_PORT_ID: 313 + ? + PORT_ID: 30 + : + PC_PHYS_PORT_ID: 33 + ? + PORT_ID: 192 + : + PC_PHYS_PORT_ID: 321 + ? + PORT_ID: 193 + : + PC_PHYS_PORT_ID: 329 + ? + PORT_ID: 194 + : + PC_PHYS_PORT_ID: 337 + ? + PORT_ID: 195 + : + PC_PHYS_PORT_ID: 345 + ? + PORT_ID: 210 + : + PC_PHYS_PORT_ID: 353 + ? + PORT_ID: 211 + : + PC_PHYS_PORT_ID: 361 + ? + PORT_ID: 212 + : + PC_PHYS_PORT_ID: 369 + ? + PORT_ID: 213 + : + PC_PHYS_PORT_ID: 377 + ? + PORT_ID: 228 + : + PC_PHYS_PORT_ID: 385 + ? + PORT_ID: 31 + : + PC_PHYS_PORT_ID: 41 + ? + PORT_ID: 229 + : + PC_PHYS_PORT_ID: 393 + ? + PORT_ID: 230 + : + PC_PHYS_PORT_ID: 401 + ? + PORT_ID: 231 + : + PC_PHYS_PORT_ID: 409 + ? + PORT_ID: 246 + : + PC_PHYS_PORT_ID: 417 + ? + PORT_ID: 247 + : + PC_PHYS_PORT_ID: 425 + ? + PORT_ID: 248 + : + PC_PHYS_PORT_ID: 433 + ? + PORT_ID: 249 + : + PC_PHYS_PORT_ID: 441 + ? + PORT_ID: 264 + : + PC_PHYS_PORT_ID: 449 + ? + PORT_ID: 265 + : + PC_PHYS_PORT_ID: 457 + ? + PORT_ID: 32 + : + PC_PHYS_PORT_ID: 49 + ? + PORT_ID: 266 + : + PC_PHYS_PORT_ID: 465 + ? + PORT_ID: 267 + : + PC_PHYS_PORT_ID: 473 + ? + PORT_ID: 282 + : + PC_PHYS_PORT_ID: 481 + ? + PORT_ID: 283 + : + PC_PHYS_PORT_ID: 489 + ? + PORT_ID: 284 + : + PC_PHYS_PORT_ID: 497 + ? + PORT_ID: 285 + : + PC_PHYS_PORT_ID: 505 + ? + PORT_ID: 300 + : + PC_PHYS_PORT_ID: 513 + ? + PORT_ID: 301 + : + PC_PHYS_PORT_ID: 521 + ? + PORT_ID: 302 + : + PC_PHYS_PORT_ID: 529 + ? + PORT_ID: 33 + : + PC_PHYS_PORT_ID: 57 + ? + PORT_ID: 303 + : + PC_PHYS_PORT_ID: 537 + ? + PORT_ID: 318 + : + PC_PHYS_PORT_ID: 545 + ? + PORT_ID: 319 + : + PC_PHYS_PORT_ID: 553 + ? + PORT_ID: 320 + : + PC_PHYS_PORT_ID: 561 + ? + PORT_ID: 321 + : + PC_PHYS_PORT_ID: 569 + ? + PORT_ID: 336 + : + PC_PHYS_PORT_ID: 577 + ? + PORT_ID: 337 + : + PC_PHYS_PORT_ID: 585 + ? + PORT_ID: 338 + : + PC_PHYS_PORT_ID: 593 + ? + PORT_ID: 339 + : + PC_PHYS_PORT_ID: 601 + ? + PORT_ID: 354 + : + PC_PHYS_PORT_ID: 609 + ? + PORT_ID: 355 + : + PC_PHYS_PORT_ID: 617 + ? + PORT_ID: 356 + : + PC_PHYS_PORT_ID: 625 + ? + PORT_ID: 357 + : + PC_PHYS_PORT_ID: 633 + ? + PORT_ID: 48 + : + PC_PHYS_PORT_ID: 65 + ? + PORT_ID: 372 + : + PC_PHYS_PORT_ID: 641 + ? + PORT_ID: 373 + : + PC_PHYS_PORT_ID: 649 + ? + PORT_ID: 374 + : + PC_PHYS_PORT_ID: 657 + ? + PORT_ID: 375 + : + PC_PHYS_PORT_ID: 665 + ? + PORT_ID: 390 + : + PC_PHYS_PORT_ID: 673 + ? + PORT_ID: 391 + : + PC_PHYS_PORT_ID: 681 + ? + PORT_ID: 392 + : + PC_PHYS_PORT_ID: 689 + ? + PORT_ID: 393 + : + PC_PHYS_PORT_ID: 697 + ? + PORT_ID: 408 + : + PC_PHYS_PORT_ID: 705 + ? + PORT_ID: 49 + : + PC_PHYS_PORT_ID: 73 + ? + PORT_ID: 409 + : + PC_PHYS_PORT_ID: 713 + ? + PORT_ID: 410 + : + PC_PHYS_PORT_ID: 721 + ? + PORT_ID: 411 + : + PC_PHYS_PORT_ID: 729 + ? + PORT_ID: 426 + : + PC_PHYS_PORT_ID: 737 + ? + PORT_ID: 427 + : + PC_PHYS_PORT_ID: 745 + ? + PORT_ID: 428 + : + PC_PHYS_PORT_ID: 753 + ? + PORT_ID: 429 + : + PC_PHYS_PORT_ID: 761 + ? + PORT_ID: 444 + : + PC_PHYS_PORT_ID: 769 + ? + PORT_ID: 445 + : + PC_PHYS_PORT_ID: 777 + ? + PORT_ID: 50 + : + PC_PHYS_PORT_ID: 81 + ? + PORT_ID: 446 + : + PC_PHYS_PORT_ID: 785 + ? + PORT_ID: 447 + : + PC_PHYS_PORT_ID: 793 + ? + PORT_ID: 462 + : + PC_PHYS_PORT_ID: 801 + ? + PORT_ID: 463 + : + PC_PHYS_PORT_ID: 809 + ? + PORT_ID: 464 + : + PC_PHYS_PORT_ID: 817 + ? + PORT_ID: 465 + : + PC_PHYS_PORT_ID: 825 + ? + PORT_ID: 480 + : + PC_PHYS_PORT_ID: 833 + ? + PORT_ID: 481 + : + PC_PHYS_PORT_ID: 841 + ? + PORT_ID: 482 + : + PC_PHYS_PORT_ID: 849 + ? + PORT_ID: 51 + : + PC_PHYS_PORT_ID: 89 + ? + PORT_ID: 483 + : + PC_PHYS_PORT_ID: 857 + ? + PORT_ID: 498 + : + PC_PHYS_PORT_ID: 865 + ? + PORT_ID: 499 + : + PC_PHYS_PORT_ID: 873 + ? + PORT_ID: 500 + : + PC_PHYS_PORT_ID: 881 + ? + PORT_ID: 501 + : + PC_PHYS_PORT_ID: 889 + ? + PORT_ID: 14 + : + PC_PHYS_PORT_ID: 9 + ? + PORT_ID: 516 + : + PC_PHYS_PORT_ID: 897 + ? + PORT_ID: 517 + : + PC_PHYS_PORT_ID: 905 + ? + PORT_ID: 518 + : + PC_PHYS_PORT_ID: 913 + ? + PORT_ID: 519 + : + PC_PHYS_PORT_ID: 921 + ? + PORT_ID: 534 + : + PC_PHYS_PORT_ID: 929 + ? + PORT_ID: 535 + : + PC_PHYS_PORT_ID: 937 + ? + PORT_ID: 536 + : + PC_PHYS_PORT_ID: 945 + ? + PORT_ID: 537 + : + PC_PHYS_PORT_ID: 953 + ? + PORT_ID: 66 + : + PC_PHYS_PORT_ID: 97 + ? + PORT_ID: 552 + : + PC_PHYS_PORT_ID: 961 + ? + PORT_ID: 553 + : + PC_PHYS_PORT_ID: 969 + ? + PORT_ID: 554 + : + PC_PHYS_PORT_ID: 977 + ? + PORT_ID: 555 + : + PC_PHYS_PORT_ID: 985 + ? + PORT_ID: 570 + : + PC_PHYS_PORT_ID: 993 + ? + PORT_ID: 571 + : + PC_PHYS_PORT_ID: 1001 + ? + PORT_ID: 572 + : + PC_PHYS_PORT_ID: 1009 + ? + PORT_ID: 573 + : + PC_PHYS_PORT_ID: 1017 + ? + PORT_ID: 67 + : + PC_PHYS_PORT_ID: 105 + ? + PORT_ID: 68 + : + PC_PHYS_PORT_ID: 113 + ? + PORT_ID: 69 + : + PC_PHYS_PORT_ID: 121 + ? + PORT_ID: 84 + : + PC_PHYS_PORT_ID: 129 + ? + PORT_ID: 85 + : + PC_PHYS_PORT_ID: 137 + ? + PORT_ID: 86 + : + PC_PHYS_PORT_ID: 145 + ? + PORT_ID: 87 + : + PC_PHYS_PORT_ID: 153 + ? + PORT_ID: 15 + : + PC_PHYS_PORT_ID: 17 + ? + PORT_ID: 102 + : + PC_PHYS_PORT_ID: 161 + ? + PORT_ID: 103 + : + PC_PHYS_PORT_ID: 169 + ? + PORT_ID: 104 + : + PC_PHYS_PORT_ID: 177 + ? + PORT_ID: 268 + : + PC_PHYS_PORT_ID: 1026 + PC_PORT: + ? + PORT_ID: 0 + : + ENABLE: 1 + SPEED: 10000 + NUM_LANES: 1 + ? + PORT_ID: [13, 14, 15, 16, 30, 31, 32, 33, 48, 49, 50, 51, 66, 67, 68, 69, 84, 85, 86, 87, 102, 103, 104, 105, 120, 121, 122, 123, 138, 139, 140, 141, 156, 157, 158, 159, 174, 175, 176, 177, 192, 193, 194, 195, 210, 211, 212, 213, 228, 229, 230, 231, 246, 247, 248, 249, 264, 265, 266, 267, 282, 283, 284, 285, 300, 301, 302, 303, 318, 319, 320, 321, 336, 337, 338, 339, 354, 355, 356, 357, 372, 373, 374, 375, 390, 391, 392, 393, 408, 409, 410, 411, 426, 427, 428, 429, 444, 445, 446, 447, 462, 463, 464, 465, 480, 481, 482, 483, 498, 499, 500, 501, 516, 517, 518, 519, 534, 535, 536, 537, 552, 553, 554, 555, 570, 571, 572, 573] + : + ENABLE: 1 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_IEEE + LINK_TRAINING: 0 + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: [268] + : + ENABLE: 1 + SPEED: 100000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS528 + LINK_TRAINING: 0 + MAX_FRAME_SIZE: 9416 +... + +--- +device: + 0: + PC_PMD_FIRMWARE: + ? + PORT_ID: [13, 14, 15, 16, 30, 31, 32, 33, 48, 49, 50, 51, 66, 67, 68, 69, 84, 85, 86, 87, 102, 103, 104, 105, 120, 121, 122, 123, 138, 139, 140, 141, 156, 157, 158, 159, 174, 175, 176, 177, 192, 193, 194, 195, 210, 211, 212, 213, 228, 229, 230, 231, 246, 247, 248, 249, 264, 265, 266, 267, 282, 283, 284, 285, 300, 301, 302, 303, 318, 319, 320, 321, 336, 337, 338, 339, 354, 355, 356, 357, 372, 373, 374, 375, 390, 391, 392, 393, 408, 409, 410, 411, 426, 427, 428, 429, 444, 445, 446, 447, 462, 463, 464, 465, 480, 481, 482, 483, 498, 499, 500, 501, 516, 517, 518, 519, 534, 535, 536, 537, 552, 553, 554, 555, 570, 571, 572, 573] + : + MEDIUM_TYPE_AUTO: 0 + MEDIUM_TYPE: PC_PHY_MEDIUM_BACKPLANE + ? + PORT_ID: [268] + : + MEDIUM_TYPE_AUTO: 0 + MEDIUM_TYPE: PC_PHY_MEDIUM_BACKPLANE +... + +--- +device: + 0: + TM_SCHEDULER_CONFIG: + NUM_MC_Q: NUM_MC_Q_4 +... + +--- +bcm_device: + 0: + global: + bcm_tunnel_term_compatible_mode: 1 + vlan_flooding_l2mc_num_reserved: 2048 + l3_alpm_template: 2 + l3_alpm2_bnk_threshold: 100 + uft_mode: 1 + l3_enable: 1 + l2_hitbit_enable: 0 + stat_custom_receive0_management_mode: 1 + pktio_mode: 1 + sai_pfc_defaults_disable: 1 + sai_mac_policy_vfp_group: 0 + sai_skip_create_sys_efp_grp: 1 + sai_rdma_udf_disable: 1 + sai_trap_fp_action_drop_copy_to_cpu: 1 + sai_crm_hw_nh_group_cnt: 0 + riot_overlay_l3_intf_mem_size: 4096 + riot_overlay_l3_egress_mem_size: 8192 + l3_ecmp_member_first_lkup_mem_size: 8192 + l3_ecmp_member_secondary_mem_size: 8192 + failover_fixed_nh_offset_enable: 1 + sai_optimized_mmu: 0 + sai_async_fdb_nbr_enable: 1 + bcm_linkscan_interval: 100000 + sai_pfc_dlr_init_capability: 2 + sai_stats_support_mask: 0x804 +... + +--- +device: + 0: + # IFP mode + FP_CONFIG: + FP_ING_OPERMODE: GLOBAL_PIPE_AWARE +... + +--- +bcm_device: + 0: + port: + "*": + encap_mode: IEEE +... diff --git a/device/micas/x86_64-micas_m2-w6950-128oc-r0/M2-W6950-O128/default_sku b/device/micas/x86_64-micas_m2-w6950-128oc-r0/M2-W6950-O128/default_sku new file mode 100644 index 00000000000..6f88352d2c3 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6950-128oc-r0/M2-W6950-O128/default_sku @@ -0,0 +1 @@ +M2-W6950-O128 l2 diff --git a/device/micas/x86_64-micas_m2-w6950-128oc-r0/M2-W6950-O128/hwsku.json b/device/micas/x86_64-micas_m2-w6950-128oc-r0/M2-W6950-O128/hwsku.json new file mode 100644 index 00000000000..276fda2943b --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6950-128oc-r0/M2-W6950-O128/hwsku.json @@ -0,0 +1,654 @@ +{ + "interfaces": { + "Ethernet0": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet8": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet16": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet24": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet32": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet40": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet48": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet56": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet64": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet72": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet80": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet88": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet96": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet104": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet112": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet120": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet128": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet136": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet144": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet152": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet160": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet168": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet176": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet184": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet192": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet200": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet208": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet216": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet224": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet232": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet240": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet248": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet256": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet264": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet272": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet280": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet288": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet296": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet304": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet312": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet320": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet328": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet336": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet344": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet352": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet360": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet368": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet376": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet384": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet392": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet400": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet408": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet416": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet424": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet432": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet440": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet448": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet456": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet464": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet472": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet480": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet488": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet496": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet504": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet512": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet520": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet528": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet536": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet544": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet552": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet560": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet568": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet576": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet584": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet592": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet600": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet608": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet616": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet624": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet632": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet640": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet648": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet656": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet664": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet672": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet680": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet688": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet696": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet704": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet712": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet720": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet728": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet736": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet744": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet752": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet760": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet768": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet776": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet784": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet792": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet800": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet808": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet816": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet824": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet832": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet840": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet848": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet856": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet864": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet872": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet880": { + "default_brkout_mode": "1x800G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet888": { + 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"0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004", + "lane4": "0x00000004", + "lane5": "0x00000004", + "lane6": "0x00000004", + "lane7": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe0", + "lane4": "0xffffffe0", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe0" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000080", + "lane2": "0x00000080", + "lane3": "0x00000084", + "lane4": "0x00000084", + "lane5": "0x00000080", + "lane6": "0x00000080", + "lane7": "0x00000084" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0xfffffffc", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0xfffffffc", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "127": { + "Default": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004", + "lane4": "0x00000004", + "lane5": "0x00000004", + "lane6": "0x00000004", + "lane7": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe0", + "lane1": "0xffffffe0", + "lane2": "0xffffffe0", + "lane3": "0xffffffe0", + "lane4": "0xffffffe0", + "lane5": "0xffffffe0", + "lane6": "0xffffffe0", + "lane7": "0xffffffe0" + }, + "main": { + "lane0": "0x00000084", + "lane1": "0x00000084", + "lane2": "0x00000084", + "lane3": "0x00000084", + "lane4": "0x00000084", + "lane5": "0x00000084", + "lane6": "0x00000084", + "lane7": "0x00000084" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + }, + "128": { + "Default": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre2": { + "lane0": "0x00000004", + "lane1": "0x00000004", + "lane2": "0x00000004", + "lane3": "0x00000004", + "lane4": "0x00000004", + "lane5": "0x00000004", + "lane6": "0x00000004", + "lane7": "0x00000004" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe0", + "lane3": "0xffffffe4", + "lane4": "0xffffffe0", + "lane5": "0xffffffe0", + "lane6": "0xffffffe0", + "lane7": "0xffffffe0" + }, + "main": { + "lane0": "0x00000080", + "lane1": "0x00000080", + "lane2": "0x00000084", + "lane3": "0x00000080", + "lane4": "0x00000084", + "lane5": "0x00000084", + "lane6": "0x00000084", + "lane7": "0x00000084" + }, + "post1": { + "lane0": "0x00000000", + "lane1": "0xfffffffc", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + } + } + } +} \ No newline at end of file diff --git a/device/micas/x86_64-micas_m2-w6950-128oc-r0/M2-W6950-O128/port_config.ini b/device/micas/x86_64-micas_m2-w6950-128oc-r0/M2-W6950-O128/port_config.ini new file mode 100644 index 00000000000..6b950df1d23 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6950-128oc-r0/M2-W6950-O128/port_config.ini @@ -0,0 +1,131 @@ +# name lanes alias index speed +Ethernet0 265,266,267,268,269,270,271,272 etp1 1 800000 +Ethernet8 297,298,299,300,301,302,303,304 etp2 2 800000 +Ethernet16 305,306,307,308,309,310,311,312 etp3 3 800000 +Ethernet24 313,314,315,316,317,318,319,320 etp4 4 800000 +Ethernet32 377,378,379,380,381,382,383,384 etp5 5 800000 +Ethernet40 369,370,371,372,373,374,375,376 etp6 6 800000 +Ethernet48 361,362,363,364,365,366,367,368 etp7 7 800000 +Ethernet56 329,330,331,332,333,334,335,336 etp8 8 800000 +Ethernet64 505,506,507,508,509,510,511,512 etp9 9 800000 +Ethernet72 497,498,499,500,501,502,503,504 etp10 10 800000 +Ethernet80 489,490,491,492,493,494,495,496 etp11 11 800000 +Ethernet88 457,458,459,460,461,462,463,464 etp12 12 800000 +Ethernet96 449,450,451,452,453,454,455,456 etp13 13 800000 +Ethernet104 465,466,467,468,469,470,471,472 etp14 14 800000 +Ethernet112 481,482,483,484,485,486,487,488 etp15 15 800000 +Ethernet120 473,474,475,476,477,478,479,480 etp16 16 800000 +Ethernet128 537,538,539,540,541,542,543,544 etp17 17 800000 +Ethernet136 545,546,547,548,549,550,551,552 etp18 18 800000 +Ethernet144 529,530,531,532,533,534,535,536 etp19 19 800000 +Ethernet152 513,514,515,516,517,518,519,520 etp20 20 800000 +Ethernet160 521,522,523,524,525,526,527,528 etp21 21 800000 +Ethernet168 553,554,555,556,557,558,559,560 etp22 22 800000 +Ethernet176 561,562,563,564,565,566,567,568 etp23 23 800000 +Ethernet184 569,570,571,572,573,574,575,576 etp24 24 800000 +Ethernet192 649,650,651,652,653,654,655,656 etp25 25 800000 +Ethernet200 681,682,683,684,685,686,687,688 etp26 26 800000 +Ethernet208 689,690,691,692,693,694,695,696 etp27 27 800000 +Ethernet216 697,698,699,700,701,702,703,704 etp28 28 800000 +Ethernet224 761,762,763,764,765,766,767,768 etp29 29 800000 +Ethernet232 753,754,755,756,757,758,759,760 etp30 30 800000 +Ethernet240 713,714,715,716,717,718,719,720 etp31 31 800000 +Ethernet248 745,746,747,748,749,750,751,752 etp32 32 800000 +Ethernet256 33,34,35,36,37,38,39,40 etp33 33 800000 +Ethernet264 1,2,3,4,5,6,7,8 etp34 34 800000 +Ethernet272 41,42,43,44,45,46,47,48 etp35 35 800000 +Ethernet280 57,58,59,60,61,62,63,64 etp36 36 800000 +Ethernet288 121,122,123,124,125,126,127,128 etp37 37 800000 +Ethernet296 105,106,107,108,109,110,111,112 etp38 38 800000 +Ethernet304 65,66,67,68,69,70,71,72 etp39 39 800000 +Ethernet312 97,98,99,100,101,102,103,104 etp40 40 800000 +Ethernet320 153,154,155,156,157,158,159,160 etp41 41 800000 +Ethernet328 145,146,147,148,149,150,151,152 etp42 42 800000 +Ethernet336 321,322,323,324,325,326,327,328 etp43 43 800000 +Ethernet344 353,354,355,356,357,358,359,360 etp44 44 800000 +Ethernet352 409,410,411,412,413,414,415,416 etp45 45 800000 +Ethernet360 401,402,403,404,405,406,407,408 etp46 46 800000 +Ethernet368 393,394,395,396,397,398,399,400 etp47 47 800000 +Ethernet376 433,434,435,436,437,438,439,440 etp48 48 800000 +Ethernet384 585,586,587,588,589,590,591,592 etp49 49 800000 +Ethernet392 625,626,627,628,629,630,631,632 etp50 50 800000 +Ethernet400 601,602,603,604,605,606,607,608 etp51 51 800000 +Ethernet408 593,594,595,596,597,598,599,600 etp52 52 800000 +Ethernet416 641,642,643,644,645,646,647,648 etp53 53 800000 +Ethernet424 673,674,675,676,677,678,679,680 etp54 54 800000 +Ethernet432 857,858,859,860,861,862,863,864 etp55 55 800000 +Ethernet440 849,850,851,852,853,854,855,856 etp56 56 800000 +Ethernet448 897,898,899,900,901,902,903,904 etp57 57 800000 +Ethernet456 929,930,931,932,933,934,935,936 etp58 58 800000 +Ethernet464 953,954,955,956,957,958,959,960 etp59 59 800000 +Ethernet472 937,938,939,940,941,942,943,944 etp60 60 800000 +Ethernet480 1001,1002,1003,1004,1005,1006,1007,1008 etp61 61 800000 +Ethernet488 1017,1018,1019,1020,1021,1022,1023,1024 etp62 62 800000 +Ethernet496 993,994,995,996,997,998,999,1000 etp63 63 800000 +Ethernet504 961,962,963,964,965,966,967,968 etp64 64 800000 +Ethernet512 17,18,19,20,21,22,23,24 etp65 65 800000 +Ethernet520 25,26,27,28,29,30,31,32 etp66 66 800000 +Ethernet528 49,50,51,52,53,54,55,56 etp67 67 800000 +Ethernet536 9,10,11,12,13,14,15,16 etp68 68 800000 +Ethernet544 73,74,75,76,77,78,79,80 etp69 69 800000 +Ethernet552 113,114,115,116,117,118,119,120 etp70 70 800000 +Ethernet560 89,90,91,92,93,94,95,96 etp71 71 800000 +Ethernet568 81,82,83,84,85,86,87,88 etp72 72 800000 +Ethernet576 129,130,131,132,133,134,135,136 etp73 73 800000 +Ethernet584 161,162,163,164,165,166,167,168 etp74 74 800000 +Ethernet592 345,346,347,348,349,350,351,352 etp75 75 800000 +Ethernet600 337,338,339,340,341,342,343,344 etp76 76 800000 +Ethernet608 385,386,387,388,389,390,391,392 etp77 77 800000 +Ethernet616 417,418,419,420,421,422,423,424 etp78 78 800000 +Ethernet624 441,442,443,444,445,446,447,448 etp79 79 800000 +Ethernet632 425,426,427,428,429,430,431,432 etp80 80 800000 +Ethernet640 633,634,635,636,637,638,639,640 etp81 81 800000 +Ethernet648 617,618,619,620,621,622,623,624 etp82 82 800000 +Ethernet656 577,578,579,580,581,582,583,584 etp83 83 800000 +Ethernet664 609,610,611,612,613,614,615,616 etp84 84 800000 +Ethernet672 665,666,667,668,669,670,671,672 etp85 85 800000 +Ethernet680 657,658,659,660,661,662,663,664 etp86 86 800000 +Ethernet688 833,834,835,836,837,838,839,840 etp87 87 800000 +Ethernet696 865,866,867,868,869,870,871,872 etp88 88 800000 +Ethernet704 921,922,923,924,925,926,927,928 etp89 89 800000 +Ethernet712 913,914,915,916,917,918,919,920 etp90 90 800000 +Ethernet720 905,906,907,908,909,910,911,912 etp91 91 800000 +Ethernet728 945,946,947,948,949,950,951,952 etp92 92 800000 +Ethernet736 1009,1010,1011,1012,1013,1014,1015,1016 etp93 93 800000 +Ethernet744 969,970,971,972,973,974,975,976 etp94 94 800000 +Ethernet752 977,978,979,980,981,982,983,984 etp95 95 800000 +Ethernet760 985,986,987,988,989,990,991,992 etp96 96 800000 +Ethernet768 209,210,211,212,213,214,215,216 etp97 97 800000 +Ethernet776 193,194,195,196,197,198,199,200 etp98 98 800000 +Ethernet784 225,226,227,228,229,230,231,232 etp99 99 800000 +Ethernet792 217,218,219,220,221,222,223,224 etp100 100 800000 +Ethernet800 281,282,283,284,285,286,287,288 etp101 101 800000 +Ethernet808 289,290,291,292,293,294,295,296 etp102 102 800000 +Ethernet816 257,258,259,260,261,262,263,264 etp103 103 800000 +Ethernet824 273,274,275,276,277,278,279,280 etp104 104 800000 +Ethernet832 201,202,203,204,205,206,207,208 etp105 105 800000 +Ethernet840 233,234,235,236,237,238,239,240 etp106 106 800000 +Ethernet848 241,242,243,244,245,246,247,248 etp107 107 800000 +Ethernet856 249,250,251,252,253,254,255,256 etp108 108 800000 +Ethernet864 185,186,187,188,189,190,191,192 etp109 109 800000 +Ethernet872 177,178,179,180,181,182,183,184 etp110 110 800000 +Ethernet880 169,170,171,172,173,174,175,176 etp111 111 800000 +Ethernet888 137,138,139,140,141,142,143,144 etp112 112 800000 +Ethernet896 841,842,843,844,845,846,847,848 etp113 113 800000 +Ethernet904 873,874,875,876,877,878,879,880 etp114 114 800000 +Ethernet912 881,882,883,884,885,886,887,888 etp115 115 800000 +Ethernet920 889,890,891,892,893,894,895,896 etp116 116 800000 +Ethernet928 825,826,827,828,829,830,831,832 etp117 117 800000 +Ethernet936 817,818,819,820,821,822,823,824 etp118 118 800000 +Ethernet944 809,810,811,812,813,814,815,816 etp119 119 800000 +Ethernet952 777,778,779,780,781,782,783,784 etp120 120 800000 +Ethernet960 721,722,723,724,725,726,727,728 etp121 121 800000 +Ethernet968 705,706,707,708,709,710,711,712 etp122 122 800000 +Ethernet976 737,738,739,740,741,742,743,744 etp123 123 800000 +Ethernet984 729,730,731,732,733,734,735,736 etp124 124 800000 +Ethernet992 793,794,795,796,797,798,799,800 etp125 125 800000 +Ethernet1000 801,802,803,804,805,806,807,808 etp126 126 800000 +Ethernet1008 785,786,787,788,789,790,791,792 etp127 127 800000 +Ethernet1016 769,770,771,772,773,774,775,776 etp128 128 800000 +Ethernet1024 1026,1027,1028,1029 etp129 129 100000 +Ethernet1025 0 etp130 130 1000 \ No newline at end of file diff --git a/device/micas/x86_64-micas_m2-w6950-128oc-r0/M2-W6950-O128/sai.profile b/device/micas/x86_64-micas_m2-w6950-128oc-r0/M2-W6950-O128/sai.profile new file mode 100644 index 00000000000..79417b3fa0d --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6950-128oc-r0/M2-W6950-O128/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th6-m2-w6950-o128-128x800G.config.yml diff --git a/device/micas/x86_64-micas_m2-w6950-128oc-r0/M2-W6950-O128/sap_bcm_81394.cfg b/device/micas/x86_64-micas_m2-w6950-128oc-r0/M2-W6950-O128/sap_bcm_81394.cfg new file mode 100644 index 00000000000..9db307eda17 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6950-128oc-r0/M2-W6950-O128/sap_bcm_81394.cfg @@ -0,0 +1,246 @@ +# Configuration file version number. +# The current sap_bcm_81394.c does not read this field; it is compatibility/identification information. +# Modifying it will not affect the initialization process of the 81394 driver. +version=1 + +# ==================== +# Global Initialization Parameters +# ==================== + +# Number of slots on the board. +# sap_aperta_config_init() first reads this value into the global g_slot_num, +# then sap_bcm_platform_init() calls sap_slot_init() for 0 to g_slot_num-1. +# Missing this field will cause configuration initialization to fail directly. +plp_slot_num=1 + +# MDIO access type. The ':1' in the key is not a PHY address, but the mdio_id. +# The code first reads plp_phy_mdio_id:0x30=1, then looks up plp_mdio_accs_type:1. +# The value comes from sap_mdio_type_e: +# 0 = MAC +# 1 = SYSFS +# 2 = SYSFS_CUST +# The current value 2 indicates using the custom sysfs MDIO access path. +plp_mdio_accs_type:1=2 + +# Firmware loading method, saved to the global g_fw_load_method. +# The definitions in the 81394 driver are: +# 0 = Do not load +# 1 = Unicast load +# 2 = Broadcast load +# 3 = EEPROM load +# 4 = upgrade path +# 5 = skip +# 6 = full process +# The current value 1 means downloading firmware to each PHY via unicast. +plp_fw_load_method=1 + +# Enable or disable I2C slave. +# The code reads this into g_i2c_slave_en, but in the current main flow of the 81394, +# the corresponding register write logic is completely commented out. +# Therefore, this value is currently a "parsed but not effective by default" field. +plp_i2c_slave_en=0 + +# AVS I2C response address. +# This is also read into g_avs_i2c_resp_addr and used by sap_bcm_avs_init() to assemble register values. +# However, AVS initialization is not actually enabled in the current boot path, so this is just a reserved configuration. +avs_i2c_resp_addr=0x35 + +# Default enable/disable link training for the port's system side. +# If there is no per-port configuration for init_linktrain_sys, each port inherits this global value. +# In sap_aperta_post_port_init(), it calls sap_bcm_linktraining_set(..., true) only if the value is 1. +# 0 means do not automatically enable LT. +plp_port_linktrain_sys=0 + +# Default enable/disable link training for the port's line side. +# The semantics are the same as plp_port_linktrain_sys, applying to the line side. +plp_port_linktrain_line=0 + +# ==================== +# Profile 1 VCO Presets +# ==================== + +# VCO selection for Profile 1, octal 0, system side. +# The 81394 code forcibly reads this and saves it to phy_info->vco_octal_0_sys. +# Confirmed from public headers: +# 0 = bcmplpVco51G +# 1 = bcmplpVco53G +# The current value 1 means 53G VCO. +# Note: In this version of the 81394 implementation, this value is read but not used further in mode_config_set. +# It seems more like a field retained to share the configuration format with other chips in the family. +plp_profile_1_init_vco_octal_0_sys=1 + +# VCO selection for Profile 1, octal 0, line side. +# The current value 1 = 53G VCO. +plp_profile_1_init_vco_octal_0_line=1 + +# VCO selection for Profile 1, octal 1, system side. +# The current board type uses only one PHY at address 0x30 and the profile uses lanes=0,1, +# but the code still requires the VCO for octal 1 to be configured, otherwise configuration parsing fails. +plp_profile_1_init_vco_octal_1_sys=1 + +# VCO selection for Profile 1, octal 1, line side. +# The current value 1 = 53G VCO. +plp_profile_1_init_vco_octal_1_line=1 + +# ==================== +# Profile 1: 100G, split=1, Single port with 4 lanes +# Key format: plp_profile__speed__split_.: +# This is changed to a single 100G port, hence split_num=1, port_id=0. +# +# In the 81394 code, split_num is not hardcoded, but calculated by: +# phy_info->lane_num / port_info->lanes +# Therefore, to target split_1.0, the init_lanes below needs to provide 4 lane entries, +# and init_ports_lane_num must be configured as 4, indicating a 4-lane aggregated port. +# ==================== + +# FEC mode for the line side. +# For the 100G 4x25G scenario, the semantics from the original file are retained, where 3 = RSFEC. +# This still uses the 25.78125G/lane NRZ path, not 2x50G PAM4. +plp_profile_1_speed_100000_split_1.0:fec_line=3 + +# FEC mode for the system side. +# Consistent with the line side, configured as 3 = RSFEC. +plp_profile_1_speed_100000_split_1.0:fec_sys=3 + +# Interface type for the line side. +# In bcm_pm_interface_t, 7 = bcm_pm_InterfaceKR4. +# This is changed from the single-lane KR to 4-lane KR4, matching the 100G 4-lane port form factor. +plp_profile_1_speed_100000_split_1.0:iftype_line=7 + +# Interface type for the system side. +# Also changed to 7 = KR4, maintaining the lane count and interface width consistency between system/line sides. +plp_profile_1_speed_100000_split_1.0:iftype_sys=7 + +# Line side lane bitmask. +# 0xF = 0000 1111b, indicating selection of 4 consecutive lanes. +# With speed=100000, the code calculates the per-lane speed as 25.78125G. +plp_profile_1_speed_100000_split_1.0:lanemap_line=0xF + +# System side lane bitmask. +# Same as the line side, indicating a 4-lane passthrough port, not a gearbox/reverse-gearbox. +plp_profile_1_speed_100000_split_1.0:lanemap_sys=0xF + +# Force NR (No Retimer) bitmap for the system side. +# Currently not forced, keep as 0. +plp_profile_1_speed_100000_split_1.0:force_nr_sys=0x0 + +# Force NR (No Retimer) bitmap for the line side. +# Currently not forced, keep as 0. +plp_profile_1_speed_100000_split_1.0:force_nr_line=0x0 + +# Force ER (Eye Retimer) bitmap for the system side. +# Currently not forced, keep as 0. +plp_profile_1_speed_100000_split_1.0:force_er_sys=0x0 + +# Force ER (Eye Retimer) bitmap for the line side. +# Currently not forced, keep as 0. +plp_profile_1_speed_100000_split_1.0:force_er_line=0x0 + + +# ==================== +# PHY List +# ==================== + +# List of PHY addresses to initialize. +# sap_aperta_config_init() generates g_bcm_phy_infos based on this array. +# Currently, there is only one PHY at address 0x30. +plp_phy_addrs=0x30 + +# ==================== +# PHY 0x30 Base Attributes +# PHY address resolution method: +# bus_id = (phy_addr & 0x7c00)>>10; +# mdio_index = (phy_addr & 0x3e0)>>5; +# phy_addr = phy_addr & 0x1f; +# return dfd_utest_mdiodev_rd(mdio_index+bus_id, phy_addr, reg_addr, data); +# ==================== + +# The unit to which the PHY is bound. +# sap_slot_init() filters by unit and card_id to determine if this PHY should be initialized in the current round. +plp_phy_unit_id:0x30=0 + +# The card/slot number the PHY belongs to. +# The PHY is initialized only when this matches the outer slot_id. +plp_phy_card_id:0x30=0 + +# The mdio_id used by this PHY. +# The code will then use this mdio_id to look up plp_mdio_accs_type:. +plp_phy_mdio_id:0x30=1 + +# PHY chip name. +# For this version of the 81394 code, this is a compatibility field, as the chip_name is hardcoded to "aperta" in the source. +# Modifying it will not change the chip name used by the driver. +plp_phy_chip_name:0x30=aperta + +# MACsec option. +# The current 81394 file only reads and saves this to phy_info->macsec_option, with no subsequent use observed. +# Therefore, this is more of a reserved field. +plp_phy_macsec_option:0x30=0x0 + +# PTP option. +# Similar to macsec_option, currently only parsed and saved, not consumed in the main 81394 flow. +plp_phy_ptp_option:0x30=0x0 + +# The initialization profile ID used by this PHY. +# The '1' in all subsequent plp_profile_1_* key names is determined by this value. +plp_phy_init_profile_id:0x30=1 + +# The lane list for this PHY under Profile 1. +# This is changed to 0,1,2,3. This does not mean 4 independent logical ports, +# but rather to make phy_info->lane_num = 4, causing the code to calculate split_num = 1. +# The number of logical ports actually created is still determined by the next line, init_ports. +plp_profile_1_init_lanes:0x30=0-3 + +# The list of logical port numbers presented externally by this PHY under Profile 1. +# Changed to create only one logical port, port 1, to carry the 1x100G module. +plp_profile_1_init_ports:0x30=1 + +# The number of lanes occupied by each logical port under Profile 1. +# Changed to a single port occupying 4 lanes. +plp_profile_1_init_ports_lane_num:0x30=4 + +# The initial speed of each logical port under Profile 1. +# Changed to 100000 Mbps for a single port, i.e., 100G. +plp_profile_1_init_speed_mode:0x30=100000 + +# ==================== +# PHY 0x30 Global Lane Swap and Polarity Configuration +# These keys apply to the entire PHY, not a single port. +# ==================== + +# System side TX lane mapping. +# This value is parsed as 8 nibbles, lane by lane. +# lane_map_tx[lane_index] = GET_LANE_SWAP_OCTAL(value, lane_index). +# 0x76543210 represents logical 0->0, 1->1, 2->2... 7->7, which is an identity mapping. +plp_phy_tx_lane_map_sys:0x30=0x76543210 + +# System side RX lane mapping. +# Currently also an identity mapping. +plp_phy_rx_lane_map_sys:0x30=0x76543210 + +# Line side TX lane mapping. +# 0x76543120 indicates a lane swap on the line side, no longer a direct passthrough. +# The code calls bcm_plp_rxtx_laneswap_set() in sap_aperta_phy_init() to apply this. +plp_phy_tx_lane_map_line:0x30=0x76542301 + +# Line side RX lane mapping. +# Currently the same as TX, indicating that RX/TX both follow the same line-side swapping rules. +plp_phy_rx_lane_map_line:0x30=0x76542301 + +# Line side TX polarity flip bitmap. +# In sap_aperta_phy_init(), the current polarity is read, XORed with this value, and then written back. +# Therefore, a bit=1 means flip the polarity for the corresponding lane; 0 means leave it unchanged. +# The current 0x0 means no polarity flip on the line side TX. +plp_tx_polarity_flip_line:0x30=0x0 + +# Line side RX polarity flip bitmap. +# The current 0x0 means no polarity flip on the line side RX. +plp_rx_polarity_flip_line:0x30=0xF + +# System side TX polarity flip bitmap. +# The current 0x0 means no polarity flip on the system side TX. +plp_tx_polarity_flip_sys:0x30=0x0 + +# System side RX polarity flip bitmap. +# The current 0x0 means no polarity flip on the system side RX. +plp_rx_polarity_flip_sys:0x30=0x0 diff --git a/device/micas/x86_64-micas_m2-w6950-128oc-r0/M2-W6950-O128/th6-m2-w6950-o128-128x800G.config.yml b/device/micas/x86_64-micas_m2-w6950-128oc-r0/M2-W6950-O128/th6-m2-w6950-o128-128x800G.config.yml new file mode 100644 index 00000000000..2d933f9eb8e --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6950-128oc-r0/M2-W6950-O128/th6-m2-w6950-o128-128x800G.config.yml @@ -0,0 +1,2182 @@ +--- +device: + 0: + DEVICE_CONFIG: + AUTOLOAD_BOARD_SETTINGS: 0 +... + +--- +device: + 0: + PC_PM_CORE: + ? + PC_PM_ID: 1 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x12360745 + RX_LANE_MAP: 0x34726150 + TX_POLARITY_FLIP: 0x57 + RX_POLARITY_FLIP: 0x39 + ? + PC_PM_ID: 2 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x56327140 + RX_LANE_MAP: 0x60317425 + TX_POLARITY_FLIP: 0x99 + RX_POLARITY_FLIP: 0x59 + ? + PC_PM_ID: 3 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x23145670 + RX_LANE_MAP: 0x57462103 + TX_POLARITY_FLIP: 0x6e + RX_POLARITY_FLIP: 0x19 + ? + PC_PM_ID: 4 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x45726013 + RX_LANE_MAP: 0x12360475 + TX_POLARITY_FLIP: 0x74 + RX_POLARITY_FLIP: 0x87 + ? + PC_PM_ID: 5 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x17204653 + RX_LANE_MAP: 0x54036127 + TX_POLARITY_FLIP: 0x3f + RX_POLARITY_FLIP: 0x77 + ? + PC_PM_ID: 6 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x14027653 + RX_LANE_MAP: 0x54217036 + TX_POLARITY_FLIP: 0x45 + RX_POLARITY_FLIP: 0x13 + ? + PC_PM_ID: 7 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x26351407 + RX_LANE_MAP: 0x52407163 + TX_POLARITY_FLIP: 0x43 + RX_POLARITY_FLIP: 0x10 + ? + PC_PM_ID: 8 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x45670321 + RX_LANE_MAP: 0x53274610 + TX_POLARITY_FLIP: 0xad + RX_POLARITY_FLIP: 0xd8 + ? + PC_PM_ID: 9 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x21705463 + RX_LANE_MAP: 0x46327105 + TX_POLARITY_FLIP: 0x95 + RX_POLARITY_FLIP: 0x40 + ? + PC_PM_ID: 10 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x12057463 + RX_LANE_MAP: 0x51740236 + TX_POLARITY_FLIP: 0xc8 + RX_POLARITY_FLIP: 0xf5 + ? + PC_PM_ID: 11 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x67105243 + RX_LANE_MAP: 0x40236715 + TX_POLARITY_FLIP: 0x10 + RX_POLARITY_FLIP: 0x05 + ? + PC_PM_ID: 12 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x23164507 + RX_LANE_MAP: 0x45712063 + TX_POLARITY_FLIP: 0xd7 + RX_POLARITY_FLIP: 0xb3 + ? + PC_PM_ID: 13 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x46570213 + RX_LANE_MAP: 0x71546032 + TX_POLARITY_FLIP: 0x69 + RX_POLARITY_FLIP: 0x51 + ? + PC_PM_ID: 14 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x17453206 + RX_LANE_MAP: 0x61257430 + TX_POLARITY_FLIP: 0xaa + RX_POLARITY_FLIP: 0x64 + ? + PC_PM_ID: 15 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x56327041 + RX_LANE_MAP: 0x50361427 + TX_POLARITY_FLIP: 0xe2 + RX_POLARITY_FLIP: 0xf8 + ? + PC_PM_ID: 16 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x07324651 + RX_LANE_MAP: 0x57624301 + TX_POLARITY_FLIP: 0x0d + RX_POLARITY_FLIP: 0xa0 + ? + PC_PM_ID: 17 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x01374526 + RX_LANE_MAP: 0x64751032 + TX_POLARITY_FLIP: 0x24 + RX_POLARITY_FLIP: 0x19 + ? + PC_PM_ID: 18 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x13024675 + RX_LANE_MAP: 0x61304275 + TX_POLARITY_FLIP: 0x10 + RX_POLARITY_FLIP: 0xa1 + ? + PC_PM_ID: 19 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x16452307 + RX_LANE_MAP: 0x50346721 + TX_POLARITY_FLIP: 0xc5 + RX_POLARITY_FLIP: 0xb8 + ? + PC_PM_ID: 20 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x32604571 + RX_LANE_MAP: 0x67205314 + TX_POLARITY_FLIP: 0x53 + RX_POLARITY_FLIP: 0xc0 + ? + PC_PM_ID: 21 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x46120573 + RX_LANE_MAP: 0x13526407 + TX_POLARITY_FLIP: 0x2e + RX_POLARITY_FLIP: 0xf6 + ? + PC_PM_ID: 22 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x20731645 + RX_LANE_MAP: 0x30412657 + TX_POLARITY_FLIP: 0xa0 + RX_POLARITY_FLIP: 0x04 + ? + PC_PM_ID: 23 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x13207465 + RX_LANE_MAP: 0x20316475 + TX_POLARITY_FLIP: 0x01 + RX_POLARITY_FLIP: 0x38 + ? + PC_PM_ID: 24 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x13027654 + RX_LANE_MAP: 0x61305274 + TX_POLARITY_FLIP: 0x90 + RX_POLARITY_FLIP: 0x88 + ? + PC_PM_ID: 25 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x23107465 + RX_LANE_MAP: 0x32107654 + TX_POLARITY_FLIP: 0x62 + RX_POLARITY_FLIP: 0x99 + ? + PC_PM_ID: 26 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x20731645 + RX_LANE_MAP: 0x03612547 + TX_POLARITY_FLIP: 0xed + RX_POLARITY_FLIP: 0xf7 + ? + PC_PM_ID: 27 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x13027654 + RX_LANE_MAP: 0x62307145 + TX_POLARITY_FLIP: 0x9d + RX_POLARITY_FLIP: 0xaa + ? + PC_PM_ID: 28 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x31064752 + RX_LANE_MAP: 0x02135764 + TX_POLARITY_FLIP: 0xf5 + RX_POLARITY_FLIP: 0xca + ? + PC_PM_ID: 29 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x12357064 + RX_LANE_MAP: 0x03216457 + TX_POLARITY_FLIP: 0x81 + RX_POLARITY_FLIP: 0x23 + ? + PC_PM_ID: 30 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x32106745 + RX_LANE_MAP: 0x61034275 + TX_POLARITY_FLIP: 0x11 + RX_POLARITY_FLIP: 0xc6 + ? + PC_PM_ID: 31 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x32014756 + RX_LANE_MAP: 0x13024576 + TX_POLARITY_FLIP: 0x20 + RX_POLARITY_FLIP: 0xce + ? + PC_PM_ID: 32 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x02376154 + RX_LANE_MAP: 0x03612547 + TX_POLARITY_FLIP: 0xd5 + RX_POLARITY_FLIP: 0xef + ? + PC_PM_ID: 33 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x02137564 + RX_LANE_MAP: 0x02637154 + TX_POLARITY_FLIP: 0xe7 + RX_POLARITY_FLIP: 0x20 + ? + PC_PM_ID: 34 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x01375264 + RX_LANE_MAP: 0x23507164 + TX_POLARITY_FLIP: 0x7f + RX_POLARITY_FLIP: 0x01 + ? + PC_PM_ID: 35 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x02134765 + RX_LANE_MAP: 0x13026745 + TX_POLARITY_FLIP: 0x1b + RX_POLARITY_FLIP: 0x82 + ? + PC_PM_ID: 36 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x23016745 + RX_LANE_MAP: 0x30162745 + TX_POLARITY_FLIP: 0xe6 + RX_POLARITY_FLIP: 0xc9 + ? + PC_PM_ID: 37 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x30412675 + RX_LANE_MAP: 0x32051674 + TX_POLARITY_FLIP: 0xa7 + RX_POLARITY_FLIP: 0x1b + ? + PC_PM_ID: 38 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x20314756 + RX_LANE_MAP: 0x10324576 + TX_POLARITY_FLIP: 0x73 + RX_POLARITY_FLIP: 0x91 + ? + PC_PM_ID: 39 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x20315746 + RX_LANE_MAP: 0x01534267 + TX_POLARITY_FLIP: 0x93 + RX_POLARITY_FLIP: 0x29 + ? + PC_PM_ID: 40 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x10732546 + RX_LANE_MAP: 0x23507164 + TX_POLARITY_FLIP: 0xdf + RX_POLARITY_FLIP: 0x81 + ? + PC_PM_ID: 41 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x07324651 + RX_LANE_MAP: 0x46357201 + TX_POLARITY_FLIP: 0xdf + RX_POLARITY_FLIP: 0x3a + ? + PC_PM_ID: 42 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x10324756 + RX_LANE_MAP: 0x10325746 + TX_POLARITY_FLIP: 0xbb + RX_POLARITY_FLIP: 0xee + ? + PC_PM_ID: 43 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x65073421 + RX_LANE_MAP: 0x53026714 + TX_POLARITY_FLIP: 0x7e + RX_POLARITY_FLIP: 0xc5 + ? + PC_PM_ID: 44 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x21057463 + RX_LANE_MAP: 0x47513260 + TX_POLARITY_FLIP: 0x65 + RX_POLARITY_FLIP: 0x07 + ? + PC_PM_ID: 45 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x47061235 + RX_LANE_MAP: 0x41276530 + TX_POLARITY_FLIP: 0x34 + RX_POLARITY_FLIP: 0xf1 + ? + PC_PM_ID: 46 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x02375164 + RX_LANE_MAP: 0x01437265 + TX_POLARITY_FLIP: 0x2b + RX_POLARITY_FLIP: 0xc6 + ? + PC_PM_ID: 47 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x01237564 + RX_LANE_MAP: 0x13607254 + TX_POLARITY_FLIP: 0xdb + RX_POLARITY_FLIP: 0x44 + ? + PC_PM_ID: 48 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x02137564 + RX_LANE_MAP: 0x13025476 + TX_POLARITY_FLIP: 0x74 + RX_POLARITY_FLIP: 0xce + ? + PC_PM_ID: 49 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x70152643 + RX_LANE_MAP: 0x76512043 + TX_POLARITY_FLIP: 0x73 + RX_POLARITY_FLIP: 0x55 + ? + PC_PM_ID: 50 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x04635271 + RX_LANE_MAP: 0x67235014 + TX_POLARITY_FLIP: 0xde + RX_POLARITY_FLIP: 0x25 + ? + PC_PM_ID: 51 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x76540213 + RX_LANE_MAP: 0x51376240 + TX_POLARITY_FLIP: 0xf1 + RX_POLARITY_FLIP: 0xc4 + ? + PC_PM_ID: 52 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x12375460 + RX_LANE_MAP: 0x54261037 + TX_POLARITY_FLIP: 0xe1 + RX_POLARITY_FLIP: 0x0f + ? + PC_PM_ID: 53 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x64301572 + RX_LANE_MAP: 0x63107425 + TX_POLARITY_FLIP: 0x5f + RX_POLARITY_FLIP: 0x17 + ? + PC_PM_ID: 54 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x45213670 + RX_LANE_MAP: 0x41062537 + TX_POLARITY_FLIP: 0xc6 + RX_POLARITY_FLIP: 0x08 + ? + PC_PM_ID: 55 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x25461073 + RX_LANE_MAP: 0x73215640 + TX_POLARITY_FLIP: 0xec + RX_POLARITY_FLIP: 0x0e + ? + PC_PM_ID: 56 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x30264571 + RX_LANE_MAP: 0x67452031 + TX_POLARITY_FLIP: 0x38 + RX_POLARITY_FLIP: 0x55 + ? + PC_PM_ID: 57 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x36270154 + RX_LANE_MAP: 0x36270154 + TX_POLARITY_FLIP: 0x89 + RX_POLARITY_FLIP: 0x23 + ? + PC_PM_ID: 58 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x02736154 + RX_LANE_MAP: 0x20341765 + TX_POLARITY_FLIP: 0xe0 + RX_POLARITY_FLIP: 0x7f + ? + PC_PM_ID: 59 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x32105764 + RX_LANE_MAP: 0x23017654 + TX_POLARITY_FLIP: 0xb5 + RX_POLARITY_FLIP: 0x96 + ? + PC_PM_ID: 60 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x63721045 + RX_LANE_MAP: 0x36270154 + TX_POLARITY_FLIP: 0x50 + RX_POLARITY_FLIP: 0x33 + ? + PC_PM_ID: 61 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x02341675 + RX_LANE_MAP: 0x02341675 + TX_POLARITY_FLIP: 0x20 + RX_POLARITY_FLIP: 0xc7 + ? + PC_PM_ID: 62 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x23106457 + RX_LANE_MAP: 0x23106754 + TX_POLARITY_FLIP: 0x90 + RX_POLARITY_FLIP: 0x26 + ? + PC_PM_ID: 63 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x63721045 + RX_LANE_MAP: 0x36170254 + TX_POLARITY_FLIP: 0x46 + RX_POLARITY_FLIP: 0x73 + ? + PC_PM_ID: 64 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x20371645 + RX_LANE_MAP: 0x20341765 + TX_POLARITY_FLIP: 0xd0 + RX_POLARITY_FLIP: 0x7f + ? + PC_PM_ID: 65 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x36270154 + RX_LANE_MAP: 0x63721045 + TX_POLARITY_FLIP: 0x7a + RX_POLARITY_FLIP: 0xec + ? + PC_PM_ID: 66 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x02736154 + RX_LANE_MAP: 0x02437156 + TX_POLARITY_FLIP: 0x13 + RX_POLARITY_FLIP: 0x40 + ? + PC_PM_ID: 67 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x32105764 + RX_LANE_MAP: 0x32106745 + TX_POLARITY_FLIP: 0x46 + RX_POLARITY_FLIP: 0x96 + ? + PC_PM_ID: 68 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x63721045 + RX_LANE_MAP: 0x63721045 + TX_POLARITY_FLIP: 0xa3 + RX_POLARITY_FLIP: 0xcc + ? + PC_PM_ID: 69 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x02341675 + RX_LANE_MAP: 0x20436157 + TX_POLARITY_FLIP: 0xd3 + RX_POLARITY_FLIP: 0x34 + ? + PC_PM_ID: 70 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x23106457 + RX_LANE_MAP: 0x32017645 + TX_POLARITY_FLIP: 0x63 + RX_POLARITY_FLIP: 0xe6 + ? + PC_PM_ID: 71 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x63721045 + RX_LANE_MAP: 0x63712045 + TX_POLARITY_FLIP: 0xb5 + RX_POLARITY_FLIP: 0x4c + ? + PC_PM_ID: 72 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x20371645 + RX_LANE_MAP: 0x02437156 + TX_POLARITY_FLIP: 0x23 + RX_POLARITY_FLIP: 0x40 + ? + PC_PM_ID: 73 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x13762540 + RX_LANE_MAP: 0x51764320 + TX_POLARITY_FLIP: 0xe0 + RX_POLARITY_FLIP: 0xaa + ? + PC_PM_ID: 74 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x62135470 + RX_LANE_MAP: 0x64025317 + TX_POLARITY_FLIP: 0xa0 + RX_POLARITY_FLIP: 0xea + ? + PC_PM_ID: 75 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x54761302 + RX_LANE_MAP: 0x50326741 + TX_POLARITY_FLIP: 0x0b + RX_POLARITY_FLIP: 0x7e + ? + PC_PM_ID: 76 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x34075261 + RX_LANE_MAP: 0x57021634 + TX_POLARITY_FLIP: 0x5a + RX_POLARITY_FLIP: 0xf0 + ? + PC_PM_ID: 77 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x75201463 + RX_LANE_MAP: 0x70126435 + TX_POLARITY_FLIP: 0xe4 + RX_POLARITY_FLIP: 0xaa + ? + PC_PM_ID: 78 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x67013542 + RX_LANE_MAP: 0x26034517 + TX_POLARITY_FLIP: 0xde + RX_POLARITY_FLIP: 0x7f + ? + PC_PM_ID: 79 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x46257310 + RX_LANE_MAP: 0x70265143 + TX_POLARITY_FLIP: 0x4c + RX_POLARITY_FLIP: 0xf5 + ? + PC_PM_ID: 80 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x21354670 + RX_LANE_MAP: 0x45673120 + TX_POLARITY_FLIP: 0xab + RX_POLARITY_FLIP: 0xaa + ? + PC_PM_ID: 81 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x36124750 + RX_LANE_MAP: 0x41237506 + TX_POLARITY_FLIP: 0x80 + RX_POLARITY_FLIP: 0x84 + ? + PC_PM_ID: 82 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x10324756 + RX_LANE_MAP: 0x01237564 + TX_POLARITY_FLIP: 0xbb + RX_POLARITY_FLIP: 0xdd + ? + PC_PM_ID: 83 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x24173560 + RX_LANE_MAP: 0x62015734 + TX_POLARITY_FLIP: 0xc5 + RX_POLARITY_FLIP: 0xf0 + ? + PC_PM_ID: 84 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x03247561 + RX_LANE_MAP: 0x51476032 + TX_POLARITY_FLIP: 0xf6 + RX_POLARITY_FLIP: 0xf2 + ? + PC_PM_ID: 85 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x06473512 + RX_LANE_MAP: 0x40256731 + TX_POLARITY_FLIP: 0x3e + RX_POLARITY_FLIP: 0x0a + ? + PC_PM_ID: 86 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x02375164 + RX_LANE_MAP: 0x10342756 + TX_POLARITY_FLIP: 0x2b + RX_POLARITY_FLIP: 0xc9 + ? + PC_PM_ID: 87 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x01237564 + RX_LANE_MAP: 0x31062745 + TX_POLARITY_FLIP: 0xdb + RX_POLARITY_FLIP: 0x88 + ? + PC_PM_ID: 88 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x02137564 + RX_LANE_MAP: 0x31204567 + TX_POLARITY_FLIP: 0x74 + RX_POLARITY_FLIP: 0xcd + ? + PC_PM_ID: 89 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x64751302 + RX_LANE_MAP: 0x45173620 + TX_POLARITY_FLIP: 0x24 + RX_POLARITY_FLIP: 0xfb + ? + PC_PM_ID: 90 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x01375264 + RX_LANE_MAP: 0x32051746 + TX_POLARITY_FLIP: 0x7f + RX_POLARITY_FLIP: 0x02 + ? + PC_PM_ID: 91 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x65471302 + RX_LANE_MAP: 0x54762031 + TX_POLARITY_FLIP: 0x1b + RX_POLARITY_FLIP: 0xbe + ? + PC_PM_ID: 92 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x45670123 + RX_LANE_MAP: 0x54726103 + TX_POLARITY_FLIP: 0x64 + RX_POLARITY_FLIP: 0x6c + ? + PC_PM_ID: 93 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x75264130 + RX_LANE_MAP: 0x47615023 + TX_POLARITY_FLIP: 0x25 + RX_POLARITY_FLIP: 0x27 + ? + PC_PM_ID: 94 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x20314756 + RX_LANE_MAP: 0x10324576 + TX_POLARITY_FLIP: 0x73 + RX_POLARITY_FLIP: 0x91 + ? + PC_PM_ID: 95 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x20315746 + RX_LANE_MAP: 0x10352476 + TX_POLARITY_FLIP: 0x93 + RX_POLARITY_FLIP: 0x16 + ? + PC_PM_ID: 96 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x10732546 + RX_LANE_MAP: 0x32051746 + TX_POLARITY_FLIP: 0xdf + RX_POLARITY_FLIP: 0x42 + ? + PC_PM_ID: 97 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x65741023 + RX_LANE_MAP: 0x45670123 + TX_POLARITY_FLIP: 0x76 + RX_POLARITY_FLIP: 0x66 + ? + PC_PM_ID: 98 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x45167320 + RX_LANE_MAP: 0x74521630 + TX_POLARITY_FLIP: 0x84 + RX_POLARITY_FLIP: 0x10 + ? + PC_PM_ID: 99 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x54760213 + RX_LANE_MAP: 0x45713062 + TX_POLARITY_FLIP: 0x89 + RX_POLARITY_FLIP: 0x55 + ? + PC_PM_ID: 100 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x52470631 + RX_LANE_MAP: 0x46753120 + TX_POLARITY_FLIP: 0xa0 + RX_POLARITY_FLIP: 0xac + ? + PC_PM_ID: 101 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x64703512 + RX_LANE_MAP: 0x75461230 + TX_POLARITY_FLIP: 0xbd + RX_POLARITY_FLIP: 0x3b + ? + PC_PM_ID: 102 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x45671032 + RX_LANE_MAP: 0x57243016 + TX_POLARITY_FLIP: 0xbb + RX_POLARITY_FLIP: 0x9c + ? + PC_PM_ID: 103 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x56470132 + RX_LANE_MAP: 0x67542031 + TX_POLARITY_FLIP: 0xf7 + RX_POLARITY_FLIP: 0x8c + ? + PC_PM_ID: 104 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x54613702 + RX_LANE_MAP: 0x74521630 + TX_POLARITY_FLIP: 0xa8 + RX_POLARITY_FLIP: 0x08 + ? + PC_PM_ID: 105 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x36054721 + RX_LANE_MAP: 0x75643210 + TX_POLARITY_FLIP: 0xb7 + RX_POLARITY_FLIP: 0xb9 + ? + PC_PM_ID: 106 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x75642031 + RX_LANE_MAP: 0x57240316 + TX_POLARITY_FLIP: 0xf7 + RX_POLARITY_FLIP: 0x7a + ? + PC_PM_ID: 107 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x45160723 + RX_LANE_MAP: 0x51376420 + TX_POLARITY_FLIP: 0xca + RX_POLARITY_FLIP: 0x43 + ? + PC_PM_ID: 108 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x65104273 + RX_LANE_MAP: 0x64325017 + TX_POLARITY_FLIP: 0xc9 + RX_POLARITY_FLIP: 0x1b + ? + PC_PM_ID: 109 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x75320641 + RX_LANE_MAP: 0x62501437 + TX_POLARITY_FLIP: 0xd1 + RX_POLARITY_FLIP: 0x81 + ? + PC_PM_ID: 110 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x45167320 + RX_LANE_MAP: 0x75621403 + TX_POLARITY_FLIP: 0xf5 + RX_POLARITY_FLIP: 0xdf + ? + PC_PM_ID: 111 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x65742013 + RX_LANE_MAP: 0x57461302 + TX_POLARITY_FLIP: 0xbf + RX_POLARITY_FLIP: 0xe3 + ? + PC_PM_ID: 112 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x54760213 + RX_LANE_MAP: 0x47250316 + TX_POLARITY_FLIP: 0xf9 + RX_POLARITY_FLIP: 0xee + ? + PC_PM_ID: 113 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x74305162 + RX_LANE_MAP: 0x75014236 + TX_POLARITY_FLIP: 0x8e + RX_POLARITY_FLIP: 0x01 + ? + PC_PM_ID: 114 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x03147562 + RX_LANE_MAP: 0x74513602 + TX_POLARITY_FLIP: 0x0e + RX_POLARITY_FLIP: 0x0a + ? + PC_PM_ID: 115 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x42305761 + RX_LANE_MAP: 0x63214705 + TX_POLARITY_FLIP: 0x08 + RX_POLARITY_FLIP: 0xfa + ? + PC_PM_ID: 116 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x17254603 + RX_LANE_MAP: 0x71456320 + TX_POLARITY_FLIP: 0x50 + RX_POLARITY_FLIP: 0x13 + ? + PC_PM_ID: 117 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x57461302 + RX_LANE_MAP: 0x72506431 + TX_POLARITY_FLIP: 0x69 + RX_POLARITY_FLIP: 0xaa + ? + PC_PM_ID: 118 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x45170632 + RX_LANE_MAP: 0x60247531 + TX_POLARITY_FLIP: 0x55 + RX_POLARITY_FLIP: 0xde + ? + PC_PM_ID: 119 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x40127653 + RX_LANE_MAP: 0x16325407 + TX_POLARITY_FLIP: 0x9f + RX_POLARITY_FLIP: 0x15 + ? + PC_PM_ID: 120 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x36124750 + RX_LANE_MAP: 0x41035267 + TX_POLARITY_FLIP: 0x97 + RX_POLARITY_FLIP: 0x0a + ? + PC_PM_ID: 121 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x36124507 + RX_LANE_MAP: 0x30716254 + TX_POLARITY_FLIP: 0xa2 + RX_POLARITY_FLIP: 0x83 + ? + PC_PM_ID: 122 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x41027653 + RX_LANE_MAP: 0x71326405 + TX_POLARITY_FLIP: 0x22 + RX_POLARITY_FLIP: 0x3c + ? + PC_PM_ID: 123 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x10265473 + RX_LANE_MAP: 0x46570321 + TX_POLARITY_FLIP: 0xbc + RX_POLARITY_FLIP: 0xb9 + ? + PC_PM_ID: 124 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x10327546 + RX_LANE_MAP: 0x06371425 + TX_POLARITY_FLIP: 0x44 + RX_POLARITY_FLIP: 0xe2 + ? + PC_PM_ID: 125 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x26304751 + RX_LANE_MAP: 0x67215304 + TX_POLARITY_FLIP: 0x05 + RX_POLARITY_FLIP: 0x77 + ? + PC_PM_ID: 126 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x06327451 + RX_LANE_MAP: 0x76305124 + TX_POLARITY_FLIP: 0x9b + RX_POLARITY_FLIP: 0x64 + ? + PC_PM_ID: 127 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x37241506 + RX_LANE_MAP: 0x40526371 + TX_POLARITY_FLIP: 0x64 + RX_POLARITY_FLIP: 0xbf + ? + PC_PM_ID: 128 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x67452103 + RX_LANE_MAP: 0x50264713 + TX_POLARITY_FLIP: 0x58 + RX_POLARITY_FLIP: 0x62 + ? + PC_PM_ID: 129 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x0123 + RX_LANE_MAP: 0x0123 + TX_POLARITY_FLIP: 0x0 + RX_POLARITY_FLIP: 0x0 +... + +--- +device: + 0: + PC_PORT_PHYS_MAP: + ? + # CPU port + PORT_ID: 0 + : + PC_PHYS_PORT_ID: 0 + ? + PORT_ID: 13 + : + PC_PHYS_PORT_ID: 1 + ? + PORT_ID: 105 + : + PC_PHYS_PORT_ID: 185 + ? + PORT_ID: 120 + : + PC_PHYS_PORT_ID: 193 + ? + PORT_ID: 121 + : + PC_PHYS_PORT_ID: 201 + ? + PORT_ID: 122 + : + PC_PHYS_PORT_ID: 209 + ? + PORT_ID: 123 + : + PC_PHYS_PORT_ID: 217 + ? + PORT_ID: 138 + : + PC_PHYS_PORT_ID: 225 + ? + PORT_ID: 16 + : + PC_PHYS_PORT_ID: 25 + ? + PORT_ID: 139 + : + PC_PHYS_PORT_ID: 233 + ? + PORT_ID: 140 + : + PC_PHYS_PORT_ID: 241 + ? + PORT_ID: 141 + : + PC_PHYS_PORT_ID: 249 + ? + PORT_ID: 156 + : + PC_PHYS_PORT_ID: 257 + ? + PORT_ID: 157 + : + PC_PHYS_PORT_ID: 265 + ? + PORT_ID: 158 + : + PC_PHYS_PORT_ID: 273 + ? + PORT_ID: 159 + : + PC_PHYS_PORT_ID: 281 + ? + PORT_ID: 174 + : + PC_PHYS_PORT_ID: 289 + ? + PORT_ID: 175 + : + PC_PHYS_PORT_ID: 297 + ? + PORT_ID: 176 + : + PC_PHYS_PORT_ID: 305 + ? + PORT_ID: 177 + : + PC_PHYS_PORT_ID: 313 + ? + PORT_ID: 30 + : + PC_PHYS_PORT_ID: 33 + ? + PORT_ID: 192 + : + PC_PHYS_PORT_ID: 321 + ? + PORT_ID: 193 + : + PC_PHYS_PORT_ID: 329 + ? + PORT_ID: 194 + : + PC_PHYS_PORT_ID: 337 + ? + PORT_ID: 195 + : + PC_PHYS_PORT_ID: 345 + ? + PORT_ID: 210 + : + PC_PHYS_PORT_ID: 353 + ? + PORT_ID: 211 + : + PC_PHYS_PORT_ID: 361 + ? + PORT_ID: 212 + : + PC_PHYS_PORT_ID: 369 + ? + PORT_ID: 213 + : + PC_PHYS_PORT_ID: 377 + ? + PORT_ID: 228 + : + PC_PHYS_PORT_ID: 385 + ? + PORT_ID: 31 + : + PC_PHYS_PORT_ID: 41 + ? + PORT_ID: 229 + : + PC_PHYS_PORT_ID: 393 + ? + PORT_ID: 230 + : + PC_PHYS_PORT_ID: 401 + ? + PORT_ID: 231 + : + PC_PHYS_PORT_ID: 409 + ? + PORT_ID: 246 + : + PC_PHYS_PORT_ID: 417 + ? + PORT_ID: 247 + : + PC_PHYS_PORT_ID: 425 + ? + PORT_ID: 248 + : + PC_PHYS_PORT_ID: 433 + ? + PORT_ID: 249 + : + PC_PHYS_PORT_ID: 441 + ? + PORT_ID: 264 + : + PC_PHYS_PORT_ID: 449 + ? + PORT_ID: 265 + : + PC_PHYS_PORT_ID: 457 + ? + PORT_ID: 32 + : + PC_PHYS_PORT_ID: 49 + ? + PORT_ID: 266 + : + PC_PHYS_PORT_ID: 465 + ? + PORT_ID: 267 + : + PC_PHYS_PORT_ID: 473 + ? + PORT_ID: 282 + : + PC_PHYS_PORT_ID: 481 + ? + PORT_ID: 283 + : + PC_PHYS_PORT_ID: 489 + ? + PORT_ID: 284 + : + PC_PHYS_PORT_ID: 497 + ? + PORT_ID: 285 + : + PC_PHYS_PORT_ID: 505 + ? + PORT_ID: 300 + : + PC_PHYS_PORT_ID: 513 + ? + PORT_ID: 301 + : + PC_PHYS_PORT_ID: 521 + ? + PORT_ID: 302 + : + PC_PHYS_PORT_ID: 529 + ? + PORT_ID: 33 + : + PC_PHYS_PORT_ID: 57 + ? + PORT_ID: 303 + : + PC_PHYS_PORT_ID: 537 + ? + PORT_ID: 318 + : + PC_PHYS_PORT_ID: 545 + ? + PORT_ID: 319 + : + PC_PHYS_PORT_ID: 553 + ? + PORT_ID: 320 + : + PC_PHYS_PORT_ID: 561 + ? + PORT_ID: 321 + : + PC_PHYS_PORT_ID: 569 + ? + PORT_ID: 336 + : + PC_PHYS_PORT_ID: 577 + ? + PORT_ID: 337 + : + PC_PHYS_PORT_ID: 585 + ? + PORT_ID: 338 + : + PC_PHYS_PORT_ID: 593 + ? + PORT_ID: 339 + : + PC_PHYS_PORT_ID: 601 + ? + PORT_ID: 354 + : + PC_PHYS_PORT_ID: 609 + ? + PORT_ID: 355 + : + PC_PHYS_PORT_ID: 617 + ? + PORT_ID: 356 + : + PC_PHYS_PORT_ID: 625 + ? + PORT_ID: 357 + : + PC_PHYS_PORT_ID: 633 + ? + PORT_ID: 48 + : + PC_PHYS_PORT_ID: 65 + ? + PORT_ID: 372 + : + PC_PHYS_PORT_ID: 641 + ? + PORT_ID: 373 + : + PC_PHYS_PORT_ID: 649 + ? + PORT_ID: 374 + : + PC_PHYS_PORT_ID: 657 + ? + PORT_ID: 375 + : + PC_PHYS_PORT_ID: 665 + ? + PORT_ID: 390 + : + PC_PHYS_PORT_ID: 673 + ? + PORT_ID: 391 + : + PC_PHYS_PORT_ID: 681 + ? + PORT_ID: 392 + : + PC_PHYS_PORT_ID: 689 + ? + PORT_ID: 393 + : + PC_PHYS_PORT_ID: 697 + ? + PORT_ID: 408 + : + PC_PHYS_PORT_ID: 705 + ? + PORT_ID: 49 + : + PC_PHYS_PORT_ID: 73 + ? + PORT_ID: 409 + : + PC_PHYS_PORT_ID: 713 + ? + PORT_ID: 410 + : + PC_PHYS_PORT_ID: 721 + ? + PORT_ID: 411 + : + PC_PHYS_PORT_ID: 729 + ? + PORT_ID: 426 + : + PC_PHYS_PORT_ID: 737 + ? + PORT_ID: 427 + : + PC_PHYS_PORT_ID: 745 + ? + PORT_ID: 428 + : + PC_PHYS_PORT_ID: 753 + ? + PORT_ID: 429 + : + PC_PHYS_PORT_ID: 761 + ? + PORT_ID: 444 + : + PC_PHYS_PORT_ID: 769 + ? + PORT_ID: 445 + : + PC_PHYS_PORT_ID: 777 + ? + PORT_ID: 50 + : + PC_PHYS_PORT_ID: 81 + ? + PORT_ID: 446 + : + PC_PHYS_PORT_ID: 785 + ? + PORT_ID: 447 + : + PC_PHYS_PORT_ID: 793 + ? + PORT_ID: 462 + : + PC_PHYS_PORT_ID: 801 + ? + PORT_ID: 463 + : + PC_PHYS_PORT_ID: 809 + ? + PORT_ID: 464 + : + PC_PHYS_PORT_ID: 817 + ? + PORT_ID: 465 + : + PC_PHYS_PORT_ID: 825 + ? + PORT_ID: 480 + : + PC_PHYS_PORT_ID: 833 + ? + PORT_ID: 481 + : + PC_PHYS_PORT_ID: 841 + ? + PORT_ID: 482 + : + PC_PHYS_PORT_ID: 849 + ? + PORT_ID: 51 + : + PC_PHYS_PORT_ID: 89 + ? + PORT_ID: 483 + : + PC_PHYS_PORT_ID: 857 + ? + PORT_ID: 498 + : + PC_PHYS_PORT_ID: 865 + ? + PORT_ID: 499 + : + PC_PHYS_PORT_ID: 873 + ? + PORT_ID: 500 + : + PC_PHYS_PORT_ID: 881 + ? + PORT_ID: 501 + : + PC_PHYS_PORT_ID: 889 + ? + PORT_ID: 14 + : + PC_PHYS_PORT_ID: 9 + ? + PORT_ID: 516 + : + PC_PHYS_PORT_ID: 897 + ? + PORT_ID: 517 + : + PC_PHYS_PORT_ID: 905 + ? + PORT_ID: 518 + : + PC_PHYS_PORT_ID: 913 + ? + PORT_ID: 519 + : + PC_PHYS_PORT_ID: 921 + ? + PORT_ID: 534 + : + PC_PHYS_PORT_ID: 929 + ? + PORT_ID: 535 + : + PC_PHYS_PORT_ID: 937 + ? + PORT_ID: 536 + : + PC_PHYS_PORT_ID: 945 + ? + PORT_ID: 537 + : + PC_PHYS_PORT_ID: 953 + ? + PORT_ID: 66 + : + PC_PHYS_PORT_ID: 97 + ? + PORT_ID: 552 + : + PC_PHYS_PORT_ID: 961 + ? + PORT_ID: 553 + : + PC_PHYS_PORT_ID: 969 + ? + PORT_ID: 554 + : + PC_PHYS_PORT_ID: 977 + ? + PORT_ID: 555 + : + PC_PHYS_PORT_ID: 985 + ? + PORT_ID: 570 + : + PC_PHYS_PORT_ID: 993 + ? + PORT_ID: 571 + : + PC_PHYS_PORT_ID: 1001 + ? + PORT_ID: 572 + : + PC_PHYS_PORT_ID: 1009 + ? + PORT_ID: 573 + : + PC_PHYS_PORT_ID: 1017 + ? + PORT_ID: 67 + : + PC_PHYS_PORT_ID: 105 + ? + PORT_ID: 68 + : + PC_PHYS_PORT_ID: 113 + ? + PORT_ID: 69 + : + PC_PHYS_PORT_ID: 121 + ? + PORT_ID: 84 + : + PC_PHYS_PORT_ID: 129 + ? + PORT_ID: 85 + : + PC_PHYS_PORT_ID: 137 + ? + PORT_ID: 86 + : + PC_PHYS_PORT_ID: 145 + ? + PORT_ID: 87 + : + PC_PHYS_PORT_ID: 153 + ? + PORT_ID: 15 + : + PC_PHYS_PORT_ID: 17 + ? + PORT_ID: 102 + : + PC_PHYS_PORT_ID: 161 + ? + PORT_ID: 103 + : + PC_PHYS_PORT_ID: 169 + ? + PORT_ID: 104 + : + PC_PHYS_PORT_ID: 177 + ? + PORT_ID: 268 + : + PC_PHYS_PORT_ID: 1026 + PC_PORT: + ? + PORT_ID: 0 + : + ENABLE: 1 + SPEED: 10000 + NUM_LANES: 1 + ? + PORT_ID: [13, 14, 15, 16, 30, 31, 32, 33, 48, 49, 50, 51, 66, 67, 68, 69, 84, 85, 86, 87, 102, 103, 104, 105, 120, 121, 122, 123, 138, 139, 140, 141, 156, 157, 158, 159, 174, 175, 176, 177, 192, 193, 194, 195, 210, 211, 212, 213, 228, 229, 230, 231, 246, 247, 248, 249, 264, 265, 266, 267, 282, 283, 284, 285, 300, 301, 302, 303, 318, 319, 320, 321, 336, 337, 338, 339, 354, 355, 356, 357, 372, 373, 374, 375, 390, 391, 392, 393, 408, 409, 410, 411, 426, 427, 428, 429, 444, 445, 446, 447, 462, 463, 464, 465, 480, 481, 482, 483, 498, 499, 500, 501, 516, 517, 518, 519, 534, 535, 536, 537, 552, 553, 554, 555, 570, 571, 572, 573] + : + ENABLE: 1 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_IEEE + LINK_TRAINING: 0 + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: [268] + : + ENABLE: 1 + SPEED: 100000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS528 + LINK_TRAINING: 0 + MAX_FRAME_SIZE: 9416 +... + +--- +device: + 0: + PC_PMD_FIRMWARE: + ? + PORT_ID: [13, 14, 15, 16, 30, 31, 32, 33, 48, 49, 50, 51, 66, 67, 68, 69, 84, 85, 86, 87, 102, 103, 104, 105, 120, 121, 122, 123, 138, 139, 140, 141, 156, 157, 158, 159, 174, 175, 176, 177, 192, 193, 194, 195, 210, 211, 212, 213, 228, 229, 230, 231, 246, 247, 248, 249, 264, 265, 266, 267, 282, 283, 284, 285, 300, 301, 302, 303, 318, 319, 320, 321, 336, 337, 338, 339, 354, 355, 356, 357, 372, 373, 374, 375, 390, 391, 392, 393, 408, 409, 410, 411, 426, 427, 428, 429, 444, 445, 446, 447, 462, 463, 464, 465, 480, 481, 482, 483, 498, 499, 500, 501, 516, 517, 518, 519, 534, 535, 536, 537, 552, 553, 554, 555, 570, 571, 572, 573] + : + MEDIUM_TYPE_AUTO: 0 + MEDIUM_TYPE: PC_PHY_MEDIUM_BACKPLANE + ? + PORT_ID: [268] + : + MEDIUM_TYPE_AUTO: 0 + MEDIUM_TYPE: PC_PHY_MEDIUM_BACKPLANE +... + +--- +device: + 0: + TM_SCHEDULER_CONFIG: + NUM_MC_Q: NUM_MC_Q_4 +... + +--- +bcm_device: + 0: + global: + bcm_tunnel_term_compatible_mode: 1 + vlan_flooding_l2mc_num_reserved: 2048 + l3_alpm_template: 2 + l3_alpm2_bnk_threshold: 100 + uft_mode: 1 + l3_enable: 1 + l2_hitbit_enable: 0 + stat_custom_receive0_management_mode: 1 + pktio_mode: 1 + sai_pfc_defaults_disable: 1 + sai_mac_policy_vfp_group: 0 + sai_skip_create_sys_efp_grp: 1 + sai_rdma_udf_disable: 1 + sai_trap_fp_action_drop_copy_to_cpu: 1 + sai_crm_hw_nh_group_cnt: 0 + riot_overlay_l3_intf_mem_size: 4096 + riot_overlay_l3_egress_mem_size: 8192 + l3_ecmp_member_first_lkup_mem_size: 8192 + l3_ecmp_member_secondary_mem_size: 8192 + failover_fixed_nh_offset_enable: 1 + sai_optimized_mmu: 0 + sai_async_fdb_nbr_enable: 1 + bcm_linkscan_interval: 100000 + sai_pfc_dlr_init_capability: 2 + sai_stats_support_mask: 0x804 +... + +--- +device: + 0: + # IFP mode + FP_CONFIG: + FP_ING_OPERMODE: GLOBAL_PIPE_AWARE +... + +--- +bcm_device: + 0: + port: + "*": + encap_mode: IEEE +... diff --git a/device/micas/x86_64-micas_m2-w6950-128oc-r0/M2-W6950-Q256/default_sku b/device/micas/x86_64-micas_m2-w6950-128oc-r0/M2-W6950-Q256/default_sku new file mode 100644 index 00000000000..ce71600eb71 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6950-128oc-r0/M2-W6950-Q256/default_sku @@ -0,0 +1 @@ +M2-W6950-Q256 l2 diff --git a/device/micas/x86_64-micas_m2-w6950-128oc-r0/M2-W6950-Q256/hwsku.json b/device/micas/x86_64-micas_m2-w6950-128oc-r0/M2-W6950-Q256/hwsku.json new file mode 100644 index 00000000000..fcf051b52a7 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6950-128oc-r0/M2-W6950-Q256/hwsku.json @@ -0,0 +1,654 @@ +{ + "interfaces": { + "Ethernet0": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet8": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet16": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet24": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet32": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet40": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet48": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet56": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet64": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet72": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet80": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet88": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet96": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet104": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet112": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet120": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet128": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet136": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet144": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet152": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet160": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet168": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet176": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet184": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet192": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet200": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet208": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet216": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet224": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet232": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet240": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet248": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet256": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet264": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet272": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet280": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet288": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet296": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet304": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet312": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet320": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet328": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet336": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet344": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet352": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet360": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet368": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet376": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet384": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet392": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet400": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet408": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet416": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet424": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet432": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet440": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet448": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet456": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet464": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet472": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet480": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet488": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet496": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet504": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet512": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet520": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet528": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet536": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet544": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet552": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet560": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet568": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet576": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet584": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet592": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet600": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet608": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet616": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet624": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet632": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet640": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet648": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet656": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet664": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet672": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet680": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet688": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet696": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet704": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet712": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet720": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet728": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet736": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet744": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet752": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet760": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet768": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet776": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet784": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet792": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet800": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet808": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet816": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet824": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet832": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet840": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet848": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet856": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet864": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet872": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet880": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet888": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet896": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet904": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet912": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet920": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet928": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet936": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet944": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet952": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet960": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet968": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet976": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet984": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet992": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet1000": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet1008": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet1016": { + "default_brkout_mode": "2x400G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet1024": { + "default_brkout_mode": "1x100G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet1025": { + "default_brkout_mode": "1x1G", + "autoneg": "off", + "fec": "none" + } + } +} \ No newline at end of file diff --git a/device/micas/x86_64-micas_m2-w6950-128oc-r0/M2-W6950-Q256/media_settings.json b/device/micas/x86_64-micas_m2-w6950-128oc-r0/M2-W6950-Q256/media_settings.json new file mode 100644 index 00000000000..267b5d2f3da --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6950-128oc-r0/M2-W6950-Q256/media_settings.json @@ -0,0 +1,8196 @@ +{ + "PORT_MEDIA_SETTINGS": { + "1": { + "Default": { + "pre3": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xffffffff" + }, + "pre2": { + "lane0": "0x00000005", + "lane1": "0x00000005", + "lane2": "0x00000005", + "lane3": "0x00000005", + "lane4": "0x00000005", + "lane5": "0x00000005", + "lane6": "0x00000005", + "lane7": "0x00000005" + }, + "pre1": { + "lane0": "0xfffffff4", + "lane1": "0xfffffff4", + "lane2": "0xfffffff4", + "lane3": "0xfffffff4", + "lane4": "0xfffffff4", + "lane5": "0xfffffff4", + "lane6": "0xfffffff4", + "lane7": "0xfffffff4" + }, + "main": { + "lane0": "0x00000058", + "lane1": "0x00000058", + "lane2": "0x00000058", + "lane3": "0x00000058", + "lane4": "0x00000058", + "lane5": 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"0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xffffffff" + }, + "pre2": { + "lane0": "0x00000005", + "lane1": "0x00000005", + "lane2": "0x00000005", + "lane3": "0x00000005", + "lane4": "0x00000005", + "lane5": "0x00000005", + "lane6": "0x00000005", + "lane7": "0x00000005" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x00000054", + "lane1": "0x00000054", + "lane2": "0x00000054", + "lane3": "0x00000054", + "lane4": "0x00000054", + "lane5": "0x00000054", + "lane6": "0x00000054", + "lane7": "0x00000054" + }, + "post1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "post2": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + } + } + }, + "121": { + "Default": { + "pre3": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xffffffff" + }, + "pre2": { + "lane0": "0x00000005", + "lane1": "0x00000005", + "lane2": "0x00000005", + "lane3": "0x00000005", + "lane4": "0x00000005", + "lane5": "0x00000005", + "lane6": "0x00000005", + "lane7": "0x00000005" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x00000054", + "lane1": "0x00000054", + "lane2": "0x00000054", + "lane3": "0x00000054", + "lane4": "0x00000054", + "lane5": "0x00000054", + "lane6": "0x00000054", + "lane7": "0x00000054" + }, + "post1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "post2": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + } + } + }, + "122": { + "Default": { + "pre3": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xffffffff" + }, + "pre2": { + "lane0": "0x00000005", + "lane1": "0x00000005", + "lane2": "0x00000005", + "lane3": "0x00000005", + "lane4": "0x00000005", + "lane5": "0x00000005", + "lane6": "0x00000005", + "lane7": "0x00000005" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x00000054", + "lane1": "0x00000054", + "lane2": "0x00000054", + "lane3": "0x00000054", + "lane4": "0x00000054", + "lane5": "0x00000054", + "lane6": "0x00000054", + "lane7": "0x00000054" + }, + "post1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "post2": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + } + } + }, + "123": { + "Default": { + "pre3": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xffffffff" + }, + "pre2": { + "lane0": "0x00000005", + "lane1": "0x00000005", + "lane2": "0x00000005", + "lane3": "0x00000005", + "lane4": "0x00000005", + "lane5": "0x00000005", + "lane6": "0x00000005", + "lane7": "0x00000005" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x00000054", + "lane1": "0x00000054", + "lane2": "0x00000054", + "lane3": "0x00000054", + "lane4": "0x00000054", + "lane5": "0x00000054", + "lane6": "0x00000054", + "lane7": "0x00000054" + }, + "post1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "post2": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + } + } + }, + "124": { + "Default": { + "pre3": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xffffffff" + }, + "pre2": { + "lane0": "0x00000005", + "lane1": "0x00000005", + "lane2": "0x00000005", + "lane3": "0x00000005", + "lane4": "0x00000005", + "lane5": "0x00000005", + "lane6": "0x00000005", + "lane7": "0x00000005" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x00000054", + "lane1": "0x00000054", + "lane2": "0x00000054", + "lane3": "0x00000054", + "lane4": "0x00000054", + "lane5": "0x00000054", + "lane6": "0x00000054", + "lane7": "0x00000054" + }, + "post1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "post2": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + } + } + }, + "125": { + "Default": { + "pre3": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xffffffff" + }, + "pre2": { + "lane0": "0x00000005", + "lane1": "0x00000005", + "lane2": "0x00000005", + "lane3": "0x00000005", + "lane4": "0x00000005", + "lane5": "0x00000005", + "lane6": "0x00000005", + "lane7": "0x00000005" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x00000054", + "lane1": "0x00000054", + "lane2": "0x00000054", + "lane3": "0x00000054", + "lane4": "0x00000054", + "lane5": "0x00000054", + "lane6": "0x00000054", + "lane7": "0x00000054" + }, + "post1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "post2": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + } + } + }, + "126": { + "Default": { + "pre3": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xffffffff" + }, + "pre2": { + "lane0": "0x00000005", + "lane1": "0x00000005", + "lane2": "0x00000005", + "lane3": "0x00000005", + "lane4": "0x00000005", + "lane5": "0x00000005", + "lane6": "0x00000005", + "lane7": "0x00000005" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x00000054", + "lane1": "0x00000054", + "lane2": "0x00000054", + "lane3": "0x00000054", + "lane4": "0x00000054", + "lane5": "0x00000054", + "lane6": "0x00000054", + "lane7": "0x00000054" + }, + "post1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "post2": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + } + } + }, + "127": { + "Default": { + "pre3": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xffffffff" + }, + "pre2": { + "lane0": "0x00000005", + "lane1": "0x00000005", + "lane2": "0x00000005", + "lane3": "0x00000005", + "lane4": "0x00000005", + "lane5": "0x00000005", + "lane6": "0x00000005", + "lane7": "0x00000005" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x00000054", + "lane1": "0x00000054", + "lane2": "0x00000054", + "lane3": "0x00000054", + "lane4": "0x00000054", + "lane5": "0x00000054", + "lane6": "0x00000054", + "lane7": "0x00000054" + }, + "post1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "post2": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + } + } + }, + "128": { + "Default": { + "pre3": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xffffffff" + }, + "pre2": { + "lane0": "0x00000005", + "lane1": "0x00000005", + "lane2": "0x00000005", + "lane3": "0x00000005", + "lane4": "0x00000005", + "lane5": "0x00000005", + "lane6": "0x00000005", + "lane7": "0x00000005" + }, + "pre1": { + "lane0": "0xffffffe4", + "lane1": "0xffffffe4", + "lane2": "0xffffffe4", + "lane3": "0xffffffe4", + "lane4": "0xffffffe4", + "lane5": "0xffffffe4", + "lane6": "0xffffffe4", + "lane7": "0xffffffe4" + }, + "main": { + "lane0": "0x00000054", + "lane1": "0x00000054", + "lane2": "0x00000054", + "lane3": "0x00000054", + "lane4": "0x00000054", + "lane5": "0x00000054", + "lane6": "0x00000054", + "lane7": "0x00000054" + }, + "post1": { + "lane0": "0xffffffec", + "lane1": "0xffffffec", + "lane2": "0xffffffec", + "lane3": "0xffffffec", + "lane4": "0xffffffec", + "lane5": "0xffffffec", + "lane6": "0xffffffec", + "lane7": "0xffffffec" + }, + "post2": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa", + "lane4": "0xfffffffa", + "lane5": "0xfffffffa", + "lane6": "0xfffffffa", + "lane7": "0xfffffffa" + } + } + } + } +} \ No newline at end of file diff --git a/device/micas/x86_64-micas_m2-w6950-128oc-r0/M2-W6950-Q256/port_config.ini b/device/micas/x86_64-micas_m2-w6950-128oc-r0/M2-W6950-Q256/port_config.ini new file mode 100644 index 00000000000..1cf6f68c115 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6950-128oc-r0/M2-W6950-Q256/port_config.ini @@ -0,0 +1,259 @@ +# name lanes alias index speed +Ethernet0 265,266,267,268 etp1a 1 400000 +Ethernet4 269,270,271,272 etp1b 1 400000 +Ethernet8 297,298,299,300 etp2a 2 400000 +Ethernet12 301,302,303,304 etp2b 2 400000 +Ethernet16 305,306,307,308 etp3a 3 400000 +Ethernet20 309,310,311,312 etp3b 3 400000 +Ethernet24 313,314,315,316 etp4a 4 400000 +Ethernet28 317,318,319,320 etp4b 4 400000 +Ethernet32 377,378,379,380 etp5a 5 400000 +Ethernet36 381,382,383,384 etp5b 5 400000 +Ethernet40 369,370,371,372 etp6a 6 400000 +Ethernet44 373,374,375,376 etp6b 6 400000 +Ethernet48 361,362,363,364 etp7a 7 400000 +Ethernet52 365,366,367,368 etp7b 7 400000 +Ethernet56 329,330,331,332 etp8a 8 400000 +Ethernet60 333,334,335,336 etp8b 8 400000 +Ethernet64 505,506,507,508 etp9a 9 400000 +Ethernet68 509,510,511,512 etp9b 9 400000 +Ethernet72 497,498,499,500 etp10a 10 400000 +Ethernet76 501,502,503,504 etp10b 10 400000 +Ethernet80 489,490,491,492 etp11a 11 400000 +Ethernet84 493,494,495,496 etp11b 11 400000 +Ethernet88 457,458,459,460 etp12a 12 400000 +Ethernet92 461,462,463,464 etp12b 12 400000 +Ethernet96 449,450,451,452 etp13a 13 400000 +Ethernet100 453,454,455,456 etp13b 13 400000 +Ethernet104 465,466,467,468 etp14a 14 400000 +Ethernet108 469,470,471,472 etp14b 14 400000 +Ethernet112 481,482,483,484 etp15a 15 400000 +Ethernet116 485,486,487,488 etp15b 15 400000 +Ethernet120 473,474,475,476 etp16a 16 400000 +Ethernet124 477,478,479,480 etp16b 16 400000 +Ethernet128 537,538,539,540 etp17a 17 400000 +Ethernet132 541,542,543,544 etp17b 17 400000 +Ethernet136 545,546,547,548 etp18a 18 400000 +Ethernet140 549,550,551,552 etp18b 18 400000 +Ethernet144 529,530,531,532 etp19a 19 400000 +Ethernet148 533,534,535,536 etp19b 19 400000 +Ethernet152 513,514,515,516 etp20a 20 400000 +Ethernet156 517,518,519,520 etp20b 20 400000 +Ethernet160 521,522,523,524 etp21a 21 400000 +Ethernet164 525,526,527,528 etp21b 21 400000 +Ethernet168 553,554,555,556 etp22a 22 400000 +Ethernet172 557,558,559,560 etp22b 22 400000 +Ethernet176 561,562,563,564 etp23a 23 400000 +Ethernet180 565,566,567,568 etp23b 23 400000 +Ethernet184 569,570,571,572 etp24a 24 400000 +Ethernet188 573,574,575,576 etp24b 24 400000 +Ethernet192 649,650,651,652 etp25a 25 400000 +Ethernet196 653,654,655,656 etp25b 25 400000 +Ethernet200 681,682,683,684 etp26a 26 400000 +Ethernet204 685,686,687,688 etp26b 26 400000 +Ethernet208 689,690,691,692 etp27a 27 400000 +Ethernet212 693,694,695,696 etp27b 27 400000 +Ethernet216 697,698,699,700 etp28a 28 400000 +Ethernet220 701,702,703,704 etp28b 28 400000 +Ethernet224 761,762,763,764 etp29a 29 400000 +Ethernet228 765,766,767,768 etp29b 29 400000 +Ethernet232 753,754,755,756 etp30a 30 400000 +Ethernet236 757,758,759,760 etp30b 30 400000 +Ethernet240 713,714,715,716 etp31a 31 400000 +Ethernet244 717,718,719,720 etp31b 31 400000 +Ethernet248 745,746,747,748 etp32a 32 400000 +Ethernet252 749,750,751,752 etp32b 32 400000 +Ethernet256 33,34,35,36 etp33a 33 400000 +Ethernet260 37,38,39,40 etp33b 33 400000 +Ethernet264 1,2,3,4 etp34a 34 400000 +Ethernet268 5,6,7,8 etp34b 34 400000 +Ethernet272 41,42,43,44 etp35a 35 400000 +Ethernet276 45,46,47,48 etp35b 35 400000 +Ethernet280 57,58,59,60 etp36a 36 400000 +Ethernet284 61,62,63,64 etp36b 36 400000 +Ethernet288 121,122,123,124 etp37a 37 400000 +Ethernet292 125,126,127,128 etp37b 37 400000 +Ethernet296 105,106,107,108 etp38a 38 400000 +Ethernet300 109,110,111,112 etp38b 38 400000 +Ethernet304 65,66,67,68 etp39a 39 400000 +Ethernet308 69,70,71,72 etp39b 39 400000 +Ethernet312 97,98,99,100 etp40a 40 400000 +Ethernet316 101,102,103,104 etp40b 40 400000 +Ethernet320 153,154,155,156 etp41a 41 400000 +Ethernet324 157,158,159,160 etp41b 41 400000 +Ethernet328 145,146,147,148 etp42a 42 400000 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etp53a 53 400000 +Ethernet420 645,646,647,648 etp53b 53 400000 +Ethernet424 673,674,675,676 etp54a 54 400000 +Ethernet428 677,678,679,680 etp54b 54 400000 +Ethernet432 857,858,859,860 etp55a 55 400000 +Ethernet436 861,862,863,864 etp55b 55 400000 +Ethernet440 849,850,851,852 etp56a 56 400000 +Ethernet444 853,854,855,856 etp56b 56 400000 +Ethernet448 897,898,899,900 etp57a 57 400000 +Ethernet452 901,902,903,904 etp57b 57 400000 +Ethernet456 929,930,931,932 etp58a 58 400000 +Ethernet460 933,934,935,936 etp58b 58 400000 +Ethernet464 953,954,955,956 etp59a 59 400000 +Ethernet468 957,958,959,960 etp59b 59 400000 +Ethernet472 937,938,939,940 etp60a 60 400000 +Ethernet476 941,942,943,944 etp60b 60 400000 +Ethernet480 1001,1002,1003,1004 etp61a 61 400000 +Ethernet484 1005,1006,1007,1008 etp61b 61 400000 +Ethernet488 1017,1018,1019,1020 etp62a 62 400000 +Ethernet492 1021,1022,1023,1024 etp62b 62 400000 +Ethernet496 993,994,995,996 etp63a 63 400000 +Ethernet500 997,998,999,1000 etp63b 63 400000 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+Ethernet596 349,350,351,352 etp75b 75 400000 +Ethernet600 337,338,339,340 etp76a 76 400000 +Ethernet604 341,342,343,344 etp76b 76 400000 +Ethernet608 385,386,387,388 etp77a 77 400000 +Ethernet612 389,390,391,392 etp77b 77 400000 +Ethernet616 417,418,419,420 etp78a 78 400000 +Ethernet620 421,422,423,424 etp78b 78 400000 +Ethernet624 441,442,443,444 etp79a 79 400000 +Ethernet628 445,446,447,448 etp79b 79 400000 +Ethernet632 425,426,427,428 etp80a 80 400000 +Ethernet636 429,430,431,432 etp80b 80 400000 +Ethernet640 633,634,635,636 etp81a 81 400000 +Ethernet644 637,638,639,640 etp81b 81 400000 +Ethernet648 617,618,619,620 etp82a 82 400000 +Ethernet652 621,622,623,624 etp82b 82 400000 +Ethernet656 577,578,579,580 etp83a 83 400000 +Ethernet660 581,582,583,584 etp83b 83 400000 +Ethernet664 609,610,611,612 etp84a 84 400000 +Ethernet668 613,614,615,616 etp84b 84 400000 +Ethernet672 665,666,667,668 etp85a 85 400000 +Ethernet676 669,670,671,672 etp85b 85 400000 +Ethernet680 657,658,659,660 etp86a 86 400000 +Ethernet684 661,662,663,664 etp86b 86 400000 +Ethernet688 833,834,835,836 etp87a 87 400000 +Ethernet692 837,838,839,840 etp87b 87 400000 +Ethernet696 865,866,867,868 etp88a 88 400000 +Ethernet700 869,870,871,872 etp88b 88 400000 +Ethernet704 921,922,923,924 etp89a 89 400000 +Ethernet708 925,926,927,928 etp89b 89 400000 +Ethernet712 913,914,915,916 etp90a 90 400000 +Ethernet716 917,918,919,920 etp90b 90 400000 +Ethernet720 905,906,907,908 etp91a 91 400000 +Ethernet724 909,910,911,912 etp91b 91 400000 +Ethernet728 945,946,947,948 etp92a 92 400000 +Ethernet732 949,950,951,952 etp92b 92 400000 +Ethernet736 1009,1010,1011,1012 etp93a 93 400000 +Ethernet740 1013,1014,1015,1016 etp93b 93 400000 +Ethernet744 969,970,971,972 etp94a 94 400000 +Ethernet748 973,974,975,976 etp94b 94 400000 +Ethernet752 977,978,979,980 etp95a 95 400000 +Ethernet756 981,982,983,984 etp95b 95 400000 +Ethernet760 985,986,987,988 etp96a 96 400000 +Ethernet764 989,990,991,992 etp96b 96 400000 +Ethernet768 209,210,211,212 etp97a 97 400000 +Ethernet772 213,214,215,216 etp97b 97 400000 +Ethernet776 193,194,195,196 etp98a 98 400000 +Ethernet780 197,198,199,200 etp98b 98 400000 +Ethernet784 225,226,227,228 etp99a 99 400000 +Ethernet788 229,230,231,232 etp99b 99 400000 +Ethernet792 217,218,219,220 etp100a 100 400000 +Ethernet796 221,222,223,224 etp100b 100 400000 +Ethernet800 281,282,283,284 etp101a 101 400000 +Ethernet804 285,286,287,288 etp101b 101 400000 +Ethernet808 289,290,291,292 etp102a 102 400000 +Ethernet812 293,294,295,296 etp102b 102 400000 +Ethernet816 257,258,259,260 etp103a 103 400000 +Ethernet820 261,262,263,264 etp103b 103 400000 +Ethernet824 273,274,275,276 etp104a 104 400000 +Ethernet828 277,278,279,280 etp104b 104 400000 +Ethernet832 201,202,203,204 etp105a 105 400000 +Ethernet836 205,206,207,208 etp105b 105 400000 +Ethernet840 233,234,235,236 etp106a 106 400000 +Ethernet844 237,238,239,240 etp106b 106 400000 +Ethernet848 241,242,243,244 etp107a 107 400000 +Ethernet852 245,246,247,248 etp107b 107 400000 +Ethernet856 249,250,251,252 etp108a 108 400000 +Ethernet860 253,254,255,256 etp108b 108 400000 +Ethernet864 185,186,187,188 etp109a 109 400000 +Ethernet868 189,190,191,192 etp109b 109 400000 +Ethernet872 177,178,179,180 etp110a 110 400000 +Ethernet876 181,182,183,184 etp110b 110 400000 +Ethernet880 169,170,171,172 etp111a 111 400000 +Ethernet884 173,174,175,176 etp111b 111 400000 +Ethernet888 137,138,139,140 etp112a 112 400000 +Ethernet892 141,142,143,144 etp112b 112 400000 +Ethernet896 841,842,843,844 etp113a 113 400000 +Ethernet900 845,846,847,848 etp113b 113 400000 +Ethernet904 873,874,875,876 etp114a 114 400000 +Ethernet908 877,878,879,880 etp114b 114 400000 +Ethernet912 881,882,883,884 etp115a 115 400000 +Ethernet916 885,886,887,888 etp115b 115 400000 +Ethernet920 889,890,891,892 etp116a 116 400000 +Ethernet924 893,894,895,896 etp116b 116 400000 +Ethernet928 825,826,827,828 etp117a 117 400000 +Ethernet932 829,830,831,832 etp117b 117 400000 +Ethernet936 817,818,819,820 etp118a 118 400000 +Ethernet940 821,822,823,824 etp118b 118 400000 +Ethernet944 809,810,811,812 etp119a 119 400000 +Ethernet948 813,814,815,816 etp119b 119 400000 +Ethernet952 777,778,779,780 etp120a 120 400000 +Ethernet956 781,782,783,784 etp120b 120 400000 +Ethernet960 721,722,723,724 etp121a 121 400000 +Ethernet964 725,726,727,728 etp121b 121 400000 +Ethernet968 705,706,707,708 etp122a 122 400000 +Ethernet972 709,710,711,712 etp122b 122 400000 +Ethernet976 737,738,739,740 etp123a 123 400000 +Ethernet980 741,742,743,744 etp123b 123 400000 +Ethernet984 729,730,731,732 etp124a 124 400000 +Ethernet988 733,734,735,736 etp124b 124 400000 +Ethernet992 793,794,795,796 etp125a 125 400000 +Ethernet996 797,798,799,800 etp125b 125 400000 +Ethernet1000 801,802,803,804 etp126a 126 400000 +Ethernet1004 805,806,807,808 etp126b 126 400000 +Ethernet1008 785,786,787,788 etp127a 127 400000 +Ethernet1012 789,790,791,792 etp127b 127 400000 +Ethernet1016 769,770,771,772 etp128a 128 400000 +Ethernet1020 773,774,775,776 etp128b 128 400000 +Ethernet1024 1026,1027,1028,1029 etp129 129 100000 +Ethernet1025 0 etp130 130 1000 diff --git a/device/micas/x86_64-micas_m2-w6950-128oc-r0/M2-W6950-Q256/sai.profile b/device/micas/x86_64-micas_m2-w6950-128oc-r0/M2-W6950-Q256/sai.profile new file mode 100644 index 00000000000..3a8aa684dd1 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6950-128oc-r0/M2-W6950-Q256/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th6-m2-w6950-q256-256x400G.config.yml diff --git a/device/micas/x86_64-micas_m2-w6950-128oc-r0/M2-W6950-Q256/sap_bcm_81394.cfg b/device/micas/x86_64-micas_m2-w6950-128oc-r0/M2-W6950-Q256/sap_bcm_81394.cfg new file mode 100644 index 00000000000..c8b29b322cc --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6950-128oc-r0/M2-W6950-Q256/sap_bcm_81394.cfg @@ -0,0 +1,246 @@ +# Configuration file version number. +# The current sap_bcm_81394.c does not read this field; it is compatibility/identification information. +# Modifying it will not affect the initialization process of the 81394 driver. +version=1 + +# ==================== +# Global Initialization Parameters +# ==================== + +# Number of slots on the board. +# sap_aperta_config_init() first reads this value into the global g_slot_num, +# then sap_bcm_platform_init() calls sap_slot_init() for 0 to g_slot_num-1. +# Missing this field will cause configuration initialization to fail directly. +plp_slot_num=1 + +# MDIO access type. The ':1' in the key is not a PHY address, but the mdio_id. +# The code first reads plp_phy_mdio_id:0x30=1, then looks up plp_mdio_accs_type:1. +# The value comes from sap_mdio_type_e: +# 0 = MAC +# 1 = SYSFS +# 2 = SYSFS_CUST +# The current value 2 indicates using the custom sysfs MDIO access path. +plp_mdio_accs_type:1=2 + +# Firmware loading method, saved to the global g_fw_load_method. +# The definitions in the 81394 driver are: +# 0 = Do not load +# 1 = Unicast load +# 2 = Broadcast load +# 3 = EEPROM load +# 4 = upgrade path +# 5 = skip +# 6 = full process +# The current value 1 means downloading firmware to each PHY via unicast. +plp_fw_load_method=1 + +# Enable or disable I2C slave. +# The code reads this into g_i2c_slave_en, but in the current main flow of the 81394, +# the corresponding register write logic is completely commented out. +# Therefore, this value is currently a "parsed but not effective by default" field. +plp_i2c_slave_en=0 + +# AVS I2C response address. +# This is also read into g_avs_i2c_resp_addr and used by sap_bcm_avs_init() to assemble register values. +# However, AVS initialization is not actually enabled in the current boot path, so this is just a reserved configuration. +avs_i2c_resp_addr=0x35 + +# Default enable/disable link training for the port's system side. +# If there is no per-port configuration for init_linktrain_sys, each port inherits this global value. +# In sap_aperta_post_port_init(), it calls sap_bcm_linktraining_set(..., true) only if the value is 1. +# 0 means do not automatically enable LT. +plp_port_linktrain_sys=0 + +# Default enable/disable link training for the port's line side. +# The semantics are the same as plp_port_linktrain_sys, applying to the line side. +plp_port_linktrain_line=0 + +# ==================== +# Profile 1 VCO Presets +# ==================== + +# VCO selection for Profile 1, octal 0, system side. +# The 81394 code forcibly reads this and saves it to phy_info->vco_octal_0_sys. +# Confirmed from public headers: +# 0 = bcmplpVco51G +# 1 = bcmplpVco53G +# The current value 1 means 53G VCO. +# Note: In this version of the 81394 implementation, this value is read but not used further in mode_config_set. +# It seems more like a field retained to share the configuration format with other chips in the family. +plp_profile_1_init_vco_octal_0_sys=1 + +# VCO selection for Profile 1, octal 0, line side. +# The current value 1 = 53G VCO. +plp_profile_1_init_vco_octal_0_line=1 + +# VCO selection for Profile 1, octal 1, system side. +# The current board type uses only one PHY at address 0x30 and the profile uses lanes=0,1, +# but the code still requires the VCO for octal 1 to be configured, otherwise configuration parsing fails. +plp_profile_1_init_vco_octal_1_sys=1 + +# VCO selection for Profile 1, octal 1, line side. +# The current value 1 = 53G VCO. +plp_profile_1_init_vco_octal_1_line=1 + +# ==================== +# Profile 1: 100G, split=1, Single port with 4 lanes +# Key format: plp_profile__speed__split_.: +# This is changed to a single 100G port, hence split_num=1, port_id=0. +# +# In the 81394 code, split_num is not hardcoded, but calculated by: +# phy_info->lane_num / port_info->lanes +# Therefore, to target split_1.0, the init_lanes below needs to provide 4 lane entries, +# and init_ports_lane_num must be configured as 4, indicating a 4-lane aggregated port. +# ==================== + +# FEC mode for the line side. +# For the 100G 4x25G scenario, the semantics from the original file are retained, where 3 = RSFEC. +# This still uses the 25.78125G/lane NRZ path, not 2x50G PAM4. +plp_profile_1_speed_100000_split_1.0:fec_line=3 + +# FEC mode for the system side. +# Consistent with the line side, configured as 3 = RSFEC. +plp_profile_1_speed_100000_split_1.0:fec_sys=3 + +# Interface type for the line side. +# In bcm_pm_interface_t, 7 = bcm_pm_InterfaceKR4. +# This is changed from the single-lane KR to 4-lane KR4, matching the 100G 4-lane port form factor. +plp_profile_1_speed_100000_split_1.0:iftype_line=7 + +# Interface type for the system side. +# Also changed to 7 = KR4, maintaining the lane count and interface width consistency between system/line sides. +plp_profile_1_speed_100000_split_1.0:iftype_sys=7 + +# Line side lane bitmask. +# 0xF = 0000 1111b, indicating selection of 4 consecutive lanes. +# With speed=100000, the code calculates the per-lane speed as 25.78125G. +plp_profile_1_speed_100000_split_1.0:lanemap_line=0xF + +# System side lane bitmask. +# Same as the line side, indicating a 4-lane passthrough port, not a gearbox/reverse-gearbox. +plp_profile_1_speed_100000_split_1.0:lanemap_sys=0xF + +# Force NR (No Retimer) bitmap for the system side. +# Currently not forced, keep as 0. +plp_profile_1_speed_100000_split_1.0:force_nr_sys=0x0 + +# Force NR (No Retimer) bitmap for the line side. +# Currently not forced, keep as 0. +plp_profile_1_speed_100000_split_1.0:force_nr_line=0x0 + +# Force ER (Eye Retimer) bitmap for the system side. +# Currently not forced, keep as 0. +plp_profile_1_speed_100000_split_1.0:force_er_sys=0x0 + +# Force ER (Eye Retimer) bitmap for the line side. +# Currently not forced, keep as 0. +plp_profile_1_speed_100000_split_1.0:force_er_line=0x0 + + +# ==================== +# PHY List +# ==================== + +# List of PHY addresses to initialize. +# sap_aperta_config_init() generates g_bcm_phy_infos based on this array. +# Currently, there is only one PHY at address 0x30. +plp_phy_addrs=0x30 + +# ==================== +# PHY 0x30 Base Attributes +# PHY address resolution method: +# bus_id = (phy_addr & 0x7c00)>>10; +# mdio_index = (phy_addr & 0x3e0)>>5; +# phy_addr = phy_addr & 0x1f; +# return dfd_utest_mdiodev_rd(mdio_index+bus_id, phy_addr, reg_addr, data); +# ==================== + +# The unit to which the PHY is bound. +# sap_slot_init() filters by unit and card_id to determine if this PHY should be initialized in the current round. +plp_phy_unit_id:0x30=0 + +# The card/slot number the PHY belongs to. +# The PHY is initialized only when this matches the outer slot_id. +plp_phy_card_id:0x30=0 + +# The mdio_id used by this PHY. +# The code will then use this mdio_id to look up plp_mdio_accs_type:. +plp_phy_mdio_id:0x30=1 + +# PHY chip name. +# For this version of the 81394 code, this is a compatibility field, as the chip_name is hardcoded to "aperta" in the source. +# Modifying it will not change the chip name used by the driver. +plp_phy_chip_name:0x30=aperta + +# MACsec option. +# The current 81394 file only reads and saves this to phy_info->macsec_option, with no subsequent use observed. +# Therefore, this is more of a reserved field. +plp_phy_macsec_option:0x30=0x0 + +# PTP option. +# Similar to macsec_option, currently only parsed and saved, not consumed in the main 81394 flow. +plp_phy_ptp_option:0x30=0x0 + +# The initialization profile ID used by this PHY. +# The '1' in all subsequent plp_profile_1_* key names is determined by this value. +plp_phy_init_profile_id:0x30=1 + +# The lane list for this PHY under Profile 1. +# This is changed to 0,1,2,3. This does not mean 4 independent logical ports, +# but rather to make phy_info->lane_num = 4, causing the code to calculate split_num = 1. +# The number of logical ports actually created is still determined by the next line, init_ports. +plp_profile_1_init_lanes:0x30=0-3 + +# The list of logical port numbers presented externally by this PHY under Profile 1. +# Changed to create only one logical port, port 1, to carry the 1x100G module. +plp_profile_1_init_ports:0x30=1 + +# The number of lanes occupied by each logical port under Profile 1. +# Changed to a single port occupying 4 lanes. +plp_profile_1_init_ports_lane_num:0x30=4 + +# The initial speed of each logical port under Profile 1. +# Changed to 100000 Mbps for a single port, i.e., 100G. +plp_profile_1_init_speed_mode:0x30=100000 + +# ==================== +# PHY 0x30 Global Lane Swap and Polarity Configuration +# These keys apply to the entire PHY, not a single port. +# ==================== + +# System side TX lane mapping. +# This value is parsed as 8 nibbles, lane by lane. +# lane_map_tx[lane_index] = GET_LANE_SWAP_OCTAL(value, lane_index). +# 0x76543210 represents logical 0->0, 1->1, 2->2... 7->7, which is an identity mapping. +plp_phy_tx_lane_map_sys:0x30=0x76543210 + +# System side RX lane mapping. +# Currently also an identity mapping. +plp_phy_rx_lane_map_sys:0x30=0x76543210 + +# Line side TX lane mapping. +# 0x76543120 indicates a lane swap on the line side, no longer a direct passthrough. +# The code calls bcm_plp_rxtx_laneswap_set() in sap_aperta_phy_init() to apply this. +plp_phy_tx_lane_map_line:0x30=0x76542301 + +# Line side RX lane mapping. +# Currently the same as TX, indicating that RX/TX both follow the same line-side swapping rules. +plp_phy_rx_lane_map_line:0x30=0x76542301 + +# Line side TX polarity flip bitmap. +# In sap_aperta_phy_init(), the current polarity is read, XORed with this value, and then written back. +# Therefore, a bit=1 means flip the polarity for the corresponding lane; 0 means leave it unchanged. +# The current 0x0 means no polarity flip on the line side TX. +plp_tx_polarity_flip_line:0x30=0x0 + +# Line side RX polarity flip bitmap. +# The current 0x0 means no polarity flip on the line side RX. +plp_rx_polarity_flip_line:0x30=0xF + +# System side TX polarity flip bitmap. +# The current 0x0 means no polarity flip on the system side TX. +plp_tx_polarity_flip_sys:0x30=0x0 + +# System side RX polarity flip bitmap. +# The current 0x0 means no polarity flip on the system side RX. +plp_rx_polarity_flip_sys:0x30=0x0 \ No newline at end of file diff --git a/device/micas/x86_64-micas_m2-w6950-128oc-r0/M2-W6950-Q256/th6-m2-w6950-q256-256x400G.config.yml b/device/micas/x86_64-micas_m2-w6950-128oc-r0/M2-W6950-Q256/th6-m2-w6950-q256-256x400G.config.yml new file mode 100644 index 00000000000..fb087656e0c --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6950-128oc-r0/M2-W6950-Q256/th6-m2-w6950-q256-256x400G.config.yml @@ -0,0 +1,2182 @@ +--- +device: + 0: + DEVICE_CONFIG: + AUTOLOAD_BOARD_SETTINGS: 0 +... + +--- +device: + 0: + PC_PM_CORE: + ? + PC_PM_ID: 1 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x12360745 + RX_LANE_MAP: 0x34726150 + TX_POLARITY_FLIP: 0x57 + RX_POLARITY_FLIP: 0x39 + ? + PC_PM_ID: 2 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x56327140 + RX_LANE_MAP: 0x60317425 + TX_POLARITY_FLIP: 0x99 + RX_POLARITY_FLIP: 0x59 + ? + PC_PM_ID: 3 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x23145670 + RX_LANE_MAP: 0x57462103 + TX_POLARITY_FLIP: 0x6e + RX_POLARITY_FLIP: 0x19 + ? + PC_PM_ID: 4 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x45726013 + RX_LANE_MAP: 0x12360475 + TX_POLARITY_FLIP: 0x74 + RX_POLARITY_FLIP: 0x87 + ? + PC_PM_ID: 5 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x17204653 + RX_LANE_MAP: 0x54036127 + TX_POLARITY_FLIP: 0x3f + RX_POLARITY_FLIP: 0x77 + ? + PC_PM_ID: 6 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x14027653 + RX_LANE_MAP: 0x54217036 + TX_POLARITY_FLIP: 0x45 + RX_POLARITY_FLIP: 0x13 + ? + PC_PM_ID: 7 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x26351407 + RX_LANE_MAP: 0x52407163 + TX_POLARITY_FLIP: 0x43 + RX_POLARITY_FLIP: 0x10 + ? + PC_PM_ID: 8 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x45670321 + RX_LANE_MAP: 0x53274610 + TX_POLARITY_FLIP: 0xad + RX_POLARITY_FLIP: 0xd8 + ? + PC_PM_ID: 9 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x21705463 + RX_LANE_MAP: 0x46327105 + TX_POLARITY_FLIP: 0x95 + RX_POLARITY_FLIP: 0x40 + ? + PC_PM_ID: 10 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x12057463 + RX_LANE_MAP: 0x51740236 + TX_POLARITY_FLIP: 0xc8 + RX_POLARITY_FLIP: 0xf5 + ? + PC_PM_ID: 11 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x67105243 + RX_LANE_MAP: 0x40236715 + TX_POLARITY_FLIP: 0x10 + RX_POLARITY_FLIP: 0x05 + ? + PC_PM_ID: 12 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x23164507 + RX_LANE_MAP: 0x45712063 + TX_POLARITY_FLIP: 0xd7 + RX_POLARITY_FLIP: 0xb3 + ? + PC_PM_ID: 13 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x46570213 + RX_LANE_MAP: 0x71546032 + TX_POLARITY_FLIP: 0x69 + RX_POLARITY_FLIP: 0x51 + ? + PC_PM_ID: 14 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x17453206 + RX_LANE_MAP: 0x61257430 + TX_POLARITY_FLIP: 0xaa + RX_POLARITY_FLIP: 0x64 + ? + PC_PM_ID: 15 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x56327041 + RX_LANE_MAP: 0x50361427 + TX_POLARITY_FLIP: 0xe2 + RX_POLARITY_FLIP: 0xf8 + ? + PC_PM_ID: 16 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x07324651 + RX_LANE_MAP: 0x57624301 + TX_POLARITY_FLIP: 0x0d + RX_POLARITY_FLIP: 0xa0 + ? + PC_PM_ID: 17 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x01374526 + RX_LANE_MAP: 0x64751032 + TX_POLARITY_FLIP: 0x24 + RX_POLARITY_FLIP: 0x19 + ? + PC_PM_ID: 18 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x13024675 + RX_LANE_MAP: 0x61304275 + TX_POLARITY_FLIP: 0x10 + RX_POLARITY_FLIP: 0xa1 + ? + PC_PM_ID: 19 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x16452307 + RX_LANE_MAP: 0x50346721 + TX_POLARITY_FLIP: 0xc5 + RX_POLARITY_FLIP: 0xb8 + ? + PC_PM_ID: 20 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x32604571 + RX_LANE_MAP: 0x67205314 + TX_POLARITY_FLIP: 0x53 + RX_POLARITY_FLIP: 0xc0 + ? + PC_PM_ID: 21 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x46120573 + RX_LANE_MAP: 0x13526407 + TX_POLARITY_FLIP: 0x2e + RX_POLARITY_FLIP: 0xf6 + ? + PC_PM_ID: 22 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x20731645 + RX_LANE_MAP: 0x30412657 + TX_POLARITY_FLIP: 0xa0 + RX_POLARITY_FLIP: 0x04 + ? + PC_PM_ID: 23 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x13207465 + RX_LANE_MAP: 0x20316475 + TX_POLARITY_FLIP: 0x01 + RX_POLARITY_FLIP: 0x38 + ? + PC_PM_ID: 24 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x13027654 + RX_LANE_MAP: 0x61305274 + TX_POLARITY_FLIP: 0x90 + RX_POLARITY_FLIP: 0x88 + ? + PC_PM_ID: 25 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x23107465 + RX_LANE_MAP: 0x32107654 + TX_POLARITY_FLIP: 0x62 + RX_POLARITY_FLIP: 0x99 + ? + PC_PM_ID: 26 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x20731645 + RX_LANE_MAP: 0x03612547 + TX_POLARITY_FLIP: 0xed + RX_POLARITY_FLIP: 0xf7 + ? + PC_PM_ID: 27 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x13027654 + RX_LANE_MAP: 0x62307145 + TX_POLARITY_FLIP: 0x9d + RX_POLARITY_FLIP: 0xaa + ? + PC_PM_ID: 28 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x31064752 + RX_LANE_MAP: 0x02135764 + TX_POLARITY_FLIP: 0xf5 + RX_POLARITY_FLIP: 0xca + ? + PC_PM_ID: 29 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x12357064 + RX_LANE_MAP: 0x03216457 + TX_POLARITY_FLIP: 0x81 + RX_POLARITY_FLIP: 0x23 + ? + PC_PM_ID: 30 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x32106745 + RX_LANE_MAP: 0x61034275 + TX_POLARITY_FLIP: 0x11 + RX_POLARITY_FLIP: 0xc6 + ? + PC_PM_ID: 31 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x32014756 + RX_LANE_MAP: 0x13024576 + TX_POLARITY_FLIP: 0x20 + RX_POLARITY_FLIP: 0xce + ? + PC_PM_ID: 32 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x02376154 + RX_LANE_MAP: 0x03612547 + TX_POLARITY_FLIP: 0xd5 + RX_POLARITY_FLIP: 0xef + ? + PC_PM_ID: 33 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x02137564 + RX_LANE_MAP: 0x02637154 + TX_POLARITY_FLIP: 0xe7 + RX_POLARITY_FLIP: 0x20 + ? + PC_PM_ID: 34 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x01375264 + RX_LANE_MAP: 0x23507164 + TX_POLARITY_FLIP: 0x7f + RX_POLARITY_FLIP: 0x01 + ? + PC_PM_ID: 35 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x02134765 + RX_LANE_MAP: 0x13026745 + TX_POLARITY_FLIP: 0x1b + RX_POLARITY_FLIP: 0x82 + ? + PC_PM_ID: 36 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x23016745 + RX_LANE_MAP: 0x30162745 + TX_POLARITY_FLIP: 0xe6 + RX_POLARITY_FLIP: 0xc9 + ? + PC_PM_ID: 37 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x30412675 + RX_LANE_MAP: 0x32051674 + TX_POLARITY_FLIP: 0xa7 + RX_POLARITY_FLIP: 0x1b + ? + PC_PM_ID: 38 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x20314756 + RX_LANE_MAP: 0x10324576 + TX_POLARITY_FLIP: 0x73 + RX_POLARITY_FLIP: 0x91 + ? + PC_PM_ID: 39 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x20315746 + RX_LANE_MAP: 0x01534267 + TX_POLARITY_FLIP: 0x93 + RX_POLARITY_FLIP: 0x29 + ? + PC_PM_ID: 40 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x10732546 + RX_LANE_MAP: 0x23507164 + TX_POLARITY_FLIP: 0xdf + RX_POLARITY_FLIP: 0x81 + ? + PC_PM_ID: 41 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x07324651 + RX_LANE_MAP: 0x46357201 + TX_POLARITY_FLIP: 0xdf + RX_POLARITY_FLIP: 0x3a + ? + PC_PM_ID: 42 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x10324756 + RX_LANE_MAP: 0x10325746 + TX_POLARITY_FLIP: 0xbb + RX_POLARITY_FLIP: 0xee + ? + PC_PM_ID: 43 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x65073421 + RX_LANE_MAP: 0x53026714 + TX_POLARITY_FLIP: 0x7e + RX_POLARITY_FLIP: 0xc5 + ? + PC_PM_ID: 44 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x21057463 + RX_LANE_MAP: 0x47513260 + TX_POLARITY_FLIP: 0x65 + RX_POLARITY_FLIP: 0x07 + ? + PC_PM_ID: 45 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x47061235 + RX_LANE_MAP: 0x41276530 + TX_POLARITY_FLIP: 0x34 + RX_POLARITY_FLIP: 0xf1 + ? + PC_PM_ID: 46 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x02375164 + RX_LANE_MAP: 0x01437265 + TX_POLARITY_FLIP: 0x2b + RX_POLARITY_FLIP: 0xc6 + ? + PC_PM_ID: 47 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x01237564 + RX_LANE_MAP: 0x13607254 + TX_POLARITY_FLIP: 0xdb + RX_POLARITY_FLIP: 0x44 + ? + PC_PM_ID: 48 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x02137564 + RX_LANE_MAP: 0x13025476 + TX_POLARITY_FLIP: 0x74 + RX_POLARITY_FLIP: 0xce + ? + PC_PM_ID: 49 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x70152643 + RX_LANE_MAP: 0x76512043 + TX_POLARITY_FLIP: 0x73 + RX_POLARITY_FLIP: 0x55 + ? + PC_PM_ID: 50 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x04635271 + RX_LANE_MAP: 0x67235014 + TX_POLARITY_FLIP: 0xde + RX_POLARITY_FLIP: 0x25 + ? + PC_PM_ID: 51 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x76540213 + RX_LANE_MAP: 0x51376240 + TX_POLARITY_FLIP: 0xf1 + RX_POLARITY_FLIP: 0xc4 + ? + PC_PM_ID: 52 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x12375460 + RX_LANE_MAP: 0x54261037 + TX_POLARITY_FLIP: 0xe1 + RX_POLARITY_FLIP: 0x0f + ? + PC_PM_ID: 53 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x64301572 + RX_LANE_MAP: 0x63107425 + TX_POLARITY_FLIP: 0x5f + RX_POLARITY_FLIP: 0x17 + ? + PC_PM_ID: 54 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x45213670 + RX_LANE_MAP: 0x41062537 + TX_POLARITY_FLIP: 0xc6 + RX_POLARITY_FLIP: 0x08 + ? + PC_PM_ID: 55 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x25461073 + RX_LANE_MAP: 0x73215640 + TX_POLARITY_FLIP: 0xec + RX_POLARITY_FLIP: 0x0e + ? + PC_PM_ID: 56 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x30264571 + RX_LANE_MAP: 0x67452031 + TX_POLARITY_FLIP: 0x38 + RX_POLARITY_FLIP: 0x55 + ? + PC_PM_ID: 57 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x36270154 + RX_LANE_MAP: 0x36270154 + TX_POLARITY_FLIP: 0x89 + RX_POLARITY_FLIP: 0x23 + ? + PC_PM_ID: 58 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x02736154 + RX_LANE_MAP: 0x20341765 + TX_POLARITY_FLIP: 0xe0 + RX_POLARITY_FLIP: 0x7f + ? + PC_PM_ID: 59 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x32105764 + RX_LANE_MAP: 0x23017654 + TX_POLARITY_FLIP: 0xb5 + RX_POLARITY_FLIP: 0x96 + ? + PC_PM_ID: 60 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x63721045 + RX_LANE_MAP: 0x36270154 + TX_POLARITY_FLIP: 0x50 + RX_POLARITY_FLIP: 0x33 + ? + PC_PM_ID: 61 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x02341675 + RX_LANE_MAP: 0x02341675 + TX_POLARITY_FLIP: 0x20 + RX_POLARITY_FLIP: 0xc7 + ? + PC_PM_ID: 62 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x23106457 + RX_LANE_MAP: 0x23106754 + TX_POLARITY_FLIP: 0x90 + RX_POLARITY_FLIP: 0x26 + ? + PC_PM_ID: 63 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x63721045 + RX_LANE_MAP: 0x36170254 + TX_POLARITY_FLIP: 0x46 + RX_POLARITY_FLIP: 0x73 + ? + PC_PM_ID: 64 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x20371645 + RX_LANE_MAP: 0x20341765 + TX_POLARITY_FLIP: 0xd0 + RX_POLARITY_FLIP: 0x7f + ? + PC_PM_ID: 65 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x36270154 + RX_LANE_MAP: 0x63721045 + TX_POLARITY_FLIP: 0x7a + RX_POLARITY_FLIP: 0xec + ? + PC_PM_ID: 66 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x02736154 + RX_LANE_MAP: 0x02437156 + TX_POLARITY_FLIP: 0x13 + RX_POLARITY_FLIP: 0x40 + ? + PC_PM_ID: 67 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x32105764 + RX_LANE_MAP: 0x32106745 + TX_POLARITY_FLIP: 0x46 + RX_POLARITY_FLIP: 0x96 + ? + PC_PM_ID: 68 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x63721045 + RX_LANE_MAP: 0x63721045 + TX_POLARITY_FLIP: 0xa3 + RX_POLARITY_FLIP: 0xcc + ? + PC_PM_ID: 69 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x02341675 + RX_LANE_MAP: 0x20436157 + TX_POLARITY_FLIP: 0xd3 + RX_POLARITY_FLIP: 0x34 + ? + PC_PM_ID: 70 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x23106457 + RX_LANE_MAP: 0x32017645 + TX_POLARITY_FLIP: 0x63 + RX_POLARITY_FLIP: 0xe6 + ? + PC_PM_ID: 71 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x63721045 + RX_LANE_MAP: 0x63712045 + TX_POLARITY_FLIP: 0xb5 + RX_POLARITY_FLIP: 0x4c + ? + PC_PM_ID: 72 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x20371645 + RX_LANE_MAP: 0x02437156 + TX_POLARITY_FLIP: 0x23 + RX_POLARITY_FLIP: 0x40 + ? + PC_PM_ID: 73 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x13762540 + RX_LANE_MAP: 0x51764320 + TX_POLARITY_FLIP: 0xe0 + RX_POLARITY_FLIP: 0xaa + ? + PC_PM_ID: 74 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x62135470 + RX_LANE_MAP: 0x64025317 + TX_POLARITY_FLIP: 0xa0 + RX_POLARITY_FLIP: 0xea + ? + PC_PM_ID: 75 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x54761302 + RX_LANE_MAP: 0x50326741 + TX_POLARITY_FLIP: 0x0b + RX_POLARITY_FLIP: 0x7e + ? + PC_PM_ID: 76 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x34075261 + RX_LANE_MAP: 0x57021634 + TX_POLARITY_FLIP: 0x5a + RX_POLARITY_FLIP: 0xf0 + ? + PC_PM_ID: 77 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x75201463 + RX_LANE_MAP: 0x70126435 + TX_POLARITY_FLIP: 0xe4 + RX_POLARITY_FLIP: 0xaa + ? + PC_PM_ID: 78 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x67013542 + RX_LANE_MAP: 0x26034517 + TX_POLARITY_FLIP: 0xde + RX_POLARITY_FLIP: 0x7f + ? + PC_PM_ID: 79 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x46257310 + RX_LANE_MAP: 0x70265143 + TX_POLARITY_FLIP: 0x4c + RX_POLARITY_FLIP: 0xf5 + ? + PC_PM_ID: 80 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x21354670 + RX_LANE_MAP: 0x45673120 + TX_POLARITY_FLIP: 0xab + RX_POLARITY_FLIP: 0xaa + ? + PC_PM_ID: 81 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x36124750 + RX_LANE_MAP: 0x41237506 + TX_POLARITY_FLIP: 0x80 + RX_POLARITY_FLIP: 0x84 + ? + PC_PM_ID: 82 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x10324756 + RX_LANE_MAP: 0x01237564 + TX_POLARITY_FLIP: 0xbb + RX_POLARITY_FLIP: 0xdd + ? + PC_PM_ID: 83 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x24173560 + RX_LANE_MAP: 0x62015734 + TX_POLARITY_FLIP: 0xc5 + RX_POLARITY_FLIP: 0xf0 + ? + PC_PM_ID: 84 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x03247561 + RX_LANE_MAP: 0x51476032 + TX_POLARITY_FLIP: 0xf6 + RX_POLARITY_FLIP: 0xf2 + ? + PC_PM_ID: 85 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x06473512 + RX_LANE_MAP: 0x40256731 + TX_POLARITY_FLIP: 0x3e + RX_POLARITY_FLIP: 0x0a + ? + PC_PM_ID: 86 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x02375164 + RX_LANE_MAP: 0x10342756 + TX_POLARITY_FLIP: 0x2b + RX_POLARITY_FLIP: 0xc9 + ? + PC_PM_ID: 87 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x01237564 + RX_LANE_MAP: 0x31062745 + TX_POLARITY_FLIP: 0xdb + RX_POLARITY_FLIP: 0x88 + ? + PC_PM_ID: 88 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x02137564 + RX_LANE_MAP: 0x31204567 + TX_POLARITY_FLIP: 0x74 + RX_POLARITY_FLIP: 0xcd + ? + PC_PM_ID: 89 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x64751302 + RX_LANE_MAP: 0x45173620 + TX_POLARITY_FLIP: 0x24 + RX_POLARITY_FLIP: 0xfb + ? + PC_PM_ID: 90 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x01375264 + RX_LANE_MAP: 0x32051746 + TX_POLARITY_FLIP: 0x7f + RX_POLARITY_FLIP: 0x02 + ? + PC_PM_ID: 91 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x65471302 + RX_LANE_MAP: 0x54762031 + TX_POLARITY_FLIP: 0x1b + RX_POLARITY_FLIP: 0xbe + ? + PC_PM_ID: 92 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x45670123 + RX_LANE_MAP: 0x54726103 + TX_POLARITY_FLIP: 0x64 + RX_POLARITY_FLIP: 0x6c + ? + PC_PM_ID: 93 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x75264130 + RX_LANE_MAP: 0x47615023 + TX_POLARITY_FLIP: 0x25 + RX_POLARITY_FLIP: 0x27 + ? + PC_PM_ID: 94 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x20314756 + RX_LANE_MAP: 0x10324576 + TX_POLARITY_FLIP: 0x73 + RX_POLARITY_FLIP: 0x91 + ? + PC_PM_ID: 95 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x20315746 + RX_LANE_MAP: 0x10352476 + TX_POLARITY_FLIP: 0x93 + RX_POLARITY_FLIP: 0x16 + ? + PC_PM_ID: 96 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x10732546 + RX_LANE_MAP: 0x32051746 + TX_POLARITY_FLIP: 0xdf + RX_POLARITY_FLIP: 0x42 + ? + PC_PM_ID: 97 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x65741023 + RX_LANE_MAP: 0x45670123 + TX_POLARITY_FLIP: 0x76 + RX_POLARITY_FLIP: 0x66 + ? + PC_PM_ID: 98 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x45167320 + RX_LANE_MAP: 0x74521630 + TX_POLARITY_FLIP: 0x84 + RX_POLARITY_FLIP: 0x10 + ? + PC_PM_ID: 99 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x54760213 + RX_LANE_MAP: 0x45713062 + TX_POLARITY_FLIP: 0x89 + RX_POLARITY_FLIP: 0x55 + ? + PC_PM_ID: 100 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x52470631 + RX_LANE_MAP: 0x46753120 + TX_POLARITY_FLIP: 0xa0 + RX_POLARITY_FLIP: 0xac + ? + PC_PM_ID: 101 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x64703512 + RX_LANE_MAP: 0x75461230 + TX_POLARITY_FLIP: 0xbd + RX_POLARITY_FLIP: 0x3b + ? + PC_PM_ID: 102 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x45671032 + RX_LANE_MAP: 0x57243016 + TX_POLARITY_FLIP: 0xbb + RX_POLARITY_FLIP: 0x9c + ? + PC_PM_ID: 103 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x56470132 + RX_LANE_MAP: 0x67542031 + TX_POLARITY_FLIP: 0xf7 + RX_POLARITY_FLIP: 0x8c + ? + PC_PM_ID: 104 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x54613702 + RX_LANE_MAP: 0x74521630 + TX_POLARITY_FLIP: 0xa8 + RX_POLARITY_FLIP: 0x08 + ? + PC_PM_ID: 105 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x36054721 + RX_LANE_MAP: 0x75643210 + TX_POLARITY_FLIP: 0xb7 + RX_POLARITY_FLIP: 0xb9 + ? + PC_PM_ID: 106 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x75642031 + RX_LANE_MAP: 0x57240316 + TX_POLARITY_FLIP: 0xf7 + RX_POLARITY_FLIP: 0x7a + ? + PC_PM_ID: 107 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x45160723 + RX_LANE_MAP: 0x51376420 + TX_POLARITY_FLIP: 0xca + RX_POLARITY_FLIP: 0x43 + ? + PC_PM_ID: 108 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x65104273 + RX_LANE_MAP: 0x64325017 + TX_POLARITY_FLIP: 0xc9 + RX_POLARITY_FLIP: 0x1b + ? + PC_PM_ID: 109 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x75320641 + RX_LANE_MAP: 0x62501437 + TX_POLARITY_FLIP: 0xd1 + RX_POLARITY_FLIP: 0x81 + ? + PC_PM_ID: 110 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x45167320 + RX_LANE_MAP: 0x75621403 + TX_POLARITY_FLIP: 0xf5 + RX_POLARITY_FLIP: 0xdf + ? + PC_PM_ID: 111 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x65742013 + RX_LANE_MAP: 0x57461302 + TX_POLARITY_FLIP: 0xbf + RX_POLARITY_FLIP: 0xe3 + ? + PC_PM_ID: 112 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x54760213 + RX_LANE_MAP: 0x47250316 + TX_POLARITY_FLIP: 0xf9 + RX_POLARITY_FLIP: 0xee + ? + PC_PM_ID: 113 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x74305162 + RX_LANE_MAP: 0x75014236 + TX_POLARITY_FLIP: 0x8e + RX_POLARITY_FLIP: 0x01 + ? + PC_PM_ID: 114 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x03147562 + RX_LANE_MAP: 0x74513602 + TX_POLARITY_FLIP: 0x0e + RX_POLARITY_FLIP: 0x0a + ? + PC_PM_ID: 115 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x42305761 + RX_LANE_MAP: 0x63214705 + TX_POLARITY_FLIP: 0x08 + RX_POLARITY_FLIP: 0xfa + ? + PC_PM_ID: 116 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x17254603 + RX_LANE_MAP: 0x71456320 + TX_POLARITY_FLIP: 0x50 + RX_POLARITY_FLIP: 0x13 + ? + PC_PM_ID: 117 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x57461302 + RX_LANE_MAP: 0x72506431 + TX_POLARITY_FLIP: 0x69 + RX_POLARITY_FLIP: 0xaa + ? + PC_PM_ID: 118 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x45170632 + RX_LANE_MAP: 0x60247531 + TX_POLARITY_FLIP: 0x55 + RX_POLARITY_FLIP: 0xde + ? + PC_PM_ID: 119 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x40127653 + RX_LANE_MAP: 0x16325407 + TX_POLARITY_FLIP: 0x9f + RX_POLARITY_FLIP: 0x15 + ? + PC_PM_ID: 120 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x36124750 + RX_LANE_MAP: 0x41035267 + TX_POLARITY_FLIP: 0x97 + RX_POLARITY_FLIP: 0x0a + ? + PC_PM_ID: 121 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x36124507 + RX_LANE_MAP: 0x30716254 + TX_POLARITY_FLIP: 0xa2 + RX_POLARITY_FLIP: 0x83 + ? + PC_PM_ID: 122 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x41027653 + RX_LANE_MAP: 0x71326405 + TX_POLARITY_FLIP: 0x22 + RX_POLARITY_FLIP: 0x3c + ? + PC_PM_ID: 123 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x10265473 + RX_LANE_MAP: 0x46570321 + TX_POLARITY_FLIP: 0xbc + RX_POLARITY_FLIP: 0xb9 + ? + PC_PM_ID: 124 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x10327546 + RX_LANE_MAP: 0x06371425 + TX_POLARITY_FLIP: 0x44 + RX_POLARITY_FLIP: 0xe2 + ? + PC_PM_ID: 125 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x26304751 + RX_LANE_MAP: 0x67215304 + TX_POLARITY_FLIP: 0x05 + RX_POLARITY_FLIP: 0x77 + ? + PC_PM_ID: 126 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x06327451 + RX_LANE_MAP: 0x76305124 + TX_POLARITY_FLIP: 0x9b + RX_POLARITY_FLIP: 0x64 + ? + PC_PM_ID: 127 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x37241506 + RX_LANE_MAP: 0x40526371 + TX_POLARITY_FLIP: 0x64 + RX_POLARITY_FLIP: 0xbf + ? + PC_PM_ID: 128 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x67452103 + RX_LANE_MAP: 0x50264713 + TX_POLARITY_FLIP: 0x58 + RX_POLARITY_FLIP: 0x62 + ? + PC_PM_ID: 129 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x0123 + RX_LANE_MAP: 0x0123 + TX_POLARITY_FLIP: 0x0 + RX_POLARITY_FLIP: 0x0 +... + +--- +device: + 0: + PC_PORT_PHYS_MAP: + ? + # CPU port + PORT_ID: 0 + : + PC_PHYS_PORT_ID: 0 + ? + PORT_ID: 13 + : + PC_PHYS_PORT_ID: 1 + ? + PORT_ID: 105 + : + PC_PHYS_PORT_ID: 185 + ? + PORT_ID: 120 + : + PC_PHYS_PORT_ID: 193 + ? + PORT_ID: 121 + : + PC_PHYS_PORT_ID: 201 + ? + PORT_ID: 122 + : + PC_PHYS_PORT_ID: 209 + ? + PORT_ID: 123 + : + PC_PHYS_PORT_ID: 217 + ? + PORT_ID: 138 + : + PC_PHYS_PORT_ID: 225 + ? + PORT_ID: 16 + : + PC_PHYS_PORT_ID: 25 + ? + PORT_ID: 139 + : + PC_PHYS_PORT_ID: 233 + ? + PORT_ID: 140 + : + PC_PHYS_PORT_ID: 241 + ? + PORT_ID: 141 + : + PC_PHYS_PORT_ID: 249 + ? + PORT_ID: 156 + : + PC_PHYS_PORT_ID: 257 + ? + PORT_ID: 157 + : + PC_PHYS_PORT_ID: 265 + ? + PORT_ID: 158 + : + PC_PHYS_PORT_ID: 273 + ? + PORT_ID: 159 + : + PC_PHYS_PORT_ID: 281 + ? + PORT_ID: 174 + : + PC_PHYS_PORT_ID: 289 + ? + PORT_ID: 175 + : + PC_PHYS_PORT_ID: 297 + ? + PORT_ID: 176 + : + PC_PHYS_PORT_ID: 305 + ? + PORT_ID: 177 + : + PC_PHYS_PORT_ID: 313 + ? + PORT_ID: 30 + : + PC_PHYS_PORT_ID: 33 + ? + PORT_ID: 192 + : + PC_PHYS_PORT_ID: 321 + ? + PORT_ID: 193 + : + PC_PHYS_PORT_ID: 329 + ? + PORT_ID: 194 + : + PC_PHYS_PORT_ID: 337 + ? + PORT_ID: 195 + : + PC_PHYS_PORT_ID: 345 + ? + PORT_ID: 210 + : + PC_PHYS_PORT_ID: 353 + ? + PORT_ID: 211 + : + PC_PHYS_PORT_ID: 361 + ? + PORT_ID: 212 + : + PC_PHYS_PORT_ID: 369 + ? + PORT_ID: 213 + : + PC_PHYS_PORT_ID: 377 + ? + PORT_ID: 228 + : + PC_PHYS_PORT_ID: 385 + ? + PORT_ID: 31 + : + PC_PHYS_PORT_ID: 41 + ? + PORT_ID: 229 + : + PC_PHYS_PORT_ID: 393 + ? + PORT_ID: 230 + : + PC_PHYS_PORT_ID: 401 + ? + PORT_ID: 231 + : + PC_PHYS_PORT_ID: 409 + ? + PORT_ID: 246 + : + PC_PHYS_PORT_ID: 417 + ? + PORT_ID: 247 + : + PC_PHYS_PORT_ID: 425 + ? + PORT_ID: 248 + : + PC_PHYS_PORT_ID: 433 + ? + PORT_ID: 249 + : + PC_PHYS_PORT_ID: 441 + ? + PORT_ID: 264 + : + PC_PHYS_PORT_ID: 449 + ? + PORT_ID: 265 + : + PC_PHYS_PORT_ID: 457 + ? + PORT_ID: 32 + : + PC_PHYS_PORT_ID: 49 + ? + PORT_ID: 266 + : + PC_PHYS_PORT_ID: 465 + ? + PORT_ID: 267 + : + PC_PHYS_PORT_ID: 473 + ? + PORT_ID: 282 + : + PC_PHYS_PORT_ID: 481 + ? + PORT_ID: 283 + : + PC_PHYS_PORT_ID: 489 + ? + PORT_ID: 284 + : + PC_PHYS_PORT_ID: 497 + ? + PORT_ID: 285 + : + PC_PHYS_PORT_ID: 505 + ? + PORT_ID: 300 + : + PC_PHYS_PORT_ID: 513 + ? + PORT_ID: 301 + : + PC_PHYS_PORT_ID: 521 + ? + PORT_ID: 302 + : + PC_PHYS_PORT_ID: 529 + ? + PORT_ID: 33 + : + PC_PHYS_PORT_ID: 57 + ? + PORT_ID: 303 + : + PC_PHYS_PORT_ID: 537 + ? + PORT_ID: 318 + : + PC_PHYS_PORT_ID: 545 + ? + PORT_ID: 319 + : + PC_PHYS_PORT_ID: 553 + ? + PORT_ID: 320 + : + PC_PHYS_PORT_ID: 561 + ? + PORT_ID: 321 + : + PC_PHYS_PORT_ID: 569 + ? + PORT_ID: 336 + : + PC_PHYS_PORT_ID: 577 + ? + PORT_ID: 337 + : + PC_PHYS_PORT_ID: 585 + ? + PORT_ID: 338 + : + PC_PHYS_PORT_ID: 593 + ? + PORT_ID: 339 + : + PC_PHYS_PORT_ID: 601 + ? + PORT_ID: 354 + : + PC_PHYS_PORT_ID: 609 + ? + PORT_ID: 355 + : + PC_PHYS_PORT_ID: 617 + ? + PORT_ID: 356 + : + PC_PHYS_PORT_ID: 625 + ? + PORT_ID: 357 + : + PC_PHYS_PORT_ID: 633 + ? + PORT_ID: 48 + : + PC_PHYS_PORT_ID: 65 + ? + PORT_ID: 372 + : + PC_PHYS_PORT_ID: 641 + ? + PORT_ID: 373 + : + PC_PHYS_PORT_ID: 649 + ? + PORT_ID: 374 + : + PC_PHYS_PORT_ID: 657 + ? + PORT_ID: 375 + : + PC_PHYS_PORT_ID: 665 + ? + PORT_ID: 390 + : + PC_PHYS_PORT_ID: 673 + ? + PORT_ID: 391 + : + PC_PHYS_PORT_ID: 681 + ? + PORT_ID: 392 + : + PC_PHYS_PORT_ID: 689 + ? + PORT_ID: 393 + : + PC_PHYS_PORT_ID: 697 + ? + PORT_ID: 408 + : + PC_PHYS_PORT_ID: 705 + ? + PORT_ID: 49 + : + PC_PHYS_PORT_ID: 73 + ? + PORT_ID: 409 + : + PC_PHYS_PORT_ID: 713 + ? + PORT_ID: 410 + : + PC_PHYS_PORT_ID: 721 + ? + PORT_ID: 411 + : + PC_PHYS_PORT_ID: 729 + ? + PORT_ID: 426 + : + PC_PHYS_PORT_ID: 737 + ? + PORT_ID: 427 + : + PC_PHYS_PORT_ID: 745 + ? + PORT_ID: 428 + : + PC_PHYS_PORT_ID: 753 + ? + PORT_ID: 429 + : + PC_PHYS_PORT_ID: 761 + ? + PORT_ID: 444 + : + PC_PHYS_PORT_ID: 769 + ? + PORT_ID: 445 + : + PC_PHYS_PORT_ID: 777 + ? + PORT_ID: 50 + : + PC_PHYS_PORT_ID: 81 + ? + PORT_ID: 446 + : + PC_PHYS_PORT_ID: 785 + ? + PORT_ID: 447 + : + PC_PHYS_PORT_ID: 793 + ? + PORT_ID: 462 + : + PC_PHYS_PORT_ID: 801 + ? + PORT_ID: 463 + : + PC_PHYS_PORT_ID: 809 + ? + PORT_ID: 464 + : + PC_PHYS_PORT_ID: 817 + ? + PORT_ID: 465 + : + PC_PHYS_PORT_ID: 825 + ? + PORT_ID: 480 + : + PC_PHYS_PORT_ID: 833 + ? + PORT_ID: 481 + : + PC_PHYS_PORT_ID: 841 + ? + PORT_ID: 482 + : + PC_PHYS_PORT_ID: 849 + ? + PORT_ID: 51 + : + PC_PHYS_PORT_ID: 89 + ? + PORT_ID: 483 + : + PC_PHYS_PORT_ID: 857 + ? + PORT_ID: 498 + : + PC_PHYS_PORT_ID: 865 + ? + PORT_ID: 499 + : + PC_PHYS_PORT_ID: 873 + ? + PORT_ID: 500 + : + PC_PHYS_PORT_ID: 881 + ? + PORT_ID: 501 + : + PC_PHYS_PORT_ID: 889 + ? + PORT_ID: 14 + : + PC_PHYS_PORT_ID: 9 + ? + PORT_ID: 516 + : + PC_PHYS_PORT_ID: 897 + ? + PORT_ID: 517 + : + PC_PHYS_PORT_ID: 905 + ? + PORT_ID: 518 + : + PC_PHYS_PORT_ID: 913 + ? + PORT_ID: 519 + : + PC_PHYS_PORT_ID: 921 + ? + PORT_ID: 534 + : + PC_PHYS_PORT_ID: 929 + ? + PORT_ID: 535 + : + PC_PHYS_PORT_ID: 937 + ? + PORT_ID: 536 + : + PC_PHYS_PORT_ID: 945 + ? + PORT_ID: 537 + : + PC_PHYS_PORT_ID: 953 + ? + PORT_ID: 66 + : + PC_PHYS_PORT_ID: 97 + ? + PORT_ID: 552 + : + PC_PHYS_PORT_ID: 961 + ? + PORT_ID: 553 + : + PC_PHYS_PORT_ID: 969 + ? + PORT_ID: 554 + : + PC_PHYS_PORT_ID: 977 + ? + PORT_ID: 555 + : + PC_PHYS_PORT_ID: 985 + ? + PORT_ID: 570 + : + PC_PHYS_PORT_ID: 993 + ? + PORT_ID: 571 + : + PC_PHYS_PORT_ID: 1001 + ? + PORT_ID: 572 + : + PC_PHYS_PORT_ID: 1009 + ? + PORT_ID: 573 + : + PC_PHYS_PORT_ID: 1017 + ? + PORT_ID: 67 + : + PC_PHYS_PORT_ID: 105 + ? + PORT_ID: 68 + : + PC_PHYS_PORT_ID: 113 + ? + PORT_ID: 69 + : + PC_PHYS_PORT_ID: 121 + ? + PORT_ID: 84 + : + PC_PHYS_PORT_ID: 129 + ? + PORT_ID: 85 + : + PC_PHYS_PORT_ID: 137 + ? + PORT_ID: 86 + : + PC_PHYS_PORT_ID: 145 + ? + PORT_ID: 87 + : + PC_PHYS_PORT_ID: 153 + ? + PORT_ID: 15 + : + PC_PHYS_PORT_ID: 17 + ? + PORT_ID: 102 + : + PC_PHYS_PORT_ID: 161 + ? + PORT_ID: 103 + : + PC_PHYS_PORT_ID: 169 + ? + PORT_ID: 104 + : + PC_PHYS_PORT_ID: 177 + ? + PORT_ID: 268 + : + PC_PHYS_PORT_ID: 1026 + PC_PORT: + ? + PORT_ID: 0 + : + ENABLE: 1 + SPEED: 10000 + NUM_LANES: 1 + ? + PORT_ID: [13, 14, 15, 16, 30, 31, 32, 33, 48, 49, 50, 51, 66, 67, 68, 69, 84, 85, 86, 87, 102, 103, 104, 105, 120, 121, 122, 123, 138, 139, 140, 141, 156, 157, 158, 159, 174, 175, 176, 177, 192, 193, 194, 195, 210, 211, 212, 213, 228, 229, 230, 231, 246, 247, 248, 249, 264, 265, 266, 267, 282, 283, 284, 285, 300, 301, 302, 303, 318, 319, 320, 321, 336, 337, 338, 339, 354, 355, 356, 357, 372, 373, 374, 375, 390, 391, 392, 393, 408, 409, 410, 411, 426, 427, 428, 429, 444, 445, 446, 447, 462, 463, 464, 465, 480, 481, 482, 483, 498, 499, 500, 501, 516, 517, 518, 519, 534, 535, 536, 537, 552, 553, 554, 555, 570, 571, 572, 573] + : + ENABLE: 1 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + LINK_TRAINING: 0 + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: [268] + : + ENABLE: 1 + SPEED: 100000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS528 + LINK_TRAINING: 0 + MAX_FRAME_SIZE: 9416 +... + +--- +device: + 0: + PC_PMD_FIRMWARE: + ? + PORT_ID: [13, 14, 15, 16, 30, 31, 32, 33, 48, 49, 50, 51, 66, 67, 68, 69, 84, 85, 86, 87, 102, 103, 104, 105, 120, 121, 122, 123, 138, 139, 140, 141, 156, 157, 158, 159, 174, 175, 176, 177, 192, 193, 194, 195, 210, 211, 212, 213, 228, 229, 230, 231, 246, 247, 248, 249, 264, 265, 266, 267, 282, 283, 284, 285, 300, 301, 302, 303, 318, 319, 320, 321, 336, 337, 338, 339, 354, 355, 356, 357, 372, 373, 374, 375, 390, 391, 392, 393, 408, 409, 410, 411, 426, 427, 428, 429, 444, 445, 446, 447, 462, 463, 464, 465, 480, 481, 482, 483, 498, 499, 500, 501, 516, 517, 518, 519, 534, 535, 536, 537, 552, 553, 554, 555, 570, 571, 572, 573] + : + MEDIUM_TYPE_AUTO: 0 + MEDIUM_TYPE: PC_PHY_MEDIUM_BACKPLANE + ? + PORT_ID: [268] + : + MEDIUM_TYPE_AUTO: 0 + MEDIUM_TYPE: PC_PHY_MEDIUM_BACKPLANE +... + +--- +device: + 0: + TM_SCHEDULER_CONFIG: + NUM_MC_Q: NUM_MC_Q_4 +... + +--- +bcm_device: + 0: + global: + bcm_tunnel_term_compatible_mode: 1 + vlan_flooding_l2mc_num_reserved: 2048 + l3_alpm_template: 2 + l3_alpm2_bnk_threshold: 100 + uft_mode: 1 + l3_enable: 1 + l2_hitbit_enable: 0 + stat_custom_receive0_management_mode: 1 + pktio_mode: 1 + sai_pfc_defaults_disable: 1 + sai_mac_policy_vfp_group: 0 + sai_skip_create_sys_efp_grp: 1 + sai_rdma_udf_disable: 1 + sai_trap_fp_action_drop_copy_to_cpu: 1 + sai_crm_hw_nh_group_cnt: 0 + riot_overlay_l3_intf_mem_size: 4096 + riot_overlay_l3_egress_mem_size: 8192 + l3_ecmp_member_first_lkup_mem_size: 8192 + l3_ecmp_member_secondary_mem_size: 8192 + failover_fixed_nh_offset_enable: 1 + sai_optimized_mmu: 0 + sai_async_fdb_nbr_enable: 1 + bcm_linkscan_interval: 100000 + sai_pfc_dlr_init_capability: 2 + sai_stats_support_mask: 0x804 +... + +--- +device: + 0: + # IFP mode + FP_CONFIG: + FP_ING_OPERMODE: GLOBAL_PIPE_AWARE +... + +--- +bcm_device: + 0: + port: + "*": + encap_mode: IEEE +... diff --git a/device/micas/x86_64-micas_m2-w6950-128oc-r0/bmc.json b/device/micas/x86_64-micas_m2-w6950-128oc-r0/bmc.json new file mode 100644 index 00000000000..93af8e0bf29 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6950-128oc-r0/bmc.json @@ -0,0 +1,6 @@ +{ + "bmc_if_name": "usb0", + "bmc_if_addr": "169.254.100.2", + "bmc_addr": "169.254.100.1", + "bmc_net_mask": "255.255.255.252" +} \ No newline at end of file diff --git a/device/micas/x86_64-micas_m2-w6950-128oc-r0/custom_led.bin b/device/micas/x86_64-micas_m2-w6950-128oc-r0/custom_led.bin new file mode 100644 index 00000000000..e87dc0cf82f Binary files /dev/null and b/device/micas/x86_64-micas_m2-w6950-128oc-r0/custom_led.bin differ diff --git a/device/micas/x86_64-micas_m2-w6950-128oc-r0/default_sku b/device/micas/x86_64-micas_m2-w6950-128oc-r0/default_sku new file mode 100644 index 00000000000..6f88352d2c3 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6950-128oc-r0/default_sku @@ -0,0 +1 @@ +M2-W6950-O128 l2 diff --git a/device/micas/x86_64-micas_m2-w6950-128oc-r0/dev.xml b/device/micas/x86_64-micas_m2-w6950-128oc-r0/dev.xml new file mode 100644 index 00000000000..3da8d7a760c --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6950-128oc-r0/dev.xml @@ -0,0 +1,154 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/device/micas/x86_64-micas_m2-w6950-128oc-r0/fru.py b/device/micas/x86_64-micas_m2-w6950-128oc-r0/fru.py new file mode 100644 index 00000000000..f95164e0360 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6950-128oc-r0/fru.py @@ -0,0 +1,961 @@ +#!/usr/bin/python3 +import collections +from datetime import datetime, timedelta +from bitarray import bitarray + + +__DEBUG__ = "N" + + +class FruException(Exception): + def __init__(self, message='fruerror', code=-100): + err = 'errcode: {0} message:{1}'.format(code, message) + Exception.__init__(self, err) + self.code = code + self.message = message + + +def e_print(err): + print("ERROR: " + err) + + +def d_print(debug_info): + if __DEBUG__ == "Y": + print(debug_info) + + +class FruUtil(): + @staticmethod + def decodeLength(value): + a = bitarray(8) + a.setall(True) + a[0:1] = 0 + a[1:2] = 0 + x = ord(a.tobytes()) + return x & ord(value) + + @staticmethod + def minToData(): + starttime = datetime(1996, 1, 1, 0, 0, 0) + endtime = datetime.now() + seconds = (endtime - starttime).total_seconds() + mins = seconds // 60 + m = int(round(mins)) + return m + + @staticmethod + def getTimeFormat(): + return datetime.now().strftime('%Y-%m-%d') + + @staticmethod + def getTypeLength(value): + if value is None or len(value) == 0: + return 0 + a = bitarray(8) + a.setall(False) + a[0:1] = 1 + a[1:2] = 1 + x = ord(a.tobytes()) + return x | len(value) + + @staticmethod + def checksum(b): + result = 0 + for item in b: + result += ord(item) + return (0x100 - (result & 0xff)) & 0xff + + +class BaseArea(object): + SUGGESTED_SIZE_COMMON_HEADER = 8 + SUGGESTED_SIZE_INTERNAL_USE_AREA = 72 + SUGGESTED_SIZE_CHASSIS_INFO_AREA = 32 + SUGGESTED_SIZE_BOARD_INFO_AREA = 80 + SUGGESTED_SIZE_PRODUCT_INFO_AREA = 80 + + INITVALUE = b'\x00' + resultvalue = INITVALUE * 256 + COMMON_HEAD_VERSION = b'\x01' + __childList = None + + def __init__(self, name="", size=0, offset=0): + self.__childList = [] + self._offset = offset + self.name = name + self._size = size + self._isPresent = False + self._data = b'\x00' * size + + @property + def childList(self): + return self.__childList + + @childList.setter + def childList(self, value): + self.__childList = value + + @property + def offset(self): + return self._offset + + @offset.setter + def offset(self, value): + self._offset = value + + @property + def size(self): + return self._size + + @size.setter + def size(self, value): + self._size = value + + @property + def data(self): + return self._data + + @data.setter + def data(self, value): + self._data = value + + @property + def isPresent(self): + return self._isPresent + + @isPresent.setter + def isPresent(self, value): + self._isPresent = value + + +class InternalUseArea(BaseArea): + pass + + +class ChassisInfoArea(BaseArea): + pass + + +class BoardInfoArea(BaseArea): + _boardTime = None + _fields = None + _mfg_date = None + areaversion = None + _boardversion = None + _language = None + + def __str__(self): + formatstr = "version : %x\n" \ + "length : %d \n" \ + "language : %x \n" \ + "mfg_date : %s \n" \ + "boardManufacturer : %s \n" \ + "boardProductName : %s \n" \ + "boardSerialNumber : %s \n" \ + "boardPartNumber : %s \n" \ + "fruFileId : %s \n" + + tmpstr = formatstr % (ord(self.boardversion), self.size, + self.language, self.getMfgRealData(), + self.boardManufacturer, self.boardProductName, + self.boardSerialNumber, self.boardPartNumber, + self.fruFileId) + for i in range(1, 11): + valtmp = "boardextra%d" % i + if hasattr(self, valtmp): + valtmpval = getattr(self, valtmp) + tmpstr += "boardextra%d : %s \n" % (i, valtmpval) + else: + break + + return tmpstr + + def todict(self): + dic = collections.OrderedDict() + dic["boardversion"] = ord(self.boardversion) + dic["boardlength"] = self.size + dic["boardlanguage"] = self.language + dic["boardmfg_date"] = self.getMfgRealData() + dic["boardManufacturer"] = self.boardManufacturer + dic["boardProductName"] = self.boardProductName + dic["boardSerialNumber"] = self.boardSerialNumber + dic["boardPartNumber"] = self.boardPartNumber + dic["boardfruFileId"] = self.fruFileId + for i in range(1, 11): + valtmp = "boardextra%d" % i + if hasattr(self, valtmp): + valtmpval = getattr(self, valtmp) + dic[valtmp] = valtmpval + else: + break + return dic + + def decodedata(self): + index = 0 + self.areaversion = self.data[index] + index += 1 + d_print("decode length :%d class size:%d" % + ((ord(self.data[index]) * 8), self.size)) + index += 2 + + timetmp = self.data[index: index + 3] + self.mfg_date = ord(timetmp[0]) | ( + ord(timetmp[1]) << 8) | (ord(timetmp[2]) << 16) + d_print("decode getMfgRealData :%s" % self.getMfgRealData()) + index += 3 + + templen = FruUtil.decodeLength(self.data[index]) + self.boardManufacturer = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode boardManufacturer:%s" % self.boardManufacturer) + + templen = FruUtil.decodeLength(self.data[index]) + self.boardProductName = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode boardProductName:%s" % self.boardProductName) + + templen = FruUtil.decodeLength(self.data[index]) + self.boardSerialNumber = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode boardSerialNumber:%s" % self.boardSerialNumber) + + templen = FruUtil.decodeLength(self.data[index]) + self.boardPartNumber = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode boardPartNumber:%s" % self.boardPartNumber) + + templen = FruUtil.decodeLength(self.data[index]) + self.fruFileId = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode fruFileId:%s" % self.fruFileId) + + for i in range(1, 11): + valtmp = "boardextra%d" % i + if self.data[index] != chr(0xc1): + templen = FruUtil.decodeLength(self.data[index]) + tmpval = self.data[index + 1: index + templen + 1] + setattr(self, valtmp, tmpval) + index += templen + 1 + d_print("decode boardextra%d:%s" % (i, tmpval)) + else: + break + + def fruSetValue(self, field, value): + tmp_field = getattr(self, field, None) + if tmp_field is not None: + setattr(self, field, value) + + def recalcute(self): + d_print("boardInfoArea version:%x" % ord(self.boardversion)) + d_print("boardInfoArea length:%d" % self.size) + d_print("boardInfoArea language:%x" % self.language) + self.mfg_date = FruUtil.minToData() + d_print("boardInfoArea mfg_date:%x" % self.mfg_date) + + self.data = chr(ord(self.boardversion)) + \ + chr(self.size // 8) + chr(self.language) + + self.data += chr(self.mfg_date & 0xFF) + self.data += chr((self.mfg_date >> 8) & 0xFF) + self.data += chr((self.mfg_date >> 16) & 0xFF) + + d_print("boardInfoArea boardManufacturer:%s" % self.boardManufacturer) + typelength = FruUtil.getTypeLength(self.boardManufacturer) + self.data += chr(typelength) + self.data += self.boardManufacturer + + d_print("boardInfoArea boardProductName:%s" % self.boardProductName) + self.data += chr(FruUtil.getTypeLength(self.boardProductName)) + self.data += self.boardProductName + + d_print("boardInfoArea boardSerialNumber:%s" % self.boardSerialNumber) + self.data += chr(FruUtil.getTypeLength(self.boardSerialNumber)) + self.data += self.boardSerialNumber + + d_print("boardInfoArea boardPartNumber:%s" % self.boardPartNumber) + self.data += chr(FruUtil.getTypeLength(self.boardPartNumber)) + self.data += self.boardPartNumber + + d_print("boardInfoArea fruFileId:%s" % self.fruFileId) + self.data += chr(FruUtil.getTypeLength(self.fruFileId)) + self.data += self.fruFileId + + for i in range(1, 11): + valtmp = "boardextra%d" % i + if hasattr(self, valtmp): + valtmpval = getattr(self, valtmp) + d_print("boardInfoArea boardextra%d:%s" % (i, valtmpval)) + self.data += chr(FruUtil.getTypeLength(valtmpval)) + if valtmpval is not None: + self.data += valtmpval + else: + break + + self.data += chr(0xc1) + + if len(self.data) > (self.size - 1): + incr = (len(self.data) - self.size) // 8 + 1 + self.size += incr * 8 + + self.data = self.data[0:1] + chr(self.size // 8) + self.data[2:] + d_print("self data:%d" % len(self.data)) + d_print("self size:%d" % self.size) + d_print("adjust size:%d" % (self.size - len(self.data) - 1)) + self.data = self.data.ljust((self.size - 1), chr(self.INITVALUE[0])) + + # checksum + checksum = FruUtil.checksum(self.data) + d_print("board info checksum:%x" % checksum) + self.data += chr(checksum) + + def getMfgRealData(self): + starttime = datetime(1996, 1, 1, 0, 0, 0) + mactime = starttime + timedelta(minutes=self.mfg_date) + return mactime + + @property + def language(self): + self._language = 25 + return self._language + + @property + def mfg_date(self): + return self._mfg_date + + @mfg_date.setter + def mfg_date(self, val): + self._mfg_date = val + + @property + def boardversion(self): + self._boardversion = self.COMMON_HEAD_VERSION + return self._boardversion + + @property + def fruFileId(self): + return self._FRUFileID + + @fruFileId.setter + def fruFileId(self, val): + self._FRUFileID = val + + @property + def boardPartNumber(self): + return self._boardPartNumber + + @boardPartNumber.setter + def boardPartNumber(self, val): + self._boardPartNumber = val + + @property + def boardSerialNumber(self): + return self._boardSerialNumber + + @boardSerialNumber.setter + def boardSerialNumber(self, val): + self._boardSerialNumber = val + + @property + def boardProductName(self): + return self._boradProductName + + @boardProductName.setter + def boardProductName(self, val): + self._boradProductName = val + + @property + def boardManufacturer(self): + return self._boardManufacturer + + @boardManufacturer.setter + def boardManufacturer(self, val): + self._boardManufacturer = val + + @property + def boardTime(self): + return self._boardTime + + @boardTime.setter + def boardTime(self, val): + self._boardTime = val + + @property + def fields(self): + return self._fields + + @fields.setter + def fields(self, val): + self._fields = val + + +class ProductInfoArea(BaseArea): + _productManufacturer = None + _productAssetTag = None + _FRUFileID = None + _language = None + + def __str__(self): + formatstr = "version : %x\n" \ + "length : %d \n" \ + "language : %x \n" \ + "productManufacturer : %s \n" \ + "productName : %s \n" \ + "productPartModelName: %s \n" \ + "productVersion : %s \n" \ + "productSerialNumber : %s \n" \ + "productAssetTag : %s \n" \ + "fruFileId : %s \n" + + tmpstr = formatstr % (ord(self.areaversion), self.size, + self.language, self.productManufacturer, + self.productName, self.productPartModelName, + self.productVersion, self.productSerialNumber, + self.productAssetTag, self.fruFileId) + + for i in range(1, 11): + valtmp = "productextra%d" % i + if hasattr(self, valtmp): + valtmpval = getattr(self, valtmp) + tmpstr += "productextra%d : %s \n" % (i, valtmpval) + else: + break + + return tmpstr + + def todict(self): + dic = collections.OrderedDict() + dic["productversion"] = ord(self.areaversion) + dic["productlength"] = self.size + dic["productlanguage"] = self.language + dic["productManufacturer"] = self.productManufacturer + dic["productName"] = self.productName + dic["productPartModelName"] = self.productPartModelName + dic["productVersion"] = int(self.productVersion, 16) + dic["productSerialNumber"] = self.productSerialNumber + dic["productAssetTag"] = self.productAssetTag + dic["productfruFileId"] = self.fruFileId + for i in range(1, 11): + valtmp = "productextra%d" % i + if hasattr(self, valtmp): + valtmpval = getattr(self, valtmp) + dic[valtmp] = valtmpval + else: + break + return dic + + def decodedata(self): + index = 0 + self.areaversion = self.data[index] # 0 + index += 1 + d_print("decode length %d" % (ord(self.data[index]) * 8)) + d_print("class size %d" % self.size) + index += 2 + + templen = FruUtil.decodeLength(self.data[index]) + self.productManufacturer = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode productManufacturer:%s" % self.productManufacturer) + + templen = FruUtil.decodeLength(self.data[index]) + self.productName = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode productName:%s" % self.productName) + + templen = FruUtil.decodeLength(self.data[index]) + self.productPartModelName = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode productPartModelName:%s" % self.productPartModelName) + + templen = FruUtil.decodeLength(self.data[index]) + self.productVersion = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode productVersion:%s" % self.productVersion) + + templen = FruUtil.decodeLength(self.data[index]) + self.productSerialNumber = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode productSerialNumber:%s" % self.productSerialNumber) + + templen = FruUtil.decodeLength(self.data[index]) + self.productAssetTag = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode productAssetTag:%s" % self.productAssetTag) + + templen = FruUtil.decodeLength(self.data[index]) + self.fruFileId = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode fruFileId:%s" % self.fruFileId) + + for i in range(1, 11): + valtmp = "productextra%d" % i + if self.data[index] != chr(0xc1) and index < self.size - 1: + templen = FruUtil.decodeLength(self.data[index]) + if templen == 0: + break + tmpval = self.data[index + 1: index + templen + 1] + d_print("decode boardextra%d:%s" % (i, tmpval)) + setattr(self, valtmp, tmpval) + index += templen + 1 + else: + break + + @property + def productVersion(self): + return self._productVersion + + @productVersion.setter + def productVersion(self, name): + self._productVersion = name + + @property + def areaversion(self): + self._areaversion = self.COMMON_HEAD_VERSION + return self._areaversion + + @areaversion.setter + def areaversion(self, name): + self._areaversion = name + + @property + def language(self): + self._language = 25 + return self._language + + @property + def productManufacturer(self): + return self._productManufacturer + + @productManufacturer.setter + def productManufacturer(self, name): + self._productManufacturer = name + + @property + def productName(self): + return self._productName + + @productName.setter + def productName(self, name): + self._productName = name + + @property + def productPartModelName(self): + return self._productPartModelName + + @productPartModelName.setter + def productPartModelName(self, name): + self._productPartModelName = name + + @property + def productSerialNumber(self): + return self._productSerialNumber + + @productSerialNumber.setter + def productSerialNumber(self, name): + self._productSerialNumber = name + + @property + def productAssetTag(self): + return self._productAssetTag + + @productAssetTag.setter + def productAssetTag(self, name): + self._productAssetTag = name + + @property + def fruFileId(self): + return self._FRUFileID + + @fruFileId.setter + def fruFileId(self, name): + self._FRUFileID = name + + def fruSetValue(self, field, value): + tmp_field = getattr(self, field, None) + if tmp_field is not None: + setattr(self, field, value) + + def recalcute(self): + d_print("product version:%x" % ord(self.areaversion)) + d_print("product length:%d" % self.size) + d_print("product language:%x" % self.language) + self.data = chr(ord(self.areaversion)) + \ + chr(self.size // 8) + chr(self.language) + + typelength = FruUtil.getTypeLength(self.productManufacturer) + self.data += chr(typelength) + self.data += self.productManufacturer + + self.data += chr(FruUtil.getTypeLength(self.productName)) + self.data += self.productName + + self.data += chr(FruUtil.getTypeLength(self.productPartModelName)) + self.data += self.productPartModelName + + self.data += chr(FruUtil.getTypeLength(self.productVersion)) + self.data += self.productVersion + + self.data += chr(FruUtil.getTypeLength(self.productSerialNumber)) + self.data += self.productSerialNumber + + self.data += chr(FruUtil.getTypeLength(self.productAssetTag)) + if self.productAssetTag is not None: + self.data += self.productAssetTag + + self.data += chr(FruUtil.getTypeLength(self.fruFileId)) + self.data += self.fruFileId + + for i in range(1, 11): + valtmp = "productextra%d" % i + if hasattr(self, valtmp): + valtmpval = getattr(self, valtmp) + d_print("boardInfoArea productextra%d:%s" % (i, valtmpval)) + self.data += chr(FruUtil.getTypeLength(valtmpval)) + if valtmpval is not None: + self.data += valtmpval + else: + break + + self.data += chr(0xc1) + if len(self.data) > (self.size - 1): + incr = (len(self.data) - self.size) // 8 + 1 + self.size += incr * 8 + d_print("self.data:%d" % len(self.data)) + d_print("self.size:%d" % self.size) + + self.data = self.data[0:1] + chr(self.size // 8) + self.data[2:] + self.data = self.data.ljust((self.size - 1), chr(self.INITVALUE[0])) + checksum = FruUtil.checksum(self.data) + d_print("board info checksum:%x" % checksum) + self.data += chr(checksum) + + +class MultiRecordArea(BaseArea): + pass + + +class Field(object): + + def __init__(self, fieldType="ASCII", fieldData=""): + self.fieldData = fieldData + self.fieldType = fieldType + + @property + def fieldType(self): + return self.fieldType + + @property + def fieldData(self): + return self.fieldData + + +class ipmifru(BaseArea): + _BoardInfoArea = None + _ProductInfoArea = None + _InternalUseArea = None + _ChassisInfoArea = None + _multiRecordArea = None + _productinfoAreaOffset = BaseArea.INITVALUE + _boardInfoAreaOffset = BaseArea.INITVALUE + _internalUserAreaOffset = BaseArea.INITVALUE + _chassicInfoAreaOffset = BaseArea.INITVALUE + _multiRecordAreaOffset = BaseArea.INITVALUE + _bindata = None + _bodybin = None + _version = BaseArea.COMMON_HEAD_VERSION + _zeroCheckSum = None + _frusize = 256 + + def __str__(self): + tmpstr = "" + if self.boardInfoArea.isPresent: + tmpstr += "\nboardinfoarea: \n" + tmpstr += self.boardInfoArea.__str__() + if self.productInfoArea.isPresent: + tmpstr += "\nproductinfoarea: \n" + tmpstr += self.productInfoArea.__str__() + return tmpstr + + def decodeBin(self, eeprom): + commonHead = eeprom[0:8] + d_print("decode version %x" % ord(commonHead[0])) + if ord(self.COMMON_HEAD_VERSION) != ord(commonHead[0]): + raise FruException("HEAD VERSION error,not Fru format!", -10) + if FruUtil.checksum(commonHead[0:7]) != ord(commonHead[7]): + strtemp = "check header checksum error [cal:%02x data:%02x]" % ( + FruUtil.checksum(commonHead[0:7]), ord(commonHead[7])) + raise FruException(strtemp, -3) + if ord(commonHead[1]) != ord(self.INITVALUE): + d_print("Internal Use Area is present") + self.internalUseArea = InternalUseArea( + name="Internal Use Area", size=self.SUGGESTED_SIZE_INTERNAL_USE_AREA) + self.internalUseArea.isPresent = True + self.internalUserAreaOffset = ord(commonHead[1]) + self.internalUseArea.data = eeprom[self.internalUserAreaOffset * 8: ( + self.internalUserAreaOffset * 8 + self.internalUseArea.size)] + if ord(commonHead[2]) != ord(self.INITVALUE): + d_print("Chassis Info Area is present") + self.chassisInfoArea = ChassisInfoArea( + name="Chassis Info Area", size=self.SUGGESTED_SIZE_CHASSIS_INFO_AREA) + self.chassisInfoArea.isPresent = True + self.chassicInfoAreaOffset = ord(commonHead[2]) + self.chassisInfoArea.data = eeprom[self.chassicInfoAreaOffset * 8: ( + self.chassicInfoAreaOffset * 8 + self.chassisInfoArea.size)] + if ord(commonHead[3]) != ord(self.INITVALUE): + self.boardInfoArea = BoardInfoArea( + name="Board Info Area", size=self.SUGGESTED_SIZE_BOARD_INFO_AREA) + self.boardInfoArea.isPresent = True + self.boardInfoAreaOffset = ord(commonHead[3]) + self.boardInfoArea.size = ord( + eeprom[self.boardInfoAreaOffset * 8 + 1]) * 8 + d_print("Board Info Area is present size:%d" % + (self.boardInfoArea.size)) + self.boardInfoArea.data = eeprom[self.boardInfoAreaOffset * 8: ( + self.boardInfoAreaOffset * 8 + self.boardInfoArea.size)] + if FruUtil.checksum(self.boardInfoArea.data[:-1]) != ord(self.boardInfoArea.data[-1:]): + strtmp = "check boardInfoArea checksum error[cal:%02x data:%02x]" % \ + (FruUtil.checksum( + self.boardInfoArea.data[:-1]), ord(self.boardInfoArea.data[-1:])) + raise FruException(strtmp, -3) + self.boardInfoArea.decodedata() + if ord(commonHead[4]) != ord(self.INITVALUE): + d_print("Product Info Area is present") + self.productInfoArea = ProductInfoArea( + name="Product Info Area ", size=self.SUGGESTED_SIZE_PRODUCT_INFO_AREA) + self.productInfoArea.isPresent = True + self.productinfoAreaOffset = ord(commonHead[4]) + d_print("length offset value: %02x" % + ord(eeprom[self.productinfoAreaOffset * 8 + 1])) + self.productInfoArea.size = ord( + eeprom[self.productinfoAreaOffset * 8 + 1]) * 8 + d_print("Product Info Area is present size:%d" % + (self.productInfoArea.size)) + + self.productInfoArea.data = eeprom[self.productinfoAreaOffset * 8: ( + self.productinfoAreaOffset * 8 + self.productInfoArea.size)] + if FruUtil.checksum(self.productInfoArea.data[:-1]) != ord(self.productInfoArea.data[-1:]): + strtmp = "check productInfoArea checksum error [cal:%02x data:%02x]" % ( + FruUtil.checksum(self.productInfoArea.data[:-1]), ord(self.productInfoArea.data[-1:])) + raise FruException(strtmp, -3) + self.productInfoArea.decodedata() + if ord(commonHead[5]) != ord(self.INITVALUE): + self.multiRecordArea = MultiRecordArea( + name="MultiRecord record Area ") + d_print("MultiRecord record present") + self.multiRecordArea.isPresent = True + self.multiRecordAreaOffset = ord(commonHead[5]) + self.multiRecordArea.data = eeprom[self.multiRecordAreaOffset * 8: ( + self.multiRecordAreaOffset * 8 + self.multiRecordArea.size)] + + def initDefault(self): + self.version = self.COMMON_HEAD_VERSION + self.internalUserAreaOffset = self.INITVALUE + self.chassicInfoAreaOffset = self.INITVALUE + self.boardInfoAreaOffset = self.INITVALUE + self.productinfoAreaOffset = self.INITVALUE + self.multiRecordAreaOffset = self.INITVALUE + self.zeroCheckSum = self.INITVALUE + self.offset = self.SUGGESTED_SIZE_COMMON_HEADER + self.productInfoArea = None + self.internalUseArea = None + self.boardInfoArea = None + self.chassisInfoArea = None + self.multiRecordArea = None + # self.recalcute() + + @property + def version(self): + return self._version + + @version.setter + def version(self, name): + self._version = name + + @property + def internalUserAreaOffset(self): + return self._internalUserAreaOffset + + @internalUserAreaOffset.setter + def internalUserAreaOffset(self, obj): + self._internalUserAreaOffset = obj + + @property + def chassicInfoAreaOffset(self): + return self._chassicInfoAreaOffset + + @chassicInfoAreaOffset.setter + def chassicInfoAreaOffset(self, obj): + self._chassicInfoAreaOffset = obj + + @property + def productinfoAreaOffset(self): + return self._productinfoAreaOffset + + @productinfoAreaOffset.setter + def productinfoAreaOffset(self, obj): + self._productinfoAreaOffset = obj + + @property + def boardInfoAreaOffset(self): + return self._boardInfoAreaOffset + + @boardInfoAreaOffset.setter + def boardInfoAreaOffset(self, obj): + self._boardInfoAreaOffset = obj + + @property + def multiRecordAreaOffset(self): + return self._multiRecordAreaOffset + + @multiRecordAreaOffset.setter + def multiRecordAreaOffset(self, obj): + self._multiRecordAreaOffset = obj + + @property + def zeroCheckSum(self): + return self._zeroCheckSum + + @zeroCheckSum.setter + def zeroCheckSum(self, obj): + self._zeroCheckSum = obj + + @property + def productInfoArea(self): + return self._ProductInfoArea + + @productInfoArea.setter + def productInfoArea(self, obj): + self._ProductInfoArea = obj + + @property + def internalUseArea(self): + return self._InternalUseArea + + @internalUseArea.setter + def internalUseArea(self, obj): + self.internalUseArea = obj + + @property + def boardInfoArea(self): + return self._BoardInfoArea + + @boardInfoArea.setter + def boardInfoArea(self, obj): + self._BoardInfoArea = obj + + @property + def chassisInfoArea(self): + return self._ChassisInfoArea + + @chassisInfoArea.setter + def chassisInfoArea(self, obj): + self._ChassisInfoArea = obj + + @property + def multiRecordArea(self): + return self._multiRecordArea + + @multiRecordArea.setter + def multiRecordArea(self, obj): + self._multiRecordArea = obj + + @property + def bindata(self): + return self._bindata + + @bindata.setter + def bindata(self, obj): + self._bindata = obj + + @property + def bodybin(self): + return self._bodybin + + @bodybin.setter + def bodybin(self, obj): + self._bodybin = obj + + def recalcuteCommonHead(self): + self.bindata = "" + self.offset = self.SUGGESTED_SIZE_COMMON_HEADER + d_print("common Header %d" % self.offset) + d_print("fru eeprom size %d" % self._frusize) + if self.internalUseArea is not None and self.internalUseArea.isPresent: + self.internalUserAreaOffset = self.offset // 8 + self.offset += self.internalUseArea.size + d_print("internalUseArea is present offset:%d" % self.offset) + + if self.chassisInfoArea is not None and self.chassisInfoArea.isPresent: + self.chassicInfoAreaOffset = self.offset // 8 + self.offset += self.chassisInfoArea.size + d_print("chassisInfoArea is present offset:%d" % self.offset) + + if self.boardInfoArea is not None and self.boardInfoArea.isPresent: + self.boardInfoAreaOffset = self.offset // 8 + self.offset += self.boardInfoArea.size + d_print("boardInfoArea is present offset:%d" % self.offset) + d_print("boardInfoArea is present size:%d" % + self.boardInfoArea.size) + + if self.productInfoArea is not None and self.productInfoArea.isPresent: + self.productinfoAreaOffset = self.offset // 8 + self.offset += self.productInfoArea.size + d_print("productInfoArea is present offset:%d" % self.offset) + + if self.multiRecordArea is not None and self.multiRecordArea.isPresent: + self.multiRecordAreaOffset = self.offset // 8 + d_print("multiRecordArea is present offset:%d" % self.offset) + + if self.internalUserAreaOffset == self.INITVALUE: + self.internalUserAreaOffset = 0 + if self.productinfoAreaOffset == self.INITVALUE: + self.productinfoAreaOffset = 0 + if self.chassicInfoAreaOffset == self.INITVALUE: + self.chassicInfoAreaOffset = 0 + if self.boardInfoAreaOffset == self.INITVALUE: + self.boardInfoAreaOffset = 0 + if self.multiRecordAreaOffset == self.INITVALUE: + self.multiRecordAreaOffset = 0 + + self.zeroCheckSum = (0x100 - ord(self.version) - self.internalUserAreaOffset - self.chassicInfoAreaOffset - self.productinfoAreaOffset + - self.boardInfoAreaOffset - self.multiRecordAreaOffset) & 0xff + d_print("zerochecksum:%x" % self.zeroCheckSum) + self.data = "" + self.data += chr(self.version[0]) + chr(self.internalUserAreaOffset) + chr(self.chassicInfoAreaOffset) + chr( + self.boardInfoAreaOffset) + chr(self.productinfoAreaOffset) + chr(self.multiRecordAreaOffset) + chr(self.INITVALUE[0]) + chr(self.zeroCheckSum) + + self.bindata = self.data + self.bodybin + totallen = len(self.bindata) + d_print("totallen %d" % totallen) + if totallen < self._frusize: + self.bindata = self.bindata.ljust(self._frusize, chr(self.INITVALUE[0])) + else: + raise FruException('bin data more than %d' % self._frusize, -2) + + def recalcutebin(self): + self.bodybin = "" + if self.internalUseArea is not None and self.internalUseArea.isPresent: + d_print("internalUseArea present") + self.bodybin += self.internalUseArea.data + if self.chassisInfoArea is not None and self.chassisInfoArea.isPresent: + d_print("chassisInfoArea present") + self.bodybin += self.chassisInfoArea.data + if self.boardInfoArea is not None and self.boardInfoArea.isPresent: + d_print("boardInfoArea present") + self.boardInfoArea.recalcute() + self.bodybin += self.boardInfoArea.data + if self.productInfoArea is not None and self.productInfoArea.isPresent: + d_print("productInfoAreapresent") + self.productInfoArea.recalcute() + self.bodybin += self.productInfoArea.data + if self.multiRecordArea is not None and self.multiRecordArea.isPresent: + d_print("multiRecordArea present") + self.bodybin += self.productInfoArea.data + + def recalcute(self, fru_eeprom_size=256): + self._frusize = fru_eeprom_size + self.recalcutebin() + self.recalcuteCommonHead() + + def setValue(self, area, field, value): + tmp_area = getattr(self, area, None) + if tmp_area is not None: + tmp_area.fruSetValue(field, value) diff --git a/device/micas/x86_64-micas_m2-w6950-128oc-r0/installer.conf b/device/micas/x86_64-micas_m2-w6950-128oc-r0/installer.conf new file mode 100644 index 00000000000..6c510bc3bd3 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6950-128oc-r0/installer.conf @@ -0,0 +1,42 @@ +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="modprobe.blacklist=ixgbe,wb_ixgbe,ice,i2c_designware_platform,wb_i2c_designware_platform,i2c_piix4,i2c_asf,spi_amd,cdc_subset" +CONSOLE_PORT=0x3f8 +CONSOLE_DEV=0 +ONIE_IMAGE_PART_SIZE=1048576 + +create_eth_fix_rules(){ + [ -n "$demo_mnt" ] || return + + [ "$install_env" = "onie" -a -n "$demo_dev" ] && { + mkdir -p $demo_mnt + ${onie_bin} mount -t ext4 -o defaults,rw $demo_dev $demo_mnt || { + echo "Error: Unable to mount $demo_dev on $demo_mnt,link creating failed." + } + } + [ -n "$demo_mnt" -a -n "$image_dir" -a -d "$demo_mnt/$image_dir" ] && { + mkdir -p $demo_mnt/$image_dir/rw/etc/systemd/network/ + + # Fix Intel E610/E810 Ethernet interface names by PCI path + # 02:00.0 -> eth1, 02:00.1 -> eth2 (E610 10GBASE-T) + # 03:00.0..3 -> eth3..eth6 (E810-C backplane) + for entry in \ + "1:0000:02:00.0" \ + "2:0000:02:00.1" \ + "3:0000:03:00.0" \ + "4:0000:03:00.1" \ + "5:0000:03:00.2" \ + "6:0000:03:00.3"; do + idx=${entry%%:*} + bdf=${entry#*:} + cat > $demo_mnt/$image_dir/rw/etc/systemd/network/20-eth${idx}.link < Optional[str]: + """Get breakout mode of the port from database 4""" + try: + key = f"BREAKOUT_CFG|{port_name}" + data = self.redis_db4.hgetall(key) + return data.get('brkout_mode') + except Exception as e: + logger.error(f"Failed to get breakout mode for {port_name}: {e}") + return None + + def get_netdev_oper_status(self, port_name: str) -> Optional[str]: + """Get netdev_oper_status of the port from database 6""" + try: + key = f"PORT_TABLE|{port_name}" + data = self.redis_db6.hgetall(key) + return data.get('netdev_oper_status') + except Exception as e: + logger.error(f"Failed to get netdev_oper_status for {port_name}: {e}") + return None + + def get_all_ethernet_ports(self) -> List[str]: + """Get all Ethernet ports from database 4""" + ports = [] + try: + keys = self.redis_db4.keys("BREAKOUT_CFG|Ethernet*") + for key in keys: + port = key.replace("BREAKOUT_CFG|", "") + ports.append(port) + except Exception as e: + logger.error(f"Failed to get Ethernet port list: {e}") + return sorted(ports) + + def get_reg(self, port: int): + if port not in PORT_TO_REG: + logger.info(f"Invalid port {port}") + return None + logger.info(f"get_reg port:{port}, reg:{PORT_TO_REG[port]}") + return PORT_TO_REG[port] + + def execute_sap_command(self, port_name: str, led_status: int): + """Execute sap command""" + port_num = int(port_name.replace('Ethernet', '')) + port_reg = self.get_reg(port_num) + if port_reg is None: + logger.info(f"port_reg is None port:{port_name}") + return + if port_num < 512: + cmd = f"dfd_debug sysfs_data_wr /dev/cpld15 {port_reg} {led_status}" + else: + cmd = f"dfd_debug sysfs_data_wr /dev/cpld16 {port_reg} {led_status}" + try: + result = subprocess.run( + cmd.split(), + shell=False, # Explicitly set to False for security + capture_output=True, + text=True, + timeout=5 + ) + if result.returncode == 0: + logger.info(f"Command executed successfully: {' '.join(cmd)}") + else: + logger.error(f"Command execution failed: {' '.join(cmd)}, error: {result.stderr}") + except subprocess.TimeoutExpired: + logger.error(f"Command execution timeout (5s): {' '.join(cmd)}") + except Exception as e: + logger.error(f"Command execution exception: {' '.join(cmd)}, error: {e}") + + def reset_all_port_reg(self): + logger.info("LED switch monitoring will be stop, set all port reg to default") + for port_num in PORT_TO_REG.keys(): + port_name = f"Ethernet{port_num}" + self.execute_sap_command(port_name, LED_SWITCH_CONTROL) + + def handle_special_port(self): + """Handle Ethernet1024 specially - directly monitor its netdev_oper_status""" + netdev_status = self.get_netdev_oper_status(SPECIAL_PORT) + if netdev_status is None: + logger.warning(f"Failed to get netdev_oper_status for special port {SPECIAL_PORT}") + return + + old_status = self.last_special_port_status + + if netdev_status == 'up': + if old_status != 'up': + logger.info(f"Special port {SPECIAL_PORT} status changed to up, executing sap LED_GREEN_ON") + self.execute_sap_command(SPECIAL_PORT, LED_GREEN_ON) + self.last_special_port_status = 'up' + elif netdev_status == 'down': + if old_status != 'down': + logger.info(f"Special port {SPECIAL_PORT} status changed to down, executing sap LED_OFF") + self.execute_sap_command(SPECIAL_PORT, LED_OFF) + self.last_special_port_status = 'down' + + def handle_1x800g(self, port: str, current_statuses: Dict[str, str], status_key: str): + """Handle 1x800G breakout mode - monitor single port""" + # Skip special port as it's handled separately + if port == SPECIAL_PORT: + return + + netdev_status = self.get_netdev_oper_status(port) + if netdev_status is None: + return + + old_status = current_statuses.get(status_key) + + if netdev_status == 'up': + if old_status != 'up': + logger.info(f"1x800G port {port} status changed to up, executing sap LED_GREEN_ON") + self.execute_sap_command(port, LED_GREEN_ON) + current_statuses[status_key] = 'up' + elif netdev_status == 'down': + if old_status != 'down': + logger.info(f"1x800G port {port} status changed to down, executing sap LED_OFF") + self.execute_sap_command(port, LED_OFF) + current_statuses[status_key] = 'down' + + def handle_2x400g(self, port: str, current_statuses: Dict[str, str], status_key: str): + """Handle 2x400G breakout mode - monitor port and port+4""" + # Skip if any port in the group is the special port + port_num = int(port.replace('Ethernet', '')) + port1 = port + port2 = f"Ethernet{port_num + 4}" + + if port1 == SPECIAL_PORT or port2 == SPECIAL_PORT: + # Special port is handled separately, skip group processing + return + + status1 = self.get_netdev_oper_status(port1) + status2 = self.get_netdev_oper_status(port2) + + if status1 is None or status2 is None: + return + + all_up = (status1 == 'up' and status2 == 'up') + all_down = (status1 == 'down' and status2 == 'down') + + old_status = current_statuses.get(status_key) + + if all_up: + if old_status != 'up': + logger.info(f"2x400G port group {port1} and {port2} both up, executing sap LED_GREEN_ON") + self.execute_sap_command(port, LED_GREEN_ON) + current_statuses[status_key] = 'up' + elif all_down: + if old_status != 'down': + logger.info(f"2x400G port group {port1} and {port2} both down, executing sap LED_OFF") + self.execute_sap_command(port, LED_OFF) + current_statuses[status_key] = 'down' + else: + if old_status != 'mixed': + logger.info(f"2x400G port group {port1}({status1}) and {port2}({status2}) mixed, executing sap LED_YELLOW_ON") + self.execute_sap_command(port, LED_YELLOW_ON) + current_statuses[status_key] = 'mixed' + + def handle_4x200g(self, port: str, current_statuses: Dict[str, str], status_key: str): + """Handle 4x200G breakout mode - monitor port, port+2, port+4, port+6""" + port_num = int(port.replace('Ethernet', '')) + ports = [ + port, + f"Ethernet{port_num + 2}", + f"Ethernet{port_num + 4}", + f"Ethernet{port_num + 6}" + ] + + # Skip if any port in the group is the special port + if SPECIAL_PORT in ports: + return + + statuses = [] + for p in ports: + status = self.get_netdev_oper_status(p) + if status is None: + return + statuses.append(status) + + all_up = all(s == 'up' for s in statuses) + all_down = all(s == 'down' for s in statuses) + + old_status = current_statuses.get(status_key) + + if all_up: + if old_status != 'up': + logger.info(f"4x200G port group {ports} all up, executing sap LED_GREEN_ON") + self.execute_sap_command(port, LED_GREEN_ON) + current_statuses[status_key] = 'up' + elif all_down: + if old_status != 'down': + logger.info(f"4x200G port group {ports} all down, executing sap LED_OFF") + self.execute_sap_command(port, LED_OFF) + current_statuses[status_key] = 'down' + else: + if old_status != 'mixed': + status_str = ','.join([f"{p}({s})" for p, s in zip(ports, statuses)]) + logger.info(f"4x200G port group {status_str} mixed, executing sap LED_YELLOW_ON") + self.execute_sap_command(port, LED_YELLOW_ON) + current_statuses[status_key] = 'mixed' + + def handle_8x100g(self, port: str, current_statuses: Dict[str, str], status_key: str): + """Handle 8x100G breakout mode - monitor port, port+1, ..., port+7""" + port_num = int(port.replace('Ethernet', '')) + ports = [f"Ethernet{port_num + i}" for i in range(8)] + + # Skip if any port in the group is the special port + if SPECIAL_PORT in ports: + return + + statuses = [] + for p in ports: + status = self.get_netdev_oper_status(p) + if status is None: + return + statuses.append(status) + + all_up = all(s == 'up' for s in statuses) + all_down = all(s == 'down' for s in statuses) + + old_status = current_statuses.get(status_key) + + if all_up: + if old_status != 'up': + logger.info(f"8x100G port group {ports[0]}...{ports[-1]} all up, executing sap LED_GREEN_ON") + self.execute_sap_command(port, LED_GREEN_ON) + current_statuses[status_key] = 'up' + elif all_down: + if old_status != 'down': + logger.info(f"8x100G port group {ports[0]}...{ports[-1]} all down, executing sap LED_OFF") + self.execute_sap_command(port, LED_OFF) + current_statuses[status_key] = 'down' + else: + if old_status != 'mixed': + logger.info(f"8x100G port group {ports[0]}...{ports[-1]} mixed, executing sap LED_YELLOW_ON") + self.execute_sap_command(port, LED_YELLOW_ON) + current_statuses[status_key] = 'mixed' + + def monitor_loop(self, stop_event: threading.Event): + """Main monitoring loop""" + logger.info("Monitor thread started") + + while not stop_event.is_set(): + try: + # Reconnect to Redis if disconnected + if not self.initialized or not self.redis_db4 or not self.redis_db6: + if not self.connect_redis(): + time.sleep(5) + continue + self.initialized = True + + # Handle special port Ethernet1024 first + self.handle_special_port() + + # Get all Ethernet ports + ports = self.get_all_ethernet_ports() + + # Track processed ports to avoid duplicate processing + processed_ports = set() + + for port in ports: + # Skip special port as it's handled separately + if port == SPECIAL_PORT: + continue + + if port in processed_ports: + continue + + brkout_mode = self.get_brkout_mode(port) + + if brkout_mode == '1x800G': + status_key = f"{port}_1x800G" + self.handle_1x800g(port, self.last_status, status_key) + processed_ports.add(port) + + elif brkout_mode == '2x400G': + status_key = f"{port}_2x400G" + self.handle_2x400g(port, self.last_status, status_key) + # Mark related ports to avoid duplicate processing + port_num = int(port.replace('Ethernet', '')) + processed_ports.add(port) + processed_ports.add(f"Ethernet{port_num + 4}") + + elif brkout_mode == '4x200G': + status_key = f"{port}_4x200G" + self.handle_4x200g(port, self.last_status, status_key) + port_num = int(port.replace('Ethernet', '')) + for i in range(0, 8, 2): + processed_ports.add(f"Ethernet{port_num + i}") + + elif brkout_mode == '8x100G': + status_key = f"{port}_8x100G" + self.handle_8x100g(port, self.last_status, status_key) + port_num = int(port.replace('Ethernet', '')) + for i in range(8): + processed_ports.add(f"Ethernet{port_num + i}") + + except Exception as e: + logger.error(f"Monitor loop exception: {e}") + + # Wait 2 seconds before next iteration + stop_event.wait(2) + + logger.info("Monitor thread stopped") + + def start(self): + """Start monitoring""" + global monitor_thread, stop_event + + if monitor_thread is not None and monitor_thread.is_alive(): + logger.warning("Monitor thread already running") + return + + stop_event.clear() + monitor_thread = threading.Thread(target=self.monitor_loop, args=(stop_event,), daemon=True) + monitor_thread.start() + logger.info("LED switch monitoring started") + + def stop(self): + """Stop monitoring""" + global monitor_thread + self.reset_all_port_reg() + if monitor_thread is None or not monitor_thread.is_alive(): + logger.warning("Monitor thread not running") + return + + stop_event.set() + monitor_thread.join(timeout=5) + monitor_thread = None + logger.info("LED switch monitoring stopped") + + +# Global monitor instance +monitor = LedSwitchMonitor() + + +def signal_handler(signum, frame): + """Signal handler for graceful shutdown""" + logger.info(f"Received signal {signum}, exiting...") + monitor.stop() + sys.exit(0) + + +def main(): + """Main function""" + if len(sys.argv) != 2: + print("Usage: python ledswitch_monitor.py {start|stop}") + sys.exit(1) + + command = sys.argv[1] + + # Register signal handlers + signal.signal(signal.SIGINT, signal_handler) + signal.signal(signal.SIGTERM, signal_handler) + + if command == 'start': + monitor.start() + # Keep main thread running + try: + while True: + time.sleep(1) + except KeyboardInterrupt: + monitor.stop() + elif command == 'stop': + monitor.stop() + else: + print(f"Unknown command: {command}") + print("Usage: python ledswitch_monitor.py {start|stop}") + sys.exit(1) + + +if __name__ == "__main__": + main() diff --git a/device/micas/x86_64-micas_m2-w6950-128oc-r0/monitor.py b/device/micas/x86_64-micas_m2-w6950-128oc-r0/monitor.py new file mode 100644 index 00000000000..5fc287892e5 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6950-128oc-r0/monitor.py @@ -0,0 +1,402 @@ +#!/usr/bin/python3 +# * onboard temperature sensors +# * FAN trays +# * PSU +# +import os +from lxml import etree as ET +import glob +import json +from decimal import Decimal +from fru import ipmifru + + +MAILBOX_DIR = "/sys/bus/i2c/devices/" +BOARD_ID_PATH = "/sys/module/platform_common/parameters/dfd_my_type" +BOARD_AIRFLOW_PATH = "/etc/sonic/.airflow" + + +CONFIG_NAME = "dev.xml" + + +def byteTostr(val): + strtmp = '' + for value in val: + strtmp += chr(value) + return strtmp + + +def typeTostr(val): + if isinstance(val, bytes): + strtmp = byteTostr(val) + return strtmp + return val + + +def get_board_id(): + if not os.path.exists(BOARD_ID_PATH): + return "NA" + with open(BOARD_ID_PATH) as fd: + id_str = fd.read().strip() + return "0x%x" % (int(id_str, 10)) + + +def getboardairflow(): + if not os.path.exists(BOARD_AIRFLOW_PATH): + return "NA" + with open(BOARD_AIRFLOW_PATH) as fd: + airflow_str = fd.read().strip() + data = json.loads(airflow_str) + airflow = data.get("board", "NA") + return airflow + + +boardid = get_board_id() +boardairflow = getboardairflow() + + +DEV_XML_FILE_LIST = [ + "dev_" + boardid + "_" + boardairflow + ".xml", + "dev_" + boardid + ".xml", + "dev_" + boardairflow + ".xml", +] + + +def dev_file_read(path, offset, read_len): + retval = "ERR" + val_list = [] + msg = "" + ret = "" + fd = -1 + + if not os.path.exists(path): + return False, "%s %s not found" % (retval, path) + + try: + fd = os.open(path, os.O_RDONLY) + os.lseek(fd, offset, os.SEEK_SET) + ret = os.read(fd, read_len) + for item in ret: + val_list.append(item) + except Exception as e: + msg = str(e) + return False, "%s %s" % (retval, msg) + finally: + if fd > 0: + os.close(fd) + return True, val_list + + +def getPMCreg(location): + retval = 'ERR' + if not os.path.isfile(location): + return "%s %s notfound" % (retval, location) + try: + with open(location, 'r') as fd: + retval = fd.read() + except Exception as error: + return "ERR %s" % str(error) + + retval = retval.rstrip('\r\n') + retval = retval.lstrip(" ") + return retval + + +# Get a mailbox register +def get_pmc_register(reg_name): + retval = 'ERR' + mb_reg_file = reg_name + filepath = glob.glob(mb_reg_file) + if len(filepath) == 0: + return "%s %s notfound" % (retval, mb_reg_file) + mb_reg_file = filepath[0] + if not os.path.isfile(mb_reg_file): + # print mb_reg_file, 'not found !' + return "%s %s notfound" % (retval, mb_reg_file) + try: + with open(mb_reg_file, 'rb') as fd: + retval = fd.read() + retval = typeTostr(retval) + except Exception as error: + retval = "%s %s read failed, msg: %s" % (retval, mb_reg_file, str(error)) + + retval = retval.rstrip('\r\n') + retval = retval.lstrip(" ") + return retval + + +class checktype(): + def __init__(self, test1): + self.test1 = test1 + + @staticmethod + def getValue(location, bit, data_type, coefficient=1, addend=0): + try: + value_t = get_pmc_register(location) + if value_t.startswith("ERR") or value_t.startswith("NA"): + return value_t + if data_type == 1: + return float('%.1f' % ((float(value_t) / 1000) + addend)) + if data_type == 2: + return float('%.1f' % (float(value_t) / 100)) + if data_type == 3: + psu_status = int(value_t, 16) + return (psu_status & (1 << bit)) >> bit + if data_type == 4: + return int(value_t, 10) + if data_type == 5: + return float('%.1f' % (float(value_t) / 1000 / 1000)) + if data_type == 6: + return Decimal(float(value_t) * coefficient / 1000).quantize(Decimal('0.000')) + return value_t + except Exception as e: + value_t = "ERR %s" % str(e) + return value_t + + # fanFRU + @staticmethod + def decodeBinByValue(retval): + fru = ipmifru() + fru.decodeBin(retval) + return fru + + @staticmethod + def getfruValue(prob_t, root, val): + try: + ret, binval_bytes = dev_file_read(val, 0, 256) + if ret is False: + return binval_bytes + binval = byteTostr(binval_bytes) + fanpro = {} + ret = checktype.decodeBinByValue(binval) + fanpro['fan_type'] = ret.productInfoArea.productName + fanpro['hw_version'] = ret.productInfoArea.productVersion + fanpro['sn'] = ret.productInfoArea.productSerialNumber + fan_display_name_dict = status.getDecodValue(root, "fan_display_name") + fan_name = fanpro['fan_type'].strip() + if len(fan_display_name_dict) == 0: + return fanpro + if fan_name not in fan_display_name_dict: + prob_t['errcode'] = -1 + prob_t['errmsg'] = '%s' % ("ERR fan name: %s not support" % fan_name) + else: + fanpro['fan_type'] = fan_display_name_dict[fan_name] + return fanpro + except Exception as error: + return "ERR " + str(error) + + @staticmethod + def getslotfruValue(val): + try: + binval = checktype.getValue(val, 0, 0) + if binval.startswith("ERR"): + return binval + slotpro = {} + ret = checktype.decodeBinByValue(binval) + slotpro['slot_type'] = ret.boardInfoArea.boardProductName + slotpro['hw_version'] = ret.boardInfoArea.boardextra1 + slotpro['sn'] = ret.boardInfoArea.boardSerialNumber + return slotpro + except Exception as error: + return "ERR " + str(error) + + @staticmethod + def getpsufruValue(prob_t, root, val): + try: + psu_match = False + binval = checktype.getValue(val, 0, 0) + if binval.startswith("ERR"): + return binval + psupro = {} + ret = checktype.decodeBinByValue(binval) + psupro['type1'] = ret.productInfoArea.productPartModelName + psupro['sn'] = ret.productInfoArea.productSerialNumber + psupro['hw_version'] = ret.productInfoArea.productVersion + psu_dict = status.getDecodValue(root, "psutype") + psupro['type1'] = psupro['type1'].strip() + if len(psu_dict) == 0: + return psupro + for psu_name, display_name in psu_dict.items(): + if psu_name.strip() == psupro['type1']: + psupro['type1'] = display_name + psu_match = True + break + if psu_match is not True: + prob_t['errcode'] = -1 + prob_t['errmsg'] = '%s' % ("ERR psu name: %s not support" % psupro['type1']) + return psupro + except Exception as error: + return "ERR " + str(error) + + +class status(): + def __init__(self, productname): + self.productname = productname + + @staticmethod + def getETroot(filename): + tree = ET.parse(filename) + root = tree.getroot() + return root + + @staticmethod + def getDecodValue(collection, decode): + decodes = collection.find('decode') + testdecode = decodes.find(decode) + test = {} + if testdecode is None: + return test + for neighbor in testdecode.iter('code'): + test[neighbor.attrib["key"]] = neighbor.attrib["value"] + return test + + @staticmethod + def getfileValue(location): + return checktype.getValue(location, " ", " ") + + @staticmethod + def getETValue(a, filename, tagname): + root = status.getETroot(filename) + for neighbor in root.iter(tagname): + prob_t = {} + prob_t.update(neighbor.attrib) + prob_t['errcode'] = 0 + prob_t['errmsg'] = '' + for pros in neighbor.iter("property"): + ret = dict(list(neighbor.attrib.items()) + list(pros.attrib.items())) + if ret.get('e2type') == 'fru' and ret.get("name") == "fru": + fruval = checktype.getfruValue(prob_t, root, ret["location"]) + if isinstance(fruval, str) and fruval.startswith("ERR"): + prob_t['errcode'] = -1 + prob_t['errmsg'] = fruval + break + prob_t.update(fruval) + continue + + if ret.get("name") == "psu" and ret.get('e2type') == 'fru': + psuval = checktype.getpsufruValue(prob_t, root, ret["location"]) + if isinstance(psuval, str) and psuval.startswith("ERR"): + prob_t['errcode'] = -1 + prob_t['errmsg'] = psuval + break + prob_t.update(psuval) + continue + + if ret.get("gettype") == "config": + prob_t[ret["name"]] = ret["value"] + continue + + if 'type' not in ret.keys(): + val = "0" + else: + val = ret["type"] + if 'bit' not in ret.keys(): + bit = "0" + else: + bit = ret["bit"] + if 'coefficient' not in ret.keys(): + coefficient = 1 + else: + coefficient = float(ret["coefficient"]) + if 'addend' not in ret.keys(): + addend = 0 + else: + addend = float(ret["addend"]) + + s = checktype.getValue(ret["location"], int(bit), int(val), coefficient, addend) + if isinstance(s, str) and s.startswith("ERR"): + prob_t['errcode'] = -1 + prob_t['errmsg'] = s + break + if 'default' in ret.keys(): + rt = status.getDecodValue(root, ret['decode']) + prob_t['errmsg'] = rt[str(s)] + if str(s) != ret["default"]: + prob_t['errcode'] = -1 + break + else: + if 'decode' in ret.keys(): + rt = status.getDecodValue(root, ret['decode']) + if (ret['decode'] == "psutype" and s.replace("\x00", "").rstrip() not in rt): + prob_t['errcode'] = -1 + prob_t['errmsg'] = '%s' % ("ERR psu name: %s not support" % + (s.replace("\x00", "").rstrip())) + else: + s = rt[str(s).replace("\x00", "").rstrip()] + name = ret["name"] + prob_t[name] = str(s) + a.append(prob_t) + + @staticmethod + def getCPUValue(a, filename, tagname): + root = status.getETroot(filename) + for neighbor in root.iter(tagname): + location = neighbor.attrib["location"] + L = [] + for dirpath, dirnames, filenames in os.walk(location): + for file in filenames: + if file.endswith("input"): + L.append(os.path.join(dirpath, file)) + L = sorted(L, reverse=False) + for i in range(len(L)): + prob_t = {} + prob_t["name"] = getPMCreg("%s/temp%d_label" % (location, i + 1)) + prob_t["temp"] = float(getPMCreg("%s/temp%d_input" % (location, i + 1))) / 1000 + prob_t["alarm"] = float(getPMCreg("%s/temp%d_crit_alarm" % (location, i + 1))) / 1000 + prob_t["crit"] = float(getPMCreg("%s/temp%d_crit" % (location, i + 1))) / 1000 + prob_t["max"] = float(getPMCreg("%s/temp%d_max" % (location, i + 1))) / 1000 + a.append(prob_t) + + @staticmethod + def getFileName(): + fpath = os.path.dirname(os.path.realpath(__file__)) + for file in DEV_XML_FILE_LIST: + xml = fpath + "/" + file + if os.path.exists(xml): + return xml + return fpath + "/" + CONFIG_NAME + + @staticmethod + def checkFan(ret): + _filename = status.getFileName() + # _filename = "/usr/local/bin/" + status.getFileName() + _tagname = "fan" + status.getETValue(ret, _filename, _tagname) + + @staticmethod + def getTemp(ret): + _filename = status.getFileName() + # _filename = "/usr/local/bin/" + status.getFileName() + _tagname = "temp" + status.getETValue(ret, _filename, _tagname) + + @staticmethod + def getPsu(ret): + _filename = status.getFileName() + # _filename = "/usr/local/bin/" + status.getFileName() + _tagname = "psu" + status.getETValue(ret, _filename, _tagname) + + @staticmethod + def getcputemp(ret): + _filename = status.getFileName() + _tagname = "cpus" + status.getCPUValue(ret, _filename, _tagname) + + @staticmethod + def getDcdc(ret): + _filename = status.getFileName() + _tagname = "dcdc" + status.getETValue(ret, _filename, _tagname) + + @staticmethod + def getmactemp(ret): + _filename = status.getFileName() + _tagname = "mactemp" + status.getETValue(ret, _filename, _tagname) + + @staticmethod + def getmacpower(ret): + _filename = status.getFileName() + _tagname = "macpower" + status.getETValue(ret, _filename, _tagname) diff --git a/device/micas/x86_64-micas_m2-w6950-128oc-r0/pcie.yaml b/device/micas/x86_64-micas_m2-w6950-128oc-r0/pcie.yaml new file mode 100644 index 00000000000..3aef6107f51 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6950-128oc-r0/pcie.yaml @@ -0,0 +1,285 @@ +- bus: '00' + dev: '00' + fn: '0' + id: 14d8 + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge Root + Complex' +- bus: '00' + dev: '00' + fn: '2' + id: 14d9 + name: 'IOMMU: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge IOMMU' +- bus: '00' + dev: '01' + fn: '0' + id: 14da + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge Dummy + Host Bridge' +- bus: '00' + dev: '01' + fn: '1' + id: 14db + name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge GPP + Bridge' +- bus: '00' + dev: '01' + fn: '2' + id: 14db + name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge GPP + Bridge' +- bus: '00' + dev: '01' + fn: '3' + id: 14db + name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge GPP + Bridge' +- bus: '00' + dev: '01' + fn: '4' + id: 14db + name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge GPP + Bridge' +- bus: '00' + dev: '01' + fn: '5' + id: 14db + name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge GPP + Bridge' +- bus: '00' + dev: '02' + fn: '0' + id: 14da + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge Dummy + Host Bridge' +- bus: '00' + dev: '02' + fn: '1' + id: 14db + name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge GPP + Bridge' +- bus: '00' + dev: '02' + fn: '2' + id: 14db + name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge GPP + Bridge' +- bus: '00' + dev: '03' + fn: '0' + id: 14da + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge Dummy + Host Bridge' +- bus: '00' + dev: '03' + fn: '1' + id: 14db + name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge GPP + Bridge' +- bus: '00' + dev: '03' + fn: '2' + id: 14db + name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge GPP + Bridge' +- bus: '00' + dev: '03' + fn: '3' + id: 14db + name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge GPP + Bridge' +- bus: '00' + dev: '03' + fn: '4' + id: 14db + name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge GPP + Bridge' +- bus: '00' + dev: '04' + fn: '0' + id: 14da + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge Dummy + Host Bridge' +- bus: '00' + dev: 08 + fn: '0' + id: 14da + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge Dummy + Host Bridge' +- bus: '00' + dev: 08 + fn: '1' + id: 14dd + name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge Internal + GPP Bridge to Bus [C:A]' +- bus: '00' + dev: 08 + fn: '3' + id: 14dd + name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge Internal + GPP Bridge to Bus [C:A]' +- bus: '00' + dev: '14' + fn: '0' + id: 790b + name: 'SMBus: Advanced Micro Devices, Inc. [AMD] FCH SMBus Controller (rev 71)' +- bus: '00' + dev: '14' + fn: '3' + id: 790e + name: 'ISA bridge: Advanced Micro Devices, Inc. [AMD] FCH LPC Bridge (rev 51)' +- bus: '00' + dev: '18' + fn: '0' + id: 14e0 + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge Data + Fabric; Function 0' +- bus: '00' + dev: '18' + fn: '1' + id: 14e1 + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge Data + Fabric; Function 1' +- bus: '00' + dev: '18' + fn: '2' + id: 14e2 + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge Data + Fabric; Function 2' +- bus: '00' + dev: '18' + fn: '3' + id: 14e3 + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge Data + Fabric; Function 3' +- bus: '00' + dev: '18' + fn: '4' + id: 14e4 + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge Data + Fabric; Function 4' +- bus: '00' + dev: '18' + fn: '5' + id: 14e5 + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge Data + Fabric; Function 5' +- bus: '00' + dev: '18' + fn: '6' + id: 14e6 + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge Data + Fabric; Function 6' +- bus: '00' + dev: '18' + fn: '7' + id: 14e7 + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge Data + Fabric; Function 7' +- bus: '01' + dev: '00' + fn: '0' + id: f910 + name: 'Ethernet controller: Broadcom Inc. and subsidiaries BCM78910 Switch ASIC + [Tomahawk6] (rev 01)' +- bus: '02' + dev: '00' + fn: '0' + id: 57b0 + name: 'Ethernet controller: Intel Corporation Ethernet Controller E610 10GBASE T' +- bus: '02' + dev: '00' + fn: '1' + id: 57b0 + name: 'Ethernet controller: Intel Corporation Ethernet Controller E610 10GBASE T' +- bus: '03' + dev: '00' + fn: '0' + id: '1591' + name: 'Ethernet controller: Intel Corporation Ethernet Controller E810-C for backplane + (rev 02)' +- bus: '03' + dev: '00' + fn: '1' + id: '1591' + name: 'Ethernet controller: Intel Corporation Ethernet Controller E810-C for backplane + (rev 02)' +- bus: '03' + dev: '00' + fn: '2' + id: '1591' + name: 'Ethernet controller: Intel Corporation Ethernet Controller E810-C for backplane + (rev 02)' +- bus: '03' + dev: '00' + fn: '3' + id: '1591' + name: 'Ethernet controller: Intel Corporation Ethernet Controller E810-C for backplane + (rev 02)' +- bus: '07' + dev: '00' + fn: '0' + id: 0280 + name: 'Non-Volatile memory controller: YEESTOR Microelectronics Co., Ltd PCIe NVMe + SSD (rev 01)' +- bus: 08 + dev: '00' + fn: '0' + id: '7011' + name: 'Memory controller: Xilinx Corporation 7-Series FPGA Hard PCIe block (AXI/debug)' +- bus: 09 + dev: '00' + fn: '0' + id: '7011' + name: 'Memory controller: Xilinx Corporation 7-Series FPGA Hard PCIe block (AXI/debug)' +- bus: 0a + dev: '00' + fn: '0' + id: '7011' + name: 'Memory controller: Xilinx Corporation 7-Series FPGA Hard PCIe block (AXI/debug)' +- bus: 0b + dev: '00' + fn: '0' + id: '1533' + name: 'Ethernet controller: Intel Corporation I210 Gigabit Network Connection (rev + 03)' +- bus: 0c + dev: '00' + fn: '0' + id: 14de + name: 'Non-Essential Instrumentation [1300]: Advanced Micro Devices, Inc. [AMD] + Raphael/Granite Ridge PCIe Dummy Function' +- bus: 0c + dev: '00' + fn: '2' + id: '1649' + name: 'Encryption controller: Advanced Micro Devices, Inc. [AMD] Family 19h PSP/CCP' +- bus: 0c + dev: '00' + fn: '3' + id: 15b6 + name: 'USB controller: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge + USB 3.1 xHCI' +- bus: 0c + dev: '00' + fn: '4' + id: 15b7 + name: 'USB controller: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge + USB 3.1 xHCI' +- bus: 0c + dev: '00' + fn: '5' + id: 15e2 + name: 'Multimedia controller: Advanced Micro Devices, Inc. [AMD] Audio Coprocessor + (rev 62)' +- bus: 0c + dev: '00' + fn: '6' + id: 15e3 + name: 'Audio device: Advanced Micro Devices, Inc. [AMD] Family 17h/19h/1ah HD Audio + Controller' +- bus: 0d + dev: '00' + fn: '0' + id: 15b8 + name: 'USB controller: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge + USB 2.0 xHCI' diff --git a/device/micas/x86_64-micas_m2-w6950-128oc-r0/platform.json b/device/micas/x86_64-micas_m2-w6950-128oc-r0/platform.json new file mode 100644 index 00000000000..cd61e4747d5 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6950-128oc-r0/platform.json @@ -0,0 +1,3740 @@ +{ + "chassis": { + "name": "M2-W6950-O128", + "thermal_manager": false, + "status_led": { + "controllable": false, + "colors": ["green", "blinking_green", "amber", "blinking_amber"] + }, + "components": [], + "fans": [], + "fan_drawers": [], + "psus": [], + "thermals": [], + "modules": [], + "sfps": [] + }, + "interfaces": { + "Ethernet0": { + "index": "1,1,1,1,1,1,1,1", + "lanes": "265,266,267,268,269,270,271,272", + "breakout_modes": { + "1x800G": [ + "etp1" + ], + "2x400G": [ + "etp1a", + "etp1b" + ], + "4x200G": [ + "etp1a", + "etp1b", + "etp1c", + "etp1d" + ], + "8x100G": [ + "etp1a", + "etp1b", + "etp1c", + "etp1d", + "etp1e", + "etp1f", + "etp1g", + "etp1h" + ] + } + }, + "Ethernet8": { + "index": "2,2,2,2,2,2,2,2", + "lanes": "297,298,299,300,301,302,303,304", + "breakout_modes": { + "1x800G": [ + "etp2" + ], + "2x400G": [ + "etp2a", + "etp2b" + ], + "4x200G": [ + "etp2a", + "etp2b", + "etp2c", + "etp2d" + ], + "8x100G": [ + "etp2a", + "etp2b", + "etp2c", + "etp2d", + "etp2e", + "etp2f", + "etp2g", + "etp2h" + ] + } + }, + "Ethernet16": { + "index": "3,3,3,3,3,3,3,3", + "lanes": "305,306,307,308,309,310,311,312", + "breakout_modes": { + "1x800G": [ + "etp3" + ], + "2x400G": [ + "etp3a", + "etp3b" + ], + "4x200G": [ + "etp3a", + "etp3b", + "etp3c", + "etp3d" + ], + "8x100G": [ + "etp3a", + "etp3b", + "etp3c", + "etp3d", + "etp3e", + "etp3f", + "etp3g", + "etp3h" + ] + } + }, + "Ethernet24": { + "index": "4,4,4,4,4,4,4,4", + "lanes": "313,314,315,316,317,318,319,320", + "breakout_modes": { + "1x800G": [ + "etp4" + ], + "2x400G": [ + "etp4a", + "etp4b" + ], + "4x200G": [ + "etp4a", + "etp4b", + "etp4c", + "etp4d" + ], + "8x100G": [ + "etp4a", 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"etp103a", + "etp103b", + "etp103c", + "etp103d", + "etp103e", + "etp103f", + "etp103g", + "etp103h" + ] + } + }, + "Ethernet824": { + "index": "104,104,104,104,104,104,104,104", + "lanes": "273,274,275,276,277,278,279,280", + "breakout_modes": { + "1x800G": [ + "etp104" + ], + "2x400G": [ + "etp104a", + "etp104b" + ], + "4x200G": [ + "etp104a", + "etp104b", + "etp104c", + "etp104d" + ], + "8x100G": [ + "etp104a", + "etp104b", + "etp104c", + "etp104d", + "etp104e", + "etp104f", + "etp104g", + "etp104h" + ] + } + }, + "Ethernet832": { + "index": "105,105,105,105,105,105,105,105", + "lanes": "201,202,203,204,205,206,207,208", + "breakout_modes": { + "1x800G": [ + "etp105" + ], + "2x400G": [ + "etp105a", + "etp105b" + ], + "4x200G": [ + "etp105a", + "etp105b", + "etp105c", + "etp105d" + ], + "8x100G": [ + "etp105a", + "etp105b", + "etp105c", + "etp105d", + "etp105e", + "etp105f", + "etp105g", + "etp105h" + ] + } + }, + "Ethernet840": { + "index": "106,106,106,106,106,106,106,106", + "lanes": "233,234,235,236,237,238,239,240", + "breakout_modes": { + "1x800G": [ + "etp106" + ], + "2x400G": [ + "etp106a", + "etp106b" + ], + "4x200G": [ + "etp106a", + "etp106b", + "etp106c", + "etp106d" + ], + "8x100G": [ + "etp106a", + "etp106b", + "etp106c", + "etp106d", + "etp106e", + "etp106f", + "etp106g", + "etp106h" + ] + } + }, + "Ethernet848": { + "index": "107,107,107,107,107,107,107,107", + "lanes": "241,242,243,244,245,246,247,248", + "breakout_modes": { + "1x800G": [ + "etp107" + ], + "2x400G": [ + "etp107a", + "etp107b" + ], + "4x200G": [ + "etp107a", + "etp107b", + "etp107c", + "etp107d" + ], + "8x100G": [ + "etp107a", + "etp107b", + "etp107c", + "etp107d", + "etp107e", + "etp107f", + "etp107g", + "etp107h" + ] + } + }, + "Ethernet856": { + "index": "108,108,108,108,108,108,108,108", + "lanes": "249,250,251,252,253,254,255,256", + "breakout_modes": { + "1x800G": [ + "etp108" + ], + "2x400G": [ + "etp108a", + "etp108b" + ], + "4x200G": [ + "etp108a", + "etp108b", + "etp108c", + "etp108d" + ], + "8x100G": [ + "etp108a", + "etp108b", + "etp108c", + "etp108d", + "etp108e", + "etp108f", + "etp108g", + "etp108h" + ] + } + }, + "Ethernet864": { + "index": "109,109,109,109,109,109,109,109", + "lanes": "185,186,187,188,189,190,191,192", + "breakout_modes": { + "1x800G": [ + "etp109" + ], + "2x400G": [ + "etp109a", + "etp109b" + ], + "4x200G": [ + "etp109a", + "etp109b", + "etp109c", + "etp109d" + ], + "8x100G": [ + "etp109a", + "etp109b", + "etp109c", + "etp109d", + "etp109e", + "etp109f", + "etp109g", + "etp109h" + ] + } + }, + "Ethernet872": { + "index": "110,110,110,110,110,110,110,110", + "lanes": "177,178,179,180,181,182,183,184", + "breakout_modes": { + "1x800G": [ + "etp110" + ], + "2x400G": [ + "etp110a", + "etp110b" + ], + "4x200G": [ + "etp110a", + "etp110b", + "etp110c", + "etp110d" + ], + "8x100G": [ + "etp110a", + "etp110b", + "etp110c", + "etp110d", + "etp110e", + "etp110f", + "etp110g", + "etp110h" + ] + } + }, + "Ethernet880": { + "index": "111,111,111,111,111,111,111,111", + "lanes": "169,170,171,172,173,174,175,176", + "breakout_modes": { + "1x800G": [ + "etp111" + ], + "2x400G": [ + "etp111a", + "etp111b" + ], + "4x200G": [ + "etp111a", + "etp111b", + "etp111c", + "etp111d" + ], + "8x100G": [ + "etp111a", + "etp111b", + "etp111c", + "etp111d", + "etp111e", + "etp111f", + "etp111g", + "etp111h" + ] + } + }, + "Ethernet888": { + "index": "112,112,112,112,112,112,112,112", + "lanes": "137,138,139,140,141,142,143,144", + "breakout_modes": { + "1x800G": [ + "etp112" + ], + "2x400G": [ + "etp112a", + "etp112b" + ], + "4x200G": [ + "etp112a", + "etp112b", + "etp112c", + "etp112d" + ], + "8x100G": [ + "etp112a", + "etp112b", + "etp112c", + "etp112d", + "etp112e", + "etp112f", + "etp112g", + "etp112h" + ] + } + }, + "Ethernet896": { + "index": "113,113,113,113,113,113,113,113", + "lanes": "841,842,843,844,845,846,847,848", + "breakout_modes": { + "1x800G": [ + "etp113" + ], + "2x400G": [ + "etp113a", + "etp113b" + ], + "4x200G": [ + "etp113a", + "etp113b", + "etp113c", + "etp113d" + ], + "8x100G": [ + "etp113a", + "etp113b", + "etp113c", + "etp113d", + "etp113e", + "etp113f", + "etp113g", + "etp113h" + ] + } + }, + "Ethernet904": { + "index": "114,114,114,114,114,114,114,114", + "lanes": "873,874,875,876,877,878,879,880", + "breakout_modes": { + "1x800G": [ + "etp114" + ], + "2x400G": [ + "etp114a", + "etp114b" + ], + "4x200G": [ + "etp114a", + "etp114b", + "etp114c", + "etp114d" + ], + "8x100G": [ + "etp114a", + "etp114b", + "etp114c", + "etp114d", + "etp114e", + "etp114f", + "etp114g", + "etp114h" + ] + } + }, + "Ethernet912": { + "index": "115,115,115,115,115,115,115,115", + "lanes": "881,882,883,884,885,886,887,888", + "breakout_modes": { + "1x800G": [ + "etp115" + ], + "2x400G": [ + "etp115a", + "etp115b" + ], + "4x200G": [ + "etp115a", + "etp115b", + "etp115c", + "etp115d" + ], + "8x100G": [ + "etp115a", + "etp115b", + "etp115c", + "etp115d", + "etp115e", + "etp115f", + "etp115g", + "etp115h" + ] + } + }, + "Ethernet920": { + "index": "116,116,116,116,116,116,116,116", + "lanes": "889,890,891,892,893,894,895,896", + "breakout_modes": { + "1x800G": [ + "etp116" + ], + "2x400G": [ + "etp116a", + "etp116b" + ], + "4x200G": [ + "etp116a", + "etp116b", + "etp116c", + "etp116d" + ], + "8x100G": [ + "etp116a", + "etp116b", + "etp116c", + "etp116d", + "etp116e", + "etp116f", + "etp116g", + "etp116h" + ] + } + }, + "Ethernet928": { + "index": "117,117,117,117,117,117,117,117", + "lanes": "825,826,827,828,829,830,831,832", + "breakout_modes": { + "1x800G": [ + "etp117" + ], + "2x400G": [ + "etp117a", + "etp117b" + ], + "4x200G": [ + "etp117a", + "etp117b", + "etp117c", + "etp117d" + ], + "8x100G": [ + "etp117a", + "etp117b", + "etp117c", + "etp117d", + "etp117e", + "etp117f", + "etp117g", + "etp117h" + ] + } + }, + "Ethernet936": { + "index": "118,118,118,118,118,118,118,118", + "lanes": "817,818,819,820,821,822,823,824", + "breakout_modes": { + "1x800G": [ + "etp118" + ], + "2x400G": [ + "etp118a", + "etp118b" + ], + "4x200G": [ + "etp118a", + "etp118b", + "etp118c", + "etp118d" + ], + "8x100G": [ + "etp118a", + "etp118b", + "etp118c", + "etp118d", + "etp118e", + "etp118f", + "etp118g", + "etp118h" + ] + } + }, + "Ethernet944": { + "index": "119,119,119,119,119,119,119,119", + "lanes": "809,810,811,812,813,814,815,816", + "breakout_modes": { + "1x800G": [ + "etp119" + ], + "2x400G": [ + "etp119a", + "etp119b" + ], + "4x200G": [ + "etp119a", + "etp119b", + "etp119c", + "etp119d" + ], + "8x100G": [ + "etp119a", + "etp119b", + "etp119c", + "etp119d", + "etp119e", + "etp119f", + "etp119g", + "etp119h" + ] + } + }, + "Ethernet952": { + "index": "120,120,120,120,120,120,120,120", + "lanes": "777,778,779,780,781,782,783,784", + "breakout_modes": { + "1x800G": [ + "etp120" + ], + "2x400G": [ + "etp120a", + "etp120b" + ], + "4x200G": [ + "etp120a", + "etp120b", + "etp120c", + "etp120d" + ], + "8x100G": [ + "etp120a", + "etp120b", + "etp120c", + "etp120d", + "etp120e", + "etp120f", + "etp120g", + "etp120h" + ] + } + }, + "Ethernet960": { + "index": "121,121,121,121,121,121,121,121", + "lanes": "721,722,723,724,725,726,727,728", + "breakout_modes": { + "1x800G": [ + "etp121" + ], + "2x400G": [ + "etp121a", + "etp121b" + ], + "4x200G": [ + "etp121a", + "etp121b", + "etp121c", + "etp121d" + ], + "8x100G": [ + "etp121a", + "etp121b", + "etp121c", + "etp121d", + "etp121e", + "etp121f", + "etp121g", + "etp121h" + ] + } + }, + "Ethernet968": { + "index": "122,122,122,122,122,122,122,122", + "lanes": "705,706,707,708,709,710,711,712", + "breakout_modes": { + "1x800G": [ + "etp122" + ], + "2x400G": [ + "etp122a", + "etp122b" + ], + "4x200G": [ + "etp122a", + "etp122b", + "etp122c", + "etp122d" + ], + "8x100G": [ + "etp122a", + "etp122b", + "etp122c", + "etp122d", + "etp122e", + "etp122f", + "etp122g", + "etp122h" + ] + } + }, + "Ethernet976": { + "index": "123,123,123,123,123,123,123,123", + "lanes": "737,738,739,740,741,742,743,744", + "breakout_modes": { + "1x800G": [ + "etp123" + ], + "2x400G": [ + "etp123a", + "etp123b" + ], + "4x200G": [ + "etp123a", + "etp123b", + "etp123c", + "etp123d" + ], + "8x100G": [ + "etp123a", + "etp123b", + "etp123c", + "etp123d", + "etp123e", + "etp123f", + "etp123g", + "etp123h" + ] + } + }, + "Ethernet984": { + "index": "124,124,124,124,124,124,124,124", + "lanes": "729,730,731,732,733,734,735,736", + "breakout_modes": { + "1x800G": [ + "etp124" + ], + "2x400G": [ + "etp124a", + "etp124b" + ], + "4x200G": [ + "etp124a", + "etp124b", + "etp124c", + "etp124d" + ], + "8x100G": [ + "etp124a", + "etp124b", + "etp124c", + "etp124d", + "etp124e", + "etp124f", + "etp124g", + "etp124h" + ] + } + }, + "Ethernet992": { + "index": "125,125,125,125,125,125,125,125", + "lanes": "793,794,795,796,797,798,799,800", + "breakout_modes": { + "1x800G": [ + "etp125" + ], + "2x400G": [ + "etp125a", + "etp125b" + ], + "4x200G": [ + "etp125a", + "etp125b", + "etp125c", + "etp125d" + ], + "8x100G": [ + "etp125a", + "etp125b", + "etp125c", + "etp125d", + "etp125e", + "etp125f", + "etp125g", + "etp125h" + ] + } + }, + "Ethernet1000": { + "index": "126,126,126,126,126,126,126,126", + "lanes": "801,802,803,804,805,806,807,808", + "breakout_modes": { + "1x800G": [ + "etp126" + ], + "2x400G": [ + "etp126a", + "etp126b" + ], + "4x200G": [ + "etp126a", + "etp126b", + "etp126c", + "etp126d" + ], + "8x100G": [ + "etp126a", + "etp126b", + "etp126c", + "etp126d", + "etp126e", + "etp126f", + "etp126g", + "etp126h" + ] + } + }, + "Ethernet1008": { + "index": "127,127,127,127,127,127,127,127", + "lanes": "785,786,787,788,789,790,791,792", + "breakout_modes": { + "1x800G": [ + "etp127" + ], + "2x400G": [ + "etp127a", + "etp127b" + ], + "4x200G": [ + "etp127a", + "etp127b", + "etp127c", + "etp127d" + ], + "8x100G": [ + "etp127a", + "etp127b", + "etp127c", + "etp127d", + "etp127e", + "etp127f", + "etp127g", + "etp127h" + ] + } + }, + "Ethernet1016": { + "index": "128,128,128,128,128,128,128,128", + "lanes": "769,770,771,772,773,774,775,776", + "breakout_modes": { + "1x800G": [ + "etp128" + ], + "2x400G": [ + "etp128a", + "etp128b" + ], + "4x200G": [ + "etp128a", + "etp128b", + "etp128c", + "etp128d" + ], + "8x100G": [ + "etp128a", + "etp128b", + "etp128c", + "etp128d", + "etp128e", + "etp128f", + "etp128g", + "etp128h" + ] + } + }, + "Ethernet1024": { + "index": "129,129,129,129", + "lanes": "1026,1027,1028,1029", + "breakout_modes": { + "1x100G": [ + "etp129" + ] + } + } + } +} diff --git a/device/micas/x86_64-micas_m2-w6950-128oc-r0/platform_asic b/device/micas/x86_64-micas_m2-w6950-128oc-r0/platform_asic new file mode 100644 index 00000000000..96046765276 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6950-128oc-r0/platform_asic @@ -0,0 +1 @@ +broadcom diff --git a/device/micas/x86_64-micas_m2-w6950-128oc-r0/platform_components.json b/device/micas/x86_64-micas_m2-w6950-128oc-r0/platform_components.json new file mode 100644 index 00000000000..029922ab313 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6950-128oc-r0/platform_components.json @@ -0,0 +1,19 @@ +{ + "chassis": { + "M2-W6950-O128": { + "component": { + "CPU_CPLD": { }, + "MGMT_CPLD": { }, + "MAC_CPLD_A": { }, + "MAC_CPLD_B": { }, + "MAC_CPLD_C": { }, + "UPORT_CPLD": { }, + "DPORT_CPLD": { }, + "UFAN_CPLD": { }, + "DFAN_CPLD": { }, + "MAC_CPLD_D": { }, + "BIOS": { } + } + } + } +} diff --git a/device/micas/x86_64-micas_m2-w6950-128oc-r0/platform_env.conf b/device/micas/x86_64-micas_m2-w6950-128oc-r0/platform_env.conf new file mode 100644 index 00000000000..75bc0137888 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6950-128oc-r0/platform_env.conf @@ -0,0 +1,3 @@ +is_ltsw_chip=1 +SYNCD_SHM_SIZE=1g +switch_host=1 \ No newline at end of file diff --git a/device/micas/x86_64-micas_m2-w6950-128oc-r0/platform_env_fac.conf b/device/micas/x86_64-micas_m2-w6950-128oc-r0/platform_env_fac.conf new file mode 100644 index 00000000000..3a14dd8bd5d --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6950-128oc-r0/platform_env_fac.conf @@ -0,0 +1 @@ +sdkmsg=1 diff --git a/device/micas/x86_64-micas_m2-w6950-128oc-r0/plugins/eeprom.py b/device/micas/x86_64-micas_m2-w6950-128oc-r0/plugins/eeprom.py new file mode 100644 index 00000000000..697bd2332b4 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6950-128oc-r0/plugins/eeprom.py @@ -0,0 +1,19 @@ +#!/usr/bin/env python + +try: + import binascii + import time + import optparse + import warnings + import os + import sys + from sonic_eeprom import eeprom_base + from sonic_eeprom import eeprom_tlvinfo +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + +class board(eeprom_tlvinfo.TlvInfoDecoder): + + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/bus/i2c/devices/1-0056/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) diff --git a/device/micas/x86_64-micas_m2-w6950-128oc-r0/plugins/sfputil.py b/device/micas/x86_64-micas_m2-w6950-128oc-r0/plugins/sfputil.py new file mode 100644 index 00000000000..b38a1befe27 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6950-128oc-r0/plugins/sfputil.py @@ -0,0 +1,379 @@ +# sfputil.py +# +# Platform-specific SFP transceiver interface for SONiC +# + +try: + import time + import os + import traceback + import subprocess + from ctypes import create_string_buffer + from sonic_sfp.sfputilbase import SfpUtilBase + from sonic_platform_base.sonic_sfp.sff8436 import sff8436Dom +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + + PORT_START = 0 + PORT_END = 129 + PORTS_IN_BLOCK = 129 + + EEPROM_OFFSET = 201 + SFP_DEVICE_TYPE = "optoe2" + QSFP_DEVICE_TYPE = "optoe1" + QSFP_DD_DEVICE_TYPE = "optoe3" + I2C_MAX_ATTEMPT = 3 + + OPTOE_TYPE1 = 1 + OPTOE_TYPE2 = 2 + OPTOE_TYPE3 = 3 + + SFP_STATUS_INSERTED = '1' + SFP_STATUS_REMOVED = '0' + + _port_to_eeprom_mapping = {} + port_to_i2cbus_mapping ={} + port_dict = {} + + qsfp_ports_list = [] + qsfp_dd_ports_list = [] + + @property + def port_start(self): + return self.PORT_START + + @property + def port_end(self): + return self.PORT_END + + @property + def qsfp_ports(self): + return self.qsfp_ports_list + + @property + def qsfp_dd_ports(self): + return self.qsfp_dd_ports_list + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + def __init__(self): + for x in range(self.PORT_START, self.PORTS_IN_BLOCK-2): + self.port_to_i2cbus_mapping[x] = (x + self.EEPROM_OFFSET) + self.port_to_i2cbus_mapping[128] = 329 + self.port_to_i2cbus_mapping[129] = 330 + self.update_ports_list() + + SfpUtilBase.__init__(self) + + def _sfp_read_file_path(self, file_path, offset, num_bytes): + attempts = 0 + while attempts < self.I2C_MAX_ATTEMPT: + try: + file_path.seek(offset) + read_buf = file_path.read(num_bytes) + except: + attempts += 1 + time.sleep(0.05) + else: + return True, read_buf + return False, None + + def _sfp_eeprom_present(self, sysfs_sfp_i2c_client_eeprompath, offset): + """Tries to read the eeprom file to determine if the + device/sfp is present or not. If sfp present, the read returns + valid bytes. If not, read returns error 'Connection timed out""" + + if not os.path.exists(sysfs_sfp_i2c_client_eeprompath): + return False + else: + with open(sysfs_sfp_i2c_client_eeprompath, "rb", buffering=0) as sysfsfile: + rv, buf = self._sfp_read_file_path(sysfsfile, offset, 1) + return rv + + def _add_new_sfp_device(self, sysfs_sfp_i2c_adapter_path, devaddr, devtype): + try: + sysfs_nd_path = "%s/device/new_device" % sysfs_sfp_i2c_adapter_path + + # Write device address to new_device file + nd_file = open(sysfs_nd_path, "w") + nd_str = "%s %s" % (devtype, hex(devaddr)) + nd_file.write(nd_str) + nd_file.close() + + except Exception as err: + print("Error writing to new device file: %s" % str(err)) + return 1 + else: + return 0 + + def _get_port_eeprom_path(self, port_num, devid): + return "/sys/s3ip/transceiver/eth%d/eeprom" % (port_num + 1) + + # def _get_port_eeprom_path(self, port_num, devid): + # sysfs_i2c_adapter_base_path = "/sys/class/i2c-dev" + + # if port_num in self.port_to_eeprom_mapping.keys(): + # sysfs_sfp_i2c_client_eeprom_path = self.port_to_eeprom_mapping[port_num] + # else: + # sysfs_i2c_adapter_base_path = "/sys/class/i2c-dev" + + # i2c_adapter_id = self._get_port_i2c_adapter_id(port_num) + # if i2c_adapter_id is None: + # print("Error getting i2c bus num") + # return None + + # # Get i2c virtual bus path for the sfp + # sysfs_sfp_i2c_adapter_path = "%s/i2c-%s" % (sysfs_i2c_adapter_base_path, + # str(i2c_adapter_id)) + + # # If i2c bus for port does not exist + # if not os.path.exists(sysfs_sfp_i2c_adapter_path): + # print("Could not find i2c bus %s. Driver not loaded?" % sysfs_sfp_i2c_adapter_path) + # return None + + # sysfs_sfp_i2c_client_path = "%s/%s-00%s" % (sysfs_sfp_i2c_adapter_path, + # str(i2c_adapter_id), + # hex(devid)[-2:]) + + # # If sfp device is not present on bus, Add it + # if not os.path.exists(sysfs_sfp_i2c_client_path): + # if port_num in self.qsfp_dd_ports: + # ret = self._add_new_sfp_device( + # sysfs_sfp_i2c_adapter_path, devid, self.QSFP_DD_DEVICE_TYPE) + # elif port_num in self.qsfp_ports: + # ret = self._add_new_sfp_device( + # sysfs_sfp_i2c_adapter_path, devid, self.QSFP_DEVICE_TYPE) + # else: + # ret = self._add_new_sfp_device( + # sysfs_sfp_i2c_adapter_path, devid, self.SFP_DEVICE_TYPE) + # if ret != 0: + # print("Error adding sfp device") + # return None + + # sysfs_sfp_i2c_client_eeprom_path = "%s/eeprom" % sysfs_sfp_i2c_client_path + + # return sysfs_sfp_i2c_client_eeprom_path + + def _read_eeprom_specific_bytes(self, sysfsfile_eeprom, offset, num_bytes): + eeprom_raw = [] + for i in range(0, num_bytes): + eeprom_raw.append("0x00") + + rv, raw = self._sfp_read_file_path(sysfsfile_eeprom, offset, num_bytes) + if rv == False: + return None + + try: + if len(raw) == 0: + return None + for n in range(0, num_bytes): + eeprom_raw[n] = hex(raw[n])[2:].zfill(2) + except: + return None + + return eeprom_raw + + def get_eeprom_dom_raw(self, port_num): + if port_num in self.qsfp_ports: + # QSFP DOM EEPROM is also at addr 0x50 and thus also stored in eeprom_ifraw + return None + else: + # Read dom eeprom at addr 0x51 + return self._read_eeprom_devid(port_num, self.IDENTITY_EEPROM_ADDR, 256) + + def get_presence(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + cmd = "cat /sys/s3ip/transceiver/eth{}/present".format(str(port_num + 1)) + ret, output = subprocess.getstatusoutput(cmd) + if ret != 0: + return False + if output == "1": + return True + return False + + def check_is_qsfpdd(self, port_num): + try: + if self.get_presence(port_num) == False: + return False + + eeprom_path = self._get_port_eeprom_path(port_num, 0x50) + with open(eeprom_path, mode="rb", buffering=0) as eeprom: + eeprom_raw = self._read_eeprom_specific_bytes(eeprom, 0, 1) + if eeprom_raw is None: + return False + # according to sff-8024 A0h Byte 0 is '1e','18' or '19' means the transceiver is qsfpdd, + if (eeprom_raw[0] == '1e' or eeprom_raw[0] == '18' or eeprom_raw[0] == '19'): + return True + except Exception as e: + print(traceback.format_exc()) + + return False + + def check_optoe_type(self, port_num, optoe_type): + if self.get_presence(port_num) == False: + return True + try: + eeprom_path = self._get_port_eeprom_path(port_num, 0x50) + dev_class_path = '/sys/bus/i2c/devices/i2c-{0}/{0}-0050/dev_class' + i2c_path = dev_class_path.format(str(self.port_to_i2cbus_mapping[port_num])) + cmd = "cat " + i2c_path + ret, output = subprocess.getstatusoutput(cmd) + if ret != 0: + print("cmd: %s execution fail, output:%s" % (cmd, output)) + return False + if int(output) != optoe_type: + cmd = "echo " + str(optoe_type) + " > " + i2c_path + ret, output = subprocess.getstatusoutput(cmd) + if ret != 0: + print("cmd: %s execution fail, output:%s" % (cmd, output)) + return False + return True + + except Exception as e: + print(traceback.format_exc()) + return False + + def update_ports_list(self): + self.qsfp_ports_list = [] + self.qsfp_dd_ports_list = [] + for x in range(self.PORT_START, self.PORTS_IN_BLOCK): + if (self.check_is_qsfpdd(x)): + self.qsfp_dd_ports_list.append(x) + else: + self.qsfp_ports_list.append(x) + + def get_low_power_mode(self, port_num): + # Check for invalid port_num + + return True + + def set_low_power_mode(self, port_num, lpmode): + # Check for invalid port_num + + return True + + def reset(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + return True + + def get_transceiver_change_event(self, timeout=0): + + start_time = time.time() + current_port_dict = {} + forever = False + + if timeout == 0: + forever = True + elif timeout > 0: + timeout = timeout / float(1000) # Convert to secs + else: + print ("get_transceiver_change_event:Invalid timeout value", timeout) + return False, {} + + end_time = start_time + timeout + if start_time > end_time: + print ('get_transceiver_change_event:' \ + 'time wrap / invalid timeout value', timeout) + + return False, {} # Time wrap or possibly incorrect timeout + + while timeout >= 0: + # Check for OIR events and return updated port_dict + for x in range(self.PORT_START, self.PORTS_IN_BLOCK): + if self.get_presence(x): + current_port_dict[x] = self.SFP_STATUS_INSERTED + else: + current_port_dict[x] = self.SFP_STATUS_REMOVED + if (current_port_dict == self.port_dict): + if forever: + time.sleep(1) + else: + timeout = end_time - time.time() + if timeout >= 1: + time.sleep(1) # We poll at 1 second granularity + else: + if timeout > 0: + time.sleep(timeout) + self.update_ports_list() + return True, {} + else: + # Update reg value + self.update_ports_list() + self.port_dict = current_port_dict + return True, self.port_dict + print ("get_transceiver_change_event: Should not reach here.") + return False, {} + + def _twos_comp(self, num, bits): + try: + if ((num & (1 << (bits - 1))) != 0): + num = num - (1 << bits) + return num + except: + return 0 + + def get_highest_temperature(self): + offset = 0 + hightest_temperature = -9999 + + presence_flag = False + read_eeprom_flag = False + temperature_valid_flag = False + + for port in range(self.PORT_START, self.PORTS_IN_BLOCK): + if self.get_presence(port) == False: + continue + + presence_flag = True + + if port in self.qsfp_dd_ports: + offset = 14 + elif port in self.qsfp_ports: + offset = 22 + else: + offset = 96 + + eeprom_path = self._get_port_eeprom_path(port, 0x50) + try: + with open(eeprom_path, mode="rb", buffering=0) as eeprom: + read_eeprom_flag = True + eeprom_raw = self._read_eeprom_specific_bytes(eeprom, offset, 2) + if len(eeprom_raw) != 0: + msb = int(eeprom_raw[0], 16) + lsb = int(eeprom_raw[1], 16) + + result = (msb << 8) | (lsb & 0xff) + result = self._twos_comp(result, 16) + result = float(result / 256.0) + if -50 <= result <= 200: + temperature_valid_flag = True + if hightest_temperature < result: + hightest_temperature = result + except Exception as e: + pass + + # all port not presence + if presence_flag == False: + hightest_temperature = -10000 + + # all port read eeprom fail + elif read_eeprom_flag == False: + hightest_temperature = -9999 + + # all port temperature invalid + elif read_eeprom_flag == True and temperature_valid_flag == False: + hightest_temperature = -10000 + + hightest_temperature = round(hightest_temperature, 2) + + return hightest_temperature diff --git a/device/micas/x86_64-micas_m2-w6950-128oc-r0/plugins/ssd_util.py b/device/micas/x86_64-micas_m2-w6950-128oc-r0/plugins/ssd_util.py new file mode 100644 index 00000000000..d7f62b2dc64 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6950-128oc-r0/plugins/ssd_util.py @@ -0,0 +1,318 @@ +# +# ssd_util.py +# +# Generic implementation of the SSD health API +# SSD models supported: +# - InnoDisk +# - StorFly +# - Virtium + +try: + import re + import os + import subprocess + from sonic_platform_base.sonic_storage.storage_base import StorageBase +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + +SMARTCTL = "smartctl {} -a" +INNODISK = "iSmart -d {}" +VIRTIUM = "SmartCmd -m {}" +DISK_LIST_CMD = "fdisk -l -o Device" +DISK_FREE_CMD = "df -h" +MOUNT_CMD = "mount" + +NOT_AVAILABLE = "N/A" +PE_CYCLE = 3000 +FAIL_PERCENT = 95 + +# Set Vendor Specific IDs +INNODISK_HEALTH_ID = 169 +INNODISK_TEMPERATURE_ID = 194 + +class SsdUtil(StorageBase): + """ + Generic implementation of the SSD health API + """ + model = NOT_AVAILABLE + serial = NOT_AVAILABLE + firmware = NOT_AVAILABLE + temperature = NOT_AVAILABLE + health = NOT_AVAILABLE + remaining_life = NOT_AVAILABLE + sata_rate = NOT_AVAILABLE + ssd_info = NOT_AVAILABLE + vendor_ssd_info = NOT_AVAILABLE + + def __init__(self, diskdev): + self.vendor_ssd_utility = { + "Generic" : { "utility" : SMARTCTL, "parser" : self.parse_generic_ssd_info }, + "InnoDisk" : { "utility" : INNODISK, "parser" : self.parse_innodisk_info }, + "M.2" : { "utility" : INNODISK, "parser" : self.parse_innodisk_info }, + "StorFly" : { "utility" : VIRTIUM, "parser" : self.parse_virtium_info }, + "Virtium" : { "utility" : VIRTIUM, "parser" : self.parse_virtium_info } + } + + """ + The dict model_attr keys relate the vendors + LITEON : "ER2-GD","AF2MA31DTDLT" + Intel : "SSDSCKKB" + SMI : "SM619GXC" + samsung: "MZNLH" + ADATA : "IM2S3134N" + """ + self.model_attr = { + "ER2-GD" : { "temperature" : r"\n190\s+(.+?)\n", "remainingLife" : r"\n202\s+(.+?)\n" }, + "AF2MA31DTDLT" : { "temperature" : r"\n194\s+(.+?)\n", "remainingLife" : r"\n202\s+(.+?)\n" }, + "SSDSCK" : { "temperature" : r"\n194\s+(.+?)\n", "remainingLife" : r"\n233\s+(.+?)\n" }, + "SM619GXC" : { "temperature" : r"\n194\s+(.+?)\n", "remainingLife" : r"\n169\s+(.+?)\n" }, + "MZNLH" : { "temperature" : r"\n190\s+(.+?)\n", "remainingLife" : r"\n245\s+(.+?)\n" }, + "IM2S3134N" : { "temperature" : r"\n194\s+(.+?)\n", "remainingLife" : r"\n231\s+(.+?)\n" }, + "MTFDDAV240TCB-1AR1ZABAA" : { "temperature" : r"\n194\s+(.+?)\n", "remainingLife" : r"\n202\s+(.+?)\n" }, + } + + self.key_list = list(self.model_attr.keys()) + self.attr_info_rule = r"[\s\S]*SMART Attributes Data Structure revision number: 1|SMART Error Log Version[\s\S]*" + self.dev = diskdev + # Generic part + self.fetch_generic_ssd_info(diskdev) + self.parse_generic_ssd_info() + self.fetch_vendor_ssd_info(diskdev, "Generic") + + # Known vendor part + if self.model: + model_short = self.model.split()[0] + if model_short in self.vendor_ssd_utility: + self.fetch_vendor_ssd_info(diskdev, model_short) + self.parse_vendor_ssd_info(model_short) + else: + # No handler registered for this disk model + pass + else: + # Failed to get disk model + self.model = "Unknown" + + def _execute_shell(self, cmd): + process = subprocess.Popen(cmd.split(), universal_newlines=True, stdout=subprocess.PIPE) + output, error = process.communicate() + exit_code = process.returncode + if exit_code: + return None + return output + + def _parse_re(self, pattern, buffer): + res_list = re.findall(pattern, str(buffer)) + return res_list[0] if res_list else NOT_AVAILABLE + + def fetch_generic_ssd_info(self, diskdev): + self.ssd_info = self._execute_shell(self.vendor_ssd_utility["Generic"]["utility"].format(diskdev)) + + # Health and temperature values may be overwritten with vendor specific data + def parse_generic_ssd_info(self): + if "nvme" in self.dev: + self.model = self._parse_re(r'Model Number:\s*(.+?)\n', self.ssd_info) + + health_raw = self._parse_re(r'Percentage Used\s*(.+?)\n', self.ssd_info) + if health_raw == NOT_AVAILABLE: + self.health = NOT_AVAILABLE + else: + health_raw = health_raw.split()[-1] + self.health = 100 - float(health_raw.strip('%')) + + temp_raw = self._parse_re(r'Temperature\s*(.+?)\n', self.ssd_info) + if temp_raw == NOT_AVAILABLE: + self.temperature = NOT_AVAILABLE + else: + temp_raw = temp_raw.split()[-2] + self.temperature = float(temp_raw) + else: + self.model = self._parse_re(r'Device Model:\s*(.+?)\n', self.ssd_info) + model_key = "" + for key in self.key_list: + if re.search(key, self.model): + model_key = key + break + if model_key != "": + self.remaining_life = self._parse_re(self.model_attr[model_key]["remainingLife"], re.sub(self.attr_info_rule,"",self.ssd_info)).split()[2] + self.temperature = self._parse_re(self.model_attr[model_key]["temperature"], re.sub(self.attr_info_rule,"",self.ssd_info)).split()[8] + self.health = self.remaining_life + # Get the LITEON ssd health value by (PE CYCLE - AVG ERASE CYCLE )/(PE CYCLE) + if model_key in ["ER2-GD", "AF2MA31DTDLT"]: + avg_erase = int(self._parse_re(r'\n173\s+(.+?)\n' ,re.sub(self.attr_info_rule,"",self.ssd_info)).split()[-1]) + self.health = int(round((PE_CYCLE - avg_erase)/PE_CYCLE*100,0)) + if self.remaining_life != NOT_AVAILABLE and int(self.remaining_life) < FAIL_PERCENT: + self.remaining_life = "Fail" + self.sata_rate = self._parse_re(r'SATA Version is:.*current: (.+?)\)\n', self.ssd_info) + self.serial = self._parse_re(r'Serial Number:\s*(.+?)\n', self.ssd_info) + self.firmware = self._parse_re(r'Firmware Version:\s*(.+?)\n', self.ssd_info) + + def parse_innodisk_info(self): + if self.vendor_ssd_info: + self.health = self._parse_re(r'Health:\s*(.+?)%', self.vendor_ssd_info) + self.temperature = self._parse_re(r'Temperature\s*\[\s*(.+?)\]', self.vendor_ssd_info) + else: + if self.health == NOT_AVAILABLE: + health_raw = self.parse_id_number(INNODISK_HEALTH_ID) + self.health = health_raw.split()[-1] + if self.temperature == NOT_AVAILABLE: + temp_raw = self.parse_id_number(INNODISK_TEMPERATURE_ID) + self.temperature = temp_raw.split()[-6] + + def parse_virtium_info(self): + if self.vendor_ssd_info: + self.temperature = self._parse_re(r'Temperature_Celsius\s*\d*\s*(\d+?)\s+', self.vendor_ssd_info) + nand_endurance = self._parse_re(r'NAND_Endurance\s*\d*\s*(\d+?)\s+', self.vendor_ssd_info) + avg_erase_count = self._parse_re(r'Average_Erase_Count\s*\d*\s*(\d+?)\s+', self.vendor_ssd_info) + try: + self.health = 100 - (float(avg_erase_count) * 100 / float(nand_endurance)) + except (ValueError, ZeroDivisionError): + # Invalid avg_erase_count or nand_endurance. + pass + + def fetch_vendor_ssd_info(self, diskdev, model): + self.vendor_ssd_info = self._execute_shell(self.vendor_ssd_utility[model]["utility"].format(diskdev)) + + def parse_vendor_ssd_info(self, model): + self.vendor_ssd_utility[model]["parser"]() + + def check_readonly2(self, partition, filesystem): + # parse mount cmd output info + mount_info = self._execute_shell(MOUNT_CMD) + for line in mount_info.split('\n'): + column_list = line.split() + if line == '': + continue + if column_list[0] == partition and column_list[2] == filesystem: + if column_list[5].split(',')[0][1:] == "ro": + return partition + else: + return NOT_AVAILABLE + return NOT_AVAILABLE + + def check_readonly(self, partition, filesystem): + ret = os.access(filesystem, os.W_OK) + if ret == False: + return partition + else: + return NOT_AVAILABLE + + def get_health(self): + """ + Retrieves current disk health in percentages + + Returns: + A float number of current ssd health + e.g. 83.5 + """ + if self.health == 'N/A': + return "NA" + else: + return float(self.health) + + def get_temperature(self): + """ + Retrieves current disk temperature in Celsius + + Returns: + A float number of current temperature in Celsius + e.g. 40.1 + """ + if self.temperature == 'N/A': + return 'NA' + else: + return float(self.temperature) + + def get_model(self): + """ + Retrieves model for the given disk device + + Returns: + A string holding disk model as provided by the manufacturer + """ + return self.model + + def get_firmware(self): + """ + Retrieves firmware version for the given disk device + + Returns: + A string holding disk firmware version as provided by the manufacturer + """ + return self.firmware + + def get_serial(self): + """ + Retrieves serial number for the given disk device + + Returns: + A string holding disk serial number as provided by the manufacturer + """ + return self.serial + def get_sata_rate(self): + """ + Retrieves SATA rate for the given disk device + Returns: + A string holding current SATA rate as provided by the manufacturer + """ + return self.sata_rate + def get_remaining_life(self): + """ + Retrieves remaining life for the given disk device + Returns: + A string holding disk remaining life as provided by the manufacturer + """ + return self.remaining_life + def get_vendor_output(self): + """ + Retrieves vendor specific data for the given disk device + + Returns: + A string holding some vendor specific disk information + """ + return self.vendor_ssd_info + + def parse_id_number(self, id): + return self._parse_re(r'{}\s*(.+?)\n'.format(id), self.ssd_info) + + def get_readonly_partition(self): + """ + Check the partition mount filesystem is readonly status,then output the result. + Returns: + The readonly partition list + """ + + ro_partition_list = [] + partition_list = [] + + # parse fdisk cmd output info + disk_info = self._execute_shell(DISK_LIST_CMD) + begin_flag = False + for line in disk_info.split('\n'): + if line == "Device": + begin_flag = True + continue + if begin_flag: + if line != "": + partition_list.append(line) + else: + break + + # parse df cmd output info + disk_free = self._execute_shell(DISK_FREE_CMD) + disk_dict = {} + line_num = 0 + for line in disk_free.split('\n'): + line_num = line_num + 1 + if line_num == 1 or line == "": + continue + column_list = line.split() + disk_dict[column_list[0]] = column_list[5] + + # get partition which is readonly + for partition in partition_list: + if partition in disk_dict: + ret = self.check_readonly(partition, disk_dict[partition]) + if (ret != NOT_AVAILABLE): + ro_partition_list.append(ret) + + return ro_partition_list diff --git a/device/micas/x86_64-micas_m2-w6950-128oc-r0/pmon_daemon_control.json b/device/micas/x86_64-micas_m2-w6950-128oc-r0/pmon_daemon_control.json new file mode 100644 index 00000000000..6716a121a9b --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6950-128oc-r0/pmon_daemon_control.json @@ -0,0 +1,4 @@ +{ + "skip_ledd": true, + "include_sensormond": true +} diff --git a/device/micas/x86_64-micas_m2-w6950-128oc-r0/system_health_monitoring_config.json b/device/micas/x86_64-micas_m2-w6950-128oc-r0/system_health_monitoring_config.json new file mode 100644 index 00000000000..e69de29bb2d diff --git a/device/micas/x86_64-micas_m2-w6951-64hc-cp-r0/M2-W6951-64HC-CP/hwsku.json b/device/micas/x86_64-micas_m2-w6951-64hc-cp-r0/M2-W6951-64HC-CP/hwsku.json new file mode 100644 index 00000000000..c4428af8127 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6951-64hc-cp-r0/M2-W6951-64HC-CP/hwsku.json @@ -0,0 +1,333 @@ +{ + "interfaces": { + "Ethernet1": { + "default_brkout_mode": "1x1600G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet9": { + "default_brkout_mode": "1x1600G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet17": { + "default_brkout_mode": "1x1600G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet25": { + "default_brkout_mode": "1x1600G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet33": { + "default_brkout_mode": "1x1600G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet41": { + "default_brkout_mode": "1x1600G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet49": { + "default_brkout_mode": "1x1600G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet57": { + "default_brkout_mode": "1x1600G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet65": { + "default_brkout_mode": "1x1600G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet73": { + "default_brkout_mode": "1x1600G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet81": { + "default_brkout_mode": "1x1600G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet89": { + "default_brkout_mode": "1x1600G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet97": { + "default_brkout_mode": "1x1600G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet105": { + "default_brkout_mode": "1x1600G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet113": { + "default_brkout_mode": "1x1600G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet121": { + "default_brkout_mode": "1x1600G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet129": { + "default_brkout_mode": "1x1600G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet137": { + "default_brkout_mode": "1x1600G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet145": { + "default_brkout_mode": "1x1600G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet153": { + "default_brkout_mode": "1x1600G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet161": { + "default_brkout_mode": "1x1600G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet169": { + "default_brkout_mode": "1x1600G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet177": { + "default_brkout_mode": "1x1600G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet185": { + "default_brkout_mode": "1x1600G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet193": { + "default_brkout_mode": "1x1600G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet201": { + "default_brkout_mode": "1x1600G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet209": { + "default_brkout_mode": "1x1600G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet217": { + "default_brkout_mode": "1x1600G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet225": { + "default_brkout_mode": "1x1600G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet233": { + "default_brkout_mode": "1x1600G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet241": { + "default_brkout_mode": "1x1600G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet249": { + "default_brkout_mode": "1x1600G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet257": { + "default_brkout_mode": "1x1600G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet265": { + "default_brkout_mode": "1x1600G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet273": { + "default_brkout_mode": "1x1600G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet281": { + "default_brkout_mode": "1x1600G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet289": { + "default_brkout_mode": "1x1600G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet297": { + "default_brkout_mode": "1x1600G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet305": { + "default_brkout_mode": "1x1600G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet313": { + "default_brkout_mode": "1x1600G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet321": { + "default_brkout_mode": "1x1600G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet329": { + "default_brkout_mode": "1x1600G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet337": { + "default_brkout_mode": "1x1600G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet345": { + "default_brkout_mode": "1x1600G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet353": { + "default_brkout_mode": "1x1600G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet361": { + "default_brkout_mode": "1x1600G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet369": { + "default_brkout_mode": "1x1600G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet377": { + "default_brkout_mode": "1x1600G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet385": { + "default_brkout_mode": "1x1600G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet393": { + "default_brkout_mode": "1x1600G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet401": { + "default_brkout_mode": "1x1600G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet409": { + "default_brkout_mode": "1x1600G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet417": { + "default_brkout_mode": "1x1600G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet425": { + "default_brkout_mode": "1x1600G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet433": { + "default_brkout_mode": "1x1600G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet441": { + "default_brkout_mode": "1x1600G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet449": { + "default_brkout_mode": "1x1600G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet457": { + "default_brkout_mode": "1x1600G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet465": { + "default_brkout_mode": "1x1600G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet473": { + "default_brkout_mode": "1x1600G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet481": { + "default_brkout_mode": "1x1600G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet489": { + "default_brkout_mode": "1x1600G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet497": { + "default_brkout_mode": "1x1600G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet505": { + "default_brkout_mode": "1x1600G", + "autoneg": "off", + "fec": "rs" + }, + "Ethernet513": { + "default_brkout_mode": "1x25G", + "fec": "none" + }, + "Ethernet514": { + "default_brkout_mode": "1x25G", + "fec": "none" + } + } +} + diff --git a/device/micas/x86_64-micas_m2-w6951-64hc-cp-r0/M2-W6951-64HC-CP/port_config.ini b/device/micas/x86_64-micas_m2-w6951-64hc-cp-r0/M2-W6951-64HC-CP/port_config.ini new file mode 100644 index 00000000000..7b240d8e814 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6951-64hc-cp-r0/M2-W6951-64HC-CP/port_config.ini @@ -0,0 +1,67 @@ +# name lanes alias index speed +Ethernet1 121,122,123,124,125,126,127,128 sixteenhundredGigE0/1 0 1600000 +Ethernet9 65,66,67,68,69,70,71,72 sixteenhundredGigE0/2 1 1600000 +Ethernet17 129,130,131,132,133,134,135,136 sixteenhundredGigE0/3 2 1600000 +Ethernet25 137,138,139,140,141,142,143,144 sixteenhundredGigE0/4 3 1600000 +Ethernet33 113,114,115,116,117,118,119,120 sixteenhundredGigE0/5 4 1600000 +Ethernet41 73,74,75,76,77,78,79,80 sixteenhundredGigE0/6 5 1600000 +Ethernet49 145,146,147,148,149,150,151,152 sixteenhundredGigE0/7 6 1600000 +Ethernet57 153,154,155,156,157,158,159,160 sixteenhundredGigE0/8 7 1600000 +Ethernet65 105,106,107,108,109,110,111,112 sixteenhundredGigE0/9 8 1600000 +Ethernet73 81,82,83,84,85,86,87,88 sixteenhundredGigE0/10 9 1600000 +Ethernet81 185,186,187,188,189,190,191,192 sixteenhundredGigE0/11 10 1600000 +Ethernet89 177,178,179,180,181,182,183,184 sixteenhundredGigE0/12 11 1600000 +Ethernet97 97,98,99,100,101,102,103,104 sixteenhundredGigE0/13 12 1600000 +Ethernet105 89,90,91,92,93,94,95,96 sixteenhundredGigE0/14 13 1600000 +Ethernet113 169,170,171,172,173,174,175,176 sixteenhundredGigE0/15 14 1600000 +Ethernet121 161,162,163,164,165,166,167,168 sixteenhundredGigE0/16 15 1600000 +Ethernet129 25,26,27,28,29,30,31,32 sixteenhundredGigE0/17 16 1600000 +Ethernet137 33,34,35,36,37,38,39,40 sixteenhundredGigE0/18 17 1600000 +Ethernet145 193,194,195,196,197,198,199,200 sixteenhundredGigE0/19 18 1600000 +Ethernet153 201,202,203,204,205,206,207,208 sixteenhundredGigE0/20 19 1600000 +Ethernet161 17,18,19,20,21,22,23,24 sixteenhundredGigE0/21 20 1600000 +Ethernet169 41,42,43,44,45,46,47,48 sixteenhundredGigE0/22 21 1600000 +Ethernet177 209,210,211,212,213,214,215,216 sixteenhundredGigE0/23 22 1600000 +Ethernet185 217,218,219,220,221,222,223,224 sixteenhundredGigE0/24 23 1600000 +Ethernet193 9,10,11,12,13,14,15,16 sixteenhundredGigE0/25 24 1600000 +Ethernet201 49,50,51,52,53,54,55,56 sixteenhundredGigE0/26 25 1600000 +Ethernet209 249,250,251,252,253,254,255,256 sixteenhundredGigE0/27 26 1600000 +Ethernet217 241,242,243,244,245,246,247,248 sixteenhundredGigE0/28 27 1600000 +Ethernet225 1,2,3,4,5,6,7,8 sixteenhundredGigE0/29 28 1600000 +Ethernet233 57,58,59,60,61,62,63,64 sixteenhundredGigE0/30 29 1600000 +Ethernet241 233,234,235,236,237,238,239,240 sixteenhundredGigE0/31 30 1600000 +Ethernet249 225,226,227,228,229,230,231,232 sixteenhundredGigE0/32 31 1600000 +Ethernet257 481,482,483,484,485,486,487,488 sixteenhundredGigE0/33 32 1600000 +Ethernet265 473,474,475,476,477,478,479,480 sixteenhundredGigE0/34 33 1600000 +Ethernet273 257,258,259,260,261,262,263,264 sixteenhundredGigE0/35 34 1600000 +Ethernet281 265,266,267,268,269,270,271,272 sixteenhundredGigE0/36 35 1600000 +Ethernet289 489,490,491,492,493,494,495,496 sixteenhundredGigE0/37 36 1600000 +Ethernet297 465,466,467,468,469,470,471,472 sixteenhundredGigE0/38 37 1600000 +Ethernet305 273,274,275,276,277,278,279,280 sixteenhundredGigE0/39 38 1600000 +Ethernet313 281,282,283,284,285,286,287,288 sixteenhundredGigE0/40 39 1600000 +Ethernet321 497,498,499,500,501,502,503,504 sixteenhundredGigE0/41 40 1600000 +Ethernet329 457,458,459,460,461,462,463,464 sixteenhundredGigE0/42 41 1600000 +Ethernet337 313,314,315,316,317,318,319,320 sixteenhundredGigE0/43 42 1600000 +Ethernet345 305,306,307,308,309,310,311,312 sixteenhundredGigE0/44 43 1600000 +Ethernet353 505,506,507,508,509,510,511,512 sixteenhundredGigE0/45 44 1600000 +Ethernet361 449,450,451,452,453,454,455,456 sixteenhundredGigE0/46 45 1600000 +Ethernet369 297,298,299,300,301,302,303,304 sixteenhundredGigE0/47 46 1600000 +Ethernet377 289,290,291,292,293,294,295,296 sixteenhundredGigE0/48 47 1600000 +Ethernet385 385,386,387,388,389,390,391,392 sixteenhundredGigE0/49 48 1600000 +Ethernet393 441,442,443,444,445,446,447,448 sixteenhundredGigE0/50 49 1600000 +Ethernet401 321,322,323,324,325,326,327,328 sixteenhundredGigE0/51 50 1600000 +Ethernet409 329,330,331,332,333,334,335,336 sixteenhundredGigE0/52 51 1600000 +Ethernet417 393,394,395,396,397,398,399,400 sixteenhundredGigE0/53 52 1600000 +Ethernet425 433,434,435,436,437,438,439,440 sixteenhundredGigE0/54 53 1600000 +Ethernet433 337,338,339,340,341,342,343,344 sixteenhundredGigE0/55 54 1600000 +Ethernet441 345,346,347,348,349,350,351,352 sixteenhundredGigE0/56 55 1600000 +Ethernet449 401,402,403,404,405,406,407,408 sixteenhundredGigE0/57 56 1600000 +Ethernet457 425,426,427,428,429,430,431,432 sixteenhundredGigE0/58 57 1600000 +Ethernet465 377,378,379,380,381,382,383,384 sixteenhundredGigE0/59 58 1600000 +Ethernet473 369,370,371,372,373,374,375,376 sixteenhundredGigE0/60 59 1600000 +Ethernet481 409,410,411,412,413,414,415,416 sixteenhundredGigE0/61 60 1600000 +Ethernet489 417,418,419,420,421,422,423,424 sixteenhundredGigE0/62 61 1600000 +Ethernet497 361,362,363,364,365,366,367,368 sixteenhundredGigE0/63 62 1600000 +Ethernet505 353,354,355,356,357,358,359,360 sixteenhundredGigE0/64 63 1600000 +Ethernet513 514 twentyfiveGigE0/65 64 25000 +Ethernet514 517 twentyfiveGigE0/66 65 25000 diff --git a/device/micas/x86_64-micas_m2-w6951-64hc-cp-r0/M2-W6951-64HC-CP/sai.profile b/device/micas/x86_64-micas_m2-w6951-64hc-cp-r0/M2-W6951-64HC-CP/sai.profile new file mode 100644 index 00000000000..9bde461edca --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6951-64hc-cp-r0/M2-W6951-64HC-CP/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/th6-m2-w6951-64hc-cp-64x1600G.config.yml \ No newline at end of file diff --git a/device/micas/x86_64-micas_m2-w6951-64hc-cp-r0/M2-W6951-64HC-CP/th6-m2-w6951-64hc-cp-64x1600G.config.yml b/device/micas/x86_64-micas_m2-w6951-64hc-cp-r0/M2-W6951-64HC-CP/th6-m2-w6951-64hc-cp-64x1600G.config.yml new file mode 100644 index 00000000000..91a7752b0c2 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6951-64hc-cp-r0/M2-W6951-64HC-CP/th6-m2-w6951-64hc-cp-64x1600G.config.yml @@ -0,0 +1,1169 @@ +--- +device: + 0: + DEVICE_CONFIG: + AUTOLOAD_BOARD_SETTINGS: 0 +... + +--- +device: + 0: + PC_PM_CORE: + ? + PC_PM_ID: 1 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x46572031 + RX_LANE_MAP: 0x20317654 + TX_POLARITY_FLIP: 0x35 + RX_POLARITY_FLIP: 0xc7 + ? + PC_PM_ID: 2 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x64750213 + RX_LANE_MAP: 0x02136745 + TX_POLARITY_FLIP: 0x3a + RX_POLARITY_FLIP: 0xcb + ? + PC_PM_ID: 3 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x64750213 + RX_LANE_MAP: 0x02136745 + TX_POLARITY_FLIP: 0x3a + RX_POLARITY_FLIP: 0xcb + ? + PC_PM_ID: 4 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x64750213 + RX_LANE_MAP: 0x02136745 + TX_POLARITY_FLIP: 0x38 + RX_POLARITY_FLIP: 0xcb + ? + PC_PM_ID: 5 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x03125647 + RX_LANE_MAP: 0x74653021 + TX_POLARITY_FLIP: 0xcc + RX_POLARITY_FLIP: 0x2b + ? + PC_PM_ID: 6 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x23106574 + RX_LANE_MAP: 0x65741032 + TX_POLARITY_FLIP: 0xbc + RX_POLARITY_FLIP: 0x43 + ? + PC_PM_ID: 7 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x23106574 + RX_LANE_MAP: 0x65741032 + TX_POLARITY_FLIP: 0xbc + RX_POLARITY_FLIP: 0x43 + ? + PC_PM_ID: 8 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x32015647 + RX_LANE_MAP: 0x56470123 + TX_POLARITY_FLIP: 0x7c + RX_POLARITY_FLIP: 0x83 + ? + PC_PM_ID: 9 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x30216574 + RX_LANE_MAP: 0x47560312 + TX_POLARITY_FLIP: 0x33 + RX_POLARITY_FLIP: 0xac + ? + PC_PM_ID: 10 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x32106574 + RX_LANE_MAP: 0x75640213 + TX_POLARITY_FLIP: 0x53 + RX_POLARITY_FLIP: 0xb3 + ? + PC_PM_ID: 11 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x32106574 + RX_LANE_MAP: 0x75640213 + TX_POLARITY_FLIP: 0x53 + RX_POLARITY_FLIP: 0xb3 + ? + PC_PM_ID: 12 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x32106574 + RX_LANE_MAP: 0x75640213 + TX_POLARITY_FLIP: 0x53 + RX_POLARITY_FLIP: 0xb3 + ? + PC_PM_ID: 13 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x74651023 + RX_LANE_MAP: 0x32107465 + TX_POLARITY_FLIP: 0x36 + RX_POLARITY_FLIP: 0xc1 + ? + PC_PM_ID: 14 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x74651023 + RX_LANE_MAP: 0x32107465 + TX_POLARITY_FLIP: 0x36 + RX_POLARITY_FLIP: 0xc1 + ? + PC_PM_ID: 15 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x74651023 + RX_LANE_MAP: 0x32107465 + TX_POLARITY_FLIP: 0x36 + RX_POLARITY_FLIP: 0xc1 + ? + PC_PM_ID: 16 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x47560132 + RX_LANE_MAP: 0x23014756 + TX_POLARITY_FLIP: 0x39 + RX_POLARITY_FLIP: 0xc2 + ? + PC_PM_ID: 17 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x74651032 + RX_LANE_MAP: 0x25130476 + TX_POLARITY_FLIP: 0x3a + RX_POLARITY_FLIP: 0xc8 + ? + PC_PM_ID: 18 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x32106574 + RX_LANE_MAP: 0x70516243 + TX_POLARITY_FLIP: 0x53 + RX_POLARITY_FLIP: 0x9b + ? + PC_PM_ID: 19 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x74651032 + RX_LANE_MAP: 0x25130476 + TX_POLARITY_FLIP: 0x3a + RX_POLARITY_FLIP: 0xc8 + ? + PC_PM_ID: 20 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x32106574 + RX_LANE_MAP: 0x70516243 + TX_POLARITY_FLIP: 0x53 + RX_POLARITY_FLIP: 0x9b + ? + PC_PM_ID: 21 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x30216574 + RX_LANE_MAP: 0x40715362 + TX_POLARITY_FLIP: 0x33 + RX_POLARITY_FLIP: 0xe8 + ? + PC_PM_ID: 22 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x47560132 + RX_LANE_MAP: 0x16230754 + TX_POLARITY_FLIP: 0x39 + RX_POLARITY_FLIP: 0x32 + ? + PC_PM_ID: 23 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x32015647 + RX_LANE_MAP: 0x50624173 + TX_POLARITY_FLIP: 0x93 + RX_POLARITY_FLIP: 0x6e + ? + PC_PM_ID: 24 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x47560132 + RX_LANE_MAP: 0x16230754 + TX_POLARITY_FLIP: 0x39 + RX_POLARITY_FLIP: 0x32 + ? + PC_PM_ID: 25 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x47561203 + RX_LANE_MAP: 0x04213576 + TX_POLARITY_FLIP: 0x33 + RX_POLARITY_FLIP: 0x33 + ? + PC_PM_ID: 26 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x32106574 + RX_LANE_MAP: 0x70516243 + TX_POLARITY_FLIP: 0x73 + RX_POLARITY_FLIP: 0x9b + ? + PC_PM_ID: 27 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x74651032 + RX_LANE_MAP: 0x25130476 + TX_POLARITY_FLIP: 0x32 + RX_POLARITY_FLIP: 0xc8 + ? + PC_PM_ID: 28 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x32106574 + RX_LANE_MAP: 0x70516243 + TX_POLARITY_FLIP: 0x73 + RX_POLARITY_FLIP: 0x9b + ? + PC_PM_ID: 29 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x31205746 + RX_LANE_MAP: 0x53427160 + TX_POLARITY_FLIP: 0xa0 + RX_POLARITY_FLIP: 0x19 + ? + PC_PM_ID: 30 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x46572031 + RX_LANE_MAP: 0x14203657 + TX_POLARITY_FLIP: 0xf5 + RX_POLARITY_FLIP: 0xce + ? + PC_PM_ID: 31 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x31205746 + RX_LANE_MAP: 0x53427160 + TX_POLARITY_FLIP: 0xa0 + RX_POLARITY_FLIP: 0x19 + ? + PC_PM_ID: 32 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x46572031 + RX_LANE_MAP: 0x14203657 + TX_POLARITY_FLIP: 0xf4 + RX_POLARITY_FLIP: 0xce + ? + PC_PM_ID: 33 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x64750213 + RX_LANE_MAP: 0x35021746 + TX_POLARITY_FLIP: 0x05 + RX_POLARITY_FLIP: 0x34 + ? + PC_PM_ID: 34 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x13027564 + RX_LANE_MAP: 0x41506372 + TX_POLARITY_FLIP: 0xaf + RX_POLARITY_FLIP: 0xec + ? + PC_PM_ID: 35 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x64750213 + RX_LANE_MAP: 0x35021746 + TX_POLARITY_FLIP: 0x05 + RX_POLARITY_FLIP: 0x34 + ? + PC_PM_ID: 36 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x13027564 + RX_LANE_MAP: 0x41506372 + TX_POLARITY_FLIP: 0x2f + RX_POLARITY_FLIP: 0xec + ? + PC_PM_ID: 37 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x30216574 + RX_LANE_MAP: 0x40715362 + TX_POLARITY_FLIP: 0xcc + RX_POLARITY_FLIP: 0x33 + ? + PC_PM_ID: 38 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x47560123 + RX_LANE_MAP: 0x07312654 + TX_POLARITY_FLIP: 0xce + RX_POLARITY_FLIP: 0x75 + ? + PC_PM_ID: 39 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x23015647 + RX_LANE_MAP: 0x52734061 + TX_POLARITY_FLIP: 0x4c + RX_POLARITY_FLIP: 0xc4 + ? + PC_PM_ID: 40 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x47560123 + RX_LANE_MAP: 0x07312654 + TX_POLARITY_FLIP: 0xce + RX_POLARITY_FLIP: 0x75 + ? + PC_PM_ID: 41 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x47561203 + RX_LANE_MAP: 0x04213576 + TX_POLARITY_FLIP: 0xcc + RX_POLARITY_FLIP: 0xc6 + ? + PC_PM_ID: 42 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x23106574 + RX_LANE_MAP: 0x61537042 + TX_POLARITY_FLIP: 0x9c + RX_POLARITY_FLIP: 0x31 + ? + PC_PM_ID: 43 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x74651023 + RX_LANE_MAP: 0x05321467 + TX_POLARITY_FLIP: 0xc9 + RX_POLARITY_FLIP: 0x8f + ? + PC_PM_ID: 44 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x23106574 + RX_LANE_MAP: 0x61537042 + TX_POLARITY_FLIP: 0x9c + RX_POLARITY_FLIP: 0x31 + ? + PC_PM_ID: 45 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x23015647 + RX_LANE_MAP: 0x52734061 + TX_POLARITY_FLIP: 0x5c + RX_POLARITY_FLIP: 0xc4 + ? + PC_PM_ID: 46 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x47560123 + RX_LANE_MAP: 0x07312654 + TX_POLARITY_FLIP: 0xca + RX_POLARITY_FLIP: 0x75 + ? + PC_PM_ID: 47 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x23015647 + RX_LANE_MAP: 0x52734061 + TX_POLARITY_FLIP: 0x5c + RX_POLARITY_FLIP: 0xc4 + ? + PC_PM_ID: 48 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x47560123 + RX_LANE_MAP: 0x07312654 + TX_POLARITY_FLIP: 0xca + RX_POLARITY_FLIP: 0x75 + ? + PC_PM_ID: 49 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x74651023 + RX_LANE_MAP: 0x32107465 + TX_POLARITY_FLIP: 0xc9 + RX_POLARITY_FLIP: 0x3e + ? + PC_PM_ID: 50 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x47560132 + RX_LANE_MAP: 0x23014756 + TX_POLARITY_FLIP: 0xc6 + RX_POLARITY_FLIP: 0x3d + ? + PC_PM_ID: 51 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x47560132 + RX_LANE_MAP: 0x23014756 + TX_POLARITY_FLIP: 0xc6 + RX_POLARITY_FLIP: 0x3d + ? + PC_PM_ID: 52 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x47560132 + RX_LANE_MAP: 0x23014756 + TX_POLARITY_FLIP: 0xc6 + RX_POLARITY_FLIP: 0x3d + ? + PC_PM_ID: 53 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x30216574 + RX_LANE_MAP: 0x47560312 + TX_POLARITY_FLIP: 0xcc + RX_POLARITY_FLIP: 0x53 + ? + PC_PM_ID: 54 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x23015647 + RX_LANE_MAP: 0x57462031 + TX_POLARITY_FLIP: 0x5c + RX_POLARITY_FLIP: 0x8c + ? + PC_PM_ID: 55 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x23015647 + RX_LANE_MAP: 0x57462031 + TX_POLARITY_FLIP: 0x5c + RX_POLARITY_FLIP: 0x8c + ? + PC_PM_ID: 56 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x32106574 + RX_LANE_MAP: 0x75640213 + TX_POLARITY_FLIP: 0xac + RX_POLARITY_FLIP: 0x4c + ? + PC_PM_ID: 57 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x03125647 + RX_LANE_MAP: 0x74653021 + TX_POLARITY_FLIP: 0x33 + RX_POLARITY_FLIP: 0xd4 + ? + PC_PM_ID: 58 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x32015647 + RX_LANE_MAP: 0x56470123 + TX_POLARITY_FLIP: 0x83 + RX_POLARITY_FLIP: 0x7c + ? + PC_PM_ID: 59 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x32015647 + RX_LANE_MAP: 0x56470123 + TX_POLARITY_FLIP: 0x83 + RX_POLARITY_FLIP: 0x7c + ? + PC_PM_ID: 60 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x32015647 + RX_LANE_MAP: 0x56470123 + TX_POLARITY_FLIP: 0x83 + RX_POLARITY_FLIP: 0x7c + ? + PC_PM_ID: 61 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x46572031 + RX_LANE_MAP: 0x20317654 + TX_POLARITY_FLIP: 0xca + RX_POLARITY_FLIP: 0x38 + ? + PC_PM_ID: 62 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x46572031 + RX_LANE_MAP: 0x20317654 + TX_POLARITY_FLIP: 0xca + RX_POLARITY_FLIP: 0x38 + ? + PC_PM_ID: 63 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x46572031 + RX_LANE_MAP: 0x20317654 + TX_POLARITY_FLIP: 0xca + RX_POLARITY_FLIP: 0x38 + ? + PC_PM_ID: 64 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x64750213 + RX_LANE_MAP: 0x02136745 + TX_POLARITY_FLIP: 0xc7 + RX_POLARITY_FLIP: 0x34 + ? + PC_PM_ID: 65 + CORE_INDEX: 0 + : + TX_LANE_MAP_AUTO: 0 + RX_LANE_MAP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_LANE_MAP: 0x3012 + RX_LANE_MAP: 0x2103 + TX_POLARITY_FLIP: 0x00 + RX_POLARITY_FLIP: 0x01 +... + + +--- +device: + 0: + PC_PORT_PHYS_MAP: + ? + # CPU port + PORT_ID: 0 + : + PC_PHYS_PORT_ID: 0 + ? + PORT_ID: 15 + : + PC_PHYS_PORT_ID: 1 + ? + PORT_ID: 16 + : + PC_PHYS_PORT_ID: 9 + ? + PORT_ID: 32 + : + PC_PHYS_PORT_ID: 17 + ? + PORT_ID: 33 + : + PC_PHYS_PORT_ID: 25 + ? + PORT_ID: 50 + : + PC_PHYS_PORT_ID: 33 + ? + PORT_ID: 51 + : + PC_PHYS_PORT_ID: 41 + ? + PORT_ID: 68 + : + PC_PHYS_PORT_ID: 49 + ? + PORT_ID: 69 + : + PC_PHYS_PORT_ID: 57 + ? + PORT_ID: 86 + : + PC_PHYS_PORT_ID: 65 + ? + PORT_ID: 87 + : + PC_PHYS_PORT_ID: 73 + ? + PORT_ID: 104 + : + PC_PHYS_PORT_ID: 81 + ? + PORT_ID: 105 + : + PC_PHYS_PORT_ID: 89 + ? + PORT_ID: 122 + : + PC_PHYS_PORT_ID: 97 + ? + PORT_ID: 123 + : + PC_PHYS_PORT_ID: 105 + ? + PORT_ID: 140 + : + PC_PHYS_PORT_ID: 113 + ? + PORT_ID: 141 + : + PC_PHYS_PORT_ID: 121 + ? + PORT_ID: 158 + : + PC_PHYS_PORT_ID: 129 + ? + PORT_ID: 159 + : + PC_PHYS_PORT_ID: 137 + ? + PORT_ID: 176 + : + PC_PHYS_PORT_ID: 145 + ? + PORT_ID: 177 + : + PC_PHYS_PORT_ID: 153 + ? + PORT_ID: 194 + : + PC_PHYS_PORT_ID: 161 + ? + PORT_ID: 195 + : + PC_PHYS_PORT_ID: 169 + ? + PORT_ID: 212 + : + PC_PHYS_PORT_ID: 177 + ? + PORT_ID: 213 + : + PC_PHYS_PORT_ID: 185 + ? + PORT_ID: 230 + : + PC_PHYS_PORT_ID: 193 + ? + PORT_ID: 231 + : + PC_PHYS_PORT_ID: 201 + ? + PORT_ID: 248 + : + PC_PHYS_PORT_ID: 209 + ? + PORT_ID: 249 + : + PC_PHYS_PORT_ID: 217 + ? + PORT_ID: 266 + : + PC_PHYS_PORT_ID: 225 + ? + PORT_ID: 267 + : + PC_PHYS_PORT_ID: 233 + ? + PORT_ID: 284 + : + PC_PHYS_PORT_ID: 241 + ? + PORT_ID: 285 + : + PC_PHYS_PORT_ID: 249 + ? + PORT_ID: 302 + : + PC_PHYS_PORT_ID: 257 + ? + PORT_ID: 303 + : + PC_PHYS_PORT_ID: 265 + ? + PORT_ID: 320 + : + PC_PHYS_PORT_ID: 273 + ? + PORT_ID: 321 + : + PC_PHYS_PORT_ID: 281 + ? + PORT_ID: 338 + : + PC_PHYS_PORT_ID: 289 + ? + PORT_ID: 339 + : + PC_PHYS_PORT_ID: 297 + ? + PORT_ID: 356 + : + PC_PHYS_PORT_ID: 305 + ? + PORT_ID: 357 + : + PC_PHYS_PORT_ID: 313 + ? + PORT_ID: 374 + : + PC_PHYS_PORT_ID: 321 + ? + PORT_ID: 375 + : + PC_PHYS_PORT_ID: 329 + ? + PORT_ID: 392 + : + PC_PHYS_PORT_ID: 337 + ? + PORT_ID: 393 + : + PC_PHYS_PORT_ID: 345 + ? + PORT_ID: 410 + : + PC_PHYS_PORT_ID: 353 + ? + PORT_ID: 411 + : + PC_PHYS_PORT_ID: 361 + ? + PORT_ID: 428 + : + PC_PHYS_PORT_ID: 369 + ? + PORT_ID: 429 + : + PC_PHYS_PORT_ID: 377 + ? + PORT_ID: 446 + : + PC_PHYS_PORT_ID: 385 + ? + PORT_ID: 447 + : + PC_PHYS_PORT_ID: 393 + ? + PORT_ID: 464 + : + PC_PHYS_PORT_ID: 401 + ? + PORT_ID: 465 + : + PC_PHYS_PORT_ID: 409 + ? + PORT_ID: 482 + : + PC_PHYS_PORT_ID: 417 + ? + PORT_ID: 483 + : + PC_PHYS_PORT_ID: 425 + ? + PORT_ID: 500 + : + PC_PHYS_PORT_ID: 433 + ? + PORT_ID: 501 + : + PC_PHYS_PORT_ID: 441 + ? + PORT_ID: 518 + : + PC_PHYS_PORT_ID: 449 + ? + PORT_ID: 519 + : + PC_PHYS_PORT_ID: 457 + ? + PORT_ID: 536 + : + PC_PHYS_PORT_ID: 465 + ? + PORT_ID: 537 + : + PC_PHYS_PORT_ID: 473 + ? + PORT_ID: 554 + : + PC_PHYS_PORT_ID: 481 + ? + PORT_ID: 555 + : + PC_PHYS_PORT_ID: 489 + ? + PORT_ID: 572 + : + PC_PHYS_PORT_ID: 497 + ? + PORT_ID: 573 + : + PC_PHYS_PORT_ID: 505 + ? + #mgmt ports + PORT_ID: 268 + : + PC_PHYS_PORT_ID: 514 + ? + PORT_ID: 556 + : + PC_PHYS_PORT_ID: 517 +... + +--- +device: + 0: + PC_PORT: + ? + PORT_ID: 0 + : + ENABLE: 1 + SPEED: 10000 + NUM_LANES: 1 + ? + PORT_ID: [15, 16, 32, 33, 50, 51, 68, 69, 86, 87, 104, 105, 122, 123, 140, 141, 158, 159, 176, 177, 194, 195, 212, 213, 230, 231, 248, 249, 266, 267, 284, 285, 302, 303, 320, 321, 338, 339, 356, 357, 374, 375, 392, 393, 410, 411, 428, 429, 446, 447, 464, 465, 482, 483, 500, 501, 518, 519, 536, 537, 554, 555, 572, 573] + : + ENABLE: 1 + SPEED: 1600000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_IEEE + LINK_TRAINING: 0 + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: [268, 556] + : + ENABLE: 1 + SPEED: 25000 + NUM_LANES: 1 + FEC_MODE: PC_FEC_RS528 + MAX_FRAME_SIZE: 9416 +... + +--- +device: + 0: + PC_PMD_FIRMWARE: + ? + PORT_ID: [15, 16, 32, 33, 50, 51, 68, 69, 86, 87, 104, 105, 122, 123, 140, 141, 158, 159, 176, 177, 194, 195, 212, 213, 230, 231, 248, 249, 266, 267, 284, 285, 302, 303, 320, 321, 338, 339, 356, 357, 374, 375, 392, 393, 410, 411, 428, 429, 446, 447, 464, 465, 482, 483, 500, 501, 518, 519, 536, 537, 554, 555, 572, 573] + : + MEDIUM_TYPE_AUTO: 0 + MEDIUM_TYPE: PC_PHY_MEDIUM_BACKPLANE + ? + PORT_ID: [268, 556] + : + MEDIUM_TYPE_AUTO: 0 + MEDIUM_TYPE: PC_PHY_MEDIUM_BACKPLANE +... + +--- +device: + 0: + TM_SCHEDULER_CONFIG: + NUM_MC_Q: NUM_MC_Q_4 +... + +--- +device: + 0: + # Per pipe flex counter configuration + CTR_EFLEX_CONFIG: + CTR_ING_EFLEX_OPERMODE_PIPEUNIQUE: 1 + CTR_ING_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1 + CTR_EGR_EFLEX_OPERMODE_PIPEUNIQUE: 1 + CTR_EGR_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1 + FP_CONFIG: + FP_ING_OPERMODE: GLOBAL_PIPE_AWARE + #CTR COS_ENABLE + CTR_ING_COS_Q_CONFIG: + COS_ENABLE: 0 +... + +--- +bcm_device: + 0: + global: + sai_port_phy_time_sync_en: 1 + skip_protocol_default_entries: 1 + sai_field_group_auto_prioritize: 1 + sai_trap_group_ver: 1 + bcm_tunnel_term_compatible_mode: 1 + vlan_flooding_l2mc_num_reserved: 2048 + l3_alpm_template: 2 + l3_alpm2_bnk_threshold: 100 + uft_mode: 1 + l3_enable: 1 + l2_hitbit_enable: 0 + pktio_mode: 1 + stat_custom_receive0_management_mode: 1 + global_flexctr_ing_action_num_reserved: 20 + global_flexctr_ing_pool_num_reserved: 8 + global_flexctr_ing_op_profile_num_reserved: 20 + global_flexctr_ing_group_num_reserved: 2 + global_flexctr_egr_action_num_reserved: 8 + global_flexctr_egr_pool_num_reserved: 5 + global_flexctr_egr_op_profile_num_reserved: 10 + global_flexctr_egr_group_num_reserved: 1 + flowtracker_flexctr_alloc_enable: 1 + sai_pfc_dlr_init_capability: 2 + sai_stats_support_mask: 0x804 + sai_postinit_cmd_file: /usr/share/sonic/platform/postinit_cmd_file.soc + +... diff --git a/device/micas/x86_64-micas_m2-w6951-64hc-cp-r0/custom_led.bin b/device/micas/x86_64-micas_m2-w6951-64hc-cp-r0/custom_led.bin new file mode 100644 index 00000000000..5b14a1385f9 Binary files /dev/null and b/device/micas/x86_64-micas_m2-w6951-64hc-cp-r0/custom_led.bin differ diff --git a/device/micas/x86_64-micas_m2-w6951-64hc-cp-r0/default_sku b/device/micas/x86_64-micas_m2-w6951-64hc-cp-r0/default_sku new file mode 100644 index 00000000000..aa3375f6a78 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6951-64hc-cp-r0/default_sku @@ -0,0 +1 @@ +M2-W6951-64HC-CP l2 diff --git a/device/micas/x86_64-micas_m2-w6951-64hc-cp-r0/dev.xml b/device/micas/x86_64-micas_m2-w6951-64hc-cp-r0/dev.xml new file mode 100644 index 00000000000..99d4cec634e --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6951-64hc-cp-r0/dev.xml @@ -0,0 +1,1153 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/device/micas/x86_64-micas_m2-w6951-64hc-cp-r0/fru.py b/device/micas/x86_64-micas_m2-w6951-64hc-cp-r0/fru.py new file mode 100644 index 00000000000..f95164e0360 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6951-64hc-cp-r0/fru.py @@ -0,0 +1,961 @@ +#!/usr/bin/python3 +import collections +from datetime import datetime, timedelta +from bitarray import bitarray + + +__DEBUG__ = "N" + + +class FruException(Exception): + def __init__(self, message='fruerror', code=-100): + err = 'errcode: {0} message:{1}'.format(code, message) + Exception.__init__(self, err) + self.code = code + self.message = message + + +def e_print(err): + print("ERROR: " + err) + + +def d_print(debug_info): + if __DEBUG__ == "Y": + print(debug_info) + + +class FruUtil(): + @staticmethod + def decodeLength(value): + a = bitarray(8) + a.setall(True) + a[0:1] = 0 + a[1:2] = 0 + x = ord(a.tobytes()) + return x & ord(value) + + @staticmethod + def minToData(): + starttime = datetime(1996, 1, 1, 0, 0, 0) + endtime = datetime.now() + seconds = (endtime - starttime).total_seconds() + mins = seconds // 60 + m = int(round(mins)) + return m + + @staticmethod + def getTimeFormat(): + return datetime.now().strftime('%Y-%m-%d') + + @staticmethod + def getTypeLength(value): + if value is None or len(value) == 0: + return 0 + a = bitarray(8) + a.setall(False) + a[0:1] = 1 + a[1:2] = 1 + x = ord(a.tobytes()) + return x | len(value) + + @staticmethod + def checksum(b): + result = 0 + for item in b: + result += ord(item) + return (0x100 - (result & 0xff)) & 0xff + + +class BaseArea(object): + SUGGESTED_SIZE_COMMON_HEADER = 8 + SUGGESTED_SIZE_INTERNAL_USE_AREA = 72 + SUGGESTED_SIZE_CHASSIS_INFO_AREA = 32 + SUGGESTED_SIZE_BOARD_INFO_AREA = 80 + SUGGESTED_SIZE_PRODUCT_INFO_AREA = 80 + + INITVALUE = b'\x00' + resultvalue = INITVALUE * 256 + COMMON_HEAD_VERSION = b'\x01' + __childList = None + + def __init__(self, name="", size=0, offset=0): + self.__childList = [] + self._offset = offset + self.name = name + self._size = size + self._isPresent = False + self._data = b'\x00' * size + + @property + def childList(self): + return self.__childList + + @childList.setter + def childList(self, value): + self.__childList = value + + @property + def offset(self): + return self._offset + + @offset.setter + def offset(self, value): + self._offset = value + + @property + def size(self): + return self._size + + @size.setter + def size(self, value): + self._size = value + + @property + def data(self): + return self._data + + @data.setter + def data(self, value): + self._data = value + + @property + def isPresent(self): + return self._isPresent + + @isPresent.setter + def isPresent(self, value): + self._isPresent = value + + +class InternalUseArea(BaseArea): + pass + + +class ChassisInfoArea(BaseArea): + pass + + +class BoardInfoArea(BaseArea): + _boardTime = None + _fields = None + _mfg_date = None + areaversion = None + _boardversion = None + _language = None + + def __str__(self): + formatstr = "version : %x\n" \ + "length : %d \n" \ + "language : %x \n" \ + "mfg_date : %s \n" \ + "boardManufacturer : %s \n" \ + "boardProductName : %s \n" \ + "boardSerialNumber : %s \n" \ + "boardPartNumber : %s \n" \ + "fruFileId : %s \n" + + tmpstr = formatstr % (ord(self.boardversion), self.size, + self.language, self.getMfgRealData(), + self.boardManufacturer, self.boardProductName, + self.boardSerialNumber, self.boardPartNumber, + self.fruFileId) + for i in range(1, 11): + valtmp = "boardextra%d" % i + if hasattr(self, valtmp): + valtmpval = getattr(self, valtmp) + tmpstr += "boardextra%d : %s \n" % (i, valtmpval) + else: + break + + return tmpstr + + def todict(self): + dic = collections.OrderedDict() + dic["boardversion"] = ord(self.boardversion) + dic["boardlength"] = self.size + dic["boardlanguage"] = self.language + dic["boardmfg_date"] = self.getMfgRealData() + dic["boardManufacturer"] = self.boardManufacturer + dic["boardProductName"] = self.boardProductName + dic["boardSerialNumber"] = self.boardSerialNumber + dic["boardPartNumber"] = self.boardPartNumber + dic["boardfruFileId"] = self.fruFileId + for i in range(1, 11): + valtmp = "boardextra%d" % i + if hasattr(self, valtmp): + valtmpval = getattr(self, valtmp) + dic[valtmp] = valtmpval + else: + break + return dic + + def decodedata(self): + index = 0 + self.areaversion = self.data[index] + index += 1 + d_print("decode length :%d class size:%d" % + ((ord(self.data[index]) * 8), self.size)) + index += 2 + + timetmp = self.data[index: index + 3] + self.mfg_date = ord(timetmp[0]) | ( + ord(timetmp[1]) << 8) | (ord(timetmp[2]) << 16) + d_print("decode getMfgRealData :%s" % self.getMfgRealData()) + index += 3 + + templen = FruUtil.decodeLength(self.data[index]) + self.boardManufacturer = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode boardManufacturer:%s" % self.boardManufacturer) + + templen = FruUtil.decodeLength(self.data[index]) + self.boardProductName = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode boardProductName:%s" % self.boardProductName) + + templen = FruUtil.decodeLength(self.data[index]) + self.boardSerialNumber = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode boardSerialNumber:%s" % self.boardSerialNumber) + + templen = FruUtil.decodeLength(self.data[index]) + self.boardPartNumber = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode boardPartNumber:%s" % self.boardPartNumber) + + templen = FruUtil.decodeLength(self.data[index]) + self.fruFileId = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode fruFileId:%s" % self.fruFileId) + + for i in range(1, 11): + valtmp = "boardextra%d" % i + if self.data[index] != chr(0xc1): + templen = FruUtil.decodeLength(self.data[index]) + tmpval = self.data[index + 1: index + templen + 1] + setattr(self, valtmp, tmpval) + index += templen + 1 + d_print("decode boardextra%d:%s" % (i, tmpval)) + else: + break + + def fruSetValue(self, field, value): + tmp_field = getattr(self, field, None) + if tmp_field is not None: + setattr(self, field, value) + + def recalcute(self): + d_print("boardInfoArea version:%x" % ord(self.boardversion)) + d_print("boardInfoArea length:%d" % self.size) + d_print("boardInfoArea language:%x" % self.language) + self.mfg_date = FruUtil.minToData() + d_print("boardInfoArea mfg_date:%x" % self.mfg_date) + + self.data = chr(ord(self.boardversion)) + \ + chr(self.size // 8) + chr(self.language) + + self.data += chr(self.mfg_date & 0xFF) + self.data += chr((self.mfg_date >> 8) & 0xFF) + self.data += chr((self.mfg_date >> 16) & 0xFF) + + d_print("boardInfoArea boardManufacturer:%s" % self.boardManufacturer) + typelength = FruUtil.getTypeLength(self.boardManufacturer) + self.data += chr(typelength) + self.data += self.boardManufacturer + + d_print("boardInfoArea boardProductName:%s" % self.boardProductName) + self.data += chr(FruUtil.getTypeLength(self.boardProductName)) + self.data += self.boardProductName + + d_print("boardInfoArea boardSerialNumber:%s" % self.boardSerialNumber) + self.data += chr(FruUtil.getTypeLength(self.boardSerialNumber)) + self.data += self.boardSerialNumber + + d_print("boardInfoArea boardPartNumber:%s" % self.boardPartNumber) + self.data += chr(FruUtil.getTypeLength(self.boardPartNumber)) + self.data += self.boardPartNumber + + d_print("boardInfoArea fruFileId:%s" % self.fruFileId) + self.data += chr(FruUtil.getTypeLength(self.fruFileId)) + self.data += self.fruFileId + + for i in range(1, 11): + valtmp = "boardextra%d" % i + if hasattr(self, valtmp): + valtmpval = getattr(self, valtmp) + d_print("boardInfoArea boardextra%d:%s" % (i, valtmpval)) + self.data += chr(FruUtil.getTypeLength(valtmpval)) + if valtmpval is not None: + self.data += valtmpval + else: + break + + self.data += chr(0xc1) + + if len(self.data) > (self.size - 1): + incr = (len(self.data) - self.size) // 8 + 1 + self.size += incr * 8 + + self.data = self.data[0:1] + chr(self.size // 8) + self.data[2:] + d_print("self data:%d" % len(self.data)) + d_print("self size:%d" % self.size) + d_print("adjust size:%d" % (self.size - len(self.data) - 1)) + self.data = self.data.ljust((self.size - 1), chr(self.INITVALUE[0])) + + # checksum + checksum = FruUtil.checksum(self.data) + d_print("board info checksum:%x" % checksum) + self.data += chr(checksum) + + def getMfgRealData(self): + starttime = datetime(1996, 1, 1, 0, 0, 0) + mactime = starttime + timedelta(minutes=self.mfg_date) + return mactime + + @property + def language(self): + self._language = 25 + return self._language + + @property + def mfg_date(self): + return self._mfg_date + + @mfg_date.setter + def mfg_date(self, val): + self._mfg_date = val + + @property + def boardversion(self): + self._boardversion = self.COMMON_HEAD_VERSION + return self._boardversion + + @property + def fruFileId(self): + return self._FRUFileID + + @fruFileId.setter + def fruFileId(self, val): + self._FRUFileID = val + + @property + def boardPartNumber(self): + return self._boardPartNumber + + @boardPartNumber.setter + def boardPartNumber(self, val): + self._boardPartNumber = val + + @property + def boardSerialNumber(self): + return self._boardSerialNumber + + @boardSerialNumber.setter + def boardSerialNumber(self, val): + self._boardSerialNumber = val + + @property + def boardProductName(self): + return self._boradProductName + + @boardProductName.setter + def boardProductName(self, val): + self._boradProductName = val + + @property + def boardManufacturer(self): + return self._boardManufacturer + + @boardManufacturer.setter + def boardManufacturer(self, val): + self._boardManufacturer = val + + @property + def boardTime(self): + return self._boardTime + + @boardTime.setter + def boardTime(self, val): + self._boardTime = val + + @property + def fields(self): + return self._fields + + @fields.setter + def fields(self, val): + self._fields = val + + +class ProductInfoArea(BaseArea): + _productManufacturer = None + _productAssetTag = None + _FRUFileID = None + _language = None + + def __str__(self): + formatstr = "version : %x\n" \ + "length : %d \n" \ + "language : %x \n" \ + "productManufacturer : %s \n" \ + "productName : %s \n" \ + "productPartModelName: %s \n" \ + "productVersion : %s \n" \ + "productSerialNumber : %s \n" \ + "productAssetTag : %s \n" \ + "fruFileId : %s \n" + + tmpstr = formatstr % (ord(self.areaversion), self.size, + self.language, self.productManufacturer, + self.productName, self.productPartModelName, + self.productVersion, self.productSerialNumber, + self.productAssetTag, self.fruFileId) + + for i in range(1, 11): + valtmp = "productextra%d" % i + if hasattr(self, valtmp): + valtmpval = getattr(self, valtmp) + tmpstr += "productextra%d : %s \n" % (i, valtmpval) + else: + break + + return tmpstr + + def todict(self): + dic = collections.OrderedDict() + dic["productversion"] = ord(self.areaversion) + dic["productlength"] = self.size + dic["productlanguage"] = self.language + dic["productManufacturer"] = self.productManufacturer + dic["productName"] = self.productName + dic["productPartModelName"] = self.productPartModelName + dic["productVersion"] = int(self.productVersion, 16) + dic["productSerialNumber"] = self.productSerialNumber + dic["productAssetTag"] = self.productAssetTag + dic["productfruFileId"] = self.fruFileId + for i in range(1, 11): + valtmp = "productextra%d" % i + if hasattr(self, valtmp): + valtmpval = getattr(self, valtmp) + dic[valtmp] = valtmpval + else: + break + return dic + + def decodedata(self): + index = 0 + self.areaversion = self.data[index] # 0 + index += 1 + d_print("decode length %d" % (ord(self.data[index]) * 8)) + d_print("class size %d" % self.size) + index += 2 + + templen = FruUtil.decodeLength(self.data[index]) + self.productManufacturer = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode productManufacturer:%s" % self.productManufacturer) + + templen = FruUtil.decodeLength(self.data[index]) + self.productName = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode productName:%s" % self.productName) + + templen = FruUtil.decodeLength(self.data[index]) + self.productPartModelName = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode productPartModelName:%s" % self.productPartModelName) + + templen = FruUtil.decodeLength(self.data[index]) + self.productVersion = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode productVersion:%s" % self.productVersion) + + templen = FruUtil.decodeLength(self.data[index]) + self.productSerialNumber = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode productSerialNumber:%s" % self.productSerialNumber) + + templen = FruUtil.decodeLength(self.data[index]) + self.productAssetTag = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode productAssetTag:%s" % self.productAssetTag) + + templen = FruUtil.decodeLength(self.data[index]) + self.fruFileId = self.data[index + 1: index + templen + 1] + index += templen + 1 + d_print("decode fruFileId:%s" % self.fruFileId) + + for i in range(1, 11): + valtmp = "productextra%d" % i + if self.data[index] != chr(0xc1) and index < self.size - 1: + templen = FruUtil.decodeLength(self.data[index]) + if templen == 0: + break + tmpval = self.data[index + 1: index + templen + 1] + d_print("decode boardextra%d:%s" % (i, tmpval)) + setattr(self, valtmp, tmpval) + index += templen + 1 + else: + break + + @property + def productVersion(self): + return self._productVersion + + @productVersion.setter + def productVersion(self, name): + self._productVersion = name + + @property + def areaversion(self): + self._areaversion = self.COMMON_HEAD_VERSION + return self._areaversion + + @areaversion.setter + def areaversion(self, name): + self._areaversion = name + + @property + def language(self): + self._language = 25 + return self._language + + @property + def productManufacturer(self): + return self._productManufacturer + + @productManufacturer.setter + def productManufacturer(self, name): + self._productManufacturer = name + + @property + def productName(self): + return self._productName + + @productName.setter + def productName(self, name): + self._productName = name + + @property + def productPartModelName(self): + return self._productPartModelName + + @productPartModelName.setter + def productPartModelName(self, name): + self._productPartModelName = name + + @property + def productSerialNumber(self): + return self._productSerialNumber + + @productSerialNumber.setter + def productSerialNumber(self, name): + self._productSerialNumber = name + + @property + def productAssetTag(self): + return self._productAssetTag + + @productAssetTag.setter + def productAssetTag(self, name): + self._productAssetTag = name + + @property + def fruFileId(self): + return self._FRUFileID + + @fruFileId.setter + def fruFileId(self, name): + self._FRUFileID = name + + def fruSetValue(self, field, value): + tmp_field = getattr(self, field, None) + if tmp_field is not None: + setattr(self, field, value) + + def recalcute(self): + d_print("product version:%x" % ord(self.areaversion)) + d_print("product length:%d" % self.size) + d_print("product language:%x" % self.language) + self.data = chr(ord(self.areaversion)) + \ + chr(self.size // 8) + chr(self.language) + + typelength = FruUtil.getTypeLength(self.productManufacturer) + self.data += chr(typelength) + self.data += self.productManufacturer + + self.data += chr(FruUtil.getTypeLength(self.productName)) + self.data += self.productName + + self.data += chr(FruUtil.getTypeLength(self.productPartModelName)) + self.data += self.productPartModelName + + self.data += chr(FruUtil.getTypeLength(self.productVersion)) + self.data += self.productVersion + + self.data += chr(FruUtil.getTypeLength(self.productSerialNumber)) + self.data += self.productSerialNumber + + self.data += chr(FruUtil.getTypeLength(self.productAssetTag)) + if self.productAssetTag is not None: + self.data += self.productAssetTag + + self.data += chr(FruUtil.getTypeLength(self.fruFileId)) + self.data += self.fruFileId + + for i in range(1, 11): + valtmp = "productextra%d" % i + if hasattr(self, valtmp): + valtmpval = getattr(self, valtmp) + d_print("boardInfoArea productextra%d:%s" % (i, valtmpval)) + self.data += chr(FruUtil.getTypeLength(valtmpval)) + if valtmpval is not None: + self.data += valtmpval + else: + break + + self.data += chr(0xc1) + if len(self.data) > (self.size - 1): + incr = (len(self.data) - self.size) // 8 + 1 + self.size += incr * 8 + d_print("self.data:%d" % len(self.data)) + d_print("self.size:%d" % self.size) + + self.data = self.data[0:1] + chr(self.size // 8) + self.data[2:] + self.data = self.data.ljust((self.size - 1), chr(self.INITVALUE[0])) + checksum = FruUtil.checksum(self.data) + d_print("board info checksum:%x" % checksum) + self.data += chr(checksum) + + +class MultiRecordArea(BaseArea): + pass + + +class Field(object): + + def __init__(self, fieldType="ASCII", fieldData=""): + self.fieldData = fieldData + self.fieldType = fieldType + + @property + def fieldType(self): + return self.fieldType + + @property + def fieldData(self): + return self.fieldData + + +class ipmifru(BaseArea): + _BoardInfoArea = None + _ProductInfoArea = None + _InternalUseArea = None + _ChassisInfoArea = None + _multiRecordArea = None + _productinfoAreaOffset = BaseArea.INITVALUE + _boardInfoAreaOffset = BaseArea.INITVALUE + _internalUserAreaOffset = BaseArea.INITVALUE + _chassicInfoAreaOffset = BaseArea.INITVALUE + _multiRecordAreaOffset = BaseArea.INITVALUE + _bindata = None + _bodybin = None + _version = BaseArea.COMMON_HEAD_VERSION + _zeroCheckSum = None + _frusize = 256 + + def __str__(self): + tmpstr = "" + if self.boardInfoArea.isPresent: + tmpstr += "\nboardinfoarea: \n" + tmpstr += self.boardInfoArea.__str__() + if self.productInfoArea.isPresent: + tmpstr += "\nproductinfoarea: \n" + tmpstr += self.productInfoArea.__str__() + return tmpstr + + def decodeBin(self, eeprom): + commonHead = eeprom[0:8] + d_print("decode version %x" % ord(commonHead[0])) + if ord(self.COMMON_HEAD_VERSION) != ord(commonHead[0]): + raise FruException("HEAD VERSION error,not Fru format!", -10) + if FruUtil.checksum(commonHead[0:7]) != ord(commonHead[7]): + strtemp = "check header checksum error [cal:%02x data:%02x]" % ( + FruUtil.checksum(commonHead[0:7]), ord(commonHead[7])) + raise FruException(strtemp, -3) + if ord(commonHead[1]) != ord(self.INITVALUE): + d_print("Internal Use Area is present") + self.internalUseArea = InternalUseArea( + name="Internal Use Area", size=self.SUGGESTED_SIZE_INTERNAL_USE_AREA) + self.internalUseArea.isPresent = True + self.internalUserAreaOffset = ord(commonHead[1]) + self.internalUseArea.data = eeprom[self.internalUserAreaOffset * 8: ( + self.internalUserAreaOffset * 8 + self.internalUseArea.size)] + if ord(commonHead[2]) != ord(self.INITVALUE): + d_print("Chassis Info Area is present") + self.chassisInfoArea = ChassisInfoArea( + name="Chassis Info Area", size=self.SUGGESTED_SIZE_CHASSIS_INFO_AREA) + self.chassisInfoArea.isPresent = True + self.chassicInfoAreaOffset = ord(commonHead[2]) + self.chassisInfoArea.data = eeprom[self.chassicInfoAreaOffset * 8: ( + self.chassicInfoAreaOffset * 8 + self.chassisInfoArea.size)] + if ord(commonHead[3]) != ord(self.INITVALUE): + self.boardInfoArea = BoardInfoArea( + name="Board Info Area", size=self.SUGGESTED_SIZE_BOARD_INFO_AREA) + self.boardInfoArea.isPresent = True + self.boardInfoAreaOffset = ord(commonHead[3]) + self.boardInfoArea.size = ord( + eeprom[self.boardInfoAreaOffset * 8 + 1]) * 8 + d_print("Board Info Area is present size:%d" % + (self.boardInfoArea.size)) + self.boardInfoArea.data = eeprom[self.boardInfoAreaOffset * 8: ( + self.boardInfoAreaOffset * 8 + self.boardInfoArea.size)] + if FruUtil.checksum(self.boardInfoArea.data[:-1]) != ord(self.boardInfoArea.data[-1:]): + strtmp = "check boardInfoArea checksum error[cal:%02x data:%02x]" % \ + (FruUtil.checksum( + self.boardInfoArea.data[:-1]), ord(self.boardInfoArea.data[-1:])) + raise FruException(strtmp, -3) + self.boardInfoArea.decodedata() + if ord(commonHead[4]) != ord(self.INITVALUE): + d_print("Product Info Area is present") + self.productInfoArea = ProductInfoArea( + name="Product Info Area ", size=self.SUGGESTED_SIZE_PRODUCT_INFO_AREA) + self.productInfoArea.isPresent = True + self.productinfoAreaOffset = ord(commonHead[4]) + d_print("length offset value: %02x" % + ord(eeprom[self.productinfoAreaOffset * 8 + 1])) + self.productInfoArea.size = ord( + eeprom[self.productinfoAreaOffset * 8 + 1]) * 8 + d_print("Product Info Area is present size:%d" % + (self.productInfoArea.size)) + + self.productInfoArea.data = eeprom[self.productinfoAreaOffset * 8: ( + self.productinfoAreaOffset * 8 + self.productInfoArea.size)] + if FruUtil.checksum(self.productInfoArea.data[:-1]) != ord(self.productInfoArea.data[-1:]): + strtmp = "check productInfoArea checksum error [cal:%02x data:%02x]" % ( + FruUtil.checksum(self.productInfoArea.data[:-1]), ord(self.productInfoArea.data[-1:])) + raise FruException(strtmp, -3) + self.productInfoArea.decodedata() + if ord(commonHead[5]) != ord(self.INITVALUE): + self.multiRecordArea = MultiRecordArea( + name="MultiRecord record Area ") + d_print("MultiRecord record present") + self.multiRecordArea.isPresent = True + self.multiRecordAreaOffset = ord(commonHead[5]) + self.multiRecordArea.data = eeprom[self.multiRecordAreaOffset * 8: ( + self.multiRecordAreaOffset * 8 + self.multiRecordArea.size)] + + def initDefault(self): + self.version = self.COMMON_HEAD_VERSION + self.internalUserAreaOffset = self.INITVALUE + self.chassicInfoAreaOffset = self.INITVALUE + self.boardInfoAreaOffset = self.INITVALUE + self.productinfoAreaOffset = self.INITVALUE + self.multiRecordAreaOffset = self.INITVALUE + self.zeroCheckSum = self.INITVALUE + self.offset = self.SUGGESTED_SIZE_COMMON_HEADER + self.productInfoArea = None + self.internalUseArea = None + self.boardInfoArea = None + self.chassisInfoArea = None + self.multiRecordArea = None + # self.recalcute() + + @property + def version(self): + return self._version + + @version.setter + def version(self, name): + self._version = name + + @property + def internalUserAreaOffset(self): + return self._internalUserAreaOffset + + @internalUserAreaOffset.setter + def internalUserAreaOffset(self, obj): + self._internalUserAreaOffset = obj + + @property + def chassicInfoAreaOffset(self): + return self._chassicInfoAreaOffset + + @chassicInfoAreaOffset.setter + def chassicInfoAreaOffset(self, obj): + self._chassicInfoAreaOffset = obj + + @property + def productinfoAreaOffset(self): + return self._productinfoAreaOffset + + @productinfoAreaOffset.setter + def productinfoAreaOffset(self, obj): + self._productinfoAreaOffset = obj + + @property + def boardInfoAreaOffset(self): + return self._boardInfoAreaOffset + + @boardInfoAreaOffset.setter + def boardInfoAreaOffset(self, obj): + self._boardInfoAreaOffset = obj + + @property + def multiRecordAreaOffset(self): + return self._multiRecordAreaOffset + + @multiRecordAreaOffset.setter + def multiRecordAreaOffset(self, obj): + self._multiRecordAreaOffset = obj + + @property + def zeroCheckSum(self): + return self._zeroCheckSum + + @zeroCheckSum.setter + def zeroCheckSum(self, obj): + self._zeroCheckSum = obj + + @property + def productInfoArea(self): + return self._ProductInfoArea + + @productInfoArea.setter + def productInfoArea(self, obj): + self._ProductInfoArea = obj + + @property + def internalUseArea(self): + return self._InternalUseArea + + @internalUseArea.setter + def internalUseArea(self, obj): + self.internalUseArea = obj + + @property + def boardInfoArea(self): + return self._BoardInfoArea + + @boardInfoArea.setter + def boardInfoArea(self, obj): + self._BoardInfoArea = obj + + @property + def chassisInfoArea(self): + return self._ChassisInfoArea + + @chassisInfoArea.setter + def chassisInfoArea(self, obj): + self._ChassisInfoArea = obj + + @property + def multiRecordArea(self): + return self._multiRecordArea + + @multiRecordArea.setter + def multiRecordArea(self, obj): + self._multiRecordArea = obj + + @property + def bindata(self): + return self._bindata + + @bindata.setter + def bindata(self, obj): + self._bindata = obj + + @property + def bodybin(self): + return self._bodybin + + @bodybin.setter + def bodybin(self, obj): + self._bodybin = obj + + def recalcuteCommonHead(self): + self.bindata = "" + self.offset = self.SUGGESTED_SIZE_COMMON_HEADER + d_print("common Header %d" % self.offset) + d_print("fru eeprom size %d" % self._frusize) + if self.internalUseArea is not None and self.internalUseArea.isPresent: + self.internalUserAreaOffset = self.offset // 8 + self.offset += self.internalUseArea.size + d_print("internalUseArea is present offset:%d" % self.offset) + + if self.chassisInfoArea is not None and self.chassisInfoArea.isPresent: + self.chassicInfoAreaOffset = self.offset // 8 + self.offset += self.chassisInfoArea.size + d_print("chassisInfoArea is present offset:%d" % self.offset) + + if self.boardInfoArea is not None and self.boardInfoArea.isPresent: + self.boardInfoAreaOffset = self.offset // 8 + self.offset += self.boardInfoArea.size + d_print("boardInfoArea is present offset:%d" % self.offset) + d_print("boardInfoArea is present size:%d" % + self.boardInfoArea.size) + + if self.productInfoArea is not None and self.productInfoArea.isPresent: + self.productinfoAreaOffset = self.offset // 8 + self.offset += self.productInfoArea.size + d_print("productInfoArea is present offset:%d" % self.offset) + + if self.multiRecordArea is not None and self.multiRecordArea.isPresent: + self.multiRecordAreaOffset = self.offset // 8 + d_print("multiRecordArea is present offset:%d" % self.offset) + + if self.internalUserAreaOffset == self.INITVALUE: + self.internalUserAreaOffset = 0 + if self.productinfoAreaOffset == self.INITVALUE: + self.productinfoAreaOffset = 0 + if self.chassicInfoAreaOffset == self.INITVALUE: + self.chassicInfoAreaOffset = 0 + if self.boardInfoAreaOffset == self.INITVALUE: + self.boardInfoAreaOffset = 0 + if self.multiRecordAreaOffset == self.INITVALUE: + self.multiRecordAreaOffset = 0 + + self.zeroCheckSum = (0x100 - ord(self.version) - self.internalUserAreaOffset - self.chassicInfoAreaOffset - self.productinfoAreaOffset + - self.boardInfoAreaOffset - self.multiRecordAreaOffset) & 0xff + d_print("zerochecksum:%x" % self.zeroCheckSum) + self.data = "" + self.data += chr(self.version[0]) + chr(self.internalUserAreaOffset) + chr(self.chassicInfoAreaOffset) + chr( + self.boardInfoAreaOffset) + chr(self.productinfoAreaOffset) + chr(self.multiRecordAreaOffset) + chr(self.INITVALUE[0]) + chr(self.zeroCheckSum) + + self.bindata = self.data + self.bodybin + totallen = len(self.bindata) + d_print("totallen %d" % totallen) + if totallen < self._frusize: + self.bindata = self.bindata.ljust(self._frusize, chr(self.INITVALUE[0])) + else: + raise FruException('bin data more than %d' % self._frusize, -2) + + def recalcutebin(self): + self.bodybin = "" + if self.internalUseArea is not None and self.internalUseArea.isPresent: + d_print("internalUseArea present") + self.bodybin += self.internalUseArea.data + if self.chassisInfoArea is not None and self.chassisInfoArea.isPresent: + d_print("chassisInfoArea present") + self.bodybin += self.chassisInfoArea.data + if self.boardInfoArea is not None and self.boardInfoArea.isPresent: + d_print("boardInfoArea present") + self.boardInfoArea.recalcute() + self.bodybin += self.boardInfoArea.data + if self.productInfoArea is not None and self.productInfoArea.isPresent: + d_print("productInfoAreapresent") + self.productInfoArea.recalcute() + self.bodybin += self.productInfoArea.data + if self.multiRecordArea is not None and self.multiRecordArea.isPresent: + d_print("multiRecordArea present") + self.bodybin += self.productInfoArea.data + + def recalcute(self, fru_eeprom_size=256): + self._frusize = fru_eeprom_size + self.recalcutebin() + self.recalcuteCommonHead() + + def setValue(self, area, field, value): + tmp_area = getattr(self, area, None) + if tmp_area is not None: + tmp_area.fruSetValue(field, value) diff --git a/device/micas/x86_64-micas_m2-w6951-64hc-cp-r0/installer.conf b/device/micas/x86_64-micas_m2-w6951-64hc-cp-r0/installer.conf new file mode 100644 index 00000000000..832f836f2f3 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6951-64hc-cp-r0/installer.conf @@ -0,0 +1,41 @@ +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="modprobe.blacklist=ixgbe,wb_ixgbe,ice,i2c_designware_platform,wb_i2c_designware_platform,i2c_piix4,i2c_asf,spi_amd,cdc_subset" +CONSOLE_PORT=0x3f8 +CONSOLE_DEV=0 + +create_eth_fix_rules(){ + [ -n "$demo_mnt" ] || return + + [ "$install_env" = "onie" -a -n "$demo_dev" ] && { + mkdir -p $demo_mnt + ${onie_bin} mount -t ext4 -o defaults,rw $demo_dev $demo_mnt || { + echo "Error: Unable to mount $demo_dev on $demo_mnt,link creating failed." + } + } + [ -n "$demo_mnt" -a -n "$image_dir" -a -d "$demo_mnt/$image_dir" ] && { + mkdir -p $demo_mnt/$image_dir/rw/etc/systemd/network/ + + # Fix Intel E610/E810 Ethernet interface names by PCI path + # 02:00.0 -> eth1, 02:00.1 -> eth2 (E610 10GBASE-T) + # 03:00.0..3 -> eth3..eth6 (E810-C backplane) + for entry in \ + "1:0000:02:00.0" \ + "2:0000:02:00.1" \ + "3:0000:03:00.0" \ + "4:0000:03:00.1" \ + "5:0000:03:00.2" \ + "6:0000:03:00.3"; do + idx=${entry%%:*} + bdf=${entry#*:} + cat > $demo_mnt/$image_dir/rw/etc/systemd/network/20-eth${idx}.link < 0: + os.close(fd) + return True, val_list + + +def getPMCreg(location): + retval = 'ERR' + if not os.path.isfile(location): + return "%s %s notfound" % (retval, location) + try: + with open(location, 'r') as fd: + retval = fd.read() + except Exception as error: + return "ERR %s" % str(error) + + retval = retval.rstrip('\r\n') + retval = retval.lstrip(" ") + return retval + + +# Get a mailbox register +def get_pmc_register(reg_name): + retval = 'ERR' + mb_reg_file = reg_name + filepath = glob.glob(mb_reg_file) + if len(filepath) == 0: + return "%s %s notfound" % (retval, mb_reg_file) + mb_reg_file = filepath[0] + if not os.path.isfile(mb_reg_file): + # print mb_reg_file, 'not found !' + return "%s %s notfound" % (retval, mb_reg_file) + try: + with open(mb_reg_file, 'rb') as fd: + retval = fd.read() + retval = typeTostr(retval) + except Exception as error: + retval = "%s %s read failed, msg: %s" % (retval, mb_reg_file, str(error)) + + retval = retval.rstrip('\r\n') + retval = retval.lstrip(" ") + return retval + + +class checktype(): + def __init__(self, test1): + self.test1 = test1 + + @staticmethod + def getValue(location, bit, data_type, coefficient=1, addend=0): + try: + value_t = get_pmc_register(location) + if value_t.startswith("ERR") or value_t.startswith("NA"): + return value_t + if data_type == 1: + return float('%.1f' % ((float(value_t) / 1000) + addend)) + if data_type == 2: + return float('%.1f' % (float(value_t) / 100)) + if data_type == 3: + psu_status = int(value_t, 16) + return (psu_status & (1 << bit)) >> bit + if data_type == 4: + return int(value_t, 10) + if data_type == 5: + return float('%.1f' % (float(value_t) / 1000 / 1000)) + if data_type == 6: + return Decimal(float(value_t) * coefficient / 1000).quantize(Decimal('0.000')) + return value_t + except Exception as e: + value_t = "ERR %s" % str(e) + return value_t + + # fanFRU + @staticmethod + def decodeBinByValue(retval): + fru = ipmifru() + fru.decodeBin(retval) + return fru + + @staticmethod + def getfruValue(prob_t, root, val): + try: + ret, binval_bytes = dev_file_read(val, 0, 256) + if ret is False: + return binval_bytes + binval = byteTostr(binval_bytes) + fanpro = {} + ret = checktype.decodeBinByValue(binval) + fanpro['fan_type'] = ret.productInfoArea.productName + fanpro['hw_version'] = ret.productInfoArea.productVersion + fanpro['sn'] = ret.productInfoArea.productSerialNumber + fan_display_name_dict = status.getDecodValue(root, "fan_display_name") + fan_name = fanpro['fan_type'].strip() + if len(fan_display_name_dict) == 0: + return fanpro + if fan_name not in fan_display_name_dict: + prob_t['errcode'] = -1 + prob_t['errmsg'] = '%s' % ("ERR fan name: %s not support" % fan_name) + else: + fanpro['fan_type'] = fan_display_name_dict[fan_name] + return fanpro + except Exception as error: + return "ERR " + str(error) + + @staticmethod + def getslotfruValue(val): + try: + binval = checktype.getValue(val, 0, 0) + if binval.startswith("ERR"): + return binval + slotpro = {} + ret = checktype.decodeBinByValue(binval) + slotpro['slot_type'] = ret.boardInfoArea.boardProductName + slotpro['hw_version'] = ret.boardInfoArea.boardextra1 + slotpro['sn'] = ret.boardInfoArea.boardSerialNumber + return slotpro + except Exception as error: + return "ERR " + str(error) + + @staticmethod + def getpsufruValue(prob_t, root, val): + try: + psu_match = False + binval = checktype.getValue(val, 0, 0) + if binval.startswith("ERR"): + return binval + psupro = {} + ret = checktype.decodeBinByValue(binval) + psupro['type1'] = ret.productInfoArea.productPartModelName + psupro['sn'] = ret.productInfoArea.productSerialNumber + psupro['hw_version'] = ret.productInfoArea.productVersion + psu_dict = status.getDecodValue(root, "psutype") + psupro['type1'] = psupro['type1'].strip() + if len(psu_dict) == 0: + return psupro + for psu_name, display_name in psu_dict.items(): + if psu_name.strip() == psupro['type1']: + psupro['type1'] = display_name + psu_match = True + break + if psu_match is not True: + prob_t['errcode'] = -1 + prob_t['errmsg'] = '%s' % ("ERR psu name: %s not support" % psupro['type1']) + return psupro + except Exception as error: + return "ERR " + str(error) + + +class status(): + def __init__(self, productname): + self.productname = productname + + @staticmethod + def getETroot(filename): + tree = ET.parse(filename) + root = tree.getroot() + return root + + @staticmethod + def getDecodValue(collection, decode): + decodes = collection.find('decode') + testdecode = decodes.find(decode) + test = {} + if testdecode is None: + return test + for neighbor in testdecode.iter('code'): + test[neighbor.attrib["key"]] = neighbor.attrib["value"] + return test + + @staticmethod + def getfileValue(location): + return checktype.getValue(location, " ", " ") + + @staticmethod + def getETValue(a, filename, tagname): + root = status.getETroot(filename) + for neighbor in root.iter(tagname): + prob_t = {} + prob_t.update(neighbor.attrib) + prob_t['errcode'] = 0 + prob_t['errmsg'] = '' + for pros in neighbor.iter("property"): + ret = dict(list(neighbor.attrib.items()) + list(pros.attrib.items())) + if ret.get('e2type') == 'fru' and ret.get("name") == "fru": + fruval = checktype.getfruValue(prob_t, root, ret["location"]) + if isinstance(fruval, str) and fruval.startswith("ERR"): + prob_t['errcode'] = -1 + prob_t['errmsg'] = fruval + break + prob_t.update(fruval) + continue + + if ret.get("name") == "psu" and ret.get('e2type') == 'fru': + psuval = checktype.getpsufruValue(prob_t, root, ret["location"]) + if isinstance(psuval, str) and psuval.startswith("ERR"): + prob_t['errcode'] = -1 + prob_t['errmsg'] = psuval + break + prob_t.update(psuval) + continue + + if ret.get("gettype") == "config": + prob_t[ret["name"]] = ret["value"] + continue + + if 'type' not in ret.keys(): + val = "0" + else: + val = ret["type"] + if 'bit' not in ret.keys(): + bit = "0" + else: + bit = ret["bit"] + if 'coefficient' not in ret.keys(): + coefficient = 1 + else: + coefficient = float(ret["coefficient"]) + if 'addend' not in ret.keys(): + addend = 0 + else: + addend = float(ret["addend"]) + + s = checktype.getValue(ret["location"], int(bit), int(val), coefficient, addend) + if isinstance(s, str) and s.startswith("ERR"): + prob_t['errcode'] = -1 + prob_t['errmsg'] = s + break + if 'default' in ret.keys(): + rt = status.getDecodValue(root, ret['decode']) + prob_t['errmsg'] = rt[str(s)] + if str(s) != ret["default"]: + prob_t['errcode'] = -1 + break + else: + if 'decode' in ret.keys(): + rt = status.getDecodValue(root, ret['decode']) + if (ret['decode'] == "psutype" and s.replace("\x00", "").rstrip() not in rt): + prob_t['errcode'] = -1 + prob_t['errmsg'] = '%s' % ("ERR psu name: %s not support" % + (s.replace("\x00", "").rstrip())) + else: + s = rt[str(s).replace("\x00", "").rstrip()] + name = ret["name"] + prob_t[name] = str(s) + a.append(prob_t) + + @staticmethod + def getCPUValue(a, filename, tagname): + root = status.getETroot(filename) + for neighbor in root.iter(tagname): + location = neighbor.attrib["location"] + L = [] + for dirpath, dirnames, filenames in os.walk(location): + for file in filenames: + if file.endswith("input"): + L.append(os.path.join(dirpath, file)) + L = sorted(L, reverse=False) + for i in range(len(L)): + prob_t = {} + prob_t["name"] = getPMCreg("%s/temp%d_label" % (location, i + 1)) + prob_t["temp"] = float(getPMCreg("%s/temp%d_input" % (location, i + 1))) / 1000 + prob_t["alarm"] = float(getPMCreg("%s/temp%d_crit_alarm" % (location, i + 1))) / 1000 + prob_t["crit"] = float(getPMCreg("%s/temp%d_crit" % (location, i + 1))) / 1000 + prob_t["max"] = float(getPMCreg("%s/temp%d_max" % (location, i + 1))) / 1000 + a.append(prob_t) + + @staticmethod + def getFileName(): + fpath = os.path.dirname(os.path.realpath(__file__)) + for file in DEV_XML_FILE_LIST: + xml = fpath + "/" + file + if os.path.exists(xml): + return xml + return fpath + "/" + CONFIG_NAME + + @staticmethod + def checkFan(ret): + _filename = status.getFileName() + # _filename = "/usr/local/bin/" + status.getFileName() + _tagname = "fan" + status.getETValue(ret, _filename, _tagname) + + @staticmethod + def getTemp(ret): + _filename = status.getFileName() + # _filename = "/usr/local/bin/" + status.getFileName() + _tagname = "temp" + status.getETValue(ret, _filename, _tagname) + + @staticmethod + def getPsu(ret): + _filename = status.getFileName() + # _filename = "/usr/local/bin/" + status.getFileName() + _tagname = "psu" + status.getETValue(ret, _filename, _tagname) + + @staticmethod + def getcputemp(ret): + _filename = status.getFileName() + _tagname = "cpus" + status.getCPUValue(ret, _filename, _tagname) + + @staticmethod + def getDcdc(ret): + _filename = status.getFileName() + _tagname = "dcdc" + status.getETValue(ret, _filename, _tagname) + + @staticmethod + def getmactemp(ret): + _filename = status.getFileName() + _tagname = "mactemp" + status.getETValue(ret, _filename, _tagname) + + @staticmethod + def getmacpower(ret): + _filename = status.getFileName() + _tagname = "macpower" + status.getETValue(ret, _filename, _tagname) diff --git a/device/micas/x86_64-micas_m2-w6951-64hc-cp-r0/pcie.yaml b/device/micas/x86_64-micas_m2-w6951-64hc-cp-r0/pcie.yaml new file mode 100644 index 00000000000..b0688f08b93 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6951-64hc-cp-r0/pcie.yaml @@ -0,0 +1,240 @@ +- bus: '00' + dev: '00' + fn: '0' + id: '1022:14d8' + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge Root Complex' +- bus: '00' + dev: '00' + fn: '2' + id: '1022:14d9' + name: 'IOMMU: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge IOMMU' +- bus: '00' + dev: '01' + fn: '0' + id: '1022:14da' + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge Dummy Host Bridge' +- bus: '00' + dev: '01' + fn: '1' + id: '1022:14db' + name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge GPP Bridge' +- bus: '00' + dev: '01' + fn: '2' + id: '1022:14db' + name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge GPP Bridge' +- bus: '00' + dev: '01' + fn: '3' + id: '1022:14db' + name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge GPP Bridge' +- bus: '00' + dev: '01' + fn: '4' + id: '1022:14db' + name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge GPP Bridge' +- bus: '00' + dev: '01' + fn: '5' + id: '1022:14db' + name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge GPP Bridge' +- bus: '00' + dev: '02' + fn: '0' + id: '1022:14da' + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge Dummy Host Bridge' +- bus: '00' + dev: '02' + fn: '1' + id: '1022:14db' + name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge GPP Bridge' +- bus: '00' + dev: '02' + fn: '2' + id: '1022:14db' + name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge GPP Bridge' +- bus: '00' + dev: '03' + fn: '0' + id: '1022:14da' + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge Dummy Host Bridge' +- bus: '00' + dev: '03' + fn: '1' + id: '1022:14db' + name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge GPP Bridge' +- bus: '00' + dev: '03' + fn: '2' + id: '1022:14db' + name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge GPP Bridge' +- bus: '00' + dev: '03' + fn: '3' + id: '1022:14db' + name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge GPP Bridge' +- bus: '00' + dev: '03' + fn: '4' + id: '1022:14db' + name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge GPP Bridge' +- bus: '00' + dev: '04' + fn: '0' + id: '1022:14da' + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge Dummy Host Bridge' +- bus: '00' + dev: '08' + fn: '0' + id: '1022:14da' + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge Dummy Host Bridge' +- bus: '00' + dev: '08' + fn: '1' + id: '1022:14dd' + name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge Internal GPP Bridge to Bus [C:A]' +- bus: '00' + dev: '08' + fn: '3' + id: '1022:14dd' + name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge Internal GPP Bridge to Bus [C:A]' +- bus: '00' + dev: '14' + fn: '0' + id: '1022:790b' + name: 'SMBus: Advanced Micro Devices, Inc. [AMD] FCH SMBus Controller (rev 71)' +- bus: '00' + dev: '14' + fn: '3' + id: '1022:790e' + name: 'ISA bridge: Advanced Micro Devices, Inc. [AMD] FCH LPC Bridge (rev 51)' +- bus: '00' + dev: '18' + fn: '0' + id: '1022:14e0' + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge Data Fabric; Function 0' +- bus: '00' + dev: '18' + fn: '1' + id: '1022:14e1' + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge Data Fabric; Function 1' +- bus: '00' + dev: '18' + fn: '2' + id: '1022:14e2' + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge Data Fabric; Function 2' +- bus: '00' + dev: '18' + fn: '3' + id: '1022:14e3' + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge Data Fabric; Function 3' +- bus: '00' + dev: '18' + fn: '4' + id: '1022:14e4' + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge Data Fabric; Function 4' +- bus: '00' + dev: '18' + fn: '5' + id: '1022:14e5' + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge Data Fabric; Function 5' +- bus: '00' + dev: '18' + fn: '6' + id: '1022:14e6' + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge Data Fabric; Function 6' +- bus: '00' + dev: '18' + fn: '7' + id: '1022:14e7' + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge Data Fabric; Function 7' +- bus: '01' + dev: '00' + fn: '0' + id: '14e4:f914' + name: 'Ethernet controller: Broadcom Inc. and subsidiaries BCM78914 Switch ASIC [Tomahawk6] (rev 11)' +- bus: '02' + dev: '00' + fn: '0' + id: '8086:57b0' + name: 'Ethernet controller: Intel Corporation Ethernet Controller E610 10GBASE T' +- bus: '02' + dev: '00' + fn: '1' + id: '8086:57b0' + name: 'Ethernet controller: Intel Corporation Ethernet Controller E610 10GBASE T' +- bus: '03' + dev: '00' + fn: '0' + id: '8086:1591' + name: 'Ethernet controller: Intel Corporation Ethernet Controller E810-C for backplane (rev 02)' +- bus: '03' + dev: '00' + fn: '1' + id: '8086:1591' + name: 'Ethernet controller: Intel Corporation Ethernet Controller E810-C for backplane (rev 02)' +- bus: '03' + dev: '00' + fn: '2' + id: '8086:1591' + name: 'Ethernet controller: Intel Corporation Ethernet Controller E810-C for backplane (rev 02)' +- bus: '03' + dev: '00' + fn: '3' + id: '8086:1591' + name: 'Ethernet controller: Intel Corporation Ethernet Controller E810-C for backplane (rev 02)' +- bus: '05' + dev: '00' + fn: '0' + id: '1d89:0280' + name: 'Non-Volatile memory controller: YEESTOR Microelectronics Co., Ltd PCIe NVMe SSD (rev 01)' +- bus: '08' + dev: '00' + fn: '0' + id: '10ee:7011' + name: 'Memory controller: Xilinx Corporation 7-Series FPGA Hard PCIe block (AXI/debug)' +- bus: '0a' + dev: '00' + fn: '0' + id: '8086:1533' + name: 'Ethernet controller: Intel Corporation I210 Gigabit Network Connection (rev 03)' +- bus: '0b' + dev: '00' + fn: '0' + id: '10ee:7011' + name: 'Memory controller: Xilinx Corporation 7-Series FPGA Hard PCIe block (AXI/debug)' +- bus: '0c' + dev: '00' + fn: '0' + id: '1022:14de' + name: 'Non-Essential Instrumentation [1300]: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge PCIe Dummy Function' +- bus: '0c' + dev: '00' + fn: '2' + id: '1022:1649' + name: 'Encryption controller: Advanced Micro Devices, Inc. [AMD] Family 19h PSP/CCP' +- bus: '0c' + dev: '00' + fn: '3' + id: '1022:15b6' + name: 'USB controller: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge USB 3.1 xHCI' +- bus: '0c' + dev: '00' + fn: '4' + id: '1022:15b7' + name: 'USB controller: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge USB 3.1 xHCI' +- bus: '0c' + dev: '00' + fn: '5' + id: '1022:15e2' + name: 'Multimedia controller: Advanced Micro Devices, Inc. [AMD] Audio Coprocessor (rev 62)' +- bus: '0c' + dev: '00' + fn: '6' + id: '1022:15e3' + name: 'Audio device: Advanced Micro Devices, Inc. [AMD] Family 17h/19h/1ah HD Audio Controller' +- bus: '0d' + dev: '00' + fn: '0' + id: '1022:15b8' + name: 'USB controller: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge USB 2.0 xHCI' \ No newline at end of file diff --git a/device/micas/x86_64-micas_m2-w6951-64hc-cp-r0/platform.json b/device/micas/x86_64-micas_m2-w6951-64hc-cp-r0/platform.json new file mode 100644 index 00000000000..aa55a933157 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6951-64hc-cp-r0/platform.json @@ -0,0 +1,4402 @@ +{ + "chassis": { + "name": "M2-W6951-64HC-CP", + "thermal_manager": false, + "status_led": { + "controllable": false, + "colors": [ + "green", + "blinking_green", + "amber", + "blinking_amber" + ] + }, + "components": [ + { + "name": "CPU_CPLD" + }, + { + "name": "CONNECT_CPLD" + }, + { + "name": "MAC_CPLDA" + }, + { + "name": "MAC_CPLDB" + }, + { + "name": "MAC_CPLDC" + }, + { + "name": "FAN_CPLD" + }, + { + "name": "MGMT_CPLD" + }, + { + "name": "MAC_FPGA" + }, + { + "name": "BIOS" + } + ], + "fans": [ + { + "name": "Fantray1_1", + "speed": { + "controllable": true, + "minimum": 50, + "maximum": 100 + }, + "status_led": { + "available": false, + "colors": [ + "off", + "red", + "amber", + "green" + ] + } + }, + { + "name": "Fantray1_2", + "speed": { + "controllable": true, + "minimum": 50, + "maximum": 100 + }, + "status_led": { + "available": false, + "colors": [ + "off", + "red", + "amber", + "green" + ] + } + }, + { + "name": "Fantray2_1", + "speed": { + "controllable": true, + "minimum": 50, + "maximum": 100 + }, + "status_led": { + "available": false, + "colors": [ + "off", + "red", + "amber", + "green" + ] + } + }, + { + "name": "Fantray2_2", + "speed": { + "controllable": true, + "minimum": 50, + "maximum": 100 + }, + "status_led": { + "available": false, + "colors": [ + "off", + "red", + "amber", + "green" + ] + } + }, + { + "name": "Fantray3_1", + "speed": { + "controllable": true, + "minimum": 50, + "maximum": 100 + }, + "status_led": { + "available": false, + "colors": [ + "off", + "red", + "amber", + "green" + ] + } + }, + { + "name": "Fantray3_2", + "speed": { + "controllable": true, + "minimum": 50, + "maximum": 100 + }, + "status_led": { + "available": false, + "colors": [ + "off", + "red", + "amber", + "green" + ] + } + }, + { + "name": "Fantray4_1", + "speed": { + "controllable": true, + "minimum": 50, + "maximum": 100 + }, + "status_led": { + "available": false, + "colors": [ + "off", + "red", + "amber", + "green" + ] + } + }, + { + "name": "Fantray4_2", + "speed": { + "controllable": true, + "minimum": 50, + "maximum": 100 + }, + "status_led": { + "available": false, + "colors": [ + "off", + "red", + "amber", + "green" + ] + } + } + ], + "fan_drawers": [ + { + "name": "Fantray1", + "num_fans": 2, + "status_led": { + "controllable": false, + "colors": [ + "amber", + "green", + "off" + ] + }, + "fans": [ + { + "name": "Fantray1_1", + "speed": { + "controllable": true, + "minimum": 50, + "maximum": 100 + }, + "status_led": { + "available": false + } + }, + { + "name": "Fantray1_2", + "speed": { + "controllable": true, + "minimum": 50, + "maximum": 100 + }, + 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"1x200G(2)": [ + "Eth61/1" + ], + "1x100G(1)": [ + "Eth61/1" + ], + "1x200G(1)": [ + "Eth61/1" + ] + } + }, + "Ethernet489": { + "index": "61,61,61,61,61,61,61,61", + "lanes": "417,418,419,420,421,422,423,424", + "breakout_modes": { + "1x1600G": [ + "Eth62" + ], + "2x800G": [ + "Eth62/1", + "Eth62/2" + ], + "4x400G": [ + "Eth62/1", + "Eth62/2", + "Eth62/3", + "Eth62/4" + ], + "8x200G": [ + "Eth62/1", + "Eth62/2", + "Eth62/3", + "Eth62/4", + "Eth62/5", + "Eth62/6", + "Eth62/7", + "Eth62/8" + ], + "2x400G": [ + "Eth62/1", + "Eth62/2" + ], + "4x200G": [ + "Eth62/1", + "Eth62/2", + "Eth62/3", + "Eth62/4" + ], + "8x100G": [ + "Eth62/1", + "Eth62/2", + "Eth62/3", + "Eth62/4", + "Eth62/5", + "Eth62/6", + "Eth62/7", + "Eth62/8" + ], + "1x400G(4)": [ + "Eth62/1" + ], + "1x200G(2)": [ + "Eth62/1" + ], + "1x100G(1)": [ + "Eth62/1" + ], + "1x200G(1)": [ + "Eth62/1" + ] + } + }, + "Ethernet497": { + "index": "62,62,62,62,62,62,62,62", + "lanes": "361,362,363,364,365,366,367,368", + "breakout_modes": { + "1x1600G": [ + "Eth63" + ], + "2x800G": [ + "Eth63/1", + "Eth63/2" + ], + "4x400G": [ + "Eth63/1", + "Eth63/2", + "Eth63/3", + "Eth63/4" + ], + "8x200G": [ + "Eth63/1", + "Eth63/2", + "Eth63/3", + "Eth63/4", + "Eth63/5", + "Eth63/6", + "Eth63/7", + "Eth63/8" + ], + "2x400G": [ + "Eth63/1", + "Eth63/2" + ], + "4x200G": [ + "Eth63/1", + "Eth63/2", + "Eth63/3", + "Eth63/4" + ], + "8x100G": [ + "Eth63/1", + "Eth63/2", + "Eth63/3", + "Eth63/4", + "Eth63/5", + "Eth63/6", + "Eth63/7", + "Eth63/8" + ], + "1x400G(4)": [ + "Eth63/1" + ], + "1x200G(2)": [ + "Eth63/1" + ], + "1x100G(1)": [ + "Eth63/1" + ], + "1x200G(1)": [ + "Eth63/1" + ] + } + }, + "Ethernet505": { + "index": "63,63,63,63,63,63,63,63", + "lanes": "353,354,355,356,357,358,359,360", + "breakout_modes": { + "1x1600G": [ + "Eth64" + ], + "2x800G": [ + "Eth64/1", + "Eth64/2" + ], + "4x400G": [ + "Eth64/1", + "Eth64/2", + "Eth64/3", + "Eth64/4" + ], + "8x200G": [ + "Eth64/1", + "Eth64/2", + "Eth64/3", + "Eth64/4", + "Eth64/5", + "Eth64/6", + "Eth64/7", + "Eth64/8" + ], + "2x400G": [ + "Eth64/1", + "Eth64/2" + ], + "4x200G": [ + "Eth64/1", + "Eth64/2", + "Eth64/3", + "Eth64/4" + ], + "8x100G": [ + "Eth64/1", + "Eth64/2", + "Eth64/3", + "Eth64/4", + "Eth64/5", + "Eth64/6", + "Eth64/7", + "Eth64/8" + ], + "1x400G(4)": [ + "Eth64/1" + ], + "1x200G(2)": [ + "Eth64/1" + ], + "1x100G(1)": [ + "Eth64/1" + ], + "1x200G(1)": [ + "Eth64/1" + ] + } + }, + "Ethernet513": { + "index": "64", + "lanes": "514", + "breakout_modes": { + "1x25G": [ + "Eth65" + ] + } + }, + "Ethernet514": { + "index": "65", + "lanes": "517", + "breakout_modes": { + "1x25G": [ + "Eth66" + ] + } + } + } +} diff --git a/device/micas/x86_64-micas_m2-w6951-64hc-cp-r0/platform_asic b/device/micas/x86_64-micas_m2-w6951-64hc-cp-r0/platform_asic new file mode 100644 index 00000000000..96046765276 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6951-64hc-cp-r0/platform_asic @@ -0,0 +1 @@ +broadcom diff --git a/device/micas/x86_64-micas_m2-w6951-64hc-cp-r0/platform_components.json b/device/micas/x86_64-micas_m2-w6951-64hc-cp-r0/platform_components.json new file mode 100644 index 00000000000..983383d34c9 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6951-64hc-cp-r0/platform_components.json @@ -0,0 +1,17 @@ +{ + "chassis": { + "M2-W6951-64HC-CP": { + "component": { + "CPU_CPLD": { }, + "BASE_CPLD": { }, + "MAC_CPLDA": { }, + "MAC_CPLDB": { }, + "IO_CPLD": { }, + "FAN_CPLD": { }, + "MAC_FPGA": { }, + "IO_FPGA": { }, + "BIOS": { } + } + } + } +} diff --git a/device/micas/x86_64-micas_m2-w6951-64hc-cp-r0/platform_env.conf b/device/micas/x86_64-micas_m2-w6951-64hc-cp-r0/platform_env.conf new file mode 100644 index 00000000000..fc119184d5c --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6951-64hc-cp-r0/platform_env.conf @@ -0,0 +1,2 @@ +is_ltsw_chip=1 +SYNCD_SHM_SIZE=1g diff --git a/device/micas/x86_64-micas_m2-w6951-64hc-cp-r0/plugins/sfputil.py b/device/micas/x86_64-micas_m2-w6951-64hc-cp-r0/plugins/sfputil.py new file mode 100644 index 00000000000..f27e64777a8 --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6951-64hc-cp-r0/plugins/sfputil.py @@ -0,0 +1,443 @@ +# sfputil.py +# +# Platform-specific SFP transceiver interface for SONiC +# + +try: + import time + import os + import traceback + import subprocess + from ctypes import create_string_buffer + from sonic_sfp.sfputilbase import SfpUtilBase + from sonic_platform_base.sonic_sfp.sff8436 import sff8436Dom +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + + PORT_START = 0 + PORT_END = 65 + PORTS_IN_BLOCK = 66 + + EEPROM_OFFSET = 201 + SFP_DEVICE_TYPE = "optoe2" + QSFP_DEVICE_TYPE = "optoe1" + QSFP_DD_DEVICE_TYPE = "optoe3" + I2C_MAX_ATTEMPT = 3 + + OPTOE_TYPE1 = 1 + OPTOE_TYPE2 = 2 + OPTOE_TYPE3 = 3 + + SFP_STATUS_INSERTED = '1' + SFP_STATUS_REMOVED = '0' + + _port_to_eeprom_mapping = {} + port_to_i2cbus_mapping ={} + port_dict = {} + + qsfp_ports_list = [] + qsfp_dd_ports_list = [] + + @property + def port_start(self): + return self.PORT_START + + @property + def port_end(self): + return self.PORT_END + + @property + def qsfp_ports(self): + return self.qsfp_ports_list + + @property + def qsfp_dd_ports(self): + return self.qsfp_dd_ports_list + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + def __init__(self): + for x in range(self.PORT_START, self.PORTS_IN_BLOCK-2): + remainder = x % 2 + remain = (x)//2 + group = remainder + remain + if x in [2,3,6,7,10,11,14,15,18,19,22,23,26,27,30,31,34,35,38,39,42,43,46,47,50,51,54,55,58,59,62,63]: + self.port_to_i2cbus_mapping[x] = 200 + group + elif x in [0,1,4,5,8,9,12,13,16,17,20,21,24,25,28,29,32,33,36,37,40,41,44,45,48,49,52,53,56,57,60,61]: + self.port_to_i2cbus_mapping[x] = 233 + group + self.port_to_i2cbus_mapping[64] = 265 + self.port_to_i2cbus_mapping[65] = 265 + self.update_ports_list() + + SfpUtilBase.__init__(self) + + def _sfp_read_file_path(self, file_path, offset, num_bytes): + attempts = 0 + while attempts < self.I2C_MAX_ATTEMPT: + try: + file_path.seek(offset) + read_buf = file_path.read(num_bytes) + except: + attempts += 1 + time.sleep(0.05) + else: + return True, read_buf + return False, None + + def _sfp_eeprom_present(self, sysfs_sfp_i2c_client_eeprompath, offset): + """Tries to read the eeprom file to determine if the + device/sfp is present or not. If sfp present, the read returns + valid bytes. If not, read returns error 'Connection timed out""" + + if not os.path.exists(sysfs_sfp_i2c_client_eeprompath): + return False + else: + with open(sysfs_sfp_i2c_client_eeprompath, "rb", buffering=0) as sysfsfile: + rv, buf = self._sfp_read_file_path(sysfsfile, offset, 1) + return rv + + def _add_new_sfp_device(self, sysfs_sfp_i2c_adapter_path, devaddr, devtype): + try: + sysfs_nd_path = "%s/new_device" % sysfs_sfp_i2c_adapter_path + + # Write device address to new_device file + nd_file = open(sysfs_nd_path, "w") + nd_str = "%s %s" % (devtype, hex(devaddr)) + nd_file.write(nd_str) + nd_file.close() + + except Exception as err: + print("Error writing to new device file: %s" % str(err)) + return 1 + else: + return 0 + + def _get_port_eeprom_path(self, port_num, devid): + sysfs_i2c_adapter_base_path = "/sys/bus/i2c/devices" + + if port_num in self.port_to_eeprom_mapping.keys(): + sysfs_sfp_i2c_client_eeprom_path = self.port_to_eeprom_mapping[port_num] + else: + sysfs_i2c_adapter_base_path = "/sys/bus/i2c/devices" + + i2c_adapter_id = self._get_port_i2c_adapter_id(port_num) + if i2c_adapter_id is None: + print("Error getting i2c bus num") + return None + + # Get i2c virtual bus path for the sfp + sysfs_sfp_i2c_adapter_path = "%s/i2c-%s" % (sysfs_i2c_adapter_base_path, + str(i2c_adapter_id)) + + # If i2c bus for port does not exist + if not os.path.exists(sysfs_sfp_i2c_adapter_path): + print("Could not find i2c bus %s. Driver not loaded?" % sysfs_sfp_i2c_adapter_path) + return None + + sysfs_sfp_i2c_client_path = "%s/%s-00%s" % (sysfs_sfp_i2c_adapter_path, + str(i2c_adapter_id), + hex(devid)[-2:]) + + # If sfp device is not present on bus, Add it + if not os.path.exists(sysfs_sfp_i2c_client_path): + if port_num in self.qsfp_dd_ports: + ret = self._add_new_sfp_device( + sysfs_sfp_i2c_adapter_path, devid, self.QSFP_DD_DEVICE_TYPE) + elif port_num in self.qsfp_ports: + ret = self._add_new_sfp_device( + sysfs_sfp_i2c_adapter_path, devid, self.QSFP_DEVICE_TYPE) + else: + ret = self._add_new_sfp_device( + sysfs_sfp_i2c_adapter_path, devid, self.SFP_DEVICE_TYPE) + if ret != 0: + print("Error adding sfp device") + return None + + sysfs_sfp_i2c_client_eeprom_path = "%s/eeprom" % sysfs_sfp_i2c_client_path + + return sysfs_sfp_i2c_client_eeprom_path + + def _read_eeprom_specific_bytes(self, sysfsfile_eeprom, offset, num_bytes): + eeprom_raw = [] + for i in range(0, num_bytes): + eeprom_raw.append("0x00") + + rv, raw = self._sfp_read_file_path(sysfsfile_eeprom, offset, num_bytes) + if rv == False: + return None + + try: + if len(raw) == 0: + return None + for n in range(0, num_bytes): + eeprom_raw[n] = hex(raw[n])[2:].zfill(2) + except: + return None + + return eeprom_raw + + def get_eeprom_dom_raw(self, port_num): + if port_num in self.qsfp_ports: + # QSFP DOM EEPROM is also at addr 0x50 and thus also stored in eeprom_ifraw + return None + else: + # Read dom eeprom at addr 0x51 + return self._read_eeprom_devid(port_num, self.IDENTITY_EEPROM_ADDR, 256) + + def get_presence(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + cmd = "cat /sys/s3ip/transceiver/eth{}/present".format(str(port_num + 1)) + ret, output = subprocess.getstatusoutput(cmd) + if ret != 0: + return False + if output == "1": + return True + return False + + def check_is_qsfpdd(self, port_num): + try: + if self.get_presence(port_num) == False: + return False + + eeprom_path = self._get_port_eeprom_path(port_num, 0x50) + with open(eeprom_path, mode="rb", buffering=0) as eeprom: + eeprom_raw = self._read_eeprom_specific_bytes(eeprom, 0, 1) + if eeprom_raw is None: + return False + # according to sff-8024 A0h Byte 0 is '1e','18' or '19' means the transceiver is qsfpdd, + if (eeprom_raw[0] == '1e' or eeprom_raw[0] == '18' or eeprom_raw[0] == '19'): + return True + except Exception as e: + print(traceback.format_exc()) + + return False + + def check_optoe_type(self, port_num, optoe_type): + if self.get_presence(port_num) == False: + return True + try: + eeprom_path = self._get_port_eeprom_path(port_num, 0x50) + dev_class_path = '/sys/bus/i2c/devices/i2c-{0}/{0}-0050/dev_class' + i2c_path = dev_class_path.format(str(self.port_to_i2cbus_mapping[port_num])) + cmd = "cat " + i2c_path + ret, output = subprocess.getstatusoutput(cmd) + if ret != 0: + print("cmd: %s execution fail, output:%s" % (cmd, output)) + return False + if int(output) != optoe_type: + cmd = "echo " + str(optoe_type) + " > " + i2c_path + ret, output = subprocess.getstatusoutput(cmd) + if ret != 0: + print("cmd: %s execution fail, output:%s" % (cmd, output)) + return False + return True + + except Exception as e: + print(traceback.format_exc()) + return False + + def update_ports_list(self): + self.qsfp_ports_list = [] + self.qsfp_dd_ports_list = [] + for x in range(self.PORT_START, self.PORTS_IN_BLOCK): + if (self.check_is_qsfpdd(x)): + self.qsfp_dd_ports_list.append(x) + else: + self.qsfp_ports_list.append(x) + + def get_low_power_mode(self, port_num): + # Check for invalid port_num + + return True + + def set_low_power_mode(self, port_num, lpmode): + # Check for invalid port_num + + return True + + def reset(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + return True + + def get_transceiver_change_event(self, timeout=0): + + start_time = time.time() + current_port_dict = {} + forever = False + + if timeout == 0: + forever = True + elif timeout > 0: + timeout = timeout / float(1000) # Convert to secs + else: + print ("get_transceiver_change_event:Invalid timeout value", timeout) + return False, {} + + end_time = start_time + timeout + if start_time > end_time: + print ('get_transceiver_change_event:' \ + 'time wrap / invalid timeout value', timeout) + + return False, {} # Time wrap or possibly incorrect timeout + + while timeout >= 0: + # Check for OIR events and return updated port_dict + for x in range(self.PORT_START, self.PORTS_IN_BLOCK): + if self.get_presence(x): + current_port_dict[x] = self.SFP_STATUS_INSERTED + else: + current_port_dict[x] = self.SFP_STATUS_REMOVED + if (current_port_dict == self.port_dict): + if forever: + time.sleep(1) + else: + timeout = end_time - time.time() + if timeout >= 1: + time.sleep(1) # We poll at 1 second granularity + else: + if timeout > 0: + time.sleep(timeout) + self.update_ports_list() + return True, {} + else: + # Update reg value + self.update_ports_list() + self.port_dict = current_port_dict + return True, self.port_dict + print ("get_transceiver_change_event: Should not reach here.") + return False, {} + + def _twos_comp(self, num, bits): + try: + if ((num & (1 << (bits - 1))) != 0): + num = num - (1 << bits) + return num + except: + return 0 + + def get_highest_temperature(self): + with open("/tmp/sfp_temp_debug.log", "a") as f: + f.write(f"{time.strftime('%F %T')} enter get_highest_temperature\n") + + highest_temperature = -9999 + + presence_flag = False + read_eeprom_flag = False + temperature_supported_flag = False + temperature_valid_flag = False + + for port in range(self.PORT_START, self.PORT_END + 1): + if port == 65: + continue + try: + present = self.get_presence(port) + with open("/tmp/sfp_temp_debug.log", "a") as f: + f.write(f"port={port} present={present}\n") + + if not present: + continue + + presence_flag = True + + eeprom_path = self._get_port_eeprom_path(port, 0x50) + with open("/tmp/sfp_temp_debug.log", "a") as f: + f.write(f"port={port} eeprom_path={eeprom_path}\n") + + try: + with open(eeprom_path, mode="rb", buffering=0) as eeprom: + read_eeprom_flag = True + + if port in self.qsfp_dd_ports: + offset = 14 + temperature_supported_flag = True + + elif port in self.qsfp_ports: + offset = 22 + temperature_supported_flag = True + + else: + # SFP/SFP28: check A0h byte 92 bit6 before reading A2h temperature. + # bit6 = 1 means Digital Diagnostic Monitoring is implemented. + ddm_raw = self._read_eeprom_specific_bytes(eeprom, 92, 1) + with open("/tmp/sfp_temp_debug.log", "a") as f: + f.write(f"port={port} DDM support byte={ddm_raw}\n") + + if ddm_raw is None or len(ddm_raw) != 1: + return 9999 + + ddm_type = int(ddm_raw[0], 16) + if (ddm_type & 0x40) == 0: + # DDM is not supported by this SFP/SFP28 module. + # Skip this port instead of treating it as a temperature fault. + with open("/tmp/sfp_temp_debug.log", "a") as f: + f.write(f"port={port} DDM not supported, skip temperature\n") + continue + + offset = 256 + 96 + temperature_supported_flag = True + + with open("/tmp/sfp_temp_debug.log", "a") as f: + f.write(f"port={port} temp_offset={offset}\n") + + eeprom_raw = self._read_eeprom_specific_bytes(eeprom, offset, 2) + with open("/tmp/sfp_temp_debug.log", "a") as f: + f.write(f"port={port} eeprom_raw={eeprom_raw}\n") + + if eeprom_raw is None or len(eeprom_raw) != 2: + return 9999 + + msb = int(eeprom_raw[0], 16) + lsb = int(eeprom_raw[1], 16) + + result = (msb << 8) | (lsb & 0xff) + result = self._twos_comp(result, 16) + result = float(result / 256.0) + + with open("/tmp/sfp_temp_debug.log", "a") as f: + f.write(f"port={port} temp={result}\n") + + if -50 <= result <= 200: + temperature_valid_flag = True + highest_temperature = max(highest_temperature, result) + else: + return 8000 + + except Exception as e: + with open("/tmp/sfp_temp_debug.log", "a") as f: + f.write(f"port={port} inner_exception={repr(e)}\n") + continue + + except Exception as e: + with open("/tmp/sfp_temp_debug.log", "a") as f: + f.write(f"port={port} outer_exception={repr(e)}\n") + continue + + # all port not presence + if not presence_flag: + highest_temperature = -10000 + elif not read_eeprom_flag: + # At least one transceiver is present, but all EEPROM reads failed. + highest_temperature = 9998 + elif not temperature_supported_flag: + # EEPROM is readable, but no present transceiver supports temperature monitoring. + highest_temperature = -20000 + elif not temperature_valid_flag: + # Temperature monitoring is supported, but no valid temperature was read. + highest_temperature = 8000 + + highest_temperature = round(highest_temperature, 2) + + with open("/tmp/sfp_temp_debug.log", "a") as f: + f.write(f"{time.strftime('%F %T')} final highest={highest_temperature}\n") + + return highest_temperature diff --git a/device/micas/x86_64-micas_m2-w6951-64hc-cp-r0/plugins/ssd_util.py b/device/micas/x86_64-micas_m2-w6951-64hc-cp-r0/plugins/ssd_util.py new file mode 100644 index 00000000000..74ac0921ddf --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6951-64hc-cp-r0/plugins/ssd_util.py @@ -0,0 +1,319 @@ +# +# ssd_util.py +# +# Generic implementation of the SSD health API +# SSD models supported: +# - InnoDisk +# - StorFly +# - Virtium + +try: + import re + import os + import subprocess + from sonic_platform_base.sonic_storage.storage_base import StorageBase +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + +SMARTCTL = "smartctl {} -a" +INNODISK = "iSmart -d {}" +VIRTIUM = "SmartCmd -m {}" +DISK_LIST_CMD = "fdisk -l -o Device" +DISK_FREE_CMD = "df -h" +MOUNT_CMD = "mount" + +NOT_AVAILABLE = "N/A" +PE_CYCLE = 3000 +FAIL_PERCENT = 95 + +# Set Vendor Specific IDs +INNODISK_HEALTH_ID = 169 +INNODISK_TEMPERATURE_ID = 194 + +class SsdUtil(StorageBase): + """ + Generic implementation of the SSD health API + """ + model = NOT_AVAILABLE + serial = NOT_AVAILABLE + firmware = NOT_AVAILABLE + temperature = NOT_AVAILABLE + health = NOT_AVAILABLE + remaining_life = NOT_AVAILABLE + sata_rate = NOT_AVAILABLE + ssd_info = NOT_AVAILABLE + vendor_ssd_info = NOT_AVAILABLE + + def __init__(self, diskdev): + self.vendor_ssd_utility = { + "Generic" : { "utility" : SMARTCTL, "parser" : self.parse_generic_ssd_info }, + "InnoDisk" : { "utility" : INNODISK, "parser" : self.parse_innodisk_info }, + "M.2" : { "utility" : INNODISK, "parser" : self.parse_innodisk_info }, + "StorFly" : { "utility" : VIRTIUM, "parser" : self.parse_virtium_info }, + "Virtium" : { "utility" : VIRTIUM, "parser" : self.parse_virtium_info } + } + + """ + The dict model_attr keys relate the vendors + LITEON : "ER2-GD","AF2MA31DTDLT" + Intel : "SSDSCKKB" + SMI : "SM619GXC" + samsung: "MZNLH" + ADATA : "IM2S3134N" + """ + self.model_attr = { + "ER2-GD" : { "temperature" : "\n190\s+(.+?)\n", "remainingLife" : "\n202\s+(.+?)\n" }, + "ER3-GD" : { "temperature" : "\n190\s+(.+?)\n", "remainingLife" : "\n202\s+(.+?)\n" }, + "AF2MA31DTDLT" : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n202\s+(.+?)\n" }, + "SSDSCK" : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n233\s+(.+?)\n" }, + "SM619GXC" : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n169\s+(.+?)\n" }, + "MZNLH" : { "temperature" : "\n190\s+(.+?)\n", "remainingLife" : "\n245\s+(.+?)\n" }, + "IM2S3134N" : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n231\s+(.+?)\n" }, + "MTFDDAV240TCB-1AR1ZABAA" : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n202\s+(.+?)\n" } + } + + self.key_list = list(self.model_attr.keys()) + self.attr_info_rule = "[\s\S]*SMART Attributes Data Structure revision number: 1|SMART Error Log Version[\s\S]*" + self.dev = diskdev + # Generic part + self.fetch_generic_ssd_info(diskdev) + self.parse_generic_ssd_info() + self.fetch_vendor_ssd_info(diskdev, "Generic") + + # Known vendor part + if self.model: + model_short = self.model.split()[0] + if model_short in self.vendor_ssd_utility: + self.fetch_vendor_ssd_info(diskdev, model_short) + self.parse_vendor_ssd_info(model_short) + else: + # No handler registered for this disk model + pass + else: + # Failed to get disk model + self.model = "Unknown" + + def _execute_shell(self, cmd): + process = subprocess.Popen(cmd.split(), universal_newlines=True, stdout=subprocess.PIPE) + output, error = process.communicate() + exit_code = process.returncode + if exit_code: + return None + return output + + def _parse_re(self, pattern, buffer): + res_list = re.findall(pattern, str(buffer)) + return res_list[0] if res_list else NOT_AVAILABLE + + def fetch_generic_ssd_info(self, diskdev): + self.ssd_info = self._execute_shell(self.vendor_ssd_utility["Generic"]["utility"].format(diskdev)) + + # Health and temperature values may be overwritten with vendor specific data + def parse_generic_ssd_info(self): + if "nvme" in self.dev: + self.model = self._parse_re('Model Number:\s*(.+?)\n', self.ssd_info) + + health_raw = self._parse_re('Percentage Used\s*(.+?)\n', self.ssd_info) + if health_raw == NOT_AVAILABLE: + self.health = NOT_AVAILABLE + else: + health_raw = health_raw.split()[-1] + self.health = 100 - float(health_raw.strip('%')) + + temp_raw = self._parse_re('Temperature\s*(.+?)\n', self.ssd_info) + if temp_raw == NOT_AVAILABLE: + self.temperature = NOT_AVAILABLE + else: + temp_raw = temp_raw.split()[-2] + self.temperature = float(temp_raw) + else: + self.model = self._parse_re('Device Model:\s*(.+?)\n', self.ssd_info) + model_key = "" + for key in self.key_list: + if re.search(key, self.model): + model_key = key + break + if model_key != "": + self.remaining_life = self._parse_re(self.model_attr[model_key]["remainingLife"], re.sub(self.attr_info_rule,"",self.ssd_info)).split()[2] + self.temperature = self._parse_re(self.model_attr[model_key]["temperature"], re.sub(self.attr_info_rule,"",self.ssd_info)).split()[8] + self.health = self.remaining_life + # Get the LITEON ssd health value by (PE CYCLE - AVG ERASE CYCLE )/(PE CYCLE) + if model_key in ["ER2-GD", "AF2MA31DTDLT"]: + avg_erase = int(self._parse_re('\n173\s+(.+?)\n' ,re.sub(self.attr_info_rule,"",self.ssd_info)).split()[-1]) + self.health = int(round((PE_CYCLE - avg_erase)/PE_CYCLE*100,0)) + if self.remaining_life != NOT_AVAILABLE and int(self.remaining_life) < FAIL_PERCENT: + self.remaining_life = "Fail" + self.sata_rate = self._parse_re('SATA Version is:.*current: (.+?)\)\n', self.ssd_info) + self.serial = self._parse_re('Serial Number:\s*(.+?)\n', self.ssd_info) + self.firmware = self._parse_re('Firmware Version:\s*(.+?)\n', self.ssd_info) + + def parse_innodisk_info(self): + if self.vendor_ssd_info: + self.health = self._parse_re('Health:\s*(.+?)%', self.vendor_ssd_info) + self.temperature = self._parse_re('Temperature\s*\[\s*(.+?)\]', self.vendor_ssd_info) + else: + if self.health == NOT_AVAILABLE: + health_raw = self.parse_id_number(INNODISK_HEALTH_ID) + self.health = health_raw.split()[-1] + if self.temperature == NOT_AVAILABLE: + temp_raw = self.parse_id_number(INNODISK_TEMPERATURE_ID) + self.temperature = temp_raw.split()[-6] + + def parse_virtium_info(self): + if self.vendor_ssd_info: + self.temperature = self._parse_re('Temperature_Celsius\s*\d*\s*(\d+?)\s+', self.vendor_ssd_info) + nand_endurance = self._parse_re('NAND_Endurance\s*\d*\s*(\d+?)\s+', self.vendor_ssd_info) + avg_erase_count = self._parse_re('Average_Erase_Count\s*\d*\s*(\d+?)\s+', self.vendor_ssd_info) + try: + self.health = 100 - (float(avg_erase_count) * 100 / float(nand_endurance)) + except (ValueError, ZeroDivisionError): + # Invalid avg_erase_count or nand_endurance. + pass + + def fetch_vendor_ssd_info(self, diskdev, model): + self.vendor_ssd_info = self._execute_shell(self.vendor_ssd_utility[model]["utility"].format(diskdev)) + + def parse_vendor_ssd_info(self, model): + self.vendor_ssd_utility[model]["parser"]() + + def check_readonly2(self, partition, filesystem): + # parse mount cmd output info + mount_info = self._execute_shell(MOUNT_CMD) + for line in mount_info.split('\n'): + column_list = line.split() + if line == '': + continue + if column_list[0] == partition and column_list[2] == filesystem: + if column_list[5].split(',')[0][1:] == "ro": + return partition + else: + return NOT_AVAILABLE + return NOT_AVAILABLE + + def check_readonly(self, partition, filesystem): + ret = os.access(filesystem, os.W_OK) + if ret == False: + return partition + else: + return NOT_AVAILABLE + + def get_health(self): + """ + Retrieves current disk health in percentages + + Returns: + A float number of current ssd health + e.g. 83.5 + """ + if self.health == 'N/A': + return "NA" + else: + return float(self.health) + + def get_temperature(self): + """ + Retrieves current disk temperature in Celsius + + Returns: + A float number of current temperature in Celsius + e.g. 40.1 + """ + if self.temperature == 'N/A': + return 'NA' + else: + return float(self.temperature) + + def get_model(self): + """ + Retrieves model for the given disk device + + Returns: + A string holding disk model as provided by the manufacturer + """ + return self.model + + def get_firmware(self): + """ + Retrieves firmware version for the given disk device + + Returns: + A string holding disk firmware version as provided by the manufacturer + """ + return self.firmware + + def get_serial(self): + """ + Retrieves serial number for the given disk device + + Returns: + A string holding disk serial number as provided by the manufacturer + """ + return self.serial + def get_sata_rate(self): + """ + Retrieves SATA rate for the given disk device + Returns: + A string holding current SATA rate as provided by the manufacturer + """ + return self.sata_rate + def get_remaining_life(self): + """ + Retrieves remaining life for the given disk device + Returns: + A string holding disk remaining life as provided by the manufacturer + """ + return self.remaining_life + def get_vendor_output(self): + """ + Retrieves vendor specific data for the given disk device + + Returns: + A string holding some vendor specific disk information + """ + return self.vendor_ssd_info + + def parse_id_number(self, id): + return self._parse_re('{}\s*(.+?)\n'.format(id), self.ssd_info) + + def get_readonly_partition(self): + """ + Check the partition mount filesystem is readonly status,then output the result. + Returns: + The readonly partition list + """ + + ro_partition_list = [] + partition_list = [] + + # parse fdisk cmd output info + disk_info = self._execute_shell(DISK_LIST_CMD) + begin_flag = False + for line in disk_info.split('\n'): + if line == "Device": + begin_flag = True + continue + if begin_flag: + if line != "": + partition_list.append(line) + else: + break + + # parse df cmd output info + disk_free = self._execute_shell(DISK_FREE_CMD) + disk_dict = {} + line_num = 0 + for line in disk_free.split('\n'): + line_num = line_num + 1 + if line_num == 1 or line == "": + continue + column_list = line.split() + disk_dict[column_list[0]] = column_list[5] + + # get partition which is readonly + for partition in partition_list: + if partition in disk_dict: + ret = self.check_readonly(partition, disk_dict[partition]) + if (ret != NOT_AVAILABLE): + ro_partition_list.append(ret) + + return ro_partition_list diff --git a/device/micas/x86_64-micas_m2-w6951-64hc-cp-r0/pmon_daemon_control.json b/device/micas/x86_64-micas_m2-w6951-64hc-cp-r0/pmon_daemon_control.json new file mode 100644 index 00000000000..6716a121a9b --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6951-64hc-cp-r0/pmon_daemon_control.json @@ -0,0 +1,4 @@ +{ + "skip_ledd": true, + "include_sensormond": true +} diff --git a/device/micas/x86_64-micas_m2-w6951-64hc-cp-r0/postinit_cmd_file.soc b/device/micas/x86_64-micas_m2-w6951-64hc-cp-r0/postinit_cmd_file.soc new file mode 100644 index 00000000000..0f7f6bfea0c --- /dev/null +++ b/device/micas/x86_64-micas_m2-w6951-64hc-cp-r0/postinit_cmd_file.soc @@ -0,0 +1,4 @@ +led load /usr/share/sonic/platform/custom_led.bin +led auto on +led start +linkscan SwPortBitMap=xe,ce,cd,d3c \ No newline at end of file diff --git a/device/micas/x86_64-micas_m2-w6951-64hc-cp-r0/system_health_monitoring_config.json b/device/micas/x86_64-micas_m2-w6951-64hc-cp-r0/system_health_monitoring_config.json new file mode 100644 index 00000000000..e69de29bb2d diff --git a/device/nexthop/arm64-nexthop_b27-r0/70-usb-network.rules b/device/nexthop/arm64-nexthop_b27-r0/70-usb-network.rules new file mode 100644 index 00000000000..d5bf6cd33be --- /dev/null +++ b/device/nexthop/arm64-nexthop_b27-r0/70-usb-network.rules @@ -0,0 +1,6 @@ +# Aspeed BMC USB Network Gadget Interface Renaming Rule +# Renames USB NCM gadget interface from usb0 to bmc0 for consistent naming + +# Match USB NCM gadget interface with BMC MAC address and rename to bmc0 +SUBSYSTEM=="net", ACTION=="add", DRIVERS=="?*", ATTR{address}=="02:00:00:00:00:01", NAME="bmc0" + diff --git a/device/nexthop/arm64-nexthop_b27-r0/99-switchCpu.rules b/device/nexthop/arm64-nexthop_b27-r0/99-switchCpu.rules new file mode 100644 index 00000000000..fc27893bf4b --- /dev/null +++ b/device/nexthop/arm64-nexthop_b27-r0/99-switchCpu.rules @@ -0,0 +1,3 @@ +# Nexthop B27 BMC: Map host CPU console /dev/ttyS1 to common alias /dev/ttySwitchCpu0 +SUBSYSTEM=="tty", KERNEL=="ttyS1", SYMLINK+="ttySwitchCpu0", MODE="0666" + diff --git a/device/nexthop/arm64-nexthop_b27-r0/asic.conf b/device/nexthop/arm64-nexthop_b27-r0/asic.conf new file mode 100644 index 00000000000..67ca94b0a77 --- /dev/null +++ b/device/nexthop/arm64-nexthop_b27-r0/asic.conf @@ -0,0 +1,2 @@ +# BMC's don't have a switch asic but SONIC assumes NUM_ASIC to be atleast 1 +NUM_ASIC=1 diff --git a/device/nexthop/arm64-nexthop_b27-r0/default_sku b/device/nexthop/arm64-nexthop_b27-r0/default_sku new file mode 100644 index 00000000000..4e1f841b612 --- /dev/null +++ b/device/nexthop/arm64-nexthop_b27-r0/default_sku @@ -0,0 +1 @@ +NH-B27 empty diff --git a/device/nexthop/arm64-nexthop_b27-r0/installer.conf b/device/nexthop/arm64-nexthop_b27-r0/installer.conf new file mode 100644 index 00000000000..8014118dc80 --- /dev/null +++ b/device/nexthop/arm64-nexthop_b27-r0/installer.conf @@ -0,0 +1,15 @@ +# Console configuration for AST2720 platform +# CONSOLE_DEV=12 means ttyS12 +CONSOLE_DEV=12 +CONSOLE_SPEED=115200 + +# Early console for debugging (UART12 on AST2720) +EARLYCON="earlycon=uart8250,mmio32,0x14c33b00" + +# Variable log size (MB) +VAR_LOG_SIZE=512 + +# Additional kernel command line arguments +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="" + +bootconf="nexthop-b27-r0" diff --git a/device/nexthop/arm64-nexthop_b27-r0/platform.json b/device/nexthop/arm64-nexthop_b27-r0/platform.json new file mode 100644 index 00000000000..c07b0491c95 --- /dev/null +++ b/device/nexthop/arm64-nexthop_b27-r0/platform.json @@ -0,0 +1,20 @@ +{ + "chassis": { + "name": "Nexthop BMC Card", + "thermal_manager": false, + "status_led": { + "controllable": true, + "colors": ["green", "amber", "off"] + }, + "components": [ + { + "name": "BIOS" + } + ], + "fans": [], + "psus": [], + "thermals": [], + "sfps": [] + }, + "interfaces": {} +} diff --git a/device/nexthop/arm64-nexthop_b27-r0/platform_asic b/device/nexthop/arm64-nexthop_b27-r0/platform_asic new file mode 100644 index 00000000000..708a833cb62 --- /dev/null +++ b/device/nexthop/arm64-nexthop_b27-r0/platform_asic @@ -0,0 +1 @@ +aspeed \ No newline at end of file diff --git a/device/nexthop/arm64-nexthop_b27-r0/platform_components.json b/device/nexthop/arm64-nexthop_b27-r0/platform_components.json new file mode 100644 index 00000000000..1596cd59dc5 --- /dev/null +++ b/device/nexthop/arm64-nexthop_b27-r0/platform_components.json @@ -0,0 +1,9 @@ +{ + "chassis": { + "NH-B27-BMC": { + "component": { + "BIOS": {} + } + } + } +} diff --git a/device/nexthop/arm64-nexthop_b27-r0/platform_env.conf b/device/nexthop/arm64-nexthop_b27-r0/platform_env.conf new file mode 100644 index 00000000000..b7947ba31fb --- /dev/null +++ b/device/nexthop/arm64-nexthop_b27-r0/platform_env.conf @@ -0,0 +1,2 @@ +# BMC platform environment +switch_bmc=1 diff --git a/device/nexthop/arm64-nexthop_b27-r0/pmon_daemon_control.json b/device/nexthop/arm64-nexthop_b27-r0/pmon_daemon_control.json new file mode 100644 index 00000000000..a358e22d8b6 --- /dev/null +++ b/device/nexthop/arm64-nexthop_b27-r0/pmon_daemon_control.json @@ -0,0 +1,17 @@ +{ + "skip_thermalctld": false, + "skip_ledd": true, + "skip_xcvrd": true, + "skip_psud": true, + "skip_syseepromd": false, + "skip_pcied": true, + "skip_chassisd": true, + "skip_chassis_db_init": false, + "skip_fancontrol": true, + "include_sensormond": false, + "thermalctld": { + "thermal_monitor_initial_interval": 5, + "thermal_monitor_update_interval": 60, + "thermal_monitor_update_elapsed_threshold": 30 + } +} diff --git a/device/nexthop/arm64-nexthop_b27-r0/switch_cpu_console.conf b/device/nexthop/arm64-nexthop_b27-r0/switch_cpu_console.conf new file mode 100644 index 00000000000..c660aede825 --- /dev/null +++ b/device/nexthop/arm64-nexthop_b27-r0/switch_cpu_console.conf @@ -0,0 +1,12 @@ +# Console configuration for Nexthop B27 BMC +# This file defines console port settings for the switch CPU console + +# Baud rate for the switch CPU console (default: 115200) +CONSOLE_BAUD_RATE=115200 + +# Flow control: 0=disabled, 1=enabled (default: 0) +CONSOLE_FLOW_CONTROL=0 + +# Remote device name shown in consutil +CONSOLE_REMOTE_DEVICE=SwitchCpu + diff --git a/device/nexthop/arm64-nexthop_b27-r0/system_health_monitoring_config.json b/device/nexthop/arm64-nexthop_b27-r0/system_health_monitoring_config.json new file mode 100644 index 00000000000..59fb8ad3be7 --- /dev/null +++ b/device/nexthop/arm64-nexthop_b27-r0/system_health_monitoring_config.json @@ -0,0 +1,12 @@ +{ + "services_to_ignore": [], + "devices_to_ignore": ["psu", "fan", "asic"], + "user_defined_checkers": [], + "polling_interval": 300, + "led_color": { + "fault": "amber", + "normal": "green", + "booting": "amber_blink" + } +} + diff --git a/device/nexthop/arm64-nexthop_b27-r0/udevprefix.conf b/device/nexthop/arm64-nexthop_b27-r0/udevprefix.conf new file mode 100644 index 00000000000..af15b82b629 --- /dev/null +++ b/device/nexthop/arm64-nexthop_b27-r0/udevprefix.conf @@ -0,0 +1,2 @@ +ttySwitchCpu + diff --git a/device/nexthop/common/black_mamba/pcie-variables.yaml b/device/nexthop/common/black_mamba/pcie-variables.yaml new file mode 100644 index 00000000000..a5c7f6c3b58 --- /dev/null +++ b/device/nexthop/common/black_mamba/pcie-variables.yaml @@ -0,0 +1,48 @@ +# Commands to retrieve the bus number for each PCIe device. +# Context: PCIe bus numbers are non-deterministic and can be looked up +# from the root ports after boot. +# +# Strings in pcie.yaml.j2 matching "{{}}" will be replaced with +# the result of the lookup_command, to generate /usr/share/sonic/platform/pcie.yaml. + +- name: "nvme_bus" + lookup_command: "setpci -s 00:01.1 0x19.b" + +- name: "mgmt_nic_bus" + lookup_command: "setpci -s 00:01.2 0x19.b" + +- name: "cpu_card_fpga_bus" + lookup_command: "setpci -s 00:01.3 0x19.b" + +- name: "switchcard_fpga_0_bus" + lookup_command: "setpci -s 00:01.4 0x19.b" + +- name: "switchcard_fpga_1_bus" + lookup_command: "setpci -s 00:01.5 0x19.b" + +- name: "asic_0_bus" + lookup_command: "setpci -s 00:02.1 0x19.b" + +- name: "asic_1_bus" + lookup_command: "setpci -s 00:02.2 0x19.b" + +- name: "amd_soc_group_0_bus" + lookup_command: "setpci -s 00:08.1 0x19.b" + +# Commands to retrieve the PCIe address for each device. +# Strings in pddf-device.json.j2 matching "{{}}"" will be replaced with +# the result of the lookup_command, to generate /usr/share/sonic/platform/pddf/pddf-device.json. + +- name: "cpu_card_fpga_bdf" + lookup_command: "setpci -s 00:01.3 0x19.b | xargs printf '0000:%s:00.0'" + +- name: "switchcard_fpga_0_bdf" + lookup_command: "setpci -s 00:01.4 0x19.b | xargs printf '0000:%s:00.0'" + +- name: "switchcard_fpga_1_bdf" + lookup_command: "setpci -s 00:01.5 0x19.b | xargs printf '0000:%s:00.0'" + +# Commands to retrieve sysfs path for specific device. + +- name: "hwmon_cpu_sysfs_path" + lookup_command: "readlink -f /sys/devices/pci0000:00/0000:00:18.3/hwmon/hwmon*" \ No newline at end of file diff --git a/device/nexthop/common/bmc/bmc.json b/device/nexthop/common/bmc/bmc.json new file mode 100644 index 00000000000..b47402e396b --- /dev/null +++ b/device/nexthop/common/bmc/bmc.json @@ -0,0 +1,6 @@ +{ + "bmc_if_name": "usb0", + "bmc_if_addr": "192.168.100.2", + "bmc_addr": "192.168.100.1", + "bmc_net_mask": "255.255.255.0" +} diff --git a/device/nexthop/common/context_config.json b/device/nexthop/common/context_config.json new file mode 100644 index 00000000000..b1a97fbe6e9 --- /dev/null +++ b/device/nexthop/common/context_config.json @@ -0,0 +1,17 @@ +{ + "CONTEXTS": [ + { + "guid": 0, + "name": "syncd", + "dbAsic": "ASIC_DB", + "dbCounters": "COUNTERS_DB", + "dbFlex": "FLEX_COUNTER_DB", + "dbState": "STATE_DB", + "zmq_enable": false, + "zmq_endpoint": "tcp://127.0.0.1:5555", + "zmq_ntf_endpoint": "tcp://127.0.0.1:5556", + "switches": [{ "index": 0, "hwinfo": "" }] + } + ] +} + diff --git a/device/nexthop/common/komodo/pcie-variables.yaml b/device/nexthop/common/komodo/pcie-variables.yaml new file mode 100644 index 00000000000..08045abbde0 --- /dev/null +++ b/device/nexthop/common/komodo/pcie-variables.yaml @@ -0,0 +1,42 @@ +# Commands to retrieve the bus number for each PCIe device. +# Context: PCIe bus numbers are non-deterministic and can be looked up +# from the root ports after boot. +# +# Strings in pcie.yaml.j2 matching "{{}}" will be replaced with +# the result of the lookup_command, to generate /usr/share/sonic/platform/pcie.yaml. + +- name: "asic_bus" + lookup_command: "setpci -s 00:01.2 0x19.b" + +- name: "cpu_card_fpga_bus" + lookup_command: "setpci -s 00:02.1 0x19.b" + +- name: "switchcard_fpga_bus" + lookup_command: "setpci -s 00:02.2 0x19.b" + +- name: "nvme_bus" + lookup_command: "setpci -s 00:02.4 0x19.b" + +- name: "amd_soc_group_1_bus" + lookup_command: "setpci -s 00:08.1 0x19.b" + +- name: "amd_soc_group_2_bus" + lookup_command: "setpci -s 00:08.2 0x19.b" + +- name: "amd_soc_group_3_bus" + lookup_command: "setpci -s 00:08.3 0x19.b" + +# Commands to retrieve the PCIe address for each device. +# Strings in pddf-device.json.j2 matching "{{}}"" will be replaced with +# the result of the lookup_command, to generate /usr/share/sonic/platform/pddf/pddf-device.json. + +- name: "cpu_card_fpga_bdf" + lookup_command: "setpci -s 00:02.1 0x19.b | xargs printf '0000:%s:00.0'" + +- name: "switchcard_fpga_bdf" + lookup_command: "setpci -s 00:02.2 0x19.b | xargs printf '0000:%s:00.0'" + +# Commands to retrieve sysfs path for specific device. + +- name: "hwmon_cpu_sysfs_path" + lookup_command: "readlink -f /sys/devices/pci0000:00/0000:00:18.3/hwmon/hwmon*" diff --git a/device/nexthop/common/pmon_daemon_control.json b/device/nexthop/common/pmon_daemon_control.json index c127db9ad6f..1b509fd765b 100644 --- a/device/nexthop/common/pmon_daemon_control.json +++ b/device/nexthop/common/pmon_daemon_control.json @@ -5,5 +5,9 @@ "thermalctld": { "thermal_monitor_update_interval": 10, "thermal_monitor_update_elapsed_threshold": 9 + }, + "xcvrd": { + "dom_update_interval": 30, + "dom_temperature_poll_interval": 5 } } diff --git a/device/nexthop/x86_64-nexthop_4010-r0/NH-4010-128x400G-2x25G/BALANCED/buffers_defaults_t1.j2 b/device/nexthop/x86_64-nexthop_4010-r0/NH-4010-128x400G-2x25G/BALANCED/buffers_defaults_t1.j2 index 934fdfa48c9..bf0c0499eee 100644 --- a/device/nexthop/x86_64-nexthop_4010-r0/NH-4010-128x400G-2x25G/BALANCED/buffers_defaults_t1.j2 +++ b/device/nexthop/x86_64-nexthop_4010-r0/NH-4010-128x400G-2x25G/BALANCED/buffers_defaults_t1.j2 @@ -4,13 +4,13 @@ {%- macro generate_buffer_pool_and_profiles() %} "BUFFER_POOL": { "ingress_lossless_pool": { - "size": "166115492", + "size": "165558216", "type": "ingress", "mode": "dynamic", - "xoff": "29423360" + "xoff": "19994880" }, "egress_lossless_pool": { - "size": "166115492", + "size": "165558216", "type": "egress", "mode": "dynamic" } @@ -19,7 +19,7 @@ "ingress_lossy_profile": { "pool": "ingress_lossless_pool", "size": "0", - "static_th": "167546528" + "static_th": "82434938" }, "egress_lossy_profile": { "pool": "egress_lossless_pool", @@ -29,7 +29,7 @@ "egress_lossless_profile": { "pool": "egress_lossless_pool", "size": "0", - "static_th": "167546528" + "static_th": "82434938" } }, {%- endmacro %} diff --git a/device/nexthop/x86_64-nexthop_4010-r0/NH-4010-256x200G-2x25G/BALANCED/buffers_defaults_t1.j2 b/device/nexthop/x86_64-nexthop_4010-r0/NH-4010-256x200G-2x25G/BALANCED/buffers_defaults_t1.j2 index 934fdfa48c9..356be2dc379 100644 --- a/device/nexthop/x86_64-nexthop_4010-r0/NH-4010-256x200G-2x25G/BALANCED/buffers_defaults_t1.j2 +++ b/device/nexthop/x86_64-nexthop_4010-r0/NH-4010-256x200G-2x25G/BALANCED/buffers_defaults_t1.j2 @@ -4,13 +4,13 @@ {%- macro generate_buffer_pool_and_profiles() %} "BUFFER_POOL": { "ingress_lossless_pool": { - "size": "166115492", + "size": "165558216", "type": "ingress", "mode": "dynamic", - "xoff": "29423360" + "xoff": "21652992" }, "egress_lossless_pool": { - "size": "166115492", + "size": "165558216", "type": "egress", "mode": "dynamic" } @@ -19,7 +19,7 @@ "ingress_lossy_profile": { "pool": "ingress_lossless_pool", "size": "0", - "static_th": "167546528" + "static_th": "82434938" }, "egress_lossy_profile": { "pool": "egress_lossless_pool", @@ -29,7 +29,7 @@ "egress_lossless_profile": { "pool": "egress_lossless_pool", "size": "0", - "static_th": "167546528" + "static_th": "82434938" } }, {%- endmacro %} diff --git a/device/nexthop/x86_64-nexthop_4010-r0/NH-4010/BALANCED/buffers_defaults_t1.j2 b/device/nexthop/x86_64-nexthop_4010-r0/NH-4010/BALANCED/buffers_defaults_t1.j2 index d39bfa00657..e5f2771e884 100644 --- a/device/nexthop/x86_64-nexthop_4010-r0/NH-4010/BALANCED/buffers_defaults_t1.j2 +++ b/device/nexthop/x86_64-nexthop_4010-r0/NH-4010/BALANCED/buffers_defaults_t1.j2 @@ -4,13 +4,13 @@ {%- macro generate_buffer_pool_and_profiles() %} "BUFFER_POOL": { "ingress_lossless_pool": { - "size": "166115492", + "size": "165558216", "type": "ingress", "mode": "dynamic", - "xoff": "29423360" + "xoff": "19312128" }, "egress_lossless_pool": { - "size": "166115492", + "size": "165558216", "type": "egress", "mode": "dynamic" } @@ -19,7 +19,7 @@ "ingress_lossy_profile": { "pool": "ingress_lossless_pool", "size": "0", - "static_th": "167546528" + "static_th": "82434938" }, "egress_lossy_profile": { "pool": "egress_lossless_pool", @@ -29,7 +29,7 @@ "egress_lossless_profile": { "pool": "egress_lossless_pool", "size": "0", - "static_th": "167546528" + "static_th": "82434938" } }, {%- endmacro %} diff --git a/device/nexthop/x86_64-nexthop_4010-r0/installer.conf b/device/nexthop/x86_64-nexthop_4010-r0/installer.conf new file mode 100644 index 00000000000..e172a88fc88 --- /dev/null +++ b/device/nexthop/x86_64-nexthop_4010-r0/installer.conf @@ -0,0 +1 @@ +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="crashkernel=512M" diff --git a/device/nexthop/x86_64-nexthop_4010-r0/pcie-variables.yaml b/device/nexthop/x86_64-nexthop_4010-r0/pcie-variables.yaml deleted file mode 100644 index 08045abbde0..00000000000 --- a/device/nexthop/x86_64-nexthop_4010-r0/pcie-variables.yaml +++ /dev/null @@ -1,42 +0,0 @@ -# Commands to retrieve the bus number for each PCIe device. -# Context: PCIe bus numbers are non-deterministic and can be looked up -# from the root ports after boot. -# -# Strings in pcie.yaml.j2 matching "{{}}" will be replaced with -# the result of the lookup_command, to generate /usr/share/sonic/platform/pcie.yaml. - -- name: "asic_bus" - lookup_command: "setpci -s 00:01.2 0x19.b" - -- name: "cpu_card_fpga_bus" - lookup_command: "setpci -s 00:02.1 0x19.b" - -- name: "switchcard_fpga_bus" - lookup_command: "setpci -s 00:02.2 0x19.b" - -- name: "nvme_bus" - lookup_command: "setpci -s 00:02.4 0x19.b" - -- name: "amd_soc_group_1_bus" - lookup_command: "setpci -s 00:08.1 0x19.b" - -- name: "amd_soc_group_2_bus" - lookup_command: "setpci -s 00:08.2 0x19.b" - -- name: "amd_soc_group_3_bus" - lookup_command: "setpci -s 00:08.3 0x19.b" - -# Commands to retrieve the PCIe address for each device. -# Strings in pddf-device.json.j2 matching "{{}}"" will be replaced with -# the result of the lookup_command, to generate /usr/share/sonic/platform/pddf/pddf-device.json. - -- name: "cpu_card_fpga_bdf" - lookup_command: "setpci -s 00:02.1 0x19.b | xargs printf '0000:%s:00.0'" - -- name: "switchcard_fpga_bdf" - lookup_command: "setpci -s 00:02.2 0x19.b | xargs printf '0000:%s:00.0'" - -# Commands to retrieve sysfs path for specific device. - -- name: "hwmon_cpu_sysfs_path" - lookup_command: "readlink -f /sys/devices/pci0000:00/0000:00:18.3/hwmon/hwmon*" diff --git a/device/nexthop/x86_64-nexthop_4010-r0/pcie-variables.yaml b/device/nexthop/x86_64-nexthop_4010-r0/pcie-variables.yaml new file mode 120000 index 00000000000..8c5ff2b49ab --- /dev/null +++ b/device/nexthop/x86_64-nexthop_4010-r0/pcie-variables.yaml @@ -0,0 +1 @@ +../common/komodo/pcie-variables.yaml \ No newline at end of file diff --git a/device/nexthop/x86_64-nexthop_4010-r0/pddf/pd-plugin.json b/device/nexthop/x86_64-nexthop_4010-r0/pddf/pd-plugin.json index a85140b2a14..cfe34e1cd2a 100644 --- a/device/nexthop/x86_64-nexthop_4010-r0/pddf/pd-plugin.json +++ b/device/nexthop/x86_64-nexthop_4010-r0/pddf/pd-plugin.json @@ -1,4 +1,172 @@ { + "DPM": { + "cpu_card": { + "type": "adm1266", + "dpm": "DPM1", + "dpm_signal_to_fault_cause": [ + { + "pdio_mask": "0xC002", + "gpio_mask": "0x0000", + "pdio_value": "0x4000", + "gpio_value": "0x0000", + "hw_cause": "THERMTRIP_L", + "hw_desc": "CPU exceeded Tdie temperature threshold", + "reboot_cause": "REBOOT_CAUSE_THERMAL_OVERLOAD_CPU" + }, + { + "pdio_mask": "0xC002", + "gpio_mask": "0x0000", + "pdio_value": "0x8000", + "gpio_value": "0x0000", + "hw_cause": "CPU_PWR_CYC_REQ", + "hw_desc": "CPU requested power cycle", + "reboot_cause": "REBOOT_CAUSE_POWER_LOSS" + }, + { + "pdio_mask": "0xC002", + "gpio_mask": "0x0000", + "pdio_value": "0xC000", + "gpio_value": "0x0000", + "hw_cause": "BMC_PWR_CYC_REQ", + "hw_desc": "BMC requested power cycle", + "reboot_cause": "REBOOT_CAUSE_POWER_LOSS" + }, + { + "pdio_mask": "0xC002", + "gpio_mask": "0x0000", + "pdio_value": "0x0002", + "gpio_value": "0x0000", + "hw_cause": "FPGA_PWR_CYC_REQ", + "hw_desc": "FPGA requested power cycle", + "reboot_cause": "REBOOT_CAUSE_POWER_LOSS" + }, + { + "pdio_mask": "0xC002", + "gpio_mask": "0x0000", + "pdio_value": "0x4002", + "gpio_value": "0x0000", + "hw_cause": "SWITCH_CARD_CP_PWR_BAD", + "hw_desc": "Switch card control plane power failure", + "reboot_cause": "REBOOT_CAUSE_HARDWARE_OTHER" + } + ], + "pin_to_name": { + "VH1": "POS12V", + "VH2": "POS5V0", + "VH4": "POS5V0_S0", + "VP1": "POS1V0_A7", + "VP2": "POS1V8_V7", + "VP3": "POS3V3", + "VP4": "POS1V0", + "VP5": "POS1V2_A7", + "VP6": "POS0V75_S5", + "VP7": "POS1V8_S5", + "VP8": "POS3V3_S5", + "VP9": "POS1V1_S0", + "VP10": "POS0V78_S0", + "VP11": "POS0V75_S0", + "VP12": "POS1V8_S0", + "VP13": "POS3V3_S0" + } + }, + "switch_card": { + "type": "adm1266", + "dpm": "DPM2", + "dpm_signal_to_fault_cause": [ + { + "pdio_mask": "0x0001", + "gpio_mask": "0x0000", + "pdio_value": "0x0001", + "gpio_value": "0x0000", + "hw_cause": "PSU_VIN_LOSS", + "hw_desc": "Both PSUs lost input power", + "reboot_cause": "REBOOT_CAUSE_POWER_LOSS" + }, + { + "pdio_mask": "0x0002", + "gpio_mask": "0x0000", + "pdio_value": "0x0002", + "gpio_value": "0x0000", + "hw_cause": "OVER_TEMP", + "hw_desc": "Switch card exceeded overtemperature", + "reboot_cause": "REBOOT_CAUSE_THERMAL_OVERLOAD_OTHER" + }, + { + "pdio_mask": "0x0004", + "gpio_mask": "0x0000", + "pdio_value": "0x0004", + "gpio_value": "0x0000", + "hw_cause": "CPU_PWR_BAD", + "hw_desc": "CPU card power bad", + "reboot_cause": "REBOOT_CAUSE_HARDWARE_OTHER" + }, + { + "pdio_mask": "0x0008", + "gpio_mask": "0x0000", + "pdio_value": "0x0008", + "gpio_value": "0x0000", + "hw_cause": "WATCHDOG", + "hw_desc": "FPGA watchdog expired", + "reboot_cause": "REBOOT_CAUSE_WATCHDOG" + }, + { + "pdio_mask": "0x0010", + "gpio_mask": "0x0000", + "pdio_value": "0x0010", + "gpio_value": "0x0000", + "hw_cause": "ASIC_OT", + "hw_desc": "ASIC exceeded overtemperature", + "reboot_cause": "REBOOT_CAUSE_THERMAL_OVERLOAD_ASIC" + }, + { + "pdio_mask": "0x0020", + "gpio_mask": "0x0000", + "pdio_value": "0x0020", + "gpio_value": "0x0000", + "hw_cause": "NO_FAN_PRSNT", + "hw_desc": "All 4 system fans removed", + "reboot_cause": "REBOOT_CAUSE_INSUFFICIENT_FAN_SPEED" + }, + { + "pdio_mask": "0x0040", + "gpio_mask": "0x0000", + "pdio_value": "0x0040", + "gpio_value": "0x0000", + "hw_cause": "CMD_PWR_CYC", + "hw_desc": "Software commanded power cycle", + "reboot_cause": "REBOOT_CAUSE_POWER_LOSS" + }, + { + "pdio_mask": "0x0100", + "gpio_mask": "0x0000", + "pdio_value": "0x0100", + "gpio_value": "0x0000", + "hw_cause": "CPU_CMD_PCYC", + "hw_desc": "CPU card commanded power cycle", + "reboot_cause": "REBOOT_CAUSE_POWER_LOSS" + } + ], + "pin_to_name": { + "VH1": "12V", + "VH2": "5V0", + "VH3": "3V3_WEST", + "VH4": "3V3_EAST", + "VP1": "1V0", + "VP2": "0V78", + "VP3": "0V78_IMON", + "VP4": "1V2_CP", + "VP5": "1V2_DP", + "VP6": "0V8", + "VP7": "1V5", + "VP8": "0V9_PVDD_0", + "VP9": "0V9_PVDD_1", + "VP10": "0V9_PVDD_2", + "VP11": "0V9_PVDD_3", + "VP12": "1V8", + "VP13": "3V3" + } + } + }, "PSU": { "name": { "1": "PSU1", @@ -64,6 +232,14 @@ } } }, + "fault": { + "i2c": { + "valmap": { + "1": true, + "0": false + } + } + }, "duty_cycle_to_pwm": "lambda dc: ((dc/100) * 255)", "pwm_to_duty_cycle": "lambda pwm: ((pwm/255) * 100)" }, diff --git a/device/nexthop/x86_64-nexthop_4010-r0/pddf/pddf-device.json.j2 b/device/nexthop/x86_64-nexthop_4010-r0/pddf/pddf-device.json.j2 index 14245a39638..6dc1ad8be17 100644 --- a/device/nexthop/x86_64-nexthop_4010-r0/pddf/pddf-device.json.j2 +++ b/device/nexthop/x86_64-nexthop_4010-r0/pddf/pddf-device.json.j2 @@ -34,12 +34,14 @@ "std_kos": [ "at24", "i2c-dev", - "adm1266", + "spi-xilinx", "optoe" ], "pddf_kos": [ + "pddf_spi_module", "pddf_multifpgapci_i2c_module", "pddf_multifpgapci_gpio_module", + "pddf_multifpgapci_spi_module", "pddf_client_module", "pddf_multifpgapci_driver", "pddf_multifpgapci_module", @@ -57,6 +59,7 @@ "nh_pmbus_core", "nh_isl68137", "nh_tda38740", + "nh_adm1266", "nh_tmp464" ] }, @@ -243,6 +246,10 @@ "chn": "3", "dev": "DPM1" }, + { + "chn": "5", + "dev": "DPM2" + }, { "chn": "6", "dev": "EEPROM1" @@ -253,6 +260,9 @@ } ] }, +{%- if platform == 'x86_64-nexthop_4010-r1' %} + "spi_controllers": ["CPUCARD_SPI_CONTROLLER"], +{%- endif %} "gpio": { "line0": { "attr_list": [ @@ -387,11 +397,11 @@ }, { "attr_name": "temp1_high_threshold", - "drv_attr_name": "temp2_max" + "drv_attr_name": "temp2_crit" }, { "attr_name": "temp1_high_crit_threshold", - "drv_attr_name": "temp2_crit" + "drv_attr_name": "temp2_max" } ] } @@ -416,11 +426,11 @@ }, { "attr_name": "temp1_high_threshold", - "drv_attr_name": "temp3_max" + "drv_attr_name": "temp3_crit" }, { "attr_name": "temp1_high_crit_threshold", - "drv_attr_name": "temp3_crit" + "drv_attr_name": "temp3_max" } ] } @@ -445,11 +455,11 @@ }, { "attr_name": "temp1_high_threshold", - "drv_attr_name": "temp4_max" + "drv_attr_name": "temp4_crit" }, { "attr_name": "temp1_high_crit_threshold", - "drv_attr_name": "temp4_crit" + "drv_attr_name": "temp4_max" } ] } @@ -473,11 +483,11 @@ }, { "attr_name": "temp1_high_threshold", - "drv_attr_name": "temp5_max" + "drv_attr_name": "temp5_crit" }, { "attr_name": "temp1_high_crit_threshold", - "drv_attr_name": "temp5_crit" + "drv_attr_name": "temp5_max" } ] } @@ -525,11 +535,11 @@ }, { "attr_name": "temp1_high_threshold", - "drv_attr_name": "temp1_max" + "drv_attr_name": "temp1_crit" }, { "attr_name": "temp1_high_crit_threshold", - "drv_attr_name": "temp1_crit" + "drv_attr_name": "temp1_max" } ] } @@ -1390,6 +1400,9 @@ "pwr_cycle_reg_offset": "0x4", "pwr_cycle_enable_word": "0xdeadbeef" }, +{%- if platform == 'x86_64-nexthop_4010-r1' %} + "spi_controllers": ["SWITCHCARD_SPI_CONTROLLER"], +{%- endif %} "i2c": { "dev_attr": { "virt_bus": "0x13", @@ -2030,6 +2043,7 @@ "attr_mask": "0x0", "attr_cmpval": "0xff", "attr_data_format": "linear16", + "attr_vout_mode": "0x17", "attr_len": "2" }, { @@ -2139,6 +2153,7 @@ "attr_mask": "0x0", "attr_cmpval": "0xff", "attr_data_format": "linear16", + "attr_vout_mode": "0x17", "attr_len": "2" }, { @@ -2149,6 +2164,7 @@ "attr_mask": "0x0", "attr_cmpval": "0xff", "attr_data_format": "linear16", + "attr_vout_mode": "0x17", "attr_len": "2" }, { @@ -2291,6 +2307,7 @@ "attr_mask": "0x0", "attr_cmpval": "0xff", "attr_data_format": "linear16", + "attr_vout_mode": "0x17", "attr_len": "2" }, { @@ -2400,6 +2417,7 @@ "attr_mask": "0x0", "attr_cmpval": "0xff", "attr_data_format": "linear16", + "attr_vout_mode": "0x17", "attr_len": "2" }, { @@ -2410,6 +2428,7 @@ "attr_mask": "0x0", "attr_cmpval": "0xff", "attr_data_format": "linear16", + "attr_vout_mode": "0x17", "attr_len": "2" }, { @@ -12386,7 +12405,15 @@ "dev_info": {"device_type":"DPM", "device_name":"DPM1", "device_parent":"MULTIFPGAPCIE0"}, "i2c": { - "topo_info":{ "parent_bus":"0x7", "dev_addr":"0x41", "dev_type":"adm1266"} + "topo_info":{ "parent_bus":"0x7", "dev_addr":"0x41", "dev_type":"nh_adm1266"} + } + }, + "DPM2": + { + "dev_info": {"device_type":"DPM", "device_name":"DPM2", "device_parent":"MULTIFPGAPCIE0"}, + "i2c": + { + "topo_info":{ "parent_bus":"0x9", "dev_addr":"0x41", "dev_type":"nh_adm1266"} } }, "VOLTAGE1": @@ -13196,6 +13223,92 @@ ] } }, +{%- if platform == 'x86_64-nexthop_4010-r1' %} + "CPUCARD_SPI_CONTROLLER": { + "dev_info": { + "device_type": "SPI_CONTROLLER", + "device_parent": "MULTIFPGAPCIE0" + }, + "spi_mode_commands": [ + { + "enable": "fpga write32 CPUCARD_FPGA 0x4 --bits=0:0 0x1", + "disable": "fpga write32 CPUCARD_FPGA 0x4 --bits=0:0 0x0", + "comment": "Enable output to on-board SPI devices" + } + ], + "dev_attr": { + "spi_base_addr": "0x50000", + "virt_spi_controllers": "1", + "virt_spi_controller_size": "0x200", + "spi_driver": "xilinx_spi", + "spi_num_cs": 5, + "spi_controller_name": "CPUCARD_SPI_CONTROLLER", + "spi_controller_idx": 1 + }, + "spi_devices": ["SWITCHCARD_CONFIG_FLASH"] + }, + "SWITCHCARD_CONFIG_FLASH": { + "dev_info": { + "device_type": "SPI_DEVICE", + "device_name": "SWITCHCARD_CONFIG_FLASH", + "device_parent": "CPUCARD_SPI_CONTROLLER" + }, + "is_persistent": false, + "spi_mode_commands": [ + { + "enable": "fpga write32 CPUCARD_FPGA 0x44 --bits=11:11 0x1", + "disable": "fpga write32 CPUCARD_FPGA 0x44 --bits=11:11 0x0", + "comment": "Komodo controls Switch Card SPI config Flash" + }, + { + "enable": "fpga write32 CPUCARD_FPGA 0x44 --bits=10:10 0x0", + "comment": "Select SPI protocol for config flash" + } + ], + "dev_attr": { + "spi_device_driver": "spi-nor", + "max_speed_hz": 26000000, + "chip_select": 0 + } + }, + "SWITCHCARD_SPI_CONTROLLER": { + "dev_info": { + "device_type": "SPI_CONTROLLER", + "device_parent": "MULTIFPGAPCIE1" + }, + "spi_mode_commands": [], + "dev_attr": { + "spi_base_addr": "0x50000", + "virt_spi_controllers": "1", + "virt_spi_controller_size": "0x200", + "spi_driver": "xilinx_spi", + "spi_num_cs": 5, + "spi_controller_name": "SWITCHCARD_SPI_CONTROLLER", + "spi_controller_idx": 2 + }, + "spi_devices": ["ASIC_BOOT_FLASH"] + }, + "ASIC_BOOT_FLASH": { + "dev_info": { + "device_type": "SPI_DEVICE", + "device_name": "ASIC_BOOT_FLASH", + "device_parent": "SWITCHCARD_SPI_CONTROLLER" + }, + "is_persistent": false, + "spi_mode_commands": [ + { + "enable": "fpga write32 SWITCHCARD_FPGA 0x8 --bits=4:4 0x1", + "disable": "fpga write32 SWITCHCARD_FPGA 0x8 --bits=4:4 0x0", + "comment": "Switch Card controls ASIC QSPI boot flash" + } + ], + "dev_attr": { + "spi_device_driver": "spi-nor", + "max_speed_hz": 0, + "chip_select": 0 + } + }, +{%- endif %} "WATCHDOG": { "dev_info": { "device_type": "WATCHDOG", diff --git a/device/nexthop/x86_64-nexthop_4010-r0/sensors.conf b/device/nexthop/x86_64-nexthop_4010-r0/sensors.conf index 94dc0c5040f..c1b196373b9 100644 --- a/device/nexthop/x86_64-nexthop_4010-r0/sensors.conf +++ b/device/nexthop/x86_64-nexthop_4010-r0/sensors.conf @@ -3,6 +3,7 @@ # bus "i2c-10" "CPU Card FPGA I2C bus 6" bus "i2c-96" "Switch Card FPGA I2C Mux 2 Chan 1" +bus "i2c-92" "i2c-20-mux (chan_id 1)" chip "nh_tmp464-*" label temp1 "Switch Card Lower Rear" @@ -11,16 +12,17 @@ chip "nh_tmp464-*" label temp4 "ASIC Diode 1" label temp5 "PSU 1 Intake" - set temp1_max 100 - set temp1_crit 105 - set temp2_max 100 - set temp2_crit 105 - set temp3_max 120 - set temp3_crit 127 - set temp4_max 120 - set temp4_crit 127 - set temp5_max 100 - set temp5_crit 105 + # In HW vs kernel driver, max/crit are swapped. + set temp1_crit 87 + set temp1_max 95 + set temp2_crit 55 + set temp2_max 125 + set temp3_crit 115 + set temp3_max 125 + set temp4_crit 115 + set temp4_max 125 + set temp5_crit 55 + set temp5_max 125 ignore temp6 ignore temp7 ignore temp8 @@ -30,7 +32,7 @@ chip "tmp451-*" label temp1 "Chassis Intake" set temp1_max 45 - set temp1_crit 65 + set temp1_crit 125 # Note: k10temp driver does not support writing max/crit values, so we rely on # pddf-device.json to provide the values instead. @@ -43,3 +45,19 @@ chip "nvme-pci-*" ignore temp2 ignore temp3 ignore temp4 + +chip "nh_isl68225-i2c-92-64" + compute in3 @*(1.2), @/(1.2) + +chip "nh_isl68225-i2c-92-66" + compute in3 @*(1.2), @/(1.2) + +chip "nh_xdpe1a2g5b-*" + set temp1_max 100 + set temp1_crit 145 + +chip "nh_isl68225-*" + set temp1_max 115 + set temp1_crit 125 + set temp2_max 115 + set temp2_crit 125 diff --git a/device/nexthop/x86_64-nexthop_4010-r1/installer.conf b/device/nexthop/x86_64-nexthop_4010-r1/installer.conf new file mode 120000 index 00000000000..97b3314541b --- /dev/null +++ b/device/nexthop/x86_64-nexthop_4010-r1/installer.conf @@ -0,0 +1 @@ +../x86_64-nexthop_4010-r0/installer.conf \ No newline at end of file diff --git a/device/nexthop/x86_64-nexthop_4010-r1/pcie-variables.yaml b/device/nexthop/x86_64-nexthop_4010-r1/pcie-variables.yaml index d3e0018cf93..8c5ff2b49ab 120000 --- a/device/nexthop/x86_64-nexthop_4010-r1/pcie-variables.yaml +++ b/device/nexthop/x86_64-nexthop_4010-r1/pcie-variables.yaml @@ -1 +1 @@ -../x86_64-nexthop_4010-r0/pcie-variables.yaml \ No newline at end of file +../common/komodo/pcie-variables.yaml \ No newline at end of file diff --git a/device/nexthop/x86_64-nexthop_4020-r0/installer.conf b/device/nexthop/x86_64-nexthop_4020-r0/installer.conf new file mode 120000 index 00000000000..97b3314541b --- /dev/null +++ b/device/nexthop/x86_64-nexthop_4020-r0/installer.conf @@ -0,0 +1 @@ +../x86_64-nexthop_4010-r0/installer.conf \ No newline at end of file diff --git a/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-O256/BALANCED/buffer_ports.j2 b/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-O256/BALANCED/buffer_ports.j2 new file mode 100644 index 00000000000..a96d5934168 --- /dev/null +++ b/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-O256/BALANCED/buffer_ports.j2 @@ -0,0 +1,6 @@ +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {%- for port_idx in range(0, 1024, 4) %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx)) %}{%- endif %} + {%- endfor %} +{%- endmacro %} diff --git a/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-O256/BALANCED/buffers.json.j2 b/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-O256/BALANCED/buffers.json.j2 new file mode 100644 index 00000000000..0b1cb2c541b --- /dev/null +++ b/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-O256/BALANCED/buffers.json.j2 @@ -0,0 +1,2 @@ +{%- set default_topo = 't1' %} +{%- include 'buffers_config.j2' %} diff --git a/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-O256/BALANCED/buffers_defaults_lt2.j2 b/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-O256/BALANCED/buffers_defaults_lt2.j2 new file mode 100644 index 00000000000..0cb652f3450 --- /dev/null +++ b/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-O256/BALANCED/buffers_defaults_lt2.j2 @@ -0,0 +1,36 @@ +{%- set default_cable = '5m' %} + +{%- include 'buffer_ports.j2' %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "258035400", + "type": "ingress", + "mode": "dynamic", + "xoff": "81553920" + }, + "egress_lossless_pool": { + "size": "258035400", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool": "ingress_lossless_pool", + "size": "0", + "static_th": "265332900" + }, + "egress_lossy_profile": { + "pool": "egress_lossless_pool", + "size": "0", + "dynamic_th": "0" + }, + "egress_lossless_profile": { + "pool": "egress_lossless_pool", + "size": "0", + "static_th": "265332900" + } + }, +{%- endmacro %} diff --git a/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-O256/BALANCED/buffers_defaults_t1.j2 b/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-O256/BALANCED/buffers_defaults_t1.j2 new file mode 100644 index 00000000000..0cb652f3450 --- /dev/null +++ b/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-O256/BALANCED/buffers_defaults_t1.j2 @@ -0,0 +1,36 @@ +{%- set default_cable = '5m' %} + +{%- include 'buffer_ports.j2' %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "258035400", + "type": "ingress", + "mode": "dynamic", + "xoff": "81553920" + }, + "egress_lossless_pool": { + "size": "258035400", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool": "ingress_lossless_pool", + "size": "0", + "static_th": "265332900" + }, + "egress_lossy_profile": { + "pool": "egress_lossless_pool", + "size": "0", + "dynamic_th": "0" + }, + "egress_lossless_profile": { + "pool": "egress_lossless_pool", + "size": "0", + "static_th": "265332900" + } + }, +{%- endmacro %} diff --git a/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-O256/BALANCED/pg_profile_lookup.ini b/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-O256/BALANCED/pg_profile_lookup.ini new file mode 100644 index 00000000000..aa1b41137cf --- /dev/null +++ b/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-O256/BALANCED/pg_profile_lookup.ini @@ -0,0 +1,30 @@ +# PG lossless profiles. +# speed cable size xon xoff threshold xon_offset +25000 5m 4620 0 162540 0 3360 +25000 40m 4620 0 173460 0 3360 +25000 300m 4620 0 254940 0 3360 +50000 5m 4620 0 162540 0 3360 +50000 30m 4620 0 170520 0 3360 +50000 40m 4620 0 173460 0 3360 +50000 300m 4620 0 254940 0 3360 +50000 500m 4620 0 317100 0 3360 +100000 5m 4620 0 229740 0 3360 +100000 30m 4620 0 245280 0 3360 +100000 40m 4620 0 251580 0 3360 +100000 300m 4620 0 414120 0 3360 +100000 500m 4620 0 538860 0 3360 +200000 5m 4620 0 369180 0 3360 +200000 30m 4620 0 400260 0 3360 +200000 40m 4620 0 412860 0 3360 +200000 300m 4620 0 737940 0 3360 +200000 500m 4620 0 987840 0 3360 +400000 5m 4620 0 650160 0 3360 +400000 30m 4620 0 712740 0 3360 +400000 40m 4620 0 737940 0 3360 +400000 300m 4620 0 1387680 0 3360 +400000 500m 4620 0 1887900 0 3360 +800000 5m 4620 0 1249080 0 3360 +800000 30m 4620 0 1374240 0 3360 +800000 40m 4620 0 1424220 0 3360 +800000 300m 4620 0 2724120 0 3360 +800000 500m 4620 0 3724140 0 3360 diff --git a/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-O256/BALANCED/qos.json.j2 b/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-O256/BALANCED/qos.json.j2 new file mode 100644 index 00000000000..af1c4dfb256 --- /dev/null +++ b/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-O256/BALANCED/qos.json.j2 @@ -0,0 +1,4 @@ +{%- macro generate_global_dscp_to_tc_map() %} +{# This is an empty macro since the global DSCP_TO_TC map is not required #} +{%- endmacro %} +{%- include 'qos_config.j2' %} diff --git a/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-O256/buffer_ports.j2 b/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-O256/buffer_ports.j2 new file mode 100644 index 00000000000..a96d5934168 --- /dev/null +++ b/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-O256/buffer_ports.j2 @@ -0,0 +1,6 @@ +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {%- for port_idx in range(0, 1024, 4) %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx)) %}{%- endif %} + {%- endfor %} +{%- endmacro %} diff --git a/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-O256/buffers.json.j2 b/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-O256/buffers.json.j2 new file mode 100644 index 00000000000..6dfe806d8aa --- /dev/null +++ b/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-O256/buffers.json.j2 @@ -0,0 +1,2 @@ +{%- set default_topo = 'lt2' %} +{%- include 'buffers_config.j2' %} diff --git a/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-O256/buffers_defaults_lt2.j2 b/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-O256/buffers_defaults_lt2.j2 new file mode 100644 index 00000000000..0cb652f3450 --- /dev/null +++ b/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-O256/buffers_defaults_lt2.j2 @@ -0,0 +1,36 @@ +{%- set default_cable = '5m' %} + +{%- include 'buffer_ports.j2' %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "258035400", + "type": "ingress", + "mode": "dynamic", + "xoff": "81553920" + }, + "egress_lossless_pool": { + "size": "258035400", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool": "ingress_lossless_pool", + "size": "0", + "static_th": "265332900" + }, + "egress_lossy_profile": { + "pool": "egress_lossless_pool", + "size": "0", + "dynamic_th": "0" + }, + "egress_lossless_profile": { + "pool": "egress_lossless_pool", + "size": "0", + "static_th": "265332900" + } + }, +{%- endmacro %} diff --git a/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-O256/buffers_defaults_t0.j2 b/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-O256/buffers_defaults_t0.j2 new file mode 100644 index 00000000000..374e8e5878b --- /dev/null +++ b/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-O256/buffers_defaults_t0.j2 @@ -0,0 +1,53 @@ +{%- set default_cable = '5m' %} + +{%- include 'buffer_ports.j2' %} +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_pool": { + "size": "257154240", + "type": "ingress", + "mode": "dynamic" + }, + "egress_pool": { + "size": "257154240", + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool": "ingress_pool", + "dynamic_th": "0", + "size": "0" + }, + "egress_lossy_profile": { + "pool": "egress_pool", + "size": "0", + "dynamic_th": "0" + } + }, +{%- endmacro %} + +{%- macro generate_pg_profils(port_names_active) %} + "BUFFER_PG": { +{% for port in port_names_active.split(',') %} + "{{ port }}|0-7": { + "profile" : "ingress_lossy_profile" + }{% if not loop.last %},{% endif %} +{% endfor %} + }, +{%- endmacro %} + +{% macro generate_queue_buffers(port_names_active) %} + "BUFFER_QUEUE": { +{% for port in port_names_active.split(',') %} + "{{ port }}|0-7": { + "profile" : "egress_lossy_profile" + }{% if not loop.last %},{% endif %} +{% endfor %} + } +{% endmacro %} + +{%- macro generate_cable_length_config(port_names_all) %} +{# CABLE_LENGTH is disabled #} +{%- endmacro %} diff --git a/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-O256/buffers_defaults_t1.j2 b/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-O256/buffers_defaults_t1.j2 new file mode 100644 index 00000000000..0cb652f3450 --- /dev/null +++ b/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-O256/buffers_defaults_t1.j2 @@ -0,0 +1,36 @@ +{%- set default_cable = '5m' %} + +{%- include 'buffer_ports.j2' %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "258035400", + "type": "ingress", + "mode": "dynamic", + "xoff": "81553920" + }, + "egress_lossless_pool": { + "size": "258035400", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool": "ingress_lossless_pool", + "size": "0", + "static_th": "265332900" + }, + "egress_lossy_profile": { + "pool": "egress_lossless_pool", + "size": "0", + "dynamic_th": "0" + }, + "egress_lossless_profile": { + "pool": "egress_lossless_pool", + "size": "0", + "static_th": "265332900" + } + }, +{%- endmacro %} diff --git a/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-O256/context_config.json b/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-O256/context_config.json new file mode 120000 index 00000000000..b470406077c --- /dev/null +++ b/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-O256/context_config.json @@ -0,0 +1 @@ +../../common/context_config.json \ No newline at end of file diff --git a/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-O256/hwsku.json b/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-O256/hwsku.json new file mode 100644 index 00000000000..c317bbe80db --- /dev/null +++ b/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-O256/hwsku.json @@ -0,0 +1,648 @@ +{ + "interfaces": { + "Ethernet0": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet8": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet16": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet24": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet32": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet40": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet48": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet56": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet64": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet72": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet80": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet88": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet96": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet104": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet112": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet120": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet128": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet136": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet144": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet152": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet160": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet168": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet176": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet184": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet192": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet200": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet208": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet216": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet224": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet232": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet240": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet248": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet256": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet264": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet272": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet280": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet288": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet296": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet304": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet312": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet320": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet328": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet336": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet344": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet352": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet360": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet368": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet376": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet384": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet392": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet400": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet408": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet416": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet424": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet432": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet440": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet448": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet456": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet464": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet472": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet480": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet488": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet496": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet504": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet512": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet520": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet528": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet536": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet544": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet552": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet560": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet568": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet576": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet584": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet592": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet600": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet608": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet616": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet624": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet632": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet640": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet648": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet656": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet664": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet672": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet680": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet688": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet696": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet704": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet712": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet720": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet728": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet736": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet744": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet752": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet760": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet768": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet776": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet784": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet792": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet800": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet808": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet816": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet824": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet832": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet840": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet848": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet856": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet864": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet872": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet880": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet888": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet896": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet904": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet912": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet920": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet928": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet936": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet944": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet952": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet960": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet968": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet976": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet984": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet992": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet1000": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet1008": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet1016": { + "autoneg": "off", + "default_brkout_mode": "2x400G", + "fec": "rs" + }, + "Ethernet1024": { + "default_brkout_mode": "1x100G", + "fec": "rs" + } + } +} diff --git a/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-O256/nh4210-r0021-F-O256.yaml b/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-O256/nh4210-r0021-F-O256.yaml new file mode 100644 index 00000000000..e1fbf8abc45 --- /dev/null +++ b/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-O256/nh4210-r0021-F-O256.yaml @@ -0,0 +1,5917 @@ +--- +device: + 0: + PC_PM_CORE: + ? + PC_PM_ID: 16 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x4152637 + TX_LANE_MAP: 0x71625043 + RX_POLARITY_FLIP: 0xc0 + TX_POLARITY_FLIP: 0x51 + ? + PC_PM_ID: 15 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x36270415 + TX_LANE_MAP: 0x51406273 + RX_POLARITY_FLIP: 0x25 + TX_POLARITY_FLIP: 0xce + ? + PC_PM_ID: 14 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x37152604 + TX_LANE_MAP: 0x72634150 + RX_POLARITY_FLIP: 0x2b + TX_POLARITY_FLIP: 0xc9 + ? + PC_PM_ID: 10 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x36270415 + TX_LANE_MAP: 0x51437062 + RX_POLARITY_FLIP: 0x49 + TX_POLARITY_FLIP: 0xd3 + ? + PC_PM_ID: 9 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x4153627 + TX_LANE_MAP: 0x62735140 + RX_POLARITY_FLIP: 0x47 + TX_POLARITY_FLIP: 0x17 + ? + PC_PM_ID: 11 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x25043716 + TX_LANE_MAP: 0x42607153 + RX_POLARITY_FLIP: 0x9c + TX_POLARITY_FLIP: 0xb + ? + PC_PM_ID: 13 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x14073526 + TX_LANE_MAP: 0x41536072 + RX_POLARITY_FLIP: 0x3f + TX_POLARITY_FLIP: 0x4e + ? + PC_PM_ID: 12 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x36240715 + TX_LANE_MAP: 0x51406273 + RX_POLARITY_FLIP: 0x38 + TX_POLARITY_FLIP: 0x61 + ? + PC_PM_ID: 64 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x6152734 + TX_LANE_MAP: 0x73625140 + RX_POLARITY_FLIP: 0x8c + TX_POLARITY_FLIP: 0x6e + ? + PC_PM_ID: 63 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x30641275 + TX_LANE_MAP: 0x57124603 + RX_POLARITY_FLIP: 0x95 + TX_POLARITY_FLIP: 0x5e + ? + PC_PM_ID: 62 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x6152734 + TX_LANE_MAP: 0x73625140 + RX_POLARITY_FLIP: 0xcd + TX_POLARITY_FLIP: 0xee + ? + PC_PM_ID: 58 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x27340615 + TX_LANE_MAP: 0x51407362 + RX_POLARITY_FLIP: 0x9d + TX_POLARITY_FLIP: 0x4c + ? + PC_PM_ID: 57 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x21753064 + TX_LANE_MAP: 0x46035712 + RX_POLARITY_FLIP: 0x2e + TX_POLARITY_FLIP: 0x4f + ? + PC_PM_ID: 59 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x26341705 + TX_LANE_MAP: 0x40516372 + RX_POLARITY_FLIP: 0x3 + TX_POLARITY_FLIP: 0x83 + ? + PC_PM_ID: 61 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x27150634 + TX_LANE_MAP: 0x43605172 + RX_POLARITY_FLIP: 0xa7 + TX_POLARITY_FLIP: 0xbf + ? + PC_PM_ID: 60 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x30642175 + TX_LANE_MAP: 0x57124603 + RX_POLARITY_FLIP: 0xb5 + TX_POLARITY_FLIP: 0x44 + ? + PC_PM_ID: 112 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x25041736 + TX_LANE_MAP: 0x62704351 + RX_POLARITY_FLIP: 0x47 + TX_POLARITY_FLIP: 0x82 + ? + PC_PM_ID: 111 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x4261537 + TX_LANE_MAP: 0x50426371 + RX_POLARITY_FLIP: 0x83 + TX_POLARITY_FLIP: 0xd6 + ? + PC_PM_ID: 110 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x26051734 + TX_LANE_MAP: 0x73624051 + RX_POLARITY_FLIP: 0x51 + TX_POLARITY_FLIP: 0xe1 + ? + PC_PM_ID: 106 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x17362504 + TX_LANE_MAP: 0x73516240 + RX_POLARITY_FLIP: 0x0 + TX_POLARITY_FLIP: 0x92 + ? + PC_PM_ID: 105 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x15370426 + TX_LANE_MAP: 0x63715042 + RX_POLARITY_FLIP: 0x4f + TX_POLARITY_FLIP: 0xc0 + ? + PC_PM_ID: 107 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x24361705 + TX_LANE_MAP: 0x40517362 + RX_POLARITY_FLIP: 0x8e + TX_POLARITY_FLIP: 0x5a + ? + PC_PM_ID: 109 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x17063425 + TX_LANE_MAP: 0x51734062 + RX_POLARITY_FLIP: 0xb9 + TX_POLARITY_FLIP: 0xdd + ? + PC_PM_ID: 108 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x34261507 + TX_LANE_MAP: 0x40526371 + RX_POLARITY_FLIP: 0x78 + TX_POLARITY_FLIP: 0x11 + ? + PC_PM_ID: 128 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x16053724 + TX_LANE_MAP: 0x72635041 + RX_POLARITY_FLIP: 0x37 + TX_POLARITY_FLIP: 0x79 + ? + PC_PM_ID: 127 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x30641275 + TX_LANE_MAP: 0x57124603 + RX_POLARITY_FLIP: 0xe5 + TX_POLARITY_FLIP: 0x5b + ? + PC_PM_ID: 126 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x16053724 + TX_LANE_MAP: 0x73625041 + RX_POLARITY_FLIP: 0x23 + TX_POLARITY_FLIP: 0x79 + ? + PC_PM_ID: 122 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x37241605 + TX_LANE_MAP: 0x50417263 + RX_POLARITY_FLIP: 0x66 + TX_POLARITY_FLIP: 0x1d + ? + PC_PM_ID: 121 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x21753064 + TX_LANE_MAP: 0x46035712 + RX_POLARITY_FLIP: 0xf + TX_POLARITY_FLIP: 0x1f + ? + PC_PM_ID: 123 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x36240715 + TX_LANE_MAP: 0x41506273 + RX_POLARITY_FLIP: 0xcd + TX_POLARITY_FLIP: 0x23 + ? + PC_PM_ID: 125 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x17253604 + TX_LANE_MAP: 0x40635271 + RX_POLARITY_FLIP: 0x0 + TX_POLARITY_FLIP: 0xb7 + ? + PC_PM_ID: 124 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x30642175 + TX_LANE_MAP: 0x57124603 + RX_POLARITY_FLIP: 0xb2 + TX_POLARITY_FLIP: 0x41 + ? + PC_PM_ID: 30 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x45763210 + TX_LANE_MAP: 0x57246013 + RX_POLARITY_FLIP: 0xe8 + TX_POLARITY_FLIP: 0xd1 + ? + PC_PM_ID: 26 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x47563210 + TX_LANE_MAP: 0x15746203 + RX_POLARITY_FLIP: 0xc1 + TX_POLARITY_FLIP: 0x36 + ? + PC_PM_ID: 29 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x75604123 + TX_LANE_MAP: 0x46702513 + RX_POLARITY_FLIP: 0xb9 + TX_POLARITY_FLIP: 0x41 + ? + PC_PM_ID: 28 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x41576320 + TX_LANE_MAP: 0x42560713 + RX_POLARITY_FLIP: 0xe8 + TX_POLARITY_FLIP: 0xeb + ? + PC_PM_ID: 35 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x46750123 + TX_LANE_MAP: 0x47250613 + RX_POLARITY_FLIP: 0x48 + TX_POLARITY_FLIP: 0x18 + ? + PC_PM_ID: 33 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x57463102 + TX_LANE_MAP: 0x75462013 + RX_POLARITY_FLIP: 0x22 + TX_POLARITY_FLIP: 0xa + ? + PC_PM_ID: 39 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x67450213 + TX_LANE_MAP: 0x57246013 + RX_POLARITY_FLIP: 0x1e + TX_POLARITY_FLIP: 0xd4 + ? + PC_PM_ID: 40 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x57460123 + TX_LANE_MAP: 0x25746103 + RX_POLARITY_FLIP: 0x72 + TX_POLARITY_FLIP: 0xf8 + ? + PC_PM_ID: 46 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x47532601 + TX_LANE_MAP: 0x45612703 + RX_POLARITY_FLIP: 0x6 + TX_POLARITY_FLIP: 0xd8 + ? + PC_PM_ID: 42 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x41765320 + TX_LANE_MAP: 0x46510723 + RX_POLARITY_FLIP: 0x74 + TX_POLARITY_FLIP: 0x14 + ? + PC_PM_ID: 45 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x67543120 + TX_LANE_MAP: 0x74061523 + RX_POLARITY_FLIP: 0x56 + TX_POLARITY_FLIP: 0x5b + ? + PC_PM_ID: 44 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x54763102 + TX_LANE_MAP: 0x75461023 + RX_POLARITY_FLIP: 0x45 + TX_POLARITY_FLIP: 0xa6 + ? + PC_PM_ID: 51 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x67541203 + TX_LANE_MAP: 0x67245013 + RX_POLARITY_FLIP: 0xb8 + TX_POLARITY_FLIP: 0xc2 + ? + PC_PM_ID: 49 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x57640123 + TX_LANE_MAP: 0x25746103 + RX_POLARITY_FLIP: 0x12 + TX_POLARITY_FLIP: 0x2b + ? + PC_PM_ID: 55 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x57601423 + TX_LANE_MAP: 0x45621703 + RX_POLARITY_FLIP: 0x4b + TX_POLARITY_FLIP: 0x84 + ? + PC_PM_ID: 56 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x41765320 + TX_LANE_MAP: 0x46520713 + RX_POLARITY_FLIP: 0xf0 + TX_POLARITY_FLIP: 0xac + ? + PC_PM_ID: 78 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x54270631 + TX_LANE_MAP: 0x54672310 + RX_POLARITY_FLIP: 0xd6 + TX_POLARITY_FLIP: 0xa3 + ? + PC_PM_ID: 74 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x54671023 + TX_LANE_MAP: 0x56420713 + RX_POLARITY_FLIP: 0xb9 + TX_POLARITY_FLIP: 0xd1 + ? + PC_PM_ID: 77 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x75463102 + TX_LANE_MAP: 0x56371402 + RX_POLARITY_FLIP: 0x3a + TX_POLARITY_FLIP: 0x19 + ? + PC_PM_ID: 76 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x71460523 + TX_LANE_MAP: 0x76245301 + RX_POLARITY_FLIP: 0x24 + TX_POLARITY_FLIP: 0x91 + ? + PC_PM_ID: 83 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x53742601 + TX_LANE_MAP: 0x54670231 + RX_POLARITY_FLIP: 0xde + TX_POLARITY_FLIP: 0x4 + ? + PC_PM_ID: 81 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x15746023 + TX_LANE_MAP: 0x45761320 + RX_POLARITY_FLIP: 0xcf + TX_POLARITY_FLIP: 0x38 + ? + PC_PM_ID: 87 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x54271603 + TX_LANE_MAP: 0x54671320 + RX_POLARITY_FLIP: 0xa7 + TX_POLARITY_FLIP: 0x39 + ? + PC_PM_ID: 88 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x54671320 + TX_LANE_MAP: 0x46520713 + RX_POLARITY_FLIP: 0xef + TX_POLARITY_FLIP: 0x2b + ? + PC_PM_ID: 94 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x46750132 + TX_LANE_MAP: 0x75041632 + RX_POLARITY_FLIP: 0x1c + TX_POLARITY_FLIP: 0x37 + ? + PC_PM_ID: 90 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x41560723 + TX_LANE_MAP: 0x75246301 + RX_POLARITY_FLIP: 0x6b + TX_POLARITY_FLIP: 0x85 + ? + PC_PM_ID: 93 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x70564132 + TX_LANE_MAP: 0x67540213 + RX_POLARITY_FLIP: 0x55 + TX_POLARITY_FLIP: 0x29 + ? + PC_PM_ID: 92 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x26475031 + TX_LANE_MAP: 0x46752013 + RX_POLARITY_FLIP: 0x92 + TX_POLARITY_FLIP: 0x83 + ? + PC_PM_ID: 99 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x75140632 + TX_LANE_MAP: 0x54671320 + RX_POLARITY_FLIP: 0x84 + TX_POLARITY_FLIP: 0xd3 + ? + PC_PM_ID: 97 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x57641320 + TX_LANE_MAP: 0x56410723 + RX_POLARITY_FLIP: 0xcc + TX_POLARITY_FLIP: 0x1a + ? + PC_PM_ID: 103 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x64753201 + TX_LANE_MAP: 0x75042631 + RX_POLARITY_FLIP: 0xe5 + TX_POLARITY_FLIP: 0x57 + ? + PC_PM_ID: 104 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x52463710 + TX_LANE_MAP: 0x75146302 + RX_POLARITY_FLIP: 0x98 + TX_POLARITY_FLIP: 0x34 + ? + PC_PM_ID: 32 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x52467310 + TX_LANE_MAP: 0x30267415 + RX_POLARITY_FLIP: 0x98 + TX_POLARITY_FLIP: 0x76 + ? + PC_PM_ID: 31 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x64753210 + TX_LANE_MAP: 0x3621754 + RX_POLARITY_FLIP: 0xe6 + TX_POLARITY_FLIP: 0x6b + ? + PC_PM_ID: 25 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x57643102 + TX_LANE_MAP: 0x32076514 + RX_POLARITY_FLIP: 0xc3 + TX_POLARITY_FLIP: 0xad + ? + PC_PM_ID: 27 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x75140623 + TX_LANE_MAP: 0x23106547 + RX_POLARITY_FLIP: 0x84 + TX_POLARITY_FLIP: 0x97 + ? + PC_PM_ID: 36 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x45276301 + TX_LANE_MAP: 0x1324576 + RX_POLARITY_FLIP: 0x7a + TX_POLARITY_FLIP: 0x98 + ? + PC_PM_ID: 37 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x76510432 + TX_LANE_MAP: 0x1537462 + RX_POLARITY_FLIP: 0x59 + TX_POLARITY_FLIP: 0xb0 + ? + PC_PM_ID: 34 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x41567023 + TX_LANE_MAP: 0x30167425 + RX_POLARITY_FLIP: 0x6b + TX_POLARITY_FLIP: 0x58 + ? + PC_PM_ID: 38 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x46750123 + TX_LANE_MAP: 0x3612754 + RX_POLARITY_FLIP: 0x1c + TX_POLARITY_FLIP: 0xe9 + ? + PC_PM_ID: 48 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x54673102 + TX_LANE_MAP: 0x31076425 + RX_POLARITY_FLIP: 0xe0 + TX_POLARITY_FLIP: 0x2e + ? + PC_PM_ID: 47 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x54271630 + TX_LANE_MAP: 0x23106547 + RX_POLARITY_FLIP: 0xa7 + TX_POLARITY_FLIP: 0x39 + ? + PC_PM_ID: 41 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x76145203 + TX_LANE_MAP: 0x32014675 + RX_POLARITY_FLIP: 0x21 + TX_POLARITY_FLIP: 0xe6 + ? + PC_PM_ID: 43 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x54763201 + TX_LANE_MAP: 0x3614752 + RX_POLARITY_FLIP: 0xde + TX_POLARITY_FLIP: 0x1 + ? + PC_PM_ID: 52 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x71465023 + TX_LANE_MAP: 0x30157426 + RX_POLARITY_FLIP: 0x24 + TX_POLARITY_FLIP: 0xdc + ? + PC_PM_ID: 53 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x75463120 + TX_LANE_MAP: 0x30412567 + RX_POLARITY_FLIP: 0x39 + TX_POLARITY_FLIP: 0x19 + ? + PC_PM_ID: 50 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x54670132 + TX_LANE_MAP: 0x31076524 + RX_POLARITY_FLIP: 0xb9 + TX_POLARITY_FLIP: 0x41 + ? + PC_PM_ID: 54 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x54270613 + TX_LANE_MAP: 0x13206547 + RX_POLARITY_FLIP: 0xd5 + TX_POLARITY_FLIP: 0x9c + ? + PC_PM_ID: 80 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x47563102 + TX_LANE_MAP: 0x31072465 + RX_POLARITY_FLIP: 0x9f + TX_POLARITY_FLIP: 0xfa + ? + PC_PM_ID: 79 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x57621430 + TX_LANE_MAP: 0x13062547 + RX_POLARITY_FLIP: 0x5a + TX_POLARITY_FLIP: 0x3 + ? + PC_PM_ID: 73 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x57640123 + TX_LANE_MAP: 0x10362475 + RX_POLARITY_FLIP: 0x12 + TX_POLARITY_FLIP: 0x82 + ? + PC_PM_ID: 75 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x67542130 + TX_LANE_MAP: 0x1325764 + RX_POLARITY_FLIP: 0xb4 + TX_POLARITY_FLIP: 0x46 + ? + PC_PM_ID: 84 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x54763120 + TX_LANE_MAP: 0x2371465 + RX_POLARITY_FLIP: 0x45 + TX_POLARITY_FLIP: 0x22 + ? + PC_PM_ID: 85 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x74563120 + TX_LANE_MAP: 0x30251476 + RX_POLARITY_FLIP: 0xc6 + TX_POLARITY_FLIP: 0xad + ? + PC_PM_ID: 82 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x47563102 + TX_LANE_MAP: 0x32071465 + RX_POLARITY_FLIP: 0x17 + TX_POLARITY_FLIP: 0xd7 + ? + PC_PM_ID: 86 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x47502613 + TX_LANE_MAP: 0x23061547 + RX_POLARITY_FLIP: 0x14 + TX_POLARITY_FLIP: 0x8e + ? + PC_PM_ID: 96 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x57460123 + TX_LANE_MAP: 0x10362475 + RX_POLARITY_FLIP: 0x72 + TX_POLARITY_FLIP: 0xef + ? + PC_PM_ID: 95 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x67452031 + TX_LANE_MAP: 0x1326754 + RX_POLARITY_FLIP: 0x1d + TX_POLARITY_FLIP: 0x87 + ? + PC_PM_ID: 89 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x57463120 + TX_LANE_MAP: 0x1372465 + RX_POLARITY_FLIP: 0x22 + TX_POLARITY_FLIP: 0xbe + ? + PC_PM_ID: 91 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x65740123 + TX_LANE_MAP: 0x32160745 + RX_POLARITY_FLIP: 0x88 + TX_POLARITY_FLIP: 0x9 + ? + PC_PM_ID: 100 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x45673102 + TX_LANE_MAP: 0x31076425 + RX_POLARITY_FLIP: 0xaf + TX_POLARITY_FLIP: 0x28 + ? + PC_PM_ID: 101 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x75624130 + TX_LANE_MAP: 0x23170645 + RX_POLARITY_FLIP: 0xab + TX_POLARITY_FLIP: 0x44 + ? + PC_PM_ID: 98 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x47563210 + TX_LANE_MAP: 0x20361475 + RX_POLARITY_FLIP: 0xc1 + TX_POLARITY_FLIP: 0x36 + ? + PC_PM_ID: 102 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x45762301 + TX_LANE_MAP: 0x1326754 + RX_POLARITY_FLIP: 0xe4 + TX_POLARITY_FLIP: 0x27 + ? + PC_PM_ID: 4 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x3461257 + TX_LANE_MAP: 0x64307521 + RX_POLARITY_FLIP: 0x8e + TX_POLARITY_FLIP: 0xd7 + ? + PC_PM_ID: 5 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x71526340 + TX_LANE_MAP: 0x25170436 + RX_POLARITY_FLIP: 0x0 + TX_POLARITY_FLIP: 0xb7 + ? + PC_PM_ID: 3 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x63427051 + TX_LANE_MAP: 0x26371405 + RX_POLARITY_FLIP: 0x31 + TX_POLARITY_FLIP: 0xce + ? + PC_PM_ID: 1 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x12570346 + TX_LANE_MAP: 0x75216430 + RX_POLARITY_FLIP: 0xf + TX_POLARITY_FLIP: 0xf2 + ? + PC_PM_ID: 2 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x73426150 + TX_LANE_MAP: 0x27360514 + RX_POLARITY_FLIP: 0x66 + TX_POLARITY_FLIP: 0x1d + ? + PC_PM_ID: 6 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x61507342 + TX_LANE_MAP: 0x5142736 + RX_POLARITY_FLIP: 0x13 + TX_POLARITY_FLIP: 0x6b + ? + PC_PM_ID: 7 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x3462157 + TX_LANE_MAP: 0x64307521 + RX_POLARITY_FLIP: 0x25 + TX_POLARITY_FLIP: 0x85 + ? + PC_PM_ID: 8 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x61507342 + TX_LANE_MAP: 0x5143726 + RX_POLARITY_FLIP: 0x3b + TX_POLARITY_FLIP: 0x6b + ? + PC_PM_ID: 20 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x43625170 + TX_LANE_MAP: 0x36170425 + RX_POLARITY_FLIP: 0x4b + TX_POLARITY_FLIP: 0xdd + ? + PC_PM_ID: 21 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x71604352 + TX_LANE_MAP: 0x4261537 + RX_POLARITY_FLIP: 0x76 + TX_POLARITY_FLIP: 0xee + ? + PC_PM_ID: 19 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x42637150 + TX_LANE_MAP: 0x37260415 + RX_POLARITY_FLIP: 0xb2 + TX_POLARITY_FLIP: 0xa5 + ? + PC_PM_ID: 17 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x51734062 + TX_LANE_MAP: 0x5243617 + RX_POLARITY_FLIP: 0x8f + TX_POLARITY_FLIP: 0xc + ? + PC_PM_ID: 18 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x71635240 + TX_LANE_MAP: 0x26043715 + RX_POLARITY_FLIP: 0xff + TX_POLARITY_FLIP: 0xe9 + ? + PC_PM_ID: 22 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x62507143 + TX_LANE_MAP: 0x4153726 + RX_POLARITY_FLIP: 0xa2 + TX_POLARITY_FLIP: 0x2d + ? + PC_PM_ID: 23 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x40625173 + TX_LANE_MAP: 0x36170524 + RX_POLARITY_FLIP: 0xbc + TX_POLARITY_FLIP: 0x61 + ? + PC_PM_ID: 24 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x52407163 + TX_LANE_MAP: 0x34152607 + RX_POLARITY_FLIP: 0x8b + TX_POLARITY_FLIP: 0x14 + ? + PC_PM_ID: 68 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x3461257 + TX_LANE_MAP: 0x64307521 + RX_POLARITY_FLIP: 0x85 + TX_POLARITY_FLIP: 0x77 + ? + PC_PM_ID: 69 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x72516043 + TX_LANE_MAP: 0x15273406 + RX_POLARITY_FLIP: 0x5b + TX_POLARITY_FLIP: 0xf7 + ? + PC_PM_ID: 67 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x62437150 + TX_LANE_MAP: 0x36270415 + RX_POLARITY_FLIP: 0xfc + TX_POLARITY_FLIP: 0xcb + ? + PC_PM_ID: 65 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x12570346 + TX_LANE_MAP: 0x75216430 + RX_POLARITY_FLIP: 0x1d + TX_POLARITY_FLIP: 0xf8 + ? + PC_PM_ID: 66 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x72436051 + TX_LANE_MAP: 0x27361504 + RX_POLARITY_FLIP: 0x91 + TX_POLARITY_FLIP: 0x97 + ? + PC_PM_ID: 70 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x60517243 + TX_LANE_MAP: 0x15043726 + RX_POLARITY_FLIP: 0xce + TX_POLARITY_FLIP: 0xdd + ? + PC_PM_ID: 71 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x3462157 + TX_LANE_MAP: 0x64307521 + RX_POLARITY_FLIP: 0x95 + TX_POLARITY_FLIP: 0x25 + ? + PC_PM_ID: 72 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x60517243 + TX_LANE_MAP: 0x15043726 + RX_POLARITY_FLIP: 0x4c + TX_POLARITY_FLIP: 0xd9 + ? + PC_PM_ID: 116 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x63427051 + TX_LANE_MAP: 0x26371504 + RX_POLARITY_FLIP: 0xcb + TX_POLARITY_FLIP: 0xd6 + ? + PC_PM_ID: 117 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x41705362 + TX_LANE_MAP: 0x26370415 + RX_POLARITY_FLIP: 0x3f + TX_POLARITY_FLIP: 0x5a + ? + PC_PM_ID: 115 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x52407361 + TX_LANE_MAP: 0x17352406 + RX_POLARITY_FLIP: 0x93 + TX_POLARITY_FLIP: 0x8f + ? + PC_PM_ID: 113 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x40516372 + TX_LANE_MAP: 0x15042637 + RX_POLARITY_FLIP: 0x8b + TX_POLARITY_FLIP: 0xb2 + ? + PC_PM_ID: 114 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x63724051 + TX_LANE_MAP: 0x27360514 + RX_POLARITY_FLIP: 0x79 + TX_POLARITY_FLIP: 0x49 + ? + PC_PM_ID: 118 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x73516240 + TX_LANE_MAP: 0x14052736 + RX_POLARITY_FLIP: 0x17 + TX_POLARITY_FLIP: 0x6c + ? + PC_PM_ID: 119 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x63724051 + TX_LANE_MAP: 0x26371504 + RX_POLARITY_FLIP: 0xe5 + TX_POLARITY_FLIP: 0x23 + ? + PC_PM_ID: 120 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x40516273 + TX_LANE_MAP: 0x15340726 + RX_POLARITY_FLIP: 0xc0 + TX_POLARITY_FLIP: 0xa2 + ? + PC_PM_ID: 129 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x1230 + TX_LANE_MAP: 0x2103 + RX_POLARITY_FLIP: 0x7 + TX_POLARITY_FLIP: 0xb +... +--- +device: + 0: + PC_PORT_PHYS_MAP: + ? + PORT_ID: 0 + : + PC_PHYS_PORT_ID: 0 + ? + PORT_ID: 54 + : + PC_PHYS_PORT_ID: 121 + ? + PORT_ID: 55 + : + PC_PHYS_PORT_ID: 125 + ? + PORT_ID: 56 + : + PC_PHYS_PORT_ID: 113 + ? + PORT_ID: 57 + : + PC_PHYS_PORT_ID: 117 + ? + PORT_ID: 58 + : + PC_PHYS_PORT_ID: 105 + ? + PORT_ID: 59 + : + PC_PHYS_PORT_ID: 109 + ? + PORT_ID: 36 + : + PC_PHYS_PORT_ID: 73 + ? + PORT_ID: 37 + : + PC_PHYS_PORT_ID: 77 + ? + PORT_ID: 38 + : + PC_PHYS_PORT_ID: 65 + ? + PORT_ID: 39 + : + PC_PHYS_PORT_ID: 69 + ? + PORT_ID: 40 + : + PC_PHYS_PORT_ID: 81 + ? + PORT_ID: 41 + : + PC_PHYS_PORT_ID: 85 + ? + PORT_ID: 60 + : + PC_PHYS_PORT_ID: 97 + ? + PORT_ID: 61 + : + PC_PHYS_PORT_ID: 101 + ? + PORT_ID: 42 + : + PC_PHYS_PORT_ID: 89 + ? + PORT_ID: 43 + : + PC_PHYS_PORT_ID: 93 + ? + PORT_ID: 270 + : + PC_PHYS_PORT_ID: 505 + ? + PORT_ID: 271 + : + PC_PHYS_PORT_ID: 509 + ? + PORT_ID: 272 + : + PC_PHYS_PORT_ID: 497 + ? + PORT_ID: 273 + : + PC_PHYS_PORT_ID: 501 + ? + PORT_ID: 274 + : + PC_PHYS_PORT_ID: 489 + ? + PORT_ID: 275 + : + PC_PHYS_PORT_ID: 493 + ? + PORT_ID: 252 + : + PC_PHYS_PORT_ID: 457 + ? + PORT_ID: 253 + : + PC_PHYS_PORT_ID: 461 + ? + PORT_ID: 254 + : + PC_PHYS_PORT_ID: 449 + ? + PORT_ID: 255 + : + PC_PHYS_PORT_ID: 453 + ? + PORT_ID: 256 + : + PC_PHYS_PORT_ID: 465 + ? + PORT_ID: 257 + : + PC_PHYS_PORT_ID: 469 + ? + PORT_ID: 276 + : + PC_PHYS_PORT_ID: 481 + ? + PORT_ID: 277 + : + PC_PHYS_PORT_ID: 485 + ? + PORT_ID: 258 + : + PC_PHYS_PORT_ID: 473 + ? + PORT_ID: 259 + : + PC_PHYS_PORT_ID: 477 + ? + PORT_ID: 486 + : + PC_PHYS_PORT_ID: 889 + ? + PORT_ID: 487 + : + PC_PHYS_PORT_ID: 893 + ? + PORT_ID: 488 + : + PC_PHYS_PORT_ID: 881 + ? + PORT_ID: 489 + : + PC_PHYS_PORT_ID: 885 + ? + PORT_ID: 490 + : + PC_PHYS_PORT_ID: 873 + ? + PORT_ID: 491 + : + PC_PHYS_PORT_ID: 877 + ? + PORT_ID: 468 + : + PC_PHYS_PORT_ID: 841 + ? + PORT_ID: 469 + : + PC_PHYS_PORT_ID: 845 + ? + PORT_ID: 470 + : + PC_PHYS_PORT_ID: 833 + ? + PORT_ID: 471 + : + PC_PHYS_PORT_ID: 837 + ? + PORT_ID: 472 + : + PC_PHYS_PORT_ID: 849 + ? + PORT_ID: 473 + : + PC_PHYS_PORT_ID: 853 + ? + PORT_ID: 492 + : + PC_PHYS_PORT_ID: 865 + ? + PORT_ID: 493 + : + PC_PHYS_PORT_ID: 869 + ? + PORT_ID: 474 + : + PC_PHYS_PORT_ID: 857 + ? + PORT_ID: 475 + : + PC_PHYS_PORT_ID: 861 + ? + PORT_ID: 558 + : + PC_PHYS_PORT_ID: 1017 + ? + PORT_ID: 559 + : + PC_PHYS_PORT_ID: 1021 + ? + PORT_ID: 560 + : + PC_PHYS_PORT_ID: 1009 + ? + PORT_ID: 561 + : + PC_PHYS_PORT_ID: 1013 + ? + PORT_ID: 562 + : + PC_PHYS_PORT_ID: 1001 + ? + PORT_ID: 563 + : + PC_PHYS_PORT_ID: 1005 + ? + PORT_ID: 540 + : + PC_PHYS_PORT_ID: 969 + ? + PORT_ID: 541 + : + PC_PHYS_PORT_ID: 973 + ? + PORT_ID: 542 + : + PC_PHYS_PORT_ID: 961 + ? + PORT_ID: 543 + : + PC_PHYS_PORT_ID: 965 + ? + PORT_ID: 544 + : + PC_PHYS_PORT_ID: 977 + ? + PORT_ID: 545 + : + PC_PHYS_PORT_ID: 981 + ? + PORT_ID: 564 + : + PC_PHYS_PORT_ID: 993 + ? + PORT_ID: 565 + : + PC_PHYS_PORT_ID: 997 + ? + PORT_ID: 546 + : + PC_PHYS_PORT_ID: 985 + ? + PORT_ID: 547 + : + PC_PHYS_PORT_ID: 989 + ? + PORT_ID: 126 + : + PC_PHYS_PORT_ID: 233 + ? + PORT_ID: 127 + : + PC_PHYS_PORT_ID: 237 + ? + PORT_ID: 108 + : + PC_PHYS_PORT_ID: 201 + ? + PORT_ID: 109 + : + PC_PHYS_PORT_ID: 205 + ? + PORT_ID: 128 + : + PC_PHYS_PORT_ID: 225 + ? + PORT_ID: 129 + : + PC_PHYS_PORT_ID: 229 + ? + PORT_ID: 110 + : + PC_PHYS_PORT_ID: 217 + ? + PORT_ID: 111 + : + PC_PHYS_PORT_ID: 221 + ? + PORT_ID: 144 + : + PC_PHYS_PORT_ID: 273 + ? + PORT_ID: 145 + : + PC_PHYS_PORT_ID: 277 + ? + PORT_ID: 146 + : + PC_PHYS_PORT_ID: 257 + ? + PORT_ID: 147 + : + PC_PHYS_PORT_ID: 261 + ? + PORT_ID: 162 + : + PC_PHYS_PORT_ID: 305 + ? + PORT_ID: 163 + : + PC_PHYS_PORT_ID: 309 + ? + PORT_ID: 164 + : + PC_PHYS_PORT_ID: 313 + ? + PORT_ID: 165 + : + PC_PHYS_PORT_ID: 317 + ? + PORT_ID: 198 + : + PC_PHYS_PORT_ID: 361 + ? + PORT_ID: 199 + : + PC_PHYS_PORT_ID: 365 + ? + PORT_ID: 180 + : + PC_PHYS_PORT_ID: 329 + ? + PORT_ID: 181 + : + PC_PHYS_PORT_ID: 333 + ? + PORT_ID: 200 + : + PC_PHYS_PORT_ID: 353 + ? + PORT_ID: 201 + : + PC_PHYS_PORT_ID: 357 + ? + PORT_ID: 182 + : + PC_PHYS_PORT_ID: 345 + ? + PORT_ID: 183 + : + PC_PHYS_PORT_ID: 349 + ? + PORT_ID: 216 + : + PC_PHYS_PORT_ID: 401 + ? + PORT_ID: 217 + : + PC_PHYS_PORT_ID: 405 + ? + PORT_ID: 218 + : + PC_PHYS_PORT_ID: 385 + ? + PORT_ID: 219 + : + PC_PHYS_PORT_ID: 389 + ? + PORT_ID: 234 + : + PC_PHYS_PORT_ID: 433 + ? + PORT_ID: 235 + : + PC_PHYS_PORT_ID: 437 + ? + PORT_ID: 236 + : + PC_PHYS_PORT_ID: 441 + ? + PORT_ID: 237 + : + PC_PHYS_PORT_ID: 445 + ? + PORT_ID: 342 + : + PC_PHYS_PORT_ID: 617 + ? + PORT_ID: 343 + : + PC_PHYS_PORT_ID: 621 + ? + PORT_ID: 324 + : + PC_PHYS_PORT_ID: 585 + ? + PORT_ID: 325 + : + PC_PHYS_PORT_ID: 589 + ? + PORT_ID: 344 + : + PC_PHYS_PORT_ID: 609 + ? + PORT_ID: 345 + : + PC_PHYS_PORT_ID: 613 + ? + PORT_ID: 326 + : + PC_PHYS_PORT_ID: 601 + ? + PORT_ID: 327 + : + PC_PHYS_PORT_ID: 605 + ? + PORT_ID: 360 + : + PC_PHYS_PORT_ID: 657 + ? + PORT_ID: 361 + : + PC_PHYS_PORT_ID: 661 + ? + PORT_ID: 362 + : + PC_PHYS_PORT_ID: 641 + ? + PORT_ID: 363 + : + PC_PHYS_PORT_ID: 645 + ? + PORT_ID: 378 + : + PC_PHYS_PORT_ID: 689 + ? + PORT_ID: 379 + : + PC_PHYS_PORT_ID: 693 + ? + PORT_ID: 380 + : + PC_PHYS_PORT_ID: 697 + ? + PORT_ID: 381 + : + PC_PHYS_PORT_ID: 701 + ? + PORT_ID: 414 + : + PC_PHYS_PORT_ID: 745 + ? + PORT_ID: 415 + : + PC_PHYS_PORT_ID: 749 + ? + PORT_ID: 396 + : + PC_PHYS_PORT_ID: 713 + ? + PORT_ID: 397 + : + PC_PHYS_PORT_ID: 717 + ? + PORT_ID: 416 + : + PC_PHYS_PORT_ID: 737 + ? + PORT_ID: 417 + : + PC_PHYS_PORT_ID: 741 + ? + PORT_ID: 398 + : + PC_PHYS_PORT_ID: 729 + ? + PORT_ID: 399 + : + PC_PHYS_PORT_ID: 733 + ? + PORT_ID: 432 + : + PC_PHYS_PORT_ID: 785 + ? + PORT_ID: 433 + : + PC_PHYS_PORT_ID: 789 + ? + PORT_ID: 434 + : + PC_PHYS_PORT_ID: 769 + ? + PORT_ID: 435 + : + PC_PHYS_PORT_ID: 773 + ? + PORT_ID: 450 + : + PC_PHYS_PORT_ID: 817 + ? + PORT_ID: 451 + : + PC_PHYS_PORT_ID: 821 + ? + PORT_ID: 452 + : + PC_PHYS_PORT_ID: 825 + ? + PORT_ID: 453 + : + PC_PHYS_PORT_ID: 829 + ? + PORT_ID: 130 + : + PC_PHYS_PORT_ID: 249 + ? + PORT_ID: 131 + : + PC_PHYS_PORT_ID: 253 + ? + PORT_ID: 132 + : + PC_PHYS_PORT_ID: 241 + ? + PORT_ID: 133 + : + PC_PHYS_PORT_ID: 245 + ? + PORT_ID: 112 + : + PC_PHYS_PORT_ID: 193 + ? + PORT_ID: 113 + : + PC_PHYS_PORT_ID: 197 + ? + PORT_ID: 114 + : + PC_PHYS_PORT_ID: 209 + ? + PORT_ID: 115 + : + PC_PHYS_PORT_ID: 213 + ? + PORT_ID: 148 + : + PC_PHYS_PORT_ID: 281 + ? + PORT_ID: 149 + : + PC_PHYS_PORT_ID: 285 + ? + PORT_ID: 166 + : + PC_PHYS_PORT_ID: 289 + ? + PORT_ID: 167 + : + PC_PHYS_PORT_ID: 293 + ? + PORT_ID: 150 + : + PC_PHYS_PORT_ID: 265 + ? + PORT_ID: 151 + : + PC_PHYS_PORT_ID: 269 + ? + PORT_ID: 168 + : + PC_PHYS_PORT_ID: 297 + ? + PORT_ID: 169 + : + PC_PHYS_PORT_ID: 301 + ? + PORT_ID: 202 + : + PC_PHYS_PORT_ID: 377 + ? + PORT_ID: 203 + : + PC_PHYS_PORT_ID: 381 + ? + PORT_ID: 204 + : + PC_PHYS_PORT_ID: 369 + ? + PORT_ID: 205 + : + PC_PHYS_PORT_ID: 373 + ? + PORT_ID: 184 + : + PC_PHYS_PORT_ID: 321 + ? + PORT_ID: 185 + : + PC_PHYS_PORT_ID: 325 + ? + PORT_ID: 186 + : + PC_PHYS_PORT_ID: 337 + ? + PORT_ID: 187 + : + PC_PHYS_PORT_ID: 341 + ? + PORT_ID: 220 + : + PC_PHYS_PORT_ID: 409 + ? + PORT_ID: 221 + : + PC_PHYS_PORT_ID: 413 + ? + PORT_ID: 238 + : + PC_PHYS_PORT_ID: 417 + ? + PORT_ID: 239 + : + PC_PHYS_PORT_ID: 421 + ? + PORT_ID: 222 + : + PC_PHYS_PORT_ID: 393 + ? + PORT_ID: 223 + : + PC_PHYS_PORT_ID: 397 + ? + PORT_ID: 240 + : + PC_PHYS_PORT_ID: 425 + ? + PORT_ID: 241 + : + PC_PHYS_PORT_ID: 429 + ? + PORT_ID: 346 + : + PC_PHYS_PORT_ID: 633 + ? + PORT_ID: 347 + : + PC_PHYS_PORT_ID: 637 + ? + PORT_ID: 348 + : + PC_PHYS_PORT_ID: 625 + ? + PORT_ID: 349 + : + PC_PHYS_PORT_ID: 629 + ? + PORT_ID: 328 + : + PC_PHYS_PORT_ID: 577 + ? + PORT_ID: 329 + : + PC_PHYS_PORT_ID: 581 + ? + PORT_ID: 330 + : + PC_PHYS_PORT_ID: 593 + ? + PORT_ID: 331 + : + PC_PHYS_PORT_ID: 597 + ? + PORT_ID: 364 + : + PC_PHYS_PORT_ID: 665 + ? + PORT_ID: 365 + : + PC_PHYS_PORT_ID: 669 + ? + PORT_ID: 382 + : + PC_PHYS_PORT_ID: 673 + ? + PORT_ID: 383 + : + PC_PHYS_PORT_ID: 677 + ? + PORT_ID: 366 + : + PC_PHYS_PORT_ID: 649 + ? + PORT_ID: 367 + : + PC_PHYS_PORT_ID: 653 + ? + PORT_ID: 384 + : + PC_PHYS_PORT_ID: 681 + ? + PORT_ID: 385 + : + PC_PHYS_PORT_ID: 685 + ? + PORT_ID: 418 + : + PC_PHYS_PORT_ID: 761 + ? + PORT_ID: 419 + : + PC_PHYS_PORT_ID: 765 + ? + PORT_ID: 420 + : + PC_PHYS_PORT_ID: 753 + ? + PORT_ID: 421 + : + PC_PHYS_PORT_ID: 757 + ? + PORT_ID: 400 + : + PC_PHYS_PORT_ID: 705 + ? + PORT_ID: 401 + : + PC_PHYS_PORT_ID: 709 + ? + PORT_ID: 402 + : + PC_PHYS_PORT_ID: 721 + ? + PORT_ID: 403 + : + PC_PHYS_PORT_ID: 725 + ? + PORT_ID: 436 + : + PC_PHYS_PORT_ID: 793 + ? + PORT_ID: 437 + : + PC_PHYS_PORT_ID: 797 + ? + PORT_ID: 454 + : + PC_PHYS_PORT_ID: 801 + ? + PORT_ID: 455 + : + PC_PHYS_PORT_ID: 805 + ? + PORT_ID: 438 + : + PC_PHYS_PORT_ID: 777 + ? + PORT_ID: 439 + : + PC_PHYS_PORT_ID: 781 + ? + PORT_ID: 456 + : + PC_PHYS_PORT_ID: 809 + ? + PORT_ID: 457 + : + PC_PHYS_PORT_ID: 813 + ? + PORT_ID: 1 + : + PC_PHYS_PORT_ID: 25 + ? + PORT_ID: 2 + : + PC_PHYS_PORT_ID: 29 + ? + PORT_ID: 18 + : + PC_PHYS_PORT_ID: 33 + ? + PORT_ID: 19 + : + PC_PHYS_PORT_ID: 37 + ? + PORT_ID: 3 + : + PC_PHYS_PORT_ID: 17 + ? + PORT_ID: 4 + : + PC_PHYS_PORT_ID: 21 + ? + PORT_ID: 5 + : + PC_PHYS_PORT_ID: 1 + ? + PORT_ID: 6 + : + PC_PHYS_PORT_ID: 5 + ? + PORT_ID: 7 + : + PC_PHYS_PORT_ID: 9 + ? + PORT_ID: 8 + : + PC_PHYS_PORT_ID: 13 + ? + PORT_ID: 20 + : + PC_PHYS_PORT_ID: 41 + ? + PORT_ID: 21 + : + PC_PHYS_PORT_ID: 45 + ? + PORT_ID: 22 + : + PC_PHYS_PORT_ID: 49 + ? + PORT_ID: 23 + : + PC_PHYS_PORT_ID: 53 + ? + PORT_ID: 24 + : + PC_PHYS_PORT_ID: 57 + ? + PORT_ID: 25 + : + PC_PHYS_PORT_ID: 61 + ? + PORT_ID: 72 + : + PC_PHYS_PORT_ID: 153 + ? + PORT_ID: 73 + : + PC_PHYS_PORT_ID: 157 + ? + PORT_ID: 90 + : + PC_PHYS_PORT_ID: 161 + ? + PORT_ID: 91 + : + PC_PHYS_PORT_ID: 165 + ? + PORT_ID: 74 + : + PC_PHYS_PORT_ID: 145 + ? + PORT_ID: 75 + : + PC_PHYS_PORT_ID: 149 + ? + PORT_ID: 76 + : + PC_PHYS_PORT_ID: 129 + ? + PORT_ID: 77 + : + PC_PHYS_PORT_ID: 133 + ? + PORT_ID: 78 + : + PC_PHYS_PORT_ID: 137 + ? + PORT_ID: 79 + : + PC_PHYS_PORT_ID: 141 + ? + PORT_ID: 92 + : + PC_PHYS_PORT_ID: 169 + ? + PORT_ID: 93 + : + PC_PHYS_PORT_ID: 173 + ? + PORT_ID: 94 + : + PC_PHYS_PORT_ID: 177 + ? + PORT_ID: 95 + : + PC_PHYS_PORT_ID: 181 + ? + PORT_ID: 96 + : + PC_PHYS_PORT_ID: 185 + ? + PORT_ID: 97 + : + PC_PHYS_PORT_ID: 189 + ? + PORT_ID: 288 + : + PC_PHYS_PORT_ID: 537 + ? + PORT_ID: 289 + : + PC_PHYS_PORT_ID: 541 + ? + PORT_ID: 306 + : + PC_PHYS_PORT_ID: 545 + ? + PORT_ID: 307 + : + PC_PHYS_PORT_ID: 549 + ? + PORT_ID: 290 + : + PC_PHYS_PORT_ID: 529 + ? + PORT_ID: 291 + : + PC_PHYS_PORT_ID: 533 + ? + PORT_ID: 292 + : + PC_PHYS_PORT_ID: 513 + ? + PORT_ID: 293 + : + PC_PHYS_PORT_ID: 517 + ? + PORT_ID: 294 + : + PC_PHYS_PORT_ID: 521 + ? + PORT_ID: 295 + : + PC_PHYS_PORT_ID: 525 + ? + PORT_ID: 308 + : + PC_PHYS_PORT_ID: 553 + ? + PORT_ID: 309 + : + PC_PHYS_PORT_ID: 557 + ? + PORT_ID: 310 + : + PC_PHYS_PORT_ID: 561 + ? + PORT_ID: 311 + : + PC_PHYS_PORT_ID: 565 + ? + PORT_ID: 312 + : + PC_PHYS_PORT_ID: 569 + ? + PORT_ID: 313 + : + PC_PHYS_PORT_ID: 573 + ? + PORT_ID: 504 + : + PC_PHYS_PORT_ID: 921 + ? + PORT_ID: 505 + : + PC_PHYS_PORT_ID: 925 + ? + PORT_ID: 522 + : + PC_PHYS_PORT_ID: 929 + ? + PORT_ID: 523 + : + PC_PHYS_PORT_ID: 933 + ? + PORT_ID: 506 + : + PC_PHYS_PORT_ID: 913 + ? + PORT_ID: 507 + : + PC_PHYS_PORT_ID: 917 + ? + PORT_ID: 508 + : + PC_PHYS_PORT_ID: 897 + ? + PORT_ID: 509 + : + PC_PHYS_PORT_ID: 901 + ? + PORT_ID: 510 + : + PC_PHYS_PORT_ID: 905 + ? + PORT_ID: 511 + : + PC_PHYS_PORT_ID: 909 + ? + PORT_ID: 524 + : + PC_PHYS_PORT_ID: 937 + ? + PORT_ID: 525 + : + PC_PHYS_PORT_ID: 941 + ? + PORT_ID: 526 + : + PC_PHYS_PORT_ID: 945 + ? + PORT_ID: 527 + : + PC_PHYS_PORT_ID: 949 + ? + PORT_ID: 528 + : + PC_PHYS_PORT_ID: 953 + ? + PORT_ID: 529 + : + PC_PHYS_PORT_ID: 957 + ? + PORT_ID: 268 + : + PC_PHYS_PORT_ID: 1026 +... +--- +device: + 0: + PC_PORT: + ? + PORT_ID: 1 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 2 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 3 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 4 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 5 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 6 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 7 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 8 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 18 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 19 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 20 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 21 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 22 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 23 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 24 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 25 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 36 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 37 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 38 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 39 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 40 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 41 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 42 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 43 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 54 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 55 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 56 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 57 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 58 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 59 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 60 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 61 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 72 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 73 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 74 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 75 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 76 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 77 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 78 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 79 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 90 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 91 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 92 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 93 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 94 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 95 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 96 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 97 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 108 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 109 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 110 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 111 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 112 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 113 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 114 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 115 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 126 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 127 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 128 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 129 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 130 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 131 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 132 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 133 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 144 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 145 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 146 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 147 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 148 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 149 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 150 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 151 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 162 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 163 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 164 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 165 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 166 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 167 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 168 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 169 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 180 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 181 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 182 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 183 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 184 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 185 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 186 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 187 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 198 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 199 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 200 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 201 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 202 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 203 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 204 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 205 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 216 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 217 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 218 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 219 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 220 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 221 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 222 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 223 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 234 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 235 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 236 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 237 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 238 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 239 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 240 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 241 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 252 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 253 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 254 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 255 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 256 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 257 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 258 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 259 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 268 + : + ENABLE: 0 + SPEED: 100000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS528 + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 270 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 271 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 272 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 273 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 274 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 275 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 276 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 277 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 288 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 289 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 290 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 291 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 292 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 293 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 294 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 295 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 306 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 307 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 308 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 309 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 310 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 311 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 312 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 313 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 324 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 325 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 326 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 327 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 328 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 329 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 330 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 331 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 342 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 343 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 344 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 345 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 346 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 347 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 348 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 349 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 360 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 361 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 362 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 363 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 364 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 365 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 366 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 367 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 378 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 379 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 380 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 381 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 382 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 383 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 384 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 385 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 396 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 397 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 398 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 399 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 400 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 401 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 402 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 403 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 414 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 415 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 416 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 417 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 418 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 419 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 420 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 421 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 432 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 433 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 434 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 435 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 436 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 437 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 438 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 439 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 450 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 451 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 452 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 453 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 454 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 455 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 456 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 457 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 468 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 469 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 470 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 471 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 472 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 473 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 474 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 475 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 486 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 487 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 488 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 489 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 490 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 491 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 492 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 493 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 504 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 505 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 506 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 507 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 508 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 509 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 510 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 511 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 522 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 523 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 524 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 525 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 526 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 527 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 528 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 529 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 540 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 541 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 542 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 543 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 544 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 545 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 546 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 547 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 558 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 559 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 560 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 561 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 562 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 563 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 564 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 565 + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 +... +--- +device: + 0: + PC_TX_TAPS: +... +--- +bcm_device: + 0: + global: + pktio_mode: 1 + sai_mmu_custom_config : 1 + sai_ip_counter_cstats: 1 + vlan_flooding_l2mc_num_reserved: 0 + ipv6_lpm_128b_enable: 1 + shared_block_mask_section: uc_bc + skip_protocol_default_entries: 1 + # LTSW uses value 1 for ALPM combined mode + l3_alpm_template: 1 + l3_alpm_hit_skip: 1 + sai_feat_tail_timestamp : 0 + sai_port_phy_time_sync_en : 1 + sai_field_group_auto_prioritize: 1 + #l3_intf_vlan_split_egress for MTU at L3IF + l3_intf_vlan_split_egress : 1 + pfc_deadlock_seq_control : 0 + sai_pfc_dlr_init_capability: 2 + #srv6:0x10 ipinip:0x2 + sai_tunnel_support: 0x12 + bcm_tunnel_term_compatible_mode: 1 + l3_ecmp_member_first_lkup_mem_size: 32768 + #enable port queue drop stats + sai_stats_support_mask: 0x80 + #disable vxlan tunnel stats + sai_stats_disable_mask: 0x200 + #For PPIU Mode, Set resources for counters in global mode counters like ACL, etc + global_flexctr_ing_action_num_reserved: 20 + global_flexctr_ing_pool_num_reserved: 8 + global_flexctr_ing_op_profile_num_reserved: 20 + global_flexctr_ing_group_num_reserved: 2 + global_flexctr_egr_action_num_reserved: 8 + global_flexctr_egr_pool_num_reserved: 5 + global_flexctr_egr_op_profile_num_reserved: 10 + global_flexctr_egr_group_num_reserved: 1 + l3_alpm_large_vrf_mode: 1 + l3_ecmp_member_secondary_mem_size: 8192 + stat_custom_receive0_management_mode: 1 + sai_tunnel_ipinip_multi_vrf_support: 1 +... +--- +device: + 0: + DEVICE_CONFIG: + AUTOLOAD_BOARD_SETTINGS: 0 +... +--- +device: + '*': + TM_THD_CONFIG: + MIRROR_ON_DROP_RESERVATION: 0 + SKIP_BUFFER_RESERVATION: 1 + THRESHOLD_MODE: LOSSY_AND_LOSSLESS + + TM_SCHEDULER_CONFIG: + NUM_MC_Q: NUM_MC_Q_4 +... +--- +device: + 0: + # Per pipe flex counter configuration. Enable PPIU Mode + CTR_EFLEX_CONFIG: + CTR_ING_EFLEX_OPERMODE_PIPEUNIQUE: 1 + CTR_ING_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1 + CTR_EGR_EFLEX_OPERMODE_PIPEUNIQUE: 1 + CTR_EGR_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1 + + # IFP mode + FP_CONFIG: + FP_ING_OPERMODE: GLOBAL_PIPE_AWARE + + #CTR COS_ENABLE + CTR_ING_COS_Q_CONFIG: + COS_ENABLE: 0 + +... +# Initialize the various thresholds to zero +--- +# Ingress service pool level initialization +device: + 0: + # Ingress service pool + TM_ING_THD_SERVICE_POOL: + ? + BUFFER_POOL: [0] + TM_ING_SERVICE_POOL_ID: [[0,3]] + : + COLOR_SPECIFIC_LIMITS: 0 + SHARED_LIMIT_CELLS: 0 + SHARED_RESUME_OFFSET_CELLS: 0 + YELLOW_OFFSET_CELLS: 0 + RED_OFFSET_CELLS: 0 + + # Ingress headroom pool + TM_ING_THD_HEADROOM_POOL: + ? + BUFFER_POOL: [0] + TM_HEADROOM_POOL_ID: [[0,3]] + : + LIMIT_CELLS: 0 + +... +# Ingress priority to PG mappings +--- +device: + 0: + # priority to PG mapping for UC traffic, 8 profiles (IDs), 16 priorties + TM_ING_UC_ING_PRI_MAP: + ? + # Profile 0 + TM_ING_UC_ING_PRI_MAP_ID: [[0,7]] + ING_PRI: [[0,15]] + : + TM_PRI_GRP_ID: 0 + + # priority to PG mapping for MC traffic, 8 profiles( IDs) 16 priorities + TM_ING_NONUC_ING_PRI_MAP: + ? + # Profile 0 + TM_ING_NONUC_ING_PRI_MAP_ID: [[0,7]] + ING_PRI: [[0,15]] + : + TM_PRI_GRP_ID: 0 + + TM_PRI_GRP_POOL_MAP: + ? + TM_PRI_GRP_POOL_MAP_ID: [[0,7]] + TM_PRI_GRP_ID: [[0,7]] + : + TM_ING_SERVICE_POOL_ID: 0 + TM_HEADROOM_POOL_ID: 0 + + # PFC generation: Priority group(s) + TM_PFC_PRI_TO_PRI_GRP_MAP: + ? + TM_PFC_PRI_TO_PRI_GRP_MAP_ID: [[0,7]] + PFC_PRI: [[0,7]] + : + TM_PRI_GRP_ID: 0 + +... +# Egress service pool level initialization +# Output port Thresholds +--- +device: + 0: + # Egress unicast shared pool + TM_EGR_THD_SERVICE_POOL: + ? + BUFFER_POOL: [0] + TM_EGR_SERVICE_POOL_ID: [[0,3]] + : + SHARED_LIMIT_CELLS: 0 + + # Egress multicast CQE pool + TM_THD_MC_EGR_SERVICE_POOL: + ? + BUFFER_POOL: [0] + TM_EGR_SERVICE_POOL_ID: [[0,3]] + : + COLOR_SPECIFIC_LIMITS: 0 + SHARED_LIMIT_CELLS: 0 + SHARED_RESUME_LIMIT_CELLS: 0 + YELLOW_SHARED_LIMIT_CELLS: 0 + YELLOW_SHARED_RESUME_LIMIT_CELLS: 0 + RED_SHARED_LIMIT_CELLS: 0 + RED_SHARED_RESUME_LIMIT_CELLS: 0 + + + TM_THD_DYNAMIC_MARGIN: + ? + BUFFER_POOL: [0] + TM_EGR_SERVICE_POOL_ID: [[0,3]] + : + MARGIN: [29959, 59918, 89877, 119837, 149796, 179755, 209715, 239674, 269633, 299593] + +... +#Per Port Registers +#Input Port Thresholds +--- +device: + 0: + # Set PG is LOSSLESS, PFC enable bit + TM_ING_PORT_PRI_GRP: + ? + PORT_ID: [[0,8], [17,25], [35,43], [52,61], [71,79], [89,97], [107,115], [125,133], [143,151], [161,169], [179,187], [197,205], [215,223], [233,241], [251,259], [268,277], [287,295], [305,313], [323,331], [340,349], [359,367], [377,385], [395,403], [413,421], [431,439], [449,457], [467,475], [485,493], [503,511], [521,529], [539,547], [556,565], 575] + TM_PRI_GRP_ID: [[0,7]] + : + PFC: 0 + LOSSLESS: 0 + ING_MIN_MODE: USE_PRI_GRP_MIN + + TM_ING_PORT: + ? + PORT_ID: [[0,8], [17,25], [35,43], [52,61], [71,79], [89,97], [107,115], [125,133], [143,151], [161,169], [179,187], [197,205], [215,223], [233,241], [251,259], [268,277], [287,295], [305,313], [323,331], [340,349], [359,367], [377,385], [395,403], [413,421], [431,439], [449,457], [467,475], [485,493], [503,511], [521,529], [539,547], [556,565], 575] + : + # Pause enable bit, + PAUSE: 0 + # Ingress priority profile select, maps to priority group + ING_PRI_MAP_ID: 0 + #Priority group profile select, maps to service pool + PRI_GRP_MAP_ID: 0 + + # Ingress port Level to Service Pool limits + TM_ING_THD_PORT_SERVICE_POOL: + ? + PORT_ID: [[0,8], [17,25], [35,43], [52,61], [71,79], [89,97], [107,115], [125,133], [143,151], [161,169], [179,187], [197,205], [215,223], [233,241], [251,259], [268,277], [287,295], [305,313], [323,331], [340,349], [359,367], [377,385], [395,403], [413,421], [431,439], [449,457], [467,475], [485,493], [503,511], [521,529], [539,547], [556,565], 575] + TM_ING_SERVICE_POOL_ID: [[0,3]] + : + MIN_GUARANTEE_CELLS: 0 + SHARED_LIMIT_CELLS: 0 + RESUME_LIMIT_CELLS: 0 + + # Port level PG limits + TM_ING_THD_PORT_PRI_GRP: + ? + PORT_ID: [[0,8], [17,25], [35,43], [52,61], [71,79], [89,97], [107,115], [125,133], [143,151], [161,169], [179,187], [197,205], [215,223], [233,241], [251,259], [268,277], [287,295], [305,313], [323,331], [340,349], [359,367], [377,385], [395,403], [413,421], [431,439], [449,457], [467,475], [485,493], [503,511], [521,529], [539,547], [556,565], 575] + TM_PRI_GRP_ID: [[0,7]] + : + MIN_GUARANTEE_CELLS: 0 + DYNAMIC_SHARED_LIMITS: 0 + SHARED_LIMIT_CELLS_STATIC: 0 + RESUME_OFFSET_CELLS: 0 + RESUME_FLOOR_CELLS: 0 + HEADROOM_LIMIT_AUTO: 0 + HEADROOM_LIMIT_CELLS: 0 + EARLY_PFC_XOFF_OFFSET_CELLS: 0 + EARLY_PFC_XON_OFFSET_CELLS: 0 + EARLY_PFC_FLOOR_CELLS: 0 + # Additional CPU port initialization + ? + PORT_ID: 520 + TM_PRI_GRP_ID: [[0,7]] + : + MIN_GUARANTEE_CELLS: 0 + DYNAMIC_SHARED_LIMITS: 0 + SHARED_LIMIT_CELLS_STATIC: 0 + RESUME_OFFSET_CELLS: 0 + RESUME_FLOOR_CELLS: 0 + HEADROOM_LIMIT_AUTO: 0 + HEADROOM_LIMIT_CELLS: 0 + EARLY_PFC_XOFF_OFFSET_CELLS: 0 + EARLY_PFC_XON_OFFSET_CELLS: 0 + EARLY_PFC_FLOOR_CELLS: 0 + +... +# Output Port Thresholds -2 +# Per Unicast Queue Thresholds +--- +device: + 0: + TM_EGR_SERVICE_POOL_DYNAMIC: + ? + BUFFER_POOL: [0] + TM_EGR_SERVICE_POOL_ID: [[0,3]] + : + ADAPTIVE_DYNAMIC: ALPHA_1 + + TM_PORT_UC_Q_TO_SERVICE_POOL: + ? + PORT_ID: [[1,8], [17,25], [35,43], [52,61], [71,79], [89,97], [107,115], [125,133], [143,151], [161,169], [179,187], [197,205], [215,223], [233,241], [251,259], [268,277], [287,295], [305,313], [323,331], [340,349], [359,367], [377,385], [395,403], [413,421], [431,439], [449,457], [467,475], [485,493], [503,511], [521,529], [539,547], [556,565], 575] + TM_UC_Q_ID: [[0,7]] + : + USE_QGROUP_MIN: 0 + + TM_THD_UC_Q: + ? + PORT_ID: [[1,8], [17,25], [35,43], [52,61], [71,79], [89,97], [107,115], [125,133], [143,151], [161,169], [179,187], [197,205], [215,223], [233,241], [251,259], [268,277], [287,295], [305,313], [323,331], [340,349], [359,367], [377,385], [395,403], [413,421], [431,439], [449,457], [467,475], [485,493], [503,511], [521,529], [539,547], [556,565], 575] + TM_UC_Q_ID: [[0,7]] + : + MIN_GUARANTEE_CELLS: 0 + SHARED_LIMITS: 1 + DYNAMIC_SHARED_LIMITS: 0 + SHARED_LIMIT_CELLS_STATIC: 0 + + TM_PORT_MC_Q_TO_SERVICE_POOL: + ? + PORT_ID: [[1,8], [17,25], [35,43], [52,61], [71,79], [89,97], [107,115], [125,133], [143,151], [161,169], [179,187], [197,205], [215,223], [233,241], [251,259], [268,277], [287,295], [305,313], [323,331], [340,349], [359,367], [377,385], [395,403], [413,421], [431,439], [449,457], [467,475], [485,493], [503,511], [521,529], [539,547], [556,565], 575] + TM_MC_Q_ID: [[0,3]] + : + USE_QGROUP_MIN: 0 + + TM_THD_MC_Q: + ? + # uplink, downlink and loopback ports + PORT_ID: [[1,8], [17,25], [35,43], [52,61], [71,79], [89,97], [107,115], [125,133], [143,151], [161,169], [179,187], [197,205], [215,223], [233,241], [251,259], [268,277], [287,295], [305,313], [323,331], [340,349], [359,367], [377,385], [395,403], [413,421], [431,439], [449,457], [467,475], [485,493], [503,511], [521,529], [539,547], [556,565], 575] + TM_MC_Q_ID: [[0,3]] + : + MIN_GUARANTEE_CELLS: 0 + SHARED_LIMITS: 1 + DYNAMIC_SHARED_LIMITS: 0 + SHARED_LIMIT_CELLS_STATIC: 0 + + TM_THD_CPU_Q: + ? + # CPU port, 48 MC queues + PORT_ID: [0,520] + TM_CPU_Q_ID: [[0,47]] + : + MIN_GUARANTEE_CELLS: 0 + SHARED_LIMITS: 0 + DYNAMIC_SHARED_LIMITS: 0 + SHARED_LIMIT_CELLS_STATIC: 0 + + TM_THD_Q_GRP: + ? + PORT_ID: [[1,8], [17,25], [35,43], [52,61], [71,79], [89,97], [107,115], [125,133], [143,151], [161,169], [179,187], [197,205], [215,223], [233,241], [251,259], [268,277], [287,295], [305,313], [323,331], [340,349], [359,367], [377,385], [395,403], [413,421], [431,439], [449,457], [467,475], [485,493], [503,511], [521,529], [539,547], [556,565], 575] + : + UC_Q_GRP_MIN_GUARANTEE_CELLS: 0 + MC_Q_GRP_MIN_GUARANTEE_CELLS: 0 + + TM_EGR_THD_UC_PORT_QSET: + ? + PORT_ID: [[1,8], [17,25], [35,43], [52,61], [71,79], [89,97], [107,115], [125,133], [143,151], [161,169], [179,187], [197,205], [215,223], [233,241], [251,259], [268,277], [287,295], [305,313], [323,331], [340,349], [359,367], [377,385], [395,403], [413,421], [431,439], [449,457], [467,475], [485,493], [503,511], [521,529], [539,547], [556,565], 575] + QSET_ID: [[0,3]] + : + COLOR_SPECIFIC_LIMITS: 0 + SHARED_LIMIT_CELLS: 0 + SHARED_RESUME_LIMIT_CELLS: 0 + YELLOW_SHARED_LIMIT_CELLS: 0 + YELLOW_SHARED_RESUME_LIMIT_CELLS: 0 + RED_SHARED_LIMIT_CELLS: 0 + RED_SHARED_RESUME_LIMIT_CELLS: 0 + + TM_EGR_THD_MC_PORT_QSET: + ? + PORT_ID: [[1,8], [17,25], [35,43], [52,61], [71,79], [89,97], [107,115], [125,133], [143,151], [161,169], [179,187], [197,205], [215,223], [233,241], [251,259], [268,277], [287,295], [305,313], [323,331], [340,349], [359,367], [377,385], [395,403], [413,421], [431,439], [449,457], [467,475], [485,493], [503,511], [521,529], [539,547], [556,565], 575] + QSET_ID: [[0,3]] + : + COLOR_SPECIFIC_LIMITS: 0 + RED_SHARED_LIMIT_CELLS: 0 + YELLOW_SHARED_LIMIT_CELLS: 0 + SHARED_LIMIT_CELLS: 0 + RED_SHARED_RESUME_LIMIT_CELLS: 0 + YELLOW_SHARED_RESUME_LIMIT_CELLS: 0 + SHARED_RESUME_LIMIT_CELLS: 0 +... +... +### THDR Limits : initialization +--- +device: + 0: + TM_THD_REPL_Q: + ? + REPL_Q_NUM: [[0,6]] + : + SHARED_LIMITS: 0 + DYNAMIC_SHARED_LIMITS: 0 + SHARED_LIMIT_DYNAMIC: ALPHA_1 + RESUME_OFFSET_CELLS: 0 + COLOR_SPECIFIC_LIMITS: 0 + COLOR_SPECIFIC_DYNAMIC_LIMITS: 0 + YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750 + RED_LIMIT_DYNAMIC: PERCENTAGE_625 + SHARED_LIMIT_PKTS: 0 + DYNAMIC_SHARED_LIMIT_PKTS: 0 + SHARED_LIMIT_DYNAMIC_PKTS: ALPHA_1 + RESUME_OFFSET_PKTS: 0 + COLOR_SPECIFIC_LIMIT_PKTS: 0 + COLOR_SPECIFIC_DYNAMIC_LIMIT_PKTS: 0 + YELLOW_LIMIT_DYNAMIC_PKTS: PERCENTAGE_750 + RED_LIMIT_DYNAMIC_PKTS: PERCENTAGE_625 + MIN_GUARANTEE_CELLS: 0 + MIN_GUARANTEE_PKTS: 0 + + TM_THD_REPL_SERVICE_POOL: + SHARED_LIMIT_CELLS: 0 + SHARED_RESUME_LIMIT_CELLS: 0 + COLOR_SPECIFIC_LIMITS: 0 + YELLOW_SHARED_LIMIT_CELLS: 0 + YELLOW_SHARED_RESUME_LIMIT_CELLS: 0 + RED_SHARED_LIMIT_CELLS: 0 + RED_SHARED_RESUME_LIMIT_CELLS: 0 + SHARED_LIMIT_PKTS: 0 + SHARED_RESUME_LIMIT_PKTS: 0 + COLOR_SPECIFIC_LIMITS: 0 + YELLOW_SHARED_LIMIT_PKTS: 0 + YELLOW_SHARED_RESUME_LIMIT_PKTS: 0 + RED_SHARED_LIMIT_PKTS: 0 + RED_SHARED_RESUME_LIMIT_PKTS: 0 + +... +### Begin MMU ingress threshold settings + +### Pools +--- +device: + 0: +# Ingress Service Pool Thresholds + TM_ING_THD_SERVICE_POOL: + ? + BUFFER_POOL: [0] + TM_ING_SERVICE_POOL_ID: 0 + : + SHARED_LIMIT_CELLS: 420194 + YELLOW_SHARED_LIMIT_CELLS: 315146 + RED_SHARED_LIMIT_CELLS: 262622 + SHARED_RESUME_OFFSET_CELLS: 46 + YELLOW_OFFSET_CELLS: 46 + RED_OFFSET_CELLS: 46 + COLOR_SPECIFIC_LIMITS: 0 + ? + BUFFER_POOL: [0] + TM_ING_SERVICE_POOL_ID: 1 + : + SHARED_LIMIT_CELLS: 0 + YELLOW_SHARED_LIMIT_CELLS: 0 + RED_SHARED_LIMIT_CELLS: 0 + SHARED_RESUME_OFFSET_CELLS: 0 + YELLOW_OFFSET_CELLS: 0 + RED_OFFSET_CELLS: 0 + COLOR_SPECIFIC_LIMITS: 0 + + +# Ingress Headroom Pool Thresholds + TM_ING_THD_HEADROOM_POOL: + ? + BUFFER_POOL: [0] + TM_HEADROOM_POOL_ID: 0 + : + LIMIT_CELLS: 194176 + +... +--- +device: + 0: +# UC Traffic Priority to PG mapping + TM_ING_UC_ING_PRI_MAP: + ? + # Profile 0 + TM_ING_UC_ING_PRI_MAP_ID: 0 + ING_PRI: [[0,2],[5,15]] + : + TM_PRI_GRP_ID: 0 + ? + TM_ING_UC_ING_PRI_MAP_ID: 0 + ING_PRI: 3 + : + TM_PRI_GRP_ID: 3 + ? + TM_ING_UC_ING_PRI_MAP_ID: 0 + ING_PRI: 4 + : + TM_PRI_GRP_ID: 4 + ? + # Profile 1 + TM_ING_UC_ING_PRI_MAP_ID: 1 + ING_PRI: [[0,15]] + : + TM_PRI_GRP_ID: 7 + +# MC Traffic Priority to PG mapping + TM_ING_NONUC_ING_PRI_MAP: + ? + # Profile 0 + TM_ING_NONUC_ING_PRI_MAP_ID: 0 + ING_PRI: [[0,2],[5,15]] + : + TM_PRI_GRP_ID: 0 + ? + TM_ING_NONUC_ING_PRI_MAP_ID: 0 + ING_PRI: 3 + : + TM_PRI_GRP_ID: 3 + ? + TM_ING_NONUC_ING_PRI_MAP_ID: 0 + ING_PRI: 4 + : + TM_PRI_GRP_ID: 4 + ? + # Profile 1 + TM_ING_NONUC_ING_PRI_MAP_ID: 1 + ING_PRI: [[0,15]] + : + TM_PRI_GRP_ID: 7 + +# PG to Headroom Pool Mapping + TM_PRI_GRP_POOL_MAP: + ? + TM_PRI_GRP_POOL_MAP_ID: 0 + TM_PRI_GRP_ID: [[0,7]] + : + TM_HEADROOM_POOL_ID: 0 + +# PG to Service Pool Mapping + TM_PRI_GRP_POOL_MAP: + ? + TM_PRI_GRP_POOL_MAP_ID: 0 + TM_PRI_GRP_ID: [[0,7]] + : + TM_ING_SERVICE_POOL_ID: 0 + +# Ingress PG to PFC priority mapping +# TM_PFC_PRI_TO_PRI_GRP_MAP is mapped to MMU_THDI_PFCPRI_PG_PROFILE in physical table. There are 8 profiles to configure the PFC to priority group mappings. For exmple, you could map multiple PG to a PFC. This is needed to generate PFC when a PG is hitting the limits. + TM_PFC_PRI_TO_PRI_GRP_MAP: + ? + TM_PFC_PRI_TO_PRI_GRP_MAP_ID: 0 + PFC_PRI: 3 + : + TM_PRI_GRP_ID: 3 + ? + TM_PFC_PRI_TO_PRI_GRP_MAP_ID: 0 + PFC_PRI: 4 + : + TM_PRI_GRP_ID: 4 + +# Per input port PG and flow control configurations +# TM_ING_PORT_PRI_GRP is mapped to MMU_THDI_ING_PORT_CONFIG in physical table + TM_ING_PORT_PRI_GRP: + ? + PORT_ID: [[288,295], [306,313], [324,331], [342,349], [360,367], [378,385], [396,403], [414,421], [432,439], [450,457], [468,475], [486,493], [504,511], [522,529], [540,547], [558,565]] + TM_PRI_GRP_ID: [3,4] + : + PFC: 1 + LOSSLESS: 1 + ? + PORT_ID: [[1,8], [18,25], [36,43], [54,61], [72,79], [90,97], [108,115], [126,133], [144,151], [162,169], [180,187], [198,205], [216,223], [234,241], [252,259], [270,277]] + TM_PRI_GRP_ID: [3,4] + : + PFC: 1 + LOSSLESS: 1 + +# ING_PRI_MAP_ID is the ingress priority PG profile select, which maps to the Priority Group +# PRI_GRP_MAP_ID is the Priority Group profile select, which maps to service pool + TM_ING_PORT: + ? + PORT_ID: [0] + : + ING_PRI_MAP_ID: 0 + PRI_GRP_MAP_ID: 0 + ? + PORT_ID: [[288,295], [306,313], [324,331], [342,349], [360,367], [378,385], [396,403], [414,421], [432,439], [450,457], [468,475], [486,493], [504,511], [522,529], [540,547], [558,565]] + : + ING_PRI_MAP_ID: 0 + PRI_GRP_MAP_ID: 0 + ? + PORT_ID: [[1,8], [18,25], [36,43], [54,61], [72,79], [90,97], [108,115], [126,133], [144,151], [162,169], [180,187], [198,205], [216,223], [234,241], [252,259], [270,277]] + : + ING_PRI_MAP_ID: 0 + PRI_GRP_MAP_ID: 0 + ? + PORT_ID: [52, 268, 340, 556] + : + ING_PRI_MAP_ID: 0 + PRI_GRP_MAP_ID: 0 + ? + PORT_ID: [17, 35, 53, 71, 89, 107, 125, 143, 161, 179, 197, 215, 233, 251, 269, 287, 305, 323, 341, 359, 377, 395, 413, 431, 449, 467, 485, 503, 521, 539, 557, 575] + : + ING_PRI_MAP_ID: 0 + PRI_GRP_MAP_ID: 0 + +... + + +###################################### +--- +device: + 0: +# Per input port Service Pool Thresholds + TM_ING_THD_PORT_SERVICE_POOL: + ? + PORT_ID: [[0,8], [17,25], [35,43], [52,61], [71,79], [89,97], [107,115], [125,133], [143,151], [161,169], [179,187], [197,205], [215,223], [233,241], [251,259], [268,277], [287,295], [305,313], [323,331], [340,349], [359,367], [377,385], [395,403], [413,421], [431,439], [449,457], [467,475], [485,493], [503,511], [521,529], [539,547], [556,565], 575] + TM_ING_SERVICE_POOL_ID: 0 + : + MIN_GUARANTEE_CELLS: 0 + SHARED_LIMIT_CELLS: 631745 + RESUME_LIMIT_CELLS: 631745 + +# Per input Port PG Thresholds + TM_ING_THD_PORT_PRI_GRP: + ? + PORT_ID: [[0,8], [17,25], [35,43], [52,61], [71,79], [89,97], [107,115], [125,133], [143,151], [161,169], [179,187], [197,205], [215,223], [233,241], [251,259], [268,277], [287,295], [305,313], [323,331], [340,349], [359,367], [377,385], [395,403], [413,421], [431,439], [449,457], [467,475], [485,493], [503,511], [521,529], [539,547], [556,565], 575] + TM_PRI_GRP_ID: [0, 1, 2, 5, 6, 7] + : + MIN_GUARANTEE_CELLS: 0 + DYNAMIC_SHARED_LIMITS: 0 + SHARED_LIMIT_CELLS_STATIC: 631745 + HEADROOM_LIMIT_CELLS: 0 + RESUME_OFFSET_CELLS: 0 + RESUME_FLOOR_CELLS: 0 + HEADROOM_LIMIT_AUTO: 0 + ? + PORT_ID: [[1,8], [18,25], [36,43], [54,61], [72,79], [90,97], [108,115], [126,133], [144,151], [162,169], [180,187], [198,205], [216,223], [234,241], [252,259], [270,277]] + TM_PRI_GRP_ID: [3] + : + MIN_GUARANTEE_CELLS: 22 + DYNAMIC_SHARED_LIMITS: 1 + SHARED_LIMIT_DYNAMIC: ALPHA_1 + RESUME_OFFSET_CELLS: 8 + RESUME_FLOOR_CELLS: 0 + HEADROOM_LIMIT_AUTO: 0 + HEADROOM_LIMIT_CELLS: 12747 + ? + PORT_ID: [[1,8], [18,25], [36,43], [54,61], [72,79], [90,97], [108,115], [126,133], [144,151], [162,169], [180,187], [198,205], [216,223], [234,241], [252,259], [270,277]] + TM_PRI_GRP_ID: [4] + : + MIN_GUARANTEE_CELLS: 8 + DYNAMIC_SHARED_LIMITS: 1 + SHARED_LIMIT_DYNAMIC: ALPHA_1 + RESUME_OFFSET_CELLS: 8 + RESUME_FLOOR_CELLS: 0 + HEADROOM_LIMIT_AUTO: 0 + HEADROOM_LIMIT_CELLS: 12747 + ? + PORT_ID: [[288,295], [306,313], [324,331], [342,349], [360,367], [378,385], [396,403], [414,421], [432,439], [450,457], [468,475], [486,493], [504,511], [522,529], [540,547], [558,565]] + TM_PRI_GRP_ID: [3] + : + MIN_GUARANTEE_CELLS: 22 + DYNAMIC_SHARED_LIMITS: 1 + SHARED_LIMIT_DYNAMIC: ALPHA_1 + RESUME_OFFSET_CELLS: 8 + RESUME_FLOOR_CELLS: 0 + HEADROOM_LIMIT_AUTO: 0 + HEADROOM_LIMIT_CELLS: 12747 + ? + PORT_ID: [[288,295], [306,313], [324,331], [342,349], [360,367], [378,385], [396,403], [414,421], [432,439], [450,457], [468,475], [486,493], [504,511], [522,529], [540,547], [558,565]] + TM_PRI_GRP_ID: [4] + : + MIN_GUARANTEE_CELLS: 8 + DYNAMIC_SHARED_LIMITS: 1 + SHARED_LIMIT_DYNAMIC: ALPHA_1 + RESUME_OFFSET_CELLS: 8 + RESUME_FLOOR_CELLS: 0 + HEADROOM_LIMIT_AUTO: 0 + HEADROOM_LIMIT_CELLS: 12747 + ? + PORT_ID: [52, 268, 340, 556] + TM_PRI_GRP_ID: [3,4] + : + MIN_GUARANTEE_CELLS: 0 + DYNAMIC_SHARED_LIMITS: 1 + SHARED_LIMIT_DYNAMIC: ALPHA_1 + RESUME_OFFSET_CELLS: 8 + RESUME_FLOOR_CELLS: 0 + HEADROOM_LIMIT_AUTO: 0 + HEADROOM_LIMIT_CELLS: 0 + ? + PORT_ID: [17, 35, 53, 71, 89, 107, 125, 143, 161, 179, 197, 215, 233, 251, 269, 287, 305, 323, 341, 359, 377, 395, 413, 431, 449, 467, 485, 503, 521, 539, 557, 575] + TM_PRI_GRP_ID: [3,4] + : + MIN_GUARANTEE_CELLS: 0 + DYNAMIC_SHARED_LIMITS: 1 + SHARED_LIMIT_DYNAMIC: ALPHA_1 + RESUME_OFFSET_CELLS: 8 + RESUME_FLOOR_CELLS: 0 + HEADROOM_LIMIT_AUTO: 0 + HEADROOM_LIMIT_CELLS: 0 + ? + PORT_ID: [0] + TM_PRI_GRP_ID: [3,4] + : + MIN_GUARANTEE_CELLS: 0 + DYNAMIC_SHARED_LIMITS: 1 + SHARED_LIMIT_DYNAMIC: ALPHA_1 + RESUME_OFFSET_CELLS: 8 + RESUME_FLOOR_CELLS: 0 + HEADROOM_LIMIT_AUTO: 0 + HEADROOM_LIMIT_CELLS: 0 + +... + + +### Egress Service Pools +--- +device: + 0: +# Setting Q group limit to 0 + TM_THD_Q_GRP: + ? + PORT_ID: [[1,8], [18,25], [36,43], [54,61], [72,79], [90,97], [108,115], [126,133], [144,151], [162,169], [180,187], [198,205], [216,223], [234,241], [252,259], [270,277]] + : + UC_Q_GRP_MIN_GUARANTEE_CELLS: 24 + MC_Q_GRP_MIN_GUARANTEE_CELLS: 0 + ? + PORT_ID: [[288,295], [306,313], [324,331], [342,349], [360,367], [378,385], [396,403], [414,421], [432,439], [450,457], [468,475], [486,493], [504,511], [522,529], [540,547], [558,565]] + : + UC_Q_GRP_MIN_GUARANTEE_CELLS: 24 + MC_Q_GRP_MIN_GUARANTEE_CELLS: 0 + ? + PORT_ID: [0] + : + UC_Q_GRP_MIN_GUARANTEE_CELLS: 0 + MC_Q_GRP_MIN_GUARANTEE_CELLS: 0 + ? + PORT_ID: [17, 35, 53, 71, 89, 107, 125, 143, 161, 179, 197, 215, 233, 251, 269, 287, 305, 323, 341, 359, 377, 395, 413, 431, 449, 467, 485, 503, 521, 539, 557, 575] + : + UC_Q_GRP_MIN_GUARANTEE_CELLS: 4 + MC_Q_GRP_MIN_GUARANTEE_CELLS: 0 + ? + PORT_ID: [268, 340] + : + UC_Q_GRP_MIN_GUARANTEE_CELLS: 24 + MC_Q_GRP_MIN_GUARANTEE_CELLS: 0 + +# Unicast Egress Service Pool Limits + TM_EGR_THD_SERVICE_POOL: + ? + BUFFER_POOL: [0] + TM_EGR_SERVICE_POOL_ID: 0 + : + SHARED_LIMIT_CELLS: 420194 +... +--- +device: + 0: +# Multicast Egress Service Pool Limits, CQEs + TM_THD_MC_EGR_SERVICE_POOL: + ? + BUFFER_POOL: [0] + TM_EGR_SERVICE_POOL_ID: 0 + : + SHARED_LIMIT_CELLS: 28125 + ? + BUFFER_POOL: [0] + TM_EGR_SERVICE_POOL_ID: 1 + : + SHARED_LIMIT_CELLS: 0 +... +--- +device: + 0: +# Multicast Egress Service Pool Limits, CQEs + TM_THD_MC_EGR_SERVICE_POOL: + ? + BUFFER_POOL: [0] + TM_EGR_SERVICE_POOL_ID: 0 + : + COLOR_SPECIFIC_LIMITS: 0 + YELLOW_SHARED_LIMIT_CELLS: 2636 + RED_SHARED_LIMIT_CELLS: 2197 + SHARED_RESUME_LIMIT_CELLS: 3509 + YELLOW_SHARED_RESUME_LIMIT_CELLS: 2630 + RED_SHARED_RESUME_LIMIT_CELLS: 2191 +... + +... +### Adaptive Alpha +--- +device: + 0: + TM_EGR_SERVICE_POOL_DYNAMIC: + ? + BUFFER_POOL: [0] + TM_EGR_SERVICE_POOL_ID: [0] + : + ADAPTIVE_DYNAMIC: ALPHA_1 + + TM_THD_DYNAMIC_MARGIN: + ? + BUFFER_POOL: [0] + TM_EGR_SERVICE_POOL_ID: [0] + : + MARGIN: [29959, 59918, 89877, 119837, 149796, 179755, 209715, 239674, 269633, 299593] + +... + +--- +device: + 0: + TM_PORT_UC_Q_TO_SERVICE_POOL: + ? + PORT_ID: [[288,295], [306,313], [324,331], [342,349], [360,367], [378,385], [396,403], [414,421], [432,439], [450,457], [468,475], [486,493], [504,511], [522,529], [540,547], [558,565]] + TM_UC_Q_ID: [0,1,2,5,6,7] + : + USE_QGROUP_MIN: 1 + TM_EGR_SERVICE_POOL_ID: 0 + QSET_ID: 0 + ? + PORT_ID: [[288,295], [306,313], [324,331], [342,349], [360,367], [378,385], [396,403], [414,421], [432,439], [450,457], [468,475], [486,493], [504,511], [522,529], [540,547], [558,565]] + TM_UC_Q_ID: [3,4] + : + USE_QGROUP_MIN: 0 + TM_EGR_SERVICE_POOL_ID: 0 + QSET_ID: 0 + ? + PORT_ID: [[1,8], [18,25], [36,43], [54,61], [72,79], [90,97], [108,115], [126,133], [144,151], [162,169], [180,187], [198,205], [216,223], [234,241], [252,259], [270,277]] + TM_UC_Q_ID: [0,1,2,5,6,7] + : + USE_QGROUP_MIN: 1 + TM_EGR_SERVICE_POOL_ID: 0 + QSET_ID: 0 + ? + PORT_ID: [[1,8], [18,25], [36,43], [54,61], [72,79], [90,97], [108,115], [126,133], [144,151], [162,169], [180,187], [198,205], [216,223], [234,241], [252,259], [270,277]] + TM_UC_Q_ID: [3,4] + : + USE_QGROUP_MIN: 0 + TM_EGR_SERVICE_POOL_ID: 0 + QSET_ID: 0 + ? + PORT_ID: [52, 268, 340, 556] + TM_UC_Q_ID: [0,1,2,5,6,7] + : + USE_QGROUP_MIN: 1 + TM_EGR_SERVICE_POOL_ID: 0 + QSET_ID: 0 + ? + PORT_ID: [52, 268, 340, 556] + TM_UC_Q_ID: [3,4] + : + USE_QGROUP_MIN: 0 + TM_EGR_SERVICE_POOL_ID: 0 + QSET_ID: 0 + ? + PORT_ID: [17, 35, 53, 71, 89, 107, 125, 143, 161, 179, 197, 215, 233, 251, 269, 287, 305, 323, 341, 359, 377, 395, 413, 431, 449, 467, 485, 503, 521, 539, 557, 575] + TM_UC_Q_ID: [0,1,2,5,6,7] + : + USE_QGROUP_MIN: 1 + TM_EGR_SERVICE_POOL_ID: 0 + QSET_ID: 0 + ? + PORT_ID: [17, 35, 53, 71, 89, 107, 125, 143, 161, 179, 197, 215, 233, 251, 269, 287, 305, 323, 341, 359, 377, 395, 413, 431, 449, 467, 485, 503, 521, 539, 557, 575] + TM_UC_Q_ID: [3,4] + : + USE_QGROUP_MIN: 0 + TM_EGR_SERVICE_POOL_ID: 0 + QSET_ID: 0 + + TM_PORT_MC_Q_TO_SERVICE_POOL: + ? + PORT_ID: [0] + TM_MC_Q_ID: [[0,47]] + : + USE_QGROUP_MIN: 0 + TM_EGR_SERVICE_POOL_ID: 0 + QSET_ID: 0 + ? + PORT_ID: [[1,8], [17,25], [35,43], [52,61], [71,79], [89,97], [107,115], [125,133], [143,151], [161,169], [179,187], [197,205], [215,223], [233,241], [251,259], [268,277], [287,295], [305,313], [323,331], [340,349], [359,367], [377,385], [395,403], [413,421], [431,439], [449,457], [467,475], [485,493], [503,511], [521,529], [539,547], [556,565], 575] + TM_MC_Q_ID: [[0,3]] + : + USE_QGROUP_MIN: 1 + TM_EGR_SERVICE_POOL_ID: 0 + QSET_ID: 0 +... +### Queue Thresholds +###################################### +--- +device: + 0: + TM_THD_UC_Q: + ? + PORT_ID: [[288,295], [306,313], [324,331], [342,349], [360,367], [378,385], [396,403], [414,421], [432,439], [450,457], [468,475], [486,493], [504,511], [522,529], [540,547], [558,565]] + TM_UC_Q_ID: [0,1,2,5,6,7] + : + MIN_GUARANTEE_CELLS: 0 + SHARED_LIMITS: 1 + DYNAMIC_SHARED_LIMITS: 1 + SHARED_LIMIT_CELLS_STATIC: 0 + SHARED_LIMIT_DYNAMIC: ALPHA_1 + DYNAMIC_GROUP: MID_PRI_GROUP + RESUME_OFFSET_CELLS: 1 + COLOR_SPECIFIC_LIMITS: 0 + COLOR_SPECIFIC_DYNAMIC_LIMITS: 1 + YELLOW_LIMIT_CELLS_STATIC: 0 + YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750 + RED_LIMIT_CELLS_STATIC: 0 + RED_LIMIT_DYNAMIC: PERCENTAGE_625 + ? + PORT_ID: [[288,295], [306,313], [324,331], [342,349], [360,367], [378,385], [396,403], [414,421], [432,439], [450,457], [468,475], [486,493], [504,511], [522,529], [540,547], [558,565]] + TM_UC_Q_ID: [3,4] + : + MIN_GUARANTEE_CELLS: 0 + SHARED_LIMITS: 1 + DYNAMIC_SHARED_LIMITS: 0 + SHARED_LIMIT_CELLS_STATIC: 631745 + DYNAMIC_GROUP: MID_PRI_GROUP + RESUME_OFFSET_CELLS: 1 + COLOR_SPECIFIC_LIMITS: 0 + COLOR_SPECIFIC_DYNAMIC_LIMITS: 1 + YELLOW_LIMIT_CELLS_STATIC: 0 + YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750 + RED_LIMIT_CELLS_STATIC: 0 + RED_LIMIT_DYNAMIC: PERCENTAGE_625 + ? + PORT_ID: [[1,8], [18,25], [36,43], [54,61], [72,79], [90,97], [108,115], [126,133], [144,151], [162,169], [180,187], [198,205], [216,223], [234,241], [252,259], [270,277]] + TM_UC_Q_ID: [0,1,2,5,6,7] + : + MIN_GUARANTEE_CELLS: 0 + SHARED_LIMITS: 1 + DYNAMIC_SHARED_LIMITS: 1 + SHARED_LIMIT_CELLS_STATIC: 0 + SHARED_LIMIT_DYNAMIC: ALPHA_1 + DYNAMIC_GROUP: MID_PRI_GROUP + RESUME_OFFSET_CELLS: 1 + COLOR_SPECIFIC_LIMITS: 0 + COLOR_SPECIFIC_DYNAMIC_LIMITS: 1 + YELLOW_LIMIT_CELLS_STATIC: 0 + YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750 + RED_LIMIT_CELLS_STATIC: 0 + RED_LIMIT_DYNAMIC: PERCENTAGE_625 + ? + PORT_ID: [[1,8], [18,25], [36,43], [54,61], [72,79], [90,97], [108,115], [126,133], [144,151], [162,169], [180,187], [198,205], [216,223], [234,241], [252,259], [270,277]] + TM_UC_Q_ID: [3,4] + : + MIN_GUARANTEE_CELLS: 0 + SHARED_LIMITS: 1 + DYNAMIC_SHARED_LIMITS: 0 + SHARED_LIMIT_CELLS_STATIC: 631745 + DYNAMIC_GROUP: MID_PRI_GROUP + RESUME_OFFSET_CELLS: 1 + COLOR_SPECIFIC_LIMITS: 0 + COLOR_SPECIFIC_DYNAMIC_LIMITS: 1 + YELLOW_LIMIT_CELLS_STATIC: 0 + YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750 + RED_LIMIT_CELLS_STATIC: 0 + RED_LIMIT_DYNAMIC: PERCENTAGE_625 + ? + PORT_ID: [52, 268, 340, 556] + TM_UC_Q_ID: [0,1,2,5,6,7] + : + MIN_GUARANTEE_CELLS: 0 + SHARED_LIMITS: 1 + DYNAMIC_SHARED_LIMITS: 1 + SHARED_LIMIT_CELLS_STATIC: 0 + SHARED_LIMIT_DYNAMIC: ALPHA_1 + DYNAMIC_GROUP: MID_PRI_GROUP + RESUME_OFFSET_CELLS: 1 + COLOR_SPECIFIC_LIMITS: 0 + COLOR_SPECIFIC_DYNAMIC_LIMITS: 1 + YELLOW_LIMIT_CELLS_STATIC: 0 + YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750 + RED_LIMIT_CELLS_STATIC: 0 + RED_LIMIT_DYNAMIC: PERCENTAGE_625 + ? + PORT_ID: [52, 268, 340, 556] + TM_UC_Q_ID: [3,4] + : + MIN_GUARANTEE_CELLS: 0 + SHARED_LIMITS: 1 + DYNAMIC_SHARED_LIMITS: 0 + DYNAMIC_GROUP: MID_PRI_GROUP + RESUME_OFFSET_CELLS: 1 + COLOR_SPECIFIC_LIMITS: 0 + COLOR_SPECIFIC_DYNAMIC_LIMITS: 1 + YELLOW_LIMIT_CELLS_STATIC: 0 + YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750 + RED_LIMIT_CELLS_STATIC: 0 + RED_LIMIT_DYNAMIC: PERCENTAGE_625 + ? + PORT_ID: [17, 35, 53, 71, 89, 107, 125, 143, 161, 179, 197, 215, 233, 251, 269, 287, 305, 323, 341, 359, 377, 395, 413, 431, 449, 467, 485, 503, 521, 539, 557, 575] + TM_UC_Q_ID: [0,1,2,5,6,7] + : + MIN_GUARANTEE_CELLS: 0 + SHARED_LIMITS: 1 + DYNAMIC_SHARED_LIMITS: 1 + SHARED_LIMIT_CELLS_STATIC: 0 + SHARED_LIMIT_DYNAMIC: ALPHA_1 + DYNAMIC_GROUP: MID_PRI_GROUP + RESUME_OFFSET_CELLS: 0 + COLOR_SPECIFIC_LIMITS: 0 + COLOR_SPECIFIC_DYNAMIC_LIMITS: 1 + YELLOW_LIMIT_CELLS_STATIC: 0 + YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750 + RED_LIMIT_CELLS_STATIC: 0 + RED_LIMIT_DYNAMIC: PERCENTAGE_625 + ? + PORT_ID: [17, 35, 53, 71, 89, 107, 125, 143, 161, 179, 197, 215, 233, 251, 269, 287, 305, 323, 341, 359, 377, 395, 413, 431, 449, 467, 485, 503, 521, 539, 557, 575] + TM_UC_Q_ID: [3,4] + : + MIN_GUARANTEE_CELLS: 0 + SHARED_LIMITS: 1 + DYNAMIC_SHARED_LIMITS: 0 + DYNAMIC_GROUP: MID_PRI_GROUP + RESUME_OFFSET_CELLS: 1 + COLOR_SPECIFIC_LIMITS: 0 + COLOR_SPECIFIC_DYNAMIC_LIMITS: 1 + YELLOW_LIMIT_CELLS_STATIC: 0 + YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750 + RED_LIMIT_CELLS_STATIC: 0 + RED_LIMIT_DYNAMIC: PERCENTAGE_625 + + TM_THD_CPU_Q: + ? + PORT_ID: [0] + TM_CPU_Q_ID: [[0,23]] + : + MIN_GUARANTEE_CELLS: 24 + SHARED_LIMITS: 1 + DYNAMIC_SHARED_LIMITS: 1 + SHARED_LIMIT_DYNAMIC: ALPHA_1_4 + COLOR_SPECIFIC_LIMITS: 0 + COLOR_SPECIFIC_DYNAMIC_LIMITS: 0 + YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750 + RED_LIMIT_DYNAMIC: PERCENTAGE_625 + RESUME_OFFSET_CELLS: 1 + ? + PORT_ID: [0] + TM_CPU_Q_ID: [[23,31]] + : + MIN_GUARANTEE_CELLS: 48 + SHARED_LIMITS: 1 + DYNAMIC_SHARED_LIMITS: 1 + SHARED_LIMIT_DYNAMIC: ALPHA_2 + COLOR_SPECIFIC_LIMITS: 0 + COLOR_SPECIFIC_DYNAMIC_LIMITS: 0 + YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750 + RED_LIMIT_DYNAMIC: PERCENTAGE_625 + RESUME_OFFSET_CELLS: 1 + + TM_THD_MC_Q: + ? + PORT_ID: [[1,8], [17,25], [35,43], [52,61], [71,79], [89,97], [107,115], [125,133], [143,151], [161,169], [179,187], [197,205], [215,223], [233,241], [251,259], [268,277], [287,295], [305,313], [323,331], [340,349], [359,367], [377,385], [395,403], [413,421], [431,439], [449,457], [467,475], [485,493], [503,511], [521,529], [539,547], [556,565], 575] + TM_MC_Q_ID: [[0,3]] + : + MIN_GUARANTEE_CELLS: 0 + SHARED_LIMITS: 1 + DYNAMIC_SHARED_LIMITS: 1 + SHARED_LIMIT_DYNAMIC: ALPHA_1 + COLOR_SPECIFIC_LIMITS: 0 + COLOR_SPECIFIC_DYNAMIC_LIMITS: 0 + YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750 + RED_LIMIT_DYNAMIC: PERCENTAGE_625 + RESUME_OFFSET_CELLS: 1 + +#Egress Port QSET Thresholds. + TM_EGR_THD_UC_PORT_QSET: + ? + PORT_ID: [[1,8], [17,25], [35,43], [52,61], [71,79], [89,97], [107,115], [125,133], [143,151], [161,169], [179,187], [197,205], [215,223], [233,241], [251,259], [268,277], [287,295], [305,313], [323,331], [340,349], [359,367], [377,385], [395,403], [413,421], [431,439], [449,457], [467,475], [485,493], [503,511], [521,529], [539,547], [556,565], 575] + QSET_ID: [[0,3]] + : + COLOR_SPECIFIC_LIMITS: 0 + RED_SHARED_LIMIT_CELLS: 49353 + YELLOW_SHARED_LIMIT_CELLS: 59225 + SHARED_LIMIT_CELLS: 631745 + RED_SHARED_RESUME_LIMIT_CELLS: 49352 + YELLOW_SHARED_RESUME_LIMIT_CELLS: 59224 + SHARED_RESUME_LIMIT_CELLS: 78967 + + TM_EGR_THD_MC_PORT_QSET: + ? + PORT_ID: [[1,8], [17,25], [35,43], [52,61], [71,79], [89,97], [107,115], [125,133], [143,151], [161,169], [179,187], [197,205], [215,223], [233,241], [251,259], [268,277], [287,295], [305,313], [323,331], [340,349], [359,367], [377,385], [395,403], [413,421], [431,439], [449,457], [467,475], [485,493], [503,511], [521,529], [539,547], [556,565], 575] + QSET_ID: [[0,3]] + : + COLOR_SPECIFIC_LIMITS: 0 + RED_SHARED_LIMIT_CELLS: 49353 + YELLOW_SHARED_LIMIT_CELLS: 59225 + SHARED_LIMIT_CELLS: 631745 + RED_SHARED_RESUME_LIMIT_CELLS: 49352 + YELLOW_SHARED_RESUME_LIMIT_CELLS: 59224 + SHARED_RESUME_LIMIT_CELLS: 78967 +... + + +### PFC mapping +--- +device: + 0: + PC_MAC_CONTROL: + ? + PORT_ID: [[1,8], [17,25], [35,43], [52,61], [71,79], [89,97], [107,115], [125,133], [143,151], [161,169], [179,187], [197,205], [215,223], [233,241], [251,259], [268,277], [287,295], [305,313], [323,331], [340,349], [359,367], [377,385], [395,403], [413,421], [431,439], [449,457], [467,475], [485,493], [503,511], [521,529], [539,547], [556,565], 575] + : + PAUSE_TX: 0 + PAUSE_RX: 0 + + TM_PFC_EGR: + ? + PORT_ID: [[288,295], [306,313], [324,331], [342,349], [360,367], [378,385], [396,403], [414,421], [432,439], [450,457], [468,475], [486,493], [504,511], [522,529], [540,547], [558,565]] + : + TM_PFC_PRI_PROFILE_ID: 0 + + TM_PFC_EGR: + ? + PORT_ID: [[1,8], [18,25], [36,43], [54,61], [72,79], [90,97], [108,115], [126,133], [144,151], [162,169], [180,187], [198,205], [216,223], [234,241], [252,259], [270,277]] + : + TM_PFC_PRI_PROFILE_ID: 0 + +... +--- +device: + 0: +# TM_PFC_PRI_PROFILE is mapped to MMU_INTFI_PFCRPI_PROFILE in physical table. There are 8 profiles to configure the PFC value to COS/priorities mapping. For example, you could map multiple coses to a PFC. This mapping is needed when receiving PFC frames and stopping queues(coses) according to the PFC frame received. + TM_PFC_PRI_PROFILE: + ? + TM_PFC_PRI_PROFILE_ID: 0 + PFC_PRI: 3 + : + PFC: 1 + COS_LIST: [0, 0, 0, 1, 0, 0, 0, 0] + ? + TM_PFC_PRI_PROFILE_ID: 0 + PFC_PRI: 4 + : + PFC: 1 + COS_LIST: [0, 0, 0, 0, 1, 0, 0, 0] + + +# enable the MAC's PFC controls. + PC_PFC: + ? + PORT_ID: [[288,295], [306,313], [324,331], [342,349], [360,367], [378,385], [396,403], [414,421], [432,439], [450,457], [468,475], [486,493], [504,511], [522,529], [540,547], [558,565]] + : + ENABLE_RX: 1 + ENABLE_TX: 1 + + PC_PFC: + ? + PORT_ID: [[1,8], [18,25], [36,43], [54,61], [72,79], [90,97], [108,115], [126,133], [144,151], [162,169], [180,187], [198,205], [216,223], [234,241], [252,259], [270,277]] + : + ENABLE_RX: 1 + ENABLE_TX: 1 +... +### Mirror-on-drop +--- +device: + 0: + TM_MIRROR_ON_DROP_CONTROL: + RESERVED_LIMIT_CELLS: 6666 + + TM_MIRROR_ON_DROP_PROFILE: + ? + TM_MIRROR_ON_DROP_PROFILE_ID: 0 + : + PERCENTAGE_0_25: 65535 + PERCENTAGE_25_50: 65535 + PERCENTAGE_50_75: 65535 + PERCENTAGE_75_100: 65535 + INGRESS_LIMIT: 0 + SHARED_LIMIT: 0 + + TM_MIRROR_ON_DROP_DESTINATION: + ? + TM_MIRROR_ON_DROP_DESTINATION_ID: 0 + : + TM_MC_Q_ID: 0 + PORT_ID: 0 +... +--- +device: + 0: + TM_DROP_CONGESTION_NOTIFICATION_CONTROL: + RESERVED_LIMIT_CELLS: 6666 +... +--- +device: + 0: + TM_CNP_CONTROL: + RESERVED_LIMIT_CELLS: 6266 +... + +### THDR Limits +--- +device: + 0: + TM_THD_REPL_Q: + ? + REPL_Q_NUM: [[0,6]] + : + SHARED_LIMITS: 1 + DYNAMIC_SHARED_LIMITS: 1 + SHARED_LIMIT_DYNAMIC: ALPHA_1 + RESUME_OFFSET_CELLS: 8 + COLOR_SPECIFIC_LIMITS: 0 + COLOR_SPECIFIC_DYNAMIC_LIMITS: 0 + YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750 + RED_LIMIT_DYNAMIC: PERCENTAGE_625 + SHARED_LIMIT_PKTS: 1 + DYNAMIC_SHARED_LIMIT_PKTS: 1 + SHARED_LIMIT_DYNAMIC_PKTS: ALPHA_1 + RESUME_OFFSET_PKTS: 2 + COLOR_SPECIFIC_LIMIT_PKTS: 0 + COLOR_SPECIFIC_DYNAMIC_LIMIT_PKTS: 0 + YELLOW_LIMIT_DYNAMIC_PKTS: PERCENTAGE_750 + RED_LIMIT_DYNAMIC_PKTS: PERCENTAGE_625 + + TM_THD_REPL_Q: + ? + REPL_Q_NUM: [[0,3]] + : + MIN_GUARANTEE_CELLS: 0 + MIN_GUARANTEE_PKTS: 0 + ? + REPL_Q_NUM: [[4,6]] + : + MIN_GUARANTEE_CELLS: 24 + MIN_GUARANTEE_PKTS: 4 + + + TM_THD_REPL_SERVICE_POOL: + COLOR_SPECIFIC_LIMITS: 0 + COLOR_SPECIFIC_LIMIT_PKTS: 0 + SHARED_LIMIT_CELLS: 14044 + SHARED_LIMIT_PKTS: 6424 + SHARED_RESUME_LIMIT_CELLS: 14036 + SHARED_RESUME_LIMIT_PKTS: 6422 + YELLOW_SHARED_LIMIT_CELLS: 10533 + YELLOW_SHARED_LIMIT_PKTS: 4818 + RED_SHARED_LIMIT_CELLS: 8772 + RED_SHARED_LIMIT_PKTS: 4015 + YELLOW_SHARED_RESUME_LIMIT_CELLS: 10525 + YELLOW_SHARED_RESUME_LIMIT_PKTS: 4816 + RED_SHARED_RESUME_LIMIT_CELLS: 8764 + RED_SHARED_RESUME_LIMIT_PKTS: 4013 + +... +### OBM +--- +device: + 0: + TM_OBM_PORT_PKT_PARSE: + ? + PORT_ID: [[288,295], [306,313], [324,331], [342,349], [360,367], [378,385], [396,403], [414,421], [432,439], [450,457], [468,475], [486,493], [504,511], [522,529], [540,547], [558,565]] + : + OUTER_TPID: 1 + HEADER_TYPE: OBM_HEADER_TYPE_ETHERNET + DEFAULT_PKT_PRI: 0 + ? + PORT_ID: [[1,8], [18,25], [36,43], [54,61], [72,79], [90,97], [108,115], [126,133], [144,151], [162,169], [180,187], [198,205], [216,223], [234,241], [252,259], [270,277]] + : + OUTER_TPID: 1 + HEADER_TYPE: OBM_HEADER_TYPE_ETHERNET + DEFAULT_PKT_PRI: 0 + + TM_OBM_PORT_FLOW_CTRL: + ? + PORT_ID: [[288,295], [306,313], [324,331], [342,349], [360,367], [378,385], [396,403], [414,421], [432,439], [450,457], [468,475], [486,493], [504,511], [522,529], [540,547], [558,565]] + : + FLOW_CTRL: 1 + FLOW_CTRL_TYPE: PFC + LOSSLESS0_FLOW_CTRL: 1 + LOSSLESS1_FLOW_CTRL: 0 + COS_BMAP_LOSSLESS0: [0,0,0,1,1,0,0,0] + COS_BMAP_LOSSLESS1: 0 + ? + PORT_ID: [[1,8], [18,25], [36,43], [54,61], [72,79], [90,97], [108,115], [126,133], [144,151], [162,169], [180,187], [198,205], [216,223], [234,241], [252,259], [270,277]] + : + FLOW_CTRL: 1 + FLOW_CTRL_TYPE: PFC + LOSSLESS0_FLOW_CTRL: 1 + LOSSLESS1_FLOW_CTRL: 0 + COS_BMAP_LOSSLESS0: [0,0,0,1,1,0,0,0] + COS_BMAP_LOSSLESS1: 0 + + TM_OBM_PORT_PKT_PRI_TC_MAP: + ? + PORT_ID: [[288,295], [306,313], [324,331], [342,349], [360,367], [378,385], [396,403], [414,421], [432,439], [450,457], [468,475], [486,493], [504,511], [522,529], [540,547], [558,565]] + PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN + PKT_PRI: [0,1,2,5,6,7] + : + TRAFFIC_CLASS: OBM_TC_LOSSY_LOW + ? + PORT_ID: [[288,295], [306,313], [324,331], [342,349], [360,367], [378,385], [396,403], [414,421], [432,439], [450,457], [468,475], [486,493], [504,511], [522,529], [540,547], [558,565]] + PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN + PKT_PRI: [3,4] + : + TRAFFIC_CLASS: OBM_TC_LOSSLESS + ? + PORT_ID: [[1,8], [18,25], [36,43], [54,61], [72,79], [90,97], [108,115], [126,133], [144,151], [162,169], [180,187], [198,205], [216,223], [234,241], [252,259], [270,277]] + PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN + PKT_PRI: [0,1,2,5,6,7] + : + TRAFFIC_CLASS: OBM_TC_LOSSY_LOW + ? + PORT_ID: [[1,8], [18,25], [36,43], [54,61], [72,79], [90,97], [108,115], [126,133], [144,151], [162,169], [180,187], [198,205], [216,223], [234,241], [252,259], [270,277]] + PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN + PKT_PRI: [3,4] + : + TRAFFIC_CLASS: OBM_TC_LOSSLESS + +... diff --git a/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-O256/pg_profile_lookup.ini b/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-O256/pg_profile_lookup.ini new file mode 100644 index 00000000000..aa1b41137cf --- /dev/null +++ b/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-O256/pg_profile_lookup.ini @@ -0,0 +1,30 @@ +# PG lossless profiles. +# speed cable size xon xoff threshold xon_offset +25000 5m 4620 0 162540 0 3360 +25000 40m 4620 0 173460 0 3360 +25000 300m 4620 0 254940 0 3360 +50000 5m 4620 0 162540 0 3360 +50000 30m 4620 0 170520 0 3360 +50000 40m 4620 0 173460 0 3360 +50000 300m 4620 0 254940 0 3360 +50000 500m 4620 0 317100 0 3360 +100000 5m 4620 0 229740 0 3360 +100000 30m 4620 0 245280 0 3360 +100000 40m 4620 0 251580 0 3360 +100000 300m 4620 0 414120 0 3360 +100000 500m 4620 0 538860 0 3360 +200000 5m 4620 0 369180 0 3360 +200000 30m 4620 0 400260 0 3360 +200000 40m 4620 0 412860 0 3360 +200000 300m 4620 0 737940 0 3360 +200000 500m 4620 0 987840 0 3360 +400000 5m 4620 0 650160 0 3360 +400000 30m 4620 0 712740 0 3360 +400000 40m 4620 0 737940 0 3360 +400000 300m 4620 0 1387680 0 3360 +400000 500m 4620 0 1887900 0 3360 +800000 5m 4620 0 1249080 0 3360 +800000 30m 4620 0 1374240 0 3360 +800000 40m 4620 0 1424220 0 3360 +800000 300m 4620 0 2724120 0 3360 +800000 500m 4620 0 3724140 0 3360 diff --git a/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-O256/port_config.ini b/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-O256/port_config.ini new file mode 100644 index 00000000000..aca91fd0d4f --- /dev/null +++ b/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-O256/port_config.ini @@ -0,0 +1,258 @@ +# name lanes alias index speed +Ethernet0 121,122,123,124 etp1a 1 400000 +Ethernet4 125,126,127,128 etp1b 1 400000 +Ethernet8 113,114,115,116 etp2a 2 400000 +Ethernet12 117,118,119,120 etp2b 2 400000 +Ethernet16 105,106,107,108 etp3a 3 400000 +Ethernet20 109,110,111,112 etp3b 3 400000 +Ethernet24 73,74,75,76 etp4a 4 400000 +Ethernet28 77,78,79,80 etp4b 4 400000 +Ethernet32 65,66,67,68 etp5a 5 400000 +Ethernet36 69,70,71,72 etp5b 5 400000 +Ethernet40 81,82,83,84 etp6a 6 400000 +Ethernet44 85,86,87,88 etp6b 6 400000 +Ethernet48 97,98,99,100 etp7a 7 400000 +Ethernet52 101,102,103,104 etp7b 7 400000 +Ethernet56 89,90,91,92 etp8a 8 400000 +Ethernet60 93,94,95,96 etp8b 8 400000 +Ethernet64 505,506,507,508 etp9a 9 400000 +Ethernet68 509,510,511,512 etp9b 9 400000 +Ethernet72 497,498,499,500 etp10a 10 400000 +Ethernet76 501,502,503,504 etp10b 10 400000 +Ethernet80 489,490,491,492 etp11a 11 400000 +Ethernet84 493,494,495,496 etp11b 11 400000 +Ethernet88 457,458,459,460 etp12a 12 400000 +Ethernet92 461,462,463,464 etp12b 12 400000 +Ethernet96 449,450,451,452 etp13a 13 400000 +Ethernet100 453,454,455,456 etp13b 13 400000 +Ethernet104 465,466,467,468 etp14a 14 400000 +Ethernet108 469,470,471,472 etp14b 14 400000 +Ethernet112 481,482,483,484 etp15a 15 400000 +Ethernet116 485,486,487,488 etp15b 15 400000 +Ethernet120 473,474,475,476 etp16a 16 400000 +Ethernet124 477,478,479,480 etp16b 16 400000 +Ethernet128 889,890,891,892 etp17a 17 400000 +Ethernet132 893,894,895,896 etp17b 17 400000 +Ethernet136 881,882,883,884 etp18a 18 400000 +Ethernet140 885,886,887,888 etp18b 18 400000 +Ethernet144 873,874,875,876 etp19a 19 400000 +Ethernet148 877,878,879,880 etp19b 19 400000 +Ethernet152 841,842,843,844 etp20a 20 400000 +Ethernet156 845,846,847,848 etp20b 20 400000 +Ethernet160 833,834,835,836 etp21a 21 400000 +Ethernet164 837,838,839,840 etp21b 21 400000 +Ethernet168 849,850,851,852 etp22a 22 400000 +Ethernet172 853,854,855,856 etp22b 22 400000 +Ethernet176 865,866,867,868 etp23a 23 400000 +Ethernet180 869,870,871,872 etp23b 23 400000 +Ethernet184 857,858,859,860 etp24a 24 400000 +Ethernet188 861,862,863,864 etp24b 24 400000 +Ethernet192 1017,1018,1019,1020 etp25a 25 400000 +Ethernet196 1021,1022,1023,1024 etp25b 25 400000 +Ethernet200 1009,1010,1011,1012 etp26a 26 400000 +Ethernet204 1013,1014,1015,1016 etp26b 26 400000 +Ethernet208 1001,1002,1003,1004 etp27a 27 400000 +Ethernet212 1005,1006,1007,1008 etp27b 27 400000 +Ethernet216 969,970,971,972 etp28a 28 400000 +Ethernet220 973,974,975,976 etp28b 28 400000 +Ethernet224 961,962,963,964 etp29a 29 400000 +Ethernet228 965,966,967,968 etp29b 29 400000 +Ethernet232 977,978,979,980 etp30a 30 400000 +Ethernet236 981,982,983,984 etp30b 30 400000 +Ethernet240 993,994,995,996 etp31a 31 400000 +Ethernet244 997,998,999,1000 etp31b 31 400000 +Ethernet248 985,986,987,988 etp32a 32 400000 +Ethernet252 989,990,991,992 etp32b 32 400000 +Ethernet256 233,234,235,236 etp33a 33 400000 +Ethernet260 237,238,239,240 etp33b 33 400000 +Ethernet264 201,202,203,204 etp34a 34 400000 +Ethernet268 205,206,207,208 etp34b 34 400000 +Ethernet272 225,226,227,228 etp35a 35 400000 +Ethernet276 229,230,231,232 etp35b 35 400000 +Ethernet280 217,218,219,220 etp36a 36 400000 +Ethernet284 221,222,223,224 etp36b 36 400000 +Ethernet288 273,274,275,276 etp37a 37 400000 +Ethernet292 277,278,279,280 etp37b 37 400000 +Ethernet296 257,258,259,260 etp38a 38 400000 +Ethernet300 261,262,263,264 etp38b 38 400000 +Ethernet304 305,306,307,308 etp39a 39 400000 +Ethernet308 309,310,311,312 etp39b 39 400000 +Ethernet312 313,314,315,316 etp40a 40 400000 +Ethernet316 317,318,319,320 etp40b 40 400000 +Ethernet320 361,362,363,364 etp41a 41 400000 +Ethernet324 365,366,367,368 etp41b 41 400000 +Ethernet328 329,330,331,332 etp42a 42 400000 +Ethernet332 333,334,335,336 etp42b 42 400000 +Ethernet336 353,354,355,356 etp43a 43 400000 +Ethernet340 357,358,359,360 etp43b 43 400000 +Ethernet344 345,346,347,348 etp44a 44 400000 +Ethernet348 349,350,351,352 etp44b 44 400000 +Ethernet352 401,402,403,404 etp45a 45 400000 +Ethernet356 405,406,407,408 etp45b 45 400000 +Ethernet360 385,386,387,388 etp46a 46 400000 +Ethernet364 389,390,391,392 etp46b 46 400000 +Ethernet368 433,434,435,436 etp47a 47 400000 +Ethernet372 437,438,439,440 etp47b 47 400000 +Ethernet376 441,442,443,444 etp48a 48 400000 +Ethernet380 445,446,447,448 etp48b 48 400000 +Ethernet384 617,618,619,620 etp49a 49 400000 +Ethernet388 621,622,623,624 etp49b 49 400000 +Ethernet392 585,586,587,588 etp50a 50 400000 +Ethernet396 589,590,591,592 etp50b 50 400000 +Ethernet400 609,610,611,612 etp51a 51 400000 +Ethernet404 613,614,615,616 etp51b 51 400000 +Ethernet408 601,602,603,604 etp52a 52 400000 +Ethernet412 605,606,607,608 etp52b 52 400000 +Ethernet416 657,658,659,660 etp53a 53 400000 +Ethernet420 661,662,663,664 etp53b 53 400000 +Ethernet424 641,642,643,644 etp54a 54 400000 +Ethernet428 645,646,647,648 etp54b 54 400000 +Ethernet432 689,690,691,692 etp55a 55 400000 +Ethernet436 693,694,695,696 etp55b 55 400000 +Ethernet440 697,698,699,700 etp56a 56 400000 +Ethernet444 701,702,703,704 etp56b 56 400000 +Ethernet448 745,746,747,748 etp57a 57 400000 +Ethernet452 749,750,751,752 etp57b 57 400000 +Ethernet456 713,714,715,716 etp58a 58 400000 +Ethernet460 717,718,719,720 etp58b 58 400000 +Ethernet464 737,738,739,740 etp59a 59 400000 +Ethernet468 741,742,743,744 etp59b 59 400000 +Ethernet472 729,730,731,732 etp60a 60 400000 +Ethernet476 733,734,735,736 etp60b 60 400000 +Ethernet480 785,786,787,788 etp61a 61 400000 +Ethernet484 789,790,791,792 etp61b 61 400000 +Ethernet488 769,770,771,772 etp62a 62 400000 +Ethernet492 773,774,775,776 etp62b 62 400000 +Ethernet496 817,818,819,820 etp63a 63 400000 +Ethernet500 821,822,823,824 etp63b 63 400000 +Ethernet504 825,826,827,828 etp64a 64 400000 +Ethernet508 829,830,831,832 etp64b 64 400000 +Ethernet512 249,250,251,252 etp65a 65 400000 +Ethernet516 253,254,255,256 etp65b 65 400000 +Ethernet520 241,242,243,244 etp66a 66 400000 +Ethernet524 245,246,247,248 etp66b 66 400000 +Ethernet528 193,194,195,196 etp67a 67 400000 +Ethernet532 197,198,199,200 etp67b 67 400000 +Ethernet536 209,210,211,212 etp68a 68 400000 +Ethernet540 213,214,215,216 etp68b 68 400000 +Ethernet544 281,282,283,284 etp69a 69 400000 +Ethernet548 285,286,287,288 etp69b 69 400000 +Ethernet552 289,290,291,292 etp70a 70 400000 +Ethernet556 293,294,295,296 etp70b 70 400000 +Ethernet560 265,266,267,268 etp71a 71 400000 +Ethernet564 269,270,271,272 etp71b 71 400000 +Ethernet568 297,298,299,300 etp72a 72 400000 +Ethernet572 301,302,303,304 etp72b 72 400000 +Ethernet576 377,378,379,380 etp73a 73 400000 +Ethernet580 381,382,383,384 etp73b 73 400000 +Ethernet584 369,370,371,372 etp74a 74 400000 +Ethernet588 373,374,375,376 etp74b 74 400000 +Ethernet592 321,322,323,324 etp75a 75 400000 +Ethernet596 325,326,327,328 etp75b 75 400000 +Ethernet600 337,338,339,340 etp76a 76 400000 +Ethernet604 341,342,343,344 etp76b 76 400000 +Ethernet608 409,410,411,412 etp77a 77 400000 +Ethernet612 413,414,415,416 etp77b 77 400000 +Ethernet616 417,418,419,420 etp78a 78 400000 +Ethernet620 421,422,423,424 etp78b 78 400000 +Ethernet624 393,394,395,396 etp79a 79 400000 +Ethernet628 397,398,399,400 etp79b 79 400000 +Ethernet632 425,426,427,428 etp80a 80 400000 +Ethernet636 429,430,431,432 etp80b 80 400000 +Ethernet640 633,634,635,636 etp81a 81 400000 +Ethernet644 637,638,639,640 etp81b 81 400000 +Ethernet648 625,626,627,628 etp82a 82 400000 +Ethernet652 629,630,631,632 etp82b 82 400000 +Ethernet656 577,578,579,580 etp83a 83 400000 +Ethernet660 581,582,583,584 etp83b 83 400000 +Ethernet664 593,594,595,596 etp84a 84 400000 +Ethernet668 597,598,599,600 etp84b 84 400000 +Ethernet672 665,666,667,668 etp85a 85 400000 +Ethernet676 669,670,671,672 etp85b 85 400000 +Ethernet680 673,674,675,676 etp86a 86 400000 +Ethernet684 677,678,679,680 etp86b 86 400000 +Ethernet688 649,650,651,652 etp87a 87 400000 +Ethernet692 653,654,655,656 etp87b 87 400000 +Ethernet696 681,682,683,684 etp88a 88 400000 +Ethernet700 685,686,687,688 etp88b 88 400000 +Ethernet704 761,762,763,764 etp89a 89 400000 +Ethernet708 765,766,767,768 etp89b 89 400000 +Ethernet712 753,754,755,756 etp90a 90 400000 +Ethernet716 757,758,759,760 etp90b 90 400000 +Ethernet720 705,706,707,708 etp91a 91 400000 +Ethernet724 709,710,711,712 etp91b 91 400000 +Ethernet728 721,722,723,724 etp92a 92 400000 +Ethernet732 725,726,727,728 etp92b 92 400000 +Ethernet736 793,794,795,796 etp93a 93 400000 +Ethernet740 797,798,799,800 etp93b 93 400000 +Ethernet744 801,802,803,804 etp94a 94 400000 +Ethernet748 805,806,807,808 etp94b 94 400000 +Ethernet752 777,778,779,780 etp95a 95 400000 +Ethernet756 781,782,783,784 etp95b 95 400000 +Ethernet760 809,810,811,812 etp96a 96 400000 +Ethernet764 813,814,815,816 etp96b 96 400000 +Ethernet768 25,26,27,28 etp97a 97 400000 +Ethernet772 29,30,31,32 etp97b 97 400000 +Ethernet776 33,34,35,36 etp98a 98 400000 +Ethernet780 37,38,39,40 etp98b 98 400000 +Ethernet784 17,18,19,20 etp99a 99 400000 +Ethernet788 21,22,23,24 etp99b 99 400000 +Ethernet792 1,2,3,4 etp100a 100 400000 +Ethernet796 5,6,7,8 etp100b 100 400000 +Ethernet800 9,10,11,12 etp101a 101 400000 +Ethernet804 13,14,15,16 etp101b 101 400000 +Ethernet808 41,42,43,44 etp102a 102 400000 +Ethernet812 45,46,47,48 etp102b 102 400000 +Ethernet816 49,50,51,52 etp103a 103 400000 +Ethernet820 53,54,55,56 etp103b 103 400000 +Ethernet824 57,58,59,60 etp104a 104 400000 +Ethernet828 61,62,63,64 etp104b 104 400000 +Ethernet832 153,154,155,156 etp105a 105 400000 +Ethernet836 157,158,159,160 etp105b 105 400000 +Ethernet840 161,162,163,164 etp106a 106 400000 +Ethernet844 165,166,167,168 etp106b 106 400000 +Ethernet848 145,146,147,148 etp107a 107 400000 +Ethernet852 149,150,151,152 etp107b 107 400000 +Ethernet856 129,130,131,132 etp108a 108 400000 +Ethernet860 133,134,135,136 etp108b 108 400000 +Ethernet864 137,138,139,140 etp109a 109 400000 +Ethernet868 141,142,143,144 etp109b 109 400000 +Ethernet872 169,170,171,172 etp110a 110 400000 +Ethernet876 173,174,175,176 etp110b 110 400000 +Ethernet880 177,178,179,180 etp111a 111 400000 +Ethernet884 181,182,183,184 etp111b 111 400000 +Ethernet888 185,186,187,188 etp112a 112 400000 +Ethernet892 189,190,191,192 etp112b 112 400000 +Ethernet896 537,538,539,540 etp113a 113 400000 +Ethernet900 541,542,543,544 etp113b 113 400000 +Ethernet904 545,546,547,548 etp114a 114 400000 +Ethernet908 549,550,551,552 etp114b 114 400000 +Ethernet912 529,530,531,532 etp115a 115 400000 +Ethernet916 533,534,535,536 etp115b 115 400000 +Ethernet920 513,514,515,516 etp116a 116 400000 +Ethernet924 517,518,519,520 etp116b 116 400000 +Ethernet928 521,522,523,524 etp117a 117 400000 +Ethernet932 525,526,527,528 etp117b 117 400000 +Ethernet936 553,554,555,556 etp118a 118 400000 +Ethernet940 557,558,559,560 etp118b 118 400000 +Ethernet944 561,562,563,564 etp119a 119 400000 +Ethernet948 565,566,567,568 etp119b 119 400000 +Ethernet952 569,570,571,572 etp120a 120 400000 +Ethernet956 573,574,575,576 etp120b 120 400000 +Ethernet960 921,922,923,924 etp121a 121 400000 +Ethernet964 925,926,927,928 etp121b 121 400000 +Ethernet968 929,930,931,932 etp122a 122 400000 +Ethernet972 933,934,935,936 etp122b 122 400000 +Ethernet976 913,914,915,916 etp123a 123 400000 +Ethernet980 917,918,919,920 etp123b 123 400000 +Ethernet984 897,898,899,900 etp124a 124 400000 +Ethernet988 901,902,903,904 etp124b 124 400000 +Ethernet992 905,906,907,908 etp125a 125 400000 +Ethernet996 909,910,911,912 etp125b 125 400000 +Ethernet1000 937,938,939,940 etp126a 126 400000 +Ethernet1004 941,942,943,944 etp126b 126 400000 +Ethernet1008 945,946,947,948 etp127a 127 400000 +Ethernet1012 949,950,951,952 etp127b 127 400000 +Ethernet1016 953,954,955,956 etp128a 128 400000 +Ethernet1020 957,958,959,960 etp128b 128 400000 +Ethernet1024 1026,1027,1028,1029 etp129 129 100000 diff --git a/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-O256/qos.json.j2 b/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-O256/qos.json.j2 new file mode 100644 index 00000000000..af1c4dfb256 --- /dev/null +++ b/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-O256/qos.json.j2 @@ -0,0 +1,4 @@ +{%- macro generate_global_dscp_to_tc_map() %} +{# This is an empty macro since the global DSCP_TO_TC map is not required #} +{%- endmacro %} +{%- include 'qos_config.j2' %} diff --git a/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-O256/sai.profile b/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-O256/sai.profile new file mode 100644 index 00000000000..89c7e298128 --- /dev/null +++ b/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-O256/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/nh4210-r0021-F-O256.yaml diff --git a/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-P128/BALANCED/buffer_ports.j2 b/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-P128/BALANCED/buffer_ports.j2 new file mode 100644 index 00000000000..9dc1debff1d --- /dev/null +++ b/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-P128/BALANCED/buffer_ports.j2 @@ -0,0 +1,6 @@ +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {%- for port_idx in range(0, 1024, 8) %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx)) %}{%- endif %} + {%- endfor %} +{%- endmacro %} diff --git a/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-P128/BALANCED/buffers.json.j2 b/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-P128/BALANCED/buffers.json.j2 new file mode 100644 index 00000000000..0b1cb2c541b --- /dev/null +++ b/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-P128/BALANCED/buffers.json.j2 @@ -0,0 +1,2 @@ +{%- set default_topo = 't1' %} +{%- include 'buffers_config.j2' %} diff --git a/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-P128/BALANCED/buffers_defaults_lt2.j2 b/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-P128/BALANCED/buffers_defaults_lt2.j2 new file mode 100644 index 00000000000..0cb652f3450 --- /dev/null +++ b/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-P128/BALANCED/buffers_defaults_lt2.j2 @@ -0,0 +1,36 @@ +{%- set default_cable = '5m' %} + +{%- include 'buffer_ports.j2' %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "258035400", + "type": "ingress", + "mode": "dynamic", + "xoff": "81553920" + }, + "egress_lossless_pool": { + "size": "258035400", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool": "ingress_lossless_pool", + "size": "0", + "static_th": "265332900" + }, + "egress_lossy_profile": { + "pool": "egress_lossless_pool", + "size": "0", + "dynamic_th": "0" + }, + "egress_lossless_profile": { + "pool": "egress_lossless_pool", + "size": "0", + "static_th": "265332900" + } + }, +{%- endmacro %} diff --git a/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-P128/BALANCED/buffers_defaults_t1.j2 b/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-P128/BALANCED/buffers_defaults_t1.j2 new file mode 100644 index 00000000000..0cb652f3450 --- /dev/null +++ b/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-P128/BALANCED/buffers_defaults_t1.j2 @@ -0,0 +1,36 @@ +{%- set default_cable = '5m' %} + +{%- include 'buffer_ports.j2' %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "258035400", + "type": "ingress", + "mode": "dynamic", + "xoff": "81553920" + }, + "egress_lossless_pool": { + "size": "258035400", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool": "ingress_lossless_pool", + "size": "0", + "static_th": "265332900" + }, + "egress_lossy_profile": { + "pool": "egress_lossless_pool", + "size": "0", + "dynamic_th": "0" + }, + "egress_lossless_profile": { + "pool": "egress_lossless_pool", + "size": "0", + "static_th": "265332900" + } + }, +{%- endmacro %} diff --git a/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-P128/BALANCED/pg_profile_lookup.ini b/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-P128/BALANCED/pg_profile_lookup.ini new file mode 100644 index 00000000000..aa1b41137cf --- /dev/null +++ b/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-P128/BALANCED/pg_profile_lookup.ini @@ -0,0 +1,30 @@ +# PG lossless profiles. +# speed cable size xon xoff threshold xon_offset +25000 5m 4620 0 162540 0 3360 +25000 40m 4620 0 173460 0 3360 +25000 300m 4620 0 254940 0 3360 +50000 5m 4620 0 162540 0 3360 +50000 30m 4620 0 170520 0 3360 +50000 40m 4620 0 173460 0 3360 +50000 300m 4620 0 254940 0 3360 +50000 500m 4620 0 317100 0 3360 +100000 5m 4620 0 229740 0 3360 +100000 30m 4620 0 245280 0 3360 +100000 40m 4620 0 251580 0 3360 +100000 300m 4620 0 414120 0 3360 +100000 500m 4620 0 538860 0 3360 +200000 5m 4620 0 369180 0 3360 +200000 30m 4620 0 400260 0 3360 +200000 40m 4620 0 412860 0 3360 +200000 300m 4620 0 737940 0 3360 +200000 500m 4620 0 987840 0 3360 +400000 5m 4620 0 650160 0 3360 +400000 30m 4620 0 712740 0 3360 +400000 40m 4620 0 737940 0 3360 +400000 300m 4620 0 1387680 0 3360 +400000 500m 4620 0 1887900 0 3360 +800000 5m 4620 0 1249080 0 3360 +800000 30m 4620 0 1374240 0 3360 +800000 40m 4620 0 1424220 0 3360 +800000 300m 4620 0 2724120 0 3360 +800000 500m 4620 0 3724140 0 3360 diff --git a/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-P128/BALANCED/qos.json.j2 b/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-P128/BALANCED/qos.json.j2 new file mode 100644 index 00000000000..af1c4dfb256 --- /dev/null +++ b/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-P128/BALANCED/qos.json.j2 @@ -0,0 +1,4 @@ +{%- macro generate_global_dscp_to_tc_map() %} +{# This is an empty macro since the global DSCP_TO_TC map is not required #} +{%- endmacro %} +{%- include 'qos_config.j2' %} diff --git a/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-P128/buffer_ports.j2 b/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-P128/buffer_ports.j2 new file mode 100644 index 00000000000..9dc1debff1d --- /dev/null +++ b/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-P128/buffer_ports.j2 @@ -0,0 +1,6 @@ +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {%- for port_idx in range(0, 1024, 8) %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx)) %}{%- endif %} + {%- endfor %} +{%- endmacro %} diff --git a/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-P128/buffers.json.j2 b/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-P128/buffers.json.j2 new file mode 100644 index 00000000000..6dfe806d8aa --- /dev/null +++ b/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-P128/buffers.json.j2 @@ -0,0 +1,2 @@ +{%- set default_topo = 'lt2' %} +{%- include 'buffers_config.j2' %} diff --git a/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-P128/buffers_defaults_lt2.j2 b/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-P128/buffers_defaults_lt2.j2 new file mode 100644 index 00000000000..0cb652f3450 --- /dev/null +++ b/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-P128/buffers_defaults_lt2.j2 @@ -0,0 +1,36 @@ +{%- set default_cable = '5m' %} + +{%- include 'buffer_ports.j2' %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "258035400", + "type": "ingress", + "mode": "dynamic", + "xoff": "81553920" + }, + "egress_lossless_pool": { + "size": "258035400", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool": "ingress_lossless_pool", + "size": "0", + "static_th": "265332900" + }, + "egress_lossy_profile": { + "pool": "egress_lossless_pool", + "size": "0", + "dynamic_th": "0" + }, + "egress_lossless_profile": { + "pool": "egress_lossless_pool", + "size": "0", + "static_th": "265332900" + } + }, +{%- endmacro %} diff --git a/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-P128/buffers_defaults_t0.j2 b/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-P128/buffers_defaults_t0.j2 new file mode 100644 index 00000000000..374e8e5878b --- /dev/null +++ b/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-P128/buffers_defaults_t0.j2 @@ -0,0 +1,53 @@ +{%- set default_cable = '5m' %} + +{%- include 'buffer_ports.j2' %} +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_pool": { + "size": "257154240", + "type": "ingress", + "mode": "dynamic" + }, + "egress_pool": { + "size": "257154240", + "type": "egress", + "mode": "dynamic" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool": "ingress_pool", + "dynamic_th": "0", + "size": "0" + }, + "egress_lossy_profile": { + "pool": "egress_pool", + "size": "0", + "dynamic_th": "0" + } + }, +{%- endmacro %} + +{%- macro generate_pg_profils(port_names_active) %} + "BUFFER_PG": { +{% for port in port_names_active.split(',') %} + "{{ port }}|0-7": { + "profile" : "ingress_lossy_profile" + }{% if not loop.last %},{% endif %} +{% endfor %} + }, +{%- endmacro %} + +{% macro generate_queue_buffers(port_names_active) %} + "BUFFER_QUEUE": { +{% for port in port_names_active.split(',') %} + "{{ port }}|0-7": { + "profile" : "egress_lossy_profile" + }{% if not loop.last %},{% endif %} +{% endfor %} + } +{% endmacro %} + +{%- macro generate_cable_length_config(port_names_all) %} +{# CABLE_LENGTH is disabled #} +{%- endmacro %} diff --git a/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-P128/buffers_defaults_t1.j2 b/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-P128/buffers_defaults_t1.j2 new file mode 100644 index 00000000000..0cb652f3450 --- /dev/null +++ b/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-P128/buffers_defaults_t1.j2 @@ -0,0 +1,36 @@ +{%- set default_cable = '5m' %} + +{%- include 'buffer_ports.j2' %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "258035400", + "type": "ingress", + "mode": "dynamic", + "xoff": "81553920" + }, + "egress_lossless_pool": { + "size": "258035400", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool": "ingress_lossless_pool", + "size": "0", + "static_th": "265332900" + }, + "egress_lossy_profile": { + "pool": "egress_lossless_pool", + "size": "0", + "dynamic_th": "0" + }, + "egress_lossless_profile": { + "pool": "egress_lossless_pool", + "size": "0", + "static_th": "265332900" + } + }, +{%- endmacro %} diff --git a/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-P128/context_config.json b/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-P128/context_config.json new file mode 120000 index 00000000000..b470406077c --- /dev/null +++ b/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-P128/context_config.json @@ -0,0 +1 @@ +../../common/context_config.json \ No newline at end of file diff --git a/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-P128/hwsku.json b/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-P128/hwsku.json new file mode 100644 index 00000000000..6b700be5a61 --- /dev/null +++ b/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-P128/hwsku.json @@ -0,0 +1,648 @@ +{ + "interfaces": { + "Ethernet0": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet8": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet16": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet24": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet32": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet40": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet48": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet56": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet64": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet72": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet80": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet88": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet96": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet104": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet112": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet120": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet128": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet136": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet144": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet152": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet160": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet168": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet176": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet184": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet192": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet200": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet208": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet216": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet224": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet232": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet240": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet248": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet256": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet264": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet272": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet280": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet288": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet296": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet304": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet312": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet320": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet328": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet336": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet344": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet352": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet360": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet368": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet376": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet384": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet392": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet400": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet408": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet416": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet424": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet432": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet440": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet448": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet456": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet464": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet472": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet480": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet488": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet496": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet504": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet512": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet520": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet528": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet536": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet544": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet552": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet560": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet568": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet576": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet584": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet592": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet600": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet608": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet616": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet624": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet632": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet640": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet648": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet656": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet664": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet672": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet680": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet688": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet696": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet704": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet712": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet720": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet728": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet736": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet744": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet752": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet760": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet768": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet776": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet784": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet792": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet800": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet808": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet816": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet824": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet832": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet840": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet848": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet856": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet864": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet872": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet880": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet888": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet896": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet904": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet912": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet920": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet928": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet936": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet944": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet952": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet960": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet968": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet976": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet984": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet992": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet1000": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet1008": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet1016": { + "autoneg": "off", + "default_brkout_mode": "1x800G", + "fec": "rs" + }, + "Ethernet1024": { + "default_brkout_mode": "1x100G", + "fec": "rs" + } + } +} diff --git a/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-P128/nh4210-r0021-F-P128.yaml b/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-P128/nh4210-r0021-F-P128.yaml new file mode 100644 index 00000000000..5e0120df4a3 --- /dev/null +++ b/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-P128/nh4210-r0021-F-P128.yaml @@ -0,0 +1,4382 @@ +--- +device: + 0: + PC_PM_CORE: + ? + PC_PM_ID: 16 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x4152637 + TX_LANE_MAP: 0x71625043 + RX_POLARITY_FLIP: 0xc0 + TX_POLARITY_FLIP: 0x51 + ? + PC_PM_ID: 15 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x36270415 + TX_LANE_MAP: 0x51406273 + RX_POLARITY_FLIP: 0x25 + TX_POLARITY_FLIP: 0xce + ? + PC_PM_ID: 14 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x37152604 + TX_LANE_MAP: 0x72634150 + RX_POLARITY_FLIP: 0x2b + TX_POLARITY_FLIP: 0xc9 + ? + PC_PM_ID: 10 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x36270415 + TX_LANE_MAP: 0x51437062 + RX_POLARITY_FLIP: 0x49 + TX_POLARITY_FLIP: 0xd3 + ? + PC_PM_ID: 9 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x4153627 + TX_LANE_MAP: 0x62735140 + RX_POLARITY_FLIP: 0x47 + TX_POLARITY_FLIP: 0x17 + ? + PC_PM_ID: 11 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x25043716 + TX_LANE_MAP: 0x42607153 + RX_POLARITY_FLIP: 0x9c + TX_POLARITY_FLIP: 0xb + ? + PC_PM_ID: 13 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x14073526 + TX_LANE_MAP: 0x41536072 + RX_POLARITY_FLIP: 0x3f + TX_POLARITY_FLIP: 0x4e + ? + PC_PM_ID: 12 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x36240715 + TX_LANE_MAP: 0x51406273 + RX_POLARITY_FLIP: 0x38 + TX_POLARITY_FLIP: 0x61 + ? + PC_PM_ID: 64 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x6152734 + TX_LANE_MAP: 0x73625140 + RX_POLARITY_FLIP: 0x8c + TX_POLARITY_FLIP: 0x6e + ? + PC_PM_ID: 63 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x30641275 + TX_LANE_MAP: 0x57124603 + RX_POLARITY_FLIP: 0x95 + TX_POLARITY_FLIP: 0x5e + ? + PC_PM_ID: 62 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x6152734 + TX_LANE_MAP: 0x73625140 + RX_POLARITY_FLIP: 0xcd + TX_POLARITY_FLIP: 0xee + ? + PC_PM_ID: 58 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x27340615 + TX_LANE_MAP: 0x51407362 + RX_POLARITY_FLIP: 0x9d + TX_POLARITY_FLIP: 0x4c + ? + PC_PM_ID: 57 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x21753064 + TX_LANE_MAP: 0x46035712 + RX_POLARITY_FLIP: 0x2e + TX_POLARITY_FLIP: 0x4f + ? + PC_PM_ID: 59 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x26341705 + TX_LANE_MAP: 0x40516372 + RX_POLARITY_FLIP: 0x3 + TX_POLARITY_FLIP: 0x83 + ? + PC_PM_ID: 61 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x27150634 + TX_LANE_MAP: 0x43605172 + RX_POLARITY_FLIP: 0xa7 + TX_POLARITY_FLIP: 0xbf + ? + PC_PM_ID: 60 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x30642175 + TX_LANE_MAP: 0x57124603 + RX_POLARITY_FLIP: 0xb5 + TX_POLARITY_FLIP: 0x44 + ? + PC_PM_ID: 112 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x25041736 + TX_LANE_MAP: 0x62704351 + RX_POLARITY_FLIP: 0x47 + TX_POLARITY_FLIP: 0x82 + ? + PC_PM_ID: 111 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x4261537 + TX_LANE_MAP: 0x50426371 + RX_POLARITY_FLIP: 0x83 + TX_POLARITY_FLIP: 0xd6 + ? + PC_PM_ID: 110 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x26051734 + TX_LANE_MAP: 0x73624051 + RX_POLARITY_FLIP: 0x51 + TX_POLARITY_FLIP: 0xe1 + ? + PC_PM_ID: 106 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x17362504 + TX_LANE_MAP: 0x73516240 + RX_POLARITY_FLIP: 0x0 + TX_POLARITY_FLIP: 0x92 + ? + PC_PM_ID: 105 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x15370426 + TX_LANE_MAP: 0x63715042 + RX_POLARITY_FLIP: 0x4f + TX_POLARITY_FLIP: 0xc0 + ? + PC_PM_ID: 107 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x24361705 + TX_LANE_MAP: 0x40517362 + RX_POLARITY_FLIP: 0x8e + TX_POLARITY_FLIP: 0x5a + ? + PC_PM_ID: 109 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x17063425 + TX_LANE_MAP: 0x51734062 + RX_POLARITY_FLIP: 0xb9 + TX_POLARITY_FLIP: 0xdd + ? + PC_PM_ID: 108 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x34261507 + TX_LANE_MAP: 0x40526371 + RX_POLARITY_FLIP: 0x78 + TX_POLARITY_FLIP: 0x11 + ? + PC_PM_ID: 128 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x16053724 + TX_LANE_MAP: 0x72635041 + RX_POLARITY_FLIP: 0x37 + TX_POLARITY_FLIP: 0x79 + ? + PC_PM_ID: 127 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x30641275 + TX_LANE_MAP: 0x57124603 + RX_POLARITY_FLIP: 0xe5 + TX_POLARITY_FLIP: 0x5b + ? + PC_PM_ID: 126 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x16053724 + TX_LANE_MAP: 0x73625041 + RX_POLARITY_FLIP: 0x23 + TX_POLARITY_FLIP: 0x79 + ? + PC_PM_ID: 122 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x37241605 + TX_LANE_MAP: 0x50417263 + RX_POLARITY_FLIP: 0x66 + TX_POLARITY_FLIP: 0x1d + ? + PC_PM_ID: 121 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x21753064 + TX_LANE_MAP: 0x46035712 + RX_POLARITY_FLIP: 0xf + TX_POLARITY_FLIP: 0x1f + ? + PC_PM_ID: 123 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x36240715 + TX_LANE_MAP: 0x41506273 + RX_POLARITY_FLIP: 0xcd + TX_POLARITY_FLIP: 0x23 + ? + PC_PM_ID: 125 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x17253604 + TX_LANE_MAP: 0x40635271 + RX_POLARITY_FLIP: 0x0 + TX_POLARITY_FLIP: 0xb7 + ? + PC_PM_ID: 124 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x30642175 + TX_LANE_MAP: 0x57124603 + RX_POLARITY_FLIP: 0xb2 + TX_POLARITY_FLIP: 0x41 + ? + PC_PM_ID: 30 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x45763210 + TX_LANE_MAP: 0x57246013 + RX_POLARITY_FLIP: 0xe8 + TX_POLARITY_FLIP: 0xd1 + ? + PC_PM_ID: 26 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x47563210 + TX_LANE_MAP: 0x15746203 + RX_POLARITY_FLIP: 0xc1 + TX_POLARITY_FLIP: 0x36 + ? + PC_PM_ID: 29 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x75604123 + TX_LANE_MAP: 0x46702513 + RX_POLARITY_FLIP: 0xb9 + TX_POLARITY_FLIP: 0x41 + ? + PC_PM_ID: 28 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x41576320 + TX_LANE_MAP: 0x42560713 + RX_POLARITY_FLIP: 0xe8 + TX_POLARITY_FLIP: 0xeb + ? + PC_PM_ID: 35 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x46750123 + TX_LANE_MAP: 0x47250613 + RX_POLARITY_FLIP: 0x48 + TX_POLARITY_FLIP: 0x18 + ? + PC_PM_ID: 33 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x57463102 + TX_LANE_MAP: 0x75462013 + RX_POLARITY_FLIP: 0x22 + TX_POLARITY_FLIP: 0xa + ? + PC_PM_ID: 39 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x67450213 + TX_LANE_MAP: 0x57246013 + RX_POLARITY_FLIP: 0x1e + TX_POLARITY_FLIP: 0xd4 + ? + PC_PM_ID: 40 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x57460123 + TX_LANE_MAP: 0x25746103 + RX_POLARITY_FLIP: 0x72 + TX_POLARITY_FLIP: 0xf8 + ? + PC_PM_ID: 46 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x47532601 + TX_LANE_MAP: 0x45612703 + RX_POLARITY_FLIP: 0x6 + TX_POLARITY_FLIP: 0xd8 + ? + PC_PM_ID: 42 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x41765320 + TX_LANE_MAP: 0x46510723 + RX_POLARITY_FLIP: 0x74 + TX_POLARITY_FLIP: 0x14 + ? + PC_PM_ID: 45 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x67543120 + TX_LANE_MAP: 0x74061523 + RX_POLARITY_FLIP: 0x56 + TX_POLARITY_FLIP: 0x5b + ? + PC_PM_ID: 44 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x54763102 + TX_LANE_MAP: 0x75461023 + RX_POLARITY_FLIP: 0x45 + TX_POLARITY_FLIP: 0xa6 + ? + PC_PM_ID: 51 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x67541203 + TX_LANE_MAP: 0x67245013 + RX_POLARITY_FLIP: 0xb8 + TX_POLARITY_FLIP: 0xc2 + ? + PC_PM_ID: 49 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x57640123 + TX_LANE_MAP: 0x25746103 + RX_POLARITY_FLIP: 0x12 + TX_POLARITY_FLIP: 0x2b + ? + PC_PM_ID: 55 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x57601423 + TX_LANE_MAP: 0x45621703 + RX_POLARITY_FLIP: 0x4b + TX_POLARITY_FLIP: 0x84 + ? + PC_PM_ID: 56 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x41765320 + TX_LANE_MAP: 0x46520713 + RX_POLARITY_FLIP: 0xf0 + TX_POLARITY_FLIP: 0xac + ? + PC_PM_ID: 78 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x54270631 + TX_LANE_MAP: 0x54672310 + RX_POLARITY_FLIP: 0xd6 + TX_POLARITY_FLIP: 0xa3 + ? + PC_PM_ID: 74 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x54671023 + TX_LANE_MAP: 0x56420713 + RX_POLARITY_FLIP: 0xb9 + TX_POLARITY_FLIP: 0xd1 + ? + PC_PM_ID: 77 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x75463102 + TX_LANE_MAP: 0x56371402 + RX_POLARITY_FLIP: 0x3a + TX_POLARITY_FLIP: 0x19 + ? + PC_PM_ID: 76 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x71460523 + TX_LANE_MAP: 0x76245301 + RX_POLARITY_FLIP: 0x24 + TX_POLARITY_FLIP: 0x91 + ? + PC_PM_ID: 83 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x53742601 + TX_LANE_MAP: 0x54670231 + RX_POLARITY_FLIP: 0xde + TX_POLARITY_FLIP: 0x4 + ? + PC_PM_ID: 81 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x15746023 + TX_LANE_MAP: 0x45761320 + RX_POLARITY_FLIP: 0xcf + TX_POLARITY_FLIP: 0x38 + ? + PC_PM_ID: 87 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x54271603 + TX_LANE_MAP: 0x54671320 + RX_POLARITY_FLIP: 0xa7 + TX_POLARITY_FLIP: 0x39 + ? + PC_PM_ID: 88 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x54671320 + TX_LANE_MAP: 0x46520713 + RX_POLARITY_FLIP: 0xef + TX_POLARITY_FLIP: 0x2b + ? + PC_PM_ID: 94 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x46750132 + TX_LANE_MAP: 0x75041632 + RX_POLARITY_FLIP: 0x1c + TX_POLARITY_FLIP: 0x37 + ? + PC_PM_ID: 90 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x41560723 + TX_LANE_MAP: 0x75246301 + RX_POLARITY_FLIP: 0x6b + TX_POLARITY_FLIP: 0x85 + ? + PC_PM_ID: 93 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x70564132 + TX_LANE_MAP: 0x67540213 + RX_POLARITY_FLIP: 0x55 + TX_POLARITY_FLIP: 0x29 + ? + PC_PM_ID: 92 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x26475031 + TX_LANE_MAP: 0x46752013 + RX_POLARITY_FLIP: 0x92 + TX_POLARITY_FLIP: 0x83 + ? + PC_PM_ID: 99 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x75140632 + TX_LANE_MAP: 0x54671320 + RX_POLARITY_FLIP: 0x84 + TX_POLARITY_FLIP: 0xd3 + ? + PC_PM_ID: 97 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x57641320 + TX_LANE_MAP: 0x56410723 + RX_POLARITY_FLIP: 0xcc + TX_POLARITY_FLIP: 0x1a + ? + PC_PM_ID: 103 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x64753201 + TX_LANE_MAP: 0x75042631 + RX_POLARITY_FLIP: 0xe5 + TX_POLARITY_FLIP: 0x57 + ? + PC_PM_ID: 104 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x52463710 + TX_LANE_MAP: 0x75146302 + RX_POLARITY_FLIP: 0x98 + TX_POLARITY_FLIP: 0x34 + ? + PC_PM_ID: 32 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x52467310 + TX_LANE_MAP: 0x30267415 + RX_POLARITY_FLIP: 0x98 + TX_POLARITY_FLIP: 0x76 + ? + PC_PM_ID: 31 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x64753210 + TX_LANE_MAP: 0x3621754 + RX_POLARITY_FLIP: 0xe6 + TX_POLARITY_FLIP: 0x6b + ? + PC_PM_ID: 25 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x57643102 + TX_LANE_MAP: 0x32076514 + RX_POLARITY_FLIP: 0xc3 + TX_POLARITY_FLIP: 0xad + ? + PC_PM_ID: 27 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x75140623 + TX_LANE_MAP: 0x23106547 + RX_POLARITY_FLIP: 0x84 + TX_POLARITY_FLIP: 0x97 + ? + PC_PM_ID: 36 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x45276301 + TX_LANE_MAP: 0x1324576 + RX_POLARITY_FLIP: 0x7a + TX_POLARITY_FLIP: 0x98 + ? + PC_PM_ID: 37 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x76510432 + TX_LANE_MAP: 0x1537462 + RX_POLARITY_FLIP: 0x59 + TX_POLARITY_FLIP: 0xb0 + ? + PC_PM_ID: 34 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x41567023 + TX_LANE_MAP: 0x30167425 + RX_POLARITY_FLIP: 0x6b + TX_POLARITY_FLIP: 0x58 + ? + PC_PM_ID: 38 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x46750123 + TX_LANE_MAP: 0x3612754 + RX_POLARITY_FLIP: 0x1c + TX_POLARITY_FLIP: 0xe9 + ? + PC_PM_ID: 48 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x54673102 + TX_LANE_MAP: 0x31076425 + RX_POLARITY_FLIP: 0xe0 + TX_POLARITY_FLIP: 0x2e + ? + PC_PM_ID: 47 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x54271630 + TX_LANE_MAP: 0x23106547 + RX_POLARITY_FLIP: 0xa7 + TX_POLARITY_FLIP: 0x39 + ? + PC_PM_ID: 41 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x76145203 + TX_LANE_MAP: 0x32014675 + RX_POLARITY_FLIP: 0x21 + TX_POLARITY_FLIP: 0xe6 + ? + PC_PM_ID: 43 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x54763201 + TX_LANE_MAP: 0x3614752 + RX_POLARITY_FLIP: 0xde + TX_POLARITY_FLIP: 0x1 + ? + PC_PM_ID: 52 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x71465023 + TX_LANE_MAP: 0x30157426 + RX_POLARITY_FLIP: 0x24 + TX_POLARITY_FLIP: 0xdc + ? + PC_PM_ID: 53 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x75463120 + TX_LANE_MAP: 0x30412567 + RX_POLARITY_FLIP: 0x39 + TX_POLARITY_FLIP: 0x19 + ? + PC_PM_ID: 50 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x54670132 + TX_LANE_MAP: 0x31076524 + RX_POLARITY_FLIP: 0xb9 + TX_POLARITY_FLIP: 0x41 + ? + PC_PM_ID: 54 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x54270613 + TX_LANE_MAP: 0x13206547 + RX_POLARITY_FLIP: 0xd5 + TX_POLARITY_FLIP: 0x9c + ? + PC_PM_ID: 80 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x47563102 + TX_LANE_MAP: 0x31072465 + RX_POLARITY_FLIP: 0x9f + TX_POLARITY_FLIP: 0xfa + ? + PC_PM_ID: 79 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x57621430 + TX_LANE_MAP: 0x13062547 + RX_POLARITY_FLIP: 0x5a + TX_POLARITY_FLIP: 0x3 + ? + PC_PM_ID: 73 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x57640123 + TX_LANE_MAP: 0x10362475 + RX_POLARITY_FLIP: 0x12 + TX_POLARITY_FLIP: 0x82 + ? + PC_PM_ID: 75 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x67542130 + TX_LANE_MAP: 0x1325764 + RX_POLARITY_FLIP: 0xb4 + TX_POLARITY_FLIP: 0x46 + ? + PC_PM_ID: 84 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x54763120 + TX_LANE_MAP: 0x2371465 + RX_POLARITY_FLIP: 0x45 + TX_POLARITY_FLIP: 0x22 + ? + PC_PM_ID: 85 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x74563120 + TX_LANE_MAP: 0x30251476 + RX_POLARITY_FLIP: 0xc6 + TX_POLARITY_FLIP: 0xad + ? + PC_PM_ID: 82 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x47563102 + TX_LANE_MAP: 0x32071465 + RX_POLARITY_FLIP: 0x17 + TX_POLARITY_FLIP: 0xd7 + ? + PC_PM_ID: 86 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x47502613 + TX_LANE_MAP: 0x23061547 + RX_POLARITY_FLIP: 0x14 + TX_POLARITY_FLIP: 0x8e + ? + PC_PM_ID: 96 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x57460123 + TX_LANE_MAP: 0x10362475 + RX_POLARITY_FLIP: 0x72 + TX_POLARITY_FLIP: 0xef + ? + PC_PM_ID: 95 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x67452031 + TX_LANE_MAP: 0x1326754 + RX_POLARITY_FLIP: 0x1d + TX_POLARITY_FLIP: 0x87 + ? + PC_PM_ID: 89 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x57463120 + TX_LANE_MAP: 0x1372465 + RX_POLARITY_FLIP: 0x22 + TX_POLARITY_FLIP: 0xbe + ? + PC_PM_ID: 91 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x65740123 + TX_LANE_MAP: 0x32160745 + RX_POLARITY_FLIP: 0x88 + TX_POLARITY_FLIP: 0x9 + ? + PC_PM_ID: 100 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x45673102 + TX_LANE_MAP: 0x31076425 + RX_POLARITY_FLIP: 0xaf + TX_POLARITY_FLIP: 0x28 + ? + PC_PM_ID: 101 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x75624130 + TX_LANE_MAP: 0x23170645 + RX_POLARITY_FLIP: 0xab + TX_POLARITY_FLIP: 0x44 + ? + PC_PM_ID: 98 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x47563210 + TX_LANE_MAP: 0x20361475 + RX_POLARITY_FLIP: 0xc1 + TX_POLARITY_FLIP: 0x36 + ? + PC_PM_ID: 102 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x45762301 + TX_LANE_MAP: 0x1326754 + RX_POLARITY_FLIP: 0xe4 + TX_POLARITY_FLIP: 0x27 + ? + PC_PM_ID: 4 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x3461257 + TX_LANE_MAP: 0x64307521 + RX_POLARITY_FLIP: 0x8e + TX_POLARITY_FLIP: 0xd7 + ? + PC_PM_ID: 5 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x71526340 + TX_LANE_MAP: 0x25170436 + RX_POLARITY_FLIP: 0x0 + TX_POLARITY_FLIP: 0xb7 + ? + PC_PM_ID: 3 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x63427051 + TX_LANE_MAP: 0x26371405 + RX_POLARITY_FLIP: 0x31 + TX_POLARITY_FLIP: 0xce + ? + PC_PM_ID: 1 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x12570346 + TX_LANE_MAP: 0x75216430 + RX_POLARITY_FLIP: 0xf + TX_POLARITY_FLIP: 0xf2 + ? + PC_PM_ID: 2 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x73426150 + TX_LANE_MAP: 0x27360514 + RX_POLARITY_FLIP: 0x66 + TX_POLARITY_FLIP: 0x1d + ? + PC_PM_ID: 6 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x61507342 + TX_LANE_MAP: 0x5142736 + RX_POLARITY_FLIP: 0x13 + TX_POLARITY_FLIP: 0x6b + ? + PC_PM_ID: 7 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x3462157 + TX_LANE_MAP: 0x64307521 + RX_POLARITY_FLIP: 0x25 + TX_POLARITY_FLIP: 0x85 + ? + PC_PM_ID: 8 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x61507342 + TX_LANE_MAP: 0x5143726 + RX_POLARITY_FLIP: 0x3b + TX_POLARITY_FLIP: 0x6b + ? + PC_PM_ID: 20 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x43625170 + TX_LANE_MAP: 0x36170425 + RX_POLARITY_FLIP: 0x4b + TX_POLARITY_FLIP: 0xdd + ? + PC_PM_ID: 21 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x71604352 + TX_LANE_MAP: 0x4261537 + RX_POLARITY_FLIP: 0x76 + TX_POLARITY_FLIP: 0xee + ? + PC_PM_ID: 19 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x42637150 + TX_LANE_MAP: 0x37260415 + RX_POLARITY_FLIP: 0xb2 + TX_POLARITY_FLIP: 0xa5 + ? + PC_PM_ID: 17 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x51734062 + TX_LANE_MAP: 0x5243617 + RX_POLARITY_FLIP: 0x8f + TX_POLARITY_FLIP: 0xc + ? + PC_PM_ID: 18 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x71635240 + TX_LANE_MAP: 0x26043715 + RX_POLARITY_FLIP: 0xff + TX_POLARITY_FLIP: 0xe9 + ? + PC_PM_ID: 22 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x62507143 + TX_LANE_MAP: 0x4153726 + RX_POLARITY_FLIP: 0xa2 + TX_POLARITY_FLIP: 0x2d + ? + PC_PM_ID: 23 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x40625173 + TX_LANE_MAP: 0x36170524 + RX_POLARITY_FLIP: 0xbc + TX_POLARITY_FLIP: 0x61 + ? + PC_PM_ID: 24 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x52407163 + TX_LANE_MAP: 0x34152607 + RX_POLARITY_FLIP: 0x8b + TX_POLARITY_FLIP: 0x14 + ? + PC_PM_ID: 68 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x3461257 + TX_LANE_MAP: 0x64307521 + RX_POLARITY_FLIP: 0x85 + TX_POLARITY_FLIP: 0x77 + ? + PC_PM_ID: 69 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x72516043 + TX_LANE_MAP: 0x15273406 + RX_POLARITY_FLIP: 0x5b + TX_POLARITY_FLIP: 0xf7 + ? + PC_PM_ID: 67 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x62437150 + TX_LANE_MAP: 0x36270415 + RX_POLARITY_FLIP: 0xfc + TX_POLARITY_FLIP: 0xcb + ? + PC_PM_ID: 65 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x12570346 + TX_LANE_MAP: 0x75216430 + RX_POLARITY_FLIP: 0x1d + TX_POLARITY_FLIP: 0xf8 + ? + PC_PM_ID: 66 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x72436051 + TX_LANE_MAP: 0x27361504 + RX_POLARITY_FLIP: 0x91 + TX_POLARITY_FLIP: 0x97 + ? + PC_PM_ID: 70 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x60517243 + TX_LANE_MAP: 0x15043726 + RX_POLARITY_FLIP: 0xce + TX_POLARITY_FLIP: 0xdd + ? + PC_PM_ID: 71 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x3462157 + TX_LANE_MAP: 0x64307521 + RX_POLARITY_FLIP: 0x95 + TX_POLARITY_FLIP: 0x25 + ? + PC_PM_ID: 72 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x60517243 + TX_LANE_MAP: 0x15043726 + RX_POLARITY_FLIP: 0x4c + TX_POLARITY_FLIP: 0xd9 + ? + PC_PM_ID: 116 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x63427051 + TX_LANE_MAP: 0x26371504 + RX_POLARITY_FLIP: 0xcb + TX_POLARITY_FLIP: 0xd6 + ? + PC_PM_ID: 117 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x41705362 + TX_LANE_MAP: 0x26370415 + RX_POLARITY_FLIP: 0x3f + TX_POLARITY_FLIP: 0x5a + ? + PC_PM_ID: 115 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x52407361 + TX_LANE_MAP: 0x17352406 + RX_POLARITY_FLIP: 0x93 + TX_POLARITY_FLIP: 0x8f + ? + PC_PM_ID: 113 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x40516372 + TX_LANE_MAP: 0x15042637 + RX_POLARITY_FLIP: 0x8b + TX_POLARITY_FLIP: 0xb2 + ? + PC_PM_ID: 114 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x63724051 + TX_LANE_MAP: 0x27360514 + RX_POLARITY_FLIP: 0x79 + TX_POLARITY_FLIP: 0x49 + ? + PC_PM_ID: 118 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x73516240 + TX_LANE_MAP: 0x14052736 + RX_POLARITY_FLIP: 0x17 + TX_POLARITY_FLIP: 0x6c + ? + PC_PM_ID: 119 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x63724051 + TX_LANE_MAP: 0x26371504 + RX_POLARITY_FLIP: 0xe5 + TX_POLARITY_FLIP: 0x23 + ? + PC_PM_ID: 120 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x40516273 + TX_LANE_MAP: 0x15340726 + RX_POLARITY_FLIP: 0xc0 + TX_POLARITY_FLIP: 0xa2 + ? + PC_PM_ID: 129 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x1230 + TX_LANE_MAP: 0x2103 + RX_POLARITY_FLIP: 0x7 + TX_POLARITY_FLIP: 0xb +... +--- +device: + 0: + PC_PORT_PHYS_MAP: + ? + PORT_ID: 0 + : + PC_PHYS_PORT_ID: 0 + ? + PORT_ID: 54 + : + PC_PHYS_PORT_ID: 121 + ? + PORT_ID: 55 + : + PC_PHYS_PORT_ID: 113 + ? + PORT_ID: 56 + : + PC_PHYS_PORT_ID: 105 + ? + PORT_ID: 36 + : + PC_PHYS_PORT_ID: 73 + ? + PORT_ID: 37 + : + PC_PHYS_PORT_ID: 65 + ? + PORT_ID: 38 + : + PC_PHYS_PORT_ID: 81 + ? + PORT_ID: 57 + : + PC_PHYS_PORT_ID: 97 + ? + PORT_ID: 39 + : + PC_PHYS_PORT_ID: 89 + ? + PORT_ID: 270 + : + PC_PHYS_PORT_ID: 505 + ? + PORT_ID: 271 + : + PC_PHYS_PORT_ID: 497 + ? + PORT_ID: 272 + : + PC_PHYS_PORT_ID: 489 + ? + PORT_ID: 252 + : + PC_PHYS_PORT_ID: 457 + ? + PORT_ID: 253 + : + PC_PHYS_PORT_ID: 449 + ? + PORT_ID: 254 + : + PC_PHYS_PORT_ID: 465 + ? + PORT_ID: 273 + : + PC_PHYS_PORT_ID: 481 + ? + PORT_ID: 255 + : + PC_PHYS_PORT_ID: 473 + ? + PORT_ID: 486 + : + PC_PHYS_PORT_ID: 889 + ? + PORT_ID: 487 + : + PC_PHYS_PORT_ID: 881 + ? + PORT_ID: 488 + : + PC_PHYS_PORT_ID: 873 + ? + PORT_ID: 468 + : + PC_PHYS_PORT_ID: 841 + ? + PORT_ID: 469 + : + PC_PHYS_PORT_ID: 833 + ? + PORT_ID: 470 + : + PC_PHYS_PORT_ID: 849 + ? + PORT_ID: 489 + : + PC_PHYS_PORT_ID: 865 + ? + PORT_ID: 471 + : + PC_PHYS_PORT_ID: 857 + ? + PORT_ID: 558 + : + PC_PHYS_PORT_ID: 1017 + ? + PORT_ID: 559 + : + PC_PHYS_PORT_ID: 1009 + ? + PORT_ID: 560 + : + PC_PHYS_PORT_ID: 1001 + ? + PORT_ID: 540 + : + PC_PHYS_PORT_ID: 969 + ? + PORT_ID: 541 + : + PC_PHYS_PORT_ID: 961 + ? + PORT_ID: 542 + : + PC_PHYS_PORT_ID: 977 + ? + PORT_ID: 561 + : + PC_PHYS_PORT_ID: 993 + ? + PORT_ID: 543 + : + PC_PHYS_PORT_ID: 985 + ? + PORT_ID: 126 + : + PC_PHYS_PORT_ID: 233 + ? + PORT_ID: 108 + : + PC_PHYS_PORT_ID: 201 + ? + PORT_ID: 127 + : + PC_PHYS_PORT_ID: 225 + ? + PORT_ID: 109 + : + PC_PHYS_PORT_ID: 217 + ? + PORT_ID: 144 + : + PC_PHYS_PORT_ID: 273 + ? + PORT_ID: 145 + : + PC_PHYS_PORT_ID: 257 + ? + PORT_ID: 162 + : + PC_PHYS_PORT_ID: 305 + ? + PORT_ID: 163 + : + PC_PHYS_PORT_ID: 313 + ? + PORT_ID: 198 + : + PC_PHYS_PORT_ID: 361 + ? + PORT_ID: 180 + : + PC_PHYS_PORT_ID: 329 + ? + PORT_ID: 199 + : + PC_PHYS_PORT_ID: 353 + ? + PORT_ID: 181 + : + PC_PHYS_PORT_ID: 345 + ? + PORT_ID: 216 + : + PC_PHYS_PORT_ID: 401 + ? + PORT_ID: 217 + : + PC_PHYS_PORT_ID: 385 + ? + PORT_ID: 234 + : + PC_PHYS_PORT_ID: 433 + ? + PORT_ID: 235 + : + PC_PHYS_PORT_ID: 441 + ? + PORT_ID: 342 + : + PC_PHYS_PORT_ID: 617 + ? + PORT_ID: 324 + : + PC_PHYS_PORT_ID: 585 + ? + PORT_ID: 343 + : + PC_PHYS_PORT_ID: 609 + ? + PORT_ID: 325 + : + PC_PHYS_PORT_ID: 601 + ? + PORT_ID: 360 + : + PC_PHYS_PORT_ID: 657 + ? + PORT_ID: 361 + : + PC_PHYS_PORT_ID: 641 + ? + PORT_ID: 378 + : + PC_PHYS_PORT_ID: 689 + ? + PORT_ID: 379 + : + PC_PHYS_PORT_ID: 697 + ? + PORT_ID: 414 + : + PC_PHYS_PORT_ID: 745 + ? + PORT_ID: 396 + : + PC_PHYS_PORT_ID: 713 + ? + PORT_ID: 415 + : + PC_PHYS_PORT_ID: 737 + ? + PORT_ID: 397 + : + PC_PHYS_PORT_ID: 729 + ? + PORT_ID: 432 + : + PC_PHYS_PORT_ID: 785 + ? + PORT_ID: 433 + : + PC_PHYS_PORT_ID: 769 + ? + PORT_ID: 450 + : + PC_PHYS_PORT_ID: 817 + ? + PORT_ID: 451 + : + PC_PHYS_PORT_ID: 825 + ? + PORT_ID: 128 + : + PC_PHYS_PORT_ID: 249 + ? + PORT_ID: 129 + : + PC_PHYS_PORT_ID: 241 + ? + PORT_ID: 110 + : + PC_PHYS_PORT_ID: 193 + ? + PORT_ID: 111 + : + PC_PHYS_PORT_ID: 209 + ? + PORT_ID: 146 + : + PC_PHYS_PORT_ID: 281 + ? + PORT_ID: 164 + : + PC_PHYS_PORT_ID: 289 + ? + PORT_ID: 147 + : + PC_PHYS_PORT_ID: 265 + ? + PORT_ID: 165 + : + PC_PHYS_PORT_ID: 297 + ? + PORT_ID: 200 + : + PC_PHYS_PORT_ID: 377 + ? + PORT_ID: 201 + : + PC_PHYS_PORT_ID: 369 + ? + PORT_ID: 182 + : + PC_PHYS_PORT_ID: 321 + ? + PORT_ID: 183 + : + PC_PHYS_PORT_ID: 337 + ? + PORT_ID: 218 + : + PC_PHYS_PORT_ID: 409 + ? + PORT_ID: 236 + : + PC_PHYS_PORT_ID: 417 + ? + PORT_ID: 219 + : + PC_PHYS_PORT_ID: 393 + ? + PORT_ID: 237 + : + PC_PHYS_PORT_ID: 425 + ? + PORT_ID: 344 + : + PC_PHYS_PORT_ID: 633 + ? + PORT_ID: 345 + : + PC_PHYS_PORT_ID: 625 + ? + PORT_ID: 326 + : + PC_PHYS_PORT_ID: 577 + ? + PORT_ID: 327 + : + PC_PHYS_PORT_ID: 593 + ? + PORT_ID: 362 + : + PC_PHYS_PORT_ID: 665 + ? + PORT_ID: 380 + : + PC_PHYS_PORT_ID: 673 + ? + PORT_ID: 363 + : + PC_PHYS_PORT_ID: 649 + ? + PORT_ID: 381 + : + PC_PHYS_PORT_ID: 681 + ? + PORT_ID: 416 + : + PC_PHYS_PORT_ID: 761 + ? + PORT_ID: 417 + : + PC_PHYS_PORT_ID: 753 + ? + PORT_ID: 398 + : + PC_PHYS_PORT_ID: 705 + ? + PORT_ID: 399 + : + PC_PHYS_PORT_ID: 721 + ? + PORT_ID: 434 + : + PC_PHYS_PORT_ID: 793 + ? + PORT_ID: 452 + : + PC_PHYS_PORT_ID: 801 + ? + PORT_ID: 435 + : + PC_PHYS_PORT_ID: 777 + ? + PORT_ID: 453 + : + PC_PHYS_PORT_ID: 809 + ? + PORT_ID: 1 + : + PC_PHYS_PORT_ID: 25 + ? + PORT_ID: 18 + : + PC_PHYS_PORT_ID: 33 + ? + PORT_ID: 2 + : + PC_PHYS_PORT_ID: 17 + ? + PORT_ID: 3 + : + PC_PHYS_PORT_ID: 1 + ? + PORT_ID: 4 + : + PC_PHYS_PORT_ID: 9 + ? + PORT_ID: 19 + : + PC_PHYS_PORT_ID: 41 + ? + PORT_ID: 20 + : + PC_PHYS_PORT_ID: 49 + ? + PORT_ID: 21 + : + PC_PHYS_PORT_ID: 57 + ? + PORT_ID: 72 + : + PC_PHYS_PORT_ID: 153 + ? + PORT_ID: 90 + : + PC_PHYS_PORT_ID: 161 + ? + PORT_ID: 73 + : + PC_PHYS_PORT_ID: 145 + ? + PORT_ID: 74 + : + PC_PHYS_PORT_ID: 129 + ? + PORT_ID: 75 + : + PC_PHYS_PORT_ID: 137 + ? + PORT_ID: 91 + : + PC_PHYS_PORT_ID: 169 + ? + PORT_ID: 92 + : + PC_PHYS_PORT_ID: 177 + ? + PORT_ID: 93 + : + PC_PHYS_PORT_ID: 185 + ? + PORT_ID: 288 + : + PC_PHYS_PORT_ID: 537 + ? + PORT_ID: 306 + : + PC_PHYS_PORT_ID: 545 + ? + PORT_ID: 289 + : + PC_PHYS_PORT_ID: 529 + ? + PORT_ID: 290 + : + PC_PHYS_PORT_ID: 513 + ? + PORT_ID: 291 + : + PC_PHYS_PORT_ID: 521 + ? + PORT_ID: 307 + : + PC_PHYS_PORT_ID: 553 + ? + PORT_ID: 308 + : + PC_PHYS_PORT_ID: 561 + ? + PORT_ID: 309 + : + PC_PHYS_PORT_ID: 569 + ? + PORT_ID: 504 + : + PC_PHYS_PORT_ID: 921 + ? + PORT_ID: 522 + : + PC_PHYS_PORT_ID: 929 + ? + PORT_ID: 505 + : + PC_PHYS_PORT_ID: 913 + ? + PORT_ID: 506 + : + PC_PHYS_PORT_ID: 897 + ? + PORT_ID: 507 + : + PC_PHYS_PORT_ID: 905 + ? + PORT_ID: 523 + : + PC_PHYS_PORT_ID: 937 + ? + PORT_ID: 524 + : + PC_PHYS_PORT_ID: 945 + ? + PORT_ID: 525 + : + PC_PHYS_PORT_ID: 953 + ? + PORT_ID: 268 + : + PC_PHYS_PORT_ID: 1026 +... +--- +device: + 0: + PC_PORT: + ? + PORT_ID: 1 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 2 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 3 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 4 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 18 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 19 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 20 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 21 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 36 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 37 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 38 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 39 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 54 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 55 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 56 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 57 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 72 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 73 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 74 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 75 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 90 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 91 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 92 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 93 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 108 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 109 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 110 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 111 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 126 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 127 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 128 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 129 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 144 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 145 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 146 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 147 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 162 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 163 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 164 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 165 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 180 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 181 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 182 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 183 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 198 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 199 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 200 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 201 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 216 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 217 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 218 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 219 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 234 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 235 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 236 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 237 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 252 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 253 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 254 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 255 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 268 + : + ENABLE: 0 + SPEED: 100000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS528 + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 270 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 271 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 272 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 273 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 288 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 289 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 290 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 291 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 306 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 307 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 308 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 309 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 324 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 325 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 326 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 327 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 342 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 343 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 344 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 345 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 360 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 361 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 362 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 363 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 378 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 379 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 380 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 381 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 396 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 397 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 398 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 399 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 414 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 415 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 416 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 417 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 432 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 433 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 434 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 435 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 450 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 451 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 452 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 453 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 468 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 469 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 470 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 471 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 486 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 487 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 488 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 489 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 504 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 505 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 506 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 507 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 522 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 523 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 524 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 525 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 540 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 541 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 542 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 543 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 558 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 559 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 560 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: 561 + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 +... +--- +device: + 0: + PC_TX_TAPS: +... +--- +bcm_device: + 0: + global: + pktio_mode: 1 + sai_mmu_custom_config : 1 + sai_ip_counter_cstats: 1 + vlan_flooding_l2mc_num_reserved: 0 + ipv6_lpm_128b_enable: 1 + shared_block_mask_section: uc_bc + skip_protocol_default_entries: 1 + # LTSW uses value 1 for ALPM combined mode + l3_alpm_template: 1 + l3_alpm_hit_skip: 1 + sai_feat_tail_timestamp : 0 + sai_port_phy_time_sync_en : 1 + sai_field_group_auto_prioritize: 1 + #l3_intf_vlan_split_egress for MTU at L3IF + l3_intf_vlan_split_egress : 1 + pfc_deadlock_seq_control : 0 + sai_pfc_dlr_init_capability: 2 + #srv6:0x10 ipinip:0x2 + sai_tunnel_support: 0x12 + bcm_tunnel_term_compatible_mode: 1 + l3_ecmp_member_first_lkup_mem_size: 32768 + #enable port queue drop stats + sai_stats_support_mask: 0x80 + #disable vxlan tunnel stats + sai_stats_disable_mask: 0x200 + #For PPIU Mode, Set resources for counters in global mode counters like ACL, etc + global_flexctr_ing_action_num_reserved: 20 + global_flexctr_ing_pool_num_reserved: 8 + global_flexctr_ing_op_profile_num_reserved: 20 + global_flexctr_ing_group_num_reserved: 2 + global_flexctr_egr_action_num_reserved: 8 + global_flexctr_egr_pool_num_reserved: 5 + global_flexctr_egr_op_profile_num_reserved: 10 + global_flexctr_egr_group_num_reserved: 1 + l3_alpm_large_vrf_mode: 1 + l3_ecmp_member_secondary_mem_size: 8192 + stat_custom_receive0_management_mode: 1 + sai_tunnel_ipinip_multi_vrf_support: 1 + default_cpu_tx_queue: 7 +... +--- +device: + 0: + DEVICE_CONFIG: + AUTOLOAD_BOARD_SETTINGS: 0 +... +--- +device: + '*': + TM_THD_CONFIG: + MIRROR_ON_DROP_RESERVATION: 0 + SKIP_BUFFER_RESERVATION: 1 + THRESHOLD_MODE: LOSSY_AND_LOSSLESS + + TM_SCHEDULER_CONFIG: + NUM_MC_Q: NUM_MC_Q_4 +... +--- +device: + 0: + # Per pipe flex counter configuration. Enable PPIU Mode + CTR_EFLEX_CONFIG: + CTR_ING_EFLEX_OPERMODE_PIPEUNIQUE: 1 + CTR_ING_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1 + CTR_EGR_EFLEX_OPERMODE_PIPEUNIQUE: 1 + CTR_EGR_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1 + + # IFP mode + FP_CONFIG: + FP_ING_OPERMODE: GLOBAL_PIPE_AWARE + + #CTR COS_ENABLE + CTR_ING_COS_Q_CONFIG: + COS_ENABLE: 0 + +... +# Initialize the various thresholds to zero +--- +# Ingress service pool level initialization +device: + 0: + # Ingress service pool + TM_ING_THD_SERVICE_POOL: + ? + BUFFER_POOL: [0] + TM_ING_SERVICE_POOL_ID: [[0,3]] + : + COLOR_SPECIFIC_LIMITS: 0 + SHARED_LIMIT_CELLS: 0 + SHARED_RESUME_OFFSET_CELLS: 0 + YELLOW_OFFSET_CELLS: 0 + RED_OFFSET_CELLS: 0 + + # Ingress headroom pool + TM_ING_THD_HEADROOM_POOL: + ? + BUFFER_POOL: [0] + TM_HEADROOM_POOL_ID: [[0,3]] + : + LIMIT_CELLS: 0 + +... +# Ingress priority to PG mappings +--- +device: + 0: + # priority to PG mapping for UC traffic, 8 profiles (IDs), 16 priorties + TM_ING_UC_ING_PRI_MAP: + ? + # Profile 0 + TM_ING_UC_ING_PRI_MAP_ID: [[0,7]] + ING_PRI: [[0,15]] + : + TM_PRI_GRP_ID: 0 + + # priority to PG mapping for MC traffic, 8 profiles( IDs) 16 priorities + TM_ING_NONUC_ING_PRI_MAP: + ? + # Profile 0 + TM_ING_NONUC_ING_PRI_MAP_ID: [[0,7]] + ING_PRI: [[0,15]] + : + TM_PRI_GRP_ID: 0 + + TM_PRI_GRP_POOL_MAP: + ? + TM_PRI_GRP_POOL_MAP_ID: [[0,7]] + TM_PRI_GRP_ID: [[0,7]] + : + TM_ING_SERVICE_POOL_ID: 0 + TM_HEADROOM_POOL_ID: 0 + + # PFC generation: Priority group(s) + TM_PFC_PRI_TO_PRI_GRP_MAP: + ? + TM_PFC_PRI_TO_PRI_GRP_MAP_ID: [[0,7]] + PFC_PRI: [[0,7]] + : + TM_PRI_GRP_ID: 0 + +... +# Egress service pool level initialization +# Output port Thresholds +--- +device: + 0: + # Egress unicast shared pool + TM_EGR_THD_SERVICE_POOL: + ? + BUFFER_POOL: [0] + TM_EGR_SERVICE_POOL_ID: [[0,3]] + : + SHARED_LIMIT_CELLS: 0 + + # Egress multicast CQE pool + TM_THD_MC_EGR_SERVICE_POOL: + ? + BUFFER_POOL: [0] + TM_EGR_SERVICE_POOL_ID: [[0,3]] + : + COLOR_SPECIFIC_LIMITS: 0 + SHARED_LIMIT_CELLS: 0 + SHARED_RESUME_LIMIT_CELLS: 0 + YELLOW_SHARED_LIMIT_CELLS: 0 + YELLOW_SHARED_RESUME_LIMIT_CELLS: 0 + RED_SHARED_LIMIT_CELLS: 0 + RED_SHARED_RESUME_LIMIT_CELLS: 0 + + + TM_THD_DYNAMIC_MARGIN: + ? + BUFFER_POOL: [0] + TM_EGR_SERVICE_POOL_ID: [[0,3]] + : + MARGIN: [29959, 59918, 89877, 119837, 149796, 179755, 209715, 239674, 269633, 299593] + +... +#Per Port Registers +#Input Port Thresholds +--- +device: + 0: + # Set PG is LOSSLESS, PFC enable bit + TM_ING_PORT_PRI_GRP: + ? + PORT_ID: [[0,4], [17,21], [35,39], [52,57], [71,75], [89,93], [107,111], [125,129], [143,147], [161,165], [179,183], [197,201], [215,219], [233,237], [251,255], [268,273], [287,291], [305,309], [323,327], [340,345], [359,363], [377,381], [395,399], [413,417], [431,435], [449,453], [467,471], [485,489], [503,507], [521,525], [539,543], [556,561], 575] + TM_PRI_GRP_ID: [[0,7]] + : + PFC: 0 + LOSSLESS: 0 + ING_MIN_MODE: USE_PRI_GRP_MIN + + TM_ING_PORT: + ? + PORT_ID: [[0,4], [17,21], [35,39], [52,57], [71,75], [89,93], [107,111], [125,129], [143,147], [161,165], [179,183], [197,201], [215,219], [233,237], [251,255], [268,273], [287,291], [305,309], [323,327], [340,345], [359,363], [377,381], [395,399], [413,417], [431,435], [449,453], [467,471], [485,489], [503,507], [521,525], [539,543], [556,561], 575] + : + # Pause enable bit, + PAUSE: 0 + # Ingress priority profile select, maps to priority group + ING_PRI_MAP_ID: 0 + #Priority group profile select, maps to service pool + PRI_GRP_MAP_ID: 0 + + # Ingress port Level to Service Pool limits + TM_ING_THD_PORT_SERVICE_POOL: + ? + PORT_ID: [[0,4], [17,21], [35,39], [52,57], [71,75], [89,93], [107,111], [125,129], [143,147], [161,165], [179,183], [197,201], [215,219], [233,237], [251,255], [268,273], [287,291], [305,309], [323,327], [340,345], [359,363], [377,381], [395,399], [413,417], [431,435], [449,453], [467,471], [485,489], [503,507], [521,525], [539,543], [556,561], 575] + TM_ING_SERVICE_POOL_ID: [[0,3]] + : + MIN_GUARANTEE_CELLS: 0 + SHARED_LIMIT_CELLS: 0 + RESUME_LIMIT_CELLS: 0 + + # Port level PG limits + TM_ING_THD_PORT_PRI_GRP: + ? + PORT_ID: [[0,4], [17,21], [35,39], [52,57], [71,75], [89,93], [107,111], [125,129], [143,147], [161,165], [179,183], [197,201], [215,219], [233,237], [251,255], [268,273], [287,291], [305,309], [323,327], [340,345], [359,363], [377,381], [395,399], [413,417], [431,435], [449,453], [467,471], [485,489], [503,507], [521,525], [539,543], [556,561], 575] + TM_PRI_GRP_ID: [[0,7]] + : + MIN_GUARANTEE_CELLS: 0 + DYNAMIC_SHARED_LIMITS: 0 + SHARED_LIMIT_CELLS_STATIC: 0 + RESUME_OFFSET_CELLS: 0 + RESUME_FLOOR_CELLS: 0 + HEADROOM_LIMIT_AUTO: 0 + HEADROOM_LIMIT_CELLS: 0 + EARLY_PFC_XOFF_OFFSET_CELLS: 0 + EARLY_PFC_XON_OFFSET_CELLS: 0 + EARLY_PFC_FLOOR_CELLS: 0 + # Additional CPU port initialization + ? + PORT_ID: 520 + TM_PRI_GRP_ID: [[0,7]] + : + MIN_GUARANTEE_CELLS: 0 + DYNAMIC_SHARED_LIMITS: 0 + SHARED_LIMIT_CELLS_STATIC: 0 + RESUME_OFFSET_CELLS: 0 + RESUME_FLOOR_CELLS: 0 + HEADROOM_LIMIT_AUTO: 0 + HEADROOM_LIMIT_CELLS: 0 + EARLY_PFC_XOFF_OFFSET_CELLS: 0 + EARLY_PFC_XON_OFFSET_CELLS: 0 + EARLY_PFC_FLOOR_CELLS: 0 + +... +# Output Port Thresholds -2 +# Per Unicast Queue Thresholds +--- +device: + 0: + TM_EGR_SERVICE_POOL_DYNAMIC: + ? + BUFFER_POOL: [0] + TM_EGR_SERVICE_POOL_ID: [[0,3]] + : + ADAPTIVE_DYNAMIC: ALPHA_1 + + TM_PORT_UC_Q_TO_SERVICE_POOL: + ? + PORT_ID: [[1,4], [17,21], [35,39], [52,57], [71,75], [89,93], [107,111], [125,129], [143,147], [161,165], [179,183], [197,201], [215,219], [233,237], [251,255], [268,273], [287,291], [305,309], [323,327], [340,345], [359,363], [377,381], [395,399], [413,417], [431,435], [449,453], [467,471], [485,489], [503,507], [521,525], [539,543], [556,561], 575] + TM_UC_Q_ID: [[0,7]] + : + USE_QGROUP_MIN: 0 + + TM_THD_UC_Q: + ? + PORT_ID: [[1,4], [17,21], [35,39], [52,57], [71,75], [89,93], [107,111], [125,129], [143,147], [161,165], [179,183], [197,201], [215,219], [233,237], [251,255], [268,273], [287,291], [305,309], [323,327], [340,345], [359,363], [377,381], [395,399], [413,417], [431,435], [449,453], [467,471], [485,489], [503,507], [521,525], [539,543], [556,561], 575] + TM_UC_Q_ID: [[0,7]] + : + MIN_GUARANTEE_CELLS: 0 + SHARED_LIMITS: 1 + DYNAMIC_SHARED_LIMITS: 0 + SHARED_LIMIT_CELLS_STATIC: 0 + + TM_PORT_MC_Q_TO_SERVICE_POOL: + ? + PORT_ID: [[1,4], [17,21], [35,39], [52,57], [71,75], [89,93], [107,111], [125,129], [143,147], [161,165], [179,183], [197,201], [215,219], [233,237], [251,255], [268,273], [287,291], [305,309], [323,327], [340,345], [359,363], [377,381], [395,399], [413,417], [431,435], [449,453], [467,471], [485,489], [503,507], [521,525], [539,543], [556,561], 575] + TM_MC_Q_ID: [[0,3]] + : + USE_QGROUP_MIN: 0 + + TM_THD_MC_Q: + ? + # uplink, downlink and loopback ports + PORT_ID: [[1,4], [17,21], [35,39], [52,57], [71,75], [89,93], [107,111], [125,129], [143,147], [161,165], [179,183], [197,201], [215,219], [233,237], [251,255], [268,273], [287,291], [305,309], [323,327], [340,345], [359,363], [377,381], [395,399], [413,417], [431,435], [449,453], [467,471], [485,489], [503,507], [521,525], [539,543], [556,561], 575] + TM_MC_Q_ID: [[0,3]] + : + MIN_GUARANTEE_CELLS: 0 + SHARED_LIMITS: 1 + DYNAMIC_SHARED_LIMITS: 0 + SHARED_LIMIT_CELLS_STATIC: 0 + + TM_THD_CPU_Q: + ? + # CPU port, 48 MC queues + PORT_ID: [0,520] + TM_CPU_Q_ID: [[0,47]] + : + MIN_GUARANTEE_CELLS: 0 + SHARED_LIMITS: 0 + DYNAMIC_SHARED_LIMITS: 0 + SHARED_LIMIT_CELLS_STATIC: 0 + + TM_THD_Q_GRP: + ? + PORT_ID: [[1,4], [17,21], [35,39], [52,57], [71,75], [89,93], [107,111], [125,129], [143,147], [161,165], [179,183], [197,201], [215,219], [233,237], [251,255], [268,273], [287,291], [305,309], [323,327], [340,345], [359,363], [377,381], [395,399], [413,417], [431,435], [449,453], [467,471], [485,489], [503,507], [521,525], [539,543], [556,561], 575] + : + UC_Q_GRP_MIN_GUARANTEE_CELLS: 0 + MC_Q_GRP_MIN_GUARANTEE_CELLS: 0 + + TM_EGR_THD_UC_PORT_QSET: + ? + PORT_ID: [[1,4], [17,21], [35,39], [52,57], [71,75], [89,93], [107,111], [125,129], [143,147], [161,165], [179,183], [197,201], [215,219], [233,237], [251,255], [268,273], [287,291], [305,309], [323,327], [340,345], [359,363], [377,381], [395,399], [413,417], [431,435], [449,453], [467,471], [485,489], [503,507], [521,525], [539,543], [556,561], 575] + QSET_ID: [[0,3]] + : + COLOR_SPECIFIC_LIMITS: 0 + SHARED_LIMIT_CELLS: 0 + SHARED_RESUME_LIMIT_CELLS: 0 + YELLOW_SHARED_LIMIT_CELLS: 0 + YELLOW_SHARED_RESUME_LIMIT_CELLS: 0 + RED_SHARED_LIMIT_CELLS: 0 + RED_SHARED_RESUME_LIMIT_CELLS: 0 + + TM_EGR_THD_MC_PORT_QSET: + ? + PORT_ID: [[1,4], [17,21], [35,39], [52,57], [71,75], [89,93], [107,111], [125,129], [143,147], [161,165], [179,183], [197,201], [215,219], [233,237], [251,255], [268,273], [287,291], [305,309], [323,327], [340,345], [359,363], [377,381], [395,399], [413,417], [431,435], [449,453], [467,471], [485,489], [503,507], [521,525], [539,543], [556,561], 575] + QSET_ID: [[0,3]] + : + COLOR_SPECIFIC_LIMITS: 0 + RED_SHARED_LIMIT_CELLS: 0 + YELLOW_SHARED_LIMIT_CELLS: 0 + SHARED_LIMIT_CELLS: 0 + RED_SHARED_RESUME_LIMIT_CELLS: 0 + YELLOW_SHARED_RESUME_LIMIT_CELLS: 0 + SHARED_RESUME_LIMIT_CELLS: 0 +... +... +### THDR Limits : initialization +--- +device: + 0: + TM_THD_REPL_Q: + ? + REPL_Q_NUM: [[0,6]] + : + SHARED_LIMITS: 0 + DYNAMIC_SHARED_LIMITS: 0 + SHARED_LIMIT_DYNAMIC: ALPHA_1 + RESUME_OFFSET_CELLS: 0 + COLOR_SPECIFIC_LIMITS: 0 + COLOR_SPECIFIC_DYNAMIC_LIMITS: 0 + YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750 + RED_LIMIT_DYNAMIC: PERCENTAGE_625 + SHARED_LIMIT_PKTS: 0 + DYNAMIC_SHARED_LIMIT_PKTS: 0 + SHARED_LIMIT_DYNAMIC_PKTS: ALPHA_1 + RESUME_OFFSET_PKTS: 0 + COLOR_SPECIFIC_LIMIT_PKTS: 0 + COLOR_SPECIFIC_DYNAMIC_LIMIT_PKTS: 0 + YELLOW_LIMIT_DYNAMIC_PKTS: PERCENTAGE_750 + RED_LIMIT_DYNAMIC_PKTS: PERCENTAGE_625 + MIN_GUARANTEE_CELLS: 0 + MIN_GUARANTEE_PKTS: 0 + + TM_THD_REPL_SERVICE_POOL: + SHARED_LIMIT_CELLS: 0 + SHARED_RESUME_LIMIT_CELLS: 0 + COLOR_SPECIFIC_LIMITS: 0 + YELLOW_SHARED_LIMIT_CELLS: 0 + YELLOW_SHARED_RESUME_LIMIT_CELLS: 0 + RED_SHARED_LIMIT_CELLS: 0 + RED_SHARED_RESUME_LIMIT_CELLS: 0 + SHARED_LIMIT_PKTS: 0 + SHARED_RESUME_LIMIT_PKTS: 0 + COLOR_SPECIFIC_LIMITS: 0 + YELLOW_SHARED_LIMIT_PKTS: 0 + YELLOW_SHARED_RESUME_LIMIT_PKTS: 0 + RED_SHARED_LIMIT_PKTS: 0 + RED_SHARED_RESUME_LIMIT_PKTS: 0 + +... +### Begin MMU ingress threshold settings + +### Pools +--- +device: + 0: +# Ingress Service Pool Thresholds + TM_ING_THD_SERVICE_POOL: + ? + BUFFER_POOL: [0] + TM_ING_SERVICE_POOL_ID: 0 + : + SHARED_LIMIT_CELLS: 420194 + YELLOW_SHARED_LIMIT_CELLS: 315146 + RED_SHARED_LIMIT_CELLS: 262622 + SHARED_RESUME_OFFSET_CELLS: 46 + YELLOW_OFFSET_CELLS: 46 + RED_OFFSET_CELLS: 46 + COLOR_SPECIFIC_LIMITS: 0 + ? + BUFFER_POOL: [0] + TM_ING_SERVICE_POOL_ID: 1 + : + SHARED_LIMIT_CELLS: 0 + YELLOW_SHARED_LIMIT_CELLS: 0 + RED_SHARED_LIMIT_CELLS: 0 + SHARED_RESUME_OFFSET_CELLS: 0 + YELLOW_OFFSET_CELLS: 0 + RED_OFFSET_CELLS: 0 + COLOR_SPECIFIC_LIMITS: 0 + + +# Ingress Headroom Pool Thresholds + TM_ING_THD_HEADROOM_POOL: + ? + BUFFER_POOL: [0] + TM_HEADROOM_POOL_ID: 0 + : + LIMIT_CELLS: 194176 + +... +--- +device: + 0: +# UC Traffic Priority to PG mapping + TM_ING_UC_ING_PRI_MAP: + ? + # Profile 0 + TM_ING_UC_ING_PRI_MAP_ID: 0 + ING_PRI: [[0,2],[5,15]] + : + TM_PRI_GRP_ID: 0 + ? + TM_ING_UC_ING_PRI_MAP_ID: 0 + ING_PRI: 3 + : + TM_PRI_GRP_ID: 3 + ? + TM_ING_UC_ING_PRI_MAP_ID: 0 + ING_PRI: 4 + : + TM_PRI_GRP_ID: 4 + ? + # Profile 1 + TM_ING_UC_ING_PRI_MAP_ID: 1 + ING_PRI: [[0,15]] + : + TM_PRI_GRP_ID: 7 + +# MC Traffic Priority to PG mapping + TM_ING_NONUC_ING_PRI_MAP: + ? + # Profile 0 + TM_ING_NONUC_ING_PRI_MAP_ID: 0 + ING_PRI: [[0,2],[5,15]] + : + TM_PRI_GRP_ID: 0 + ? + TM_ING_NONUC_ING_PRI_MAP_ID: 0 + ING_PRI: 3 + : + TM_PRI_GRP_ID: 3 + ? + TM_ING_NONUC_ING_PRI_MAP_ID: 0 + ING_PRI: 4 + : + TM_PRI_GRP_ID: 4 + ? + # Profile 1 + TM_ING_NONUC_ING_PRI_MAP_ID: 1 + ING_PRI: [[0,15]] + : + TM_PRI_GRP_ID: 7 + +# PG to Headroom Pool Mapping + TM_PRI_GRP_POOL_MAP: + ? + TM_PRI_GRP_POOL_MAP_ID: 0 + TM_PRI_GRP_ID: [[0,7]] + : + TM_HEADROOM_POOL_ID: 0 + +# PG to Service Pool Mapping + TM_PRI_GRP_POOL_MAP: + ? + TM_PRI_GRP_POOL_MAP_ID: 0 + TM_PRI_GRP_ID: [[0,7]] + : + TM_ING_SERVICE_POOL_ID: 0 + +# Ingress PG to PFC priority mapping +# TM_PFC_PRI_TO_PRI_GRP_MAP is mapped to MMU_THDI_PFCPRI_PG_PROFILE in physical table. There are 8 profiles to configure the PFC to priority group mappings. For exmple, you could map multiple PG to a PFC. This is needed to generate PFC when a PG is hitting the limits. + TM_PFC_PRI_TO_PRI_GRP_MAP: + ? + TM_PFC_PRI_TO_PRI_GRP_MAP_ID: 0 + PFC_PRI: 3 + : + TM_PRI_GRP_ID: 3 + ? + TM_PFC_PRI_TO_PRI_GRP_MAP_ID: 0 + PFC_PRI: 4 + : + TM_PRI_GRP_ID: 4 + +# Per input port PG and flow control configurations +# TM_ING_PORT_PRI_GRP is mapped to MMU_THDI_ING_PORT_CONFIG in physical table + TM_ING_PORT_PRI_GRP: + ? + PORT_ID: [[288,291], [306,309], [324,327], [342,345], [360,363], [378,381], [396,399], [414,417], [432,435], [450,453], [468,471], [486,489], [504,507], [522,525], [540,543], [558,561]] + TM_PRI_GRP_ID: [3,4] + : + PFC: 1 + LOSSLESS: 1 + ? + PORT_ID: [[1,4], [18,21], [36,39], [54,57], [72,75], [90,93], [108,111], [126,129], [144,147], [162,165], [180,183], [198,201], [216,219], [234,237], [252,255], [270,273]] + TM_PRI_GRP_ID: [3,4] + : + PFC: 1 + LOSSLESS: 1 + +# ING_PRI_MAP_ID is the ingress priority PG profile select, which maps to the Priority Group +# PRI_GRP_MAP_ID is the Priority Group profile select, which maps to service pool + TM_ING_PORT: + ? + PORT_ID: [0] + : + ING_PRI_MAP_ID: 0 + PRI_GRP_MAP_ID: 0 + ? + PORT_ID: [[288,291], [306,309], [324,327], [342,345], [360,363], [378,381], [396,399], [414,417], [432,435], [450,453], [468,471], [486,489], [504,507], [522,525], [540,543], [558,561]] + : + ING_PRI_MAP_ID: 0 + PRI_GRP_MAP_ID: 0 + ? + PORT_ID: [[1,4], [18,21], [36,39], [54,57], [72,75], [90,93], [108,111], [126,129], [144,147], [162,165], [180,183], [198,201], [216,219], [234,237], [252,255], [270,273]] + : + ING_PRI_MAP_ID: 0 + PRI_GRP_MAP_ID: 0 + ? + PORT_ID: [52, 268, 340, 556] + : + ING_PRI_MAP_ID: 0 + PRI_GRP_MAP_ID: 0 + ? + PORT_ID: [17, 35, 53, 71, 89, 107, 125, 143, 161, 179, 197, 215, 233, 251, 269, 287, 305, 323, 341, 359, 377, 395, 413, 431, 449, 467, 485, 503, 521, 539, 557, 575] + : + ING_PRI_MAP_ID: 0 + PRI_GRP_MAP_ID: 0 + +... + + +###################################### +--- +device: + 0: +# Per input port Service Pool Thresholds + TM_ING_THD_PORT_SERVICE_POOL: + ? + PORT_ID: [[0,4], [17,21], [35,39], [52,57], [71,75], [89,93], [107,111], [125,129], [143,147], [161,165], [179,183], [197,201], [215,219], [233,237], [251,255], [268,273], [287,291], [305,309], [323,327], [340,345], [359,363], [377,381], [395,399], [413,417], [431,435], [449,453], [467,471], [485,489], [503,507], [521,525], [539,543], [556,561], 575] + TM_ING_SERVICE_POOL_ID: 0 + : + MIN_GUARANTEE_CELLS: 0 + SHARED_LIMIT_CELLS: 631745 + RESUME_LIMIT_CELLS: 631745 + +# Per input Port PG Thresholds + TM_ING_THD_PORT_PRI_GRP: + ? + PORT_ID: [[0,4], [17,21], [35,39], [52,57], [71,75], [89,93], [107,111], [125,129], [143,147], [161,165], [179,183], [197,201], [215,219], [233,237], [251,255], [268,273], [287,291], [305,309], [323,327], [340,345], [359,363], [377,381], [395,399], [413,417], [431,435], [449,453], [467,471], [485,489], [503,507], [521,525], [539,543], [556,561], 575] + TM_PRI_GRP_ID: [0, 1, 2, 5, 6, 7] + : + MIN_GUARANTEE_CELLS: 0 + DYNAMIC_SHARED_LIMITS: 0 + SHARED_LIMIT_CELLS_STATIC: 631745 + HEADROOM_LIMIT_CELLS: 0 + RESUME_OFFSET_CELLS: 0 + RESUME_FLOOR_CELLS: 0 + HEADROOM_LIMIT_AUTO: 0 + ? + PORT_ID: [[1,4], [18,21], [36,39], [54,57], [72,75], [90,93], [108,111], [126,129], [144,147], [162,165], [180,183], [198,201], [216,219], [234,237], [252,255], [270,273]] + TM_PRI_GRP_ID: [3] + : + MIN_GUARANTEE_CELLS: 22 + DYNAMIC_SHARED_LIMITS: 1 + SHARED_LIMIT_DYNAMIC: ALPHA_1 + RESUME_OFFSET_CELLS: 8 + RESUME_FLOOR_CELLS: 0 + HEADROOM_LIMIT_AUTO: 0 + HEADROOM_LIMIT_CELLS: 12747 + ? + PORT_ID: [[1,4], [18,21], [36,39], [54,57], [72,75], [90,93], [108,111], [126,129], [144,147], [162,165], [180,183], [198,201], [216,219], [234,237], [252,255], [270,273]] + TM_PRI_GRP_ID: [4] + : + MIN_GUARANTEE_CELLS: 8 + DYNAMIC_SHARED_LIMITS: 1 + SHARED_LIMIT_DYNAMIC: ALPHA_1 + RESUME_OFFSET_CELLS: 8 + RESUME_FLOOR_CELLS: 0 + HEADROOM_LIMIT_AUTO: 0 + HEADROOM_LIMIT_CELLS: 12747 + ? + PORT_ID: [[288,291], [306,309], [324,327], [342,345], [360,363], [378,381], [396,399], [414,417], [432,435], [450,453], [468,471], [486,489], [504,507], [522,525], [540,543], [558,561]] + TM_PRI_GRP_ID: [3] + : + MIN_GUARANTEE_CELLS: 22 + DYNAMIC_SHARED_LIMITS: 1 + SHARED_LIMIT_DYNAMIC: ALPHA_1 + RESUME_OFFSET_CELLS: 8 + RESUME_FLOOR_CELLS: 0 + HEADROOM_LIMIT_AUTO: 0 + HEADROOM_LIMIT_CELLS: 12747 + ? + PORT_ID: [[288,291], [306,309], [324,327], [342,345], [360,363], [378,381], [396,399], [414,417], [432,435], [450,453], [468,471], [486,489], [504,507], [522,525], [540,543], [558,561]] + TM_PRI_GRP_ID: [4] + : + MIN_GUARANTEE_CELLS: 8 + DYNAMIC_SHARED_LIMITS: 1 + SHARED_LIMIT_DYNAMIC: ALPHA_1 + RESUME_OFFSET_CELLS: 8 + RESUME_FLOOR_CELLS: 0 + HEADROOM_LIMIT_AUTO: 0 + HEADROOM_LIMIT_CELLS: 12747 + ? + PORT_ID: [52, 268, 340, 556] + TM_PRI_GRP_ID: [3,4] + : + MIN_GUARANTEE_CELLS: 0 + DYNAMIC_SHARED_LIMITS: 1 + SHARED_LIMIT_DYNAMIC: ALPHA_1 + RESUME_OFFSET_CELLS: 8 + RESUME_FLOOR_CELLS: 0 + HEADROOM_LIMIT_AUTO: 0 + HEADROOM_LIMIT_CELLS: 0 + ? + PORT_ID: [17, 35, 53, 71, 89, 107, 125, 143, 161, 179, 197, 215, 233, 251, 269, 287, 305, 323, 341, 359, 377, 395, 413, 431, 449, 467, 485, 503, 521, 539, 557, 575] + TM_PRI_GRP_ID: [3,4] + : + MIN_GUARANTEE_CELLS: 0 + DYNAMIC_SHARED_LIMITS: 1 + SHARED_LIMIT_DYNAMIC: ALPHA_1 + RESUME_OFFSET_CELLS: 8 + RESUME_FLOOR_CELLS: 0 + HEADROOM_LIMIT_AUTO: 0 + HEADROOM_LIMIT_CELLS: 0 + ? + PORT_ID: [0] + TM_PRI_GRP_ID: [3,4] + : + MIN_GUARANTEE_CELLS: 0 + DYNAMIC_SHARED_LIMITS: 1 + SHARED_LIMIT_DYNAMIC: ALPHA_1 + RESUME_OFFSET_CELLS: 8 + RESUME_FLOOR_CELLS: 0 + HEADROOM_LIMIT_AUTO: 0 + HEADROOM_LIMIT_CELLS: 0 + +... + + +### Egress Service Pools +--- +device: + 0: +# Setting Q group limit to 0 + TM_THD_Q_GRP: + ? + PORT_ID: [[1,4], [18,21], [36,39], [54,57], [72,75], [90,93], [108,111], [126,129], [144,147], [162,165], [180,183], [198,201], [216,219], [234,237], [252,255], [270,273]] + : + UC_Q_GRP_MIN_GUARANTEE_CELLS: 24 + MC_Q_GRP_MIN_GUARANTEE_CELLS: 0 + ? + PORT_ID: [[288,291], [306,309], [324,327], [342,345], [360,363], [378,381], [396,399], [414,417], [432,435], [450,453], [468,471], [486,489], [504,507], [522,525], [540,543], [558,561]] + : + UC_Q_GRP_MIN_GUARANTEE_CELLS: 24 + MC_Q_GRP_MIN_GUARANTEE_CELLS: 0 + ? + PORT_ID: [0] + : + UC_Q_GRP_MIN_GUARANTEE_CELLS: 0 + MC_Q_GRP_MIN_GUARANTEE_CELLS: 0 + ? + PORT_ID: [17, 35, 53, 71, 89, 107, 125, 143, 161, 179, 197, 215, 233, 251, 269, 287, 305, 323, 341, 359, 377, 395, 413, 431, 449, 467, 485, 503, 521, 539, 557, 575] + : + UC_Q_GRP_MIN_GUARANTEE_CELLS: 4 + MC_Q_GRP_MIN_GUARANTEE_CELLS: 0 + ? + PORT_ID: [268, 340] + : + UC_Q_GRP_MIN_GUARANTEE_CELLS: 24 + MC_Q_GRP_MIN_GUARANTEE_CELLS: 0 + +# Unicast Egress Service Pool Limits + TM_EGR_THD_SERVICE_POOL: + ? + BUFFER_POOL: [0] + TM_EGR_SERVICE_POOL_ID: 0 + : + SHARED_LIMIT_CELLS: 420194 +... +--- +device: + 0: +# Multicast Egress Service Pool Limits, CQEs + TM_THD_MC_EGR_SERVICE_POOL: + ? + BUFFER_POOL: [0] + TM_EGR_SERVICE_POOL_ID: 0 + : + SHARED_LIMIT_CELLS: 28125 + ? + BUFFER_POOL: [0] + TM_EGR_SERVICE_POOL_ID: 1 + : + SHARED_LIMIT_CELLS: 0 +... +--- +device: + 0: +# Multicast Egress Service Pool Limits, CQEs + TM_THD_MC_EGR_SERVICE_POOL: + ? + BUFFER_POOL: [0] + TM_EGR_SERVICE_POOL_ID: 0 + : + COLOR_SPECIFIC_LIMITS: 0 + YELLOW_SHARED_LIMIT_CELLS: 2636 + RED_SHARED_LIMIT_CELLS: 2197 + SHARED_RESUME_LIMIT_CELLS: 3509 + YELLOW_SHARED_RESUME_LIMIT_CELLS: 2630 + RED_SHARED_RESUME_LIMIT_CELLS: 2191 +... + +... +### Adaptive Alpha +--- +device: + 0: + TM_EGR_SERVICE_POOL_DYNAMIC: + ? + BUFFER_POOL: [0] + TM_EGR_SERVICE_POOL_ID: [0] + : + ADAPTIVE_DYNAMIC: ALPHA_1 + + TM_THD_DYNAMIC_MARGIN: + ? + BUFFER_POOL: [0] + TM_EGR_SERVICE_POOL_ID: [0] + : + MARGIN: [29959, 59918, 89877, 119837, 149796, 179755, 209715, 239674, 269633, 299593] + +... + +--- +device: + 0: + TM_PORT_UC_Q_TO_SERVICE_POOL: + ? + PORT_ID: [[288,291], [306,309], [324,327], [342,345], [360,363], [378,381], [396,399], [414,417], [432,435], [450,453], [468,471], [486,489], [504,507], [522,525], [540,543], [558,561]] + TM_UC_Q_ID: [0,1,2,5,6,7] + : + USE_QGROUP_MIN: 1 + TM_EGR_SERVICE_POOL_ID: 0 + QSET_ID: 0 + ? + PORT_ID: [[288,291], [306,309], [324,327], [342,345], [360,363], [378,381], [396,399], [414,417], [432,435], [450,453], [468,471], [486,489], [504,507], [522,525], [540,543], [558,561]] + TM_UC_Q_ID: [3,4] + : + USE_QGROUP_MIN: 0 + TM_EGR_SERVICE_POOL_ID: 0 + QSET_ID: 0 + ? + PORT_ID: [[1,4], [18,21], [36,39], [54,57], [72,75], [90,93], [108,111], [126,129], [144,147], [162,165], [180,183], [198,201], [216,219], [234,237], [252,255], [270,273]] + TM_UC_Q_ID: [0,1,2,5,6,7] + : + USE_QGROUP_MIN: 1 + TM_EGR_SERVICE_POOL_ID: 0 + QSET_ID: 0 + ? + PORT_ID: [[1,4], [18,21], [36,39], [54,57], [72,75], [90,93], [108,111], [126,129], [144,147], [162,165], [180,183], [198,201], [216,219], [234,237], [252,255], [270,273]] + TM_UC_Q_ID: [3,4] + : + USE_QGROUP_MIN: 0 + TM_EGR_SERVICE_POOL_ID: 0 + QSET_ID: 0 + ? + PORT_ID: [52, 268, 340, 556] + TM_UC_Q_ID: [0,1,2,5,6,7] + : + USE_QGROUP_MIN: 1 + TM_EGR_SERVICE_POOL_ID: 0 + QSET_ID: 0 + ? + PORT_ID: [52, 268, 340, 556] + TM_UC_Q_ID: [3,4] + : + USE_QGROUP_MIN: 0 + TM_EGR_SERVICE_POOL_ID: 0 + QSET_ID: 0 + ? + PORT_ID: [17, 35, 53, 71, 89, 107, 125, 143, 161, 179, 197, 215, 233, 251, 269, 287, 305, 323, 341, 359, 377, 395, 413, 431, 449, 467, 485, 503, 521, 539, 557, 575] + TM_UC_Q_ID: [0,1,2,5,6,7] + : + USE_QGROUP_MIN: 1 + TM_EGR_SERVICE_POOL_ID: 0 + QSET_ID: 0 + ? + PORT_ID: [17, 35, 53, 71, 89, 107, 125, 143, 161, 179, 197, 215, 233, 251, 269, 287, 305, 323, 341, 359, 377, 395, 413, 431, 449, 467, 485, 503, 521, 539, 557, 575] + TM_UC_Q_ID: [3,4] + : + USE_QGROUP_MIN: 0 + TM_EGR_SERVICE_POOL_ID: 0 + QSET_ID: 0 + + TM_PORT_MC_Q_TO_SERVICE_POOL: + ? + PORT_ID: [0] + TM_MC_Q_ID: [[0,47]] + : + USE_QGROUP_MIN: 0 + TM_EGR_SERVICE_POOL_ID: 0 + QSET_ID: 0 + ? + PORT_ID: [[1,4], [17,21], [35,39], [52,57], [71,75], [89,93], [107,111], [125,129], [143,147], [161,165], [179,183], [197,201], [215,219], [233,237], [251,255], [268,273], [287,291], [305,309], [323,327], [340,345], [359,363], [377,381], [395,399], [413,417], [431,435], [449,453], [467,471], [485,489], [503,507], [521,525], [539,543], [556,561], 575] + TM_MC_Q_ID: [[0,3]] + : + USE_QGROUP_MIN: 1 + TM_EGR_SERVICE_POOL_ID: 0 + QSET_ID: 0 +... +### Queue Thresholds +###################################### +--- +device: + 0: + TM_THD_UC_Q: + ? + PORT_ID: [[288,291], [306,309], [324,327], [342,345], [360,363], [378,381], [396,399], [414,417], [432,435], [450,453], [468,471], [486,489], [504,507], [522,525], [540,543], [558,561]] + TM_UC_Q_ID: [0,1,2,5,6,7] + : + MIN_GUARANTEE_CELLS: 0 + SHARED_LIMITS: 1 + DYNAMIC_SHARED_LIMITS: 1 + SHARED_LIMIT_CELLS_STATIC: 0 + SHARED_LIMIT_DYNAMIC: ALPHA_1 + DYNAMIC_GROUP: MID_PRI_GROUP + RESUME_OFFSET_CELLS: 1 + COLOR_SPECIFIC_LIMITS: 0 + COLOR_SPECIFIC_DYNAMIC_LIMITS: 1 + YELLOW_LIMIT_CELLS_STATIC: 0 + YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750 + RED_LIMIT_CELLS_STATIC: 0 + RED_LIMIT_DYNAMIC: PERCENTAGE_625 + ? + PORT_ID: [[288,291], [306,309], [324,327], [342,345], [360,363], [378,381], [396,399], [414,417], [432,435], [450,453], [468,471], [486,489], [504,507], [522,525], [540,543], [558,561]] + TM_UC_Q_ID: [3,4] + : + MIN_GUARANTEE_CELLS: 0 + SHARED_LIMITS: 1 + DYNAMIC_SHARED_LIMITS: 0 + SHARED_LIMIT_CELLS_STATIC: 631745 + DYNAMIC_GROUP: MID_PRI_GROUP + RESUME_OFFSET_CELLS: 1 + COLOR_SPECIFIC_LIMITS: 0 + COLOR_SPECIFIC_DYNAMIC_LIMITS: 1 + YELLOW_LIMIT_CELLS_STATIC: 0 + YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750 + RED_LIMIT_CELLS_STATIC: 0 + RED_LIMIT_DYNAMIC: PERCENTAGE_625 + ? + PORT_ID: [[1,4], [18,21], [36,39], [54,57], [72,75], [90,93], [108,111], [126,129], [144,147], [162,165], [180,183], [198,201], [216,219], [234,237], [252,255], [270,273]] + TM_UC_Q_ID: [0,1,2,5,6,7] + : + MIN_GUARANTEE_CELLS: 0 + SHARED_LIMITS: 1 + DYNAMIC_SHARED_LIMITS: 1 + SHARED_LIMIT_CELLS_STATIC: 0 + SHARED_LIMIT_DYNAMIC: ALPHA_1 + DYNAMIC_GROUP: MID_PRI_GROUP + RESUME_OFFSET_CELLS: 1 + COLOR_SPECIFIC_LIMITS: 0 + COLOR_SPECIFIC_DYNAMIC_LIMITS: 1 + YELLOW_LIMIT_CELLS_STATIC: 0 + YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750 + RED_LIMIT_CELLS_STATIC: 0 + RED_LIMIT_DYNAMIC: PERCENTAGE_625 + ? + PORT_ID: [[1,4], [18,21], [36,39], [54,57], [72,75], [90,93], [108,111], [126,129], [144,147], [162,165], [180,183], [198,201], [216,219], [234,237], [252,255], [270,273]] + TM_UC_Q_ID: [3,4] + : + MIN_GUARANTEE_CELLS: 0 + SHARED_LIMITS: 1 + DYNAMIC_SHARED_LIMITS: 0 + SHARED_LIMIT_CELLS_STATIC: 631745 + DYNAMIC_GROUP: MID_PRI_GROUP + RESUME_OFFSET_CELLS: 1 + COLOR_SPECIFIC_LIMITS: 0 + COLOR_SPECIFIC_DYNAMIC_LIMITS: 1 + YELLOW_LIMIT_CELLS_STATIC: 0 + YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750 + RED_LIMIT_CELLS_STATIC: 0 + RED_LIMIT_DYNAMIC: PERCENTAGE_625 + ? + PORT_ID: [52, 268, 340, 556] + TM_UC_Q_ID: [0,1,2,5,6,7] + : + MIN_GUARANTEE_CELLS: 0 + SHARED_LIMITS: 1 + DYNAMIC_SHARED_LIMITS: 1 + SHARED_LIMIT_CELLS_STATIC: 0 + SHARED_LIMIT_DYNAMIC: ALPHA_1 + DYNAMIC_GROUP: MID_PRI_GROUP + RESUME_OFFSET_CELLS: 1 + COLOR_SPECIFIC_LIMITS: 0 + COLOR_SPECIFIC_DYNAMIC_LIMITS: 1 + YELLOW_LIMIT_CELLS_STATIC: 0 + YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750 + RED_LIMIT_CELLS_STATIC: 0 + RED_LIMIT_DYNAMIC: PERCENTAGE_625 + ? + PORT_ID: [52, 268, 340, 556] + TM_UC_Q_ID: [3,4] + : + MIN_GUARANTEE_CELLS: 0 + SHARED_LIMITS: 1 + DYNAMIC_SHARED_LIMITS: 0 + DYNAMIC_GROUP: MID_PRI_GROUP + RESUME_OFFSET_CELLS: 1 + COLOR_SPECIFIC_LIMITS: 0 + COLOR_SPECIFIC_DYNAMIC_LIMITS: 1 + YELLOW_LIMIT_CELLS_STATIC: 0 + YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750 + RED_LIMIT_CELLS_STATIC: 0 + RED_LIMIT_DYNAMIC: PERCENTAGE_625 + ? + PORT_ID: [17, 35, 53, 71, 89, 107, 125, 143, 161, 179, 197, 215, 233, 251, 269, 287, 305, 323, 341, 359, 377, 395, 413, 431, 449, 467, 485, 503, 521, 539, 557, 575] + TM_UC_Q_ID: [0,1,2,5,6,7] + : + MIN_GUARANTEE_CELLS: 0 + SHARED_LIMITS: 1 + DYNAMIC_SHARED_LIMITS: 1 + SHARED_LIMIT_CELLS_STATIC: 0 + SHARED_LIMIT_DYNAMIC: ALPHA_1 + DYNAMIC_GROUP: MID_PRI_GROUP + RESUME_OFFSET_CELLS: 0 + COLOR_SPECIFIC_LIMITS: 0 + COLOR_SPECIFIC_DYNAMIC_LIMITS: 1 + YELLOW_LIMIT_CELLS_STATIC: 0 + YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750 + RED_LIMIT_CELLS_STATIC: 0 + RED_LIMIT_DYNAMIC: PERCENTAGE_625 + ? + PORT_ID: [17, 35, 53, 71, 89, 107, 125, 143, 161, 179, 197, 215, 233, 251, 269, 287, 305, 323, 341, 359, 377, 395, 413, 431, 449, 467, 485, 503, 521, 539, 557, 575] + TM_UC_Q_ID: [3,4] + : + MIN_GUARANTEE_CELLS: 0 + SHARED_LIMITS: 1 + DYNAMIC_SHARED_LIMITS: 0 + DYNAMIC_GROUP: MID_PRI_GROUP + RESUME_OFFSET_CELLS: 1 + COLOR_SPECIFIC_LIMITS: 0 + COLOR_SPECIFIC_DYNAMIC_LIMITS: 1 + YELLOW_LIMIT_CELLS_STATIC: 0 + YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750 + RED_LIMIT_CELLS_STATIC: 0 + RED_LIMIT_DYNAMIC: PERCENTAGE_625 + + TM_THD_CPU_Q: + ? + PORT_ID: [0] + TM_CPU_Q_ID: [[0,23]] + : + MIN_GUARANTEE_CELLS: 24 + SHARED_LIMITS: 1 + DYNAMIC_SHARED_LIMITS: 1 + SHARED_LIMIT_DYNAMIC: ALPHA_1_4 + COLOR_SPECIFIC_LIMITS: 0 + COLOR_SPECIFIC_DYNAMIC_LIMITS: 0 + YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750 + RED_LIMIT_DYNAMIC: PERCENTAGE_625 + RESUME_OFFSET_CELLS: 1 + ? + PORT_ID: [0] + TM_CPU_Q_ID: [[23,31]] + : + MIN_GUARANTEE_CELLS: 48 + SHARED_LIMITS: 1 + DYNAMIC_SHARED_LIMITS: 1 + SHARED_LIMIT_DYNAMIC: ALPHA_2 + COLOR_SPECIFIC_LIMITS: 0 + COLOR_SPECIFIC_DYNAMIC_LIMITS: 0 + YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750 + RED_LIMIT_DYNAMIC: PERCENTAGE_625 + RESUME_OFFSET_CELLS: 1 + + TM_THD_MC_Q: + ? + PORT_ID: [[1,4], [17,21], [35,39], [52,57], [71,75], [89,93], [107,111], [125,129], [143,147], [161,165], [179,183], [197,201], [215,219], [233,237], [251,255], [268,273], [287,291], [305,309], [323,327], [340,345], [359,363], [377,381], [395,399], [413,417], [431,435], [449,453], [467,471], [485,489], [503,507], [521,525], [539,543], [556,561], 575] + TM_MC_Q_ID: [[0,3]] + : + MIN_GUARANTEE_CELLS: 0 + SHARED_LIMITS: 1 + DYNAMIC_SHARED_LIMITS: 1 + SHARED_LIMIT_DYNAMIC: ALPHA_1 + COLOR_SPECIFIC_LIMITS: 0 + COLOR_SPECIFIC_DYNAMIC_LIMITS: 0 + YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750 + RED_LIMIT_DYNAMIC: PERCENTAGE_625 + RESUME_OFFSET_CELLS: 1 + +#Egress Port QSET Thresholds. + TM_EGR_THD_UC_PORT_QSET: + ? + PORT_ID: [[1,4], [17,21], [35,39], [52,57], [71,75], [89,93], [107,111], [125,129], [143,147], [161,165], [179,183], [197,201], [215,219], [233,237], [251,255], [268,273], [287,291], [305,309], [323,327], [340,345], [359,363], [377,381], [395,399], [413,417], [431,435], [449,453], [467,471], [485,489], [503,507], [521,525], [539,543], [556,561], 575] + QSET_ID: [[0,3]] + : + COLOR_SPECIFIC_LIMITS: 0 + RED_SHARED_LIMIT_CELLS: 49353 + YELLOW_SHARED_LIMIT_CELLS: 59225 + SHARED_LIMIT_CELLS: 631745 + RED_SHARED_RESUME_LIMIT_CELLS: 49352 + YELLOW_SHARED_RESUME_LIMIT_CELLS: 59224 + SHARED_RESUME_LIMIT_CELLS: 78967 + + TM_EGR_THD_MC_PORT_QSET: + ? + PORT_ID: [[1,4], [17,21], [35,39], [52,57], [71,75], [89,93], [107,111], [125,129], [143,147], [161,165], [179,183], [197,201], [215,219], [233,237], [251,255], [268,273], [287,291], [305,309], [323,327], [340,345], [359,363], [377,381], [395,399], [413,417], [431,435], [449,453], [467,471], [485,489], [503,507], [521,525], [539,543], [556,561], 575] + QSET_ID: [[0,3]] + : + COLOR_SPECIFIC_LIMITS: 0 + RED_SHARED_LIMIT_CELLS: 49353 + YELLOW_SHARED_LIMIT_CELLS: 59225 + SHARED_LIMIT_CELLS: 631745 + RED_SHARED_RESUME_LIMIT_CELLS: 49352 + YELLOW_SHARED_RESUME_LIMIT_CELLS: 59224 + SHARED_RESUME_LIMIT_CELLS: 78967 +... + + +### PFC mapping +--- +device: + 0: + PC_MAC_CONTROL: + ? + PORT_ID: [[1,4], [17,21], [35,39], [52,57], [71,75], [89,93], [107,111], [125,129], [143,147], [161,165], [179,183], [197,201], [215,219], [233,237], [251,255], [268,273], [287,291], [305,309], [323,327], [340,345], [359,363], [377,381], [395,399], [413,417], [431,435], [449,453], [467,471], [485,489], [503,507], [521,525], [539,543], [556,561], 575] + : + PAUSE_TX: 0 + PAUSE_RX: 0 + + TM_PFC_EGR: + ? + PORT_ID: [[288,291], [306,309], [324,327], [342,345], [360,363], [378,381], [396,399], [414,417], [432,435], [450,453], [468,471], [486,489], [504,507], [522,525], [540,543], [558,561]] + : + TM_PFC_PRI_PROFILE_ID: 0 + + TM_PFC_EGR: + ? + PORT_ID: [[1,4], [18,21], [36,39], [54,57], [72,75], [90,93], [108,111], [126,129], [144,147], [162,165], [180,183], [198,201], [216,219], [234,237], [252,255], [270,273]] + : + TM_PFC_PRI_PROFILE_ID: 0 + +... +--- +device: + 0: +# TM_PFC_PRI_PROFILE is mapped to MMU_INTFI_PFCRPI_PROFILE in physical table. There are 8 profiles to configure the PFC value to COS/priorities mapping. For example, you could map multiple coses to a PFC. This mapping is needed when receiving PFC frames and stopping queues(coses) according to the PFC frame received. + TM_PFC_PRI_PROFILE: + ? + TM_PFC_PRI_PROFILE_ID: 0 + PFC_PRI: 3 + : + PFC: 1 + COS_LIST: [0, 0, 0, 1, 0, 0, 0, 0] + ? + TM_PFC_PRI_PROFILE_ID: 0 + PFC_PRI: 4 + : + PFC: 1 + COS_LIST: [0, 0, 0, 0, 1, 0, 0, 0] + + +# enable the MAC's PFC controls. + PC_PFC: + ? + PORT_ID: [[288,291], [306,309], [324,327], [342,345], [360,363], [378,381], [396,399], [414,417], [432,435], [450,453], [468,471], [486,489], [504,507], [522,525], [540,543], [558,561]] + : + ENABLE_RX: 1 + ENABLE_TX: 1 + + PC_PFC: + ? + PORT_ID: [[1,4], [18,21], [36,39], [54,57], [72,75], [90,93], [108,111], [126,129], [144,147], [162,165], [180,183], [198,201], [216,219], [234,237], [252,255], [270,273]] + : + ENABLE_RX: 1 + ENABLE_TX: 1 +... +### Mirror-on-drop +--- +device: + 0: + TM_MIRROR_ON_DROP_CONTROL: + RESERVED_LIMIT_CELLS: 6666 + + TM_MIRROR_ON_DROP_PROFILE: + ? + TM_MIRROR_ON_DROP_PROFILE_ID: 0 + : + PERCENTAGE_0_25: 65535 + PERCENTAGE_25_50: 65535 + PERCENTAGE_50_75: 65535 + PERCENTAGE_75_100: 65535 + INGRESS_LIMIT: 0 + SHARED_LIMIT: 0 + + TM_MIRROR_ON_DROP_DESTINATION: + ? + TM_MIRROR_ON_DROP_DESTINATION_ID: 0 + : + TM_MC_Q_ID: 0 + PORT_ID: 0 +... +--- +device: + 0: + TM_DROP_CONGESTION_NOTIFICATION_CONTROL: + RESERVED_LIMIT_CELLS: 6666 +... +--- +device: + 0: + TM_CNP_CONTROL: + RESERVED_LIMIT_CELLS: 6266 +... + +### THDR Limits +--- +device: + 0: + TM_THD_REPL_Q: + ? + REPL_Q_NUM: [[0,6]] + : + SHARED_LIMITS: 1 + DYNAMIC_SHARED_LIMITS: 1 + SHARED_LIMIT_DYNAMIC: ALPHA_1 + RESUME_OFFSET_CELLS: 8 + COLOR_SPECIFIC_LIMITS: 0 + COLOR_SPECIFIC_DYNAMIC_LIMITS: 0 + YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750 + RED_LIMIT_DYNAMIC: PERCENTAGE_625 + SHARED_LIMIT_PKTS: 1 + DYNAMIC_SHARED_LIMIT_PKTS: 1 + SHARED_LIMIT_DYNAMIC_PKTS: ALPHA_1 + RESUME_OFFSET_PKTS: 2 + COLOR_SPECIFIC_LIMIT_PKTS: 0 + COLOR_SPECIFIC_DYNAMIC_LIMIT_PKTS: 0 + YELLOW_LIMIT_DYNAMIC_PKTS: PERCENTAGE_750 + RED_LIMIT_DYNAMIC_PKTS: PERCENTAGE_625 + + TM_THD_REPL_Q: + ? + REPL_Q_NUM: [[0,3]] + : + MIN_GUARANTEE_CELLS: 0 + MIN_GUARANTEE_PKTS: 0 + ? + REPL_Q_NUM: [[4,6]] + : + MIN_GUARANTEE_CELLS: 24 + MIN_GUARANTEE_PKTS: 4 + + + TM_THD_REPL_SERVICE_POOL: + COLOR_SPECIFIC_LIMITS: 0 + COLOR_SPECIFIC_LIMIT_PKTS: 0 + SHARED_LIMIT_CELLS: 14044 + SHARED_LIMIT_PKTS: 6424 + SHARED_RESUME_LIMIT_CELLS: 14036 + SHARED_RESUME_LIMIT_PKTS: 6422 + YELLOW_SHARED_LIMIT_CELLS: 10533 + YELLOW_SHARED_LIMIT_PKTS: 4818 + RED_SHARED_LIMIT_CELLS: 8772 + RED_SHARED_LIMIT_PKTS: 4015 + YELLOW_SHARED_RESUME_LIMIT_CELLS: 10525 + YELLOW_SHARED_RESUME_LIMIT_PKTS: 4816 + RED_SHARED_RESUME_LIMIT_CELLS: 8764 + RED_SHARED_RESUME_LIMIT_PKTS: 4013 + +... +### OBM +--- +device: + 0: + TM_OBM_PORT_PKT_PARSE: + ? + PORT_ID: [[288,291], [306,309], [324,327], [342,345], [360,363], [378,381], [396,399], [414,417], [432,435], [450,453], [468,471], [486,489], [504,507], [522,525], [540,543], [558,561]] + : + OUTER_TPID: 1 + HEADER_TYPE: OBM_HEADER_TYPE_ETHERNET + DEFAULT_PKT_PRI: 0 + ? + PORT_ID: [[1,4], [18,21], [36,39], [54,57], [72,75], [90,93], [108,111], [126,129], [144,147], [162,165], [180,183], [198,201], [216,219], [234,237], [252,255], [270,273]] + : + OUTER_TPID: 1 + HEADER_TYPE: OBM_HEADER_TYPE_ETHERNET + DEFAULT_PKT_PRI: 0 + + TM_OBM_PORT_FLOW_CTRL: + ? + PORT_ID: [[288,291], [306,309], [324,327], [342,345], [360,363], [378,381], [396,399], [414,417], [432,435], [450,453], [468,471], [486,489], [504,507], [522,525], [540,543], [558,561]] + : + FLOW_CTRL: 1 + FLOW_CTRL_TYPE: PFC + LOSSLESS0_FLOW_CTRL: 1 + LOSSLESS1_FLOW_CTRL: 0 + COS_BMAP_LOSSLESS0: [0,0,0,1,1,0,0,0] + COS_BMAP_LOSSLESS1: 0 + ? + PORT_ID: [[1,4], [18,21], [36,39], [54,57], [72,75], [90,93], [108,111], [126,129], [144,147], [162,165], [180,183], [198,201], [216,219], [234,237], [252,255], [270,273]] + : + FLOW_CTRL: 1 + FLOW_CTRL_TYPE: PFC + LOSSLESS0_FLOW_CTRL: 1 + LOSSLESS1_FLOW_CTRL: 0 + COS_BMAP_LOSSLESS0: [0,0,0,1,1,0,0,0] + COS_BMAP_LOSSLESS1: 0 + + TM_OBM_PORT_PKT_PRI_TC_MAP: + ? + PORT_ID: [[288,291], [306,309], [324,327], [342,345], [360,363], [378,381], [396,399], [414,417], [432,435], [450,453], [468,471], [486,489], [504,507], [522,525], [540,543], [558,561]] + PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN + PKT_PRI: [0,1,2,5,6,7] + : + TRAFFIC_CLASS: OBM_TC_LOSSY_LOW + ? + PORT_ID: [[288,291], [306,309], [324,327], [342,345], [360,363], [378,381], [396,399], [414,417], [432,435], [450,453], [468,471], [486,489], [504,507], [522,525], [540,543], [558,561]] + PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN + PKT_PRI: [3,4] + : + TRAFFIC_CLASS: OBM_TC_LOSSLESS + ? + PORT_ID: [[1,4], [18,21], [36,39], [54,57], [72,75], [90,93], [108,111], [126,129], [144,147], [162,165], [180,183], [198,201], [216,219], [234,237], [252,255], [270,273]] + PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN + PKT_PRI: [0,1,2,5,6,7] + : + TRAFFIC_CLASS: OBM_TC_LOSSY_LOW + ? + PORT_ID: [[1,4], [18,21], [36,39], [54,57], [72,75], [90,93], [108,111], [126,129], [144,147], [162,165], [180,183], [198,201], [216,219], [234,237], [252,255], [270,273]] + PKT_PRI_TYPE: PKT_PRI_TYPE_VLAN + PKT_PRI: [3,4] + : + TRAFFIC_CLASS: OBM_TC_LOSSLESS + +... diff --git a/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-P128/pg_profile_lookup.ini b/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-P128/pg_profile_lookup.ini new file mode 100644 index 00000000000..aa1b41137cf --- /dev/null +++ b/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-P128/pg_profile_lookup.ini @@ -0,0 +1,30 @@ +# PG lossless profiles. +# speed cable size xon xoff threshold xon_offset +25000 5m 4620 0 162540 0 3360 +25000 40m 4620 0 173460 0 3360 +25000 300m 4620 0 254940 0 3360 +50000 5m 4620 0 162540 0 3360 +50000 30m 4620 0 170520 0 3360 +50000 40m 4620 0 173460 0 3360 +50000 300m 4620 0 254940 0 3360 +50000 500m 4620 0 317100 0 3360 +100000 5m 4620 0 229740 0 3360 +100000 30m 4620 0 245280 0 3360 +100000 40m 4620 0 251580 0 3360 +100000 300m 4620 0 414120 0 3360 +100000 500m 4620 0 538860 0 3360 +200000 5m 4620 0 369180 0 3360 +200000 30m 4620 0 400260 0 3360 +200000 40m 4620 0 412860 0 3360 +200000 300m 4620 0 737940 0 3360 +200000 500m 4620 0 987840 0 3360 +400000 5m 4620 0 650160 0 3360 +400000 30m 4620 0 712740 0 3360 +400000 40m 4620 0 737940 0 3360 +400000 300m 4620 0 1387680 0 3360 +400000 500m 4620 0 1887900 0 3360 +800000 5m 4620 0 1249080 0 3360 +800000 30m 4620 0 1374240 0 3360 +800000 40m 4620 0 1424220 0 3360 +800000 300m 4620 0 2724120 0 3360 +800000 500m 4620 0 3724140 0 3360 diff --git a/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-P128/port_config.ini b/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-P128/port_config.ini new file mode 100644 index 00000000000..48532116c6f --- /dev/null +++ b/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-P128/port_config.ini @@ -0,0 +1,130 @@ +# name lanes alias index speed +Ethernet0 121,122,123,124,125,126,127,128 etp1 1 800000 +Ethernet8 113,114,115,116,117,118,119,120 etp2 2 800000 +Ethernet16 105,106,107,108,109,110,111,112 etp3 3 800000 +Ethernet24 73,74,75,76,77,78,79,80 etp4 4 800000 +Ethernet32 65,66,67,68,69,70,71,72 etp5 5 800000 +Ethernet40 81,82,83,84,85,86,87,88 etp6 6 800000 +Ethernet48 97,98,99,100,101,102,103,104 etp7 7 800000 +Ethernet56 89,90,91,92,93,94,95,96 etp8 8 800000 +Ethernet64 505,506,507,508,509,510,511,512 etp9 9 800000 +Ethernet72 497,498,499,500,501,502,503,504 etp10 10 800000 +Ethernet80 489,490,491,492,493,494,495,496 etp11 11 800000 +Ethernet88 457,458,459,460,461,462,463,464 etp12 12 800000 +Ethernet96 449,450,451,452,453,454,455,456 etp13 13 800000 +Ethernet104 465,466,467,468,469,470,471,472 etp14 14 800000 +Ethernet112 481,482,483,484,485,486,487,488 etp15 15 800000 +Ethernet120 473,474,475,476,477,478,479,480 etp16 16 800000 +Ethernet128 889,890,891,892,893,894,895,896 etp17 17 800000 +Ethernet136 881,882,883,884,885,886,887,888 etp18 18 800000 +Ethernet144 873,874,875,876,877,878,879,880 etp19 19 800000 +Ethernet152 841,842,843,844,845,846,847,848 etp20 20 800000 +Ethernet160 833,834,835,836,837,838,839,840 etp21 21 800000 +Ethernet168 849,850,851,852,853,854,855,856 etp22 22 800000 +Ethernet176 865,866,867,868,869,870,871,872 etp23 23 800000 +Ethernet184 857,858,859,860,861,862,863,864 etp24 24 800000 +Ethernet192 1017,1018,1019,1020,1021,1022,1023,1024 etp25 25 800000 +Ethernet200 1009,1010,1011,1012,1013,1014,1015,1016 etp26 26 800000 +Ethernet208 1001,1002,1003,1004,1005,1006,1007,1008 etp27 27 800000 +Ethernet216 969,970,971,972,973,974,975,976 etp28 28 800000 +Ethernet224 961,962,963,964,965,966,967,968 etp29 29 800000 +Ethernet232 977,978,979,980,981,982,983,984 etp30 30 800000 +Ethernet240 993,994,995,996,997,998,999,1000 etp31 31 800000 +Ethernet248 985,986,987,988,989,990,991,992 etp32 32 800000 +Ethernet256 233,234,235,236,237,238,239,240 etp33 33 800000 +Ethernet264 201,202,203,204,205,206,207,208 etp34 34 800000 +Ethernet272 225,226,227,228,229,230,231,232 etp35 35 800000 +Ethernet280 217,218,219,220,221,222,223,224 etp36 36 800000 +Ethernet288 273,274,275,276,277,278,279,280 etp37 37 800000 +Ethernet296 257,258,259,260,261,262,263,264 etp38 38 800000 +Ethernet304 305,306,307,308,309,310,311,312 etp39 39 800000 +Ethernet312 313,314,315,316,317,318,319,320 etp40 40 800000 +Ethernet320 361,362,363,364,365,366,367,368 etp41 41 800000 +Ethernet328 329,330,331,332,333,334,335,336 etp42 42 800000 +Ethernet336 353,354,355,356,357,358,359,360 etp43 43 800000 +Ethernet344 345,346,347,348,349,350,351,352 etp44 44 800000 +Ethernet352 401,402,403,404,405,406,407,408 etp45 45 800000 +Ethernet360 385,386,387,388,389,390,391,392 etp46 46 800000 +Ethernet368 433,434,435,436,437,438,439,440 etp47 47 800000 +Ethernet376 441,442,443,444,445,446,447,448 etp48 48 800000 +Ethernet384 617,618,619,620,621,622,623,624 etp49 49 800000 +Ethernet392 585,586,587,588,589,590,591,592 etp50 50 800000 +Ethernet400 609,610,611,612,613,614,615,616 etp51 51 800000 +Ethernet408 601,602,603,604,605,606,607,608 etp52 52 800000 +Ethernet416 657,658,659,660,661,662,663,664 etp53 53 800000 +Ethernet424 641,642,643,644,645,646,647,648 etp54 54 800000 +Ethernet432 689,690,691,692,693,694,695,696 etp55 55 800000 +Ethernet440 697,698,699,700,701,702,703,704 etp56 56 800000 +Ethernet448 745,746,747,748,749,750,751,752 etp57 57 800000 +Ethernet456 713,714,715,716,717,718,719,720 etp58 58 800000 +Ethernet464 737,738,739,740,741,742,743,744 etp59 59 800000 +Ethernet472 729,730,731,732,733,734,735,736 etp60 60 800000 +Ethernet480 785,786,787,788,789,790,791,792 etp61 61 800000 +Ethernet488 769,770,771,772,773,774,775,776 etp62 62 800000 +Ethernet496 817,818,819,820,821,822,823,824 etp63 63 800000 +Ethernet504 825,826,827,828,829,830,831,832 etp64 64 800000 +Ethernet512 249,250,251,252,253,254,255,256 etp65 65 800000 +Ethernet520 241,242,243,244,245,246,247,248 etp66 66 800000 +Ethernet528 193,194,195,196,197,198,199,200 etp67 67 800000 +Ethernet536 209,210,211,212,213,214,215,216 etp68 68 800000 +Ethernet544 281,282,283,284,285,286,287,288 etp69 69 800000 +Ethernet552 289,290,291,292,293,294,295,296 etp70 70 800000 +Ethernet560 265,266,267,268,269,270,271,272 etp71 71 800000 +Ethernet568 297,298,299,300,301,302,303,304 etp72 72 800000 +Ethernet576 377,378,379,380,381,382,383,384 etp73 73 800000 +Ethernet584 369,370,371,372,373,374,375,376 etp74 74 800000 +Ethernet592 321,322,323,324,325,326,327,328 etp75 75 800000 +Ethernet600 337,338,339,340,341,342,343,344 etp76 76 800000 +Ethernet608 409,410,411,412,413,414,415,416 etp77 77 800000 +Ethernet616 417,418,419,420,421,422,423,424 etp78 78 800000 +Ethernet624 393,394,395,396,397,398,399,400 etp79 79 800000 +Ethernet632 425,426,427,428,429,430,431,432 etp80 80 800000 +Ethernet640 633,634,635,636,637,638,639,640 etp81 81 800000 +Ethernet648 625,626,627,628,629,630,631,632 etp82 82 800000 +Ethernet656 577,578,579,580,581,582,583,584 etp83 83 800000 +Ethernet664 593,594,595,596,597,598,599,600 etp84 84 800000 +Ethernet672 665,666,667,668,669,670,671,672 etp85 85 800000 +Ethernet680 673,674,675,676,677,678,679,680 etp86 86 800000 +Ethernet688 649,650,651,652,653,654,655,656 etp87 87 800000 +Ethernet696 681,682,683,684,685,686,687,688 etp88 88 800000 +Ethernet704 761,762,763,764,765,766,767,768 etp89 89 800000 +Ethernet712 753,754,755,756,757,758,759,760 etp90 90 800000 +Ethernet720 705,706,707,708,709,710,711,712 etp91 91 800000 +Ethernet728 721,722,723,724,725,726,727,728 etp92 92 800000 +Ethernet736 793,794,795,796,797,798,799,800 etp93 93 800000 +Ethernet744 801,802,803,804,805,806,807,808 etp94 94 800000 +Ethernet752 777,778,779,780,781,782,783,784 etp95 95 800000 +Ethernet760 809,810,811,812,813,814,815,816 etp96 96 800000 +Ethernet768 25,26,27,28,29,30,31,32 etp97 97 800000 +Ethernet776 33,34,35,36,37,38,39,40 etp98 98 800000 +Ethernet784 17,18,19,20,21,22,23,24 etp99 99 800000 +Ethernet792 1,2,3,4,5,6,7,8 etp100 100 800000 +Ethernet800 9,10,11,12,13,14,15,16 etp101 101 800000 +Ethernet808 41,42,43,44,45,46,47,48 etp102 102 800000 +Ethernet816 49,50,51,52,53,54,55,56 etp103 103 800000 +Ethernet824 57,58,59,60,61,62,63,64 etp104 104 800000 +Ethernet832 153,154,155,156,157,158,159,160 etp105 105 800000 +Ethernet840 161,162,163,164,165,166,167,168 etp106 106 800000 +Ethernet848 145,146,147,148,149,150,151,152 etp107 107 800000 +Ethernet856 129,130,131,132,133,134,135,136 etp108 108 800000 +Ethernet864 137,138,139,140,141,142,143,144 etp109 109 800000 +Ethernet872 169,170,171,172,173,174,175,176 etp110 110 800000 +Ethernet880 177,178,179,180,181,182,183,184 etp111 111 800000 +Ethernet888 185,186,187,188,189,190,191,192 etp112 112 800000 +Ethernet896 537,538,539,540,541,542,543,544 etp113 113 800000 +Ethernet904 545,546,547,548,549,550,551,552 etp114 114 800000 +Ethernet912 529,530,531,532,533,534,535,536 etp115 115 800000 +Ethernet920 513,514,515,516,517,518,519,520 etp116 116 800000 +Ethernet928 521,522,523,524,525,526,527,528 etp117 117 800000 +Ethernet936 553,554,555,556,557,558,559,560 etp118 118 800000 +Ethernet944 561,562,563,564,565,566,567,568 etp119 119 800000 +Ethernet952 569,570,571,572,573,574,575,576 etp120 120 800000 +Ethernet960 921,922,923,924,925,926,927,928 etp121 121 800000 +Ethernet968 929,930,931,932,933,934,935,936 etp122 122 800000 +Ethernet976 913,914,915,916,917,918,919,920 etp123 123 800000 +Ethernet984 897,898,899,900,901,902,903,904 etp124 124 800000 +Ethernet992 905,906,907,908,909,910,911,912 etp125 125 800000 +Ethernet1000 937,938,939,940,941,942,943,944 etp126 126 800000 +Ethernet1008 945,946,947,948,949,950,951,952 etp127 127 800000 +Ethernet1016 953,954,955,956,957,958,959,960 etp128 128 800000 +Ethernet1024 1026,1027,1028,1029 etp129 129 100000 diff --git a/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-P128/qos.json.j2 b/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-P128/qos.json.j2 new file mode 100644 index 00000000000..af1c4dfb256 --- /dev/null +++ b/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-P128/qos.json.j2 @@ -0,0 +1,4 @@ +{%- macro generate_global_dscp_to_tc_map() %} +{# This is an empty macro since the global DSCP_TO_TC map is not required #} +{%- endmacro %} +{%- include 'qos_config.j2' %} diff --git a/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-P128/sai.profile b/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-P128/sai.profile new file mode 100644 index 00000000000..c5d6c903bfa --- /dev/null +++ b/device/nexthop/x86_64-nexthop_4210-r0021/NH-4210-F-P128/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/nh4210-r0021-F-P128.yaml diff --git a/device/nexthop/x86_64-nexthop_4210-r0021/bmc.json b/device/nexthop/x86_64-nexthop_4210-r0021/bmc.json new file mode 120000 index 00000000000..2d71de14443 --- /dev/null +++ b/device/nexthop/x86_64-nexthop_4210-r0021/bmc.json @@ -0,0 +1 @@ +../common/bmc/bmc.json \ No newline at end of file diff --git a/device/nexthop/x86_64-nexthop_4210-r0021/default_sku b/device/nexthop/x86_64-nexthop_4210-r0021/default_sku new file mode 100644 index 00000000000..3ccc59d9f66 --- /dev/null +++ b/device/nexthop/x86_64-nexthop_4210-r0021/default_sku @@ -0,0 +1 @@ +NH-4210-F-P128 l1 diff --git a/device/nexthop/x86_64-nexthop_4210-r0021/installer.conf b/device/nexthop/x86_64-nexthop_4210-r0021/installer.conf new file mode 120000 index 00000000000..97b3314541b --- /dev/null +++ b/device/nexthop/x86_64-nexthop_4210-r0021/installer.conf @@ -0,0 +1 @@ +../x86_64-nexthop_4010-r0/installer.conf \ No newline at end of file diff --git a/device/nexthop/x86_64-nexthop_4210-r0021/media_settings.json b/device/nexthop/x86_64-nexthop_4210-r0021/media_settings.json new file mode 100644 index 00000000000..047352a9867 --- /dev/null +++ b/device/nexthop/x86_64-nexthop_4210-r0021/media_settings.json @@ -0,0 +1,1334 @@ +{ + "GLOBAL_MEDIA_SETTINGS": { + "34-34": { + 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"lane6": "0xffffffe6", + "lane7": "0xffffffe6" + }, + "main": { + "lane0": "0x6c", + "lane1": "0x6c", + "lane2": "0x6c", + "lane3": "0x6c", + "lane4": "0x6c", + "lane5": "0x6c", + "lane6": "0x6c", + "lane7": "0x6c" + }, + "post1": { + "lane0": "0xffffffee", + "lane1": "0xffffffee", + "lane2": "0xffffffee", + "lane3": "0xffffffee", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "56-56": { + ".*(-LPO|EO138HGPCT.*SL1|L-OSG8CNS\\d+-NMT|EOLO-138HG-PCT-\\d+-CSL1)": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x2", + "lane1": "0x2", + "lane2": "0x2", + "lane3": "0x2", + "lane4": "0x2", + "lane5": "0x2", + "lane6": "0x2", + "lane7": "0x2" + }, + "pre1": { + "lane0": "0xffffffe2", + "lane1": "0xffffffe2", + "lane2": "0xffffffe2", + "lane3": "0xffffffe2", + "lane4": "0xffffffea", + "lane5": "0xffffffea", + "lane6": "0xffffffea", + "lane7": "0xffffffea" + }, + "main": { + "lane0": "0x68", + "lane1": "0x68", + "lane2": "0x68", + "lane3": "0x68", + "lane4": "0x6c", + "lane5": "0x6c", + "lane6": "0x6c", + "lane7": "0x6c" + }, + "post1": { + "lane0": "0xffffffee", + "lane1": "0xffffffee", + "lane2": "0xffffffee", + "lane3": "0xffffffee", + "lane4": "0xffffffee", + "lane5": "0xffffffee", + "lane6": "0xffffffee", + "lane7": "0xffffffee" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "58-58": { + ".*(-LPO|EO138HGPCT.*SL1|L-OSG8CNS\\d+-NMT|EOLO-138HG-PCT-\\d+-CSL1)": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x2", + "lane5": "0x2", + "lane6": "0x2", + "lane7": "0x2" + }, + "pre1": { + "lane0": "0xffffffe2", + "lane1": "0xffffffe2", + "lane2": "0xffffffe2", + "lane3": "0xffffffe2", + "lane4": "0xffffffea", + "lane5": "0xffffffea", + "lane6": "0xffffffea", + "lane7": "0xffffffea" + }, + "main": { + "lane0": "0x64", + "lane1": "0x64", + "lane2": "0x64", + "lane3": "0x64", + "lane4": "0x68", + "lane5": "0x68", + "lane6": "0x68", + "lane7": "0x68" + }, + "post1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xffffffea", + "lane5": "0xffffffea", + "lane6": "0xffffffea", + "lane7": "0xffffffea" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "60-60": { + ".*(-LPO|EO138HGPCT.*SL1|L-OSG8CNS\\d+-NMT|EOLO-138HG-PCT-\\d+-CSL1)": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xffffffe2", + "lane1": "0xffffffe2", + "lane2": "0xffffffe2", + "lane3": "0xffffffe2", + "lane4": "0xffffffe2", + "lane5": "0xffffffe2", + "lane6": "0xffffffe2", + "lane7": "0xffffffe2" + }, + "main": { + "lane0": "0x64", + "lane1": "0x64", + "lane2": "0x64", + "lane3": "0x64", + "lane4": "0x68", + "lane5": "0x68", + "lane6": "0x68", + "lane7": "0x68" + }, + "post1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xffffffea", + "lane5": "0xffffffea", + "lane6": "0xffffffea", + "lane7": "0xffffffea" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "62-62": { + ".*(-LPO|EO138HGPCT.*SL1|L-OSG8CNS\\d+-NMT|EOLO-138HG-PCT-\\d+-CSL1)": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x2", + "lane1": "0x2", + "lane2": "0x2", + "lane3": "0x2", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xffffffe2", + "lane1": "0xffffffe2", + "lane2": "0xffffffe2", + "lane3": "0xffffffe2", + "lane4": "0xffffffe2", + "lane5": "0xffffffe2", + "lane6": "0xffffffe2", + "lane7": "0xffffffe2" + }, + "main": { + "lane0": "0x64", + "lane1": "0x64", + "lane2": "0x64", + "lane3": "0x64", + "lane4": "0x68", + "lane5": "0x68", + "lane6": "0x68", + "lane7": "0x68" + }, + "post1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xffffffea", + "lane5": "0xffffffea", + "lane6": "0xffffffea", + "lane7": "0xffffffea" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "64-64": { + ".*(-LPO|EO138HGPCT.*SL1|L-OSG8CNS\\d+-NMT|EOLO-138HG-PCT-\\d+-CSL1)": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x2", + "lane1": "0x2", + "lane2": "0x2", + "lane3": "0x2", + "lane4": "0x2", + "lane5": "0x2", + "lane6": "0x2", + "lane7": "0x2" + }, + "pre1": { + "lane0": "0xffffffe2", + "lane1": "0xffffffe2", + "lane2": "0xffffffe2", + "lane3": "0xffffffe2", + "lane4": "0xffffffe2", + "lane5": "0xffffffe2", + "lane6": "0xffffffe2", + "lane7": "0xffffffe2" + }, + "main": { + "lane0": "0x68", + "lane1": "0x68", + "lane2": "0x68", + "lane3": "0x68", + "lane4": "0x68", + "lane5": "0x68", + "lane6": "0x68", + "lane7": "0x68" + }, + "post1": { + "lane0": "0xffffffea", + "lane1": "0xffffffea", + "lane2": "0xffffffea", + "lane3": "0xffffffea", + "lane4": "0xffffffea", + "lane5": "0xffffffea", + "lane6": "0xffffffea", + "lane7": "0xffffffea" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "1-128": { + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x2", + "lane1": "0x2", + "lane2": "0x2", + "lane3": "0x2", + "lane4": "0x2", + "lane5": "0x2", + "lane6": "0x2", + "lane7": "0x2" + }, + "pre1": { + "lane0": "0xffffffee", + "lane1": "0xffffffee", + "lane2": "0xffffffee", + "lane3": "0xffffffee", + "lane4": "0xffffffee", + "lane5": "0xffffffee", + "lane6": "0xffffffee", + "lane7": "0xffffffee" + }, + "main": { + "lane0": "0x84", + "lane1": "0x84", + "lane2": "0x84", + "lane3": "0x84", + "lane4": "0x84", + "lane5": "0x84", + "lane6": "0x84", + "lane7": "0x84" + }, + "post1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2", + "lane4": "0xfffffff2", + "lane5": "0xfffffff2", + "lane6": "0xfffffff2", + "lane7": "0xfffffff2" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + }, + "Default": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "main": { + "lane0": "0xa8", + "lane1": "0xa8", + "lane2": "0xa8", + "lane3": "0xa8", + "lane4": "0xa8", + "lane5": "0xa8", + "lane6": "0xa8", + "lane7": "0xa8" + }, + "post1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + } + } +} diff --git a/device/nexthop/x86_64-nexthop_4210-r0021/pcie-variables.yaml b/device/nexthop/x86_64-nexthop_4210-r0021/pcie-variables.yaml new file mode 120000 index 00000000000..a946ba63c8c --- /dev/null +++ b/device/nexthop/x86_64-nexthop_4210-r0021/pcie-variables.yaml @@ -0,0 +1 @@ +../common/black_mamba/pcie-variables.yaml \ No newline at end of file diff --git a/device/nexthop/x86_64-nexthop_4210-r0021/pcie.yaml b/device/nexthop/x86_64-nexthop_4210-r0021/pcie.yaml new file mode 120000 index 00000000000..ce9ec4e0d92 --- /dev/null +++ b/device/nexthop/x86_64-nexthop_4210-r0021/pcie.yaml @@ -0,0 +1 @@ +../x86_64-nexthop_4010-r0/pcie.yaml \ No newline at end of file diff --git a/device/nexthop/x86_64-nexthop_4210-r0021/pcie.yaml.j2 b/device/nexthop/x86_64-nexthop_4210-r0021/pcie.yaml.j2 new file mode 100644 index 00000000000..a7dcf4e1fd5 --- /dev/null +++ b/device/nexthop/x86_64-nexthop_4210-r0021/pcie.yaml.j2 @@ -0,0 +1,137 @@ +- bus: '00' + dev: '00' + fn: '0' + id: '14d8' + name: 'Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge Root Complex' +- bus: '00' + dev: '00' + fn: '2' + id: '14d9' + name: 'IOMMU: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge IOMMU' +- bus: '00' + dev: '01' + fn: '0' + id: '14da' + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge Dummy Host Bridge' +- bus: '00' + dev: '01' + fn: '1' + id: '14db' + name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge GPP Bridge' +- bus: '00' + dev: '01' + fn: '2' + id: '14db' + name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge GPP Bridge' +- bus: '00' + dev: '01' + fn: '3' + id: '14db' + name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge GPP Bridge' +- bus: '00' + dev: '01' + fn: '4' + id: '14db' + name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge GPP Bridge' +- bus: '00' + dev: '01' + fn: '5' + id: '14db' + name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge GPP Bridge' +- bus: '00' + dev: '02' + fn: '0' + id: '14da' + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge Dummy Host Bridge' +- bus: '00' + dev: '02' + fn: '1' + id: '14db' + name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge GPP Bridge' +- bus: '00' + dev: '02' + fn: '2' + id: '14db' + name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge GPP Bridge' +- bus: '00' + dev: '03' + fn: '0' + id: '14da' + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge Dummy Host Bridge' +- bus: '00' + dev: '04' + fn: '0' + id: '14da' + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge Dummy Host Bridge' +- bus: '00' + dev: '08' + fn: '0' + id: '14da' + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge Dummy Host Bridge' +- bus: '00' + dev: '08' + fn: '1' + id: '14db' + name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge GPP Bridge' +- bus: '00' + dev: '08' + fn: '3' + id: '14db' + name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge GPP Bridge' +- bus: '00' + dev: '14' + fn: '0' + id: '790b' + name: 'SMBus: Advanced Micro Devices, Inc. [AMD] FCH SMBus Controller (rev 71)' +- bus: '00' + dev: '14' + fn: '3' + id: '790e' + name: 'ISA bridge: Advanced Micro Devices, Inc. [AMD] FCH LPC Bridge (rev 51)' +- bus: '{{nvme_bus}}' + dev: '00' + fn: '0' + id: 110b + name: 'Non-Volatile memory controller: ATP ELECTRONICS INC Device 110b (rev 03)' +- bus: '{{mgmt_nic_bus}}' + dev: '00' + fn: '0' + id: 12c0 + name: 'Ethernet controller: Aquantia Corp. AQtion AQC115C NBase-T/IEEE 802.3bz Ethernet Controller (rev 03)' +- bus: '{{cpu_card_fpga_bus}}' + dev: '00' + fn: '0' + id: '7016' + name: 'Serial controller: Xilinx Corporation Device' +- bus: '{{switchcard_fpga_0_bus}}' + dev: '00' + fn: '0' + id: '7018' + name: 'Serial controller: Xilinx Corporation Device 7015' +- bus: '{{switchcard_fpga_1_bus}}' + dev: '00' + fn: '0' + id: '7019' + name: 'Serial controller: Xilinx Corporation Device 7015' +- bus: '{{asic_0_bus}}' + dev: '00' + fn: '0' + id: f910 + name: 'Ethernet controller: Broadcom Inc. and subsidiaries BCM78910 Switch ASIC + [Tomahawk6] (rev 11)' +- bus: '{{amd_soc_group_0_bus}}' + dev: '00' + fn: '2' + id: '1649' + name: 'Encryption controller: Advanced Micro Devices, Inc. [AMD] Family 19h PSP/CCP' +- bus: '{{amd_soc_group_0_bus}}' + dev: '00' + fn: '3' + id: '15b6' + name: 'USB controller: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge USB 3.1 xHCI' +- bus: '{{amd_soc_group_0_bus}}' + dev: '00' + fn: '4' + id: '15b7' + name: 'USB controller: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge USB 3.1 xHCI' + diff --git a/device/nexthop/x86_64-nexthop_4210-r0021/pddf/pd-plugin.json b/device/nexthop/x86_64-nexthop_4210-r0021/pddf/pd-plugin.json new file mode 100644 index 00000000000..5c57144052e --- /dev/null +++ b/device/nexthop/x86_64-nexthop_4210-r0021/pddf/pd-plugin.json @@ -0,0 +1,179 @@ +{ + "DPM": { + "cpu_card": { + "type": "adm1266", + "dpm": "DPM1", + "dpm_signal_to_fault_cause": [ + { + "pdio_mask": "0xC002", + "gpio_mask": "0x0000", + "pdio_value": "0x4000", + "gpio_value": "0x0000", + "hw_cause": "THERMTRIP_L", + "hw_desc": "CPU exceeded Tdie temperature threshold", + "reboot_cause": "REBOOT_CAUSE_THERMAL_OVERLOAD_CPU" + }, + { + "pdio_mask": "0xC002", + "gpio_mask": "0x0000", + "pdio_value": "0x8000", + "gpio_value": "0x0000", + "hw_cause": "CPU_PWR_CYC_REQ", + "hw_desc": "CPU requested power cycle", + "reboot_cause": "REBOOT_CAUSE_POWER_LOSS" + }, + { + "pdio_mask": "0xC002", + "gpio_mask": "0x0000", + "pdio_value": "0xC000", + "gpio_value": "0x0000", + "hw_cause": "BMC_PWR_CYC_REQ", + "hw_desc": "BMC requested power cycle", + "reboot_cause": "REBOOT_CAUSE_POWER_LOSS" + }, + { + "pdio_mask": "0xC002", + "gpio_mask": "0x0000", + "pdio_value": "0x0002", + "gpio_value": "0x0000", + "hw_cause": "FPGA_PWR_CYC_REQ", + "hw_desc": "FPGA requested power cycle", + "reboot_cause": "REBOOT_CAUSE_POWER_LOSS" + }, + { + "pdio_mask": "0xC002", + "gpio_mask": "0x0000", + "pdio_value": "0x4002", + "gpio_value": "0x0000", + "hw_cause": "SWITCH_CARD_CP_PWR_BAD", + "hw_desc": "Switch card control plane power failure", + "reboot_cause": "REBOOT_CAUSE_HARDWARE_OTHER" + } + ], + "pin_to_name": { + "VH1": "POS12V", + "VH2": "POS5V0", + "VH3": "POS2V0_PHY", + "VH4": "POS5V0_S0", + "VP1": "POS1V0_A7", + "VP2": "POS1V8_A7", + "VP3": "POS3V3", + "VP4": "POS0V74_PHY", + "VP5": "POS1V2_A7", + "VP6": "POS0V75_S5", + "VP7": "POS1V8_S5", + "VP8": "POS3V3_S5", + "VP9": "POS1V1_S0", + "VP10": "POS1V5_SWT", + "VP11": "POS1V15_SWT", + "VP12": "POS1V8_S0", + "VP13": "POS3V3_S0", + "PDI3": "POS0V75_S5", + "PDO3": "POS0V75_S5", + "PDI4": "POS1V8_S5", + "PDO4": "POS1V8_S5", + "PDI5": "POS3V3_S5", + "PDO5": "POS3V3_S5", + "PDI6": "POS5V0_S0", + "PDO6": "POS5V0_S0", + "PDI7": "POS1V1_S0", + "PDO7": "POS1V1_S0", + "PDI8": "POS1V8_S0+POS3V3_S0", + "PDO8": "POS1V8_S0+POS3V3_S0" + } + } + }, + "PSU": { + "name": { + "1": "PSU1", + "2": "PSU2", + "3": "PSU3", + "4": "PSU4" + }, + "fan_name": { + "1": { + "1": "PSU1_FAN1" + }, + "2": { + "1": "PSU2_FAN1" + }, + "3": { + "1": "PSU3_FAN1" + }, + "4": { + "1": "PSU4_FAN1" + } + }, + "thermal_name": { + "1": "PSU1_TEMP1", + "2": "PSU1_TEMP2", + "3": "PSU1_TEMP3", + "4": "PSU2_TEMP1", + "5": "PSU2_TEMP2", + "6": "PSU2_TEMP3", + "7": "PSU3_TEMP1", + "8": "PSU3_TEMP2", + "9": "PSU3_TEMP3", + "10": "PSU4_TEMP1", + "11": "PSU4_TEMP2", + "12": "PSU4_TEMP3" + }, + "psu_present": { + "i2c": { + "valmap": { + "1": false, + "0": true + } + } + }, + "psu_power_good": { + "i2c": { + "valmap": { + "1": true, + "0": false + } + } + }, + "psu_fan_dir": { + "i2c": { + "valmap": { + "D1U74T-W-2400-12-HB4C": "exhaust", + "D1U74T-W-3200-12-HB4C": "exhaust" + } + } + }, + "PSU_FAN_MAX_SPEED_MAP": { + "default": "32500" + } + }, + "FAN": { + "present": { + "i2c": { + "valmap": { + "1": true, + "0": false + } + } + }, + "direction": { + "i2c": { + "valmap": { + "1": "exhaust" + } + } + }, + "fault": { + "i2c": { + "valmap": { + "1": true, + "0": false + } + } + }, + "duty_cycle_to_pwm": "lambda dc: ((dc/100) * 255)", + "pwm_to_duty_cycle": "lambda pwm: ((pwm/255) * 100)" + }, + "REBOOT_CAUSE": { + "reboot_cause_file": "/host/reboot-cause/reboot-cause.txt" + } +} diff --git a/device/nexthop/x86_64-nexthop_4210-r0021/pddf/pddf-device.json b/device/nexthop/x86_64-nexthop_4210-r0021/pddf/pddf-device.json new file mode 120000 index 00000000000..b941e90e610 --- /dev/null +++ b/device/nexthop/x86_64-nexthop_4210-r0021/pddf/pddf-device.json @@ -0,0 +1 @@ +../../x86_64-nexthop_4010-r0/pddf/pddf-device.json \ No newline at end of file diff --git a/device/nexthop/x86_64-nexthop_4210-r0021/pddf/pddf-device.json.j2 b/device/nexthop/x86_64-nexthop_4210-r0021/pddf/pddf-device.json.j2 new file mode 100644 index 00000000000..90d716e4062 --- /dev/null +++ b/device/nexthop/x86_64-nexthop_4210-r0021/pddf/pddf-device.json.j2 @@ -0,0 +1,25397 @@ +{ + "PLATFORM": { + "num_psus": 4, + "num_temps": 19, + "num_nexthop_fpga_asic_temp_sensors": 2, + "num_voltage_sensors": 40, + "num_current_sensors": 23, + "num_components": 27, + "num_fantrays": 8, + "num_fans_pertray": 2, + "std_kos": [ + "at24", + "optoe", + "i2c-dev", + "spi-xilinx" + ], + "pddf_kos": [ + "pddf_spi_module", + "pddf_multifpgapci_i2c_module", + "pddf_multifpgapci_gpio_module", + "pddf_multifpgapci_spi_module", + "pddf_client_module", + "pddf_multifpgapci_driver", + "pddf_multifpgapci_module", + "pddf_led_module", + "pddf_psu_module", + "pddf_fan_driver_module", + "pddf_fan_module", + "pddf_xcvr_module", + "pddf_xcvr_driver_module", + "pddf_cpldmux_module", + "pddf_cpldmux_driver" + ], + "custom_kos": [ + "pddf_custom_fpga_algo", + "nh_pmbus_core", + "nh_tmp464", + "nh_adm1266", + "nh_tda38740", + "nh_isl68137" + ], + "num_ports": 129, + "nexthop_thermal_xcvr_setpoint_margin": 8, + "nexthop_thermal_xcvr_setpoint_override": null, + "nexthop_thermal_xcvr_pid_domain": "main", + "pddf_dev_types": { + "description": " - Below is the list of supported PDDF device types (chip names) for various components. If any component uses some other driver, we will create the client using 'echo > /new_device' method", + "MULTIFPGAPCIE": [ + "multifpgapci" + ], + "PORT_MODULE": [ + "pddf_xcvr" + ], + "FAN": [ + "fan_multifpgapci" + ], + "PSU": [ + "psu_pmbus" + ], + "CPLDMUX": [ + "multifpgapci_mux" + ] + } + }, + "SYSTEM": { + "dev_info": { + "device_type": "CPU", + "device_name": "ROOT_COMPLEX", + "device_parent": null + }, + "i2c": { + "CONTROLLERS": [ + { + "dev_name": "pcie-0", + "dev": "PCIE0" + } + ] + } + }, + "PCIE0": { + "dev_info": { + "device_type": "PCIE", + "device_name": "PCIE0", + "device_parent": "SYSTEM" + }, + "i2c": { + "DEVICES": [ + { + "dev": "MULTIFPGAPCIE0" + }, + { + "dev": "MULTIFPGAPCIE1" + }, + { + "dev": "MULTIFPGAPCIE2" + } + ] + } + }, + "HWMON0": { + "dev_info": { + "device_type": "HWMON", + "device_name": "HWMON_CPU", + "device_parent": "PCIE0" + }, + "i2c": { + "path_info": { + "sysfs_base_path": "{{hwmon_cpu_sysfs_path}}" + } + } + }, + "TEMP1": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "CPU_TEMP", + "device_parent": "PCIE0", + "virt_parent": "HWMON0", + "high_threshold": 95, + "high_crit_threshold": 125, + "nexthop_thermal_setpoint_margin": 10, + "nexthop_thermal_pid_domain": "main" + }, + "dev_attr": { + "display_name": "CPU" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "temp1_input", + "drv_attr_name": "temp1_input" + } + ] + } + }, + "WATCHDOG": { + "dev_info": { + "device_type": "WATCHDOG", + "device_parent": "MULTIFPGAPCIE1" + }, + "dev_attr": { + "event_driven_power_cycle_control_reg_offset": "0x28", + "watchdog_counter_reg_offset": "0x1E0" + } + }, + "MULTIFPGAPCIESYSTEM0": { + "dev_info": { + "device_type": "MULTIFPGAPCIESYSTEM", + "device_name": "MULTIFPGAPCIESYSTEM0", + "device_parent": null + }, + "dev_attr": { + "PCI_DEVICE_IDS": [ + { + "vendor": "0x10ee", + "device": "0x7016" + }, + { + "vendor": "0x20a4", + "device": "0x7016" + }, + { + "vendor": "0x10ee", + "device": "0x7018" + }, + { + "vendor": "0x20a4", + "device": "0x7018" + }, + { + "vendor": "0x10ee", + "device": "0x7019" + }, + { + "vendor": "0x20a4", + "device": "0x7019" + } + ] + } + }, + "MULTIFPGAPCIE0": { + "dev_info": { + "device_type": "MULTIFPGAPCIE", + "device_name": "CPUCARD_FPGA", + "device_parent": "PCIE0", + "device_bdf": "{{cpu_card_fpga_bdf}}", + "dev_attr": {} + }, + "dev_attr": { + "pwr_cycle_reg_offset": "0x8", + "pwr_cycle_enable_word": "0xdeadbeef" + }, + "i2c": { + "dev_attr": { + "virt_bus": "0x5", + "ch_base_offset": "0x40000", + "ch_size": "0x200", + "num_virt_ch": "0xb" + }, + "channel": [ + { + "chn": "10", + "dev": "CPLDMUX0" + }, + { + "chn": "6", + "dev": "EEPROM1" + }, + { + "chn": "3", + "dev": "DPM1" + }, + { + "chn": "5", + "dev": "DPM2" + }, + { + "chn": "5", + "dev": "DPM3" + } + ] + }, + "spi_controllers": [ + "CPUCARD_SPI_CONTROLLER" + ] + }, + "COMPONENT1": { + "comp_attr": { + "name": "CPUCARD_FPGA", + "type": "fpga", + "description": "CPU card FPGA", + "boot_type": "none" + }, + "attr_list": [ + { + "attr_name": "version", + "get_cmd": "fpga read32 CPUCARD_FPGA 0x0 | sed 's/^0x//'" + }, + { + "attr_name": "model", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "serial", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "revision", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "update", + "cmd": "/var/platform/fwpackage/fwpackage/update_firmware.py {{model_name}} CPUCARD_FPGA {}" + } + ] + }, + "CPLDMUX0": { + "dev_info": { + "device_type": "CPLDMUX", + "device_name": "CPLDMUX0", + "device_parent": "MULTIFPGAPCIE0" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xf", + "dev_type": "multifpgapci_mux", + "dev_id": "0" + }, + "dev_attr": { + "base_chan": "0x10", + "num_chan": "5", + "cpld_name": "CPUCARD_FPGA" + }, + "channel": [ + { + "chan": "0", + "dev": [], + "cpld_offset": "0x18", + "cpld_sel": "0x0" + }, + { + "chan": "1", + "dev": [], + "cpld_offset": "0x18", + "cpld_sel": "0x1" + }, + { + "chan": "2", + "dev": [], + "cpld_offset": "0x18", + "cpld_sel": "0x2" + }, + { + "chan": "3", + "dev": [], + "cpld_offset": "0x18", + "cpld_sel": "0x3" + }, + { + "chan": "4", + "dev": [], + "cpld_offset": "0x18", + "cpld_sel": "0x4" + } + ] + } + }, + "MULTIFPGAPCIE1": { + "dev_info": { + "device_type": "MULTIFPGAPCIE", + "device_name": "SWITCHCARD_FPGA0", + "device_parent": "PCIE0", + "device_bdf": "{{switchcard_fpga_0_bdf}}", + "dev_attr": {} + }, + "dev_attr": { + "pwr_cycle_reg_offset": "0x4", + "pwr_cycle_enable_word": "0xdeadbeef" + }, + "i2c": { + "dev_attr": { + "virt_bus": "0x15", + "ch_base_offset": "0x40000", + "ch_size": "0x200", + "num_virt_ch": "0x44" + }, + "channel": [ + { + "chn": "0", + "dev": "CPLDMUX1" + }, + { + "chn": "3", + "dev": "PORT129" + }, + { + "chn": "4", + "dev": "PORT33" + }, + { + "chn": "5", + "dev": "PORT34" + }, + { + "chn": "6", + "dev": "PORT65" + }, + { + "chn": "7", + "dev": "PORT66" + }, + { + "chn": "8", + "dev": "PORT35" + }, + { + "chn": "9", + "dev": "PORT36" + }, + { + "chn": "10", + "dev": "PORT67" + }, + { + "chn": "11", + "dev": "PORT68" + }, + { + "chn": "12", + "dev": "PORT37" + }, + { + "chn": "13", + "dev": "PORT38" + }, + { + "chn": "14", + "dev": "PORT69" + }, + { + "chn": "15", + "dev": "PORT70" + }, + { + "chn": "16", + "dev": "PORT39" + }, + { + "chn": "17", + "dev": "PORT40" + }, + { + "chn": "18", + "dev": "PORT71" + }, + { + "chn": "19", + "dev": "PORT72" + }, + { + "chn": "20", + "dev": "PORT41" + }, + { + "chn": "21", + "dev": "PORT42" + }, + { + "chn": "22", + "dev": "PORT73" + }, + { + "chn": "23", + "dev": "PORT74" + }, + { + "chn": "24", + "dev": "PORT43" + }, + { + "chn": "25", + "dev": "PORT44" + }, + { + "chn": "26", + "dev": "PORT75" + }, + { + "chn": "27", + "dev": "PORT76" + }, + { + "chn": "28", + "dev": "PORT45" + }, + { + "chn": "29", + "dev": "PORT46" + }, + { + "chn": "30", + "dev": "PORT77" + }, + { + "chn": "31", + "dev": "PORT78" + }, + { + "chn": "32", + "dev": "PORT47" + }, + { + "chn": "33", + "dev": "PORT48" + }, + { + "chn": "34", + "dev": "PORT79" + }, + { + "chn": "35", + "dev": "PORT80" + }, + { + "chn": "36", + "dev": "PORT49" + }, + { + "chn": "37", + "dev": "PORT50" + }, + { + "chn": "38", + "dev": "PORT81" + }, + { + "chn": "39", + "dev": "PORT82" + }, + { + "chn": "40", + "dev": "PORT51" + }, + { + "chn": "41", + "dev": "PORT52" + }, + { + "chn": "42", + "dev": "PORT83" + }, + { + "chn": "43", + "dev": "PORT84" + }, + { + "chn": "44", + "dev": "PORT53" + }, + { + "chn": "45", + "dev": "PORT54" + }, + { + "chn": "46", + "dev": "PORT85" + }, + { + "chn": "47", + "dev": "PORT86" + }, + { + "chn": "48", + "dev": "PORT55" + }, + { + "chn": "49", + "dev": "PORT56" + }, + { + "chn": "50", + "dev": "PORT87" + }, + { + "chn": "51", + "dev": "PORT88" + }, + { + "chn": "52", + "dev": "PORT57" + }, + { + "chn": "53", + "dev": "PORT58" + }, + { + "chn": "54", + "dev": "PORT89" + }, + { + "chn": "55", + "dev": "PORT90" + }, + { + "chn": "56", + "dev": "PORT59" + }, + { + "chn": "57", + "dev": "PORT60" + }, + { + "chn": "58", + "dev": "PORT91" + }, + { + "chn": "59", + "dev": "PORT92" + }, + { + "chn": "60", + "dev": "PORT61" + }, + { + "chn": "61", + "dev": "PORT62" + }, + { + "chn": "62", + "dev": "PORT93" + }, + { + "chn": "63", + "dev": "PORT94" + }, + { + "chn": "64", + "dev": "PORT63" + }, + { + "chn": "65", + "dev": "PORT64" + }, + { + "chn": "66", + "dev": "PORT95" + }, + { + "chn": "67", + "dev": "PORT96" + } + ] + }, + "spi_controllers": [ + "SWITCHCARD_SPI_CONTROLLER0" + ] + }, + "COMPONENT2": { + "comp_attr": { + "name": "SWITCHCARD_FPGA0", + "type": "fpga", + "description": "Switchcard FPGA 0", + "boot_type": "none" + }, + "attr_list": [ + { + "attr_name": "version", + "get_cmd": "fpga read32 SWITCHCARD_FPGA0 0x0 | sed 's/^0x//'" + }, + { + "attr_name": "model", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "serial", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "revision", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "update", + "cmd": "/var/platform/fwpackage/fwpackage/update_firmware.py {{model_name}} SWITCHCARD_FPGA0 {}" + } + ] + }, + "CPLDMUX1": { + "dev_info": { + "device_type": "CPLDMUX", + "device_name": "CPLDMUX1", + "device_parent": "MULTIFPGAPCIE1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x15", + "dev_type": "multifpgapci_mux", + "dev_id": "1" + }, + "dev_attr": { + "base_chan": "0x59", + "num_chan": "4", + "cpld_name": "SWITCHCARD_FPGA0" + }, + "channel": [ + { + "chan": "0", + "dev": [ + "PSU1" + ], + "cpld_offset": "0x10", + "cpld_sel": "0x0" + }, + { + "chan": "1", + "dev": [ + "PSU2" + ], + "cpld_offset": "0x10", + "cpld_sel": "0x1" + }, + { + "chan": "2", + "dev": [ + "PSU3" + ], + "cpld_offset": "0x10", + "cpld_sel": "0x2" + }, + { + "chan": "3", + "dev": [ + "PSU4" + ], + "cpld_offset": "0x10", + "cpld_sel": "0x3" + } + ] + } + }, + "MULTIFPGAPCIE2": { + "dev_info": { + "device_type": "MULTIFPGAPCIE", + "device_name": "SWITCHCARD_FPGA1", + "device_parent": "PCIE0", + "device_bdf": "{{switchcard_fpga_1_bdf}}", + "dev_attr": {} + }, + "dev_attr": { + "pwr_cycle_reg_offset": "0x0", + "pwr_cycle_enable_word": "0xdeadbeef" + }, + "i2c": { + "dev_attr": { + "virt_bus": "0x5d", + "ch_base_offset": "0x40000", + "ch_size": "0x200", + "num_virt_ch": "0x4a" + }, + "channel": [ + { + "chn": "0", + "dev": "FAN-CTRL" + }, + { + "chn": "18", + "dev": "PORT1" + }, + { + "chn": "19", + "dev": "PORT2" + }, + { + "chn": "20", + "dev": "PORT3" + }, + { + "chn": "21", + "dev": "PORT4" + }, + { + "chn": "22", + "dev": "PORT5" + }, + { + "chn": "23", + "dev": "PORT6" + }, + { + "chn": "25", + "dev": "PORT7" + }, + { + "chn": "24", + "dev": "PORT8" + }, + { + "chn": "34", + "dev": "PORT9" + }, + { + "chn": "35", + "dev": "PORT10" + }, + { + "chn": "36", + "dev": "PORT11" + }, + { + "chn": "37", + "dev": "PORT12" + }, + { + "chn": "38", + "dev": "PORT13" + }, + { + "chn": "39", + "dev": "PORT14" + }, + { + "chn": "40", + "dev": "PORT15" + }, + { + "chn": "41", + "dev": "PORT16" + }, + { + "chn": "50", + "dev": "PORT17" + }, + { + "chn": "51", + "dev": "PORT18" + }, + { + "chn": "52", + "dev": "PORT19" + }, + { + "chn": "53", + "dev": "PORT20" + }, + { + "chn": "54", + "dev": "PORT21" + }, + { + "chn": "55", + "dev": "PORT22" + }, + { + "chn": "56", + "dev": "PORT23" + }, + { + "chn": "57", + "dev": "PORT24" + }, + { + "chn": "66", + "dev": "PORT25" + }, + { + "chn": "67", + "dev": "PORT26" + }, + { + "chn": "68", + "dev": "PORT27" + }, + { + "chn": "69", + "dev": "PORT28" + }, + { + "chn": "70", + "dev": "PORT29" + }, + { + "chn": "71", + "dev": "PORT30" + }, + { + "chn": "72", + "dev": "PORT31" + }, + { + "chn": "73", + "dev": "PORT32" + }, + { + "chn": "10", + "dev": "PORT97" + }, + { + "chn": "11", + "dev": "PORT98" + }, + { + "chn": "12", + "dev": "PORT99" + }, + { + "chn": "13", + "dev": "PORT100" + }, + { + "chn": "14", + "dev": "PORT101" + }, + { + "chn": "15", + "dev": "PORT102" + }, + { + "chn": "16", + "dev": "PORT103" + }, + { + "chn": "17", + "dev": "PORT104" + }, + { + "chn": "26", + "dev": "PORT105" + }, + { + "chn": "27", + "dev": "PORT106" + }, + { + "chn": "28", + "dev": "PORT107" + }, + { + "chn": "29", + "dev": "PORT108" + }, + { + "chn": "30", + "dev": "PORT109" + }, + { + "chn": "31", + "dev": "PORT110" + }, + { + "chn": "32", + "dev": "PORT111" + }, + { + "chn": "33", + "dev": "PORT112" + }, + { + "chn": "42", + "dev": "PORT113" + }, + { + "chn": "43", + "dev": "PORT114" + }, + { + "chn": "44", + "dev": "PORT115" + }, + { + "chn": "45", + "dev": "PORT116" + }, + { + "chn": "46", + "dev": "PORT117" + }, + { + "chn": "47", + "dev": "PORT118" + }, + { + "chn": "48", + "dev": "PORT119" + }, + { + "chn": "49", + "dev": "PORT120" + }, + { + "chn": "58", + "dev": "PORT121" + }, + { + "chn": "59", + "dev": "PORT122" + }, + { + "chn": "60", + "dev": "PORT123" + }, + { + "chn": "61", + "dev": "PORT124" + }, + { + "chn": "62", + "dev": "PORT125" + }, + { + "chn": "63", + "dev": "PORT126" + }, + { + "chn": "64", + "dev": "PORT127" + }, + { + "chn": "65", + "dev": "PORT128" + }, + { + "chn": "6", + "dev": "TMP464" + }, + { + "chn": "0", + "dev": "DCDC0" + }, + { + "chn": "4", + "dev": "DCDC1" + }, + { + "chn": "5", + "dev": "DCDC2" + }, + { + "chn": "4", + "dev": "DCDC3" + }, + { + "chn": "4", + "dev": "DCDC4" + }, + { + "chn": "5", + "dev": "DCDC5" + }, + { + "chn": "5", + "dev": "DCDC6" + }, + { + "chn": "4", + "dev": "DCDC7" + }, + { + "chn": "5", + "dev": "DCDC8" + }, + { + "chn": "4", + "dev": "DCDC9" + }, + { + "chn": "5", + "dev": "DCDC10" + }, + { + "chn": "7", + "dev": "DCDC11" + }, + { + "chn": "8", + "dev": "DCDC12" + } + ] + } + }, + "COMPONENT3": { + "comp_attr": { + "name": "SWITCHCARD_FPGA1", + "type": "fpga", + "description": "Switchcard FPGA 1", + "boot_type": "none" + }, + "attr_list": [ + { + "attr_name": "version", + "get_cmd": "fpga read32 SWITCHCARD_FPGA1 0x0 | sed 's/^0x//'" + }, + { + "attr_name": "model", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "serial", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "revision", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "update", + "cmd": "/var/platform/fwpackage/fwpackage/update_firmware.py {{model_name}} SWITCHCARD_FPGA1 {}" + } + ] + }, + "COMPONENT4": { + "comp_attr": { + "name": "BIOS", + "type": "bios", + "description": "CPU card BIOS", + "boot_type": "cold" + }, + "attr_list": [ + { + "attr_name": "version", + "get_cmd": "dmidecode -s bios-version" + }, + { + "attr_name": "model", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "serial", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "revision", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "update", + "cmd": "/var/platform/fwpackage/fwpackage/update_firmware.py {{model_name}} BIOS {}" + } + ] + }, + "COMPONENT5": { + "comp_attr": { + "name": "ONIE", + "type": "bios", + "description": "ONIE", + "boot_type": "cold" + }, + "attr_list": [ + { + "attr_name": "version", + "get_cmd": "awk -F = '/onie_version/ {print $2}' /host/machine.conf" + }, + { + "attr_name": "model", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "serial", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "revision", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "update", + "cmd": "/var/platform/fwpackage/fwpackage/update_firmware.py {{model_name}} ONIE {}" + } + ] + }, + "COMPONENT6": { + "comp_attr": { + "name": "TPM", + "type": "tpm", + "description": "TPM", + "boot_type": "cold" + }, + "attr_list": [ + { + "attr_name": "version", + "get_cmd": "dmidecode --type 43|awk '/Firmware Revision:/{print $3}'" + }, + { + "attr_name": "model", + "get_cmd": "tpm2_getcap properties-fixed | grep -A 2 'TPM2_PT_VENDOR_STRING_[12]' | awk '/value:/ { ORS=\"\"; gsub(\"\\\"\", \"\", $2); print $2 }'" + }, + { + "attr_name": "serial", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "revision", + "get_cmd": "tpm2_getcap properties-fixed | grep -A 2 TPM2_PT_REVISION | awk '/value:/ { print $2 }'" + }, + { + "attr_name": "update", + "cmd": "/var/platform/fwpackage/fwpackage/update_firmware.py {{model_name}} TPM {}" + } + ] + }, + "COMPONENT7": { + "comp_attr": { + "name": "NVMe", + "type": "storage", + "description": "NVMe storage", + "boot_type": "cold" + }, + "attr_list": [ + { + "attr_name": "version", + "get_cmd": "cat /sys/class/nvme/nvme0/firmware_rev" + }, + { + "attr_name": "model", + "get_cmd": "cat /sys/class/nvme/nvme0/model" + }, + { + "attr_name": "serial", + "get_cmd": "cat /sys/class/nvme/nvme0/serial" + }, + { + "attr_name": "revision", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "update", + "cmd": "/var/platform/fwpackage/fwpackage/update_firmware.py {{model_name}} NVMe {}" + } + ] + }, + "COMPONENT8": { + "comp_attr": { + "name": "ASIC_PCIE", + "type": "pci", + "description": "ASIC PCIe firmware", + "boot_type": "cold" + }, + "attr_list": [ + { + "attr_name": "version", + "get_cmd": "bcmcmd 'dsh -c \"pciephy fwinfo\"' | grep 'FW version' | awk -F': ' '{print $2}'" + }, + { + "attr_name": "model", + "get_cmd": "echo N/A" + }, + { + "attr_name": "serial", + "get_cmd": "echo N/A" + }, + { + "attr_name": "revision", + "get_cmd": "echo N/A" + }, + { + "attr_name": "update", + "cmd": "/var/platform/fwpackage/fwpackage/update_firmware.py {{model_name}} ASIC_PCIE {}" + } + ] + }, + "NEXTHOP-FPGA-ASIC-TEMP-SENSOR0": { + "dev_info": { + "device_type": "NEXTHOP_FPGA_ASIC_TEMP_SENSOR", + "device_name": "NEXTHOP-FPGA-ASIC-TEMP-SENSOR0", + "device_parent": "MULTIFPGAPCIE1", + "nexthop_thermal_pid_domain": null + }, + "dev_attr": { + "display_name": "ASIC Min", + "temp1_high_threshold": 105, + "temp1_high_crit_threshold": 112, + "fpga_min_rev": "0xe8020214", + "value_type": "th6", + "reg_addr": "0x24", + "field_range": "12:0" + } + }, + "NEXTHOP-FPGA-ASIC-TEMP-SENSOR1": { + "dev_info": { + "device_type": "NEXTHOP_FPGA_ASIC_TEMP_SENSOR", + "device_name": "NEXTHOP-FPGA-ASIC-TEMP-SENSOR1", + "device_parent": "MULTIFPGAPCIE1", + "nexthop_thermal_pid_domain": "asic", + "nexthop_thermal_setpoint_margin": 10 + }, + "dev_attr": { + "display_name": "ASIC Max", + "temp1_high_threshold": 105, + "temp1_high_crit_threshold": 112, + "fpga_min_rev": "0xe8020214", + "value_type": "th6", + "reg_addr": "0x24", + "field_range": "28:16" + } + }, + "EEPROM1": { + "dev_info": { + "device_type": "EEPROM", + "device_name": "EEPROM1", + "device_parent": "MULTIFPGAPCIE0" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xb", + "dev_addr": "0x50", + "dev_type": "24c64" + }, + "dev_attr": { + "access_mode": "BLOCK" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "MGMT-SWCH-EEPROM": { + "dev_info": { + "device_type": "EEPROM", + "device_name": "MGMT-SWCH-EEPROM", + "device_parent": "MULTIFPGAPCIE0" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xc", + "dev_addr": "0x50", + "dev_type": "24c512" + }, + "dev_attr": { + "access_mode": "BLOCK" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "FAN-CTRL": { + "dev_info": { + "device_type": "FAN", + "device_name": "FAN-CTRL", + "device_parent": "MULTIFPGAPCIE2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x5d", + "dev_addr": "0x8", + "dev_type": "fan_multifpgapci" + }, + "dev_attr": { + "num_fantrays": "8" + }, + "attr_list": [ + { + "attr_name": "fan1_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0xa4", + "attr_mask": "0x000000f0", + "attr_len": "4", + "attr_cmpval": "0x00000070" + }, + { + "attr_name": "fan1_direction", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0xa4", + "attr_mask": "0x000000f0", + "attr_len": "4", + "attr_cmpval": "0x00000070" + }, + { + "attr_name": "fan1_fault", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0xa4", + "attr_mask": "0x00000100", + "attr_len": "4", + "attr_cmpval": "0x00000000" + }, + { + "attr_name": "fan1_input", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0xb4", + "attr_mask": "0x0000ffff", + "attr_len": "4", + "attr_mult": "1913265", + "attr_is_divisor": "1" + }, + { + "attr_name": "fan1_pwm", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0xb0", + "attr_mask": "0x000000ff", + "attr_len": "4" + }, + { + "attr_name": "fan2_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0xa4", + "attr_mask": "0x000000f0", + "attr_len": "4", + "attr_cmpval": "0x00000070" + }, + { + "attr_name": "fan2_direction", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0xa4", + "attr_mask": "0x000000f0", + "attr_len": "4", + "attr_cmpval": "0x00000070" + }, + { + "attr_name": "fan2_fault", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0xa4", + "attr_mask": "0x00000100", + "attr_len": "4", + "attr_cmpval": "0x00000000" + }, + { + "attr_name": "fan2_input", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0xb4", + "attr_mask": "0xffff0000", + "attr_len": "4", + "attr_mult": "1913265", + "attr_is_divisor": "1" + }, + { + "attr_name": "fan2_pwm", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0xb0", + "attr_mask": "0x000000ff", + "attr_len": "4" + }, + { + "attr_name": "fan3_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0xa4", + "attr_mask": "0x00007800", + "attr_len": "4", + "attr_cmpval": "0x00003800" + }, + { + "attr_name": "fan3_direction", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0xa4", + "attr_mask": "0x00007800", + "attr_len": "4", + "attr_cmpval": "0x00003800" + }, + { + "attr_name": "fan3_fault", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0xa4", + "attr_mask": "0x00008000", + "attr_len": "4", + "attr_cmpval": "0x00000000" + }, + { + "attr_name": "fan3_input", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0xb8", + "attr_mask": "0x0000ffff", + "attr_len": "4", + "attr_mult": "1913265", + "attr_is_divisor": "1" + }, + { + "attr_name": "fan3_pwm", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0xb0", + "attr_mask": "0x0000ff00", + "attr_len": "4" + }, + { + "attr_name": "fan4_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0xa4", + "attr_mask": "0x00007800", + "attr_len": "4", + "attr_cmpval": "0x00003800" + }, + { + "attr_name": "fan4_direction", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0xa4", + "attr_mask": "0x00007800", + "attr_len": "4", + "attr_cmpval": "0x00003800" + }, + { + "attr_name": "fan4_fault", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0xa4", + "attr_mask": "0x00008000", + "attr_len": "4", + "attr_cmpval": "0x00000000" + }, + { + "attr_name": "fan4_input", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0xb8", + "attr_mask": "0xffff0000", + "attr_len": "4", + "attr_mult": "1913265", + "attr_is_divisor": "1" + }, + { + "attr_name": "fan4_pwm", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0xb0", + "attr_mask": "0x0000ff00", + "attr_len": "4" + }, + { + "attr_name": "fan5_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0xa4", + "attr_mask": "0x003c0000", + "attr_len": "4", + "attr_cmpval": "0x001c0000" + }, + { + "attr_name": "fan5_direction", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0xa4", + "attr_mask": "0x003c0000", + "attr_len": "4", + "attr_cmpval": "0x001c0000" + }, + { + "attr_name": "fan5_fault", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0xa4", + "attr_mask": "0x00400000", + "attr_len": "4", + "attr_cmpval": "0x00000000" + }, + { + "attr_name": "fan5_input", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0xbc", + "attr_mask": "0x0000ffff", + "attr_len": "4", + "attr_mult": "1913265", + "attr_is_divisor": "1" + }, + { + "attr_name": "fan5_pwm", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0xb0", + "attr_mask": "0x00ff0000", + "attr_len": "4" + }, + { + "attr_name": "fan6_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0xa4", + "attr_mask": "0x003c0000", + "attr_len": "4", + "attr_cmpval": "0x001c0000" + }, + { + "attr_name": "fan6_direction", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0xa4", + "attr_mask": "0x003c0000", + "attr_len": "4", + "attr_cmpval": "0x001c0000" + }, + { + "attr_name": "fan6_fault", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0xa4", + "attr_mask": "0x00400000", + "attr_len": "4", + "attr_cmpval": "0x00000000" + }, + { + "attr_name": "fan6_input", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0xbc", + "attr_mask": "0xffff0000", + "attr_len": "4", + "attr_mult": "1913265", + "attr_is_divisor": "1" + }, + { + "attr_name": "fan6_pwm", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0xb0", + "attr_mask": "0x00ff0000", + "attr_len": "4" + }, + { + "attr_name": "fan7_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0xa4", + "attr_mask": "0x1e000000", + "attr_len": "4", + "attr_cmpval": "0x0e000000" + }, + { + "attr_name": "fan7_direction", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0xa4", + "attr_mask": "0x1e000000", + "attr_len": "4", + "attr_cmpval": "0x0e000000" + }, + { + "attr_name": "fan7_fault", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0xa4", + "attr_mask": "0x20000000", + "attr_len": "4", + "attr_cmpval": "0x00000000" + }, + { + "attr_name": "fan7_input", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0xc0", + "attr_mask": "0x0000ffff", + "attr_len": "4", + "attr_mult": "1913265", + "attr_is_divisor": "1" + }, + { + "attr_name": "fan7_pwm", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0xb0", + "attr_mask": "0xff000000", + "attr_len": "4" + }, + { + "attr_name": "fan8_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0xa4", + "attr_mask": "0x1e000000", + "attr_len": "4", + "attr_cmpval": "0x0e000000" + }, + { + "attr_name": "fan8_direction", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0xa4", + "attr_mask": "0x1e000000", + "attr_len": "4", + "attr_cmpval": "0x0e000000" + }, + { + "attr_name": "fan8_fault", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0xa4", + "attr_mask": "0x20000000", + "attr_len": "4", + "attr_cmpval": "0x00000000" + }, + { + "attr_name": "fan8_input", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0xc0", + "attr_mask": "0xffff0000", + "attr_len": "4", + "attr_mult": "1913265", + "attr_is_divisor": "1" + }, + { + "attr_name": "fan8_pwm", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0xb0", + "attr_mask": "0xff000000", + "attr_len": "4" + }, + { + "attr_name": "fan9_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0xa8", + "attr_mask": "0x000000f0", + "attr_len": "4", + "attr_cmpval": "0x00000070" + }, + { + "attr_name": "fan9_direction", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0xa8", + "attr_mask": "0x000000f0", + "attr_len": "4", + "attr_cmpval": "0x00000070" + }, + { + "attr_name": "fan9_fault", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0xa8", + "attr_mask": "0x00000100", + "attr_len": "4", + "attr_cmpval": "0x00000000" + }, + { + "attr_name": "fan9_input", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0xc8", + "attr_mask": "0x0000ffff", + "attr_len": "4", + "attr_mult": "1913265", + "attr_is_divisor": "1" + }, + { + "attr_name": "fan9_pwm", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0xc4", + "attr_mask": "0x000000ff", + "attr_len": "4" + }, + { + "attr_name": "fan10_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0xa8", + "attr_mask": "0x000000f0", + "attr_len": "4", + "attr_cmpval": "0x00000070" + }, + { + "attr_name": "fan10_direction", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0xa8", + "attr_mask": "0x000000f0", + "attr_len": "4", + "attr_cmpval": "0x00000070" + }, + { + "attr_name": "fan10_fault", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0xa8", + "attr_mask": "0x00000100", + "attr_len": "4", + "attr_cmpval": "0x00000000" + }, + { + "attr_name": "fan10_input", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0xc8", + "attr_mask": "0xffff0000", + "attr_len": "4", + "attr_mult": "1913265", + "attr_is_divisor": "1" + }, + { + "attr_name": "fan10_pwm", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0xc4", + "attr_mask": "0x000000ff", + "attr_len": "4" + }, + { + "attr_name": "fan11_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0xa8", + "attr_mask": "0x00007800", + "attr_len": "4", + "attr_cmpval": "0x00003800" + }, + { + "attr_name": "fan11_direction", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0xa8", + "attr_mask": "0x00007800", + "attr_len": "4", + "attr_cmpval": "0x00003800" + }, + { + "attr_name": "fan11_fault", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0xa8", + "attr_mask": "0x00008000", + "attr_len": "4", + "attr_cmpval": "0x00000000" + }, + { + "attr_name": "fan11_input", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0xcc", + "attr_mask": "0x0000ffff", + "attr_len": "4", + "attr_mult": "1913265", + "attr_is_divisor": "1" + }, + { + "attr_name": "fan11_pwm", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0xc4", + "attr_mask": "0x0000ff00", + "attr_len": "4" + }, + { + "attr_name": "fan12_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0xa8", + "attr_mask": "0x00007800", + "attr_len": "4", + "attr_cmpval": "0x00003800" + }, + { + "attr_name": "fan12_direction", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0xa8", + "attr_mask": "0x00007800", + "attr_len": "4", + "attr_cmpval": "0x00003800" + }, + { + "attr_name": "fan12_fault", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0xa8", + "attr_mask": "0x00008000", + "attr_len": "4", + "attr_cmpval": "0x00000000" + }, + { + "attr_name": "fan12_input", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0xcc", + "attr_mask": "0xffff0000", + "attr_len": "4", + "attr_mult": "1913265", + "attr_is_divisor": "1" + }, + { + "attr_name": "fan12_pwm", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0xc4", + "attr_mask": "0x0000ff00", + "attr_len": "4" + }, + { + "attr_name": "fan13_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0xa8", + "attr_mask": "0x003c0000", + "attr_len": "4", + "attr_cmpval": "0x001c0000" + }, + { + "attr_name": "fan13_direction", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0xa8", + "attr_mask": "0x003c0000", + "attr_len": "4", + "attr_cmpval": "0x001c0000" + }, + { + "attr_name": "fan13_fault", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0xa8", + "attr_mask": "0x00400000", + "attr_len": "4", + "attr_cmpval": "0x00000000" + }, + { + "attr_name": "fan13_input", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0xd0", + "attr_mask": "0x0000ffff", + "attr_len": "4", + "attr_mult": "1913265", + "attr_is_divisor": "1" + }, + { + "attr_name": "fan13_pwm", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0xc4", + "attr_mask": "0x00ff0000", + "attr_len": "4" + }, + { + "attr_name": "fan14_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0xa8", + "attr_mask": "0x003c0000", + "attr_len": "4", + "attr_cmpval": "0x001c0000" + }, + { + "attr_name": "fan14_direction", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0xa8", + "attr_mask": "0x003c0000", + "attr_len": "4", + "attr_cmpval": "0x001c0000" + }, + { + "attr_name": "fan14_fault", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0xa8", + "attr_mask": "0x00400000", + "attr_len": "4", + "attr_cmpval": "0x00000000" + }, + { + "attr_name": "fan14_input", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0xd0", + "attr_mask": "0xffff0000", + "attr_len": "4", + "attr_mult": "1913265", + "attr_is_divisor": "1" + }, + { + "attr_name": "fan14_pwm", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0xc4", + "attr_mask": "0x00ff0000", + "attr_len": "4" + }, + { + "attr_name": "fan15_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0xa8", + "attr_mask": "0x1e000000", + "attr_len": "4", + "attr_cmpval": "0x0e000000" + }, + { + "attr_name": "fan15_direction", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0xa8", + "attr_mask": "0x1e000000", + "attr_len": "4", + "attr_cmpval": "0x0e000000" + }, + { + "attr_name": "fan15_fault", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0xa8", + "attr_mask": "0x20000000", + "attr_len": "4", + "attr_cmpval": "0x00000000" + }, + { + "attr_name": "fan15_input", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0xd4", + "attr_mask": "0x0000ffff", + "attr_len": "4", + "attr_mult": "1913265", + "attr_is_divisor": "1" + }, + { + "attr_name": "fan15_pwm", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0xc4", + "attr_mask": "0xff000000", + "attr_len": "4" + }, + { + "attr_name": "fan16_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0xa8", + "attr_mask": "0x1e000000", + "attr_len": "4", + "attr_cmpval": "0x0e000000" + }, + { + "attr_name": "fan16_direction", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0xa8", + "attr_mask": "0x1e000000", + "attr_len": "4", + "attr_cmpval": "0x0e000000" + }, + { + "attr_name": "fan16_fault", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0xa8", + "attr_mask": "0x20000000", + "attr_len": "4", + "attr_cmpval": "0x00000000" + }, + { + "attr_name": "fan16_input", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0xd4", + "attr_mask": "0xffff0000", + "attr_len": "4", + "attr_mult": "1913265", + "attr_is_divisor": "1" + }, + { + "attr_name": "fan16_pwm", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0xc4", + "attr_mask": "0xff000000", + "attr_len": "4" + } + ] + } + }, + "PSU1": { + "dev_info": { + "device_type": "PSU", + "device_name": "PSU1", + "device_parent": "CPLDMUX1" + }, + "dev_attr": { + "dev_idx": "1", + "num_psu_fans": "1", + "num_psu_thermals": "3" + }, + "i2c": { + "interface": [ + { + "itf": "pmbus", + "dev": "PSU1-PMBUS" + } + ] + } + }, + "PSU1-PMBUS": { + "dev_info": { + "device_type": "PSU-PMBUS", + "device_name": "PSU1-PMBUS", + "device_parent": "CPLDMUX1", + "virt_parent": "PSU1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x59", + "dev_addr": "0x58", + "dev_type": "psu_pmbus" + }, + "attr_list": [ + { + "attr_name": "psu_present", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "attr_offset": "0x2c", + "attr_mask": "0x200", + "attr_cmpval": "0x200", + "attr_len": "1" + }, + { + "attr_name": "psu_power_good", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "attr_offset": "0x2c", + "attr_mask": "0x800", + "attr_cmpval": "0x800", + "attr_len": "1" + }, + { + "attr_name": "psu_model_name", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x9a", + "attr_mask": "0x0", + "attr_cmpval": "0xff" + }, + { + "attr_name": "psu_serial_num", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x9e", + "attr_mask": "0x0", + "attr_cmpval": "0x00" + }, + { + "attr_name": "psu_mfr_id", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x99", + "attr_mask": "0x0", + "attr_cmpval": "0x00" + }, + { + "attr_name": "psu_fan_dir", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x9a", + "attr_mask": "0x0", + "attr_cmpval": "0xff" + }, + { + "attr_name": "psu_p_out", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x96", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_v_out", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x8b", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_data_format": "linear16", + "attr_len": "2" + }, + { + "attr_name": "psu_i_out", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x8c", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_p_in", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x97", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_v_in", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x88", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_i_in", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x89", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_fan1_speed_rpm", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x90", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_temp1_input", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x8d", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_temp1_high_threshold", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0xc0", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_temp2_input", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x8e", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_temp2_high_threshold", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0xc1", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_temp3_input", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x8f", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_temp3_high_threshold", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0xc2", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_v_out_max", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0xa5", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_data_format": "linear16", + "attr_len": "2" + }, + { + "attr_name": "psu_v_out_min", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0xa4", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_data_format": "linear16", + "attr_len": "2" + }, + { + "attr_name": "psu_p_out_max", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0xa7", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + } + ] + } + }, + "COMPONENT9": { + "comp_attr": { + "name": "PSU1", + "type": "psu", + "description": "Power Supply Unit 1", + "boot_type": "none" + }, + "attr_list": [ + { + "attr_name": "version", + "get_cmd": "N/A" + }, + { + "attr_name": "model", + "get_cmd": "cat /sys/bus/i2c/devices/89-0058/psu_model_name" + }, + { + "attr_name": "serial", + "get_cmd": "cat /sys/bus/i2c/devices/89-0058/psu_serial_num" + }, + { + "attr_name": "revision", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "update", + "get_cmd": "echo 'N/A'" + } + ] + }, + "PSU2": { + "dev_info": { + "device_type": "PSU", + "device_name": "PSU2", + "device_parent": "CPLDMUX1" + }, + "dev_attr": { + "dev_idx": "2", + "num_psu_fans": "1", + "num_psu_thermals": "3" + }, + "i2c": { + "interface": [ + { + "itf": "pmbus", + "dev": "PSU2-PMBUS" + } + ] + } + }, + "PSU2-PMBUS": { + "dev_info": { + "device_type": "PSU-PMBUS", + "device_name": "PSU2-PMBUS", + "device_parent": "CPLDMUX1", + "virt_parent": "PSU2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x5a", + "dev_addr": "0x58", + "dev_type": "psu_pmbus" + }, + "attr_list": [ + { + "attr_name": "psu_present", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "attr_offset": "0x2c", + "attr_mask": "0x2000", + "attr_cmpval": "0x2000", + "attr_len": "1" + }, + { + "attr_name": "psu_power_good", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "attr_offset": "0x2c", + "attr_mask": "0x8000", + "attr_cmpval": "0x8000", + "attr_len": "1" + }, + { + "attr_name": "psu_model_name", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x9a", + "attr_mask": "0x0", + "attr_cmpval": "0xff" + }, + { + "attr_name": "psu_serial_num", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x9e", + "attr_mask": "0x0", + "attr_cmpval": "0x00" + }, + { + "attr_name": "psu_mfr_id", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x99", + "attr_mask": "0x0", + "attr_cmpval": "0x00" + }, + { + "attr_name": "psu_fan_dir", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x9a", + "attr_mask": "0x0", + "attr_cmpval": "0xff" + }, + { + "attr_name": "psu_p_out", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x96", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_v_out", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x8b", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_data_format": "linear16", + "attr_len": "2" + }, + { + "attr_name": "psu_i_out", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x8c", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_p_in", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x97", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_v_in", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x88", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_i_in", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x89", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_fan1_speed_rpm", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x90", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_temp1_input", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x8d", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_temp1_high_threshold", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0xc0", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_temp2_input", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x8e", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_temp2_high_threshold", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0xc1", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_temp3_input", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x8f", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_temp3_high_threshold", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0xc2", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_v_out_max", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0xa5", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_data_format": "linear16", + "attr_len": "2" + }, + { + "attr_name": "psu_v_out_min", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0xa4", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_data_format": "linear16", + "attr_len": "2" + }, + { + "attr_name": "psu_p_out_max", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0xa7", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + } + ] + } + }, + "COMPONENT10": { + "comp_attr": { + "name": "PSU2", + "type": "psu", + "description": "Power Supply Unit 2", + "boot_type": "none" + }, + "attr_list": [ + { + "attr_name": "version", + "get_cmd": "N/A" + }, + { + "attr_name": "model", + "get_cmd": "cat /sys/bus/i2c/devices/90-0058/psu_model_name" + }, + { + "attr_name": "serial", + "get_cmd": "cat /sys/bus/i2c/devices/90-0058/psu_serial_num" + }, + { + "attr_name": "revision", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "update", + "get_cmd": "echo 'N/A'" + } + ] + }, + "PSU3": { + "dev_info": { + "device_type": "PSU", + "device_name": "PSU3", + "device_parent": "CPLDMUX1" + }, + "dev_attr": { + "dev_idx": "3", + "num_psu_fans": "1", + "num_psu_thermals": "3" + }, + "i2c": { + "interface": [ + { + "itf": "pmbus", + "dev": "PSU3-PMBUS" + } + ] + } + }, + "PSU3-PMBUS": { + "dev_info": { + "device_type": "PSU-PMBUS", + "device_name": "PSU3-PMBUS", + "device_parent": "CPLDMUX1", + "virt_parent": "PSU3" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x5b", + "dev_addr": "0x58", + "dev_type": "psu_pmbus" + }, + "attr_list": [ + { + "attr_name": "psu_present", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "attr_offset": "0x2c", + "attr_mask": "0x2", + "attr_cmpval": "0x2", + "attr_len": "1" + }, + { + "attr_name": "psu_power_good", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "attr_offset": "0x2c", + "attr_mask": "0x8", + "attr_cmpval": "0x8", + "attr_len": "1" + }, + { + "attr_name": "psu_model_name", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x9a", + "attr_mask": "0x0", + "attr_cmpval": "0xff" + }, + { + "attr_name": "psu_serial_num", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x9e", + "attr_mask": "0x0", + "attr_cmpval": "0x00" + }, + { + "attr_name": "psu_mfr_id", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x99", + "attr_mask": "0x0", + "attr_cmpval": "0x00" + }, + { + "attr_name": "psu_fan_dir", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x9a", + "attr_mask": "0x0", + "attr_cmpval": "0xff" + }, + { + "attr_name": "psu_p_out", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x96", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_v_out", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x8b", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_data_format": "linear16", + "attr_len": "2" + }, + { + "attr_name": "psu_i_out", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x8c", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_p_in", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x97", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_v_in", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x88", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_i_in", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x89", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_fan1_speed_rpm", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x90", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_temp1_input", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x8d", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_temp1_high_threshold", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0xc0", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_temp2_input", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x8e", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_temp2_high_threshold", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0xc1", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_temp3_input", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x8f", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_temp3_high_threshold", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0xc2", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_v_out_max", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0xa5", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_data_format": "linear16", + "attr_len": "2" + }, + { + "attr_name": "psu_v_out_min", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0xa4", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_data_format": "linear16", + "attr_len": "2" + }, + { + "attr_name": "psu_p_out_max", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0xa7", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + } + ] + } + }, + "COMPONENT11": { + "comp_attr": { + "name": "PSU3", + "type": "psu", + "description": "Power Supply Unit 3", + "boot_type": "none" + }, + "attr_list": [ + { + "attr_name": "version", + "get_cmd": "N/A" + }, + { + "attr_name": "model", + "get_cmd": "cat /sys/bus/i2c/devices/91-0058/psu_model_name" + }, + { + "attr_name": "serial", + "get_cmd": "cat /sys/bus/i2c/devices/91-0058/psu_serial_num" + }, + { + "attr_name": "revision", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "update", + "get_cmd": "echo 'N/A'" + } + ] + }, + "PSU4": { + "dev_info": { + "device_type": "PSU", + "device_name": "PSU4", + "device_parent": "CPLDMUX1" + }, + "dev_attr": { + "dev_idx": "4", + "num_psu_fans": "1", + "num_psu_thermals": "3" + }, + "i2c": { + "interface": [ + { + "itf": "pmbus", + "dev": "PSU4-PMBUS" + } + ] + } + }, + "PSU4-PMBUS": { + "dev_info": { + "device_type": "PSU-PMBUS", + "device_name": "PSU4-PMBUS", + "device_parent": "CPLDMUX1", + "virt_parent": "PSU4" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x5c", + "dev_addr": "0x58", + "dev_type": "psu_pmbus" + }, + "attr_list": [ + { + "attr_name": "psu_present", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "attr_offset": "0x2c", + "attr_mask": "0x20", + "attr_cmpval": "0x20", + "attr_len": "1" + }, + { + "attr_name": "psu_power_good", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "attr_offset": "0x2c", + "attr_mask": "0x80", + "attr_cmpval": "0x80", + "attr_len": "1" + }, + { + "attr_name": "psu_model_name", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x9a", + "attr_mask": "0x0", + "attr_cmpval": "0xff" + }, + { + "attr_name": "psu_serial_num", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x9e", + "attr_mask": "0x0", + "attr_cmpval": "0x00" + }, + { + "attr_name": "psu_mfr_id", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x99", + "attr_mask": "0x0", + "attr_cmpval": "0x00" + }, + { + "attr_name": "psu_fan_dir", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x9a", + "attr_mask": "0x0", + "attr_cmpval": "0xff" + }, + { + "attr_name": "psu_p_out", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x96", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_v_out", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x8b", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_data_format": "linear16", + "attr_len": "2" + }, + { + "attr_name": "psu_i_out", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x8c", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_p_in", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x97", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_v_in", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x88", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_i_in", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x89", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_fan1_speed_rpm", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x90", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_temp1_input", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x8d", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_temp1_high_threshold", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0xc0", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_temp2_input", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x8e", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_temp2_high_threshold", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0xc1", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_temp3_input", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0x8f", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_temp3_high_threshold", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0xc2", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + }, + { + "attr_name": "psu_v_out_max", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0xa5", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_data_format": "linear16", + "attr_len": "2" + }, + { + "attr_name": "psu_v_out_min", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0xa4", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_data_format": "linear16", + "attr_len": "2" + }, + { + "attr_name": "psu_p_out_max", + "attr_devaddr": "0x58", + "attr_devtype": "pmbus", + "attr_offset": "0xa7", + "attr_mask": "0x0", + "attr_cmpval": "0xff", + "attr_len": "2" + } + ] + } + }, + "COMPONENT12": { + "comp_attr": { + "name": "PSU4", + "type": "psu", + "description": "Power Supply Unit 4", + "boot_type": "none" + }, + "attr_list": [ + { + "attr_name": "version", + "get_cmd": "N/A" + }, + { + "attr_name": "model", + "get_cmd": "cat /sys/bus/i2c/devices/92-0058/psu_model_name" + }, + { + "attr_name": "serial", + "get_cmd": "cat /sys/bus/i2c/devices/92-0058/psu_serial_num" + }, + { + "attr_name": "revision", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "update", + "get_cmd": "echo 'N/A'" + } + ] + }, + "PORT129": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT129", + "device_parent": "MULTIFPGAPCIE1" + }, + "dev_attr": { + "dev_idx": "129" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT129-EEPROM" + }, + { + "itf": "control", + "dev": "PORT129-CTRL" + } + ] + } + }, + "PORT129-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT129-EEPROM", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT129" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x18", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT129-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT129-CTRL", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT129" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x18", + "dev_addr": "0x8", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "attr_offset": "0x8c", + "attr_mask": "0x0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "attr_offset": "0x88", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "attr_offset": "0x88", + "attr_mask": "0x2", + "attr_cmpval": "0x4", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "attr_offset": "0x88", + "attr_mask": "0x5", + "attr_cmpval": "0x0", + "attr_len": "1" + } + ] + } + }, + "PORT1": { + "dev_info": { + "device_type": "OSFP", + "device_name": "PORT1", + "device_parent": "MULTIFPGAPCIE2" + }, + "dev_attr": { + "dev_idx": "1" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT1-EEPROM" + }, + { + "itf": "control", + "dev": "PORT1-CTRL" + } + ] + } + }, + "PORT1-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT1-EEPROM", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x6f", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT1-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT1-CTRL", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "PORT1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x6f", + "dev_addr": "0x8", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x6c", + "attr_mask": "0x0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x70", + "attr_mask": "0x0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x74", + "attr_mask": "0x0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x78", + "attr_mask": "0x0", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT2": { + "dev_info": { + "device_type": "OSFP", + "device_name": "PORT2", + "device_parent": "MULTIFPGAPCIE2" + }, + "dev_attr": { + "dev_idx": "2" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT2-EEPROM" + }, + { + "itf": "control", + "dev": "PORT2-CTRL" + } + ] + } + }, + "PORT2-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT2-EEPROM", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x70", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT2-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT2-CTRL", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "PORT2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x70", + "dev_addr": "0x8", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x6c", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x70", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x74", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x78", + "attr_mask": "0x1", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT3": { + "dev_info": { + "device_type": "OSFP", + "device_name": "PORT3", + "device_parent": "MULTIFPGAPCIE2" + }, + "dev_attr": { + "dev_idx": "3" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT3-EEPROM" + }, + { + "itf": "control", + "dev": "PORT3-CTRL" + } + ] + } + }, + "PORT3-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT3-EEPROM", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT3" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x71", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT3-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT3-CTRL", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "PORT3" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x71", + "dev_addr": "0x8", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x6c", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x70", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x74", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x78", + "attr_mask": "0x2", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT4": { + "dev_info": { + "device_type": "OSFP", + "device_name": "PORT4", + "device_parent": "MULTIFPGAPCIE2" + }, + "dev_attr": { + "dev_idx": "4" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT4-EEPROM" + }, + { + "itf": "control", + "dev": "PORT4-CTRL" + } + ] + } + }, + "PORT4-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT4-EEPROM", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT4" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x72", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT4-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT4-CTRL", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "PORT4" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x72", + "dev_addr": "0x8", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x6c", + "attr_mask": "0x3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x70", + "attr_mask": "0x3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x74", + "attr_mask": "0x3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x78", + "attr_mask": "0x3", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT5": { + "dev_info": { + "device_type": "OSFP", + "device_name": "PORT5", + "device_parent": "MULTIFPGAPCIE2" + }, + "dev_attr": { + "dev_idx": "5" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT5-EEPROM" + }, + { + "itf": "control", + "dev": "PORT5-CTRL" + } + ] + } + }, + "PORT5-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT5-EEPROM", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT5" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x73", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT5-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT5-CTRL", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "PORT5" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x73", + "dev_addr": "0x8", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x6c", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x70", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x74", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x78", + "attr_mask": "0x4", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT6": { + "dev_info": { + "device_type": "OSFP", + "device_name": "PORT6", + "device_parent": "MULTIFPGAPCIE2" + }, + "dev_attr": { + "dev_idx": "6" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT6-EEPROM" + }, + { + "itf": "control", + "dev": "PORT6-CTRL" + } + ] + } + }, + "PORT6-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT6-EEPROM", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT6" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x74", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT6-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT6-CTRL", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "PORT6" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x74", + "dev_addr": "0x8", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x6c", + "attr_mask": "0x5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x70", + "attr_mask": "0x5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x74", + "attr_mask": "0x5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x78", + "attr_mask": "0x5", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT7": { + "dev_info": { + "device_type": "OSFP", + "device_name": "PORT7", + "device_parent": "MULTIFPGAPCIE2" + }, + "dev_attr": { + "dev_idx": "7" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT7-EEPROM" + }, + { + "itf": "control", + "dev": "PORT7-CTRL" + } + ] + } + }, + "PORT7-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT7-EEPROM", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT7" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x76", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT7-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT7-CTRL", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "PORT7" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x76", + "dev_addr": "0x8", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x6c", + "attr_mask": "0x6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x70", + "attr_mask": "0x6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x74", + "attr_mask": "0x6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x78", + "attr_mask": "0x6", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT8": { + "dev_info": { + "device_type": "OSFP", + "device_name": "PORT8", + "device_parent": "MULTIFPGAPCIE2" + }, + "dev_attr": { + "dev_idx": "8" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT8-EEPROM" + }, + { + "itf": "control", + "dev": "PORT8-CTRL" + } + ] + } + }, + "PORT8-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT8-EEPROM", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT8" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x75", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT8-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT8-CTRL", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "PORT8" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x75", + "dev_addr": "0x8", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x6c", + "attr_mask": "0x7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x70", + "attr_mask": "0x7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x74", + "attr_mask": "0x7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x78", + "attr_mask": "0x7", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT9": { + "dev_info": { + "device_type": "OSFP", + "device_name": "PORT9", + "device_parent": "MULTIFPGAPCIE2" + }, + "dev_attr": { + "dev_idx": "9" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT9-EEPROM" + }, + { + "itf": "control", + "dev": "PORT9-CTRL" + } + ] + } + }, + "PORT9-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT9-EEPROM", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT9" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x7f", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT9-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT9-CTRL", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "PORT9" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x7f", + "dev_addr": "0x8", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x6c", + "attr_mask": "0x8", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x70", + "attr_mask": "0x8", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x74", + "attr_mask": "0x8", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x78", + "attr_mask": "0x8", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT10": { + "dev_info": { + "device_type": "OSFP", + "device_name": "PORT10", + "device_parent": "MULTIFPGAPCIE2" + }, + "dev_attr": { + "dev_idx": "10" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT10-EEPROM" + }, + { + "itf": "control", + "dev": "PORT10-CTRL" + } + ] + } + }, + "PORT10-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT10-EEPROM", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT10" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x80", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT10-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT10-CTRL", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "PORT10" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x80", + "dev_addr": "0x8", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x6c", + "attr_mask": "0x9", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x70", + "attr_mask": "0x9", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x74", + "attr_mask": "0x9", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x78", + "attr_mask": "0x9", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT11": { + "dev_info": { + "device_type": "OSFP", + "device_name": "PORT11", + "device_parent": "MULTIFPGAPCIE2" + }, + "dev_attr": { + "dev_idx": "11" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT11-EEPROM" + }, + { + "itf": "control", + "dev": "PORT11-CTRL" + } + ] + } + }, + "PORT11-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT11-EEPROM", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT11" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x81", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT11-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT11-CTRL", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "PORT11" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x81", + "dev_addr": "0x8", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x6c", + "attr_mask": "0xa", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x70", + "attr_mask": "0xa", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x74", + "attr_mask": "0xa", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x78", + "attr_mask": "0xa", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT12": { + "dev_info": { + "device_type": "OSFP", + "device_name": "PORT12", + "device_parent": "MULTIFPGAPCIE2" + }, + "dev_attr": { + "dev_idx": "12" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT12-EEPROM" + }, + { + "itf": "control", + "dev": "PORT12-CTRL" + } + ] + } + }, + "PORT12-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT12-EEPROM", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT12" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x82", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT12-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT12-CTRL", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "PORT12" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x82", + "dev_addr": "0x8", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x6c", + "attr_mask": "0xb", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x70", + "attr_mask": "0xb", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x74", + "attr_mask": "0xb", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x78", + "attr_mask": "0xb", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT13": { + "dev_info": { + "device_type": "OSFP", + "device_name": "PORT13", + "device_parent": "MULTIFPGAPCIE2" + }, + "dev_attr": { + "dev_idx": "13" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT13-EEPROM" + }, + { + "itf": "control", + "dev": "PORT13-CTRL" + } + ] + } + }, + "PORT13-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT13-EEPROM", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT13" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x83", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT13-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT13-CTRL", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "PORT13" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x83", + "dev_addr": "0x8", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x6c", + "attr_mask": "0xc", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x70", + "attr_mask": "0xc", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x74", + "attr_mask": "0xc", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x78", + "attr_mask": "0xc", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT14": { + "dev_info": { + "device_type": "OSFP", + "device_name": "PORT14", + "device_parent": "MULTIFPGAPCIE2" + }, + "dev_attr": { + "dev_idx": "14" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT14-EEPROM" + }, + { + "itf": "control", + "dev": "PORT14-CTRL" + } + ] + } + }, + "PORT14-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT14-EEPROM", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT14" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x84", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT14-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT14-CTRL", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "PORT14" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x84", + "dev_addr": "0x8", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x6c", + "attr_mask": "0xd", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x70", + "attr_mask": "0xd", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x74", + "attr_mask": "0xd", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x78", + "attr_mask": "0xd", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT15": { + "dev_info": { + "device_type": "OSFP", + "device_name": "PORT15", + "device_parent": "MULTIFPGAPCIE2" + }, + "dev_attr": { + "dev_idx": "15" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT15-EEPROM" + }, + { + "itf": "control", + "dev": "PORT15-CTRL" + } + ] + } + }, + "PORT15-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT15-EEPROM", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT15" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x85", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT15-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT15-CTRL", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "PORT15" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x85", + "dev_addr": "0x8", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x6c", + "attr_mask": "0xe", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x70", + "attr_mask": "0xe", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x74", + "attr_mask": "0xe", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x78", + "attr_mask": "0xe", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT16": { + "dev_info": { + "device_type": "OSFP", + "device_name": "PORT16", + "device_parent": "MULTIFPGAPCIE2" + }, + "dev_attr": { + "dev_idx": "16" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT16-EEPROM" + }, + { + "itf": "control", + "dev": "PORT16-CTRL" + } + ] + } + }, + "PORT16-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT16-EEPROM", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT16" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x86", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT16-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT16-CTRL", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "PORT16" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x86", + "dev_addr": "0x8", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x6c", + "attr_mask": "0xf", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x70", + "attr_mask": "0xf", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x74", + "attr_mask": "0xf", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x78", + "attr_mask": "0xf", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT17": { + "dev_info": { + "device_type": "OSFP", + "device_name": "PORT17", + "device_parent": "MULTIFPGAPCIE2" + }, + "dev_attr": { + "dev_idx": "17" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT17-EEPROM" + }, + { + "itf": "control", + "dev": "PORT17-CTRL" + } + ] + } + }, + "PORT17-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT17-EEPROM", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT17" + }, + "i2c": { + "topo_info": { + "parent_bus": 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"device_type": "", + "device_name": "PORT18-CTRL", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "PORT18" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x90", + "dev_addr": "0x8", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x6c", + "attr_mask": "0x11", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x70", + "attr_mask": "0x11", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x74", + "attr_mask": "0x11", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x0", + "attr_devtype": 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+ "dev_addr": "0x8", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x6c", + "attr_mask": "0x12", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x70", + "attr_mask": "0x12", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x74", + "attr_mask": "0x12", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x78", + "attr_mask": "0x12", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + 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"attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x6c", + "attr_mask": "0x13", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x70", + "attr_mask": "0x13", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x74", + "attr_mask": "0x13", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x78", + "attr_mask": "0x13", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT21": { + "dev_info": { + "device_type": "OSFP", + "device_name": "PORT21", + "device_parent": "MULTIFPGAPCIE2" + }, + "dev_attr": { + "dev_idx": "21" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT21-EEPROM" + }, + { + "itf": "control", + "dev": "PORT21-CTRL" + } + ] + } + }, + "PORT21-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT21-EEPROM", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT21" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x93", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT21-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT21-CTRL", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "PORT21" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x93", + "dev_addr": "0x8", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x6c", + "attr_mask": "0x14", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x70", + "attr_mask": "0x14", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x74", + "attr_mask": "0x14", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x78", + "attr_mask": "0x14", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT22": { + "dev_info": { + "device_type": "OSFP", + "device_name": "PORT22", + "device_parent": "MULTIFPGAPCIE2" + }, + "dev_attr": { + "dev_idx": "22" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT22-EEPROM" + }, + { + "itf": "control", + "dev": "PORT22-CTRL" + } + ] + } + }, + "PORT22-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT22-EEPROM", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT22" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x94", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT22-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT22-CTRL", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "PORT22" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x94", + "dev_addr": "0x8", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x6c", + "attr_mask": "0x15", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x70", + "attr_mask": "0x15", + "attr_cmpval": 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"parent_bus": "0x95", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT23-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT23-CTRL", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "PORT23" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x95", + "dev_addr": "0x8", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x6c", + "attr_mask": "0x16", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x70", + "attr_mask": "0x16", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x74", + "attr_mask": "0x16", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x78", + "attr_mask": "0x16", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT24": { + "dev_info": { + "device_type": "OSFP", + "device_name": "PORT24", + "device_parent": "MULTIFPGAPCIE2" + }, + "dev_attr": { + "dev_idx": "24" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT24-EEPROM" + }, + { + "itf": "control", + "dev": "PORT24-CTRL" + } + ] + } + }, + "PORT24-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT24-EEPROM", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT24" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x96", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT24-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT24-CTRL", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "PORT24" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x96", + "dev_addr": "0x8", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x6c", + "attr_mask": "0x17", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x70", + "attr_mask": "0x17", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x74", + "attr_mask": "0x17", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x78", + "attr_mask": "0x17", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT25": { + "dev_info": { + "device_type": "OSFP", + "device_name": "PORT25", + "device_parent": "MULTIFPGAPCIE2" + }, + "dev_attr": { + "dev_idx": "25" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT25-EEPROM" + }, + { + "itf": "control", + "dev": "PORT25-CTRL" + } + ] + } + }, + "PORT25-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT25-EEPROM", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT25" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x9f", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT25-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT25-CTRL", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "PORT25" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x9f", + "dev_addr": "0x8", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x6c", + "attr_mask": "0x18", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x70", + "attr_mask": "0x18", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x74", + "attr_mask": "0x18", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x78", + "attr_mask": "0x18", + "attr_cmpval": "0x1", + "attr_len": "1" + } + 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"xcvr_lpmode", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x70", + "attr_mask": "0x1a", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x74", + "attr_mask": "0x1a", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x78", + "attr_mask": "0x1a", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT28": { + "dev_info": { + "device_type": "OSFP", + "device_name": "PORT28", + "device_parent": "MULTIFPGAPCIE2" + }, + "dev_attr": { + "dev_idx": "28" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT28-EEPROM" + }, + { + "itf": "control", + "dev": "PORT28-CTRL" + } + ] + } + }, + "PORT28-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT28-EEPROM", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT28" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xa2", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT28-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT28-CTRL", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "PORT28" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xa2", + "dev_addr": "0x8", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x6c", + "attr_mask": "0x1b", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x70", + "attr_mask": "0x1b", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x74", + "attr_mask": "0x1b", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x78", + "attr_mask": "0x1b", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT29": { + "dev_info": { + "device_type": "OSFP", + "device_name": "PORT29", + "device_parent": "MULTIFPGAPCIE2" + }, + "dev_attr": { + "dev_idx": "29" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT29-EEPROM" + }, + { + "itf": "control", + "dev": "PORT29-CTRL" + } + ] + } + }, + "PORT29-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT29-EEPROM", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT29" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xa3", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT29-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT29-CTRL", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "PORT29" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xa3", + "dev_addr": "0x8", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x6c", + "attr_mask": "0x1c", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x70", + "attr_mask": "0x1c", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": 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"attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x78", + "attr_mask": "0x1d", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT31": { + "dev_info": { + "device_type": "OSFP", + "device_name": "PORT31", + "device_parent": "MULTIFPGAPCIE2" + }, + "dev_attr": { + "dev_idx": "31" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT31-EEPROM" + }, + { + "itf": "control", + "dev": "PORT31-CTRL" + } + ] + } + }, + "PORT31-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT31-EEPROM", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT31" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xa5", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT31-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT31-CTRL", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "PORT31" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xa5", + "dev_addr": "0x8", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x6c", + "attr_mask": "0x1e", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x70", + "attr_mask": "0x1e", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x74", + "attr_mask": "0x1e", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x78", + "attr_mask": "0x1e", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT32": { + "dev_info": { + "device_type": "OSFP", + "device_name": "PORT32", + "device_parent": "MULTIFPGAPCIE2" + }, + "dev_attr": { + "dev_idx": "32" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT32-EEPROM" + }, + { + "itf": "control", + "dev": "PORT32-CTRL" + } + ] + } + }, + "PORT32-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT32-EEPROM", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT32" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xa6", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT32-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT32-CTRL", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "PORT32" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xa6", + "dev_addr": "0x8", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x6c", + "attr_mask": "0x1f", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x70", + "attr_mask": "0x1f", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x74", + "attr_mask": "0x1f", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x78", + "attr_mask": "0x1f", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT33": { + "dev_info": { + "device_type": "OSFP", + "device_name": "PORT33", + "device_parent": "MULTIFPGAPCIE1" + }, + "dev_attr": { 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"attr_name": "xcvr_lpmode", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x34", + "attr_mask": "0x0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x38", + "attr_mask": "0x0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x3c", + "attr_mask": "0x0", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT34": { + "dev_info": { + "device_type": "OSFP", + "device_name": "PORT34", + "device_parent": "MULTIFPGAPCIE1" + }, + "dev_attr": { + "dev_idx": "34" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT34-EEPROM" + }, + { + "itf": "control", + "dev": "PORT34-CTRL" + } + ] + } + }, + "PORT34-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT34-EEPROM", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT34" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1a", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT34-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT34-CTRL", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT34" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1a", + "dev_addr": "0x8", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x30", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x34", + "attr_mask": "0x1", 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"topo_info": { + "parent_bus": "0x1b", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT65-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT65-CTRL", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT65" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1b", + "dev_addr": "0x8", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x30", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x34", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": 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"attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x3c", + "attr_mask": "0x3", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT35": { + "dev_info": { + "device_type": "OSFP", + "device_name": "PORT35", + "device_parent": "MULTIFPGAPCIE1" + }, + "dev_attr": { + "dev_idx": "35" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT35-EEPROM" + }, + { + "itf": "control", + "dev": "PORT35-CTRL" + } + ] + } + }, + "PORT35-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT35-EEPROM", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT35" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1d", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT35-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT35-CTRL", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT35" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1d", + "dev_addr": "0x8", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x30", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x34", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x38", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x3c", + "attr_mask": "0x4", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT36": { + "dev_info": { + "device_type": "OSFP", + "device_name": "PORT36", + "device_parent": "MULTIFPGAPCIE1" + }, + "dev_attr": { + "dev_idx": "36" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT36-EEPROM" + }, + { + "itf": "control", + "dev": "PORT36-CTRL" + } + ] + } + }, + "PORT36-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT36-EEPROM", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT36" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1e", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT36-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT36-CTRL", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT36" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1e", + "dev_addr": "0x8", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x30", + "attr_mask": "0x5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x34", + "attr_mask": "0x5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x38", + "attr_mask": "0x5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x3c", + "attr_mask": "0x5", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT67": { + "dev_info": { + "device_type": "OSFP", + "device_name": "PORT67", + "device_parent": "MULTIFPGAPCIE1" + }, + "dev_attr": { + "dev_idx": "67" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT67-EEPROM" + }, + { + "itf": "control", + "dev": "PORT67-CTRL" + } + ] + } + }, + "PORT67-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT67-EEPROM", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT67" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1f", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT67-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT67-CTRL", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT67" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1f", + "dev_addr": "0x8", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x30", + "attr_mask": "0x6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x34", + "attr_mask": "0x6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x38", + "attr_mask": "0x6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x3c", + "attr_mask": "0x6", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT68": { + "dev_info": { + "device_type": "OSFP", + "device_name": "PORT68", + "device_parent": "MULTIFPGAPCIE1" + }, + "dev_attr": { + "dev_idx": "68" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT68-EEPROM" + }, + { + "itf": "control", + "dev": "PORT68-CTRL" + } + ] + } + }, + "PORT68-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT68-EEPROM", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT68" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x20", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT68-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT68-CTRL", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT68" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x20", + "dev_addr": "0x8", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x30", + "attr_mask": "0x7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x34", + "attr_mask": "0x7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x38", + "attr_mask": "0x7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x3c", + "attr_mask": "0x7", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT37": { + "dev_info": { + "device_type": "OSFP", + "device_name": "PORT37", + "device_parent": "MULTIFPGAPCIE1" + }, + "dev_attr": { + "dev_idx": "37" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT37-EEPROM" + }, + { + "itf": "control", + "dev": "PORT37-CTRL" + } + ] + } + }, + "PORT37-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT37-EEPROM", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT37" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x21", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT37-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT37-CTRL", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT37" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x21", + "dev_addr": "0x8", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x30", + "attr_mask": "0x8", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x34", + "attr_mask": "0x8", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": 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"topo_info": { + "parent_bus": "0x23", + "dev_addr": "0x8", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x30", + "attr_mask": "0xa", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x34", + "attr_mask": "0xa", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x38", + "attr_mask": "0xa", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x3c", + "attr_mask": "0xa", + "attr_cmpval": "0x1", + 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"dev_idx": "39" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT39-EEPROM" + }, + { + "itf": "control", + "dev": "PORT39-CTRL" + } + ] + } + }, + "PORT39-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT39-EEPROM", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT39" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x25", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT39-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT39-CTRL", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT39" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x25", + "dev_addr": "0x8", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x30", + "attr_mask": "0xc", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x34", + "attr_mask": "0xc", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x38", + "attr_mask": "0xc", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x3c", + "attr_mask": "0xc", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT40": { + "dev_info": { + "device_type": "OSFP", + "device_name": "PORT40", + "device_parent": "MULTIFPGAPCIE1" + }, + "dev_attr": { + "dev_idx": "40" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT40-EEPROM" + }, + { + "itf": "control", + "dev": "PORT40-CTRL" + } + ] + } + }, + "PORT40-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT40-EEPROM", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT40" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x26", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT40-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT40-CTRL", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT40" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x26", + "dev_addr": "0x8", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x30", + "attr_mask": "0xd", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x34", + "attr_mask": "0xd", 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"topo_info": { + "parent_bus": "0x27", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT71-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT71-CTRL", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT71" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x27", + "dev_addr": "0x8", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x30", + "attr_mask": "0xe", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x34", + "attr_mask": "0xe", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": 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"attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x3c", + "attr_mask": "0xf", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT41": { + "dev_info": { + "device_type": "OSFP", + "device_name": "PORT41", + "device_parent": "MULTIFPGAPCIE1" + }, + "dev_attr": { + "dev_idx": "41" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT41-EEPROM" + }, + { + "itf": "control", + "dev": "PORT41-CTRL" + } + ] + } + }, + "PORT41-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT41-EEPROM", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT41" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x29", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT41-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT41-CTRL", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT41" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x29", + "dev_addr": "0x8", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x30", + "attr_mask": "0x10", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x34", + "attr_mask": "0x10", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x38", + "attr_mask": "0x10", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x3c", + "attr_mask": "0x10", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT42": { + "dev_info": { + "device_type": "OSFP", + "device_name": "PORT42", + "device_parent": "MULTIFPGAPCIE1" + }, + "dev_attr": { + "dev_idx": "42" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT42-EEPROM" + }, + { + "itf": "control", + "dev": "PORT42-CTRL" + } + ] + } + }, + "PORT42-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT42-EEPROM", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT42" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2a", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT42-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT42-CTRL", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT42" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2a", + "dev_addr": "0x8", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x0", + 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"attr_len": "1" + } + ] + } + }, + "PORT48": { + "dev_info": { + "device_type": "OSFP", + "device_name": "PORT48", + "device_parent": "MULTIFPGAPCIE1" + }, + "dev_attr": { + "dev_idx": "48" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT48-EEPROM" + }, + { + "itf": "control", + "dev": "PORT48-CTRL" + } + ] + } + }, + "PORT48-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT48-EEPROM", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT48" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x36", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT48-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT48-CTRL", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT48" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x36", + "dev_addr": "0x8", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x0", + 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"attr_name": "xcvr_lpmode", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x34", + "attr_mask": "0x1e", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x38", + "attr_mask": "0x1e", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x3c", + "attr_mask": "0x1e", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT80": { + "dev_info": { + "device_type": "OSFP", + "device_name": "PORT80", + "device_parent": "MULTIFPGAPCIE1" + }, + "dev_attr": { + "dev_idx": "80" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT80-EEPROM" + }, + { + "itf": "control", + "dev": "PORT80-CTRL" + } + ] + } + }, + "PORT80-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT80-EEPROM", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT80" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x38", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT80-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT80-CTRL", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT80" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x38", + "dev_addr": "0x8", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x30", + "attr_mask": "0x1f", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x34", + "attr_mask": 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{ + "topo_info": { + "parent_bus": "0x39", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT49-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT49-CTRL", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT49" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x39", + "dev_addr": "0x8", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x44", + "attr_mask": "0x0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x48", + "attr_mask": "0x0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": 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"attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x50", + "attr_mask": "0x1", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT81": { + "dev_info": { + "device_type": "OSFP", + "device_name": "PORT81", + "device_parent": "MULTIFPGAPCIE1" + }, + "dev_attr": { + "dev_idx": "81" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT81-EEPROM" + }, + { + "itf": "control", + "dev": "PORT81-CTRL" + } + ] + } + }, + "PORT81-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT81-EEPROM", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT81" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x3b", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT81-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT81-CTRL", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT81" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x3b", + "dev_addr": "0x8", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x44", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x48", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x4c", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x50", + "attr_mask": "0x2", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT82": { + "dev_info": { + "device_type": "OSFP", + "device_name": "PORT82", + "device_parent": "MULTIFPGAPCIE1" + }, + "dev_attr": { + "dev_idx": "82" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT82-EEPROM" + }, + { + "itf": "control", + "dev": "PORT82-CTRL" + } + ] + } + }, + "PORT82-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT82-EEPROM", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT82" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x3c", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT82-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT82-CTRL", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT82" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x3c", + "dev_addr": "0x8", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x44", + "attr_mask": "0x3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x48", + "attr_mask": "0x3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x4c", + "attr_mask": "0x3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x50", + "attr_mask": "0x3", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT51": { + "dev_info": { + "device_type": "OSFP", + "device_name": "PORT51", + "device_parent": "MULTIFPGAPCIE1" + }, + "dev_attr": { + "dev_idx": "51" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT51-EEPROM" + }, + { + "itf": "control", + "dev": "PORT51-CTRL" + } + ] + } + }, + "PORT51-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT51-EEPROM", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT51" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x3d", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT51-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT51-CTRL", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT51" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x3d", + "dev_addr": "0x8", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x44", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x48", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x4c", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x50", + "attr_mask": "0x4", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT52": { + "dev_info": { + "device_type": "OSFP", + "device_name": "PORT52", + "device_parent": "MULTIFPGAPCIE1" + }, + "dev_attr": { + "dev_idx": "52" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT52-EEPROM" + }, + { + "itf": "control", + "dev": "PORT52-CTRL" + } + ] + } + }, + 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"topo_info": { + "parent_bus": "0x3f", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT83-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT83-CTRL", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT83" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x3f", + "dev_addr": "0x8", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x44", + "attr_mask": "0x6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x48", + "attr_mask": "0x6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x4c", + "attr_mask": "0x6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x50", + "attr_mask": "0x6", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT84": { + "dev_info": { + "device_type": "OSFP", + "device_name": "PORT84", + "device_parent": "MULTIFPGAPCIE1" + }, + "dev_attr": { + "dev_idx": "84" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT84-EEPROM" + }, + { + "itf": "control", + "dev": "PORT84-CTRL" + } + ] + } + }, + "PORT84-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT84-EEPROM", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT84" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x40", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT84-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT84-CTRL", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT84" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x40", + "dev_addr": "0x8", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x44", + "attr_mask": "0x7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x48", + "attr_mask": "0x7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x4c", + "attr_mask": "0x7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x50", + "attr_mask": "0x7", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT53": { + "dev_info": { + "device_type": "OSFP", + "device_name": "PORT53", + "device_parent": "MULTIFPGAPCIE1" + }, + "dev_attr": { + "dev_idx": "53" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT53-EEPROM" + }, + { + "itf": "control", + "dev": "PORT53-CTRL" + } + ] + } + }, + "PORT53-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT53-EEPROM", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT53" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x41", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT53-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT53-CTRL", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT53" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x41", + "dev_addr": "0x8", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x44", + "attr_mask": "0x8", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x48", + "attr_mask": "0x8", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x4c", + "attr_mask": "0x8", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x50", + "attr_mask": "0x8", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT54": { + "dev_info": { + "device_type": "OSFP", + "device_name": "PORT54", + "device_parent": "MULTIFPGAPCIE1" + }, + "dev_attr": { + "dev_idx": "54" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT54-EEPROM" + }, + { + "itf": "control", + "dev": "PORT54-CTRL" + } + ] + } + }, + "PORT54-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT54-EEPROM", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT54" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x42", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT54-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT54-CTRL", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT54" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x42", + "dev_addr": "0x8", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x44", + "attr_mask": "0x9", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x48", + "attr_mask": "0x9", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x4c", + "attr_mask": "0x9", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x50", + "attr_mask": "0x9", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT85": { + "dev_info": { + "device_type": "OSFP", + "device_name": "PORT85", + "device_parent": "MULTIFPGAPCIE1" + }, + "dev_attr": { + "dev_idx": "85" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT85-EEPROM" + }, + { + "itf": "control", + "dev": "PORT85-CTRL" + } + ] + } + }, + "PORT85-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT85-EEPROM", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT85" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x43", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT85-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT85-CTRL", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT85" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x43", + "dev_addr": "0x8", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x44", + "attr_mask": "0xa", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x48", + "attr_mask": "0xa", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x4c", + "attr_mask": "0xa", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x50", + "attr_mask": "0xa", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT86": { + "dev_info": { + "device_type": "OSFP", + "device_name": "PORT86", + "device_parent": "MULTIFPGAPCIE1" + }, + "dev_attr": { + "dev_idx": "86" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT86-EEPROM" + }, + { + "itf": "control", + "dev": "PORT86-CTRL" + } + ] + } + }, + "PORT86-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT86-EEPROM", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT86" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x44", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT86-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT86-CTRL", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT86" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x44", + "dev_addr": "0x8", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x44", + "attr_mask": "0xb", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x48", + "attr_mask": "0xb", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x4c", + "attr_mask": "0xb", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x50", + "attr_mask": "0xb", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT55": { + "dev_info": { + "device_type": "OSFP", + "device_name": "PORT55", + "device_parent": "MULTIFPGAPCIE1" + }, + "dev_attr": { + "dev_idx": "55" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT55-EEPROM" + }, + { + "itf": "control", + "dev": "PORT55-CTRL" + } + ] + } + }, + "PORT55-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT55-EEPROM", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT55" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x45", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT55-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT55-CTRL", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT55" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x45", + "dev_addr": "0x8", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x44", + "attr_mask": "0xc", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x48", + "attr_mask": "0xc", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x4c", + "attr_mask": "0xc", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x50", + "attr_mask": "0xc", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT56": { + "dev_info": { + "device_type": "OSFP", + "device_name": "PORT56", + "device_parent": "MULTIFPGAPCIE1" + }, + "dev_attr": { + "dev_idx": "56" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT56-EEPROM" + }, + { + "itf": "control", + "dev": "PORT56-CTRL" + } + ] + } + }, + "PORT56-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT56-EEPROM", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT56" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x46", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + 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"attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x50", + "attr_mask": "0xd", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT87": { + "dev_info": { + "device_type": "OSFP", + "device_name": "PORT87", + "device_parent": "MULTIFPGAPCIE1" + }, + "dev_attr": { + "dev_idx": "87" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT87-EEPROM" + }, + { + "itf": "control", + "dev": "PORT87-CTRL" + } + ] + } + }, + "PORT87-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT87-EEPROM", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT87" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x47", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT87-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT87-CTRL", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT87" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x47", + "dev_addr": "0x8", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x44", + "attr_mask": "0xe", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x48", + "attr_mask": "0xe", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x4c", + "attr_mask": "0xe", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x50", + "attr_mask": "0xe", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT88": { + "dev_info": { + "device_type": "OSFP", + "device_name": "PORT88", + "device_parent": "MULTIFPGAPCIE1" + }, + "dev_attr": { + "dev_idx": "88" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT88-EEPROM" + }, + { + "itf": "control", + "dev": "PORT88-CTRL" + } + ] + } + }, + "PORT88-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT88-EEPROM", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT88" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x48", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT88-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT88-CTRL", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT88" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x48", + "dev_addr": "0x8", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x44", + "attr_mask": "0xf", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x48", + "attr_mask": "0xf", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x4c", + "attr_mask": "0xf", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x50", + "attr_mask": "0xf", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT57": { + "dev_info": { + "device_type": "OSFP", + "device_name": "PORT57", + "device_parent": "MULTIFPGAPCIE1" + }, + "dev_attr": { + "dev_idx": "57" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT57-EEPROM" + }, + { + "itf": "control", + "dev": "PORT57-CTRL" + } + ] + } + }, + "PORT57-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT57-EEPROM", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT57" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x49", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT57-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT57-CTRL", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT57" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x49", + "dev_addr": "0x8", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x44", + "attr_mask": "0x10", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x48", + "attr_mask": "0x10", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x4c", + "attr_mask": "0x10", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x50", + "attr_mask": "0x10", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT58": { + "dev_info": { + "device_type": "OSFP", + "device_name": "PORT58", + "device_parent": "MULTIFPGAPCIE1" + }, + "dev_attr": { + "dev_idx": "58" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT58-EEPROM" + }, + { + "itf": "control", + "dev": "PORT58-CTRL" + } + ] + } + }, + "PORT58-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT58-EEPROM", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT58" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x4a", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT58-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT58-CTRL", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT58" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x4a", + "dev_addr": "0x8", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x44", + "attr_mask": "0x11", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x48", + "attr_mask": "0x11", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x4c", + "attr_mask": "0x11", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x50", + "attr_mask": "0x11", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT89": { + "dev_info": { + "device_type": "OSFP", + "device_name": "PORT89", + "device_parent": "MULTIFPGAPCIE1" + }, + "dev_attr": { + "dev_idx": "89" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT89-EEPROM" + }, + { + "itf": "control", + "dev": "PORT89-CTRL" + } + ] + } + }, + "PORT89-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT89-EEPROM", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT89" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x4b", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT89-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT89-CTRL", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT89" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x4b", + "dev_addr": "0x8", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x44", + "attr_mask": "0x12", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x48", + "attr_mask": "0x12", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x4c", + "attr_mask": "0x12", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x50", + "attr_mask": "0x12", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT90": { + "dev_info": { + "device_type": "OSFP", + "device_name": "PORT90", + "device_parent": "MULTIFPGAPCIE1" + }, + "dev_attr": { + "dev_idx": "90" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT90-EEPROM" + }, + { + "itf": "control", + "dev": "PORT90-CTRL" + } + ] + } + }, + "PORT90-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT90-EEPROM", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT90" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x4c", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT90-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT90-CTRL", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT90" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x4c", + "dev_addr": "0x8", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x44", + "attr_mask": "0x13", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x48", + "attr_mask": "0x13", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x4c", + "attr_mask": "0x13", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x50", + "attr_mask": "0x13", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT59": { + "dev_info": { + "device_type": "OSFP", + "device_name": "PORT59", + "device_parent": "MULTIFPGAPCIE1" + }, + "dev_attr": { + "dev_idx": "59" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT59-EEPROM" + }, + { + "itf": "control", + "dev": "PORT59-CTRL" + } + ] + } + }, + "PORT59-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT59-EEPROM", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT59" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x4d", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT59-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT59-CTRL", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT59" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x4d", + "dev_addr": "0x8", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x44", + "attr_mask": "0x14", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x48", + "attr_mask": "0x14", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x4c", + "attr_mask": "0x14", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x50", + "attr_mask": "0x14", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT60": { + "dev_info": { + "device_type": "OSFP", + "device_name": "PORT60", + "device_parent": "MULTIFPGAPCIE1" + }, + "dev_attr": { + "dev_idx": "60" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT60-EEPROM" + }, + { + "itf": "control", + "dev": "PORT60-CTRL" + } + ] + } + }, + "PORT60-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT60-EEPROM", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT60" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x4e", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT60-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT60-CTRL", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT60" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x4e", + "dev_addr": "0x8", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x0", + 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{ + "topo_info": { + "parent_bus": "0x57", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT95-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT95-CTRL", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT95" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x57", + "dev_addr": "0x8", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x44", + "attr_mask": "0x1e", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x48", + "attr_mask": "0x1e", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": 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"PORT96-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT96-CTRL", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT96" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x58", + "dev_addr": "0x8", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x44", + "attr_mask": "0x1f", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x48", + "attr_mask": "0x1f", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x4c", + "attr_mask": "0x1f", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x50", + "attr_mask": "0x1f", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT97": { + "dev_info": { + "device_type": "OSFP", + "device_name": "PORT97", + "device_parent": "MULTIFPGAPCIE2" + }, + "dev_attr": { + "dev_idx": "97" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT97-EEPROM" + }, + { + "itf": "control", + "dev": "PORT97-CTRL" + } + ] + } + }, + "PORT97-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT97-EEPROM", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT97" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x67", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT97-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT97-CTRL", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "PORT97" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x67", + "dev_addr": "0x8", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x58", + "attr_mask": "0x0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x5c", + "attr_mask": "0x0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x60", + "attr_mask": "0x0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x64", + "attr_mask": "0x0", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT98": { + "dev_info": { + "device_type": "OSFP", + "device_name": "PORT98", + "device_parent": "MULTIFPGAPCIE2" + }, + "dev_attr": { + "dev_idx": "98" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT98-EEPROM" + }, + { + "itf": "control", + "dev": "PORT98-CTRL" + } + ] + } + }, + "PORT98-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT98-EEPROM", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT98" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x68", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT98-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT98-CTRL", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "PORT98" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x68", + "dev_addr": "0x8", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x58", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x5c", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x60", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x64", + "attr_mask": "0x1", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT99": { + "dev_info": { + "device_type": "OSFP", + "device_name": "PORT99", + "device_parent": "MULTIFPGAPCIE2" + }, + "dev_attr": { + "dev_idx": "99" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT99-EEPROM" + }, + { + "itf": "control", + "dev": "PORT99-CTRL" + } + ] + } + }, + "PORT99-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT99-EEPROM", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT99" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x69", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT99-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT99-CTRL", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "PORT99" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x69", + "dev_addr": "0x8", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x58", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x5c", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x60", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x64", + "attr_mask": "0x2", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT100": { + "dev_info": { + "device_type": "OSFP", + "device_name": "PORT100", + "device_parent": "MULTIFPGAPCIE2" + }, + "dev_attr": { + "dev_idx": "100" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT100-EEPROM" + }, + { + "itf": "control", + "dev": "PORT100-CTRL" + } + ] + } + }, + "PORT100-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT100-EEPROM", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT100" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x6a", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT100-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT100-CTRL", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "PORT100" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x6a", + "dev_addr": "0x8", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x58", + "attr_mask": "0x3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x5c", + "attr_mask": "0x3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x60", + "attr_mask": "0x3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x64", + "attr_mask": "0x3", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT101": { + "dev_info": { + "device_type": "OSFP", + "device_name": "PORT101", + "device_parent": "MULTIFPGAPCIE2" + }, + "dev_attr": { + "dev_idx": "101" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT101-EEPROM" + }, + { + "itf": "control", + "dev": "PORT101-CTRL" + } + ] + } + }, + "PORT101-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT101-EEPROM", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT101" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x6b", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT101-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT101-CTRL", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "PORT101" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x6b", + "dev_addr": "0x8", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x58", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x5c", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x60", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x64", + "attr_mask": "0x4", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT102": { + "dev_info": { + "device_type": "OSFP", + "device_name": "PORT102", + "device_parent": "MULTIFPGAPCIE2" + }, + "dev_attr": { + "dev_idx": "102" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT102-EEPROM" + }, + { + "itf": "control", + "dev": "PORT102-CTRL" + } + ] + } + }, + "PORT102-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT102-EEPROM", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT102" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x6c", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT102-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT102-CTRL", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "PORT102" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x6c", + "dev_addr": "0x8", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x58", + "attr_mask": "0x5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x5c", + "attr_mask": "0x5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x60", + "attr_mask": "0x5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x64", + "attr_mask": "0x5", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT103": { + "dev_info": { + "device_type": "OSFP", + "device_name": "PORT103", + "device_parent": "MULTIFPGAPCIE2" + }, + "dev_attr": { + "dev_idx": "103" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT103-EEPROM" + }, + { + "itf": "control", + "dev": "PORT103-CTRL" + } + ] + } + }, + "PORT103-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT103-EEPROM", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT103" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x6d", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT103-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT103-CTRL", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "PORT103" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x6d", + "dev_addr": "0x8", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x58", + "attr_mask": "0x6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x5c", + "attr_mask": "0x6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x60", + "attr_mask": "0x6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x64", + "attr_mask": "0x6", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT104": { + "dev_info": { + "device_type": "OSFP", + "device_name": "PORT104", + "device_parent": "MULTIFPGAPCIE2" + }, + "dev_attr": { + "dev_idx": "104" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT104-EEPROM" + }, + { + "itf": "control", + "dev": "PORT104-CTRL" + } + ] + } + }, + "PORT104-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT104-EEPROM", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT104" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x6e", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT104-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT104-CTRL", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "PORT104" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x6e", + "dev_addr": "0x8", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x58", + "attr_mask": "0x7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x5c", + "attr_mask": "0x7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x60", + "attr_mask": "0x7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x64", + "attr_mask": "0x7", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT105": { + "dev_info": { + "device_type": "OSFP", + "device_name": "PORT105", + "device_parent": "MULTIFPGAPCIE2" + }, + "dev_attr": { + "dev_idx": "105" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT105-EEPROM" + }, + { + "itf": "control", + "dev": "PORT105-CTRL" + } + ] + } + }, + "PORT105-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT105-EEPROM", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT105" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x77", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT105-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT105-CTRL", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "PORT105" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x77", + "dev_addr": "0x8", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x58", + 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"device_name": "PORT107-EEPROM", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT107" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x79", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT107-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT107-CTRL", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "PORT107" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x79", + "dev_addr": "0x8", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x58", + "attr_mask": "0xa", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x5c", + "attr_mask": "0xa", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x60", + "attr_mask": "0xa", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x64", + "attr_mask": "0xa", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT108": { + "dev_info": { + "device_type": "OSFP", + "device_name": "PORT108", + "device_parent": "MULTIFPGAPCIE2" + }, + "dev_attr": { + "dev_idx": "108" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT108-EEPROM" + }, + { + "itf": "control", + "dev": "PORT108-CTRL" + } + ] + } + }, + "PORT108-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT108-EEPROM", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT108" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x7a", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT108-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT108-CTRL", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "PORT108" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x7a", + "dev_addr": "0x8", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x58", + "attr_mask": "0xb", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x5c", + "attr_mask": "0xb", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x60", + "attr_mask": "0xb", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x64", + "attr_mask": "0xb", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT109": { + "dev_info": { + "device_type": "OSFP", + "device_name": "PORT109", + "device_parent": "MULTIFPGAPCIE2" + }, + "dev_attr": { + "dev_idx": "109" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT109-EEPROM" + }, + { + "itf": "control", + "dev": "PORT109-CTRL" + } + ] + } + }, + "PORT109-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT109-EEPROM", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT109" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x7b", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT109-CTRL": { + "dev_info": { + "device_type": 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"dev_addr": "0x8", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x58", + "attr_mask": "0xd", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x5c", + "attr_mask": "0xd", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x60", + "attr_mask": "0xd", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x64", + "attr_mask": "0xd", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT111": { + "dev_info": { + "device_type": "OSFP", + "device_name": "PORT111", + "device_parent": "MULTIFPGAPCIE2" + }, + "dev_attr": { + "dev_idx": "111" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT111-EEPROM" + }, + { + "itf": "control", + "dev": "PORT111-CTRL" + } + ] + } + }, + "PORT111-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT111-EEPROM", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT111" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x7d", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT111-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT111-CTRL", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "PORT111" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x7d", + "dev_addr": "0x8", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + 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"interface": [ + { + "itf": "eeprom", + "dev": "PORT112-EEPROM" + }, + { + "itf": "control", + "dev": "PORT112-CTRL" + } + ] + } + }, + "PORT112-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT112-EEPROM", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT112" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x7e", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT112-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT112-CTRL", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "PORT112" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x7e", + "dev_addr": "0x8", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x58", + "attr_mask": "0xf", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + 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"dev_info": { + "device_type": "", + "device_name": "PORT113-EEPROM", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT113" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x87", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT113-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT113-CTRL", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "PORT113" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x87", + "dev_addr": "0x8", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x58", + "attr_mask": "0x10", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x5c", + "attr_mask": "0x10", + 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"optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT121-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT121-CTRL", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "PORT121" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x97", + "dev_addr": "0x8", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x58", + "attr_mask": "0x18", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x5c", + "attr_mask": "0x18", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x60", + "attr_mask": "0x18", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x64", + "attr_mask": "0x18", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT122": { + "dev_info": { + "device_type": "OSFP", + "device_name": "PORT122", + "device_parent": "MULTIFPGAPCIE2" + }, + "dev_attr": { + "dev_idx": "122" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT122-EEPROM" + }, + { + "itf": "control", + "dev": "PORT122-CTRL" + } + ] + } + }, + "PORT122-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT122-EEPROM", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT122" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x98", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT122-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT122-CTRL", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "PORT122" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x98", + "dev_addr": "0x8", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x58", + "attr_mask": "0x19", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x5c", + "attr_mask": "0x19", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x60", + "attr_mask": "0x19", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x64", + "attr_mask": "0x19", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT123": { + "dev_info": { + "device_type": "OSFP", + "device_name": "PORT123", + "device_parent": "MULTIFPGAPCIE2" + }, + "dev_attr": { + "dev_idx": "123" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT123-EEPROM" + }, + { + "itf": "control", + "dev": "PORT123-CTRL" + } + ] + } + }, + "PORT123-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT123-EEPROM", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT123" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x99", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT123-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT123-CTRL", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "PORT123" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x99", + "dev_addr": "0x8", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x58", + "attr_mask": "0x1a", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x5c", + "attr_mask": "0x1a", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x60", + "attr_mask": "0x1a", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x64", + "attr_mask": "0x1a", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT124": { + "dev_info": { + "device_type": "OSFP", + "device_name": "PORT124", + "device_parent": "MULTIFPGAPCIE2" + }, + "dev_attr": { + "dev_idx": "124" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT124-EEPROM" + }, + { + "itf": "control", + "dev": "PORT124-CTRL" + } + ] + } + }, + "PORT124-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT124-EEPROM", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT124" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x9a", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT124-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT124-CTRL", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "PORT124" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x9a", + "dev_addr": "0x8", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x58", + "attr_mask": "0x1b", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x5c", + "attr_mask": "0x1b", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x60", + "attr_mask": "0x1b", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x64", + "attr_mask": "0x1b", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT125": { + "dev_info": { + "device_type": "OSFP", + "device_name": "PORT125", + "device_parent": "MULTIFPGAPCIE2" + }, + "dev_attr": { + "dev_idx": "125" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT125-EEPROM" + }, + { + "itf": "control", + "dev": "PORT125-CTRL" + } + ] + } + }, + "PORT125-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT125-EEPROM", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT125" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x9b", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT125-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT125-CTRL", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "PORT125" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x9b", + "dev_addr": "0x8", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x58", + "attr_mask": "0x1c", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x5c", + "attr_mask": "0x1c", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x60", + "attr_mask": "0x1c", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x64", + "attr_mask": "0x1c", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT126": { + "dev_info": { + "device_type": "OSFP", + "device_name": "PORT126", + "device_parent": "MULTIFPGAPCIE2" + }, + "dev_attr": { + "dev_idx": "126" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT126-EEPROM" + }, + { + "itf": "control", + "dev": "PORT126-CTRL" + } + ] + } + }, + "PORT126-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT126-EEPROM", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT126" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x9c", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT126-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT126-CTRL", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "PORT126" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x9c", + "dev_addr": "0x8", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x58", + "attr_mask": "0x1d", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x5c", + "attr_mask": "0x1d", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x60", + "attr_mask": "0x1d", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x64", + "attr_mask": "0x1d", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT127": { + "dev_info": { + "device_type": "OSFP", + "device_name": "PORT127", + "device_parent": "MULTIFPGAPCIE2" + }, + "dev_attr": { + "dev_idx": "127" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT127-EEPROM" + }, + { + "itf": "control", + "dev": "PORT127-CTRL" + } + ] + } + }, + "PORT127-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT127-EEPROM", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT127" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x9d", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT127-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT127-CTRL", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "PORT127" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x9d", + "dev_addr": "0x8", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x58", + "attr_mask": "0x1e", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x5c", + "attr_mask": "0x1e", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x60", + "attr_mask": "0x1e", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x64", + "attr_mask": "0x1e", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT128": { + "dev_info": { + "device_type": "OSFP", + "device_name": "PORT128", + "device_parent": "MULTIFPGAPCIE2" + }, + "dev_attr": { + "dev_idx": "128" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT128-EEPROM" + }, + { + "itf": "control", + "dev": "PORT128-CTRL" + } + ] + } + }, + "PORT128-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT128-EEPROM", + "device_parent": "MULTIFPGAPCIE1", + "virt_parent": "PORT128" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x9e", + "dev_addr": "0x50", + "dev_type": "optoe3" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT128-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT128-CTRL", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "PORT128" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x9e", + "dev_addr": "0x8", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x58", + "attr_mask": "0x1f", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x5c", + "attr_mask": "0x1f", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x60", + "attr_mask": "0x1f", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x0", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "attr_offset": "0x64", + "attr_mask": "0x1f", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT_LED_129": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED" + }, + "dev_attr": { + "index": "128" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "13:10", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x9c", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "13:10", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x9c", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "13:10", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x9c", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "SYS_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "SYS_LED" + }, + "dev_attr": { + "index": "0" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "b:8", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x9c", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green_blink", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "b:8", + "descr": "green_blink", + "value": "0x6", + "swpld_addr": "0x9c", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "red", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "b:8", + "descr": "red", + "value": "0x1", + "swpld_addr": "0x9c", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "amber", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "b:8", + "descr": "amber", + "value": "0x3", + "swpld_addr": "0x9c", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "b:8", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x9c", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "LOC_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "LOC_LED" + }, + "dev_attr": { + "index": "0" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "blue_blink", + "attr_devtype": "multifpgapci", + "attr_devname": "CPUCARD_FPGA", + "bits": "13:10", + "descr": "blue_blink", + "value": "0x5", + "swpld_addr": "0x48", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "blue", + "attr_devtype": "multifpgapci", + "attr_devname": "CPUCARD_FPGA", + "bits": "13:10", + "descr": "blue", + "value": "0x1", + "swpld_addr": "0x48", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "CPUCARD_FPGA", + "bits": "13:10", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x48", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "FAN_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "FAN_LED" + }, + "dev_attr": { + "index": "0" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "7:4", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x9c", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "red", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "7:4", + "descr": "red", + "value": "0x1", + "swpld_addr": "0x9c", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "amber", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "7:4", + "descr": "amber", + "value": "0x3", + "swpld_addr": "0x9c", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "7:4", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x9c", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PSU_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "PSU_LED" + }, + "dev_attr": { + "index": "0" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "3:0", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x9c", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "red", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "3:0", + "descr": "red", + "value": "0x1", + "swpld_addr": "0x9c", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "amber", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "3:0", + "descr": "amber", + "value": "0x3", + "swpld_addr": "0x9c", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "3:0", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x9c", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "FANTRAY1_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "FANTRAY_LED" + }, + "dev_attr": { + "index": "0" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "1:0", + "descr": "green", + "value": "0x2", + "swpld_addr": "0xa0", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "red", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "1:0", + "descr": "red", + "value": "0x1", + "swpld_addr": "0xa0", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "1:0", + "descr": "off", + "value": "0x0", + "swpld_addr": "0xa0", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "FANTRAY2_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "FANTRAY_LED" + }, + "dev_attr": { + "index": "1" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "3:2", + "descr": "green", + "value": "0x2", + "swpld_addr": "0xa0", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "red", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "3:2", + "descr": "red", + "value": "0x1", + "swpld_addr": "0xa0", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "3:2", + "descr": "off", + "value": "0x0", + "swpld_addr": "0xa0", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "FANTRAY3_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "FANTRAY_LED" + }, + "dev_attr": { + "index": "2" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "5:4", + "descr": "green", + "value": "0x2", + "swpld_addr": "0xa0", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "red", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "5:4", + "descr": "red", + "value": "0x1", + "swpld_addr": "0xa0", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "5:4", + "descr": "off", + "value": "0x0", + "swpld_addr": "0xa0", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "FANTRAY4_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "FANTRAY_LED" + }, + "dev_attr": { + "index": "3" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "7:6", + "descr": "green", + "value": "0x2", + "swpld_addr": "0xa0", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "red", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "7:6", + "descr": "red", + "value": "0x1", + "swpld_addr": "0xa0", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "7:6", + "descr": "off", + "value": "0x0", + "swpld_addr": "0xa0", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "FANTRAY5_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "FANTRAY_LED" + }, + "dev_attr": { + "index": "4" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "11:10", + "descr": "green", + "value": "0x2", + "swpld_addr": "0xa0", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "red", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "11:10", + "descr": "red", + "value": "0x1", + "swpld_addr": "0xa0", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "11:10", + "descr": "off", + "value": "0x0", + "swpld_addr": "0xa0", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "FANTRAY6_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "FANTRAY_LED" + }, + "dev_attr": { + "index": "5" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "13:12", + "descr": "green", + "value": "0x2", + "swpld_addr": "0xa0", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "red", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "13:12", + "descr": "red", + "value": "0x1", + "swpld_addr": "0xa0", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "13:12", + "descr": "off", + "value": "0x0", + "swpld_addr": "0xa0", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "FANTRAY7_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "FANTRAY_LED" + }, + "dev_attr": { + "index": "6" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "15:14", + "descr": "green", + "value": "0x2", + "swpld_addr": "0xa0", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "red", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "15:14", + "descr": "red", + "value": "0x1", + "swpld_addr": "0xa0", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "15:14", + "descr": "off", + "value": "0x0", + "swpld_addr": "0xa0", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "FANTRAY8_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "FANTRAY_LED" + }, + "dev_attr": { + "index": "7" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "17:16", + "descr": "green", + "value": "0x2", + "swpld_addr": "0xa0", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "red", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "17:16", + "descr": "red", + "value": "0x1", + "swpld_addr": "0xa0", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "17:16", + "descr": "off", + "value": "0x0", + "swpld_addr": "0xa0", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_1": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_1" + }, + "dev_attr": { + "index": "0" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "3:0", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x80", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "3:0", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x80", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "3:0", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x80", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_2": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_2" + }, + "dev_attr": { + "index": "1" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "7:4", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x80", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "7:4", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x80", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "7:4", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x80", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_3": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_3" + }, + "dev_attr": { + "index": "2" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "b:8", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x80", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "b:8", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x80", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "b:8", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x80", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_4": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_4" + }, + "dev_attr": { + "index": "3" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "f:c", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x80", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "f:c", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x80", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "f:c", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x80", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_5": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_5" + }, + "dev_attr": { + "index": "4" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "13:10", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x80", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "13:10", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x80", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "13:10", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x80", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_6": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_6" + }, + "dev_attr": { + "index": "5" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "17:14", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x80", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "17:14", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x80", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "17:14", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x80", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_7": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_7" + }, + "dev_attr": { + "index": "6" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "1b:18", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x80", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "1b:18", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x80", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "1b:18", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x80", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_8": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_8" + }, + "dev_attr": { + "index": "7" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "1f:1c", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x80", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "1f:1c", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x80", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "1f:1c", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x80", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_9": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_9" + }, + "dev_attr": { + "index": "8" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "3:0", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x84", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "3:0", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x84", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "3:0", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x84", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_10": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_10" + }, + "dev_attr": { + "index": "9" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "7:4", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x84", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "7:4", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x84", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "7:4", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x84", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_11": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_11" + }, + "dev_attr": { + "index": "10" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "b:8", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x84", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "b:8", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x84", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "b:8", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x84", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_12": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_12" + }, + "dev_attr": { + "index": "11" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "f:c", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x84", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "f:c", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x84", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "f:c", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x84", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_13": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_13" + }, + "dev_attr": { + "index": "12" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "13:10", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x84", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "13:10", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x84", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "13:10", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x84", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_14": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_14" + }, + "dev_attr": { + "index": "13" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "17:14", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x84", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "17:14", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x84", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "17:14", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x84", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_15": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_15" + }, + "dev_attr": { + "index": "14" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "1b:18", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x84", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "1b:18", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x84", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "1b:18", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x84", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_16": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_16" + }, + "dev_attr": { + "index": "15" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "1f:1c", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x84", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "1f:1c", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x84", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "1f:1c", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x84", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_17": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_17" + }, + "dev_attr": { + "index": "16" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "3:0", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x88", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "3:0", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x88", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "3:0", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x88", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_18": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_18" + }, + "dev_attr": { + "index": "17" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "7:4", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x88", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "7:4", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x88", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "7:4", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x88", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_19": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_19" + }, + "dev_attr": { + "index": "18" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "b:8", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x88", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "b:8", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x88", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "b:8", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x88", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_20": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_20" + }, + "dev_attr": { + "index": "19" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "f:c", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x88", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "f:c", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x88", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "f:c", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x88", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_21": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_21" + }, + "dev_attr": { + "index": "20" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "13:10", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x88", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "13:10", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x88", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "13:10", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x88", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_22": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_22" + }, + "dev_attr": { + "index": "21" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "17:14", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x88", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "17:14", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x88", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "17:14", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x88", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_23": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_23" + }, + "dev_attr": { + "index": "22" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "1b:18", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x88", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "1b:18", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x88", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "1b:18", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x88", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_24": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_24" + }, + "dev_attr": { + "index": "23" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "1f:1c", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x88", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "1f:1c", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x88", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "1f:1c", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x88", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_25": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_25" + }, + "dev_attr": { + "index": "24" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "3:0", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x8c", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "3:0", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x8c", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "3:0", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x8c", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_26": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_26" + }, + "dev_attr": { + "index": "25" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "7:4", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x8c", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "7:4", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x8c", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "7:4", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x8c", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_27": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_27" + }, + "dev_attr": { + "index": "26" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "b:8", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x8c", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "b:8", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x8c", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "b:8", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x8c", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_28": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_28" + }, + "dev_attr": { + "index": "27" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "f:c", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x8c", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "f:c", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x8c", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "f:c", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x8c", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_29": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_29" + }, + "dev_attr": { + "index": "28" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "13:10", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x8c", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "13:10", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x8c", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "13:10", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x8c", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_30": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_30" + }, + "dev_attr": { + "index": "29" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "17:14", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x8c", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "17:14", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x8c", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "17:14", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x8c", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_31": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_31" + }, + "dev_attr": { + "index": "30" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "1b:18", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x8c", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "1b:18", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x8c", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "1b:18", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x8c", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_32": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_32" + }, + "dev_attr": { + "index": "31" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "1f:1c", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x8c", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "1f:1c", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x8c", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "1f:1c", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x8c", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_33": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_33" + }, + "dev_attr": { + "index": "32" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "3:0", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x90", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "3:0", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x90", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "3:0", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x90", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_34": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_34" + }, + "dev_attr": { + "index": "33" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "7:4", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x90", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "7:4", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x90", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "7:4", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x90", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_35": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_35" + }, + "dev_attr": { + "index": "34" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "b:8", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x90", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "b:8", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x90", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "b:8", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x90", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_36": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_36" + }, + "dev_attr": { + "index": "35" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "f:c", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x90", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "f:c", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x90", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "f:c", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x90", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_37": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_37" + }, + "dev_attr": { + "index": "36" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "13:10", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x90", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "13:10", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x90", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "13:10", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x90", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_38": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_38" + }, + "dev_attr": { + "index": "37" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "17:14", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x90", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "17:14", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x90", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "17:14", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x90", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_39": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_39" + }, + "dev_attr": { + "index": "38" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "1b:18", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x90", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "1b:18", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x90", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "1b:18", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x90", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_40": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_40" + }, + "dev_attr": { + "index": "39" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "1f:1c", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x90", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "1f:1c", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x90", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "1f:1c", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x90", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_41": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_41" + }, + "dev_attr": { + "index": "40" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "3:0", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x94", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "3:0", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x94", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "3:0", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x94", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_42": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_42" + }, + "dev_attr": { + "index": "41" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "7:4", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x94", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "7:4", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x94", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "7:4", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x94", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_43": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_43" + }, + "dev_attr": { + "index": "42" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "b:8", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x94", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "b:8", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x94", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "b:8", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x94", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_44": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_44" + }, + "dev_attr": { + "index": "43" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "f:c", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x94", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "f:c", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x94", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "f:c", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x94", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_45": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_45" + }, + "dev_attr": { + "index": "44" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "13:10", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x94", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "13:10", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x94", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "13:10", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x94", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_46": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_46" + }, + "dev_attr": { + "index": "45" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "17:14", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x94", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "17:14", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x94", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "17:14", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x94", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_47": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_47" + }, + "dev_attr": { + "index": "46" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "1b:18", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x94", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "1b:18", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x94", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "1b:18", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x94", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_48": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_48" + }, + "dev_attr": { + "index": "47" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "1f:1c", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x94", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "1f:1c", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x94", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "1f:1c", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x94", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_49": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_49" + }, + "dev_attr": { + "index": "48" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "3:0", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x98", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "3:0", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x98", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "3:0", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x98", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_50": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_50" + }, + "dev_attr": { + "index": "49" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "7:4", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x98", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "7:4", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x98", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "7:4", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x98", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_51": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_51" + }, + "dev_attr": { + "index": "50" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "b:8", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x98", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "b:8", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x98", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "b:8", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x98", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_52": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_52" + }, + "dev_attr": { + "index": "51" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "f:c", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x98", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "f:c", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x98", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "f:c", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x98", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_53": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_53" + }, + "dev_attr": { + "index": "52" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "13:10", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x98", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "13:10", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x98", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "13:10", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x98", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_54": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_54" + }, + "dev_attr": { + "index": "53" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "17:14", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x98", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "17:14", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x98", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "17:14", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x98", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_55": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_55" + }, + "dev_attr": { + "index": "54" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "1b:18", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x98", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "1b:18", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x98", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "1b:18", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x98", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_56": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_56" + }, + "dev_attr": { + "index": "55" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "1f:1c", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x98", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "1f:1c", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x98", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "1f:1c", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x98", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_57": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_57" + }, + "dev_attr": { + "index": "56" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "3:0", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x9c", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "3:0", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x9c", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "3:0", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x9c", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_58": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_58" + }, + "dev_attr": { + "index": "57" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "7:4", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x9c", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "7:4", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x9c", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "7:4", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x9c", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_59": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_59" + }, + "dev_attr": { + "index": "58" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "b:8", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x9c", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "b:8", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x9c", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "b:8", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x9c", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_60": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_60" + }, + "dev_attr": { + "index": "59" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "f:c", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x9c", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "f:c", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x9c", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "f:c", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x9c", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_61": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_61" + }, + "dev_attr": { + "index": "60" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "13:10", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x9c", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "13:10", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x9c", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "13:10", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x9c", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_62": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_62" + }, + "dev_attr": { + "index": "61" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "17:14", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x9c", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "17:14", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x9c", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "17:14", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x9c", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_63": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_63" + }, + "dev_attr": { + "index": "62" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "1b:18", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x9c", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "1b:18", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x9c", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "1b:18", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x9c", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_64": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_64" + }, + "dev_attr": { + "index": "63" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "1f:1c", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x9c", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "1f:1c", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x9c", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA1", + "bits": "1f:1c", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x9c", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_65": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_65" + }, + "dev_attr": { + "index": "64" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "3:0", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x60", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "3:0", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x60", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "3:0", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x60", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_66": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_66" + }, + "dev_attr": { + "index": "65" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "7:4", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x60", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "7:4", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x60", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "7:4", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x60", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_67": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_67" + }, + "dev_attr": { + "index": "66" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "b:8", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x60", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "b:8", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x60", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "b:8", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x60", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_68": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_68" + }, + "dev_attr": { + "index": "67" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "f:c", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x60", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "f:c", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x60", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "f:c", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x60", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_69": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_69" + }, + "dev_attr": { + "index": "68" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "13:10", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x60", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "13:10", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x60", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "13:10", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x60", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_70": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_70" + }, + "dev_attr": { + "index": "69" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "17:14", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x60", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "17:14", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x60", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "17:14", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x60", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_71": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_71" + }, + "dev_attr": { + "index": "70" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "1b:18", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x60", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "1b:18", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x60", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "1b:18", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x60", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_72": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_72" + }, + "dev_attr": { + "index": "71" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "1f:1c", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x60", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "1f:1c", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x60", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "1f:1c", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x60", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_73": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_73" + }, + "dev_attr": { + "index": "72" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "3:0", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x64", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "3:0", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x64", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "3:0", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x64", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_74": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_74" + }, + "dev_attr": { + "index": "73" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "7:4", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x64", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "7:4", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x64", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "7:4", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x64", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_75": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_75" + }, + "dev_attr": { + "index": "74" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "b:8", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x64", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "b:8", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x64", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "b:8", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x64", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_76": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_76" + }, + "dev_attr": { + "index": "75" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "f:c", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x64", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "f:c", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x64", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "f:c", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x64", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_77": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_77" + }, + "dev_attr": { + "index": "76" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "13:10", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x64", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "13:10", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x64", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "13:10", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x64", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_78": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_78" + }, + "dev_attr": { + "index": "77" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "17:14", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x64", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "17:14", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x64", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "17:14", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x64", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_79": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_79" + }, + "dev_attr": { + "index": "78" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "1b:18", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x64", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "1b:18", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x64", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "1b:18", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x64", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_80": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_80" + }, + "dev_attr": { + "index": "79" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "1f:1c", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x64", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "1f:1c", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x64", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "1f:1c", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x64", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_81": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_81" + }, + "dev_attr": { + "index": "80" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "3:0", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x68", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "3:0", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x68", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "3:0", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x68", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_82": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_82" + }, + "dev_attr": { + "index": "81" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "7:4", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x68", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "7:4", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x68", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "7:4", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x68", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_83": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_83" + }, + "dev_attr": { + "index": "82" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "b:8", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x68", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "b:8", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x68", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "b:8", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x68", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_84": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_84" + }, + "dev_attr": { + "index": "83" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "f:c", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x68", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "f:c", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x68", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "f:c", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x68", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_85": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_85" + }, + "dev_attr": { + "index": "84" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "13:10", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x68", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "13:10", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x68", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "13:10", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x68", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_86": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_86" + }, + "dev_attr": { + "index": "85" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "17:14", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x68", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "17:14", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x68", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "17:14", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x68", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_87": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_87" + }, + "dev_attr": { + "index": "86" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "1b:18", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x68", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "1b:18", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x68", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "1b:18", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x68", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_88": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_88" + }, + "dev_attr": { + "index": "87" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "1f:1c", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x68", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "1f:1c", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x68", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "1f:1c", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x68", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_89": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_89" + }, + "dev_attr": { + "index": "88" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "3:0", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x6c", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "3:0", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x6c", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "3:0", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x6c", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_90": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_90" + }, + "dev_attr": { + "index": "89" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "7:4", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x6c", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "7:4", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x6c", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "7:4", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x6c", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_91": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_91" + }, + "dev_attr": { + "index": "90" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "b:8", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x6c", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "b:8", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x6c", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "b:8", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x6c", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_92": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_92" + }, + "dev_attr": { + "index": "91" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "f:c", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x6c", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "f:c", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x6c", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "f:c", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x6c", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_93": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_93" + }, + "dev_attr": { + "index": "92" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "13:10", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x6c", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "13:10", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x6c", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "13:10", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x6c", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_94": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_94" + }, + "dev_attr": { + "index": "93" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "17:14", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x6c", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "17:14", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x6c", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "17:14", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x6c", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_95": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_95" + }, + "dev_attr": { + "index": "94" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "1b:18", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x6c", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "1b:18", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x6c", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "1b:18", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x6c", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_96": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_96" + }, + "dev_attr": { + "index": "95" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "1f:1c", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x6c", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "1f:1c", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x6c", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "1f:1c", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x6c", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_97": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_97" + }, + "dev_attr": { + "index": "96" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "3:0", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x70", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "3:0", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x70", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "3:0", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x70", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_98": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_98" + }, + "dev_attr": { + "index": "97" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "7:4", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x70", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "7:4", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x70", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "7:4", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x70", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_99": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_99" + }, + "dev_attr": { + "index": "98" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "b:8", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x70", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "b:8", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x70", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "b:8", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x70", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_100": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_100" + }, + "dev_attr": { + "index": "99" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "f:c", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x70", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "f:c", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x70", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "f:c", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x70", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_101": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_101" + }, + "dev_attr": { + "index": "100" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "13:10", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x70", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "13:10", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x70", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "13:10", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x70", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_102": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_102" + }, + "dev_attr": { + "index": "101" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "17:14", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x70", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "17:14", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x70", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "17:14", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x70", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_103": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_103" + }, + "dev_attr": { + "index": "102" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "1b:18", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x70", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "1b:18", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x70", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "1b:18", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x70", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_104": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_104" + }, + "dev_attr": { + "index": "103" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "1f:1c", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x70", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "1f:1c", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x70", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "1f:1c", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x70", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_105": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_105" + }, + "dev_attr": { + "index": "104" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "3:0", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x74", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "3:0", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x74", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "3:0", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x74", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_106": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_106" + }, + "dev_attr": { + "index": "105" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "7:4", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x74", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "7:4", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x74", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "7:4", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x74", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_107": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_107" + }, + "dev_attr": { + "index": "106" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "b:8", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x74", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "b:8", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x74", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "b:8", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x74", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_108": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_108" + }, + "dev_attr": { + "index": "107" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "f:c", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x74", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "f:c", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x74", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "f:c", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x74", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_109": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_109" + }, + "dev_attr": { + "index": "108" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "13:10", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x74", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "13:10", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x74", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "13:10", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x74", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_110": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_110" + }, + "dev_attr": { + "index": "109" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "17:14", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x74", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "17:14", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x74", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "17:14", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x74", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_111": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_111" + }, + "dev_attr": { + "index": "110" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "1b:18", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x74", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "1b:18", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x74", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "1b:18", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x74", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_112": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_112" + }, + "dev_attr": { + "index": "111" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "1f:1c", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x74", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "1f:1c", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x74", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "1f:1c", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x74", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_113": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_113" + }, + "dev_attr": { + "index": "112" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "3:0", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x78", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "3:0", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x78", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "3:0", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x78", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_114": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_114" + }, + "dev_attr": { + "index": "113" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "7:4", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x78", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "7:4", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x78", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "7:4", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x78", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_115": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_115" + }, + "dev_attr": { + "index": "114" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "b:8", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x78", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "b:8", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x78", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "b:8", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x78", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_116": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_116" + }, + "dev_attr": { + "index": "115" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "f:c", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x78", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "f:c", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x78", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "f:c", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x78", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_117": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_117" + }, + "dev_attr": { + "index": "116" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "13:10", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x78", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "13:10", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x78", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "13:10", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x78", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_118": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_118" + }, + "dev_attr": { + "index": "117" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "17:14", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x78", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "17:14", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x78", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "17:14", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x78", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_119": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_119" + }, + "dev_attr": { + "index": "118" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "1b:18", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x78", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "1b:18", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x78", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "1b:18", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x78", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_120": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_120" + }, + "dev_attr": { + "index": "119" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "1f:1c", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x78", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "1f:1c", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x78", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "1f:1c", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x78", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_121": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_121" + }, + "dev_attr": { + "index": "120" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "3:0", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x7c", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "3:0", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x7c", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "3:0", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x7c", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_122": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_122" + }, + "dev_attr": { + "index": "121" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "7:4", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x7c", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "7:4", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x7c", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "7:4", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x7c", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_123": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_123" + }, + "dev_attr": { + "index": "122" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "b:8", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x7c", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "b:8", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x7c", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "b:8", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x7c", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_124": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_124" + }, + "dev_attr": { + "index": "123" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "f:c", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x7c", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "f:c", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x7c", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "f:c", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x7c", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_125": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_125" + }, + "dev_attr": { + "index": "124" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "13:10", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x7c", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "13:10", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x7c", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "13:10", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x7c", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_126": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_126" + }, + "dev_attr": { + "index": "125" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "17:14", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x7c", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "17:14", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x7c", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "17:14", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x7c", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_127": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_127" + }, + "dev_attr": { + "index": "126" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "1b:18", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x7c", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "1b:18", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x7c", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "1b:18", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x7c", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "PORT_LED_128": { + "dev_info": { + "device_type": "LED", + "device_name": "PORT_LED_128" + }, + "dev_attr": { + "index": "127" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "yellow", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "1f:1c", + "descr": "yellow", + "value": "0x1", + "swpld_addr": "0x7c", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "green", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "1f:1c", + "descr": "green", + "value": "0x2", + "swpld_addr": "0x7c", + "swpld_addr_offset": "0x0" + }, + { + "attr_name": "off", + "attr_devtype": "multifpgapci", + "attr_devname": "SWITCHCARD_FPGA0", + "bits": "1f:1c", + "descr": "off", + "value": "0x0", + "swpld_addr": "0x7c", + "swpld_addr_offset": "0x0" + } + ] + } + }, + "TMP464": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TMP464", + "device_parent": "MULTIFPGAPCIE2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x63", + "dev_addr": "0x48", + "dev_type": "nh_tmp464" + }, + "attr_list": [ + { + "attr_name": "temp1_high_threshold", + "drv_attr_name": "temp1_max" + }, + { + "attr_name": "temp1_max_hyst" + }, + { + "attr_name": "temp1_input" + } + ] + } + }, + "TEMP2": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TMP464-CH1", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "TMP464", + "nexthop_thermal_pid_domain": null + }, + "dev_attr": { + "display_name": "Switch Card Lower Rear" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "temp1_input", + "drv_attr_name": "temp1_input" + }, + { + "attr_name": "temp1_high_threshold", + "drv_attr_name": "temp1_max" + }, + { + "attr_name": "temp1_high_crit_threshold", + "drv_attr_name": "temp1_crit" + } + ] + } + }, + "TEMP3": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TMP464-CH2", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "TMP464", + "nexthop_thermal_pid_domain": null + }, + "dev_attr": { + "display_name": "PSU 2 Intake" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "temp1_input", + "drv_attr_name": "temp2_input" + }, + { + "attr_name": "temp1_high_threshold", + "drv_attr_name": "temp2_max" + }, + { + "attr_name": "temp1_high_crit_threshold", + "drv_attr_name": "temp2_crit" + } + ] + } + }, + "TEMP4": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TMP464-CH3", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "TMP464", + "nexthop_thermal_pid_domain": "asic" + }, + "dev_attr": { + "display_name": "ASIC Diode 0" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "temp1_input", + "drv_attr_name": "temp3_input" + }, + { + "attr_name": "temp1_high_threshold", + "drv_attr_name": "temp3_max" + }, + { + "attr_name": "temp1_high_crit_threshold", + "drv_attr_name": "temp3_crit" + } + ] + } + }, + "TEMP5": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TMP464-CH4", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "TMP464", + "nexthop_thermal_pid_domain": "asic" + }, + "dev_attr": { + "display_name": "ASIC Diode 1" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "temp1_input", + "drv_attr_name": "temp4_input" + }, + { + "attr_name": "temp1_high_threshold", + "drv_attr_name": "temp4_max" + }, + { + "attr_name": "temp1_high_crit_threshold", + "drv_attr_name": "temp4_crit" + } + ] + } + }, + "TEMP6": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TMP464-CH5", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "TMP464", + "nexthop_thermal_pid_domain": "asic" + }, + "dev_attr": { + "display_name": "ASIC Diode 2" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "temp1_input", + "drv_attr_name": "temp5_input" + }, + { + "attr_name": "temp1_high_threshold", + "drv_attr_name": "temp5_max" + }, + { + "attr_name": "temp1_high_crit_threshold", + "drv_attr_name": "temp5_crit" + } + ] + } + }, + "DPM1": { + "dev_info": { + "device_type": "DPM", + "device_name": "DPM1", + "device_parent": "MULTIFPGAPCIE0" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x8", + "dev_addr": "0x41", + "dev_type": "nh_adm1266" + } + } + }, + "COMPONENT13": { + "comp_attr": { + "name": "DPM1", + "type": "dpm", + "description": "Digital Power Manager", + "boot_type": "none" + }, + "attr_list": [ + { + "attr_name": "version", + "get_cmd": "adm1266_version 8-0041" + }, + { + "attr_name": "model", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "serial", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "revision", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "update", + "cmd": "/var/platform/fwpackage/fwpackage/update_firmware.py {{model_name}} DPM1 {}" + } + ] + }, + "VOLTAGE1": { + "dev_info": { + "device_type": "VOLTAGE_SENSOR", + "device_name": "DPM1-RAIL1", + "device_parent": "MULTIFPGAPCIE0", + "virt_parent": "DPM1" + }, + "dev_attr": { + "display_name": "POS12V0" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "volt1_input", + "drv_attr_name": "in1_input" + }, + { + "attr_name": "volt1_high_threshold", + "drv_attr_name": "in1_max" + }, + { + "attr_name": "volt1_low_threshold", + "drv_attr_name": "in1_min" + }, + { + "attr_name": "volt1_crit_high_threshold", + "drv_attr_name": "in1_crit" + }, + { + "attr_name": "volt1_crit_low_threshold", + "drv_attr_name": "in1_lcrit" + } + ] + } + }, + "VOLTAGE2": { + "dev_info": { + "device_type": "VOLTAGE_SENSOR", + "device_name": "DPM1-RAIL2", + "device_parent": "MULTIFPGAPCIE0", + "virt_parent": "DPM1" + }, + "dev_attr": { + "display_name": "POS5V0" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "volt1_input", + "drv_attr_name": "in2_input" + }, + { + "attr_name": "volt1_high_threshold", + "drv_attr_name": "in2_max" + }, + { + "attr_name": "volt1_low_threshold", + "drv_attr_name": "in2_min" + }, + { + "attr_name": "volt1_crit_high_threshold", + "drv_attr_name": "in2_crit" + }, + { + "attr_name": "volt1_crit_low_threshold", + "drv_attr_name": "in2_lcrit" + } + ] + } + }, + "VOLTAGE3": { + "dev_info": { + "device_type": "VOLTAGE_SENSOR", + "device_name": "DPM1-RAIL3", + "device_parent": "MULTIFPGAPCIE0", + "virt_parent": "DPM1" + }, + "dev_attr": { + "display_name": "POS2V0_PHY" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "volt1_input", + "drv_attr_name": "in3_input" + }, + { + "attr_name": "volt1_high_threshold", + "drv_attr_name": "in3_max" + }, + { + "attr_name": "volt1_low_threshold", + "drv_attr_name": "in3_min" + }, + { + "attr_name": "volt1_crit_high_threshold", + "drv_attr_name": "in3_crit" + }, + { + "attr_name": "volt1_crit_low_threshold", + "drv_attr_name": "in3_lcrit" + } + ] + } + }, + "VOLTAGE4": { + "dev_info": { + "device_type": "VOLTAGE_SENSOR", + "device_name": "DPM1-RAIL4", + "device_parent": "MULTIFPGAPCIE0", + "virt_parent": "DPM1" + }, + "dev_attr": { + "display_name": "POS5V0_S0" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "volt1_input", + "drv_attr_name": "in4_input" + }, + { + "attr_name": "volt1_high_threshold", + "drv_attr_name": "in4_max" + }, + { + "attr_name": "volt1_low_threshold", + "drv_attr_name": "in4_min" + }, + { + "attr_name": "volt1_crit_high_threshold", + "drv_attr_name": "in4_crit" + }, + { + "attr_name": "volt1_crit_low_threshold", + "drv_attr_name": "in4_lcrit" + } + ] + } + }, + "VOLTAGE5": { + "dev_info": { + "device_type": "VOLTAGE_SENSOR", + "device_name": "DPM1-RAIL5", + "device_parent": "MULTIFPGAPCIE0", + "virt_parent": "DPM1" + }, + "dev_attr": { + "display_name": "POS1V0_A7" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "volt1_input", + "drv_attr_name": "in5_input" + }, + { + "attr_name": "volt1_high_threshold", + "drv_attr_name": "in5_max" + }, + { + "attr_name": "volt1_low_threshold", + "drv_attr_name": "in5_min" + }, + { + "attr_name": "volt1_crit_high_threshold", + "drv_attr_name": "in5_crit" + }, + { + "attr_name": "volt1_crit_low_threshold", + "drv_attr_name": "in5_lcrit" + } + ] + } + }, + "VOLTAGE6": { + "dev_info": { + "device_type": "VOLTAGE_SENSOR", + "device_name": "DPM1-RAIL6", + "device_parent": "MULTIFPGAPCIE0", + "virt_parent": "DPM1" + }, + "dev_attr": { + "display_name": "POS1V8_A7" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "volt1_input", + "drv_attr_name": "in6_input" + }, + { + "attr_name": "volt1_high_threshold", + "drv_attr_name": "in6_max" + }, + { + "attr_name": "volt1_low_threshold", + "drv_attr_name": "in6_min" + }, + { + "attr_name": "volt1_crit_high_threshold", + "drv_attr_name": "in6_crit" + }, + { + "attr_name": "volt1_crit_low_threshold", + "drv_attr_name": "in6_lcrit" + } + ] + } + }, + "VOLTAGE7": { + "dev_info": { + "device_type": "VOLTAGE_SENSOR", + "device_name": "DPM1-RAIL7", + "device_parent": "MULTIFPGAPCIE0", + "virt_parent": "DPM1" + }, + "dev_attr": { + "display_name": "POS3V3" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "volt1_input", + "drv_attr_name": "in7_input" + }, + { + "attr_name": "volt1_high_threshold", + "drv_attr_name": "in7_max" + }, + { + "attr_name": "volt1_low_threshold", + "drv_attr_name": "in7_min" + }, + { + "attr_name": "volt1_crit_high_threshold", + "drv_attr_name": "in7_crit" + }, + { + "attr_name": "volt1_crit_low_threshold", + "drv_attr_name": "in7_lcrit" + } + ] + } + }, + "VOLTAGE8": { + "dev_info": { + "device_type": "VOLTAGE_SENSOR", + "device_name": "DPM1-RAIL8", + "device_parent": "MULTIFPGAPCIE0", + "virt_parent": "DPM1" + }, + "dev_attr": { + "display_name": "POS0V74_PHY" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "volt1_input", + "drv_attr_name": "in8_input" + }, + { + "attr_name": "volt1_high_threshold", + "drv_attr_name": "in8_max" + }, + { + "attr_name": "volt1_low_threshold", + "drv_attr_name": "in8_min" + }, + { + "attr_name": "volt1_crit_high_threshold", + "drv_attr_name": "in8_crit" + }, + { + "attr_name": "volt1_crit_low_threshold", + "drv_attr_name": "in8_lcrit" + } + ] + } + }, + "VOLTAGE9": { + "dev_info": { + "device_type": "VOLTAGE_SENSOR", + "device_name": "DPM1-RAIL9", + "device_parent": "MULTIFPGAPCIE0", + "virt_parent": "DPM1" + }, + "dev_attr": { + "display_name": "POS1V2_A7" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "volt1_input", + "drv_attr_name": "in9_input" + }, + { + "attr_name": "volt1_high_threshold", + "drv_attr_name": "in9_max" + }, + { + "attr_name": "volt1_low_threshold", + "drv_attr_name": "in9_min" + }, + { + "attr_name": "volt1_crit_high_threshold", + "drv_attr_name": "in9_crit" + }, + { + "attr_name": "volt1_crit_low_threshold", + "drv_attr_name": "in9_lcrit" + } + ] + } + }, + "VOLTAGE10": { + "dev_info": { + "device_type": "VOLTAGE_SENSOR", + "device_name": "DPM1-RAIL10", + "device_parent": "MULTIFPGAPCIE0", + "virt_parent": "DPM1" + }, + "dev_attr": { + "display_name": "POS0V75_S5" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "volt1_input", + "drv_attr_name": "in10_input" + }, + { + "attr_name": "volt1_high_threshold", + "drv_attr_name": "in10_max" + }, + { + "attr_name": "volt1_low_threshold", + "drv_attr_name": "in10_min" + }, + { + "attr_name": "volt1_crit_high_threshold", + "drv_attr_name": "in10_crit" + }, + { + "attr_name": "volt1_crit_low_threshold", + "drv_attr_name": "in10_lcrit" + } + ] + } + }, + "VOLTAGE11": { + "dev_info": { + "device_type": "VOLTAGE_SENSOR", + "device_name": "DPM1-RAIL11", + "device_parent": "MULTIFPGAPCIE0", + "virt_parent": "DPM1" + }, + "dev_attr": { + "display_name": "POS1V8_S5" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "volt1_input", + "drv_attr_name": "in11_input" + }, + { + "attr_name": "volt1_high_threshold", + "drv_attr_name": "in11_max" + }, + { + "attr_name": "volt1_low_threshold", + "drv_attr_name": "in11_min" + }, + { + "attr_name": "volt1_crit_high_threshold", + "drv_attr_name": "in11_crit" + }, + { + "attr_name": "volt1_crit_low_threshold", + "drv_attr_name": "in11_lcrit" + } + ] + } + }, + "VOLTAGE12": { + "dev_info": { + "device_type": "VOLTAGE_SENSOR", + "device_name": "DPM1-RAIL12", + "device_parent": "MULTIFPGAPCIE0", + "virt_parent": "DPM1" + }, + "dev_attr": { + "display_name": "POS3V3_S5" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "volt1_input", + "drv_attr_name": "in12_input" + }, + { + "attr_name": "volt1_high_threshold", + "drv_attr_name": "in12_max" + }, + { + "attr_name": "volt1_low_threshold", + "drv_attr_name": "in12_min" + }, + { + "attr_name": "volt1_crit_high_threshold", + "drv_attr_name": "in12_crit" + }, + { + "attr_name": "volt1_crit_low_threshold", + "drv_attr_name": "in12_lcrit" + } + ] + } + }, + "VOLTAGE13": { + "dev_info": { + "device_type": "VOLTAGE_SENSOR", + "device_name": "DPM1-RAIL13", + "device_parent": "MULTIFPGAPCIE0", + "virt_parent": "DPM1" + }, + "dev_attr": { + "display_name": "POS1V1_S0" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "volt1_input", + "drv_attr_name": "in13_input" + }, + { + "attr_name": "volt1_high_threshold", + "drv_attr_name": "in13_max" + }, + { + "attr_name": "volt1_low_threshold", + "drv_attr_name": "in13_min" + }, + { + "attr_name": "volt1_crit_high_threshold", + "drv_attr_name": "in13_crit" + }, + { + "attr_name": "volt1_crit_low_threshold", + "drv_attr_name": "in13_lcrit" + } + ] + } + }, + "VOLTAGE14": { + "dev_info": { + "device_type": "VOLTAGE_SENSOR", + "device_name": "DPM1-RAIL14", + "device_parent": "MULTIFPGAPCIE0", + "virt_parent": "DPM1" + }, + "dev_attr": { + "display_name": "POS1V5_SWT" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "volt1_input", + "drv_attr_name": "in14_input" + }, + { + "attr_name": "volt1_high_threshold", + "drv_attr_name": "in14_max" + }, + { + "attr_name": "volt1_low_threshold", + "drv_attr_name": "in14_min" + }, + { + "attr_name": "volt1_crit_high_threshold", + "drv_attr_name": "in14_crit" + }, + { + "attr_name": "volt1_crit_low_threshold", + "drv_attr_name": "in14_lcrit" + } + ] + } + }, + "VOLTAGE15": { + "dev_info": { + "device_type": "VOLTAGE_SENSOR", + "device_name": "DPM1-RAIL15", + "device_parent": "MULTIFPGAPCIE0", + "virt_parent": "DPM1" + }, + "dev_attr": { + "display_name": "POS1V15_SWT" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "volt1_input", + "drv_attr_name": "in15_input" + }, + { + "attr_name": "volt1_high_threshold", + "drv_attr_name": "in15_max" + }, + { + "attr_name": "volt1_low_threshold", + "drv_attr_name": "in15_min" + }, + { + "attr_name": "volt1_crit_high_threshold", + "drv_attr_name": "in15_crit" + }, + { + "attr_name": "volt1_crit_low_threshold", + "drv_attr_name": "in15_lcrit" + } + ] + } + }, + "VOLTAGE16": { + "dev_info": { + "device_type": "VOLTAGE_SENSOR", + "device_name": "DPM1-RAIL16", + "device_parent": "MULTIFPGAPCIE0", + "virt_parent": "DPM1" + }, + "dev_attr": { + "display_name": "POS1V8_S0" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "volt1_input", + "drv_attr_name": "in16_input" + }, + { + "attr_name": "volt1_high_threshold", + "drv_attr_name": "in16_max" + }, + { + "attr_name": "volt1_low_threshold", + "drv_attr_name": "in16_min" + }, + { + "attr_name": "volt1_crit_high_threshold", + "drv_attr_name": "in16_crit" + }, + { + "attr_name": "volt1_crit_low_threshold", + "drv_attr_name": "in16_lcrit" + } + ] + } + }, + "VOLTAGE17": { + "dev_info": { + "device_type": "VOLTAGE_SENSOR", + "device_name": "DPM1-RAIL17", + "device_parent": "MULTIFPGAPCIE0", + "virt_parent": "DPM1" + }, + "dev_attr": { + "display_name": "POS3V3_S0" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "volt1_input", + "drv_attr_name": "in17_input" + }, + { + "attr_name": "volt1_high_threshold", + "drv_attr_name": "in17_max" + }, + { + "attr_name": "volt1_low_threshold", + "drv_attr_name": "in17_min" + }, + { + "attr_name": "volt1_crit_high_threshold", + "drv_attr_name": "in17_crit" + }, + { + "attr_name": "volt1_crit_low_threshold", + "drv_attr_name": "in17_lcrit" + } + ] + } + }, + "DPM2": { + "dev_info": { + "device_type": "DPM", + "device_name": "DPM2", + "device_parent": "MULTIFPGAPCIE0" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xa", + "dev_addr": "0x41", + "dev_type": "nh_adm1266" + } + } + }, + "COMPONENT14": { + "comp_attr": { + "name": "DPM2", + "type": "dpm", + "description": "Digital Power Manager", + "boot_type": "none" + }, + "attr_list": [ + { + "attr_name": "version", + "get_cmd": "adm1266_version 10-0041" + }, + { + "attr_name": "model", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "serial", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "revision", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "update", + "cmd": "/var/platform/fwpackage/fwpackage/update_firmware.py {{model_name}} DPM2 {}" + } + ] + }, + "DPM3": { + "dev_info": { + "device_type": "DPM", + "device_name": "DPM3", + "device_parent": "MULTIFPGAPCIE0" + }, + "i2c": { + "topo_info": { + "parent_bus": "0xa", + "dev_addr": "0x43", + "dev_type": "nh_adm1266" + } + } + }, + "COMPONENT15": { + "comp_attr": { + "name": "DPM3", + "type": "dpm", + "description": "Digital Power Manager", + "boot_type": "none" + }, + "attr_list": [ + { + "attr_name": "version", + "get_cmd": "adm1266_version 10-0043" + }, + { + "attr_name": "model", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "serial", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "revision", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "update", + "cmd": "/var/platform/fwpackage/fwpackage/update_firmware.py {{model_name}} DPM3 {}" + } + ] + }, + "DCDC0": { + "dev_info": { + "device_type": "DCDC", + "device_name": "DCDC0", + "device_parent": "MULTIFPGAPCIE2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x5d", + "dev_addr": "0x70", + "dev_type": "nh_xdpe1a2g5b" + } + } + }, + "VOLTAGE18": { + "dev_info": { + "device_type": "VOLTAGE_SENSOR", + "device_name": "DCDC0-RAIL1", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "DCDC0" + }, + "dev_attr": { + "display_name": "POS0V8_VDDC" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "volt1_input", + "drv_attr_name": "in3_input" + }, + { + "attr_name": "volt1_high_threshold", + "drv_attr_name": "in3_max" + }, + { + "attr_name": "volt1_low_threshold", + "drv_attr_name": "in3_min" + }, + { + "attr_name": "volt1_crit_high_threshold", + "drv_attr_name": "in3_crit" + }, + { + "attr_name": "volt1_crit_low_threshold", + "drv_attr_name": "in3_lcrit" + } + ] + } + }, + "CURRENT1": { + "dev_info": { + "device_type": "CURRENT_SENSOR", + "device_name": "DCDC0-RAIL1", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "DCDC0" + }, + "dev_attr": { + "display_name": "POS0V8_VDDC" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "current1_input", + "drv_attr_name": "curr3_input" + }, + { + "attr_name": "current1_high_threshold", + "drv_attr_name": "curr3_max" + }, + { + "attr_name": "current1_crit_high_threshold", + "drv_attr_name": "curr3_crit" + } + ] + } + }, + "TEMP7": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "DCDC0-RAIL1-CH1", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "DCDC0", + "nexthop_thermal_pid_domain": "main", + "nexthop_thermal_setpoint_override": 95.0 + }, + "dev_attr": { + "display_name": "DCDC0" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "temp1_input", + "drv_attr_name": "temp1_input" + }, + { + "attr_name": "temp1_high_threshold", + "drv_attr_name": "temp1_max" + }, + { + "attr_name": "temp1_high_crit_threshold", + "drv_attr_name": "temp1_crit" + } + ] + } + }, + "DCDC1": { + "dev_info": { + "device_type": "DCDC", + "device_name": "DCDC1", + "device_parent": "MULTIFPGAPCIE2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x61", + "dev_addr": "0x60", + "dev_type": "nh_raa228244" + } + } + }, + "COMPONENT16": { + "comp_attr": { + "name": "DCDC1", + "type": "dcdc", + "description": "DCDC voltage regulator", + "boot_type": "none" + }, + "attr_list": [ + { + "attr_name": "version", + "get_cmd": "cat /sys/bus/i2c/devices/97-0060/hwmon/hwmon*/mfr_revision" + }, + { + "attr_name": "model", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "serial", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "revision", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "update", + "cmd": "/var/platform/fwpackage/fwpackage/update_firmware.py {{model_name}} DCDC1 {}" + } + ] + }, + "VOLTAGE19": { + "dev_info": { + "device_type": "VOLTAGE_SENSOR", + "device_name": "DCDC1-RAIL1", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "DCDC1" + }, + "dev_attr": { + "display_name": "POS0V9_WEST" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "volt1_input", + "drv_attr_name": "in3_input" + }, + { + "attr_name": "volt1_high_threshold", + "drv_attr_name": "in3_max" + }, + { + "attr_name": "volt1_low_threshold", + "drv_attr_name": "in3_min" + }, + { + "attr_name": "volt1_crit_high_threshold", + "drv_attr_name": "in3_crit" + }, + { + "attr_name": "volt1_crit_low_threshold", + "drv_attr_name": "in3_lcrit" + } + ] + } + }, + "VOLTAGE20": { + "dev_info": { + "device_type": "VOLTAGE_SENSOR", + "device_name": "DCDC1-RAIL2", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "DCDC1" + }, + "dev_attr": { + "display_name": "POS0V75_WEST" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "volt1_input", + "drv_attr_name": "in4_input" + }, + { + "attr_name": "volt1_high_threshold", + "drv_attr_name": "in4_max" + }, + { + "attr_name": "volt1_low_threshold", + "drv_attr_name": "in4_min" + }, + { + "attr_name": "volt1_crit_high_threshold", + "drv_attr_name": "in4_crit" + }, + { + "attr_name": "volt1_crit_low_threshold", + "drv_attr_name": "in4_lcrit" + } + ] + } + }, + "CURRENT2": { + "dev_info": { + "device_type": "CURRENT_SENSOR", + "device_name": "DCDC1-RAIL1", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "DCDC1" + }, + "dev_attr": { + "display_name": "POS0V9_WEST" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "current1_input", + "drv_attr_name": "curr3_input" + }, + { + "attr_name": "current1_high_threshold", + "drv_attr_name": "curr3_max" + }, + { + "attr_name": "current1_crit_high_threshold", + "drv_attr_name": "curr3_crit" + } + ] + } + }, + "CURRENT3": { + "dev_info": { + "device_type": "CURRENT_SENSOR", + "device_name": "DCDC1-RAIL2", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "DCDC1" + }, + "dev_attr": { + "display_name": "POS0V75_WEST" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "current1_input", + "drv_attr_name": "curr4_input" + }, + { + "attr_name": "current1_high_threshold", + "drv_attr_name": "curr4_max" + }, + { + "attr_name": "current1_crit_high_threshold", + "drv_attr_name": "curr4_crit" + } + ] + } + }, + "TEMP8": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "DCDC1-RAIL1", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "DCDC1", + "nexthop_thermal_pid_domain": "main", + "nexthop_thermal_setpoint_override": 95.0 + }, + "dev_attr": { + "display_name": "DCDC1" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "temp1_input", + "drv_attr_name": "temp1_input" + }, + { + "attr_name": "temp1_high_threshold", + "drv_attr_name": "temp1_max" + }, + { + "attr_name": "temp1_high_crit_threshold", + "drv_attr_name": "temp1_crit" + } + ] + } + }, + "DCDC2": { + "dev_info": { + "device_type": "DCDC", + "device_name": "DCDC2", + "device_parent": "MULTIFPGAPCIE2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x62", + "dev_addr": "0x60", + "dev_type": "nh_raa228244" + } + } + }, + "COMPONENT17": { + "comp_attr": { + "name": "DCDC2", + "type": "dcdc", + "description": "DCDC voltage regulator", + "boot_type": "none" + }, + "attr_list": [ + { + "attr_name": "version", + "get_cmd": "cat /sys/bus/i2c/devices/98-0060/hwmon/hwmon*/mfr_revision" + }, + { + "attr_name": "model", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "serial", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "revision", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "update", + "cmd": "/var/platform/fwpackage/fwpackage/update_firmware.py {{model_name}} DCDC2 {}" + } + ] + }, + "VOLTAGE21": { + "dev_info": { + "device_type": "VOLTAGE_SENSOR", + "device_name": "DCDC2-RAIL1", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "DCDC2" + }, + "dev_attr": { + "display_name": "POS0V9_EAST" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "volt1_input", + "drv_attr_name": "in3_input" + }, + { + "attr_name": "volt1_high_threshold", + "drv_attr_name": "in3_max" + }, + { + "attr_name": "volt1_low_threshold", + "drv_attr_name": "in3_min" + }, + { + "attr_name": "volt1_crit_high_threshold", + "drv_attr_name": "in3_crit" + }, + { + "attr_name": "volt1_crit_low_threshold", + "drv_attr_name": "in3_lcrit" + } + ] + } + }, + "VOLTAGE22": { + "dev_info": { + "device_type": "VOLTAGE_SENSOR", + "device_name": "DCDC2-RAIL2", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "DCDC2" + }, + "dev_attr": { + "display_name": "POS0V75_EAST" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "volt1_input", + "drv_attr_name": "in4_input" + }, + { + "attr_name": "volt1_high_threshold", + "drv_attr_name": "in4_max" + }, + { + "attr_name": "volt1_low_threshold", + "drv_attr_name": "in4_min" + }, + { + "attr_name": "volt1_crit_high_threshold", + "drv_attr_name": "in4_crit" + }, + { + "attr_name": "volt1_crit_low_threshold", + "drv_attr_name": "in4_lcrit" + } + ] + } + }, + "CURRENT4": { + "dev_info": { + "device_type": "CURRENT_SENSOR", + "device_name": "DCDC2-RAIL1", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "DCDC2" + }, + "dev_attr": { + "display_name": "POS0V9_EAST" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "current1_input", + "drv_attr_name": "curr3_input" + }, + { + "attr_name": "current1_high_threshold", + "drv_attr_name": "curr3_max" + }, + { + "attr_name": "current1_crit_high_threshold", + "drv_attr_name": "curr3_crit" + } + ] + } + }, + "CURRENT5": { + "dev_info": { + "device_type": "CURRENT_SENSOR", + "device_name": "DCDC2-RAIL2", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "DCDC2" + }, + "dev_attr": { + "display_name": "POS0V75_EAST" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "current1_input", + "drv_attr_name": "curr4_input" + }, + { + "attr_name": "current1_high_threshold", + "drv_attr_name": "curr4_max" + }, + { + "attr_name": "current1_crit_high_threshold", + "drv_attr_name": "curr4_crit" + } + ] + } + }, + "TEMP9": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "DCDC2-RAIL1", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "DCDC2", + "nexthop_thermal_pid_domain": "main", + "nexthop_thermal_setpoint_override": 95.0 + }, + "dev_attr": { + "display_name": "DCDC2" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "temp1_input", + "drv_attr_name": "temp1_input" + }, + { + "attr_name": "temp1_high_threshold", + "drv_attr_name": "temp1_max" + }, + { + "attr_name": "temp1_high_crit_threshold", + "drv_attr_name": "temp1_crit" + } + ] + } + }, + "DCDC3": { + "dev_info": { + "device_type": "DCDC", + "device_name": "DCDC3", + "device_parent": "MULTIFPGAPCIE2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x61", + "dev_addr": "0x61", + "dev_type": "nh_raa228244" + } + } + }, + "COMPONENT18": { + "comp_attr": { + "name": "DCDC3", + "type": "dcdc", + "description": "DCDC voltage regulator", + "boot_type": "none" + }, + "attr_list": [ + { + "attr_name": "version", + "get_cmd": "cat /sys/bus/i2c/devices/97-0061/hwmon/hwmon*/mfr_revision" + }, + { + "attr_name": "model", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "serial", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "revision", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "update", + "cmd": "/var/platform/fwpackage/fwpackage/update_firmware.py {{model_name}} DCDC3 {}" + } + ] + }, + "VOLTAGE23": { + "dev_info": { + "device_type": "VOLTAGE_SENSOR", + "device_name": "DCDC3-RAIL1", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "DCDC3" + }, + "dev_attr": { + "display_name": "POS0V8_PT_0" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "volt1_input", + "drv_attr_name": "in3_input" + }, + { + "attr_name": "volt1_high_threshold", + "drv_attr_name": "in3_max" + }, + { + "attr_name": "volt1_low_threshold", + "drv_attr_name": "in3_min" + }, + { + "attr_name": "volt1_crit_high_threshold", + "drv_attr_name": "in3_crit" + }, + { + "attr_name": "volt1_crit_low_threshold", + "drv_attr_name": "in3_lcrit" + } + ] + } + }, + "VOLTAGE24": { + "dev_info": { + "device_type": "VOLTAGE_SENSOR", + "device_name": "DCDC3-RAIL2", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "DCDC3" + }, + "dev_attr": { + "display_name": "POS0V8_PT_1" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "volt1_input", + "drv_attr_name": "in4_input" + }, + { + "attr_name": "volt1_high_threshold", + "drv_attr_name": "in4_max" + }, + { + "attr_name": "volt1_low_threshold", + "drv_attr_name": "in4_min" + }, + { + "attr_name": "volt1_crit_high_threshold", + "drv_attr_name": "in4_crit" + }, + { + "attr_name": "volt1_crit_low_threshold", + "drv_attr_name": "in4_lcrit" + } + ] + } + }, + "CURRENT6": { + "dev_info": { + "device_type": "CURRENT_SENSOR", + "device_name": "DCDC3-RAIL1", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "DCDC3" + }, + "dev_attr": { + "display_name": "POS0V8_PT_0" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "current1_input", + "drv_attr_name": "curr3_input" + }, + { + "attr_name": "current1_high_threshold", + "drv_attr_name": "curr3_max" + }, + { + "attr_name": "current1_crit_high_threshold", + "drv_attr_name": "curr3_crit" + } + ] + } + }, + "CURRENT7": { + "dev_info": { + "device_type": "CURRENT_SENSOR", + "device_name": "DCDC3-RAIL2", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "DCDC3" + }, + "dev_attr": { + "display_name": "POS0V8_PT_1" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "current1_input", + "drv_attr_name": "curr4_input" + }, + { + "attr_name": "current1_high_threshold", + "drv_attr_name": "curr4_max" + }, + { + "attr_name": "current1_crit_high_threshold", + "drv_attr_name": "curr4_crit" + } + ] + } + }, + "TEMP10": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "DCDC3-RAIL1", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "DCDC3", + "nexthop_thermal_pid_domain": "main", + "nexthop_thermal_setpoint_override": 95.0 + }, + "dev_attr": { + "display_name": "DCDC3" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "temp1_input", + "drv_attr_name": "temp1_input" + }, + { + "attr_name": "temp1_high_threshold", + "drv_attr_name": "temp1_max" + }, + { + "attr_name": "temp1_high_crit_threshold", + "drv_attr_name": "temp1_crit" + } + ] + } + }, + "DCDC4": { + "dev_info": { + "device_type": "DCDC", + "device_name": "DCDC4", + "device_parent": "MULTIFPGAPCIE2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x61", + "dev_addr": "0x62", + "dev_type": "nh_raa228244" + } + } + }, + "COMPONENT19": { + "comp_attr": { + "name": "DCDC4", + "type": "dcdc", + "description": "DCDC voltage regulator", + "boot_type": "none" + }, + "attr_list": [ + { + "attr_name": "version", + "get_cmd": "cat /sys/bus/i2c/devices/97-0062/hwmon/hwmon*/mfr_revision" + }, + { + "attr_name": "model", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "serial", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "revision", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "update", + "cmd": "/var/platform/fwpackage/fwpackage/update_firmware.py {{model_name}} DCDC4 {}" + } + ] + }, + "VOLTAGE25": { + "dev_info": { + "device_type": "VOLTAGE_SENSOR", + "device_name": "DCDC4-RAIL1", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "DCDC4" + }, + "dev_attr": { + "display_name": "POS0V8_PT_2" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "volt1_input", + "drv_attr_name": "in3_input" + }, + { + "attr_name": "volt1_high_threshold", + "drv_attr_name": "in3_max" + }, + { + "attr_name": "volt1_low_threshold", + "drv_attr_name": "in3_min" + }, + { + "attr_name": "volt1_crit_high_threshold", + "drv_attr_name": "in3_crit" + }, + { + "attr_name": "volt1_crit_low_threshold", + "drv_attr_name": "in3_lcrit" + } + ] + } + }, + "VOLTAGE26": { + "dev_info": { + "device_type": "VOLTAGE_SENSOR", + "device_name": "DCDC4-RAIL2", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "DCDC4" + }, + "dev_attr": { + "display_name": "POS0V8_PT_3" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "volt1_input", + "drv_attr_name": "in4_input" + }, + { + "attr_name": "volt1_high_threshold", + "drv_attr_name": "in4_max" + }, + { + "attr_name": "volt1_low_threshold", + "drv_attr_name": "in4_min" + }, + { + "attr_name": "volt1_crit_high_threshold", + "drv_attr_name": "in4_crit" + }, + { + "attr_name": "volt1_crit_low_threshold", + "drv_attr_name": "in4_lcrit" + } + ] + } + }, + "CURRENT8": { + "dev_info": { + "device_type": "CURRENT_SENSOR", + "device_name": "DCDC4-RAIL1", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "DCDC4" + }, + "dev_attr": { + "display_name": "POS0V8_PT_2" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "current1_input", + "drv_attr_name": "curr3_input" + }, + { + "attr_name": "current1_high_threshold", + "drv_attr_name": "curr3_max" + }, + { + "attr_name": "current1_crit_high_threshold", + "drv_attr_name": "curr3_crit" + } + ] + } + }, + "CURRENT9": { + "dev_info": { + "device_type": "CURRENT_SENSOR", + "device_name": "DCDC4-RAIL2", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "DCDC4" + }, + "dev_attr": { + "display_name": "POS0V8_PT_3" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "current1_input", + "drv_attr_name": "curr4_input" + }, + { + "attr_name": "current1_high_threshold", + "drv_attr_name": "curr4_max" + }, + { + "attr_name": "current1_crit_high_threshold", + "drv_attr_name": "curr4_crit" + } + ] + } + }, + "TEMP11": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "DCDC4-RAIL1", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "DCDC4", + "nexthop_thermal_pid_domain": "main", + "nexthop_thermal_setpoint_override": 95.0 + }, + "dev_attr": { + "display_name": "DCDC4" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "temp1_input", + "drv_attr_name": "temp1_input" + }, + { + "attr_name": "temp1_high_threshold", + "drv_attr_name": "temp1_max" + }, + { + "attr_name": "temp1_high_crit_threshold", + "drv_attr_name": "temp1_crit" + } + ] + } + }, + "DCDC5": { + "dev_info": { + "device_type": "DCDC", + "device_name": "DCDC5", + "device_parent": "MULTIFPGAPCIE2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x62", + "dev_addr": "0x61", + "dev_type": "nh_raa228244" + } + } + }, + "COMPONENT20": { + "comp_attr": { + "name": "DCDC5", + "type": "dcdc", + "description": "DCDC voltage regulator", + "boot_type": "none" + }, + "attr_list": [ + { + "attr_name": "version", + "get_cmd": "cat /sys/bus/i2c/devices/98-0061/hwmon/hwmon*/mfr_revision" + }, + { + "attr_name": "model", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "serial", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "revision", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "update", + "cmd": "/var/platform/fwpackage/fwpackage/update_firmware.py {{model_name}} DCDC5 {}" + } + ] + }, + "VOLTAGE27": { + "dev_info": { + "device_type": "VOLTAGE_SENSOR", + "device_name": "DCDC5-RAIL1", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "DCDC5" + }, + "dev_attr": { + "display_name": "POS0V8_PT_4" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "volt1_input", + "drv_attr_name": "in3_input" + }, + { + "attr_name": "volt1_high_threshold", + "drv_attr_name": "in3_max" + }, + { + "attr_name": "volt1_low_threshold", + "drv_attr_name": "in3_min" + }, + { + "attr_name": "volt1_crit_high_threshold", + "drv_attr_name": "in3_crit" + }, + { + "attr_name": "volt1_crit_low_threshold", + "drv_attr_name": "in3_lcrit" + } + ] + } + }, + "VOLTAGE28": { + "dev_info": { + "device_type": "VOLTAGE_SENSOR", + "device_name": "DCDC5-RAIL2", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "DCDC5" + }, + "dev_attr": { + "display_name": "POS0V8_PT_5" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "volt1_input", + "drv_attr_name": "in4_input" + }, + { + "attr_name": "volt1_high_threshold", + "drv_attr_name": "in4_max" + }, + { + "attr_name": "volt1_low_threshold", + "drv_attr_name": "in4_min" + }, + { + "attr_name": "volt1_crit_high_threshold", + "drv_attr_name": "in4_crit" + }, + { + "attr_name": "volt1_crit_low_threshold", + "drv_attr_name": "in4_lcrit" + } + ] + } + }, + "CURRENT10": { + "dev_info": { + "device_type": "CURRENT_SENSOR", + "device_name": "DCDC5-RAIL1", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "DCDC5" + }, + "dev_attr": { + "display_name": "POS0V8_PT_4" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "current1_input", + "drv_attr_name": "curr3_input" + }, + { + "attr_name": "current1_high_threshold", + "drv_attr_name": "curr3_max" + }, + { + "attr_name": "current1_crit_high_threshold", + "drv_attr_name": "curr3_crit" + } + ] + } + }, + "CURRENT11": { + "dev_info": { + "device_type": "CURRENT_SENSOR", + "device_name": "DCDC5-RAIL2", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "DCDC5" + }, + "dev_attr": { + "display_name": "POS0V8_PT_5" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "current1_input", + "drv_attr_name": "curr4_input" + }, + { + "attr_name": "current1_high_threshold", + "drv_attr_name": "curr4_max" + }, + { + "attr_name": "current1_crit_high_threshold", + "drv_attr_name": "curr4_crit" + } + ] + } + }, + "TEMP12": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "DCDC5-RAIL1", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "DCDC5", + "nexthop_thermal_pid_domain": "main", + "nexthop_thermal_setpoint_override": 95.0 + }, + "dev_attr": { + "display_name": "DCDC5" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "temp1_input", + "drv_attr_name": "temp1_input" + }, + { + "attr_name": "temp1_high_threshold", + "drv_attr_name": "temp1_max" + }, + { + "attr_name": "temp1_high_crit_threshold", + "drv_attr_name": "temp1_crit" + } + ] + } + }, + "DCDC6": { + "dev_info": { + "device_type": "DCDC", + "device_name": "DCDC6", + "device_parent": "MULTIFPGAPCIE2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x62", + "dev_addr": "0x62", + "dev_type": "nh_raa228244" + } + } + }, + "COMPONENT21": { + "comp_attr": { + "name": "DCDC6", + "type": "dcdc", + "description": "DCDC voltage regulator", + "boot_type": "none" + }, + "attr_list": [ + { + "attr_name": "version", + "get_cmd": "cat /sys/bus/i2c/devices/98-0062/hwmon/hwmon*/mfr_revision" + }, + { + "attr_name": "model", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "serial", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "revision", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "update", + "cmd": "/var/platform/fwpackage/fwpackage/update_firmware.py {{model_name}} DCDC6 {}" + } + ] + }, + "VOLTAGE29": { + "dev_info": { + "device_type": "VOLTAGE_SENSOR", + "device_name": "DCDC6-RAIL1", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "DCDC6" + }, + "dev_attr": { + "display_name": "POS0V8_PT_6" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "volt1_input", + "drv_attr_name": "in3_input" + }, + { + "attr_name": "volt1_high_threshold", + "drv_attr_name": "in3_max" + }, + { + "attr_name": "volt1_low_threshold", + "drv_attr_name": "in3_min" + }, + { + "attr_name": "volt1_crit_high_threshold", + "drv_attr_name": "in3_crit" + }, + { + "attr_name": "volt1_crit_low_threshold", + "drv_attr_name": "in3_lcrit" + } + ] + } + }, + "VOLTAGE30": { + "dev_info": { + "device_type": "VOLTAGE_SENSOR", + "device_name": "DCDC6-RAIL2", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "DCDC6" + }, + "dev_attr": { + "display_name": "POS0V8_PT_7" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "volt1_input", + "drv_attr_name": "in4_input" + }, + { + "attr_name": "volt1_high_threshold", + "drv_attr_name": "in4_max" + }, + { + "attr_name": "volt1_low_threshold", + "drv_attr_name": "in4_min" + }, + { + "attr_name": "volt1_crit_high_threshold", + "drv_attr_name": "in4_crit" + }, + { + "attr_name": "volt1_crit_low_threshold", + "drv_attr_name": "in4_lcrit" + } + ] + } + }, + "CURRENT12": { + "dev_info": { + "device_type": "CURRENT_SENSOR", + "device_name": "DCDC6-RAIL1", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "DCDC6" + }, + "dev_attr": { + "display_name": "POS0V8_PT_6" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "current1_input", + "drv_attr_name": "curr3_input" + }, + { + "attr_name": "current1_high_threshold", + "drv_attr_name": "curr3_max" + }, + { + "attr_name": "current1_crit_high_threshold", + "drv_attr_name": "curr3_crit" + } + ] + } + }, + "CURRENT13": { + "dev_info": { + "device_type": "CURRENT_SENSOR", + "device_name": "DCDC6-RAIL2", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "DCDC6" + }, + "dev_attr": { + "display_name": "POS0V8_PT_7" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "current1_input", + "drv_attr_name": "curr4_input" + }, + { + "attr_name": "current1_high_threshold", + "drv_attr_name": "curr4_max" + }, + { + "attr_name": "current1_crit_high_threshold", + "drv_attr_name": "curr4_crit" + } + ] + } + }, + "TEMP13": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "DCDC6-RAIL1", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "DCDC6", + "nexthop_thermal_pid_domain": "main", + "nexthop_thermal_setpoint_override": 95.0 + }, + "dev_attr": { + "display_name": "DCDC6" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "temp1_input", + "drv_attr_name": "temp1_input" + }, + { + "attr_name": "temp1_high_threshold", + "drv_attr_name": "temp1_max" + }, + { + "attr_name": "temp1_high_crit_threshold", + "drv_attr_name": "temp1_crit" + } + ] + } + }, + "DCDC7": { + "dev_info": { + "device_type": "DCDC", + "device_name": "DCDC7", + "device_parent": "MULTIFPGAPCIE2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x61", + "dev_addr": "0x63", + "dev_type": "nh_raa228244" + } + } + }, + "COMPONENT22": { + "comp_attr": { + "name": "DCDC7", + "type": "dcdc", + "description": "DCDC voltage regulator", + "boot_type": "none" + }, + "attr_list": [ + { + "attr_name": "version", + "get_cmd": "cat /sys/bus/i2c/devices/97-0063/hwmon/hwmon*/mfr_revision" + }, + { + "attr_name": "model", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "serial", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "revision", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "update", + "cmd": "/var/platform/fwpackage/fwpackage/update_firmware.py {{model_name}} DCDC7 {}" + } + ] + }, + "VOLTAGE31": { + "dev_info": { + "device_type": "VOLTAGE_SENSOR", + "device_name": "DCDC7-RAIL1", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "DCDC7" + }, + "dev_attr": { + "display_name": "POS0V8_PB_0" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "volt1_input", + "drv_attr_name": "in3_input" + }, + { + "attr_name": "volt1_high_threshold", + "drv_attr_name": "in3_max" + }, + { + "attr_name": "volt1_low_threshold", + "drv_attr_name": "in3_min" + }, + { + "attr_name": "volt1_crit_high_threshold", + "drv_attr_name": "in3_crit" + }, + { + "attr_name": "volt1_crit_low_threshold", + "drv_attr_name": "in3_lcrit" + } + ] + } + }, + "VOLTAGE32": { + "dev_info": { + "device_type": "VOLTAGE_SENSOR", + "device_name": "DCDC7-RAIL2", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "DCDC7" + }, + "dev_attr": { + "display_name": "POS0V8_PB_1" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "volt1_input", + "drv_attr_name": "in4_input" + }, + { + "attr_name": "volt1_high_threshold", + "drv_attr_name": "in4_max" + }, + { + "attr_name": "volt1_low_threshold", + "drv_attr_name": "in4_min" + }, + { + "attr_name": "volt1_crit_high_threshold", + "drv_attr_name": "in4_crit" + }, + { + "attr_name": "volt1_crit_low_threshold", + "drv_attr_name": "in4_lcrit" + } + ] + } + }, + "CURRENT14": { + "dev_info": { + "device_type": "CURRENT_SENSOR", + "device_name": "DCDC7-RAIL1", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "DCDC7" + }, + "dev_attr": { + "display_name": "POS0V8_PB_0" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "current1_input", + "drv_attr_name": "curr3_input" + }, + { + "attr_name": "current1_high_threshold", + "drv_attr_name": "curr3_max" + }, + { + "attr_name": "current1_crit_high_threshold", + "drv_attr_name": "curr3_crit" + } + ] + } + }, + "CURRENT15": { + "dev_info": { + "device_type": "CURRENT_SENSOR", + "device_name": "DCDC7-RAIL2", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "DCDC7" + }, + "dev_attr": { + "display_name": "POS0V8_PB_1" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "current1_input", + "drv_attr_name": "curr4_input" + }, + { + "attr_name": "current1_high_threshold", + "drv_attr_name": "curr4_max" + }, + { + "attr_name": "current1_crit_high_threshold", + "drv_attr_name": "curr4_crit" + } + ] + } + }, + "TEMP14": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "DCDC7-RAIL1", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "DCDC7", + "nexthop_thermal_pid_domain": "main", + "nexthop_thermal_setpoint_override": 95.0 + }, + "dev_attr": { + "display_name": "DCDC7" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "temp1_input", + "drv_attr_name": "temp1_input" + }, + { + "attr_name": "temp1_high_threshold", + "drv_attr_name": "temp1_max" + }, + { + "attr_name": "temp1_high_crit_threshold", + "drv_attr_name": "temp1_crit" + } + ] + } + }, + "DCDC8": { + "dev_info": { + "device_type": "DCDC", + "device_name": "DCDC8", + "device_parent": "MULTIFPGAPCIE2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x62", + "dev_addr": "0x63", + "dev_type": "nh_raa228244" + } + } + }, + "COMPONENT23": { + "comp_attr": { + "name": "DCDC8", + "type": "dcdc", + "description": "DCDC voltage regulator", + "boot_type": "none" + }, + "attr_list": [ + { + "attr_name": "version", + "get_cmd": "cat /sys/bus/i2c/devices/98-0063/hwmon/hwmon*/mfr_revision" + }, + { + "attr_name": "model", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "serial", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "revision", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "update", + "cmd": "/var/platform/fwpackage/fwpackage/update_firmware.py {{model_name}} DCDC8 {}" + } + ] + }, + "VOLTAGE33": { + "dev_info": { + "device_type": "VOLTAGE_SENSOR", + "device_name": "DCDC8-RAIL1", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "DCDC8" + }, + "dev_attr": { + "display_name": "POS0V8_PB_2" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "volt1_input", + "drv_attr_name": "in3_input" + }, + { + "attr_name": "volt1_high_threshold", + "drv_attr_name": "in3_max" + }, + { + "attr_name": "volt1_low_threshold", + "drv_attr_name": "in3_min" + }, + { + "attr_name": "volt1_crit_high_threshold", + "drv_attr_name": "in3_crit" + }, + { + "attr_name": "volt1_crit_low_threshold", + "drv_attr_name": "in3_lcrit" + } + ] + } + }, + "VOLTAGE34": { + "dev_info": { + "device_type": "VOLTAGE_SENSOR", + "device_name": "DCDC8-RAIL2", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "DCDC8" + }, + "dev_attr": { + "display_name": "POS0V8_PB_3" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "volt1_input", + "drv_attr_name": "in4_input" + }, + { + "attr_name": "volt1_high_threshold", + "drv_attr_name": "in4_max" + }, + { + "attr_name": "volt1_low_threshold", + "drv_attr_name": "in4_min" + }, + { + "attr_name": "volt1_crit_high_threshold", + "drv_attr_name": "in4_crit" + }, + { + "attr_name": "volt1_crit_low_threshold", + "drv_attr_name": "in4_lcrit" + } + ] + } + }, + "CURRENT16": { + "dev_info": { + "device_type": "CURRENT_SENSOR", + "device_name": "DCDC8-RAIL1", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "DCDC8" + }, + "dev_attr": { + "display_name": "POS0V8_PB_2" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "current1_input", + "drv_attr_name": "curr3_input" + }, + { + "attr_name": "current1_high_threshold", + "drv_attr_name": "curr3_max" + }, + { + "attr_name": "current1_crit_high_threshold", + "drv_attr_name": "curr3_crit" + } + ] + } + }, + "CURRENT17": { + "dev_info": { + "device_type": "CURRENT_SENSOR", + "device_name": "DCDC8-RAIL2", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "DCDC8" + }, + "dev_attr": { + "display_name": "POS0V8_PB_3" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "current1_input", + "drv_attr_name": "curr4_input" + }, + { + "attr_name": "current1_high_threshold", + "drv_attr_name": "curr4_max" + }, + { + "attr_name": "current1_crit_high_threshold", + "drv_attr_name": "curr4_crit" + } + ] + } + }, + "TEMP15": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "DCDC8-RAIL1", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "DCDC8", + "nexthop_thermal_pid_domain": "main", + "nexthop_thermal_setpoint_override": 95.0 + }, + "dev_attr": { + "display_name": "DCDC8" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "temp1_input", + "drv_attr_name": "temp1_input" + }, + { + "attr_name": "temp1_high_threshold", + "drv_attr_name": "temp1_max" + }, + { + "attr_name": "temp1_high_crit_threshold", + "drv_attr_name": "temp1_crit" + } + ] + } + }, + "DCDC9": { + "dev_info": { + "device_type": "DCDC", + "device_name": "DCDC9", + "device_parent": "MULTIFPGAPCIE2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x61", + "dev_addr": "0x72", + "dev_type": "nh_raa228244" + } + } + }, + "COMPONENT24": { + "comp_attr": { + "name": "DCDC9", + "type": "dcdc", + "description": "DCDC voltage regulator", + "boot_type": "none" + }, + "attr_list": [ + { + "attr_name": "version", + "get_cmd": "cat /sys/bus/i2c/devices/97-0072/hwmon/hwmon*/mfr_revision" + }, + { + "attr_name": "model", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "serial", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "revision", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "update", + "cmd": "/var/platform/fwpackage/fwpackage/update_firmware.py {{model_name}} DCDC9 {}" + } + ] + }, + "VOLTAGE35": { + "dev_info": { + "device_type": "VOLTAGE_SENSOR", + "device_name": "DCDC9-RAIL1", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "DCDC9" + }, + "dev_attr": { + "display_name": "POS3V3_WEST" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "volt1_input", + "drv_attr_name": "in3_input" + }, + { + "attr_name": "volt1_high_threshold", + "drv_attr_name": "in3_max" + }, + { + "attr_name": "volt1_low_threshold", + "drv_attr_name": "in3_min" + }, + { + "attr_name": "volt1_crit_high_threshold", + "drv_attr_name": "in3_crit" + }, + { + "attr_name": "volt1_crit_low_threshold", + "drv_attr_name": "in3_lcrit" + } + ] + } + }, + "CURRENT18": { + "dev_info": { + "device_type": "CURRENT_SENSOR", + "device_name": "DCDC9-RAIL1", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "DCDC9" + }, + "dev_attr": { + "display_name": "POS3V3_WEST" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "current1_input", + "drv_attr_name": "curr3_input" + }, + { + "attr_name": "current1_high_threshold", + "drv_attr_name": "curr3_max" + }, + { + "attr_name": "current1_crit_high_threshold", + "drv_attr_name": "curr3_crit" + } + ] + } + }, + "TEMP16": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "DCDC9-RAIL1", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "DCDC9", + "nexthop_thermal_pid_domain": "main", + "nexthop_thermal_setpoint_override": 95.0 + }, + "dev_attr": { + "display_name": "DCDC9" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "temp1_input", + "drv_attr_name": "temp1_input" + }, + { + "attr_name": "temp1_high_threshold", + "drv_attr_name": "temp1_max" + }, + { + "attr_name": "temp1_high_crit_threshold", + "drv_attr_name": "temp1_crit" + } + ] + } + }, + "DCDC10": { + "dev_info": { + "device_type": "DCDC", + "device_name": "DCDC10", + "device_parent": "MULTIFPGAPCIE2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x62", + "dev_addr": "0x72", + "dev_type": "nh_raa228244" + } + } + }, + "COMPONENT25": { + "comp_attr": { + "name": "DCDC10", + "type": "dcdc", + "description": "DCDC voltage regulator", + "boot_type": "none" + }, + "attr_list": [ + { + "attr_name": "version", + "get_cmd": "cat /sys/bus/i2c/devices/98-0072/hwmon/hwmon*/mfr_revision" + }, + { + "attr_name": "model", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "serial", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "revision", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "update", + "cmd": "/var/platform/fwpackage/fwpackage/update_firmware.py {{model_name}} DCDC10 {}" + } + ] + }, + "VOLTAGE36": { + "dev_info": { + "device_type": "VOLTAGE_SENSOR", + "device_name": "DCDC10-RAIL1", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "DCDC10" + }, + "dev_attr": { + "display_name": "POS3V3_EAST" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "volt1_input", + "drv_attr_name": "in3_input" + }, + { + "attr_name": "volt1_high_threshold", + "drv_attr_name": "in3_max" + }, + { + "attr_name": "volt1_low_threshold", + "drv_attr_name": "in3_min" + }, + { + "attr_name": "volt1_crit_high_threshold", + "drv_attr_name": "in3_crit" + }, + { + "attr_name": "volt1_crit_low_threshold", + "drv_attr_name": "in3_lcrit" + } + ] + } + }, + "CURRENT19": { + "dev_info": { + "device_type": "CURRENT_SENSOR", + "device_name": "DCDC10-RAIL1", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "DCDC10" + }, + "dev_attr": { + "display_name": "POS3V3_EAST" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "current1_input", + "drv_attr_name": "curr3_input" + }, + { + "attr_name": "current1_high_threshold", + "drv_attr_name": "curr3_max" + }, + { + "attr_name": "current1_crit_high_threshold", + "drv_attr_name": "curr3_crit" + } + ] + } + }, + "TEMP17": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "DCDC10-RAIL1", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "DCDC10", + "nexthop_thermal_pid_domain": "main", + "nexthop_thermal_setpoint_override": 95.0 + }, + "dev_attr": { + "display_name": "DCDC10" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "temp1_input", + "drv_attr_name": "temp1_input" + }, + { + "attr_name": "temp1_high_threshold", + "drv_attr_name": "temp1_max" + }, + { + "attr_name": "temp1_high_crit_threshold", + "drv_attr_name": "temp1_crit" + } + ] + } + }, + "DCDC11": { + "dev_info": { + "device_type": "DCDC", + "device_name": "DCDC11", + "device_parent": "MULTIFPGAPCIE2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x64", + "dev_addr": "0x62", + "dev_type": "nh_raa228244" + } + } + }, + "COMPONENT26": { + "comp_attr": { + "name": "DCDC11", + "type": "dcdc", + "description": "DCDC voltage regulator", + "boot_type": "none" + }, + "attr_list": [ + { + "attr_name": "version", + "get_cmd": "cat /sys/bus/i2c/devices/100-0062/hwmon/hwmon*/mfr_revision" + }, + { + "attr_name": "model", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "serial", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "revision", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "update", + "cmd": "/var/platform/fwpackage/fwpackage/update_firmware.py {{model_name}} DCDC11 {}" + } + ] + }, + "VOLTAGE37": { + "dev_info": { + "device_type": "VOLTAGE_SENSOR", + "device_name": "DCDC11-RAIL1", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "DCDC11" + }, + "dev_attr": { + "display_name": "POS3V3_WEST_MEZZ0" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "volt1_input", + "drv_attr_name": "in3_input" + }, + { + "attr_name": "volt1_high_threshold", + "drv_attr_name": "in3_max" + }, + { + "attr_name": "volt1_low_threshold", + "drv_attr_name": "in3_min" + }, + { + "attr_name": "volt1_crit_high_threshold", + "drv_attr_name": "in3_crit" + }, + { + "attr_name": "volt1_crit_low_threshold", + "drv_attr_name": "in3_lcrit" + } + ] + } + }, + "VOLTAGE38": { + "dev_info": { + "device_type": "VOLTAGE_SENSOR", + "device_name": "DCDC11-RAIL2", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "DCDC11" + }, + "dev_attr": { + "display_name": "POS3V3_EAST_MEZZ0" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "volt1_input", + "drv_attr_name": "in4_input" + }, + { + "attr_name": "volt1_high_threshold", + "drv_attr_name": "in4_max" + }, + { + "attr_name": "volt1_low_threshold", + "drv_attr_name": "in4_min" + }, + { + "attr_name": "volt1_crit_high_threshold", + "drv_attr_name": "in4_crit" + }, + { + "attr_name": "volt1_crit_low_threshold", + "drv_attr_name": "in4_lcrit" + } + ] + } + }, + "CURRENT20": { + "dev_info": { + "device_type": "CURRENT_SENSOR", + "device_name": "DCDC11-RAIL1", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "DCDC11" + }, + "dev_attr": { + "display_name": "POS3V3_WEST_MEZZ0" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "current1_input", + "drv_attr_name": "curr3_input" + }, + { + "attr_name": "current1_high_threshold", + "drv_attr_name": "curr3_max" + }, + { + "attr_name": "current1_crit_high_threshold", + "drv_attr_name": "curr3_crit" + } + ] + } + }, + "CURRENT21": { + "dev_info": { + "device_type": "CURRENT_SENSOR", + "device_name": "DCDC11-RAIL2", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "DCDC11" + }, + "dev_attr": { + "display_name": "POS3V3_EAST_MEZZ0" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "current1_input", + "drv_attr_name": "curr4_input" + }, + { + "attr_name": "current1_high_threshold", + "drv_attr_name": "curr4_max" + }, + { + "attr_name": "current1_crit_high_threshold", + "drv_attr_name": "curr4_crit" + } + ] + } + }, + "TEMP18": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "DCDC11-RAIL1", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "DCDC11", + "nexthop_thermal_pid_domain": "main", + "nexthop_thermal_setpoint_override": 95.0 + }, + "dev_attr": { + "display_name": "DCDC0_MEZZ0" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "temp1_input", + "drv_attr_name": "temp1_input" + }, + { + "attr_name": "temp1_high_threshold", + "drv_attr_name": "temp1_max" + }, + { + "attr_name": "temp1_high_crit_threshold", + "drv_attr_name": "temp1_crit" + } + ] + } + }, + "DCDC12": { + "dev_info": { + "device_type": "DCDC", + "device_name": "DCDC12", + "device_parent": "MULTIFPGAPCIE2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x65", + "dev_addr": "0x62", + "dev_type": "nh_raa228244" + } + } + }, + "COMPONENT27": { + "comp_attr": { + "name": "DCDC12", + "type": "dcdc", + "description": "DCDC voltage regulator", + "boot_type": "none" + }, + "attr_list": [ + { + "attr_name": "version", + "get_cmd": "cat /sys/bus/i2c/devices/101-0062/hwmon/hwmon*/mfr_revision" + }, + { + "attr_name": "model", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "serial", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "revision", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "update", + "cmd": "/var/platform/fwpackage/fwpackage/update_firmware.py {{model_name}} DCDC12 {}" + } + ] + }, + "VOLTAGE39": { + "dev_info": { + "device_type": "VOLTAGE_SENSOR", + "device_name": "DCDC12-RAIL1", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "DCDC12" + }, + "dev_attr": { + "display_name": "POS3V3_WEST_MEZZ1" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "volt1_input", + "drv_attr_name": "in3_input" + }, + { + "attr_name": "volt1_high_threshold", + "drv_attr_name": "in3_max" + }, + { + "attr_name": "volt1_low_threshold", + "drv_attr_name": "in3_min" + }, + { + "attr_name": "volt1_crit_high_threshold", + "drv_attr_name": "in3_crit" + }, + { + "attr_name": "volt1_crit_low_threshold", + "drv_attr_name": "in3_lcrit" + } + ] + } + }, + "VOLTAGE40": { + "dev_info": { + "device_type": "VOLTAGE_SENSOR", + "device_name": "DCDC12-RAIL2", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "DCDC12" + }, + "dev_attr": { + "display_name": "POS3V3_EAST_MEZZ1" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "volt1_input", + "drv_attr_name": "in4_input" + }, + { + "attr_name": "volt1_high_threshold", + "drv_attr_name": "in4_max" + }, + { + "attr_name": "volt1_low_threshold", + "drv_attr_name": "in4_min" + }, + { + "attr_name": "volt1_crit_high_threshold", + "drv_attr_name": "in4_crit" + }, + { + "attr_name": "volt1_crit_low_threshold", + "drv_attr_name": "in4_lcrit" + } + ] + } + }, + "CURRENT22": { + "dev_info": { + "device_type": "CURRENT_SENSOR", + "device_name": "DCDC12-RAIL1", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "DCDC12" + }, + "dev_attr": { + "display_name": "POS3V3_WEST_MEZZ1" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "current1_input", + "drv_attr_name": "curr3_input" + }, + { + "attr_name": "current1_high_threshold", + "drv_attr_name": "curr3_max" + }, + { + "attr_name": "current1_crit_high_threshold", + "drv_attr_name": "curr3_crit" + } + ] + } + }, + "CURRENT23": { + "dev_info": { + "device_type": "CURRENT_SENSOR", + "device_name": "DCDC12-RAIL2", + "device_parent": "MULTIFPGAPCIE2", + "virt_parent": "DCDC12" + }, + "dev_attr": { + "display_name": "POS3V3_EAST_MEZZ1" + }, + "i2c": { + "attr_list": [ + { + "attr_name": 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+ "breakout_modes": { + "1x800G": [ + "etp126" + ], + "2x400G": [ + "etp126a", + "etp126b" + ], + "4x200G": [ + "etp126a", + "etp126b", + "etp126c", + "etp126d" + ], + "8x100G": [ + "etp126a", + "etp126b", + "etp126c", + "etp126d", + "etp126e", + "etp126f", + "etp126g", + "etp126h" + ] + }, + "index": "126,126,126,126,126,126,126,126", + "lanes": "937,938,939,940,941,942,943,944" + }, + "Ethernet1008": { + "breakout_modes": { + "1x800G": [ + "etp127" + ], + "2x400G": [ + "etp127a", + "etp127b" + ], + "4x200G": [ + "etp127a", + "etp127b", + "etp127c", + "etp127d" + ], + "8x100G": [ + "etp127a", + "etp127b", + "etp127c", + "etp127d", + "etp127e", + "etp127f", + "etp127g", + "etp127h" + ] + }, + "index": "127,127,127,127,127,127,127,127", + "lanes": "945,946,947,948,949,950,951,952" + }, + "Ethernet1016": { + "breakout_modes": { + "1x800G": [ + "etp128" + ], + "2x400G": [ + "etp128a", + "etp128b" + ], + "4x200G": [ + "etp128a", + "etp128b", + "etp128c", + "etp128d" + ], + "8x100G": [ + "etp128a", + "etp128b", + "etp128c", + "etp128d", + "etp128e", + "etp128f", + "etp128g", + "etp128h" + ] + }, + "index": "128,128,128,128,128,128,128,128", + "lanes": "953,954,955,956,957,958,959,960" + }, + "Ethernet1024": { + "breakout_modes": { + "1x100G": [ + "etp129" + ], + "2x50G": [ + "etp129a", + "etp129b" + ], + "4x25G": [ + "etp129a", + "etp129b", + "etp129c", + "etp129d" + ] + }, + "index": "129,129,129,129", + "lanes": "1026,1027,1028,1029" + } + }, + "chassis": { + "name": "NH-4210-F", + "thermals": [ + { + "name": "CPU", + "low-threshold": false, + "low-crit-threshold": false, + "controllable": false + }, + { + "name": "Switch Card Lower Rear", + "low-threshold": false, + "low-crit-threshold": false + }, + { + "name": "PSU 2 Intake", + "low-threshold": false, + "low-crit-threshold": false + }, + { + "name": "ASIC Diode 0", + "low-threshold": false, + "low-crit-threshold": false + }, + { + "name": "ASIC Diode 1", + "low-threshold": false, + "low-crit-threshold": false + }, + { + "name": "ASIC Diode 2", + "low-threshold": false, + "low-crit-threshold": false + }, + { + "name": "DCDC0", + "low-threshold": false, + "low-crit-threshold": false + }, + { + "name": "DCDC1", + "low-threshold": false, + "low-crit-threshold": false + }, + { + "name": "DCDC2", + "low-threshold": false, + "low-crit-threshold": false + }, + { + "name": "DCDC3", + "low-threshold": false, + "low-crit-threshold": false + }, + { + "name": "DCDC4", + "low-threshold": false, + "low-crit-threshold": false + }, + { + "name": "DCDC5", + "low-threshold": false, + "low-crit-threshold": false + }, + { + "name": "DCDC6", + "low-threshold": false, + "low-crit-threshold": false + }, + { + "name": "DCDC7", + "low-threshold": false, + "low-crit-threshold": false + }, + { + "name": "DCDC8", + "low-threshold": false, + "low-crit-threshold": false + }, + { + "name": "DCDC9", + "low-threshold": false, + "low-crit-threshold": false + }, + { + "name": "DCDC10", + "low-threshold": false, + "low-crit-threshold": false + }, + { + "name": "DCDC0_MEZZ0", + "low-threshold": false, + "low-crit-threshold": false + }, + { + "name": "DCDC0_MEZZ1", + "low-threshold": false, + "low-crit-threshold": false + }, + { + "name": "ASIC Min", + "low-threshold": false, + "low-crit-threshold": false, + "controllable": false + }, + { + "name": "ASIC Max", + "low-threshold": false, + "low-crit-threshold": false, + "controllable": false + } + ], + "components": [ + { + "name": "CPUCARD_FPGA" + }, + { + "name": "SWITCHCARD_FPGA0" + }, + { + "name": "SWITCHCARD_FPGA1" + }, + { + "name": "BIOS" + }, + { + "name": "ONIE" + }, + { + "name": "TPM" + }, + { + "name": "NVMe" + }, + { + "name": "ASIC_PCIE" + }, + { + "name": "PSU1" + }, + { + "name": "PSU2" + }, + { + "name": "PSU3" + }, + { + "name": "PSU4" + }, + { + "name": "DPM1" + }, + { + "name": "DPM2" + }, + { + "name": "DPM3" + }, + { + "name": "DCDC1" + }, + { + "name": "DCDC2" + }, + { + "name": "DCDC3" + }, + { + "name": "DCDC4" + }, + { + "name": "DCDC5" + }, + { + "name": "DCDC6" + }, + { + "name": "DCDC7" + }, + { + "name": "DCDC8" + }, + { + "name": "DCDC9" + }, + { + "name": "DCDC10" + }, + { + "name": "DCDC11" + }, + { + "name": "DCDC12" + } + ], + "fans": [ + { + "name": "Fantray1_1", + "status_led": { + "available": false + } + }, + { + "name": "Fantray1_2", + "status_led": { + "available": false + } + }, + { + "name": "Fantray2_1", + "status_led": { + "available": false + } + }, + { + "name": "Fantray2_2", + "status_led": { + "available": false + } + }, + { + "name": "Fantray3_1", + "status_led": { + "available": false + } + }, + { + "name": "Fantray3_2", + "status_led": { + "available": false + } + }, + { + "name": "Fantray4_1", + "status_led": { + "available": false + } + }, + { + "name": "Fantray4_2", + "status_led": { + "available": false + } + }, + { + "name": "Fantray5_1", + "status_led": { + "available": false + } + }, + { + "name": "Fantray5_2", + "status_led": { + "available": false + } + }, + { + "name": "Fantray6_1", + "status_led": { + "available": false + } + }, + { + "name": "Fantray6_2", + "status_led": { + "available": false + } + }, + { + "name": "Fantray7_1", + "status_led": { + "available": false + } + }, + { + "name": "Fantray7_2", + "status_led": { + "available": false + } + }, + { + "name": "Fantray8_1", + "status_led": { + "available": false + } + }, + { + "name": "Fantray8_2", + "status_led": { + "available": false + } + } + ], + "fan_drawers": [ + { + "name": "Fantray1", + "num_fans": 2, + "max_consumed_power": false, + "fans": [ + { + "name": "Fantray1_1", + "status_led": { + "available": false + } + }, + { + "name": "Fantray1_2", + "status_led": { + "available": false + } + } + ], + "status_led": { + "controllable": true, + "colors": [ + "green", + "red", + "off" + ] + } + }, + { + "name": "Fantray2", + "num_fans": 2, + "max_consumed_power": false, + "fans": [ + { + "name": "Fantray2_1", + "status_led": { + "available": false + } + }, + { + "name": "Fantray2_2", + "status_led": { + "available": false + } + } + ], + "status_led": { + "controllable": true, + "colors": [ + "green", + "red", + "off" + ] + } + }, + { + "name": "Fantray3", + "num_fans": 2, + "max_consumed_power": false, + "fans": [ + { + "name": "Fantray3_1", + "status_led": { + "available": false + } + }, + { + "name": "Fantray3_2", + "status_led": { + "available": false + } + } + ], + "status_led": { + "controllable": true, + "colors": [ + "green", + "red", + "off" + ] + } + }, + { + "name": "Fantray4", + "num_fans": 2, + "max_consumed_power": false, + "fans": [ + { + "name": "Fantray4_1", + "status_led": { + "available": false + } + }, + { + "name": "Fantray4_2", + "status_led": { + "available": false + } + } + ], + "status_led": { + "controllable": true, + "colors": [ + "green", + "red", + "off" + ] + } + }, + { + "name": "Fantray5", + "num_fans": 2, + "max_consumed_power": false, + "fans": [ + { + "name": "Fantray5_1", + "status_led": { + "available": false + } + }, + { + "name": "Fantray5_2", + "status_led": { + "available": false + } + } + ], + "status_led": { + "controllable": true, + "colors": [ + "green", + "red", + "off" + ] + } + }, + { + "name": "Fantray6", + "num_fans": 2, + "max_consumed_power": false, + "fans": [ + { + "name": "Fantray6_1", + "status_led": { + "available": false + } + }, + { + "name": "Fantray6_2", + "status_led": { + "available": false + } + } + ], + "status_led": { + "controllable": true, + "colors": [ + "green", + "red", + "off" + ] + } + }, + { + "name": "Fantray7", + "num_fans": 2, + "max_consumed_power": false, + "fans": [ + { + "name": "Fantray7_1", + "status_led": { + "available": false + } + }, + { + "name": "Fantray7_2", + "status_led": { + "available": false + } + } + ], + "status_led": { + "controllable": true, + "colors": [ + "green", + "red", + "off" + ] + } + }, + { + "name": "Fantray8", + "num_fans": 2, + "max_consumed_power": false, + "fans": [ + { + "name": "Fantray8_1", + "status_led": { + "available": false + } + }, + { + "name": "Fantray8_2", + "status_led": { + "available": false + } + } + ], + "status_led": { + "controllable": true, + "colors": [ + "green", + "red", + "off" + ] + } + } + ], + "psus": [ + { + "name": "PSU1", + "status_led": { + "controllable": false + }, + "fans": [ + { + "name": "PSU1_FAN1", + "speed": { + "controllable": false + }, + "status_led": { + "controllable": false + } + } + ], + "thermals": [ + { + "name": "PSU1_TEMP1" + }, + { + "name": "PSU1_TEMP2" + }, + { + "name": "PSU1_TEMP3" + } + ] + }, + { + "name": "PSU2", + "status_led": { + "controllable": false + }, + "fans": [ + { + "name": "PSU2_FAN1", + "speed": { + "controllable": false + }, + "status_led": { + "controllable": false + } + } + ], + "thermals": [ + { + "name": "PSU2_TEMP1" + }, + { + "name": "PSU2_TEMP2" + }, + { + "name": "PSU2_TEMP3" + } + ] + }, + { + "name": "PSU3", + "status_led": { + "controllable": false + }, + "fans": [ + { + "name": "PSU3_FAN1", + "speed": { + "controllable": false + }, + "status_led": { + "controllable": false + } + } + ], + "thermals": [ + { + "name": "PSU3_TEMP1" + }, + { + "name": "PSU3_TEMP2" + }, + { + "name": "PSU3_TEMP3" + } + ] + }, + { + "name": "PSU4", + "status_led": { + "controllable": false + }, + "fans": [ + { + "name": "PSU4_FAN1", + "speed": { + "controllable": false + }, + "status_led": { + "controllable": false + } + } + ], + "thermals": [ + { + "name": "PSU4_TEMP1" + }, + { + "name": "PSU4_TEMP2" + }, + { + "name": "PSU4_TEMP3" + } + ] + } + ], + "sfps": [ + { + "name": "PORT1" + }, + { + "name": "PORT2" + }, + { + "name": "PORT3" + }, + { + "name": "PORT4" + }, + { + "name": "PORT5" + }, + { + "name": "PORT6" + }, + { + "name": "PORT7" + }, + { + "name": "PORT8" + }, + { + "name": "PORT9" + }, + { + "name": "PORT10" + }, + { + "name": "PORT11" + }, + { + "name": "PORT12" + }, + { + "name": "PORT13" + }, + { + "name": "PORT14" + }, + { + "name": "PORT15" + }, + { + "name": "PORT16" + }, + { + "name": "PORT17" + }, + { + "name": "PORT18" + }, + { + "name": "PORT19" + }, + { + "name": "PORT20" + }, + { + "name": "PORT21" + }, + { + "name": "PORT22" + }, + { + "name": "PORT23" + }, + { + "name": "PORT24" + }, + { + "name": "PORT25" + }, + { + "name": "PORT26" + }, + { + "name": "PORT27" + }, + { + "name": "PORT28" + }, + { + "name": "PORT29" + }, + { + "name": "PORT30" + }, + { + "name": "PORT31" + }, + { + "name": "PORT32" + }, + { + "name": "PORT33" + }, + { + "name": "PORT34" + }, + { + "name": "PORT35" + }, + { + "name": "PORT36" + }, + { + "name": "PORT37" + }, + { + "name": "PORT38" + }, + { + "name": "PORT39" + }, + { + "name": "PORT40" + }, + { + "name": "PORT41" + }, + { + "name": "PORT42" + }, + { + "name": "PORT43" + }, + { + "name": "PORT44" + }, + { + "name": "PORT45" + }, + { + "name": "PORT46" + }, + { + "name": "PORT47" + }, + { + "name": "PORT48" + }, + { + "name": "PORT49" + }, + { + "name": "PORT50" + }, + { + "name": "PORT51" + }, + { + "name": "PORT52" + }, + { + "name": "PORT53" + }, + { + "name": "PORT54" + }, + { + "name": "PORT55" + }, + { + "name": "PORT56" + }, + { + "name": "PORT57" + }, + { + "name": "PORT58" + }, + { + "name": "PORT59" + }, + { + "name": "PORT60" + }, + { + "name": "PORT61" + }, + { + "name": "PORT62" + }, + { + "name": "PORT63" + }, + { + "name": "PORT64" + }, + { + "name": "PORT65" + }, + { + "name": "PORT66" + }, + { + "name": "PORT67" + }, + { + "name": "PORT68" + }, + { + "name": "PORT69" + }, + { + "name": "PORT70" + }, + { + "name": "PORT71" + }, + { + "name": "PORT72" + }, + { + "name": "PORT73" + }, + { + "name": "PORT74" + }, + { + "name": "PORT75" + }, + { + "name": "PORT76" + }, + { + "name": "PORT77" + }, + { + "name": "PORT78" + }, + { + "name": "PORT79" + }, + { + "name": "PORT80" + }, + { + "name": "PORT81" + }, + { + "name": "PORT82" + }, + { + "name": "PORT83" + }, + { + "name": "PORT84" + }, + { + "name": "PORT85" + }, + { + "name": "PORT86" + }, + { + "name": "PORT87" + }, + { + "name": "PORT88" + }, + { + "name": "PORT89" + }, + { + "name": "PORT90" + }, + { + "name": "PORT91" + }, + { + "name": "PORT92" + }, + { + "name": "PORT93" + }, + { + "name": "PORT94" + }, + { + "name": "PORT95" + }, + { + "name": "PORT96" + }, + { + "name": "PORT97" + }, + { + "name": "PORT98" + }, + { + "name": "PORT99" + }, + { + "name": "PORT100" + }, + { + "name": "PORT101" + }, + { + "name": "PORT102" + }, + { + "name": "PORT103" + }, + { + "name": "PORT104" + }, + { + "name": "PORT105" + }, + { + "name": "PORT106" + }, + { + "name": "PORT107" + }, + { + "name": "PORT108" + }, + { + "name": "PORT109" + }, + { + "name": "PORT110" + }, + { + "name": "PORT111" + }, + { + "name": "PORT112" + }, + { + "name": "PORT113" + }, + { + "name": "PORT114" + }, + { + "name": "PORT115" + }, + { + "name": "PORT116" + }, + { + "name": "PORT117" + }, + { + "name": "PORT118" + }, + { + "name": "PORT119" + }, + { + "name": "PORT120" + }, + { + "name": "PORT121" + }, + { + "name": "PORT122" + }, + { + "name": "PORT123" + }, + { + "name": "PORT124" + }, + { + "name": "PORT125" + }, + { + "name": "PORT126" + }, + { + "name": "PORT127" + }, + { + "name": "PORT128" + }, + { + "name": "PORT129" + } + ] + } +} diff --git a/device/nexthop/x86_64-nexthop_4210-r0021/platform_asic b/device/nexthop/x86_64-nexthop_4210-r0021/platform_asic new file mode 100644 index 00000000000..96046765276 --- /dev/null +++ b/device/nexthop/x86_64-nexthop_4210-r0021/platform_asic @@ -0,0 +1 @@ +broadcom diff --git a/device/nexthop/x86_64-nexthop_4210-r0021/platform_components.json b/device/nexthop/x86_64-nexthop_4210-r0021/platform_components.json new file mode 100644 index 00000000000..e0d19bc9391 --- /dev/null +++ b/device/nexthop/x86_64-nexthop_4210-r0021/platform_components.json @@ -0,0 +1,33 @@ +{ + "chassis": { + "NH-4210-F": { + "component": { + "CPUCARD_FPGA": {}, + "SWITCHCARD_FPGA0": {}, + "SWITCHCARD_FPGA1": {}, + "BIOS": {}, + "ONIE": {}, + "TPM": {}, + "NVMe": {}, + "PSU1": {}, + "PSU2": {}, + "PSU3": {}, + "PSU4": {}, + "DPM1": {}, + "DPM2": {}, + "DCDC1": {}, + "DCDC2": {}, + "DCDC3": {}, + "DCDC4": {}, + "DCDC5": {}, + "DCDC6": {}, + "DCDC7": {}, + "DCDC8": {}, + "DCDC9": {}, + "DCDC10": {}, + "DCDC11": {}, + "DCDC12": {} + } + } + } +} diff --git a/device/nexthop/x86_64-nexthop_4210-r0021/platform_env.conf b/device/nexthop/x86_64-nexthop_4210-r0021/platform_env.conf new file mode 100644 index 00000000000..fc119184d5c --- /dev/null +++ b/device/nexthop/x86_64-nexthop_4210-r0021/platform_env.conf @@ -0,0 +1,2 @@ +is_ltsw_chip=1 +SYNCD_SHM_SIZE=1g diff --git a/device/nexthop/x86_64-nexthop_4210-r0021/plugins/led_control.py b/device/nexthop/x86_64-nexthop_4210-r0021/plugins/led_control.py new file mode 120000 index 00000000000..4c221b4b181 --- /dev/null +++ b/device/nexthop/x86_64-nexthop_4210-r0021/plugins/led_control.py @@ -0,0 +1 @@ +../../common/plugins/led_control.py \ No newline at end of file diff --git a/device/nexthop/x86_64-nexthop_4210-r0021/pmon_daemon_control.json b/device/nexthop/x86_64-nexthop_4210-r0021/pmon_daemon_control.json new file mode 120000 index 00000000000..55ab421a92a --- /dev/null +++ b/device/nexthop/x86_64-nexthop_4210-r0021/pmon_daemon_control.json @@ -0,0 +1 @@ +../common/pmon_daemon_control.json \ No newline at end of file diff --git a/device/nexthop/x86_64-nexthop_4210-r0021/sensors.conf b/device/nexthop/x86_64-nexthop_4210-r0021/sensors.conf new file mode 100644 index 00000000000..b24584373b3 --- /dev/null +++ b/device/nexthop/x86_64-nexthop_4210-r0021/sensors.conf @@ -0,0 +1,52 @@ +# libsensors configuration file +# ---------------------------------------------- +# + +chip "nh_tmp464-*" + label temp1 "Switch Card Lower Rear" + label temp2 "PSU 2 Intake" + label temp3 "ASIC Diode 0" + label temp4 "ASIC Diode 1" + label temp5 "ASIC Diode 2" + + # In HW vs kernel driver, max/crit are swapped. + set temp1_crit 87 + set temp1_max 125 + set temp2_crit 55 + set temp2_max 125 + set temp3_crit 115 + set temp3_max 122 + set temp4_crit 115 + set temp4_max 122 + set temp5_crit 115 + set temp5_max 122 + ignore temp6 + ignore temp7 + ignore temp8 + ignore temp9 + +chip "tmp451-*" + label temp2 "Chassis Intake" + + set temp2_max 45 + set temp2_crit 65 + +# Note: k10temp driver does not support writing max/crit values, so we rely on +# pddf-device.json to provide the values instead. +chip "k10temp-pci-*" + label temp1 "CPU" + +# The NVME drive doesn't populate min and max temps for these sensors, ignore +# them to not get I/O errors. +chip "nvme-pci-*" + ignore temp2 + ignore temp3 + ignore temp4 + +chip "nh_xdpe1a2g5b-*" + set temp1_max 120 + set temp1_crit 130 + +chip "nh_raa228244-*" + set temp1_max 120 + set temp1_crit 130 diff --git a/device/nexthop/x86_64-nexthop_4210-r0021/system_health_monitoring_config.json b/device/nexthop/x86_64-nexthop_4210-r0021/system_health_monitoring_config.json new file mode 100644 index 00000000000..c5d5a51365a --- /dev/null +++ b/device/nexthop/x86_64-nexthop_4210-r0021/system_health_monitoring_config.json @@ -0,0 +1,16 @@ +{ + "services_to_ignore": [], + "devices_to_ignore": [ + "PSU1_FAN1.speed", + "PSU2_FAN1.speed", + "PSU3_FAN1.speed", + "PSU4_FAN1.speed" + ], + "user_defined_checkers": [], + "polling_interval": 60, + "led_color": { + "fault": "red", + "normal": "green", + "booting": "green_blink" + } +} diff --git a/device/nexthop/x86_64-nexthop_4210-r0021/thermal_policy.json b/device/nexthop/x86_64-nexthop_4210-r0021/thermal_policy.json new file mode 100644 index 00000000000..5d087ff4aa6 --- /dev/null +++ b/device/nexthop/x86_64-nexthop_4210-r0021/thermal_policy.json @@ -0,0 +1,168 @@ +{ + "interval": 5, + "info_types": [ + { + "type": "fan_drawer_info" + }, + { + "type": "thermal_info" + }, + { + "type": "psu_info" + } + ], + "policies": [ + { + "name": "One fan drawer present", + "conditions": [ + { + "type": "fandrawer.one.present" + } + ], + "actions": [ + { + "type": "fan.set_max_speed", + "max_speed": 100 + }, + { + "type": "fan.set_speed", + "speed": 100 + } + ] + }, + { + "name": "Two fan drawers present", + "conditions": [ + { + "type": "fandrawer.two.present" + } + ], + "actions": [ + { + "type": "fan.set_max_speed", + "max_speed": 100 + }, + { + "type": "fan.set_speed", + "speed": 100 + } + ] + }, + { + "name": "Three fan drawers present", + "conditions": [ + { + "type": "fandrawer.three.present" + } + ], + "actions": [ + { + "type": "fan.set_max_speed", + "max_speed": 100 + } + ] + }, + { + "name": "Four fan drawers present", + "conditions": [ + { + "type": "fandrawer.four.present" + } + ], + "actions": [ + { + "type": "fan.set_max_speed", + "max_speed": 100 + } + ] + }, + { + "name": "Five fan drawers present", + "conditions": [ + { + "type": "fandrawer.five.present" + } + ], + "actions": [ + { + "type": "fan.set_max_speed", + "max_speed": 100 + } + ] + }, + { + "name": "Six fan drawers present", + "conditions": [ + { + "type": "fandrawer.six.present" + } + ], + "actions": [ + { + "type": "fan.set_max_speed", + "max_speed": 100 + } + ] + }, + { + "name": "Seven fan drawers present", + "conditions": [ + { + "type": "fandrawer.seven.present" + } + ], + "actions": [ + { + "type": "fan.set_max_speed", + "max_speed": 100 + } + ] + }, + { + "name": "Eight fan drawers present", + "conditions": [ + { + "type": "fandrawer.eight.present" + } + ], + "actions": [ + { + "type": "fan.set_max_speed", + "max_speed": 100 + } + ] + }, + { + "name": "thermal control algorithm", + "conditions": [ + { + "type": "default.operation" + } + ], + "actions": [ + { + "type": "thermal.control_algo", + "fan_limits": { + "min": 30 + }, + "pid_domains": { + "asic": { + "KP": 10, + "KI": 0.1, + "KD": 5 + }, + "main": { + "KP": 5, + "KI": 0.05, + "KD": 2.5 + } + }, + "constants": { + "interval": 5 + } + } + ] + } + ] +} + diff --git a/device/nexthop/x86_64-nexthop_4220-r0/installer.conf b/device/nexthop/x86_64-nexthop_4220-r0/installer.conf new file mode 120000 index 00000000000..97b3314541b --- /dev/null +++ b/device/nexthop/x86_64-nexthop_4220-r0/installer.conf @@ -0,0 +1 @@ +../x86_64-nexthop_4010-r0/installer.conf \ No newline at end of file diff --git a/device/nexthop/x86_64-nexthop_4220-r0/pcie-variables.yaml b/device/nexthop/x86_64-nexthop_4220-r0/pcie-variables.yaml index d3e0018cf93..8c5ff2b49ab 120000 --- a/device/nexthop/x86_64-nexthop_4220-r0/pcie-variables.yaml +++ b/device/nexthop/x86_64-nexthop_4220-r0/pcie-variables.yaml @@ -1 +1 @@ -../x86_64-nexthop_4010-r0/pcie-variables.yaml \ No newline at end of file +../common/komodo/pcie-variables.yaml \ No newline at end of file diff --git a/device/nexthop/x86_64-nexthop_4220-r0/pddf/pd-plugin.json b/device/nexthop/x86_64-nexthop_4220-r0/pddf/pd-plugin.json index 2d6bf0648be..309fe48c69d 100644 --- a/device/nexthop/x86_64-nexthop_4220-r0/pddf/pd-plugin.json +++ b/device/nexthop/x86_64-nexthop_4220-r0/pddf/pd-plugin.json @@ -1,4 +1,196 @@ { + "DPM": { + "cpu_card": { + "type": "adm1266", + "dpm": "DPM1", + "dpm_signal_to_fault_cause": [ + { + "pdio_mask": "0xC002", + "gpio_mask": "0x0000", + "pdio_value": "0x4000", + "gpio_value": "0x0000", + "hw_cause": "THERMTRIP_L", + "hw_desc": "CPU exceeded Tdie temperature threshold", + "reboot_cause": "REBOOT_CAUSE_THERMAL_OVERLOAD_CPU" + }, + { + "pdio_mask": "0xC002", + "gpio_mask": "0x0000", + "pdio_value": "0x8000", + "gpio_value": "0x0000", + "hw_cause": "CPU_PWR_CYC_REQ", + "hw_desc": "CPU requested power cycle", + "reboot_cause": "REBOOT_CAUSE_POWER_LOSS" + }, + { + "pdio_mask": "0xC002", + "gpio_mask": "0x0000", + "pdio_value": "0xC000", + "gpio_value": "0x0000", + "hw_cause": "BMC_PWR_CYC_REQ", + "hw_desc": "BMC requested power cycle", + "reboot_cause": "REBOOT_CAUSE_POWER_LOSS" + }, + { + "pdio_mask": "0xC002", + "gpio_mask": "0x0000", + "pdio_value": "0x0002", + "gpio_value": "0x0000", + "hw_cause": "FPGA_PWR_CYC_REQ", + "hw_desc": "FPGA requested power cycle", + "reboot_cause": "REBOOT_CAUSE_POWER_LOSS" + }, + { + "pdio_mask": "0xC002", + "gpio_mask": "0x0000", + "pdio_value": "0x4002", + "gpio_value": "0x0000", + "hw_cause": "SWITCH_CARD_CP_PWR_BAD", + "hw_desc": "Switch card control plane power failure", + "reboot_cause": "REBOOT_CAUSE_HARDWARE_OTHER" + } + ], + "pin_to_name": { + "VH1": "POS12V", + "VH2": "POS5V0", + "VH4": "POS5V0_S0", + "VP1": "POS1V0_A7", + "VP2": "POS1V8_V7", + "VP3": "POS3V3", + "VP4": "POS1V0", + "VP5": "POS1V2_A7", + "VP6": "POS0V75_S5", + "VP7": "POS1V8_S5", + "VP8": "POS3V3_S5", + "VP9": "POS1V1_S0", + "VP10": "POS0V78_S0", + "VP11": "POS0V75_S0", + "VP12": "POS1V8_S0", + "VP13": "POS3V3_S0" + } + }, + "switch_card_1": { + "type": "adm1266", + "dpm": "DPM2", + "dpm_signal_to_fault_cause": [ ], + "pin_to_name": { + "VH1": "12V", + "VH2": "5V0", + "VH3": "0V8_PT0", + "VH4": "0V9_WEST", + "VP1": "0V75_WEST", + "VP2": "0V8_PT2", + "VP3": "1V0", + "VP4": "3V3_WEST", + "VP5": "0V8_VDDC", + "VP6": "0V8_VDDC_IMON", + "VP7": "1V2_CP", + "VP8": "0V8", + "VP9": "0V9_PVDD_0", + "VP10": "0V9_PVDD_1", + "VP11": "0V8_PB0", + "VP12": "0V8_PB1", + "VP13": "1V8" + } + }, + "switch_card_2": { + "type": "adm1266", + "dpm": "DPM3", + "dpm_signal_to_fault_cause": [ + { + "pdio_mask": "0x0001", + "gpio_mask": "0x0000", + "pdio_value": "0x0001", + "gpio_value": "0x0000", + "hw_cause": "PSU_VIN_LOSS", + "hw_desc": "Both PSUs lost input power", + "reboot_cause": "REBOOT_CAUSE_POWER_LOSS" + }, + { + "pdio_mask": "0x0002", + "gpio_mask": "0x0000", + "pdio_value": "0x0002", + "gpio_value": "0x0000", + "hw_cause": "OVER_TEMP", + "hw_desc": "Switch card exceeded overtemperature", + "reboot_cause": "REBOOT_CAUSE_THERMAL_OVERLOAD_OTHER" + }, + { + "pdio_mask": "0x0004", + "gpio_mask": "0x0000", + "pdio_value": "0x0004", + "gpio_value": "0x0000", + "hw_cause": "CPU_PWR_BAD", + "hw_desc": "CPU card power bad", + "reboot_cause": "REBOOT_CAUSE_HARDWARE_OTHER" + }, + { + "pdio_mask": "0x0008", + "gpio_mask": "0x0000", + "pdio_value": "0x0008", + "gpio_value": "0x0000", + "hw_cause": "WATCHDOG", + "hw_desc": "FPGA watchdog expired", + "reboot_cause": "REBOOT_CAUSE_WATCHDOG" + }, + { + "pdio_mask": "0x0010", + "gpio_mask": "0x0000", + "pdio_value": "0x0010", + "gpio_value": "0x0000", + "hw_cause": "ASIC_OT", + "hw_desc": "ASIC exceeded overtemperature", + "reboot_cause": "REBOOT_CAUSE_THERMAL_OVERLOAD_ASIC" + }, + { + "pdio_mask": "0x0040", + "gpio_mask": "0x0000", + "pdio_value": "0x0040", + "gpio_value": "0x0000", + "hw_cause": "CMD_PWR_CYC", + "hw_desc": "Software commanded power cycle", + "reboot_cause": "REBOOT_CAUSE_POWER_LOSS" + }, + { + "pdio_mask": "0x0100", + "gpio_mask": "0x0000", + "pdio_value": "0x0100", + "gpio_value": "0x0000", + "hw_cause": "CPU_CMD_PCYC", + "hw_desc": "CPU card commanded power cycle", + "reboot_cause": "REBOOT_CAUSE_POWER_LOSS" + }, + { + "pdio_mask": "0x0000", + "gpio_mask": "0x0080", + "pdio_value": "0x0000", + "gpio_value": "0x0080", + "hw_cause": "NO_FAN_PRSNT", + "hw_desc": "All 4 system fans removed", + "reboot_cause": "REBOOT_CAUSE_INSUFFICIENT_FAN_SPEED" + } + ], + "pin_to_name": { + "VH1": "12V", + "VH2": "3V3", + "VH3": "1V45", + "VH4": "0V9_EAST", + "VP1": "0V75_EAST", + "VP2": "0V8_PT7", + "VP3": "1V2_DP", + "VP4": "3V3_EAST", + "VP5": "1V5", + "VP6": "1V8_DP", + "VP7": "0V8_PT5", + "VP8": "0V9_PVDD_2", + "VP9": "0V9_PVDD_3", + "VP10": "0V8_PB2", + "VP11": "0V8_PB3", + "VP12": "1V2_PCIE", + "VP13": "1V5_RVDD" + } + } + }, "PSU": { "name": { "1": "PSU1", diff --git a/device/nexthop/x86_64-nexthop_4220-r0/pddf/pddf-device.json.j2 b/device/nexthop/x86_64-nexthop_4220-r0/pddf/pddf-device.json.j2 index 53f6b1e80ff..6dec1b59f01 100644 --- a/device/nexthop/x86_64-nexthop_4220-r0/pddf/pddf-device.json.j2 +++ b/device/nexthop/x86_64-nexthop_4220-r0/pddf/pddf-device.json.j2 @@ -31,11 +31,14 @@ "std_kos": [ "at24", "i2c-dev", + "spi-xilinx", "optoe" ], "pddf_kos": [ + "pddf_spi_module", "pddf_multifpgapci_i2c_module", "pddf_multifpgapci_gpio_module", + "pddf_multifpgapci_spi_module", "pddf_client_module", "pddf_multifpgapci_driver", "pddf_multifpgapci_module", @@ -186,7 +189,10 @@ {"offset": "0xb4", "bit": "0x10", "direction": "0x1"} ] } - } + }, + "spi_controllers": [ + "CPUCARD_SPI_CONTROLLER" + ] }, "DPM1": { "dev_info": {"device_type": "DPM", "device_name": "DPM1", "device_parent": "MULTIFPGAPCIE0"}, @@ -1181,7 +1187,10 @@ {"chn": "67", "dev": "PORT63"}, {"chn": "68", "dev": "PORT64"} ] - } + }, + "spi_controllers": [ + "SWITCHCARD_SPI_CONTROLLER" + ] }, "NEXTHOP-FPGA-ASIC-TEMP-SENSOR0": { "dev_info": { "device_type": "NEXTHOP_FPGA_ASIC_TEMP_SENSOR", "device_name": "NEXTHOP-FPGA-ASIC-TEMP-SENSOR0", "device_parent": "MULTIFPGAPCIE1", "nexthop_thermal_pid_domain": "None" }, @@ -4882,6 +4891,90 @@ ] } }, + "CPUCARD_SPI_CONTROLLER": { + "dev_info": { + "device_type": "SPI_CONTROLLER", + "device_parent": "MULTIFPGAPCIE0" + }, + "spi_mode_commands": [ + { + "enable": "fpga write32 CPUCARD_FPGA 0x4 --bits=0:0 0x1", + "disable": "fpga write32 CPUCARD_FPGA 0x4 --bits=0:0 0x0" + } + ], + "dev_attr": { + "spi_base_addr": "0x50000", + "virt_spi_controllers": "1", + "virt_spi_controller_size": "0x200", + "spi_driver": "xilinx_spi", + "spi_num_cs": 5, + "spi_controller_name": "CPUCARD_SPI_CONTROLLER", + "spi_controller_idx": 1 + }, + "spi_devices": [ + "SWITCHCARD_CONFIG_FLASH" + ] + }, + "SWITCHCARD_CONFIG_FLASH": { + "dev_info": { + "device_type": "SPI_DEVICE", + "device_name": "SWITCHCARD_CONFIG_FLASH", + "device_parent": "CPUCARD_SPI_CONTROLLER" + }, + "is_persistent": false, + "spi_mode_commands": [ + { + "enable": "fpga write32 CPUCARD_FPGA 0x44 --bits=11:11 0x1", + "disable": "fpga write32 CPUCARD_FPGA 0x44 --bits=11:11 0x0" + }, + { + "enable": "fpga write32 CPUCARD_FPGA 0x44 --bits=10:10 0x0" + } + ], + "dev_attr": { + "spi_device_driver": "spi-nor", + "max_speed_hz": 0, + "chip_select": 0 + } + }, + "SWITCHCARD_SPI_CONTROLLER": { + "dev_info": { + "device_type": "SPI_CONTROLLER", + "device_parent": "MULTIFPGAPCIE1" + }, + "spi_mode_commands": [], + "dev_attr": { + "spi_base_addr": "0x50000", + "virt_spi_controllers": "1", + "virt_spi_controller_size": "0x200", + "spi_driver": "xilinx_spi", + "spi_num_cs": 5, + "spi_controller_name": "SWITCHCARD_SPI_CONTROLLER", + "spi_controller_idx": 2 + }, + "spi_devices": [ + "ASIC_BOOT_FLASH" + ] + }, + "ASIC_BOOT_FLASH": { + "dev_info": { + "device_type": "SPI_DEVICE", + "device_name": "ASIC_BOOT_FLASH", + "device_parent": "SWITCHCARD_SPI_CONTROLLER" + }, + "is_persistent": false, + "spi_mode_commands": [ + { + "enable": "fpga write32 SWITCHCARD_FPGA 0x8 --bits=4:4 0x1", + "disable": "fpga write32 SWITCHCARD_FPGA 0x8 --bits=4:4 0x0" + } + ], + "dev_attr": { + "spi_device_driver": "spi-nor", + "max_speed_hz": 0, + "chip_select": 0 + } + }, "WATCHDOG": { "dev_info": {"device_type": "WATCHDOG", "device_parent": "MULTIFPGAPCIE1"}, "dev_attr": {"event_driven_power_cycle_control_reg_offset": "0x28", "watchdog_counter_reg_offset": "0x1E0"} diff --git a/device/nexthop/x86_64-nexthop_4220-r0/sensors.conf b/device/nexthop/x86_64-nexthop_4220-r0/sensors.conf index 53d0dea9056..1548916cb89 100644 --- a/device/nexthop/x86_64-nexthop_4220-r0/sensors.conf +++ b/device/nexthop/x86_64-nexthop_4220-r0/sensors.conf @@ -1,8 +1,8 @@ # libsensors configuration file # ---------------------------------------------- # -bus "i2c-10" "CPU Card FPGA I2C bus 6" -bus "i2c-97" "Switch Card FPGA I2C Mux 2 Chan 1" +bus "i2c-92" "i2c-20-mux (chan_id 0)" +bus "i2c-100" "i2c-23-mux (chan_id 0)" chip "nh_tmp464-*" label temp1 "Switch Card Lower Rear" @@ -13,15 +13,15 @@ chip "nh_tmp464-*" # In HW vs kernel driver, max/crit are swapped. set temp1_crit 87 - set temp1_max 92 + set temp1_max 95 set temp2_crit 55 - set temp2_max 65 + set temp2_max 125 set temp3_crit 115 - set temp3_max 122 + set temp3_max 125 set temp4_crit 115 - set temp4_max 122 + set temp4_max 125 set temp5_crit 115 - set temp5_max 122 + set temp5_max 125 ignore temp6 ignore temp7 ignore temp8 @@ -31,7 +31,7 @@ chip "tmp451-*" label temp2 "Chassis Intake" set temp2_max 45 - set temp2_crit 65 + set temp2_crit 125 # Note: k10temp driver does not support writing max/crit values, so we rely on # pddf-device.json to provide the values instead. @@ -56,3 +56,9 @@ chip "nh_raa228234-*" chip "nh_raa228236-*" set temp1_max 120 set temp1_crit 130 + +chip "nh_raa228236-i2c-92-62" + compute in3 @*(1.2), @/(1.2) + +chip "nh_raa228236-i2c-100-62" + compute in3 @*(1.2), @/(1.2) diff --git a/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O32-C32/BALANCED/buffers_defaults_t2.j2 b/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O32-C32/BALANCED/buffers_defaults_t2.j2 index 82b04ee679e..1ddda381b82 100644 --- a/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O32-C32/BALANCED/buffers_defaults_t2.j2 +++ b/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O32-C32/BALANCED/buffers_defaults_t2.j2 @@ -6,8 +6,8 @@ 'torrouter_server' : '300m', 'leafrouter_torrouter' : '300m', 'spinerouter_leafrouter' : '2000m', - 'upperspinerouter_spinerouter' : '50m', - 'upperspinerouter_lowerspinerouter' : '50m', + 'upperspinerouter_spinerouter' : '30m', + 'upperspinerouter_lowerspinerouter' : '30m', 'regionalhub_upperspinerouter': '120000m', 'aznghub_upperspinerouter' : '120000m', 'regionalhub_spinerouter': '120000m', @@ -28,7 +28,7 @@ "size": "56441610000", "type": "both", "mode": "dynamic", - "xoff": "2822080500" + "xoff": "4024103375" } }, "BUFFER_PROFILE": { diff --git a/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O32-C32/BALANCED/pg_profile_lookup.ini b/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O32-C32/BALANCED/pg_profile_lookup.ini index 3c93a65abb5..351a33c4a06 100644 --- a/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O32-C32/BALANCED/pg_profile_lookup.ini +++ b/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O32-C32/BALANCED/pg_profile_lookup.ini @@ -1,20 +1,19 @@ # PG lossless profiles. -# speed cable size xon xoff threshold xon_offset -25000 5m 18796 0 612140 0 3556 -25000 40m 18796 0 612140 0 3556 -25000 300m 18796 0 612140 0 3556 -100000 5m 18796 0 612140 0 3556 -100000 40m 18796 0 612140 0 3556 -100000 300m 18796 0 612140 0 3556 -200000 5m 18796 0 612140 0 3556 -200000 40m 18796 0 612140 0 3556 -200000 300m 18796 0 612140 0 3556 -400000 5m 18796 0 612140 0 3556 -400000 40m 18796 0 612140 0 3556 -400000 50m 18796 0 612140 0 3556 -400000 300m 18796 0 612140 0 3556 -400000 2000m 18796 0 612140 0 3556 -400000 120000m 18796 0 612140 0 3556 -800000 5m 18796 0 612140 0 3556 -800000 40m 18796 0 612140 0 3556 -800000 300m 18796 0 612140 0 3556 +# speed cable size xon xoff threshold xon_offset +100000 30m 0 0 183263 -6 363506 +100000 50m 0 0 185802 -6 363506 +100000 100m 0 0 192149 -6 363506 +100000 300m 0 0 217535 -6 363506 +100000 2000m 0 0 436032 -6 363506 +100000 120000m 0 0 15739154 -6 363506 +400000 30m 0 0 514553 -6 1454025 +400000 50m 0 0 524707 -6 1454025 +400000 100m 0 0 550094 -6 1454025 +400000 300m 0 0 651640 -6 1454025 +400000 2000m 0 0 1514785 -6 1454025 +400000 120000m 0 0 62653744 -6 1454025 +800000 30m 0 0 244000 -6 1454025 +800000 50m 0 0 244000 -6 1454025 +800000 300m 0 0 564000 -6 1454025 +800000 2000m 0 0 2736000 -6 1454025 +800000 120000m 0 0 153440000 -6 1454025 diff --git a/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O32-C32/buffers_defaults_t2.j2 b/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O32-C32/buffers_defaults_t2.j2 index 463d5b1bb58..e3dffc3a1ec 100644 --- a/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O32-C32/buffers_defaults_t2.j2 +++ b/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O32-C32/buffers_defaults_t2.j2 @@ -2,6 +2,19 @@ {%- include 'buffer_ports.j2' %} +{%- set ports2cable = { + 'torrouter_server' : '300m', + 'leafrouter_torrouter' : '300m', + 'spinerouter_leafrouter' : '2000m', + 'upperspinerouter_spinerouter' : '30m', + 'upperspinerouter_lowerspinerouter' : '30m', + 'regionalhub_upperspinerouter': '120000m', + 'aznghub_upperspinerouter' : '120000m', + 'regionalhub_spinerouter': '120000m', + 'aznghub_spinerouter' : '120000m' + } +-%} + {%- macro generate_qos_bypass_port_list(PORT_QOS_BYPASS) %} {# Generate list of ports #} {%- for port_idx in range(256, 261, 4) %} @@ -14,7 +27,8 @@ "ingress_pool": { "size": "56441610000", "type": "both", - "mode": "dynamic" + "mode": "dynamic", + "xoff": "4024103375" } }, "BUFFER_PROFILE": { diff --git a/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O32-C32/gearbox_config.json b/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O32-C32/gearbox_config.json index eb44b485d62..6590d472f1b 100644 --- a/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O32-C32/gearbox_config.json +++ b/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O32-C32/gearbox_config.json @@ -231,544 +231,224 @@ "index": 1, "phy_id": 0, "system_lanes": [20,21], - "line_lanes": [0,1,2,3], - "system_tx_fir_pre3": [0,0], - "system_tx_fir_pre2": [0,0], - "system_tx_fir_pre1": [0,0], - "system_tx_fir_main": [128,128], - "system_tx_fir_post1": [0,0], - "system_tx_fir_post2": [0,0], - "system_tx_fir_post3": [0,0], - "line_tx_fir_pre1": [-10,-10,-10,-10], - "line_tx_fir_main": [112,112,112,112], - "line_tx_fir_post1": [-2,-2,-2,-2] + "line_lanes": [0,1,2,3] }, { "name": "Ethernet4", "index": 2, "phy_id": 0, "system_lanes": [24,25], - "line_lanes": [8,9,10,11], - "system_tx_fir_pre3": [0,0], - "system_tx_fir_pre2": [0,0], - "system_tx_fir_pre1": [0,0], - "system_tx_fir_main": [128,128], - "system_tx_fir_post1": [0,0], - "system_tx_fir_post2": [0,0], - "system_tx_fir_post3": [0,0], - "line_tx_fir_pre1": [-10,-10,-10,-10], - "line_tx_fir_main": [112,112,112,112], - "line_tx_fir_post1": [-2,-2,-2,-2] + "line_lanes": [8,9,10,11] }, { "name": "Ethernet8", "index": 3, "phy_id": 1, "system_lanes": [52,53], - "line_lanes": [32,33,34,35], - "system_tx_fir_pre3": [0,0], - "system_tx_fir_pre2": [0,0], - "system_tx_fir_pre1": [0,0], - "system_tx_fir_main": [128,128], - "system_tx_fir_post1": [0,0], - "system_tx_fir_post2": [0,0], - "system_tx_fir_post3": [0,0], - "line_tx_fir_pre1": [-10,-10,-10,-10], - "line_tx_fir_main": [112,112,112,112], - "line_tx_fir_post1": [-2,-2,-2,-2] + "line_lanes": [32,33,34,35] }, { "name": "Ethernet12", "index": 4, "phy_id": 1, "system_lanes": [56,57], - "line_lanes": [40,41,42,43], - "system_tx_fir_pre3": [0,0], - "system_tx_fir_pre2": [0,0], - "system_tx_fir_pre1": [0,0], - "system_tx_fir_main": [128,128], - "system_tx_fir_post1": [0,0], - "system_tx_fir_post2": [0,0], - "system_tx_fir_post3": [0,0], - "line_tx_fir_pre1": [-10,-10,-10,-10], - "line_tx_fir_main": [112,112,112,112], - "line_tx_fir_post1": [-2,-2,-2,-2] + "line_lanes": [40,41,42,43] }, { "name": "Ethernet16", "index": 5, "phy_id": 2, "system_lanes": [84,85], - "line_lanes": [64,65,66,67], - "system_tx_fir_pre3": [0,0], - "system_tx_fir_pre2": [0,0], - "system_tx_fir_pre1": [0,0], - "system_tx_fir_main": [128,128], - "system_tx_fir_post1": [0,0], - "system_tx_fir_post2": [0,0], - "system_tx_fir_post3": [0,0], - "line_tx_fir_pre1": [-10,-10,-10,-10], - "line_tx_fir_main": [112,112,112,112], - "line_tx_fir_post1": [-2,-2,-2,-2] + "line_lanes": [64,65,66,67] }, { "name": "Ethernet20", "index": 6, "phy_id": 2, "system_lanes": [88,89], - "line_lanes": [72,73,74,75], - "system_tx_fir_pre3": [0,0], - "system_tx_fir_pre2": [0,0], - "system_tx_fir_pre1": [0,0], - "system_tx_fir_main": [128,128], - "system_tx_fir_post1": [0,0], - "system_tx_fir_post2": [0,0], - "system_tx_fir_post3": [0,0], - "line_tx_fir_pre1": [-10,-10,-10,-10], - "line_tx_fir_main": [112,112,112,112], - "line_tx_fir_post1": [-2,-2,-2,-2] + "line_lanes": [72,73,74,75] }, { "name": "Ethernet24", "index": 7, "phy_id": 3, "system_lanes": [116,117], - "line_lanes": [96,97,98,99], - "system_tx_fir_pre3": [0,0], - "system_tx_fir_pre2": [0,0], - "system_tx_fir_pre1": [0,0], - "system_tx_fir_main": [128,128], - "system_tx_fir_post1": [0,0], - "system_tx_fir_post2": [0,0], - "system_tx_fir_post3": [0,0], - "line_tx_fir_pre1": [-10,-10,-10,-10], - "line_tx_fir_main": [112,112,112,112], - "line_tx_fir_post1": [-2,-2,-2,-2] + "line_lanes": [96,97,98,99] }, { "name": "Ethernet28", "index": 8, "phy_id": 3, "system_lanes": [120,121], - "line_lanes": [104,105,106,107], - "system_tx_fir_pre3": [0,0], - "system_tx_fir_pre2": [0,0], - "system_tx_fir_pre1": [0,0], - "system_tx_fir_main": [128,128], - "system_tx_fir_post1": [0,0], - "system_tx_fir_post2": [0,0], - "system_tx_fir_post3": [0,0], - "line_tx_fir_pre1": [-10,-10,-10,-10], - "line_tx_fir_main": [112,112,112,112], - "line_tx_fir_post1": [-2,-2,-2,-2] + "line_lanes": [104,105,106,107] }, { "name": "Ethernet32", "index": 9, "phy_id": 4, "system_lanes": [148,149], - "line_lanes": [128,129,130,131], - "system_tx_fir_pre3": [0,0], - "system_tx_fir_pre2": [0,0], - "system_tx_fir_pre1": [0,0], - "system_tx_fir_main": [128,128], - "system_tx_fir_post1": [0,0], - "system_tx_fir_post2": [0,0], - "system_tx_fir_post3": [0,0], - "line_tx_fir_pre1": [-10,-10,-10,-10], - "line_tx_fir_main": [112,112,112,112], - "line_tx_fir_post1": [-2,-2,-2,-2] + "line_lanes": [128,129,130,131] }, { "name": "Ethernet36", "index": 10, "phy_id": 4, "system_lanes": [152,153], - "line_lanes": [136,137,138,139], - "system_tx_fir_pre3": [0,0], - "system_tx_fir_pre2": [0,0], - "system_tx_fir_pre1": [0,0], - "system_tx_fir_main": [128,128], - "system_tx_fir_post1": [0,0], - "system_tx_fir_post2": [0,0], - "system_tx_fir_post3": [0,0], - "line_tx_fir_pre1": [-10,-10,-10,-10], - "line_tx_fir_main": [112,112,112,112], - "line_tx_fir_post1": [-2,-2,-2,-2] + "line_lanes": [136,137,138,139] }, { "name": "Ethernet40", "index": 11, "phy_id": 5, "system_lanes": [180,181], - "line_lanes": [160,161,162,163], - "system_tx_fir_pre3": [0,0], - "system_tx_fir_pre2": [0,0], - "system_tx_fir_pre1": [0,0], - "system_tx_fir_main": [128,128], - "system_tx_fir_post1": [0,0], - "system_tx_fir_post2": [0,0], - "system_tx_fir_post3": [0,0], - "line_tx_fir_pre1": [-10,-10,-10,-10], - "line_tx_fir_main": [112,112,112,112], - "line_tx_fir_post1": [-2,-2,-2,-2] + "line_lanes": [160,161,162,163] }, { "name": "Ethernet44", "index": 12, "phy_id": 5, "system_lanes": [184,185], - "line_lanes": [168,169,170,171], - "system_tx_fir_pre3": [0,0], - "system_tx_fir_pre2": [0,0], - "system_tx_fir_pre1": [0,0], - "system_tx_fir_main": [128,128], - "system_tx_fir_post1": [0,0], - "system_tx_fir_post2": [0,0], - "system_tx_fir_post3": [0,0], - "line_tx_fir_pre1": [-10,-10,-10,-10], - "line_tx_fir_main": [112,112,112,112], - "line_tx_fir_post1": [-2,-2,-2,-2] + "line_lanes": [168,169,170,171] }, { "name": "Ethernet48", "index": 13, "phy_id": 6, "system_lanes": [212,213], - "line_lanes": [192,193,194,195], - "system_tx_fir_pre3": [0,0], - "system_tx_fir_pre2": [0,0], - "system_tx_fir_pre1": [0,0], - "system_tx_fir_main": [128,128], - "system_tx_fir_post1": [0,0], - "system_tx_fir_post2": [0,0], - "system_tx_fir_post3": [0,0], - "line_tx_fir_pre1": [-10,-10,-10,-10], - "line_tx_fir_main": [112,112,112,112], - "line_tx_fir_post1": [-2,-2,-2,-2] + "line_lanes": [192,193,194,195] }, { "name": "Ethernet52", "index": 14, "phy_id": 6, "system_lanes": [216,217], - "line_lanes": [200,201,202,203], - "system_tx_fir_pre3": [0,0], - "system_tx_fir_pre2": [0,0], - "system_tx_fir_pre1": [0,0], - "system_tx_fir_main": [128,128], - "system_tx_fir_post1": [0,0], - "system_tx_fir_post2": [0,0], - "system_tx_fir_post3": [0,0], - "line_tx_fir_pre1": [-10,-10,-10,-10], - "line_tx_fir_main": [112,112,112,112], - "line_tx_fir_post1": [-2,-2,-2,-2] + "line_lanes": [200,201,202,203] }, { "name": "Ethernet56", "index": 15, "phy_id": 7, "system_lanes": [244,245], - "line_lanes": [224,225,226,227], - "system_tx_fir_pre3": [0,0], - "system_tx_fir_pre2": [0,0], - "system_tx_fir_pre1": [0,0], - "system_tx_fir_main": [128,128], - "system_tx_fir_post1": [0,0], - "system_tx_fir_post2": [0,0], - "system_tx_fir_post3": [0,0], - "line_tx_fir_pre1": [-10,-10,-10,-10], - "line_tx_fir_main": [112,112,112,112], - "line_tx_fir_post1": [-2,-2,-2,-2] + "line_lanes": [224,225,226,227] }, { "name": "Ethernet60", "index": 16, "phy_id": 7, "system_lanes": [248,249], - "line_lanes": [232,233,234,235], - "system_tx_fir_pre3": [0,0], - "system_tx_fir_pre2": [0,0], - "system_tx_fir_pre1": [0,0], - "system_tx_fir_main": [128,128], - "system_tx_fir_post1": [0,0], - "system_tx_fir_post2": [0,0], - "system_tx_fir_post3": [0,0], - "line_tx_fir_pre1": [-10,-10,-10,-10], - "line_tx_fir_main": [112,112,112,112], - "line_tx_fir_post1": [-2,-2,-2,-2] + "line_lanes": [232,233,234,235] }, { "name": "Ethernet64", "index": 17, "phy_id": 8, "system_lanes": [276,277], - "line_lanes": [256,257,258,259], - "system_tx_fir_pre3": [0,0], - "system_tx_fir_pre2": [0,0], - "system_tx_fir_pre1": [0,0], - "system_tx_fir_main": [128,128], - "system_tx_fir_post1": [0,0], - "system_tx_fir_post2": [0,0], - "system_tx_fir_post3": [0,0], - "line_tx_fir_pre1": [-10,-10,-10,-10], - "line_tx_fir_main": [112,112,112,112], - "line_tx_fir_post1": [-2,-2,-2,-2] + "line_lanes": [256,257,258,259] }, { "name": "Ethernet68", "index": 18, "phy_id": 8, "system_lanes": [280,281], - "line_lanes": [264,265,266,267], - "system_tx_fir_pre3": [0,0], - "system_tx_fir_pre2": [0,0], - "system_tx_fir_pre1": [0,0], - "system_tx_fir_main": [128,128], - "system_tx_fir_post1": [0,0], - "system_tx_fir_post2": [0,0], - "system_tx_fir_post3": [0,0], - "line_tx_fir_pre1": [-10,-10,-10,-10], - "line_tx_fir_main": [112,112,112,112], - "line_tx_fir_post1": [-2,-2,-2,-2] + "line_lanes": [264,265,266,267] }, { "name": "Ethernet72", "index": 19, "phy_id": 9, "system_lanes": [308,309], - "line_lanes": [288,289,290,291], - "system_tx_fir_pre3": [0,0], - "system_tx_fir_pre2": [0,0], - "system_tx_fir_pre1": [0,0], - "system_tx_fir_main": [128,128], - "system_tx_fir_post1": [0,0], - "system_tx_fir_post2": [0,0], - "system_tx_fir_post3": [0,0], - "line_tx_fir_pre1": [-10,-10,-10,-10], - "line_tx_fir_main": [112,112,112,112], - "line_tx_fir_post1": [-2,-2,-2,-2] + "line_lanes": [288,289,290,291] }, { "name": "Ethernet76", "index": 20, "phy_id": 9, "system_lanes": [312,313], - "line_lanes": [296,297,298,299], - "system_tx_fir_pre3": [0,0], - "system_tx_fir_pre2": [0,0], - "system_tx_fir_pre1": [0,0], - "system_tx_fir_main": [128,128], - "system_tx_fir_post1": [0,0], - "system_tx_fir_post2": [0,0], - "system_tx_fir_post3": [0,0], - "line_tx_fir_pre1": [-10,-10,-10,-10], - "line_tx_fir_main": [112,112,112,112], - "line_tx_fir_post1": [-2,-2,-2,-2] + "line_lanes": [296,297,298,299] }, { "name": "Ethernet80", "index": 21, "phy_id": 10, "system_lanes": [340,341], - "line_lanes": [320,321,322,323], - "system_tx_fir_pre3": [0,0], - "system_tx_fir_pre2": [0,0], - "system_tx_fir_pre1": [0,0], - "system_tx_fir_main": [128,128], - "system_tx_fir_post1": [0,0], - "system_tx_fir_post2": [0,0], - "system_tx_fir_post3": [0,0], - "line_tx_fir_pre1": [-10,-10,-10,-10], - "line_tx_fir_main": [112,112,112,112], - "line_tx_fir_post1": [-2,-2,-2,-2] + "line_lanes": [320,321,322,323] }, { "name": "Ethernet84", "index": 22, "phy_id": 10, "system_lanes": [344,345], - "line_lanes": [328,329,330,331], - "system_tx_fir_pre3": [0,0], - "system_tx_fir_pre2": [0,0], - "system_tx_fir_pre1": [0,0], - "system_tx_fir_main": [128,128], - "system_tx_fir_post1": [0,0], - "system_tx_fir_post2": [0,0], - "system_tx_fir_post3": [0,0], - "line_tx_fir_pre1": [-10,-10,-10,-10], - "line_tx_fir_main": [112,112,112,112], - "line_tx_fir_post1": [-2,-2,-2,-2] + "line_lanes": [328,329,330,331] }, { "name": "Ethernet88", "index": 23, "phy_id": 11, "system_lanes": [372,373], - "line_lanes": [352,353,354,355], - "system_tx_fir_pre3": [0,0], - "system_tx_fir_pre2": [0,0], - "system_tx_fir_pre1": [0,0], - "system_tx_fir_main": [128,128], - "system_tx_fir_post1": [0,0], - "system_tx_fir_post2": [0,0], - "system_tx_fir_post3": [0,0], - "line_tx_fir_pre1": [-10,-10,-10,-10], - "line_tx_fir_main": [112,112,112,112], - "line_tx_fir_post1": [-2,-2,-2,-2] + "line_lanes": [352,353,354,355] }, { "name": "Ethernet92", "index": 24, "phy_id": 11, "system_lanes": [376,377], - "line_lanes": [360,361,362,363], - "system_tx_fir_pre3": [0,0], - "system_tx_fir_pre2": [0,0], - "system_tx_fir_pre1": [0,0], - "system_tx_fir_main": [128,128], - "system_tx_fir_post1": [0,0], - "system_tx_fir_post2": [0,0], - "system_tx_fir_post3": [0,0], - "line_tx_fir_pre1": [-10,-10,-10,-10], - "line_tx_fir_main": [112,112,112,112], - "line_tx_fir_post1": [-2,-2,-2,-2] + "line_lanes": [360,361,362,363] }, { "name": "Ethernet96", "index": 25, "phy_id": 12, "system_lanes": [404,405], - "line_lanes": [384,385,386,387], - "system_tx_fir_pre3": [0,0], - "system_tx_fir_pre2": [0,0], - "system_tx_fir_pre1": [0,0], - "system_tx_fir_main": [128,128], - "system_tx_fir_post1": [0,0], - "system_tx_fir_post2": [0,0], - "system_tx_fir_post3": [0,0], - "line_tx_fir_pre1": [-10,-10,-10,-10], - "line_tx_fir_main": [112,112,112,112], - "line_tx_fir_post1": [-2,-2,-2,-2] + "line_lanes": [384,385,386,387] }, { "name": "Ethernet100", "index": 26, "phy_id": 12, "system_lanes": [408,409], - "line_lanes": [392,393,394,395], - "system_tx_fir_pre3": [0,0], - "system_tx_fir_pre2": [0,0], - "system_tx_fir_pre1": [0,0], - "system_tx_fir_main": [128,128], - "system_tx_fir_post1": [0,0], - "system_tx_fir_post2": [0,0], - "system_tx_fir_post3": [0,0], - "line_tx_fir_pre1": [-10,-10,-10,-10], - "line_tx_fir_main": [112,112,112,112], - "line_tx_fir_post1": [-2,-2,-2,-2] + "line_lanes": [392,393,394,395] }, { "name": "Ethernet104", "index": 27, "phy_id": 13, "system_lanes": [436,437], - "line_lanes": [416,417,418,419], - "system_tx_fir_pre3": [0,0], - "system_tx_fir_pre2": [0,0], - "system_tx_fir_pre1": [0,0], - "system_tx_fir_main": [128,128], - "system_tx_fir_post1": [0,0], - "system_tx_fir_post2": [0,0], - "system_tx_fir_post3": [0,0], - "line_tx_fir_pre1": [-10,-10,-10,-10], - "line_tx_fir_main": [112,112,112,112], - "line_tx_fir_post1": [-2,-2,-2,-2] + "line_lanes": [416,417,418,419] }, { "name": "Ethernet108", "index": 28, "phy_id": 13, "system_lanes": [440,441], - "line_lanes": [424,425,426,427], - "system_tx_fir_pre3": [0,0], - "system_tx_fir_pre2": [0,0], - "system_tx_fir_pre1": [0,0], - "system_tx_fir_main": [128,128], - "system_tx_fir_post1": [0,0], - "system_tx_fir_post2": [0,0], - "system_tx_fir_post3": [0,0], - "line_tx_fir_pre1": [-10,-10,-10,-10], - "line_tx_fir_main": [112,112,112,112], - "line_tx_fir_post1": [-2,-2,-2,-2] + "line_lanes": [424,425,426,427] }, { "name": "Ethernet112", "index": 29, "phy_id": 14, "system_lanes": [468,469], - "line_lanes": [448,449,450,451], - "system_tx_fir_pre3": [0,0], - "system_tx_fir_pre2": [0,0], - "system_tx_fir_pre1": [0,0], - "system_tx_fir_main": [128,128], - "system_tx_fir_post1": [0,0], - "system_tx_fir_post2": [0,0], - "system_tx_fir_post3": [0,0], - "line_tx_fir_pre1": [-10,-10,-10,-10], - "line_tx_fir_main": [112,112,112,112], - "line_tx_fir_post1": [-2,-2,-2,-2] + "line_lanes": [448,449,450,451] }, { "name": "Ethernet116", "index": 30, "phy_id": 14, "system_lanes": [472,473], - "line_lanes": [456,457,458,459], - "system_tx_fir_pre3": [0,0], - "system_tx_fir_pre2": [0,0], - "system_tx_fir_pre1": [0,0], - "system_tx_fir_main": [128,128], - "system_tx_fir_post1": [0,0], - "system_tx_fir_post2": [0,0], - "system_tx_fir_post3": [0,0], - "line_tx_fir_pre1": [-10,-10,-10,-10], - "line_tx_fir_main": [112,112,112,112], - "line_tx_fir_post1": [-2,-2,-2,-2] + "line_lanes": [456,457,458,459] }, { "name": "Ethernet120", "index": 31, "phy_id": 15, "system_lanes": [500,501], - "line_lanes": [480,481,482,483], - "system_tx_fir_pre3": [0,0], - "system_tx_fir_pre2": [0,0], - "system_tx_fir_pre1": [0,0], - "system_tx_fir_main": [128,128], - "system_tx_fir_post1": [0,0], - "system_tx_fir_post2": [0,0], - "system_tx_fir_post3": [0,0], - "line_tx_fir_pre1": [-10,-10,-10,-10], - "line_tx_fir_main": [112,112,112,112], - "line_tx_fir_post1": [-2,-2,-2,-2] + "line_lanes": [480,481,482,483] }, { "name": "Ethernet124", "index": 32, "phy_id": 15, "system_lanes": [504,505], - "line_lanes": [488,489,490,491], - "system_tx_fir_pre3": [0,0], - "system_tx_fir_pre2": [0,0], - "system_tx_fir_pre1": [0,0], - "system_tx_fir_main": [128,128], - "system_tx_fir_post1": [0,0], - "system_tx_fir_post2": [0,0], - "system_tx_fir_post3": [0,0], - "line_tx_fir_pre1": [-10,-10,-10,-10], - "line_tx_fir_main": [112,112,112,112], - "line_tx_fir_post1": [-2,-2,-2,-2] + "line_lanes": [488,489,490,491] } ] } \ No newline at end of file diff --git a/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O32-C32/nh5010-default.bcm b/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O32-C32/nh5010-default.bcm index 14c1b0f212b..7a7afb58f42 100644 --- a/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O32-C32/nh5010-default.bcm +++ b/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O32-C32/nh5010-default.bcm @@ -2056,6 +2056,7 @@ ucode_port_339.BCM8887X_ADAPTER=OAMP:core_7.239 oamp_dual_mode.BCM8887X=1 sai_disable_srcmacqedstmac_ctrl=1 +sai_instru_stat_accum_enable=1 #RCY ports sai_recycle_port_lane_base=300 @@ -2268,3 +2269,7 @@ macsec_fips_enable=1 xflow_macsec_secure_chan_to_num_secure_assoc=4 xflow_macsec_secure_chan_to_num_secure_assoc_encrypt=2 xflow_macsec_secure_chan_to_num_secure_assoc_decrypt=4 +sai_ecmp_group_members_increment=8 + +#Disable hardware PFC watchdog +sai_pfc_dlr_init_capability=0 diff --git a/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O32-C32/pg_profile_lookup.ini b/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O32-C32/pg_profile_lookup.ini new file mode 100644 index 00000000000..351a33c4a06 --- /dev/null +++ b/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O32-C32/pg_profile_lookup.ini @@ -0,0 +1,19 @@ +# PG lossless profiles. +# speed cable size xon xoff threshold xon_offset +100000 30m 0 0 183263 -6 363506 +100000 50m 0 0 185802 -6 363506 +100000 100m 0 0 192149 -6 363506 +100000 300m 0 0 217535 -6 363506 +100000 2000m 0 0 436032 -6 363506 +100000 120000m 0 0 15739154 -6 363506 +400000 30m 0 0 514553 -6 1454025 +400000 50m 0 0 524707 -6 1454025 +400000 100m 0 0 550094 -6 1454025 +400000 300m 0 0 651640 -6 1454025 +400000 2000m 0 0 1514785 -6 1454025 +400000 120000m 0 0 62653744 -6 1454025 +800000 30m 0 0 244000 -6 1454025 +800000 50m 0 0 244000 -6 1454025 +800000 300m 0 0 564000 -6 1454025 +800000 2000m 0 0 2736000 -6 1454025 +800000 120000m 0 0 153440000 -6 1454025 diff --git a/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/BALANCED/buffers_defaults_t0.j2 b/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/BALANCED/buffers_defaults_t0.j2 new file mode 100644 index 00000000000..ba9e6436ecd --- /dev/null +++ b/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/BALANCED/buffers_defaults_t0.j2 @@ -0,0 +1,53 @@ +{%- set default_cable = '300m' %} + +{%- include 'buffer_ports.j2' %} + +{%- set ports2cable = { + 'torrouter_server' : '300m', + 'leafrouter_torrouter' : '300m', + 'spinerouter_leafrouter' : '2000m', + 'upperspinerouter_spinerouter' : '30m', + 'upperspinerouter_lowerspinerouter' : '30m', + 'regionalhub_upperspinerouter': '120000m', + 'aznghub_upperspinerouter' : '120000m', + 'regionalhub_spinerouter': '120000m', + 'aznghub_spinerouter' : '120000m' + } +-%} + +{%- macro generate_qos_bypass_port_list(PORT_QOS_BYPASS) %} + {# Generate list of ports #} + {%- for port_idx in range(256, 261, 4) %} + {%- if PORT_QOS_BYPASS.append("Ethernet%d" % (port_idx)) %}{%- endif %} + {%- endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "25766440000", + "type": "both", + "mode": "dynamic", + "xoff": "4024103375" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"ingress_lossless_pool", + "size":"0", + "xon_offset": "0", + "dynamic_th":"0" + }, + "egress_lossless_profile": { + "pool":"ingress_lossless_pool", + "size":"0", + "dynamic_th":"-1" + }, + "egress_lossy_profile": { + "pool":"ingress_lossless_pool", + "size":"0", + "dynamic_th":"-6" + } + }, +{%- endmacro %} + diff --git a/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/BALANCED/buffers_defaults_t2.j2 b/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/BALANCED/buffers_defaults_t2.j2 index 82b04ee679e..27eb97714dc 100644 --- a/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/BALANCED/buffers_defaults_t2.j2 +++ b/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/BALANCED/buffers_defaults_t2.j2 @@ -6,12 +6,17 @@ 'torrouter_server' : '300m', 'leafrouter_torrouter' : '300m', 'spinerouter_leafrouter' : '2000m', - 'upperspinerouter_spinerouter' : '50m', - 'upperspinerouter_lowerspinerouter' : '50m', + 'upperspinerouter_spinerouter' : '30m', + 'upperspinerouter_lowerspinerouter' : '30m', 'regionalhub_upperspinerouter': '120000m', 'aznghub_upperspinerouter' : '120000m', 'regionalhub_spinerouter': '120000m', - 'aznghub_spinerouter' : '120000m' + 'aznghub_spinerouter' : '120000m', + 'lowerregionalhub_upperspinerouter' : '120000m', + 'lowerregionalhub_spinerouter' : '120000m', + 'lowerregionalhub_fabricregionalhub' : '50m', + 'upperregionalhub_lowerregionalhub' : '50m', + 'upperregionalhub_regionalwanaggregator' : '50m' } -%} @@ -25,17 +30,17 @@ {%- macro generate_buffer_pool_and_profiles() %} "BUFFER_POOL": { "ingress_lossless_pool": { - "size": "56441610000", + "size": "25766440000", "type": "both", "mode": "dynamic", - "xoff": "2822080500" + "xoff": "4024103375" } }, "BUFFER_PROFILE": { "ingress_lossy_profile": { "pool":"ingress_lossless_pool", "size":"0", - "xon_offset": "0", + "xon_offset": "0", "dynamic_th":"0" }, "egress_lossless_profile": { @@ -46,7 +51,7 @@ "egress_lossy_profile": { "pool":"ingress_lossless_pool", "size":"0", - "dynamic_th":"-4" + "dynamic_th":"-6" } }, {%- endmacro %} diff --git a/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/BALANCED/pg_profile_lookup.ini b/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/BALANCED/pg_profile_lookup.ini index 3c93a65abb5..351a33c4a06 100644 --- a/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/BALANCED/pg_profile_lookup.ini +++ b/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/BALANCED/pg_profile_lookup.ini @@ -1,20 +1,19 @@ # PG lossless profiles. -# speed cable size xon xoff threshold xon_offset -25000 5m 18796 0 612140 0 3556 -25000 40m 18796 0 612140 0 3556 -25000 300m 18796 0 612140 0 3556 -100000 5m 18796 0 612140 0 3556 -100000 40m 18796 0 612140 0 3556 -100000 300m 18796 0 612140 0 3556 -200000 5m 18796 0 612140 0 3556 -200000 40m 18796 0 612140 0 3556 -200000 300m 18796 0 612140 0 3556 -400000 5m 18796 0 612140 0 3556 -400000 40m 18796 0 612140 0 3556 -400000 50m 18796 0 612140 0 3556 -400000 300m 18796 0 612140 0 3556 -400000 2000m 18796 0 612140 0 3556 -400000 120000m 18796 0 612140 0 3556 -800000 5m 18796 0 612140 0 3556 -800000 40m 18796 0 612140 0 3556 -800000 300m 18796 0 612140 0 3556 +# speed cable size xon xoff threshold xon_offset +100000 30m 0 0 183263 -6 363506 +100000 50m 0 0 185802 -6 363506 +100000 100m 0 0 192149 -6 363506 +100000 300m 0 0 217535 -6 363506 +100000 2000m 0 0 436032 -6 363506 +100000 120000m 0 0 15739154 -6 363506 +400000 30m 0 0 514553 -6 1454025 +400000 50m 0 0 524707 -6 1454025 +400000 100m 0 0 550094 -6 1454025 +400000 300m 0 0 651640 -6 1454025 +400000 2000m 0 0 1514785 -6 1454025 +400000 120000m 0 0 62653744 -6 1454025 +800000 30m 0 0 244000 -6 1454025 +800000 50m 0 0 244000 -6 1454025 +800000 300m 0 0 564000 -6 1454025 +800000 2000m 0 0 2736000 -6 1454025 +800000 120000m 0 0 153440000 -6 1454025 diff --git a/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/BALANCED/qos.json.j2 b/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/BALANCED/qos.json.j2 index b28c251ad53..30474c5f980 100644 --- a/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/BALANCED/qos.json.j2 +++ b/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/BALANCED/qos.json.j2 @@ -9,4 +9,24 @@ {%- endfor %} {%- endmacro %} +{%- macro generate_wred_profiles() %} + "WRED_PROFILE": { + "AZURE_LOSSLESS" : { + "wred_green_enable" : "true", + "wred_yellow_enable" : "true", + "wred_red_enable" : "true", + "ecn" : "ecn_all", + "green_max_threshold" : "10000000", + "green_min_threshold" : "2000000", + "yellow_max_threshold" : "10000000", + "yellow_min_threshold" : "2000000", + "red_max_threshold" : "10000000", + "red_min_threshold" : "2000000", + "green_drop_probability" : "5", + "yellow_drop_probability": "5", + "red_drop_probability" : "5" + } + }, +{%- endmacro %} + {%- include 'qos_config.j2' %} diff --git a/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/Q3D_ports.json b/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/Q3D_ports.json new file mode 100644 index 00000000000..b6d472c6ed8 --- /dev/null +++ b/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/Q3D_ports.json @@ -0,0 +1,404 @@ +{ + "PM": { + "0": { + "0": { + "CDGE0": [0,1,2,3,4,5,6,7], + "CGE0": [0,1,2,3], + "CGE1": [4,5,6,7], + "D3CE0": [0,1,2,3,4,5,6,7], + "CDGE4_0": [0,1,2,3], + "CDGE4_1": [4,5,6,7], + "CGE2_0": [0,1], + "CGE2_1": [2,3], + "CGE2_2": [4,5], + "CGE2_3": [6,7] + }, + "1": { + "CDGE1": [8,9,10,11,12,13,14,15], + "CGE2": [8,9,10,11], + "CGE3": [12,13,14,15], + "D3CE1": [8,9,10,11,12,13,14,15], + "CDGE4_2": [8,9,10,11], + "CDGE4_3": [12,13,14,15], + "CGE2_4": [8,9], + "CGE2_5": [10,11], + "CGE2_6": [12,13], + "CGE2_7": [14,15] + }, + "2": { + "CDGE2": [16,17,18,19,20,21,22,23], + "CGE4": [16,17,18,19], + "CGE5": [20,21,22,23], + "D3CE2": [16,17,18,19,20,21,22,23], + "CDGE4_4": [16,17,18,19], + "CDGE4_5": [20,21,22,23], + "CGE2_10": [20,21], + "CGE2_11": [22,23], + "CGE2_8": [16,17], + "CGE2_9": [18,19] + }, + "3": { + "CDGE3": [24,25,26,27,28,29,30,31], + "CGE6": [24,25,26,27], + "CGE7": [28,29,30,31], + "D3CE3": [24,25,26,27,28,29,30,31], + "CDGE4_6": [24,25,26,27], + "CDGE4_7": [28,29,30,31], + "CGE2_12": [24,25], + "CGE2_13": [26,27], + "CGE2_14": [28,29], + "CGE2_15": [30,31] + } + }, + "1": { + "4": { + "CDGE4": [32,33,34,35,36,37,38,39], + "CGE8": [32,33,34,35], + "CGE9": [36,37,38,39], + "D3CE4": [32,33,34,35,36,37,38,39], + "CDGE4_8": [32,33,34,35], + "CDGE4_9": [36,37,38,39], + "CGE2_16": [32,33], + "CGE2_17": [34,35], + "CGE2_18": [36,37], + "CGE2_19": [38,39] + }, + "5": { + "CDGE5": [40,41,42,43,44,45,46,47], + "CGE10": [40,41,42,43], + "CGE11": [44,45,46,47], + "D3CE5": [40,41,42,43,44,45,46,47], + "CDGE4_10": [40,41,42,43], + "CDGE4_11": [44,45,46,47], + "CGE2_20": [40,41], + "CGE2_21": [42,43], + "CGE2_22": [44,45], + "CGE2_23": [46,47] + }, + "6": { + "CDGE6": [48,49,50,51,52,53,54,55], + "CGE12": [48,49,50,51], + "CGE13": [52,53,54,55], + "D3CE6": [48,49,50,51,52,53,54,55], + "CDGE4_12": [48,49,50,51], + "CDGE4_13": [52,53,54,55], + "CGE2_24": [48,49], + "CGE2_25": [50,51], + "CGE2_26": [52,53], + "CGE2_27": [54,55] + }, + "7": { + "CDGE7": [56,57,58,59,60,61,62,63], + "CGE14": [56,57,58,59], + "CGE15": [60,61,62,63], + "D3CE7": [56,57,58,59,60,61,62,63], + "CDGE4_14": [56,57,58,59], + "CDGE4_15": [60,61,62,63], + "CGE2_28": [56,57], + "CGE2_29": [58,59], + "CGE2_30": [60,61], + "CGE2_31": [62,63] + } + }, + "2": { + "8": { + "CDGE8": [64,65,66,67,68,69,70,71], + "CGE16": [64,65,66,67], + "CGE17": [68,69,70,71], + "D3CE8": [64,65,66,67,68,69,70,71], + "CDGE4_16": [64,65,66,67], + "CDGE4_17": [68,69,70,71], + "CGE2_32": [64,65], + "CGE2_33": [66,67], + "CGE2_34": [68,69], + "CGE2_35": [70,71] + }, + "9": { + "CDGE9": [72,73,74,75,76,77,78,79], + "CGE18": [72,73,74,75], + "CGE19": [76,77,78,79], + "D3CE9": [72,73,74,75,76,77,78,79], + "CDGE4_18": [72,73,74,75], + "CDGE4_19": [76,77,78,79], + "CGE2_36": [72,73], + "CGE2_37": [74,75], + "CGE2_38": [76,77], + "CGE2_39": [78,79] + }, + "10": { + "CDGE10": [80,81,82,83,84,85,86,87], + "CGE20": [80,81,82,83], + "CGE21": [84,85,86,87], + "D3CE10": [80,81,82,83,84,85,86,87], + "CDGE4_20": [80,81,82,83], + "CDGE4_21": [84,85,86,87], + "CGE2_40": [80,81], + "CGE2_41": [82,83], + "CGE2_42": [84,85], + "CGE2_43": [86,87] + }, + "11": { + "CDGE11": [88,89,90,91,92,93,94,95], + "CGE22": [88,89,90,91], + "CGE23": [92,93,94,95], + "D3CE11": [88,89,90,91,92,93,94,95], + "CDGE4_22": [88,89,90,91], + "CDGE4_23": [92,93,94,95], + "CGE2_44": [88,89], + "CGE2_45": [90,91], + "CGE2_46": [92,93], + "CGE2_47": [94,95] + } + }, + "3": { + "12": { + "CDGE12": [96,97,98,99,100,101,102,103], + "CGE24": [96,97,98,99], + "CGE25": [100,101,102,103], + "D3CE12": [96,97,98,99,100,101,102,103], + "CDGE4_24": [96,97,98,99], + "CDGE4_25": [100,101,102,103], + "CGE2_48": [96,97], + "CGE2_49": [98,99], + "CGE2_50": [100,101], + "CGE2_51": [102,103] + }, + "13": { + "CDGE13": [104,105,106,107,108,109,110,111], + "CGE26": [104,105,106,107], + "CGE27": [108,109,110,111], + "D3CE13": [104,105,106,107,108,109,110,111], + "CDGE4_26": [104,105,106,107], + "CDGE4_27": [108,109,110,111], + "CGE2_52": [104,105], + "CGE2_53": [106,107], + "CGE2_54": [108,109], + "CGE2_55": [110,111] + }, + "14": { + "CDGE14": [112,113,114,115,116,117,118,119], + "CGE28": [112,113,114,115], + "CGE29": [116,117,118,119], + "D3CE14": [112,113,114,115,116,117,118,119], + "CDGE4_28": [112,113,114,115], + "CDGE4_29": [116,117,118,119], + "CGE2_56": [112,113], + "CGE2_57": [114,115], + "CGE2_58": [116,117], + "CGE2_59": [118,119] + }, + "15": { + "CDGE15": [120,121,122,123,124,125,126,127], + "CGE30": [120,121,122,123], + "CGE31": [124,125,126,127], + "D3CE15": [120,121,122,123,124,125,126,127], + "CDGE4_30": [120,121,122,123], + "CDGE4_31": [124,125,126,127], + "CGE2_60": [120,121], + "CGE2_61": [122,123], + "CGE2_62": [124,125], + "CGE2_63": [126,127] + } + }, + "4": { + "16": { + "CDGE16": [128,129,130,131,132,133,134,135], + "CGE32": [128,129,130,131], + "CGE33": [132,133,134,135], + "D3CE16": [128,129,130,131,132,133,134,135], + "CDGE4_32": [128,129,130,131], + "CDGE4_33": [132,133,134,135], + "CGE2_64": [128,129], + "CGE2_65": [130,131], + "CGE2_66": [132,133], + "CGE2_67": [134,135] + }, + "17": { + "CDGE17": [136,137,138,139,140,141,142,143], + "CGE34": [136,137,138,139], + "CGE35": [140,141,142,143], + "D3CE17": [136,137,138,139,140,141,142,143], + "CDGE4_34": [136,137,138,139], + "CDGE4_35": [140,141,142,143], + "CGE2_68": [136,137], + "CGE2_69": [138,139], + "CGE2_70": [140,141], + "CGE2_71": [142,143] + }, + "18": { + "CDGE18": [144,145,146,147,148,149,150,151], + "CGE36": [144,145,146,147], + "CGE37": [148,149,150,151], + "D3CE18": [144,145,146,147,148,149,150,151], + "CDGE4_36": [144,145,146,147], + "CDGE4_37": [148,149,150,151], + "CGE2_72": [144,145], + "CGE2_73": [146,147], + "CGE2_74": [148,149], + "CGE2_75": [150,151] + }, + "19": { + "CDGE19": [152,153,154,155,156,157,158,159], + "CGE38": [152,153,154,155], + "CGE39": [156,157,158,159], + "D3CE19": [152,153,154,155,156,157,158,159], + "CDGE4_38": [152,153,154,155], + "CDGE4_39": [156,157,158,159], + "CGE2_76": [152,153], + "CGE2_77": [154,155], + "CGE2_78": [156,157], + "CGE2_79": [158,159] + } + }, + "5": { + "20": { + "CDGE20": [160,161,162,163,164,165,166,167], + "CGE40": [160,161,162,163], + "CGE41": [164,165,166,167], + "D3CE20": [160,161,162,163,164,165,166,167], + "CDGE4_40": [160,161,162,163], + "CDGE4_41": [164,165,166,167], + "CGE2_80": [160,161], + "CGE2_81": [162,163], + "CGE2_82": [164,165], + "CGE2_83": [166,167] + }, + "21": { + "CDGE21": [168,169,170,171,172,173,174,175], + "CGE42": [168,169,170,171], + "CGE43": [172,173,174,175], + "D3CE21": [168,169,170,171,172,173,174,175], + "CDGE4_42": [168,169,170,171], + "CDGE4_43": [172,173,174,175], + "CGE2_84": [168,169], + "CGE2_85": [170,171], + "CGE2_86": [172,173], + "CGE2_87": [174,175] + }, + "22": { + "CDGE22": [176,177,178,179,180,181,182,183], + "CGE44": [176,177,178,179], + "CGE45": [180,181,182,183], + "D3CE22": [176,177,178,179,180,181,182,183], + "CDGE4_44": [176,177,178,179], + "CDGE4_45": [180,181,182,183], + "CGE2_88": [176,177], + "CGE2_89": [178,179], + "CGE2_90": [180,181], + "CGE2_91": [182,183] + }, + "23": { + "CDGE23": [184,185,186,187,188,189,190,191], + "CGE46": [184,185,186,187], + "CGE47": [188,189,190,191], + "D3CE23": [184,185,186,187,188,189,190,191], + "CDGE4_46": [184,185,186,187], + "CDGE4_47": [188,189,190,191], + "CGE2_92": [184,185], + "CGE2_93": [186,187], + "CGE2_94": [188,189], + "CGE2_95": [190,191] + } + }, + "6": { + "24": { + "CDGE24": [192,193,194,195,196,197,198,199], + "CGE48": [192,193,194,195], + "CGE49": [196,197,198,199], + "D3CE24": [192,193,194,195,196,197,198,199], + "CDGE4_48": [192,193,194,195], + "CDGE4_49": [196,197,198,199], + "CGE2_96": [192,193], + "CGE2_97": [194,195], + "CGE2_98": [196,197], + "CGE2_99": [198,199] + }, + "25": { + "CDGE25": [200,201,202,203,204,205,206,207], + "CGE50": [200,201,202,203], + "CGE51": [204,205,206,207], + "D3CE25": [200,201,202,203,204,205,206,207], + "CDGE4_50": [200,201,202,203], + "CDGE4_51": [204,205,206,207], + "CGE2_100": [200,201], + "CGE2_101": [202,203], + "CGE2_102": [204,205], + "CGE2_103": [206,207] + }, + "26": { + "CDGE26": [208,209,210,211,212,213,214,215], + "CGE52": [208,209,210,211], + "CGE53": [212,213,214,215], + "D3CE26": [208,209,210,211,212,213,214,215], + "CDGE4_52": [208,209,210,211], + "CDGE4_53": [212,213,214,215], + "CGE2_104": [208,209], + "CGE2_105": [210,211], + "CGE2_106": [212,213], + "CGE2_107": [214,215] + }, + "27": { + "CDGE27": [216,217,218,219,220,221,222,223], + "CGE54": [216,217,218,219], + "CGE55": [220,221,222,223], + "D3CE27": [216,217,218,219,220,221,222,223], + "CDGE4_54": [216,217,218,219], + "CDGE4_55": [220,221,222,223], + "CGE2_108": [216,217], + "CGE2_109": [218,219], + "CGE2_110": [220,221], + "CGE2_111": [222,223] + } + }, + "7": { + "28": { + "CDGE28": [224,225,226,227,228,229,230,231], + "CGE56": [224,225,226,227], + "CGE57": [228,229,230,231], + "D3CE28": [224,225,226,227,228,229,230,231], + "CDGE4_56": [224,225,226,227], + "CDGE4_57": [228,229,230,231], + "CGE2_112": [224,225], + "CGE2_113": [226,227], + "CGE2_114": [228,229], + "CGE2_115": [230,231] + }, + "29": { + "CDGE29": [232,233,234,235,236,237,238,239], + "CGE58": [232,233,234,235], + "CGE59": [236,237,238,239], + "D3CE29": [232,233,234,235,236,237,238,239], + "CDGE4_58": [232,233,234,235], + "CDGE4_59": [236,237,238,239], + "CGE2_116": [232,233], + "CGE2_117": [234,235], + "CGE2_118": [236,237], + "CGE2_119": [238,239] + }, + "30": { + "CDGE30": [240,241,242,243,244,245,246,247], + "CGE60": [240,241,242,243], + "CGE61": [244,245,246,247], + "D3CE30": [240,241,242,243,244,245,246,247], + "CDGE4_60": [240,241,242,243], + "CDGE4_61": [244,245,246,247], + "CGE2_120": [240,241], + "CGE2_121": [242,243], + "CGE2_122": [244,245], + "CGE2_123": [246,247] + }, + "31": { + "CDGE31": [248,249,250,251,252,253,254,255], + "CGE62": [248,249,250,251], + "CGE63": [252,253,254,255], + "D3CE31": [248,249,250,251,252,253,254,255], + "CDGE4_62": [248,249,250,251], + "CDGE4_63": [252,253,254,255], + "CGE2_124": [248,249], + "CGE2_125": [250,251], + "CGE2_126": [252,253], + "CGE2_127": [254,255] + } + } + } +} diff --git a/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/buffers_defaults_t0.j2 b/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/buffers_defaults_t0.j2 new file mode 100644 index 00000000000..ba9e6436ecd --- /dev/null +++ b/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/buffers_defaults_t0.j2 @@ -0,0 +1,53 @@ +{%- set default_cable = '300m' %} + +{%- include 'buffer_ports.j2' %} + +{%- set ports2cable = { + 'torrouter_server' : '300m', + 'leafrouter_torrouter' : '300m', + 'spinerouter_leafrouter' : '2000m', + 'upperspinerouter_spinerouter' : '30m', + 'upperspinerouter_lowerspinerouter' : '30m', + 'regionalhub_upperspinerouter': '120000m', + 'aznghub_upperspinerouter' : '120000m', + 'regionalhub_spinerouter': '120000m', + 'aznghub_spinerouter' : '120000m' + } +-%} + +{%- macro generate_qos_bypass_port_list(PORT_QOS_BYPASS) %} + {# Generate list of ports #} + {%- for port_idx in range(256, 261, 4) %} + {%- if PORT_QOS_BYPASS.append("Ethernet%d" % (port_idx)) %}{%- endif %} + {%- endfor %} +{%- endmacro %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "25766440000", + "type": "both", + "mode": "dynamic", + "xoff": "4024103375" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"ingress_lossless_pool", + "size":"0", + "xon_offset": "0", + "dynamic_th":"0" + }, + "egress_lossless_profile": { + "pool":"ingress_lossless_pool", + "size":"0", + "dynamic_th":"-1" + }, + "egress_lossy_profile": { + "pool":"ingress_lossless_pool", + "size":"0", + "dynamic_th":"-6" + } + }, +{%- endmacro %} + diff --git a/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/buffers_defaults_t2.j2 b/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/buffers_defaults_t2.j2 index 6d6e6d3b1b8..27eb97714dc 100644 --- a/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/buffers_defaults_t2.j2 +++ b/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/buffers_defaults_t2.j2 @@ -2,6 +2,24 @@ {%- include 'buffer_ports.j2' %} +{%- set ports2cable = { + 'torrouter_server' : '300m', + 'leafrouter_torrouter' : '300m', + 'spinerouter_leafrouter' : '2000m', + 'upperspinerouter_spinerouter' : '30m', + 'upperspinerouter_lowerspinerouter' : '30m', + 'regionalhub_upperspinerouter': '120000m', + 'aznghub_upperspinerouter' : '120000m', + 'regionalhub_spinerouter': '120000m', + 'aznghub_spinerouter' : '120000m', + 'lowerregionalhub_upperspinerouter' : '120000m', + 'lowerregionalhub_spinerouter' : '120000m', + 'lowerregionalhub_fabricregionalhub' : '50m', + 'upperregionalhub_lowerregionalhub' : '50m', + 'upperregionalhub_regionalwanaggregator' : '50m' + } +-%} + {%- macro generate_qos_bypass_port_list(PORT_QOS_BYPASS) %} {# Generate list of ports #} {%- for port_idx in range(256, 261, 4) %} @@ -11,47 +29,30 @@ {%- macro generate_buffer_pool_and_profiles() %} "BUFFER_POOL": { - "ingress_pool": { - "size": "56441610000", + "ingress_lossless_pool": { + "size": "25766440000", "type": "both", - "mode": "dynamic" + "mode": "dynamic", + "xoff": "4024103375" } }, "BUFFER_PROFILE": { "ingress_lossy_profile": { - "pool":"ingress_pool", + "pool":"ingress_lossless_pool", "size":"0", - "dynamic_th":"3" + "xon_offset": "0", + "dynamic_th":"0" }, "egress_lossless_profile": { - "pool":"ingress_pool", + "pool":"ingress_lossless_pool", "size":"0", "dynamic_th":"-1" }, "egress_lossy_profile": { - "pool":"ingress_pool", + "pool":"ingress_lossless_pool", "size":"0", - "dynamic_th":"3" + "dynamic_th":"-6" } }, {%- endmacro %} -{%- macro generate_pg_profils(port_names_active) %} - "BUFFER_PG": { -{% for port in port_names_active.split(',') %} - "{{ port }}|0-7": { - "profile" : "ingress_lossy_profile" - }{% if not loop.last %},{% endif %} -{% endfor %} - }, -{%- endmacro %} - -{% macro generate_queue_buffers(port_names_active) %} - "BUFFER_QUEUE": { -{% for port in port_names_active.split(',') %} - "{{ port }}|0-7": { - "profile" : "egress_lossy_profile" - }{% if not loop.last %},{% endif %} -{% endfor %} - } -{% endmacro %} diff --git a/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/defaults/gearbox_config.json b/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/defaults/gearbox_config.json new file mode 100644 index 00000000000..5f96924fe1a --- /dev/null +++ b/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/defaults/gearbox_config.json @@ -0,0 +1,454 @@ +{ + "phys": [ + { + "phy_id": 0, + "name": "phy0", + "address": "2031617", + "lib_name": "libsai.so", + "firmware_path": "", + "config_file": "/usr/share/sonic/hwsku/phy0_config.json", + "sai_init_config_file": "", + "phy_access": "mdio", + "bus_id": 0, + "context_id": 1, + "macsec_supported": false, + "hwinfo": "0" + }, + { + "phy_id": 1, + "name": "phy1", + "address": "2031616", + "lib_name": "libsai.so", + "firmware_path": "", + "config_file": "/usr/share/sonic/hwsku/phy1_config.json", + "sai_init_config_file": "", + "phy_access": "mdio", + "bus_id": 0, + "context_id": 1, + "macsec_supported": false, + "hwinfo": "1" + }, + { + "phy_id": 2, + "name": "phy2", + "address": "2031619", + "lib_name": "libsai.so", + "firmware_path": "", + "config_file": "/usr/share/sonic/hwsku/phy2_config.json", + "sai_init_config_file": "", + "phy_access": "mdio", + "bus_id": 0, + "context_id": 1, + "macsec_supported": false, + "hwinfo": "2" + }, + { + "phy_id": 3, + "name": "phy3", + "address": "2031618", + "lib_name": "libsai.so", + "firmware_path": "", + "config_file": "/usr/share/sonic/hwsku/phy3_config.json", + "sai_init_config_file": "", + "phy_access": "mdio", + "bus_id": 0, + "context_id": 1, + "macsec_supported": false, + "hwinfo": "3" + }, + { + "phy_id": 4, + "name": "phy4", + "address": "2031621", + "lib_name": "libsai.so", + "firmware_path": "", + "config_file": "/usr/share/sonic/hwsku/phy4_config.json", + "sai_init_config_file": "", + "phy_access": "mdio", + "bus_id": 0, + "context_id": 1, + "macsec_supported": false, + "hwinfo": "4" + }, + { + "phy_id": 5, + "name": "phy5", + "address": "2031620", + "lib_name": "libsai.so", + "firmware_path": "", + "config_file": "/usr/share/sonic/hwsku/phy5_config.json", + "sai_init_config_file": "", + "phy_access": "mdio", + "bus_id": 0, + "context_id": 1, + "macsec_supported": false, + "hwinfo": "5" + }, + { + "phy_id": 6, + "name": "phy6", + "address": "2031623", + "lib_name": "libsai.so", + "firmware_path": "", + "config_file": "/usr/share/sonic/hwsku/phy6_config.json", + "sai_init_config_file": "", + "phy_access": "mdio", + "bus_id": 0, + "context_id": 1, + "macsec_supported": false, + "hwinfo": "6" + }, + { + "phy_id": 7, + "name": "phy7", + "address": "2031622", + "lib_name": "libsai.so", + "firmware_path": "", + "config_file": "/usr/share/sonic/hwsku/phy7_config.json", + "sai_init_config_file": "", + "phy_access": "mdio", + "bus_id": 0, + "context_id": 1, + "macsec_supported": false, + "hwinfo": "7" + }, + { + "phy_id": 8, + "name": "phy8", + "address": "2031625", + "lib_name": "libsai.so", + "firmware_path": "", + "config_file": "/usr/share/sonic/hwsku/phy8_config.json", + "sai_init_config_file": "", + "phy_access": "mdio", + "bus_id": 0, + "context_id": 1, + "macsec_supported": false, + "hwinfo": "8" + }, + { + "phy_id": 9, + "name": "phy9", + "address": "2031624", + "lib_name": "libsai.so", + "firmware_path": "", + "config_file": "/usr/share/sonic/hwsku/phy9_config.json", + "sai_init_config_file": "", + "phy_access": "mdio", + "bus_id": 0, + "context_id": 1, + "macsec_supported": false, + "hwinfo": "9" + }, + { + "phy_id": 10, + "name": "phy10", + "address": "2031626", + "lib_name": "libsai.so", + "firmware_path": "", + "config_file": "/usr/share/sonic/hwsku/phy10_config.json", + "sai_init_config_file": "", + "phy_access": "mdio", + "bus_id": 0, + "context_id": 1, + "macsec_supported": false, + "hwinfo": "10" + }, + { + "phy_id": 11, + "name": "phy11", + "address": "2031627", + "lib_name": "libsai.so", + "firmware_path": "", + "config_file": "/usr/share/sonic/hwsku/phy11_config.json", + "sai_init_config_file": "", + "phy_access": "mdio", + "bus_id": 0, + "context_id": 1, + "macsec_supported": false, + "hwinfo": "11" + }, + { + "phy_id": 12, + "name": "phy12", + "address": "2031628", + "lib_name": "libsai.so", + "firmware_path": "", + "config_file": "/usr/share/sonic/hwsku/phy12_config.json", + "sai_init_config_file": "", + "phy_access": "mdio", + "bus_id": 0, + "context_id": 1, + "macsec_supported": false, + "hwinfo": "12" + }, + { + "phy_id": 13, + "name": "phy13", + "address": "2031629", + "lib_name": "libsai.so", + "firmware_path": "", + "config_file": "/usr/share/sonic/hwsku/phy13_config.json", + "sai_init_config_file": "", + "phy_access": "mdio", + "bus_id": 0, + "context_id": 1, + "macsec_supported": false, + "hwinfo": "13" + }, + { + "phy_id": 14, + "name": "phy14", + "address": "2031630", + "lib_name": "libsai.so", + "firmware_path": "", + "config_file": "/usr/share/sonic/hwsku/phy14_config.json", + "sai_init_config_file": "", + "phy_access": "mdio", + "bus_id": 0, + "context_id": 1, + "macsec_supported": false, + "hwinfo": "14" + }, + { + "phy_id": 15, + "name": "phy15", + "address": "2031631", + "lib_name": "libsai.so", + "firmware_path": "", + "config_file": "/usr/share/sonic/hwsku/phy15_config.json", + "sai_init_config_file": "", + "phy_access": "mdio", + "bus_id": 0, + "context_id": 1, + "macsec_supported": false, + "hwinfo": "15" + } + ], + "interfaces": [ + { + "name": "Ethernet0", + "index": 1, + "phy_id": 0, + "system_lanes": [20,21,22,23], + "line_lanes": [0,1,2,3,4,5,6,7] + }, + { + "name": "Ethernet4", + "index": 2, + "phy_id": 0, + "system_lanes": [24,25,26,27], + "line_lanes": [8,9,10,11,12,13,14,15] + }, + { + "name": "Ethernet8", + "index": 3, + "phy_id": 1, + "system_lanes": [52,53,54,55], + "line_lanes": [32,33,34,35,36,37,38,39] + }, + { + "name": "Ethernet12", + "index": 4, + "phy_id": 1, + "system_lanes": [56,57,58,59], + "line_lanes": [40,41,42,43,44,45,46,47] + }, + { + "name": "Ethernet16", + "index": 5, + "phy_id": 2, + "system_lanes": [84,85,86,87], + "line_lanes": [64,65,66,67,68,69,70,71] + }, + { + "name": "Ethernet20", + "index": 6, + "phy_id": 2, + "system_lanes": [88,89,90,91], + "line_lanes": [72,73,74,75,76,77,78,79] + }, + { + "name": "Ethernet24", + "index": 7, + "phy_id": 3, + "system_lanes": [116,117,118,119], + "line_lanes": [96,97,98,99,100,101,102,103] + }, + { + "name": "Ethernet28", + "index": 8, + "phy_id": 3, + "system_lanes": [120,121,122,123], + "line_lanes": [104,105,106,107,108,109,110,111] + }, + { + "name": "Ethernet32", + "index": 9, + "phy_id": 4, + "system_lanes": [148,149,150,151], + "line_lanes": [128,129,130,131,132,133,134,135] + }, + { + "name": "Ethernet36", + "index": 10, + "phy_id": 4, + "system_lanes": [152,153,154,155], + "line_lanes": [136,137,138,139,140,141,142,143] + }, + { + "name": "Ethernet40", + "index": 11, + "phy_id": 5, + "system_lanes": [180,181,182,183], + "line_lanes": [160,161,162,163,164,165,166,167] + }, + { + "name": "Ethernet44", + "index": 12, + "phy_id": 5, + "system_lanes": [184,185,186,187], + "line_lanes": [168,169,170,171,172,173,174,175] + }, + { + "name": "Ethernet48", + "index": 13, + "phy_id": 6, + "system_lanes": [212,213,214,215], + "line_lanes": [192,193,194,195,196,197,198,199] + }, + { + "name": "Ethernet52", + "index": 14, + "phy_id": 6, + "system_lanes": [216,217,218,219], + "line_lanes": [200,201,202,203,204,205,206,207] + }, + { + "name": "Ethernet56", + "index": 15, + "phy_id": 7, + "system_lanes": [244,245,246,247], + "line_lanes": [224,225,226,227,228,229,230,231] + }, + { + "name": "Ethernet60", + "index": 16, + "phy_id": 7, + "system_lanes": [248,249,250,251], + "line_lanes": [232,233,234,235,236,237,238,239] + }, + { + "name": "Ethernet64", + "index": 17, + "phy_id": 8, + "system_lanes": [276,277,278,279], + "line_lanes": [256,257,258,259,260,261,262,263] + }, + { + "name": "Ethernet68", + "index": 18, + "phy_id": 8, + "system_lanes": [280,281,282,283], + "line_lanes": [264,265,266,267,268,269,270,271] + }, + { + "name": "Ethernet72", + "index": 19, + "phy_id": 9, + "system_lanes": [308,309,310,311], + "line_lanes": [288,289,290,291,292,293,294,295] + }, + { + "name": "Ethernet76", + "index": 20, + "phy_id": 9, + "system_lanes": [312,313,314,315], + "line_lanes": [296,297,298,299,300,301,302,303] + }, + { + "name": "Ethernet80", + "index": 21, + "phy_id": 10, + "system_lanes": [340,341,342,343], + "line_lanes": [320,321,322,323,324,325,326,327] + }, + { + "name": "Ethernet84", + "index": 22, + "phy_id": 10, + "system_lanes": [344,345,346,347], + "line_lanes": [328,329,330,331,332,333,334,335] + }, + { + "name": "Ethernet88", + "index": 23, + "phy_id": 11, + "system_lanes": [372,373,374,375], + "line_lanes": [352,353,354,355,356,357,358,359] + }, + { + "name": "Ethernet92", + "index": 24, + "phy_id": 11, + "system_lanes": [376,377,378,379], + "line_lanes": [360,361,362,363,364,365,366,367] + }, + { + "name": "Ethernet96", + "index": 25, + "phy_id": 12, + "system_lanes": [404,405,406,407], + "line_lanes": [384,385,386,387,388,389,390,391] + }, + { + "name": "Ethernet100", + "index": 26, + "phy_id": 12, + "system_lanes": [408,409,410,411], + "line_lanes": [392,393,394,395,396,397,398,399] + }, + { + "name": "Ethernet104", + "index": 27, + "phy_id": 13, + "system_lanes": [436,437,438,439], + "line_lanes": [416,417,418,419,420,421,422,423] + }, + { + "name": "Ethernet108", + "index": 28, + "phy_id": 13, + "system_lanes": [440,441,442,443], + "line_lanes": [424,425,426,427,428,429,430,431] + }, + { + "name": "Ethernet112", + "index": 29, + "phy_id": 14, + "system_lanes": [468,469,470,471], + "line_lanes": [448,449,450,451,452,453,454,455] + }, + { + "name": "Ethernet116", + "index": 30, + "phy_id": 14, + "system_lanes": [472,473,474,475], + "line_lanes": [456,457,458,459,460,461,462,463] + }, + { + "name": "Ethernet120", + "index": 31, + "phy_id": 15, + "system_lanes": [500,501,502,503], + "line_lanes": [480,481,482,483,484,485,486,487] + }, + { + "name": "Ethernet124", + "index": 32, + "phy_id": 15, + "system_lanes": [504,505,506,507], + "line_lanes": [488,489,490,491,492,493,494,495] + } + ] +} diff --git a/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/defaults/nh5010.bcm b/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/defaults/nh5010.bcm new file mode 100644 index 00000000000..a4e9cec0eb7 --- /dev/null +++ b/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/defaults/nh5010.bcm @@ -0,0 +1,2282 @@ +# ---------------------------------------------------------------------------------------------------- +# core_0 +# ---------------------------------------------------------------------------------------------------- + +# core 0 lane0 +lane_to_serdes_map_nif_lane0.BCM8887X=rx6:tx7 +phy_rx_polarity_flip_phy0.BCM8887X=0 +phy_tx_polarity_flip_phy0.BCM8887X=1 + +# core 0 lane1 +lane_to_serdes_map_nif_lane1.BCM8887X=rx4:tx3 +phy_rx_polarity_flip_phy1.BCM8887X=0 +phy_tx_polarity_flip_phy1.BCM8887X=1 + +# core 0 lane2 +lane_to_serdes_map_nif_lane2.BCM8887X=rx7:tx1 +phy_rx_polarity_flip_phy2.BCM8887X=0 +phy_tx_polarity_flip_phy2.BCM8887X=0 + +# core 0 lane3 +lane_to_serdes_map_nif_lane3.BCM8887X=rx5:tx2 +phy_rx_polarity_flip_phy3.BCM8887X=0 +phy_tx_polarity_flip_phy3.BCM8887X=1 + +# core 0 lane4 +lane_to_serdes_map_nif_lane4.BCM8887X=rx2:tx0 +phy_rx_polarity_flip_phy4.BCM8887X=0 +phy_tx_polarity_flip_phy4.BCM8887X=0 + +# core 0 lane5 +lane_to_serdes_map_nif_lane5.BCM8887X=rx3:tx6 +phy_rx_polarity_flip_phy5.BCM8887X=1 +phy_tx_polarity_flip_phy5.BCM8887X=1 + +# core 0 lane6 +lane_to_serdes_map_nif_lane6.BCM8887X=rx0:tx4 +phy_rx_polarity_flip_phy6.BCM8887X=0 +phy_tx_polarity_flip_phy6.BCM8887X=0 + +# core 0 lane7 +lane_to_serdes_map_nif_lane7.BCM8887X=rx1:tx5 +phy_rx_polarity_flip_phy7.BCM8887X=0 +phy_tx_polarity_flip_phy7.BCM8887X=0 + + +# ---------------------------------------------------------------------------------------------------- +# core_1 +# ---------------------------------------------------------------------------------------------------- + +# core 1 lane8 +lane_to_serdes_map_nif_lane8.BCM8887X=rx10:tx8 +phy_rx_polarity_flip_phy8.BCM8887X=0 +phy_tx_polarity_flip_phy8.BCM8887X=0 + +# core 1 lane9 +lane_to_serdes_map_nif_lane9.BCM8887X=rx11:tx14 +phy_rx_polarity_flip_phy9.BCM8887X=1 +phy_tx_polarity_flip_phy9.BCM8887X=1 + +# core 1 lane10 +lane_to_serdes_map_nif_lane10.BCM8887X=rx8:tx12 +phy_rx_polarity_flip_phy10.BCM8887X=1 +phy_tx_polarity_flip_phy10.BCM8887X=0 + +# core 1 lane11 +lane_to_serdes_map_nif_lane11.BCM8887X=rx9:tx13 +phy_rx_polarity_flip_phy11.BCM8887X=0 +phy_tx_polarity_flip_phy11.BCM8887X=0 + +# core 1 lane12 +lane_to_serdes_map_nif_lane12.BCM8887X=rx14:tx15 +phy_rx_polarity_flip_phy12.BCM8887X=0 +phy_tx_polarity_flip_phy12.BCM8887X=1 + +# core 1 lane13 +lane_to_serdes_map_nif_lane13.BCM8887X=rx12:tx11 +phy_rx_polarity_flip_phy13.BCM8887X=0 +phy_tx_polarity_flip_phy13.BCM8887X=1 + +# core 1 lane14 +lane_to_serdes_map_nif_lane14.BCM8887X=rx15:tx9 +phy_rx_polarity_flip_phy14.BCM8887X=0 +phy_tx_polarity_flip_phy14.BCM8887X=0 + +# core 1 lane15 +lane_to_serdes_map_nif_lane15.BCM8887X=rx13:tx10 +phy_rx_polarity_flip_phy15.BCM8887X=0 +phy_tx_polarity_flip_phy15.BCM8887X=1 + + +# ---------------------------------------------------------------------------------------------------- +# core_2 +# ---------------------------------------------------------------------------------------------------- + +# core 2 lane16 +lane_to_serdes_map_nif_lane16.BCM8887X=rx18:tx16 +phy_rx_polarity_flip_phy16.BCM8887X=0 +phy_tx_polarity_flip_phy16.BCM8887X=0 + +# core 2 lane17 +lane_to_serdes_map_nif_lane17.BCM8887X=rx19:tx22 +phy_rx_polarity_flip_phy17.BCM8887X=1 +phy_tx_polarity_flip_phy17.BCM8887X=1 + +# core 2 lane18 +lane_to_serdes_map_nif_lane18.BCM8887X=rx16:tx20 +phy_rx_polarity_flip_phy18.BCM8887X=0 +phy_tx_polarity_flip_phy18.BCM8887X=0 + +# core 2 lane19 +lane_to_serdes_map_nif_lane19.BCM8887X=rx17:tx21 +phy_rx_polarity_flip_phy19.BCM8887X=0 +phy_tx_polarity_flip_phy19.BCM8887X=0 + +# core 2 lane20 +lane_to_serdes_map_nif_lane20.BCM8887X=rx22:tx23 +phy_rx_polarity_flip_phy20.BCM8887X=0 +phy_tx_polarity_flip_phy20.BCM8887X=1 + +# core 2 lane21 +lane_to_serdes_map_nif_lane21.BCM8887X=rx20:tx19 +phy_rx_polarity_flip_phy21.BCM8887X=0 +phy_tx_polarity_flip_phy21.BCM8887X=1 + +# core 2 lane22 +lane_to_serdes_map_nif_lane22.BCM8887X=rx23:tx17 +phy_rx_polarity_flip_phy22.BCM8887X=0 +phy_tx_polarity_flip_phy22.BCM8887X=0 + +# core 2 lane23 +lane_to_serdes_map_nif_lane23.BCM8887X=rx21:tx18 +phy_rx_polarity_flip_phy23.BCM8887X=0 +phy_tx_polarity_flip_phy23.BCM8887X=1 + + +# ---------------------------------------------------------------------------------------------------- +# core_3 +# ---------------------------------------------------------------------------------------------------- + +# core 3 lane24 +lane_to_serdes_map_nif_lane24.BCM8887X=rx26:tx26 +phy_rx_polarity_flip_phy24.BCM8887X=1 +phy_tx_polarity_flip_phy24.BCM8887X=0 + +# core 3 lane25 +lane_to_serdes_map_nif_lane25.BCM8887X=rx27:tx25 +phy_rx_polarity_flip_phy25.BCM8887X=0 +phy_tx_polarity_flip_phy25.BCM8887X=1 + +# core 3 lane26 +lane_to_serdes_map_nif_lane26.BCM8887X=rx28:tx31 +phy_rx_polarity_flip_phy26.BCM8887X=0 +phy_tx_polarity_flip_phy26.BCM8887X=0 + +# core 3 lane27 +lane_to_serdes_map_nif_lane27.BCM8887X=rx30:tx24 +phy_rx_polarity_flip_phy27.BCM8887X=1 +phy_tx_polarity_flip_phy27.BCM8887X=0 + +# core 3 lane28 +lane_to_serdes_map_nif_lane28.BCM8887X=rx29:tx28 +phy_rx_polarity_flip_phy28.BCM8887X=1 +phy_tx_polarity_flip_phy28.BCM8887X=1 + +# core 3 lane29 +lane_to_serdes_map_nif_lane29.BCM8887X=rx31:tx27 +phy_rx_polarity_flip_phy29.BCM8887X=0 +phy_tx_polarity_flip_phy29.BCM8887X=1 + +# core 3 lane30 +lane_to_serdes_map_nif_lane30.BCM8887X=rx24:tx30 +phy_rx_polarity_flip_phy30.BCM8887X=0 +phy_tx_polarity_flip_phy30.BCM8887X=1 + +# core 3 lane31 +lane_to_serdes_map_nif_lane31.BCM8887X=rx25:tx29 +phy_rx_polarity_flip_phy31.BCM8887X=0 +phy_tx_polarity_flip_phy31.BCM8887X=1 + + +# ---------------------------------------------------------------------------------------------------- +# core_4 +# ---------------------------------------------------------------------------------------------------- + +# core 4 lane32 +lane_to_serdes_map_nif_lane32.BCM8887X=rx35:tx39 +phy_rx_polarity_flip_phy32.BCM8887X=1 +phy_tx_polarity_flip_phy32.BCM8887X=0 + +# core 4 lane33 +lane_to_serdes_map_nif_lane33.BCM8887X=rx34:tx35 +phy_rx_polarity_flip_phy33.BCM8887X=0 +phy_tx_polarity_flip_phy33.BCM8887X=0 + +# core 4 lane34 +lane_to_serdes_map_nif_lane34.BCM8887X=rx37:tx34 +phy_rx_polarity_flip_phy34.BCM8887X=1 +phy_tx_polarity_flip_phy34.BCM8887X=0 + +# core 4 lane35 +lane_to_serdes_map_nif_lane35.BCM8887X=rx39:tx33 +phy_rx_polarity_flip_phy35.BCM8887X=1 +phy_tx_polarity_flip_phy35.BCM8887X=1 + +# core 4 lane36 +lane_to_serdes_map_nif_lane36.BCM8887X=rx33:tx36 +phy_rx_polarity_flip_phy36.BCM8887X=1 +phy_tx_polarity_flip_phy36.BCM8887X=0 + +# core 4 lane37 +lane_to_serdes_map_nif_lane37.BCM8887X=rx32:tx37 +phy_rx_polarity_flip_phy37.BCM8887X=0 +phy_tx_polarity_flip_phy37.BCM8887X=1 + +# core 4 lane38 +lane_to_serdes_map_nif_lane38.BCM8887X=rx36:tx38 +phy_rx_polarity_flip_phy38.BCM8887X=0 +phy_tx_polarity_flip_phy38.BCM8887X=0 + +# core 4 lane39 +lane_to_serdes_map_nif_lane39.BCM8887X=rx38:tx32 +phy_rx_polarity_flip_phy39.BCM8887X=0 +phy_tx_polarity_flip_phy39.BCM8887X=1 + + +# ---------------------------------------------------------------------------------------------------- +# core_5 +# ---------------------------------------------------------------------------------------------------- + +# core 5 lane40 +lane_to_serdes_map_nif_lane40.BCM8887X=rx43:tx47 +phy_rx_polarity_flip_phy40.BCM8887X=1 +phy_tx_polarity_flip_phy40.BCM8887X=0 + +# core 5 lane41 +lane_to_serdes_map_nif_lane41.BCM8887X=rx42:tx43 +phy_rx_polarity_flip_phy41.BCM8887X=0 +phy_tx_polarity_flip_phy41.BCM8887X=0 + +# core 5 lane42 +lane_to_serdes_map_nif_lane42.BCM8887X=rx45:tx42 +phy_rx_polarity_flip_phy42.BCM8887X=1 +phy_tx_polarity_flip_phy42.BCM8887X=0 + +# core 5 lane43 +lane_to_serdes_map_nif_lane43.BCM8887X=rx47:tx41 +phy_rx_polarity_flip_phy43.BCM8887X=1 +phy_tx_polarity_flip_phy43.BCM8887X=1 + +# core 5 lane44 +lane_to_serdes_map_nif_lane44.BCM8887X=rx41:tx44 +phy_rx_polarity_flip_phy44.BCM8887X=1 +phy_tx_polarity_flip_phy44.BCM8887X=0 + +# core 5 lane45 +lane_to_serdes_map_nif_lane45.BCM8887X=rx40:tx45 +phy_rx_polarity_flip_phy45.BCM8887X=0 +phy_tx_polarity_flip_phy45.BCM8887X=1 + +# core 5 lane46 +lane_to_serdes_map_nif_lane46.BCM8887X=rx44:tx46 +phy_rx_polarity_flip_phy46.BCM8887X=0 +phy_tx_polarity_flip_phy46.BCM8887X=0 + +# core 5 lane47 +lane_to_serdes_map_nif_lane47.BCM8887X=rx46:tx40 +phy_rx_polarity_flip_phy47.BCM8887X=0 +phy_tx_polarity_flip_phy47.BCM8887X=1 + + +# ---------------------------------------------------------------------------------------------------- +# core_6 +# ---------------------------------------------------------------------------------------------------- + +# core 6 lane48 +lane_to_serdes_map_nif_lane48.BCM8887X=rx51:tx55 +phy_rx_polarity_flip_phy48.BCM8887X=1 +phy_tx_polarity_flip_phy48.BCM8887X=0 + +# core 6 lane49 +lane_to_serdes_map_nif_lane49.BCM8887X=rx50:tx51 +phy_rx_polarity_flip_phy49.BCM8887X=0 +phy_tx_polarity_flip_phy49.BCM8887X=0 + +# core 6 lane50 +lane_to_serdes_map_nif_lane50.BCM8887X=rx53:tx50 +phy_rx_polarity_flip_phy50.BCM8887X=1 +phy_tx_polarity_flip_phy50.BCM8887X=0 + +# core 6 lane51 +lane_to_serdes_map_nif_lane51.BCM8887X=rx55:tx49 +phy_rx_polarity_flip_phy51.BCM8887X=1 +phy_tx_polarity_flip_phy51.BCM8887X=1 + +# core 6 lane52 +lane_to_serdes_map_nif_lane52.BCM8887X=rx49:tx52 +phy_rx_polarity_flip_phy52.BCM8887X=1 +phy_tx_polarity_flip_phy52.BCM8887X=0 + +# core 6 lane53 +lane_to_serdes_map_nif_lane53.BCM8887X=rx48:tx53 +phy_rx_polarity_flip_phy53.BCM8887X=0 +phy_tx_polarity_flip_phy53.BCM8887X=1 + +# core 6 lane54 +lane_to_serdes_map_nif_lane54.BCM8887X=rx52:tx54 +phy_rx_polarity_flip_phy54.BCM8887X=0 +phy_tx_polarity_flip_phy54.BCM8887X=0 + +# core 6 lane55 +lane_to_serdes_map_nif_lane55.BCM8887X=rx54:tx48 +phy_rx_polarity_flip_phy55.BCM8887X=0 +phy_tx_polarity_flip_phy55.BCM8887X=1 + + +# ---------------------------------------------------------------------------------------------------- +# core_7 +# ---------------------------------------------------------------------------------------------------- + +# core 7 lane56 +lane_to_serdes_map_nif_lane56.BCM8887X=rx58:tx59 +phy_rx_polarity_flip_phy56.BCM8887X=1 +phy_tx_polarity_flip_phy56.BCM8887X=1 + +# core 7 lane57 +lane_to_serdes_map_nif_lane57.BCM8887X=rx59:tx61 +phy_rx_polarity_flip_phy57.BCM8887X=0 +phy_tx_polarity_flip_phy57.BCM8887X=1 + +# core 7 lane58 +lane_to_serdes_map_nif_lane58.BCM8887X=rx60:tx60 +phy_rx_polarity_flip_phy58.BCM8887X=0 +phy_tx_polarity_flip_phy58.BCM8887X=1 + +# core 7 lane59 +lane_to_serdes_map_nif_lane59.BCM8887X=rx62:tx56 +phy_rx_polarity_flip_phy59.BCM8887X=1 +phy_tx_polarity_flip_phy59.BCM8887X=1 + +# core 7 lane60 +lane_to_serdes_map_nif_lane60.BCM8887X=rx56:tx62 +phy_rx_polarity_flip_phy60.BCM8887X=0 +phy_tx_polarity_flip_phy60.BCM8887X=0 + +# core 7 lane61 +lane_to_serdes_map_nif_lane61.BCM8887X=rx57:tx58 +phy_rx_polarity_flip_phy61.BCM8887X=0 +phy_tx_polarity_flip_phy61.BCM8887X=0 + +# core 7 lane62 +lane_to_serdes_map_nif_lane62.BCM8887X=rx63:tx63 +phy_rx_polarity_flip_phy62.BCM8887X=0 +phy_tx_polarity_flip_phy62.BCM8887X=1 + +# core 7 lane63 +lane_to_serdes_map_nif_lane63.BCM8887X=rx61:tx57 +phy_rx_polarity_flip_phy63.BCM8887X=0 +phy_tx_polarity_flip_phy63.BCM8887X=1 + + +# ---------------------------------------------------------------------------------------------------- +# core_8 +# ---------------------------------------------------------------------------------------------------- + +# core 8 lane64 +lane_to_serdes_map_nif_lane64.BCM8887X=rx67:tx71 +phy_rx_polarity_flip_phy64.BCM8887X=0 +phy_tx_polarity_flip_phy64.BCM8887X=0 + +# core 8 lane65 +lane_to_serdes_map_nif_lane65.BCM8887X=rx66:tx65 +phy_rx_polarity_flip_phy65.BCM8887X=0 +phy_tx_polarity_flip_phy65.BCM8887X=1 + +# core 8 lane66 +lane_to_serdes_map_nif_lane66.BCM8887X=rx70:tx70 +phy_rx_polarity_flip_phy66.BCM8887X=1 +phy_tx_polarity_flip_phy66.BCM8887X=1 + +# core 8 lane67 +lane_to_serdes_map_nif_lane67.BCM8887X=rx68:tx66 +phy_rx_polarity_flip_phy67.BCM8887X=1 +phy_tx_polarity_flip_phy67.BCM8887X=0 + +# core 8 lane68 +lane_to_serdes_map_nif_lane68.BCM8887X=rx69:tx67 +phy_rx_polarity_flip_phy68.BCM8887X=0 +phy_tx_polarity_flip_phy68.BCM8887X=0 + +# core 8 lane69 +lane_to_serdes_map_nif_lane69.BCM8887X=rx71:tx69 +phy_rx_polarity_flip_phy69.BCM8887X=1 +phy_tx_polarity_flip_phy69.BCM8887X=1 + +# core 8 lane70 +lane_to_serdes_map_nif_lane70.BCM8887X=rx65:tx68 +phy_rx_polarity_flip_phy70.BCM8887X=0 +phy_tx_polarity_flip_phy70.BCM8887X=0 + +# core 8 lane71 +lane_to_serdes_map_nif_lane71.BCM8887X=rx64:tx64 +phy_rx_polarity_flip_phy71.BCM8887X=1 +phy_tx_polarity_flip_phy71.BCM8887X=1 + + +# ---------------------------------------------------------------------------------------------------- +# core_9 +# ---------------------------------------------------------------------------------------------------- + +# core 9 lane72 +lane_to_serdes_map_nif_lane72.BCM8887X=rx75:tx79 +phy_rx_polarity_flip_phy72.BCM8887X=0 +phy_tx_polarity_flip_phy72.BCM8887X=0 + +# core 9 lane73 +lane_to_serdes_map_nif_lane73.BCM8887X=rx74:tx73 +phy_rx_polarity_flip_phy73.BCM8887X=0 +phy_tx_polarity_flip_phy73.BCM8887X=1 + +# core 9 lane74 +lane_to_serdes_map_nif_lane74.BCM8887X=rx78:tx78 +phy_rx_polarity_flip_phy74.BCM8887X=1 +phy_tx_polarity_flip_phy74.BCM8887X=1 + +# core 9 lane75 +lane_to_serdes_map_nif_lane75.BCM8887X=rx76:tx74 +phy_rx_polarity_flip_phy75.BCM8887X=1 +phy_tx_polarity_flip_phy75.BCM8887X=0 + +# core 9 lane76 +lane_to_serdes_map_nif_lane76.BCM8887X=rx77:tx75 +phy_rx_polarity_flip_phy76.BCM8887X=0 +phy_tx_polarity_flip_phy76.BCM8887X=0 + +# core 9 lane77 +lane_to_serdes_map_nif_lane77.BCM8887X=rx79:tx77 +phy_rx_polarity_flip_phy77.BCM8887X=1 +phy_tx_polarity_flip_phy77.BCM8887X=1 + +# core 9 lane78 +lane_to_serdes_map_nif_lane78.BCM8887X=rx73:tx76 +phy_rx_polarity_flip_phy78.BCM8887X=0 +phy_tx_polarity_flip_phy78.BCM8887X=0 + +# core 9 lane79 +lane_to_serdes_map_nif_lane79.BCM8887X=rx72:tx72 +phy_rx_polarity_flip_phy79.BCM8887X=1 +phy_tx_polarity_flip_phy79.BCM8887X=1 + + +# ---------------------------------------------------------------------------------------------------- +# core_10 +# ---------------------------------------------------------------------------------------------------- + +# core 10 lane80 +lane_to_serdes_map_nif_lane80.BCM8887X=rx83:tx87 +phy_rx_polarity_flip_phy80.BCM8887X=0 +phy_tx_polarity_flip_phy80.BCM8887X=0 + +# core 10 lane81 +lane_to_serdes_map_nif_lane81.BCM8887X=rx82:tx81 +phy_rx_polarity_flip_phy81.BCM8887X=0 +phy_tx_polarity_flip_phy81.BCM8887X=1 + +# core 10 lane82 +lane_to_serdes_map_nif_lane82.BCM8887X=rx86:tx86 +phy_rx_polarity_flip_phy82.BCM8887X=1 +phy_tx_polarity_flip_phy82.BCM8887X=1 + +# core 10 lane83 +lane_to_serdes_map_nif_lane83.BCM8887X=rx84:tx82 +phy_rx_polarity_flip_phy83.BCM8887X=1 +phy_tx_polarity_flip_phy83.BCM8887X=0 + +# core 10 lane84 +lane_to_serdes_map_nif_lane84.BCM8887X=rx85:tx83 +phy_rx_polarity_flip_phy84.BCM8887X=0 +phy_tx_polarity_flip_phy84.BCM8887X=0 + +# core 10 lane85 +lane_to_serdes_map_nif_lane85.BCM8887X=rx87:tx85 +phy_rx_polarity_flip_phy85.BCM8887X=1 +phy_tx_polarity_flip_phy85.BCM8887X=1 + +# core 10 lane86 +lane_to_serdes_map_nif_lane86.BCM8887X=rx81:tx84 +phy_rx_polarity_flip_phy86.BCM8887X=0 +phy_tx_polarity_flip_phy86.BCM8887X=0 + +# core 10 lane87 +lane_to_serdes_map_nif_lane87.BCM8887X=rx80:tx80 +phy_rx_polarity_flip_phy87.BCM8887X=1 +phy_tx_polarity_flip_phy87.BCM8887X=1 + + +# ---------------------------------------------------------------------------------------------------- +# core_11 +# ---------------------------------------------------------------------------------------------------- + +# core 11 lane88 +lane_to_serdes_map_nif_lane88.BCM8887X=rx91:tx95 +phy_rx_polarity_flip_phy88.BCM8887X=0 +phy_tx_polarity_flip_phy88.BCM8887X=0 + +# core 11 lane89 +lane_to_serdes_map_nif_lane89.BCM8887X=rx90:tx89 +phy_rx_polarity_flip_phy89.BCM8887X=0 +phy_tx_polarity_flip_phy89.BCM8887X=1 + +# core 11 lane90 +lane_to_serdes_map_nif_lane90.BCM8887X=rx94:tx94 +phy_rx_polarity_flip_phy90.BCM8887X=1 +phy_tx_polarity_flip_phy90.BCM8887X=1 + +# core 11 lane91 +lane_to_serdes_map_nif_lane91.BCM8887X=rx92:tx90 +phy_rx_polarity_flip_phy91.BCM8887X=1 +phy_tx_polarity_flip_phy91.BCM8887X=0 + +# core 11 lane92 +lane_to_serdes_map_nif_lane92.BCM8887X=rx93:tx91 +phy_rx_polarity_flip_phy92.BCM8887X=0 +phy_tx_polarity_flip_phy92.BCM8887X=0 + +# core 11 lane93 +lane_to_serdes_map_nif_lane93.BCM8887X=rx95:tx93 +phy_rx_polarity_flip_phy93.BCM8887X=1 +phy_tx_polarity_flip_phy93.BCM8887X=1 + +# core 11 lane94 +lane_to_serdes_map_nif_lane94.BCM8887X=rx89:tx92 +phy_rx_polarity_flip_phy94.BCM8887X=0 +phy_tx_polarity_flip_phy94.BCM8887X=0 + +# core 11 lane95 +lane_to_serdes_map_nif_lane95.BCM8887X=rx88:tx88 +phy_rx_polarity_flip_phy95.BCM8887X=1 +phy_tx_polarity_flip_phy95.BCM8887X=1 + + +# ---------------------------------------------------------------------------------------------------- +# core_12 +# ---------------------------------------------------------------------------------------------------- + +# core 12 lane96 +lane_to_serdes_map_nif_lane96.BCM8887X=rx100:tx103 +phy_rx_polarity_flip_phy96.BCM8887X=1 +phy_tx_polarity_flip_phy96.BCM8887X=0 + +# core 12 lane97 +lane_to_serdes_map_nif_lane97.BCM8887X=rx96:tx98 +phy_rx_polarity_flip_phy97.BCM8887X=1 +phy_tx_polarity_flip_phy97.BCM8887X=1 + +# core 12 lane98 +lane_to_serdes_map_nif_lane98.BCM8887X=rx99:tx99 +phy_rx_polarity_flip_phy98.BCM8887X=0 +phy_tx_polarity_flip_phy98.BCM8887X=0 + +# core 12 lane99 +lane_to_serdes_map_nif_lane99.BCM8887X=rx101:tx97 +phy_rx_polarity_flip_phy99.BCM8887X=0 +phy_tx_polarity_flip_phy99.BCM8887X=0 + +# core 12 lane100 +lane_to_serdes_map_nif_lane100.BCM8887X=rx98:tx100 +phy_rx_polarity_flip_phy100.BCM8887X=1 +phy_tx_polarity_flip_phy100.BCM8887X=0 + +# core 12 lane101 +lane_to_serdes_map_nif_lane101.BCM8887X=rx103:tx96 +phy_rx_polarity_flip_phy101.BCM8887X=1 +phy_tx_polarity_flip_phy101.BCM8887X=0 + +# core 12 lane102 +lane_to_serdes_map_nif_lane102.BCM8887X=rx102:tx101 +phy_rx_polarity_flip_phy102.BCM8887X=0 +phy_tx_polarity_flip_phy102.BCM8887X=1 + +# core 12 lane103 +lane_to_serdes_map_nif_lane103.BCM8887X=rx97:tx102 +phy_rx_polarity_flip_phy103.BCM8887X=1 +phy_tx_polarity_flip_phy103.BCM8887X=1 + + +# ---------------------------------------------------------------------------------------------------- +# core_13 +# ---------------------------------------------------------------------------------------------------- + +# core 13 lane104 +lane_to_serdes_map_nif_lane104.BCM8887X=rx107:tx108 +phy_rx_polarity_flip_phy104.BCM8887X=1 +phy_tx_polarity_flip_phy104.BCM8887X=0 + +# core 13 lane105 +lane_to_serdes_map_nif_lane105.BCM8887X=rx106:tx107 +phy_rx_polarity_flip_phy105.BCM8887X=0 +phy_tx_polarity_flip_phy105.BCM8887X=1 + +# core 13 lane106 +lane_to_serdes_map_nif_lane106.BCM8887X=rx110:tx110 +phy_rx_polarity_flip_phy106.BCM8887X=0 +phy_tx_polarity_flip_phy106.BCM8887X=0 + +# core 13 lane107 +lane_to_serdes_map_nif_lane107.BCM8887X=rx108:tx109 +phy_rx_polarity_flip_phy107.BCM8887X=0 +phy_tx_polarity_flip_phy107.BCM8887X=1 + +# core 13 lane108 +lane_to_serdes_map_nif_lane108.BCM8887X=rx105:tx111 +phy_rx_polarity_flip_phy108.BCM8887X=1 +phy_tx_polarity_flip_phy108.BCM8887X=1 + +# core 13 lane109 +lane_to_serdes_map_nif_lane109.BCM8887X=rx104:tx104 +phy_rx_polarity_flip_phy109.BCM8887X=0 +phy_tx_polarity_flip_phy109.BCM8887X=0 + +# core 13 lane110 +lane_to_serdes_map_nif_lane110.BCM8887X=rx111:tx106 +phy_rx_polarity_flip_phy110.BCM8887X=1 +phy_tx_polarity_flip_phy110.BCM8887X=1 + +# core 13 lane111 +lane_to_serdes_map_nif_lane111.BCM8887X=rx109:tx105 +phy_rx_polarity_flip_phy111.BCM8887X=1 +phy_tx_polarity_flip_phy111.BCM8887X=1 + + +# ---------------------------------------------------------------------------------------------------- +# core_14 +# ---------------------------------------------------------------------------------------------------- + +# core 14 lane112 +lane_to_serdes_map_nif_lane112.BCM8887X=rx115:tx116 +phy_rx_polarity_flip_phy112.BCM8887X=1 +phy_tx_polarity_flip_phy112.BCM8887X=0 + +# core 14 lane113 +lane_to_serdes_map_nif_lane113.BCM8887X=rx114:tx115 +phy_rx_polarity_flip_phy113.BCM8887X=1 +phy_tx_polarity_flip_phy113.BCM8887X=1 + +# core 14 lane114 +lane_to_serdes_map_nif_lane114.BCM8887X=rx118:tx118 +phy_rx_polarity_flip_phy114.BCM8887X=0 +phy_tx_polarity_flip_phy114.BCM8887X=0 + +# core 14 lane115 +lane_to_serdes_map_nif_lane115.BCM8887X=rx116:tx117 +phy_rx_polarity_flip_phy115.BCM8887X=0 +phy_tx_polarity_flip_phy115.BCM8887X=1 + +# core 14 lane116 +lane_to_serdes_map_nif_lane116.BCM8887X=rx113:tx119 +phy_rx_polarity_flip_phy116.BCM8887X=1 +phy_tx_polarity_flip_phy116.BCM8887X=1 + +# core 14 lane117 +lane_to_serdes_map_nif_lane117.BCM8887X=rx112:tx112 +phy_rx_polarity_flip_phy117.BCM8887X=0 +phy_tx_polarity_flip_phy117.BCM8887X=0 + +# core 14 lane118 +lane_to_serdes_map_nif_lane118.BCM8887X=rx119:tx114 +phy_rx_polarity_flip_phy118.BCM8887X=1 +phy_tx_polarity_flip_phy118.BCM8887X=1 + +# core 14 lane119 +lane_to_serdes_map_nif_lane119.BCM8887X=rx117:tx113 +phy_rx_polarity_flip_phy119.BCM8887X=1 +phy_tx_polarity_flip_phy119.BCM8887X=1 + + +# ---------------------------------------------------------------------------------------------------- +# core_15 +# ---------------------------------------------------------------------------------------------------- + +# core 15 lane120 +lane_to_serdes_map_nif_lane120.BCM8887X=rx123:tx124 +phy_rx_polarity_flip_phy120.BCM8887X=1 +phy_tx_polarity_flip_phy120.BCM8887X=0 + +# core 15 lane121 +lane_to_serdes_map_nif_lane121.BCM8887X=rx122:tx123 +phy_rx_polarity_flip_phy121.BCM8887X=1 +phy_tx_polarity_flip_phy121.BCM8887X=1 + +# core 15 lane122 +lane_to_serdes_map_nif_lane122.BCM8887X=rx126:tx126 +phy_rx_polarity_flip_phy122.BCM8887X=0 +phy_tx_polarity_flip_phy122.BCM8887X=0 + +# core 15 lane123 +lane_to_serdes_map_nif_lane123.BCM8887X=rx124:tx125 +phy_rx_polarity_flip_phy123.BCM8887X=0 +phy_tx_polarity_flip_phy123.BCM8887X=1 + +# core 15 lane124 +lane_to_serdes_map_nif_lane124.BCM8887X=rx121:tx127 +phy_rx_polarity_flip_phy124.BCM8887X=1 +phy_tx_polarity_flip_phy124.BCM8887X=1 + +# core 15 lane125 +lane_to_serdes_map_nif_lane125.BCM8887X=rx120:tx120 +phy_rx_polarity_flip_phy125.BCM8887X=0 +phy_tx_polarity_flip_phy125.BCM8887X=0 + +# core 15 lane126 +lane_to_serdes_map_nif_lane126.BCM8887X=rx127:tx122 +phy_rx_polarity_flip_phy126.BCM8887X=1 +phy_tx_polarity_flip_phy126.BCM8887X=1 + +# core 15 lane127 +lane_to_serdes_map_nif_lane127.BCM8887X=rx125:tx121 +phy_rx_polarity_flip_phy127.BCM8887X=1 +phy_tx_polarity_flip_phy127.BCM8887X=1 + + +# ---------------------------------------------------------------------------------------------------- +# core_16 +# ---------------------------------------------------------------------------------------------------- + +# core 16 lane128 +lane_to_serdes_map_nif_lane128.BCM8887X=rx131:tx135 +phy_rx_polarity_flip_phy128.BCM8887X=0 +phy_tx_polarity_flip_phy128.BCM8887X=0 + +# core 16 lane129 +lane_to_serdes_map_nif_lane129.BCM8887X=rx130:tx131 +phy_rx_polarity_flip_phy129.BCM8887X=0 +phy_tx_polarity_flip_phy129.BCM8887X=1 + +# core 16 lane130 +lane_to_serdes_map_nif_lane130.BCM8887X=rx129:tx129 +phy_rx_polarity_flip_phy130.BCM8887X=1 +phy_tx_polarity_flip_phy130.BCM8887X=1 + +# core 16 lane131 +lane_to_serdes_map_nif_lane131.BCM8887X=rx128:tx130 +phy_rx_polarity_flip_phy131.BCM8887X=0 +phy_tx_polarity_flip_phy131.BCM8887X=1 + +# core 16 lane132 +lane_to_serdes_map_nif_lane132.BCM8887X=rx133:tx132 +phy_rx_polarity_flip_phy132.BCM8887X=1 +phy_tx_polarity_flip_phy132.BCM8887X=1 + +# core 16 lane133 +lane_to_serdes_map_nif_lane133.BCM8887X=rx135:tx133 +phy_rx_polarity_flip_phy133.BCM8887X=0 +phy_tx_polarity_flip_phy133.BCM8887X=0 + +# core 16 lane134 +lane_to_serdes_map_nif_lane134.BCM8887X=rx132:tx128 +phy_rx_polarity_flip_phy134.BCM8887X=1 +phy_tx_polarity_flip_phy134.BCM8887X=1 + +# core 16 lane135 +lane_to_serdes_map_nif_lane135.BCM8887X=rx134:tx134 +phy_rx_polarity_flip_phy135.BCM8887X=0 +phy_tx_polarity_flip_phy135.BCM8887X=1 + + +# ---------------------------------------------------------------------------------------------------- +# core_17 +# ---------------------------------------------------------------------------------------------------- + +# core 17 lane136 +lane_to_serdes_map_nif_lane136.BCM8887X=rx139:tx143 +phy_rx_polarity_flip_phy136.BCM8887X=0 +phy_tx_polarity_flip_phy136.BCM8887X=0 + +# core 17 lane137 +lane_to_serdes_map_nif_lane137.BCM8887X=rx138:tx139 +phy_rx_polarity_flip_phy137.BCM8887X=0 +phy_tx_polarity_flip_phy137.BCM8887X=1 + +# core 17 lane138 +lane_to_serdes_map_nif_lane138.BCM8887X=rx137:tx137 +phy_rx_polarity_flip_phy138.BCM8887X=1 +phy_tx_polarity_flip_phy138.BCM8887X=1 + +# core 17 lane139 +lane_to_serdes_map_nif_lane139.BCM8887X=rx136:tx138 +phy_rx_polarity_flip_phy139.BCM8887X=1 +phy_tx_polarity_flip_phy139.BCM8887X=1 + +# core 17 lane140 +lane_to_serdes_map_nif_lane140.BCM8887X=rx141:tx140 +phy_rx_polarity_flip_phy140.BCM8887X=1 +phy_tx_polarity_flip_phy140.BCM8887X=1 + +# core 17 lane141 +lane_to_serdes_map_nif_lane141.BCM8887X=rx143:tx141 +phy_rx_polarity_flip_phy141.BCM8887X=0 +phy_tx_polarity_flip_phy141.BCM8887X=0 + +# core 17 lane142 +lane_to_serdes_map_nif_lane142.BCM8887X=rx140:tx136 +phy_rx_polarity_flip_phy142.BCM8887X=1 +phy_tx_polarity_flip_phy142.BCM8887X=1 + +# core 17 lane143 +lane_to_serdes_map_nif_lane143.BCM8887X=rx142:tx142 +phy_rx_polarity_flip_phy143.BCM8887X=0 +phy_tx_polarity_flip_phy143.BCM8887X=1 + + +# ---------------------------------------------------------------------------------------------------- +# core_18 +# ---------------------------------------------------------------------------------------------------- + +# core 18 lane144 +lane_to_serdes_map_nif_lane144.BCM8887X=rx147:tx151 +phy_rx_polarity_flip_phy144.BCM8887X=0 +phy_tx_polarity_flip_phy144.BCM8887X=0 + +# core 18 lane145 +lane_to_serdes_map_nif_lane145.BCM8887X=rx146:tx147 +phy_rx_polarity_flip_phy145.BCM8887X=0 +phy_tx_polarity_flip_phy145.BCM8887X=1 + +# core 18 lane146 +lane_to_serdes_map_nif_lane146.BCM8887X=rx145:tx145 +phy_rx_polarity_flip_phy146.BCM8887X=1 +phy_tx_polarity_flip_phy146.BCM8887X=1 + +# core 18 lane147 +lane_to_serdes_map_nif_lane147.BCM8887X=rx144:tx146 +phy_rx_polarity_flip_phy147.BCM8887X=0 +phy_tx_polarity_flip_phy147.BCM8887X=1 + +# core 18 lane148 +lane_to_serdes_map_nif_lane148.BCM8887X=rx149:tx148 +phy_rx_polarity_flip_phy148.BCM8887X=1 +phy_tx_polarity_flip_phy148.BCM8887X=1 + +# core 18 lane149 +lane_to_serdes_map_nif_lane149.BCM8887X=rx151:tx149 +phy_rx_polarity_flip_phy149.BCM8887X=0 +phy_tx_polarity_flip_phy149.BCM8887X=0 + +# core 18 lane150 +lane_to_serdes_map_nif_lane150.BCM8887X=rx148:tx144 +phy_rx_polarity_flip_phy150.BCM8887X=1 +phy_tx_polarity_flip_phy150.BCM8887X=1 + +# core 18 lane151 +lane_to_serdes_map_nif_lane151.BCM8887X=rx150:tx150 +phy_rx_polarity_flip_phy151.BCM8887X=0 +phy_tx_polarity_flip_phy151.BCM8887X=1 + + +# ---------------------------------------------------------------------------------------------------- +# core_19 +# ---------------------------------------------------------------------------------------------------- + +# core 19 lane152 +lane_to_serdes_map_nif_lane152.BCM8887X=rx155:tx156 +phy_rx_polarity_flip_phy152.BCM8887X=0 +phy_tx_polarity_flip_phy152.BCM8887X=1 + +# core 19 lane153 +lane_to_serdes_map_nif_lane153.BCM8887X=rx154:tx155 +phy_rx_polarity_flip_phy153.BCM8887X=0 +phy_tx_polarity_flip_phy153.BCM8887X=0 + +# core 19 lane154 +lane_to_serdes_map_nif_lane154.BCM8887X=rx158:tx158 +phy_rx_polarity_flip_phy154.BCM8887X=1 +phy_tx_polarity_flip_phy154.BCM8887X=1 + +# core 19 lane155 +lane_to_serdes_map_nif_lane155.BCM8887X=rx156:tx157 +phy_rx_polarity_flip_phy155.BCM8887X=1 +phy_tx_polarity_flip_phy155.BCM8887X=0 + +# core 19 lane156 +lane_to_serdes_map_nif_lane156.BCM8887X=rx153:tx159 +phy_rx_polarity_flip_phy156.BCM8887X=0 +phy_tx_polarity_flip_phy156.BCM8887X=0 + +# core 19 lane157 +lane_to_serdes_map_nif_lane157.BCM8887X=rx152:tx152 +phy_rx_polarity_flip_phy157.BCM8887X=1 +phy_tx_polarity_flip_phy157.BCM8887X=1 + +# core 19 lane158 +lane_to_serdes_map_nif_lane158.BCM8887X=rx159:tx154 +phy_rx_polarity_flip_phy158.BCM8887X=0 +phy_tx_polarity_flip_phy158.BCM8887X=0 + +# core 19 lane159 +lane_to_serdes_map_nif_lane159.BCM8887X=rx157:tx153 +phy_rx_polarity_flip_phy159.BCM8887X=0 +phy_tx_polarity_flip_phy159.BCM8887X=0 + + +# ---------------------------------------------------------------------------------------------------- +# core_20 +# ---------------------------------------------------------------------------------------------------- + +# core 20 lane160 +lane_to_serdes_map_nif_lane160.BCM8887X=rx166:tx167 +phy_rx_polarity_flip_phy160.BCM8887X=0 +phy_tx_polarity_flip_phy160.BCM8887X=1 + +# core 20 lane161 +lane_to_serdes_map_nif_lane161.BCM8887X=rx164:tx163 +phy_rx_polarity_flip_phy161.BCM8887X=1 +phy_tx_polarity_flip_phy161.BCM8887X=0 + +# core 20 lane162 +lane_to_serdes_map_nif_lane162.BCM8887X=rx160:tx162 +phy_rx_polarity_flip_phy162.BCM8887X=0 +phy_tx_polarity_flip_phy162.BCM8887X=1 + +# core 20 lane163 +lane_to_serdes_map_nif_lane163.BCM8887X=rx161:tx161 +phy_rx_polarity_flip_phy163.BCM8887X=0 +phy_tx_polarity_flip_phy163.BCM8887X=1 + +# core 20 lane164 +lane_to_serdes_map_nif_lane164.BCM8887X=rx162:tx166 +phy_rx_polarity_flip_phy164.BCM8887X=0 +phy_tx_polarity_flip_phy164.BCM8887X=1 + +# core 20 lane165 +lane_to_serdes_map_nif_lane165.BCM8887X=rx163:tx160 +phy_rx_polarity_flip_phy165.BCM8887X=0 +phy_tx_polarity_flip_phy165.BCM8887X=1 + +# core 20 lane166 +lane_to_serdes_map_nif_lane166.BCM8887X=rx167:tx164 +phy_rx_polarity_flip_phy166.BCM8887X=1 +phy_tx_polarity_flip_phy166.BCM8887X=1 + +# core 20 lane167 +lane_to_serdes_map_nif_lane167.BCM8887X=rx165:tx165 +phy_rx_polarity_flip_phy167.BCM8887X=0 +phy_tx_polarity_flip_phy167.BCM8887X=1 + + +# ---------------------------------------------------------------------------------------------------- +# core_21 +# ---------------------------------------------------------------------------------------------------- + +# core 21 lane168 +lane_to_serdes_map_nif_lane168.BCM8887X=rx170:tx174 +phy_rx_polarity_flip_phy168.BCM8887X=0 +phy_tx_polarity_flip_phy168.BCM8887X=1 + +# core 21 lane169 +lane_to_serdes_map_nif_lane169.BCM8887X=rx171:tx168 +phy_rx_polarity_flip_phy169.BCM8887X=0 +phy_tx_polarity_flip_phy169.BCM8887X=1 + +# core 21 lane170 +lane_to_serdes_map_nif_lane170.BCM8887X=rx175:tx172 +phy_rx_polarity_flip_phy170.BCM8887X=1 +phy_tx_polarity_flip_phy170.BCM8887X=1 + +# core 21 lane171 +lane_to_serdes_map_nif_lane171.BCM8887X=rx173:tx173 +phy_rx_polarity_flip_phy171.BCM8887X=0 +phy_tx_polarity_flip_phy171.BCM8887X=1 + +# core 21 lane172 +lane_to_serdes_map_nif_lane172.BCM8887X=rx174:tx175 +phy_rx_polarity_flip_phy172.BCM8887X=0 +phy_tx_polarity_flip_phy172.BCM8887X=1 + +# core 21 lane173 +lane_to_serdes_map_nif_lane173.BCM8887X=rx172:tx171 +phy_rx_polarity_flip_phy173.BCM8887X=1 +phy_tx_polarity_flip_phy173.BCM8887X=0 + +# core 21 lane174 +lane_to_serdes_map_nif_lane174.BCM8887X=rx168:tx170 +phy_rx_polarity_flip_phy174.BCM8887X=0 +phy_tx_polarity_flip_phy174.BCM8887X=1 + +# core 21 lane175 +lane_to_serdes_map_nif_lane175.BCM8887X=rx169:tx169 +phy_rx_polarity_flip_phy175.BCM8887X=0 +phy_tx_polarity_flip_phy175.BCM8887X=1 + + +# ---------------------------------------------------------------------------------------------------- +# core_22 +# ---------------------------------------------------------------------------------------------------- + +# core 22 lane176 +lane_to_serdes_map_nif_lane176.BCM8887X=rx178:tx182 +phy_rx_polarity_flip_phy176.BCM8887X=0 +phy_tx_polarity_flip_phy176.BCM8887X=1 + +# core 22 lane177 +lane_to_serdes_map_nif_lane177.BCM8887X=rx179:tx176 +phy_rx_polarity_flip_phy177.BCM8887X=0 +phy_tx_polarity_flip_phy177.BCM8887X=1 + +# core 22 lane178 +lane_to_serdes_map_nif_lane178.BCM8887X=rx183:tx180 +phy_rx_polarity_flip_phy178.BCM8887X=1 +phy_tx_polarity_flip_phy178.BCM8887X=1 + +# core 22 lane179 +lane_to_serdes_map_nif_lane179.BCM8887X=rx181:tx181 +phy_rx_polarity_flip_phy179.BCM8887X=0 +phy_tx_polarity_flip_phy179.BCM8887X=1 + +# core 22 lane180 +lane_to_serdes_map_nif_lane180.BCM8887X=rx182:tx183 +phy_rx_polarity_flip_phy180.BCM8887X=0 +phy_tx_polarity_flip_phy180.BCM8887X=1 + +# core 22 lane181 +lane_to_serdes_map_nif_lane181.BCM8887X=rx180:tx179 +phy_rx_polarity_flip_phy181.BCM8887X=1 +phy_tx_polarity_flip_phy181.BCM8887X=0 + +# core 22 lane182 +lane_to_serdes_map_nif_lane182.BCM8887X=rx176:tx178 +phy_rx_polarity_flip_phy182.BCM8887X=0 +phy_tx_polarity_flip_phy182.BCM8887X=1 + +# core 22 lane183 +lane_to_serdes_map_nif_lane183.BCM8887X=rx177:tx177 +phy_rx_polarity_flip_phy183.BCM8887X=0 +phy_tx_polarity_flip_phy183.BCM8887X=1 + + +# ---------------------------------------------------------------------------------------------------- +# core_23 +# ---------------------------------------------------------------------------------------------------- + +# core 23 lane184 +lane_to_serdes_map_nif_lane184.BCM8887X=rx187:tx191 +phy_rx_polarity_flip_phy184.BCM8887X=1 +phy_tx_polarity_flip_phy184.BCM8887X=1 + +# core 23 lane185 +lane_to_serdes_map_nif_lane185.BCM8887X=rx186:tx185 +phy_rx_polarity_flip_phy185.BCM8887X=1 +phy_tx_polarity_flip_phy185.BCM8887X=0 + +# core 23 lane186 +lane_to_serdes_map_nif_lane186.BCM8887X=rx190:tx190 +phy_rx_polarity_flip_phy186.BCM8887X=0 +phy_tx_polarity_flip_phy186.BCM8887X=0 + +# core 23 lane187 +lane_to_serdes_map_nif_lane187.BCM8887X=rx188:tx186 +phy_rx_polarity_flip_phy187.BCM8887X=0 +phy_tx_polarity_flip_phy187.BCM8887X=1 + +# core 23 lane188 +lane_to_serdes_map_nif_lane188.BCM8887X=rx189:tx187 +phy_rx_polarity_flip_phy188.BCM8887X=1 +phy_tx_polarity_flip_phy188.BCM8887X=1 + +# core 23 lane189 +lane_to_serdes_map_nif_lane189.BCM8887X=rx191:tx189 +phy_rx_polarity_flip_phy189.BCM8887X=0 +phy_tx_polarity_flip_phy189.BCM8887X=0 + +# core 23 lane190 +lane_to_serdes_map_nif_lane190.BCM8887X=rx185:tx188 +phy_rx_polarity_flip_phy190.BCM8887X=1 +phy_tx_polarity_flip_phy190.BCM8887X=1 + +# core 23 lane191 +lane_to_serdes_map_nif_lane191.BCM8887X=rx184:tx184 +phy_rx_polarity_flip_phy191.BCM8887X=0 +phy_tx_polarity_flip_phy191.BCM8887X=0 + + +# ---------------------------------------------------------------------------------------------------- +# core_24 +# ---------------------------------------------------------------------------------------------------- + +# core 24 lane192 +lane_to_serdes_map_nif_lane192.BCM8887X=rx194:tx195 +phy_rx_polarity_flip_phy192.BCM8887X=0 +phy_tx_polarity_flip_phy192.BCM8887X=0 + +# core 24 lane193 +lane_to_serdes_map_nif_lane193.BCM8887X=rx195:tx197 +phy_rx_polarity_flip_phy193.BCM8887X=1 +phy_tx_polarity_flip_phy193.BCM8887X=0 + +# core 24 lane194 +lane_to_serdes_map_nif_lane194.BCM8887X=rx196:tx196 +phy_rx_polarity_flip_phy194.BCM8887X=1 +phy_tx_polarity_flip_phy194.BCM8887X=0 + +# core 24 lane195 +lane_to_serdes_map_nif_lane195.BCM8887X=rx198:tx192 +phy_rx_polarity_flip_phy195.BCM8887X=0 +phy_tx_polarity_flip_phy195.BCM8887X=0 + +# core 24 lane196 +lane_to_serdes_map_nif_lane196.BCM8887X=rx192:tx198 +phy_rx_polarity_flip_phy196.BCM8887X=1 +phy_tx_polarity_flip_phy196.BCM8887X=1 + +# core 24 lane197 +lane_to_serdes_map_nif_lane197.BCM8887X=rx193:tx194 +phy_rx_polarity_flip_phy197.BCM8887X=0 +phy_tx_polarity_flip_phy197.BCM8887X=1 + +# core 24 lane198 +lane_to_serdes_map_nif_lane198.BCM8887X=rx199:tx199 +phy_rx_polarity_flip_phy198.BCM8887X=1 +phy_tx_polarity_flip_phy198.BCM8887X=0 + +# core 24 lane199 +lane_to_serdes_map_nif_lane199.BCM8887X=rx197:tx193 +phy_rx_polarity_flip_phy199.BCM8887X=1 +phy_tx_polarity_flip_phy199.BCM8887X=0 + + +# ---------------------------------------------------------------------------------------------------- +# core_25 +# ---------------------------------------------------------------------------------------------------- + +# core 25 lane200 +lane_to_serdes_map_nif_lane200.BCM8887X=rx202:tx203 +phy_rx_polarity_flip_phy200.BCM8887X=0 +phy_tx_polarity_flip_phy200.BCM8887X=0 + +# core 25 lane201 +lane_to_serdes_map_nif_lane201.BCM8887X=rx203:tx205 +phy_rx_polarity_flip_phy201.BCM8887X=1 +phy_tx_polarity_flip_phy201.BCM8887X=0 + +# core 25 lane202 +lane_to_serdes_map_nif_lane202.BCM8887X=rx204:tx204 +phy_rx_polarity_flip_phy202.BCM8887X=1 +phy_tx_polarity_flip_phy202.BCM8887X=0 + +# core 25 lane203 +lane_to_serdes_map_nif_lane203.BCM8887X=rx206:tx200 +phy_rx_polarity_flip_phy203.BCM8887X=0 +phy_tx_polarity_flip_phy203.BCM8887X=0 + +# core 25 lane204 +lane_to_serdes_map_nif_lane204.BCM8887X=rx200:tx206 +phy_rx_polarity_flip_phy204.BCM8887X=1 +phy_tx_polarity_flip_phy204.BCM8887X=1 + +# core 25 lane205 +lane_to_serdes_map_nif_lane205.BCM8887X=rx201:tx202 +phy_rx_polarity_flip_phy205.BCM8887X=1 +phy_tx_polarity_flip_phy205.BCM8887X=1 + +# core 25 lane206 +lane_to_serdes_map_nif_lane206.BCM8887X=rx207:tx207 +phy_rx_polarity_flip_phy206.BCM8887X=1 +phy_tx_polarity_flip_phy206.BCM8887X=0 + +# core 25 lane207 +lane_to_serdes_map_nif_lane207.BCM8887X=rx205:tx201 +phy_rx_polarity_flip_phy207.BCM8887X=1 +phy_tx_polarity_flip_phy207.BCM8887X=0 + + +# ---------------------------------------------------------------------------------------------------- +# core_26 +# ---------------------------------------------------------------------------------------------------- + +# core 26 lane208 +lane_to_serdes_map_nif_lane208.BCM8887X=rx210:tx211 +phy_rx_polarity_flip_phy208.BCM8887X=0 +phy_tx_polarity_flip_phy208.BCM8887X=0 + +# core 26 lane209 +lane_to_serdes_map_nif_lane209.BCM8887X=rx211:tx213 +phy_rx_polarity_flip_phy209.BCM8887X=1 +phy_tx_polarity_flip_phy209.BCM8887X=0 + +# core 26 lane210 +lane_to_serdes_map_nif_lane210.BCM8887X=rx212:tx212 +phy_rx_polarity_flip_phy210.BCM8887X=1 +phy_tx_polarity_flip_phy210.BCM8887X=0 + +# core 26 lane211 +lane_to_serdes_map_nif_lane211.BCM8887X=rx214:tx208 +phy_rx_polarity_flip_phy211.BCM8887X=0 +phy_tx_polarity_flip_phy211.BCM8887X=0 + +# core 26 lane212 +lane_to_serdes_map_nif_lane212.BCM8887X=rx208:tx214 +phy_rx_polarity_flip_phy212.BCM8887X=1 +phy_tx_polarity_flip_phy212.BCM8887X=1 + +# core 26 lane213 +lane_to_serdes_map_nif_lane213.BCM8887X=rx209:tx210 +phy_rx_polarity_flip_phy213.BCM8887X=1 +phy_tx_polarity_flip_phy213.BCM8887X=1 + +# core 26 lane214 +lane_to_serdes_map_nif_lane214.BCM8887X=rx215:tx215 +phy_rx_polarity_flip_phy214.BCM8887X=1 +phy_tx_polarity_flip_phy214.BCM8887X=0 + +# core 26 lane215 +lane_to_serdes_map_nif_lane215.BCM8887X=rx213:tx209 +phy_rx_polarity_flip_phy215.BCM8887X=1 +phy_tx_polarity_flip_phy215.BCM8887X=0 + + +# ---------------------------------------------------------------------------------------------------- +# core_27 +# ---------------------------------------------------------------------------------------------------- + +# core 27 lane216 +lane_to_serdes_map_nif_lane216.BCM8887X=rx218:tx219 +phy_rx_polarity_flip_phy216.BCM8887X=0 +phy_tx_polarity_flip_phy216.BCM8887X=0 + +# core 27 lane217 +lane_to_serdes_map_nif_lane217.BCM8887X=rx219:tx221 +phy_rx_polarity_flip_phy217.BCM8887X=1 +phy_tx_polarity_flip_phy217.BCM8887X=0 + +# core 27 lane218 +lane_to_serdes_map_nif_lane218.BCM8887X=rx220:tx220 +phy_rx_polarity_flip_phy218.BCM8887X=1 +phy_tx_polarity_flip_phy218.BCM8887X=0 + +# core 27 lane219 +lane_to_serdes_map_nif_lane219.BCM8887X=rx222:tx216 +phy_rx_polarity_flip_phy219.BCM8887X=0 +phy_tx_polarity_flip_phy219.BCM8887X=0 + +# core 27 lane220 +lane_to_serdes_map_nif_lane220.BCM8887X=rx216:tx222 +phy_rx_polarity_flip_phy220.BCM8887X=1 +phy_tx_polarity_flip_phy220.BCM8887X=1 + +# core 27 lane221 +lane_to_serdes_map_nif_lane221.BCM8887X=rx217:tx218 +phy_rx_polarity_flip_phy221.BCM8887X=1 +phy_tx_polarity_flip_phy221.BCM8887X=1 + +# core 27 lane222 +lane_to_serdes_map_nif_lane222.BCM8887X=rx223:tx223 +phy_rx_polarity_flip_phy222.BCM8887X=1 +phy_tx_polarity_flip_phy222.BCM8887X=0 + +# core 27 lane223 +lane_to_serdes_map_nif_lane223.BCM8887X=rx221:tx217 +phy_rx_polarity_flip_phy223.BCM8887X=1 +phy_tx_polarity_flip_phy223.BCM8887X=0 + + +# ---------------------------------------------------------------------------------------------------- +# core_28 +# ---------------------------------------------------------------------------------------------------- + +# core 28 lane224 +lane_to_serdes_map_nif_lane224.BCM8887X=rx224:tx229 +phy_rx_polarity_flip_phy224.BCM8887X=0 +phy_tx_polarity_flip_phy224.BCM8887X=1 + +# core 28 lane225 +lane_to_serdes_map_nif_lane225.BCM8887X=rx228:tx230 +phy_rx_polarity_flip_phy225.BCM8887X=1 +phy_tx_polarity_flip_phy225.BCM8887X=0 + +# core 28 lane226 +lane_to_serdes_map_nif_lane226.BCM8887X=rx229:tx228 +phy_rx_polarity_flip_phy226.BCM8887X=1 +phy_tx_polarity_flip_phy226.BCM8887X=0 + +# core 28 lane227 +lane_to_serdes_map_nif_lane227.BCM8887X=rx227:tx224 +phy_rx_polarity_flip_phy227.BCM8887X=0 +phy_tx_polarity_flip_phy227.BCM8887X=1 + +# core 28 lane228 +lane_to_serdes_map_nif_lane228.BCM8887X=rx225:tx231 +phy_rx_polarity_flip_phy228.BCM8887X=0 +phy_tx_polarity_flip_phy228.BCM8887X=0 + +# core 28 lane229 +lane_to_serdes_map_nif_lane229.BCM8887X=rx230:tx226 +phy_rx_polarity_flip_phy229.BCM8887X=0 +phy_tx_polarity_flip_phy229.BCM8887X=0 + +# core 28 lane230 +lane_to_serdes_map_nif_lane230.BCM8887X=rx231:tx227 +phy_rx_polarity_flip_phy230.BCM8887X=0 +phy_tx_polarity_flip_phy230.BCM8887X=0 + +# core 28 lane231 +lane_to_serdes_map_nif_lane231.BCM8887X=rx226:tx225 +phy_rx_polarity_flip_phy231.BCM8887X=1 +phy_tx_polarity_flip_phy231.BCM8887X=1 + + +# ---------------------------------------------------------------------------------------------------- +# core_29 +# ---------------------------------------------------------------------------------------------------- + +# core 29 lane232 +lane_to_serdes_map_nif_lane232.BCM8887X=rx234:tx234 +phy_rx_polarity_flip_phy232.BCM8887X=1 +phy_tx_polarity_flip_phy232.BCM8887X=1 + +# core 29 lane233 +lane_to_serdes_map_nif_lane233.BCM8887X=rx235:tx233 +phy_rx_polarity_flip_phy233.BCM8887X=1 +phy_tx_polarity_flip_phy233.BCM8887X=0 + +# core 29 lane234 +lane_to_serdes_map_nif_lane234.BCM8887X=rx236:tx239 +phy_rx_polarity_flip_phy234.BCM8887X=1 +phy_tx_polarity_flip_phy234.BCM8887X=1 + +# core 29 lane235 +lane_to_serdes_map_nif_lane235.BCM8887X=rx238:tx232 +phy_rx_polarity_flip_phy235.BCM8887X=0 +phy_tx_polarity_flip_phy235.BCM8887X=1 + +# core 29 lane236 +lane_to_serdes_map_nif_lane236.BCM8887X=rx237:tx236 +phy_rx_polarity_flip_phy236.BCM8887X=0 +phy_tx_polarity_flip_phy236.BCM8887X=0 + +# core 29 lane237 +lane_to_serdes_map_nif_lane237.BCM8887X=rx239:tx235 +phy_rx_polarity_flip_phy237.BCM8887X=1 +phy_tx_polarity_flip_phy237.BCM8887X=0 + +# core 29 lane238 +lane_to_serdes_map_nif_lane238.BCM8887X=rx232:tx238 +phy_rx_polarity_flip_phy238.BCM8887X=1 +phy_tx_polarity_flip_phy238.BCM8887X=0 + +# core 29 lane239 +lane_to_serdes_map_nif_lane239.BCM8887X=rx233:tx237 +phy_rx_polarity_flip_phy239.BCM8887X=1 +phy_tx_polarity_flip_phy239.BCM8887X=0 + + +# ---------------------------------------------------------------------------------------------------- +# core_30 +# ---------------------------------------------------------------------------------------------------- + +# core 30 lane240 +lane_to_serdes_map_nif_lane240.BCM8887X=rx242:tx242 +phy_rx_polarity_flip_phy240.BCM8887X=0 +phy_tx_polarity_flip_phy240.BCM8887X=1 + +# core 30 lane241 +lane_to_serdes_map_nif_lane241.BCM8887X=rx243:tx241 +phy_rx_polarity_flip_phy241.BCM8887X=1 +phy_tx_polarity_flip_phy241.BCM8887X=0 + +# core 30 lane242 +lane_to_serdes_map_nif_lane242.BCM8887X=rx244:tx247 +phy_rx_polarity_flip_phy242.BCM8887X=1 +phy_tx_polarity_flip_phy242.BCM8887X=1 + +# core 30 lane243 +lane_to_serdes_map_nif_lane243.BCM8887X=rx246:tx240 +phy_rx_polarity_flip_phy243.BCM8887X=0 +phy_tx_polarity_flip_phy243.BCM8887X=1 + +# core 30 lane244 +lane_to_serdes_map_nif_lane244.BCM8887X=rx245:tx244 +phy_rx_polarity_flip_phy244.BCM8887X=0 +phy_tx_polarity_flip_phy244.BCM8887X=0 + +# core 30 lane245 +lane_to_serdes_map_nif_lane245.BCM8887X=rx247:tx243 +phy_rx_polarity_flip_phy245.BCM8887X=1 +phy_tx_polarity_flip_phy245.BCM8887X=0 + +# core 30 lane246 +lane_to_serdes_map_nif_lane246.BCM8887X=rx240:tx246 +phy_rx_polarity_flip_phy246.BCM8887X=1 +phy_tx_polarity_flip_phy246.BCM8887X=0 + +# core 30 lane247 +lane_to_serdes_map_nif_lane247.BCM8887X=rx241:tx245 +phy_rx_polarity_flip_phy247.BCM8887X=1 +phy_tx_polarity_flip_phy247.BCM8887X=0 + + +# ---------------------------------------------------------------------------------------------------- +# core_31 +# ---------------------------------------------------------------------------------------------------- + +# core 31 lane248 +lane_to_serdes_map_nif_lane248.BCM8887X=rx250:tx250 +phy_rx_polarity_flip_phy248.BCM8887X=0 +phy_tx_polarity_flip_phy248.BCM8887X=1 + +# core 31 lane249 +lane_to_serdes_map_nif_lane249.BCM8887X=rx251:tx249 +phy_rx_polarity_flip_phy249.BCM8887X=1 +phy_tx_polarity_flip_phy249.BCM8887X=0 + +# core 31 lane250 +lane_to_serdes_map_nif_lane250.BCM8887X=rx252:tx255 +phy_rx_polarity_flip_phy250.BCM8887X=1 +phy_tx_polarity_flip_phy250.BCM8887X=1 + +# core 31 lane251 +lane_to_serdes_map_nif_lane251.BCM8887X=rx254:tx248 +phy_rx_polarity_flip_phy251.BCM8887X=0 +phy_tx_polarity_flip_phy251.BCM8887X=1 + +# core 31 lane252 +lane_to_serdes_map_nif_lane252.BCM8887X=rx253:tx252 +phy_rx_polarity_flip_phy252.BCM8887X=0 +phy_tx_polarity_flip_phy252.BCM8887X=0 + +# core 31 lane253 +lane_to_serdes_map_nif_lane253.BCM8887X=rx255:tx251 +phy_rx_polarity_flip_phy253.BCM8887X=1 +phy_tx_polarity_flip_phy253.BCM8887X=0 + +# core 31 lane254 +lane_to_serdes_map_nif_lane254.BCM8887X=rx248:tx254 +phy_rx_polarity_flip_phy254.BCM8887X=1 +phy_tx_polarity_flip_phy254.BCM8887X=0 + +# core 31 lane255 +lane_to_serdes_map_nif_lane255.BCM8887X=rx249:tx253 +phy_rx_polarity_flip_phy255.BCM8887X=1 +phy_tx_polarity_flip_phy255.BCM8887X=0 + +# ---------------------------------------------------------------------------------------------------- +# Template section +# ---------------------------------------------------------------------------------------------------- + + +ucode_port_209.BCM8887X=CDGE4_44:core_5.17 +tm_port_header_type_out_209.BCM8887X=ETH + +serdes_tx_taps_209.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 + + +ucode_port_93.BCM8887X=CDGE4_39:core_4.29 +tm_port_header_type_out_93.BCM8887X=ETH + +serdes_tx_taps_93.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 + + +ucode_port_41.BCM8887X=CDGE4_12:core_1.17 +tm_port_header_type_out_41.BCM8887X=ETH + +serdes_tx_taps_41.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 + + +ucode_port_113.BCM8887X=CDGE4_50:core_6.9 +tm_port_header_type_out_113.BCM8887X=ETH + +serdes_tx_taps_113.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 + + +ucode_port_125.BCM8887X=CDGE4_49:core_6.5 +tm_port_header_type_out_125.BCM8887X=ETH + +serdes_tx_taps_125.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 + + +ucode_port_157.BCM8887X=CDGE4_23:core_2.29 +tm_port_header_type_out_157.BCM8887X=ETH + +serdes_tx_taps_157.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 + + +ucode_port_5.BCM8887X=CDGE4_25:core_3.5 +tm_port_header_type_out_5.BCM8887X=ETH + +serdes_tx_taps_5.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 + + +ucode_port_81.BCM8887X=CDGE4_36:core_4.17 +tm_port_header_type_out_81.BCM8887X=ETH + +serdes_tx_taps_81.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 + + +ucode_port_213.BCM8887X=CDGE4_45:core_5.21 +tm_port_header_type_out_213.BCM8887X=ETH + +serdes_tx_taps_213.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 + + +ucode_port_233.BCM8887X=CDGE4_60:core_7.17 +tm_port_header_type_out_233.BCM8887X=ETH + +serdes_tx_taps_233.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 + + +ucode_port_245.BCM8887X=CDGE4_59:core_7.13 +tm_port_header_type_out_245.BCM8887X=ETH + +serdes_tx_taps_245.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 + + +ucode_port_153.BCM8887X=CDGE4_22:core_2.25 +tm_port_header_type_out_153.BCM8887X=ETH + +serdes_tx_taps_153.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 + + +ucode_port_65.BCM8887X=CDGE4_32:core_4.1 +tm_port_header_type_out_65.BCM8887X=ETH + +serdes_tx_taps_65.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 + + +ucode_port_149.BCM8887X=CDGE4_21:core_2.21 +tm_port_header_type_out_149.BCM8887X=ETH + +serdes_tx_taps_149.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 + + +ucode_port_105.BCM8887X=CDGE4_52:core_6.17 +tm_port_header_type_out_105.BCM8887X=ETH + +serdes_tx_taps_105.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 + + +ucode_port_49.BCM8887X=CDGE4_10:core_1.9 +tm_port_header_type_out_49.BCM8887X=ETH + +serdes_tx_taps_49.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 + + +ucode_port_137.BCM8887X=CDGE4_18:core_2.9 +tm_port_header_type_out_137.BCM8887X=ETH + +serdes_tx_taps_137.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 + + +ucode_port_73.BCM8887X=CDGE4_34:core_4.9 +tm_port_header_type_out_73.BCM8887X=ETH + +serdes_tx_taps_73.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 + + +ucode_port_61.BCM8887X=CDGE4_9:core_1.5 +tm_port_header_type_out_61.BCM8887X=ETH + +serdes_tx_taps_61.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 + + +ucode_port_141.BCM8887X=CDGE4_19:core_2.13 +tm_port_header_type_out_141.BCM8887X=ETH + +serdes_tx_taps_141.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 + + +ucode_port_133.BCM8887X=CDGE4_17:core_2.5 +tm_port_header_type_out_133.BCM8887X=ETH + +serdes_tx_taps_133.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 + + +ucode_port_117.BCM8887X=CDGE4_51:core_6.13 +tm_port_header_type_out_117.BCM8887X=ETH + +serdes_tx_taps_117.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 + + +ucode_port_53.BCM8887X=CDGE4_11:core_1.13 +tm_port_header_type_out_53.BCM8887X=ETH + +serdes_tx_taps_53.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 + + +ucode_port_185.BCM8887X=CDGE4_0:core_0.1 +tm_port_header_type_out_185.BCM8887X=ETH + +serdes_tx_taps_185.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 + + +ucode_port_181.BCM8887X=CDGE4_3:core_0.13 +tm_port_header_type_out_181.BCM8887X=ETH + +serdes_tx_taps_181.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 + + +ucode_port_21.BCM8887X=CDGE4_29:core_3.21 +tm_port_header_type_out_21.BCM8887X=ETH + +serdes_tx_taps_21.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 + + +ucode_port_17.BCM8887X=CDGE4_28:core_3.17 +tm_port_header_type_out_17.BCM8887X=ETH + +serdes_tx_taps_17.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 + + +ucode_port_161.BCM8887X=CDGE4_6:core_0.25 +tm_port_header_type_out_161.BCM8887X=ETH + +serdes_tx_taps_161.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 + + +ucode_port_85.BCM8887X=CDGE4_37:core_4.21 +tm_port_header_type_out_85.BCM8887X=ETH + +serdes_tx_taps_85.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 + + +ucode_port_109.BCM8887X=CDGE4_53:core_6.21 +tm_port_header_type_out_109.BCM8887X=ETH + +serdes_tx_taps_109.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 + + +ucode_port_69.BCM8887X=CDGE4_33:core_4.5 +tm_port_header_type_out_69.BCM8887X=ETH + +serdes_tx_taps_69.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 + + +ucode_port_101.BCM8887X=CDGE4_55:core_6.29 +tm_port_header_type_out_101.BCM8887X=ETH + +serdes_tx_taps_101.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 + + +ucode_port_253.BCM8887X=CDGE4_57:core_7.5 +tm_port_header_type_out_253.BCM8887X=ETH + +serdes_tx_taps_253.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 + + +ucode_port_225.BCM8887X=CDGE4_62:core_7.25 +tm_port_header_type_out_225.BCM8887X=ETH + +serdes_tx_taps_225.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 + + +ucode_port_1.BCM8887X=CDGE4_24:core_3.1 +tm_port_header_type_out_1.BCM8887X=ETH + +serdes_tx_taps_1.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 + + +ucode_port_77.BCM8887X=CDGE4_35:core_4.13 +tm_port_header_type_out_77.BCM8887X=ETH + +serdes_tx_taps_77.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 + + +ucode_port_129.BCM8887X=CDGE4_16:core_2.1 +tm_port_header_type_out_129.BCM8887X=ETH + +serdes_tx_taps_129.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 + + +ucode_port_193.BCM8887X=CDGE4_40:core_5.1 +tm_port_header_type_out_193.BCM8887X=ETH + +serdes_tx_taps_193.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 + + +ucode_port_221.BCM8887X=CDGE4_47:core_5.29 +tm_port_header_type_out_221.BCM8887X=ETH + +serdes_tx_taps_221.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 + + +ucode_port_189.BCM8887X=CDGE4_1:core_0.5 +tm_port_header_type_out_189.BCM8887X=ETH + +serdes_tx_taps_189.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 + + +ucode_port_145.BCM8887X=CDGE4_20:core_2.17 +tm_port_header_type_out_145.BCM8887X=ETH + +serdes_tx_taps_145.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 + + +ucode_port_97.BCM8887X=CDGE4_54:core_6.25 +tm_port_header_type_out_97.BCM8887X=ETH + +serdes_tx_taps_97.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 + + +ucode_port_121.BCM8887X=CDGE4_48:core_6.1 +tm_port_header_type_out_121.BCM8887X=ETH + +serdes_tx_taps_121.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 + + +ucode_port_201.BCM8887X=CDGE4_42:core_5.9 +tm_port_header_type_out_201.BCM8887X=ETH + +serdes_tx_taps_201.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 + + +ucode_port_37.BCM8887X=CDGE4_15:core_1.29 +tm_port_header_type_out_37.BCM8887X=ETH + +serdes_tx_taps_37.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 + + +ucode_port_241.BCM8887X=CDGE4_58:core_7.9 +tm_port_header_type_out_241.BCM8887X=ETH + +serdes_tx_taps_241.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 + + +ucode_port_169.BCM8887X=CDGE4_4:core_0.17 +tm_port_header_type_out_169.BCM8887X=ETH + +serdes_tx_taps_169.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 + + +ucode_port_173.BCM8887X=CDGE4_5:core_0.21 +tm_port_header_type_out_173.BCM8887X=ETH + +serdes_tx_taps_173.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 + + +ucode_port_205.BCM8887X=CDGE4_43:core_5.13 +tm_port_header_type_out_205.BCM8887X=ETH + +serdes_tx_taps_205.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 + + +ucode_port_197.BCM8887X=CDGE4_41:core_5.5 +tm_port_header_type_out_197.BCM8887X=ETH + +serdes_tx_taps_197.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 + + +ucode_port_217.BCM8887X=CDGE4_46:core_5.25 +tm_port_header_type_out_217.BCM8887X=ETH + +serdes_tx_taps_217.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 + + +ucode_port_45.BCM8887X=CDGE4_13:core_1.21 +tm_port_header_type_out_45.BCM8887X=ETH + +serdes_tx_taps_45.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 + + +ucode_port_249.BCM8887X=CDGE4_56:core_7.1 +tm_port_header_type_out_249.BCM8887X=ETH + +serdes_tx_taps_249.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 + + +ucode_port_13.BCM8887X=CDGE4_27:core_3.13 +tm_port_header_type_out_13.BCM8887X=ETH + +serdes_tx_taps_13.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 + + +ucode_port_33.BCM8887X=CDGE4_14:core_1.25 +tm_port_header_type_out_33.BCM8887X=ETH + +serdes_tx_taps_33.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 + + +ucode_port_229.BCM8887X=CDGE4_63:core_7.29 +tm_port_header_type_out_229.BCM8887X=ETH + +serdes_tx_taps_229.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 + + +ucode_port_177.BCM8887X=CDGE4_2:core_0.9 +tm_port_header_type_out_177.BCM8887X=ETH + +serdes_tx_taps_177.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 + + +ucode_port_89.BCM8887X=CDGE4_38:core_4.25 +tm_port_header_type_out_89.BCM8887X=ETH + +serdes_tx_taps_89.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 + + +ucode_port_29.BCM8887X=CDGE4_31:core_3.29 +tm_port_header_type_out_29.BCM8887X=ETH + +serdes_tx_taps_29.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 + + +ucode_port_25.BCM8887X=CDGE4_30:core_3.25 +tm_port_header_type_out_25.BCM8887X=ETH + +serdes_tx_taps_25.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 + + +ucode_port_9.BCM8887X=CDGE4_26:core_3.9 +tm_port_header_type_out_9.BCM8887X=ETH + +serdes_tx_taps_9.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 + + +ucode_port_237.BCM8887X=CDGE4_61:core_7.21 +tm_port_header_type_out_237.BCM8887X=ETH + +serdes_tx_taps_237.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 + + +ucode_port_57.BCM8887X=CDGE4_8:core_1.1 +tm_port_header_type_out_57.BCM8887X=ETH + +serdes_tx_taps_57.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 + + +ucode_port_165.BCM8887X=CDGE4_7:core_0.29 +tm_port_header_type_out_165.BCM8887X=ETH + +serdes_tx_taps_165.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 + + + + +# ---------------------------------------------------------------------------------------------------- +# core_32 +# +# NOTE: +# The QoS configuration (refer qos.json.j2 and buffers_defaults_XXX.j2 file per SKU) +# does not include this management port. If you are modifying the management port, ensure that the +# QoS configuration is updated accordingly to reflect the change. +# ---------------------------------------------------------------------------------------------------- +ucode_port_257.BCM8887X=CGE64:core_2.33 +tm_port_header_type_out_257.BCM8887X=ETH + +# core 32 lane256 +lane_to_serdes_map_nif_lane256.BCM8887X=rx257:tx257 +phy_rx_polarity_flip_phy256.BCM8887X=0 +phy_tx_polarity_flip_phy256.BCM8887X=0 + +# core 32 lane257 +lane_to_serdes_map_nif_lane257.BCM8887X=rx256:tx256 +phy_rx_polarity_flip_phy257.BCM8887X=0 +phy_tx_polarity_flip_phy257.BCM8887X=1 + +# core 32 lane258 +lane_to_serdes_map_nif_lane258.BCM8887X=rx258:tx258 +phy_rx_polarity_flip_phy258.BCM8887X=1 +phy_tx_polarity_flip_phy258.BCM8887X=0 + +# core 32 lane259 +lane_to_serdes_map_nif_lane259.BCM8887X=rx259:tx259 +phy_rx_polarity_flip_phy259.BCM8887X=0 +phy_tx_polarity_flip_phy259.BCM8887X=0 + + +# ---------------------------------------------------------------------------------------------------- +# core_33 +# +# NOTE: +# The QoS configuration (refer qos.json.j2 and buffers_defaults_XXX.j2 file per SKU) +# does not include this management port. If you are modifying the management port, ensure that the +# QoS configuration is updated accordingly to reflect the change. +# ---------------------------------------------------------------------------------------------------- +ucode_port_261.BCM8887X=CGE65:core_6.33 +tm_port_header_type_out_261.BCM8887X=ETH + +# core 33 lane260 +lane_to_serdes_map_nif_lane260.BCM8887X=rx260:tx260 +phy_rx_polarity_flip_phy260.BCM8887X=0 +phy_tx_polarity_flip_phy260.BCM8887X=0 + +# core 33 lane261 +lane_to_serdes_map_nif_lane261.BCM8887X=rx261:tx261 +phy_rx_polarity_flip_phy261.BCM8887X=0 +phy_tx_polarity_flip_phy261.BCM8887X=1 + +# core 33 lane262 +lane_to_serdes_map_nif_lane262.BCM8887X=rx262:tx262 +phy_rx_polarity_flip_phy262.BCM8887X=0 +phy_tx_polarity_flip_phy262.BCM8887X=0 + +# core 33 lane263 +lane_to_serdes_map_nif_lane263.BCM8887X=rx263:tx263 +phy_rx_polarity_flip_phy263.BCM8887X=0 +phy_tx_polarity_flip_phy263.BCM8887X=0 + + +# ---------------------------------------------------------------------------------------------------- +# Static Properties +# ---------------------------------------------------------------------------------------------------- + +port_init_speed_xl.BCM8887X=40000 +port_init_speed_cd.BCM8887X=400000 +port_init_speed_d3c.BCM8887X=800000 +port_init_speed_ce.BCM8887X=100000 +port_init_speed_le.BCM8887X=50000 +port_init_speed_fabric.BCM8887X=53125 +port_init_speed_xe.BCM8887X=25000 +port_init_speed_cc.BCM8887X=200000 +port_init_speed_ge.BCM8887X=1000 + +outlif_logical_to_physical_phase_map_1.BCM8887X=S1 +outlif_logical_to_physical_phase_map_2.BCM8887X=L1 +outlif_logical_to_physical_phase_map_3.BCM8887X=XL +outlif_logical_to_physical_phase_map_4.BCM8887X=L2 +outlif_logical_to_physical_phase_map_5.BCM8887X=M1 +outlif_logical_to_physical_phase_map_6.BCM8887X=M2 +outlif_logical_to_physical_phase_map_7.BCM8887X=M3 +outlif_logical_to_physical_phase_map_8.BCM8887X=S2 + +outlif_physical_phase_data_granularity_S1.BCM8887X=60 +outlif_physical_phase_data_granularity_S2.BCM8887X=60 +outlif_physical_phase_data_granularity_M1.BCM8887X=60 +outlif_physical_phase_data_granularity_M2.BCM8887X=60 +outlif_physical_phase_data_granularity_M3.BCM8887X=60 +outlif_physical_phase_data_granularity_L1.BCM8887X=60 +outlif_physical_phase_data_granularity_L2.BCM8887X=60 +outlif_physical_phase_data_granularity_XL.BCM8887X=60 + +appl_param_rcy_mirror_ports_range.BCM8887X=500-1000 + +# ----------------------------------------------- +# | FPP | FPP | FPP | FPP | FPP | FPP | +# | 11,12 | 13,14 | 15,16 | 17,18 | 19,20 | 21,22 | +# |-----------------------------------------------| +# | ETH | ETH | ETH | ETH | ETH | ETH | +# | 33,37 | 41,45 | 49,53 | 57,61 | 65,69 | 73,77 | +# ---------------|-----------------------------------------------|---------------- +# | | Core | Core | Core | Core | Core | Core | | +# | | 06 | 05 | 04 | 16 | 17 | 18 | | +# -----------------|------ ----------------------------------------------- ------|---------|------- +# | FPP | ETH | Core | | Core | ETH | FPP | +# | 09,10 | 185,189 | 07 | | 19 | 193,197 | 23,24 | +# |-------|---------|------| |------|---------|-------| +# | FPP | ETH | Core | | Core | ETH | FPP | +# | 07,08 | 177,181 | 15 | | 27 | 201,205 | 25,26 | +# |-------|---------|------| |------|---------|-------| +# | FPP | ETH | Core | AGERA2 -> QSFP_DD_112 | Core | ETH | FPP | +# | 05,06 | 169,173 | 14 | | 26 | 209,213 | 27,28 | +# |-------|---------|------| |------|---------|-------| +# | FPP | ETH | Core | | Core | ETH | FPP | +# | 03,04 | 161,165 | 13 | | 25 | 217,221 | 29,30 | +# |-------|---------|------| |------|---------|-------| +# | FPP | ETH | Core | | Core | ETH | FPP | +# | 01,02 | 153,157 | 12 | | 24 | 225,229 | 31,32 | +# |-------|---------|------|---------------------------- Q3D -------------------------------|------|---------|-------| +# | FPP | ETH | Core | | Core | ETH | FPP | +# | 33,34 | 129,133 | 08 | | 28 | 249,253 | 62,63 | +# |-------|---------|------| |------|---------|-------| +# | FPP | ETH | Core | | Core | ETH | FPP | +# | 35,36 | 137,141 | 09 | | 29 | 241,245 | 60,61 | +# |-------|---------|------| |------|---------|-------| +# | FPP | ETH | Core | | Core | ETH | FPP | +# | 36,37 | 145,149 | 10 | QSFP_112 | 30 | 233,237 | 58,59 | +# |-------|---------|------| |------|---------|-------| +# | FPP | ETH | Core | | Core | ETH | FPP | +# | 38,39 | 153,157 | 11 | | 31 | 225,229 | 56,57 | +# |-------|---------|------| |------|---------|-------| +# | FPP | ETH | Core | | Core | ETH | FPP | +# | 40,41 | 161,165 | 03 | | 23 | 217,221 | 54,55 | +# -----------------|------ _______________________________________________ ------|----------------- +# | | Core | Core | Core | Core | Core | Core | | +# | | 02 | 01 | 00 | 20 | 21 | 22 | | +# ---------------|-----------------------------------------------|---------------- +# | ETH | ETH | ETH | ETH | ETH | ETH | +# |169,173|177,181|185,189|193,197|201,205|209,213| +# |-----------------------------------------------| +# | FPP | FPP | FPP | FPP | FPP | FPP | +# | 42,43 | 44,45 | 46,47 | 48,49 | 50,51 | 52,53 | +# ----------------------------------------------- + +dpp_db_path=/usr/share/bcm/db +rif_id_max=8192 +trunk_group_max_members=128 +custom_feature_ts_pll_internal_clock_reference.BCM8887X=1 +port_init_cl72.BCM8887X=0 +port_priorities_d3c.BCM8887X=8 +port_priorities_cd.BCM8887X=8 +port_priorities_ce.BCM8887X=8 +port_priorities_xe.BCM8887X=8 +port_priorities_ge.BCM8887X=8 +port_priorities=8 +#port_priorities_sch=8 +#CPU ports +port_priorities_0=2 +port_priorities_sch_0=8 +port_priorities_380=2 +port_priorities_sch_380=8 +port_priorities_381=2 +port_priorities_sch_381=8 +port_priorities_382=2 +port_priorities_sch_382=8 +port_priorities_383=2 +port_priorities_sch_383=8 +port_priorities_384=2 +port_priorities_sch_384=8 +port_priorities_385=2 +port_priorities_sch_385=8 +port_priorities_386=2 +port_priorities_sch_386=8 +port_priorities_387=2 +port_priorities_sch_387=8 +port_priorities_rcy=2 +port_priorities_sch_rcy=8 + +appl_param_oam_enable=0 +soc_family.BCM8887X=BCM8887X + +#enable HBM +ext_ram_enabled_bitmap.BCM8887X=0xF + +#################################################### +##Reference applications related properties - End +#################################################### +###Default interfaces for Qumran3D +#CPU interfaces +ucode_port_0.BCM8887X=CPU.0:core_0.0 +ucode_port_380.BCM8887X=CPU.8:core_1.200 +ucode_port_381.BCM8887X=CPU.16:core_0.201 +ucode_port_382.BCM8887X=CPU.24:core_2.202 +ucode_port_383.BCM8887X=CPU.32:core_3.203 +ucode_port_384.BCM8887X=CPU.4:core_6.204 +ucode_port_385.BCM8887X=CPU.12:core_7.205 +ucode_port_386.BCM8887X=CPU.20:core_4.206 +ucode_port_387.BCM8887X=CPU.28:core_5.207 + +#special ports +ucode_port_330.BCM8887X=EVENTOR:core_0.230 + +#ucode_port_231.BCM8887X=EVENTOR:core_4.231 +ucode_port_340.BCM8887X=OLP0:core_0.240 +ucode_port_341.BCM8887X=OLP1:core_0.241 +ucode_port_342.BCM8887X=OLP0:core_4.242 +ucode_port_343.BCM8887X=OLP1:core_4.243 +ucode_port_332.BCM8887X=OAMP:core_0.232 +ucode_port_333.BCM8887X=OAMP:core_1.233 +ucode_port_334.BCM8887X=OAMP:core_2.234 +ucode_port_335.BCM8887X=OAMP:core_3.235 +ucode_port_336.BCM8887X=OAMP:core_4.236 +ucode_port_337.BCM8887X=OAMP:core_5.237 +ucode_port_338.BCM8887X=OAMP:core_6.238 +ucode_port_339.BCM8887X=OAMP:core_7.239 + + +ucode_port_332.BCM8887X_ADAPTER=OAMP:core_0.232 +ucode_port_333.BCM8887X_ADAPTER=OAMP:core_1.233 +ucode_port_334.BCM8887X_ADAPTER=OAMP:core_2.234 +ucode_port_335.BCM8887X_ADAPTER=OAMP:core_3.235 +ucode_port_336.BCM8887X_ADAPTER=OAMP:core_4.236 +ucode_port_337.BCM8887X_ADAPTER=OAMP:core_5.237 +ucode_port_338.BCM8887X_ADAPTER=OAMP:core_6.238 +ucode_port_339.BCM8887X_ADAPTER=OAMP:core_7.239 + + +#OAMP +oamp_dual_mode.BCM8887X=1 + +sai_disable_srcmacqedstmac_ctrl=1 +sai_instru_stat_accum_enable=1 + +#RCY ports +sai_recycle_port_lane_base=300 +ucode_port_321.BCM8887X=RCY.21:core_0.221 +tm_port_header_type_in_321.BCM8887X=IBCH1_MODE + +# SAT +## Enable SAT Interface. 0 - Disable, 1 - Enable (Default) +ucode_port_316.BCM8887X=SAT:core_2.216 +ucode_port_317.BCM8887X=SAT:core_3.217 +ucode_port_318.BCM8887X=SAT:core_0.218 +ucode_port_319.BCM8887X=SAT:core_1.219 +ucode_port_312.BCM8887X=SAT:core_6.212 +ucode_port_313.BCM8887X=SAT:core_7.213 +ucode_port_314.BCM8887X=SAT:core_4.214 +ucode_port_315.BCM8887X=SAT:core_5.215 +tm_port_header_type_in_316.BCM8887X=INJECTED_2 +tm_port_header_type_in_317.BCM8887X=INJECTED_2 +tm_port_header_type_in_318.BCM8887X=INJECTED_2 +tm_port_header_type_in_319.BCM8887X=INJECTED_2 +tm_port_header_type_in_312.BCM8887X=INJECTED_2 +tm_port_header_type_in_313.BCM8887X=INJECTED_2 +tm_port_header_type_in_314.BCM8887X=INJECTED_2 +tm_port_header_type_in_315.BCM8887X=INJECTED_2 +tm_port_header_type_out_316.BCM8887X=CPU +tm_port_header_type_out_317.BCM8887X=CPU +tm_port_header_type_out_318.BCM8887X=CPU +tm_port_header_type_out_319.BCM8887X=CPU +tm_port_header_type_out_312.BCM8887X=CPU +tm_port_header_type_out_313.BCM8887X=CPU +tm_port_header_type_out_314.BCM8887X=CPU +tm_port_header_type_out_315.BCM8887X=CPU + + +######################### +### High Availability ### +######################### +#if warmboot is not needed this property can be deleted +#warmboot_support.BCM8887X=on +#warmboot_support.BCM8887X_ADAPTER=on + +#size of memory block pre-allocated for sw-state use when working with warmboot_support=on +sw_state_max_size.BCM8887X=1650000000 +sw_state_max_size.BCM8887X_ADAPTER=1650000000 + +#location of warmboot NV memory +#Allowed options for dnx are - 3:external storage in filesystem 4:driver will save the state directly in shared memory +stable_location.BCM8887X=4 +stable_location.BCM8887X_ADAPTER=3 + +# Note that each unit should have a unique filename and that adapter does not play well with tmp and dev/shm folders. +stable_filename.BCM8887X_ADAPTER=warmboot_data_0 +stable_filename.BCM8887X=/dev/shm/warmboot_data_0 +stable_filename.1.BCM8887X=/dev/shm/warmboot_data_1 +stable_filename.2.BCM8887X=/dev/shm/warmboot_data_2 + +#Maximum size for NVM used for WB storage, must be larger than sw_state_max_size.BCM8887X +stable_size.BCM8887X=1700000000 +stable_size.BCM8887X_ADAPTER=1700000000 + +#counter stat interval +bcm_stat_interval.BCM8887X_ADAPTER=1000000 + +######################### +######################### +######################### + +### MDB configuration ### +mdb_profile.BCM8887X=L3-Optimized + +### Enable Descriptor-DMA ### +dma_desc_aggregator_chain_length_max.BCM8887X=256 +dma_desc_aggregator_buff_size_kb.BCM8887X=64 +dma_desc_aggregator_enable_specific_MDB_LPM.BCM8887X=1 +dma_desc_aggregator_enable_specific_MDB_FEC.BCM8887X=1 +dma_desc_aggregator_enable_specific_XLTCAM.BCM8887X=1 +dma_desc_aggregator_enable_specific_INIT.BCM8887X=1 + +# PMF Map payload size, can be any of 30/60/120 +pmf_maps_payload_size.BCM8887X=30 + +# Set CPU to work with PTCHoITMH header incoming direction and CPU - system headers + network headers outgoing direction +tm_port_header_type_in_0.BCM8887X=INJECTED +tm_port_header_type_out_0.BCM8887X=CPU + +tm_port_header_type_in_380.BCM8887X=INJECTED +tm_port_header_type_out_380.BCM8887X=ETH +tm_port_header_type_in_381.BCM8887X=INJECTED +tm_port_header_type_out_381.BCM8887X=ETH +tm_port_header_type_in_382.BCM8887X=INJECTED +tm_port_header_type_out_382.BCM8887X=ETH +tm_port_header_type_in_383.BCM8887X=INJECTED +tm_port_header_type_out_383.BCM8887X=ETH +tm_port_header_type_in_384.BCM8887X=INJECTED +tm_port_header_type_out_384.BCM8887X=ETH +tm_port_header_type_in_385.BCM8887X=INJECTED +tm_port_header_type_out_385.BCM8887X=ETH +tm_port_header_type_in_386.BCM8887X=INJECTED +tm_port_header_type_out_386.BCM8887X=ETH +tm_port_header_type_in_387.BCM8887X=INJECTED +tm_port_header_type_out_387.BCM8887X=ETH + +# set EVENTOR port to work with PTCHoITMH +tm_port_header_type_in_330.BCM8887X=INJECTED + + +#OAMP +tm_port_header_type_in_332.BCM8887X=INJECTED_2 +tm_port_header_type_out_332.BCM8887X=ENCAP_EXTERNAL_CPU +tm_port_header_type_in_333.BCM8887X=INJECTED_2 +tm_port_header_type_out_333.BCM8887X=ENCAP_EXTERNAL_CPU +tm_port_header_type_in_334.BCM8887X=INJECTED_2 +tm_port_header_type_out_334.BCM8887X=ENCAP_EXTERNAL_CPU +tm_port_header_type_in_335.BCM8887X=INJECTED_2 +tm_port_header_type_in_336.BCM8887X=INJECTED_2 +tm_port_header_type_out_336.BCM8887X=ENCAP_EXTERNAL_CPU +tm_port_header_type_in_337.BCM8887X=INJECTED_2 +tm_port_header_type_out_337.BCM8887X=ENCAP_EXTERNAL_CPU +tm_port_header_type_in_338.BCM8887X=INJECTED_2 +tm_port_header_type_out_338.BCM8887X=ENCAP_EXTERNAL_CPU +tm_port_header_type_in_339.BCM8887X=INJECTED_2 +tm_port_header_type_out_339.BCM8887X=ENCAP_EXTERNAL_CPU + +#OLP +tm_port_header_type_in_340.BCM8887X=TM +tm_port_header_type_out_340.BCM8887X=ETH +tm_port_header_type_in_341.BCM8887X=TM +tm_port_header_type_out_341.BCM8887X=ETH +tm_port_header_type_in_342.BCM8887X=TM +tm_port_header_type_out_342.BCM8887X=ETH +tm_port_header_type_in_343.BCM8887X=TM +tm_port_header_type_out_343.BCM8887X=ETH + +# Set statically the region mode per region id +# 0: queue connectors only. +# 3: [default] SE only (SharingOrder = Low-To-High) +# 7: SE only (SharingOrder = High-To-Low) +dtm_flow_mapping_mode_region_65.BCM8887X=3 +dtm_flow_mapping_mode_region_66.BCM8887X=3 +dtm_flow_mapping_mode_region_67.BCM8887X=3 +dtm_flow_mapping_mode_region_68.BCM8887X=3 +dtm_flow_mapping_mode_region_69.BCM8887X=3 +dtm_flow_mapping_mode_region_70.BCM8887X=3 +dtm_flow_mapping_mode_region_71.BCM8887X=3 +dtm_flow_mapping_mode_region_72.BCM8887X=3 +dtm_flow_mapping_mode_region_73.BCM8887X=3 +dtm_flow_mapping_mode_region_74.BCM8887X=7 +dtm_flow_mapping_mode_region_75.BCM8887X=3 +dtm_flow_mapping_mode_region_76.BCM8887X=3 +dtm_flow_mapping_mode_region_77.BCM8887X=3 +dtm_flow_mapping_mode_region_78.BCM8887X=3 +dtm_flow_mapping_mode_region_79.BCM8887X=3 +dtm_flow_mapping_mode_region_80.BCM8887X=3 +dtm_flow_mapping_mode_region_81.BCM8887X=3 +dtm_flow_mapping_mode_region_82.BCM8887X=3 +dtm_flow_mapping_mode_region_83.BCM8887X=3 +dtm_flow_mapping_mode_region_84.BCM8887X=3 +dtm_flow_mapping_mode_region_85.BCM8887X=3 +dtm_flow_mapping_mode_region_86.BCM8887X=3 +dtm_flow_mapping_mode_region_87.BCM8887X=3 +dtm_flow_mapping_mode_region_88.BCM8887X=3 +dtm_flow_mapping_mode_region_89.BCM8887X=3 +dtm_flow_mapping_mode_region_90.BCM8887X=3 +dtm_flow_mapping_mode_region_91.BCM8887X=3 +dtm_flow_mapping_mode_region_92.BCM8887X=3 +dtm_flow_mapping_mode_region_93.BCM8887X=3 +dtm_flow_mapping_mode_region_94.BCM8887X=3 + +# Set nof remote cores +dtm_flow_nof_remote_cores_region.BCM8887X=8 + +## Fabric transmission mode +# Set the Connect mode to the Fabric +# Options: FE - presence of a Fabric device (single stage) +# SINGLE_FAP - stand-alone device +# MESH - devices in Mesh +# Note: If 'diag_chassis' is on, value will be override in dnx.soc +# to be FE instead of SINGLE_FAP. +fabric_connect_mode.BCM8887X=SINGLE_FAP + +### Fabric configuration ### +#SFI speed rate +port_init_speed_fabric.BCM8887X=53125 + +### import SoC properties that shared with Ucode +#import config-qumran3d-ucode.bcm +#programmability_image_name.BCM8887X=S121 +# ucode input file, depending on image +#programmability_ucode_relative_path.BCM8887X=pemla/ucode/S121/jr3native/u_code_db2pem.txt + +custom_feature_adapter_do_collect_enable.BCM8887X_ADAPTER=1 +custom_feature_use_new_access.BCM8887X_ADAPTER=1 +mem_cache_enable_all.BCM8887X_ADAPTER=1 + +#dram + +dram_temperature_monitor_enable.BCM8887X_ADAPTER=0 +#Interrupt polling mode on adapter +polled_irq_mode.BCM8887X_ADAPTER=1 +polled_irq_delay.BCM8887X_ADAPTER=200000 + +#Eventor SBUS DMA channels +eventor_sbus_dma_channels.BCM8887X=0,24,0,25,1,24,1,25 + +#Default CPU Tx Tc Queue +sai_default_cpu_tx_tc=7 + +#macsec properties +macsec_fips_enable=1 +xflow_macsec_secure_chan_to_num_secure_assoc=4 +xflow_macsec_secure_chan_to_num_secure_assoc_encrypt=2 +xflow_macsec_secure_chan_to_num_secure_assoc_decrypt=4 +sai_ecmp_group_members_increment=8 + +#Disable hardware PFC watchdog +sai_pfc_dlr_init_capability=0 diff --git a/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/phy0_config.json b/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/defaults/phy0_config.json similarity index 100% rename from device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/phy0_config.json rename to device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/defaults/phy0_config.json diff --git a/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/phy10_config.json b/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/defaults/phy10_config.json similarity index 100% rename from device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/phy10_config.json rename to device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/defaults/phy10_config.json diff --git a/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/phy11_config.json b/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/defaults/phy11_config.json similarity index 100% rename from device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/phy11_config.json rename to device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/defaults/phy11_config.json diff --git a/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/phy12_config.json b/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/defaults/phy12_config.json similarity index 100% rename from device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/phy12_config.json rename to device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/defaults/phy12_config.json diff --git a/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/phy13_config.json b/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/defaults/phy13_config.json similarity index 100% rename from device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/phy13_config.json rename to device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/defaults/phy13_config.json diff --git a/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/phy14_config.json b/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/defaults/phy14_config.json similarity index 100% rename from device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/phy14_config.json rename to device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/defaults/phy14_config.json diff --git a/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/phy15_config.json b/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/defaults/phy15_config.json similarity index 100% rename from device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/phy15_config.json rename to device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/defaults/phy15_config.json diff --git a/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/phy1_config.json b/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/defaults/phy1_config.json similarity index 100% rename from device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/phy1_config.json rename to device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/defaults/phy1_config.json diff --git a/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/phy2_config.json b/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/defaults/phy2_config.json similarity index 100% rename from device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/phy2_config.json rename to device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/defaults/phy2_config.json diff --git a/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/phy3_config.json b/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/defaults/phy3_config.json similarity index 100% rename from device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/phy3_config.json rename to device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/defaults/phy3_config.json diff --git a/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/phy4_config.json b/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/defaults/phy4_config.json similarity index 100% rename from device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/phy4_config.json rename to device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/defaults/phy4_config.json diff --git a/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/phy5_config.json b/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/defaults/phy5_config.json similarity index 100% rename from device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/phy5_config.json rename to device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/defaults/phy5_config.json diff --git a/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/phy6_config.json b/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/defaults/phy6_config.json similarity index 100% rename from device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/phy6_config.json rename to device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/defaults/phy6_config.json diff --git a/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/phy7_config.json b/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/defaults/phy7_config.json similarity index 100% rename from device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/phy7_config.json rename to device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/defaults/phy7_config.json diff --git a/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/phy8_config.json b/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/defaults/phy8_config.json similarity index 100% rename from device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/phy8_config.json rename to device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/defaults/phy8_config.json diff --git a/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/phy9_config.json b/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/defaults/phy9_config.json similarity index 100% rename from device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/phy9_config.json rename to device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/defaults/phy9_config.json diff --git a/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/gearbox_config.json b/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/gearbox_config.json deleted file mode 100644 index 6301bed550c..00000000000 --- a/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/gearbox_config.json +++ /dev/null @@ -1,902 +0,0 @@ -{ - "phys": [ - { - "phy_id": 0, - "name": "phy0", - "address": "2031617", - "lib_name": "libsai.so", - "firmware_path": "", - "config_file": "/usr/share/sonic/hwsku/phy0_config.json", - "sai_init_config_file": "", - "phy_access": "mdio", - "bus_id": 0, - "context_id": 1, - "macsec_supported": false, - "hwinfo": "0" - }, - { - "phy_id": 1, - "name": "phy1", - "address": "2031616", - "lib_name": "libsai.so", - "firmware_path": "", - "config_file": "/usr/share/sonic/hwsku/phy1_config.json", - "sai_init_config_file": "", - "phy_access": "mdio", - "bus_id": 0, - "context_id": 1, - "macsec_supported": false, - "hwinfo": "1" - }, - { - "phy_id": 2, - "name": "phy2", - "address": "2031619", - "lib_name": "libsai.so", - "firmware_path": "", - "config_file": "/usr/share/sonic/hwsku/phy2_config.json", - "sai_init_config_file": "", - "phy_access": "mdio", - "bus_id": 0, - "context_id": 1, - "macsec_supported": false, - "hwinfo": "2" - }, - { - "phy_id": 3, - "name": "phy3", - "address": "2031618", - "lib_name": "libsai.so", - "firmware_path": "", - "config_file": "/usr/share/sonic/hwsku/phy3_config.json", - "sai_init_config_file": "", - "phy_access": "mdio", - "bus_id": 0, - "context_id": 1, - "macsec_supported": false, - "hwinfo": "3" - }, - { - "phy_id": 4, - "name": "phy4", - "address": "2031621", - "lib_name": "libsai.so", - "firmware_path": "", - "config_file": "/usr/share/sonic/hwsku/phy4_config.json", - "sai_init_config_file": "", - "phy_access": "mdio", - "bus_id": 0, - "context_id": 1, - "macsec_supported": false, - "hwinfo": "4" - }, - { - "phy_id": 5, - "name": "phy5", - "address": "2031620", - "lib_name": "libsai.so", - "firmware_path": "", - "config_file": "/usr/share/sonic/hwsku/phy5_config.json", - "sai_init_config_file": "", - "phy_access": "mdio", - "bus_id": 0, - "context_id": 1, - "macsec_supported": false, - "hwinfo": "5" - }, - { - "phy_id": 6, - "name": "phy6", - "address": "2031623", - "lib_name": "libsai.so", - "firmware_path": "", - "config_file": "/usr/share/sonic/hwsku/phy6_config.json", - "sai_init_config_file": "", - "phy_access": "mdio", - "bus_id": 0, - "context_id": 1, - "macsec_supported": false, - "hwinfo": "6" - }, - { - "phy_id": 7, - "name": "phy7", - "address": "2031622", - "lib_name": "libsai.so", - "firmware_path": "", - "config_file": "/usr/share/sonic/hwsku/phy7_config.json", - "sai_init_config_file": "", - "phy_access": "mdio", - "bus_id": 0, - "context_id": 1, - "macsec_supported": false, - "hwinfo": "7" - }, - { - "phy_id": 8, - "name": "phy8", - "address": "2031625", - "lib_name": "libsai.so", - "firmware_path": "", - "config_file": "/usr/share/sonic/hwsku/phy8_config.json", - "sai_init_config_file": "", - "phy_access": "mdio", - "bus_id": 0, - "context_id": 1, - "macsec_supported": false, - "hwinfo": "8" - }, - { - "phy_id": 9, - "name": "phy9", - "address": "2031624", - "lib_name": "libsai.so", - "firmware_path": "", - "config_file": "/usr/share/sonic/hwsku/phy9_config.json", - "sai_init_config_file": "", - "phy_access": "mdio", - "bus_id": 0, - "context_id": 1, - "macsec_supported": false, - "hwinfo": "9" - }, - { - "phy_id": 10, - "name": "phy10", - "address": "2031626", - "lib_name": "libsai.so", - "firmware_path": "", - "config_file": "/usr/share/sonic/hwsku/phy10_config.json", - "sai_init_config_file": "", - "phy_access": "mdio", - "bus_id": 0, - "context_id": 1, - "macsec_supported": false, - "hwinfo": "10" - }, - { - "phy_id": 11, - "name": "phy11", - "address": "2031627", - "lib_name": "libsai.so", - "firmware_path": "", - "config_file": "/usr/share/sonic/hwsku/phy11_config.json", - "sai_init_config_file": "", - "phy_access": "mdio", - "bus_id": 0, - "context_id": 1, - "macsec_supported": false, - "hwinfo": "11" - }, - { - "phy_id": 12, - "name": "phy12", - "address": "2031628", - "lib_name": "libsai.so", - "firmware_path": "", - "config_file": "/usr/share/sonic/hwsku/phy12_config.json", - "sai_init_config_file": "", - "phy_access": "mdio", - "bus_id": 0, - "context_id": 1, - "macsec_supported": false, - "hwinfo": "12" - }, - { - "phy_id": 13, - "name": "phy13", - "address": "2031629", - "lib_name": "libsai.so", - "firmware_path": "", - "config_file": "/usr/share/sonic/hwsku/phy13_config.json", - "sai_init_config_file": "", - "phy_access": "mdio", - "bus_id": 0, - "context_id": 1, - "macsec_supported": false, - "hwinfo": "13" - }, - { - "phy_id": 14, - "name": "phy14", - "address": "2031630", - "lib_name": "libsai.so", - "firmware_path": "", - "config_file": "/usr/share/sonic/hwsku/phy14_config.json", - "sai_init_config_file": "", - "phy_access": "mdio", - "bus_id": 0, - "context_id": 1, - "macsec_supported": false, - "hwinfo": "14" - }, - { - "phy_id": 15, - "name": "phy15", - "address": "2031631", - "lib_name": "libsai.so", - "firmware_path": "", - "config_file": "/usr/share/sonic/hwsku/phy15_config.json", - "sai_init_config_file": "", - "phy_access": "mdio", - "bus_id": 0, - "context_id": 1, - "macsec_supported": false, - "hwinfo": "15" - } - ], - "interfaces": [ - { - "name": "Ethernet0", - "index": 1, - "phy_id": 0, - "system_lanes": [20,21,22,23], - "line_lanes": [0,1,2,3,4,5,6,7], - "system_tx_fir_pre3": [0,0,0,0], - "system_tx_fir_pre2": [0,0,0,0], - "system_tx_fir_pre1": [0,0,0,0], - "system_tx_fir_main": [128,128,128,128], - "system_tx_fir_post1": [0,0,0,0], - "system_tx_fir_post2": [0,0,0,0], - "system_tx_fir_post3": [0,0,0,0], - "line_tx_fir_pre3": [0,0,0,0,0,0,0,0], - "line_tx_fir_pre2": [0,0,0,0,0,0,0,0], - "line_tx_fir_pre1": [-20,-20,-20,-20,-20,-20,-20,-20], - "line_tx_fir_main": [140,140,140,140,140,140,140,140], - "line_tx_fir_post1": [0,0,0,0,0,0,0,0], - "line_tx_fir_post2": [0,0,0,0,0,0,0,0], - "line_tx_fir_post3": [0,0,0,0,0,0,0,0] - }, - { - "name": "Ethernet4", - "index": 2, - "phy_id": 0, - "system_lanes": [24,25,26,27], - "line_lanes": [8,9,10,11,12,13,14,15], - "system_tx_fir_pre3": [0,0,0,0], - "system_tx_fir_pre2": [0,0,0,0], - "system_tx_fir_pre1": [0,0,0,0], - "system_tx_fir_main": [128,128,128,128], - "system_tx_fir_post1": [0,0,0,0], - "system_tx_fir_post2": [0,0,0,0], - "system_tx_fir_post3": [0,0,0,0], - "line_tx_fir_pre3": [0,0,0,0,0,0,0,0], - "line_tx_fir_pre2": [0,0,0,0,0,0,0,0], - "line_tx_fir_pre1": [-18,-18,-18,-18,-18,-18,-18,-18], - "line_tx_fir_main": [112,112,112,112,112,112,112,112], - "line_tx_fir_post1": [0,0,0,0,0,0,0,0], - "line_tx_fir_post2": [0,0,0,0,0,0,0,0], - "line_tx_fir_post3": [0,0,0,0,0,0,0,0] - }, - { - "name": "Ethernet8", - "index": 3, - "phy_id": 1, - "system_lanes": [52,53,54,55], - "line_lanes": [32,33,34,35,36,37,38,39], - "system_tx_fir_pre3": [0,0,0,0], - "system_tx_fir_pre2": [0,0,0,0], - "system_tx_fir_pre1": [0,0,0,0], - "system_tx_fir_main": [128,128,128,128], - "system_tx_fir_post1": [0,0,0,0], - "system_tx_fir_post2": [0,0,0,0], - "system_tx_fir_post3": [0,0,0,0], - "line_tx_fir_pre3": [0,0,0,0,0,0,0,0], - "line_tx_fir_pre2": [0,0,0,0,0,0,0,0], - "line_tx_fir_pre1": [-16,-16,-16,-16,-16,-16,-16,-16], - "line_tx_fir_main": [128,128,128,128,128,128,128,128], - "line_tx_fir_post1": [-10,-10,-10,-10,-10,-10,-10,-10], - "line_tx_fir_post2": [0,0,0,0,0,0,0,0], - "line_tx_fir_post3": [0,0,0,0,0,0,0,0] - }, - { - "name": "Ethernet12", - "index": 4, - "phy_id": 1, - "system_lanes": [56,57,58,59], - "line_lanes": [40,41,42,43,44,45,46,47], - "system_tx_fir_pre3": [0,0,0,0], - "system_tx_fir_pre2": [0,0,0,0], - "system_tx_fir_pre1": [0,0,0,0], - "system_tx_fir_main": [128,128,128,128], - "system_tx_fir_post1": [0,0,0,0], - "system_tx_fir_post2": [0,0,0,0], - "system_tx_fir_post3": [0,0,0,0], - "line_tx_fir_pre3": [0,0,0,0,0,0,0,0], - "line_tx_fir_pre2": [0,0,0,0,0,0,0,0], - "line_tx_fir_pre1": [-18,-18,-18,-18,-18,-18,-18,-18], - "line_tx_fir_main": [112,112,112,112,112,112,112,112], - "line_tx_fir_post1": [0,0,0,0,0,0,0,0], - "line_tx_fir_post2": [0,0,0,0,0,0,0,0], - "line_tx_fir_post3": [0,0,0,0,0,0,0,0] - }, - { - "name": "Ethernet16", - "index": 5, - "phy_id": 2, - "system_lanes": [84,85,86,87], - "line_lanes": [64,65,66,67,68,69,70,71], - "system_tx_fir_pre3": [0,0,0,0], - "system_tx_fir_pre2": [0,0,0,0], - "system_tx_fir_pre1": [0,0,0,0], - "system_tx_fir_main": [128,128,128,128], - "system_tx_fir_post1": [0,0,0,0], - "system_tx_fir_post2": [0,0,0,0], - "system_tx_fir_post3": [0,0,0,0], - "line_tx_fir_pre3": [0,0,0,0,0,0,0,0], - "line_tx_fir_pre2": [0,0,0,0,0,0,0,0], - "line_tx_fir_pre1": [-18,-18,-18,-18,-18,-18,-18,-18], - "line_tx_fir_main": [112,112,112,112,112,112,112,112], - "line_tx_fir_post1": [0,0,0,0,0,0,0,0], - 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"system_tx_fir_post3": [0,0,0,0], - "line_tx_fir_pre3": [0,0,0,0,0,0,0,0], - "line_tx_fir_pre2": [0,0,0,0,0,0,0,0], - "line_tx_fir_pre1": [-16,-16,-16,-16,-16,-16,-16,-16], - "line_tx_fir_main": [112,112,112,112,112,112,112,112], - "line_tx_fir_post1": [0,0,0,0,0,0,0,0], - "line_tx_fir_post2": [0,0,0,0,0,0,0,0], - "line_tx_fir_post3": [0,0,0,0,0,0,0,0] - }, - { - "name": "Ethernet76", - "index": 20, - "phy_id": 9, - "system_lanes": [312,313,314,315], - "line_lanes": [296,297,298,299,300,301,302,303], - "system_tx_fir_pre3": [0,0,0,0], - "system_tx_fir_pre2": [0,0,0,0], - "system_tx_fir_pre1": [0,0,0,0], - "system_tx_fir_main": [128,128,128,128], - "system_tx_fir_post1": [0,0,0,0], - "system_tx_fir_post2": [0,0,0,0], - "system_tx_fir_post3": [0,0,0,0], - "line_tx_fir_pre3": [0,0,0,0,0,0,0,0], - "line_tx_fir_pre2": [0,0,0,0,0,0,0,0], - "line_tx_fir_pre1": [-18,-18,-18,-18,-18,-18,-18,-18], - "line_tx_fir_main": [112,112,112,112,112,112,112,112], - "line_tx_fir_post1": [0,0,0,0,0,0,0,0], - "line_tx_fir_post2": [0,0,0,0,0,0,0,0], - "line_tx_fir_post3": [0,0,0,0,0,0,0,0] - }, - { - "name": "Ethernet80", - "index": 21, - "phy_id": 10, - "system_lanes": [340,341,342,343], - "line_lanes": [320,321,322,323,324,325,326,327], - "system_tx_fir_pre3": [0,0,0,0], - "system_tx_fir_pre2": [0,0,0,0], - "system_tx_fir_pre1": [0,0,0,0], - "system_tx_fir_main": [128,128,128,128], - "system_tx_fir_post1": [0,0,0,0], - "system_tx_fir_post2": [0,0,0,0], - "system_tx_fir_post3": [0,0,0,0], - "line_tx_fir_pre3": [0,0,0,0,0,0,0,0], - "line_tx_fir_pre2": [0,0,0,0,0,0,0,0], - "line_tx_fir_pre1": [-18,-18,-18,-18,-18,-18,-18,-18], - "line_tx_fir_main": [112,112,112,112,112,112,112,112], - "line_tx_fir_post1": [0,0,0,0,0,0,0,0], - "line_tx_fir_post2": [0,0,0,0,0,0,0,0], - "line_tx_fir_post3": [0,0,0,0,0,0,0,0] - }, - { - "name": "Ethernet84", - "index": 22, - "phy_id": 10, - "system_lanes": [344,345,346,347], - "line_lanes": [328,329,330,331,332,333,334,335], - "system_tx_fir_pre3": [0,0,0,0], - "system_tx_fir_pre2": [0,0,0,0], - "system_tx_fir_pre1": [0,0,0,0], - "system_tx_fir_main": [128,128,128,128], - "system_tx_fir_post1": [0,0,0,0], - "system_tx_fir_post2": [0,0,0,0], - "system_tx_fir_post3": [0,0,0,0], - "line_tx_fir_pre3": [0,0,0,0,0,0,0,0], - "line_tx_fir_pre2": [0,0,0,0,0,0,0,0], - "line_tx_fir_pre1": [-18,-18,-18,-18,-18,-18,-18,-18], - "line_tx_fir_main": [112,112,112,112,112,112,112,112], - "line_tx_fir_post1": [0,0,0,0,0,0,0,0], - "line_tx_fir_post2": [0,0,0,0,0,0,0,0], - "line_tx_fir_post3": [0,0,0,0,0,0,0,0] - }, - { - "name": "Ethernet88", - "index": 23, - "phy_id": 11, - "system_lanes": [372,373,374,375], - "line_lanes": [352,353,354,355,356,357,358,359], - "system_tx_fir_pre3": [0,0,0,0], - "system_tx_fir_pre2": [0,0,0,0], - "system_tx_fir_pre1": [0,0,0,0], - "system_tx_fir_main": [128,128,128,128], - "system_tx_fir_post1": [0,0,0,0], - "system_tx_fir_post2": [0,0,0,0], - "system_tx_fir_post3": [0,0,0,0], - "line_tx_fir_pre3": [0,0,0,0,0,0,0,0], - "line_tx_fir_pre2": [0,0,0,0,0,0,0,0], - "line_tx_fir_pre1": [-16,-16,-16,-16,-16,-16,-16,-16], - "line_tx_fir_main": [116,116,116,116,116,116,116,116], - "line_tx_fir_post1": [-4,-4,-4,-4,-4,-4,-4,-4], - "line_tx_fir_post2": [0,0,0,0,0,0,0,0], - "line_tx_fir_post3": [0,0,0,0,0,0,0,0] - }, - { - "name": "Ethernet92", - "index": 24, - "phy_id": 11, - "system_lanes": [376,377,378,379], - "line_lanes": [360,361,362,363,364,365,366,367], - "system_tx_fir_pre3": [0,0,0,0], - "system_tx_fir_pre2": [0,0,0,0], - "system_tx_fir_pre1": [0,0,0,0], - "system_tx_fir_main": [128,128,128,128], - "system_tx_fir_post1": [0,0,0,0], - "system_tx_fir_post2": [0,0,0,0], - "system_tx_fir_post3": [0,0,0,0], - "line_tx_fir_pre3": [0,0,0,0,0,0,0,0], - "line_tx_fir_pre2": [0,0,0,0,0,0,0,0], - "line_tx_fir_pre1": [-18,-18,-18,-18,-18,-18,-18,-18], - "line_tx_fir_main": [112,112,112,112,112,112,112,112], - "line_tx_fir_post1": [0,0,0,0,0,0,0,0], - "line_tx_fir_post2": [0,0,0,0,0,0,0,0], - "line_tx_fir_post3": [0,0,0,0,0,0,0,0] - }, - { - "name": "Ethernet96", - "index": 25, - "phy_id": 12, - "system_lanes": [404,405,406,407], - "line_lanes": [384,385,386,387,388,389,390,391], - "system_tx_fir_pre3": [0,0,0,0], - "system_tx_fir_pre2": [0,0,0,0], - "system_tx_fir_pre1": [0,0,0,0], - "system_tx_fir_main": [128,128,128,128], - "system_tx_fir_post1": [0,0,0,0], - "system_tx_fir_post2": [0,0,0,0], - "system_tx_fir_post3": [0,0,0,0], - "line_tx_fir_pre3": [0,0,0,0,0,0,0,0], - "line_tx_fir_pre2": [0,0,0,0,0,0,0,0], - "line_tx_fir_pre1": [-18,-18,-18,-18,-18,-18,-18,-18], - "line_tx_fir_main": [100,100,100,100,100,100,100,100], - "line_tx_fir_post1": [-16,-16,-16,-16,-16,-16,-16,-16], - "line_tx_fir_post2": [0,0,0,0,0,0,0,0], - "line_tx_fir_post3": [0,0,0,0,0,0,0,0] - }, - { - "name": "Ethernet100", - "index": 26, - "phy_id": 12, - "system_lanes": [408,409,410,411], - "line_lanes": [392,393,394,395,396,397,398,399], - "system_tx_fir_pre3": [0,0,0,0], - "system_tx_fir_pre2": [0,0,0,0], - "system_tx_fir_pre1": [0,0,0,0], - "system_tx_fir_main": [128,128,128,128], - "system_tx_fir_post1": [0,0,0,0], - "system_tx_fir_post2": [0,0,0,0], - "system_tx_fir_post3": [0,0,0,0], - "line_tx_fir_pre3": [0,0,0,0,0,0,0,0], - "line_tx_fir_pre2": [0,0,0,0,0,0,0,0], - "line_tx_fir_pre1": [-16,-16,-16,-16,-16,-16,-16,-16], - "line_tx_fir_main": [104,104,104,104,104,104,104,104], - "line_tx_fir_post1": [-4,-4,-4,-4,-4,-4,-4,-4], - "line_tx_fir_post2": [0,0,0,0,0,0,0,0], - "line_tx_fir_post3": [0,0,0,0,0,0,0,0] - }, - { - "name": "Ethernet104", - "index": 27, - "phy_id": 13, - "system_lanes": [436,437,438,439], - "line_lanes": [416,417,418,419,420,421,422,423], - "system_tx_fir_pre3": [0,0,0,0], - "system_tx_fir_pre2": [0,0,0,0], - "system_tx_fir_pre1": [0,0,0,0], - "system_tx_fir_main": [128,128,128,128], - "system_tx_fir_post1": [0,0,0,0], - "system_tx_fir_post2": [0,0,0,0], - "system_tx_fir_post3": [0,0,0,0], - "line_tx_fir_pre3": [0,0,0,0,0,0,0,0], - "line_tx_fir_pre2": [0,0,0,0,0,0,0,0], - "line_tx_fir_pre1": [-18,-18,-18,-18,-18,-18,-18,-18], - "line_tx_fir_main": [112,112,112,112,112,112,112,112], - "line_tx_fir_post1": [0,0,0,0,0,0,0,0], - "line_tx_fir_post2": [0,0,0,0,0,0,0,0], - "line_tx_fir_post3": [0,0,0,0,0,0,0,0] - }, - { - "name": "Ethernet108", - "index": 28, - "phy_id": 13, - "system_lanes": [440,441,442,443], - "line_lanes": [424,425,426,427,428,429,430,431], - "system_tx_fir_pre3": [0,0,0,0], - "system_tx_fir_pre2": [0,0,0,0], - "system_tx_fir_pre1": [0,0,0,0], - "system_tx_fir_main": [128,128,128,128], - "system_tx_fir_post1": [0,0,0,0], - "system_tx_fir_post2": [0,0,0,0], - "system_tx_fir_post3": [0,0,0,0], - "line_tx_fir_pre3": [0,0,0,0,0,0,0,0], - "line_tx_fir_pre2": [0,0,0,0,0,0,0,0], - "line_tx_fir_pre1": [-16,-16,-16,-16,-16,-16,-16,-16], - "line_tx_fir_main": [120,120,120,120,120,120,120,120], - "line_tx_fir_post1": [0,0,0,0,0,0,0,0], - "line_tx_fir_post2": [0,0,0,0,0,0,0,0], - "line_tx_fir_post3": [0,0,0,0,0,0,0,0] - }, - { - "name": "Ethernet112", - "index": 29, - "phy_id": 14, - "system_lanes": [468,469,470,471], - "line_lanes": [448,449,450,451,452,453,454,455], - "system_tx_fir_pre3": [0,0,0,0], - "system_tx_fir_pre2": [0,0,0,0], - "system_tx_fir_pre1": [0,0,0,0], - "system_tx_fir_main": [128,128,128,128], - "system_tx_fir_post1": [0,0,0,0], - "system_tx_fir_post2": [0,0,0,0], - "system_tx_fir_post3": [0,0,0,0], - "line_tx_fir_pre3": [0,0,0,0,0,0,0,0], - "line_tx_fir_pre2": [0,0,0,0,0,0,0,0], - "line_tx_fir_pre1": [-18,-18,-18,-18,-18,-18,-18,-18], - "line_tx_fir_main": [112,112,112,112,112,112,112,112], - "line_tx_fir_post1": [0,0,0,0,0,0,0,0], - "line_tx_fir_post2": [0,0,0,0,0,0,0,0], - "line_tx_fir_post3": [0,0,0,0,0,0,0,0] - }, - { - "name": "Ethernet116", - "index": 30, - "phy_id": 14, - "system_lanes": [472,473,474,475], - "line_lanes": [456,457,458,459,460,461,462,463], - "system_tx_fir_pre3": [0,0,0,0], - "system_tx_fir_pre2": [0,0,0,0], - "system_tx_fir_pre1": [0,0,0,0], - "system_tx_fir_main": [128,128,128,128], - "system_tx_fir_post1": [0,0,0,0], - "system_tx_fir_post2": [0,0,0,0], - "system_tx_fir_post3": [0,0,0,0], - "line_tx_fir_pre3": [0,0,0,0,0,0,0,0], - "line_tx_fir_pre2": [0,0,0,0,0,0,0,0], - "line_tx_fir_pre1": [-18,-18,-18,-18,-18,-18,-18,-18], - "line_tx_fir_main": [112,112,112,112,112,112,112,112], - "line_tx_fir_post1": [0,0,0,0,0,0,0,0], - "line_tx_fir_post2": [0,0,0,0,0,0,0,0], - "line_tx_fir_post3": [0,0,0,0,0,0,0,0] - }, - { - "name": "Ethernet120", - "index": 31, - "phy_id": 15, - "system_lanes": [500,501,502,503], - "line_lanes": [480,481,482,483,484,485,486,487], - "system_tx_fir_pre3": [0,0,0,0], - "system_tx_fir_pre2": [0,0,0,0], - "system_tx_fir_pre1": [0,0,0,0], - "system_tx_fir_main": [128,128,128,128], - "system_tx_fir_post1": [0,0,0,0], - "system_tx_fir_post2": [0,0,0,0], - "system_tx_fir_post3": [0,0,0,0], - "line_tx_fir_pre3": [0,0,0,0,0,0,0,0], - "line_tx_fir_pre2": [0,0,0,0,0,0,0,0], - "line_tx_fir_pre1": [-16,-16,-16,-16,-16,-16,-16,-16], - "line_tx_fir_main": [124,124,124,124,124,124,124,124], - "line_tx_fir_post1": [0,0,0,0,0,0,0,0], - "line_tx_fir_post2": [0,0,0,0,0,0,0,0], - "line_tx_fir_post3": [0,0,0,0,0,0,0,0] - }, - { - "name": "Ethernet124", - "index": 32, - "phy_id": 15, - "system_lanes": [504,505,506,507], - "line_lanes": [488,489,490,491,492,493,494,495], - "system_tx_fir_pre3": [0,0,0,0], - "system_tx_fir_pre2": [0,0,0,0], - "system_tx_fir_pre1": [0,0,0,0], - "system_tx_fir_main": [128,128,128,128], - "system_tx_fir_post1": [0,0,0,0], - "system_tx_fir_post2": [0,0,0,0], - "system_tx_fir_post3": [0,0,0,0], - "line_tx_fir_pre3": [0,0,0,0,0,0,0,0], - "line_tx_fir_pre2": [0,0,0,0,0,0,0,0], - "line_tx_fir_pre1": [-18,-18,-18,-18,-18,-18,-18,-18], - "line_tx_fir_main": [112,112,112,112,112,112,112,112], - "line_tx_fir_post1": [0,0,0,0,0,0,0,0], - "line_tx_fir_post2": [0,0,0,0,0,0,0,0], - "line_tx_fir_post3": [0,0,0,0,0,0,0,0] - } - ] -} diff --git a/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/hwsku-init b/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/hwsku-init new file mode 100755 index 00000000000..940f15d8415 --- /dev/null +++ b/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/hwsku-init @@ -0,0 +1 @@ +python3 /usr/share/sonic/hwsku/hwsku_init.py /usr/share/sonic/hwsku/ > /var/log/hwsku-init.log diff --git a/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/hwsku_init.py b/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/hwsku_init.py new file mode 100644 index 00000000000..be08fde1f18 --- /dev/null +++ b/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/hwsku_init.py @@ -0,0 +1,164 @@ +from dataclasses import dataclass +from typing import List, Dict, Optional, Set +import os +import sys +from hwsku_init_common import * + +MAX_NH5010_PORTS = 64 +TEMPLATE_DIR = "templates" +OUTPUT_DIR = "." +DEFAULTS_DIR = "defaults" +ASIC_BCM_TEMPLATE = "nh5010.bcm.j2" +GB_TEMPLATE = "gearbox_config.json.j2" + +q3d_speed_prefix_map = { + 100: "CGE", + 400: "CDGE", + 800: "D3CGE" +} + +LANE_SPEED_25G = 25 +LANE_SPEED_50G = 50 +LANE_SPEED_100G = 100 + +@dataclass +class SKUAsicPortConfig: + logical_port: str + asic_port_type: str + local_tmport: str + is_pam4: bool + +@dataclass +class SKUGbPortConfig: + name: str + +class SkuPipeline(SkuBasePipeline): + + def __init__( + self, + speed_map_file: str, + asic_lane_file: str, + config_db_file: Optional[str]=None + ): + super().__init__(speed_map_file, asic_lane_file, config_db_file) + + def _register_lane_speed( + self, + pm_lane_speeds: Dict[int, Set[int]], + pm: int, + lane_speed: int, + port_name: str, + port_index: int, + port_speed: int, + ) -> None: + speeds = pm_lane_speeds.setdefault(pm, set()) + speeds.add(lane_speed) + if (LANE_SPEED_25G in speeds and + (LANE_SPEED_50G in speeds or LANE_SPEED_100G in speeds)): + raise Exception( + f"Lane speed conflict in PM {pm} for {port_name} " + f"(index {port_index}) with speed {port_speed}" + ) + + def generate_plat_asic_config(self) -> List[SKUAsicPortConfig]: + pm_lane_speeds = {} + pm_lane_usage = {} + asic_port_cfgs: List[SKUAsicPortConfig] = [] + + for port_name, port_cfg in self.config_db.items(): + # Find the speed profile for this port + port_index = port_cfg.index + if port_index > MAX_NH5010_PORTS: + continue + port_speed = port_cfg.speed + port_lanes = port_cfg.lanes + port_speed_profiles = self.port_speed_map[port_index] + for speed_profile in port_speed_profiles: + if speed_profile.speed == port_speed and speed_profile.asic.lanes == port_lanes: + break + else: + raise Exception( + f"Failed to find speed profile for port {port_name} (index {port_index}) with speed {port_speed}" + ) + + # Now search the lanes in the ASIC lane map using the prepending of q3d_speed_prefix_map + asic_port = speed_profile.asic + asic_core = asic_port.core + asic_pm = asic_port.pm + asic_lanes = asic_port.lanes + + q3d_port_name = None + for key, lanes in self.asic_lane_map.items(): + if key.core != asic_core or key.pm != asic_pm: + continue + if lanes == asic_lanes and key.port_name.startswith(q3d_speed_prefix_map[port_speed]): + q3d_port_name = key.port_name + break + if q3d_port_name is None: + raise Exception( + f"Failed to find lanes {asic_lanes} in Q3D port map for port {port_name} " + f"(index {port_index}) with speed {port_speed}" + ) + + # Validate if lane conflicts happen in other ports in the pm + for lane in asic_lanes: + if lane in pm_lane_usage.setdefault(asic_pm, set()): + raise Exception(f"Lane conflict in PM {asic_pm} for port {port_name} " + f"(index {port_index}) with speed {port_speed}") + pm_lane_usage[asic_pm].add(lane) + + # Validate if pm_lane_speeds have 25G conflicting with 50G/100G in the same pm + lane_speed = port_speed // len(asic_lanes) + self._register_lane_speed(pm_lane_speeds, asic_pm, lane_speed, port_name, port_index, port_speed) + + # Now we know the q3d port name, lets constuct the entry for SKUAsicPortConfig + logical_port = 4*(port_index - 1) + 1 + local_tmport_index = (asic_lanes[0] + 1) % 32 + asic_port_type = q3d_port_name + local_tmport = f"core_{asic_core}.{local_tmport_index}" # Core has 4 pms and each pm has 8 lanes + if q3d_port_name.startswith("CGE") and len(asic_lanes) == 4: + is_pam4 = False + else: + is_pam4 = True + + asic_port_cfgs.append(SKUAsicPortConfig(logical_port=str(logical_port), + asic_port_type=asic_port_type, + local_tmport=local_tmport, + is_pam4=is_pam4)) + + LOG.log_info(f"Generated asic config: {asic_port_cfgs}") + return asic_port_cfgs + + def generate_plat_gearbox_config(self) -> List[SKUGbPortConfig]: + raise NotImplementedError("generate_plat_gearbox_config() not implemented") + +def __main__(): + """Entry point. + + If a base directory is provided as the first CLI argument, all file + paths used by the pipeline are resolved relative to that directory. + Otherwise, they default to the directory containing this script. + """ + if len(sys.argv) > 2: + print(f"Usage: {sys.argv[0]} [base_dir]", file=sys.stderr) + sys.exit(1) + + if len(sys.argv) == 2: + base_dir = sys.argv[1] + else: + base_dir = os.path.dirname(os.path.abspath(__file__)) + + pipeline = SkuPipeline( + speed_map_file=os.path.join(base_dir, "port_speed.json"), + asic_lane_file=os.path.join(base_dir, "Q3D_ports.json"), + ) + pipeline.run( + template_dir=os.path.join(base_dir, TEMPLATE_DIR), + defaults_dir=os.path.join(base_dir, DEFAULTS_DIR), + output_dir=os.path.join(base_dir, OUTPUT_DIR), + asic_bcm_template=ASIC_BCM_TEMPLATE, + gearbox_template=GB_TEMPLATE, + ) + +if __name__ == '__main__': + __main__() diff --git a/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/hwsku_init_common.py b/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/hwsku_init_common.py new file mode 100644 index 00000000000..a08bd6e1937 --- /dev/null +++ b/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/hwsku_init_common.py @@ -0,0 +1,377 @@ +from dataclasses import dataclass +from typing import List, Dict, Optional +import json +from jinja2 import Environment, FileSystemLoader, select_autoescape +import os +import shutil +import logging +from swsscommon import swsscommon +from sonic_py_common import syslogger, device_info + +SYSLOG_IDENTIFIER = "hwsku-init" +LOG = syslogger.SysLogger(SYSLOG_IDENTIFIER, enable_runtime_config=False, log_level=logging.DEBUG) + +# Force this LOG instance to always print to console +# Since the hwsku-init runs before syslog is up, they need to go to console +_syslog_log = LOG.log +def _log_with_console(priority, msg, also_print_to_console=False): + return _syslog_log(priority, msg, also_print_to_console=True) +LOG.log = _log_with_console + +''' +Data types for parsing the input files +''' +@dataclass +class AsicPort: + core: int + pm: int + lanes: List[int] + +@dataclass +class GearboxPort: + gearbox_id: int + gearbox_init_mode: str + host_lanes: List[int] + line_lanes: List[int] + logical_host_lanes: Optional[List[int]] = None + logical_line_lanes: Optional[List[int]] = None + +@dataclass +class PortSpeedProfile: + name: str + speed: int # in Gbps + asic: AsicPort + gearbox: Optional[GearboxPort] = None + +@dataclass +class PortConfigDbEntry: + alias: str + speed: int + index: int + lanes: List[int] + +@dataclass(frozen=True) +class ASICLaneKey: + core: int + pm: int + port_name: str + +PortSpeedMap = Dict[int, List[PortSpeedProfile]] # port_index -> [speed_profiles] +ConfigDbPortMap = Dict[str, PortConfigDbEntry] # port_name -> PortConfigDbEntry +ASICLaneMap = Dict[ASICLaneKey, List[int]] # ASICLaneKey -> [lanes...] + +@dataclass +class SKURawInputs: + port_speed: PortSpeedMap + asic_lanes: ASICLaneMap + config_db: Dict[str, object] + +''' +Data types for the SKU configuration +''' +@dataclass +class SKUGearboxConfig: + name: str + index: int + phy_id: int + system_lanes: List[int] + line_lanes: List[int] + +@dataclass +class SKUPortPhyConfig: + index: int + system_speed: int + line_speed: int + +SKUPortPhyFiles = Dict[str, List[SKUPortPhyConfig]] # phy config file name -> SKUPortPhyConfig + +class SkuBasePipeline: + + def __init__( + self, + speed_map_file: str, + asic_lane_file: str, + config_db_file: Optional[str]=None + ): + self.port_speed_map = self.load_port_speed_map(speed_map_file) + self.asic_lane_map = self.load_asic_file(asic_lane_file) + if config_db_file: + self.config_db = self.read_config_from_file(config_db_file) + else: + self.config_db = self.read_config_db() + + def load_port_speed_map(self, path: str) -> PortSpeedMap: + """ + Load platform port speed map from JSON file. + The JSON file is generated by the platform team and contains the port speed + information for all supported port speeds for a given platform. This information + is used to initialize the platform specific port configuration. + """ + with open(path, "r") as f: + raw = json.load(f) + + port_speed_map: PortSpeedMap = {} + + for port_index_str, speed_profiles in raw.items(): + port_index = int(port_index_str) + port_speed_map[port_index] = [] + + for speed_str, profile in speed_profiles.items(): + # Support keys like "100G" and "100G-4" by normalizing to the numeric + # speed (Gbps) based on the part before 'G'. Both will have the same + # speed value but are kept as separate profiles. + base_speed_str = speed_str.split("G", 1)[0] + speed = int(base_speed_str) + + asic = AsicPort( + core=profile["asic"]["core"], + pm=profile["asic"]["pm"], + lanes=profile["asic"]["lanes"], + ) + + gearbox = None + if "gearbox" in profile: + gearbox = GearboxPort( + gearbox_id=profile["gearbox"]["gearbox_id"], + gearbox_init_mode=profile["gearbox"]["gearbox_init_mode"], + host_lanes=profile["gearbox"]["host_lanes"], + line_lanes=profile["gearbox"]["line_lanes"], + logical_host_lanes=profile["gearbox"].get("logical_host_lanes"), + logical_line_lanes=profile["gearbox"].get("logical_line_lanes"), + ) + + name = profile["name"] + port_speed_map[port_index].append( + PortSpeedProfile( + name=name, + speed=speed, + asic=asic, + gearbox=gearbox, + ) + ) + LOG.log_info(f"Loaded port speed map: {port_speed_map}") + return port_speed_map + + def load_asic_file(self, path: str) -> ASICLaneMap: + with open(path, "r") as f: + raw = json.load(f) + lanes = raw.get("PM", {}) + asic_map: ASICLaneMap = {} + for core_str, pm_dict in lanes.items(): + core = int(core_str) + for pm_str, ports in pm_dict.items(): + pm = int(pm_str) + for port_name, ls in ports.items(): + key = ASICLaneKey(core=core, pm=pm, port_name=port_name) + asic_map[key] = list(ls) + LOG.log_info(f"Loaded asic lane map: {asic_map}") + return asic_map + + def read_config_db(self): + """Read all PORT entries from CONFIG_DB and return a mapping. + + Uses swsscommon DBConnector and Table to access the PORT table. + + Returns a dictionary like: + { + "Ethernet0": {"alias": "etp1", "speed": "400000", ...}, + ... + } + """ + db = swsscommon.DBConnector("CONFIG_DB", 0) + tbl = swsscommon.Table(db, "PORT") + + port_map: ConfigDbPortMap = {} + for k in tbl.getKeys(): + ok_alias, alias = tbl.hget(k, "alias") + ok_speed, speed_str = tbl.hget(k, "speed") + ok_index, index_str = tbl.hget(k, "index") + ok_lanes, lanes_str = tbl.hget(k, "lanes") + + if not (ok_alias and ok_speed and ok_index and ok_lanes): + raise RuntimeError(f"Incomplete PORT entry for {k}") + + port_map[k] = PortConfigDbEntry( + alias=alias, + speed=int(speed_str) // 1000, # 400000 -> 400 (Gbps) + index=int(index_str), + lanes=[int(n) for n in lanes_str.split(",")] + ) + LOG.log_info(f"Loaded config db: {port_map}") + return port_map + + def read_config_from_file(self, path: str) -> ConfigDbPortMap: + """Read PORT entries from a config DB JSON file. + + The file is expected to have a structure like: + { + "PORT": { + "Ethernet0": { + "alias": "etp1", + "speed": "400000", + "index": "1", + "lanes": "96,97,98,99", + ... + }, + ... + }, + ... + } + + Returns the same data type as :meth:`read_config_db`, i.e. + ConfigDbPortMap (mapping port name -> PortConfigDbEntry). + """ + + with open(path, "r") as f: + raw = json.load(f) + + if "PORT" not in raw or not isinstance(raw["PORT"], dict): + raise RuntimeError(f"PORT table not found in config DB file {path}") + + port_table = raw["PORT"] + port_map: ConfigDbPortMap = {} + + for port_name, attrs in port_table.items(): + try: + alias = attrs["alias"] + speed_str = attrs["speed"] + index_str = attrs["index"] + lanes_val = attrs["lanes"] + except KeyError as e: + raise RuntimeError(f"Incomplete PORT entry for {port_name} in {path}: missing {e.args[0]}") from e + + # Lanes may be represented either as a comma-separated string + # (e.g. "96,97,98,99") or as a list of integers/strings. + if isinstance(lanes_val, list): + lanes = [int(n) for n in lanes_val] + else: + lanes = [int(n) for n in str(lanes_val).split(",") if str(n).strip()] + + port_map[port_name] = PortConfigDbEntry( + alias=alias, + speed=int(speed_str) // 1000, # 400000 -> 400 (Gbps), match read_config_db() + index=int(index_str), + lanes=lanes, + ) + + return port_map + + def generate_sonic_gearbox_config(self) -> List[SKUGearboxConfig]: + gearbox_port_entrys: List[SKUGearboxConfig] = [] + # Iterate over config_db + for port_name, port_cfg in self.config_db.items(): + port_index = port_cfg.index + if port_index not in self.port_speed_map: + continue + # Find the speed profile for this port + port_speed = port_cfg.speed + port_lanes = port_cfg.lanes + port_speed_profiles = self.port_speed_map[port_index] + + for speed_profile in port_speed_profiles: + if speed_profile.speed == port_speed and speed_profile.asic.lanes == port_lanes: + break + else: + raise Exception( + f"Failed to find speed profile for port {port_name} (index {port_index}) with speed {port_speed}" + ) + + # Now update the SKUGearboxConfig based on the found speed profile + if speed_profile.gearbox is None: + continue + + gearbox_port_entrys.append(SKUGearboxConfig( + name=speed_profile.name, + index=port_index, + phy_id=speed_profile.gearbox.gearbox_id, + system_lanes=speed_profile.gearbox.host_lanes, + line_lanes=speed_profile.gearbox.line_lanes + )) + LOG.log_info(f"Generated gearbox config: {gearbox_port_entrys}") + return gearbox_port_entrys + + def generate_sonic_phy_config(self) -> SKUPortPhyFiles: + # Create files per phy following the format phy_config.json + phy_files: SKUPortPhyFiles = {} + + for port_name, port_cfg in self.config_db.items(): + port_index = port_cfg.index + if port_index not in self.port_speed_map: + continue + # Find the speed profile for this port + port_speed = port_cfg.speed + port_lanes = port_cfg.lanes + port_speed_profiles = self.port_speed_map[port_index] + + for speed_profile in port_speed_profiles: + if speed_profile.speed == port_speed and speed_profile.asic.lanes == port_lanes: + break + else: + raise Exception( + f"Failed to find speed profile for port {port_name} (index {port_index}) with speed {port_speed}" + ) + + if speed_profile.gearbox is None: + continue + + phy_id = speed_profile.gearbox.gearbox_id + phy_files.setdefault(f"phy{phy_id}_config.json", []).append( + SKUPortPhyConfig( + index=port_index, + system_speed=(speed_profile.speed * 1000) // len(speed_profile.gearbox.host_lanes), + line_speed=(speed_profile.speed * 1000) // len(speed_profile.gearbox.line_lanes), + ) + ) + LOG.log_info(f"Generated phy config: {phy_files}") + return phy_files + + def generate_plat_asic_config(self): + raise NotImplementedError("generate_plat_asic_config() not implemented") + + def generate_plat_gearbox_config(self): + raise NotImplementedError("generate_plat_gearbox_config() not implemented") + + def run( + self, + template_dir: str, + output_dir: str, + defaults_dir: str, + asic_bcm_template: str, + gearbox_template: Optional[str] = None, + ) -> None: + try: + asic_cfg = self.generate_plat_asic_config() + # Currently we do not support generating gearbox bcm config + # gb_plat_cfg = self.generate_plat_gearbox_config() + asic_type = device_info.get_sonic_version_info()['asic_type'] + if asic_type == 'vs': + return + sonic_gb = self.generate_sonic_gearbox_config() + sonic_phy = self.generate_sonic_phy_config() + + # nosemgrep: python.flask.security.xss.audit.direct-use-of-jinja2.direct-use-of-jinja2 + env = Environment( + loader=FileSystemLoader(template_dir), + autoescape=select_autoescape(["html", "xml"]) + ) + + if gearbox_template: + env.get_template(gearbox_template).stream(interfaces=sonic_gb).dump( + os.path.join(output_dir, "gearbox_config.json") + ) + # Generate multiple phy config files + for phy_file, phy_cfg in sonic_phy.items(): + env.get_template("phy_config.json.j2").stream(ports=phy_cfg).dump( + os.path.join(output_dir, phy_file) + ) + env.get_template(asic_bcm_template).stream(ports_config=asic_cfg).dump( + os.path.join(output_dir, os.path.splitext(asic_bcm_template)[0]) + ) + except Exception as e: + LOG.log_error(f"Error: {e}, {e.__traceback__}") + LOG.log_info("copying the defaults...") + # Copy everything from defaults folder to hwsku + for file in os.listdir(defaults_dir): + shutil.copy( + os.path.join(defaults_dir, file), os.path.join(output_dir, file) + ) diff --git a/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/nh5010-default.bcm b/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/nh5010-default.bcm deleted file mode 100644 index 7db790567a6..00000000000 --- a/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/nh5010-default.bcm +++ /dev/null @@ -1,2270 +0,0 @@ -# ---------------------------------------------------------------------------------------------------- -# core_0 -# ---------------------------------------------------------------------------------------------------- -ucode_port_185.BCM8887X=CDGE4_0:core_0.1 -tm_port_header_type_out_185.BCM8887X=ETH -ucode_port_189.BCM8887X=CDGE4_1:core_0.5 -tm_port_header_type_out_189.BCM8887X=ETH - -# core 0 lane0 -lane_to_serdes_map_nif_lane0.BCM8887X=rx6:tx7 -phy_rx_polarity_flip_phy0.BCM8887X=0 -phy_tx_polarity_flip_phy0.BCM8887X=1 -serdes_tx_taps_0.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 0 lane1 -lane_to_serdes_map_nif_lane1.BCM8887X=rx4:tx3 -phy_rx_polarity_flip_phy1.BCM8887X=0 -phy_tx_polarity_flip_phy1.BCM8887X=1 -serdes_tx_taps_1.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 0 lane2 -lane_to_serdes_map_nif_lane2.BCM8887X=rx7:tx1 -phy_rx_polarity_flip_phy2.BCM8887X=0 -phy_tx_polarity_flip_phy2.BCM8887X=0 -serdes_tx_taps_2.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 0 lane3 -lane_to_serdes_map_nif_lane3.BCM8887X=rx5:tx2 -phy_rx_polarity_flip_phy3.BCM8887X=0 -phy_tx_polarity_flip_phy3.BCM8887X=1 -serdes_tx_taps_3.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 0 lane4 -lane_to_serdes_map_nif_lane4.BCM8887X=rx2:tx0 -phy_rx_polarity_flip_phy4.BCM8887X=0 -phy_tx_polarity_flip_phy4.BCM8887X=0 -serdes_tx_taps_4.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 0 lane5 -lane_to_serdes_map_nif_lane5.BCM8887X=rx3:tx6 -phy_rx_polarity_flip_phy5.BCM8887X=1 -phy_tx_polarity_flip_phy5.BCM8887X=1 -serdes_tx_taps_5.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 0 lane6 -lane_to_serdes_map_nif_lane6.BCM8887X=rx0:tx4 -phy_rx_polarity_flip_phy6.BCM8887X=0 -phy_tx_polarity_flip_phy6.BCM8887X=0 -serdes_tx_taps_6.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 0 lane7 -lane_to_serdes_map_nif_lane7.BCM8887X=rx1:tx5 -phy_rx_polarity_flip_phy7.BCM8887X=0 -phy_tx_polarity_flip_phy7.BCM8887X=0 -serdes_tx_taps_7.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - - -# ---------------------------------------------------------------------------------------------------- -# core_1 -# ---------------------------------------------------------------------------------------------------- -ucode_port_177.BCM8887X=CDGE4_2:core_0.9 -tm_port_header_type_out_177.BCM8887X=ETH -ucode_port_181.BCM8887X=CDGE4_3:core_0.13 -tm_port_header_type_out_181.BCM8887X=ETH - -# core 1 lane8 -lane_to_serdes_map_nif_lane8.BCM8887X=rx10:tx8 -phy_rx_polarity_flip_phy8.BCM8887X=0 -phy_tx_polarity_flip_phy8.BCM8887X=0 -serdes_tx_taps_8.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 1 lane9 -lane_to_serdes_map_nif_lane9.BCM8887X=rx11:tx14 -phy_rx_polarity_flip_phy9.BCM8887X=1 -phy_tx_polarity_flip_phy9.BCM8887X=1 -serdes_tx_taps_9.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 1 lane10 -lane_to_serdes_map_nif_lane10.BCM8887X=rx8:tx12 -phy_rx_polarity_flip_phy10.BCM8887X=1 -phy_tx_polarity_flip_phy10.BCM8887X=0 -serdes_tx_taps_10.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 1 lane11 -lane_to_serdes_map_nif_lane11.BCM8887X=rx9:tx13 -phy_rx_polarity_flip_phy11.BCM8887X=0 -phy_tx_polarity_flip_phy11.BCM8887X=0 -serdes_tx_taps_11.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 1 lane12 -lane_to_serdes_map_nif_lane12.BCM8887X=rx14:tx15 -phy_rx_polarity_flip_phy12.BCM8887X=0 -phy_tx_polarity_flip_phy12.BCM8887X=1 -serdes_tx_taps_12.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 1 lane13 -lane_to_serdes_map_nif_lane13.BCM8887X=rx12:tx11 -phy_rx_polarity_flip_phy13.BCM8887X=0 -phy_tx_polarity_flip_phy13.BCM8887X=1 -serdes_tx_taps_13.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 1 lane14 -lane_to_serdes_map_nif_lane14.BCM8887X=rx15:tx9 -phy_rx_polarity_flip_phy14.BCM8887X=0 -phy_tx_polarity_flip_phy14.BCM8887X=0 -serdes_tx_taps_14.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 1 lane15 -lane_to_serdes_map_nif_lane15.BCM8887X=rx13:tx10 -phy_rx_polarity_flip_phy15.BCM8887X=0 -phy_tx_polarity_flip_phy15.BCM8887X=1 -serdes_tx_taps_15.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - - -# ---------------------------------------------------------------------------------------------------- -# core_2 -# ---------------------------------------------------------------------------------------------------- -ucode_port_169.BCM8887X=CDGE4_4:core_0.17 -tm_port_header_type_out_169.BCM8887X=ETH -ucode_port_173.BCM8887X=CDGE4_5:core_0.21 -tm_port_header_type_out_173.BCM8887X=ETH - -# core 2 lane16 -lane_to_serdes_map_nif_lane16.BCM8887X=rx18:tx16 -phy_rx_polarity_flip_phy16.BCM8887X=0 -phy_tx_polarity_flip_phy16.BCM8887X=0 -serdes_tx_taps_16.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 2 lane17 -lane_to_serdes_map_nif_lane17.BCM8887X=rx19:tx22 -phy_rx_polarity_flip_phy17.BCM8887X=1 -phy_tx_polarity_flip_phy17.BCM8887X=1 -serdes_tx_taps_17.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 2 lane18 -lane_to_serdes_map_nif_lane18.BCM8887X=rx16:tx20 -phy_rx_polarity_flip_phy18.BCM8887X=0 -phy_tx_polarity_flip_phy18.BCM8887X=0 -serdes_tx_taps_18.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 2 lane19 -lane_to_serdes_map_nif_lane19.BCM8887X=rx17:tx21 -phy_rx_polarity_flip_phy19.BCM8887X=0 -phy_tx_polarity_flip_phy19.BCM8887X=0 -serdes_tx_taps_19.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 2 lane20 -lane_to_serdes_map_nif_lane20.BCM8887X=rx22:tx23 -phy_rx_polarity_flip_phy20.BCM8887X=0 -phy_tx_polarity_flip_phy20.BCM8887X=1 -serdes_tx_taps_20.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 2 lane21 -lane_to_serdes_map_nif_lane21.BCM8887X=rx20:tx19 -phy_rx_polarity_flip_phy21.BCM8887X=0 -phy_tx_polarity_flip_phy21.BCM8887X=1 -serdes_tx_taps_21.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 2 lane22 -lane_to_serdes_map_nif_lane22.BCM8887X=rx23:tx17 -phy_rx_polarity_flip_phy22.BCM8887X=0 -phy_tx_polarity_flip_phy22.BCM8887X=0 -serdes_tx_taps_22.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 2 lane23 -lane_to_serdes_map_nif_lane23.BCM8887X=rx21:tx18 -phy_rx_polarity_flip_phy23.BCM8887X=0 -phy_tx_polarity_flip_phy23.BCM8887X=1 -serdes_tx_taps_23.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - - -# ---------------------------------------------------------------------------------------------------- -# core_3 -# ---------------------------------------------------------------------------------------------------- -ucode_port_161.BCM8887X=CDGE4_6:core_0.25 -tm_port_header_type_out_161.BCM8887X=ETH -ucode_port_165.BCM8887X=CDGE4_7:core_0.29 -tm_port_header_type_out_165.BCM8887X=ETH - -# core 3 lane24 -lane_to_serdes_map_nif_lane24.BCM8887X=rx26:tx26 -phy_rx_polarity_flip_phy24.BCM8887X=1 -phy_tx_polarity_flip_phy24.BCM8887X=0 -serdes_tx_taps_24.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 3 lane25 -lane_to_serdes_map_nif_lane25.BCM8887X=rx27:tx25 -phy_rx_polarity_flip_phy25.BCM8887X=0 -phy_tx_polarity_flip_phy25.BCM8887X=1 -serdes_tx_taps_25.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 3 lane26 -lane_to_serdes_map_nif_lane26.BCM8887X=rx28:tx31 -phy_rx_polarity_flip_phy26.BCM8887X=0 -phy_tx_polarity_flip_phy26.BCM8887X=0 -serdes_tx_taps_26.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 3 lane27 -lane_to_serdes_map_nif_lane27.BCM8887X=rx30:tx24 -phy_rx_polarity_flip_phy27.BCM8887X=1 -phy_tx_polarity_flip_phy27.BCM8887X=0 -serdes_tx_taps_27.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 3 lane28 -lane_to_serdes_map_nif_lane28.BCM8887X=rx29:tx28 -phy_rx_polarity_flip_phy28.BCM8887X=1 -phy_tx_polarity_flip_phy28.BCM8887X=1 -serdes_tx_taps_28.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 3 lane29 -lane_to_serdes_map_nif_lane29.BCM8887X=rx31:tx27 -phy_rx_polarity_flip_phy29.BCM8887X=0 -phy_tx_polarity_flip_phy29.BCM8887X=1 -serdes_tx_taps_29.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 3 lane30 -lane_to_serdes_map_nif_lane30.BCM8887X=rx24:tx30 -phy_rx_polarity_flip_phy30.BCM8887X=0 -phy_tx_polarity_flip_phy30.BCM8887X=1 -serdes_tx_taps_30.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 3 lane31 -lane_to_serdes_map_nif_lane31.BCM8887X=rx25:tx29 -phy_rx_polarity_flip_phy31.BCM8887X=0 -phy_tx_polarity_flip_phy31.BCM8887X=1 -serdes_tx_taps_31.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - - -# ---------------------------------------------------------------------------------------------------- -# core_4 -# ---------------------------------------------------------------------------------------------------- -ucode_port_57.BCM8887X=CDGE4_8:core_1.1 -tm_port_header_type_out_57.BCM8887X=ETH -ucode_port_61.BCM8887X=CDGE4_9:core_1.5 -tm_port_header_type_out_61.BCM8887X=ETH - -# core 4 lane32 -lane_to_serdes_map_nif_lane32.BCM8887X=rx35:tx39 -phy_rx_polarity_flip_phy32.BCM8887X=1 -phy_tx_polarity_flip_phy32.BCM8887X=0 -serdes_tx_taps_32.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 4 lane33 -lane_to_serdes_map_nif_lane33.BCM8887X=rx34:tx35 -phy_rx_polarity_flip_phy33.BCM8887X=0 -phy_tx_polarity_flip_phy33.BCM8887X=0 -serdes_tx_taps_33.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 4 lane34 -lane_to_serdes_map_nif_lane34.BCM8887X=rx37:tx34 -phy_rx_polarity_flip_phy34.BCM8887X=1 -phy_tx_polarity_flip_phy34.BCM8887X=0 -serdes_tx_taps_34.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 4 lane35 -lane_to_serdes_map_nif_lane35.BCM8887X=rx39:tx33 -phy_rx_polarity_flip_phy35.BCM8887X=1 -phy_tx_polarity_flip_phy35.BCM8887X=1 -serdes_tx_taps_35.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 4 lane36 -lane_to_serdes_map_nif_lane36.BCM8887X=rx33:tx36 -phy_rx_polarity_flip_phy36.BCM8887X=1 -phy_tx_polarity_flip_phy36.BCM8887X=0 -serdes_tx_taps_36.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 4 lane37 -lane_to_serdes_map_nif_lane37.BCM8887X=rx32:tx37 -phy_rx_polarity_flip_phy37.BCM8887X=0 -phy_tx_polarity_flip_phy37.BCM8887X=1 -serdes_tx_taps_37.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 4 lane38 -lane_to_serdes_map_nif_lane38.BCM8887X=rx36:tx38 -phy_rx_polarity_flip_phy38.BCM8887X=0 -phy_tx_polarity_flip_phy38.BCM8887X=0 -serdes_tx_taps_38.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 4 lane39 -lane_to_serdes_map_nif_lane39.BCM8887X=rx38:tx32 -phy_rx_polarity_flip_phy39.BCM8887X=0 -phy_tx_polarity_flip_phy39.BCM8887X=1 -serdes_tx_taps_39.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - - -# ---------------------------------------------------------------------------------------------------- -# core_5 -# ---------------------------------------------------------------------------------------------------- -ucode_port_49.BCM8887X=CDGE4_10:core_1.9 -tm_port_header_type_out_49.BCM8887X=ETH -ucode_port_53.BCM8887X=CDGE4_11:core_1.13 -tm_port_header_type_out_53.BCM8887X=ETH - -# core 5 lane40 -lane_to_serdes_map_nif_lane40.BCM8887X=rx43:tx47 -phy_rx_polarity_flip_phy40.BCM8887X=1 -phy_tx_polarity_flip_phy40.BCM8887X=0 -serdes_tx_taps_40.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 5 lane41 -lane_to_serdes_map_nif_lane41.BCM8887X=rx42:tx43 -phy_rx_polarity_flip_phy41.BCM8887X=0 -phy_tx_polarity_flip_phy41.BCM8887X=0 -serdes_tx_taps_41.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 5 lane42 -lane_to_serdes_map_nif_lane42.BCM8887X=rx45:tx42 -phy_rx_polarity_flip_phy42.BCM8887X=1 -phy_tx_polarity_flip_phy42.BCM8887X=0 -serdes_tx_taps_42.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 5 lane43 -lane_to_serdes_map_nif_lane43.BCM8887X=rx47:tx41 -phy_rx_polarity_flip_phy43.BCM8887X=1 -phy_tx_polarity_flip_phy43.BCM8887X=1 -serdes_tx_taps_43.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 5 lane44 -lane_to_serdes_map_nif_lane44.BCM8887X=rx41:tx44 -phy_rx_polarity_flip_phy44.BCM8887X=1 -phy_tx_polarity_flip_phy44.BCM8887X=0 -serdes_tx_taps_44.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 5 lane45 -lane_to_serdes_map_nif_lane45.BCM8887X=rx40:tx45 -phy_rx_polarity_flip_phy45.BCM8887X=0 -phy_tx_polarity_flip_phy45.BCM8887X=1 -serdes_tx_taps_45.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 5 lane46 -lane_to_serdes_map_nif_lane46.BCM8887X=rx44:tx46 -phy_rx_polarity_flip_phy46.BCM8887X=0 -phy_tx_polarity_flip_phy46.BCM8887X=0 -serdes_tx_taps_46.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 5 lane47 -lane_to_serdes_map_nif_lane47.BCM8887X=rx46:tx40 -phy_rx_polarity_flip_phy47.BCM8887X=0 -phy_tx_polarity_flip_phy47.BCM8887X=1 -serdes_tx_taps_47.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - - -# ---------------------------------------------------------------------------------------------------- -# core_6 -# ---------------------------------------------------------------------------------------------------- -ucode_port_41.BCM8887X=CDGE4_12:core_1.17 -tm_port_header_type_out_41.BCM8887X=ETH -ucode_port_45.BCM8887X=CDGE4_13:core_1.21 -tm_port_header_type_out_45.BCM8887X=ETH - -# core 6 lane48 -lane_to_serdes_map_nif_lane48.BCM8887X=rx51:tx55 -phy_rx_polarity_flip_phy48.BCM8887X=1 -phy_tx_polarity_flip_phy48.BCM8887X=0 -serdes_tx_taps_48.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 6 lane49 -lane_to_serdes_map_nif_lane49.BCM8887X=rx50:tx51 -phy_rx_polarity_flip_phy49.BCM8887X=0 -phy_tx_polarity_flip_phy49.BCM8887X=0 -serdes_tx_taps_49.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 6 lane50 -lane_to_serdes_map_nif_lane50.BCM8887X=rx53:tx50 -phy_rx_polarity_flip_phy50.BCM8887X=1 -phy_tx_polarity_flip_phy50.BCM8887X=0 -serdes_tx_taps_50.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 6 lane51 -lane_to_serdes_map_nif_lane51.BCM8887X=rx55:tx49 -phy_rx_polarity_flip_phy51.BCM8887X=1 -phy_tx_polarity_flip_phy51.BCM8887X=1 -serdes_tx_taps_51.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 6 lane52 -lane_to_serdes_map_nif_lane52.BCM8887X=rx49:tx52 -phy_rx_polarity_flip_phy52.BCM8887X=1 -phy_tx_polarity_flip_phy52.BCM8887X=0 -serdes_tx_taps_52.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 6 lane53 -lane_to_serdes_map_nif_lane53.BCM8887X=rx48:tx53 -phy_rx_polarity_flip_phy53.BCM8887X=0 -phy_tx_polarity_flip_phy53.BCM8887X=1 -serdes_tx_taps_53.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 6 lane54 -lane_to_serdes_map_nif_lane54.BCM8887X=rx52:tx54 -phy_rx_polarity_flip_phy54.BCM8887X=0 -phy_tx_polarity_flip_phy54.BCM8887X=0 -serdes_tx_taps_54.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 6 lane55 -lane_to_serdes_map_nif_lane55.BCM8887X=rx54:tx48 -phy_rx_polarity_flip_phy55.BCM8887X=0 -phy_tx_polarity_flip_phy55.BCM8887X=1 -serdes_tx_taps_55.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - - -# ---------------------------------------------------------------------------------------------------- -# core_7 -# ---------------------------------------------------------------------------------------------------- -ucode_port_33.BCM8887X=CDGE4_14:core_1.25 -tm_port_header_type_out_33.BCM8887X=ETH -ucode_port_37.BCM8887X=CDGE4_15:core_1.29 -tm_port_header_type_out_37.BCM8887X=ETH - -# core 7 lane56 -lane_to_serdes_map_nif_lane56.BCM8887X=rx58:tx59 -phy_rx_polarity_flip_phy56.BCM8887X=1 -phy_tx_polarity_flip_phy56.BCM8887X=1 -serdes_tx_taps_56.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 7 lane57 -lane_to_serdes_map_nif_lane57.BCM8887X=rx59:tx61 -phy_rx_polarity_flip_phy57.BCM8887X=0 -phy_tx_polarity_flip_phy57.BCM8887X=1 -serdes_tx_taps_57.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 7 lane58 -lane_to_serdes_map_nif_lane58.BCM8887X=rx60:tx60 -phy_rx_polarity_flip_phy58.BCM8887X=0 -phy_tx_polarity_flip_phy58.BCM8887X=1 -serdes_tx_taps_58.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 7 lane59 -lane_to_serdes_map_nif_lane59.BCM8887X=rx62:tx56 -phy_rx_polarity_flip_phy59.BCM8887X=1 -phy_tx_polarity_flip_phy59.BCM8887X=1 -serdes_tx_taps_59.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 7 lane60 -lane_to_serdes_map_nif_lane60.BCM8887X=rx56:tx62 -phy_rx_polarity_flip_phy60.BCM8887X=0 -phy_tx_polarity_flip_phy60.BCM8887X=0 -serdes_tx_taps_60.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 7 lane61 -lane_to_serdes_map_nif_lane61.BCM8887X=rx57:tx58 -phy_rx_polarity_flip_phy61.BCM8887X=0 -phy_tx_polarity_flip_phy61.BCM8887X=0 -serdes_tx_taps_61.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 7 lane62 -lane_to_serdes_map_nif_lane62.BCM8887X=rx63:tx63 -phy_rx_polarity_flip_phy62.BCM8887X=0 -phy_tx_polarity_flip_phy62.BCM8887X=1 -serdes_tx_taps_62.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 7 lane63 -lane_to_serdes_map_nif_lane63.BCM8887X=rx61:tx57 -phy_rx_polarity_flip_phy63.BCM8887X=0 -phy_tx_polarity_flip_phy63.BCM8887X=1 -serdes_tx_taps_63.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - - -# ---------------------------------------------------------------------------------------------------- -# core_8 -# ---------------------------------------------------------------------------------------------------- -ucode_port_129.BCM8887X=CDGE4_16:core_2.1 -tm_port_header_type_out_129.BCM8887X=ETH -ucode_port_133.BCM8887X=CDGE4_17:core_2.5 -tm_port_header_type_out_133.BCM8887X=ETH - -# core 8 lane64 -lane_to_serdes_map_nif_lane64.BCM8887X=rx67:tx71 -phy_rx_polarity_flip_phy64.BCM8887X=0 -phy_tx_polarity_flip_phy64.BCM8887X=0 -serdes_tx_taps_64.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 8 lane65 -lane_to_serdes_map_nif_lane65.BCM8887X=rx66:tx65 -phy_rx_polarity_flip_phy65.BCM8887X=0 -phy_tx_polarity_flip_phy65.BCM8887X=1 -serdes_tx_taps_65.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 8 lane66 -lane_to_serdes_map_nif_lane66.BCM8887X=rx70:tx70 -phy_rx_polarity_flip_phy66.BCM8887X=1 -phy_tx_polarity_flip_phy66.BCM8887X=1 -serdes_tx_taps_66.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 8 lane67 -lane_to_serdes_map_nif_lane67.BCM8887X=rx68:tx66 -phy_rx_polarity_flip_phy67.BCM8887X=1 -phy_tx_polarity_flip_phy67.BCM8887X=0 -serdes_tx_taps_67.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 8 lane68 -lane_to_serdes_map_nif_lane68.BCM8887X=rx69:tx67 -phy_rx_polarity_flip_phy68.BCM8887X=0 -phy_tx_polarity_flip_phy68.BCM8887X=0 -serdes_tx_taps_68.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 8 lane69 -lane_to_serdes_map_nif_lane69.BCM8887X=rx71:tx69 -phy_rx_polarity_flip_phy69.BCM8887X=1 -phy_tx_polarity_flip_phy69.BCM8887X=1 -serdes_tx_taps_69.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 8 lane70 -lane_to_serdes_map_nif_lane70.BCM8887X=rx65:tx68 -phy_rx_polarity_flip_phy70.BCM8887X=0 -phy_tx_polarity_flip_phy70.BCM8887X=0 -serdes_tx_taps_70.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 8 lane71 -lane_to_serdes_map_nif_lane71.BCM8887X=rx64:tx64 -phy_rx_polarity_flip_phy71.BCM8887X=1 -phy_tx_polarity_flip_phy71.BCM8887X=1 -serdes_tx_taps_71.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - - -# ---------------------------------------------------------------------------------------------------- -# core_9 -# ---------------------------------------------------------------------------------------------------- -ucode_port_137.BCM8887X=CDGE4_18:core_2.9 -tm_port_header_type_out_137.BCM8887X=ETH -ucode_port_141.BCM8887X=CDGE4_19:core_2.13 -tm_port_header_type_out_141.BCM8887X=ETH - -# core 9 lane72 -lane_to_serdes_map_nif_lane72.BCM8887X=rx75:tx79 -phy_rx_polarity_flip_phy72.BCM8887X=0 -phy_tx_polarity_flip_phy72.BCM8887X=0 -serdes_tx_taps_72.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 9 lane73 -lane_to_serdes_map_nif_lane73.BCM8887X=rx74:tx73 -phy_rx_polarity_flip_phy73.BCM8887X=0 -phy_tx_polarity_flip_phy73.BCM8887X=1 -serdes_tx_taps_73.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 9 lane74 -lane_to_serdes_map_nif_lane74.BCM8887X=rx78:tx78 -phy_rx_polarity_flip_phy74.BCM8887X=1 -phy_tx_polarity_flip_phy74.BCM8887X=1 -serdes_tx_taps_74.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 9 lane75 -lane_to_serdes_map_nif_lane75.BCM8887X=rx76:tx74 -phy_rx_polarity_flip_phy75.BCM8887X=1 -phy_tx_polarity_flip_phy75.BCM8887X=0 -serdes_tx_taps_75.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 9 lane76 -lane_to_serdes_map_nif_lane76.BCM8887X=rx77:tx75 -phy_rx_polarity_flip_phy76.BCM8887X=0 -phy_tx_polarity_flip_phy76.BCM8887X=0 -serdes_tx_taps_76.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 9 lane77 -lane_to_serdes_map_nif_lane77.BCM8887X=rx79:tx77 -phy_rx_polarity_flip_phy77.BCM8887X=1 -phy_tx_polarity_flip_phy77.BCM8887X=1 -serdes_tx_taps_77.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 9 lane78 -lane_to_serdes_map_nif_lane78.BCM8887X=rx73:tx76 -phy_rx_polarity_flip_phy78.BCM8887X=0 -phy_tx_polarity_flip_phy78.BCM8887X=0 -serdes_tx_taps_78.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 9 lane79 -lane_to_serdes_map_nif_lane79.BCM8887X=rx72:tx72 -phy_rx_polarity_flip_phy79.BCM8887X=1 -phy_tx_polarity_flip_phy79.BCM8887X=1 -serdes_tx_taps_79.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - - -# ---------------------------------------------------------------------------------------------------- -# core_10 -# ---------------------------------------------------------------------------------------------------- -ucode_port_145.BCM8887X=CDGE4_20:core_2.17 -tm_port_header_type_out_145.BCM8887X=ETH -ucode_port_149.BCM8887X=CDGE4_21:core_2.21 -tm_port_header_type_out_149.BCM8887X=ETH - -# core 10 lane80 -lane_to_serdes_map_nif_lane80.BCM8887X=rx83:tx87 -phy_rx_polarity_flip_phy80.BCM8887X=0 -phy_tx_polarity_flip_phy80.BCM8887X=0 -serdes_tx_taps_80.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 10 lane81 -lane_to_serdes_map_nif_lane81.BCM8887X=rx82:tx81 -phy_rx_polarity_flip_phy81.BCM8887X=0 -phy_tx_polarity_flip_phy81.BCM8887X=1 -serdes_tx_taps_81.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 10 lane82 -lane_to_serdes_map_nif_lane82.BCM8887X=rx86:tx86 -phy_rx_polarity_flip_phy82.BCM8887X=1 -phy_tx_polarity_flip_phy82.BCM8887X=1 -serdes_tx_taps_82.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 10 lane83 -lane_to_serdes_map_nif_lane83.BCM8887X=rx84:tx82 -phy_rx_polarity_flip_phy83.BCM8887X=1 -phy_tx_polarity_flip_phy83.BCM8887X=0 -serdes_tx_taps_83.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 10 lane84 -lane_to_serdes_map_nif_lane84.BCM8887X=rx85:tx83 -phy_rx_polarity_flip_phy84.BCM8887X=0 -phy_tx_polarity_flip_phy84.BCM8887X=0 -serdes_tx_taps_84.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 10 lane85 -lane_to_serdes_map_nif_lane85.BCM8887X=rx87:tx85 -phy_rx_polarity_flip_phy85.BCM8887X=1 -phy_tx_polarity_flip_phy85.BCM8887X=1 -serdes_tx_taps_85.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 10 lane86 -lane_to_serdes_map_nif_lane86.BCM8887X=rx81:tx84 -phy_rx_polarity_flip_phy86.BCM8887X=0 -phy_tx_polarity_flip_phy86.BCM8887X=0 -serdes_tx_taps_86.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 10 lane87 -lane_to_serdes_map_nif_lane87.BCM8887X=rx80:tx80 -phy_rx_polarity_flip_phy87.BCM8887X=1 -phy_tx_polarity_flip_phy87.BCM8887X=1 -serdes_tx_taps_87.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - - -# ---------------------------------------------------------------------------------------------------- -# core_11 -# ---------------------------------------------------------------------------------------------------- -ucode_port_153.BCM8887X=CDGE4_22:core_2.25 -tm_port_header_type_out_153.BCM8887X=ETH -ucode_port_157.BCM8887X=CDGE4_23:core_2.29 -tm_port_header_type_out_157.BCM8887X=ETH - -# core 11 lane88 -lane_to_serdes_map_nif_lane88.BCM8887X=rx91:tx95 -phy_rx_polarity_flip_phy88.BCM8887X=0 -phy_tx_polarity_flip_phy88.BCM8887X=0 -serdes_tx_taps_88.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 11 lane89 -lane_to_serdes_map_nif_lane89.BCM8887X=rx90:tx89 -phy_rx_polarity_flip_phy89.BCM8887X=0 -phy_tx_polarity_flip_phy89.BCM8887X=1 -serdes_tx_taps_89.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 11 lane90 -lane_to_serdes_map_nif_lane90.BCM8887X=rx94:tx94 -phy_rx_polarity_flip_phy90.BCM8887X=1 -phy_tx_polarity_flip_phy90.BCM8887X=1 -serdes_tx_taps_90.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 11 lane91 -lane_to_serdes_map_nif_lane91.BCM8887X=rx92:tx90 -phy_rx_polarity_flip_phy91.BCM8887X=1 -phy_tx_polarity_flip_phy91.BCM8887X=0 -serdes_tx_taps_91.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 11 lane92 -lane_to_serdes_map_nif_lane92.BCM8887X=rx93:tx91 -phy_rx_polarity_flip_phy92.BCM8887X=0 -phy_tx_polarity_flip_phy92.BCM8887X=0 -serdes_tx_taps_92.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 11 lane93 -lane_to_serdes_map_nif_lane93.BCM8887X=rx95:tx93 -phy_rx_polarity_flip_phy93.BCM8887X=1 -phy_tx_polarity_flip_phy93.BCM8887X=1 -serdes_tx_taps_93.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 11 lane94 -lane_to_serdes_map_nif_lane94.BCM8887X=rx89:tx92 -phy_rx_polarity_flip_phy94.BCM8887X=0 -phy_tx_polarity_flip_phy94.BCM8887X=0 -serdes_tx_taps_94.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 11 lane95 -lane_to_serdes_map_nif_lane95.BCM8887X=rx88:tx88 -phy_rx_polarity_flip_phy95.BCM8887X=1 -phy_tx_polarity_flip_phy95.BCM8887X=1 -serdes_tx_taps_95.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - - -# ---------------------------------------------------------------------------------------------------- -# core_12 -# ---------------------------------------------------------------------------------------------------- -ucode_port_1.BCM8887X=CDGE4_24:core_3.1 -tm_port_header_type_out_1.BCM8887X=ETH -ucode_port_5.BCM8887X=CDGE4_25:core_3.5 -tm_port_header_type_out_5.BCM8887X=ETH - -# core 12 lane96 -lane_to_serdes_map_nif_lane96.BCM8887X=rx100:tx103 -phy_rx_polarity_flip_phy96.BCM8887X=1 -phy_tx_polarity_flip_phy96.BCM8887X=0 -serdes_tx_taps_96.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 12 lane97 -lane_to_serdes_map_nif_lane97.BCM8887X=rx96:tx98 -phy_rx_polarity_flip_phy97.BCM8887X=1 -phy_tx_polarity_flip_phy97.BCM8887X=1 -serdes_tx_taps_97.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 12 lane98 -lane_to_serdes_map_nif_lane98.BCM8887X=rx99:tx99 -phy_rx_polarity_flip_phy98.BCM8887X=0 -phy_tx_polarity_flip_phy98.BCM8887X=0 -serdes_tx_taps_98.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 12 lane99 -lane_to_serdes_map_nif_lane99.BCM8887X=rx101:tx97 -phy_rx_polarity_flip_phy99.BCM8887X=0 -phy_tx_polarity_flip_phy99.BCM8887X=0 -serdes_tx_taps_99.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 12 lane100 -lane_to_serdes_map_nif_lane100.BCM8887X=rx98:tx100 -phy_rx_polarity_flip_phy100.BCM8887X=1 -phy_tx_polarity_flip_phy100.BCM8887X=0 -serdes_tx_taps_100.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 12 lane101 -lane_to_serdes_map_nif_lane101.BCM8887X=rx103:tx96 -phy_rx_polarity_flip_phy101.BCM8887X=1 -phy_tx_polarity_flip_phy101.BCM8887X=0 -serdes_tx_taps_101.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 12 lane102 -lane_to_serdes_map_nif_lane102.BCM8887X=rx102:tx101 -phy_rx_polarity_flip_phy102.BCM8887X=0 -phy_tx_polarity_flip_phy102.BCM8887X=1 -serdes_tx_taps_102.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 12 lane103 -lane_to_serdes_map_nif_lane103.BCM8887X=rx97:tx102 -phy_rx_polarity_flip_phy103.BCM8887X=1 -phy_tx_polarity_flip_phy103.BCM8887X=1 -serdes_tx_taps_103.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - - -# ---------------------------------------------------------------------------------------------------- -# core_13 -# ---------------------------------------------------------------------------------------------------- -ucode_port_9.BCM8887X=CDGE4_26:core_3.9 -tm_port_header_type_out_9.BCM8887X=ETH -ucode_port_13.BCM8887X=CDGE4_27:core_3.13 -tm_port_header_type_out_13.BCM8887X=ETH - -# core 13 lane104 -lane_to_serdes_map_nif_lane104.BCM8887X=rx107:tx108 -phy_rx_polarity_flip_phy104.BCM8887X=1 -phy_tx_polarity_flip_phy104.BCM8887X=0 -serdes_tx_taps_104.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 13 lane105 -lane_to_serdes_map_nif_lane105.BCM8887X=rx106:tx107 -phy_rx_polarity_flip_phy105.BCM8887X=0 -phy_tx_polarity_flip_phy105.BCM8887X=1 -serdes_tx_taps_105.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 13 lane106 -lane_to_serdes_map_nif_lane106.BCM8887X=rx110:tx110 -phy_rx_polarity_flip_phy106.BCM8887X=0 -phy_tx_polarity_flip_phy106.BCM8887X=0 -serdes_tx_taps_106.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 13 lane107 -lane_to_serdes_map_nif_lane107.BCM8887X=rx108:tx109 -phy_rx_polarity_flip_phy107.BCM8887X=0 -phy_tx_polarity_flip_phy107.BCM8887X=1 -serdes_tx_taps_107.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 13 lane108 -lane_to_serdes_map_nif_lane108.BCM8887X=rx105:tx111 -phy_rx_polarity_flip_phy108.BCM8887X=1 -phy_tx_polarity_flip_phy108.BCM8887X=1 -serdes_tx_taps_108.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 13 lane109 -lane_to_serdes_map_nif_lane109.BCM8887X=rx104:tx104 -phy_rx_polarity_flip_phy109.BCM8887X=0 -phy_tx_polarity_flip_phy109.BCM8887X=0 -serdes_tx_taps_109.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 13 lane110 -lane_to_serdes_map_nif_lane110.BCM8887X=rx111:tx106 -phy_rx_polarity_flip_phy110.BCM8887X=1 -phy_tx_polarity_flip_phy110.BCM8887X=1 -serdes_tx_taps_110.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 13 lane111 -lane_to_serdes_map_nif_lane111.BCM8887X=rx109:tx105 -phy_rx_polarity_flip_phy111.BCM8887X=1 -phy_tx_polarity_flip_phy111.BCM8887X=1 -serdes_tx_taps_111.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - - -# ---------------------------------------------------------------------------------------------------- -# core_14 -# ---------------------------------------------------------------------------------------------------- -ucode_port_17.BCM8887X=CDGE4_28:core_3.17 -tm_port_header_type_out_17.BCM8887X=ETH -ucode_port_21.BCM8887X=CDGE4_29:core_3.21 -tm_port_header_type_out_21.BCM8887X=ETH - -# core 14 lane112 -lane_to_serdes_map_nif_lane112.BCM8887X=rx115:tx116 -phy_rx_polarity_flip_phy112.BCM8887X=1 -phy_tx_polarity_flip_phy112.BCM8887X=0 -serdes_tx_taps_112.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 14 lane113 -lane_to_serdes_map_nif_lane113.BCM8887X=rx114:tx115 -phy_rx_polarity_flip_phy113.BCM8887X=1 -phy_tx_polarity_flip_phy113.BCM8887X=1 -serdes_tx_taps_113.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 14 lane114 -lane_to_serdes_map_nif_lane114.BCM8887X=rx118:tx118 -phy_rx_polarity_flip_phy114.BCM8887X=0 -phy_tx_polarity_flip_phy114.BCM8887X=0 -serdes_tx_taps_114.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 14 lane115 -lane_to_serdes_map_nif_lane115.BCM8887X=rx116:tx117 -phy_rx_polarity_flip_phy115.BCM8887X=0 -phy_tx_polarity_flip_phy115.BCM8887X=1 -serdes_tx_taps_115.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 14 lane116 -lane_to_serdes_map_nif_lane116.BCM8887X=rx113:tx119 -phy_rx_polarity_flip_phy116.BCM8887X=1 -phy_tx_polarity_flip_phy116.BCM8887X=1 -serdes_tx_taps_116.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 14 lane117 -lane_to_serdes_map_nif_lane117.BCM8887X=rx112:tx112 -phy_rx_polarity_flip_phy117.BCM8887X=0 -phy_tx_polarity_flip_phy117.BCM8887X=0 -serdes_tx_taps_117.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 14 lane118 -lane_to_serdes_map_nif_lane118.BCM8887X=rx119:tx114 -phy_rx_polarity_flip_phy118.BCM8887X=1 -phy_tx_polarity_flip_phy118.BCM8887X=1 -serdes_tx_taps_118.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 14 lane119 -lane_to_serdes_map_nif_lane119.BCM8887X=rx117:tx113 -phy_rx_polarity_flip_phy119.BCM8887X=1 -phy_tx_polarity_flip_phy119.BCM8887X=1 -serdes_tx_taps_119.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - - -# ---------------------------------------------------------------------------------------------------- -# core_15 -# ---------------------------------------------------------------------------------------------------- -ucode_port_25.BCM8887X=CDGE4_30:core_3.25 -tm_port_header_type_out_25.BCM8887X=ETH -ucode_port_29.BCM8887X=CDGE4_31:core_3.29 -tm_port_header_type_out_29.BCM8887X=ETH - -# core 15 lane120 -lane_to_serdes_map_nif_lane120.BCM8887X=rx123:tx124 -phy_rx_polarity_flip_phy120.BCM8887X=1 -phy_tx_polarity_flip_phy120.BCM8887X=0 -serdes_tx_taps_120.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 15 lane121 -lane_to_serdes_map_nif_lane121.BCM8887X=rx122:tx123 -phy_rx_polarity_flip_phy121.BCM8887X=1 -phy_tx_polarity_flip_phy121.BCM8887X=1 -serdes_tx_taps_121.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 15 lane122 -lane_to_serdes_map_nif_lane122.BCM8887X=rx126:tx126 -phy_rx_polarity_flip_phy122.BCM8887X=0 -phy_tx_polarity_flip_phy122.BCM8887X=0 -serdes_tx_taps_122.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 15 lane123 -lane_to_serdes_map_nif_lane123.BCM8887X=rx124:tx125 -phy_rx_polarity_flip_phy123.BCM8887X=0 -phy_tx_polarity_flip_phy123.BCM8887X=1 -serdes_tx_taps_123.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 15 lane124 -lane_to_serdes_map_nif_lane124.BCM8887X=rx121:tx127 -phy_rx_polarity_flip_phy124.BCM8887X=1 -phy_tx_polarity_flip_phy124.BCM8887X=1 -serdes_tx_taps_124.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 15 lane125 -lane_to_serdes_map_nif_lane125.BCM8887X=rx120:tx120 -phy_rx_polarity_flip_phy125.BCM8887X=0 -phy_tx_polarity_flip_phy125.BCM8887X=0 -serdes_tx_taps_125.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 15 lane126 -lane_to_serdes_map_nif_lane126.BCM8887X=rx127:tx122 -phy_rx_polarity_flip_phy126.BCM8887X=1 -phy_tx_polarity_flip_phy126.BCM8887X=1 -serdes_tx_taps_126.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 15 lane127 -lane_to_serdes_map_nif_lane127.BCM8887X=rx125:tx121 -phy_rx_polarity_flip_phy127.BCM8887X=1 -phy_tx_polarity_flip_phy127.BCM8887X=1 -serdes_tx_taps_127.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - - -# ---------------------------------------------------------------------------------------------------- -# core_16 -# ---------------------------------------------------------------------------------------------------- -ucode_port_65.BCM8887X=CDGE4_32:core_4.1 -tm_port_header_type_out_65.BCM8887X=ETH -ucode_port_69.BCM8887X=CDGE4_33:core_4.5 -tm_port_header_type_out_69.BCM8887X=ETH - -# core 16 lane128 -lane_to_serdes_map_nif_lane128.BCM8887X=rx131:tx135 -phy_rx_polarity_flip_phy128.BCM8887X=0 -phy_tx_polarity_flip_phy128.BCM8887X=0 -serdes_tx_taps_128.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 16 lane129 -lane_to_serdes_map_nif_lane129.BCM8887X=rx130:tx131 -phy_rx_polarity_flip_phy129.BCM8887X=0 -phy_tx_polarity_flip_phy129.BCM8887X=1 -serdes_tx_taps_129.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 16 lane130 -lane_to_serdes_map_nif_lane130.BCM8887X=rx129:tx129 -phy_rx_polarity_flip_phy130.BCM8887X=1 -phy_tx_polarity_flip_phy130.BCM8887X=1 -serdes_tx_taps_130.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 16 lane131 -lane_to_serdes_map_nif_lane131.BCM8887X=rx128:tx130 -phy_rx_polarity_flip_phy131.BCM8887X=0 -phy_tx_polarity_flip_phy131.BCM8887X=1 -serdes_tx_taps_131.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 16 lane132 -lane_to_serdes_map_nif_lane132.BCM8887X=rx133:tx132 -phy_rx_polarity_flip_phy132.BCM8887X=1 -phy_tx_polarity_flip_phy132.BCM8887X=1 -serdes_tx_taps_132.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 16 lane133 -lane_to_serdes_map_nif_lane133.BCM8887X=rx135:tx133 -phy_rx_polarity_flip_phy133.BCM8887X=0 -phy_tx_polarity_flip_phy133.BCM8887X=0 -serdes_tx_taps_133.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 16 lane134 -lane_to_serdes_map_nif_lane134.BCM8887X=rx132:tx128 -phy_rx_polarity_flip_phy134.BCM8887X=1 -phy_tx_polarity_flip_phy134.BCM8887X=1 -serdes_tx_taps_134.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 16 lane135 -lane_to_serdes_map_nif_lane135.BCM8887X=rx134:tx134 -phy_rx_polarity_flip_phy135.BCM8887X=0 -phy_tx_polarity_flip_phy135.BCM8887X=1 -serdes_tx_taps_135.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - - -# ---------------------------------------------------------------------------------------------------- -# core_17 -# ---------------------------------------------------------------------------------------------------- -ucode_port_73.BCM8887X=CDGE4_34:core_4.9 -tm_port_header_type_out_73.BCM8887X=ETH -ucode_port_77.BCM8887X=CDGE4_35:core_4.13 -tm_port_header_type_out_77.BCM8887X=ETH - -# core 17 lane136 -lane_to_serdes_map_nif_lane136.BCM8887X=rx139:tx143 -phy_rx_polarity_flip_phy136.BCM8887X=0 -phy_tx_polarity_flip_phy136.BCM8887X=0 -serdes_tx_taps_136.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 17 lane137 -lane_to_serdes_map_nif_lane137.BCM8887X=rx138:tx139 -phy_rx_polarity_flip_phy137.BCM8887X=0 -phy_tx_polarity_flip_phy137.BCM8887X=1 -serdes_tx_taps_137.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 17 lane138 -lane_to_serdes_map_nif_lane138.BCM8887X=rx137:tx137 -phy_rx_polarity_flip_phy138.BCM8887X=1 -phy_tx_polarity_flip_phy138.BCM8887X=1 -serdes_tx_taps_138.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 17 lane139 -lane_to_serdes_map_nif_lane139.BCM8887X=rx136:tx138 -phy_rx_polarity_flip_phy139.BCM8887X=1 -phy_tx_polarity_flip_phy139.BCM8887X=1 -serdes_tx_taps_139.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 17 lane140 -lane_to_serdes_map_nif_lane140.BCM8887X=rx141:tx140 -phy_rx_polarity_flip_phy140.BCM8887X=1 -phy_tx_polarity_flip_phy140.BCM8887X=1 -serdes_tx_taps_140.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 17 lane141 -lane_to_serdes_map_nif_lane141.BCM8887X=rx143:tx141 -phy_rx_polarity_flip_phy141.BCM8887X=0 -phy_tx_polarity_flip_phy141.BCM8887X=0 -serdes_tx_taps_141.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 17 lane142 -lane_to_serdes_map_nif_lane142.BCM8887X=rx140:tx136 -phy_rx_polarity_flip_phy142.BCM8887X=1 -phy_tx_polarity_flip_phy142.BCM8887X=1 -serdes_tx_taps_142.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 17 lane143 -lane_to_serdes_map_nif_lane143.BCM8887X=rx142:tx142 -phy_rx_polarity_flip_phy143.BCM8887X=0 -phy_tx_polarity_flip_phy143.BCM8887X=1 -serdes_tx_taps_143.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - - -# ---------------------------------------------------------------------------------------------------- -# core_18 -# ---------------------------------------------------------------------------------------------------- -ucode_port_81.BCM8887X=CDGE4_36:core_4.17 -tm_port_header_type_out_81.BCM8887X=ETH -ucode_port_85.BCM8887X=CDGE4_37:core_4.21 -tm_port_header_type_out_85.BCM8887X=ETH - -# core 18 lane144 -lane_to_serdes_map_nif_lane144.BCM8887X=rx147:tx151 -phy_rx_polarity_flip_phy144.BCM8887X=0 -phy_tx_polarity_flip_phy144.BCM8887X=0 -serdes_tx_taps_144.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 18 lane145 -lane_to_serdes_map_nif_lane145.BCM8887X=rx146:tx147 -phy_rx_polarity_flip_phy145.BCM8887X=0 -phy_tx_polarity_flip_phy145.BCM8887X=1 -serdes_tx_taps_145.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 18 lane146 -lane_to_serdes_map_nif_lane146.BCM8887X=rx145:tx145 -phy_rx_polarity_flip_phy146.BCM8887X=1 -phy_tx_polarity_flip_phy146.BCM8887X=1 -serdes_tx_taps_146.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 18 lane147 -lane_to_serdes_map_nif_lane147.BCM8887X=rx144:tx146 -phy_rx_polarity_flip_phy147.BCM8887X=0 -phy_tx_polarity_flip_phy147.BCM8887X=1 -serdes_tx_taps_147.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 18 lane148 -lane_to_serdes_map_nif_lane148.BCM8887X=rx149:tx148 -phy_rx_polarity_flip_phy148.BCM8887X=1 -phy_tx_polarity_flip_phy148.BCM8887X=1 -serdes_tx_taps_148.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 18 lane149 -lane_to_serdes_map_nif_lane149.BCM8887X=rx151:tx149 -phy_rx_polarity_flip_phy149.BCM8887X=0 -phy_tx_polarity_flip_phy149.BCM8887X=0 -serdes_tx_taps_149.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 18 lane150 -lane_to_serdes_map_nif_lane150.BCM8887X=rx148:tx144 -phy_rx_polarity_flip_phy150.BCM8887X=1 -phy_tx_polarity_flip_phy150.BCM8887X=1 -serdes_tx_taps_150.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 18 lane151 -lane_to_serdes_map_nif_lane151.BCM8887X=rx150:tx150 -phy_rx_polarity_flip_phy151.BCM8887X=0 -phy_tx_polarity_flip_phy151.BCM8887X=1 -serdes_tx_taps_151.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - - -# ---------------------------------------------------------------------------------------------------- -# core_19 -# ---------------------------------------------------------------------------------------------------- -ucode_port_89.BCM8887X=CDGE4_38:core_4.25 -tm_port_header_type_out_89.BCM8887X=ETH -ucode_port_93.BCM8887X=CDGE4_39:core_4.29 -tm_port_header_type_out_93.BCM8887X=ETH - -# core 19 lane152 -lane_to_serdes_map_nif_lane152.BCM8887X=rx155:tx156 -phy_rx_polarity_flip_phy152.BCM8887X=0 -phy_tx_polarity_flip_phy152.BCM8887X=1 -serdes_tx_taps_152.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 19 lane153 -lane_to_serdes_map_nif_lane153.BCM8887X=rx154:tx155 -phy_rx_polarity_flip_phy153.BCM8887X=0 -phy_tx_polarity_flip_phy153.BCM8887X=0 -serdes_tx_taps_153.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 19 lane154 -lane_to_serdes_map_nif_lane154.BCM8887X=rx158:tx158 -phy_rx_polarity_flip_phy154.BCM8887X=1 -phy_tx_polarity_flip_phy154.BCM8887X=1 -serdes_tx_taps_154.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 19 lane155 -lane_to_serdes_map_nif_lane155.BCM8887X=rx156:tx157 -phy_rx_polarity_flip_phy155.BCM8887X=1 -phy_tx_polarity_flip_phy155.BCM8887X=0 -serdes_tx_taps_155.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 19 lane156 -lane_to_serdes_map_nif_lane156.BCM8887X=rx153:tx159 -phy_rx_polarity_flip_phy156.BCM8887X=0 -phy_tx_polarity_flip_phy156.BCM8887X=0 -serdes_tx_taps_156.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 19 lane157 -lane_to_serdes_map_nif_lane157.BCM8887X=rx152:tx152 -phy_rx_polarity_flip_phy157.BCM8887X=1 -phy_tx_polarity_flip_phy157.BCM8887X=1 -serdes_tx_taps_157.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 19 lane158 -lane_to_serdes_map_nif_lane158.BCM8887X=rx159:tx154 -phy_rx_polarity_flip_phy158.BCM8887X=0 -phy_tx_polarity_flip_phy158.BCM8887X=0 -serdes_tx_taps_158.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 19 lane159 -lane_to_serdes_map_nif_lane159.BCM8887X=rx157:tx153 -phy_rx_polarity_flip_phy159.BCM8887X=0 -phy_tx_polarity_flip_phy159.BCM8887X=0 -serdes_tx_taps_159.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - - -# ---------------------------------------------------------------------------------------------------- -# core_20 -# ---------------------------------------------------------------------------------------------------- -ucode_port_193.BCM8887X=CDGE4_40:core_5.1 -tm_port_header_type_out_193.BCM8887X=ETH -ucode_port_197.BCM8887X=CDGE4_41:core_5.5 -tm_port_header_type_out_197.BCM8887X=ETH - -# core 20 lane160 -lane_to_serdes_map_nif_lane160.BCM8887X=rx166:tx167 -phy_rx_polarity_flip_phy160.BCM8887X=0 -phy_tx_polarity_flip_phy160.BCM8887X=1 -serdes_tx_taps_160.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 20 lane161 -lane_to_serdes_map_nif_lane161.BCM8887X=rx164:tx163 -phy_rx_polarity_flip_phy161.BCM8887X=1 -phy_tx_polarity_flip_phy161.BCM8887X=0 -serdes_tx_taps_161.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 20 lane162 -lane_to_serdes_map_nif_lane162.BCM8887X=rx160:tx162 -phy_rx_polarity_flip_phy162.BCM8887X=0 -phy_tx_polarity_flip_phy162.BCM8887X=1 -serdes_tx_taps_162.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 20 lane163 -lane_to_serdes_map_nif_lane163.BCM8887X=rx161:tx161 -phy_rx_polarity_flip_phy163.BCM8887X=0 -phy_tx_polarity_flip_phy163.BCM8887X=1 -serdes_tx_taps_163.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 20 lane164 -lane_to_serdes_map_nif_lane164.BCM8887X=rx162:tx166 -phy_rx_polarity_flip_phy164.BCM8887X=0 -phy_tx_polarity_flip_phy164.BCM8887X=1 -serdes_tx_taps_164.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 20 lane165 -lane_to_serdes_map_nif_lane165.BCM8887X=rx163:tx160 -phy_rx_polarity_flip_phy165.BCM8887X=0 -phy_tx_polarity_flip_phy165.BCM8887X=1 -serdes_tx_taps_165.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 20 lane166 -lane_to_serdes_map_nif_lane166.BCM8887X=rx167:tx164 -phy_rx_polarity_flip_phy166.BCM8887X=1 -phy_tx_polarity_flip_phy166.BCM8887X=1 -serdes_tx_taps_166.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 20 lane167 -lane_to_serdes_map_nif_lane167.BCM8887X=rx165:tx165 -phy_rx_polarity_flip_phy167.BCM8887X=0 -phy_tx_polarity_flip_phy167.BCM8887X=1 -serdes_tx_taps_167.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - - -# ---------------------------------------------------------------------------------------------------- -# core_21 -# ---------------------------------------------------------------------------------------------------- -ucode_port_201.BCM8887X=CDGE4_42:core_5.9 -tm_port_header_type_out_201.BCM8887X=ETH -ucode_port_205.BCM8887X=CDGE4_43:core_5.13 -tm_port_header_type_out_205.BCM8887X=ETH - -# core 21 lane168 -lane_to_serdes_map_nif_lane168.BCM8887X=rx170:tx174 -phy_rx_polarity_flip_phy168.BCM8887X=0 -phy_tx_polarity_flip_phy168.BCM8887X=1 -serdes_tx_taps_168.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 21 lane169 -lane_to_serdes_map_nif_lane169.BCM8887X=rx171:tx168 -phy_rx_polarity_flip_phy169.BCM8887X=0 -phy_tx_polarity_flip_phy169.BCM8887X=1 -serdes_tx_taps_169.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 21 lane170 -lane_to_serdes_map_nif_lane170.BCM8887X=rx175:tx172 -phy_rx_polarity_flip_phy170.BCM8887X=1 -phy_tx_polarity_flip_phy170.BCM8887X=1 -serdes_tx_taps_170.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 21 lane171 -lane_to_serdes_map_nif_lane171.BCM8887X=rx173:tx173 -phy_rx_polarity_flip_phy171.BCM8887X=0 -phy_tx_polarity_flip_phy171.BCM8887X=1 -serdes_tx_taps_171.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 21 lane172 -lane_to_serdes_map_nif_lane172.BCM8887X=rx174:tx175 -phy_rx_polarity_flip_phy172.BCM8887X=0 -phy_tx_polarity_flip_phy172.BCM8887X=1 -serdes_tx_taps_172.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 21 lane173 -lane_to_serdes_map_nif_lane173.BCM8887X=rx172:tx171 -phy_rx_polarity_flip_phy173.BCM8887X=1 -phy_tx_polarity_flip_phy173.BCM8887X=0 -serdes_tx_taps_173.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 21 lane174 -lane_to_serdes_map_nif_lane174.BCM8887X=rx168:tx170 -phy_rx_polarity_flip_phy174.BCM8887X=0 -phy_tx_polarity_flip_phy174.BCM8887X=1 -serdes_tx_taps_174.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 21 lane175 -lane_to_serdes_map_nif_lane175.BCM8887X=rx169:tx169 -phy_rx_polarity_flip_phy175.BCM8887X=0 -phy_tx_polarity_flip_phy175.BCM8887X=1 -serdes_tx_taps_175.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - - -# ---------------------------------------------------------------------------------------------------- -# core_22 -# ---------------------------------------------------------------------------------------------------- -ucode_port_209.BCM8887X=CDGE4_44:core_5.17 -tm_port_header_type_out_209.BCM8887X=ETH -ucode_port_213.BCM8887X=CDGE4_45:core_5.21 -tm_port_header_type_out_213.BCM8887X=ETH - -# core 22 lane176 -lane_to_serdes_map_nif_lane176.BCM8887X=rx178:tx182 -phy_rx_polarity_flip_phy176.BCM8887X=0 -phy_tx_polarity_flip_phy176.BCM8887X=1 -serdes_tx_taps_176.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 22 lane177 -lane_to_serdes_map_nif_lane177.BCM8887X=rx179:tx176 -phy_rx_polarity_flip_phy177.BCM8887X=0 -phy_tx_polarity_flip_phy177.BCM8887X=1 -serdes_tx_taps_177.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 22 lane178 -lane_to_serdes_map_nif_lane178.BCM8887X=rx183:tx180 -phy_rx_polarity_flip_phy178.BCM8887X=1 -phy_tx_polarity_flip_phy178.BCM8887X=1 -serdes_tx_taps_178.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 22 lane179 -lane_to_serdes_map_nif_lane179.BCM8887X=rx181:tx181 -phy_rx_polarity_flip_phy179.BCM8887X=0 -phy_tx_polarity_flip_phy179.BCM8887X=1 -serdes_tx_taps_179.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 22 lane180 -lane_to_serdes_map_nif_lane180.BCM8887X=rx182:tx183 -phy_rx_polarity_flip_phy180.BCM8887X=0 -phy_tx_polarity_flip_phy180.BCM8887X=1 -serdes_tx_taps_180.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 22 lane181 -lane_to_serdes_map_nif_lane181.BCM8887X=rx180:tx179 -phy_rx_polarity_flip_phy181.BCM8887X=1 -phy_tx_polarity_flip_phy181.BCM8887X=0 -serdes_tx_taps_181.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 22 lane182 -lane_to_serdes_map_nif_lane182.BCM8887X=rx176:tx178 -phy_rx_polarity_flip_phy182.BCM8887X=0 -phy_tx_polarity_flip_phy182.BCM8887X=1 -serdes_tx_taps_182.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 22 lane183 -lane_to_serdes_map_nif_lane183.BCM8887X=rx177:tx177 -phy_rx_polarity_flip_phy183.BCM8887X=0 -phy_tx_polarity_flip_phy183.BCM8887X=1 -serdes_tx_taps_183.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - - -# ---------------------------------------------------------------------------------------------------- -# core_23 -# ---------------------------------------------------------------------------------------------------- -ucode_port_217.BCM8887X=CDGE4_46:core_5.25 -tm_port_header_type_out_217.BCM8887X=ETH -ucode_port_221.BCM8887X=CDGE4_47:core_5.29 -tm_port_header_type_out_221.BCM8887X=ETH - -# core 23 lane184 -lane_to_serdes_map_nif_lane184.BCM8887X=rx187:tx191 -phy_rx_polarity_flip_phy184.BCM8887X=1 -phy_tx_polarity_flip_phy184.BCM8887X=1 -serdes_tx_taps_184.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 23 lane185 -lane_to_serdes_map_nif_lane185.BCM8887X=rx186:tx185 -phy_rx_polarity_flip_phy185.BCM8887X=1 -phy_tx_polarity_flip_phy185.BCM8887X=0 -serdes_tx_taps_185.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 23 lane186 -lane_to_serdes_map_nif_lane186.BCM8887X=rx190:tx190 -phy_rx_polarity_flip_phy186.BCM8887X=0 -phy_tx_polarity_flip_phy186.BCM8887X=0 -serdes_tx_taps_186.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 23 lane187 -lane_to_serdes_map_nif_lane187.BCM8887X=rx188:tx186 -phy_rx_polarity_flip_phy187.BCM8887X=0 -phy_tx_polarity_flip_phy187.BCM8887X=1 -serdes_tx_taps_187.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 23 lane188 -lane_to_serdes_map_nif_lane188.BCM8887X=rx189:tx187 -phy_rx_polarity_flip_phy188.BCM8887X=1 -phy_tx_polarity_flip_phy188.BCM8887X=1 -serdes_tx_taps_188.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 23 lane189 -lane_to_serdes_map_nif_lane189.BCM8887X=rx191:tx189 -phy_rx_polarity_flip_phy189.BCM8887X=0 -phy_tx_polarity_flip_phy189.BCM8887X=0 -serdes_tx_taps_189.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 23 lane190 -lane_to_serdes_map_nif_lane190.BCM8887X=rx185:tx188 -phy_rx_polarity_flip_phy190.BCM8887X=1 -phy_tx_polarity_flip_phy190.BCM8887X=1 -serdes_tx_taps_190.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 23 lane191 -lane_to_serdes_map_nif_lane191.BCM8887X=rx184:tx184 -phy_rx_polarity_flip_phy191.BCM8887X=0 -phy_tx_polarity_flip_phy191.BCM8887X=0 -serdes_tx_taps_191.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - - -# ---------------------------------------------------------------------------------------------------- -# core_24 -# ---------------------------------------------------------------------------------------------------- -ucode_port_121.BCM8887X=CDGE4_48:core_6.1 -tm_port_header_type_out_121.BCM8887X=ETH -ucode_port_125.BCM8887X=CDGE4_49:core_6.5 -tm_port_header_type_out_125.BCM8887X=ETH - -# core 24 lane192 -lane_to_serdes_map_nif_lane192.BCM8887X=rx194:tx195 -phy_rx_polarity_flip_phy192.BCM8887X=0 -phy_tx_polarity_flip_phy192.BCM8887X=0 -serdes_tx_taps_192.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 24 lane193 -lane_to_serdes_map_nif_lane193.BCM8887X=rx195:tx197 -phy_rx_polarity_flip_phy193.BCM8887X=1 -phy_tx_polarity_flip_phy193.BCM8887X=0 -serdes_tx_taps_193.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 24 lane194 -lane_to_serdes_map_nif_lane194.BCM8887X=rx196:tx196 -phy_rx_polarity_flip_phy194.BCM8887X=1 -phy_tx_polarity_flip_phy194.BCM8887X=0 -serdes_tx_taps_194.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 24 lane195 -lane_to_serdes_map_nif_lane195.BCM8887X=rx198:tx192 -phy_rx_polarity_flip_phy195.BCM8887X=0 -phy_tx_polarity_flip_phy195.BCM8887X=0 -serdes_tx_taps_195.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 24 lane196 -lane_to_serdes_map_nif_lane196.BCM8887X=rx192:tx198 -phy_rx_polarity_flip_phy196.BCM8887X=1 -phy_tx_polarity_flip_phy196.BCM8887X=1 -serdes_tx_taps_196.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 24 lane197 -lane_to_serdes_map_nif_lane197.BCM8887X=rx193:tx194 -phy_rx_polarity_flip_phy197.BCM8887X=0 -phy_tx_polarity_flip_phy197.BCM8887X=1 -serdes_tx_taps_197.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 24 lane198 -lane_to_serdes_map_nif_lane198.BCM8887X=rx199:tx199 -phy_rx_polarity_flip_phy198.BCM8887X=1 -phy_tx_polarity_flip_phy198.BCM8887X=0 -serdes_tx_taps_198.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 24 lane199 -lane_to_serdes_map_nif_lane199.BCM8887X=rx197:tx193 -phy_rx_polarity_flip_phy199.BCM8887X=1 -phy_tx_polarity_flip_phy199.BCM8887X=0 -serdes_tx_taps_199.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - - -# ---------------------------------------------------------------------------------------------------- -# core_25 -# ---------------------------------------------------------------------------------------------------- -ucode_port_113.BCM8887X=CDGE4_50:core_6.9 -tm_port_header_type_out_113.BCM8887X=ETH -ucode_port_117.BCM8887X=CDGE4_51:core_6.13 -tm_port_header_type_out_117.BCM8887X=ETH - -# core 25 lane200 -lane_to_serdes_map_nif_lane200.BCM8887X=rx202:tx203 -phy_rx_polarity_flip_phy200.BCM8887X=0 -phy_tx_polarity_flip_phy200.BCM8887X=0 -serdes_tx_taps_200.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 25 lane201 -lane_to_serdes_map_nif_lane201.BCM8887X=rx203:tx205 -phy_rx_polarity_flip_phy201.BCM8887X=1 -phy_tx_polarity_flip_phy201.BCM8887X=0 -serdes_tx_taps_201.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 25 lane202 -lane_to_serdes_map_nif_lane202.BCM8887X=rx204:tx204 -phy_rx_polarity_flip_phy202.BCM8887X=1 -phy_tx_polarity_flip_phy202.BCM8887X=0 -serdes_tx_taps_202.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 25 lane203 -lane_to_serdes_map_nif_lane203.BCM8887X=rx206:tx200 -phy_rx_polarity_flip_phy203.BCM8887X=0 -phy_tx_polarity_flip_phy203.BCM8887X=0 -serdes_tx_taps_203.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 25 lane204 -lane_to_serdes_map_nif_lane204.BCM8887X=rx200:tx206 -phy_rx_polarity_flip_phy204.BCM8887X=1 -phy_tx_polarity_flip_phy204.BCM8887X=1 -serdes_tx_taps_204.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 25 lane205 -lane_to_serdes_map_nif_lane205.BCM8887X=rx201:tx202 -phy_rx_polarity_flip_phy205.BCM8887X=1 -phy_tx_polarity_flip_phy205.BCM8887X=1 -serdes_tx_taps_205.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 25 lane206 -lane_to_serdes_map_nif_lane206.BCM8887X=rx207:tx207 -phy_rx_polarity_flip_phy206.BCM8887X=1 -phy_tx_polarity_flip_phy206.BCM8887X=0 -serdes_tx_taps_206.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 25 lane207 -lane_to_serdes_map_nif_lane207.BCM8887X=rx205:tx201 -phy_rx_polarity_flip_phy207.BCM8887X=1 -phy_tx_polarity_flip_phy207.BCM8887X=0 -serdes_tx_taps_207.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - - -# ---------------------------------------------------------------------------------------------------- -# core_26 -# ---------------------------------------------------------------------------------------------------- -ucode_port_105.BCM8887X=CDGE4_52:core_6.17 -tm_port_header_type_out_105.BCM8887X=ETH -ucode_port_109.BCM8887X=CDGE4_53:core_6.21 -tm_port_header_type_out_109.BCM8887X=ETH - -# core 26 lane208 -lane_to_serdes_map_nif_lane208.BCM8887X=rx210:tx211 -phy_rx_polarity_flip_phy208.BCM8887X=0 -phy_tx_polarity_flip_phy208.BCM8887X=0 -serdes_tx_taps_208.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 26 lane209 -lane_to_serdes_map_nif_lane209.BCM8887X=rx211:tx213 -phy_rx_polarity_flip_phy209.BCM8887X=1 -phy_tx_polarity_flip_phy209.BCM8887X=0 -serdes_tx_taps_209.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 26 lane210 -lane_to_serdes_map_nif_lane210.BCM8887X=rx212:tx212 -phy_rx_polarity_flip_phy210.BCM8887X=1 -phy_tx_polarity_flip_phy210.BCM8887X=0 -serdes_tx_taps_210.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 26 lane211 -lane_to_serdes_map_nif_lane211.BCM8887X=rx214:tx208 -phy_rx_polarity_flip_phy211.BCM8887X=0 -phy_tx_polarity_flip_phy211.BCM8887X=0 -serdes_tx_taps_211.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 26 lane212 -lane_to_serdes_map_nif_lane212.BCM8887X=rx208:tx214 -phy_rx_polarity_flip_phy212.BCM8887X=1 -phy_tx_polarity_flip_phy212.BCM8887X=1 -serdes_tx_taps_212.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 26 lane213 -lane_to_serdes_map_nif_lane213.BCM8887X=rx209:tx210 -phy_rx_polarity_flip_phy213.BCM8887X=1 -phy_tx_polarity_flip_phy213.BCM8887X=1 -serdes_tx_taps_213.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 26 lane214 -lane_to_serdes_map_nif_lane214.BCM8887X=rx215:tx215 -phy_rx_polarity_flip_phy214.BCM8887X=1 -phy_tx_polarity_flip_phy214.BCM8887X=0 -serdes_tx_taps_214.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 26 lane215 -lane_to_serdes_map_nif_lane215.BCM8887X=rx213:tx209 -phy_rx_polarity_flip_phy215.BCM8887X=1 -phy_tx_polarity_flip_phy215.BCM8887X=0 -serdes_tx_taps_215.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - - -# ---------------------------------------------------------------------------------------------------- -# core_27 -# ---------------------------------------------------------------------------------------------------- -ucode_port_97.BCM8887X=CDGE4_54:core_6.25 -tm_port_header_type_out_97.BCM8887X=ETH -ucode_port_101.BCM8887X=CDGE4_55:core_6.29 -tm_port_header_type_out_101.BCM8887X=ETH - -# core 27 lane216 -lane_to_serdes_map_nif_lane216.BCM8887X=rx218:tx219 -phy_rx_polarity_flip_phy216.BCM8887X=0 -phy_tx_polarity_flip_phy216.BCM8887X=0 -serdes_tx_taps_216.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 27 lane217 -lane_to_serdes_map_nif_lane217.BCM8887X=rx219:tx221 -phy_rx_polarity_flip_phy217.BCM8887X=1 -phy_tx_polarity_flip_phy217.BCM8887X=0 -serdes_tx_taps_217.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 27 lane218 -lane_to_serdes_map_nif_lane218.BCM8887X=rx220:tx220 -phy_rx_polarity_flip_phy218.BCM8887X=1 -phy_tx_polarity_flip_phy218.BCM8887X=0 -serdes_tx_taps_218.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 27 lane219 -lane_to_serdes_map_nif_lane219.BCM8887X=rx222:tx216 -phy_rx_polarity_flip_phy219.BCM8887X=0 -phy_tx_polarity_flip_phy219.BCM8887X=0 -serdes_tx_taps_219.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 27 lane220 -lane_to_serdes_map_nif_lane220.BCM8887X=rx216:tx222 -phy_rx_polarity_flip_phy220.BCM8887X=1 -phy_tx_polarity_flip_phy220.BCM8887X=1 -serdes_tx_taps_220.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 27 lane221 -lane_to_serdes_map_nif_lane221.BCM8887X=rx217:tx218 -phy_rx_polarity_flip_phy221.BCM8887X=1 -phy_tx_polarity_flip_phy221.BCM8887X=1 -serdes_tx_taps_221.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 27 lane222 -lane_to_serdes_map_nif_lane222.BCM8887X=rx223:tx223 -phy_rx_polarity_flip_phy222.BCM8887X=1 -phy_tx_polarity_flip_phy222.BCM8887X=0 -serdes_tx_taps_222.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 27 lane223 -lane_to_serdes_map_nif_lane223.BCM8887X=rx221:tx217 -phy_rx_polarity_flip_phy223.BCM8887X=1 -phy_tx_polarity_flip_phy223.BCM8887X=0 -serdes_tx_taps_223.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - - -# ---------------------------------------------------------------------------------------------------- -# core_28 -# ---------------------------------------------------------------------------------------------------- -ucode_port_249.BCM8887X=CDGE4_56:core_7.1 -tm_port_header_type_out_249.BCM8887X=ETH -ucode_port_253.BCM8887X=CDGE4_57:core_7.5 -tm_port_header_type_out_253.BCM8887X=ETH - -# core 28 lane224 -lane_to_serdes_map_nif_lane224.BCM8887X=rx224:tx229 -phy_rx_polarity_flip_phy224.BCM8887X=0 -phy_tx_polarity_flip_phy224.BCM8887X=1 -serdes_tx_taps_224.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 28 lane225 -lane_to_serdes_map_nif_lane225.BCM8887X=rx228:tx230 -phy_rx_polarity_flip_phy225.BCM8887X=1 -phy_tx_polarity_flip_phy225.BCM8887X=0 -serdes_tx_taps_225.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 28 lane226 -lane_to_serdes_map_nif_lane226.BCM8887X=rx229:tx228 -phy_rx_polarity_flip_phy226.BCM8887X=1 -phy_tx_polarity_flip_phy226.BCM8887X=0 -serdes_tx_taps_226.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 28 lane227 -lane_to_serdes_map_nif_lane227.BCM8887X=rx227:tx224 -phy_rx_polarity_flip_phy227.BCM8887X=0 -phy_tx_polarity_flip_phy227.BCM8887X=1 -serdes_tx_taps_227.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 28 lane228 -lane_to_serdes_map_nif_lane228.BCM8887X=rx225:tx231 -phy_rx_polarity_flip_phy228.BCM8887X=0 -phy_tx_polarity_flip_phy228.BCM8887X=0 -serdes_tx_taps_228.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 28 lane229 -lane_to_serdes_map_nif_lane229.BCM8887X=rx230:tx226 -phy_rx_polarity_flip_phy229.BCM8887X=0 -phy_tx_polarity_flip_phy229.BCM8887X=0 -serdes_tx_taps_229.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 28 lane230 -lane_to_serdes_map_nif_lane230.BCM8887X=rx231:tx227 -phy_rx_polarity_flip_phy230.BCM8887X=0 -phy_tx_polarity_flip_phy230.BCM8887X=0 -serdes_tx_taps_230.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 28 lane231 -lane_to_serdes_map_nif_lane231.BCM8887X=rx226:tx225 -phy_rx_polarity_flip_phy231.BCM8887X=1 -phy_tx_polarity_flip_phy231.BCM8887X=1 -serdes_tx_taps_231.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - - -# ---------------------------------------------------------------------------------------------------- -# core_29 -# ---------------------------------------------------------------------------------------------------- -ucode_port_241.BCM8887X=CDGE4_58:core_7.9 -tm_port_header_type_out_241.BCM8887X=ETH -ucode_port_245.BCM8887X=CDGE4_59:core_7.13 -tm_port_header_type_out_245.BCM8887X=ETH - -# core 29 lane232 -lane_to_serdes_map_nif_lane232.BCM8887X=rx234:tx234 -phy_rx_polarity_flip_phy232.BCM8887X=1 -phy_tx_polarity_flip_phy232.BCM8887X=1 -serdes_tx_taps_232.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 29 lane233 -lane_to_serdes_map_nif_lane233.BCM8887X=rx235:tx233 -phy_rx_polarity_flip_phy233.BCM8887X=1 -phy_tx_polarity_flip_phy233.BCM8887X=0 -serdes_tx_taps_233.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 29 lane234 -lane_to_serdes_map_nif_lane234.BCM8887X=rx236:tx239 -phy_rx_polarity_flip_phy234.BCM8887X=1 -phy_tx_polarity_flip_phy234.BCM8887X=1 -serdes_tx_taps_234.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 29 lane235 -lane_to_serdes_map_nif_lane235.BCM8887X=rx238:tx232 -phy_rx_polarity_flip_phy235.BCM8887X=0 -phy_tx_polarity_flip_phy235.BCM8887X=1 -serdes_tx_taps_235.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 29 lane236 -lane_to_serdes_map_nif_lane236.BCM8887X=rx237:tx236 -phy_rx_polarity_flip_phy236.BCM8887X=0 -phy_tx_polarity_flip_phy236.BCM8887X=0 -serdes_tx_taps_236.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 29 lane237 -lane_to_serdes_map_nif_lane237.BCM8887X=rx239:tx235 -phy_rx_polarity_flip_phy237.BCM8887X=1 -phy_tx_polarity_flip_phy237.BCM8887X=0 -serdes_tx_taps_237.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 29 lane238 -lane_to_serdes_map_nif_lane238.BCM8887X=rx232:tx238 -phy_rx_polarity_flip_phy238.BCM8887X=1 -phy_tx_polarity_flip_phy238.BCM8887X=0 -serdes_tx_taps_238.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 29 lane239 -lane_to_serdes_map_nif_lane239.BCM8887X=rx233:tx237 -phy_rx_polarity_flip_phy239.BCM8887X=1 -phy_tx_polarity_flip_phy239.BCM8887X=0 -serdes_tx_taps_239.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - - -# ---------------------------------------------------------------------------------------------------- -# core_30 -# ---------------------------------------------------------------------------------------------------- -ucode_port_233.BCM8887X=CDGE4_60:core_7.17 -tm_port_header_type_out_233.BCM8887X=ETH -ucode_port_237.BCM8887X=CDGE4_61:core_7.21 -tm_port_header_type_out_237.BCM8887X=ETH - -# core 30 lane240 -lane_to_serdes_map_nif_lane240.BCM8887X=rx242:tx242 -phy_rx_polarity_flip_phy240.BCM8887X=0 -phy_tx_polarity_flip_phy240.BCM8887X=1 -serdes_tx_taps_240.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 30 lane241 -lane_to_serdes_map_nif_lane241.BCM8887X=rx243:tx241 -phy_rx_polarity_flip_phy241.BCM8887X=1 -phy_tx_polarity_flip_phy241.BCM8887X=0 -serdes_tx_taps_241.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 30 lane242 -lane_to_serdes_map_nif_lane242.BCM8887X=rx244:tx247 -phy_rx_polarity_flip_phy242.BCM8887X=1 -phy_tx_polarity_flip_phy242.BCM8887X=1 -serdes_tx_taps_242.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 30 lane243 -lane_to_serdes_map_nif_lane243.BCM8887X=rx246:tx240 -phy_rx_polarity_flip_phy243.BCM8887X=0 -phy_tx_polarity_flip_phy243.BCM8887X=1 -serdes_tx_taps_243.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 30 lane244 -lane_to_serdes_map_nif_lane244.BCM8887X=rx245:tx244 -phy_rx_polarity_flip_phy244.BCM8887X=0 -phy_tx_polarity_flip_phy244.BCM8887X=0 -serdes_tx_taps_244.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 30 lane245 -lane_to_serdes_map_nif_lane245.BCM8887X=rx247:tx243 -phy_rx_polarity_flip_phy245.BCM8887X=1 -phy_tx_polarity_flip_phy245.BCM8887X=0 -serdes_tx_taps_245.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 30 lane246 -lane_to_serdes_map_nif_lane246.BCM8887X=rx240:tx246 -phy_rx_polarity_flip_phy246.BCM8887X=1 -phy_tx_polarity_flip_phy246.BCM8887X=0 -serdes_tx_taps_246.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 30 lane247 -lane_to_serdes_map_nif_lane247.BCM8887X=rx241:tx245 -phy_rx_polarity_flip_phy247.BCM8887X=1 -phy_tx_polarity_flip_phy247.BCM8887X=0 -serdes_tx_taps_247.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - - -# ---------------------------------------------------------------------------------------------------- -# core_31 -# ---------------------------------------------------------------------------------------------------- -ucode_port_225.BCM8887X=CDGE4_62:core_7.25 -tm_port_header_type_out_225.BCM8887X=ETH -ucode_port_229.BCM8887X=CDGE4_63:core_7.29 -tm_port_header_type_out_229.BCM8887X=ETH - -# core 31 lane248 -lane_to_serdes_map_nif_lane248.BCM8887X=rx250:tx250 -phy_rx_polarity_flip_phy248.BCM8887X=0 -phy_tx_polarity_flip_phy248.BCM8887X=1 -serdes_tx_taps_248.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 31 lane249 -lane_to_serdes_map_nif_lane249.BCM8887X=rx251:tx249 -phy_rx_polarity_flip_phy249.BCM8887X=1 -phy_tx_polarity_flip_phy249.BCM8887X=0 -serdes_tx_taps_249.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 31 lane250 -lane_to_serdes_map_nif_lane250.BCM8887X=rx252:tx255 -phy_rx_polarity_flip_phy250.BCM8887X=1 -phy_tx_polarity_flip_phy250.BCM8887X=1 -serdes_tx_taps_250.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 31 lane251 -lane_to_serdes_map_nif_lane251.BCM8887X=rx254:tx248 -phy_rx_polarity_flip_phy251.BCM8887X=0 -phy_tx_polarity_flip_phy251.BCM8887X=1 -serdes_tx_taps_251.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 31 lane252 -lane_to_serdes_map_nif_lane252.BCM8887X=rx253:tx252 -phy_rx_polarity_flip_phy252.BCM8887X=0 -phy_tx_polarity_flip_phy252.BCM8887X=0 -serdes_tx_taps_252.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 31 lane253 -lane_to_serdes_map_nif_lane253.BCM8887X=rx255:tx251 -phy_rx_polarity_flip_phy253.BCM8887X=1 -phy_tx_polarity_flip_phy253.BCM8887X=0 -serdes_tx_taps_253.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 31 lane254 -lane_to_serdes_map_nif_lane254.BCM8887X=rx248:tx254 -phy_rx_polarity_flip_phy254.BCM8887X=1 -phy_tx_polarity_flip_phy254.BCM8887X=0 -serdes_tx_taps_254.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# core 31 lane255 -lane_to_serdes_map_nif_lane255.BCM8887X=rx249:tx253 -phy_rx_polarity_flip_phy255.BCM8887X=1 -phy_tx_polarity_flip_phy255.BCM8887X=0 -serdes_tx_taps_255.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 - -# ---------------------------------------------------------------------------------------------------- -# core_32 -# -# NOTE: -# The QoS configuration (refer qos.json.j2 and buffers_defaults_XXX.j2 file per SKU) -# does not include this management port. If you are modifying the management port, ensure that the -# QoS configuration is updated accordingly to reflect the change. -# ---------------------------------------------------------------------------------------------------- -ucode_port_257.BCM8887X=CGE64:core_2.33 -tm_port_header_type_out_257.BCM8887X=ETH - -# core 32 lane256 -lane_to_serdes_map_nif_lane256.BCM8887X=rx257:tx257 -phy_rx_polarity_flip_phy256.BCM8887X=0 -phy_tx_polarity_flip_phy256.BCM8887X=0 - -# core 32 lane257 -lane_to_serdes_map_nif_lane257.BCM8887X=rx256:tx256 -phy_rx_polarity_flip_phy257.BCM8887X=0 -phy_tx_polarity_flip_phy257.BCM8887X=1 - -# core 32 lane258 -lane_to_serdes_map_nif_lane258.BCM8887X=rx258:tx258 -phy_rx_polarity_flip_phy258.BCM8887X=1 -phy_tx_polarity_flip_phy258.BCM8887X=0 - -# core 32 lane259 -lane_to_serdes_map_nif_lane259.BCM8887X=rx259:tx259 -phy_rx_polarity_flip_phy259.BCM8887X=0 -phy_tx_polarity_flip_phy259.BCM8887X=0 - - -# ---------------------------------------------------------------------------------------------------- -# core_33 -# -# NOTE: -# The QoS configuration (refer qos.json.j2 and buffers_defaults_XXX.j2 file per SKU) -# does not include this management port. If you are modifying the management port, ensure that the -# QoS configuration is updated accordingly to reflect the change. -# ---------------------------------------------------------------------------------------------------- -ucode_port_261.BCM8887X=CGE65:core_6.33 -tm_port_header_type_out_261.BCM8887X=ETH - -# core 33 lane260 -lane_to_serdes_map_nif_lane260.BCM8887X=rx260:tx260 -phy_rx_polarity_flip_phy260.BCM8887X=0 -phy_tx_polarity_flip_phy260.BCM8887X=0 - -# core 33 lane261 -lane_to_serdes_map_nif_lane261.BCM8887X=rx261:tx261 -phy_rx_polarity_flip_phy261.BCM8887X=0 -phy_tx_polarity_flip_phy261.BCM8887X=1 - -# core 33 lane262 -lane_to_serdes_map_nif_lane262.BCM8887X=rx262:tx262 -phy_rx_polarity_flip_phy262.BCM8887X=0 -phy_tx_polarity_flip_phy262.BCM8887X=0 - -# core 33 lane263 -lane_to_serdes_map_nif_lane263.BCM8887X=rx263:tx263 -phy_rx_polarity_flip_phy263.BCM8887X=0 -phy_tx_polarity_flip_phy263.BCM8887X=0 - - -# ---------------------------------------------------------------------------------------------------- -# Static Properties -# ---------------------------------------------------------------------------------------------------- - -port_init_speed_xl.BCM8887X=40000 -port_init_speed_cd.BCM8887X=400000 -port_init_speed_d3c.BCM8887X=800000 -port_init_speed_ce.BCM8887X=100000 -port_init_speed_le.BCM8887X=50000 -port_init_speed_fabric.BCM8887X=53125 -port_init_speed_xe.BCM8887X=25000 -port_init_speed_cc.BCM8887X=200000 -port_init_speed_ge.BCM8887X=1000 - -outlif_logical_to_physical_phase_map_1.BCM8887X=S1 -outlif_logical_to_physical_phase_map_2.BCM8887X=L1 -outlif_logical_to_physical_phase_map_3.BCM8887X=XL -outlif_logical_to_physical_phase_map_4.BCM8887X=L2 -outlif_logical_to_physical_phase_map_5.BCM8887X=M1 -outlif_logical_to_physical_phase_map_6.BCM8887X=M2 -outlif_logical_to_physical_phase_map_7.BCM8887X=M3 -outlif_logical_to_physical_phase_map_8.BCM8887X=S2 - -outlif_physical_phase_data_granularity_S1.BCM8887X=60 -outlif_physical_phase_data_granularity_S2.BCM8887X=60 -outlif_physical_phase_data_granularity_M1.BCM8887X=60 -outlif_physical_phase_data_granularity_M2.BCM8887X=60 -outlif_physical_phase_data_granularity_M3.BCM8887X=60 -outlif_physical_phase_data_granularity_L1.BCM8887X=60 -outlif_physical_phase_data_granularity_L2.BCM8887X=60 -outlif_physical_phase_data_granularity_XL.BCM8887X=60 - -appl_param_rcy_mirror_ports_range.BCM8887X=500-1000 - -# ----------------------------------------------- -# | FPP | FPP | FPP | FPP | FPP | FPP | -# | 11,12 | 13,14 | 15,16 | 17,18 | 19,20 | 21,22 | -# |-----------------------------------------------| -# | ETH | ETH | ETH | ETH | ETH | ETH | -# | 33,37 | 41,45 | 49,53 | 57,61 | 65,69 | 73,77 | -# ---------------|-----------------------------------------------|---------------- -# | | Core | Core | Core | Core | Core | Core | | -# | | 06 | 05 | 04 | 16 | 17 | 18 | | -# -----------------|------ ----------------------------------------------- ------|---------|------- -# | FPP | ETH | Core | | Core | ETH | FPP | -# | 09,10 | 185,189 | 07 | | 19 | 193,197 | 23,24 | -# |-------|---------|------| |------|---------|-------| -# | FPP | ETH | Core | | Core | ETH | FPP | -# | 07,08 | 177,181 | 15 | | 27 | 201,205 | 25,26 | -# |-------|---------|------| |------|---------|-------| -# | FPP | ETH | Core | AGERA2 -> QSFP_DD_112 | Core | ETH | FPP | -# | 05,06 | 169,173 | 14 | | 26 | 209,213 | 27,28 | -# |-------|---------|------| |------|---------|-------| -# | FPP | ETH | Core | | Core | ETH | FPP | -# | 03,04 | 161,165 | 13 | | 25 | 217,221 | 29,30 | -# |-------|---------|------| |------|---------|-------| -# | FPP | ETH | Core | | Core | ETH | FPP | -# | 01,02 | 153,157 | 12 | | 24 | 225,229 | 31,32 | -# |-------|---------|------|---------------------------- Q3D -------------------------------|------|---------|-------| -# | FPP | ETH | Core | | Core | ETH | FPP | -# | 33,34 | 129,133 | 08 | | 28 | 249,253 | 62,63 | -# |-------|---------|------| |------|---------|-------| -# | FPP | ETH | Core | | Core | ETH | FPP | -# | 35,36 | 137,141 | 09 | | 29 | 241,245 | 60,61 | -# |-------|---------|------| |------|---------|-------| -# | FPP | ETH | Core | | Core | ETH | FPP | -# | 36,37 | 145,149 | 10 | QSFP_112 | 30 | 233,237 | 58,59 | -# |-------|---------|------| |------|---------|-------| -# | FPP | ETH | Core | | Core | ETH | FPP | -# | 38,39 | 153,157 | 11 | | 31 | 225,229 | 56,57 | -# |-------|---------|------| |------|---------|-------| -# | FPP | ETH | Core | | Core | ETH | FPP | -# | 40,41 | 161,165 | 03 | | 23 | 217,221 | 54,55 | -# -----------------|------ _______________________________________________ ------|----------------- -# | | Core | Core | Core | Core | Core | Core | | -# | | 02 | 01 | 00 | 20 | 21 | 22 | | -# ---------------|-----------------------------------------------|---------------- -# | ETH | ETH | ETH | ETH | ETH | ETH | -# |169,173|177,181|185,189|193,197|201,205|209,213| -# |-----------------------------------------------| -# | FPP | FPP | FPP | FPP | FPP | FPP | -# | 42,43 | 44,45 | 46,47 | 48,49 | 50,51 | 52,53 | -# ----------------------------------------------- - -dpp_db_path=/usr/share/bcm/db -rif_id_max=8192 -trunk_group_max_members=128 -custom_feature_ts_pll_internal_clock_reference.BCM8887X=1 -port_init_cl72.BCM8887X=0 -port_priorities_d3c.BCM8887X=8 -port_priorities_cd.BCM8887X=8 -port_priorities_ce.BCM8887X=8 -port_priorities_xe.BCM8887X=8 -port_priorities_ge.BCM8887X=8 -port_priorities=8 -#port_priorities_sch=8 -#CPU ports -port_priorities_0=2 -port_priorities_sch_0=8 -port_priorities_380=2 -port_priorities_sch_380=8 -port_priorities_381=2 -port_priorities_sch_381=8 -port_priorities_382=2 -port_priorities_sch_382=8 -port_priorities_383=2 -port_priorities_sch_383=8 -port_priorities_384=2 -port_priorities_sch_384=8 -port_priorities_385=2 -port_priorities_sch_385=8 -port_priorities_386=2 -port_priorities_sch_386=8 -port_priorities_387=2 -port_priorities_sch_387=8 -port_priorities_rcy=2 -port_priorities_sch_rcy=8 - -appl_param_oam_enable=0 -soc_family.BCM8887X=BCM8887X - -#enable HBM -ext_ram_enabled_bitmap.BCM8887X=0xF - -#################################################### -##Reference applications related properties - End -#################################################### -###Default interfaces for Qumran3D -#CPU interfaces -ucode_port_0.BCM8887X=CPU.0:core_0.0 -ucode_port_380.BCM8887X=CPU.8:core_1.200 -ucode_port_381.BCM8887X=CPU.16:core_0.201 -ucode_port_382.BCM8887X=CPU.24:core_2.202 -ucode_port_383.BCM8887X=CPU.32:core_3.203 -ucode_port_384.BCM8887X=CPU.4:core_6.204 -ucode_port_385.BCM8887X=CPU.12:core_7.205 -ucode_port_386.BCM8887X=CPU.20:core_4.206 -ucode_port_387.BCM8887X=CPU.28:core_5.207 - -#special ports -ucode_port_330.BCM8887X=EVENTOR:core_0.230 - -#ucode_port_231.BCM8887X=EVENTOR:core_4.231 -ucode_port_340.BCM8887X=OLP0:core_0.240 -ucode_port_341.BCM8887X=OLP1:core_0.241 -ucode_port_342.BCM8887X=OLP0:core_4.242 -ucode_port_343.BCM8887X=OLP1:core_4.243 -ucode_port_332.BCM8887X=OAMP:core_0.232 -ucode_port_333.BCM8887X=OAMP:core_1.233 -ucode_port_334.BCM8887X=OAMP:core_2.234 -ucode_port_335.BCM8887X=OAMP:core_3.235 -ucode_port_336.BCM8887X=OAMP:core_4.236 -ucode_port_337.BCM8887X=OAMP:core_5.237 -ucode_port_338.BCM8887X=OAMP:core_6.238 -ucode_port_339.BCM8887X=OAMP:core_7.239 - - -ucode_port_332.BCM8887X_ADAPTER=OAMP:core_0.232 -ucode_port_333.BCM8887X_ADAPTER=OAMP:core_1.233 -ucode_port_334.BCM8887X_ADAPTER=OAMP:core_2.234 -ucode_port_335.BCM8887X_ADAPTER=OAMP:core_3.235 -ucode_port_336.BCM8887X_ADAPTER=OAMP:core_4.236 -ucode_port_337.BCM8887X_ADAPTER=OAMP:core_5.237 -ucode_port_338.BCM8887X_ADAPTER=OAMP:core_6.238 -ucode_port_339.BCM8887X_ADAPTER=OAMP:core_7.239 - - -#OAMP -oamp_dual_mode.BCM8887X=1 - -sai_disable_srcmacqedstmac_ctrl=1 - -#RCY ports -sai_recycle_port_lane_base=300 -ucode_port_321.BCM8887X=RCY.21:core_0.221 -tm_port_header_type_in_321.BCM8887X=IBCH1_MODE - -# SAT -## Enable SAT Interface. 0 - Disable, 1 - Enable (Default) -ucode_port_316.BCM8887X=SAT:core_2.216 -ucode_port_317.BCM8887X=SAT:core_3.217 -ucode_port_318.BCM8887X=SAT:core_0.218 -ucode_port_319.BCM8887X=SAT:core_1.219 -ucode_port_312.BCM8887X=SAT:core_6.212 -ucode_port_313.BCM8887X=SAT:core_7.213 -ucode_port_314.BCM8887X=SAT:core_4.214 -ucode_port_315.BCM8887X=SAT:core_5.215 -tm_port_header_type_in_316.BCM8887X=INJECTED_2 -tm_port_header_type_in_317.BCM8887X=INJECTED_2 -tm_port_header_type_in_318.BCM8887X=INJECTED_2 -tm_port_header_type_in_319.BCM8887X=INJECTED_2 -tm_port_header_type_in_312.BCM8887X=INJECTED_2 -tm_port_header_type_in_313.BCM8887X=INJECTED_2 -tm_port_header_type_in_314.BCM8887X=INJECTED_2 -tm_port_header_type_in_315.BCM8887X=INJECTED_2 -tm_port_header_type_out_316.BCM8887X=CPU -tm_port_header_type_out_317.BCM8887X=CPU -tm_port_header_type_out_318.BCM8887X=CPU -tm_port_header_type_out_319.BCM8887X=CPU -tm_port_header_type_out_312.BCM8887X=CPU -tm_port_header_type_out_313.BCM8887X=CPU -tm_port_header_type_out_314.BCM8887X=CPU -tm_port_header_type_out_315.BCM8887X=CPU - - -######################### -### High Availability ### -######################### -#if warmboot is not needed this property can be deleted -#warmboot_support.BCM8887X=on -#warmboot_support.BCM8887X_ADAPTER=on - -#size of memory block pre-allocated for sw-state use when working with warmboot_support=on -sw_state_max_size.BCM8887X=1650000000 -sw_state_max_size.BCM8887X_ADAPTER=1650000000 - -#location of warmboot NV memory -#Allowed options for dnx are - 3:external storage in filesystem 4:driver will save the state directly in shared memory -stable_location.BCM8887X=4 -stable_location.BCM8887X_ADAPTER=3 - -# Note that each unit should have a unique filename and that adapter does not play well with tmp and dev/shm folders. -stable_filename.BCM8887X_ADAPTER=warmboot_data_0 -stable_filename.BCM8887X=/dev/shm/warmboot_data_0 -stable_filename.1.BCM8887X=/dev/shm/warmboot_data_1 -stable_filename.2.BCM8887X=/dev/shm/warmboot_data_2 - -#Maximum size for NVM used for WB storage, must be larger than sw_state_max_size.BCM8887X -stable_size.BCM8887X=1700000000 -stable_size.BCM8887X_ADAPTER=1700000000 - -#counter stat interval -bcm_stat_interval.BCM8887X_ADAPTER=1000000 - -######################### -######################### -######################### - -### MDB configuration ### -mdb_profile.BCM8887X=L3-Optimized - -### Enable Descriptor-DMA ### -dma_desc_aggregator_chain_length_max.BCM8887X=256 -dma_desc_aggregator_buff_size_kb.BCM8887X=64 -dma_desc_aggregator_enable_specific_MDB_LPM.BCM8887X=1 -dma_desc_aggregator_enable_specific_MDB_FEC.BCM8887X=1 -dma_desc_aggregator_enable_specific_XLTCAM.BCM8887X=1 -dma_desc_aggregator_enable_specific_INIT.BCM8887X=1 - -# PMF Map payload size, can be any of 30/60/120 -pmf_maps_payload_size.BCM8887X=30 - -# Set CPU to work with PTCHoITMH header incoming direction and CPU - system headers + network headers outgoing direction -tm_port_header_type_in_0.BCM8887X=INJECTED -tm_port_header_type_out_0.BCM8887X=CPU - -tm_port_header_type_in_380.BCM8887X=INJECTED -tm_port_header_type_out_380.BCM8887X=ETH -tm_port_header_type_in_381.BCM8887X=INJECTED -tm_port_header_type_out_381.BCM8887X=ETH -tm_port_header_type_in_382.BCM8887X=INJECTED -tm_port_header_type_out_382.BCM8887X=ETH -tm_port_header_type_in_383.BCM8887X=INJECTED -tm_port_header_type_out_383.BCM8887X=ETH -tm_port_header_type_in_384.BCM8887X=INJECTED -tm_port_header_type_out_384.BCM8887X=ETH -tm_port_header_type_in_385.BCM8887X=INJECTED -tm_port_header_type_out_385.BCM8887X=ETH -tm_port_header_type_in_386.BCM8887X=INJECTED -tm_port_header_type_out_386.BCM8887X=ETH -tm_port_header_type_in_387.BCM8887X=INJECTED -tm_port_header_type_out_387.BCM8887X=ETH - -# set EVENTOR port to work with PTCHoITMH -tm_port_header_type_in_330.BCM8887X=INJECTED - - -#OAMP -tm_port_header_type_in_332.BCM8887X=INJECTED_2 -tm_port_header_type_out_332.BCM8887X=ENCAP_EXTERNAL_CPU -tm_port_header_type_in_333.BCM8887X=INJECTED_2 -tm_port_header_type_out_333.BCM8887X=ENCAP_EXTERNAL_CPU -tm_port_header_type_in_334.BCM8887X=INJECTED_2 -tm_port_header_type_out_334.BCM8887X=ENCAP_EXTERNAL_CPU -tm_port_header_type_in_335.BCM8887X=INJECTED_2 -tm_port_header_type_in_336.BCM8887X=INJECTED_2 -tm_port_header_type_out_336.BCM8887X=ENCAP_EXTERNAL_CPU -tm_port_header_type_in_337.BCM8887X=INJECTED_2 -tm_port_header_type_out_337.BCM8887X=ENCAP_EXTERNAL_CPU -tm_port_header_type_in_338.BCM8887X=INJECTED_2 -tm_port_header_type_out_338.BCM8887X=ENCAP_EXTERNAL_CPU -tm_port_header_type_in_339.BCM8887X=INJECTED_2 -tm_port_header_type_out_339.BCM8887X=ENCAP_EXTERNAL_CPU - -#OLP -tm_port_header_type_in_340.BCM8887X=TM -tm_port_header_type_out_340.BCM8887X=ETH -tm_port_header_type_in_341.BCM8887X=TM -tm_port_header_type_out_341.BCM8887X=ETH -tm_port_header_type_in_342.BCM8887X=TM -tm_port_header_type_out_342.BCM8887X=ETH -tm_port_header_type_in_343.BCM8887X=TM -tm_port_header_type_out_343.BCM8887X=ETH - -# Set statically the region mode per region id -# 0: queue connectors only. -# 3: [default] SE only (SharingOrder = Low-To-High) -# 7: SE only (SharingOrder = High-To-Low) -dtm_flow_mapping_mode_region_65.BCM8887X=3 -dtm_flow_mapping_mode_region_66.BCM8887X=3 -dtm_flow_mapping_mode_region_67.BCM8887X=3 -dtm_flow_mapping_mode_region_68.BCM8887X=3 -dtm_flow_mapping_mode_region_69.BCM8887X=3 -dtm_flow_mapping_mode_region_70.BCM8887X=3 -dtm_flow_mapping_mode_region_71.BCM8887X=3 -dtm_flow_mapping_mode_region_72.BCM8887X=3 -dtm_flow_mapping_mode_region_73.BCM8887X=3 -dtm_flow_mapping_mode_region_74.BCM8887X=7 -dtm_flow_mapping_mode_region_75.BCM8887X=3 -dtm_flow_mapping_mode_region_76.BCM8887X=3 -dtm_flow_mapping_mode_region_77.BCM8887X=3 -dtm_flow_mapping_mode_region_78.BCM8887X=3 -dtm_flow_mapping_mode_region_79.BCM8887X=3 -dtm_flow_mapping_mode_region_80.BCM8887X=3 -dtm_flow_mapping_mode_region_81.BCM8887X=3 -dtm_flow_mapping_mode_region_82.BCM8887X=3 -dtm_flow_mapping_mode_region_83.BCM8887X=3 -dtm_flow_mapping_mode_region_84.BCM8887X=3 -dtm_flow_mapping_mode_region_85.BCM8887X=3 -dtm_flow_mapping_mode_region_86.BCM8887X=3 -dtm_flow_mapping_mode_region_87.BCM8887X=3 -dtm_flow_mapping_mode_region_88.BCM8887X=3 -dtm_flow_mapping_mode_region_89.BCM8887X=3 -dtm_flow_mapping_mode_region_90.BCM8887X=3 -dtm_flow_mapping_mode_region_91.BCM8887X=3 -dtm_flow_mapping_mode_region_92.BCM8887X=3 -dtm_flow_mapping_mode_region_93.BCM8887X=3 -dtm_flow_mapping_mode_region_94.BCM8887X=3 - -# Set nof remote cores -dtm_flow_nof_remote_cores_region.BCM8887X=8 - -## Fabric transmission mode -# Set the Connect mode to the Fabric -# Options: FE - presence of a Fabric device (single stage) -# SINGLE_FAP - stand-alone device -# MESH - devices in Mesh -# Note: If 'diag_chassis' is on, value will be override in dnx.soc -# to be FE instead of SINGLE_FAP. -fabric_connect_mode.BCM8887X=SINGLE_FAP - -### Fabric configuration ### -#SFI speed rate -port_init_speed_fabric.BCM8887X=53125 - -### import SoC properties that shared with Ucode -#import config-qumran3d-ucode.bcm -#programmability_image_name.BCM8887X=S121 -# ucode input file, depending on image -#programmability_ucode_relative_path.BCM8887X=pemla/ucode/S121/jr3native/u_code_db2pem.txt - -custom_feature_adapter_do_collect_enable.BCM8887X_ADAPTER=1 -custom_feature_use_new_access.BCM8887X_ADAPTER=1 -mem_cache_enable_all.BCM8887X_ADAPTER=1 - -#dram - -dram_temperature_monitor_enable.BCM8887X_ADAPTER=0 -#Interrupt polling mode on adapter -polled_irq_mode.BCM8887X_ADAPTER=1 -polled_irq_delay.BCM8887X_ADAPTER=200000 - -#Eventor SBUS DMA channels -eventor_sbus_dma_channels.BCM8887X=0,24,0,25,1,24,1,25 - -#Default CPU Tx Tc Queue -sai_default_cpu_tx_tc=7 - -#macsec properties -macsec_fips_enable=1 -xflow_macsec_secure_chan_to_num_secure_assoc=4 -xflow_macsec_secure_chan_to_num_secure_assoc_encrypt=2 -xflow_macsec_secure_chan_to_num_secure_assoc_decrypt=4 diff --git a/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/pg_profile_lookup.ini b/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/pg_profile_lookup.ini new file mode 100644 index 00000000000..351a33c4a06 --- /dev/null +++ b/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/pg_profile_lookup.ini @@ -0,0 +1,19 @@ +# PG lossless profiles. +# speed cable size xon xoff threshold xon_offset +100000 30m 0 0 183263 -6 363506 +100000 50m 0 0 185802 -6 363506 +100000 100m 0 0 192149 -6 363506 +100000 300m 0 0 217535 -6 363506 +100000 2000m 0 0 436032 -6 363506 +100000 120000m 0 0 15739154 -6 363506 +400000 30m 0 0 514553 -6 1454025 +400000 50m 0 0 524707 -6 1454025 +400000 100m 0 0 550094 -6 1454025 +400000 300m 0 0 651640 -6 1454025 +400000 2000m 0 0 1514785 -6 1454025 +400000 120000m 0 0 62653744 -6 1454025 +800000 30m 0 0 244000 -6 1454025 +800000 50m 0 0 244000 -6 1454025 +800000 300m 0 0 564000 -6 1454025 +800000 2000m 0 0 2736000 -6 1454025 +800000 120000m 0 0 153440000 -6 1454025 diff --git a/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/port_speed.json b/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/port_speed.json new file mode 100644 index 00000000000..cbc6385e961 --- /dev/null +++ b/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/port_speed.json @@ -0,0 +1,1666 @@ +{ + "1": { + "100G": { + "name": "Ethernet0", + "asic": { + "lanes": [96, 97], + "core": 3, + "pm": 12 + }, + "gearbox": { + "gearbox_id": 0, + "gearbox_init_mode": "0", + "host_lanes": [20, 21], + "line_lanes": [0, 1, 2, 3], + "logical_host_lanes": [0, 1], + "logical_line_lanes": [0, 1, 2, 3] + } + }, + "400G": { + "name": "Ethernet0", + "asic": { + "lanes": [96, 97, 98, 99], + "core": 3, + "pm": 12 + }, + "gearbox": { + "gearbox_id": 0, + "gearbox_init_mode": "0", + "host_lanes": [20, 21, 22, 23], + "line_lanes": [0, 1, 2, 3, 4, 5, 6, 7], + "logical_host_lanes": [0, 1, 2, 3], + "logical_line_lanes": [0, 1, 2, 3, 4, 5, 6, 7] + } + } + }, + "2": { + "100G": { + "name": "Ethernet4", + "asic": { + "lanes": [100, 101], + "core": 3, + "pm": 12 + }, + "gearbox": { + "gearbox_id": 0, + "gearbox_init_mode": "0", + "host_lanes": [24, 25], + "line_lanes": [8, 9, 10, 11], + "logical_host_lanes": [8, 9], + "logical_line_lanes": [8, 9, 10, 11] + } + }, + "400G": { + "name": "Ethernet4", + "asic": { + "lanes": [100, 101, 102, 103], + "core": 3, + "pm": 12 + }, + "gearbox": { + "gearbox_id": 0, + "gearbox_init_mode": "0", + "host_lanes": [24, 25, 26, 27], + "line_lanes": [8, 9, 10, 11, 12, 13, 14, 15], + "logical_host_lanes": [8, 9, 10, 11], + "logical_line_lanes": [8, 9, 10, 11, 12, 13, 14, 15] + } + } + }, + "3": { + "100G": { + "name": "Ethernet8", + "asic": { + "lanes": [104, 105], + "core": 3, + "pm": 13 + }, + "gearbox": { + "gearbox_id": 1, + "gearbox_init_mode": "0", + "host_lanes": [52, 53], + "line_lanes": [32, 33, 34, 35], + "logical_host_lanes": [0, 1], + "logical_line_lanes": [0, 1, 2, 3] + } + }, + "400G": { + "name": "Ethernet8", + "asic": { + "lanes": [104, 105, 106, 107], + "core": 3, + "pm": 13 + }, + "gearbox": { + "gearbox_id": 1, + "gearbox_init_mode": "0", + "host_lanes": [52, 53, 54, 55], + "line_lanes": [32, 33, 34, 35, 36, 37, 38, 39], + "logical_host_lanes": [0, 1, 2, 3], + "logical_line_lanes": [0, 1, 2, 3, 4, 5, 6, 7] + } + } + }, + "4": { + "100G": { + "name": "Ethernet12", + "asic": { + "lanes": [108, 109], + "core": 3, + "pm": 13 + }, + "gearbox": { + "gearbox_id": 1, + "gearbox_init_mode": "0", + "host_lanes": [56, 57], + "line_lanes": [40, 41, 42, 43], + "logical_host_lanes": [8, 9], + "logical_line_lanes": [8, 9, 10, 11] + } + }, + "400G": { + "name": "Ethernet12", + "asic": { + "lanes": [108, 109, 110, 111], + "core": 3, + "pm": 13 + }, + "gearbox": { + "gearbox_id": 1, + "gearbox_init_mode": "0", + "host_lanes": [56, 57, 58, 59], + "line_lanes": [40, 41, 42, 43, 44, 45, 46, 47], + "logical_host_lanes": [8, 9, 10, 11], + "logical_line_lanes": [8, 9, 10, 11, 12, 13, 14, 15] + } + } + }, + "5": { + "100G": { + "name": "Ethernet16", + "asic": { + "lanes": [112, 113], + "core": 3, + "pm": 14 + }, + "gearbox": { + "gearbox_id": 2, + "gearbox_init_mode": "0", + "host_lanes": [84, 85], + "line_lanes": [64, 65, 66, 67], + "logical_host_lanes": [0, 1], + "logical_line_lanes": [0, 1, 2, 3] + } + }, + "400G": { + "name": "Ethernet16", + "asic": { + "lanes": [112, 113, 114, 115], + "core": 3, + "pm": 14 + }, + "gearbox": { + "gearbox_id": 2, + "gearbox_init_mode": "0", + "host_lanes": [84, 85, 86, 87], + "line_lanes": [64, 65, 66, 67, 68, 69, 70, 71], + "logical_host_lanes": [0, 1, 2, 3], + "logical_line_lanes": [0, 1, 2, 3, 4, 5, 6, 7] + } + } + }, + "6": { + "100G": { + "name": "Ethernet20", + "asic": { + "lanes": [116, 117], + "core": 3, + "pm": 14 + }, + "gearbox": { + "gearbox_id": 2, + "gearbox_init_mode": "0", + "host_lanes": [88, 89], + "line_lanes": [72, 73, 74, 75], + "logical_host_lanes": [8, 9], + "logical_line_lanes": [8, 9, 10, 11] + } + }, + "400G": { + "name": "Ethernet20", + "asic": { + "lanes": [116, 117, 118, 119], + "core": 3, + "pm": 14 + }, + "gearbox": { + "gearbox_id": 2, + "gearbox_init_mode": "0", + "host_lanes": [88, 89, 90, 91], + "line_lanes": [72, 73, 74, 75, 76, 77, 78, 79], + "logical_host_lanes": [8, 9, 10, 11], + "logical_line_lanes": [8, 9, 10, 11, 12, 13, 14, 15] + } + } + }, + "7": { + "100G": { + "name": "Ethernet24", + "asic": { + "lanes": [120, 121], + "core": 3, + "pm": 15 + }, + "gearbox": { + "gearbox_id": 3, + "gearbox_init_mode": "0", + "host_lanes": [116, 117], + "line_lanes": [96, 97, 98, 99], + "logical_host_lanes": [0, 1], + "logical_line_lanes": [0, 1, 2, 3] + } + }, + "400G": { + "name": "Ethernet24", + "asic": { + "lanes": [120, 121, 122, 123], + "core": 3, + "pm": 15 + }, + "gearbox": { + "gearbox_id": 3, + "gearbox_init_mode": "0", + "host_lanes": [116, 117, 118, 119], + "line_lanes": [96, 97, 98, 99, 100, 101, 102, 103], + "logical_host_lanes": [0, 1, 2, 3], + "logical_line_lanes": [0, 1, 2, 3, 4, 5, 6, 7] + } + } + }, + "8": { + "100G": { + "name": "Ethernet28", + "asic": { + "lanes": [124, 125], + "core": 3, + "pm": 15 + }, + "gearbox": { + "gearbox_id": 3, + "gearbox_init_mode": "0", + "host_lanes": [120, 121], + "line_lanes": [104, 105, 106, 107], + "logical_host_lanes": [8, 9], + "logical_line_lanes": [8, 9, 10, 11] + } + }, + "400G": { + "name": "Ethernet28", + "asic": { + "lanes": [124, 125, 126, 127], + "core": 3, + "pm": 15 + }, + "gearbox": { + "gearbox_id": 3, + "gearbox_init_mode": "0", + "host_lanes": [120, 121, 122, 123], + "line_lanes": [104, 105, 106, 107, 108, 109, 110, 111], + "logical_host_lanes": [8, 9, 10, 11], + "logical_line_lanes": [8, 9, 10, 11, 12, 13, 14, 15] + } + } + }, + "9": { + "100G": { + "name": "Ethernet32", + "asic": { + "lanes": [56, 57], + "core": 1, + "pm": 7 + }, + "gearbox": { + "gearbox_id": 4, + "gearbox_init_mode": "0", + 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213], + "core": 6, + "pm": 26 + }, + "gearbox": { + "gearbox_id": 13, + "gearbox_init_mode": "0", + "host_lanes": [440, 441], + "line_lanes": [424, 425, 426, 427], + "logical_host_lanes": [8, 9], + "logical_line_lanes": [8, 9, 10, 11] + } + }, + "400G": { + "name": "Ethernet108", + "asic": { + "lanes": [212, 213, 214, 215], + "core": 6, + "pm": 26 + }, + "gearbox": { + "gearbox_id": 13, + "gearbox_init_mode": "0", + "host_lanes": [440, 441, 442, 443], + "line_lanes": [424, 425, 426, 427, 428, 429, 430, 431], + "logical_host_lanes": [8, 9, 10, 11], + "logical_line_lanes": [8, 9, 10, 11, 12, 13, 14, 15] + } + } + }, + "29": { + "100G": { + "name": "Ethernet112", + "asic": { + "lanes": [200, 201], + "core": 6, + "pm": 25 + }, + "gearbox": { + "gearbox_id": 14, + "gearbox_init_mode": "0", + "host_lanes": [468, 469], + "line_lanes": [448, 449, 450, 451], + "logical_host_lanes": [0, 1], + "logical_line_lanes": [0, 1, 2, 3] + } + }, + "400G": { + "name": "Ethernet112", + "asic": { + "lanes": [200, 201, 202, 203], + "core": 6, + "pm": 25 + }, + "gearbox": { + "gearbox_id": 14, + "gearbox_init_mode": "0", + "host_lanes": [468, 469, 470, 471], + "line_lanes": [448, 449, 450, 451, 452, 453, 454, 455], + "logical_host_lanes": [0, 1, 2, 3], + "logical_line_lanes": [0, 1, 2, 3, 4, 5, 6, 7] + } + } + }, + "30": { + "100G": { + "name": "Ethernet116", + "asic": { + "lanes": [204, 205], + "core": 6, + "pm": 25 + }, + "gearbox": { + "gearbox_id": 14, + "gearbox_init_mode": "0", + "host_lanes": [472, 473], + "line_lanes": [456, 457, 458, 459], + "logical_host_lanes": [8, 9], + "logical_line_lanes": [8, 9, 10, 11] + } + }, + "400G": { + "name": "Ethernet116", + "asic": { + "lanes": [204, 205, 206, 207], + "core": 6, + "pm": 25 + }, + "gearbox": { + "gearbox_id": 14, + "gearbox_init_mode": "0", + "host_lanes": [472, 473, 474, 475], + "line_lanes": [456, 457, 458, 459, 460, 461, 462, 463], + "logical_host_lanes": [8, 9, 10, 11], + "logical_line_lanes": [8, 9, 10, 11, 12, 13, 14, 15] + } + } + }, + "31": { + "100G": { + "name": "Ethernet120", + "asic": { + "lanes": [192, 193], + "core": 6, + "pm": 24 + }, + "gearbox": { + "gearbox_id": 15, + "gearbox_init_mode": "0", + "host_lanes": [500, 501], + "line_lanes": [480, 481, 482, 483], + "logical_host_lanes": [0, 1], + "logical_line_lanes": [0, 1, 2, 3] + } + }, + "400G": { + "name": "Ethernet120", + "asic": { + "lanes": [192, 193, 194, 195], + "core": 6, + "pm": 24 + }, + "gearbox": { + "gearbox_id": 15, + "gearbox_init_mode": "0", + "host_lanes": [500, 501, 502, 503], + "line_lanes": [480, 481, 482, 483, 484, 485, 486, 487], + "logical_host_lanes": [0, 1, 2, 3], + "logical_line_lanes": [0, 1, 2, 3, 4, 5, 6, 7] + } + } + }, + "32": { + "100G": { + "name": "Ethernet124", + "asic": { + "lanes": [196, 197], + "core": 6, + "pm": 24 + }, + "gearbox": { + "gearbox_id": 15, + "gearbox_init_mode": "0", + "host_lanes": [504, 505], + "line_lanes": [488, 489, 490, 491], + "logical_host_lanes": [8, 9], + "logical_line_lanes": [8, 9, 10, 11] + } + }, + "400G": { + "name": "Ethernet124", + "asic": { + "lanes": [196, 197, 198, 199], + "core": 6, + "pm": 24 + }, + "gearbox": { + "gearbox_id": 15, + "gearbox_init_mode": "0", + "host_lanes": [504, 505, 506, 507], + "line_lanes": [488, 489, 490, 491, 492, 493, 494, 495], + "logical_host_lanes": [8, 9, 10, 11], + "logical_line_lanes": [8, 9, 10, 11, 12, 13, 14, 15] + } + } + }, + "33": { + "100G": { + "name": "Ethernet128", + "asic": { + "lanes": [64, 65, 66, 67], + "core": 2, + "pm": 8 + } + }, + "400G": { + "name": "Ethernet128", + "asic": { + "lanes": [64, 65, 66, 67], + "core": 2, + "pm": 8 + } + } + }, + "34": { + "100G": { + "name": "Ethernet132", + "asic": { + "lanes": [68, 69, 70, 71], + "core": 2, + "pm": 8 + } + }, + "400G": { + "name": "Ethernet132", + "asic": { + "lanes": [68, 69, 70, 71], + "core": 2, + "pm": 8 + } + } + }, + "35": { + "100G": { + "name": "Ethernet136", + "asic": { + "lanes": [72, 73, 74, 75], + "core": 2, + "pm": 9 + } + }, + "400G": { + "name": "Ethernet136", + "asic": { + "lanes": [72, 73, 74, 75], + "core": 2, + "pm": 9 + } + } + }, + "36": { + "100G": { + "name": "Ethernet140", + "asic": { + "lanes": [76, 77, 78, 79], + "core": 2, + "pm": 9 + } + }, + "400G": { + "name": "Ethernet140", + "asic": { + "lanes": [76, 77, 78, 79], + "core": 2, + "pm": 9 + } + } + }, + "37": { + "100G": { + "name": "Ethernet144", + "asic": { + "lanes": [80, 81, 82, 83], + "core": 2, + "pm": 10 + } + }, + "400G": { + "name": "Ethernet144", + "asic": { + "lanes": [80, 81, 82, 83], + "core": 2, + "pm": 10 + } + } + }, + "38": { + "100G": { + "name": "Ethernet148", + "asic": { + "lanes": [84, 85, 86, 87], + "core": 2, + "pm": 10 + } + }, + "400G": { + "name": "Ethernet148", + "asic": { + "lanes": [84, 85, 86, 87], + "core": 2, + "pm": 10 + } + } + }, + "39": { + "100G": { + "name": "Ethernet152", + "asic": { + "lanes": [88, 89, 90, 91], + "core": 2, + "pm": 11 + } + }, + "400G": { + "name": "Ethernet152", + "asic": { + "lanes": [88, 89, 90, 91], + "core": 2, + "pm": 11 + } + } + }, + "40": { + "100G": { + "name": "Ethernet156", + "asic": { + "lanes": [92, 93, 94, 95], + "core": 2, + "pm": 11 + } + }, + "400G": { + "name": "Ethernet156", + "asic": { + "lanes": [92, 93, 94, 95], + "core": 2, + "pm": 11 + } + } + }, + "41": { + "100G": { + "name": "Ethernet160", + "asic": { + "lanes": [24, 25, 26, 27], + "core": 0, + "pm": 3 + } + }, + "400G": { + "name": "Ethernet160", + "asic": { + "lanes": [24, 25, 26, 27], + "core": 0, + "pm": 3 + } + } + }, + "42": { + "100G": { + "name": "Ethernet164", + "asic": { + "lanes": [28, 29, 30, 31], + "core": 0, + "pm": 3 + } + }, + "400G": { + "name": "Ethernet164", + "asic": { + "lanes": [28, 29, 30, 31], + "core": 0, + "pm": 3 + } + } + }, + "43": { + "100G": { + "name": "Ethernet168", + "asic": { + "lanes": [16, 17, 18, 19], + "core": 0, + "pm": 2 + } + }, + "400G": { + "name": "Ethernet168", + "asic": { + "lanes": [16, 17, 18, 19], + "core": 0, + "pm": 2 + } + } + }, + "44": { + "100G": { + "name": "Ethernet172", + "asic": { + "lanes": [20, 21, 22, 23], + "core": 0, + "pm": 2 + } + }, + "400G": { + "name": "Ethernet172", + "asic": { + "lanes": [20, 21, 22, 23], + "core": 0, + "pm": 2 + } + } + }, + "45": { + "100G": { + "name": "Ethernet176", + "asic": { + "lanes": [8, 9, 10, 11], + "core": 0, + "pm": 1 + } + }, + "400G": { + "name": "Ethernet176", + "asic": { + "lanes": [8, 9, 10, 11], + "core": 0, + "pm": 1 + } + } + }, + "46": { + "100G": { + "name": "Ethernet180", + "asic": { + "lanes": [12, 13, 14, 15], + "core": 0, + "pm": 1 + } + }, + "400G": { + "name": "Ethernet180", + "asic": { + "lanes": [12, 13, 14, 15], + "core": 0, + "pm": 1 + } + } + }, + "47": { + "100G": { + "name": "Ethernet184", + "asic": { + "lanes": [0, 1, 2, 3], + "core": 0, + "pm": 0 + } + }, + "400G": { + "name": "Ethernet184", + "asic": { + "lanes": [0, 1, 2, 3], + "core": 0, + "pm": 0 + } + } + }, + "48": { + "100G": { + "name": "Ethernet188", + "asic": { + "lanes": [4, 5, 6, 7], + "core": 0, + "pm": 0 + } + }, + "400G": { + "name": "Ethernet188", + "asic": { + "lanes": [4, 5, 6, 7], + "core": 0, + "pm": 0 + } + } + }, + "49": { + "100G": { + "name": "Ethernet192", + "asic": { + "lanes": [160, 161, 162, 163], + "core": 5, + "pm": 20 + } + }, + "400G": { + "name": "Ethernet192", + "asic": { + "lanes": [160, 161, 162, 163], + "core": 5, + "pm": 20 + } + } + }, + "50": { + "100G": { + "name": "Ethernet196", + "asic": { + "lanes": [164, 165, 166, 167], + "core": 5, + "pm": 20 + } + }, + "400G": { + "name": "Ethernet196", + "asic": { + "lanes": [164, 165, 166, 167], + "core": 5, + "pm": 20 + } + } + }, + "51": { + "100G": { + "name": "Ethernet200", + "asic": { + "lanes": [168, 169, 170, 171], + "core": 5, + "pm": 21 + } + }, + "400G": { + "name": "Ethernet200", + "asic": { + "lanes": [168, 169, 170, 171], + "core": 5, + "pm": 21 + } + } + }, + "52": { + "100G": { + "name": "Ethernet204", + "asic": { + "lanes": [172, 173, 174, 175], + "core": 5, + "pm": 21 + } + }, + "400G": { + "name": "Ethernet204", + "asic": { + "lanes": [172, 173, 174, 175], + "core": 5, + "pm": 21 + } + } + }, + "53": { + "100G": { + "name": "Ethernet208", + "asic": { + "lanes": [176, 177, 178, 179], + "core": 5, + "pm": 22 + } + }, + "400G": { + "name": "Ethernet208", + "asic": { + "lanes": [176, 177, 178, 179], + "core": 5, + "pm": 22 + } + } + }, + "54": { + "100G": { + "name": "Ethernet212", + "asic": { + "lanes": [180, 181, 182, 183], + "core": 5, + "pm": 22 + } + }, + "400G": { + "name": "Ethernet212", + "asic": { + "lanes": [180, 181, 182, 183], + "core": 5, + "pm": 22 + } + } + }, + "55": { + "100G": { + "name": "Ethernet216", + "asic": { + "lanes": [184, 185, 186, 187], + "core": 5, + "pm": 23 + } + }, + "400G": { + "name": "Ethernet216", + "asic": { + "lanes": [184, 185, 186, 187], + "core": 5, + "pm": 23 + } + } + }, + "56": { + "100G": { + "name": "Ethernet220", + "asic": { + "lanes": [188, 189, 190, 191], + "core": 5, + "pm": 23 + } + }, + "400G": { + "name": "Ethernet220", + "asic": { + "lanes": [188, 189, 190, 191], + "core": 5, + "pm": 23 + } + } + }, + "57": { + "100G": { + "name": "Ethernet224", + "asic": { + "lanes": [248, 249, 250, 251], + "core": 7, + "pm": 31 + } + }, + "400G": { + "name": "Ethernet224", + "asic": { + "lanes": [248, 249, 250, 251], + "core": 7, + "pm": 31 + } + } + }, + "58": { + "100G": { + "name": "Ethernet228", + "asic": { + "lanes": [252, 253, 254, 255], + "core": 7, + "pm": 31 + } + }, + "400G": { + "name": "Ethernet228", + "asic": { + "lanes": [252, 253, 254, 255], + "core": 7, + "pm": 31 + } + } + }, + "59": { + "100G": { + "name": "Ethernet232", + "asic": { + "lanes": [240, 241, 242, 243], + "core": 7, + "pm": 30 + } + }, + "400G": { + "name": "Ethernet232", + "asic": { + "lanes": [240, 241, 242, 243], + "core": 7, + "pm": 30 + } + } + }, + "60": { + "100G": { + "name": "Ethernet236", + "asic": { + "lanes": [244, 245, 246, 247], + "core": 7, + "pm": 30 + } + }, + "400G": { + "name": "Ethernet236", + "asic": { + "lanes": [244, 245, 246, 247], + "core": 7, + "pm": 30 + } + } + }, + "61": { + "100G": { + "name": "Ethernet240", + "asic": { + "lanes": [232, 233, 234, 235], + "core": 7, + "pm": 29 + } + }, + "400G": { + "name": "Ethernet240", + "asic": { + "lanes": [232, 233, 234, 235], + "core": 7, + "pm": 29 + } + } + }, + "62": { + "100G": { + "name": "Ethernet244", + "asic": { + "lanes": [236, 237, 238, 239], + "core": 7, + "pm": 29 + } + }, + "400G": { + "name": "Ethernet244", + "asic": { + "lanes": [236, 237, 238, 239], + "core": 7, + "pm": 29 + } + } + }, + "63": { + "100G": { + "name": "Ethernet248", + "asic": { + "lanes": [224, 225, 226, 227], + "core": 7, + "pm": 28 + } + }, + "400G": { + "name": "Ethernet248", + "asic": { + "lanes": [224, 225, 226, 227], + "core": 7, + "pm": 28 + } + } + }, + "64": { + "100G": { + "name": "Ethernet252", + "asic": { + "lanes": [228, 229, 230, 231], + "core": 7, + "pm": 28 + } + }, + "400G": { + "name": "Ethernet252", + "asic": { + "lanes": [228, 229, 230, 231], + "core": 7, + "pm": 28 + } + } + } +} \ No newline at end of file diff --git a/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/qos.json.j2 b/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/qos.json.j2 index 96566a63792..30474c5f980 100644 --- a/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/qos.json.j2 +++ b/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/qos.json.j2 @@ -1,174 +1,7 @@ -{%- macro generate_dscp_to_tc_map_per_sku() -%} - "DSCP_TO_TC_MAP": { - "NH_DEFAULT_DSCP_TO_TC_MAP": { - "0" : "0", - "1" : "0", - "2" : "0", - "3" : "0", - "4" : "0", - "5" : "0", - "6" : "0", - "7" : "0", - "8" : "1", - "9" : "1", - "10": "1", - "11": "1", - "12": "1", - "13": "1", - "14": "1", - "15": "1", - "16": "2", - "17": "2", - "18": "2", - "19": "2", - "20": "2", - "21": "2", - "22": "2", - "23": "2", - "24": "3", - "25": "3", - "26": "3", - "27": "3", - "28": "3", - "29": "3", - "30": "3", - "31": "3", - "32": "4", - "33": "4", - "34": "4", - "35": "4", - "36": "4", - "37": "4", - "38": "4", - "39": "4", - "40": "5", - "41": "5", - "42": "5", - "43": "5", - "44": "5", - "45": "5", - "46": "5", - "47": "5", - "48": "6", - "49": "6", - "50": "6", - "51": "6", - "52": "6", - "53": "6", - "54": "6", - "55": "6", - "56": "7", - "57": "7", - "58": "7", - "59": "7", - "60": "7", - "61": "7", - "62": "7", - "63": "7" - } - }, -{%- endmacro -%} - {%- macro generate_global_dscp_to_tc_map() %} {# This is an empty macro since the global DSCP_TO_TC map is not required #} {%- endmacro %} -{%- macro generate_tc_to_queue_map_per_sku() -%} - "TC_TO_QUEUE_MAP": { - "NH_DEFAULT_TC_TO_QUEUE_MAP": { - "0": "0", - "1": "1", - "2": "2", - "3": "3", - "4": "4", - "5": "5", - "6": "6", - "7": "7" - } - }, -{%- endmacro -%} - -{%- macro generate_tc_to_pg_map_per_sku() -%} - "TC_TO_PRIORITY_GROUP_MAP": { - "NH_DEFAULT_TC_TO_PRI_GROUP_MAP": { - "0": "0", - "1": "1", - "2": "2", - "3": "3", - "4": "4", - "5": "5", - "6": "6", - "7": "7" - } - }, -{%- endmacro -%} - -{%- macro generate_port_qos_map(port_names_active) -%} - "PORT_QOS_MAP": { -{% for port in port_names_active.split(',') %} - "{{ port }}": { - "dscp_to_tc_map" : "NH_DEFAULT_DSCP_TO_TC_MAP", - "tc_to_queue_map" : "NH_DEFAULT_TC_TO_QUEUE_MAP", - "tc_to_pg_map" : "NH_DEFAULT_TC_TO_PRI_GROUP_MAP" - }{% if not loop.last %},{% endif %} -{% endfor %} - }, -{%- endmacro -%} - -{%- macro generate_scheduler_per_sku() -%} - "SCHEDULER": { - "scheduler.0": { - "type" : "DWRR", - "weight": "20" - }, - "scheduler.1": { - "type" : "DWRR", - "weight": "30" - }, - "scheduler.2": { - "type" : "DWRR", - "weight": "50" - }, - "scheduler.3": { - "cir": "2000000000", - "meter_type": "bytes", - "pir": "2000000000", - "type": "STRICT" - } - }, -{%- endmacro -%} - -{%- macro generate_single_queue_per_sku(port) -%} - "{{ port }}|0": { - "scheduler": "scheduler.0" - }, - "{{ port }}|1": { - "scheduler": "scheduler.0" - }, - "{{ port }}|2": { - "scheduler": "scheduler.1" - }, - "{{ port }}|3": { - "scheduler": "scheduler.2" - }, - "{{ port }}|4": { - "scheduler": "scheduler.2" - }, - "{{ port }}|5": { - "scheduler": "scheduler.2" - }, - "{{ port }}|6": { - "scheduler": "scheduler.3" - }, - "{{ port }}|7": { - "scheduler": "scheduler.3" - } -{%- endmacro -%} - -{%- macro generate_wred_profiles() %} -{# wred is disabled #} -{%- endmacro %} - {%- macro generate_qos_bypass_port_list(PORT_QOS_BYPASS) %} {# Generate list of ports #} {%- for port_idx in range(256, 261, 4) %} @@ -176,4 +9,24 @@ {%- endfor %} {%- endmacro %} +{%- macro generate_wred_profiles() %} + "WRED_PROFILE": { + "AZURE_LOSSLESS" : { + "wred_green_enable" : "true", + "wred_yellow_enable" : "true", + "wred_red_enable" : "true", + "ecn" : "ecn_all", + "green_max_threshold" : "10000000", + "green_min_threshold" : "2000000", + "yellow_max_threshold" : "10000000", + "yellow_min_threshold" : "2000000", + "red_max_threshold" : "10000000", + "red_min_threshold" : "2000000", + "green_drop_probability" : "5", + "yellow_drop_probability": "5", + "red_drop_probability" : "5" + } + }, +{%- endmacro %} + {%- include 'qos_config.j2' %} diff --git a/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/sai.profile b/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/sai.profile index f30aaeb5871..a7eb40dd8d7 100644 --- a/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/sai.profile +++ b/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/sai.profile @@ -1,2 +1,2 @@ -SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/nh5010-default.bcm +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/nh5010.bcm SAI_NUM_ECMP_MEMBERS=128 diff --git a/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/sai_postinit_cmd.soc b/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/sai_postinit_cmd.soc new file mode 100644 index 00000000000..8208ae1a8b7 --- /dev/null +++ b/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/sai_postinit_cmd.soc @@ -0,0 +1,227 @@ +setreg MSU_MACSEC_INTERRUPT_MASK_REGISTER.MSU13 0x0 +setreg MSU_MACSEC_INTERRUPT_MASK_REGISTER.MSU16 0x0 + +# Core=0 +INTeRrupt ENAble id=2249 p=0 +INTeRrupt ENAble id=2250 p=0 +INTeRrupt ENAble id=2251 p=0 +INTeRrupt ENAble id=2252 p=0 +INTeRrupt ENAble id=2253 p=0 +INTeRrupt ENAble id=2254 p=0 +INTeRrupt ENAble id=2255 p=0 +INTeRrupt ENAble id=2256 p=0 +INTeRrupt ENAble id=2257 p=0 +INTeRrupt ENAble id=2258 p=0 +INTeRrupt ENAble id=2259 p=0 +INTeRrupt ENAble id=2260 p=0 +INTeRrupt ENAble id=2261 p=0 +INTeRrupt ENAble id=2262 p=0 +INTeRrupt ENAble id=2263 p=0 + +INTeRrupt ENAble id=540 p=0 +INTeRrupt ENAble id=541 p=0 +INTeRrupt ENAble id=542 p=0 +INTeRrupt ENAble id=543 p=0 +INTeRrupt ENAble id=544 p=0 +INTeRrupt ENAble id=545 p=0 +INTeRrupt ENAble id=546 p=0 + +INTeRrupt ENAble id=1529 p=0 + +# Core=1 +INTeRrupt ENAble id=2249 p=1 +INTeRrupt ENAble id=2250 p=1 +INTeRrupt ENAble id=2251 p=1 +INTeRrupt ENAble id=2252 p=1 +INTeRrupt ENAble id=2253 p=1 +INTeRrupt ENAble id=2254 p=1 +INTeRrupt ENAble id=2255 p=1 +INTeRrupt ENAble id=2256 p=1 +INTeRrupt ENAble id=2257 p=1 +INTeRrupt ENAble id=2258 p=1 +INTeRrupt ENAble id=2259 p=1 +INTeRrupt ENAble id=2260 p=1 +INTeRrupt ENAble id=2261 p=1 +INTeRrupt ENAble id=2262 p=1 +INTeRrupt ENAble id=2263 p=1 + + +INTeRrupt ENAble id=541 p=1 +INTeRrupt ENAble id=542 p=1 +INTeRrupt ENAble id=543 p=1 +INTeRrupt ENAble id=544 p=1 +INTeRrupt ENAble id=545 p=1 +INTeRrupt ENAble id=546 p=1 + +INTeRrupt ENAble id=1529 p=1 + + +# Core=2 +INTeRrupt ENAble id=2249 p=2 +INTeRrupt ENAble id=2250 p=2 +INTeRrupt ENAble id=2251 p=2 +INTeRrupt ENAble id=2252 p=2 +INTeRrupt ENAble id=2253 p=2 +INTeRrupt ENAble id=2254 p=2 +INTeRrupt ENAble id=2255 p=2 +INTeRrupt ENAble id=2256 p=2 +INTeRrupt ENAble id=2257 p=2 +INTeRrupt ENAble id=2258 p=2 +INTeRrupt ENAble id=2259 p=2 +INTeRrupt ENAble id=2260 p=2 +INTeRrupt ENAble id=2261 p=2 +INTeRrupt ENAble id=2262 p=2 +INTeRrupt ENAble id=2263 p=2 + + +INTeRrupt ENAble id=541 p=2 +INTeRrupt ENAble id=542 p=2 +INTeRrupt ENAble id=543 p=2 +INTeRrupt ENAble id=544 p=2 +INTeRrupt ENAble id=545 p=2 +INTeRrupt ENAble id=546 p=2 + +INTeRrupt ENAble id=1529 p=2 + + +# Core=3 +INTeRrupt ENAble id=2249 p=3 +INTeRrupt ENAble id=2250 p=3 +INTeRrupt ENAble id=2251 p=3 +INTeRrupt ENAble id=2252 p=3 +INTeRrupt ENAble id=2253 p=3 +INTeRrupt ENAble id=2254 p=3 +INTeRrupt ENAble id=2255 p=3 +INTeRrupt ENAble id=2256 p=3 +INTeRrupt ENAble id=2257 p=3 +INTeRrupt ENAble id=2258 p=3 +INTeRrupt ENAble id=2259 p=3 +INTeRrupt ENAble id=2260 p=3 +INTeRrupt ENAble id=2261 p=3 +INTeRrupt ENAble id=2262 p=3 +INTeRrupt ENAble id=2263 p=3 + + +INTeRrupt ENAble id=541 p=3 +INTeRrupt ENAble id=542 p=3 +INTeRrupt ENAble id=543 p=3 +INTeRrupt ENAble id=544 p=3 +INTeRrupt ENAble id=545 p=3 +INTeRrupt ENAble id=546 p=3 + +INTeRrupt ENAble id=1529 p=3 + + +# Core=4 +INTeRrupt ENAble id=2249 p=4 +INTeRrupt ENAble id=2250 p=4 +INTeRrupt ENAble id=2251 p=4 +INTeRrupt ENAble id=2252 p=4 +INTeRrupt ENAble id=2253 p=4 +INTeRrupt ENAble id=2254 p=4 +INTeRrupt ENAble id=2255 p=4 +INTeRrupt ENAble id=2256 p=4 +INTeRrupt ENAble id=2257 p=4 +INTeRrupt ENAble id=2258 p=4 +INTeRrupt ENAble id=2259 p=4 +INTeRrupt ENAble id=2260 p=4 +INTeRrupt ENAble id=2261 p=4 +INTeRrupt ENAble id=2262 p=4 +INTeRrupt ENAble id=2263 p=4 + + +INTeRrupt ENAble id=541 p=4 +INTeRrupt ENAble id=542 p=4 +INTeRrupt ENAble id=543 p=4 +INTeRrupt ENAble id=544 p=4 +INTeRrupt ENAble id=545 p=4 +INTeRrupt ENAble id=546 p=4 + +INTeRrupt ENAble id=1529 p=4 + + +# Core=5 +INTeRrupt ENAble id=2249 p=5 +INTeRrupt ENAble id=2250 p=5 +INTeRrupt ENAble id=2251 p=5 +INTeRrupt ENAble id=2252 p=5 +INTeRrupt ENAble id=2253 p=5 +INTeRrupt ENAble id=2254 p=5 +INTeRrupt ENAble id=2255 p=5 +INTeRrupt ENAble id=2256 p=5 +INTeRrupt ENAble id=2257 p=5 +INTeRrupt ENAble id=2258 p=5 +INTeRrupt ENAble id=2259 p=5 +INTeRrupt ENAble id=2260 p=5 +INTeRrupt ENAble id=2261 p=5 +INTeRrupt ENAble id=2262 p=5 +INTeRrupt ENAble id=2263 p=5 + + +INTeRrupt ENAble id=541 p=5 +INTeRrupt ENAble id=542 p=5 +INTeRrupt ENAble id=543 p=5 +INTeRrupt ENAble id=544 p=5 +INTeRrupt ENAble id=545 p=5 +INTeRrupt ENAble id=546 p=5 + +INTeRrupt ENAble id=1529 p=5 + + +# Core=6 +INTeRrupt ENAble id=2249 p=6 +INTeRrupt ENAble id=2250 p=6 +INTeRrupt ENAble id=2251 p=6 +INTeRrupt ENAble id=2252 p=6 +INTeRrupt ENAble id=2253 p=6 +INTeRrupt ENAble id=2254 p=6 +INTeRrupt ENAble id=2255 p=6 +INTeRrupt ENAble id=2256 p=6 +INTeRrupt ENAble id=2257 p=6 +INTeRrupt ENAble id=2258 p=6 +INTeRrupt ENAble id=2259 p=6 +INTeRrupt ENAble id=2260 p=6 +INTeRrupt ENAble id=2261 p=6 +INTeRrupt ENAble id=2262 p=6 +INTeRrupt ENAble id=2263 p=6 + + +INTeRrupt ENAble id=541 p=6 +INTeRrupt ENAble id=542 p=6 +INTeRrupt ENAble id=543 p=6 +INTeRrupt ENAble id=544 p=6 +INTeRrupt ENAble id=545 p=6 +INTeRrupt ENAble id=546 p=6 + +INTeRrupt ENAble id=1529 p=6 + + +# Core=7 +INTeRrupt ENAble id=2249 p=7 +INTeRrupt ENAble id=2250 p=7 +INTeRrupt ENAble id=2251 p=7 +INTeRrupt ENAble id=2252 p=7 +INTeRrupt ENAble id=2253 p=7 +INTeRrupt ENAble id=2254 p=7 +INTeRrupt ENAble id=2255 p=7 +INTeRrupt ENAble id=2256 p=7 +INTeRrupt ENAble id=2257 p=7 +INTeRrupt ENAble id=2258 p=7 +INTeRrupt ENAble id=2259 p=7 +INTeRrupt ENAble id=2260 p=7 +INTeRrupt ENAble id=2261 p=7 +INTeRrupt ENAble id=2262 p=7 +INTeRrupt ENAble id=2263 p=7 + +INTeRrupt ENAble id=541 p=7 +INTeRrupt ENAble id=542 p=7 +INTeRrupt ENAble id=543 p=7 +INTeRrupt ENAble id=544 p=7 +INTeRrupt ENAble id=545 p=7 +INTeRrupt ENAble id=546 p=7 + +INTeRrupt ENAble id=1529 p=7 + + +debug intr error + diff --git a/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/templates/gearbox_config.json.j2 b/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/templates/gearbox_config.json.j2 new file mode 100644 index 00000000000..24dbf65d6fc --- /dev/null +++ b/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/templates/gearbox_config.json.j2 @@ -0,0 +1,239 @@ +{ + "phys": [ + { + "phy_id": 0, + "name": "phy0", + "address": "2031617", + "lib_name": "libsai.so", + "firmware_path": "", + "config_file": "/usr/share/sonic/hwsku/phy0_config.json", + "sai_init_config_file": "", + "phy_access": "mdio", + "bus_id": 0, + "context_id": 1, + "macsec_supported": false, + "hwinfo": "0" + }, + { + "phy_id": 1, + "name": "phy1", + "address": "2031616", + "lib_name": "libsai.so", + "firmware_path": "", + "config_file": "/usr/share/sonic/hwsku/phy1_config.json", + "sai_init_config_file": "", + "phy_access": "mdio", + "bus_id": 0, + "context_id": 1, + "macsec_supported": false, + "hwinfo": "1" + }, + { + "phy_id": 2, + "name": "phy2", + "address": "2031619", + "lib_name": "libsai.so", + "firmware_path": "", + "config_file": "/usr/share/sonic/hwsku/phy2_config.json", + "sai_init_config_file": "", + "phy_access": "mdio", + "bus_id": 0, + "context_id": 1, + "macsec_supported": false, + "hwinfo": "2" + }, + { + "phy_id": 3, + "name": "phy3", + "address": "2031618", + "lib_name": "libsai.so", + "firmware_path": "", + "config_file": "/usr/share/sonic/hwsku/phy3_config.json", + "sai_init_config_file": "", + "phy_access": "mdio", + "bus_id": 0, + "context_id": 1, + "macsec_supported": false, + "hwinfo": "3" + }, + { + "phy_id": 4, + "name": "phy4", + "address": "2031621", + "lib_name": "libsai.so", + "firmware_path": "", + "config_file": "/usr/share/sonic/hwsku/phy4_config.json", + "sai_init_config_file": "", + "phy_access": "mdio", + "bus_id": 0, + "context_id": 1, + "macsec_supported": false, + "hwinfo": "4" + }, + { + "phy_id": 5, + "name": "phy5", + "address": "2031620", + "lib_name": "libsai.so", + "firmware_path": "", + "config_file": "/usr/share/sonic/hwsku/phy5_config.json", + "sai_init_config_file": "", + "phy_access": "mdio", + "bus_id": 0, + "context_id": 1, + "macsec_supported": false, + "hwinfo": "5" + }, + { + "phy_id": 6, + "name": "phy6", + "address": "2031623", + "lib_name": "libsai.so", + "firmware_path": "", + "config_file": "/usr/share/sonic/hwsku/phy6_config.json", + "sai_init_config_file": "", + "phy_access": "mdio", + "bus_id": 0, + "context_id": 1, + "macsec_supported": false, + "hwinfo": "6" + }, + { + "phy_id": 7, + "name": "phy7", + "address": "2031622", + "lib_name": "libsai.so", + "firmware_path": "", + "config_file": "/usr/share/sonic/hwsku/phy7_config.json", + "sai_init_config_file": "", + "phy_access": "mdio", + "bus_id": 0, + "context_id": 1, + "macsec_supported": false, + "hwinfo": "7" + }, + { + "phy_id": 8, + "name": "phy8", + "address": "2031625", + "lib_name": "libsai.so", + "firmware_path": "", + "config_file": "/usr/share/sonic/hwsku/phy8_config.json", + "sai_init_config_file": "", + "phy_access": "mdio", + "bus_id": 0, + "context_id": 1, + "macsec_supported": false, + "hwinfo": "8" + }, + { + "phy_id": 9, + "name": "phy9", + "address": "2031624", + "lib_name": "libsai.so", + "firmware_path": "", + "config_file": "/usr/share/sonic/hwsku/phy9_config.json", + "sai_init_config_file": "", + "phy_access": "mdio", + "bus_id": 0, + "context_id": 1, + "macsec_supported": false, + "hwinfo": "9" + }, + { + "phy_id": 10, + "name": "phy10", + "address": "2031626", + "lib_name": "libsai.so", + "firmware_path": "", + "config_file": "/usr/share/sonic/hwsku/phy10_config.json", + "sai_init_config_file": "", + "phy_access": "mdio", + "bus_id": 0, + "context_id": 1, + "macsec_supported": false, + "hwinfo": "10" + }, + { + "phy_id": 11, + "name": "phy11", + "address": "2031627", + "lib_name": "libsai.so", + "firmware_path": "", + "config_file": "/usr/share/sonic/hwsku/phy11_config.json", + "sai_init_config_file": "", + "phy_access": "mdio", + "bus_id": 0, + "context_id": 1, + "macsec_supported": false, + "hwinfo": "11" + }, + { + "phy_id": 12, + "name": "phy12", + "address": "2031628", + "lib_name": "libsai.so", + "firmware_path": "", + "config_file": "/usr/share/sonic/hwsku/phy12_config.json", + "sai_init_config_file": "", + "phy_access": "mdio", + "bus_id": 0, + "context_id": 1, + "macsec_supported": false, + "hwinfo": "12" + }, + { + "phy_id": 13, + "name": "phy13", + "address": "2031629", + "lib_name": "libsai.so", + "firmware_path": "", + "config_file": "/usr/share/sonic/hwsku/phy13_config.json", + "sai_init_config_file": "", + "phy_access": "mdio", + "bus_id": 0, + "context_id": 1, + "macsec_supported": false, + "hwinfo": "13" + }, + { + "phy_id": 14, + "name": "phy14", + "address": "2031630", + "lib_name": "libsai.so", + "firmware_path": "", + "config_file": "/usr/share/sonic/hwsku/phy14_config.json", + "sai_init_config_file": "", + "phy_access": "mdio", + "bus_id": 0, + "context_id": 1, + "macsec_supported": false, + "hwinfo": "14" + }, + { + "phy_id": 15, + "name": "phy15", + "address": "2031631", + "lib_name": "libsai.so", + "firmware_path": "", + "config_file": "/usr/share/sonic/hwsku/phy15_config.json", + "sai_init_config_file": "", + "phy_access": "mdio", + "bus_id": 0, + "context_id": 1, + "macsec_supported": false, + "hwinfo": "15" + } + ], + "interfaces": [ + {% for iface in interfaces %} + { + "name": "{{ iface.name }}", + "index": {{ iface.index }}, + "phy_id": {{ iface.phy_id }}, + "system_lanes": [{{ iface.system_lanes | join(',') }}], + "line_lanes": [{{ iface.line_lanes | join(',') }}] + }{% if not loop.last %},{% endif %} + {% endfor %} + ] +} \ No newline at end of file diff --git a/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/templates/nh5010.bcm.j2 b/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/templates/nh5010.bcm.j2 new file mode 100644 index 00000000000..a25447508fb --- /dev/null +++ b/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/templates/nh5010.bcm.j2 @@ -0,0 +1,1906 @@ +# ---------------------------------------------------------------------------------------------------- +# core_0 +# ---------------------------------------------------------------------------------------------------- + +# core 0 lane0 +lane_to_serdes_map_nif_lane0.BCM8887X=rx6:tx7 +phy_rx_polarity_flip_phy0.BCM8887X=0 +phy_tx_polarity_flip_phy0.BCM8887X=1 + +# core 0 lane1 +lane_to_serdes_map_nif_lane1.BCM8887X=rx4:tx3 +phy_rx_polarity_flip_phy1.BCM8887X=0 +phy_tx_polarity_flip_phy1.BCM8887X=1 + +# core 0 lane2 +lane_to_serdes_map_nif_lane2.BCM8887X=rx7:tx1 +phy_rx_polarity_flip_phy2.BCM8887X=0 +phy_tx_polarity_flip_phy2.BCM8887X=0 + +# core 0 lane3 +lane_to_serdes_map_nif_lane3.BCM8887X=rx5:tx2 +phy_rx_polarity_flip_phy3.BCM8887X=0 +phy_tx_polarity_flip_phy3.BCM8887X=1 + +# core 0 lane4 +lane_to_serdes_map_nif_lane4.BCM8887X=rx2:tx0 +phy_rx_polarity_flip_phy4.BCM8887X=0 +phy_tx_polarity_flip_phy4.BCM8887X=0 + +# core 0 lane5 +lane_to_serdes_map_nif_lane5.BCM8887X=rx3:tx6 +phy_rx_polarity_flip_phy5.BCM8887X=1 +phy_tx_polarity_flip_phy5.BCM8887X=1 + +# core 0 lane6 +lane_to_serdes_map_nif_lane6.BCM8887X=rx0:tx4 +phy_rx_polarity_flip_phy6.BCM8887X=0 +phy_tx_polarity_flip_phy6.BCM8887X=0 + +# core 0 lane7 +lane_to_serdes_map_nif_lane7.BCM8887X=rx1:tx5 +phy_rx_polarity_flip_phy7.BCM8887X=0 +phy_tx_polarity_flip_phy7.BCM8887X=0 + + +# ---------------------------------------------------------------------------------------------------- +# core_1 +# ---------------------------------------------------------------------------------------------------- + +# core 1 lane8 +lane_to_serdes_map_nif_lane8.BCM8887X=rx10:tx8 +phy_rx_polarity_flip_phy8.BCM8887X=0 +phy_tx_polarity_flip_phy8.BCM8887X=0 + +# core 1 lane9 +lane_to_serdes_map_nif_lane9.BCM8887X=rx11:tx14 +phy_rx_polarity_flip_phy9.BCM8887X=1 +phy_tx_polarity_flip_phy9.BCM8887X=1 + +# core 1 lane10 +lane_to_serdes_map_nif_lane10.BCM8887X=rx8:tx12 +phy_rx_polarity_flip_phy10.BCM8887X=1 +phy_tx_polarity_flip_phy10.BCM8887X=0 + +# core 1 lane11 +lane_to_serdes_map_nif_lane11.BCM8887X=rx9:tx13 +phy_rx_polarity_flip_phy11.BCM8887X=0 +phy_tx_polarity_flip_phy11.BCM8887X=0 + +# core 1 lane12 +lane_to_serdes_map_nif_lane12.BCM8887X=rx14:tx15 +phy_rx_polarity_flip_phy12.BCM8887X=0 +phy_tx_polarity_flip_phy12.BCM8887X=1 + +# core 1 lane13 +lane_to_serdes_map_nif_lane13.BCM8887X=rx12:tx11 +phy_rx_polarity_flip_phy13.BCM8887X=0 +phy_tx_polarity_flip_phy13.BCM8887X=1 + +# core 1 lane14 +lane_to_serdes_map_nif_lane14.BCM8887X=rx15:tx9 +phy_rx_polarity_flip_phy14.BCM8887X=0 +phy_tx_polarity_flip_phy14.BCM8887X=0 + +# core 1 lane15 +lane_to_serdes_map_nif_lane15.BCM8887X=rx13:tx10 +phy_rx_polarity_flip_phy15.BCM8887X=0 +phy_tx_polarity_flip_phy15.BCM8887X=1 + + +# ---------------------------------------------------------------------------------------------------- +# core_2 +# ---------------------------------------------------------------------------------------------------- + +# core 2 lane16 +lane_to_serdes_map_nif_lane16.BCM8887X=rx18:tx16 +phy_rx_polarity_flip_phy16.BCM8887X=0 +phy_tx_polarity_flip_phy16.BCM8887X=0 + +# core 2 lane17 +lane_to_serdes_map_nif_lane17.BCM8887X=rx19:tx22 +phy_rx_polarity_flip_phy17.BCM8887X=1 +phy_tx_polarity_flip_phy17.BCM8887X=1 + +# core 2 lane18 +lane_to_serdes_map_nif_lane18.BCM8887X=rx16:tx20 +phy_rx_polarity_flip_phy18.BCM8887X=0 +phy_tx_polarity_flip_phy18.BCM8887X=0 + +# core 2 lane19 +lane_to_serdes_map_nif_lane19.BCM8887X=rx17:tx21 +phy_rx_polarity_flip_phy19.BCM8887X=0 +phy_tx_polarity_flip_phy19.BCM8887X=0 + +# core 2 lane20 +lane_to_serdes_map_nif_lane20.BCM8887X=rx22:tx23 +phy_rx_polarity_flip_phy20.BCM8887X=0 +phy_tx_polarity_flip_phy20.BCM8887X=1 + +# core 2 lane21 +lane_to_serdes_map_nif_lane21.BCM8887X=rx20:tx19 +phy_rx_polarity_flip_phy21.BCM8887X=0 +phy_tx_polarity_flip_phy21.BCM8887X=1 + +# core 2 lane22 +lane_to_serdes_map_nif_lane22.BCM8887X=rx23:tx17 +phy_rx_polarity_flip_phy22.BCM8887X=0 +phy_tx_polarity_flip_phy22.BCM8887X=0 + +# core 2 lane23 +lane_to_serdes_map_nif_lane23.BCM8887X=rx21:tx18 +phy_rx_polarity_flip_phy23.BCM8887X=0 +phy_tx_polarity_flip_phy23.BCM8887X=1 + + +# ---------------------------------------------------------------------------------------------------- +# core_3 +# ---------------------------------------------------------------------------------------------------- + +# core 3 lane24 +lane_to_serdes_map_nif_lane24.BCM8887X=rx26:tx26 +phy_rx_polarity_flip_phy24.BCM8887X=1 +phy_tx_polarity_flip_phy24.BCM8887X=0 + +# core 3 lane25 +lane_to_serdes_map_nif_lane25.BCM8887X=rx27:tx25 +phy_rx_polarity_flip_phy25.BCM8887X=0 +phy_tx_polarity_flip_phy25.BCM8887X=1 + +# core 3 lane26 +lane_to_serdes_map_nif_lane26.BCM8887X=rx28:tx31 +phy_rx_polarity_flip_phy26.BCM8887X=0 +phy_tx_polarity_flip_phy26.BCM8887X=0 + +# core 3 lane27 +lane_to_serdes_map_nif_lane27.BCM8887X=rx30:tx24 +phy_rx_polarity_flip_phy27.BCM8887X=1 +phy_tx_polarity_flip_phy27.BCM8887X=0 + +# core 3 lane28 +lane_to_serdes_map_nif_lane28.BCM8887X=rx29:tx28 +phy_rx_polarity_flip_phy28.BCM8887X=1 +phy_tx_polarity_flip_phy28.BCM8887X=1 + +# core 3 lane29 +lane_to_serdes_map_nif_lane29.BCM8887X=rx31:tx27 +phy_rx_polarity_flip_phy29.BCM8887X=0 +phy_tx_polarity_flip_phy29.BCM8887X=1 + +# core 3 lane30 +lane_to_serdes_map_nif_lane30.BCM8887X=rx24:tx30 +phy_rx_polarity_flip_phy30.BCM8887X=0 +phy_tx_polarity_flip_phy30.BCM8887X=1 + +# core 3 lane31 +lane_to_serdes_map_nif_lane31.BCM8887X=rx25:tx29 +phy_rx_polarity_flip_phy31.BCM8887X=0 +phy_tx_polarity_flip_phy31.BCM8887X=1 + + +# ---------------------------------------------------------------------------------------------------- +# core_4 +# ---------------------------------------------------------------------------------------------------- + +# core 4 lane32 +lane_to_serdes_map_nif_lane32.BCM8887X=rx35:tx39 +phy_rx_polarity_flip_phy32.BCM8887X=1 +phy_tx_polarity_flip_phy32.BCM8887X=0 + +# core 4 lane33 +lane_to_serdes_map_nif_lane33.BCM8887X=rx34:tx35 +phy_rx_polarity_flip_phy33.BCM8887X=0 +phy_tx_polarity_flip_phy33.BCM8887X=0 + +# core 4 lane34 +lane_to_serdes_map_nif_lane34.BCM8887X=rx37:tx34 +phy_rx_polarity_flip_phy34.BCM8887X=1 +phy_tx_polarity_flip_phy34.BCM8887X=0 + +# core 4 lane35 +lane_to_serdes_map_nif_lane35.BCM8887X=rx39:tx33 +phy_rx_polarity_flip_phy35.BCM8887X=1 +phy_tx_polarity_flip_phy35.BCM8887X=1 + +# core 4 lane36 +lane_to_serdes_map_nif_lane36.BCM8887X=rx33:tx36 +phy_rx_polarity_flip_phy36.BCM8887X=1 +phy_tx_polarity_flip_phy36.BCM8887X=0 + +# core 4 lane37 +lane_to_serdes_map_nif_lane37.BCM8887X=rx32:tx37 +phy_rx_polarity_flip_phy37.BCM8887X=0 +phy_tx_polarity_flip_phy37.BCM8887X=1 + +# core 4 lane38 +lane_to_serdes_map_nif_lane38.BCM8887X=rx36:tx38 +phy_rx_polarity_flip_phy38.BCM8887X=0 +phy_tx_polarity_flip_phy38.BCM8887X=0 + +# core 4 lane39 +lane_to_serdes_map_nif_lane39.BCM8887X=rx38:tx32 +phy_rx_polarity_flip_phy39.BCM8887X=0 +phy_tx_polarity_flip_phy39.BCM8887X=1 + + +# ---------------------------------------------------------------------------------------------------- +# core_5 +# ---------------------------------------------------------------------------------------------------- + +# core 5 lane40 +lane_to_serdes_map_nif_lane40.BCM8887X=rx43:tx47 +phy_rx_polarity_flip_phy40.BCM8887X=1 +phy_tx_polarity_flip_phy40.BCM8887X=0 + +# core 5 lane41 +lane_to_serdes_map_nif_lane41.BCM8887X=rx42:tx43 +phy_rx_polarity_flip_phy41.BCM8887X=0 +phy_tx_polarity_flip_phy41.BCM8887X=0 + +# core 5 lane42 +lane_to_serdes_map_nif_lane42.BCM8887X=rx45:tx42 +phy_rx_polarity_flip_phy42.BCM8887X=1 +phy_tx_polarity_flip_phy42.BCM8887X=0 + +# core 5 lane43 +lane_to_serdes_map_nif_lane43.BCM8887X=rx47:tx41 +phy_rx_polarity_flip_phy43.BCM8887X=1 +phy_tx_polarity_flip_phy43.BCM8887X=1 + +# core 5 lane44 +lane_to_serdes_map_nif_lane44.BCM8887X=rx41:tx44 +phy_rx_polarity_flip_phy44.BCM8887X=1 +phy_tx_polarity_flip_phy44.BCM8887X=0 + +# core 5 lane45 +lane_to_serdes_map_nif_lane45.BCM8887X=rx40:tx45 +phy_rx_polarity_flip_phy45.BCM8887X=0 +phy_tx_polarity_flip_phy45.BCM8887X=1 + +# core 5 lane46 +lane_to_serdes_map_nif_lane46.BCM8887X=rx44:tx46 +phy_rx_polarity_flip_phy46.BCM8887X=0 +phy_tx_polarity_flip_phy46.BCM8887X=0 + +# core 5 lane47 +lane_to_serdes_map_nif_lane47.BCM8887X=rx46:tx40 +phy_rx_polarity_flip_phy47.BCM8887X=0 +phy_tx_polarity_flip_phy47.BCM8887X=1 + + +# ---------------------------------------------------------------------------------------------------- +# core_6 +# ---------------------------------------------------------------------------------------------------- + +# core 6 lane48 +lane_to_serdes_map_nif_lane48.BCM8887X=rx51:tx55 +phy_rx_polarity_flip_phy48.BCM8887X=1 +phy_tx_polarity_flip_phy48.BCM8887X=0 + +# core 6 lane49 +lane_to_serdes_map_nif_lane49.BCM8887X=rx50:tx51 +phy_rx_polarity_flip_phy49.BCM8887X=0 +phy_tx_polarity_flip_phy49.BCM8887X=0 + +# core 6 lane50 +lane_to_serdes_map_nif_lane50.BCM8887X=rx53:tx50 +phy_rx_polarity_flip_phy50.BCM8887X=1 +phy_tx_polarity_flip_phy50.BCM8887X=0 + +# core 6 lane51 +lane_to_serdes_map_nif_lane51.BCM8887X=rx55:tx49 +phy_rx_polarity_flip_phy51.BCM8887X=1 +phy_tx_polarity_flip_phy51.BCM8887X=1 + +# core 6 lane52 +lane_to_serdes_map_nif_lane52.BCM8887X=rx49:tx52 +phy_rx_polarity_flip_phy52.BCM8887X=1 +phy_tx_polarity_flip_phy52.BCM8887X=0 + +# core 6 lane53 +lane_to_serdes_map_nif_lane53.BCM8887X=rx48:tx53 +phy_rx_polarity_flip_phy53.BCM8887X=0 +phy_tx_polarity_flip_phy53.BCM8887X=1 + +# core 6 lane54 +lane_to_serdes_map_nif_lane54.BCM8887X=rx52:tx54 +phy_rx_polarity_flip_phy54.BCM8887X=0 +phy_tx_polarity_flip_phy54.BCM8887X=0 + +# core 6 lane55 +lane_to_serdes_map_nif_lane55.BCM8887X=rx54:tx48 +phy_rx_polarity_flip_phy55.BCM8887X=0 +phy_tx_polarity_flip_phy55.BCM8887X=1 + + +# ---------------------------------------------------------------------------------------------------- +# core_7 +# ---------------------------------------------------------------------------------------------------- + +# core 7 lane56 +lane_to_serdes_map_nif_lane56.BCM8887X=rx58:tx59 +phy_rx_polarity_flip_phy56.BCM8887X=1 +phy_tx_polarity_flip_phy56.BCM8887X=1 + +# core 7 lane57 +lane_to_serdes_map_nif_lane57.BCM8887X=rx59:tx61 +phy_rx_polarity_flip_phy57.BCM8887X=0 +phy_tx_polarity_flip_phy57.BCM8887X=1 + +# core 7 lane58 +lane_to_serdes_map_nif_lane58.BCM8887X=rx60:tx60 +phy_rx_polarity_flip_phy58.BCM8887X=0 +phy_tx_polarity_flip_phy58.BCM8887X=1 + +# core 7 lane59 +lane_to_serdes_map_nif_lane59.BCM8887X=rx62:tx56 +phy_rx_polarity_flip_phy59.BCM8887X=1 +phy_tx_polarity_flip_phy59.BCM8887X=1 + +# core 7 lane60 +lane_to_serdes_map_nif_lane60.BCM8887X=rx56:tx62 +phy_rx_polarity_flip_phy60.BCM8887X=0 +phy_tx_polarity_flip_phy60.BCM8887X=0 + +# core 7 lane61 +lane_to_serdes_map_nif_lane61.BCM8887X=rx57:tx58 +phy_rx_polarity_flip_phy61.BCM8887X=0 +phy_tx_polarity_flip_phy61.BCM8887X=0 + +# core 7 lane62 +lane_to_serdes_map_nif_lane62.BCM8887X=rx63:tx63 +phy_rx_polarity_flip_phy62.BCM8887X=0 +phy_tx_polarity_flip_phy62.BCM8887X=1 + +# core 7 lane63 +lane_to_serdes_map_nif_lane63.BCM8887X=rx61:tx57 +phy_rx_polarity_flip_phy63.BCM8887X=0 +phy_tx_polarity_flip_phy63.BCM8887X=1 + + +# ---------------------------------------------------------------------------------------------------- +# core_8 +# ---------------------------------------------------------------------------------------------------- + +# core 8 lane64 +lane_to_serdes_map_nif_lane64.BCM8887X=rx67:tx71 +phy_rx_polarity_flip_phy64.BCM8887X=0 +phy_tx_polarity_flip_phy64.BCM8887X=0 + +# core 8 lane65 +lane_to_serdes_map_nif_lane65.BCM8887X=rx66:tx65 +phy_rx_polarity_flip_phy65.BCM8887X=0 +phy_tx_polarity_flip_phy65.BCM8887X=1 + +# core 8 lane66 +lane_to_serdes_map_nif_lane66.BCM8887X=rx70:tx70 +phy_rx_polarity_flip_phy66.BCM8887X=1 +phy_tx_polarity_flip_phy66.BCM8887X=1 + +# core 8 lane67 +lane_to_serdes_map_nif_lane67.BCM8887X=rx68:tx66 +phy_rx_polarity_flip_phy67.BCM8887X=1 +phy_tx_polarity_flip_phy67.BCM8887X=0 + +# core 8 lane68 +lane_to_serdes_map_nif_lane68.BCM8887X=rx69:tx67 +phy_rx_polarity_flip_phy68.BCM8887X=0 +phy_tx_polarity_flip_phy68.BCM8887X=0 + +# core 8 lane69 +lane_to_serdes_map_nif_lane69.BCM8887X=rx71:tx69 +phy_rx_polarity_flip_phy69.BCM8887X=1 +phy_tx_polarity_flip_phy69.BCM8887X=1 + +# core 8 lane70 +lane_to_serdes_map_nif_lane70.BCM8887X=rx65:tx68 +phy_rx_polarity_flip_phy70.BCM8887X=0 +phy_tx_polarity_flip_phy70.BCM8887X=0 + +# core 8 lane71 +lane_to_serdes_map_nif_lane71.BCM8887X=rx64:tx64 +phy_rx_polarity_flip_phy71.BCM8887X=1 +phy_tx_polarity_flip_phy71.BCM8887X=1 + + +# ---------------------------------------------------------------------------------------------------- +# core_9 +# ---------------------------------------------------------------------------------------------------- + +# core 9 lane72 +lane_to_serdes_map_nif_lane72.BCM8887X=rx75:tx79 +phy_rx_polarity_flip_phy72.BCM8887X=0 +phy_tx_polarity_flip_phy72.BCM8887X=0 + +# core 9 lane73 +lane_to_serdes_map_nif_lane73.BCM8887X=rx74:tx73 +phy_rx_polarity_flip_phy73.BCM8887X=0 +phy_tx_polarity_flip_phy73.BCM8887X=1 + +# core 9 lane74 +lane_to_serdes_map_nif_lane74.BCM8887X=rx78:tx78 +phy_rx_polarity_flip_phy74.BCM8887X=1 +phy_tx_polarity_flip_phy74.BCM8887X=1 + +# core 9 lane75 +lane_to_serdes_map_nif_lane75.BCM8887X=rx76:tx74 +phy_rx_polarity_flip_phy75.BCM8887X=1 +phy_tx_polarity_flip_phy75.BCM8887X=0 + +# core 9 lane76 +lane_to_serdes_map_nif_lane76.BCM8887X=rx77:tx75 +phy_rx_polarity_flip_phy76.BCM8887X=0 +phy_tx_polarity_flip_phy76.BCM8887X=0 + +# core 9 lane77 +lane_to_serdes_map_nif_lane77.BCM8887X=rx79:tx77 +phy_rx_polarity_flip_phy77.BCM8887X=1 +phy_tx_polarity_flip_phy77.BCM8887X=1 + +# core 9 lane78 +lane_to_serdes_map_nif_lane78.BCM8887X=rx73:tx76 +phy_rx_polarity_flip_phy78.BCM8887X=0 +phy_tx_polarity_flip_phy78.BCM8887X=0 + +# core 9 lane79 +lane_to_serdes_map_nif_lane79.BCM8887X=rx72:tx72 +phy_rx_polarity_flip_phy79.BCM8887X=1 +phy_tx_polarity_flip_phy79.BCM8887X=1 + + +# ---------------------------------------------------------------------------------------------------- +# core_10 +# ---------------------------------------------------------------------------------------------------- + +# core 10 lane80 +lane_to_serdes_map_nif_lane80.BCM8887X=rx83:tx87 +phy_rx_polarity_flip_phy80.BCM8887X=0 +phy_tx_polarity_flip_phy80.BCM8887X=0 + +# core 10 lane81 +lane_to_serdes_map_nif_lane81.BCM8887X=rx82:tx81 +phy_rx_polarity_flip_phy81.BCM8887X=0 +phy_tx_polarity_flip_phy81.BCM8887X=1 + +# core 10 lane82 +lane_to_serdes_map_nif_lane82.BCM8887X=rx86:tx86 +phy_rx_polarity_flip_phy82.BCM8887X=1 +phy_tx_polarity_flip_phy82.BCM8887X=1 + +# core 10 lane83 +lane_to_serdes_map_nif_lane83.BCM8887X=rx84:tx82 +phy_rx_polarity_flip_phy83.BCM8887X=1 +phy_tx_polarity_flip_phy83.BCM8887X=0 + +# core 10 lane84 +lane_to_serdes_map_nif_lane84.BCM8887X=rx85:tx83 +phy_rx_polarity_flip_phy84.BCM8887X=0 +phy_tx_polarity_flip_phy84.BCM8887X=0 + +# core 10 lane85 +lane_to_serdes_map_nif_lane85.BCM8887X=rx87:tx85 +phy_rx_polarity_flip_phy85.BCM8887X=1 +phy_tx_polarity_flip_phy85.BCM8887X=1 + +# core 10 lane86 +lane_to_serdes_map_nif_lane86.BCM8887X=rx81:tx84 +phy_rx_polarity_flip_phy86.BCM8887X=0 +phy_tx_polarity_flip_phy86.BCM8887X=0 + +# core 10 lane87 +lane_to_serdes_map_nif_lane87.BCM8887X=rx80:tx80 +phy_rx_polarity_flip_phy87.BCM8887X=1 +phy_tx_polarity_flip_phy87.BCM8887X=1 + + +# ---------------------------------------------------------------------------------------------------- +# core_11 +# ---------------------------------------------------------------------------------------------------- + +# core 11 lane88 +lane_to_serdes_map_nif_lane88.BCM8887X=rx91:tx95 +phy_rx_polarity_flip_phy88.BCM8887X=0 +phy_tx_polarity_flip_phy88.BCM8887X=0 + +# core 11 lane89 +lane_to_serdes_map_nif_lane89.BCM8887X=rx90:tx89 +phy_rx_polarity_flip_phy89.BCM8887X=0 +phy_tx_polarity_flip_phy89.BCM8887X=1 + +# core 11 lane90 +lane_to_serdes_map_nif_lane90.BCM8887X=rx94:tx94 +phy_rx_polarity_flip_phy90.BCM8887X=1 +phy_tx_polarity_flip_phy90.BCM8887X=1 + +# core 11 lane91 +lane_to_serdes_map_nif_lane91.BCM8887X=rx92:tx90 +phy_rx_polarity_flip_phy91.BCM8887X=1 +phy_tx_polarity_flip_phy91.BCM8887X=0 + +# core 11 lane92 +lane_to_serdes_map_nif_lane92.BCM8887X=rx93:tx91 +phy_rx_polarity_flip_phy92.BCM8887X=0 +phy_tx_polarity_flip_phy92.BCM8887X=0 + +# core 11 lane93 +lane_to_serdes_map_nif_lane93.BCM8887X=rx95:tx93 +phy_rx_polarity_flip_phy93.BCM8887X=1 +phy_tx_polarity_flip_phy93.BCM8887X=1 + +# core 11 lane94 +lane_to_serdes_map_nif_lane94.BCM8887X=rx89:tx92 +phy_rx_polarity_flip_phy94.BCM8887X=0 +phy_tx_polarity_flip_phy94.BCM8887X=0 + +# core 11 lane95 +lane_to_serdes_map_nif_lane95.BCM8887X=rx88:tx88 +phy_rx_polarity_flip_phy95.BCM8887X=1 +phy_tx_polarity_flip_phy95.BCM8887X=1 + + +# ---------------------------------------------------------------------------------------------------- +# core_12 +# ---------------------------------------------------------------------------------------------------- + +# core 12 lane96 +lane_to_serdes_map_nif_lane96.BCM8887X=rx100:tx103 +phy_rx_polarity_flip_phy96.BCM8887X=1 +phy_tx_polarity_flip_phy96.BCM8887X=0 + +# core 12 lane97 +lane_to_serdes_map_nif_lane97.BCM8887X=rx96:tx98 +phy_rx_polarity_flip_phy97.BCM8887X=1 +phy_tx_polarity_flip_phy97.BCM8887X=1 + +# core 12 lane98 +lane_to_serdes_map_nif_lane98.BCM8887X=rx99:tx99 +phy_rx_polarity_flip_phy98.BCM8887X=0 +phy_tx_polarity_flip_phy98.BCM8887X=0 + +# core 12 lane99 +lane_to_serdes_map_nif_lane99.BCM8887X=rx101:tx97 +phy_rx_polarity_flip_phy99.BCM8887X=0 +phy_tx_polarity_flip_phy99.BCM8887X=0 + +# core 12 lane100 +lane_to_serdes_map_nif_lane100.BCM8887X=rx98:tx100 +phy_rx_polarity_flip_phy100.BCM8887X=1 +phy_tx_polarity_flip_phy100.BCM8887X=0 + +# core 12 lane101 +lane_to_serdes_map_nif_lane101.BCM8887X=rx103:tx96 +phy_rx_polarity_flip_phy101.BCM8887X=1 +phy_tx_polarity_flip_phy101.BCM8887X=0 + +# core 12 lane102 +lane_to_serdes_map_nif_lane102.BCM8887X=rx102:tx101 +phy_rx_polarity_flip_phy102.BCM8887X=0 +phy_tx_polarity_flip_phy102.BCM8887X=1 + +# core 12 lane103 +lane_to_serdes_map_nif_lane103.BCM8887X=rx97:tx102 +phy_rx_polarity_flip_phy103.BCM8887X=1 +phy_tx_polarity_flip_phy103.BCM8887X=1 + + +# ---------------------------------------------------------------------------------------------------- +# core_13 +# ---------------------------------------------------------------------------------------------------- + +# core 13 lane104 +lane_to_serdes_map_nif_lane104.BCM8887X=rx107:tx108 +phy_rx_polarity_flip_phy104.BCM8887X=1 +phy_tx_polarity_flip_phy104.BCM8887X=0 + +# core 13 lane105 +lane_to_serdes_map_nif_lane105.BCM8887X=rx106:tx107 +phy_rx_polarity_flip_phy105.BCM8887X=0 +phy_tx_polarity_flip_phy105.BCM8887X=1 + +# core 13 lane106 +lane_to_serdes_map_nif_lane106.BCM8887X=rx110:tx110 +phy_rx_polarity_flip_phy106.BCM8887X=0 +phy_tx_polarity_flip_phy106.BCM8887X=0 + +# core 13 lane107 +lane_to_serdes_map_nif_lane107.BCM8887X=rx108:tx109 +phy_rx_polarity_flip_phy107.BCM8887X=0 +phy_tx_polarity_flip_phy107.BCM8887X=1 + +# core 13 lane108 +lane_to_serdes_map_nif_lane108.BCM8887X=rx105:tx111 +phy_rx_polarity_flip_phy108.BCM8887X=1 +phy_tx_polarity_flip_phy108.BCM8887X=1 + +# core 13 lane109 +lane_to_serdes_map_nif_lane109.BCM8887X=rx104:tx104 +phy_rx_polarity_flip_phy109.BCM8887X=0 +phy_tx_polarity_flip_phy109.BCM8887X=0 + +# core 13 lane110 +lane_to_serdes_map_nif_lane110.BCM8887X=rx111:tx106 +phy_rx_polarity_flip_phy110.BCM8887X=1 +phy_tx_polarity_flip_phy110.BCM8887X=1 + +# core 13 lane111 +lane_to_serdes_map_nif_lane111.BCM8887X=rx109:tx105 +phy_rx_polarity_flip_phy111.BCM8887X=1 +phy_tx_polarity_flip_phy111.BCM8887X=1 + + +# ---------------------------------------------------------------------------------------------------- +# core_14 +# ---------------------------------------------------------------------------------------------------- + +# core 14 lane112 +lane_to_serdes_map_nif_lane112.BCM8887X=rx115:tx116 +phy_rx_polarity_flip_phy112.BCM8887X=1 +phy_tx_polarity_flip_phy112.BCM8887X=0 + +# core 14 lane113 +lane_to_serdes_map_nif_lane113.BCM8887X=rx114:tx115 +phy_rx_polarity_flip_phy113.BCM8887X=1 +phy_tx_polarity_flip_phy113.BCM8887X=1 + +# core 14 lane114 +lane_to_serdes_map_nif_lane114.BCM8887X=rx118:tx118 +phy_rx_polarity_flip_phy114.BCM8887X=0 +phy_tx_polarity_flip_phy114.BCM8887X=0 + +# core 14 lane115 +lane_to_serdes_map_nif_lane115.BCM8887X=rx116:tx117 +phy_rx_polarity_flip_phy115.BCM8887X=0 +phy_tx_polarity_flip_phy115.BCM8887X=1 + +# core 14 lane116 +lane_to_serdes_map_nif_lane116.BCM8887X=rx113:tx119 +phy_rx_polarity_flip_phy116.BCM8887X=1 +phy_tx_polarity_flip_phy116.BCM8887X=1 + +# core 14 lane117 +lane_to_serdes_map_nif_lane117.BCM8887X=rx112:tx112 +phy_rx_polarity_flip_phy117.BCM8887X=0 +phy_tx_polarity_flip_phy117.BCM8887X=0 + +# core 14 lane118 +lane_to_serdes_map_nif_lane118.BCM8887X=rx119:tx114 +phy_rx_polarity_flip_phy118.BCM8887X=1 +phy_tx_polarity_flip_phy118.BCM8887X=1 + +# core 14 lane119 +lane_to_serdes_map_nif_lane119.BCM8887X=rx117:tx113 +phy_rx_polarity_flip_phy119.BCM8887X=1 +phy_tx_polarity_flip_phy119.BCM8887X=1 + + +# ---------------------------------------------------------------------------------------------------- +# core_15 +# ---------------------------------------------------------------------------------------------------- + +# core 15 lane120 +lane_to_serdes_map_nif_lane120.BCM8887X=rx123:tx124 +phy_rx_polarity_flip_phy120.BCM8887X=1 +phy_tx_polarity_flip_phy120.BCM8887X=0 + +# core 15 lane121 +lane_to_serdes_map_nif_lane121.BCM8887X=rx122:tx123 +phy_rx_polarity_flip_phy121.BCM8887X=1 +phy_tx_polarity_flip_phy121.BCM8887X=1 + +# core 15 lane122 +lane_to_serdes_map_nif_lane122.BCM8887X=rx126:tx126 +phy_rx_polarity_flip_phy122.BCM8887X=0 +phy_tx_polarity_flip_phy122.BCM8887X=0 + +# core 15 lane123 +lane_to_serdes_map_nif_lane123.BCM8887X=rx124:tx125 +phy_rx_polarity_flip_phy123.BCM8887X=0 +phy_tx_polarity_flip_phy123.BCM8887X=1 + +# core 15 lane124 +lane_to_serdes_map_nif_lane124.BCM8887X=rx121:tx127 +phy_rx_polarity_flip_phy124.BCM8887X=1 +phy_tx_polarity_flip_phy124.BCM8887X=1 + +# core 15 lane125 +lane_to_serdes_map_nif_lane125.BCM8887X=rx120:tx120 +phy_rx_polarity_flip_phy125.BCM8887X=0 +phy_tx_polarity_flip_phy125.BCM8887X=0 + +# core 15 lane126 +lane_to_serdes_map_nif_lane126.BCM8887X=rx127:tx122 +phy_rx_polarity_flip_phy126.BCM8887X=1 +phy_tx_polarity_flip_phy126.BCM8887X=1 + +# core 15 lane127 +lane_to_serdes_map_nif_lane127.BCM8887X=rx125:tx121 +phy_rx_polarity_flip_phy127.BCM8887X=1 +phy_tx_polarity_flip_phy127.BCM8887X=1 + + +# ---------------------------------------------------------------------------------------------------- +# core_16 +# ---------------------------------------------------------------------------------------------------- + +# core 16 lane128 +lane_to_serdes_map_nif_lane128.BCM8887X=rx131:tx135 +phy_rx_polarity_flip_phy128.BCM8887X=0 +phy_tx_polarity_flip_phy128.BCM8887X=0 + +# core 16 lane129 +lane_to_serdes_map_nif_lane129.BCM8887X=rx130:tx131 +phy_rx_polarity_flip_phy129.BCM8887X=0 +phy_tx_polarity_flip_phy129.BCM8887X=1 + +# core 16 lane130 +lane_to_serdes_map_nif_lane130.BCM8887X=rx129:tx129 +phy_rx_polarity_flip_phy130.BCM8887X=1 +phy_tx_polarity_flip_phy130.BCM8887X=1 + +# core 16 lane131 +lane_to_serdes_map_nif_lane131.BCM8887X=rx128:tx130 +phy_rx_polarity_flip_phy131.BCM8887X=0 +phy_tx_polarity_flip_phy131.BCM8887X=1 + +# core 16 lane132 +lane_to_serdes_map_nif_lane132.BCM8887X=rx133:tx132 +phy_rx_polarity_flip_phy132.BCM8887X=1 +phy_tx_polarity_flip_phy132.BCM8887X=1 + +# core 16 lane133 +lane_to_serdes_map_nif_lane133.BCM8887X=rx135:tx133 +phy_rx_polarity_flip_phy133.BCM8887X=0 +phy_tx_polarity_flip_phy133.BCM8887X=0 + +# core 16 lane134 +lane_to_serdes_map_nif_lane134.BCM8887X=rx132:tx128 +phy_rx_polarity_flip_phy134.BCM8887X=1 +phy_tx_polarity_flip_phy134.BCM8887X=1 + +# core 16 lane135 +lane_to_serdes_map_nif_lane135.BCM8887X=rx134:tx134 +phy_rx_polarity_flip_phy135.BCM8887X=0 +phy_tx_polarity_flip_phy135.BCM8887X=1 + + +# ---------------------------------------------------------------------------------------------------- +# core_17 +# ---------------------------------------------------------------------------------------------------- + +# core 17 lane136 +lane_to_serdes_map_nif_lane136.BCM8887X=rx139:tx143 +phy_rx_polarity_flip_phy136.BCM8887X=0 +phy_tx_polarity_flip_phy136.BCM8887X=0 + +# core 17 lane137 +lane_to_serdes_map_nif_lane137.BCM8887X=rx138:tx139 +phy_rx_polarity_flip_phy137.BCM8887X=0 +phy_tx_polarity_flip_phy137.BCM8887X=1 + +# core 17 lane138 +lane_to_serdes_map_nif_lane138.BCM8887X=rx137:tx137 +phy_rx_polarity_flip_phy138.BCM8887X=1 +phy_tx_polarity_flip_phy138.BCM8887X=1 + +# core 17 lane139 +lane_to_serdes_map_nif_lane139.BCM8887X=rx136:tx138 +phy_rx_polarity_flip_phy139.BCM8887X=1 +phy_tx_polarity_flip_phy139.BCM8887X=1 + +# core 17 lane140 +lane_to_serdes_map_nif_lane140.BCM8887X=rx141:tx140 +phy_rx_polarity_flip_phy140.BCM8887X=1 +phy_tx_polarity_flip_phy140.BCM8887X=1 + +# core 17 lane141 +lane_to_serdes_map_nif_lane141.BCM8887X=rx143:tx141 +phy_rx_polarity_flip_phy141.BCM8887X=0 +phy_tx_polarity_flip_phy141.BCM8887X=0 + +# core 17 lane142 +lane_to_serdes_map_nif_lane142.BCM8887X=rx140:tx136 +phy_rx_polarity_flip_phy142.BCM8887X=1 +phy_tx_polarity_flip_phy142.BCM8887X=1 + +# core 17 lane143 +lane_to_serdes_map_nif_lane143.BCM8887X=rx142:tx142 +phy_rx_polarity_flip_phy143.BCM8887X=0 +phy_tx_polarity_flip_phy143.BCM8887X=1 + + +# ---------------------------------------------------------------------------------------------------- +# core_18 +# ---------------------------------------------------------------------------------------------------- + +# core 18 lane144 +lane_to_serdes_map_nif_lane144.BCM8887X=rx147:tx151 +phy_rx_polarity_flip_phy144.BCM8887X=0 +phy_tx_polarity_flip_phy144.BCM8887X=0 + +# core 18 lane145 +lane_to_serdes_map_nif_lane145.BCM8887X=rx146:tx147 +phy_rx_polarity_flip_phy145.BCM8887X=0 +phy_tx_polarity_flip_phy145.BCM8887X=1 + +# core 18 lane146 +lane_to_serdes_map_nif_lane146.BCM8887X=rx145:tx145 +phy_rx_polarity_flip_phy146.BCM8887X=1 +phy_tx_polarity_flip_phy146.BCM8887X=1 + +# core 18 lane147 +lane_to_serdes_map_nif_lane147.BCM8887X=rx144:tx146 +phy_rx_polarity_flip_phy147.BCM8887X=0 +phy_tx_polarity_flip_phy147.BCM8887X=1 + +# core 18 lane148 +lane_to_serdes_map_nif_lane148.BCM8887X=rx149:tx148 +phy_rx_polarity_flip_phy148.BCM8887X=1 +phy_tx_polarity_flip_phy148.BCM8887X=1 + +# core 18 lane149 +lane_to_serdes_map_nif_lane149.BCM8887X=rx151:tx149 +phy_rx_polarity_flip_phy149.BCM8887X=0 +phy_tx_polarity_flip_phy149.BCM8887X=0 + +# core 18 lane150 +lane_to_serdes_map_nif_lane150.BCM8887X=rx148:tx144 +phy_rx_polarity_flip_phy150.BCM8887X=1 +phy_tx_polarity_flip_phy150.BCM8887X=1 + +# core 18 lane151 +lane_to_serdes_map_nif_lane151.BCM8887X=rx150:tx150 +phy_rx_polarity_flip_phy151.BCM8887X=0 +phy_tx_polarity_flip_phy151.BCM8887X=1 + + +# ---------------------------------------------------------------------------------------------------- +# core_19 +# ---------------------------------------------------------------------------------------------------- + +# core 19 lane152 +lane_to_serdes_map_nif_lane152.BCM8887X=rx155:tx156 +phy_rx_polarity_flip_phy152.BCM8887X=0 +phy_tx_polarity_flip_phy152.BCM8887X=1 + +# core 19 lane153 +lane_to_serdes_map_nif_lane153.BCM8887X=rx154:tx155 +phy_rx_polarity_flip_phy153.BCM8887X=0 +phy_tx_polarity_flip_phy153.BCM8887X=0 + +# core 19 lane154 +lane_to_serdes_map_nif_lane154.BCM8887X=rx158:tx158 +phy_rx_polarity_flip_phy154.BCM8887X=1 +phy_tx_polarity_flip_phy154.BCM8887X=1 + +# core 19 lane155 +lane_to_serdes_map_nif_lane155.BCM8887X=rx156:tx157 +phy_rx_polarity_flip_phy155.BCM8887X=1 +phy_tx_polarity_flip_phy155.BCM8887X=0 + +# core 19 lane156 +lane_to_serdes_map_nif_lane156.BCM8887X=rx153:tx159 +phy_rx_polarity_flip_phy156.BCM8887X=0 +phy_tx_polarity_flip_phy156.BCM8887X=0 + +# core 19 lane157 +lane_to_serdes_map_nif_lane157.BCM8887X=rx152:tx152 +phy_rx_polarity_flip_phy157.BCM8887X=1 +phy_tx_polarity_flip_phy157.BCM8887X=1 + +# core 19 lane158 +lane_to_serdes_map_nif_lane158.BCM8887X=rx159:tx154 +phy_rx_polarity_flip_phy158.BCM8887X=0 +phy_tx_polarity_flip_phy158.BCM8887X=0 + +# core 19 lane159 +lane_to_serdes_map_nif_lane159.BCM8887X=rx157:tx153 +phy_rx_polarity_flip_phy159.BCM8887X=0 +phy_tx_polarity_flip_phy159.BCM8887X=0 + + +# ---------------------------------------------------------------------------------------------------- +# core_20 +# ---------------------------------------------------------------------------------------------------- + +# core 20 lane160 +lane_to_serdes_map_nif_lane160.BCM8887X=rx166:tx167 +phy_rx_polarity_flip_phy160.BCM8887X=0 +phy_tx_polarity_flip_phy160.BCM8887X=1 + +# core 20 lane161 +lane_to_serdes_map_nif_lane161.BCM8887X=rx164:tx163 +phy_rx_polarity_flip_phy161.BCM8887X=1 +phy_tx_polarity_flip_phy161.BCM8887X=0 + +# core 20 lane162 +lane_to_serdes_map_nif_lane162.BCM8887X=rx160:tx162 +phy_rx_polarity_flip_phy162.BCM8887X=0 +phy_tx_polarity_flip_phy162.BCM8887X=1 + +# core 20 lane163 +lane_to_serdes_map_nif_lane163.BCM8887X=rx161:tx161 +phy_rx_polarity_flip_phy163.BCM8887X=0 +phy_tx_polarity_flip_phy163.BCM8887X=1 + +# core 20 lane164 +lane_to_serdes_map_nif_lane164.BCM8887X=rx162:tx166 +phy_rx_polarity_flip_phy164.BCM8887X=0 +phy_tx_polarity_flip_phy164.BCM8887X=1 + +# core 20 lane165 +lane_to_serdes_map_nif_lane165.BCM8887X=rx163:tx160 +phy_rx_polarity_flip_phy165.BCM8887X=0 +phy_tx_polarity_flip_phy165.BCM8887X=1 + +# core 20 lane166 +lane_to_serdes_map_nif_lane166.BCM8887X=rx167:tx164 +phy_rx_polarity_flip_phy166.BCM8887X=1 +phy_tx_polarity_flip_phy166.BCM8887X=1 + +# core 20 lane167 +lane_to_serdes_map_nif_lane167.BCM8887X=rx165:tx165 +phy_rx_polarity_flip_phy167.BCM8887X=0 +phy_tx_polarity_flip_phy167.BCM8887X=1 + + +# ---------------------------------------------------------------------------------------------------- +# core_21 +# ---------------------------------------------------------------------------------------------------- + +# core 21 lane168 +lane_to_serdes_map_nif_lane168.BCM8887X=rx170:tx174 +phy_rx_polarity_flip_phy168.BCM8887X=0 +phy_tx_polarity_flip_phy168.BCM8887X=1 + +# core 21 lane169 +lane_to_serdes_map_nif_lane169.BCM8887X=rx171:tx168 +phy_rx_polarity_flip_phy169.BCM8887X=0 +phy_tx_polarity_flip_phy169.BCM8887X=1 + +# core 21 lane170 +lane_to_serdes_map_nif_lane170.BCM8887X=rx175:tx172 +phy_rx_polarity_flip_phy170.BCM8887X=1 +phy_tx_polarity_flip_phy170.BCM8887X=1 + +# core 21 lane171 +lane_to_serdes_map_nif_lane171.BCM8887X=rx173:tx173 +phy_rx_polarity_flip_phy171.BCM8887X=0 +phy_tx_polarity_flip_phy171.BCM8887X=1 + +# core 21 lane172 +lane_to_serdes_map_nif_lane172.BCM8887X=rx174:tx175 +phy_rx_polarity_flip_phy172.BCM8887X=0 +phy_tx_polarity_flip_phy172.BCM8887X=1 + +# core 21 lane173 +lane_to_serdes_map_nif_lane173.BCM8887X=rx172:tx171 +phy_rx_polarity_flip_phy173.BCM8887X=1 +phy_tx_polarity_flip_phy173.BCM8887X=0 + +# core 21 lane174 +lane_to_serdes_map_nif_lane174.BCM8887X=rx168:tx170 +phy_rx_polarity_flip_phy174.BCM8887X=0 +phy_tx_polarity_flip_phy174.BCM8887X=1 + +# core 21 lane175 +lane_to_serdes_map_nif_lane175.BCM8887X=rx169:tx169 +phy_rx_polarity_flip_phy175.BCM8887X=0 +phy_tx_polarity_flip_phy175.BCM8887X=1 + + +# ---------------------------------------------------------------------------------------------------- +# core_22 +# ---------------------------------------------------------------------------------------------------- + +# core 22 lane176 +lane_to_serdes_map_nif_lane176.BCM8887X=rx178:tx182 +phy_rx_polarity_flip_phy176.BCM8887X=0 +phy_tx_polarity_flip_phy176.BCM8887X=1 + +# core 22 lane177 +lane_to_serdes_map_nif_lane177.BCM8887X=rx179:tx176 +phy_rx_polarity_flip_phy177.BCM8887X=0 +phy_tx_polarity_flip_phy177.BCM8887X=1 + +# core 22 lane178 +lane_to_serdes_map_nif_lane178.BCM8887X=rx183:tx180 +phy_rx_polarity_flip_phy178.BCM8887X=1 +phy_tx_polarity_flip_phy178.BCM8887X=1 + +# core 22 lane179 +lane_to_serdes_map_nif_lane179.BCM8887X=rx181:tx181 +phy_rx_polarity_flip_phy179.BCM8887X=0 +phy_tx_polarity_flip_phy179.BCM8887X=1 + +# core 22 lane180 +lane_to_serdes_map_nif_lane180.BCM8887X=rx182:tx183 +phy_rx_polarity_flip_phy180.BCM8887X=0 +phy_tx_polarity_flip_phy180.BCM8887X=1 + +# core 22 lane181 +lane_to_serdes_map_nif_lane181.BCM8887X=rx180:tx179 +phy_rx_polarity_flip_phy181.BCM8887X=1 +phy_tx_polarity_flip_phy181.BCM8887X=0 + +# core 22 lane182 +lane_to_serdes_map_nif_lane182.BCM8887X=rx176:tx178 +phy_rx_polarity_flip_phy182.BCM8887X=0 +phy_tx_polarity_flip_phy182.BCM8887X=1 + +# core 22 lane183 +lane_to_serdes_map_nif_lane183.BCM8887X=rx177:tx177 +phy_rx_polarity_flip_phy183.BCM8887X=0 +phy_tx_polarity_flip_phy183.BCM8887X=1 + + +# ---------------------------------------------------------------------------------------------------- +# core_23 +# ---------------------------------------------------------------------------------------------------- + +# core 23 lane184 +lane_to_serdes_map_nif_lane184.BCM8887X=rx187:tx191 +phy_rx_polarity_flip_phy184.BCM8887X=1 +phy_tx_polarity_flip_phy184.BCM8887X=1 + +# core 23 lane185 +lane_to_serdes_map_nif_lane185.BCM8887X=rx186:tx185 +phy_rx_polarity_flip_phy185.BCM8887X=1 +phy_tx_polarity_flip_phy185.BCM8887X=0 + +# core 23 lane186 +lane_to_serdes_map_nif_lane186.BCM8887X=rx190:tx190 +phy_rx_polarity_flip_phy186.BCM8887X=0 +phy_tx_polarity_flip_phy186.BCM8887X=0 + +# core 23 lane187 +lane_to_serdes_map_nif_lane187.BCM8887X=rx188:tx186 +phy_rx_polarity_flip_phy187.BCM8887X=0 +phy_tx_polarity_flip_phy187.BCM8887X=1 + +# core 23 lane188 +lane_to_serdes_map_nif_lane188.BCM8887X=rx189:tx187 +phy_rx_polarity_flip_phy188.BCM8887X=1 +phy_tx_polarity_flip_phy188.BCM8887X=1 + +# core 23 lane189 +lane_to_serdes_map_nif_lane189.BCM8887X=rx191:tx189 +phy_rx_polarity_flip_phy189.BCM8887X=0 +phy_tx_polarity_flip_phy189.BCM8887X=0 + +# core 23 lane190 +lane_to_serdes_map_nif_lane190.BCM8887X=rx185:tx188 +phy_rx_polarity_flip_phy190.BCM8887X=1 +phy_tx_polarity_flip_phy190.BCM8887X=1 + +# core 23 lane191 +lane_to_serdes_map_nif_lane191.BCM8887X=rx184:tx184 +phy_rx_polarity_flip_phy191.BCM8887X=0 +phy_tx_polarity_flip_phy191.BCM8887X=0 + + +# ---------------------------------------------------------------------------------------------------- +# core_24 +# ---------------------------------------------------------------------------------------------------- + +# core 24 lane192 +lane_to_serdes_map_nif_lane192.BCM8887X=rx194:tx195 +phy_rx_polarity_flip_phy192.BCM8887X=0 +phy_tx_polarity_flip_phy192.BCM8887X=0 + +# core 24 lane193 +lane_to_serdes_map_nif_lane193.BCM8887X=rx195:tx197 +phy_rx_polarity_flip_phy193.BCM8887X=1 +phy_tx_polarity_flip_phy193.BCM8887X=0 + +# core 24 lane194 +lane_to_serdes_map_nif_lane194.BCM8887X=rx196:tx196 +phy_rx_polarity_flip_phy194.BCM8887X=1 +phy_tx_polarity_flip_phy194.BCM8887X=0 + +# core 24 lane195 +lane_to_serdes_map_nif_lane195.BCM8887X=rx198:tx192 +phy_rx_polarity_flip_phy195.BCM8887X=0 +phy_tx_polarity_flip_phy195.BCM8887X=0 + +# core 24 lane196 +lane_to_serdes_map_nif_lane196.BCM8887X=rx192:tx198 +phy_rx_polarity_flip_phy196.BCM8887X=1 +phy_tx_polarity_flip_phy196.BCM8887X=1 + +# core 24 lane197 +lane_to_serdes_map_nif_lane197.BCM8887X=rx193:tx194 +phy_rx_polarity_flip_phy197.BCM8887X=0 +phy_tx_polarity_flip_phy197.BCM8887X=1 + +# core 24 lane198 +lane_to_serdes_map_nif_lane198.BCM8887X=rx199:tx199 +phy_rx_polarity_flip_phy198.BCM8887X=1 +phy_tx_polarity_flip_phy198.BCM8887X=0 + +# core 24 lane199 +lane_to_serdes_map_nif_lane199.BCM8887X=rx197:tx193 +phy_rx_polarity_flip_phy199.BCM8887X=1 +phy_tx_polarity_flip_phy199.BCM8887X=0 + + +# ---------------------------------------------------------------------------------------------------- +# core_25 +# ---------------------------------------------------------------------------------------------------- + +# core 25 lane200 +lane_to_serdes_map_nif_lane200.BCM8887X=rx202:tx203 +phy_rx_polarity_flip_phy200.BCM8887X=0 +phy_tx_polarity_flip_phy200.BCM8887X=0 + +# core 25 lane201 +lane_to_serdes_map_nif_lane201.BCM8887X=rx203:tx205 +phy_rx_polarity_flip_phy201.BCM8887X=1 +phy_tx_polarity_flip_phy201.BCM8887X=0 + +# core 25 lane202 +lane_to_serdes_map_nif_lane202.BCM8887X=rx204:tx204 +phy_rx_polarity_flip_phy202.BCM8887X=1 +phy_tx_polarity_flip_phy202.BCM8887X=0 + +# core 25 lane203 +lane_to_serdes_map_nif_lane203.BCM8887X=rx206:tx200 +phy_rx_polarity_flip_phy203.BCM8887X=0 +phy_tx_polarity_flip_phy203.BCM8887X=0 + +# core 25 lane204 +lane_to_serdes_map_nif_lane204.BCM8887X=rx200:tx206 +phy_rx_polarity_flip_phy204.BCM8887X=1 +phy_tx_polarity_flip_phy204.BCM8887X=1 + +# core 25 lane205 +lane_to_serdes_map_nif_lane205.BCM8887X=rx201:tx202 +phy_rx_polarity_flip_phy205.BCM8887X=1 +phy_tx_polarity_flip_phy205.BCM8887X=1 + +# core 25 lane206 +lane_to_serdes_map_nif_lane206.BCM8887X=rx207:tx207 +phy_rx_polarity_flip_phy206.BCM8887X=1 +phy_tx_polarity_flip_phy206.BCM8887X=0 + +# core 25 lane207 +lane_to_serdes_map_nif_lane207.BCM8887X=rx205:tx201 +phy_rx_polarity_flip_phy207.BCM8887X=1 +phy_tx_polarity_flip_phy207.BCM8887X=0 + + +# ---------------------------------------------------------------------------------------------------- +# core_26 +# ---------------------------------------------------------------------------------------------------- + +# core 26 lane208 +lane_to_serdes_map_nif_lane208.BCM8887X=rx210:tx211 +phy_rx_polarity_flip_phy208.BCM8887X=0 +phy_tx_polarity_flip_phy208.BCM8887X=0 + +# core 26 lane209 +lane_to_serdes_map_nif_lane209.BCM8887X=rx211:tx213 +phy_rx_polarity_flip_phy209.BCM8887X=1 +phy_tx_polarity_flip_phy209.BCM8887X=0 + +# core 26 lane210 +lane_to_serdes_map_nif_lane210.BCM8887X=rx212:tx212 +phy_rx_polarity_flip_phy210.BCM8887X=1 +phy_tx_polarity_flip_phy210.BCM8887X=0 + +# core 26 lane211 +lane_to_serdes_map_nif_lane211.BCM8887X=rx214:tx208 +phy_rx_polarity_flip_phy211.BCM8887X=0 +phy_tx_polarity_flip_phy211.BCM8887X=0 + +# core 26 lane212 +lane_to_serdes_map_nif_lane212.BCM8887X=rx208:tx214 +phy_rx_polarity_flip_phy212.BCM8887X=1 +phy_tx_polarity_flip_phy212.BCM8887X=1 + +# core 26 lane213 +lane_to_serdes_map_nif_lane213.BCM8887X=rx209:tx210 +phy_rx_polarity_flip_phy213.BCM8887X=1 +phy_tx_polarity_flip_phy213.BCM8887X=1 + +# core 26 lane214 +lane_to_serdes_map_nif_lane214.BCM8887X=rx215:tx215 +phy_rx_polarity_flip_phy214.BCM8887X=1 +phy_tx_polarity_flip_phy214.BCM8887X=0 + +# core 26 lane215 +lane_to_serdes_map_nif_lane215.BCM8887X=rx213:tx209 +phy_rx_polarity_flip_phy215.BCM8887X=1 +phy_tx_polarity_flip_phy215.BCM8887X=0 + + +# ---------------------------------------------------------------------------------------------------- +# core_27 +# ---------------------------------------------------------------------------------------------------- + +# core 27 lane216 +lane_to_serdes_map_nif_lane216.BCM8887X=rx218:tx219 +phy_rx_polarity_flip_phy216.BCM8887X=0 +phy_tx_polarity_flip_phy216.BCM8887X=0 + +# core 27 lane217 +lane_to_serdes_map_nif_lane217.BCM8887X=rx219:tx221 +phy_rx_polarity_flip_phy217.BCM8887X=1 +phy_tx_polarity_flip_phy217.BCM8887X=0 + +# core 27 lane218 +lane_to_serdes_map_nif_lane218.BCM8887X=rx220:tx220 +phy_rx_polarity_flip_phy218.BCM8887X=1 +phy_tx_polarity_flip_phy218.BCM8887X=0 + +# core 27 lane219 +lane_to_serdes_map_nif_lane219.BCM8887X=rx222:tx216 +phy_rx_polarity_flip_phy219.BCM8887X=0 +phy_tx_polarity_flip_phy219.BCM8887X=0 + +# core 27 lane220 +lane_to_serdes_map_nif_lane220.BCM8887X=rx216:tx222 +phy_rx_polarity_flip_phy220.BCM8887X=1 +phy_tx_polarity_flip_phy220.BCM8887X=1 + +# core 27 lane221 +lane_to_serdes_map_nif_lane221.BCM8887X=rx217:tx218 +phy_rx_polarity_flip_phy221.BCM8887X=1 +phy_tx_polarity_flip_phy221.BCM8887X=1 + +# core 27 lane222 +lane_to_serdes_map_nif_lane222.BCM8887X=rx223:tx223 +phy_rx_polarity_flip_phy222.BCM8887X=1 +phy_tx_polarity_flip_phy222.BCM8887X=0 + +# core 27 lane223 +lane_to_serdes_map_nif_lane223.BCM8887X=rx221:tx217 +phy_rx_polarity_flip_phy223.BCM8887X=1 +phy_tx_polarity_flip_phy223.BCM8887X=0 + + +# ---------------------------------------------------------------------------------------------------- +# core_28 +# ---------------------------------------------------------------------------------------------------- + +# core 28 lane224 +lane_to_serdes_map_nif_lane224.BCM8887X=rx224:tx229 +phy_rx_polarity_flip_phy224.BCM8887X=0 +phy_tx_polarity_flip_phy224.BCM8887X=1 + +# core 28 lane225 +lane_to_serdes_map_nif_lane225.BCM8887X=rx228:tx230 +phy_rx_polarity_flip_phy225.BCM8887X=1 +phy_tx_polarity_flip_phy225.BCM8887X=0 + +# core 28 lane226 +lane_to_serdes_map_nif_lane226.BCM8887X=rx229:tx228 +phy_rx_polarity_flip_phy226.BCM8887X=1 +phy_tx_polarity_flip_phy226.BCM8887X=0 + +# core 28 lane227 +lane_to_serdes_map_nif_lane227.BCM8887X=rx227:tx224 +phy_rx_polarity_flip_phy227.BCM8887X=0 +phy_tx_polarity_flip_phy227.BCM8887X=1 + +# core 28 lane228 +lane_to_serdes_map_nif_lane228.BCM8887X=rx225:tx231 +phy_rx_polarity_flip_phy228.BCM8887X=0 +phy_tx_polarity_flip_phy228.BCM8887X=0 + +# core 28 lane229 +lane_to_serdes_map_nif_lane229.BCM8887X=rx230:tx226 +phy_rx_polarity_flip_phy229.BCM8887X=0 +phy_tx_polarity_flip_phy229.BCM8887X=0 + +# core 28 lane230 +lane_to_serdes_map_nif_lane230.BCM8887X=rx231:tx227 +phy_rx_polarity_flip_phy230.BCM8887X=0 +phy_tx_polarity_flip_phy230.BCM8887X=0 + +# core 28 lane231 +lane_to_serdes_map_nif_lane231.BCM8887X=rx226:tx225 +phy_rx_polarity_flip_phy231.BCM8887X=1 +phy_tx_polarity_flip_phy231.BCM8887X=1 + + +# ---------------------------------------------------------------------------------------------------- +# core_29 +# ---------------------------------------------------------------------------------------------------- + +# core 29 lane232 +lane_to_serdes_map_nif_lane232.BCM8887X=rx234:tx234 +phy_rx_polarity_flip_phy232.BCM8887X=1 +phy_tx_polarity_flip_phy232.BCM8887X=1 + +# core 29 lane233 +lane_to_serdes_map_nif_lane233.BCM8887X=rx235:tx233 +phy_rx_polarity_flip_phy233.BCM8887X=1 +phy_tx_polarity_flip_phy233.BCM8887X=0 + +# core 29 lane234 +lane_to_serdes_map_nif_lane234.BCM8887X=rx236:tx239 +phy_rx_polarity_flip_phy234.BCM8887X=1 +phy_tx_polarity_flip_phy234.BCM8887X=1 + +# core 29 lane235 +lane_to_serdes_map_nif_lane235.BCM8887X=rx238:tx232 +phy_rx_polarity_flip_phy235.BCM8887X=0 +phy_tx_polarity_flip_phy235.BCM8887X=1 + +# core 29 lane236 +lane_to_serdes_map_nif_lane236.BCM8887X=rx237:tx236 +phy_rx_polarity_flip_phy236.BCM8887X=0 +phy_tx_polarity_flip_phy236.BCM8887X=0 + +# core 29 lane237 +lane_to_serdes_map_nif_lane237.BCM8887X=rx239:tx235 +phy_rx_polarity_flip_phy237.BCM8887X=1 +phy_tx_polarity_flip_phy237.BCM8887X=0 + +# core 29 lane238 +lane_to_serdes_map_nif_lane238.BCM8887X=rx232:tx238 +phy_rx_polarity_flip_phy238.BCM8887X=1 +phy_tx_polarity_flip_phy238.BCM8887X=0 + +# core 29 lane239 +lane_to_serdes_map_nif_lane239.BCM8887X=rx233:tx237 +phy_rx_polarity_flip_phy239.BCM8887X=1 +phy_tx_polarity_flip_phy239.BCM8887X=0 + + +# ---------------------------------------------------------------------------------------------------- +# core_30 +# ---------------------------------------------------------------------------------------------------- + +# core 30 lane240 +lane_to_serdes_map_nif_lane240.BCM8887X=rx242:tx242 +phy_rx_polarity_flip_phy240.BCM8887X=0 +phy_tx_polarity_flip_phy240.BCM8887X=1 + +# core 30 lane241 +lane_to_serdes_map_nif_lane241.BCM8887X=rx243:tx241 +phy_rx_polarity_flip_phy241.BCM8887X=1 +phy_tx_polarity_flip_phy241.BCM8887X=0 + +# core 30 lane242 +lane_to_serdes_map_nif_lane242.BCM8887X=rx244:tx247 +phy_rx_polarity_flip_phy242.BCM8887X=1 +phy_tx_polarity_flip_phy242.BCM8887X=1 + +# core 30 lane243 +lane_to_serdes_map_nif_lane243.BCM8887X=rx246:tx240 +phy_rx_polarity_flip_phy243.BCM8887X=0 +phy_tx_polarity_flip_phy243.BCM8887X=1 + +# core 30 lane244 +lane_to_serdes_map_nif_lane244.BCM8887X=rx245:tx244 +phy_rx_polarity_flip_phy244.BCM8887X=0 +phy_tx_polarity_flip_phy244.BCM8887X=0 + +# core 30 lane245 +lane_to_serdes_map_nif_lane245.BCM8887X=rx247:tx243 +phy_rx_polarity_flip_phy245.BCM8887X=1 +phy_tx_polarity_flip_phy245.BCM8887X=0 + +# core 30 lane246 +lane_to_serdes_map_nif_lane246.BCM8887X=rx240:tx246 +phy_rx_polarity_flip_phy246.BCM8887X=1 +phy_tx_polarity_flip_phy246.BCM8887X=0 + +# core 30 lane247 +lane_to_serdes_map_nif_lane247.BCM8887X=rx241:tx245 +phy_rx_polarity_flip_phy247.BCM8887X=1 +phy_tx_polarity_flip_phy247.BCM8887X=0 + + +# ---------------------------------------------------------------------------------------------------- +# core_31 +# ---------------------------------------------------------------------------------------------------- + +# core 31 lane248 +lane_to_serdes_map_nif_lane248.BCM8887X=rx250:tx250 +phy_rx_polarity_flip_phy248.BCM8887X=0 +phy_tx_polarity_flip_phy248.BCM8887X=1 + +# core 31 lane249 +lane_to_serdes_map_nif_lane249.BCM8887X=rx251:tx249 +phy_rx_polarity_flip_phy249.BCM8887X=1 +phy_tx_polarity_flip_phy249.BCM8887X=0 + +# core 31 lane250 +lane_to_serdes_map_nif_lane250.BCM8887X=rx252:tx255 +phy_rx_polarity_flip_phy250.BCM8887X=1 +phy_tx_polarity_flip_phy250.BCM8887X=1 + +# core 31 lane251 +lane_to_serdes_map_nif_lane251.BCM8887X=rx254:tx248 +phy_rx_polarity_flip_phy251.BCM8887X=0 +phy_tx_polarity_flip_phy251.BCM8887X=1 + +# core 31 lane252 +lane_to_serdes_map_nif_lane252.BCM8887X=rx253:tx252 +phy_rx_polarity_flip_phy252.BCM8887X=0 +phy_tx_polarity_flip_phy252.BCM8887X=0 + +# core 31 lane253 +lane_to_serdes_map_nif_lane253.BCM8887X=rx255:tx251 +phy_rx_polarity_flip_phy253.BCM8887X=1 +phy_tx_polarity_flip_phy253.BCM8887X=0 + +# core 31 lane254 +lane_to_serdes_map_nif_lane254.BCM8887X=rx248:tx254 +phy_rx_polarity_flip_phy254.BCM8887X=1 +phy_tx_polarity_flip_phy254.BCM8887X=0 + +# core 31 lane255 +lane_to_serdes_map_nif_lane255.BCM8887X=rx249:tx253 +phy_rx_polarity_flip_phy255.BCM8887X=1 +phy_tx_polarity_flip_phy255.BCM8887X=0 + +# ---------------------------------------------------------------------------------------------------- +# Template section +# ---------------------------------------------------------------------------------------------------- + +{% for pcfg in ports_config %} +ucode_port_{{ pcfg.logical_port }}.BCM8887X={{ pcfg.asic_port_type }}:{{ pcfg.local_tmport }} +tm_port_header_type_out_{{ pcfg.logical_port }}.BCM8887X=ETH +{% if pcfg.is_pam4 %} +serdes_tx_taps_{{ pcfg.logical_port }}.BCM8887X=mode:PAM4,pre:0,main:128,post:0,pre2:0,post2:0,pre3:0 +{% else %} +serdes_tx_taps_{{ pcfg.logical_port }}.BCM8887X=mode:NRZ,pre:0,main:63,post:0 +{% endif %} +{% endfor %} + + +# ---------------------------------------------------------------------------------------------------- +# core_32 +# +# NOTE: +# The QoS configuration (refer qos.json.j2 and buffers_defaults_XXX.j2 file per SKU) +# does not include this management port. If you are modifying the management port, ensure that the +# QoS configuration is updated accordingly to reflect the change. +# ---------------------------------------------------------------------------------------------------- +ucode_port_257.BCM8887X=CGE64:core_2.33 +tm_port_header_type_out_257.BCM8887X=ETH + +# core 32 lane256 +lane_to_serdes_map_nif_lane256.BCM8887X=rx257:tx257 +phy_rx_polarity_flip_phy256.BCM8887X=0 +phy_tx_polarity_flip_phy256.BCM8887X=0 + +# core 32 lane257 +lane_to_serdes_map_nif_lane257.BCM8887X=rx256:tx256 +phy_rx_polarity_flip_phy257.BCM8887X=0 +phy_tx_polarity_flip_phy257.BCM8887X=1 + +# core 32 lane258 +lane_to_serdes_map_nif_lane258.BCM8887X=rx258:tx258 +phy_rx_polarity_flip_phy258.BCM8887X=1 +phy_tx_polarity_flip_phy258.BCM8887X=0 + +# core 32 lane259 +lane_to_serdes_map_nif_lane259.BCM8887X=rx259:tx259 +phy_rx_polarity_flip_phy259.BCM8887X=0 +phy_tx_polarity_flip_phy259.BCM8887X=0 + + +# ---------------------------------------------------------------------------------------------------- +# core_33 +# +# NOTE: +# The QoS configuration (refer qos.json.j2 and buffers_defaults_XXX.j2 file per SKU) +# does not include this management port. If you are modifying the management port, ensure that the +# QoS configuration is updated accordingly to reflect the change. +# ---------------------------------------------------------------------------------------------------- +ucode_port_261.BCM8887X=CGE65:core_6.33 +tm_port_header_type_out_261.BCM8887X=ETH + +# core 33 lane260 +lane_to_serdes_map_nif_lane260.BCM8887X=rx260:tx260 +phy_rx_polarity_flip_phy260.BCM8887X=0 +phy_tx_polarity_flip_phy260.BCM8887X=0 + +# core 33 lane261 +lane_to_serdes_map_nif_lane261.BCM8887X=rx261:tx261 +phy_rx_polarity_flip_phy261.BCM8887X=0 +phy_tx_polarity_flip_phy261.BCM8887X=1 + +# core 33 lane262 +lane_to_serdes_map_nif_lane262.BCM8887X=rx262:tx262 +phy_rx_polarity_flip_phy262.BCM8887X=0 +phy_tx_polarity_flip_phy262.BCM8887X=0 + +# core 33 lane263 +lane_to_serdes_map_nif_lane263.BCM8887X=rx263:tx263 +phy_rx_polarity_flip_phy263.BCM8887X=0 +phy_tx_polarity_flip_phy263.BCM8887X=0 + + +# ---------------------------------------------------------------------------------------------------- +# Static Properties +# ---------------------------------------------------------------------------------------------------- + +port_init_speed_xl.BCM8887X=40000 +port_init_speed_cd.BCM8887X=400000 +port_init_speed_d3c.BCM8887X=800000 +port_init_speed_ce.BCM8887X=100000 +port_init_speed_le.BCM8887X=50000 +port_init_speed_fabric.BCM8887X=53125 +port_init_speed_xe.BCM8887X=25000 +port_init_speed_cc.BCM8887X=200000 +port_init_speed_ge.BCM8887X=1000 + +outlif_logical_to_physical_phase_map_1.BCM8887X=S1 +outlif_logical_to_physical_phase_map_2.BCM8887X=M3 +outlif_logical_to_physical_phase_map_3.BCM8887X=XL +outlif_logical_to_physical_phase_map_4.BCM8887X=L2 +outlif_logical_to_physical_phase_map_5.BCM8887X=M1 +outlif_logical_to_physical_phase_map_6.BCM8887X=M2 +outlif_logical_to_physical_phase_map_7.BCM8887X=L1 +outlif_logical_to_physical_phase_map_8.BCM8887X=S2 + +outlif_physical_phase_data_granularity_S1.BCM8887X=60 +outlif_physical_phase_data_granularity_S2.BCM8887X=60 +outlif_physical_phase_data_granularity_M1.BCM8887X=60 +outlif_physical_phase_data_granularity_M2.BCM8887X=60 +outlif_physical_phase_data_granularity_M3.BCM8887X=60 +outlif_physical_phase_data_granularity_L1.BCM8887X=60 +outlif_physical_phase_data_granularity_L2.BCM8887X=60 +outlif_physical_phase_data_granularity_XL.BCM8887X=60 + +appl_param_rcy_mirror_ports_range.BCM8887X=500-1000 + +# ----------------------------------------------- +# | FPP | FPP | FPP | FPP | FPP | FPP | +# | 11,12 | 13,14 | 15,16 | 17,18 | 19,20 | 21,22 | +# |-----------------------------------------------| +# | ETH | ETH | ETH | ETH | ETH | ETH | +# | 33,37 | 41,45 | 49,53 | 57,61 | 65,69 | 73,77 | +# ---------------|-----------------------------------------------|---------------- +# | | Core | Core | Core | Core | Core | Core | | +# | | 06 | 05 | 04 | 16 | 17 | 18 | | +# -----------------|------ ----------------------------------------------- ------|---------|------- +# | FPP | ETH | Core | | Core | ETH | FPP | +# | 09,10 | 185,189 | 07 | | 19 | 193,197 | 23,24 | +# |-------|---------|------| |------|---------|-------| +# | FPP | ETH | Core | | Core | ETH | FPP | +# | 07,08 | 177,181 | 15 | | 27 | 201,205 | 25,26 | +# |-------|---------|------| |------|---------|-------| +# | FPP | ETH | Core | AGERA2 -> QSFP_DD_112 | Core | ETH | FPP | +# | 05,06 | 169,173 | 14 | | 26 | 209,213 | 27,28 | +# |-------|---------|------| |------|---------|-------| +# | FPP | ETH | Core | | Core | ETH | FPP | +# | 03,04 | 161,165 | 13 | | 25 | 217,221 | 29,30 | +# |-------|---------|------| |------|---------|-------| +# | FPP | ETH | Core | | Core | ETH | FPP | +# | 01,02 | 153,157 | 12 | | 24 | 225,229 | 31,32 | +# |-------|---------|------|---------------------------- Q3D -------------------------------|------|---------|-------| +# | FPP | ETH | Core | | Core | ETH | FPP | +# | 33,34 | 129,133 | 08 | | 28 | 249,253 | 62,63 | +# |-------|---------|------| |------|---------|-------| +# | FPP | ETH | Core | | Core | ETH | FPP | +# | 35,36 | 137,141 | 09 | | 29 | 241,245 | 60,61 | +# |-------|---------|------| |------|---------|-------| +# | FPP | ETH | Core | | Core | ETH | FPP | +# | 36,37 | 145,149 | 10 | QSFP_112 | 30 | 233,237 | 58,59 | +# |-------|---------|------| |------|---------|-------| +# | FPP | ETH | Core | | Core | ETH | FPP | +# | 38,39 | 153,157 | 11 | | 31 | 225,229 | 56,57 | +# |-------|---------|------| |------|---------|-------| +# | FPP | ETH | Core | | Core | ETH | FPP | +# | 40,41 | 161,165 | 03 | | 23 | 217,221 | 54,55 | +# -----------------|------ _______________________________________________ ------|----------------- +# | | Core | Core | Core | Core | Core | Core | | +# | | 02 | 01 | 00 | 20 | 21 | 22 | | +# ---------------|-----------------------------------------------|---------------- +# | ETH | ETH | ETH | ETH | ETH | ETH | +# |169,173|177,181|185,189|193,197|201,205|209,213| +# |-----------------------------------------------| +# | FPP | FPP | FPP | FPP | FPP | FPP | +# | 42,43 | 44,45 | 46,47 | 48,49 | 50,51 | 52,53 | +# ----------------------------------------------- + +dpp_db_path=/usr/share/bcm/db +sai_postinit_cmd_file=/usr/share/sonic/hwsku/sai_postinit_cmd.soc +rif_id_max=8192 +trunk_group_max_members=128 +custom_feature_ts_pll_internal_clock_reference.BCM8887X=1 +port_init_cl72.BCM8887X=0 +port_priorities_d3c.BCM8887X=8 +port_priorities_cd.BCM8887X=8 +port_priorities_ce.BCM8887X=8 +port_priorities_xe.BCM8887X=8 +port_priorities_ge.BCM8887X=8 +port_priorities=8 +#port_priorities_sch=8 +#CPU ports +port_priorities_0=2 +port_priorities_sch_0=8 +port_priorities_380=2 +port_priorities_sch_380=8 +port_priorities_381=2 +port_priorities_sch_381=8 +port_priorities_382=2 +port_priorities_sch_382=8 +port_priorities_383=2 +port_priorities_sch_383=8 +port_priorities_384=2 +port_priorities_sch_384=8 +port_priorities_385=2 +port_priorities_sch_385=8 +port_priorities_386=2 +port_priorities_sch_386=8 +port_priorities_387=2 +port_priorities_sch_387=8 +port_priorities_rcy=2 +port_priorities_sch_rcy=8 + +appl_param_oam_enable=0 +soc_family.BCM8887X=BCM8887X + +#enable HBM +ext_ram_enabled_bitmap.BCM8887X=0xF + +#################################################### +##Reference applications related properties - End +#################################################### +###Default interfaces for Qumran3D +#CPU interfaces +ucode_port_0.BCM8887X=CPU.0:core_0.0 +ucode_port_380.BCM8887X=CPU.8:core_1.200 +ucode_port_381.BCM8887X=CPU.16:core_0.201 +ucode_port_382.BCM8887X=CPU.24:core_2.202 +ucode_port_383.BCM8887X=CPU.32:core_3.203 +ucode_port_384.BCM8887X=CPU.4:core_6.204 +ucode_port_385.BCM8887X=CPU.12:core_7.205 +ucode_port_386.BCM8887X=CPU.20:core_4.206 +ucode_port_387.BCM8887X=CPU.28:core_5.207 + +#special ports +ucode_port_330.BCM8887X=EVENTOR:core_0.230 + +#ucode_port_231.BCM8887X=EVENTOR:core_4.231 +ucode_port_340.BCM8887X=OLP0:core_0.240 +ucode_port_341.BCM8887X=OLP1:core_0.241 +ucode_port_342.BCM8887X=OLP0:core_4.242 +ucode_port_343.BCM8887X=OLP1:core_4.243 +ucode_port_332.BCM8887X=OAMP:core_0.232 +ucode_port_333.BCM8887X=OAMP:core_1.233 +ucode_port_334.BCM8887X=OAMP:core_2.234 +ucode_port_335.BCM8887X=OAMP:core_3.235 +ucode_port_336.BCM8887X=OAMP:core_4.236 +ucode_port_337.BCM8887X=OAMP:core_5.237 +ucode_port_338.BCM8887X=OAMP:core_6.238 +ucode_port_339.BCM8887X=OAMP:core_7.239 + + +ucode_port_332.BCM8887X_ADAPTER=OAMP:core_0.232 +ucode_port_333.BCM8887X_ADAPTER=OAMP:core_1.233 +ucode_port_334.BCM8887X_ADAPTER=OAMP:core_2.234 +ucode_port_335.BCM8887X_ADAPTER=OAMP:core_3.235 +ucode_port_336.BCM8887X_ADAPTER=OAMP:core_4.236 +ucode_port_337.BCM8887X_ADAPTER=OAMP:core_5.237 +ucode_port_338.BCM8887X_ADAPTER=OAMP:core_6.238 +ucode_port_339.BCM8887X_ADAPTER=OAMP:core_7.239 + + +#OAMP +oamp_dual_mode.BCM8887X=1 + +sai_disable_srcmacqedstmac_ctrl=1 +sai_instru_stat_accum_enable=1 + +#RCY ports +sai_recycle_port_lane_base=300 +ucode_port_321.BCM8887X=RCY.21:core_0.221 +tm_port_header_type_in_321.BCM8887X=IBCH1_MODE + +# SAT +## Enable SAT Interface. 0 - Disable, 1 - Enable (Default) +ucode_port_316.BCM8887X=SAT:core_2.216 +ucode_port_317.BCM8887X=SAT:core_3.217 +ucode_port_318.BCM8887X=SAT:core_0.218 +ucode_port_319.BCM8887X=SAT:core_1.219 +ucode_port_312.BCM8887X=SAT:core_6.212 +ucode_port_313.BCM8887X=SAT:core_7.213 +ucode_port_314.BCM8887X=SAT:core_4.214 +ucode_port_315.BCM8887X=SAT:core_5.215 +tm_port_header_type_in_316.BCM8887X=INJECTED_2 +tm_port_header_type_in_317.BCM8887X=INJECTED_2 +tm_port_header_type_in_318.BCM8887X=INJECTED_2 +tm_port_header_type_in_319.BCM8887X=INJECTED_2 +tm_port_header_type_in_312.BCM8887X=INJECTED_2 +tm_port_header_type_in_313.BCM8887X=INJECTED_2 +tm_port_header_type_in_314.BCM8887X=INJECTED_2 +tm_port_header_type_in_315.BCM8887X=INJECTED_2 +tm_port_header_type_out_316.BCM8887X=CPU +tm_port_header_type_out_317.BCM8887X=CPU +tm_port_header_type_out_318.BCM8887X=CPU +tm_port_header_type_out_319.BCM8887X=CPU +tm_port_header_type_out_312.BCM8887X=CPU +tm_port_header_type_out_313.BCM8887X=CPU +tm_port_header_type_out_314.BCM8887X=CPU +tm_port_header_type_out_315.BCM8887X=CPU + + +######################### +### High Availability ### +######################### +#if warmboot is not needed this property can be deleted +#warmboot_support.BCM8887X=on +#warmboot_support.BCM8887X_ADAPTER=on + +#size of memory block pre-allocated for sw-state use when working with warmboot_support=on +sw_state_max_size.BCM8887X=1650000000 +sw_state_max_size.BCM8887X_ADAPTER=1650000000 + +#location of warmboot NV memory +#Allowed options for dnx are - 3:external storage in filesystem 4:driver will save the state directly in shared memory +stable_location.BCM8887X=4 +stable_location.BCM8887X_ADAPTER=3 + +# Note that each unit should have a unique filename and that adapter does not play well with tmp and dev/shm folders. +stable_filename.BCM8887X_ADAPTER=warmboot_data_0 +stable_filename.BCM8887X=/dev/shm/warmboot_data_0 +stable_filename.1.BCM8887X=/dev/shm/warmboot_data_1 +stable_filename.2.BCM8887X=/dev/shm/warmboot_data_2 + +#Maximum size for NVM used for WB storage, must be larger than sw_state_max_size.BCM8887X +stable_size.BCM8887X=1700000000 +stable_size.BCM8887X_ADAPTER=1700000000 + +#counter stat interval +bcm_stat_interval.BCM8887X_ADAPTER=1000000 + +######################### +######################### +######################### + +### MDB configuration ### +mdb_profile.BCM8887X=L3-Optimized + +### Enable Descriptor-DMA ### +dma_desc_aggregator_chain_length_max.BCM8887X=256 +dma_desc_aggregator_buff_size_kb.BCM8887X=64 +dma_desc_aggregator_enable_specific_MDB_LPM.BCM8887X=1 +dma_desc_aggregator_enable_specific_MDB_FEC.BCM8887X=1 +dma_desc_aggregator_enable_specific_XLTCAM.BCM8887X=1 +dma_desc_aggregator_enable_specific_INIT.BCM8887X=1 + +# PMF Map payload size, can be any of 30/60/120 +pmf_maps_payload_size.BCM8887X=30 + +# Set CPU to work with PTCHoITMH header incoming direction and CPU - system headers + network headers outgoing direction +tm_port_header_type_in_0.BCM8887X=INJECTED +tm_port_header_type_out_0.BCM8887X=CPU + +tm_port_header_type_in_380.BCM8887X=INJECTED +tm_port_header_type_out_380.BCM8887X=ETH +tm_port_header_type_in_381.BCM8887X=INJECTED +tm_port_header_type_out_381.BCM8887X=ETH +tm_port_header_type_in_382.BCM8887X=INJECTED +tm_port_header_type_out_382.BCM8887X=ETH +tm_port_header_type_in_383.BCM8887X=INJECTED +tm_port_header_type_out_383.BCM8887X=ETH +tm_port_header_type_in_384.BCM8887X=INJECTED +tm_port_header_type_out_384.BCM8887X=ETH +tm_port_header_type_in_385.BCM8887X=INJECTED +tm_port_header_type_out_385.BCM8887X=ETH +tm_port_header_type_in_386.BCM8887X=INJECTED +tm_port_header_type_out_386.BCM8887X=ETH +tm_port_header_type_in_387.BCM8887X=INJECTED +tm_port_header_type_out_387.BCM8887X=ETH + +# set EVENTOR port to work with PTCHoITMH +tm_port_header_type_in_330.BCM8887X=INJECTED + + +#OAMP +tm_port_header_type_in_332.BCM8887X=INJECTED_2 +tm_port_header_type_out_332.BCM8887X=ENCAP_EXTERNAL_CPU +tm_port_header_type_in_333.BCM8887X=INJECTED_2 +tm_port_header_type_out_333.BCM8887X=ENCAP_EXTERNAL_CPU +tm_port_header_type_in_334.BCM8887X=INJECTED_2 +tm_port_header_type_out_334.BCM8887X=ENCAP_EXTERNAL_CPU +tm_port_header_type_in_335.BCM8887X=INJECTED_2 +tm_port_header_type_in_336.BCM8887X=INJECTED_2 +tm_port_header_type_out_336.BCM8887X=ENCAP_EXTERNAL_CPU +tm_port_header_type_in_337.BCM8887X=INJECTED_2 +tm_port_header_type_out_337.BCM8887X=ENCAP_EXTERNAL_CPU +tm_port_header_type_in_338.BCM8887X=INJECTED_2 +tm_port_header_type_out_338.BCM8887X=ENCAP_EXTERNAL_CPU +tm_port_header_type_in_339.BCM8887X=INJECTED_2 +tm_port_header_type_out_339.BCM8887X=ENCAP_EXTERNAL_CPU + +#OLP +tm_port_header_type_in_340.BCM8887X=TM +tm_port_header_type_out_340.BCM8887X=ETH +tm_port_header_type_in_341.BCM8887X=TM +tm_port_header_type_out_341.BCM8887X=ETH +tm_port_header_type_in_342.BCM8887X=TM +tm_port_header_type_out_342.BCM8887X=ETH +tm_port_header_type_in_343.BCM8887X=TM +tm_port_header_type_out_343.BCM8887X=ETH + +# Set statically the region mode per region id +# 0: queue connectors only. +# 3: [default] SE only (SharingOrder = Low-To-High) +# 7: SE only (SharingOrder = High-To-Low) +dtm_flow_mapping_mode_region_65.BCM8887X=3 +dtm_flow_mapping_mode_region_66.BCM8887X=3 +dtm_flow_mapping_mode_region_67.BCM8887X=3 +dtm_flow_mapping_mode_region_68.BCM8887X=3 +dtm_flow_mapping_mode_region_69.BCM8887X=3 +dtm_flow_mapping_mode_region_70.BCM8887X=3 +dtm_flow_mapping_mode_region_71.BCM8887X=3 +dtm_flow_mapping_mode_region_72.BCM8887X=3 +dtm_flow_mapping_mode_region_73.BCM8887X=3 +dtm_flow_mapping_mode_region_74.BCM8887X=7 +dtm_flow_mapping_mode_region_75.BCM8887X=3 +dtm_flow_mapping_mode_region_76.BCM8887X=3 +dtm_flow_mapping_mode_region_77.BCM8887X=3 +dtm_flow_mapping_mode_region_78.BCM8887X=3 +dtm_flow_mapping_mode_region_79.BCM8887X=3 +dtm_flow_mapping_mode_region_80.BCM8887X=3 +dtm_flow_mapping_mode_region_81.BCM8887X=3 +dtm_flow_mapping_mode_region_82.BCM8887X=3 +dtm_flow_mapping_mode_region_83.BCM8887X=3 +dtm_flow_mapping_mode_region_84.BCM8887X=3 +dtm_flow_mapping_mode_region_85.BCM8887X=3 +dtm_flow_mapping_mode_region_86.BCM8887X=3 +dtm_flow_mapping_mode_region_87.BCM8887X=3 +dtm_flow_mapping_mode_region_88.BCM8887X=3 +dtm_flow_mapping_mode_region_89.BCM8887X=3 +dtm_flow_mapping_mode_region_90.BCM8887X=3 +dtm_flow_mapping_mode_region_91.BCM8887X=3 +dtm_flow_mapping_mode_region_92.BCM8887X=3 +dtm_flow_mapping_mode_region_93.BCM8887X=3 +dtm_flow_mapping_mode_region_94.BCM8887X=3 + +# Set nof remote cores +dtm_flow_nof_remote_cores_region.BCM8887X=8 + +## Fabric transmission mode +# Set the Connect mode to the Fabric +# Options: FE - presence of a Fabric device (single stage) +# SINGLE_FAP - stand-alone device +# MESH - devices in Mesh +# Note: If 'diag_chassis' is on, value will be override in dnx.soc +# to be FE instead of SINGLE_FAP. +fabric_connect_mode.BCM8887X=SINGLE_FAP + +### Fabric configuration ### +#SFI speed rate +port_init_speed_fabric.BCM8887X=53125 + +### import SoC properties that shared with Ucode +#import config-qumran3d-ucode.bcm +#programmability_image_name.BCM8887X=S121 +# ucode input file, depending on image +#programmability_ucode_relative_path.BCM8887X=pemla/ucode/S121/jr3native/u_code_db2pem.txt + +custom_feature_adapter_do_collect_enable.BCM8887X_ADAPTER=1 +custom_feature_use_new_access.BCM8887X_ADAPTER=1 +mem_cache_enable_all.BCM8887X_ADAPTER=1 + +#dram + +dram_temperature_monitor_enable.BCM8887X_ADAPTER=0 +#Interrupt polling mode on adapter +polled_irq_mode.BCM8887X_ADAPTER=1 +polled_irq_delay.BCM8887X_ADAPTER=200000 + +#Eventor SBUS DMA channels +eventor_sbus_dma_channels.BCM8887X=0,24,0,25,1,24,1,25 + +#Default CPU Tx Tc Queue +sai_default_cpu_tx_tc=7 + +#macsec properties +macsec_fips_enable=1 +xflow_macsec_secure_chan_to_num_secure_assoc=4 +xflow_macsec_secure_chan_to_num_secure_assoc_encrypt=2 +xflow_macsec_secure_chan_to_num_secure_assoc_decrypt=4 + +#Disable hardware PFC watchdog +sai_pfc_dlr_init_capability=0 diff --git a/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/templates/phy_config.json.j2 b/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/templates/phy_config.json.j2 new file mode 100644 index 00000000000..9b7ab6dedb8 --- /dev/null +++ b/device/nexthop/x86_64-nexthop_5010-r0/NH-5010-F-O64/templates/phy_config.json.j2 @@ -0,0 +1,40 @@ +{ + "lanes": [ + { + "index": 255, + "local_lane_id": 255, + "system_side": true, + "tx_polarity": 255, + "rx_polarity": 255, + "line_tx_lanemap": 255, + "line_rx_lanemap": 255, + "line_to_system_lanemap": 255, + "mdio_addr": "" + } + ], + "ports": [ + {% for p in ports %} + { + "index": {{ p.index }}, + "mdio_addr": "0", + "system_speed": {{ p.system_speed }}, + "system_fec": "rs", + "system_auto_neg": false, + "system_loopback": "none", + "system_training": false, + "line_speed": {{ p.line_speed }}, + "line_fec": "rs", + "line_auto_neg": false, + "line_loopback": "none", + "line_training": false, + "line_media_type": "fiber", + "line_intf_type": "none", + "line_adver_speed": [], + "line_adver_fec": [], + "line_adver_auto_neg": false, + "line_adver_asym_pause": false, + "line_adver_media_type": "fiber" + }{% if not loop.last %},{% endif %} + {% endfor %} + ] +} \ No newline at end of file diff --git a/device/nexthop/x86_64-nexthop_5010-r0/installer.conf b/device/nexthop/x86_64-nexthop_5010-r0/installer.conf index e172a88fc88..4a307bed795 100644 --- a/device/nexthop/x86_64-nexthop_5010-r0/installer.conf +++ b/device/nexthop/x86_64-nexthop_5010-r0/installer.conf @@ -1 +1,3 @@ ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="crashkernel=512M" +ONIE_IMAGE_PART_SIZE=225280 +GRUB_SERIAL_COMMAND="set timeout_style=countdown" diff --git a/device/nexthop/x86_64-nexthop_5010-r0/media_settings.json b/device/nexthop/x86_64-nexthop_5010-r0/media_settings.json index 8bd74e3f4d4..d82b38f830c 100644 --- a/device/nexthop/x86_64-nexthop_5010-r0/media_settings.json +++ b/device/nexthop/x86_64-nexthop_5010-r0/media_settings.json @@ -1,1284 +1,16004 @@ { - "PORT_MEDIA_SETTINGS": { - "33": { - "OPTICAL100": { - "pre3": { - "lane0": "0x0", - "lane1": "0x0", - "lane2": "0x0", - "lane3": "0x0" - }, - "pre2": { - "lane0": "0x0", - "lane1": "0x0", - "lane2": "0x0", - "lane3": "0x0" - }, - "pre1": { - "lane0": "0xffffffea", - "lane1": "0xffffffea", - "lane2": "0xffffffea", - "lane3": "0xffffffea" - }, - "main": { - "lane0": "0x68", - "lane1": "0x68", - "lane2": "0x68", - "lane3": "0x68" - }, - "post1": { - "lane0": "0xffffffec", - "lane1": "0xffffffec", - "lane2": "0xffffffec", - "lane3": "0xffffffec" - }, - "post2": { - "lane0": "0x0", - "lane1": "0x0", - "lane2": "0x0", - "lane3": "0x0" - } - } - }, - "34": { - "OPTICAL100": { - "pre3": { - "lane0": "0x0", - "lane1": "0x0", - "lane2": "0x0", - "lane3": "0x0" - }, - "pre2": { - "lane0": "0x0", - "lane1": "0x0", - "lane2": "0x0", - "lane3": "0x0" - }, - "pre1": { - "lane0": "0xffffffe8", - "lane1": "0xffffffe8", - "lane2": "0xffffffe8", - "lane3": "0xffffffe8" - }, - "main": { - "lane0": "0x68", - "lane1": "0x68", - "lane2": "0x68", - "lane3": "0x68" - }, - "post1": { - "lane0": "0xffffffec", - "lane1": "0xffffffec", - "lane2": "0xffffffec", - "lane3": "0xffffffec" - }, - "post2": { - "lane0": "0x0", - "lane1": "0x0", - "lane2": "0x0", - "lane3": "0x0" - } - } - }, - "35": { - "OPTICAL100": { - "pre3": { - "lane0": "0x0", - "lane1": "0x0", - "lane2": "0x0", - "lane3": "0x0" - }, - "pre2": { - "lane0": "0x0", - "lane1": "0x0", - "lane2": "0x0", - "lane3": "0x0" - }, - "pre1": { - "lane0": "0xffffffe8", - "lane1": "0xffffffe8", - "lane2": "0xffffffe8", - "lane3": "0xffffffe8" - }, - "main": { - "lane0": "0x68", - "lane1": "0x68", - "lane2": "0x68", - "lane3": "0x68" - }, - "post1": { - "lane0": "0xffffffec", - "lane1": "0xffffffec", - "lane2": "0xffffffec", - "lane3": "0xffffffec" - }, - "post2": { - "lane0": "0x0", - "lane1": "0x0", - "lane2": "0x0", - "lane3": "0x0" - } - } - }, - "36": { - "OPTICAL100": { - "pre3": { - "lane0": "0x0", - "lane1": "0x0", - "lane2": "0x0", - "lane3": "0x0" - }, - "pre2": { - "lane0": "0x0", - "lane1": "0x0", - "lane2": "0x0", - "lane3": "0x0" - }, - "pre1": { - "lane0": "0xffffffe8", - "lane1": "0xffffffe8", - "lane2": "0xffffffe8", - "lane3": "0xffffffe8" - }, - "main": { - "lane0": "0x68", - "lane1": "0x68", - "lane2": "0x68", - "lane3": "0x68" - }, - "post1": { - "lane0": "0xffffffec", - "lane1": "0xffffffec", - "lane2": "0xffffffec", - "lane3": "0xffffffec" - }, - "post2": { - "lane0": "0x0", - "lane1": "0x0", - "lane2": "0x0", - "lane3": "0x0" - } - } - }, - "37": { - "OPTICAL100": { - "pre3": { - "lane0": "0x0", - "lane1": "0x0", - "lane2": "0x0", - "lane3": "0x0" - }, - "pre2": { - "lane0": "0x0", - "lane1": "0x0", - "lane2": "0x0", - "lane3": "0x0" - }, - "pre1": { - "lane0": "0xffffffea", - "lane1": "0xffffffea", - "lane2": "0xffffffea", - "lane3": "0xffffffea" - }, - "main": { - "lane0": "0x68", - "lane1": "0x68", - "lane2": "0x68", - "lane3": "0x68" - }, - "post1": { - "lane0": "0xffffffec", - "lane1": "0xffffffec", - "lane2": "0xffffffec", - "lane3": "0xffffffec" - }, - "post2": { - "lane0": "0x0", - "lane1": "0x0", - "lane2": "0x0", - "lane3": "0x0" - } - } - }, - "38": { - "OPTICAL100": { - "pre3": { - "lane0": "0x0", - "lane1": "0x0", - "lane2": "0x0", - "lane3": "0x0" - }, - "pre2": { - "lane0": "0x0", - "lane1": "0x0", - "lane2": "0x0", - "lane3": "0x0" - }, - "pre1": { - "lane0": "0xffffffe8", - "lane1": "0xffffffe8", - "lane2": "0xffffffe8", - "lane3": "0xffffffe8" - }, - "main": { - "lane0": "0x62", - "lane1": "0x62", - "lane2": "0x62", - "lane3": "0x62" - }, - "post1": { - "lane0": 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"0x0", + "lane2": "0x0", + "lane3": "0x0" + } + } + }, + "60": { + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0" + }, + "pre2": { + "lane0": "0x2", + "lane1": "0x2", + "lane2": "0x2", + "lane3": "0x2" + }, + "pre1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8" + }, + "main": { + "lane0": "0x5a", + "lane1": "0x5a", + "lane2": "0x5a", + "lane3": "0x5a" + }, + "post1": { + "lane0": "0xfffffff4", + "lane1": "0xfffffff4", + "lane2": "0xfffffff4", + "lane3": "0xfffffff4" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0" + } + }, + "PINEWAVE-L-OSG4CNS.*-NMT": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0" + }, + "pre2": { + "lane0": "0x2", + "lane1": "0x2", + "lane2": "0x2", + "lane3": "0x2" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2" + }, + "main": { + "lane0": "0x68", + "lane1": "0x68", + "lane2": "0x68", + "lane3": "0x68" + }, + "post1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0" + } + }, + "EOPTOLINK-EO138HGPCT.*CSL1": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0" + }, + "pre2": { + "lane0": "0x2", + "lane1": "0x2", + "lane2": "0x2", + "lane3": "0x2" + }, + "pre1": { + "lane0": "0xffffffea", + "lane1": "0xffffffea", + "lane2": "0xffffffea", + "lane3": "0xffffffea" + }, + "main": { + "lane0": "0x68", + "lane1": "0x68", + "lane2": "0x68", + "lane3": "0x68" + }, + "post1": { + "lane0": "0xffffffea", + "lane1": "0xffffffea", + "lane2": "0xffffffea", + "lane3": "0xffffffea" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0" + } + } + }, + "61": { + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0" + }, + "pre2": { + "lane0": "0x2", + "lane1": "0x2", + "lane2": "0x2", + "lane3": "0x2" + }, + "pre1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8" + }, + "main": { + "lane0": "0x5a", + "lane1": "0x5a", + "lane2": "0x5a", + "lane3": "0x5a" + }, + "post1": { + "lane0": "0xfffffff4", + "lane1": "0xfffffff4", + "lane2": "0xfffffff4", + "lane3": "0xfffffff4" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0" + } + }, + "PINEWAVE-L-OSG4CNS.*-NMT": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0" + }, + "pre2": { + "lane0": "0x2", + "lane1": "0x2", + "lane2": "0x2", + "lane3": "0x2" + }, + "pre1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2" + }, + "main": { + "lane0": "0x68", + "lane1": "0x68", + "lane2": "0x68", + "lane3": "0x68" + }, + "post1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0" + } + }, + "EOPTOLINK-EO138HGPCT.*CSL1": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0" + }, + "pre2": { + "lane0": "0x2", + "lane1": "0x2", + "lane2": "0x2", + "lane3": "0x2" + }, + "pre1": { + "lane0": "0xffffffea", + "lane1": "0xffffffea", + "lane2": "0xffffffea", + "lane3": "0xffffffea" + }, + "main": { + "lane0": "0x68", + "lane1": "0x68", + "lane2": "0x68", + "lane3": "0x68" + }, + "post1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0" + } + } + }, + "62": { + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0" + }, + "pre2": { + "lane0": "0x2", + "lane1": "0x2", + "lane2": "0x2", + "lane3": "0x2" + }, + "pre1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8" + }, + "main": { + "lane0": "0x5a", + "lane1": "0x5a", + "lane2": "0x5a", + "lane3": "0x5a" + }, + "post1": { + "lane0": "0xfffffff4", + "lane1": "0xfffffff4", + "lane2": "0xfffffff4", + "lane3": "0xfffffff4" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0" + } + }, + "PINEWAVE-L-OSG4CNS.*-NMT": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0" + }, + "pre2": { + "lane0": "0x2", + "lane1": "0x2", + "lane2": "0x2", + "lane3": "0x2" + }, + "pre1": { + "lane0": "0xffffffe2", + "lane1": "0xffffffe2", + "lane2": "0xffffffe2", + "lane3": "0xffffffe2" + }, + "main": { + "lane0": "0x68", + "lane1": "0x68", + "lane2": "0x68", + "lane3": "0x68" + }, + "post1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0" + } + }, + "EOPTOLINK-EO138HGPCT.*CSL1": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0" + }, + "pre2": { + "lane0": "0x2", + "lane1": "0x2", + "lane2": "0x2", + "lane3": "0x2" + }, + "pre1": { + "lane0": "0xffffffe2", + "lane1": "0xffffffe2", + "lane2": "0xffffffe2", + "lane3": "0xffffffe2" + }, + "main": { + "lane0": "0x78", + "lane1": "0x78", + "lane2": "0x78", + "lane3": "0x78" + }, + "post1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0" + } + } + }, + "63": { + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0" + }, + "pre2": { + "lane0": "0x2", + "lane1": "0x2", + "lane2": "0x2", + "lane3": "0x2" + }, + "pre1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8" + }, + "main": { + "lane0": "0x5a", + "lane1": "0x5a", + "lane2": "0x5a", + "lane3": "0x5a" + }, + "post1": { + "lane0": "0xfffffff4", + "lane1": "0xfffffff4", + "lane2": "0xfffffff4", + "lane3": "0xfffffff4" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0" + } + }, + "PINEWAVE-L-OSG4CNS.*-NMT": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0" + }, + "pre2": { + "lane0": "0x2", + "lane1": "0x2", + "lane2": "0x2", + "lane3": "0x2" + }, + "pre1": { + "lane0": "0xffffffea", + "lane1": "0xffffffea", + "lane2": "0xffffffea", + "lane3": "0xffffffea" + }, + "main": { + "lane0": "0x70", + "lane1": "0x70", + "lane2": "0x70", + "lane3": "0x70" + }, + "post1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0" + } + }, + "EOPTOLINK-EO138HGPCT.*CSL1": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0" + }, + "pre2": { + "lane0": "0x2", + "lane1": "0x2", + "lane2": "0x2", + "lane3": "0x2" + }, + "pre1": { + "lane0": "0xffffffe6", + "lane1": "0xffffffe6", + "lane2": "0xffffffe6", + "lane3": "0xffffffe6" + }, + "main": { + "lane0": "0x74", + "lane1": "0x74", + "lane2": "0x74", + "lane3": "0x74" + }, + "post1": { + "lane0": "0xffffffea", + "lane1": "0xffffffea", + "lane2": "0xffffffea", + "lane3": "0xffffffea" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0" + } + } + }, + "64": { + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0" + }, + "pre2": { + "lane0": "0x2", + "lane1": "0x2", + "lane2": "0x2", + "lane3": "0x2" + }, + "pre1": { + "lane0": "0xffffffe8", + "lane1": "0xffffffe8", + "lane2": "0xffffffe8", + "lane3": "0xffffffe8" + }, + "main": { + "lane0": "0x5a", + "lane1": "0x5a", + "lane2": "0x5a", + "lane3": "0x5a" + }, + "post1": { + "lane0": "0xfffffff4", + "lane1": "0xfffffff4", + "lane2": "0xfffffff4", + "lane3": "0xfffffff4" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0" + } + }, + "PINEWAVE-L-OSG4CNS.*-NMT": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0" + }, + "pre1": { + "lane0": "0xffffffe6", + "lane1": "0xffffffe6", + "lane2": "0xffffffe6", + "lane3": "0xffffffe6" + }, + "main": { + "lane0": "0x64", + "lane1": "0x64", + "lane2": "0x64", + "lane3": "0x64" + }, + "post1": { + "lane0": "0xfffffff2", + "lane1": "0xfffffff2", + "lane2": "0xfffffff2", + "lane3": "0xfffffff2" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0" + } + }, + "EOPTOLINK-EO138HGPCT.*CSL1": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0" + }, + "pre2": { + "lane0": "0x2", + "lane1": "0x2", + "lane2": "0x2", + "lane3": "0x2" + }, + "pre1": { + "lane0": "0xffffffe6", + "lane1": "0xffffffe6", + "lane2": "0xffffffe6", + "lane3": "0xffffffe6" + }, + "main": { + "lane0": "0x70", + "lane1": "0x70", + "lane2": "0x70", + "lane3": "0x70" + }, + "post1": { + "lane0": "0xffffffea", + "lane1": "0xffffffea", + "lane2": "0xffffffea", + "lane3": "0xffffffea" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0" } + } } -} \ No newline at end of file + } +} diff --git a/device/nexthop/x86_64-nexthop_5010-r0/pddf/pd-plugin.json b/device/nexthop/x86_64-nexthop_5010-r0/pddf/pd-plugin.json index edbe9efcc52..e2f20cc71b9 100644 --- a/device/nexthop/x86_64-nexthop_5010-r0/pddf/pd-plugin.json +++ b/device/nexthop/x86_64-nexthop_5010-r0/pddf/pd-plugin.json @@ -1,7 +1,8 @@ { "DPM": { "cpu_card": { - "nvmem_path": "/sys/bus/nvmem/devices/7-00410/nvmem", + "type": "adm1266", + "dpm": "DPM1", "dpm_signal_to_fault_cause": [ { "pdio_mask": "0xC002", @@ -10,7 +11,6 @@ "gpio_value": "0x0000", "hw_cause": "THERMTRIP_L", "hw_desc": "CPU exceeded Tdie temperature threshold", - "summary": "System shutdown due to CPU thermal trip", "reboot_cause": "REBOOT_CAUSE_THERMAL_OVERLOAD_CPU" }, { @@ -20,7 +20,6 @@ "gpio_value": "0x0000", "hw_cause": "CPU_PWR_CYC_REQ", "hw_desc": "CPU requested power cycle", - "summary": "System power cycled due to CPU request", "reboot_cause": "REBOOT_CAUSE_POWER_LOSS" }, { @@ -30,7 +29,6 @@ "gpio_value": "0x0000", "hw_cause": "BMC_PWR_CYC_REQ", "hw_desc": "BMC requested power cycle", - "summary": "System power cycled due to BMC request", "reboot_cause": "REBOOT_CAUSE_POWER_LOSS" }, { @@ -40,7 +38,6 @@ "gpio_value": "0x0000", "hw_cause": "FPGA_PWR_CYC_REQ", "hw_desc": "FPGA requested power cycle", - "summary": "System power cycled due to FPGA request", "reboot_cause": "REBOOT_CAUSE_POWER_LOSS" }, { @@ -50,33 +47,31 @@ "gpio_value": "0x0000", "hw_cause": "SWITCH_CARD_CP_PWR_BAD", "hw_desc": "Switch card control plane power failure", - "summary": "System rebooted due to switch card control plane power failure", "reboot_cause": "REBOOT_CAUSE_HARDWARE_OTHER" } ], - "vhx_to_rail_desc": { - "1": "POS12V", - "2": "POS5V0", - "4": "POS5V0_S0" - }, - "vpx_to_rail_desc": { - "1": "POS1V0_A7", - "2": "POS1V8_V7", - "3": "POS3V3", - "4": "POS1V0", - "5": "POS1V2_A7", - "6": "POS0V75_S5", - "7": "POS1V8_S5", - "8": "POS3V3_S5", - "9": "POS1V1_S0", - "10": "POS0V78_S0", - "11": "POS0V75_S0", - "12": "POS1V8_S0", - "13": "POS3V3_S0" + "pin_to_name": { + "VH1": "POS12V", + "VH2": "POS5V0", + "VH4": "POS5V0_S0", + "VP1": "POS1V0_A7", + "VP2": "POS1V8_V7", + "VP3": "POS3V3", + "VP4": "POS1V0", + "VP5": "POS1V2_A7", + "VP6": "POS0V75_S5", + "VP7": "POS1V8_S5", + "VP8": "POS3V3_S5", + "VP9": "POS1V1_S0", + "VP10": "POS0V78_S0", + "VP11": "POS0V75_S0", + "VP12": "POS1V8_S0", + "VP13": "POS3V3_S0" } }, "switch_card_1": { - "nvmem_path": "/sys/bus/nvmem/devices/9-00410/nvmem", + "type": "adm1266", + "dpm": "DPM2", "dpm_signal_to_fault_cause": [ { "pdio_mask": "0x0001", @@ -85,7 +80,6 @@ "gpio_value": "0x0000", "hw_cause": "PSU_VIN_LOSS", "hw_desc": "Both PSUs lost input power", - "summary": "System powered off due to loss of input power on both PSUs", "reboot_cause": "REBOOT_CAUSE_POWER_LOSS" }, { @@ -94,8 +88,7 @@ "pdio_value": "0x0002", "gpio_value": "0x0000", "hw_cause": "OVER_TEMP", - "hw_desc": "Switch card temp sensor OT", - "summary": "System rebooted due to switch card temperature exceeding threshold", + "hw_desc": "Switch card exceeded overtemperature", "reboot_cause": "REBOOT_CAUSE_THERMAL_OVERLOAD_OTHER" }, { @@ -105,7 +98,6 @@ "gpio_value": "0x0000", "hw_cause": "CPU_PWR_BAD", "hw_desc": "CPU card power bad", - "summary": "System rebooted due to CPU card power failure", "reboot_cause": "REBOOT_CAUSE_HARDWARE_OTHER" }, { @@ -115,7 +107,6 @@ "gpio_value": "0x0000", "hw_cause": "WATCHDOG", "hw_desc": "FPGA watchdog expired", - "summary": "System rebooted due to FPGA watchdog expiration", "reboot_cause": "REBOOT_CAUSE_WATCHDOG" }, { @@ -124,8 +115,7 @@ "pdio_value": "0x0010", "gpio_value": "0x0000", "hw_cause": "ASIC_OT", - "hw_desc": "ASIC MAX_TEMP exceeded OT threshold", - "summary": "System rebooted due to ASIC temperature exceeding maximum threshold", + "hw_desc": "ASIC exceeded overtemperature", "reboot_cause": "REBOOT_CAUSE_THERMAL_OVERLOAD_ASIC" }, { @@ -135,7 +125,6 @@ "gpio_value": "0x0000", "hw_cause": "CPU_CMD_PCYC", "hw_desc": "CPU card commanded power cycle", - "summary": "System power cycled due to CPU card request", "reboot_cause": "REBOOT_CAUSE_POWER_LOSS" }, { @@ -145,34 +134,32 @@ "gpio_value": "0x0000", "hw_cause": "FPGA_CMD_PCYC", "hw_desc": "FPGA commanded power cycle", - "summary": "System power cycled due to FPGA request", "reboot_cause": "REBOOT_CAUSE_POWER_LOSS" } ], - "vhx_to_rail_desc": { - "1": "POS12V0", - "2": "POS5V0", - "3": "POS1V0", - "4": "POS1V8_CP" - }, - "vpx_to_rail_desc": { - "1": "POS1V2_CP", - "2": "POS3V3", - "3": "POS3V3_WEST", - "4": "POS3V3_EAST", - "5": "POS1V2_DP", - "6": "POS1V8_DP", - "7": "POS0V78_VDDC_D0", - "8": "POS0V78_VDDC_D1", - "9": "POS0V75_TRVDD_D0", - "10": "POS0V75_TRVDD_D1", - "11": "POS0V9_PVDD_WEST", - "12": "POS0V9_PVDD_EAST", - "13": "PSU0 Imon" + "pin_to_name": { + "VH1": "POS12V0", + "VH2": "POS5V0", + "VH3": "POS1V0", + "VH4": "POS1V8_CP", + "VP1": "POS1V2_CP", + "VP2": "POS3V3", + "VP3": "POS3V3_WEST", + "VP4": "POS3V3_EAST", + "VP5": "POS1V2_DP", + "VP6": "POS1V8_DP", + "VP7": "POS0V78_VDDC_D0", + "VP8": "POS0V78_VDDC_D1", + "VP9": "POS0V75_TRVDD_D0", + "VP10": "POS0V75_TRVDD_D1", + "VP11": "POS0V9_PVDD_WEST", + "VP12": "POS0V9_PVDD_EAST", + "VP13": "PSU0 Imon" } }, "switch_card_2": { - "nvmem_path": "/sys/bus/nvmem/devices/9-00430/nvmem", + "type": "adm1266", + "dpm": "DPM3", "dpm_signal_to_fault_cause": [ { "pdio_mask": "0x0001", @@ -181,34 +168,32 @@ "gpio_value": "0x0000", "hw_cause": "NO_FAN_PRSNT", "hw_desc": "All 4 system fans removed", - "summary": "System rebooted due to loss of all system fans", "reboot_cause": "REBOOT_CAUSE_INSUFFICIENT_FAN_SPEED" } ], - "vhx_to_rail_desc": { - "1": "POS12V0", - "2": "POS5V0", - "3": "POS0V9_TRVDD_D0", - "4": "POS0V9_TRVDD_D1" - }, - "vpx_to_rail_desc": { - "1": "POS0V8_AVDD", - "2": "POS1V5_APVDD_D0", - "3": "POS1V5_APVDD_D1", - "4": "POS1V5_VDDH", - "5": "POS1V5_PBU_VDDA", - "6": "POS0V8_PB_VDD", - "7": "POS2V5_HBM_D0", - "8": "POS2V5_HBM_D1", - "9": "POS1V2_HBM_D0", - "10": "POS1V2_HBM_D1", - "11": "D0 VDDC Imon", - "12": "D1 VDDC Imon", - "13": "PSU1 Imon" + "pin_to_name": { + "VH1": "POS12V0", + "VH2": "POS5V0", + "VH3": "POS0V9_TRVDD_D0", + "VH4": "POS0V9_TRVDD_D1", + "VP1": "POS0V8_AVDD", + "VP2": "POS1V5_APVDD_D0", + "VP3": "POS1V5_APVDD_D1", + "VP4": "POS1V5_VDDH", + "VP5": "POS1V5_PBU_VDDA", + "VP6": "POS0V8_PB_VDD", + "VP7": "POS2V5_HBM_D0", + "VP8": "POS2V5_HBM_D1", + "VP9": "POS1V2_HBM_D0", + "VP10": "POS1V2_HBM_D1", + "VP11": "D0 VDDC Imon", + "VP12": "D1 VDDC Imon", + "VP13": "PSU1 Imon" } }, "mezzanine_card": { - "nvmem_path": "/sys/bus/nvmem/devices/9-00450/nvmem", + "type": "adm1266", + "dpm": "DPM4", "dpm_signal_to_fault_cause": [ { "pdio_mask": "0x0001", @@ -217,7 +202,6 @@ "gpio_value": "0x0000", "hw_cause": "PSU_VIN_LOSS", "hw_desc": "Both PSUs lost input power", - "summary": "System powered off due to loss of input power on both PSUs", "reboot_cause": "REBOOT_CAUSE_POWER_LOSS" }, { @@ -226,8 +210,7 @@ "pdio_value": "0x0002", "gpio_value": "0x0000", "hw_cause": "OVER_TEMP", - "hw_desc": "Switch card temp sensor OT", - "summary": "System rebooted due to switch card temperature exceeding threshold", + "hw_desc": "Switch card exceeded overtemperature", "reboot_cause": "REBOOT_CAUSE_THERMAL_OVERLOAD_OTHER" }, { @@ -237,7 +220,6 @@ "gpio_value": "0x0000", "hw_cause": "CPU_PWR_BAD", "hw_desc": "CPU card power bad", - "summary": "System rebooted due to CPU card power failure", "reboot_cause": "REBOOT_CAUSE_HARDWARE_OTHER" }, { @@ -247,7 +229,6 @@ "gpio_value": "0x0000", "hw_cause": "WATCHDOG", "hw_desc": "FPGA watchdog expired", - "summary": "System rebooted due to FPGA watchdog expiration", "reboot_cause": "REBOOT_CAUSE_WATCHDOG" }, { @@ -256,30 +237,27 @@ "pdio_value": "0x0010", "gpio_value": "0x0000", "hw_cause": "ASIC_OT", - "hw_desc": "ASIC MAX_TEMP exceeded OT threshold", - "summary": "System rebooted due to ASIC temperature exceeding maximum threshold", + "hw_desc": "ASIC exceeded overtemperature", "reboot_cause": "REBOOT_CAUSE_THERMAL_OVERLOAD_ASIC" } ], - "vhx_to_rail_desc": { - "1": "12V", - "2": "5V0", - "3": "1V0_FPGA", - "4": "1V8_FPGA" - }, - "vpx_to_rail_desc": { - "1": "1V2_FPGA", - "2": "3V3_FPGA", - "3": "3V3_WEST_MC", - "4": "POS1V5_VDD3V3_EAST_MCH", - "5": "VDDIOL_1P5", - "6": "VDDIO_1P8", - "7": "VDDC_WEST", - "8": "VDDC_EAST", - "9": "AVVDL_0P75_WEST", - "10": "AVVDL_0P75_EAST", - "11": "AVDDH_0P9_WEST", - "12": "AVDDH_0P9_EAST" + "pin_to_name": { + "VH1": "12V", + "VH2": "5V0", + "VH3": "1V0_FPGA", + "VH4": "1V8_FPGA", + "VP1": "1V2_FPGA", + "VP2": "3V3_FPGA", + "VP3": "3V3_WEST_MC", + "VP4": "POS1V5_VDD3V3_EAST_MCH", + "VP5": "VDDIOL_1P5", + "VP6": "VDDIO_1P8", + "VP7": "VDDC_WEST", + "VP8": "VDDC_EAST", + "VP9": "AVVDL_0P75_WEST", + "VP10": "AVVDL_0P75_EAST", + "VP11": "AVDDH_0P9_WEST", + "VP12": "AVDDH_0P9_EAST" } } }, diff --git a/device/nexthop/x86_64-nexthop_5010-r0/pddf/pddf-device.json.j2 b/device/nexthop/x86_64-nexthop_5010-r0/pddf/pddf-device.json.j2 index 92be2756d7f..4ec54d052bd 100644 --- a/device/nexthop/x86_64-nexthop_5010-r0/pddf/pddf-device.json.j2 +++ b/device/nexthop/x86_64-nexthop_5010-r0/pddf/pddf-device.json.j2 @@ -8,7 +8,7 @@ "num_asic_temps": 52, "num_voltage_sensors": 82, "num_current_sensors": 20, - "num_components": 7, + "num_components": 36, "nexthop_thermal_xcvr_setpoint_margin" : 8, "nexthop_thermal_xcvr_setpoint_override" : null, "nexthop_thermal_xcvr_pid_domain": "main", @@ -33,12 +33,15 @@ "std_kos": [ "at24", "i2c-dev", + "spi-xilinx", "optoe" ], "pddf_kos": [ + "pddf_spi_module", "pddf_multifpgapci_i2c_module", "pddf_multifpgapci_gpio_module", "pddf_multifpgapci_mdio_module", + "pddf_multifpgapci_spi_module", "pddf_client_module", "pddf_multifpgapci_driver", "pddf_multifpgapci_module", @@ -56,6 +59,7 @@ "pddf_custom_fpga_algo", "pddf_custom_mdio_algo", "nh_pmbus_core", + "nh_isl68137", "nh_tda38740", "nh_adm1266", "nh_tmp464" @@ -271,6 +275,876 @@ } ] }, + "COMPONENT8": { + "comp_attr": { + "name": "DPM1", + "type": "dpm", + "description": "CPU card power management", + "boot_type": "none" + }, + "attr_list": [ + { + "attr_name": "version", + "get_cmd": "adm1266_version 7-0041" + }, + { + "attr_name": "model", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "serial", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "revision", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "update", + "cmd": "/var/platform/fwpackage/fwpackage/update_firmware.py {{model_name}} DPM1 {}" + } + ] + }, + "COMPONENT9": { + "comp_attr": { + "name": "DPM2", + "type": "dpm", + "description": "Switch card power management 1", + "boot_type": "none" + }, + "attr_list": [ + { + "attr_name": "version", + "get_cmd": "adm1266_version 9-0041" + }, + { + "attr_name": "model", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "serial", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "revision", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "update", + "cmd": "/var/platform/fwpackage/fwpackage/update_firmware.py {{model_name}} DPM2 {}" + } + ] + }, + "COMPONENT10": { + "comp_attr": { + "name": "DPM3", + "type": "dpm", + "description": "Switch card power management 2", + "boot_type": "none" + }, + "attr_list": [ + { + "attr_name": "version", + "get_cmd": "adm1266_version 9-0043" + }, + { + "attr_name": "model", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "serial", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "revision", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "update", + "cmd": "/var/platform/fwpackage/fwpackage/update_firmware.py {{model_name}} DPM3 {}" + } + ] + }, + "COMPONENT11": { + "comp_attr": { + "name": "DPM4", + "type": "dpm", + "description": "Mezz card power management", + "boot_type": "none" + }, + "attr_list": [ + { + "attr_name": "version", + "get_cmd": "adm1266_version 9-0045" + }, + { + "attr_name": "model", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "serial", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "revision", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "update", + "cmd": "/var/platform/fwpackage/fwpackage/update_firmware.py {{model_name}} DPM4 {}" + } + ] + }, + "COMPONENT12": { + "comp_attr": { + "name": "DCDC2", + "type": "dcdc", + "description": "DCDC voltage regulator", + "boot_type": "none" + }, + "attr_list": [ + { + "attr_name": "version", + "get_cmd": "cat /sys/bus/i2c/devices/90-0060/hwmon/hwmon*/mfr_revision" + }, + { + "attr_name": "model", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "serial", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "revision", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "update", + "cmd": "/var/platform/fwpackage/fwpackage/update_firmware.py {{model_name}} DCDC2 {}" + } + ] + }, + "COMPONENT13": { + "comp_attr": { + "name": "DCDC3", + "type": "dcdc", + "description": "DCDC voltage regulator", + "boot_type": "none" + }, + "attr_list": [ + { + "attr_name": "version", + "get_cmd": "cat /sys/bus/i2c/devices/90-0061/hwmon/hwmon*/mfr_revision" + }, + { + "attr_name": "model", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "serial", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "revision", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "update", + "cmd": "/var/platform/fwpackage/fwpackage/update_firmware.py {{model_name}} DCDC3 {}" + } + ] + }, + "COMPONENT14": { + "comp_attr": { + "name": "DCDC4", + "type": "dcdc", + "description": "DCDC voltage regulator", + "boot_type": "none" + }, + "attr_list": [ + { + "attr_name": "version", + "get_cmd": "cat /sys/bus/i2c/devices/90-0072/hwmon/hwmon*/mfr_revision" + }, + { + "attr_name": "model", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "serial", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "revision", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "update", + "cmd": "/var/platform/fwpackage/fwpackage/update_firmware.py {{model_name}} DCDC4 {}" + } + ] + }, + "COMPONENT15": { + "comp_attr": { + "name": "DCDC5", + "type": "dcdc", + "description": "DCDC voltage regulator", + "boot_type": "none" + }, + "attr_list": [ + { + "attr_name": "version", + "get_cmd": "cat /sys/bus/i2c/devices/90-0075/hwmon/hwmon*/mfr_revision" + }, + { + "attr_name": "model", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "serial", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "revision", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "update", + "cmd": "/var/platform/fwpackage/fwpackage/update_firmware.py {{model_name}} DCDC5 {}" + } + ] + }, + "COMPONENT16": { + "comp_attr": { + "name": "DCDC6", + "type": "dcdc", + "description": "DCDC voltage regulator", + "boot_type": "none" + }, + "attr_list": [ + { + "attr_name": "version", + "get_cmd": "cat /sys/bus/i2c/devices/90-0076/hwmon/hwmon*/mfr_revision" + }, + { + "attr_name": "model", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "serial", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "revision", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "update", + "cmd": "/var/platform/fwpackage/fwpackage/update_firmware.py {{model_name}} DCDC6 {}" + } + ] + }, + "COMPONENT17": { + "comp_attr": { + "name": "DCDC7", + "type": "dcdc", + "description": "DCDC voltage regulator", + "boot_type": "none" + }, + "attr_list": [ + { + "attr_name": "version", + "get_cmd": "cat /sys/bus/i2c/devices/94-0060/hwmon/hwmon*/mfr_revision" + }, + { + "attr_name": "model", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "serial", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "revision", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "update", + "cmd": "/var/platform/fwpackage/fwpackage/update_firmware.py {{model_name}} DCDC7 {}" + } + ] + }, + "COMPONENT18": { + "comp_attr": { + "name": "DCDC8", + "type": "dcdc", + "description": "DCDC voltage regulator", + "boot_type": "none" + }, + "attr_list": [ + { + "attr_name": "version", + "get_cmd": "cat /sys/bus/i2c/devices/94-0061/hwmon/hwmon*/mfr_revision" + }, + { + "attr_name": "model", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "serial", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "revision", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "update", + "cmd": "/var/platform/fwpackage/fwpackage/update_firmware.py {{model_name}} DCDC8 {}" + } + ] + }, + "COMPONENT19": { + "comp_attr": { + "name": "DCDC9", + "type": "dcdc", + "description": "DCDC voltage regulator", + "boot_type": "none" + }, + "attr_list": [ + { + "attr_name": "version", + "get_cmd": "cat /sys/bus/i2c/devices/94-0072/hwmon/hwmon*/mfr_revision" + }, + { + "attr_name": "model", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "serial", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "revision", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "update", + "cmd": "/var/platform/fwpackage/fwpackage/update_firmware.py {{model_name}} DCDC9 {}" + } + ] + }, + "COMPONENT20": { + "comp_attr": { + "name": "DCDC10", + "type": "dcdc", + "description": "DCDC voltage regulator", + "boot_type": "none" + }, + "attr_list": [ + { + "attr_name": "version", + "get_cmd": "cat /sys/bus/i2c/devices/94-0075/hwmon/hwmon*/mfr_revision" + }, + { + "attr_name": "model", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "serial", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "revision", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "update", + "cmd": "/var/platform/fwpackage/fwpackage/update_firmware.py {{model_name}} DCDC10 {}" + } + ] + }, + "COMPONENT21": { + "comp_attr": { + "name": "PHY0", + "type": "gearbox", + "description": "Agera Gearbox", + "boot_type": "none" + }, + "attr_list": [ + { + "attr_name": "version", + "get_cmd": "agera_version PHY0" + }, + { + "attr_name": "model", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "serial", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "revision", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "update", + "cmd": "/var/platform/fwpackage/fwpackage/update_firmware.py {{model_name}} PHY0 {}" + } + ] + }, + "COMPONENT22": { + "comp_attr": { + "name": "PHY1", + "type": "gearbox", + "description": "Agera Gearbox", + "boot_type": "none" + }, + "attr_list": [ + { + "attr_name": "version", + "get_cmd": "agera_version PHY1" + }, + { + "attr_name": "model", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "serial", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "revision", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "update", + "cmd": "/var/platform/fwpackage/fwpackage/update_firmware.py {{model_name}} PHY1 {}" + } + ] + }, + "COMPONENT23": { + "comp_attr": { + "name": "PHY2", + "type": "gearbox", + "description": "Agera Gearbox", + "boot_type": "none" + }, + "attr_list": [ + { + "attr_name": "version", + "get_cmd": "agera_version PHY2" + }, + { + "attr_name": "model", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "serial", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "revision", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "update", + "cmd": "/var/platform/fwpackage/fwpackage/update_firmware.py {{model_name}} PHY2 {}" + } + ] + }, + "COMPONENT24": { + "comp_attr": { + "name": "PHY3", + "type": "gearbox", + "description": "Agera Gearbox", + "boot_type": "none" + }, + "attr_list": [ + { + "attr_name": "version", + "get_cmd": "agera_version PHY3" + }, + { + "attr_name": "model", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "serial", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "revision", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "update", + "cmd": "/var/platform/fwpackage/fwpackage/update_firmware.py {{model_name}} PHY3 {}" + } + ] + }, + "COMPONENT25": { + "comp_attr": { + "name": "PHY4", + "type": "gearbox", + "description": "Agera Gearbox", + "boot_type": "none" + }, + "attr_list": [ + { + "attr_name": "version", + "get_cmd": "agera_version PHY4" + }, + { + "attr_name": "model", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "serial", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "revision", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "update", + "cmd": "/var/platform/fwpackage/fwpackage/update_firmware.py {{model_name}} PHY4 {}" + } + ] + }, + "COMPONENT26": { + "comp_attr": { + "name": "PHY5", + "type": "gearbox", + "description": "Agera Gearbox", + "boot_type": "none" + }, + "attr_list": [ + { + "attr_name": "version", + "get_cmd": "agera_version PHY5" + }, + { + "attr_name": "model", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "serial", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "revision", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "update", + "cmd": "/var/platform/fwpackage/fwpackage/update_firmware.py {{model_name}} PHY5 {}" + } + ] + }, + "COMPONENT27": { + "comp_attr": { + "name": "PHY6", + "type": "gearbox", + "description": "Agera Gearbox", + "boot_type": "none" + }, + "attr_list": [ + { + "attr_name": "version", + "get_cmd": "agera_version PHY6" + }, + { + "attr_name": "model", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "serial", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "revision", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "update", + "cmd": "/var/platform/fwpackage/fwpackage/update_firmware.py {{model_name}} PHY6 {}" + } + ] + }, + "COMPONENT28": { + "comp_attr": { + "name": "PHY7", + "type": "gearbox", + "description": "Agera Gearbox", + "boot_type": "none" + }, + "attr_list": [ + { + "attr_name": "version", + "get_cmd": "agera_version PHY7" + }, + { + "attr_name": "model", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "serial", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "revision", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "update", + "cmd": "/var/platform/fwpackage/fwpackage/update_firmware.py {{model_name}} PHY7 {}" + } + ] + }, + "COMPONENT29": { + "comp_attr": { + "name": "PHY8", + "type": "gearbox", + "description": "Agera Gearbox", + "boot_type": "none" + }, + "attr_list": [ + { + "attr_name": "version", + "get_cmd": "agera_version PHY8" + }, + { + "attr_name": "model", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "serial", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "revision", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "update", + "cmd": "/var/platform/fwpackage/fwpackage/update_firmware.py {{model_name}} PHY8 {}" + } + ] + }, + "COMPONENT30": { + "comp_attr": { + "name": "PHY9", + "type": "gearbox", + "description": "Agera Gearbox", + "boot_type": "none" + }, + "attr_list": [ + { + "attr_name": "version", + "get_cmd": "agera_version PHY9" + }, + { + "attr_name": "model", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "serial", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "revision", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "update", + "cmd": "/var/platform/fwpackage/fwpackage/update_firmware.py {{model_name}} PHY9 {}" + } + ] + }, + "COMPONENT31": { + "comp_attr": { + "name": "PHY10", + "type": "gearbox", + "description": "Agera Gearbox", + "boot_type": "none" + }, + "attr_list": [ + { + "attr_name": "version", + "get_cmd": "agera_version PHY10" + }, + { + "attr_name": "model", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "serial", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "revision", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "update", + "cmd": "/var/platform/fwpackage/fwpackage/update_firmware.py {{model_name}} PHY10 {}" + } + ] + }, + "COMPONENT32": { + "comp_attr": { + "name": "PHY11", + "type": "gearbox", + "description": "Agera Gearbox", + "boot_type": "none" + }, + "attr_list": [ + { + "attr_name": "version", + "get_cmd": "agera_version PHY11" + }, + { + "attr_name": "model", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "serial", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "revision", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "update", + "cmd": "/var/platform/fwpackage/fwpackage/update_firmware.py {{model_name}} PHY11 {}" + } + ] + }, + "COMPONENT33": { + "comp_attr": { + "name": "PHY12", + "type": "gearbox", + "description": "Agera Gearbox", + "boot_type": "none" + }, + "attr_list": [ + { + "attr_name": "version", + "get_cmd": "agera_version PHY12" + }, + { + "attr_name": "model", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "serial", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "revision", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "update", + "cmd": "/var/platform/fwpackage/fwpackage/update_firmware.py {{model_name}} PHY12 {}" + } + ] + }, + "COMPONENT34": { + "comp_attr": { + "name": "PHY13", + "type": "gearbox", + "description": "Agera Gearbox", + "boot_type": "none" + }, + "attr_list": [ + { + "attr_name": "version", + "get_cmd": "agera_version PHY13" + }, + { + "attr_name": "model", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "serial", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "revision", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "update", + "cmd": "/var/platform/fwpackage/fwpackage/update_firmware.py {{model_name}} PHY13 {}" + } + ] + }, + "COMPONENT35": { + "comp_attr": { + "name": "PHY14", + "type": "gearbox", + "description": "Agera Gearbox", + "boot_type": "none" + }, + "attr_list": [ + { + "attr_name": "version", + "get_cmd": "agera_version PHY14" + }, + { + "attr_name": "model", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "serial", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "revision", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "update", + "cmd": "/var/platform/fwpackage/fwpackage/update_firmware.py {{model_name}} PHY14 {}" + } + ] + }, + "COMPONENT36": { + "comp_attr": { + "name": "PHY15", + "type": "gearbox", + "description": "Agera Gearbox", + "boot_type": "none" + }, + "attr_list": [ + { + "attr_name": "version", + "get_cmd": "agera_version PHY15" + }, + { + "attr_name": "model", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "serial", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "revision", + "get_cmd": "echo 'N/A'" + }, + { + "attr_name": "update", + "cmd": "/var/platform/fwpackage/fwpackage/update_firmware.py {{model_name}} PHY15 {}" + } + ] + }, "SYSTEM": { "dev_info": { "device_type": "CPU", @@ -408,6 +1282,7 @@ } ] }, + "spi_controllers": ["CPUCARD_SPI_CONTROLLER"], "gpio": { "line0": { "attr_list": [ @@ -2059,6 +2934,11 @@ } ] }, + "spi_controllers": [ + "SWITCHCARD_SPI_CONTROLLER0", + "SWITCHCARD_SPI_CONTROLLER1", + "SWITCHCARD_SPI_CONTROLLER2" + ], "gpio": { "line0": { "attr_list": [ @@ -2616,7 +3496,7 @@ "topo_info": { "parent_bus": "0x55", "dev_addr": "0x50", - "dev_type": "24c64" + "dev_type": "24c02" }, "dev_attr": { "access_mode": "BLOCK" @@ -2709,6 +3589,7 @@ "attr_mask": "0x0", "attr_cmpval": "0xff", "attr_data_format": "linear16", + "attr_vout_mode": "0x17", "attr_len": "2" }, { @@ -2818,6 +3699,7 @@ "attr_mask": "0x0", "attr_cmpval": "0xff", "attr_data_format": "linear16", + "attr_vout_mode": "0x17", "attr_len": "2" }, { @@ -2828,6 +3710,7 @@ "attr_mask": "0x0", "attr_cmpval": "0xff", "attr_data_format": "linear16", + "attr_vout_mode": "0x17", "attr_len": "2" }, { @@ -2877,7 +3760,7 @@ "topo_info": { "parent_bus": "0x56", "dev_addr": "0x50", - "dev_type": "24c64" + "dev_type": "24c02" }, "dev_attr": { "access_mode": "BLOCK" @@ -2970,6 +3853,7 @@ "attr_mask": "0x0", "attr_cmpval": "0xff", "attr_data_format": "linear16", + "attr_vout_mode": "0x17", "attr_len": "2" }, { @@ -3079,6 +3963,7 @@ "attr_mask": "0x0", "attr_cmpval": "0xff", "attr_data_format": "linear16", + "attr_vout_mode": "0x17", "attr_len": "2" }, { @@ -3089,6 +3974,7 @@ "attr_mask": "0x0", "attr_cmpval": "0xff", "attr_data_format": "linear16", + "attr_vout_mode": "0x17", "attr_len": "2" }, { @@ -3516,7 +4402,7 @@ "attr_devname": "SWITCHCARD_FPGA", "attr_offset": "0x4038", "attr_mask": "0x0", - "attr_cmpval": "0x0", + "attr_cmpval": "0x1", "attr_len": "1" }, { @@ -3615,7 +4501,7 @@ "attr_devname": "SWITCHCARD_FPGA", "attr_offset": "0x4038", "attr_mask": "0x1", - "attr_cmpval": "0x0", + "attr_cmpval": "0x1", "attr_len": "1" }, { @@ -3714,7 +4600,7 @@ "attr_devname": "SWITCHCARD_FPGA", "attr_offset": "0x4038", "attr_mask": "0x2", - "attr_cmpval": "0x0", + "attr_cmpval": "0x1", "attr_len": "1" }, { @@ -3813,7 +4699,7 @@ "attr_devname": "SWITCHCARD_FPGA", "attr_offset": "0x4038", "attr_mask": "0x3", - "attr_cmpval": "0x0", + "attr_cmpval": "0x1", "attr_len": "1" }, { @@ -3912,7 +4798,7 @@ "attr_devname": "SWITCHCARD_FPGA", "attr_offset": "0x4038", "attr_mask": "0x4", - "attr_cmpval": "0x0", + "attr_cmpval": "0x1", "attr_len": "1" }, { @@ -4011,7 +4897,7 @@ "attr_devname": "SWITCHCARD_FPGA", "attr_offset": "0x4038", "attr_mask": "0x5", - "attr_cmpval": "0x0", + "attr_cmpval": "0x1", "attr_len": "1" }, { @@ -4110,7 +4996,7 @@ "attr_devname": "SWITCHCARD_FPGA", "attr_offset": "0x4038", "attr_mask": "0x6", - "attr_cmpval": "0x0", + "attr_cmpval": "0x1", "attr_len": "1" }, { @@ -4209,7 +5095,7 @@ "attr_devname": "SWITCHCARD_FPGA", "attr_offset": "0x4038", "attr_mask": "0x7", - "attr_cmpval": "0x0", + "attr_cmpval": "0x1", "attr_len": "1" }, { @@ -4308,7 +5194,7 @@ "attr_devname": "SWITCHCARD_FPGA", "attr_offset": "0x4038", "attr_mask": "0x8", - "attr_cmpval": "0x0", + "attr_cmpval": "0x1", "attr_len": "1" }, { @@ -4407,7 +5293,7 @@ "attr_devname": "SWITCHCARD_FPGA", "attr_offset": "0x4038", "attr_mask": "0x9", - "attr_cmpval": "0x0", + "attr_cmpval": "0x1", "attr_len": "1" }, { @@ -4506,7 +5392,7 @@ "attr_devname": "SWITCHCARD_FPGA", "attr_offset": "0x4038", "attr_mask": "0xa", - "attr_cmpval": "0x0", + "attr_cmpval": "0x1", "attr_len": "1" }, { @@ -4605,7 +5491,7 @@ "attr_devname": "SWITCHCARD_FPGA", "attr_offset": "0x4038", "attr_mask": "0xb", - "attr_cmpval": "0x0", + "attr_cmpval": "0x1", "attr_len": "1" }, { @@ -4704,7 +5590,7 @@ "attr_devname": "SWITCHCARD_FPGA", "attr_offset": "0x4038", "attr_mask": "0xc", - "attr_cmpval": "0x0", + "attr_cmpval": "0x1", "attr_len": "1" }, { @@ -4803,7 +5689,7 @@ "attr_devname": "SWITCHCARD_FPGA", "attr_offset": "0x4038", "attr_mask": "0xd", - "attr_cmpval": "0x0", + "attr_cmpval": "0x1", "attr_len": "1" }, { @@ -4902,7 +5788,7 @@ "attr_devname": "SWITCHCARD_FPGA", "attr_offset": "0x4038", "attr_mask": "0xe", - "attr_cmpval": "0x0", + "attr_cmpval": "0x1", "attr_len": "1" }, { @@ -5001,7 +5887,7 @@ "attr_devname": "SWITCHCARD_FPGA", "attr_offset": "0x4038", "attr_mask": "0xf", - "attr_cmpval": "0x0", + "attr_cmpval": "0x1", "attr_len": "1" }, { @@ -5100,7 +5986,7 @@ "attr_devname": "SWITCHCARD_FPGA", "attr_offset": "0x404c", "attr_mask": "0x0", - "attr_cmpval": "0x0", + "attr_cmpval": "0x1", "attr_len": "1" }, { @@ -5199,7 +6085,7 @@ "attr_devname": "SWITCHCARD_FPGA", "attr_offset": "0x404c", "attr_mask": "0x1", - "attr_cmpval": "0x0", + "attr_cmpval": "0x1", "attr_len": "1" }, { @@ -5298,7 +6184,7 @@ "attr_devname": "SWITCHCARD_FPGA", "attr_offset": "0x404c", "attr_mask": "0x2", - "attr_cmpval": "0x0", + "attr_cmpval": "0x1", "attr_len": "1" }, { @@ -5397,7 +6283,7 @@ "attr_devname": "SWITCHCARD_FPGA", "attr_offset": "0x404c", "attr_mask": "0x3", - "attr_cmpval": "0x0", + "attr_cmpval": "0x1", "attr_len": "1" }, { @@ -5496,7 +6382,7 @@ "attr_devname": "SWITCHCARD_FPGA", "attr_offset": "0x404c", "attr_mask": "0x4", - "attr_cmpval": "0x0", + "attr_cmpval": "0x1", "attr_len": "1" }, { @@ -5595,7 +6481,7 @@ "attr_devname": "SWITCHCARD_FPGA", "attr_offset": "0x404c", "attr_mask": "0x5", - "attr_cmpval": "0x0", + "attr_cmpval": "0x1", "attr_len": "1" }, { @@ -5694,7 +6580,7 @@ "attr_devname": "SWITCHCARD_FPGA", "attr_offset": "0x404c", "attr_mask": "0x6", - "attr_cmpval": "0x0", + "attr_cmpval": "0x1", "attr_len": "1" }, { @@ -5793,7 +6679,7 @@ "attr_devname": "SWITCHCARD_FPGA", "attr_offset": "0x404c", "attr_mask": "0x7", - "attr_cmpval": "0x0", + "attr_cmpval": "0x1", "attr_len": "1" }, { @@ -5892,7 +6778,7 @@ "attr_devname": "SWITCHCARD_FPGA", "attr_offset": "0x404c", "attr_mask": "0x8", - "attr_cmpval": "0x0", + "attr_cmpval": "0x1", "attr_len": "1" }, { @@ -5991,7 +6877,7 @@ "attr_devname": "SWITCHCARD_FPGA", "attr_offset": "0x404c", "attr_mask": "0x9", - "attr_cmpval": "0x0", + "attr_cmpval": "0x1", "attr_len": "1" }, { @@ -6090,7 +6976,7 @@ "attr_devname": "SWITCHCARD_FPGA", "attr_offset": "0x404c", "attr_mask": "0xa", - "attr_cmpval": "0x0", + "attr_cmpval": "0x1", "attr_len": "1" }, { @@ -6189,7 +7075,7 @@ "attr_devname": "SWITCHCARD_FPGA", "attr_offset": "0x404c", "attr_mask": "0xb", - "attr_cmpval": "0x0", + "attr_cmpval": "0x1", "attr_len": "1" }, { @@ -6288,7 +7174,7 @@ "attr_devname": "SWITCHCARD_FPGA", "attr_offset": "0x404c", "attr_mask": "0xc", - "attr_cmpval": "0x0", + "attr_cmpval": "0x1", "attr_len": "1" }, { @@ -6387,7 +7273,7 @@ "attr_devname": "SWITCHCARD_FPGA", "attr_offset": "0x404c", "attr_mask": "0xd", - "attr_cmpval": "0x0", + "attr_cmpval": "0x1", "attr_len": "1" }, { @@ -6486,7 +7372,7 @@ "attr_devname": "SWITCHCARD_FPGA", "attr_offset": "0x404c", "attr_mask": "0xe", - "attr_cmpval": "0x0", + "attr_cmpval": "0x1", "attr_len": "1" }, { @@ -6585,7 +7471,7 @@ "attr_devname": "SWITCHCARD_FPGA", "attr_offset": "0x404c", "attr_mask": "0xf", - "attr_cmpval": "0x0", + "attr_cmpval": "0x1", "attr_len": "1" }, { @@ -6684,7 +7570,7 @@ "attr_devname": "SWITCHCARD_FPGA", "attr_offset": "0x38", "attr_mask": "0x0", - "attr_cmpval": "0x0", + "attr_cmpval": "0x1", "attr_len": "1" }, { @@ -6783,7 +7669,7 @@ "attr_devname": "SWITCHCARD_FPGA", "attr_offset": "0x38", "attr_mask": "0x1", - "attr_cmpval": "0x0", + "attr_cmpval": "0x1", "attr_len": "1" }, { @@ -6882,7 +7768,7 @@ "attr_devname": "SWITCHCARD_FPGA", "attr_offset": "0x38", "attr_mask": "0x2", - "attr_cmpval": "0x0", + "attr_cmpval": "0x1", "attr_len": "1" }, { @@ -6981,7 +7867,7 @@ "attr_devname": "SWITCHCARD_FPGA", "attr_offset": "0x38", "attr_mask": "0x3", - "attr_cmpval": "0x0", + "attr_cmpval": "0x1", "attr_len": "1" }, { @@ -7080,7 +7966,7 @@ "attr_devname": "SWITCHCARD_FPGA", "attr_offset": "0x38", "attr_mask": "0x4", - "attr_cmpval": "0x0", + "attr_cmpval": "0x1", "attr_len": "1" }, { @@ -7179,7 +8065,7 @@ "attr_devname": "SWITCHCARD_FPGA", "attr_offset": "0x38", "attr_mask": "0x5", - "attr_cmpval": "0x0", + "attr_cmpval": "0x1", "attr_len": "1" }, { @@ -7278,7 +8164,7 @@ "attr_devname": "SWITCHCARD_FPGA", "attr_offset": "0x38", "attr_mask": "0x6", - "attr_cmpval": "0x0", + "attr_cmpval": "0x1", "attr_len": "1" }, { @@ -7377,7 +8263,7 @@ "attr_devname": "SWITCHCARD_FPGA", "attr_offset": "0x38", "attr_mask": "0x7", - "attr_cmpval": "0x0", + "attr_cmpval": "0x1", "attr_len": "1" }, { @@ -7476,7 +8362,7 @@ "attr_devname": "SWITCHCARD_FPGA", "attr_offset": "0x38", "attr_mask": "0x8", - "attr_cmpval": "0x0", + "attr_cmpval": "0x1", "attr_len": "1" }, { @@ -7575,7 +8461,7 @@ "attr_devname": "SWITCHCARD_FPGA", "attr_offset": "0x38", "attr_mask": "0x9", - "attr_cmpval": "0x0", + "attr_cmpval": "0x1", "attr_len": "1" }, { @@ -7674,7 +8560,7 @@ "attr_devname": "SWITCHCARD_FPGA", "attr_offset": "0x38", "attr_mask": "0xa", - "attr_cmpval": "0x0", + "attr_cmpval": "0x1", "attr_len": "1" }, { @@ -7773,7 +8659,7 @@ "attr_devname": "SWITCHCARD_FPGA", "attr_offset": "0x38", "attr_mask": "0xb", - "attr_cmpval": "0x0", + "attr_cmpval": "0x1", "attr_len": "1" }, { @@ -7872,7 +8758,7 @@ "attr_devname": "SWITCHCARD_FPGA", "attr_offset": "0x38", "attr_mask": "0xc", - "attr_cmpval": "0x0", + "attr_cmpval": "0x1", "attr_len": "1" }, { @@ -7971,7 +8857,7 @@ "attr_devname": "SWITCHCARD_FPGA", "attr_offset": "0x38", "attr_mask": "0xd", - "attr_cmpval": "0x0", + "attr_cmpval": "0x1", "attr_len": "1" }, { @@ -8070,7 +8956,7 @@ "attr_devname": "SWITCHCARD_FPGA", "attr_offset": "0x38", "attr_mask": "0xe", - "attr_cmpval": "0x0", + "attr_cmpval": "0x1", "attr_len": "1" }, { @@ -8169,7 +9055,7 @@ "attr_devname": "SWITCHCARD_FPGA", "attr_offset": "0x38", "attr_mask": "0xf", - "attr_cmpval": "0x0", + "attr_cmpval": "0x1", "attr_len": "1" }, { @@ -8268,7 +9154,7 @@ "attr_devname": "SWITCHCARD_FPGA", "attr_offset": "0x4c", "attr_mask": "0x0", - "attr_cmpval": "0x0", + "attr_cmpval": "0x1", "attr_len": "1" }, { @@ -8367,7 +9253,7 @@ "attr_devname": "SWITCHCARD_FPGA", "attr_offset": "0x4c", "attr_mask": "0x1", - "attr_cmpval": "0x0", + "attr_cmpval": "0x1", "attr_len": "1" }, { @@ -8466,7 +9352,7 @@ "attr_devname": "SWITCHCARD_FPGA", "attr_offset": "0x4c", "attr_mask": "0x2", - "attr_cmpval": "0x0", + "attr_cmpval": "0x1", "attr_len": "1" }, { @@ -8565,7 +9451,7 @@ "attr_devname": "SWITCHCARD_FPGA", "attr_offset": "0x4c", "attr_mask": "0x3", - "attr_cmpval": "0x0", + "attr_cmpval": "0x1", "attr_len": "1" }, { @@ -8664,7 +9550,7 @@ "attr_devname": "SWITCHCARD_FPGA", "attr_offset": "0x4c", "attr_mask": "0x4", - "attr_cmpval": "0x0", + "attr_cmpval": "0x1", "attr_len": "1" }, { @@ -8763,7 +9649,7 @@ "attr_devname": "SWITCHCARD_FPGA", "attr_offset": "0x4c", "attr_mask": "0x5", - "attr_cmpval": "0x0", + "attr_cmpval": "0x1", "attr_len": "1" }, { @@ -8862,7 +9748,7 @@ "attr_devname": "SWITCHCARD_FPGA", "attr_offset": "0x4c", "attr_mask": "0x6", - "attr_cmpval": "0x0", + "attr_cmpval": "0x1", "attr_len": "1" }, { @@ -8961,7 +9847,7 @@ "attr_devname": "SWITCHCARD_FPGA", "attr_offset": "0x4c", "attr_mask": "0x7", - "attr_cmpval": "0x0", + "attr_cmpval": "0x1", "attr_len": "1" }, { @@ -9060,7 +9946,7 @@ "attr_devname": "SWITCHCARD_FPGA", "attr_offset": "0x4c", "attr_mask": "0x8", - "attr_cmpval": "0x0", + "attr_cmpval": "0x1", "attr_len": "1" }, { @@ -9159,7 +10045,7 @@ "attr_devname": "SWITCHCARD_FPGA", "attr_offset": "0x4c", "attr_mask": "0x9", - "attr_cmpval": "0x0", + "attr_cmpval": "0x1", "attr_len": "1" }, { @@ -9258,7 +10144,7 @@ "attr_devname": "SWITCHCARD_FPGA", "attr_offset": "0x4c", "attr_mask": "0xa", - "attr_cmpval": "0x0", + "attr_cmpval": "0x1", "attr_len": "1" }, { @@ -9357,7 +10243,7 @@ "attr_devname": "SWITCHCARD_FPGA", "attr_offset": "0x4c", "attr_mask": "0xb", - "attr_cmpval": "0x0", + "attr_cmpval": "0x1", "attr_len": "1" }, { @@ -9456,7 +10342,7 @@ "attr_devname": "SWITCHCARD_FPGA", "attr_offset": "0x4c", "attr_mask": "0xc", - "attr_cmpval": "0x0", + "attr_cmpval": "0x1", "attr_len": "1" }, { @@ -9555,7 +10441,7 @@ "attr_devname": "SWITCHCARD_FPGA", "attr_offset": "0x4c", "attr_mask": "0xd", - "attr_cmpval": "0x0", + "attr_cmpval": "0x1", "attr_len": "1" }, { @@ -9654,7 +10540,7 @@ "attr_devname": "SWITCHCARD_FPGA", "attr_offset": "0x4c", "attr_mask": "0xe", - "attr_cmpval": "0x0", + "attr_cmpval": "0x1", "attr_len": "1" }, { @@ -9753,7 +10639,7 @@ "attr_devname": "SWITCHCARD_FPGA", "attr_offset": "0x4c", "attr_mask": "0xf", - "attr_cmpval": "0x0", + "attr_cmpval": "0x1", "attr_len": "1" }, { @@ -17075,6 +17961,172 @@ ] } }, + "CPUCARD_SPI_CONTROLLER": { + "dev_info": { + "device_type": "SPI_CONTROLLER", + "device_parent": "MULTIFPGAPCIE0" + }, + "spi_mode_commands": [ + { + "enable": "fpga write32 CPUCARD_FPGA 0x4 --bits=0:0 0x1", + "disable": "fpga write32 CPUCARD_FPGA 0x4 --bits=0:0 0x0", + "comment": "Enable output to on-board SPI devices" + } + ], + "dev_attr": { + "spi_base_addr": "0x50000", + "virt_spi_controllers": "1", + "virt_spi_controller_size": "0x200", + "spi_driver": "xilinx_spi", + "spi_num_cs": 5, + "spi_controller_name": "CPUCARD_SPI_CONTROLLER", + "spi_controller_idx": 1 + }, + "spi_devices": ["SWITCHCARD_CONFIG_FLASH"] + }, + "SWITCHCARD_CONFIG_FLASH": { + "dev_info": { + "device_type": "SPI_DEVICE", + "device_name": "SWITCHCARD_CONFIG_FLASH", + "device_parent": "CPUCARD_SPI_CONTROLLER" + }, + "is_persistent": false, + "spi_mode_commands": [ + { + "enable": "fpga write32 CPUCARD_FPGA 0x44 --bits=11:11 0x1", + "disable": "fpga write32 CPUCARD_FPGA 0x44 --bits=11:11 0x0", + "comment": "Komodo controls Switch Card SPI config Flash" + }, + { + "enable": "fpga write32 CPUCARD_FPGA 0x44 --bits=10:10 0x0", + "comment": "Select SPI protocol for config flash" + } + ], + "dev_attr": { + "spi_device_driver": "spi-nor", + "max_speed_hz": 26000000, + "chip_select": 0 + } + }, + "SWITCHCARD_SPI_CONTROLLER0": { + "dev_info": { + "device_type": "SPI_CONTROLLER", + "device_parent": "MULTIFPGAPCIE1" + }, + "spi_mode_commands": [], + "dev_attr": { + "spi_base_addr": "0x50000", + "virt_spi_controllers": "1", + "virt_spi_controller_size": "0x200", + "spi_driver": "xilinx_spi", + "spi_num_cs": 5, + "spi_controller_name": "SWITCHCARD_SPI_CONTROLLER0", + "spi_controller_idx": 2 + }, + "spi_devices": ["MEZZCARD_CONFIG_FLASH"] + }, + "MEZZCARD_CONFIG_FLASH": { + "dev_info": { + "device_type": "SPI_DEVICE", + "device_name": "MEZZCARD_CONFIG_FLASH", + "device_parent": "SWITCHCARD_SPI_CONTROLLER0" + }, + "is_persistent": false, + "spi_mode_commands": [ + { + "enable": "fpga write32 SWITCHCARD_FPGA 0x30 --bits=19:19 0x1", + "disable": "fpga write32 SWITCHCARD_FPGA 0x30 --bits=19:19 0x0", + "comment": "Switch Card controls Mezz Card SPI config Flash" + }, + { + "enable": "fpga write32 SWITCHCARD_FPGA 0x24 --bits=31:31 0x0", + "comment": "Select SPI for Switch Card to Mezz Card programming interface" + }, + { + "enable": "fpga write32 SWITCHCARD_FPGA 0x30 --bits=18:18 0x0", + "comment": "Select SPI protocol for config flash" + } + ], + "dev_attr": { + "spi_device_driver": "spi-nor", + "max_speed_hz": 26000000, + "chip_select": 0 + } + }, + "SWITCHCARD_SPI_CONTROLLER1": { + "dev_info": { + "device_type": "SPI_CONTROLLER", + "device_parent": "MULTIFPGAPCIE1" + }, + "spi_mode_commands": [], + "dev_attr": { + "spi_base_addr": "0x50200", + "virt_spi_controllers": "1", + "virt_spi_controller_size": "0x200", + "spi_driver": "xilinx_spi", + "spi_num_cs": 5, + "spi_controller_name": "SWITCHCARD_SPI_CONTROLLER1", + "spi_controller_idx": 3 + }, + "spi_devices": ["ASIC_BOOT_FLASH_D0"] + }, + "ASIC_BOOT_FLASH_D0": { + "dev_info": { + "device_type": "SPI_DEVICE", + "device_name": "ASIC_BOOT_FLASH_D0", + "device_parent": "SWITCHCARD_SPI_CONTROLLER1" + }, + "is_persistent": false, + "spi_mode_commands": [ + { + "enable": "fpga write32 SWITCHCARD_FPGA 0x8 --bits=6:6 0x1", + "disable": "fpga write32 SWITCHCARD_FPGA 0x8 --bits=6:6 0x0", + "comment": "Switch Card controls ASIC QSPI D0 boot flash" + } + ], + "dev_attr": { + "spi_device_driver": "spi-nor", + "max_speed_hz": 0, + "chip_select": 0 + } + }, + "SWITCHCARD_SPI_CONTROLLER2": { + "dev_info": { + "device_type": "SPI_CONTROLLER", + "device_parent": "MULTIFPGAPCIE1" + }, + "spi_mode_commands": [], + "dev_attr": { + "spi_base_addr": "0x50400", + "virt_spi_controllers": "1", + "virt_spi_controller_size": "0x200", + "spi_driver": "xilinx_spi", + "spi_num_cs": 5, + "spi_controller_name": "SWITCHCARD_SPI_CONTROLLER2", + "spi_controller_idx": 4 + }, + "spi_devices": ["ASIC_BOOT_FLASH_D1"] + }, + "ASIC_BOOT_FLASH_D1": { + "dev_info": { + "device_type": "SPI_DEVICE", + "device_name": "ASIC_BOOT_FLASH_D1", + "device_parent": "SWITCHCARD_SPI_CONTROLLER2" + }, + "is_persistent": false, + "spi_mode_commands": [ + { + "enable": "fpga write32 SWITCHCARD_FPGA 0x8 --bits=7:7 0x1", + "disable": "fpga write32 SWITCHCARD_FPGA 0x8 --bits=7:7 0x0", + "comment": "Switch Card controls ASIC QSPI D1 boot flash" + } + ], + "dev_attr": { + "spi_device_driver": "spi-nor", + "max_speed_hz": 0, + "chip_select": 0 + } + }, "WATCHDOG": { "dev_info": { "device_type": "WATCHDOG", diff --git a/device/nexthop/x86_64-nexthop_5010-r0/platform.json b/device/nexthop/x86_64-nexthop_5010-r0/platform.json index 8c10636d63f..e350464ccf0 100644 --- a/device/nexthop/x86_64-nexthop_5010-r0/platform.json +++ b/device/nexthop/x86_64-nexthop_5010-r0/platform.json @@ -501,6 +501,93 @@ }, { "name": "NVMe" + }, + { + "name": "DPM1" + }, + { + "name": "DPM2" + }, + { + "name": "DPM3" + }, + { + "name": "DPM4" + }, + { + "name": "DCDC2" + }, + { + "name": "DCDC3" + }, + { + "name": "DCDC4" + }, + { + "name": "DCDC5" + }, + { + "name": "DCDC6" + }, + { + "name": "DCDC7" + }, + { + "name": "DCDC8" + }, + { + "name": "DCDC9" + }, + { + "name": "DCDC10" + }, + { + "name": "PHY0" + }, + { + "name": "PHY1" + }, + { + "name": "PHY2" + }, + { + "name": "PHY3" + }, + { + "name": "PHY4" + }, + { + "name": "PHY5" + }, + { + "name": "PHY6" + }, + { + "name": "PHY7" + }, + { + "name": "PHY8" + }, + { + "name": "PHY9" + }, + { + "name": "PHY10" + }, + { + "name": "PHY11" + }, + { + "name": "PHY12" + }, + { + "name": "PHY13" + }, + { + "name": "PHY14" + }, + { + "name": "PHY15" } ], "fans": [ diff --git a/device/nexthop/x86_64-nexthop_5010-r0/platform_components.json b/device/nexthop/x86_64-nexthop_5010-r0/platform_components.json index 2c814743a3f..c27d6e3dec1 100644 --- a/device/nexthop/x86_64-nexthop_5010-r0/platform_components.json +++ b/device/nexthop/x86_64-nexthop_5010-r0/platform_components.json @@ -8,7 +8,36 @@ "BIOS": {}, "ONIE": {}, "TPM": {}, - "NVMe": {} + "NVMe": {}, + "DPM1": {}, + "DPM2": {}, + "DPM3": {}, + "DPM4": {}, + "DCDC2": {}, + "DCDC3": {}, + "DCDC4": {}, + "DCDC5": {}, + "DCDC6": {}, + "DCDC7": {}, + "DCDC8": {}, + "DCDC9": {}, + "DCDC10": {}, + "PHY0": {}, + "PHY1": {}, + "PHY2": {}, + "PHY3": {}, + "PHY4": {}, + "PHY5": {}, + "PHY6": {}, + "PHY7": {}, + "PHY8": {}, + "PHY9": {}, + "PHY10": {}, + "PHY11": {}, + "PHY12": {}, + "PHY13": {}, + "PHY14": {}, + "PHY15": {} } } } diff --git a/device/nexthop/x86_64-nexthop_5010-r0/platform_env.conf b/device/nexthop/x86_64-nexthop_5010-r0/platform_env.conf index b3085890288..539f27b9896 100644 --- a/device/nexthop/x86_64-nexthop_5010-r0/platform_env.conf +++ b/device/nexthop/x86_64-nexthop_5010-r0/platform_env.conf @@ -1,2 +1,5 @@ SYNCD_SHM_SIZE=1g +dmasize=192M +usemsi=1 +use_napi=1 macsec_enabled=1 diff --git a/device/nexthop/x86_64-nexthop_5010-r0/sensors.conf b/device/nexthop/x86_64-nexthop_5010-r0/sensors.conf index 343ec1404a4..34f1dd33942 100644 --- a/device/nexthop/x86_64-nexthop_5010-r0/sensors.conf +++ b/device/nexthop/x86_64-nexthop_5010-r0/sensors.conf @@ -20,21 +20,21 @@ chip "nh_tmp468-i2c-10-48" # max: trigger reboot # crit: used for fan algo set temp2_crit 55 - set temp2_max 56 + set temp2_max 125 set temp3_crit 50 - set temp3_max 65 + set temp3_max 125 set temp4_crit 108 - set temp4_max 112 + set temp4_max 115 set temp5_crit 108 - set temp5_max 112 + set temp5_max 115 set temp6_crit 115 - set temp6_max 122 + set temp6_max 125 set temp7_crit 108 - set temp7_max 112 + set temp7_max 115 set temp8_crit 108 - set temp8_max 112 + set temp8_max 115 set temp9_crit 108 - set temp9_max 112 + set temp9_max 115 chip "nh_tmp468-i2c-10-49" ignore temp1 @@ -52,21 +52,21 @@ chip "nh_tmp468-i2c-10-49" # max: trigger reboot # crit: used for fan algo set temp2_crit 55 - set temp2_max 56 + set temp2_max 125 set temp3_crit 50 - set temp3_max 65 + set temp3_max 125 set temp4_crit 108 - set temp4_max 112 + set temp4_max 115 set temp5_crit 108 - set temp5_max 112 + set temp5_max 115 set temp6_crit 115 - set temp6_max 122 + set temp6_max 125 set temp7_crit 108 - set temp7_max 112 + set temp7_max 115 set temp8_crit 108 - set temp8_max 112 + set temp8_max 115 set temp9_crit 108 - set temp9_max 112 + set temp9_max 115 chip "nh_tmp464-i2c-10-4a" label temp2 "Mezz Card Left Rear" @@ -78,13 +78,13 @@ chip "nh_tmp464-i2c-10-4a" # max: trigger reboot # crit: used for fan algo set temp2_crit 55 - set temp2_max 56 + set temp2_max 125 set temp3_crit 50 - set temp3_max 65 + set temp3_max 125 set temp4_crit 55 - set temp4_max 56 + set temp4_max 125 set temp5_crit 50 - set temp5_max 65 + set temp5_max 125 ignore temp6 ignore temp7 diff --git a/device/nexthop/x86_64-nexthop_5010-r0/thermal_policy.json b/device/nexthop/x86_64-nexthop_5010-r0/thermal_policy.json index d141f8dcd92..36c005ac39d 100644 --- a/device/nexthop/x86_64-nexthop_5010-r0/thermal_policy.json +++ b/device/nexthop/x86_64-nexthop_5010-r0/thermal_policy.json @@ -91,9 +91,9 @@ }, "pid_domains": { "asic": { - "KP": 10, + "KP": 5, "KI": 0.1, - "KD": 5 + "KD": 2 }, "main": { "KP": 5, diff --git a/device/nokia/arm64-nokia_bmc_h6_128-r0/70-usb-network.rules b/device/nokia/arm64-nokia_bmc_h6_128-r0/70-usb-network.rules new file mode 100644 index 00000000000..d5bf6cd33be --- /dev/null +++ b/device/nokia/arm64-nokia_bmc_h6_128-r0/70-usb-network.rules @@ -0,0 +1,6 @@ +# Aspeed BMC USB Network Gadget Interface Renaming Rule +# Renames USB NCM gadget interface from usb0 to bmc0 for consistent naming + +# Match USB NCM gadget interface with BMC MAC address and rename to bmc0 +SUBSYSTEM=="net", ACTION=="add", DRIVERS=="?*", ATTR{address}=="02:00:00:00:00:01", NAME="bmc0" + diff --git a/device/nokia/arm64-nokia_bmc_h6_128-r0/99-switchCpu.rules b/device/nokia/arm64-nokia_bmc_h6_128-r0/99-switchCpu.rules new file mode 100644 index 00000000000..5215d1430dc --- /dev/null +++ b/device/nokia/arm64-nokia_bmc_h6_128-r0/99-switchCpu.rules @@ -0,0 +1,3 @@ +#ttyS0 is host-cpu. Will be modified with obmc-console-server design +SUBSYSTEM=="tty", KERNEL=="ttyS0", SYMLINK+="ttySwitchCpu0", MODE="0666" + diff --git a/device/nokia/arm64-nokia_bmc_h6_128-r0/asic.conf b/device/nokia/arm64-nokia_bmc_h6_128-r0/asic.conf new file mode 100644 index 00000000000..67ca94b0a77 --- /dev/null +++ b/device/nokia/arm64-nokia_bmc_h6_128-r0/asic.conf @@ -0,0 +1,2 @@ +# BMC's don't have a switch asic but SONIC assumes NUM_ASIC to be atleast 1 +NUM_ASIC=1 diff --git a/device/nokia/arm64-nokia_bmc_h6_128-r0/default_sku b/device/nokia/arm64-nokia_bmc_h6_128-r0/default_sku new file mode 100644 index 00000000000..9c91233ca25 --- /dev/null +++ b/device/nokia/arm64-nokia_bmc_h6_128-r0/default_sku @@ -0,0 +1 @@ +Nokia-BMC-H6-128 empty diff --git a/device/nokia/arm64-nokia_bmc_h6_128-r0/installer.conf b/device/nokia/arm64-nokia_bmc_h6_128-r0/installer.conf new file mode 100644 index 00000000000..4fd229ebd46 --- /dev/null +++ b/device/nokia/arm64-nokia_bmc_h6_128-r0/installer.conf @@ -0,0 +1,7 @@ +# Console configuration is handled in platform_arm64.conf via kernel cmdline +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="" +CONSOLE_SPEED=115200 +CONSOLE_DEV=12 +bootconf="nokia-h6-128-r0" +VAR_LOG=512 +EARLYCON="earlycon=uart8250,mmio32,0x14c33b00" diff --git a/device/nokia/arm64-nokia_bmc_h6_128-r0/platform.json b/device/nokia/arm64-nokia_bmc_h6_128-r0/platform.json new file mode 100644 index 00000000000..c6b718552eb --- /dev/null +++ b/device/nokia/arm64-nokia_bmc_h6_128-r0/platform.json @@ -0,0 +1,20 @@ +{ + "chassis": { + "name": "Nokia-BMC-H6-128", + "thermal_manager": false, + "status_led": { + "controllable": true, + "colors": ["green", "amber", "off"] + }, + "components": [ + { + "name": "BIOS" + } + ], + "fans": [], + "psus": [], + "thermals": [], + "sfps": [] + }, + "interfaces": {} +} diff --git a/device/nokia/arm64-nokia_bmc_h6_128-r0/platform_asic b/device/nokia/arm64-nokia_bmc_h6_128-r0/platform_asic new file mode 100644 index 00000000000..708a833cb62 --- /dev/null +++ b/device/nokia/arm64-nokia_bmc_h6_128-r0/platform_asic @@ -0,0 +1 @@ +aspeed \ No newline at end of file diff --git a/device/nokia/arm64-nokia_bmc_h6_128-r0/platform_components.json b/device/nokia/arm64-nokia_bmc_h6_128-r0/platform_components.json new file mode 100644 index 00000000000..4d2180d3c5f --- /dev/null +++ b/device/nokia/arm64-nokia_bmc_h6_128-r0/platform_components.json @@ -0,0 +1,9 @@ +{ + "chassis": { + "Nokia-BMC-H6-128": { + "component": { + "BIOS": {} + } + } + } +} diff --git a/device/nokia/arm64-nokia_bmc_h6_128-r0/platform_env.conf b/device/nokia/arm64-nokia_bmc_h6_128-r0/platform_env.conf new file mode 100644 index 00000000000..b7947ba31fb --- /dev/null +++ b/device/nokia/arm64-nokia_bmc_h6_128-r0/platform_env.conf @@ -0,0 +1,2 @@ +# BMC platform environment +switch_bmc=1 diff --git a/device/nokia/arm64-nokia_bmc_h6_128-r0/plugins/ssd_util.py b/device/nokia/arm64-nokia_bmc_h6_128-r0/plugins/ssd_util.py new file mode 100644 index 00000000000..cc66e070c6c --- /dev/null +++ b/device/nokia/arm64-nokia_bmc_h6_128-r0/plugins/ssd_util.py @@ -0,0 +1,11 @@ +try: + from sonic_platform_base.sonic_storage.emmc import EmmcUtil +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class SsdUtil(EmmcUtil): + """Primary storage is eMMC; use common sysfs-backed EmmcUtil.""" + + def __init__(self, diskdev): + EmmcUtil.__init__(self, diskdev) diff --git a/device/nokia/arm64-nokia_bmc_h6_128-r0/pmon_daemon_control.json b/device/nokia/arm64-nokia_bmc_h6_128-r0/pmon_daemon_control.json new file mode 100644 index 00000000000..c9c98e6d616 --- /dev/null +++ b/device/nokia/arm64-nokia_bmc_h6_128-r0/pmon_daemon_control.json @@ -0,0 +1,9 @@ +{ + "skip_ledd": true, + "skip_xcvrd": true, + "skip_psud": true, + "skip_pcied": true, + "skip_chassisd": true, + "skip_fancontrol": true +} + diff --git a/device/nokia/arm64-nokia_bmc_h6_128-r0/switch_cpu_console.conf b/device/nokia/arm64-nokia_bmc_h6_128-r0/switch_cpu_console.conf new file mode 100644 index 00000000000..e06a705e970 --- /dev/null +++ b/device/nokia/arm64-nokia_bmc_h6_128-r0/switch_cpu_console.conf @@ -0,0 +1,8 @@ +# Baud rate for the switch CPU console +CONSOLE_BAUD_RATE=115200 + +# Flow control: 0=disabled, 1=enabled (default: 0) +CONSOLE_FLOW_CONTROL=0 + +# Remote device name shown in consutil +CONSOLE_REMOTE_DEVICE=SwitchCpu diff --git a/device/nokia/arm64-nokia_bmc_h6_128-r0/system_health_monitoring_config.json b/device/nokia/arm64-nokia_bmc_h6_128-r0/system_health_monitoring_config.json new file mode 100644 index 00000000000..59fb8ad3be7 --- /dev/null +++ b/device/nokia/arm64-nokia_bmc_h6_128-r0/system_health_monitoring_config.json @@ -0,0 +1,12 @@ +{ + "services_to_ignore": [], + "devices_to_ignore": ["psu", "fan", "asic"], + "user_defined_checkers": [], + "polling_interval": 300, + "led_color": { + "fault": "amber", + "normal": "green", + "booting": "amber_blink" + } +} + diff --git a/device/nokia/arm64-nokia_bmc_h6_128-r0/udevprefix.conf b/device/nokia/arm64-nokia_bmc_h6_128-r0/udevprefix.conf new file mode 100644 index 00000000000..da65650e0e1 --- /dev/null +++ b/device/nokia/arm64-nokia_bmc_h6_128-r0/udevprefix.conf @@ -0,0 +1 @@ +ttySwitchCpu diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1-DC-G48S4 b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1-DC-G48S4 new file mode 120000 index 00000000000..3765830e918 --- /dev/null +++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1-DC-G48S4 @@ -0,0 +1 @@ +Nokia-7215-A1 \ No newline at end of file diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-Board-AC5X-xb.md5 b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-Board-AC5X-xb.md5 index 6e998cb8a37..8c637bb7d79 100644 --- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-Board-AC5X-xb.md5 +++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-Board-AC5X-xb.md5 @@ -1 +1 @@ -4130a4ca246a30a82f69bdef7c971f1d \ No newline at end of file +8cfeef60310fb484b32b90d48cc464a7 \ No newline at end of file diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-Board-AC5X-xb.xml b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-Board-AC5X-xb.xml index e9ca1109f1e..0676b2bbf76 100644 --- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-Board-AC5X-xb.xml +++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-Board-AC5X-xb.xml @@ -1,5 +1,5 @@ - + @@ -201,6 +201,12 @@ Ethernet Transceiver Ethernet Transceiver 9 + + alaska-CUX3520 + Specifies PHY identifier CUX3520, Integrated Octal 10/100/1000/2.5G/5G/10GBASE-T +Ethernet Transceiver + 10 + physical-port-num-type diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-L1-AC5X-xb.md5 b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-L1-AC5X-xb.md5 index d9a2ca3084f..dcc5d932b49 100644 --- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-L1-AC5X-xb.md5 +++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-L1-AC5X-xb.md5 @@ -1 +1 @@ -5a9092f68a3a43ced5cc1585aa47e813 \ No newline at end of file +ead7612c7d259573ee3f5ba1b2f01b20 \ No newline at end of file diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-L1-AC5X-xb.xml b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-L1-AC5X-xb.xml index 5e6c450b250..720e006f724 100644 --- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-L1-AC5X-xb.xml +++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-L1-AC5X-xb.xml @@ -1,5 +1,5 @@ - + @@ -156,6 +156,11 @@ 54 + + 2500BASE_X + 2.5G + 55 + NA diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-PP-AC5X-xb.md5 b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-PP-AC5X-xb.md5 index 00b6068a4ad..e801cd54d41 100644 --- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-PP-AC5X-xb.md5 +++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-PP-AC5X-xb.md5 @@ -1 +1 @@ -c13419ca649e9e414df0cbea6c73df29 \ No newline at end of file +253862790c08ab4daf4b919e8cba6257 \ No newline at end of file diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-PP-AC5X-xb.xml b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-PP-AC5X-xb.xml index 967c387bc18..f7e03b174b0 100644 --- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-PP-AC5X-xb.xml +++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-PP-AC5X-xb.xml @@ -1,5 +1,5 @@ - + diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/SAI-AC5X-xb.md5 b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/SAI-AC5X-xb.md5 index d60e04a18fc..9fa6bd44971 100644 --- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/SAI-AC5X-xb.md5 +++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/SAI-AC5X-xb.md5 @@ -1 +1 @@ -0bc31702ef865bc96664fa917a8ab34d \ No newline at end of file +d406841ddbda9465e55c222120e52399 \ No newline at end of file diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/SAI-AC5X-xb.xml b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/SAI-AC5X-xb.xml index b1042ff5ca5..59ec5f4f60f 100644 --- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/SAI-AC5X-xb.xml +++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/SAI-AC5X-xb.xml @@ -1,5 +1,5 @@ - + @@ -51,6 +51,21 @@ 1 + + CounterFormat-type + enumeration + Router In Drop Reason Feature Options + + COALESCED_COUNTER + Coalesced/Combined Counter for Packets and Bytes + 0 + + + SEPERATE_COUNTER + Seperate Counter for Packets and Bytes {Consumes additional hardware resources} + 1 + + Feature-enable enumeration @@ -187,6 +202,14 @@ 1 + + mac-address-type + string + The mac-address type represents an IEEE 802 MAC address. +The canonical representation uses lowercase characters. +In the value set and its semantics, this type is equivalent +to the MacAddress textual convention of the SMIv2. + ASIC_AC5X ASK-Board-AC5X-xb.xml @@ -464,6 +487,11 @@ 0 ROUTE_BLACKHOLE + + COALESCED_COUNTER + Disabled + Enabled + Disabled Disabled @@ -474,6 +502,9 @@ Disabled + Disabled + Disabled + Disabled control-acl diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/installer.conf b/device/nokia/arm64-nokia_ixs7215_52xb-r0/installer.conf index 3f0444a091c..b8890a5870d 100644 --- a/device/nokia/arm64-nokia_ixs7215_52xb-r0/installer.conf +++ b/device/nokia/arm64-nokia_ixs7215_52xb-r0/installer.conf @@ -1 +1,2 @@ -ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="default_hugepagesz=32M hugepages=4 loglevel=4 efi_pstore.pstore_disable=1" +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="default_hugepagesz=32M hugepages=4 loglevel=4 efi_pstore.pstore_disable=1" +GRUB_SERIAL_COMMAND="set timeout_style=hidden" diff --git a/device/nokia/arm64-nokia_ixs7215_c1xa-r0/Nokia-7215-C1-G3 b/device/nokia/arm64-nokia_ixs7215_c1xa-r0/Nokia-7215-C1-G3 new file mode 120000 index 00000000000..1927826485d --- /dev/null +++ b/device/nokia/arm64-nokia_ixs7215_c1xa-r0/Nokia-7215-C1-G3 @@ -0,0 +1 @@ +Nokia-7215-C1 \ No newline at end of file diff --git a/device/nokia/arm64-nokia_ixs7215_c1xa-r0/Nokia-7215-C1-mp/hwsku.json b/device/nokia/arm64-nokia_ixs7215_c1xa-r0/Nokia-7215-C1-mp/hwsku.json new file mode 100644 index 00000000000..f0319b30fda --- /dev/null +++ b/device/nokia/arm64-nokia_ixs7215_c1xa-r0/Nokia-7215-C1-mp/hwsku.json @@ -0,0 +1,12 @@ +{ + "interfaces": { + "Ethernet0": { + "default_brkout_mode": "1x1G", + "port_type": "SFP" + }, + "Ethernet1": { + "default_brkout_mode": "1x1G", + "port_type": "SFP" + } + } +} diff --git a/device/nokia/arm64-nokia_ixs7215_c1xa-r0/Nokia-7215-C1-mp/lanemap.ini b/device/nokia/arm64-nokia_ixs7215_c1xa-r0/Nokia-7215-C1-mp/lanemap.ini new file mode 100644 index 00000000000..4d4a9eb234f --- /dev/null +++ b/device/nokia/arm64-nokia_ixs7215_c1xa-r0/Nokia-7215-C1-mp/lanemap.ini @@ -0,0 +1,2 @@ +Ethernet0:1 +Ethernet1:2 diff --git a/device/nokia/arm64-nokia_ixs7215_c1xa-r0/Nokia-7215-C1-mp/port_config.ini b/device/nokia/arm64-nokia_ixs7215_c1xa-r0/Nokia-7215-C1-mp/port_config.ini new file mode 100644 index 00000000000..8df597b640c --- /dev/null +++ b/device/nokia/arm64-nokia_ixs7215_c1xa-r0/Nokia-7215-C1-mp/port_config.ini @@ -0,0 +1,3 @@ +# name lanes alias index speed +Ethernet0 1 etp1 1 1000 +Ethernet1 2 etp2 2 1000 diff --git a/device/nokia/arm64-nokia_ixs7215_c1xa-r0/Nokia-7215-C1-mp/profile.ini b/device/nokia/arm64-nokia_ixs7215_c1xa-r0/Nokia-7215-C1-mp/profile.ini new file mode 100644 index 00000000000..4eda67c91a6 --- /dev/null +++ b/device/nokia/arm64-nokia_ixs7215_c1xa-r0/Nokia-7215-C1-mp/profile.ini @@ -0,0 +1 @@ +switchMacAddress=XX:XX:XX:XX:XX:XX diff --git a/device/nokia/arm64-nokia_ixs7215_c1xa-r0/Nokia-7215-C1-mp/sai.profile b/device/nokia/arm64-nokia_ixs7215_c1xa-r0/Nokia-7215-C1-mp/sai.profile new file mode 100644 index 00000000000..01f5004cb12 --- /dev/null +++ b/device/nokia/arm64-nokia_ixs7215_c1xa-r0/Nokia-7215-C1-mp/sai.profile @@ -0,0 +1,3 @@ +SAI_VS_SWITCH_TYPE=SAI_VS_SWITCH_TYPE_NOKIA_VS +SAI_VS_HOSTIF_USE_TAP_DEVICE=true +SAI_VS_INTERFACE_LANE_MAP_FILE=/usr/share/sonic/hwsku/lanemap.ini diff --git a/device/nokia/arm64-nokia_ixs7215_c1xa-r0/Nokia-7215-C1/hwsku.json b/device/nokia/arm64-nokia_ixs7215_c1xa-r0/Nokia-7215-C1/hwsku.json new file mode 100644 index 00000000000..ff99cd6762b --- /dev/null +++ b/device/nokia/arm64-nokia_ixs7215_c1xa-r0/Nokia-7215-C1/hwsku.json @@ -0,0 +1,16 @@ +{ + "interfaces": { + "Ethernet0": { + "default_brkout_mode": "1x1G", + "port_type": "SFP" + }, + "Ethernet1": { + "default_brkout_mode": "1x1G", + "port_type": "SFP" + }, + "Ethernet2": { + "default_brkout_mode": "1x1G", + "port_type": "RJ45" + } + } +} diff --git a/device/nokia/arm64-nokia_ixs7215_c1xa-r0/Nokia-7215-C1/lanemap.ini b/device/nokia/arm64-nokia_ixs7215_c1xa-r0/Nokia-7215-C1/lanemap.ini new file mode 100644 index 00000000000..9b7408dbdbc --- /dev/null +++ b/device/nokia/arm64-nokia_ixs7215_c1xa-r0/Nokia-7215-C1/lanemap.ini @@ -0,0 +1,3 @@ +Ethernet0:1 +Ethernet1:2 +Ethernet2:3 diff --git a/device/nokia/arm64-nokia_ixs7215_c1xa-r0/Nokia-7215-C1/port_config.ini b/device/nokia/arm64-nokia_ixs7215_c1xa-r0/Nokia-7215-C1/port_config.ini new file mode 100644 index 00000000000..75e2bf9907a --- /dev/null +++ b/device/nokia/arm64-nokia_ixs7215_c1xa-r0/Nokia-7215-C1/port_config.ini @@ -0,0 +1,4 @@ +# name lanes alias index speed +Ethernet0 1 etp1 1 1000 +Ethernet1 2 etp2 2 1000 +Ethernet2 3 etp3 3 1000 diff --git a/device/nokia/arm64-nokia_ixs7215_c1xa-r0/Nokia-7215-C1/profile.ini b/device/nokia/arm64-nokia_ixs7215_c1xa-r0/Nokia-7215-C1/profile.ini new file mode 100644 index 00000000000..4eda67c91a6 --- /dev/null +++ b/device/nokia/arm64-nokia_ixs7215_c1xa-r0/Nokia-7215-C1/profile.ini @@ -0,0 +1 @@ +switchMacAddress=XX:XX:XX:XX:XX:XX diff --git a/device/nokia/arm64-nokia_ixs7215_c1xa-r0/Nokia-7215-C1/sai.profile b/device/nokia/arm64-nokia_ixs7215_c1xa-r0/Nokia-7215-C1/sai.profile new file mode 100644 index 00000000000..01f5004cb12 --- /dev/null +++ b/device/nokia/arm64-nokia_ixs7215_c1xa-r0/Nokia-7215-C1/sai.profile @@ -0,0 +1,3 @@ +SAI_VS_SWITCH_TYPE=SAI_VS_SWITCH_TYPE_NOKIA_VS +SAI_VS_HOSTIF_USE_TAP_DEVICE=true +SAI_VS_INTERFACE_LANE_MAP_FILE=/usr/share/sonic/hwsku/lanemap.ini diff --git a/device/nokia/arm64-nokia_ixs7215_c1xa-r0/default_sku b/device/nokia/arm64-nokia_ixs7215_c1xa-r0/default_sku new file mode 100644 index 00000000000..a80257e1611 --- /dev/null +++ b/device/nokia/arm64-nokia_ixs7215_c1xa-r0/default_sku @@ -0,0 +1 @@ +Nokia-7215-C1 l2 diff --git a/device/nokia/arm64-nokia_ixs7215_c1xa-r0/installer.conf b/device/nokia/arm64-nokia_ixs7215_c1xa-r0/installer.conf new file mode 100644 index 00000000000..b8890a5870d --- /dev/null +++ b/device/nokia/arm64-nokia_ixs7215_c1xa-r0/installer.conf @@ -0,0 +1,2 @@ +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="default_hugepagesz=32M hugepages=4 loglevel=4 efi_pstore.pstore_disable=1" +GRUB_SERIAL_COMMAND="set timeout_style=hidden" diff --git a/device/nokia/arm64-nokia_ixs7215_c1xa-r0/pcie.yaml b/device/nokia/arm64-nokia_ixs7215_c1xa-r0/pcie.yaml new file mode 100644 index 00000000000..52988f3624b --- /dev/null +++ b/device/nokia/arm64-nokia_ixs7215_c1xa-r0/pcie.yaml @@ -0,0 +1,11 @@ +- bus: '00' + dev: '00' + fn: '0' + id: '0110' + name: 'PCI bridge: Marvell Technology Group Ltd. 88F60x0/88F70x0/88F80x0/CN913x + ARM SoC' +- bus: '01' + dev: '00' + fn: '0' + id: '7022' + name: 'Serial controller: Alcatel Device 7022' diff --git a/device/nokia/arm64-nokia_ixs7215_c1xa-r0/platform.json b/device/nokia/arm64-nokia_ixs7215_c1xa-r0/platform.json new file mode 100644 index 00000000000..088f8cce8cb --- /dev/null +++ b/device/nokia/arm64-nokia_ixs7215_c1xa-r0/platform.json @@ -0,0 +1,139 @@ +{ + "chassis": { + "name": "7215 IXS-C1", + "components": [ + { + "name": "System-CPLD" + }, + { + "name": "U-Boot" + }, + { + "name": "FPGA" + } + ], + "fans": [ + { + "name": "Fan1", + "status_led": { + "controllable": false + } + }, + { + "name": "Fan2", + "status_led": { + "controllable": false + } + } + ], + "fan_drawers": [ + { + "name": "drawer1", + "status_led": { + "controllable": false + }, + "max_consumed_power": false, + "fans": [ + { + "name": "Fan1", + "status_led": { + "controllable": false + } + } + ] + }, + { + "name": "drawer2", + "status_led": { + "controllable": false + }, + "max_consumed_power": false, + "fans": [ + { + "name": "Fan2", + "status_led": { + "controllable": false + } + } + ] + } + ], + "psus": [ + { + "name": "PSU1", + "status_led": { + "controllable": false + }, + "current": false, + "power": false, + "max_power": false, + "voltage_high_threshold": false, + "voltage_low_threshold": false, + "temperature": false + }, + { + "name": "PSU2", + "status_led": { + "controllable": false + }, + "current": false, + "power": false, + "max_power": false, + "voltage_high_threshold": false, + "voltage_low_threshold": false, + "temperature": false + } + ], + "thermals": [ + { + "name": "PCB BACK", + "controllable": false, + "low-threshold": false, + "low-crit-threshold": false, + "high-crit-threshold": false + }, + { + "name": "PCB FRONT", + "controllable": false, + "low-threshold": false, + "low-crit-threshold": false, + "high-crit-threshold": false + }, + { + "name": "PCB MID", + "controllable": false, + "low-threshold": false, + "low-crit-threshold": false, + "high-crit-threshold": false + }, + { + "name": "FPGA", + "controllable": false, + "low-threshold": false, + "low-crit-threshold": false + }, + { + "name": "CPU CORE", + "controllable": false, + "low-threshold": false, + "low-crit-threshold": false + } + ], + "sfps": [ + { + "name": "SFP0" + }, + { + "name": "SFP1" + }, + { + "name": "COPPER2" + } + ] + }, + "interfaces": {}, + "asic_sensors": { + "poll_interval": "10", + "poll_admin_status": "enable" + } +} diff --git a/device/nokia/arm64-nokia_ixs7215_c1xa-r0/platform_asic b/device/nokia/arm64-nokia_ixs7215_c1xa-r0/platform_asic new file mode 100644 index 00000000000..ba5e6f91d18 --- /dev/null +++ b/device/nokia/arm64-nokia_ixs7215_c1xa-r0/platform_asic @@ -0,0 +1 @@ +nokia-vs diff --git a/device/nokia/arm64-nokia_ixs7215_c1xa-r0/platform_components.json b/device/nokia/arm64-nokia_ixs7215_c1xa-r0/platform_components.json new file mode 100644 index 00000000000..23658a94da2 --- /dev/null +++ b/device/nokia/arm64-nokia_ixs7215_c1xa-r0/platform_components.json @@ -0,0 +1,11 @@ +{ + "chassis": { + "7215 IXS-C1": { + "component": { + "U-Boot": { }, + "System-CPLD": { }, + "FPGA": {} + } + } + } +} diff --git a/device/nokia/arm64-nokia_ixs7215_c1xa-r0/platform_reboot b/device/nokia/arm64-nokia_ixs7215_c1xa-r0/platform_reboot new file mode 100755 index 00000000000..aeb9f87f158 --- /dev/null +++ b/device/nokia/arm64-nokia_ixs7215_c1xa-r0/platform_reboot @@ -0,0 +1,13 @@ +#!/bin/bash + +function SafeReboot() { + sync ; sync + sudo umount -fa > /dev/null 2&>1 + + # Turn off watchdog monitor gpio for correct reboot-cause + sudo echo 1 > /sys/class/gpio/gpio41/value + cat /sys/bus/i2c/devices/0-0041/last_reset_cause > /dev/null 2&>1 + exec /sbin/reboot +} + +SafeReboot diff --git a/device/nokia/arm64-nokia_ixs7215_c1xa-r0/plugins/eeprom.py b/device/nokia/arm64-nokia_ixs7215_c1xa-r0/plugins/eeprom.py new file mode 100644 index 00000000000..a5461871c42 --- /dev/null +++ b/device/nokia/arm64-nokia_ixs7215_c1xa-r0/plugins/eeprom.py @@ -0,0 +1,13 @@ +#!/usr/bin/env python + +try: + from sonic_eeprom import eeprom_tlvinfo +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + + +class board(eeprom_tlvinfo.TlvInfoDecoder): + + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/etc/sonic/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) diff --git a/device/nokia/arm64-nokia_ixs7215_c1xa-r0/plugins/led_control.py b/device/nokia/arm64-nokia_ixs7215_c1xa-r0/plugins/led_control.py new file mode 100644 index 00000000000..0a2dfdd7fc9 --- /dev/null +++ b/device/nokia/arm64-nokia_ixs7215_c1xa-r0/plugins/led_control.py @@ -0,0 +1,119 @@ +# +# led_control.py +# +# Platform-specific LED control functionality for SONiC +# + +try: + from sonic_led.led_control_base import LedControlBase + import os + import time + import syslog + import sonic_platform.platform + import sonic_platform.chassis +except ImportError as e: + raise ImportError(str(e) + " - required module not found") + +CPLD_DIR = "/sys/bus/i2c/devices/0-0041/" + +def DBG_PRINT(str): + syslog.openlog("nokia-led") + syslog.syslog(syslog.LOG_INFO, str) + syslog.closelog() + + +class LedControl(LedControlBase): + """Platform specific LED control class""" + + # Constructor + def __init__(self): + self.chassis = sonic_platform.platform.Platform().get_chassis() + self._initDefaultConfig() + + def _initDefaultConfig(self): + # The fan tray leds and system led managed by new chassis class API + # leaving only a couple other front panel leds to be done old style + DBG_PRINT("starting system leds") + self._initSystemLed() + DBG_PRINT(" led done") + + def _read_sysfs_file(self, sysfs_file): + # On successful read, returns the value read from given + # reg_name and on failure returns 'ERR' + rv = 'ERR' + + if (not os.path.isfile(sysfs_file)): + return rv + try: + with open(sysfs_file, 'r') as fd: + rv = fd.read() + except Exception as e: + rv = 'ERR' + + rv = rv.rstrip('\r\n') + rv = rv.lstrip(" ") + return rv + + def _write_sysfs_file(self, sysfs_file, value): + # On successful write, the value read will be written on + # reg_name and on failure returns 'ERR' + rv = 'ERR' + + if (not os.path.isfile(sysfs_file)): + return rv + try: + with open(sysfs_file, 'w') as fd: + rv = fd.write(str(value)) + except Exception as e: + rv = 'ERR' + + return rv + + def _initSystemLed(self): + # Front Panel System LEDs setting + oldfan = 0xf # 0=amber, 1=green + oldpsu = 0xf # 0=amber, 1=green + + # Write sys led + status = self._write_sysfs_file(CPLD_DIR+"system_led", "green") + if status == "ERR": + DBG_PRINT(" System LED NOT set correctly") + else: + DBG_PRINT(" System LED set O.K. ") + + # Timer loop to monitor and set front panel Status, Fan, and PSU LEDs + while True: + # Front Panel FAN Panel LED setting + if (self.chassis.get_fan(0).get_status() == self.chassis.get_fan(1).get_status() == True): + if (os.path.isfile(CPLD_DIR+"fan_led")): + if oldfan != 0x1: + self._write_sysfs_file(CPLD_DIR+"fan_led", "green") + oldfan = 0x1 + else: + oldfan = 0xf + else: + if (os.path.isfile(CPLD_DIR+"fan_led")): + if oldfan != 0x0: + self._write_sysfs_file(CPLD_DIR+"fan_led", "amber") + oldfan = 0x0 + else: + oldfan = 0xf + + # Front Panel PSU Panel LED setting + if (self.chassis.get_psu(0).get_status() == self.chassis.get_psu(1).get_status() == True): + if (os.path.isfile(CPLD_DIR+"psu_led")): + if oldpsu != 0x1: + self._write_sysfs_file(CPLD_DIR+"psu_led", "green") + oldpsu = 0x1 + else: + oldpsu = 0xf + else: + if (os.path.isfile(CPLD_DIR+"psu_led")): + if oldpsu != 0x0: + status = self._write_sysfs_file(CPLD_DIR+"psu_led", "amber") + oldpsu = 0x0 + else: + oldpsu = 0xf + + time.sleep(6) + diff --git a/device/nokia/arm64-nokia_ixs7215_c1xa-r0/plugins/psuutil.py b/device/nokia/arm64-nokia_ixs7215_c1xa-r0/plugins/psuutil.py new file mode 100755 index 00000000000..513b3ae4085 --- /dev/null +++ b/device/nokia/arm64-nokia_ixs7215_c1xa-r0/plugins/psuutil.py @@ -0,0 +1,32 @@ +try: + import sonic_platform.platform + import sonic_platform.chassis + from sonic_psu.psu_base import PsuBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class PsuUtil(PsuBase): + """Platform-specific PSUutil class""" + + def __init__(self): + PsuBase.__init__(self) + self.chassis = sonic_platform.platform.Platform().get_chassis() + + def get_num_psus(self): + MAX_PSUS = 2 + return MAX_PSUS + + def get_psu_status(self, index): + # print " psuUtil redirect to PMON 2.0 " + if self.chassis is not None: + return self.chassis.get_psu(index-1).get_status() + else: + return False + + def get_psu_presence(self, index): + # print " psuUtil redirect to PMON 2.0 " + if self.chassis is not None: + return self.chassis.get_psu(index-1).get_presence() + else: + return False diff --git a/device/nokia/arm64-nokia_ixs7215_c1xa-r0/plugins/ssd_util.py b/device/nokia/arm64-nokia_ixs7215_c1xa-r0/plugins/ssd_util.py new file mode 100644 index 00000000000..5ec00b69e7c --- /dev/null +++ b/device/nokia/arm64-nokia_ixs7215_c1xa-r0/plugins/ssd_util.py @@ -0,0 +1,4 @@ +try: + from sonic_ssd import SsdUtil +except ImportError: + from sonic_platform_base.sonic_storage.ssd import SsdUtil \ No newline at end of file diff --git a/device/nokia/arm64-nokia_ixs7215_c1xa-r0/sensors.conf b/device/nokia/arm64-nokia_ixs7215_c1xa-r0/sensors.conf new file mode 100644 index 00000000000..6832b07c219 --- /dev/null +++ b/device/nokia/arm64-nokia_ixs7215_c1xa-r0/sensors.conf @@ -0,0 +1,12 @@ +chip "tmp75a-i2c-*-48" + label temp1 "back temp sensor" + set temp1_max 65 + set temp1_crit 75 + +chip "tmp75a-i2c-*-49" + label temp1 "front temp sensor" + set temp2_max 65 + set temp2_crit 75 + +chip "armada_thermal-*" + ignore temp1 diff --git a/device/nokia/arm64-nokia_ixs7215_c1xa-r0/system_health_monitoring_config.json b/device/nokia/arm64-nokia_ixs7215_c1xa-r0/system_health_monitoring_config.json new file mode 100644 index 00000000000..d5f3a7b9830 --- /dev/null +++ b/device/nokia/arm64-nokia_ixs7215_c1xa-r0/system_health_monitoring_config.json @@ -0,0 +1,14 @@ +{ + "services_to_ignore": [], + "devices_to_ignore": [ + "asic", + "psu.temperature" + ], + "user_defined_checkers": [], + "polling_interval": 60, + "led_color": { + "fault": "amber", + "normal": "green", + "booting": "blinking green" + } +} diff --git a/device/nokia/arm64-nokia_ixs7215_c1xa-r0/thermal_policy.json b/device/nokia/arm64-nokia_ixs7215_c1xa-r0/thermal_policy.json new file mode 100644 index 00000000000..d20c3b817ad --- /dev/null +++ b/device/nokia/arm64-nokia_ixs7215_c1xa-r0/thermal_policy.json @@ -0,0 +1,67 @@ +{ + "thermal_control_algorithm": { + "run_at_boot_up": "false", + "fan_speed_when_suspend": "50" + }, + "info_types": [ + { + "type": "fan_info" + }, + { + "type": "thermal_info" + }, + { + "type": "chassis_info" + } + ], + "policies": [ + { + "name": "any fan absence", + "conditions": [ + { + "type": "fan.any.absence" + } + ], + "actions": [ + { + "type": "thermal_control.control", + "status": "false" + }, + { + "type": "fan.all.set_speed", + "speed": "100" + } + ] + }, + { + "name": "all fan presence", + "conditions": [ + { + "type": "fan.all.presence" + } + ], + "actions": [ + { + "type": "thermal.temp_check_and_set_all_fan_speed", + "default_speed": "25", + "threshold1_speed": "40", + "threshold2_speed": "75", + "hightemp_speed": "100" + } + ] + }, + { + "name": "temp over high critical threshold", + "conditions": [ + { + "type": "thermal.over.high_critical_threshold" + } + ], + "actions": [ + { + "type": "switch.shutdown" + } + ] + } + ] +} diff --git a/device/nokia/arm64-nokia_ixs7215_c1xa-r0/udevprefix.conf b/device/nokia/arm64-nokia_ixs7215_c1xa-r0/udevprefix.conf new file mode 100644 index 00000000000..4e6798aa263 --- /dev/null +++ b/device/nokia/arm64-nokia_ixs7215_c1xa-r0/udevprefix.conf @@ -0,0 +1 @@ +ttyCR diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-Board-M0-48x1G-4x10G.md5 b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-Board-M0-48x1G-4x10G.md5 index 9db80ae2eac..9d9ceebf999 100644 --- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-Board-M0-48x1G-4x10G.md5 +++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-Board-M0-48x1G-4x10G.md5 @@ -1 +1 @@ -ac909596c36db38f054afef94853181a \ No newline at end of file +9bd67b52d5ed7b0727019437f7128d31 \ No newline at end of file diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-Board-M0-48x1G-4x10G.xml b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-Board-M0-48x1G-4x10G.xml index fc4cb355e9c..2766e44a1b1 100644 --- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-Board-M0-48x1G-4x10G.xml +++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-Board-M0-48x1G-4x10G.xml @@ -1,5 +1,5 @@ - + @@ -202,8 +202,8 @@ Ethernet Transceiver 9 - alaska-88E3520 - Specifies PHY identifier 88E3520, Integrated Octal 10/100/1000/2.5G/5G/10GBASE-T + alaska-CUX3520 + Specifies PHY identifier CUX3520, Integrated Octal 10/100/1000/2.5G/5G/10GBASE-T Ethernet Transceiver 10 diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D0-48x1G-4x10G.md5 b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D0-48x1G-4x10G.md5 index 53c109f7df1..c7dfdadd1b8 100644 --- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D0-48x1G-4x10G.md5 +++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D0-48x1G-4x10G.md5 @@ -1 +1 @@ -d5b258128948285d93f60c468e5cab30 \ No newline at end of file +fbaef82d6312ec5f2b51ffae820f6299 \ No newline at end of file diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D0-48x1G-4x10G.xml b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D0-48x1G-4x10G.xml index 6280e3d718f..b431a3bbcbe 100644 --- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D0-48x1G-4x10G.xml +++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D0-48x1G-4x10G.xml @@ -1,5 +1,5 @@ - + diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D1-48x1G-4x10G.md5 b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D1-48x1G-4x10G.md5 index 61b42fc6c9a..c81c0605304 100644 --- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D1-48x1G-4x10G.md5 +++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D1-48x1G-4x10G.md5 @@ -1 +1 @@ -a7fc359c8a059bd5af78bb341735b65c \ No newline at end of file +185fff11f2408a0f4e414c01e943d7d1 \ No newline at end of file diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D1-48x1G-4x10G.xml b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D1-48x1G-4x10G.xml index 3ce00adfc88..1f2c5ceb513 100644 --- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D1-48x1G-4x10G.xml +++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-L1-M0-D1-48x1G-4x10G.xml @@ -1,5 +1,5 @@ - + diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-PP-M0-48x1G-4x10G.md5 b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-PP-M0-48x1G-4x10G.md5 index 7bd0eb55f81..6bbf106c94f 100644 --- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-PP-M0-48x1G-4x10G.md5 +++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-PP-M0-48x1G-4x10G.md5 @@ -1 +1 @@ -147ef20e020688a6d5e98e8dacce0f1b \ No newline at end of file +528031093f87a1d24a75bbcdd9b50784 \ No newline at end of file diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-PP-M0-48x1G-4x10G.xml b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-PP-M0-48x1G-4x10G.xml index a5716ff8fa5..f4b7ed4030f 100644 --- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-PP-M0-48x1G-4x10G.xml +++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/ASK-PP-M0-48x1G-4x10G.xml @@ -1,5 +1,5 @@ - + @@ -629,7 +629,7 @@ true true - 511 + 31 FLEX true diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/SAI-M0-48x1G-4x10G.md5 b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/SAI-M0-48x1G-4x10G.md5 index b0d5d0b8cda..c702025034e 100644 --- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/SAI-M0-48x1G-4x10G.md5 +++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/SAI-M0-48x1G-4x10G.md5 @@ -1 +1 @@ -2ebbba24dec1a92005817fe4eb494244 \ No newline at end of file +6cdbabff245969174293360a017f074f \ No newline at end of file diff --git a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/SAI-M0-48x1G-4x10G.xml b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/SAI-M0-48x1G-4x10G.xml index 5f124b73f34..a709f5b2fe6 100644 --- a/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/SAI-M0-48x1G-4x10G.xml +++ b/device/nokia/armhf-nokia_ixs7215_52x-r0/Nokia-7215/SAI-M0-48x1G-4x10G.xml @@ -1,5 +1,5 @@ - + @@ -493,6 +493,8 @@ to the MacAddress textual convention of the SMIv2. Disabled Disabled + Disabled + Disabled \ No newline at end of file diff --git a/device/nokia/x86_64-nokia_ixr7220_d4-r0/Nokia-IXR7220-D4-36D/hwsku.json b/device/nokia/x86_64-nokia_ixr7220_d4-r0/Nokia-IXR7220-D4-36D/hwsku.json new file mode 100644 index 00000000000..37091d06243 --- /dev/null +++ b/device/nokia/x86_64-nokia_ixr7220_d4-r0/Nokia-IXR7220-D4-36D/hwsku.json @@ -0,0 +1,112 @@ +{ + "interfaces": { + "Ethernet0": { + "default_brkout_mode": "1x100G" + }, + "Ethernet2": { + "default_brkout_mode": "1x100G" + }, + "Ethernet4": { + "default_brkout_mode": "1x100G" + }, + "Ethernet6": { + "default_brkout_mode": "1x100G" + }, + "Ethernet8": { + "default_brkout_mode": "1x100G" + }, + "Ethernet10": { + "default_brkout_mode": "1x100G" + }, + "Ethernet12": { + "default_brkout_mode": "1x100G" + }, + "Ethernet14": { + "default_brkout_mode": "1x100G" + }, + "Ethernet16": { + "default_brkout_mode": "1x100G[40G]" + }, + "Ethernet20": { + "default_brkout_mode": "1x100G[40G]" + }, + "Ethernet24": { + "default_brkout_mode": "1x100G[40G]" + }, + "Ethernet28": { + "default_brkout_mode": "1x100G[40G]" + }, + "Ethernet32": { + "default_brkout_mode": "1x100G[40G]" + }, + "Ethernet36": { + "default_brkout_mode": "1x100G[40G]" + }, + "Ethernet40": { + "default_brkout_mode": "1x100G[40G]" + }, + "Ethernet44": { + "default_brkout_mode": "1x100G[40G]" + }, + "Ethernet48": { + "default_brkout_mode": "1x100G[40G]" + }, + "Ethernet52": { + "default_brkout_mode": "1x100G[40G]" + }, + "Ethernet56": { + "default_brkout_mode": "1x100G[40G]" + }, + "Ethernet60": { + "default_brkout_mode": "1x100G[40G]" + }, + "Ethernet64": { + "default_brkout_mode": "1x100G[40G]" + }, + "Ethernet68": { + "default_brkout_mode": "1x100G[40G]" + }, + "Ethernet72": { + "default_brkout_mode": "1x100G[40G]" + }, + "Ethernet76": { + "default_brkout_mode": "1x100G[40G]" + }, + "Ethernet80": { + "default_brkout_mode": "1x100G[40G]" + }, + "Ethernet84": { + "default_brkout_mode": "1x100G[40G]" + }, + "Ethernet88": { + "default_brkout_mode": "1x100G[40G]" + }, + "Ethernet92": { + "default_brkout_mode": "1x100G[40G]" + }, + "Ethernet96": { + "default_brkout_mode": "1x400G" + }, + "Ethernet104": { + "default_brkout_mode": "1x400G" + }, + "Ethernet112": { + "default_brkout_mode": "1x400G" + }, + "Ethernet120": { + "default_brkout_mode": "1x400G" + }, + "Ethernet128": { + "default_brkout_mode": "1x400G" + }, + "Ethernet136": { + "default_brkout_mode": "1x400G" + }, + "Ethernet144": { + "default_brkout_mode": "1x400G" + }, + "Ethernet152": { + "default_brkout_mode": "1x400G" + } + } +} diff --git a/device/nokia/x86_64-nokia_ixr7220_d4-r0/Nokia-IXR7220-D4-36D/pg_profile_lookup.ini b/device/nokia/x86_64-nokia_ixr7220_d4-r0/Nokia-IXR7220-D4-36D/pg_profile_lookup.ini index d4c94cc074e..09da3c6b69d 100644 --- a/device/nokia/x86_64-nokia_ixr7220_d4-r0/Nokia-IXR7220-D4-36D/pg_profile_lookup.ini +++ b/device/nokia/x86_64-nokia_ixr7220_d4-r0/Nokia-IXR7220-D4-36D/pg_profile_lookup.ini @@ -1,10 +1,22 @@ # PG lossless profiles. #speed cable size xon xoff threshold xon_offset +10000 5m 1272 2544 30210 0 2544 +25000 5m 1272 2544 31482 0 2544 +40000 5m 1272 2544 46428 0 2544 100000 5m 1272 2544 75366 0 2544 400000 5m 1272 2544 154548 0 2544 +10000 40m 1272 2544 30846 0 2544 +25000 40m 1272 2544 32754 0 2544 +40000 40m 1272 2544 48336 0 2544 100000 40m 1272 2544 81726 0 2544 400000 40m 1272 2544 180624 0 2544 +10000 100m 1272 2544 31800 0 2544 +25000 100m 1272 2544 34980 0 2544 +40000 100m 1272 2544 51834 0 2544 100000 100m 1272 2544 89040 0 2544 400000 100m 1272 2544 209562 0 2544 +10000 300m 1272 2544 34662 0 2544 +25000 300m 1272 2544 41976 0 2544 +40000 300m 1272 2544 63282 0 2544 100000 300m 1272 2544 117978 0 2544 400000 300m 1272 2544 325632 0 2544 diff --git a/device/nokia/x86_64-nokia_ixr7220_d4-r0/Nokia-IXR7220-D4-36D/td4_28x100g_8x400g.yml b/device/nokia/x86_64-nokia_ixr7220_d4-r0/Nokia-IXR7220-D4-36D/td4_28x100g_8x400g.yml index 11f27b8ba1f..8f1440dbbc7 100644 --- a/device/nokia/x86_64-nokia_ixr7220_d4-r0/Nokia-IXR7220-D4-36D/td4_28x100g_8x400g.yml +++ b/device/nokia/x86_64-nokia_ixr7220_d4-r0/Nokia-IXR7220-D4-36D/td4_28x100g_8x400g.yml @@ -288,11 +288,11 @@ device: : PC_PHYS_PORT_ID: 1 #TSC-BH7 0 in Pipe 0 ? - PORT_ID: 5 + PORT_ID: 2 : PC_PHYS_PORT_ID: 5 #TSC-BH7 0 in Pipe 0 ? - PORT_ID: 6 + PORT_ID: 5 : PC_PHYS_PORT_ID: 9 #TSC-BH7 1 in Pipe 0 ? @@ -477,7 +477,7 @@ device: MAX_FRAME_SIZE: 9416 LINK_TRAINING: 1 ? - PORT_ID: [1, 5, 6, 7, 16, 17, 20, 24, + PORT_ID: [1, 2, 5, 7, 16, 17, 20, 24, [28, 35], 63, 64, 68, 72] : @@ -485,13 +485,13 @@ device: ENABLE: 0 SPEED: 100000 NUM_LANES: 4 - #FEC_MODE: PC_FEC_RS528 + FEC_MODE: PC_FEC_RS528 MAX_FRAME_SIZE: 9416 #LINK_TRAINING: 1 PC_PMD_FIRMWARE: ? - PORT_ID: [[8, 15], 1, 5, 6, 7, 16, 17, 20, 24, + PORT_ID: [[8, 15], 1, 2, 5, 7, 16, 17, 20, 24, [28, 35], [60, 63], 40, 44, 48, 52, 56, 64, 68, 72] @@ -511,7 +511,7 @@ device: 0: TM_ING_PORT_PRI_GRP: ? - PORT_ID: [[8, 15], 1, 5, 6, 7, 16, 17, 20, 24, + PORT_ID: [[8, 15], 1, 2, 5, 7, 16, 17, 20, 24, [28, 35], [60, 63], 40, 44, 48, 52, 56, 64, 68, 72] diff --git a/device/nokia/x86_64-nokia_ixr7220_d4-r0/platform.json b/device/nokia/x86_64-nokia_ixr7220_d4-r0/platform.json index 83f4e6caf2a..d8bc5d0252f 100644 --- a/device/nokia/x86_64-nokia_ixr7220_d4-r0/platform.json +++ b/device/nokia/x86_64-nokia_ixr7220_d4-r0/platform.json @@ -538,7 +538,572 @@ } ] }, - "interfaces": {}, + "interfaces": { + "Ethernet0": { + "index": "1,1", + "lanes": "17,18", + "breakout_modes": { + "1x100G": [ + "Ethernet1/1" + ] + } + }, + "Ethernet2": { + "index": "2,2", + "lanes": "19,20", + "breakout_modes": { + "1x100G": [ + "Ethernet2/1" + ] + } + }, + "Ethernet4": { + "index": "3,3", + "lanes": "21,22", + "breakout_modes": { + "1x100G": [ + "Ethernet3/1" + ] + } + }, + "Ethernet6": { + "index": "4,4", + "lanes": "23,24", + "breakout_modes": { + "1x100G": [ + "Ethernet4/1" + ] + } + }, + "Ethernet8": { + "index": "5,5", + "lanes": "25,26", + "breakout_modes": { + "1x100G": [ + "Ethernet5/1" + ] + } + }, + "Ethernet10": { + "index": "6,6", + "lanes": "27,28", + "breakout_modes": { + "1x100G": [ + "Ethernet6/1" + ] + } + }, + "Ethernet12": { + "index": "7,7", + "lanes": "29,30", + "breakout_modes": { + "1x100G": [ + "Ethernet7/1" + ] + } + }, + "Ethernet14": { + "index": "8,8", + "lanes": "31,32", + "breakout_modes": { + "1x100G": [ + "Ethernet8/1" + ] + } + }, + "Ethernet16": { + "index": "9,9,9,9", + "lanes": "1,2,3,4", + "breakout_modes": { + "1x100G[40G]": [ + "Ethernet9/1" + ], + "4x25G[10G]": [ + "Ethernet9/1", + "Ethernet9/2", + "Ethernet9/3", + "Ethernet9/4" + ] + } + }, + "Ethernet20": { + "index": "10,10,10,10", + "lanes": "5,6,7,8", + "breakout_modes": { + "1x100G[40G]": [ + "Ethernet10/1" + ], + "4x25G[10G]": [ + "Ethernet10/1", + "Ethernet10/2", + "Ethernet10/3", + "Ethernet10/4" + ] + } + }, + "Ethernet24": { + "index": "11,11,11,11", + "lanes": "9,10,11,12", + "breakout_modes": { + "1x100G[40G]": [ + "Ethernet11/1" + ], + "4x25G[10G]": [ + "Ethernet11/1", + "Ethernet11/2", + "Ethernet11/3", + "Ethernet11/4" + ] + } + }, + "Ethernet28": { + "index": "12,12,12,12", + "lanes": "13,14,15,16", + "breakout_modes": { + "1x100G[40G]": [ + "Ethernet12/1" + ], + "4x25G[10G]": [ + "Ethernet12/1", + "Ethernet12/2", + "Ethernet12/3", + "Ethernet12/4" + ] + } + }, + "Ethernet32": { + "index": "13,13,13,13", + "lanes": "33,34,35,36", + "breakout_modes": { + "1x100G[40G]": [ + "Ethernet13/1" + ], + "4x25G[10G]": [ + "Ethernet13/1", + "Ethernet13/2", + "Ethernet13/3", + "Ethernet13/4" + ] + } + }, + "Ethernet36": { + "index": "14,14,14,14", + "lanes": "37,38,39,40", + "breakout_modes": { + "1x100G[40G]": [ + "Ethernet14/1" + ], + "4x25G[10G]": [ + "Ethernet14/1", + "Ethernet14/2", + "Ethernet14/3", + "Ethernet14/4" + ] + } + }, + "Ethernet40": { + "index": "15,15,15,15", + "lanes": "41,42,43,44", + "breakout_modes": { + "1x100G[40G]": [ + "Ethernet15/1" + ], + "4x25G[10G]": [ + "Ethernet15/1", + "Ethernet15/2", + "Ethernet15/3", + "Ethernet15/4" + ] + } + }, + "Ethernet44": { + "index": "16,16,16,16", + "lanes": "45,46,47,48", + "breakout_modes": { + "1x100G[40G]": [ + "Ethernet16/1" + ], + "4x25G[10G]": [ + "Ethernet16/1", + "Ethernet16/2", + "Ethernet16/3", + "Ethernet16/4" + ] + } + }, + "Ethernet48": { + "index": "17,17,17,17", + "lanes": "49,50,51,52", + "breakout_modes": { + "1x100G[40G]": [ + "Ethernet17/1" + ], + "4x25G[10G]": [ + "Ethernet17/1", + "Ethernet17/2", + "Ethernet17/3", + "Ethernet17/4" + ] + } + }, + "Ethernet52": { + "index": "18,18,18,18", + "lanes": "53,54,55,56", + "breakout_modes": { + "1x100G[40G]": [ + "Ethernet18/1" + ], + "4x25G[10G]": [ + "Ethernet18/1", + "Ethernet18/2", + "Ethernet18/3", + "Ethernet18/4" + ] + } + }, + "Ethernet56": { + "index": "19,19,19,19", + "lanes": "57,58,59,60", + "breakout_modes": { + "1x100G[40G]": [ + "Ethernet19/1" + ], + "4x25G[10G]": [ + "Ethernet19/1", + "Ethernet19/2", + "Ethernet19/3", + "Ethernet19/4" + ] + } + }, + "Ethernet60": { + "index": "20,20,20,20", + "lanes": "61,62,63,64", + "breakout_modes": { + "1x100G[40G]": [ + "Ethernet20/1" + ], + "4x25G[10G]": [ + "Ethernet20/1", + "Ethernet20/2", + "Ethernet20/3", + "Ethernet20/4" + ] + } + }, + "Ethernet64": { + "index": "21,21,21,21", + "lanes": "65,66,67,68", + "breakout_modes": { + "1x100G[40G]": [ + "Ethernet21/1" + ], + "4x25G[10G]": [ + "Ethernet21/1", + "Ethernet21/2", + "Ethernet21/3", + "Ethernet21/4" + ] + } + }, + "Ethernet68": { + "index": "22,22,22,22", + "lanes": "69,70,71,72", + "breakout_modes": { + "1x100G[40G]": [ + "Ethernet22/1" + ], + "4x25G[10G]": [ + "Ethernet22/1", + "Ethernet22/2", + "Ethernet22/3", + "Ethernet22/4" + ] + } + }, + "Ethernet72": { + "index": "23,23,23,23", + "lanes": "73,74,75,76", + "breakout_modes": { + "1x100G[40G]": [ + "Ethernet23/1" + ], + "4x25G[10G]": [ + "Ethernet23/1", + "Ethernet23/2", + "Ethernet23/3", + "Ethernet23/4" + ] + } + }, + "Ethernet76": { + "index": "24,24,24,24", + "lanes": "77,78,79,80", + "breakout_modes": { + "1x100G[40G]": [ + "Ethernet24/1" + ], + "4x25G[10G]": [ + "Ethernet24/1", + "Ethernet24/2", + "Ethernet24/3", + "Ethernet24/4" + ] + } + }, + "Ethernet80": { + "index": "25,25,25,25", + "lanes": "145,146,147,148", + "breakout_modes": { + "1x100G[40G]": [ + "Ethernet25/1" + ], + "4x25G[10G]": [ + "Ethernet25/1", + "Ethernet25/2", + "Ethernet25/3", + "Ethernet25/4" + ] + } + }, + "Ethernet84": { + "index": "26,26,26,26", + "lanes": "149,150,151,152", + "breakout_modes": { + "1x100G[40G]": [ + "Ethernet26/1" + ], + "4x25G[10G]": [ + "Ethernet26/1", + "Ethernet26/2", + "Ethernet26/3", + "Ethernet26/4" + ] + } + }, + "Ethernet88": { + "index": "27,27,27,27", + "lanes": "153,154,155,156", + "breakout_modes": { + "1x100G[40G]": [ + "Ethernet27/1" + ], + "4x25G[10G]": [ + "Ethernet27/1", + "Ethernet27/2", + "Ethernet27/3", + "Ethernet27/4" + ] + } + }, + "Ethernet92": { + "index": "28,28,28,28", + "lanes": "157,158,159,160", + "breakout_modes": { + "1x100G[40G]": [ + "Ethernet28/1" + ], + "4x25G[10G]": [ + "Ethernet28/1", + "Ethernet28/2", + "Ethernet28/3", + "Ethernet28/4" + ] + } + }, + "Ethernet96": { + "index": "29,29,29,29,29,29,29", + "lanes": "81,82,83,84,85,86,87,88", + "breakout_modes": { + "1x400G": [ + "Ethernet29/1" + ], + "1x100G[40G](4)": [ + "Ethernet29/1" + ], + "4x100G[40G]": [ + "Ethernet29/1", + "Ethernet29/3", + "Ethernet29/5", + "Ethernet29/7" + ], + "4x25G[10G](4)": [ + "Ethernet29/1", + "Ethernet29/3", + "Ethernet29/5", + "Ethernet29/7" + ] + } + }, + "Ethernet104": { + "index": "30,30,30,30,30,30,30", + "lanes": "89,90,91,92,93,94,95,96", + "breakout_modes": { + "1x400G": [ + "Ethernet30/1" + ], + "1x100G[40G](4)": [ + "Ethernet30/1" + ], + "4x100G[40G]": [ + "Ethernet30/1", + "Ethernet30/3", + "Ethernet30/5", + "Ethernet30/7" + ], + "4x25G[10G](4)": [ + "Ethernet30/1", + "Ethernet30/3", + "Ethernet30/5", + "Ethernet30/7" + ] + } + }, + "Ethernet112": { + "index": "31,31,31,31,31,31,31", + "lanes": "97,98,99,100,101,102,103,104", + "breakout_modes": { + "1x400G": [ + "Ethernet31/1" + ], + "1x100G[40G](4)": [ + "Ethernet31/1" + ], + "4x100G[40G]": [ + "Ethernet31/1", + "Ethernet31/3", + "Ethernet31/5", + "Ethernet31/7" + ], + "4x25G[10G](4)": [ + "Ethernet31/1", + "Ethernet31/3", + "Ethernet31/5", + "Ethernet31/7" + ] + } + }, + "Ethernet120": { + "index": "32,32,32,32,32,32,32", + "lanes": "105,106,107,108,109,110,111,112", + "breakout_modes": { + "1x400G": [ + "Ethernet32/1" + ], + "1x100G[40G](4)": [ + "Ethernet32/1" + ], + "4x100G[40G]": [ + "Ethernet32/1", + "Ethernet32/3", + "Ethernet32/5", + "Ethernet32/7" + ], + "4x25G[10G](4)": [ + "Ethernet32/1", + "Ethernet32/3", + "Ethernet32/5", + "Ethernet32/7" + ] + } + }, + "Ethernet128": { + "index": "33,33,33,33,33,33,33", + "lanes": "113,114,115,116,117,118,119,120", + "breakout_modes": { + "1x400G": [ + "Ethernet33/1" + ], + "1x100G[40G](4)": [ + "Ethernet33/1" + ], + "4x100G[40G]": [ + "Ethernet33/1", + "Ethernet33/3", + "Ethernet33/5", + "Ethernet33/7" + ], + "4x25G[10G](4)": [ + "Ethernet33/1", + "Ethernet33/3", + "Ethernet33/5", + "Ethernet33/7" + ] + } + }, + "Ethernet136": { + "index": "34,34,34,34,34,34,34", + "lanes": "121,122,123,124,125,126,127,128", + "breakout_modes": { + "1x400G": [ + "Ethernet34/1" + ], + "1x100G[40G](4)": [ + "Ethernet34/1" + ], + "4x100G[40G]": [ + "Ethernet34/1", + "Ethernet34/3", + "Ethernet34/5", + "Ethernet34/7" + ], + "4x25G[10G](4)": [ + "Ethernet34/1", + "Ethernet34/3", + "Ethernet34/5", + "Ethernet34/7" + ] + } + }, + "Ethernet144": { + "index": "35,35,35,35,35,35,35", + "lanes": "129,130,131,132,133,134,135,136", + "breakout_modes": { + "1x400G": [ + "Ethernet35/1" + ], + "1x100G[40G](4)": [ + "Ethernet35/1" + ], + "4x100G[40G]": [ + "Ethernet35/1", + "Ethernet35/3", + "Ethernet35/5", + "Ethernet35/7" + ], + "4x25G[10G](4)": [ + "Ethernet35/1", + "Ethernet35/3", + "Ethernet35/5", + "Ethernet35/7" + ] + } + }, + "Ethernet152": { + "index": "36,36,36,36,36,36,36", + "lanes": "137,138,139,140,141,142,143,144", + "breakout_modes": { + "1x400G": [ + "Ethernet36/1" + ], + "1x100G[40G](4)": [ + "Ethernet36/1" + ], + "4x100G[40G]": [ + "Ethernet36/1", + "Ethernet36/3", + "Ethernet36/5", + "Ethernet36/7" + ], + "4x25G[10G](4)": [ + "Ethernet36/1", + "Ethernet36/3", + "Ethernet36/5", + "Ethernet36/7" + ] + } + } + }, "asic_sensors": { "poll_interval": "10", "poll_admin_status": "enable" diff --git a/device/nokia/x86_64-nokia_ixr7220_d4-r0/pmon_daemon_control.json b/device/nokia/x86_64-nokia_ixr7220_d4-r0/pmon_daemon_control.json new file mode 100644 index 00000000000..0b4f504a314 --- /dev/null +++ b/device/nokia/x86_64-nokia_ixr7220_d4-r0/pmon_daemon_control.json @@ -0,0 +1,3 @@ +{ + "enable_xcvrd_sff_mgr": true +} diff --git a/device/nokia/x86_64-nokia_ixr7220_d4-r0/system_health_monitoring_config.json b/device/nokia/x86_64-nokia_ixr7220_d4-r0/system_health_monitoring_config.json index 93836514166..c8862b8c102 100644 --- a/device/nokia/x86_64-nokia_ixr7220_d4-r0/system_health_monitoring_config.json +++ b/device/nokia/x86_64-nokia_ixr7220_d4-r0/system_health_monitoring_config.json @@ -8,7 +8,7 @@ "polling_interval": 60, "led_color": { "fault": "amber", - "normal": "blue", - "booting": "green" + "normal": "green", + "booting": "blue" } } diff --git a/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/Nokia-IXR7220-H6-O256/buffer_ports.j2 b/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/Nokia-IXR7220-H6-O256/buffer_ports.j2 new file mode 100644 index 00000000000..fe979bfdf07 --- /dev/null +++ b/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/Nokia-IXR7220-H6-O256/buffer_ports.j2 @@ -0,0 +1,7 @@ +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {%- for port_idx in range(0, 1024, 4) %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx)) %}{%- endif %} + {%- endfor %} + {% if PORT_ALL.append("Ethernet1024") %}{% endif %} +{%- endmacro %} diff --git a/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/Nokia-IXR7220-H6-O256/buffers.json.j2 b/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/Nokia-IXR7220-H6-O256/buffers.json.j2 new file mode 100644 index 00000000000..0b1cb2c541b --- /dev/null +++ b/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/Nokia-IXR7220-H6-O256/buffers.json.j2 @@ -0,0 +1,2 @@ +{%- set default_topo = 't1' %} +{%- include 'buffers_config.j2' %} diff --git a/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/Nokia-IXR7220-H6-O256/buffers_defaults_lt2.j2 b/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/Nokia-IXR7220-H6-O256/buffers_defaults_lt2.j2 new file mode 100644 index 00000000000..4c2c292cecf --- /dev/null +++ b/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/Nokia-IXR7220-H6-O256/buffers_defaults_lt2.j2 @@ -0,0 +1,36 @@ +{%- set default_cable = '5m' %} + +{%- include 'buffer_ports.j2' %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "257154240", + "type": "ingress", + "mode": "dynamic", + "xoff": "59041792" + }, + "egress_lossless_pool": { + "size": "257154240", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"ingress_lossless_pool", + "size":"0", + "static_th":"262523100" + }, + "egress_lossy_profile": { + "pool":"egress_lossless_pool", + "size":"0", + "dynamic_th":"0" + }, + "egress_lossless_profile": { + "pool":"egress_lossless_pool", + "size":"0", + "static_th":"262523100" + } + }, +{%- endmacro %} diff --git a/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/Nokia-IXR7220-H6-O256/buffers_defaults_t0.j2 b/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/Nokia-IXR7220-H6-O256/buffers_defaults_t0.j2 new file mode 100644 index 00000000000..4c2c292cecf --- /dev/null +++ b/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/Nokia-IXR7220-H6-O256/buffers_defaults_t0.j2 @@ -0,0 +1,36 @@ +{%- set default_cable = '5m' %} + +{%- include 'buffer_ports.j2' %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "257154240", + "type": "ingress", + "mode": "dynamic", + "xoff": "59041792" + }, + "egress_lossless_pool": { + "size": "257154240", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"ingress_lossless_pool", + "size":"0", + "static_th":"262523100" + }, + "egress_lossy_profile": { + "pool":"egress_lossless_pool", + "size":"0", + "dynamic_th":"0" + }, + "egress_lossless_profile": { + "pool":"egress_lossless_pool", + "size":"0", + "static_th":"262523100" + } + }, +{%- endmacro %} diff --git a/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/Nokia-IXR7220-H6-O256/buffers_defaults_t1.j2 b/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/Nokia-IXR7220-H6-O256/buffers_defaults_t1.j2 new file mode 100644 index 00000000000..4c2c292cecf --- /dev/null +++ b/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/Nokia-IXR7220-H6-O256/buffers_defaults_t1.j2 @@ -0,0 +1,36 @@ +{%- set default_cable = '5m' %} + +{%- include 'buffer_ports.j2' %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "257154240", + "type": "ingress", + "mode": "dynamic", + "xoff": "59041792" + }, + "egress_lossless_pool": { + "size": "257154240", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"ingress_lossless_pool", + "size":"0", + "static_th":"262523100" + }, + "egress_lossy_profile": { + "pool":"egress_lossless_pool", + "size":"0", + "dynamic_th":"0" + }, + "egress_lossless_profile": { + "pool":"egress_lossless_pool", + "size":"0", + "static_th":"262523100" + } + }, +{%- endmacro %} diff --git a/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/Nokia-IXR7220-H6-O256/context_config.json b/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/Nokia-IXR7220-H6-O256/context_config.json new file mode 100644 index 00000000000..cefed153830 --- /dev/null +++ b/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/Nokia-IXR7220-H6-O256/context_config.json @@ -0,0 +1,21 @@ +{ + "CONTEXTS": [ + { + "guid" : 0, + "name" : "syncd", + "dbAsic" : "ASIC_DB", + "dbCounters" : "COUNTERS_DB", + "dbFlex": "FLEX_COUNTER_DB", + "dbState" : "STATE_DB", + "zmq_enable": false, + "zmq_endpoint": "tcp://127.0.0.1:5555", + "zmq_ntf_endpoint": "tcp://127.0.0.1:5556", + "switches": [ + { + "index" : 0, + "hwinfo" : "" + } + ] + } + ] +} diff --git a/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/Nokia-IXR7220-H6-O256/h6-128.yml b/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/Nokia-IXR7220-H6-O256/h6-128.yml new file mode 100644 index 00000000000..5dcd34ee366 --- /dev/null +++ b/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/Nokia-IXR7220-H6-O256/h6-128.yml @@ -0,0 +1,2757 @@ +--- +bcm_device: + 0: + global: + pktio_mode: 1 + vlan_flooding_l2mc_num_reserved: 0 + ipv6_lpm_128b_enable: 1 + shared_block_mask_section: uc_bc + skip_protocol_default_entries: 1 + # LTSW uses value 1 for ALPM combined mode + l3_alpm_template: 1 + l3_alpm_hit_skip: 1 + sai_feat_tail_timestamp : 0 + sai_port_phy_time_sync_en : 1 + sai_field_group_auto_prioritize: 1 + #l3_intf_vlan_split_egress for MTU at L3IF + l3_intf_vlan_split_egress : 1 + pfc_deadlock_seq_control : 1 + sai_tunnel_support: 1 + bcm_tunnel_term_compatible_mode: 1 + l3_ecmp_member_first_lkup_mem_size: 32768 + default_cpu_tx_queue: 7 + #enable srv6 stats, egr queue drop stats, exclude PFC/pause from in-if discards + sai_stats_support_mask: 0x884 + #disable vxlan tunnel stats + sai_stats_disable_mask: 0x200 + #For PPIU Mode, Set resources for counters in global mode counters like ACL, etc + global_flexctr_ing_action_num_reserved: 20 + global_flexctr_ing_pool_num_reserved: 8 + global_flexctr_ing_op_profile_num_reserved: 20 + global_flexctr_ing_group_num_reserved: 2 + global_flexctr_egr_action_num_reserved: 8 + global_flexctr_egr_pool_num_reserved: 5 + global_flexctr_egr_op_profile_num_reserved: 10 + global_flexctr_egr_group_num_reserved: 1 + l3_alpm_large_vrf_mode: 1 + l3_ecmp_member_secondary_mem_size: 8192 + stat_custom_receive0_management_mode: 1 + sai_pfc_dlr_init_capability: 2 +... +--- +device: + 0: + PC_PM_CORE: + ? + PC_PM_ID: 4 #TSC0, YAML_PM4 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x36270415 + TX_LANE_MAP: 0x35240716 + RX_POLARITY_FLIP: 0xe8 + TX_POLARITY_FLIP: 0xc6 + ? + PC_PM_ID: 5 #TSC1, YAML_PM5 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x07264153 + TX_LANE_MAP: 0x60237451 + RX_POLARITY_FLIP: 0x47 + TX_POLARITY_FLIP: 0xbc + ? + PC_PM_ID: 3 #TSC2, YAML_PM3 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x32016475 + TX_LANE_MAP: 0x70514362 + RX_POLARITY_FLIP: 0x07 + TX_POLARITY_FLIP: 0x9c + ? + PC_PM_ID: 1 #TSC3, YAML_PM1 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x61704253 + TX_LANE_MAP: 0x35240716 + RX_POLARITY_FLIP: 0xff + TX_POLARITY_FLIP: 0xfe + ? + PC_PM_ID: 2 #TSC4, YAML_PM2 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x23017465 + TX_LANE_MAP: 0x60415273 + RX_POLARITY_FLIP: 0xf6 + TX_POLARITY_FLIP: 0x7f + ? + PC_PM_ID: 6 #TSC5, YAML_PM6 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x36174052 + TX_LANE_MAP: 0x25076143 + RX_POLARITY_FLIP: 0xef + TX_POLARITY_FLIP: 0xf5 + ? + PC_PM_ID: 7 #TSC6, YAML_PM7 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x36170425 + TX_LANE_MAP: 0x02175346 + RX_POLARITY_FLIP: 0xf7 + TX_POLARITY_FLIP: 0xfe + ? + PC_PM_ID: 8 #TSC7, YAML_PM8 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x36174052 + TX_LANE_MAP: 0x25076143 + RX_POLARITY_FLIP: 0xfd + TX_POLARITY_FLIP: 0xf5 + ? + PC_PM_ID: 16 #TSC8, YAML_PM16 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x32107654 + TX_LANE_MAP: 0x71534062 + RX_POLARITY_FLIP: 0xee + TX_POLARITY_FLIP: 0xae + ? + PC_PM_ID: 15 #TSC9, YAML_PM15 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x35076142 + TX_LANE_MAP: 0x24176053 + RX_POLARITY_FLIP: 0xe6 + TX_POLARITY_FLIP: 0x1f + ? + PC_PM_ID: 14 #TSC10, YAML_PM14 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x02134657 + TX_LANE_MAP: 0x71405263 + RX_POLARITY_FLIP: 0x17 + TX_POLARITY_FLIP: 0x4b + ? + PC_PM_ID: 10 #TSC11, YAML_PM10 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x35076142 + TX_LANE_MAP: 0x04167352 + RX_POLARITY_FLIP: 0xcd + TX_POLARITY_FLIP: 0x92 + ? + PC_PM_ID: 9 #TSC12, YAML_PM9 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x23061754 + TX_LANE_MAP: 0x10475263 + RX_POLARITY_FLIP: 0x6a + TX_POLARITY_FLIP: 0x1e + ? + PC_PM_ID: 11 #TSC13, YAML_PM11 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x24357160 + TX_LANE_MAP: 0x36072541 + RX_POLARITY_FLIP: 0x4d + TX_POLARITY_FLIP: 0x3d + ? + PC_PM_ID: 13 #TSC14, YAML_PM13 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x23150647 + TX_LANE_MAP: 0x50426173 + RX_POLARITY_FLIP: 0x22 + TX_POLARITY_FLIP: 0xb1 + ? + PC_PM_ID: 12 #TSC15, YAML_PM12 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x35614072 + TX_LANE_MAP: 0x25061743 + RX_POLARITY_FLIP: 0x98 + TX_POLARITY_FLIP: 0xa2 + ? + PC_PM_ID: 20 #TSC16, YAML_PM20 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x12304657 + TX_LANE_MAP: 0x45610237 + RX_POLARITY_FLIP: 0x3c + TX_POLARITY_FLIP: 0x0a + ? + PC_PM_ID: 21 #TSC17, YAML_PM21 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x67540123 + TX_LANE_MAP: 0x31207564 + RX_POLARITY_FLIP: 0x52 + TX_POLARITY_FLIP: 0x0a + ? + PC_PM_ID: 19 #TSC18, YAML_PM19 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x13204675 + TX_LANE_MAP: 0x45720136 + RX_POLARITY_FLIP: 0x42 + TX_POLARITY_FLIP: 0x33 + ? + PC_PM_ID: 17 #TSC19, YAML_PM17 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x75643120 + TX_LANE_MAP: 0x13207645 + RX_POLARITY_FLIP: 0x8c + TX_POLARITY_FLIP: 0xbb + ? + PC_PM_ID: 18 #TSC20, YAML_PM18 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x23107654 + TX_LANE_MAP: 0x75603124 + RX_POLARITY_FLIP: 0xf0 + TX_POLARITY_FLIP: 0x9b + ? + PC_PM_ID: 22 #TSC21, YAML_PM22 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x56470231 + TX_LANE_MAP: 0x23106754 + RX_POLARITY_FLIP: 0x1f + TX_POLARITY_FLIP: 0x93 + ? + PC_PM_ID: 23 #TSC22, YAML_PM23 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x12034657 + TX_LANE_MAP: 0x54610237 + RX_POLARITY_FLIP: 0xc1 + TX_POLARITY_FLIP: 0x91 + ? + PC_PM_ID: 24 #TSC23, YAML_PM24 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x45670231 + TX_LANE_MAP: 0x02137654 + RX_POLARITY_FLIP: 0xdd + TX_POLARITY_FLIP: 0xf9 + ? + PC_PM_ID: 32 #TSC24, YAML_PM32 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x10537624 + TX_LANE_MAP: 0x46750132 + RX_POLARITY_FLIP: 0x85 + TX_POLARITY_FLIP: 0x15 + ? + PC_PM_ID: 31 #TSC25, YAML_PM31 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x76450213 + TX_LANE_MAP: 0x23107645 + RX_POLARITY_FLIP: 0x19 + TX_POLARITY_FLIP: 0x98 + ? + PC_PM_ID: 30 #TSC26, YAML_PM30 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x10437625 + TX_LANE_MAP: 0x47653210 + RX_POLARITY_FLIP: 0x39 + TX_POLARITY_FLIP: 0xd8 + ? + PC_PM_ID: 26 #TSC27, YAML_PM26 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x45673201 + TX_LANE_MAP: 0x23106754 + RX_POLARITY_FLIP: 0xa4 + TX_POLARITY_FLIP: 0xa9 + ? + PC_PM_ID: 25 #TSC28, YAML_PM25 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x32507614 + TX_LANE_MAP: 0x57640132 + RX_POLARITY_FLIP: 0xcc + TX_POLARITY_FLIP: 0x6b + ? + PC_PM_ID: 27 #TSC29, YAML_PM27 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x57640132 + TX_LANE_MAP: 0x02137654 + RX_POLARITY_FLIP: 0x9f + TX_POLARITY_FLIP: 0x34 + ? + PC_PM_ID: 29 #TSC30, YAML_PM29 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x23605147 + TX_LANE_MAP: 0x47561032 + RX_POLARITY_FLIP: 0x73 + TX_POLARITY_FLIP: 0x12 + ? + PC_PM_ID: 28 #TSC31, YAML_PM28 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x46753120 + TX_LANE_MAP: 0x13604275 + RX_POLARITY_FLIP: 0xf9 + TX_POLARITY_FLIP: 0x4c + ? + PC_PM_ID: 36 #TSC32, YAML_PM36 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x75402631 + TX_LANE_MAP: 0x03467512 + RX_POLARITY_FLIP: 0x62 + TX_POLARITY_FLIP: 0xa1 + ? + PC_PM_ID: 37 #TSC33, YAML_PM37 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x73542160 + TX_LANE_MAP: 0x23746501 + RX_POLARITY_FLIP: 0x0c + TX_POLARITY_FLIP: 0xa7 + ? + PC_PM_ID: 35 #TSC34, YAML_PM35 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x31427506 + TX_LANE_MAP: 0x13405276 + RX_POLARITY_FLIP: 0x81 + TX_POLARITY_FLIP: 0x9a + ? + PC_PM_ID: 33 #TSC35, YAML_PM33 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x63724501 + TX_LANE_MAP: 0x53672410 + RX_POLARITY_FLIP: 0xc6 + TX_POLARITY_FLIP: 0xfc + ? + PC_PM_ID: 34 #TSC36, YAML_PM34 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x72043516 + TX_LANE_MAP: 0x31742065 + RX_POLARITY_FLIP: 0x98 + TX_POLARITY_FLIP: 0x26 + ? + PC_PM_ID: 38 #TSC37, YAML_PM38 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x06321457 + TX_LANE_MAP: 0x42057136 + RX_POLARITY_FLIP: 0x83 + TX_POLARITY_FLIP: 0xe3 + ? + PC_PM_ID: 39 #TSC38, YAML_PM39 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x76512304 + TX_LANE_MAP: 0x16254073 + RX_POLARITY_FLIP: 0xb8 + TX_POLARITY_FLIP: 0x9c + ? + PC_PM_ID: 40 #TSC39, YAML_PM40 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x62574013 + TX_LANE_MAP: 0x43025761 + RX_POLARITY_FLIP: 0x16 + TX_POLARITY_FLIP: 0x40 + ? + PC_PM_ID: 48 #TSC40, YAML_PM48 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x21645730 + TX_LANE_MAP: 0x62405317 + RX_POLARITY_FLIP: 0x91 + TX_POLARITY_FLIP: 0xcc + ? + PC_PM_ID: 47 #TSC41, YAML_PM47 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x21647530 + TX_LANE_MAP: 0x70541263 + RX_POLARITY_FLIP: 0xae + TX_POLARITY_FLIP: 0xea + ? + PC_PM_ID: 46 #TSC42, YAML_PM46 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x15672430 + TX_LANE_MAP: 0x60547213 + RX_POLARITY_FLIP: 0xa3 + TX_POLARITY_FLIP: 0xb4 + ? + PC_PM_ID: 42 #TSC43, YAML_PM42 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x31427605 + TX_LANE_MAP: 0x06347521 + RX_POLARITY_FLIP: 0x77 + TX_POLARITY_FLIP: 0x77 + ? + PC_PM_ID: 41 #TSC44, YAML_PM41 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x46701523 + TX_LANE_MAP: 0x30457621 + RX_POLARITY_FLIP: 0xb7 + TX_POLARITY_FLIP: 0xce + ? + PC_PM_ID: 43 #TSC45, YAML_PM43 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x10425673 + TX_LANE_MAP: 0x21475603 + RX_POLARITY_FLIP: 0x5e + TX_POLARITY_FLIP: 0x20 + ? + PC_PM_ID: 45 #TSC46, YAML_PM45 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x01625437 + TX_LANE_MAP: 0x21705463 + RX_POLARITY_FLIP: 0x55 + TX_POLARITY_FLIP: 0xc5 + ? + PC_PM_ID: 44 #TSC47, YAML_PM44 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x63427501 + TX_LANE_MAP: 0x53671420 + RX_POLARITY_FLIP: 0xfd + TX_POLARITY_FLIP: 0xe1 + ? + PC_PM_ID: 52 #TSC48, YAML_PM52 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x52073416 + TX_LANE_MAP: 0x31742056 + RX_POLARITY_FLIP: 0x72 + TX_POLARITY_FLIP: 0xb6 + ? + PC_PM_ID: 53 #TSC49, YAML_PM53 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x35021764 + TX_LANE_MAP: 0x76325104 + RX_POLARITY_FLIP: 0xaa + TX_POLARITY_FLIP: 0x94 + ? + PC_PM_ID: 51 #TSC50, YAML_PM51 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x16402375 + TX_LANE_MAP: 0x15264073 + RX_POLARITY_FLIP: 0xe3 + TX_POLARITY_FLIP: 0x10 + ? + PC_PM_ID: 49 #TSC51, YAML_PM49 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x42576013 + TX_LANE_MAP: 0x43025761 + RX_POLARITY_FLIP: 0x0e + TX_POLARITY_FLIP: 0xb8 + ? + PC_PM_ID: 50 #TSC52, YAML_PM50 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x21645703 + TX_LANE_MAP: 0x62504317 + RX_POLARITY_FLIP: 0x07 + TX_POLARITY_FLIP: 0x36 + ? + PC_PM_ID: 54 #TSC53, YAML_PM54 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x20647513 + TX_LANE_MAP: 0x70542163 + RX_POLARITY_FLIP: 0x34 + TX_POLARITY_FLIP: 0x46 + ? + PC_PM_ID: 55 #TSC54, YAML_PM55 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x36471502 + TX_LANE_MAP: 0x60547123 + RX_POLARITY_FLIP: 0x1b + TX_POLARITY_FLIP: 0x9a + ? + PC_PM_ID: 56 #TSC55, YAML_PM56 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x31427605 + TX_LANE_MAP: 0x06347512 + RX_POLARITY_FLIP: 0xd7 + TX_POLARITY_FLIP: 0xe2 + ? + PC_PM_ID: 64 #TSC56, YAML_PM64 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x52634071 + TX_LANE_MAP: 0x14657023 + RX_POLARITY_FLIP: 0x7d + TX_POLARITY_FLIP: 0xc8 + ? + PC_PM_ID: 63 #TSC57, YAML_PM63 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x60351472 + TX_LANE_MAP: 0x56124703 + RX_POLARITY_FLIP: 0x85 + TX_POLARITY_FLIP: 0x62 + ? + PC_PM_ID: 62 #TSC58, YAML_PM62 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x35041627 + TX_LANE_MAP: 0x42735061 + RX_POLARITY_FLIP: 0x51 + TX_POLARITY_FLIP: 0x5f + ? + PC_PM_ID: 58 #TSC59, YAML_PM58 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x72436051 + TX_LANE_MAP: 0x56417023 + RX_POLARITY_FLIP: 0xaa + TX_POLARITY_FLIP: 0xdf + ? + PC_PM_ID: 57 #TSC60, YAML_PM57 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x51407263 + TX_LANE_MAP: 0x34652170 + RX_POLARITY_FLIP: 0x5d + TX_POLARITY_FLIP: 0xc0 + ? + PC_PM_ID: 59 #TSC61, YAML_PM59 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x52736140 + TX_LANE_MAP: 0x06153427 + RX_POLARITY_FLIP: 0xc4 + TX_POLARITY_FLIP: 0x6e + ? + PC_PM_ID: 61 #TSC62, YAML_PM61 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x71524360 + TX_LANE_MAP: 0x05372461 + RX_POLARITY_FLIP: 0xb2 + TX_POLARITY_FLIP: 0xd3 + ? + PC_PM_ID: 60 #TSC63, YAML_PM60 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x43061257 + TX_LANE_MAP: 0x16534270 + RX_POLARITY_FLIP: 0x0c + TX_POLARITY_FLIP: 0xf2 + ? + PC_PM_ID: 68 #TSC64, YAML_PM68 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x15042736 + TX_LANE_MAP: 0x60317524 + RX_POLARITY_FLIP: 0x9a + TX_POLARITY_FLIP: 0xdc + ? + PC_PM_ID: 69 #TSC65, YAML_PM69 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x60435271 + TX_LANE_MAP: 0x16253704 + RX_POLARITY_FLIP: 0xaf + TX_POLARITY_FLIP: 0x34 + ? + PC_PM_ID: 67 #TSC66, YAML_PM67 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x73426051 + TX_LANE_MAP: 0x25341706 + RX_POLARITY_FLIP: 0x3f + TX_POLARITY_FLIP: 0x31 + ? + PC_PM_ID: 65 #TSC67, YAML_PM65 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x06435712 + TX_LANE_MAP: 0x53160724 + RX_POLARITY_FLIP: 0x57 + TX_POLARITY_FLIP: 0x50 + ? + PC_PM_ID: 66 #TSC68, YAML_PM66 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x62537041 + TX_LANE_MAP: 0x15746023 + RX_POLARITY_FLIP: 0x88 + TX_POLARITY_FLIP: 0x1f + ? + PC_PM_ID: 70 #TSC69, YAML_PM70 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x72435061 + TX_LANE_MAP: 0x63407152 + RX_POLARITY_FLIP: 0xfc + TX_POLARITY_FLIP: 0x77 + ? + PC_PM_ID: 71 #TSC70, YAML_PM71 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x32701564 + TX_LANE_MAP: 0x43065217 + RX_POLARITY_FLIP: 0x03 + TX_POLARITY_FLIP: 0x12 + ? + PC_PM_ID: 72 #TSC71, YAML_PM72 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x42735061 + TX_LANE_MAP: 0x47516023 + RX_POLARITY_FLIP: 0xf5 + TX_POLARITY_FLIP: 0x68 + ? + PC_PM_ID: 80 #TSC72, YAML_PM80 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x21645730 + TX_LANE_MAP: 0x26405317 + RX_POLARITY_FLIP: 0x6a + TX_POLARITY_FLIP: 0xeb + ? + PC_PM_ID: 79 #TSC73, YAML_PM79 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x02371546 + TX_LANE_MAP: 0x24715360 + RX_POLARITY_FLIP: 0xf9 + TX_POLARITY_FLIP: 0xe0 + ? + PC_PM_ID: 78 #TSC74, YAML_PM78 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x63147520 + TX_LANE_MAP: 0x63205471 + RX_POLARITY_FLIP: 0xf4 + TX_POLARITY_FLIP: 0x3b + ? + PC_PM_ID: 74 #TSC75, YAML_PM74 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x01427635 + TX_LANE_MAP: 0x02357416 + RX_POLARITY_FLIP: 0x98 + TX_POLARITY_FLIP: 0x0f + ? + PC_PM_ID: 73 #TSC76, YAML_PM73 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x72053641 + TX_LANE_MAP: 0x13247065 + RX_POLARITY_FLIP: 0xbc + TX_POLARITY_FLIP: 0x88 + ? + PC_PM_ID: 75 #TSC77, YAML_PM75 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x45102376 + TX_LANE_MAP: 0x76402315 + RX_POLARITY_FLIP: 0xca + TX_POLARITY_FLIP: 0x42 + ? + PC_PM_ID: 77 #TSC78, YAML_PM77 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x04671235 + TX_LANE_MAP: 0x04523671 + RX_POLARITY_FLIP: 0xea + TX_POLARITY_FLIP: 0x31 + ? + PC_PM_ID: 76 #TSC79, YAML_PM76 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x12754063 + TX_LANE_MAP: 0x41076253 + RX_POLARITY_FLIP: 0xd6 + TX_POLARITY_FLIP: 0x0e + ? + PC_PM_ID: 84 #TSC80, YAML_PM84 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x45706132 + TX_LANE_MAP: 0x03754621 + RX_POLARITY_FLIP: 0x75 + TX_POLARITY_FLIP: 0x69 + ? + PC_PM_ID: 85 #TSC81, YAML_PM85 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x32075164 + TX_LANE_MAP: 0x43607521 + RX_POLARITY_FLIP: 0x54 + TX_POLARITY_FLIP: 0x63 + ? + PC_PM_ID: 83 #TSC82, YAML_PM83 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x53401276 + TX_LANE_MAP: 0x03514726 + RX_POLARITY_FLIP: 0xff + TX_POLARITY_FLIP: 0xa0 + ? + PC_PM_ID: 81 #TSC83, YAML_PM81 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x12437605 + TX_LANE_MAP: 0x50641723 + RX_POLARITY_FLIP: 0x99 + TX_POLARITY_FLIP: 0xda + ? + PC_PM_ID: 82 #TSC84, YAML_PM82 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x21645730 + TX_LANE_MAP: 0x16405327 + RX_POLARITY_FLIP: 0x78 + TX_POLARITY_FLIP: 0x53 + ? + PC_PM_ID: 86 #TSC85, YAML_PM86 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x30172465 + TX_LANE_MAP: 0x14725360 + RX_POLARITY_FLIP: 0xc3 + TX_POLARITY_FLIP: 0x58 + ? + PC_PM_ID: 87 #TSC86, YAML_PM87 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x60347521 + TX_LANE_MAP: 0x63105472 + RX_POLARITY_FLIP: 0xce + TX_POLARITY_FLIP: 0x10 + ? + PC_PM_ID: 88 #TSC87, YAML_PM88 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x31427605 + TX_LANE_MAP: 0x02347516 + RX_POLARITY_FLIP: 0x20 + TX_POLARITY_FLIP: 0xd8 + ? + PC_PM_ID: 96 #TSC88, YAML_PM96 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x72053461 + TX_LANE_MAP: 0x13247065 + RX_POLARITY_FLIP: 0x38 + TX_POLARITY_FLIP: 0xfd + ? + PC_PM_ID: 95 #TSC89, YAML_PM95 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x04712356 + TX_LANE_MAP: 0x75402316 + RX_POLARITY_FLIP: 0x3b + TX_POLARITY_FLIP: 0x70 + ? + PC_PM_ID: 94 #TSC90, YAML_PM94 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x37541206 + TX_LANE_MAP: 0x36720541 + RX_POLARITY_FLIP: 0x22 + TX_POLARITY_FLIP: 0x78 + ? + PC_PM_ID: 90 #TSC91, YAML_PM90 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x12475063 + TX_LANE_MAP: 0x41075263 + RX_POLARITY_FLIP: 0x03 + TX_POLARITY_FLIP: 0x8f + ? + PC_PM_ID: 89 #TSC92, YAML_PM89 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x75406132 + TX_LANE_MAP: 0x03754612 + RX_POLARITY_FLIP: 0xc0 + TX_POLARITY_FLIP: 0xc0 + ? + PC_PM_ID: 91 #TSC93, YAML_PM91 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x02367145 + TX_LANE_MAP: 0x70524613 + RX_POLARITY_FLIP: 0x91 + TX_POLARITY_FLIP: 0xe0 + ? + PC_PM_ID: 93 #TSC94, YAML_PM93 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x50632471 + TX_LANE_MAP: 0x01637425 + RX_POLARITY_FLIP: 0x41 + TX_POLARITY_FLIP: 0x33 + ? + PC_PM_ID: 92 #TSC95, YAML_PM92 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x23714506 + TX_LANE_MAP: 0x63542710 + RX_POLARITY_FLIP: 0xac + TX_POLARITY_FLIP: 0xa4 + ? + PC_PM_ID: 100 #TSC96, YAML_PM100 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x20417536 + TX_LANE_MAP: 0x42756013 + RX_POLARITY_FLIP: 0x90 + TX_POLARITY_FLIP: 0xbe + ? + PC_PM_ID: 101 #TSC97, YAML_PM101 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x67514023 + TX_LANE_MAP: 0x42105736 + RX_POLARITY_FLIP: 0x32 + TX_POLARITY_FLIP: 0xfc + ? + PC_PM_ID: 99 #TSC98, YAML_PM99 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x32516407 + TX_LANE_MAP: 0x56741302 + RX_POLARITY_FLIP: 0x09 + TX_POLARITY_FLIP: 0xb3 + ? + PC_PM_ID: 97 #TSC99, YAML_PM97 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x54761032 + TX_LANE_MAP: 0x32016754 + RX_POLARITY_FLIP: 0xcc + TX_POLARITY_FLIP: 0x13 + ? + PC_PM_ID: 98 #TSC100, YAML_PM98 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x01426735 + TX_LANE_MAP: 0x57641023 + RX_POLARITY_FLIP: 0xc7 + TX_POLARITY_FLIP: 0xc5 + ? + PC_PM_ID: 102 #TSC101, YAML_PM102 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x45762310 + TX_LANE_MAP: 0x10326745 + RX_POLARITY_FLIP: 0x1b + TX_POLARITY_FLIP: 0xd8 + ? + PC_PM_ID: 103 #TSC102, YAML_PM103 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x13724506 + TX_LANE_MAP: 0x46751023 + RX_POLARITY_FLIP: 0xb9 + TX_POLARITY_FLIP: 0xd9 + ? + PC_PM_ID: 104 #TSC103, YAML_PM104 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x54762310 + TX_LANE_MAP: 0x42710635 + RX_POLARITY_FLIP: 0xad + TX_POLARITY_FLIP: 0x04 + ? + PC_PM_ID: 112 #TSC104, YAML_PM112 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x01326745 + TX_LANE_MAP: 0x54721306 + RX_POLARITY_FLIP: 0x2d + TX_POLARITY_FLIP: 0x81 + ? + PC_PM_ID: 111 #TSC105, YAML_PM111 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x57461302 + TX_LANE_MAP: 0x31026754 + RX_POLARITY_FLIP: 0xb6 + TX_POLARITY_FLIP: 0xb9 + ? + PC_PM_ID: 110 #TSC106, YAML_PM110 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x01324756 + TX_LANE_MAP: 0x54631027 + RX_POLARITY_FLIP: 0x0b + TX_POLARITY_FLIP: 0x39 + ? + PC_PM_ID: 106 #TSC107, YAML_PM106 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x54762013 + TX_LANE_MAP: 0x20316475 + RX_POLARITY_FLIP: 0xf0 + TX_POLARITY_FLIP: 0x19 + ? + PC_PM_ID: 105 #TSC108, YAML_PM105 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x30216475 + TX_LANE_MAP: 0x45732016 + RX_POLARITY_FLIP: 0x6d + TX_POLARITY_FLIP: 0x11 + ? + PC_PM_ID: 107 #TSC109, YAML_PM107 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x75461023 + TX_LANE_MAP: 0x32017645 + RX_POLARITY_FLIP: 0x7e + TX_POLARITY_FLIP: 0x33 + ? + PC_PM_ID: 109 #TSC110, YAML_PM109 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x03215467 + TX_LANE_MAP: 0x64712035 + RX_POLARITY_FLIP: 0xda + TX_POLARITY_FLIP: 0x5f + ? + PC_PM_ID: 108 #TSC111, YAML_PM108 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x57461032 + TX_LANE_MAP: 0x31026745 + RX_POLARITY_FLIP: 0xc9 + TX_POLARITY_FLIP: 0x5f + ? + PC_PM_ID: 116 #TSC112, YAML_PM116 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x32604175 + TX_LANE_MAP: 0x67504312 + RX_POLARITY_FLIP: 0x73 + TX_POLARITY_FLIP: 0xe6 + ? + PC_PM_ID: 117 #TSC113, YAML_PM117 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x27160543 + TX_LANE_MAP: 0x31207564 + RX_POLARITY_FLIP: 0xdd + TX_POLARITY_FLIP: 0x5a + ? + PC_PM_ID: 115 #TSC114, YAML_PM115 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x20317564 + TX_LANE_MAP: 0x75604123 + RX_POLARITY_FLIP: 0xa6 + TX_POLARITY_FLIP: 0x29 + ? + PC_PM_ID: 113 #TSC115, YAML_PM113 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x24071653 + TX_LANE_MAP: 0x32706154 + RX_POLARITY_FLIP: 0xd4 + TX_POLARITY_FLIP: 0x95 + ? + PC_PM_ID: 114 #TSC116, YAML_PM114 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x32016745 + TX_LANE_MAP: 0x63415270 + RX_POLARITY_FLIP: 0x26 + TX_POLARITY_FLIP: 0x76 + ? + PC_PM_ID: 118 #TSC117, YAML_PM118 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x07164352 + TX_LANE_MAP: 0x32016754 + RX_POLARITY_FLIP: 0xa9 + TX_POLARITY_FLIP: 0x65 + ? + PC_PM_ID: 119 #TSC118, YAML_PM119 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x32016745 + TX_LANE_MAP: 0x70415362 + RX_POLARITY_FLIP: 0x4c + TX_POLARITY_FLIP: 0x31 + ? + PC_PM_ID: 120 #TSC119, YAML_PM120 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x34167052 + TX_LANE_MAP: 0x20316745 + RX_POLARITY_FLIP: 0x44 + TX_POLARITY_FLIP: 0xb0 + ? + PC_PM_ID: 128 #TSC120, YAML_PM128 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x32104756 + TX_LANE_MAP: 0x71504362 + RX_POLARITY_FLIP: 0x02 + TX_POLARITY_FLIP: 0x0a + ? + PC_PM_ID: 127 #TSC121, YAML_PM127 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x35140726 + TX_LANE_MAP: 0x63724051 + RX_POLARITY_FLIP: 0x08 + TX_POLARITY_FLIP: 0x80 + ? + PC_PM_ID: 126 #TSC122, YAML_PM126 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x32104756 + TX_LANE_MAP: 0x71504362 + RX_POLARITY_FLIP: 0x04 + TX_POLARITY_FLIP: 0x0a + ? + PC_PM_ID: 122 #TSC123, YAML_PM122 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x25047163 + TX_LANE_MAP: 0x32107654 + RX_POLARITY_FLIP: 0x48 + TX_POLARITY_FLIP: 0x04 + ? + PC_PM_ID: 121 #TSC124, YAML_PM121 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x63724051 + TX_LANE_MAP: 0x47521603 + RX_POLARITY_FLIP: 0x00 + TX_POLARITY_FLIP: 0x04 + ? + PC_PM_ID: 123 #TSC125, YAML_PM123 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x35046172 + TX_LANE_MAP: 0x23106745 + RX_POLARITY_FLIP: 0xad + TX_POLARITY_FLIP: 0x99 + ? + PC_PM_ID: 125 #TSC126, YAML_PM125 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x03214657 + TX_LANE_MAP: 0x42517063 + RX_POLARITY_FLIP: 0xac + TX_POLARITY_FLIP: 0xe6 + ? + PC_PM_ID: 124 #TSC127, YAML_PM124 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x35240716 + TX_LANE_MAP: 0x63724051 + RX_POLARITY_FLIP: 0x56 + TX_POLARITY_FLIP: 0x9c + ? + PC_PM_ID: 129 + CORE_INDEX: 0 + : + RX_POLARITY_FLIP_AUTO: 1 + TX_POLARITY_FLIP_AUTO: 1 + RX_POLARITY_FLIP: 0x00 + TX_POLARITY_FLIP: 0x00 +... +--- +device: + 0: + PC_PORT_PHYS_MAP: + ? + PORT_ID: 0 + : + PC_PHYS_PORT_ID: 0 + ? + PORT_ID: 1 + : + PC_PHYS_PORT_ID: 1 + ? + PORT_ID: 2 + : + PC_PHYS_PORT_ID: 5 + ? + PORT_ID: 3 + : + PC_PHYS_PORT_ID: 9 + ? + PORT_ID: 4 + : + PC_PHYS_PORT_ID: 13 + ? + PORT_ID: 5 + : + PC_PHYS_PORT_ID: 17 + ? + PORT_ID: 6 + : + PC_PHYS_PORT_ID: 21 + ? + PORT_ID: 7 + : + PC_PHYS_PORT_ID: 25 + ? + PORT_ID: 8 + : + PC_PHYS_PORT_ID: 29 + ? + PORT_ID: 18 + : + PC_PHYS_PORT_ID: 33 + ? + PORT_ID: 19 + : + PC_PHYS_PORT_ID: 37 + ? + PORT_ID: 20 + : + PC_PHYS_PORT_ID: 41 + ? + PORT_ID: 21 + : + PC_PHYS_PORT_ID: 45 + ? + PORT_ID: 22 + : + PC_PHYS_PORT_ID: 49 + ? + PORT_ID: 23 + : + PC_PHYS_PORT_ID: 53 + ? + PORT_ID: 24 + : + PC_PHYS_PORT_ID: 57 + ? + PORT_ID: 25 + : + PC_PHYS_PORT_ID: 61 + ? + PORT_ID: 36 + : + PC_PHYS_PORT_ID: 65 + ? + PORT_ID: 37 + : + PC_PHYS_PORT_ID: 69 + ? + PORT_ID: 38 + : + PC_PHYS_PORT_ID: 73 + ? + PORT_ID: 39 + : + PC_PHYS_PORT_ID: 77 + ? + PORT_ID: 40 + : + PC_PHYS_PORT_ID: 81 + ? + PORT_ID: 41 + : + PC_PHYS_PORT_ID: 85 + ? + PORT_ID: 42 + : + PC_PHYS_PORT_ID: 89 + ? + PORT_ID: 43 + : + PC_PHYS_PORT_ID: 93 + ? + PORT_ID: 54 + : + PC_PHYS_PORT_ID: 97 + ? + PORT_ID: 55 + : + PC_PHYS_PORT_ID: 101 + ? + PORT_ID: 56 + : + PC_PHYS_PORT_ID: 105 + ? + PORT_ID: 57 + : + PC_PHYS_PORT_ID: 109 + ? + PORT_ID: 58 + : + PC_PHYS_PORT_ID: 113 + ? + PORT_ID: 59 + : + PC_PHYS_PORT_ID: 117 + ? + PORT_ID: 60 + : + PC_PHYS_PORT_ID: 121 + ? + PORT_ID: 61 + : + PC_PHYS_PORT_ID: 125 + ? + PORT_ID: 72 + : + PC_PHYS_PORT_ID: 129 + ? + PORT_ID: 73 + : + PC_PHYS_PORT_ID: 133 + ? + PORT_ID: 74 + : + PC_PHYS_PORT_ID: 137 + ? + PORT_ID: 75 + : + PC_PHYS_PORT_ID: 141 + ? + PORT_ID: 76 + : + PC_PHYS_PORT_ID: 145 + ? + PORT_ID: 77 + : + PC_PHYS_PORT_ID: 149 + ? + PORT_ID: 78 + : + PC_PHYS_PORT_ID: 153 + ? + PORT_ID: 79 + : + PC_PHYS_PORT_ID: 157 + ? + PORT_ID: 90 + : + PC_PHYS_PORT_ID: 161 + ? + PORT_ID: 91 + : + PC_PHYS_PORT_ID: 165 + ? + PORT_ID: 92 + : + PC_PHYS_PORT_ID: 169 + ? + PORT_ID: 93 + : + PC_PHYS_PORT_ID: 173 + ? + PORT_ID: 94 + : + PC_PHYS_PORT_ID: 177 + ? + PORT_ID: 95 + : + PC_PHYS_PORT_ID: 181 + ? + PORT_ID: 96 + : + PC_PHYS_PORT_ID: 185 + ? + PORT_ID: 97 + : + PC_PHYS_PORT_ID: 189 + ? + PORT_ID: 108 + : + PC_PHYS_PORT_ID: 193 + ? + PORT_ID: 109 + : + PC_PHYS_PORT_ID: 197 + ? + PORT_ID: 110 + : + PC_PHYS_PORT_ID: 201 + ? + PORT_ID: 111 + : + PC_PHYS_PORT_ID: 205 + ? + PORT_ID: 112 + : + PC_PHYS_PORT_ID: 209 + ? + PORT_ID: 113 + : + PC_PHYS_PORT_ID: 213 + ? + PORT_ID: 114 + : + PC_PHYS_PORT_ID: 217 + ? + PORT_ID: 115 + : + PC_PHYS_PORT_ID: 221 + ? + PORT_ID: 126 + : + PC_PHYS_PORT_ID: 225 + ? + PORT_ID: 127 + : + PC_PHYS_PORT_ID: 229 + ? + PORT_ID: 128 + : + PC_PHYS_PORT_ID: 233 + ? + PORT_ID: 129 + : + PC_PHYS_PORT_ID: 237 + ? + PORT_ID: 130 + : + PC_PHYS_PORT_ID: 241 + ? + PORT_ID: 131 + : + PC_PHYS_PORT_ID: 245 + ? + PORT_ID: 132 + : + PC_PHYS_PORT_ID: 249 + ? + PORT_ID: 133 + : + PC_PHYS_PORT_ID: 253 + ? + PORT_ID: 144 + : + PC_PHYS_PORT_ID: 257 + ? + PORT_ID: 145 + : + PC_PHYS_PORT_ID: 261 + ? + PORT_ID: 146 + : + PC_PHYS_PORT_ID: 265 + ? + PORT_ID: 147 + : + PC_PHYS_PORT_ID: 269 + ? + PORT_ID: 148 + : + PC_PHYS_PORT_ID: 273 + ? + PORT_ID: 149 + : + PC_PHYS_PORT_ID: 277 + ? + PORT_ID: 150 + : + PC_PHYS_PORT_ID: 281 + ? + PORT_ID: 151 + : + PC_PHYS_PORT_ID: 285 + ? + PORT_ID: 162 + : + PC_PHYS_PORT_ID: 289 + ? + PORT_ID: 163 + : + PC_PHYS_PORT_ID: 293 + ? + PORT_ID: 164 + : + PC_PHYS_PORT_ID: 297 + ? + PORT_ID: 165 + : + PC_PHYS_PORT_ID: 301 + ? + PORT_ID: 166 + : + PC_PHYS_PORT_ID: 305 + ? + PORT_ID: 167 + : + PC_PHYS_PORT_ID: 309 + ? + PORT_ID: 168 + : + PC_PHYS_PORT_ID: 313 + ? + PORT_ID: 169 + : + PC_PHYS_PORT_ID: 317 + ? + PORT_ID: 180 + : + PC_PHYS_PORT_ID: 321 + ? + PORT_ID: 181 + : + PC_PHYS_PORT_ID: 325 + ? + PORT_ID: 182 + : + PC_PHYS_PORT_ID: 329 + ? + PORT_ID: 183 + : + PC_PHYS_PORT_ID: 333 + ? + PORT_ID: 184 + : + PC_PHYS_PORT_ID: 337 + ? + PORT_ID: 185 + : + PC_PHYS_PORT_ID: 341 + ? + PORT_ID: 186 + : + PC_PHYS_PORT_ID: 345 + ? + PORT_ID: 187 + : + PC_PHYS_PORT_ID: 349 + ? + PORT_ID: 198 + : + PC_PHYS_PORT_ID: 353 + ? + PORT_ID: 199 + : + PC_PHYS_PORT_ID: 357 + ? + PORT_ID: 200 + : + PC_PHYS_PORT_ID: 361 + ? + PORT_ID: 201 + : + PC_PHYS_PORT_ID: 365 + ? + PORT_ID: 202 + : + PC_PHYS_PORT_ID: 369 + ? + PORT_ID: 203 + : + PC_PHYS_PORT_ID: 373 + ? + PORT_ID: 204 + : + PC_PHYS_PORT_ID: 377 + ? + PORT_ID: 205 + : + PC_PHYS_PORT_ID: 381 + ? + PORT_ID: 216 + : + PC_PHYS_PORT_ID: 385 + ? + PORT_ID: 217 + : + PC_PHYS_PORT_ID: 389 + ? + PORT_ID: 218 + : + PC_PHYS_PORT_ID: 393 + ? + PORT_ID: 219 + : + PC_PHYS_PORT_ID: 397 + ? + PORT_ID: 220 + : + PC_PHYS_PORT_ID: 401 + ? + PORT_ID: 221 + : + PC_PHYS_PORT_ID: 405 + ? + PORT_ID: 222 + : + PC_PHYS_PORT_ID: 409 + ? + PORT_ID: 223 + : + PC_PHYS_PORT_ID: 413 + ? + PORT_ID: 234 + : + PC_PHYS_PORT_ID: 417 + ? + PORT_ID: 235 + : + PC_PHYS_PORT_ID: 421 + ? + PORT_ID: 236 + : + PC_PHYS_PORT_ID: 425 + ? + PORT_ID: 237 + : + PC_PHYS_PORT_ID: 429 + ? + PORT_ID: 238 + : + PC_PHYS_PORT_ID: 433 + ? + PORT_ID: 239 + : + PC_PHYS_PORT_ID: 437 + ? + PORT_ID: 240 + : + PC_PHYS_PORT_ID: 441 + ? + PORT_ID: 241 + : + PC_PHYS_PORT_ID: 445 + ? + PORT_ID: 252 + : + PC_PHYS_PORT_ID: 449 + ? + PORT_ID: 253 + : + PC_PHYS_PORT_ID: 453 + ? + PORT_ID: 254 + : + PC_PHYS_PORT_ID: 457 + ? + PORT_ID: 255 + : + PC_PHYS_PORT_ID: 461 + ? + PORT_ID: 256 + : + PC_PHYS_PORT_ID: 465 + ? + PORT_ID: 257 + : + PC_PHYS_PORT_ID: 469 + ? + PORT_ID: 258 + : + PC_PHYS_PORT_ID: 473 + ? + PORT_ID: 259 + : + PC_PHYS_PORT_ID: 477 + ? + PORT_ID: 270 + : + PC_PHYS_PORT_ID: 481 + ? + PORT_ID: 271 + : + PC_PHYS_PORT_ID: 485 + ? + PORT_ID: 272 + : + PC_PHYS_PORT_ID: 489 + ? + PORT_ID: 273 + : + PC_PHYS_PORT_ID: 493 + ? + PORT_ID: 274 + : + PC_PHYS_PORT_ID: 497 + ? + PORT_ID: 275 + : + PC_PHYS_PORT_ID: 501 + ? + PORT_ID: 276 + : + PC_PHYS_PORT_ID: 505 + ? + PORT_ID: 277 + : + PC_PHYS_PORT_ID: 509 + ? + PORT_ID: 288 + : + PC_PHYS_PORT_ID: 513 + ? + PORT_ID: 289 + : + PC_PHYS_PORT_ID: 517 + ? + PORT_ID: 290 + : + PC_PHYS_PORT_ID: 521 + ? + PORT_ID: 291 + : + PC_PHYS_PORT_ID: 525 + ? + PORT_ID: 292 + : + PC_PHYS_PORT_ID: 529 + ? + PORT_ID: 293 + : + PC_PHYS_PORT_ID: 533 + ? + PORT_ID: 294 + : + PC_PHYS_PORT_ID: 537 + ? + PORT_ID: 295 + : + PC_PHYS_PORT_ID: 541 + ? + PORT_ID: 306 + : + PC_PHYS_PORT_ID: 545 + ? + PORT_ID: 307 + : + PC_PHYS_PORT_ID: 549 + ? + PORT_ID: 308 + : + PC_PHYS_PORT_ID: 553 + ? + PORT_ID: 309 + : + PC_PHYS_PORT_ID: 557 + ? + PORT_ID: 310 + : + PC_PHYS_PORT_ID: 561 + ? + PORT_ID: 311 + : + PC_PHYS_PORT_ID: 565 + ? + PORT_ID: 312 + : + PC_PHYS_PORT_ID: 569 + ? + PORT_ID: 313 + : + PC_PHYS_PORT_ID: 573 + ? + PORT_ID: 324 + : + PC_PHYS_PORT_ID: 577 + ? + PORT_ID: 325 + : + PC_PHYS_PORT_ID: 581 + ? + PORT_ID: 326 + : + PC_PHYS_PORT_ID: 585 + ? + PORT_ID: 327 + : + PC_PHYS_PORT_ID: 589 + ? + PORT_ID: 328 + : + PC_PHYS_PORT_ID: 593 + ? + PORT_ID: 329 + : + PC_PHYS_PORT_ID: 597 + ? + PORT_ID: 330 + : + PC_PHYS_PORT_ID: 601 + ? + PORT_ID: 331 + : + PC_PHYS_PORT_ID: 605 + ? + PORT_ID: 342 + : + PC_PHYS_PORT_ID: 609 + ? + PORT_ID: 343 + : + PC_PHYS_PORT_ID: 613 + ? + PORT_ID: 344 + : + PC_PHYS_PORT_ID: 617 + ? + PORT_ID: 345 + : + PC_PHYS_PORT_ID: 621 + ? + PORT_ID: 346 + : + PC_PHYS_PORT_ID: 625 + ? + PORT_ID: 347 + : + PC_PHYS_PORT_ID: 629 + ? + PORT_ID: 348 + : + PC_PHYS_PORT_ID: 633 + ? + PORT_ID: 349 + : + PC_PHYS_PORT_ID: 637 + ? + PORT_ID: 360 + : + PC_PHYS_PORT_ID: 641 + ? + PORT_ID: 361 + : + PC_PHYS_PORT_ID: 645 + ? + PORT_ID: 362 + : + PC_PHYS_PORT_ID: 649 + ? + PORT_ID: 363 + : + PC_PHYS_PORT_ID: 653 + ? + PORT_ID: 364 + : + PC_PHYS_PORT_ID: 657 + ? + PORT_ID: 365 + : + PC_PHYS_PORT_ID: 661 + ? + PORT_ID: 366 + : + PC_PHYS_PORT_ID: 665 + ? + PORT_ID: 367 + : + PC_PHYS_PORT_ID: 669 + ? + PORT_ID: 378 + : + PC_PHYS_PORT_ID: 673 + ? + PORT_ID: 379 + : + PC_PHYS_PORT_ID: 677 + ? + PORT_ID: 380 + : + PC_PHYS_PORT_ID: 681 + ? + PORT_ID: 381 + : + PC_PHYS_PORT_ID: 685 + ? + PORT_ID: 382 + : + PC_PHYS_PORT_ID: 689 + ? + PORT_ID: 383 + : + PC_PHYS_PORT_ID: 693 + ? + PORT_ID: 384 + : + PC_PHYS_PORT_ID: 697 + ? + PORT_ID: 385 + : + PC_PHYS_PORT_ID: 701 + ? + PORT_ID: 396 + : + PC_PHYS_PORT_ID: 705 + ? + PORT_ID: 397 + : + PC_PHYS_PORT_ID: 709 + ? + PORT_ID: 398 + : + PC_PHYS_PORT_ID: 713 + ? + PORT_ID: 399 + : + PC_PHYS_PORT_ID: 717 + ? + PORT_ID: 400 + : + PC_PHYS_PORT_ID: 721 + ? + PORT_ID: 401 + : + PC_PHYS_PORT_ID: 725 + ? + PORT_ID: 402 + : + PC_PHYS_PORT_ID: 729 + ? + PORT_ID: 403 + : + PC_PHYS_PORT_ID: 733 + ? + PORT_ID: 414 + : + PC_PHYS_PORT_ID: 737 + ? + PORT_ID: 415 + : + PC_PHYS_PORT_ID: 741 + ? + PORT_ID: 416 + : + PC_PHYS_PORT_ID: 745 + ? + PORT_ID: 417 + : + PC_PHYS_PORT_ID: 749 + ? + PORT_ID: 418 + : + PC_PHYS_PORT_ID: 753 + ? + PORT_ID: 419 + : + PC_PHYS_PORT_ID: 757 + ? + PORT_ID: 420 + : + PC_PHYS_PORT_ID: 761 + ? + PORT_ID: 421 + : + PC_PHYS_PORT_ID: 765 + ? + PORT_ID: 432 + : + PC_PHYS_PORT_ID: 769 + ? + PORT_ID: 433 + : + PC_PHYS_PORT_ID: 773 + ? + PORT_ID: 434 + : + PC_PHYS_PORT_ID: 777 + ? + PORT_ID: 435 + : + PC_PHYS_PORT_ID: 781 + ? + PORT_ID: 436 + : + PC_PHYS_PORT_ID: 785 + ? + PORT_ID: 437 + : + PC_PHYS_PORT_ID: 789 + ? + PORT_ID: 438 + : + PC_PHYS_PORT_ID: 793 + ? + PORT_ID: 439 + : + PC_PHYS_PORT_ID: 797 + ? + PORT_ID: 450 + : + PC_PHYS_PORT_ID: 801 + ? + PORT_ID: 451 + : + PC_PHYS_PORT_ID: 805 + ? + PORT_ID: 452 + : + PC_PHYS_PORT_ID: 809 + ? + PORT_ID: 453 + : + PC_PHYS_PORT_ID: 813 + ? + PORT_ID: 454 + : + PC_PHYS_PORT_ID: 817 + ? + PORT_ID: 455 + : + PC_PHYS_PORT_ID: 821 + ? + PORT_ID: 456 + : + PC_PHYS_PORT_ID: 825 + ? + PORT_ID: 457 + : + PC_PHYS_PORT_ID: 829 + ? + PORT_ID: 468 + : + PC_PHYS_PORT_ID: 833 + ? + PORT_ID: 469 + : + PC_PHYS_PORT_ID: 837 + ? + PORT_ID: 470 + : + PC_PHYS_PORT_ID: 841 + ? + PORT_ID: 471 + : + PC_PHYS_PORT_ID: 845 + ? + PORT_ID: 472 + : + PC_PHYS_PORT_ID: 849 + ? + PORT_ID: 473 + : + PC_PHYS_PORT_ID: 853 + ? + PORT_ID: 474 + : + PC_PHYS_PORT_ID: 857 + ? + PORT_ID: 475 + : + PC_PHYS_PORT_ID: 861 + ? + PORT_ID: 486 + : + PC_PHYS_PORT_ID: 865 + ? + PORT_ID: 487 + : + PC_PHYS_PORT_ID: 869 + ? + PORT_ID: 488 + : + PC_PHYS_PORT_ID: 873 + ? + PORT_ID: 489 + : + PC_PHYS_PORT_ID: 877 + ? + PORT_ID: 490 + : + PC_PHYS_PORT_ID: 881 + ? + PORT_ID: 491 + : + PC_PHYS_PORT_ID: 885 + ? + PORT_ID: 492 + : + PC_PHYS_PORT_ID: 889 + ? + PORT_ID: 493 + : + PC_PHYS_PORT_ID: 893 + ? + PORT_ID: 504 + : + PC_PHYS_PORT_ID: 897 + ? + PORT_ID: 505 + : + PC_PHYS_PORT_ID: 901 + ? + PORT_ID: 506 + : + PC_PHYS_PORT_ID: 905 + ? + PORT_ID: 507 + : + PC_PHYS_PORT_ID: 909 + ? + PORT_ID: 508 + : + PC_PHYS_PORT_ID: 913 + ? + PORT_ID: 509 + : + PC_PHYS_PORT_ID: 917 + ? + PORT_ID: 510 + : + PC_PHYS_PORT_ID: 921 + ? + PORT_ID: 511 + : + PC_PHYS_PORT_ID: 925 + ? + PORT_ID: 522 + : + PC_PHYS_PORT_ID: 929 + ? + PORT_ID: 523 + : + PC_PHYS_PORT_ID: 933 + ? + PORT_ID: 524 + : + PC_PHYS_PORT_ID: 937 + ? + PORT_ID: 525 + : + PC_PHYS_PORT_ID: 941 + ? + PORT_ID: 526 + : + PC_PHYS_PORT_ID: 945 + ? + PORT_ID: 527 + : + PC_PHYS_PORT_ID: 949 + ? + PORT_ID: 528 + : + PC_PHYS_PORT_ID: 953 + ? + PORT_ID: 529 + : + PC_PHYS_PORT_ID: 957 + ? + PORT_ID: 540 + : + PC_PHYS_PORT_ID: 961 + ? + PORT_ID: 541 + : + PC_PHYS_PORT_ID: 965 + ? + PORT_ID: 542 + : + PC_PHYS_PORT_ID: 969 + ? + PORT_ID: 543 + : + PC_PHYS_PORT_ID: 973 + ? + PORT_ID: 544 + : + PC_PHYS_PORT_ID: 977 + ? + PORT_ID: 545 + : + PC_PHYS_PORT_ID: 981 + ? + PORT_ID: 546 + : + PC_PHYS_PORT_ID: 985 + ? + PORT_ID: 547 + : + PC_PHYS_PORT_ID: 989 + ? + PORT_ID: 558 + : + PC_PHYS_PORT_ID: 993 + ? + PORT_ID: 559 + : + PC_PHYS_PORT_ID: 997 + ? + PORT_ID: 560 + : + PC_PHYS_PORT_ID: 1001 + ? + PORT_ID: 561 + : + PC_PHYS_PORT_ID: 1005 + ? + PORT_ID: 562 + : + PC_PHYS_PORT_ID: 1009 + ? + PORT_ID: 563 + : + PC_PHYS_PORT_ID: 1013 + ? + PORT_ID: 564 + : + PC_PHYS_PORT_ID: 1017 + ? + PORT_ID: 565 + : + PC_PHYS_PORT_ID: 1021 + ? + PORT_ID: 268 + : + PC_PHYS_PORT_ID: 1026 +... +--- +device: + 0: + PC_PORT: + ? + PORT_ID: 0 + : + ENABLE: 1 + SPEED: 10000 + NUM_LANES: 1 + FEC_MODE: PC_FEC_NONE + ? + PORT_ID: 268 + : + ENABLE: 0 + SPEED: 100000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS528 + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: [[1, 8], + [18, 25], + [36, 43], + [54, 61], + [72, 79], + [90, 97], + [108, 115], + [126, 133], + [144, 151], + [162, 169], + [180, 187], + [198, 205], + [216, 223], + [234, 241], + [252, 259], + [270, 277], + [288, 295], + [306, 313], + [324, 331], + [342, 349], + [360, 367], + [378, 385], + [396, 403], + [414, 421], + [432, 439], + [450, 457], + [468, 475], + [486, 493], + [504, 511], + [522, 529], + [540, 547], + [558, 565]] + : + ENABLE: 0 + SPEED: 400000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS544_2XN + MAX_FRAME_SIZE: 9416 +... +--- +device: + 0: + DEVICE_CONFIG: + AUTOLOAD_BOARD_SETTINGS: 0 +... +--- +device: + '*': + TM_SCHEDULER_CONFIG: + NUM_MC_Q: NUM_MC_Q_4 +... +--- +device: + 0: + # Per pipe flex counter configuration. Enable PPIU Mode + CTR_EFLEX_CONFIG: + CTR_ING_EFLEX_OPERMODE_PIPEUNIQUE: 1 + CTR_ING_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1 + CTR_EGR_EFLEX_OPERMODE_PIPEUNIQUE: 1 + CTR_EGR_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1 + + # IFP mode + FP_CONFIG: + FP_ING_OPERMODE: GLOBAL_PIPE_AWARE + + #CTR COS_ENABLE + CTR_ING_COS_Q_CONFIG: + COS_ENABLE: 0 +... +--- +device: + 0: + TM_ING_PORT_PRI_GRP: + ? + PORT_ID: [[1, 8], + [18, 25], + [36, 43], + [54, 61], + [72, 79], + [90, 97], + [108, 115], + [126, 133], + [144, 151], + [162, 169], + [180, 187], + [198, 205], + [216, 223], + [234, 241], + [252, 259], + [270, 277], + [288, 295], + [306, 313], + [324, 331], + [342, 349], + [360, 367], + [378, 385], + [396, 403], + [414, 421], + [432, 439], + [450, 457], + [468, 475], + [486, 493], + [504, 511], + [522, 529], + [540, 547], + [558, 565]] + TM_PRI_GRP_ID: [3,4] + : + PFC: 1 + LOSSLESS: 1 +... diff --git a/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/Nokia-IXR7220-H6-O256/hwsku.json b/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/Nokia-IXR7220-H6-O256/hwsku.json new file mode 100644 index 00000000000..a9edee53ff7 --- /dev/null +++ b/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/Nokia-IXR7220-H6-O256/hwsku.json @@ -0,0 +1,391 @@ +{ + "interfaces": { + "Ethernet0": { + "default_brkout_mode": "2x400G" + }, + "Ethernet8": { + "default_brkout_mode": "2x400G" + }, + "Ethernet16": { + "default_brkout_mode": "2x400G" + }, + "Ethernet24": { + "default_brkout_mode": "2x400G" + }, + "Ethernet32": { + "default_brkout_mode": "2x400G" + }, + "Ethernet40": { + "default_brkout_mode": "2x400G" + }, + "Ethernet48": { + "default_brkout_mode": "2x400G" + }, + "Ethernet56": { + "default_brkout_mode": "2x400G" + }, + "Ethernet64": { + "default_brkout_mode": "2x400G" + }, + "Ethernet72": { + "default_brkout_mode": "2x400G" + }, + "Ethernet80": { + "default_brkout_mode": "2x400G" + }, + "Ethernet88": { + "default_brkout_mode": "2x400G" + }, + "Ethernet96": { + "default_brkout_mode": "2x400G" + }, + "Ethernet104": { + "default_brkout_mode": "2x400G" + }, + "Ethernet112": { + "default_brkout_mode": "2x400G" + }, + "Ethernet120": { + "default_brkout_mode": "2x400G" + }, + "Ethernet128": { + "default_brkout_mode": "2x400G" + }, + "Ethernet136": { + "default_brkout_mode": "2x400G" + }, + "Ethernet144": { + "default_brkout_mode": "2x400G" + }, + "Ethernet152": { + "default_brkout_mode": "2x400G" + }, + "Ethernet160": { + "default_brkout_mode": "2x400G" + }, + "Ethernet168": { + "default_brkout_mode": "2x400G" + }, + "Ethernet176": { + "default_brkout_mode": "2x400G" + }, + "Ethernet184": { + "default_brkout_mode": "2x400G" + }, + "Ethernet192": { + "default_brkout_mode": "2x400G" + }, + "Ethernet200": { + "default_brkout_mode": "2x400G" + }, + "Ethernet208": { + "default_brkout_mode": "2x400G" + }, + "Ethernet216": { + "default_brkout_mode": "2x400G" + }, + "Ethernet224": { + "default_brkout_mode": "2x400G" + }, + "Ethernet232": { + "default_brkout_mode": "2x400G" + }, + "Ethernet240": { + "default_brkout_mode": "2x400G" + }, + "Ethernet248": { + "default_brkout_mode": "2x400G" + }, + "Ethernet256": { + "default_brkout_mode": "2x400G" + }, + "Ethernet264": { + "default_brkout_mode": "2x400G" + }, + "Ethernet272": { + "default_brkout_mode": "2x400G" + }, + "Ethernet280": { + "default_brkout_mode": "2x400G" + }, + "Ethernet288": { + "default_brkout_mode": "2x400G" + }, + "Ethernet296": { + "default_brkout_mode": "2x400G" + }, + "Ethernet304": { + "default_brkout_mode": "2x400G" + }, + "Ethernet312": { + "default_brkout_mode": "2x400G" + }, + "Ethernet320": { + "default_brkout_mode": "2x400G" + }, + "Ethernet328": { + "default_brkout_mode": "2x400G" + }, + "Ethernet336": { + "default_brkout_mode": "2x400G" + }, + "Ethernet344": { + "default_brkout_mode": "2x400G" + }, + "Ethernet352": { + "default_brkout_mode": "2x400G" + }, + "Ethernet360": { + "default_brkout_mode": "2x400G" + }, + "Ethernet368": { + "default_brkout_mode": "2x400G" + }, + "Ethernet376": { + "default_brkout_mode": "2x400G" + }, + "Ethernet384": { + "default_brkout_mode": "2x400G" + }, + "Ethernet392": { + "default_brkout_mode": "2x400G" + }, + "Ethernet400": { + "default_brkout_mode": "2x400G" + }, + "Ethernet408": { + "default_brkout_mode": "2x400G" + }, + "Ethernet416": { + "default_brkout_mode": "2x400G" + }, + "Ethernet424": { + "default_brkout_mode": "2x400G" + }, + "Ethernet432": { + "default_brkout_mode": "2x400G" + }, + "Ethernet440": { + "default_brkout_mode": "2x400G" + }, + "Ethernet448": { + "default_brkout_mode": "2x400G" + }, + "Ethernet456": { + "default_brkout_mode": "2x400G" + }, + "Ethernet464": { + "default_brkout_mode": "2x400G" + }, + "Ethernet472": { + "default_brkout_mode": "2x400G" + }, + "Ethernet480": { + "default_brkout_mode": "2x400G" + }, + "Ethernet488": { + "default_brkout_mode": "2x400G" + }, + "Ethernet496": { + "default_brkout_mode": "2x400G" + }, + "Ethernet504": { + "default_brkout_mode": "2x400G" + }, + "Ethernet512": { + "default_brkout_mode": "2x400G" + }, + "Ethernet520": { + "default_brkout_mode": "2x400G" + }, + "Ethernet528": { + "default_brkout_mode": "2x400G" + }, + "Ethernet536": { + "default_brkout_mode": "2x400G" + }, + "Ethernet544": { + "default_brkout_mode": "2x400G" + }, + "Ethernet552": { + "default_brkout_mode": "2x400G" + }, + "Ethernet560": { + "default_brkout_mode": "2x400G" + }, + "Ethernet568": { + "default_brkout_mode": "2x400G" + }, + "Ethernet576": { + "default_brkout_mode": "2x400G" + }, + "Ethernet584": { + "default_brkout_mode": "2x400G" + }, + "Ethernet592": { + "default_brkout_mode": "2x400G" + }, + "Ethernet600": { + "default_brkout_mode": "2x400G" + }, + "Ethernet608": { + "default_brkout_mode": "2x400G" + }, + "Ethernet616": { + "default_brkout_mode": "2x400G" + }, + "Ethernet624": { + "default_brkout_mode": "2x400G" + }, + "Ethernet632": { + "default_brkout_mode": "2x400G" + }, + "Ethernet640": { + "default_brkout_mode": "2x400G" + }, + "Ethernet648": { + "default_brkout_mode": "2x400G" + }, + "Ethernet656": { + "default_brkout_mode": "2x400G" + }, + "Ethernet664": { + "default_brkout_mode": "2x400G" + }, + "Ethernet672": { + "default_brkout_mode": "2x400G" + }, + "Ethernet680": { + "default_brkout_mode": "2x400G" + }, + "Ethernet688": { + "default_brkout_mode": "2x400G" + }, + "Ethernet696": { + "default_brkout_mode": "2x400G" + }, + "Ethernet704": { + "default_brkout_mode": "2x400G" + }, + "Ethernet712": { + "default_brkout_mode": "2x400G" + }, + "Ethernet720": { + "default_brkout_mode": "2x400G" + }, + "Ethernet728": { + "default_brkout_mode": "2x400G" + }, + "Ethernet736": { + "default_brkout_mode": "2x400G" + }, + "Ethernet744": { + "default_brkout_mode": "2x400G" + }, + "Ethernet752": { + "default_brkout_mode": "2x400G" + }, + "Ethernet760": { + "default_brkout_mode": "2x400G" + }, + "Ethernet768": { + "default_brkout_mode": "2x400G" + }, + "Ethernet776": { + "default_brkout_mode": "2x400G" + }, + "Ethernet784": { + "default_brkout_mode": "2x400G" + }, + "Ethernet792": { + "default_brkout_mode": "2x400G" + }, + "Ethernet800": { + "default_brkout_mode": "2x400G" + }, + "Ethernet808": { + "default_brkout_mode": "2x400G" + }, + "Ethernet816": { + "default_brkout_mode": "2x400G" + }, + "Ethernet824": { + "default_brkout_mode": "2x400G" + }, + "Ethernet832": { + "default_brkout_mode": "2x400G" + }, + "Ethernet840": { + "default_brkout_mode": "2x400G" + }, + "Ethernet848": { + "default_brkout_mode": "2x400G" + }, + "Ethernet856": { + "default_brkout_mode": "2x400G" + }, + "Ethernet864": { + "default_brkout_mode": "2x400G" + }, + "Ethernet872": { + "default_brkout_mode": "2x400G" + }, + "Ethernet880": { + "default_brkout_mode": "2x400G" + }, + "Ethernet888": { + "default_brkout_mode": "2x400G" + }, + "Ethernet896": { + "default_brkout_mode": "2x400G" + }, + "Ethernet904": { + "default_brkout_mode": "2x400G" + }, + "Ethernet912": { + "default_brkout_mode": "2x400G" + }, + "Ethernet920": { + "default_brkout_mode": "2x400G" + }, + "Ethernet928": { + "default_brkout_mode": "2x400G" + }, + "Ethernet936": { + "default_brkout_mode": "2x400G" + }, + "Ethernet944": { + "default_brkout_mode": "2x400G" + }, + "Ethernet952": { + "default_brkout_mode": "2x400G" + }, + "Ethernet960": { + "default_brkout_mode": "2x400G" + }, + "Ethernet968": { + "default_brkout_mode": "2x400G" + }, + "Ethernet976": { + "default_brkout_mode": "2x400G" + }, + "Ethernet984": { + "default_brkout_mode": "2x400G" + }, + "Ethernet992": { + "default_brkout_mode": "2x400G" + }, + "Ethernet1000": { + "default_brkout_mode": "2x400G" + }, + "Ethernet1008": { + "default_brkout_mode": "2x400G" + }, + "Ethernet1016": { + "default_brkout_mode": "2x400G" + }, + "Ethernet1024": { + "default_brkout_mode": "1x100G" + } + } +} diff --git a/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/Nokia-IXR7220-H6-O256/pg_profile_lookup.ini b/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/Nokia-IXR7220-H6-O256/pg_profile_lookup.ini new file mode 100644 index 00000000000..6c81abf0f60 --- /dev/null +++ b/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/Nokia-IXR7220-H6-O256/pg_profile_lookup.ini @@ -0,0 +1,43 @@ +# PG lossless profiles. +# TH6: cell size = 420 bytes +# speed cable size xon xoff threshold xon_offset + 10000 5m 8400 0 54180 0 4200 + 25000 5m 8400 0 80220 0 4200 + 40000 5m 8400 0 100380 0 4200 + 50000 5m 8400 0 135660 0 4200 + 100000 5m 8400 0 125580 0 4200 + 200000 5m 8400 0 261660 0 4200 + 400000 5m 8400 0 464520 0 4200 + 800000 5m 8400 0 797580 0 4200 + 10000 30m 8400 0 55860 0 4200 + 25000 30m 8400 0 80220 0 4200 + 40000 30m 8400 0 105840 0 4200 + 50000 30m 8400 0 141960 0 4200 + 100000 30m 8400 0 130200 0 4200 + 200000 30m 8400 0 270900 0 4200 + 400000 30m 8400 0 483420 0 4200 + 800000 30m 8400 0 835380 0 4200 + 10000 40m 8400 0 56280 0 4200 + 25000 40m 8400 0 80220 0 4200 + 40000 40m 8400 0 107940 0 4200 + 50000 40m 8400 0 144480 0 4200 + 100000 40m 8400 0 131880 0 4200 + 200000 40m 8400 0 274260 0 4200 + 400000 40m 8400 0 490980 0 4200 + 800000 40m 8400 0 850080 0 4200 + 10000 300m 8400 0 69300 0 4200 + 25000 300m 8400 0 119280 0 4200 + 40000 300m 8400 0 162540 0 4200 + 50000 300m 8400 0 212940 0 4200 + 100000 300m 8400 0 180180 0 4200 + 200000 300m 8400 0 371700 0 4200 + 400000 300m 8400 0 686280 0 4200 + 800000 300m 8400 0 1239840 0 4200 + 10000 500m 8400 0 79380 0 4200 + 25000 500m 8400 0 149520 0 4200 + 40000 500m 8400 0 204540 0 4200 + 50000 500m 8400 0 265860 0 4200 + 100000 500m 8400 0 217560 0 4200 + 200000 500m 8400 0 446880 0 4200 + 400000 500m 8400 0 836640 0 4200 + 800000 500m 8400 0 1539720 0 4200 diff --git a/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/Nokia-IXR7220-H6-O256/port_config.ini b/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/Nokia-IXR7220-H6-O256/port_config.ini new file mode 100644 index 00000000000..25e0446f1ff --- /dev/null +++ b/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/Nokia-IXR7220-H6-O256/port_config.ini @@ -0,0 +1,258 @@ +# name lanes alias index speed fec +Ethernet0 153,154,155,156 etp1a 1 400000 rs +Ethernet4 157,158,159,160 etp1b 1 400000 rs +Ethernet8 161,162,163,164 etp2a 2 400000 rs +Ethernet12 165,166,167,168 etp2b 2 400000 rs +Ethernet16 145,146,147,148 etp3a 3 400000 rs +Ethernet20 149,150,151,152 etp3b 3 400000 rs +Ethernet24 129,130,131,132 etp4a 4 400000 rs +Ethernet28 133,134,135,136 etp4b 4 400000 rs +Ethernet32 137,138,139,140 etp5a 5 400000 rs +Ethernet36 141,142,143,144 etp5b 5 400000 rs +Ethernet40 169,170,171,172 etp6a 6 400000 rs +Ethernet44 173,174,175,176 etp6b 6 400000 rs +Ethernet48 177,178,179,180 etp7a 7 400000 rs +Ethernet52 181,182,183,184 etp7b 7 400000 rs +Ethernet56 185,186,187,188 etp8a 8 400000 rs +Ethernet60 189,190,191,192 etp8b 8 400000 rs +Ethernet64 225,226,227,228 etp9a 9 400000 rs +Ethernet68 229,230,231,232 etp9b 9 400000 rs +Ethernet72 217,218,219,220 etp10a 10 400000 rs +Ethernet76 221,222,223,224 etp10b 10 400000 rs +Ethernet80 193,194,195,196 etp11a 11 400000 rs +Ethernet84 197,198,199,200 etp11b 11 400000 rs +Ethernet88 209,210,211,212 etp12a 12 400000 rs +Ethernet92 213,214,215,216 etp12b 12 400000 rs +Ethernet96 233,234,235,236 etp13a 13 400000 rs +Ethernet100 237,238,239,240 etp13b 13 400000 rs +Ethernet104 201,202,203,204 etp14a 14 400000 rs +Ethernet108 205,206,207,208 etp14b 14 400000 rs +Ethernet112 249,250,251,252 etp15a 15 400000 rs +Ethernet116 253,254,255,256 etp15b 15 400000 rs +Ethernet120 241,242,243,244 etp16a 16 400000 rs +Ethernet124 245,246,247,248 etp16b 16 400000 rs +Ethernet128 817,818,819,820 etp17a 17 400000 rs +Ethernet132 821,822,823,824 etp17b 17 400000 rs +Ethernet136 825,826,827,828 etp18a 18 400000 rs +Ethernet140 829,830,831,832 etp18b 18 400000 rs +Ethernet144 777,778,779,780 etp19a 19 400000 rs +Ethernet148 781,782,783,784 etp19b 19 400000 rs +Ethernet152 809,810,811,812 etp20a 20 400000 rs +Ethernet156 813,814,815,816 etp20b 20 400000 rs +Ethernet160 785,786,787,788 etp21a 21 400000 rs +Ethernet164 789,790,791,792 etp21b 21 400000 rs +Ethernet168 769,770,771,772 etp22a 22 400000 rs +Ethernet172 773,774,775,776 etp22b 22 400000 rs +Ethernet176 793,794,795,796 etp23a 23 400000 rs +Ethernet180 797,798,799,800 etp23b 23 400000 rs +Ethernet184 801,802,803,804 etp24a 24 400000 rs +Ethernet188 805,806,807,808 etp24b 24 400000 rs +Ethernet192 889,890,891,892 etp25a 25 400000 rs +Ethernet196 893,894,895,896 etp25b 25 400000 rs +Ethernet200 881,882,883,884 etp26a 26 400000 rs +Ethernet204 885,886,887,888 etp26b 26 400000 rs +Ethernet208 873,874,875,876 etp27a 27 400000 rs +Ethernet212 877,878,879,880 etp27b 27 400000 rs +Ethernet216 841,842,843,844 etp28a 28 400000 rs +Ethernet220 845,846,847,848 etp28b 28 400000 rs +Ethernet224 833,834,835,836 etp29a 29 400000 rs +Ethernet228 837,838,839,840 etp29b 29 400000 rs +Ethernet232 849,850,851,852 etp30a 30 400000 rs +Ethernet236 853,854,855,856 etp30b 30 400000 rs +Ethernet240 865,866,867,868 etp31a 31 400000 rs +Ethernet244 869,870,871,872 etp31b 31 400000 rs +Ethernet248 857,858,859,860 etp32a 32 400000 rs +Ethernet252 861,862,863,864 etp32b 32 400000 rs +Ethernet256 289,290,291,292 etp33a 33 400000 rs +Ethernet260 293,294,295,296 etp33b 33 400000 rs +Ethernet264 257,258,259,260 etp34a 34 400000 rs +Ethernet268 261,262,263,264 etp34b 34 400000 rs +Ethernet272 297,298,299,300 etp35a 35 400000 rs +Ethernet276 301,302,303,304 etp35b 35 400000 rs +Ethernet280 313,314,315,316 etp36a 36 400000 rs +Ethernet284 317,318,319,320 etp36b 36 400000 rs +Ethernet288 369,370,371,372 etp37a 37 400000 rs +Ethernet292 373,374,375,376 etp37b 37 400000 rs +Ethernet296 329,330,331,332 etp38a 38 400000 rs +Ethernet300 333,334,335,336 etp38b 38 400000 rs +Ethernet304 337,338,339,340 etp39a 39 400000 rs +Ethernet308 341,342,343,344 etp39b 39 400000 rs +Ethernet312 345,346,347,348 etp40a 40 400000 rs +Ethernet316 349,350,351,352 etp40b 40 400000 rs +Ethernet320 417,418,419,420 etp41a 41 400000 rs +Ethernet324 421,422,423,424 etp41b 41 400000 rs +Ethernet328 385,386,387,388 etp42a 42 400000 rs +Ethernet332 389,390,391,392 etp42b 42 400000 rs +Ethernet336 425,426,427,428 etp43a 43 400000 rs +Ethernet340 429,430,431,432 etp43b 43 400000 rs +Ethernet344 441,442,443,444 etp44a 44 400000 rs +Ethernet348 445,446,447,448 etp44b 44 400000 rs +Ethernet352 497,498,499,500 etp45a 45 400000 rs +Ethernet356 501,502,503,504 etp45b 45 400000 rs +Ethernet360 457,458,459,460 etp46a 46 400000 rs +Ethernet364 461,462,463,464 etp46b 46 400000 rs +Ethernet368 465,466,467,468 etp47a 47 400000 rs +Ethernet372 469,470,471,472 etp47b 47 400000 rs +Ethernet376 473,474,475,476 etp48a 48 400000 rs +Ethernet380 477,478,479,480 etp48b 48 400000 rs +Ethernet384 545,546,547,548 etp49a 49 400000 rs +Ethernet388 549,550,551,552 etp49b 49 400000 rs +Ethernet392 513,514,515,516 etp50a 50 400000 rs +Ethernet396 517,518,519,520 etp50b 50 400000 rs +Ethernet400 553,554,555,556 etp51a 51 400000 rs +Ethernet404 557,558,559,560 etp51b 51 400000 rs +Ethernet408 569,570,571,572 etp52a 52 400000 rs +Ethernet412 573,574,575,576 etp52b 52 400000 rs +Ethernet416 625,626,627,628 etp53a 53 400000 rs +Ethernet420 629,630,631,632 etp53b 53 400000 rs +Ethernet424 585,586,587,588 etp54a 54 400000 rs +Ethernet428 589,590,591,592 etp54b 54 400000 rs +Ethernet432 593,594,595,596 etp55a 55 400000 rs +Ethernet436 597,598,599,600 etp55b 55 400000 rs +Ethernet440 601,602,603,604 etp56a 56 400000 rs +Ethernet444 605,606,607,608 etp56b 56 400000 rs +Ethernet448 673,674,675,676 etp57a 57 400000 rs +Ethernet452 677,678,679,680 etp57b 57 400000 rs +Ethernet456 641,642,643,644 etp58a 58 400000 rs +Ethernet460 645,646,647,648 etp58b 58 400000 rs +Ethernet464 681,682,683,684 etp59a 59 400000 rs +Ethernet468 685,686,687,688 etp59b 59 400000 rs +Ethernet472 697,698,699,700 etp60a 60 400000 rs +Ethernet476 701,702,703,704 etp60b 60 400000 rs +Ethernet480 753,754,755,756 etp61a 61 400000 rs +Ethernet484 757,758,759,760 etp61b 61 400000 rs +Ethernet488 713,714,715,716 etp62a 62 400000 rs +Ethernet492 717,718,719,720 etp62b 62 400000 rs +Ethernet496 721,722,723,724 etp63a 63 400000 rs +Ethernet500 725,726,727,728 etp63b 63 400000 rs +Ethernet504 729,730,731,732 etp64a 64 400000 rs +Ethernet508 733,734,735,736 etp64b 64 400000 rs +Ethernet512 281,282,283,284 etp65a 65 400000 rs +Ethernet516 285,286,287,288 etp65b 65 400000 rs +Ethernet520 273,274,275,276 etp66a 66 400000 rs +Ethernet524 277,278,279,280 etp66b 66 400000 rs +Ethernet528 265,266,267,268 etp67a 67 400000 rs +Ethernet532 269,270,271,272 etp67b 67 400000 rs +Ethernet536 305,306,307,308 etp68a 68 400000 rs +Ethernet540 309,310,311,312 etp68b 68 400000 rs +Ethernet544 377,378,379,380 etp69a 69 400000 rs +Ethernet548 381,382,383,384 etp69b 69 400000 rs +Ethernet552 361,362,363,364 etp70a 70 400000 rs +Ethernet556 365,366,367,368 etp70b 70 400000 rs +Ethernet560 321,322,323,324 etp71a 71 400000 rs +Ethernet564 325,326,327,328 etp71b 71 400000 rs +Ethernet568 353,354,355,356 etp72a 72 400000 rs +Ethernet572 357,358,359,360 etp72b 72 400000 rs +Ethernet576 409,410,411,412 etp73a 73 400000 rs +Ethernet580 413,414,415,416 etp73b 73 400000 rs +Ethernet584 401,402,403,404 etp74a 74 400000 rs +Ethernet588 405,406,407,408 etp74b 74 400000 rs +Ethernet592 393,394,395,396 etp75a 75 400000 rs +Ethernet596 397,398,399,400 etp75b 75 400000 rs +Ethernet600 433,434,435,436 etp76a 76 400000 rs +Ethernet604 437,438,439,440 etp76b 76 400000 rs +Ethernet608 505,506,507,508 etp77a 77 400000 rs +Ethernet612 509,510,511,512 etp77b 77 400000 rs +Ethernet616 489,490,491,492 etp78a 78 400000 rs +Ethernet620 493,494,495,496 etp78b 78 400000 rs +Ethernet624 449,450,451,452 etp79a 79 400000 rs +Ethernet628 453,454,455,456 etp79b 79 400000 rs +Ethernet632 481,482,483,484 etp80a 80 400000 rs +Ethernet636 485,486,487,488 etp80b 80 400000 rs +Ethernet640 537,538,539,540 etp81a 81 400000 rs +Ethernet644 541,542,543,544 etp81b 81 400000 rs +Ethernet648 529,530,531,532 etp82a 82 400000 rs +Ethernet652 533,534,535,536 etp82b 82 400000 rs +Ethernet656 521,522,523,524 etp83a 83 400000 rs +Ethernet660 525,526,527,528 etp83b 83 400000 rs +Ethernet664 561,562,563,564 etp84a 84 400000 rs +Ethernet668 565,566,567,568 etp84b 84 400000 rs +Ethernet672 633,634,635,636 etp85a 85 400000 rs +Ethernet676 637,638,639,640 etp85b 85 400000 rs +Ethernet680 617,618,619,620 etp86a 86 400000 rs +Ethernet684 621,622,623,624 etp86b 86 400000 rs +Ethernet688 577,578,579,580 etp87a 87 400000 rs +Ethernet692 581,582,583,584 etp87b 87 400000 rs +Ethernet696 609,610,611,612 etp88a 88 400000 rs +Ethernet700 613,614,615,616 etp88b 88 400000 rs +Ethernet704 665,666,667,668 etp89a 89 400000 rs +Ethernet708 669,670,671,672 etp89b 89 400000 rs +Ethernet712 657,658,659,660 etp90a 90 400000 rs +Ethernet716 661,662,663,664 etp90b 90 400000 rs +Ethernet720 649,650,651,652 etp91a 91 400000 rs +Ethernet724 653,654,655,656 etp91b 91 400000 rs +Ethernet728 689,690,691,692 etp92a 92 400000 rs +Ethernet732 693,694,695,696 etp92b 92 400000 rs +Ethernet736 761,762,763,764 etp93a 93 400000 rs +Ethernet740 765,766,767,768 etp93b 93 400000 rs +Ethernet744 745,746,747,748 etp94a 94 400000 rs +Ethernet748 749,750,751,752 etp94b 94 400000 rs +Ethernet752 705,706,707,708 etp95a 95 400000 rs +Ethernet756 709,710,711,712 etp95b 95 400000 rs +Ethernet760 737,738,739,740 etp96a 96 400000 rs +Ethernet764 741,742,743,744 etp96b 96 400000 rs +Ethernet768 97,98,99,100 etp97a 97 400000 rs +Ethernet772 101,102,103,104 etp97b 97 400000 rs +Ethernet776 89,90,91,92 etp98a 98 400000 rs +Ethernet780 93,94,95,96 etp98b 98 400000 rs +Ethernet784 65,66,67,68 etp99a 99 400000 rs +Ethernet788 69,70,71,72 etp99b 99 400000 rs +Ethernet792 81,82,83,84 etp100a 100 400000 rs +Ethernet796 85,86,87,88 etp100b 100 400000 rs +Ethernet800 105,106,107,108 etp101a 101 400000 rs +Ethernet804 109,110,111,112 etp101b 101 400000 rs +Ethernet808 73,74,75,76 etp102a 102 400000 rs +Ethernet812 77,78,79,80 etp102b 102 400000 rs +Ethernet816 121,122,123,124 etp103a 103 400000 rs +Ethernet820 125,126,127,128 etp103b 103 400000 rs +Ethernet824 113,114,115,116 etp104a 104 400000 rs +Ethernet828 117,118,119,120 etp104b 104 400000 rs +Ethernet832 49,50,51,52 etp105a 105 400000 rs +Ethernet836 53,54,55,56 etp105b 105 400000 rs +Ethernet840 57,58,59,60 etp106a 106 400000 rs +Ethernet844 61,62,63,64 etp106b 106 400000 rs +Ethernet848 9,10,11,12 etp107a 107 400000 rs +Ethernet852 13,14,15,16 etp107b 107 400000 rs +Ethernet856 41,42,43,44 etp108a 108 400000 rs +Ethernet860 45,46,47,48 etp108b 108 400000 rs +Ethernet864 17,18,19,20 etp109a 109 400000 rs +Ethernet868 21,22,23,24 etp109b 109 400000 rs +Ethernet872 1,2,3,4 etp110a 110 400000 rs +Ethernet876 5,6,7,8 etp110b 110 400000 rs +Ethernet880 25,26,27,28 etp111a 111 400000 rs +Ethernet884 29,30,31,32 etp111b 111 400000 rs +Ethernet888 33,34,35,36 etp112a 112 400000 rs +Ethernet892 37,38,39,40 etp112b 112 400000 rs +Ethernet896 993,994,995,996 etp113a 113 400000 rs +Ethernet900 997,998,999,1000 etp113b 113 400000 rs +Ethernet904 985,986,987,988 etp114a 114 400000 rs +Ethernet908 989,990,991,992 etp114b 114 400000 rs +Ethernet912 961,962,963,964 etp115a 115 400000 rs +Ethernet916 965,966,967,968 etp115b 115 400000 rs +Ethernet920 977,978,979,980 etp116a 116 400000 rs +Ethernet924 981,982,983,984 etp116b 116 400000 rs +Ethernet928 1001,1002,1003,1004 etp117a 117 400000 rs +Ethernet932 1005,1006,1007,1008 etp117b 117 400000 rs +Ethernet936 969,970,971,972 etp118a 118 400000 rs +Ethernet940 973,974,975,976 etp118b 118 400000 rs +Ethernet944 1017,1018,1019,1020 etp119a 119 400000 rs +Ethernet948 1021,1022,1023,1024 etp119b 119 400000 rs +Ethernet952 1009,1010,1011,1012 etp120a 120 400000 rs +Ethernet956 1013,1014,1015,1016 etp120b 120 400000 rs +Ethernet960 945,946,947,948 etp121a 121 400000 rs +Ethernet964 949,950,951,952 etp121b 121 400000 rs +Ethernet968 953,954,955,956 etp122a 122 400000 rs +Ethernet972 957,958,959,960 etp122b 122 400000 rs +Ethernet976 905,906,907,908 etp123a 123 400000 rs +Ethernet980 909,910,911,912 etp123b 123 400000 rs +Ethernet984 937,938,939,940 etp124a 124 400000 rs +Ethernet988 941,942,943,944 etp124b 124 400000 rs +Ethernet992 913,914,915,916 etp125a 125 400000 rs +Ethernet996 917,918,919,920 etp125b 125 400000 rs +Ethernet1000 897,898,899,900 etp126a 126 400000 rs +Ethernet1004 901,902,903,904 etp126b 126 400000 rs +Ethernet1008 921,922,923,924 etp127a 127 400000 rs +Ethernet1012 925,926,927,928 etp127b 127 400000 rs +Ethernet1016 929,930,931,932 etp128a 128 400000 rs +Ethernet1020 933,934,935,936 etp128b 128 400000 rs +Ethernet1024 1026,1027,1028,1029 etp129 129 100000 rs diff --git a/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/Nokia-IXR7220-H6-O256/profile.ini b/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/Nokia-IXR7220-H6-O256/profile.ini new file mode 100644 index 00000000000..4eda67c91a6 --- /dev/null +++ b/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/Nokia-IXR7220-H6-O256/profile.ini @@ -0,0 +1 @@ +switchMacAddress=XX:XX:XX:XX:XX:XX diff --git a/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/Nokia-IXR7220-H6-O256/qos.json.j2 b/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/Nokia-IXR7220-H6-O256/qos.json.j2 new file mode 100644 index 00000000000..3e548325ea3 --- /dev/null +++ b/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/Nokia-IXR7220-H6-O256/qos.json.j2 @@ -0,0 +1 @@ +{%- include 'qos_config.j2' %} diff --git a/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/Nokia-IXR7220-H6-O256/sai.profile b/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/Nokia-IXR7220-H6-O256/sai.profile new file mode 100644 index 00000000000..b3c35341352 --- /dev/null +++ b/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/Nokia-IXR7220-H6-O256/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/h6-128.yml diff --git a/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/Nokia-IXR7220-H6-P128/buffer_ports.j2 b/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/Nokia-IXR7220-H6-P128/buffer_ports.j2 new file mode 100644 index 00000000000..ed144844770 --- /dev/null +++ b/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/Nokia-IXR7220-H6-P128/buffer_ports.j2 @@ -0,0 +1,7 @@ +{%- macro generate_port_lists(PORT_ALL) %} + {# Generate list of ports #} + {%- for port_idx in range(0, 1024, 8) %} + {%- if PORT_ALL.append("Ethernet%d" % (port_idx)) %}{%- endif %} + {%- endfor %} + {% if PORT_ALL.append("Ethernet1024") %}{% endif %} +{%- endmacro %} diff --git a/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/Nokia-IXR7220-H6-P128/buffers.json.j2 b/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/Nokia-IXR7220-H6-P128/buffers.json.j2 new file mode 100644 index 00000000000..0b1cb2c541b --- /dev/null +++ b/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/Nokia-IXR7220-H6-P128/buffers.json.j2 @@ -0,0 +1,2 @@ +{%- set default_topo = 't1' %} +{%- include 'buffers_config.j2' %} diff --git a/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/Nokia-IXR7220-H6-P128/buffers_defaults_lt2.j2 b/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/Nokia-IXR7220-H6-P128/buffers_defaults_lt2.j2 new file mode 100644 index 00000000000..4c2c292cecf --- /dev/null +++ b/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/Nokia-IXR7220-H6-P128/buffers_defaults_lt2.j2 @@ -0,0 +1,36 @@ +{%- set default_cable = '5m' %} + +{%- include 'buffer_ports.j2' %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "257154240", + "type": "ingress", + "mode": "dynamic", + "xoff": "59041792" + }, + "egress_lossless_pool": { + "size": "257154240", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"ingress_lossless_pool", + "size":"0", + "static_th":"262523100" + }, + "egress_lossy_profile": { + "pool":"egress_lossless_pool", + "size":"0", + "dynamic_th":"0" + }, + "egress_lossless_profile": { + "pool":"egress_lossless_pool", + "size":"0", + "static_th":"262523100" + } + }, +{%- endmacro %} diff --git a/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/Nokia-IXR7220-H6-P128/buffers_defaults_t0.j2 b/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/Nokia-IXR7220-H6-P128/buffers_defaults_t0.j2 new file mode 100644 index 00000000000..4c2c292cecf --- /dev/null +++ b/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/Nokia-IXR7220-H6-P128/buffers_defaults_t0.j2 @@ -0,0 +1,36 @@ +{%- set default_cable = '5m' %} + +{%- include 'buffer_ports.j2' %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "257154240", + "type": "ingress", + "mode": "dynamic", + "xoff": "59041792" + }, + "egress_lossless_pool": { + "size": "257154240", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"ingress_lossless_pool", + "size":"0", + "static_th":"262523100" + }, + "egress_lossy_profile": { + "pool":"egress_lossless_pool", + "size":"0", + "dynamic_th":"0" + }, + "egress_lossless_profile": { + "pool":"egress_lossless_pool", + "size":"0", + "static_th":"262523100" + } + }, +{%- endmacro %} diff --git a/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/Nokia-IXR7220-H6-P128/buffers_defaults_t1.j2 b/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/Nokia-IXR7220-H6-P128/buffers_defaults_t1.j2 new file mode 100644 index 00000000000..4c2c292cecf --- /dev/null +++ b/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/Nokia-IXR7220-H6-P128/buffers_defaults_t1.j2 @@ -0,0 +1,36 @@ +{%- set default_cable = '5m' %} + +{%- include 'buffer_ports.j2' %} + +{%- macro generate_buffer_pool_and_profiles() %} + "BUFFER_POOL": { + "ingress_lossless_pool": { + "size": "257154240", + "type": "ingress", + "mode": "dynamic", + "xoff": "59041792" + }, + "egress_lossless_pool": { + "size": "257154240", + "type": "egress", + "mode": "static" + } + }, + "BUFFER_PROFILE": { + "ingress_lossy_profile": { + "pool":"ingress_lossless_pool", + "size":"0", + "static_th":"262523100" + }, + "egress_lossy_profile": { + "pool":"egress_lossless_pool", + "size":"0", + "dynamic_th":"0" + }, + "egress_lossless_profile": { + "pool":"egress_lossless_pool", + "size":"0", + "static_th":"262523100" + } + }, +{%- endmacro %} diff --git a/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/Nokia-IXR7220-H6-P128/context_config.json b/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/Nokia-IXR7220-H6-P128/context_config.json new file mode 100644 index 00000000000..cefed153830 --- /dev/null +++ b/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/Nokia-IXR7220-H6-P128/context_config.json @@ -0,0 +1,21 @@ +{ + "CONTEXTS": [ + { + "guid" : 0, + "name" : "syncd", + "dbAsic" : "ASIC_DB", + "dbCounters" : "COUNTERS_DB", + "dbFlex": "FLEX_COUNTER_DB", + "dbState" : "STATE_DB", + "zmq_enable": false, + "zmq_endpoint": "tcp://127.0.0.1:5555", + "zmq_ntf_endpoint": "tcp://127.0.0.1:5556", + "switches": [ + { + "index" : 0, + "hwinfo" : "" + } + ] + } + ] +} diff --git a/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/Nokia-IXR7220-H6-P128/h6-128.yml b/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/Nokia-IXR7220-H6-P128/h6-128.yml new file mode 100644 index 00000000000..4185bbf42a5 --- /dev/null +++ b/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/Nokia-IXR7220-H6-P128/h6-128.yml @@ -0,0 +1,2203 @@ +--- +bcm_device: + 0: + global: + pktio_mode: 1 + vlan_flooding_l2mc_num_reserved: 0 + ipv6_lpm_128b_enable: 1 + shared_block_mask_section: uc_bc + skip_protocol_default_entries: 1 + # LTSW uses value 1 for ALPM combined mode + l3_alpm_template: 1 + l3_alpm_hit_skip: 1 + sai_feat_tail_timestamp : 0 + sai_port_phy_time_sync_en : 1 + sai_field_group_auto_prioritize: 1 + #l3_intf_vlan_split_egress for MTU at L3IF + l3_intf_vlan_split_egress : 1 + pfc_deadlock_seq_control : 1 + sai_tunnel_support: 1 + bcm_tunnel_term_compatible_mode: 1 + l3_ecmp_member_first_lkup_mem_size: 32768 + default_cpu_tx_queue: 7 + #enable srv6 stats, egr queue drop stats, exclude PFC/pause from in-if discards + sai_stats_support_mask: 0x884 + #disable vxlan tunnel stats + sai_stats_disable_mask: 0x200 + #For PPIU Mode, Set resources for counters in global mode counters like ACL, etc + global_flexctr_ing_action_num_reserved: 20 + global_flexctr_ing_pool_num_reserved: 8 + global_flexctr_ing_op_profile_num_reserved: 20 + global_flexctr_ing_group_num_reserved: 2 + global_flexctr_egr_action_num_reserved: 8 + global_flexctr_egr_pool_num_reserved: 5 + global_flexctr_egr_op_profile_num_reserved: 10 + global_flexctr_egr_group_num_reserved: 1 + l3_alpm_large_vrf_mode: 1 + l3_ecmp_member_secondary_mem_size: 8192 + stat_custom_receive0_management_mode: 1 + sai_pfc_dlr_init_capability: 2 +... +--- +device: + 0: + PC_PM_CORE: + ? + PC_PM_ID: 4 #TSC0, YAML_PM4 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x36270415 + TX_LANE_MAP: 0x35240716 + RX_POLARITY_FLIP: 0xe8 + TX_POLARITY_FLIP: 0xc6 + ? + PC_PM_ID: 5 #TSC1, YAML_PM5 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x07264153 + TX_LANE_MAP: 0x60237451 + RX_POLARITY_FLIP: 0x47 + TX_POLARITY_FLIP: 0xbc + ? + PC_PM_ID: 3 #TSC2, YAML_PM3 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x32016475 + TX_LANE_MAP: 0x70514362 + RX_POLARITY_FLIP: 0x07 + TX_POLARITY_FLIP: 0x9c + ? + PC_PM_ID: 1 #TSC3, YAML_PM1 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x61704253 + TX_LANE_MAP: 0x35240716 + RX_POLARITY_FLIP: 0xff + TX_POLARITY_FLIP: 0xfe + ? + PC_PM_ID: 2 #TSC4, YAML_PM2 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x23017465 + TX_LANE_MAP: 0x60415273 + RX_POLARITY_FLIP: 0xf6 + TX_POLARITY_FLIP: 0x7f + ? + PC_PM_ID: 6 #TSC5, YAML_PM6 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x36174052 + TX_LANE_MAP: 0x25076143 + RX_POLARITY_FLIP: 0xef + TX_POLARITY_FLIP: 0xf5 + ? + PC_PM_ID: 7 #TSC6, YAML_PM7 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x36170425 + TX_LANE_MAP: 0x02175346 + RX_POLARITY_FLIP: 0xf7 + TX_POLARITY_FLIP: 0xfe + ? + PC_PM_ID: 8 #TSC7, YAML_PM8 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x36174052 + TX_LANE_MAP: 0x25076143 + RX_POLARITY_FLIP: 0xfd + TX_POLARITY_FLIP: 0xf5 + ? + PC_PM_ID: 16 #TSC8, YAML_PM16 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x32107654 + TX_LANE_MAP: 0x71534062 + RX_POLARITY_FLIP: 0xee + TX_POLARITY_FLIP: 0xae + ? + PC_PM_ID: 15 #TSC9, YAML_PM15 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x35076142 + TX_LANE_MAP: 0x24176053 + RX_POLARITY_FLIP: 0xe6 + TX_POLARITY_FLIP: 0x1f + ? + PC_PM_ID: 14 #TSC10, YAML_PM14 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x02134657 + TX_LANE_MAP: 0x71405263 + RX_POLARITY_FLIP: 0x17 + TX_POLARITY_FLIP: 0x4b + ? + PC_PM_ID: 10 #TSC11, YAML_PM10 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x35076142 + TX_LANE_MAP: 0x04167352 + RX_POLARITY_FLIP: 0xcd + TX_POLARITY_FLIP: 0x92 + ? + PC_PM_ID: 9 #TSC12, YAML_PM9 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x23061754 + TX_LANE_MAP: 0x10475263 + RX_POLARITY_FLIP: 0x6a + TX_POLARITY_FLIP: 0x1e + ? + PC_PM_ID: 11 #TSC13, YAML_PM11 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x24357160 + TX_LANE_MAP: 0x36072541 + RX_POLARITY_FLIP: 0x4d + TX_POLARITY_FLIP: 0x3d + ? + PC_PM_ID: 13 #TSC14, YAML_PM13 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x23150647 + TX_LANE_MAP: 0x50426173 + RX_POLARITY_FLIP: 0x22 + TX_POLARITY_FLIP: 0xb1 + ? + PC_PM_ID: 12 #TSC15, YAML_PM12 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x35614072 + TX_LANE_MAP: 0x25061743 + RX_POLARITY_FLIP: 0x98 + TX_POLARITY_FLIP: 0xa2 + ? + PC_PM_ID: 20 #TSC16, YAML_PM20 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x12304657 + TX_LANE_MAP: 0x45610237 + RX_POLARITY_FLIP: 0x3c + TX_POLARITY_FLIP: 0x0a + ? + PC_PM_ID: 21 #TSC17, YAML_PM21 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x67540123 + TX_LANE_MAP: 0x31207564 + RX_POLARITY_FLIP: 0x52 + TX_POLARITY_FLIP: 0x0a + ? + PC_PM_ID: 19 #TSC18, YAML_PM19 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x13204675 + TX_LANE_MAP: 0x45720136 + RX_POLARITY_FLIP: 0x42 + TX_POLARITY_FLIP: 0x33 + ? + PC_PM_ID: 17 #TSC19, YAML_PM17 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x75643120 + TX_LANE_MAP: 0x13207645 + RX_POLARITY_FLIP: 0x8c + TX_POLARITY_FLIP: 0xbb + ? + PC_PM_ID: 18 #TSC20, YAML_PM18 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x23107654 + TX_LANE_MAP: 0x75603124 + RX_POLARITY_FLIP: 0xf0 + TX_POLARITY_FLIP: 0x9b + ? + PC_PM_ID: 22 #TSC21, YAML_PM22 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x56470231 + TX_LANE_MAP: 0x23106754 + RX_POLARITY_FLIP: 0x1f + TX_POLARITY_FLIP: 0x93 + ? + PC_PM_ID: 23 #TSC22, YAML_PM23 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x12034657 + TX_LANE_MAP: 0x54610237 + RX_POLARITY_FLIP: 0xc1 + TX_POLARITY_FLIP: 0x91 + ? + PC_PM_ID: 24 #TSC23, YAML_PM24 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x45670231 + TX_LANE_MAP: 0x02137654 + RX_POLARITY_FLIP: 0xdd + TX_POLARITY_FLIP: 0xf9 + ? + PC_PM_ID: 32 #TSC24, YAML_PM32 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x10537624 + TX_LANE_MAP: 0x46750132 + RX_POLARITY_FLIP: 0x85 + TX_POLARITY_FLIP: 0x15 + ? + PC_PM_ID: 31 #TSC25, YAML_PM31 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x76450213 + TX_LANE_MAP: 0x23107645 + RX_POLARITY_FLIP: 0x19 + TX_POLARITY_FLIP: 0x98 + ? + PC_PM_ID: 30 #TSC26, YAML_PM30 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x10437625 + TX_LANE_MAP: 0x47653210 + RX_POLARITY_FLIP: 0x39 + TX_POLARITY_FLIP: 0xd8 + ? + PC_PM_ID: 26 #TSC27, YAML_PM26 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x45673201 + TX_LANE_MAP: 0x23106754 + RX_POLARITY_FLIP: 0xa4 + TX_POLARITY_FLIP: 0xa9 + ? + PC_PM_ID: 25 #TSC28, YAML_PM25 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x32507614 + TX_LANE_MAP: 0x57640132 + RX_POLARITY_FLIP: 0xcc + TX_POLARITY_FLIP: 0x6b + ? + PC_PM_ID: 27 #TSC29, YAML_PM27 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x57640132 + TX_LANE_MAP: 0x02137654 + RX_POLARITY_FLIP: 0x9f + TX_POLARITY_FLIP: 0x34 + ? + PC_PM_ID: 29 #TSC30, YAML_PM29 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x23605147 + TX_LANE_MAP: 0x47561032 + RX_POLARITY_FLIP: 0x73 + TX_POLARITY_FLIP: 0x12 + ? + PC_PM_ID: 28 #TSC31, YAML_PM28 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x46753120 + TX_LANE_MAP: 0x13604275 + RX_POLARITY_FLIP: 0xf9 + TX_POLARITY_FLIP: 0x4c + ? + PC_PM_ID: 36 #TSC32, YAML_PM36 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x75402631 + TX_LANE_MAP: 0x03467512 + RX_POLARITY_FLIP: 0x62 + TX_POLARITY_FLIP: 0xa1 + ? + PC_PM_ID: 37 #TSC33, YAML_PM37 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x73542160 + TX_LANE_MAP: 0x23746501 + RX_POLARITY_FLIP: 0x0c + TX_POLARITY_FLIP: 0xa7 + ? + PC_PM_ID: 35 #TSC34, YAML_PM35 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x31427506 + TX_LANE_MAP: 0x13405276 + RX_POLARITY_FLIP: 0x81 + TX_POLARITY_FLIP: 0x9a + ? + PC_PM_ID: 33 #TSC35, YAML_PM33 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x63724501 + TX_LANE_MAP: 0x53672410 + RX_POLARITY_FLIP: 0xc6 + TX_POLARITY_FLIP: 0xfc + ? + PC_PM_ID: 34 #TSC36, YAML_PM34 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x72043516 + TX_LANE_MAP: 0x31742065 + RX_POLARITY_FLIP: 0x98 + TX_POLARITY_FLIP: 0x26 + ? + PC_PM_ID: 38 #TSC37, YAML_PM38 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x06321457 + TX_LANE_MAP: 0x42057136 + RX_POLARITY_FLIP: 0x83 + TX_POLARITY_FLIP: 0xe3 + ? + PC_PM_ID: 39 #TSC38, YAML_PM39 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x76512304 + TX_LANE_MAP: 0x16254073 + RX_POLARITY_FLIP: 0xb8 + TX_POLARITY_FLIP: 0x9c + ? + PC_PM_ID: 40 #TSC39, YAML_PM40 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x62574013 + TX_LANE_MAP: 0x43025761 + RX_POLARITY_FLIP: 0x16 + TX_POLARITY_FLIP: 0x40 + ? + PC_PM_ID: 48 #TSC40, YAML_PM48 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x21645730 + TX_LANE_MAP: 0x62405317 + RX_POLARITY_FLIP: 0x91 + TX_POLARITY_FLIP: 0xcc + ? + PC_PM_ID: 47 #TSC41, YAML_PM47 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x21647530 + TX_LANE_MAP: 0x70541263 + RX_POLARITY_FLIP: 0xae + TX_POLARITY_FLIP: 0xea + ? + PC_PM_ID: 46 #TSC42, YAML_PM46 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x15672430 + TX_LANE_MAP: 0x60547213 + RX_POLARITY_FLIP: 0xa3 + TX_POLARITY_FLIP: 0xb4 + ? + PC_PM_ID: 42 #TSC43, YAML_PM42 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x31427605 + TX_LANE_MAP: 0x06347521 + RX_POLARITY_FLIP: 0x77 + TX_POLARITY_FLIP: 0x77 + ? + PC_PM_ID: 41 #TSC44, YAML_PM41 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x46701523 + TX_LANE_MAP: 0x30457621 + RX_POLARITY_FLIP: 0xb7 + TX_POLARITY_FLIP: 0xce + ? + PC_PM_ID: 43 #TSC45, YAML_PM43 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x10425673 + TX_LANE_MAP: 0x21475603 + RX_POLARITY_FLIP: 0x5e + TX_POLARITY_FLIP: 0x20 + ? + PC_PM_ID: 45 #TSC46, YAML_PM45 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x01625437 + TX_LANE_MAP: 0x21705463 + RX_POLARITY_FLIP: 0x55 + TX_POLARITY_FLIP: 0xc5 + ? + PC_PM_ID: 44 #TSC47, YAML_PM44 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x63427501 + TX_LANE_MAP: 0x53671420 + RX_POLARITY_FLIP: 0xfd + TX_POLARITY_FLIP: 0xe1 + ? + PC_PM_ID: 52 #TSC48, YAML_PM52 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x52073416 + TX_LANE_MAP: 0x31742056 + RX_POLARITY_FLIP: 0x72 + TX_POLARITY_FLIP: 0xb6 + ? + PC_PM_ID: 53 #TSC49, YAML_PM53 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x35021764 + TX_LANE_MAP: 0x76325104 + RX_POLARITY_FLIP: 0xaa + TX_POLARITY_FLIP: 0x94 + ? + PC_PM_ID: 51 #TSC50, YAML_PM51 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x16402375 + TX_LANE_MAP: 0x15264073 + RX_POLARITY_FLIP: 0xe3 + TX_POLARITY_FLIP: 0x10 + ? + PC_PM_ID: 49 #TSC51, YAML_PM49 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x42576013 + TX_LANE_MAP: 0x43025761 + RX_POLARITY_FLIP: 0x0e + TX_POLARITY_FLIP: 0xb8 + ? + PC_PM_ID: 50 #TSC52, YAML_PM50 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x21645703 + TX_LANE_MAP: 0x62504317 + RX_POLARITY_FLIP: 0x07 + TX_POLARITY_FLIP: 0x36 + ? + PC_PM_ID: 54 #TSC53, YAML_PM54 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x20647513 + TX_LANE_MAP: 0x70542163 + RX_POLARITY_FLIP: 0x34 + TX_POLARITY_FLIP: 0x46 + ? + PC_PM_ID: 55 #TSC54, YAML_PM55 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x36471502 + TX_LANE_MAP: 0x60547123 + RX_POLARITY_FLIP: 0x1b + TX_POLARITY_FLIP: 0x9a + ? + PC_PM_ID: 56 #TSC55, YAML_PM56 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x31427605 + TX_LANE_MAP: 0x06347512 + RX_POLARITY_FLIP: 0xd7 + TX_POLARITY_FLIP: 0xe2 + ? + PC_PM_ID: 64 #TSC56, YAML_PM64 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x52634071 + TX_LANE_MAP: 0x14657023 + RX_POLARITY_FLIP: 0x7d + TX_POLARITY_FLIP: 0xc8 + ? + PC_PM_ID: 63 #TSC57, YAML_PM63 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x60351472 + TX_LANE_MAP: 0x56124703 + RX_POLARITY_FLIP: 0x85 + TX_POLARITY_FLIP: 0x62 + ? + PC_PM_ID: 62 #TSC58, YAML_PM62 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x35041627 + TX_LANE_MAP: 0x42735061 + RX_POLARITY_FLIP: 0x51 + TX_POLARITY_FLIP: 0x5f + ? + PC_PM_ID: 58 #TSC59, YAML_PM58 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x72436051 + TX_LANE_MAP: 0x56417023 + RX_POLARITY_FLIP: 0xaa + TX_POLARITY_FLIP: 0xdf + ? + PC_PM_ID: 57 #TSC60, YAML_PM57 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x51407263 + TX_LANE_MAP: 0x34652170 + RX_POLARITY_FLIP: 0x5d + TX_POLARITY_FLIP: 0xc0 + ? + PC_PM_ID: 59 #TSC61, YAML_PM59 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x52736140 + TX_LANE_MAP: 0x06153427 + RX_POLARITY_FLIP: 0xc4 + TX_POLARITY_FLIP: 0x6e + ? + PC_PM_ID: 61 #TSC62, YAML_PM61 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x71524360 + TX_LANE_MAP: 0x05372461 + RX_POLARITY_FLIP: 0xb2 + TX_POLARITY_FLIP: 0xd3 + ? + PC_PM_ID: 60 #TSC63, YAML_PM60 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x43061257 + TX_LANE_MAP: 0x16534270 + RX_POLARITY_FLIP: 0x0c + TX_POLARITY_FLIP: 0xf2 + ? + PC_PM_ID: 68 #TSC64, YAML_PM68 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x15042736 + TX_LANE_MAP: 0x60317524 + RX_POLARITY_FLIP: 0x9a + TX_POLARITY_FLIP: 0xdc + ? + PC_PM_ID: 69 #TSC65, YAML_PM69 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x60435271 + TX_LANE_MAP: 0x16253704 + RX_POLARITY_FLIP: 0xaf + TX_POLARITY_FLIP: 0x34 + ? + PC_PM_ID: 67 #TSC66, YAML_PM67 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x73426051 + TX_LANE_MAP: 0x25341706 + RX_POLARITY_FLIP: 0x3f + TX_POLARITY_FLIP: 0x31 + ? + PC_PM_ID: 65 #TSC67, YAML_PM65 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x06435712 + TX_LANE_MAP: 0x53160724 + RX_POLARITY_FLIP: 0x57 + TX_POLARITY_FLIP: 0x50 + ? + PC_PM_ID: 66 #TSC68, YAML_PM66 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x62537041 + TX_LANE_MAP: 0x15746023 + RX_POLARITY_FLIP: 0x88 + TX_POLARITY_FLIP: 0x1f + ? + PC_PM_ID: 70 #TSC69, YAML_PM70 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x72435061 + TX_LANE_MAP: 0x63407152 + RX_POLARITY_FLIP: 0xfc + TX_POLARITY_FLIP: 0x77 + ? + PC_PM_ID: 71 #TSC70, YAML_PM71 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x32701564 + TX_LANE_MAP: 0x43065217 + RX_POLARITY_FLIP: 0x03 + TX_POLARITY_FLIP: 0x12 + ? + PC_PM_ID: 72 #TSC71, YAML_PM72 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x42735061 + TX_LANE_MAP: 0x47516023 + RX_POLARITY_FLIP: 0xf5 + TX_POLARITY_FLIP: 0x68 + ? + PC_PM_ID: 80 #TSC72, YAML_PM80 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x21645730 + TX_LANE_MAP: 0x26405317 + RX_POLARITY_FLIP: 0x6a + TX_POLARITY_FLIP: 0xeb + ? + PC_PM_ID: 79 #TSC73, YAML_PM79 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x02371546 + TX_LANE_MAP: 0x24715360 + RX_POLARITY_FLIP: 0xf9 + TX_POLARITY_FLIP: 0xe0 + ? + PC_PM_ID: 78 #TSC74, YAML_PM78 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x63147520 + TX_LANE_MAP: 0x63205471 + RX_POLARITY_FLIP: 0xf4 + TX_POLARITY_FLIP: 0x3b + ? + PC_PM_ID: 74 #TSC75, YAML_PM74 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x01427635 + TX_LANE_MAP: 0x02357416 + RX_POLARITY_FLIP: 0x98 + TX_POLARITY_FLIP: 0x0f + ? + PC_PM_ID: 73 #TSC76, YAML_PM73 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x72053641 + TX_LANE_MAP: 0x13247065 + RX_POLARITY_FLIP: 0xbc + TX_POLARITY_FLIP: 0x88 + ? + PC_PM_ID: 75 #TSC77, YAML_PM75 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x45102376 + TX_LANE_MAP: 0x76402315 + RX_POLARITY_FLIP: 0xca + TX_POLARITY_FLIP: 0x42 + ? + PC_PM_ID: 77 #TSC78, YAML_PM77 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x04671235 + TX_LANE_MAP: 0x04523671 + RX_POLARITY_FLIP: 0xea + TX_POLARITY_FLIP: 0x31 + ? + PC_PM_ID: 76 #TSC79, YAML_PM76 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x12754063 + TX_LANE_MAP: 0x41076253 + RX_POLARITY_FLIP: 0xd6 + TX_POLARITY_FLIP: 0x0e + ? + PC_PM_ID: 84 #TSC80, YAML_PM84 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x45706132 + TX_LANE_MAP: 0x03754621 + RX_POLARITY_FLIP: 0x75 + TX_POLARITY_FLIP: 0x69 + ? + PC_PM_ID: 85 #TSC81, YAML_PM85 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x32075164 + TX_LANE_MAP: 0x43607521 + RX_POLARITY_FLIP: 0x54 + TX_POLARITY_FLIP: 0x63 + ? + PC_PM_ID: 83 #TSC82, YAML_PM83 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x53401276 + TX_LANE_MAP: 0x03514726 + RX_POLARITY_FLIP: 0xff + TX_POLARITY_FLIP: 0xa0 + ? + PC_PM_ID: 81 #TSC83, YAML_PM81 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x12437605 + TX_LANE_MAP: 0x50641723 + RX_POLARITY_FLIP: 0x99 + TX_POLARITY_FLIP: 0xda + ? + PC_PM_ID: 82 #TSC84, YAML_PM82 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x21645730 + TX_LANE_MAP: 0x16405327 + RX_POLARITY_FLIP: 0x78 + TX_POLARITY_FLIP: 0x53 + ? + PC_PM_ID: 86 #TSC85, YAML_PM86 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x30172465 + TX_LANE_MAP: 0x14725360 + RX_POLARITY_FLIP: 0xc3 + TX_POLARITY_FLIP: 0x58 + ? + PC_PM_ID: 87 #TSC86, YAML_PM87 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x60347521 + TX_LANE_MAP: 0x63105472 + RX_POLARITY_FLIP: 0xce + TX_POLARITY_FLIP: 0x10 + ? + PC_PM_ID: 88 #TSC87, YAML_PM88 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x31427605 + TX_LANE_MAP: 0x02347516 + RX_POLARITY_FLIP: 0x20 + TX_POLARITY_FLIP: 0xd8 + ? + PC_PM_ID: 96 #TSC88, YAML_PM96 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x72053461 + TX_LANE_MAP: 0x13247065 + RX_POLARITY_FLIP: 0x38 + TX_POLARITY_FLIP: 0xfd + ? + PC_PM_ID: 95 #TSC89, YAML_PM95 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x04712356 + TX_LANE_MAP: 0x75402316 + RX_POLARITY_FLIP: 0x3b + TX_POLARITY_FLIP: 0x70 + ? + PC_PM_ID: 94 #TSC90, YAML_PM94 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x37541206 + TX_LANE_MAP: 0x36720541 + RX_POLARITY_FLIP: 0x22 + TX_POLARITY_FLIP: 0x78 + ? + PC_PM_ID: 90 #TSC91, YAML_PM90 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x12475063 + TX_LANE_MAP: 0x41075263 + RX_POLARITY_FLIP: 0x03 + TX_POLARITY_FLIP: 0x8f + ? + PC_PM_ID: 89 #TSC92, YAML_PM89 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x75406132 + TX_LANE_MAP: 0x03754612 + RX_POLARITY_FLIP: 0xc0 + TX_POLARITY_FLIP: 0xc0 + ? + PC_PM_ID: 91 #TSC93, YAML_PM91 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x02367145 + TX_LANE_MAP: 0x70524613 + RX_POLARITY_FLIP: 0x91 + TX_POLARITY_FLIP: 0xe0 + ? + PC_PM_ID: 93 #TSC94, YAML_PM93 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x50632471 + TX_LANE_MAP: 0x01637425 + RX_POLARITY_FLIP: 0x41 + TX_POLARITY_FLIP: 0x33 + ? + PC_PM_ID: 92 #TSC95, YAML_PM92 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x23714506 + TX_LANE_MAP: 0x63542710 + RX_POLARITY_FLIP: 0xac + TX_POLARITY_FLIP: 0xa4 + ? + PC_PM_ID: 100 #TSC96, YAML_PM100 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x20417536 + TX_LANE_MAP: 0x42756013 + RX_POLARITY_FLIP: 0x90 + TX_POLARITY_FLIP: 0xbe + ? + PC_PM_ID: 101 #TSC97, YAML_PM101 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x67514023 + TX_LANE_MAP: 0x42105736 + RX_POLARITY_FLIP: 0x32 + TX_POLARITY_FLIP: 0xfc + ? + PC_PM_ID: 99 #TSC98, YAML_PM99 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x32516407 + TX_LANE_MAP: 0x56741302 + RX_POLARITY_FLIP: 0x09 + TX_POLARITY_FLIP: 0xb3 + ? + PC_PM_ID: 97 #TSC99, YAML_PM97 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x54761032 + TX_LANE_MAP: 0x32016754 + RX_POLARITY_FLIP: 0xcc + TX_POLARITY_FLIP: 0x13 + ? + PC_PM_ID: 98 #TSC100, YAML_PM98 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x01426735 + TX_LANE_MAP: 0x57641023 + RX_POLARITY_FLIP: 0xc7 + TX_POLARITY_FLIP: 0xc5 + ? + PC_PM_ID: 102 #TSC101, YAML_PM102 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x45762310 + TX_LANE_MAP: 0x10326745 + RX_POLARITY_FLIP: 0x1b + TX_POLARITY_FLIP: 0xd8 + ? + PC_PM_ID: 103 #TSC102, YAML_PM103 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x13724506 + TX_LANE_MAP: 0x46751023 + RX_POLARITY_FLIP: 0xb9 + TX_POLARITY_FLIP: 0xd9 + ? + PC_PM_ID: 104 #TSC103, YAML_PM104 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x54762310 + TX_LANE_MAP: 0x42710635 + RX_POLARITY_FLIP: 0xad + TX_POLARITY_FLIP: 0x04 + ? + PC_PM_ID: 112 #TSC104, YAML_PM112 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x01326745 + TX_LANE_MAP: 0x54721306 + RX_POLARITY_FLIP: 0x2d + TX_POLARITY_FLIP: 0x81 + ? + PC_PM_ID: 111 #TSC105, YAML_PM111 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x57461302 + TX_LANE_MAP: 0x31026754 + RX_POLARITY_FLIP: 0xb6 + TX_POLARITY_FLIP: 0xb9 + ? + PC_PM_ID: 110 #TSC106, YAML_PM110 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x01324756 + TX_LANE_MAP: 0x54631027 + RX_POLARITY_FLIP: 0x0b + TX_POLARITY_FLIP: 0x39 + ? + PC_PM_ID: 106 #TSC107, YAML_PM106 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x54762013 + TX_LANE_MAP: 0x20316475 + RX_POLARITY_FLIP: 0xf0 + TX_POLARITY_FLIP: 0x19 + ? + PC_PM_ID: 105 #TSC108, YAML_PM105 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x30216475 + TX_LANE_MAP: 0x45732016 + RX_POLARITY_FLIP: 0x6d + TX_POLARITY_FLIP: 0x11 + ? + PC_PM_ID: 107 #TSC109, YAML_PM107 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x75461023 + TX_LANE_MAP: 0x32017645 + RX_POLARITY_FLIP: 0x7e + TX_POLARITY_FLIP: 0x33 + ? + PC_PM_ID: 109 #TSC110, YAML_PM109 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x03215467 + TX_LANE_MAP: 0x64712035 + RX_POLARITY_FLIP: 0xda + TX_POLARITY_FLIP: 0x5f + ? + PC_PM_ID: 108 #TSC111, YAML_PM108 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x57461032 + TX_LANE_MAP: 0x31026745 + RX_POLARITY_FLIP: 0xc9 + TX_POLARITY_FLIP: 0x5f + ? + PC_PM_ID: 116 #TSC112, YAML_PM116 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x32604175 + TX_LANE_MAP: 0x67504312 + RX_POLARITY_FLIP: 0x73 + TX_POLARITY_FLIP: 0xe6 + ? + PC_PM_ID: 117 #TSC113, YAML_PM117 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x27160543 + TX_LANE_MAP: 0x31207564 + RX_POLARITY_FLIP: 0xdd + TX_POLARITY_FLIP: 0x5a + ? + PC_PM_ID: 115 #TSC114, YAML_PM115 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x20317564 + TX_LANE_MAP: 0x75604123 + RX_POLARITY_FLIP: 0xa6 + TX_POLARITY_FLIP: 0x29 + ? + PC_PM_ID: 113 #TSC115, YAML_PM113 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x24071653 + TX_LANE_MAP: 0x32706154 + RX_POLARITY_FLIP: 0xd4 + TX_POLARITY_FLIP: 0x95 + ? + PC_PM_ID: 114 #TSC116, YAML_PM114 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x32016745 + TX_LANE_MAP: 0x63415270 + RX_POLARITY_FLIP: 0x26 + TX_POLARITY_FLIP: 0x76 + ? + PC_PM_ID: 118 #TSC117, YAML_PM118 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x07164352 + TX_LANE_MAP: 0x32016754 + RX_POLARITY_FLIP: 0xa9 + TX_POLARITY_FLIP: 0x65 + ? + PC_PM_ID: 119 #TSC118, YAML_PM119 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x32016745 + TX_LANE_MAP: 0x70415362 + RX_POLARITY_FLIP: 0x4c + TX_POLARITY_FLIP: 0x31 + ? + PC_PM_ID: 120 #TSC119, YAML_PM120 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x34167052 + TX_LANE_MAP: 0x20316745 + RX_POLARITY_FLIP: 0x44 + TX_POLARITY_FLIP: 0xb0 + ? + PC_PM_ID: 128 #TSC120, YAML_PM128 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x32104756 + TX_LANE_MAP: 0x71504362 + RX_POLARITY_FLIP: 0x02 + TX_POLARITY_FLIP: 0x0a + ? + PC_PM_ID: 127 #TSC121, YAML_PM127 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x35140726 + TX_LANE_MAP: 0x63724051 + RX_POLARITY_FLIP: 0x08 + TX_POLARITY_FLIP: 0x80 + ? + PC_PM_ID: 126 #TSC122, YAML_PM126 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x32104756 + TX_LANE_MAP: 0x71504362 + RX_POLARITY_FLIP: 0x04 + TX_POLARITY_FLIP: 0x0a + ? + PC_PM_ID: 122 #TSC123, YAML_PM122 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x25047163 + TX_LANE_MAP: 0x32107654 + RX_POLARITY_FLIP: 0x48 + TX_POLARITY_FLIP: 0x04 + ? + PC_PM_ID: 121 #TSC124, YAML_PM121 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x63724051 + TX_LANE_MAP: 0x47521603 + RX_POLARITY_FLIP: 0x00 + TX_POLARITY_FLIP: 0x04 + ? + PC_PM_ID: 123 #TSC125, YAML_PM123 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x35046172 + TX_LANE_MAP: 0x23106745 + RX_POLARITY_FLIP: 0xad + TX_POLARITY_FLIP: 0x99 + ? + PC_PM_ID: 125 #TSC126, YAML_PM125 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x03214657 + TX_LANE_MAP: 0x42517063 + RX_POLARITY_FLIP: 0xac + TX_POLARITY_FLIP: 0xe6 + ? + PC_PM_ID: 124 #TSC127, YAML_PM124 + CORE_INDEX: 0 + : + RX_LANE_MAP_AUTO: 0 + TX_LANE_MAP_AUTO: 0 + RX_POLARITY_FLIP_AUTO: 0 + TX_POLARITY_FLIP_AUTO: 0 + RX_LANE_MAP: 0x35240716 + TX_LANE_MAP: 0x63724051 + RX_POLARITY_FLIP: 0x56 + TX_POLARITY_FLIP: 0x9c + ? + PC_PM_ID: 129 + CORE_INDEX: 0 + : + RX_POLARITY_FLIP_AUTO: 1 + TX_POLARITY_FLIP_AUTO: 1 + RX_POLARITY_FLIP: 0x00 + TX_POLARITY_FLIP: 0x00 +... +--- +device: + 0: + PC_PORT_PHYS_MAP: + ? + PORT_ID: 0 + : + PC_PHYS_PORT_ID: 0 + ? + PORT_ID: 3 + : + PC_PHYS_PORT_ID: 1 + ? + PORT_ID: 1 + : + PC_PHYS_PORT_ID: 9 + ? + PORT_ID: 2 + : + PC_PHYS_PORT_ID: 17 + ? + PORT_ID: 4 + : + PC_PHYS_PORT_ID: 25 + ? + PORT_ID: 21 + : + PC_PHYS_PORT_ID: 33 + ? + PORT_ID: 20 + : + PC_PHYS_PORT_ID: 41 + ? + PORT_ID: 18 + : + PC_PHYS_PORT_ID: 49 + ? + PORT_ID: 19 + : + PC_PHYS_PORT_ID: 57 + ? + PORT_ID: 37 + : + PC_PHYS_PORT_ID: 65 + ? + PORT_ID: 39 + : + PC_PHYS_PORT_ID: 73 + ? + PORT_ID: 38 + : + PC_PHYS_PORT_ID: 81 + ? + PORT_ID: 36 + : + PC_PHYS_PORT_ID: 89 + ? + PORT_ID: 54 + : + PC_PHYS_PORT_ID: 97 + ? + PORT_ID: 55 + : + PC_PHYS_PORT_ID: 105 + ? + PORT_ID: 57 + : + PC_PHYS_PORT_ID: 113 + ? + PORT_ID: 56 + : + PC_PHYS_PORT_ID: 121 + ? + PORT_ID: 74 + : + PC_PHYS_PORT_ID: 129 + ? + PORT_ID: 75 + : + PC_PHYS_PORT_ID: 137 + ? + PORT_ID: 73 + : + PC_PHYS_PORT_ID: 145 + ? + PORT_ID: 72 + : + PC_PHYS_PORT_ID: 153 + ? + PORT_ID: 90 + : + PC_PHYS_PORT_ID: 161 + ? + PORT_ID: 91 + : + PC_PHYS_PORT_ID: 169 + ? + PORT_ID: 92 + : + PC_PHYS_PORT_ID: 177 + ? + PORT_ID: 93 + : + PC_PHYS_PORT_ID: 185 + ? + PORT_ID: 109 + : + PC_PHYS_PORT_ID: 193 + ? + PORT_ID: 111 + : + PC_PHYS_PORT_ID: 201 + ? + PORT_ID: 110 + : + PC_PHYS_PORT_ID: 209 + ? + PORT_ID: 108 + : + PC_PHYS_PORT_ID: 217 + ? + PORT_ID: 126 + : + PC_PHYS_PORT_ID: 225 + ? + PORT_ID: 127 + : + PC_PHYS_PORT_ID: 233 + ? + PORT_ID: 129 + : + PC_PHYS_PORT_ID: 241 + ? + PORT_ID: 128 + : + PC_PHYS_PORT_ID: 249 + ? + PORT_ID: 144 + : + PC_PHYS_PORT_ID: 257 + ? + PORT_ID: 147 + : + PC_PHYS_PORT_ID: 265 + ? + PORT_ID: 146 + : + PC_PHYS_PORT_ID: 273 + ? + PORT_ID: 145 + : + PC_PHYS_PORT_ID: 281 + ? + PORT_ID: 162 + : + PC_PHYS_PORT_ID: 289 + ? + PORT_ID: 163 + : + PC_PHYS_PORT_ID: 297 + ? + PORT_ID: 165 + : + PC_PHYS_PORT_ID: 305 + ? + PORT_ID: 164 + : + PC_PHYS_PORT_ID: 313 + ? + PORT_ID: 183 + : + PC_PHYS_PORT_ID: 321 + ? + PORT_ID: 180 + : + PC_PHYS_PORT_ID: 329 + ? + PORT_ID: 181 + : + PC_PHYS_PORT_ID: 337 + ? + PORT_ID: 182 + : + PC_PHYS_PORT_ID: 345 + ? + PORT_ID: 201 + : + PC_PHYS_PORT_ID: 353 + ? + PORT_ID: 200 + : + PC_PHYS_PORT_ID: 361 + ? + PORT_ID: 198 + : + PC_PHYS_PORT_ID: 369 + ? + PORT_ID: 199 + : + PC_PHYS_PORT_ID: 377 + ? + PORT_ID: 216 + : + PC_PHYS_PORT_ID: 385 + ? + PORT_ID: 219 + : + PC_PHYS_PORT_ID: 393 + ? + PORT_ID: 218 + : + PC_PHYS_PORT_ID: 401 + ? + PORT_ID: 217 + : + PC_PHYS_PORT_ID: 409 + ? + PORT_ID: 234 + : + PC_PHYS_PORT_ID: 417 + ? + PORT_ID: 235 + : + PC_PHYS_PORT_ID: 425 + ? + PORT_ID: 237 + : + PC_PHYS_PORT_ID: 433 + ? + PORT_ID: 236 + : + PC_PHYS_PORT_ID: 441 + ? + PORT_ID: 255 + : + PC_PHYS_PORT_ID: 449 + ? + PORT_ID: 252 + : + PC_PHYS_PORT_ID: 457 + ? + PORT_ID: 253 + : + PC_PHYS_PORT_ID: 465 + ? + PORT_ID: 254 + : + PC_PHYS_PORT_ID: 473 + ? + PORT_ID: 273 + : + PC_PHYS_PORT_ID: 481 + ? + PORT_ID: 272 + : + PC_PHYS_PORT_ID: 489 + ? + PORT_ID: 270 + : + PC_PHYS_PORT_ID: 497 + ? + PORT_ID: 271 + : + PC_PHYS_PORT_ID: 505 + ? + PORT_ID: 288 + : + PC_PHYS_PORT_ID: 513 + ? + PORT_ID: 291 + : + PC_PHYS_PORT_ID: 521 + ? + PORT_ID: 290 + : + PC_PHYS_PORT_ID: 529 + ? + PORT_ID: 289 + : + PC_PHYS_PORT_ID: 537 + ? + PORT_ID: 306 + : + PC_PHYS_PORT_ID: 545 + ? + PORT_ID: 307 + : + PC_PHYS_PORT_ID: 553 + ? + PORT_ID: 309 + : + PC_PHYS_PORT_ID: 561 + ? + PORT_ID: 308 + : + PC_PHYS_PORT_ID: 569 + ? + PORT_ID: 327 + : + PC_PHYS_PORT_ID: 577 + ? + PORT_ID: 324 + : + PC_PHYS_PORT_ID: 585 + ? + PORT_ID: 325 + : + PC_PHYS_PORT_ID: 593 + ? + PORT_ID: 326 + : + PC_PHYS_PORT_ID: 601 + ? + PORT_ID: 345 + : + PC_PHYS_PORT_ID: 609 + ? + PORT_ID: 344 + : + PC_PHYS_PORT_ID: 617 + ? + PORT_ID: 342 + : + PC_PHYS_PORT_ID: 625 + ? + PORT_ID: 343 + : + PC_PHYS_PORT_ID: 633 + ? + PORT_ID: 360 + : + PC_PHYS_PORT_ID: 641 + ? + PORT_ID: 363 + : + PC_PHYS_PORT_ID: 649 + ? + PORT_ID: 362 + : + PC_PHYS_PORT_ID: 657 + ? + PORT_ID: 361 + : + PC_PHYS_PORT_ID: 665 + ? + PORT_ID: 378 + : + PC_PHYS_PORT_ID: 673 + ? + PORT_ID: 379 + : + PC_PHYS_PORT_ID: 681 + ? + PORT_ID: 381 + : + PC_PHYS_PORT_ID: 689 + ? + PORT_ID: 380 + : + PC_PHYS_PORT_ID: 697 + ? + PORT_ID: 399 + : + PC_PHYS_PORT_ID: 705 + ? + PORT_ID: 396 + : + PC_PHYS_PORT_ID: 713 + ? + PORT_ID: 397 + : + PC_PHYS_PORT_ID: 721 + ? + PORT_ID: 398 + : + PC_PHYS_PORT_ID: 729 + ? + PORT_ID: 417 + : + PC_PHYS_PORT_ID: 737 + ? + PORT_ID: 416 + : + PC_PHYS_PORT_ID: 745 + ? + PORT_ID: 414 + : + PC_PHYS_PORT_ID: 753 + ? + PORT_ID: 415 + : + PC_PHYS_PORT_ID: 761 + ? + PORT_ID: 434 + : + PC_PHYS_PORT_ID: 769 + ? + PORT_ID: 432 + : + PC_PHYS_PORT_ID: 777 + ? + PORT_ID: 433 + : + PC_PHYS_PORT_ID: 785 + ? + PORT_ID: 435 + : + PC_PHYS_PORT_ID: 793 + ? + PORT_ID: 453 + : + PC_PHYS_PORT_ID: 801 + ? + PORT_ID: 452 + : + PC_PHYS_PORT_ID: 809 + ? + PORT_ID: 450 + : + PC_PHYS_PORT_ID: 817 + ? + PORT_ID: 451 + : + PC_PHYS_PORT_ID: 825 + ? + PORT_ID: 469 + : + PC_PHYS_PORT_ID: 833 + ? + PORT_ID: 468 + : + PC_PHYS_PORT_ID: 841 + ? + PORT_ID: 470 + : + PC_PHYS_PORT_ID: 849 + ? + PORT_ID: 471 + : + PC_PHYS_PORT_ID: 857 + ? + PORT_ID: 489 + : + PC_PHYS_PORT_ID: 865 + ? + PORT_ID: 488 + : + PC_PHYS_PORT_ID: 873 + ? + PORT_ID: 487 + : + PC_PHYS_PORT_ID: 881 + ? + PORT_ID: 486 + : + PC_PHYS_PORT_ID: 889 + ? + PORT_ID: 506 + : + PC_PHYS_PORT_ID: 897 + ? + PORT_ID: 504 + : + PC_PHYS_PORT_ID: 905 + ? + PORT_ID: 505 + : + PC_PHYS_PORT_ID: 913 + ? + PORT_ID: 507 + : + PC_PHYS_PORT_ID: 921 + ? + PORT_ID: 525 + : + PC_PHYS_PORT_ID: 929 + ? + PORT_ID: 524 + : + PC_PHYS_PORT_ID: 937 + ? + PORT_ID: 522 + : + PC_PHYS_PORT_ID: 945 + ? + PORT_ID: 523 + : + PC_PHYS_PORT_ID: 953 + ? + PORT_ID: 541 + : + PC_PHYS_PORT_ID: 961 + ? + PORT_ID: 543 + : + PC_PHYS_PORT_ID: 969 + ? + PORT_ID: 542 + : + PC_PHYS_PORT_ID: 977 + ? + PORT_ID: 540 + : + PC_PHYS_PORT_ID: 985 + ? + PORT_ID: 558 + : + PC_PHYS_PORT_ID: 993 + ? + PORT_ID: 559 + : + PC_PHYS_PORT_ID: 1001 + ? + PORT_ID: 561 + : + PC_PHYS_PORT_ID: 1009 + ? + PORT_ID: 560 + : + PC_PHYS_PORT_ID: 1017 + ? + PORT_ID: 268 + : + PC_PHYS_PORT_ID: 1026 +... +--- +device: + 0: + PC_PORT: + ? + PORT_ID: 0 + : + ENABLE: 1 + SPEED: 10000 + NUM_LANES: 1 + FEC_MODE: PC_FEC_NONE + ? + PORT_ID: 268 + : + ENABLE: 0 + SPEED: 100000 + NUM_LANES: 4 + FEC_MODE: PC_FEC_RS528 + MAX_FRAME_SIZE: 9416 + ? + PORT_ID: [[1, 4], + [18, 21], + [36, 39], + [54, 57], + [72, 75], + [90, 93], + [108, 111], + [126, 129], + [144, 147], + [162, 165], + [180, 183], + [198, 201], + [216, 219], + [234, 237], + [252, 255], + [270, 273], + [288, 291], + [306, 309], + [324, 327], + [342, 345], + [360, 363], + [378, 381], + [396, 399], + [414, 417], + [432, 435], + [450, 453], + [468, 471], + [486, 489], + [504, 507], + [522, 525], + [540, 543], + [558, 561]] + : + ENABLE: 0 + SPEED: 800000 + NUM_LANES: 8 + FEC_MODE: PC_FEC_RS544_2XN_ETC + MAX_FRAME_SIZE: 9416 +... +--- +device: + 0: + DEVICE_CONFIG: + AUTOLOAD_BOARD_SETTINGS: 0 +... +--- +device: + '*': + TM_SCHEDULER_CONFIG: + NUM_MC_Q: NUM_MC_Q_4 +... +--- +device: + 0: + # Per pipe flex counter configuration. Enable PPIU Mode + CTR_EFLEX_CONFIG: + CTR_ING_EFLEX_OPERMODE_PIPEUNIQUE: 1 + CTR_ING_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1 + CTR_EGR_EFLEX_OPERMODE_PIPEUNIQUE: 1 + CTR_EGR_EFLEX_OPERMODE_PIPE_INSTANCE_UNIQUE: 1 + + # IFP mode + FP_CONFIG: + FP_ING_OPERMODE: GLOBAL_PIPE_AWARE + + #CTR COS_ENABLE + CTR_ING_COS_Q_CONFIG: + COS_ENABLE: 0 +... diff --git a/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/Nokia-IXR7220-H6-P128/hwsku.json b/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/Nokia-IXR7220-H6-P128/hwsku.json new file mode 100644 index 00000000000..6db2ed9238d --- /dev/null +++ b/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/Nokia-IXR7220-H6-P128/hwsku.json @@ -0,0 +1,391 @@ +{ + "interfaces": { + "Ethernet0": { + "default_brkout_mode": "1x800G" + }, + "Ethernet8": { + "default_brkout_mode": "1x800G" + }, + "Ethernet16": { + "default_brkout_mode": "1x800G" + }, + "Ethernet24": { + "default_brkout_mode": "1x800G" + }, + "Ethernet32": { + "default_brkout_mode": "1x800G" + }, + "Ethernet40": { + "default_brkout_mode": "1x800G" + }, + "Ethernet48": { + "default_brkout_mode": "1x800G" + }, + "Ethernet56": { + "default_brkout_mode": "1x800G" + }, + "Ethernet64": { + "default_brkout_mode": "1x800G" + }, + "Ethernet72": { + "default_brkout_mode": "1x800G" + }, + "Ethernet80": { + "default_brkout_mode": "1x800G" + }, + "Ethernet88": { + "default_brkout_mode": "1x800G" + }, + "Ethernet96": { + "default_brkout_mode": "1x800G" + }, + "Ethernet104": { + "default_brkout_mode": "1x800G" + }, + "Ethernet112": { + "default_brkout_mode": "1x800G" + }, + "Ethernet120": { + "default_brkout_mode": "1x800G" + }, + "Ethernet128": { + "default_brkout_mode": "1x800G" + }, + "Ethernet136": { + "default_brkout_mode": "1x800G" + }, + "Ethernet144": { + "default_brkout_mode": "1x800G" + }, + "Ethernet152": { + "default_brkout_mode": "1x800G" + }, + "Ethernet160": { + "default_brkout_mode": "1x800G" + }, + "Ethernet168": { + "default_brkout_mode": "1x800G" + }, + "Ethernet176": { + "default_brkout_mode": "1x800G" + }, + "Ethernet184": { + "default_brkout_mode": "1x800G" + }, + "Ethernet192": { + "default_brkout_mode": "1x800G" + }, + "Ethernet200": { + "default_brkout_mode": "1x800G" + }, + "Ethernet208": { + "default_brkout_mode": "1x800G" + }, + "Ethernet216": { + "default_brkout_mode": "1x800G" + }, + "Ethernet224": { + "default_brkout_mode": "1x800G" + }, + "Ethernet232": { + "default_brkout_mode": "1x800G" + }, + "Ethernet240": { + "default_brkout_mode": "1x800G" + }, + "Ethernet248": { + "default_brkout_mode": "1x800G" + }, + "Ethernet256": { + "default_brkout_mode": "1x800G" + }, + "Ethernet264": { + "default_brkout_mode": "1x800G" + }, + "Ethernet272": { + "default_brkout_mode": "1x800G" + }, + "Ethernet280": { + "default_brkout_mode": "1x800G" + }, + "Ethernet288": { + "default_brkout_mode": "1x800G" + }, + "Ethernet296": { + "default_brkout_mode": "1x800G" + }, + "Ethernet304": { + "default_brkout_mode": "1x800G" + }, + "Ethernet312": { + "default_brkout_mode": "1x800G" + }, + "Ethernet320": { + "default_brkout_mode": "1x800G" + }, + "Ethernet328": { + "default_brkout_mode": "1x800G" + }, + "Ethernet336": { + "default_brkout_mode": "1x800G" + }, + "Ethernet344": { + "default_brkout_mode": "1x800G" + }, + "Ethernet352": { + "default_brkout_mode": "1x800G" + }, + "Ethernet360": { + "default_brkout_mode": "1x800G" + }, + "Ethernet368": { + "default_brkout_mode": "1x800G" + }, + "Ethernet376": { + "default_brkout_mode": "1x800G" + }, + "Ethernet384": { + "default_brkout_mode": "1x800G" + }, + "Ethernet392": { + "default_brkout_mode": "1x800G" + }, + "Ethernet400": { + "default_brkout_mode": "1x800G" + }, + "Ethernet408": { + "default_brkout_mode": "1x800G" + }, + "Ethernet416": { + "default_brkout_mode": "1x800G" + }, + "Ethernet424": { + "default_brkout_mode": "1x800G" + }, + "Ethernet432": { + "default_brkout_mode": "1x800G" + }, + "Ethernet440": { + "default_brkout_mode": "1x800G" + }, + "Ethernet448": { + "default_brkout_mode": "1x800G" + }, + "Ethernet456": { + "default_brkout_mode": "1x800G" + }, + "Ethernet464": { + "default_brkout_mode": "1x800G" + }, + "Ethernet472": { + "default_brkout_mode": "1x800G" + }, + "Ethernet480": { + "default_brkout_mode": "1x800G" + }, + "Ethernet488": { + "default_brkout_mode": "1x800G" + }, + "Ethernet496": { + "default_brkout_mode": "1x800G" + }, + "Ethernet504": { + "default_brkout_mode": "1x800G" + }, + "Ethernet512": { + "default_brkout_mode": "1x800G" + }, + "Ethernet520": { + "default_brkout_mode": "1x800G" + }, + "Ethernet528": { + "default_brkout_mode": "1x800G" + }, + "Ethernet536": { + "default_brkout_mode": "1x800G" + }, + "Ethernet544": { + "default_brkout_mode": "1x800G" + }, + "Ethernet552": { + "default_brkout_mode": "1x800G" + }, + "Ethernet560": { + "default_brkout_mode": "1x800G" + }, + "Ethernet568": { + "default_brkout_mode": "1x800G" + }, + "Ethernet576": { + "default_brkout_mode": "1x800G" + }, + "Ethernet584": { + "default_brkout_mode": "1x800G" + }, + "Ethernet592": { + "default_brkout_mode": "1x800G" + }, + "Ethernet600": { + "default_brkout_mode": "1x800G" + }, + "Ethernet608": { + "default_brkout_mode": "1x800G" + }, + "Ethernet616": { + "default_brkout_mode": "1x800G" + }, + "Ethernet624": { + "default_brkout_mode": "1x800G" + }, + "Ethernet632": { + "default_brkout_mode": "1x800G" + }, + "Ethernet640": { + "default_brkout_mode": "1x800G" + }, + "Ethernet648": { + "default_brkout_mode": "1x800G" + }, + "Ethernet656": { + "default_brkout_mode": "1x800G" + }, + "Ethernet664": { + "default_brkout_mode": "1x800G" + }, + "Ethernet672": { + "default_brkout_mode": "1x800G" + }, + "Ethernet680": { + "default_brkout_mode": "1x800G" + }, + "Ethernet688": { + "default_brkout_mode": "1x800G" + }, + "Ethernet696": { + "default_brkout_mode": "1x800G" + }, + "Ethernet704": { + "default_brkout_mode": "1x800G" + }, + "Ethernet712": { + "default_brkout_mode": "1x800G" + }, + "Ethernet720": { + "default_brkout_mode": "1x800G" + }, + "Ethernet728": { + "default_brkout_mode": "1x800G" + }, + "Ethernet736": { + "default_brkout_mode": "1x800G" + }, + "Ethernet744": { + "default_brkout_mode": "1x800G" + }, + "Ethernet752": { + "default_brkout_mode": "1x800G" + }, + "Ethernet760": { + "default_brkout_mode": "1x800G" + }, + "Ethernet768": { + "default_brkout_mode": "1x800G" + }, + "Ethernet776": { + "default_brkout_mode": "1x800G" + }, + "Ethernet784": { + "default_brkout_mode": "1x800G" + }, + "Ethernet792": { + "default_brkout_mode": "1x800G" + }, + "Ethernet800": { + "default_brkout_mode": "1x800G" + }, + "Ethernet808": { + "default_brkout_mode": "1x800G" + }, + "Ethernet816": { + "default_brkout_mode": "1x800G" + }, + "Ethernet824": { + "default_brkout_mode": "1x800G" + }, + "Ethernet832": { + "default_brkout_mode": "1x800G" + }, + "Ethernet840": { + "default_brkout_mode": "1x800G" + }, + "Ethernet848": { + "default_brkout_mode": "1x800G" + }, + "Ethernet856": { + "default_brkout_mode": "1x800G" + }, + "Ethernet864": { + "default_brkout_mode": "1x800G" + }, + "Ethernet872": { + "default_brkout_mode": "1x800G" + }, + "Ethernet880": { + "default_brkout_mode": "1x800G" + }, + "Ethernet888": { + "default_brkout_mode": "1x800G" + }, + "Ethernet896": { + "default_brkout_mode": "1x800G" + }, + "Ethernet904": { + "default_brkout_mode": "1x800G" + }, + "Ethernet912": { + "default_brkout_mode": "1x800G" + }, + "Ethernet920": { + "default_brkout_mode": "1x800G" + }, + "Ethernet928": { + "default_brkout_mode": "1x800G" + }, + "Ethernet936": { + "default_brkout_mode": "1x800G" + }, + "Ethernet944": { + "default_brkout_mode": "1x800G" + }, + "Ethernet952": { + "default_brkout_mode": "1x800G" + }, + "Ethernet960": { + "default_brkout_mode": "1x800G" + }, + "Ethernet968": { + "default_brkout_mode": "1x800G" + }, + "Ethernet976": { + "default_brkout_mode": "1x800G" + }, + "Ethernet984": { + "default_brkout_mode": "1x800G" + }, + "Ethernet992": { + "default_brkout_mode": "1x800G" + }, + "Ethernet1000": { + "default_brkout_mode": "1x800G" + }, + "Ethernet1008": { + "default_brkout_mode": "1x800G" + }, + "Ethernet1016": { + "default_brkout_mode": "1x800G" + }, + "Ethernet1024": { + "default_brkout_mode": "1x100G" + } + } +} diff --git a/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/Nokia-IXR7220-H6-P128/pg_profile_lookup.ini b/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/Nokia-IXR7220-H6-P128/pg_profile_lookup.ini new file mode 100644 index 00000000000..6c81abf0f60 --- /dev/null +++ b/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/Nokia-IXR7220-H6-P128/pg_profile_lookup.ini @@ -0,0 +1,43 @@ +# PG lossless profiles. +# TH6: cell size = 420 bytes +# speed cable size xon xoff threshold xon_offset + 10000 5m 8400 0 54180 0 4200 + 25000 5m 8400 0 80220 0 4200 + 40000 5m 8400 0 100380 0 4200 + 50000 5m 8400 0 135660 0 4200 + 100000 5m 8400 0 125580 0 4200 + 200000 5m 8400 0 261660 0 4200 + 400000 5m 8400 0 464520 0 4200 + 800000 5m 8400 0 797580 0 4200 + 10000 30m 8400 0 55860 0 4200 + 25000 30m 8400 0 80220 0 4200 + 40000 30m 8400 0 105840 0 4200 + 50000 30m 8400 0 141960 0 4200 + 100000 30m 8400 0 130200 0 4200 + 200000 30m 8400 0 270900 0 4200 + 400000 30m 8400 0 483420 0 4200 + 800000 30m 8400 0 835380 0 4200 + 10000 40m 8400 0 56280 0 4200 + 25000 40m 8400 0 80220 0 4200 + 40000 40m 8400 0 107940 0 4200 + 50000 40m 8400 0 144480 0 4200 + 100000 40m 8400 0 131880 0 4200 + 200000 40m 8400 0 274260 0 4200 + 400000 40m 8400 0 490980 0 4200 + 800000 40m 8400 0 850080 0 4200 + 10000 300m 8400 0 69300 0 4200 + 25000 300m 8400 0 119280 0 4200 + 40000 300m 8400 0 162540 0 4200 + 50000 300m 8400 0 212940 0 4200 + 100000 300m 8400 0 180180 0 4200 + 200000 300m 8400 0 371700 0 4200 + 400000 300m 8400 0 686280 0 4200 + 800000 300m 8400 0 1239840 0 4200 + 10000 500m 8400 0 79380 0 4200 + 25000 500m 8400 0 149520 0 4200 + 40000 500m 8400 0 204540 0 4200 + 50000 500m 8400 0 265860 0 4200 + 100000 500m 8400 0 217560 0 4200 + 200000 500m 8400 0 446880 0 4200 + 400000 500m 8400 0 836640 0 4200 + 800000 500m 8400 0 1539720 0 4200 diff --git a/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/Nokia-IXR7220-H6-P128/port_config.ini b/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/Nokia-IXR7220-H6-P128/port_config.ini new file mode 100644 index 00000000000..a6514196abf --- /dev/null +++ b/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/Nokia-IXR7220-H6-P128/port_config.ini @@ -0,0 +1,130 @@ +# name lanes alias index speed fec +Ethernet0 153,154,155,156,157,158,159,160 etp1 1 800000 rs +Ethernet8 161,162,163,164,165,166,167,168 etp2 2 800000 rs +Ethernet16 145,146,147,148,149,150,151,152 etp3 3 800000 rs +Ethernet24 129,130,131,132,133,134,135,136 etp4 4 800000 rs +Ethernet32 137,138,139,140,141,142,143,144 etp5 5 800000 rs +Ethernet40 169,170,171,172,173,174,175,176 etp6 6 800000 rs +Ethernet48 177,178,179,180,181,182,183,184 etp7 7 800000 rs +Ethernet56 185,186,187,188,189,190,191,192 etp8 8 800000 rs +Ethernet64 225,226,227,228,229,230,231,232 etp9 9 800000 rs +Ethernet72 217,218,219,220,221,222,223,224 etp10 10 800000 rs +Ethernet80 193,194,195,196,197,198,199,200 etp11 11 800000 rs +Ethernet88 209,210,211,212,213,214,215,216 etp12 12 800000 rs +Ethernet96 233,234,235,236,237,238,239,240 etp13 13 800000 rs +Ethernet104 201,202,203,204,205,206,207,208 etp14 14 800000 rs +Ethernet112 249,250,251,252,253,254,255,256 etp15 15 800000 rs +Ethernet120 241,242,243,244,245,246,247,248 etp16 16 800000 rs +Ethernet128 817,818,819,820,821,822,823,824 etp17 17 800000 rs +Ethernet136 825,826,827,828,829,830,831,832 etp18 18 800000 rs +Ethernet144 777,778,779,780,781,782,783,784 etp19 19 800000 rs +Ethernet152 809,810,811,812,813,814,815,816 etp20 20 800000 rs +Ethernet160 785,786,787,788,789,790,791,792 etp21 21 800000 rs +Ethernet168 769,770,771,772,773,774,775,776 etp22 22 800000 rs +Ethernet176 793,794,795,796,797,798,799,800 etp23 23 800000 rs +Ethernet184 801,802,803,804,805,806,807,808 etp24 24 800000 rs +Ethernet192 889,890,891,892,893,894,895,896 etp25 25 800000 rs +Ethernet200 881,882,883,884,885,886,887,888 etp26 26 800000 rs +Ethernet208 873,874,875,876,877,878,879,880 etp27 27 800000 rs +Ethernet216 841,842,843,844,845,846,847,848 etp28 28 800000 rs +Ethernet224 833,834,835,836,837,838,839,840 etp29 29 800000 rs +Ethernet232 849,850,851,852,853,854,855,856 etp30 30 800000 rs +Ethernet240 865,866,867,868,869,870,871,872 etp31 31 800000 rs +Ethernet248 857,858,859,860,861,862,863,864 etp32 32 800000 rs +Ethernet256 289,290,291,292,293,294,295,296 etp33 33 800000 rs +Ethernet264 257,258,259,260,261,262,263,264 etp34 34 800000 rs +Ethernet272 297,298,299,300,301,302,303,304 etp35 35 800000 rs +Ethernet280 313,314,315,316,317,318,319,320 etp36 36 800000 rs +Ethernet288 369,370,371,372,373,374,375,376 etp37 37 800000 rs +Ethernet296 329,330,331,332,333,334,335,336 etp38 38 800000 rs +Ethernet304 337,338,339,340,341,342,343,344 etp39 39 800000 rs +Ethernet312 345,346,347,348,349,350,351,352 etp40 40 800000 rs +Ethernet320 417,418,419,420,421,422,423,424 etp41 41 800000 rs +Ethernet328 385,386,387,388,389,390,391,392 etp42 42 800000 rs +Ethernet336 425,426,427,428,429,430,431,432 etp43 43 800000 rs +Ethernet344 441,442,443,444,445,446,447,448 etp44 44 800000 rs +Ethernet352 497,498,499,500,501,502,503,504 etp45 45 800000 rs +Ethernet360 457,458,459,460,461,462,463,464 etp46 46 800000 rs +Ethernet368 465,466,467,468,469,470,471,472 etp47 47 800000 rs +Ethernet376 473,474,475,476,477,478,479,480 etp48 48 800000 rs +Ethernet384 545,546,547,548,549,550,551,552 etp49 49 800000 rs +Ethernet392 513,514,515,516,517,518,519,520 etp50 50 800000 rs +Ethernet400 553,554,555,556,557,558,559,560 etp51 51 800000 rs +Ethernet408 569,570,571,572,573,574,575,576 etp52 52 800000 rs +Ethernet416 625,626,627,628,629,630,631,632 etp53 53 800000 rs +Ethernet424 585,586,587,588,589,590,591,592 etp54 54 800000 rs +Ethernet432 593,594,595,596,597,598,599,600 etp55 55 800000 rs +Ethernet440 601,602,603,604,605,606,607,608 etp56 56 800000 rs +Ethernet448 673,674,675,676,677,678,679,680 etp57 57 800000 rs +Ethernet456 641,642,643,644,645,646,647,648 etp58 58 800000 rs +Ethernet464 681,682,683,684,685,686,687,688 etp59 59 800000 rs +Ethernet472 697,698,699,700,701,702,703,704 etp60 60 800000 rs +Ethernet480 753,754,755,756,757,758,759,760 etp61 61 800000 rs +Ethernet488 713,714,715,716,717,718,719,720 etp62 62 800000 rs +Ethernet496 721,722,723,724,725,726,727,728 etp63 63 800000 rs +Ethernet504 729,730,731,732,733,734,735,736 etp64 64 800000 rs +Ethernet512 281,282,283,284,285,286,287,288 etp65 65 800000 rs +Ethernet520 273,274,275,276,277,278,279,280 etp66 66 800000 rs +Ethernet528 265,266,267,268,269,270,271,272 etp67 67 800000 rs +Ethernet536 305,306,307,308,309,310,311,312 etp68 68 800000 rs +Ethernet544 377,378,379,380,381,382,383,384 etp69 69 800000 rs +Ethernet552 361,362,363,364,365,366,367,368 etp70 70 800000 rs +Ethernet560 321,322,323,324,325,326,327,328 etp71 71 800000 rs +Ethernet568 353,354,355,356,357,358,359,360 etp72 72 800000 rs +Ethernet576 409,410,411,412,413,414,415,416 etp73 73 800000 rs +Ethernet584 401,402,403,404,405,406,407,408 etp74 74 800000 rs +Ethernet592 393,394,395,396,397,398,399,400 etp75 75 800000 rs +Ethernet600 433,434,435,436,437,438,439,440 etp76 76 800000 rs +Ethernet608 505,506,507,508,509,510,511,512 etp77 77 800000 rs +Ethernet616 489,490,491,492,493,494,495,496 etp78 78 800000 rs +Ethernet624 449,450,451,452,453,454,455,456 etp79 79 800000 rs +Ethernet632 481,482,483,484,485,486,487,488 etp80 80 800000 rs +Ethernet640 537,538,539,540,541,542,543,544 etp81 81 800000 rs +Ethernet648 529,530,531,532,533,534,535,536 etp82 82 800000 rs +Ethernet656 521,522,523,524,525,526,527,528 etp83 83 800000 rs +Ethernet664 561,562,563,564,565,566,567,568 etp84 84 800000 rs +Ethernet672 633,634,635,636,637,638,639,640 etp85 85 800000 rs +Ethernet680 617,618,619,620,621,622,623,624 etp86 86 800000 rs +Ethernet688 577,578,579,580,581,582,583,584 etp87 87 800000 rs +Ethernet696 609,610,611,612,613,614,615,616 etp88 88 800000 rs +Ethernet704 665,666,667,668,669,670,671,672 etp89 89 800000 rs +Ethernet712 657,658,659,660,661,662,663,664 etp90 90 800000 rs +Ethernet720 649,650,651,652,653,654,655,656 etp91 91 800000 rs +Ethernet728 689,690,691,692,693,694,695,696 etp92 92 800000 rs +Ethernet736 761,762,763,764,765,766,767,768 etp93 93 800000 rs +Ethernet744 745,746,747,748,749,750,751,752 etp94 94 800000 rs +Ethernet752 705,706,707,708,709,710,711,712 etp95 95 800000 rs +Ethernet760 737,738,739,740,741,742,743,744 etp96 96 800000 rs +Ethernet768 97,98,99,100,101,102,103,104 etp97 97 800000 rs +Ethernet776 89,90,91,92,93,94,95,96 etp98 98 800000 rs +Ethernet784 65,66,67,68,69,70,71,72 etp99 99 800000 rs +Ethernet792 81,82,83,84,85,86,87,88 etp100 100 800000 rs +Ethernet800 105,106,107,108,109,110,111,112 etp101 101 800000 rs +Ethernet808 73,74,75,76,77,78,79,80 etp102 102 800000 rs +Ethernet816 121,122,123,124,125,126,127,128 etp103 103 800000 rs +Ethernet824 113,114,115,116,117,118,119,120 etp104 104 800000 rs +Ethernet832 49,50,51,52,53,54,55,56 etp105 105 800000 rs +Ethernet840 57,58,59,60,61,62,63,64 etp106 106 800000 rs +Ethernet848 9,10,11,12,13,14,15,16 etp107 107 800000 rs +Ethernet856 41,42,43,44,45,46,47,48 etp108 108 800000 rs +Ethernet864 17,18,19,20,21,22,23,24 etp109 109 800000 rs +Ethernet872 1,2,3,4,5,6,7,8 etp110 110 800000 rs +Ethernet880 25,26,27,28,29,30,31,32 etp111 111 800000 rs +Ethernet888 33,34,35,36,37,38,39,40 etp112 112 800000 rs +Ethernet896 993,994,995,996,997,998,999,1000 etp113 113 800000 rs +Ethernet904 985,986,987,988,989,990,991,992 etp114 114 800000 rs +Ethernet912 961,962,963,964,965,966,967,968 etp115 115 800000 rs +Ethernet920 977,978,979,980,981,982,983,984 etp116 116 800000 rs +Ethernet928 1001,1002,1003,1004,1005,1006,1007,1008 etp117 117 800000 rs +Ethernet936 969,970,971,972,973,974,975,976 etp118 118 800000 rs +Ethernet944 1017,1018,1019,1020,1021,1022,1023,1024 etp119 119 800000 rs +Ethernet952 1009,1010,1011,1012,1013,1014,1015,1016 etp120 120 800000 rs +Ethernet960 945,946,947,948,949,950,951,952 etp121 121 800000 rs +Ethernet968 953,954,955,956,957,958,959,960 etp122 122 800000 rs +Ethernet976 905,906,907,908,909,910,911,912 etp123 123 800000 rs +Ethernet984 937,938,939,940,941,942,943,944 etp124 124 800000 rs +Ethernet992 913,914,915,916,917,918,919,920 etp125 125 800000 rs +Ethernet1000 897,898,899,900,901,902,903,904 etp126 126 800000 rs +Ethernet1008 921,922,923,924,925,926,927,928 etp127 127 800000 rs +Ethernet1016 929,930,931,932,933,934,935,936 etp128 128 800000 rs +Ethernet1024 1026,1027,1028,1029 etp129 129 100000 rs diff --git a/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/Nokia-IXR7220-H6-P128/profile.ini b/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/Nokia-IXR7220-H6-P128/profile.ini new file mode 100644 index 00000000000..4eda67c91a6 --- /dev/null +++ b/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/Nokia-IXR7220-H6-P128/profile.ini @@ -0,0 +1 @@ +switchMacAddress=XX:XX:XX:XX:XX:XX diff --git a/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/Nokia-IXR7220-H6-P128/qos.json.j2 b/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/Nokia-IXR7220-H6-P128/qos.json.j2 new file mode 100644 index 00000000000..3e548325ea3 --- /dev/null +++ b/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/Nokia-IXR7220-H6-P128/qos.json.j2 @@ -0,0 +1 @@ +{%- include 'qos_config.j2' %} diff --git a/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/Nokia-IXR7220-H6-P128/sai.profile b/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/Nokia-IXR7220-H6-P128/sai.profile new file mode 100644 index 00000000000..b3c35341352 --- /dev/null +++ b/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/Nokia-IXR7220-H6-P128/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/h6-128.yml diff --git a/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/custom_led.bin b/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/custom_led.bin new file mode 100644 index 00000000000..77ae2d95146 Binary files /dev/null and b/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/custom_led.bin differ diff --git a/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/default_sku b/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/default_sku new file mode 100644 index 00000000000..32944fe5d37 --- /dev/null +++ b/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/default_sku @@ -0,0 +1 @@ +Nokia-IXR7220-H6-P128 t1 diff --git a/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/installer.conf b/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/installer.conf new file mode 100644 index 00000000000..dc2b8b34821 --- /dev/null +++ b/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/installer.conf @@ -0,0 +1,2 @@ +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="tpm_tis.interrupts=0 idle=poll" +ONIE_IMAGE_PART_SIZE=600000 diff --git a/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/led_proc_init.soc b/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/led_proc_init.soc new file mode 100644 index 00000000000..eda09a0dd1f --- /dev/null +++ b/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/led_proc_init.soc @@ -0,0 +1,4 @@ +led stop +led load /usr/share/sonic/platform/custom_led.bin +led auto on +led start diff --git a/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/media_settings.json b/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/media_settings.json new file mode 100644 index 00000000000..1b844296afe --- /dev/null +++ b/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/media_settings.json @@ -0,0 +1,11195 @@ +{ + "PORT_MEDIA_SETTINGS": { + "1": { + "OPTICAL100": { + "pre3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre2": { + "lane0": "0x8", + "lane1": "0x8", + "lane2": "0x8", + "lane3": "0x8", + "lane4": "0x8", + "lane5": "0x8", + "lane6": "0x8", + "lane7": "0x8" + }, + "pre1": { + "lane0": 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"129": { + "OPTICAL25": { + "media_type": "fiber", + "pre1": { + "lane0": "0x2", + "lane1": "0x2", + "lane2": "0x2", + "lane3": "0x2" + }, + "main": { + "lane0": "0x1F", + "lane1": "0x1F", + "lane2": "0x1F", + "lane3": "0x1F" + }, + "post1": { + "lane0": "0xD", + "lane1": "0xD", + "lane2": "0xD", + "lane3": "0xD" + } + } + } + } +} diff --git a/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/optics_si_settings.json b/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/optics_si_settings.json new file mode 100644 index 00000000000..e3d5f2f813c --- /dev/null +++ b/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/optics_si_settings.json @@ -0,0 +1,20 @@ +{ + "GLOBAL_MEDIA_SETTINGS": { + "45-52,77-84": { + "100G_SPEED": { + "EOPTOLINK-EO138HGPCT\\d{2}SL1": { + "FixedInputEqTargetTx": { + "FixedInputEqTargetTx1": 4, + "FixedInputEqTargetTx2": 4, + "FixedInputEqTargetTx3": 4, + "FixedInputEqTargetTx4": 4, + "FixedInputEqTargetTx5": 4, + "FixedInputEqTargetTx6": 4, + "FixedInputEqTargetTx7": 4, + "FixedInputEqTargetTx8": 4 + } + } + } + } + } +} diff --git a/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/pcie.yaml b/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/pcie.yaml new file mode 100644 index 00000000000..7aa1ec70f6f --- /dev/null +++ b/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/pcie.yaml @@ -0,0 +1,228 @@ +- bus: '00' + dev: '00' + fn: '0' + id: 14d8 + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge Root + Complex' +- bus: '00' + dev: '00' + fn: '2' + id: 14d9 + name: 'IOMMU: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge IOMMU' +- bus: '00' + dev: '01' + fn: '0' + id: 14da + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge Dummy + Host Bridge' +- bus: '00' + dev: '01' + fn: '1' + id: 14db + name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge GPP + Bridge' +- bus: '00' + dev: '01' + fn: '2' + id: 14db + name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge GPP + Bridge' +- bus: '00' + dev: '01' + fn: '3' + id: 14db + name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge GPP + Bridge' +- bus: '00' + dev: '01' + fn: '4' + id: 14db + name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge GPP + Bridge' +- bus: '00' + dev: '02' + fn: '0' + id: 14da + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge Dummy + Host Bridge' +- bus: '00' + dev: '02' + fn: '1' + id: 14db + name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge GPP + Bridge' +- bus: '00' + dev: '02' + fn: '2' + id: 14db + name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge GPP + Bridge' +- bus: '00' + dev: '03' + fn: '0' + id: 14da + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge Dummy + Host Bridge' +- bus: '00' + dev: '04' + fn: '0' + id: 14da + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge Dummy + Host Bridge' +- bus: '00' + dev: 08 + fn: '0' + id: 14da + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge Dummy + Host Bridge' +- bus: '00' + dev: 08 + fn: '1' + id: 14dd + name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge Internal + GPP Bridge to Bus [C:A]' +- bus: '00' + dev: 08 + fn: '3' + id: 14dd + name: 'PCI bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge Internal + GPP Bridge to Bus [C:A]' +- bus: '00' + dev: '14' + fn: '0' + id: 790b + name: 'SMBus: Advanced Micro Devices, Inc. [AMD] FCH SMBus Controller (rev 71)' +- bus: '00' + dev: '14' + fn: '3' + id: 790e + name: 'ISA bridge: Advanced Micro Devices, Inc. [AMD] FCH LPC Bridge (rev 51)' +- bus: '00' + dev: '18' + fn: '0' + id: 14e0 + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge Data + Fabric; Function 0' +- bus: '00' + dev: '18' + fn: '1' + id: 14e1 + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge Data + Fabric; Function 1' +- bus: '00' + dev: '18' + fn: '2' + id: 14e2 + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge Data + Fabric; Function 2' +- bus: '00' + dev: '18' + fn: '3' + id: 14e3 + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge Data + Fabric; Function 3' +- bus: '00' + dev: '18' + fn: '4' + id: 14e4 + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge Data + Fabric; Function 4' +- bus: '00' + dev: '18' + fn: '5' + id: 14e5 + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge Data + Fabric; Function 5' +- bus: '00' + dev: '18' + fn: '6' + id: 14e6 + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge Data + Fabric; Function 6' +- bus: '00' + dev: '18' + fn: '7' + id: 14e7 + name: 'Host bridge: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge Data + Fabric; Function 7' +- bus: '01' + dev: '00' + fn: '0' + id: f910 + name: 'Ethernet controller: Broadcom Inc. and subsidiaries BCM78910 Switch ASIC + [Tomahawk6] (rev 01)' +- bus: '02' + dev: '00' + fn: '0' + id: '7021' + name: 'Memory controller: Xilinx Corporation Device 7021' +- bus: '03' + dev: '00' + fn: '0' + id: 16d6 + name: 'Ethernet controller: Broadcom Inc. and subsidiaries BCM57412 NetXtreme-E + 10Gb RDMA Ethernet Controller (rev 01)' +- bus: '03' + dev: '00' + fn: '1' + id: 16d6 + name: 'Ethernet controller: Broadcom Inc. and subsidiaries BCM57412 NetXtreme-E + 10Gb RDMA Ethernet Controller (rev 01)' +- bus: '04' + dev: '00' + fn: '0' + id: '5236' + name: 'Non-Volatile memory controller: Innodisk Corporation PCIe 4TG2-P Controller + (rev 01)' +- bus: '05' + dev: '00' + fn: '0' + id: '1533' + name: 'Ethernet controller: Intel Corporation I210 Gigabit Network Connection (rev + 03)' +- bus: '06' + dev: '00' + fn: '0' + id: '1150' + name: 'PCI bridge: ASPEED Technology, Inc. AST1150 PCI-to-PCI Bridge (rev 11)' +- bus: 08 + dev: '00' + fn: '0' + id: 14de + name: 'Non-Essential Instrumentation [1300]: Advanced Micro Devices, Inc. [AMD] + Raphael/Granite Ridge PCIe Dummy Function' +- bus: 08 + dev: '00' + fn: '2' + id: '1649' + name: 'Encryption controller: Advanced Micro Devices, Inc. [AMD] Family 19h PSP/CCP' +- bus: 08 + dev: '00' + fn: '3' + id: 15b6 + name: 'USB controller: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge + USB 3.1 xHCI' +- bus: 08 + dev: '00' + fn: '4' + id: 15b7 + name: 'USB controller: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge + USB 3.1 xHCI' +- bus: 08 + dev: '00' + fn: '5' + id: 15e2 + name: 'Multimedia controller: Advanced Micro Devices, Inc. [AMD] Audio Coprocessor + (rev 62)' +- bus: 08 + dev: '00' + fn: '6' + id: 15e3 + name: 'Audio device: Advanced Micro Devices, Inc. [AMD] Family 17h/19h/1ah HD Audio + Controller' +- bus: 09 + dev: '00' + fn: '0' + id: 15b8 + name: 'USB controller: Advanced Micro Devices, Inc. [AMD] Raphael/Granite Ridge + USB 2.0 xHCI' \ No newline at end of file diff --git a/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/platform.json b/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/platform.json new file mode 100644 index 00000000000..95b09ca7e89 --- /dev/null +++ b/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/platform.json @@ -0,0 +1,5023 @@ +{ + "chassis": { + "name": "7220 IXR-H6-128", + "components": [ + { + "name": "BIOS" + }, + { + "name": "CB_FPGA" + }, + { + "name": "MB_FPGA" + }, + { + "name": "MB_PORT_FPGA_0" + }, + { + "name": "MB_PORT_FPGA_1" + }, + { + "name": "UDB_LPORT_FPGA" + }, + { + "name": "UDB_RPORT_FPGA" + }, + { + "name": "LDB_LPORT_FPGA" + }, + { + "name": "LDB_RPORT_FPGA" + }, + { + "name": "FCM0_CPLD" + }, + { + "name": "FCM1_CPLD" + } + ], + "fans": [ + { + "name": "Fan1", + "status_led": { + "controllable": false + } + }, + { + "name": "Fan2", + "status_led": { + "controllable": false + } + }, + { + "name": "Fan3", + "status_led": { + "controllable": false + } + }, + { + "name": "Fan4", + "status_led": { + "controllable": false + } + }, + { + "name": "Fan5", + "status_led": { + "controllable": false + } + }, + { + "name": "Fan6", + "status_led": { + "controllable": false + } + }, + { + "name": "Fan7", + "status_led": { + "controllable": false + } + }, + { + "name": "Fan8", + "status_led": { + "controllable": false + } + }, + { + "name": "Fan9", + "status_led": { + "controllable": false + } + }, + { + "name": "Fan10", + "status_led": { + "controllable": false + } + }, + { + "name": "Fan11", + "status_led": { + "controllable": false + } + }, + { + "name": "Fan12", + "status_led": { + "controllable": false + } + }, + { + "name": "Fan13", + "status_led": { + "controllable": false + } + }, + { + "name": "Fan14", + "status_led": { + "controllable": false + } + }, + { + "name": "Fan15", + "status_led": { + "controllable": false + } + }, + { + "name": "Fan16", + "status_led": { + "controllable": false + } + }, + { + "supported_speeds": "40,46,53,60,66,73,80,86,93,100" + } + ], + "fan_drawers": [ + { + "name": "drawer1", + "status_led": { + "controllable": false + }, + "max_consumed_power": false, + "fans": [ + { + "name": "Fan1", + "status_led": { + "controllable": false + } + }, + { + "name": "Fan2", + "status_led": { + "controllable": false + } + } + ] + }, + { + "name": "drawer2", + "status_led": { + "controllable": false + }, + "max_consumed_power": false, + "fans": [ + { + "name": "Fan3", + "status_led": { + "controllable": false + } + }, + { + "name": "Fan4", + "status_led": { + "controllable": false + } + } + ] + }, + { + "name": "drawer3", + "status_led": { + "controllable": false + }, + "max_consumed_power": false, + "fans": [ + { + "name": "Fan5", + "status_led": { + "controllable": false + } + }, + { + "name": "Fan6", + "status_led": { + "controllable": false + } + } + ] + }, + { + "name": "drawer4", + "status_led": { + "controllable": false + }, + "max_consumed_power": false, + "fans": [ + { + "name": "Fan7", + "status_led": { + "controllable": false + } + }, + { + "name": "Fan8", + "status_led": { + "controllable": false + } + } + ] + }, + { + "name": "drawer5", + "status_led": { + "controllable": false + }, + "max_consumed_power": false, + "fans": [ + { + "name": "Fan9", + "status_led": { + "controllable": false + } + }, + { + "name": "Fan10", + "status_led": { + "controllable": false + } + } + ] + }, + { + "name": "drawer6", + "status_led": { + "controllable": false + }, + "max_consumed_power": false, + "fans": [ + { + "name": "Fan11", + "status_led": { + "controllable": false + } + }, + { + "name": "Fan12", + "status_led": { + "controllable": false + } + } + ] + }, + { + "name": "drawer7", + "status_led": { + "controllable": false + }, + "max_consumed_power": false, + "fans": [ + { + "name": "Fan13", + "status_led": { + "controllable": false + } + }, + { + "name": "Fan14", + "status_led": { + "controllable": false + } + } + ] + }, + { + "name": "drawer8", + "status_led": { + "controllable": false + }, + "max_consumed_power": false, + "fans": [ + { + "name": "Fan15", + "status_led": { + "controllable": false + } + }, + { + "name": "Fan16", + "status_led": { + "controllable": false + } + } + ] + } + ], + "psus": [ + { + "name": "PSU1", + "status_led": { + "controllable": false + }, + "current": true, + "power": true, + "max_power": false, + "voltage_high_threshold": false, + "voltage_low_threshold": false, + "temperature": false + }, + { + "name": "PSU2", + "status_led": { + "controllable": false + }, + "current": true, + "power": true, + "max_power": false, + "voltage_high_threshold": false, + "voltage_low_threshold": false, + "temperature": false + }, + { + "name": "PSU3", + "status_led": { + "controllable": false + }, + "current": true, + "power": true, + "max_power": false, + "voltage_high_threshold": false, + "voltage_low_threshold": false, + "temperature": false + }, + { + "name": "PSU4", + "status_led": { + "controllable": false + }, + "current": true, + "power": true, + "max_power": false, + "voltage_high_threshold": false, + "voltage_low_threshold": false, + "temperature": false + } + ], + "thermals": [ + { + "name": "Carrier Board", + "controllable": false, + "low-threshold": false, + "high-threshold": true, + "low-crit-threshold": false, + "high-crit-threshold": true + }, + { + "name": "MB Top U34", + "controllable": false, + "low-threshold": false, + "high-threshold": true, + "low-crit-threshold": false, + "high-crit-threshold": true + }, + { + "name": "MB Top U178", + "controllable": false, + "low-threshold": false, + "high-threshold": true, + "low-crit-threshold": false, + "high-crit-threshold": true + }, + { + "name": "MB Bottom U196", + "controllable": false, + "low-threshold": false, + "high-threshold": true, + "low-crit-threshold": false, + "high-crit-threshold": true + }, + { + "name": "MB Bottom U183", + "controllable": false, + "low-threshold": false, + "high-threshold": true, + "low-crit-threshold": false, + "high-crit-threshold": true + }, + { + "name": "MB Top U3", + "controllable": false, + "low-threshold": false, + "high-threshold": true, + "low-crit-threshold": false, + "high-crit-threshold": true + }, + { + "name": "MB Top U15", + "controllable": false, + "low-threshold": false, + "high-threshold": true, + "low-crit-threshold": false, + "high-crit-threshold": true + }, + { + "name": "LDB Left", + "controllable": false, + "low-threshold": false, + "high-threshold": true, + "low-crit-threshold": false, + "high-crit-threshold": true + }, + { + "name": "LDB Right", + "controllable": false, + "low-threshold": false, + "high-threshold": true, + "low-crit-threshold": false, + "high-crit-threshold": false + }, + { + "name": "UDB Left", + "controllable": false, + "low-threshold": false, + "high-threshold": true, + "low-crit-threshold": false, + "high-crit-threshold": true + }, + { + "name": "UDB Right", + "controllable": false, + "low-threshold": false, + "high-threshold": true, + "low-crit-threshold": false, + "high-crit-threshold": true + }, + { + "name": "Top FCM 1", + "controllable": false, + "low-threshold": false, + "high-threshold": true, + "low-crit-threshold": false, + "high-crit-threshold": true + }, + { + "name": "Top FCM 2", + "controllable": false, + "low-threshold": false, + "high-threshold": true, + "low-crit-threshold": false, + "high-crit-threshold": true + }, + { + "name": "Bottom FCM 1", + "controllable": false, + "low-threshold": false, + "high-threshold": true, + "low-crit-threshold": false, + "high-crit-threshold": true + }, + { + "name": "Bottom FCM 2", + "controllable": false, + "low-threshold": false, + "high-threshold": true, + "low-crit-threshold": false, + "high-crit-threshold": true + }, + { + "name": "CPU", + "controllable": false, + "low-threshold": false, + "high-threshold": true, + "low-crit-threshold": false, + "high-crit-threshold": true + }, + { + "name": "DDR", + "controllable": false, + "low-threshold": false, + "high-threshold": true, + "low-crit-threshold": false, + "high-crit-threshold": true + }, + { + "name": "Max Port Temp.", + "controllable": false, + "low-threshold": false, + "high-threshold": true, + "low-crit-threshold": false, + "high-crit-threshold": true + }, + { + "name": "SSD", + "controllable": false, + "low-threshold": false, + "high-threshold": true, + "low-crit-threshold": false, + "high-crit-threshold": true + }, + { + "name": "ASIC TH6", + "controllable": false, + "low-threshold": false, + "high-threshold": true, + "low-crit-threshold": false, + "high-crit-threshold": true + } + ], + "sfps": [ + { + "name": "OSFP_1" + }, + { + "name": "OSFP_2" + }, + { + "name": "OSFP_3" + }, + { + "name": "OSFP_4" + }, + { + "name": "OSFP_5" + }, + { + "name": "OSFP_6" + }, + { + "name": "OSFP_7" + }, + { + "name": "OSFP_8" + }, + { + "name": "OSFP_9" + }, + { + "name": "OSFP_10" + }, + { + "name": "OSFP_11" + }, + { + "name": "OSFP_12" + }, + { + "name": "OSFP_13" + }, + { + "name": "OSFP_14" + }, + { + "name": "OSFP_15" + }, + { + "name": "OSFP_16" + }, + { + "name": "OSFP_17" + }, + { + "name": "OSFP_18" + }, + { + "name": "OSFP_19" + }, + { + "name": "OSFP_20" + }, + { + "name": "OSFP_21" + }, + { + "name": "OSFP_22" + }, + { + "name": "OSFP_23" + }, + { + "name": "OSFP_24" + }, + { + "name": "OSFP_25" + }, + { + "name": "OSFP_26" + }, + { + "name": "OSFP_27" + }, + { + "name": "OSFP_28" + }, + { + "name": "OSFP_29" + }, + { + "name": "OSFP_30" + }, + { + "name": "OSFP_31" + }, + { + "name": "OSFP_32" + }, + { + "name": "OSFP_33" + }, + { + "name": "OSFP_34" + }, + { + "name": "OSFP_35" + }, + { + "name": "OSFP_36" + }, + { + "name": "OSFP_37" + }, + { + "name": "OSFP_38" + }, + { + "name": "OSFP_39" + }, + { + "name": "OSFP_40" + }, + { + "name": "OSFP_41" + }, + { + "name": "OSFP_42" + }, + { + "name": "OSFP_43" + }, + { + "name": "OSFP_44" + }, + { + "name": "OSFP_45" + }, + { + "name": "OSFP_46" + }, + { + "name": "OSFP_47" + }, + { + "name": "OSFP_48" + }, + { + "name": "OSFP_49" + }, + { + "name": "OSFP_50" + }, + { + "name": "OSFP_51" + }, + { + "name": "OSFP_52" + }, + { + "name": "OSFP_53" + }, + { + "name": "OSFP_54" + }, + { + "name": "OSFP_55" + }, + { + "name": "OSFP_56" + }, + { + "name": "OSFP_57" + }, + { + "name": "OSFP_58" + }, + { + "name": "OSFP_59" + }, + { + "name": "OSFP_60" + }, + { + "name": "OSFP_61" + }, + { + "name": "OSFP_62" + }, + { + "name": "OSFP_63" + }, + { + "name": "OSFP_64" + }, + { + "name": "OSFP_65" + }, + { + "name": "OSFP_66" + }, + { + "name": "OSFP_67" + }, + { + "name": "OSFP_68" + }, + { + "name": "OSFP_69" + }, + { + "name": "OSFP_70" + }, + { + "name": "OSFP_71" + }, + { + "name": "OSFP_72" + }, + { + "name": "OSFP_73" + }, + { + "name": "OSFP_74" + }, + { + "name": "OSFP_75" + }, + { + "name": "OSFP_76" + }, + { + "name": "OSFP_77" + }, + { + "name": "OSFP_78" + }, + { + "name": "OSFP_79" + }, + { + "name": "OSFP_80" + }, + { + "name": "OSFP_81" + }, + { + "name": "OSFP_82" + }, + { + "name": "OSFP_83" + }, + { + "name": "OSFP_84" + }, + { + "name": "OSFP_85" + }, + { + "name": "OSFP_86" + }, + { + "name": "OSFP_87" + }, + { + "name": "OSFP_88" + }, + { + "name": "OSFP_89" + }, + { + "name": "OSFP_90" + }, + { + "name": "OSFP_91" + }, + { + "name": "OSFP_92" + }, + { + "name": "OSFP_93" + }, + { + "name": "OSFP_94" + }, + { + "name": "OSFP_95" + }, + { + "name": "OSFP_96" + }, + { + "name": "OSFP_97" + }, + { + "name": "OSFP_98" + }, + { + "name": "OSFP_99" + }, + { + "name": "OSFP_100" + }, + { + "name": "OSFP_101" + }, + { + "name": "OSFP_102" + }, + { + "name": "OSFP_103" + }, + { + "name": "OSFP_104" + }, + { + "name": "OSFP_105" + }, + { + "name": "OSFP_106" + }, + { + "name": "OSFP_107" + }, + { + "name": "OSFP_108" + }, + { + "name": "OSFP_109" + }, + { + "name": "OSFP_110" + }, + { + "name": "OSFP_111" + }, + { + "name": "OSFP_112" + }, + { + "name": "OSFP_113" + }, + { + "name": "OSFP_114" + }, + { + "name": "OSFP_115" + }, + { + "name": "OSFP_116" + }, + { + "name": "OSFP_117" + }, + { + "name": "OSFP_118" + }, + { + "name": "OSFP_119" + }, + { + "name": "OSFP_120" + }, + { + "name": "OSFP_121" + }, + { + "name": "OSFP_122" + }, + { + "name": "OSFP_123" + }, + { + "name": "OSFP_124" + }, + { + "name": "OSFP_125" + }, + { + "name": "OSFP_126" + }, + { + "name": "OSFP_127" + }, + { + "name": "OSFP_128" + }, + { + "name": "QSFP28_0" + } + ] + }, + "interfaces": { + "Ethernet0": { + "index": "1,1,1,1,1,1,1,1", + "lanes": "153,154,155,156,157,158,159,160", + "breakout_modes": { + "1x800G": [ + "etp1" + ], + "1x100G(4)": [ + "etp1" + ], + "2x400G": [ + "etp1a", + "etp1b" + ], + "4x200G": [ + "etp1a", + "etp1b", + "etp1c", + "etp1d" + ], + "8x100G": [ + "etp1a", + "etp1b", + "etp1c", + "etp1d", + "etp1e", + "etp1f", + "etp1g", + "etp1h" + ] + } + }, + "Ethernet8": { + "index": "2,2,2,2,2,2,2,2", + "lanes": "161,162,163,164,165,166,167,168", + "breakout_modes": { + "1x800G": [ + "etp2" + ], + "1x100G(4)": [ + "etp2" + ], + "2x400G": [ + "etp2a", + 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"etp121c", + "etp121d", + "etp121e", + "etp121f", + "etp121g", + "etp121h" + ] + } + }, + "Ethernet968": { + "index": "122,122,122,122,122,122,122,122", + "lanes": "953,954,955,956,957,958,959,960", + "breakout_modes": { + "1x800G": [ + "etp122" + ], + "1x100G(4)": [ + "etp122" + ], + "2x400G": [ + "etp122a", + "etp122b" + ], + "4x200G": [ + "etp122a", + "etp122b", + "etp122c", + "etp122d" + ], + "8x100G": [ + "etp122a", + "etp122b", + "etp122c", + "etp122d", + "etp122e", + "etp122f", + "etp122g", + "etp122h" + ] + } + }, + "Ethernet976": { + "index": "123,123,123,123,123,123,123,123", + "lanes": "905,906,907,908,909,910,911,912", + "breakout_modes": { + "1x800G": [ + "etp123" + ], + "1x100G(4)": [ + "etp123" + ], + "2x400G": [ + "etp123a", + "etp123b" + ], + "4x200G": [ + "etp123a", + "etp123b", + "etp123c", + "etp123d" + ], + "8x100G": [ + "etp123a", + "etp123b", + "etp123c", + "etp123d", + "etp123e", + "etp123f", + "etp123g", + "etp123h" + ] + } + }, + "Ethernet984": { + "index": "124,124,124,124,124,124,124,124", + "lanes": "937,938,939,940,941,942,943,944", + "breakout_modes": { + "1x800G": [ + "etp124" + ], + "1x100G(4)": [ + "etp124" + ], + "2x400G": [ + "etp124a", + "etp124b" + ], + "4x200G": [ + "etp124a", + "etp124b", + "etp124c", + "etp124d" + ], + "8x100G": [ + "etp124a", + "etp124b", + "etp124c", + "etp124d", + "etp124e", + "etp124f", + "etp124g", + "etp124h" + ] + } + }, + "Ethernet992": { + "index": "125,125,125,125,125,125,125,125", + "lanes": "913,914,915,916,917,918,919,920", + "breakout_modes": { + "1x800G": [ + "etp125" + ], + "1x100G(4)": [ + "etp125" + ], + "2x400G": [ + "etp125a", + "etp125b" + ], + "4x200G": [ + "etp125a", + "etp125b", + "etp125c", + "etp125d" + ], + "8x100G": [ + "etp125a", + "etp125b", + "etp125c", + "etp125d", + "etp125e", + "etp125f", + "etp125g", + "etp125h" + ] + } + }, + "Ethernet1000": { + "index": "126,126,126,126,126,126,126,126", + "lanes": "897,898,899,900,901,902,903,904", + "breakout_modes": { + "1x800G": [ + "etp126" + ], + "1x100G(4)": [ + "etp126" + ], + "2x400G": [ + "etp126a", + "etp126b" + ], + "4x200G": [ + "etp126a", + "etp126b", + "etp126c", + "etp126d" + ], + "8x100G": [ + "etp126a", + "etp126b", + "etp126c", + "etp126d", + "etp126e", + "etp126f", + "etp126g", + "etp126h" + ] + } + }, + "Ethernet1008": { + "index": "127,127,127,127,127,127,127,127", + "lanes": "921,922,923,924,925,926,927,928", + "breakout_modes": { + "1x800G": [ + "etp127" + ], + "1x100G(4)": [ + "etp127" + ], + "2x400G": [ + "etp127a", + "etp127b" + ], + "4x200G": [ + "etp127a", + "etp127b", + "etp127c", + "etp127d" + ], + "8x100G": [ + "etp127a", + "etp127b", + "etp127c", + "etp127d", + "etp127e", + "etp127f", + "etp127g", + "etp127h" + ] + } + }, + "Ethernet1016": { + "index": "128,128,128,128,128,128,128,128", + "lanes": "929,930,931,932,933,934,935,936", + "breakout_modes": { + "1x800G": [ + "etp128" + ], + "1x100G(4)": [ + "etp128" + ], + "2x400G": [ + "etp128a", + "etp128b" + ], + "4x200G": [ + "etp128a", + "etp128b", + "etp128c", + "etp128d" + ], + "8x100G": [ + "etp128a", + "etp128b", + "etp128c", + "etp128d", + "etp128e", + "etp128f", + "etp128g", + "etp128h" + ] + } + }, + "Ethernet1024": { + "index": "129", + "lanes": "1026,1027,1028,1029", + "breakout_modes": { + "1x100G": [ + "etp129" + ] + } + } + }, + "asic_sensors": { + "poll_interval": "10", + "poll_admin_status": "enable" + } +} diff --git a/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/platform_asic b/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/platform_asic new file mode 100644 index 00000000000..96046765276 --- /dev/null +++ b/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/platform_asic @@ -0,0 +1 @@ +broadcom diff --git a/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/platform_env.conf b/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/platform_env.conf new file mode 100644 index 00000000000..b4f7155e6b1 --- /dev/null +++ b/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/platform_env.conf @@ -0,0 +1,3 @@ +SYNCD_SHM_SIZE=512m +is_ltsw_chip=1 + diff --git a/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/plugins/eeprom.py b/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/plugins/eeprom.py new file mode 100644 index 00000000000..36eb77f3916 --- /dev/null +++ b/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/plugins/eeprom.py @@ -0,0 +1,16 @@ +try: + import os + from sonic_eeprom import eeprom_tlvinfo +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class board(eeprom_tlvinfo.TlvInfoDecoder): + + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/bus/i2c/devices/159-0056/eeprom" + if not os.path.exists(self.eeprom_path): + file = "/sys/bus/i2c/devices/i2c-159/new_device" + with open(file, 'w') as f: + f.write('24c04 0x56\n') + super(board, self).__init__(self.eeprom_path, 0, '', True) diff --git a/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/plugins/led_control.py b/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/plugins/led_control.py new file mode 100644 index 00000000000..92863cfaf80 --- /dev/null +++ b/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/plugins/led_control.py @@ -0,0 +1,109 @@ +""" + led_control.py + + Platform-specific LED control functionality for SONiC +""" + +try: + from sonic_led.led_control_base import LedControlBase + import os + import time + import syslog + from mmap import * + import sonic_platform.platform +except ImportError as e: + raise ImportError(str(e) + " - required module not found") + +FAN_DRAWERS = 8 +FANS_PER_DRAWER = 2 +CPLD_DIR = "/sys/bus/i2c/devices/135-0071/" + +def DBG_PRINT(str): + syslog.openlog("nokia-led") + syslog.syslog(syslog.LOG_INFO, str) + syslog.closelog() + +class LedControl(LedControlBase): + """Platform specific LED control class""" + + # Constructor + def __init__(self): + self.chassis = sonic_platform.platform.Platform().get_chassis() + self._initDefaultConfig() + + def _initDefaultConfig(self): + # The fan tray leds and system led managed by new chassis class API + # leaving only a couple other front panel leds to be done old style + DBG_PRINT("starting system leds") + self._initSystemLed() + DBG_PRINT(" led done") + + def _read_sysfs_file(self, sysfs_file): + # On successful read, returns the value read from given + # reg_name and on failure returns 'ERR' + rv = 'ERR' + + if (not os.path.isfile(sysfs_file)): + return rv + try: + with open(sysfs_file, 'r') as fd: + rv = fd.read() + fd.close() + except Exception as e: + rv = 'ERR' + + rv = rv.rstrip('\r\n') + rv = rv.lstrip(" ") + return rv + + def _write_sysfs_file(self, sysfs_file, value): + # On successful write, the value read will be written on + # reg_name and on failure returns 'ERR' + rv = 'ERR' + + if (not os.path.isfile(sysfs_file)): + return rv + try: + with open(sysfs_file, 'w') as fd: + rv = fd.write(value) + fd.close() + except Exception as e: + rv = 'ERR' + + return rv + + def _initSystemLed(self): + # Front Panel System LEDs setting + oldfan = 0xf # 2=amber, 1=green + + # Write sys led + status = self._write_sysfs_file(CPLD_DIR + 'led_sys', "0xf") + if status == "ERR": + DBG_PRINT(" System LED NOT set correctly") + else: + DBG_PRINT(" System LED set O.K. ") + + # Timer loop to monitor and set front panel Status, Fan, and PSU LEDs + while True: + # Front Panel FAN Panel LED setting + good_fan = 0 + for fan in self.chassis._fan_list: + if fan.get_status() == True: + good_fan = good_fan + 1 + + if (good_fan == FAN_DRAWERS * FANS_PER_DRAWER): + if (os.path.isfile(CPLD_DIR + "led_fan")): + if oldfan != 0x1: + self._write_sysfs_file(CPLD_DIR + "led_fan", "1") + oldfan = 0x1 + else: + oldfan = 0xf + else: + if (os.path.isfile(CPLD_DIR + "led_fan")): + if oldfan != 0x0: + self._write_sysfs_file(CPLD_DIR + "led_fan", "2") + oldfan = 0x0 + else: + oldfan = 0xf + + time.sleep(6) diff --git a/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/pmon_daemon_control.json b/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/pmon_daemon_control.json new file mode 100644 index 00000000000..0b4f504a314 --- /dev/null +++ b/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/pmon_daemon_control.json @@ -0,0 +1,3 @@ +{ + "enable_xcvrd_sff_mgr": true +} diff --git a/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/system_health_monitoring_config.json b/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/system_health_monitoring_config.json new file mode 100644 index 00000000000..d5f3a7b9830 --- /dev/null +++ b/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/system_health_monitoring_config.json @@ -0,0 +1,14 @@ +{ + "services_to_ignore": [], + "devices_to_ignore": [ + "asic", + "psu.temperature" + ], + "user_defined_checkers": [], + "polling_interval": 60, + "led_color": { + "fault": "amber", + "normal": "green", + "booting": "blinking green" + } +} diff --git a/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/thermal_policy.json b/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/thermal_policy.json new file mode 100644 index 00000000000..78e0a003577 --- /dev/null +++ b/device/nokia/x86_64-nokia_ixr7220_h6_128-r0/thermal_policy.json @@ -0,0 +1,67 @@ +{ + "thermal_control_algorithm": { + "run_at_boot_up": "false", + "fan_speed_when_suspend": "60" + }, + "info_types": [ + { + "type": "fan_info" + }, + { + "type": "thermal_info" + }, + { + "type": "chassis_info" + } + ], + "policies": [ + { + "name": "any fan absence", + "conditions": [ + { + "type": "fan.any.absence" + } + ], + "actions": [ + { + "type": "thermal_control.control", + "status": "false" + }, + { + "type": "fan.all.set_speed", + "speed": "100" + } + ] + }, + { + "name": "all fan presence", + "conditions": [ + { + "type": "fan.all.presence" + } + ], + "actions": [ + { + "type": "thermal.temp_check_and_set_all_fan_speed", + "default_speed": "46", + "threshold1_speed": "60", + "threshold2_speed": "80", + "hightemp_speed": "100" + } + ] + }, + { + "name": "temp over high critical threshold", + "conditions": [ + { + "type": "thermal.over.high_critical_threshold" + } + ], + "actions": [ + { + "type": "switch.shutdown" + } + ] + } + ] +} diff --git a/device/nokia/x86_64-nokia_ixr7250_x1b-r0/Nokia-IXR7250-X1b/q2cp-nokia-24x100g-12x400g-config.bcm b/device/nokia/x86_64-nokia_ixr7250_x1b-r0/Nokia-IXR7250-X1b/q2cp-nokia-24x100g-12x400g-config.bcm index 9325f75021e..d43a573565c 100644 --- a/device/nokia/x86_64-nokia_ixr7250_x1b-r0/Nokia-IXR7250-X1b/q2cp-nokia-24x100g-12x400g-config.bcm +++ b/device/nokia/x86_64-nokia_ixr7250_x1b-r0/Nokia-IXR7250-X1b/q2cp-nokia-24x100g-12x400g-config.bcm @@ -1682,3 +1682,4 @@ sai_pfc_dlr_init_capability=0 trunk_group_max_members=16 sai_default_cpu_tx_tc=7 sai_instru_stat_accum_enable=1 +sai_ecmp_group_members_increment=8 diff --git a/device/nokia/x86_64-nokia_ixr7250_x3b-r0/Nokia-IXR7250-X3B/0/jr2cp-nokia-18x400g-config.bcm b/device/nokia/x86_64-nokia_ixr7250_x3b-r0/Nokia-IXR7250-X3B/0/jr2cp-nokia-18x400g-config.bcm index a36027cec44..45fac2fc086 100644 --- a/device/nokia/x86_64-nokia_ixr7250_x3b-r0/Nokia-IXR7250-X3B/0/jr2cp-nokia-18x400g-config.bcm +++ b/device/nokia/x86_64-nokia_ixr7250_x3b-r0/Nokia-IXR7250-X3B/0/jr2cp-nokia-18x400g-config.bcm @@ -2153,3 +2153,4 @@ trunk_group_max_members=16 sai_default_cpu_tx_tc=7 sai_disable_srcmacqedstmac_ctrl=1 sai_instru_stat_accum_enable=1 +sai_ecmp_group_members_increment=8 diff --git a/device/nokia/x86_64-nokia_ixr7250_x3b-r0/Nokia-IXR7250-X3B/0/sai_postinit_cmd.soc b/device/nokia/x86_64-nokia_ixr7250_x3b-r0/Nokia-IXR7250-X3B/0/sai_postinit_cmd.soc index 7fbac3b5175..d3818faeaf2 100644 --- a/device/nokia/x86_64-nokia_ixr7250_x3b-r0/Nokia-IXR7250-X3B/0/sai_postinit_cmd.soc +++ b/device/nokia/x86_64-nokia_ixr7250_x3b-r0/Nokia-IXR7250-X3B/0/sai_postinit_cmd.soc @@ -1,31 +1,63 @@ cint /usr/share/sonic/hwsku/mesh_config.cint -INTeRrupt ENAble id=2209 -INTeRrupt ENAble id=2210 -INTeRrupt ENAble id=2211 -INTeRrupt ENAble id=2212 -INTeRrupt ENAble id=2213 -INTeRrupt ENAble id=2214 -INTeRrupt ENAble id=2215 -INTeRrupt ENAble id=2216 -INTeRrupt ENAble id=2217 -INTeRrupt ENAble id=2218 -INTeRrupt ENAble id=2219 -INTeRrupt ENAble id=2220 -INTeRrupt ENAble id=2221 -INTeRrupt ENAble id=2222 -INTeRrupt ENAble id=2223 -INTeRrupt ENAble id=2224 -INTeRrupt ENAble id=2225 -INTeRrupt ENAble id=2226 +#core 0 +INTeRrupt ENAble id=2209 p=0 +INTeRrupt ENAble id=2210 p=0 +INTeRrupt ENAble id=2211 p=0 +INTeRrupt ENAble id=2212 p=0 +INTeRrupt ENAble id=2213 p=0 +INTeRrupt ENAble id=2214 p=0 +INTeRrupt ENAble id=2215 p=0 +INTeRrupt ENAble id=2216 p=0 +INTeRrupt ENAble id=2217 p=0 +INTeRrupt ENAble id=2218 p=0 +INTeRrupt ENAble id=2219 p=0 +INTeRrupt ENAble id=2220 p=0 +INTeRrupt ENAble id=2221 p=0 +INTeRrupt ENAble id=2222 p=0 +INTeRrupt ENAble id=2223 p=0 +INTeRrupt ENAble id=2224 p=0 +INTeRrupt ENAble id=2225 p=0 +INTeRrupt ENAble id=2226 p=0 -INTeRrupt ENAble id=482 -INTeRrupt ENAble id=483 -INTeRrupt ENAble id=484 -INTeRrupt ENAble id=485 -INTeRrupt ENAble id=486 -INTeRrupt ENAble id=487 -INTeRrupt ENAble id=488 +INTeRrupt ENAble id=482 p=0 +INTeRrupt ENAble id=483 p=0 +INTeRrupt ENAble id=484 p=0 +INTeRrupt ENAble id=485 p=0 +INTeRrupt ENAble id=486 p=0 +INTeRrupt ENAble id=487 p=0 +INTeRrupt ENAble id=488 p=0 + +INTeRrupt ENAble id=1597 p=0 + +#core 1 +INTeRrupt ENAble id=2209 p=1 +INTeRrupt ENAble id=2210 p=1 +INTeRrupt ENAble id=2211 p=1 +INTeRrupt ENAble id=2212 p=1 +INTeRrupt ENAble id=2213 p=1 +INTeRrupt ENAble id=2214 p=1 +INTeRrupt ENAble id=2215 p=1 +INTeRrupt ENAble id=2216 p=1 +INTeRrupt ENAble id=2217 p=1 +INTeRrupt ENAble id=2218 p=1 +INTeRrupt ENAble id=2219 p=1 +INTeRrupt ENAble id=2220 p=1 +INTeRrupt ENAble id=2221 p=1 +INTeRrupt ENAble id=2222 p=1 +INTeRrupt ENAble id=2223 p=1 +INTeRrupt ENAble id=2224 p=1 +INTeRrupt ENAble id=2225 p=1 +INTeRrupt ENAble id=2226 p=1 + +INTeRrupt ENAble id=482 p=1 +INTeRrupt ENAble id=483 p=1 +INTeRrupt ENAble id=484 p=1 +INTeRrupt ENAble id=485 p=1 +INTeRrupt ENAble id=486 p=1 +INTeRrupt ENAble id=487 p=1 +INTeRrupt ENAble id=488 p=1 + +INTeRrupt ENAble id=1597 p=1 -INTeRrupt ENAble id=1597 debug intr error diff --git a/device/nokia/x86_64-nokia_ixr7250_x3b-r0/Nokia-IXR7250-X3B/1/jr2cp-nokia-18x400g-config.bcm b/device/nokia/x86_64-nokia_ixr7250_x3b-r0/Nokia-IXR7250-X3B/1/jr2cp-nokia-18x400g-config.bcm index 16a7bb3e57d..59584a803d9 100644 --- a/device/nokia/x86_64-nokia_ixr7250_x3b-r0/Nokia-IXR7250-X3B/1/jr2cp-nokia-18x400g-config.bcm +++ b/device/nokia/x86_64-nokia_ixr7250_x3b-r0/Nokia-IXR7250-X3B/1/jr2cp-nokia-18x400g-config.bcm @@ -2157,3 +2157,4 @@ trunk_group_max_members=16 sai_default_cpu_tx_tc=7 sai_disable_srcmacqedstmac_ctrl=1 sai_instru_stat_accum_enable=1 +sai_ecmp_group_members_increment=8 diff --git a/device/nokia/x86_64-nokia_ixr7250_x3b-r0/Nokia-IXR7250-X3B/1/sai_postinit_cmd.soc b/device/nokia/x86_64-nokia_ixr7250_x3b-r0/Nokia-IXR7250-X3B/1/sai_postinit_cmd.soc index 7fbac3b5175..d3818faeaf2 100644 --- a/device/nokia/x86_64-nokia_ixr7250_x3b-r0/Nokia-IXR7250-X3B/1/sai_postinit_cmd.soc +++ b/device/nokia/x86_64-nokia_ixr7250_x3b-r0/Nokia-IXR7250-X3B/1/sai_postinit_cmd.soc @@ -1,31 +1,63 @@ cint /usr/share/sonic/hwsku/mesh_config.cint -INTeRrupt ENAble id=2209 -INTeRrupt ENAble id=2210 -INTeRrupt ENAble id=2211 -INTeRrupt ENAble id=2212 -INTeRrupt ENAble id=2213 -INTeRrupt ENAble id=2214 -INTeRrupt ENAble id=2215 -INTeRrupt ENAble id=2216 -INTeRrupt ENAble id=2217 -INTeRrupt ENAble id=2218 -INTeRrupt ENAble id=2219 -INTeRrupt ENAble id=2220 -INTeRrupt ENAble id=2221 -INTeRrupt ENAble id=2222 -INTeRrupt ENAble id=2223 -INTeRrupt ENAble id=2224 -INTeRrupt ENAble id=2225 -INTeRrupt ENAble id=2226 +#core 0 +INTeRrupt ENAble id=2209 p=0 +INTeRrupt ENAble id=2210 p=0 +INTeRrupt ENAble id=2211 p=0 +INTeRrupt ENAble id=2212 p=0 +INTeRrupt ENAble id=2213 p=0 +INTeRrupt ENAble id=2214 p=0 +INTeRrupt ENAble id=2215 p=0 +INTeRrupt ENAble id=2216 p=0 +INTeRrupt ENAble id=2217 p=0 +INTeRrupt ENAble id=2218 p=0 +INTeRrupt ENAble id=2219 p=0 +INTeRrupt ENAble id=2220 p=0 +INTeRrupt ENAble id=2221 p=0 +INTeRrupt ENAble id=2222 p=0 +INTeRrupt ENAble id=2223 p=0 +INTeRrupt ENAble id=2224 p=0 +INTeRrupt ENAble id=2225 p=0 +INTeRrupt ENAble id=2226 p=0 -INTeRrupt ENAble id=482 -INTeRrupt ENAble id=483 -INTeRrupt ENAble id=484 -INTeRrupt ENAble id=485 -INTeRrupt ENAble id=486 -INTeRrupt ENAble id=487 -INTeRrupt ENAble id=488 +INTeRrupt ENAble id=482 p=0 +INTeRrupt ENAble id=483 p=0 +INTeRrupt ENAble id=484 p=0 +INTeRrupt ENAble id=485 p=0 +INTeRrupt ENAble id=486 p=0 +INTeRrupt ENAble id=487 p=0 +INTeRrupt ENAble id=488 p=0 + +INTeRrupt ENAble id=1597 p=0 + +#core 1 +INTeRrupt ENAble id=2209 p=1 +INTeRrupt ENAble id=2210 p=1 +INTeRrupt ENAble id=2211 p=1 +INTeRrupt ENAble id=2212 p=1 +INTeRrupt ENAble id=2213 p=1 +INTeRrupt ENAble id=2214 p=1 +INTeRrupt ENAble id=2215 p=1 +INTeRrupt ENAble id=2216 p=1 +INTeRrupt ENAble id=2217 p=1 +INTeRrupt ENAble id=2218 p=1 +INTeRrupt ENAble id=2219 p=1 +INTeRrupt ENAble id=2220 p=1 +INTeRrupt ENAble id=2221 p=1 +INTeRrupt ENAble id=2222 p=1 +INTeRrupt ENAble id=2223 p=1 +INTeRrupt ENAble id=2224 p=1 +INTeRrupt ENAble id=2225 p=1 +INTeRrupt ENAble id=2226 p=1 + +INTeRrupt ENAble id=482 p=1 +INTeRrupt ENAble id=483 p=1 +INTeRrupt ENAble id=484 p=1 +INTeRrupt ENAble id=485 p=1 +INTeRrupt ENAble id=486 p=1 +INTeRrupt ENAble id=487 p=1 +INTeRrupt ENAble id=488 p=1 + +INTeRrupt ENAble id=1597 p=1 -INTeRrupt ENAble id=1597 debug intr error diff --git a/device/nokia/x86_64-nokia_ixr7250_x4-r0/Nokia-IXR7250-X4/q3d-nokia-32x800g-config.bcm b/device/nokia/x86_64-nokia_ixr7250_x4-r0/Nokia-IXR7250-X4/q3d-nokia-32x800g-config.bcm index e81f4b22d10..75a7b788507 100644 --- a/device/nokia/x86_64-nokia_ixr7250_x4-r0/Nokia-IXR7250-X4/q3d-nokia-32x800g-config.bcm +++ b/device/nokia/x86_64-nokia_ixr7250_x4-r0/Nokia-IXR7250-X4/q3d-nokia-32x800g-config.bcm @@ -1353,3 +1353,4 @@ sai_disable_srcmacqedstmac_ctrl=1 trunk_group_max_members=16 sai_default_cpu_tx_tc=7 sai_tc_based_queue_stats_enable=0 +sai_ecmp_group_members_increment=8 diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/0/jr2cp-nokia-18x100g-4x25g-config.bcm b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/0/jr2cp-nokia-18x100g-4x25g-config.bcm index 42be59e0b24..d0357133efe 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/0/jr2cp-nokia-18x100g-4x25g-config.bcm +++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/0/jr2cp-nokia-18x100g-4x25g-config.bcm @@ -2103,3 +2103,4 @@ sai_disable_srcmacqedstmac_ctrl=1 sai_instru_stat_accum_enable=1 appl_param_active_links_thr_low=1 appl_param_active_links_thr_high=112 +sai_ecmp_group_members_increment=8 diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/0/sai_postinit_cmd.soc b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/0/sai_postinit_cmd.soc index 80338902b82..45c00e5e626 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/0/sai_postinit_cmd.soc +++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/0/sai_postinit_cmd.soc @@ -1,29 +1,61 @@ -INTeRrupt ENAble id=2209 -INTeRrupt ENAble id=2210 -INTeRrupt ENAble id=2211 -INTeRrupt ENAble id=2212 -INTeRrupt ENAble id=2213 -INTeRrupt ENAble id=2214 -INTeRrupt ENAble id=2215 -INTeRrupt ENAble id=2216 -INTeRrupt ENAble id=2217 -INTeRrupt ENAble id=2218 -INTeRrupt ENAble id=2219 -INTeRrupt ENAble id=2220 -INTeRrupt ENAble id=2221 -INTeRrupt ENAble id=2222 -INTeRrupt ENAble id=2223 -INTeRrupt ENAble id=2224 -INTeRrupt ENAble id=2225 -INTeRrupt ENAble id=2226 +#core 0 +INTeRrupt ENAble id=2209 p=0 +INTeRrupt ENAble id=2210 p=0 +INTeRrupt ENAble id=2211 p=0 +INTeRrupt ENAble id=2212 p=0 +INTeRrupt ENAble id=2213 p=0 +INTeRrupt ENAble id=2214 p=0 +INTeRrupt ENAble id=2215 p=0 +INTeRrupt ENAble id=2216 p=0 +INTeRrupt ENAble id=2217 p=0 +INTeRrupt ENAble id=2218 p=0 +INTeRrupt ENAble id=2219 p=0 +INTeRrupt ENAble id=2220 p=0 +INTeRrupt ENAble id=2221 p=0 +INTeRrupt ENAble id=2222 p=0 +INTeRrupt ENAble id=2223 p=0 +INTeRrupt ENAble id=2224 p=0 +INTeRrupt ENAble id=2225 p=0 +INTeRrupt ENAble id=2226 p=0 -INTeRrupt ENAble id=482 -INTeRrupt ENAble id=483 -INTeRrupt ENAble id=484 -INTeRrupt ENAble id=485 -INTeRrupt ENAble id=486 -INTeRrupt ENAble id=487 -INTeRrupt ENAble id=488 +INTeRrupt ENAble id=482 p=0 +INTeRrupt ENAble id=483 p=0 +INTeRrupt ENAble id=484 p=0 +INTeRrupt ENAble id=485 p=0 +INTeRrupt ENAble id=486 p=0 +INTeRrupt ENAble id=487 p=0 +INTeRrupt ENAble id=488 p=0 -INTeRrupt ENAble id=1597 -debug intr error \ No newline at end of file +INTeRrupt ENAble id=1597 p=0 + +#core 1 +INTeRrupt ENAble id=2209 p=1 +INTeRrupt ENAble id=2210 p=1 +INTeRrupt ENAble id=2211 p=1 +INTeRrupt ENAble id=2212 p=1 +INTeRrupt ENAble id=2213 p=1 +INTeRrupt ENAble id=2214 p=1 +INTeRrupt ENAble id=2215 p=1 +INTeRrupt ENAble id=2216 p=1 +INTeRrupt ENAble id=2217 p=1 +INTeRrupt ENAble id=2218 p=1 +INTeRrupt ENAble id=2219 p=1 +INTeRrupt ENAble id=2220 p=1 +INTeRrupt ENAble id=2221 p=1 +INTeRrupt ENAble id=2222 p=1 +INTeRrupt ENAble id=2223 p=1 +INTeRrupt ENAble id=2224 p=1 +INTeRrupt ENAble id=2225 p=1 +INTeRrupt ENAble id=2226 p=1 + +INTeRrupt ENAble id=482 p=1 +INTeRrupt ENAble id=483 p=1 +INTeRrupt ENAble id=484 p=1 +INTeRrupt ENAble id=485 p=1 +INTeRrupt ENAble id=486 p=1 +INTeRrupt ENAble id=487 p=1 +INTeRrupt ENAble id=488 p=1 + +INTeRrupt ENAble id=1597 p=1 + +debug intr error diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/1/jr2cp-nokia-18x100g-4x25g-config.bcm b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/1/jr2cp-nokia-18x100g-4x25g-config.bcm index b3a465656ca..765bcb1a87b 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/1/jr2cp-nokia-18x100g-4x25g-config.bcm +++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/1/jr2cp-nokia-18x100g-4x25g-config.bcm @@ -2104,3 +2104,4 @@ sai_disable_srcmacqedstmac_ctrl=1 sai_instru_stat_accum_enable=1 appl_param_active_links_thr_low=1 appl_param_active_links_thr_high=112 +sai_ecmp_group_members_increment=8 diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/1/sai_postinit_cmd.soc b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/1/sai_postinit_cmd.soc index 80338902b82..45c00e5e626 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/1/sai_postinit_cmd.soc +++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x100G/1/sai_postinit_cmd.soc @@ -1,29 +1,61 @@ -INTeRrupt ENAble id=2209 -INTeRrupt ENAble id=2210 -INTeRrupt ENAble id=2211 -INTeRrupt ENAble id=2212 -INTeRrupt ENAble id=2213 -INTeRrupt ENAble id=2214 -INTeRrupt ENAble id=2215 -INTeRrupt ENAble id=2216 -INTeRrupt ENAble id=2217 -INTeRrupt ENAble id=2218 -INTeRrupt ENAble id=2219 -INTeRrupt ENAble id=2220 -INTeRrupt ENAble id=2221 -INTeRrupt ENAble id=2222 -INTeRrupt ENAble id=2223 -INTeRrupt ENAble id=2224 -INTeRrupt ENAble id=2225 -INTeRrupt ENAble id=2226 +#core 0 +INTeRrupt ENAble id=2209 p=0 +INTeRrupt ENAble id=2210 p=0 +INTeRrupt ENAble id=2211 p=0 +INTeRrupt ENAble id=2212 p=0 +INTeRrupt ENAble id=2213 p=0 +INTeRrupt ENAble id=2214 p=0 +INTeRrupt ENAble id=2215 p=0 +INTeRrupt ENAble id=2216 p=0 +INTeRrupt ENAble id=2217 p=0 +INTeRrupt ENAble id=2218 p=0 +INTeRrupt ENAble id=2219 p=0 +INTeRrupt ENAble id=2220 p=0 +INTeRrupt ENAble id=2221 p=0 +INTeRrupt ENAble id=2222 p=0 +INTeRrupt ENAble id=2223 p=0 +INTeRrupt ENAble id=2224 p=0 +INTeRrupt ENAble id=2225 p=0 +INTeRrupt ENAble id=2226 p=0 -INTeRrupt ENAble id=482 -INTeRrupt ENAble id=483 -INTeRrupt ENAble id=484 -INTeRrupt ENAble id=485 -INTeRrupt ENAble id=486 -INTeRrupt ENAble id=487 -INTeRrupt ENAble id=488 +INTeRrupt ENAble id=482 p=0 +INTeRrupt ENAble id=483 p=0 +INTeRrupt ENAble id=484 p=0 +INTeRrupt ENAble id=485 p=0 +INTeRrupt ENAble id=486 p=0 +INTeRrupt ENAble id=487 p=0 +INTeRrupt ENAble id=488 p=0 -INTeRrupt ENAble id=1597 -debug intr error \ No newline at end of file +INTeRrupt ENAble id=1597 p=0 + +#core 1 +INTeRrupt ENAble id=2209 p=1 +INTeRrupt ENAble id=2210 p=1 +INTeRrupt ENAble id=2211 p=1 +INTeRrupt ENAble id=2212 p=1 +INTeRrupt ENAble id=2213 p=1 +INTeRrupt ENAble id=2214 p=1 +INTeRrupt ENAble id=2215 p=1 +INTeRrupt ENAble id=2216 p=1 +INTeRrupt ENAble id=2217 p=1 +INTeRrupt ENAble id=2218 p=1 +INTeRrupt ENAble id=2219 p=1 +INTeRrupt ENAble id=2220 p=1 +INTeRrupt ENAble id=2221 p=1 +INTeRrupt ENAble id=2222 p=1 +INTeRrupt ENAble id=2223 p=1 +INTeRrupt ENAble id=2224 p=1 +INTeRrupt ENAble id=2225 p=1 +INTeRrupt ENAble id=2226 p=1 + +INTeRrupt ENAble id=482 p=1 +INTeRrupt ENAble id=483 p=1 +INTeRrupt ENAble id=484 p=1 +INTeRrupt ENAble id=485 p=1 +INTeRrupt ENAble id=486 p=1 +INTeRrupt ENAble id=487 p=1 +INTeRrupt ENAble id=488 p=1 + +INTeRrupt ENAble id=1597 p=1 + +debug intr error diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/0/jr2cp-nokia-18x400g-config.bcm b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/0/jr2cp-nokia-18x400g-config.bcm index 658c1bb482b..c51a6940a56 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/0/jr2cp-nokia-18x400g-config.bcm +++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/0/jr2cp-nokia-18x400g-config.bcm @@ -2104,3 +2104,4 @@ sai_disable_srcmacqedstmac_ctrl=1 sai_instru_stat_accum_enable=1 appl_param_active_links_thr_low=1 appl_param_active_links_thr_high=112 +sai_ecmp_group_members_increment=8 diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/0/sai_postinit_cmd.soc b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/0/sai_postinit_cmd.soc index 26b9099a949..c2f0cb118ae 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/0/sai_postinit_cmd.soc +++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/0/sai_postinit_cmd.soc @@ -36,32 +36,64 @@ phy set 17 reg=0xd137 data=0 lane=2 phy set 17 reg=0xd138 data=0 lane=2 phy set 17 reg=0xd133 data=0x1804 lane=2 -INTeRrupt ENAble id=2209 -INTeRrupt ENAble id=2210 -INTeRrupt ENAble id=2211 -INTeRrupt ENAble id=2212 -INTeRrupt ENAble id=2213 -INTeRrupt ENAble id=2214 -INTeRrupt ENAble id=2215 -INTeRrupt ENAble id=2216 -INTeRrupt ENAble id=2217 -INTeRrupt ENAble id=2218 -INTeRrupt ENAble id=2219 -INTeRrupt ENAble id=2220 -INTeRrupt ENAble id=2221 -INTeRrupt ENAble id=2222 -INTeRrupt ENAble id=2223 -INTeRrupt ENAble id=2224 -INTeRrupt ENAble id=2225 -INTeRrupt ENAble id=2226 +#core 0 +INTeRrupt ENAble id=2209 p=0 +INTeRrupt ENAble id=2210 p=0 +INTeRrupt ENAble id=2211 p=0 +INTeRrupt ENAble id=2212 p=0 +INTeRrupt ENAble id=2213 p=0 +INTeRrupt ENAble id=2214 p=0 +INTeRrupt ENAble id=2215 p=0 +INTeRrupt ENAble id=2216 p=0 +INTeRrupt ENAble id=2217 p=0 +INTeRrupt ENAble id=2218 p=0 +INTeRrupt ENAble id=2219 p=0 +INTeRrupt ENAble id=2220 p=0 +INTeRrupt ENAble id=2221 p=0 +INTeRrupt ENAble id=2222 p=0 +INTeRrupt ENAble id=2223 p=0 +INTeRrupt ENAble id=2224 p=0 +INTeRrupt ENAble id=2225 p=0 +INTeRrupt ENAble id=2226 p=0 -INTeRrupt ENAble id=482 -INTeRrupt ENAble id=483 -INTeRrupt ENAble id=484 -INTeRrupt ENAble id=485 -INTeRrupt ENAble id=486 -INTeRrupt ENAble id=487 -INTeRrupt ENAble id=488 +INTeRrupt ENAble id=482 p=0 +INTeRrupt ENAble id=483 p=0 +INTeRrupt ENAble id=484 p=0 +INTeRrupt ENAble id=485 p=0 +INTeRrupt ENAble id=486 p=0 +INTeRrupt ENAble id=487 p=0 +INTeRrupt ENAble id=488 p=0 -INTeRrupt ENAble id=1597 -debug intr error \ No newline at end of file +INTeRrupt ENAble id=1597 p=0 + +#core 1 +INTeRrupt ENAble id=2209 p=1 +INTeRrupt ENAble id=2210 p=1 +INTeRrupt ENAble id=2211 p=1 +INTeRrupt ENAble id=2212 p=1 +INTeRrupt ENAble id=2213 p=1 +INTeRrupt ENAble id=2214 p=1 +INTeRrupt ENAble id=2215 p=1 +INTeRrupt ENAble id=2216 p=1 +INTeRrupt ENAble id=2217 p=1 +INTeRrupt ENAble id=2218 p=1 +INTeRrupt ENAble id=2219 p=1 +INTeRrupt ENAble id=2220 p=1 +INTeRrupt ENAble id=2221 p=1 +INTeRrupt ENAble id=2222 p=1 +INTeRrupt ENAble id=2223 p=1 +INTeRrupt ENAble id=2224 p=1 +INTeRrupt ENAble id=2225 p=1 +INTeRrupt ENAble id=2226 p=1 + +INTeRrupt ENAble id=482 p=1 +INTeRrupt ENAble id=483 p=1 +INTeRrupt ENAble id=484 p=1 +INTeRrupt ENAble id=485 p=1 +INTeRrupt ENAble id=486 p=1 +INTeRrupt ENAble id=487 p=1 +INTeRrupt ENAble id=488 p=1 + +INTeRrupt ENAble id=1597 p=1 + +debug intr error diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/1/jr2cp-nokia-18x400g-config.bcm b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/1/jr2cp-nokia-18x400g-config.bcm index d395a9d351f..54713c74a9e 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/1/jr2cp-nokia-18x400g-config.bcm +++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/1/jr2cp-nokia-18x400g-config.bcm @@ -2106,3 +2106,4 @@ sai_disable_srcmacqedstmac_ctrl=1 sai_instru_stat_accum_enable=1 appl_param_active_links_thr_low=1 appl_param_active_links_thr_high=112 +sai_ecmp_group_members_increment=8 diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/1/sai_postinit_cmd.soc b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/1/sai_postinit_cmd.soc index 19c3f73e9e3..5c55c9c23d9 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/1/sai_postinit_cmd.soc +++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/Nokia-IXR7250E-36x400G/1/sai_postinit_cmd.soc @@ -13,32 +13,64 @@ phy set 8 reg=0xd137 data=0 lane=1 phy set 8 reg=0xd138 data=0 lane=1 phy set 8 reg=0xd133 data=0x1802 lane=1 -INTeRrupt ENAble id=2209 -INTeRrupt ENAble id=2210 -INTeRrupt ENAble id=2211 -INTeRrupt ENAble id=2212 -INTeRrupt ENAble id=2213 -INTeRrupt ENAble id=2214 -INTeRrupt ENAble id=2215 -INTeRrupt ENAble id=2216 -INTeRrupt ENAble id=2217 -INTeRrupt ENAble id=2218 -INTeRrupt ENAble id=2219 -INTeRrupt ENAble id=2220 -INTeRrupt ENAble id=2221 -INTeRrupt ENAble id=2222 -INTeRrupt ENAble id=2223 -INTeRrupt ENAble id=2224 -INTeRrupt ENAble id=2225 -INTeRrupt ENAble id=2226 - -INTeRrupt ENAble id=482 -INTeRrupt ENAble id=483 -INTeRrupt ENAble id=484 -INTeRrupt ENAble id=485 -INTeRrupt ENAble id=486 -INTeRrupt ENAble id=487 -INTeRrupt ENAble id=488 - -INTeRrupt ENAble id=1597 -debug intr error \ No newline at end of file +#core 0 +INTeRrupt ENAble id=2209 p=0 +INTeRrupt ENAble id=2210 p=0 +INTeRrupt ENAble id=2211 p=0 +INTeRrupt ENAble id=2212 p=0 +INTeRrupt ENAble id=2213 p=0 +INTeRrupt ENAble id=2214 p=0 +INTeRrupt ENAble id=2215 p=0 +INTeRrupt ENAble id=2216 p=0 +INTeRrupt ENAble id=2217 p=0 +INTeRrupt ENAble id=2218 p=0 +INTeRrupt ENAble id=2219 p=0 +INTeRrupt ENAble id=2220 p=0 +INTeRrupt ENAble id=2221 p=0 +INTeRrupt ENAble id=2222 p=0 +INTeRrupt ENAble id=2223 p=0 +INTeRrupt ENAble id=2224 p=0 +INTeRrupt ENAble id=2225 p=0 +INTeRrupt ENAble id=2226 p=0 + +INTeRrupt ENAble id=482 p=0 +INTeRrupt ENAble id=483 p=0 +INTeRrupt ENAble id=484 p=0 +INTeRrupt ENAble id=485 p=0 +INTeRrupt ENAble id=486 p=0 +INTeRrupt ENAble id=487 p=0 +INTeRrupt ENAble id=488 p=0 + +INTeRrupt ENAble id=1597 p=0 + +#core 1 +INTeRrupt ENAble id=2209 p=1 +INTeRrupt ENAble id=2210 p=1 +INTeRrupt ENAble id=2211 p=1 +INTeRrupt ENAble id=2212 p=1 +INTeRrupt ENAble id=2213 p=1 +INTeRrupt ENAble id=2214 p=1 +INTeRrupt ENAble id=2215 p=1 +INTeRrupt ENAble id=2216 p=1 +INTeRrupt ENAble id=2217 p=1 +INTeRrupt ENAble id=2218 p=1 +INTeRrupt ENAble id=2219 p=1 +INTeRrupt ENAble id=2220 p=1 +INTeRrupt ENAble id=2221 p=1 +INTeRrupt ENAble id=2222 p=1 +INTeRrupt ENAble id=2223 p=1 +INTeRrupt ENAble id=2224 p=1 +INTeRrupt ENAble id=2225 p=1 +INTeRrupt ENAble id=2226 p=1 + +INTeRrupt ENAble id=482 p=1 +INTeRrupt ENAble id=483 p=1 +INTeRrupt ENAble id=484 p=1 +INTeRrupt ENAble id=485 p=1 +INTeRrupt ENAble id=486 p=1 +INTeRrupt ENAble id=487 p=1 +INTeRrupt ENAble id=488 p=1 + +INTeRrupt ENAble id=1597 p=1 + +debug intr error diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/media_settings.json b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/media_settings.json new file mode 100644 index 00000000000..b5b7d3b626b --- /dev/null +++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/media_settings.json @@ -0,0 +1,3892 @@ +{ + "PORT_MEDIA_SETTINGS": { + "1": { + "QSFP-DD": { + "speed:400GAUI-8|50G": { + "media_type": "backplane", + "main": { + "lane0": "0x80", + "lane1": "0x80", + "lane2": "0x80", + "lane3": "0x80", + "lane4": "0x80", + "lane5": "0x80", + "lane6": "0x80", + "lane7": "0x80" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "Default": { + "speed:CAUI-4|100GAUI-4|25G": { + "media_type": "backplane", + "main": { + "lane0": "0x57", + "lane1": "0x57", + "lane2": "0x57", + "lane3": "0x57" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0" + }, + "post3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0" + }, + "pre1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0" + } + } + } + }, + "2": { + "QSFP-DD": { + "speed:400GAUI-8|50G": { + "media_type": "backplane", + "main": { + "lane0": "0x80", + "lane1": "0x80", + "lane2": "0x80", + "lane3": "0x80", + "lane4": "0x80", + "lane5": "0x80", + "lane6": "0x80", + "lane7": "0x80" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "Default": { + "speed:CAUI-4|100GAUI-4|25G": { + "media_type": "backplane", + "main": { + "lane0": "0x57", + "lane1": "0x57", + "lane2": "0x57", + "lane3": "0x57" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0" + }, + "post3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0" + }, + "pre1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0" + } + } + } + }, + "3": { + "QSFP-DD": { + "speed:400GAUI-8|50G": { + "media_type": "backplane", + "main": { + "lane0": "0x80", + "lane1": "0x80", + "lane2": "0x80", + "lane3": "0x80", + "lane4": "0x80", + "lane5": "0x80", + "lane6": "0x80", + "lane7": "0x80" + }, + "post1": { + "lane0": "0xfffffff4", + "lane1": "0xfffffff4", + "lane2": "0xfffffff4", + "lane3": "0xfffffff4", + "lane4": "0xfffffff4", + "lane5": "0xfffffff4", + "lane6": "0xfffffff4", + "lane7": "0xfffffff4" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff4", + "lane1": "0xfffffff4", + "lane2": "0xfffffff4", + "lane3": "0xfffffff4", + "lane4": "0xfffffff4", + "lane5": "0xfffffff4", + "lane6": "0xfffffff4", + "lane7": "0xfffffff4" + }, + "pre2": { + "lane0": "0x2", + "lane1": "0x2", + "lane2": "0x2", + "lane3": "0x2", + "lane4": "0x2", + "lane5": "0x2", + "lane6": "0x2", + "lane7": "0x2" + } + } + }, + "Default": { + "speed:CAUI-4|100GAUI-4|25G": { + "media_type": "backplane", + "main": { + "lane0": "0x57", + "lane1": "0x57", + "lane2": "0x57", + "lane3": "0x57" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0" + }, + "post3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0" + }, + "pre1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0" + } + } + } + }, + "4": { + "QSFP-DD": { + "speed:400GAUI-8|50G": { + "media_type": "backplane", + "main": { + "lane0": "0x80", + "lane1": "0x80", + "lane2": "0x80", + "lane3": "0x80", + "lane4": "0x80", + "lane5": "0x80", + "lane6": "0x80", + "lane7": "0x80" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "pre2": { + "lane0": "0x4", + "lane1": "0x4", + "lane2": "0x4", + "lane3": "0x4", + "lane4": "0x4", + "lane5": "0x4", + "lane6": "0x4", + "lane7": "0x4" + } + } + }, + "Default": { + "speed:CAUI-4|100GAUI-4|25G": { + "media_type": "backplane", + "main": { + "lane0": "0x57", + "lane1": "0x57", + "lane2": "0x57", + "lane3": "0x57" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0" + }, + "post3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0" + }, + "pre1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0" + } + } + } + }, + "5": { + "QSFP-DD": { + "speed:400GAUI-8|50G": { + "media_type": "backplane", + "main": { + "lane0": "0x98", + "lane1": "0x98", + "lane2": "0x98", + "lane3": "0x98", + "lane4": "0x98", + "lane5": "0x98", + "lane6": "0x98", + "lane7": "0x98" + }, + "post1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "Default": { + "speed:CAUI-4|100GAUI-4|25G": { + "media_type": "backplane", + "main": { + "lane0": "0x57", + "lane1": "0x57", + "lane2": "0x57", + "lane3": "0x57" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0" + }, + "post3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0" + }, + "pre1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0" + } + } + } + }, + "6": { + "QSFP-DD": { + "speed:400GAUI-8|50G": { + "media_type": "backplane", + "main": { + "lane0": "0x88", + "lane1": "0x88", + "lane2": "0x88", + "lane3": "0x88", + "lane4": "0x88", + "lane5": "0x88", + "lane6": "0x88", + "lane7": "0x88" + }, + "post1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "Default": { + "speed:CAUI-4|100GAUI-4|25G": { + "media_type": "backplane", + "main": { + "lane0": "0x57", + "lane1": "0x57", + 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"pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0" + } + } + } + }, + "31": { + "QSFP-DD": { + "speed:400GAUI-8|50G": { + "media_type": "backplane", + "main": { + "lane0": "0x84", + "lane1": "0x84", + "lane2": "0x84", + "lane3": "0x84", + "lane4": "0x84", + "lane5": "0x84", + "lane6": "0x84", + "lane7": "0x84" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + 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{ + "media_type": "backplane", + "main": { + "lane0": "0x90", + "lane1": "0x90", + "lane2": "0x90", + "lane3": "0x90", + "lane4": "0x90", + "lane5": "0x90", + "lane6": "0x90", + "lane7": "0x90" + }, + "post1": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "Default": { + "speed:CAUI-4|100GAUI-4|25G": { + "media_type": "backplane", + "main": { + "lane0": "0x57", + "lane1": "0x57", + "lane2": "0x57", + "lane3": "0x57" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0" + }, + "post3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0" + }, + "pre1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0" + } + } + } + }, + "33": { + "QSFP-DD": { + "speed:400GAUI-8|50G": { + "media_type": "backplane", + "main": { + "lane0": "0x84", + "lane1": "0x84", + "lane2": "0x84", + "lane3": "0x84", + "lane4": "0x84", + "lane5": "0x84", + "lane6": "0x84", + "lane7": "0x84" + }, + "post1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "pre2": { + "lane0": "0x4", + "lane1": "0x4", + "lane2": "0x4", + "lane3": "0x4", + "lane4": "0x4", + "lane5": "0x4", + "lane6": "0x4", + "lane7": "0x4" + } + } + }, + "Default": { + "speed:CAUI-4|100GAUI-4|25G": { + "media_type": "backplane", + "main": { + "lane0": "0x57", + "lane1": "0x57", + "lane2": "0x57", + "lane3": "0x57" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0" + }, + "post3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0" + }, + "pre1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0" + } + } + } + }, + "34": { + "QSFP-DD": { + "speed:400GAUI-8|50G": { + "media_type": "backplane", + "main": { + "lane0": "0x88", + "lane1": "0x88", + "lane2": "0x88", + "lane3": "0x88", + "lane4": "0x88", + "lane5": "0x88", + "lane6": "0x88", + "lane7": "0x88" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post2": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "pre2": { + "lane0": "0x4", + "lane1": "0x4", + "lane2": "0x4", + "lane3": "0x4", + "lane4": "0x4", + "lane5": "0x4", + "lane6": "0x4", + "lane7": "0x4" + } + } + }, + "Default": { + "speed:CAUI-4|100GAUI-4|25G": { + "media_type": "backplane", + "main": { + "lane0": "0x57", + "lane1": "0x57", + "lane2": "0x57", + "lane3": "0x57" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0" + }, + "post3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0" + }, + "pre1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0" + } + } + } + }, + "35": { + "QSFP-DD": { + "speed:400GAUI-8|50G": { + "media_type": "backplane", + "main": { + "lane0": "0x84", + "lane1": "0x84", + "lane2": "0x84", + "lane3": "0x84", + "lane4": "0x84", + "lane5": "0x84", + "lane6": "0x84", + "lane7": "0x84" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "Default": { + "speed:CAUI-4|100GAUI-4|25G": { + "media_type": "backplane", + "main": { + "lane0": "0x57", + "lane1": "0x57", + "lane2": "0x57", + "lane3": "0x57" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0" + }, + "post3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0" + }, + "pre1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0" + } + } + } + }, + "36": { + "QSFP-DD": { + "speed:400GAUI-8|50G": { + "media_type": "backplane", + "main": { + "lane0": "0x80", + "lane1": "0x80", + "lane2": "0x80", + "lane3": "0x80", + "lane4": "0x80", + "lane5": "0x80", + "lane6": "0x80", + "lane7": "0x80" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "post3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + }, + "pre1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0", + "lane4": "0x0", + "lane5": "0x0", + "lane6": "0x0", + "lane7": "0x0" + } + } + }, + "Default": { + "speed:CAUI-4|100GAUI-4|25G": { + "media_type": "backplane", + "main": { + "lane0": "0x57", + "lane1": "0x57", + "lane2": "0x57", + "lane3": "0x57" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc" + }, + "post2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0" + }, + "post3": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0" + }, + "pre1": { + "lane0": "0xfffffffa", + "lane1": "0xfffffffa", + "lane2": "0xfffffffa", + "lane3": "0xfffffffa" + }, + "pre2": { + "lane0": "0x0", + "lane1": "0x0", + "lane2": "0x0", + "lane3": "0x0" + } + } + } + } + } +} diff --git a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/platform_ndk.json b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/platform_ndk.json index 1ff090c31f3..baa4b12a3ac 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/platform_ndk.json +++ b/device/nokia/x86_64-nokia_ixr7250e_36x400g-r0/platform_ndk.json @@ -42,7 +42,7 @@ }, { "key": "thermal_low_margin_threshold", - "intval": 10 + "intval": 1 }, { "key": "thermal_log_current_threshold", diff --git a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/platform_ndk.json b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/platform_ndk.json index bf7f1ed5742..8fa52d68ad4 100644 --- a/device/nokia/x86_64-nokia_ixr7250e_sup-r0/platform_ndk.json +++ b/device/nokia/x86_64-nokia_ixr7250e_sup-r0/platform_ndk.json @@ -34,7 +34,7 @@ }, { "key": "thermal_low_margin_threshold", - "intval": 10 + "intval": 1 }, { "key": "thermal_log_current_threshold", diff --git a/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/Nvidia-bf3-com-dpu/sai.profile b/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/Nvidia-bf3-com-dpu/sai.profile index d86d58acb00..58a368504c8 100644 --- a/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/Nvidia-bf3-com-dpu/sai.profile +++ b/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/Nvidia-bf3-com-dpu/sai.profile @@ -3,3 +3,6 @@ SAI_DUMP_STORE_AMOUNT=10 DASH_ACL_DEFAULT_RULE_ACTION=permit PORT_LAYOUT=1x400G HAIRPIN=false +ARM_THREADS=14 +CT_TCP_AGING_IN_SECONDS=300 +CT_UDP_AGING_IN_SECONDS=120 diff --git a/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/installer.conf b/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/installer.conf index ad01b4b0a82..2c7ad8222a8 100644 --- a/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/installer.conf +++ b/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/installer.conf @@ -1,2 +1,2 @@ -GRUB_CMDLINE_LINUX="console=ttyAMA1 console=hvc0 console=ttyAMA0 earlycon=pl011,0x13010000 quiet" -ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="isolcpus=1-10 nohz_full=1-10 rcu_nocbs=1-10" +GRUB_CMDLINE_LINUX="console=ttyAMA1 console=ttyAMA0 earlycon=pl011,0x13010000 quiet" +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="isolcpus=2-15 nohz_full=2-15 rcu_nocbs=2-15" \ No newline at end of file diff --git a/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/system_health_monitoring_config.json b/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/system_health_monitoring_config.json index fff1c7ca749..8b31cde50c1 100644 --- a/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/system_health_monitoring_config.json +++ b/device/nvidia-bluefield/arm64-nvda_bf-bf3comdpu/system_health_monitoring_config.json @@ -1,6 +1,6 @@ { "services_to_ignore": [], - "devices_to_ignore": ["psu", "fan"], + "devices_to_ignore": ["psu", "fan", "pdb"], "user_defined_checkers": [], "polling_interval": 60 } diff --git a/device/pensando/arm64-elba-asic-flash128-r0/plugins/ssd_util.py b/device/pensando/arm64-elba-asic-flash128-r0/plugins/ssd_util.py new file mode 100644 index 00000000000..c230e5cc9d6 --- /dev/null +++ b/device/pensando/arm64-elba-asic-flash128-r0/plugins/ssd_util.py @@ -0,0 +1,12 @@ +try: + from sonic_platform_base.sonic_storage.emmc import EmmcUtil +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + +class SsdUtil(EmmcUtil): + """ + Generic implementation of the SSD health API + """ + def __init__(self, diskdev): + EmmcUtil.__init__(self, diskdev) + diff --git a/device/pensando/arm64-elba-asic-flash128-r0/pre_reboot_hook b/device/pensando/arm64-elba-asic-flash128-r0/pre_reboot_hook index 6a1903c2bf7..39b0ce3081e 100755 --- a/device/pensando/arm64-elba-asic-flash128-r0/pre_reboot_hook +++ b/device/pensando/arm64-elba-asic-flash128-r0/pre_reboot_hook @@ -26,7 +26,90 @@ LOG_MSG "Pre-reboot flush and cache clear complete." sleep 2 LOG_MSG "Writing pre-shutdown success to CPLD reg" -docker exec "$(cat /host/dpu-docker-info/name)" /nic/bin/cpldapp -w 0xd 200 + +DPU_NAME_FILE="/host/dpu-docker-info/name" +if [ ! -s "$DPU_NAME_FILE" ]; then + LOG_MSG "Error: DPU container name file '$DPU_NAME_FILE' is missing or empty; aborting pre-reboot hook" + exit 1 +else + DPU_CONTAINER_NAME=$(cat "$DPU_NAME_FILE") + docker exec "$DPU_CONTAINER_NAME" /nic/bin/cpldapp -w 0xd 200 +fi + +# Extract midplane interface name and host IP from systemd network configuration +MIDPLANE_NETWORK_FILE="/usr/lib/systemd/network/bridge-midplane.network" +if [ ! -f "$MIDPLANE_NETWORK_FILE" ]; then + LOG_MSG "ERROR: Midplane network config file '$MIDPLANE_NETWORK_FILE' not found, aborting pre-reboot hook" + exit 1 +fi + +MIDPLANE_IFACE=$(awk -F= '/^\[Match\]/,/^\[Network\]/ { if ($1 == "Name") {print $2; exit} }' "$MIDPLANE_NETWORK_FILE") +if [ -z "$MIDPLANE_IFACE" ]; then + LOG_MSG "ERROR: Failed to extract interface name from '$MIDPLANE_NETWORK_FILE', aborting pre-reboot hook" + exit 1 +fi +LOG_MSG "Using midplane interface: $MIDPLANE_IFACE" + +# Extract host IP from Address field (strip subnet mask) +HOST_IP=$(grep '^Address=' "$MIDPLANE_NETWORK_FILE" | cut -d'=' -f2 | cut -d'/' -f1) +if [ -z "$HOST_IP" ]; then + LOG_MSG "ERROR: Failed to extract host IP from '$MIDPLANE_NETWORK_FILE', aborting pre-reboot hook" + exit 1 +fi +LOG_MSG "Using host IP from bridge-midplane config: $HOST_IP" + +# Spawn fully independent background process to ping host and trigger power cycle if unreachable +# Algorithm: If ping fails, wait 10 seconds and retry. After 3 consecutive failures, trigger power cycle. +# Using setsid + nohup to completely detach from parent process (daemonize) + +setsid nohup bash -c " + DPU_CONTAINER='$DPU_CONTAINER_NAME' + HOST_IP='$HOST_IP' + MIDPLANE_IFACE='$MIDPLANE_IFACE' + TIMEOUT=120 + POLL_INTERVAL=5 + ELAPSED=0 + MAX_FAILURES=3 + RETRY_WAIT=10 + FAIL_COUNT=0 + + LAST_STATE=\"unknown\" + while [ \$ELAPSED -lt \$TIMEOUT ]; do + if ping -I \"\$MIDPLANE_IFACE\" -c 1 -W 1 \"\$HOST_IP\" > /dev/null 2>&1; then + # Ping succeeded - reset failure counter + if [ \$FAIL_COUNT -gt 0 ]; then + echo \"Ping to \$HOST_IP recovered after \$FAIL_COUNT failures\" | tee /dev/kmsg /dev/console + FAIL_COUNT=0 + fi + # Log success only when transitioning to reachable state + if [ \"\$LAST_STATE\" != \"up\" ]; then + echo \"Ping to \$HOST_IP successful, host is still reachable\" | tee /dev/kmsg /dev/console + LAST_STATE=\"up\" + fi + else + # Ping failed - increment failure counter + FAIL_COUNT=\$((FAIL_COUNT + 1)) + echo \"Ping to \$HOST_IP failed (\$FAIL_COUNT/\$MAX_FAILURES)\" | tee /dev/kmsg /dev/console + + # If we exhausted all retries (3 consecutive failures), trigger power cycle + if [ \$FAIL_COUNT -ge \$MAX_FAILURES ]; then + echo \"Ping failure \$FAIL_COUNT/\$MAX_FAILURES, all retries exhausted\" | tee /dev/kmsg /dev/console + echo \"Triggering cpld power cycle after \$MAX_FAILURES consecutive ping failures\" | tee /dev/kmsg /dev/console + docker exec \"\$DPU_CONTAINER\" /nic/bin/cpldapp -pwrcycle + exit 0 + fi + + # Wait before next retry + echo \"Waiting \$RETRY_WAIT seconds before retry...\" | tee /dev/kmsg /dev/console + sleep \$RETRY_WAIT + ELAPSED=\$((ELAPSED + RETRY_WAIT)) + continue + fi + sleep \$POLL_INTERVAL + ELAPSED=\$((ELAPSED + POLL_INTERVAL)) + done + echo \"Ping to \$HOST_IP remained successful for \$TIMEOUT seconds, no power cycle triggered\" | tee /dev/kmsg /dev/console +" /dev/null 2>&1 & LOG_MSG "Platform specific pre-shutdown is successful" diff --git a/device/supermicro/x86_64-supermicro_sse_t8164-r0/pddf/pddf-device.json b/device/supermicro/x86_64-supermicro_sse_t8164-r0/pddf/pddf-device.json index 0be277718ac..8bf4908a0ee 100644 --- a/device/supermicro/x86_64-supermicro_sse_t8164-r0/pddf/pddf-device.json +++ b/device/supermicro/x86_64-supermicro_sse_t8164-r0/pddf/pddf-device.json @@ -1067,7 +1067,7 @@ "i2c": { "topo_info": { "parent_bus":"0x61", "dev_addr":"0x77", "dev_type":"pca9539"}, - "dev_attr": { "gpio_base":"0x200"}, + "dev_attr": { "gpio_base":"0x300"}, "ports": [ {"port_num":0, "direction":"in", "value":"", "edge":"", "active_low":""}, diff --git a/device/supermicro/x86_64-supermicro_sse_t8196-r0/custom_led.bin b/device/supermicro/x86_64-supermicro_sse_t8196-r0/custom_led.bin index 7fdaf0f74a7..992952dd843 100755 Binary files a/device/supermicro/x86_64-supermicro_sse_t8196-r0/custom_led.bin and b/device/supermicro/x86_64-supermicro_sse_t8196-r0/custom_led.bin differ diff --git a/device/supermicro/x86_64-supermicro_sse_t8196-r0/pddf/pddf-device.json b/device/supermicro/x86_64-supermicro_sse_t8196-r0/pddf/pddf-device.json index b8a710f4d3f..fc488344c63 100644 --- a/device/supermicro/x86_64-supermicro_sse_t8196-r0/pddf/pddf-device.json +++ b/device/supermicro/x86_64-supermicro_sse_t8196-r0/pddf/pddf-device.json @@ -1485,7 +1485,7 @@ "i2c": { "topo_info": { "parent_bus":"0x9", "dev_addr":"0x76", "dev_type":"pca9539"}, - "dev_attr": { "gpio_base":"0x2c0"}, + "dev_attr": { "gpio_base":"0x3c0"}, "ports": [ {"port_num":0, "direction":"in", "value":"", "edge":"", "active_low":"0"}, @@ -1765,7 +1765,7 @@ "i2c": { "topo_info": { "parent_bus":"0x3d", "dev_addr":"0x76", "dev_type":"pca9539"}, - "dev_attr": { "gpio_base":"0x200"}, + "dev_attr": { "gpio_base":"0x300"}, "ports": [ {"port_num":0, "direction":"in", "value":"", "edge":"", "active_low":"0"}, @@ -1793,7 +1793,7 @@ "i2c": { "topo_info": { "parent_bus":"0x3d", "dev_addr":"0x77", "dev_type":"pca9539"}, - "dev_attr": { "gpio_base":"0x210"}, + "dev_attr": { "gpio_base":"0x310"}, "ports": [ {"port_num":0, "direction":"in", "value":"", "edge":"", "active_low":"0"}, @@ -1821,7 +1821,7 @@ "i2c": { "topo_info": { "parent_bus":"0x3f", "dev_addr":"0x74", "dev_type":"pca9539"}, - "dev_attr": { "gpio_base":"0x220"}, + "dev_attr": { "gpio_base":"0x320"}, "ports": [ {"port_num":0, "direction":"in", "value":"", "edge":"", "active_low":"0"}, @@ -1849,7 +1849,7 @@ "i2c": { "topo_info": { "parent_bus":"0x3f", "dev_addr":"0x75", "dev_type":"pca9539"}, - "dev_attr": { "gpio_base":"0x230"}, + "dev_attr": { "gpio_base":"0x330"}, "ports": [ {"port_num":0, "direction":"in", "value":"", "edge":"", "active_low":"0"}, @@ -1877,7 +1877,7 @@ "i2c": { "topo_info": { "parent_bus":"0x3f", "dev_addr":"0x76", "dev_type":"pca9539"}, - "dev_attr": { "gpio_base":"0x240"}, + "dev_attr": { "gpio_base":"0x340"}, "ports": [ {"port_num":0, "direction":"in", "value":"", "edge":"", "active_low":"0"}, @@ -1905,7 +1905,7 @@ "i2c": { "topo_info": { "parent_bus":"0x3f", "dev_addr":"0x77", "dev_type":"pca9539"}, - "dev_attr": { "gpio_base":"0x250"}, + "dev_attr": { "gpio_base":"0x350"}, "ports": [ {"port_num":0, "direction":"in", "value":"", "edge":"", "active_low":"0"}, @@ -1933,7 +1933,7 @@ "i2c": { "topo_info": { "parent_bus":"0x40", "dev_addr":"0x74", "dev_type":"pca9539"}, - "dev_attr": { "gpio_base":"0x260"}, + "dev_attr": { "gpio_base":"0x360"}, "ports": [ {"port_num":0, "direction":"out", "value":"0", "edge":"", "active_low":"0"}, @@ -1961,7 +1961,7 @@ "i2c": { "topo_info": { "parent_bus":"0x40", "dev_addr":"0x77", "dev_type":"pca9539"}, - "dev_attr": { "gpio_base":"0x270"}, + "dev_attr": { "gpio_base":"0x370"}, "ports": [ {"port_num":0, "direction":"out", "value":"0", "edge":"", "active_low":"0"}, @@ -1989,7 +1989,7 @@ "i2c": { "topo_info": { "parent_bus":"0x41", "dev_addr":"0x74", "dev_type":"pca9539"}, - "dev_attr": { "gpio_base":"0x280"}, + "dev_attr": { "gpio_base":"0x380"}, "ports": [ {"port_num":0, "direction":"in", "value":"", "edge":"", "active_low":"0"}, @@ -2017,7 +2017,7 @@ "i2c": { "topo_info": { "parent_bus":"0x41", "dev_addr":"0x75", "dev_type":"pca9539"}, - "dev_attr": { "gpio_base":"0x290"}, + "dev_attr": { "gpio_base":"0x390"}, "ports": [ {"port_num":0, "direction":"in", "value":"", "edge":"", "active_low":"0"}, @@ -2045,7 +2045,7 @@ "i2c": { "topo_info": { "parent_bus":"0x41", "dev_addr":"0x76", "dev_type":"pca9539"}, - "dev_attr": { "gpio_base":"0x2a0"}, + "dev_attr": { "gpio_base":"0x3a0"}, "ports": [ {"port_num":0, "direction":"in", "value":"", "edge":"", "active_low":"0"}, @@ -2073,7 +2073,7 @@ "i2c": { "topo_info": { "parent_bus":"0x41", "dev_addr":"0x77", "dev_type":"pca9539"}, - "dev_attr": { "gpio_base":"0x2b0"}, + "dev_attr": { "gpio_base":"0x3b0"}, "ports": [ {"port_num":0, "direction":"in", "value":"", "edge":"", "active_low":"0"}, @@ -4568,7 +4568,7 @@ "attr_list": [ { "attr_name":"xcvr_present", "attr_devaddr":"0x75", "attr_devtype":"gpio", "attr_devname":"GPIO_QSFP_PRN_INT_RSN_SEL2", "attr_offset":"0xb" }, { "attr_name":"xcvr_intr_status", "attr_devaddr":"0x75", "attr_devtype":"gpio", "attr_devname":"GPIO_QSFP_PRN_INT_RSN_SEL2", "attr_offset":"0xa" }, - { "attr_name":"xcvr_reset", "attr_devaddr":"0x75", "attr_devtype":"gpio", "attr_devname":"GPIO_QSFP_PRN_INT_RSN_SEL2", "attr_offset":"0x4" }, + { "attr_name":"xcvr_reset", "attr_devaddr":"0x75", "attr_devtype":"gpio", "attr_devname":"GPIO_QSFP_PRN_INT_RSN_SEL2", "attr_offset":"0x5" }, { "attr_name":"xcvr_lpmode", "attr_devaddr":"0x74", "attr_devtype":"gpio", "attr_devname":"GPIO_QSFP_LP1", "attr_offset":"0x6" } ] } diff --git a/device/virtual/x86_64-kvm_x86_64-r0/DPU-2P/sai_dpu_2p.profile b/device/virtual/x86_64-kvm_x86_64-r0/DPU-2P/sai_dpu_2p.profile index bb429eb4c55..b3509d31474 100644 --- a/device/virtual/x86_64-kvm_x86_64-r0/DPU-2P/sai_dpu_2p.profile +++ b/device/virtual/x86_64-kvm_x86_64-r0/DPU-2P/sai_dpu_2p.profile @@ -3,3 +3,4 @@ SAI_VS_HOSTIF_USE_TAP_DEVICE=true SAI_VS_INTERFACE_LANE_MAP_FILE=/usr/share/sonic/hwsku/lanemap.ini SAI_VS_CORE_PORT_INDEX_MAP_FILE=/usr/share/sonic/hwsku/coreportindexmap.ini SAI_VS_INTERFACE_FABRIC_LANE_MAP_FILE=/usr/share/sonic/hwsku/fabriclanemap.ini +SAI_VS_USE_CONFIGURED_SPEED_AS_OPER_SPEED=true diff --git a/device/virtual/x86_64-kvm_x86_64-r0/SONiC-VM/sai.profile b/device/virtual/x86_64-kvm_x86_64-r0/SONiC-VM/sai.profile index ed9dd21bdcb..908e4cf5d78 100644 --- a/device/virtual/x86_64-kvm_x86_64-r0/SONiC-VM/sai.profile +++ b/device/virtual/x86_64-kvm_x86_64-r0/SONiC-VM/sai.profile @@ -3,3 +3,4 @@ SAI_VS_HOSTIF_USE_TAP_DEVICE=true SAI_VS_INTERFACE_LANE_MAP_FILE=/usr/share/sonic/hwsku/lanemap.ini SAI_VS_CORE_PORT_INDEX_MAP_FILE=/usr/share/sonic/hwsku/coreportindexmap.ini SAI_VS_INTERFACE_FABRIC_LANE_MAP_FILE=/usr/share/sonic/hwsku/fabriclanemap.ini +SAI_VS_USE_CONFIGURED_SPEED_AS_OPER_SPEED=true diff --git a/device/virtual/x86_64-kvm_x86_64-r0/SONiC-VM/sai_mlnx.profile b/device/virtual/x86_64-kvm_x86_64-r0/SONiC-VM/sai_mlnx.profile index 7b54438c413..761270e688d 100644 --- a/device/virtual/x86_64-kvm_x86_64-r0/SONiC-VM/sai_mlnx.profile +++ b/device/virtual/x86_64-kvm_x86_64-r0/SONiC-VM/sai_mlnx.profile @@ -3,3 +3,4 @@ SAI_VS_HOSTIF_USE_TAP_DEVICE=true SAI_VS_INTERFACE_LANE_MAP_FILE=/usr/share/sonic/hwsku/lanemap.ini SAI_VS_CORE_PORT_INDEX_MAP_FILE=/usr/share/sonic/hwsku/coreportindexmap.ini SAI_VS_INTERFACE_FABRIC_LANE_MAP_FILE=/usr/share/sonic/hwsku/fabriclanemap.ini +SAI_VS_USE_CONFIGURED_SPEED_AS_OPER_SPEED=true diff --git a/device/virtual/x86_64-kvm_x86_64-r0/brcm_gearbox_vs/sai.profile b/device/virtual/x86_64-kvm_x86_64-r0/brcm_gearbox_vs/sai.profile index 0a2df177f1c..54619d4e18c 100644 --- a/device/virtual/x86_64-kvm_x86_64-r0/brcm_gearbox_vs/sai.profile +++ b/device/virtual/x86_64-kvm_x86_64-r0/brcm_gearbox_vs/sai.profile @@ -1,3 +1,4 @@ SAI_VS_SWITCH_TYPE=SAI_VS_SWITCH_TYPE_BCM56850 SAI_VS_HOSTIF_USE_TAP_DEVICE=true SAI_VS_INTERFACE_LANE_MAP_FILE=/usr/share/sonic/hwsku/lanemap.ini +SAI_VS_USE_CONFIGURED_SPEED_AS_OPER_SPEED=true diff --git a/device/virtual/x86_64-kvm_x86_64_4_asic-r0/msft_four_asic_vs/0/sai.profile b/device/virtual/x86_64-kvm_x86_64_4_asic-r0/msft_four_asic_vs/0/sai.profile index 0a2df177f1c..54619d4e18c 100644 --- a/device/virtual/x86_64-kvm_x86_64_4_asic-r0/msft_four_asic_vs/0/sai.profile +++ b/device/virtual/x86_64-kvm_x86_64_4_asic-r0/msft_four_asic_vs/0/sai.profile @@ -1,3 +1,4 @@ SAI_VS_SWITCH_TYPE=SAI_VS_SWITCH_TYPE_BCM56850 SAI_VS_HOSTIF_USE_TAP_DEVICE=true SAI_VS_INTERFACE_LANE_MAP_FILE=/usr/share/sonic/hwsku/lanemap.ini +SAI_VS_USE_CONFIGURED_SPEED_AS_OPER_SPEED=true diff --git a/device/virtual/x86_64-kvm_x86_64_6_asic-r0/msft_multi_asic_vs/0/sai.profile b/device/virtual/x86_64-kvm_x86_64_6_asic-r0/msft_multi_asic_vs/0/sai.profile index 0a2df177f1c..54619d4e18c 100644 --- a/device/virtual/x86_64-kvm_x86_64_6_asic-r0/msft_multi_asic_vs/0/sai.profile +++ b/device/virtual/x86_64-kvm_x86_64_6_asic-r0/msft_multi_asic_vs/0/sai.profile @@ -1,3 +1,4 @@ SAI_VS_SWITCH_TYPE=SAI_VS_SWITCH_TYPE_BCM56850 SAI_VS_HOSTIF_USE_TAP_DEVICE=true SAI_VS_INTERFACE_LANE_MAP_FILE=/usr/share/sonic/hwsku/lanemap.ini +SAI_VS_USE_CONFIGURED_SPEED_AS_OPER_SPEED=true diff --git a/dockers/docker-base-bookworm/Dockerfile.j2 b/dockers/docker-base-bookworm/Dockerfile.j2 index c63d3a85044..664fbf3dedf 100644 --- a/dockers/docker-base-bookworm/Dockerfile.j2 +++ b/dockers/docker-base-bookworm/Dockerfile.j2 @@ -16,8 +16,10 @@ ENV DEBIAN_FRONTEND=noninteractive # Configure data sources for apt/dpkg COPY ["dpkg_01_drop", "/etc/dpkg/dpkg.cfg.d/01_drop"] COPY ["sources.list.{{ CONFIGURED_ARCH }}", "/etc/apt/sources.list"] -COPY ["no_install_recommend_suggest", "/etc/apt/apt.conf.d"] -COPY ["no-check-valid-until", "/etc/apt/apt.conf.d"] +COPY ["files/apt/apt.conf.d/", "/etc/apt/apt.conf.d/"] +# Install certificates by disabling the peer verification +RUN apt -o Acquire::https::Verify-Peer=false update && \ + apt -o Acquire::https::Verify-Peer=false install -y ca-certificates # Update apt cache and # pre-install fundamental packages @@ -35,6 +37,7 @@ RUN apt update && \ python-is-python3 \ vim-tiny \ rsyslog \ + rsyslog-relp \ # Install rsync for copying over only changes between layers rsync \ # Install redis-tools @@ -53,6 +56,10 @@ RUN apt update && \ libwrap0 \ libatomic1 +# Security fixes: upgrade vulnerable base packages (S360 scan remediation) +RUN apt-get update && apt-get upgrade -y \ + && rm -rf /var/lib/apt/lists/* + # Add a config file to allow pip to install packages outside of apt/the Debian repos COPY ["pip.conf", "/etc/pip.conf"] diff --git a/dockers/docker-base-bookworm/etc/rsyslog.conf b/dockers/docker-base-bookworm/etc/rsyslog.conf index 7a6667d68a1..9ad594ac171 100644 --- a/dockers/docker-base-bookworm/etc/rsyslog.conf +++ b/dockers/docker-base-bookworm/etc/rsyslog.conf @@ -9,24 +9,20 @@ #### MODULES #### ################# -$ModLoad imuxsock # provides support for local system logging - # # Set a rate limit on messages from the container # -$SystemLogRateLimitInterval 300 -$SystemLogRateLimitBurst 20000 - -#$ModLoad imklog # provides kernel logging support -#$ModLoad immark # provides --MARK-- message capability +module(load="imuxsock" SysSock.RateLimit.Interval="300" SysSock.RateLimit.Burst="20000") # provides support for local system logging +#module(load="imklog") # provides kernel logging support +#module(load="immark") # provides --MARK-- message capability # provides UDP syslog reception -#$ModLoad imudp -#$UDPServerRun 514 +#module(load="imudp") +#input(type="imudp" port="514") # provides TCP syslog reception -#$ModLoad imtcp -#$InputTCPServerRun 514 +#module(load="imtcp") +#input(type="imtcp" port="514") ########################### @@ -36,8 +32,12 @@ $SystemLogRateLimitBurst 20000 set $.CONTAINER_NAME=getenv("CONTAINER_NAME"); # Set remote syslog server +# Keep container syslog writers non-blocking if host-side RELP backpressure fills +# the action queue. Dropping at queue saturation is safer than stalling service +# initialization in syslog()/sendto(). template (name="ForwardFormatInContainer" type="string" string="<%PRI%>%TIMESTAMP:::date-rfc3339% %HOSTNAME% %$.CONTAINER_NAME%#%syslogtag%%msg:::sp-if-no-1st-sp%%msg%") -*.* action(type="omfwd" target=`echo $SYSLOG_TARGET_IP` port="514" protocol="udp" Template="ForwardFormatInContainer") +module(load="omrelp") +*.* action(type="omrelp" target=`echo $SYSLOG_TARGET_IP` port="2514" action.resumeRetryCount="60" queue.type="LinkedList" queue.size="20000" queue.timeoutEnqueue="0" Template="ForwardFormatInContainer") # # Use traditional timestamp format. @@ -75,4 +75,4 @@ $RepeatedMsgReduction on ############### #### RULES #### -############### \ No newline at end of file +############### diff --git a/dockers/docker-base-bookworm/no-check-valid-until b/dockers/docker-base-bookworm/no-check-valid-until deleted file mode 100644 index c7c25d017f7..00000000000 --- a/dockers/docker-base-bookworm/no-check-valid-until +++ /dev/null @@ -1,4 +0,0 @@ -# Instruct apt-get to NOT check the "Valid Until" date in Release files -# Once the Debian team archives a repo, they stop updating this date - -Acquire::Check-Valid-Until "false"; diff --git a/dockers/docker-base-bookworm/no_install_recommend_suggest b/dockers/docker-base-bookworm/no_install_recommend_suggest deleted file mode 100644 index b5bca577de1..00000000000 --- a/dockers/docker-base-bookworm/no_install_recommend_suggest +++ /dev/null @@ -1,5 +0,0 @@ -# Instruct apt-get to NOT install "recommended" or "suggested" packages by -# default when installing a package. - -APT::Install-Recommends "false"; -APT::Install-Suggests "false"; diff --git a/dockers/docker-base-bullseye/Dockerfile.j2 b/dockers/docker-base-bullseye/Dockerfile.j2 index 57fe769b320..38fbdc32a4b 100644 --- a/dockers/docker-base-bullseye/Dockerfile.j2 +++ b/dockers/docker-base-bullseye/Dockerfile.j2 @@ -52,7 +52,7 @@ RUN apt-get update && \ # default rsyslog version is 8.2110.0 which has a bug on log rate limit, # use backport version 8.2206.0-1~bpo11+1 -RUN apt-get -t bullseye-backports -y install rsyslog +RUN apt-get -t bullseye-backports -y install rsyslog rsyslog-relp # Upgrade pip via PyPI and uninstall the Debian version RUN pip3 install --upgrade pip diff --git a/dockers/docker-base-bullseye/etc/rsyslog.conf b/dockers/docker-base-bullseye/etc/rsyslog.conf index 7a6667d68a1..de0413e9963 100644 --- a/dockers/docker-base-bullseye/etc/rsyslog.conf +++ b/dockers/docker-base-bullseye/etc/rsyslog.conf @@ -9,24 +9,20 @@ #### MODULES #### ################# -$ModLoad imuxsock # provides support for local system logging - # # Set a rate limit on messages from the container # -$SystemLogRateLimitInterval 300 -$SystemLogRateLimitBurst 20000 - -#$ModLoad imklog # provides kernel logging support -#$ModLoad immark # provides --MARK-- message capability +module(load="imuxsock" SysSock.RateLimit.Interval="300" SysSock.RateLimit.Burst="20000") # provides support for local system logging +#module(load="imklog") # provides kernel logging support +#module(load="immark") # provides --MARK-- message capability # provides UDP syslog reception -#$ModLoad imudp -#$UDPServerRun 514 +#module(load="imudp") +#input(type="imudp" port="514") # provides TCP syslog reception -#$ModLoad imtcp -#$InputTCPServerRun 514 +#module(load="imtcp") +#input(type="imtcp" port="514") ########################### @@ -36,8 +32,12 @@ $SystemLogRateLimitBurst 20000 set $.CONTAINER_NAME=getenv("CONTAINER_NAME"); # Set remote syslog server +# Keep container syslog writers non-blocking if host-side RELP backpressure fills +# the action queue. Dropping at queue saturation is safer than stalling service +# initialization in syslog()/sendto(). template (name="ForwardFormatInContainer" type="string" string="<%PRI%>%TIMESTAMP:::date-rfc3339% %HOSTNAME% %$.CONTAINER_NAME%#%syslogtag%%msg:::sp-if-no-1st-sp%%msg%") -*.* action(type="omfwd" target=`echo $SYSLOG_TARGET_IP` port="514" protocol="udp" Template="ForwardFormatInContainer") +module(load="omrelp") +*.* action(type="omrelp" target=`echo $SYSLOG_TARGET_IP` port="2514" action.resumeRetryCount="-1" queue.type="LinkedList" queue.size="20000" queue.timeoutEnqueue="0" Template="ForwardFormatInContainer") # # Use traditional timestamp format. @@ -75,4 +75,4 @@ $RepeatedMsgReduction on ############### #### RULES #### -############### \ No newline at end of file +############### diff --git a/dockers/docker-base-trixie/Dockerfile.j2 b/dockers/docker-base-trixie/Dockerfile.j2 index 6164a30ca44..86c42ae6f75 100644 --- a/dockers/docker-base-trixie/Dockerfile.j2 +++ b/dockers/docker-base-trixie/Dockerfile.j2 @@ -16,8 +16,10 @@ ENV DEBIAN_FRONTEND=noninteractive # Configure data sources for apt/dpkg COPY ["dpkg_01_drop", "/etc/dpkg/dpkg.cfg.d/01_drop"] COPY ["sources.list.{{ CONFIGURED_ARCH }}", "/etc/apt/sources.list"] -COPY ["no_install_recommend_suggest", "/etc/apt/apt.conf.d"] -COPY ["no-check-valid-until", "/etc/apt/apt.conf.d"] +COPY ["files/apt/apt.conf.d/", "/etc/apt/apt.conf.d/"] +# Install certificates by disabling the peer verification +RUN apt -o Acquire::https::Verify-Peer=false update && \ + apt -o Acquire::https::Verify-Peer=false install -y ca-certificates # Update apt cache and # pre-install fundamental packages @@ -34,6 +36,7 @@ RUN apt update && \ python-is-python3 \ vim-tiny \ rsyslog \ + rsyslog-relp \ # Install rsync for copying over only changes between layers rsync \ # Install redis-tools @@ -43,7 +46,6 @@ RUN apt update && \ libdbus-1-3 \ libjansson4 \ # ip and ifconfig utility missing in docker for arm arch - iproute2 \ net-tools \ # for processing/handling json files in bash environment jq \ @@ -64,7 +66,7 @@ COPY ["pip.conf", "/etc/pip.conf"] {% endif %} # For templating -RUN pip3 install j2cli +RUN pip3 install jinjanator # Add support for supervisord to handle startup dependencies RUN pip3 install supervisord-dependent-startup==1.4.0 @@ -78,8 +80,13 @@ RUN apt autoremove -y --purge # Copy locally-built Debian package dependencies {{ copy_files("debs/", docker_base_trixie_debs.split(' '), "/debs/") }} +# Refresh apt cache so install_debian_packages can resolve dependencies +RUN apt-get update + # Install built Debian packages and implicitly install their dependencies {{ install_debian_packages(docker_base_trixie_debs.split(' ')) }} + +RUN rm -rf /var/lib/apt/lists/* {%- endif %} COPY ["etc/rsyslog.conf", "/etc/rsyslog.conf"] diff --git a/dockers/docker-base-trixie/etc/rsyslog.conf b/dockers/docker-base-trixie/etc/rsyslog.conf index 7a6667d68a1..9ad594ac171 100644 --- a/dockers/docker-base-trixie/etc/rsyslog.conf +++ b/dockers/docker-base-trixie/etc/rsyslog.conf @@ -9,24 +9,20 @@ #### MODULES #### ################# -$ModLoad imuxsock # provides support for local system logging - # # Set a rate limit on messages from the container # -$SystemLogRateLimitInterval 300 -$SystemLogRateLimitBurst 20000 - -#$ModLoad imklog # provides kernel logging support -#$ModLoad immark # provides --MARK-- message capability +module(load="imuxsock" SysSock.RateLimit.Interval="300" SysSock.RateLimit.Burst="20000") # provides support for local system logging +#module(load="imklog") # provides kernel logging support +#module(load="immark") # provides --MARK-- message capability # provides UDP syslog reception -#$ModLoad imudp -#$UDPServerRun 514 +#module(load="imudp") +#input(type="imudp" port="514") # provides TCP syslog reception -#$ModLoad imtcp -#$InputTCPServerRun 514 +#module(load="imtcp") +#input(type="imtcp" port="514") ########################### @@ -36,8 +32,12 @@ $SystemLogRateLimitBurst 20000 set $.CONTAINER_NAME=getenv("CONTAINER_NAME"); # Set remote syslog server +# Keep container syslog writers non-blocking if host-side RELP backpressure fills +# the action queue. Dropping at queue saturation is safer than stalling service +# initialization in syslog()/sendto(). template (name="ForwardFormatInContainer" type="string" string="<%PRI%>%TIMESTAMP:::date-rfc3339% %HOSTNAME% %$.CONTAINER_NAME%#%syslogtag%%msg:::sp-if-no-1st-sp%%msg%") -*.* action(type="omfwd" target=`echo $SYSLOG_TARGET_IP` port="514" protocol="udp" Template="ForwardFormatInContainer") +module(load="omrelp") +*.* action(type="omrelp" target=`echo $SYSLOG_TARGET_IP` port="2514" action.resumeRetryCount="60" queue.type="LinkedList" queue.size="20000" queue.timeoutEnqueue="0" Template="ForwardFormatInContainer") # # Use traditional timestamp format. @@ -75,4 +75,4 @@ $RepeatedMsgReduction on ############### #### RULES #### -############### \ No newline at end of file +############### diff --git a/dockers/docker-base-trixie/no-check-valid-until b/dockers/docker-base-trixie/no-check-valid-until deleted file mode 100644 index c7c25d017f7..00000000000 --- a/dockers/docker-base-trixie/no-check-valid-until +++ /dev/null @@ -1,4 +0,0 @@ -# Instruct apt-get to NOT check the "Valid Until" date in Release files -# Once the Debian team archives a repo, they stop updating this date - -Acquire::Check-Valid-Until "false"; diff --git a/dockers/docker-base-trixie/no_install_recommend_suggest b/dockers/docker-base-trixie/no_install_recommend_suggest deleted file mode 100644 index b5bca577de1..00000000000 --- a/dockers/docker-base-trixie/no_install_recommend_suggest +++ /dev/null @@ -1,5 +0,0 @@ -# Instruct apt-get to NOT install "recommended" or "suggested" packages by -# default when installing a package. - -APT::Install-Recommends "false"; -APT::Install-Suggests "false"; diff --git a/dockers/docker-bmp-watchdog/Dockerfile.j2 b/dockers/docker-bmp-watchdog/Dockerfile.j2 index e3f255638a5..cfe1b6f2d81 100644 --- a/dockers/docker-bmp-watchdog/Dockerfile.j2 +++ b/dockers/docker-bmp-watchdog/Dockerfile.j2 @@ -1,5 +1,5 @@ {% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files, rsync_from_builder_stage %} -ARG BASE=docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} +ARG BASE=docker-config-engine-trixie-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} FROM $BASE AS builder @@ -39,6 +39,8 @@ RUN chmod +x /usr/bin/bmp_watchdog FROM $BASE +ARG image_version + {{ rsync_from_builder_stage() }} # Make apt-get non-interactive diff --git a/dockers/docker-config-engine-bookworm/Dockerfile.j2 b/dockers/docker-config-engine-bookworm/Dockerfile.j2 index 2fb036c9ee2..4911229c6ef 100644 --- a/dockers/docker-config-engine-bookworm/Dockerfile.j2 +++ b/dockers/docker-config-engine-bookworm/Dockerfile.j2 @@ -11,7 +11,8 @@ RUN apt-get update && \ apt-utils \ build-essential \ python3-dev \ - python3-yaml + python3-yaml \ + python3-cffi {%- if CONFIGURED_ARCH == "armhf" or CONFIGURED_ARCH == "arm64" %} RUN apt-get install -y \ diff --git a/dockers/docker-config-engine-bullseye/Dockerfile.j2 b/dockers/docker-config-engine-bullseye/Dockerfile.j2 index 557942cff64..b0e0e261ec5 100644 --- a/dockers/docker-config-engine-bullseye/Dockerfile.j2 +++ b/dockers/docker-config-engine-bullseye/Dockerfile.j2 @@ -10,7 +10,8 @@ RUN apt-get update && \ apt-get install -y \ apt-utils \ build-essential \ - python3-dev + python3-dev \ + python3-cffi {%- if CONFIGURED_ARCH == "armhf" or CONFIGURED_ARCH == "arm64" %} RUN apt-get install -y \ diff --git a/dockers/docker-config-engine-buster/Dockerfile.j2 b/dockers/docker-config-engine-buster/Dockerfile.j2 index 084956eed5f..7305f43c45b 100644 --- a/dockers/docker-config-engine-buster/Dockerfile.j2 +++ b/dockers/docker-config-engine-buster/Dockerfile.j2 @@ -8,7 +8,8 @@ RUN apt-get update && \ apt-get install -y \ apt-utils \ build-essential \ - python3-dev + python3-dev \ + python3-cffi {%- if CONFIGURED_ARCH == "armhf" or CONFIGURED_ARCH == "arm64" %} RUN apt-get install -y \ diff --git a/dockers/docker-config-engine-trixie/Dockerfile.j2 b/dockers/docker-config-engine-trixie/Dockerfile.j2 index 2b75f2513d6..83b359e5d91 100644 --- a/dockers/docker-config-engine-trixie/Dockerfile.j2 +++ b/dockers/docker-config-engine-trixie/Dockerfile.j2 @@ -11,6 +11,7 @@ RUN apt update && \ apt-utils \ build-essential \ python3-dev \ + python3-cffi \ python3-redis \ python3-yaml diff --git a/dockers/docker-config-engine/Dockerfile.j2 b/dockers/docker-config-engine/Dockerfile.j2 index c470102fa4c..0f78efeed48 100644 --- a/dockers/docker-config-engine/Dockerfile.j2 +++ b/dockers/docker-config-engine/Dockerfile.j2 @@ -6,7 +6,7 @@ ENV DEBIAN_FRONTEND=noninteractive RUN apt-get update # Dependencies for sonic-cfggen -RUN apt-get install -y build-essential python-dev +RUN apt-get install -y build-essential python-dev python3-cffi # Install python-redis RUN pip install redis>=3.5.3 diff --git a/dockers/docker-dash-ha/Dockerfile.j2 b/dockers/docker-dash-ha/Dockerfile.j2 index 450e0f39ac6..2599e495527 100644 --- a/dockers/docker-dash-ha/Dockerfile.j2 +++ b/dockers/docker-dash-ha/Dockerfile.j2 @@ -1,5 +1,5 @@ {% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files, rsync_from_builder_stage %} -ARG BASE=docker-swss-layer-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} +ARG BASE=docker-swss-layer-trixie-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} FROM $BASE AS base diff --git a/dockers/docker-dash-ha/supervisord.conf b/dockers/docker-dash-ha/supervisord.conf index 92d08a837a6..e89a7bdda51 100644 --- a/dockers/docker-dash-ha/supervisord.conf +++ b/dockers/docker-dash-ha/supervisord.conf @@ -14,7 +14,7 @@ buffer_size=1024 [eventlistener:supervisor-proc-exit-listener] command=/usr/bin/supervisor-proc-exit-listener-rs --container-name dash-ha -events=PROCESS_STATE_EXITED,PROCESS_STATE_RUNNING +events=PROCESS_STATE_EXITED,PROCESS_STATE_RUNNING,PROCESS_STATE_FATAL autostart=true autorestart=unexpected buffer_size=1024 @@ -45,6 +45,7 @@ dependent_startup_wait_for=rsyslogd:running [program:swbusd] command=/bin/bash -c 'SLOT=${DEV: -1}; exec /usr/bin/swbusd -s "$SLOT"' +environment=RUST_BACKTRACE=full priority=3 autostart=false autorestart=true @@ -57,6 +58,7 @@ dependent_startup_wait_for=wait-for-loopback:exited [program:hamgrd] command=/bin/bash -c 'SLOT=${DEV: -1}; exec /usr/bin/hamgrd -s "$SLOT"' +environment=RUST_BACKTRACE=full priority=4 autostart=false autorestart=false diff --git a/dockers/docker-database/Dockerfile.common.j2 b/dockers/docker-database/Dockerfile.common.j2 new file mode 100644 index 00000000000..26bc75c655e --- /dev/null +++ b/dockers/docker-database/Dockerfile.common.j2 @@ -0,0 +1,25 @@ +{# Common Dockerfile for docker-database + Shared between standalone docker-database and docker-sonic-vs. + Configures redis server settings. + When included via --build-context, set copy_from="database" to use COPY --from=database +#} +{% set _from = "--from=" + copy_from + " " if copy_from is defined else "" %} + +# Configure redis settings +RUN sed -ri 's/^# save ""$/save ""/g; \ + s/^daemonize yes$/daemonize no/; \ + s/^logfile .*$/logfile ""/; \ + s/^# syslog-enabled no$/syslog-enabled no/; \ + s/^# unixsocket/unixsocket/; \ + s/redis-server.sock/redis.sock/g; \ + s/^client-output-buffer-limit pubsub [0-9]+mb [0-9]+mb [0-9]+/client-output-buffer-limit pubsub 0 0 0/; \ + s/^notify-keyspace-events ""$/notify-keyspace-events AKE/; \ + s/^databases [0-9]+$/databases 100/ \ + ' /etc/redis/redis.conf + +COPY {{ _from }}["flush_unused_database", "/usr/local/bin/"] +COPY {{ _from }}["docker-database-init.sh", "/usr/local/bin/"] +COPY ["files/update_chassisdb_config", "/usr/local/bin/"] +COPY {{ _from }}["database_config.json.j2", "/usr/share/sonic/templates/"] +COPY {{ _from }}["database_global.json.j2", "/usr/share/sonic/templates/"] +COPY {{ _from }}["multi_database_config.json.j2", "/usr/share/sonic/templates/"] diff --git a/dockers/docker-database/Dockerfile.j2 b/dockers/docker-database/Dockerfile.j2 index 27a55026dae..9e82de897ae 100644 --- a/dockers/docker-database/Dockerfile.j2 +++ b/dockers/docker-database/Dockerfile.j2 @@ -1,5 +1,5 @@ {% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files, rsync_from_builder_stage %} -ARG BASE=docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} +ARG BASE=docker-config-engine-trixie-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} FROM $BASE AS base @@ -25,31 +25,17 @@ RUN pip3 install click {{ install_debian_packages(docker_database_debs.split(' ')) }} {%- endif %} -# Configure redis settings -RUN sed -ri 's/^# save ""$/save ""/g; \ - s/^daemonize yes$/daemonize no/; \ - s/^logfile .*$/logfile ""/; \ - s/^# syslog-enabled no$/syslog-enabled no/; \ - s/^# unixsocket/unixsocket/; \ - s/redis-server.sock/redis.sock/g; \ - s/^client-output-buffer-limit pubsub [0-9]+mb [0-9]+mb [0-9]+/client-output-buffer-limit pubsub 0 0 0/; \ - s/^notify-keyspace-events ""$/notify-keyspace-events AKE/; \ - s/^databases [0-9]+$/databases 100/ \ - ' /etc/redis/redis.conf +{% include "Dockerfile.common.j2" %} COPY ["supervisord.conf.j2", "/usr/share/sonic/templates/"] COPY ["critical_processes.j2", "/usr/share/sonic/templates/"] -COPY ["docker-database-init.sh", "/usr/local/bin/"] -COPY ["database_config.json.j2", "/usr/share/sonic/templates/"] -COPY ["database_global.json.j2", "/usr/share/sonic/templates/"] COPY ["files/90-sonic.conf", "/usr/lib/sysctl.d/"] -COPY ["files/update_chassisdb_config", "/usr/local/bin/"] -COPY ["flush_unused_database", "/usr/local/bin/"] -COPY ["multi_database_config.json.j2", "/usr/share/sonic/templates/"] + FROM $BASE {{ rsync_from_builder_stage() }} ENV DEBIAN_FRONTEND=noninteractive +ENV INCLUDE_SYSTEM_EVENTD={{ include_system_eventd | default("n") }} ENTRYPOINT ["/usr/local/bin/docker-database-init.sh"] diff --git a/dockers/docker-database/database_config.json.j2 b/dockers/docker-database/database_config.json.j2 index b97589d3733..6d73a538e08 100644 --- a/dockers/docker-database/database_config.json.j2 +++ b/dockers/docker-database/database_config.json.j2 @@ -146,6 +146,14 @@ "separator": "|", "instance" : "redis_bmp" } +{% endif %} +{% if include_system_eventd is defined and include_system_eventd == "y" %} + , + "EVENT_DB" : { + "id" : 19, + "separator": "|", + "instance" : "redis" + } {% endif %} }, "VERSION" : "1.0" diff --git a/dockers/docker-database/docker-database-init.sh b/dockers/docker-database/docker-database-init.sh index eb0348c2ae9..29f838f7468 100755 --- a/dockers/docker-database/docker-database-init.sh +++ b/dockers/docker-database/docker-database-init.sh @@ -41,6 +41,7 @@ then fi fi + export BMP_DB_PORT=6400 REDIS_DIR=/var/run/redis$NAMESPACE_ID @@ -51,9 +52,9 @@ if [ -f /etc/sonic/database_config$NAMESPACE_ID.json ]; then cp /etc/sonic/database_config$NAMESPACE_ID.json $REDIS_DIR/sonic-db/database_config.json else if [ -f /etc/sonic/enable_multidb ]; then - HOST_IP=$host_ip REDIS_PORT=$redis_port DATABASE_TYPE=$DATABASE_TYPE BMP_DB_PORT=$BMP_DB_PORT j2 /usr/share/sonic/templates/multi_database_config.json.j2 > $REDIS_DIR/sonic-db/database_config.json + HOST_IP=$host_ip REDIS_PORT=$redis_port DATABASE_TYPE=$DATABASE_TYPE BMP_DB_PORT=$BMP_DB_PORT include_system_eventd=$INCLUDE_SYSTEM_EVENTD jinjanate /usr/share/sonic/templates/multi_database_config.json.j2 > $REDIS_DIR/sonic-db/database_config.json else - HOST_IP=$host_ip REDIS_PORT=$redis_port DATABASE_TYPE=$DATABASE_TYPE BMP_DB_PORT=$BMP_DB_PORT j2 /usr/share/sonic/templates/database_config.json.j2 > $REDIS_DIR/sonic-db/database_config.json + HOST_IP=$host_ip REDIS_PORT=$redis_port DATABASE_TYPE=$DATABASE_TYPE BMP_DB_PORT=$BMP_DB_PORT include_system_eventd=$INCLUDE_SYSTEM_EVENTD jinjanate /usr/share/sonic/templates/database_config.json.j2 > $REDIS_DIR/sonic-db/database_config.json fi fi @@ -101,13 +102,37 @@ then if [ -f /etc/sonic/database_global.json ]; then cp /etc/sonic/database_global.json $REDIS_DIR/sonic-db/database_global.json else - j2 /usr/share/sonic/templates/database_global.json.j2 > $REDIS_DIR/sonic-db/database_global.json + jinjanate /usr/share/sonic/templates/database_global.json.j2 > $REDIS_DIR/sonic-db/database_global.json fi fi # delete chassisdb config to generate supervisord config update_chassisdb_config -j $db_cfg_file_tmp -d -# Set protected mode based on the hostname -additional_data_json=$(jq -c '{INSTANCES: .INSTANCES | map_values({is_protected_mode: (.hostname == "127.0.0.1")})}' "$db_cfg_file_tmp") + +# On Switch-BMC systems, bind the BMC-side 'redis' instance to the bmc-link IP in addition to loopback. +# This is used by Switch-Host to push data into BMC-side DB (e.g. thermalctld publishing thermals). +bmc_link_ip="" +bmc_link_if="" +if [ -f /usr/share/sonic/platform/platform_env.conf ] && \ + grep -q '^switch_bmc=1' /usr/share/sonic/platform/platform_env.conf 2>/dev/null && \ + [ -f /etc/sonic/bmc.json ]; then + bmc_link_ip=$(jq -r '.bmc_addr // empty' /etc/sonic/bmc.json) + bmc_link_if=$(jq -r '.bmc_if_name // empty' /etc/sonic/bmc.json) +fi + +# Set protected mode based on the hostname; if bmc_link_ip is set, disable protected-mode on the main 'redis' instance +# and inject the extra bind IP / iface name so the supervisord template emits them on the --bind line and the +# pre-exec interface-ready wait-loop. +if [ -n "$bmc_link_ip" ] && [ -n "$bmc_link_if" ]; then + additional_data_json=$(jq -c --arg bmc "$bmc_link_ip" --arg bmcif "$bmc_link_if" \ + '{INSTANCES: .INSTANCES | with_entries( + if .key == "redis" + then .value += {is_protected_mode: false, bmc_link_ip: $bmc, bmc_link_if: $bmcif} + else .value += {is_protected_mode: (.value.hostname == "127.0.0.1")} + end)}' \ + "$db_cfg_file_tmp") +else + additional_data_json=$(jq -c '{INSTANCES: .INSTANCES | map_values({is_protected_mode: (.hostname == "127.0.0.1")})}' "$db_cfg_file_tmp") +fi # For Linecard databases, disable Redis protected mode to expose them to the midplane. if [ -f "$chassisdb_config" ] && [[ "$start_chassis_db" != "1" ]]; then additional_data_json=$(jq -c '{INSTANCES: .INSTANCES | map_values({is_protected_mode: false})}' "$db_cfg_file_tmp") @@ -143,6 +168,8 @@ done chown -R redis:redis $REDIS_DIR REDIS_BMP_DIR="/var/lib/redis_bmp" -chown -R redis:redis $REDIS_BMP_DIR +if [[ -d $REDIS_BMP_DIR ]]; then + chown -R redis:redis $REDIS_BMP_DIR +fi exec /usr/local/bin/supervisord diff --git a/dockers/docker-database/multi_database_config.json.j2 b/dockers/docker-database/multi_database_config.json.j2 index 26ddb006b83..54d7cc33767 100644 --- a/dockers/docker-database/multi_database_config.json.j2 +++ b/dockers/docker-database/multi_database_config.json.j2 @@ -59,13 +59,17 @@ "unix_socket_path": "", "persistence_for_warm_boot" : "yes" } -{% endif %}, +{% endif %} +{% if DATABASE_TYPE is defined and DATABASE_TYPE == "dpudb" %} +{% else %} + , "redis_bmp":{ "hostname" : "{{HOST_IP}}", "port" : {{BMP_DB_PORT}}, "unix_socket_path" : "/var/run/redis{{DEV}}/redis_bmp.sock", "persistence_for_warm_boot" : "yes" } +{% endif %} }, "DATABASES" : { "APPL_DB": { @@ -181,12 +185,14 @@ "separator": ":", "instance" : {% if include_remote_db %} "remote_redis" {% else %} "redis" {% endif %} } -{% endif %}, - "BMP_STATE_DB" : { +{% else %} + , + "BMP_STATE_DB" : { "id" : 20, "separator": "|", "instance" : "redis_bmp" } +{% endif %} }, "VERSION" : "1.0" } diff --git a/dockers/docker-database/supervisord.conf.j2 b/dockers/docker-database/supervisord.conf.j2 index 7c4aa1d15ab..b98074afa63 100644 --- a/dockers/docker-database/supervisord.conf.j2 +++ b/dockers/docker-database/supervisord.conf.j2 @@ -14,7 +14,7 @@ buffer_size=1024 [eventlistener:supervisor-proc-exit-listener] command=/usr/bin/supervisor-proc-exit-listener-rs --container-name database -events=PROCESS_STATE_EXITED,PROCESS_STATE_RUNNING +events=PROCESS_STATE_EXITED,PROCESS_STATE_RUNNING,PROCESS_STATE_FATAL autostart=true autorestart=unexpected buffer_size=1024 @@ -46,7 +46,7 @@ dependent_startup=true {%- else %} {%- set ADDITIONAL_OPTS = '' %} {%- endif -%} -command=/bin/bash -c "{ [[ -s /var/lib/{{ redis_inst }}/dump.rdb ]] || rm -f /var/lib/{{ redis_inst }}/dump.rdb; } && mkdir -p /var/lib/{{ redis_inst }} && exec /usr/bin/redis-server /etc/redis/redis.conf --bind {{ LOOPBACK_IP }} {{ redis_items['hostname'] }} --port {{ redis_items['port'] }} --unixsocket {{ redis_items['unix_socket_path'] }} --pidfile /var/run/redis/{{ redis_inst }}.pid --dir /var/lib/{{ redis_inst }} {{ ADDITIONAL_OPTS }}" +command=/bin/bash -c "{ [[ -s /var/lib/{{ redis_inst }}/dump.rdb ]] || rm -f /var/lib/{{ redis_inst }}/dump.rdb; } && mkdir -p /var/lib/{{ redis_inst }} && {% if redis_items.get('bmc_link_ip') and redis_items.get('bmc_link_if') %}for ((i=0; i<300; i++)); do ip -o -4 addr show dev {{ redis_items['bmc_link_if'] }} up 2>/dev/null | grep -q 'inet {{ redis_items['bmc_link_ip'] }}/' && break; sleep 1; done; ip -o -4 addr show dev {{ redis_items['bmc_link_if'] }} up 2>/dev/null | grep -q 'inet {{ redis_items['bmc_link_ip'] }}/' || { echo 'Timed out waiting for {{ redis_items['bmc_link_if'] }} to be configured with {{ redis_items['bmc_link_ip'] }}' >&2; exit 1; } && {% endif %}exec /usr/bin/redis-server /etc/redis/redis.conf --bind {{ LOOPBACK_IP }} {{ redis_items['hostname'] }}{% if redis_items.get('bmc_link_ip') and redis_items.get('bmc_link_if') %} {{ redis_items['bmc_link_ip'] }}{% endif %} --port {{ redis_items['port'] }} --unixsocket {{ redis_items['unix_socket_path'] }} --pidfile /var/run/redis/{{ redis_inst }}.pid --dir /var/lib/{{ redis_inst }} {{ ADDITIONAL_OPTS }}" priority=2 user=redis autostart=true diff --git a/dockers/docker-dhcp-relay/Dockerfile.j2 b/dockers/docker-dhcp-relay/Dockerfile.j2 index c364858becc..68f6505873d 100644 --- a/dockers/docker-dhcp-relay/Dockerfile.j2 +++ b/dockers/docker-dhcp-relay/Dockerfile.j2 @@ -1,5 +1,5 @@ {% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files, rsync_from_builder_stage %} -ARG BASE=docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} +ARG BASE=docker-config-engine-trixie-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} FROM $BASE AS base @@ -47,6 +47,8 @@ COPY ["cli", "/cli/"] FROM $BASE +ARG image_version + {{ rsync_from_builder_stage() }} # Pass the image_version to container diff --git a/dockers/docker-dhcp-relay/cli-plugin-tests/test_clear_dhcp_relay.py b/dockers/docker-dhcp-relay/cli-plugin-tests/test_clear_dhcp_relay.py index a97d1511559..832e1553cd9 100644 --- a/dockers/docker-dhcp-relay/cli-plugin-tests/test_clear_dhcp_relay.py +++ b/dockers/docker-dhcp-relay/cli-plugin-tests/test_clear_dhcp_relay.py @@ -80,27 +80,35 @@ def test_is_vlan_interface_valid(patch_import_module, test_param_result): .format(act_res, vlan_interface, test_param_result[1])) -@pytest.mark.parametrize("direction, type, keys, db_dhcp_type, paused_vlans", [ +@pytest.mark.parametrize("direction, type, keys, db_dhcp_type, paused_vlans, prefix, supported_types", [ + # v4 test cases (None, None, ["DHCPV4_COUNTER_TABLE:Vlan100:Ethernet1", "DHCPV4_COUNTER_TABLE_Vlan100", - "DHCPV4_COUNTER_TABLE_Vlan1000"], set(["Discover"]), set(["Vlan100"])), + "DHCPV4_COUNTER_TABLE_Vlan1000"], set(["Discover"]), set(["Vlan100"]), + "DHCPV4_COUNTER_TABLE_PREFIX", "SUPPORTED_DHCP_TYPE"), ("RX", "Offer", ["DHCPV4_COUNTER_TABLE:Vlan100:Ethernet1", "DHCPV4_COUNTER_TABLE_Vlan100", - "DHCPV4_COUNTER_TABLE_Vlan1000"], set(["Discover", "Offer"]), set(["Vlan100"])), - ("TX", "Ack", ["DHCPV4_COUNTER_TABLE:Vlan100:Ethernet1", "DHCPV4_COUNTER_TABLE_Vlan100", - "DHCPV4_COUNTER_TABLE_Vlan1000"], set(["Discover", "Offer"]), set(["Vlan100"])), - ("TX", "Ack", ["DHCPV4_COUNTER_TABLE:Vlan100:Ethernet1", "DHCPV4_COUNTER_TABLE_Vlan100", - "DHCPV4_COUNTER_TABLE_Vlan1000"], None, set(["Vlan100"])) + "DHCPV4_COUNTER_TABLE_Vlan1000"], set(["Discover", "Offer"]), set(["Vlan100"]), + "DHCPV4_COUNTER_TABLE_PREFIX", "SUPPORTED_DHCP_TYPE"), + # v6 test cases + (None, None, ["DHCPV6_COUNTER_TABLE:Vlan100:Ethernet1", "DHCPV6_COUNTER_TABLE_Vlan100", + "DHCPV6_COUNTER_TABLE_Vlan1000"], set(["Solicit"]), set(["Vlan100"]), + "DHCPV6_COUNTER_TABLE_PREFIX", "SUPPORTED_DHCPV6_TYPE"), + ("TX", "Reply", ["DHCPV6_COUNTER_TABLE:Vlan100:Ethernet1", "DHCPV6_COUNTER_TABLE_Vlan100", + "DHCPV6_COUNTER_TABLE_Vlan1000"], set(["Solicit", "Reply"]), set(["Vlan100"]), + "DHCPV6_COUNTER_TABLE_PREFIX", "SUPPORTED_DHCPV6_TYPE"), ]) -def test_clear_dhcpv4_db_counters(patch_import_module, direction, type, keys, - db_dhcp_type, paused_vlans): +def test_clear_dhcpmon_db_counters(patch_import_module, direction, type, keys, + db_dhcp_type, paused_vlans, prefix, supported_types): clear_dhcp_relay = patch_import_module mock_db = MagicMock() + table_prefix = getattr(clear_dhcp_relay, prefix) + sup_types = getattr(clear_dhcp_relay, supported_types) directions = [direction] if direction else clear_dhcp_relay.SUPPORTED_DIR - types = [type] if type else clear_dhcp_relay.SUPPORTED_DHCP_TYPE + types = [type] if type else sup_types mock_db.keys.return_value = keys count_obj = {} if db_dhcp_type is not None: for current_type in db_dhcp_type: - if current_type not in clear_dhcp_relay.SUPPORTED_DHCP_TYPE: + if current_type not in sup_types: continue # Set it to non zero before clearing count_obj[current_type] = "1" @@ -108,7 +116,14 @@ def test_clear_dhcpv4_db_counters(patch_import_module, direction, type, keys, else: mock_db.get.return_value = None with patch.object(clear_dhcp_relay, "is_vlan_interface_valid", return_value=True): - clear_dhcp_relay.clear_dhcpv4_db_counters(mock_db, direction, type, paused_vlans) + clear_dhcp_relay.clear_dhcpmon_db_counters( + mock_db, + direction, + type, + paused_vlans, + table_prefix, + sup_types + ) calls = [] for vlan_interface in paused_vlans: for key in keys: @@ -182,10 +197,20 @@ def test_clear_dhcp_relay_ipv6_counters(patch_import_module, interface): clear_dhcp_relay = patch_import_module runner = CliRunner() args = ["--interface={}".format(interface)] if interface else [] - with patch.object(clear_dhcp_relay, "clear_dhcp_relay_ipv6_counter") as mock_clear: + with patch.object(clear_dhcp_relay, "clear_dhcpmon_counters") as mock_clear: result = runner.invoke(clear_dhcp_relay.dhcp_relay.commands["ipv6"].commands["counters"], args) assert result.exit_code == 0 - mock_clear.assert_called_once_with(interface) + mock_clear.assert_called_once() + args_passed = mock_clear.call_args + # interface is the 2nd positional arg (after db) + assert args_passed[0][1] == (interface if interface else "") + # Verify v6-specific constants are passed + kwargs = args_passed[1] + assert kwargs["lock_file_path"] == clear_dhcp_relay.DHCPMON_CLEAR_COUNTER_LOCK_FILE + assert kwargs["state_table"] == clear_dhcp_relay.DHCPV6_COUNTER_UPDATE_STATE_TABLE + assert kwargs["counter_table_prefix"] == clear_dhcp_relay.DHCPV6_COUNTER_TABLE_PREFIX + assert kwargs["supported_types"] == clear_dhcp_relay.SUPPORTED_DHCPV6_TYPE + assert kwargs["version_label"] == "DHCPv6" def test_clear_dhcp_relay_ipv4_counters_no_root(patch_import_module): @@ -197,7 +222,7 @@ def test_clear_dhcp_relay_ipv4_counters_no_root(patch_import_module): mock_get_ctx.return_value = mock_ctx result = runner.invoke(clear_dhcp_relay.dhcp_relay.commands["ipv4"].commands["counters"]) assert result.exit_code == 0 - mock_ctx.fail.assert_called_once_with("Clear DHCPv4 counter need to be run with sudo permission") + mock_ctx.fail.assert_called_once_with("Clearing DHCPv4 counters requires sudo privileges") def test_clear_dhcp_relay_ipv4_counters_locked(patch_import_module): @@ -207,14 +232,19 @@ def test_clear_dhcp_relay_ipv4_counters_locked(patch_import_module): patch.object(clear_dhcp_relay, "open"), \ patch.object(fcntl, "flock", side_effect=BlockingIOError) as mock_flock, \ patch.object(clear_dhcp_relay, "notify_dhcpmon_processes"), \ - patch.object(clear_dhcp_relay, "clear_dhcpv4_db_counters"), \ + patch.object(clear_dhcp_relay, "clear_dhcpmon_db_counters"), \ patch.object(click, "get_current_context") as mock_get_ctx: mock_ctx = MagicMock() mock_get_ctx.return_value = mock_ctx result = runner.invoke(clear_dhcp_relay.dhcp_relay.commands["ipv4"].commands["counters"]) assert result.exit_code != 0 - mock_ctx.fail.assert_called_once_with("Cannot lock {}".format(clear_dhcp_relay.DHCPV4_CLEAR_COUNTER_LOCK_FILE) + - ", seems another user is clearing DHCPv4 relay counter simultaneous") + lock_file = clear_dhcp_relay.DHCPMON_CLEAR_COUNTER_LOCK_FILE + expected_msg = ( + "Cannot lock {}; another user is already clearing" + " DHCPv4 relay counters simultaneously" + .format(lock_file) + ) + mock_ctx.fail.assert_called_once_with(expected_msg) mock_flock.assert_has_calls([ call(ANY, fcntl.LOCK_EX | fcntl.LOCK_NB), call(ANY, fcntl.LOCK_UN) @@ -229,7 +259,10 @@ def test_clear_dhcp_relay_ipv4_counters_vlan_invalid(patch_import_module): patch.object(click, "get_current_context") as mock_get_ctx: mock_ctx = MagicMock() mock_get_ctx.return_value = mock_ctx - result = runner.invoke(clear_dhcp_relay.dhcp_relay.commands["ipv4"].commands["counters"], "--interface=Vlan1000") + result = runner.invoke( + clear_dhcp_relay.dhcp_relay.commands["ipv4"].commands["counters"], + "--interface=Vlan1000" + ) assert result.exit_code == 0 mock_ctx.fail.assert_called_once_with("Vlan1000 doesn't exist") @@ -254,10 +287,10 @@ def test_clear_dhcp_relay_ipv4_counters(patch_import_module, interface, dir, typ patch.object(fcntl, "flock") as mock_flock, \ patch.object(clear_dhcp_relay, "notify_dhcpmon_processes", return_value=set()) as mock_notify, \ patch.object(clear_dhcp_relay, "get_paused_vlans", return_value=paused_vlans), \ - patch.object(clear_dhcp_relay, "clear_dhcpv4_db_counters") as mock_clear, \ + patch.object(clear_dhcp_relay, "clear_dhcpmon_db_counters") as mock_clear, \ patch.object(clear_dhcp_relay, "is_vlan_interface_valid", return_value=True), \ - patch.object(clear_dhcp_relay, "get_failed_vlans", return_value=failed_vlans), \ - patch.object(clear_dhcp_relay, "clear_writing_state_db_flag") as mock_clear_writing_state_db_flag, \ + patch.object(clear_dhcp_relay, "get_failed_vlans_for_table", return_value=failed_vlans), \ + patch.object(clear_dhcp_relay, "clear_state_db_flags") as mock_clear_state_db_flags, \ patch.object(click, "get_current_context") as mock_get_ctx: mock_ctx = MagicMock() mock_get_ctx.return_value = mock_ctx @@ -271,12 +304,15 @@ def test_clear_dhcp_relay_ipv4_counters(patch_import_module, interface, dir, typ call(interface, signal.SIGUSR1), call(interface, signal.SIGUSR2) ]) - mock_clear.assert_called_once_with(ANY, dir, type, paused_vlans) + mock_clear.assert_called_once() + clear_args = mock_clear.call_args[0] + assert len(clear_args) >= 4 + assert clear_args[1:4] == (dir, type, paused_vlans) if failed_vlans: mock_ctx.fail.assert_called_once() - mock_clear_writing_state_db_flag.assert_has_calls([ - call(ANY), - call(ANY) + mock_clear_state_db_flags.assert_has_calls([ + call(ANY, ANY), + call(ANY, ANY) ]) @@ -285,7 +321,11 @@ def test_get_failed_vlans(patch_import_module, mock_get_result): clear_dhcp_relay = patch_import_module mock_db = MagicMock() mock_db.get.return_value = mock_get_result - failed_vlans = clear_dhcp_relay.get_failed_vlans(mock_db, set(["Vlan1000", "Vlan2000"])) + failed_vlans = clear_dhcp_relay.get_failed_vlans_for_table( + mock_db, + clear_dhcp_relay.DHCPV4_COUNTER_UPDATE_STATE_TABLE, + set(["Vlan1000", "Vlan2000"]) + ) if mock_get_result == "done": assert failed_vlans == {} else: @@ -297,7 +337,10 @@ def test_clear_writing_state_db_flag(patch_import_module): mock_db = MagicMock() keys = ["key1", "key2", "key3"] mock_db.keys.return_value = keys - clear_dhcp_relay.clear_writing_state_db_flag(mock_db) + clear_dhcp_relay.clear_state_db_flags( + mock_db, + clear_dhcp_relay.DHCPV4_COUNTER_UPDATE_STATE_TABLE + ) mock_db.delete.assert_has_calls([call(ANY, key) for key in keys]) @@ -337,9 +380,175 @@ def test_dhcp4relay_clear_vlan_counters_command(patch_import_module): runner = CliRunner() # Patch the actual clear function to verify call with patch.object(clear_dhcp_relay, "clear_dhcp_relay_ipv4_vlan_counter") as mock_clear: - result = runner.invoke(clear_dhcp_relay.dhcp4relay_clear.commands['dhcp4relay-vlan-counters'], ['-d', 'TX', 'Vlan1000']) + result = runner.invoke( + clear_dhcp_relay.dhcp4relay_clear.commands['dhcp4relay-vlan-counters'], + ['-d', 'TX', 'Vlan1000'] + ) assert result.exit_code == 0 + + +# ====================================================================== +# DHCPv6 dhcpmon clear counter command tests +# (mirrors v4 tests above with v6 constants) +# ====================================================================== + +def test_clear_dhcp_relay_ipv6_counters_no_root(patch_import_module): + clear_dhcp_relay = patch_import_module + runner = CliRunner() + with patch.object(os, "geteuid", return_value=1), \ + patch.object(click, "get_current_context") as mock_get_ctx: + mock_ctx = MagicMock() + mock_get_ctx.return_value = mock_ctx + result = runner.invoke( + clear_dhcp_relay.dhcp_relay + .commands["ipv6"].commands["counters"] + ) + assert result.exit_code == 0 + mock_ctx.fail.assert_called_once_with( + "Clearing DHCPv6 counters requires" + " sudo privileges" + ) + + +def test_clear_dhcp_relay_ipv6_counters_locked(patch_import_module): + clear_dhcp_relay = patch_import_module + runner = CliRunner() + with patch.object(os, "geteuid", return_value=0), \ + patch.object(clear_dhcp_relay, "open"), \ + patch.object( + fcntl, "flock", side_effect=BlockingIOError + ) as mock_flock, \ + patch.object( + clear_dhcp_relay, "notify_dhcpmon_processes" + ), \ + patch.object( + clear_dhcp_relay, "clear_dhcpmon_db_counters" + ), \ + patch.object( + click, "get_current_context" + ) as mock_get_ctx: + mock_ctx = MagicMock() + mock_get_ctx.return_value = mock_ctx + result = runner.invoke( + clear_dhcp_relay.dhcp_relay + .commands["ipv6"].commands["counters"] + ) + assert result.exit_code != 0 + lock_file = clear_dhcp_relay.DHCPMON_CLEAR_COUNTER_LOCK_FILE + expected_msg = ( + "Cannot lock {}; another user is already clearing" + " DHCPv6 relay counters simultaneously" + .format(lock_file) + ) + mock_ctx.fail.assert_called_once_with(expected_msg) + mock_flock.assert_has_calls([ + call(ANY, fcntl.LOCK_EX | fcntl.LOCK_NB), + call(ANY, fcntl.LOCK_UN) + ]) + + +def test_clear_dhcp_relay_ipv6_counters_vlan_invalid( + patch_import_module +): + clear_dhcp_relay = patch_import_module + runner = CliRunner() + with patch.object(os, "geteuid", return_value=0), \ + patch.object( + clear_dhcp_relay, "is_vlan_interface_valid", + return_value=False + ), \ + patch.object( + click, "get_current_context" + ) as mock_get_ctx: + mock_ctx = MagicMock() + mock_get_ctx.return_value = mock_ctx + result = runner.invoke( + clear_dhcp_relay.dhcp_relay + .commands["ipv6"].commands["counters"], + "--interface=Vlan1000" + ) + assert result.exit_code == 0 + mock_ctx.fail.assert_called_once_with( + "Vlan1000 doesn't exist" + ) + + +@pytest.mark.parametrize("interface", ["", "Vlan1000"]) +@pytest.mark.parametrize("dir", [None, "RX", "TX"]) +@pytest.mark.parametrize("type", [None, "Solicit"]) +@pytest.mark.parametrize( + "failed_vlans", + [{}, {"Vlan1000": set(["RX", "TX"])}] +) +def test_clear_dhcp_relay_ipv6_counters_full( + patch_import_module, interface, dir, type, failed_vlans +): + clear_dhcp_relay = patch_import_module + runner = CliRunner() + args = [] + if interface != "": + args.append("--interface={}".format(interface)) + if dir is not None: + args.append("--dir={}".format(dir)) + if type is not None: + args.append("--type={}".format(type)) + paused_vlans = set() + with patch.object(os, "geteuid", return_value=0), \ + patch.object(clear_dhcp_relay, "open"), \ + patch.object(fcntl, "flock") as mock_flock, \ + patch.object( + clear_dhcp_relay, "notify_dhcpmon_processes", + return_value=set() + ) as mock_notify, \ + patch.object( + clear_dhcp_relay, "get_paused_vlans", + return_value=paused_vlans + ), \ + patch.object( + clear_dhcp_relay, "clear_dhcpmon_db_counters" + ) as mock_clear, \ + patch.object( + clear_dhcp_relay, "is_vlan_interface_valid", + return_value=True + ), \ + patch.object( + clear_dhcp_relay, "get_failed_vlans_for_table", + return_value=failed_vlans + ), \ + patch.object( + clear_dhcp_relay, "clear_state_db_flags" + ) as mock_clear_state_db_flags, \ + patch.object( + click, "get_current_context" + ) as mock_get_ctx: + mock_ctx = MagicMock() + mock_get_ctx.return_value = mock_ctx + result = runner.invoke( + clear_dhcp_relay.dhcp_relay + .commands["ipv6"].commands["counters"], + args + ) + assert result.exit_code == 0 + mock_flock.assert_has_calls([ + call(ANY, fcntl.LOCK_EX | fcntl.LOCK_NB), + call(ANY, fcntl.LOCK_UN) + ]) + mock_notify.assert_has_calls([ + call(interface, signal.SIGUSR1), + call(interface, signal.SIGUSR2) + ]) + mock_clear.assert_called_once() + clear_args, clear_kwargs = mock_clear.call_args + assert len(clear_args) >= 4 + assert clear_args[1:4] == (dir, type, paused_vlans) + if failed_vlans: + mock_ctx.fail.assert_called_once() + mock_clear_state_db_flags.assert_has_calls([ + call(ANY, ANY), + call(ANY, ANY) + ]) + def test_register_adds_dhcp4relay_clear_vlan_counters(patch_import_module): clear_dhcp_relay = patch_import_module cli = MagicMock() diff --git a/dockers/docker-dhcp-relay/cli-plugin-tests/test_dhcpv4_relay.py b/dockers/docker-dhcp-relay/cli-plugin-tests/test_dhcpv4_relay.py index 3d0b4d043bf..329b71bcad8 100644 --- a/dockers/docker-dhcp-relay/cli-plugin-tests/test_dhcpv4_relay.py +++ b/dockers/docker-dhcp-relay/cli-plugin-tests/test_dhcpv4_relay.py @@ -494,7 +494,8 @@ def test_config_dhcpv4_relay_agent_relay_mode(self, mock_cfgdb): agent_relay_modes = [ "discard", "append", - "replace" + "replace", + "forward" ] for add_mode in agent_relay_modes: diff --git a/dockers/docker-dhcp-relay/cli-plugin-tests/test_show_dhcp4relay_counters.py b/dockers/docker-dhcp-relay/cli-plugin-tests/test_show_dhcp4relay_counters.py index e7e45524837..176f2b60b73 100644 --- a/dockers/docker-dhcp-relay/cli-plugin-tests/test_show_dhcp4relay_counters.py +++ b/dockers/docker-dhcp-relay/cli-plugin-tests/test_show_dhcp4relay_counters.py @@ -47,365 +47,6 @@ def test_plugin_registration(): show_dhcp_relay.register(cli) -@pytest.mark.parametrize("valid", [True, False]) -@pytest.mark.parametrize("vlan_interface", ["Vlan1000", ""]) -def test_is_vlan_interface_valid(valid, vlan_interface): - mock_db = MagicMock() - mock_db.exists.return_value = valid - result = show_dhcp_relay.is_vlan_interface_valid(vlan_interface, mock_db) - if vlan_interface: - assert result == valid - else: - assert result - - -def test_get_vlan_members_from_config_db(): - mock_db = MagicMock() - mock_db.keys.return_value = [ - "VLAN_MEMBER|Vlan1000|Ethernet1", - "VLAN_MEMBER|Vlan1000|Ethernet2", - "VLAN_MEMBER|Vlan2000|Ethernet3" - ] - result = show_dhcp_relay.get_vlan_members_from_config_db(mock_db, "Vlan1000") - assert result == { - "Vlan1000": set(["Ethernet1", "Ethernet2"]) - } - - -@pytest.mark.parametrize("get, expected_res", [ - (None, 0), - ("{'Unknown':'0','Discover':'1','Offer':'0'}", "1"), - ("{'Unknown':'0','Request':'1','Offer':'0'}", "0") -]) -def test_get_count_from_db(get, expected_res): - mock_db = MagicMock() - mock_db.get.return_value = get - res = show_dhcp_relay.get_count_from_db(mock_db, "", "", "Discover") - assert res == expected_res - - -@pytest.mark.parametrize("vlan, dirs_count", [ - ("Vlan1000", {"RX": "1", "TX": "5"}), - ("Vlan1000", {"RX": "3"}) -]) -def test_append_vlan_count_with_type_specified(vlan, dirs_count): - def mock_get_count_from_db(db, key, current_dir, current_type): - return dirs_count[current_dir] - - with patch.object(show_dhcp_relay, "get_count_from_db", side_effect=mock_get_count_from_db): - dummy_summary = "dummy" - data = { - dummy_summary: [], - "Intf Type": [] - } - for dir in dirs_count.keys(): - data[dir] = [] - expected_res = copy.deepcopy(data) - show_dhcp_relay.append_vlan_count_with_type_specified(data, MagicMock, list(dirs_count.keys()), vlan, "", - dummy_summary) - expected_res["Intf Type"].append("VLAN") - expected_res[dummy_summary].append(vlan) - for dir, count in dirs_count.items(): - expected_res[dir].append(count) - assert expected_res == data - - -@pytest.mark.parametrize("interface_name, vlan_interface, expected_result", [ - ("Ethernet1", "Vlan1000", "Downlink"), - ("Ethernet4", "Vlan1000", "Uplink"), - ("Ethernet5", "Vlan3000", "Unknown"), - ("eth0", "Vlan3000", "MGMT") -]) -def test_get_interfaces_type(interface_name, vlan_interface, expected_result): - vlan_members = { - "Vlan1000": set(["Ethernet1", "Ethernet2"]), - "Vlan2000": set(["Ethernet3"]) - } - mgmt_intfs = ["eth0"] - result = show_dhcp_relay.get_interfaces_type(interface_name, mgmt_intfs, vlan_interface, vlan_members) - assert result == expected_result - - -@pytest.mark.parametrize("interfaces, dirs_count, vlan_interface", [ - (["Ethernet1", "Ethernet2", "Ethernet3", "Ethernet4"], {"RX": "1", "TX": "5"}, "Vlan1000"), - (["eth0", "Ethernet3", "Ethernet4", "Ethernet5"], {"RX": "3 ", "TX": "5"}, "Vlan3000"), -]) -def test_append_interfaces_count_with_type_specified(interfaces, dirs_count, vlan_interface): - def mock_get_count_from_db(db, key, current_dir, current_type): - return dirs_count[current_dir] - - vlan_members = { - "Vlan1000": set(["Ethernet1", "Ethernet2"]), - "Vlan2000": set(["Ethernet3"]) - } - mgmt_intfs = ["eth0"] - with patch.object(show_dhcp_relay, "get_count_from_db", side_effect=mock_get_count_from_db): - dummy_summary = "dummy" - data = { - dummy_summary: [], - "Intf Type": [] - } - for dir in dirs_count.keys(): - data[dir] = [] - expected_data = copy.deepcopy(data) - mock_db = MagicMock() - mock_db.keys.return_value = ["DHCPV4_COUNTER_TABLE:" + vlan_interface + ":" + intf for intf in interfaces] - show_dhcp_relay.append_interfaces_count_with_type_specified(data, mock_db, list(dirs_count.keys()), - vlan_interface, "", dummy_summary, vlan_members, - mgmt_intfs) - expected_data[dummy_summary] = interfaces - for intf in interfaces: - if intf in mgmt_intfs: - expected_data["Intf Type"].append("MGMT") - elif vlan_interface not in vlan_members: - expected_data["Intf Type"].append("Unknown") - elif intf in vlan_members[vlan_interface]: - expected_data["Intf Type"].append("Downlink") - else: - expected_data["Intf Type"].append("Uplink") - for dir in dirs_count.keys(): - expected_data[dir].append(dirs_count[dir]) - assert expected_data == data - - -def test_generate_output_with_type_specified(): - expected_output = """\ -+------------------+-----------+----+----+ -| Vlan1000 (Offer) | Intf Type | RX | TX | -+------------------+-----------+----+----+ -| Vlan1000 | VLAN | 5 | 5 | -| Ethernet0 | Downlink | 10 | 10 | -| Ethernet1 | Uplink | 20 | 20 | -+------------------+-----------+----+----+ -""" - - def mock_append_vlan(data, db, dirs, vlan_interface, current_type, summary): - data[summary].append("Vlan1000") - data["Intf Type"].append("VLAN") - for dir in dirs: - data[dir].append("5") - - def mock_append_interfaces(data, db, dirs, vlan_interface, current_type, summary, vlan_members, mgmt_intfs): - data[summary].extend(["Ethernet0", "Ethernet1"]) - data["Intf Type"].extend(["Downlink", "Uplink"]) - for dir in dirs: - data[dir].extend(["10", "20"]) - - with patch.object(show_dhcp_relay, "append_vlan_count_with_type_specified", side_effect=mock_append_vlan), \ - patch.object(show_dhcp_relay, "append_interfaces_count_with_type_specified", - side_effect=mock_append_interfaces): - output = show_dhcp_relay.generate_output_with_type_specified(MagicMock(), [], ["Offer"], ["RX", "TX"], - "Vlan1000", []) - assert output == expected_output - - -@pytest.mark.parametrize("vlan, types_count", [ - ("Vlan1000", {"Discover": "1", "Offer": "5"}), - ("Vlan1000", {"Ack": "3"}) -]) -def test_append_vlan_count_without_type_specified(vlan, types_count): - def mock_get_count_from_db(db, key, current_dir, current_type): - return types_count[current_type] - - with patch.object(show_dhcp_relay, "get_count_from_db", side_effect=mock_get_count_from_db): - dummy_summary = "dummy" - data = { - dummy_summary: [], - "Intf Type": [] - } - for type in types_count.keys(): - data[type] = [] - expected_res = copy.deepcopy(data) - show_dhcp_relay.append_vlan_count_without_type_specified(data, MagicMock(), "", vlan, list(types_count.keys()), - dummy_summary) - expected_res["Intf Type"].append("VLAN") - expected_res[dummy_summary].append(vlan) - for type, count in types_count.items(): - expected_res[type].append(count) - assert expected_res == data - - -def test_natural_sort_key(): - assert show_dhcp_relay.natural_sort_key("Ethernet12") == ["ethernet", 12, ""] - - -@pytest.mark.parametrize("types_count", [{"Discover": "5", "Offer": "10"}, {"Request": "3", "Ack": "5"}]) -def test_append_interfaces_count_without_type_specified(types_count): - def mock_get_count_from_db(db, key, current_dir, current_type): - return types_count[current_type] - - mock_db = MagicMock() - interfaces = ["Ethernet0", "Ethernet1"] - mock_db.keys.return_value = ["DHCPV4_COUNTER_TABLE:Vlan1000:{}".format(intf) for intf in interfaces] - dummy_summary = "dummy" - data = { - dummy_summary: [], - "Intf Type": [] - } - for type in types_count.keys(): - data[type] = [] - with patch.object(show_dhcp_relay, "get_interfaces_type", return_value="Downlink"), \ - patch.object(show_dhcp_relay, "get_count_from_db", side_effect=mock_get_count_from_db): - expected_data = copy.deepcopy(data) - show_dhcp_relay.append_interfaces_count_without_type_specified(data, mock_db, "", "", list(types_count.keys()), - dummy_summary, {}, []) - expected_data[dummy_summary].extend(interfaces) - expected_data["Intf Type"].extend(["Downlink", "Downlink"]) - for type, count in types_count.items(): - expected_data[type].extend([count, count]) - assert expected_data == data - - -def test_generate_output_without_type_specified(): - expected_output = """\ -+---------------+-----------+----------+-------+ -| Vlan1000 (RX) | Intf Type | Discover | Offer | -+---------------+-----------+----------+-------+ -| Vlan1000 | VLAN | 10 | 10 | -| Ethernet0 | Downlink | 20 | 20 | -| Ethernet1 | Uplink | 30 | 30 | -+---------------+-----------+----------+-------+ -""" - - def mock_append_vlan(data, db, dir, vlan_interface, types, summary): - data[summary].append("Vlan1000") - data["Intf Type"].append("VLAN") - for type in types: - data[type].append("10") - - def mock_append_interfaces(data, db, dir, vlan_interface, types, summary, vlan_members, - mgmt_intfs): - data[summary].extend(["Ethernet0", "Ethernet1"]) - data["Intf Type"].extend(["Downlink", "Uplink"]) - for type in types: - data[type].extend(["20", "30"]) - with patch.object(show_dhcp_relay, "append_vlan_count_without_type_specified", side_effect=mock_append_vlan), \ - patch.object(show_dhcp_relay, "append_interfaces_count_without_type_specified", - side_effect=mock_append_interfaces): - output = show_dhcp_relay.generate_output_without_type_specified(MagicMock(), {}, ["Discover", "Offer"], "RX", - "Vlan1000", []) - assert expected_output == output - - -def test_get_mgmt_intfs(): - mock_db = MagicMock() - mock_db.keys.return_value = [ - "MGMT_PORT|eth0", - "MGMT_PORT|eth1" - ] - result = show_dhcp_relay.get_mgmt_intfs_from_config_db(mock_db) - assert result == ["eth0", "eth1"] - - -@pytest.mark.parametrize("vlan, expected_result", [ - ("", set(["Vlan1000", "Vlan2000", "Vlan100"])), - ("Vlan1000", set(["Vlan1000"])), - ("Vlan100", set(["Vlan100"])) -]) -def test_get_vlans_from_counters_db(vlan, expected_result): - mock_db = MagicMock() - mock_db.keys.return_value = [ - "DHCPV4_COUNTER_TABLE:Vlan1000", - "DHCPV4_COUNTER_TABLE:Vlan100", - "DHCPV4_COUNTER_TABLE:Vlan1000:Ethernet0", - "DHCPV4_COUNTER_TABLE:Vlan2000" - ] - result = show_dhcp_relay.get_vlans_from_counters_db(vlan, mock_db) - assert result == expected_result - - -def test_print_dhcpv4_relay_counter_data_with_type_specified(): - mock_vlans = ["Vlan1000", "Vlan2000"] - mock_vlan_members = {"Vlan1000": set(["Ethernet0"]), "Vlan2000": set(["Ethernet1"])} - mock_mgmt_intfs = ["eth0"] - types = ["Discover"] - dirs = ["RX", "TX"] - with patch.object(show_dhcp_relay, "get_vlans_from_counters_db", return_value=mock_vlans), \ - patch.object(show_dhcp_relay, "get_vlan_members_from_config_db", return_value=mock_vlan_members), \ - patch.object(show_dhcp_relay, "get_mgmt_intfs_from_config_db", return_value=mock_mgmt_intfs), \ - patch.object(show_dhcp_relay, "generate_output_with_type_specified", - return_value="") as mock_generate_with_type_specified, \ - patch.object(show_dhcp_relay, - "generate_output_without_type_specified", - return_value="") as mock_generate_withtout_type_specified: - show_dhcp_relay.print_dhcpv4_relay_counter_data("", dirs, types, MagicMock()) - - # Verify calls for generate_output_with_type_specified - expected_calls = [ - call(ANY, mock_vlan_members, types, dirs, vlan, mock_mgmt_intfs) - for vlan in mock_vlans - ] - mock_generate_with_type_specified.assert_has_calls(expected_calls) - - # Verify calls for generate_output_without_type_specified - mock_generate_withtout_type_specified.assert_not_called() - - -def test_print_dhcpv4_relay_counter_data_without_type_specified(): - mock_vlans = ["Vlan1000", "Vlan2000"] - mock_vlan_members = {"Vlan1000": set(["Ethernet0"]), "Vlan2000": set(["Ethernet1"])} - mock_mgmt_intfs = ["eth0"] - types = ["Discover", "Offer", "Request", "ack"] - dirs = ["RX", "TX"] - with patch.object(show_dhcp_relay, "get_vlans_from_counters_db", return_value=mock_vlans), \ - patch.object(show_dhcp_relay, "get_vlan_members_from_config_db", return_value=mock_vlan_members), \ - patch.object(show_dhcp_relay, "get_mgmt_intfs_from_config_db", return_value=mock_mgmt_intfs), \ - patch.object(show_dhcp_relay, "generate_output_with_type_specified", - return_value="") as mock_generate_with_type_specified, \ - patch.object(show_dhcp_relay, - "generate_output_without_type_specified", - return_value="") as mock_generate_withtout_type_specified: - show_dhcp_relay.print_dhcpv4_relay_counter_data("", dirs, types, MagicMock()) - - # Verify calls for generate_output_with_type_specified - mock_generate_with_type_specified.assert_not_called() - - # Verify calls for generate_output_without_type_specified - calls = [] - for vlan in mock_vlans: - for dir in dirs: - calls.append(call(ANY, mock_vlan_members, types, dir, vlan, mock_mgmt_intfs)) - mock_generate_withtout_type_specified.assert_has_calls(calls) - - -def test_dhcp_relay_ip4counters_vlan_invalid(): - runner = CliRunner() - with patch.object(show_dhcp_relay, "is_vlan_interface_valid", return_value=False) as mock_check, \ - patch.object(click, "echo") as mock_echo, \ - patch.object(show_dhcp_relay, "print_dhcpv4_relay_counter_data") as mock_print: - vlan = "Vlan1000" - result = runner.invoke(show_dhcp_relay.dhcp_relay.commands["ipv4"].commands["counters"], vlan) - assert result.exit_code == 0 - mock_check.assert_called_once_with(vlan, ANY) - mock_echo.assert_called_once_with("Vlan interface {} doesn't have any count data".format(vlan)) - mock_print.assert_not_called() - - -@pytest.mark.parametrize("dir, type, expected_dirs, expected_types", [ - (None, None, SUPPORTED_DIR, SUPPORTED_DHCPV4_TYPE), - (None, "Discover", SUPPORTED_DIR, ["Discover"]), - ("RX", None, ["RX"], SUPPORTED_DHCPV4_TYPE), - ("RX", "Offer", ["RX"], ["Offer"]) -]) -def test_dhcp_relay_ip4counters(dir, type, expected_dirs, expected_types): - runner = CliRunner() - with patch.object(show_dhcp_relay, "is_vlan_interface_valid", return_value=True), \ - patch.object(show_dhcp_relay, "print_dhcpv4_relay_counter_data") as mock_print: - args = [] - if dir: - args.append("--dir={}".format(dir)) - if type: - args.append("--type={}".format(type)) - result = runner.invoke(show_dhcp_relay.dhcp_relay.commands["ipv4"].commands["counters"], args) - assert result.exit_code == 0 - mock_print.assert_called_once_with("", expected_dirs, expected_types, ANY) - - -@pytest.mark.parametrize("args", ["--dir=fail", "--type=fail"]) -def test_dhcp_relay_ip4counters_incorrect_dir(args): - runner = CliRunner() - result = runner.invoke(show_dhcp_relay.dhcp_relay.commands["ipv4"].commands["counters"], args) - assert result.exit_code != 0 class TestDhcpRelayCounters(object): @@ -439,7 +80,7 @@ def test_show_ipv4_vlan_counters_dir(self): print(result.output) assert result.output == expected_counts_v4_rx - def test_show_vlan_counts_type(self): + def test_show_ipv4_vlan_counters_type(self): runner = CliRunner() result = runner.invoke(show_dhcp_relay.dhcp_relay_ipv4.commands["vlan-counters"], ["Vlan1000", "-t", "Discover"]) print(result.output) diff --git a/dockers/docker-dhcp-relay/cli-plugin-tests/test_show_dhcpmon_counters.py b/dockers/docker-dhcp-relay/cli-plugin-tests/test_show_dhcpmon_counters.py new file mode 100644 index 00000000000..e4d0f2513f1 --- /dev/null +++ b/dockers/docker-dhcp-relay/cli-plugin-tests/test_show_dhcpmon_counters.py @@ -0,0 +1,493 @@ +import click +import pytest +import sys +sys.path.append("../cli/show/plugins/") +import show_dhcp_relay + +from unittest.mock import patch, call, MagicMock, ANY +from click.testing import CliRunner + +# Constants matching show_dhcp_relay.py +DHCPMON_V4_PREFIX = "DHCPV4_COUNTER_TABLE" +DHCPMON_V6_PREFIX = "DHCPV6_COUNTER_TABLE" +DHCPMON_SUPPORTED_DIR = ["TX", "RX"] +DHCPMON_V4_DISPLAY_TYPES = [ + "Unknown", "Discover", "Offer", "Request", "Decline", + "Ack", "Nak", "Release", "Inform", "Bootp" +] +DHCPMON_V6_DISPLAY_TYPES = [ + "Unknown", "Solicit", "Advertise", "Request", "Confirm", + "Renew", "Rebind", "Reply", "Release", "Decline", + "Reconfigure", "Information-Request", + "Relay-Forward", "Relay-Reply" +] + + +# ====================================================================== +# Shared dhcpmon helper function tests +# These are prefix-independent — logic is the same for v4 and v6. +# ====================================================================== + +def test_plugin_registration(): + cli = MagicMock() + show_dhcp_relay.register(cli) + + +def test_get_vlan_members_from_config_db(): + mock_db = MagicMock() + mock_db.keys.return_value = [ + "VLAN_MEMBER|Vlan1000|Ethernet1", + "VLAN_MEMBER|Vlan1000|Ethernet2", + "VLAN_MEMBER|Vlan2000|Ethernet3" + ] + result = show_dhcp_relay.get_vlan_members_from_config_db( + mock_db, "Vlan1000" + ) + assert result == { + "Vlan1000": set(["Ethernet1", "Ethernet2"]) + } + + +@pytest.mark.parametrize("get, lookup, expected_res", [ + (None, "TypeA", 0), + ("{'TypeA':'0','TypeB':'1','TypeC':'0'}", "TypeB", 1), + ("{'TypeA':'0','TypeB':'1','TypeC':'0'}", "TypeD", 0) +]) +def test_get_count_from_db(get, lookup, expected_res): + mock_db = MagicMock() + mock_db.get.return_value = get + res = show_dhcp_relay.get_count_from_db( + mock_db, "", "", lookup + ) + assert res == expected_res + + +@pytest.mark.parametrize( + "interface_name, vlan_interface, expected_result", + [ + ("Ethernet1", "Vlan1000", "Downlink"), + ("Ethernet4", "Vlan1000", "Uplink"), + ("Ethernet5", "Vlan3000", "Unknown"), + ("eth0", "Vlan3000", "MGMT") + ] +) +def test_get_interfaces_type( + interface_name, vlan_interface, expected_result +): + vlan_members = { + "Vlan1000": set(["Ethernet1", "Ethernet2"]), + "Vlan2000": set(["Ethernet3"]) + } + mgmt_intfs = ["eth0"] + result = show_dhcp_relay.get_interfaces_type( + interface_name, mgmt_intfs, + vlan_interface, vlan_members + ) + assert result == expected_result + + +def test_natural_sort_key(): + assert show_dhcp_relay.natural_sort_key("Ethernet12") == [ + "ethernet", 12, "" + ] + + +def test_get_mgmt_intfs(): + mock_db = MagicMock() + mock_db.keys.return_value = [ + "MGMT_PORT|eth0", + "MGMT_PORT|eth1" + ] + result = show_dhcp_relay.get_mgmt_intfs_from_config_db( + mock_db + ) + assert result == ["eth0", "eth1"] + + +# ====================================================================== +# Prefix-parameterized tests +# These test the shared dhcpmon functions with both v4 and v6 +# prefixes. Fake type names ("TypeA", "TypeB") are used +# intentionally — we are testing function mechanics, not +# protocol-specific behavior. +# ====================================================================== + +@pytest.mark.parametrize("prefix", [ + DHCPMON_V4_PREFIX, DHCPMON_V6_PREFIX +]) +@pytest.mark.parametrize("valid", [True, False]) +@pytest.mark.parametrize("vlan_interface", ["Vlan1000", ""]) +def test_is_dhcpmon_vlan_valid(valid, vlan_interface, prefix): + mock_db = MagicMock() + mock_db.exists.return_value = valid + result = show_dhcp_relay.is_dhcpmon_vlan_valid( + vlan_interface, mock_db, prefix + ) + if vlan_interface: + assert result == valid + else: + assert result + + +@pytest.mark.parametrize("prefix", [ + DHCPMON_V4_PREFIX, DHCPMON_V6_PREFIX +]) +@pytest.mark.parametrize("vlan, expected_result", [ + ("", set(["Vlan1000", "Vlan2000", "Vlan100"])), + ("Vlan1000", set(["Vlan1000"])), + ("Vlan100", set(["Vlan100"])) +]) +def test_get_dhcpmon_vlans(vlan, expected_result, prefix): + mock_db = MagicMock() + mock_db.keys.return_value = [ + prefix + ":Vlan1000", + prefix + ":Vlan100", + prefix + ":Vlan1000:Ethernet0", + prefix + ":Vlan2000" + ] + result = show_dhcp_relay.get_dhcpmon_vlans( + vlan, mock_db, prefix + ) + assert result == expected_result + + +@pytest.mark.parametrize("prefix", [ + DHCPMON_V4_PREFIX, DHCPMON_V6_PREFIX +]) +def test_generate_dhcpmon_output_with_type(prefix): + expected_output = """\ ++------------------+-----------+----+----+ +| Vlan1000 (TypeA) | Intf Type | RX | TX | ++------------------+-----------+----+----+ +| Vlan1000 | VLAN | 5 | 5 | +| Ethernet0 | Downlink | 10 | 10 | +| Ethernet1 | Uplink | 20 | 20 | ++------------------+-----------+----+----+ +""" + vlan_members = { + "Vlan1000": set(["Ethernet0"]) + } + mgmt_intfs = [] + + def mock_get_count(db, key, current_dir, current_type): + if key == prefix + ":Vlan1000": + return 5 + elif key == prefix + ":Vlan1000:Ethernet0": + return 10 + elif key == prefix + ":Vlan1000:Ethernet1": + return 20 + return 0 + + mock_db = MagicMock() + mock_db.keys.return_value = [ + prefix + ":Vlan1000:Ethernet0", + prefix + ":Vlan1000:Ethernet1" + ] + with patch.object( + show_dhcp_relay, "get_count_from_db", + side_effect=mock_get_count + ), patch.object( + show_dhcp_relay, "get_interfaces_type", + side_effect=["Downlink", "Uplink"] + ): + output = show_dhcp_relay.generate_dhcpmon_output_with_type( + mock_db, vlan_members, + ["TypeA"], ["RX", "TX"], + "Vlan1000", mgmt_intfs, prefix + ) + assert output == expected_output + + +@pytest.mark.parametrize("prefix", [ + DHCPMON_V4_PREFIX, DHCPMON_V6_PREFIX +]) +def test_generate_dhcpmon_output_without_type(prefix): + expected_output = """\ ++---------------+-----------+-------+-------+ +| Vlan1000 (RX) | Intf Type | TypeA | TypeB | ++---------------+-----------+-------+-------+ +| Vlan1000 | VLAN | 10 | 10 | +| Ethernet0 | Downlink | 20 | 20 | +| Ethernet1 | Uplink | 30 | 30 | ++---------------+-----------+-------+-------+ +""" + vlan_members = { + "Vlan1000": set(["Ethernet0"]) + } + mgmt_intfs = [] + + def mock_get_count(db, key, current_dir, current_type): + if key == prefix + ":Vlan1000": + return 10 + elif key == prefix + ":Vlan1000:Ethernet0": + return 20 + elif key == prefix + ":Vlan1000:Ethernet1": + return 30 + return 0 + + mock_db = MagicMock() + mock_db.keys.return_value = [ + prefix + ":Vlan1000:Ethernet0", + prefix + ":Vlan1000:Ethernet1" + ] + with patch.object( + show_dhcp_relay, "get_count_from_db", + side_effect=mock_get_count + ), patch.object( + show_dhcp_relay, "get_interfaces_type", + side_effect=["Downlink", "Uplink"] + ): + output = show_dhcp_relay.generate_dhcpmon_output_without_type( + mock_db, vlan_members, + ["TypeA", "TypeB"], "RX", + "Vlan1000", mgmt_intfs, prefix + ) + assert expected_output == output + + +@pytest.mark.parametrize("prefix", [ + DHCPMON_V4_PREFIX, DHCPMON_V6_PREFIX +]) +def test_print_dhcpmon_counter_data_with_type(prefix): + mock_vlans = ["Vlan1000", "Vlan2000"] + mock_vlan_members = { + "Vlan1000": set(["Ethernet0"]), + "Vlan2000": set(["Ethernet1"]) + } + mock_mgmt_intfs = ["eth0"] + types = ["TypeA"] + dirs = ["RX", "TX"] + with patch.object( + show_dhcp_relay, "get_dhcpmon_vlans", + return_value=mock_vlans + ), patch.object( + show_dhcp_relay, "get_vlan_members_from_config_db", + return_value=mock_vlan_members + ), patch.object( + show_dhcp_relay, "get_mgmt_intfs_from_config_db", + return_value=mock_mgmt_intfs + ), patch.object( + show_dhcp_relay, + "generate_dhcpmon_output_with_type", + return_value="" + ) as mock_gen_with_type, patch.object( + show_dhcp_relay, + "generate_dhcpmon_output_without_type", + return_value="" + ) as mock_gen_without_type: + show_dhcp_relay.print_dhcpmon_counter_data( + "", dirs, types, MagicMock(), prefix + ) + + expected_calls = [ + call( + ANY, mock_vlan_members, types, dirs, + vlan, mock_mgmt_intfs, prefix + ) + for vlan in mock_vlans + ] + mock_gen_with_type.assert_has_calls(expected_calls) + mock_gen_without_type.assert_not_called() + + +@pytest.mark.parametrize("prefix", [ + DHCPMON_V4_PREFIX, DHCPMON_V6_PREFIX +]) +def test_print_dhcpmon_counter_data_without_type(prefix): + mock_vlans = ["Vlan1000", "Vlan2000"] + mock_vlan_members = { + "Vlan1000": set(["Ethernet0"]), + "Vlan2000": set(["Ethernet1"]) + } + mock_mgmt_intfs = ["eth0"] + types = ["TypeA", "TypeB", "TypeC", "TypeD"] + dirs = ["RX", "TX"] + with patch.object( + show_dhcp_relay, "get_dhcpmon_vlans", + return_value=mock_vlans + ), patch.object( + show_dhcp_relay, "get_vlan_members_from_config_db", + return_value=mock_vlan_members + ), patch.object( + show_dhcp_relay, "get_mgmt_intfs_from_config_db", + return_value=mock_mgmt_intfs + ), patch.object( + show_dhcp_relay, + "generate_dhcpmon_output_with_type", + return_value="" + ) as mock_gen_with_type, patch.object( + show_dhcp_relay, + "generate_dhcpmon_output_without_type", + return_value="" + ) as mock_gen_without_type: + show_dhcp_relay.print_dhcpmon_counter_data( + "", dirs, types, MagicMock(), prefix + ) + + mock_gen_with_type.assert_not_called() + + calls = [] + for vlan in mock_vlans: + for dir in dirs: + calls.append( + call( + ANY, mock_vlan_members, types, dir, + vlan, mock_mgmt_intfs, prefix + ) + ) + mock_gen_without_type.assert_has_calls(calls) + + +# ====================================================================== +# Command wiring tests — show dhcp_relay ipv4/ipv6 counters +# These test the actual click commands with real v4/v6 types. +# ====================================================================== + +def test_show_dhcpmon_v4_counters_vlan_invalid(): + runner = CliRunner() + with patch.object( + show_dhcp_relay, "is_dhcpmon_vlan_valid", + return_value=False + ) as mock_check, patch.object( + click, "echo" + ) as mock_echo, patch.object( + show_dhcp_relay, "print_dhcpmon_counter_data" + ) as mock_print: + vlan = "Vlan1000" + result = runner.invoke( + show_dhcp_relay.dhcp_relay.commands["ipv4"] + .commands["counters"], + vlan + ) + assert result.exit_code == 0 + mock_check.assert_called_once_with(vlan, ANY, ANY) + mock_echo.assert_called_once_with( + "Vlan interface {} doesn't have any count data" + .format(vlan) + ) + mock_print.assert_not_called() + + +@pytest.mark.parametrize( + "dir, type, expected_dirs, expected_types", + [ + (None, None, DHCPMON_SUPPORTED_DIR, + DHCPMON_V4_DISPLAY_TYPES), + (None, "Discover", DHCPMON_SUPPORTED_DIR, + ["Discover"]), + ("RX", None, ["RX"], DHCPMON_V4_DISPLAY_TYPES), + ("RX", "Offer", ["RX"], ["Offer"]) + ] +) +def test_show_dhcpmon_v4_counters( + dir, type, expected_dirs, expected_types +): + runner = CliRunner() + with patch.object( + show_dhcp_relay, "is_dhcpmon_vlan_valid", + return_value=True + ), patch.object( + show_dhcp_relay, "print_dhcpmon_counter_data" + ) as mock_print: + args = [] + if dir: + args.append("--dir={}".format(dir)) + if type: + args.append("--type={}".format(type)) + result = runner.invoke( + show_dhcp_relay.dhcp_relay.commands["ipv4"] + .commands["counters"], + args + ) + assert result.exit_code == 0 + mock_print.assert_called_once_with( + "", expected_dirs, expected_types, ANY, ANY + ) + + +@pytest.mark.parametrize( + "args", ["--dir=fail", "--type=fail"] +) +def test_show_dhcpmon_v4_counters_incorrect_args(args): + runner = CliRunner() + result = runner.invoke( + show_dhcp_relay.dhcp_relay.commands["ipv4"] + .commands["counters"], + args + ) + assert result.exit_code != 0 + + +def test_show_dhcpmon_v6_counters_vlan_invalid(): + runner = CliRunner() + with patch.object( + show_dhcp_relay, "is_dhcpmon_vlan_valid", + return_value=False + ) as mock_check, patch.object( + click, "echo" + ) as mock_echo, patch.object( + show_dhcp_relay, "print_dhcpmon_counter_data" + ) as mock_print: + vlan = "Vlan1000" + result = runner.invoke( + show_dhcp_relay.dhcp_relay.commands["ipv6"] + .commands["counters"], + vlan + ) + assert result.exit_code == 0 + mock_check.assert_called_once_with(vlan, ANY, ANY) + mock_echo.assert_called_once_with( + "Vlan interface {} doesn't have any count data" + .format(vlan) + ) + mock_print.assert_not_called() + + +@pytest.mark.parametrize( + "dir, type, expected_dirs, expected_types", + [ + (None, None, DHCPMON_SUPPORTED_DIR, + DHCPMON_V6_DISPLAY_TYPES), + (None, "Solicit", DHCPMON_SUPPORTED_DIR, + ["Solicit"]), + ("RX", None, ["RX"], DHCPMON_V6_DISPLAY_TYPES), + ("TX", "Reply", ["TX"], ["Reply"]) + ] +) +def test_show_dhcpmon_v6_counters( + dir, type, expected_dirs, expected_types +): + runner = CliRunner() + with patch.object( + show_dhcp_relay, "is_dhcpmon_vlan_valid", + return_value=True + ), patch.object( + show_dhcp_relay, "print_dhcpmon_counter_data" + ) as mock_print: + args = [] + if dir: + args.append("--dir={}".format(dir)) + if type: + args.append("--type={}".format(type)) + result = runner.invoke( + show_dhcp_relay.dhcp_relay.commands["ipv6"] + .commands["counters"], + args + ) + assert result.exit_code == 0 + mock_print.assert_called_once_with( + "", expected_dirs, expected_types, ANY, ANY + ) + + +@pytest.mark.parametrize( + "args", ["--dir=fail", "--type=fail"] +) +def test_show_dhcpmon_v6_counters_incorrect_args(args): + runner = CliRunner() + result = runner.invoke( + show_dhcp_relay.dhcp_relay.commands["ipv6"] + .commands["counters"], + args + ) + assert result.exit_code != 0 diff --git a/dockers/docker-dhcp-relay/cli/clear/plugins/clear_dhcp_relay.py b/dockers/docker-dhcp-relay/cli/clear/plugins/clear_dhcp_relay.py index e41385d6aca..c966c89afbb 100644 --- a/dockers/docker-dhcp-relay/cli/clear/plugins/clear_dhcp_relay.py +++ b/dockers/docker-dhcp-relay/cli/clear/plugins/clear_dhcp_relay.py @@ -12,19 +12,46 @@ import utilities_common.cli as clicommon -DHCPV4_CLEAR_COUNTER_LOCK_FILE = "/tmp/clear_dhcpv4_counter.lock" -SUPPORTED_DHCP_TYPE = [ - "Unknown", "Discover", "Offer", "Request", "Decline", "Ack", "Nak", "Release", "Inform", "Bootp" -] +# ============================================================ +# Constants +# ============================================================ + SUPPORTED_DIR = ["TX", "RX"] -DHCPV4_COUNTER_TABLE_PREFIX = "DHCPV4_COUNTER_TABLE" COUNTERS_DB_SEPRATOR = ":" -DHCPV4_COUNTER_UPDATE_STATE_TABLE = "DHCPV4_COUNTER_UPDATE" STATE_DB_SEPRATOR = "|" WAITING_DB_WRITING_RETRY_TIMES = 2 +# DHCPv4 dhcpmon counter constants (COUNTERS_DB) +# shared lock for both v4 and v6 — dhcpmon is a single process handling both, +# SIGUSR1/SIGUSR2 pauses all writes globally, so clears must not overlap +DHCPMON_CLEAR_COUNTER_LOCK_FILE = "/tmp/clear_dhcpmon_counter.lock" +DHCPV4_COUNTER_TABLE_PREFIX = "DHCPV4_COUNTER_TABLE" +DHCPV4_COUNTER_UPDATE_STATE_TABLE = "DHCPV4_COUNTER_UPDATE" +SUPPORTED_DHCP_TYPE = [ + "Unknown", "Discover", "Offer", "Request", "Decline", "Ack", "Nak", + "Release", "Inform", "Bootp", "Malformed", "Ignored" +] + +# DHCPv6 dhcpmon counter constants (COUNTERS_DB) + +DHCPV6_COUNTER_TABLE_PREFIX = "DHCPV6_COUNTER_TABLE" +DHCPV6_COUNTER_UPDATE_STATE_TABLE = "DHCPV6_COUNTER_UPDATE" +SUPPORTED_DHCPV6_TYPE = [ + "Unknown", "Solicit", "Advertise", "Request", "Confirm", + "Renew", "Rebind", "Reply", "Release", "Decline", + "Reconfigure", "Information-Request", + "Relay-Forward", "Relay-Reply", "Malformed", "Ignored" +] + + +# ============================================================ +# Helper functions for dhcp6relay / dhcp4relay (STATE_DB) +# These clear the relay process counters in STATE_DB, +# NOT the dhcpmon counters in COUNTERS_DB. +# ============================================================ def clear_dhcp_relay_ipv6_counter(interface): + """Clear dhcp6relay STATE_DB counters.""" counter = dhcprelay.DHCPv6_Counter() counter_intf = counter.get_interface() if interface: @@ -33,45 +60,34 @@ def clear_dhcp_relay_ipv6_counter(interface): for intf in counter_intf: counter.clear_table(intf) + def clear_dhcp_relay_ipv4_vlan_counter(direction, pkt_type, interface): + """Clear dhcp4relay STATE_DB per-vlan counters.""" counter = dhcprelay.DHCPv4_Counter() counter.clear_table(direction, pkt_type, interface) + +# ============================================================ +# Helper functions for dhcpmon counters (COUNTERS_DB) +# Shared by both DHCPv4 and DHCPv6 clear workflows. +# +# The dhcpmon clear workflow: +# 1. CLI sends SIGUSR1 to dhcpmon -> dhcpmon pauses DB writes +# 2. CLI zeroes counter entries in COUNTERS_DB +# 3. CLI sends SIGUSR2 to dhcpmon -> dhcpmon reads DB back +# into cache (picking up the zeroed values), then resumes +# ============================================================ + def is_vlan_interface_valid(vlan_interface, db): - # If not vlan interface specified, treat it as valid if vlan_interface == "": return True - # If vlan interface is not in config_db VLAN table, treat it as invalid if not db.exists(db.CONFIG_DB, "VLAN|{}".format(vlan_interface)): return False return True -def clear_dhcpv4_db_counters(db, direction, type, paused_vlans): - types = SUPPORTED_DHCP_TYPE if type is None else [type] - directions = SUPPORTED_DIR if direction is None else [direction] - for vlan in paused_vlans: - counters_key = DHCPV4_COUNTER_TABLE_PREFIX + COUNTERS_DB_SEPRATOR + vlan + "*" - for key in db.keys(db.COUNTERS_DB, counters_key): - # Make sure we clear the correct interface - # Sample: If we want to clear Vlan100, but there is a Vlan1000 exists too, we need to exclude Vlan1000 - if not (":{}:".format(vlan) in key or key.endswith(vlan)): - continue - for dir in directions: - count_str = db.get(db.COUNTERS_DB, key, dir) - if count_str is None: - # Would add new entry if corresponding dir doesn't exist in COUNTERS_DB - count_str = "{}" - count_str = count_str.replace("\'", "\"") - count_obj = json.loads(count_str) - for current_type in types: - # Would set count for types to 0 no matter whether this type exists in COUNTERS_DB - count_obj[current_type] = "0" - count_str = json.dumps(count_obj).replace("\"", "\'") - db.set(db.COUNTERS_DB, key, dir, count_str) - - def notify_dhcpmon_processes(vlan_interface, sig): + """Send a signal to all dhcpmon processes (or a specific vlan).""" notified_vlans = set() try: signal.Signals(sig) @@ -83,14 +99,21 @@ def notify_dhcpmon_processes(vlan_interface, sig): try: if proc.name() != "dhcpmon": continue - match = re.search(r'-id\s+(Vlan\d+)', " ".join(proc.cmdline())) + match = re.search( + r'-id\s+(Vlan\d+)', " ".join(proc.cmdline()) + ) if not match: continue if vlan_interface != "" and vlan_interface != match.group(1): continue pid = proc.pid os.kill(int(pid), sig) - syslog.syslog(syslog.LOG_INFO, "Clear DHCPv4 counter: Sent signal {} to pid {}".format(sig, pid)) + syslog.syslog( + syslog.LOG_INFO, + "Clear DHCP counter: Sent signal {} to pid {}".format( + sig, pid + ) + ) notified_vlans.add(match.group(1)) except (psutil.NoSuchProcess, psutil.ZombieProcess): pass @@ -99,10 +122,15 @@ def notify_dhcpmon_processes(vlan_interface, sig): def is_write_db_paused(db, table_name, vlan_interface): - return db.get(db.STATE_DB, table_name + STATE_DB_SEPRATOR + vlan_interface, "pause_write_to_db") == "done" + return db.get( + db.STATE_DB, + table_name + STATE_DB_SEPRATOR + vlan_interface, + "pause_write_to_db" + ) == "done" def get_paused_vlans(db, table_name, vlans): + """Wait for dhcpmon to confirm it has paused DB writes.""" paused_vlan = set() for _ in range(WAITING_DB_WRITING_RETRY_TIMES + 1): for vlan in vlans: @@ -112,24 +140,64 @@ def get_paused_vlans(db, table_name, vlans): break time.sleep(1) else: - click.echo("Skip clearing counter for {} due to writing COUNTERS_DB hasn't been stopped." - .format(vlans - paused_vlan)) + click.echo( + "Skip clearing counter for {} due to writing " + "COUNTERS_DB hasn't been stopped.".format( + vlans - paused_vlan + ) + ) return paused_vlan -def clear_writing_state_db_flag(db): - for key in db.keys(db.STATE_DB, DHCPV4_COUNTER_UPDATE_STATE_TABLE + STATE_DB_SEPRATOR + "*"): +def clear_dhcpmon_db_counters( + db, direction, type, paused_vlans, + counter_table_prefix, supported_types +): + """Zero out dhcpmon counters in COUNTERS_DB.""" + types = supported_types if type is None else [type] + directions = SUPPORTED_DIR if direction is None else [direction] + for vlan in paused_vlans: + counters_key = ( + counter_table_prefix + + COUNTERS_DB_SEPRATOR + vlan + "*" + ) + for key in (db.keys(db.COUNTERS_DB, counters_key) or []): + if not (":{}:".format(vlan) in key + or key.endswith(vlan)): + continue + for dir in directions: + count_str = db.get(db.COUNTERS_DB, key, dir) + if count_str is None: + count_str = "{}" + count_str = count_str.replace("\'", '"') + count_obj = json.loads(count_str) + for current_type in types: + count_obj[current_type] = "0" + count_str = json.dumps(count_obj).replace('"', "\'") + db.set(db.COUNTERS_DB, key, dir, count_str) + + +def clear_state_db_flags(db, state_table): + """Clear counter update flags in STATE_DB.""" + for key in (db.keys( + db.STATE_DB, + state_table + STATE_DB_SEPRATOR + "*" + ) or []): db.delete(db.STATE_DB, key) -def get_failed_vlans(db, vlans): +def get_failed_vlans_for_table(db, state_table, vlans): + """Check which vlans failed to sync cache counters.""" failed_vlans = {vlan: set(["RX", "TX"]) for vlan in vlans} for _ in range(WAITING_DB_WRITING_RETRY_TIMES + 1): for vlan in vlans: - if db.get(db.STATE_DB, DHCPV4_COUNTER_UPDATE_STATE_TABLE + STATE_DB_SEPRATOR + vlan, + if vlan not in failed_vlans: + continue + prefix = state_table + STATE_DB_SEPRATOR + vlan + if db.get(db.STATE_DB, prefix, "rx_cache_update") == "done": failed_vlans[vlan].discard("RX") - if db.get(db.STATE_DB, DHCPV4_COUNTER_UPDATE_STATE_TABLE + STATE_DB_SEPRATOR + vlan, + if db.get(db.STATE_DB, prefix, "tx_cache_update") == "done": failed_vlans[vlan].discard("TX") if not failed_vlans[vlan]: @@ -140,7 +208,87 @@ def get_failed_vlans(db, vlans): return failed_vlans +def clear_dhcpmon_counters( + db, interface, dir, type, + lock_file_path, state_table, counter_table_prefix, + supported_types, version_label +): + """ + Clear dhcpmon counters in COUNTERS_DB. Shared by v4 and v6. + + Workflow: + 1. Acquire file lock (prevent concurrent clears) + 2. Clear stale STATE_DB flags + 3. SIGUSR1 -> dhcpmon pauses DB writes + 4. Wait for dhcpmon to confirm pause + 5. Zero out counter entries in COUNTERS_DB + 6. SIGUSR2 -> dhcpmon syncs DB back to cache + 7. Verify dhcpmon completed the sync + """ + ctx = click.get_current_context() + if os.geteuid() != 0: + ctx.fail( + "Clearing {} counters requires sudo privileges" + .format(version_label) + ) + return + if not is_vlan_interface_valid(interface, db.db): + ctx.fail("{} doesn't exist".format(interface)) + return + with open(lock_file_path, "w") as lock_file: + locked = False + try: + fcntl.flock(lock_file, fcntl.LOCK_EX | fcntl.LOCK_NB) + locked = True + clear_state_db_flags(db.db, state_table) + notified_vlans = notify_dhcpmon_processes( + interface, signal.SIGUSR1 + ) + paused_vlans = get_paused_vlans( + db.db, state_table, notified_vlans + ) + clear_dhcpmon_db_counters( + db.db, dir, type, paused_vlans, + counter_table_prefix, supported_types + ) + notify_dhcpmon_processes(interface, signal.SIGUSR2) + failed_vlans = get_failed_vlans_for_table( + db.db, state_table, paused_vlans + ) + if failed_vlans: + failed_msg = ", ".join( + ["{}({})".format(vlan, ",".join(dirs)) + for vlan, dirs in failed_vlans.items()] + ) + ctx.fail( + "Failed to clear counter for {}".format( + failed_msg + ) + ) + return + click.echo( + "Clear {} relay counter done".format(version_label) + ) + except BlockingIOError: + ctx.fail( + "Cannot lock {}; another user is already clearing " + "{} relay counters simultaneously".format( + lock_file_path, version_label + ) + ) + finally: + if locked: + clear_state_db_flags(db.db, state_table) + fcntl.flock(lock_file, fcntl.LOCK_UN) + + +# ============================================================ +# Standalone commands +# These are older entry points kept for backward compatibility. +# ============================================================ + # sonic-clear dhcp6relay_counters +# Clears dhcp6relay STATE_DB counters (NOT dhcpmon COUNTERS_DB) @click.group(cls=clicommon.AliasedGroup) def dhcp6relay_clear(): pass @@ -153,34 +301,75 @@ def dhcp6relay_clear_counters(interface): clear_dhcp_relay_ipv6_counter(interface) +# sonic-clear dhcp4relay-vlan-counters +# Clears dhcp4relay STATE_DB per-vlan counters (NOT dhcpmon) +@click.group(cls=clicommon.AliasedGroup) +def dhcp4relay_clear(): + pass + + +@dhcp4relay_clear.command('dhcp4relay-vlan-counters') +@click.option( + '-d', '--direction', required=False, + type=click.Choice(['TX', 'RX']), + help="Specify TX(egress) or RX(ingress)" +) +@click.option( + '-t', '--type', required=False, + type=click.Choice(dhcprelay.dhcpv4_messages), + help="Specify DHCP packet counter type" +) +@click.argument("vlan_interface", required=False) +def dhcp4relay_clear_vlan_counters(direction, type, vlan_interface): + """ Clear dhcp_relay ipv4 message counts """ + clear_dhcp_relay_ipv4_vlan_counter(direction, type, vlan_interface) + + +# ============================================================ +# Unified sonic-clear dhcp_relay commands +# ============================================================ + @click.group(cls=clicommon.AliasedGroup, name="dhcp_relay") def dhcp_relay(): pass +# ------------------------------------------------------------ +# sonic-clear dhcp_relay ipv6 counters +# Clears dhcpmon DHCPv6 counters in COUNTERS_DB +# ------------------------------------------------------------ + @dhcp_relay.group(cls=clicommon.AliasedGroup, name="ipv6") def dhcp_relay_ipv6(): pass @dhcp_relay_ipv6.command('counters') -@click.option('-i', '--interface', required=False) -def clear_dhcp_relay_ipv6_counters(interface): - """ Clear dhcp_relay ipv6 message counts """ - clear_dhcp_relay_ipv6_counter(interface) - -# sonic-clear dhcp6relay_counters -@click.group(cls=clicommon.AliasedGroup) -def dhcp4relay_clear(): - pass - -@dhcp4relay_clear.command('dhcp4relay-vlan-counters') -@click.option('-d', '--direction', required=False, type=click.Choice(['TX', 'RX']), help="Specify TX(egress) or RX(ingress)") -@click.option('-t', '--type', required=False, type=click.Choice(dhcprelay.dhcpv4_messages), help="Specify DHCP packet counter type") -@click.argument("vlan_interface", required=False) -def dhcp4relay_clear_vlan_counters(direction, type, vlan_interface): - """ Clear dhcp_relay ipv4 message counts """ - clear_dhcp_relay_ipv4_vlan_counter(direction, type, vlan_interface) +@click.option('-i', '--interface', required=False, default="") +@click.option( + '--dir', type=click.Choice(SUPPORTED_DIR), required=False +) +@click.option( + '--type', type=click.Choice(SUPPORTED_DHCPV6_TYPE), + required=False +) +@clicommon.pass_db +def clear_dhcp_relay_ipv6_counters(db, interface, dir, type): + """ Clear dhcpmon ipv6 counters (COUNTERS_DB) """ + clear_dhcpmon_counters( + db, interface, dir, type, + lock_file_path=DHCPMON_CLEAR_COUNTER_LOCK_FILE, + state_table=DHCPV6_COUNTER_UPDATE_STATE_TABLE, + counter_table_prefix=DHCPV6_COUNTER_TABLE_PREFIX, + supported_types=SUPPORTED_DHCPV6_TYPE, + version_label="DHCPv6" + ) + + +# ------------------------------------------------------------ +# sonic-clear dhcp_relay ipv4 counters +# Clears dhcpmon DHCPv4 counters in COUNTERS_DB +# ------------------------------------------------------------ @dhcp_relay.group(cls=clicommon.AliasedGroup, name="ipv4") def dhcp_relay_ipv4(): @@ -189,40 +378,29 @@ def dhcp_relay_ipv4(): @dhcp_relay_ipv4.command('counters') @click.option('-i', '--interface', required=False, default="") -@click.option('--dir', type=click.Choice(SUPPORTED_DIR), required=False) -@click.option('--type', type=click.Choice(SUPPORTED_DHCP_TYPE), required=False) +@click.option( + '--dir', type=click.Choice(SUPPORTED_DIR), required=False +) +@click.option( + '--type', type=click.Choice(SUPPORTED_DHCP_TYPE), + required=False +) @clicommon.pass_db def clear_dhcp_relay_ipv4_counters(db, interface, dir, type): - """ Clear dhcp_relay ipv4 counts """ - ctx = click.get_current_context() - if os.geteuid() != 0: - ctx.fail("Clear DHCPv4 counter need to be run with sudo permission") - return - if not is_vlan_interface_valid(interface, db.db): - ctx.fail("{} doesn't exist".format(interface)) - return - with open(DHCPV4_CLEAR_COUNTER_LOCK_FILE, "w") as lock_file: - try: - fcntl.flock(lock_file, fcntl.LOCK_EX | fcntl.LOCK_NB) - clear_writing_state_db_flag(db.db) - notified_vlans = notify_dhcpmon_processes(interface, signal.SIGUSR1) - # Fetch the vlans that has been stopped to writing COUNTERS_DB - paused_vlans = get_paused_vlans(db.db, DHCPV4_COUNTER_UPDATE_STATE_TABLE, notified_vlans) - clear_dhcpv4_db_counters(db.db, dir, type, paused_vlans) - notify_dhcpmon_processes(interface, signal.SIGUSR2) - failed_vlans = get_failed_vlans(db.db, paused_vlans) - if failed_vlans: - failed_msg = ", ".join(["{}({})".format(vlan, ",".join(dirs)) for vlan, dirs in failed_vlans.items()]) - ctx.fail("Failed to clear counter for {}".format(failed_msg)) - return - click.echo("Clear DHCPv4 relay counter done") - except BlockingIOError: - ctx.fail("Cannot lock {}, seems another user is clearing DHCPv4 relay counter simultaneous" - .format(DHCPV4_CLEAR_COUNTER_LOCK_FILE)) - finally: - clear_writing_state_db_flag(db.db) - fcntl.flock(lock_file, fcntl.LOCK_UN) - + """ Clear dhcpmon ipv4 counters (COUNTERS_DB) """ + clear_dhcpmon_counters( + db, interface, dir, type, + lock_file_path=DHCPMON_CLEAR_COUNTER_LOCK_FILE, + state_table=DHCPV4_COUNTER_UPDATE_STATE_TABLE, + counter_table_prefix=DHCPV4_COUNTER_TABLE_PREFIX, + supported_types=SUPPORTED_DHCP_TYPE, + version_label="DHCPv4" + ) + + +# ============================================================ +# Plugin registration +# ============================================================ def register(cli): cli.add_command(dhcp6relay_clear_counters) diff --git a/dockers/docker-dhcp-relay/cli/config/plugins/dhcp_relay.py b/dockers/docker-dhcp-relay/cli/config/plugins/dhcp_relay.py index 0c9cdd5f93a..ef889beb589 100644 --- a/dockers/docker-dhcp-relay/cli/config/plugins/dhcp_relay.py +++ b/dockers/docker-dhcp-relay/cli/config/plugins/dhcp_relay.py @@ -223,7 +223,7 @@ def validate_source_interface(vlan_name, source_interface, db): @click.option("--vrf-selection", required=False, type=click.Choice(["enable", "disable"]), help="VRF selection flag for DHCPv4 relay") @click.option("--server-id-override", required=False, type=click.Choice(["enable", "disable"]), help="Enable/Disable server ID override for DHCPv4 relay") @click.option("--server-vrf", required=False, help="Server VRF name for DHCPv4 relay") -@click.option("--agent-relay-mode", required=False, type=click.Choice(["discard", "append", "replace"]), +@click.option("--agent-relay-mode", required=False, type=click.Choice(["discard", "append", "replace", "forward"]), help="Set agent relay mode for DHCPv4 relay") @click.option("--max-hop-count", required=False, type=int, help="Maximum hop count for DHCPv4 relay") @click.argument("vlan_name", metavar="", required=True) @@ -318,7 +318,7 @@ def update_dhcpv4_relay(db, vlan_name, dhcpv4_servers, source_interface, link_se @click.option("--vrf-selection", required=False, type=click.Choice(["enable", "disable"]), help="Enable/Disable VRF selection for DHCPv4 relay") @click.option("--server-id-override", required=False, type=click.Choice(["enable", "disable"]), help="Enable/Disable server ID override for DHCPv4 relay") @click.option("--server-vrf", required=False, help="Server VRF name for DHCPv4 relay") -@click.option("--agent-relay-mode", required=False, type=click.Choice(["discard", "append", "replace"]), +@click.option("--agent-relay-mode", required=False, type=click.Choice(["discard", "append", "replace", "forward"]), help="Set agent relay mode for DHCPv4 relay") @click.option("--max-hop-count", required=False, type=int, help="Maximum hop count for DHCPv4 relay") @click.argument("vlan_name", metavar="", required=True) @@ -518,7 +518,7 @@ def dhcp_relay_ipv4_helper(): @click.option("--vrf-selection", required=False, type=click.Choice(["enable", "disable"]), help="Enable/Disable VRF selection for DHCPv4 relay") @click.option("--server-id-override", required=False, type=click.Choice(["enable", "disable"]), help="Enable/Disable server ID override for DHCPv4 relay") @click.option("--server-vrf", required=False, help="Server VRF name for DHCPv4 relay") -@click.option("--agent-relay-mode", required=False, type=click.Choice(["discard", "append", "replace"]), +@click.option("--agent-relay-mode", required=False, type=click.Choice(["discard", "append", "replace", "forward"]), help="Set agent relay mode for DHCPv4 relay") @click.option("--max-hop-count", required=False, type=int, help="Maximum hop count for DHCPv4 relay") @clicommon.pass_db @@ -545,7 +545,7 @@ def add_dhcp_relay_ipv4_helper(db, vid, dhcp_relay_helpers, source_interface, li @click.option("--vrf-selection", required=False, type=click.Choice(["enable", "disable"]), help="Enable/Disable VRF selection for DHCPv4 relay") @click.option("--server-id-override", required=False, type=click.Choice(["enable", "disable"]), help="Enable/Disable server ID override for DHCPv4 relay") @click.option("--server-vrf", required=False, help="Server VRF name for DHCPv4 relay") -@click.option("--agent-relay-mode", required=False, type=click.Choice(["discard", "append", "replace"]), +@click.option("--agent-relay-mode", required=False, type=click.Choice(["discard", "append", "replace", "forward"]), help="Set agent relay mode for DHCPv4 relay") @click.option("--max-hop-count", required=False, type=int, help="Maximum hop count for DHCPv4 relay") @clicommon.pass_db diff --git a/dockers/docker-dhcp-relay/cli/show/plugins/show_dhcp_relay.py b/dockers/docker-dhcp-relay/cli/show/plugins/show_dhcp_relay.py index 83b6bcb720e..4123b64e0a1 100644 --- a/dockers/docker-dhcp-relay/cli/show/plugins/show_dhcp_relay.py +++ b/dockers/docker-dhcp-relay/cli/show/plugins/show_dhcp_relay.py @@ -12,6 +12,12 @@ from swsscommon.swsscommon import SonicV2Connector +# ====================================================================== +# Constants +# ====================================================================== + +# --- Relay counters (dhcp4relay agent & dhcp6relay) --- + # COUNTERS_DB Table DHCPv4_COUNTER_TABLE = 'COUNTERS_DHCPV4' # STATE_DB Table @@ -19,13 +25,20 @@ # DHCPv4 Counter Messages dhcpv4_messages = [ - 'Unknown', 'Discover', 'Offer', 'Request', 'Acknowledge', 'NegativeAcknowledge', 'Release', + 'Unknown', 'Discover', 'Offer', 'Request', 'Acknowledge', + 'NegativeAcknowledge', 'Release', 'Inform', 'Decline', 'Malformed', 'Dropped' ] # DHCPv6 Counter Messages -messages = ["Unknown", "Solicit", "Advertise", "Request", "Confirm", "Renew", "Rebind", "Reply", "Release", "Decline", - "Reconfigure", "Information-Request", "Relay-Forward", "Relay-Reply", "Malformed"] +messages = [ + "Unknown", "Solicit", "Advertise", "Request", "Confirm", + "Renew", "Rebind", "Reply", "Release", "Decline", + "Reconfigure", "Information-Request", + "Relay-Forward", "Relay-Reply", "Malformed" +] + +# --- DHCP Relay Config --- # DHCP_RELAY Config Table DHCP_RELAY = 'DHCP_RELAY' @@ -33,13 +46,36 @@ DHCPV4_RELAY_TABLE = 'DHCPV4_RELAY' DHCPV6_SERVERS = "dhcpv6_servers" DHCPV4_SERVERS = "dhcp_servers" -DHCPV4_TABLE_PARAMS = ["dhcpv4_servers", "server_vrf", "source_interface", "link_selection", - "vrf_selection", "server_id_override", "agent_relay_mode", "max_hop_count"] -SUPPORTED_DHCPV4_TYPE = [ - "Unknown", "Discover", "Offer", "Request", "Decline", "Ack", "Nak", "Release", "Inform", "Bootp" +DHCPV4_TABLE_PARAMS = [ + "dhcpv4_servers", "server_vrf", "source_interface", + "link_selection", "vrf_selection", "server_id_override", + "agent_relay_mode", "max_hop_count" ] -SUPPORTED_DIR = ["TX", "RX"] -DHCPV4_COUNTER_TABLE_PREFIX = "DHCPV4_COUNTER_TABLE" + +# --- dhcpmon counters (COUNTERS_DB) --- +# v4 reads from DHCPV4_COUNTER_TABLE, v6 from DHCPV6_COUNTER_TABLE + +DHCPMON_V4_TABLE_PREFIX = "DHCPV4_COUNTER_TABLE" +DHCPMON_V6_TABLE_PREFIX = "DHCPV6_COUNTER_TABLE" +DHCPMON_SUPPORTED_DIR = ["TX", "RX"] + +# v4 display types (Malformed/Ignored exist in DB but are +# deliberately excluded from display) +DHCPMON_V4_DISPLAY_TYPES = [ + "Unknown", "Discover", "Offer", "Request", "Decline", + "Ack", "Nak", "Release", "Inform", "Bootp" +] +# v6 display types (Malformed/Ignored excluded from display, +# but still cleared - see clear_dhcp_relay.py) +DHCPMON_V6_DISPLAY_TYPES = [ + "Unknown", "Solicit", "Advertise", "Request", "Confirm", + "Renew", "Rebind", "Reply", "Release", "Decline", + "Reconfigure", "Information-Request", + "Relay-Forward", "Relay-Reply" +] + +# --- DB Key Separators --- + VLAN_MEMBER_TABLE_PREFIX = "VLAN_MEMBER" COUNTERS_DB_SEPRATOR = ":" CONFIG_DB_SEPRATOR = "|" @@ -47,6 +83,14 @@ config_db = ConfigDBConnector() +# ====================================================================== +# dhcp4relay Agent Counters +# (Reads from COUNTERS_DHCPV4 in COUNTERS_DB) +# Written by the sonic-dhcp4relay process, NOT dhcpmon. +# Used by: show dhcp4relay-counters vlan-counts +# show dhcp_relay ipv4 vlan-counters +# ====================================================================== + def check_sonic_dhcpv4_relay_flag(): if config_db is None: return @@ -103,7 +147,11 @@ def _fetch_db_data(self, vlan: str) -> Dict: return {DHCPv4_COUNTER_TABLE: dhcp_data} - def _get_interface_counters(self, vlan: str, direction: Optional[str] = None, pkt_type: Optional[str] = None) -> Dict: + def _get_interface_counters( + self, vlan: str, + direction: Optional[str] = None, + pkt_type: Optional[str] = None + ) -> Dict: """Extract counter data for interfaces from Redis data.""" interface_counters = {} redis_data = self._fetch_db_data(vlan) @@ -206,6 +254,14 @@ def ipv4_counters(dir, pkt_type, vlan): #sending direction as "TX" by default. counter.show_direction_counters(vlan, "TX") + +# ====================================================================== +# dhcp6relay Counters +# (Reads from DHCPv6_COUNTER_TABLE in STATE_DB) +# Written by the dhcp6relay process, NOT dhcpmon. +# Used by: show dhcp6relay_counters counts +# ====================================================================== + class DHCPv6_Counter(object): def __init__(self): self.db = SonicV2Connector(use_unix_socket_path=False) @@ -239,16 +295,6 @@ def print_count(counter, intf): data.append(counter.get_dhcp6relay_msg_count(intf, i)) print(tabulate(data, headers=["Message Type", intf], tablefmt='simple', stralign='right') + "\n") -# -# 'dhcp6relay_counters' group ### -# - - -@click.group(cls=clicommon.AliasedGroup, name="dhcp6relay_counters") -def dhcp6relay_counters(): - """Show DHCPv6 counter""" - pass - def ipv6_counters(interface): counter = DHCPv6_Counter() @@ -261,20 +307,12 @@ def ipv6_counters(interface): print_count(counter, intf) -# 'counts' subcommand ("show dhcp6relay_counters counts") -@dhcp6relay_counters.command('counts') -@click.option('-i', '--interface', required=False) -@click.option('--verbose', is_flag=True, help="Enable verbose output") -def counts(interface, verbose): - """Show dhcp6relay message counts""" - - ipv6_counters(interface) - - -@click.group(cls=clicommon.AliasedGroup, name="dhcprelay_helper") -def dhcp_relay_helper(): - """Show DHCP_Relay helper information""" - pass +# ====================================================================== +# DHCP Relay Config Display +# (Reads relay destinations / helpers from CONFIG_DB) +# Used by: show dhcp_relay ipv4/ipv6 destination/helper, +# show dhcprelay_helper ipv6, VlanBrief column +# ====================================================================== def get_dhcpv4_relay_data_with_header(table_data, entry_names, dhcp_server_enabled=False): vlan_relay = [] @@ -297,7 +335,12 @@ def get_dhcpv4_relay_data_with_header(table_data, entry_names, dhcp_server_enabl row.append(entry_data) vlan_relay.append(row) - headers = ["Interface", "DHCP Relay Address", "Server Vrf", "Source Interface", "Link Selection", "VRF Selection", "Server ID Override", "Agent Relay Mode", "Max Hop Count"] + headers = [ + "Interface", "DHCP Relay Address", "Server Vrf", + "Source Interface", "Link Selection", + "VRF Selection", "Server ID Override", + "Agent Relay Mode", "Max Hop Count" + ] return tabulate(vlan_relay, tablefmt='grid', stralign='right', headers=headers) + '\n' @@ -358,18 +401,106 @@ def get_dhcp_relay(table_name, entry_name, with_header): print(output) -def is_vlan_interface_valid(vlan_interface, db): - # If not vlan interface specified, treat it as valid +def get_data(table_data, vlan): + vlan_data = table_data.get(vlan, {}) + helpers_data = vlan_data.get(DHCPV6_SERVERS) + addr = {vlan: []} + output = '' + if helpers_data is not None: + for ip in helpers_data: + addr[vlan].append(ip) + output = tabulate({'Interface': [vlan], vlan: addr.get(vlan)}, tablefmt='simple', stralign='right') + '\n' + return output + + +# ====================================================================== +# dhcpmon Counters (COUNTERS_DB) +# Shared v4/v6 functions parameterized by table prefix. +# Written by the dhcpmon process. +# +# v4: reads from DHCPV4_COUNTER_TABLE (prefix = DHCPMON_V4_TABLE_PREFIX) +# v6: reads from DHCPV6_COUNTER_TABLE (prefix = DHCPMON_V6_TABLE_PREFIX) +# +# Each key has TX and RX fields containing JSON strings +# with per-type counts. +# +# Used by: show dhcp_relay ipv4 counters (dhcpmon v4) +# show dhcp_relay ipv6 counters (dhcpmon v6) +# ====================================================================== + +def natural_sort_key(string): + """Sort key for natural ordering (Ethernet1, Ethernet2, ...).""" + return [ + int(text) if text.isdigit() else text.lower() + for text in re.split(r'(\d+)', string) + ] + + +def get_count_from_db(db, key, dir, type): + """ + Read a single dhcpmon counter value from COUNTERS_DB. + Counter values are stored as JSON strings with single + quotes, e.g. {'Unknown':'0','Discover':'5',...} + """ + count_str = db.get(db.COUNTERS_DB, key, dir) + count = 0 + if count_str is not None: + try: + value = json.loads( + count_str.replace("\'", "\"") + ).get(type, "0") + try: + count = int(value) + except (TypeError, ValueError): + # Leave count as default 0 if value is not a valid integer + pass + except json.JSONDecodeError: + # Leave count as default 0 if JSON is malformed + pass + return count + + +def is_dhcpmon_vlan_valid(vlan_interface, db, prefix): + """ + Check if a VLAN has dhcpmon counter data in COUNTERS_DB. + Empty string means 'show all' and is always valid. + Works for both v4 and v6 by passing the appropriate prefix. + """ if vlan_interface == "": return True - if not db.exists(db.COUNTERS_DB, DHCPV4_COUNTER_TABLE_PREFIX + COUNTERS_DB_SEPRATOR + vlan_interface): - return False - return True + key = prefix + COUNTERS_DB_SEPRATOR + vlan_interface + return db.exists(db.COUNTERS_DB, key) + + +def get_dhcpmon_vlans(vlan_interface, db, prefix): + """ + Get set of VLANs that have dhcpmon counter data + in COUNTERS_DB matching the given prefix. + If vlan_interface is empty, returns all VLANs. + """ + counters_key = ( + prefix + COUNTERS_DB_SEPRATOR + + vlan_interface + "*" + ) + vlans = set() + for key in (db.keys(db.COUNTERS_DB, counters_key) or []): + splits = key.split(COUNTERS_DB_SEPRATOR) + if vlan_interface == "" or vlan_interface == splits[1]: + vlans.add(splits[1]) + return vlans def get_vlan_members_from_config_db(db, vlan_interface): + """ + Get VLAN member interfaces from CONFIG_DB. + Returns dict: {vlan_name: set(member_interfaces)} + """ vlan_members = {} - for key in db.keys(db.CONFIG_DB, VLAN_MEMBER_TABLE_PREFIX + CONFIG_DB_SEPRATOR + vlan_interface + "*"): + pattern = ( + VLAN_MEMBER_TABLE_PREFIX + CONFIG_DB_SEPRATOR + + vlan_interface + "*" + ) + for key in (db.keys(db.CONFIG_DB, pattern) or []): splits = key.split(CONFIG_DB_SEPRATOR) if not splits[1].endswith(vlan_interface): continue @@ -379,157 +510,209 @@ def get_vlan_members_from_config_db(db, vlan_interface): return vlan_members -def get_count_from_db(db, key, dir, type): - count_str = db.get(db.COUNTERS_DB, key, dir) - count = 0 - if count_str is not None: - try: - count = json.loads(count_str.replace("\'", "\"")).get(type, "0") - except json.JSONDecodeError: - pass - return count - - -def append_vlan_count_with_type_specified(data, db, dirs, vlan_interface, current_type, summary): - key = DHCPV4_COUNTER_TABLE_PREFIX + COUNTERS_DB_SEPRATOR + vlan_interface - data[summary].append(vlan_interface) - data["Intf Type"].append("VLAN") - for current_dir in dirs: - count = get_count_from_db(db, key, current_dir, current_type) - data[current_dir].append(count) +def get_mgmt_intfs_from_config_db(db): + """Get management interface names from CONFIG_DB.""" + mgmt_intfs = [ + key.split(CONFIG_DB_SEPRATOR)[1] + for key in (db.keys( + db.CONFIG_DB, + MGMT_PORT_TABLE + CONFIG_DB_SEPRATOR + "*" + ) or []) + if len(key.split(CONFIG_DB_SEPRATOR)) > 1 + ] + return mgmt_intfs -def get_interfaces_type(interface_name, mgmt_intfs, vlan_interface, vlan_members): +def get_interfaces_type( + interface_name, mgmt_intfs, vlan_interface, vlan_members +): + """ + Classify an interface as MGMT, Downlink, Uplink, or + Unknown based on VLAN membership and management port + tables. + """ if interface_name in mgmt_intfs: - interface_type = "MGMT" + return "MGMT" elif vlan_interface not in vlan_members: - interface_type = "Unknown" + return "Unknown" elif interface_name in vlan_members[vlan_interface]: - interface_type = "Downlink" + return "Downlink" else: - interface_type = "Uplink" - return interface_type - - -def append_interfaces_count_with_type_specified(data, db, dirs, vlan_interface, current_type, summary, vlan_members, - mgmt_intfs): - key_pattern = DHCPV4_COUNTER_TABLE_PREFIX + COUNTERS_DB_SEPRATOR + vlan_interface + COUNTERS_DB_SEPRATOR + "*" - keys = sorted(db.keys(db.COUNTERS_DB, key_pattern), key=natural_sort_key) - for key in keys: - interface_name = key.split(COUNTERS_DB_SEPRATOR)[2] - data[summary].append(interface_name) - interface_type = get_interfaces_type(interface_name, mgmt_intfs, vlan_interface, vlan_members) - data["Intf Type"].append(interface_type) - for current_dir in dirs: - count = get_count_from_db(db, key, current_dir, current_type) - data[current_dir].append(count) - - -def generate_output_with_type_specified(db, vlan_members, types, dirs, vlan_interface, mgmt_intfs): - # If type specified, then there would be only 1 type + return "Uplink" + + +def generate_dhcpmon_output_with_type( + db, vlan_members, types, dirs, + vlan_interface, mgmt_intfs, prefix +): + """ + Generate dhcpmon tabulated output when a specific counter + type is selected. + Shows one row per interface, columns = directions. + """ current_type = types[0] summary = "{} ({})".format(vlan_interface, current_type) - - # Data need to be printed - data = { - summary: [], - "Intf Type": [] - } + data = {summary: [], "Intf Type": []} for dir in dirs: data.setdefault(dir, []) - # Get Vlan interface count - append_vlan_count_with_type_specified(data, db, dirs, vlan_interface, current_type, summary) - # Get physical interfaces count - append_interfaces_count_with_type_specified(data, db, dirs, vlan_interface, current_type, summary, - vlan_members, mgmt_intfs) - return tabulate(data, tablefmt="pretty", stralign="left", headers="keys") + "\n" - - -def append_vlan_count_without_type_specified(data, db, dir, vlan_interface, types, summary): - key = DHCPV4_COUNTER_TABLE_PREFIX + COUNTERS_DB_SEPRATOR + vlan_interface + # VLAN-level aggregate row + key = prefix + COUNTERS_DB_SEPRATOR + vlan_interface data[summary].append(vlan_interface) data["Intf Type"].append("VLAN") - for current_type in types: - count = get_count_from_db(db, key, dir, current_type) - data[current_type].append(count) - + for current_dir in dirs: + count = get_count_from_db( + db, key, current_dir, current_type + ) + data[current_dir].append(count) -def natural_sort_key(string): - return [int(text) if text.isdigit() else text.lower() for text in re.split(r'(\d+)', string)] + # Per-interface rows (physical ports) + key_pattern = ( + prefix + COUNTERS_DB_SEPRATOR + + vlan_interface + COUNTERS_DB_SEPRATOR + "*" + ) + keys = sorted( + db.keys(db.COUNTERS_DB, key_pattern) or [], + key=natural_sort_key + ) + for key in keys: + iface = key.split(COUNTERS_DB_SEPRATOR)[2] + data[summary].append(iface) + intf_type = get_interfaces_type( + iface, mgmt_intfs, + vlan_interface, vlan_members + ) + data["Intf Type"].append(intf_type) + for current_dir in dirs: + count = get_count_from_db( + db, key, current_dir, current_type + ) + data[current_dir].append(count) + return tabulate( + data, tablefmt="pretty", + stralign="left", headers="keys" + ) + "\n" + + +def generate_dhcpmon_output_without_type( + db, vlan_members, types, dir, + vlan_interface, mgmt_intfs, prefix +): + """ + Generate dhcpmon tabulated output when no specific type + is selected. + Shows one row per interface, columns = all counter types. + """ + summary = "{} ({})".format(vlan_interface, dir) + data = {summary: [], "Intf Type": []} + for t in types: + data.setdefault(t, []) -def append_interfaces_count_without_type_specified(data, db, dir, vlan_interface, types, summary, vlan_members, - mgmt_intfs): - key_pattern = DHCPV4_COUNTER_TABLE_PREFIX + COUNTERS_DB_SEPRATOR + vlan_interface + COUNTERS_DB_SEPRATOR + "*" - keys = sorted(db.keys(db.COUNTERS_DB, key_pattern), key=natural_sort_key) + # VLAN-level aggregate row + key = prefix + COUNTERS_DB_SEPRATOR + vlan_interface + data[summary].append(vlan_interface) + data["Intf Type"].append("VLAN") + for t in types: + count = get_count_from_db(db, key, dir, t) + data[t].append(count) + + # Per-interface rows (physical ports) + key_pattern = ( + prefix + COUNTERS_DB_SEPRATOR + + vlan_interface + COUNTERS_DB_SEPRATOR + "*" + ) + keys = sorted( + db.keys(db.COUNTERS_DB, key_pattern) or [], + key=natural_sort_key + ) for key in keys: - interface_name = key.split(COUNTERS_DB_SEPRATOR)[2] - data[summary].append(interface_name) - interface_type = get_interfaces_type(interface_name, mgmt_intfs, vlan_interface, vlan_members) - data["Intf Type"].append(interface_type) - for current_type in types: - count = get_count_from_db(db, key, dir, current_type) - data[current_type].append(count) - + iface = key.split(COUNTERS_DB_SEPRATOR)[2] + data[summary].append(iface) + intf_type = get_interfaces_type( + iface, mgmt_intfs, + vlan_interface, vlan_members + ) + data["Intf Type"].append(intf_type) + for t in types: + count = get_count_from_db(db, key, dir, t) + data[t].append(count) + + return tabulate( + data, tablefmt="pretty", + stralign="left", headers="keys" + ) + "\n" + + +def print_dhcpmon_counter_data( + vlan_interface, dirs, types, db, prefix +): + """ + Print dhcpmon counter data from COUNTERS_DB. + Works for both v4 and v6 based on the prefix parameter. + + Args: + vlan_interface: VLAN name to filter, or "" for all + dirs: list of directions (TX, RX, or both) + types: list of counter types to display + db: SonicV2Connector instance + prefix: DHCPMON_V4_TABLE_PREFIX or + DHCPMON_V6_TABLE_PREFIX + """ + vlans = sorted(get_dhcpmon_vlans(vlan_interface, db, prefix)) + vlan_members = get_vlan_members_from_config_db( + db, vlan_interface + ) + mgmt_intfs = get_mgmt_intfs_from_config_db(db) -def generate_output_without_type_specified(db, vlan_members, types, dir, vlan_interface, mgmt_intfs): - summary = "{} ({})".format(vlan_interface, dir) - data = { - summary: [], - "Intf Type": [] - } - for type in types: - data.setdefault(type, []) + if len(types) == 1: + # Single type specified: show that type across dirs + for vlan in vlans: + output = generate_dhcpmon_output_with_type( + db, vlan_members, types, dirs, + vlan, mgmt_intfs, prefix + ) + print(output) + else: + # No type filter: show all types for each direction + for vlan in vlans: + for dir in dirs: + output = generate_dhcpmon_output_without_type( + db, vlan_members, types, dir, + vlan, mgmt_intfs, prefix + ) + print(output) - # Get vlan interface count - append_vlan_count_without_type_specified(data, db, dir, vlan_interface, types, summary) - # Get physical interfaces count - append_interfaces_count_without_type_specified(data, db, dir, vlan_interface, types, summary, vlan_members, - mgmt_intfs) - return tabulate(data, tablefmt="pretty", stralign="left", headers="keys") + "\n" +# ====================================================================== +# Click Command Groups and Subcommands +# ====================================================================== -def get_mgmt_intfs_from_config_db(db): - mgmt_intfs = [ - key.split(CONFIG_DB_SEPRATOR)[1] for key in db.keys(db.CONFIG_DB, MGMT_PORT_TABLE + CONFIG_DB_SEPRATOR + "*") - if len(key.split(CONFIG_DB_SEPRATOR)) > 1 - ] - return mgmt_intfs +# --- Standalone commands --- +# +# 'dhcp6relay_counters' group ### +# -def get_vlans_from_counters_db(vlan_interface, db): - # Get vlan set from COUNTERS_DB - counters_key = DHCPV4_COUNTER_TABLE_PREFIX + COUNTERS_DB_SEPRATOR + vlan_interface + "*" - vlans = set() - for key in db.keys(db.COUNTERS_DB, counters_key): - splits = key.split(COUNTERS_DB_SEPRATOR) - if vlan_interface == "" or vlan_interface == splits[1]: - vlans.add(splits[1]) - return vlans +@click.group(cls=clicommon.AliasedGroup, name="dhcp6relay_counters") +def dhcp6relay_counters(): + """Show DHCPv6 counter""" + pass -def print_dhcpv4_relay_counter_data(vlan_interface, dirs, types, db): - # Get vlan set from COUNTERS_DB - vlans = get_vlans_from_counters_db(vlan_interface, db) +# 'counts' subcommand ("show dhcp6relay_counters counts") +@dhcp6relay_counters.command('counts') +@click.option('-i', '--interface', required=False) +def dhcp6relay_counts(interface): + """Show dhcp6relay message counts""" - # Get vlan members - vlan_members = get_vlan_members_from_config_db(db, vlan_interface) + ipv6_counters(interface) - # Get mgmt interfaces - mgmt_intfs = get_mgmt_intfs_from_config_db(db) - # If user specify type - if len(types) == 1: - for vlan in vlans: - output = generate_output_with_type_specified(db, vlan_members, types, dirs, vlan, mgmt_intfs) - print(output) - # type not specified - else: - for vlan in vlans: - for dir in dirs: - output = generate_output_without_type_specified(db, vlan_members, types, dir, vlan, mgmt_intfs) - print(output) +@click.group(cls=clicommon.AliasedGroup, name="dhcprelay_helper") +def dhcp_relay_helper(): + """Show DHCP_Relay helper information""" + pass @dhcp_relay_helper.command('ipv6') @@ -538,17 +721,7 @@ def get_dhcpv6_helper_address(): get_dhcp_relay(DHCP_RELAY, DHCPV6_SERVERS, with_header=False) -def get_data(table_data, vlan): - vlan_data = table_data.get(vlan, {}) - helpers_data = vlan_data.get('dhcpv6_servers') - addr = {vlan: []} - output = '' - if helpers_data is not None: - for ip in helpers_data: - addr[vlan].append(ip) - output = tabulate({'Interface': [vlan], vlan: addr.get(vlan)}, tablefmt='simple', stralign='right') + '\n' - return output - +# --- Unified dhcp_relay command group --- @click.group(cls=clicommon.AliasedGroup, name="dhcp_relay") def dhcp_relay(): @@ -566,8 +739,14 @@ def dhcp_relay_ipv4(): pass @dhcp_relay_ipv4.command("vlan-counters") -@click.option('-d', '--direction', required=False, type=click.Choice(['TX', 'RX']), help="Specify TX(egress) or RX(ingress)") -@click.option('-t', '--type', required=False, type=click.Choice(dhcpv4_messages), help="Specify DHCP packet counter type") +@click.option( + '-d', '--direction', required=False, + type=click.Choice(['TX', 'RX']), + help="Specify TX(egress) or RX(ingress)") +@click.option( + '-t', '--type', required=False, + type=click.Choice(dhcpv4_messages), + help="Specify DHCP packet counter type") @click.argument("vlan_interface", required=True) def dhcp_relay_ip4_vlan_counters(direction, type, vlan_interface): ipv4_counters(direction, type, vlan_interface) @@ -591,31 +770,82 @@ def dhcp4relay_counters(): pass @dhcp4relay_counters.command("vlan-counts") -@click.option('-d', '--direction', required=False, type=click.Choice(['TX', 'RX']), help="Specify TX(egress) or RX(ingress)") -@click.option('-t', '--type', required=False, type=click.Choice(dhcpv4_messages), help="Specify DHCP packet counter type") +@click.option( + '-d', '--direction', required=False, + type=click.Choice(['TX', 'RX']), + help="Specify TX(egress) or RX(ingress)") +@click.option( + '-t', '--type', required=False, + type=click.Choice(dhcpv4_messages), + help="Specify DHCP packet counter type") @click.argument("vlan_interface", required=True) -def counts(direction, type, vlan_interface): +def dhcp4relay_vlan_counts(direction, type, vlan_interface): ipv4_counters(direction, type, vlan_interface) -@dhcp_relay_ipv6.command("counters") -@click.option('-i', '--interface', required=False) -def dhcp_relay_ip6counters(interface): - ipv6_counters(interface) - +# --- show dhcp_relay ipv4 counters (dhcpmon v4) --- @dhcp_relay_ipv4.command("counters") @clicommon.pass_db @click.argument("vlan_interface", required=False, default="") -@click.option('--dir', type=click.Choice(SUPPORTED_DIR), required=False) -@click.option('--type', type=click.Choice(SUPPORTED_DHCPV4_TYPE), required=False) +@click.option( + '--dir', type=click.Choice(DHCPMON_SUPPORTED_DIR), + required=False) +@click.option( + '--type', type=click.Choice(DHCPMON_V4_DISPLAY_TYPES), + required=False) def dhcp_relay_ip4counters(db, vlan_interface, dir, type): - if not is_vlan_interface_valid(vlan_interface, db.db): - click.echo("Vlan interface {} doesn't have any count data".format(vlan_interface)) + """Show dhcpmon v4 counters (COUNTERS_DB)""" + if not is_dhcpmon_vlan_valid( + vlan_interface, db.db, DHCPMON_V4_TABLE_PREFIX + ): + click.echo( + "Vlan interface {} doesn't have any count data" + .format(vlan_interface) + ) + return + dirs = [dir] if dir else DHCPMON_SUPPORTED_DIR + types = [type] if type else DHCPMON_V4_DISPLAY_TYPES + print_dhcpmon_counter_data( + vlan_interface, dirs, types, db.db, + DHCPMON_V4_TABLE_PREFIX + ) + +# --- show dhcp_relay ipv6 counters (dhcpmon v6) --- +# Repurposed: was a wrapper for dhcp6relay STATE_DB counters, +# now shows dhcpmon v6 counters from COUNTERS_DB. +# The old dhcp6relay counters are still available via: +# show dhcp6relay_counters counts + +@dhcp_relay_ipv6.command("counters") +@clicommon.pass_db +@click.argument("vlan_interface", required=False, default="") +@click.option( + '--dir', type=click.Choice(DHCPMON_SUPPORTED_DIR), + required=False) +@click.option( + '--type', type=click.Choice(DHCPMON_V6_DISPLAY_TYPES), + required=False) +def dhcp_relay_ip6counters(db, vlan_interface, dir, type): + """Show dhcpmon v6 counters (COUNTERS_DB)""" + if not is_dhcpmon_vlan_valid( + vlan_interface, db.db, DHCPMON_V6_TABLE_PREFIX + ): + click.echo( + "Vlan interface {} doesn't have any count data" + .format(vlan_interface) + ) return - dirs = [dir] if dir else SUPPORTED_DIR - types = [type] if type else SUPPORTED_DHCPV4_TYPE - print_dhcpv4_relay_counter_data(vlan_interface, dirs, types, db.db) + dirs = [dir] if dir else DHCPMON_SUPPORTED_DIR + types = [type] if type else DHCPMON_V6_DISPLAY_TYPES + print_dhcpmon_counter_data( + vlan_interface, dirs, types, db.db, + DHCPMON_V6_TABLE_PREFIX + ) + +# ====================================================================== +# Plugin Registration +# ====================================================================== def register(cli): cli.add_command(dhcp6relay_counters) diff --git a/dockers/docker-dhcp-server/Dockerfile.j2 b/dockers/docker-dhcp-server/Dockerfile.j2 index eff06230f22..a21bd42a493 100755 --- a/dockers/docker-dhcp-server/Dockerfile.j2 +++ b/dockers/docker-dhcp-server/Dockerfile.j2 @@ -1,5 +1,5 @@ {% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files, rsync_from_builder_stage %} -ARG BASE=docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} +ARG BASE=docker-config-engine-trixie-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} FROM $BASE AS base @@ -16,7 +16,7 @@ RUN apt-get update && \ build-essential \ kea-dhcp4-server -RUN mkdir -p /var/run/kea +RUN mkdir -p /run/kea /var/log/kea /var/lib/kea && chmod 750 /run/kea RUN pip3 install psutil @@ -40,7 +40,7 @@ RUN pip3 install psutil RUN apt-get remove -y build-essential \ python3-dev -COPY ["docker_init.sh", "start.sh", "/usr/bin/"] +COPY ["docker_init.sh", "start.sh", "wait_for_dhcpservd.sh", "/usr/bin/"] COPY ["supervisord.conf", "/etc/supervisor/conf.d/"] COPY ["kea-dhcp4.conf.j2", "/usr/share/sonic/templates/"] COPY ["critical_processes", "/etc/supervisor/"] @@ -50,6 +50,8 @@ COPY ["cli", "/cli/"] FROM $BASE +ARG image_version + {{ rsync_from_builder_stage() }} # Pass the image_version to container diff --git a/dockers/docker-dhcp-server/docker_init.sh b/dockers/docker-dhcp-server/docker_init.sh index a9ffc27354c..eac31a776a7 100755 --- a/dockers/docker-dhcp-server/docker_init.sh +++ b/dockers/docker-dhcp-server/docker_init.sh @@ -4,12 +4,15 @@ # Generate supervisord config file mkdir -p /etc/supervisor/conf.d/ # Generate kea folder -mkdir -p /etc/kea/ +mkdir -p /etc/kea/ /run/kea /var/log/kea /var/lib/kea +chmod 750 /run/kea udp_server_ip=$(ip -j -4 addr list lo scope host | jq -r -M '.[0].addr_info[0].local') hostname=$(hostname) # Make the script that waits for all interfaces to come up executable -chmod +x /etc/kea/lease_update.sh /usr/bin/start.sh +# Clean up stale ready flag from previous run +rm -f /tmp/dhcpservd_ready +chmod +x /etc/kea/lease_update.sh /usr/bin/start.sh /usr/bin/wait_for_dhcpservd.sh # The docker container should start this script as PID 1, so now that supervisord is # properly configured, we exec /usr/local/bin/supervisord so that it runs as PID 1 for the # duration of the container's lifetime diff --git a/dockers/docker-dhcp-server/kea-dhcp4-init.conf b/dockers/docker-dhcp-server/kea-dhcp4-init.conf index a2c680380e8..c822e0301ef 100644 --- a/dockers/docker-dhcp-server/kea-dhcp4-init.conf +++ b/dockers/docker-dhcp-server/kea-dhcp4-init.conf @@ -10,7 +10,7 @@ "lease-database": { "type": "memfile", "persist": true, - "name": "/tmp/kea-lease.csv", + "name": "/var/lib/kea/kea-lease.csv", "lfc-interval": 3600 }, "subnet4": [], @@ -19,7 +19,7 @@ "name": "kea-dhcp4", "output_options": [ { - "output": "/tmp/kea-dhcp.log", + "output": "/var/log/kea/kea-dhcp4.log", "pattern": "%-5p %m\n" } ], diff --git a/dockers/docker-dhcp-server/kea-dhcp4.conf.j2 b/dockers/docker-dhcp-server/kea-dhcp4.conf.j2 index 7fe90d86f12..3c284f8360c 100644 --- a/dockers/docker-dhcp-server/kea-dhcp4.conf.j2 +++ b/dockers/docker-dhcp-server/kea-dhcp4.conf.j2 @@ -94,7 +94,7 @@ "name": "kea-dhcp4", "output_options": [ { - "output": "/var/log/kea-dhcp.log", + "output": "/var/log/kea/kea-dhcp4.log", "pattern": "%-5p %m\n" } ], diff --git a/dockers/docker-dhcp-server/supervisord.conf b/dockers/docker-dhcp-server/supervisord.conf index 23e019f3c67..2876a8f0251 100644 --- a/dockers/docker-dhcp-server/supervisord.conf +++ b/dockers/docker-dhcp-server/supervisord.conf @@ -14,7 +14,7 @@ buffer_size=1024 [eventlistener:supervisor-proc-exit-listener] command=/usr/bin/supervisor-proc-exit-listener-rs --container-name dhcp_server --use-unix-socket-path -events=PROCESS_STATE_EXITED,PROCESS_STATE_RUNNING +events=PROCESS_STATE_EXITED,PROCESS_STATE_RUNNING,PROCESS_STATE_FATAL autostart=true autorestart=unexpected buffer_size=1024 @@ -58,6 +58,20 @@ stderr_syslog=true dependent_startup=true dependent_startup_wait_for=start:exited + +[program:dhcpservd-ready] +command=/usr/bin/wait_for_dhcpservd.sh +priority=4 +autostart=false +autorestart=false +startsecs=0 +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true +dependent_startup=true +dependent_startup_wait_for=dhcpservd:running + [program:kea-dhcp4] command=/usr/sbin/kea-dhcp4 -c /etc/kea/kea-dhcp4.conf priority=3 @@ -68,5 +82,5 @@ stdout_syslog=true stderr_logfile=NONE stderr_syslog=true dependent_startup=true -dependent_startup_wait_for=dhcpservd:running +dependent_startup_wait_for=dhcpservd-ready:exited environment=KEA_PIDFILE_DIR=/tmp/ diff --git a/dockers/docker-dhcp-server/wait_for_dhcpservd.sh b/dockers/docker-dhcp-server/wait_for_dhcpservd.sh new file mode 100755 index 00000000000..797c655bdf0 --- /dev/null +++ b/dockers/docker-dhcp-server/wait_for_dhcpservd.sh @@ -0,0 +1,23 @@ +#!/bin/bash +# Wait for dhcpservd to signal readiness by creating a flag file. +# This ensures kea-dhcp4 only starts after dhcpservd has registered +# its SIGUSR1 handler, preventing a race condition where kea sends +# SIGUSR1 before the handler is set up (default disposition: terminate). + +DHCPSERVD_READY_FLAG="/tmp/dhcpservd_ready" +TIMEOUT=120 + +# Do NOT remove the flag: the dependent-startup plugin may launch this +# checker more than once (the program has startsecs=0 and exits quickly). +# dhcpservd does not restart within a container, and docker_init.sh clears the stale +# flag on container start, so leaving it in place keeps re-runs idempotent. +for i in $(seq 1 $TIMEOUT); do + if [ -f "$DHCPSERVD_READY_FLAG" ]; then + logger -p daemon.info "wait_for_dhcpservd: dhcpservd is ready (flag file found after ${i}s)" + exit 0 + fi + sleep 1 +done + +logger -p daemon.error "wait_for_dhcpservd: timed out waiting for dhcpservd readiness after ${TIMEOUT}s" +exit 1 diff --git a/dockers/docker-eventd/Dockerfile.j2 b/dockers/docker-eventd/Dockerfile.j2 index 6116e5f5199..a7d811f751d 100644 --- a/dockers/docker-eventd/Dockerfile.j2 +++ b/dockers/docker-eventd/Dockerfile.j2 @@ -1,5 +1,5 @@ {% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files, rsync_from_builder_stage %} -ARG BASE=docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} +ARG BASE=docker-config-engine-trixie-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} FROM $BASE AS base @@ -27,6 +27,7 @@ COPY ["supervisord.conf", "/etc/supervisor/conf.d/"] COPY ["critical_processes", "/etc/supervisor"] COPY ["*.json", "/etc/rsyslog.d/rsyslog_plugin_conf/"] COPY ["files/rsyslog_plugin.conf.j2", "/etc/rsyslog.d/rsyslog_plugin_conf/"] +COPY ["eventdb_wrapper.sh", "/usr/bin"] RUN j2 -f json /etc/rsyslog.d/rsyslog_plugin_conf/rsyslog_plugin.conf.j2 /etc/rsyslog.d/rsyslog_plugin_conf/host_events_info.json > /etc/rsyslog.d/rsyslog_plugin_conf/host_events.conf RUN j2 -f json /etc/rsyslog.d/rsyslog_plugin_conf/rsyslog_plugin.conf.j2 /etc/rsyslog.d/rsyslog_plugin_conf/bgp_events_info.json > /etc/rsyslog.d/rsyslog_plugin_conf/bgp_events.conf @@ -44,6 +45,8 @@ RUN rm -f /etc/rsyslog.d/rsyslog_plugin_conf/syncd_events_info.json FROM $BASE +ARG image_version + {{ rsync_from_builder_stage() }} # Pass the image_version to container diff --git a/dockers/docker-eventd/eventdb_wrapper.sh b/dockers/docker-eventd/eventdb_wrapper.sh new file mode 100755 index 00000000000..836c69f0dde --- /dev/null +++ b/dockers/docker-eventd/eventdb_wrapper.sh @@ -0,0 +1,18 @@ +#!/bin/bash + +JSON_FILE="/etc/evprofile/default.json" + +# Check if file exists and is not empty +if [ -s "$JSON_FILE" ]; then + # Check if "events" is defined and has at least one entry + if jq -e '.events and (.events | length > 0)' "$JSON_FILE" > /dev/null; then + echo "Valid events found. Starting eventdb." + exec /usr/bin/eventdb + else + echo "'events' list is missing or empty. Skipping eventdb start." + exit 0 + fi +else + echo "JSON file missing or empty. Skipping eventdb start." + exit 0 +fi diff --git a/dockers/docker-eventd/supervisord.conf b/dockers/docker-eventd/supervisord.conf index 7fbcced6d77..d664d086600 100644 --- a/dockers/docker-eventd/supervisord.conf +++ b/dockers/docker-eventd/supervisord.conf @@ -14,7 +14,7 @@ buffer_size=1024 [eventlistener:supervisor-proc-exit-listener] command=/usr/bin/supervisor-proc-exit-listener-rs --container-name eventd -events=PROCESS_STATE_EXITED,PROCESS_STATE_RUNNING +events=PROCESS_STATE_EXITED,PROCESS_STATE_RUNNING,PROCESS_STATE_FATAL autostart=true autorestart=unexpected buffer_size=1024 @@ -56,3 +56,16 @@ stderr_syslog=true dependent_startup=true dependent_startup_wait_for=start:exited +[program:eventdb] +command=/usr/bin/eventdb_wrapper.sh +priority=3 +autostart=false +autorestart=false +startsecs=0 +startretries=0 +exitcodes=0 +stdout_logfile=syslog +stderr_logfile=syslog +dependent_startup=true +dependent_startup_wait_for=start:exited + diff --git a/dockers/docker-fpm-frr/Dockerfile.common.j2 b/dockers/docker-fpm-frr/Dockerfile.common.j2 new file mode 100644 index 00000000000..de6b8be5872 --- /dev/null +++ b/dockers/docker-fpm-frr/Dockerfile.common.j2 @@ -0,0 +1,25 @@ +{# Dockerfile.common.j2 — shared FRR Dockerfile fragment + Used by docker-sonic-vs via _INCLUDE_DOCKER / --build-context. + Variables: + copy_from — (optional) build-context name for COPY --from= +#} +{% set _from = "--from=" + copy_from + " " if copy_from is defined else "" %} + +{% if enable_frr_snmp_agent is not defined or enable_frr_snmp_agent == "y" %} +COPY {{ _from }}["snmp.conf", "/etc/snmp/frr.conf"] +{% endif %} + +# FRR configuration templates +COPY {{ _from }}["frr", "/usr/share/sonic/templates"] + +# FRR scripts +COPY {{ _from }}["TSA", "/usr/bin/TSA"] +COPY {{ _from }}["TSB", "/usr/bin/TSB"] +COPY {{ _from }}["TSC", "/usr/bin/TSC"] +COPY {{ _from }}["TS", "/usr/bin/TS"] +COPY {{ _from }}["zsocket.sh", "/usr/bin/"] +COPY {{ _from }}["vtysh.conf", "/etc/frr/"] +RUN chmod a+x /usr/bin/TSA && \ + chmod a+x /usr/bin/TSB && \ + chmod a+x /usr/bin/TSC && \ + chmod a+x /usr/bin/zsocket.sh diff --git a/dockers/docker-fpm-frr/Dockerfile.j2 b/dockers/docker-fpm-frr/Dockerfile.j2 index 5ddae692025..0d62cf549a0 100644 --- a/dockers/docker-fpm-frr/Dockerfile.j2 +++ b/dockers/docker-fpm-frr/Dockerfile.j2 @@ -1,5 +1,5 @@ {% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files, rsync_from_builder_stage %} -ARG BASE=docker-swss-layer-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} +ARG BASE=docker-swss-layer-trixie-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} FROM $BASE AS base @@ -15,7 +15,9 @@ ENV DEBIAN_FRONTEND=noninteractive # Install required packages RUN apt-get update && \ apt-get install -y \ - iproute2 \ +{% if enable_frr_tcmalloc == "y" %} + libgoogle-perftools4t64 \ +{% endif %} logrotate RUN groupadd -g ${frr_user_gid} frr @@ -39,18 +41,10 @@ RUN useradd -u ${frr_user_uid} -g ${frr_user_gid} -M -s /bin/false frr RUN chown -R ${frr_user_uid}:${frr_user_gid} /etc/frr/ -COPY ["frr", "/usr/share/sonic/templates"] COPY ["docker_init.sh", "/usr/bin/"] -COPY ["snmp.conf", "/etc/snmp/frr.conf"] -COPY ["TSA", "/usr/bin/TSA"] -COPY ["TSB", "/usr/bin/TSB"] -COPY ["TSC", "/usr/bin/TSC"] -COPY ["TS", "/usr/bin/TS"] -COPY ["zsocket.sh", "/usr/bin/"] -RUN chmod a+x /usr/bin/TSA && \ - chmod a+x /usr/bin/TSB && \ - chmod a+x /usr/bin/TSC && \ - chmod a+x /usr/bin/zsocket.sh + +{% include "Dockerfile.common.j2" %} + FROM $BASE diff --git a/dockers/docker-fpm-frr/base_image_files/prefix_list b/dockers/docker-fpm-frr/base_image_files/prefix_list index 3c8ff0e2d98..831d260f008 100755 --- a/dockers/docker-fpm-frr/base_image_files/prefix_list +++ b/dockers/docker-fpm-frr/base_image_files/prefix_list @@ -32,17 +32,37 @@ check_root_privileges() { fi } -# Function to check if the device is supported device with type spine routers and subtype UpstreamLC -check_spine_router() { - type=$(sonic-cfggen -d -v DEVICE_METADATA.localhost.type) - subtype=$(sonic-cfggen -d -v DEVICE_METADATA.localhost.subtype) - - # only supported on UpstreamLC or UpperSpineRouter - if [[ ("$type" == "SpineRouter" && "$subtype" == "UpstreamLC") || "$type" == "UpperSpineRouter" ]]; then - return +# Function to check if the device is a supported device type +DEVICE_TYPE="" +DEVICE_SUBTYPE="" + +read_device_metadata() { + if [[ -z "$DEVICE_TYPE" ]]; then + DEVICE_TYPE=$(sonic-cfggen -d -v DEVICE_METADATA.localhost.type) + DEVICE_SUBTYPE=$(sonic-cfggen -d -v DEVICE_METADATA.localhost.subtype) fi +} - echo "Operation is only supported on Upstream SpineRouter." >&2 +declare -A prefix_type_devices +prefix_type_devices=( + ["ANCHOR_PREFIX"]="SpineRouter:UpstreamLC UpperSpineRouter" + ["SUPPRESS_PREFIX"]="" +) + +validate_device_for_type() { + local prefix_type=$1 + local allowed="${prefix_type_devices[$prefix_type]}" + [[ -z "$allowed" ]] && return + read_device_metadata + local device_id="$DEVICE_TYPE:$DEVICE_SUBTYPE" + for entry in $allowed; do + if [[ "$entry" == *":"* ]]; then + [[ "$device_id" == "$entry" ]] && return + else + [[ "$DEVICE_TYPE" == "$entry" ]] && return + fi + done + echo "Prefix type '$prefix_type' is not supported on device type '$DEVICE_TYPE' (subtype: '$DEVICE_SUBTYPE')." >&2 exit 1 } @@ -147,7 +167,7 @@ handle_prefix_list_single() { } prefix_list_operations=("add" "remove" "status") -supported_prefix_types=("ANCHOR_PREFIX") +supported_prefix_types=("ANCHOR_PREFIX" "SUPPRESS_PREFIX") # Main script execution if [[ "$1" == "-h" || "$1" == "--help" ]]; then display_help @@ -156,10 +176,12 @@ fi if [ "$1" != "status" ]; then check_root_privileges fi -check_spine_router skip_chassis_supervisor validate_operation $1 $2 +if [[ "$1" == "add" || "$1" == "remove" ]]; then + validate_device_for_type "$2" +fi # Read SONiC immutable variables [ -f /etc/sonic/sonic-environment ] && . /etc/sonic/sonic-environment diff --git a/dockers/docker-fpm-frr/docker_init.sh b/dockers/docker-fpm-frr/docker_init.sh index 94107846c7a..ca345a66665 100755 --- a/dockers/docker-fpm-frr/docker_init.sh +++ b/dockers/docker-fpm-frr/docker_init.sh @@ -63,26 +63,35 @@ if [ -z "$CONFIG_TYPE" ] || [ "$CONFIG_TYPE" == "separated" ]; then -t /usr/share/sonic/templates/bgpd/gen_bgpd.conf.j2,/etc/frr/bgpd.conf \ -t /usr/share/sonic/templates/zebra/zebra.conf.j2,/etc/frr/zebra.conf \ -t /usr/share/sonic/templates/staticd/gen_staticd.conf.j2,/etc/frr/staticd.conf \ + -t /usr/share/sonic/templates/sharpd/sharpd.conf.j2,/etc/frr/sharpd.conf \ " MGMT_FRAMEWORK_CONFIG=$(echo $FRR_VARS | jq -r '.frr_mgmt_framework_config') if [ -n "$MGMT_FRAMEWORK_CONFIG" ] && [ "$MGMT_FRAMEWORK_CONFIG" != "false" ]; then - CFGGEN_PARAMS="$CFGGEN_PARAMS \ - -t /usr/local/sonic/frrcfgd/bfdd.conf.j2,/etc/frr/bfdd.conf \ - -t /usr/local/sonic/frrcfgd/ospfd.conf.j2,/etc/frr/ospfd.conf \ + CFGGEN_PARAMS=" \ + -d \ + -y /etc/sonic/constants.yml \ + -T /usr/local/sonic/frrcfgd \ + -t /usr/share/sonic/templates/gen_frr.conf.j2,/etc/frr/frr.conf \ " + sonic-cfggen $CFGGEN_PARAMS + echo "service integrated-vtysh-config" > /etc/frr/vtysh.conf + rm -f /etc/frr/bgpd.conf /etc/frr/zebra.conf /etc/frr/staticd.conf \ + /etc/frr/bfdd.conf /etc/frr/ospfd.conf /etc/frr/pimd.conf \ + /etc/frr/sharpd.conf else rm -f /etc/frr/bfdd.conf /etc/frr/ospfd.conf + sonic-cfggen $CFGGEN_PARAMS + echo "no service integrated-vtysh-config" > /etc/frr/vtysh.conf + rm -f /etc/frr/frr.conf fi - sonic-cfggen $CFGGEN_PARAMS - echo "no service integrated-vtysh-config" > /etc/frr/vtysh.conf - rm -f /etc/frr/frr.conf elif [ "$CONFIG_TYPE" == "split" ]; then echo "no service integrated-vtysh-config" > /etc/frr/vtysh.conf rm -f /etc/frr/frr.conf write_default_zebra_config /etc/frr/zebra.conf elif [ "$CONFIG_TYPE" == "split-unified" ]; then echo "service integrated-vtysh-config" > /etc/frr/vtysh.conf - rm -f /etc/frr/bgpd.conf /etc/frr/zebra.conf /etc/frr/staticd.conf + rm -f /etc/frr/bgpd.conf /etc/frr/zebra.conf /etc/frr/staticd.conf \ + /etc/frr/sharpd.conf write_default_zebra_config /etc/frr/frr.conf elif [ "$CONFIG_TYPE" == "unified" ]; then CFGGEN_PARAMS=" \ @@ -94,22 +103,20 @@ elif [ "$CONFIG_TYPE" == "unified" ]; then sonic-cfggen $CFGGEN_PARAMS echo "service integrated-vtysh-config" > /etc/frr/vtysh.conf rm -f /etc/frr/bgpd.conf /etc/frr/zebra.conf /etc/frr/staticd.conf \ - /etc/frr/bfdd.conf /etc/frr/ospfd.conf /etc/frr/pimd.conf + /etc/frr/bfdd.conf /etc/frr/ospfd.conf /etc/frr/pimd.conf \ + /etc/frr/sharpd.conf fi chown -R frr:frr /etc/frr/ # Create sr0 interface for SRv6 support -SONIC_ASIC_TYPE=$(sed -n 's/^asic_type:[[:space:]]*//p' /etc/sonic/sonic_version.yml) -if [ "$SONIC_ASIC_TYPE" == "vpp" ]; then - if ! ip link show sr0 > /dev/null 2>&1; then - echo "Interface sr0 does not exist. Creating sr0..." - ip link add sr0 type dummy || true - else - echo "Interface sr0 already exists." - fi - ip link set sr0 up || true +if ! ip link show sr0 > /dev/null 2>&1; then + echo "Interface sr0 does not exist. Creating sr0..." + ip link add sr0 type dummy || true +else + echo "Interface sr0 already exists." fi +ip link set sr0 up || true chown root:root /usr/sbin/bgp-isolate chmod 0755 /usr/sbin/bgp-isolate diff --git a/dockers/docker-fpm-frr/frr/bgpd/bgpd.conf.j2 b/dockers/docker-fpm-frr/frr/bgpd/bgpd.conf.j2 index 85182e5430e..9b294111ba2 100644 --- a/dockers/docker-fpm-frr/frr/bgpd/bgpd.conf.j2 +++ b/dockers/docker-fpm-frr/frr/bgpd/bgpd.conf.j2 @@ -12,7 +12,9 @@ ! {% include "common/daemons.common.conf.j2" %} ! +{% if not (constants is defined and constants.frr is defined and constants.frr.enable_snmp_agent is defined and not constants.frr.enable_snmp_agent) %} agentx +{% endif %} ! {% if DEVICE_METADATA['localhost']['type'] == "SpineChassisFrontendRouter" %} {% include "bgpd.spine_chassis_frontend_router.conf.j2" %} diff --git a/dockers/docker-fpm-frr/frr/bgpd/bgpd.main.conf.j2 b/dockers/docker-fpm-frr/frr/bgpd/bgpd.main.conf.j2 index 788a08f7c06..f7f2dee0d91 100644 --- a/dockers/docker-fpm-frr/frr/bgpd/bgpd.main.conf.j2 +++ b/dockers/docker-fpm-frr/frr/bgpd/bgpd.main.conf.j2 @@ -14,6 +14,20 @@ ip prefix-list PL_LoopbackV4 permit {{ lo0_ipv4 }}/32 {% endif %} ! +{# Check if the device is a disaggregated T2 device #} +{% set disagg_t2 = "false" %} +{% if (DEVICE_METADATA is defined) and ('localhost' in DEVICE_METADATA) and ('type' in DEVICE_METADATA['localhost']) %} +{% if DEVICE_METADATA['localhost']['type'].lower() in ['lowerspinerouter', 'upperspinerouter', 'fabricspinerouter']%} +{% set disagg_t2 = "true" %} +{% endif%} +{% endif %} +{# Check if the device is a disaggregated Regional Hub device #} +{% set disagg_rh = "false" %} +{% if (DEVICE_METADATA is defined) and ('localhost' in DEVICE_METADATA) and ('type' in DEVICE_METADATA['localhost']) %} +{% if DEVICE_METADATA['localhost']['type'].lower() in ['lowerregionalhub', 'fabricregionalhub', 'upperregionalhub']%} +{% set disagg_rh = "true" %} +{% endif%} +{% endif %} {% if get_ipv6_loopback_address(LOOPBACK_INTERFACE, "Loopback0") != 'None' %} {% if ( ('localhost' in DEVICE_METADATA) and ('bgp_adv_lo_prefix_as_128' in DEVICE_METADATA['localhost']) and (DEVICE_METADATA['localhost']['bgp_adv_lo_prefix_as_128'] == 'true') ) %} @@ -61,6 +75,14 @@ route-map V6_CONNECTED_ROUTES permit 10 ! route-map HIDE_INTERNAL permit 10 set community no-export +{% if disagg_t2 == "true" %} +{% if constants.bgp.hide_internal_community is defined %} + on-match next +! +route-map HIDE_INTERNAL permit 20 + set community {{ constants.bgp.hide_internal_community }} additive +{% endif %} +{% endif %} {% if constants.bgp.peers is defined and constants.bgp.peers.internal is defined and constants.bgp.peers.internal.community is defined %} on-match next route-map HIDE_INTERNAL permit 20 @@ -72,6 +94,14 @@ route-map HIDE_INTERNAL permit 20 {% if (DEVICE_METADATA is defined) and ('localhost' in DEVICE_METADATA) and ('bgp_asn' in DEVICE_METADATA['localhost']) and (DEVICE_METADATA['localhost']['bgp_asn'].lower() != 'none') and (DEVICE_METADATA['localhost']['bgp_asn'].lower() != 'null') %} router bgp {{ DEVICE_METADATA['localhost']['bgp_asn'] }} ! +{% if disagg_t2 == "true" or disagg_rh == "true" %} +{% if (BGP_DEVICE_GLOBAL is defined) and ('CONFED' in BGP_DEVICE_GLOBAL) and ('asn' in BGP_DEVICE_GLOBAL['CONFED'] ) %} + bgp confederation identifier {{ BGP_DEVICE_GLOBAL['CONFED']['asn'] }} +{% endif %} +{% if (BGP_DEVICE_GLOBAL is defined) and ('CONFED' in BGP_DEVICE_GLOBAL) and ('peers' in BGP_DEVICE_GLOBAL['CONFED'] ) %} + bgp confederation peers {{ BGP_DEVICE_GLOBAL['CONFED']['peers'] | replace(';', ' ') }} +{% endif %} +{% endif %} {% block bgp_init %} bgp log-neighbor-changes bgp suppress-fib-pending @@ -91,6 +121,10 @@ router bgp {{ DEVICE_METADATA['localhost']['bgp_asn'] }} bgp graceful-restart preserve-fw-state bgp graceful-restart select-defer-time {{ constants.bgp.graceful_restart.select_defer_time | default(45) }} {% endif %} +{% if DEVICE_METADATA['localhost']['type'] == 'UpperRegionalHub' %} + bgp graceful-restart-disable + bgp long-lived-graceful-restart stale-time 864000 +{% endif %} ! {# set frr_bmp info #} {% if (FEATURE is defined) and diff --git a/dockers/docker-fpm-frr/frr/bgpd/suppress_prefix/add_suppress_prefix.conf.j2 b/dockers/docker-fpm-frr/frr/bgpd/suppress_prefix/add_suppress_prefix.conf.j2 new file mode 100644 index 00000000000..501d9dd91ad --- /dev/null +++ b/dockers/docker-fpm-frr/frr/bgpd/suppress_prefix/add_suppress_prefix.conf.j2 @@ -0,0 +1 @@ +{{ data.ipv }} prefix-list {{ data.prefix_list_name }} permit {{ data.prefix }} diff --git a/dockers/docker-fpm-frr/frr/bgpd/suppress_prefix/del_suppress_prefix.conf.j2 b/dockers/docker-fpm-frr/frr/bgpd/suppress_prefix/del_suppress_prefix.conf.j2 new file mode 100644 index 00000000000..efb817685da --- /dev/null +++ b/dockers/docker-fpm-frr/frr/bgpd/suppress_prefix/del_suppress_prefix.conf.j2 @@ -0,0 +1 @@ +no {{ data.ipv }} prefix-list {{ data.prefix_list_name }} permit {{ data.prefix }} diff --git a/dockers/docker-fpm-frr/frr/bgpd/templates/general/policies.conf.j2 b/dockers/docker-fpm-frr/frr/bgpd/templates/general/policies.conf.j2 index f15a1362f78..5305ccd813c 100644 --- a/dockers/docker-fpm-frr/frr/bgpd/templates/general/policies.conf.j2 +++ b/dockers/docker-fpm-frr/frr/bgpd/templates/general/policies.conf.j2 @@ -127,6 +127,7 @@ route-map TO_BGP_PEER_V6 permit 50 ! route-map TO_BGP_PEER_V6 permit 60 set comm-list LOCAL_ANCHOR_ROUTE_COMMUNITY delete + on-match next ! route-map TO_BGP_PEER_V4 permit 50 match ip address prefix-list ANCHOR_CONTRIBUTING_ROUTES @@ -135,6 +136,7 @@ route-map TO_BGP_PEER_V4 permit 50 ! route-map TO_BGP_PEER_V4 permit 60 set comm-list LOCAL_ANCHOR_ROUTE_COMMUNITY delete + on-match next ! {% endif %} {% endif %} diff --git a/dockers/docker-fpm-frr/frr/bgpd/templates/internal/additional_loopbacks.conf.j2 b/dockers/docker-fpm-frr/frr/bgpd/templates/internal/additional_loopbacks.conf.j2 new file mode 100644 index 00000000000..745178e4891 --- /dev/null +++ b/dockers/docker-fpm-frr/frr/bgpd/templates/internal/additional_loopbacks.conf.j2 @@ -0,0 +1 @@ +Loopback4096 diff --git a/dockers/docker-fpm-frr/frr/bgpd/templates/voq_chassis/instance.conf.j2 b/dockers/docker-fpm-frr/frr/bgpd/templates/voq_chassis/instance.conf.j2 index c40d3b84235..4c92ab8defe 100644 --- a/dockers/docker-fpm-frr/frr/bgpd/templates/voq_chassis/instance.conf.j2 +++ b/dockers/docker-fpm-frr/frr/bgpd/templates/voq_chassis/instance.conf.j2 @@ -9,7 +9,6 @@ {% elif neighbor_addr | ipv6 %} neighbor {{ neighbor_addr }} peer-group VOQ_CHASSIS_V6_PEER {% endif %} - neighbor {{ neighbor_addr }} remote-as {{ bgp_session['asn'] }} neighbor {{ neighbor_addr }} description {{ bgp_session['name'] }} neighbor {{ neighbor_addr }} timers 2 7 neighbor {{ neighbor_addr }} timers connect 10 diff --git a/dockers/docker-fpm-frr/frr/bgpd/templates/voq_chassis/peer-group.conf.j2 b/dockers/docker-fpm-frr/frr/bgpd/templates/voq_chassis/peer-group.conf.j2 index 802aa15ca60..5c4b756bf6a 100644 --- a/dockers/docker-fpm-frr/frr/bgpd/templates/voq_chassis/peer-group.conf.j2 +++ b/dockers/docker-fpm-frr/frr/bgpd/templates/voq_chassis/peer-group.conf.j2 @@ -2,7 +2,14 @@ ! template: bgpd/templates/voq_chassis/peer-group.conf.j2 ! neighbor VOQ_CHASSIS_V4_PEER peer-group + {% if 'bgp_asn' in CONFIG_DB__DEVICE_METADATA['localhost'] %} + neighbor VOQ_CHASSIS_V4_PEER remote-as {{ CONFIG_DB__DEVICE_METADATA['localhost']['bgp_asn'] }} + {% endif %} neighbor VOQ_CHASSIS_V6_PEER peer-group + {% if 'bgp_asn' in CONFIG_DB__DEVICE_METADATA['localhost'] %} + neighbor VOQ_CHASSIS_V6_PEER remote-as {{ CONFIG_DB__DEVICE_METADATA['localhost']['bgp_asn'] }} + {% endif %} + address-family ipv4 {% if CONFIG_DB__DEVICE_METADATA['localhost']['type'] == 'ToRRouter' %} neighbor VOQ_CHASSIS_V4_PEER allowas-in 1 diff --git a/dockers/docker-fpm-frr/frr/frr.conf.j2 b/dockers/docker-fpm-frr/frr/frr.conf.j2 index 11878f8db9a..2f77eb8bd84 100644 --- a/dockers/docker-fpm-frr/frr/frr.conf.j2 +++ b/dockers/docker-fpm-frr/frr/frr.conf.j2 @@ -9,7 +9,9 @@ {% include "common/daemons.common.conf.j2" %} {% from "common/functions.conf.j2" import get_ipv4_loopback_address, get_ipv6_loopback_address %} ! +{% if not (constants is defined and constants.frr is defined and constants.frr.enable_snmp_agent is defined and not constants.frr.enable_snmp_agent) %} agentx +{% endif %} ! {% include "zebra/zebra.interfaces.conf.j2" %} ! diff --git a/dockers/docker-fpm-frr/frr/sharpd/sharpd.conf.j2 b/dockers/docker-fpm-frr/frr/sharpd/sharpd.conf.j2 new file mode 100644 index 00000000000..e55d92f247e --- /dev/null +++ b/dockers/docker-fpm-frr/frr/sharpd/sharpd.conf.j2 @@ -0,0 +1,10 @@ +! +{% block banner %} +! =========== Managed by sonic-cfggen DO NOT edit manually! ==================== +! generated by templates/frr/sharpd.conf.j2 using config DB data +! file: sharpd.conf +! +{% endblock banner %} +! +{% include "common/daemons.common.conf.j2" %} +! diff --git a/dockers/docker-fpm-frr/frr/supervisord/supervisord.conf.common.j2 b/dockers/docker-fpm-frr/frr/supervisord/supervisord.conf.common.j2 new file mode 100644 index 00000000000..09512adec43 --- /dev/null +++ b/dockers/docker-fpm-frr/frr/supervisord/supervisord.conf.common.j2 @@ -0,0 +1,275 @@ +{# supervisord.conf.common.j2 — shared FRR supervisord programs + Included by both docker-fpm-frr (standalone) and docker-sonic-vs (via _INCLUDE_DOCKER). + + Variables (set before {% include %}): + frr_priority_base — base priority for FRR programs (default: 4) + use_dependent_startup — enable dependent_startup directives (default: false) + frr_wait_for — dependent_startup_wait_for for first FRR program (default: rsyslogd:running) +#} +{% set _pbase = frr_priority_base | default(4) %} +{% set _dep = use_dependent_startup | default(false) %} +{% set _wait = frr_wait_for | default("rsyslogd:running") %} + +[program:mgmtd] +command=/usr/lib/frr/mgmtd -A 127.0.0.1 -P 0 +priority={{ _pbase }} +autostart=false +autorestart=true +startsecs=0 +stdout_logfile=syslog +stderr_logfile=syslog +{% if _dep %} +dependent_startup=true +dependent_startup_wait_for={{ _wait }} +{% endif %} + +[program:zebra] +command=/usr/lib/frr/zebra -A 127.0.0.1 -s 90000000 -M dplane_fpm_sonic{{ ' -M snmp' if _snmp else '' }} --asic-offload=notify_on_offload +priority={{ _pbase }} +autostart=false +autorestart=false +startsecs=0 +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true +{% if _dep %} +dependent_startup=true +dependent_startup_wait_for={{ _wait }} +{% endif %} + +[program:zsocket] +command=/usr/bin/zsocket.sh +priority={{ _pbase }} +autostart=false +autorestart=false +startsecs=0 +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true +{% if _dep %} +dependent_startup=true +dependent_startup_wait_for=zebra:running +{% endif %} + +[program:staticd] +command=/usr/lib/frr/staticd -A 127.0.0.1 -P 0 +priority={{ _pbase }} +autostart=false +autorestart=false +startsecs=0 +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true +{% if _dep %} +dependent_startup=true +dependent_startup_wait_for=zsocket:exited +{% endif %} + +{% if DEVICE_METADATA is defined and DEVICE_METADATA.localhost.frr_mgmt_framework_config is defined and DEVICE_METADATA.localhost.frr_mgmt_framework_config == "true" %} +[program:bfdd] +command=/usr/lib/frr/bfdd -A 127.0.0.1 -P 0 +priority={{ _pbase }} +stopsignal=KILL +autostart=false +autorestart=false +startsecs=0 +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true +{% if _dep %} +dependent_startup=true +dependent_startup_wait_for=zebra:running +{% endif %} +{% endif %} + +[program:bgpd] +{% if FEATURE is defined and + ((FEATURE.frr_bmp is defined and FEATURE.frr_bmp.state is defined and FEATURE.frr_bmp.state == "enabled") or + (FEATURE.bmp is defined and FEATURE.bmp.state is defined and FEATURE.bmp.state == "enabled")) %} +command=/usr/lib/frr/bgpd -A 127.0.0.1 -P 0{{ ' -M snmp' if _snmp else '' }} -M bmp +{% else %} +command=/usr/lib/frr/bgpd -A 127.0.0.1 -P 0{{ ' -M snmp' if _snmp else '' }} +{% endif %} +priority={{ _pbase + 1 }} +stopsignal=KILL +autostart=false +autorestart=false +startsecs=0 +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true +{% if _dep %} +dependent_startup=true +dependent_startup_wait_for=zsocket:exited +{% endif %} + +{% if DEVICE_METADATA is defined and DEVICE_METADATA.localhost.frr_mgmt_framework_config is defined and DEVICE_METADATA.localhost.frr_mgmt_framework_config == "true" %} +[program:ospfd] +command=/usr/lib/frr/ospfd -A 127.0.0.1 -P 0{{ ' -M snmp' if _snmp else '' }} +priority={{ _pbase + 1 }} +stopsignal=KILL +autostart=false +autorestart=false +startsecs=0 +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true +{% if _dep %} +dependent_startup=true +dependent_startup_wait_for=zebra:running +{% endif %} + +[program:pimd] +command=/usr/lib/frr/pimd -A 127.0.0.1 -P 0 +priority={{ _pbase + 1 }} +stopsignal=KILL +autostart=false +autorestart=false +startsecs=0 +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true +{% if _dep %} +dependent_startup=true +dependent_startup_wait_for=zebra:running +{% endif %} +{% endif %} + +[program:fpmsyncd] +command=fpmsyncd +priority={{ _pbase + 2 }} +autostart=false +autorestart=false +startsecs=0 +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true +{% if _dep %} +dependent_startup=true +dependent_startup_wait_for=bgpd:running +{% endif %} +{% if ENABLE_ASAN is defined and ENABLE_ASAN == "y" %} +environment=ASAN_OPTIONS="log_path=/var/log/asan/fpmsyncd-asan.log{{ asan_extra_options }}" +{% endif %} + +{% if DEVICE_METADATA is defined and DEVICE_METADATA.localhost.frr_mgmt_framework_config is defined and DEVICE_METADATA.localhost.frr_mgmt_framework_config == "true" %} +[program:frrcfgd] +command=/usr/local/bin/frrcfgd +{% else %} +[program:bgpcfgd] +command=/usr/local/bin/bgpcfgd +{% endif %} +priority={{ _pbase + 2 }} +autostart=false +autorestart=false +startsecs=0 +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true +{% if _dep %} +dependent_startup=true +dependent_startup_wait_for=bgpd:running +{% endif %} + +{% if DEVICE_METADATA is not defined or DEVICE_METADATA.localhost.frr_mgmt_framework_config is not defined or DEVICE_METADATA.localhost.frr_mgmt_framework_config != "true" %} +[program:staticroutebfd] +command=/usr/local/bin/staticroutebfd +priority={{ _pbase + 2 }} +autostart=false +autorestart=true +startsecs=0 +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true +{% if _dep %} +dependent_startup=true +dependent_startup_wait_for=bgpd:running +{% endif %} + +[program:bgpmon] +command=/usr/local/bin/bgpmon +priority={{ _pbase + 2 }} +autostart=false +autorestart=true +startsecs=0 +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true +{% if _dep %} +dependent_startup=true +dependent_startup_wait_for=bgpd:running +{% endif %} +{% endif %} + +{% if SYSTEM_DEFAULTS is defined and SYSTEM_DEFAULTS.software_bfd is defined and SYSTEM_DEFAULTS.software_bfd.status is defined and SYSTEM_DEFAULTS.software_bfd.status == "enabled" %} +[program:bfdmon] +command=/usr/local/bin/bfdmon +priority={{ _pbase + 2 }} +autostart=true +autorestart=true +startsecs=0 +stdout_logfile=syslog +stderr_logfile=syslog +{% endif %} + +{% if DEVICE_METADATA is defined and DEVICE_METADATA.localhost.docker_routing_config_mode is defined and (DEVICE_METADATA.localhost.docker_routing_config_mode == "unified" or DEVICE_METADATA.localhost.docker_routing_config_mode == "split-unified") %} +[program:vtysh_b] +command=/usr/bin/vtysh -b +priority={{ _pbase + 2 }} +autostart=false +autorestart=false +startsecs=0 +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true +{% if _dep %} +dependent_startup=true +dependent_startup_wait_for=bgpd:running +{% endif %} +{% endif %} + +{% if WARM_RESTART is defined and WARM_RESTART.bgp is defined and WARM_RESTART.bgp.bgp_eoiu is defined and WARM_RESTART.bgp.bgp_eoiu == "true" %} +[program:bgp_eoiu_marker] +command=/usr/bin/bgp_eoiu_marker.py +priority={{ _pbase + 3 }} +autostart=false +autorestart=false +startsecs=0 +startretries=0 +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true +{% if _dep %} +dependent_startup=true +dependent_startup_wait_for=bgpd:running +{% endif %} +{% endif %} + +{% if DEVICE_METADATA is defined and DEVICE_METADATA.localhost.frr_mgmt_framework_config is defined and DEVICE_METADATA.localhost.frr_mgmt_framework_config == "true" %} +[program:pathd] +command=/usr/lib/frr/pathd -A 127.0.0.1 -P 0 +priority={{ _pbase + 1 }} +stopsignal=KILL +autostart=false +autorestart=false +startsecs=0 +stdout_logfile=syslog +stderr_logfile=syslog +{% if _dep %} +dependent_startup=true +dependent_startup_wait_for=zebra:running +{% endif %} +{% endif %} diff --git a/dockers/docker-fpm-frr/frr/supervisord/supervisord.conf.j2 b/dockers/docker-fpm-frr/frr/supervisord/supervisord.conf.j2 index 5a0ccb0de4d..075730b57c5 100644 --- a/dockers/docker-fpm-frr/frr/supervisord/supervisord.conf.j2 +++ b/dockers/docker-fpm-frr/frr/supervisord/supervisord.conf.j2 @@ -1,3 +1,4 @@ +{% set _snmp = not (constants is defined and constants.frr is defined and constants.frr.enable_snmp_agent is defined and not constants.frr.enable_snmp_agent) %} [supervisord] logfile_maxbytes=1MB logfile_backups=2 @@ -14,7 +15,7 @@ buffer_size=1024 [eventlistener:supervisor-proc-exit-listener] command=/usr/bin/supervisor-proc-exit-listener-rs --container-name bgp -events=PROCESS_STATE_EXITED,PROCESS_STATE_RUNNING +events=PROCESS_STATE_EXITED,PROCESS_STATE_RUNNING,PROCESS_STATE_FATAL autostart=true autorestart=unexpected buffer_size=1024 @@ -31,235 +32,7 @@ stderr_logfile=NONE stderr_syslog=true dependent_startup=true -[program:mgmtd] -command=/usr/lib/frr/mgmtd -A 127.0.0.1 -P 0 -priority=4 -autostart=false -autorestart=true -startsecs=0 -stdout_logfile=syslog -stderr_logfile=syslog -dependent_startup=true -dependent_startup_wait_for=rsyslogd:running - -[program:zebra] -command=/usr/lib/frr/zebra -A 127.0.0.1 -s 90000000 -M dplane_fpm_sonic -M snmp --asic-offload=notify_on_offload -priority=4 -autostart=false -autorestart=false -startsecs=0 -stdout_logfile=NONE -stdout_syslog=true -stderr_logfile=NONE -stderr_syslog=true -dependent_startup=true -dependent_startup_wait_for=rsyslogd:running - -[program:zsocket] -command=/usr/bin/zsocket.sh -priority=4 -autostart=false -autorestart=false -startsecs=0 -stdout_logfile=NONE -stdout_syslog=true -stderr_logfile=NONE -stderr_syslog=true -dependent_startup=true -dependent_startup_wait_for=zebra:running - -[program:staticd] -command=/usr/lib/frr/staticd -A 127.0.0.1 -P 0 -priority=4 -autostart=false -autorestart=false -startsecs=0 -stdout_logfile=NONE -stdout_syslog=true -stderr_logfile=NONE -stderr_syslog=true -dependent_startup=true -dependent_startup_wait_for=zsocket:exited - -{% if DEVICE_METADATA.localhost.frr_mgmt_framework_config is defined and DEVICE_METADATA.localhost.frr_mgmt_framework_config == "true" %} -[program:bfdd] -command=/usr/lib/frr/bfdd -A 127.0.0.1 -P 0 -priority=4 -stopsignal=KILL -autostart=false -autorestart=false -startsecs=0 -stdout_logfile=NONE -stdout_syslog=true -stderr_logfile=NONE -stderr_syslog=true -dependent_startup=true -dependent_startup_wait_for=zebra:running -{% endif %} - -[program:bgpd] -{% if FEATURE is defined and - (FEATURE.frr_bmp is defined and FEATURE.frr_bmp.state is defined and FEATURE.frr_bmp.state == "enabled") or - (FEATURE.bmp is defined and FEATURE.bmp.state is defined and FEATURE.bmp.state == "enabled") %} -command=/usr/lib/frr/bgpd -A 127.0.0.1 -P 0 -M snmp -M bmp -{% else %} -command=/usr/lib/frr/bgpd -A 127.0.0.1 -P 0 -M snmp -{% endif %} -priority=5 -stopsignal=KILL -autostart=false -autorestart=false -startsecs=0 -stdout_logfile=NONE -stdout_syslog=true -stderr_logfile=NONE -stderr_syslog=true -dependent_startup=true -dependent_startup_wait_for=zsocket:exited - -{% if DEVICE_METADATA.localhost.frr_mgmt_framework_config is defined and DEVICE_METADATA.localhost.frr_mgmt_framework_config == "true" %} -[program:ospfd] -command=/usr/lib/frr/ospfd -A 127.0.0.1 -P 0 -M snmp -priority=5 -stopsignal=KILL -autostart=false -autorestart=false -startsecs=0 -stdout_logfile=NONE -stdout_syslog=true -stderr_logfile=NONE -stderr_syslog=true -dependent_startup=true -dependent_startup_wait_for=zebra:running - -[program:pimd] -command=/usr/lib/frr/pimd -A 127.0.0.1 -P 0 -priority=5 -stopsignal=KILL -autostart=false -autorestart=false -startsecs=0 -stdout_logfile=NONE -stdout_syslog=true -stderr_logfile=NONE -stderr_syslog=true -dependent_startup=true -dependent_startup_wait_for=zebra:running -{% endif %} - -[program:fpmsyncd] -command=fpmsyncd -priority=6 -autostart=false -autorestart=false -startsecs=0 -stdout_logfile=NONE -stdout_syslog=true -stderr_logfile=NONE -stderr_syslog=true -dependent_startup=true -dependent_startup_wait_for=bgpd:running - -{% if DEVICE_METADATA.localhost.frr_mgmt_framework_config is defined and DEVICE_METADATA.localhost.frr_mgmt_framework_config == "true" %} -[program:frrcfgd] -command=/usr/local/bin/frrcfgd -{% else %} -[program:bgpcfgd] -command=/usr/local/bin/bgpcfgd -{% endif %} -priority=6 -autostart=false -autorestart=false -startsecs=0 -stdout_logfile=NONE -stdout_syslog=true -stderr_logfile=NONE -stderr_syslog=true -dependent_startup=true -dependent_startup_wait_for=bgpd:running - -{% if DEVICE_METADATA.localhost.frr_mgmt_framework_config is defined and DEVICE_METADATA.localhost.frr_mgmt_framework_config == "true" %} -{% else %} -[program:staticroutebfd] -command=/usr/local/bin/staticroutebfd -priority=6 -autostart=false -autorestart=true -startsecs=0 -stdout_logfile=NONE -stdout_syslog=true -stderr_logfile=NONE -stderr_syslog=true -dependent_startup=true -dependent_startup_wait_for=bgpd:running - -[program:bgpmon] -command=/usr/local/bin/bgpmon -priority=6 -autostart=false -autorestart=true -startsecs=0 -stdout_logfile=NONE -stdout_syslog=true -stderr_logfile=NONE -stderr_syslog=true -dependent_startup=true -dependent_startup_wait_for=bgpd:running - -{% endif %} - -{% if SYSTEM_DEFAULTS is defined and SYSTEM_DEFAULTS.software_bfd is defined and SYSTEM_DEFAULTS.software_bfd.status is defined and SYSTEM_DEFAULTS.software_bfd.status == "enabled" %} -[program:bfdmon] -command=/usr/local/bin/bfdmon -priority=6 -autostart=true -autorestart=true -startsecs=0 -stdout_logfile=syslog -stderr_logfile=syslog -{% endif %} - -{% if DEVICE_METADATA.localhost.docker_routing_config_mode is defined and (DEVICE_METADATA.localhost.docker_routing_config_mode == "unified" or DEVICE_METADATA.localhost.docker_routing_config_mode == "split-unified") %} -[program:vtysh_b] -command=/usr/bin/vtysh -b -priority=6 -autostart=false -autorestart=false -startsecs=0 -stdout_logfile=NONE -stdout_syslog=true -stderr_logfile=NONE -stderr_syslog=true -dependent_startup=true -dependent_startup_wait_for=bgpd:running -{% endif %} - -{% if WARM_RESTART is defined and WARM_RESTART.bgp is defined and WARM_RESTART.bgp.bgp_eoiu is defined and WARM_RESTART.bgp.bgp_eoiu == "true" %} -[program:bgp_eoiu_marker] -command=/usr/bin/bgp_eoiu_marker.py -priority=7 -autostart=false -autorestart=false -startsecs=0 -startretries=0 -stdout_logfile=NONE -stdout_syslog=true -stderr_logfile=NONE -stderr_syslog=true -dependent_startup=true -dependent_startup_wait_for=bgpd:running -{% endif %} - -{% if DEVICE_METADATA.localhost.frr_mgmt_framework_config is defined and DEVICE_METADATA.localhost.frr_mgmt_framework_config == "true" %} -[program:pathd] -command=/usr/lib/frr/pathd -A 127.0.0.1 -P 0 -priority=5 -stopsignal=KILL -autostart=false -autorestart=false -startsecs=0 -stdout_logfile=syslog -stderr_logfile=syslog -dependent_startup=true -dependent_startup_wait_for=zebra:running -{% endif %} +{% set frr_priority_base = 4 %} +{% set use_dependent_startup = true %} +{% set frr_wait_for = "rsyslogd:running" %} +{% include "supervisord.conf.common.j2" %} diff --git a/dockers/docker-fpm-gobgp/supervisord.conf b/dockers/docker-fpm-gobgp/supervisord.conf index 3db6783d97b..6b0949bb146 100644 --- a/dockers/docker-fpm-gobgp/supervisord.conf +++ b/dockers/docker-fpm-gobgp/supervisord.conf @@ -5,7 +5,7 @@ nodaemon=true [eventlistener:supervisor-proc-exit-listener] command=/usr/bin/supervisor-proc-exit-listener-rs --container-name bgp -events=PROCESS_STATE_EXITED,PROCESS_STATE_RUNNING +events=PROCESS_STATE_EXITED,PROCESS_STATE_RUNNING,PROCESS_STATE_FATAL autostart=true autorestart=unexpected buffer_size=1024 diff --git a/dockers/docker-gnmi-sidecar/Dockerfile.j2 b/dockers/docker-gnmi-sidecar/Dockerfile.j2 index f33b6d5ae62..64a9ffdc123 100644 --- a/dockers/docker-gnmi-sidecar/Dockerfile.j2 +++ b/dockers/docker-gnmi-sidecar/Dockerfile.j2 @@ -1,5 +1,5 @@ {% from "dockers/dockerfile-macros.j2" import rsync_from_builder_stage %} -ARG BASE=docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} +ARG BASE=docker-config-engine-trixie-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} FROM $BASE AS base @@ -27,6 +27,8 @@ RUN chmod +x /usr/bin/systemd_stub.py /usr/share/sonic/scripts/k8s_pod_control.s FROM $BASE +ARG image_version + {{ rsync_from_builder_stage() }} # Make apt-get non-interactive diff --git a/dockers/docker-gnmi-sidecar/cli-plugin-tests/test_systemd_stub.py b/dockers/docker-gnmi-sidecar/cli-plugin-tests/test_systemd_stub.py index 689c257113c..3569cb06cf9 100644 --- a/dockers/docker-gnmi-sidecar/cli-plugin-tests/test_systemd_stub.py +++ b/dockers/docker-gnmi-sidecar/cli-plugin-tests/test_systemd_stub.py @@ -92,6 +92,8 @@ def ss(tmp_path, monkeypatch): commands = [] # ----- Fake run_nsenter for host operations (patch on sidecar_common) ----- + mktemp_counter = {"n": 0} + def fake_run_nsenter(args, *, text=True, input_bytes=None): commands.append(("nsenter", tuple(args))) @@ -105,6 +107,17 @@ def fake_run_nsenter(args, *, text=True, input_bytes=None): return 0, out, b"" return 1, "" if text else b"", "No such file" if text else b"No such file" + # /bin/mktemp + if args[:1] == ["/bin/mktemp"] and len(args) == 2: + template = args[1] + mktemp_counter["n"] += 1 + unique = template.replace("XXXXXX", f"{mktemp_counter['n']:06d}") + host_fs[unique] = b"" + out = unique + "\n" + if text: + return 0, out, "" + return 0, out.encode(), b"" + # /bin/sh -c "cat > /tmp/xxx" if ( len(args) == 3 @@ -153,6 +166,10 @@ def fake_read_file_bytes_local(path: str): # Now import systemd_stub (it will use patched sidecar_common) ss = importlib.import_module("systemd_stub") + # Reset the one-shot cleanup flag so each test starts fresh + ss._stale_unit_cleaned = False + monkeypatch.setattr(ss, "_STALE_UNIT_CLEANUP_ENABLED", True) + # Isolate POST_COPY_ACTIONS monkeypatch.setattr(ss, "POST_COPY_ACTIONS", {}, raising=True) @@ -258,29 +275,107 @@ def test_env_controls_gnmi_src_default(monkeypatch): assert ss._GNMI_SRC.endswith("gnmi.sh") -def test_gnmi_service_syncs_to_host_when_different(ss): - ss, container_fs, host_fs, commands = ss +# ─────────────────────────── Tests for stale gnmi.service cleanup ─────────────────────────── - # Prepare container unit content and host old content - container_fs[ss.CONTAINER_GNMI_SERVICE] = b"UNIT-NEW" - host_fs[ss.HOST_GNMI_SERVICE] = b"UNIT-OLD" +STALE_UNIT = b"""[Unit] +Description=GNMI container - # Only include the gnmi service item to make the assertion clear - ss.SYNC_ITEMS[:] = [ - ss.SyncItem(ss.CONTAINER_GNMI_SERVICE, ss.HOST_GNMI_SERVICE, 0o644) - ] +[Service] +User=root +ExecStartPre=/usr/local/bin/gnmi.sh start +ExecStart=/usr/local/bin/gnmi.sh wait +""" - # Add post actions for gnmi.service - ss.POST_COPY_ACTIONS[ss.HOST_GNMI_SERVICE] = [ - ["sudo", "systemctl", "daemon-reload"], - ["sudo", "systemctl", "restart", "gnmi"], - ] +CLEAN_UNIT = b"""[Unit] +Description=GNMI container - ok = ss.ensure_sync() - assert ok is True - assert host_fs[ss.HOST_GNMI_SERVICE] == b"UNIT-NEW" +[Service] +User=admin +ExecStartPre=/usr/local/bin/gnmi.sh start +ExecStart=/usr/local/bin/gnmi.sh wait +""" + + +def test_cleanup_stale_unit_restores_from_packed_file(ss): + """When host gnmi.service has User=root, cleanup overwrites it with the packed clean file.""" + ss_mod, container_fs, host_fs, commands = ss + host_fs[ss_mod._HOST_GNMI_SERVICE] = STALE_UNIT + container_fs[ss_mod._CONTAINER_GNMI_SERVICE] = CLEAN_UNIT + + ss_mod._cleanup_stale_service_unit() - # Verify systemctl actions were invoked + # Host file should now be the clean version + assert host_fs[ss_mod._HOST_GNMI_SERVICE] == CLEAN_UNIT + # daemon-reload and restart should follow post_cmds = [args for _, args in commands if args and args[0] == "sudo"] assert ("sudo", "systemctl", "daemon-reload") in post_cmds assert ("sudo", "systemctl", "restart", "gnmi") in post_cmds + + +def test_cleanup_skips_when_user_admin(ss): + """When host gnmi.service already has User=admin, cleanup is a no-op.""" + ss_mod, container_fs, host_fs, commands = ss + host_fs[ss_mod._HOST_GNMI_SERVICE] = CLEAN_UNIT + + ss_mod._cleanup_stale_service_unit() + + # No write should have occurred + write_cmds = [args for _, args in commands if args and args[0] == "/bin/sh"] + assert len(write_cmds) == 0 + + +def test_cleanup_skips_when_file_missing(ss): + """When host gnmi.service doesn't exist, cleanup is a no-op.""" + ss_mod, container_fs, host_fs, commands = ss + # Don't put the file in host_fs + + ss_mod._cleanup_stale_service_unit() + + write_cmds = [args for _, args in commands if args and args[0] == "/bin/sh"] + assert len(write_cmds) == 0 + + +def test_cleanup_runs_only_once(ss): + """The cleanup is a one-shot; second call should be a no-op.""" + ss_mod, container_fs, host_fs, commands = ss + host_fs[ss_mod._HOST_GNMI_SERVICE] = STALE_UNIT + container_fs[ss_mod._CONTAINER_GNMI_SERVICE] = CLEAN_UNIT + + ss_mod._cleanup_stale_service_unit() + assert host_fs[ss_mod._HOST_GNMI_SERVICE] == CLEAN_UNIT + + # Revert host to stale to prove second call is a no-op + host_fs[ss_mod._HOST_GNMI_SERVICE] = STALE_UNIT + ss_mod._cleanup_stale_service_unit() + # Should still be stale because the flag prevented re-run + assert host_fs[ss_mod._HOST_GNMI_SERVICE] == STALE_UNIT + + +def test_cleanup_retries_after_transient_read_failure(ss): + """When host_read_bytes fails transiently, cleanup retries on the next call.""" + ss_mod, container_fs, host_fs, commands = ss + container_fs[ss_mod._CONTAINER_GNMI_SERVICE] = CLEAN_UNIT + # First call: host file missing (transient failure) + + ss_mod._cleanup_stale_service_unit() + assert ss_mod._stale_unit_cleaned is False # flag NOT set; will retry + + # Second call: host file now present with stale content + host_fs[ss_mod._HOST_GNMI_SERVICE] = STALE_UNIT + ss_mod._cleanup_stale_service_unit() + assert host_fs[ss_mod._HOST_GNMI_SERVICE] == CLEAN_UNIT + assert ss_mod._stale_unit_cleaned is True + + +def test_cleanup_disabled_by_env(ss, monkeypatch): + """When STALE_UNIT_CLEANUP_ENABLED=false, cleanup is skipped entirely.""" + ss_mod, container_fs, host_fs, commands = ss + monkeypatch.setattr(ss_mod, "_STALE_UNIT_CLEANUP_ENABLED", False) + host_fs[ss_mod._HOST_GNMI_SERVICE] = STALE_UNIT + container_fs[ss_mod._CONTAINER_GNMI_SERVICE] = CLEAN_UNIT + + ss_mod._cleanup_stale_service_unit() + # File should NOT be overwritten + assert host_fs[ss_mod._HOST_GNMI_SERVICE] == STALE_UNIT + # Flag set so it won't retry + assert ss_mod._stale_unit_cleaned is True diff --git a/dockers/docker-gnmi-sidecar/systemd_scripts/gnmi.service b/dockers/docker-gnmi-sidecar/systemd_scripts/gnmi.service index caba3b24f02..8105b54a51e 100644 --- a/dockers/docker-gnmi-sidecar/systemd_scripts/gnmi.service +++ b/dockers/docker-gnmi-sidecar/systemd_scripts/gnmi.service @@ -8,12 +8,8 @@ StartLimitIntervalSec=1200 StartLimitBurst=3 [Service] -Type=simple -User=root +User=admin ExecStartPre=/usr/local/bin/gnmi.sh start ExecStart=/usr/local/bin/gnmi.sh wait ExecStop=/usr/local/bin/gnmi.sh stop RestartSec=30 -TimeoutStartSec=30s -TimeoutStopSec=30s -Restart=always diff --git a/dockers/docker-gnmi-sidecar/systemd_scripts/gnmi.sh b/dockers/docker-gnmi-sidecar/systemd_scripts/gnmi.sh index ed0c8d60323..f06e5b97825 100644 --- a/dockers/docker-gnmi-sidecar/systemd_scripts/gnmi.sh +++ b/dockers/docker-gnmi-sidecar/systemd_scripts/gnmi.sh @@ -1,3 +1,3 @@ #!/bin/bash -# Thin wrapper for GNMI pod control - uses shared k8s_pod_control.sh -exec /usr/share/sonic/scripts/k8s_pod_control.sh gnmi "$@" +# Thin wrapper for GNMI pod control - uses sidecar-specific k8s_pod_control.sh +exec /usr/share/sonic/scripts/docker-gnmi-sidecar/k8s_pod_control.sh gnmi "$@" diff --git a/dockers/docker-gnmi-sidecar/systemd_stub.py b/dockers/docker-gnmi-sidecar/systemd_stub.py index 9548dbb1c7d..c98b125a481 100644 --- a/dockers/docker-gnmi-sidecar/systemd_stub.py +++ b/dockers/docker-gnmi-sidecar/systemd_stub.py @@ -10,13 +10,11 @@ from typing import List from sonic_py_common.sidecar_common import ( - get_bool_env_var, logger, SyncItem, sync_items, SYNC_INTERVAL_S + get_bool_env_var, logger, SyncItem, run_nsenter, + read_file_bytes_local, host_read_bytes, host_write_atomic, + sync_items, SYNC_INTERVAL_S ) -# ───────────── gnmi.service sync paths ───────────── -CONTAINER_GNMI_SERVICE = "/usr/share/sonic/systemd_scripts/gnmi.service" -HOST_GNMI_SERVICE = "/lib/systemd/system/gnmi.service" - IS_V1_ENABLED = get_bool_env_var("IS_V1_ENABLED", default=False) logger.log_notice(f"IS_V1_ENABLED={IS_V1_ENABLED}") @@ -31,15 +29,10 @@ SYNC_ITEMS: List[SyncItem] = [ SyncItem(_GNMI_SRC, "/usr/local/bin/gnmi.sh"), SyncItem("/usr/share/sonic/systemd_scripts/container_checker", "/bin/container_checker"), - SyncItem("/usr/share/sonic/scripts/k8s_pod_control.sh", "/usr/share/sonic/scripts/k8s_pod_control.sh"), - SyncItem(CONTAINER_GNMI_SERVICE, HOST_GNMI_SERVICE, mode=0o644), + SyncItem("/usr/share/sonic/scripts/k8s_pod_control.sh", "/usr/share/sonic/scripts/docker-gnmi-sidecar/k8s_pod_control.sh"), ] POST_COPY_ACTIONS = { - "/lib/systemd/system/gnmi.service": [ - ["sudo", "systemctl", "daemon-reload"], - ["sudo", "systemctl", "restart", "gnmi"], - ], "/usr/local/bin/gnmi.sh": [ ["sudo", "docker", "stop", "gnmi"], ["sudo", "docker", "rm", "gnmi"], @@ -50,10 +43,64 @@ ["sudo", "systemctl", "daemon-reload"], ["sudo", "systemctl", "restart", "monit"], ], + "/usr/share/sonic/scripts/docker-gnmi-sidecar/k8s_pod_control.sh": [ + ["sudo", "systemctl", "daemon-reload"], + ["sudo", "systemctl", "restart", "gnmi"], + ], } +# Previous sidecar versions overwrote /lib/systemd/system/gnmi.service +# with a variant containing "User=root" (needed for kubectl). Now that kubectl +# is gone we no longer sync that file, but hosts upgraded from the old sidecar +# still carry the stale unit. This one-shot cleanup restores the original +# build-template version (User=admin) packed inside this container. +_CONTAINER_GNMI_SERVICE = "/usr/share/sonic/systemd_scripts/gnmi.service" +_HOST_GNMI_SERVICE = "/lib/systemd/system/gnmi.service" +_STALE_UNIT_CLEANUP_ENABLED = get_bool_env_var("STALE_UNIT_CLEANUP_ENABLED", default=True) +_stale_unit_cleaned = False + + +def _cleanup_stale_service_unit() -> None: + """If the host gnmi.service still has User=root from a prior sidecar, restore it.""" + global _stale_unit_cleaned + if _stale_unit_cleaned: + return + if not _STALE_UNIT_CLEANUP_ENABLED: + _stale_unit_cleaned = True + return + + host_bytes = host_read_bytes(_HOST_GNMI_SERVICE) + if host_bytes is None: + return # transient failure or file missing; retry next cycle + + host_content = host_bytes.decode("utf-8", errors="ignore") + if "\nUser=root\n" not in f"\n{host_content}\n": + _stale_unit_cleaned = True # unit is clean; no further retries needed + return + + clean_bytes = read_file_bytes_local(_CONTAINER_GNMI_SERVICE) + if clean_bytes is None: + logger.log_error(f"Cannot read restore file {_CONTAINER_GNMI_SERVICE}") + return # container file missing; retry next cycle + + logger.log_notice("Stale sidecar gnmi.service detected (User=root); restoring from packed file") + if not host_write_atomic(_HOST_GNMI_SERVICE, clean_bytes, 0o644): + logger.log_error("Failed to restore gnmi.service") + return # write failed; retry next cycle + rc, _, err = run_nsenter(["sudo", "systemctl", "daemon-reload"]) + if rc != 0: + logger.log_error(f"daemon-reload failed after gnmi.service restore: {err}") + return # retry next cycle + rc, _, err = run_nsenter(["sudo", "systemctl", "restart", "gnmi"]) + if rc != 0: + logger.log_error(f"gnmi restart failed after gnmi.service restore: {err}") + return # retry next cycle + _stale_unit_cleaned = True + logger.log_notice("Restored gnmi.service and restarted") + def ensure_sync() -> bool: + _cleanup_stale_service_unit() return sync_items(SYNC_ITEMS, POST_COPY_ACTIONS) diff --git a/dockers/docker-gnmi-watchdog/Dockerfile.j2 b/dockers/docker-gnmi-watchdog/Dockerfile.j2 index 0cb339f056f..42cde56b932 100644 --- a/dockers/docker-gnmi-watchdog/Dockerfile.j2 +++ b/dockers/docker-gnmi-watchdog/Dockerfile.j2 @@ -1,4 +1,4 @@ -FROM docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} AS builder +FROM docker-config-engine-trixie-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} AS builder # Update apt's cache of available packages RUN apt-get update && apt-get install -y \ @@ -18,7 +18,7 @@ COPY watchdog/ ./ # Build from within /watchdog RUN cargo build --release -FROM docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} +FROM docker-config-engine-trixie-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} ARG docker_container_name ARG image_version diff --git a/dockers/docker-gnmi-watchdog/watchdog/Cargo.lock b/dockers/docker-gnmi-watchdog/watchdog/Cargo.lock new file mode 100644 index 00000000000..2e28d6c6a77 --- /dev/null +++ b/dockers/docker-gnmi-watchdog/watchdog/Cargo.lock @@ -0,0 +1,284 @@ +# This file is automatically @generated by Cargo. +# It is not intended for manual editing. +version = 4 + +[[package]] +name = "android_system_properties" +version = "0.1.5" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "819e7219dbd41043ac279b19830f2efc897156490d7fd6ea916720117ee66311" +dependencies = [ + "libc", +] + +[[package]] +name = "autocfg" +version = "1.5.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "c08606f8c3cbf4ce6ec8e28fb0014a2c086708fe954eaa885384a6165172e7e8" + +[[package]] +name = "bumpalo" +version = "3.20.2" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "5d20789868f4b01b2f2caec9f5c4e0213b41e3e5702a50157d699ae31ced2fcb" + +[[package]] +name = "cc" +version = "1.2.58" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = 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b/dockers/docker-iccpd/Dockerfile.j2 index 3ab39355f37..3cdd22614e7 100644 --- a/dockers/docker-iccpd/Dockerfile.j2 +++ b/dockers/docker-iccpd/Dockerfile.j2 @@ -1,5 +1,5 @@ {% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files, rsync_from_builder_stage %} -ARG BASE=docker-swss-layer-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} +ARG BASE=docker-swss-layer-trixie-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} FROM $BASE AS base diff --git a/dockers/docker-lldp/Dockerfile.common.j2 b/dockers/docker-lldp/Dockerfile.common.j2 new file mode 100644 index 00000000000..3cf79e8681d --- /dev/null +++ b/dockers/docker-lldp/Dockerfile.common.j2 @@ -0,0 +1,9 @@ +{# LLDP feature - shared Dockerfile fragment included by docker-lldp and docker-sonic-vs #} +{# When included via --build-context, set copy_from="lldp" to use COPY --from=lldp #} +{% set _from = "--from=" + copy_from + " " if copy_from is defined else "" %} +COPY {{ _from }}["waitfor_lldp_ready.sh", "/usr/bin/"] +COPY {{ _from }}["lldpd.conf.j2", "/usr/share/sonic/templates/"] +COPY {{ _from }}["lldpdSysDescr.conf.j2", "/usr/share/sonic/templates/"] +COPY {{ _from }}["lldpd", "/etc/default/"] +COPY {{ _from }}["lldpmgrd", "/usr/bin/"] +RUN chmod +x /usr/bin/lldpmgrd /usr/bin/waitfor_lldp_ready.sh diff --git a/dockers/docker-lldp/Dockerfile.j2 b/dockers/docker-lldp/Dockerfile.j2 index 38c02b84e7a..f8d5a9b351e 100644 --- a/dockers/docker-lldp/Dockerfile.j2 +++ b/dockers/docker-lldp/Dockerfile.j2 @@ -1,5 +1,5 @@ {% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files, rsync_from_builder_stage %} -ARG BASE=docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} +ARG BASE=docker-config-engine-trixie-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} FROM $BASE AS base @@ -33,16 +33,15 @@ RUN apt-get update COPY ["docker-lldp-init.sh", "/usr/bin/"] COPY ["start.sh", "/usr/bin/"] -COPY ["waitfor_lldp_ready.sh", "/usr/bin/"] COPY ["supervisord.conf.j2", "/usr/share/sonic/templates/"] -COPY ["lldpd.conf.j2", "/usr/share/sonic/templates/"] -COPY ["lldpdSysDescr.conf.j2", "/usr/share/sonic/templates/"] -COPY ["lldpd", "/etc/default/"] -COPY ["lldpmgrd", "/usr/bin/"] +COPY ["supervisord.conf.common.j2", "/usr/share/sonic/templates/"] +{% include "Dockerfile.common.j2" %} COPY ["critical_processes", "/etc/supervisor"] FROM $BASE +ARG image_version + {{ rsync_from_builder_stage() }} # Pass the image_version to container diff --git a/dockers/docker-lldp/lldpd.conf.j2 b/dockers/docker-lldp/lldpd.conf.j2 index 59d20f47756..59106e0b7ee 100644 --- a/dockers/docker-lldp/lldpd.conf.j2 +++ b/dockers/docker-lldp/lldpd.conf.j2 @@ -5,6 +5,10 @@ {% if mgmt_if.update({'port_name' : mgmt_name}) %} {% endif %} {% if mgmt_if.update({'ipv4' : mgmt_prefix|ip}) %} {% endif %} {% endif %} +{% if mgmt_prefix|ipv6 and (mgmt_if.ipv4 is not defined) %} +{% if mgmt_if.update({'port_name' : mgmt_name}) %} {% endif %} +{% if mgmt_if.update({'ipv6' : mgmt_prefix|ip}) %} {% endif %} +{% endif %} {% endfor %} {% endif %} {% if mgmt_if %} @@ -16,8 +20,14 @@ configure ports eth0 lldp portidsubtype local {{ MGMT_PORT[mgmt_if.port_name].al configure ports eth0 lldp portidsubtype local {{ mgmt_if.port_name }} {% endif %} {% endif %} +{% if mgmt_if.ipv4 %} configure system ip management pattern {{ mgmt_if.ipv4 }} +{% elif mgmt_if.ipv6 %} +configure system ip management pattern {{ mgmt_if.ipv6 }} +{% endif %} {% endif %} configure system hostname {{ DEVICE_METADATA['localhost']['hostname'] }} +{# Use ifname globally to avoid MAC-as-Port-ID; lldpmgrd sets alias per port later. #} +configure lldp portidsubtype ifname {# pause lldpd operations until all interfaces are well configured, resume command will run in lldpmgrd #} pause diff --git a/dockers/docker-lldp/lldpmgrd b/dockers/docker-lldp/lldpmgrd index e8288e1c941..eaacb82eb49 100755 --- a/dockers/docker-lldp/lldpmgrd +++ b/dockers/docker-lldp/lldpmgrd @@ -81,6 +81,9 @@ class LldpManager(daemon_base.DaemonBase): self.port_init_done = False def update_hostname(self, hostname): + if not hostname: + self.log_warning("Ignoring invalid hostname: '{}'".format(hostname)) + return cmd = ["lldpcli", "configure", "system", "hostname", hostname] self.log_debug("Running command: '{}'".format(cmd)) @@ -244,12 +247,11 @@ class LldpManager(daemon_base.DaemonBase): def lldp_process_device_table_event(self, op, device_dict, key): if not op in ["SET", "DEL"]: return + if key != "localhost": + return self.log_info("Device Config Opcode: {} Dict {} Key {}".format(op, device_dict, key)) - try: - hostname = device_dict["chassis_hostname"] - except: - hostname = device_dict.get("hostname") - if not self.hostname == hostname: + hostname = device_dict.get("chassis_hostname") or device_dict.get("hostname") + if hostname and not self.hostname == hostname: self.log_info("Hostname changed old {0}, new {1}".format(self.hostname, hostname)) self.update_hostname(hostname) diff --git a/dockers/docker-lldp/supervisord.conf.common.j2 b/dockers/docker-lldp/supervisord.conf.common.j2 new file mode 100644 index 00000000000..6550dfc01aa --- /dev/null +++ b/dockers/docker-lldp/supervisord.conf.common.j2 @@ -0,0 +1,61 @@ +{# LLDP supervisord programs - shared between docker-lldp and docker-sonic-vs #} +{# Set lldp_priority_base before including to control priority numbering #} +{% set _pbase = lldp_priority_base | default(3) %} + +[program:lldpd] +# https://github.com/vincentbernat/lldpd/commit/9856f2792c301116cc4a3fcfba91b9672ee5db1f +# - `-d` means to stay in foreground, log to syslog +# - `-dd` means to stay in foreground, log warnings to console +# - `-ddd` means to stay in foreground, log warnings and info to console +# - `-dddd` means to stay in foreground, log all to console +{% if namespace_id is defined and namespace_id|length %} +command=/usr/sbin/lldpd -d -I Ethernet[0-9]* -C Ethernet[0-9]* +{% else %} +command=/usr/sbin/lldpd -d -I Ethernet[0-9]*,eth0 -C eth0 +{% endif %} +priority={{ _pbase }} +autostart=false +autorestart=false +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true +dependent_startup=true +dependent_startup_wait_for=start:exited + +[program:waitfor_lldp_ready] +command=/usr/bin/waitfor_lldp_ready.sh +priority={{ _pbase }} +autostart=false +autorestart=false +startsecs=0 +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true +dependent_startup=true +dependent_startup_wait_for=lldpd:running + +[program:lldp-syncd] +command=/usr/bin/env python3 -m lldp_syncd +priority={{ _pbase + 1 }} +autostart=false +autorestart=false +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true +dependent_startup=true +dependent_startup_wait_for=waitfor_lldp_ready:exited + +[program:lldpmgrd] +command=/usr/bin/lldpmgrd +priority={{ _pbase + 2 }} +autostart=false +autorestart=false +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true +dependent_startup=true +dependent_startup_wait_for=lldp-syncd:running diff --git a/dockers/docker-lldp/supervisord.conf.j2 b/dockers/docker-lldp/supervisord.conf.j2 index 544f9321304..6123b3a4193 100644 --- a/dockers/docker-lldp/supervisord.conf.j2 +++ b/dockers/docker-lldp/supervisord.conf.j2 @@ -14,7 +14,7 @@ buffer_size=1024 [eventlistener:supervisor-proc-exit-listener] command=/usr/bin/supervisor-proc-exit-listener-rs --container-name lldp -events=PROCESS_STATE_EXITED,PROCESS_STATE_RUNNING +events=PROCESS_STATE_EXITED,PROCESS_STATE_RUNNING,PROCESS_STATE_FATAL autostart=true autorestart=unexpected buffer_size=1024 @@ -43,60 +43,6 @@ stderr_syslog=true dependent_startup=true dependent_startup_wait_for=rsyslogd:running -[program:lldpd] -# https://github.com/vincentbernat/lldpd/commit/9856f2792c301116cc4a3fcfba91b9672ee5db1f -# - `-d` means to stay in foreground, log to syslog -# - `-dd` means to stay in foreground, log warnings to console -# - `-ddd` means to stay in foreground, log warnings and info to console -# - `-dddd` means to stay in foreground, log all to console -{% if namespace_id is defined and namespace_id|length %} -command=/usr/sbin/lldpd -d -I Ethernet[0-9]* -C Ethernet[0-9]* -{% else %} -command=/usr/sbin/lldpd -d -I Ethernet[0-9]*,eth0 -C eth0 -{% endif %} -priority=3 -autostart=false -autorestart=false -stdout_logfile=NONE -stdout_syslog=true -stderr_logfile=NONE -stderr_syslog=true -dependent_startup=true -dependent_startup_wait_for=start:exited - -[program:waitfor_lldp_ready] -command=/usr/bin/waitfor_lldp_ready.sh -priority=3 -autostart=false -autorestart=false -startsecs=0 -stdout_logfile=NONE -stdout_syslog=true -stderr_logfile=NONE -stderr_syslog=true -dependent_startup=true -dependent_startup_wait_for=lldpd:running - -[program:lldp-syncd] -command=/usr/bin/env python3 -m lldp_syncd -priority=4 -autostart=false -autorestart=false -stdout_logfile=NONE -stdout_syslog=true -stderr_logfile=NONE -stderr_syslog=true -dependent_startup=true -dependent_startup_wait_for=waitfor_lldp_ready:exited - -[program:lldpmgrd] -command=/usr/bin/lldpmgrd -priority=5 -autostart=false -autorestart=false -stdout_logfile=NONE -stdout_syslog=true -stderr_logfile=NONE -stderr_syslog=true -dependent_startup=true -dependent_startup_wait_for=lldp-syncd:running +{% set lldp_priority_base = 3 %} +{% set use_dependent_startup = true %} +{% include "supervisord.conf.common.j2" %} diff --git a/dockers/docker-macsec/Dockerfile.j2 b/dockers/docker-macsec/Dockerfile.j2 index 8df6c927e7e..cf050e741f6 100644 --- a/dockers/docker-macsec/Dockerfile.j2 +++ b/dockers/docker-macsec/Dockerfile.j2 @@ -1,5 +1,5 @@ {% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files, rsync_from_builder_stage %} -ARG BASE=docker-swss-layer-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} +ARG BASE=docker-swss-layer-trixie-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} FROM $BASE AS base diff --git a/dockers/docker-macsec/supervisord.conf b/dockers/docker-macsec/supervisord.conf index 92f88056e86..835042acda7 100644 --- a/dockers/docker-macsec/supervisord.conf +++ b/dockers/docker-macsec/supervisord.conf @@ -14,7 +14,7 @@ buffer_size=1024 [eventlistener:supervisor-proc-exit-listener] command=/usr/bin/supervisor-proc-exit-listener-rs --container-name macsec -events=PROCESS_STATE_EXITED,PROCESS_STATE_RUNNING +events=PROCESS_STATE_EXITED,PROCESS_STATE_RUNNING,PROCESS_STATE_FATAL autostart=true autorestart=unexpected buffer_size=1024 diff --git a/dockers/docker-mux/Dockerfile.j2 b/dockers/docker-mux/Dockerfile.j2 index cf44652ba7d..063acf7395a 100755 --- a/dockers/docker-mux/Dockerfile.j2 +++ b/dockers/docker-mux/Dockerfile.j2 @@ -1,5 +1,5 @@ {% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files, rsync_from_builder_stage %} -ARG BASE=docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} +ARG BASE=docker-config-engine-trixie-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} FROM $BASE AS base diff --git a/dockers/docker-mux/supervisord.conf b/dockers/docker-mux/supervisord.conf index 609d1e708b7..477b25485bb 100644 --- a/dockers/docker-mux/supervisord.conf +++ b/dockers/docker-mux/supervisord.conf @@ -14,7 +14,7 @@ buffer_size=100 [eventlistener:supervisor-proc-exit-listener] command=/usr/bin/supervisor-proc-exit-listener-rs --container-name mux -events=PROCESS_STATE_EXITED,PROCESS_STATE_RUNNING +events=PROCESS_STATE_EXITED,PROCESS_STATE_RUNNING,PROCESS_STATE_FATAL autostart=true autorestart=unexpected diff --git a/dockers/docker-nat/Dockerfile.j2 b/dockers/docker-nat/Dockerfile.j2 index 90e52f0c824..c59c61ff766 100644 --- a/dockers/docker-nat/Dockerfile.j2 +++ b/dockers/docker-nat/Dockerfile.j2 @@ -1,5 +1,5 @@ {% from "dockers/dockerfile-macros.j2" import install_debian_packages, copy_files, rsync_from_builder_stage %} -ARG BASE=docker-swss-layer-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} +ARG BASE=docker-swss-layer-trixie-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} FROM $BASE AS base @@ -10,10 +10,12 @@ ENV DEBIAN_FRONTEND=noninteractive ## Install redis-tools dependencies ## TODO: implicitly install dependencies +## On trixie, iptables comes from Debian repos instead of local builds RUN apt-get update \ && apt-get install -f -y \ bridge-utils \ - conntrack + conntrack \ + iptables {% if docker_nat_debs.strip() -%} # Copy locally-built Debian package dependencies diff --git a/dockers/docker-nat/supervisord.conf b/dockers/docker-nat/supervisord.conf index f4ec3c874a9..a519d2e81bc 100644 --- a/dockers/docker-nat/supervisord.conf +++ b/dockers/docker-nat/supervisord.conf @@ -14,7 +14,7 @@ buffer_size=1024 [eventlistener:supervisor-proc-exit-listener] command=/usr/bin/supervisor-proc-exit-listener-rs --container-name nat -events=PROCESS_STATE_EXITED,PROCESS_STATE_RUNNING +events=PROCESS_STATE_EXITED,PROCESS_STATE_RUNNING,PROCESS_STATE_FATAL autostart=true autorestart=unexpected buffer_size=1024 diff --git a/dockers/docker-nat/supervisord.conf.common.j2 b/dockers/docker-nat/supervisord.conf.common.j2 new file mode 100644 index 00000000000..19c6bd6b480 --- /dev/null +++ b/dockers/docker-nat/supervisord.conf.common.j2 @@ -0,0 +1,38 @@ +{# supervisord.conf.common.j2 — shared NAT supervisord programs + Used by docker-sonic-vs via _INCLUDE_DOCKER. + Variables: + nat_priority_base — base priority for NAT programs (default 3) + use_dependent_startup — enable dependent_startup (default false) + nat_wait_for — what to wait for before starting (default "start:exited") +#} +{% set nat_priority_base = nat_priority_base | default(3) %} +{% set use_dependent_startup = use_dependent_startup | default(false) %} +{% set nat_wait_for = nat_wait_for | default("start:exited") %} + +[program:natmgrd] +command=/usr/bin/natmgrd +priority={{ nat_priority_base }} +autostart=false +autorestart=false +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true +{% if use_dependent_startup %} +dependent_startup=true +dependent_startup_wait_for={{ nat_wait_for }} +{% endif %} + +[program:natsyncd] +command=/usr/bin/natsyncd +priority={{ nat_priority_base + 1 }} +autostart=false +autorestart=false +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true +{% if use_dependent_startup %} +dependent_startup=true +dependent_startup_wait_for=natmgrd:running +{% endif %} diff --git a/dockers/docker-orchagent/Dockerfile.common.j2 b/dockers/docker-orchagent/Dockerfile.common.j2 new file mode 100644 index 00000000000..ddcf6f07121 --- /dev/null +++ b/dockers/docker-orchagent/Dockerfile.common.j2 @@ -0,0 +1,12 @@ +{# Common Dockerfile for docker-orchagent (swss) + Shared between standalone docker-orchagent and docker-sonic-vs. + Installs scripts and templates needed by swss programs. + When included via --build-context, set copy_from="orchagent" to use COPY --from=orchagent +#} +{% set _from = "--from=" + copy_from + " " if copy_from is defined else "" %} +COPY ["files/arp_update", "/usr/bin/"] +COPY ["files/arp_update_vars.j2", "/usr/share/sonic/templates/"] +COPY {{ _from }}["orchagent.sh", "swssconfig.sh", "buffermgrd.sh", "/usr/bin/"] +COPY {{ _from }}["arp_update.conf", "/usr/share/sonic/templates/"] +COPY {{ _from }}["ndppd.conf", "tunnel_packet_handler.conf", "/usr/share/sonic/templates/"] +COPY {{ _from }}["enable_counters.py", "tunnel_packet_handler.py", "/usr/bin/"] diff --git a/dockers/docker-orchagent/Dockerfile.j2 b/dockers/docker-orchagent/Dockerfile.j2 index f9fc4adc91c..f2ed11b86ca 100755 --- a/dockers/docker-orchagent/Dockerfile.j2 +++ b/dockers/docker-orchagent/Dockerfile.j2 @@ -1,5 +1,5 @@ {% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files, rsync_from_builder_stage %} -ARG BASE=docker-swss-layer-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} +ARG BASE=docker-swss-layer-trixie-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} FROM $BASE AS base @@ -56,11 +56,7 @@ RUN apt-get remove -y gcc # Clean up RUN apt-get purge -y build-essential python3-dev -COPY ["files/arp_update", "/usr/bin"] -COPY ["arp_update.conf", "files/arp_update_vars.j2", "/usr/share/sonic/templates/"] -COPY ["ndppd.conf", "tunnel_packet_handler.conf", "/usr/share/sonic/templates/"] -COPY ["enable_counters.py", "tunnel_packet_handler.py", "/usr/bin/"] -COPY ["orchagent.sh", "swssconfig.sh", "buffermgrd.sh", "/usr/bin/"] +{% include "Dockerfile.common.j2" %} # Copy all Jinja2 template files into the templates folder COPY ["*.j2", "/usr/share/sonic/templates/"] diff --git a/dockers/docker-orchagent/docker-init.j2 b/dockers/docker-orchagent/docker-init.j2 index 88ebba30ed8..232fa1ded16 100755 --- a/dockers/docker-orchagent/docker-init.j2 +++ b/dockers/docker-orchagent/docker-init.j2 @@ -21,7 +21,7 @@ CFGGEN_PARAMS=" \ -t /usr/share/sonic/templates/ndppd.conf.j2,/etc/ndppd.conf \ -t /usr/share/sonic/templates/critical_processes.j2,/etc/supervisor/critical_processes \ -t /usr/share/sonic/templates/watchdog_processes.j2,/etc/supervisor/watchdog_processes \ - -t /usr/share/sonic/templates/supervisord.conf.j2,/etc/supervisor/conf.d/supervisord.conf + -t /usr/share/sonic/templates/supervisord.conf.j2,/etc/supervisor/conf.d/supervisord.conf \ -t /usr/share/sonic/templates/wait_for_link.sh.j2,/usr/bin/wait_for_link.sh \ " VLAN=$(sonic-cfggen $CFGGEN_PARAMS) diff --git a/dockers/docker-orchagent/enable_counters.py b/dockers/docker-orchagent/enable_counters.py index 1217bf0f509..c205b2aff70 100755 --- a/dockers/docker-orchagent/enable_counters.py +++ b/dockers/docker-orchagent/enable_counters.py @@ -2,7 +2,6 @@ import time from swsscommon import swsscommon -from sonic_py_common import device_info # ALPHA defines the size of the window over which we calculate the average value. ALPHA is 2/(N+1) where N is the interval(window size) # In this case we configure the window to be 10s. This way if we have a huge 1s spike in traffic, @@ -11,14 +10,6 @@ DEFAULT_ALPHA = '0.18' -def enable_counter_group(db, name): - entry_info = db.get_entry("FLEX_COUNTER_TABLE", name) - - if not entry_info: - info = {} - info['FLEX_COUNTER_STATUS'] = 'enable' - db.mod_entry("FLEX_COUNTER_TABLE", name, info) - def enable_rates(): # set the default interval for rates counters_db = swsscommon.SonicV2Connector() @@ -34,16 +25,8 @@ def enable_rates(): counters_db.set('COUNTERS_DB', 'RATES:QUEUE', 'QUEUE_SMOOTH_INTERVAL', DEFAULT_SMOOTH_INTERVAL) counters_db.set('COUNTERS_DB', 'RATES:QUEUE', 'QUEUE_ALPHA', DEFAULT_ALPHA) -def enable_counters(): - db = swsscommon.ConfigDBConnector() - db.connect() - dpu_counters = ["ENI","DASH_METER"] - - platform_info = device_info.get_platform_info(db) - if platform_info.get('switch_type') == 'dpu': - for key in dpu_counters: - enable_counter_group(db, key) +def enable_counters(): enable_rates() diff --git a/dockers/docker-orchagent/ipinip.json.j2 b/dockers/docker-orchagent/ipinip.json.j2 index d84f7432923..bf6265cd53b 100644 --- a/dockers/docker-orchagent/ipinip.json.j2 +++ b/dockers/docker-orchagent/ipinip.json.j2 @@ -64,6 +64,17 @@ {%- set ipv6_vlan_addresses = ipv6_vlan_addresses.append(prefix) %} {%- endif %} {% endfor %} +{# Generation of IP-in-IP decap entries is disabled for Mellanox BackEnd devices without storage_device metadata. #} +{%- set backend_device_types = ['BackEndToRRouter', 'BackEndLeafRouter', 'BackEndSpineRouter'] -%} +{%- set is_mellanox = ASIC_VENDOR is defined and 'mellanox' in ASIC_VENDOR|lower -%} +{% if is_mellanox and 'type' in DEVICE_METADATA['localhost'] and DEVICE_METADATA['localhost']['type'] in backend_device_types and 'storage_device' not in DEVICE_METADATA['localhost'] %} +{% set ipv4_addresses = [] %} +{% set ipv6_addresses = [] %} +{% set ipv4_vlan_addresses = [] %} +{% set ipv6_vlan_addresses = [] %} +{% set ipv4_loopback_addresses = [] %} +{% set ipv6_loopback_addresses = [] %} +{% endif %} {%- set ipv4_addresses = ipv4_addresses + ipv4_vlan_addresses %} {%- set ipv6_addresses = ipv6_addresses + ipv6_vlan_addresses %} {# SAI report tunnel TABLE_FULL for large topo. Only generating for VLAN and loopback if over 128 routed interfaces.#} diff --git a/dockers/docker-orchagent/orch_zmq_tables.conf.j2 b/dockers/docker-orchagent/orch_zmq_tables.conf.j2 index 65d77b91d44..eb547ef1cbd 100644 --- a/dockers/docker-orchagent/orch_zmq_tables.conf.j2 +++ b/dockers/docker-orchagent/orch_zmq_tables.conf.j2 @@ -21,9 +21,10 @@ DASH_PA_VALIDATION_TABLE DASH_METER_POLICY_TABLE DASH_METER_RULE_TABLE DASH_ROUTING_APPLIANCE_TABLE -DASH_ENI_FORWARD_TABLE +DASH_FLOW_SYNC_SESSION_TABLE +DASH_FLOW_DUMP_FILTER_TABLE {% endif %} -{% if DEVICE_METADATA.localhost.orch_northbond_route_zmq_enabled == "true" %} +{% if SYSTEM_DEFAULTS is defined and SYSTEM_DEFAULTS.swss_zmq is defined and SYSTEM_DEFAULTS.swss_zmq.status == "enabled" %} ROUTE_TABLE LABEL_ROUTE_TABLE {% endif %} diff --git a/dockers/docker-orchagent/orchagent.sh b/dockers/docker-orchagent/orchagent.sh index 3eca2ab7c55..59c861f4984 100755 --- a/dockers/docker-orchagent/orchagent.sh +++ b/dockers/docker-orchagent/orchagent.sh @@ -18,6 +18,7 @@ fi # Create a folder for SwSS record files mkdir -p /var/log/swss ORCHAGENT_ARGS="-d /var/log/swss " +readonly DPU_BATCH_SIZE=125000 LOCALHOST_SWITCHTYPE=`sonic-db-cli CONFIG_DB hget "DEVICE_METADATA|localhost" "switch_type"` if [[ x"${LOCALHOST_SWITCHTYPE}" == x"chassis-packet" ]]; then @@ -26,7 +27,7 @@ if [[ x"${LOCALHOST_SWITCHTYPE}" == x"chassis-packet" ]]; then ORCHAGENT_ARGS+="-b 128 " elif [[ x"$LOCALHOST_SWITCHTYPE" == x"dpu" ]]; then # To handle high volume of objects in DPU - ORCHAGENT_ARGS+="-b 65536 " + ORCHAGENT_ARGS+="-b $DPU_BATCH_SIZE " else # Set orchagent pop batch size to 1024 ORCHAGENT_ARGS+="-b 1024 " @@ -35,8 +36,11 @@ fi # Set zmq mode by default for smartswitch DPU and increase the max bulk limit # Otherwise, set synchronous mode if it is enabled in CONFIG_DB SYNC_MODE=$(echo $SWSS_VARS | jq -r '.synchronous_mode') +SOUTHBOUND_ZMQ=$(echo $SWSS_VARS | jq -r '.swss_zmq') if [ "$LOCALHOST_SWITCHTYPE" == "dpu" ]; then - ORCHAGENT_ARGS+="-z zmq_sync -k 65536 " + ORCHAGENT_ARGS+="-z zmq_sync -k $DPU_BATCH_SIZE " +elif [ "$SOUTHBOUND_ZMQ" == "true" ]; then + ORCHAGENT_ARGS+="-z zmq_sync " elif [ "$SYNC_MODE" == "enable" ]; then ORCHAGENT_ARGS+="-s " fi @@ -62,6 +66,12 @@ if [[ "$NAMESPACE_ID" ]]; then ORCHAGENT_ARGS+="-f swss.asic$NAMESPACE_ID.rec -j sairedis.asic$NAMESPACE_ID.rec " fi +# Enable async swss recorder when explicitly configured +ASYNC_SWSS_REC=$(sonic-db-cli CONFIG_DB hget "SYSTEM_DEFAULTS|async_rec" "status") +if [ "$ASYNC_SWSS_REC" == "enabled" ]; then + ORCHAGENT_ARGS+="-A " +fi + # Add platform specific arguments if necessary if [ "$platform" == "broadcom" ]; then ORCHAGENT_ARGS+="-m $MAC_ADDRESS" @@ -100,13 +110,9 @@ fi LOCALHOST_SUBTYPE=`sonic-db-cli CONFIG_DB hget "DEVICE_METADATA|localhost" "subtype"` if [[ x"${LOCALHOST_SUBTYPE}" == x"SmartSwitch" ]]; then midplane_mgmt_state=$( ip -json -4 addr show eth0-midplane | jq -r ".[0].operstate" ) - mgmt_ip=$( ip -json -4 addr show eth0 | jq -r ".[0].addr_info[0].local" ) if [[ $midplane_mgmt_state == "UP" ]]; then # Enable ZMQ with eth0-midplane interface name ORCHAGENT_ARGS+=" -q tcp://eth0-midplane" - elif [[ $mgmt_ip != "" ]] && [[ $mgmt_ip != "null" ]]; then - # If eth0-midplane interface does not up, enable ZMQ with eth0 address - ORCHAGENT_ARGS+=" -q tcp://${mgmt_ip}" else ORCHAGENT_ARGS+=" -q tcp://127.0.0.1" fi @@ -115,12 +121,6 @@ else ORCHAGENT_ARGS+=" -q tcp://127.0.0.1" fi -# Add VRF parameter when mgmt-vrf enabled -MGMT_VRF_ENABLED=`sonic-db-cli CONFIG_DB hget "MGMT_VRF_CONFIG|vrf_global" "mgmtVrfEnabled"` -if [[ x"${MGMT_VRF_ENABLED}" == x"true" ]]; then - ORCHAGENT_ARGS+=" -v mgmt" -fi - # Enable ring buffer ORCHDAEMON_RING_ENABLED=`sonic-db-cli CONFIG_DB hget "DEVICE_METADATA|localhost" "ring_thread_enabled"` if [[ x"${ORCHDAEMON_RING_ENABLED}" == x"true" ]]; then diff --git a/dockers/docker-orchagent/supervisord.conf.common.j2 b/dockers/docker-orchagent/supervisord.conf.common.j2 new file mode 100644 index 00000000000..a8b98a1a5e8 --- /dev/null +++ b/dockers/docker-orchagent/supervisord.conf.common.j2 @@ -0,0 +1,391 @@ +{# Common supervisord programs for docker-orchagent (swss) + Shared between standalone docker-orchagent and docker-sonic-vs. + + Parameters: + swss_priority_base - base priority offset (standalone: 0, VS: varies) + include_swssconfig - include swssconfig/countersyncd/enable_counters programs (default: true) + Note: rsyslogd is NOT included here — each consumer provides its own rsyslogd program. + Programs in this template use dependent_startup_wait_for=rsyslogd:running, + so the consumer must define a [program:rsyslogd] before including this template. +#} + +{% set asan_extra_options = ':print_suppressions=0' %} + +{% set is_fabric_asic = 0 %} +{% set orchagent_dependent_startup_wait_for = "portsyncd:running" %} +{% if DEVICE_METADATA is defined and DEVICE_METADATA.localhost is defined and DEVICE_METADATA.localhost.switch_type is defined %} +{% if DEVICE_METADATA.localhost.switch_type == "fabric" %} +{% set is_fabric_asic = 1 %} +{% set orchagent_dependent_startup_wait_for = "rsyslogd:running" %} +{%- endif %} +{%- endif %} + +{% if include_swssconfig is not defined %} +{% set include_swssconfig = true %} +{% endif %} +{% if is_fabric_asic == 0 %} +[program:gearsyncd] +command=/usr/bin/gearsyncd -p /usr/share/sonic/hwsku/gearbox_config.json +priority={{ swss_priority_base + 3 }} +autostart=false +autorestart=false +startsecs=0 +startretries=0 +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true +dependent_startup=true +dependent_startup_wait_for=rsyslogd:running +{% if ENABLE_ASAN == "y" %} +environment=ASAN_OPTIONS="log_path=/var/log/asan/gearsyncd-asan.log{{ asan_extra_options }}" +{% endif %} +{%- endif %} + +{% if is_fabric_asic == 0 %} +[program:portsyncd] +command=/usr/bin/portsyncd +priority={{ swss_priority_base + 3 }} +autostart=false +autorestart=false +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true +dependent_startup=true +dependent_startup_wait_for=rsyslogd:running +{% if ENABLE_ASAN == "y" %} +environment=ASAN_OPTIONS="log_path=/var/log/asan/portsyncd-asan.log{{ asan_extra_options }}" +{% endif %} +{%- endif %} + +[program:orchagent] +command=/usr/bin/orchagent.sh +priority={{ swss_priority_base + 4 }} +autostart=false +autorestart=false +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true +stdout_capture_maxbytes=1MB +dependent_startup=true +dependent_startup_wait_for={{ orchagent_dependent_startup_wait_for }} +{% if ENABLE_ASAN == "y" %} +environment=ASAN_OPTIONS="log_path=/var/log/asan/orchagent-asan.log{{ asan_extra_options }}" +{% endif %} + +{% if include_swssconfig %} +[program:swssconfig] +command=/usr/bin/swssconfig.sh +priority={{ swss_priority_base + 5 }} +autostart=false +autorestart=unexpected +startretries=0 +startsecs=0 +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true +dependent_startup=true +dependent_startup_wait_for=orchagent:running +{% if ENABLE_ASAN == "y" %} +environment=ASAN_OPTIONS="log_path=/var/log/asan/swssconfig-asan.log{{ asan_extra_options }}" +{% endif %} +{% endif %} + +{% if is_fabric_asic == 0 %} +[program:restore_neighbors] +command=/usr/bin/restore_neighbors.py +priority={{ swss_priority_base + 6 }} +autostart=false +autorestart=false +startsecs=0 +startretries=0 +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true +dependent_startup=true +{% if include_swssconfig %} +dependent_startup_wait_for=swssconfig:exited +{% else %} +dependent_startup_wait_for=orchagent:running +{% endif %} +{%- endif %} + +{% if is_fabric_asic == 0 %} +[program:coppmgrd] +command=/usr/bin/coppmgrd +priority={{ swss_priority_base + 6 }} +autostart=false +autorestart=false +startretries=0 +startsecs=0 +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true +dependent_startup=true +dependent_startup_wait_for=orchagent:running +{% if ENABLE_ASAN == "y" %} +environment=ASAN_OPTIONS="log_path=/var/log/asan/coppmgrd-asan.log{{ asan_extra_options }}" +{% endif %} +{%- endif %} + +{% if is_fabric_asic == 0 %} +[program:neighsyncd] +command=/usr/bin/neighsyncd +priority={{ swss_priority_base + 7 }} +autostart=false +autorestart=false +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true +dependent_startup=true +{% if include_swssconfig %} +dependent_startup_wait_for=swssconfig:exited +{% else %} +dependent_startup_wait_for=orchagent:running +{% endif %} +{% if ENABLE_ASAN == "y" %} +environment=ASAN_OPTIONS="log_path=/var/log/asan/neighsyncd-asan.log{{ asan_extra_options }}" +{% endif %} +{%- endif %} + +{% if is_fabric_asic == 0 %} +[program:vlanmgrd] +command=/usr/bin/vlanmgrd +priority={{ swss_priority_base + 8 }} +autostart=false +autorestart=false +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true +dependent_startup=true +{% if include_swssconfig %} +dependent_startup_wait_for=swssconfig:exited +{% else %} +dependent_startup_wait_for=orchagent:running +{% endif %} +{% if ENABLE_ASAN == "y" %} +environment=ASAN_OPTIONS="log_path=/var/log/asan/vlanmgrd-asan.log{{ asan_extra_options }}" +{% endif %} +{%- endif %} + +{% if is_fabric_asic == 0 %} +[program:intfmgrd] +command=/usr/bin/intfmgrd +priority={{ swss_priority_base + 9 }} +autostart=false +autorestart=false +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true +dependent_startup=true +{% if include_swssconfig %} +dependent_startup_wait_for=swssconfig:exited +{% else %} +dependent_startup_wait_for=orchagent:running +{% endif %} +{% if ENABLE_ASAN == "y" %} +environment=ASAN_OPTIONS="log_path=/var/log/asan/intfmgrd-asan.log{{ asan_extra_options }}" +{% endif %} +{%- endif %} + +{% if is_fabric_asic == 0 %} +[program:portmgrd] +command=/usr/bin/portmgrd +priority={{ swss_priority_base + 10 }} +autostart=false +autorestart=false +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true +dependent_startup=true +{% if include_swssconfig %} +dependent_startup_wait_for=swssconfig:exited +{% else %} +dependent_startup_wait_for=orchagent:running +{% endif %} +{% if ENABLE_ASAN == "y" %} +environment=ASAN_OPTIONS="log_path=/var/log/asan/portmgrd-asan.log{{ asan_extra_options }}" +{% endif %} +{%- endif %} + +[program:fabricmgrd] +command=/usr/bin/fabricmgrd +priority={{ swss_priority_base + 10 }} +autostart=false +autorestart=false +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true +dependent_startup=true +{% if include_swssconfig %} +dependent_startup_wait_for=swssconfig:exited +{% else %} +dependent_startup_wait_for=orchagent:running +{% endif %} +{% if ENABLE_ASAN == "y" %} +environment=ASAN_OPTIONS="log_path=/var/log/asan/fabricmgrd-asan.log{{ asan_extra_options }}" +{% endif %} + +{% if is_fabric_asic == 0 %} +[program:buffermgrd] +command=/usr/bin/buffermgrd.sh +priority={{ swss_priority_base + 11 }} +autostart=false +autorestart=false +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true +dependent_startup=true +{% if include_swssconfig %} +dependent_startup_wait_for=swssconfig:exited +{% else %} +dependent_startup_wait_for=orchagent:running +{% endif %} +{% if ENABLE_ASAN == "y" %} +environment=ASAN_OPTIONS="log_path=/var/log/asan/buffermgrd-asan.log{{ asan_extra_options }}" +{% endif %} +{%- endif %} + +{% if include_swssconfig %} +[program:enable_counters] +command=/usr/bin/enable_counters.py +priority={{ swss_priority_base + 12 }} +autostart=false +autorestart=false +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true +dependent_startup=true +dependent_startup_wait_for=swssconfig:exited +{% endif %} + +{% if is_fabric_asic == 0 %} +[program:vrfmgrd] +command=/usr/bin/vrfmgrd +priority={{ swss_priority_base + 13 }} +autostart=false +autorestart=false +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true +dependent_startup=true +{% if include_swssconfig %} +dependent_startup_wait_for=swssconfig:exited +{% else %} +dependent_startup_wait_for=orchagent:running +{% endif %} +{% if ENABLE_ASAN == "y" %} +environment=ASAN_OPTIONS="log_path=/var/log/asan/vrfmgrd-asan.log{{ asan_extra_options }}" +{% endif %} +{%- endif %} + +{% if is_fabric_asic == 0 %} +[program:nbrmgrd] +command=/usr/bin/nbrmgrd +priority={{ swss_priority_base + 15 }} +autostart=false +autorestart=false +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true +dependent_startup=true +{% if include_swssconfig %} +dependent_startup_wait_for=swssconfig:exited +{% else %} +dependent_startup_wait_for=orchagent:running +{% endif %} +{% if ENABLE_ASAN == "y" %} +environment=ASAN_OPTIONS="log_path=/var/log/asan/nbrmgrd-asan.log{{ asan_extra_options }}" +{% endif %} +{%- endif %} + +{% if is_fabric_asic == 0 %} +[program:vxlanmgrd] +command=/usr/bin/vxlanmgrd +priority={{ swss_priority_base + 16 }} +autostart=false +autorestart=false +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true +dependent_startup=true +{% if include_swssconfig %} +dependent_startup_wait_for=swssconfig:exited +{% else %} +dependent_startup_wait_for=orchagent:running +{% endif %} +{% if ENABLE_ASAN == "y" %} +environment=ASAN_OPTIONS="log_path=/var/log/asan/vxlanmgrd-asan.log{{ asan_extra_options }}" +{% endif %} +{%- endif %} + +{% if is_fabric_asic == 0 %} +[program:tunnelmgrd] +command=/usr/bin/tunnelmgrd +priority={{ swss_priority_base + 17 }} +autostart=false +autorestart=false +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true +dependent_startup=true +{% if include_swssconfig %} +dependent_startup_wait_for=swssconfig:exited +{% else %} +dependent_startup_wait_for=orchagent:running +{% endif %} +{% if ENABLE_ASAN == "y" %} +environment=ASAN_OPTIONS="log_path=/var/log/asan/tunnelmgrd-asan.log{{ asan_extra_options }}" +{% endif %} +{%- endif %} + +{% if is_fabric_asic == 0 %} +[program:fdbsyncd] +command=/usr/bin/fdbsyncd +priority={{ swss_priority_base + 17 }} +autostart=false +autorestart=false +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true +dependent_startup=true +{% if include_swssconfig %} +dependent_startup_wait_for=swssconfig:exited +{% else %} +dependent_startup_wait_for=orchagent:running +{% endif %} +{% if ENABLE_ASAN == "y" %} +environment=ASAN_OPTIONS="log_path=/var/log/asan/fdbsyncd-asan.log{{ asan_extra_options }}" +{% endif %} +{%- endif %} + +{% if include_swssconfig %} +[program:countersyncd] +command=/usr/bin/countersyncd --enable-otel +priority={{ swss_priority_base + 18 }} +autostart=false +autorestart=false +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true +dependent_startup=true +dependent_startup_wait_for=swssconfig:exited +{% endif %} diff --git a/dockers/docker-orchagent/supervisord.conf.j2 b/dockers/docker-orchagent/supervisord.conf.j2 index 8e3fc7d58fe..5a98b576ced 100644 --- a/dockers/docker-orchagent/supervisord.conf.j2 +++ b/dockers/docker-orchagent/supervisord.conf.j2 @@ -14,7 +14,7 @@ buffer_size=1024 [eventlistener:supervisor-proc-exit-listener] command=/usr/bin/supervisor-proc-exit-listener-rs --container-name swss -events=PROCESS_STATE_EXITED,PROCESS_STATE_RUNNING,PROCESS_COMMUNICATION_STDOUT +events=PROCESS_STATE_EXITED,PROCESS_STATE_RUNNING,PROCESS_COMMUNICATION_STDOUT,PROCESS_STATE_FATAL autostart=true autorestart=unexpected buffer_size=1024 @@ -30,325 +30,8 @@ stderr_logfile=NONE stderr_syslog=true dependent_startup=true -{% set is_fabric_asic = 0 %} -{% set orchagent_dependent_startup_wait_for = "portsyncd:running" %} -{% if DEVICE_METADATA.localhost.switch_type %} -{% if DEVICE_METADATA.localhost.switch_type == "fabric" %} -{% set is_fabric_asic = 1 %} -{% set orchagent_dependent_startup_wait_for = "rsyslogd:running" %} -{%- endif %} -{%- endif %} -{% set asan_extra_options = ':print_suppressions=0' %} -{% if is_fabric_asic == 0 %} -[program:gearsyncd] -command=/usr/bin/gearsyncd -p /usr/share/sonic/hwsku/gearbox_config.json -priority=3 -autostart=false -autorestart=false -startsecs=0 -startretries=0 -stdout_logfile=NONE -stdout_syslog=true -stderr_logfile=NONE -stderr_syslog=true -dependent_startup=true -dependent_startup_wait_for=rsyslogd:running -{% if ENABLE_ASAN == "y" %} -environment=ASAN_OPTIONS="log_path=/var/log/asan/gearsyncd-asan.log{{ asan_extra_options }}" -{% endif %} -{%- endif %} - -{% if is_fabric_asic == 0 %} -[program:portsyncd] -command=/usr/bin/portsyncd -priority=3 -autostart=false -autorestart=false -stdout_logfile=NONE -stdout_syslog=true -stderr_logfile=NONE -stderr_syslog=true -dependent_startup=true -dependent_startup_wait_for=rsyslogd:running -{% if ENABLE_ASAN == "y" %} -environment=ASAN_OPTIONS="log_path=/var/log/asan/portsyncd-asan.log{{ asan_extra_options }}" -{% endif %} -{%- endif %} - -[program:orchagent] -command=/usr/bin/orchagent.sh -priority=4 -autostart=false -autorestart=false -stdout_capture_maxbytes=1MB -stdout_logfile=NONE -stdout_syslog=true -stderr_logfile=NONE -stderr_syslog=true -dependent_startup=true -dependent_startup_wait_for={{ orchagent_dependent_startup_wait_for }} -{% if ENABLE_ASAN == "y" %} -environment=ASAN_OPTIONS="log_path=/var/log/asan/orchagent-asan.log{{ asan_extra_options }}" -{% endif %} - -[program:swssconfig] -command=/usr/bin/swssconfig.sh -priority=5 -autostart=false -autorestart=unexpected -startretries=0 -startsecs=0 -stdout_logfile=NONE -stdout_syslog=true -stderr_logfile=NONE -stderr_syslog=true -dependent_startup=true -dependent_startup_wait_for=orchagent:running -{% if ENABLE_ASAN == "y" %} -environment=ASAN_OPTIONS="log_path=/var/log/asan/swssconfig-asan.log{{ asan_extra_options }}" -{% endif %} - -{% if is_fabric_asic == 0 %} -[program:restore_neighbors] -command=/usr/bin/restore_neighbors.py -priority=6 -autostart=false -autorestart=false -startsecs=0 -startretries=0 -stdout_logfile=NONE -stdout_syslog=true -stderr_logfile=NONE -stderr_syslog=true -dependent_startup=true -dependent_startup_wait_for=swssconfig:exited -{%- endif %} - -{% if is_fabric_asic == 0 %} -[program:coppmgrd] -command=/usr/bin/coppmgrd -priority=6 -autostart=false -autorestart=false -startretries=0 -startsecs=0 -stdout_logfile=NONE -stdout_syslog=true -stderr_logfile=NONE -stderr_syslog=true -dependent_startup=true -dependent_startup_wait_for=orchagent:running -{% if ENABLE_ASAN == "y" %} -environment=ASAN_OPTIONS="log_path=/var/log/asan/coppmgrd-asan.log{{ asan_extra_options }}" -{% endif %} -{%- endif %} - -{% if is_fabric_asic == 0 %} -[program:neighsyncd] -command=/usr/bin/neighsyncd -priority=7 -autostart=false -autorestart=false -stdout_logfile=NONE -stdout_syslog=true -stderr_logfile=NONE -stderr_syslog=true -dependent_startup=true -dependent_startup_wait_for=swssconfig:exited -{% if ENABLE_ASAN == "y" %} -environment=ASAN_OPTIONS="log_path=/var/log/asan/neighsyncd-asan.log{{ asan_extra_options }}" -{% endif %} -{%- endif %} - -{% if is_fabric_asic == 0 %} -[program:vlanmgrd] -command=/usr/bin/vlanmgrd -priority=8 -autostart=false -autorestart=false -stdout_logfile=NONE -stdout_syslog=true -stderr_logfile=NONE -stderr_syslog=true -dependent_startup=true -dependent_startup_wait_for=swssconfig:exited -{% if ENABLE_ASAN == "y" %} -environment=ASAN_OPTIONS="log_path=/var/log/asan/vlanmgrd-asan.log{{ asan_extra_options }}" -{% endif %} -{%- endif %} - -{% if is_fabric_asic == 0 %} -[program:intfmgrd] -command=/usr/bin/intfmgrd -priority=9 -autostart=false -autorestart=false -stdout_logfile=NONE -stdout_syslog=true -stderr_logfile=NONE -stderr_syslog=true -dependent_startup=true -dependent_startup_wait_for=swssconfig:exited -{% if ENABLE_ASAN == "y" %} -environment=ASAN_OPTIONS="log_path=/var/log/asan/intfmgrd-asan.log{{ asan_extra_options }}" -{% endif %} -{%- endif %} - -{% if is_fabric_asic == 0 %} -[program:portmgrd] -command=/usr/bin/portmgrd -priority=10 -autostart=false -autorestart=false -stdout_logfile=NONE -stdout_syslog=true -stderr_logfile=NONE -stderr_syslog=true -dependent_startup=true -dependent_startup_wait_for=swssconfig:exited -{% if ENABLE_ASAN == "y" %} -environment=ASAN_OPTIONS="log_path=/var/log/asan/portmgrd-asan.log{{ asan_extra_options }}" -{% endif %} -{%- endif %} - -[program:fabricmgrd] -command=/usr/bin/fabricmgrd -priority=10 -autostart=false -autorestart=false -stdout_logfile=NONE -stdout_syslog=true -stderr_logfile=NONE -stderr_syslog=true -dependent_startup=true -dependent_startup_wait_for=swssconfig:exited -{% if ENABLE_ASAN == "y" %} -environment=ASAN_OPTIONS="log_path=/var/log/asan/fabricmgrd-asan.log{{ asan_extra_options }}" -{% endif %} - -{% if is_fabric_asic == 0 %} -[program:buffermgrd] -command=/usr/bin/buffermgrd.sh -priority=11 -autostart=false -autorestart=false -stdout_logfile=NONE -stdout_syslog=true -stderr_logfile=NONE -stderr_syslog=true -dependent_startup=true -dependent_startup_wait_for=swssconfig:exited -{% if ENABLE_ASAN == "y" %} -environment=ASAN_OPTIONS="log_path=/var/log/asan/buffermgrd-asan.log{{ asan_extra_options }}" -{% endif %} -{%- endif %} - -{% if is_fabric_asic == 0 %} -[program:vrfmgrd] -command=/usr/bin/vrfmgrd -priority=13 -autostart=false -autorestart=false -stdout_logfile=NONE -stdout_syslog=true -stderr_logfile=NONE -stderr_syslog=true -dependent_startup=true -dependent_startup_wait_for=swssconfig:exited -{% if ENABLE_ASAN == "y" %} -environment=ASAN_OPTIONS="log_path=/var/log/asan/vrfmgrd-asan.log{{ asan_extra_options }}" -{% endif %} -{%- endif %} - -{% if is_fabric_asic == 0 %} -[program:nbrmgrd] -command=/usr/bin/nbrmgrd -priority=15 -autostart=false -autorestart=false -stdout_logfile=NONE -stdout_syslog=true -stderr_logfile=NONE -stderr_syslog=true -dependent_startup=true -dependent_startup_wait_for=swssconfig:exited -{% if ENABLE_ASAN == "y" %} -environment=ASAN_OPTIONS="log_path=/var/log/asan/nbrmgrd-asan.log{{ asan_extra_options }}" -{% endif %} -{%- endif %} +{% set include_swssconfig = true %} +{% set swss_priority_base = 0 %} -{% if is_fabric_asic == 0 %} -[program:vxlanmgrd] -command=/usr/bin/vxlanmgrd -priority=16 -autostart=false -autorestart=false -stdout_logfile=NONE -stdout_syslog=true -stderr_logfile=NONE -stderr_syslog=true -dependent_startup=true -dependent_startup_wait_for=swssconfig:exited -{% if ENABLE_ASAN == "y" %} -environment=ASAN_OPTIONS="log_path=/var/log/asan/vxlanmgrd-asan.log{{ asan_extra_options }}" -{% endif %} -{%- endif %} - -{% if is_fabric_asic == 0 %} -[program:tunnelmgrd] -command=/usr/bin/tunnelmgrd -priority=17 -autostart=false -autorestart=false -stdout_logfile=NONE -stdout_syslog=true -stderr_logfile=NONE -stderr_syslog=true -dependent_startup=true -dependent_startup_wait_for=swssconfig:exited -{% if ENABLE_ASAN == "y" %} -environment=ASAN_OPTIONS="log_path=/var/log/asan/tunnelmgrd-asan.log{{ asan_extra_options }}" -{% endif %} -{%- endif %} - -[program:enable_counters] -command=/usr/bin/enable_counters.py -priority=12 -autostart=false -autorestart=false -stdout_logfile=NONE -stdout_syslog=true -stderr_logfile=NONE -stderr_syslog=true -dependent_startup=true -dependent_startup_wait_for=swssconfig:exited - -{% if is_fabric_asic == 0 %} -[program:fdbsyncd] -command=/usr/bin/fdbsyncd -priority=17 -autostart=false -autorestart=false -stdout_logfile=NONE -stdout_syslog=true -stderr_logfile=NONE -stderr_syslog=true -dependent_startup=true -dependent_startup_wait_for=swssconfig:exited -{% if ENABLE_ASAN == "y" %} -environment=ASAN_OPTIONS="log_path=/var/log/asan/fdbsyncd-asan.log{{ asan_extra_options }}" -{% endif %} -{%- endif %} - -[program:countersyncd] -command=/usr/bin/countersyncd --enable-otel -priority=18 -autostart=false -autorestart=false -stdout_logfile=NONE -stdout_syslog=true -stderr_logfile=NONE -stderr_syslog=true -dependent_startup=true -dependent_startup_wait_for=swssconfig:exited +{% include "supervisord.conf.common.j2" %} diff --git a/dockers/docker-orchagent/switch.json.j2 b/dockers/docker-orchagent/switch.json.j2 index 88620bab782..1949e2468e1 100644 --- a/dockers/docker-orchagent/switch.json.j2 +++ b/dockers/docker-orchagent/switch.json.j2 @@ -17,6 +17,12 @@ {% set hash_seed = 40 %} {% elif "UpperSpineRouter" in DEVICE_METADATA.localhost.type %} {% set hash_seed = 50 %} +{% elif "LowerRegionalHub" in DEVICE_METADATA.localhost.type %} +{% set hash_seed = 60 %} +{% elif "FabricRegionalHub" in DEVICE_METADATA.localhost.type %} +{% set hash_seed = 70 %} +{% elif "UpperRegionalHub" in DEVICE_METADATA.localhost.type %} +{% set hash_seed = 80 %} {% endif %} {% endif %} {% if DEVICE_METADATA.localhost.namespace_id %} diff --git a/dockers/docker-orchagent/swssconfig.sh b/dockers/docker-orchagent/swssconfig.sh index 35677998046..7a869ca20b4 100755 --- a/dockers/docker-orchagent/swssconfig.sh +++ b/dockers/docker-orchagent/swssconfig.sh @@ -82,13 +82,13 @@ apply_ipinip_subset() { SYSTEM_WARM_START=`sonic-db-cli STATE_DB hget "WARM_RESTART_ENABLE_TABLE|system" enable` SWSS_WARM_START=`sonic-db-cli STATE_DB hget "WARM_RESTART_ENABLE_TABLE|swss" enable` if [[ "$SYSTEM_WARM_START" == "true" ]] || [[ "$SWSS_WARM_START" == "true" ]]; then - # On warm boot, only apply TUNNEL_DECAP_TABLE subset on non-Broadcom ASICs to - # match ipinip.json.j2 config - if [[ "$sonic_asic_type" != "broadcom" ]]; then - echo "Preparing to apply ipinip.json config for non-broadcom ASIC switch" - apply_ipinip_subset + # On warm boot, only apply TUNNEL_DECAP_TABLE subset to match ipinip.json.j2 config, + # except for broadcom and marvell-teralynx asic_types + if [[ "$sonic_asic_type" == "broadcom" ]] || [[ "$sonic_asic_type" == "marvell-teralynx" ]]; then + echo "Skip applying ipinip.json config for ASIC type: $sonic_asic_type after warm-boot" else - echo "Skip applying ipinip.json config for broadcom ASIC switch after warm-boot" + echo "Preparing to apply ipinip.json config for ASIC type: $sonic_asic_type" + apply_ipinip_subset fi exit 0 fi diff --git a/dockers/docker-orchagent/vxlan.json.j2 b/dockers/docker-orchagent/vxlan.json.j2 index f0b73467326..797027426ce 100644 --- a/dockers/docker-orchagent/vxlan.json.j2 +++ b/dockers/docker-orchagent/vxlan.json.j2 @@ -3,7 +3,8 @@ "SWITCH_TABLE:switch": { {% if DEVICE_METADATA.localhost.vxlan_port_range == 'enable' %} "vxlan_sport": "0xFF00", - "vxlan_mask": "8" + "vxlan_mask": "8", + "vxlan_security": "false" {% endif %} }, "OP": "SET" diff --git a/dockers/docker-pde/Dockerfile.j2 b/dockers/docker-pde/Dockerfile.j2 index bdfe3e238fa..3129aa28746 100644 --- a/dockers/docker-pde/Dockerfile.j2 +++ b/dockers/docker-pde/Dockerfile.j2 @@ -1,4 +1,4 @@ -FROM docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} +FROM docker-config-engine-trixie-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} ARG docker_container_name ENV PYTHONPATH=/usr/share/sonic/platform @@ -12,16 +12,17 @@ ENV DEBIAN_FRONTEND=noninteractive COPY ["files/03_stretch_af.list", "/etc/apt/sources.list.d/"] {%- endif %} -# Update apt's cache of available packages -RUN apt-get update && apt-get install -y ipmitool telnet busybox kmod libpcap-dev +# Update apt's cache of available packages - Added --no-install-recommends to avoid systemd/udev bloat +RUN apt-get update && apt-get install -y --no-install-recommends ipmitool telnet busybox kmod libpcap-dev # Packages for benchmark tool - nench.sh -RUN apt-get install -y bzip2 curl ioping openssl bc sysstat +RUN apt-get install -y --no-install-recommends bzip2 curl ioping openssl bc sysstat # Packages for PDDF -RUN apt-get install -y python3-jsonschema i2c-tools +RUN apt-get install -y --no-install-recommends python3-jsonschema i2c-tools -RUN pip3 install pytest pexpect +# Use --break-system-packages for Trixie environment +RUN pip3 install --break-system-packages pytest pexpect {% if docker_pde_debs.strip() -%} # Copy locally-built Debian package dependencies @@ -61,8 +62,8 @@ python-wheels/{{ whl }}{{' '}} # Install locally-built Python wheel dependencies -RUN pip3 install \ - +RUN apt-get purge -y python3-jsonschema && \ + pip3 install --break-system-packages \ {% for whl in docker_pde_whls.split(' ') -%} /python-wheels/{{ whl }}{{' '}} diff --git a/dockers/docker-platform-monitor/Dockerfile.j2 b/dockers/docker-platform-monitor/Dockerfile.j2 index 64fd6176d87..949e4e0fd1a 100755 --- a/dockers/docker-platform-monitor/Dockerfile.j2 +++ b/dockers/docker-platform-monitor/Dockerfile.j2 @@ -1,5 +1,5 @@ {% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files, rsync_from_builder_stage %} -ARG BASE=docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} +ARG BASE=docker-config-engine-trixie-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} FROM $BASE AS base @@ -18,36 +18,42 @@ RUN apt-get update && \ build-essential \ python3-dev \ ipmitool \ - librrd8 \ + librrd8t64 \ librrd-dev \ rrdtool \ python3-smbus \ dmidecode \ i2c-tools \ psmisc \ - python3-jsonschema \ python3-netifaces \ libpci3 \ iputils-ping \ pciutils \ nvme-cli \ ethtool \ - xxd + xxd \ + python3-yaml \ + python3-bottle \ + smartmontools {% if sonic_asic_platform == 'mellanox' %} RUN apt-get install -y dbus {% endif %} - -# smartmontools version should match the installed smartmontools in sonic_debian_extension build template -RUN apt-get install -y -t bookworm-backports \ - smartmontools +{% if sonic_asic_platform == 'aspeed' %} +# Install busybox for devmem access (needed for BMC hardware register control) +RUN apt-get install -y \ + busybox \ + freeipmi-tools +{% endif %} # On Arista devices, the sonic_platform wheel is not installed in the container. # Instead, the installation directory is mounted from the host OS. However, this method # doesn't ensure all dependencies are installed in the container. So here we # install any dependencies required by the Arista sonic_platform package. # TODO: eliminate the need to install these explicitly. -RUN pip3 install grpcio==1.51.1 \ - grpcio-tools==1.51.1 --no-build-isolation +# This version MUST match what is installed in the slave container +RUN pip3 install grpcio==1.71.0 \ + grpcio-tools==1.71.0 --no-build-isolation && \ + find /usr/local/lib/python3*/dist-packages/grpc* -name '*.so' -exec strip --strip-unneeded {} + # Barefoot platform vendors' sonic_platform packages import these Python libraries (and netifaces) RUN pip3 install thrift==0.13.0 @@ -55,6 +61,9 @@ RUN pip3 install thrift==0.13.0 # Ragile platform vendors' sonic_platform packages import these Python libraries RUN pip3 install requests +# Nexthop platform vendors' sonic_platform packages import these Python libraries +RUN pip3 install python-dateutil==2.9.0.post0 + # We install the libpci module in order to be able to do PCI transactions RUN pip3 install libpci @@ -110,6 +119,8 @@ RUN chmod 755 /usr/bin/docker_init.sh FROM $BASE +ARG image_version + {{ rsync_from_builder_stage() }} # Pass the image_version to container diff --git a/dockers/docker-platform-monitor/docker-pmon.supervisord.conf.j2 b/dockers/docker-platform-monitor/docker-pmon.supervisord.conf.j2 index a3b8cd192bb..794bc1fc712 100644 --- a/dockers/docker-platform-monitor/docker-pmon.supervisord.conf.j2 +++ b/dockers/docker-platform-monitor/docker-pmon.supervisord.conf.j2 @@ -31,6 +31,23 @@ stderr_syslog=true dependent_startup=true +{% if IS_SWITCH_BMC == 1 %} +[program:bmcctld] +command=/usr/local/bin/bmcctld +priority=2 +autostart=false +autorestart=unexpected +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true +startsecs=10 +startretries=50 +dependent_startup=true +dependent_startup_wait_for=rsyslogd:running +{% endif %} + + {% if delay_non_critical_daemon %} [program:delay] command=python3 /usr/bin/delay.py @@ -132,6 +149,10 @@ dependent_startup_wait_for=rsyslogd:running {%- set options = options + " --dom_temperature_poll_interval " + xcvrd.dom_temperature_poll_interval|string %} {% endif -%} +{% if xcvrd and xcvrd.dom_update_interval %} + {%- set options = options + " --dom_update_interval " + xcvrd.dom_update_interval|string %} +{% endif -%} + {% if delay_xcvrd %} {%- set command = "bash -c \"sleep 30 && " ~ base_command ~ options ~ "\"" %} {% else %} diff --git a/dockers/docker-platform-monitor/docker_init.j2 b/dockers/docker-platform-monitor/docker_init.j2 index 11c834f782e..cbefb2ed176 100755 --- a/dockers/docker-platform-monitor/docker_init.j2 +++ b/dockers/docker-platform-monitor/docker_init.j2 @@ -85,6 +85,14 @@ else SONIC_PLATFORM_API_PYTHON_VERSION=3 fi +# Copy platform-specific supervisor configs if they exist (Aspeed BMC platforms) +{% if CONFIGURED_PLATFORM == "aspeed" %} +if [ -n "$(ls /usr/share/sonic/platform/*.supervisord.conf 2>/dev/null)" ]; then + echo "Installing platform-specific supervisor configs..." + cp /usr/share/sonic/platform/*.supervisord.conf /etc/supervisor/conf.d/ +fi +{% endif %} + {% if CONFIGURED_PLATFORM == "mellanox" %} # Dynamic sensors.conf setup: create a symlink from SONiC platform directory sensors.conf -> hw-management sensors.conf @@ -140,7 +148,17 @@ if [ -e $MODULAR_CHASSISDB_CONF_FILE ] && [[ $disaggregated_chassis -ne 1 ]]; th IS_MODULAR_CHASSIS=1 fi -confvar="{\"HAVE_SENSORS_CONF\":$HAVE_SENSORS_CONF, \"HAVE_FANCONTROL_CONF\":$HAVE_FANCONTROL_CONF, \"API_VERSION\":$SONIC_PLATFORM_API_PYTHON_VERSION, \"IS_MODULAR_CHASSIS\":$IS_MODULAR_CHASSIS}" +# Determine if this pmon instance is running on the Switch BMC. +# switch_bmc=1 is set in platform_env.conf on BMC systems. +IS_SWITCH_BMC=0 +if [ -e $PLATFORM_ENV_CONF_FILE ]; then + bmc_val=$(grep -s '^switch_bmc=' $PLATFORM_ENV_CONF_FILE | cut -d= -f2 | tr -d '[:space:]') + if [[ "$bmc_val" == "1" ]]; then + IS_SWITCH_BMC=1 + fi +fi + +confvar="{\"HAVE_SENSORS_CONF\":$HAVE_SENSORS_CONF, \"HAVE_FANCONTROL_CONF\":$HAVE_FANCONTROL_CONF, \"API_VERSION\":$SONIC_PLATFORM_API_PYTHON_VERSION, \"IS_MODULAR_CHASSIS\":$IS_MODULAR_CHASSIS, \"IS_SWITCH_BMC\":$IS_SWITCH_BMC}" if [ -e $PMON_DAEMON_CONTROL_FILE ]; then diff --git a/dockers/docker-platform-monitor/etc/rsyslog.conf b/dockers/docker-platform-monitor/etc/rsyslog.conf index 35815e5322a..9edb0cf6a2f 100644 --- a/dockers/docker-platform-monitor/etc/rsyslog.conf +++ b/dockers/docker-platform-monitor/etc/rsyslog.conf @@ -9,24 +9,20 @@ #### MODULES #### ################# -$ModLoad imuxsock # provides support for local system logging - # # Set a rate limit on messages from the container # -$SystemLogRateLimitInterval 300 -$SystemLogRateLimitBurst 20000 - -#$ModLoad imklog # provides kernel logging support -#$ModLoad immark # provides --MARK-- message capability +module(load="imuxsock" SysSock.RateLimit.Interval="300" SysSock.RateLimit.Burst="20000") # provides support for local system logging +#module(load="imklog") # provides kernel logging support +#module(load="immark") # provides --MARK-- message capability # provides UDP syslog reception -#$ModLoad imudp -#$UDPServerRun 514 +#module(load="imudp") +#input(type="imudp" port="514") # provides TCP syslog reception -#$ModLoad imtcp -#$InputTCPServerRun 514 +#module(load="imtcp") +#input(type="imtcp" port="514") ########################### @@ -46,8 +42,12 @@ if $programname contains "sensord" and $msg contains "Error getting sensor data: } # Set remote syslog server +# Keep container syslog writers non-blocking if host-side RELP backpressure fills +# the action queue. Dropping at queue saturation is safer than stalling service +# initialization in syslog()/sendto(). template (name="ForwardFormatInContainer" type="string" string="<%PRI%>%TIMESTAMP:::date-rfc3339% %HOSTNAME% %$.CONTAINER_NAME%#%syslogtag%%msg:::sp-if-no-1st-sp%%msg%") -*.* action(type="omfwd" target=`echo $SYSLOG_TARGET_IP` port="514" protocol="udp" Template="ForwardFormatInContainer") +module(load="omrelp") +*.* action(type="omrelp" target=`echo $SYSLOG_TARGET_IP` port="2514" action.resumeRetryCount="60" queue.type="LinkedList" queue.size="20000" queue.timeoutEnqueue="0" Template="ForwardFormatInContainer") # # Use traditional timestamp format. @@ -85,4 +85,4 @@ $RepeatedMsgReduction on ############### #### RULES #### -############### \ No newline at end of file +############### diff --git a/dockers/docker-ptf/Dockerfile.j2 b/dockers/docker-ptf/Dockerfile.j2 index 11aa4df5fc7..6093216505c 100644 --- a/dockers/docker-ptf/Dockerfile.j2 +++ b/dockers/docker-ptf/Dockerfile.j2 @@ -15,8 +15,11 @@ USER root WORKDIR /root COPY ["sources.list.{{ CONFIGURED_ARCH }}", "/etc/apt/sources.list"] -COPY ["no-check-valid-until", "/etc/apt/apt.conf.d"] -COPY ["apt-retries-count", "/etc/apt/apt.conf.d"] +COPY ["files/apt/apt.conf.d/no-check-valid-until", "/etc/apt/apt.conf.d/"] +COPY ["files/apt/apt.conf.d/apt-timeout-n-retries", "/etc/apt/apt.conf.d/"] +# Install certificates by disabling the peer verification +RUN apt -o Acquire::https::Verify-Peer=false update && \ + apt -o Acquire::https::Verify-Peer=false install -y ca-certificates ## Make apt-get non-interactive ENV DEBIAN_FRONTEND=noninteractive @@ -93,25 +96,74 @@ RUN apt-get update \ automake \ iproute2 \ iptables \ +{% if PTF_ENV_PY_VER != "mixed" %} wireshark-common \ +{% endif %} freeradius \ quilt \ - {% if CONFIGURED_ARCH == "armhf" %} - && GRPCURL_ARCH=linux_armv6 \ - {% elif CONFIGURED_ARCH == "arm64" %} - && GRPCURL_ARCH=linux_arm64 \ - {% else %} - && GRPCURL_ARCH=linux_x86_64 \ - {% endif %} - && GRPCURL_VERSION=1.9.1 && \ - curl -L "https://github.com/fullstorydev/grpcurl/releases/download/v${GRPCURL_VERSION}/grpcurl_${GRPCURL_VERSION}_${GRPCURL_ARCH}.tar.gz" \ - -o /tmp/grpcurl_${GRPCURL_VERSION}_${GRPCURL_ARCH}.tar.gz && \ - cd /tmp && \ - tar xvf grpcurl_${GRPCURL_VERSION}_${GRPCURL_ARCH}.tar.gz && \ - mv grpcurl /usr/local/bin/grpcurl && \ - chmod +x /usr/local/bin/grpcurl && \ - rm -f /tmp/grpcurl_${GRPCURL_VERSION}_${GRPCURL_ARCH}.tar.gz && \ - rm -rf /var/lib/apt/lists/* + && rm -rf /var/lib/apt/lists/* + +# Install Go toolchain for building grpcurl and gnmic from source +# to ensure they use a patched Go stdlib (GO-2026-5039: net/textproto) +{% if CONFIGURED_ARCH == "armhf" %} +RUN GO_ARCH=armv6l \ + && GO_SHA256=492d69badee59cae12e9a36282dfce94041bd4aac88fdddea575a7d99a2bd05d \ +{% elif CONFIGURED_ARCH == "arm64" %} +RUN GO_ARCH=arm64 \ + && GO_SHA256=c30bf9e156a54ea4e31fbbbf31a712b32734b58cc9a22426fa5ee632d0885124 \ +{% else %} +RUN GO_ARCH=amd64 \ + && GO_SHA256=34f14304e856893f4ba30c2cacfe93906e9de7915c5f6aaaf3a81cdccd7ba30b \ +{% endif %} + && GO_VERSION=1.25.11 \ + && curl -L "https://go.dev/dl/go${GO_VERSION}.linux-${GO_ARCH}.tar.gz" -o /tmp/go.tar.gz \ + && echo "${GO_SHA256} /tmp/go.tar.gz" | sha256sum -c - \ + && tar -C /usr/local -xzf /tmp/go.tar.gz \ + && rm /tmp/go.tar.gz + +ENV PATH="/usr/local/go/bin:$HOME/go/bin:$PATH" + +# Build grpcurl from source with patched Go and golang.org/x/* deps +# upgraded to latest to address current and future golang.org/x/* CVEs. +RUN GRPCURL_VERSION=v1.9.3 \ + && git clone --depth 1 --branch "${GRPCURL_VERSION}" https://github.com/fullstorydev/grpcurl.git /tmp/grpcurl \ + && cd /tmp/grpcurl \ + && go get google.golang.org/grpc@v1.79.3 \ + && go get github.com/go-jose/go-jose/v4@latest \ + && go get golang.org/x/crypto@latest golang.org/x/net@latest golang.org/x/text@latest golang.org/x/sys@latest golang.org/x/oauth2@latest \ + && go mod tidy \ + && go build -o /usr/local/bin/grpcurl ./cmd/grpcurl \ + && chmod +x /usr/local/bin/grpcurl \ + && rm -rf /tmp/grpcurl /root/go/pkg/mod /root/.cache/go-build +# Security fixes: upgrade all vulnerable system packages (S360 scan remediation) +# Covers CVE-2026-33416 and CVE-2026-33636 (libpng16-16) among others +RUN apt-get update && apt-get upgrade -y \ + && rm -rf /var/lib/apt/lists/* + +# Install InfluxDB 3 Core for HFT E2E tests (not available for armhf) +{% if CONFIGURED_ARCH != "armhf" %} +RUN set -eux \ +{% if CONFIGURED_ARCH == "arm64" %} + && INFLUXDB_ARCH=linux_arm64 \ +{% else %} + && INFLUXDB_ARCH=linux_amd64 \ +{% endif %} + && INFLUXDB_VERSION=3.9.0 \ + && cd /tmp \ + && curl --fail --show-error --location --retry 3 --retry-delay 5 -O "https://dl.influxdata.com/influxdb/releases/influxdb3-core-${INFLUXDB_VERSION}_${INFLUXDB_ARCH}.tar.gz" \ + && tar xzf "influxdb3-core-${INFLUXDB_VERSION}_${INFLUXDB_ARCH}.tar.gz" \ + && mv "influxdb3-core-${INFLUXDB_VERSION}/influxdb3" /usr/local/bin/influxdb3 \ + && chmod +x /usr/local/bin/influxdb3 \ + && cp -r "influxdb3-core-${INFLUXDB_VERSION}/python" /usr/local/lib/influxdb3-python \ + && echo "/usr/local/lib/influxdb3-python/lib" > /etc/ld.so.conf.d/influxdb3.conf \ + && ldconfig \ + && ln -sf /usr/local/bin/influxdb3 /usr/local/bin/influxd \ + && rm -f "influxdb3-core-${INFLUXDB_VERSION}_${INFLUXDB_ARCH}.tar.gz" \ + && rm -rf "/tmp/influxdb3-core-${INFLUXDB_VERSION}" \ + && pip3 install --target /usr/local/lib/influxdb3-python/lib/python3.13/site-packages "pip>=26.1" \ + && NEWPIP=$(ls -d /usr/local/lib/influxdb3-python/lib/python3.13/site-packages/pip-*.dist-info | sort -V | tail -1) \ + && find /usr/local/lib/influxdb3-python/lib/python3.13/site-packages -maxdepth 1 -name 'pip-*.dist-info' ! -path "$NEWPIP" -exec rm -rf {} + +{% endif %} {% if PTF_ENV_PY_VER == "py3" %} RUN update-alternatives --install /usr/bin/python python /usr/bin/python3 1 \ @@ -135,7 +187,7 @@ debs/{{ deb }}{{' '}} {% else %} RUN apt-get update # Install p4lang packages for DASH SAI support first and python-saithrift -RUN apt install -y --reinstall ./debs/p4lang-pi_0.1.0-15_amd64.deb ./debs/p4lang-bmv2_1.15.0-7_amd64.deb ./debs/p4lang-p4c_1.2.4.2-2_amd64.deb ./debs/python-saithrift_0.9.4_amd64.deb +RUN apt install -y --reinstall ./debs/p4lang-pi_0.1.1-1_amd64.deb ./debs/p4lang-bmv2_1.15.0-9_amd64.deb ./debs/p4lang-p4c_1.2.4.2-2_amd64.deb ./debs/python-saithrift_0.9.4_amd64.deb {% endif %} @@ -152,7 +204,7 @@ RUN rm -rf /debs \ && rm -f get-pip.py \ && pip install setuptools \ && pip install supervisor \ - && pip install ipython==5.4.1 \ + && pip install ipython \ && git clone https://github.com/p4lang/scapy-vxlan.git \ && cd scapy-vxlan \ && python setup.py install \ @@ -196,7 +248,6 @@ RUN rm -rf /debs \ && pip install pysubnettree \ && pip install paramiko \ && pip install flask \ - && pip install tornado \ && pip install exabgp==3.4.17\ && pip install pyaml \ && pip install pybrctl pyro4 rpyc yabgp \ @@ -206,12 +257,14 @@ RUN rm -rf /debs \ {% endif %} && mkdir -p /opt \ && cd /opt \ - && wget https://raw.githubusercontent.com/p4lang/ptf/master/ptf_nn/ptf_nn_agent.py + && wget https://raw.githubusercontent.com/p4lang/ptf/23ebe7237f3c284032bda02fbd1f4a98f1bc12f4/ptf_nn/ptf_nn_agent.py {% if PTF_ENV_PY_VER == "py3" %} -RUN git clone https://github.com/facebook/tac_plus \ +RUN curl -L -o tacacs.tar.gz https://shrubbery.net/pub/tac_plus/tacacs-F4.0.4.31.tar.gz\ + && mkdir -p tac_plus\ + && tar -xvzf tacacs.tar.gz -C tac_plus\ && cd tac_plus \ - && cd tacacs-F4.0.4.28 \ + && cd tacacs-F4.0.4.31 \ && ./configure LDFLAGS="-Wl,-rpath=/usr/local/lib" \ && make install \ && ln -s /usr/local/sbin/tac_plus /usr/sbin/tac_plus \ @@ -228,17 +281,23 @@ COPY ["tacacs+", "/etc/default"] # causes the process API to have a restricted # environment without access to the virtualenv. {% if PTF_ENV_PY_VER == "py3" %} - RUN pip3 install --break-system-packages tornado + RUN pip3 install --break-system-packages "tornado>=6.5.5" {% endif %} RUN python3 -m venv env-python3 # Activating a virtualenv. The virtualenv automatically works for RUN, ENV and CMD. +# Python 3 reproducible build hooks are not used after this point in docker-ptf. +# Once PATH is switched to the virtualenv, pip3 resolves to the venv binary +# instead of the host pip3 wrapper, so run_pip_command is bypassed. ENV VIRTUAL_ENV=/root/env-python3 ARG BACKUP_OF_PATH="$PATH" ENV PATH="$VIRTUAL_ENV/bin:$PATH" ENV LANG=C.UTF-8 LC_ALL=C.UTF-8 PYTHONIOENCODING=UTF-8 +# Upgrade pip to address CVE vulnerabilities in older pip versions +RUN pip3 install --upgrade pip + {% if PTF_ENV_PY_VER == "mixed" %} RUN python3 -m pip install --upgrade --ignore-installed pip {% endif %} @@ -274,25 +333,23 @@ RUN pip3 install Flask \ && pip3 install ipaddress \ && pip3 install pysubnettree \ && pip3 install paramiko \ - && pip3 install tornado \ + && pip3 install "tornado>=6.5.5" \ && pip3 install pyaml \ && pip3 install pyro4 rpyc \ && pip3 install unittest-xml-reporting \ && pip3 install python-libpcap \ - && pip3 install enum34 \ && pip3 install grpcio \ && pip3 install six \ && pip3 install itsdangerous \ && pip3 install retrying \ && pip3 install jinja2 -# gnxi/gnmi_cli_py requires protobuf 3.20.x or lower -# Bookworm by default use 5.29.x. Resetting it to 3.20.3 -# to avoid issues with gnmi tests. +# gnxi/gnmi_cli_py ships pre-generated _pb2.py stubs; they are +# Pin to 6.33.5 to match grpcio-tools keep a known-good version. RUN set -e; \ . /etc/os-release; \ if [ "$VERSION_CODENAME" = "bookworm" ]; then \ - pip install protobuf==3.20.3; \ + pip install protobuf==6.33.5; \ else \ pip install protobuf; \ fi @@ -305,6 +362,10 @@ RUN set -e; \ {{ install_python_wheels(docker_ptf_whls.split(' ')) }} {% endif %} +# Ensure setuptools >= 70.0.0 to address GHSA-cx63-2mw6-8hw5 +# Upgrade lxml to address GHSA-vfmq-68hx-4jfw +RUN pip3 install "setuptools>=70.0.0" "lxml>=5.3.2" + ## Adjust sshd settings RUN mkdir /var/run/sshd \ && echo 'root:root' | chpasswd \ @@ -336,35 +397,56 @@ COPY gnxi-patches/ gnxi/patches/ RUN cd gnxi \ && quilt push -a \ && cd gnmi_cli_py \ - && pip install -r requirements.txt + && pip install -r requirements.txt \ + && pip3 install protobuf==6.33.5 --no-binary=protobuf {% else %} + +# Since gnxi were generated with proto 3.x we need to regenerate _pb2 with the new proto version RUN cd gnxi \ - && quilt push -a + && quilt push -a \ + && cd gnmi_cli_py \ + && wget -q -O gnmi_ext.proto https://raw.githubusercontent.com/openconfig/gnmi/master/proto/gnmi_ext/gnmi_ext.proto \ + && wget -q -O gnmi.proto https://raw.githubusercontent.com/openconfig/gnmi/master/proto/gnmi/gnmi.proto \ + && sed -i 's|github.com/openconfig/gnmi/proto/gnmi_ext/gnmi_ext.proto|gnmi_ext.proto|' gnmi.proto \ + && python -m grpc_tools.protoc -I. --python_out=. --grpc_python_out=. gnmi_ext.proto gnmi.proto \ + && rm -f gnmi.proto gnmi_ext.proto {% endif %} # Deactivating a virtualenv. # ENV PATH="$BACKUP_OF_PATH" -# Install gnoic tool -# Without specifying the version there is a failure -# to determine the latest version automatically. -# -# root@a2014cb5bc54:~/gnoic# ./install.sh -# Warning: Failed to verify the package: https://api.github.com/repos/karimra/gnoic/releases/latest, the version is not specified -# Could not determine the latest release -# Failed to install gnoic -# For support, go to https://github.com/karimra/gnoic/issues -RUN git clone https://github.com/karimra/gnoic.git \ - && cd gnoic \ - && git checkout 57aac3d \ - && chmod +x install.sh \ - && ./install.sh --version 0.2.0 \ - && cd .. \ - && rm -rf gnoic +# Build gnmic from source at a pinned upstream main commit. Picks up the +# dependency fixes merged after v0.45.0 (grpc 1.79.3, otel-sdk 1.43.0, +# go-git 5.19.0, prometheus 0.311.3, etc.) that address the CVEs which +# forced removal in #27059. The golang.org/x/* modules are additionally +# upgraded to latest to clear current/future golang.org/x/* CVEs (the +# pinned commit still locks older x/crypto, x/net, etc.). Temporary until +# the next tagged gnmic release ships. +RUN GNMIC_REV=653dc5dd4ddcd3bd4197317875a10c1ce8b06653 \ + && git clone https://github.com/openconfig/gnmic.git /tmp/gnmic \ + && cd /tmp/gnmic \ + && git checkout "${GNMIC_REV}" \ + && go get golang.org/x/crypto@latest golang.org/x/net@latest golang.org/x/text@latest golang.org/x/sys@latest golang.org/x/oauth2@latest \ + && go mod tidy \ + && go build -o /usr/local/bin/gnmic . \ + && chmod +x /usr/local/bin/gnmic \ + && rm -rf /tmp/gnmic /root/go/pkg/mod /root/.cache/go-build + +# Remove Go toolchain to reduce image size +RUN rm -rf /usr/local/go "$(go env GOPATH 2>/dev/null || echo $HOME/go)" +ENV PATH="/usr/local/sbin:/usr/local/bin:/usr/sbin:/usr/bin:/sbin:/bin" {% if PTF_ENV_PY_VER == "py3" %} -# Install the python-saithrift into the virtual environment -RUN echo "/usr/lib/python3/dist-packages/saithrift-0.9-py3.11.egg" >> /root/env-python3/lib/python3.11/site-packages/easy-install.pth +# Register the python-saithrift egg on the virtualenv path. Use an +# executable .pth line that globs for the egg at every interpreter +# startup, so the path is resolved dynamically rather than pinned to a +# specific Python minor version. This keeps switch_sai_thrift importable +# even after test_update_saithrift_ptf swaps in a saithrift deb built for +# a different Python minor (e.g. py3.13 from a Trixie/OS13 DUT image). +# saithrift is thrift-generated pure Python, so the egg loads across py3.x. +RUN PYVER=$(python3 -c 'import sys; print("%d.%d" % sys.version_info[:2])') \ + && echo "import glob, sys; sys.path.extend(glob.glob('"'"'/usr/lib/python3/dist-packages/saithrift-0.9-py3.*.egg'"'"'))" \ + >> "/root/env-python3/lib/python${PYVER}/site-packages/easy-install.pth" {% endif %} # {% if PTF_ENV_PY_VER == "py3" %} @@ -399,6 +481,17 @@ RUN echo "/root/env-python3/lib/python3.11/site-packages" > /usr/lib/python3/dis RUN echo "PYTHONPATH=/root/env-python3/lib/python3.11/site-packages" >> /etc/environment +# Final system-level security upgrade: ensure every Debian package is at its +# latest patched version. This must run AFTER all apt-get install / dpkg -i +# steps so nothing slips through. +# The build system pins package versions via /etc/apt/preferences.d/01-versions-deb. +# Remove the pin so apt-get upgrade can pull in the latest security patches. +RUN rm -f /etc/apt/preferences.d/01-versions-deb \ + && apt-get update \ + && apt-get upgrade -y \ + && apt-get dist-upgrade -y \ + && rm -rf /var/lib/apt/lists/* + COPY ["*.ini", "/etc/ptf/"] EXPOSE 22 8009 diff --git a/dockers/docker-ptf/gnxi-patches/0005-Enhance-gnmi_cli_py-4.patch b/dockers/docker-ptf/gnxi-patches/0005-Enhance-gnmi_cli_py-4.patch index 78101fbba14..eb8fcc4b673 100644 --- a/dockers/docker-ptf/gnxi-patches/0005-Enhance-gnmi_cli_py-4.patch +++ b/dockers/docker-ptf/gnxi-patches/0005-Enhance-gnmi_cli_py-4.patch @@ -320,7 +320,7 @@ index dab2db6..e32b3ff 100644 -grpcio-tools==1.15.0 +grpcio==1.41.1 +grpcio-tools==1.41.1 - protobuf==3.6.1 --no-binary=protobuf + protobuf==6.33.5 --no-binary=protobuf six==1.12.0 -- 2.48.1.windows.1 diff --git a/dockers/docker-ptf/gnxi-patches/0009-chore-remove-deprecated-use_aliases-field-and-fix-syntax.patch b/dockers/docker-ptf/gnxi-patches/0009-chore-remove-deprecated-use_aliases-field-and-fix-syntax.patch new file mode 100644 index 00000000000..b0787f20a8f --- /dev/null +++ b/dockers/docker-ptf/gnxi-patches/0009-chore-remove-deprecated-use_aliases-field-and-fix-syntax.patch @@ -0,0 +1,47 @@ +From 82efb3e99dfffbb137858bce18a6acdec79c1e44 Mon Sep 17 00:00:00 2001 +From: Austin Pham +Date: Thu, 12 Mar 2026 09:57:50 +1100 +Subject: [PATCH] chore: remove deprecated use_aliases field and fix syntax + warning is not + +Signed-off-by: Austin Pham +--- + gnmi_cli_py/py_gnmicli.py | 7 +++---- + 1 file changed, 3 insertions(+), 4 deletions(-) + +diff --git a/gnmi_cli_py/py_gnmicli.py b/gnmi_cli_py/py_gnmicli.py +index b7d1165..150239a 100644 +--- a/gnmi_cli_py/py_gnmicli.py ++++ b/gnmi_cli_py/py_gnmicli.py +@@ -172,7 +172,6 @@ def _create_parser(): + parser.add_argument('--subscribe_mode', default=0, type=int, help='[0=STREAM, 1=ONCE, 2=POLL]') + parser.add_argument('--encoding', default=0, type=int, help='[0=JSON, 1=BYTES, 2=PROTO, 3=ASCII, 4=JSON_IETF]') + parser.add_argument('--qos', default=0, type=int, help='') +- parser.add_argument('--use_alias', action='store_true', help='use alias') + parser.add_argument('--create_connections', type=int, nargs='?', const=1, default=1, + help='Creates specific number of TCP connections with gNMI server side. ' + 'Default number of TCP connections is 1 and use -1 to create ' +@@ -489,7 +488,7 @@ def gen_request(paths, opt, prefix): + myqos = None + mysblist = gnmi_pb2.SubscriptionList(prefix=myprefix, mode=opt['subscribe_mode'], + allow_aggregation=opt['aggregate'], encoding=opt['encoding'], +- subscription=mysubs, use_aliases=opt['use_alias'], qos=myqos) ++ subscription=mysubs, qos=myqos) + mysubreq = gnmi_pb2.SubscribeRequest(subscribe=mysblist) + + print('Sending SubscribeRequest\n'+str(mysubreq)) +@@ -538,9 +537,9 @@ def subscribe_start(stub, options, req_iterator): + ' received\n'+str(response.error.message) + str(response.error)) + elif response.HasField('update'): + if filter_event_regex is not None: +- if filter_event_regex is not "": ++ if filter_event_regex != "": + match = check_event_response(response, filter_event_regex) +- if len(match) is not 0: ++ if len(match) != 0: + print(response) + update_count = update_count + 1 + else: +-- +2.34.1 + diff --git a/dockers/docker-ptf/gnxi-patches/0010-Fix-regex-to-allow-hyphen-character-in-key-name.patch b/dockers/docker-ptf/gnxi-patches/0010-Fix-regex-to-allow-hyphen-character-in-key-name.patch new file mode 100644 index 00000000000..a374ca47af7 --- /dev/null +++ b/dockers/docker-ptf/gnxi-patches/0010-Fix-regex-to-allow-hyphen-character-in-key-name.patch @@ -0,0 +1,13 @@ +diff --git a/gnmi_cli_py/py_gnmicli.py b/gnmi_cli_py/py_gnmicli.py +index 150239a..1d43eb6 100644 +--- a/gnmi_cli_py/py_gnmicli.py ++++ b/gnmi_cli_py/py_gnmicli.py +@@ -56,7 +56,7 @@ __version__ = '0.5' + _RE_PATH_COMPONENT = re.compile(r''' + ^ + (?P[^[]+) # gNMI path name +-(\[(?P\w+) # gNMI path key ++(\[(?P\w\D+) # gNMI path key + = + (?P.*) # gNMI path value + \])?$ diff --git a/dockers/docker-ptf/gnxi-patches/series b/dockers/docker-ptf/gnxi-patches/series index c9c7bdf8760..8f4d167fd6c 100644 --- a/dockers/docker-ptf/gnxi-patches/series +++ b/dockers/docker-ptf/gnxi-patches/series @@ -6,3 +6,5 @@ 0006-Add-support-for-extensive-configurations.patch 0007-Fix-py_gnmicli.py-POLL-mode.patch 0008-Fix-ipv6-addr-port-format-for-grpc.patch +0009-chore-remove-deprecated-use_aliases-field-and-fix-syntax.patch +0010-Fix-regex-to-allow-hyphen-character-in-key-name.patch diff --git a/dockers/docker-ptf/no-check-valid-until b/dockers/docker-ptf/no-check-valid-until deleted file mode 100644 index c7c25d017f7..00000000000 --- a/dockers/docker-ptf/no-check-valid-until +++ /dev/null @@ -1,4 +0,0 @@ -# Instruct apt-get to NOT check the "Valid Until" date in Release files -# Once the Debian team archives a repo, they stop updating this date - -Acquire::Check-Valid-Until "false"; diff --git a/dockers/docker-restapi-sidecar/Dockerfile.j2 b/dockers/docker-restapi-sidecar/Dockerfile.j2 index 4c36a395787..a06018d4963 100644 --- a/dockers/docker-restapi-sidecar/Dockerfile.j2 +++ b/dockers/docker-restapi-sidecar/Dockerfile.j2 @@ -1,5 +1,5 @@ {% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files %} -ARG BASE=docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} +ARG BASE=docker-config-engine-trixie-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} FROM $BASE AS base @@ -41,6 +41,8 @@ RUN chmod +x /usr/bin/systemd_stub.py /usr/share/sonic/scripts/k8s_pod_control.s FROM $BASE +ARG image_version + RUN --mount=type=bind,from=base,target=/changes-to-image rsync -axAX --no-D --exclude=/sys --exclude=/proc --exclude=/dev --exclude=resolv.conf /changes-to-image/ / # Make apt-get non-interactive diff --git a/dockers/docker-restapi-sidecar/cli-plugin-tests/test_systemd_stub.py b/dockers/docker-restapi-sidecar/cli-plugin-tests/test_systemd_stub.py index a748023f7f1..9b9f48ef5b2 100644 --- a/dockers/docker-restapi-sidecar/cli-plugin-tests/test_systemd_stub.py +++ b/dockers/docker-restapi-sidecar/cli-plugin-tests/test_systemd_stub.py @@ -1,6 +1,7 @@ # tests/test_systemd_stub.py import sys import os +import time import types import importlib @@ -131,6 +132,8 @@ def fake_db_hset(key: str, field: str, value: str) -> bool: monkeypatch.setattr(real_sidecar_common, "db_hset", fake_db_hset) # ----- Patch run_nsenter for host operations ----- + mktemp_counter = {"n": 0} + def fake_run_nsenter(args, *, text=True, input_bytes=None): commands.append(("nsenter", tuple(args))) @@ -144,6 +147,17 @@ def fake_run_nsenter(args, *, text=True, input_bytes=None): return 0, out, b"" return 1, "" if text else b"", "No such file" if text else b"No such file" + # /bin/mktemp + if args[:1] == ["/bin/mktemp"] and len(args) == 2: + template = args[1] + mktemp_counter["n"] += 1 + unique = template.replace("XXXXXX", f"{mktemp_counter['n']:06d}") + host_fs[unique] = b"" + out = unique + "\n" + if text: + return 0, out, "" + return 0, out.encode(), b"" + # /bin/sh -c "cat > /tmp/xxx" if ( len(args) == 3 @@ -193,6 +207,10 @@ def fake_read_file_bytes_local(path: str): # Now import systemd_stub after all patches are in place ss = importlib.import_module("systemd_stub") + # Reset the one-shot cleanup flag so each test starts fresh + ss._stale_unit_cleaned = False + monkeypatch.setattr(ss, "_STALE_UNIT_CLEANUP_ENABLED", True) + # Isolate POST_COPY_ACTIONS monkeypatch.setattr(ss, "POST_COPY_ACTIONS", {}) @@ -207,13 +225,11 @@ def test_sync_no_change_fast_path(ss): container_fs["/usr/share/sonic/systemd_scripts/restapi.sh"] = b"same" container_fs["/usr/share/sonic/systemd_scripts/container_checker_202311"] = b"same" container_fs["/usr/share/sonic/scripts/k8s_pod_control.sh"] = b"same" - container_fs["/usr/share/sonic/systemd_scripts/restapi.service_202311"] = b"same" # Put same files on host host_fs["/usr/bin/restapi.sh"] = b"same" host_fs["/bin/container_checker"] = b"same" - host_fs["/usr/share/sonic/scripts/k8s_pod_control.sh"] = b"same" - host_fs["/lib/systemd/system/restapi.service"] = b"same" + host_fs["/usr/share/sonic/scripts/docker-restapi-sidecar/k8s_pod_control.sh"] = b"same" ok = ss.ensure_sync() assert ok is True @@ -232,13 +248,11 @@ def test_sync_updates_and_post_actions(ss): container_fs["/usr/share/sonic/systemd_scripts/restapi.sh"] = b"NEW-RESTAPI" container_fs["/usr/share/sonic/systemd_scripts/container_checker_202311"] = b"NEW-CHECKER" container_fs["/usr/share/sonic/scripts/k8s_pod_control.sh"] = b"NEW-K8S" - container_fs["/usr/share/sonic/systemd_scripts/restapi.service_202311"] = b"NEW-SERVICE" # Put old files on host host_fs["/usr/bin/restapi.sh"] = b"OLD" host_fs["/bin/container_checker"] = b"OLD" - host_fs["/usr/share/sonic/scripts/k8s_pod_control.sh"] = b"OLD" - host_fs["/lib/systemd/system/restapi.service"] = b"OLD" + host_fs["/usr/share/sonic/scripts/docker-restapi-sidecar/k8s_pod_control.sh"] = b"OLD" ss.POST_COPY_ACTIONS["/bin/container_checker"] = [ ["sudo", "systemctl", "daemon-reload"], @@ -414,8 +428,7 @@ def mock_open(file, *args, **kwargs): expected_destinations = { "/usr/bin/restapi.sh", "/bin/container_checker", - "/usr/share/sonic/scripts/k8s_pod_control.sh", - "/lib/systemd/system/restapi.service", + "/usr/share/sonic/scripts/docker-restapi-sidecar/k8s_pod_control.sh", } # Verify all POST_COPY_ACTIONS keys are in expected sync destinations @@ -580,3 +593,395 @@ def mock_open(file, *args, **kwargs): # Verify IS_V1_ENABLED is set correctly assert ss.IS_V1_ENABLED == is_v1_enabled + + +# ─────────────────────────── Tests for stale restapi.service cleanup ─────────────────────────── + +STALE_UNIT = b"""[Unit] +Description=RestAPI container + +[Service] +User=root +ExecStartPre=/usr/bin/restapi.sh start +ExecStart=/usr/bin/restapi.sh wait +""" + +CLEAN_UNIT = b"""[Unit] +Description=RestAPI container + +[Service] +User=admin +ExecStartPre=/usr/bin/restapi.sh start +ExecStart=/usr/bin/restapi.sh wait +""" + + +def test_cleanup_stale_unit_restores_from_packed_file(ss): + """When host restapi.service has User=root, cleanup overwrites it with the packed clean file.""" + ss_mod, container_fs, host_fs, commands, config_db = ss + host_fs[ss_mod._HOST_RESTAPI_SERVICE] = STALE_UNIT + container_fs["/usr/share/sonic/systemd_scripts/restapi.service_202311"] = CLEAN_UNIT + + ss_mod._cleanup_stale_service_unit() + + # Host file should now be the clean version + assert host_fs[ss_mod._HOST_RESTAPI_SERVICE] == CLEAN_UNIT + # daemon-reload and restart should follow + post_cmds = [args for _, args in commands if args and args[0] == "sudo"] + assert ("sudo", "systemctl", "daemon-reload") in post_cmds + assert ("sudo", "systemctl", "restart", "restapi") in post_cmds + + +def test_cleanup_skips_when_user_admin(ss): + """When host restapi.service already has User=admin, cleanup is a no-op.""" + ss_mod, container_fs, host_fs, commands, config_db = ss + host_fs[ss_mod._HOST_RESTAPI_SERVICE] = CLEAN_UNIT + + ss_mod._cleanup_stale_service_unit() + + # No write should have occurred + write_cmds = [args for _, args in commands if args and args[0] == "/bin/sh"] + assert len(write_cmds) == 0 + + +def test_cleanup_skips_when_file_missing(ss): + """When host restapi.service doesn't exist, cleanup is a no-op.""" + ss_mod, container_fs, host_fs, commands, config_db = ss + # Don't put the file in host_fs + + ss_mod._cleanup_stale_service_unit() + + write_cmds = [args for _, args in commands if args and args[0] == "/bin/sh"] + assert len(write_cmds) == 0 + + +def test_cleanup_runs_only_once(ss): + """The cleanup is a one-shot; second call should be a no-op.""" + ss_mod, container_fs, host_fs, commands, config_db = ss + host_fs[ss_mod._HOST_RESTAPI_SERVICE] = STALE_UNIT + container_fs["/usr/share/sonic/systemd_scripts/restapi.service_202311"] = CLEAN_UNIT + + ss_mod._cleanup_stale_service_unit() + assert host_fs[ss_mod._HOST_RESTAPI_SERVICE] == CLEAN_UNIT + + # Revert host to stale to prove second call is a no-op + host_fs[ss_mod._HOST_RESTAPI_SERVICE] = STALE_UNIT + ss_mod._cleanup_stale_service_unit() + # Should still be stale because the flag prevented re-run + assert host_fs[ss_mod._HOST_RESTAPI_SERVICE] == STALE_UNIT + +def test_cleanup_retries_after_transient_read_failure(ss): + """When host_read_bytes fails transiently, cleanup retries on the next call.""" + ss_mod, container_fs, host_fs, commands, config_db = ss + container_fs["/usr/share/sonic/systemd_scripts/restapi.service_202311"] = CLEAN_UNIT + # First call: host file missing (transient failure) + # Don't put the file in host_fs + + ss_mod._cleanup_stale_service_unit() + assert ss_mod._stale_unit_cleaned is False # flag NOT set; will retry + + # Second call: host file now present with stale content + host_fs[ss_mod._HOST_RESTAPI_SERVICE] = STALE_UNIT + ss_mod._cleanup_stale_service_unit() + assert host_fs[ss_mod._HOST_RESTAPI_SERVICE] == CLEAN_UNIT + assert ss_mod._stale_unit_cleaned is True + + +def test_cleanup_disabled_by_env(ss, monkeypatch): + """When STALE_UNIT_CLEANUP_ENABLED=false, cleanup is skipped entirely.""" + ss_mod, container_fs, host_fs, commands, config_db = ss + monkeypatch.setattr(ss_mod, "_STALE_UNIT_CLEANUP_ENABLED", False) + host_fs[ss_mod._HOST_RESTAPI_SERVICE] = STALE_UNIT + container_fs["/usr/share/sonic/systemd_scripts/restapi.service_202311"] = CLEAN_UNIT + + ss_mod._cleanup_stale_service_unit() + # File should NOT be overwritten + assert host_fs[ss_mod._HOST_RESTAPI_SERVICE] == STALE_UNIT + # Flag set so it won't retry + assert ss_mod._stale_unit_cleaned is True + + +# ─────────────────────────── Tests for _resolve_branch ─────────────────────────── + +@pytest.mark.parametrize("branch_input, expected", [ + # Exact matches + ("202311", "202311"), + ("202405", "202405"), + ("202411", "202411"), + ("202505", "202505"), + ("202511", "202511"), + # Between two supported → nearest lower + ("202404", "202311"), + ("202407", "202405"), + ("202412", "202411"), # e.g. version 20241211.35 + ("202504", "202411"), + ("202510", "202505"), + ("202600", "202511"), + # Below minimum → falls back to 202311 (ERROR) + ("202210", "202311"), + ("202305", "202311"), + ("202310", "202311"), + # master / internal / private → latest + ("master", "202511"), + ("internal", "202511"), + ("private", "202511"), + # Non-numeric → falls back to 202311 (ERROR) + ("foobar", "202311"), +]) +def test_resolve_branch(ss, branch_input, expected): + systemd_stub, *_ = ss + assert systemd_stub._resolve_branch(branch_input) == expected + + +def test_resolve_branch_with_version_20241211(ss, monkeypatch, tmp_path): + """End-to-end: SONiC.20241211.35 → branch 202412 → resolved to 202411.""" + systemd_stub, *_ = ss + + version_file = tmp_path / "sonic_version.yml" + version_file.write_text("build_version: 'SONiC.20241211.35'") + + original_exists = os.path.exists + def mock_exists(path): + if path == "/etc/sonic/sonic_version.yml": + return True + return original_exists(path) + monkeypatch.setattr("os.path.exists", mock_exists) + + original_open = open + def mock_open(file, *args, **kwargs): + if file == "/etc/sonic/sonic_version.yml": + return original_open(str(version_file), *args, **kwargs) + return original_open(file, *args, **kwargs) + monkeypatch.setattr("builtins.open", mock_open) + + detected = systemd_stub._get_branch_name() + assert detected == "202412" + assert systemd_stub._resolve_branch(detected) == "202411" + + +def test_resolve_branch_with_version_20241211_kube(ss, monkeypatch, tmp_path): + """End-to-end: 20241211.35-kube → branch 202412 → resolved to 202411.""" + systemd_stub, *_ = ss + + version_file = tmp_path / "sonic_version.yml" + version_file.write_text("build_version: '20241211.35-kube'") + + original_exists = os.path.exists + def mock_exists(path): + if path == "/etc/sonic/sonic_version.yml": + return True + return original_exists(path) + monkeypatch.setattr("os.path.exists", mock_exists) + + original_open = open + def mock_open(file, *args, **kwargs): + if file == "/etc/sonic/sonic_version.yml": + return original_open(str(version_file), *args, **kwargs) + return original_open(file, *args, **kwargs) + monkeypatch.setattr("builtins.open", mock_open) + + detected = systemd_stub._get_branch_name() + assert detected == "202412" + assert systemd_stub._resolve_branch(detected) == "202411" + + +def test_resolve_branch_supported_branches_constant(ss): + """Test that SUPPORTED_BRANCHES is defined and contains expected values.""" + systemd_stub, *_ = ss + assert hasattr(systemd_stub, "SUPPORTED_BRANCHES") + assert systemd_stub.SUPPORTED_BRANCHES == ["202311", "202405", "202411", "202505", "202511"] + + +def test_master_branch_uses_resolved_branch_for_sync(monkeypatch, tmp_path): + """Test that master branch gets resolved to 202511 and uses proper sync files.""" + if "systemd_stub" in sys.modules: + del sys.modules["systemd_stub"] + + # Create fake sonic_version.yml for master + version_file = tmp_path / "sonic_version.yml" + version_file.write_text("build_version: 'SONiC.master.921927-18199d73f'\n") + + monkeypatch.delenv("IS_V1_ENABLED", raising=False) + + # Mock file operations + original_exists = os.path.exists + def mock_exists(p): + if p == "/etc/sonic/sonic_version.yml": + return True + return original_exists(p) + monkeypatch.setattr("os.path.exists", mock_exists) + + original_open = open + def mock_open(file, *args, **kwargs): + if file == "/etc/sonic/sonic_version.yml": + return original_open(str(version_file), *args, **kwargs) + return original_open(file, *args, **kwargs) + + monkeypatch.setattr("builtins.open", mock_open) + + ss = importlib.import_module("systemd_stub") + + # Verify branch detection and resolution + detected = ss._get_branch_name() + assert detected == "master" + resolved = ss._resolve_branch(detected) + assert resolved == "202511" + + +# ─────────────────────────── Tests for regex pattern optimization ─────────────────────────── + +def test_regex_patterns_compiled_at_module_level(ss): + """Test that regex patterns are compiled at module level, not in functions.""" + systemd_stub, *_ = ss + + # Verify that the pre-compiled patterns exist + assert hasattr(systemd_stub, "_MASTER_PATTERN") + assert hasattr(systemd_stub, "_INTERNAL_PATTERN") + assert hasattr(systemd_stub, "_DATE_PATTERN") + assert hasattr(systemd_stub, "_DATE_EXTRACT_PATTERN") + + # Verify they are compiled regex pattern objects + import re + assert isinstance(systemd_stub._MASTER_PATTERN, re.Pattern) + assert isinstance(systemd_stub._INTERNAL_PATTERN, re.Pattern) + assert isinstance(systemd_stub._DATE_PATTERN, re.Pattern) + assert isinstance(systemd_stub._DATE_EXTRACT_PATTERN, re.Pattern) + + +def test_master_pattern_matches_correctly(ss): + """Test that _MASTER_PATTERN correctly matches master branch versions.""" + systemd_stub, *_ = ss + + # Should match + assert systemd_stub._MASTER_PATTERN.match("SONiC.master.921927-18199d73f") + assert systemd_stub._MASTER_PATTERN.match("master.921927-18199d73f") + assert systemd_stub._MASTER_PATTERN.match("SONIC.MASTER.123456-abcdef12") # case insensitive + + # Should not match + assert not systemd_stub._MASTER_PATTERN.match("SONiC.internal.123456-abcdef12") + assert not systemd_stub._MASTER_PATTERN.match("SONiC.20231110.19") + assert not systemd_stub._MASTER_PATTERN.match("master") # missing numbers/hash + + +def test_internal_pattern_matches_correctly(ss): + """Test that _INTERNAL_PATTERN correctly matches internal branch versions.""" + systemd_stub, *_ = ss + + # Should match + assert systemd_stub._INTERNAL_PATTERN.match("SONiC.internal.135691748-dbb8d29985") + assert systemd_stub._INTERNAL_PATTERN.match("internal.135691748-dbb8d29985") + assert systemd_stub._INTERNAL_PATTERN.match("SONIC.INTERNAL.123456789-abc1234567") + + # Should not match + assert not systemd_stub._INTERNAL_PATTERN.match("SONiC.master.123456-abcdef12") + assert not systemd_stub._INTERNAL_PATTERN.match("SONiC.20231110.19") + assert not systemd_stub._INTERNAL_PATTERN.match("internal") # missing numbers/hash + + +def test_date_pattern_matches_correctly(ss): + """Test that _DATE_PATTERN correctly matches date-based versions.""" + systemd_stub, *_ = ss + + # Should match + assert systemd_stub._DATE_PATTERN.match("SONiC.20231110.19") + assert systemd_stub._DATE_PATTERN.match("20240515.25") + assert systemd_stub._DATE_PATTERN.match("SONiC.20241110.kw.24") + assert systemd_stub._DATE_PATTERN.match("20250515") + + # Should not match + assert not systemd_stub._DATE_PATTERN.match("SONiC.master.123456-abcdef12") + assert not systemd_stub._DATE_PATTERN.match("SONiC.internal.123456-abcdef12") + assert not systemd_stub._DATE_PATTERN.match("2023111") # only 7 digits + + +def test_date_extract_pattern_extracts_correctly(ss): + """Test that _DATE_EXTRACT_PATTERN correctly extracts year and month.""" + systemd_stub, *_ = ss + + # Test various date formats + match = systemd_stub._DATE_EXTRACT_PATTERN.search("SONiC.20231110.19") + assert match + assert match.groups() == ("2023", "11") + + match = systemd_stub._DATE_EXTRACT_PATTERN.search("20240515.25") + assert match + assert match.groups() == ("2024", "05") + + match = systemd_stub._DATE_EXTRACT_PATTERN.search("SONiC.20241110.kw.24") + assert match + assert match.groups() == ("2024", "11") + + # Should not match + match = systemd_stub._DATE_EXTRACT_PATTERN.search("SONiC.master.123456-abcdef12") + assert not match + + +# ─────────────────────────── Tests for POST_COPY_ACTIONS docker rm --force ─────────────────────────── + +def test_post_copy_actions_use_docker_rm_force(ss): + """POST_COPY_ACTIONS for restapi.sh should use 'docker rm --force' instead of plain 'docker rm'.""" + ss_mod, *_ = ss + # Re-import to get the real POST_COPY_ACTIONS (fixture clears them) + if "systemd_stub" in sys.modules: + del sys.modules["systemd_stub"] + ss_fresh = importlib.import_module("systemd_stub") + + actions = ss_fresh.POST_COPY_ACTIONS["/usr/bin/restapi.sh"] + # Should have docker stop, docker rm --force, daemon-reload, restart + assert ["sudo", "docker", "stop", "restapi"] in actions + assert ["sudo", "docker", "rm", "--force", "restapi"] in actions + # Old plain 'docker rm' should NOT be present + assert ["sudo", "docker", "rm", "restapi"] not in actions + + +# ─────────────────────────── Tests for sync ordering (k8s_pod_control before restapi.sh) ─────────────── + +def test_sync_order_k8s_pod_control_before_restapi(ss): + """k8s_pod_control.sh must be synced before restapi.sh to avoid 'No such file' errors.""" + ss_mod, container_fs, host_fs, commands, config_db = ss + + container_fs["/usr/share/sonic/systemd_scripts/restapi.sh"] = b"NEW-RESTAPI" + container_fs["/usr/share/sonic/systemd_scripts/container_checker_202311"] = b"NEW-CHECKER" + container_fs["/usr/share/sonic/scripts/k8s_pod_control.sh"] = b"NEW-K8S" + + host_fs["/usr/bin/restapi.sh"] = b"OLD" + host_fs["/bin/container_checker"] = b"OLD" + host_fs["/usr/share/sonic/scripts/docker-restapi-sidecar/k8s_pod_control.sh"] = b"OLD" + + ok = ss_mod.ensure_sync() + assert ok is True + + # Extract the order of file writes by looking at /bin/mv commands (atomic write pattern) + mv_dsts = [args[3] for _, args in commands if args[:1] == ("/bin/mv",) and len(args) == 4] + # k8s_pod_control.sh dest must appear before restapi.sh dest + k8s_dst = "/usr/share/sonic/scripts/docker-restapi-sidecar/k8s_pod_control.sh" + restapi_dst = "/usr/bin/restapi.sh" + if k8s_dst in mv_dsts and restapi_dst in mv_dsts: + assert mv_dsts.index(k8s_dst) < mv_dsts.index(restapi_dst), \ + f"k8s_pod_control.sh must be synced before restapi.sh, but order was: {mv_dsts}" + + +# ─────────────────────────── Tests for main() jitter ─────────────────────────── + +def test_main_loop_uses_jitter(ss, monkeypatch): + """The sync loop sleep should include jitter (interval ± 10%).""" + ss_mod, container_fs, host_fs, commands, config_db = ss + + sleep_values = [] + original_sleep = time.sleep + + def mock_sleep(secs): + sleep_values.append(secs) + raise KeyboardInterrupt # break out of loop after first sleep + + monkeypatch.setattr(time, "sleep", mock_sleep) + monkeypatch.setattr(ss_mod, "ensure_sync", lambda: True) + monkeypatch.setattr(sys, "argv", ["systemd_stub.py", "--interval", "100"]) + + # main() will do initial sync, then enter loop, sleep with jitter, then KeyboardInterrupt + with pytest.raises(KeyboardInterrupt): + ss_mod.main() + + assert len(sleep_values) == 1 + # With 10% jitter on interval=100, sleep should be in [90, 110] + assert 90 <= sleep_values[0] <= 110, f"Sleep value {sleep_values[0]} outside jitter range [90, 110]" diff --git a/dockers/docker-restapi-sidecar/supervisord.conf b/dockers/docker-restapi-sidecar/supervisord.conf index ebf5c50f531..c6d0bb44f19 100644 --- a/dockers/docker-restapi-sidecar/supervisord.conf +++ b/dockers/docker-restapi-sidecar/supervisord.conf @@ -39,7 +39,7 @@ environment=IS_V1_ENABLED=%(ENV_IS_V1_ENABLED)s [eventlistener:supervisor-proc-exit-listener] command=/usr/bin/supervisor-proc-exit-listener-rs --container-name restapi -events=PROCESS_STATE_EXITED,PROCESS_STATE_RUNNING +events=PROCESS_STATE_EXITED,PROCESS_STATE_RUNNING,PROCESS_STATE_FATAL autostart=true autorestart=unexpected buffer_size=1024 diff --git a/dockers/docker-restapi-sidecar/systemd_scripts/restapi.service b/dockers/docker-restapi-sidecar/systemd_scripts/restapi.service deleted file mode 100644 index cc91531c0e5..00000000000 --- a/dockers/docker-restapi-sidecar/systemd_scripts/restapi.service +++ /dev/null @@ -1,16 +0,0 @@ -[Unit] -Description=RestAPI container -Requires=config-setup.service -After=config-setup.service -BindsTo=sonic.target -After=sonic.target - -[Service] -User=root -ExecStartPre=/usr/bin/restapi.sh start -ExecStart=/usr/bin/restapi.sh wait -ExecStop=/usr/bin/restapi.sh stop -RestartSec=30 - -[Install] -WantedBy=sonic.target diff --git a/dockers/docker-restapi-sidecar/systemd_scripts/restapi.service_202505 b/dockers/docker-restapi-sidecar/systemd_scripts/restapi.service_202505 index f22719a6ba9..c99269ccee9 100644 --- a/dockers/docker-restapi-sidecar/systemd_scripts/restapi.service_202505 +++ b/dockers/docker-restapi-sidecar/systemd_scripts/restapi.service_202505 @@ -6,6 +6,8 @@ BindsTo=sonic.target After=sonic.target [Service] +Environment="NUM_DPU=0" +Environment="IS_DPU_DEVICE=false" User=admin ExecStartPre=/usr/bin/restapi.sh start ExecStart=/usr/bin/restapi.sh wait diff --git a/dockers/docker-restapi-sidecar/systemd_scripts/restapi.sh b/dockers/docker-restapi-sidecar/systemd_scripts/restapi.sh index 690a07311e7..833275a2d77 100644 --- a/dockers/docker-restapi-sidecar/systemd_scripts/restapi.sh +++ b/dockers/docker-restapi-sidecar/systemd_scripts/restapi.sh @@ -1,3 +1,3 @@ #!/bin/bash -# Thin wrapper for restapi pod control - uses shared k8s_pod_control.sh -exec /usr/share/sonic/scripts/k8s_pod_control.sh restapi "$@" +# Thin wrapper for restapi pod control - uses sidecar-specific k8s_pod_control.sh +exec /usr/share/sonic/scripts/docker-restapi-sidecar/k8s_pod_control.sh restapi "$@" diff --git a/dockers/docker-restapi-sidecar/systemd_stub.py b/dockers/docker-restapi-sidecar/systemd_stub.py index da7bd9e41fa..2de3779dbf1 100644 --- a/dockers/docker-restapi-sidecar/systemd_stub.py +++ b/dockers/docker-restapi-sidecar/systemd_stub.py @@ -2,6 +2,7 @@ from __future__ import annotations import os +import random import re import subprocess import time @@ -10,17 +11,24 @@ from typing import List from sonic_py_common.sidecar_common import ( - get_bool_env_var, logger, SyncItem, - sync_items, SYNC_INTERVAL_S + get_bool_env_var, logger, SyncItem, run_nsenter, + read_file_bytes_local, host_read_bytes, host_write_atomic, + sync_items, cleanup_native_container, SYNC_INTERVAL_S ) -# ───────────── restapi.service sync paths ───────────── -HOST_RESTAPI_SERVICE = "/lib/systemd/system/restapi.service" +# ───────────── restapi.service paths ───────────── +_HOST_RESTAPI_SERVICE = "/lib/systemd/system/restapi.service" IS_V1_ENABLED = get_bool_env_var("IS_V1_ENABLED", default=False) logger.log_notice(f"IS_V1_ENABLED={IS_V1_ENABLED}") +# Compile regex patterns once at module level to avoid repeated compilation +_MASTER_PATTERN = re.compile(r'^(?:SONiC\.)?master\.\d+-[a-f0-9]+$', re.IGNORECASE) +_INTERNAL_PATTERN = re.compile(r'^(?:SONiC\.)?internal\.\d+-[a-f0-9]+$', re.IGNORECASE) +_DATE_PATTERN = re.compile(r'^(?:SONiC\.)?\d{8}\b', re.IGNORECASE) +_DATE_EXTRACT_PATTERN = re.compile(r'^(?:SONiC\.)?(\d{4})(\d{2})\d{2}\b', re.IGNORECASE) + def _get_branch_name() -> str: """ @@ -61,19 +69,18 @@ def _get_branch_name() -> str: return "private" # Pattern 1: Master - [SONiC.]master.XXXXXX-XXXXXXXX - master_pattern = re.compile(r'^(?:SONiC\.)?master\.\d+-[a-f0-9]+$', re.IGNORECASE) - if master_pattern.match(version): + if _MASTER_PATTERN.match(version): logger.log_notice(f"Detected master branch from version: {version}") return "master" # Pattern 2: Internal - [SONiC.]internal.XXXXXXXXX-XXXXXXXXXX - elif re.match(r'^(?:SONiC\.)?internal\.\d+-[a-f0-9]+$', version, re.IGNORECASE): + elif _INTERNAL_PATTERN.match(version): logger.log_notice(f"Detected internal branch from version: {version}") return "internal" # Pattern 3: Official feature branch - [SONiC.]YYYYMMDD.* (e.g., 20241110.kw.24) - elif re.match(r'^(?:SONiC\.)?\d{8}\b', version, re.IGNORECASE): - date_match = re.search(r'^(?:SONiC\.)?(\d{4})(\d{2})\d{2}\b', version, re.IGNORECASE) + elif _DATE_PATTERN.match(version): + date_match = _DATE_EXTRACT_PATTERN.search(version) if date_match: year, month = date_match.groups() branch = f"{year}{month}" @@ -89,13 +96,9 @@ def _get_branch_name() -> str: return "private" POST_COPY_ACTIONS = { - "/lib/systemd/system/restapi.service": [ - ["sudo", "systemctl", "daemon-reload"], - ["sudo", "systemctl", "restart", "restapi"], - ], "/usr/bin/restapi.sh": [ ["sudo", "docker", "stop", "restapi"], - ["sudo", "docker", "rm", "restapi"], + ["sudo", "docker", "rm", "--force", "restapi"], ["sudo", "systemctl", "daemon-reload"], ["sudo", "systemctl", "restart", "restapi"], ], @@ -103,17 +106,108 @@ def _get_branch_name() -> str: ["sudo", "systemctl", "daemon-reload"], ["sudo", "systemctl", "restart", "monit"], ], + "/usr/share/sonic/scripts/docker-restapi-sidecar/k8s_pod_control.sh": [ + ["sudo", "systemctl", "daemon-reload"], + ["sudo", "systemctl", "restart", "restapi"], + ], } +SUPPORTED_BRANCHES = sorted(["202311", "202405", "202411", "202505", "202511"]) + + +def _resolve_branch(branch_name: str) -> str: + """Map detected branch to the nearest lower supported branch. + + - Exact match in SUPPORTED_BRANCHES → use as-is. + - "master" / "internal" / "private" → latest supported branch (WARN). + - Numeric YYYYMM between two supported branches → highest supported <= it. + - Below 202311 → falls back to 202311 (ERROR). + """ + if branch_name in SUPPORTED_BRANCHES: + return branch_name + + if branch_name in ("master", "internal", "private"): + resolved = SUPPORTED_BRANCHES[-1] + logger.log_warning(f"Branch '{branch_name}' mapped to latest supported: {resolved}") + return resolved + + if not branch_name.isdigit(): + logger.log_error(f"Cannot resolve non-numeric branch: {branch_name}, falling back to {SUPPORTED_BRANCHES[0]}") + return SUPPORTED_BRANCHES[0] + + # String comparison is safe: all YYYYMM values are fixed 6-digit format + candidates = [b for b in SUPPORTED_BRANCHES if b <= branch_name] + if not candidates: + logger.log_error(f"Branch '{branch_name}' is below minimum supported, falling back to {SUPPORTED_BRANCHES[0]}") + return SUPPORTED_BRANCHES[0] + + resolved = candidates[-1] + if resolved != branch_name: + logger.log_notice(f"Branch '{branch_name}' mapped to nearest lower supported: {resolved}") + return resolved + + +# TO-be-deleted in next rounds releases, as long as restapi.service rollouts have been restored. +# Previous sidecar versions overwrote /lib/systemd/system/restapi.service +# with a variant containing "User=root" (needed for kubectl). Now that kubectl +# is gone we no longer sync that file, but hosts upgraded from the old sidecar +# still carry the stale unit. This one-shot cleanup restores the original +# build-template version (User=admin) packed inside this container. +_STALE_UNIT_CLEANUP_ENABLED = get_bool_env_var("STALE_UNIT_CLEANUP_ENABLED", default=True) +_stale_unit_cleaned = False + +def _cleanup_stale_service_unit() -> None: + """If the host restapi.service still has User=root from a prior sidecar, restore it.""" + global _stale_unit_cleaned + if _stale_unit_cleaned: + return + if not _STALE_UNIT_CLEANUP_ENABLED: + _stale_unit_cleaned = True + return + + host_bytes = host_read_bytes(_HOST_RESTAPI_SERVICE) + if host_bytes is None: + return # transient failure or file missing; retry next cycle + + host_content = host_bytes.decode("utf-8", errors="ignore") + if "\nUser=root\n" not in f"\n{host_content}\n": + _stale_unit_cleaned = True # unit is clean; no further retries needed + return + + # Determine the correct per-branch clean file + detected_branch = _get_branch_name() + branch_name = _resolve_branch(detected_branch) + container_service_path = f"/usr/share/sonic/systemd_scripts/restapi.service_{branch_name}" + + clean_bytes = read_file_bytes_local(container_service_path) + if clean_bytes is None: + logger.log_error(f"Cannot read restore file {container_service_path}") + return # container file missing; retry next cycle + + logger.log_notice("Stale sidecar restapi.service detected (User=root); restoring from packed file") + if not host_write_atomic(_HOST_RESTAPI_SERVICE, clean_bytes, 0o644): + logger.log_error("Failed to restore restapi.service") + return # write failed; retry next cycle + rc, _, err = run_nsenter(["sudo", "systemctl", "daemon-reload"]) + if rc != 0: + logger.log_error(f"daemon-reload failed after restapi.service restore: {err}") + return # retry next cycle + rc, _, err = run_nsenter(["sudo", "systemctl", "restart", "restapi"]) + if rc != 0: + logger.log_error(f"restapi restart failed after restapi.service restore: {err}") + return # retry next cycle + _stale_unit_cleaned = True + logger.log_notice("Restored restapi.service and restarted") + + def ensure_sync() -> bool: + _cleanup_stale_service_unit() + cleanup_native_container("restapi", IS_V1_ENABLED) # Evaluate branch and source paths each time to allow retry on runtime failures - branch_name = _get_branch_name() - - # Map to available branch-specific files: {202311,202405,202411,202505,202511} - if branch_name not in ["202311", "202405", "202411", "202505", "202511"]: - logger.log_error(f"Unsupported branch: {branch_name}. Only 202311, 202405, 202411, 202505, 202511 are supported.") - return False + detected_branch = _get_branch_name() + + branch_name = _resolve_branch(detected_branch) # restapi.sh: per-branch when IS_V1_ENABLED, otherwise use common restapi.sh restapi_src = ( @@ -123,14 +217,16 @@ def ensure_sync() -> bool: ) container_checker_src = f"/usr/share/sonic/systemd_scripts/container_checker_{branch_name}" - container_restapi_service = f"/usr/share/sonic/systemd_scripts/restapi.service_{branch_name}" # Construct SYNC_ITEMS with evaluated paths + # k8s_pod_control.sh must be synced before restapi.sh because the new + # restapi.sh is a thin wrapper that exec's k8s_pod_control.sh. If + # restapi.sh is synced first its post-copy action (systemctl restart + # restapi) would fail with "No such file or directory". sync_items_list: List[SyncItem] = [ + SyncItem("/usr/share/sonic/scripts/k8s_pod_control.sh", "/usr/share/sonic/scripts/docker-restapi-sidecar/k8s_pod_control.sh", mode=0o755), SyncItem(restapi_src, "/usr/bin/restapi.sh", mode=0o755), SyncItem(container_checker_src, "/bin/container_checker", mode=0o755), - SyncItem("/usr/share/sonic/scripts/k8s_pod_control.sh", "/usr/share/sonic/scripts/k8s_pod_control.sh", mode=0o755), - SyncItem(container_restapi_service, HOST_RESTAPI_SERVICE, mode=0o644), ] return sync_items(sync_items_list, POST_COPY_ACTIONS) @@ -155,6 +251,7 @@ def parse_args() -> argparse.Namespace: def main() -> int: args = parse_args() + jitter_pct = 0.1 # ±10% jitter applied to sync loop interval if args.no_post_actions: POST_COPY_ACTIONS.clear() logger.log_info("Post-copy host actions DISABLED for this run") @@ -172,7 +269,8 @@ def main() -> int: return 0 if ok else 1 while True: try: - time.sleep(args.interval) + jitter = args.interval * random.uniform(-jitter_pct, jitter_pct) + time.sleep(args.interval + jitter) ok = ensure_sync() if not ok: logger.log_error("Sync failed. Will retry in next iteration.") diff --git a/dockers/docker-restapi-watchdog/Dockerfile.j2 b/dockers/docker-restapi-watchdog/Dockerfile.j2 index 68d807eea37..7ed600c4fbd 100644 --- a/dockers/docker-restapi-watchdog/Dockerfile.j2 +++ b/dockers/docker-restapi-watchdog/Dockerfile.j2 @@ -1,4 +1,4 @@ -FROM docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} AS builder +FROM docker-config-engine-trixie-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} AS builder # Update apt's cache of available packages RUN apt-get update && apt-get install -y \ @@ -7,7 +7,7 @@ RUN apt-get update && apt-get install -y \ # Install Rust/Cargo via rustup ARG RUST_ROOT=/usr/.cargo RUN RUSTUP_HOME=$RUST_ROOT CARGO_HOME=$RUST_ROOT bash -c \ - 'curl --proto "=https" -sSf https://sh.rustup.rs | sh -s -- --default-toolchain 1.79.0 -y' + 'curl --proto "=https" -sSf https://sh.rustup.rs | sh -s -- --default-toolchain 1.83.0 -y' ENV RUSTUP_HOME=$RUST_ROOT ENV PATH $PATH:$RUST_ROOT/bin @@ -18,7 +18,7 @@ COPY watchdog/ ./ # Build from within /watchdog RUN cargo build --release -FROM docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} +FROM docker-config-engine-trixie-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} ARG docker_container_name ARG image_version @@ -31,7 +31,7 @@ ENV IMAGE_VERSION=$image_version COPY ["supervisord.conf", "/etc/supervisor/conf.d/"] # Copy the compiled Rust binary from the builder stage -COPY --from=builder /watchdog/target/release/watchdog /usr/bin/restapi_watchdog +COPY --from=builder /watchdog/target/release/restapi_watchdog /usr/bin/restapi_watchdog RUN chmod +x /usr/bin/restapi_watchdog ENTRYPOINT ["/usr/local/bin/supervisord"] diff --git a/dockers/docker-restapi-watchdog/watchdog/Cargo.lock b/dockers/docker-restapi-watchdog/watchdog/Cargo.lock new file mode 100644 index 00000000000..ffee89033bb --- /dev/null +++ b/dockers/docker-restapi-watchdog/watchdog/Cargo.lock @@ -0,0 +1,466 @@ +# This file is automatically @generated by Cargo. +# It is not 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= "0.1.7" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "11532158c46691caf0f2593ea8358fed6bbf68a0315e80aae9bd41fbade684a1" +dependencies = [ + "proc-macro2", + "quote", + "syn", + "synstructure", +] + +[[package]] +name = "zerotrie" +version = "0.2.4" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "0f9152d31db0792fa83f70fb2f83148effb5c1f5b8c7686c3459e361d9bc20bf" +dependencies = [ + "displaydoc", + "yoke", + "zerofrom", +] + +[[package]] +name = "zerovec" +version = "0.11.6" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "90f911cbc359ab6af17377d242225f4d75119aec87ea711a880987b18cd7b239" +dependencies = [ + "yoke", + "zerofrom", + "zerovec-derive", +] + +[[package]] +name = "zerovec-derive" +version = "0.11.3" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "625dc425cab0dca6dc3c3319506e6593dcb08a9f387ea3b284dbd52a92c40555" +dependencies = [ + "proc-macro2", + "quote", + "syn", +] + +[[package]] +name = "zmij" +version = "1.0.21" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "b8848ee67ecc8aedbaf3e4122217aff892639231befc6a1b58d29fff4c2cabaa" diff --git a/dockers/docker-restapi-watchdog/watchdog/Cargo.toml b/dockers/docker-restapi-watchdog/watchdog/Cargo.toml index 7bf0047377a..3f253b1015b 100644 --- a/dockers/docker-restapi-watchdog/watchdog/Cargo.toml +++ b/dockers/docker-restapi-watchdog/watchdog/Cargo.toml @@ -1,8 +1,10 @@ [package] -name = "watchdog" +name = "restapi_watchdog" version = "0.1.0" edition = "2021" +description = "watchdog for the restapi container" [dependencies] serde = { version = "1.0", features = ["derive"] } serde_json = "1.0" +redis = "0.23.3" diff --git a/dockers/docker-restapi-watchdog/watchdog/src/main.rs b/dockers/docker-restapi-watchdog/watchdog/src/main.rs index 115d19b7e3f..a4cf6ca91be 100644 --- a/dockers/docker-restapi-watchdog/watchdog/src/main.rs +++ b/dockers/docker-restapi-watchdog/watchdog/src/main.rs @@ -1,14 +1,79 @@ use std::io::{BufRead, BufReader, Write}; use std::net::{TcpListener, TcpStream}; use std::time::Duration; +use std::path::Path; use serde::Serialize; +use redis::{Commands, Connection}; -#[derive(serde::Serialize)] +const CONFIG_DB: i32 = 4; +const REDIS_PORT: i32 = 6379; +const RESTAPI_CERTS: &str = "RESTAPI|certs"; +const DEFAULT_RESTAPI_CERT_DIR: &str = "/etc/sonic/credentials/"; + +#[derive(Serialize)] struct HealthStatus { restapi_status: String, } +// Opens a Redis connection to CONFIG DB. +// Returns None on any error (client creation or connection). +fn redis_connect() -> Option { + let client = match redis::Client::open(format!("redis://127.0.0.1:{}/{}", REDIS_PORT, CONFIG_DB)) { + Ok(c) => c, + Err(e) => { eprintln!("Redis client error: {e}"); return None; } + }; + match client.get_connection() { + Ok(conn) => Some(conn), + Err(e) => { eprintln!("Redis connection error: {e}"); None } + } +} + +// Fetches a hash field from CONFIG DB. +// Returns None if HGET fails. +fn redis_hget(conn: &mut Connection, hash: &str, field: &str) -> Option { + match conn.hget::<_, _, Option>(hash, field) { + Ok(v) => v, + Err(e) => { eprintln!("Redis HGET error {hash}.{field}: {e}"); None } + } +} + +// Check if root cert, server cert, and server key exist +fn check_certificates() -> bool { + // Connect to Redis + let mut conn = match redis_connect() { + Some(c) => c, + None => { eprintln!("Failed to connect to Redis. Assuming certificates do not exist."); return false; } + }; + // Read the certificate and key paths from Redis + let root_cert_path = match redis_hget(&mut conn, RESTAPI_CERTS, "ca_crt") { + Some(path) => path, + None => { eprintln!("Root certificate path not found in Redis. Assuming the cert does not exist."); return false; } + }; + let server_cert_path = match redis_hget(&mut conn, RESTAPI_CERTS, "server_crt") { + Some(path) => path, + None => { eprintln!("Server certificate path not found in Redis. Assuming the cert does not exist."); return false; } + }; + let server_key_path = match redis_hget(&mut conn, RESTAPI_CERTS, "server_key") { + Some(path) => path, + None => { eprintln!("Server key path not found in Redis. Assuming the key does not exist."); return false; } + }; + let cert_paths = [ + root_cert_path.as_str(), + server_cert_path.as_str(), + server_key_path.as_str(), + ]; + + cert_paths.iter().all(|path| + if path.starts_with(DEFAULT_RESTAPI_CERT_DIR) { + Path::new(path).exists() + } else { + println!("The path {path} is outside the default directory. Assuming it exists."); + true + } + ) +} + // Check restapi program status fn check_restapi_status() -> String { let restapi_https_port = 8081; @@ -46,7 +111,13 @@ fn main() { continue; } - let restapi_result = check_restapi_status(); + let certs_exist = check_certificates(); + let restapi_result = if !certs_exist { + println!("restapi is waiting for certificates."); + "OK".to_string() + } else { + check_restapi_status() + }; let status = HealthStatus { restapi_status: restapi_result, diff --git a/dockers/docker-router-advertiser/Dockerfile.j2 b/dockers/docker-router-advertiser/Dockerfile.j2 index b2903d4b2d3..bbda017ab80 100644 --- a/dockers/docker-router-advertiser/Dockerfile.j2 +++ b/dockers/docker-router-advertiser/Dockerfile.j2 @@ -1,5 +1,5 @@ {% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files, rsync_from_builder_stage %} -ARG BASE=docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} +ARG BASE=docker-config-engine-trixie-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} FROM $BASE AS base @@ -33,6 +33,8 @@ COPY ["critical_processes", "/etc/supervisor"] FROM $BASE +ARG image_version + {{ rsync_from_builder_stage() }} # Pass the image_version to container diff --git a/dockers/docker-sflow/Dockerfile.j2 b/dockers/docker-sflow/Dockerfile.j2 index 781ca151c62..dcc51a2f420 100644 --- a/dockers/docker-sflow/Dockerfile.j2 +++ b/dockers/docker-sflow/Dockerfile.j2 @@ -1,5 +1,5 @@ {% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files, rsync_from_builder_stage %} -ARG BASE=docker-swss-layer-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} +ARG BASE=docker-swss-layer-trixie-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} FROM $BASE AS base diff --git a/dockers/docker-sflow/supervisord.conf b/dockers/docker-sflow/supervisord.conf index 23d407a6f81..e240bfbc860 100644 --- a/dockers/docker-sflow/supervisord.conf +++ b/dockers/docker-sflow/supervisord.conf @@ -14,7 +14,7 @@ buffer_size=1024 [eventlistener:supervisor-proc-exit-listener] command=/usr/bin/supervisor-proc-exit-listener-rs --container-name sflow -events=PROCESS_STATE_EXITED,PROCESS_STATE_RUNNING +events=PROCESS_STATE_EXITED,PROCESS_STATE_RUNNING,PROCESS_STATE_FATAL autostart=true autorestart=unexpected buffer_size=1024 diff --git a/dockers/docker-sflow/supervisord.conf.common.j2 b/dockers/docker-sflow/supervisord.conf.common.j2 new file mode 100644 index 00000000000..56bb0e62ab1 --- /dev/null +++ b/dockers/docker-sflow/supervisord.conf.common.j2 @@ -0,0 +1,26 @@ +{# supervisord.conf.common.j2 — shared sflow supervisord programs + Used by docker-sonic-vs via _INCLUDE_DOCKER. + Variables: + sflow_priority_base — base priority for sflow programs (default 2) + use_dependent_startup — enable dependent_startup (default false) + sflow_wait_for — what to wait for before starting (default "rsyslogd:running") + Note: Only sflowmgrd is included here. hsflowd and port_index_mapper + require the sflow deb and are not available in docker-sonic-vs. +#} +{% set sflow_priority_base = sflow_priority_base | default(2) %} +{% set use_dependent_startup = use_dependent_startup | default(false) %} +{% set sflow_wait_for = sflow_wait_for | default("rsyslogd:running") %} + +[program:sflowmgrd] +command=/usr/bin/sflowmgrd +priority={{ sflow_priority_base }} +autostart=false +autorestart=false +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true +{% if use_dependent_startup %} +dependent_startup=true +dependent_startup_wait_for={{ sflow_wait_for }} +{% endif %} diff --git a/dockers/docker-snmp/Dockerfile.j2 b/dockers/docker-snmp/Dockerfile.j2 index f9ac171d4a1..199be77946b 100644 --- a/dockers/docker-snmp/Dockerfile.j2 +++ b/dockers/docker-snmp/Dockerfile.j2 @@ -1,5 +1,5 @@ {% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python3_wheels, copy_files, rsync_from_builder_stage %} -ARG BASE=docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} +ARG BASE=docker-config-engine-trixie-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} FROM $BASE AS base @@ -17,12 +17,15 @@ ENV IMAGE_VERSION=$image_version # Update apt's cache of available packages # Install make/gcc which is required for installing hiredis +# On trixie, snmp/snmpd come from Debian repos instead of local builds RUN apt-get update && \ apt-get install -y \ python3-dev \ gcc \ make \ - ipmitool + ipmitool \ + snmp \ + snmpd {% if docker_snmp_debs.strip() -%} # Copy locally-built Debian package dependencies @@ -67,6 +70,8 @@ RUN chmod +x /usr/bin/docker-snmp-init.sh FROM $BASE +ARG image_version + {{ rsync_from_builder_stage() }} # Enable -O for all Python calls diff --git a/dockers/docker-snmp/snmpd.conf.j2 b/dockers/docker-snmp/snmpd.conf.j2 index 35f64b314da..50ad5624037 100644 --- a/dockers/docker-snmp/snmpd.conf.j2 +++ b/dockers/docker-snmp/snmpd.conf.j2 @@ -86,12 +86,12 @@ CreateUser {{ user }} {{ SNMP_USER[user]['SNMP_USER_AUTH_TYPE'] }} {{ SNMP_USER[ # See snmpd.conf(5) for more details {% if SNMP is defined and SNMP.LOCATION is defined %} -sysLocation {{ SNMP.LOCATION.Location }} +sysLocation {{ SNMP.LOCATION.Location | replace('\n', ' ') }} {% else %} sysLocation public {% endif %} {% if SNMP is defined and SNMP.CONTACT is defined %} -sysContact {{ SNMP.CONTACT.keys() | first }} {{ SNMP.CONTACT.values() | first }} +sysContact {{ SNMP.CONTACT.keys() | first | replace('\n', ' ') }} {{ SNMP.CONTACT.values() | first | replace('\n', ' ') }} {% else %} sysContact Azure Cloud Switch vteam {% endif %} diff --git a/dockers/docker-snmp/supervisord.conf.j2 b/dockers/docker-snmp/supervisord.conf.j2 index 9f59aecd9e1..8197ed2a866 100644 --- a/dockers/docker-snmp/supervisord.conf.j2 +++ b/dockers/docker-snmp/supervisord.conf.j2 @@ -14,7 +14,7 @@ buffer_size=1024 [eventlistener:supervisor-proc-exit-listener] command=/usr/bin/supervisor-proc-exit-listener-rs --container-name snmp -events=PROCESS_STATE_EXITED,PROCESS_STATE_RUNNING +events=PROCESS_STATE_EXITED,PROCESS_STATE_RUNNING,PROCESS_STATE_FATAL autostart=true autorestart=unexpected buffer_size=1024 diff --git a/dockers/docker-sonic-bmp/Dockerfile.j2 b/dockers/docker-sonic-bmp/Dockerfile.j2 index b7db6e8ddba..e06adede536 100755 --- a/dockers/docker-sonic-bmp/Dockerfile.j2 +++ b/dockers/docker-sonic-bmp/Dockerfile.j2 @@ -1,5 +1,5 @@ {% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files, rsync_from_builder_stage %} -ARG BASE=docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} +ARG BASE=docker-config-engine-trixie-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} FROM $BASE AS base @@ -40,7 +40,12 @@ RUN chmod +x /usr/bin/bmp.sh FROM $BASE +ARG image_version + {{ rsync_from_builder_stage() }} +# Pass the image_version to container +ENV IMAGE_VERSION=$image_version + ENV DEBIAN_FRONTEND=noninteractive ENTRYPOINT ["/usr/local/bin/supervisord"] diff --git a/dockers/docker-sonic-bmp/supervisord.conf b/dockers/docker-sonic-bmp/supervisord.conf index 0bc5e34a78e..8b7273d6ef6 100644 --- a/dockers/docker-sonic-bmp/supervisord.conf +++ b/dockers/docker-sonic-bmp/supervisord.conf @@ -14,7 +14,7 @@ buffer_size=1024 [eventlistener:supervisor-proc-exit-listener] command=/usr/bin/supervisor-proc-exit-listener-rs --container-name bmp -events=PROCESS_STATE_EXITED,PROCESS_STATE_RUNNING +events=PROCESS_STATE_EXITED,PROCESS_STATE_RUNNING,PROCESS_STATE_FATAL autostart=true autorestart=unexpected buffer_size=1024 diff --git a/dockers/docker-sonic-gnmi/Dockerfile.j2 b/dockers/docker-sonic-gnmi/Dockerfile.j2 index 24266889f4b..c10e2557181 100644 --- a/dockers/docker-sonic-gnmi/Dockerfile.j2 +++ b/dockers/docker-sonic-gnmi/Dockerfile.j2 @@ -1,5 +1,5 @@ {% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files, rsync_from_builder_stage %} -ARG BASE=docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} +ARG BASE=docker-config-engine-trixie-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} FROM $BASE AS base @@ -29,6 +29,8 @@ COPY ["critical_processes", "/etc/supervisor"] FROM $BASE +ARG image_version + {{ rsync_from_builder_stage() }} ## Make apt-get non-interactive diff --git a/dockers/docker-sonic-gnmi/gnmi-native.sh b/dockers/docker-sonic-gnmi/gnmi-native.sh index dd0c033caf4..9c8e2765486 100755 --- a/dockers/docker-sonic-gnmi/gnmi-native.sh +++ b/dockers/docker-sonic-gnmi/gnmi-native.sh @@ -88,7 +88,12 @@ fi # Enable ZMQ for SmartSwitch LOCALHOST_SUBTYPE=`sonic-db-cli CONFIG_DB hget "DEVICE_METADATA|localhost" "subtype"` if [[ x"${LOCALHOST_SUBTYPE}" == x"SmartSwitch" ]]; then - TELEMETRY_ARGS+=" -zmq_port=8100" + TELEMETRY_ARGS+=" -zmq_port=8100 -max_recv_msg_size=$((32*1024*1024)) -max_send_msg_size=$((32*1024*1024))" +fi + +GNMI_VRF=$(extract_field "$GNMI" '.vrf') +if [[ -n "$GNMI_VRF" && "$GNMI_VRF" != "null" ]]; then + TELEMETRY_ARGS+=" --gnmi_vrf $GNMI_VRF" fi # Add VRF parameter when mgmt-vrf enabled diff --git a/dockers/docker-sonic-gnmi/supervisord.conf b/dockers/docker-sonic-gnmi/supervisord.conf index ea279b806f7..9dbb0999e9d 100644 --- a/dockers/docker-sonic-gnmi/supervisord.conf +++ b/dockers/docker-sonic-gnmi/supervisord.conf @@ -14,7 +14,7 @@ buffer_size=1024 [eventlistener:supervisor-proc-exit-listener] command=/usr/bin/supervisor-proc-exit-listener-rs --container-name gnmi -events=PROCESS_STATE_EXITED,PROCESS_STATE_RUNNING +events=PROCESS_STATE_EXITED,PROCESS_STATE_RUNNING,PROCESS_STATE_FATAL autostart=true autorestart=unexpected buffer_size=1024 diff --git a/dockers/docker-sonic-mgmt-framework/Dockerfile.j2 b/dockers/docker-sonic-mgmt-framework/Dockerfile.j2 index 4e81ddfe1df..037cbf54790 100644 --- a/dockers/docker-sonic-mgmt-framework/Dockerfile.j2 +++ b/dockers/docker-sonic-mgmt-framework/Dockerfile.j2 @@ -1,5 +1,5 @@ {% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files, rsync_from_builder_stage %} -ARG BASE=docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} +ARG BASE=docker-config-engine-trixie-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} FROM $BASE AS base @@ -9,7 +9,7 @@ ARG docker_container_name ENV DEBIAN_FRONTEND=noninteractive RUN apt-get update && \ - apt-get install -y g++ python3-dev libxml2 libcurl4-openssl-dev libcjson-dev + apt-get install -y g++ python3-dev libxml2 libcurl4t64 libcjson1 RUN pip3 install requests \ urllib3 diff --git a/dockers/docker-sonic-mgmt-framework/rest-server.sh b/dockers/docker-sonic-mgmt-framework/rest-server.sh index 63ccbf5df6f..57b37e4b99c 100755 --- a/dockers/docker-sonic-mgmt-framework/rest-server.sh +++ b/dockers/docker-sonic-mgmt-framework/rest-server.sh @@ -17,7 +17,7 @@ REST_SERVER=$(echo $MGMT_VARS | jq -r '.rest_server') if [ -n "$REST_SERVER" ]; then SERVER_PORT=$(echo $REST_SERVER | jq -r '.port // empty') - CLIENT_AUTH=$(echo $REST_SERVER | jq -r '.client_auth // empty') + CLIENT_AUTH=$(echo $REST_SERVER | jq -r '.client_auth // "user"') LOG_LEVEL=$(echo $REST_SERVER | jq -r '.log_level // empty') SERVER_CRT=$(echo $REST_SERVER | jq -r '.server_crt // empty') @@ -25,6 +25,11 @@ if [ -n "$REST_SERVER" ]; then CA_CRT=$(echo $REST_SERVER | jq -r '.ca_crt // empty') fi +# Default to user authentication when not explicitly configured +if [ -z "$CLIENT_AUTH" ]; then + CLIENT_AUTH="user" +fi + if [[ -z $SERVER_CRT ]] && [[ -z $SERVER_KEY ]] && [[ -z $CA_CRT ]]; then X509=$(echo $MGMT_VARS | jq -r '.x509') fi diff --git a/dockers/docker-sonic-mgmt/0001-Fix-getattr-AttributeError-in-multi-thread-scenario.patch b/dockers/docker-sonic-mgmt/0001-Fix-getattr-AttributeError-in-multi-thread-scenario.patch index b7f49c4e884..1393259febd 100644 --- a/dockers/docker-sonic-mgmt/0001-Fix-getattr-AttributeError-in-multi-thread-scenario.patch +++ b/dockers/docker-sonic-mgmt/0001-Fix-getattr-AttributeError-in-multi-thread-scenario.patch @@ -1,10 +1,8 @@ -From e323263795a0af4c9c61992bd7a3347d8928db39 Mon Sep 17 00:00:00 2001 -From: Xin Wang -Date: Thu, 14 Sep 2023 16:52:54 +0800 -Subject: [PATCH] Fix getattr AttributeError in multi-thread scenario - -When multi-thread is used, the plugin loader may raise AttributeError -while getting "ActionModule" from an action plugin. +From 94dd505c5e54341414dcb3b02bd50acef302b4eb Mon Sep 17 00:00:00 2001 +From: Sai Kiran <110003254+opcoder0@users.noreply.github.com> +Date: Fri, 15 May 2026 14:40:48 +1000 +Subject: [PATCH] When multi-thread is used, the plugin loader may raise + AttributeError while getting "ActionModule" from an action plugin. The reason is that cache is used while loading module. Before a module is fully loaded, it is already put into the sys.modules cache. When another @@ -13,34 +11,35 @@ module from the sys.modules cache. Then while getting "ActionModule" attribute from this module, exception AttributeError could be raised. Signed-off-by: Xin Wang +Signed-off-by: Sai Kiran <110003254+opcoder0@users.noreply.github.com> --- - lib/ansible/plugins/loader.py | 11 +++++------ - 1 file changed, 5 insertions(+), 6 deletions(-) + lib/ansible/plugins/loader.py | 9 +++++---- + 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/lib/ansible/plugins/loader.py b/lib/ansible/plugins/loader.py -index 74bdeb5719..251531b62e 100644 +index e12ec1b9ea..fe7dc25443 100644 --- a/lib/ansible/plugins/loader.py +++ b/lib/ansible/plugins/loader.py -@@ -801,15 +801,14 @@ class PluginLoader: - warnings.simplefilter("ignore", RuntimeWarning) - spec = importlib.util.spec_from_file_location(to_native(full_name), to_native(path)) +@@ -934,14 +934,15 @@ class PluginLoader: + spec = importlib.util.spec_from_file_location(to_native(python_module_name), to_native(path)) module = importlib.util.module_from_spec(spec) -- + - # mimic import machinery; make the module-being-loaded available in sys.modules during import - # and remove if there's a failure... -- sys.modules[full_name] = module -- +- sys.modules[python_module_name] = module + try: spec.loader.exec_module(module) + # mimic import machinery; make the module-being-loaded available in sys.modules during import + # and remove if there's a failure... -+ sys.modules[full_name] = module ++ sys.modules[python_module_name] = module except Exception: -- del sys.modules[full_name] -+ if full_name in sys.modules: -+ del sys.modules[full_name] +- del sys.modules[python_module_name] ++ if python_module_name in sys.modules: ++ del sys.modules[python_module_name] raise - + return module --- -2.25.1 +-- +2.54.0.windows.1 + diff --git a/dockers/docker-sonic-mgmt/Dockerfile.j2 b/dockers/docker-sonic-mgmt/Dockerfile.j2 index 2bcbbd94b29..b56c9b31adc 100755 --- a/dockers/docker-sonic-mgmt/Dockerfile.j2 +++ b/dockers/docker-sonic-mgmt/Dockerfile.j2 @@ -3,7 +3,9 @@ FROM {{ prefix }}ubuntu:24.04 ENV DEBIAN_FRONTEND=noninteractive -RUN apt-get update && apt-get install -y \ +RUN apt-get update \ + && apt-get upgrade -y \ + && apt-get install -y \ apt-transport-https \ apt-utils \ bats \ @@ -30,8 +32,6 @@ RUN apt-get update && apt-get install -y \ psmisc \ python3 \ python3-dev \ - python3-pip \ - python3-venv \ python-is-python3 \ rsyslog \ shellcheck \ @@ -41,11 +41,18 @@ RUN apt-get update && apt-get install -y \ sudo \ tcpdump \ telnet \ - vim + vim \ + && apt-get autoremove -y \ + && apt-get autoclean \ + && rm -rf /var/lib/apt/lists/* -# Ubuntu 24.04 recommends installing pip packages in a virtual environment -# Create a virtual environment at /opt/venv and install all required python packages there -RUN python3 -m venv --system-site-packages /opt/venv +# Install uv - a fast Python package manager that replaces pip/venv/wheel. +# This eliminates the need for python3-pip, python3-venv, and python3-wheel +# system packages, avoiding vulnerabilities like USN-8221-1. +COPY --from=ghcr.io/astral-sh/uv:latest /uv /uvx /bin/ + +# Create a virtual environment at /opt/venv using uv +RUN uv venv --system-site-packages /opt/venv ENV PATH="/opt/venv/bin:$PATH" # Configure system-wide PATH and sudo secure_path for /opt/venv/bin access @@ -53,10 +60,10 @@ ENV PATH="/opt/venv/bin:$PATH" RUN sed -i 's|^PATH="|PATH="/opt/venv/bin:|' /etc/environment \ && sed -i 's|secure_path="\([^"]*\)"|secure_path="/opt/venv/bin:\1"|' /etc/sudoers -RUN pip install --no-cache-dir \ +RUN uv pip install --no-cache \ aiohttp \ allure-pytest \ - ansible==11.10.0 \ + ansible \ azure-storage-blob \ azure-kusto-data \ azure-kusto-ingest \ @@ -64,7 +71,7 @@ RUN pip install --no-cache-dir \ celery[redis] \ cffi \ contextlib2 \ - cryptography \ + "cryptography>=46.0.7,<47" \ ctypesgen \ debugpy \ dpkt \ @@ -87,16 +94,17 @@ RUN pip install --no-cache-dir \ ncclient \ netaddr \ netmiko \ - opentelemetry-api==1.27.0 \ - opentelemetry-sdk==1.27.0 \ - opentelemetry-exporter-otlp==1.27.0 \ + opentelemetry-api==1.41.0 \ + opentelemetry-sdk==1.41.0 \ + opentelemetry-exporter-otlp==1.41.0 \ pandas \ paramiko \ passlib \ pexpect \ prettytable \ + "protobuf>=5.29.6,<6" \ psutil \ - ptf \ + ptf==0.10.0 \ pyasn1 \ pycryptodome \ pyfiglet \ @@ -127,6 +135,7 @@ RUN pip install --no-cache-dir \ tabulate \ textfsm \ thrift \ + kubernetes \ && wget https://github.com/nanomsg/nanomsg/archive/refs/tags/1.2.1.tar.gz \ && tar xvfz 1.2.1.tar.gz \ && cd nanomsg-1.2.1 \ @@ -138,7 +147,7 @@ RUN pip install --no-cache-dir \ && cd ../.. \ && rm -fr nanomsg-1.2.1 \ && rm -f 1.2.1.tar.gz \ - && python3 -m pip install --no-cache-dir nnpy + && uv pip install --no-cache nnpy # Install docker-ce-cli, azure-cli RUN install -m 0755 -d /etc/apt/keyrings \ @@ -152,6 +161,11 @@ RUN install -m 0755 -d /etc/apt/keyrings \ && apt-get install -y docker-ce-cli \ && curl -sL https://aka.ms/InstallAzureCLIDeb | bash +# Patch Azure CLI's bundled cryptography for CVE-2026-39892 +RUN az_site_packages=$(/opt/az/bin/python -c "import site; print(site.getsitepackages()[0])") \ + && /opt/az/bin/python -m pip install --no-cache-dir --target "$az_site_packages" 'cryptography>=46.0.7,<47' \ + && find "$az_site_packages" -name 'cryptography-46.0.6*' -type d -exec rm -rf {} + 2>/dev/null; true + # Install dash-api RUN tmpdir=$(mktemp -d) \ && python_site_packages=$(python3 -c "import site; print(site.getsitepackages()[0])") \ @@ -172,7 +186,7 @@ RUN tmpdir=$(mktemp -d) \ && python3 /usr/bin/github_get.py https://api.github.com/repos/sonic-net/DASH/contents/dash-pipeline/utils \ && cd utils \ && python3 setup.py bdist_wheel \ - && python3 -m pip install dist/dash_pipeline_utils*.whl \ + && uv pip install --no-cache dist/dash_pipeline_utils*.whl \ && cd / \ && rm -rf "$tmpdir" diff --git a/dockers/docker-sonic-otel/Dockerfile.j2 b/dockers/docker-sonic-otel/Dockerfile.j2 index 5722db6632c..e8d1fbae5c2 100644 --- a/dockers/docker-sonic-otel/Dockerfile.j2 +++ b/dockers/docker-sonic-otel/Dockerfile.j2 @@ -1,5 +1,5 @@ {% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files, rsync_from_builder_stage %} -ARG BASE=docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} +ARG BASE=docker-config-engine-trixie-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} FROM $BASE AS base @@ -62,6 +62,8 @@ COPY ["critical_processes", "/etc/supervisor"] FROM $BASE +ARG image_version + {{ rsync_from_builder_stage() }} ## Make apt-get non-interactive diff --git a/dockers/docker-sonic-otel/supervisord.conf b/dockers/docker-sonic-otel/supervisord.conf index f7cf7d91c0d..00dba313b6a 100644 --- a/dockers/docker-sonic-otel/supervisord.conf +++ b/dockers/docker-sonic-otel/supervisord.conf @@ -14,7 +14,7 @@ buffer_size=1024 [eventlistener:supervisor-proc-exit-listener] command=/usr/bin/supervisor-proc-exit-listener-rs --container-name otel -events=PROCESS_STATE_EXITED,PROCESS_STATE_RUNNING +events=PROCESS_STATE_EXITED,PROCESS_STATE_RUNNING,PROCESS_STATE_FATAL autostart=true autorestart=unexpected buffer_size=1024 diff --git a/dockers/docker-sonic-p4rt/Dockerfile.j2 b/dockers/docker-sonic-p4rt/Dockerfile.j2 index 46449c54a1b..f3de7183a5c 100644 --- a/dockers/docker-sonic-p4rt/Dockerfile.j2 +++ b/dockers/docker-sonic-p4rt/Dockerfile.j2 @@ -1,5 +1,5 @@ {% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files, rsync_from_builder_stage %} -ARG BASE=docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} +ARG BASE=docker-config-engine-trixie-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} FROM $BASE AS base diff --git a/dockers/docker-sonic-p4rt/supervisord.conf b/dockers/docker-sonic-p4rt/supervisord.conf index c330d61bb86..932b9353bca 100644 --- a/dockers/docker-sonic-p4rt/supervisord.conf +++ b/dockers/docker-sonic-p4rt/supervisord.conf @@ -14,7 +14,7 @@ buffer_size=50 [eventlistener:supervisor-proc-exit-listener] command=/usr/bin/supervisor-proc-exit-listener-rs --container-name p4rt -events=PROCESS_STATE_EXITED +events=PROCESS_STATE_EXITED,PROCESS_STATE_FATAL autostart=true autorestart=unexpected diff --git a/dockers/docker-sonic-redfish/Dockerfile.j2 b/dockers/docker-sonic-redfish/Dockerfile.j2 new file mode 100644 index 00000000000..749919297b2 --- /dev/null +++ b/dockers/docker-sonic-redfish/Dockerfile.j2 @@ -0,0 +1,46 @@ +{% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files %} +ARG BASE=docker-config-engine-trixie-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} + +FROM $BASE AS base + +ARG docker_container_name + +## Make apt-get non-interactive +ENV DEBIAN_FRONTEND=noninteractive + +# Install bmcweb and sonic-dbus-bridge runtime dependencies +RUN apt-get update && \ + apt-get install -f -y \ + libtinyxml2-11 \ + libboost-system1.83.0 \ + libjsoncpp26 \ + libhiredis1.1.0 \ + dbus \ + && rm -rf /var/lib/apt/lists/* + +{% if docker_sonic_redfish_debs.strip() -%} +# Copy locally-built Debian package dependencies +{{ copy_files("debs/", docker_sonic_redfish_debs.split(' '), "/debs/") }} + +# Install locally-built Debian packages and implicitly install their dependencies +{{ install_debian_packages(docker_sonic_redfish_debs.split(' ')) }} +{%- endif %} + +# Create necessary directories and local bmcweb user/groups for Redfish mTLS +# The client certificate CN must match this username (e.g., CN=bmcweb) +RUN mkdir -p /etc/bmcweb && \ + mkdir -p /var/lib/bmcweb && \ + mkdir -p /usr/share/www && \ + groupadd -f redfish && \ + groupadd -f priv-admin && \ + groupadd -f priv-operator && \ + groupadd -f priv-user && \ + useradd -m -s /bin/bash bmcweb && \ + echo "bmcweb:bmcweb" | chpasswd && \ + usermod -aG redfish,priv-admin,priv-operator,priv-user bmcweb + +COPY ["supervisord.conf", "/etc/supervisor/conf.d/"] +COPY ["critical_processes", "/etc/supervisor/"] + +ENTRYPOINT ["/usr/local/bin/supervisord"] + diff --git a/dockers/docker-sonic-redfish/critical_processes b/dockers/docker-sonic-redfish/critical_processes new file mode 100644 index 00000000000..73b630a0380 --- /dev/null +++ b/dockers/docker-sonic-redfish/critical_processes @@ -0,0 +1,3 @@ +program:sonic-dbus-bridge +program:bmcweb + diff --git a/dockers/docker-sonic-redfish/supervisord.conf b/dockers/docker-sonic-redfish/supervisord.conf new file mode 100644 index 00000000000..2bfed28b2e1 --- /dev/null +++ b/dockers/docker-sonic-redfish/supervisord.conf @@ -0,0 +1,57 @@ +[supervisord] +logfile_maxbytes=1MB +logfile_backups=2 +nodaemon=true + +[eventlistener:dependent-startup] +command=python3 -m supervisord_dependent_startup +autostart=true +autorestart=unexpected +startretries=0 +exitcodes=0,3 +events=PROCESS_STATE +buffer_size=1024 + +[eventlistener:supervisor-proc-exit-listener] +command=/usr/local/bin/supervisor-proc-exit-listener --container-name redfish +events=PROCESS_STATE_EXITED,PROCESS_STATE_RUNNING,PROCESS_STATE_FATAL +autostart=true +autorestart=unexpected +buffer_size=1024 + +[program:rsyslogd] +command=/usr/sbin/rsyslogd -n -iNONE +priority=1 +autostart=false +autorestart=unexpected +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true +dependent_startup=true + +[program:sonic-dbus-bridge] +command=/usr/bin/sonic-dbus-bridge +priority=2 +autostart=false +autorestart=true +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true +startsecs=5 +dependent_startup=true +dependent_startup_wait_for=rsyslogd:running + +[program:bmcweb] +command=/usr/bin/bmcweb +priority=3 +autostart=false +autorestart=true +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true +startsecs=10 +dependent_startup=true +dependent_startup_wait_for=sonic-dbus-bridge:running diff --git a/dockers/docker-sonic-restapi/Dockerfile.j2 b/dockers/docker-sonic-restapi/Dockerfile.j2 index 7922408ef29..e15a775cbec 100644 --- a/dockers/docker-sonic-restapi/Dockerfile.j2 +++ b/dockers/docker-sonic-restapi/Dockerfile.j2 @@ -1,5 +1,5 @@ {% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files, rsync_from_builder_stage %} -ARG BASE=docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} +ARG BASE=docker-config-engine-trixie-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} FROM $BASE AS base diff --git a/dockers/docker-sonic-restapi/supervisord.conf b/dockers/docker-sonic-restapi/supervisord.conf index f2c332142e5..245724e8f20 100644 --- a/dockers/docker-sonic-restapi/supervisord.conf +++ b/dockers/docker-sonic-restapi/supervisord.conf @@ -14,7 +14,7 @@ buffer_size=1024 [eventlistener:supervisor-proc-exit-listener] command=/usr/bin/supervisor-proc-exit-listener-rs --container-name restapi -events=PROCESS_STATE_EXITED,PROCESS_STATE_RUNNING +events=PROCESS_STATE_EXITED,PROCESS_STATE_RUNNING,PROCESS_STATE_FATAL autostart=true autorestart=unexpected buffer_size=1024 diff --git a/dockers/docker-sonic-telemetry/Dockerfile.j2 b/dockers/docker-sonic-telemetry/Dockerfile.j2 index a183e2d94c0..57be61a4fce 100644 --- a/dockers/docker-sonic-telemetry/Dockerfile.j2 +++ b/dockers/docker-sonic-telemetry/Dockerfile.j2 @@ -30,6 +30,8 @@ COPY ["docker-telemetry-entry.sh", "/usr/local/bin/"] FROM $BASE +ARG image_version + {{ rsync_from_builder_stage() }} ## Make apt-get non-interactive diff --git a/dockers/docker-sonic-telemetry/supervisord.conf b/dockers/docker-sonic-telemetry/supervisord.conf index 2945daea42c..0f8ef6d4adc 100644 --- a/dockers/docker-sonic-telemetry/supervisord.conf +++ b/dockers/docker-sonic-telemetry/supervisord.conf @@ -14,7 +14,7 @@ buffer_size=1024 [eventlistener:supervisor-proc-exit-listener] command=/usr/bin/supervisor-proc-exit-listener-rs --container-name telemetry -events=PROCESS_STATE_EXITED,PROCESS_STATE_RUNNING +events=PROCESS_STATE_EXITED,PROCESS_STATE_RUNNING,PROCESS_STATE_FATAL autostart=true autorestart=unexpected buffer_size=1024 diff --git a/dockers/docker-sonic-telemetry/telemetry.sh b/dockers/docker-sonic-telemetry/telemetry.sh index e677e338fcd..9d964262507 100755 --- a/dockers/docker-sonic-telemetry/telemetry.sh +++ b/dockers/docker-sonic-telemetry/telemetry.sh @@ -159,5 +159,10 @@ if [ ! -z "$USER_AUTH" ] && [ $USER_AUTH != "null" ]; then fi fi +GNMI_VRF=$(extract_field "$GNMI" '.vrf') +if [[ -n "$GNMI_VRF" && "$GNMI_VRF" != "null" ]]; then + TELEMETRY_ARGS+=" --gnmi_vrf $GNMI_VRF" +fi + echo "telemetry args: $TELEMETRY_ARGS" exec /usr/sbin/telemetry ${TELEMETRY_ARGS} diff --git a/dockers/docker-stp/Dockerfile.j2 b/dockers/docker-stp/Dockerfile.j2 index 048fcf55f4c..c8e6254bf2c 100644 --- a/dockers/docker-stp/Dockerfile.j2 +++ b/dockers/docker-stp/Dockerfile.j2 @@ -1,5 +1,5 @@ {% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files, rsync_from_builder_stage %} -ARG BASE=docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} +ARG BASE=docker-config-engine-trixie-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} FROM $BASE AS base diff --git a/dockers/docker-sysmgr/Dockerfile.j2 b/dockers/docker-sysmgr/Dockerfile.j2 index 856881ed4ac..931dc23e5e6 100644 --- a/dockers/docker-sysmgr/Dockerfile.j2 +++ b/dockers/docker-sysmgr/Dockerfile.j2 @@ -1,5 +1,5 @@ {% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files, rsync_from_builder_stage %} -ARG BASE=docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} +ARG BASE=docker-config-engine-trixie-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} FROM $BASE AS base diff --git a/dockers/docker-sysmgr/supervisord.conf b/dockers/docker-sysmgr/supervisord.conf index a5a15c4724b..91cdd1b8f00 100644 --- a/dockers/docker-sysmgr/supervisord.conf +++ b/dockers/docker-sysmgr/supervisord.conf @@ -17,7 +17,7 @@ buffer_size=50 [eventlistener:supervisor-proc-exit-listener] command=/usr/bin/supervisor-proc-exit-listener-rs --container-name sysmgr -events=PROCESS_STATE_EXITED +events=PROCESS_STATE_EXITED,PROCESS_STATE_FATAL autostart=true autorestart=unexpected stdout_logfile=syslog diff --git a/dockers/docker-teamd/Dockerfile.j2 b/dockers/docker-teamd/Dockerfile.j2 index 53f22fb0f97..1968f74e0f5 100644 --- a/dockers/docker-teamd/Dockerfile.j2 +++ b/dockers/docker-teamd/Dockerfile.j2 @@ -1,5 +1,5 @@ {% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files, rsync_from_builder_stage %} -ARG BASE=docker-swss-layer-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} +ARG BASE=docker-swss-layer-trixie-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} FROM $BASE AS base @@ -18,8 +18,10 @@ RUN apt-get update {{ install_debian_packages(docker_teamd_debs.split(' ')) }} {%- endif %} +COPY ["docker-teamd-init.sh", "/usr/bin/"] COPY ["start.sh", "/usr/bin/"] -COPY ["supervisord.conf", "/etc/supervisor/conf.d/"] +COPY ["supervisord.conf.j2", "/usr/share/sonic/templates/"] +COPY ["supervisord.conf.common.j2", "/usr/share/sonic/templates/"] COPY ["critical_processes", "/etc/supervisor"] FROM $BASE @@ -27,4 +29,4 @@ FROM $BASE {{ rsync_from_builder_stage() }} ENV DEBIAN_FRONTEND=noninteractive -ENTRYPOINT ["/usr/local/bin/supervisord"] +ENTRYPOINT ["/usr/bin/docker-teamd-init.sh"] diff --git a/dockers/docker-teamd/docker-teamd-init.sh b/dockers/docker-teamd/docker-teamd-init.sh new file mode 100755 index 00000000000..2dd00aab57f --- /dev/null +++ b/dockers/docker-teamd/docker-teamd-init.sh @@ -0,0 +1,6 @@ +#!/usr/bin/env bash + +# Render supervisord config from Jinja2 template +sonic-cfggen -d -t /usr/share/sonic/templates/supervisord.conf.j2 > /etc/supervisor/conf.d/supervisord.conf + +exec /usr/local/bin/supervisord diff --git a/dockers/docker-teamd/supervisord.conf b/dockers/docker-teamd/supervisord.conf deleted file mode 100644 index 0172b1a091e..00000000000 --- a/dockers/docker-teamd/supervisord.conf +++ /dev/null @@ -1,83 +0,0 @@ -[supervisord] -logfile_maxbytes=1MB -logfile_backups=2 -nodaemon=true - -[eventlistener:dependent-startup] -command=python3 -m supervisord_dependent_startup -autostart=true -autorestart=unexpected -startretries=0 -exitcodes=0,3 -events=PROCESS_STATE -buffer_size=1024 - -[eventlistener:supervisor-proc-exit-listener] -command=/usr/bin/supervisor-proc-exit-listener-rs --container-name teamd -events=PROCESS_STATE_EXITED,PROCESS_STATE_RUNNING -autostart=true -autorestart=unexpected -buffer_size=1024 - -[program:rsyslogd] -command=/usr/sbin/rsyslogd -n -iNONE -priority=1 -autostart=false -autorestart=unexpected -stdout_logfile=NONE -stdout_syslog=true -stderr_logfile=NONE -stderr_syslog=true -dependent_startup=true - -[program:start] -command=/usr/bin/start.sh -priority=2 -autostart=true -autorestart=false -startsecs=0 -stdout_logfile=NONE -stdout_syslog=true -stderr_logfile=NONE -stderr_syslog=true -dependent_startup=true -dependent_startup_wait_for=rsyslogd:running - -[program:teammgrd] -command=/usr/bin/teammgrd -priority=3 -autostart=false -autorestart=false -stopwaitsecs=60 -stdout_logfile=NONE -stdout_syslog=true -stderr_logfile=NONE -stderr_syslog=true -dependent_startup=true -dependent_startup_wait_for=start:exited - -[program:teamsyncd] -command=/usr/bin/teamsyncd -priority=4 -startsecs=5 -autostart=false -autorestart=false -stdout_logfile=NONE -stdout_syslog=true -stderr_logfile=NONE -stderr_syslog=true -dependent_startup=true -dependent_startup_wait_for=teammgrd:running - -[program:tlm_teamd] -command=/usr/bin/tlm_teamd -priority=4 -autostart=false -autorestart=false -stdout_logfile=NONE -stdout_syslog=true -stderr_logfile=NONE -stderr_syslog=true -dependent_startup=true -dependent_startup_wait_for=start:exited - diff --git a/dockers/docker-teamd/supervisord.conf.common.j2 b/dockers/docker-teamd/supervisord.conf.common.j2 new file mode 100644 index 00000000000..c2fac62d424 --- /dev/null +++ b/dockers/docker-teamd/supervisord.conf.common.j2 @@ -0,0 +1,52 @@ +{# supervisord.conf.common.j2 — shared teamd supervisord programs + Used by both standalone docker-teamd and docker-sonic-vs via _INCLUDE_DOCKER. + Variables: + teamd_priority_base — base priority for teamd programs (default 3) + teamd_wait_for — what to wait for before starting (default "start:exited") +#} +{% set teamd_priority_base = teamd_priority_base | default(3) %} +{% set teamd_wait_for = teamd_wait_for | default("start:exited") %} + +[program:teammgrd] +command=/usr/bin/teammgrd +priority={{ teamd_priority_base }} +autostart=false +autorestart=false +stopwaitsecs=60 +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true +{% if ENABLE_ASAN is defined and ENABLE_ASAN == "y" %} +environment=ASAN_OPTIONS="log_path=/var/log/asan/teammgrd-asan.log{{ asan_extra_options }}" +{% endif %} +dependent_startup=true +dependent_startup_wait_for={{ teamd_wait_for }} + +[program:teamsyncd] +command=/usr/bin/teamsyncd +priority={{ teamd_priority_base + 1 }} +startsecs=5 +autostart=false +autorestart=false +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true +{% if ENABLE_ASAN is defined and ENABLE_ASAN == "y" %} +environment=ASAN_OPTIONS="log_path=/var/log/asan/teamsyncd-asan.log{{ asan_extra_options }}" +{% endif %} +dependent_startup=true +dependent_startup_wait_for=teammgrd:running + +[program:tlm_teamd] +command=/usr/bin/tlm_teamd +priority={{ teamd_priority_base + 1 }} +autostart=false +autorestart=false +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true +dependent_startup=true +dependent_startup_wait_for={{ teamd_wait_for }} diff --git a/dockers/docker-teamd/supervisord.conf.j2 b/dockers/docker-teamd/supervisord.conf.j2 new file mode 100644 index 00000000000..e2a6044538a --- /dev/null +++ b/dockers/docker-teamd/supervisord.conf.j2 @@ -0,0 +1,46 @@ +[supervisord] +logfile_maxbytes=1MB +logfile_backups=2 +nodaemon=true + +[eventlistener:dependent-startup] +command=python3 -m supervisord_dependent_startup +autostart=true +autorestart=unexpected +startretries=0 +exitcodes=0,3 +events=PROCESS_STATE +buffer_size=1024 + +[eventlistener:supervisor-proc-exit-listener] +command=/usr/bin/supervisor-proc-exit-listener-rs --container-name teamd +events=PROCESS_STATE_EXITED,PROCESS_STATE_RUNNING,PROCESS_STATE_FATAL +autostart=true +autorestart=unexpected +buffer_size=1024 + +[program:rsyslogd] +command=/usr/sbin/rsyslogd -n -iNONE +priority=1 +autostart=false +autorestart=unexpected +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true +dependent_startup=true + +[program:start] +command=/usr/bin/start.sh +priority=2 +autostart=true +autorestart=false +startsecs=0 +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true +dependent_startup=true +dependent_startup_wait_for=rsyslogd:running + +{% include "supervisord.conf.common.j2" %} diff --git a/dockers/docker-telemetry-sidecar/Dockerfile.j2 b/dockers/docker-telemetry-sidecar/Dockerfile.j2 index 0f486fc3366..6bbf2952244 100644 --- a/dockers/docker-telemetry-sidecar/Dockerfile.j2 +++ b/dockers/docker-telemetry-sidecar/Dockerfile.j2 @@ -1,5 +1,5 @@ {% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files, rsync_from_builder_stage %} -ARG BASE=docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} +ARG BASE=docker-config-engine-trixie-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} FROM $BASE AS base @@ -15,9 +15,26 @@ ENV IMAGE_VERSION=$image_version # K8s will override this ENV IS_V1_ENABLED=false +{% if docker_telemetry_sidecar_debs.strip() -%} +# Copy locally-built Debian package dependencies +{{ copy_files("debs/", docker_telemetry_sidecar_debs.split(' '), "/debs/") }} + +# Install locally-built Debian packages and implicitly install their dependencies +{{ install_debian_packages(docker_telemetry_sidecar_debs.split(' ')) }} +{%- endif %} + +{% if docker_telemetry_sidecar_whls.strip() -%} +# Copy locally-built Python wheel dependencies +{{ copy_files("python-wheels/", docker_telemetry_sidecar_whls.split(' '), "/python-wheels/") }} + +# Install locally-built Python wheel dependencies +{{ install_python_wheels(docker_telemetry_sidecar_whls.split(' ')) }} +{%- endif %} + COPY ["systemd_stub.py", "/usr/bin/"] COPY ["systemd_scripts/", "/usr/share/sonic/systemd_scripts/"] COPY ["files/container_checker", "/usr/share/sonic/systemd_scripts/container_checker"] +COPY ["files/service_checker.py", "/usr/share/sonic/systemd_scripts/service_checker.py"] COPY ["files/telemetry.sh", "/usr/share/sonic/systemd_scripts/telemetry_v1.sh"] COPY ["files/k8s_pod_control.sh", "/usr/share/sonic/scripts/k8s_pod_control.sh"] COPY ["supervisord.conf", "/etc/supervisor/conf.d/"] @@ -29,6 +46,8 @@ RUN chmod +x /usr/bin/systemd_stub.py /usr/share/sonic/scripts/k8s_pod_control.s FROM $BASE +ARG image_version + {{ rsync_from_builder_stage() }} # Make apt-get non-interactive diff --git a/dockers/docker-telemetry-sidecar/cli-plugin-tests/test_systemd_stub.py b/dockers/docker-telemetry-sidecar/cli-plugin-tests/test_systemd_stub.py index f1071ca7946..4957f0e33a3 100644 --- a/dockers/docker-telemetry-sidecar/cli-plugin-tests/test_systemd_stub.py +++ b/dockers/docker-telemetry-sidecar/cli-plugin-tests/test_systemd_stub.py @@ -1,16 +1,18 @@ # tests/test_systemd_stub.py import sys import os +import json import types +import subprocess import importlib import pytest # Add docker-telemetry-sidecar directory to path so we can import systemd_stub -sys.path.insert(0, os.path.abspath(os.path.join(os.path.dirname(__file__), "../.."))) +sys.path.insert(0, os.path.abspath(os.path.join(os.path.dirname(__file__), ".."))) # Add sonic-py-common to path so we can import the real sidecar_common -sys.path.insert(0, os.path.abspath(os.path.join(os.path.dirname(__file__), "../../../../../src/sonic-py-common"))) +sys.path.insert(0, os.path.abspath(os.path.join(os.path.dirname(__file__), "../../../src/sonic-py-common"))) # ===== Create fakes BEFORE importing sidecar_common ===== @@ -65,6 +67,47 @@ def log_critical(self, msg): self._log("CRITICAL", msg) from sonic_py_common import sidecar_common as real_sidecar_common +def _fake_apply_patch(config_db, input_bytes, text): + """Fake 'config apply-patch': apply RFC 6902 ops to the test config_db dict.""" + try: + patch_ops = json.loads(input_bytes) + for op in patch_ops: + parts = op["path"].strip("/").split("/") + if op["op"] == "add": + if len(parts) == 1: + for k, v in op["value"].items(): + config_db[f"{parts[0]}|{k}"] = dict(v) + elif len(parts) == 2: + db_key = f"{parts[0]}|{parts[1]}" + if db_key in config_db: + config_db[db_key].update(op["value"]) + else: + config_db[db_key] = dict(op["value"]) + elif len(parts) == 3: + db_key = f"{parts[0]}|{parts[1]}" + config_db.setdefault(db_key, {})[parts[2]] = op["value"] + elif op["op"] == "replace": + if len(parts) == 2: + config_db[f"{parts[0]}|{parts[1]}"] = dict(op["value"]) + elif len(parts) == 3: + db_key = f"{parts[0]}|{parts[1]}" + if db_key in config_db: + config_db[db_key][parts[2]] = op["value"] + elif op["op"] == "remove": + if len(parts) == 2: + config_db.pop(f"{parts[0]}|{parts[1]}", None) + elif len(parts) == 3: + db_key = f"{parts[0]}|{parts[1]}" + e = config_db.get(db_key) + if e and parts[2] in e: + del e[parts[2]] + if not e: + del config_db[db_key] + return 0, "" if text else b"", "" if text else b"" + except Exception as exc: + return 1, "" if text else b"", str(exc) if text else str(exc).encode() + + @pytest.fixture(scope="session", autouse=True) def fake_logger_module(): """ @@ -105,11 +148,12 @@ def fake_db_hgetall(key: str): """Get all fields from a CONFIG_DB hash.""" return dict(config_db.get(key, {})) - def fake_db_hset(key: str, field: str, value): + def fake_db_hset(key: str, field: str, value) -> bool: """Set a field in a CONFIG_DB hash.""" if key not in config_db: config_db[key] = {} config_db[key][field] = value + return True def fake_db_del(key: str): """Delete a CONFIG_DB key entirely.""" @@ -118,12 +162,31 @@ def fake_db_del(key: str): return True return False + def fake_db_hdel(key: str, field: str): + """Delete a single field from a CONFIG_DB hash.""" + entry = config_db.get(key) + if entry is None or field not in entry: + return True # already absent + del entry[field] + if not entry: + del config_db[key] + return True + + def fake_db_get_table_keys(table: str): + """Return all entry keys for a given table from config_db.""" + prefix = f"{table}|" + return [k.split("|", 1)[1] for k in config_db if k.startswith(prefix)] + monkeypatch.setattr(real_sidecar_common, "db_hget", fake_db_hget) monkeypatch.setattr(real_sidecar_common, "db_hgetall", fake_db_hgetall) monkeypatch.setattr(real_sidecar_common, "db_hset", fake_db_hset) monkeypatch.setattr(real_sidecar_common, "db_del", fake_db_del) + monkeypatch.setattr(real_sidecar_common, "db_hdel", fake_db_hdel) + monkeypatch.setattr(real_sidecar_common, "db_get_table_keys", fake_db_get_table_keys) # ----- Fake run_nsenter for host operations (patch on sidecar_common) ----- + mktemp_counter = {"n": 0} + def fake_run_nsenter(args, *, text=True, input_bytes=None): commands.append(("nsenter", tuple(args))) @@ -137,6 +200,17 @@ def fake_run_nsenter(args, *, text=True, input_bytes=None): return 0, out, b"" return 1, "" if text else b"", "No such file" if text else b"No such file" + # /bin/mktemp + if args[:1] == ["/bin/mktemp"] and len(args) == 2: + template = args[1] + mktemp_counter["n"] += 1 + unique = template.replace("XXXXXX", f"{mktemp_counter['n']:06d}") + host_fs[unique] = b"" + out = unique + "\n" + if text: + return 0, out, "" + return 0, out.encode(), b"" + # /bin/sh -c "cat > /tmp/xxx" if ( len(args) == 3 @@ -166,6 +240,12 @@ def fake_run_nsenter(args, *, text=True, input_bytes=None): host_fs.pop(target, None) return 0, "" if text else b"", "" if text else b"" + # sudo -n config apply-patch /dev/stdin + if (args[:4] == ["sudo", "-n", "config", "apply-patch"] + and len(args) == 5 and args[4] == "/dev/stdin" + and input_bytes is not None): + return _fake_apply_patch(config_db, input_bytes, text) + # sudo … (post actions) if args[:1] == ["sudo"]: return 0, "" if text else b"", "" if text else b"" @@ -188,6 +268,24 @@ def fake_read_file_bytes_local(path: str): # Isolate POST_COPY_ACTIONS monkeypatch.setattr(ss, "POST_COPY_ACTIONS", {}, raising=True) + # Mock _get_branch_name to return "202412" by default (avoids real file/nsenter I/O) + # Use "202412" because it is in the supported branch list. + monkeypatch.setattr(ss, "_get_branch_name", lambda: "202412") + + # Reset the one-shot cleanup flag so each test starts fresh + ss._stale_unit_cleaned = False + monkeypatch.setattr(ss, "_STALE_UNIT_CLEANUP_ENABLED", True) + + # Provide the branch-specific container_checker in both filesystems so the auto-appended + # SyncItem from ensure_sync() is always satisfied and is a no-op. + container_fs["/usr/share/sonic/systemd_scripts/container_checker_202412"] = b"default-checker" + host_fs["/bin/container_checker"] = b"default-checker" + + # Provide the branch-specific service_checker.py in both filesystems so the auto-appended + # SyncItem from ensure_sync() is always satisfied and is a no-op. + container_fs["/usr/share/sonic/systemd_scripts/service_checker.py_202412"] = b"default-service-checker" + host_fs["/usr/local/lib/python3.11/dist-packages/health_checker/service_checker.py"] = b"default-service-checker" + return ss, container_fs, host_fs, commands, config_db @@ -209,14 +307,16 @@ def test_sync_no_change_fast_path(ss): def test_sync_updates_and_post_actions(ss): ss, container_fs, host_fs, commands, config_db = ss - item = ss.SyncItem("/container/container_checker", "/bin/container_checker", 0o755) + # Use telemetry.sh path (not /bin/container_checker) to avoid conflict + # with the container_checker item that ensure_sync() appends automatically. + item = ss.SyncItem("/container/telemetry.sh", "/usr/local/bin/telemetry.sh", 0o755) container_fs[item.src_in_container] = b"NEW" host_fs[item.dst_on_host] = b"OLD" ss.SYNC_ITEMS[:] = [item] ss.POST_COPY_ACTIONS[item.dst_on_host] = [ ["sudo", "systemctl", "daemon-reload"], - ["sudo", "systemctl", "restart", "monit"], + ["sudo", "systemctl", "restart", "telemetry"], ] ok = ss.ensure_sync() @@ -225,7 +325,7 @@ def test_sync_updates_and_post_actions(ss): post_cmds = [args for _, args in commands if args and args[0] == "sudo"] assert ("sudo", "systemctl", "daemon-reload") in post_cmds - assert ("sudo", "systemctl", "restart", "monit") in post_cmds + assert ("sudo", "systemctl", "restart", "telemetry") in post_cmds def test_sync_missing_src_returns_false(ss): @@ -291,62 +391,874 @@ def test_env_controls_telemetry_src_default(monkeypatch): assert ss._TELEMETRY_SRC.endswith("telemetry.sh") -def test_telemetry_service_syncs_to_host_when_different(ss): - ss, container_fs, host_fs, commands, config_db = ss - # Prepare container unit content and host old content - container_fs[ss.CONTAINER_TELEMETRY_SERVICE] = b"UNIT-NEW" - host_fs[ss.HOST_TELEMETRY_SERVICE] = b"UNIT-OLD" +# ─────────────────────────── Tests for stale telemetry.service cleanup ─────────────────────────── - # Only include the telemetry service item to make the assertion clear - ss.SYNC_ITEMS[:] = [ - ss.SyncItem(ss.CONTAINER_TELEMETRY_SERVICE, ss.HOST_TELEMETRY_SERVICE, 0o644) - ] +STALE_UNIT = b"""[Unit] +Description=Telemetry container - # Add post actions for telemetry.service - ss.POST_COPY_ACTIONS[ss.HOST_TELEMETRY_SERVICE] = [ - ["sudo", "systemctl", "daemon-reload"], - ["sudo", "systemctl", "restart", "telemetry"], - ] +[Service] +User=root +ExecStartPre=/usr/local/bin/telemetry.sh start +ExecStart=/usr/local/bin/telemetry.sh wait +""" - ok = ss.ensure_sync() - assert ok is True - assert host_fs[ss.HOST_TELEMETRY_SERVICE] == b"UNIT-NEW" +CLEAN_UNIT = b"""[Unit] +Description=Telemetry container + +[Service] +User=admin +ExecStartPre=/usr/local/bin/telemetry.sh start +ExecStart=/usr/local/bin/telemetry.sh wait +""" + + +def test_cleanup_stale_unit_restores_from_packed_file(ss): + """When host telemetry.service has User=root, cleanup overwrites it with the packed clean file.""" + ss_mod, container_fs, host_fs, commands, config_db = ss + host_fs[ss_mod._HOST_TELEMETRY_SERVICE] = STALE_UNIT + container_fs[ss_mod._CONTAINER_TELEMETRY_SERVICE] = CLEAN_UNIT - # Verify systemctl actions were invoked + ss_mod._cleanup_stale_service_unit() + + # Host file should now be the clean version + assert host_fs[ss_mod._HOST_TELEMETRY_SERVICE] == CLEAN_UNIT + # daemon-reload and restart should follow post_cmds = [args for _, args in commands if args and args[0] == "sudo"] assert ("sudo", "systemctl", "daemon-reload") in post_cmds assert ("sudo", "systemctl", "restart", "telemetry") in post_cmds +def test_cleanup_skips_when_user_admin(ss): + """When host telemetry.service already has User=admin, cleanup is a no-op.""" + ss_mod, container_fs, host_fs, commands, config_db = ss + host_fs[ss_mod._HOST_TELEMETRY_SERVICE] = CLEAN_UNIT + + ss_mod._cleanup_stale_service_unit() + + # No write should have occurred + write_cmds = [args for _, args in commands if args and args[0] == "/bin/sh"] + assert len(write_cmds) == 0 + + +def test_cleanup_skips_when_file_missing(ss): + """When host telemetry.service doesn't exist, cleanup is a no-op.""" + ss_mod, container_fs, host_fs, commands, config_db = ss + # Don't put the file in host_fs + + ss_mod._cleanup_stale_service_unit() + + write_cmds = [args for _, args in commands if args and args[0] == "/bin/sh"] + assert len(write_cmds) == 0 + + +def test_cleanup_runs_only_once(ss): + """The cleanup is a one-shot; second call should be a no-op.""" + ss_mod, container_fs, host_fs, commands, config_db = ss + host_fs[ss_mod._HOST_TELEMETRY_SERVICE] = STALE_UNIT + container_fs[ss_mod._CONTAINER_TELEMETRY_SERVICE] = CLEAN_UNIT + + ss_mod._cleanup_stale_service_unit() + assert host_fs[ss_mod._HOST_TELEMETRY_SERVICE] == CLEAN_UNIT + + # Revert host to stale to prove second call is a no-op + host_fs[ss_mod._HOST_TELEMETRY_SERVICE] = STALE_UNIT + ss_mod._cleanup_stale_service_unit() + # Should still be stale because the flag prevented re-run + assert host_fs[ss_mod._HOST_TELEMETRY_SERVICE] == STALE_UNIT + +def test_cleanup_retries_after_transient_read_failure(ss): + """When host_read_bytes fails transiently, cleanup retries on the next call.""" + ss_mod, container_fs, host_fs, commands, config_db = ss + container_fs[ss_mod._CONTAINER_TELEMETRY_SERVICE] = CLEAN_UNIT + # First call: host file missing (transient failure) + # Don't put the file in host_fs + + ss_mod._cleanup_stale_service_unit() + assert ss_mod._stale_unit_cleaned is False # flag NOT set; will retry + + # Second call: host file now present with stale content + host_fs[ss_mod._HOST_TELEMETRY_SERVICE] = STALE_UNIT + ss_mod._cleanup_stale_service_unit() + assert host_fs[ss_mod._HOST_TELEMETRY_SERVICE] == CLEAN_UNIT + assert ss_mod._stale_unit_cleaned is True + + +def test_cleanup_disabled_by_env(ss, monkeypatch): + """When STALE_UNIT_CLEANUP_ENABLED=false, cleanup is skipped entirely.""" + ss_mod, container_fs, host_fs, commands, config_db = ss + monkeypatch.setattr(ss_mod, "_STALE_UNIT_CLEANUP_ENABLED", False) + host_fs[ss_mod._HOST_TELEMETRY_SERVICE] = STALE_UNIT + container_fs[ss_mod._CONTAINER_TELEMETRY_SERVICE] = CLEAN_UNIT + + ss_mod._cleanup_stale_service_unit() + # File should NOT be overwritten + assert host_fs[ss_mod._HOST_TELEMETRY_SERVICE] == STALE_UNIT + # Flag set so it won't retry + assert ss_mod._stale_unit_cleaned is True + + # ─────────────────────────── New tests for CONFIG_DB reconcile ─────────────────────────── def test_reconcile_enables_user_auth_and_cname(ss): ss, container_fs, host_fs, commands, config_db = ss # Set module-level flags directly (they're read inside reconcile) ss.GNMI_VERIFY_ENABLED = True - ss.GNMI_CLIENT_CNAME = "AME Infra CA o6" + ss.GNMI_CLIENT_CERTS = [{"cname": "fake-infra-ca.test.example.com", "role": ["gnmi_show_readonly"]}] # Precondition: empty DB assert config_db == {} ss.reconcile_config_db_once() - # user_auth must be set to 'cert' - assert config_db.get("GNMI|gnmi", {}).get("user_auth") == "cert" - # CNAME hash must exist with role=gnmi_show_readonly (default GNMI_CLIENT_ROLE) - cname_key = f"GNMI_CLIENT_CERT|{ss.GNMI_CLIENT_CNAME}" - assert config_db.get(cname_key, {}).get("role") == "gnmi_show_readonly" + assert config_db.get("TELEMETRY|gnmi", {}).get("user_auth") == "cert" + # CNAME hash must exist with role=gnmi_show_readonly + assert config_db.get("GNMI_CLIENT_CERT|fake-infra-ca.test.example.com", {}).get("role") == ["gnmi_show_readonly"] def test_reconcile_disabled_removes_cname(ss): ss, container_fs, host_fs, commands, config_db = ss ss.GNMI_VERIFY_ENABLED = False - ss.GNMI_CLIENT_CNAME = "AME Infra CA o6" # Seed an existing entry to be removed - config_db[f"GNMI_CLIENT_CERT|{ss.GNMI_CLIENT_CNAME}"] = {"role": "gnmi_show_readonly"} + config_db["GNMI_CLIENT_CERT|fake-infra-ca.test.example.com"] = {"role": "gnmi_show_readonly"} + + ss.reconcile_config_db_once() + + assert "GNMI_CLIENT_CERT|fake-infra-ca.test.example.com" not in config_db + + +def test_reconcile_disabled_removes_multiple_cnames(ss): + """When verify=false, all GNMI_CLIENT_CERT entries in the table are removed.""" + ss, container_fs, host_fs, commands, config_db = ss + ss.GNMI_VERIFY_ENABLED = False + + config_db["GNMI_CLIENT_CERT|a.test.example.com"] = {"role": "admin"} + config_db["GNMI_CLIENT_CERT|b.test.example.com"] = {"role": "gnmi_show_readonly"} + + ss.reconcile_config_db_once() + + assert "GNMI_CLIENT_CERT|a.test.example.com" not in config_db + assert "GNMI_CLIENT_CERT|b.test.example.com" not in config_db + + +def test_reconcile_disabled_removes_entries_not_in_env(ss): + """When verify=false, entries NOT in GNMI_CLIENT_CERTS env are also removed.""" + ss, container_fs, host_fs, commands, config_db = ss + ss.GNMI_VERIFY_ENABLED = False + ss.GNMI_CLIENT_CERTS = [] # env list is empty + + # These entries exist in DB but not in env + config_db["GNMI_CLIENT_CERT|unknown.example.com"] = {"role": "admin"} + config_db["GNMI_CLIENT_CERT|other.example.com"] = {"role": "gnmi_show_readonly"} + + ss.reconcile_config_db_once() + + assert "GNMI_CLIENT_CERT|unknown.example.com" not in config_db + assert "GNMI_CLIENT_CERT|other.example.com" not in config_db + +def test_reconcile_disabled_clears_user_auth(ss): + """When verify=false and user_auth was 'cert', the field should be removed.""" + ss, container_fs, host_fs, commands, config_db = ss + ss.GNMI_VERIFY_ENABLED = False + + # Seed user_auth=cert from a prior enabled state + config_db["TELEMETRY|gnmi"] = {"user_auth": "cert"} + + ss.reconcile_config_db_once() + + assert "user_auth" not in config_db.get("TELEMETRY|gnmi", {}) + + +def test_reconcile_disabled_removes_user_auth_any_value(ss): + """When verify=false, user_auth should be removed regardless of its value.""" + ss, container_fs, host_fs, commands, config_db = ss + ss.GNMI_VERIFY_ENABLED = False + + config_db["TELEMETRY|gnmi"] = {"user_auth": "password"} + + ss.reconcile_config_db_once() + + assert "user_auth" not in config_db.get("TELEMETRY|gnmi", {}) + + +# ─────────────── Test that db_del passes None to truly delete keys ─────────────── + +def test_db_del_passes_none_to_set_entry(monkeypatch): + """db_del must call set_entry(table, key, None) to truly remove the key. + + Passing {} would cause typed_to_raw to store {"NULL":"NULL"} as a placeholder. + Passing None causes typed_to_raw to return {} which the C++ layer treats as + a real deletion. + """ + set_entry_calls = [] + + class FakeConfigDB: + def connect(self, *a, **kw): + pass + def get_entry(self, table, key): + return {"role": "admin"} + def set_entry(self, table, key, data): + set_entry_calls.append((table, key, data)) + + monkeypatch.setattr(real_sidecar_common, "_config_db", FakeConfigDB()) + + ok = real_sidecar_common.db_del("GNMI_CLIENT_CERT|test.example.com") + assert ok is True + assert len(set_entry_calls) == 1 + table, key, data = set_entry_calls[0] + assert table == "GNMI_CLIENT_CERT" + assert key == "test.example.com" + assert data is None, f"db_del must pass None to set_entry, got {data!r}" + +def test_reconcile_multiple_cnames(ss): + ss, container_fs, host_fs, commands, config_db = ss + ss.GNMI_VERIFY_ENABLED = True + ss.GNMI_CLIENT_CERTS = [ + {"cname": "fake-client.test.example.com", "role": ["admin"]}, + {"cname": "fake-server.test.example.com", "role": ["gnmi_show_readonly", "admin"]}, + ] + assert config_db == {} ss.reconcile_config_db_once() - assert f"GNMI_CLIENT_CERT|{ss.GNMI_CLIENT_CNAME}" not in config_db + assert config_db.get("TELEMETRY|gnmi", {}).get("user_auth") == "cert" + assert config_db.get("GNMI_CLIENT_CERT|fake-client.test.example.com", {}).get("role") == ["admin"] + assert config_db.get("GNMI_CLIENT_CERT|fake-server.test.example.com", {}).get("role") == ["gnmi_show_readonly", "admin"] + +def test_reconcile_rewrites_stale_json_string_role(ss): + """Reconcile must rewrite a stale JSON-string role into a proper list for YANG compliance.""" + ss, container_fs, host_fs, commands, config_db = ss + ss.GNMI_VERIFY_ENABLED = True + ss.GNMI_CLIENT_CERTS = [ + {"cname": "fake-client.test.example.com", "role": ["admin"]}, + ] + + # Seed a stale entry with old JSON-string format — stored as a string, not a list + config_db["GNMI_CLIENT_CERT|fake-client.test.example.com"] = {"role": '["admin"]'} + + ss.reconcile_config_db_once() + + # Must be rewritten as a proper list so YANG leaf-list validation passes + assert config_db.get("GNMI_CLIENT_CERT|fake-client.test.example.com", {}).get("role") == ["admin"] + +def test_reconcile_rewrites_plain_string_role(ss): + """Reconcile must rewrite a plain-string role into a list for YANG leaf-list compliance.""" + ss, container_fs, host_fs, commands, config_db = ss + ss.GNMI_VERIFY_ENABLED = True + ss.GNMI_CLIENT_CERTS = [ + {"cname": "fake-client.test.example.com", "role": ["gnmi_show_readonly"]}, + ] + + # Seed entry with old plain-string format (causes YANG 'Duplicated instance' errors) + config_db["GNMI_CLIENT_CERT|fake-client.test.example.com"] = {"role": "gnmi_show_readonly"} + + ss.reconcile_config_db_once() + + # Must be rewritten as a proper list + assert config_db.get("GNMI_CLIENT_CERT|fake-client.test.example.com", {}).get("role") == ["gnmi_show_readonly"] + +def test_reconcile_overwrites_when_role_differs(ss): + """Reconcile must overwrite when the stored role differs from the desired one.""" + ss, container_fs, host_fs, commands, config_db = ss + ss.GNMI_VERIFY_ENABLED = True + ss.GNMI_CLIENT_CERTS = [ + {"cname": "fake-client.test.example.com", "role": ["admin", "gnmi_show_readonly"]}, + ] + + # Seed an entry with a different role + config_db["GNMI_CLIENT_CERT|fake-client.test.example.com"] = {"role": ["admin"]} + + ss.reconcile_config_db_once() + + # Must be overwritten with the new role list + assert config_db.get("GNMI_CLIENT_CERT|fake-client.test.example.com", {}).get("role") == ["admin", "gnmi_show_readonly"] + +def test_reconcile_skips_when_role_matches(ss): + """Reconcile should not rewrite if the role already matches.""" + ss, container_fs, host_fs, commands, config_db = ss + ss.GNMI_VERIFY_ENABLED = True + ss.GNMI_CLIENT_CERTS = [ + {"cname": "fake-client.test.example.com", "role": ["admin"]}, + ] + + # Seed an entry that already matches + config_db["GNMI_CLIENT_CERT|fake-client.test.example.com"] = {"role": ["admin"]} + + ss.reconcile_config_db_once() + + assert config_db.get("GNMI_CLIENT_CERT|fake-client.test.example.com", {}).get("role") == ["admin"] + +# ─────────────────────────── Tests for _parse_client_certs ─────────────────────────── + +class TestParseClientCerts: + """Tests for _parse_client_certs() env-var parsing.""" + + @pytest.fixture(autouse=True) + def _fresh_module(self, monkeypatch): + if "systemd_stub" in sys.modules: + del sys.modules["systemd_stub"] + self.monkeypatch = monkeypatch + + def _import_with_env(self, env_vars): + """Set env vars, re-import systemd_stub, and return the parsed GNMI_CLIENT_CERTS.""" + for k, v in env_vars.items(): + if v is None: + self.monkeypatch.delenv(k, raising=False) + else: + self.monkeypatch.setenv(k, v) + # Clear stale env vars not in the dict + for k in ("GNMI_CLIENT_CERTS", "TELEMETRY_CLIENT_CNAME", "GNMI_CLIENT_ROLE"): + if k not in env_vars: + self.monkeypatch.delenv(k, raising=False) + if "systemd_stub" in sys.modules: + del sys.modules["systemd_stub"] + ss = importlib.import_module("systemd_stub") + return ss.GNMI_CLIENT_CERTS + + def test_valid_json_array(self): + certs = self._import_with_env({ + "GNMI_CLIENT_CERTS": '[{"cname": "client.gbl", "role": "admin"}]' + }) + assert certs == [{"cname": "client.gbl", "role": ["admin"]}] + + def test_valid_json_multiple_entries(self): + certs = self._import_with_env({ + "GNMI_CLIENT_CERTS": '[{"cname": "a.gbl", "role": "admin"}, {"cname": "b.gbl", "role": "readonly"}]' + }) + assert len(certs) == 2 + assert certs[0] == {"cname": "a.gbl", "role": ["admin"]} + assert certs[1] == {"cname": "b.gbl", "role": ["readonly"]} + + def test_role_as_json_list(self): + """role provided as a JSON array should be preserved as a list.""" + certs = self._import_with_env({ + "GNMI_CLIENT_CERTS": '[{"cname": "s.gbl", "role": ["gnmi_show_readonly", "admin"]}]' + }) + assert certs == [{"cname": "s.gbl", "role": ["gnmi_show_readonly", "admin"]}] + + def test_non_array_json_falls_back_to_legacy(self): + certs = self._import_with_env({ + "GNMI_CLIENT_CERTS": '{"cname": "c.gbl", "role": "admin"}', + "TELEMETRY_CLIENT_CNAME": "legacy.gbl", + "GNMI_CLIENT_ROLE": "readonly", + }) + assert certs == [{"cname": "legacy.gbl", "role": ["readonly"]}] + + def test_invalid_json_falls_back_to_legacy(self): + certs = self._import_with_env({ + "GNMI_CLIENT_CERTS": "not-json!", + "TELEMETRY_CLIENT_CNAME": "fallback.gbl", + }) + assert certs == [{"cname": "fallback.gbl", "role": ["gnmi_show_readonly"]}] + + def test_entry_not_dict_falls_back(self): + certs = self._import_with_env({ + "GNMI_CLIENT_CERTS": '["not-a-dict"]', + "TELEMETRY_CLIENT_CNAME": "fb.gbl", + }) + assert certs == [{"cname": "fb.gbl", "role": ["gnmi_show_readonly"]}] + + def test_entry_missing_role_falls_back(self): + certs = self._import_with_env({ + "GNMI_CLIENT_CERTS": '[{"cname": "x.gbl"}]', + "TELEMETRY_CLIENT_CNAME": "fb.gbl", + }) + assert certs == [{"cname": "fb.gbl", "role": ["gnmi_show_readonly"]}] + + def test_entry_empty_cname_falls_back(self): + certs = self._import_with_env({ + "GNMI_CLIENT_CERTS": '[{"cname": " ", "role": "admin"}]', + "TELEMETRY_CLIENT_CNAME": "fb.gbl", + }) + assert certs == [{"cname": "fb.gbl", "role": ["gnmi_show_readonly"]}] + + def test_legacy_single_entry(self): + certs = self._import_with_env({ + "TELEMETRY_CLIENT_CNAME": "legacy.gbl", + "GNMI_CLIENT_ROLE": "admin", + }) + assert certs == [{"cname": "legacy.gbl", "role": ["admin"]}] + + def test_legacy_default_role(self): + certs = self._import_with_env({ + "TELEMETRY_CLIENT_CNAME": "legacy.gbl", + }) + assert certs == [{"cname": "legacy.gbl", "role": ["gnmi_show_readonly"]}] + + def test_no_env_returns_empty(self): + certs = self._import_with_env({}) + assert certs == [] + + def test_whitespace_stripped(self): + certs = self._import_with_env({ + "GNMI_CLIENT_CERTS": '[{"cname": " client.gbl ", "role": " admin "}]' + }) + assert certs == [{"cname": "client.gbl", "role": ["admin"]}] + + +# ─────────────────────────── Tests for _get_branch_name ─────────────────────────── + +class TestGetBranchName: + """Tests for _get_branch_name() version-string parsing.""" + + @pytest.fixture(autouse=True) + def _fresh_module(self, monkeypatch): + """Re-import systemd_stub fresh and expose the real _get_branch_name.""" + if "systemd_stub" in sys.modules: + del sys.modules["systemd_stub"] + self.ss = importlib.import_module("systemd_stub") + self.monkeypatch = monkeypatch + + def _set_version_file(self, tmp_path, version_str): + """Create a fake sonic_version.yml and patch the path.""" + vfile = tmp_path / "sonic_version.yml" + vfile.write_text(f'build_version: "{version_str}"\n') + self.monkeypatch.setattr(os.path, "exists", lambda p: p == str(vfile) or os.path.isfile(p)) + # Patch the version_file path inside _get_branch_name + original_fn = self.ss._get_branch_name + def patched(): + import types + # Temporarily replace the hard-coded path + src = original_fn.__code__ + # Simpler: just write to the expected path + return original_fn() + # Instead of complex patching, write to a temp file and patch open/exists + return str(vfile) + + def _mock_version(self, version_str): + """Mock _get_branch_name by patching the file read to return a specific version.""" + original_open = open + version_file = "/etc/sonic/sonic_version.yml" + + def fake_exists(path): + if path == version_file: + return True + return os.path.isfile(path) + + def fake_open(path, *args, **kwargs): + if path == version_file: + import io + return io.StringIO(f'build_version: "{version_str}"\n') + return original_open(path, *args, **kwargs) + + self.monkeypatch.setattr(os.path, "exists", fake_exists) + self.monkeypatch.setattr("builtins.open", fake_open) + + def test_master_branch(self): + self._mock_version("SONiC.master.921927-18199d73f") + assert self.ss._get_branch_name() == "master" + + def test_master_branch_no_prefix(self): + self._mock_version("master.100000-abcdef1234") + assert self.ss._get_branch_name() == "master" + + def test_internal_branch(self): + self._mock_version("SONiC.internal.135691748-dbb8d29985") + assert self.ss._get_branch_name() == "internal" + + def test_internal_branch_no_prefix(self): + self._mock_version("internal.999999-1234abcdef") + assert self.ss._get_branch_name() == "internal" + + def test_feature_branch_202411(self): + self._mock_version("SONiC.20241110.kw.24") + assert self.ss._get_branch_name() == "202411" + + def test_feature_branch_202412(self): + self._mock_version("SONiC.20241215.99") + assert self.ss._get_branch_name() == "202412" + + def test_feature_branch_202505(self): + self._mock_version("20250501.1") + assert self.ss._get_branch_name() == "202505" + + def test_private_unmatched(self): + self._mock_version("my-custom-build-v3") + assert self.ss._get_branch_name() == "private" + + def test_no_version_file(self): + """When no version file and nsenter also fails, returns 'private'.""" + self.monkeypatch.setattr(os.path, "exists", lambda p: False) + self.monkeypatch.setattr( + subprocess, "run", + lambda *a, **kw: types.SimpleNamespace(returncode=1, stdout="", stderr="") + ) + assert self.ss._get_branch_name() == "private" + + +# ─────────── Tests for branch-conditional container_checker in ensure_sync ─────────── + +def test_ensure_sync_uses_202411_checker(ss): + """When branch is 202411, ensure_sync uses the branch-specific container_checker.""" + ss_mod, container_fs, host_fs, commands, config_db = ss + + # Override _get_branch_name to return 202411 + ss_mod._get_branch_name = lambda: "202411" + + # Provide the 202411-specific checker in the container and a different one on host + container_fs["/usr/share/sonic/systemd_scripts/container_checker_202411"] = b"checker-202411" + host_fs["/bin/container_checker"] = b"old-checker" + + # Also provide 202411 service_checker so it doesn't fail + container_fs["/usr/share/sonic/systemd_scripts/service_checker.py_202411"] = b"service-checker-202411" + host_fs[ss_mod.HOST_SERVICE_CHECKER] = b"service-checker-202411" + + # Clear SYNC_ITEMS to focus only on the container_checker logic + ss_mod.SYNC_ITEMS[:] = [] + + ok = ss_mod.ensure_sync() + assert ok is True + assert host_fs["/bin/container_checker"] == b"checker-202411" + + +def test_ensure_sync_aborts_for_unsupported_branch(ss): + """When branch is not in the supported list, ensure_sync aborts and returns False.""" + ss_mod, container_fs, host_fs, commands, config_db = ss + + ss_mod._get_branch_name = lambda: "master" + + host_fs["/bin/container_checker"] = b"old-checker" + + ok = ss_mod.ensure_sync() + assert ok is False + # Nothing should be synced + assert host_fs["/bin/container_checker"] == b"old-checker" + + +def test_ensure_sync_202411_missing_checker_fails(ss): + """When branch is 202411 but the branch-specific checker is missing, sync fails.""" + ss_mod, container_fs, host_fs, commands, config_db = ss + + ss_mod._get_branch_name = lambda: "202411" + + # Don't provide the 202411 checker in container_fs + # Remove default checker too + container_fs.pop("/usr/share/sonic/systemd_scripts/container_checker_202411", None) + container_fs.pop("/usr/share/sonic/systemd_scripts/container_checker", None) + + ss_mod.SYNC_ITEMS[:] = [] + + ok = ss_mod.ensure_sync() + assert ok is False + + +# ─────────── Tests for branch-conditional service_checker.py in ensure_sync ─────────── + +def test_ensure_sync_uses_202411_service_checker(ss): + """When branch is 202411, ensure_sync uses the branch-specific service_checker.py.""" + ss_mod, container_fs, host_fs, commands, config_db = ss + + ss_mod._get_branch_name = lambda: "202411" + + # Provide the 202411-specific service_checker in the container and a different one on host + container_fs["/usr/share/sonic/systemd_scripts/service_checker.py_202411"] = b"service-checker-202411" + host_fs[ss_mod.HOST_SERVICE_CHECKER] = b"old-service-checker" + + # Also provide container_checker so it doesn't fail + container_fs["/usr/share/sonic/systemd_scripts/container_checker_202411"] = b"checker-202411" + host_fs["/bin/container_checker"] = b"checker-202411" + + ss_mod.SYNC_ITEMS[:] = [] + + ok = ss_mod.ensure_sync() + assert ok is True + assert host_fs[ss_mod.HOST_SERVICE_CHECKER] == b"service-checker-202411" + + +def test_ensure_sync_aborts_service_checker_for_unsupported_branch(ss): + """When branch is not in the supported list, ensure_sync aborts without syncing service_checker.""" + ss_mod, container_fs, host_fs, commands, config_db = ss + + ss_mod._get_branch_name = lambda: "master" + + host_fs[ss_mod.HOST_SERVICE_CHECKER] = b"old-service-checker" + + ok = ss_mod.ensure_sync() + assert ok is False + # service_checker should NOT be overwritten + assert host_fs[ss_mod.HOST_SERVICE_CHECKER] == b"old-service-checker" + + +def test_ensure_sync_202411_missing_service_checker_fails(ss): + """When branch is 202411 but the branch-specific service_checker is missing, sync fails.""" + ss_mod, container_fs, host_fs, commands, config_db = ss + + ss_mod._get_branch_name = lambda: "202411" + + # Provide container_checker so only service_checker causes the failure + container_fs["/usr/share/sonic/systemd_scripts/container_checker_202411"] = b"checker-202411" + host_fs["/bin/container_checker"] = b"checker-202411" + + # Remove service_checker sources + container_fs.pop("/usr/share/sonic/systemd_scripts/service_checker.py_202411", None) + container_fs.pop("/usr/share/sonic/systemd_scripts/service_checker.py", None) + + ss_mod.SYNC_ITEMS[:] = [] + + ok = ss_mod.ensure_sync() + assert ok is False + + +# ─────────── Tests for branch-conditional 202505 in ensure_sync ─────────── + +def test_ensure_sync_uses_202505_checker(ss): + """When branch is 202505, ensure_sync uses the branch-specific container_checker.""" + ss_mod, container_fs, host_fs, commands, config_db = ss + + ss_mod._get_branch_name = lambda: "202505" + + container_fs["/usr/share/sonic/systemd_scripts/container_checker_202505"] = b"checker-202505" + host_fs["/bin/container_checker"] = b"old-checker" + + # Also provide 202505 service_checker so it doesn't fail + container_fs["/usr/share/sonic/systemd_scripts/service_checker.py_202505"] = b"service-checker-202505" + host_fs[ss_mod.HOST_SERVICE_CHECKER] = b"service-checker-202505" + + ss_mod.SYNC_ITEMS[:] = [] + + ok = ss_mod.ensure_sync() + assert ok is True + assert host_fs["/bin/container_checker"] == b"checker-202505" + + +def test_ensure_sync_uses_202505_service_checker(ss): + """When branch is 202505, ensure_sync uses the branch-specific service_checker.py.""" + ss_mod, container_fs, host_fs, commands, config_db = ss + + ss_mod._get_branch_name = lambda: "202505" + + container_fs["/usr/share/sonic/systemd_scripts/service_checker.py_202505"] = b"service-checker-202505" + host_fs[ss_mod.HOST_SERVICE_CHECKER] = b"old-service-checker" + + # Also provide container_checker so it doesn't fail + container_fs["/usr/share/sonic/systemd_scripts/container_checker_202505"] = b"checker-202505" + host_fs["/bin/container_checker"] = b"checker-202505" + + ss_mod.SYNC_ITEMS[:] = [] + + ok = ss_mod.ensure_sync() + assert ok is True + assert host_fs[ss_mod.HOST_SERVICE_CHECKER] == b"service-checker-202505" + + +def test_ensure_sync_202505_missing_checker_fails(ss): + """When branch is 202505 but the branch-specific checker is missing, sync fails.""" + ss_mod, container_fs, host_fs, commands, config_db = ss + + ss_mod._get_branch_name = lambda: "202505" + + container_fs.pop("/usr/share/sonic/systemd_scripts/container_checker_202505", None) + container_fs.pop("/usr/share/sonic/systemd_scripts/container_checker", None) + + ss_mod.SYNC_ITEMS[:] = [] + + ok = ss_mod.ensure_sync() + assert ok is False + + +def test_ensure_sync_202505_missing_service_checker_fails(ss): + """When branch is 202505 but the branch-specific service_checker is missing, sync fails.""" + ss_mod, container_fs, host_fs, commands, config_db = ss + + ss_mod._get_branch_name = lambda: "202505" + + # Provide container_checker so only service_checker causes the failure + container_fs["/usr/share/sonic/systemd_scripts/container_checker_202505"] = b"checker-202505" + host_fs["/bin/container_checker"] = b"checker-202505" + + container_fs.pop("/usr/share/sonic/systemd_scripts/service_checker.py_202505", None) + container_fs.pop("/usr/share/sonic/systemd_scripts/service_checker.py", None) + + ss_mod.SYNC_ITEMS[:] = [] + + ok = ss_mod.ensure_sync() + assert ok is False + + +# ─────────── Tests for branch-conditional 202412 in ensure_sync ─────────── + +def test_ensure_sync_uses_202412_checker(ss): + """When branch is 202412, ensure_sync uses the branch-specific container_checker.""" + ss_mod, container_fs, host_fs, commands, config_db = ss + + ss_mod._get_branch_name = lambda: "202412" + + container_fs["/usr/share/sonic/systemd_scripts/container_checker_202412"] = b"checker-202412" + host_fs["/bin/container_checker"] = b"old-checker" + + # Also provide 202412 service_checker so it doesn't fail + container_fs["/usr/share/sonic/systemd_scripts/service_checker.py_202412"] = b"service-checker-202412" + host_fs[ss_mod.HOST_SERVICE_CHECKER] = b"service-checker-202412" + + ss_mod.SYNC_ITEMS[:] = [] + + ok = ss_mod.ensure_sync() + assert ok is True + assert host_fs["/bin/container_checker"] == b"checker-202412" + + +def test_ensure_sync_uses_202412_service_checker(ss): + """When branch is 202412, ensure_sync uses the branch-specific service_checker.py.""" + ss_mod, container_fs, host_fs, commands, config_db = ss + + ss_mod._get_branch_name = lambda: "202412" + + container_fs["/usr/share/sonic/systemd_scripts/service_checker.py_202412"] = b"service-checker-202412" + host_fs[ss_mod.HOST_SERVICE_CHECKER] = b"old-service-checker" + + # Also provide container_checker so it doesn't fail + container_fs["/usr/share/sonic/systemd_scripts/container_checker_202412"] = b"checker-202412" + host_fs["/bin/container_checker"] = b"checker-202412" + + ss_mod.SYNC_ITEMS[:] = [] + + ok = ss_mod.ensure_sync() + assert ok is True + assert host_fs[ss_mod.HOST_SERVICE_CHECKER] == b"service-checker-202412" + + +def test_ensure_sync_202412_missing_checker_fails(ss): + """When branch is 202412 but the branch-specific checker is missing, sync fails.""" + ss_mod, container_fs, host_fs, commands, config_db = ss + + ss_mod._get_branch_name = lambda: "202412" + + container_fs.pop("/usr/share/sonic/systemd_scripts/container_checker_202412", None) + container_fs.pop("/usr/share/sonic/systemd_scripts/container_checker", None) + + ss_mod.SYNC_ITEMS[:] = [] + + ok = ss_mod.ensure_sync() + assert ok is False + + +def test_ensure_sync_202412_missing_service_checker_fails(ss): + """When branch is 202412 but the branch-specific service_checker is missing, sync fails.""" + ss_mod, container_fs, host_fs, commands, config_db = ss + + ss_mod._get_branch_name = lambda: "202412" + + # Provide container_checker so only service_checker causes the failure + container_fs["/usr/share/sonic/systemd_scripts/container_checker_202412"] = b"checker-202412" + host_fs["/bin/container_checker"] = b"checker-202412" + + container_fs.pop("/usr/share/sonic/systemd_scripts/service_checker.py_202412", None) + container_fs.pop("/usr/share/sonic/systemd_scripts/service_checker.py", None) + + ss_mod.SYNC_ITEMS[:] = [] + + ok = ss_mod.ensure_sync() + assert ok is False + + +# ─────────────── Tests for _apply_config_patch / _build_enabled_patch ─────────────── + +def test_apply_config_patch_empty_is_noop(ss): + """An empty patch list should return True without calling nsenter.""" + ss_mod, container_fs, host_fs, commands, config_db = ss + before_count = len(commands) + + result = ss_mod._apply_config_patch([]) + assert result is True + assert len(commands) == before_count # no new nsenter calls + + +def test_apply_config_patch_calls_nsenter(ss): + """A non-empty patch should invoke 'sudo -n config apply-patch /dev/stdin'.""" + ss_mod, container_fs, host_fs, commands, config_db = ss + patch = [{ + "op": "add", "path": "/GNMI_CLIENT_CERT", + "value": {"probe.example.com": {"role": ["admin"]}} + }] + + result = ss_mod._apply_config_patch(patch) + assert result is True + + apply_cmds = [ + args for _, args in commands + if len(args) >= 4 and args[:4] == ("sudo", "-n", "config", "apply-patch") + ] + assert len(apply_cmds) >= 1 + + +def test_build_enabled_patch_table_absent(ss): + """When GNMI_CLIENT_CERT table is absent, patch uses a single 'add' at table level.""" + ss_mod, container_fs, host_fs, commands, config_db = ss + ss_mod.GNMI_VERIFY_ENABLED = True + ss_mod.GNMI_CLIENT_CERTS = [ + {"cname": "a.test.example.com", "role": ["admin"]}, + {"cname": "b.test.example.com", "role": ["readonly"]}, + ] + config_db.clear() + + patch = ss_mod._build_enabled_patch() + + # Should have user_auth add + one table-level add + assert len(patch) == 2 + table_op = [p for p in patch if p["path"] == "/GNMI_CLIENT_CERT"] + assert len(table_op) == 1 + assert table_op[0]["op"] == "add" + assert "a.test.example.com" in table_op[0]["value"] + assert "b.test.example.com" in table_op[0]["value"] + + +def test_build_enabled_patch_mixed_new_and_existing(ss): + """When table exists, new entries get 'add' and stale entries get 'replace'.""" + ss_mod, container_fs, host_fs, commands, config_db = ss + ss_mod.GNMI_VERIFY_ENABLED = True + ss_mod.GNMI_CLIENT_CERTS = [ + {"cname": "existing.test.example.com", "role": ["admin", "readonly"]}, + {"cname": "new.test.example.com", "role": ["admin"]}, + ] + # Seed existing entry with a different (stale) role + config_db.clear() + config_db["GNMI_CLIENT_CERT|existing.test.example.com"] = {"role": ["admin"]} + + patch = ss_mod._build_enabled_patch() + + # user_auth add + replace for existing + add for new = 3 ops + cert_ops = [p for p in patch if p["path"].startswith("/GNMI_CLIENT_CERT/")] + assert len(cert_ops) == 2 + + replace_op = [p for p in cert_ops if p["op"] == "replace"] + assert len(replace_op) == 1 + assert replace_op[0]["path"] == "/GNMI_CLIENT_CERT/existing.test.example.com" + + add_op = [p for p in cert_ops if p["op"] == "add"] + assert len(add_op) == 1 + assert add_op[0]["path"] == "/GNMI_CLIENT_CERT/new.test.example.com" + + +def test_build_enabled_patch_all_up_to_date(ss): + """When everything matches, the patch should be empty.""" + ss_mod, container_fs, host_fs, commands, config_db = ss + ss_mod.GNMI_VERIFY_ENABLED = True + ss_mod.GNMI_CLIENT_CERTS = [ + {"cname": "ok.test.example.com", "role": ["admin"]}, + ] + config_db.clear() + config_db["TELEMETRY|gnmi"] = {"user_auth": "cert", "port": "8080"} + config_db["GNMI_CLIENT_CERT|ok.test.example.com"] = {"role": ["admin"]} + + patch = ss_mod._build_enabled_patch() + assert patch == [] + + +def test_reconcile_enabled_uses_apply_patch_command(ss): + """Reconcile in enabled mode should use 'config apply-patch' via nsenter.""" + ss_mod, container_fs, host_fs, commands, config_db = ss + ss_mod.GNMI_VERIFY_ENABLED = True + ss_mod.GNMI_CLIENT_CERTS = [{"cname": "test.example.com", "role": ["admin"]}] + config_db.clear() + + ss_mod.reconcile_config_db_once() + + apply_cmds = [ + args for _, args in commands + if len(args) >= 4 and args[:4] == ("sudo", "-n", "config", "apply-patch") + ] + assert len(apply_cmds) >= 1 + # Verify the end state + assert config_db.get("TELEMETRY|gnmi", {}).get("user_auth") == "cert" + assert config_db.get("GNMI_CLIENT_CERT|test.example.com", {}).get("role") == ["admin"] diff --git a/dockers/docker-telemetry-sidecar/systemd_scripts/container_checker_202411 b/dockers/docker-telemetry-sidecar/systemd_scripts/container_checker_202411 new file mode 100644 index 00000000000..43b3ef7a470 --- /dev/null +++ b/dockers/docker-telemetry-sidecar/systemd_scripts/container_checker_202411 @@ -0,0 +1,237 @@ +#!/usr/bin/env python3 + +""" +container_checker + +This script is intended to be run by Monit. It will write an alerting message into +syslog if it found containers which were expected to run but were not running. At +the same time, if some containers were unexpected to run, it also writes an alerting +syslog message. Note that if print(...) statement in this script was executed, the +string in it will be appended to Monit syslog messages. + +The following is an example in Monit configuration file to show how Monit will run +this script: + +check program container_checker with path "/usr/bin/container_checker" + if status != 0 for 5 times within 5 cycles then alert repeat every 1 cycles +""" + +import docker +import sys + +from sonic_py_common import multi_asic, device_info +from swsscommon import swsscommon + +EVENTS_PUBLISHER_SOURCE = "sonic-events-host" +EVENTS_PUBLISHER_TAG = "event-down-ctr" + +def check_docker_image(image_name): + """ + @summary: This function will check if docker image exists. + @return: True if the image exists, otherwise False. + """ + try: + DOCKER_CLIENT = docker.DockerClient(base_url='unix://var/run/docker.sock') + DOCKER_CLIENT.images.get(image_name) + return True + except (docker.errors.ImageNotFound, docker.errors.APIError) as err: + return False + +def get_expected_running_containers(): + """ + @summary: This function will get the expected running & always-enabled containers by following the rule: + The 'state' field of container in 'FEATURE' table should not be 'disabled' or 'always_disabled'. + If the device has Multi-ASIC, this function will get container list by determining the + value of field 'has_global_scope', the number of ASICs and the value of field + 'has_per_asic_scope'. + If the device has single ASIC, the container name was put into the list. + @return: A set which contains the expected running containers and a set that has + containers marked as "always_enabled". + """ + config_db = swsscommon.ConfigDBConnector() + config_db.connect() + feature_table = config_db.get_table("FEATURE") + + expected_running_containers = set() + always_running_containers = set() + + # Get current asic presence list. For multi_asic system, multi instance containers + # should be checked only for asics present. + asics_id_presence = multi_asic.get_asic_presence_list() + + # Some services may run all the instances irrespective of asic presence. + # Add those to exception list. + # database service: Currently services have dependency on all database services to + # be up irrespective of asic presence. + # bgp service: Currently bgp runs all instances. Once this is fixed to be config driven, + # it will be removed from exception list. + run_all_instance_list = ['database', 'bgp'] + + container_list = [] + for container_name in feature_table.keys(): + # skip frr_bmp since it's not container just bmp option used by bgpd + if container_name == "frr_bmp": + continue + # slim image does not have telemetry container and corresponding docker image + if container_name == "telemetry": + ret = check_docker_image("docker-sonic-telemetry") + if not ret: + # If telemetry container image is not present, check gnmi container image + # If gnmi container image is not present, ignore telemetry container check + # if gnmi container image is present, check gnmi container instead of telemetry + ret = check_docker_image("docker-sonic-gnmi") + if not ret: + print("Ignoring telemetry container check on image which has no corresponding telemetry or gnmi docker image") + else: + container_list.append("gnmi") + continue + container_list.append(container_name) + + for container_name in container_list: + if feature_table[container_name]["state"] not in ["disabled", "always_disabled"]: + if multi_asic.is_multi_asic(): + if feature_table[container_name].get("has_global_scope", "True") == "True": + expected_running_containers.add(container_name) + if feature_table[container_name].get("has_per_asic_scope", "False") == "True": + num_asics = multi_asic.get_num_asics() + for asic_id in range(num_asics): + if asic_id in asics_id_presence or container_name in run_all_instance_list: + expected_running_containers.add(container_name + str(asic_id)) + else: + expected_running_containers.add(container_name) + if feature_table[container_name]["state"] == 'always_enabled': + if multi_asic.is_multi_asic(): + if feature_table[container_name].get("has_global_scope", "True") == "True": + always_running_containers.add(container_name) + if feature_table[container_name].get("has_per_asic_scope", "False") == "True": + num_asics = multi_asic.get_num_asics() + for asic_id in range(num_asics): + if asic_id in asics_id_presence or container_name in run_all_instance_list: + always_running_containers.add(container_name + str(asic_id)) + else: + always_running_containers.add(container_name) + + if device_info.is_supervisor() or device_info.is_smartswitch(): + always_running_containers.add("database-chassis") + + if device_info.is_smartswitch(): + raw_dpustable = config_db.get_table("DPUS") + for dpu_name in raw_dpustable: + container_name = f"databasedpu{dpu_name.replace('dpu', '')}" + always_running_containers.add(container_name) + + return expected_running_containers, always_running_containers + +def get_current_running_from_DB(always_running_containers): + """ + @summary: This function will get the current running container list + from FEATURE table @ STATE_DB, if this table is available. + @return: a tuple + First: Return value indicating if info can be obtained from + DB or not. + Second: A set which contains the current running containers, + if this info is available in DB. + """ + running_containers = set() + + state_db = swsscommon.DBConnector("STATE_DB", 0) + tbl = swsscommon.Table(state_db, "FEATURE") + if not tbl.getKeys(): + return running_containers + + for name in tbl.getKeys(): + data = dict(tbl.get(name)[1]) + if data.get('container_id'): + running_containers.add(name) + + DOCKER_CLIENT = docker.DockerClient(base_url='unix://var/run/docker.sock') + RUNNING = 'running' + for name in always_running_containers: + try: + container = DOCKER_CLIENT.containers.get(name) + container_state = container.attrs.get('State', {}) + if container_state.get('Status', "") == RUNNING: + running_containers.add(name) + except (docker.errors.NotFound, docker.errors.APIError) as err: + print("Failed to get container '{}'. Error: '{}'".format(name, err)) + pass + + return running_containers + +def get_current_running_from_dockers(): + """ + @summary: This function will get all running containers from + the list of docker containers in running state. + If namespace == 'sonic': it's rollout-ed via kubernetes so add io.kubernetes.container.name + If namespace is missing/empty: it's image native container, add ctr.name directly + @return: A set which contains containers that are + in running state. + """ + DOCKER_CLIENT = docker.DockerClient(base_url='unix://var/run/docker.sock') + running_containers = set() + + try: + for ctr in DOCKER_CLIENT.containers.list(filters={"status": "running"}): + labels = ctr.labels or {} + ns = labels.get("io.kubernetes.pod.namespace") + dtype = labels.get("io.kubernetes.docker.type") + kname = labels.get("io.kubernetes.container.name") + + if ns == "sonic": + if dtype == "container" and kname and kname not in ("", "POD"): + running_containers.add(kname) + elif not ns: + running_containers.add(ctr.name) + + except docker.errors.APIError as err: + print(f"Failed to retrieve the running container list. Error: '{err}'") + pass + except docker.errors.DockerException as err: + print(f"Docker client error: '{err}'") + pass + return running_containers + +def get_current_running_containers(always_running_containers): + """ + @summary: This function will get the list of currently running containers. + If available in STATE-DB, get from DB else from list of dockers. + + @return: A set of currently running containers. + """ + + current_running_containers = get_current_running_from_DB(always_running_containers) + current_running_containers.update(get_current_running_from_dockers()) + return current_running_containers + + +def publish_events(lst): + events_handle = swsscommon.events_init_publisher(EVENTS_PUBLISHER_SOURCE) + params = swsscommon.FieldValueMap() + + for ctr in lst: + params["ctr_name"] = ctr; + swsscommon.event_publish(events_handle, EVENTS_PUBLISHER_TAG, params) + + swsscommon.events_deinit_publisher(events_handle) + + +def main(): + """ + @summary: This function will compare the difference between the current running containers + and the containers which were expected to run. If containers which were exepcted + to run were not running, then an alerting message will be written into syslog. + """ + expected_running_containers, always_running_containers = get_expected_running_containers() + current_running_containers = get_current_running_containers(always_running_containers) + + expected_running_containers |= always_running_containers + not_running_containers = expected_running_containers.difference(current_running_containers) + if not_running_containers: + publish_events(not_running_containers) + print("Expected containers not running: " + ", ".join(not_running_containers)) + sys.exit(3) + + +if __name__ == "__main__": + main() + sys.exit(0) diff --git a/dockers/docker-telemetry-sidecar/systemd_scripts/container_checker_202412 b/dockers/docker-telemetry-sidecar/systemd_scripts/container_checker_202412 new file mode 100644 index 00000000000..c7e023a92b6 --- /dev/null +++ b/dockers/docker-telemetry-sidecar/systemd_scripts/container_checker_202412 @@ -0,0 +1,238 @@ + +#!/usr/bin/env python3 + +""" +container_checker + +This script is intended to be run by Monit. It will write an alerting message into +syslog if it found containers which were expected to run but were not running. At +the same time, if some containers were unexpected to run, it also writes an alerting +syslog message. Note that if print(...) statement in this script was executed, the +string in it will be appended to Monit syslog messages. + +The following is an example in Monit configuration file to show how Monit will run +this script: + +check program container_checker with path "/usr/bin/container_checker" + if status != 0 for 5 times within 5 cycles then alert repeat every 1 cycles +""" + +import docker +import sys + +from sonic_py_common import multi_asic, device_info +from swsscommon import swsscommon + +EVENTS_PUBLISHER_SOURCE = "sonic-events-host" +EVENTS_PUBLISHER_TAG = "event-down-ctr" + +def check_docker_image(image_name): + """ + @summary: This function will check if docker image exists. + @return: True if the image exists, otherwise False. + """ + try: + DOCKER_CLIENT = docker.DockerClient(base_url='unix://var/run/docker.sock') + DOCKER_CLIENT.images.get(image_name) + return True + except (docker.errors.ImageNotFound, docker.errors.APIError) as err: + return False + +def get_expected_running_containers(): + """ + @summary: This function will get the expected running & always-enabled containers by following the rule: + The 'state' field of container in 'FEATURE' table should not be 'disabled' or 'always_disabled'. + If the device has Multi-ASIC, this function will get container list by determining the + value of field 'has_global_scope', the number of ASICs and the value of field + 'has_per_asic_scope'. + If the device has single ASIC, the container name was put into the list. + @return: A set which contains the expected running containers and a set that has + containers marked as "always_enabled". + """ + config_db = swsscommon.ConfigDBConnector() + config_db.connect() + feature_table = config_db.get_table("FEATURE") + + expected_running_containers = set() + always_running_containers = set() + + # Get current asic presence list. For multi_asic system, multi instance containers + # should be checked only for asics present. + asics_id_presence = multi_asic.get_asic_presence_list() + + # Some services may run all the instances irrespective of asic presence. + # Add those to exception list. + # database service: Currently services have dependency on all database services to + # be up irrespective of asic presence. + # bgp service: Currently bgp runs all instances. Once this is fixed to be config driven, + # it will be removed from exception list. + run_all_instance_list = ['database', 'bgp'] + + container_list = [] + for container_name in feature_table.keys(): + # skip frr_bmp since it's not container just bmp option used by bgpd + if container_name == "frr_bmp": + continue + # slim image does not have telemetry container and corresponding docker image + if container_name == "telemetry": + ret = check_docker_image("docker-sonic-telemetry") + if not ret: + # If telemetry container image is not present, check gnmi container image + # If gnmi container image is not present, ignore telemetry container check + # if gnmi container image is present, check gnmi container instead of telemetry + ret = check_docker_image("docker-sonic-gnmi") + if not ret: + print("Ignoring telemetry container check on image which has no corresponding telemetry or gnmi docker image") + else: + container_list.append("gnmi") + continue + container_list.append(container_name) + + for container_name in container_list: + if feature_table[container_name]["state"] not in ["disabled", "always_disabled"]: + if multi_asic.is_multi_asic(): + if feature_table[container_name].get("has_global_scope", "True") == "True": + expected_running_containers.add(container_name) + if feature_table[container_name].get("has_per_asic_scope", "False") == "True": + num_asics = multi_asic.get_num_asics() + for asic_id in range(num_asics): + if asic_id in asics_id_presence or container_name in run_all_instance_list: + expected_running_containers.add(container_name + str(asic_id)) + else: + expected_running_containers.add(container_name) + if feature_table[container_name]["state"] == 'always_enabled': + if multi_asic.is_multi_asic(): + if feature_table[container_name].get("has_global_scope", "True") == "True": + always_running_containers.add(container_name) + if feature_table[container_name].get("has_per_asic_scope", "False") == "True": + num_asics = multi_asic.get_num_asics() + for asic_id in range(num_asics): + if asic_id in asics_id_presence or container_name in run_all_instance_list: + always_running_containers.add(container_name + str(asic_id)) + else: + always_running_containers.add(container_name) + + if device_info.is_supervisor() or device_info.is_smartswitch(): + always_running_containers.add("database-chassis") + + if device_info.is_smartswitch(): + raw_dpustable = config_db.get_table("DPUS") + for dpu_name in raw_dpustable: + container_name = f"databasedpu{dpu_name.replace('dpu', '')}" + always_running_containers.add(container_name) + + return expected_running_containers, always_running_containers + +def get_current_running_from_DB(always_running_containers): + """ + @summary: This function will get the current running container list + from FEATURE table @ STATE_DB, if this table is available. + @return: a tuple + First: Return value indicating if info can be obtained from + DB or not. + Second: A set which contains the current running containers, + if this info is available in DB. + """ + running_containers = set() + + state_db = swsscommon.DBConnector("STATE_DB", 0) + tbl = swsscommon.Table(state_db, "FEATURE") + if not tbl.getKeys(): + return running_containers + + for name in tbl.getKeys(): + data = dict(tbl.get(name)[1]) + if data.get('container_id'): + running_containers.add(name) + + DOCKER_CLIENT = docker.DockerClient(base_url='unix://var/run/docker.sock') + RUNNING = 'running' + for name in always_running_containers: + try: + container = DOCKER_CLIENT.containers.get(name) + container_state = container.attrs.get('State', {}) + if container_state.get('Status', "") == RUNNING: + running_containers.add(name) + except (docker.errors.NotFound, docker.errors.APIError) as err: + print("Failed to get container '{}'. Error: '{}'".format(name, err)) + pass + + return running_containers + +def get_current_running_from_dockers(): + """ + @summary: This function will get all running containers from + the list of docker containers in running state. + If namespace == 'sonic': it's rollout-ed via kubernetes so add io.kubernetes.container.name + If namespace is missing/empty: it's image native container, add ctr.name directly + @return: A set which contains containers that are + in running state. + """ + DOCKER_CLIENT = docker.DockerClient(base_url='unix://var/run/docker.sock') + running_containers = set() + + try: + for ctr in DOCKER_CLIENT.containers.list(filters={"status": "running"}): + labels = ctr.labels or {} + ns = labels.get("io.kubernetes.pod.namespace") + dtype = labels.get("io.kubernetes.docker.type") + kname = labels.get("io.kubernetes.container.name") + + if ns == "sonic": + if dtype == "container" and kname and kname not in ("", "POD"): + running_containers.add(kname) + elif not ns: + running_containers.add(ctr.name) + + except docker.errors.APIError as err: + print(f"Failed to retrieve the running container list. Error: '{err}'") + pass + except docker.errors.DockerException as err: + print(f"Docker client error: '{err}'") + pass + return running_containers + +def get_current_running_containers(always_running_containers): + """ + @summary: This function will get the list of currently running containers. + If available in STATE-DB, get from DB else from list of dockers. + + @return: A set of currently running containers. + """ + + current_running_containers = get_current_running_from_DB(always_running_containers) + current_running_containers.update(get_current_running_from_dockers()) + return current_running_containers + + +def publish_events(lst): + events_handle = swsscommon.events_init_publisher(EVENTS_PUBLISHER_SOURCE) + params = swsscommon.FieldValueMap() + + for ctr in lst: + params["ctr_name"] = ctr; + swsscommon.event_publish(events_handle, EVENTS_PUBLISHER_TAG, params) + + swsscommon.events_deinit_publisher(events_handle) + + +def main(): + """ + @summary: This function will compare the difference between the current running containers + and the containers which were expected to run. If containers which were exepcted + to run were not running, then an alerting message will be written into syslog. + """ + expected_running_containers, always_running_containers = get_expected_running_containers() + current_running_containers = get_current_running_containers(always_running_containers) + + expected_running_containers |= always_running_containers + not_running_containers = expected_running_containers.difference(current_running_containers) + if not_running_containers: + publish_events(not_running_containers) + print("Expected containers not running: " + ", ".join(not_running_containers)) + sys.exit(3) + + +if __name__ == "__main__": + main() + sys.exit(0) diff --git a/dockers/docker-telemetry-sidecar/systemd_scripts/container_checker_202505 b/dockers/docker-telemetry-sidecar/systemd_scripts/container_checker_202505 new file mode 100644 index 00000000000..1583a127b0e --- /dev/null +++ b/dockers/docker-telemetry-sidecar/systemd_scripts/container_checker_202505 @@ -0,0 +1,237 @@ +#!/usr/bin/env python3 + +""" +container_checker + +This script is intended to be run by Monit. It will write an alerting message into +syslog if it found containers which were expected to run but were not running. At +the same time, if some containers were unexpected to run, it also writes an alerting +syslog message. Note that if print(...) statement in this script was executed, the +string in it will be appended to Monit syslog messages. + +The following is an example in Monit configuration file to show how Monit will run +this script: + +check program container_checker with path "/usr/bin/container_checker" + if status != 0 for 5 times within 5 cycles then alert repeat every 1 cycles +""" + +import docker +import sys + +from sonic_py_common import multi_asic, device_info +from swsscommon import swsscommon + +EVENTS_PUBLISHER_SOURCE = "sonic-events-host" +EVENTS_PUBLISHER_TAG = "event-down-ctr" + +def check_docker_image(image_name): + """ + @summary: This function will check if docker image exists. + @return: True if the image exists, otherwise False. + """ + try: + DOCKER_CLIENT = docker.DockerClient(base_url='unix://var/run/docker.sock') + DOCKER_CLIENT.images.get(image_name) + return True + except (docker.errors.ImageNotFound, docker.errors.APIError) as err: + return False + +def get_expected_running_containers(): + """ + @summary: This function will get the expected running & always-enabled containers by following the rule: + The 'state' field of container in 'FEATURE' table should not be 'disabled' or 'always_disabled'. + If the device has Multi-ASIC, this function will get container list by determining the + value of field 'has_global_scope', the number of ASICs and the value of field + 'has_per_asic_scope'. + If the device has single ASIC, the container name was put into the list. + @return: A set which contains the expected running containers and a set that has + containers marked as "always_enabled". + """ + config_db = swsscommon.ConfigDBConnector() + config_db.connect() + feature_table = config_db.get_table("FEATURE") + + expected_running_containers = set() + always_running_containers = set() + + # Get current asic presence list. For multi_asic system, multi instance containers + # should be checked only for asics present. + asics_id_presence = multi_asic.get_asic_presence_list() + + # Some services may run all the instances irrespective of asic presence. + # Add those to exception list. + # database service: Currently services have dependency on all database services to + # be up irrespective of asic presence. + # bgp service: Currently bgp runs all instances. Once this is fixed to be config driven, + # it will be removed from exception list. + run_all_instance_list = ['database', 'bgp'] + + container_list = [] + for container_name in feature_table.keys(): + # skip frr_bmp since it's not container just bmp option used by bgpd + if container_name == "frr_bmp": + continue + # slim image does not have telemetry container and corresponding docker image + if container_name == "telemetry": + ret = check_docker_image("docker-sonic-telemetry") + if not ret: + # If telemetry container image is not present, check gnmi container image + # If gnmi container image is not present, ignore telemetry container check + # if gnmi container image is present, check gnmi container instead of telemetry + ret = check_docker_image("docker-sonic-gnmi") + if not ret: + print("Ignoring telemetry container check on image which has no corresponding telemetry or gnmi docker image") + else: + container_list.append("gnmi") + continue + container_list.append(container_name) + + for container_name in container_list: + if feature_table[container_name]["state"] not in ["disabled", "always_disabled"]: + if multi_asic.is_multi_asic(): + if feature_table[container_name].get("has_global_scope", "True") == "True": + expected_running_containers.add(container_name) + if feature_table[container_name].get("has_per_asic_scope", "False") == "True": + num_asics = multi_asic.get_num_asics() + for asic_id in range(num_asics): + if asic_id in asics_id_presence or container_name in run_all_instance_list: + expected_running_containers.add(container_name + str(asic_id)) + else: + expected_running_containers.add(container_name) + if feature_table[container_name]["state"] == 'always_enabled': + if multi_asic.is_multi_asic(): + if feature_table[container_name].get("has_global_scope", "True") == "True": + always_running_containers.add(container_name) + if feature_table[container_name].get("has_per_asic_scope", "False") == "True": + num_asics = multi_asic.get_num_asics() + for asic_id in range(num_asics): + if asic_id in asics_id_presence or container_name in run_all_instance_list: + always_running_containers.add(container_name + str(asic_id)) + else: + always_running_containers.add(container_name) + + if device_info.is_supervisor() or device_info.is_disaggregated_chassis() or device_info.is_smartswitch(): + always_running_containers.add("database-chassis") + + if device_info.is_smartswitch(): + raw_dpustable = config_db.get_table("DPUS") + for dpu_name in raw_dpustable: + container_name = f"databasedpu{dpu_name.replace('dpu', '')}" + always_running_containers.add(container_name) + + return expected_running_containers, always_running_containers + +def get_current_running_from_DB(always_running_containers): + """ + @summary: This function will get the current running container list + from FEATURE table @ STATE_DB, if this table is available. + @return: a tuple + First: Return value indicating if info can be obtained from + DB or not. + Second: A set which contains the current running containers, + if this info is available in DB. + """ + running_containers = set() + + state_db = swsscommon.DBConnector("STATE_DB", 0) + tbl = swsscommon.Table(state_db, "FEATURE") + if not tbl.getKeys(): + return running_containers + + for name in tbl.getKeys(): + data = dict(tbl.get(name)[1]) + if data.get('container_id'): + running_containers.add(name) + + DOCKER_CLIENT = docker.DockerClient(base_url='unix://var/run/docker.sock') + RUNNING = 'running' + for name in always_running_containers: + try: + container = DOCKER_CLIENT.containers.get(name) + container_state = container.attrs.get('State', {}) + if container_state.get('Status', "") == RUNNING: + running_containers.add(name) + except (docker.errors.NotFound, docker.errors.APIError) as err: + print("Failed to get container '{}'. Error: '{}'".format(name, err)) + pass + + return running_containers + +def get_current_running_from_dockers(): + """ + @summary: This function will get all running containers from + the list of docker containers in running state. + If namespace == 'sonic': it's rollout-ed via kubernetes so add io.kubernetes.container.name + If namespace is missing/empty: it's image native container, add ctr.name directly + @return: A set which contains containers that are + in running state. + """ + DOCKER_CLIENT = docker.DockerClient(base_url='unix://var/run/docker.sock') + running_containers = set() + + try: + for ctr in DOCKER_CLIENT.containers.list(filters={"status": "running"}): + labels = ctr.labels or {} + ns = labels.get("io.kubernetes.pod.namespace") + dtype = labels.get("io.kubernetes.docker.type") + kname = labels.get("io.kubernetes.container.name") + + if ns == "sonic": + if dtype == "container" and kname and kname not in ("", "POD"): + running_containers.add(kname) + elif not ns: + running_containers.add(ctr.name) + + except docker.errors.APIError as err: + print(f"Failed to retrieve the running container list. Error: '{err}'") + pass + except docker.errors.DockerException as err: + print(f"Docker client error: '{err}'") + pass + return running_containers + +def get_current_running_containers(always_running_containers): + """ + @summary: This function will get the list of currently running containers. + If available in STATE-DB, get from DB else from list of dockers. + + @return: A set of currently running containers. + """ + + current_running_containers = get_current_running_from_DB(always_running_containers) + current_running_containers.update(get_current_running_from_dockers()) + return current_running_containers + + +def publish_events(lst): + events_handle = swsscommon.events_init_publisher(EVENTS_PUBLISHER_SOURCE) + params = swsscommon.FieldValueMap() + + for ctr in lst: + params["ctr_name"] = ctr; + swsscommon.event_publish(events_handle, EVENTS_PUBLISHER_TAG, params) + + swsscommon.events_deinit_publisher(events_handle) + + +def main(): + """ + @summary: This function will compare the difference between the current running containers + and the containers which were expected to run. If containers which were exepcted + to run were not running, then an alerting message will be written into syslog. + """ + expected_running_containers, always_running_containers = get_expected_running_containers() + current_running_containers = get_current_running_containers(always_running_containers) + + expected_running_containers |= always_running_containers + not_running_containers = expected_running_containers.difference(current_running_containers) + if not_running_containers: + publish_events(not_running_containers) + print("Expected containers not running: " + ", ".join(not_running_containers)) + sys.exit(3) + + +if __name__ == "__main__": + main() + sys.exit(0) diff --git a/dockers/docker-telemetry-sidecar/systemd_scripts/service_checker.py_202411 b/dockers/docker-telemetry-sidecar/systemd_scripts/service_checker.py_202411 new file mode 100644 index 00000000000..f6416b37510 --- /dev/null +++ b/dockers/docker-telemetry-sidecar/systemd_scripts/service_checker.py_202411 @@ -0,0 +1,424 @@ +import docker +import os +import pickle +import re + +from swsscommon import swsscommon +from sonic_py_common import multi_asic, device_info +from sonic_py_common.logger import Logger +from .health_checker import HealthChecker +from . import utils + +SYSLOG_IDENTIFIER = 'service_checker' +logger = Logger(log_identifier=SYSLOG_IDENTIFIER) + +EVENTS_PUBLISHER_SOURCE = "sonic-events-host" +EVENTS_PUBLISHER_TAG = "process-not-running" + +def check_docker_image(image_name): + """ + @summary: This function will check if docker image exists. + @return: True if the image exists, otherwise False. + """ + try: + DOCKER_CLIENT = docker.DockerClient(base_url='unix://var/run/docker.sock') + DOCKER_CLIENT.images.get(image_name) + return True + except (docker.errors.ImageNotFound, docker.errors.APIError) as err: + logger.log_warning("Failed to get image '{}'. Error: '{}'".format(image_name, err)) + return False + +class ServiceChecker(HealthChecker): + """ + Checker that checks critical system service status via monit service. + """ + + # Cache file to save container_critical_processes + CRITICAL_PROCESS_CACHE = '/tmp/critical_process_cache' + + CRITICAL_PROCESSES_PATH = 'etc/supervisor/critical_processes' + + # Command to get merged directory of a container + GET_CONTAINER_FOLDER_CMD = 'docker inspect {} --format "{{{{.GraphDriver.Data.MergedDir}}}}"' + + # Command to query the status of monit service. + CHECK_MONIT_SERVICE_CMD = 'systemctl is-active monit.service' + + # Command to get summary of critical system service. + CHECK_CMD = 'monit summary -B' + MIN_CHECK_CMD_LINES = 3 + + # Expect status for different system service category. + EXPECT_STATUS_DICT = { + 'System': 'Running', + 'Process': 'Running', + 'Filesystem': 'Accessible', + 'Program': 'Status ok' + } + + # Whitelist of containers which are managed by KubeSonic to bypass health checking entirely. + # These containers will be excluded from both expected and running container sets. + CONTAINER_K8S_WHITELIST = {'telemetry', 'acms', 'restapi'} + + def __init__(self): + HealthChecker.__init__(self) + self.container_critical_processes = {} + # Containers that has invalid critical_processes file + self.bad_containers = set() + + self.container_feature_dict = {} + + self.need_save_cache = False + + self.config_db = None + + self.load_critical_process_cache() + + self.events_handle = swsscommon.events_init_publisher(EVENTS_PUBLISHER_SOURCE) + + def get_expected_running_containers(self, feature_table): + """Get a set of containers that are expected to running on SONiC + + Args: + feature_table (object): FEATURE table in CONFIG_DB + + Returns: + expected_running_containers: A set of container names that are expected running + container_feature_dict: A dictionary {:} + """ + expected_running_containers = set() + container_feature_dict = {} + + # Get current asic presence list. For multi_asic system, multi instance containers + # should be checked only for asics present. + asics_id_presence = multi_asic.get_asic_presence_list() + + # Some services may run all the instances irrespective of asic presence. + # Add those to exception list. + # database service: Currently services have dependency on all database services to + # be up irrespective of asic presence. + # bgp service: Currently bgp runs all instances. Once this is fixed to be config driven, + # it will be removed from exception list. + run_all_instance_list = ['database', 'bgp'] + + container_list = [] + for container_name in feature_table.keys(): + # Skip containers in the whitelist + if container_name in ServiceChecker.CONTAINER_K8S_WHITELIST: + logger.log_debug("Skipping whitelisted kubesonic managed container '{}' from expected running check".format(container_name)) + continue + # slim image does not have telemetry container and corresponding docker image + if container_name == "telemetry": + ret = check_docker_image("docker-sonic-telemetry") + if not ret: + # If telemetry container image is not present, check gnmi container image + # If gnmi container image is not present, ignore telemetry container check + # if gnmi container image is present, check gnmi container instead of telemetry + ret = check_docker_image("docker-sonic-gnmi") + if not ret: + logger.log_debug("Ignoring telemetry container check on image which has no corresponding docker image") + else: + container_list.append("gnmi") + continue + container_list.append(container_name) + + for container_name in container_list: + feature_entry = feature_table[container_name] + if feature_entry["state"] not in ["disabled", "always_disabled"]: + if multi_asic.is_multi_asic(): + if feature_entry.get("has_global_scope", "True") == "True": + expected_running_containers.add(container_name) + container_feature_dict[container_name] = container_name + if feature_entry.get("has_per_asic_scope", "False") == "True": + num_asics = multi_asic.get_num_asics() + for asic_id in range(num_asics): + if asic_id in asics_id_presence or container_name in run_all_instance_list: + expected_running_containers.add(container_name + str(asic_id)) + container_feature_dict[container_name + str(asic_id)] = container_name + else: + expected_running_containers.add(container_name) + container_feature_dict[container_name] = container_name + + if device_info.is_supervisor(): + expected_running_containers.add("database-chassis") + container_feature_dict["database-chassis"] = "database" + return expected_running_containers, container_feature_dict + + def get_current_running_containers(self): + """Get current running containers, if the running container is not in self.container_critical_processes, + try get the critical process list + + Returns: + running_containers: A set of running container names + """ + DOCKER_CLIENT = docker.DockerClient(base_url='unix://var/run/docker.sock') + running_containers = set() + ctrs = DOCKER_CLIENT.containers + try: + lst = ctrs.list(filters={"status": "running"}) + + for ctr in lst: + # Check if this is a Kubernetes-managed container + labels = ctr.labels or {} + ns = labels.get("io.kubernetes.pod.namespace") + if ns == "sonic": + continue + # Skip kubesonic managed containers in the whitelist + if ctr.name in ServiceChecker.CONTAINER_K8S_WHITELIST: + continue + running_containers.add(ctr.name) + if ctr.name not in self.container_critical_processes: + self.fill_critical_process_by_container(ctr.name) + except docker.errors.APIError as err: + logger.log_error("Failed to retrieve the running container list. Error: '{}'".format(err)) + + return running_containers + + def get_critical_process_list_from_file(self, container, critical_processes_file): + """Read critical process name list from critical processes file + + Args: + container (str): contianer name + critical_processes_file (str): critical processes file path + + Returns: + critical_process_list: A list of critical process names + """ + critical_process_list = [] + + with open(critical_processes_file, 'r') as file: + for line in file: + # Try to match a line like "program:" + match = re.match(r"^\s*((.+):(.*))*\s*$", line) + if match is None: + if container not in self.bad_containers: + self.bad_containers.add(container) + logger.log_error('Invalid syntax in critical_processes file of {}'.format(container)) + continue + if match.group(1) is not None: + identifier_key = match.group(2).strip() + identifier_value = match.group(3).strip() + if identifier_key == "program" and identifier_value: + critical_process_list.append(identifier_value) + + return critical_process_list + + def fill_critical_process_by_container(self, container): + """Get critical process for a given container + + Args: + container (str): container name + """ + # Get container volumn folder + container_folder = self._get_container_folder(container) + if not container_folder: + logger.log_warning('Could not find MergedDir of container {}, was container stopped?'.format(container)) + return + + if not os.path.exists(container_folder): + logger.log_warning('MergedDir {} of container {} not found in filesystem, was container stopped?'.format(container_folder, container)) + return + + # Get critical_processes file path + critical_processes_file = os.path.join(container_folder, ServiceChecker.CRITICAL_PROCESSES_PATH) + if not os.path.isfile(critical_processes_file): + # Critical process file does not exist, the container has no critical processes. + logger.log_debug('Failed to get critical process file for {}, {} does not exist'.format(container, critical_processes_file)) + self._update_container_critical_processes(container, []) + return + + # Get critical process list from critical_processes + critical_process_list = self.get_critical_process_list_from_file(container, critical_processes_file) + self._update_container_critical_processes(container, critical_process_list) + + def _update_container_critical_processes(self, container, critical_process_list): + self.container_critical_processes[container] = critical_process_list + self.need_save_cache = True + + def _get_container_folder(self, container): + container_folder = utils.run_command(ServiceChecker.GET_CONTAINER_FOLDER_CMD.format(container)) + if container_folder is None: + return container_folder + + return container_folder.strip() + + def save_critical_process_cache(self): + """Save self.container_critical_processes to a cache file + """ + if not self.need_save_cache: + return + + self.need_save_cache = False + if not self.container_critical_processes: + # if container_critical_processes is empty, don't save it + return + + if os.path.exists(ServiceChecker.CRITICAL_PROCESS_CACHE): + # if cache file exists, remove it + os.remove(ServiceChecker.CRITICAL_PROCESS_CACHE) + + with open(ServiceChecker.CRITICAL_PROCESS_CACHE, 'wb+') as f: + pickle.dump(self.container_critical_processes, f) + + def load_critical_process_cache(self): + if not os.path.isfile(ServiceChecker.CRITICAL_PROCESS_CACHE): + # cache file does not exist + return + + with open(ServiceChecker.CRITICAL_PROCESS_CACHE, 'rb') as f: + self.container_critical_processes = pickle.load(f) + + def reset(self): + self._info = {} + + def get_category(self): + return 'Services' + + def check_by_monit(self, config): + """ + et and analyze the output of $CHECK_CMD, collect status for file system or customize checker if any. + :param config: Health checker configuration. + :return: + """ + output = utils.run_command(ServiceChecker.CHECK_MONIT_SERVICE_CMD) + if not output or output.strip() != 'active': + self.set_object_not_ok('Service', 'monit', 'monit service is not running') + return + + output = utils.run_command(ServiceChecker.CHECK_CMD) + lines = output.splitlines() + if not lines or len(lines) < ServiceChecker.MIN_CHECK_CMD_LINES: + self.set_object_not_ok('Service', 'monit', 'monit service is not ready') + return + + status_begin = lines[1].find('Status') + type_begin = lines[1].find('Type') + if status_begin < 0 or type_begin < 0: + self.set_object_not_ok('Service', 'monit', 'output of \"monit summary -B\" is invalid or incompatible') + return + + for line in lines[2:]: + name = line[0:status_begin].strip() + if config and config.ignore_services and name in config.ignore_services: + continue + status = line[status_begin:type_begin].strip() + service_type = line[type_begin:].strip() + if service_type not in ServiceChecker.EXPECT_STATUS_DICT: + continue + expect_status = ServiceChecker.EXPECT_STATUS_DICT[service_type] + if expect_status != status: + self.set_object_not_ok(service_type, name, '{} is not {}'.format(name, expect_status)) + else: + self.set_object_ok(service_type, name) + return + + def check_services(self, config): + """Check status of critical services and critical processes + + Args: + config (config.Config): Health checker configuration. + """ + if not self.config_db: + self.config_db = swsscommon.ConfigDBConnector(use_unix_socket_path=True) + self.config_db.connect() + feature_table = self.config_db.get_table("FEATURE") + expected_running_containers, self.container_feature_dict = self.get_expected_running_containers(feature_table) + current_running_containers = self.get_current_running_containers() + + newly_disabled_containers = set(self.container_critical_processes.keys()).difference(expected_running_containers) + for newly_disabled_container in newly_disabled_containers: + self.container_critical_processes.pop(newly_disabled_container) + + self.save_critical_process_cache() + + not_running_containers = expected_running_containers.difference(current_running_containers) + for container in not_running_containers: + self.set_object_not_ok('Service', container, "Container '{}' is not running".format(container)) + + if not self.container_critical_processes: + # Critical process is empty, not expect + self.set_object_not_ok('Service', 'system', 'no critical process found') + return + + for container, critical_process_list in self.container_critical_processes.items(): + self.check_process_existence(container, critical_process_list, config, feature_table) + + for bad_container in self.bad_containers: + self.set_object_not_ok('Service', bad_container, 'Syntax of critical_processes file is incorrect') + + def check(self, config): + """Check critical system service status. + + Args: + config (object): Health checker configuration. + """ + self.reset() + self.check_by_monit(config) + self.check_services(config) + swsscommon.events_deinit_publisher(self.events_handle) + + def _parse_supervisorctl_status(self, process_status): + """Expected input: + arp_update RUNNING pid 67, uptime 1:03:56 + buffermgrd RUNNING pid 81, uptime 1:03:56 + + Args: + process_status (list): List of process status + """ + data = {} + for line in process_status: + line = line.strip() + if not line: + continue + items = line.split() + if len(items) < 2: + continue + data[items[0].strip()] = items[1].strip() + return data + + def publish_events(self, container_name, critical_process_list): + params = swsscommon.FieldValueMap() + params["ctr_name"] = container_name + for process_name in critical_process_list: + params["process_name"] = process_name + swsscommon.event_publish(self.events_handle, EVENTS_PUBLISHER_TAG, params) + + def check_process_existence(self, container_name, critical_process_list, config, feature_table): + """Check whether the process in the specified container is running or not. + + Args: + container_name (str): Container name + critical_process_list (list): Critical processes + config (object): Health checker configuration. + feature_table (object): Feature table + """ + feature_name = self.container_feature_dict[container_name] + if feature_name in feature_table: + # We look into the 'FEATURE' table to verify whether the container is disabled or not. + # If the container is diabled, we exit. + if ("state" in feature_table[feature_name] + and feature_table[feature_name]["state"] not in ["disabled", "always_disabled"]): + + # We are using supervisorctl status to check the critical process status. We cannot leverage psutil here because + # it not always possible to get process cmdline in supervisor.conf. E.g, cmdline of orchagent is "/usr/bin/orchagent", + # however, in supervisor.conf it is "/usr/bin/orchagent.sh" + cmd = 'docker exec {} bash -c "supervisorctl status"'.format(container_name) + process_status = utils.run_command(cmd) + if process_status is None: + for process_name in critical_process_list: + self.set_object_not_ok('Process', '{}:{}'.format(container_name, process_name), "Process '{}' in container '{}' is not running".format(process_name, container_name)) + self.publish_events(container_name, critical_process_list) + return + + process_status = self._parse_supervisorctl_status(process_status.strip().splitlines()) + for process_name in critical_process_list: + if config and config.ignore_services and process_name in config.ignore_services: + continue + + # Sometimes process_name is in critical_processes file, but it is not in supervisor.conf, such process will not run in container. + # and it is safe to ignore such process. E.g, radv. So here we only check those processes which are in process_status. + if process_name in process_status: + if process_status[process_name] != 'RUNNING': + self.set_object_not_ok('Process', '{}:{}'.format(container_name, process_name), "Process '{}' in container '{}' is not running".format(process_name, container_name)) + else: + self.set_object_ok('Process', '{}:{}'.format(container_name, process_name)) diff --git a/dockers/docker-telemetry-sidecar/systemd_scripts/service_checker.py_202412 b/dockers/docker-telemetry-sidecar/systemd_scripts/service_checker.py_202412 new file mode 100644 index 00000000000..6a47d47b6d6 --- /dev/null +++ b/dockers/docker-telemetry-sidecar/systemd_scripts/service_checker.py_202412 @@ -0,0 +1,427 @@ +import docker +import os +import pickle +import re + +from swsscommon import swsscommon +from sonic_py_common import multi_asic, device_info +from sonic_py_common.logger import Logger +from .health_checker import HealthChecker +from . import utils + +SYSLOG_IDENTIFIER = 'service_checker' +logger = Logger(log_identifier=SYSLOG_IDENTIFIER) + +EVENTS_PUBLISHER_SOURCE = "sonic-events-host" +EVENTS_PUBLISHER_TAG = "process-not-running" + +def check_docker_image(image_name): + """ + @summary: This function will check if docker image exists. + @return: True if the image exists, otherwise False. + """ + try: + DOCKER_CLIENT = docker.DockerClient(base_url='unix://var/run/docker.sock') + DOCKER_CLIENT.images.get(image_name) + return True + except (docker.errors.ImageNotFound, docker.errors.APIError) as err: + logger.log_warning("Failed to get image '{}'. Error: '{}'".format(image_name, err)) + return False + +class ServiceChecker(HealthChecker): + """ + Checker that checks critical system service status via monit service. + """ + + # Cache file to save container_critical_processes + CRITICAL_PROCESS_CACHE = '/tmp/critical_process_cache' + + CRITICAL_PROCESSES_PATH = 'etc/supervisor/critical_processes' + + # Command to get merged directory of a container + GET_CONTAINER_FOLDER_CMD = 'docker inspect {} --format "{{{{.GraphDriver.Data.MergedDir}}}}"' + + # Command to query the status of monit service. + CHECK_MONIT_SERVICE_CMD = 'systemctl is-active monit.service' + + # Command to get summary of critical system service. + CHECK_CMD = 'monit summary -B' + MIN_CHECK_CMD_LINES = 3 + + # Expect status for different system service category. + EXPECT_STATUS_DICT = { + 'System': 'Running', + 'Process': 'Running', + 'Filesystem': 'Accessible', + 'Program': 'Status ok' + } + + # Whitelist of containers which are managed by KubeSonic to bypass health checking entirely. + # These containers will be excluded from both expected and running container sets. + CONTAINER_K8S_WHITELIST = {'telemetry', 'acms', 'restapi'} + + def __init__(self): + HealthChecker.__init__(self) + self.container_critical_processes = {} + # Containers that has invalid critical_processes file + self.bad_containers = set() + + self.container_feature_dict = {} + + self.need_save_cache = False + + self.config_db = None + + self.load_critical_process_cache() + + self.events_handle = swsscommon.events_init_publisher(EVENTS_PUBLISHER_SOURCE) + + def get_expected_running_containers(self, feature_table): + """Get a set of containers that are expected to running on SONiC + + Args: + feature_table (object): FEATURE table in CONFIG_DB + + Returns: + expected_running_containers: A set of container names that are expected running + container_feature_dict: A dictionary {:} + """ + expected_running_containers = set() + container_feature_dict = {} + + # Get current asic presence list. For multi_asic system, multi instance containers + # should be checked only for asics present. + asics_id_presence = multi_asic.get_asic_presence_list() + + # Some services may run all the instances irrespective of asic presence. + # Add those to exception list. + # database service: Currently services have dependency on all database services to + # be up irrespective of asic presence. + # bgp service: Currently bgp runs all instances. Once this is fixed to be config driven, + # it will be removed from exception list. + run_all_instance_list = ['database', 'bgp'] + + container_list = [] + for container_name in feature_table.keys(): + # Skip containers in the whitelist + if container_name in ServiceChecker.CONTAINER_K8S_WHITELIST: + logger.log_debug("Skipping whitelisted kubesonic managed container '{}' from expected running check".format(container_name)) + continue + # skip frr_bmp since it's not container just bmp option used by bgpd + if container_name == "frr_bmp": + continue + # slim image does not have telemetry container and corresponding docker image + if container_name == "telemetry": + ret = check_docker_image("docker-sonic-telemetry") + if not ret: + # If telemetry container image is not present, check gnmi container image + # If gnmi container image is not present, ignore telemetry container check + # if gnmi container image is present, check gnmi container instead of telemetry + ret = check_docker_image("docker-sonic-gnmi") + if not ret: + logger.log_debug("Ignoring telemetry container check on image which has no corresponding docker image") + else: + container_list.append("gnmi") + continue + container_list.append(container_name) + + for container_name in container_list: + feature_entry = feature_table[container_name] + if feature_entry["state"] not in ["disabled", "always_disabled"]: + if multi_asic.is_multi_asic(): + if feature_entry.get("has_global_scope", "True") == "True": + expected_running_containers.add(container_name) + container_feature_dict[container_name] = container_name + if feature_entry.get("has_per_asic_scope", "False") == "True": + num_asics = multi_asic.get_num_asics() + for asic_id in range(num_asics): + if asic_id in asics_id_presence or container_name in run_all_instance_list: + expected_running_containers.add(container_name + str(asic_id)) + container_feature_dict[container_name + str(asic_id)] = container_name + else: + expected_running_containers.add(container_name) + container_feature_dict[container_name] = container_name + + if device_info.is_supervisor(): + expected_running_containers.add("database-chassis") + container_feature_dict["database-chassis"] = "database" + return expected_running_containers, container_feature_dict + + def get_current_running_containers(self): + """Get current running containers, if the running container is not in self.container_critical_processes, + try get the critical process list + + Returns: + running_containers: A set of running container names + """ + DOCKER_CLIENT = docker.DockerClient(base_url='unix://var/run/docker.sock') + running_containers = set() + ctrs = DOCKER_CLIENT.containers + try: + lst = ctrs.list(filters={"status": "running"}) + + for ctr in lst: + # Check if this is a Kubernetes-managed container + labels = ctr.labels or {} + ns = labels.get("io.kubernetes.pod.namespace") + if ns == "sonic": + continue + # Skip kubesonic managed containers in the whitelist + if ctr.name in ServiceChecker.CONTAINER_K8S_WHITELIST: + continue + running_containers.add(ctr.name) + if ctr.name not in self.container_critical_processes: + self.fill_critical_process_by_container(ctr.name) + except docker.errors.APIError as err: + logger.log_error("Failed to retrieve the running container list. Error: '{}'".format(err)) + + return running_containers + + def get_critical_process_list_from_file(self, container, critical_processes_file): + """Read critical process name list from critical processes file + + Args: + container (str): contianer name + critical_processes_file (str): critical processes file path + + Returns: + critical_process_list: A list of critical process names + """ + critical_process_list = [] + + with open(critical_processes_file, 'r') as file: + for line in file: + # Try to match a line like "program:" + match = re.match(r"^\s*((.+):(.*))*\s*$", line) + if match is None: + if container not in self.bad_containers: + self.bad_containers.add(container) + logger.log_error('Invalid syntax in critical_processes file of {}'.format(container)) + continue + if match.group(1) is not None: + identifier_key = match.group(2).strip() + identifier_value = match.group(3).strip() + if identifier_key == "program" and identifier_value: + critical_process_list.append(identifier_value) + + return critical_process_list + + def fill_critical_process_by_container(self, container): + """Get critical process for a given container + + Args: + container (str): container name + """ + # Get container volumn folder + container_folder = self._get_container_folder(container) + if not container_folder: + logger.log_warning('Could not find MergedDir of container {}, was container stopped?'.format(container)) + return + + if not os.path.exists(container_folder): + logger.log_warning('MergedDir {} of container {} not found in filesystem, was container stopped?'.format(container_folder, container)) + return + + # Get critical_processes file path + critical_processes_file = os.path.join(container_folder, ServiceChecker.CRITICAL_PROCESSES_PATH) + if not os.path.isfile(critical_processes_file): + # Critical process file does not exist, the container has no critical processes. + logger.log_debug('Failed to get critical process file for {}, {} does not exist'.format(container, critical_processes_file)) + self._update_container_critical_processes(container, []) + return + + # Get critical process list from critical_processes + critical_process_list = self.get_critical_process_list_from_file(container, critical_processes_file) + self._update_container_critical_processes(container, critical_process_list) + + def _update_container_critical_processes(self, container, critical_process_list): + self.container_critical_processes[container] = critical_process_list + self.need_save_cache = True + + def _get_container_folder(self, container): + container_folder = utils.run_command(ServiceChecker.GET_CONTAINER_FOLDER_CMD.format(container)) + if container_folder is None: + return container_folder + + return container_folder.strip() + + def save_critical_process_cache(self): + """Save self.container_critical_processes to a cache file + """ + if not self.need_save_cache: + return + + self.need_save_cache = False + if not self.container_critical_processes: + # if container_critical_processes is empty, don't save it + return + + if os.path.exists(ServiceChecker.CRITICAL_PROCESS_CACHE): + # if cache file exists, remove it + os.remove(ServiceChecker.CRITICAL_PROCESS_CACHE) + + with open(ServiceChecker.CRITICAL_PROCESS_CACHE, 'wb+') as f: + pickle.dump(self.container_critical_processes, f) + + def load_critical_process_cache(self): + if not os.path.isfile(ServiceChecker.CRITICAL_PROCESS_CACHE): + # cache file does not exist + return + + with open(ServiceChecker.CRITICAL_PROCESS_CACHE, 'rb') as f: + self.container_critical_processes = pickle.load(f) + + def reset(self): + self._info = {} + + def get_category(self): + return 'Services' + + def check_by_monit(self, config): + """ + et and analyze the output of $CHECK_CMD, collect status for file system or customize checker if any. + :param config: Health checker configuration. + :return: + """ + output = utils.run_command(ServiceChecker.CHECK_MONIT_SERVICE_CMD) + if not output or output.strip() != 'active': + self.set_object_not_ok('Service', 'monit', 'monit service is not running') + return + + output = utils.run_command(ServiceChecker.CHECK_CMD) + lines = output.splitlines() + if not lines or len(lines) < ServiceChecker.MIN_CHECK_CMD_LINES: + self.set_object_not_ok('Service', 'monit', 'monit service is not ready') + return + + status_begin = lines[1].find('Status') + type_begin = lines[1].find('Type') + if status_begin < 0 or type_begin < 0: + self.set_object_not_ok('Service', 'monit', 'output of \"monit summary -B\" is invalid or incompatible') + return + + for line in lines[2:]: + name = line[0:status_begin].strip() + if config and config.ignore_services and name in config.ignore_services: + continue + status = line[status_begin:type_begin].strip() + service_type = line[type_begin:].strip() + if service_type not in ServiceChecker.EXPECT_STATUS_DICT: + continue + expect_status = ServiceChecker.EXPECT_STATUS_DICT[service_type] + if expect_status != status: + self.set_object_not_ok(service_type, name, '{} is not {}'.format(name, expect_status)) + else: + self.set_object_ok(service_type, name) + return + + def check_services(self, config): + """Check status of critical services and critical processes + + Args: + config (config.Config): Health checker configuration. + """ + if not self.config_db: + self.config_db = swsscommon.ConfigDBConnector(use_unix_socket_path=True) + self.config_db.connect() + feature_table = self.config_db.get_table("FEATURE") + expected_running_containers, self.container_feature_dict = self.get_expected_running_containers(feature_table) + current_running_containers = self.get_current_running_containers() + + newly_disabled_containers = set(self.container_critical_processes.keys()).difference(expected_running_containers) + for newly_disabled_container in newly_disabled_containers: + self.container_critical_processes.pop(newly_disabled_container) + + self.save_critical_process_cache() + + not_running_containers = expected_running_containers.difference(current_running_containers) + for container in not_running_containers: + self.set_object_not_ok('Service', container, "Container '{}' is not running".format(container)) + + if not self.container_critical_processes: + # Critical process is empty, not expect + self.set_object_not_ok('Service', 'system', 'no critical process found') + return + + for container, critical_process_list in self.container_critical_processes.items(): + self.check_process_existence(container, critical_process_list, config, feature_table) + + for bad_container in self.bad_containers: + self.set_object_not_ok('Service', bad_container, 'Syntax of critical_processes file is incorrect') + + def check(self, config): + """Check critical system service status. + + Args: + config (object): Health checker configuration. + """ + self.reset() + self.check_by_monit(config) + self.check_services(config) + swsscommon.events_deinit_publisher(self.events_handle) + + def _parse_supervisorctl_status(self, process_status): + """Expected input: + arp_update RUNNING pid 67, uptime 1:03:56 + buffermgrd RUNNING pid 81, uptime 1:03:56 + + Args: + process_status (list): List of process status + """ + data = {} + for line in process_status: + line = line.strip() + if not line: + continue + items = line.split() + if len(items) < 2: + continue + data[items[0].strip()] = items[1].strip() + return data + + def publish_events(self, container_name, critical_process_list): + params = swsscommon.FieldValueMap() + params["ctr_name"] = container_name + for process_name in critical_process_list: + params["process_name"] = process_name + swsscommon.event_publish(self.events_handle, EVENTS_PUBLISHER_TAG, params) + + def check_process_existence(self, container_name, critical_process_list, config, feature_table): + """Check whether the process in the specified container is running or not. + + Args: + container_name (str): Container name + critical_process_list (list): Critical processes + config (object): Health checker configuration. + feature_table (object): Feature table + """ + feature_name = self.container_feature_dict[container_name] + if feature_name in feature_table: + # We look into the 'FEATURE' table to verify whether the container is disabled or not. + # If the container is diabled, we exit. + if ("state" in feature_table[feature_name] + and feature_table[feature_name]["state"] not in ["disabled", "always_disabled"]): + + # We are using supervisorctl status to check the critical process status. We cannot leverage psutil here because + # it not always possible to get process cmdline in supervisor.conf. E.g, cmdline of orchagent is "/usr/bin/orchagent", + # however, in supervisor.conf it is "/usr/bin/orchagent.sh" + cmd = 'docker exec {} bash -c "supervisorctl status"'.format(container_name) + process_status = utils.run_command(cmd) + if process_status is None: + for process_name in critical_process_list: + self.set_object_not_ok('Process', '{}:{}'.format(container_name, process_name), "Process '{}' in container '{}' is not running".format(process_name, container_name)) + self.publish_events(container_name, critical_process_list) + return + + process_status = self._parse_supervisorctl_status(process_status.strip().splitlines()) + for process_name in critical_process_list: + if config and config.ignore_services and process_name in config.ignore_services: + continue + + # Sometimes process_name is in critical_processes file, but it is not in supervisor.conf, such process will not run in container. + # and it is safe to ignore such process. E.g, radv. So here we only check those processes which are in process_status. + if process_name in process_status: + if process_status[process_name] != 'RUNNING': + self.set_object_not_ok('Process', '{}:{}'.format(container_name, process_name), "Process '{}' in container '{}' is not running".format(process_name, container_name)) + else: + self.set_object_ok('Process', '{}:{}'.format(container_name, process_name)) \ No newline at end of file diff --git a/dockers/docker-telemetry-sidecar/systemd_scripts/service_checker.py_202505 b/dockers/docker-telemetry-sidecar/systemd_scripts/service_checker.py_202505 new file mode 100644 index 00000000000..1b21ef91e57 --- /dev/null +++ b/dockers/docker-telemetry-sidecar/systemd_scripts/service_checker.py_202505 @@ -0,0 +1,427 @@ +import docker +import os +import pickle +import re + +from swsscommon import swsscommon +from sonic_py_common import multi_asic, device_info +from sonic_py_common.logger import Logger +from .health_checker import HealthChecker +from . import utils + +SYSLOG_IDENTIFIER = 'service_checker' +logger = Logger(log_identifier=SYSLOG_IDENTIFIER) + +EVENTS_PUBLISHER_SOURCE = "sonic-events-host" +EVENTS_PUBLISHER_TAG = "process-not-running" + +def check_docker_image(image_name): + """ + @summary: This function will check if docker image exists. + @return: True if the image exists, otherwise False. + """ + try: + DOCKER_CLIENT = docker.DockerClient(base_url='unix://var/run/docker.sock') + DOCKER_CLIENT.images.get(image_name) + return True + except (docker.errors.ImageNotFound, docker.errors.APIError) as err: + logger.log_warning("Failed to get image '{}'. Error: '{}'".format(image_name, err)) + return False + +class ServiceChecker(HealthChecker): + """ + Checker that checks critical system service status via monit service. + """ + + # Cache file to save container_critical_processes + CRITICAL_PROCESS_CACHE = '/tmp/critical_process_cache' + + CRITICAL_PROCESSES_PATH = 'etc/supervisor/critical_processes' + + # Command to get merged directory of a container + GET_CONTAINER_FOLDER_CMD = 'docker inspect {} --format "{{{{.GraphDriver.Data.MergedDir}}}}"' + + # Command to query the status of monit service. + CHECK_MONIT_SERVICE_CMD = 'systemctl is-active monit.service' + + # Command to get summary of critical system service. + CHECK_CMD = 'monit summary -B' + MIN_CHECK_CMD_LINES = 3 + + # Expect status for different system service category. + EXPECT_STATUS_DICT = { + 'System': 'Running', + 'Process': 'Running', + 'Filesystem': 'Accessible', + 'Program': 'Status ok' + } + + # Whitelist of containers which are managed by KubeSonic to bypass health checking entirely. + # These containers will be excluded from both expected and running container sets. + CONTAINER_K8S_WHITELIST = {'telemetry', 'acms', 'restapi'} + + def __init__(self): + HealthChecker.__init__(self) + self.container_critical_processes = {} + # Containers that has invalid critical_processes file + self.bad_containers = set() + + self.container_feature_dict = {} + + self.need_save_cache = False + + self.config_db = None + + self.load_critical_process_cache() + + self.events_handle = swsscommon.events_init_publisher(EVENTS_PUBLISHER_SOURCE) + + def get_expected_running_containers(self, feature_table): + """Get a set of containers that are expected to running on SONiC + + Args: + feature_table (object): FEATURE table in CONFIG_DB + + Returns: + expected_running_containers: A set of container names that are expected running + container_feature_dict: A dictionary {:} + """ + expected_running_containers = set() + container_feature_dict = {} + + # Get current asic presence list. For multi_asic system, multi instance containers + # should be checked only for asics present. + asics_id_presence = multi_asic.get_asic_presence_list() + + # Some services may run all the instances irrespective of asic presence. + # Add those to exception list. + # database service: Currently services have dependency on all database services to + # be up irrespective of asic presence. + # bgp service: Currently bgp runs all instances. Once this is fixed to be config driven, + # it will be removed from exception list. + run_all_instance_list = ['database', 'bgp'] + + container_list = [] + for container_name in feature_table.keys(): + # Skip containers in the whitelist + if container_name in ServiceChecker.CONTAINER_K8S_WHITELIST: + logger.log_debug("Skipping whitelisted kubesonic managed container '{}' from expected running check".format(container_name)) + continue + # skip frr_bmp since it's not container just bmp option used by bgpd + if container_name == "frr_bmp": + continue + # slim image does not have telemetry container and corresponding docker image + if container_name == "telemetry": + ret = check_docker_image("docker-sonic-telemetry") + if not ret: + # If telemetry container image is not present, check gnmi container image + # If gnmi container image is not present, ignore telemetry container check + # if gnmi container image is present, check gnmi container instead of telemetry + ret = check_docker_image("docker-sonic-gnmi") + if not ret: + logger.log_debug("Ignoring telemetry container check on image which has no corresponding docker image") + else: + container_list.append("gnmi") + continue + container_list.append(container_name) + + for container_name in container_list: + feature_entry = feature_table[container_name] + if feature_entry["state"] not in ["disabled", "always_disabled"]: + if multi_asic.is_multi_asic(): + if feature_entry.get("has_global_scope", "True") == "True": + expected_running_containers.add(container_name) + container_feature_dict[container_name] = container_name + if feature_entry.get("has_per_asic_scope", "False") == "True": + num_asics = multi_asic.get_num_asics() + for asic_id in range(num_asics): + if asic_id in asics_id_presence or container_name in run_all_instance_list: + expected_running_containers.add(container_name + str(asic_id)) + container_feature_dict[container_name + str(asic_id)] = container_name + else: + expected_running_containers.add(container_name) + container_feature_dict[container_name] = container_name + + if device_info.is_supervisor() or device_info.is_disaggregated_chassis(): + expected_running_containers.add("database-chassis") + container_feature_dict["database-chassis"] = "database" + return expected_running_containers, container_feature_dict + + def get_current_running_containers(self): + """Get current running containers, if the running container is not in self.container_critical_processes, + try get the critical process list + + Returns: + running_containers: A set of running container names + """ + DOCKER_CLIENT = docker.DockerClient(base_url='unix://var/run/docker.sock') + running_containers = set() + ctrs = DOCKER_CLIENT.containers + try: + lst = ctrs.list(filters={"status": "running"}) + + for ctr in lst: + # Check if this is a Kubernetes-managed container + labels = ctr.labels or {} + ns = labels.get("io.kubernetes.pod.namespace") + if ns == "sonic": + continue + # Skip kubesonic managed containers in the whitelist + if ctr.name in ServiceChecker.CONTAINER_K8S_WHITELIST: + continue + running_containers.add(ctr.name) + if ctr.name not in self.container_critical_processes: + self.fill_critical_process_by_container(ctr.name) + except docker.errors.APIError as err: + logger.log_error("Failed to retrieve the running container list. Error: '{}'".format(err)) + + return running_containers + + def get_critical_process_list_from_file(self, container, critical_processes_file): + """Read critical process name list from critical processes file + + Args: + container (str): contianer name + critical_processes_file (str): critical processes file path + + Returns: + critical_process_list: A list of critical process names + """ + critical_process_list = [] + + with open(critical_processes_file, 'r') as file: + for line in file: + # Try to match a line like "program:" + match = re.match(r"^\s*((.+):(.*))*\s*$", line) + if match is None: + if container not in self.bad_containers: + self.bad_containers.add(container) + logger.log_error('Invalid syntax in critical_processes file of {}'.format(container)) + continue + if match.group(1) is not None: + identifier_key = match.group(2).strip() + identifier_value = match.group(3).strip() + if identifier_key == "program" and identifier_value: + critical_process_list.append(identifier_value) + + return critical_process_list + + def fill_critical_process_by_container(self, container): + """Get critical process for a given container + + Args: + container (str): container name + """ + # Get container volumn folder + container_folder = self._get_container_folder(container) + if not container_folder: + logger.log_warning('Could not find MergedDir of container {}, was container stopped?'.format(container)) + return + + if not os.path.exists(container_folder): + logger.log_warning('MergedDir {} of container {} not found in filesystem, was container stopped?'.format(container_folder, container)) + return + + # Get critical_processes file path + critical_processes_file = os.path.join(container_folder, ServiceChecker.CRITICAL_PROCESSES_PATH) + if not os.path.isfile(critical_processes_file): + # Critical process file does not exist, the container has no critical processes. + logger.log_debug('Failed to get critical process file for {}, {} does not exist'.format(container, critical_processes_file)) + self._update_container_critical_processes(container, []) + return + + # Get critical process list from critical_processes + critical_process_list = self.get_critical_process_list_from_file(container, critical_processes_file) + self._update_container_critical_processes(container, critical_process_list) + + def _update_container_critical_processes(self, container, critical_process_list): + self.container_critical_processes[container] = critical_process_list + self.need_save_cache = True + + def _get_container_folder(self, container): + container_folder = utils.run_command(ServiceChecker.GET_CONTAINER_FOLDER_CMD.format(container)) + if container_folder is None: + return container_folder + + return container_folder.strip() + + def save_critical_process_cache(self): + """Save self.container_critical_processes to a cache file + """ + if not self.need_save_cache: + return + + self.need_save_cache = False + if not self.container_critical_processes: + # if container_critical_processes is empty, don't save it + return + + if os.path.exists(ServiceChecker.CRITICAL_PROCESS_CACHE): + # if cache file exists, remove it + os.remove(ServiceChecker.CRITICAL_PROCESS_CACHE) + + with open(ServiceChecker.CRITICAL_PROCESS_CACHE, 'wb+') as f: + pickle.dump(self.container_critical_processes, f) + + def load_critical_process_cache(self): + if not os.path.isfile(ServiceChecker.CRITICAL_PROCESS_CACHE): + # cache file does not exist + return + + with open(ServiceChecker.CRITICAL_PROCESS_CACHE, 'rb') as f: + self.container_critical_processes = pickle.load(f) + + def reset(self): + self._info = {} + + def get_category(self): + return 'Services' + + def check_by_monit(self, config): + """ + et and analyze the output of $CHECK_CMD, collect status for file system or customize checker if any. + :param config: Health checker configuration. + :return: + """ + output = utils.run_command(ServiceChecker.CHECK_MONIT_SERVICE_CMD) + if not output or output.strip() != 'active': + self.set_object_not_ok('Service', 'monit', 'monit service is not running') + return + + output = utils.run_command(ServiceChecker.CHECK_CMD) + lines = output.splitlines() + if not lines or len(lines) < ServiceChecker.MIN_CHECK_CMD_LINES: + self.set_object_not_ok('Service', 'monit', 'monit service is not ready') + return + + status_begin = lines[1].find('Status') + type_begin = lines[1].find('Type') + if status_begin < 0 or type_begin < 0: + self.set_object_not_ok('Service', 'monit', 'output of \"monit summary -B\" is invalid or incompatible') + return + + for line in lines[2:]: + name = line[0:status_begin].strip() + if config and config.ignore_services and name in config.ignore_services: + continue + status = line[status_begin:type_begin].strip() + service_type = line[type_begin:].strip() + if service_type not in ServiceChecker.EXPECT_STATUS_DICT: + continue + expect_status = ServiceChecker.EXPECT_STATUS_DICT[service_type] + if expect_status != status: + self.set_object_not_ok(service_type, name, '{} is not {}'.format(name, expect_status)) + else: + self.set_object_ok(service_type, name) + return + + def check_services(self, config): + """Check status of critical services and critical processes + + Args: + config (config.Config): Health checker configuration. + """ + if not self.config_db: + self.config_db = swsscommon.ConfigDBConnector(use_unix_socket_path=True) + self.config_db.connect() + feature_table = self.config_db.get_table("FEATURE") + expected_running_containers, self.container_feature_dict = self.get_expected_running_containers(feature_table) + current_running_containers = self.get_current_running_containers() + + newly_disabled_containers = set(self.container_critical_processes.keys()).difference(expected_running_containers) + for newly_disabled_container in newly_disabled_containers: + self.container_critical_processes.pop(newly_disabled_container) + + self.save_critical_process_cache() + + not_running_containers = expected_running_containers.difference(current_running_containers) + for container in not_running_containers: + self.set_object_not_ok('Service', container, "Container '{}' is not running".format(container)) + + if not self.container_critical_processes: + # Critical process is empty, not expect + self.set_object_not_ok('Service', 'system', 'no critical process found') + return + + for container, critical_process_list in self.container_critical_processes.items(): + self.check_process_existence(container, critical_process_list, config, feature_table) + + for bad_container in self.bad_containers: + self.set_object_not_ok('Service', bad_container, 'Syntax of critical_processes file is incorrect') + + def check(self, config): + """Check critical system service status. + + Args: + config (object): Health checker configuration. + """ + self.reset() + self.check_by_monit(config) + self.check_services(config) + swsscommon.events_deinit_publisher(self.events_handle) + + def _parse_supervisorctl_status(self, process_status): + """Expected input: + arp_update RUNNING pid 67, uptime 1:03:56 + buffermgrd RUNNING pid 81, uptime 1:03:56 + + Args: + process_status (list): List of process status + """ + data = {} + for line in process_status: + line = line.strip() + if not line: + continue + items = line.split() + if len(items) < 2: + continue + data[items[0].strip()] = items[1].strip() + return data + + def publish_events(self, container_name, critical_process_list): + params = swsscommon.FieldValueMap() + params["ctr_name"] = container_name + for process_name in critical_process_list: + params["process_name"] = process_name + swsscommon.event_publish(self.events_handle, EVENTS_PUBLISHER_TAG, params) + + def check_process_existence(self, container_name, critical_process_list, config, feature_table): + """Check whether the process in the specified container is running or not. + + Args: + container_name (str): Container name + critical_process_list (list): Critical processes + config (object): Health checker configuration. + feature_table (object): Feature table + """ + feature_name = self.container_feature_dict[container_name] + if feature_name in feature_table: + # We look into the 'FEATURE' table to verify whether the container is disabled or not. + # If the container is diabled, we exit. + if ("state" in feature_table[feature_name] + and feature_table[feature_name]["state"] not in ["disabled", "always_disabled"]): + + # We are using supervisorctl status to check the critical process status. We cannot leverage psutil here because + # it not always possible to get process cmdline in supervisor.conf. E.g, cmdline of orchagent is "/usr/bin/orchagent", + # however, in supervisor.conf it is "/usr/bin/orchagent.sh" + cmd = 'docker exec {} bash -c "supervisorctl status"'.format(container_name) + process_status = utils.run_command(cmd) + if process_status is None: + for process_name in critical_process_list: + self.set_object_not_ok('Process', '{}:{}'.format(container_name, process_name), "Process '{}' in container '{}' is not running".format(process_name, container_name)) + self.publish_events(container_name, critical_process_list) + return + + process_status = self._parse_supervisorctl_status(process_status.strip().splitlines()) + for process_name in critical_process_list: + if config and config.ignore_services and process_name in config.ignore_services: + continue + + # Sometimes process_name is in critical_processes file, but it is not in supervisor.conf, such process will not run in container. + # and it is safe to ignore such process. E.g, radv. So here we only check those processes which are in process_status. + if process_name in process_status: + if process_status[process_name] != 'RUNNING': + self.set_object_not_ok('Process', '{}:{}'.format(container_name, process_name), "Process '{}' in container '{}' is not running".format(process_name, container_name)) + else: + self.set_object_ok('Process', '{}:{}'.format(container_name, process_name)) diff --git a/dockers/docker-telemetry-sidecar/systemd_scripts/telemetry.service b/dockers/docker-telemetry-sidecar/systemd_scripts/telemetry.service index d25b3373931..a2cd784ae72 100644 --- a/dockers/docker-telemetry-sidecar/systemd_scripts/telemetry.service +++ b/dockers/docker-telemetry-sidecar/systemd_scripts/telemetry.service @@ -2,18 +2,15 @@ Description=Telemetry container Requires=database.service After=database.service swss.service syncd.service +Before=ntp-config.service BindsTo=sonic.target After=sonic.target StartLimitIntervalSec=1200 StartLimitBurst=3 [Service] -Type=simple -User=root -ExecStartPre=/usr/local/bin/telemetry.sh start # start: now returns in non-blocking (fire-and-forget pod deletion) -ExecStart=/usr/local/bin/telemetry.sh wait # wait: long-lived loop that observes pod status -ExecStop=/usr/local/bin/telemetry.sh stop # stop will not be working after kubesonic since pod will be auto-deployed via kubernetes +User=admin +ExecStartPre=/usr/local/bin/telemetry.sh start +ExecStart=/usr/local/bin/telemetry.sh wait +ExecStop=/usr/local/bin/telemetry.sh stop RestartSec=30 -TimeoutStartSec=30s -TimeoutStopSec=30s -Restart=always \ No newline at end of file diff --git a/dockers/docker-telemetry-sidecar/systemd_scripts/telemetry.sh b/dockers/docker-telemetry-sidecar/systemd_scripts/telemetry.sh index 74ea6bed4f4..6a7a1d4c592 100644 --- a/dockers/docker-telemetry-sidecar/systemd_scripts/telemetry.sh +++ b/dockers/docker-telemetry-sidecar/systemd_scripts/telemetry.sh @@ -1,3 +1,3 @@ #!/bin/bash -# Thin wrapper for telemetry pod control - uses shared k8s_pod_control.sh -exec /usr/share/sonic/scripts/k8s_pod_control.sh telemetry "$@" +# Thin wrapper for telemetry pod control - uses sidecar-specific k8s_pod_control.sh +exec /usr/share/sonic/scripts/docker-telemetry-sidecar/k8s_pod_control.sh telemetry "$@" diff --git a/dockers/docker-telemetry-sidecar/systemd_stub.py b/dockers/docker-telemetry-sidecar/systemd_stub.py index aa719898fa8..7daba96c2f2 100644 --- a/dockers/docker-telemetry-sidecar/systemd_stub.py +++ b/dockers/docker-telemetry-sidecar/systemd_stub.py @@ -1,29 +1,72 @@ #!/usr/bin/env python3 from __future__ import annotations +import json import os +import re +import subprocess import time import argparse -from typing import List +from typing import Dict, List, Union from sonic_py_common.sidecar_common import ( - get_bool_env_var, logger, SyncItem, - db_hget, db_hgetall, db_hset, db_del, sync_items, SYNC_INTERVAL_S + get_bool_env_var, logger, SyncItem, run_nsenter, + read_file_bytes_local, host_read_bytes, host_write_atomic, + db_hget, db_hgetall, db_hset, db_hdel, db_del, db_get_table_keys, + sync_items, SYNC_INTERVAL_S ) -# ───────────── telemetry.service sync paths ───────────── -CONTAINER_TELEMETRY_SERVICE = "/usr/share/sonic/systemd_scripts/telemetry.service" -HOST_TELEMETRY_SERVICE = "/lib/systemd/system/telemetry.service" - IS_V1_ENABLED = get_bool_env_var("IS_V1_ENABLED", default=False) # CONFIG_DB reconcile env GNMI_VERIFY_ENABLED = get_bool_env_var("TELEMETRY_CLIENT_CERT_VERIFY_ENABLED", default=False) -GNMI_CLIENT_CNAME = os.getenv("TELEMETRY_CLIENT_CNAME", "") -GNMI_CLIENT_ROLE = os.getenv("GNMI_CLIENT_ROLE", "gnmi_show_readonly") +def _parse_client_certs() -> List[Dict[str, Union[str, List[str]]]]: + """ + Build the list of GNMI client cert entries from env vars. + + Returns a list of {"cname": str, "role": List[str]}. + + Preferred: GNMI_CLIENT_CERTS (JSON array of {"cname": ..., "role": ...}) + Fallback: TELEMETRY_CLIENT_CNAME / GNMI_CLIENT_ROLE (single entry, backward-compat) + """ + raw = os.getenv("GNMI_CLIENT_CERTS", "").strip() + if raw: + try: + entries = json.loads(raw) + if not isinstance(entries, list): + raise ValueError("GNMI_CLIENT_CERTS must be a JSON array") + normalized: List[Dict[str, Union[str, List[str]]]] = [] + for e in entries: + if not isinstance(e, dict): + raise ValueError(f"Each entry must be an object: {e!r}") + if "cname" not in e or "role" not in e: + raise ValueError(f"Each entry needs 'cname' and 'role': {e}") + cname = str(e.get("cname", "")).strip() + role_raw = e.get("role", "") + if isinstance(role_raw, list): + role = [str(r).strip() for r in role_raw if str(r).strip()] + else: + s = str(role_raw).strip() + role = [s] if s else [] + if not cname or not role: + raise ValueError(f"'cname' and 'role' must be non-empty: {e}") + normalized.append({"cname": cname, "role": role}) + return normalized + except (json.JSONDecodeError, ValueError) as exc: + logger.log_error(f"Bad GNMI_CLIENT_CERTS env var: {exc}; falling back to legacy") + + # Legacy single-entry env vars + cname = os.getenv("TELEMETRY_CLIENT_CNAME", "").strip() + role = os.getenv("GNMI_CLIENT_ROLE", "gnmi_show_readonly").strip() + if cname: + return [{"cname": cname, "role": [role]}] + return [] + + +GNMI_CLIENT_CERTS: List[Dict[str, Union[str, List[str]]]] = _parse_client_certs() logger.log_notice(f"IS_V1_ENABLED={IS_V1_ENABLED}") -logger.log_notice(f"GNMI_CLIENT_ROLE={GNMI_CLIENT_ROLE}") +logger.log_notice(f"GNMI_CLIENT_CERTS={GNMI_CLIENT_CERTS}") _TELEMETRY_SRC = ( "/usr/share/sonic/systemd_scripts/telemetry_v1.sh" @@ -34,16 +77,82 @@ SYNC_ITEMS: List[SyncItem] = [ SyncItem(_TELEMETRY_SRC, "/usr/local/bin/telemetry.sh"), - SyncItem("/usr/share/sonic/systemd_scripts/container_checker", "/bin/container_checker"), - SyncItem("/usr/share/sonic/scripts/k8s_pod_control.sh", "/usr/share/sonic/scripts/k8s_pod_control.sh"), - SyncItem(CONTAINER_TELEMETRY_SERVICE, HOST_TELEMETRY_SERVICE, mode=0o644), + SyncItem("/usr/share/sonic/scripts/k8s_pod_control.sh", "/usr/share/sonic/scripts/docker-telemetry-sidecar/k8s_pod_control.sh"), ] +# Compile regex patterns once at module level to avoid repeated compilation +_MASTER_PATTERN = re.compile(r'^(?:SONiC\.)?master\.\d+-[a-f0-9]+$', re.IGNORECASE) +_INTERNAL_PATTERN = re.compile(r'^(?:SONiC\.)?internal\.\d+-[a-f0-9]+$', re.IGNORECASE) +_DATE_PATTERN = re.compile(r'^(?:SONiC\.)?\d{8}\b', re.IGNORECASE) +_DATE_EXTRACT_PATTERN = re.compile(r'^(?:SONiC\.)?(\d{4})(\d{2})\d{2}\b', re.IGNORECASE) + +def _get_branch_name() -> str: + """ + Extract branch name from SONiC version at runtime. + Follows the logic from sonic-mgmt/tests/test_pretest.py get_asic_and_branch_name(). + + Supported patterns: + 1. Master: [SONiC.]master.921927-18199d73f -> returns "master" + 2. Internal: [SONiC.]internal.135691748-dbb8d29985 -> returns "internal" + 3. Official feature branch: [SONiC.]YYYYMMDD.XX -> returns YYYYMM (e.g., 202505) + 4. Private/unmatched: returns "private" + """ + version = "" + try: + # Try reading from sonic_version.yml + version_file = "/etc/sonic/sonic_version.yml" + if os.path.exists(version_file): + with open(version_file, 'r') as f: + for line in f: + if 'build_version:' in line.lower(): + version = line.split(':', 1)[1].strip().strip('"\'') + break + + if not version: + # Fallback: try nsenter to host + result = subprocess.run( + ["nsenter", "-t", "1", "-m", "-u", "-i", "-n", "sonic-cfggen", "-y", "/etc/sonic/sonic_version.yml", "-v", "build_version"], + capture_output=True, text=True, timeout=5 + ) + if result.returncode == 0: + version = result.stdout.strip().strip('"\'') + except Exception as e: + logger.log_warning(f"Failed to read SONiC version: {e}") + version = "" + + if not version: + logger.log_error("No SONiC version found") + return "private" + + # Pattern 1: Master - [SONiC.]master.XXXXXX-XXXXXXXX + if _MASTER_PATTERN.match(version): + logger.log_notice(f"Detected master branch from version: {version}") + return "master" + + # Pattern 2: Internal - [SONiC.]internal.XXXXXXXXX-XXXXXXXXXX + elif _INTERNAL_PATTERN.match(version): + logger.log_notice(f"Detected internal branch from version: {version}") + return "internal" + + # Pattern 3: Official feature branch - [SONiC.]YYYYMMDD.* (e.g., 20241110.kw.24) + elif _DATE_PATTERN.match(version): + date_match = _DATE_EXTRACT_PATTERN.search(version) + if date_match: + year, month = date_match.groups() + branch = f"{year}{month}" + logger.log_notice(f"Detected branch {branch} from version: {version}") + return branch + else: + logger.log_warning(f"Failed to parse date from version: {version}") + return "private" + + # Pattern 4: Private image or unmatched pattern + else: + logger.log_notice(f"Unmatched version pattern (private): {version}") + return "private" + + POST_COPY_ACTIONS = { - "/lib/systemd/system/telemetry.service": [ - ["sudo", "systemctl", "daemon-reload"], - ["sudo", "systemctl", "restart", "telemetry"], - ], "/usr/local/bin/telemetry.sh": [ ["sudo", "docker", "stop", "telemetry"], ["sudo", "docker", "rm", "telemetry"], @@ -54,35 +163,122 @@ ["sudo", "systemctl", "daemon-reload"], ["sudo", "systemctl", "restart", "monit"], ], + "/usr/local/lib/python3.11/dist-packages/health_checker/service_checker.py": [ + ["sudo", "systemctl", "restart", "system-health"], + ], + "/usr/share/sonic/scripts/docker-telemetry-sidecar/k8s_pod_control.sh": [ + ["sudo", "systemctl", "daemon-reload"], + ["sudo", "systemctl", "restart", "telemetry"], + ], } -def _ensure_user_auth_cert() -> None: - cur = db_hget("GNMI|gnmi", "user_auth") - if cur != "cert": - if db_hset("GNMI|gnmi", "user_auth", "cert"): - logger.log_notice(f"Set GNMI|gnmi.user_auth=cert (was: {cur or ''})") - else: - logger.log_error("Failed to set GNMI|gnmi.user_auth=cert") +def _apply_config_patch(patch: list) -> bool: + """Apply an RFC 6902 JSON Patch to CONFIG_DB via 'config apply-patch'. + + YANG-validated and atomic. Returns True on success. + """ + if not patch: + return True + patch_json = json.dumps(patch) + rc, out, err = run_nsenter( + ["sudo", "-n", "config", "apply-patch", "/dev/stdin"], + text=False, + input_bytes=patch_json.encode("utf-8"), + ) + if rc != 0: + out_str = out.decode("utf-8", errors="replace").strip() if out else "" + err_str = err.decode("utf-8", errors="replace").strip() if err else "" + details = "; ".join(p for p in (f"stdout: {out_str}" if out_str else "", + f"stderr: {err_str}" if err_str else "") if p) + logger.log_error(f"config apply-patch failed (rc={rc}): {details}") + return False + logger.log_notice(f"config apply-patch succeeded ({len(patch)} op(s))") + return True -def _ensure_cname_present(cname: str) -> None: - if not cname: - logger.log_warning("TELEMETRY_CLIENT_CNAME not set; skip CNAME creation") +def _ensure_user_auth_absent() -> None: + cur = db_hget("TELEMETRY|gnmi", "user_auth") + if cur is None: return + if db_hdel("TELEMETRY|gnmi", "user_auth"): + logger.log_notice(f"Removed TELEMETRY|gnmi.user_auth (was: {cur})") + rc, _, err = run_nsenter(["sudo", "systemctl", "restart", "telemetry"]) + if rc != 0: + logger.log_error(f"Failed to restart telemetry after user_auth removal: {err}") + else: + logger.log_error("Failed to remove TELEMETRY|gnmi.user_auth") - key = f"GNMI_CLIENT_CERT|{cname}" - entry = db_hgetall(key) - if not entry: - if db_hset(key, "role", GNMI_CLIENT_ROLE): - logger.log_notice(f"Created {key} with role={GNMI_CLIENT_ROLE}") + +def _normalize_role(value) -> List[str]: + """Normalize a role value from CONFIG_DB into a canonical List[str]. + + Handles: + - list (correct format from ConfigDBConnector leaf-list) → as-is + - plain string "admin" → ["admin"] + - JSON-encoded string '["admin","readonly"]' → ["admin", "readonly"] + """ + if isinstance(value, list): + return [str(v).strip() for v in value if str(v).strip()] + if not isinstance(value, str) or not value.strip(): + return [] + s = value.strip() + if s.startswith("["): + try: + parsed = json.loads(s) + if isinstance(parsed, list): + return [str(v).strip() for v in parsed if str(v).strip()] + except (json.JSONDecodeError, ValueError): + pass + return [s] + + +def _build_enabled_patch() -> list: + """Build RFC 6902 JSON Patch ops for the desired enabled state. + + Reads current CONFIG_DB to detect drift and returns a minimal patch + containing only the operations needed to converge. + Includes both TELEMETRY|gnmi.user_auth and GNMI_CLIENT_CERT entries. + """ + patch: list = [] + + # TELEMETRY|gnmi.user_auth must be "cert" + if db_hget("TELEMETRY|gnmi", "user_auth") != "cert": + patch.append({"op": "add", "path": "/TELEMETRY/gnmi/user_auth", "value": "cert"}) + + # GNMI_CLIENT_CERT entries + existing_cnames = set(db_get_table_keys("GNMI_CLIENT_CERT")) + entries_needed: list = [] + for entry in GNMI_CLIENT_CERTS: + cname, role = entry["cname"], entry["role"] + if cname in existing_cnames: + stored = db_hgetall(f"GNMI_CLIENT_CERT|{cname}") + stored_role = stored.get("role") if stored else None + if isinstance(stored_role, list) and sorted(_normalize_role(stored_role)) == sorted(role): + continue + entries_needed.append(entry) + + if entries_needed: + if not existing_cnames: + # Table absent – create with all entries in a single op + patch.append({ + "op": "add", + "path": "/GNMI_CLIENT_CERT", + "value": {e["cname"]: {"role": e["role"]} for e in entries_needed}, + }) else: - logger.log_error(f"Failed to create {key}") + for e in entries_needed: + op = "replace" if e["cname"] in existing_cnames else "add" + patch.append({ + "op": op, + "path": f"/GNMI_CLIENT_CERT/{e['cname']}", + "value": {"role": e["role"]}, + }) + + return patch def _ensure_cname_absent(cname: str) -> None: - if not cname: - return key = f"GNMI_CLIENT_CERT|{cname}" if db_hgetall(key): if db_del(key): @@ -90,24 +286,95 @@ def _ensure_cname_absent(cname: str) -> None: else: logger.log_error(f"Failed to remove {key}") - def reconcile_config_db_once() -> None: """ Idempotent drift-correction for CONFIG_DB: - When TELEMETRY_CLIENT_CERT_VERIFY_ENABLED=true: - * Ensure GNMI|gnmi.user_auth=cert - * Ensure GNMI_CLIENT_CERT| exists with role= - - When false: ensure the CNAME row is absent + * Ensure TELEMETRY|gnmi.user_auth=cert + * Ensure every GNMI_CLIENT_CERT| entry exists with its role + - When false: + * Remove TELEMETRY|gnmi.user_auth + * Remove all entries under GNMI_CLIENT_CERT table """ if GNMI_VERIFY_ENABLED: - _ensure_user_auth_cert() - _ensure_cname_present(GNMI_CLIENT_CNAME) + patch = _build_enabled_patch() + if patch: + _apply_config_patch(patch) else: - _ensure_cname_absent(GNMI_CLIENT_CNAME) + _ensure_user_auth_absent() + for cname in db_get_table_keys("GNMI_CLIENT_CERT"): + _ensure_cname_absent(cname) + +# Host destination for service_checker.py +HOST_SERVICE_CHECKER = "/usr/local/lib/python3.11/dist-packages/health_checker/service_checker.py" + +# TO-be-deleted in next rounds releases, as long as telemetry.service rollouted have been restored. +# Previous sidecar versions overwrote /lib/systemd/system/telemetry.service +# with a variant containing "User=root" (needed for kubectl). Now that kubectl +# is gone we no longer sync that file, but hosts upgraded from the old sidecar +# still carry the stale unit. This one-shot cleanup restores the original +# build-template version (User=admin) packed inside this container. +_CONTAINER_TELEMETRY_SERVICE = "/usr/share/sonic/systemd_scripts/telemetry.service" +_HOST_TELEMETRY_SERVICE = "/lib/systemd/system/telemetry.service" +_STALE_UNIT_CLEANUP_ENABLED = get_bool_env_var("STALE_UNIT_CLEANUP_ENABLED", default=True) +_stale_unit_cleaned = False + +def _cleanup_stale_service_unit() -> None: + """If the host telemetry.service still has User=root from a prior sidecar, restore it.""" + global _stale_unit_cleaned + if _stale_unit_cleaned: + return + if not _STALE_UNIT_CLEANUP_ENABLED: + _stale_unit_cleaned = True + return + + host_bytes = host_read_bytes(_HOST_TELEMETRY_SERVICE) + if host_bytes is None: + return # transient failure or file missing; retry next cycle + + host_content = host_bytes.decode("utf-8", errors="ignore") + if "\nUser=root\n" not in f"\n{host_content}\n": + _stale_unit_cleaned = True # unit is clean; no further retries needed + return + + clean_bytes = read_file_bytes_local(_CONTAINER_TELEMETRY_SERVICE) + if clean_bytes is None: + logger.log_error(f"Cannot read restore file {_CONTAINER_TELEMETRY_SERVICE}") + return # container file missing; retry next cycle + + logger.log_notice("Stale sidecar telemetry.service detected (User=root); restoring from packed file") + if not host_write_atomic(_HOST_TELEMETRY_SERVICE, clean_bytes, 0o644): + logger.log_error("Failed to restore telemetry.service") + return # write failed; retry next cycle + rc, _, err = run_nsenter(["sudo", "systemctl", "daemon-reload"]) + if rc != 0: + logger.log_error(f"daemon-reload failed after telemetry.service restore: {err}") + return # retry next cycle + rc, _, err = run_nsenter(["sudo", "systemctl", "restart", "telemetry"]) + if rc != 0: + logger.log_error(f"telemetry restart failed after telemetry.service restore: {err}") + return # retry next cycle + _stale_unit_cleaned = True + logger.log_notice("Restored telemetry.service and restarted") def ensure_sync() -> bool: - return sync_items(SYNC_ITEMS, POST_COPY_ACTIONS) + _cleanup_stale_service_unit() + branch_name = _get_branch_name() + + if branch_name not in ("202411", "202412", "202505"): + logger.log_error(f"Unsupported branch '{branch_name}'; aborting sync to trigger rollback") + return False + + # For supported branches, use the branch-specific container_checker and service_checker + container_checker_src = f"/usr/share/sonic/systemd_scripts/container_checker_{branch_name}" + service_checker_src = f"/usr/share/sonic/systemd_scripts/service_checker.py_{branch_name}" + + items: List[SyncItem] = SYNC_ITEMS + [ + SyncItem(container_checker_src, "/bin/container_checker"), + SyncItem(service_checker_src, HOST_SERVICE_CHECKER), + ] + return sync_items(items, POST_COPY_ACTIONS) def parse_args() -> argparse.Namespace: p = argparse.ArgumentParser( diff --git a/dockers/docker-telemetry-watchdog/Dockerfile.j2 b/dockers/docker-telemetry-watchdog/Dockerfile.j2 index b6d3b39e3b8..63fbf22064f 100644 --- a/dockers/docker-telemetry-watchdog/Dockerfile.j2 +++ b/dockers/docker-telemetry-watchdog/Dockerfile.j2 @@ -40,6 +40,8 @@ COPY --from=builder /watchdog/src/cmd_list.json /cmd_list.json FROM $BASE +ARG image_version + {{ rsync_from_builder_stage() }} # Make apt-get non-interactive diff --git a/dockers/docker-telemetry-watchdog/watchdog/src/main.rs b/dockers/docker-telemetry-watchdog/watchdog/src/main.rs index bb2f11f622b..ea5e4d4c11c 100644 --- a/dockers/docker-telemetry-watchdog/watchdog/src/main.rs +++ b/dockers/docker-telemetry-watchdog/watchdog/src/main.rs @@ -36,14 +36,40 @@ const GNMI_BASE_CMD: &str = "gnmi_get"; // assumed in PATH const SHOW_API_PROBE_ENV_VAR: &str = "TELEMETRY_WATCHDOG_SHOW_API_PROBE_ENABLED"; // optional: set to "true" to enable serial number probing const SERIALNUMBER_PROBE_ENV_VAR: &str = "TELEMETRY_WATCHDOG_SERIALNUMBER_PROBE_ENABLED"; -const TARGET_NAME_ENV_VAR: &str = "TELEMETRY_WATCHDOG_TARGET_NAME"; // optional override for target_name -const DEFAULT_TARGET_NAME: &str = "server.ndastreaming.ap.gbl"; -const DEFAULT_CA_CRT: &str = "/etc/sonic/telemetry/dsmsroot.cer"; -const DEFAULT_SERVER_CRT: &str = "/etc/sonic/telemetry/streamingtelemetryserver.cer"; -const DEFAULT_SERVER_KEY: &str = "/etc/sonic/telemetry/streamingtelemetryserver.key"; +const TARGET_NAME_ENV_VAR: &str = "TELEMETRY_WATCHDOG_TARGET_NAME"; +const CA_CRT_ENV_VAR: &str = "TELEMETRY_WATCHDOG_CA_CRT"; +const SERVER_CRT_ENV_VAR: &str = "TELEMETRY_WATCHDOG_SERVER_CRT"; +const SERVER_KEY_ENV_VAR: &str = "TELEMETRY_WATCHDOG_SERVER_KEY"; +const BAD_CA_ENV_VAR: &str = "TELEMETRY_WATCHDOG_BAD_CA"; +const BAD_CERT_ENV_VAR: &str = "TELEMETRY_WATCHDOG_BAD_CERT"; +const BAD_KEY_ENV_VAR: &str = "TELEMETRY_WATCHDOG_BAD_KEY"; +const BAD_CNAME_ENV_VAR: &str = "TELEMETRY_WATCHDOG_BAD_CNAME"; +const GOOD_CA_ENV_VAR: &str = "TELEMETRY_WATCHDOG_GOOD_CA"; +const GOOD_CERT_ENV_VAR: &str = "TELEMETRY_WATCHDOG_GOOD_CERT"; +const GOOD_KEY_ENV_VAR: &str = "TELEMETRY_WATCHDOG_GOOD_KEY"; +const GOOD_CNAME_ENV_VAR: &str = "TELEMETRY_WATCHDOG_GOOD_CNAME"; + +const DEFAULT_TARGET_NAME: &str = "default-target-name"; +const DEFAULT_CA_CRT: &str = "/path/to/ca.crt"; +const DEFAULT_SERVER_CRT: &str = "/path/to/server.crt"; +const DEFAULT_SERVER_KEY: &str = "/path/to/server.key"; // Max stderr we keep per gnmi_get (bytes) before truncation. const STDERR_TRUNCATE_LIMIT: usize = 16 * 1024; // 16KB +const CERT_PROBE_ENV_VAR: &str = "TELEMETRY_WATCHDOG_CERT_PROBE_ENABLED"; + +// BAD (expected fail) probe +const DEFAULT_BAD_CA: &str = "/path/to/bad-ca.crt"; +const DEFAULT_BAD_CERT: &str = "/path/to/bad-cert.crt"; +const DEFAULT_BAD_KEY: &str = "/path/to/bad-cert.key"; +const DEFAULT_BAD_CNAME: &str = "bad-cname.example.com"; + +// GOOD (expected success) probe +const DEFAULT_GOOD_CA: &str = "/path/to/good-ca.crt"; +const DEFAULT_GOOD_CERT: &str = "/path/to/good-cert.crt"; +const DEFAULT_GOOD_KEY: &str = "/path/to/good-cert.key"; +const DEFAULT_GOOD_CNAME: &str = "good-cname.example.com"; + // Configuration: // 1. JSON file (/cmd_list.json) optional. Format: // { @@ -61,6 +87,26 @@ const STDERR_TRUNCATE_LIMIT: usize = 16 * 1024; // 16KB // Any failure (spawn error / non-zero exit) sets HTTP 500; body lists per-xpath results. // SHOW probe control: env TELEMETRY_WATCHDOG_SHOW_API_PROBE="disable" skips gnmi_get xpaths (default enabled). +fn env_or_default(env_var: &str, default: &str) -> String { + match env::var(env_var) { + Ok(v) if !v.trim().is_empty() => v.trim().to_string(), + _ => default.to_string(), + } +} + +/// Truncate `s` to at most `max_bytes`, walking back to the nearest UTF-8 +/// char boundary so we never panic on multi-byte sequences. +fn truncate_on_char_boundary(s: &str, max_bytes: usize) -> &str { + if s.len() <= max_bytes { + return s; + } + let mut end = max_bytes; + while end > 0 && !s.is_char_boundary(end) { + end -= 1; + } + &s[..end] +} + fn load_xpath_list() -> (Vec, Vec) { let mut set: HashSet = HashSet::new(); let mut errors: Vec = Vec::new(); @@ -223,10 +269,11 @@ fn run_gnmi_for_xpath( } else { // Possibly large stderr; truncate if huge (optional threshold 16KB). let mut truncated = if stderr_string.len() > STDERR_TRUNCATE_LIMIT { + let head = truncate_on_char_boundary(&stderr_string, STDERR_TRUNCATE_LIMIT); format!( "{}...[truncated {} bytes]", - &stderr_string[..STDERR_TRUNCATE_LIMIT], - stderr_string.len() - STDERR_TRUNCATE_LIMIT + head, + stderr_string.len() - head.len() ) } else { stderr_string.clone() @@ -242,11 +289,25 @@ fn run_gnmi_for_xpath( } }, Err(e) => { - eprintln!("Failed to spawn gnmi_get for {}: {}", xpath, e); + eprintln!("gnmi_get wait/timeout failed for {}: {}", xpath, e); + let trimmed_stderr = stderr_string.trim(); + let mut err_msg = format!("error: {e}"); + if !trimmed_stderr.is_empty() { + if trimmed_stderr.len() > STDERR_TRUNCATE_LIMIT { + let head = truncate_on_char_boundary(trimmed_stderr, STDERR_TRUNCATE_LIMIT); + err_msg.push_str(&format!( + "; stderr: {}...[truncated {} bytes]", + head, + trimmed_stderr.len() - head.len() + )); + } else { + err_msg.push_str(&format!("; stderr: {trimmed_stderr}")); + } + } CommandResult { xpath: xpath.to_string(), success: false, - error: Some(e.to_string()), + error: Some(err_msg), duration_ms: dur, } } @@ -259,18 +320,159 @@ fn get_security_config() -> TelemetrySecurityConfig { // TELEMETRY|gnmi: client_auth let ca_crt = redis_hget("TELEMETRY|certs", "ca_crt") .filter(|v| !v.trim().is_empty()) - .unwrap_or_else(|| DEFAULT_CA_CRT.to_string()); + .unwrap_or_else(|| env_or_default(CA_CRT_ENV_VAR, DEFAULT_CA_CRT)); let server_crt = redis_hget("TELEMETRY|certs", "server_crt") .filter(|v| !v.trim().is_empty()) - .unwrap_or_else(|| DEFAULT_SERVER_CRT.to_string()); + .unwrap_or_else(|| env_or_default(SERVER_CRT_ENV_VAR, DEFAULT_SERVER_CRT)); let server_key = redis_hget("TELEMETRY|certs", "server_key") .filter(|v| !v.trim().is_empty()) - .unwrap_or_else(|| DEFAULT_SERVER_KEY.to_string()); + .unwrap_or_else(|| env_or_default(SERVER_KEY_ENV_VAR, DEFAULT_SERVER_KEY)); let client_auth_opt = redis_hget("TELEMETRY|gnmi", "client_auth"); let use_client_auth = matches!(client_auth_opt.as_ref(), Some(v) if v.eq_ignore_ascii_case("true")); TelemetrySecurityConfig { use_client_auth, ca_crt, server_crt, server_key } } +fn run_yang_config_apply_patch_probe(timeout: Duration) -> CommandResult { + let start = Instant::now(); + let mut cmd = Command::new("sudo"); + cmd.arg("-n") + .arg("config") + .arg("apply-patch") + .arg("/dev/stdin") + .stdin(Stdio::piped()) + .stdout(Stdio::null()) + .stderr(Stdio::piped()); + + let mut child = match cmd.spawn() { + Ok(c) => c, + Err(e) => { + let dur = start.elapsed().as_millis(); + eprintln!("Failed to spawn config apply-patch: {}", e); + return CommandResult { + xpath: "config-apply-patch-probe".to_string(), + success: false, + error: Some(e.to_string()), + duration_ms: dur, + }; + } + }; + + // Write empty JSON patch to stdin, then close it + if let Some(mut stdin_pipe) = child.stdin.take() { + if let Err(e) = stdin_pipe.write_all(b"[]\n") { + eprintln!("Failed to write to config apply-patch stdin: {}", e); + let _ = child.kill(); + let _ = child.wait(); + let dur = start.elapsed().as_millis(); + return CommandResult { + xpath: "config-apply-patch-probe".to_string(), + success: false, + error: Some(format!("stdin write failed: {e}")), + duration_ms: dur, + }; + } + // stdin_pipe is dropped here, sending EOF + } + + // Drain stderr in a separate thread to prevent pipe-buffer deadlock + let stderr_handle = child.stderr.take().map(|pipe| { + std::thread::spawn(move || { + use std::io::Read; + let mut buf = Vec::new(); + let mut pipe = pipe; + let _ = pipe.read_to_end(&mut buf); + String::from_utf8_lossy(&buf).to_string() + }) + }); + + // Poll with timeout + let wait_result = { + let start_wait = Instant::now(); + loop { + match child.try_wait() { + Ok(Some(status)) => break Ok(status), + Ok(None) => { + if start_wait.elapsed() >= timeout { + let _ = child.kill(); + let _ = child.wait(); + break Err(std::io::Error::new( + std::io::ErrorKind::TimedOut, + "config apply-patch timed out", + )); + } + std::thread::sleep(Duration::from_millis(50)); + } + Err(e) => break Err(e), + } + } + }; + + let stderr_string = stderr_handle + .and_then(|h| h.join().ok()) + .unwrap_or_default(); + let dur = start.elapsed().as_millis(); + + match wait_result { + Ok(status) => { + if status.success() { + CommandResult { + xpath: "config-apply-patch-probe".to_string(), + success: true, + error: None, + duration_ms: dur, + } + } else { + let trimmed_stderr = stderr_string.trim(); + let mut err_msg = String::new(); + if !trimmed_stderr.is_empty() { + if trimmed_stderr.len() > STDERR_TRUNCATE_LIMIT { + let head = truncate_on_char_boundary(trimmed_stderr, STDERR_TRUNCATE_LIMIT); + err_msg.push_str(&format!( + "stderr: {}...[truncated {} bytes]", + head, + trimmed_stderr.len() - head.len() + )); + } else { + err_msg.push_str(&format!("stderr: {}", trimmed_stderr)); + } + } + let exit_code = status.code().map(|c| c.to_string()).unwrap_or_else(|| "unknown".to_string()); + if !err_msg.is_empty() { err_msg.push_str("; "); } + err_msg.push_str(&format!("exit code: {exit_code}")); + CommandResult { + xpath: "config-apply-patch-probe".to_string(), + success: false, + error: Some(err_msg), + duration_ms: dur, + } + } + } + Err(e) => { + eprintln!("config apply-patch wait/timeout failed: {}", e); + let trimmed_stderr = stderr_string.trim(); + let mut err_msg = format!("error: {e}"); + if !trimmed_stderr.is_empty() { + if trimmed_stderr.len() > STDERR_TRUNCATE_LIMIT { + let head = truncate_on_char_boundary(trimmed_stderr, STDERR_TRUNCATE_LIMIT); + err_msg.push_str(&format!( + "; stderr: {}...[truncated {} bytes]", + head, + trimmed_stderr.len() - head.len() + )); + } else { + err_msg.push_str(&format!("; stderr: {trimmed_stderr}")); + } + } + CommandResult { + xpath: "config-apply-patch-probe".to_string(), + success: false, + error: Some(err_msg), + duration_ms: dur, + } + } + } +} + fn get_target_name() -> String { match env::var(TARGET_NAME_ENV_VAR) { Ok(v) if !v.trim().is_empty() => v.trim().to_string(), @@ -303,6 +505,13 @@ fn is_serialnumber_probe_enabled() -> bool { } } +fn is_cert_probe_enabled() -> bool { + match env::var(CERT_PROBE_ENV_VAR) { + Ok(v) if v.eq_ignore_ascii_case("true") => true, + _ => false, // default disabled + } +} + fn get_gnmi_port() -> u16 { match redis_hget("TELEMETRY|gnmi", "port") { Some(p) => p.parse::().unwrap_or_else(|_| { @@ -382,6 +591,54 @@ fn main() { let timeout = read_timeout(); let target_name = get_target_name(); + // Certificate probes on reboot-cause/history API + // 1) BAD cert: expect failure + // 2) GOOD cert: expect success + // Only run cert probes when client_auth is actually enabled; + // otherwise the probes would always fail against an insecure server. + if is_cert_probe_enabled() && sec_cfg.use_client_auth { + let xpath_rc = "reboot-cause/history"; + + let bad_sec = TelemetrySecurityConfig { + use_client_auth: true, + ca_crt: env_or_default(BAD_CA_ENV_VAR, DEFAULT_BAD_CA), + server_crt: env_or_default(BAD_CERT_ENV_VAR, DEFAULT_BAD_CERT), + server_key: env_or_default(BAD_KEY_ENV_VAR, DEFAULT_BAD_KEY), + }; + let bad_cname = env_or_default(BAD_CNAME_ENV_VAR, DEFAULT_BAD_CNAME); + let mut res_bad = run_gnmi_for_xpath(&xpath_rc, port, &bad_sec, &bad_cname, timeout, "SHOW"); + if res_bad.success { + res_bad.success = false; + let msg = "Expected FAILURE with BAD cert but command SUCCEEDED".to_string(); + res_bad.error = Some(match res_bad.error.take() { + Some(existing) => format!("{existing}; {msg}"), + None => msg, + }); + http_status = "HTTP/1.1 500 Internal Server Error"; + } + cmd_results.push(res_bad); + + let good_sec = TelemetrySecurityConfig { + use_client_auth: true, + ca_crt: env_or_default(GOOD_CA_ENV_VAR, DEFAULT_GOOD_CA), + server_crt: env_or_default(GOOD_CERT_ENV_VAR, DEFAULT_GOOD_CERT), + server_key: env_or_default(GOOD_KEY_ENV_VAR, DEFAULT_GOOD_KEY), + }; + let good_cname = env_or_default(GOOD_CNAME_ENV_VAR, DEFAULT_GOOD_CNAME); + let res_good = run_gnmi_for_xpath(&xpath_rc, port, &good_sec, &good_cname, timeout, "SHOW"); + if !res_good.success { http_status = "HTTP/1.1 500 Internal Server Error"; } + cmd_results.push(res_good); + } + + // Config apply-patch probe: validates ConfigDB YANG integrity + // Runs `echo '[]' | sudo config apply-patch /dev/stdin` and checks for success. + if is_cert_probe_enabled() { + let yang_timeout = Duration::from_secs(30); + let res_patch = run_yang_config_apply_patch_probe(yang_timeout); + if !res_patch.success { http_status = "HTTP/1.1 500 Internal Server Error"; } + cmd_results.push(res_patch); + } + // Check Serial Number if is_serialnumber_probe_enabled() { let xpath_sn = "DEVICE_METADATA/localhost/chassis_serial_number"; diff --git a/dockers/dockerfile-macros.j2 b/dockers/dockerfile-macros.j2 index 1fa69422db1..673ef3c1ba2 100644 --- a/dockers/dockerfile-macros.j2 +++ b/dockers/dockerfile-macros.j2 @@ -41,7 +41,7 @@ COPY \ {% macro install_offending_packages(packages) -%} {%- for pkg in packages %} RUN pip3 install {{ pkg }} - RUN pip3 install setuptools==51.0.0 + RUN pip3 install setuptools {%- endfor %} {%- endmacro %} diff --git a/files/Aboot/boot0.j2 b/files/Aboot/boot0.j2 index 857fd0cabfe..58b5b62d1a1 100644 --- a/files/Aboot/boot0.j2 +++ b/files/Aboot/boot0.j2 @@ -511,6 +511,8 @@ write_platform_specific_cmdline() { # detect the size of the flash partition from name in Aboot/EOS/SONiC local flash_size=$(($(df "$target_path" | tail -1 | tr -s ' ' | cut -f2 -d' ') / 1000)) + cmdline_add nohz=off + if [ "$platform" = "raven" ]; then # Assuming sid=Cloverdale aboot_machine=arista_7050_qx32 @@ -559,7 +561,6 @@ write_platform_specific_cmdline() { aboot_machine=arista_7050cx3_32s cmdline_add logs_inram=on cmdline_add libata.force=2.00:noncq - cmdline_add nohz=off fi if [ "$sid" = "LodogaPrime" ]; then aboot_machine=arista_7050cx3_32c @@ -573,6 +574,9 @@ write_platform_specific_cmdline() { aboot_machine=arista_7050sx3_48c8 flash_size=7382 fi + if [ "$sid" = "MarysvillePrime" ]; then + aboot_machine=arista_7050sx3_48yc8c + fi if [ "$sid" = "BlackhawkO" ]; then aboot_machine=arista_7060px4_32 flash_size=28000 @@ -729,7 +733,6 @@ write_platform_specific_cmdline() { fi if in_array "$platform" "hedgehog"; then cmdline_add reassign_prefmem - cmdline_add nohz=off read_system_eeprom fi if in_array "$platform" "prairieisland"; then diff --git a/files/apt/apt.conf.d/81norecommends b/files/apt/apt.conf.d/81norecommends index d868eb45e22..2e500e1f86c 100644 --- a/files/apt/apt.conf.d/81norecommends +++ b/files/apt/apt.conf.d/81norecommends @@ -1,3 +1,4 @@ APT::Install-Recommends "false"; +APT::Install-Suggests "false"; APT::AutoRemove::RecommendsImportant "false"; APT::AutoRemove::SuggestsImportant "false"; diff --git a/files/apt/apt.conf.d/apt-multiple-retries b/files/apt/apt.conf.d/apt-multiple-retries deleted file mode 100644 index c4c638252f9..00000000000 --- a/files/apt/apt.conf.d/apt-multiple-retries +++ /dev/null @@ -1,4 +0,0 @@ -# Instruct apt to retry downloads on failures -# This is required only for bullseye. - -Acquire::Retries "3"; diff --git a/files/apt/apt.conf.d/apt-timeout-n-retries b/files/apt/apt.conf.d/apt-timeout-n-retries new file mode 100644 index 00000000000..45327a39d20 --- /dev/null +++ b/files/apt/apt.conf.d/apt-timeout-n-retries @@ -0,0 +1,7 @@ +# Instruct apt-get to timeout after 20 seconds and retry 3 times before giving up. +# This can help mitigate issues with slow or unreliable network connections when using apt-get in Docker builds. + +Acquire::http::Timeout "20"; +Acquire::https::Timeout "20"; +Acquire::ftp::Timeout "20"; +Acquire::Retries "3"; \ No newline at end of file diff --git a/files/build/cargo-wrapper b/files/build/cargo-wrapper new file mode 100755 index 00000000000..d8292d7c4e0 --- /dev/null +++ b/files/build/cargo-wrapper @@ -0,0 +1,66 @@ +#!/bin/bash +# /usr/local/bin/cargo — transparent cargo-auditable wrapper. +# +# Routes `cargo build` (and only build) through `cargo auditable` so +# every Rust binary produced in the slave embeds the resolved +# Cargo.lock into a `.dep-v0` ELF section. Syft's rust-binary +# cataloger reads that section at SBOM scan time, giving SONiC SBOMs +# full per-crate visibility for Rust packages with no source-tree +# changes to individual debian/rules files. +# +# This file is shared across every sonic-slave-* Dockerfile via a +# single COPY from files/build/cargo-wrapper. Edit here only — do +# not duplicate. +# +# Behaviour: +# * If cargo-auditable is on PATH and we are wrapping a `cargo +# build`, route through it. +# * If cargo-auditable is NOT on PATH and we are wrapping a `cargo +# build`, fail HARD with an actionable error rather than +# silently degrading to plain `cargo build` — the SBOM would +# otherwise be quietly missing Rust crate inventory and we'd +# have no signal that anything went wrong. +# * For any other cargo subcommand, pass through unchanged. +# +# CARGO_AUDITABLE_WRAPPED guards against recursion: cargo-auditable +# itself invokes `cargo build` internally and would loop without it. + +REAL=/usr/.cargo/bin/cargo + +if [ -n "$CARGO_AUDITABLE_WRAPPED" ]; then + exec "$REAL" "$@" +fi + +case "$1" in + build) + if ! command -v cargo-auditable >/dev/null 2>&1; then + cat >&2 < + +with CARGO_HOME=\$RUST_ROOT). If you are using a custom slave image +that omitted this dependency, install it manually with the same +command before retrying the build. + +EOF + exit 1 + fi + export CARGO_AUDITABLE_WRAPPED=1 + exec "$REAL" auditable "$@" + ;; + *) + exec "$REAL" "$@" + ;; +esac diff --git a/files/build/versions-public/build/build-sonic-slave-bookworm/versions-deb-bookworm b/files/build/versions-public/build/build-sonic-slave-bookworm/versions-deb-bookworm index 671b8d92a01..42822e5070a 100644 --- a/files/build/versions-public/build/build-sonic-slave-bookworm/versions-deb-bookworm +++ b/files/build/versions-public/build/build-sonic-slave-bookworm/versions-deb-bookworm @@ -1,5 +1,8 @@ +frr==10.5.4-sonic-0 libdashapi==1.0.0 -libnl-3-200==3.7.0-0.2+b1sonic1 +libnetsnmptrapd40==5.9.3+dfsg-2+deb12u1 +libnexthopgroup==1.0.0 +libnexthopgroup-dev==1.0.0 libnl-3-dev==3.7.0-0.2+b1sonic1 libnl-cli-3-200==3.7.0-0.2+b1sonic1 libnl-cli-3-dev==3.7.0-0.2+b1sonic1 @@ -7,7 +10,6 @@ libnl-genl-3-200==3.7.0-0.2+b1sonic1 libnl-genl-3-dev==3.7.0-0.2+b1sonic1 libnl-nf-3-200==3.7.0-0.2+b1sonic1 libnl-nf-3-dev==3.7.0-0.2+b1sonic1 -libnl-route-3-200==3.7.0-0.2+b1sonic1 libnl-route-3-dev==3.7.0-0.2+b1sonic1 libsai==1.0.0 libsaimetadata==1.0.0 @@ -17,6 +19,9 @@ libsairedis-dev==1.0.0 libsaithrift-dev==0.9.4 libsaivs==1.0.0 libsaivs-dev==1.0.0 +libsnmp-base==5.9.3+dfsg-2+deb12u1 +libsnmp-dev==5.9.3+dfsg-2+deb12u1 +libsnmp40==5.9.3+dfsg-2+deb12u1 libswsscommon==1.0.0 libswsscommon-dev==1.0.0 libteam-dev==1.31-1 @@ -25,17 +30,13 @@ libteam5==1.31-1 libteamdctl0==1.31-1 libyang==1.0.73 libyang-cpp==1.0.73 -libyang-dev==1.0.73 +libyang-dev==3.12.2-1 libyang3==3.12.2-1 -p4lang-bmv2==1.15.0-7 +p4lang-bmv2==1.15.0-9 p4lang-p4c==1.2.4.2-2 -p4lang-pi==0.1.0-15 +p4lang-pi==0.1.1-1 python3-libyang==3.1.0-1 python3-swsscommon==1.0.0 python3-yang==1.0.73 sonic-bmp==0.1 -sonic-mgmt-common==1.0.0 -sonic-mgmt-common-codegen==1.0.0 stp==1.0.0 -sys-sdk-dev==1.mlnx.4.8.2096 -sys-sdk-main==1.mlnx.4.8.2096 diff --git a/files/build/versions-public/build/build-sonic-slave-bookworm/versions-deb-bookworm-arm64 b/files/build/versions-public/build/build-sonic-slave-bookworm/versions-deb-bookworm-arm64 new file mode 100644 index 00000000000..5a72f480300 --- /dev/null +++ b/files/build/versions-public/build/build-sonic-slave-bookworm/versions-deb-bookworm-arm64 @@ -0,0 +1,2 @@ +libnl-3-200==3.7.0-0.2+b1sonic1 +libnl-route-3-200==3.7.0-0.2+b1sonic1 diff --git a/files/build/versions-public/build/build-sonic-slave-bookworm/versions-deb-bookworm-armhf b/files/build/versions-public/build/build-sonic-slave-bookworm/versions-deb-bookworm-armhf new file mode 100644 index 00000000000..5a72f480300 --- /dev/null +++ b/files/build/versions-public/build/build-sonic-slave-bookworm/versions-deb-bookworm-armhf @@ -0,0 +1,2 @@ +libnl-3-200==3.7.0-0.2+b1sonic1 +libnl-route-3-200==3.7.0-0.2+b1sonic1 diff --git a/files/build/versions-public/build/build-sonic-slave-bookworm/versions-py3 b/files/build/versions-public/build/build-sonic-slave-bookworm/versions-py3 index 922288cd809..5a3cd49c0c7 100644 --- a/files/build/versions-public/build/build-sonic-slave-bookworm/versions-py3 +++ b/files/build/versions-public/build/build-sonic-slave-bookworm/versions-py3 @@ -1,38 +1,42 @@ -blessed==1.25.0 +blessed==1.44.0 +cachebox==5.2.3 click-log==0.4.0 colorful==0.5.8 -deepdiff==8.6.1 +deepdiff==9.1.0 docker==7.1.0 docker-image-py==0.1.13 enlighten==1.14.1 enum34==1.1.10 -filelock==3.20.0 -freezegun==1.5.5 -ijson==3.2.3 +execnet==2.1.2 +filelock==3.29.4 +ijson==3.5.0 inotify==0.2.12 -invoke==2.2.1 +invoke==3.0.3 ipaddress==1.0.23 +jinxed==2.0.4 jsondiff==2.2.1 jsonpatch==1.33 -jsonpointer==3.0.0 +jsonpointer==3.1.1 jsonschema==2.6.0 libyang==3.1.0 natsort==8.4.0 netaddr==0.8.0 netifaces==0.11.0 orderly-set==5.5.0 -paramiko==4.0.0 +paramiko==5.0.0 prefixed==0.9.0 prettyprinter==0.18.0 pycairo==1.26.1 -pynacl==1.6.1 -python-arptable==0.0.2 -responses==0.25.8 +pynacl==1.6.2 +pyroute2==0.9.6 +pytest-xdist==3.8.0 +responses==0.26.1 scp==0.14.5 semantic-version==2.10.0 supervisor==4.3.0 systemd-python==235 tabulate==0.9.0 toposort==1.6 +wcwidth==0.7.0 www-authenticate==0.9.2 xmltodict==0.12.0 diff --git a/files/build/versions-public/build/build-sonic-slave-bookworm/versions-py3-all-arm64 b/files/build/versions-public/build/build-sonic-slave-bookworm/versions-py3-all-arm64 index ac9f1a794a8..f78c5c58105 100644 --- a/files/build/versions-public/build/build-sonic-slave-bookworm/versions-py3-all-arm64 +++ b/files/build/versions-public/build/build-sonic-slave-bookworm/versions-py3-all-arm64 @@ -1,10 +1,6 @@ bitarray==2.8.1 +certifi==2026.5.20 cffi==2.0.0 -pexpect==4.9.0 -ptyprocess==0.7.0 -pyroute2==0.9.5 -pyyaml==6.0.1 -requests==2.32.5 -urllib3==2.6.2 -wcwidth==0.2.14 -zipp==1.2.0 +pyyaml==6.0.3 +requests==2.34.2 +urllib3==2.7.0 diff --git a/files/build/versions-public/build/build-sonic-slave-bookworm/versions-py3-all-armhf b/files/build/versions-public/build/build-sonic-slave-bookworm/versions-py3-all-armhf index d22a1439670..f78c5c58105 100644 --- a/files/build/versions-public/build/build-sonic-slave-bookworm/versions-py3-all-armhf +++ b/files/build/versions-public/build/build-sonic-slave-bookworm/versions-py3-all-armhf @@ -1,8 +1,6 @@ bitarray==2.8.1 +certifi==2026.5.20 cffi==2.0.0 -pexpect==4.9.0 -ptyprocess==0.7.0 -pyroute2==0.9.5 -pyyaml==6.0.1 -urllib3==2.6.2 -wcwidth==0.2.14 +pyyaml==6.0.3 +requests==2.34.2 +urllib3==2.7.0 diff --git a/files/build/versions-public/build/build-sonic-slave-trixie/versions-deb-trixie b/files/build/versions-public/build/build-sonic-slave-trixie/versions-deb-trixie index 042a0ca9f95..3c599ca2e70 100644 --- a/files/build/versions-public/build/build-sonic-slave-trixie/versions-deb-trixie +++ b/files/build/versions-public/build/build-sonic-slave-trixie/versions-deb-trixie @@ -1,27 +1,81 @@ -kernel-mft-dkms==4.34.0-145 +bfscripts==4.14.0-13938 +doca-sdk-argp==3.3.0055-1 +doca-sdk-common==3.3.0055-1 +doca-sdk-dpdk-bridge==3.3.0055-1 +doca-sdk-flow==3.3.0055-1 +gpio-mlxbf3-dkms==1.0-0 +kernel-mft-dkms==4.36.0.147-1 +kernel-mft-dkms-modules-6.12.41+deb13-sonic-arm64==4.36.0 +libdashapi==1.0.0 +libdoca-sdk-argp-dev==3.3.0055-1 +libdoca-sdk-common-dev==3.3.0055-1 +libdoca-sdk-dpdk-bridge-dev==3.3.0055-1 +libdoca-sdk-flow-dev==3.3.0055-1 +libibverbs-dev==2601.0.7-1 +libnexthopgroup==1.0.0 +libnexthopgroup-dev==1.0.0 libnl-cli-3-200==3.7.0-0.2+b1sonic1 libnl-cli-3-dev==3.7.0-0.2+b1sonic1 libnl-nf-3-200==3.7.0-0.2+b1sonic1 libnl-nf-3-dev==3.7.0-0.2+b1sonic1 -libpcre16-3==2:8.39-15 -libpcre3==2:8.39-15 -libpcre3-dev==2:8.39-15 -libpcre32-3==2:8.39-15 -libpcrecpp0v5==2:8.39-15 +libnl-route-3-dev==3.7.0-0.2+b1sonic1 +libnvhws-dev==26.01.3-1 +libnvhws1==26.01.3-1 +librxpcompiler-dev==22.05.1 +libsai==1.0.0 +libsaimetadata==1.0.0 +libsaimetadata-dev==1.0.0 +libsairedis==1.0.0 +libsairedis-dev==1.0.0 +libsaithrift-dev==0.9.4 +libsaivs==1.0.0 libswsscommon==1.0.0 libswsscommon-dev==1.0.0 libtac-dev==1.4.1-1 libtac2==1.4.1-1 -libyang==1.0.73 -libyang-cpp==1.0.73 -libyang-dev==1.0.73 +libteam-dev==1.31-1 +libteam-utils==1.31-1 +libteam5==1.31-1 +libteamdctl0==1.31-1 +libyang-dev==3.12.2-1 libyang3==3.12.2-1 linux-headers-6.12.41+deb13-common-sonic==6.12.41-1 linux-headers-6.12.41+deb13-sonic-amd64==6.12.41-1 +linux-headers-6.12.41+deb13-sonic-arm64==6.12.41-1 linux-image-6.12.41+deb13-sonic-amd64-unsigned==6.12.41-1 +linux-image-6.12.41+deb13-sonic-arm64-unsigned==6.12.41-1 linux-kbuild-6.12.41+deb13==6.12.41-1 +mft==4.36.0-147 +mft-oem==4.36.0-147 +mlnx-dpdk==22.11.0-2510.2.1 +mlnx-dpdk-dev==22.11.0-2510.2.1 +mlnx-iproute2==2601.0.6-1 +mlnx-ofed-kernel-dkms==26.01.OFED.26.01.1.0.0.1-1 +mlnx-ofed-kernel-utils==26.01.OFED.26.01.1.0.0.1-1 +mlnx-tools==2601.0.2-1 +mlx-bootctl-dkms==1.3-0 +mlxbf-bootctl==2.1 +mlxbf-bootimages==4.14.0-13938 +mlxbf-gige-dkms==1.0-0 +mlxbf-pka-dkms==2.0-1 +mlxbf-ptm-dkms==1.0-0 +mlxbf-tmfifo-dkms==1.0-0 +p4lang-bmv2==1.15.0-9 +p4lang-p4c==1.2.4.2-2 +p4lang-pi==0.1.1-1 +pinctrl-mlxbf3-dkms==1.0-0 +pwr-mlxbf-dkms==1.0-0 python3-libyang==3.1.0-1 python3-swsscommon==1.0.0 -python3-yang==1.0.73 +rdma-core==2601.0.7-1 +rxp-compiler==22.05.1 +sdhci-of-dwcmshc-dkms==1.0-0 +sdn-appliance==1.5-1mlnx1 +sonic-bmp==0.1 +sonic-mgmt-common==1.0.0 +sonic-mgmt-common-codegen==1.0.0 sonic-platform-pddf==1.1 sonic-platform-pddf-sym==1.1 +stp==1.0.0 +sys-sdk-dev==1.mlnx.4.8.4068 +sys-sdk-main==1.mlnx.4.8.4068 diff --git a/files/build/versions-public/build/build-sonic-slave-trixie/versions-deb-trixie-arm64 b/files/build/versions-public/build/build-sonic-slave-trixie/versions-deb-trixie-arm64 deleted file mode 100644 index 4b8a1bfd70f..00000000000 --- a/files/build/versions-public/build/build-sonic-slave-trixie/versions-deb-trixie-arm64 +++ /dev/null @@ -1,8 +0,0 @@ -libnl-3-200==3.7.0-0.2+b1sonic1 -libnl-3-dev==3.7.0-0.2+b1sonic1 -libnl-genl-3-200==3.7.0-0.2+b1sonic1 -libnl-genl-3-dev==3.7.0-0.2+b1sonic1 -libnl-route-3-200==3.7.0-0.2+b1sonic1 -libnl-route-3-dev==3.7.0-0.2+b1sonic1 -linux-headers-6.12.41+deb13-sonic-arm64==6.12.41-1 -linux-image-6.12.41+deb13-sonic-arm64-unsigned==6.12.41-1 diff --git a/files/build/versions-public/build/build-sonic-slave-trixie/versions-deb-trixie-armhf b/files/build/versions-public/build/build-sonic-slave-trixie/versions-deb-trixie-armhf index 565a43369d7..923125dbb6e 100644 --- a/files/build/versions-public/build/build-sonic-slave-trixie/versions-deb-trixie-armhf +++ b/files/build/versions-public/build/build-sonic-slave-trixie/versions-deb-trixie-armhf @@ -1,8 +1,3 @@ -libnl-3-200==3.7.0-0.2+b1sonic1 -libnl-3-dev==3.7.0-0.2+b1sonic1 -libnl-genl-3-200==3.7.0-0.2+b1sonic1 -libnl-genl-3-dev==3.7.0-0.2+b1sonic1 libnl-route-3-200==3.7.0-0.2+b1sonic1 -libnl-route-3-dev==3.7.0-0.2+b1sonic1 linux-headers-6.12.41+deb13-sonic-armmp==6.12.41-1 linux-image-6.12.41+deb13-sonic-armmp==6.12.41-1 diff --git a/files/build/versions-public/build/build-sonic-slave-trixie/versions-py3 b/files/build/versions-public/build/build-sonic-slave-trixie/versions-py3 index de57f1068ae..fc1ebb05cae 100644 --- a/files/build/versions-public/build/build-sonic-slave-trixie/versions-py3 +++ b/files/build/versions-public/build/build-sonic-slave-trixie/versions-py3 @@ -1,23 +1,34 @@ +bitarray==2.8.1 click-log==0.4.0 colorful==0.5.8 docker==7.1.0 docker-image-py==0.1.13 -filelock==3.20.0 -ijson==3.2.3 +enum34==1.1.10 +execnet==2.1.2 +filelock==3.29.4 +freezegun==1.5.5 +ijson==3.5.0 inotify==0.2.12 ipaddress==1.0.23 jsondiff==2.2.1 jsonpatch==1.33 -jsonpointer==3.0.0 +jsonpointer==3.1.1 jsonschema==2.6.0 lazy-object-proxy==1.12.0 libyang==3.1.0 netaddr==0.8.0 pddf-platform==1.0 +pexpect==4.9.0 prettyprinter==0.18.0 +ptyprocess==0.7.0 pycairo==1.26.1 -responses==0.25.8 +pyroute2==0.9.6 +pytest-mock==3.15.1 +pytest-xdist==3.8.0 +python_arptable==0.0.2 +responses==0.26.1 semantic-version==2.10.0 +supervisor==4.3.0 tabulate==0.9.0 toposort==1.6 www-authenticate==0.9.2 diff --git a/files/build/versions-public/build/build-sonic-slave-trixie/versions-py3-all-arm64 b/files/build/versions-public/build/build-sonic-slave-trixie/versions-py3-all-arm64 index ba8d3996d74..e864ddd5c80 100644 --- a/files/build/versions-public/build/build-sonic-slave-trixie/versions-py3-all-arm64 +++ b/files/build/versions-public/build/build-sonic-slave-trixie/versions-py3-all-arm64 @@ -1,5 +1 @@ -bitarray==2.8.1 -pexpect==4.9.0 -ptyprocess==0.7.0 -pyroute2==0.9.5 scp==0.14.5 diff --git a/files/build/versions-public/build/build-sonic-slave-trixie/versions-py3-all-armhf b/files/build/versions-public/build/build-sonic-slave-trixie/versions-py3-all-armhf deleted file mode 100644 index ba8d3996d74..00000000000 --- a/files/build/versions-public/build/build-sonic-slave-trixie/versions-py3-all-armhf +++ /dev/null @@ -1,5 +0,0 @@ -bitarray==2.8.1 -pexpect==4.9.0 -ptyprocess==0.7.0 -pyroute2==0.9.5 -scp==0.14.5 diff --git a/files/build/versions-public/default/versions-docker b/files/build/versions-public/default/versions-docker index 17055620118..af50e8e826c 100644 --- a/files/build/versions-public/default/versions-docker +++ b/files/build/versions-public/default/versions-docker @@ -1,10 +1,8 @@ -amd64:amd64/debian:bookworm==sha256:830fe902fd6e29c2d3cebef306cd5a9b33f49ca4322f6ef82847e19f987fb282 -amd64:debian:bookworm==sha256:7e5bc0e499a8d50cb1e32287944a90b9ec8fd7d500673e75daff3f52882f5798 -amd64:debian:trixie==sha256:653dfb9f86c3782e8369d5f7d29bb8faba1f4bff9025db46e807fa4c22903671 -amd64:p4lang/behavioral-model:latest==sha256:ce45720e28a96a50f275c1b511cd84c2558b62f2cf7a7e506765183bc3fb2e32 -arm64:arm64v8/debian:bookworm==sha256:6ee560263164f07cdf4b03efbd60a2bb0d323dcd399c4197d5be599802ecd621 -arm64:debian:bookworm==sha256:7e5bc0e499a8d50cb1e32287944a90b9ec8fd7d500673e75daff3f52882f5798 -arm64:debian:trixie==sha256:653dfb9f86c3782e8369d5f7d29bb8faba1f4bff9025db46e807fa4c22903671 -armhf:arm32v7/debian:bookworm==sha256:8d8e05122934174c2007368565aff508cb3dcfa194919e95f59d584e51246930 -armhf:debian:bookworm==sha256:7e5bc0e499a8d50cb1e32287944a90b9ec8fd7d500673e75daff3f52882f5798 -armhf:debian:trixie==sha256:653dfb9f86c3782e8369d5f7d29bb8faba1f4bff9025db46e807fa4c22903671 +amd64:amd64/debian:bookworm==sha256:61059a089b82b853783125e8a5a06e0d29e185587d3061ebb58496a423e2ba52 +amd64:debian:bookworm==sha256:49ba348354a28e39c70beffd6cf43bdb8d55d81ce4b746b0428717d054b8bbc4 +amd64:debian:trixie==sha256:fe7312b5f05bf5f43fad76bcd8945642e4e47a68aefd1b73f447615899d0fac1 +amd64:p4lang/behavioral-model:latest==sha256:01e4152769263597677b7aacb7d98e62a3b3554adac50029d39b1937ceae215a +arm64:debian:bookworm==sha256:49ba348354a28e39c70beffd6cf43bdb8d55d81ce4b746b0428717d054b8bbc4 +arm64:debian:trixie==sha256:fe7312b5f05bf5f43fad76bcd8945642e4e47a68aefd1b73f447615899d0fac1 +armhf:debian:bookworm==sha256:49ba348354a28e39c70beffd6cf43bdb8d55d81ce4b746b0428717d054b8bbc4 +armhf:debian:trixie==sha256:fe7312b5f05bf5f43fad76bcd8945642e4e47a68aefd1b73f447615899d0fac1 diff --git a/files/build/versions-public/default/versions-git b/files/build/versions-public/default/versions-git index 1acaa363d8a..b47c674acc4 100644 --- a/files/build/versions-public/default/versions-git +++ b/files/build/versions-public/default/versions-git @@ -1,23 +1,21 @@ -https://github.com/aristanetworks/swi-tools.git==f1eb6920bf0b6fbecd8f1521a424c1f437db0af1 +https://github.com/aristanetworks/swi-tools.git==6db86f5983426d272e541a61e0add79b3fec5b1e https://github.com/CESNET/libyang-python.git==d8acc345aeb8d5b9644f7f2197ba6d8733e86378 -https://github.com/CESNET/libyang.git==3d07c3a71534a580c3960907da17568eff7e5c64 https://github.com/daveolson53/audisp-tacplus.git==559c9f22edd4f2dea0ecedffb3ad9502b12a75b6 https://github.com/daveolson53/libnss-tacplus.git==19008ab68d9d504aa58eb34d5f564755a1613b8b https://github.com/dyninc/OpenBFDD.git==e35f43ad8d2b3f084e96a84c392528a90d05a287 -https://github.com/facebook/tac_plus==dd38c2d727ff252ab2e1188c6d7087425376d845 -https://github.com/flashrom/flashrom.git==c042b4c32b7bcf12e05f82643b5a9b8668a7b296 -https://github.com/FreeRADIUS/freeradius-server.git==74ef0e3da2de28c40054febe9b78261ce9da66db +https://github.com/flashrom/flashrom.git==2739025ffd13e64e8880fca724a6fbe5014fcc4b +https://github.com/FreeRADIUS/freeradius-server.git==6d4a56d3156a77eedae006d336025c2d71b28297 https://github.com/FreeRADIUS/pam_radius.git==d17fc655f0007728b67d0d25c0ca20b6048aa7a1 -https://github.com/google/gnxi.git==612869a62faaaf2956ed60296ad801513ab62d29 +https://github.com/fullstorydev/grpcurl.git==d00c28104be4b06f4dd887196ccfc57b054aa069 +https://github.com/google/gnxi.git==987664c754f18c0b9ea39b2de86317c14c226d5b https://github.com/jeroennijhof/pam_tacplus.git==b839c440e33c36eced9dcbc287fcfe6237c4c4ce -https://github.com/karimra/gnoic.git==2b416818af4946eecc3adc199713f20f39710f40 https://github.com/Mellanox/libpsample.git==62bb27d9a49424e45191eee81df7ce0d8c74e774 -https://github.com/openconfig/oc-pyang.git==4607fd1987d4f586aba03b40f222015cb3ef8161 -https://github.com/redis/librdb.git==83b7852bbc1b21caea04cebdb1bd90345738655a -https://github.com/sflow/host-sflow==dbeacec2177b4f8157fccaf078ab93a4484afe46 -https://github.com/sflow/sflowtool==c4213f2ea91773b80628b1bebb9cd08bdec6612b -https://github.com/sonic-net/DASH.git==8377343f3cd1af9af6eb34fd9d310b6aa2ad667f +https://github.com/openconfig/gnmic.git==823f73c046c1e0314ca82428094d96fc4371fff9 +https://github.com/openconfig/oc-pyang.git==a116b53b1c1a149bc9a5d42dc26f3d0ab797846a +https://github.com/redis/librdb.git==fe60c6b9e5ed20f95287057196ee7318906ee6c3 +https://github.com/sflow/host-sflow==41f10e6a2068ff15856e2bd1f1af2df1a506461b +https://github.com/sflow/sflowtool==f5e92291aa1e44f3de69a6ca2b732f4f2259eaca +https://github.com/sonic-net/DASH.git==d5c003dd7774c2b43f275c0233acc73a0ea28d2f https://salsa.debian.org/debian/monit.git==fae0a5c57cc8caed4d8c29202d528e535d3f4252 -https://salsa.debian.org/grub-team/grub.git==60bd5b52b6330557c3cc8ae6bf5c0408949fc308 -https://salsa.debian.org/kernel-team/initramfs-tools.git==8c65a4965ee3529288c88565c7715692bfcd3422 -https://salsa.debian.org/tai271828/rasdaemon.git==51a7f485f8b2e2ae43e613f19c5a387595174132 +https://salsa.debian.org/grub-team/grub.git==4ab0b2ce97b35364da2b108523e18985f12da72a +https://salsa.debian.org/tai271828/rasdaemon.git==f1f14bb053388d9b790bb9b09054deddb4e3b4fc diff --git a/files/build/versions-public/default/versions-mirror b/files/build/versions-public/default/versions-mirror index e0d9c3e4e1f..70416e7a42a 100644 --- a/files/build/versions-public/default/versions-mirror +++ b/files/build/versions-public/default/versions-mirror @@ -1,17 +1,16 @@ azure.archive.ubuntu.com_ubuntu_dists_focal==2020-04-23T17:33:17Z -azure.archive.ubuntu.com_ubuntu_dists_focal-backports==2025-12-11T16:47:23Z -azure.archive.ubuntu.com_ubuntu_dists_focal-security==2025-12-11T16:38:54Z -azure.archive.ubuntu.com_ubuntu_dists_focal-updates==2025-12-11T16:42:50Z -deb.nodesource.com_node%5f14.x_dists_bookworm==2023-02-17T00:35:29Z -debian==20260113T001449Z -debian-security==20260113T001531Z -download.docker.com_linux_debian_dists_bookworm==2025-12-11T16:15:25Z -download.docker.com_linux_debian_dists_trixie==2025-12-11T16:15:25Z -packages.trafficmanager.net_snapshot_debian-security_20251211T001340Z_dists_bookworm-security==2025-12-10T22:29:44Z -packages.trafficmanager.net_snapshot_debian-security_20251211T001340Z_dists_trixie-security==2025-12-10T22:29:45Z -packages.trafficmanager.net_snapshot_debian_20251211T001456Z_dists_bookworm==2025-09-06T11:02:45Z -packages.trafficmanager.net_snapshot_debian_20251211T001456Z_dists_bookworm-backports==2025-12-10T20:23:39Z -packages.trafficmanager.net_snapshot_debian_20251211T001456Z_dists_bookworm-updates==2025-12-10T20:23:39Z -packages.trafficmanager.net_snapshot_debian_20251211T001456Z_dists_trixie==2025-11-15T10:36:56Z -packages.trafficmanager.net_snapshot_debian_20251211T001456Z_dists_trixie-backports==2025-12-10T20:23:39Z -packages.trafficmanager.net_snapshot_debian_20251211T001456Z_dists_trixie-updates==2025-12-10T20:23:39Z +azure.archive.ubuntu.com_ubuntu_dists_focal-backports==2026-06-19T22:58:15Z +azure.archive.ubuntu.com_ubuntu_dists_focal-security==2026-06-19T22:55:36Z +azure.archive.ubuntu.com_ubuntu_dists_focal-updates==2026-06-19T22:56:41Z +debian==20260619T000834Z +debian-security==20260619T000827Z +download.docker.com_linux_debian_dists_bookworm==2026-06-19T13:06:20Z +download.docker.com_linux_debian_dists_trixie==2026-06-19T13:06:20Z +packages.trafficmanager.net_snapshot_debian-security_20260619T000827Z_dists_bookworm-security==2026-06-18T23:54:20Z +packages.trafficmanager.net_snapshot_debian-security_20260619T000827Z_dists_trixie-security==2026-06-18T23:54:21Z +packages.trafficmanager.net_snapshot_debian_20260619T000834Z_dists_bookworm==2026-05-16T10:54:28Z +packages.trafficmanager.net_snapshot_debian_20260619T000834Z_dists_bookworm-backports==2026-06-18T20:14:06Z +packages.trafficmanager.net_snapshot_debian_20260619T000834Z_dists_bookworm-updates==2026-06-18T20:14:06Z +packages.trafficmanager.net_snapshot_debian_20260619T000834Z_dists_trixie==2026-05-16T09:42:04Z +packages.trafficmanager.net_snapshot_debian_20260619T000834Z_dists_trixie-backports==2026-06-18T20:14:06Z +packages.trafficmanager.net_snapshot_debian_20260619T000834Z_dists_trixie-updates==2026-06-18T20:14:06Z diff --git a/files/build/versions-public/default/versions-web b/files/build/versions-public/default/versions-web index 9979de75970..afcc4b27fb3 100644 --- a/files/build/versions-public/default/versions-web +++ b/files/build/versions-public/default/versions-web @@ -1,9 +1,6 @@ http://deb.debian.org/debian/pool/main/i/iproute2/iproute2_6.1.0-3.debian.tar.xz==fc7fd2b3eebb09770c1608dcddda878e http://deb.debian.org/debian/pool/main/i/iproute2/iproute2_6.1.0-3.dsc==c3116f907750a9e903d605b18256839f http://deb.debian.org/debian/pool/main/i/iproute2/iproute2_6.1.0.orig.tar.xz==f3ff4461e25dbc5ef1fb7a9167a9523d -http://deb.debian.org/debian/pool/main/i/iptables/iptables_1.8.9-2.debian.tar.xz==833a30b64d7b257ce27e6bfa91a33b96 -http://deb.debian.org/debian/pool/main/i/iptables/iptables_1.8.9-2.dsc==f75e4908e4c841e569447376be6bb043 -http://deb.debian.org/debian/pool/main/i/iptables/iptables_1.8.9.orig.tar.xz==ffa00f68d63e723c21b8a091c5c0271b http://deb.debian.org/debian/pool/main/i/isc-dhcp/isc-dhcp_4.4.3-P1-2.debian.tar.xz==64fbb939e9c93d14e5a9040b45e5b459 http://deb.debian.org/debian/pool/main/i/isc-dhcp/isc-dhcp_4.4.3-P1-2.dsc==9f39c78ebbf7d66194de179dc12de49e http://deb.debian.org/debian/pool/main/i/isc-dhcp/isc-dhcp_4.4.3-P1.orig.tar.gz==36c6ca77212373b0cff478ae9e5d32af @@ -14,19 +11,23 @@ http://deb.debian.org/debian/pool/main/l/lm-sensors/lm-sensors_3.6.0.orig.tar.gz http://debian-archive.trafficmanager.net/debian/pool/main/liby/libyang/libyang_3.12.2-1.debian.tar.xz==3f8c497b000b1ec30fb66f107f61107a http://debian-archive.trafficmanager.net/debian/pool/main/liby/libyang/libyang_3.12.2-1.dsc==346672dc8c2fc303a133051205deedc7 http://debian-archive.trafficmanager.net/debian/pool/main/liby/libyang/libyang_3.12.2.orig.tar.xz==3bb7e265e14eb5cb817e9608bb7a6baf -http://download.opensuse.org/repositories/home:/p4lang/Debian_11/p4lang-bmv2_1.15.0-7.debian.tar.xz==f4d249b77d4f8d120b229834aac02df5 -http://download.opensuse.org/repositories/home:/p4lang/Debian_11/p4lang-bmv2_1.15.0-7.dsc==38011efbe33e6a461d36ca2c683e2019 -http://download.opensuse.org/repositories/home:/p4lang/Debian_11/p4lang-bmv2_1.15.0.orig.tar.gz==cbbb4a0d5b1e17dca0532c3ca761e05c +http://download.opensuse.org/repositories/home:/p4lang/Debian_11/p4lang-bmv2_1.15.0-9.debian.tar.xz==a6038bad9d248deacd85c81a67e85217 +http://download.opensuse.org/repositories/home:/p4lang/Debian_11/p4lang-bmv2_1.15.0-9.dsc==6c5963a76f240936f3ebb3a4b89a6955 +http://download.opensuse.org/repositories/home:/p4lang/Debian_11/p4lang-bmv2_1.15.0.orig.tar.gz==967f8387a3a4ba50e6f4b6ea943eaa36 http://download.opensuse.org/repositories/home:/p4lang/Debian_11/p4lang-p4c_1.2.4.2-2.debian.tar.xz==7ea7d64c9147bd93a790af57693ce36f -http://download.opensuse.org/repositories/home:/p4lang/Debian_11/p4lang-p4c_1.2.4.2-2.dsc==dfbdeaac367213500bfe65111a955d0f +http://download.opensuse.org/repositories/home:/p4lang/Debian_11/p4lang-p4c_1.2.4.2-2.dsc==55ba2486e8c72683a3fb667fdf1636aa http://download.opensuse.org/repositories/home:/p4lang/Debian_11/p4lang-p4c_1.2.4.2.orig.tar.gz==b1008dffbe236d065c5557f2d4629aa9 -http://download.opensuse.org/repositories/home:/p4lang/Debian_11/p4lang-pi_0.1.0-15.debian.tar.xz==b9d8e4ce4cb66385250cf6dded0ef57a -http://download.opensuse.org/repositories/home:/p4lang/Debian_11/p4lang-pi_0.1.0-15.dsc==ee4f5c84d621a5dbfbe368baad031af4 -http://download.opensuse.org/repositories/home:/p4lang/Debian_11/p4lang-pi_0.1.0.orig.tar.gz==551d3780d615557674e93fa11210499d -http://www.mellanox.com/downloads/MFT/mft-4.34.0-145-x86_64-deb.tgz==c6d68339ee34d84f94438c79d4ce9f52 +http://download.opensuse.org/repositories/home:/p4lang/Debian_11/p4lang-pi_0.1.1-1.debian.tar.xz==f293c42988ba76441a90a8b448544ceb +http://download.opensuse.org/repositories/home:/p4lang/Debian_11/p4lang-pi_0.1.1-1.dsc==c30a016b8bec96730562784cb15b6e4a +http://download.opensuse.org/repositories/home:/p4lang/Debian_11/p4lang-pi_0.1.1.orig.tar.gz==17a6b9ce972e7666690ebe398dce7f63 +http://www.mellanox.com/downloads/MFT/mft-4.36.0-147-aarch64-deb.tgz==29a17968baf6f861e9ce92145b944e61 +http://www.mellanox.com/downloads/MFT/mft-4.36.0-147-x86_64-deb.tgz==d091e884f1f4a86a6ff44e2fb5a71fee https://deb.debian.org/debian/pool/main/b/bash/bash_5.2.37-2.debian.tar.xz==5a87fe5e2077763dd62ad40716804954 https://deb.debian.org/debian/pool/main/b/bash/bash_5.2.37-2.dsc==c9d75e69a27738c24a25fff61285998b https://deb.debian.org/debian/pool/main/b/bash/bash_5.2.37.orig.tar.xz==6075acd95528d14013fcde1ae279efdf +https://deb.debian.org/debian/pool/main/i/iproute2/iproute2_6.15.0-1.debian.tar.xz==d113e76b6f0042545934917d84cec1b7 +https://deb.debian.org/debian/pool/main/i/iproute2/iproute2_6.15.0-1.dsc==ff32f139ab598ae72a0356c848dada9c +https://deb.debian.org/debian/pool/main/i/iproute2/iproute2_6.15.0.orig.tar.xz==d85d77deed57e055cb2d1409595a6348 https://deb.debian.org/debian/pool/main/k/kdump-tools/kdump-tools_1.10.7.dsc==b7c20dcfa144f7905dae83f907878201 https://deb.debian.org/debian/pool/main/k/kdump-tools/kdump-tools_1.10.7.tar.xz==8a29aa85664696551fa8ac0601e649f3 https://deb.debian.org/debian/pool/main/libn/libnl3/libnl3_3.7.0-0.2.debian.tar.xz==a36598f37197fcad7228f22196dd7f2f @@ -36,37 +37,89 @@ https://deb.debian.org/debian/pool/main/libn/libnl3/libnl3_3.7.0.orig.tar.gz.asc https://deb.debian.org/debian/pool/main/libt/libteam/libteam_1.31-1.debian.tar.xz==26fef506b62eb28e3356781a707c2440 https://deb.debian.org/debian/pool/main/libt/libteam/libteam_1.31-1.dsc==f27b8eee722b8595ab45344e4bd3cbe7 https://deb.debian.org/debian/pool/main/libt/libteam/libteam_1.31.orig.tar.xz==eec2e9c38e9a4c2cdb7e4954d110a118 +https://deb.debian.org/debian/pool/main/m/makedumpfile/makedumpfile_1.7.7-1.debian.tar.xz==ce468d153936c0b200d3c514b98247fc +https://deb.debian.org/debian/pool/main/m/makedumpfile/makedumpfile_1.7.7-1.dsc==74b61898edb1a1fae67a540a8959f657 +https://deb.debian.org/debian/pool/main/m/makedumpfile/makedumpfile_1.7.7.orig.tar.gz==30c6153878878bc8f692127f4d090b36 https://deb.debian.org/debian/pool/main/o/openssh/openssh_10.0p1-7.debian.tar.xz==a6135296076789766d5037281fd6e277 https://deb.debian.org/debian/pool/main/o/openssh/openssh_10.0p1-7.dsc==ce345ed4c63d1ec10849bd1d4f497b18 https://deb.debian.org/debian/pool/main/o/openssh/openssh_10.0p1.orig.tar.gz==689148621a2eaa734497b12bed1c5202 https://deb.debian.org/debian/pool/main/o/openssh/openssh_10.0p1.orig.tar.gz.asc==1c0cb23a67bd4e5d25a8dc423ed65a5e -https://deb.nodesource.com/gpgkey/nodesource.gpg.key==003b51a89a133b5db4cca98b2dea3117 -https://deb.nodesource.com/node_14.x/dists/bookworm/Release==249bac8daff55b81a1b40c2c283e317d -https://deb.nodesource.com/setup_14.x==c30873f4a513bb935afaf8f65e7de9e1 +https://dl.influxdata.com/influxdb/releases/influxdb3-core-3.9.0_linux_amd64.tar.gz==45e117aa45346586f1735a4b343e8edd https://download.docker.com/linux/debian/gpg==1afae06b34a13c1b3d9cb61a26285a15 +https://github.com/anchore/syft/releases/download/v1.44.0/syft_1.44.0_linux_amd64.tar.gz==bcdbe6cd637d3bddfe95bfec7e8e04d1 +https://github.com/anchore/syft/releases/download/v1.44.0/syft_1.44.0_linux_arm64.tar.gz==15b3d0baf5a0f2d2458f730354e7f382 https://github.com/aristanetworks/sonic-firmware/raw/24716c4e03f223d8e18afff786ac427f6ac77fe0/phy/phy-credo_1.0_amd64.deb==14e233cd68bc5db22eb8c9e177242851 -https://github.com/bazelbuild/bazelisk/releases/latest/download/bazelisk-linux-amd64==89248680f7d19c124f9c093873f8ed59 -https://github.com/bazelbuild/bazelisk/releases/latest/download/bazelisk-linux-arm64==b696a1c0e36abe8768d6bfe35d187e75 +https://github.com/bazelbuild/bazelisk/releases/download/v1.28.1/bazelisk-linux-amd64==2dc74b7ad6bdd6b6b08f6802d14fc1fd +https://github.com/bazelbuild/bazelisk/releases/download/v1.28.1/bazelisk-linux-arm64==94415d08ed2f86a49375f25a7f2f9cca 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+libgcrypt20==1.10.1-3+deb12u1 libgdbm-compat4==1.23-3 libgdbm6==1.23-3 -libgssapi-krb5-2==1.20.1-2+deb12u4 +libgnutls30==3.7.9-2+deb12u7 +libgssapi-krb5-2==1.20.1-2+deb12u5 libjansson4==2.14-2 libjemalloc2==5.3.0-1 libjq1==1.6-2.1+deb12u1 libk5crypto3==1.20.1-2+deb12u1+fips libkeyutils1==1.6.3-2 -libkrb5-3==1.20.1-2+deb12u4 -libkrb5support0==1.20.1-2+deb12u4 +libkrb5-3==1.20.1-2+deb12u5 +libkrb5support0==1.20.1-2+deb12u5 libldap-2.5-0==2.5.13+dfsg-5 liblognorm5==2.0.6-4 liblzf1==3.6-3 libmnl0==1.0.4-3 libncursesw6==6.4-4 -libnghttp2-14==1.52.0-1+deb12u2 +libnghttp2-14==1.52.0-1+deb12u3 libnorm1==1.5.9+dfsg-2 libnsl2==1.3.0-2 libonig5==6.9.8-1 @@ -40,13 +42,14 @@ libpopt0==1.19+dfsg-1 libproc2-0==2:4.0.2-3 libpsl5==0.21.2-1 libpython3-stdlib==3.11.2-1+b1 -libpython3.11-minimal==3.11.2-6+deb12u6 -libpython3.11-stdlib==3.11.2-6+deb12u6 +libpython3.11-minimal==3.11.2-6+deb12u7 +libpython3.11-stdlib==3.11.2-6+deb12u7 libreadline8==8.2-1.3 +librelp0==1.11.0-1 librtmp1==2.4+20151223.gitfa8646d.1-2+b2 libsasl2-2==2.1.28+dfsg-10 libsasl2-modules-db==2.1.28+dfsg-10 -libsodium23==1.0.18-1 +libsodium23==1.0.18-1+deb12u1 libsqlite3-0==3.40.1-2+deb12u2 libssh2-1==1.10.0-3+b1 libssl-dev==3.0.11-1~deb12u2+fips @@ -70,12 +73,13 @@ python3-minimal==3.11.2-1+b1 python3-pkg-resources==66.1.1-1+deb12u2 python3-setuptools==66.1.1-1+deb12u2 python3-wheel==0.38.4-2 -python3.11==3.11.2-6+deb12u6 -python3.11-minimal==3.11.2-6+deb12u6 +python3.11==3.11.2-6+deb12u7 +python3.11-minimal==3.11.2-6+deb12u7 readline-common==8.2-1.3 -redis-tools==5:7.0.15-1~deb12u6 -rsync==3.2.7-1+deb12u2 +redis-tools==5:7.0.15-1~deb12u7 +rsync==3.2.7-1+deb12u5 rsyslog==8.2302.0-1+deb12u1 +rsyslog-relp==8.2302.0-1+deb12u1 socat==1.7.4.1-3 symcrypt-openssl==0.1 vim-common==2:9.0.1378-2+deb12u2 diff --git a/files/build/versions-public/dockers/docker-base-bookworm/versions-py3 b/files/build/versions-public/dockers/docker-base-bookworm/versions-py3 index 472f8cb1f0b..d3deb673296 100644 --- a/files/build/versions-public/dockers/docker-base-bookworm/versions-py3 +++ b/files/build/versions-public/dockers/docker-base-bookworm/versions-py3 @@ -1,7 +1,7 @@ j2cli==0.3.10 jinja2==3.1.6 markupsafe==3.0.3 -pip==25.3 +pip==26.1.2 setuptools==66.1.1 supervisord-dependent-startup==1.4.0 toposort==1.10 diff --git a/files/build/versions-public/dockers/docker-base-trixie/versions-deb-trixie b/files/build/versions-public/dockers/docker-base-trixie/versions-deb-trixie new file mode 100644 index 00000000000..67522375c73 --- /dev/null +++ b/files/build/versions-public/dockers/docker-base-trixie/versions-deb-trixie @@ -0,0 +1,100 @@ +adduser==3.152 +ca-certificates==20250419 +curl==8.14.1-2+deb13u3 +iproute2==6.15.0-1+sonic.0 +jq==1.7.1-6+deb13u2 +less==668-1 +libatomic1==14.2.0-19 +libbpf1==1:1.5.0-3 +libbrotli1==1.1.0-2+b7 +libcap2-bin==1:2.75-10+deb13u1+b1 +libcom-err2==1.47.2-3+b11 +libcurl4t64==8.14.1-2+deb13u3 +libdaemon0==0.14-7.1+b3 +libdbus-1-3==1.16.2-2 +libelf1t64==0.192-4 +libestr0==0.1.11-2 +libexpat1==2.7.1-2 +libfastjson4==1.2304.0-2 +libffi8==3.4.8-2 +libgdbm-compat4t64==1.24-2 +libgdbm6t64==1.24-2 +libgnutls30t64==3.8.9-3+deb13u4 +libgssapi-krb5-2==1.21.3-5+fips +libidn2-0==2.3.8-2 +libjansson4==2.14-2+b3 +libjemalloc2==5.3.0-3 +libjq1==1.7.1-6+deb13u2 +libk5crypto3==1.21.3-5+fips +libkeyutils1==1.6.3-6 +libkrb5-3==1.21.3-5+fips +libkrb5support0==1.21.3-5+fips +libldap2==2.6.10+dfsg-1 +liblognorm5==2.0.6-5 +liblzf1==3.6-4+b3 +libmnl0==1.0.5-3 +libncursesw6==6.5+20250216-2 +libnghttp2-14==1.64.0-1.1+deb13u1 +libnghttp3-9==1.8.0-1 +libnorm1t64==1.5.9+dfsg-3.1+b2 +libonig5==6.9.9-1+b1 +libp11-kit0==0.25.5-3 +libperl5.40==5.40.1-6 +libpgm-5.3-0t64==5.3.128~dfsg-2.1+b1 +libpopt0==1.19+dfsg-2 +libproc2-0==2:4.0.4-9 +libpsl5t64==0.21.2-1.1+b1 +libpython3-stdlib==3.13.5-1 +libpython3.13-minimal==3.13.5-2+deb13u2 +libpython3.13-stdlib==3.13.5-2+deb13u2 +libreadline8t64==8.2-6 +librelp0==1.11.0-2 +librtmp1==2.4+20151223.gitfa8646d.1-2+b5 +libsasl2-2==2.1.28+dfsg1-9 +libsasl2-modules-db==2.1.28+dfsg1-9 +libsodium23==1.0.18-1+deb13u1 +libssh2-1t64==1.11.1-1 +libssl-dev==3.5.4-1+fips +libssl3t64==3.5.4-1+fips +libtasn1-6==4.20.0-2 +libtirpc-common==1.3.6+ds-1 +libtirpc3t64==1.3.6+ds-1 +libunistring5==1.3-2 +libwrap0==7.6.q-36 +libxtables12==1.8.11-2 +libzmq5==4.3.5-1+b3 +media-types==13.0.0 +net-tools==2.10-1.3 +netbase==6.5 +openssl==3.5.4-1+fips +perl==5.40.1-6 +perl-modules-5.40==5.40.1-6 +procps==2:4.0.4-9 +python-is-python3==3.13.3-1 +python3==3.13.5-1 +python3-autocommand==2.2.2-3 +python3-inflect==7.3.1-2 +python3-jaraco.context==6.0.1-1+deb13u1 +python3-jaraco.functools==4.1.0-1 +python3-jaraco.text==4.0.0-1 +python3-minimal==3.13.5-1 +python3-more-itertools==10.7.0-1 +python3-packaging==25.0-1 +python3-pip==25.1.1+dfsg-1 +python3-pkg-resources==78.1.1-0.1 +python3-setuptools==78.1.1-0.1 +python3-typeguard==4.4.2-1 +python3-typing-extensions==4.13.2-1 +python3-wheel==0.46.1-2 +python3-zipp==3.21.0-1 +python3.13==3.13.5-2+deb13u2 +python3.13-minimal==3.13.5-2+deb13u2 +readline-common==8.2-6 +redis-tools==5:8.0.2-3+deb13u2 +rsync==3.4.1+ds1-5+deb13u3 +rsyslog==8.2504.0-1 +rsyslog-relp==8.2504.0-1 +socat==1.7.4.1-3 +symcrypt-openssl==1.9.4 +vim-common==2:9.1.1230-2 +vim-tiny==2:9.1.1230-2 diff --git a/files/build/versions-public/dockers/docker-base-trixie/versions-py3 b/files/build/versions-public/dockers/docker-base-trixie/versions-py3 new file mode 100644 index 00000000000..354c1b930b8 --- /dev/null +++ b/files/build/versions-public/dockers/docker-base-trixie/versions-py3 @@ -0,0 +1,24 @@ +attrs==26.1.0 +autocommand==2.2.2 +inflect==7.3.1 +jaraco.context==6.0.1 +jaraco.functools==4.1.0 +jaraco.text==4.0.0 +jinja2==3.1.6 +jinjanator==25.3.1 +jinjanator-plugins==25.1.0 +markupsafe==3.0.3 +more-itertools==10.7.0 +packaging==25.0 +pip==25.1.1 +pluggy==1.6.0 +python-dotenv==1.2.2 +pyyaml==6.0.3 +setuptools==78.1.1 +supervisor==4.3.0 +supervisord-dependent-startup==1.4.0 +toposort==1.10 +typeguard==4.4.2 +typing_extensions==4.13.2 +wheel==0.46.1 +zipp==3.21.0 diff --git a/files/build/versions-public/dockers/docker-bmp-watchdog/versions-deb-bookworm b/files/build/versions-public/dockers/docker-bmp-watchdog/versions-deb-bookworm deleted file mode 100644 index 1c455fcbe06..00000000000 --- a/files/build/versions-public/dockers/docker-bmp-watchdog/versions-deb-bookworm +++ /dev/null @@ -1,21 +0,0 @@ -apt-utils==2.6.1 -libboost-serialization1.83.0==1.83.0-4.2~bpo12+1 -libhiredis0.14==0.14.1-3 -libk5crypto3==1.20.1-2+deb12u4 -libnl-3-200==3.7.0-0.2+b1sonic1 -libnl-cli-3-200==3.7.0-0.2+b1sonic1 -libnl-genl-3-200==3.7.0-0.2+b1sonic1 -libnl-nf-3-200==3.7.0-0.2+b1sonic1 -libnl-route-3-200==3.7.0-0.2+b1sonic1 -libpcre3==2:8.39-15 -libpython3.11==3.11.2-6+deb12u6 -libswsscommon==1.0.0 -libyaml-0-2==0.2.5-1 -libyang==1.0.73 -libyang-cpp==1.0.73 -python3-swsscommon==1.0.0 -python3-yaml==6.0-3+b2 -python3-yang==1.0.73 -sonic-db-cli==1.0.0 -sonic-eventd==1.0.0-0 -sonic-supervisord-utilities-rs==1.0.0 diff --git a/files/build/versions-public/dockers/docker-bmp-watchdog/versions-deb-bookworm-arm64 b/files/build/versions-public/dockers/docker-bmp-watchdog/versions-deb-bookworm-arm64 deleted file mode 100644 index 9032f664a38..00000000000 --- a/files/build/versions-public/dockers/docker-bmp-watchdog/versions-deb-bookworm-arm64 +++ /dev/null @@ -1,15 +0,0 @@ -icu-devtools==72.1-3+deb12u1 -libc-dev-bin==2.36-9+deb12u13 -libc6-dev==2.36-9+deb12u13 -libcrypt-dev==1:4.4.33-2 -libicu-dev==72.1-3+deb12u1 -libicu72==72.1-3+deb12u1 -libnsl-dev==1.3.0-2 -libtirpc-dev==1.3.3+ds-1 -libxml2==2.9.14+dfsg-1.3~deb12u4 -libxml2-dev==2.9.14+dfsg-1.3~deb12u4 -libxslt1-dev==1.1.35-1+deb12u3 -libxslt1.1==1.1.35-1+deb12u3 -linux-libc-dev==6.1.158-1 -rpcsvc-proto==1.4.3-1 -zlib1g-dev==1:1.2.13.dfsg-1 diff --git a/files/build/versions-public/dockers/docker-bmp-watchdog/versions-deb-bookworm-armhf b/files/build/versions-public/dockers/docker-bmp-watchdog/versions-deb-bookworm-armhf deleted file mode 100644 index 9032f664a38..00000000000 --- a/files/build/versions-public/dockers/docker-bmp-watchdog/versions-deb-bookworm-armhf +++ /dev/null @@ -1,15 +0,0 @@ -icu-devtools==72.1-3+deb12u1 -libc-dev-bin==2.36-9+deb12u13 -libc6-dev==2.36-9+deb12u13 -libcrypt-dev==1:4.4.33-2 -libicu-dev==72.1-3+deb12u1 -libicu72==72.1-3+deb12u1 -libnsl-dev==1.3.0-2 -libtirpc-dev==1.3.3+ds-1 -libxml2==2.9.14+dfsg-1.3~deb12u4 -libxml2-dev==2.9.14+dfsg-1.3~deb12u4 -libxslt1-dev==1.1.35-1+deb12u3 -libxslt1.1==1.1.35-1+deb12u3 -linux-libc-dev==6.1.158-1 -rpcsvc-proto==1.4.3-1 -zlib1g-dev==1:1.2.13.dfsg-1 diff --git a/files/build/versions-public/dockers/docker-bmp-watchdog/versions-deb-trixie b/files/build/versions-public/dockers/docker-bmp-watchdog/versions-deb-trixie new file mode 100644 index 00000000000..b082e1cdc1f --- /dev/null +++ b/files/build/versions-public/dockers/docker-bmp-watchdog/versions-deb-trixie @@ -0,0 +1,35 @@ +apt-utils==3.0.3 +libboost-serialization1.83.0==1.83.0-4.2 +libc-dev-bin==2.41-12+deb13u3 +libc6-dev==2.41-12+deb13u3 +libcrypt-dev==1:4.4.38-1 +libgcrypt20==1.11.0-7+deb13u1 +libgpg-error0==1.51-4 +libhiredis1.1.0==1.2.0-6+b3 +libnl-3-200==3.7.0-0.2+b1sonic1 +libnl-cli-3-200==3.7.0-0.2+b1sonic1 +libnl-genl-3-200==3.7.0-0.2+b1sonic1 +libnl-nf-3-200==3.7.0-0.2+b1sonic1 +libnl-route-3-200==3.7.0-0.2+b1sonic1 +libpython3.13==3.13.5-2+deb13u2 +libswsscommon==1.0.0 +libxml2==2.12.7+dfsg+really2.9.14-2.1+deb13u2 +libxml2-dev==2.12.7+dfsg+really2.9.14-2.1+deb13u2 +libxslt1-dev==1.1.35-1.2+deb13u3 +libxslt1.1==1.1.35-1.2+deb13u3 +libyaml-0-2==0.2.5-2 +libyang3==3.12.2-1 +linux-libc-dev==6.12.90-2 +python3-cffi==1.17.1-3 +python3-cffi-backend==1.17.1-3 +python3-libyang==3.1.0-1 +python3-ply==3.11-9 +python3-pycparser==2.22-2 +python3-redis==6.1.0-2 +python3-swsscommon==1.0.0 +python3-yaml==6.0.2-1+b2 +rpcsvc-proto==1.4.3-1+b1 +sonic-db-cli==1.0.0 +sonic-eventd==1.0.0-0 +sonic-supervisord-utilities-rs==1.0.0 +zlib1g-dev==1:1.3.dfsg+really1.3.1-1+b1 diff --git a/files/build/versions-public/dockers/docker-bmp-watchdog/versions-deb-trixie-armhf b/files/build/versions-public/dockers/docker-bmp-watchdog/versions-deb-trixie-armhf new file mode 100644 index 00000000000..a1ff1642e43 --- /dev/null +++ b/files/build/versions-public/dockers/docker-bmp-watchdog/versions-deb-trixie-armhf @@ -0,0 +1 @@ +rpcsvc-proto==1.4.3-1 diff --git a/files/build/versions-public/dockers/docker-bmp-watchdog/versions-py3 b/files/build/versions-public/dockers/docker-bmp-watchdog/versions-py3 index 6e94aee194a..d70bda21d45 100644 --- a/files/build/versions-public/dockers/docker-bmp-watchdog/versions-py3 +++ b/files/build/versions-public/dockers/docker-bmp-watchdog/versions-py3 @@ -1,18 +1,17 @@ -async-timeout==5.0.1 bitarray==2.8.1 -ijson==3.2.3 -ipaddress==1.0.23 +cffi==1.17.1 +ijson==3.5.0 jsondiff==2.2.1 -jsonpointer==3.0.0 -lxml==6.0.2 +jsonpointer==3.1.1 +libyang==3.1.0 +lxml==6.1.1 natsort==8.4.0 netaddr==0.8.0 +ply==3.11 pyang==2.7.1 -pyangbind==0.8.2 -pyyaml==6.0.3 -redis==5.0.1 +pyangbind==0.8.7 +pycparser==2.22 +redis==6.1.0 redis-dump-load==1.1 -regex==2025.11.3 -six==1.17.0 +regex==2026.5.9 tabulate==0.9.0 -xmltodict==0.12.0 diff --git a/files/build/versions-public/dockers/docker-config-engine-bookworm/versions-deb-bookworm b/files/build/versions-public/dockers/docker-config-engine-bookworm/versions-deb-bookworm index 491be1e2355..3a34c1bb9bd 100644 --- a/files/build/versions-public/dockers/docker-config-engine-bookworm/versions-deb-bookworm +++ b/files/build/versions-public/dockers/docker-config-engine-bookworm/versions-deb-bookworm @@ -1,36 +1,41 @@ apt-utils==2.6.1 binutils==2.40-2 +binutils-aarch64-linux-gnu==2.40-2 binutils-common==2.40-2 binutils-x86-64-linux-gnu==2.40-2 bzip2==1.0.8-5+b1 cpp==4:12.2.0-3 cpp-12==12.2.0-14+deb12u1 -dpkg-dev==1.21.22 +dpkg-dev==1.21.23 g++==4:12.2.0-3 g++-12==12.2.0-14+deb12u1 gcc==4:12.2.0-3 gcc-12==12.2.0-14+deb12u1 +icu-devtools==72.1-3+deb12u1 libasan8==12.2.0-14+deb12u1 libbinutils==2.40-2 libboost-serialization1.83.0==1.83.0-4.2~bpo12+1 -libc-dev-bin==2.36-9+deb12u13 -libc6-dev==2.36-9+deb12u13 +libc-dev-bin==2.36-9+deb12u14 +libc6-dev==2.36-9+deb12u14 libcc1-0==12.2.0-14+deb12u1 libcrypt-dev==1:4.4.33-2 libctf-nobfd0==2.40-2 libctf0==2.40-2 -libdpkg-perl==1.21.22 +libdpkg-perl==1.21.23 libexpat1-dev==2.5.0-1+deb12u2 libgcc-12-dev==12.2.0-14+deb12u1 libgomp1==12.2.0-14+deb12u1 libgprofng0==2.40-2 libhiredis0.14==0.14.1-3 +libhwasan0==12.2.0-14+deb12u1 +libicu-dev==72.1-3+deb12u1 +libicu72==72.1-3+deb12u1 libisl23==0.25-1.1 libitm1==12.2.0-14+deb12u1 libjs-jquery==3.6.1+dfsg+~3.5.14-1 libjs-sphinxdoc==5.3.0-4 libjs-underscore==1.13.4~dfsg+~1.11.4-3 -libk5crypto3==1.20.1-2+deb12u4 +libk5crypto3==1.20.1-2+deb12u5 liblsan0==12.2.0-14+deb12u1 libmpc3==1.3.1-1 libmpfr6==4.2.0-1 @@ -42,24 +47,34 @@ libnl-route-3-200==3.7.0-0.2+b1sonic1 libnsl-dev==1.3.0-2 libpcre3==2:8.39-15 libpython3-dev==3.11.2-1+b1 -libpython3.11==3.11.2-6+deb12u6 -libpython3.11-dev==3.11.2-6+deb12u6 +libpython3.11==3.11.2-6+deb12u7 +libpython3.11-dev==3.11.2-6+deb12u7 libquadmath0==12.2.0-14+deb12u1 libstdc++-12-dev==12.2.0-14+deb12u1 libswsscommon==1.0.0 libtirpc-dev==1.3.3+ds-1 libtsan2==12.2.0-14+deb12u1 libubsan1==12.2.0-14+deb12u1 +libxml2==2.9.14+dfsg-1.3~deb12u5 +libxml2-dev==2.9.14+dfsg-1.3~deb12u5 +libxslt1-dev==1.1.35-1+deb12u4 +libxslt1.1==1.1.35-1+deb12u4 libyaml-0-2==0.2.5-1 libyang==1.0.73 libyang-cpp==1.0.73 -linux-libc-dev==6.1.158-1 +libyang3==3.12.2-1 +linux-libc-dev==6.1.174-1 make==4.3-4.1 patch==2.7.6-7 +python3-cffi==1.15.1-5 +python3-cffi-backend==1.15.1-5+b1 +python3-libyang==3.1.0-1 +python3-ply==3.11-5 +python3-pycparser==2.21-1 python3-swsscommon==1.0.0 python3-yaml==6.0-3+b2 python3-yang==1.0.73 -python3.11-dev==3.11.2-6+deb12u6 +python3.11-dev==3.11.2-6+deb12u7 rpcsvc-proto==1.4.3-1 sonic-db-cli==1.0.0 sonic-eventd==1.0.0-0 diff --git a/files/build/versions-public/dockers/docker-config-engine-bookworm/versions-deb-bookworm-arm64 b/files/build/versions-public/dockers/docker-config-engine-bookworm/versions-deb-bookworm-arm64 deleted file mode 100644 index 2a55552d6c9..00000000000 --- a/files/build/versions-public/dockers/docker-config-engine-bookworm/versions-deb-bookworm-arm64 +++ /dev/null @@ -1,9 +0,0 @@ -binutils-aarch64-linux-gnu==2.40-2 -icu-devtools==72.1-3+deb12u1 -libhwasan0==12.2.0-14+deb12u1 -libicu-dev==72.1-3+deb12u1 -libicu72==72.1-3+deb12u1 -libxml2==2.9.14+dfsg-1.3~deb12u4 -libxml2-dev==2.9.14+dfsg-1.3~deb12u4 -libxslt1-dev==1.1.35-1+deb12u3 -libxslt1.1==1.1.35-1+deb12u3 diff --git a/files/build/versions-public/dockers/docker-config-engine-bookworm/versions-deb-bookworm-armhf b/files/build/versions-public/dockers/docker-config-engine-bookworm/versions-deb-bookworm-armhf index 15f8784987c..76806cf3ac6 100644 --- a/files/build/versions-public/dockers/docker-config-engine-bookworm/versions-deb-bookworm-armhf +++ b/files/build/versions-public/dockers/docker-config-engine-bookworm/versions-deb-bookworm-armhf @@ -1,8 +1 @@ binutils-arm-linux-gnueabihf==2.40-2 -icu-devtools==72.1-3+deb12u1 -libicu-dev==72.1-3+deb12u1 -libicu72==72.1-3+deb12u1 -libxml2==2.9.14+dfsg-1.3~deb12u4 -libxml2-dev==2.9.14+dfsg-1.3~deb12u4 -libxslt1-dev==1.1.35-1+deb12u3 -libxslt1.1==1.1.35-1+deb12u3 diff --git a/files/build/versions-public/dockers/docker-config-engine-bookworm/versions-py3 b/files/build/versions-public/dockers/docker-config-engine-bookworm/versions-py3 index 6e94aee194a..a9db89784c5 100644 --- a/files/build/versions-public/dockers/docker-config-engine-bookworm/versions-py3 +++ b/files/build/versions-public/dockers/docker-config-engine-bookworm/versions-py3 @@ -1,18 +1,20 @@ async-timeout==5.0.1 bitarray==2.8.1 -ijson==3.2.3 -ipaddress==1.0.23 +cffi==1.15.1 +ijson==3.5.0 jsondiff==2.2.1 -jsonpointer==3.0.0 -lxml==6.0.2 +jsonpointer==3.1.1 +libyang==3.1.0 +lxml==6.1.1 natsort==8.4.0 netaddr==0.8.0 +ply==3.11 pyang==2.7.1 pyangbind==0.8.2 +pycparser==2.21 pyyaml==6.0.3 redis==5.0.1 redis-dump-load==1.1 -regex==2025.11.3 +regex==2026.5.9 six==1.17.0 tabulate==0.9.0 -xmltodict==0.12.0 diff --git a/files/build/versions-public/dockers/docker-config-engine-trixie/versions-deb-trixie b/files/build/versions-public/dockers/docker-config-engine-trixie/versions-deb-trixie new file mode 100644 index 00000000000..a3c97f91bcd --- /dev/null +++ b/files/build/versions-public/dockers/docker-config-engine-trixie/versions-deb-trixie @@ -0,0 +1,89 @@ +apt-utils==3.0.3 +binutils==2.44-3 +binutils-aarch64-linux-gnu==2.44-3 +binutils-common==2.44-3 +binutils-x86-64-linux-gnu==2.44-3 +bzip2==1.0.8-6 +cpp==4:14.2.0-1 +cpp-14==14.2.0-19 +cpp-14-aarch64-linux-gnu==14.2.0-19 +cpp-14-x86-64-linux-gnu==14.2.0-19 +cpp-aarch64-linux-gnu==4:14.2.0-1 +cpp-x86-64-linux-gnu==4:14.2.0-1 +dpkg-dev==1.22.22 +g++==4:14.2.0-1 +g++-14==14.2.0-19 +g++-14-aarch64-linux-gnu==14.2.0-19 +g++-14-x86-64-linux-gnu==14.2.0-19 +g++-aarch64-linux-gnu==4:14.2.0-1 +g++-x86-64-linux-gnu==4:14.2.0-1 +gcc==4:14.2.0-1 +gcc-14==14.2.0-19 +gcc-14-aarch64-linux-gnu==14.2.0-19 +gcc-14-x86-64-linux-gnu==14.2.0-19 +gcc-aarch64-linux-gnu==4:14.2.0-1 +gcc-x86-64-linux-gnu==4:14.2.0-1 +libasan8==14.2.0-19 +libbinutils==2.44-3 +libboost-serialization1.83.0==1.83.0-4.2 +libc-dev-bin==2.41-12+deb13u3 +libc6-dev==2.41-12+deb13u3 +libcc1-0==14.2.0-19 +libcrypt-dev==1:4.4.38-1 +libctf-nobfd0==2.44-3 +libctf0==2.44-3 +libdpkg-perl==1.22.22 +libexpat1-dev==2.7.1-2 +libgcc-14-dev==14.2.0-19 +libgcrypt20==1.11.0-7+deb13u1 +libgomp1==14.2.0-19 +libgpg-error0==1.51-4 +libgprofng0==2.44-3 +libhiredis1.1.0==1.2.0-6+b3 +libhwasan0==14.2.0-19 +libisl23==0.27-1 +libitm1==14.2.0-19 +libjs-jquery==3.6.1+dfsg+~3.5.14-1 +libjs-sphinxdoc==8.1.3-5 +libjs-underscore==1.13.4~dfsg+~1.11.4-3 +liblsan0==14.2.0-19 +libmpc3==1.3.1-1+b3 +libmpfr6==4.2.2-1 +libnl-3-200==3.7.0-0.2+b1sonic1 +libnl-cli-3-200==3.7.0-0.2+b1sonic1 +libnl-genl-3-200==3.7.0-0.2+b1sonic1 +libnl-nf-3-200==3.7.0-0.2+b1sonic1 +libnl-route-3-200==3.7.0-0.2+b1sonic1 +libpython3-dev==3.13.5-1 +libpython3.13==3.13.5-2+deb13u2 +libpython3.13-dev==3.13.5-2+deb13u2 +libquadmath0==14.2.0-19 +libsframe1==2.44-3 +libstdc++-14-dev==14.2.0-19 +libswsscommon==1.0.0 +libtsan2==14.2.0-19 +libubsan1==14.2.0-19 +libxml2==2.12.7+dfsg+really2.9.14-2.1+deb13u2 +libxml2-dev==2.12.7+dfsg+really2.9.14-2.1+deb13u2 +libxslt1-dev==1.1.35-1.2+deb13u3 +libxslt1.1==1.1.35-1.2+deb13u3 +libyaml-0-2==0.2.5-2 +libyang3==3.12.2-1 +linux-libc-dev==6.12.90-2 +make==4.4.1-2 +patch==2.8-2 +python3-cffi==1.17.1-3 +python3-cffi-backend==1.17.1-3 +python3-libyang==3.1.0-1 +python3-ply==3.11-9 +python3-pycparser==2.22-2 +python3-redis==6.1.0-2 +python3-swsscommon==1.0.0 +python3-yaml==6.0.2-1+b2 +python3.13-dev==3.13.5-2+deb13u2 +rpcsvc-proto==1.4.3-1 +sonic-db-cli==1.0.0 +sonic-eventd==1.0.0-0 +sonic-supervisord-utilities-rs==1.0.0 +xz-utils==5.8.1-1 +zlib1g-dev==1:1.3.dfsg+really1.3.1-1+b1 diff --git a/files/build/versions-public/dockers/docker-config-engine-trixie/versions-deb-trixie-arm64 b/files/build/versions-public/dockers/docker-config-engine-trixie/versions-deb-trixie-arm64 new file mode 100644 index 00000000000..68f4c9ddfa6 --- /dev/null +++ b/files/build/versions-public/dockers/docker-config-engine-trixie/versions-deb-trixie-arm64 @@ -0,0 +1 @@ +rpcsvc-proto==1.4.3-1+b1 diff --git a/files/build/versions-public/dockers/docker-config-engine-trixie/versions-deb-trixie-armhf b/files/build/versions-public/dockers/docker-config-engine-trixie/versions-deb-trixie-armhf new file mode 100644 index 00000000000..3f0b4b163a6 --- /dev/null +++ b/files/build/versions-public/dockers/docker-config-engine-trixie/versions-deb-trixie-armhf @@ -0,0 +1,7 @@ +binutils-arm-linux-gnueabihf==2.44-3 +cpp-14-arm-linux-gnueabihf==14.2.0-19 +cpp-arm-linux-gnueabihf==4:14.2.0-1 +g++-14-arm-linux-gnueabihf==14.2.0-19 +g++-arm-linux-gnueabihf==4:14.2.0-1 +gcc-14-arm-linux-gnueabihf==14.2.0-19 +gcc-arm-linux-gnueabihf==4:14.2.0-1 diff --git a/files/build/versions-public/dockers/docker-config-engine-trixie/versions-py3 b/files/build/versions-public/dockers/docker-config-engine-trixie/versions-py3 new file mode 100644 index 00000000000..d70bda21d45 --- /dev/null +++ b/files/build/versions-public/dockers/docker-config-engine-trixie/versions-py3 @@ -0,0 +1,17 @@ +bitarray==2.8.1 +cffi==1.17.1 +ijson==3.5.0 +jsondiff==2.2.1 +jsonpointer==3.1.1 +libyang==3.1.0 +lxml==6.1.1 +natsort==8.4.0 +netaddr==0.8.0 +ply==3.11 +pyang==2.7.1 +pyangbind==0.8.7 +pycparser==2.22 +redis==6.1.0 +redis-dump-load==1.1 +regex==2026.5.9 +tabulate==0.9.0 diff --git a/files/build/versions-public/dockers/docker-dash-engine/versions-py3 b/files/build/versions-public/dockers/docker-dash-engine/versions-py3 index da8137a384f..a32bfbf1bee 100644 --- a/files/build/versions-public/dockers/docker-dash-engine/versions-py3 +++ b/files/build/versions-public/dockers/docker-dash-engine/versions-py3 @@ -1,18 +1,18 @@ -cffi==1.15.0 -coverage==6.3.1 -cython==0.29.27 +cffi==1.17.1 +coverage==7.6.1 +cython==0.29.36 grpcio==1.43.2 nnpy==0.1 pip==20.0.2 protobuf==3.18.1 ptf==0.9.1 -pycparser==2.21 -pypcap==1.2.3 +pycparser==2.23 +pypcap==1.3.0 scapy==2.4.5 setuptools==45.2.0 -six==1.16.0 +six==1.17.0 supervisor==4.1.0 supervisord-dependent-startup==1.4.0 thrift==0.13.0 toposort==1.10 -wheel==0.37.1 +wheel==0.45.1 diff --git a/files/build/versions-public/dockers/docker-dash-ha/versions-deb-bookworm b/files/build/versions-public/dockers/docker-dash-ha/versions-deb-bookworm deleted file mode 100644 index f94524f97a4..00000000000 --- a/files/build/versions-public/dockers/docker-dash-ha/versions-deb-bookworm +++ /dev/null @@ -1,38 +0,0 @@ -dash-ha==1.0.0 -dash-ha-dbgsym==1.0.0 -gdb==13.1-3 -gdbserver==13.1-3 -libbabeltrace1==1.5.11-1+b2 -libboost-regex1.74.0==1.74.0+ds1-21 -libcbor0.8==0.8.0-2+b1 -libcurl3-gnutls==7.88.1-10+deb12u14 -libdebuginfod-common==0.188-2.1 -libdebuginfod1==0.188-2.1 -libdw1==0.188-2.1 -libedit2==3.1-20221030-2 -libfido2-1==1.12.0-2+b1 -libglib2.0-0==2.74.6-2+deb12u7 -libgpm2==1.20.7-10+b1 -libicu72==72.1-3+deb12u1 -libipt2==2.0.5-1 -libmpfr6==4.2.0-1 -libsource-highlight-common==3.1.9-4.2 -libsource-highlight4v5==3.1.9-4.2+b3 -libssl-dev==3.0.17-1~deb12u3 -libssl3==3.0.17-1~deb12u3 -libswsscommon-dbgsym==1.0.0 -libunwind8==1.6.2-3 -libyang-cpp-dbgsym==1.0.73 -openssh-client==1:9.2p1-2+deb12u7 -openssl==3.0.17-1~deb12u3 -python3-swsscommon-dbgsym==1.0.0 -python3-yang-dbgsym==1.0.73 -sensible-utils==0.0.17+nmu1 -sonic-db-cli-dbgsym==1.0.0 -sonic-eventd-dbgsym==1.0.0-0 -sshpass==1.09-1+b1 -strace==6.1-0.1 -swss-dbg==1.0.0 -ucf==3.0043+nmu1+deb12u1 -vim==2:9.0.1378-2+deb12u2 -vim-runtime==2:9.0.1378-2+deb12u2 diff --git a/files/build/versions-public/dockers/docker-dash-ha/versions-deb-trixie b/files/build/versions-public/dockers/docker-dash-ha/versions-deb-trixie new file mode 100644 index 00000000000..d9c49d79831 --- /dev/null +++ b/files/build/versions-public/dockers/docker-dash-ha/versions-deb-trixie @@ -0,0 +1,37 @@ +dash-ha==1.0.0 +dash-ha-dbgsym==1.0.0 +gdb==16.3-1 +gdbserver==16.3-1 +libbabeltrace1==1.5.11-4+b2 +libcbor0.10==0.10.2-2 +libcurl3t64-gnutls==8.14.1-2+deb13u3 +libdebuginfod-common==0.192-4 +libdebuginfod1t64==0.192-4 +libdw1t64==0.192-4 +libedit2==3.1-20250104-1 +libfido2-1==1.15.0-1+b1 +libglib2.0-0t64==2.84.4-3~deb13u3 +libgpm2==1.20.7-11+b2 +libipt2==2.1.2-1 +libjson-c5==0.18+ds-1 +libmpfr6==4.2.2-1 +libngtcp2-16==1.11.0-1+deb13u1 +libngtcp2-crypto-gnutls8==1.11.0-1+deb13u1 +libsource-highlight-common==3.1.9-4.3 +libsource-highlight4t64==3.1.9-4.3+b1 +libswsscommon-dbgsym==1.0.0 +libtext-charwidth-perl==0.04-11+b4 +libtext-wrapi18n-perl==0.06-10 +libunwind8==1.8.1-0.1 +libyang3-dbgsym==3.12.2-1 +openssh-client==1:10.0p1-7+fips +python3-swsscommon-dbgsym==1.0.0 +sensible-utils==0.0.25 +sonic-db-cli-dbgsym==1.0.0 +sonic-eventd-dbgsym==1.0.0-0 +sshpass==1.10-0.1 +strace==6.13+ds-1 +swss-dbg==1.0.0 +ucf==3.0052 +vim==2:9.1.1230-2 +vim-runtime==2:9.1.1230-2 diff --git a/files/build/versions-public/dockers/docker-database/versions-deb-bookworm b/files/build/versions-public/dockers/docker-database/versions-deb-bookworm deleted file mode 100644 index 2950c6b83a0..00000000000 --- a/files/build/versions-public/dockers/docker-database/versions-deb-bookworm +++ /dev/null @@ -1,38 +0,0 @@ -gdb==13.1-3 -gdbserver==13.1-3 -libbabeltrace1==1.5.11-1+b2 -libboost-regex1.74.0==1.74.0+ds1-21 -libcbor0.8==0.8.0-2+b1 -libcurl3-gnutls==7.88.1-10+deb12u14 -libdashapi==1.0.0 -libdebuginfod-common==0.188-2.1 -libdebuginfod1==0.188-2.1 -libdw1==0.188-2.1 -libedit2==3.1-20221030-2 -libfido2-1==1.12.0-2+b1 -libglib2.0-0==2.74.6-2+deb12u7 -libgpm2==1.20.7-10+b1 -libicu72==72.1-3+deb12u1 -libipt2==2.0.5-1 -libmpfr6==4.2.0-1 -libprotobuf32==3.21.12-3 -libsource-highlight-common==3.1.9-4.2 -libsource-highlight4v5==3.1.9-4.2+b3 -libssl-dev==3.0.17-1~deb12u3 -libssl3==3.0.17-1~deb12u3 -libswsscommon-dbgsym==1.0.0 -libunwind8==1.6.2-3 -libyang-cpp-dbgsym==1.0.73 -openssh-client==1:9.2p1-2+deb12u7 -openssl==3.0.17-1~deb12u3 -python3-swsscommon-dbgsym==1.0.0 -python3-yang-dbgsym==1.0.73 -redis-server==5:7.0.15-1~deb12u6 -sensible-utils==0.0.17+nmu1 -sonic-db-cli-dbgsym==1.0.0 -sonic-eventd-dbgsym==1.0.0-0 -sshpass==1.09-1+b1 -strace==6.1-0.1 -ucf==3.0043+nmu1+deb12u1 -vim==2:9.0.1378-2+deb12u2 -vim-runtime==2:9.0.1378-2+deb12u2 diff --git a/files/build/versions-public/dockers/docker-database/versions-deb-trixie b/files/build/versions-public/dockers/docker-database/versions-deb-trixie new file mode 100644 index 00000000000..b97b8da42c8 --- /dev/null +++ b/files/build/versions-public/dockers/docker-database/versions-deb-trixie @@ -0,0 +1,37 @@ +gdb==16.3-1 +gdbserver==16.3-1 +libbabeltrace1==1.5.11-4+b2 +libcbor0.10==0.10.2-2 +libcurl3t64-gnutls==8.14.1-2+deb13u3 +libdashapi==1.0.0 +libdebuginfod-common==0.192-4 +libdebuginfod1t64==0.192-4 +libdw1t64==0.192-4 +libedit2==3.1-20250104-1 +libfido2-1==1.15.0-1+b1 +libglib2.0-0t64==2.84.4-3~deb13u3 +libgpm2==1.20.7-11+b2 +libipt2==2.1.2-1 +libjson-c5==0.18+ds-1 +libmpfr6==4.2.2-1 +libngtcp2-16==1.11.0-1+deb13u1 +libngtcp2-crypto-gnutls8==1.11.0-1+deb13u1 +libprotobuf32t64==3.21.12-11 +libsource-highlight-common==3.1.9-4.3 +libsource-highlight4t64==3.1.9-4.3+b1 +libswsscommon-dbgsym==1.0.0 +libtext-charwidth-perl==0.04-11+b4 +libtext-wrapi18n-perl==0.06-10 +libunwind8==1.8.1-0.1 +libyang3-dbgsym==3.12.2-1 +openssh-client==1:10.0p1-7+fips +python3-swsscommon-dbgsym==1.0.0 +redis-server==5:8.0.2-3+deb13u2 +sensible-utils==0.0.25 +sonic-db-cli-dbgsym==1.0.0 +sonic-eventd-dbgsym==1.0.0-0 +sshpass==1.10-0.1 +strace==6.13+ds-1 +ucf==3.0052 +vim==2:9.1.1230-2 +vim-runtime==2:9.1.1230-2 diff --git a/files/build/versions-public/dockers/docker-database/versions-py3 b/files/build/versions-public/dockers/docker-database/versions-py3 index d40fc6714a7..59f66cffda0 100644 --- a/files/build/versions-public/dockers/docker-database/versions-py3 +++ b/files/build/versions-public/dockers/docker-database/versions-py3 @@ -1 +1 @@ -click==8.3.1 +click==8.4.1 diff --git a/files/build/versions-public/dockers/docker-dhcp-relay/versions-deb-bookworm b/files/build/versions-public/dockers/docker-dhcp-relay/versions-deb-bookworm deleted file mode 100644 index 025673331fe..00000000000 --- a/files/build/versions-public/dockers/docker-dhcp-relay/versions-deb-bookworm +++ /dev/null @@ -1,106 +0,0 @@ -binutils==2.40-2 -binutils-common==2.40-2 -binutils-x86-64-linux-gnu==2.40-2 -bzip2==1.0.8-5+b1 -cpp==4:12.2.0-3 -cpp-12==12.2.0-14+deb12u1 -dpkg-dev==1.21.22 -g++==4:12.2.0-3 -g++-12==12.2.0-14+deb12u1 -gcc==4:12.2.0-3 -gcc-12==12.2.0-14+deb12u1 -gdb==13.1-3 -gdbserver==13.1-3 -isc-dhcp-relay==4.4.3-P1-2 -isc-dhcp-relay-dbgsym==4.4.3-P1-2 -libasan8==12.2.0-14+deb12u1 -libbabeltrace1==1.5.11-1+b2 -libbinutils==2.40-2 -libboost-regex1.74.0==1.74.0+ds1-21 -libc-dev-bin==2.36-9+deb12u13 -libc6-dev==2.36-9+deb12u13 -libcbor0.8==0.8.0-2+b1 -libcc1-0==12.2.0-14+deb12u1 -libcrypt-dev==1:4.4.33-2 -libctf-nobfd0==2.40-2 -libctf0==2.40-2 -libcurl3-gnutls==7.88.1-10+deb12u14 -libdbus-1-dev==1.14.10-1~deb12u1 -libdebuginfod-common==0.188-2.1 -libdebuginfod1==0.188-2.1 -libdpkg-perl==1.21.22 -libdw1==0.188-2.1 -libedit2==3.1-20221030-2 -libevent-2.1-7==2.1.12-stable-8 -libevent-core-2.1-7==2.1.12-stable-8 -libevent-pthreads-2.1-7==2.1.12-stable-8 -libexpat1-dev==2.5.0-1+deb12u2 -libexplain51==1.4.D001-12+b1 -libfido2-1==1.12.0-2+b1 -libgcc-12-dev==12.2.0-14+deb12u1 -libglib2.0-0==2.74.6-2+deb12u7 -libgomp1==12.2.0-14+deb12u1 -libgpm2==1.20.7-10+b1 -libgprofng0==2.40-2 -libicu72==72.1-3+deb12u1 -libipt2==2.0.5-1 -libisl23==0.25-1.1 -libitm1==12.2.0-14+deb12u1 -libjs-jquery==3.6.1+dfsg+~3.5.14-1 -libjs-sphinxdoc==5.3.0-4 -libjs-underscore==1.13.4~dfsg+~1.11.4-3 -libjsoncpp-dev==1.9.5-4 -libjsoncpp25==1.9.5-4 -liblsan0==12.2.0-14+deb12u1 -libmpc3==1.3.1-1 -libmpfr6==4.2.0-1 -libnsl-dev==1.3.0-2 -libpcap-dev==1.10.3-1 -libpcap0.8==1.10.3-1 -libpcap0.8-dev==1.10.3-1 -libpkgconf3==1.8.1-1 -libpython3-dev==3.11.2-1+b1 -libpython3.11-dev==3.11.2-6+deb12u6 -libquadmath0==12.2.0-14+deb12u1 -libsource-highlight-common==3.1.9-4.2 -libsource-highlight4v5==3.1.9-4.2+b3 -libssl-dev==3.0.17-1~deb12u3 -libssl3==3.0.17-1~deb12u3 -libstdc++-12-dev==12.2.0-14+deb12u1 -libswsscommon-dbgsym==1.0.0 -libtirpc-dev==1.3.3+ds-1 -libtsan2==12.2.0-14+deb12u1 -libubsan1==12.2.0-14+deb12u1 -libunwind8==1.6.2-3 -libyang-cpp-dbgsym==1.0.73 -linux-libc-dev==6.1.158-1 -lsof==4.95.0-1 -make==4.3-4.1 -openssh-client==1:9.2p1-2+deb12u7 -openssl==3.0.17-1~deb12u3 -patch==2.7.6-7 -pkg-config==1.8.1-1 -pkgconf==1.8.1-1 -pkgconf-bin==1.8.1-1 -python3-swsscommon-dbgsym==1.0.0 -python3-yang-dbgsym==1.0.73 -python3.11-dev==3.11.2-6+deb12u6 -rpcsvc-proto==1.4.3-1 -sensible-utils==0.0.17+nmu1 -sgml-base==1.31 -sonic-db-cli-dbgsym==1.0.0 -sonic-dhcp4relay==1.0.0-0 -sonic-dhcp4relay-dbgsym==1.0.0-0 -sonic-dhcp6relay==1.0.0-0 -sonic-dhcp6relay-dbgsym==1.0.0-0 -sonic-dhcpmon==1.0.0-0 -sonic-dhcpmon-dbgsym==1.0.0-0 -sonic-eventd-dbgsym==1.0.0-0 -sshpass==1.09-1+b1 -strace==6.1-0.1 -ucf==3.0043+nmu1+deb12u1 -vim==2:9.0.1378-2+deb12u2 -vim-runtime==2:9.0.1378-2+deb12u2 -xml-core==0.18+nmu1 -xz-utils==5.4.1-1 -zlib1g-dev==1:1.2.13.dfsg-1 diff --git a/files/build/versions-public/dockers/docker-dhcp-relay/versions-deb-bookworm-arm64 b/files/build/versions-public/dockers/docker-dhcp-relay/versions-deb-bookworm-arm64 deleted file mode 100644 index 435661ecfe0..00000000000 --- a/files/build/versions-public/dockers/docker-dhcp-relay/versions-deb-bookworm-arm64 +++ /dev/null @@ -1,2 +0,0 @@ -binutils-aarch64-linux-gnu==2.40-2 -libhwasan0==12.2.0-14+deb12u1 diff --git a/files/build/versions-public/dockers/docker-dhcp-relay/versions-deb-bookworm-armhf b/files/build/versions-public/dockers/docker-dhcp-relay/versions-deb-bookworm-armhf deleted file mode 100644 index 76806cf3ac6..00000000000 --- a/files/build/versions-public/dockers/docker-dhcp-relay/versions-deb-bookworm-armhf +++ /dev/null @@ -1 +0,0 @@ -binutils-arm-linux-gnueabihf==2.40-2 diff --git a/files/build/versions-public/dockers/docker-dhcp-relay/versions-deb-trixie b/files/build/versions-public/dockers/docker-dhcp-relay/versions-deb-trixie new file mode 100644 index 00000000000..8118514b58c --- /dev/null +++ b/files/build/versions-public/dockers/docker-dhcp-relay/versions-deb-trixie @@ -0,0 +1,113 @@ +binutils==2.44-3 +binutils-common==2.44-3 +binutils-x86-64-linux-gnu==2.44-3 +bzip2==1.0.8-6 +cpp==4:14.2.0-1 +cpp-14==14.2.0-19 +cpp-14-x86-64-linux-gnu==14.2.0-19 +cpp-x86-64-linux-gnu==4:14.2.0-1 +dpkg-dev==1.22.22 +g++==4:14.2.0-1 +g++-14==14.2.0-19 +g++-14-x86-64-linux-gnu==14.2.0-19 +g++-x86-64-linux-gnu==4:14.2.0-1 +gcc==4:14.2.0-1 +gcc-14==14.2.0-19 +gcc-14-x86-64-linux-gnu==14.2.0-19 +gcc-x86-64-linux-gnu==4:14.2.0-1 +gdb==16.3-1 +gdbserver==16.3-1 +isc-dhcp-relay==4.4.3-P1-2 +isc-dhcp-relay-dbgsym==4.4.3-P1-2 +libasan8==14.2.0-19 +libbabeltrace1==1.5.11-4+b2 +libbinutils==2.44-3 +libc-dev-bin==2.41-12+deb13u3 +libc6-dev==2.41-12+deb13u3 +libcap-dev==1:2.75-10+deb13u1+b1 +libcbor0.10==0.10.2-2 +libcc1-0==14.2.0-19 +libcrypt-dev==1:4.4.38-1 +libctf-nobfd0==2.44-3 +libctf0==2.44-3 +libcurl3t64-gnutls==8.14.1-2+deb13u3 +libdbus-1-dev==1.16.2-2 +libdebuginfod-common==0.192-4 +libdebuginfod1t64==0.192-4 +libdpkg-perl==1.22.22 +libdw1t64==0.192-4 +libedit2==3.1-20250104-1 +libevent-2.1-7t64==2.1.12-stable-10+b1 +libevent-core-2.1-7t64==2.1.12-stable-10+b1 +libevent-pthreads-2.1-7t64==2.1.12-stable-10+b1 +libexpat1-dev==2.7.1-2 +libexplain51t64==1.4.D001-16 +libfido2-1==1.15.0-1+b1 +libgcc-14-dev==14.2.0-19 +libglib2.0-0t64==2.84.4-3~deb13u3 +libgomp1==14.2.0-19 +libgpm2==1.20.7-11+b2 +libgprofng0==2.44-3 +libhwasan0==14.2.0-19 +libipt2==2.1.2-1 +libisl23==0.27-1 +libitm1==14.2.0-19 +libjs-jquery==3.6.1+dfsg+~3.5.14-1 +libjs-sphinxdoc==8.1.3-5 +libjs-underscore==1.13.4~dfsg+~1.11.4-3 +libjson-c5==0.18+ds-1 +libjsoncpp-dev==1.9.6-3 +libjsoncpp26==1.9.6-3 +liblsan0==14.2.0-19 +liblsof0==4.99.4+dfsg-2 +libmpc3==1.3.1-1+b3 +libmpfr6==4.2.2-1 +libngtcp2-16==1.11.0-1+deb13u1 +libngtcp2-crypto-gnutls8==1.11.0-1+deb13u1 +libpcap-dev==1.10.5-2 +libpcap0.8-dev==1.10.5-2 +libpcap0.8t64==1.10.5-2 +libpkgconf3==1.8.1-4 +libpython3-dev==3.13.5-1 +libpython3.13-dev==3.13.5-2+deb13u2 +libquadmath0==14.2.0-19 +libsframe1==2.44-3 +libsource-highlight-common==3.1.9-4.3 +libsource-highlight4t64==3.1.9-4.3+b1 +libstdc++-14-dev==14.2.0-19 +libswsscommon-dbgsym==1.0.0 +libsystemd-dev==257.13-1~deb13u1 +libtext-charwidth-perl==0.04-11+b4 +libtext-wrapi18n-perl==0.06-10 +libtsan2==14.2.0-19 +libubsan1==14.2.0-19 +libunwind8==1.8.1-0.1 +libyang3-dbgsym==3.12.2-1 +linux-libc-dev==6.12.90-2 +lsof==4.99.4+dfsg-2 +make==4.4.1-2 +openssh-client==1:10.0p1-7+fips +patch==2.8-2 +pkgconf==1.8.1-4 +pkgconf-bin==1.8.1-4 +python3-swsscommon-dbgsym==1.0.0 +python3.13-dev==3.13.5-2+deb13u2 +rpcsvc-proto==1.4.3-1 +sensible-utils==0.0.25 +sgml-base==1.31+nmu1 +sonic-db-cli-dbgsym==1.0.0 +sonic-dhcp4relay==1.0.0-0 +sonic-dhcp4relay-dbgsym==1.0.0-0 +sonic-dhcp6relay==1.0.0-0 +sonic-dhcp6relay-dbgsym==1.0.0-0 +sonic-dhcpmon==1.0.0-0 +sonic-dhcpmon-dbgsym==1.0.0-0 +sonic-eventd-dbgsym==1.0.0-0 +sshpass==1.10-0.1 +strace==6.13+ds-1 +ucf==3.0052 +vim==2:9.1.1230-2 +vim-runtime==2:9.1.1230-2 +xml-core==0.19 +xz-utils==5.8.1-1 +zlib1g-dev==1:1.3.dfsg+really1.3.1-1+b1 diff --git a/files/build/versions-public/dockers/docker-dhcp-relay/versions-deb-trixie-arm64 b/files/build/versions-public/dockers/docker-dhcp-relay/versions-deb-trixie-arm64 new file mode 100644 index 00000000000..3f06c39060d --- /dev/null +++ b/files/build/versions-public/dockers/docker-dhcp-relay/versions-deb-trixie-arm64 @@ -0,0 +1,7 @@ +binutils-aarch64-linux-gnu==2.44-3 +cpp-14-aarch64-linux-gnu==14.2.0-19 +cpp-aarch64-linux-gnu==4:14.2.0-1 +g++-14-aarch64-linux-gnu==14.2.0-19 +g++-aarch64-linux-gnu==4:14.2.0-1 +gcc-14-aarch64-linux-gnu==14.2.0-19 +gcc-aarch64-linux-gnu==4:14.2.0-1 diff --git a/files/build/versions-public/dockers/docker-dhcp-relay/versions-deb-trixie-armhf b/files/build/versions-public/dockers/docker-dhcp-relay/versions-deb-trixie-armhf new file mode 100644 index 00000000000..3f0b4b163a6 --- /dev/null +++ b/files/build/versions-public/dockers/docker-dhcp-relay/versions-deb-trixie-armhf @@ -0,0 +1,7 @@ +binutils-arm-linux-gnueabihf==2.44-3 +cpp-14-arm-linux-gnueabihf==14.2.0-19 +cpp-arm-linux-gnueabihf==4:14.2.0-1 +g++-14-arm-linux-gnueabihf==14.2.0-19 +g++-arm-linux-gnueabihf==4:14.2.0-1 +gcc-14-arm-linux-gnueabihf==14.2.0-19 +gcc-arm-linux-gnueabihf==4:14.2.0-1 diff --git a/files/build/versions-public/dockers/docker-dhcp-relay/versions-py3 b/files/build/versions-public/dockers/docker-dhcp-relay/versions-py3 index 14a28e75c51..dc4b322e960 100644 --- a/files/build/versions-public/dockers/docker-dhcp-relay/versions-py3 +++ b/files/build/versions-public/dockers/docker-dhcp-relay/versions-py3 @@ -1,3 +1,4 @@ freezegun==1.5.5 -psutil==7.1.3 +psutil==7.2.2 python-dateutil==2.9.0.post0 +six==1.17.0 diff --git a/files/build/versions-public/dockers/docker-dhcp-server/versions-deb-bookworm b/files/build/versions-public/dockers/docker-dhcp-server/versions-deb-bookworm index 0957537cd11..631059b6417 100644 --- a/files/build/versions-public/dockers/docker-dhcp-server/versions-deb-bookworm +++ b/files/build/versions-public/dockers/docker-dhcp-server/versions-deb-bookworm @@ -33,7 +33,7 @@ libedit2==3.1-20221030-2 libexpat1-dev==2.5.0-1+deb12u2 libfido2-1==1.12.0-2+b1 libgcc-12-dev==12.2.0-14+deb12u1 -libglib2.0-0==2.74.6-2+deb12u7 +libglib2.0-0==2.74.6-2+deb12u8 libgomp1==12.2.0-14+deb12u1 libgpm2==1.20.7-10+b1 libgprofng0==2.40-2 @@ -51,14 +51,14 @@ libmpc3==1.3.1-1 libmpfr6==4.2.0-1 libnsl-dev==1.3.0-2 libpcap0.8==1.10.3-1 -libpq5==15.14-0+deb12u1 +libpq5==15.16-0+deb12u1 libpython3-dev==3.11.2-1+b1 libpython3.11-dev==3.11.2-6+deb12u6 libquadmath0==12.2.0-14+deb12u1 libsource-highlight-common==3.1.9-4.2 libsource-highlight4v5==3.1.9-4.2+b3 -libssl-dev==3.0.17-1~deb12u3 -libssl3==3.0.17-1~deb12u3 +libssl-dev==3.0.18-1~deb12u2 +libssl3==3.0.18-1~deb12u2 libstdc++-12-dev==12.2.0-14+deb12u1 libswsscommon-dbgsym==1.0.0 libtirpc-dev==1.3.3+ds-1 @@ -66,12 +66,12 @@ libtsan2==12.2.0-14+deb12u1 libubsan1==12.2.0-14+deb12u1 libunwind8==1.6.2-3 libyang-cpp-dbgsym==1.0.73 -linux-libc-dev==6.1.158-1 +linux-libc-dev==6.1.164-1 make==4.3-4.1 mariadb-common==1:10.11.14-0+deb12u2 mysql-common==5.8+1.1.0 -openssh-client==1:9.2p1-2+deb12u7 -openssl==3.0.17-1~deb12u3 +openssh-client==1:9.2p1-2+deb12u5+fips +openssl==3.0.18-1~deb12u2 patch==2.7.6-7 python3-swsscommon-dbgsym==1.0.0 python3-yang-dbgsym==1.0.73 diff --git a/files/build/versions-public/dockers/docker-dhcp-server/versions-deb-trixie b/files/build/versions-public/dockers/docker-dhcp-server/versions-deb-trixie new file mode 100644 index 00000000000..b613ba6f4ce --- /dev/null +++ b/files/build/versions-public/dockers/docker-dhcp-server/versions-deb-trixie @@ -0,0 +1,99 @@ +binutils==2.44-3 +binutils-common==2.44-3 +binutils-x86-64-linux-gnu==2.44-3 +bzip2==1.0.8-6 +cpp==4:14.2.0-1 +cpp-14==14.2.0-19 +cpp-14-x86-64-linux-gnu==14.2.0-19 +cpp-x86-64-linux-gnu==4:14.2.0-1 +dpkg-dev==1.22.22 +g++==4:14.2.0-1 +g++-14==14.2.0-19 +g++-14-x86-64-linux-gnu==14.2.0-19 +g++-x86-64-linux-gnu==4:14.2.0-1 +gcc==4:14.2.0-1 +gcc-14==14.2.0-19 +gcc-14-x86-64-linux-gnu==14.2.0-19 +gcc-x86-64-linux-gnu==4:14.2.0-1 +gdb==16.3-1 +gdbserver==16.3-1 +kea-common==2.6.3-1 +kea-dhcp4-server==2.6.3-1 +libasan8==14.2.0-19 +libbabeltrace1==1.5.11-4+b2 +libbinutils==2.44-3 +libc-dev-bin==2.41-12+deb13u3 +libc6-dev==2.41-12+deb13u3 +libcbor0.10==0.10.2-2 +libcc1-0==14.2.0-19 +libcrypt-dev==1:4.4.38-1 +libctf-nobfd0==2.44-3 +libctf0==2.44-3 +libcurl3t64-gnutls==8.14.1-2+deb13u3 +libdebuginfod-common==0.192-4 +libdebuginfod1t64==0.192-4 +libdpkg-perl==1.22.22 +libdw1t64==0.192-4 +libedit2==3.1-20250104-1 +libexpat1-dev==2.7.1-2 +libfido2-1==1.15.0-1+b1 +libgcc-14-dev==14.2.0-19 +libglib2.0-0t64==2.84.4-3~deb13u3 +libgomp1==14.2.0-19 +libgpm2==1.20.7-11+b2 +libgprofng0==2.44-3 +libhwasan0==14.2.0-19 +libipt2==2.1.2-1 +libisl23==0.27-1 +libitm1==14.2.0-19 +libjs-jquery==3.6.1+dfsg+~3.5.14-1 +libjs-sphinxdoc==8.1.3-5 +libjs-underscore==1.13.4~dfsg+~1.11.4-3 +libjson-c5==0.18+ds-1 +liblog4cplus-2.0.5t64==2.0.8-1.1+b2 +liblsan0==14.2.0-19 +libmariadb3==1:11.8.6-0+deb13u1 +libmpc3==1.3.1-1+b3 +libmpfr6==4.2.2-1 +libngtcp2-16==1.11.0-1+deb13u1 +libngtcp2-crypto-gnutls8==1.11.0-1+deb13u1 +libpcap0.8t64==1.10.5-2 +libpq5==17.10-0+deb13u1 +libpython3-dev==3.13.5-1 +libpython3.13-dev==3.13.5-2+deb13u2 +libquadmath0==14.2.0-19 +libsframe1==2.44-3 +libsource-highlight-common==3.1.9-4.3 +libsource-highlight4t64==3.1.9-4.3+b1 +libstdc++-14-dev==14.2.0-19 +libswsscommon-dbgsym==1.0.0 +libsystemd0==257.13-1~deb13u1 +libtext-charwidth-perl==0.04-11+b4 +libtext-wrapi18n-perl==0.06-10 +libtsan2==14.2.0-19 +libubsan1==14.2.0-19 +libudev1==257.13-1~deb13u1 +libunwind8==1.8.1-0.1 +libyang-cpp-dbgsym==1.0.73 +libyang3-dbgsym==3.12.2-1 +linux-libc-dev==6.12.90-2 +make==4.4.1-2 +mariadb-common==1:11.8.6-0+deb13u1 +mysql-common==5.8+1.1.1 +openssh-client==1:10.0p1-7+fips +patch==2.8-2 +python3-swsscommon-dbgsym==1.0.0 +python3-yang-dbgsym==1.0.73 +python3.13-dev==3.13.5-2+deb13u2 +rpcsvc-proto==1.4.3-1 +sensible-utils==0.0.25 +sonic-db-cli-dbgsym==1.0.0 +sonic-eventd-dbgsym==1.0.0-0 +sshpass==1.10-0.1 +strace==6.13+ds-1 +tcpdump==4.99.5-2 +ucf==3.0052 +vim==2:9.1.1230-2 +vim-runtime==2:9.1.1230-2 +xz-utils==5.8.1-1 +zlib1g-dev==1:1.3.dfsg+really1.3.1-1+b1 diff --git a/files/build/versions-public/dockers/docker-dhcp-server/versions-py3 b/files/build/versions-public/dockers/docker-dhcp-server/versions-py3 index 14a28e75c51..dc4b322e960 100644 --- a/files/build/versions-public/dockers/docker-dhcp-server/versions-py3 +++ b/files/build/versions-public/dockers/docker-dhcp-server/versions-py3 @@ -1,3 +1,4 @@ freezegun==1.5.5 -psutil==7.1.3 +psutil==7.2.2 python-dateutil==2.9.0.post0 +six==1.17.0 diff --git a/files/build/versions-public/dockers/docker-eventd/versions-deb-bookworm b/files/build/versions-public/dockers/docker-eventd/versions-deb-bookworm deleted file mode 100644 index b25ce1417ad..00000000000 --- a/files/build/versions-public/dockers/docker-eventd/versions-deb-bookworm +++ /dev/null @@ -1,35 +0,0 @@ -gdb==13.1-3 -gdbserver==13.1-3 -libbabeltrace1==1.5.11-1+b2 -libboost-regex1.74.0==1.74.0+ds1-21 -libcbor0.8==0.8.0-2+b1 -libcurl3-gnutls==7.88.1-10+deb12u14 -libdebuginfod-common==0.188-2.1 -libdebuginfod1==0.188-2.1 -libdw1==0.188-2.1 -libedit2==3.1-20221030-2 -libfido2-1==1.12.0-2+b1 -libglib2.0-0==2.74.6-2+deb12u7 -libgpm2==1.20.7-10+b1 -libicu72==72.1-3+deb12u1 -libipt2==2.0.5-1 -libmpfr6==4.2.0-1 -libsource-highlight-common==3.1.9-4.2 -libsource-highlight4v5==3.1.9-4.2+b3 -libssl-dev==3.0.17-1~deb12u3 -libssl3==3.0.17-1~deb12u3 -libswsscommon-dbgsym==1.0.0 -libunwind8==1.6.2-3 -libyang-cpp-dbgsym==1.0.73 -openssh-client==1:9.2p1-2+deb12u7 -openssl==3.0.17-1~deb12u3 -python3-swsscommon-dbgsym==1.0.0 -python3-yang-dbgsym==1.0.73 -sensible-utils==0.0.17+nmu1 -sonic-db-cli-dbgsym==1.0.0 -sonic-eventd-dbgsym==1.0.0-0 -sshpass==1.09-1+b1 -strace==6.1-0.1 -ucf==3.0043+nmu1+deb12u1 -vim==2:9.0.1378-2+deb12u2 -vim-runtime==2:9.0.1378-2+deb12u2 diff --git a/files/build/versions-public/dockers/docker-eventd/versions-deb-trixie b/files/build/versions-public/dockers/docker-eventd/versions-deb-trixie new file mode 100644 index 00000000000..1a2c4dbb546 --- /dev/null +++ b/files/build/versions-public/dockers/docker-eventd/versions-deb-trixie @@ -0,0 +1,34 @@ +gdb==16.3-1 +gdbserver==16.3-1 +libbabeltrace1==1.5.11-4+b2 +libcbor0.10==0.10.2-2 +libcurl3t64-gnutls==8.14.1-2+deb13u3 +libdebuginfod-common==0.192-4 +libdebuginfod1t64==0.192-4 +libdw1t64==0.192-4 +libedit2==3.1-20250104-1 +libfido2-1==1.15.0-1+b1 +libglib2.0-0t64==2.84.4-3~deb13u3 +libgpm2==1.20.7-11+b2 +libipt2==2.1.2-1 +libjson-c5==0.18+ds-1 +libmpfr6==4.2.2-1 +libngtcp2-16==1.11.0-1+deb13u1 +libngtcp2-crypto-gnutls8==1.11.0-1+deb13u1 +libsource-highlight-common==3.1.9-4.3 +libsource-highlight4t64==3.1.9-4.3+b1 +libswsscommon-dbgsym==1.0.0 +libtext-charwidth-perl==0.04-11+b4 +libtext-wrapi18n-perl==0.06-10 +libunwind8==1.8.1-0.1 +libyang3-dbgsym==3.12.2-1 +openssh-client==1:10.0p1-7+fips +python3-swsscommon-dbgsym==1.0.0 +sensible-utils==0.0.25 +sonic-db-cli-dbgsym==1.0.0 +sonic-eventd-dbgsym==1.0.0-0 +sshpass==1.10-0.1 +strace==6.13+ds-1 +ucf==3.0052 +vim==2:9.1.1230-2 +vim-runtime==2:9.1.1230-2 diff --git a/files/build/versions-public/dockers/docker-fpm-frr/versions-deb-bookworm b/files/build/versions-public/dockers/docker-fpm-frr/versions-deb-bookworm deleted file mode 100644 index 757d38c9a37..00000000000 --- a/files/build/versions-public/dockers/docker-fpm-frr/versions-deb-bookworm +++ /dev/null @@ -1,55 +0,0 @@ -cron==3.0pl1-162 -cron-daemon-common==3.0pl1-162 -frr==10.4.1-sonic-0 -frr-dbgsym==10.4.1-sonic-0 -frr-snmp==10.4.1-sonic-0 -frr-snmp-dbgsym==10.4.1-sonic-0 -gdb==13.1-3 -gdbserver==13.1-3 -libbabeltrace1==1.5.11-1+b2 -libboost-regex1.74.0==1.74.0+ds1-21 -libc-ares2==1.18.1-3 -libcbor0.8==0.8.0-2+b1 -libcurl3-gnutls==7.88.1-10+deb12u14 -libdebuginfod-common==0.188-2.1 -libdebuginfod1==0.188-2.1 -libdw1==0.188-2.1 -libedit2==3.1-20221030-2 -libfido2-1==1.12.0-2+b1 -libglib2.0-0==2.74.6-2+deb12u7 -libgpm2==1.20.7-10+b1 -libicu72==72.1-3+deb12u1 -libipt2==2.0.5-1 -libjson-c5==0.16-2 -libmpfr6==4.2.0-1 -libpci3==1:3.9.0-4 -libpcre2-posix3==10.42-1 -libsensors-config==1:3.6.0-7.1 -libsensors5==1:3.6.0-7.1 -libsnmp-base==5.9.3+dfsg-2 -libsnmp40==5.9.3+dfsg-2 -libsource-highlight-common==3.1.9-4.2 -libsource-highlight4v5==3.1.9-4.2+b3 -libssl-dev==3.0.17-1~deb12u3 -libssl3==3.0.17-1~deb12u3 -libswsscommon-dbgsym==1.0.0 -libunwind8==1.6.2-3 -libyang-cpp-dbgsym==1.0.73 -libyang3==3.12.2-1 -libyang3-dbgsym==3.12.2-1 -logrotate==3.21.0-1 -lsof==4.95.0-1 -openssh-client==1:9.2p1-2+deb12u7 -openssl==3.0.17-1~deb12u3 -pci.ids==0.0~2023.04.11-1 -python3-swsscommon-dbgsym==1.0.0 -python3-yang-dbgsym==1.0.73 -sensible-utils==0.0.17+nmu1 -sonic-db-cli-dbgsym==1.0.0 -sonic-eventd-dbgsym==1.0.0-0 -sshpass==1.09-1+b1 -strace==6.1-0.1 -swss-dbg==1.0.0 -ucf==3.0043+nmu1+deb12u1 -vim==2:9.0.1378-2+deb12u2 -vim-runtime==2:9.0.1378-2+deb12u2 diff --git a/files/build/versions-public/dockers/docker-fpm-frr/versions-deb-trixie b/files/build/versions-public/dockers/docker-fpm-frr/versions-deb-trixie new file mode 100644 index 00000000000..787f467b644 --- /dev/null +++ b/files/build/versions-public/dockers/docker-fpm-frr/versions-deb-trixie @@ -0,0 +1,57 @@ +cron==3.0pl1-197 +cron-daemon-common==3.0pl1-197 +frr==10.5.4-sonic-0 +frr-dbgsym==10.5.4-sonic-0 +frr-snmp==10.5.4-sonic-0 +frr-snmp-dbgsym==10.5.4-sonic-0 +gdb==16.3-1 +gdbserver==16.3-1 +libapparmor1==4.1.0-1 +libbabeltrace1==1.5.11-4+b2 +libcares2==1.34.5-1+deb13u1 +libcbor0.10==0.10.2-2 +libcurl3t64-gnutls==8.14.1-2+deb13u3 +libdebuginfod-common==0.192-4 +libdebuginfod1t64==0.192-4 +libdw1t64==0.192-4 +libedit2==3.1-20250104-1 +libfido2-1==1.15.0-1+b1 +libglib2.0-0t64==2.84.4-3~deb13u3 +libgoogle-perftools4t64==2.16-1 +libgpm2==1.20.7-11+b2 +libipt2==2.1.2-1 +libjson-c5==0.18+ds-1 +liblsof0==4.99.4+dfsg-2 +libmpfr6==4.2.2-1 +libngtcp2-16==1.11.0-1+deb13u1 +libngtcp2-crypto-gnutls8==1.11.0-1+deb13u1 +libpci3==1:3.13.0-2 +libpcre2-posix3==10.46-1~deb13u1 +libsensors-config==1:3.6.2-2 +libsensors5==1:3.6.2-2 +libsnmp-base==5.9.4+dfsg-2+deb13u1 +libsnmp40t64==5.9.4+dfsg-2+deb13u1 +libsource-highlight-common==3.1.9-4.3 +libsource-highlight4t64==3.1.9-4.3+b1 +libswsscommon-dbgsym==1.0.0 +libsystemd-shared==257.13-1~deb13u1 +libtcmalloc-minimal4t64==2.16-1 +libtext-charwidth-perl==0.04-11+b4 +libtext-wrapi18n-perl==0.06-10 +libunwind8==1.8.1-0.1 +libyang3-dbgsym==3.12.2-1 +logrotate==3.22.0-1 +lsof==4.99.4+dfsg-2 +openssh-client==1:10.0p1-7+fips +pci.ids==0.0~2025.06.09-1 +python3-swsscommon-dbgsym==1.0.0 +sensible-utils==0.0.25 +sonic-db-cli-dbgsym==1.0.0 +sonic-eventd-dbgsym==1.0.0-0 +sshpass==1.10-0.1 +strace==6.13+ds-1 +swss-dbg==1.0.0 +systemd==257.13-1~deb13u1 +ucf==3.0052 +vim==2:9.1.1230-2 +vim-runtime==2:9.1.1230-2 diff --git a/files/build/versions-public/dockers/docker-fpm-frr/versions-deb-trixie-arm64 b/files/build/versions-public/dockers/docker-fpm-frr/versions-deb-trixie-arm64 new file mode 100644 index 00000000000..be0bbd0e89c --- /dev/null +++ b/files/build/versions-public/dockers/docker-fpm-frr/versions-deb-trixie-arm64 @@ -0,0 +1 @@ +logrotate==3.22.0-1+b2 diff --git a/files/build/versions-public/dockers/docker-fpm-frr/versions-py3 b/files/build/versions-public/dockers/docker-fpm-frr/versions-py3 deleted file mode 100644 index 8b6fbe16b81..00000000000 --- a/files/build/versions-public/dockers/docker-fpm-frr/versions-py3 +++ /dev/null @@ -1,2 +0,0 @@ -pyyaml==6.0.1 -zipp==1.2.0 diff --git a/files/build/versions-public/dockers/docker-gbsyncd-agera2/versions-deb-bookworm b/files/build/versions-public/dockers/docker-gbsyncd-agera2/versions-deb-bookworm deleted file mode 100644 index 600f3159bb3..00000000000 --- a/files/build/versions-public/dockers/docker-gbsyncd-agera2/versions-deb-bookworm +++ /dev/null @@ -1,50 +0,0 @@ -gdb==13.1-3 -gdbserver==13.1-3 -libbabeltrace1==1.5.11-1+b2 -libboost-regex1.74.0==1.74.0+ds1-21 -libc-dev-bin==2.36-9+deb12u13 -libc6-dev==2.36-9+deb12u13 -libcbor0.8==0.8.0-2+b1 -libcrypt-dev==1:4.4.33-2 -libcurl3-gnutls==7.88.1-10+deb12u14 -libdebuginfod-common==0.188-2.1 -libdebuginfod1==0.188-2.1 -libdw1==0.188-2.1 -libedit2==3.1-20221030-2 -libfido2-1==1.12.0-2+b1 -libglib2.0-0==2.74.6-2+deb12u7 -libgpm2==1.20.7-10+b1 -libicu72==72.1-3+deb12u1 -libipt2==2.0.5-1 -libmpfr6==4.2.0-1 -libnsl-dev==1.3.0-2 -libprotobuf-dev==3.21.12-3 -libprotobuf-lite32==3.21.12-3 -libprotobuf32==3.21.12-3 -libsaiagera2==3.14.0-1 -libsaimetadata==1.0.0 -libsairedis==1.0.0 -libsource-highlight-common==3.1.9-4.2 -libsource-highlight4v5==3.1.9-4.2+b3 -libssl-dev==3.0.17-1~deb12u3 -libssl3==3.0.17-1~deb12u3 -libswsscommon-dbgsym==1.0.0 -libtirpc-dev==1.3.3+ds-1 -libunwind8==1.6.2-3 -libyang-cpp-dbgsym==1.0.73 -linux-libc-dev==6.1.158-1 -openssh-client==1:9.2p1-2+deb12u7 -openssl==3.0.17-1~deb12u3 -python3-swsscommon-dbgsym==1.0.0 -python3-yang-dbgsym==1.0.73 -rpcsvc-proto==1.4.3-1 -sensible-utils==0.0.17+nmu1 -sonic-db-cli-dbgsym==1.0.0 -sonic-eventd-dbgsym==1.0.0-0 -sshpass==1.09-1+b1 -strace==6.1-0.1 -syncd==1.0.0 -ucf==3.0043+nmu1+deb12u1 -vim==2:9.0.1378-2+deb12u2 -vim-runtime==2:9.0.1378-2+deb12u2 -zlib1g-dev==1:1.2.13.dfsg-1 diff --git a/files/build/versions-public/dockers/docker-gbsyncd-agera2/versions-deb-trixie b/files/build/versions-public/dockers/docker-gbsyncd-agera2/versions-deb-trixie new file mode 100644 index 00000000000..ce5711b9f9a --- /dev/null +++ b/files/build/versions-public/dockers/docker-gbsyncd-agera2/versions-deb-trixie @@ -0,0 +1,48 @@ +gdb==16.3-1 +gdbserver==16.3-1 +libbabeltrace1==1.5.11-4+b2 +libc-dev-bin==2.41-12+deb13u3 +libc6-dev==2.41-12+deb13u3 +libcbor0.10==0.10.2-2 +libcrypt-dev==1:4.4.38-1 +libcurl3t64-gnutls==8.14.1-2+deb13u3 +libdebuginfod-common==0.192-4 +libdebuginfod1t64==0.192-4 +libdw1t64==0.192-4 +libedit2==3.1-20250104-1 +libfido2-1==1.15.0-1+b1 +libglib2.0-0t64==2.84.4-3~deb13u3 +libgpm2==1.20.7-11+b2 +libipt2==2.1.2-1 +libjson-c5==0.18+ds-1 +libmpfr6==4.2.2-1 +libngtcp2-16==1.11.0-1+deb13u1 +libngtcp2-crypto-gnutls8==1.11.0-1+deb13u1 +libprotobuf-dev==3.21.12-11 +libprotobuf-lite32t64==3.21.12-11 +libprotobuf32t64==3.21.12-11 +libsaiagera2==3.14.0-4 +libsaimetadata==1.0.0 +libsairedis==1.0.0 +libsource-highlight-common==3.1.9-4.3 +libsource-highlight4t64==3.1.9-4.3+b1 +libswsscommon-dbgsym==1.0.0 +libtext-charwidth-perl==0.04-11+b4 +libtext-wrapi18n-perl==0.06-10 +libunwind8==1.8.1-0.1 +libyang3-dbgsym==3.12.2-1 +linux-libc-dev==6.12.90-2 +openssh-client==1:10.0p1-7+fips +python3-swsscommon-dbgsym==1.0.0 +rpcsvc-proto==1.4.3-1 +sensible-utils==0.0.25 +sonic-db-cli-dbgsym==1.0.0 +sonic-eventd-dbgsym==1.0.0-0 +sshpass==1.10-0.1 +sswsyncd==1.0.0 +strace==6.13+ds-1 +syncd==1.0.0 +ucf==3.0052 +vim==2:9.1.1230-2 +vim-runtime==2:9.1.1230-2 +zlib1g-dev==1:1.3.dfsg+really1.3.1-1+b1 diff --git a/files/build/versions-public/dockers/docker-gbsyncd-broncos/versions-deb-bookworm b/files/build/versions-public/dockers/docker-gbsyncd-broncos/versions-deb-bookworm deleted file mode 100644 index 741b191af4d..00000000000 --- a/files/build/versions-public/dockers/docker-gbsyncd-broncos/versions-deb-bookworm +++ /dev/null @@ -1,50 +0,0 @@ -gdb==13.1-3 -gdbserver==13.1-3 -libbabeltrace1==1.5.11-1+b2 -libboost-regex1.74.0==1.74.0+ds1-21 -libc-dev-bin==2.36-9+deb12u13 -libc6-dev==2.36-9+deb12u13 -libcbor0.8==0.8.0-2+b1 -libcrypt-dev==1:4.4.33-2 -libcurl3-gnutls==7.88.1-10+deb12u14 -libdebuginfod-common==0.188-2.1 -libdebuginfod1==0.188-2.1 -libdw1==0.188-2.1 -libedit2==3.1-20221030-2 -libfido2-1==1.12.0-2+b1 -libglib2.0-0==2.74.6-2+deb12u7 -libgpm2==1.20.7-10+b1 -libicu72==72.1-3+deb12u1 -libipt2==2.0.5-1 -libmpfr6==4.2.0-1 -libnsl-dev==1.3.0-2 -libprotobuf-dev==3.21.12-3 -libprotobuf-lite32==3.21.12-3 -libprotobuf32==3.21.12-3 -libsaibroncos==3.12 -libsaimetadata==1.0.0 -libsairedis==1.0.0 -libsource-highlight-common==3.1.9-4.2 -libsource-highlight4v5==3.1.9-4.2+b3 -libssl-dev==3.0.17-1~deb12u3 -libssl3==3.0.17-1~deb12u3 -libswsscommon-dbgsym==1.0.0 -libtirpc-dev==1.3.3+ds-1 -libunwind8==1.6.2-3 -libyang-cpp-dbgsym==1.0.73 -linux-libc-dev==6.1.158-1 -openssh-client==1:9.2p1-2+deb12u7 -openssl==3.0.17-1~deb12u3 -python3-swsscommon-dbgsym==1.0.0 -python3-yang-dbgsym==1.0.73 -rpcsvc-proto==1.4.3-1 -sensible-utils==0.0.17+nmu1 -sonic-db-cli-dbgsym==1.0.0 -sonic-eventd-dbgsym==1.0.0-0 -sshpass==1.09-1+b1 -strace==6.1-0.1 -syncd==1.0.0 -ucf==3.0043+nmu1+deb12u1 -vim==2:9.0.1378-2+deb12u2 -vim-runtime==2:9.0.1378-2+deb12u2 -zlib1g-dev==1:1.2.13.dfsg-1 diff --git a/files/build/versions-public/dockers/docker-gbsyncd-broncos/versions-deb-trixie b/files/build/versions-public/dockers/docker-gbsyncd-broncos/versions-deb-trixie new file mode 100644 index 00000000000..98c8e5426bf --- /dev/null +++ b/files/build/versions-public/dockers/docker-gbsyncd-broncos/versions-deb-trixie @@ -0,0 +1,48 @@ +gdb==16.3-1 +gdbserver==16.3-1 +libbabeltrace1==1.5.11-4+b2 +libc-dev-bin==2.41-12+deb13u3 +libc6-dev==2.41-12+deb13u3 +libcbor0.10==0.10.2-2 +libcrypt-dev==1:4.4.38-1 +libcurl3t64-gnutls==8.14.1-2+deb13u3 +libdebuginfod-common==0.192-4 +libdebuginfod1t64==0.192-4 +libdw1t64==0.192-4 +libedit2==3.1-20250104-1 +libfido2-1==1.15.0-1+b1 +libglib2.0-0t64==2.84.4-3~deb13u3 +libgpm2==1.20.7-11+b2 +libipt2==2.1.2-1 +libjson-c5==0.18+ds-1 +libmpfr6==4.2.2-1 +libngtcp2-16==1.11.0-1+deb13u1 +libngtcp2-crypto-gnutls8==1.11.0-1+deb13u1 +libprotobuf-dev==3.21.12-11 +libprotobuf-lite32t64==3.21.12-11 +libprotobuf32t64==3.21.12-11 +libsaibroncos==3.12 +libsaimetadata==1.0.0 +libsairedis==1.0.0 +libsource-highlight-common==3.1.9-4.3 +libsource-highlight4t64==3.1.9-4.3+b1 +libswsscommon-dbgsym==1.0.0 +libtext-charwidth-perl==0.04-11+b4 +libtext-wrapi18n-perl==0.06-10 +libunwind8==1.8.1-0.1 +libyang3-dbgsym==3.12.2-1 +linux-libc-dev==6.12.90-2 +openssh-client==1:10.0p1-7+fips +python3-swsscommon-dbgsym==1.0.0 +rpcsvc-proto==1.4.3-1 +sensible-utils==0.0.25 +sonic-db-cli-dbgsym==1.0.0 +sonic-eventd-dbgsym==1.0.0-0 +sshpass==1.10-0.1 +sswsyncd==1.0.0 +strace==6.13+ds-1 +syncd==1.0.0 +ucf==3.0052 +vim==2:9.1.1230-2 +vim-runtime==2:9.1.1230-2 +zlib1g-dev==1:1.3.dfsg+really1.3.1-1+b1 diff --git a/files/build/versions-public/dockers/docker-gbsyncd-credo/versions-deb-bookworm b/files/build/versions-public/dockers/docker-gbsyncd-credo/versions-deb-bookworm deleted file mode 100644 index 616c05221a5..00000000000 --- a/files/build/versions-public/dockers/docker-gbsyncd-credo/versions-deb-bookworm +++ /dev/null @@ -1,41 +0,0 @@ -gdb==13.1-3 -gdbserver==13.1-3 -libbabeltrace1==1.5.11-1+b2 -libboost-regex1.74.0==1.74.0+ds1-21 -libcbor0.8==0.8.0-2+b1 -libcurl3-gnutls==7.88.1-10+deb12u14 -libdebuginfod-common==0.188-2.1 -libdebuginfod1==0.188-2.1 -libdw1==0.188-2.1 -libedit2==3.1-20221030-2 -libfido2-1==1.12.0-2+b1 -libglib2.0-0==2.74.6-2+deb12u7 -libgpm2==1.20.7-10+b1 -libicu72==72.1-3+deb12u1 -libipt2==2.0.5-1 -libmpfr6==4.2.0-1 -libsaicredo==0.9.9 -libsaicredo-blackhawk==0.9.9 -libsaicredo-owl==0.9.9 -libsaimetadata==1.0.0 -libsairedis==1.0.0 -libsource-highlight-common==3.1.9-4.2 -libsource-highlight4v5==3.1.9-4.2+b3 -libssl-dev==3.0.17-1~deb12u3 -libssl3==3.0.17-1~deb12u3 -libswsscommon-dbgsym==1.0.0 -libunwind8==1.6.2-3 -libyang-cpp-dbgsym==1.0.73 -openssh-client==1:9.2p1-2+deb12u7 -openssl==3.0.17-1~deb12u3 -python3-swsscommon-dbgsym==1.0.0 -python3-yang-dbgsym==1.0.73 -sensible-utils==0.0.17+nmu1 -sonic-db-cli-dbgsym==1.0.0 -sonic-eventd-dbgsym==1.0.0-0 -sshpass==1.09-1+b1 -strace==6.1-0.1 -syncd==1.0.0 -ucf==3.0043+nmu1+deb12u1 -vim==2:9.0.1378-2+deb12u2 -vim-runtime==2:9.0.1378-2+deb12u2 diff --git a/files/build/versions-public/dockers/docker-gbsyncd-credo/versions-deb-trixie b/files/build/versions-public/dockers/docker-gbsyncd-credo/versions-deb-trixie new file mode 100644 index 00000000000..bda53a6308c --- /dev/null +++ b/files/build/versions-public/dockers/docker-gbsyncd-credo/versions-deb-trixie @@ -0,0 +1,41 @@ +gdb==16.3-1 +gdbserver==16.3-1 +libbabeltrace1==1.5.11-4+b2 +libcbor0.10==0.10.2-2 +libcurl3t64-gnutls==8.14.1-2+deb13u3 +libdebuginfod-common==0.192-4 +libdebuginfod1t64==0.192-4 +libdw1t64==0.192-4 +libedit2==3.1-20250104-1 +libfido2-1==1.15.0-1+b1 +libglib2.0-0t64==2.84.4-3~deb13u3 +libgpm2==1.20.7-11+b2 +libipt2==2.1.2-1 +libjson-c5==0.18+ds-1 +libmpfr6==4.2.2-1 +libngtcp2-16==1.11.0-1+deb13u1 +libngtcp2-crypto-gnutls8==1.11.0-1+deb13u1 +libsaimetadata==1.0.0 +libsairedis==1.0.0 +libsource-highlight-common==3.1.9-4.3 +libsource-highlight4t64==3.1.9-4.3+b1 +libswsscommon-dbgsym==1.0.0 +libtext-charwidth-perl==0.04-11+b4 +libtext-wrapi18n-perl==0.06-10 +libunwind8==1.8.1-0.1 +libyang3-dbgsym==3.12.2-1 +openssh-client==1:10.0p1-7+fips +python3-swsscommon-dbgsym==1.0.0 +saicredo-blackhawk==1.2.10 +saicredo-crt88322==1.2.10 +saicredo-owl==1.2.10 +saicredo-saicredo==1.2.10 +sensible-utils==0.0.25 +sonic-db-cli-dbgsym==1.0.0 +sonic-eventd-dbgsym==1.0.0-0 +sshpass==1.10-0.1 +strace==6.13+ds-1 +syncd==1.0.0 +ucf==3.0052 +vim==2:9.1.1230-2 +vim-runtime==2:9.1.1230-2 diff --git a/files/build/versions-public/dockers/docker-gbsyncd-vs/versions-deb-bookworm b/files/build/versions-public/dockers/docker-gbsyncd-vs/versions-deb-bookworm index 1abd9b09844..0b9e8aba203 100644 --- a/files/build/versions-public/dockers/docker-gbsyncd-vs/versions-deb-bookworm +++ b/files/build/versions-public/dockers/docker-gbsyncd-vs/versions-deb-bookworm @@ -93,8 +93,8 @@ libboost1.83-tools-dev==1.83.0-4.2~bpo12+1 libbpf-dev==1:1.1.2-0+deb12u1 libc-ares-dev==1.18.1-3 libc-ares2==1.18.1-3 -libc-dev-bin==2.36-9+deb12u13 -libc6-dev==2.36-9+deb12u13 +libc-dev-bin==2.36-9+deb12u14 +libc6-dev==2.36-9+deb12u14 libcbor0.8==0.8.0-2+b1 libcc1-0==12.2.0-14+deb12u1 libclang-common-14-dev==1:14.0.6-12 @@ -128,7 +128,7 @@ libgc1==1:8.2.2-3 libgcc-12-dev==12.2.0-14+deb12u1 libgfortran-12-dev==12.2.0-14+deb12u1 libgfortran5==12.2.0-14+deb12u1 -libglib2.0-0==2.74.6-2+deb12u7 +libglib2.0-0==2.74.6-2+deb12u9 libgmp-dev==2:6.2.1+dfsg1-1.1 libgmpxx4ldbl==2:6.2.1+dfsg1-1.1 libgomp1==12.2.0-14+deb12u1 @@ -160,14 +160,14 @@ libmagic-mgc==1:5.44-3 libmagic1==1:5.44-3 libmpc3==1.3.1-1 libmpfr6==4.2.0-1 -libmunge2==0.5.15-2 +libmunge2==0.5.15-2+deb12u1 libnanomsg-dev==1.1.5+dfsg-1.1+b1 libnanomsg5==1.1.5+dfsg-1.1+b1 libnl-3-dev==3.7.0-0.2+b1sonic1 libnl-route-3-dev==3.7.0-0.2+b1sonic1 libnsl-dev==1.3.0-2 libnspr4==2:4.35-1 -libnss3==2:3.87.1-1+deb12u1 +libnss3==2:3.87.1-1+deb12u2 libnuma-dev==2.0.16-1 libnuma1==2.0.16-1 libobjc-12-dev==12.2.0-14+deb12u1 @@ -191,7 +191,7 @@ libprotoc32==3.21.12-3 libpsm-infinipath1==3.3+20.604758e7-6.2 libpsm2-2==11.2.185-2 libpython3-dev==3.11.2-1+b1 -libpython3.11-dev==3.11.2-6+deb12u6 +libpython3.11-dev==3.11.2-6+deb12u7 libqt5core5a==5.15.8+dfsg-11+deb12u3 libqt5dbus5==5.15.8+dfsg-11+deb12u3 libqt5network5==5.15.8+dfsg-11+deb12u3 @@ -208,8 +208,8 @@ libsaivs==1.0.0 libsaivs-dbgsym==1.0.0 libsource-highlight-common==3.1.9-4.2 libsource-highlight4v5==3.1.9-4.2+b3 -libssl-dev==3.0.17-1~deb12u3 -libssl3==3.0.17-1~deb12u3 +libssl-dev==3.0.20-1~deb12u1 +libssl3==3.0.20-1~deb12u1 libstdc++-12-dev==12.2.0-14+deb12u1 libswsscommon-dbgsym==1.0.0 libthrift-0.17.0==0.17.0-2+b2 @@ -226,11 +226,11 @@ libxau6==1:1.0.9-1 libxcb1==1.15-1 libxdmcp6==1:1.1.2-3 libxext6==2:1.3.4-1+b1 -libxml2==2.9.14+dfsg-1.3~deb12u4 +libxml2==2.9.14+dfsg-1.3~deb12u5 libxnvctrl0==525.85.05-3~deb12u1 libyang-cpp-dbgsym==1.0.73 libz3-4==4.8.12-3.1 -linux-libc-dev==6.1.158-1 +linux-libc-dev==6.1.174-1 llvm==1:14.0-55.7~deb12u1 llvm-14==1:14.0.6-12 llvm-14-linker-tools==1:14.0.6-12 @@ -244,11 +244,11 @@ nss-plugin-pem==1.0.8+1-1 ocl-icd-libopencl1==2.3.1-1 openmpi-bin==4.1.4-3+b1 openmpi-common==4.1.4-3 -openssh-client==1:9.2p1-2+deb12u7 -openssl==3.0.17-1~deb12u3 -p4lang-bmv2==1.15.0-7 +openssh-client==1:9.2p1-2+deb12u5+fips +openssl==3.0.20-1~deb12u1 +p4lang-bmv2==1.15.0-9 p4lang-p4c==1.2.4.2-2 -p4lang-pi==0.1.0-15 +p4lang-pi==0.1.0-17 pkg-config==1.8.1-1 pkgconf==1.8.1-1 pkgconf-bin==1.8.1-1 @@ -265,7 +265,7 @@ python3-six==1.16.0-4 python3-swsscommon-dbgsym==1.0.0 python3-thrift==0.17.0-2+b2 python3-yang-dbgsym==1.0.73 -python3.11-dev==3.11.2-6+deb12u6 +python3.11-dev==3.11.2-6+deb12u7 rpcsvc-proto==1.4.3-1 sensible-utils==0.0.17+nmu1 sgml-base==1.31 diff --git a/files/build/versions-public/dockers/docker-gbsyncd-vs/versions-deb-trixie b/files/build/versions-public/dockers/docker-gbsyncd-vs/versions-deb-trixie new file mode 100644 index 00000000000..a984a509762 --- /dev/null +++ b/files/build/versions-public/dockers/docker-gbsyncd-vs/versions-deb-trixie @@ -0,0 +1,299 @@ +autoconf==2.72-3.1 +automake==1:1.17-4 +autotools-dev==20240727.1 +binutils==2.44-3 +binutils-common==2.44-3 +binutils-x86-64-linux-gnu==2.44-3 +clang==1:19.0-63 +clang-19==1:19.1.7-3+b1 +cpp==4:14.2.0-1 +cpp-14==14.2.0-19 +cpp-14-x86-64-linux-gnu==14.2.0-19 +cpp-x86-64-linux-gnu==4:14.2.0-1 +file==1:5.46-5 +flex==2.6.4-8.2+b4 +gcc==4:14.2.0-1 +gcc-14==14.2.0-19 +gcc-14-x86-64-linux-gnu==14.2.0-19 +gcc-x86-64-linux-gnu==4:14.2.0-1 +gdb==16.3-1 +gdbserver==16.3-1 +gfortran-14==14.2.0-19 +gfortran-14-x86-64-linux-gnu==14.2.0-19 +ibverbs-providers==56.1-1 +icu-devtools==76.1-4 +libabsl-dev==20240722.0-4 +libabsl20240722==20240722.0-4 +libamd-comgr2==6.0+git20231212.4510c28+dfsg-3+b2 +libamdhip64-5==5.7.1-6+deb13u1 +libasan8==14.2.0-19 +libbabeltrace1==1.5.11-4+b2 +libbinutils==2.44-3 +libboost-atomic1.83-dev==1.83.0-4.2 +libboost-atomic1.83.0==1.83.0-4.2 +libboost-chrono1.83-dev==1.83.0-4.2 +libboost-chrono1.83.0t64==1.83.0-4.2 +libboost-container1.83-dev==1.83.0-4.2 +libboost-container1.83.0==1.83.0-4.2 +libboost-context1.83-dev==1.83.0-4.2 +libboost-context1.83.0==1.83.0-4.2 +libboost-coroutine1.83-dev==1.83.0-4.2 +libboost-coroutine1.83.0==1.83.0-4.2 +libboost-date-time1.83-dev==1.83.0-4.2 +libboost-date-time1.83.0==1.83.0-4.2 +libboost-exception1.83-dev==1.83.0-4.2 +libboost-fiber1.83-dev==1.83.0-4.2 +libboost-fiber1.83.0==1.83.0-4.2 +libboost-filesystem1.83-dev==1.83.0-4.2 +libboost-filesystem1.83.0==1.83.0-4.2 +libboost-graph-parallel1.83-dev==1.83.0-4.2 +libboost-graph-parallel1.83.0==1.83.0-4.2 +libboost-graph1.83-dev==1.83.0-4.2 +libboost-graph1.83.0==1.83.0-4.2 +libboost-iostreams1.83-dev==1.83.0-4.2 +libboost-iostreams1.83.0==1.83.0-4.2 +libboost-json1.83-dev==1.83.0-4.2 +libboost-json1.83.0==1.83.0-4.2 +libboost-locale1.83-dev==1.83.0-4.2 +libboost-locale1.83.0==1.83.0-4.2 +libboost-log1.83-dev==1.83.0-4.2 +libboost-log1.83.0==1.83.0-4.2 +libboost-math1.83-dev==1.83.0-4.2 +libboost-math1.83.0==1.83.0-4.2 +libboost-mpi-python1.83-dev==1.83.0-4.2 +libboost-mpi-python1.83.0==1.83.0-4.2 +libboost-mpi1.83-dev==1.83.0-4.2 +libboost-mpi1.83.0==1.83.0-4.2 +libboost-nowide1.83-dev==1.83.0-4.2 +libboost-nowide1.83.0==1.83.0-4.2 +libboost-numpy1.83-dev==1.83.0-4.2 +libboost-numpy1.83.0==1.83.0-4.2 +libboost-program-options1.83-dev==1.83.0-4.2 +libboost-program-options1.83.0==1.83.0-4.2 +libboost-python1.83-dev==1.83.0-4.2 +libboost-python1.83.0==1.83.0-4.2 +libboost-random1.83-dev==1.83.0-4.2 +libboost-random1.83.0==1.83.0-4.2 +libboost-regex1.83-dev==1.83.0-4.2 +libboost-regex1.83.0==1.83.0-4.2 +libboost-serialization1.83-dev==1.83.0-4.2 +libboost-stacktrace1.83-dev==1.83.0-4.2 +libboost-stacktrace1.83.0==1.83.0-4.2 +libboost-system1.83-dev==1.83.0-4.2 +libboost-system1.83.0==1.83.0-4.2 +libboost-test1.83-dev==1.83.0-4.2 +libboost-test1.83.0==1.83.0-4.2 +libboost-thread1.83-dev==1.83.0-4.2 +libboost-thread1.83.0==1.83.0-4.2 +libboost-timer1.83-dev==1.83.0-4.2 +libboost-timer1.83.0==1.83.0-4.2 +libboost-type-erasure1.83-dev==1.83.0-4.2 +libboost-type-erasure1.83.0==1.83.0-4.2 +libboost-url1.83-dev==1.83.0-4.2 +libboost-url1.83.0==1.83.0-4.2 +libboost-wave1.83-dev==1.83.0-4.2 +libboost-wave1.83.0==1.83.0-4.2 +libboost1.83-all-dev==1.83.0-4.2 +libboost1.83-dev==1.83.0-4.2 +libboost1.83-tools-dev==1.83.0-4.2 +libbpf-dev==1:1.5.0-3 +libc-ares-dev==1.34.5-1+deb13u1 +libc-ares2==1.34.5-1+deb13u1 +libc-dev-bin==2.41-12+deb13u3 +libc6-dev==2.41-12+deb13u3 +libcap-dev==1:2.75-10+deb13u1+b1 +libcares2==1.34.5-1+deb13u1 +libcbor0.10==0.10.2-2 +libcc1-0==14.2.0-19 +libclang-common-19-dev==1:19.1.7-3+b1 +libclang-cpp19==1:19.1.7-3+b1 +libclang1-19==1:19.1.7-3+b1 +libcrypt-dev==1:4.4.38-1 +libctf-nobfd0==2.44-3 +libctf0==2.44-3 +libcurl3t64-gnutls==8.14.1-2+deb13u3 +libdbus-1-dev==1.16.2-2 +libdebuginfod-common==0.192-4 +libdebuginfod1t64==0.192-4 +libdouble-conversion3==3.3.1-1 +libdrm-amdgpu1==2.4.124-2 +libdrm-common==2.4.124-2 +libdrm2==2.4.124-2 +libdw1t64==0.192-4 +libedit2==3.1-20250104-1 +libelf-dev==0.192-4 +libevent-2.1-7t64==2.1.12-stable-10+b1 +libevent-core-2.1-7t64==2.1.12-stable-10+b1 +libevent-dev==2.1.12-stable-10+b1 +libevent-extra-2.1-7t64==2.1.12-stable-10+b1 +libevent-openssl-2.1-7t64==2.1.12-stable-10+b1 +libevent-pthreads-2.1-7t64==2.1.12-stable-10+b1 +libexpat1-dev==2.7.1-2 +libfabric1==2.1.0-1.1 +libfido2-1==1.15.0-1+b1 +libfl-dev==2.6.4-8.2+b4 +libfl2==2.6.4-8.2+b4 +libfuse3-4==3.17.2-3 +libgc-dev==1:8.2.8-1 +libgc1==1:8.2.8-1 +libgcc-14-dev==14.2.0-19 +libgfortran-14-dev==14.2.0-19 +libgfortran5==14.2.0-19 +libglib2.0-0t64==2.84.4-3~deb13u3 +libgmp-dev==2:6.3.0+dfsg-3 +libgmpxx4ldbl==2:6.3.0+dfsg-3 +libgomp1==14.2.0-19 +libgpm2==1.20.7-11+b2 +libgprofng0==2.44-3 +libgrpc++-dev==1.51.1-6 +libgrpc++1.51t64==1.51.1-6 +libgrpc-dev==1.51.1-6 +libgrpc29t64==1.51.1-6 +libhsa-runtime64-1==6.1.2-3 +libhsakmt1==6.2.4+ds-1 +libhwasan0==14.2.0-19 +libhwloc-dev==2.12.0-4 +libhwloc-plugins==2.12.0-4 +libhwloc15==2.12.0-4 +libibmad5==56.1-1 +libibumad3==56.1-1 +libibverbs-dev==56.1-1 +libibverbs1==56.1-1 +libicu-dev==76.1-4 +libicu76==76.1-4 +libipt2==2.1.2-1 +libisl23==0.27-1 +libitm1==14.2.0-19 +libjs-jquery==3.6.1+dfsg+~3.5.14-1 +libjs-jquery-ui==1.13.2+dfsg-1 +libjs-sphinxdoc==8.1.3-5 +libjs-underscore==1.13.4~dfsg+~1.11.4-3 +libjson-c5==0.18+ds-1 +libllvm17t64==1:17.0.6-22+b2 +libllvm19==1:19.1.7-3+b1 +liblsan0==14.2.0-19 +libltdl-dev==2.5.4-4 +libltdl7==2.5.4-4 +libmagic-mgc==1:5.46-5 +libmagic1t64==1:5.46-5 +libmpc3==1.3.1-1+b3 +libmpfr6==4.2.2-1 +libmunge2==0.5.16-1.1~deb13u1 +libnanomsg-dev==1.1.5+dfsg-1.1+b1 +libnanomsg5==1.1.5+dfsg-1.1+b1 +libngtcp2-16==1.11.0-1+deb13u1 +libngtcp2-crypto-gnutls8==1.11.0-1+deb13u1 +libnl-3-dev==3.7.0-0.2+b1sonic1 +libnl-route-3-dev==3.7.0-0.2+b1sonic1 +libnuma-dev==2.0.19-1 +libnuma1==2.0.19-1 +libobjc-14-dev==14.2.0-19 +libobjc4==14.2.0-19 +libopenmpi-dev==5.0.7-1 +libopenmpi40==5.0.7-1 +libpcap-dev==1.10.5-2 +libpcap0.8-dev==1.10.5-2 +libpcap0.8t64==1.10.5-2 +libpciaccess0==0.17-3+b3 +libpcre2-16-0==10.46-1~deb13u1 +libpfm4==4.13.0+git99-gc5587f9-1 +libpkgconf3==1.8.1-4 +libpmix-dev==5.0.7-1 +libpmix2t64==5.0.7-1 +libprotobuf-dev==3.21.12-11 +libprotobuf-lite32t64==3.21.12-11 +libprotobuf32t64==3.21.12-11 +libprotoc-dev==3.21.12-11 +libprotoc32t64==3.21.12-11 +libpsm2-2==11.2.185-2.1 +libpython3-dev==3.13.5-1 +libpython3.13-dev==3.13.5-2+deb13u2 +libqt5core5t64==5.15.15+dfsg-6+deb13u1 +libqt5dbus5t64==5.15.15+dfsg-6+deb13u1 +libqt5network5t64==5.15.15+dfsg-6+deb13u1 +libquadmath0==14.2.0-19 +librdmacm1t64==56.1-1 +libre2-11==20240702-3+b1 +libre2-dev==20240702-3+b1 +libsai==1.0.0 +libsaimetadata==1.0.0 +libsaimetadata-dbgsym==1.0.0 +libsairedis==1.0.0 +libsairedis-dbgsym==1.0.0 +libsaivs==1.0.0 +libsaivs-dbgsym==1.0.0 +libsframe1==2.44-3 +libsource-highlight-common==3.1.9-4.3 +libsource-highlight4t64==3.1.9-4.3+b1 +libstdc++-14-dev==14.2.0-19 +libswsscommon-dbgsym==1.0.0 +libsystemd-dev==257.13-1~deb13u1 +libtext-charwidth-perl==0.04-11+b4 +libtext-wrapi18n-perl==0.06-10 +libthrift-0.19.0t64==0.19.0-4+b1 +libthrift-dev==0.19.0-4+b1 +libtool==2.5.4-4 +libtsan2==14.2.0-19 +libubsan1==14.2.0-19 +libucx0==1.18.1+ds-2+b1 +libunwind8==1.8.1-0.1 +libx11-6==2:1.8.12-1 +libx11-data==2:1.8.12-1 +libxau6==1:1.0.11-1 +libxcb1==1.17.0-2+b1 +libxdmcp6==1:1.1.5-1 +libxext6==2:1.3.4-1+b3 +libxml2==2.12.7+dfsg+really2.9.14-2.1+deb13u2 +libxnvctrl0==535.171.04-1+b2 +libyang3-dbgsym==3.12.2-1 +libz3-4==4.13.3-1 +libze1==1.20.6-1 +libzstd-dev==1.5.7+dfsg-1 +linux-libc-dev==6.12.90-2 +llvm==1:19.0-63 +llvm-19==1:19.1.7-3+b1 +llvm-19-linker-tools==1:19.1.7-3+b1 +llvm-19-runtime==1:19.1.7-3+b1 +llvm-runtime==1:19.0-63 +m4==1.4.19-8 +mpi-default-bin==1.18 +mpi-default-dev==1.18 +ocl-icd-libopencl1==2.3.3-1 +openmpi-bin==5.0.7-1 +openmpi-common==5.0.7-1 +openssh-client==1:10.0p1-7+fips +p4lang-bmv2==1.15.0-9 +p4lang-p4c==1.2.4.2-2 +p4lang-pi==0.1.1-1 +pkg-config==1.8.1-4 +pkgconf==1.8.1-4 +pkgconf-bin==1.8.1-4 +protobuf-compiler==3.21.12-11 +protobuf-compiler-grpc==1.51.1-6 +python3-dev==3.13.5-1 +python3-grpcio==1.51.1-6 +python3-protobuf==3.21.12-11 +python3-psutil==7.0.0-2 +python3-pyroute2==0.7.7-4 +python3-scapy==2.6.1+dfsg-1 +python3-six==1.17.0-1 +python3-swsscommon-dbgsym==1.0.0 +python3-thrift==0.19.0-4+b1 +python3.13-dev==3.13.5-2+deb13u2 +rpcsvc-proto==1.4.3-1 +sensible-utils==0.0.25 +sgml-base==1.31+nmu1 +shared-mime-info==2.4-5+b2 +sonic-db-cli-dbgsym==1.0.0 +sonic-eventd-dbgsym==1.0.0-0 +sshpass==1.10-0.1 +strace==6.13+ds-1 +syncd-vs==1.0.0 +syncd-vs-dbgsym==1.0.0 +tcpdump==4.99.5-2 +thrift-compiler==0.19.0-4+b1 +ucf==3.0052 +vim==2:9.1.1230-2 +vim-runtime==2:9.1.1230-2 +xml-core==0.19 +zlib1g-dev==1:1.3.dfsg+really1.3.1-1+b1 diff --git a/files/build/versions-public/dockers/docker-gbsyncd-vs/versions-py3 b/files/build/versions-public/dockers/docker-gbsyncd-vs/versions-py3 index ed18794433e..a0698645918 100644 --- a/files/build/versions-public/dockers/docker-gbsyncd-vs/versions-py3 +++ b/files/build/versions-public/dockers/docker-gbsyncd-vs/versions-py3 @@ -1,7 +1,8 @@ grpcio==1.51.1 ply==3.11 protobuf==4.21.12 -psutil==5.9.4 -pyroute2==0.7.2 -scapy==2.5.0 -thrift==0.17.0 +psutil==7.0.0 +pyroute2==0.7.7 +scapy==2.6.1 +six==1.17.0 +thrift==0.19.0 diff --git a/files/build/versions-public/dockers/docker-gnmi-watchdog/versions-deb-bookworm b/files/build/versions-public/dockers/docker-gnmi-watchdog/versions-deb-bookworm deleted file mode 100644 index 1c455fcbe06..00000000000 --- a/files/build/versions-public/dockers/docker-gnmi-watchdog/versions-deb-bookworm +++ /dev/null @@ -1,21 +0,0 @@ -apt-utils==2.6.1 -libboost-serialization1.83.0==1.83.0-4.2~bpo12+1 -libhiredis0.14==0.14.1-3 -libk5crypto3==1.20.1-2+deb12u4 -libnl-3-200==3.7.0-0.2+b1sonic1 -libnl-cli-3-200==3.7.0-0.2+b1sonic1 -libnl-genl-3-200==3.7.0-0.2+b1sonic1 -libnl-nf-3-200==3.7.0-0.2+b1sonic1 -libnl-route-3-200==3.7.0-0.2+b1sonic1 -libpcre3==2:8.39-15 -libpython3.11==3.11.2-6+deb12u6 -libswsscommon==1.0.0 -libyaml-0-2==0.2.5-1 -libyang==1.0.73 -libyang-cpp==1.0.73 -python3-swsscommon==1.0.0 -python3-yaml==6.0-3+b2 -python3-yang==1.0.73 -sonic-db-cli==1.0.0 -sonic-eventd==1.0.0-0 -sonic-supervisord-utilities-rs==1.0.0 diff --git a/files/build/versions-public/dockers/docker-gnmi-watchdog/versions-deb-bookworm-arm64 b/files/build/versions-public/dockers/docker-gnmi-watchdog/versions-deb-bookworm-arm64 deleted file mode 100644 index 9032f664a38..00000000000 --- a/files/build/versions-public/dockers/docker-gnmi-watchdog/versions-deb-bookworm-arm64 +++ /dev/null @@ -1,15 +0,0 @@ -icu-devtools==72.1-3+deb12u1 -libc-dev-bin==2.36-9+deb12u13 -libc6-dev==2.36-9+deb12u13 -libcrypt-dev==1:4.4.33-2 -libicu-dev==72.1-3+deb12u1 -libicu72==72.1-3+deb12u1 -libnsl-dev==1.3.0-2 -libtirpc-dev==1.3.3+ds-1 -libxml2==2.9.14+dfsg-1.3~deb12u4 -libxml2-dev==2.9.14+dfsg-1.3~deb12u4 -libxslt1-dev==1.1.35-1+deb12u3 -libxslt1.1==1.1.35-1+deb12u3 -linux-libc-dev==6.1.158-1 -rpcsvc-proto==1.4.3-1 -zlib1g-dev==1:1.2.13.dfsg-1 diff --git a/files/build/versions-public/dockers/docker-gnmi-watchdog/versions-deb-bookworm-armhf b/files/build/versions-public/dockers/docker-gnmi-watchdog/versions-deb-bookworm-armhf deleted file mode 100644 index 9032f664a38..00000000000 --- a/files/build/versions-public/dockers/docker-gnmi-watchdog/versions-deb-bookworm-armhf +++ /dev/null @@ -1,15 +0,0 @@ -icu-devtools==72.1-3+deb12u1 -libc-dev-bin==2.36-9+deb12u13 -libc6-dev==2.36-9+deb12u13 -libcrypt-dev==1:4.4.33-2 -libicu-dev==72.1-3+deb12u1 -libicu72==72.1-3+deb12u1 -libnsl-dev==1.3.0-2 -libtirpc-dev==1.3.3+ds-1 -libxml2==2.9.14+dfsg-1.3~deb12u4 -libxml2-dev==2.9.14+dfsg-1.3~deb12u4 -libxslt1-dev==1.1.35-1+deb12u3 -libxslt1.1==1.1.35-1+deb12u3 -linux-libc-dev==6.1.158-1 -rpcsvc-proto==1.4.3-1 -zlib1g-dev==1:1.2.13.dfsg-1 diff --git a/files/build/versions-public/dockers/docker-gnmi-watchdog/versions-deb-trixie b/files/build/versions-public/dockers/docker-gnmi-watchdog/versions-deb-trixie new file mode 100644 index 00000000000..b082e1cdc1f --- /dev/null +++ b/files/build/versions-public/dockers/docker-gnmi-watchdog/versions-deb-trixie @@ -0,0 +1,35 @@ +apt-utils==3.0.3 +libboost-serialization1.83.0==1.83.0-4.2 +libc-dev-bin==2.41-12+deb13u3 +libc6-dev==2.41-12+deb13u3 +libcrypt-dev==1:4.4.38-1 +libgcrypt20==1.11.0-7+deb13u1 +libgpg-error0==1.51-4 +libhiredis1.1.0==1.2.0-6+b3 +libnl-3-200==3.7.0-0.2+b1sonic1 +libnl-cli-3-200==3.7.0-0.2+b1sonic1 +libnl-genl-3-200==3.7.0-0.2+b1sonic1 +libnl-nf-3-200==3.7.0-0.2+b1sonic1 +libnl-route-3-200==3.7.0-0.2+b1sonic1 +libpython3.13==3.13.5-2+deb13u2 +libswsscommon==1.0.0 +libxml2==2.12.7+dfsg+really2.9.14-2.1+deb13u2 +libxml2-dev==2.12.7+dfsg+really2.9.14-2.1+deb13u2 +libxslt1-dev==1.1.35-1.2+deb13u3 +libxslt1.1==1.1.35-1.2+deb13u3 +libyaml-0-2==0.2.5-2 +libyang3==3.12.2-1 +linux-libc-dev==6.12.90-2 +python3-cffi==1.17.1-3 +python3-cffi-backend==1.17.1-3 +python3-libyang==3.1.0-1 +python3-ply==3.11-9 +python3-pycparser==2.22-2 +python3-redis==6.1.0-2 +python3-swsscommon==1.0.0 +python3-yaml==6.0.2-1+b2 +rpcsvc-proto==1.4.3-1+b1 +sonic-db-cli==1.0.0 +sonic-eventd==1.0.0-0 +sonic-supervisord-utilities-rs==1.0.0 +zlib1g-dev==1:1.3.dfsg+really1.3.1-1+b1 diff --git a/files/build/versions-public/dockers/docker-gnmi-watchdog/versions-deb-trixie-armhf b/files/build/versions-public/dockers/docker-gnmi-watchdog/versions-deb-trixie-armhf new file mode 100644 index 00000000000..a1ff1642e43 --- /dev/null +++ b/files/build/versions-public/dockers/docker-gnmi-watchdog/versions-deb-trixie-armhf @@ -0,0 +1 @@ +rpcsvc-proto==1.4.3-1 diff --git a/files/build/versions-public/dockers/docker-gnmi-watchdog/versions-py3 b/files/build/versions-public/dockers/docker-gnmi-watchdog/versions-py3 index 6e94aee194a..d70bda21d45 100644 --- a/files/build/versions-public/dockers/docker-gnmi-watchdog/versions-py3 +++ b/files/build/versions-public/dockers/docker-gnmi-watchdog/versions-py3 @@ -1,18 +1,17 @@ -async-timeout==5.0.1 bitarray==2.8.1 -ijson==3.2.3 -ipaddress==1.0.23 +cffi==1.17.1 +ijson==3.5.0 jsondiff==2.2.1 -jsonpointer==3.0.0 -lxml==6.0.2 +jsonpointer==3.1.1 +libyang==3.1.0 +lxml==6.1.1 natsort==8.4.0 netaddr==0.8.0 +ply==3.11 pyang==2.7.1 -pyangbind==0.8.2 -pyyaml==6.0.3 -redis==5.0.1 +pyangbind==0.8.7 +pycparser==2.22 +redis==6.1.0 redis-dump-load==1.1 -regex==2025.11.3 -six==1.17.0 +regex==2026.5.9 tabulate==0.9.0 -xmltodict==0.12.0 diff --git a/files/build/versions-public/dockers/docker-lldp/versions-deb-bookworm b/files/build/versions-public/dockers/docker-lldp/versions-deb-bookworm deleted file mode 100644 index 563eea63a46..00000000000 --- a/files/build/versions-public/dockers/docker-lldp/versions-deb-bookworm +++ /dev/null @@ -1,45 +0,0 @@ -gdb==13.1-3 -gdbserver==13.1-3 -libbabeltrace1==1.5.11-1+b2 -libboost-regex1.74.0==1.74.0+ds1-21 -libcbor0.8==0.8.0-2+b1 -libcurl3-gnutls==7.88.1-10+deb12u14 -libdebuginfod-common==0.188-2.1 -libdebuginfod1==0.188-2.1 -libdw1==0.188-2.1 -libedit2==3.1-20221030-2 -libevent-2.1-7==2.1.12-stable-8 -libfido2-1==1.12.0-2+b1 -libglib2.0-0==2.74.6-2+deb12u7 -libgpm2==1.20.7-10+b1 -libicu72==72.1-3+deb12u1 -libipt2==2.0.5-1 -libmpfr6==4.2.0-1 -libpci3==1:3.9.0-4 -libsensors-config==1:3.6.0-7.1 -libsensors5==1:3.6.0-7.1 -libsnmp-base==5.9.3+dfsg-2 -libsnmp40==5.9.3+dfsg-2 -libsource-highlight-common==3.1.9-4.2 -libsource-highlight4v5==3.1.9-4.2+b3 -libssl-dev==3.0.17-1~deb12u3 -libssl3==3.0.17-1~deb12u3 -libswsscommon-dbgsym==1.0.0 -libunwind8==1.6.2-3 -libxml2==2.9.14+dfsg-1.3~deb12u4 -libyang-cpp-dbgsym==1.0.73 -lldpd==1.0.16-1+deb12u1 -lldpd-dbgsym==1.0.16-1+deb12u1 -openssh-client==1:9.2p1-2+deb12u7 -openssl==3.0.17-1~deb12u3 -pci.ids==0.0~2023.04.11-1 -python3-swsscommon-dbgsym==1.0.0 -python3-yang-dbgsym==1.0.73 -sensible-utils==0.0.17+nmu1 -sonic-db-cli-dbgsym==1.0.0 -sonic-eventd-dbgsym==1.0.0-0 -sshpass==1.09-1+b1 -strace==6.1-0.1 -ucf==3.0043+nmu1+deb12u1 -vim==2:9.0.1378-2+deb12u2 -vim-runtime==2:9.0.1378-2+deb12u2 diff --git a/files/build/versions-public/dockers/docker-lldp/versions-deb-trixie b/files/build/versions-public/dockers/docker-lldp/versions-deb-trixie new file mode 100644 index 00000000000..a9ffee5a8eb --- /dev/null +++ b/files/build/versions-public/dockers/docker-lldp/versions-deb-trixie @@ -0,0 +1,44 @@ +gdb==16.3-1 +gdbserver==16.3-1 +libbabeltrace1==1.5.11-4+b2 +libcbor0.10==0.10.2-2 +libcurl3t64-gnutls==8.14.1-2+deb13u3 +libdebuginfod-common==0.192-4 +libdebuginfod1t64==0.192-4 +libdw1t64==0.192-4 +libedit2==3.1-20250104-1 +libevent-2.1-7t64==2.1.12-stable-10+b1 +libfido2-1==1.15.0-1+b1 +libglib2.0-0t64==2.84.4-3~deb13u3 +libgpm2==1.20.7-11+b2 +libipt2==2.1.2-1 +libjson-c5==0.18+ds-1 +libmpfr6==4.2.2-1 +libngtcp2-16==1.11.0-1+deb13u1 +libngtcp2-crypto-gnutls8==1.11.0-1+deb13u1 +libpci3==1:3.13.0-2 +libsensors-config==1:3.6.2-2 +libsensors5==1:3.6.2-2 +libsnmp-base==5.9.4+dfsg-2+deb13u1 +libsnmp40t64==5.9.4+dfsg-2+deb13u1 +libsource-highlight-common==3.1.9-4.3 +libsource-highlight4t64==3.1.9-4.3+b1 +libswsscommon-dbgsym==1.0.0 +libtext-charwidth-perl==0.04-11+b4 +libtext-wrapi18n-perl==0.06-10 +libunwind8==1.8.1-0.1 +libxml2==2.12.7+dfsg+really2.9.14-2.1+deb13u2 +libyang3-dbgsym==3.12.2-1 +lldpd==1.0.16-1+deb12u1 +lldpd-dbgsym==1.0.16-1+deb12u1 +openssh-client==1:10.0p1-7+fips +pci.ids==0.0~2025.06.09-1 +python3-swsscommon-dbgsym==1.0.0 +sensible-utils==0.0.25 +sonic-db-cli-dbgsym==1.0.0 +sonic-eventd-dbgsym==1.0.0-0 +sshpass==1.10-0.1 +strace==6.13+ds-1 +ucf==3.0052 +vim==2:9.1.1230-2 +vim-runtime==2:9.1.1230-2 diff --git a/files/build/versions-public/dockers/docker-macsec/versions-deb-bookworm b/files/build/versions-public/dockers/docker-macsec/versions-deb-bookworm deleted file mode 100644 index 79dbc6eeb5d..00000000000 --- a/files/build/versions-public/dockers/docker-macsec/versions-deb-bookworm +++ /dev/null @@ -1,39 +0,0 @@ -gdb==13.1-3 -gdbserver==13.1-3 -libbabeltrace1==1.5.11-1+b2 -libboost-regex1.74.0==1.74.0+ds1-21 -libcbor0.8==0.8.0-2+b1 -libcurl3-gnutls==7.88.1-10+deb12u14 -libdebuginfod-common==0.188-2.1 -libdebuginfod1==0.188-2.1 -libdw1==0.188-2.1 -libedit2==3.1-20221030-2 -libfido2-1==1.12.0-2+b1 -libglib2.0-0==2.74.6-2+deb12u7 -libgpm2==1.20.7-10+b1 -libicu72==72.1-3+deb12u1 -libipt2==2.0.5-1 -libmpfr6==4.2.0-1 -libpcsclite1==1.9.9-2 -libsource-highlight-common==3.1.9-4.2 -libsource-highlight4v5==3.1.9-4.2+b3 -libssl-dev==3.0.17-1~deb12u3 -libssl3==3.0.17-1~deb12u3 -libswsscommon-dbgsym==1.0.0 -libunwind8==1.6.2-3 -libyang-cpp-dbgsym==1.0.73 -openssh-client==1:9.2p1-2+deb12u7 -openssl==3.0.17-1~deb12u3 -python3-swsscommon-dbgsym==1.0.0 -python3-yang-dbgsym==1.0.73 -sensible-utils==0.0.17+nmu1 -sonic-db-cli-dbgsym==1.0.0 -sonic-eventd-dbgsym==1.0.0-0 -sshpass==1.09-1+b1 -strace==6.1-0.1 -swss-dbg==1.0.0 -ucf==3.0043+nmu1+deb12u1 -vim==2:9.0.1378-2+deb12u2 -vim-runtime==2:9.0.1378-2+deb12u2 -wpasupplicant==2:2.9.0-14 -wpasupplicant-dbgsym==2:2.9.0-14 diff --git a/files/build/versions-public/dockers/docker-macsec/versions-deb-trixie b/files/build/versions-public/dockers/docker-macsec/versions-deb-trixie new file mode 100644 index 00000000000..8896d705b23 --- /dev/null +++ b/files/build/versions-public/dockers/docker-macsec/versions-deb-trixie @@ -0,0 +1,38 @@ +gdb==16.3-1 +gdbserver==16.3-1 +libbabeltrace1==1.5.11-4+b2 +libcbor0.10==0.10.2-2 +libcurl3t64-gnutls==8.14.1-2+deb13u3 +libdebuginfod-common==0.192-4 +libdebuginfod1t64==0.192-4 +libdw1t64==0.192-4 +libedit2==3.1-20250104-1 +libfido2-1==1.15.0-1+b1 +libglib2.0-0t64==2.84.4-3~deb13u3 +libgpm2==1.20.7-11+b2 +libipt2==2.1.2-1 +libjson-c5==0.18+ds-1 +libmpfr6==4.2.2-1 +libngtcp2-16==1.11.0-1+deb13u1 +libngtcp2-crypto-gnutls8==1.11.0-1+deb13u1 +libpcsclite1==2.3.3-1 +libsource-highlight-common==3.1.9-4.3 +libsource-highlight4t64==3.1.9-4.3+b1 +libswsscommon-dbgsym==1.0.0 +libtext-charwidth-perl==0.04-11+b4 +libtext-wrapi18n-perl==0.06-10 +libunwind8==1.8.1-0.1 +libyang3-dbgsym==3.12.2-1 +openssh-client==1:10.0p1-7+fips +python3-swsscommon-dbgsym==1.0.0 +sensible-utils==0.0.25 +sonic-db-cli-dbgsym==1.0.0 +sonic-eventd-dbgsym==1.0.0-0 +sshpass==1.10-0.1 +strace==6.13+ds-1 +swss-dbg==1.0.0 +ucf==3.0052 +vim==2:9.1.1230-2 +vim-runtime==2:9.1.1230-2 +wpasupplicant==2:2.9.0-14 +wpasupplicant-dbgsym==2:2.9.0-14 diff --git a/files/build/versions-public/dockers/docker-mux/versions-deb-bookworm b/files/build/versions-public/dockers/docker-mux/versions-deb-bookworm deleted file mode 100644 index 0a780a32561..00000000000 --- a/files/build/versions-public/dockers/docker-mux/versions-deb-bookworm +++ /dev/null @@ -1,41 +0,0 @@ -gdb==13.1-3 -gdbserver==13.1-3 -libbabeltrace1==1.5.11-1+b2 -libboost-filesystem1.83.0==1.83.0-4.2~bpo12+1 -libboost-log1.83.0==1.83.0-4.2~bpo12+1 -libboost-program-options1.83.0==1.83.0-4.2~bpo12+1 -libboost-regex1.74.0==1.74.0+ds1-21 -libboost-thread1.83.0==1.83.0-4.2~bpo12+1 -libcbor0.8==0.8.0-2+b1 -libcurl3-gnutls==7.88.1-10+deb12u14 -libdebuginfod-common==0.188-2.1 -libdebuginfod1==0.188-2.1 -libdw1==0.188-2.1 -libedit2==3.1-20221030-2 -libfido2-1==1.12.0-2+b1 -libglib2.0-0==2.74.6-2+deb12u7 -libgpm2==1.20.7-10+b1 -libicu72==72.1-3+deb12u1 -libipt2==2.0.5-1 -libmpfr6==4.2.0-1 -libsource-highlight-common==3.1.9-4.2 -libsource-highlight4v5==3.1.9-4.2+b3 -libssl-dev==3.0.17-1~deb12u3 -libssl3==3.0.17-1~deb12u3 -libswsscommon-dbgsym==1.0.0 -libunwind8==1.6.2-3 -libyang-cpp-dbgsym==1.0.73 -openssh-client==1:9.2p1-2+deb12u7 -openssl==3.0.17-1~deb12u3 -python3-swsscommon-dbgsym==1.0.0 -python3-yang-dbgsym==1.0.73 -sensible-utils==0.0.17+nmu1 -sonic-db-cli-dbgsym==1.0.0 -sonic-eventd-dbgsym==1.0.0-0 -sonic-linkmgrd==1.0.0-1 -sonic-linkmgrd-dbgsym==1.0.0-1 -sshpass==1.09-1+b1 -strace==6.1-0.1 -ucf==3.0043+nmu1+deb12u1 -vim==2:9.0.1378-2+deb12u2 -vim-runtime==2:9.0.1378-2+deb12u2 diff --git a/files/build/versions-public/dockers/docker-mux/versions-deb-trixie b/files/build/versions-public/dockers/docker-mux/versions-deb-trixie new file mode 100644 index 00000000000..f8c9578c361 --- /dev/null +++ b/files/build/versions-public/dockers/docker-mux/versions-deb-trixie @@ -0,0 +1,40 @@ +gdb==16.3-1 +gdbserver==16.3-1 +libbabeltrace1==1.5.11-4+b2 +libboost-filesystem1.83.0==1.83.0-4.2 +libboost-log1.83.0==1.83.0-4.2 +libboost-program-options1.83.0==1.83.0-4.2 +libboost-thread1.83.0==1.83.0-4.2 +libcbor0.10==0.10.2-2 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b/files/build/versions-public/dockers/docker-nat/versions-deb-bookworm deleted file mode 100644 index 1b837bb6dc5..00000000000 --- a/files/build/versions-public/dockers/docker-nat/versions-deb-bookworm +++ /dev/null @@ -1,46 +0,0 @@ -bridge-utils==1.7.1-1 -conntrack==1:1.4.7-1+b2 -gdb==13.1-3 -gdbserver==13.1-3 -iptables==1.8.9-2 -libbabeltrace1==1.5.11-1+b2 -libboost-regex1.74.0==1.74.0+ds1-21 -libcbor0.8==0.8.0-2+b1 -libcurl3-gnutls==7.88.1-10+deb12u14 -libdebuginfod-common==0.188-2.1 -libdebuginfod1==0.188-2.1 -libdw1==0.188-2.1 -libedit2==3.1-20221030-2 -libfido2-1==1.12.0-2+b1 -libglib2.0-0==2.74.6-2+deb12u7 -libgpm2==1.20.7-10+b1 -libicu72==72.1-3+deb12u1 -libip4tc2==1.8.9-2 -libip6tc2==1.8.9-2 -libipt2==2.0.5-1 -libiptc0==1.8.9-2 -libmpfr6==4.2.0-1 -libnetfilter-conntrack3==1.0.9-3 -libnfnetlink0==1.0.2-2 -libnftnl11==1.2.4-2 -libsource-highlight-common==3.1.9-4.2 -libsource-highlight4v5==3.1.9-4.2+b3 -libssl-dev==3.0.17-1~deb12u3 -libssl3==3.0.17-1~deb12u3 -libswsscommon-dbgsym==1.0.0 -libunwind8==1.6.2-3 -libyang-cpp-dbgsym==1.0.73 -netbase==6.4 -openssh-client==1:9.2p1-2+deb12u7 -openssl==3.0.17-1~deb12u3 -python3-swsscommon-dbgsym==1.0.0 -python3-yang-dbgsym==1.0.73 -sensible-utils==0.0.17+nmu1 -sonic-db-cli-dbgsym==1.0.0 -sonic-eventd-dbgsym==1.0.0-0 -sshpass==1.09-1+b1 -strace==6.1-0.1 -swss-dbg==1.0.0 -ucf==3.0043+nmu1+deb12u1 -vim==2:9.0.1378-2+deb12u2 -vim-runtime==2:9.0.1378-2+deb12u2 diff --git a/files/build/versions-public/dockers/docker-nat/versions-deb-trixie b/files/build/versions-public/dockers/docker-nat/versions-deb-trixie new file mode 100644 index 00000000000..de049a0f818 --- /dev/null +++ b/files/build/versions-public/dockers/docker-nat/versions-deb-trixie @@ -0,0 +1,43 @@ +bridge-utils==1.7.1-4+b1 +conntrack==1:1.4.8-2 +gdb==16.3-1 +gdbserver==16.3-1 +iptables==1.8.11-2 +libbabeltrace1==1.5.11-4+b2 +libcbor0.10==0.10.2-2 +libcurl3t64-gnutls==8.14.1-2+deb13u3 +libdebuginfod-common==0.192-4 +libdebuginfod1t64==0.192-4 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b/files/build/versions-public/dockers/docker-nat/versions-deb-trixie-arm64 new file mode 100644 index 00000000000..61f524115f3 --- /dev/null +++ b/files/build/versions-public/dockers/docker-nat/versions-deb-trixie-arm64 @@ -0,0 +1,2 @@ +bridge-utils==1.7.1-4 +conntrack==1:1.4.8-2+b1 diff --git a/files/build/versions-public/dockers/docker-nat/versions-deb-trixie-armhf b/files/build/versions-public/dockers/docker-nat/versions-deb-trixie-armhf new file mode 100644 index 00000000000..780fdf92f9e --- /dev/null +++ b/files/build/versions-public/dockers/docker-nat/versions-deb-trixie-armhf @@ -0,0 +1 @@ +bridge-utils==1.7.1-4 diff --git a/files/build/versions-public/dockers/docker-orchagent/versions-deb-bookworm b/files/build/versions-public/dockers/docker-orchagent/versions-deb-bookworm deleted file mode 100644 index a12d36df514..00000000000 --- a/files/build/versions-public/dockers/docker-orchagent/versions-deb-bookworm +++ /dev/null @@ -1,55 +0,0 @@ -arping==2.23-1 -bridge-utils==1.7.1-1 -conntrack==1:1.4.7-1+b2 -gdb==13.1-3 -gdbserver==13.1-3 -ifupdown==0.8.41 -libbabeltrace1==1.5.11-1+b2 -libboost-regex1.74.0==1.74.0+ds1-21 -libcbor0.8==0.8.0-2+b1 -libcurl3-gnutls==7.88.1-10+deb12u14 -libdebuginfod-common==0.188-2.1 -libdebuginfod1==0.188-2.1 -libdw1==0.188-2.1 -libedit2==3.1-20221030-2 -libfido2-1==1.12.0-2+b1 -libglib2.0-0==2.74.6-2+deb12u7 -libgpm2==1.20.7-10+b1 -libicu72==72.1-3+deb12u1 -libipt2==2.0.5-1 -libkmod2==30+20221128-1 -libmpfr6==4.2.0-1 -libnet1==1.1.6+dfsg-3.2 -libnetfilter-conntrack3==1.0.9-3 -libnfnetlink0==1.0.2-2 -libpcap0.8==1.10.3-1 -libpci3==1:3.9.0-4 -libsairedis-dbgsym==1.0.0 -libsource-highlight-common==3.1.9-4.2 -libsource-highlight4v5==3.1.9-4.2+b3 -libssl-dev==3.0.17-1~deb12u3 -libssl3==3.0.17-1~deb12u3 -libswsscommon-dbgsym==1.0.0 -libunwind8==1.6.2-3 -libyang-cpp-dbgsym==1.0.73 -ndisc6==1.0.5-1+b2 -ndppd==0.2.5-6 -openssh-client==1:9.2p1-2+deb12u7 -openssl==3.0.17-1~deb12u3 -pci.ids==0.0~2023.04.11-1 -pciutils==1:3.9.0-4 -python3-netifaces==0.11.0-2+b1 -python3-protobuf==3.21.12-3 -python3-swsscommon-dbgsym==1.0.0 -python3-yang-dbgsym==1.0.73 -sensible-utils==0.0.17+nmu1 -sgml-base==1.31 -sonic-db-cli-dbgsym==1.0.0 -sonic-eventd-dbgsym==1.0.0-0 -sshpass==1.09-1+b1 -strace==6.1-0.1 -swss-dbg==1.0.0 -tcpdump==4.99.3-1 -ucf==3.0043+nmu1+deb12u1 -vim==2:9.0.1378-2+deb12u2 -vim-runtime==2:9.0.1378-2+deb12u2 diff --git a/files/build/versions-public/dockers/docker-orchagent/versions-deb-bookworm-arm64 b/files/build/versions-public/dockers/docker-orchagent/versions-deb-bookworm-arm64 deleted file mode 100644 index 03c7cf58044..00000000000 --- a/files/build/versions-public/dockers/docker-orchagent/versions-deb-bookworm-arm64 +++ /dev/null @@ -1,21 +0,0 @@ -binutils==2.40-2 -binutils-aarch64-linux-gnu==2.40-2 -binutils-common==2.40-2 -cpp==4:12.2.0-3 -cpp-12==12.2.0-14+deb12u1 -gcc-12==12.2.0-14+deb12u1 -libasan8==12.2.0-14+deb12u1 -libbinutils==2.40-2 -libcc1-0==12.2.0-14+deb12u1 -libctf-nobfd0==2.40-2 -libctf0==2.40-2 -libgcc-12-dev==12.2.0-14+deb12u1 -libgomp1==12.2.0-14+deb12u1 -libgprofng0==2.40-2 -libhwasan0==12.2.0-14+deb12u1 -libisl23==0.25-1.1 -libitm1==12.2.0-14+deb12u1 -liblsan0==12.2.0-14+deb12u1 -libmpc3==1.3.1-1 -libtsan2==12.2.0-14+deb12u1 -libubsan1==12.2.0-14+deb12u1 diff --git a/files/build/versions-public/dockers/docker-orchagent/versions-deb-bookworm-armhf b/files/build/versions-public/dockers/docker-orchagent/versions-deb-bookworm-armhf deleted file mode 100644 index c2743e8f4bc..00000000000 --- a/files/build/versions-public/dockers/docker-orchagent/versions-deb-bookworm-armhf +++ /dev/null @@ -1,16 +0,0 @@ -binutils==2.40-2 -binutils-arm-linux-gnueabihf==2.40-2 -binutils-common==2.40-2 -cpp==4:12.2.0-3 -cpp-12==12.2.0-14+deb12u1 -gcc-12==12.2.0-14+deb12u1 -libasan8==12.2.0-14+deb12u1 -libbinutils==2.40-2 -libcc1-0==12.2.0-14+deb12u1 -libctf-nobfd0==2.40-2 -libctf0==2.40-2 -libgcc-12-dev==12.2.0-14+deb12u1 -libgomp1==12.2.0-14+deb12u1 -libisl23==0.25-1.1 -libmpc3==1.3.1-1 -libubsan1==12.2.0-14+deb12u1 diff --git a/files/build/versions-public/dockers/docker-orchagent/versions-deb-trixie b/files/build/versions-public/dockers/docker-orchagent/versions-deb-trixie new file mode 100644 index 00000000000..54325c6e9fb --- /dev/null +++ b/files/build/versions-public/dockers/docker-orchagent/versions-deb-trixie @@ -0,0 +1,79 @@ +arping==2.25-1 +binutils==2.44-3 +binutils-aarch64-linux-gnu==2.44-3 +binutils-common==2.44-3 +bridge-utils==1.7.1-4+b1 +conntrack==1:1.4.8-2 +cpp==4:14.2.0-1 +cpp-14==14.2.0-19 +cpp-14-aarch64-linux-gnu==14.2.0-19 +cpp-aarch64-linux-gnu==4:14.2.0-1 +gcc-14==14.2.0-19 +gcc-14-aarch64-linux-gnu==14.2.0-19 +gcc-aarch64-linux-gnu==4:14.2.0-1 +gdb==16.3-1 +gdbserver==16.3-1 +ifupdown==0.8.44+deb13u1 +libasan8==14.2.0-19 +libbabeltrace1==1.5.11-4+b2 +libbinutils==2.44-3 +libcbor0.10==0.10.2-2 +libcc1-0==14.2.0-19 +libctf-nobfd0==2.44-3 +libctf0==2.44-3 +libcurl3t64-gnutls==8.14.1-2+deb13u3 +libdebuginfod-common==0.192-4 +libdebuginfod1t64==0.192-4 +libdw1t64==0.192-4 +libedit2==3.1-20250104-1 +libfido2-1==1.15.0-1+b1 +libgcc-14-dev==14.2.0-19 +libglib2.0-0t64==2.84.4-3~deb13u3 +libgomp1==14.2.0-19 +libgpm2==1.20.7-11+b2 +libgprofng0==2.44-3 +libhwasan0==14.2.0-19 +libipt2==2.1.2-1 +libisl23==0.27-1 +libitm1==14.2.0-19 +libjson-c5==0.18+ds-1 +libkmod2==34.2-2 +liblsan0==14.2.0-19 +libmpc3==1.3.1-1+b3 +libmpfr6==4.2.2-1 +libnet1==1.3+dfsg-2 +libnetfilter-conntrack3==1.1.0-1 +libnfnetlink0==1.0.2-3 +libngtcp2-16==1.11.0-1+deb13u1 +libngtcp2-crypto-gnutls8==1.11.0-1+deb13u1 +libpcap0.8t64==1.10.5-2 +libpci3==1:3.13.0-2 +libsairedis-dbgsym==1.0.0 +libsframe1==2.44-3 +libsource-highlight-common==3.1.9-4.3 +libsource-highlight4t64==3.1.9-4.3+b1 +libswsscommon-dbgsym==1.0.0 +libtext-charwidth-perl==0.04-11+b4 +libtext-wrapi18n-perl==0.06-10 +libtsan2==14.2.0-19 +libubsan1==14.2.0-19 +libunwind8==1.8.1-0.1 +libyang3-dbgsym==3.12.2-1 +ndisc6==1.0.7-1 +ndppd==0.2.5-6 +openssh-client==1:10.0p1-7+fips +pci.ids==0.0~2025.06.09-1 +pciutils==1:3.13.0-2 +python3-netifaces==0.11.0-2+b6 +python3-protobuf==3.21.12-11 +python3-swsscommon-dbgsym==1.0.0 +sensible-utils==0.0.25 +sonic-db-cli-dbgsym==1.0.0 +sonic-eventd-dbgsym==1.0.0-0 +sshpass==1.10-0.1 +strace==6.13+ds-1 +swss-dbg==1.0.0 +tcpdump==4.99.5-2 +ucf==3.0052 +vim==2:9.1.1230-2 +vim-runtime==2:9.1.1230-2 diff --git a/files/build/versions-public/dockers/docker-orchagent/versions-deb-trixie-arm64 b/files/build/versions-public/dockers/docker-orchagent/versions-deb-trixie-arm64 new file mode 100644 index 00000000000..1166c7105d1 --- /dev/null +++ b/files/build/versions-public/dockers/docker-orchagent/versions-deb-trixie-arm64 @@ -0,0 +1,5 @@ +arping==2.25-1+b1 +bridge-utils==1.7.1-4 +conntrack==1:1.4.8-2+b1 +ndisc6==1.0.7-1+b1 +ndppd==0.2.5-6+b1 diff --git a/files/build/versions-public/dockers/docker-orchagent/versions-deb-trixie-armhf b/files/build/versions-public/dockers/docker-orchagent/versions-deb-trixie-armhf new file mode 100644 index 00000000000..f749696894d --- /dev/null +++ b/files/build/versions-public/dockers/docker-orchagent/versions-deb-trixie-armhf @@ -0,0 +1,6 @@ +binutils-arm-linux-gnueabihf==2.44-3 +bridge-utils==1.7.1-4 +cpp-14-arm-linux-gnueabihf==14.2.0-19 +cpp-arm-linux-gnueabihf==4:14.2.0-1 +gcc-14-arm-linux-gnueabihf==14.2.0-19 +gcc-arm-linux-gnueabihf==4:14.2.0-1 diff --git a/files/build/versions-public/dockers/docker-platform-monitor/versions-deb-bookworm b/files/build/versions-public/dockers/docker-platform-monitor/versions-deb-bookworm deleted file mode 100644 index d6645adb220..00000000000 --- a/files/build/versions-public/dockers/docker-platform-monitor/versions-deb-bookworm +++ /dev/null @@ -1,151 +0,0 @@ -binutils==2.40-2 -binutils-common==2.40-2 -binutils-x86-64-linux-gnu==2.40-2 -bzip2==1.0.8-5+b1 -cpp==4:12.2.0-3 -cpp-12==12.2.0-14+deb12u1 -dbus==1.14.10-1~deb12u1 -dbus-bin==1.14.10-1~deb12u1 -dbus-daemon==1.14.10-1~deb12u1 -dbus-session-bus-common==1.14.10-1~deb12u1 -dbus-system-bus-common==1.14.10-1~deb12u1 -dmidecode==3.4-1 -dpkg-dev==1.21.22 -ethtool==1:6.1-1 -fancontrol==1:3.6.0-7.1 -fontconfig==2.14.1-4 -fontconfig-config==2.14.1-4 -fonts-dejavu-core==2.37-6 -freeipmi-common==1.6.10-1 -g++==4:12.2.0-3 -g++-12==12.2.0-14+deb12u1 -gcc==4:12.2.0-3 -gcc-12==12.2.0-14+deb12u1 -gdb==13.1-3 -gdbserver==13.1-3 -i2c-tools==4.3-2+b3 -ipmitool==1.8.19-4+deb12u2 -iputils-ping==3:20221126-1+deb12u1 -libapparmor1==3.0.8-3 -libasan8==12.2.0-14+deb12u1 -libbabeltrace1==1.5.11-1+b2 -libbinutils==2.40-2 -libboost-regex1.74.0==1.74.0+ds1-21 -libc-dev-bin==2.36-9+deb12u13 -libc6-dev==2.36-9+deb12u13 -libcairo2==1.16.0-7 -libcbor0.8==0.8.0-2+b1 -libcc1-0==12.2.0-14+deb12u1 -libcrypt-dev==1:4.4.33-2 -libctf-nobfd0==2.40-2 -libctf0==2.40-2 -libcurl3-gnutls==7.88.1-10+deb12u14 -libdatrie1==0.2.13-2+b1 -libdbi1==0.9.0-6 -libdebuginfod-common==0.188-2.1 -libdebuginfod1==0.188-2.1 -libdpkg-perl==1.21.22 -libdw1==0.188-2.1 -libedit2==3.1-20221030-2 -libexpat1-dev==2.5.0-1+deb12u2 -libfido2-1==1.12.0-2+b1 -libfontconfig1==2.14.1-4 -libfreeipmi17==1.6.10-1+b1 -libfreetype6==2.12.1+dfsg-5+deb12u4 -libfribidi0==1.0.8-2.1 -libgcc-12-dev==12.2.0-14+deb12u1 -libglib2.0-0==2.74.6-2+deb12u7 -libgomp1==12.2.0-14+deb12u1 -libgpm2==1.20.7-10+b1 -libgprofng0==2.40-2 -libgraphite2-3==1.3.14-1 -libharfbuzz0b==6.0.0+dfsg-3 -libi2c0==4.3-2+b3 -libicu72==72.1-3+deb12u1 -libipt2==2.0.5-1 -libisl23==0.25-1.1 -libitm1==12.2.0-14+deb12u1 -libjs-jquery==3.6.1+dfsg+~3.5.14-1 -libjs-sphinxdoc==5.3.0-4 -libjs-underscore==1.13.4~dfsg+~1.11.4-3 -libjson-c5==0.16-2 -libkmod2==30+20221128-1 -liblsan0==12.2.0-14+deb12u1 -libmpc3==1.3.1-1 -libmpfr6==4.2.0-1 -libnsl-dev==1.3.0-2 -libnvme1==1.3-1+deb12u1 -libpango-1.0-0==1.50.12+ds-1 -libpangocairo-1.0-0==1.50.12+ds-1 -libpangoft2-1.0-0==1.50.12+ds-1 -libpci3==1:3.9.0-4 -libpixman-1-0==0.42.2-1 -libpng16-16==1.6.39-2+deb12u1 -libpython3-dev==3.11.2-1+b1 -libpython3.11-dev==3.11.2-6+deb12u6 -libquadmath0==12.2.0-14+deb12u1 -librrd-dev==1.7.2-4+b8 -librrd8==1.7.2-4+b8 -libsensors-config==1:3.6.0-7.1 -libsensors5==1:3.6.0-7.1 -libsensors5-dbgsym==1:3.6.0-7.1 -libsource-highlight-common==3.1.9-4.2 -libsource-highlight4v5==3.1.9-4.2+b3 -libssl-dev==3.0.17-1~deb12u3 -libssl3==3.0.17-1~deb12u3 -libstdc++-12-dev==12.2.0-14+deb12u1 -libswsscommon-dbgsym==1.0.0 -libthai-data==0.1.29-1 -libthai0==0.1.29-1 -libtirpc-dev==1.3.3+ds-1 -libtsan2==12.2.0-14+deb12u1 -libubsan1==12.2.0-14+deb12u1 -libunwind8==1.6.2-3 -libx11-6==2:1.8.4-2+deb12u2 -libx11-data==2:1.8.4-2+deb12u2 -libxau6==1:1.0.9-1 -libxcb-render0==1.15-1 -libxcb-shm0==1.15-1 -libxcb1==1.15-1 -libxdmcp6==1:1.1.2-3 -libxext6==2:1.3.4-1+b1 -libxml2==2.9.14+dfsg-1.3~deb12u4 -libxrender1==1:0.9.10-1.1 -libyang-cpp-dbgsym==1.0.73 -linux-libc-dev==6.1.158-1 -lm-sensors==1:3.6.0-7.1 -lm-sensors-dbgsym==1:3.6.0-7.1 -make==4.3-4.1 -nvme-cli==2.4+really2.3-3 -openssh-client==1:9.2p1-2+deb12u7 -openssl==3.0.17-1~deb12u3 -patch==2.7.6-7 -pci.ids==0.0~2023.04.11-1 -pciutils==1:3.9.0-4 -psmisc==23.6-1 -python3-attr==22.2.0-1 -python3-jsonschema==4.10.3-1 -python3-netifaces==0.11.0-2+b1 -python3-pyrsistent==0.18.1-1+b3 -python3-smbus==4.3-2+b3 -python3-swsscommon-dbgsym==1.0.0 -python3-yang-dbgsym==1.0.73 -python3.11-dev==3.11.2-6+deb12u6 -rpcsvc-proto==1.4.3-1 -rrdtool==1.7.2-4+b8 -sensible-utils==0.0.17+nmu1 -sensord==1:3.6.0-7.1 -sensord-dbgsym==1:3.6.0-7.1 -smartmontools==7.4-2~bpo12+1 -sonic-db-cli-dbgsym==1.0.0 -sonic-eventd-dbgsym==1.0.0-0 -sshpass==1.09-1+b1 -strace==6.1-0.1 -ucf==3.0043+nmu1+deb12u1 -udev==252.39-1~deb12u1 -uuid-runtime==2.38.1-5+deb12u3 -vim==2:9.0.1378-2+deb12u2 -vim-runtime==2:9.0.1378-2+deb12u2 -xxd==2:9.0.1378-2+deb12u2 -xz-utils==5.4.1-1 -zlib1g-dev==1:1.2.13.dfsg-1 diff --git a/files/build/versions-public/dockers/docker-platform-monitor/versions-deb-bookworm-arm64 b/files/build/versions-public/dockers/docker-platform-monitor/versions-deb-bookworm-arm64 deleted file mode 100644 index 435661ecfe0..00000000000 --- a/files/build/versions-public/dockers/docker-platform-monitor/versions-deb-bookworm-arm64 +++ /dev/null @@ -1,2 +0,0 @@ -binutils-aarch64-linux-gnu==2.40-2 -libhwasan0==12.2.0-14+deb12u1 diff --git a/files/build/versions-public/dockers/docker-platform-monitor/versions-deb-bookworm-armhf b/files/build/versions-public/dockers/docker-platform-monitor/versions-deb-bookworm-armhf deleted file mode 100644 index 76806cf3ac6..00000000000 --- a/files/build/versions-public/dockers/docker-platform-monitor/versions-deb-bookworm-armhf +++ /dev/null @@ -1 +0,0 @@ -binutils-arm-linux-gnueabihf==2.40-2 diff --git a/files/build/versions-public/dockers/docker-platform-monitor/versions-deb-trixie b/files/build/versions-public/dockers/docker-platform-monitor/versions-deb-trixie new file mode 100644 index 00000000000..32db092a331 --- /dev/null +++ b/files/build/versions-public/dockers/docker-platform-monitor/versions-deb-trixie @@ -0,0 +1,168 @@ +binutils==2.44-3 +binutils-aarch64-linux-gnu==2.44-3 +binutils-common==2.44-3 +binutils-x86-64-linux-gnu==2.44-3 +bzip2==1.0.8-6 +cpp==4:14.2.0-1 +cpp-14==14.2.0-19 +cpp-14-aarch64-linux-gnu==14.2.0-19 +cpp-14-x86-64-linux-gnu==14.2.0-19 +cpp-aarch64-linux-gnu==4:14.2.0-1 +cpp-x86-64-linux-gnu==4:14.2.0-1 +dbus==1.16.2-2 +dbus-bin==1.16.2-2 +dbus-daemon==1.16.2-2 +dbus-session-bus-common==1.16.2-2 +dbus-system-bus-common==1.16.2-2 +dmidecode==3.6-2 +dpkg-dev==1.22.22 +ethtool==1:6.14.2-1 +fancontrol==1:3.6.0-7.1 +fontconfig==2.15.0-2.3 +fontconfig-config==2.15.0-2.3 +fonts-dejavu-core==2.37-8 +fonts-dejavu-mono==2.37-8 +freeipmi-common==1.6.15-1 +g++==4:14.2.0-1 +g++-14==14.2.0-19 +g++-14-aarch64-linux-gnu==14.2.0-19 +g++-14-x86-64-linux-gnu==14.2.0-19 +g++-aarch64-linux-gnu==4:14.2.0-1 +g++-x86-64-linux-gnu==4:14.2.0-1 +gcc==4:14.2.0-1 +gcc-14==14.2.0-19 +gcc-14-aarch64-linux-gnu==14.2.0-19 +gcc-14-x86-64-linux-gnu==14.2.0-19 +gcc-aarch64-linux-gnu==4:14.2.0-1 +gcc-x86-64-linux-gnu==4:14.2.0-1 +gdb==16.3-1 +gdbserver==16.3-1 +i2c-tools==4.4-2 +ipmitool==1.8.19-9 +iputils-ping==3:20240905-3 +kmod==34.2-2 +libapparmor1==4.1.0-1 +libasan8==14.2.0-19 +libbabeltrace1==1.5.11-4+b2 +libbinutils==2.44-3 +libc-dev-bin==2.41-12+deb13u3 +libc6-dev==2.41-12+deb13u3 +libcairo2==1.18.4-1+b1 +libcbor0.10==0.10.2-2 +libcc1-0==14.2.0-19 +libcrypt-dev==1:4.4.38-1 +libctf-nobfd0==2.44-3 +libctf0==2.44-3 +libcurl3t64-gnutls==8.14.1-2+deb13u3 +libdatrie1==0.2.13-3+b1 +libdbi1t64==0.9.0-6.1+b1 +libdebuginfod-common==0.192-4 +libdebuginfod1t64==0.192-4 +libdpkg-perl==1.22.22 +libdw1t64==0.192-4 +libedit2==3.1-20250104-1 +libexpat1-dev==2.7.1-2 +libfido2-1==1.15.0-1+b1 +libfontconfig1==2.15.0-2.3 +libfreeipmi17==1.6.15-1 +libfreetype6==2.13.3+dfsg-1+deb13u1 +libfribidi0==1.0.16-1 +libgcc-14-dev==14.2.0-19 +libgcrypt20==1.11.0-7+deb13u1 +libglib2.0-0t64==2.84.4-3~deb13u3 +libgomp1==14.2.0-19 +libgpg-error0==1.51-4 +libgpm2==1.20.7-11+b2 +libgprofng0==2.44-3 +libgraphite2-3==1.3.14-2+b1 +libharfbuzz0b==10.2.0-1+deb13u1 +libhwasan0==14.2.0-19 +libi2c0==4.4-2 +libipt2==2.1.2-1 +libisl23==0.27-1 +libitm1==14.2.0-19 +libjs-jquery==3.6.1+dfsg+~3.5.14-1 +libjs-sphinxdoc==8.1.3-5 +libjs-underscore==1.13.4~dfsg+~1.11.4-3 +libjson-c5==0.18+ds-1 +libkmod2==34.2-2 +liblsan0==14.2.0-19 +libmpc3==1.3.1-1+b3 +libmpfr6==4.2.2-1 +libngtcp2-16==1.11.0-1+deb13u1 +libngtcp2-crypto-gnutls8==1.11.0-1+deb13u1 +libnvme1t64==1.13-2 +libpango-1.0-0==1.56.3-1 +libpangocairo-1.0-0==1.56.3-1 +libpangoft2-1.0-0==1.56.3-1 +libpci3==1:3.13.0-2 +libpixman-1-0==0.44.0-3 +libpng16-16t64==1.6.48-1+deb13u5 +libpython3-dev==3.13.5-1 +libpython3.13-dev==3.13.5-2+deb13u2 +libquadmath0==14.2.0-19 +librrd-dev==1.7.2-4.2+b5 +librrd8t64==1.7.2-4.2+b5 +libsensors-config==1:3.6.2-2 +libsensors5==1:3.6.0-7.1 +libsensors5-dbgsym==1:3.6.0-7.1 +libsframe1==2.44-3 +libsource-highlight-common==3.1.9-4.3 +libsource-highlight4t64==3.1.9-4.3+b1 +libstdc++-14-dev==14.2.0-19 +libswsscommon-dbgsym==1.0.0 +libsystemd-shared==257.13-1~deb13u1 +libtext-charwidth-perl==0.04-11+b4 +libtext-wrapi18n-perl==0.06-10 +libthai-data==0.1.29-2 +libthai0==0.1.29-2+b1 +libtsan2==14.2.0-19 +libubsan1==14.2.0-19 +libunwind8==1.8.1-0.1 +libx11-6==2:1.8.12-1 +libx11-data==2:1.8.12-1 +libxau6==1:1.0.11-1 +libxcb-render0==1.17.0-2+b1 +libxcb-shm0==1.17.0-2+b1 +libxcb1==1.17.0-2+b1 +libxdmcp6==1:1.1.5-1 +libxext6==2:1.3.4-1+b3 +libxml2==2.12.7+dfsg+really2.9.14-2.1+deb13u2 +libxrender1==1:0.9.12-1 +libyang3-dbgsym==3.12.2-1 +linux-libc-dev==6.12.90-2 +lm-sensors==1:3.6.0-7.1 +lm-sensors-dbgsym==1:3.6.0-7.1 +make==4.4.1-2 +mft==4.36.0-147 +mlxbf-bootctl==2.1 +nvme-cli==2.13-2 +openssh-client==1:10.0p1-7+fips +patch==2.8-2 +pci.ids==0.0~2025.06.09-1 +pciutils==1:3.13.0-2 +psmisc==23.7-2 +python3-bottle==0.13.2-1.1 +python3-netifaces==0.11.0-2+b6 +python3-smbus==4.4-2 +python3-swsscommon-dbgsym==1.0.0 +python3.13-dev==3.13.5-2+deb13u2 +rpcsvc-proto==1.4.3-1 +rrdtool==1.7.2-4.2+b5 +sensible-utils==0.0.25 +sensord==1:3.6.0-7.1 +sensord-dbgsym==1:3.6.0-7.1 +smartmontools==7.4-3 +sonic-db-cli-dbgsym==1.0.0 +sonic-eventd-dbgsym==1.0.0-0 +sshpass==1.10-0.1 +strace==6.13+ds-1 +systemd==257.13-1~deb13u1 +ucf==3.0052 +udev==257.13-1~deb13u1 +uuid-runtime==2.41-5 +vim==2:9.1.1230-2 +vim-runtime==2:9.1.1230-2 +xxd==2:9.1.1230-2 +xz-utils==5.8.1-1 +zlib1g-dev==1:1.3.dfsg+really1.3.1-1+b1 diff --git a/files/build/versions-public/dockers/docker-platform-monitor/versions-deb-trixie-armhf b/files/build/versions-public/dockers/docker-platform-monitor/versions-deb-trixie-armhf new file mode 100644 index 00000000000..3f0b4b163a6 --- /dev/null +++ b/files/build/versions-public/dockers/docker-platform-monitor/versions-deb-trixie-armhf @@ -0,0 +1,7 @@ +binutils-arm-linux-gnueabihf==2.44-3 +cpp-14-arm-linux-gnueabihf==14.2.0-19 +cpp-arm-linux-gnueabihf==4:14.2.0-1 +g++-14-arm-linux-gnueabihf==14.2.0-19 +g++-arm-linux-gnueabihf==4:14.2.0-1 +gcc-14-arm-linux-gnueabihf==14.2.0-19 +gcc-arm-linux-gnueabihf==4:14.2.0-1 diff --git a/files/build/versions-public/dockers/docker-platform-monitor/versions-py3 b/files/build/versions-public/dockers/docker-platform-monitor/versions-py3 index 3c5702ddaf8..7e7243c70c3 100644 --- a/files/build/versions-public/dockers/docker-platform-monitor/versions-py3 +++ b/files/build/versions-public/dockers/docker-platform-monitor/versions-py3 @@ -1,23 +1,24 @@ -attrs==22.2.0 blkinfo==0.2.0 -build==1.3.0 -certifi==2025.11.12 -charset-normalizer==3.4.4 +bottle==0.13.2 +build==1.5.0 +certifi==2026.6.17 +charset-normalizer==3.4.7 enum34==1.1.10 -grpcio==1.51.1 -grpcio-tools==1.51.1 +grpcio==1.71.0 +grpcio-tools==1.71.0 guacamole==0.9.2 -idna==3.11 +idna==3.18 inotify==0.2.12 jsonschema==2.6.0 libpci==0.2 netifaces==0.11.0 -packaging==25.0 -protobuf==4.25.8 -psutil==7.1.3 +protobuf==5.29.6 +psutil==7.2.2 pyproject_hooks==1.2.0 -pyrsistent==0.18.1 -requests==2.32.5 -smbus2==0.5.0 +python-dateutil==2.9.0.post0 +requests==2.34.2 +six==1.17.0 +smbus==1.1 +smbus2==0.6.1 thrift==0.13.0 -urllib3==2.6.2 +urllib3==2.7.0 diff --git a/files/build/versions-public/dockers/docker-ptf/versions-deb-bookworm b/files/build/versions-public/dockers/docker-ptf/versions-deb-bookworm index 5b8f802b160..fb23716af8b 100644 --- a/files/build/versions-public/dockers/docker-ptf/versions-deb-bookworm +++ b/files/build/versions-public/dockers/docker-ptf/versions-deb-bookworm @@ -7,6 +7,8 @@ at-spi2-core==2.46.0-5 autoconf==2.71-3 automake==1:1.16.5-1.3 autotools-dev==20220109.1 +base-files==12.4+deb12u14 +bash==5.2.15-2+b13 binutils==2.40-2 binutils-common==2.40-2 binutils-x86-64-linux-gnu==2.40-2 @@ -33,9 +35,10 @@ dbus-user-session==1.14.10-1~deb12u1 dconf-gsettings-backend==0.40.0-4 dconf-service==0.40.0-4 diffstat==1.65-1 -dirmngr==2.2.40-1.1+deb12u1 +dirmngr==2.2.40-1.1+deb12u2 dmsetup==2:1.02.185-2 -dpkg-dev==1.21.22 +dpkg==1.21.23 +dpkg-dev==1.21.23 ed==1.19-1 ethtool==1:6.1-1 fakeroot==1.31-1.2 @@ -60,26 +63,27 @@ gettext-base==0.21-12 gfortran==4:12.2.0-3 gfortran-12==12.2.0-14+deb12u1 gir1.2-glib-2.0==1.74.0-3 -git==1:2.39.5-0+deb12u2 -git-man==1:2.39.5-0+deb12u2 -gnupg==2.2.40-1.1+deb12u1 -gnupg-l10n==2.2.40-1.1+deb12u1 -gnupg-utils==2.2.40-1.1+deb12u1 -gpg==2.2.40-1.1+deb12u1 -gpg-agent==2.2.40-1.1+deb12u1 -gpg-wks-client==2.2.40-1.1+deb12u1 -gpg-wks-server==2.2.40-1.1+deb12u1 -gpgconf==2.2.40-1.1+deb12u1 -gpgsm==2.2.40-1.1+deb12u1 +git==1:2.39.5-0+deb12u3 +git-man==1:2.39.5-0+deb12u3 +gnmic==0.43.0 +gnupg==2.2.40-1.1+deb12u2 +gnupg-l10n==2.2.40-1.1+deb12u2 +gnupg-utils==2.2.40-1.1+deb12u2 +gpg==2.2.40-1.1+deb12u2 +gpg-agent==2.2.40-1.1+deb12u2 +gpg-wks-client==2.2.40-1.1+deb12u2 +gpg-wks-server==2.2.40-1.1+deb12u2 +gpgconf==2.2.40-1.1+deb12u2 +gpgsm==2.2.40-1.1+deb12u2 gsettings-desktop-schemas==43.0-1 -gstreamer1.0-gl==1.22.0-3+deb12u5 -gstreamer1.0-plugins-base==1.22.0-3+deb12u5 +gstreamer1.0-gl==1.22.0-3+deb12u6 +gstreamer1.0-plugins-base==1.22.0-3+deb12u6 gtk-update-icon-cache==3.24.38-2~deb12u3 hicolor-icon-theme==0.17-2 hping3==3.a2.ds2-10 ibverbs-providers==44.0-2 icu-devtools==72.1-3+deb12u1 -inetutils-telnet==2:2.4-2+deb12u1 +inetutils-telnet==2:2.4-2+deb12u3 iproute2==6.1.0-3 iptables==1.8.9-2 iputils-ping==3:20221126-1+deb12u1 @@ -88,7 +92,7 @@ iso-codes==4.15.0-1 isympy-common==1.11.1-1 isympy3==1.11.1-1 javascript-common==11+nmu1 -krb5-locales==1.20.1-2+deb12u4 +krb5-locales==1.20.1-2+deb12u5 less==590-2.1~deb12u2 lib32gcc-s1==12.2.0-14+deb12u1 lib32stdc++6==12.2.0-14+deb12u1 @@ -99,7 +103,7 @@ libalgorithm-diff-xs-perl==0.04-8+b1 libalgorithm-merge-perl==0.08-5 libaom3==3.6.0-1+deb12u2 libapparmor1==3.0.8-3 -libarchive13==3.6.2-1+deb12u3 +libarchive13==3.6.2-1+deb12u4 libargon2-1==0~20171227-0.3+deb12u1 libasan8==12.2.0-14+deb12u1 libasound2==1.2.8-1+b1 @@ -120,6 +124,7 @@ libbcg729-0==1.1.1-2 libbinutils==2.40-2 libblas3==3.11.0-2 libboost-atomic1.74.0==1.74.0+ds1-21 +libboost-atomic1.81.0==1.81.0-5+deb12u1 libboost-atomic1.83-dev==1.83.0-4.2~bpo12+1 libboost-atomic1.83.0==1.83.0-4.2~bpo12+1 libboost-chrono1.83-dev==1.83.0-4.2~bpo12+1 @@ -195,15 +200,18 @@ libbrotli1==1.0.9-2+b6 libbsd0==0.11.7-2 libc-ares-dev==1.18.1-3 libc-ares2==1.18.1-3 -libc-dev-bin==2.36-9+deb12u13 -libc-devtools==2.36-9+deb12u13 -libc6-dbg==2.36-9+deb12u13 -libc6-dev==2.36-9+deb12u13 -libc6-i386==2.36-9+deb12u13 +libc-bin==2.36-9+deb12u14 +libc-dev-bin==2.36-9+deb12u14 +libc-devtools==2.36-9+deb12u14 +libc6==2.36-9+deb12u14 +libc6-dbg==2.36-9+deb12u14 +libc6-dev==2.36-9+deb12u14 +libc6-i386==2.36-9+deb12u14 libcaf-openmpi-3==2.10.1-1+b1 libcairo-gobject2==1.16.0-7 libcairo2==1.16.0-7 -libcap2-bin==1:2.66-4+deb12u2 +libcap2==1:2.66-4+deb12u3+b1 +libcap2-bin==1:2.66-4+deb12u3+b1 libcbor0.8==0.8.0-2+b1 libcc1-0==12.2.0-14+deb12u1 libcdparanoia0==3.10.2+debian-14 @@ -226,7 +234,7 @@ libcurl4==7.88.1-10+deb12u14 libdaemon0==0.14-7.1 libdatrie1==0.2.13-2+b1 libdav1d6==1.0.0-2+deb12u1 -libdbi-perl==1.643-4 +libdbi-perl==1.643-4+deb12u1 libdbus-1-3==1.14.10-1~deb12u1 libdbus-1-dev==1.14.10-1~deb12u1 libdconf1==0.40.0-4 @@ -236,7 +244,7 @@ libdebuginfod1==0.188-2.1 libdeflate0==1.14-1 libdevmapper1.02.1==2:1.02.185-2 libdouble-conversion3==3.2.1-1 -libdpkg-perl==1.21.22 +libdpkg-perl==1.21.23 libdrm-amdgpu1==2.4.114-1+b1 libdrm-common==2.4.114-1 libdrm-intel1==2.4.114-1+b1 @@ -280,25 +288,27 @@ libgbm1==22.3.6-1+deb12u1 libgc-dev==1:8.2.2-3 libgc1==1:8.2.2-3 libgcc-12-dev==12.2.0-14+deb12u1 +libgcrypt20==1.10.1-3+deb12u1 libgd3==2.3.3-9 libgdbm-compat4==1.23-3 libgdbm6==1.23-3 -libgdk-pixbuf-2.0-0==2.42.10+dfsg-1+deb12u2 -libgdk-pixbuf2.0-bin==2.42.10+dfsg-1+deb12u2 -libgdk-pixbuf2.0-common==2.42.10+dfsg-1+deb12u2 +libgdk-pixbuf-2.0-0==2.42.10+dfsg-1+deb12u4 +libgdk-pixbuf2.0-bin==2.42.10+dfsg-1+deb12u4 +libgdk-pixbuf2.0-common==2.42.10+dfsg-1+deb12u4 libgfortran-12-dev==12.2.0-14+deb12u1 libgfortran5==12.2.0-14+deb12u1 libgirepository-1.0-1==1.74.0-3 libgl1==1.6.0-1 libgl1-mesa-dri==22.3.6-1+deb12u1 libglapi-mesa==22.3.6-1+deb12u1 -libglib2.0-0==2.74.6-2+deb12u7 -libglib2.0-data==2.74.6-2+deb12u7 +libglib2.0-0==2.74.6-2+deb12u9 +libglib2.0-data==2.74.6-2+deb12u9 libglvnd0==1.6.0-1 libglx-mesa0==22.3.6-1+deb12u1 libglx0==1.6.0-1 libgmp-dev==2:6.2.1+dfsg1-1.1 libgmpxx4ldbl==2:6.2.1+dfsg1-1.1 +libgnutls30==3.7.9-2+deb12u7 libgomp1==12.2.0-14+deb12u1 libgpm2==1.20.7-10+b1 libgprofng0==2.40-2 @@ -308,9 +318,9 @@ libgrpc++-dev==1.51.1-3+b1 libgrpc++1.51==1.51.1-3+b1 libgrpc-dev==1.51.1-3+b1 libgrpc29==1.51.1-3+b1 -libgssapi-krb5-2==1.20.1-2+deb12u4 -libgstreamer-gl1.0-0==1.22.0-3+deb12u5 -libgstreamer-plugins-base1.0-0==1.22.0-3+deb12u5 +libgssapi-krb5-2==1.20.1-2+deb12u5 +libgstreamer-gl1.0-0==1.22.0-3+deb12u6 +libgstreamer-plugins-base1.0-0==1.22.0-3+deb12u6 libgstreamer1.0-0==1.22.0-2+deb12u1 libgtk-3-0==3.24.38-2~deb12u3 libgtk-3-bin==3.24.38-2~deb12u3 @@ -327,8 +337,8 @@ libice6==2:1.0.10-1 libicu-dev==72.1-3+deb12u1 libicu72==72.1-3+deb12u1 libimagequant0==2.17.0-1 -libinput-bin==1.22.1-1 -libinput10==1.22.1-1 +libinput-bin==1.22.1-1+deb12u1 +libinput10==1.22.1-1+deb12u1 libip4tc2==1.8.9-2 libip6tc2==1.8.9-2 libipt2==2.0.5-1 @@ -343,14 +353,14 @@ libjs-sphinxdoc==5.3.0-4 libjs-underscore==1.13.4~dfsg+~1.11.4-3 libjson-c5==0.16-2 libjsoncpp25==1.9.5-4 -libk5crypto3==1.20.1-2+deb12u4 +libk5crypto3==1.20.1-2+deb12u5 libkeyutils1==1.6.3-2 libkmod2==30+20221128-1 -libkrb5-3==1.20.1-2+deb12u4 -libkrb5support0==1.20.1-2+deb12u4 +libkrb5-3==1.20.1-2+deb12u5 +libkrb5support0==1.20.1-2+deb12u5 libksba8==1.6.3-2 liblapack3==3.11.0-2 -liblcms2-2==2.14-2 +liblcms2-2==2.14-2+deb12u1 libldap-2.5-0==2.5.13+dfsg-5 libldap-common==2.5.13+dfsg-5 liblerc4==4.0.0+ds-2 @@ -373,7 +383,7 @@ libmpc3==1.3.1-1 libmpfr6==4.2.0-1 libmpg123-0==1.31.2-1+deb12u1 libmtdev1==1.1.6-1 -libmunge2==0.5.15-2 +libmunge2==0.5.15-2+deb12u1 libnanomsg-dev==1.1.5+dfsg-1.1+b1 libnanomsg5==1.1.5+dfsg-1.1+b1 libncurses-dev==6.4-4 @@ -384,7 +394,7 @@ libnetfilter-conntrack3==1.0.9-3 libnfnetlink0==1.0.2-2 libnftables1==1.0.6-2+deb12u2 libnftnl11==1.2.4-2 -libnghttp2-14==1.52.0-1+deb12u2 +libnghttp2-14==1.52.0-1+deb12u3 libnl-3-200==3.7.0-0.2+b1 libnl-3-dev==3.7.0-0.2+b1 libnl-cli-3-200==3.7.0-0.2+b1 @@ -396,21 +406,21 @@ libnpth0==1.6-3 libnsl-dev==1.3.0-2 libnsl2==1.3.0-2 libnspr4==2:4.35-1 -libnss-systemd==252.39-1~deb12u1 -libnss3==2:3.87.1-1+deb12u1 +libnss-systemd==252.39-1~deb12u2 +libnss3==2:3.87.1-1+deb12u2 libnuma-dev==2.0.16-1 libnuma1==2.0.16-1 libobjc-12-dev==12.2.0-14+deb12u1 libobjc4==12.2.0-14+deb12u1 libogg0==1.3.5-3 libopenblas0-pthread==0.3.21+ds-4 -libopenjp2-7==2.5.0-2+deb12u2 +libopenjp2-7==2.5.0-2+deb12u3 libopenmpi-dev==4.1.4-3+b1 libopenmpi3==4.1.4-3+b1 libopus0==1.3.1-3 liborc-0.4-0==1:0.4.33-2 -libpam-cap==1:2.66-4+deb12u2 -libpam-systemd==252.39-1~deb12u1 +libpam-cap==1:2.66-4+deb12u3+b1 +libpam-systemd==252.39-1~deb12u2 libpango-1.0-0==1.50.12+ds-1 libpangocairo-1.0-0==1.50.12+ds-1 libpangoft2-1.0-0==1.50.12+ds-1 @@ -426,7 +436,7 @@ libpixman-1-0==0.42.2-1 libpkgconf3==1.8.1-1 libpmix-dev==4.2.2-1+deb12u1 libpmix2==4.2.2-1+deb12u1 -libpng16-16==1.6.39-2+deb12u1 +libpng16-16==1.6.39-2+deb12u5 libpopt0==1.19+dfsg-1 libproc2-0==2:4.0.2-3 libprotobuf-dev==3.21.12-3 @@ -440,10 +450,10 @@ libpsm2-2==11.2.185-2 libpulse0==16.1+dfsg1-2+b1 libpython3-dev==3.11.2-1+b1 libpython3-stdlib==3.11.2-1+b1 -libpython3.11==3.11.2-6+deb12u6 -libpython3.11-dev==3.11.2-6+deb12u6 -libpython3.11-minimal==3.11.2-6+deb12u6 -libpython3.11-stdlib==3.11.2-6+deb12u6 +libpython3.11==3.11.2-6+deb12u7 +libpython3.11-dev==3.11.2-6+deb12u7 +libpython3.11-minimal==3.11.2-6+deb12u7 +libpython3.11-stdlib==3.11.2-6+deb12u7 libqhull-r8.0==2020.2-5 libqt5core5a==5.15.8+dfsg-11+deb12u3 libqt5dbus5==5.15.8+dfsg-11+deb12u3 @@ -482,19 +492,20 @@ libsm6==2:1.2.3-1 libsmi2ldbl==0.4.8+dfsg2-16 libsnappy1v5==1.1.9-3 libsndfile1==1.2.0-1+deb12u1 -libsodium23==1.0.18-1 +libsodium23==1.0.18-1+deb12u1 libsource-highlight-common==3.1.9-4.2 libsource-highlight4v5==3.1.9-4.2+b3 libspandsp2==0.0.6+dfsg-2+b1 libspeexdsp1==1.2.1-1 libsqlite3-0==3.40.1-2+deb12u2 -libssh-gcrypt-4==0.10.6-0+deb12u1 +libssh-gcrypt-4==0.10.6-0+deb12u2 libssh2-1==1.10.0-3+b1 -libssl-dev==3.0.17-1~deb12u3 -libssl3==3.0.17-1~deb12u3 +libssl-dev==3.0.20-1~deb12u2 +libssl3==3.0.20-1~deb12u2 libstdc++-12-dev==12.2.0-14+deb12u1 libsvtav1enc1==1.4.1+dfsg-1 -libsystemd-shared==252.39-1~deb12u1 +libsystemd-shared==252.39-1~deb12u2 +libsystemd0==252.39-1~deb12u2 libtalloc2==2.4.0-f2 libtcl8.6==8.6.13+dfsg-2 libteam-utils==1.31-1 @@ -505,7 +516,7 @@ libthai0==0.1.29-1 libtheora0==1.1.1+dfsg.1-16.1+deb12u1 libthrift-0.17.0==0.17.0-2+b2 libthrift-dev==0.17.0-2+b2 -libtiff6==4.5.0-6+deb12u3 +libtiff6==4.5.0-6+deb12u4 libtinfo-dev==6.4-4 libtirpc-common==1.3.3+ds-1 libtirpc-dev==1.3.3+ds-1 @@ -515,6 +526,7 @@ libtool==2.4.7-7~deb12u1 libtsan2==12.2.0-14+deb12u1 libubsan1==12.2.0-14+deb12u1 libucx0==1.13.1-1 +libudev1==252.39-1~deb12u2 libunwind8==1.6.2-3 libutempter0==1.2.1-3 libuv1==1.44.2-1+deb12u1 @@ -527,16 +539,16 @@ libwayland-client0==1.21.0-1 libwayland-cursor0==1.21.0-1 libwayland-egl1==1.21.0-1 libwayland-server0==1.21.0-1 -libwbclient0==2:4.17.12+dfsg-0+deb12u2 +libwbclient0==2:4.17.12+dfsg-0+deb12u4 libwebp7==1.2.4-0.2+deb12u1 libwebpdemux2==1.2.4-0.2+deb12u1 libwebpmux3==1.2.4-0.2+deb12u1 -libwireshark-data==4.0.17-0+deb12u1 -libwireshark16==4.0.17-0+deb12u1 -libwiretap13==4.0.17-0+deb12u1 +libwireshark-data==4.0.17-0+deb12u3 +libwireshark16==4.0.17-0+deb12u3 +libwiretap13==4.0.17-0+deb12u3 libwrap0==7.6.q-32 libwrap0-dev==7.6.q-32 -libwsutil14==4.0.17-0+deb12u1 +libwsutil14==4.0.17-0+deb12u3 libx11-6==2:1.8.4-2+deb12u2 libx11-data==2:1.8.4-2+deb12u2 libx11-xcb1==2:1.8.4-2+deb12u2 @@ -572,15 +584,15 @@ libxi6==2:1.8-1+b1 libxinerama1==2:1.1.4-3 libxkbcommon-x11-0==1.5.0-1 libxkbcommon0==1.5.0-1 -libxml2==2.9.14+dfsg-1.3~deb12u4 -libxml2-dev==2.9.14+dfsg-1.3~deb12u4 +libxml2==2.9.14+dfsg-1.3~deb12u5 +libxml2-dev==2.9.14+dfsg-1.3~deb12u5 libxmuu1==2:1.1.3-3 libxnvctrl0==525.85.05-3~deb12u1 libxpm4==1:3.5.12-1.1+deb12u1 libxrandr2==2:1.5.2-2+b1 libxrender1==1:0.9.10-1.1 libxshmfence1==1.3-1 -libxslt1.1==1.1.35-1+deb12u3 +libxslt1.1==1.1.35-1+deb12u4 libxss1==1:1.2.3-1 libxtables12==1.8.9-2 libxtst6==2:1.2.3-1.1 @@ -589,7 +601,7 @@ libyaml-0-2==0.2.5-1 libyuv0==0.0~git20230123.b2528b0-1 libz3-4==4.8.12-3.1 libz3-dev==4.8.12-3.1 -linux-libc-dev==6.1.158-1 +linux-libc-dev==6.1.174-1 llvm==1:14.0-55.7~deb12u1 llvm-14==1:14.0.6-12 llvm-14-dev==1:14.0.6-12 @@ -620,13 +632,13 @@ ntpstat==0.0.0.1-2+b1 ocl-icd-libopencl1==2.3.1-1 openmpi-bin==4.1.4-3+b1 openmpi-common==4.1.4-3 -openssh-client==1:9.2p1-2+deb12u7 -openssh-server==1:9.2p1-2+deb12u7 -openssh-sftp-server==1:9.2p1-2+deb12u7 -openssl==3.0.17-1~deb12u3 -p4lang-bmv2==1.15.0-7 +openssh-client==1:9.2p1-2+deb12u10 +openssh-server==1:9.2p1-2+deb12u10 +openssh-sftp-server==1:9.2p1-2+deb12u10 +openssl==3.0.20-1~deb12u2 +p4lang-bmv2==1.15.0-9 p4lang-p4c==1.2.4.2-2 -p4lang-pi==0.1.0-15 +p4lang-pi==0.1.1-1 patch==2.7.6-7 perl==5.36.0-7+deb12u3 perl-modules-5.36==5.36.0-7+deb12u3 @@ -659,7 +671,7 @@ python3-decorator==5.1.1-3 python3-dev==3.11.2-1+b1 python3-distutils==3.11.2-3 python3-executing==1.2.0-2 -python3-fonttools==4.38.0-1+b1 +python3-fonttools==4.38.0-1+deb12u1 python3-fs==2.4.16-2 python3-gi==3.42.2-3+b1 python3-grpcio==1.51.1-3+b1 @@ -713,10 +725,10 @@ python3-wcwidth==0.2.5+dfsg1-1.1 python3-webencodings==0.5.1-5 python3-wheel==0.38.4-2 python3-yaml==6.0-3+b2 -python3.11==3.11.2-6+deb12u6 -python3.11-dev==3.11.2-6+deb12u6 -python3.11-minimal==3.11.2-6+deb12u6 -python3.11-venv==3.11.2-6+deb12u6 +python3.11==3.11.2-6+deb12u7 +python3.11-dev==3.11.2-6+deb12u7 +python3.11-minimal==3.11.2-6+deb12u7 +python3.11-venv==3.11.2-6+deb12u7 qt5-gtk-platformtheme==5.15.8+dfsg-11+deb12u3 qttranslations5-l10n==5.15.8-2 qtwayland5==5.15.8-2 @@ -725,19 +737,21 @@ readline-common==8.2-1.3 rpcsvc-proto==1.4.3-1 rsyslog==8.2302.0-1+deb12u1 runit-helper==2.15.2 +sed==4.9-1+deb12u1 sensible-utils==0.0.17+nmu1 sgml-base==1.31 shared-mime-info==2.2-1 ssl-cert==1.1.2 -systemd==252.39-1~deb12u1 -systemd-sysv==252.39-1~deb12u1 +systemd==252.39-1~deb12u2 +systemd-sysv==252.39-1~deb12u2 tcpd==7.6.q-32 tcpdump==4.99.3-1 -telnet==0.17+2.4-2+deb12u1 +telnet==0.17+2.4-2+deb12u3 thrift-compiler==0.17.0-2+b2 tk8.6-blt2.5==2.5.3+dfsg-4.1 tmux==3.3a-3 traceroute==1:2.1.2-1 +tzdata==2026b-0+deb12u1 ucf==3.0043+nmu1+deb12u1 unicode-data==15.0.0-1 unzip==6.0-28 @@ -745,9 +759,9 @@ vim==2:9.0.1378-2+deb12u2 vim-common==2:9.0.1378-2+deb12u2 vim-runtime==2:9.0.1378-2+deb12u2 wget==1.21.3-1+deb12u1 -wireshark==4.0.17-0+deb12u1 -wireshark-common==4.0.17-0+deb12u1 -wireshark-qt==4.0.17-0+deb12u1 +wireshark==4.0.17-0+deb12u3 +wireshark-common==4.0.17-0+deb12u3 +wireshark-qt==4.0.17-0+deb12u3 x11-common==1:7.7+23 xauth==1:1.1.2-1 xdg-user-dirs==0.18-1 diff --git a/files/build/versions-public/dockers/docker-ptf/versions-py3 b/files/build/versions-public/dockers/docker-ptf/versions-py3 index 37527930fc9..6b06b6f3412 100644 --- a/files/build/versions-public/dockers/docker-ptf/versions-py3 +++ b/files/build/versions-public/dockers/docker-ptf/versions-py3 @@ -1,55 +1,98 @@ +appdirs==1.4.4 +asttokens==2.2.1 +attrs==22.2.0 +backcall==0.2.0 bcrypt==5.0.0 +beautifulsoup4==4.11.2 blinker==1.9.0 +brotli==1.0.9 cffi==2.0.0 -click==8.3.1 -cryptography==46.0.3 -cython==3.2.2 -decorator==5.2.1 +chardet==5.1.0 +click==8.4.1 +contourpy==1.0.7 +cryptography==38.0.4 +cycler==0.11.0 +cython==3.2.5 +decorator==5.1.1 dpkt==1.9.8 enum34==1.1.10 exabgp==4.2.25 -flask==3.0.3 -grpcio==1.76.0 -grpcio-tools==1.76.0 -invoke==2.2.1 +executing==1.2.0 +flask==3.1.3 +fonttools==4.38.0 +fs==2.4.16 +grpcio==1.81.1 +grpcio-tools==1.81.1 +html5lib==1.1 +invoke==3.0.3 ipaddress==1.0.23 -ipython==5.4.1 +ipython==8.5.0 +ipython_pygments_lexers==1.1.1 itsdangerous==2.2.0 +jedi==0.18.2 jinja2==3.1.6 -lxml==6.0.2 +kiwisolver==0.0.0 +lxml==4.9.2 +lz4==4.0.2+dfsg markupsafe==3.0.3 +matplotlib==3.6.3 +matplotlib-inline==0.1.6 +mpmath==0.0.0 +munkres==1.1.4 nnpy==1.4.2 -paramiko==4.0.0 -pexpect==4.9.0 +ntpsec==1.2.2 +numpy==1.24.2 +olefile==0.46 +packaging==23.0 +paramiko==5.0.0 +parso==0.8.3 +pexpect==4.8.0 pickleshare==0.7.5 +pillow==9.4.0 pip==23.0.1 -plumbum==1.10.0 -prompt-toolkit==1.0.18 -protobuf==3.20.3 +plumbum==2.0.1 +ply==3.11 +prompt-toolkit==3.0.36 +prompt_toolkit==3.0.52 +protobuf==6.33.5 +psutil==5.9.4 ptyprocess==0.7.0 -pyaml==25.7.0 +pure-eval==0.0.0 +pure_eval==0.2.3 +pyaml==26.2.1 pybrctl==0.1.4 -pycparser==2.23 -pygments==2.19.2 -pynacl==1.6.1 +pycparser==3.0 +pygments==2.14.0 +pygobject==3.42.2 +pynacl==1.6.2 +pyparsing==3.0.9 pyrasite==2.0 pyro4==4.82 +pyroute2==0.7.2 pysubnettree==0.38.1 +python-dateutil==2.8.2 python-libpcap==0.5.4 -pyyaml==6.0.3 +pytz==2022.7.1 +pyyaml==6.0 retrying==1.4.2 rpyc==6.0.2 saithrift==0.9 scapy==2.5.0 -serpent==1.42 -setuptools==51.0.0 +serpent==1.43 +setuptools==66.1.1 simplegeneric==0.8.1 six==1.16.0 +soupsieve==2.3.2 +stack-data==0.6.2 supervisor==4.3.0 -thrift==0.22.0 -tornado==6.5.3 -traitlets==5.14.3 +sympy==1.11.1 +thrift==0.17.0 +tornado==6.5.7 +traitlets==5.5.0 typing_extensions==4.15.0 -unittest-xml-reporting==3.2.0 -wcwidth==0.2.14 -werkzeug==3.1.2 +ufolib2==0.14.0 +unittest-xml-reporting==4.0.0 +wcwidth==0.2.5 +webencodings==0.5.1 +werkzeug==3.1.8 +wheel==0.38.4 diff --git a/files/build/versions-public/dockers/docker-router-advertiser/versions-deb-bookworm b/files/build/versions-public/dockers/docker-router-advertiser/versions-deb-bookworm deleted file mode 100644 index d9bfb2dc9c0..00000000000 --- a/files/build/versions-public/dockers/docker-router-advertiser/versions-deb-bookworm +++ /dev/null @@ -1,36 +0,0 @@ -gdb==13.1-3 -gdbserver==13.1-3 -libbabeltrace1==1.5.11-1+b2 -libboost-regex1.74.0==1.74.0+ds1-21 -libcbor0.8==0.8.0-2+b1 -libcurl3-gnutls==7.88.1-10+deb12u14 -libdebuginfod-common==0.188-2.1 -libdebuginfod1==0.188-2.1 -libdw1==0.188-2.1 -libedit2==3.1-20221030-2 -libfido2-1==1.12.0-2+b1 -libglib2.0-0==2.74.6-2+deb12u7 -libgpm2==1.20.7-10+b1 -libicu72==72.1-3+deb12u1 -libipt2==2.0.5-1 -libmpfr6==4.2.0-1 -libsource-highlight-common==3.1.9-4.2 -libsource-highlight4v5==3.1.9-4.2+b3 -libssl-dev==3.0.17-1~deb12u3 -libssl3==3.0.17-1~deb12u3 -libswsscommon-dbgsym==1.0.0 -libunwind8==1.6.2-3 -libyang-cpp-dbgsym==1.0.73 -openssh-client==1:9.2p1-2+deb12u7 -openssl==3.0.17-1~deb12u3 -python3-swsscommon-dbgsym==1.0.0 -python3-yang-dbgsym==1.0.73 -radvd==1:2.19-1+b1 -sensible-utils==0.0.17+nmu1 -sonic-db-cli-dbgsym==1.0.0 -sonic-eventd-dbgsym==1.0.0-0 -sshpass==1.09-1+b1 -strace==6.1-0.1 -ucf==3.0043+nmu1+deb12u1 -vim==2:9.0.1378-2+deb12u2 -vim-runtime==2:9.0.1378-2+deb12u2 diff --git a/files/build/versions-public/dockers/docker-router-advertiser/versions-deb-bookworm-arm64 b/files/build/versions-public/dockers/docker-router-advertiser/versions-deb-bookworm-arm64 deleted file mode 100644 index 122e75fd733..00000000000 --- a/files/build/versions-public/dockers/docker-router-advertiser/versions-deb-bookworm-arm64 +++ /dev/null @@ -1 +0,0 @@ -radvd==1:2.19-1 diff --git a/files/build/versions-public/dockers/docker-router-advertiser/versions-deb-bookworm-armhf b/files/build/versions-public/dockers/docker-router-advertiser/versions-deb-bookworm-armhf deleted file mode 100644 index 122e75fd733..00000000000 --- a/files/build/versions-public/dockers/docker-router-advertiser/versions-deb-bookworm-armhf +++ /dev/null @@ -1 +0,0 @@ -radvd==1:2.19-1 diff --git a/files/build/versions-public/dockers/docker-router-advertiser/versions-deb-trixie b/files/build/versions-public/dockers/docker-router-advertiser/versions-deb-trixie new file mode 100644 index 00000000000..870ba0f5f64 --- /dev/null +++ b/files/build/versions-public/dockers/docker-router-advertiser/versions-deb-trixie @@ -0,0 +1,35 @@ +gdb==16.3-1 +gdbserver==16.3-1 +libbabeltrace1==1.5.11-4+b2 +libcbor0.10==0.10.2-2 +libcurl3t64-gnutls==8.14.1-2+deb13u3 +libdebuginfod-common==0.192-4 +libdebuginfod1t64==0.192-4 +libdw1t64==0.192-4 +libedit2==3.1-20250104-1 +libfido2-1==1.15.0-1+b1 +libglib2.0-0t64==2.84.4-3~deb13u3 +libgpm2==1.20.7-11+b2 +libipt2==2.1.2-1 +libjson-c5==0.18+ds-1 +libmpfr6==4.2.2-1 +libngtcp2-16==1.11.0-1+deb13u1 +libngtcp2-crypto-gnutls8==1.11.0-1+deb13u1 +libsource-highlight-common==3.1.9-4.3 +libsource-highlight4t64==3.1.9-4.3+b1 +libswsscommon-dbgsym==1.0.0 +libtext-charwidth-perl==0.04-11+b4 +libtext-wrapi18n-perl==0.06-10 +libunwind8==1.8.1-0.1 +libyang3-dbgsym==3.12.2-1 +openssh-client==1:10.0p1-7+fips +python3-swsscommon-dbgsym==1.0.0 +radvd==1:2.20-1+b1 +sensible-utils==0.0.25 +sonic-db-cli-dbgsym==1.0.0 +sonic-eventd-dbgsym==1.0.0-0 +sshpass==1.10-0.1 +strace==6.13+ds-1 +ucf==3.0052 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372e992d1c7..00000000000 --- a/files/build/versions-public/dockers/docker-sflow/versions-deb-bookworm +++ /dev/null @@ -1,41 +0,0 @@ -dmidecode==3.4-1 -gdb==13.1-3 -gdbserver==13.1-3 -hsflowd==2.0.51-26 -hsflowd-dbgsym==2.0.51-26 -libbabeltrace1==1.5.11-1+b2 -libboost-regex1.74.0==1.74.0+ds1-21 -libcbor0.8==0.8.0-2+b1 -libcurl3-gnutls==7.88.1-10+deb12u14 -libdebuginfod-common==0.188-2.1 -libdebuginfod1==0.188-2.1 -libdw1==0.188-2.1 -libedit2==3.1-20221030-2 -libfido2-1==1.12.0-2+b1 -libglib2.0-0==2.74.6-2+deb12u7 -libgpm2==1.20.7-10+b1 -libicu72==72.1-3+deb12u1 -libipt2==2.0.5-1 -libmpfr6==4.2.0-1 -libsource-highlight-common==3.1.9-4.2 -libsource-highlight4v5==3.1.9-4.2+b3 -libssl-dev==3.0.17-1~deb12u3 -libssl3==3.0.17-1~deb12u3 -libswsscommon-dbgsym==1.0.0 -libunwind8==1.6.2-3 -libyang-cpp-dbgsym==1.0.73 -openssh-client==1:9.2p1-2+deb12u7 -openssl==3.0.17-1~deb12u3 -psample==1.1-1 -python3-swsscommon-dbgsym==1.0.0 -python3-yang-dbgsym==1.0.73 -sensible-utils==0.0.17+nmu1 -sflowtool==5.04 -sonic-db-cli-dbgsym==1.0.0 -sonic-eventd-dbgsym==1.0.0-0 -sshpass==1.09-1+b1 -strace==6.1-0.1 -swss-dbg==1.0.0 -ucf==3.0043+nmu1+deb12u1 -vim==2:9.0.1378-2+deb12u2 -vim-runtime==2:9.0.1378-2+deb12u2 diff --git a/files/build/versions-public/dockers/docker-sflow/versions-deb-trixie b/files/build/versions-public/dockers/docker-sflow/versions-deb-trixie new file mode 100644 index 00000000000..4ab9331b8ae --- /dev/null +++ b/files/build/versions-public/dockers/docker-sflow/versions-deb-trixie @@ -0,0 +1,40 @@ +dmidecode==3.6-2 +gdb==16.3-1 +gdbserver==16.3-1 +hsflowd==2.0.51-26 +hsflowd-dbgsym==2.0.51-26 +libbabeltrace1==1.5.11-4+b2 +libcbor0.10==0.10.2-2 +libcurl3t64-gnutls==8.14.1-2+deb13u3 +libdebuginfod-common==0.192-4 +libdebuginfod1t64==0.192-4 +libdw1t64==0.192-4 +libedit2==3.1-20250104-1 +libfido2-1==1.15.0-1+b1 +libglib2.0-0t64==2.84.4-3~deb13u3 +libgpm2==1.20.7-11+b2 +libipt2==2.1.2-1 +libjson-c5==0.18+ds-1 +libmpfr6==4.2.2-1 +libngtcp2-16==1.11.0-1+deb13u1 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-cpp-12==12.2.0-14+deb12u1 -freeipmi-common==1.6.10-1 -gcc-12==12.2.0-14+deb12u1 -gdb==13.1-3 -gdbserver==13.1-3 -ipmitool==1.8.19-4+deb12u2 -libasan8==12.2.0-14+deb12u1 -libbabeltrace1==1.5.11-1+b2 -libbinutils==2.40-2 -libboost-regex1.74.0==1.74.0+ds1-21 -libc-dev-bin==2.36-9+deb12u13 -libc6-dev==2.36-9+deb12u13 -libcbor0.8==0.8.0-2+b1 -libcc1-0==12.2.0-14+deb12u1 -libcrypt-dev==1:4.4.33-2 -libctf-nobfd0==2.40-2 -libctf0==2.40-2 -libcurl3-gnutls==7.88.1-10+deb12u14 -libdebuginfod-common==0.188-2.1 -libdebuginfod1==0.188-2.1 -libdw1==0.188-2.1 -libedit2==3.1-20221030-2 -libexpat1-dev==2.5.0-1+deb12u2 -libfido2-1==1.12.0-2+b1 -libfreeipmi17==1.6.10-1+b1 -libgcc-12-dev==12.2.0-14+deb12u1 -libglib2.0-0==2.74.6-2+deb12u7 -libgomp1==12.2.0-14+deb12u1 -libgpm2==1.20.7-10+b1 -libgprofng0==2.40-2 -libicu72==72.1-3+deb12u1 -libipt2==2.0.5-1 -libisl23==0.25-1.1 -libitm1==12.2.0-14+deb12u1 -libjs-jquery==3.6.1+dfsg+~3.5.14-1 -libjs-sphinxdoc==5.3.0-4 -libjs-underscore==1.13.4~dfsg+~1.11.4-3 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-snmpd-dbgsym==5.9.3+dfsg-2 -sonic-db-cli-dbgsym==1.0.0 -sonic-eventd-dbgsym==1.0.0-0 -sshpass==1.09-1+b1 -strace==6.1-0.1 -ucf==3.0043+nmu1+deb12u1 -vim==2:9.0.1378-2+deb12u2 -vim-runtime==2:9.0.1378-2+deb12u2 -zlib1g-dev==1:1.2.13.dfsg-1 diff --git a/files/build/versions-public/dockers/docker-snmp/versions-deb-bookworm-arm64 b/files/build/versions-public/dockers/docker-snmp/versions-deb-bookworm-arm64 deleted file mode 100644 index 435661ecfe0..00000000000 --- a/files/build/versions-public/dockers/docker-snmp/versions-deb-bookworm-arm64 +++ /dev/null @@ -1,2 +0,0 @@ -binutils-aarch64-linux-gnu==2.40-2 -libhwasan0==12.2.0-14+deb12u1 diff --git a/files/build/versions-public/dockers/docker-snmp/versions-deb-bookworm-armhf b/files/build/versions-public/dockers/docker-snmp/versions-deb-bookworm-armhf deleted file mode 100644 index 76806cf3ac6..00000000000 --- a/files/build/versions-public/dockers/docker-snmp/versions-deb-bookworm-armhf +++ /dev/null @@ -1 +0,0 @@ -binutils-arm-linux-gnueabihf==2.40-2 diff --git a/files/build/versions-public/dockers/docker-snmp/versions-deb-trixie b/files/build/versions-public/dockers/docker-snmp/versions-deb-trixie new file mode 100644 index 00000000000..4fd915ee86f --- /dev/null +++ b/files/build/versions-public/dockers/docker-snmp/versions-deb-trixie @@ -0,0 +1,87 @@ +binutils==2.44-3 +binutils-common==2.44-3 +binutils-x86-64-linux-gnu==2.44-3 +cpp==4:14.2.0-1 +cpp-14==14.2.0-19 +cpp-14-x86-64-linux-gnu==14.2.0-19 +cpp-x86-64-linux-gnu==4:14.2.0-1 +freeipmi-common==1.6.15-1 +gcc-14==14.2.0-19 +gcc-14-x86-64-linux-gnu==14.2.0-19 +gcc-x86-64-linux-gnu==4:14.2.0-1 +gdb==16.3-1 +gdbserver==16.3-1 +ipmitool==1.8.19-9 +libasan8==14.2.0-19 +libbabeltrace1==1.5.11-4+b2 +libbinutils==2.44-3 +libc-dev-bin==2.41-12+deb13u3 +libc6-dev==2.41-12+deb13u3 +libcbor0.10==0.10.2-2 +libcc1-0==14.2.0-19 +libcrypt-dev==1:4.4.38-1 +libctf-nobfd0==2.44-3 +libctf0==2.44-3 +libcurl3t64-gnutls==8.14.1-2+deb13u3 +libdebuginfod-common==0.192-4 +libdebuginfod1t64==0.192-4 +libdw1t64==0.192-4 +libedit2==3.1-20250104-1 +libexpat1-dev==2.7.1-2 +libfido2-1==1.15.0-1+b1 +libfreeipmi17==1.6.15-1 +libgcc-14-dev==14.2.0-19 +libgcrypt20==1.11.0-7+deb13u1 +libglib2.0-0t64==2.84.4-3~deb13u3 +libgomp1==14.2.0-19 +libgpg-error0==1.51-4 +libgpm2==1.20.7-11+b2 +libgprofng0==2.44-3 +libhwasan0==14.2.0-19 +libipt2==2.1.2-1 +libisl23==0.27-1 +libitm1==14.2.0-19 +libjs-jquery==3.6.1+dfsg+~3.5.14-1 +libjs-sphinxdoc==8.1.3-5 +libjs-underscore==1.13.4~dfsg+~1.11.4-3 +libjson-c5==0.18+ds-1 +liblsan0==14.2.0-19 +libmpc3==1.3.1-1+b3 +libmpfr6==4.2.2-1 +libngtcp2-16==1.11.0-1+deb13u1 +libngtcp2-crypto-gnutls8==1.11.0-1+deb13u1 +libpci3==1:3.13.0-2 +libpython3-dev==3.13.5-1 +libpython3.13-dev==3.13.5-2+deb13u2 +libquadmath0==14.2.0-19 +libsensors-config==1:3.6.2-2 +libsensors5==1:3.6.2-2 +libsframe1==2.44-3 +libsnmp-base==5.9.4+dfsg-2+deb13u1 +libsnmp40t64==5.9.4+dfsg-2+deb13u1 +libsource-highlight-common==3.1.9-4.3 +libsource-highlight4t64==3.1.9-4.3+b1 +libswsscommon-dbgsym==1.0.0 +libtext-charwidth-perl==0.04-11+b4 +libtext-wrapi18n-perl==0.06-10 +libtsan2==14.2.0-19 +libubsan1==14.2.0-19 +libunwind8==1.8.1-0.1 +libyang3-dbgsym==3.12.2-1 +linux-libc-dev==6.12.90-2 +openssh-client==1:10.0p1-7+fips +pci.ids==0.0~2025.06.09-1 +python3-swsscommon-dbgsym==1.0.0 +python3.13-dev==3.13.5-2+deb13u2 +rpcsvc-proto==1.4.3-1 +sensible-utils==0.0.25 +snmp==5.9.4+dfsg-2+deb13u1 +snmpd==5.9.4+dfsg-2+deb13u1 +sonic-db-cli-dbgsym==1.0.0 +sonic-eventd-dbgsym==1.0.0-0 +sshpass==1.10-0.1 +strace==6.13+ds-1 +ucf==3.0052 +vim==2:9.1.1230-2 +vim-runtime==2:9.1.1230-2 +zlib1g-dev==1:1.3.dfsg+really1.3.1-1+b1 diff --git a/files/build/versions-public/dockers/docker-snmp/versions-deb-trixie-arm64 b/files/build/versions-public/dockers/docker-snmp/versions-deb-trixie-arm64 new file mode 100644 index 00000000000..1acd1d9b57f --- /dev/null +++ b/files/build/versions-public/dockers/docker-snmp/versions-deb-trixie-arm64 @@ -0,0 +1,5 @@ +binutils-aarch64-linux-gnu==2.44-3 +cpp-14-aarch64-linux-gnu==14.2.0-19 +cpp-aarch64-linux-gnu==4:14.2.0-1 +gcc-14-aarch64-linux-gnu==14.2.0-19 +gcc-aarch64-linux-gnu==4:14.2.0-1 diff --git a/files/build/versions-public/dockers/docker-snmp/versions-deb-trixie-armhf b/files/build/versions-public/dockers/docker-snmp/versions-deb-trixie-armhf new file mode 100644 index 00000000000..b6fbb003718 --- /dev/null +++ b/files/build/versions-public/dockers/docker-snmp/versions-deb-trixie-armhf @@ -0,0 +1,5 @@ +binutils-arm-linux-gnueabihf==2.44-3 +cpp-14-arm-linux-gnueabihf==14.2.0-19 +cpp-arm-linux-gnueabihf==4:14.2.0-1 +gcc-14-arm-linux-gnueabihf==14.2.0-19 +gcc-arm-linux-gnueabihf==4:14.2.0-1 diff --git a/files/build/versions-public/dockers/docker-snmp/versions-py3 b/files/build/versions-public/dockers/docker-snmp/versions-py3 index d093fa28085..8f6c6acf1be 100644 --- a/files/build/versions-public/dockers/docker-snmp/versions-py3 +++ b/files/build/versions-public/dockers/docker-snmp/versions-py3 @@ -1,4 +1,4 @@ -hiredis==3.3.0 -psutil==7.1.3 +hiredis==3.4.0 +psutil==7.2.2 python_arptable==0.0.2 smbus==1.1.post2 diff --git a/files/build/versions-public/dockers/docker-sonic-bmp/versions-deb-bookworm b/files/build/versions-public/dockers/docker-sonic-bmp/versions-deb-bookworm deleted file mode 100644 index 9a2da4e40eb..00000000000 --- a/files/build/versions-public/dockers/docker-sonic-bmp/versions-deb-bookworm +++ /dev/null @@ -1,36 +0,0 @@ -gdb==13.1-3 -gdbserver==13.1-3 -libbabeltrace1==1.5.11-1+b2 -libboost-regex1.74.0==1.74.0+ds1-21 -libcbor0.8==0.8.0-2+b1 -libcurl3-gnutls==7.88.1-10+deb12u14 -libdebuginfod-common==0.188-2.1 -libdebuginfod1==0.188-2.1 -libdw1==0.188-2.1 -libedit2==3.1-20221030-2 -libfido2-1==1.12.0-2+b1 -libglib2.0-0==2.74.6-2+deb12u7 -libgpm2==1.20.7-10+b1 -libicu72==72.1-3+deb12u1 -libipt2==2.0.5-1 -libmpfr6==4.2.0-1 -libsource-highlight-common==3.1.9-4.2 -libsource-highlight4v5==3.1.9-4.2+b3 -libssl-dev==3.0.17-1~deb12u3 -libssl3==3.0.17-1~deb12u3 -libswsscommon-dbgsym==1.0.0 -libunwind8==1.6.2-3 -libyang-cpp-dbgsym==1.0.73 -openssh-client==1:9.2p1-2+deb12u7 -openssl==3.0.17-1~deb12u3 -python3-swsscommon-dbgsym==1.0.0 -python3-yang-dbgsym==1.0.73 -sensible-utils==0.0.17+nmu1 -sonic-bmp==0.1 -sonic-db-cli-dbgsym==1.0.0 -sonic-eventd-dbgsym==1.0.0-0 -sshpass==1.09-1+b1 -strace==6.1-0.1 -ucf==3.0043+nmu1+deb12u1 -vim==2:9.0.1378-2+deb12u2 -vim-runtime==2:9.0.1378-2+deb12u2 diff --git a/files/build/versions-public/dockers/docker-sonic-bmp/versions-deb-trixie b/files/build/versions-public/dockers/docker-sonic-bmp/versions-deb-trixie new file mode 100644 index 00000000000..6e855716ab6 --- /dev/null +++ b/files/build/versions-public/dockers/docker-sonic-bmp/versions-deb-trixie @@ -0,0 +1,35 @@ +gdb==16.3-1 +gdbserver==16.3-1 +libbabeltrace1==1.5.11-4+b2 +libcbor0.10==0.10.2-2 +libcurl3t64-gnutls==8.14.1-2+deb13u3 +libdebuginfod-common==0.192-4 +libdebuginfod1t64==0.192-4 +libdw1t64==0.192-4 +libedit2==3.1-20250104-1 +libfido2-1==1.15.0-1+b1 +libglib2.0-0t64==2.84.4-3~deb13u3 +libgpm2==1.20.7-11+b2 +libipt2==2.1.2-1 +libjson-c5==0.18+ds-1 +libmpfr6==4.2.2-1 +libngtcp2-16==1.11.0-1+deb13u1 +libngtcp2-crypto-gnutls8==1.11.0-1+deb13u1 +libsource-highlight-common==3.1.9-4.3 +libsource-highlight4t64==3.1.9-4.3+b1 +libswsscommon-dbgsym==1.0.0 +libtext-charwidth-perl==0.04-11+b4 +libtext-wrapi18n-perl==0.06-10 +libunwind8==1.8.1-0.1 +libyang3-dbgsym==3.12.2-1 +openssh-client==1:10.0p1-7+fips +python3-swsscommon-dbgsym==1.0.0 +sensible-utils==0.0.25 +sonic-bmp==0.1 +sonic-db-cli-dbgsym==1.0.0 +sonic-eventd-dbgsym==1.0.0-0 +sshpass==1.10-0.1 +strace==6.13+ds-1 +ucf==3.0052 +vim==2:9.1.1230-2 +vim-runtime==2:9.1.1230-2 diff --git a/files/build/versions-public/dockers/docker-sonic-bmp/versions-py3 b/files/build/versions-public/dockers/docker-sonic-bmp/versions-py3 deleted file mode 100644 index cf39afa6b4c..00000000000 --- a/files/build/versions-public/dockers/docker-sonic-bmp/versions-py3 +++ /dev/null @@ -1 +0,0 @@ -pyyaml==6.0.1 diff --git a/files/build/versions-public/dockers/docker-sonic-gnmi/versions-deb-bookworm b/files/build/versions-public/dockers/docker-sonic-gnmi/versions-deb-bookworm deleted file mode 100644 index 4193502ff9b..00000000000 --- a/files/build/versions-public/dockers/docker-sonic-gnmi/versions-deb-bookworm +++ /dev/null @@ -1,37 +0,0 @@ -gdb==13.1-3 -gdbserver==13.1-3 -libbabeltrace1==1.5.11-1+b2 -libboost-regex1.74.0==1.74.0+ds1-21 -libcbor0.8==0.8.0-2+b1 -libcurl3-gnutls==7.88.1-10+deb12u14 -libdebuginfod-common==0.188-2.1 -libdebuginfod1==0.188-2.1 -libdw1==0.188-2.1 -libedit2==3.1-20221030-2 -libfido2-1==1.12.0-2+b1 -libglib2.0-0==2.74.6-2+deb12u7 -libgpm2==1.20.7-10+b1 -libicu72==72.1-3+deb12u1 -libipt2==2.0.5-1 -libmpfr6==4.2.0-1 -libsource-highlight-common==3.1.9-4.2 -libsource-highlight4v5==3.1.9-4.2+b3 -libssl-dev==3.0.17-1~deb12u3 -libssl3==3.0.17-1~deb12u3 -libswsscommon-dbgsym==1.0.0 -libunwind8==1.6.2-3 -libyang-cpp-dbgsym==1.0.73 -openssh-client==1:9.2p1-2+deb12u7 -openssl==3.0.17-1~deb12u3 -python3-swsscommon-dbgsym==1.0.0 -python3-yang-dbgsym==1.0.73 -sensible-utils==0.0.17+nmu1 -sonic-db-cli-dbgsym==1.0.0 -sonic-eventd-dbgsym==1.0.0-0 -sonic-gnmi==0.1 -sonic-mgmt-common==1.0.0 -sshpass==1.09-1+b1 -strace==6.1-0.1 -ucf==3.0043+nmu1+deb12u1 -vim==2:9.0.1378-2+deb12u2 -vim-runtime==2:9.0.1378-2+deb12u2 diff --git a/files/build/versions-public/dockers/docker-sonic-gnmi/versions-deb-trixie b/files/build/versions-public/dockers/docker-sonic-gnmi/versions-deb-trixie new file mode 100644 index 00000000000..440b446fe7f --- /dev/null +++ b/files/build/versions-public/dockers/docker-sonic-gnmi/versions-deb-trixie @@ -0,0 +1,36 @@ +gdb==16.3-1 +gdbserver==16.3-1 +libbabeltrace1==1.5.11-4+b2 +libcbor0.10==0.10.2-2 +libcurl3t64-gnutls==8.14.1-2+deb13u3 +libdebuginfod-common==0.192-4 +libdebuginfod1t64==0.192-4 +libdw1t64==0.192-4 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e5b2cfef95b..00000000000 --- a/files/build/versions-public/dockers/docker-sonic-mgmt-framework/versions-deb-bookworm +++ /dev/null @@ -1,81 +0,0 @@ -binutils==2.40-2 -binutils-common==2.40-2 -binutils-x86-64-linux-gnu==2.40-2 -cpp==4:12.2.0-3 -cpp-12==12.2.0-14+deb12u1 -g++-12==12.2.0-14+deb12u1 -gcc==4:12.2.0-3 -gcc-12==12.2.0-14+deb12u1 -gdb==13.1-3 -gdbserver==13.1-3 -libasan8==12.2.0-14+deb12u1 -libbabeltrace1==1.5.11-1+b2 -libbinutils==2.40-2 -libboost-regex1.74.0==1.74.0+ds1-21 -libc-dev-bin==2.36-9+deb12u13 -libc6-dev==2.36-9+deb12u13 -libcbor0.8==0.8.0-2+b1 -libcc1-0==12.2.0-14+deb12u1 -libcjson-dev==1.7.15-1+deb12u4 -libcjson1==1.7.15-1+deb12u4 -libcrypt-dev==1:4.4.33-2 -libctf-nobfd0==2.40-2 -libctf0==2.40-2 -libcurl3-gnutls==7.88.1-10+deb12u14 -libcurl4-openssl-dev==7.88.1-10+deb12u14 -libdebuginfod-common==0.188-2.1 -libdebuginfod1==0.188-2.1 -libdw1==0.188-2.1 -libedit2==3.1-20221030-2 -libexpat1-dev==2.5.0-1+deb12u2 -libfido2-1==1.12.0-2+b1 -libgcc-12-dev==12.2.0-14+deb12u1 -libglib2.0-0==2.74.6-2+deb12u7 -libgomp1==12.2.0-14+deb12u1 -libgpm2==1.20.7-10+b1 -libgprofng0==2.40-2 -libicu72==72.1-3+deb12u1 -libipt2==2.0.5-1 -libisl23==0.25-1.1 -libitm1==12.2.0-14+deb12u1 -libjs-jquery==3.6.1+dfsg+~3.5.14-1 -libjs-sphinxdoc==5.3.0-4 -libjs-underscore==1.13.4~dfsg+~1.11.4-3 -liblsan0==12.2.0-14+deb12u1 -libmpc3==1.3.1-1 -libmpfr6==4.2.0-1 -libnsl-dev==1.3.0-2 -libpython3-dev==3.11.2-1+b1 -libpython3.11-dev==3.11.2-6+deb12u6 -libquadmath0==12.2.0-14+deb12u1 -libsource-highlight-common==3.1.9-4.2 -libsource-highlight4v5==3.1.9-4.2+b3 -libssl-dev==3.0.17-1~deb12u3 -libssl3==3.0.17-1~deb12u3 -libstdc++-12-dev==12.2.0-14+deb12u1 -libswsscommon-dbgsym==1.0.0 -libtirpc-dev==1.3.3+ds-1 -libtsan2==12.2.0-14+deb12u1 -libubsan1==12.2.0-14+deb12u1 -libunwind8==1.6.2-3 -libxml2==2.9.14+dfsg-1.3~deb12u4 -libyang-cpp-dbgsym==1.0.73 -linux-libc-dev==6.1.158-1 -openssh-client==1:9.2p1-2+deb12u7 -openssl==3.0.17-1~deb12u3 -python3-swsscommon-dbgsym==1.0.0 -python3-yang-dbgsym==1.0.73 -python3.11-dev==3.11.2-6+deb12u6 -rpcsvc-proto==1.4.3-1 -sensible-utils==0.0.17+nmu1 -sonic-db-cli-dbgsym==1.0.0 -sonic-eventd-dbgsym==1.0.0-0 -sonic-mgmt-common==1.0.0 -sonic-mgmt-framework==1.0-01 -sonic-mgmt-framework-dbg==1.0-01 -sshpass==1.09-1+b1 -strace==6.1-0.1 -ucf==3.0043+nmu1+deb12u1 -vim==2:9.0.1378-2+deb12u2 -vim-runtime==2:9.0.1378-2+deb12u2 -zlib1g-dev==1:1.2.13.dfsg-1 diff --git a/files/build/versions-public/dockers/docker-sonic-mgmt-framework/versions-deb-bookworm-arm64 b/files/build/versions-public/dockers/docker-sonic-mgmt-framework/versions-deb-bookworm-arm64 deleted file mode 100644 index 435661ecfe0..00000000000 --- a/files/build/versions-public/dockers/docker-sonic-mgmt-framework/versions-deb-bookworm-arm64 +++ /dev/null @@ -1,2 +0,0 @@ -binutils-aarch64-linux-gnu==2.40-2 -libhwasan0==12.2.0-14+deb12u1 diff --git a/files/build/versions-public/dockers/docker-sonic-mgmt-framework/versions-deb-bookworm-armhf b/files/build/versions-public/dockers/docker-sonic-mgmt-framework/versions-deb-bookworm-armhf deleted file mode 100644 index 76806cf3ac6..00000000000 --- a/files/build/versions-public/dockers/docker-sonic-mgmt-framework/versions-deb-bookworm-armhf +++ /dev/null @@ -1 +0,0 @@ -binutils-arm-linux-gnueabihf==2.40-2 diff --git a/files/build/versions-public/dockers/docker-sonic-mgmt-framework/versions-deb-trixie b/files/build/versions-public/dockers/docker-sonic-mgmt-framework/versions-deb-trixie new file mode 100644 index 00000000000..bf500dd1af3 --- /dev/null +++ b/files/build/versions-public/dockers/docker-sonic-mgmt-framework/versions-deb-trixie @@ -0,0 +1,84 @@ +binutils==2.44-3 +binutils-common==2.44-3 +binutils-x86-64-linux-gnu==2.44-3 +cpp==4:14.2.0-1 +cpp-14==14.2.0-19 +cpp-14-x86-64-linux-gnu==14.2.0-19 +cpp-x86-64-linux-gnu==4:14.2.0-1 +g++-14==14.2.0-19 +g++-14-x86-64-linux-gnu==14.2.0-19 +g++-x86-64-linux-gnu==4:14.2.0-1 +gcc==4:14.2.0-1 +gcc-14==14.2.0-19 +gcc-14-x86-64-linux-gnu==14.2.0-19 +gcc-x86-64-linux-gnu==4:14.2.0-1 +gdb==16.3-1 +gdbserver==16.3-1 +libasan8==14.2.0-19 +libbabeltrace1==1.5.11-4+b2 +libbinutils==2.44-3 +libc-dev-bin==2.41-12+deb13u3 +libc6-dev==2.41-12+deb13u3 +libcbor0.10==0.10.2-2 +libcc1-0==14.2.0-19 +libcjson1==1.7.18-3.1+deb13u1 +libcrypt-dev==1:4.4.38-1 +libctf-nobfd0==2.44-3 +libctf0==2.44-3 +libcurl3t64-gnutls==8.14.1-2+deb13u3 +libdebuginfod-common==0.192-4 +libdebuginfod1t64==0.192-4 +libdw1t64==0.192-4 +libedit2==3.1-20250104-1 +libexpat1-dev==2.7.1-2 +libfido2-1==1.15.0-1+b1 +libgcc-14-dev==14.2.0-19 +libglib2.0-0t64==2.84.4-3~deb13u3 +libgomp1==14.2.0-19 +libgpm2==1.20.7-11+b2 +libgprofng0==2.44-3 +libhwasan0==14.2.0-19 +libipt2==2.1.2-1 +libisl23==0.27-1 +libitm1==14.2.0-19 +libjs-jquery==3.6.1+dfsg+~3.5.14-1 +libjs-sphinxdoc==8.1.3-5 +libjs-underscore==1.13.4~dfsg+~1.11.4-3 +libjson-c5==0.18+ds-1 +liblsan0==14.2.0-19 +libmpc3==1.3.1-1+b3 +libmpfr6==4.2.2-1 +libngtcp2-16==1.11.0-1+deb13u1 +libngtcp2-crypto-gnutls8==1.11.0-1+deb13u1 +libpython3-dev==3.13.5-1 +libpython3.13-dev==3.13.5-2+deb13u2 +libquadmath0==14.2.0-19 +libsframe1==2.44-3 +libsource-highlight-common==3.1.9-4.3 +libsource-highlight4t64==3.1.9-4.3+b1 +libstdc++-14-dev==14.2.0-19 +libswsscommon-dbgsym==1.0.0 +libtext-charwidth-perl==0.04-11+b4 +libtext-wrapi18n-perl==0.06-10 +libtsan2==14.2.0-19 +libubsan1==14.2.0-19 +libunwind8==1.8.1-0.1 +libxml2==2.12.7+dfsg+really2.9.14-2.1+deb13u2 +libyang3-dbgsym==3.12.2-1 +linux-libc-dev==6.12.90-2 +openssh-client==1:10.0p1-7+fips +python3-swsscommon-dbgsym==1.0.0 +python3.13-dev==3.13.5-2+deb13u2 +rpcsvc-proto==1.4.3-1 +sensible-utils==0.0.25 +sonic-db-cli-dbgsym==1.0.0 +sonic-eventd-dbgsym==1.0.0-0 +sonic-mgmt-common==1.0.0 +sonic-mgmt-framework==1.0-01 +sonic-mgmt-framework-dbg==1.0-01 +sshpass==1.10-0.1 +strace==6.13+ds-1 +ucf==3.0052 +vim==2:9.1.1230-2 +vim-runtime==2:9.1.1230-2 +zlib1g-dev==1:1.3.dfsg+really1.3.1-1+b1 diff --git a/files/build/versions-public/dockers/docker-sonic-mgmt-framework/versions-deb-trixie-arm64 b/files/build/versions-public/dockers/docker-sonic-mgmt-framework/versions-deb-trixie-arm64 new file mode 100644 index 00000000000..3f06c39060d --- /dev/null +++ b/files/build/versions-public/dockers/docker-sonic-mgmt-framework/versions-deb-trixie-arm64 @@ -0,0 +1,7 @@ +binutils-aarch64-linux-gnu==2.44-3 +cpp-14-aarch64-linux-gnu==14.2.0-19 +cpp-aarch64-linux-gnu==4:14.2.0-1 +g++-14-aarch64-linux-gnu==14.2.0-19 +g++-aarch64-linux-gnu==4:14.2.0-1 +gcc-14-aarch64-linux-gnu==14.2.0-19 +gcc-aarch64-linux-gnu==4:14.2.0-1 diff --git a/files/build/versions-public/dockers/docker-sonic-mgmt-framework/versions-deb-trixie-armhf b/files/build/versions-public/dockers/docker-sonic-mgmt-framework/versions-deb-trixie-armhf new file mode 100644 index 00000000000..3f0b4b163a6 --- /dev/null +++ b/files/build/versions-public/dockers/docker-sonic-mgmt-framework/versions-deb-trixie-armhf @@ -0,0 +1,7 @@ +binutils-arm-linux-gnueabihf==2.44-3 +cpp-14-arm-linux-gnueabihf==14.2.0-19 +cpp-arm-linux-gnueabihf==4:14.2.0-1 +g++-14-arm-linux-gnueabihf==14.2.0-19 +g++-arm-linux-gnueabihf==4:14.2.0-1 +gcc-14-arm-linux-gnueabihf==14.2.0-19 +gcc-arm-linux-gnueabihf==4:14.2.0-1 diff --git a/files/build/versions-public/dockers/docker-sonic-mgmt-framework/versions-py3 b/files/build/versions-public/dockers/docker-sonic-mgmt-framework/versions-py3 index 8416ee08204..58746c191aa 100644 --- a/files/build/versions-public/dockers/docker-sonic-mgmt-framework/versions-py3 +++ b/files/build/versions-public/dockers/docker-sonic-mgmt-framework/versions-py3 @@ -1,5 +1,5 @@ -certifi==2025.11.12 -charset-normalizer==3.4.4 -idna==3.11 -requests==2.32.5 -urllib3==2.6.2 +certifi==2026.6.17 +charset-normalizer==3.4.7 +idna==3.18 +requests==2.34.2 +urllib3==2.7.0 diff --git a/files/build/versions-public/dockers/docker-sonic-otel/versions-deb-trixie b/files/build/versions-public/dockers/docker-sonic-otel/versions-deb-trixie new file mode 100644 index 00000000000..416b2379e05 --- /dev/null +++ b/files/build/versions-public/dockers/docker-sonic-otel/versions-deb-trixie @@ -0,0 +1,36 @@ +gdb==16.3-1 +gdbserver==16.3-1 +libbabeltrace1==1.5.11-4+b2 +libcbor0.10==0.10.2-2 +libcurl3t64-gnutls==8.14.1-2+deb13u3 +libdebuginfod-common==0.192-4 +libdebuginfod1t64==0.192-4 +libdw1t64==0.192-4 +libedit2==3.1-20250104-1 +libfido2-1==1.15.0-1+b1 +libglib2.0-0t64==2.84.4-3~deb13u3 +libgpm2==1.20.7-11+b2 +libipt2==2.1.2-1 +libjson-c5==0.18+ds-1 +libmpfr6==4.2.2-1 +libngtcp2-16==1.11.0-1+deb13u1 +libngtcp2-crypto-gnutls8==1.11.0-1+deb13u1 +libsource-highlight-common==3.1.9-4.3 +libsource-highlight4t64==3.1.9-4.3+b1 +libswsscommon-dbgsym==1.0.0 +libtext-charwidth-perl==0.04-11+b4 +libtext-wrapi18n-perl==0.06-10 +libunwind8==1.8.1-0.1 +libyang3-dbgsym==3.12.2-1 +openssh-client==1:10.0p1-7+fips +otelcol-contrib==0.144.0 +python3-swsscommon-dbgsym==1.0.0 +sensible-utils==0.0.25 +sonic-db-cli-dbgsym==1.0.0 +sonic-eventd-dbgsym==1.0.0-0 +sshpass==1.10-0.1 +strace==6.13+ds-1 +ucf==3.0052 +vim==2:9.1.1230-2 +vim-runtime==2:9.1.1230-2 +wget==1.25.0-2 diff --git a/files/build/versions-public/dockers/docker-sonic-vs/versions-deb-bookworm b/files/build/versions-public/dockers/docker-sonic-vs/versions-deb-bookworm index 3b4ade9daf7..1575b41b0aa 100644 --- a/files/build/versions-public/dockers/docker-sonic-vs/versions-deb-bookworm +++ b/files/build/versions-public/dockers/docker-sonic-vs/versions-deb-bookworm @@ -11,22 +11,24 @@ dbus-bin==1.14.10-1~deb12u1 dbus-daemon==1.14.10-1~deb12u1 dbus-session-bus-common==1.14.10-1~deb12u1 dbus-system-bus-common==1.14.10-1~deb12u1 -dirmngr==2.2.40-1.1+deb12u1 -dpkg-dev==1.21.22 +dirmngr==2.2.40-1.1+deb12u2 +dpkg-dev==1.21.23 ethtool==1:6.1-1 fontconfig-config==2.14.1-4 fonts-dejavu-core==2.37-6 -frr==10.4.1-sonic-0 +frr==10.5.4-sonic-0 +frr-snmp==10.5.4-sonic-0 gir1.2-glib-2.0==1.74.0-3 -gnupg==2.2.40-1.1+deb12u1 -gnupg-l10n==2.2.40-1.1+deb12u1 -gnupg-utils==2.2.40-1.1+deb12u1 -gpg==2.2.40-1.1+deb12u1 -gpg-agent==2.2.40-1.1+deb12u1 -gpg-wks-client==2.2.40-1.1+deb12u1 -gpg-wks-server==2.2.40-1.1+deb12u1 -gpgconf==2.2.40-1.1+deb12u1 -gpgsm==2.2.40-1.1+deb12u1 +gnupg==2.2.40-1.1+deb12u2 +gnupg-l10n==2.2.40-1.1+deb12u2 +gnupg-utils==2.2.40-1.1+deb12u2 +gpg==2.2.40-1.1+deb12u2 +gpg-agent==2.2.40-1.1+deb12u2 +gpg-wks-client==2.2.40-1.1+deb12u2 +gpg-wks-server==2.2.40-1.1+deb12u2 +gpgconf==2.2.40-1.1+deb12u2 +gpgsm==2.2.40-1.1+deb12u2 +hsflowd==2.0.51-26 icu-devtools==72.1-3+deb12u1 ifupdown==0.8.41 iptables==1.8.9-2 @@ -35,18 +37,20 @@ libapparmor1==3.0.8-3 libassuan0==2.5.5-5 libbsd-dev==0.11.7-2 libc-ares2==1.18.1-3 -libc-dev-bin==2.36-9+deb12u13 -libc6-dev==2.36-9+deb12u13 +libc-dev-bin==2.36-9+deb12u14 +libc6-dev==2.36-9+deb12u14 libcbor0.8==0.8.0-2+b1 libcrypt-dev==1:4.4.33-2 libdbus-c++-1-0v5==0.9.0-11 libecore1==1.26.3-1+b1 libedit2==3.1-20221030-2 libeina1a==1.26.3-1+b1 +libevent-2.1-7==2.1.12-stable-8 libfido2-1==1.12.0-2+b1 libgirepository-1.0-1==1.74.0-3 -libglib2.0-0==2.74.6-2+deb12u7 -libglib2.0-data==2.74.6-2+deb12u7 +libglib2.0-0==2.74.6-2+deb12u9 +libglib2.0-data==2.74.6-2+deb12u9 +libgoogle-perftools4==2.10-1 libgssapi-krb5-2==1.20.1-2+deb12u1+fips libgssrpc4==1.20.1-2+deb12u1+fips libicu-dev==72.1-3+deb12u1 @@ -59,7 +63,7 @@ libjudydebian1==1.0.5-5+b2 libk5crypto3==1.20.1-2+deb12u1+fips libkadm5clnt-mit12==1.20.1-2+deb12u1+fips libkadm5srv-mit12==1.20.1-2+deb12u1+fips -libkdb5-10==1.20.1-2+deb12u4 +libkdb5-10==1.20.1-2+deb12u5 libkrb5-3==1.20.1-2+deb12u1+fips libkrb5-dev==1.20.1-2+deb12u1+fips libkrb5support0==1.20.1-2+deb12u1+fips @@ -73,44 +77,55 @@ libnorm-dev==1.5.9+dfsg-2 libnpth0==1.6-3 libnsl-dev==1.3.0-2 libpcap0.8==1.10.3-1 +libpci3==1:3.9.0-4 libpcre2-posix3==10.42-1 libpgm-dev==5.3.128~dfsg-2 libprotobuf-c-dev==1.4.1-1+b1 libprotobuf-c1==1.4.1-1+b1 libprotoc32==3.21.12-3 libsaivs==1.0.0 -libsodium-dev==1.0.18-1 -libssl3==3.0.17-1~deb12u3 +libsensors-config==1:3.6.0-7.1 +libsensors5==1:3.6.0-7.1 +libsnmp-base==5.9.3+dfsg-2+deb12u1 +libsnmp40==5.9.3+dfsg-2+deb12u1 +libsodium-dev==1.0.18-1+deb12u1 +libssl3==3.0.20-1~deb12u2 +libtcmalloc-minimal4==2.10-1 libteam-utils==1.31-1 libtirpc-dev==1.3.3+ds-1 libunwind8==1.6.2-3 -libxml2==2.9.14+dfsg-1.3~deb12u4 -libxml2-dev==2.9.14+dfsg-1.3~deb12u4 +libxml2==2.9.14+dfsg-1.3~deb12u5 +libxml2-dev==2.9.14+dfsg-1.3~deb12u5 libyang3==3.12.2-1 libzmq3-dev==4.3.4-6 -linux-libc-dev==6.1.158-1 +linux-libc-dev==6.1.174-1 +lldpd==1.0.16-1+deb12u1 logrotate==3.21.0-1 lsof==4.95.0-1 ndisc6==1.0.5-1+b2 netbase==6.4 -openssh-client==1:9.2p1-2+deb12u7 -openssh-server==1:9.2p1-2+deb12u7 -openssh-sftp-server==1:9.2p1-2+deb12u7 -openssl==3.0.17-1~deb12u3 +openssh-client==1:9.2p1-2+deb12u10 +openssh-server==1:9.2p1-2+deb12u10 +openssh-sftp-server==1:9.2p1-2+deb12u10 +openssl==3.0.20-1~deb12u2 +pci.ids==0.0~2023.04.11-1 pinentry-curses==1.2.1-1 pkgconf==1.8.1-1 protobuf-c-compiler==1.4.1-1+b1 +psample==1.1-1 psmisc==23.6-1 python3-gi==3.42.2-3+b1 python3-scapy==2.5.0+dfsg-2 -redis-server==5:7.0.15-1~deb12u6 +redis-server==5:7.0.15-1~deb12u7 rpcsvc-proto==1.4.3-1 runit-helper==2.15.2 sensible-utils==0.0.17+nmu1 +sflowtool==5.04 sgml-base==1.31 sonic-device-data==1.0-1 sonic-host-services-data==1.0-1 sonic-utilities-data==1.0-1 +sudo==1.9.13p3-1+deb12u4 syncd-vs==1.0.0 sysmgr==1.0.0 tcpdump==4.99.3-1 diff --git a/files/build/versions-public/dockers/docker-sonic-vs/versions-py3 b/files/build/versions-public/dockers/docker-sonic-vs/versions-py3 index 041caaf6f49..1e5aaa59f49 100644 --- a/files/build/versions-public/dockers/docker-sonic-vs/versions-py3 +++ b/files/build/versions-public/dockers/docker-sonic-vs/versions-py3 @@ -1,43 +1,48 @@ bcrypt==5.0.0 -blessed==1.25.0 -certifi==2025.11.12 +blessed==1.44.0 +certifi==2026.6.17 cffi==2.0.0 -charset-normalizer==3.4.4 +charset-normalizer==3.4.7 click==8.1.8 click-log==0.4.0 colorful==0.5.8 -cryptography==46.0.3 +cryptography==49.0.0 dbus-python==1.4.0 docker==7.1.0 docker-image-py==0.1.13 enlighten==1.14.1 -filelock==3.20.0 -idna==3.11 -invoke==2.2.1 +filelock==3.29.4 +idna==3.18 +invoke==3.0.3 +ipaddress==1.0.23 +jinxed==2.0.4 jsonpatch==1.33 lazy-object-proxy==1.12.0 -m2crypto==0.46.2 +m2crypto==0.48.0 netifaces==0.11.0 -paramiko==4.0.0 +packaging==26.2 +paramiko==5.0.0 pexpect==4.9.0 prefixed==0.9.0 prettyprinter==0.18.0 -protobuf==6.33.2 -psutil==7.1.3 +protobuf==7.35.1 +psutil==7.2.2 ptyprocess==0.7.0 pyangbind==0.8.1 pycairo==1.26.1 -pycparser==2.23 -pygments==2.19.2 +pycparser==3.0 +pygments==2.20.0 pygobject==3.42.2 -pynacl==1.6.1 -pyroute2==0.9.5 -requests==2.32.5 +pynacl==1.6.2 +pyproject-metadata==0.11.0 +pyroute2==0.9.6 +requests==2.34.2 scapy==2.5.0 scp==0.14.5 semantic-version==2.10.0 systemd-python==235 toposort==1.6 -urllib3==2.6.2 -wcwidth==0.2.14 +urllib3==2.7.0 +wcwidth==0.8.1 www-authenticate==0.9.2 +xmltodict==0.12.0 diff --git a/files/build/versions-public/dockers/docker-swss-layer-bookworm/versions-deb-bookworm b/files/build/versions-public/dockers/docker-swss-layer-bookworm/versions-deb-bookworm index 40e4152213a..8893eb15d4f 100644 --- a/files/build/versions-public/dockers/docker-swss-layer-bookworm/versions-deb-bookworm +++ b/files/build/versions-public/dockers/docker-swss-layer-bookworm/versions-deb-bookworm @@ -1,5 +1,7 @@ iputils-ping==3:20221126-1+deb12u1 +libasan8==12.2.0-14+deb12u1 libdashapi==1.0.0 +libnexthopgroup==1.0.0 libprotobuf32==3.21.12-3 libsaimetadata==1.0.0 libsairedis==1.0.0 diff --git a/files/build/versions-public/dockers/docker-swss-layer-trixie/versions-deb-trixie b/files/build/versions-public/dockers/docker-swss-layer-trixie/versions-deb-trixie new file mode 100644 index 00000000000..ba8642e25b2 --- /dev/null +++ b/files/build/versions-public/dockers/docker-swss-layer-trixie/versions-deb-trixie @@ -0,0 +1,9 @@ +iputils-ping==3:20240905-3 +libdashapi==1.0.0 +libnexthopgroup==1.0.0 +libprotobuf32t64==3.21.12-11 +libsaimetadata==1.0.0 +libsairedis==1.0.0 +libteam5==1.31-1 +libteamdctl0==1.31-1 +swss==1.0.0 diff --git a/files/build/versions-public/dockers/docker-syncd-bluefield/versions-deb-bookworm b/files/build/versions-public/dockers/docker-syncd-bluefield/versions-deb-bookworm new file mode 100644 index 00000000000..89252c94137 --- /dev/null +++ b/files/build/versions-public/dockers/docker-syncd-bluefield/versions-deb-bookworm @@ -0,0 +1,60 @@ +binutils==2.40-2 +binutils-aarch64-linux-gnu==2.40-2 +binutils-common==2.40-2 +binutils-dev==2.40-2 +doca-sdk-argp==3.3.0055-1 +doca-sdk-common==3.3.0055-1 +doca-sdk-dpdk-bridge==3.3.0055-1 +doca-sdk-flow==3.3.0055-1 +ethtool==1:6.1-1 +hwdata==0.368-1 +ibverbs-providers==2601.0.1-1 +kmod==30+20221128-1 +libbinutils==2.40-2 +libctf-nobfd0==2.40-2 +libctf0==2.40-2 +libdbus-1-dev==1.14.10-1~deb12u1 +libexpat1-dev==2.5.0-1+deb12u2 +libgprofng0==2.40-2 +libgrpc-dev==1.39.0-1 +libibverbs-dev==2601.0.1-1 +libibverbs1==2601.0.1-1 +libjs-jquery==3.6.1+dfsg+~3.5.14-1 +libjs-sphinxdoc==5.3.0-4 +libjs-underscore==1.13.4~dfsg+~1.11.4-3 +libkmod2==30+20221128-1 +libnl-3-dev==3.7.0-0.2+b1sonic1 +libnl-route-3-dev==3.7.0-0.2+b1sonic1 +libnuma1==2.0.16-1 +libnvhws1==26.01.3-1 +libpcap0.8==1.10.3-1 +libpcap0.8-dev==1.10.3-1 +libpci3==1:3.9.0-4 +libpkgconf3==1.8.1-1 +libpython3-dev==3.11.2-1+b1 +libpython3.11-dev==3.11.2-6+deb12u6 +librxpcompiler-dev==22.05.1 +libsaimetadata==1.0.0 +libsairedis==1.0.0 +lsof==4.95.0-1 +mft==4.34.0-145 +mlnx-dpdk==22.11.0-2510.2.1 +mlnx-iproute2==2601.0.2-1 +mlnx-ofed-kernel-utils==26.01.OFED.26.01.0.2.9.1-1 +mlnx-sai==1.mlnx.SAIBuild0.0.50.0 +mlnx-tools==2601.0.0-1 +pci.ids==0.0~2023.04.11-1 +pciutils==1:3.9.0-4 +pkg-config==1.8.1-1 +pkgconf==1.8.1-1 +pkgconf-bin==1.8.1-1 +python3-dev==3.11.2-1+b1 +python3-pip==23.0.1+dfsg-1 +python3.11-dev==3.11.2-6+deb12u6 +rxp-compiler==22.05.1 +sdn-appliance==1.5-1mlnx1 +sgml-base==1.31 +syncd==1.0.0 +udev==252.39-1~deb12u1 +usb.ids==2025.07.26-0+deb12u1 +xml-core==0.18+nmu1 diff --git a/files/build/versions-public/dockers/docker-syncd-bluefield/versions-deb-trixie b/files/build/versions-public/dockers/docker-syncd-bluefield/versions-deb-trixie new file mode 100644 index 00000000000..3d0e12ead65 --- /dev/null +++ b/files/build/versions-public/dockers/docker-syncd-bluefield/versions-deb-trixie @@ -0,0 +1,68 @@ +binutils==2.44-3 +binutils-aarch64-linux-gnu==2.44-3 +binutils-common==2.44-3 +binutils-dev==2.44-3 +doca-sdk-argp==3.3.0055-1 +doca-sdk-common==3.3.0055-1 +doca-sdk-dpdk-bridge==3.3.0055-1 +doca-sdk-flow==3.3.0055-1 +ethtool==1:6.14.2-1 +hwdata==0.394-1 +ibverbs-providers==2601.0.7-1 +kmod==34.2-2 +libapparmor1==4.1.0-1 +libbinutils==2.44-3 +libcap-dev==1:2.75-10+deb13u1+b1 +libcap2==1:2.75-10+deb13u1+b1 +libctf-nobfd0==2.44-3 +libctf0==2.44-3 +libdbus-1-dev==1.16.2-2 +libexpat1-dev==2.7.1-2 +libgprofng0==2.44-3 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b/files/build/versions-public/dockers/docker-syncd-brcm-dnx-rpc/versions-deb-trixie new file mode 100644 index 00000000000..f373488e399 --- /dev/null +++ b/files/build/versions-public/dockers/docker-syncd-brcm-dnx-rpc/versions-deb-trixie @@ -0,0 +1,75 @@ +binutils==2.44-3 +binutils-common==2.44-3 +binutils-x86-64-linux-gnu==2.44-3 +bzip2==1.0.8-6 +cmake-data==3.31.6-2 +cpp==4:14.2.0-1 +cpp-14==14.2.0-19 +cpp-14-x86-64-linux-gnu==14.2.0-19 +cpp-x86-64-linux-gnu==4:14.2.0-1 +dpkg-dev==1.22.22 +g++==4:14.2.0-1 +g++-14==14.2.0-19 +g++-14-x86-64-linux-gnu==14.2.0-19 +g++-x86-64-linux-gnu==4:14.2.0-1 +gcc==4:14.2.0-1 +gcc-14==14.2.0-19 +gcc-14-x86-64-linux-gnu==14.2.0-19 +gcc-x86-64-linux-gnu==4:14.2.0-1 +libarchive13t64==3.7.4-4+deb13u1 +libasan8==14.2.0-19 +libbinutils==2.44-3 +libc-dev-bin==2.41-12+deb13u3 +libc6-dev==2.41-12+deb13u3 +libcc1-0==14.2.0-19 +libcrypt-dev==1:4.4.38-1 +libctf-nobfd0==2.44-3 +libctf0==2.44-3 +libdouble-conversion3==3.3.1-1 +libdpkg-perl==1.22.22 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b/files/build/versions-public/dockers/docker-syncd-brcm-legacy-th-rpc/versions-deb-bookworm @@ -0,0 +1,70 @@ +binutils==2.40-2 +binutils-common==2.40-2 +binutils-x86-64-linux-gnu==2.40-2 +bzip2==1.0.8-5+b1 +cmake-data==3.25.1-1 +cpp==4:12.2.0-3 +cpp-12==12.2.0-14+deb12u1 +dpkg-dev==1.21.22 +g++==4:12.2.0-3 +g++-12==12.2.0-14+deb12u1 +gcc==4:12.2.0-3 +gcc-12==12.2.0-14+deb12u1 +libarchive13==3.6.2-1+deb12u3 +libasan8==12.2.0-14+deb12u1 +libbinutils==2.40-2 +libc-dev-bin==2.36-9+deb12u13 +libc6-dev==2.36-9+deb12u13 +libcc1-0==12.2.0-14+deb12u1 +libcrypt-dev==1:4.4.33-2 +libctf-nobfd0==2.40-2 +libctf0==2.40-2 +libdouble-conversion3==3.2.1-1 +libdpkg-perl==1.21.22 +libexpat1-dev==2.5.0-1+deb12u2 +libgcc-12-dev==12.2.0-14+deb12u1 +libglib2.0-0==2.74.6-2+deb12u8 +libgomp1==12.2.0-14+deb12u1 +libgprofng0==2.40-2 +libicu72==72.1-3+deb12u1 +libisl23==0.25-1.1 +libitm1==12.2.0-14+deb12u1 +libjs-jquery==3.6.1+dfsg+~3.5.14-1 +libjs-sphinxdoc==5.3.0-4 +libjs-underscore==1.13.4~dfsg+~1.11.4-3 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a/files/build/versions-public/dockers/docker-syncd-brcm-legacy-th-rpc/versions-py3 b/files/build/versions-public/dockers/docker-syncd-brcm-legacy-th-rpc/versions-py3 new file mode 100644 index 00000000000..337559effbb --- /dev/null +++ b/files/build/versions-public/dockers/docker-syncd-brcm-legacy-th-rpc/versions-py3 @@ -0,0 +1,4 @@ +cffi==1.16.0 +nnpy==1.4.2 +pycparser==3.0 +scapy==2.5.0 diff --git a/files/build/versions-public/dockers/docker-syncd-brcm-legacy-th/versions-deb-trixie b/files/build/versions-public/dockers/docker-syncd-brcm-legacy-th/versions-deb-trixie new file mode 100644 index 00000000000..28f576bb7f2 --- /dev/null +++ b/files/build/versions-public/dockers/docker-syncd-brcm-legacy-th/versions-deb-trixie @@ -0,0 +1,46 @@ +ethtool==1:6.14.2-1 +gdb==16.3-1 +gdbserver==16.3-1 +kmod==34.2-2 +libbabeltrace1==1.5.11-4+b2 +libcbor0.10==0.10.2-2 +libcurl3t64-gnutls==8.14.1-2+deb13u3 +libdebuginfod-common==0.192-4 +libdebuginfod1t64==0.192-4 +libdw1t64==0.192-4 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a/files/build/versions-public/dockers/docker-syncd-brcm-rpc/versions-deb-bookworm b/files/build/versions-public/dockers/docker-syncd-brcm-rpc/versions-deb-bookworm deleted file mode 100644 index aeb77ac602d..00000000000 --- a/files/build/versions-public/dockers/docker-syncd-brcm-rpc/versions-deb-bookworm +++ /dev/null @@ -1,70 +0,0 @@ -binutils==2.40-2 -binutils-common==2.40-2 -binutils-x86-64-linux-gnu==2.40-2 -bzip2==1.0.8-5+b1 -cmake-data==3.25.1-1 -cpp==4:12.2.0-3 -cpp-12==12.2.0-14+deb12u1 -dpkg-dev==1.21.22 -g++==4:12.2.0-3 -g++-12==12.2.0-14+deb12u1 -gcc==4:12.2.0-3 -gcc-12==12.2.0-14+deb12u1 -libarchive13==3.6.2-1+deb12u3 -libasan8==12.2.0-14+deb12u1 -libbinutils==2.40-2 -libc-dev-bin==2.36-9+deb12u13 -libc6-dev==2.36-9+deb12u13 -libcc1-0==12.2.0-14+deb12u1 -libcrypt-dev==1:4.4.33-2 -libctf-nobfd0==2.40-2 -libctf0==2.40-2 -libdouble-conversion3==3.2.1-1 -libdpkg-perl==1.21.22 -libexpat1-dev==2.5.0-1+deb12u2 -libgcc-12-dev==12.2.0-14+deb12u1 -libglib2.0-0==2.74.6-2+deb12u7 -libgomp1==12.2.0-14+deb12u1 -libgprofng0==2.40-2 -libicu72==72.1-3+deb12u1 -libisl23==0.25-1.1 -libitm1==12.2.0-14+deb12u1 -libjs-jquery==3.6.1+dfsg+~3.5.14-1 -libjs-sphinxdoc==5.3.0-4 -libjs-underscore==1.13.4~dfsg+~1.11.4-3 -libjsoncpp25==1.9.5-4 -liblsan0==12.2.0-14+deb12u1 -libmpc3==1.3.1-1 -libmpfr6==4.2.0-1 -libnanomsg-dev==1.1.5+dfsg-1.1+b1 -libnanomsg5==1.1.5+dfsg-1.1+b1 -libnsl-dev==1.3.0-2 -libpcre2-16-0==10.42-1 -libpython3-dev==3.11.2-1+b1 -libpython3.11-dev==3.11.2-6+deb12u6 -libqt5core5a==5.15.8+dfsg-11+deb12u3 -libqt5dbus5==5.15.8+dfsg-11+deb12u3 -libqt5network5==5.15.8+dfsg-11+deb12u3 -libquadmath0==12.2.0-14+deb12u1 -librhash0==1.4.3-3 -libssl3==3.0.17-1~deb12u3 -libstdc++-12-dev==12.2.0-14+deb12u1 -libthrift-0.17.0==0.17.0-2+b2 -libtirpc-dev==1.3.3+ds-1 -libtsan2==12.2.0-14+deb12u1 -libubsan1==12.2.0-14+deb12u1 -libuv1==1.44.2-1+deb12u1 -libxml2==2.9.14+dfsg-1.3~deb12u4 -linux-libc-dev==6.1.158-1 -make==4.3-4.1 -netbase==6.4 -openssl==3.0.17-1~deb12u3 -patch==2.7.6-7 -python3-scapy==2.5.0+dfsg-2 -python3.11-dev==3.11.2-6+deb12u6 -rpcsvc-proto==1.4.3-1 -shared-mime-info==2.2-1 -syncd-rpc==1.0.0 -wget==1.21.3-1+deb12u1 -xz-utils==5.4.1-1 -zlib1g-dev==1:1.2.13.dfsg-1 diff --git a/files/build/versions-public/dockers/docker-syncd-brcm-rpc/versions-deb-trixie b/files/build/versions-public/dockers/docker-syncd-brcm-rpc/versions-deb-trixie new file mode 100644 index 00000000000..f373488e399 --- /dev/null +++ b/files/build/versions-public/dockers/docker-syncd-brcm-rpc/versions-deb-trixie @@ -0,0 +1,75 @@ +binutils==2.44-3 +binutils-common==2.44-3 +binutils-x86-64-linux-gnu==2.44-3 +bzip2==1.0.8-6 +cmake-data==3.31.6-2 +cpp==4:14.2.0-1 +cpp-14==14.2.0-19 +cpp-14-x86-64-linux-gnu==14.2.0-19 +cpp-x86-64-linux-gnu==4:14.2.0-1 +dpkg-dev==1.22.22 +g++==4:14.2.0-1 +g++-14==14.2.0-19 +g++-14-x86-64-linux-gnu==14.2.0-19 +g++-x86-64-linux-gnu==4:14.2.0-1 +gcc==4:14.2.0-1 +gcc-14==14.2.0-19 +gcc-14-x86-64-linux-gnu==14.2.0-19 +gcc-x86-64-linux-gnu==4:14.2.0-1 +libarchive13t64==3.7.4-4+deb13u1 +libasan8==14.2.0-19 +libbinutils==2.44-3 +libc-dev-bin==2.41-12+deb13u3 +libc6-dev==2.41-12+deb13u3 +libcc1-0==14.2.0-19 +libcrypt-dev==1:4.4.38-1 +libctf-nobfd0==2.44-3 +libctf0==2.44-3 +libdouble-conversion3==3.3.1-1 +libdpkg-perl==1.22.22 +libexpat1-dev==2.7.1-2 +libgcc-14-dev==14.2.0-19 +libglib2.0-0t64==2.84.4-3~deb13u3 +libgomp1==14.2.0-19 +libgprofng0==2.44-3 +libhwasan0==14.2.0-19 +libicu76==76.1-4 +libisl23==0.27-1 +libitm1==14.2.0-19 +libjs-jquery==3.6.1+dfsg+~3.5.14-1 +libjs-sphinxdoc==8.1.3-5 +libjs-underscore==1.13.4~dfsg+~1.11.4-3 +libjsoncpp26==1.9.6-3 +liblsan0==14.2.0-19 +libmpc3==1.3.1-1+b3 +libmpfr6==4.2.2-1 +libnanomsg-dev==1.1.5+dfsg-1.1+b1 +libnanomsg5==1.1.5+dfsg-1.1+b1 +libpcre2-16-0==10.46-1~deb13u1 +libpython3-dev==3.13.5-1 +libpython3.13-dev==3.13.5-2+deb13u2 +libqt5core5t64==5.15.15+dfsg-6+deb13u1 +libqt5dbus5t64==5.15.15+dfsg-6+deb13u1 +libqt5network5t64==5.15.15+dfsg-6+deb13u1 +libquadmath0==14.2.0-19 +librhash1==1.4.5-1 +libsframe1==2.44-3 +libssl3t64==3.5.6-1~deb13u2 +libstdc++-14-dev==14.2.0-19 +libthrift-0.19.0t64==0.19.0-4+b1 +libtsan2==14.2.0-19 +libubsan1==14.2.0-19 +libuv1t64==1.50.0-2 +libxml2==2.12.7+dfsg+really2.9.14-2.1+deb13u2 +linux-libc-dev==6.12.90-2 +make==4.4.1-2 +openssl==3.5.6-1~deb13u2 +patch==2.8-2 +python3-scapy==2.6.1+dfsg-1 +python3.13-dev==3.13.5-2+deb13u2 +rpcsvc-proto==1.4.3-1 +shared-mime-info==2.4-5+b2 +syncd-rpc==1.0.0 +wget==1.25.0-2 +xz-utils==5.8.1-1 +zlib1g-dev==1:1.3.dfsg+really1.3.1-1+b1 diff --git a/files/build/versions-public/dockers/docker-syncd-brcm-rpc/versions-py3 b/files/build/versions-public/dockers/docker-syncd-brcm-rpc/versions-py3 deleted file mode 100644 index c0ba430e7c0..00000000000 --- a/files/build/versions-public/dockers/docker-syncd-brcm-rpc/versions-py3 +++ /dev/null @@ -1,4 +0,0 @@ -cffi==1.16.0 -nnpy==1.4.2 -pycparser==2.23 -scapy==2.5.0 diff --git a/files/build/versions-public/dockers/docker-syncd-brcm/versions-deb-bookworm b/files/build/versions-public/dockers/docker-syncd-brcm/versions-deb-bookworm deleted file mode 100644 index 371a525bd53..00000000000 --- a/files/build/versions-public/dockers/docker-syncd-brcm/versions-deb-bookworm +++ /dev/null @@ -1,47 +0,0 @@ -ethtool==1:6.1-1 -gdb==13.1-3 -gdbserver==13.1-3 -kmod==30+20221128-1 -libbabeltrace1==1.5.11-1+b2 -libboost-regex1.74.0==1.74.0+ds1-21 -libcbor0.8==0.8.0-2+b1 -libcurl3-gnutls==7.88.1-10+deb12u14 -libdebuginfod-common==0.188-2.1 -libdebuginfod1==0.188-2.1 -libdw1==0.188-2.1 -libedit2==3.1-20221030-2 -libfido2-1==1.12.0-2+b1 -libglib2.0-0==2.74.6-2+deb12u7 -libgpm2==1.20.7-10+b1 -libicu72==72.1-3+deb12u1 -libipt2==2.0.5-1 -libkmod2==30+20221128-1 -libmpfr6==4.2.0-1 -libprotobuf32==3.21.12-3 -libsaimetadata==1.0.0 -libsaimetadata-dbgsym==1.0.0 -libsairedis==1.0.0 -libsairedis-dbgsym==1.0.0 -libsource-highlight-common==3.1.9-4.2 -libsource-highlight4v5==3.1.9-4.2+b3 -libssl-dev==3.0.17-1~deb12u3 -libssl3==3.0.17-1~deb12u3 -libswsscommon-dbgsym==1.0.0 -libunwind8==1.6.2-3 -libyang-cpp-dbgsym==1.0.73 -lz4==1.9.4-1 -openssh-client==1:9.2p1-2+deb12u7 -openssl==3.0.17-1~deb12u3 -python3-swsscommon-dbgsym==1.0.0 -python3-yang-dbgsym==1.0.73 -sensible-utils==0.0.17+nmu1 -sonic-db-cli-dbgsym==1.0.0 -sonic-eventd-dbgsym==1.0.0-0 -sshpass==1.09-1+b1 -sswsyncd==1.0.0 -strace==6.1-0.1 -syncd==1.0.0 -syncd-dbgsym==1.0.0 -ucf==3.0043+nmu1+deb12u1 -vim==2:9.0.1378-2+deb12u2 -vim-runtime==2:9.0.1378-2+deb12u2 diff --git a/files/build/versions-public/dockers/docker-syncd-brcm/versions-deb-trixie b/files/build/versions-public/dockers/docker-syncd-brcm/versions-deb-trixie new file mode 100644 index 00000000000..28f576bb7f2 --- /dev/null +++ b/files/build/versions-public/dockers/docker-syncd-brcm/versions-deb-trixie @@ -0,0 +1,46 @@ +ethtool==1:6.14.2-1 +gdb==16.3-1 +gdbserver==16.3-1 +kmod==34.2-2 +libbabeltrace1==1.5.11-4+b2 +libcbor0.10==0.10.2-2 +libcurl3t64-gnutls==8.14.1-2+deb13u3 +libdebuginfod-common==0.192-4 +libdebuginfod1t64==0.192-4 +libdw1t64==0.192-4 +libedit2==3.1-20250104-1 +libfido2-1==1.15.0-1+b1 +libglib2.0-0t64==2.84.4-3~deb13u3 +libgpm2==1.20.7-11+b2 +libipt2==2.1.2-1 +libjson-c5==0.18+ds-1 +libkmod2==34.2-2 +libmpfr6==4.2.2-1 +libngtcp2-16==1.11.0-1+deb13u1 +libngtcp2-crypto-gnutls8==1.11.0-1+deb13u1 +libprotobuf32t64==3.21.12-11 +libsaimetadata==1.0.0 +libsaimetadata-dbgsym==1.0.0 +libsairedis==1.0.0 +libsairedis-dbgsym==1.0.0 +libsource-highlight-common==3.1.9-4.3 +libsource-highlight4t64==3.1.9-4.3+b1 +libswsscommon-dbgsym==1.0.0 +libtext-charwidth-perl==0.04-11+b4 +libtext-wrapi18n-perl==0.06-10 +libunwind8==1.8.1-0.1 +libyang3-dbgsym==3.12.2-1 +lz4==1.10.0-4 +openssh-client==1:10.0p1-7+fips +python3-swsscommon-dbgsym==1.0.0 +sensible-utils==0.0.25 +sonic-db-cli-dbgsym==1.0.0 +sonic-eventd-dbgsym==1.0.0-0 +sshpass==1.10-0.1 +sswsyncd==1.0.0 +strace==6.13+ds-1 +syncd==1.0.0 +syncd-dbgsym==1.0.0 +ucf==3.0052 +vim==2:9.1.1230-2 +vim-runtime==2:9.1.1230-2 diff --git a/files/build/versions-public/dockers/docker-syncd-mlnx-rpc/versions-deb-bookworm b/files/build/versions-public/dockers/docker-syncd-mlnx-rpc/versions-deb-bookworm index 52b33ba2c6c..a3eef935159 100644 --- a/files/build/versions-public/dockers/docker-syncd-mlnx-rpc/versions-deb-bookworm +++ b/files/build/versions-public/dockers/docker-syncd-mlnx-rpc/versions-deb-bookworm @@ -24,7 +24,7 @@ libdouble-conversion3==3.2.1-1 libdpkg-perl==1.21.22 libexpat1-dev==2.5.0-1+deb12u2 libgcc-12-dev==12.2.0-14+deb12u1 -libglib2.0-0==2.74.6-2+deb12u7 +libglib2.0-0==2.74.6-2+deb12u8 libgomp1==12.2.0-14+deb12u1 libgprofng0==2.40-2 libisl23==0.25-1.1 @@ -47,17 +47,17 @@ libqt5dbus5==5.15.8+dfsg-11+deb12u3 libqt5network5==5.15.8+dfsg-11+deb12u3 libquadmath0==12.2.0-14+deb12u1 librhash0==1.4.3-3 -libssl3==3.0.17-1~deb12u3 +libssl3==3.0.19-1~deb12u2 libstdc++-12-dev==12.2.0-14+deb12u1 libthrift-0.17.0==0.17.0-2+b2 libtirpc-dev==1.3.3+ds-1 libtsan2==12.2.0-14+deb12u1 libubsan1==12.2.0-14+deb12u1 libuv1==1.44.2-1+deb12u1 -linux-libc-dev==6.1.158-1 +linux-libc-dev==6.1.170-1 make==4.3-4.1 netbase==6.4 -openssl==3.0.17-1~deb12u3 +openssl==3.0.19-1~deb12u2 patch==2.7.6-7 python3-pip==23.0.1+dfsg-1 python3-scapy==2.5.0+dfsg-2 diff --git a/files/build/versions-public/dockers/docker-syncd-mlnx-rpc/versions-deb-trixie b/files/build/versions-public/dockers/docker-syncd-mlnx-rpc/versions-deb-trixie new file mode 100644 index 00000000000..d7c95780e74 --- /dev/null +++ b/files/build/versions-public/dockers/docker-syncd-mlnx-rpc/versions-deb-trixie @@ -0,0 +1,79 @@ +binutils==2.44-3 +binutils-common==2.44-3 +binutils-x86-64-linux-gnu==2.44-3 +bzip2==1.0.8-6 +cmake-data==3.31.6-2 +cpp==4:14.2.0-1 +cpp-14==14.2.0-19 +cpp-14-x86-64-linux-gnu==14.2.0-19 +cpp-x86-64-linux-gnu==4:14.2.0-1 +dpkg-dev==1.22.22 +g++==4:14.2.0-1 +g++-14==14.2.0-19 +g++-14-x86-64-linux-gnu==14.2.0-19 +g++-x86-64-linux-gnu==4:14.2.0-1 +gcc==4:14.2.0-1 +gcc-14==14.2.0-19 +gcc-14-x86-64-linux-gnu==14.2.0-19 +gcc-x86-64-linux-gnu==4:14.2.0-1 +libarchive13t64==3.7.4-4+deb13u1 +libasan8==14.2.0-19 +libbinutils==2.44-3 +libboost-atomic1.88.0==1.88.0-1 +libc-dev-bin==2.41-12+deb13u3 +libc6-dev==2.41-12+deb13u3 +libcc1-0==14.2.0-19 +libcrypt-dev==1:4.4.38-1 +libctf-nobfd0==2.44-3 +libctf0==2.44-3 +libdouble-conversion3==3.3.1-1 +libdpkg-perl==1.22.22 +libexpat1-dev==2.7.1-2 +libgcc-14-dev==14.2.0-19 +libglib2.0-0t64==2.84.4-3~deb13u3 +libgomp1==14.2.0-19 +libgprofng0==2.44-3 +libhwasan0==14.2.0-19 +libicu76==76.1-4 +libisl23==0.27-1 +libitm1==14.2.0-19 +libjs-jquery==3.6.1+dfsg+~3.5.14-1 +libjs-sphinxdoc==8.1.3-5 +libjs-underscore==1.13.4~dfsg+~1.11.4-3 +libjsoncpp26==1.9.6-3 +liblsan0==14.2.0-19 +libmpc3==1.3.1-1+b3 +libmpfr6==4.2.2-1 +libnanomsg-dev==1.1.5+dfsg-1.1+b1 +libnanomsg5==1.1.5+dfsg-1.1+b1 +libpcre2-16-0==10.46-1~deb13u1 +libpython3-dev==3.13.5-1 +libpython3.13-dev==3.13.5-2+deb13u2 +libqt5core5t64==5.15.15+dfsg-6+deb13u1 +libqt5dbus5t64==5.15.15+dfsg-6+deb13u1 +libqt5network5t64==5.15.15+dfsg-6+deb13u1 +libquadmath0==14.2.0-19 +librhash1==1.4.5-1 +libsframe1==2.44-3 +libssl3t64==3.5.6-1~deb13u2 +libstdc++-14-dev==14.2.0-19 +libthrift-0.19.0t64==0.19.0-4+b1 +libtsan2==14.2.0-19 +libubsan1==14.2.0-19 +libuv1t64==1.50.0-2 +linux-libc-dev==6.12.90-2 +make==4.4.1-2 +openssl==3.5.6-1~deb13u2 +patch==2.8-2 +python3-pip==25.1.1+dfsg-1 +python3-scapy==2.6.1+dfsg-1 +python3-six==1.17.0-1 +python3-thrift==0.19.0-4+b1 +python3.13-dev==3.13.5-2+deb13u2 +rpcsvc-proto==1.4.3-1 +shared-mime-info==2.4-5+b2 +syncd-rpc==1.0.0 +thrift-compiler==0.19.0-4+b1 +wget==1.25.0-2 +xz-utils==5.8.1-1 +zlib1g-dev==1:1.3.dfsg+really1.3.1-1+b1 diff --git a/files/build/versions-public/dockers/docker-syncd-mlnx-rpc/versions-py3 b/files/build/versions-public/dockers/docker-syncd-mlnx-rpc/versions-py3 index e36f0d30bae..4105db90096 100644 --- a/files/build/versions-public/dockers/docker-syncd-mlnx-rpc/versions-py3 +++ b/files/build/versions-public/dockers/docker-syncd-mlnx-rpc/versions-py3 @@ -1,5 +1,6 @@ cffi==1.16.0 nnpy==1.4.2 -pycparser==2.23 -scapy==2.5.0 -thrift==0.17.0 +pycparser==3.0 +scapy==2.6.1 +six==1.17.0 +thrift==0.19.0 diff --git a/files/build/versions-public/dockers/docker-syncd-mlnx/versions-deb-bookworm b/files/build/versions-public/dockers/docker-syncd-mlnx/versions-deb-bookworm index 6ba034b5198..9f5feb51570 100644 --- a/files/build/versions-public/dockers/docker-syncd-mlnx/versions-deb-bookworm +++ b/files/build/versions-public/dockers/docker-syncd-mlnx/versions-deb-bookworm @@ -15,7 +15,7 @@ libdw1==0.188-2.1 libedit2==3.1-20221030-2 libexpat1-dev==2.5.0-1+deb12u2 libfido2-1==1.12.0-2+b1 -libglib2.0-0==2.74.6-2+deb12u7 +libglib2.0-0==2.74.6-2+deb12u8 libgpm2==1.20.7-10+b1 libicu72==72.1-3+deb12u1 libipt2==2.0.5-1 @@ -34,19 +34,19 @@ libsairedis==1.0.0 libsairedis-dbgsym==1.0.0 libsource-highlight-common==3.1.9-4.2 libsource-highlight4v5==3.1.9-4.2+b3 -libssl-dev==3.0.17-1~deb12u3 -libssl3==3.0.17-1~deb12u3 +libssl-dev==3.0.19-1~deb12u2 +libssl3==3.0.19-1~deb12u2 libswsscommon-dbgsym==1.0.0 libtirpc-dev==1.3.3+ds-1 libunwind8==1.6.2-3 -libxml2==2.9.14+dfsg-1.3~deb12u4 +libxml2==2.9.14+dfsg-1.3~deb12u5 libyang-cpp-dbgsym==1.0.73 -linux-libc-dev==6.1.158-1 +linux-libc-dev==6.1.170-1 mft==4.34.0-145 mft-fwtrace-cfg==1.0.0 -mlnx-sai==1.mlnx.SAIBuild2505.33.2.67 -openssh-client==1:9.2p1-2+deb12u7 -openssl==3.0.17-1~deb12u3 +mlnx-sai==1.mlnx.SAIBuild2511.35.3400.14 +openssh-client==1:9.2p1-2+deb12u5+fips +openssl==3.0.19-1~deb12u2 pci.ids==0.0~2023.04.11-1 pciutils==1:3.9.0-4 python3-attr==22.2.0-1 @@ -63,7 +63,7 @@ sshpass==1.09-1+b1 strace==6.1-0.1 syncd==1.0.0 syncd-dbgsym==1.0.0 -sys-sdk-main==1.mlnx.4.8.2096 +sys-sdk-main==1.mlnx.4.8.3430 ucf==3.0043+nmu1+deb12u1 vim==2:9.0.1378-2+deb12u2 vim-runtime==2:9.0.1378-2+deb12u2 diff --git a/files/build/versions-public/dockers/docker-syncd-mlnx/versions-deb-trixie b/files/build/versions-public/dockers/docker-syncd-mlnx/versions-deb-trixie new file mode 100644 index 00000000000..8b9c302d750 --- /dev/null +++ b/files/build/versions-public/dockers/docker-syncd-mlnx/versions-deb-trixie @@ -0,0 +1,73 @@ +gdb==16.3-1 +gdbserver==16.3-1 +iproute2-mlnx==6.1.0-3 +kmod==34.2-2 +libbabeltrace1==1.5.11-4+b2 +libc-dev-bin==2.41-12+deb13u3 +libc6-dev==2.41-12+deb13u3 +libcbor0.10==0.10.2-2 +libcrypt-dev==1:4.4.38-1 +libcurl3t64-gnutls==8.14.1-2+deb13u3 +libdebuginfod-common==0.192-4 +libdebuginfod1t64==0.192-4 +libdw1t64==0.192-4 +libedit2==3.1-20250104-1 +libexpat1-dev==2.7.1-2 +libfido2-1==1.15.0-1+b1 +libglib2.0-0t64==2.84.4-3~deb13u3 +libgpm2==1.20.7-11+b2 +libipt2==2.1.2-1 +libjs-jquery==3.6.1+dfsg+~3.5.14-1 +libjs-sphinxdoc==8.1.3-5 +libjs-underscore==1.13.4~dfsg+~1.11.4-3 +libjson-c5==0.18+ds-1 +libkmod2==34.2-2 +libmpfr6==4.2.2-1 +libngtcp2-16==1.11.0-1+deb13u1 +libngtcp2-crypto-gnutls8==1.11.0-1+deb13u1 +libpci3==1:3.13.0-2 +libpython3-dev==3.13.5-1 +libpython3.13-dev==3.13.5-2+deb13u2 +libsaimetadata==1.0.0 +libsaimetadata-dbgsym==1.0.0 +libsairedis==1.0.0 +libsairedis-dbgsym==1.0.0 +libsource-highlight-common==3.1.9-4.3 +libsource-highlight4t64==3.1.9-4.3+b1 +libswsscommon-dbgsym==1.0.0 +libsystemd0==257.13-1~deb13u1 +libtext-charwidth-perl==0.04-11+b4 +libtext-wrapi18n-perl==0.06-10 +libudev1==257.13-1~deb13u1 +libunwind8==1.8.1-0.1 +libxml2==2.12.7+dfsg+really2.9.14-2.1+deb13u2 +libyang-cpp-dbgsym==1.0.73 +libyang3-dbgsym==3.12.2-1 +linux-libc-dev==6.12.90-2 +mft==4.36.0-147 +mft-fwtrace-cfg==1.0.0 +mlnx-sai==1.mlnx.SAIBuild2511.36.0.14 +openssh-client==1:10.0p1-7+fips +pci.ids==0.0~2025.06.09-1 +pciutils==1:3.13.0-2 +python3-attr==25.3.0-1 +python3-jsonschema==4.19.2-6 +python3-jsonschema-specifications==2023.12.1-2 +python3-referencing==0.36.2-1 +python3-rpds-py==0.21.0-2+b1 +python3-swsscommon-dbgsym==1.0.0 +python3-yang-dbgsym==1.0.73 +python3.13-dev==3.13.5-2+deb13u2 +rpcsvc-proto==1.4.3-1 +sensible-utils==0.0.25 +sonic-db-cli-dbgsym==1.0.0 +sonic-eventd-dbgsym==1.0.0-0 +sshpass==1.10-0.1 +strace==6.13+ds-1 +syncd==1.0.0 +syncd-dbgsym==1.0.0 +sys-sdk-main==1.mlnx.4.8.4068 +ucf==3.0052 +vim==2:9.1.1230-2 +vim-runtime==2:9.1.1230-2 +zlib1g-dev==1:1.3.dfsg+really1.3.1-1+b1 diff --git a/files/build/versions-public/dockers/docker-syncd-mrvl-prestera/versions-deb-bookworm-arm64 b/files/build/versions-public/dockers/docker-syncd-mrvl-prestera/versions-deb-bookworm-arm64 index b3241687801..36e690e27fd 100644 --- a/files/build/versions-public/dockers/docker-syncd-mrvl-prestera/versions-deb-bookworm-arm64 +++ b/files/build/versions-public/dockers/docker-syncd-mrvl-prestera/versions-deb-bookworm-arm64 @@ -9,15 +9,15 @@ libpcap0.8==1.10.3-1 libpcap0.8-dev==1.10.3-1 libpkgconf3==1.8.1-1 libpython3-dev==3.11.2-1+b1 -libpython3.11-dev==3.11.2-6+deb12u6 +libpython3.11-dev==3.11.2-6+deb12u7 libsaimetadata==1.0.0 libsairedis==1.0.0 -mrvllibsai==1.16.1-3 +mrvllibsai==1.17.1-13 pkg-config==1.8.1-1 pkgconf==1.8.1-1 pkgconf-bin==1.8.1-1 python3-dev==3.11.2-1+b1 -python3.11-dev==3.11.2-6+deb12u6 +python3.11-dev==3.11.2-6+deb12u7 sgml-base==1.31 swig==4.1.0-0.2 swig4.0==4.1.0-0.2 diff --git a/files/build/versions-public/dockers/docker-syncd-mrvl-prestera/versions-deb-bookworm-armhf b/files/build/versions-public/dockers/docker-syncd-mrvl-prestera/versions-deb-bookworm-armhf index b3241687801..36e690e27fd 100644 --- a/files/build/versions-public/dockers/docker-syncd-mrvl-prestera/versions-deb-bookworm-armhf +++ b/files/build/versions-public/dockers/docker-syncd-mrvl-prestera/versions-deb-bookworm-armhf @@ -9,15 +9,15 @@ libpcap0.8==1.10.3-1 libpcap0.8-dev==1.10.3-1 libpkgconf3==1.8.1-1 libpython3-dev==3.11.2-1+b1 -libpython3.11-dev==3.11.2-6+deb12u6 +libpython3.11-dev==3.11.2-6+deb12u7 libsaimetadata==1.0.0 libsairedis==1.0.0 -mrvllibsai==1.16.1-3 +mrvllibsai==1.17.1-13 pkg-config==1.8.1-1 pkgconf==1.8.1-1 pkgconf-bin==1.8.1-1 python3-dev==3.11.2-1+b1 -python3.11-dev==3.11.2-6+deb12u6 +python3.11-dev==3.11.2-6+deb12u7 sgml-base==1.31 swig==4.1.0-0.2 swig4.0==4.1.0-0.2 diff --git a/files/build/versions-public/dockers/docker-syncd-mrvl-prestera/versions-deb-trixie-arm64 b/files/build/versions-public/dockers/docker-syncd-mrvl-prestera/versions-deb-trixie-arm64 new file mode 100644 index 00000000000..06de598eba5 --- /dev/null +++ b/files/build/versions-public/dockers/docker-syncd-mrvl-prestera/versions-deb-trixie-arm64 @@ -0,0 +1,25 @@ +iputils-ping==3:20240905-3 +libcap-dev==1:2.75-10+deb13u1+b1 +libdbus-1-dev==1.16.2-2 +libexpat1-dev==2.7.1-2 +libjs-jquery==3.6.1+dfsg+~3.5.14-1 +libjs-sphinxdoc==8.1.3-5 +libjs-underscore==1.13.4~dfsg+~1.11.4-3 +libpcap-dev==1.10.5-2 +libpcap0.8-dev==1.10.5-2 +libpcap0.8t64==1.10.5-2 +libpkgconf3==1.8.1-4 +libpython3-dev==3.13.5-1 +libpython3.13-dev==3.13.5-2+deb13u2 +libsaimetadata==1.0.0 +libsairedis==1.0.0 +libsystemd-dev==257.13-1~deb13u1 +mrvllibsai==1.17.1-13 +pkgconf==1.8.1-4 +pkgconf-bin==1.8.1-4 +python3-dev==3.13.5-1 +python3.13-dev==3.13.5-2+deb13u2 +sgml-base==1.31+nmu1 +swig==4.3.0-1 +syncd==1.0.0 +xml-core==0.19 diff --git a/files/build/versions-public/dockers/docker-syncd-mrvl-prestera/versions-deb-trixie-armhf b/files/build/versions-public/dockers/docker-syncd-mrvl-prestera/versions-deb-trixie-armhf new file mode 100644 index 00000000000..06de598eba5 --- /dev/null +++ b/files/build/versions-public/dockers/docker-syncd-mrvl-prestera/versions-deb-trixie-armhf @@ -0,0 +1,25 @@ +iputils-ping==3:20240905-3 +libcap-dev==1:2.75-10+deb13u1+b1 +libdbus-1-dev==1.16.2-2 +libexpat1-dev==2.7.1-2 +libjs-jquery==3.6.1+dfsg+~3.5.14-1 +libjs-sphinxdoc==8.1.3-5 +libjs-underscore==1.13.4~dfsg+~1.11.4-3 +libpcap-dev==1.10.5-2 +libpcap0.8-dev==1.10.5-2 +libpcap0.8t64==1.10.5-2 +libpkgconf3==1.8.1-4 +libpython3-dev==3.13.5-1 +libpython3.13-dev==3.13.5-2+deb13u2 +libsaimetadata==1.0.0 +libsairedis==1.0.0 +libsystemd-dev==257.13-1~deb13u1 +mrvllibsai==1.17.1-13 +pkgconf==1.8.1-4 +pkgconf-bin==1.8.1-4 +python3-dev==3.13.5-1 +python3.13-dev==3.13.5-2+deb13u2 +sgml-base==1.31+nmu1 +swig==4.3.0-1 +syncd==1.0.0 +xml-core==0.19 diff --git a/files/build/versions-public/dockers/docker-syncd-vs/versions-deb-bookworm b/files/build/versions-public/dockers/docker-syncd-vs/versions-deb-bookworm index 1abd9b09844..0b9e8aba203 100644 --- a/files/build/versions-public/dockers/docker-syncd-vs/versions-deb-bookworm +++ b/files/build/versions-public/dockers/docker-syncd-vs/versions-deb-bookworm @@ -93,8 +93,8 @@ libboost1.83-tools-dev==1.83.0-4.2~bpo12+1 libbpf-dev==1:1.1.2-0+deb12u1 libc-ares-dev==1.18.1-3 libc-ares2==1.18.1-3 -libc-dev-bin==2.36-9+deb12u13 -libc6-dev==2.36-9+deb12u13 +libc-dev-bin==2.36-9+deb12u14 +libc6-dev==2.36-9+deb12u14 libcbor0.8==0.8.0-2+b1 libcc1-0==12.2.0-14+deb12u1 libclang-common-14-dev==1:14.0.6-12 @@ -128,7 +128,7 @@ libgc1==1:8.2.2-3 libgcc-12-dev==12.2.0-14+deb12u1 libgfortran-12-dev==12.2.0-14+deb12u1 libgfortran5==12.2.0-14+deb12u1 -libglib2.0-0==2.74.6-2+deb12u7 +libglib2.0-0==2.74.6-2+deb12u9 libgmp-dev==2:6.2.1+dfsg1-1.1 libgmpxx4ldbl==2:6.2.1+dfsg1-1.1 libgomp1==12.2.0-14+deb12u1 @@ -160,14 +160,14 @@ libmagic-mgc==1:5.44-3 libmagic1==1:5.44-3 libmpc3==1.3.1-1 libmpfr6==4.2.0-1 -libmunge2==0.5.15-2 +libmunge2==0.5.15-2+deb12u1 libnanomsg-dev==1.1.5+dfsg-1.1+b1 libnanomsg5==1.1.5+dfsg-1.1+b1 libnl-3-dev==3.7.0-0.2+b1sonic1 libnl-route-3-dev==3.7.0-0.2+b1sonic1 libnsl-dev==1.3.0-2 libnspr4==2:4.35-1 -libnss3==2:3.87.1-1+deb12u1 +libnss3==2:3.87.1-1+deb12u2 libnuma-dev==2.0.16-1 libnuma1==2.0.16-1 libobjc-12-dev==12.2.0-14+deb12u1 @@ -191,7 +191,7 @@ libprotoc32==3.21.12-3 libpsm-infinipath1==3.3+20.604758e7-6.2 libpsm2-2==11.2.185-2 libpython3-dev==3.11.2-1+b1 -libpython3.11-dev==3.11.2-6+deb12u6 +libpython3.11-dev==3.11.2-6+deb12u7 libqt5core5a==5.15.8+dfsg-11+deb12u3 libqt5dbus5==5.15.8+dfsg-11+deb12u3 libqt5network5==5.15.8+dfsg-11+deb12u3 @@ -208,8 +208,8 @@ libsaivs==1.0.0 libsaivs-dbgsym==1.0.0 libsource-highlight-common==3.1.9-4.2 libsource-highlight4v5==3.1.9-4.2+b3 -libssl-dev==3.0.17-1~deb12u3 -libssl3==3.0.17-1~deb12u3 +libssl-dev==3.0.20-1~deb12u1 +libssl3==3.0.20-1~deb12u1 libstdc++-12-dev==12.2.0-14+deb12u1 libswsscommon-dbgsym==1.0.0 libthrift-0.17.0==0.17.0-2+b2 @@ -226,11 +226,11 @@ libxau6==1:1.0.9-1 libxcb1==1.15-1 libxdmcp6==1:1.1.2-3 libxext6==2:1.3.4-1+b1 -libxml2==2.9.14+dfsg-1.3~deb12u4 +libxml2==2.9.14+dfsg-1.3~deb12u5 libxnvctrl0==525.85.05-3~deb12u1 libyang-cpp-dbgsym==1.0.73 libz3-4==4.8.12-3.1 -linux-libc-dev==6.1.158-1 +linux-libc-dev==6.1.174-1 llvm==1:14.0-55.7~deb12u1 llvm-14==1:14.0.6-12 llvm-14-linker-tools==1:14.0.6-12 @@ -244,11 +244,11 @@ nss-plugin-pem==1.0.8+1-1 ocl-icd-libopencl1==2.3.1-1 openmpi-bin==4.1.4-3+b1 openmpi-common==4.1.4-3 -openssh-client==1:9.2p1-2+deb12u7 -openssl==3.0.17-1~deb12u3 -p4lang-bmv2==1.15.0-7 +openssh-client==1:9.2p1-2+deb12u5+fips +openssl==3.0.20-1~deb12u1 +p4lang-bmv2==1.15.0-9 p4lang-p4c==1.2.4.2-2 -p4lang-pi==0.1.0-15 +p4lang-pi==0.1.0-17 pkg-config==1.8.1-1 pkgconf==1.8.1-1 pkgconf-bin==1.8.1-1 @@ -265,7 +265,7 @@ python3-six==1.16.0-4 python3-swsscommon-dbgsym==1.0.0 python3-thrift==0.17.0-2+b2 python3-yang-dbgsym==1.0.73 -python3.11-dev==3.11.2-6+deb12u6 +python3.11-dev==3.11.2-6+deb12u7 rpcsvc-proto==1.4.3-1 sensible-utils==0.0.17+nmu1 sgml-base==1.31 diff --git a/files/build/versions-public/dockers/docker-syncd-vs/versions-deb-trixie b/files/build/versions-public/dockers/docker-syncd-vs/versions-deb-trixie new file mode 100644 index 00000000000..a984a509762 --- /dev/null +++ b/files/build/versions-public/dockers/docker-syncd-vs/versions-deb-trixie @@ -0,0 +1,299 @@ +autoconf==2.72-3.1 +automake==1:1.17-4 +autotools-dev==20240727.1 +binutils==2.44-3 +binutils-common==2.44-3 +binutils-x86-64-linux-gnu==2.44-3 +clang==1:19.0-63 +clang-19==1:19.1.7-3+b1 +cpp==4:14.2.0-1 +cpp-14==14.2.0-19 +cpp-14-x86-64-linux-gnu==14.2.0-19 +cpp-x86-64-linux-gnu==4:14.2.0-1 +file==1:5.46-5 +flex==2.6.4-8.2+b4 +gcc==4:14.2.0-1 +gcc-14==14.2.0-19 +gcc-14-x86-64-linux-gnu==14.2.0-19 +gcc-x86-64-linux-gnu==4:14.2.0-1 +gdb==16.3-1 +gdbserver==16.3-1 +gfortran-14==14.2.0-19 +gfortran-14-x86-64-linux-gnu==14.2.0-19 +ibverbs-providers==56.1-1 +icu-devtools==76.1-4 +libabsl-dev==20240722.0-4 +libabsl20240722==20240722.0-4 +libamd-comgr2==6.0+git20231212.4510c28+dfsg-3+b2 +libamdhip64-5==5.7.1-6+deb13u1 +libasan8==14.2.0-19 +libbabeltrace1==1.5.11-4+b2 +libbinutils==2.44-3 +libboost-atomic1.83-dev==1.83.0-4.2 +libboost-atomic1.83.0==1.83.0-4.2 +libboost-chrono1.83-dev==1.83.0-4.2 +libboost-chrono1.83.0t64==1.83.0-4.2 +libboost-container1.83-dev==1.83.0-4.2 +libboost-container1.83.0==1.83.0-4.2 +libboost-context1.83-dev==1.83.0-4.2 +libboost-context1.83.0==1.83.0-4.2 +libboost-coroutine1.83-dev==1.83.0-4.2 +libboost-coroutine1.83.0==1.83.0-4.2 +libboost-date-time1.83-dev==1.83.0-4.2 +libboost-date-time1.83.0==1.83.0-4.2 +libboost-exception1.83-dev==1.83.0-4.2 +libboost-fiber1.83-dev==1.83.0-4.2 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+libfabric1==2.1.0-1.1 +libfido2-1==1.15.0-1+b1 +libfl-dev==2.6.4-8.2+b4 +libfl2==2.6.4-8.2+b4 +libfuse3-4==3.17.2-3 +libgc-dev==1:8.2.8-1 +libgc1==1:8.2.8-1 +libgcc-14-dev==14.2.0-19 +libgfortran-14-dev==14.2.0-19 +libgfortran5==14.2.0-19 +libglib2.0-0t64==2.84.4-3~deb13u3 +libgmp-dev==2:6.3.0+dfsg-3 +libgmpxx4ldbl==2:6.3.0+dfsg-3 +libgomp1==14.2.0-19 +libgpm2==1.20.7-11+b2 +libgprofng0==2.44-3 +libgrpc++-dev==1.51.1-6 +libgrpc++1.51t64==1.51.1-6 +libgrpc-dev==1.51.1-6 +libgrpc29t64==1.51.1-6 +libhsa-runtime64-1==6.1.2-3 +libhsakmt1==6.2.4+ds-1 +libhwasan0==14.2.0-19 +libhwloc-dev==2.12.0-4 +libhwloc-plugins==2.12.0-4 +libhwloc15==2.12.0-4 +libibmad5==56.1-1 +libibumad3==56.1-1 +libibverbs-dev==56.1-1 +libibverbs1==56.1-1 +libicu-dev==76.1-4 +libicu76==76.1-4 +libipt2==2.1.2-1 +libisl23==0.27-1 +libitm1==14.2.0-19 +libjs-jquery==3.6.1+dfsg+~3.5.14-1 +libjs-jquery-ui==1.13.2+dfsg-1 +libjs-sphinxdoc==8.1.3-5 +libjs-underscore==1.13.4~dfsg+~1.11.4-3 +libjson-c5==0.18+ds-1 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+libpython3-dev==3.13.5-1 +libpython3.13-dev==3.13.5-2+deb13u2 +libqt5core5t64==5.15.15+dfsg-6+deb13u1 +libqt5dbus5t64==5.15.15+dfsg-6+deb13u1 +libqt5network5t64==5.15.15+dfsg-6+deb13u1 +libquadmath0==14.2.0-19 +librdmacm1t64==56.1-1 +libre2-11==20240702-3+b1 +libre2-dev==20240702-3+b1 +libsai==1.0.0 +libsaimetadata==1.0.0 +libsaimetadata-dbgsym==1.0.0 +libsairedis==1.0.0 +libsairedis-dbgsym==1.0.0 +libsaivs==1.0.0 +libsaivs-dbgsym==1.0.0 +libsframe1==2.44-3 +libsource-highlight-common==3.1.9-4.3 +libsource-highlight4t64==3.1.9-4.3+b1 +libstdc++-14-dev==14.2.0-19 +libswsscommon-dbgsym==1.0.0 +libsystemd-dev==257.13-1~deb13u1 +libtext-charwidth-perl==0.04-11+b4 +libtext-wrapi18n-perl==0.06-10 +libthrift-0.19.0t64==0.19.0-4+b1 +libthrift-dev==0.19.0-4+b1 +libtool==2.5.4-4 +libtsan2==14.2.0-19 +libubsan1==14.2.0-19 +libucx0==1.18.1+ds-2+b1 +libunwind8==1.8.1-0.1 +libx11-6==2:1.8.12-1 +libx11-data==2:1.8.12-1 +libxau6==1:1.0.11-1 +libxcb1==1.17.0-2+b1 +libxdmcp6==1:1.1.5-1 +libxext6==2:1.3.4-1+b3 +libxml2==2.12.7+dfsg+really2.9.14-2.1+deb13u2 +libxnvctrl0==535.171.04-1+b2 +libyang3-dbgsym==3.12.2-1 +libz3-4==4.13.3-1 +libze1==1.20.6-1 +libzstd-dev==1.5.7+dfsg-1 +linux-libc-dev==6.12.90-2 +llvm==1:19.0-63 +llvm-19==1:19.1.7-3+b1 +llvm-19-linker-tools==1:19.1.7-3+b1 +llvm-19-runtime==1:19.1.7-3+b1 +llvm-runtime==1:19.0-63 +m4==1.4.19-8 +mpi-default-bin==1.18 +mpi-default-dev==1.18 +ocl-icd-libopencl1==2.3.3-1 +openmpi-bin==5.0.7-1 +openmpi-common==5.0.7-1 +openssh-client==1:10.0p1-7+fips +p4lang-bmv2==1.15.0-9 +p4lang-p4c==1.2.4.2-2 +p4lang-pi==0.1.1-1 +pkg-config==1.8.1-4 +pkgconf==1.8.1-4 +pkgconf-bin==1.8.1-4 +protobuf-compiler==3.21.12-11 +protobuf-compiler-grpc==1.51.1-6 +python3-dev==3.13.5-1 +python3-grpcio==1.51.1-6 +python3-protobuf==3.21.12-11 +python3-psutil==7.0.0-2 +python3-pyroute2==0.7.7-4 +python3-scapy==2.6.1+dfsg-1 +python3-six==1.17.0-1 +python3-swsscommon-dbgsym==1.0.0 +python3-thrift==0.19.0-4+b1 +python3.13-dev==3.13.5-2+deb13u2 +rpcsvc-proto==1.4.3-1 +sensible-utils==0.0.25 +sgml-base==1.31+nmu1 +shared-mime-info==2.4-5+b2 +sonic-db-cli-dbgsym==1.0.0 +sonic-eventd-dbgsym==1.0.0-0 +sshpass==1.10-0.1 +strace==6.13+ds-1 +syncd-vs==1.0.0 +syncd-vs-dbgsym==1.0.0 +tcpdump==4.99.5-2 +thrift-compiler==0.19.0-4+b1 +ucf==3.0052 +vim==2:9.1.1230-2 +vim-runtime==2:9.1.1230-2 +xml-core==0.19 +zlib1g-dev==1:1.3.dfsg+really1.3.1-1+b1 diff --git a/files/build/versions-public/dockers/docker-syncd-vs/versions-py3 b/files/build/versions-public/dockers/docker-syncd-vs/versions-py3 index ed18794433e..a0698645918 100644 --- a/files/build/versions-public/dockers/docker-syncd-vs/versions-py3 +++ b/files/build/versions-public/dockers/docker-syncd-vs/versions-py3 @@ -1,7 +1,8 @@ grpcio==1.51.1 ply==3.11 protobuf==4.21.12 -psutil==5.9.4 -pyroute2==0.7.2 -scapy==2.5.0 -thrift==0.17.0 +psutil==7.0.0 +pyroute2==0.7.7 +scapy==2.6.1 +six==1.17.0 +thrift==0.19.0 diff --git a/files/build/versions-public/dockers/docker-sysmgr/versions-deb-bookworm b/files/build/versions-public/dockers/docker-sysmgr/versions-deb-bookworm deleted file mode 100644 index c9b6a68c3d8..00000000000 --- a/files/build/versions-public/dockers/docker-sysmgr/versions-deb-bookworm +++ /dev/null @@ -1,41 +0,0 @@ -gdb==13.1-3 -gdbserver==13.1-3 -libbabeltrace1==1.5.11-1+b2 -libboost-regex1.74.0==1.74.0+ds1-21 -libcbor0.8==0.8.0-2+b1 -libcurl3-gnutls==7.88.1-10+deb12u14 -libdbus-c++-1-0v5==0.9.0-11 -libdebuginfod-common==0.188-2.1 -libdebuginfod1==0.188-2.1 -libdw1==0.188-2.1 -libecore1==1.26.3-1+b1 -libedit2==3.1-20221030-2 -libeina1a==1.26.3-1+b1 -libfido2-1==1.12.0-2+b1 -libglib2.0-0==2.74.6-2+deb12u7 -libgpm2==1.20.7-10+b1 -libicu72==72.1-3+deb12u1 -libipt2==2.0.5-1 -libmpfr6==4.2.0-1 -libprotobuf32==3.21.12-3 -libsource-highlight-common==3.1.9-4.2 -libsource-highlight4v5==3.1.9-4.2+b3 -libssl-dev==3.0.17-1~deb12u3 -libssl3==3.0.17-1~deb12u3 -libswsscommon-dbgsym==1.0.0 -libunwind8==1.6.2-3 -libyang-cpp-dbgsym==1.0.73 -openssh-client==1:9.2p1-2+deb12u7 -openssl==3.0.17-1~deb12u3 -python3-swsscommon-dbgsym==1.0.0 -python3-yang-dbgsym==1.0.73 -sensible-utils==0.0.17+nmu1 -sonic-db-cli-dbgsym==1.0.0 -sonic-eventd-dbgsym==1.0.0-0 -sshpass==1.09-1+b1 -strace==6.1-0.1 -sysmgr==1.0.0 -sysmgr-dbg==1.0.0 -ucf==3.0043+nmu1+deb12u1 -vim==2:9.0.1378-2+deb12u2 -vim-runtime==2:9.0.1378-2+deb12u2 diff --git a/files/build/versions-public/dockers/docker-sysmgr/versions-deb-trixie b/files/build/versions-public/dockers/docker-sysmgr/versions-deb-trixie new file mode 100644 index 00000000000..30fec337a6a --- /dev/null +++ b/files/build/versions-public/dockers/docker-sysmgr/versions-deb-trixie @@ -0,0 +1,38 @@ +gdb==16.3-1 +gdbserver==16.3-1 +libbabeltrace1==1.5.11-4+b2 +libcbor0.10==0.10.2-2 +libcurl3t64-gnutls==8.14.1-2+deb13u3 +libdbus-c++-1-0v5==0.9.0-15 +libdebuginfod-common==0.192-4 +libdebuginfod1t64==0.192-4 +libdw1t64==0.192-4 +libedit2==3.1-20250104-1 +libfido2-1==1.15.0-1+b1 +libglib2.0-0t64==2.84.4-3~deb13u3 +libgpm2==1.20.7-11+b2 +libipt2==2.1.2-1 +libjson-c5==0.18+ds-1 +libmpfr6==4.2.2-1 +libngtcp2-16==1.11.0-1+deb13u1 +libngtcp2-crypto-gnutls8==1.11.0-1+deb13u1 +libprotobuf32t64==3.21.12-11 +libsource-highlight-common==3.1.9-4.3 +libsource-highlight4t64==3.1.9-4.3+b1 +libswsscommon-dbgsym==1.0.0 +libtext-charwidth-perl==0.04-11+b4 +libtext-wrapi18n-perl==0.06-10 +libunwind8==1.8.1-0.1 +libyang3-dbgsym==3.12.2-1 +openssh-client==1:10.0p1-7+fips +python3-swsscommon-dbgsym==1.0.0 +sensible-utils==0.0.25 +sonic-db-cli-dbgsym==1.0.0 +sonic-eventd-dbgsym==1.0.0-0 +sshpass==1.10-0.1 +strace==6.13+ds-1 +sysmgr==1.0.0 +sysmgr-dbg==1.0.0 +ucf==3.0052 +vim==2:9.1.1230-2 +vim-runtime==2:9.1.1230-2 diff --git a/files/build/versions-public/dockers/docker-teamd/versions-deb-bookworm b/files/build/versions-public/dockers/docker-teamd/versions-deb-bookworm deleted file mode 100644 index 2faf354e02c..00000000000 --- a/files/build/versions-public/dockers/docker-teamd/versions-deb-bookworm +++ /dev/null @@ -1,39 +0,0 @@ -gdb==13.1-3 -gdbserver==13.1-3 -libbabeltrace1==1.5.11-1+b2 -libboost-regex1.74.0==1.74.0+ds1-21 -libcbor0.8==0.8.0-2+b1 -libcurl3-gnutls==7.88.1-10+deb12u14 -libdebuginfod-common==0.188-2.1 -libdebuginfod1==0.188-2.1 -libdw1==0.188-2.1 -libedit2==3.1-20221030-2 -libfido2-1==1.12.0-2+b1 -libglib2.0-0==2.74.6-2+deb12u7 -libgpm2==1.20.7-10+b1 -libicu72==72.1-3+deb12u1 -libipt2==2.0.5-1 -libmpfr6==4.2.0-1 -libsource-highlight-common==3.1.9-4.2 -libsource-highlight4v5==3.1.9-4.2+b3 -libssl-dev==3.0.17-1~deb12u3 -libssl3==3.0.17-1~deb12u3 -libswsscommon-dbgsym==1.0.0 -libteam-utils==1.31-1 -libteam-utils-dbgsym==1.31-1 -libteamdctl0-dbgsym==1.31-1 -libunwind8==1.6.2-3 -libyang-cpp-dbgsym==1.0.73 -openssh-client==1:9.2p1-2+deb12u7 -openssl==3.0.17-1~deb12u3 -python3-swsscommon-dbgsym==1.0.0 -python3-yang-dbgsym==1.0.73 -sensible-utils==0.0.17+nmu1 -sonic-db-cli-dbgsym==1.0.0 -sonic-eventd-dbgsym==1.0.0-0 -sshpass==1.09-1+b1 -strace==6.1-0.1 -swss-dbg==1.0.0 -ucf==3.0043+nmu1+deb12u1 -vim==2:9.0.1378-2+deb12u2 -vim-runtime==2:9.0.1378-2+deb12u2 diff --git a/files/build/versions-public/dockers/docker-teamd/versions-deb-trixie b/files/build/versions-public/dockers/docker-teamd/versions-deb-trixie new file mode 100644 index 00000000000..31867d6d1eb --- /dev/null +++ b/files/build/versions-public/dockers/docker-teamd/versions-deb-trixie @@ -0,0 +1,38 @@ +gdb==16.3-1 +gdbserver==16.3-1 +libbabeltrace1==1.5.11-4+b2 +libcbor0.10==0.10.2-2 +libcurl3t64-gnutls==8.14.1-2+deb13u3 +libdebuginfod-common==0.192-4 +libdebuginfod1t64==0.192-4 +libdw1t64==0.192-4 +libedit2==3.1-20250104-1 +libfido2-1==1.15.0-1+b1 +libglib2.0-0t64==2.84.4-3~deb13u3 +libgpm2==1.20.7-11+b2 +libipt2==2.1.2-1 +libjson-c5==0.18+ds-1 +libmpfr6==4.2.2-1 +libngtcp2-16==1.11.0-1+deb13u1 +libngtcp2-crypto-gnutls8==1.11.0-1+deb13u1 +libsource-highlight-common==3.1.9-4.3 +libsource-highlight4t64==3.1.9-4.3+b1 +libswsscommon-dbgsym==1.0.0 +libteam-utils==1.31-1 +libteam-utils-dbgsym==1.31-1 +libteamdctl0-dbgsym==1.31-1 +libtext-charwidth-perl==0.04-11+b4 +libtext-wrapi18n-perl==0.06-10 +libunwind8==1.8.1-0.1 +libyang3-dbgsym==3.12.2-1 +openssh-client==1:10.0p1-7+fips +python3-swsscommon-dbgsym==1.0.0 +sensible-utils==0.0.25 +sonic-db-cli-dbgsym==1.0.0 +sonic-eventd-dbgsym==1.0.0-0 +sshpass==1.10-0.1 +strace==6.13+ds-1 +swss-dbg==1.0.0 +ucf==3.0052 +vim==2:9.1.1230-2 +vim-runtime==2:9.1.1230-2 diff --git a/files/build/versions-public/dockers/docker-telemetry-watchdog/versions-deb-bookworm b/files/build/versions-public/dockers/docker-telemetry-watchdog/versions-deb-trixie similarity index 100% rename from files/build/versions-public/dockers/docker-telemetry-watchdog/versions-deb-bookworm rename to files/build/versions-public/dockers/docker-telemetry-watchdog/versions-deb-trixie diff --git a/files/build/versions-public/dockers/sonic-slave-bookworm/versions-deb-bookworm b/files/build/versions-public/dockers/sonic-slave-bookworm/versions-deb-bookworm index f32b2a2d343..ddcf663d912 100644 --- a/files/build/versions-public/dockers/sonic-slave-bookworm/versions-deb-bookworm +++ b/files/build/versions-public/dockers/sonic-slave-bookworm/versions-deb-bookworm @@ -15,8 +15,8 @@ aspell-en==2020.12.07-0-1 at-spi2-common==2.46.0-5 at-spi2-core==2.46.0-5 auditd==1:3.0.9-1 -augeas-lenses==1.14.0-1 -augeas-tools==1.14.0-1 +augeas-lenses==1.14.0-1+deb12u1 +augeas-tools==1.14.0-1+deb12u1 autoconf==2.71-3 autoconf-archive==20220903-3 autogen==1:5.18.16-5 @@ -26,10 +26,12 @@ autopoint==0.21-12 autotools-dev==20220109.1 bash-completion==1:2.11-6 bc==1.07.1-3+b1 -bind9-dnsutils==1:9.18.41-1~deb12u1 -bind9-host==1:9.18.41-1~deb12u1 -bind9-libs==1:9.18.41-1~deb12u1 +bind9-dnsutils==1:9.18.49-1~deb12u1 +bind9-host==1:9.18.49-1~deb12u1 +bind9-libs==1:9.18.49-1~deb12u1 binutils==2.40-2 +binutils-aarch64-linux-gnu==2.40-2 +binutils-arm-linux-gnueabihf==2.40-2 binutils-common==2.40-2 binutils-x86-64-linux-gnu==2.40-2 bison==2:3.8.2+dfsg-1+b1 @@ -42,6 +44,7 @@ bzip2==1.0.8-5+b1 bzip2-doc==1.0.8-5 ca-certificates==20230311+deb12u1 ca-certificates-java==20230710~deb12u1 +ccache==4.8+really4.7.5-1 cdbs==0.4.166 check==0.15.2-2+b1 chrpath==0.16-2+b1 @@ -58,6 +61,8 @@ cowdancer==0.89 cpio==2.13+dfsg-7.1 cpp==4:12.2.0-3 cpp-12==12.2.0-14+deb12u1 +cpp-12-arm-linux-gnueabihf==12.2.0-14cross1 +cpp-arm-linux-gnueabihf==4:12.2.0-3 cppcheck==2.10-2 cppzmq-dev==4.9.0-1 cron==3.0pl1-162 @@ -92,12 +97,12 @@ dh-runit==2.15.2 dh-strip-nondeterminism==1.13.1-1 dictionaries-common==1.29.5 diffstat==1.65-1 -dirmngr==2.2.40-1.1+deb12u1 -distro-info-data==0.58+deb12u5 +dirmngr==2.2.40-1.1+deb12u2 +distro-info-data==0.58+deb12u7 dkms==3.0.10-8+deb12u1 dmidecode==3.4-1 dmsetup==2:1.02.185-2 -dnsutils==1:9.18.41-1~deb12u1 +dnsutils==1:9.18.49-1~deb12u1 docbook==4.5-10 docbook-dsssl==1.79-10 docbook-to-man==1:2.0.0-45 @@ -106,12 +111,12 @@ docbook-xml==4.5-12 docker-buildx-plugin==0.10.5-1~debian.12~bookworm docker-ce==5:24.0.2-1~debian.12~bookworm docker-ce-cli==5:24.0.2-1~debian.12~bookworm -docker-ce-rootless-extras==5:29.1.2-1~debian.12~bookworm +docker-ce-rootless-extras==5:29.6.0-1~debian.12~bookworm docker-compose-plugin==2.18.1-1~debian.12~bookworm docutils-common==0.19+dfsg-6 dosfstools==4.2-1 doxygen==1.9.4-4 -dpkg-dev==1.21.22 +dpkg-dev==1.21.23 dput==1.1.3 dvipng==1.15-1.1+b1 dvisvgm==3.0.3-1 @@ -122,9 +127,9 @@ efibootmgr==17-2 emacsen-common==3.0.5 enchant-2==2.3.3-2 equivs==2.3.1 -exim4-base==4.96-15+deb12u7 -exim4-config==4.96-15+deb12u7 -exim4-daemon-light==4.96-15+deb12u7 +exim4-base==4.96-15+deb12u10 +exim4-config==4.96-15+deb12u10 +exim4-daemon-light==4.96-15+deb12u10 expat==2.5.0-1+deb12u2 fakeroot==1.31-1.2 fig2dev==1:3.2.8b-3+deb12u2 @@ -149,7 +154,11 @@ g++-12==12.2.0-14+deb12u1 gawk==1:5.2.1-2 gcc==4:12.2.0-3 gcc-12==12.2.0-14+deb12u1 +gcc-12-arm-linux-gnueabihf==12.2.0-14cross1 +gcc-12-arm-linux-gnueabihf-base==12.2.0-14cross1 +gcc-12-cross-base==12.2.0-14cross1 gcc-12-multilib==12.2.0-14+deb12u1 +gcc-arm-linux-gnueabihf==4:12.2.0-3 gcc-multilib==4:12.2.0-3 gcovr==5.2-1 gdb==13.1-3 @@ -163,22 +172,22 @@ ghostscript==10.0.0~dfsg-11+deb12u8 gir1.2-atk-1.0==2.46.0-5 gir1.2-atspi-2.0==2.46.0-5 gir1.2-freedesktop==1.74.0-3 -gir1.2-gdkpixbuf-2.0==2.42.10+dfsg-1+deb12u2 +gir1.2-gdkpixbuf-2.0==2.42.10+dfsg-1+deb12u4 gir1.2-glib-2.0==1.74.0-3 gir1.2-gtk-3.0==3.24.38-2~deb12u3 gir1.2-harfbuzz-0.0==6.0.0+dfsg-3 -gir1.2-packagekitglib-1.0==1.2.6-5 +gir1.2-packagekitglib-1.0==1.2.6-5+deb12u1 gir1.2-pango-1.0==1.50.12+ds-1 -git==1:2.39.5-0+deb12u2 +git==1:2.39.5-0+deb12u3 git-buildpackage==0.9.30 -git-man==1:2.39.5-0+deb12u2 +git-man==1:2.39.5-0+deb12u3 glib-networking==2.74.0-4 glib-networking-common==2.74.0-4 glib-networking-services==2.74.0-4 -gnupg==2.2.40-1.1+deb12u1 -gnupg-l10n==2.2.40-1.1+deb12u1 -gnupg-utils==2.2.40-1.1+deb12u1 -gnupg2==2.2.40-1.1+deb12u1 +gnupg==2.2.40-1.1+deb12u2 +gnupg-l10n==2.2.40-1.1+deb12u2 +gnupg-utils==2.2.40-1.1+deb12u2 +gnupg2==2.2.40-1.1+deb12u2 gobject-introspection==1.74.0-3 golang==2:1.19~1 golang-1.19==1.19.8-2 @@ -189,21 +198,25 @@ golang-doc==2:1.19~1 golang-go==2:1.19~1 golang-src==2:1.19~1 googletest==1.12.1-0.2 -gpg==2.2.40-1.1+deb12u1 -gpg-agent==2.2.40-1.1+deb12u1 -gpg-wks-client==2.2.40-1.1+deb12u1 -gpg-wks-server==2.2.40-1.1+deb12u1 -gpgconf==2.2.40-1.1+deb12u1 -gpgsm==2.2.40-1.1+deb12u1 +gpg==2.2.40-1.1+deb12u2 +gpg-agent==2.2.40-1.1+deb12u2 +gpg-wks-client==2.2.40-1.1+deb12u2 +gpg-wks-server==2.2.40-1.1+deb12u2 +gpgconf==2.2.40-1.1+deb12u2 +gpgsm==2.2.40-1.1+deb12u2 graphviz==2.42.2-7+deb12u1 groff==1.22.4-10 groff-base==1.22.4-10 +grub-common==2.06-13+deb12u2 +grub-efi-arm64-bin==2.06-13+deb12u2 +grub-efi-arm64-signed==1+2.06+13+deb12u2 +grub2-common==2.06-13+deb12u2 gsettings-desktop-schemas==43.0-1 gsfonts==2:20200910-7 gstreamer1.0-libav==1.22.0-2 -gstreamer1.0-plugins-base==1.22.0-3+deb12u5 +gstreamer1.0-plugins-base==1.22.0-3+deb12u6 gstreamer1.0-plugins-good==1.22.0-5+deb12u3 -gstreamer1.0-x==1.22.0-3+deb12u5 +gstreamer1.0-x==1.22.0-3+deb12u6 gtk-update-icon-cache==3.24.38-2~deb12u3 guile-3.0-libs==3.0.8-2 hicolor-icon-theme==0.17-2 @@ -213,10 +226,10 @@ i965-va-driver==2.4.1+dfsg1-1 ibverbs-providers==44.0-2 icc-profiles-free==2.0.1+dfsg-1.1 icu-devtools==72.1-3+deb12u1 -imagemagick==8:6.9.11.60+dfsg-1.6+deb12u4 -imagemagick-6-common==8:6.9.11.60+dfsg-1.6+deb12u4 -imagemagick-6.q16==8:6.9.11.60+dfsg-1.6+deb12u4 -inetutils-telnet==2:2.4-2+deb12u1 +imagemagick==8:6.9.11.60+dfsg-1.6+deb12u10 +imagemagick-6-common==8:6.9.11.60+dfsg-1.6+deb12u10 +imagemagick-6.q16==8:6.9.11.60+dfsg-1.6+deb12u10 +inetutils-telnet==2:2.4-2+deb12u3 inkscape==1.2.2-2+b1 install-info==6.8-6+b1 intel-media-va-driver==23.1.1+dfsg1-1 @@ -236,10 +249,10 @@ javascript-common==11+nmu1 jq==1.6-2.1+deb12u1 junit4==4.13.2-3 junit5==5.9.2-1 -kernel-wedge==2.104 +kernel-wedge==2.106~deb12u1 kmod==30+20221128-1 -krb5-locales==1.20.1-2+deb12u4 -krb5-multidev==1.20.1-2+deb12u4 +krb5-locales==1.20.1-2+deb12u5 +krb5-multidev==1.20.1-2+deb12u5 lcov==1.16-1 less==590-2.1~deb12u2 lib2geom1.2.0==1.2.2-3 @@ -274,10 +287,11 @@ libappstream4==0.16.1-2 libapt-pkg-perl==0.1.40+b2 libarchive-cpio-perl==0.10-3 libarchive-zip-perl==1.68-1 -libarchive13==3.6.2-1+deb12u3 +libarchive13==3.6.2-1+deb12u4 libargon2-1==0~20171227-0.3+deb12u1 libarray-intspan-perl==2.004-2 libasan8==12.2.0-14+deb12u1 +libasan8-armhf-cross==12.2.0-14cross1 libasm-java==9.4-1 libasound2==1.2.8-1+b1 libasound2-data==1.2.8-1 @@ -296,11 +310,12 @@ libatkmm-1.6-1v5==2.28.3-1 libatm1==1:2.5.1-4+b2 libatm1-dev==1:2.5.1-4+b2 libatomic1==12.2.0-14+deb12u1 +libatomic1-armhf-cross==12.2.0-14cross1 libatspi2.0-0==2.46.0-5 libatspi2.0-dev==2.46.0-5 libattr1-dev==1:2.5.1-4 libaudit-dev==1:3.0.9-1 -libaugeas0==1.14.0-1 +libaugeas0==1.14.0-1+deb12u1 libauparse-dev==1:3.0.9-1 libauparse0==1:3.0.9-1 libauthen-sasl-perl==2.1600-3 @@ -308,11 +323,11 @@ libavahi-client3==0.8-10+deb12u1 libavahi-common-data==0.8-10+deb12u1 libavahi-common3==0.8-10+deb12u1 libavc1394-0==0.5.4-5 -libavcodec59==7:5.1.8-0+deb12u1 -libavfilter8==7:5.1.8-0+deb12u1 -libavformat59==7:5.1.8-0+deb12u1 +libavcodec59==7:5.1.9-0+deb12u1 +libavfilter8==7:5.1.9-0+deb12u1 +libavformat59==7:5.1.9-0+deb12u1 libavif15==0.11.1-1+deb12u1 -libavutil57==7:5.1.8-0+deb12u1 +libavutil57==7:5.1.9-0+deb12u1 libb-hooks-endofscope-perl==0.26-1 libb-hooks-op-check-perl==0.22-2+b1 libbabeltrace-dev==1.5.11-1+b2 @@ -411,15 +426,16 @@ libbsh-java==2.0b4-20 libbz2-dev==1.0.8-5+b1 libc-ares-dev==1.18.1-3 libc-ares2==1.18.1-3 -libc-dev-bin==2.36-9+deb12u13 -libc-devtools==2.36-9+deb12u13 -libc-l10n==2.36-9+deb12u13 -libc6-dbg==2.36-9+deb12u13 -libc6-dev==2.36-9+deb12u13 -libc6-dev-i386==2.36-9+deb12u13 -libc6-dev-x32==2.36-9+deb12u13 -libc6-i386==2.36-9+deb12u13 -libc6-x32==2.36-9+deb12u13 +libc-dev-bin==2.36-9+deb12u14 +libc-devtools==2.36-9+deb12u14 +libc-l10n==2.36-9+deb12u14 +libc6-armhf-cross==2.36-8cross1 +libc6-dbg==2.36-9+deb12u14 +libc6-dev==2.36-9+deb12u14 +libc6-dev-i386==2.36-9+deb12u14 +libc6-dev-x32==2.36-9+deb12u14 +libc6-i386==2.36-9+deb12u14 +libc6-x32==2.36-9+deb12u14 libcaca0==0.99.beta20-3 libcacard0==1:2.8.0-3 libcaf-openmpi-3==2.10.1-1+b1 @@ -428,9 +444,9 @@ libcairo-script-interpreter2==1.16.0-7 libcairo2==1.16.0-7 libcairo2-dev==1.16.0-7 libcairomm-1.0-1v5==1.14.4-2 -libcap-dev==1:2.66-4+deb12u2 +libcap-dev==1:2.66-4+deb12u3+b1 libcap-ng-dev==0.8.3-1+b3 -libcap2-bin==1:2.66-4+deb12u2 +libcap2-bin==1:2.66-4+deb12u3+b1 libcapstone4==4.0.2-5 libcapture-tiny-perl==0.48-2 libcarp-clan-perl==6.08-2 @@ -476,8 +492,8 @@ libcommons-compress-java==1.22-1 libcommons-configuration-java==1.10-6 libcommons-digester-java==1.8.1-5 libcommons-io-java==2.11.0-2 -libcommons-lang-java==2.6-10 -libcommons-lang3-java==3.12.0-2 +libcommons-lang-java==2.6-10+deb12u1 +libcommons-lang3-java==3.12.0-2+deb12u1 libcommons-logging-java==1.2-3 libcommons-parent-java==56-1 libcommons-text-java==1.10.0-1 @@ -554,7 +570,7 @@ libdouble-conversion3==3.2.1-1 libdoxia-core-java==1.12.0-1 libdoxia-java==1.12.0-1 libdoxia-sitetools-java==1.11.1-1 -libdpkg-perl==1.21.22 +libdpkg-perl==1.21.23 libdrm-amdgpu1==2.4.114-1+b1 libdrm-common==2.4.114-1 libdrm-intel1==2.4.114-1+b1 @@ -660,14 +676,16 @@ libgbm1==22.3.6-1+deb12u1 libgc-dev==1:8.2.2-3 libgc1==1:8.2.2-3 libgcc-12-dev==12.2.0-14+deb12u1 +libgcc-12-dev-armhf-cross==12.2.0-14cross1 +libgcc-s1-armhf-cross==12.2.0-14cross1 libgd-perl==2.76-4+b1 libgd3==2.3.3-9 libgdbm-compat4==1.23-3 libgdbm6==1.23-3 -libgdk-pixbuf-2.0-0==2.42.10+dfsg-1+deb12u2 -libgdk-pixbuf-2.0-dev==2.42.10+dfsg-1+deb12u2 -libgdk-pixbuf2.0-bin==2.42.10+dfsg-1+deb12u2 -libgdk-pixbuf2.0-common==2.42.10+dfsg-1+deb12u2 +libgdk-pixbuf-2.0-0==2.42.10+dfsg-1+deb12u4 +libgdk-pixbuf-2.0-dev==2.42.10+dfsg-1+deb12u4 +libgdk-pixbuf2.0-bin==2.42.10+dfsg-1+deb12u4 +libgdk-pixbuf2.0-common==2.42.10+dfsg-1+deb12u4 libgeronimo-annotation-1.3-spec-java==1.3-1 libgeronimo-interceptor-3.0-spec-java==1.0.1-4 libgetopt-long-descriptive-perl==0.111-1 @@ -690,11 +708,11 @@ libglapi-mesa==22.3.6-1+deb12u1 libgles-dev==1.6.0-1 libgles1==1.6.0-1 libgles2==1.6.0-1 -libglib2.0-0==2.74.6-2+deb12u7 -libglib2.0-bin==2.74.6-2+deb12u7 -libglib2.0-data==2.74.6-2+deb12u7 -libglib2.0-dev==2.74.6-2+deb12u7 -libglib2.0-dev-bin==2.74.6-2+deb12u7 +libglib2.0-0==2.74.6-2+deb12u9 +libglib2.0-bin==2.74.6-2+deb12u9 +libglib2.0-data==2.74.6-2+deb12u9 +libglib2.0-dev==2.74.6-2+deb12u9 +libglib2.0-dev-bin==2.74.6-2+deb12u9 libglibmm-2.4-1v5==2.66.5-2 libglu1-mesa==9.0.2-1.1 libglu1-mesa-dev==9.0.2-1.1 @@ -709,8 +727,10 @@ libgme0==0.6.3-6 libgmock-dev==1.12.1-0.2 libgmp-dev==2:6.2.1+dfsg1-1.1 libgmpxx4ldbl==2:6.2.1+dfsg1-1.1 -libgnutls-dane0==3.7.9-2+deb12u5 +libgnutls-dane0==3.7.9-2+deb12u7 libgomp1==12.2.0-14+deb12u1 +libgomp1-armhf-cross==12.2.0-14cross1 +libgoogle-perftools-dev==2.10-1 libgoogle-perftools4==2.10-1 libgpgme11==1.18.0-3+b1 libgpm2==1.20.7-10+b1 @@ -729,9 +749,9 @@ libgslcblas0==2.7.1+dfsg-5+deb12u1 libgsm1==1.0.22-1 libgspell-1-2==1.12.0-1+b2 libgspell-1-common==1.12.0-1 -libgssapi-krb5-2==1.20.1-2+deb12u4 -libgssrpc4==1.20.1-2+deb12u4 -libgstreamer-plugins-base1.0-0==1.22.0-3+deb12u5 +libgssapi-krb5-2==1.20.1-2+deb12u5 +libgssrpc4==1.20.1-2+deb12u5 +libgstreamer-plugins-base1.0-0==1.22.0-3+deb12u6 libgstreamer1.0-0==1.22.0-2+deb12u1 libgtest-dev==1.12.1-0.2 libgtk-3-0==3.24.38-2~deb12u3 @@ -775,6 +795,7 @@ libhttp-tiny-multipart-perl==0.08-2 libhttpclient-java==4.5.14-1 libhttpcore-java==4.4.16-1 libhunspell-1.7-0==1.7.1-1 +libhwasan0==12.2.0-14+deb12u1 libhwloc-dev==2.9.0-1 libhwloc-plugins==2.9.0-1 libhwloc15==2.9.0-1 @@ -790,14 +811,14 @@ libidn12==1.41-1 libiec61883-0==1.2.0-6+b1 libigdgmm12==22.3.3+ds1-1 libijs-0.35==0.35-15 -libimage-magick-perl==8:6.9.11.60+dfsg-1.6+deb12u4 -libimage-magick-q16-perl==8:6.9.11.60+dfsg-1.6+deb12u4 +libimage-magick-perl==8:6.9.11.60+dfsg-1.6+deb12u10 +libimage-magick-q16-perl==8:6.9.11.60+dfsg-1.6+deb12u10 libimagequant0==2.17.0-1 libimath-3-1-29==3.1.6-1 libimport-into-perl==1.002005-2 libindirect-perl==0.39-2+b1 -libinput-bin==1.22.1-1 -libinput10==1.22.1-1 +libinput-bin==1.22.1-1+deb12u1 +libinput10==1.22.1-1+deb12u1 libio-html-perl==1.004-3 libio-interactive-perl==1.023-2 libio-prompter-perl==0.004015-2 @@ -867,20 +888,20 @@ libjudydebian1==1.0.5-5+b2 libjxl0.7==0.7.0-10+deb12u1 libjxr-tools==1.2~git20170615.f752187-5 libjxr0==1.2~git20170615.f752187-5 -libk5crypto3==1.20.1-2+deb12u4 -libkadm5clnt-mit12==1.20.1-2+deb12u4 -libkadm5srv-mit12==1.20.1-2+deb12u4 -libkdb5-10==1.20.1-2+deb12u4 +libk5crypto3==1.20.1-2+deb12u5 +libkadm5clnt-mit12==1.20.1-2+deb12u5 +libkadm5srv-mit12==1.20.1-2+deb12u5 +libkdb5-10==1.20.1-2+deb12u5 libkeyutils1==1.6.3-2 libkmod2==30+20221128-1 libkpathsea6==2022.20220321.62855-5.1+deb12u2 -libkrb5-3==1.20.1-2+deb12u4 -libkrb5-dev==1.20.1-2+deb12u4 -libkrb5support0==1.20.1-2+deb12u4 +libkrb5-3==1.20.1-2+deb12u5 +libkrb5-dev==1.20.1-2+deb12u5 +libkrb5support0==1.20.1-2+deb12u5 libksba8==1.6.3-2 liblab-gamut1==2.42.2-7+deb12u1 liblapack3==3.11.0-2 -liblcms2-2==2.14-2 +liblcms2-2==2.14-2+deb12u1 libldap-2.5-0==2.5.13+dfsg-5 libldap-common==2.5.13+dfsg-5 libldap-dev==2.5.13+dfsg-5 @@ -916,10 +937,10 @@ liblzo2-2==2.10-2 liblzo2-dev==2.10-2 libmagic-mgc==1:5.44-3 libmagic1==1:5.44-3 -libmagick++-6.q16-8==8:6.9.11.60+dfsg-1.6+deb12u4 -libmagickcore-6.q16-6==8:6.9.11.60+dfsg-1.6+deb12u4 -libmagickcore-6.q16-6-extra==8:6.9.11.60+dfsg-1.6+deb12u4 -libmagickwand-6.q16-6==8:6.9.11.60+dfsg-1.6+deb12u4 +libmagick++-6.q16-8==8:6.9.11.60+dfsg-1.6+deb12u10 +libmagickcore-6.q16-6==8:6.9.11.60+dfsg-1.6+deb12u10 +libmagickcore-6.q16-6-extra==8:6.9.11.60+dfsg-1.6+deb12u10 +libmagickwand-6.q16-6==8:6.9.11.60+dfsg-1.6+deb12u10 libmail-sendmail-perl==0.80-3 libmailtools-perl==2.21-2 libmariadb-dev==1:10.11.14-0+deb12u2 @@ -971,7 +992,7 @@ libmpg123-0==1.31.2-1+deb12u1 libmro-compat-perl==0.15-2 libmtdev1==1.1.6-1 libmujs2==1.3.2-1 -libmunge2==0.5.15-2 +libmunge2==0.5.15-2+deb12u1 libmysofa1==1.3.1~dfsg0-1 libnamespace-autoclean-perl==0.29-2 libnamespace-clean-perl==0.27-2 @@ -993,7 +1014,6 @@ libnetaddr-ip-perl==4.079+dfsg-2+b1 libnetfilter-conntrack-dev==1.0.9-3 libnetfilter-conntrack3==1.0.9-3 libnetpbm11==2:11.01.00-2 -libnetsnmptrapd40==5.9.3+dfsg-2 libnewt-dev==0.52.23-1+b1 libnewt0.52==0.52.23-1+b1 libnfnetlink-dev==1.0.2-2 @@ -1002,19 +1022,20 @@ libnfs13==4.0.0-1 libnftables1==1.0.6-2+deb12u2 libnftnl-dev==1.2.4-2 libnftnl11==1.2.4-2 -libnghttp2-14==1.52.0-1+deb12u2 +libnghttp2-14==1.52.0-1+deb12u3 libnl-3-200==3.7.0-0.2+b1 libnl-3-dev==3.7.0-0.2+b1 libnl-route-3-200==3.7.0-0.2+b1 libnl-route-3-dev==3.7.0-0.2+b1 +libnode108==18.20.4+dfsg-1~deb12u2 libnorm-dev==1.5.9+dfsg-2 libnorm1==1.5.9+dfsg-2 libnpth0==1.6-3 libnsl-dev==1.3.0-2 libnsl2==1.3.0-2 libnspr4==2:4.35-1 -libnss-systemd==252.39-1~deb12u1 -libnss3==2:3.87.1-1+deb12u1 +libnss-systemd==252.39-1~deb12u2 +libnss3==2:3.87.1-1+deb12u2 libnuma-dev==2.0.16-1 libnuma1==2.0.16-1 libnumber-compare-perl==0.03-3 @@ -1030,7 +1051,7 @@ libopencsd1==1.3.3-1 libopenexr-3-1-30==3.1.5-5 libopengl-dev==1.6.0-1 libopengl0==1.6.0-1 -libopenjp2-7==2.5.0-2+deb12u2 +libopenjp2-7==2.5.0-2+deb12u3 libopenmpi-dev==4.1.4-3+b1 libopenmpi3==4.1.4-3+b1 libopenmpt0==0.6.9-1 @@ -1046,11 +1067,11 @@ libostyle1c2==1.4devel1-22 libpackage-deprecationmanager-perl==0.18-1 libpackage-stash-perl==0.40-1 libpackage-stash-xs-perl==0.30-1+b1 -libpackagekit-glib2-18==1.2.6-5 +libpackagekit-glib2-18==1.2.6-5+deb12u1 libpadwalker-perl==2.5-1+b3 -libpam-cap==1:2.66-4+deb12u2 -libpam-systemd==252.39-1~deb12u1 -libpam0g-dev==1.5.2-6+deb12u1 +libpam-cap==1:2.66-4+deb12u3+b1 +libpam-systemd==252.39-1~deb12u2 +libpam0g-dev==1.5.2-6+deb12u2 libpango-1.0-0==1.50.12+ds-1 libpango1.0-dev==1.50.12+ds-1 libpangocairo-1.0-0==1.50.12+ds-1 @@ -1117,19 +1138,19 @@ libplexus-velocity-java==1.2-3.1 libpmem1==1.12.1-2 libpmix-dev==4.2.2-1+deb12u1 libpmix2==4.2.2-1+deb12u1 -libpng-dev==1.6.39-2+deb12u1 -libpng-tools==1.6.39-2+deb12u1 -libpng16-16==1.6.39-2+deb12u1 +libpng-dev==1.6.39-2+deb12u5 +libpng-tools==1.6.39-2+deb12u5 +libpng16-16==1.6.39-2+deb12u5 libpocketsphinx3==0.8+5prealpha+1-15 libpod-constants-perl==0.19-2 libpod-parser-perl==1.65-1 libpolkit-agent-1-0==122-3 libpolkit-gobject-1-0==122-3 -libpoppler-glib8==22.12.0-2+deb12u1 -libpoppler126==22.12.0-2+deb12u1 +libpoppler-glib8==22.12.0-2+deb12u2 +libpoppler126==22.12.0-2+deb12u2 libpopt-dev==1.19+dfsg-1 libpopt0==1.19+dfsg-1 -libpostproc56==7:5.1.8-0+deb12u1 +libpostproc56==7:5.1.9-0+deb12u1 libpotrace0==1.16-2 libproc-processtable-perl==0.634-1+b2 libproc2-0==2:4.0.2-3 @@ -1152,11 +1173,11 @@ libpython3-all-dev==3.11.2-1+b1 libpython3-dbg==3.11.2-1+b1 libpython3-dev==3.11.2-1+b1 libpython3-stdlib==3.11.2-1+b1 -libpython3.11==3.11.2-6+deb12u6 -libpython3.11-dbg==3.11.2-6+deb12u6 -libpython3.11-dev==3.11.2-6+deb12u6 -libpython3.11-minimal==3.11.2-6+deb12u6 -libpython3.11-stdlib==3.11.2-6+deb12u6 +libpython3.11==3.11.2-6+deb12u7 +libpython3.11-dbg==3.11.2-6+deb12u7 +libpython3.11-dev==3.11.2-6+deb12u7 +libpython3.11-minimal==3.11.2-6+deb12u7 +libpython3.11-stdlib==3.11.2-6+deb12u7 libqdox-java==1.12.1-3 libqdox2-java==2.0.3-1 libqhull-r8.0==2020.2-5 @@ -1181,11 +1202,11 @@ libqt5widgets5==5.15.8+dfsg-11+deb12u3 libqt5xml5==5.15.8+dfsg-11+deb12u3 libquadmath0==12.2.0-14+deb12u1 librabbitmq4==0.11.0-1+deb12u1 -librados2==16.2.15+ds-0+deb12u1 +librados2==16.2.15+ds-0+deb12u2 libraqm0==0.7.0-4.1 librav1e0==0.5.1-6 libraw1394-11==2.1.2-2 -librbd1==16.2.15+ds-0+deb12u1 +librbd1==16.2.15+ds-0+deb12u2 librdkafka++1==2.0.2-1 librdkafka-dev==2.0.2-1 librdkafka1==2.0.2-1 @@ -1254,14 +1275,10 @@ libsnappy-jni==1.1.8.3-1 libsnappy1v5==1.1.9-3 libsndfile1==1.2.0-1+deb12u1 libsndio7.0==1.9.0-0.3+b2 -libsnmp-base==5.9.3+dfsg-2 -libsnmp-dev==5.9.3+dfsg-2 -libsnmp-perl==5.9.3+dfsg-2 -libsnmp40==5.9.3+dfsg-2 libsoap-lite-perl==1.27-3 libsocket6-perl==0.29-3 -libsodium-dev==1.0.18-1 -libsodium23==1.0.18-1 +libsodium-dev==1.0.18-1+deb12u1 +libsodium23==1.0.18-1+deb12u1 libsord-0-0==0.16.14+git221008-1 libsort-versions-perl==1.62-3 libsoup2.4-1==2.74.3-1+deb12u1 @@ -1278,12 +1295,13 @@ libsqlite3-0==3.40.1-2+deb12u2 libsqlite3-dev==3.40.1-2+deb12u2 libsratom-0-0==0.6.14-1 libsrt1.5-gnutls==1.5.1-1+deb12u1 -libssh-4==0.10.6-0+deb12u1 -libssh-gcrypt-4==0.10.6-0+deb12u1 +libssh-4==0.10.6-0+deb12u2 +libssh-gcrypt-4==0.10.6-0+deb12u2 libssh2-1==1.10.0-3+b1 -libssl-dev==3.0.17-1~deb12u3 -libssl3==3.0.17-1~deb12u3 +libssl-dev==3.0.20-1~deb12u2 +libssl3==3.0.20-1~deb12u2 libstdc++-12-dev==12.2.0-14+deb12u1 +libstdc++6-armhf-cross==12.2.0-14cross1 libstemmer0d==2.2.0-2 libstrictures-perl==2.000006-1 libstring-copyright-perl==0.003014-1 @@ -1302,16 +1320,16 @@ libsubunit0==1.4.0-3 libsurefire-java==2.22.3-2 libsvtav1enc1==1.4.1+dfsg-1 libswitch-perl==2.17-3 -libswresample4==7:5.1.8-0+deb12u1 -libswscale6==7:5.1.8-0+deb12u1 +libswresample4==7:5.1.9-0+deb12u1 +libswscale6==7:5.1.9-0+deb12u1 libsynctex2==2022.20220321.62855-5.1+deb12u2 libsyntax-keyword-try-perl==0.28-1 libsys-cpuaffinity-perl==1.13~03-2+b1 libsys-hostname-long-perl==1.5-3 -libsystemd-dev==252.39-1~deb12u1 -libsystemd-shared==252.39-1~deb12u1 -libtag1v5==1.13-2 -libtag1v5-vanilla==1.13-2 +libsystemd-dev==252.39-1~deb12u2 +libsystemd-shared==252.39-1~deb12u2 +libtag1v5==1.13-2+deb12u1 +libtag1v5-vanilla==1.13-2+deb12u1 libtask-weaken-perl==1.06-2 libtcl8.6==8.6.13+dfsg-2 libtcmalloc-minimal4==2.10-1 @@ -1337,9 +1355,9 @@ libtheora0==1.1.1+dfsg.1-16.1+deb12u1 libthrift-0.17.0==0.17.0-2+b2 libthrift-dev==0.17.0-2+b2 libtie-ixhash-perl==1.23-4 -libtiff-dev==4.5.0-6+deb12u3 -libtiff6==4.5.0-6+deb12u3 -libtiffxx6==4.5.0-6+deb12u3 +libtiff-dev==4.5.0-6+deb12u4 +libtiff6==4.5.0-6+deb12u4 +libtiffxx6==4.5.0-6+deb12u4 libtime-duration-perl==1.21-2 libtime-moment-perl==0.44-2+b1 libtimedate-perl==2.3300-2 @@ -1362,11 +1380,12 @@ libtype-tiny-perl==2.002001-1 libtype-tiny-xs-perl==0.025-1 libtypes-serialiser-perl==1.01-1 libubsan1==12.2.0-14+deb12u1 +libubsan1-armhf-cross==12.2.0-14cross1 libuchardet0==0.0.7-1 libucx0==1.13.1-1 -libudev-dev==252.39-1~deb12u1 +libudev-dev==252.39-1~deb12u2 libudfread0==1.1.2-1 -libunbound8==1.17.1-2+deb12u3 +libunbound8==1.17.1-2+deb12u4 libunicode-map-perl==0.112-13+b1 libunicode-utf8-perl==0.62-2 libunivocity-parsers-java==2.9.1-1 @@ -1401,7 +1420,7 @@ libvisual-0.4-0==0.4.0-19 libvorbis0a==1.3.7-1 libvorbisenc2==1.3.7-1 libvorbisfile3==1.3.7-1 -libvpx7==1.12.0-1+deb12u4 +libvpx7==1.12.0-1+deb12u5 libvte-2.91-0==0.70.6-2~deb12u1 libvte-2.91-common==0.70.6-2~deb12u1 libvulkan-dev==1.3.239.0-1 @@ -1507,16 +1526,16 @@ libxml-commons-external-java==1.4.01-5 libxml-commons-resolver1.1-java==1.2-11 libxml-libxml-perl==2.0207+dfsg+really+2.0134-1+b1 libxml-namespacesupport-perl==1.12-2 -libxml-parser-perl==2.46-4 +libxml-parser-perl==2.46-4+deb12u1 libxml-sax-base-perl==1.09-3 libxml-sax-expat-perl==0.51-2 libxml-sax-perl==1.02+dfsg-3 libxml-simple-perl==2.25-2 libxml-twig-perl==1:3.52-2 libxml-xpathengine-perl==0.14-2 -libxml2==2.9.14+dfsg-1.3~deb12u4 -libxml2-dev==2.9.14+dfsg-1.3~deb12u4 -libxml2-utils==2.9.14+dfsg-1.3~deb12u4 +libxml2==2.9.14+dfsg-1.3~deb12u5 +libxml2-dev==2.9.14+dfsg-1.3~deb12u5 +libxml2-utils==2.9.14+dfsg-1.3~deb12u5 libxmlb2==0.3.10-2 libxmlgraphics-commons-java==2.8-2 libxmlrpc-lite-perl==0.717-5 @@ -1531,7 +1550,8 @@ libxrender1==1:0.9.10-1.1 libxs-parse-keyword-perl==0.33-1 libxs-parse-sublike-perl==0.16-1+b2 libxshmfence1==1.3-1 -libxslt1.1==1.1.35-1+deb12u3 +libxslt1-dev==1.1.35-1+deb12u4 +libxslt1.1==1.1.35-1+deb12u4 libxss1==1:1.2.3-1 libxstring-perl==0.005-2+b1 libxt-dev==1:1.2.1-1.1 @@ -1561,17 +1581,19 @@ libzip4==1.7.3-1+b1 libzmq3-dev==4.3.4-6 libzmq5==4.3.4-6 libzstd-dev==1.5.4+dfsg2-5 -libzvbi-common==0.2.41-1 -libzvbi0==0.2.41-1 +libzvbi-common==0.2.41-1+deb12u1 +libzvbi0==0.2.41-1+deb12u1 libzzip-0-13==0.13.72+dfsg.1-1.1 licensecheck==3.3.5-1 lintian==2.116.3+deb12u1 -linux-compiler-gcc-12-x86==6.1.158-1 -linux-headers-6.1.0-41-amd64==6.1.158-1 -linux-headers-6.1.0-41-common==6.1.158-1 -linux-headers-amd64==6.1.158-1 -linux-kbuild-6.1==6.1.158-1 -linux-libc-dev==6.1.158-1 +linux-compiler-gcc-12-x86==6.1.174-1 +linux-headers-6.1.0-49-amd64==6.1.174-1 +linux-headers-6.1.0-49-arm64==6.1.174-1 +linux-headers-6.1.0-49-common==6.1.174-1 +linux-headers-amd64==6.1.174-1 +linux-headers-arm64==6.1.174-1 +linux-kbuild-6.1==6.1.174-1 +linux-libc-dev==6.1.174-1 linuxdoc-tools==0.9.82-1 llvm==1:14.0-55.7~deb12u1 llvm-14==1:14.0.6-12 @@ -1581,7 +1603,7 @@ llvm-14-runtime==1:14.0.6-12 llvm-14-tools==1:14.0.6-12 llvm-runtime==1:14.0-55.7~deb12u1 lmodern==2.005-1 -locales==2.36-9+deb12u13 +locales==2.36-9+deb12u14 logrotate==3.21.0-1 lsb-release==12.0-1 lsof==4.95.0-1 @@ -1611,9 +1633,10 @@ mesa-vulkan-drivers==22.3.6-1+deb12u1 meson==1.0.1-5 mime-support==3.66 module-assistant==0.11.11 +mokutil==0.6.0-2 mpi-default-bin==1.14 mpi-default-dev==1.14 -mupdf-tools==1.21.1+ds2-1+b4 +mupdf-tools==1.21.1+ds2-1+deb12u1 mysql-common==5.8+1.1.0 ncurses-term==6.4-4 net-tools==2.10-0.1+deb12u2 @@ -1622,24 +1645,32 @@ netpbm==2:11.01.00-2 nftables==1.0.6-2+deb12u2 ninja-build==1.11.1-2~deb12u1 nlohmann-json3-dev==3.11.2-2 +node-acorn==8.8.1+ds+~cs25.17.7-2 +node-busboy==1.6.0+~cs2.6.0-2 +node-cjs-module-lexer==1.2.2+dfsg-5 node-jquery==3.6.1+dfsg+~3.5.14-1 +node-undici==5.15.0+dfsg1+~cs20.10.9.3-1+deb12u4 +node-xtend==4.0.2-3 +nodejs==18.20.4+dfsg-1~deb12u2 +nodejs-doc==18.20.4+dfsg-1~deb12u2 nss-plugin-pem==1.0.8+1-1 ocl-icd-libopencl1==2.3.1-1 openjade==1.4devel1-22 -openjdk-17-jdk==17.0.17+10-1~deb12u1 -openjdk-17-jdk-headless==17.0.17+10-1~deb12u1 -openjdk-17-jre==17.0.17+10-1~deb12u1 -openjdk-17-jre-headless==17.0.17+10-1~deb12u1 +openjdk-17-jdk==17.0.19+10-1~deb12u2 +openjdk-17-jdk-headless==17.0.19+10-1~deb12u2 +openjdk-17-jre==17.0.19+10-1~deb12u2 +openjdk-17-jre-headless==17.0.19+10-1~deb12u2 openmpi-bin==4.1.4-3+b1 openmpi-common==4.1.4-3 opensp==1.5.2-13+b2 -openssh-client==1:9.2p1-2+deb12u7 -openssh-server==1:9.2p1-2+deb12u7 -openssh-sftp-server==1:9.2p1-2+deb12u7 -openssl==3.0.17-1~deb12u3 +openssh-client==1:9.2p1-2+deb12u10 +openssh-server==1:9.2p1-2+deb12u10 +openssh-sftp-server==1:9.2p1-2+deb12u10 +openssl==3.0.20-1~deb12u2 +os-prober==1.81 ovmf==2022.11-6+deb12u2 -packagekit==1.2.6-5 -packagekit-tools==1.2.6-5 +packagekit==1.2.6-5+deb12u1 +packagekit-tools==1.2.6-5+deb12u1 pahole==1.24-4.1 pandoc==2.17.1.1-2~deb12u1 pandoc-data==2.17.1.1-2~deb12u1 @@ -1669,12 +1700,12 @@ php-text-template==2.0.4-2 php-timer==5.0.3-3 php-tokenizer==1.2.1-1 php-xml==2:8.2+93 -php8.2-cli==8.2.29-1~deb12u1 -php8.2-common==8.2.29-1~deb12u1 -php8.2-mbstring==8.2.29-1~deb12u1 -php8.2-opcache==8.2.29-1~deb12u1 -php8.2-readline==8.2.29-1~deb12u1 -php8.2-xml==8.2.29-1~deb12u1 +php8.2-cli==8.2.31-1~deb12u1 +php8.2-common==8.2.31-1~deb12u1 +php8.2-mbstring==8.2.31-1~deb12u1 +php8.2-opcache==8.2.31-1~deb12u1 +php8.2-readline==8.2.31-1~deb12u1 +php8.2-xml==8.2.31-1~deb12u1 phpunit==9.6.7-1 phpunit-cli-parser==1.0.1-3 phpunit-code-unit==1.0.8-3 @@ -1761,7 +1792,7 @@ python3-distro==1.8.0-1 python3-distutils==3.11.2-3 python3-docutils==0.19+dfsg-6 python3-executing==1.2.0-2 -python3-fonttools==4.38.0-1+b1 +python3-fonttools==4.38.0-1+deb12u1 python3-fs==2.4.16-2 python3-gi==3.42.2-3+b1 python3-gpg==1.18.0-3+b1 @@ -1779,7 +1810,7 @@ python3-ipython==8.5.0-4 python3-isort==5.6.4-1 python3-jedi==0.18.2-1 python3-jinja2==3.1.2-1+deb12u3 -python3-jwt==2.6.0-1 +python3-jwt==2.6.0-1+deb12u1 python3-kiwisolver==1.4.4-1+b1 python3-lazr.restfulclient==0.14.5-1 python3-lazr.uri==1.0.6-3 @@ -1826,7 +1857,7 @@ python3-psutil==5.9.4-1+b1 python3-ptyprocess==0.7.0-5 python3-pure-eval==0.2.2-1 python3-py==1.11.0-1 -python3-pyasn1==0.4.8-3 +python3-pyasn1==0.4.8-3+deb12u2 python3-pyasn1-modules==0.2.8-1 python3-pycparser==2.21-1 python3-pyelftools==0.29-1 @@ -1862,7 +1893,7 @@ python3-typing-extensions==4.4.0-1 python3-tz==2022.7.1-4 python3-ufolib2==0.14.0+dfsg1-1 python3-unidiff==0.7.3-1 -python3-urllib3==1.26.12-1+deb12u1 +python3-urllib3==1.26.12-1+deb12u3 python3-venv==3.11.2-1+b1 python3-wadllib==1.3.6-4 python3-wcwidth==0.2.5+dfsg1-1.1 @@ -1873,17 +1904,17 @@ python3-xdg==0.28-2 python3-yaml==6.0-3+b2 python3-zipp==1.0.0-6+deb12u1 python3-zope.interface==5.5.2-1+b1 -python3.11==3.11.2-6+deb12u6 -python3.11-dbg==3.11.2-6+deb12u6 -python3.11-dev==3.11.2-6+deb12u6 -python3.11-minimal==3.11.2-6+deb12u6 -python3.11-venv==3.11.2-6+deb12u6 -qemu-block-extra==1:7.2+dfsg-7+deb12u16 -qemu-system-common==1:7.2+dfsg-7+deb12u16 -qemu-system-data==1:7.2+dfsg-7+deb12u16 -qemu-system-gui==1:7.2+dfsg-7+deb12u16 -qemu-system-x86==1:7.2+dfsg-7+deb12u16 -qemu-utils==1:7.2+dfsg-7+deb12u16 +python3.11==3.11.2-6+deb12u7 +python3.11-dbg==3.11.2-6+deb12u7 +python3.11-dev==3.11.2-6+deb12u7 +python3.11-minimal==3.11.2-6+deb12u7 +python3.11-venv==3.11.2-6+deb12u7 +qemu-block-extra==1:7.2+dfsg-7+deb12u18+b2 +qemu-system-common==1:7.2+dfsg-7+deb12u18+b2 +qemu-system-data==1:7.2+dfsg-7+deb12u18 +qemu-system-gui==1:7.2+dfsg-7+deb12u18+b2 +qemu-system-x86==1:7.2+dfsg-7+deb12u18+b2 +qemu-utils==1:7.2+dfsg-7+deb12u18+b2 qt5-gtk-platformtheme==5.15.8+dfsg-11+deb12u3 qt5-qmake==5.15.8+dfsg-11+deb12u3 qt5-qmake-bin==5.15.8+dfsg-11+deb12u3 @@ -1900,7 +1931,7 @@ rpcsvc-proto==1.4.3-1 rpm-common==4.18.0+dfsg-1+deb12u1 rpm2cpio==4.18.0+dfsg-1+deb12u1 rrdtool==1.7.2-4+b8 -rsync==3.2.7-1+deb12u2 +rsync==3.2.7-1+deb12u5 rsyslog==8.2302.0-1+deb12u1 ruby==1:3.1 ruby-all-dev==1:3.1 @@ -1925,26 +1956,29 @@ sgmlspl==1.03ii-38 shared-mime-info==2.2-1 sharutils==1:4.15.2-9 shellcheck==0.9.0-1 -slirp4netns==1.2.0-1 +shim-helpers-arm64-signed==1+15.8+1~deb12u1 +shim-signed==1.44~1+deb12u1+15.8-1~deb12u1 +shim-signed-common==1.44~1+deb12u1+15.8-1~deb12u1 +shim-unsigned==15.8-1~deb12u1 software-properties-common==0.99.30-4.1~deb12u1 sphinx-common==5.3.0-4 sphinx-rtd-theme-common==1.2.0+dfsg-1 squashfs-tools==1:4.5.1-1 stgit==0.19-1.1 strace==6.1-0.1 -sudo==1.9.13p3-1+deb12u2 +sudo==1.9.13p3-1+deb12u4 swig==4.1.0-0.2 swig4.0==4.1.0-0.2 -systemd==252.39-1~deb12u1 -systemd-sysv==252.39-1~deb12u1 -systemd-timesyncd==252.39-1~deb12u1 +systemd==252.39-1~deb12u2 +systemd-sysv==252.39-1~deb12u2 +systemd-timesyncd==252.39-1~deb12u2 t1utils==1.41-4 tcl==8.6.13 tcl-expect==5.45.4-2+b1 tcl8.6==8.6.13+dfsg-2 tcpdump==4.99.3-1 teckit==2.5.11+ds1-1+b1 -telnet==0.17+2.4-2+deb12u1 +telnet==0.17+2.4-2+deb12u3 tex-common==6.18 tex-gyre==20180621-6 texi2html==1.82+dfsg1-7 @@ -1966,7 +2000,7 @@ tk==8.6.13 tk8.6==8.6.13-2 tk8.6-blt2.5==2.5.3+dfsg-4.1 ucf==3.0043+nmu1+deb12u1 -udev==252.39-1~deb12u1 +udev==252.39-1~deb12u2 unicode-data==15.0.0-1 unzip==6.0-28 usb.ids==2025.07.26-0+deb12u1 @@ -1999,7 +2033,7 @@ xkb-data==2.35.1-1 xml-core==0.18+nmu1 xmlstarlet==1.6.1-3 xorg-sgml-doctools==1:1.11-1.1 -xsltproc==1.1.35-1+deb12u3 +xsltproc==1.1.35-1+deb12u4 xtrans-dev==1.4.0-1 xxd==2:9.0.1378-2+deb12u2 xz-utils==5.4.1-1 diff --git a/files/build/versions-public/dockers/sonic-slave-bookworm/versions-deb-bookworm-arm64 b/files/build/versions-public/dockers/sonic-slave-bookworm/versions-deb-bookworm-arm64 index ea9703679df..f37240eefec 100644 --- a/files/build/versions-public/dockers/sonic-slave-bookworm/versions-deb-bookworm-arm64 +++ b/files/build/versions-public/dockers/sonic-slave-bookworm/versions-deb-bookworm-arm64 @@ -1,44 +1,6 @@ bc==1.07.1-3 -binutils-aarch64-linux-gnu==2.40-2 -binutils-arm-linux-gnueabihf==2.40-2 -cpp-12-arm-linux-gnueabihf==12.2.0-14cross1 -cpp-arm-linux-gnueabihf==4:12.2.0-3 dctrl-tools==2.24-3 dvipng==1.15-1.1 -gcc-12-arm-linux-gnueabihf==12.2.0-14cross1 -gcc-12-arm-linux-gnueabihf-base==12.2.0-14cross1 -gcc-12-cross-base==12.2.0-14cross1 -gcc-arm-linux-gnueabihf==4:12.2.0-3 -grub-common==2.06-13+deb12u1 -grub-efi-arm64-bin==2.06-13+deb12u1 -grub-efi-arm64-signed==1+2.06+13+deb12u1 -grub2-common==2.06-13+deb12u1 -libasan8-armhf-cross==12.2.0-14cross1 -libatomic1-armhf-cross==12.2.0-14cross1 -libc6-armhf-cross==2.36-8cross1 -libgcc-12-dev-armhf-cross==12.2.0-14cross1 -libgcc-s1-armhf-cross==12.2.0-14cross1 -libgomp1-armhf-cross==12.2.0-14cross1 -libhwasan0==12.2.0-14+deb12u1 libnanomsg-dev==1.1.5+dfsg-1.1 libnanomsg5==1.1.5+dfsg-1.1 -libnode108==18.20.4+dfsg-1~deb12u1 -libstdc++6-armhf-cross==12.2.0-14cross1 -libubsan1-armhf-cross==12.2.0-14cross1 -libxslt1-dev==1.1.35-1+deb12u3 -linux-headers-6.1.0-41-arm64==6.1.158-1 -linux-headers-arm64==6.1.158-1 -mokutil==0.6.0-2 -node-acorn==8.8.1+ds+~cs25.17.7-2 -node-busboy==1.6.0+~cs2.6.0-2 -node-cjs-module-lexer==1.2.2+dfsg-5 -node-undici==5.15.0+dfsg1+~cs20.10.9.3-1+deb12u4 -node-xtend==4.0.2-3 -nodejs==18.20.4+dfsg-1~deb12u1 -nodejs-doc==18.20.4+dfsg-1~deb12u1 -os-prober==1.81 -shim-helpers-arm64-signed==1+15.8+1~deb12u1 -shim-signed==1.44~1+deb12u1+15.8-1~deb12u1 -shim-signed-common==1.44~1+deb12u1+15.8-1~deb12u1 -shim-unsigned==15.8-1~deb12u1 watchdog==5.16-1+b1 diff --git a/files/build/versions-public/dockers/sonic-slave-bookworm/versions-deb-bookworm-armhf b/files/build/versions-public/dockers/sonic-slave-bookworm/versions-deb-bookworm-armhf index 6625df7fc68..4da0c079543 100644 --- a/files/build/versions-public/dockers/sonic-slave-bookworm/versions-deb-bookworm-armhf +++ b/files/build/versions-public/dockers/sonic-slave-bookworm/versions-deb-bookworm-armhf @@ -1,19 +1,9 @@ bc==1.07.1-3 -binutils-arm-linux-gnueabihf==2.40-2 dctrl-tools==2.24-3 dvipng==1.15-1.1 libnanomsg-dev==1.1.5+dfsg-1.1 libnanomsg5==1.1.5+dfsg-1.1 -libnode108==18.20.4+dfsg-1~deb12u1 -libxslt1-dev==1.1.35-1+deb12u3 -linux-compiler-gcc-12-arm==6.1.158-1 -linux-headers-6.1.0-41-armmp==6.1.158-1 -linux-headers-armmp==6.1.158-1 -node-acorn==8.8.1+ds+~cs25.17.7-2 -node-busboy==1.6.0+~cs2.6.0-2 -node-cjs-module-lexer==1.2.2+dfsg-5 -node-undici==5.15.0+dfsg1+~cs20.10.9.3-1+deb12u4 -node-xtend==4.0.2-3 -nodejs==18.20.4+dfsg-1~deb12u1 -nodejs-doc==18.20.4+dfsg-1~deb12u1 +linux-compiler-gcc-12-arm==6.1.174-1 +linux-headers-6.1.0-49-armmp==6.1.174-1 +linux-headers-armmp==6.1.174-1 watchdog==5.16-1+b1 diff --git a/files/build/versions-public/dockers/sonic-slave-bookworm/versions-mirror b/files/build/versions-public/dockers/sonic-slave-bookworm/versions-mirror deleted file mode 100644 index 289b806a78b..00000000000 --- a/files/build/versions-public/dockers/sonic-slave-bookworm/versions-mirror +++ /dev/null @@ -1 +0,0 @@ -download.docker.com_linux_debian_dists_bookworm==2025-12-09T10:53:47Z diff --git a/files/build/versions-public/dockers/sonic-slave-bookworm/versions-py3 b/files/build/versions-public/dockers/sonic-slave-bookworm/versions-py3 index d9e7b684605..42322f00c75 100644 --- a/files/build/versions-public/dockers/sonic-slave-bookworm/versions-py3 +++ b/files/build/versions-public/dockers/sonic-slave-bookworm/versions-py3 @@ -9,7 +9,7 @@ babel==2.10.3 backcall==0.2.0 bcrypt==3.2.2 beautifulsoup4==4.11.2 -bitarray==3.8.0 +bitarray==3.8.2 blinker==1.5 blkinfo==0.2.0 brotli==1.0.9 @@ -41,7 +41,7 @@ executing==1.2.0 fastentrypoints==0.12 fonttools==4.38.0 fs==2.4.16 -fsspec==2025.12.0 +fsspec==2026.6.0 gbp==0.9.30 gcovr==5.2 gpg==1.18.0 @@ -94,7 +94,7 @@ parso==0.8.3 pep517==0.13.0 pexpect==4.8.0 pickleshare==0.7.5 -pillow==10.0.0 +pillow==10.0.1 pip==24.2 platformdirs==2.6.0 pluggy==1.0.0+repack @@ -111,7 +111,7 @@ pyasn1==0.4.8 pyasn1-modules==0.2.8 pycparser==2.21 pyelftools==0.29 -pyfakefs==5.10.2 +pyfakefs==6.2.0 pygments==2.14.0 pygobject==3.42.2 pyhamcrest==2.0.3 @@ -132,8 +132,8 @@ pytz==2022.7.1 pyxdg==0.28 pyyaml==6.0 pyyaml-include==2.2 -redis==7.1.0 -regex==2025.11.3 +redis==8.0.0 +regex==2026.5.9 requests==2.28.1 roman==3.3 scapy==2.5.0 diff --git a/files/build/versions-public/dockers/sonic-slave-bookworm/versions-py3-all-arm64 b/files/build/versions-public/dockers/sonic-slave-bookworm/versions-py3-all-arm64 index 7a8ed78512f..e04f04786af 100644 --- a/files/build/versions-public/dockers/sonic-slave-bookworm/versions-py3-all-arm64 +++ b/files/build/versions-public/dockers/sonic-slave-bookworm/versions-py3-all-arm64 @@ -1,2 +1,3 @@ -protobuf==4.25.8 -psutil==7.1.3 +pexpect==4.9.0 +protobuf==4.25.9 +psutil==7.2.2 diff --git a/files/build/versions-public/dockers/sonic-slave-bookworm/versions-py3-all-armhf b/files/build/versions-public/dockers/sonic-slave-bookworm/versions-py3-all-armhf index 7a8ed78512f..e04f04786af 100644 --- a/files/build/versions-public/dockers/sonic-slave-bookworm/versions-py3-all-armhf +++ b/files/build/versions-public/dockers/sonic-slave-bookworm/versions-py3-all-armhf @@ -1,2 +1,3 @@ -protobuf==4.25.8 -psutil==7.1.3 +pexpect==4.9.0 +protobuf==4.25.9 +psutil==7.2.2 diff --git a/files/build/versions-public/dockers/sonic-slave-trixie/versions-deb-trixie b/files/build/versions-public/dockers/sonic-slave-trixie/versions-deb-trixie index 028581cab2c..6815197accb 100644 --- a/files/build/versions-public/dockers/sonic-slave-trixie/versions-deb-trixie +++ b/files/build/versions-public/dockers/sonic-slave-trixie/versions-deb-trixie @@ -6,7 +6,6 @@ ant==1.10.15-1 ant-optional==1.10.15-1 apparmor==4.1.0-1 appstream==1.0.5-1 -apt==3.0.3 apt-file==3.3 apt-transport-https==3.0.3 apt-utils==3.0.3 @@ -14,11 +13,11 @@ arch-test==0.22-1 asciidoctor==2.0.23-1 aspell==0.60.8.1-4 aspell-en==2020.12.07-0-1 -at-spi2-common==2.56.2-1 -at-spi2-core==2.56.2-1 +at-spi2-common==2.56.2-1+deb13u1 +at-spi2-core==2.56.2-1+deb13u1 auditd==1:4.0.2-2+b2 -augeas-lenses==1.14.1-1 -augeas-tools==1.14.1-1+b3 +augeas-lenses==1.14.1-1.1~deb13u1 +augeas-tools==1.14.1-1.1~deb13u1 autoconf==2.72-3.1 autoconf-archive==20220903-3 autogen==1:5.18.16-7 @@ -28,24 +27,28 @@ autopoint==0.23.1-2 autotools-dev==20240727.1 bash-completion==1:2.16.0-7 bc==1.07.1-4 -bind9-dnsutils==1:9.20.15-1~deb13u1 -bind9-host==1:9.20.15-1~deb13u1 -bind9-libs==1:9.20.15-1~deb13u1 +bind9-dnsutils==1:9.20.23-1~deb13u1 +bind9-host==1:9.20.23-1~deb13u1 +bind9-libs==1:9.20.23-1~deb13u1 binfmt-support==2.2.2-7 binutils==2.44-3 +binutils-aarch64-linux-gnu==2.44-3 +binutils-arm-linux-gnueabihf==2.44-3 binutils-common==2.44-3 +binutils-gold==2.44-2 +binutils-gold-aarch64-linux-gnu==2.44-2 binutils-x86-64-linux-gnu==2.44-3 bison==2:3.8.2+dfsg-1+b2 blt==2.5.3+dfsg-8 bsd-mailx==8.1.2-0.20220412cvs-1.1 bsdextrautils==2.41-5 -bsdutils==1:2.41-5 build-essential==12.12 byacc==1:2.0.20241231-1 bzip2==1.0.8-6 bzip2-doc==1.0.8-6 ca-certificates==20250419 ca-certificates-java==20240118 +ccache==4.11.2-2 cdbs==0.4.173 check==0.15.2-3 chrpath==0.18-1 @@ -56,20 +59,24 @@ cm-super-minimal==0.3.4-17 cmake==3.31.6-2 cmake-data==3.31.6-2 cmocka-doc==1.1.7-3 -comerr-dev==2.1-1.47.2-3+b3 -containerd.io==1.6.21-1 +comerr-dev==2.1-1.47.2-3+b11 +containerd.io==1.7.28-2~debian.13~trixie cowbuilder==0.90 cowdancer==0.90 cpio==2.15+dfsg-2 cpp==4:14.2.0-1 cpp-14==14.2.0-19 +cpp-14-aarch64-linux-gnu==14.2.0-19 +cpp-14-arm-linux-gnueabihf==14.2.0-19cross1 cpp-14-x86-64-linux-gnu==14.2.0-19 +cpp-aarch64-linux-gnu==4:14.2.0-1 +cpp-arm-linux-gnueabihf==4:14.2.0-1 cpp-x86-64-linux-gnu==4:14.2.0-1 cppcheck==2.17.1-2 cppzmq-dev==4.10.0-1+b2 cron==3.0pl1-197 cron-daemon-common==3.0pl1-197 -curl==8.14.1-2+deb13u2 +curl==8.14.1-2+deb13u3 cython3==3.0.11+dfsg-2+b1 dbus==1.16.2-2 dbus-bin==1.16.2-2 @@ -96,14 +103,15 @@ dh-autoreconf==20 dh-dkms==3.2.2-1~deb13u1 dh-exec==0.30 dh-make==2.202503 +dh-package-notes==0.15 dh-python==6.20250414 dh-runit==2.16.4 dh-strip-nondeterminism==1.14.1-2 dictionaries-common==1.30.10 diffstat==1.67-1 -dirmngr==2.4.7-21+b3 +dirmngr==2.4.7-21+deb13u1+b3 distro-info==1.13 -distro-info-data==0.66+deb13u1 +distro-info-data==0.66+deb13u2 dkms==3.2.2-1~deb13u1 dmidecode==3.6-2 dmsetup==2:1.02.205-2 @@ -112,21 +120,20 @@ docbook-dsssl==1.79-10 docbook-to-man==1:2.0.0-48 docbook-utils==0.6.14-4 docbook-xml==4.5-13 -docker-buildx-plugin==0.10.5-1~debian.12~bookworm -docker-ce==5:24.0.2-1~debian.12~bookworm -docker-ce-cli==5:24.0.2-1~debian.12~bookworm -docker-ce-rootless-extras==5:29.1.2-1~debian.12~bookworm -docker-compose-plugin==2.18.1-1~debian.12~bookworm +docker-buildx-plugin==0.26.1-1~debian.13~trixie +docker-ce==5:28.5.2-1~debian.13~trixie +docker-ce-cli==5:28.5.2-1~debian.13~trixie +docker-ce-rootless-extras==5:29.6.0-1~debian.13~trixie +docker-compose-plugin==2.39.1-1~debian.13~trixie docutils-common==0.21.2+dfsg-2 dosfstools==4.2-1.2 doxygen==1.9.8+ds-2.1 -dpkg==1.22.21 -dpkg-dev==1.22.21 +dpkg-dev==1.22.22 dput==1.2.4 dvipng==1.18-1 dvisvgm==3.4.4+ds-1 dwz==0.15-1+b1 -e2fsprogs==1.47.2-3+b3 +e2fsprogs==1.47.2-3+b11 e2fsprogs-l10n==1.47.2-3 eatmydata==131-2 ed==1.21.1-1 @@ -134,9 +141,9 @@ efibootmgr==18-2 emacsen-common==3.0.8 enchant-2==2.8.2+dfsg1-3 equivs==2.3.2 -exim4-base==4.98.2-1 -exim4-config==4.98.2-1 -exim4-daemon-light==4.98.2-1 +exim4-base==4.98.2-1+deb13u3 +exim4-config==4.98.2-1+deb13u3 +exim4-daemon-light==4.98.2-1+deb13u3 expat==2.7.1-2 fakeroot==1.37.1.1-1 fastjar==2:0.98-7 @@ -162,17 +169,26 @@ fonts-tuffy==20120614-3 fonts-urw-base35==20200910-8 g++==4:14.2.0-1 g++-14==14.2.0-19 +g++-14-aarch64-linux-gnu==14.2.0-19 g++-14-x86-64-linux-gnu==14.2.0-19 +g++-aarch64-linux-gnu==4:14.2.0-1 g++-x86-64-linux-gnu==4:14.2.0-1 gawk==1:5.2.1-2+b1 gcc==4:14.2.0-1 gcc-14==14.2.0-19 +gcc-14-aarch64-linux-gnu==14.2.0-19 +gcc-14-arm-linux-gnueabihf==14.2.0-19cross1 +gcc-14-arm-linux-gnueabihf-base==14.2.0-19cross1 +gcc-14-cross-base==14.2.0-19cross1 gcc-14-multilib==14.2.0-19 gcc-14-x86-64-linux-gnu==14.2.0-19 +gcc-aarch64-linux-gnu==4:14.2.0-1 +gcc-arm-linux-gnueabihf==4:14.2.0-1 gcc-multilib==4:14.2.0-1 gcc-x86-64-linux-gnu==4:14.2.0-1 gcovr==7.2+really-1.1 gdb==16.3-1 +gdisk==1.0.10-2 gem2deb==2.2.5 gem2deb-test-runner==2.2.5 gettext==0.23.1-2 @@ -182,56 +198,61 @@ gfortran-14==14.2.0-19 gfortran-14-x86-64-linux-gnu==14.2.0-19 gfortran-x86-64-linux-gnu==4:14.2.0-1 ghostscript==10.05.1~dfsg-1+deb13u1 -gir1.2-atk-1.0==2.56.2-1 -gir1.2-atspi-2.0==2.56.2-1 +gir1.2-atk-1.0==2.56.2-1+deb13u1 +gir1.2-atspi-2.0==2.56.2-1+deb13u1 gir1.2-cloudproviders-0.3.0==0.3.6-2 gir1.2-freedesktop==1.84.0-1 gir1.2-freedesktop-dev==1.84.0-1 -gir1.2-gdkpixbuf-2.0==2.42.12+dfsg-4 +gir1.2-gdkpixbuf-2.0==2.42.12+dfsg-4+deb13u1 gir1.2-girepository-2.0==1.84.0-1 gir1.2-girepository-2.0-dev==1.84.0-1 -gir1.2-glib-2.0==2.84.4-3~deb13u1 -gir1.2-glib-2.0-dev==2.84.4-3~deb13u1 +gir1.2-glib-2.0==2.84.4-3~deb13u3 +gir1.2-glib-2.0-dev==2.84.4-3~deb13u3 gir1.2-gtk-3.0==3.24.49-3 -gir1.2-harfbuzz-0.0==10.2.0-1+b1 +gir1.2-harfbuzz-0.0==10.2.0-1+deb13u1 gir1.2-ibus-1.0==1.5.32-2 gir1.2-pango-1.0==1.56.3-1 -girepository-tools==2.84.4-3~deb13u1 +girepository-tools==2.84.4-3~deb13u3 git==1:2.47.3-0+deb13u1 git-buildpackage==0.9.38 git-man==1:2.47.3-0+deb13u1 glib-networking==2.80.1-1 glib-networking-common==2.80.1-1 glib-networking-services==2.80.1-1 -gnupg==2.4.7-21 -gnupg-l10n==2.4.7-21 -gnupg-utils==2.4.7-21+b3 -gnupg2==2.4.7-21 +gnupg==2.4.7-21+deb13u1 +gnupg-l10n==2.4.7-21+deb13u1 +gnupg-utils==2.4.7-21+deb13u1+b3 +gnupg2==2.4.7-21+deb13u1 gobject-introspection==1.84.0-1 gobject-introspection-bin==1.84.0-1 golang==2:1.24~2 golang-1.24==1.24.4-1 golang-1.24-doc==1.24.4-1 -golang-1.24-go==1.24.4-1 -golang-1.24-src==1.24.4-1 +golang-1.24-go==1.24.4-1+fips +golang-1.24-src==1.24.4-1+fips golang-doc==2:1.24~2 golang-go==2:1.24~2 golang-src==2:1.24~2 googletest==1.16.0-1 -gpg==2.4.7-21+b3 -gpg-agent==2.4.7-21+b3 -gpg-wks-client==2.4.7-21+b3 -gpgconf==2.4.7-21+b3 -gpgsm==2.4.7-21+b3 -gpgv==2.4.7-21+b3 +gpg==2.4.7-21+deb13u1+b3 +gpg-agent==2.4.7-21+deb13u1+b3 +gpg-wks-client==2.4.7-21+deb13u1+b3 +gpgconf==2.4.7-21+deb13u1+b3 +gpgsm==2.4.7-21+deb13u1+b3 +gpgv==2.4.7-21+deb13u1+b3 graphviz==2.42.4-3 groff==1.23.0-9 groff-base==1.23.0-9 +grub-common==2.12-9+deb13u2 +grub-efi-arm64-bin==2.12-9+deb13u2 +grub-efi-arm64-signed==1+2.12+9+deb13u2 +grub-efi-arm64-unsigned==2.12-9+deb13u2 +grub2-common==2.12-9+deb13u2 gsettings-desktop-schemas==48.0-1 gstreamer1.0-libav==1.26.2-1 -gstreamer1.0-plugins-base==1.26.2-1 -gstreamer1.0-plugins-good==1.26.2-1 -gstreamer1.0-x==1.26.2-1 +gstreamer1.0-plugins-base==1.26.2-1+deb13u1 +gstreamer1.0-plugins-good==1.26.2-1+deb13u1 +gstreamer1.0-x==1.26.2-1+deb13u1 gtk-update-icon-cache==4.18.6+ds-2 guile-3.0-libs==3.0.10+really3.0.10-4 help2man==1.49.3 @@ -241,10 +262,10 @@ hwdata==0.394-1 i965-va-driver==2.4.1+dfsg1-2 ibverbs-providers==56.1-1 icu-devtools==76.1-4 -imagemagick==8:7.1.1.43+dfsg1-1+deb13u3 -imagemagick-7-common==8:7.1.1.43+dfsg1-1+deb13u3 -imagemagick-7.q16==8:7.1.1.43+dfsg1-1+deb13u3 -inetutils-telnet==2:2.6-3 +imagemagick==8:7.1.1.43+dfsg1-1+deb13u9 +imagemagick-7-common==8:7.1.1.43+dfsg1-1+deb13u9 +imagemagick-7.q16==8:7.1.1.43+dfsg1-1+deb13u9 +inetutils-telnet==2:2.6-3+deb13u3 inkscape==1.4-6 install-info==7.1.1-1+b1 intel-media-va-driver==25.2.3+dfsg1-1 @@ -261,13 +282,13 @@ jarwrapper==0.80 java-common==0.76 javahelper==0.80 javascript-common==12+nmu1 -jq==1.7.1-6+deb13u1 +jq==1.7.1-6+deb13u2 junit4==4.13.2-5 junit5==5.10.3-1 kernel-wedge==2.106 kmod==34.2-2 -krb5-locales==1.21.3-5 -krb5-multidev==1.21.3-5 +krb5-locales==1.21.3-5+deb13u1 +krb5-multidev==1.21.3-5+deb13u1 lcov==2.3.1-1 less==668-1 lib2geom1.4.0==1.4-4 @@ -303,13 +324,13 @@ libapparmor1==4.1.0-1 libappconfig-perl==1.71-2.3 libappstream5==1.0.5-1 libapt-pkg-perl==0.1.42 -libapt-pkg7.0==3.0.3 libarchive-cpio-perl==0.10-3 libarchive-zip-perl==1.68-1 -libarchive13t64==3.7.4-4 +libarchive13t64==3.7.4-4+deb13u1 libargon2-1==0~20190702+dfsg-4+b2 libarray-intspan-perl==2.004-2 libasan8==14.2.0-19 +libasan8-armhf-cross==14.2.0-19cross1 libasm-java==9.8-1 libasound2-data==1.2.14-1 libasound2-dev==1.2.14-1 @@ -319,21 +340,22 @@ libass9==1:0.17.3-1+b1 libassuan9==3.0.2-2 libasyncns0==0.8-6+b5 libatinject-jsr330-api-java==1.0+ds1-6 -libatk-bridge2.0-0t64==2.56.2-1 -libatk-bridge2.0-dev==2.56.2-1 +libatk-bridge2.0-0t64==2.56.2-1+deb13u1 +libatk-bridge2.0-dev==2.56.2-1+deb13u1 libatk-wrapper-java==0.40.0-3 libatk-wrapper-java-jni==0.40.0-3+b3 -libatk1.0-0t64==2.56.2-1 -libatk1.0-dev==2.56.2-1 +libatk1.0-0t64==2.56.2-1+deb13u1 +libatk1.0-dev==2.56.2-1+deb13u1 libatkmm-1.6-1v5==2.28.4-1+b2 libatm1-dev==1:2.5.1-7 libatm1t64==1:2.5.1-7 libatomic1==14.2.0-19 -libatspi2.0-0t64==2.56.2-1 -libatspi2.0-dev==2.56.2-1 +libatomic1-armhf-cross==14.2.0-19cross1 +libatspi2.0-0t64==2.56.2-1+deb13u1 +libatspi2.0-dev==2.56.2-1+deb13u1 libattr1-dev==1:2.5.2-3 libaudit-dev==1:4.0.2-2+b2 -libaugeas0==1.14.1-1+b3 +libaugeas0==1.14.1-1.1~deb13u1 libauparse-dev==1:4.0.2-2+b2 libauparse0t64==1:4.0.2-2+b2 libauthen-sasl-perl==2.1700-1 @@ -341,11 +363,11 @@ libavahi-client3==0.8-16 libavahi-common-data==0.8-16 libavahi-common3==0.8-16 libavc1394-0==0.5.4-5+b2 -libavcodec61==7:7.1.3-0+deb13u1 -libavfilter10==7:7.1.3-0+deb13u1 -libavformat61==7:7.1.3-0+deb13u1 +libavcodec61==7:7.1.4-0+deb13u1 +libavfilter10==7:7.1.4-0+deb13u1 +libavformat61==7:7.1.4-0+deb13u1 libavif16==1.2.1-1.2 -libavutil59==7:7.1.3-0+deb13u1 +libavutil59==7:7.1.4-0+deb13u1 libb-hooks-endofscope-perl==0.28-2 libb-hooks-op-check-perl==0.22-3+b2 libbabeltrace-dev==1.5.11-4+b2 @@ -356,7 +378,6 @@ libbinutils==2.44-3 libbit-vector-perl==7.4-3+b3 libblas3==3.12.1-6 libblkid-dev==2.41-5 -libblkid1==2.41-5 libblkio1==1.5.0-2 libblosc1==1.21.5+ds-1+b2 libblosc2-4==2.17.1+ds-1 @@ -469,7 +490,7 @@ libboost1.83-dev==1.83.0-4.2 libboost1.83-tools-dev==1.83.0-4.2 libbpf-dev==1:1.5.0-3 libbpf1==1:1.5.0-3 -libbrlapi0.8==6.7-3.1+deb13u2 +libbrlapi0.8==6.7-3.1+deb13u3 libbrotli-dev==1.1.0-2+b7 libbrotli1==1.1.0-2+b7 libbs2b0==3.1.0+dfsg-8+b1 @@ -477,18 +498,17 @@ libbsd-dev==0.12.2-2 libbsh-java==2.0b4-20 libburn4t64==1.5.6-1.1+b1 libbz2-dev==1.0.8-6 -libc-ares-dev==1.34.5-1 -libc-ares2==1.34.5-1 -libc-bin==2.41-12 -libc-dev-bin==2.41-12 -libc-l10n==2.41-12 -libc6==2.41-12 -libc6-dbg==2.41-12 -libc6-dev==2.41-12 -libc6-dev-i386==2.41-12 -libc6-dev-x32==2.41-12 -libc6-i386==2.41-12 -libc6-x32==2.41-12 +libc-ares-dev==1.34.5-1+deb13u1 +libc-ares2==1.34.5-1+deb13u1 +libc-dev-bin==2.41-12+deb13u3 +libc-l10n==2.41-12+deb13u3 +libc6-armhf-cross==2.41-11cross1 +libc6-dbg==2.41-12+deb13u3 +libc6-dev==2.41-12+deb13u3 +libc6-dev-i386==2.41-12+deb13u3 +libc6-dev-x32==2.41-12+deb13u3 +libc6-i386==2.41-12+deb13u3 +libc6-x32==2.41-12+deb13u3 libcaca0==0.99.beta20-5 libcacard0==1:2.8.0-3+b2 libcaf-openmpi-3t64==2.10.2+ds-4 @@ -497,13 +517,12 @@ libcairo-script-interpreter2==1.18.4-1+b1 libcairo2==1.18.4-1+b1 libcairo2-dev==1.18.4-1+b1 libcairomm-1.0-1v5==1.14.5-2+b1 -libcap-dev==1:2.75-10+b1 +libcap-dev==1:2.75-10+deb13u1+b1 libcap-ng-dev==0.8.5-4+b1 -libcap2==1:2.75-10+b1 -libcap2-bin==1:2.75-10+b1 -libcapstone5==5.0.6-1 +libcap2-bin==1:2.75-10+deb13u1+b1 +libcapstone5==5.0.7-1~deb13u1 libcapture-tiny-perl==0.50-1 -libcares2==1.34.5-1 +libcares2==1.34.5-1+deb13u1 libcarp-clan-perl==6.08-2 libcbor0.10==0.10.2-2 libcc1-0==14.2.0-19 @@ -541,7 +560,7 @@ libcoarrays-dev==2.10.2+ds-4 libcoarrays-openmpi-dev==2.10.2+ds-4 libcodec2-1.2==1.2.0-3 libcolord2==1.4.7-3 -libcom-err2==1.47.2-3+b3 +libcom-err2==1.47.2-3+b11 libcommon-sense-perl==3.75-3+b5 libcommons-beanutils-java==1.10.1-1.1 libcommons-cli-java==1.6.0-1 @@ -569,9 +588,9 @@ libctf0==2.44-3 libcunit1==2.1-3-dfsg-2.7+b1 libcunit1-dev==2.1-3-dfsg-2.7+b1 libcups2t64==2.4.10-3+deb13u2 -libcurl3t64-gnutls==8.14.1-2+deb13u2 -libcurl4-openssl-dev==8.14.1-2+deb13u2 -libcurl4t64==8.14.1-2+deb13u2 +libcurl3t64-gnutls==8.14.1-2+deb13u3 +libcurl4-openssl-dev==8.14.1-2+deb13u3 +libcurl4t64==8.14.1-2+deb13u3 libdaemon-dev==0.14-7.1+b3 libdaemon0==0.14-7.1+b3 libdata-dpath-perl==0.60-1 @@ -586,7 +605,7 @@ libdate-calc-xs-perl==6.4-2+b4 libdate-manip-perl==6.98-1 libdatetime-locale-perl==1:1.41-1 libdatetime-perl==2:1.65-1+b2 -libdatetime-timezone-perl==1:2.65-1+2025b +libdatetime-timezone-perl==1:2.65-1+2026b libdatrie-dev==0.2.13-3+b1 libdatrie1==0.2.13-3+b1 libdav1d7==1.5.1-1 @@ -636,13 +655,16 @@ libdouble-conversion3==3.3.1-1 libdoxia-core-java==2.0.0-1 libdoxia-java==2.0.0-1 libdoxia-sitetools-java==2.0.0-1 -libdpkg-perl==1.22.21 +libdpkg-perl==1.22.22 libdrm-amdgpu1==2.4.124-2 libdrm-common==2.4.124-2 libdrm-dev==2.4.124-2 +libdrm-etnaviv1==2.4.124-2 +libdrm-freedreno1==2.4.124-2 libdrm-intel1==2.4.124-2 libdrm-nouveau2==2.4.124-2 libdrm-radeon1==2.4.124-2 +libdrm-tegra0==2.4.124-2 libdrm2==2.4.124-2 libduktape207==2.7.0-2+b2 libdv4t64==1.0.0-17.1+b1 @@ -692,7 +714,7 @@ libexpat1-dev==2.7.1-2 libexplain-dev==1.4.D001-16 libexplain51t64==1.4.D001-16 libexporter-tiny-perl==1.006002-1 -libext2fs2t64==1.47.2-3+b3 +libext2fs2t64==1.47.2-3+b11 libfabric1==2.1.0-1.1 libfakeroot==1.37.1.1-1 libfastjson4==1.2304.0-2 @@ -734,8 +756,8 @@ libfontbox-java==1:1.8.16-5 libfontconfig-dev==2.15.0-2.3 libfontconfig1==2.15.0-2.3 libfontenc1==1:1.1.8-1+b2 -libfreetype-dev==2.13.3+dfsg-1 -libfreetype6==2.13.3+dfsg-1 +libfreetype-dev==2.13.3+dfsg-1+deb13u1 +libfreetype6==2.13.3+dfsg-1+deb13u1 libfreezethaw-perl==0.5001-3 libfribidi-dev==1.0.16-1 libfribidi0==1.0.16-1 @@ -749,15 +771,17 @@ libgbm1==25.0.7-2 libgc-dev==1:8.2.8-1 libgc1==1:8.2.8-1 libgcc-14-dev==14.2.0-19 -libgcrypt20==1.11.0-7 -libgd-perl==2.78-1+b3 +libgcc-14-dev-armhf-cross==14.2.0-19cross1 +libgcc-s1-armhf-cross==14.2.0-19cross1 +libgcrypt20==1.11.0-7+deb13u1 +libgd-perl==2.78-1+deb13u1 libgd3==2.3.3-13 libgdbm-compat4t64==1.24-2 libgdbm6t64==1.24-2 -libgdk-pixbuf-2.0-0==2.42.12+dfsg-4 -libgdk-pixbuf-2.0-dev==2.42.12+dfsg-4 -libgdk-pixbuf2.0-bin==2.42.12+dfsg-4 -libgdk-pixbuf2.0-common==2.42.12+dfsg-4 +libgdk-pixbuf-2.0-0==2.42.12+dfsg-4+deb13u1 +libgdk-pixbuf-2.0-dev==2.42.12+dfsg-4+deb13u1 +libgdk-pixbuf2.0-bin==2.42.12+dfsg-4+deb13u1 +libgdk-pixbuf2.0-common==2.42.12+dfsg-4+deb13u1 libgeronimo-annotation-1.3-spec-java==1.3-1 libgeronimo-interceptor-3.0-spec-java==1.0.1-5 libgetopt-long-descriptive-perl==0.116-2 @@ -769,11 +793,11 @@ libgfortran5==14.2.0-19 libgfrpc0==11.1-6 libgfxdr0==11.1-6 libgif7==5.2.2-1+b1 -libgio-2.0-dev==2.84.4-3~deb13u1 -libgio-2.0-dev-bin==2.84.4-3~deb13u1 +libgio-2.0-dev==2.84.4-3~deb13u3 +libgio-2.0-dev-bin==2.84.4-3~deb13u3 libgirepository-1.0-1==1.84.0-1 libgirepository-1.0-dev==1.84.0-1 -libgirepository-2.0-0==2.84.4-3~deb13u1 +libgirepository-2.0-0==2.84.4-3~deb13u3 libgirepository1.0-dev==1.84.0-1 libgit-wrapper-perl==0.048-2 libgitlab-api-v4-perl==0.27-1 @@ -783,11 +807,11 @@ libgl1-mesa-dri==25.0.7-2 libgles-dev==1.7.0-1+b2 libgles1==1.7.0-1+b2 libgles2==1.7.0-1+b2 -libglib2.0-0t64==2.84.4-3~deb13u1 -libglib2.0-bin==2.84.4-3~deb13u1 -libglib2.0-data==2.84.4-3~deb13u1 -libglib2.0-dev==2.84.4-3~deb13u1 -libglib2.0-dev-bin==2.84.4-3~deb13u1 +libglib2.0-0t64==2.84.4-3~deb13u3 +libglib2.0-bin==2.84.4-3~deb13u3 +libglib2.0-data==2.84.4-3~deb13u3 +libglib2.0-dev==2.84.4-3~deb13u3 +libglib2.0-dev-bin==2.84.4-3~deb13u3 libglibmm-2.4-1t64==2.66.8-1 libglu1-mesa==9.0.2-1.1+b3 libglu1-mesa-dev==9.0.2-1.1+b3 @@ -802,11 +826,13 @@ libgme0==0.6.3-7+b2 libgmock-dev==1.16.0-1 libgmp-dev==2:6.3.0+dfsg-3 libgmpxx4ldbl==2:6.3.0+dfsg-3 -libgnutls-dane0t64==3.8.9-3 -libgnutls-openssl27t64==3.8.9-3 -libgnutls28-dev==3.8.9-3 -libgnutls30t64==3.8.9-3 +libgnutls-dane0t64==3.8.9-3+deb13u4 +libgnutls-openssl27t64==3.8.9-3+deb13u4 +libgnutls28-dev==3.8.9-3+deb13u4 +libgnutls30t64==3.8.9-3+deb13u4 libgomp1==14.2.0-19 +libgomp1-armhf-cross==14.2.0-19cross1 +libgoogle-perftools-dev==2.16-1 libgoogle-perftools4t64==2.16-1 libgpg-error-l10n==1.51-4 libgpg-error0==1.51-4 @@ -828,9 +854,9 @@ libgslcblas0==2.8+dfsg-5 libgsm1==1.0.22-1+b2 libgspell-1-3==1.14.0-2+b1 libgspell-1-common==1.14.0-2 -libgssapi-krb5-2==1.21.3-5 -libgssrpc4t64==1.21.3-5 -libgstreamer-plugins-base1.0-0==1.26.2-1 +libgssapi-krb5-2==1.21.3-5+deb13u1 +libgssrpc4t64==1.21.3-5+deb13u1 +libgstreamer-plugins-base1.0-0==1.26.2-1+deb13u1 libgstreamer1.0-0==1.26.2-2 libgtest-dev==1.16.0-1 libgtk-3-0t64==3.24.49-3 @@ -849,12 +875,12 @@ libgumbo3==0.13.0+dfsg-2 libgvc6==2.42.4-3 libgvpr2==2.42.4-3 libhamcrest-java==2.2-2 -libharfbuzz-cairo0==10.2.0-1+b1 -libharfbuzz-dev==10.2.0-1+b1 -libharfbuzz-gobject0==10.2.0-1+b1 -libharfbuzz-icu0==10.2.0-1+b1 -libharfbuzz-subset0==10.2.0-1+b1 -libharfbuzz0b==10.2.0-1+b1 +libharfbuzz-cairo0==10.2.0-1+deb13u1 +libharfbuzz-dev==10.2.0-1+deb13u1 +libharfbuzz-gobject0==10.2.0-1+deb13u1 +libharfbuzz-icu0==10.2.0-1+deb13u1 +libharfbuzz-subset0==10.2.0-1+deb13u1 +libharfbuzz0b==10.2.0-1+deb13u1 libhdf5-310==1.14.5+repack-3 libheif-plugin-aomenc==1.19.8-1 libheif-plugin-dav1d==1.19.8-1 @@ -902,14 +928,14 @@ libidn2-dev==2.3.8-2 libiec61883-0==1.2.0-7 libigdgmm12==22.7.2+ds1-1 libijs-0.35==0.35-15.2 -libimage-magick-perl==8:7.1.1.43+dfsg1-1+deb13u3 -libimage-magick-q16-perl==8:7.1.1.43+dfsg1-1+deb13u3 +libimage-magick-perl==8:7.1.1.43+dfsg1-1+deb13u9 +libimage-magick-q16-perl==8:7.1.1.43+dfsg1-1+deb13u9 libimagequant0==2.18.0-1+b2 libimath-3-1-29t64==3.1.12-1+b3 libimport-into-perl==1.002005-2 libindirect-perl==0.39-2+b4 -libinput-bin==1.28.1-1 -libinput10==1.28.1-1 +libinput-bin==1.28.1-1+deb13u1 +libinput10==1.28.1-1+deb13u1 libio-compress-brotli-perl==0.004001-2+b3 libio-html-perl==1.004-3 libio-interactive-perl==1.027-1 @@ -948,7 +974,7 @@ libjetty9-java==9.4.57-1.1~deb13u1 libjpeg-dev==1:2.1.5-4 libjpeg62-turbo==1:2.1.5-4 libjpeg62-turbo-dev==1:2.1.5-4 -libjq1==1.7.1-6+deb13u1 +libjq1==1.7.1-6+deb13u2 libjs-bootstrap5==5.3.5+dfsg-4 libjs-d3==3.5.17-4 libjs-jquery==3.6.1+dfsg+~3.5.14-1 @@ -974,24 +1000,23 @@ libjte2==1.22-4+b2 libjtidy-java==7+svn20110807-6 libjudy-dev==1.0.5-5.1 libjudydebian1==1.0.5-5.1 -libjxl0.11==0.11.1-4 +libjxl0.11==0.11.2-0.1~deb13u2 libjxr-tools==1.2~git20170615.f752187-5.3 libjxr0t64==1.2~git20170615.f752187-5.3 -libk5crypto3==1.21.3-5 -libkadm5clnt-mit12==1.21.3-5 -libkadm5srv-mit12==1.21.3-5 -libkdb5-10t64==1.21.3-5 +libk5crypto3==1.21.3-5+deb13u1 +libkadm5clnt-mit12==1.21.3-5+deb13u1 +libkadm5srv-mit12==1.21.3-5+deb13u1 +libkdb5-10t64==1.21.3-5+deb13u1 libkeyutils1==1.6.3-6 libkmod2==34.2-2 libkpathsea6==2024.20240313.70630+ds-6 -libkrb5-3==1.21.3-5 -libkrb5-dev==1.21.3-5 -libkrb5support0==1.21.3-5 +libkrb5-3==1.21.3-5+deb13u1 +libkrb5-dev==1.21.3-5+deb13u1 +libkrb5support0==1.21.3-5+deb13u1 libksba8==1.6.7-2+b1 liblab-gamut1==2.42.4-3 liblapack3==3.12.1-6 -liblastlog2-2==2.41-5 -liblcms2-2==2.16-2 +liblcms2-2==2.16-2+deb13u2 libldap-common==2.6.10+dfsg-1 libldap-dev==2.6.10+dfsg-1 libldap2==2.6.10+dfsg-1 @@ -1032,14 +1057,14 @@ liblzo2-2==2.10-3+b1 liblzo2-dev==2.10-3+b1 libmagic-mgc==1:5.46-5 libmagic1t64==1:5.46-5 -libmagickcore-7.q16-10==8:7.1.1.43+dfsg1-1+deb13u3 -libmagickcore-7.q16-10-extra==8:7.1.1.43+dfsg1-1+deb13u3 -libmagickwand-7.q16-10==8:7.1.1.43+dfsg1-1+deb13u3 +libmagickcore-7.q16-10==8:7.1.1.43+dfsg1-1+deb13u9 +libmagickcore-7.q16-10-extra==8:7.1.1.43+dfsg1-1+deb13u9 +libmagickwand-7.q16-10==8:7.1.1.43+dfsg1-1+deb13u9 libmail-sendmail-perl==0.80-3 libmailtools-perl==2.22-1 -libmariadb-dev==1:11.8.3-0+deb13u1 -libmariadb-dev-compat==1:11.8.3-0+deb13u1 -libmariadb3==1:11.8.3-0+deb13u1 +libmariadb-dev==1:11.8.6-0+deb13u1 +libmariadb-dev-compat==1:11.8.6-0+deb13u1 +libmariadb3==1:11.8.6-0+deb13u1 libmarkdown2==2.2.7-2.1 libmatch-simple-perl==0.012-1 libmatch-simple-xs-perl==0.002-1+b1 @@ -1064,7 +1089,7 @@ libmaven-shared-utils-java==3.4.2-1 libmaven-site-plugin-java==3.21.0-1 libmaven3-core-java==3.9.9-1 libmaxminddb0==1.12.2-1 -libmbedcrypto16==3.6.4-2 +libmbedcrypto16==3.6.5-0.1~deb13u1 libmd-dev==1.1.0-2+b1 libmd4c0==0.5.2-2+b1 libmime-tools-perl==5.515-1 @@ -1079,18 +1104,17 @@ libmoose-perl==2.2207-1+b3 libmoosex-aliases-perl==0.11-2 libmoox-aliases-perl==0.001006-2 libmount-dev==2.41-5 -libmount1==2.41-5 libmouse-perl==2.5.11-1+b1 libmp3lame0==3.100-6+b3 libmpc3==1.3.1-1+b3 libmpfi0==1.5.4+ds-4 libmpfr6==4.2.2-1 -libmpg123-0t64==1.32.10-1 +libmpg123-0t64==1.32.10-1+deb13u1 libmro-compat-perl==0.15-2 libmtdev1t64==1.1.7-1 libmujs3==1.3.6-1 -libmunge2==0.5.16-1 -libmupdf25.1==1.25.1+ds1-6 +libmunge2==0.5.16-1.1~deb13u1 +libmupdf25.1==1.25.1+ds1-6+deb13u1 libmysofa1==1.3.3+dfsg-1 libnamespace-autoclean-perl==0.31-1 libnamespace-clean-perl==0.27-2 @@ -1111,7 +1135,7 @@ libnetaddr-ip-perl==4.079+dfsg-2+b5 libnetfilter-conntrack-dev==1.1.0-1 libnetfilter-conntrack3==1.1.0-1 libnetpbm11t64==2:11.10.02-1 -libnetsnmptrapd40t64==5.9.4+dfsg-2 +libnetsnmptrapd40t64==5.9.4+dfsg-2+deb13u1 libnewt-dev==0.52.25-1 libnewt0.52==0.52.25-1 libnfnetlink-dev==1.0.2-3 @@ -1120,25 +1144,27 @@ libnfs14==5.0.2-1+b2 libnftables1==1.1.3-1 libnftnl-dev==1.2.9-1 libnftnl11==1.2.9-1 -libnghttp2-14==1.64.0-1.1 -libnghttp2-dev==1.64.0-1.1 +libnghttp2-14==1.64.0-1.1+deb13u1 +libnghttp2-dev==1.64.0-1.1+deb13u1 libnghttp3-9==1.8.0-1 libnghttp3-dev==1.8.0-1 -libngtcp2-16==1.11.0-1 -libngtcp2-crypto-gnutls8==1.11.0-1 +libngtcp2-16==1.11.0-1+deb13u1 +libngtcp2-crypto-gnutls8==1.11.0-1+deb13u1 libnl-3-200==3.7.0-2 libnl-3-dev==3.7.0-2 libnl-genl-3-200==3.7.0-2 libnl-genl-3-dev==3.7.0-2 libnl-route-3-200==3.7.0-2 libnl-route-3-dev==3.7.0-2 +libnode115==20.19.2+dfsg-1+deb13u2 libnorm-dev==1.5.9+dfsg-3.1+b2 libnorm1t64==1.5.9+dfsg-3.1+b2 libnpth0t64==1.8-3 +libnsl-dev==1.3.0-3+b3 libnsl2==1.3.0-3+b3 libnspr4==2:4.36-1 -libnss-systemd==257.9-1~deb13u1 -libnss3==2:3.110-1 +libnss-systemd==257.13-1~deb13u1 +libnss3==2:3.110-1+deb13u2 libnuma-dev==2.0.19-1 libnuma1==2.0.19-1 libnumber-compare-perl==0.03-3 @@ -1155,7 +1181,7 @@ libopencsd1==1.5.5-1 libopenexr-3-1-30==3.1.13-2 libopengl-dev==1.7.0-1+b2 libopengl0==1.7.0-1+b2 -libopenjp2-7==2.5.3-2.1~deb13u1 +libopenjp2-7==2.5.3-2.1~deb13u2 libopenmpi-dev==5.0.7-1 libopenmpi40==5.0.7-1 libopenmpt0t64==0.7.13-1+b1 @@ -1174,13 +1200,9 @@ libpackage-deprecationmanager-perl==0.18-1 libpackage-stash-perl==0.40-1 libpackage-stash-xs-perl==0.30-1+b4 libpadwalker-perl==2.5-1+b6 -libpam-cap==1:2.75-10+b1 +libpam-cap==1:2.75-10+deb13u1+b1 libpam-doc==1.7.0-5 -libpam-modules==1.7.0-5 -libpam-modules-bin==1.7.0-5 -libpam-runtime==1.7.0-5 -libpam-systemd==257.9-1~deb13u1 -libpam0g==1.7.0-5 +libpam-systemd==257.13-1~deb13u1 libpam0g-dev==1.7.0-5 libpango-1.0-0==1.56.3-1 libpango1.0-dev==1.56.3-1 @@ -1208,7 +1230,6 @@ libpciaccess-dev==0.17-3+b3 libpciaccess0==0.17-3+b3 libpcre2-16-0==10.46-1~deb13u1 libpcre2-32-0==10.46-1~deb13u1 -libpcre2-8-0==10.46-1~deb13u1 libpcre2-dev==10.46-1~deb13u1 libpcre2-posix3==10.46-1~deb13u1 libpcsclite-dev==2.3.3-1 @@ -1250,17 +1271,17 @@ libplexus-xml-java==3.0.1-2 libpmem1==1.13.1-1.1+b1 libpmix-dev==5.0.7-1 libpmix2t64==5.0.7-1 -libpng-dev==1.6.48-1+deb13u1 -libpng-tools==1.6.48-1+deb13u1 -libpng16-16t64==1.6.48-1+deb13u1 +libpng-dev==1.6.48-1+deb13u5 +libpng-tools==1.6.48-1+deb13u5 +libpng16-16t64==1.6.48-1+deb13u5 libpocketsphinx3==0.8+5prealpha+1-15+b4 libpod-constants-perl==0.19-2 libpod-parser-perl==1.67-1 -libpoppler-glib8t64==25.03.0-5+deb13u2 -libpoppler147==25.03.0-5+deb13u2 +libpoppler-glib8t64==25.03.0-5+deb13u3 +libpoppler147==25.03.0-5+deb13u3 libpopt-dev==1.19+dfsg-2 libpopt0==1.19+dfsg-2 -libpostproc58==7:7.1.3-0+deb13u1 +libpostproc58==7:7.1.4-0+deb13u1 libpotrace0==1.16-2+b2 libproc-processtable-perl==0.636-1+b3 libproc2-0==2:4.0.4-9 @@ -1284,40 +1305,40 @@ libpython3-all-dev==3.13.5-1 libpython3-dbg==3.13.5-1 libpython3-dev==3.13.5-1 libpython3-stdlib==3.13.5-1 -libpython3.13==3.13.5-2 -libpython3.13-dbg==3.13.5-2 -libpython3.13-dev==3.13.5-2 -libpython3.13-minimal==3.13.5-2 -libpython3.13-stdlib==3.13.5-2 +libpython3.13==3.13.5-2+deb13u2 +libpython3.13-dbg==3.13.5-2+deb13u2 +libpython3.13-dev==3.13.5-2+deb13u2 +libpython3.13-minimal==3.13.5-2+deb13u2 +libpython3.13-stdlib==3.13.5-2+deb13u2 libqdox2-java==2.0.3-1 libqhull-r8.0==2020.2-6+b2 -libqt5concurrent5t64==5.15.15+dfsg-6 -libqt5core5t64==5.15.15+dfsg-6 -libqt5dbus5t64==5.15.15+dfsg-6 -libqt5gui5t64==5.15.15+dfsg-6 -libqt5network5t64==5.15.15+dfsg-6 -libqt5opengl5-dev==5.15.15+dfsg-6 -libqt5opengl5t64==5.15.15+dfsg-6 -libqt5printsupport5t64==5.15.15+dfsg-6 +libqt5concurrent5t64==5.15.15+dfsg-6+deb13u1 +libqt5core5t64==5.15.15+dfsg-6+deb13u1 +libqt5dbus5t64==5.15.15+dfsg-6+deb13u1 +libqt5gui5t64==5.15.15+dfsg-6+deb13u1 +libqt5network5t64==5.15.15+dfsg-6+deb13u1 +libqt5opengl5-dev==5.15.15+dfsg-6+deb13u1 +libqt5opengl5t64==5.15.15+dfsg-6+deb13u1 +libqt5printsupport5t64==5.15.15+dfsg-6+deb13u1 libqt5qml5==5.15.15+dfsg-3 libqt5qmlmodels5==5.15.15+dfsg-3 libqt5quick5==5.15.15+dfsg-3 -libqt5sql5-sqlite==5.15.15+dfsg-6 -libqt5sql5t64==5.15.15+dfsg-6 +libqt5sql5-sqlite==5.15.15+dfsg-6+deb13u1 +libqt5sql5t64==5.15.15+dfsg-6+deb13u1 libqt5svg5==5.15.15-2 -libqt5test5t64==5.15.15+dfsg-6 +libqt5test5t64==5.15.15+dfsg-6+deb13u1 libqt5waylandclient5==5.15.15-3 libqt5waylandcompositor5==5.15.15-3 -libqt5widgets5t64==5.15.15+dfsg-6 -libqt5xml5t64==5.15.15+dfsg-6 +libqt5widgets5t64==5.15.15+dfsg-6+deb13u1 +libqt5xml5t64==5.15.15+dfsg-6+deb13u1 libquadmath0==14.2.0-19 -librabbitmq4==0.15.0-1 -librados2==18.2.7+ds-1 +librabbitmq4==0.15.0-1+deb13u1 +librados2==18.2.7+ds-1+deb13u1 libraqm0==0.10.2-1 librav1e0.7==0.7.1-9+b2 libraw1394-11==2.1.2-2+b2 libraw23t64==0.21.4-2 -librbd1==18.2.7+ds-1 +librbd1==18.2.7+ds-1+deb13u1 librdkafka++1==2.8.0-1 librdkafka-dev==2.8.0-1 librdkafka1==2.8.0-1 @@ -1387,21 +1408,20 @@ libslf4j-java==1.7.32-2 libslirp0==4.8.0-1+b1 libsm-dev==2:1.2.6-1 libsm6==2:1.2.6-1 -libsmartcols1==2.41-5 libsnappy-java==1.1.10.7-1 libsnappy-jni==1.1.10.7-1 libsnappy1v5==1.2.2-1 -libsndfile1==1.2.2-2+b1 +libsndfile1==1.2.2-2+deb13u1 libsndio-dev==1.10.0-0.1 libsndio7.0==1.10.0-0.1 -libsnmp-base==5.9.4+dfsg-2 -libsnmp-dev==5.9.4+dfsg-2 -libsnmp-perl==5.9.4+dfsg-2 -libsnmp40t64==5.9.4+dfsg-2 +libsnmp-base==5.9.4+dfsg-2+deb13u1 +libsnmp-dev==5.9.4+dfsg-2+deb13u1 +libsnmp-perl==5.9.4+dfsg-2+deb13u1 +libsnmp40t64==5.9.4+dfsg-2+deb13u1 libsoap-lite-perl==1.27-3 libsocket6-perl==0.29-3+b4 -libsodium-dev==1.0.18-1+b2 -libsodium23==1.0.18-1+b2 +libsodium-dev==1.0.18-1+deb13u1 +libsodium23==1.0.18-1+deb13u1 libsord-0-0==0.16.18-1 libsort-versions-perl==1.62-3 libsoup-3.0-0==3.6.5-3 @@ -1416,17 +1436,16 @@ libsphinxbase3t64==0.8+5prealpha+1-21+b1 libspice-server1==0.15.2-1+b1 libspreadsheet-parseexcel-perl==0.6600-1 libspreadsheet-writeexcel-perl==2.40-4 -libsqlite3-0==3.46.1-7 -libsqlite3-dev==3.46.1-7 +libsqlite3-dev==3.46.1-7+deb13u1 libsratom-0-0==0.6.18-1 libsrt1.5-gnutls==1.5.4-1 -libss2==1.47.2-3+b3 +libss2==1.47.2-3+b11 libssh-4==0.11.2-1+deb13u1 libssh2-1-dev==1.11.1-1 libssh2-1t64==1.11.1-1 -libssl-dev==3.5.4-1~deb13u1 -libssl3t64==3.5.4-1~deb13u1 +libssl-dev==3.5.6-1~deb13u2 libstdc++-14-dev==14.2.0-19 +libstdc++6-armhf-cross==14.2.0-19cross1 libstemmer0d==2.2.0-4+b2 libstrictures-perl==2.000006-1 libstring-copyright-perl==0.003014-1 @@ -1445,16 +1464,15 @@ libsubunit0==1.4.2-3+b1 libsurefire-java==2.22.3-4 libsvtav1enc2==2.3.0+dfsg-1 libswitch-perl==2.17-3 -libswresample5==7:7.1.3-0+deb13u1 -libswscale8==7:7.1.3-0+deb13u1 +libswresample5==7:7.1.4-0+deb13u1 +libswscale8==7:7.1.4-0+deb13u1 libsynctex2==2024.20240313.70630+ds-6 libsyntax-keyword-try-perl==0.30-1+b1 libsys-cpuaffinity-perl==1.13~03-2+b4 libsys-hostname-long-perl==1.5-3 libsysprof-capture-4-dev==48.0-2 -libsystemd-dev==257.9-1~deb13u1 -libsystemd-shared==257.9-1~deb13u1 -libsystemd0==257.9-1~deb13u1 +libsystemd-dev==257.13-1~deb13u1 +libsystemd-shared==257.13-1~deb13u1 libsz2==1.1.3-1+b1 libtag2==2.0.2-2 libtask-weaken-perl==1.06-2 @@ -1489,15 +1507,16 @@ libtheoraenc1==1.2.0~alpha1+dfsg-6 libthrift-0.19.0t64==0.19.0-4+b1 libthrift-dev==0.19.0-4+b1 libtie-ixhash-perl==1.23-4 -libtiff-dev==4.7.0-3+deb13u1 -libtiff6==4.7.0-3+deb13u1 -libtiffxx6==4.7.0-3+deb13u1 +libtiff-dev==4.7.0-3+deb13u2 +libtiff6==4.7.0-3+deb13u2 +libtiffxx6==4.7.0-3+deb13u2 libtime-duration-perl==1.21-2 libtime-moment-perl==0.44-2+b4 libtimedate-perl==2.3300-2 libtinyxml2-11==11.0.0+dfsg-1+b1 libtinyxml2-dev==11.0.0+dfsg-1+b1 libtirpc-common==1.3.6+ds-1 +libtirpc-dev==1.3.6+ds-1 libtirpc3t64==1.3.6+ds-1 libtk8.6==8.6.16-1 libtool==2.5.4-4 @@ -1513,12 +1532,12 @@ libtype-tiny-perl==2.004000-2 libtype-tiny-xs-perl==0.025-2+b1 libtypes-serialiser-perl==1.01-1 libubsan1==14.2.0-19 +libubsan1-armhf-cross==14.2.0-19cross1 libuchardet0==0.0.8-1+b2 libucx0==1.18.1+ds-2+b1 -libudev-dev==257.9-1~deb13u1 -libudev1==257.9-1~deb13u1 +libudev-dev==257.13-1~deb13u1 libudfread0==1.1.2-1+b2 -libunbound8==1.22.0-2+deb13u1 +libunbound8==1.22.0-2+deb13u3 libunibreak6==6.1-3 libunicode-map-perl==0.112-13+b5 libunicode-utf8-perl==0.62-3 @@ -1535,7 +1554,6 @@ libusb-1.0-0-dev==2:1.0.28-1 libusb-1.0-doc==2:1.0.28-1 libusb-dev==2:0.1.12-35+b1 libusbredirparser1t64==0.15.0-1 -libuuid1==2.41-5 libuv1t64==1.50.0-2 libv4l-0t64==1.30.1-1 libv4lconvert0t64==1.30.1-1 @@ -1553,17 +1571,17 @@ libverto-libev1t64==0.3.1-1.2+b2 libverto1t64==0.3.1-1.2+b2 libvidstab1.1==1.1.0-2+b2 libvirglrenderer1==1.1.0-2 -libvirt-clients==11.3.0-3+deb13u1 -libvirt-common==11.3.0-3+deb13u1 -libvirt-l10n==11.3.0-3+deb13u1 -libvirt0==11.3.0-3+deb13u1 +libvirt-clients==11.3.0-3+deb13u2 +libvirt-common==11.3.0-3+deb13u2 +libvirt-l10n==11.3.0-3+deb13u2 +libvirt0==11.3.0-3+deb13u2 libvisio-0.1-1==0.1.7-1+b5 libvisual-0.4-0==0.4.2-2+b2 libvorbis0a==1.3.7-3 libvorbisenc2==1.3.7-3 libvorbisfile3==1.3.7-3 libvpl2==1:2.14.0-1+b1 -libvpx9==1.15.0-2.1 +libvpx9==1.15.0-2.1+deb13u1 libvte-2.91-0==0.80.1-1 libvte-2.91-common==0.80.1-1 libvulkan-dev==1.4.309.0-1 @@ -1669,7 +1687,7 @@ libxkbcommon0==1.7.0-2 libxkbfile1==1:1.1.0-1+b4 libxml-libxml-perl==2.0207+dfsg+really+2.0134-5+b2 libxml-namespacesupport-perl==1.12-2 -libxml-parser-perl==2.47-1+b3 +libxml-parser-perl==2.47-2~deb13u1 libxml-sax-base-perl==1.09-3 libxml-sax-expat-perl==0.51-2 libxml-sax-perl==1.02+dfsg-4 @@ -1692,7 +1710,8 @@ libxrender1==1:0.9.12-1 libxs-parse-keyword-perl==0.48-2 libxs-parse-sublike-perl==0.37-1 libxshmfence1==1.3.3-1 -libxslt1.1==1.1.35-1.2+deb13u2 +libxslt1-dev==1.1.35-1.2+deb13u3 +libxslt1.1==1.1.35-1.2+deb13u3 libxss-dev==1:1.2.3-1+b3 libxss1==1:1.2.3-1+b3 libxstring-perl==0.005-2+b4 @@ -1732,9 +1751,9 @@ libzvbi0t64==0.2.44-1 libzzip-0-13t64==0.13.78+dfsg.1-0.1 licensecheck==3.3.9-1 lintian==2.122.0 -linux-base==4.12 -linux-libc-dev==6.12.57-1 -linux-sysctl-defaults==4.12 +linux-base==4.12.1 +linux-libc-dev==6.12.90-2 +linux-sysctl-defaults==4.12.1 linuxdoc-tools==0.9.86-1 llvm==1:19.0-63 llvm-19==1:19.1.7-3+b1 @@ -1745,10 +1764,9 @@ llvm-19-tools==1:19.1.7-3+b1 llvm-runtime==1:19.0-63 lmdb-doc==0.9.31-1 lmodern==2.005-1 -locales==2.41-12 -login==1:4.16.0-2+really2.41-5 +locales==2.41-12+deb13u3 logrotate==3.22.0-1 -logsave==1.47.2-3+b3 +logsave==1.47.2-3+b11 lsb-release==12.1-1 lsof==4.99.4+dfsg-2 lua-bitop==1.0.2-7+b2 @@ -1768,7 +1786,7 @@ man-db==2.13.1-1 man2html-base==1.6g-16 manpages==6.9.1-1 manpages-dev==6.9.1-1 -mariadb-common==1:11.8.3-0+deb13u1 +mariadb-common==1:11.8.6-0+deb13u1 maven==3.9.9-1 maven-debian-helper==2.6.7 maven-repo-helper==1.11 @@ -1779,11 +1797,11 @@ mesa-vdpau-drivers==25.0.7-2 mesa-vulkan-drivers==25.0.7-2 meson==1.7.0-1 module-assistant==0.11.14 -mount==2.41-5 +mokutil==0.7.2-1 mpi-default-bin==1.18 mpi-default-dev==1.18 mtools==4.0.48-1 -mupdf-tools==1.25.1+ds1-6 +mupdf-tools==1.25.1+ds1-6+deb13u1 mysql-common==5.8+1.1.1 native-architecture==0.2.6 ncurses-term==6.5+20250216-2 @@ -1794,23 +1812,33 @@ nettle-dev==3.10.1-1 nftables==1.1.3-1 ninja-build==1.12.1-1 nlohmann-json3-dev==3.11.3-2.1 +node-acorn==8.8.1+ds+~cs25.17.7-2 +node-balanced-match==2.0.0-1 +node-brace-expansion==2.0.1+~1.1.0-2 +node-cjs-module-lexer==1.2.3+dfsg-1 +node-corepack==0.24.0-5 +node-minimatch==9.0.3-6 node-popper2==2.11.2-8 -numba-doc==0.61.2+dfsg-1 +node-undici==7.3.0+dfsg1+~cs24.12.11-1 +node-xtend==4.0.2-3 +nodejs==20.19.2+dfsg-1+deb13u2 +nodejs-doc==20.19.2+dfsg-1+deb13u2 +numba-doc==0.61.2+dfsg-1+deb13u1 ocl-icd-libopencl1==2.3.3-1 openjade==1.4devel1-23.3 -openjdk-21-jdk==21.0.9+10-1~deb13u1 -openjdk-21-jdk-headless==21.0.9+10-1~deb13u1 -openjdk-21-jre==21.0.9+10-1~deb13u1 -openjdk-21-jre-headless==21.0.9+10-1~deb13u1 +openjdk-21-jdk==21.0.11+10-1~deb13u2 +openjdk-21-jdk-headless==21.0.11+10-1~deb13u2 +openjdk-21-jre==21.0.11+10-1~deb13u2 +openjdk-21-jre-headless==21.0.11+10-1~deb13u2 openmpi-bin==5.0.7-1 openmpi-common==5.0.7-1 opensp==1.5.2-15.2 -openssh-client==1:10.0p1-7 -openssh-server==1:10.0p1-7 -openssh-sftp-server==1:10.0p1-7 -openssl==3.5.4-1~deb13u1 -openssl-provider-legacy==3.5.4-1~deb13u1 -ovmf==2025.02-8 +openssh-client==1:10.0p1-7+deb13u4 +openssh-server==1:10.0p1-7+deb13u4 +openssh-sftp-server==1:10.0p1-7+deb13u4 +openssl==3.5.6-1~deb13u2 +os-prober==1.83 +ovmf==2025.02-8+deb13u1 pahole==1.30-1 pandoc==3.1.11.1+ds-2 pandoc-data==3.1.11.1-3 @@ -1823,7 +1851,6 @@ pbzip2==1.1.13-1 pci.ids==0.0~2025.06.09-1 pciutils==1:3.13.0-2 perl==5.40.1-6 -perl-base==5.40.1-6 perl-modules-5.40==5.40.1-6 perl-openssl-defaults==7+b2 php-cli==2:8.4+96 @@ -1842,13 +1869,13 @@ php-text-template==4.0.1-4 php-timer==7.0.1-4 php-tokenizer==1.2.3-2 php-xml==2:8.4+96 -php8.4-cli==8.4.11-1 -php8.4-common==8.4.11-1 -php8.4-mbstring==8.4.11-1 -php8.4-opcache==8.4.11-1 -php8.4-readline==8.4.11-1 -php8.4-xml==8.4.11-1 -phpunit==11.5.19-1 +php8.4-cli==8.4.21-1~deb13u1 +php8.4-common==8.4.21-1~deb13u1 +php8.4-mbstring==8.4.21-1~deb13u1 +php8.4-opcache==8.4.21-1~deb13u1 +php8.4-readline==8.4.21-1~deb13u1 +php8.4-xml==8.4.21-1~deb13u1 +phpunit==11.5.19-1+deb13u1 phpunit-cli-parser==3.0.2-2 phpunit-code-unit==3.0.3-1 phpunit-code-unit-reverse-lookup==4.0.1-4 @@ -1926,7 +1953,7 @@ python3-constantly==23.10.4-2 python3-contourpy==1.3.1-1+b1 python3-coverage==7.6.0+dfsg1-2+b2 python3-cpuinfo==9.0.0+git20221119-3 -python3-cryptography==43.0.0-3 +python3-cryptography==43.0.0-3+deb13u1 python3-cssselect==1.3.0-1 python3-cycler==0.12.1-1 python3-dacite==1.9.2-2 @@ -1944,11 +1971,10 @@ python3-docutils==0.21.2+dfsg-2 python3-enlighten==1.11.2-1 python3-et-xmlfile==2.0.0-1 python3-executing==2.2.0-0.1 -python3-fonttools==4.57.0-1 +python3-fonttools==4.57.0-1+deb13u1 python3-fs==2.4.16-7 python3-gi==3.50.0-4+b1 python3-gpg==1.24.2-3 -python3-grpcio==1.51.1-6 python3-hamcrest==2.1.0-1 python3-html5lib==1.2-2 python3-hyperlink==21.0.0-6 @@ -1956,11 +1982,12 @@ python3-idna==3.10-1 python3-imagesize==1.4.1-1 python3-incremental==24.7.2-3 python3-inflect==7.3.1-2 +python3-inflection==0.3.1-3 python3-iniconfig==1.1.1-2 python3-invoke==2.2.0-2 python3-ipython==8.35.0-1 python3-isort==6.0.1-1 -python3-jaraco.context==6.0.1-1 +python3-jaraco.context==6.0.1-1+deb13u1 python3-jaraco.functools==4.1.0-1 python3-jaraco.text==4.0.0-1 python3-jedi==0.19.1+ds1-1 @@ -1988,7 +2015,7 @@ python3-nacl==1.5.0-7 python3-natsort==8.0.2-2 python3-netifaces==0.11.0-2+b6 python3-nose2==0.15.1-1 -python3-numba==0.61.2+dfsg-1 +python3-numba==0.61.2+dfsg-1+deb13u1 python3-numexpr==2.10.2-1+b2 python3-numpy==1:2.2.4+ds-1 python3-numpy-dev==1:2.2.4+ds-1 @@ -2005,8 +2032,8 @@ python3-paramiko==3.5.1-3 python3-parse==1.20.2-1 python3-parso==0.8.4-1 python3-pexpect==4.9-3 -python3-pil==11.1.0-5+b1 -python3-pil.imagetk==11.1.0-5+b1 +python3-pil==11.1.0-5+deb13u2 +python3-pil.imagetk==11.1.0-5+deb13u2 python3-pip==25.1.1+dfsg-1 python3-pip-whl==25.1.1+dfsg-1 python3-pkg-resources==78.1.1-0.1 @@ -2016,13 +2043,12 @@ python3-ply==3.11-9 python3-pooch==1.8.2-1 python3-prefixed==0.7.0-1 python3-prompt-toolkit==3.0.51-2 -python3-protobuf==3.21.12-11 python3-psutil==7.0.0-2 python3-psutils==3.3.8-1 python3-ptyprocess==0.7.0-6 python3-pure-eval==0.2.3-1 python3-puremagic==1.28-1 -python3-pyasn1==0.6.1-1 +python3-pyasn1==0.6.1-1+deb13u2 python3-pyasn1-modules==0.4.1-2 python3-pycparser==2.22-2 python3-pycryptodome==3.20.0+dfsg-3 @@ -2036,7 +2062,7 @@ python3-pytest==8.3.5-2 python3-pytest-cov==5.0.0-1 python3-pytz==2025.2-3 python3-regex==0.1.20241106-1+b1 -python3-requests==2.32.3+dfsg-5 +python3-requests==2.32.3+dfsg-5+deb13u1 python3-roman==5.0-1 python3-scapy==2.6.1+dfsg-1 python3-scipy==1.15.3-1 @@ -2069,7 +2095,7 @@ python3-typing-extensions==4.13.2-1 python3-tz==2025.2-3 python3-ufolib2==0.17.1+dfsg1-1 python3-unidiff==0.7.5-2 -python3-urllib3==2.3.0-3 +python3-urllib3==2.3.0-3+deb13u1 python3-venv==3.13.5-1 python3-wcwidth==0.2.13+dfsg1-1 python3-webencodings==0.5.1-5 @@ -2080,25 +2106,25 @@ python3-yaml==6.0.2-1+b2 python3-zipp==3.21.0-1 python3-zope.interface==7.2-1+b1 python3-zopfli==0.2.3.post1-1+b1 -python3.13==3.13.5-2 -python3.13-dbg==3.13.5-2 -python3.13-dev==3.13.5-2 -python3.13-minimal==3.13.5-2 -python3.13-tk==3.13.5-2 -python3.13-venv==3.13.5-2 -qemu-block-extra==1:10.0.6+ds-0+deb13u2 -qemu-system-common==1:10.0.6+ds-0+deb13u2 -qemu-system-data==1:10.0.6+ds-0+deb13u2 -qemu-system-gui==1:10.0.6+ds-0+deb13u2 -qemu-system-modules-opengl==1:10.0.6+ds-0+deb13u2 -qemu-system-modules-spice==1:10.0.6+ds-0+deb13u2 -qemu-system-x86==1:10.0.6+ds-0+deb13u2 -qemu-utils==1:10.0.6+ds-0+deb13u2 -qt5-gtk-platformtheme==5.15.15+dfsg-6 -qt5-qmake==5.15.15+dfsg-6 -qt5-qmake-bin==5.15.15+dfsg-6 -qtbase5-dev==5.15.15+dfsg-6 -qtbase5-dev-tools==5.15.15+dfsg-6 +python3.13==3.13.5-2+deb13u2 +python3.13-dbg==3.13.5-2+deb13u2 +python3.13-dev==3.13.5-2+deb13u2 +python3.13-minimal==3.13.5-2+deb13u2 +python3.13-tk==3.13.5-2+deb13u2 +python3.13-venv==3.13.5-2+deb13u2 +qemu-block-extra==1:10.0.8+ds-0+deb13u1+b2 +qemu-system-common==1:10.0.8+ds-0+deb13u1+b2 +qemu-system-data==1:10.0.8+ds-0+deb13u1 +qemu-system-gui==1:10.0.8+ds-0+deb13u1+b2 +qemu-system-modules-opengl==1:10.0.8+ds-0+deb13u1+b2 +qemu-system-modules-spice==1:10.0.8+ds-0+deb13u1+b2 +qemu-system-x86==1:10.0.8+ds-0+deb13u1+b2 +qemu-utils==1:10.0.8+ds-0+deb13u1+b2 +qt5-gtk-platformtheme==5.15.15+dfsg-6+deb13u1 +qt5-qmake==5.15.15+dfsg-6+deb13u1 +qt5-qmake-bin==5.15.15+dfsg-6+deb13u1 +qtbase5-dev==5.15.15+dfsg-6+deb13u1 +qtbase5-dev-tools==5.15.15+dfsg-6+deb13u1 qtchooser==66-2 qttranslations5-l10n==5.15.15-2 qtwayland5==5.15.15-3 @@ -2110,7 +2136,7 @@ rpcsvc-proto==1.4.3-1 rpm-common==4.20.1+dfsg-3 rpm2cpio==4.20.1+dfsg-3 rrdtool==1.7.2-4.2+b5 -rsync==3.4.1+ds1-5 +rsync==3.4.1+ds1-5+deb13u3 rsyslog==8.2504.0-1 ruby==1:3.3+b1 ruby-all-dev==1:3.3+b1 @@ -2141,20 +2167,24 @@ sgmlspl==1.03ii-38 shared-mime-info==2.4-5+b2 sharutils==1:4.15.2-12 shellcheck==0.10.0-1 -slirp4netns==1.2.1-1.1 +shim-helpers-arm64-signed==1+15.8+1 +shim-signed==1.47+15.8-1 +shim-signed-common==1.47+15.8-1 +shim-unsigned==15.8-1 sphinx-common==8.1.3-5 sphinx-rtd-theme-common==3.0.2+dfsg-2 -sq==1.3.1-2+b1 +sq==1.3.1-2+b2 squashfs-tools==1:4.6.1-1 -ss-dev==2.0-1.47.2-3+b3 +ss-dev==2.0-1.47.2-3+b11 stgit==0.19-2 strace==6.13+ds-1 -sudo==1.9.16p2-3 +sudo==1.9.16p2-3+deb13u2 swig==4.3.0-1 -systemd==257.9-1~deb13u1 -systemd-cryptsetup==257.9-1~deb13u1 -systemd-sysv==257.9-1~deb13u1 -systemd-timesyncd==257.9-1~deb13u1 +systemd==257.13-1~deb13u1 +systemd-cryptsetup==257.13-1~deb13u1 +systemd-dev==257.13-1~deb13u1 +systemd-sysv==257.13-1~deb13u1 +systemd-timesyncd==257.13-1~deb13u1 systemtap-sdt-dev==5.1-5 t1utils==1.41-4 tcl==8.6.16 @@ -2162,7 +2192,7 @@ tcl-expect==5.45.4-4 tcl8.6==8.6.16+dfsg-1 tcpdump==4.99.5-2 teckit==2.5.12+ds1-1+b1 -telnet==0.17+2.6-3 +telnet==0.17+2.6-3+deb13u3 tex-common==6.19 tex-gyre==20180621-6 texi2html==1.82+dfsg1-7 @@ -2187,12 +2217,11 @@ tk==8.6.16 tk8.6==8.6.16-1 tk8.6-blt2.5==2.5.3+dfsg-8 ucf==3.0052 -udev==257.9-1~deb13u1 +udev==257.13-1~deb13u1 unicode-data==15.1.0-1 unzip==6.0-29 usb.ids==2025.07.26-1 usbutils==1:018-2 -util-linux==2.41-5 uuid-dev==2.41-5 va-driver-all==2.22.0-3 valgrind==1:3.24.0-3 @@ -2225,10 +2254,10 @@ xml-core==0.19 xmlstarlet==1.6.1-4 xorg-sgml-doctools==1:1.11-1.1 xorriso==1.5.6-1.2+b1 -xserver-common==2:21.1.16-1.3+deb13u1 -xsltproc==1.1.35-1.2+deb13u2 +xserver-common==2:21.1.16-1.3+deb13u2 +xsltproc==1.1.35-1.2+deb13u3 xtrans-dev==1.4.0-1 -xvfb==2:21.1.16-1.3+deb13u1 +xvfb==2:21.1.16-1.3+deb13u2 xxd==2:9.1.1230-2 xz-utils==5.8.1-1 zip==3.0-15 diff --git a/files/build/versions-public/dockers/sonic-slave-trixie/versions-deb-trixie-arm64 b/files/build/versions-public/dockers/sonic-slave-trixie/versions-deb-trixie-arm64 index c8fc41e92d6..b3570106059 100644 --- a/files/build/versions-public/dockers/sonic-slave-trixie/versions-deb-trixie-arm64 +++ b/files/build/versions-public/dockers/sonic-slave-trixie/versions-deb-trixie-arm64 @@ -1,77 +1,23 @@ -base-files==13.8+deb13u2 -bash==5.2.37-2+b5 bc==1.07.1-4+b1 binfmt-support==2.2.2-7+b1 -binutils-aarch64-linux-gnu==2.44-3 -binutils-arm-linux-gnueabihf==2.44-3 -binutils-gold==2.44-2 -binutils-gold-aarch64-linux-gnu==2.44-2 -coreutils==9.7-3 cowbuilder==0.90+b1 cowdancer==0.90+b1 -cpp-14-aarch64-linux-gnu==14.2.0-19 -cpp-14-arm-linux-gnueabihf==14.2.0-19cross1 -cpp-aarch64-linux-gnu==4:14.2.0-1 -cpp-arm-linux-gnueabihf==4:14.2.0-1 -debianutils==5.23.2 dh-exec==0.30+b1 -diffutils==1:3.10-4 efibootmgr==18-2+b1 fastjar==2:0.98-7+b1 -g++-14-aarch64-linux-gnu==14.2.0-19 -g++-aarch64-linux-gnu==4:14.2.0-1 gawk==1:5.2.1-2+b2 -gcc-14-aarch64-linux-gnu==14.2.0-19 -gcc-14-arm-linux-gnueabihf==14.2.0-19cross1 -gcc-14-arm-linux-gnueabihf-base==14.2.0-19cross1 -gcc-14-cross-base==14.2.0-19cross1 -gcc-aarch64-linux-gnu==4:14.2.0-1 -gcc-arm-linux-gnueabihf==4:14.2.0-1 -grub-common==2.12-9 -grub-efi-arm64-bin==2.12-9 -grub-efi-arm64-signed==1+2.12+9 -grub-efi-arm64-unsigned==2.12-9 -grub2-common==2.12-9 +gdisk==1.0.10-2+b1 help2man==1.49.3+b1 -init-system-helpers==1.69~deb13u1 libann0==1.1.2+doc-9+b2 -libasan8-armhf-cross==14.2.0-19cross1 -libatomic1-armhf-cross==14.2.0-19cross1 -libc6-armhf-cross==2.41-11cross1 -libdebconfclient0==0.280 -libdrm-etnaviv1==2.4.124-2 -libdrm-freedreno1==2.4.124-2 -libdrm-tegra0==2.4.124-2 -libgcc-14-dev-armhf-cross==14.2.0-19cross1 -libgcc-s1-armhf-cross==14.2.0-19cross1 -libgomp1-armhf-cross==14.2.0-19cross1 libjudy-dev==1.0.5-5.1+b1 libjudydebian1==1.0.5-5.1+b1 -libnode115==20.19.2+dfsg-1 -libstdc++6-armhf-cross==14.2.0-19cross1 -libubsan1-armhf-cross==14.2.0-19cross1 libunicode-map-perl==0.112-13+b4 -libxslt1-dev==1.1.35-1.2+deb13u2 -login.defs==1:4.17.4-2 logrotate==3.22.0-1+b2 luit==2.0.20240910-1+b1 lynx==2.9.2-1+b1 lzop==1.04-2+b1 man2html-base==1.6g-16+b2 -mokutil==0.7.2-1 ninja-build==1.12.1-1+b1 -node-acorn==8.8.1+ds+~cs25.17.7-2 -node-balanced-match==2.0.0-1 -node-brace-expansion==2.0.1+~1.1.0-2 -node-cjs-module-lexer==1.2.3+dfsg-1 -node-corepack==0.24.0-5 -node-minimatch==9.0.3-6 -node-undici==7.3.0+dfsg1+~cs24.12.11-1 -node-xtend==4.0.2-3 -nodejs==20.19.2+dfsg-1 -nodejs-doc==20.19.2+dfsg-1 -os-prober==1.83 -passwd==1:4.17.4-2 patchutils==0.4.2-1+b1 pbzip2==1.1.13-1+b1 pigz==2.8-1+b1 @@ -82,14 +28,8 @@ python3-systemd==235-1+b7 python3-zopfli==0.2.3.post1-1 qtchooser==66-2+b1 rpcsvc-proto==1.4.3-1+b1 -shim-helpers-arm64-signed==1+15.8+1 -shim-signed==1.47+15.8-1 -shim-signed-common==1.47+15.8-1 -shim-unsigned==15.8-1 squashfs-tools==1:4.6.1-1+b1 -sqv==1.3.0-3 t1utils==1.41-4+b1 time==1.9-0.2+b1 -tzdata==2025b-4+deb13u1 xdelta3==3.0.11-dfsg-1.2+b1 xmlstarlet==1.6.1-4+b1 diff --git a/files/build/versions-public/dockers/sonic-slave-trixie/versions-deb-trixie-armhf b/files/build/versions-public/dockers/sonic-slave-trixie/versions-deb-trixie-armhf index cfe41221ec0..dac018ff1a5 100644 --- a/files/build/versions-public/dockers/sonic-slave-trixie/versions-deb-trixie-armhf +++ b/files/build/versions-public/dockers/sonic-slave-trixie/versions-deb-trixie-armhf @@ -1,45 +1,16 @@ -base-files==13.8+deb13u2 -bash==5.2.37-2+b5 -binutils-arm-linux-gnueabihf==2.44-3 -coreutils==9.7-3 cpp-14-arm-linux-gnueabihf==14.2.0-19 -cpp-arm-linux-gnueabihf==4:14.2.0-1 dctrl-tools==2.24-3 -debianutils==5.23.2 -diffutils==1:3.10-4 dwz==0.15-1+b2 g++-14-arm-linux-gnueabihf==14.2.0-19 g++-arm-linux-gnueabihf==4:14.2.0-1 gawk==1:5.2.1-2+b2 gcc-14-arm-linux-gnueabihf==14.2.0-19 -gcc-arm-linux-gnueabihf==4:14.2.0-1 -init-system-helpers==1.69~deb13u1 -libdebconfclient0==0.280 -libdrm-etnaviv1==2.4.124-2 libdrm-exynos1==2.4.124-2 -libdrm-freedreno1==2.4.124-2 libdrm-omap1==2.4.124-2 -libdrm-tegra0==2.4.124-2 libfcgi-perl==0.82+ds-3+b1 liblist-moreutils-xs-perl==0.430-4+b1 libmpich12==4.3.0+really4.2.1-1 libnanomsg-dev==1.1.5+dfsg-1.1 libnanomsg5==1.1.5+dfsg-1.1 -libnode115==20.19.2+dfsg-1 libsereal-decoder-perl==5.004+ds-1+b4 -libxslt1-dev==1.1.35-1.2+deb13u2 -login.defs==1:4.17.4-2 -node-acorn==8.8.1+ds+~cs25.17.7-2 -node-balanced-match==2.0.0-1 -node-brace-expansion==2.0.1+~1.1.0-2 -node-cjs-module-lexer==1.2.3+dfsg-1 -node-corepack==0.24.0-5 -node-minimatch==9.0.3-6 -node-undici==7.3.0+dfsg1+~cs24.12.11-1 -node-xtend==4.0.2-3 -nodejs==20.19.2+dfsg-1 -nodejs-doc==20.19.2+dfsg-1 -passwd==1:4.17.4-2 python3-zopfli==0.2.3.post1-1 -sqv==1.3.0-3 -tzdata==2025b-4+deb13u1 diff --git a/files/build/versions-public/dockers/sonic-slave-trixie/versions-py3 b/files/build/versions-public/dockers/sonic-slave-trixie/versions-py3 index bd3aee98af6..467d3cfd70c 100644 --- a/files/build/versions-public/dockers/sonic-slave-trixie/versions-py3 +++ b/files/build/versions-public/dockers/sonic-slave-trixie/versions-py3 @@ -7,7 +7,6 @@ automat==25.4.16 babel==2.17.0 bcrypt==4.2.0 beautifulsoup4==4.13.4 -bitarray==3.8.0 blessed==1.21.0 blkinfo==0.2.0 bottleneck==1.4.2 @@ -17,6 +16,7 @@ certifi==2025.1.31 cffi==1.17.1 chardet==5.2.0 charset-normalizer==3.4.2 +clang==19.1.7 clevercsv==0.8.3 click==8.1.8 colorlog==6.9.0 @@ -28,6 +28,7 @@ cryptography==43.0.0 cssselect==1.3.0 ct3==3.4.0 ctypesgen==1.0.2 +ctypeslib2==2.4.0 cycler==0.12.1 cython==3.0.11 dacite==1.9.2 @@ -44,7 +45,7 @@ executing==2.2.0 fastentrypoints==0.12 fonttools==4.57.0 fs==2.4.16 -fsspec==2025.12.0 +fsspec==2026.6.0 gbp==0.9.38 gcovr==7.2 gpg==1.24.2 @@ -56,6 +57,7 @@ idna==3.10 imagesize==1.4.1 incremental==24.7.2 inflect==7.3.1 +inflection==0.3.1 iniconfig==1.1.1 invoke==2.2.0 ipython==8.35.0 @@ -113,7 +115,7 @@ ply==3.11 pooch==1.8.2 prefixed==0.7.0 prompt_toolkit==3.0.51 -protobuf==5.29.5 +protobuf==5.29.6 psutil==7.0.0 psutils==3.3.8 ptyprocess==0.7.0 @@ -121,13 +123,13 @@ pure_eval==0.2.3 puremagic==1.28 py-cpuinfo==9.0.0 pyang==2.4.0 -pyangbind==0.8.2 +pyangbind==0.8.7 pyasn1==0.6.1 pyasn1_modules==0.4.1 pycparser==2.22 pycryptodomex==3.20.0 pyelftools==0.32 -pyfakefs==5.10.2 +pyfakefs==6.2.0 pygments==2.18.0 pygobject==3.50.0 pyhamcrest==2.1.0 @@ -151,7 +153,7 @@ pytz==2025.2 pyxdg==0.28 pyyaml==6.0.2 pyyaml-include==2.2 -redis==7.1.0 +redis==8.0.0 regex==2024.11.6 requests==2.32.3 roman==5.0 @@ -162,6 +164,7 @@ scp==0.15.0 service-identity==24.2.0 setuptools==75.8.0 setuptools-scm==8.2.1 +setuptools-scm-git-archive==1.4.1 six==1.17.0 snowballstemmer==2.2.0 soupsieve==2.7 diff --git a/files/build/versions-public/dockers/sonic-slave-trixie/versions-py3-all-arm64 b/files/build/versions-public/dockers/sonic-slave-trixie/versions-py3-all-arm64 index c13f21131d8..a8a39f1399b 100644 --- a/files/build/versions-public/dockers/sonic-slave-trixie/versions-py3-all-arm64 +++ b/files/build/versions-public/dockers/sonic-slave-trixie/versions-py3-all-arm64 @@ -1 +1 @@ -psutil==7.1.3 +psutil==7.2.2 diff --git a/files/build/versions-public/dockers/sonic-slave-trixie/versions-py3-all-armhf b/files/build/versions-public/dockers/sonic-slave-trixie/versions-py3-all-armhf index c13f21131d8..a8a39f1399b 100644 --- a/files/build/versions-public/dockers/sonic-slave-trixie/versions-py3-all-armhf +++ b/files/build/versions-public/dockers/sonic-slave-trixie/versions-py3-all-armhf @@ -1 +1 @@ -psutil==7.1.3 +psutil==7.2.2 diff --git a/files/build/versions-public/host-base-image/versions-deb-trixie b/files/build/versions-public/host-base-image/versions-deb-trixie index 32c00b954d1..a4cfc3772dd 100644 --- a/files/build/versions-public/host-base-image/versions-deb-trixie +++ b/files/build/versions-public/host-base-image/versions-deb-trixie @@ -1,7 +1,7 @@ apt==3.0.3 -base-files==13.8+deb13u2 +base-files==13.8+deb13u5 base-passwd==3.6.7 -bash==5.2.37-2+b5 +bash==5.2.37-2+b9 bsdutils==1:2.41-5 coreutils==9.7-3 dash==0.5.12-12 @@ -9,7 +9,7 @@ debconf==1.5.91 debian-archive-keyring==2025.1 debianutils==5.23.2 diffutils==1:3.10-4 -dpkg==1.22.21 +dpkg==1.22.22 findutils==4.10.0-3 gcc-14-base==14.2.0-19 grep==3.11-4 @@ -24,10 +24,10 @@ libaudit1==1:4.0.2-2+b2 libblkid1==2.41-5 libbsd0==0.12.2-2 libbz2-1.0==1.0.8-6 -libc-bin==2.41-12 -libc6==2.41-12 +libc-bin==2.41-12+deb13u3 +libc6==2.41-12+deb13u3 libcap-ng0==0.8.5-4+b1 -libcap2==1:2.75-10+b1 +libcap2==1:2.75-10+deb13u1+b1 libcrypt1==1:4.4.38-1 libdb5.3t64==5.3.28+dfsg2-9 libdebconfclient0==0.280 @@ -51,12 +51,12 @@ libsemanage-common==3.8.1-1 libsemanage2==3.8.1-1 libsepol2==3.8.1-1 libsmartcols1==2.41-5 -libsqlite3-0==3.46.1-7 -libssl3t64==3.5.4-1~deb13u1 +libsqlite3-0==3.46.1-7+deb13u1 +libssl3t64==3.5.6-1~deb13u1 libstdc++6==14.2.0-19 -libsystemd0==257.9-1~deb13u1 +libsystemd0==257.13-1~deb13u1 libtinfo6==6.5+20250216-2 -libudev1==257.9-1~deb13u1 +libudev1==257.13-1~deb13u1 libuuid1==2.41-5 libxxhash0==0.8.3-2 libzstd1==1.5.7+dfsg-1 @@ -66,13 +66,13 @@ mawk==1.3.4.20250131-1 mount==2.41-5 ncurses-base==6.5+20250216-2 ncurses-bin==6.5+20250216-2 -openssl-provider-legacy==3.5.4-1~deb13u1 +openssl-provider-legacy==3.5.6-1~deb13u1 passwd==1:4.17.4-2 perl-base==5.40.1-6 -sed==4.9-2 -sqv==1.3.0-3 +sed==4.9-2+deb13u1 +sqv==1.3.0-3+b2 sysvinit-utils==3.14-4 tar==1.35+dfsg-3.1 -tzdata==2025b-4+deb13u1 +tzdata==2026b-0+deb13u1 util-linux==2.41-5 zlib1g==1:1.3.dfsg+really1.3.1-1+b1 diff --git a/files/build/versions-public/host-base-image/versions-deb-trixie-arm64 b/files/build/versions-public/host-base-image/versions-deb-trixie-arm64 index b66d5a561e1..9f231492e45 100644 --- a/files/build/versions-public/host-base-image/versions-deb-trixie-arm64 +++ b/files/build/versions-public/host-base-image/versions-deb-trixie-arm64 @@ -1,2 +1 @@ grep==3.11-4+b1 -sed==4.9-2+b1 diff --git a/files/build/versions-public/host-image/versions-deb-trixie b/files/build/versions-public/host-image/versions-deb-trixie index e8a409ef227..0e45e474258 100644 --- a/files/build/versions-public/host-image/versions-deb-trixie +++ b/files/build/versions-public/host-image/versions-deb-trixie @@ -8,40 +8,45 @@ auditd==1:4.0.2-2+b2 bash==5.2.37-2 bash-completion==1:2.16.0-7 bash-tacplus==1.0.0 +bfscripts==4.14.0-13938 binutils==2.44-3 +binutils-aarch64-linux-gnu==2.44-3 binutils-common==2.44-3 binutils-x86-64-linux-gnu==2.44-3 +bluefield-platform-modules==2.0 bridge-utils==1.7.1-4+b1 bsdextrautils==2.41-5 bsdmainutils==12.1.8 -busybox==1:1.37.0-6+b3 +busybox==1:1.37.0-6+b8 ca-certificates==20250419 cgroup-tools==3.1.0-2+b2 -chrony==4.6.1-3 +chrony==4.6.1-3+deb13u1 conntrack==1:1.4.8-2 -containerd.io==1.7.27-1 +containerd.io==1.7.28-2~debian.13~trixie cpio==2.15+dfsg-2 cpp==4:14.2.0-1 cpp-14==14.2.0-19 +cpp-14-aarch64-linux-gnu==14.2.0-19 cpp-14-x86-64-linux-gnu==14.2.0-19 +cpp-aarch64-linux-gnu==4:14.2.0-1 cpp-x86-64-linux-gnu==4:14.2.0-1 cracklib-runtime==2.9.6-5.2+b1 cron==3.0pl1-197 cron-daemon-common==3.0pl1-197 -curl==8.14.1-2+deb13u2 +curl==8.14.1-2+deb13u3 dbus==1.16.2-2 dbus-bin==1.16.2-2 dbus-daemon==1.16.2-2 dbus-session-bus-common==1.16.2-2 dbus-system-bus-common==1.16.2-2 device-tree-compiler==1.7.2-2+b1 -distro-info-data==0.66+deb13u1 +distro-info-data==0.66+deb13u2 dmidecode==3.6-2 dmsetup==2:1.02.205-2 -docker-ce==5:28.2.2-1~debian.13~trixie -docker-ce-cli==5:28.2.2-1~debian.13~trixie -dpkg-dev==1.22.21 -e2fsprogs==1.47.2-3+b3 +docker-ce==5:28.5.2-1~debian.13~trixie +docker-ce-cli==5:28.5.2-1~debian.13~trixie +dpkg-dev==1.22.22 +e2fsprogs==1.47.2-3+b11 eatmydata==131-2 ebtables==2.0.11-6 efibootmgr==18-2 @@ -58,22 +63,25 @@ fontconfig-config==2.15.0-2.3 fonts-dejavu-core==2.37-8 fonts-dejavu-mono==2.37-8 freeipmi-common==1.6.15-1 +freeipmi-tools==1.6.15-1 gcc==4:14.2.0-1 gcc-14==14.2.0-19 +gcc-14-aarch64-linux-gnu==14.2.0-19 gcc-14-x86-64-linux-gnu==14.2.0-19 +gcc-aarch64-linux-gnu==4:14.2.0-1 gcc-x86-64-linux-gnu==4:14.2.0-1 gdisk==1.0.10-2 gettext-base==0.23.1-2 gir1.2-girepository-2.0==1.84.0-1 -gir1.2-glib-2.0==2.84.4-3~deb13u1 -gpg==2.4.7-21+b3 -gpgconf==2.4.7-21+b3 +gir1.2-glib-2.0==2.84.4-3~deb13u3 +gpg==2.4.7-21+deb13u1+b3 +gpgconf==2.4.7-21+deb13u1+b3 grub-common==2.06-13+deb13u1 grub2-common==2.06-13+deb13u1 -haveged==1.9.19-12 +haveged==1.9.19-12+deb13u1 hdparm==9.65+ds-1.1 hping3==3.a2.ds2-10.1 -hw-management==1.mlnx.7.0050.2002 +hw-management==1.mlnx.7.0060.1047 i2c-tools==4.4-2 ifmetric==0.3-5 ifupdown2==3.0.0-1 @@ -86,15 +94,15 @@ iptables-persistent==1.0.23 iputils-ping==3:20240905-3 isc-dhcp-client==4.4.3-P1-8 j2cli==0.3.12b-5 -jq==1.7.1-6+deb13u1 +jq==1.7.1-6+deb13u2 kdump-tools==1:1.10.7 -kernel-mft-dkms-modules-6.12.41+deb13-sonic-amd64==4.34.0 +kernel-mft-dkms-modules-6.12.41+deb13-sonic-amd64==4.36.0 +kernel-mft-dkms-modules-6.12.41+deb13-sonic-arm64==4.36.0 kexec-tools==1:2.0.29-2+b2 klibc-utils==2.0.14-1 kmod==34.2-2 ldap-utils==2.6.10+dfsg-1 less==668-1 -libabsl20240722==20240722.0-4 libapparmor1==4.1.0-1 libasan8==14.2.0-19 libassuan9==3.0.2-2 @@ -108,21 +116,23 @@ libbinutils==2.44-3 libboost-serialization1.83.0==1.83.0-4.2 libbpf1==1:1.5.0-3 libbrotli1==1.1.0-2+b7 -libc-l10n==2.41-12 -libcap2-bin==1:2.75-10+b1 -libcares2==1.34.5-1 +libc-dev-bin==2.41-12+deb13u3 +libc-l10n==2.41-12+deb13u3 +libc6-dev==2.41-12+deb13u3 +libcap2-bin==1:2.75-10+deb13u1+b1 libcbor0.10==0.10.2-2 libcc1-0==14.2.0-19 libcgroup3==3.1.0-2+b2 -libcom-err2==1.47.2-3+b3 +libcom-err2==1.47.2-3+b11 libcrack2==2.9.6-5.2+b1 libcrypt-dev==1:4.4.38-1 libctf-nobfd0==2.44-3 libctf0==2.44-3 -libcurl3t64-gnutls==8.14.1-2+deb13u2 -libcurl4t64==8.14.1-2+deb13u2 +libcurl3t64-gnutls==8.14.1-2+deb13u3 +libcurl4t64==8.14.1-2+deb13u3 +libdashapi==1.0.0 libdbd-sqlite3-perl==1.76-1 -libdbi-perl==1.647-1 +libdbi-perl==1.647-1+deb13u1 libdbus-1-3==1.16.2-2 libdebuginfod-common==0.192-4 libdebuginfod1t64==0.192-4 @@ -135,7 +145,7 @@ libefivar1t64==38-3.1+b1 libelf1t64==0.192-4 libestr0==0.1.11-2 libexpat1==2.7.1-2 -libext2fs2t64==1.47.2-3+b3 +libext2fs2t64==1.47.2-3+b11 libfastjson4==1.2304.0-2 libfdisk1==2.41-5 libfdt1==1.7.2-2+b1 @@ -143,23 +153,21 @@ libffi-dev==3.4.8-2 libffi8==3.4.8-2 libfido2-1==1.15.0-1+b1 libfreeipmi17==1.6.15-1 -libfreetype6==2.13.3+dfsg-1 +libfreetype6==2.13.3+dfsg-1+deb13u1 libfuse2t64==2.9.9-9 libgcc-14-dev==14.2.0-19 -libgcrypt20==1.11.0-7 +libgcrypt20==1.11.0-7+deb13u1 libgdbm-compat4t64==1.24-2 libgdbm6t64==1.24-2 libgirepository-1.0-1==1.84.0-1 -libglib2.0-0t64==2.84.4-3~deb13u1 -libgnutls30t64==3.8.9-3 +libglib2.0-0t64==2.84.4-3~deb13u3 +libgnutls30t64==3.8.9-3+deb13u4 libgomp1==14.2.0-19 libgpg-error0==1.51-4 libgpm2==1.20.7-11+b2 libgprofng0==2.44-3 -libgrpc++1.51t64==1.51.1-6 -libgrpc29t64==1.51.1-6 libgssapi-krb5-2==1.21.3-5+fips -libhavege2==1.9.19-12 +libhavege2==1.9.19-12+deb13u1 libhiredis1.1.0==1.2.0-6+b3 libhwasan0==14.2.0-19 libi2c0==4.4-2 @@ -169,10 +177,12 @@ libiio0==0.26-2 libiniparser4==4.2.6-1 libip4tc2==1.8.11-2 libip6tc2==1.8.11-2 +libipmiconsole2==1.6.15-1 +libipmidetect0==1.6.15-1 libisl23==0.27-1 libitm1==14.2.0-19 libjansson4==2.14-2+b3 -libjq1==1.7.1-6+deb13u1 +libjq1==1.7.1-6+deb13u2 libjs-jquery==3.6.1+dfsg+~3.5.14-1 libjs-sphinxdoc==8.1.3-5 libjs-underscore==1.13.4~dfsg+~1.11.4-3 @@ -200,11 +210,12 @@ libncursesw6==6.5+20250216-2 libnet1==1.3+dfsg-2 libnetfilter-conntrack3==1.1.0-1 libnfnetlink0==1.0.2-3 +libnftables1==1.1.3-1 libnftnl11==1.2.9-1 -libnghttp2-14==1.64.0-1.1 +libnghttp2-14==1.64.0-1.1+deb13u1 libnghttp3-9==1.8.0-1 -libngtcp2-16==1.11.0-1 -libngtcp2-crypto-gnutls8==1.11.0-1 +libngtcp2-16==1.11.0-1+deb13u1 +libngtcp2-crypto-gnutls8==1.11.0-1+deb13u1 libnl-3-200==3.7.0-0.2+b1sonic1 libnl-cli-3-200==3.7.0-0.2+b1sonic1 libnl-genl-3-200==3.7.0-0.2+b1sonic1 @@ -223,18 +234,16 @@ libp11-kit0==0.25.5-3 libpam-ldapd==0.9.13-1 libpam-pwquality==1.4.5-5 libpam-radius-auth==1.4.1-1 -libpam-systemd==257.9-1~deb13u1 +libpam-systemd==257.13-1~deb13u1 libpam-tacplus==1.4.1-1 libpcap0.8t64==1.10.5-2 libpci3==1:3.13.0-2 -libpcre3==2:8.39-15 libperl5.40==5.40.1-6 libpgm-5.3-0t64==5.3.128~dfsg-2.1+b1 -libpng16-16t64==1.6.48-1+deb13u1 +libpng16-16t64==1.6.48-1+deb13u5 libpopt0==1.19+dfsg-2 libproc2-0==2:4.0.4-9 libprotobuf32t64==3.21.12-11 -libprotoc32t64==3.21.12-11 libpsl5t64==0.21.2-1.1+b1 libpwquality-common==1.4.5-5 libpwquality1==1.4.5-5 @@ -243,8 +252,8 @@ libpython3.13==3.13.5-2+fips libpython3.13-minimal==3.13.5-2+fips libpython3.13-stdlib==3.13.5-2+fips libquadmath0==14.2.0-19 -libre2-11==20240702-3+b1 libreadline8t64==8.2-6 +librelp0==1.11.0-2 librtmp1==2.4+20151223.gitfa8646d.1-2+b5 libsasl2-2==2.1.28+dfsg1-9 libsasl2-modules-db==2.1.28+dfsg1-9 @@ -253,14 +262,14 @@ libsensors5==1:3.6.2-2 libserialport0==0.1.2-1 libsframe1==2.44-3 libslang2==2.3.3-5+b2 -libsodium23==1.0.18-1+b2 -libss2==1.47.2-3+b3 +libsodium23==1.0.18-1+deb13u1 +libss2==1.47.2-3+b11 libssh2-1t64==1.11.1-1 libssl-dev==3.5.4-1+fips libssl3t64==3.5.4-1+fips libswsscommon==1.0.0 libsysfs2==2.1.1-7 -libsystemd-shared==257.9-1~deb13u1 +libsystemd-shared==257.13-1~deb13u1 libtac2==1.4.1-1 libtasn1-6==4.20.0-2 libtcl8.6==8.6.16+dfsg-1 @@ -270,6 +279,18 @@ libtirpc-common==1.3.6+ds-1 libtirpc3t64==1.3.6+ds-1 libtraceevent1==1:1.8.4-2 libtsan2==14.2.0-19 +libtss2-esys-3.0.2-0t64==4.1.3-1.2 +libtss2-fapi1t64==4.1.3-1.2 +libtss2-mu-4.0.1-0t64==4.1.3-1.2 +libtss2-rc0t64==4.1.3-1.2 +libtss2-sys1t64==4.1.3-1.2 +libtss2-tcti-cmd0t64==4.1.3-1.2 +libtss2-tcti-device0t64==4.1.3-1.2 +libtss2-tcti-libtpms0t64==4.1.3-1.2 +libtss2-tcti-mssim0t64==4.1.3-1.2 +libtss2-tcti-spi-helper0t64==4.1.3-1.2 +libtss2-tcti-swtpm0t64==4.1.3-1.2 +libtss2-tctildr0t64==4.1.3-1.2 libubootenv-tool==0.3.5-0.1+b2 libubootenv0.1==0.3.5-0.1+b2 libubsan1==14.2.0-19 @@ -278,38 +299,47 @@ libunwind8==1.8.1-0.1 libusb-1.0-0==2:1.0.28-1 libwrap0==7.6.q-36 libwtmpdb0==0.73.0-3+deb13u1 -libxencall1==4.20.2+7-g1badcf5035-0+deb13u1 -libxendevicemodel1==4.20.2+7-g1badcf5035-0+deb13u1 -libxenevtchn1==4.20.2+7-g1badcf5035-0+deb13u1 -libxenforeignmemory1==4.20.2+7-g1badcf5035-0+deb13u1 -libxengnttab1==4.20.2+7-g1badcf5035-0+deb13u1 -libxenhypfs1==4.20.2+7-g1badcf5035-0+deb13u1 -libxenmisc4.20==4.20.2+7-g1badcf5035-0+deb13u1 -libxenstore4==4.20.2+7-g1badcf5035-0+deb13u1 -libxentoolcore1==4.20.2+7-g1badcf5035-0+deb13u1 -libxentoollog1==4.20.2+7-g1badcf5035-0+deb13u1 +libxencall1==4.20.2+37-g61ff35323e-0+deb13u1 +libxendevicemodel1==4.20.2+37-g61ff35323e-0+deb13u1 +libxenevtchn1==4.20.2+37-g61ff35323e-0+deb13u1 +libxenforeignmemory1==4.20.2+37-g61ff35323e-0+deb13u1 +libxengnttab1==4.20.2+37-g61ff35323e-0+deb13u1 +libxenhypfs1==4.20.2+37-g61ff35323e-0+deb13u1 +libxenmisc4.20==4.20.2+37-g61ff35323e-0+deb13u1 +libxenstore4==4.20.2+37-g61ff35323e-0+deb13u1 +libxentoolcore1==4.20.2+37-g61ff35323e-0+deb13u1 +libxentoollog1==4.20.2+37-g61ff35323e-0+deb13u1 libxml2==2.12.7+dfsg+really2.9.14-2.1+deb13u2 -libxslt1.1==1.1.35-1.2+deb13u2 +libxml2-dev==2.12.7+dfsg+really2.9.14-2.1+deb13u2 +libxslt1-dev==1.1.35-1.2+deb13u3 +libxslt1.1==1.1.35-1.2+deb13u3 libxtables12==1.8.11-2 libyajl2==2.1.0-5+b2 libyaml-0-2==0.2.5-2 -libyang==1.0.73 -libyang-cpp==1.0.73 +libyang3==3.12.2-1 libzmq5==4.3.5-1+b3 -linux-base==4.12 +linux-base==4.12.1 linux-image-6.12.41+deb13-sonic-amd64-unsigned==6.12.41-1 -linux-perf==6.12.57-1 -linux-sysctl-defaults==4.12 -locales==2.41-12 +linux-image-6.12.41+deb13-sonic-arm64-unsigned==6.12.41-1 +linux-libc-dev==6.12.90-2 +linux-perf==6.12.90-2 +linux-sysctl-defaults==4.12.1 +locales==2.41-12+deb13u3 logrotate==3.22.0-1 -logsave==1.47.2-3+b3 +logsave==1.47.2-3+b11 lsof==4.99.4+dfsg-2 -makedumpfile==1:1.7.6-1 +makedumpfile==1:1.7.7-1 media-types==13.0.0 -mft==4.34.0-145 +mft==4.36.0-147 mft-fwtrace-cfg==1.0.0 -mft-oem==4.34.0-145 +mft-oem==4.36.0-147 minicom==2.10-1 +mlnx-iproute2==2601.0.6-1 +mlnx-ofed-kernel-modules-6.12.41+deb13-sonic-arm64==26.01.OFED.26.01.1.0.0.1 +mlnx-ofed-kernel-utils==26.01.OFED.26.01.1.0.0.1-1 +mlnx-tools==2601.0.2-1 +mlxbf-bootctl==2.1 +mlxbf-bootimages==4.14.0-13938 mokutil==0.7.2-1 monit==1:5.34.3-1 mtd-utils==1:2.3.0-1 @@ -319,13 +349,14 @@ ndisc6==1.0.7-1 net-tools==2.10-1.3 netbase==6.5 netfilter-persistent==1.0.23 +nftables==1.1.3-1 nslcd==0.9.13-1 nvme-cli==2.13-2 -opennsl-modules==7.1.0.0 openssh-client==1:10.0p1-7+fips openssh-server==1:10.0p1-7+fips openssh-sftp-server==1:10.0p1-7+fips openssl==3.5.4-1+fips +openssl-provider-legacy==3.5.6-1~deb13u2 pci.ids==0.0~2025.06.09-1 pciutils==1:3.13.0-2 perl==5.40.1-6 @@ -348,16 +379,18 @@ python3-cffi-backend==1.17.1-3 python3-chardet==5.2.0+dfsg-2 python3-charset-normalizer==3.4.2-1 python3-click==8.2.0+0.really.8.1.8-1 -python3-cryptography==43.0.0-3 +python3-cryptography==43.0.0-3+deb13u1 python3-dbus==1.4.0-1 python3-enlighten==1.11.2-1 python3-gi==3.50.0-4+b1 python3-idna==3.10-1 +python3-ijson==3.4.0-1 python3-inflect==7.3.1-2 -python3-jaraco.context==6.0.1-1 +python3-jaraco.context==6.0.1-1+deb13u1 python3-jaraco.functools==4.1.0-1 python3-jaraco.text==4.0.0-1 python3-jinja2==3.1.6-1 +python3-libyang==3.1.0-1 python3-lxml==5.4.0-1 python3-m2crypto==0.42.0-3 python3-markupsafe==2.1.5-1+b3 @@ -372,35 +405,39 @@ python3-pip==25.1.1+dfsg-1 python3-pkg-resources==78.1.1-0.1 python3-ply==3.11-9 python3-prefixed==0.7.0-1 +python3-psutil==7.0.0-2 python3-pycparser==2.22-2 python3-regex==0.1.20241106-1+b1 -python3-requests==2.32.3+dfsg-5 +python3-requests==2.32.3+dfsg-5+deb13u1 python3-scapy==2.6.1+dfsg-1 python3-scp==0.15.0-1 python3-setuptools==78.1.1-0.1 python3-swsscommon==1.0.0 python3-typeguard==4.4.2-1 python3-typing-extensions==4.13.2-1 -python3-urllib3==2.3.0-3 +python3-urllib3==2.3.0-3+deb13u1 python3-watchdog==6.0.0-1 python3-wcwidth==0.2.13+dfsg1-1 python3-wheel==0.46.1-2 python3-yaml==6.0.2-1+b2 -python3-yang==1.0.73 python3-zipp==3.21.0-1 python3.13==3.13.5-2+fips python3.13-minimal==3.13.5-2+fips rasdaemon==0.6.8-1 readline-common==8.2-6 resolvconf==1.94 -rshim==2.5.7 +rpcsvc-proto==1.4.3-1+b1 +rshim==2.6.6 rsyslog==8.2504.0-1 +rsyslog-relp==8.2504.0-1 runit-helper==2.16.4 sbsigntool==0.9.4-3.2 screen==4.9.1-3 +sedutil==1.15-5ad84d8 sensible-utils==0.0.25 sgml-base==1.31+nmu1 smartmontools==7.4-3 +socat==1.7.4.1-3 sonic-ctrmgrd-rs==1.0.0 sonic-db-cli==1.0.0 sonic-device-data==1.0-1 @@ -410,35 +447,40 @@ sonic-nettools==0.0.1-0 sonic-platform-pddf==1.1 sonic-rsyslog-plugin==1.0.0-0 sonic-utilities-data==1.0-1 -sqlite3==3.46.1-7 +sqlite3==3.46.1-7+deb13u1 squashfs-tools==1:4.6.1-1 ssh==1:10.0p1-7+fips -sudo==1.9.16p2-3 -sx-kernel==1.mlnx.4.8.2096 -symcrypt-openssl==0.1 +sudo==1.9.16p2-3+deb13u2 +sx-kernel==1.mlnx.4.8.4068 +symcrypt-openssl==1.9.4 sysfsutils==2.1.1-7 syslog-counter==1.0.0 sysstat==12.7.5-2 -systemd==257.9-1~deb13u1 +systemd==257.13-1~deb13u1 systemd-bootchart==235-2 systemd-sonic-generator==1.0.0 -systemd-sysv==257.9-1~deb13u1 +systemd-sysv==257.13-1~deb13u1 tcpdump==4.99.5-2 tcptraceroute==1.5beta7+debian-4.2 +tpm-udev==0.6+nmu1 +tpm2-tools==5.7-1 traceroute==1:2.1.6-1 +tzdata-legacy==2026b-0+deb13u1 u-boot-tools==2025.01-3 ucf==3.0052 -udev==257.9-1~deb13u1 +udev==257.13-1~deb13u1 unzip==6.0-29 usbutils==1:018-2 +util-linux-extra==2.41-5 uuid-runtime==2.41-5 vim==2:9.1.1230-2 vim-common==2:9.1.1230-2 vim-runtime==2:9.1.1230-2 -wireless-regdb==2025.07.10-1 +wireless-regdb==2026.02.04-1~deb13u1 x11-common==1:7.7+24+deb13u1 xml-core==0.19 -xmlstarlet==1.6.1-4 +xmlstarlet==1.6.1-4+b1 xxd==2:9.1.1230-2 xz-utils==5.8.1-1 +zlib1g-dev==1:1.3.dfsg+really1.3.1-1+b1 zstd==1.5.7+dfsg-1 diff --git a/files/build/versions-public/host-image/versions-deb-trixie-arm64 b/files/build/versions-public/host-image/versions-deb-trixie-arm64 index 0bc1b204ac2..06bdbc7943d 100644 --- a/files/build/versions-public/host-image/versions-deb-trixie-arm64 +++ b/files/build/versions-public/host-image/versions-deb-trixie-arm64 @@ -1,27 +1,15 @@ arping==2.25-1+b1 -binutils-aarch64-linux-gnu==2.44-3 bridge-utils==1.7.1-4 conntrack==1:1.4.8-2+b1 -cpp-14-aarch64-linux-gnu==14.2.0-19 -cpp-aarch64-linux-gnu==4:14.2.0-1 ebtables==2.0.11-6+b2 efibootmgr==18-2+b1 -gcc-14-aarch64-linux-gnu==14.2.0-19 -gcc-aarch64-linux-gnu==4:14.2.0-1 gdisk==1.0.10-2+b1 -grub-common==2.12-9 -grub2-common==2.12-9 +grub-common==2.12-9+deb13u2 +grub2-common==2.12-9+deb13u2 ifmetric==0.3-5+b1 kexec-tools==1:2.0.29-2+b1 -libc-dev-bin==2.41-12 -libc6-dev==2.41-12 libfuse3-4==3.17.2-3 -libxml2-dev==2.12.7+dfsg+really2.9.14-2.1+deb13u2 -libxslt1-dev==1.1.35-1.2+deb13u2 -linux-image-6.12.41+deb13-sonic-arm64-unsigned==6.12.41-1 -linux-libc-dev==6.12.57-1 logrotate==3.22.0-1+b2 -makedumpfile==1:1.7.6-1+b1 mrvlprestera==1.0 mtr-tiny==0.95-1.1+b2 ncal==12.1.8+b1 @@ -29,8 +17,7 @@ ndisc6==1.0.7-1+b1 picocom==3.1-4+b1 pigz==2.8-1+b1 python3-markupsafe==2.1.5-1+b4 -rpcsvc-proto==1.4.3-1+b1 squashfs-tools==1:4.6.1-1+b1 sysstat==12.7.5-2+b2 systemd-bootchart==235-2+b1 -zlib1g-dev==1:1.3.dfsg+really1.3.1-1+b1 +tpm2-tools==5.7-1+b1 diff --git a/files/build/versions-public/host-image/versions-deb-trixie-armhf b/files/build/versions-public/host-image/versions-deb-trixie-armhf index f9b067a61b3..2f522669b0a 100644 --- a/files/build/versions-public/host-image/versions-deb-trixie-armhf +++ b/files/build/versions-public/host-image/versions-deb-trixie-armhf @@ -4,16 +4,10 @@ cpp-14-arm-linux-gnueabihf==14.2.0-19 cpp-arm-linux-gnueabihf==4:14.2.0-1 gcc-14-arm-linux-gnueabihf==14.2.0-19 gcc-arm-linux-gnueabihf==4:14.2.0-1 -grub-common==2.12-9 -grub2-common==2.12-9 +grub-common==2.12-9+deb13u2 +grub2-common==2.12-9+deb13u2 kexec-tools==1:2.0.29-2 -libc-dev-bin==2.41-12 -libc6-dev==2.41-12 libfuse3-4==3.17.2-3 -libxml2-dev==2.12.7+dfsg+really2.9.14-2.1+deb13u2 -libxslt1-dev==1.1.35-1.2+deb13u2 linux-image-6.12.41+deb13-sonic-armmp==6.12.41-1 -linux-libc-dev==6.12.57-1 mrvlprestera==1.0 rpcsvc-proto==1.4.3-1 -zlib1g-dev==1:1.3.dfsg+really1.3.1-1+b1 diff --git a/files/build/versions-public/host-image/versions-py3 b/files/build/versions-public/host-image/versions-py3 index cc295a0ffa6..17230f1ce1e 100644 --- a/files/build/versions-public/host-image/versions-py3 +++ b/files/build/versions-public/host-image/versions-py3 @@ -6,11 +6,11 @@ bcrypt==4.2.0 bitarray==2.8.1 blessed==1.21.0 blkinfo==0.2.0 -build==1.3.0 -certifi==2025.11.12 +build==1.5.0 +certifi==2026.6.17 cffi==1.17.1 chardet==5.2.0 -charset-normalizer==3.4.4 +charset-normalizer==3.4.7 click==8.1.8 click-log==0.4.0 colorful==0.5.8 @@ -19,11 +19,11 @@ dbus-python==1.4.0 docker==7.1.0 docker-image-py==0.1.13 enlighten==1.11.2 -filelock==3.20.0 +filelock==3.29.4 grpcio==1.66.2 grpcio-tools==1.66.2 -idna==3.11 -ijson==3.2.3 +idna==3.18 +ijson==3.4.0 inflect==7.3.1 inotify==0.2.12 ipaddr==2.2.0 @@ -35,9 +35,10 @@ jaraco.text==4.0.0 jinja2==3.1.6 jsondiff==2.2.1 jsonpatch==1.33 -jsonpointer==3.0.0 +jsonpointer==3.1.1 jsonschema==2.6.0 lazy-object-proxy==1.12.0 +libyang==3.1.0 lxml==5.4.0 m2crypto==0.42.0 markupsafe==2.1.5 @@ -54,39 +55,39 @@ pip==25.1.1 ply==3.11 prefixed==0.7.0 prettyprinter==0.18.0 -protobuf==5.29.5 -psutil==7.1.3 +protobuf==5.29.6 +psutil==7.2.2 ptyprocess==0.7.0 pyang==2.7.1 -pyangbind==0.8.2 +pyangbind==0.8.7 pycairo==1.26.1 pycparser==2.22 -pygments==2.19.2 +pygments==2.20.0 pygobject==3.50.0 pynacl==1.5.0 pyproject_hooks==1.2.0 -pyroute2==0.9.5 +pyroute2==0.9.6 python-apt==3.0.0 python-dateutil==2.9.0.post0 pyyaml==6.0.2 redis==3.5.3 regex==2024.11.6 -requests==2.32.5 +requests==2.34.2 scapy==2.6.1 scp==0.14.5 semantic-version==2.10.0 setuptools==78.1.1 six==1.17.0 -smbus2==0.5.0 +smbus2==0.6.1 systemd-python==235 tabulate==0.9.0 -telnetlib3==2.0.8 +telnetlib3==4.0.5 toposort==1.6 typeguard==4.4.2 typing_extensions==4.13.2 -urllib3==2.6.2 +urllib3==2.7.0 watchdog==6.0.0 -wcwidth==0.2.13 +wcwidth==0.8.1 wheel==0.46.1 www-authenticate==0.9.2 xmltodict==0.12.0 diff --git a/files/build/versions-public/host-image/versions-py3-all-armhf b/files/build/versions-public/host-image/versions-py3-all-armhf index 1e6b9feb738..0be2102a6b4 100644 --- a/files/build/versions-public/host-image/versions-py3-all-armhf +++ b/files/build/versions-public/host-image/versions-py3-all-armhf @@ -1 +1 @@ -protobuf==6.33.2 +protobuf==7.35.1 diff --git a/files/build_scripts/aspeed_bmc_filter_services.py b/files/build_scripts/aspeed_bmc_filter_services.py new file mode 100644 index 00000000000..b15cb5bf932 --- /dev/null +++ b/files/build_scripts/aspeed_bmc_filter_services.py @@ -0,0 +1,277 @@ +#!/usr/bin/env python3 +""" +Filter systemd services for Aspeed BMC platform. + +This script removes services that are not needed on BMC platform +and ensures BMC-specific services are included. +""" + +import sys +import os +import glob + +# Services to REMOVE for BMC platform (not needed) +BMC_EXCLUDED_SERVICES = { + # Backend ACL - not needed on BMC + 'backend-acl.service', + + # PCIe - not needed on BMC + 'pcie-check.service', + + # Smart switch / midplane - not needed on BMC + 'midplane-network-npu.service', + 'midplane-network-dpu.service', + + # Virtual switch specific + 'topology.service', + + # NOS-specific services not needed for BMC + 'copp-config.service', # Control Plane Policing - no ASIC on BMC + 'dhcp_dos_logger.service', # DHCP DoS detection - no switch ports on BMC + 'warmboot-finalizer.service', # Warm boot reconciliation - no SWSS/BGP on BMC + + # ZTP - not needed for BMC + 'ztp.service', + + # UUID daemon - not needed + 'uuidd.service', # UUID daemon - kernel provides UUID generation + 'uuidd.socket', # UUID daemon socket activation + + # Console - not needed if no local display + 'getty@tty1.service', # Local console - only if VGA/HDMI available + +} + +# Services to ENSURE are included for BMC +BMC_REQUIRED_SERVICES = { + # AAA/TACACS - needed on BMC + 'tacacs-config.service', + 'tacacs-config.timer', + + # Feature management (required to start services based on CONFIG_DB) + 'featured.service', # SONiC feature management daemon + 'featured.timer', # Timer for featured service + + # Security and monitoring (important for BMC) + 'caclmgrd.service', # Firewall for management interfaces + 'haveged.service', # Entropy for SSH/SSL/TLS + 'monit.service', # Auto-restart failed services + 'procdockerstatsd.service', # Container resource monitoring + + # Time synchronization + 'chrony.service', # Chrony time synchronization + + # System health monitoring + 'system-health.service', # SONiC system health monitor + + # Platform monitoring + 'pmon.service', # Platform monitor container (sensors, fans, PSU, etc.) + + # Telemetry and monitoring + 'gnmi.service', # gNMI telemetry service + + 'hostcfgd.service', # SONiC host config daemon + 'hostcfgd.timer', # Timer for hostcfgd service + 'auditd.service', # Security audit - only needed for compliance + 'sysmgr.service', # SONiC system manager +} + +def create_service_override(filesystem_root, service_name, override_content, enable=True): + """Create systemd drop-in override for a service on BMC.""" + + systemd_system = os.path.join(filesystem_root, 'etc/systemd/system') + override_dir = os.path.join(systemd_system, f'{service_name}.d') + override_file = os.path.join(override_dir, 'bmc-override.conf') + + # Create override directory + os.makedirs(override_dir, exist_ok=True) + + try: + with open(override_file, 'w') as f: + f.write(override_content) + print(f" Created: {override_file}") + + # Create symlink in multi-user.target.wants to enable auto-start if requested + if enable: + multi_user_wants = os.path.join(systemd_system, 'multi-user.target.wants') + os.makedirs(multi_user_wants, exist_ok=True) + + service_symlink = os.path.join(multi_user_wants, service_name) + service_path = f'/usr/lib/systemd/system/{service_name}' + + # Remove existing symlink if present + if os.path.islink(service_symlink) or os.path.exists(service_symlink): + os.remove(service_symlink) + + # Create symlink to enable service + os.symlink(service_path, service_symlink) + print(f" Enabled: {service_name} -> multi-user.target.wants") + + return True + except Exception as e: + print(f" Warning: Could not create {service_name} override: {e}") + return False + +def create_gnmi_bmc_override(filesystem_root): + """Create systemd drop-in override for GNMI to remove swss/syncd dependencies on BMC.""" + + print("") + print("Creating GNMI service override for BMC (removing swss/syncd dependencies)...") + + override_content = """[Unit] +# BMC override: Remove ASIC/switch dependencies (swss, syncd) +# GNMI on BMC only needs database service +After=database.service +""" + + return create_service_override(filesystem_root, 'gnmi.service', override_content, enable=False) + +def create_watchdog_control_bmc_override(filesystem_root): + """Create systemd drop-in override for watchdog-control to remove swss dependency on BMC.""" + + print("") + print("Creating watchdog-control service override for BMC (removing swss dependency)...") + + override_content = """[Unit] +# BMC override: Remove ASIC/switch dependency (swss) +# Watchdog control on BMC doesn't need swss +After= +""" + + return create_service_override(filesystem_root, 'watchdog-control.service', override_content, enable=False) + +def create_determine_reboot_cause_bmc_override(filesystem_root): + """Create systemd drop-in override for determine-reboot-cause to remove rc-local dependency on BMC.""" + + print("") + print("Creating determine-reboot-cause service override for BMC (removing rc-local dependency)...") + + override_content = """[Unit] +# BMC override: Remove rc-local dependency +# Reboot cause determination on BMC doesn't need rc-local +Requires= +After= +""" + + return create_service_override(filesystem_root, 'determine-reboot-cause.service', override_content, enable=False) + +def create_sysmgr_bmc_override(filesystem_root): + """Create systemd drop-in override for sysmgr to remove swss dependency on BMC.""" + override_content = """[Unit] +# BMC override: Remove ASIC/switch dependency (swss) +# Sysmgr on BMC doesn't need swss +After=database.service +""" + return create_service_override(filesystem_root, 'sysmgr.service', override_content, enable=False) + +def create_telemetry_bmc_override(filesystem_root): + """Create systemd drop-in override for telemetry to remove swss/syncd dependencies on BMC.""" + override_content = """[Unit] +# BMC override: Remove ASIC/switch dependencies (swss, syncd) +# Telemetry on BMC doesn't need swss or syncd +After=database.service +""" + return create_service_override(filesystem_root, 'telemetry.service', override_content, enable=False) + +def mask_services_in_filesystem(filesystem_root): + """Mask excluded services by removing symlinks and creating mask files.""" + + print("") + print("Masking excluded services in filesystem...") + + systemd_system = os.path.join(filesystem_root, 'etc/systemd/system') + + masked_count = 0 + for service in BMC_EXCLUDED_SERVICES: + # Remove symlinks from target.wants directories + for wants_dir in glob.glob(os.path.join(systemd_system, '*.wants')): + symlink = os.path.join(wants_dir, service) + if os.path.islink(symlink) or os.path.exists(symlink): + try: + os.remove(symlink) + print(f" Removed: {symlink}") + masked_count += 1 + except Exception as e: + print(f" Warning: Could not remove {symlink}: {e}") + + # Create mask file (symlink to /dev/null) + mask_file = os.path.join(systemd_system, service) + if not os.path.exists(mask_file): + try: + os.symlink('/dev/null', mask_file) + print(f" Masked: {service}") + masked_count += 1 + except Exception as e: + print(f" Warning: Could not mask {service}: {e}") + + print(f"Total masked/disabled: {masked_count} service links") + return masked_count + +def filter_services(input_file, output_file, filesystem_root=None): + """Filter services for BMC platform.""" + + # Read existing services + try: + with open(input_file, 'r') as f: + services = set(line.strip() for line in f if line.strip() and not line.startswith('#')) + except FileNotFoundError: + services = set() + + # Remove excluded services + filtered_services = services - BMC_EXCLUDED_SERVICES + + # Add required BMC services + filtered_services.update(BMC_REQUIRED_SERVICES) + + # Sort for consistent output + sorted_services = sorted(filtered_services) + + # Write filtered services (NO COMMENTS - systemd-sonic-generator can't handle them) + with open(output_file, 'w') as f: + for service in sorted_services: + f.write(service + '\n') + + # Mask services in filesystem if root provided + if filesystem_root: + mask_services_in_filesystem(filesystem_root) + # Create service overrides to remove dependencies that don't exist on BMC + create_gnmi_bmc_override(filesystem_root) + create_watchdog_control_bmc_override(filesystem_root) + create_determine_reboot_cause_bmc_override(filesystem_root) + create_sysmgr_bmc_override(filesystem_root) + create_telemetry_bmc_override(filesystem_root) + + # Print summary to build log (not to file) + print("=" * 80) + print("Aspeed BMC Service Filtering Summary") + print("=" * 80) + print(f"Original services: {len(services)}") + print(f"Filtered services: {len(filtered_services)}") + print(f"") + print(f"Services REMOVED for BMC:") + removed = BMC_EXCLUDED_SERVICES & services + if removed: + for svc in sorted(removed): + print(f" - {svc}") + else: + print(f" (none)") + print(f"") + print(f"Services ADDED for BMC:") + added = BMC_REQUIRED_SERVICES - services + if added: + for svc in sorted(added): + print(f" + {svc}") + else: + print(f" (none)") + print(f"") + print(f"Excluded services list: {', '.join(sorted(BMC_EXCLUDED_SERVICES))}") + print("=" * 80) + +if __name__ == '__main__': + if len(sys.argv) < 3: + print("Usage: aspeed_bmc_filter_services.py [filesystem_root]") + sys.exit(1) + + filesystem_root = sys.argv[3] if len(sys.argv) > 3 else None + filter_services(sys.argv[1], sys.argv[2], filesystem_root) + diff --git a/files/build_templates/buffers_config.j2 b/files/build_templates/buffers_config.j2 index 25f4fda4fe7..bc26df2e751 100644 --- a/files/build_templates/buffers_config.j2 +++ b/files/build_templates/buffers_config.j2 @@ -9,21 +9,18 @@ def {# Determine device topology and filename postfix #} {%- if DEVICE_METADATA is defined and DEVICE_METADATA['localhost']['type'] is defined %} {%- set switch_role = DEVICE_METADATA['localhost']['type'] %} -{% if DEVICE_METADATA['localhost']['subtype'] is defined %} -{%- set switch_subrole = DEVICE_METADATA['localhost']['subtype'] %} -{%- else %} -{%- set switch_subrole = '' %} -{%- endif %} {%- if 'torrouter' in switch_role.lower() and 'mgmt' not in switch_role.lower()%} {%- set filename_postfix = 't0' %} {%- elif 'leafrouter' in switch_role.lower() and 'mgmt' not in switch_role.lower()%} {%- set filename_postfix = 't1' %} {%- elif 'lowerspinerouter' in switch_role.lower() and 'mgmt' not in switch_role.lower()%} {%- set filename_postfix = 'lt2' %} +{%- elif 'fabricregionalhub' == switch_role.lower() %} +{%- set filename_postfix = 'lt2' %} +{%- elif 'upperregionalhub' == switch_role.lower() or 'lowerregionalhub' == switch_role.lower() %} +{%- set filename_postfix = 't2' %} {%- elif 'spinerouter' in switch_role.lower() and 'mgmt' not in switch_role.lower()%} - {%- if 'lowerspinerouter' == switch_subrole.lower() %} - {%- set filename_postfix = 'lt2' %} - {%- elif 'fabricspinerouter' == switch_role.lower() %} + {%- if 'fabricspinerouter' == switch_role.lower() %} {%- set filename_postfix = 'ft2' %} {%- else %} {%- set filename_postfix = 't2' %} @@ -34,7 +31,6 @@ def {%- else %} {%- set filename_postfix = set_default_topology() %} {%- set switch_role = '' %} -{%- set switch_subrole = '' %} {%- endif -%} {% set voq_chassis = false %} @@ -64,6 +60,11 @@ def 'spinerouter_leafrouter' : '300m', 'lowerspinerouter_leafrouter' : '500m', 'fabricspinerouter_lowerspinerouter' : '5m', + 'fabricregionalhub_lowerregionalhub' : '5m', + 'lowerregionalhub_upperregionalhub' : '50m', + 'lowerregionalhub_upperspinerouter' : '120000m', + 'lowerregionalhub_spinerouter' : '120000m', + 'upperregionalhub_regionalwanaggregator' : '50m', 'regionalhub_upperspinerouter': '80000m', 'regionalhub_spinerouter': '80000m', 'aznghub_upperspinerouter' : '80000m', diff --git a/files/build_templates/config-setup.service.j2 b/files/build_templates/config-setup.service.j2 index 02f941d7e48..83895d8aff1 100644 --- a/files/build_templates/config-setup.service.j2 +++ b/files/build_templates/config-setup.service.j2 @@ -7,6 +7,7 @@ Requires=config-topology.service Requires=database.service {% if sonic_asic_platform == 'mellanox' -%} Requires=hw-management.service +After=hw-management.service {% endif -%} diff --git a/files/build_templates/constants.yml.j2 b/files/build_templates/constants.yml.j2 new file mode 100644 index 00000000000..4b2608d88db --- /dev/null +++ b/files/build_templates/constants.yml.j2 @@ -0,0 +1,80 @@ +constants: + deployment_id_asn_map: + "1" : 65432 + "2" : 65433 + bgp: + traffic_shift_community: 12345:12345 + internal_community: 11111:11111 + internal_fallback_community: 22222:22222 + sentinel_community: 12345:12346 + internal_community_match_tag: 201 + local_anchor_route_community: 12345:555 + anchor_route_community: 12345:666 + anchor_contributing_route_community: 12345:777 + route_do_not_send_appdb_tag: 202 + route_eligible_for_fallback_to_default_tag: 203 + hide_internal_community: 55555:55555 + families: + - ipv4 + - ipv6 + use_deployment_id: false + use_neighbors_meta: false + graceful_restart: + enabled: true + restart_time: 240 + multipath_relax: + enabled: true + maximum_paths: + enabled: true + ipv4: 514 + ipv6: 514 + allow_list: + enabled: true + default_action: "permit" # or "deny" + drop_community: 5060:12345 # value of the community to identify a prefix to drop. Make sense only with allow_list_default_action equal to 'permit' + default_pl_rules: + v4: + - "deny 0.0.0.0/0 le 17" + - "permit 127.0.0.1/32" + v6: + - "deny 0::/0 le 59" + - "deny 0::/0 ge 65" + bbr: + enabled: true + default_state: "disabled" + peers: + general: # peer_type + db_table: "BGP_NEIGHBOR" + template_dir: "general" + bbr: + PEER_V4: + - ipv4 + PEER_V6: + - ipv6 + internal: # peer_type + db_table: "BGP_INTERNAL_NEIGHBOR" + template_dir: "internal" + monitors: # peer_type + enabled: true + db_table: "BGP_MONITORS" + peer_group: "BGPMON" + template_dir: "monitors" + dynamic: # peer_type + enabled: true + db_table: "BGP_PEER_RANGE" + peer_group: "BGP_SPEAKER" + template_dir: "dynamic" + voq_chassis: # peer_type + enabled: true + db_table: "BGP_VOQ_CHASSIS_NEIGHBOR" + template_dir: "voq_chassis" + sentinels: # peer_type + enabled: true + db_table: "BGP_SENTINELS" + template_dir: "sentinels" + prefix_list: + SUPPRESS_PREFIX: + ipv4_name: "SUPPRESS_IPV4_PREFIX" + ipv6_name: "SUPPRESS_IPV6_PREFIX" + frr: + enable_snmp_agent: {{ 'true' if ENABLE_FRR_SNMP_AGENT == 'y' else 'false' }} diff --git a/files/build_templates/docker_image_ctl.j2 b/files/build_templates/docker_image_ctl.j2 index 57a76842c15..499419388a1 100644 --- a/files/build_templates/docker_image_ctl.j2 +++ b/files/build_templates/docker_image_ctl.j2 @@ -29,7 +29,7 @@ link_namespace() { {%- if docker_container_name == "pmon" %} get_pmon_device_mounts() { - local devregex='i2c-[0-9]+|ipmi[0-9]+|sd[a-z]+|mmcblk[0-9].*|nvme[0-9].*|uio.*|watchdog[0-9]*' + local devregex='i2c-[0-9]+|cpld[0-9]|fpga[0-9]|ipmi[0-9]+|sd[a-z]+|mmcblk[0-9].*|nvme[0-9].*|uio.*|watchdog[0-9]*' local devpathregex="$(echo "$devregex" | sed -E 's#(^|\|)#\1/dev/#g')" for device in $(find /dev/ -maxdepth 1 | grep -E "$devpathregex"); do if [ ! -L "$device" ] && [ -b "$device" -o -c "$device" ]; then @@ -102,10 +102,10 @@ function getBootType() function preStartAction() { {%- if docker_container_name == "database" %} - WARM_DIR=/host/warmboot + WARM_DIR=/host/warmboot$DEV if [ "$DATABASE_TYPE" != "chassisdb" ]; then if [[ ("$BOOT_TYPE" == "warm" || "$BOOT_TYPE" == "fastfast" || "$BOOT_TYPE" == "express" || "$BOOT_TYPE" == "fast") && -f $WARM_DIR/dump.rdb ]]; then - # Load redis content from /host/warmboot/dump.rdb + # Load redis content from /host/warmboot$DEV/dump.rdb docker cp $WARM_DIR/dump.rdb database$DEV:/var/lib/redis/dump.rdb else # Create an emtpy file and overwrite any RDB if already there @@ -131,6 +131,12 @@ function preStartAction() echo "Cannot fetch system eeprom information. Setting chassis serial number to N/A." $SONIC_DB_CLI STATE_DB HSET 'DEVICE_METADATA|localhost' chassis_serial_number "N/A" fi +{%- elif docker_container_name == "dhcp_server" %} + # dhcp_server is the only bridge-mode container. caclmgrd's catch-all DROP + # on the INPUT chain blocks its syslog (UDP 514) to host rsyslog. + # Restrict to docker0 interface to minimize security impact. + iptables -C INPUT -i docker0 -p udp --dport 514 -j ACCEPT -m comment --comment "dhcp_server_syslog" 2>/dev/null || \ + iptables -I INPUT -i docker0 -p udp --dport 514 -j ACCEPT -m comment --comment "dhcp_server_syslog" {%- else %} : # nothing {%- endif %} @@ -188,8 +194,9 @@ function postStartAction() midplane_ip="" CHASSISDB_CONF="/usr/share/sonic/device/$PLATFORM/chassisdb.conf" if [[ -f $CHASSISDB_CONF && $DATABASE_TYPE != "dpudb" ]]; then - slot_id=$(python3 -c 'import sonic_platform.platform; platform_chassis = sonic_platform.platform.Platform().get_chassis(); print(platform_chassis.get_my_slot())' 2>/dev/null) - supervisor_slot_id=$(python3 -c 'import sonic_platform.platform; platform_chassis = sonic_platform.platform.Platform().get_chassis(); print(platform_chassis.get_supervisor_slot())' 2>/dev/null) + slot_id=$(python3 -c 'import sonic_platform.platform; platform_chassis = sonic_platform.platform.Platform().get_chassis(); print(platform_chassis.get_my_slot())') + supervisor_slot_id=$(python3 -c 'import sonic_platform.platform; platform_chassis = sonic_platform.platform.Platform().get_chassis(); print(platform_chassis.get_supervisor_slot())') + echo "${DOCKERNAME} slot_id=${slot_id} supervisor_slot_id=${supervisor_slot_id}" fi [ -f $CHASSISDB_CONF ] && source $CHASSISDB_CONF if [[ "$DEV" && $DATABASE_TYPE != "dpudb" ]]; then @@ -304,24 +311,30 @@ function postStartAction() fi fi - if [ -e /tmp/pending_config_migration ] || [ -e /tmp/pending_config_initialization ]; then - # this is first boot to a new image, config-setup execution is pending. - # for warmboot case, DB is loaded but migration is still pending - # For firstbboot/fast/cold reboot case, DB contains nothing at this point - # unset CONFIG_DB_INITIALIZED to indicate pending config load and migration - # This flag will be set to "1" after DB migration/initialization is completed as part of config-setup - $SONIC_DB_CLI CONFIG_DB SET "CONFIG_DB_INITIALIZED" "0" - else - $SONIC_DB_CLI CONFIG_DB SET "CONFIG_DB_INITIALIZED" "0" - # this is not a first time boot to a new image. Datbase container starts w/ old pre-existing config - if [[ -x /usr/local/bin/db_migrator.py ]]; then - # Migrate the DB to the latest schema version if needed - if [ -z "$DEV" ]; then - /usr/local/bin/db_migrator.py -o migrate + # DPU database instances must not touch the host CONFIG_DB_INITIALIZED flag. + # Only the main NPU database instance should manage this key to avoid a race + # where DPU instances overwrite CONFIG_DB_INITIALIZED back to 0 after + # config-setup has already set it to 1, causing swss startup to fail. + if [[ "$DATABASE_TYPE" != "dpudb" ]]; then + if [ -e /etc/sonic/pending_config_migration ] || [ -e /etc/sonic/pending_config_initialization ]; then + # this is first boot to a new image, config-setup execution is pending. + # for warmboot case, DB is loaded but migration is still pending + # For first boot/fast/cold reboot case, DB contains nothing at this point + # unset CONFIG_DB_INITIALIZED to indicate pending config load and migration + # This flag will be set to "1" after DB migration/initialization is completed as part of config-setup + $SONIC_DB_CLI CONFIG_DB SET "CONFIG_DB_INITIALIZED" "0" + else + $SONIC_DB_CLI CONFIG_DB SET "CONFIG_DB_INITIALIZED" "0" + # this is not a first time boot to a new image. Database container starts w/ old pre-existing config + if [[ -x /usr/local/bin/db_migrator.py ]]; then + # Migrate the DB to the latest schema version if needed + if [ -z "$DEV" ]; then + /usr/local/bin/db_migrator.py -o migrate + fi fi + # set CONFIG_DB_INITIALIZED to indicate end of config load and migration + $SONIC_DB_CLI CONFIG_DB SET "CONFIG_DB_INITIALIZED" "1" fi - # set CONFIG_DB_INITIALIZED to indicate end of config load and migration - $SONIC_DB_CLI CONFIG_DB SET "CONFIG_DB_INITIALIZED" "1" fi # In SUP, enforce CHASSIS_APP_DB.tsa_enabled to be in sync with BGP_DEVICE_GLOBAL.STATE.tsa_enabled @@ -430,7 +443,6 @@ start() { source $PLATFORM_ENV_CONF fi - {%- if sonic_asic_platform == "broadcom" %} {%- if docker_container_name == "syncd" %} # Set the SYNCD_SHM_SIZE if this variable not defined @@ -479,21 +491,47 @@ start() { if [ "$DEV" ]; then MOUNTPATH="$MOUNTPATH/$DEV" fi + HWSKU_MOUNT_MODE="ro" + {%- if docker_container_name == "swss" %} + if [ -f "$MOUNTPATH/hwsku-init" ]; then + HWSKU_MOUNT_MODE="rw" + fi + {%- endif %} {%- endif %} {%- if docker_container_name == "swss" %} # Insert "create_only_config_db_buffers" attribute + CREATE_ONLY_CONFIG_DB_BUFFERS_JSON_FOUND=false + + PLATFORM_FOLDER="/usr/share/sonic/device/$PLATFORM" + if [ -d "$PLATFORM_FOLDER" ]; then + if [ -f "$PLATFORM_FOLDER/create_only_config_db_buffers.json" ]; then + CREATE_ONLY_CONFIG_DB_BUFFERS_JSON_FOUND=true + fi + fi + HWSKU_FOLDER="/usr/share/sonic/device/$PLATFORM/$HWSKU" if [ -d "$HWSKU_FOLDER" ]; then - CREATE_ONLY_CONFIG_DB_BUFFERS_JSON="$HWSKU_FOLDER/create_only_config_db_buffers.json" - if [ -f "$CREATE_ONLY_CONFIG_DB_BUFFERS_JSON" ]; then - $SONIC_DB_CLI CONFIG_DB HSET 'DEVICE_METADATA|localhost' create_only_config_db_buffers true + if [ -f "$HWSKU_FOLDER/create_only_config_db_buffers.json" ]; then + CREATE_ONLY_CONFIG_DB_BUFFERS_JSON_FOUND=true + elif [ -n "$DEV" ]; then + # Multi-ASIC: check per-ASIC directory, then common/ + if [ -f "$HWSKU_FOLDER/$DEV/create_only_config_db_buffers.json" ]; then + CREATE_ONLY_CONFIG_DB_BUFFERS_JSON_FOUND=true + elif [ -f "$HWSKU_FOLDER/common/create_only_config_db_buffers.json" ]; then + CREATE_ONLY_CONFIG_DB_BUFFERS_JSON_FOUND=true + fi fi + SUPPORTING_BULK_COUNTER_GROUPS="$HWSKU_FOLDER/supporting_bulk_counter_groups" if [ -f "$SUPPORTING_BULK_COUNTER_GROUPS" ]; then $SONIC_DB_CLI CONFIG_DB HSET 'DEVICE_METADATA|localhost' supporting_bulk_counter_groups@ $(cat $SUPPORTING_BULK_COUNTER_GROUPS) fi fi + + if [ "$CREATE_ONLY_CONFIG_DB_BUFFERS_JSON_FOUND" = true ]; then + $SONIC_DB_CLI CONFIG_DB HSET 'DEVICE_METADATA|localhost' create_only_config_db_buffers true + fi {%- endif %} DOCKERCHECK=`docker inspect --type container ${DOCKERNAME} 2>/dev/null` @@ -600,13 +638,17 @@ start() { fi {%- elif docker_container_name == "dash-ha" %} REDIS_MNT="-v /var/run/redis:/var/run/redis:rw" - REDIS_MNT=$REDIS_MNT" -v /var/run/redis$DEV:/var/run/redis$DEV:rw " {%- else %} REDIS_MNT="-v /var/run/redis$DEV:/var/run/redis:rw" {%- endif %} - if [[ -z "$DEV" || $DATABASE_TYPE == "dpudb" ]]; then + if [[ -z "$DEV" || $DATABASE_TYPE == "dpudb" || "$DEV" == *"dpu"* ]]; then +{%- if docker_container_name == "redfish" %} + # redfish uses bridge networking with port mapping (-p 443:18080) + NET="bridge" +{%- else %} NET="host" +{%- endif %} # For Multi-ASIC platform we have to mount the redis paths for database instances running in different # namespaces, into the single instance dockers like snmp, pmon on linux host. These global dockers @@ -616,7 +658,9 @@ start() { # The below logic extracts the base DIR's where database_config.json's for various namespaces exist. # redis_dir_list is a string of form "/var/run/redis0/ /var/run/redis1/ /var/run/redis2/" - {%- if docker_container_name != "database" %} + {%- if docker_container_name == "dash-ha" %} + REDIS_MNT=$REDIS_MNT" -v /var/run/redis$DEV:/var/run/redis$DEV:rw " + {%- elif docker_container_name != "database" %} if [ -n "$redis_dir_list" ]; then for redis_dir in $redis_dir_list @@ -676,6 +720,7 @@ start() { {%- if docker_container_name == "syncd" %} if [[ $DEV != "" ]]; then mkdir -p /dev/shm/asic$DEV + mkdir -p /var/log/sdk_dbg/$DEV ASIC_MNT="-v /dev/sxdevs/sxcdev$(($DEV+1)):/dev/sxdevs/sxcdev:rw \ -v /dev/sxdevs/bfdcdev$(($DEV+1)):/dev/sxdevs/bfdcdev:rw \ -v /dev/shm/asic$DEV:/dev/shm/:rw" @@ -692,6 +737,7 @@ start() { {%- endif %} {%- endif %} docker create {{docker_image_run_opt}} \ + -v /host/warmboot$DEV:/var/warmboot \ {%- if docker_container_name != "dhcp_server" %} --net=$NET \ {%- endif %} @@ -707,7 +753,7 @@ start() { {%- if sonic_asic_platform == "mellanox" %} {%- if docker_container_name == "syncd" %} -v /var/log/mellanox:/var/log/mellanox:rw \ - -v /var/log/sdk_dbg:/var/log/sdk_dbg:rw \ + -v /var/log/sdk_dbg/$DEV:/var/log/sdk_dbg:rw \ -v mlnx_sdk_socket$DEV:/var/run/sx_sdk \ -v /tmp/nv-syncd-shared/$DEV:/tmp \ -v /var/log/sai_failure_dump:/var/log/sai_failure_dump:rw \ @@ -743,6 +789,7 @@ start() { {%- endif %} {%- if docker_container_name == "pmon" %} -v /usr/share/sonic/firmware:/usr/share/sonic/firmware:rw \ + $(if [ -d /host/bmc ]; then echo "-v /host/bmc:/host/bmc:rw"; fi) \ $(get_pmon_device_mounts) \ {%- endif %} {%- if docker_container_name == "swss" %} @@ -754,11 +801,14 @@ start() { {%- if docker_container_name == "bgp" %} -v /etc/sonic/frr/$DEV:/etc/frr:rw \ {%- endif %} +{%- if docker_container_name == "dash-ha" %} + -v /var/log/dash-ha:/var/log/dash-ha:rw \ +{%- endif %} {%- if docker_container_name == "database" %} $DB_OPT \ {%- else %} -v /var/run/redis-chassis:/var/run/redis-chassis:ro \ - -v /usr/share/sonic/device/$PLATFORM/$HWSKU/$DEV:/usr/share/sonic/hwsku:ro \ + -v /usr/share/sonic/device/$PLATFORM/$HWSKU/$DEV:/usr/share/sonic/hwsku:$HWSKU_MOUNT_MODE \ {%- endif %} $REDIS_MNT \ -v /etc/fips/fips_enable:/etc/fips/fips_enable:ro \ @@ -768,6 +818,12 @@ start() { -v /usr/share/sonic/device/$PLATFORM:/usr/share/sonic/platform:ro \ {%- endif %} -v /usr/share/sonic/templates/rsyslog-container.conf.j2:/usr/share/sonic/templates/rsyslog-container.conf.j2:ro \ +{%- if sonic_asic_platform == "aspeed" %} +{%- if docker_container_name == "pmon" %} + $(if [ -d /var/run/hw-management ]; then echo "-v /var/run/hw-management:/var/run/hw-management:rw"; fi) \ + $(if [ -f /usr/bin/hw-management-bmc-powerctrl.sh ]; then echo "-v /usr/bin/hw-management-bmc-powerctrl.sh:/usr/bin/hw-management-bmc-powerctrl.sh:ro"; fi) \ +{%- endif %} +{%- endif %} {%- if sonic_asic_platform != "mellanox" %} {%- if mount_default_tmpfs|default("n") == "y" %} --tmpfs /tmp \ @@ -827,7 +883,9 @@ stop() { if [ -z "$container_id" ]; then echo "container stop $DOCKERNAME - No such container: $DOCKERNAME" else - {%- if docker_container_name == "teamd" %} + {%- if stop_time is defined and stop_time != '' %} + /usr/local/bin/container stop -t {{ stop_time }} $DOCKERNAME + {%- elif docker_container_name == "teamd" %} # Longer timeout of 60 sec to wait for Portchannels to be cleaned. /usr/local/bin/container stop -t 60 $DOCKERNAME {%- elif docker_container_name in ["swss", "syncd"] and enable_asan == "y" %} @@ -836,6 +894,10 @@ stop() { /usr/local/bin/container stop $DOCKERNAME {%- endif %} fi +{%- if docker_container_name == "dhcp_server" %} + # Remove syslog iptables exception added during start + iptables -D INPUT -i docker0 -p udp --dport 514 -j ACCEPT -m comment --comment "dhcp_server_syslog" 2>/dev/null || true +{%- endif %} {%- endif %} } diff --git a/files/build_templates/init_cfg.json.j2 b/files/build_templates/init_cfg.json.j2 index 1ce495c388a..f8788df9eac 100644 --- a/files/build_templates/init_cfg.json.j2 +++ b/files/build_templates/init_cfg.json.j2 @@ -29,6 +29,9 @@ "PORT": { "FLEX_COUNTER_STATUS": "enable" }, + "PORT_PHY_ATTR": { + "FLEX_COUNTER_STATUS": "enable" + }, "RIF": { "FLEX_COUNTER_STATUS": "enable" }, @@ -53,6 +56,20 @@ "PORT_BUFFER_DROP": { "FLEX_COUNTER_STATUS": "enable" } +{%- if sonic_asic_platform in ["nvidia-bluefield", "pensando"] %}, + "ENI": { + "FLEX_COUNTER_STATUS": "enable", + "POLL_INTERVAL": "10000" + }, + "DASH_METER": { + "FLEX_COUNTER_STATUS": "enable", + "POLL_INTERVAL": "10000" + }, + "HA_SET": { + "FLEX_COUNTER_STATUS": "enable", + "POLL_INTERVAL": "10000" + } +{%- endif %} }, "BGP_DEVICE_GLOBAL": { "STATE": { @@ -63,12 +80,12 @@ }, {%- set features = [("bgp", "{% if not DEVICE_RUNTIME_METADATA['ETHERNET_PORTS_PRESENT'] or ('CHASSIS_METADATA' in DEVICE_RUNTIME_METADATA and DEVICE_RUNTIME_METADATA['CHASSIS_METADATA']['module_type'] in ['supervisor']) %}disabled{% else %}enabled{% endif %}", false, "enabled"), ("database", "always_enabled", false, "always_enabled"), - ("lldp", "enabled", true, "enabled"), ("pmon", "enabled", "{% if 'type' in DEVICE_METADATA['localhost'] and DEVICE_METADATA['localhost']['type'] == 'SpineRouter' %}False{% else %}True{% endif %}", "enabled"), - ("snmp", "enabled", true, "enabled"), ("swss", "enabled", false, "enabled"), ("syncd", "enabled", false, "enabled")] %} {%- if include_router_advertiser == "y" %}{% do features.append(("radv", "enabled", false, "enabled")) %}{% endif %} +{%- if include_lldp == "y" %}{% do features.append(("lldp", "enabled", true, "enabled")) %}{% endif %} +{%- if include_snmp == "y" %}{% do features.append(("snmp", "enabled", true, "enabled")) %}{% endif %} {%- if include_teamd == "y" %}{% do features.append(("teamd", "{% if not DEVICE_RUNTIME_METADATA['ETHERNET_PORTS_PRESENT'] %}disabled{% else %}enabled{% endif %}", false, "enabled")) %}{% endif %} {% do features.append(("dhcp_relay", "{% if not (DEVICE_METADATA is defined and DEVICE_METADATA['localhost'] is defined and DEVICE_METADATA['localhost']['type'] is defined and DEVICE_METADATA['localhost']['type'] is not in ['ToRRouter', 'EPMS', 'MgmtTsToR', 'MgmtToRRouter', 'BmcMgmtToRRouter']) %}enabled{% else %}disabled{% endif %}", false, "enabled")) %} {%- if include_dhcp_server == "y" %}{% do features.append(("dhcp_server", "disabled", false, "enabled")) %}{% endif %} @@ -84,7 +101,7 @@ {% do features.append(("restapi", "enabled", false, "enabled")) %} {%- endif %} {%- if include_sflow == "y" %}{% do features.append(("sflow", "disabled", true, "enabled")) %}{% endif %} -{%- if include_macsec == "y" %}{% do features.append(("macsec", "{% if 'type' in DEVICE_METADATA['localhost'] and DEVICE_METADATA['localhost']['type'] in ['SpineRouter', 'UpperSpineRouter'] and DEVICE_RUNTIME_METADATA['MACSEC_SUPPORTED'] %}enabled{% else %}disabled{% endif %}", false, "enabled")) %}{% endif %} +{%- if include_macsec == "y" %}{% do features.append(("macsec", "{% if 'type' in DEVICE_METADATA['localhost'] and DEVICE_METADATA['localhost']['type'] in ['SpineRouter', 'UpperSpineRouter', 'LowerRegionalHub'] and DEVICE_RUNTIME_METADATA['MACSEC_SUPPORTED'] %}enabled{% else %}disabled{% endif %}", false, "enabled")) %}{% endif %} {%- if include_system_gnmi == "y" %}{% do features.append(("gnmi", "enabled", true, "enabled")) %}{% endif %} {%- if include_system_telemetry == "y" %}{% do features.append(("telemetry", "enabled", true, "enabled")) %}{% endif %} {%- if include_system_otel == "y" %}{% do features.append(("otel", "disabled", false, "enabled")) %}{% endif %} diff --git a/files/build_templates/per_namespace/bgp.service.j2 b/files/build_templates/per_namespace/bgp.service.j2 index 2b8497265bc..bd8aa799244 100644 --- a/files/build_templates/per_namespace/bgp.service.j2 +++ b/files/build_templates/per_namespace/bgp.service.j2 @@ -1,12 +1,13 @@ +{% set use_instance_deps = (multi_instance == 'true' and not (is_smartswitch | default(false))) %} [Unit] Description=BGP container -Requires=database{% if multi_instance == 'true' %}@%i{% endif %}.service -After=database{% if multi_instance == 'true' %}@%i{% endif %}.service +Requires=database{% if use_instance_deps %}@%i{% endif %}.service +After=database{% if use_instance_deps %}@%i{% endif %}.service Requires=config-setup.service After=config-setup.service BindsTo=sonic.target After=sonic.target -After=swss{% if multi_instance == 'true' %}@%i{% endif %}.service +After=swss{% if use_instance_deps %}@%i{% endif %}.service After=interfaces-config.service StartLimitIntervalSec=1200 StartLimitBurst=3 diff --git a/files/build_templates/per_namespace/bmp.service.j2 b/files/build_templates/per_namespace/bmp.service.j2 index f493deb8d8f..4ea7133c81f 100644 --- a/files/build_templates/per_namespace/bmp.service.j2 +++ b/files/build_templates/per_namespace/bmp.service.j2 @@ -1,7 +1,8 @@ +{% set use_instance_deps = (multi_instance == 'true' and not (is_smartswitch | default(false))) %} [Unit] Description=BMP container -Requires=database{% if multi_instance == 'true' %}@%i{% endif %}.service -After=database{% if multi_instance == 'true' %}@%i{% endif %}.service +Requires=database{% if use_instance_deps %}@%i{% endif %}.service +After=database{% if use_instance_deps %}@%i{% endif %}.service Before=ntp-config.service BindsTo=sonic.target After=sonic.target diff --git a/files/build_templates/per_namespace/dash-ha.service.j2 b/files/build_templates/per_namespace/dash-ha.service.j2 index f14e8e1eb06..d47540dde41 100644 --- a/files/build_templates/per_namespace/dash-ha.service.j2 +++ b/files/build_templates/per_namespace/dash-ha.service.j2 @@ -10,7 +10,7 @@ StartLimitBurst=3 [Service] User={{ sonicadmin_user }} -ExecCondition=/bin/bash /usr/local/bin/is-npu-or-dpu.sh +ExecCondition=/bin/bash /usr/local/bin/is-npu-or-dpu.sh -n ExecStartPre=/usr/local/bin/{{docker_container_name}}.sh start{% if multi_instance == 'true' %} %i{% endif %} ExecStart=/usr/local/bin/{{docker_container_name}}.sh wait{% if multi_instance == 'true' %} %i{% endif %} ExecStop=/usr/local/bin/{{docker_container_name}}.sh stop{% if multi_instance == 'true' %} %i{% endif %} diff --git a/files/build_templates/per_namespace/gbsyncd.service.j2 b/files/build_templates/per_namespace/gbsyncd.service.j2 index 876161c65df..ac695a6c7bc 100644 --- a/files/build_templates/per_namespace/gbsyncd.service.j2 +++ b/files/build_templates/per_namespace/gbsyncd.service.j2 @@ -1,10 +1,11 @@ +{% set use_instance_deps = (multi_instance == 'true' and not (is_smartswitch | default(false))) %} [Unit] Description={{docker_container_name}} service -Requires=database{% if multi_instance == 'true' %}@%i{% endif %}.service config-setup.service +Requires=database{% if use_instance_deps %}@%i{% endif %}.service config-setup.service ConditionPathExists=!/usr/share/sonic/hwsku/gearbox_config.json -After=database{% if multi_instance == 'true' %}@%i{% endif %}.service config-setup.service +After=database{% if use_instance_deps %}@%i{% endif %}.service config-setup.service After=interfaces-config.service -After=swss{% if multi_instance == 'true' %}@%i{% endif %}.service +After=swss{% if use_instance_deps %}@%i{% endif %}.service BindsTo=sonic.target After=sonic.target diff --git a/files/build_templates/per_namespace/lldp.service.j2 b/files/build_templates/per_namespace/lldp.service.j2 index ac8f4ae7661..9ec365cfa16 100644 --- a/files/build_templates/per_namespace/lldp.service.j2 +++ b/files/build_templates/per_namespace/lldp.service.j2 @@ -1,9 +1,10 @@ +{% set use_instance_deps = (multi_instance == 'true' and not (is_smartswitch | default(false))) %} [Unit] Description=LLDP container -Requires=database{% if multi_instance == 'true' %}@%i{% endif %}.service -After=database{% if multi_instance == 'true' %}@%i{% endif %}.service -After=swss{% if multi_instance == 'true' %}@%i{% endif %}.service -After=syncd{% if multi_instance == 'true' %}@%i{% endif %}.service +Requires=database{% if use_instance_deps %}@%i{% endif %}.service +After=database{% if use_instance_deps %}@%i{% endif %}.service +After=swss{% if use_instance_deps %}@%i{% endif %}.service +After=syncd{% if use_instance_deps %}@%i{% endif %}.service Requires=config-setup.service After=config-setup.service BindsTo=sonic.target diff --git a/files/build_templates/per_namespace/macsec.service.j2 b/files/build_templates/per_namespace/macsec.service.j2 index fc862241f33..f24f40b7081 100644 --- a/files/build_templates/per_namespace/macsec.service.j2 +++ b/files/build_templates/per_namespace/macsec.service.j2 @@ -1,8 +1,9 @@ +{% set use_instance_deps = (multi_instance == 'true' and not (is_smartswitch | default(false))) %} [Unit] Description=MACsec container -Requires=swss{% if multi_instance == 'true' %}@%i{% endif %}.service -After=swss{% if multi_instance == 'true' %}@%i{% endif %}.service -After=syncd{% if multi_instance == 'true' %}@%i{% endif %}.service +Requires=swss{% if use_instance_deps %}@%i{% endif %}.service +After=swss{% if use_instance_deps %}@%i{% endif %}.service +After=syncd{% if use_instance_deps %}@%i{% endif %}.service BindsTo=sonic.target After=sonic.target StartLimitIntervalSec=1200 diff --git a/files/build_templates/per_namespace/swss.service.j2 b/files/build_templates/per_namespace/swss.service.j2 index 9e07f78d79d..7e659995611 100644 --- a/files/build_templates/per_namespace/swss.service.j2 +++ b/files/build_templates/per_namespace/swss.service.j2 @@ -1,7 +1,8 @@ +{% set use_instance_deps = (multi_instance == 'true' and not (is_smartswitch | default(false))) %} [Unit] Description=switch state service -Requires=database{% if multi_instance == 'true' %}@%i{% endif %}.service -After=database{% if multi_instance == 'true' %}@%i{% endif %}.service +Requires=database{% if use_instance_deps %}@%i{% endif %}.service +After=database{% if use_instance_deps %}@%i{% endif %}.service {% if multi_instance == 'true' and sonic_asic_platform == 'vs' %} Requires=topology.service After=topology.service diff --git a/files/build_templates/per_namespace/syncd.service.j2 b/files/build_templates/per_namespace/syncd.service.j2 index 45bb08b6db5..16cfc4b2510 100644 --- a/files/build_templates/per_namespace/syncd.service.j2 +++ b/files/build_templates/per_namespace/syncd.service.j2 @@ -1,8 +1,9 @@ +{% set use_instance_deps = (multi_instance == 'true' and not (is_smartswitch | default(false))) %} [Unit] Description=syncd service -Requires=database{% if multi_instance == 'true' %}@%i{% endif %}.service -After=database{% if multi_instance == 'true' %}@%i{% endif %}.service -After=swss{% if multi_instance == 'true' %}@%i{% endif %}.service +Requires=database{% if use_instance_deps %}@%i{% endif %}.service +After=database{% if use_instance_deps %}@%i{% endif %}.service +After=swss{% if use_instance_deps %}@%i{% endif %}.service {% if multi_instance == 'true' and sonic_asic_platform == 'vs' %} Requires=topology.service After=topology.service diff --git a/files/build_templates/per_namespace/teamd.service.j2 b/files/build_templates/per_namespace/teamd.service.j2 index 2ec784a483f..85c326a7764 100644 --- a/files/build_templates/per_namespace/teamd.service.j2 +++ b/files/build_templates/per_namespace/teamd.service.j2 @@ -1,6 +1,7 @@ +{% set use_instance_deps = (multi_instance == 'true' and not (is_smartswitch | default(false))) %} [Unit] Description=TEAMD container -After=swss{% if multi_instance == 'true' %}@%i{% endif %}.service +After=swss{% if use_instance_deps %}@%i{% endif %}.service {% if multi_instance == 'true' and sonic_asic_platform == 'vs' %} Requires=topology.service After=topology.service diff --git a/files/build_templates/qos_config.j2 b/files/build_templates/qos_config.j2 index 385d0e89ae7..001aeacd1c4 100644 --- a/files/build_templates/qos_config.j2 +++ b/files/build_templates/qos_config.j2 @@ -7,6 +7,10 @@ {%- set PORT_DOWNLINK = [] %} {%- set PORT_SERVICE = [] %} +{%- set SYSTEM_PORT_ACTIVE = [] %} +{%- set hostname = "" %} +{%- set asicname = "" %} +{%- set voq_chassis = false %} {% if template_exists("buffers.json.j2") %} {% import "buffers.json.j2" as buffer_defs with context %} {%- set filename_postfix = buffer_defs.default_topo | default("def", true) %} @@ -21,13 +25,16 @@ {%- import 'buffers_defaults_%s.j2' % filename_postfix as defs with context %} {%- endif -%} {%- endif -%} - -{%- set voq_chassis = false %} {%- if DEVICE_METADATA is defined and DEVICE_METADATA['localhost']['switch_type'] is defined and DEVICE_METADATA['localhost']['switch_type'] == 'voq' %} {%- set voq_chassis = true %} {%- endif -%} - {%- if voq_chassis %} + {%- if DEVICE_METADATA is defined and 'localhost' in DEVICE_METADATA and 'hostname' in DEVICE_METADATA['localhost'] -%} + {%- set hostname = DEVICE_METADATA['localhost']['hostname'] -%} + {%- endif %} + {%- if DEVICE_METADATA is defined and 'localhost' in DEVICE_METADATA and 'asic_name' in DEVICE_METADATA['localhost'] -%} + {%- set asicname = DEVICE_METADATA['localhost']['asic_name'] -%} + {%- endif %} {%- for system_port in SYSTEM_PORT %} {% if '|' not in system_port %} {%- set system_port_name = system_port|join("|") %} @@ -37,6 +44,15 @@ {%- if 'cpu' not in system_port_name.lower() and 'IB' not in system_port_name and 'Rec' not in system_port_name %} {%- if SYSTEM_PORT_ALL.append(system_port_name) %}{%- endif %} {%- endif %} +{#- find all system_port_name has hostname|asicname. If it is true, get the portname and check if the port name is present in the deviceNeighbor -#} + {%- if hostname != "" and asicname != "" -%} + {%- if system_port_name.lower().startswith((hostname + '|' + asicname).lower()) -%} + {%- set port_name = system_port_name.split('|')[2] -%} + {%- if DEVICE_NEIGHBOR is defined and port_name in DEVICE_NEIGHBOR.keys() -%} + {%- if SYSTEM_PORT_ACTIVE.append(system_port_name) %}{%- endif -%} + {%- endif -%} + {%- endif -%} + {%- endif -%} {%- endfor %} {%- endif %} {%- for port in PORT %} @@ -492,37 +508,43 @@ "QUEUE": { {% for system_port in SYSTEM_PORT_ALL %} "{{ system_port }}|3": { - "scheduler" : "scheduler.1", + {% if system_port in SYSTEM_PORT_ACTIVE -%} + "scheduler": "scheduler.1", + {% endif -%} "wred_profile": "AZURE_LOSSLESS" }, {% endfor %} {% for system_port in SYSTEM_PORT_ALL %} "{{ system_port }}|4": { - "scheduler" : "scheduler.1", + {% if system_port in SYSTEM_PORT_ACTIVE -%} + "scheduler": "scheduler.1", + {% endif -%} "wred_profile": "AZURE_LOSSLESS" - }, + }{% if not loop.last %},{% else %} + {% if SYSTEM_PORT_ACTIVE and SYSTEM_PORT_ACTIVE|length > 0 %},{% endif %} + {% endif %} {% endfor %} -{% for system_port in SYSTEM_PORT_ALL %} +{% for system_port in SYSTEM_PORT_ACTIVE %} "{{ system_port }}|0": { "scheduler": "scheduler.0" }, {% endfor %} -{% for system_port in SYSTEM_PORT_ALL %} +{% for system_port in SYSTEM_PORT_ACTIVE %} "{{ system_port }}|1": { "scheduler": "scheduler.0" }, {% endfor %} -{% for system_port in SYSTEM_PORT_ALL %} +{% for system_port in SYSTEM_PORT_ACTIVE %} "{{ system_port }}|2": { "scheduler": "scheduler.0" }, {% endfor %} -{% for system_port in SYSTEM_PORT_ALL %} +{% for system_port in SYSTEM_PORT_ACTIVE %} "{{ system_port }}|5": { "scheduler": "scheduler.0" }, {% endfor %} -{% for system_port in SYSTEM_PORT_ALL %} +{% for system_port in SYSTEM_PORT_ACTIVE %} "{{ system_port }}|6": { "scheduler": "scheduler.0" }{% if not loop.last %},{% endif %} diff --git a/files/build_templates/redfish.service.j2 b/files/build_templates/redfish.service.j2 new file mode 100644 index 00000000000..e9882821803 --- /dev/null +++ b/files/build_templates/redfish.service.j2 @@ -0,0 +1,17 @@ +[Unit] +Description=Redfish container +BindsTo=sonic.target +After=sonic.target +StartLimitIntervalSec=1200 +StartLimitBurst=3 + +[Service] +User={{ sonicadmin_user }} +ExecStartPre=/usr/bin/{{docker_container_name}}.sh start +ExecStart=/usr/bin/{{docker_container_name}}.sh wait +ExecStop=/usr/bin/{{docker_container_name}}.sh stop +RestartSec=30 + +[Install] +WantedBy=sonic.target + diff --git a/files/build_templates/sed_config.conf.j2 b/files/build_templates/sed_config.conf.j2 new file mode 100644 index 00000000000..cbfef010db0 --- /dev/null +++ b/files/build_templates/sed_config.conf.j2 @@ -0,0 +1,2 @@ +tpm_bank_a={{ sed_tpm_bank_a }} +tpm_bank_b={{ sed_tpm_bank_b }} diff --git a/files/build_templates/sonic_debian_extension.j2 b/files/build_templates/sonic_debian_extension.j2 index cc0189ffd44..72afc99d4c7 100644 --- a/files/build_templates/sonic_debian_extension.j2 +++ b/files/build_templates/sonic_debian_extension.j2 @@ -119,6 +119,22 @@ sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get updat sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install efitools sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install mokutil +# Install sedutil for SED password management +install_deb_package $debs_path/sedutil_*.deb + +# SED password mgmt - common scripts and service +sudo cp $IMAGE_CONFIGS/sed_mgmt/sed_pw_utils.sh $FILESYSTEM_ROOT/usr/local/bin/ +sudo chmod 755 $FILESYSTEM_ROOT/usr/local/bin/sed_pw_utils.sh +sudo cp $IMAGE_CONFIGS/sed_mgmt/sed_pw_change.sh $FILESYSTEM_ROOT/usr/local/bin/ +sudo chmod 755 $FILESYSTEM_ROOT/usr/local/bin/sed_pw_change.sh +sudo cp $IMAGE_CONFIGS/sed_mgmt/sed_pw_reset.sh $FILESYSTEM_ROOT/usr/local/bin/ +sudo chmod 755 $FILESYSTEM_ROOT/usr/local/bin/sed_pw_reset.sh +sudo cp $IMAGE_CONFIGS/sed_mgmt/sed_pw_tpm_recovery.sh $FILESYSTEM_ROOT/usr/local/bin/ +sudo chmod 755 $FILESYSTEM_ROOT/usr/local/bin/sed_pw_tpm_recovery.sh +sudo cp $IMAGE_CONFIGS/sed_mgmt/sed-pw-tpm-recovery.service $FILESYSTEM_ROOT_USR_LIB_SYSTEMD_SYSTEM +echo "sed-pw-tpm-recovery.service" | sudo tee -a $GENERATED_SERVICE_FILE +sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT systemctl enable sed-pw-tpm-recovery.service + # Install tpm-tools sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install tpm2-tools @@ -197,21 +213,20 @@ if [[ $CONFIGURED_ARCH == armhf || $CONFIGURED_ARCH == arm64 ]]; then fi # Install sonic-yang-models Python 3 package, install dependencies -install_deb_package $debs_path/libyang_*.deb $debs_path/libyang-cpp_*.deb $debs_path/python3-yang_*.deb $debs_path/libpcre3_*.deb +install_deb_package $debs_path/libyang3_*.deb $debs_path/python3-libyang_*.deb install_pip_package {{sonic_yang_models_py3_wheel_path}} # Install sonic-yang-mgmt Python3 package +# Install python3-ijson from Debian repos first — provides the yajl2_c C extension backend. +# This must happen before pip installs sonic-yang-mgmt (which depends on ijson>=3.2.3), +# so pip can use the distro-provided python3-ijson package and avoid downloading from PyPI. +sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install python3-ijson install_pip_package {{sonic_yang_mgmt_py3_wheel_path}} # Install some dependencies for pyangbind sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install python3-lxml python3-regex -# For sonic-config-engine Python 3 package -# Install pyangbind here, outside sonic-config-engine dependencies, as pyangbind causes enum34 to be installed. -# Then immediately uninstall enum34, as enum34 should not be installed for Python >= 3.4, as it causes a -# conflict with the new 'enum' module in the standard library -# https://github.com/robshakir/pyangbind/issues/232 -sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT pip3 install pyangbind==0.8.2 +sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT pip3 install pyangbind==0.8.7 sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT pip3 uninstall -y enum34 # Install SONiC config engine Python 3 package @@ -250,8 +265,8 @@ install_deb_package $debs_path/sonic-utilities-data_*.deb # Install customized bash version to patch bash plugin support. install_deb_package $debs_path/bash_*.deb -# sonic-utilities-data installs bash-completion as a dependency. However, it is disabled by default -# in bash.bashrc, so we copy a version of the file with it enabled here. +# Bash completion is disabled by default in bash.bashrc, so we copy a version +# of the file with it enabled here. sudo cp -f $IMAGE_CONFIGS/bash/bash.bashrc $FILESYSTEM_ROOT/etc/ sudo cp -f $IMAGE_CONFIGS/bash/bash.bash_logout $FILESYSTEM_ROOT/etc/ @@ -322,6 +337,8 @@ install_deb_package $debs_path/libnss-tacplus_*.deb # Install bash-tacplus install_deb_package $debs_path/bash-tacplus_*.deb # Install audisp-tacplus +# Install audisp-tacplus (depends on libauparse0 |libauparse0t64 ; ensure it is installed for Trixie/time64) +sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y install libauparse0t64 install_deb_package $debs_path/audisp-tacplus_*.deb # Disable tacplus and LDAP by default ## NOTE: this syntax of pam-auth-update is meant to be used when the package gets removed, not for specifying @@ -341,6 +358,9 @@ install_deb_package $debs_path/libnss-radius_*.deb #sudo LANG=C chroot $FILESYSTEM_ROOT pam-auth-update --remove radius tacplus sudo sed -i -e '/^passwd/s/ radius//' $FILESYSTEM_ROOT/etc/nsswitch.conf +# Install makedumpfile (built from source) +install_deb_package $debs_path/makedumpfile_*.deb + # Install a custom version of kdump-tools (and its dependencies via 'apt-get -y install -f') if [[ $CONFIGURED_ARCH == amd64 || $CONFIGURED_ARCH == arm64 ]]; then install_deb_package $debs_path/kdump-tools_*.deb @@ -349,6 +369,7 @@ if [[ $CONFIGURED_ARCH == amd64 || $CONFIGURED_ARCH == arm64 ]]; then for kernel_release in $(ls $FILESYSTEM_ROOT/lib/modules/); do sudo LANG=C chroot $FILESYSTEM_ROOT /etc/kernel/postinst.d/kdump-tools $kernel_release > /dev/null 2>&1 sudo LANG=C chroot $FILESYSTEM_ROOT kdump-config symlinks $kernel_release + sudo LANG=C chroot $FILESYSTEM_ROOT cp /etc/kdump/sysctl.conf /var/lib/kdump/latest_sysctls-$kernel_release done fi @@ -379,6 +400,12 @@ sudo cp $IMAGE_CONFIGS/monit/monitrc $FILESYSTEM_ROOT/etc/monit/ sudo chmod 600 $FILESYSTEM_ROOT/etc/monit/monitrc sudo cp $IMAGE_CONFIGS/monit/conf.d/* $FILESYSTEM_ROOT/etc/monit/conf.d/ sudo chmod 600 $FILESYSTEM_ROOT/etc/monit/conf.d/* +# Remove inapplicable monit checks on DPU platforms +if [[ $CONFIGURED_PLATFORM == pensando ]] || [[ $CONFIGURED_PLATFORM == nvidia-bluefield ]]; then + sudo sed -i '/^# route_check\.py/,/^$/d' $FILESYSTEM_ROOT/etc/monit/conf.d/sonic-host + sudo sed -i '/^# dualtor_neighbor_check\.py/,/^$/d' $FILESYSTEM_ROOT/etc/monit/conf.d/sonic-host + sudo sed -i '/^# vnet_route_check\.py/,/^$/d' $FILESYSTEM_ROOT/etc/monit/conf.d/sonic-host +fi sudo cp $IMAGE_CONFIGS/monit/container_checker $FILESYSTEM_ROOT/usr/bin/ sudo chmod 755 $FILESYSTEM_ROOT/usr/bin/container_checker sudo cp $IMAGE_CONFIGS/monit/memory_checker $FILESYSTEM_ROOT/usr/bin/ @@ -418,6 +445,8 @@ sudo mkdir $FILESYSTEM_ROOT_USR_LIB_SYSTEMD_SYSTEM/chrony.service.d sudo LANG=C chroot $FILESYSTEM_ROOT systemctl disable chrony.service sudo cp $IMAGE_CONFIGS/chrony/override.conf $FILESYSTEM_ROOT_USR_LIB_SYSTEMD_SYSTEM/chrony.service.d/ sudo LANG=C chroot $FILESYSTEM_ROOT systemctl enable chrony.service +# Remove Chrony's hooks into ifupdown system, so that NTP sources are always treated as online +sudo rm $FILESYSTEM_ROOT/etc/network/if-post-down.d/chrony $FILESYSTEM_ROOT/etc/network/if-up.d/chrony # Copy DNS templates sudo cp $BUILD_TEMPLATES/dns.j2 $FILESYSTEM_ROOT_USR_SHARE_SONIC_TEMPLATES/ @@ -566,7 +595,7 @@ sudo rm -rf $FILESYSTEM_ROOT/$SONIC_CTRMGMT_WHEEL_NAME {% if include_kubernetes == "y" %} # Point to kubelet to /etc/resolv.conf # -echo 'KUBELET_EXTRA_ARGS="--resolv-conf=/etc/resolv.conf --cgroup-driver=cgroupfs --node-ip=::"' | sudo tee -a $FILESYSTEM_ROOT/etc/default/kubelet +echo 'KUBELET_EXTRA_ARGS="--resolv-conf=/etc/resolv.conf --cgroup-driver=systemd --node-ip=::"' | sudo tee -a $FILESYSTEM_ROOT/etc/default/kubelet # Copy Flannel conf file into sonic-templates # @@ -721,16 +750,40 @@ sudo ln -s /dev/null $FILESYSTEM_ROOT/etc/systemd/network/dummy-midplane.netdev sudo LANG=C chroot $FILESYSTEM_ROOT systemctl disable midplane-network-npu.service #echo "midplane-network-dpu.service" | sudo tee -a $GENERATED_SERVICE_FILE sudo LANG=C chroot $FILESYSTEM_ROOT systemctl disable midplane-network-dpu.service +sudo ln -s /dev/null $FILESYSTEM_ROOT/etc/systemd/system/dash-ha.service +for i in {0..7}; do + sudo ln -s /dev/null $FILESYSTEM_ROOT/etc/systemd/system/dash-ha@dpu${i}.service +done # According to the issue: https://github.com/systemd/systemd/issues/19106, To disable ManageForeignRoutingPolicyRules to avoid the ip rules being deleted by systemd-networkd sudo sed -i 's/#ManageForeignRoutingPolicyRules=yes/ManageForeignRoutingPolicyRules=no/g' $FILESYSTEM_ROOT/etc/systemd/networkd.conf + +# https://github.com/systemd/systemd/issues/29034 +sudo sed -i 's/#ManageForeignNextHops=yes/ManageForeignNextHops=no/g' $FILESYSTEM_ROOT/etc/systemd/networkd.conf + sudo mkdir $FILESYSTEM_ROOT_USR_LIB_SYSTEMD_SYSTEM/systemd-networkd.service.d sudo cp $IMAGE_CONFIGS/midplane-network/systemd-networkd.override.conf $FILESYSTEM_ROOT_USR_LIB_SYSTEMD_SYSTEM/systemd-networkd.service.d/override.conf -# Copy systemd-networkd-wait-online override configuration -sudo mkdir -p $FILESYSTEM_ROOT_USR_LIB_SYSTEMD_SYSTEM/systemd-networkd-wait-online.service.d -sudo cp $IMAGE_CONFIGS/midplane-network/systemd-networkd-wait-online.override.conf $FILESYSTEM_ROOT_USR_LIB_SYSTEMD_SYSTEM/systemd-networkd-wait-online.service.d/override.conf -sudo LANG=C chroot $FILESYSTEM_ROOT systemctl enable systemd-networkd-wait-online.service +# For Pensando platform: mask systemd-networkd services since dpu.init handles everything +# Must be done AFTER the generic enable command above +if [[ $CONFIGURED_PLATFORM == pensando ]]; then + # Mask systemd-networkd and wait-online - dpu.init handles interface and DHCP + sudo ln -sf /dev/null $FILESYSTEM_ROOT/etc/systemd/system/systemd-networkd.service + sudo ln -sf /dev/null $FILESYSTEM_ROOT/etc/systemd/system/systemd-networkd-wait-online.service + + # database.service must wait for dpu.service (interface + DHCP) + sudo mkdir -p $FILESYSTEM_ROOT_USR_LIB_SYSTEMD_SYSTEM/database.service.d + cat < /dev/null +[Unit] +Requires=dpu.service +After=dpu.service +EOF +else + # Copy systemd-networkd-wait-online override configuration + sudo mkdir -p $FILESYSTEM_ROOT_USR_LIB_SYSTEMD_SYSTEM/systemd-networkd-wait-online.service.d + sudo cp $IMAGE_CONFIGS/midplane-network/systemd-networkd-wait-online.override.conf $FILESYSTEM_ROOT_USR_LIB_SYSTEMD_SYSTEM/systemd-networkd-wait-online.service.d/override.conf + sudo LANG=C chroot $FILESYSTEM_ROOT systemctl enable systemd-networkd-wait-online.service +fi # Copy backend-acl script and service file sudo cp $IMAGE_CONFIGS/backend_acl/backend-acl.service $FILESYSTEM_ROOT_USR_LIB_SYSTEMD_SYSTEM/backend-acl.service @@ -745,7 +798,17 @@ sudo chmod 755 $FILESYSTEM_ROOT/usr/bin/rps.py sudo cp $IMAGE_CONFIGS/snmp/snmp.yml $FILESYSTEM_ROOT/etc/sonic/ # Copy ASN configuration files -sudo cp $IMAGE_CONFIGS/constants/constants.yml $FILESYSTEM_ROOT/etc/sonic/ +j2 files/build_templates/constants.yml.j2 | sudo tee $FILESYSTEM_ROOT/etc/sonic/constants.yml > /dev/null + +# Copy BMC network configuration file to share templates +sudo cp $IMAGE_CONFIGS/constants/bmc.json $FILESYSTEM_ROOT_USR_SHARE_SONIC_TEMPLATES/ + +# Copy DBus policy files for sonic-redfish (aspeed BMC platform only) +if [[ $CONFIGURED_PLATFORM == aspeed ]]; then + sudo mkdir -p $FILESYSTEM_ROOT/etc/dbus-1/system.d + sudo cp src/sonic-redfish/sonic-dbus-bridge/dbus/xyz.openbmc_project.*.conf \ + $FILESYSTEM_ROOT/etc/dbus-1/system.d/ +fi # Copy sudoers configuration file sudo cp $IMAGE_CONFIGS/sudoers/sudoers $FILESYSTEM_ROOT/etc/ @@ -942,12 +1005,6 @@ sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT docker $SONIC_NATIV sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT docker $SONIC_NATIVE_DOCKERD_FOR_DOCKERFS pull ${DEFAULT_CONTAINER_REGISTRY}etcd:${MASTER_ETCD_VERSION} sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT docker $SONIC_NATIVE_DOCKERD_FOR_DOCKERFS pull ${DEFAULT_CONTAINER_REGISTRY}kubernetesui/metrics-scraper:${MASTER_UI_METRIC_VERSION} sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT docker $SONIC_NATIVE_DOCKERD_FOR_DOCKERFS pull ${DEFAULT_CONTAINER_REGISTRY}kubernetesui/dashboard:${MASTER_UI_DASH_VERSION} -sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT docker $SONIC_NATIVE_DOCKERD_FOR_DOCKERFS pull ${DEFAULT_CONTAINER_REGISTRY}distroless/genevamdm:${MASTER_MDM_VERSION} -sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT docker $SONIC_NATIVE_DOCKERD_FOR_DOCKERFS tag ${DEFAULT_CONTAINER_REGISTRY}distroless/genevamdm:${MASTER_MDM_VERSION} linuxgeneva-microsoft.azurecr.io/distroless/genevamdm:latest -sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT docker $SONIC_NATIVE_DOCKERD_FOR_DOCKERFS pull ${DEFAULT_CONTAINER_REGISTRY}distroless/genevamdsd:${MASTER_MDS_VERSION} -sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT docker $SONIC_NATIVE_DOCKERD_FOR_DOCKERFS tag ${DEFAULT_CONTAINER_REGISTRY}distroless/genevamdsd:${MASTER_MDS_VERSION} linuxgeneva-microsoft.azurecr.io/distroless/genevamdsd:latest -sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT docker $SONIC_NATIVE_DOCKERD_FOR_DOCKERFS pull ${DEFAULT_CONTAINER_REGISTRY}distroless/genevafluentd_td-agent:${MASTER_FLUENTD_VERSION} -sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT docker $SONIC_NATIVE_DOCKERD_FOR_DOCKERFS tag ${DEFAULT_CONTAINER_REGISTRY}distroless/genevafluentd_td-agent:${MASTER_FLUENTD_VERSION} linuxgeneva-microsoft.azurecr.io/distroless/genevafluentd_td-agent:latest {% else %} sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT docker $SONIC_NATIVE_DOCKERD_FOR_DOCKERFS pull k8s.gcr.io/pause:${MASTER_PAUSE_VERSION} sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT docker $SONIC_NATIVE_DOCKERD_FOR_DOCKERFS pull k8s.gcr.io/kube-apiserver:${MASTER_KUBERNETES_CONTAINER_IMAGE_VERSION} @@ -958,12 +1015,6 @@ sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT docker $SONIC_NATIV sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT docker $SONIC_NATIVE_DOCKERD_FOR_DOCKERFS pull k8s.gcr.io/etcd:${MASTER_ETCD_VERSION} sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT docker $SONIC_NATIVE_DOCKERD_FOR_DOCKERFS pull kubernetesui/metrics-scraper:${MASTER_UI_METRIC_VERSION} sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT docker $SONIC_NATIVE_DOCKERD_FOR_DOCKERFS pull kubernetesui/dashboard:${MASTER_UI_DASH_VERSION} -sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT docker $SONIC_NATIVE_DOCKERD_FOR_DOCKERFS pull linuxgeneva-microsoft.azurecr.io/distroless/genevamdm:${MASTER_MDM_VERSION} -sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT docker $SONIC_NATIVE_DOCKERD_FOR_DOCKERFS tag linuxgeneva-microsoft.azurecr.io/distroless/genevamdm:${MASTER_MDM_VERSION} linuxgeneva-microsoft.azurecr.io/distroless/genevamdm:latest -sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT docker $SONIC_NATIVE_DOCKERD_FOR_DOCKERFS pull linuxgeneva-microsoft.azurecr.io/distroless/genevamdsd:${MASTER_MDS_VERSION} -sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT docker $SONIC_NATIVE_DOCKERD_FOR_DOCKERFS tag linuxgeneva-microsoft.azurecr.io/distroless/genevamdsd:${MASTER_MDS_VERSION} linuxgeneva-microsoft.azurecr.io/distroless/genevamdsd:latest -sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT docker $SONIC_NATIVE_DOCKERD_FOR_DOCKERFS pull linuxgeneva-microsoft.azurecr.io/distroless/genevafluentd_td-agent:${MASTER_FLUENTD_VERSION} -sudo https_proxy=$https_proxy LANG=C chroot $FILESYSTEM_ROOT docker $SONIC_NATIVE_DOCKERD_FOR_DOCKERFS tag linuxgeneva-microsoft.azurecr.io/distroless/genevafluentd_td-agent:${MASTER_FLUENTD_VERSION} linuxgeneva-microsoft.azurecr.io/distroless/genevafluentd_td-agent:latest {% endif %} echo "kubernetes master docker images pull complete" # Install python packages for mdm metrics collection service usage @@ -1088,6 +1139,7 @@ sudo LANG=C cp $SCRIPTS_DIR/mgmt-framework.sh $FILESYSTEM_ROOT/usr/local/bin/mgm sudo LANG=C cp $SCRIPTS_DIR/asic_status.sh $FILESYSTEM_ROOT/usr/local/bin/asic_status.sh sudo LANG=C cp $SCRIPTS_DIR/asic_status.py $FILESYSTEM_ROOT/usr/local/bin/asic_status.py sudo LANG=C cp $SCRIPTS_DIR/startup_tsa_tsb.py $FILESYSTEM_ROOT/usr/local/bin/startup_tsa_tsb.py +sudo LANG=C cp $SCRIPTS_DIR/sonic-db-aliases.py $FILESYSTEM_ROOT/usr/local/bin/sonic-db-aliases.py sudo LANG=C cp $SCRIPTS_DIR/sonic-dpu-mgmt-traffic.sh $FILESYSTEM_ROOT/usr/local/bin/sonic-dpu-mgmt-traffic.sh sudo LANG=C cp $SCRIPTS_DIR/dash-ha.sh $FILESYSTEM_ROOT/usr/local/bin/dash-ha.sh # Copy sonic-netns-exec script @@ -1137,8 +1189,7 @@ for fw_file_name in ${!FW_FILE_MAP[@]}; do # Link old FW location to not break existing automation/scripts sudo ln -s /host/image-$SONIC_IMAGE_VERSION/$PLATFORM_DIR/fw/asic/${FW_FILE_MAP[$fw_file_name]} $FILESYSTEM_ROOT/etc/mlnx/${FW_FILE_MAP[$fw_file_name]} done -# TODO: Revert back to $files_path/$ISSU_VERSION_FILE after container trixie upgrade -sudo cp target/files/bookworm/$ISSU_VERSION_FILE $FILESYSTEM_ROOT/$PLATFORM_DIR/fw/asic/issu-version +sudo cp $files_path/$ISSU_VERSION_FILE $FILESYSTEM_ROOT/$PLATFORM_DIR/fw/asic/issu-version sudo ln -s /host/image-$SONIC_IMAGE_VERSION/$PLATFORM_DIR/fw/asic/issu-version $FILESYSTEM_ROOT/etc/mlnx/issu-version sudo cp $files_path/$COMPONENT_VERSIONS_FILE $FILESYSTEM_ROOT/etc/mlnx/component-versions sudo cp $files_path/$MLNX_FFB_SCRIPT $FILESYSTEM_ROOT/usr/bin/mlnx-ffb.sh @@ -1151,10 +1202,6 @@ for MLNX_CPLD_ARCHIVE in $MLNX_CPLD_ARCHIVES; do sudo cp $files_path/$MLNX_CPLD_ARCHIVE $FILESYSTEM_ROOT/etc/mlnx/cpld/ done -j2 platform/mellanox/get_component_versions/get_component_versions.j2 | sudo tee $FILESYSTEM_ROOT/usr/bin/get_component_versions.py -sudo sed -i '1d' $FILESYSTEM_ROOT/usr/bin/get_component_versions.py -sudo chmod 755 $FILESYSTEM_ROOT/usr/bin/get_component_versions.py - sudo cp platform/mellanox/cmis_host_mgmt/cmis_host_mgmt.py $FILESYSTEM_ROOT/usr/bin/cmis_host_mgmt.py sudo chmod 755 $FILESYSTEM_ROOT/usr/bin/cmis_host_mgmt.py sudo cp -r platform/mellanox/asic_detect $FILESYSTEM_ROOT/usr/bin/asic_detect @@ -1183,12 +1230,16 @@ sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y in sudo mkdir -p $FILESYSTEM_ROOT/etc/minicom/ sudo cp platform/mellanox/minirc.dfl $FILESYSTEM_ROOT/etc/minicom/ -# Install dpu-udev-manager script -sudo install -m 755 platform/mellanox/smartswitch/dpu-udev-manager/dpu-udev-manager.sh $FILESYSTEM_ROOT/usr/bin/dpu-udev-manager.sh +# Install udev-manager script (platform.json-driven net interface naming) +sudo install -m 755 platform/mellanox/udev-manager/udev-manager.sh $FILESYSTEM_ROOT/usr/bin/udev-manager.sh + +# Install udev-manager service +sudo install -m 644 platform/mellanox/udev-manager/udev-manager.service $FILESYSTEM_ROOT_USR_LIB_SYSTEMD_SYSTEM/ +sudo LANG=C chroot $FILESYSTEM_ROOT systemctl enable udev-manager -# Install dpu-udev-manager service -sudo install -m 644 platform/mellanox/smartswitch/dpu-udev-manager/dpu-udev-manager.service $FILESYSTEM_ROOT_USR_LIB_SYSTEMD_SYSTEM/ -sudo LANG=C chroot $FILESYSTEM_ROOT systemctl enable dpu-udev-manager +# SED password mgmt - Mellanox script to read default password from TPM bank 3 +sudo cp platform/mellanox/sed-password-mgmt/read_default_sed_pw_from_tpm.sh $FILESYSTEM_ROOT/usr/local/bin/ +sudo chmod 755 $FILESYSTEM_ROOT/usr/local/bin/read_default_sed_pw_from_tpm.sh {% endif %} @@ -1222,10 +1273,39 @@ sudo LANG=C DEBIAN_FRONTEND=noninteractive chroot $FILESYSTEM_ROOT apt-get -y in # Copy component-versions file sudo cp $files_path/$COMPONENT_VERSIONS_FILE $FILESYSTEM_ROOT/etc/mlnx/component-versions -# Install current running versions script -j2 platform/mellanox/get_component_versions/get_component_versions.j2 | sudo tee $FILESYSTEM_ROOT/usr/bin/get_component_versions.py -sudo sed -i '1d' $FILESYSTEM_ROOT/usr/bin/get_component_versions.py -sudo chmod 755 $FILESYSTEM_ROOT/usr/bin/get_component_versions.py +# Enable the openibd service for management of mlx5 drivers, RDMA, etc. +sudo LANG=C chroot $FILESYSTEM_ROOT systemctl enable openibd.service + +# Comment out the mlnx-bf.conf file to skip some unnecessary steps. +# Fail if the file is missing or does not match the expected OFED-shipped content. +MLNX_BF_CONF="$FILESYSTEM_ROOT/etc/modprobe.d/mlnx-bf.conf" +EXPECTED_MLNX_BF_CONF_MD5="4f50aebbeccd25831812b6a039f0e271" +if [ ! -f "$MLNX_BF_CONF" ]; then + echo "Error: $MLNX_BF_CONF not found" >&2 + exit 1 +fi +actual_mlnx_bf_conf_md5=$(md5sum "$MLNX_BF_CONF" | awk '{ print $1 }') +if [ "$actual_mlnx_bf_conf_md5" != "$EXPECTED_MLNX_BF_CONF_MD5" ]; then + echo "Error: $MLNX_BF_CONF md5sum mismatch (expected $EXPECTED_MLNX_BF_CONF_MD5, got $actual_mlnx_bf_conf_md5)" >&2 + exit 1 +fi +sudo sed -i '1s/^/#/' "$MLNX_BF_CONF" + +# Disable 90-ib.rules to skip some unnecessary steps. +# Fail if the file is missing or does not match the expected OFED-shipped content. +IB_UDEV_RULES="$FILESYSTEM_ROOT/lib/udev/rules.d/90-ib.rules" +EXPECTED_IB_UDEV_MD5="9ca97efd555233b882328b0071f303de" +if [ ! -f "$IB_UDEV_RULES" ]; then + echo "Error: $IB_UDEV_RULES not found" >&2 + exit 1 +fi +actual_ib_udev_md5=$(md5sum "$IB_UDEV_RULES" | awk '{ print $1 }') +if [ "$actual_ib_udev_md5" != "$EXPECTED_IB_UDEV_MD5" ]; then + echo "Error: $IB_UDEV_RULES md5sum mismatch (expected $EXPECTED_IB_UDEV_MD5, got $actual_ib_udev_md5)" >&2 + exit 1 +fi +sudo mv "$IB_UDEV_RULES" "${IB_UDEV_RULES}.disabled" + {% endif %} {%- if SONIC_ROUTING_STACK == "frr" %} @@ -1271,6 +1351,42 @@ sudo touch $FILESYSTEM_ROOT_ETC_SONIC/enable_multidb # Install syslog counter plugin install_deb_package $debs_path/syslog-counter_*.deb +############################################################################# +# PLATFORM-SPECIFIC SERVICE FILTERING +# This section MUST remain at the end of the file to ensure all services +# have been added to GENERATED_SERVICE_FILE before filtering. +# DO NOT add service registrations (tee -a $GENERATED_SERVICE_FILE) after this point! +############################################################################# + +# Aspeed BMC platform: Filter services for BMC use case +if [[ $CONFIGURED_PLATFORM == aspeed ]]; then + # Show original service count + ORIGINAL_COUNT=$(sudo bash -c "wc -l < $GENERATED_SERVICE_FILE") + + # Use filter script to remove unwanted services and add BMC services + sudo cp $BUILD_SCRIPTS_DIR/aspeed_bmc_filter_services.py $FILESYSTEM_ROOT/tmp/ + sudo chmod a+x $FILESYSTEM_ROOT/tmp/aspeed_bmc_filter_services.py + + # Filter the generated services and mask excluded services + sudo python3 $FILESYSTEM_ROOT/tmp/aspeed_bmc_filter_services.py \ + $GENERATED_SERVICE_FILE \ + $GENERATED_SERVICE_FILE.filtered \ + $FILESYSTEM_ROOT + + # Show filtered service count + FILTERED_COUNT=$(sudo bash -c "wc -l < $GENERATED_SERVICE_FILE.filtered") + + # Replace with filtered version + sudo mv $GENERATED_SERVICE_FILE.filtered $GENERATED_SERVICE_FILE + + # Cleanup + sudo rm -f $FILESYSTEM_ROOT/tmp/aspeed_bmc_filter_services.py +fi + +############################################################################# +# END OF FILE - Platform-specific service filtering complete +############################################################################# + ## Copy over set-vrf-strict-mode.service {% if ENABLE_VRF_STRICT == "y" %} diff --git a/files/build_templates/swss_vars.j2 b/files/build_templates/swss_vars.j2 index 6eb2f0bc5e4..f1633caf950 100644 --- a/files/build_templates/swss_vars.j2 +++ b/files/build_templates/swss_vars.j2 @@ -12,5 +12,6 @@ {% endif -%} "dual_tor": {% if DEVICE_METADATA.localhost.type == "ToRRouter" and DEVICE_METADATA.localhost.subtype == "DualToR" %}"enable"{% else %}"disable"{% endif %}, "dscp_remapping": {% if SYSTEM_DEFAULTS is defined and SYSTEM_DEFAULTS.tunnel_qos_remap is defined and SYSTEM_DEFAULTS.tunnel_qos_remap.status == "enabled" %}"enable"{% else %}"disable"{% endif %}, + "swss_zmq": {% if SYSTEM_DEFAULTS is defined and SYSTEM_DEFAULTS.swss_zmq is defined and SYSTEM_DEFAULTS.swss_zmq.status == "enabled" %}"true"{% else %}"false"{% endif %}, "switch_type": "{{ DEVICE_METADATA.localhost.switch_type }}" } diff --git a/files/build_templates/telemetry.service.j2 b/files/build_templates/telemetry.service.j2 index 97b622fc67c..d59ad1fc76e 100644 --- a/files/build_templates/telemetry.service.j2 +++ b/files/build_templates/telemetry.service.j2 @@ -13,3 +13,7 @@ ExecStartPre=/usr/local/bin/{{docker_container_name}}.sh start ExecStart=/usr/local/bin/{{docker_container_name}}.sh wait ExecStop=/usr/local/bin/{{docker_container_name}}.sh stop RestartSec=30 + +[Install] +WantedBy=sonic.target + diff --git a/files/dhcp/ifupdown2_policy.json b/files/dhcp/ifupdown2_policy.json index 9a5010dead8..f584c401bc5 100644 --- a/files/dhcp/ifupdown2_policy.json +++ b/files/dhcp/ifupdown2_policy.json @@ -8,5 +8,10 @@ "dhcp6-duid" : "LL" } } + }, + "vrf" : { + "module_globals" : { + "vrf-table-id-end" : 6000 + } } } diff --git a/files/dhcp/snmpcommunity b/files/dhcp/snmpcommunity index 63924e01fc5..a89d7988c28 100644 --- a/files/dhcp/snmpcommunity +++ b/files/dhcp/snmpcommunity @@ -2,9 +2,13 @@ case $reason in BOUND|RENEW|REBIND|REBOOT) if [ -n "${new_snmp_community}" ]; then if [ -f /etc/sonic/snmp.yml ]; then - sed -i "s/^snmp_rocommunity:.*/snmp_rocommunity: $new_snmp_community/g" /etc/sonic/snmp.yml + if grep -q "^snmp_rocommunity:" /etc/sonic/snmp.yml; then + sed -i "s/^snmp_rocommunity:.*/snmp_rocommunity: $new_snmp_community/g" /etc/sonic/snmp.yml + else + echo "snmp_rocommunity: $new_snmp_community" >> /etc/sonic/snmp.yml + fi else - echo "snmp_rocommunity: "$new_snmp_community > /etc/sonic/snmp.yml + echo "snmp_rocommunity: $new_snmp_community" > /etc/sonic/snmp.yml fi fi ;; diff --git a/files/docker/docker.service.conf b/files/docker/docker.service.conf index ea7f29f5180..6abf5baf915 100644 --- a/files/docker/docker.service.conf +++ b/files/docker/docker.service.conf @@ -11,4 +11,4 @@ [Service] Environment=GODEBUG=netdns=cgo ExecStart= -ExecStart=/usr/bin/dockerd -H fd:// --storage-driver=overlay2 --bip=240.127.1.1/24 --iptables=false --ipv6=true --fixed-cidr-v6=fd00::/80 +ExecStart=/usr/bin/dockerd -H fd:// --storage-driver=overlay2 --bip=240.127.1.1/24 --iptables=false --ip6tables=false --ipv6=true --fixed-cidr-v6=fd00::/80 diff --git a/files/dsc/dpu.init b/files/dsc/dpu.init index e636bf77b11..7dbfae526e1 100755 --- a/files/dsc/dpu.init +++ b/files/dsc/dpu.init @@ -27,13 +27,34 @@ DPU_DOCKER_INFO_DIR=/host/dpu-docker-info TAG=latest IMAGE_NAME=docker-dpu +function log_msg() { + echo "$1" | tee /dev/kmsg /dev/console +} + +function generate_ssh_host_keys() +{ + # Generate SSH host keys + log_msg "Removing existing SSH host keys" + rm -rfd /etc/ssh/ssh_host* + sleep 1 + ssh-keygen -A + systemctl restart ssh.service + log_msg "SSH host keys generated successfully" +} + function start_polaris() { + # Run only if ssh.service is NOT active (inactive/failed/not-found) + if ! systemctl is-active --quiet ssh.service; then + log_msg "ssh.service is not active; regenerating host keys and restarting ssh" + generate_ssh_host_keys + fi + modprobe ionic_mnic modprobe mnet_uio_pdrv_genirq modprobe mdev modprobe pciesvc - insmod /usr/lib/modules/6.1.0-22-2-arm64/kernel/drivers/watchdog/softdog.ko soft_panic=1 soft_noboot=0 + insmod /usr/lib/modules/6.12.41+deb13-sonic-arm64/kernel/drivers/watchdog/softdog.ko soft_panic=1 soft_noboot=0 mkdir -p $HOST_DIR_POLARIS/update mkdir -p $HOST_DIR_POLARIS/sysconfig/config0 @@ -53,6 +74,12 @@ function start_polaris() mkdir -p $DPU_DOCKER_INFO_DIR echo 256 > /sys/kernel/mm/hugepages/hugepages-2048kB/nr_hugepages + if [ -w /sys/firmware/pensando/reboot/panic_reboot ]; then + echo 1 > /sys/firmware/pensando/reboot/panic_reboot + else + log_msg "Pensando panic_reboot sysfs node not writable; skipping configuration" + fi + sync; sync; sleep 3; @@ -60,6 +87,8 @@ function start_polaris() echo $IMAGE_NAME:$TAG > $DPU_DOCKER_INFO_DIR/image /usr/sbin/ethtool -K Ethernet0 tx off sg off tso off rx off + echo 50 > $HOST_DIR_POLARIS/data/free_mem_threshold + docker ps -a --format "{{.ID}}\t{{.Image}}" | grep "$IMAGE_NAME:$TAG" | awk '{print $1}' | xargs -I {} docker rm {} docker run -v $HOST_DIR_POLARIS/update:/update -v $HOST_DIR_POLARIS/sysconfig/config0:/sysconfig/config0 -v $HOST_DIR_POLARIS/sysconfig/config1:/sysconfig/config1 -v $HOST_DIR_POLARIS/obfl/a:/obfl -v $HOST_DIR_POLARIS/obfl:/var/log/obfl -v $HOST_DIR_POLARIS/data:/data -v $HOST_DIR_POLARIS/share:/share -v $HOST_DIR_POLARIS/external:/external -v $HOST_DIR_POLARIS/mnt/a:/ro -v /dev:/dev -v /sys:/sys --net=host --name=$CONTAINER_NAME_POLARIS --privileged $IMAGE_NAME:$TAG & @@ -67,19 +96,91 @@ function start_polaris() if [ -f /boot/first_boot ]; then device="/usr/share/sonic/device" platform=$(grep 'onie_platform=' /host/machine.conf | cut -d '=' -f 2) - echo "python3 -m pip install $device/$platform/sonic_platform-1.0-py3-none-any.whl" + log_msg "python3 -m pip install $device/$platform/sonic_platform-1.0-py3-none-any.whl" python3 -m pip install $device/$platform/sonic_platform-1.0-py3-none-any.whl + + # Handle configuration migration (similar to rc.local pattern) + if [ -d /host/old_config ]; then + log_msg "First boot detected: migrating old configuration" + if mv -f /host/old_config /etc/sonic/old_config; then + rm -rf /etc/sonic/old_config/old_config + touch /etc/sonic/pending_config_migration + log_msg "Configuration migration will be handled by config-setup.service" + else + log_msg "ERROR: failed to migrate /host/old_config" + fi + else + log_msg "First boot detected: no old configuration found" + touch /etc/sonic/pending_config_initialization + fi + rm /boot/first_boot fi - sleep 5 + # Configure eth0-midplane interface with DHCP + # This must complete before database.service starts to get the midplane IP INTERFACE="eth0-midplane" - if ip link show "$INTERFACE" &> /dev/null; then - echo "dhclient -r $INTERFACE" - /usr/sbin/dhclient -r $INTERFACE + INTERFACE_WAIT_TIMEOUT=120 # Max seconds to wait for interface to appear + DHCP_MAX_RETRIES=30 + DHCP_RETRY_INTERVAL=2 + + log_msg "Waiting for interface $INTERFACE to be created by polaris container..." + + # Wait dynamically for eth0-midplane interface to be created + interface_wait_start=$(date +%s) + while true; do + if ip link show "$INTERFACE" &> /dev/null; then + log_msg "Interface $INTERFACE detected" + # Give it a moment to fully initialize + sleep 1 + break + fi + + elapsed=$(($(date +%s) - interface_wait_start)) + if [ $elapsed -ge $INTERFACE_WAIT_TIMEOUT ]; then + log_msg "Error: Interface $INTERFACE not found after ${INTERFACE_WAIT_TIMEOUT}s timeout" + log_msg "Check if polaris container is running correctly" + docker logs $CONTAINER_NAME_POLARIS 2>&1 | tail -20 + exit 1 + fi + + # Log progress every 10 seconds + if [ $((elapsed % 10)) -eq 0 ] && [ $elapsed -gt 0 ]; then + log_msg "Still waiting for $INTERFACE... (${elapsed}s elapsed)" + fi + sleep 1 - echo "dhclient $INTERFACE" - /usr/sbin/dhclient $INTERFACE + done + + log_msg "Releasing any existing DHCP lease on $INTERFACE" + /usr/sbin/dhclient -r $INTERFACE 2>/dev/null || true + sleep 1 + + log_msg "Starting DHCP client on $INTERFACE" + /usr/sbin/dhclient $INTERFACE + + # Wait for IP address to be assigned + log_msg "Waiting for IP address on $INTERFACE..." + retry_count=0 + while [ $retry_count -lt $DHCP_MAX_RETRIES ]; do + midplane_ip=$(ip -4 -o addr show $INTERFACE 2>/dev/null | awk '{print $4}' | cut -d'/' -f1) + if [ -n "$midplane_ip" ]; then + log_msg "Successfully obtained IP address: $midplane_ip on $INTERFACE" + break + fi + retry_count=$((retry_count + 1)) + log_msg "Waiting for DHCP... attempt $retry_count/$DHCP_MAX_RETRIES" + sleep $DHCP_RETRY_INTERVAL + done + + if [ -z "$midplane_ip" ]; then + log_msg "Warning: Failed to obtain IP address on $INTERFACE after $DHCP_MAX_RETRIES attempts" + log_msg "DHCP server may not be available. Continuing without midplane IP." + fi + + if ! systemctl is-active --quiet ssh.service; then + log_msg "ssh.service is not active; regenerating host keys and restarting ssh" + generate_ssh_host_keys fi } @@ -156,4 +257,3 @@ force-reload|restart) esac exit 0 - diff --git a/files/dsc/dpu.service b/files/dsc/dpu.service index ff6e5fc7db5..a44ee5986a8 100644 --- a/files/dsc/dpu.service +++ b/files/dsc/dpu.service @@ -15,3 +15,4 @@ RemainAfterExit=yes [Install] WantedBy=multi-user.target + diff --git a/files/dsc/install_debian.j2 b/files/dsc/install_debian.j2 index 8f652ae5bb5..f11020b39ed 100755 --- a/files/dsc/install_debian.j2 +++ b/files/dsc/install_debian.j2 @@ -251,7 +251,7 @@ label main kernel /$image_dir/boot/vmlinuz-6.12.41+deb13-sonic-arm64 initrd /$image_dir/boot/initrd.img-6.12.41+deb13-sonic-arm64 devicetree /$image_dir/boot/elba-asic-psci.dtb - append softdog.soft_panic=1 FW_NAME=mainfwa root=/dev/mmcblk0p10 rw rootwait rootfstype=ext4 loopfstype=squashfs loop=/$image_dir/fs.squashfs + append softdog.soft_panic=1 FW_NAME=mainfwa root=/dev/mmcblk0p10 rw rootwait rootfstype=ext4 loopfstype=squashfs loop=$image_dir/fs.squashfs } EOF } diff --git a/files/image_config/bash/bash.bashrc b/files/image_config/bash/bash.bashrc index 96f54776f94..5de4b40c3d6 100644 --- a/files/image_config/bash/bash.bashrc +++ b/files/image_config/bash/bash.bashrc @@ -73,3 +73,57 @@ if [ -n "$SSH_TARGET_CONSOLE_LINE" ]; then exit fi fi + +# Helper function to generate all redis-cli aliases at once +generate_sonic_redis_aliases() { + # Define DB names and alias suffixes (Single Source of Truth) + local -A SONIC_DBS=( + ["APPL_DB"]="appdb" + ["ASIC_DB"]="asicdb" + ["COUNTERS_DB"]="counterdb" + ["LOGLEVEL_DB"]="logleveldb" + ["CONFIG_DB"]="configdb" + ["FLEX_COUNTER_DB"]="flexcounterdb" + ["STATE_DB"]="statedb" + ["APPL_STATE_DB"]="appstatedb" + ) + + # Extract DB names (keys) from the associative array to pass to Python + local db_keys=("${!SONIC_DBS[@]}") + + # Run the external Python script, passing DB names as arguments + local python_output + python_output=$(/usr/local/bin/sonic-db-aliases.py "${db_keys[@]}" 2>&1) + local python_exit_code=$? + + # Check if Python command failed catastrophically (e.g., module not found) + if [ $python_exit_code -ne 0 ]; then + echo "Error generating Redis aliases: $python_output" >&2 + return 1 + fi + + # Check if redis-cli exists + if ! command -v redis-cli &> /dev/null; then + echo "Error: redis-cli command not found" >&2 + return 1 + fi + + # Parse output and create aliases + while IFS=: read -r db_name db_id db_port; do + # Skip lines that contain errors printed by the python script + if [[ "$db_name" == "ERROR" ]]; then + echo "$db_name:$db_id:$db_port" >&2 + continue + fi + + if [ -n "$db_name" ] && [ -n "$db_id" ] && [ -n "$db_port" ]; then + local alias_name="redis-${SONIC_DBS[$db_name]}" + if [ -n "$alias_name" ]; then + eval "alias $alias_name='redis-cli -n $db_id -p $db_port'" + fi + fi + done <<< "$python_output" +} + +# Generate all aliases at shell startup +generate_sonic_redis_aliases \ No newline at end of file diff --git a/files/image_config/chrony/chrony.conf.j2 b/files/image_config/chrony/chrony.conf.j2 index 3c92c4e8e64..ffa6345ae2f 100644 --- a/files/image_config/chrony/chrony.conf.j2 +++ b/files/image_config/chrony/chrony.conf.j2 @@ -63,50 +63,56 @@ binddevice bridge-midplane {% endif -%} {% endif -%} -{# use source interface if configured to send NTP requests, else use eth0 if running in mgmt -vrf (default is not to listen on anything) -#} - -{# Set interface to listen on: - * Set global variable for configured source interface name. - * Set global boolean to indicate if the ip of the configured source - interface is configured. - * If the source interface is configured but no ip on that - interface, then listen on another interface based on existing logic. -#} -{%- macro check_ip_on_interface(interface_name, table_name) %} - {%- set ns = namespace(valid_intf = 'false') %} +{# Get interface address to listen on. Return the last IPv4 or IPv6 address on +an interface, depending on the order it is traversed in CONFIG_DB. -#} +{%- macro get_ip_on_interface(interface_name, table_name, use_ipv4) %} + {%- set ns = namespace(ip_address = 'false') %} {%- if table_name %} {%- for (name, source_prefix) in table_name|pfx_filter %} {%- if source_prefix and name == interface_name %} - {%- set ns.valid_intf = 'true' %} + {%- if ":" in source_prefix and not use_ipv4 %} + {%- set ns.ip_address = source_prefix.split('/')[0] %} + {%- elif ":" not in source_prefix and use_ipv4 %} + {%- set ns.ip_address = source_prefix.split('/')[0] %} + {%- endif %} {%- endif %} {%- endfor %} {%- endif %} -{{ ns.valid_intf }} +{{ ns.ip_address }} {%- endmacro %} -{% set ns = namespace(source_intf = "") %} -{%- set ns = namespace(source_intf_ip = 'false') %} +{# use source interface if configured to send NTP requests; otherwise, rely on +the kernel to route packets as needed. -#} +{% set ns = namespace(source_intf = "", source_intf_ipv4 = 'false', source_intf_ipv6 = 'false') %} {%- if global.src_intf %} {%- set ns.source_intf = global.src_intf %} {%- if ns.source_intf != "" %} {%- if ns.source_intf == "eth0" %} - {%- set ns.source_intf_ip = check_ip_on_interface(ns.source_intf, MGMT_INTERFACE) %} + {%- set ns.source_intf_ipv4 = get_ip_on_interface(ns.source_intf, MGMT_INTERFACE, true) %} + {%- set ns.source_intf_ipv6 = get_ip_on_interface(ns.source_intf, MGMT_INTERFACE, false) %} {%- elif ns.source_intf.startswith('Vlan') %} - {%- set ns.source_intf_ip = check_ip_on_interface(ns.source_intf, VLAN_INTERFACE) %} + {%- set ns.source_intf_ipv4 = get_ip_on_interface(ns.source_intf, VLAN_INTERFACE, true) %} + {%- set ns.source_intf_ipv6 = get_ip_on_interface(ns.source_intf, VLAN_INTERFACE, false) %} {%- elif ns.source_intf.startswith('Ethernet') %} - {%- set ns.source_intf_ip = check_ip_on_interface(ns.source_intf, INTERFACE) %} + {%- set ns.source_intf_ipv4 = get_ip_on_interface(ns.source_intf, INTERFACE, true) %} + {%- set ns.source_intf_ipv6 = get_ip_on_interface(ns.source_intf, INTERFACE, false) %} {%- elif ns.source_intf.startswith('PortChannel') %} - {%- set ns.source_intf_ip = check_ip_on_interface(ns.source_intf, PORTCHANNEL_INTERFACE) %} + {%- set ns.source_intf_ipv4 = get_ip_on_interface(ns.source_intf, PORTCHANNEL_INTERFACE, true) %} + {%- set ns.source_intf_ipv6 = get_ip_on_interface(ns.source_intf, PORTCHANNEL_INTERFACE, false) %} {%- elif ns.source_intf.startswith('Loopback') %} - {%- set ns.source_intf_ip = check_ip_on_interface(ns.source_intf, LOOPBACK_INTERFACE) %} + {%- set ns.source_intf_ipv4 = get_ip_on_interface(ns.source_intf, LOOPBACK_INTERFACE, true) %} + {%- set ns.source_intf_ipv6 = get_ip_on_interface(ns.source_intf, LOOPBACK_INTERFACE, false) %} {%- endif %} {%- endif %} {% endif %} -{% if ns.source_intf_ip == 'true' -%} -bindacqdevice {{ns.source_intf}} -{% elif (NTP) and NTP['global']['vrf'] == 'mgmt' -%} -bindacqdevice eth0 +{% if not ((NTP) and NTP['global']['vrf'] == 'mgmt') -%} +{% if ns.source_intf_ipv4 != 'false' -%} +bindacqaddress {{ns.source_intf_ipv4}} +{% endif %} +{% if ns.source_intf_ipv6 != 'false' -%} +bindacqaddress {{ns.source_intf_ipv6}} +{% endif %} {% endif %} # Use time sources from DHCP. diff --git a/files/image_config/chrony/override.conf b/files/image_config/chrony/override.conf index 0b9c664cf7a..f2fe2ca98a5 100644 --- a/files/image_config/chrony/override.conf +++ b/files/image_config/chrony/override.conf @@ -1,6 +1,7 @@ [Unit] Requires=config-setup.service After=config-setup.service +After=interfaces-config.service BindsTo=sonic.target After=sonic.target diff --git a/files/image_config/config-setup/config-setup b/files/image_config/config-setup/config-setup index 7053cab08a3..84fb49d8535 100755 --- a/files/image_config/config-setup/config-setup +++ b/files/image_config/config-setup/config-setup @@ -170,15 +170,37 @@ copy_config_files_and_directories() done } -# Check if SONiC switch has booted after a warm reboot request +# Check if SONiC switch has booted after a warm reboot request. +# Prefers STATE_DB when available (reflects true warm boot state and +# gets cleared after warm boot completes). Falls back to /proc/cmdline +# only during the "boot" command when database services may not be up yet. check_system_warm_boot() { - SYSTEM_WARM_START=`sonic-db-cli STATE_DB hget "WARM_RESTART_ENABLE_TABLE|system" enable` - # SYSTEM_WARM_START could be empty, always make WARM_BOOT meaningful. - if [[ x"$SYSTEM_WARM_START" == x"true" ]]; then - WARM_BOOT="true" - else - WARM_BOOT="false" + WARM_BOOT="false" + + # Try STATE_DB first — authoritative source that reflects current + # warm boot state and is cleared after warm boot completes. + SYSTEM_WARM_START=$(sonic-db-cli STATE_DB hget "WARM_RESTART_ENABLE_TABLE|system" enable) + DB_RC=$? + + if [ $DB_RC -eq 0 ]; then + # DB is reachable — use its answer exclusively + if [[ x"$SYSTEM_WARM_START" == x"true" ]]; then + WARM_BOOT="true" + fi + return + fi + + # DB not available — fall back to /proc/cmdline only during boot, + # when database services may not have started yet. + # Outside of boot context, /proc/cmdline may contain a stale + # SONIC_BOOT_TYPE=warm from a previous warm reboot. + if [ "$CMD" = "boot" ]; then + case "$(cat /proc/cmdline)" in + *SONIC_BOOT_TYPE=warm*) + WARM_BOOT="true" + ;; + esac fi } @@ -256,11 +278,24 @@ generate_config() } # Create SONiC configuration for first time bootup -# - If ZTP is enabled, ZTP configuraion is created -# - If ZTP is disabled, factory default configuration +# - If minigraph.xml is available, use it to generate configuration +# - If ZTP is enabled and no minigraph, ZTP configuration is created +# - If ZTP is disabled and no minigraph, factory default configuration # is created do_config_initialization() { + # If minigraph.xml is available, prefer it over ZTP/factory default. + # This avoids ZTP triggering a config reload that removes management IP + # when the device has a valid minigraph but no config_db.json + # (e.g., during upgrade path tests). + if [ -r ${MINGRAPH_FILE} ]; then + echo "No config_db.json found but minigraph.xml is available, using minigraph..." + reload_minigraph + rm -f /etc/sonic/pending_config_initialization + sonic-db-cli CONFIG_DB SET "CONFIG_DB_INITIALIZED" "1" + return 0 + fi + if ! ztp_is_enabled ; then echo "No configuration detected, generating factory default configuration..." generate_config factory ${CONFIG_DB_JSON} @@ -274,7 +309,7 @@ do_config_initialization() rm -f ${TMP_ZTP_CONFIG_DB_JSON} fi - rm -f /tmp/pending_config_initialization + rm -f /etc/sonic/pending_config_initialization sonic-db-cli CONFIG_DB SET "CONFIG_DB_INITIALIZED" "1" } @@ -370,7 +405,7 @@ do_config_migration() if [ x"${WARM_BOOT}" == x"true" ]; then echo "Warm reboot detected..." do_db_migration - rm -f /tmp/pending_config_migration + rm -f /etc/sonic/pending_config_migration exit 0 elif check_all_config_db_present; then echo "Use config_db.json from old system..." @@ -384,7 +419,7 @@ do_config_migration() echo "Didn't found neither config_db.json nor minigraph.xml ..." fi - rm -f /tmp/pending_config_migration + rm -f /etc/sonic/pending_config_migration } # Take a backup of current SONiC configuration @@ -408,10 +443,22 @@ do_config_backup() boot_config() { check_system_warm_boot - if [ -e /tmp/pending_config_migration ] || [ -e ${CONFIG_SETUP_POST_MIGRATION_FLAG} ]; then + if [ -e /etc/sonic/pending_config_migration ] || [ -e ${CONFIG_SETUP_POST_MIGRATION_FLAG} ]; then do_config_migration fi + # During warm boot the existing configuration must be preserved. + # Never run config initialization or ZTP — doing so would generate + # a new config and trigger config reload, wiping management IP. + if [ x"${WARM_BOOT}" == x"true" ]; then + echo "Warm boot detected, skipping config initialization and ZTP." + # Mark config as initialized so subsequent boots don't re-trigger + # initialization unnecessarily (warm-reboot to new image scenario). + sonic-db-cli CONFIG_DB SET "CONFIG_DB_INITIALIZED" "1" + rm -f /etc/sonic/pending_config_initialization + return 0 + fi + # For multi-npu platfrom we don't support config initialization. Assumption # is there should be existing minigraph or config_db from previous image # file system to trigger. pending_config_initialization will remain set @@ -420,15 +467,18 @@ boot_config() return 0 fi - if [ -e /tmp/pending_config_initialization ] || [ -e ${CONFIG_SETUP_INITIALIZATION_FLAG} ]; then + if [ -e /etc/sonic/pending_config_initialization ] || [ -e ${CONFIG_SETUP_INITIALIZATION_FLAG} ]; then do_config_initialization fi - # If no startup configuration is found, create a configuration to be used + # If no startup configuration is found, create a configuration to be used. + # do_config_initialization() will prefer minigraph.xml if available, + # falling back to ZTP or factory default only when no minigraph exists. if [ ! -e ${CONFIG_DB_JSON} ]; then do_config_initialization - # force ZTP to restart - if ztp_is_enabled ; then + # force ZTP to restart (only relevant when ZTP was actually used, + # i.e., when minigraph.xml was not available) + if [ ! -e ${MINGRAPH_FILE} ] && ztp_is_enabled ; then ztp_status=$(ztp status -c) if [ "$ztp_status" = "5:SUCCESS" ] || \ [ "$ztp_status" = "6:FAILED" ]; then @@ -460,6 +510,18 @@ if [[ -f "$PLATFORM_ENV_CONF_FILE" ]]; then source $PLATFORM_ENV_CONF_FILE fi +# On BMC/Switch-Host platforms, copy bmc.json to /etc/sonic/. +# Platform-specific bmc.json takes priority over the image-wide template. +if [[ "${switch_bmc}" == "1" || "${switch_host}" == "1" ]]; then + PLATFORM_BMC_JSON="/usr/share/sonic/device/$PLATFORM/bmc.json" + TEMPLATE_BMC_JSON="/usr/share/sonic/templates/bmc.json" + if [[ -f "$PLATFORM_BMC_JSON" ]]; then + cp "$PLATFORM_BMC_JSON" /etc/sonic/bmc.json + elif [[ -f "$TEMPLATE_BMC_JSON" ]]; then + cp "$TEMPLATE_BMC_JSON" /etc/sonic/bmc.json + fi +fi + CMD=$1 # Default command is boot if [ "$CMD" = "" ] || [ "$CMD" = "help" ] || \ diff --git a/files/image_config/constants/bmc.json b/files/image_config/constants/bmc.json new file mode 100644 index 00000000000..c1fad5f27e9 --- /dev/null +++ b/files/image_config/constants/bmc.json @@ -0,0 +1,6 @@ +{ + "bmc_if_name": "bmc0", + "bmc_if_addr": "169.254.100.2", + "bmc_addr": "169.254.100.1", + "bmc_net_mask": "255.255.255.252" +} diff --git a/files/image_config/constants/constants.yml b/files/image_config/constants/constants.yml index 61c28d8be46..4ffbdedcb42 100644 --- a/files/image_config/constants/constants.yml +++ b/files/image_config/constants/constants.yml @@ -13,6 +13,7 @@ constants: anchor_contributing_route_community: 12345:777 route_do_not_send_appdb_tag: 202 route_eligible_for_fallback_to_default_tag: 203 + hide_internal_community: 55555:55555 families: - ipv4 - ipv6 @@ -71,3 +72,7 @@ constants: enabled: true db_table: "BGP_SENTINELS" template_dir: "sentinels" + prefix_list: + SUPPRESS_PREFIX: + ipv4_name: "SUPPRESS_IPV4_PREFIX" + ipv6_name: "SUPPRESS_IPV6_PREFIX" diff --git a/files/image_config/dhcp_dos_logger/dhcp_dos_logger.py b/files/image_config/dhcp_dos_logger/dhcp_dos_logger.py index 86409ee49e8..52324a5fe92 100644 --- a/files/image_config/dhcp_dos_logger/dhcp_dos_logger.py +++ b/files/image_config/dhcp_dos_logger/dhcp_dos_logger.py @@ -4,34 +4,62 @@ import subprocess import time from sonic_py_common.logger import Logger -from swsscommon.swsscommon import ConfigDBConnector +from sonic_py_common import daemon_base +from swsscommon import swsscommon +from swsscommon.swsscommon import ConfigDBConnector, SonicDBConfig +from sonic_py_common import multi_asic SYSLOG_IDENTIFIER = os.path.basename(__file__) logger = Logger(SYSLOG_IDENTIFIER) logger.log_info("Starting DHCP DoS logger...") -config_db = ConfigDBConnector() -config_db.connect() +# Cache the multi-ASIC check result at startup +is_multi_asic = multi_asic.is_multi_asic() -ports = config_db.get_table('PORT').keys() -logger.log_info(f"Monitoring ports: {list(ports)}") -drop_pkts = {port: 0 for port in ports} +if is_multi_asic: + SonicDBConfig.initializeGlobalConfig() + ports_table = multi_asic.get_table('PORT') +else: + config_db = ConfigDBConnector() + config_db.connect() + ports_table = config_db.get_table('PORT') + +logger.log_info(f"Monitoring ports: {list(ports_table.keys())}") +drop_pkts = {port: 0 for port in ports_table} + +#Get Linux network namespace for a port +def get_port_namespace(port): + try: + return multi_asic.get_namespace_for_port(port) + except Exception: + return None + +#Check if interface exists for a port in the namespace +def interface_exists(ifname, namespace=None): + if is_multi_asic and namespace is not None: + output = subprocess.run(["ip", "netns", "exec", namespace, "test", "-e", f"/sys/class/net/{ifname}"], capture_output=True) + return output.returncode == 0 -def interface_exists(ifname): return os.path.exists(f"/sys/class/net/{ifname}") def handler(): while True: for port in drop_pkts.keys(): - if not interface_exists(port): + if is_multi_asic: + namespace = get_port_namespace(port) + else: + namespace = None + + #Check if the interface exist for the port in that namespace + if not interface_exists(port, namespace): logger.log_warning(f"Skipping non-existent interface: {port}") continue try: - output = subprocess.run( - ["tc", "-s", "qdisc", "show", "dev", str(port), "handle", "ffff:"], - capture_output=True, - text=True - ) + cmd = ["tc", "-s", "qdisc", "show", "dev", str(port), "handle", "ffff:"] + if is_multi_asic and namespace is not None: + cmd = ["ip", "netns", "exec", namespace] + cmd + + output = subprocess.run(cmd, capture_output=True, text=True) logger.log_debug(f"TC output for {port}: {output.stdout}") if output.returncode == 0: @@ -50,5 +78,45 @@ def handler(): logger.log_error(f"Error on port {port}: {str(e)}") time.sleep(10) +def wait_for_port_init_done(): + """ + Wait for PortInitDone event from APP_DB. + + Returns: + None (blocks until PortInitDone is received or timeout occurs) + """ + MAX_WAIT_SECONDS = 300 + appl_db = daemon_base.db_connect("APPL_DB") + + sel = swsscommon.Select() + sst = swsscommon.SubscriberStateTable(appl_db, swsscommon.APP_PORT_TABLE_NAME) + sel.addSelectable(sst) + + logger.log_info("Waiting for PortInitDone...") + start_time = time.time() + while True: + (state, _) = sel.select(1000) + elapsed = time.time() - start_time + + if elapsed >= MAX_WAIT_SECONDS: + logger.log_warning("Timed out waiting for PortInitDone, proceeding anyway") + return + + if state == swsscommon.Select.TIMEOUT: + continue + if state != swsscommon.Select.OBJECT: + logger.log_warning("sel.select() did not return swsscommon.Select.OBJECT") + continue + + while True: + (key, _, _) = sst.pop() + if not key: + break + + if key == "PortInitDone": + logger.log_info("PortInitDone received") + return + if __name__ == "__main__": + wait_for_port_init_done() handler() diff --git a/files/image_config/interfaces/interfaces-config.sh b/files/image_config/interfaces/interfaces-config.sh index 669d12849f1..fad6993bc7f 100755 --- a/files/image_config/interfaces/interfaces-config.sh +++ b/files/image_config/interfaces/interfaces-config.sh @@ -70,7 +70,29 @@ CFGGEN_PARAMS=" \ -t /usr/share/sonic/templates/90-dhcp6-systcl.conf.j2,/etc/sysctl.d/90-dhcp6-systcl.conf \ -t /usr/share/sonic/templates/dhclient.conf.j2,/etc/dhcp/dhclient.conf \ " -sonic-cfggen $CFGGEN_PARAMS + +# On BMC/Switch-Host platforms, pass bmc.json and the role to sonic-cfggen +# so interfaces.j2 can render the BMC interface stanza with the correct IP. +# switch_bmc=1 -> use bmc_addr (BMC's own IP on the link) +# switch_host=1 -> use bmc_if_addr (Switch-Host's IP on the BMC link) +PLATFORM=$(sonic-cfggen -d -v DEVICE_METADATA.localhost.platform 2>/dev/null) +PLATFORM_ENV_CONF="/usr/share/sonic/device/$PLATFORM/platform_env.conf" +IS_SWITCH_BMC=0 +IS_SWITCH_HOST=0 +if [[ -f "$PLATFORM_ENV_CONF" ]]; then + grep -q '^switch_bmc=1' "$PLATFORM_ENV_CONF" && IS_SWITCH_BMC=1 + grep -q '^switch_host=1' "$PLATFORM_ENV_CONF" && IS_SWITCH_HOST=1 +fi +if [[ $IS_SWITCH_BMC -eq 1 || $IS_SWITCH_HOST -eq 1 ]]; then + if [[ -f "/etc/sonic/bmc.json" ]]; then + sonic-cfggen $CFGGEN_PARAMS -j /etc/sonic/bmc.json \ + -a "{\"IS_SWITCH_BMC\": $IS_SWITCH_BMC, \"IS_SWITCH_HOST\": $IS_SWITCH_HOST}" + else + sonic-cfggen $CFGGEN_PARAMS + fi +else + sonic-cfggen $CFGGEN_PARAMS +fi [[ -f /var/run/dhclient.eth0.pid ]] && kill `cat /var/run/dhclient.eth0.pid` && rm -f /var/run/dhclient.eth0.pid [[ -f /var/run/dhclient6.eth0.pid ]] && kill `cat /var/run/dhclient6.eth0.pid` && rm -f /var/run/dhclient6.eth0.pid @@ -86,7 +108,23 @@ resolvconf_updates_restore # Read sysctl conf files again sysctl -p /etc/sysctl.d/90-dhcp6-systcl.conf -systemctl restart networking +MAX_RETRIES=5 +RETRY_DELAY=2 +for ((i=1; i<=MAX_RETRIES; i++)); do + LOG_MARK=$(date '+%Y-%m-%d %H:%M:%S') + if systemctl restart networking; then + if journalctl -u networking --since "$LOG_MARK" | grep -q "error.*already running"; then + echo "interfaces-config: error during networking restart in attempt $i. Retrying in ${RETRY_DELAY} seconds..." + sleep "${RETRY_DELAY}" + else + echo "interfaces-config: systemctl restart networking succeeded on attempt $i" + break + fi + else + echo "interfaces-config: Attempt $i to restart networking failed. Retrying in ${RETRY_DELAY} seconds..." + sleep "${RETRY_DELAY}" + fi +done # Clean-up created files rm -f /tmp/ztp_input.json /tmp/ztp_port_data.json diff --git a/files/image_config/interfaces/interfaces.j2 b/files/image_config/interfaces/interfaces.j2 index 224694cb3a7..1d71e2f9a2c 100644 --- a/files/image_config/interfaces/interfaces.j2 +++ b/files/image_config/interfaces/interfaces.j2 @@ -9,7 +9,7 @@ {% if (MGMT_VRF_CONFIG) and (MGMT_VRF_CONFIG['vrf_global']['mgmtVrfEnabled'] == "true") %} auto mgmt iface mgmt - vrf-table 5000 + vrf-table 6000 # The loopback network interface for mgmt VRF that is required for applications like NTP up ip link add lo-m type dummy up ip link set dev lo-m master mgmt @@ -30,12 +30,20 @@ iface lo inet loopback {% endblock loopback %} {% block mgmt_interface %} -{%- if DEVICE_METADATA and 'bmc' in DEVICE_METADATA.keys() and ('bmc_if_name' in DEVICE_METADATA['bmc']) and ('bmc_if_addr' in DEVICE_METADATA['bmc']) and ('bmc_net_mask' in DEVICE_METADATA['bmc']) %} -# BMC interface -auto {{ DEVICE_METADATA['bmc']['bmc_if_name'] }} -iface {{ DEVICE_METADATA['bmc']['bmc_if_name'] }} inet static - address {{ DEVICE_METADATA['bmc']['bmc_if_addr'] }} - netmask {{ DEVICE_METADATA['bmc']['bmc_net_mask'] }} +{%- if bmc_if_name is defined and bmc_net_mask is defined %} +{%- if IS_SWITCH_BMC == 1 and bmc_addr is defined %} +# BMC interface (Switch-BMC side) +auto {{ bmc_if_name }} +iface {{ bmc_if_name }} inet static + address {{ bmc_addr }} + netmask {{ bmc_net_mask }} +{%- elif IS_SWITCH_HOST == 1 and bmc_if_addr is defined %} +# BMC interface (Switch-Host side) +auto {{ bmc_if_name }} +iface {{ bmc_if_name }} inet static + address {{ bmc_if_addr }} + netmask {{ bmc_net_mask }} +{%- endif %} {%- endif %} # The management network interface @@ -81,28 +89,33 @@ iface {{ name }} {{ 'inet' if prefix | ipv4 else 'inet6' }} static address {{ prefix | ip }} netmask {{ prefix | netmask if prefix | ipv4 else prefix | prefixlen }} network {{ prefix | network }} +{% if prefix | broadcast %} broadcast {{ prefix | broadcast }} +{% endif %} {% set vrf_table = 'default' %} {% if (MGMT_VRF_CONFIG) and (MGMT_VRF_CONFIG['vrf_global']['mgmtVrfEnabled'] == "true") %} -{% set vrf_table = '5000' %} +{% set vrf_table = '6000' %} vrf mgmt {% endif %} {% set force_mgmt_route_priority = 32764 %} ########## management network policy routing rules # management port up rules - up ip {{ '-4' if prefix | ipv4 else '-6' }} route add default via {{ MGMT_INTERFACE[(name, prefix)]['gwaddr'] }} dev {{ name }} table {{ vrf_table }} metric 201 up ip {{ '-4' if prefix | ipv4 else '-6' }} route add {{ prefix | network }}/{{ prefix | prefixlen }} dev {{ name }} table {{ vrf_table }} + up ip {{ '-4' if prefix | ipv4 else '-6' }} route add default via {{ MGMT_INTERFACE[(name, prefix)]['gwaddr'] }} dev {{ name }} table {{ vrf_table }} metric 201 up ip {{ '-4' if prefix | ipv4 else '-6' }} rule add pref {{ force_mgmt_route_priority + 1 }} from {{ prefix | ip }}/{{ '32' if prefix | ipv4 else '128' }} table {{ vrf_table }} {% for route in MGMT_INTERFACE[(name, prefix)]['forced_mgmt_routes'] %} up ip {{ '-4' if prefix | ipv4 else '-6' }} rule add pref {{ force_mgmt_route_priority }} to {{ route }} table {{ vrf_table }} {% endfor %} {% if SYSLOG_SERVER is defined and SYSLOG_SERVER %} {% for server in SYSLOG_SERVER %} +{% set server_vrf = SYSLOG_SERVER[server].get('vrf', '') if SYSLOG_SERVER[server] is mapping else '' %} +{% if server_vrf == '' or server_vrf == 'mgmt' %} {% if server | ipv4 and prefix | ipv4 %} up ip rule add pref {{ force_mgmt_route_priority }} to {{ server }}/32 table {{ vrf_table }} {% elif server | ipv6 and prefix | ipv6 %} up ip -6 rule add pref {{ force_mgmt_route_priority }} to {{ server }}/128 table {{ vrf_table }} {% endif %} +{% endif %} {% endfor %} {% else %} {% if prefix | ipv4 %} @@ -122,11 +135,14 @@ iface {{ name }} {{ 'inet' if prefix | ipv4 else 'inet6' }} static {% endfor %} {% if SYSLOG_SERVER is defined and SYSLOG_SERVER %} {% for server in SYSLOG_SERVER %} +{% set server_vrf = SYSLOG_SERVER[server].get('vrf', '') if SYSLOG_SERVER[server] is mapping else '' %} +{% if server_vrf == '' or server_vrf == 'mgmt' %} {% if server | ipv4 and prefix | ipv4 %} down ip rule delete pref {{ force_mgmt_route_priority }} to {{ server }}/32 table {{ vrf_table }} {% elif server | ipv6 and prefix | ipv6 %} down ip -6 rule delete pref {{ force_mgmt_route_priority }} to {{ server }}/128 table {{ vrf_table }} {% endif %} +{% endif %} {% endfor %} {% else %} {% if prefix | ipv4 %} diff --git a/files/image_config/logrotate/logrotate.d/bmc-event b/files/image_config/logrotate/logrotate.d/bmc-event new file mode 100644 index 00000000000..c682194cdb0 --- /dev/null +++ b/files/image_config/logrotate/logrotate.d/bmc-event @@ -0,0 +1,13 @@ +# BMC persistent event log: leak events, Switch-Host power state changes, +# and Rack Manager interactions. Lives on /host (eMMC) so it survives +# reboots and tmpfs-mounted /var/log. +/host/bmc/event.log { + missingok + notifempty + size 10M + rotate 5 + compress + delaycompress + copytruncate + create 0640 root root +} diff --git a/files/image_config/midplane-network/midplane-network-npu.network b/files/image_config/midplane-network/midplane-network-npu.network index 8cc4a226498..ca04668ca78 100644 --- a/files/image_config/midplane-network/midplane-network-npu.network +++ b/files/image_config/midplane-network/midplane-network-npu.network @@ -3,3 +3,4 @@ Name=dpu* [Network] Bridge=bridge-midplane +KeepConfiguration=static diff --git a/files/image_config/monit/memory_checker b/files/image_config/monit/memory_checker index 974de07f188..b9bc6e4be19 100755 --- a/files/image_config/monit/memory_checker +++ b/files/image_config/monit/memory_checker @@ -248,7 +248,8 @@ def get_running_container_names(): """ try: docker_client = docker.DockerClient(base_url='unix://var/run/docker.sock') - running_container_list = docker_client.containers.list(filters={"status": "running"}) + running_container_list = docker_client.containers.list(filters={"status": "running"}, + ignore_removed=True) running_container_names = [ container.name for container in running_container_list ] except (docker.errors.APIError, docker.errors.DockerException) as err: if not is_service_active("docker"): diff --git a/files/image_config/platform/rc.local b/files/image_config/platform/rc.local index a396369c21b..c27f65dfcf7 100755 --- a/files/image_config/platform/rc.local +++ b/files/image_config/platform/rc.local @@ -279,7 +279,7 @@ if [ -f $FIRST_BOOT_FILE ]; then if [ -d /host/old_config ]; then mv -f /host/old_config /etc/sonic/ rm -rf /etc/sonic/old_config/old_config - touch /tmp/pending_config_migration + touch /etc/sonic/pending_config_migration elif [ -f /host/minigraph.xml ]; then mkdir -p /etc/sonic/old_config mv /host/minigraph.xml /etc/sonic/old_config/ @@ -287,7 +287,7 @@ if [ -f $FIRST_BOOT_FILE ]; then [ -f /host/port_config.json ] && mv /host/port_config.json /etc/sonic/old_config/ [ -f /host/snmp.yml ] && mv /host/snmp.yml /etc/sonic/old_config/ [ -f /host/golden_config_db.json ] && mv /host/golden_config_db.json /etc/sonic/old_config/ - touch /tmp/pending_config_migration + touch /etc/sonic/pending_config_migration elif [ -n "$migration" ] && [ -f /host/migration/minigraph.xml ]; then mkdir -p /etc/sonic/old_config mv /host/migration/minigraph.xml /etc/sonic/old_config/ @@ -295,9 +295,21 @@ if [ -f $FIRST_BOOT_FILE ]; then [ -f /host/migration/port_config.json ] && mv /host/migration/port_config.json /etc/sonic/old_config/ [ -f /host/migration/snmp.yml ] && mv /host/migration/snmp.yml /etc/sonic/old_config/ [ -f /host/migration/golden_config_db.json ] && mv /host/migration/golden_config_db.json /etc/sonic/old_config/ - touch /tmp/pending_config_migration + touch /etc/sonic/pending_config_migration else - touch /tmp/pending_config_initialization + # config-setup boot_config() skips do_config_initialization on + # multi-ASIC platforms, so creating pending_config_initialization + # there leaves CONFIG_DB_INITIALIZED stuck at 0 and blocks + # swss@N forever. Source asic.conf to learn NUM_ASIC; if it is + # missing or unparseable the original behavior is preserved. + NUM_ASIC= + ASIC_CONF=/usr/share/sonic/device/$platform/asic.conf + [ -f "$ASIC_CONF" ] && . "$ASIC_CONF" + if [ "$NUM_ASIC" -gt 1 ] 2>/dev/null; then + echo "Multi-ASIC platform detected (NUM_ASIC=$NUM_ASIC), skip creating pending_config_initialization flag file" + else + touch /etc/sonic/pending_config_initialization + fi fi # Notify firstboot to Platform, to use it for reboot-cause @@ -416,6 +428,16 @@ if [ -f $FIRST_BOOT_FILE ]; then # Kdump tools configuration [ -f /etc/default/kdump-tools ] && sed -i -e "s/__PLATFORM__/$platform/g" /etc/default/kdump-tools + # On Switch-BMC systems, create the persistent BMC event log directory and + # file on /host (eMMC-backed) so that leak, power and host-state events + # survive reboots. /var/log is on tmpfs so it is NOT used for this. + PLATFORM_ENV_CONF="/usr/share/sonic/device/$platform/platform_env.conf" + if [ -f "$PLATFORM_ENV_CONF" ] && grep -q '^switch_bmc=1' "$PLATFORM_ENV_CONF" 2>/dev/null; then + mkdir -p /host/bmc + touch /host/bmc/event.log + chmod 640 /host/bmc/event.log + fi + firsttime_exit fi diff --git a/files/image_config/reset-factory/reset-factory b/files/image_config/reset-factory/reset-factory index fc86737c9d0..3cc6567546a 100755 --- a/files/image_config/reset-factory/reset-factory +++ b/files/image_config/reset-factory/reset-factory @@ -174,7 +174,7 @@ if [ "$FACTORY_TYPE" != "only-config" ]; then clear_sonic_dir echo "Clear warmboot folder" - find /host/warmboot/ -type f -delete + find /host/warmboot*/ -type f -delete echo "Delete reboot-cause files and symlinks" find /host/reboot-cause/ -type l,f -delete diff --git a/files/image_config/resolv-config/resolv.conf.j2 b/files/image_config/resolv-config/resolv.conf.j2 index c51e35f30b6..293c98c5ded 100644 --- a/files/image_config/resolv-config/resolv.conf.j2 +++ b/files/image_config/resolv-config/resolv.conf.j2 @@ -2,20 +2,19 @@ nameserver {{ ip }} {% endfor -%} -{%- if DNS_OPTIONS is defined %} -{% set search = DNS_OPTIONS.get('search') %} -{% if search is not none %} -search {{ search.split(",") | join(" ") }} +{%- if DNS_OPTIONS is defined and DNS_OPTIONS["GLOBAL"] is defined %} +{% if DNS_OPTIONS["GLOBAL"]["search"] is defined %} +search {{ DNS_OPTIONS["GLOBAL"]["search"] | join(" ") }} {% endif %} {% set options="" %} -{% if DNS_OPTIONS["ndots"] is defined %} -{% set options = options ~ ' ndots:' ~ DNS_OPTIONS["ndots"] %} +{% if DNS_OPTIONS["GLOBAL"]["ndots"] is defined %} +{% set options = options ~ ' ndots:' ~ DNS_OPTIONS["GLOBAL"]["ndots"] %} {% endif %} -{% if DNS_OPTIONS["timeout"] is defined %} -{% set options = options ~ ' timeout:' ~ DNS_OPTIONS["timeout"] %} +{% if DNS_OPTIONS["GLOBAL"]["timeout"] is defined %} +{% set options = options ~ ' timeout:' ~ DNS_OPTIONS["GLOBAL"]["timeout"] %} {% endif %} -{% if DNS_OPTIONS["attempts"] is defined %} -{% set options = options ~ ' attempts:' ~ DNS_OPTIONS["attempts"] %} +{% if DNS_OPTIONS["GLOBAL"]["attempts"] is defined %} +{% set options = options ~ ' attempts:' ~ DNS_OPTIONS["GLOBAL"]["attempts"] %} {% endif %} {% if options|length > 0 %} options{{ options }} diff --git a/files/image_config/resolv-config/update-containers b/files/image_config/resolv-config/update-containers index ca2ef3f8b2d..577e12494d6 100755 --- a/files/image_config/resolv-config/update-containers +++ b/files/image_config/resolv-config/update-containers @@ -87,13 +87,6 @@ if [[ $# -gt 0 ]]; then exit $? fi -# Check if networking service is active (only for bulk updates) -networking_status=$(systemctl is-active networking.service 2>/dev/null) -if [[ $networking_status != "active" ]]; then - log_message "info" "Networking service is not active, skipping container updates" - exit 0 -fi - # If no container name provided, update only running containers log_message "info" "Starting resolv.conf update for running containers" diff --git a/files/image_config/rsyslog/rsyslog-config.sh b/files/image_config/rsyslog/rsyslog-config.sh index 52cb3c10371..90b3e613920 100755 --- a/files/image_config/rsyslog/rsyslog-config.sh +++ b/files/image_config/rsyslog/rsyslog-config.sh @@ -40,8 +40,40 @@ if [ -z "$syslog_counter" ]; then syslog_counter="false" fi +# Generate config to a temp file so we can compare before restarting. +# On Debian 13 (Trixie), rsyslog.service has systemd sandboxing directives +# (PrivateTmp, ProtectSystem, etc.) that add ~4 seconds of overhead per +# restart due to namespace setup/teardown. Skipping the restart when the +# config is unchanged avoids this delay on warm/fast reboot and config_reload +# where nothing actually changed. +# +# When the config IS unchanged we still send SIGHUP so rsyslog re-opens its +# log files (needed after log rotation or /var/log remounts). +# +# See: https://github.com/sonic-net/sonic-buildimage/issues/25382 + +TMPFILE=$(mktemp /tmp/rsyslog.conf.XXXXXX) +trap 'rm -f "$TMPFILE"' EXIT + sonic-cfggen -d -t /usr/share/sonic/templates/rsyslog.conf.j2 \ -a "{\"udp_server_ip\": \"$udp_server_ip\", \"hostname\": \"$hostname\", \"docker0_ip\": \"$docker0_ip\", \"forward_with_osversion\": \"$syslog_with_osversion\", \"os_version\": \"$os_version\", \"syslog_counter\": \"$syslog_counter\"}" \ - > /etc/rsyslog.conf + > "$TMPFILE" -systemctl restart rsyslog +if [ ! -f /etc/rsyslog.conf ] || ! cmp -s "$TMPFILE" /etc/rsyslog.conf; then + # Config changed (or first boot) — install and restart + if cp "$TMPFILE" /etc/rsyslog.conf; then + systemctl restart rsyslog + else + echo "Failed to update /etc/rsyslog.conf; not restarting rsyslog" >&2 + exit 1 + fi +else + if [[ ($NUM_ASIC -gt 1) ]]; then + # multi-asic, docker0 IP interface may not be present when rsyslog.service was started. + # restart the rsyslog for TCP port socket binding. + systemctl restart rsyslog + else + # Config unchanged — just signal rsyslog to re-open log files + systemctl kill -s HUP rsyslog + fi +fi diff --git a/files/image_config/rsyslog/rsyslog-container.conf.j2 b/files/image_config/rsyslog/rsyslog-container.conf.j2 index eb13ddd7bb0..c482862f0dd 100644 --- a/files/image_config/rsyslog/rsyslog-container.conf.j2 +++ b/files/image_config/rsyslog/rsyslog-container.conf.j2 @@ -9,8 +9,6 @@ #### MODULES #### ################# -$ModLoad imuxsock # provides support for local system logging - # # Set a rate limit on messages from the container # @@ -26,27 +24,17 @@ $ModLoad imuxsock # provides support for local system logging {% endif %} {% endif %} -{% if rate_limit_interval is defined %} -$SystemLogRateLimitInterval {{ rate_limit_interval }} -{% else %} -$SystemLogRateLimitInterval 300 -{% endif %} -{% if rate_limit_burst is defined %} -$SystemLogRateLimitBurst {{ rate_limit_burst }} -{% else %} -$SystemLogRateLimitBurst 20000 -{% endif %} - -#$ModLoad imklog # provides kernel logging support -#$ModLoad immark # provides --MARK-- message capability +module(load="imuxsock" SysSock.RateLimit.Interval="{{ rate_limit_interval|default('300') }}" SysSock.RateLimit.Burst="{{ rate_limit_burst|default('20000') }}") # provides support for local system logging +#module(load="imklog") # provides kernel logging support +#module(load="immark") # provides --MARK-- message capability # provides UDP syslog reception -#$ModLoad imudp -#$UDPServerRun 514 +#module(load="imudp") +#input(type="imudp" port="514") # provides TCP syslog reception -#$ModLoad imtcp -#$InputTCPServerRun 514 +#module(load="imtcp") +#input(type="imtcp" port="514") ########################### @@ -71,17 +59,8 @@ if ($.PLATFORM == "x86_64-mlnx_msn2700-r0" or $.PLATFORM == "x86_64-mlnx_msn2700 # Set remote syslog server template (name="ForwardFormatInContainer" type="string" string="<%PRI%>%TIMESTAMP:::date-rfc3339% %HOSTNAME% %$.CONTAINER_NAME%#%syslogtag%%msg:::sp-if-no-1st-sp%%msg%") -*.* action(type="omfwd" target=`echo $SYSLOG_TARGET_IP` port="514" protocol="udp" Template="ForwardFormatInContainer") - -# -# Use traditional timestamp format. -# To enable high precision timestamps, comment out the following line. -# -#$ActionFileDefaultTemplate RSYSLOG_TraditionalFileFormat - -# Define a custom template -$template SONiCFileFormat,"%TIMESTAMP%.%timestamp:::date-subseconds% %HOSTNAME% %syslogseverity-text:::uppercase% %$.CONTAINER_NAME%#%syslogtag%%msg:::sp-if-no-1st-sp%%msg:::drop-last-lf%\n" -$ActionFileDefaultTemplate SONiCFileFormat +module(load="omrelp") +*.* action(type="omrelp" target=`echo $SYSLOG_TARGET_IP` port="2514" action.resumeRetryCount="60" queue.type="LinkedList" queue.size="20000" Template="ForwardFormatInContainer") # # Set the default permissions for all log files. @@ -109,4 +88,4 @@ $RepeatedMsgReduction on ############### #### RULES #### -############### \ No newline at end of file +############### diff --git a/files/image_config/rsyslog/rsyslog.conf.j2 b/files/image_config/rsyslog/rsyslog.conf.j2 index 7495b225025..c7dc6949d3c 100644 --- a/files/image_config/rsyslog/rsyslog.conf.j2 +++ b/files/image_config/rsyslog/rsyslog.conf.j2 @@ -13,40 +13,36 @@ #### MODULES #### ################# -$ModLoad imuxsock # provides support for local system logging -{% if syslog_counter and syslog_counter == "true" %} -$ModLoad omprog -{% endif %} - {% set gconf = (SYSLOG_CONFIG | d({})).get('GLOBAL', {}) -%} -{% set rate_limit_interval = gconf.get('rate_limit_interval') %} -{% set rate_limit_burst = gconf.get('rate_limit_burst') %} +{% set rate_limit_interval = gconf.get('rate_limit_interval') -%} +{% set rate_limit_burst = gconf.get('rate_limit_burst') -%} -{% if rate_limit_interval is not none %} -$SystemLogRateLimitInterval {{ rate_limit_interval }} -{% endif %} -{% if rate_limit_burst is not none %} -$SystemLogRateLimitBurst {{ rate_limit_burst }} -{% endif %} +global(net.enableDNS="off") -$ModLoad imklog # provides kernel logging support -$KlogParseKernelTimestamp off -$KlogKeepKernelTimestamp on - -#$ModLoad immark # provides --MARK-- message capability +module(load="imuxsock" {% if rate_limit_interval is not none %}SysSock.RateLimit.Interval="{{ rate_limit_interval }}"{% endif %} {% if rate_limit_burst is not none %}SysSock.RateLimit.Burst="{{ rate_limit_burst }}"{% endif %}) # provides support for local system logging +module(load="imklog" ParseKernelTimestamp="off" KeepKernelTimestamp="on") # provides kernel logging support +#module(load="immark") # provides --MARK-- message capability +{% if syslog_counter and syslog_counter == "true" %} +module(load="omprog") +{% endif %} # provides UDP syslog reception -$ModLoad imudp -$UDPServerAddress {{udp_server_ip}} #bind to localhost before udp server run -$UDPServerRun 514 -{% if docker0_ip and docker0_ip != "" %} -$UDPServerAddress {{docker0_ip}} -$UDPServerRun 514 +module(load="imudp") +input(type="imudp" address="{{udp_server_ip}}" port="514") +{% if docker0_ip and docker0_ip != "" and docker0_ip != udp_server_ip %} +input(type="imudp" address="{{docker0_ip}}" port="514") {% endif%} # provides TCP syslog reception -#$ModLoad imtcp -#$InputTCPServerRun 514 +#module(load="imtcp") +#input(type="imtcp" port="514") + +# provides RELP syslog reception +module(load="imrelp") +input(type="imrelp" address="{{udp_server_ip}}" port="2514") +{% if docker0_ip and docker0_ip != "" and docker0_ip != udp_server_ip %} +input(type="imrelp" address="{{docker0_ip}}" port="2514") +{% endif%} ########################### @@ -61,7 +57,7 @@ $UDPServerRun 514 #$ActionFileDefaultTemplate RSYSLOG_TraditionalFileFormat # Define a custom template -$template SONiCFileFormat,"%timegenerated:::date-year% %timegenerated%.%timegenerated:::date-subseconds% {{ hostname }} %syslogseverity-text:::uppercase% %syslogtag%%msg:::sp-if-no-1st-sp%%msg:::drop-last-lf%\n" +$template SONiCFileFormat,"%TIMESTAMP:::date-year% %TIMESTAMP%.%TIMESTAMP:::date-subseconds% {{ hostname }} %syslogseverity-text:::uppercase% %syslogtag%%msg:::sp-if-no-1st-sp%%msg:::drop-last-lf%\n" $ActionFileDefaultTemplate SONiCFileFormat $template SONiCForwardFormat,"<%PRI%>%TIMESTAMP:::date-rfc3339% {{ hostname }} %syslogseverity-text:::uppercase% %syslogtag%%msg:::sp-if-no-1st-sp%%msg:::drop-last-lf%\n" $template SONiCForwardFormatWithOsVersion,"<%PRI%>%TIMESTAMP:::date-rfc3339% {{ hostname }} {{os_version}} %syslogseverity-text:::uppercase% %syslogtag%%msg:::sp-if-no-1st-sp%%msg:::drop-last-lf%\n" @@ -122,10 +118,10 @@ template(name="WelfRemoteFormat" type="string" string="%TIMESTAMP% id=firewall t {% endif -%} {% if filter %} -:msg, {{ fmodifier }}ereregex, "{{ regex }}" +:msg, {{ fmodifier }}ereregex, "{{ regex | replace('\n', '') | replace('\r', '') | replace('"', '\\"') }}" {% endif %} *.{{ severity }} -action(type="omfwd" Target="{{ server }}" Port="{{ port }}" Protocol="{{ proto }}" Template="{{ template }}"{{ options }}) +action(type="omfwd" Target="{{ server }}" Port="{{ port }}" Protocol="{{ proto }}" Template="{{ template }}" action.resumeRetryCount="60" queue.type="LinkedList" queue.size="20000"{{ options }}) {% endfor %} {% if syslog_counter and syslog_counter == "true" %} diff --git a/files/image_config/sed_mgmt/sed-pw-tpm-recovery.service b/files/image_config/sed_mgmt/sed-pw-tpm-recovery.service new file mode 100644 index 00000000000..8a581ec58f1 --- /dev/null +++ b/files/image_config/sed_mgmt/sed-pw-tpm-recovery.service @@ -0,0 +1,10 @@ +[Unit] +Description=SED password TPM recovery and validation +After=config-setup.service + +[Service] +Type=oneshot +ExecStart=/usr/local/bin/sed_pw_tpm_recovery.sh + +[Install] +WantedBy=sonic.target diff --git a/files/image_config/sed_mgmt/sed_pw_change.sh b/files/image_config/sed_mgmt/sed_pw_change.sh new file mode 100644 index 00000000000..3a8104c203b --- /dev/null +++ b/files/image_config/sed_mgmt/sed_pw_change.sh @@ -0,0 +1,112 @@ +#!/bin/bash + +# Store new SED password in TPM banks A/B and in the SED. +# Algorithm to store in TPM and SED +# There are 2 Banks where to store new password. +# 0. Read TPM Banks 1&2 +# 1. The code will first validate Banks. +# 2. The code will store the new password in the bank that succeeded first in decrypting the SED +# 3. The code will store the new password in SED. +# 4. The code will store the secondary Bank with the new password. + +sed_pw_bank_1= +sed_pw_bank_2= +disk_name= +tpm_reg_next= + +usage() { + echo "Usage: $0 -a -b -p " + exit 1 +} + +TPM_BANK_A="" +TPM_BANK_B="" +SED_NEW_PW="" +while getopts "a:b:p:" opt; do + case $opt in + a) TPM_BANK_A=$OPTARG ;; + b) TPM_BANK_B=$OPTARG ;; + p) SED_NEW_PW=$OPTARG ;; + *) usage ;; + esac +done + +if [ -z "$TPM_BANK_A" ] || [ -z "$TPM_BANK_B" ] || [ -z "$SED_NEW_PW" ]; then + usage +fi + +tpm_reg=$TPM_BANK_A +tpm_reg_2=$TPM_BANK_B +source /usr/local/bin/sed_pw_utils.sh + +log_info "SED new password start." + +find_disk_name +if [ $? -ne 0 ]; then + log_warn "Block device cannot be determined" + exit 1 +fi + +if ! check_sed_ready; then + log_warn "SED is not ready for operations" + exit 1 +fi + +read_sed_pwd + +validate_sed_pw $sed_pw_bank_1 +res_val_1=$? +validate_sed_pw $sed_pw_bank_2 +res_val_2=$? + +log_info "Old Password Validation - Bank 1: $res_val_1, Bank 2: $res_val_2" + +if [ $res_val_1 -eq 0 ] && [ $res_val_2 -eq 0 ]; then + old_good_pw=$sed_pw_bank_1 + curr_tpm_reg=$tpm_reg + FLAG_NEXT_BANK_TO_STORE='B' +elif [ $res_val_1 -ne 0 ] && [ $res_val_2 -eq 0 ]; then + old_good_pw=$sed_pw_bank_2 + curr_tpm_reg=$tpm_reg + FLAG_NEXT_BANK_TO_STORE='B' +elif [ $res_val_1 -eq 0 ] && [ $res_val_2 -ne 0 ]; then + old_good_pw=$sed_pw_bank_1 + curr_tpm_reg=$tpm_reg_2 + FLAG_NEXT_BANK_TO_STORE='A' +else + log_error "Validation of old password in both SED Banks failed." + exit 1 +fi + +store_sed_pwd_in_tpm $curr_tpm_reg $SED_NEW_PW +res_store_sed=$? + +if [ $res_store_sed -eq 0 ]; then + log_info "sedutil-cli --setadmin1pwd ${disk_name}" + sedutil-cli --setadmin1pwd $old_good_pw $SED_NEW_PW ${disk_name} + if [ $? -ne 0 ]; then + log_error "sedutil-cli --setadmin1pwd failed" + exit 1 + fi +else + log_error "Failed when storing new password in TPM" + exit 1 +fi + +if [ "$FLAG_NEXT_BANK_TO_STORE" = "A" ]; then + log_info "Storing Bank A" + tpm_reg_next=$tpm_reg +elif [ "$FLAG_NEXT_BANK_TO_STORE" = "B" ]; then + log_info "Storing Bank B" + tpm_reg_next=$tpm_reg_2 +else + log_error "No secondary Bank was updated." + exit 1 +fi + +store_sed_pwd_in_tpm $tpm_reg_next $SED_NEW_PW +if [ $? -ne 0 ]; then + log_error "Store new password in the secondary Bank failed." + exit 1 +fi +log_info "SED new password done" diff --git a/files/image_config/sed_mgmt/sed_pw_reset.sh b/files/image_config/sed_mgmt/sed_pw_reset.sh new file mode 100644 index 00000000000..21a956d146d --- /dev/null +++ b/files/image_config/sed_mgmt/sed_pw_reset.sh @@ -0,0 +1,27 @@ +#!/bin/bash + +# Reset SED password to the provided default password (e.g. from platform get_default_sed_password). +# Usage: sed_pw_reset.sh -a -b -p + +usage() { + echo "Usage: $0 -a -b -p " + exit 1 +} + +TPM_BANK_A="" +TPM_BANK_B="" +DEFAULT_PW="" +while getopts "a:b:p:" opt; do + case $opt in + a) TPM_BANK_A=$OPTARG ;; + b) TPM_BANK_B=$OPTARG ;; + p) DEFAULT_PW=$OPTARG ;; + *) usage ;; + esac +done + +if [ -z "$TPM_BANK_A" ] || [ -z "$TPM_BANK_B" ] || [ -z "$DEFAULT_PW" ]; then + usage +fi + +exec /usr/local/bin/sed_pw_change.sh -a "$TPM_BANK_A" -b "$TPM_BANK_B" -p "$DEFAULT_PW" diff --git a/files/image_config/sed_mgmt/sed_pw_tpm_recovery.sh b/files/image_config/sed_mgmt/sed_pw_tpm_recovery.sh new file mode 100644 index 00000000000..270456cd1cd --- /dev/null +++ b/files/image_config/sed_mgmt/sed_pw_tpm_recovery.sh @@ -0,0 +1,78 @@ +#!/bin/bash + +# Verify SED password in TPM banks A&B and recover the wrong bank. +# Reads TPM bank addresses from /etc/sonic/sed_config.conf (created at build). + +export PATH=/run:/usr/local/sbin:/usr/local/bin:/usr/sbin:/usr/bin:/sbin:/bin + +SED_CONFIG="${SED_CONFIG:-/etc/sonic/sed_config.conf}" + +source /usr/local/bin/sed_pw_utils.sh + +if [ ! -f "$SED_CONFIG" ]; then + log_info "$SED_CONFIG not found, skipping SED TPM Bank recovery" + exit 0 +fi + +tpm_reg=$(grep '^tpm_bank_a=' "$SED_CONFIG" 2>/dev/null | cut -d= -f2- | tr -d ' \t') +tpm_reg_2=$(grep '^tpm_bank_b=' "$SED_CONFIG" 2>/dev/null | cut -d= -f2- | tr -d ' \t') + +if [ -z "$tpm_reg" ] || [ -z "$tpm_reg_2" ]; then + log_info "TPM Bank addresses not found in $SED_CONFIG, skipping SED TPM Bank recovery" + exit 0 +fi + +sed_pw_bank_1= +sed_pw_bank_2= + +recover_bank_logic() { + validate_sed_pw $sed_pw_bank_1 + rc_sed_1=$? + log_info "Validation SED TPM Bank 1 res: $rc_sed_1" + if [ "$sed_pw_bank_1" = "$sed_pw_bank_2" ] && [ $rc_sed_1 -eq 0 ]; then + log_info "SED TPM Banks are aligned and passed authentication" + exit 0 + fi + validate_sed_pw $sed_pw_bank_2 + rc_sed_2=$? + log_info "Validation SED TPM Bank 2 res: $rc_sed_2" + if [ "$rc_sed_1" -ne 0 ] && [ "$rc_sed_2" -ne 0 ]; then + log_error "Both TPM Banks 1&2 not passing authentication" + exit 1 + elif [ $rc_sed_1 -ne 0 ] && [ $rc_sed_2 -eq 0 ]; then + log_warn "Authentication Bank 2 passed and Bank 1 failed." + log_info "Storing PW from Bank 2 to Bank 1" + store_sed_pwd_in_tpm $tpm_reg $sed_pw_bank_2 + log_info "Stored PW from Bank 2 to Bank 1 succeed" + elif [ "$rc_sed_1" -eq 0 ] && [ "$rc_sed_2" -ne 0 ]; then + log_warn "Authentication Bank 1 passed and Bank 2 failed." + log_info "Storing PW from Bank 1 to Bank 2" + store_sed_pwd_in_tpm $tpm_reg_2 $sed_pw_bank_1 + log_info "Stored PW from Bank 1 to Bank 2 succeed" + fi +} + +log_info "SED password TPM Banks validation start." + +find_disk_name +if [ $? -ne 0 ]; then + log_warn "Block device cannot be determined" + exit 0 +fi + +if ! check_sed_ready; then + log_warn "SED is not ready for operations" + exit 0 +fi + +read_sed_pwd + +if [ -z "$sed_pw_bank_1" ] && [ -z "$sed_pw_bank_2" ]; then + log_warn "SED TPM Banks 1&2 are empty" + exit 0 +fi + +recover_bank_logic + +log_info "SED password Banks validation done." +exit 0 diff --git a/files/image_config/sed_mgmt/sed_pw_utils.sh b/files/image_config/sed_mgmt/sed_pw_utils.sh new file mode 100644 index 00000000000..41ec2993378 --- /dev/null +++ b/files/image_config/sed_mgmt/sed_pw_utils.sh @@ -0,0 +1,235 @@ +#!/bin/bash + +# Common utilities for SED password management. +# Caller must set tpm_reg and tpm_reg_2 (TPM bank A and B addresses) before sourcing. + +sed_pw_bank_1= +sed_pw_bank_2= +disk_name= +filename="$(basename "$0")" + +TPM_SED_AUTH_GUID="36bfcbde-d710-4903-ba2e-c03ec245dcee" +TPM_SED_AUTH_NAME="TpmSealCtx" +tpm_sed_auth="" + +log_error() { + logger -t "$filename" -p user.err "$1" +} + +log_info() { + logger -t "$filename" -p user.info "$1" +} + +log_warn() { + logger -t "$filename" -p user.warning "$1" +} + +log_debug() { + logger -t "$filename" -p user.debug "$1" +} + +get_tpm_sed_auth() { + if [ -n "$tpm_sed_auth" ]; then + log_info "TPM SED auth already retrieved" + return 0 + fi + log_info "Trying to read TPM SED auth from UEFI variable" + efi_file="/sys/firmware/efi/efivars/${TPM_SED_AUTH_NAME}-${TPM_SED_AUTH_GUID}" + if [ -f "$efi_file" ]; then + auth_enc=$(dd if="$efi_file" bs=1 skip=4 2>/dev/null) + tpm_sed_auth=$(echo "$auth_enc" | base64 -d) + log_info "TPM SED auth retrieved from UEFI variable" + return 0 + fi + log_info "TPM SED auth UEFI variable not found (may not be provisioned with auth)" +} + +find_disk_name() { + non_removable_mountables_disks="" + non_removable_mountables_disks_count=0 + mountables_partitions=$(cat /proc/partitions | grep -v "^major" | grep -v -E 'ram|loop' | awk '{print $4}') + for block_device_name in ${mountables_partitions}; do + block_device_link=$(find /sys/bus /sys/class /sys/block/ -name "${block_device_name}") + for first_block_device_link in $block_device_link; do + if [ -e "${first_block_device_link}"/removable ]; then + if [ "0" = $(cat "${first_block_device_link}"/removable) ]; then + non_removable_mountables_disks_count=$((non_removable_mountables_disks_count+1)) + if [ "1" = "${non_removable_mountables_disks_count}" ]; then + non_removable_mountables_disks="${block_device_name}" + else + non_removable_mountables_disks="${non_removable_mountables_disks} ${block_device_name}" + fi + fi + fi + break + done + done + if [ "1" = "${non_removable_mountables_disks_count}" ]; then + disk_name="/dev/${non_removable_mountables_disks}" + log_debug "disk_name: $disk_name" + return 0 + else + log_warn "find disk name: $disk_name failed." + return 1 + fi +} + +store_sed_pwd_in_tpm() { + log_info "Storing SED password in TPM" + if [ -n "$1" ] && [ -n "$2" ]; then + log_info "Two arguments provided: TPM-REG: ** and SED-PW: **" + else + log_error "Two arguments are required! TPM-REG & SED-PW" + exit 1 + fi + _tpm_reg=$1 + _sed_pwd=$2 + get_tpm_sed_auth + tpm2_evictcontrol -C o -c "$_tpm_reg" > /dev/null 2>&1 + tpm2_createprimary -C o --key-algorithm=rsa --key-context=prim.ctx > /dev/null 2>&1 + if [ -z "$tpm_sed_auth" ]; then + log_info "Storing without TPM auth" + echo "$_sed_pwd" | tpm2_create -g sha256 -u seal.pub -r seal.priv -C prim.ctx -i - > /dev/null 2>&1 + else + log_info "Storing with TPM auth" + echo "$_sed_pwd" | tpm2_create -g sha256 -u seal.pub -r seal.priv -C prim.ctx -p "$tpm_sed_auth" -i - > /dev/null 2>&1 + fi + tpm2_load -C prim.ctx -u seal.pub -r seal.priv -n seal.name -c seal.ctx + tpm2_evictcontrol -C o -c seal.ctx "$_tpm_reg" + rc=$? + rm -f seal.* prim.ctx + if [ $rc -ne 0 ]; then + log_error "Failed access TPM." + exit 1 + fi + log_info "Storing SED PW in TPM - Done" +} + +read_sed_pwd() { + get_tpm_sed_auth + if [ -z "$tpm_sed_auth" ]; then + log_info "TPM SED auth not available" + log_debug "tpm2_unseal -c " + sed_pw_bank_1=$(tpm2_unseal -c $tpm_reg) + if [ $? -ne 0 ]; then + log_error "Failed when reading from Bank 1." + else + log_info "Read from Bank 1 succeed." + fi + log_debug "tpm2_unseal -c " + sed_pw_bank_2=$(tpm2_unseal -c $tpm_reg_2) + if [ $? -ne 0 ]; then + log_error "Failed when reading from Bank 2." + else + log_info "Read from Bank 2 succeed." + fi + else + log_info "TPM SED auth available" + log_debug "tpm2_unseal -c -p " + sed_pw_bank_1=$(tpm2_unseal -c $tpm_reg -p "$tpm_sed_auth") + if [ $? -ne 0 ]; then + log_error "Failed when reading from Bank 1." + else + log_info "Read from Bank 1 succeed." + fi + log_debug "tpm2_unseal -c -p " + sed_pw_bank_2=$(tpm2_unseal -c $tpm_reg_2 -p "$tpm_sed_auth") + if [ $? -ne 0 ]; then + log_error "Failed when reading from Bank 2." + else + log_info "Read from Bank 2 succeed." + fi + fi +} + +validate_sed_pw() { + if [ -z "$1" ]; then + log_error "SED password param to validate is empty" + return 1 + fi + log_debug "sedutil-cli --listLockingRanges ${disk_name}" + sedutil-cli --listLockingRanges $1 "${disk_name}" + rc_sed=$? + if [ $rc_sed -eq 0 ]; then + log_info "SED listLockingRanges passed" + return 0 + else + log_warn "SED listLockingRanges failed" + return 1 + fi +} + +check_sed_support() { + checked_disk=$disk_name + log_info "check_sed_support: $checked_disk" + # sedutil reports e.g. nvme0 and not nvme0n1 + if echo "${disk_name}" | grep -q nvme; then + checked_disk=$(echo "${disk_name}" | cut -d / -f 3 | cut -b-5) + fi + log_info "checked_disk: $checked_disk" + sed_ind=$(sedutil-cli --scan | grep -w "${checked_disk}" | awk '{print $2}') + if [ "$sed_ind" = "2" ]; then + return 0 + else + return 1 + fi +} + +check_sed_locking_enabled() { + log_info "Checking if SED locking is enabled on $disk_name" + output=$(sedutil-cli --query $disk_name) + if [ $? = 0 ]; then + lockEnReg=$(echo "$output" | grep "LockingEnabled") + lockingEnabled=$(echo $lockEnReg | awk -F', ' '{for(i=1;i<=NF;i++) if($i ~ /^LockingEnabled =/) print $i}' | awk -F' = ' '{print $2}') + log_debug "Found LockingEnabled line: $lockEnReg" + log_debug "lockingEnabled==$lockingEnabled" + if [ "$lockingEnabled" = "Y" ]; then + log_info "SED LockingEnabled attribute is enabled" + return 0 + else + log_warn "SED LockingEnabled attribute not enabled" + return 1 + fi + else + log_warn "sedutil-cli --query $disk_name failed" + return 1 + fi +} + +check_tpm_configured() { + log_info "Checking if TPM is configured with required banks" + persistent_handles=$(tpm2_getcap handles-persistent 2>/dev/null) + if [ $? -ne 0 ]; then + log_warn "Failed to query TPM persistent handles" + return 1 + fi + log_debug "TPM persistent handles: $persistent_handles" + if ! echo "$persistent_handles" | grep -q "$tpm_reg"; then + log_warn "TPM bank $tpm_reg not configured" + return 1 + fi + if ! echo "$persistent_handles" | grep -q "$tpm_reg_2"; then + log_warn "TPM bank $tpm_reg_2 not configured" + return 1 + fi + log_info "All required TPM SED password banks are configured" + return 0 +} + +check_sed_ready() { + log_info "Check SED is ready for operations" + if ! check_tpm_configured; then + log_warn "TPM is not configured with required banks" + return 1 + fi + if ! check_sed_support; then + log_warn "SED is not supported on disk $disk_name" + return 1 + fi + if ! check_sed_locking_enabled; then + log_warn "SED locking is not enabled on disk $disk_name" + return 1 + fi + log_info "SED is ready for operations on disk $disk_name" + return 0 +} diff --git a/files/image_config/snmp/snmp.yml b/files/image_config/snmp/snmp.yml index 117619975fb..e39b313c533 100644 --- a/files/image_config/snmp/snmp.yml +++ b/files/image_config/snmp/snmp.yml @@ -1,2 +1 @@ -snmp_rocommunity: public snmp_location: public diff --git a/files/image_config/sysctl/90-sonic.conf b/files/image_config/sysctl/90-sonic.conf index 6eaeadcfa4d..59d200f90eb 100644 --- a/files/image_config/sysctl/90-sonic.conf +++ b/files/image_config/sysctl/90-sonic.conf @@ -51,5 +51,16 @@ kernel.panic=10 # Kill tasks that have been stuck for 5 minutes kernel.hung_task_timeout_secs=300 +# Max concurrent coredump pipe handlers; kernel keeps dumped process until handler runs so /proc/ is available. +kernel.core_pipe_limit=16 + vm.panic_on_oom=2 fs.suid_dumpable=2 + +# Restrict ptrace to admin-only (CAP_SYS_PTRACE) to mitigate FD-theft attacks +# via pidfd_getfd(2) during the mm-NULL exit window. Blocks unprivileged +# exploitation while preserving sudo gdb / sudo strace for operators. +kernel.yama.ptrace_scope=2 + +net.ipv4.conf.all.ignore_routes_with_linkdown=1 +net.ipv6.conf.all.ignore_routes_with_linkdown=1 diff --git a/files/image_config/warmboot-finalizer/finalize-warmboot.sh b/files/image_config/warmboot-finalizer/finalize-warmboot.sh index 492ad4792e8..7276060d133 100755 --- a/files/image_config/warmboot-finalizer/finalize-warmboot.sh +++ b/files/image_config/warmboot-finalizer/finalize-warmboot.sh @@ -1,9 +1,13 @@ #! /bin/bash -VERBOSE=no +VERBOSE=${VERBOSE:-no} # read SONiC immutable variables [ -f /etc/sonic/sonic-environment ] && . /etc/sonic/sonic-environment +PLATFORM=${PLATFORM:-`sonic-cfggen -H -v DEVICE_METADATA.localhost.platform`} + +[ -f /usr/share/sonic/device/$PLATFORM/asic.conf ] && . /usr/share/sonic/device/$PLATFORM/asic.conf +NUM_ASIC=${NUM_ASIC:-1} # Define components that needs to reconcile during warm # boot: @@ -29,16 +33,64 @@ ASSISTANT_SCRIPT="/usr/local/bin/neighbor_advertiser" function debug() { - /usr/bin/logger "WARMBOOT_FINALIZER : $1" + local message="$1" + if [[ -n $DEV ]]; then + message="asic$DEV: $message" + fi if [[ x"${VERBOSE}" == x"yes" ]]; then - echo `date` "- $1" + echo `date` "- $message" fi + /usr/bin/logger "WARMBOOT_FINALIZER : $message" +} + +# Determines if a given service has per-ASIC scope. +function is_asic_service() +{ + local -r service=$1 + local -r has_per_asic_scope=$(sonic-db-cli CONFIG_DB hget "FEATURE|$service" has_per_asic_scope) + [[ x"${has_per_asic_scope,,}" == x"true" ]] && echo 1 || echo 0 } +# Determines if a given service has global scope. +function is_global_service() +{ + local -r service=$1 + local -r has_global_scope=$(sonic-db-cli CONFIG_DB hget "FEATURE|$service" has_global_scope) + [[ x"${has_global_scope,,}" == x"true" ]] && echo 1 || echo 0 +} + +# Outputs a list of services that have per-ASIC scope. +function get_asic_service_list() +{ + local asic_service_list="" + for service in ${!RECONCILE_COMPONENTS[@]}; do + is_asic_service=$(is_asic_service $service) + if (( is_asic_service )); then + asic_service_list="${asic_service_list} ${service}" + fi + done + echo ${asic_service_list} +} + +# Outputs a list of services that have global scope. +function get_global_service_list() +{ + local global_service_list="" + for service in ${!RECONCILE_COMPONENTS[@]}; do + is_global_service=$(is_global_service $service) + if (( is_global_service )); then + global_service_list="${global_service_list} ${service}" + fi + done + echo ${global_service_list} +} + +ASIC_SERVICE_LIST="$(get_asic_service_list)" +GLOBAL_SERVICE_LIST="$(get_global_service_list)" function get_component_list() { - SVC_LIST=${!RECONCILE_COMPONENTS[@]} + SVC_LIST="$1" COMPONENT_LIST="" for service in ${SVC_LIST}; do components=${RECONCILE_COMPONENTS[${service}]} @@ -49,16 +101,15 @@ function get_component_list() done } - function check_warm_boot() { - WARM_BOOT=`sonic-db-cli STATE_DB hget "WARM_RESTART_ENABLE_TABLE|system" enable` + WARM_BOOT=`sonic-db-cli -n "$NETNS" STATE_DB hget "WARM_RESTART_ENABLE_TABLE|system" enable` } function check_fast_reboot() { debug "Checking if fast-reboot is enabled..." - FAST_REBOOT=`sonic-db-cli STATE_DB hget "FAST_RESTART_ENABLE_TABLE|system" enable` + FAST_REBOOT=`sonic-db-cli -n "$NETNS" STATE_DB hget "FAST_RESTART_ENABLE_TABLE|system" enable` if [[ x"${FAST_REBOOT}" == x"true" ]]; then debug "Fast-reboot is enabled..." else @@ -72,12 +123,12 @@ function wait_for_database_service() debug "Wait for database to become ready..." # Wait for redis server start before database clean - until [[ $(sonic-db-cli PING | grep -c PONG) -gt 0 ]]; do + until [[ $(sonic-db-cli -n "$NETNS" PING | grep -c PONG) -gt 0 ]]; do sleep 1; done # Wait for configDB initialization - until [[ $(sonic-db-cli CONFIG_DB GET "CONFIG_DB_INITIALIZED") -eq 1 ]]; + until [[ $(sonic-db-cli -n "$NETNS" CONFIG_DB GET "CONFIG_DB_INITIALIZED") -eq 1 ]]; do sleep 1; done @@ -87,7 +138,7 @@ function wait_for_database_service() function get_component_state() { - sonic-db-cli STATE_DB hget "WARM_RESTART_TABLE|$1" state + sonic-db-cli -n "$NETNS" STATE_DB hget "WARM_RESTART_TABLE|$1" state } @@ -111,29 +162,44 @@ function set_cpufreq_governor() { || debug "Failed to set CPUFreq scaling governor to $governor" } -function finalize_common() { - local -r asic_type=${ASIC_TYPE:-`sonic-cfggen -y /etc/sonic/sonic_version.yml -v asic_type`} - - if [[ "$asic_type" == "mellanox" ]]; then - # Read default governor from kernel config - local -r default_governor=$(cat "/boot/config-$(uname -r)" | grep -E 'CONFIG_CPU_FREQ_DEFAULT_GOV_.*=y' | sed -E 's/CONFIG_CPU_FREQ_DEFAULT_GOV_(.*)=y/\1/') - set_cpufreq_governor "$default_governor" - fi -} - function finalize_warm_boot() { debug "Finalizing warmboot..." - finalize_common - sudo config warm_restart disable + sudo config warm_restart disable -n "$NETNS" } function finalize_fast_reboot() { debug "Finalizing fast-reboot..." - finalize_common - sonic-db-cli STATE_DB hset "FAST_RESTART_ENABLE_TABLE|system" "enable" "false" &>/dev/null - sonic-db-cli CONFIG_DB DEL "WARM_RESTART|teamd" &>/dev/null + sonic-db-cli -n "$NETNS" STATE_DB hset "FAST_RESTART_ENABLE_TABLE|system" "enable" "false" &>/dev/null + sonic-db-cli -n "$NETNS" CONFIG_DB DEL "WARM_RESTART|teamd" &>/dev/null +} + +# Finalize warm/fast boot in an ASIC namespace. +# This function is called for each ASIC namespace on a Multi-ASIC device. +# For Single-ASIC devices, this function is called as well in global namespace context. +function finalize_boot() +{ + if [ x"${FAST_REBOOT}" == x"true" ]; then + finalize_fast_reboot + fi + + if [ x"${WARM_BOOT}" == x"true" ]; then + finalize_warm_boot + fi +} + +# Finalize warm/fast boot in global namespace. +function finalize_global() { + local -r asic_type=${ASIC_TYPE:-`sonic-cfggen -y /etc/sonic/sonic_version.yml -v asic_type`} + + finalize_boot + + if [[ "$asic_type" == "mellanox" ]]; then + # Read default governor from kernel config + local -r default_governor=$(cat "/boot/config-$(uname -r)" | grep -E 'CONFIG_CPU_FREQ_DEFAULT_GOV_.*=y' | sed -E 's/CONFIG_CPU_FREQ_DEFAULT_GOV_(.*)=y/\1/') + set_cpufreq_governor "$default_governor" + fi } function stop_control_plane_assistant() @@ -155,53 +221,88 @@ function restore_counters_folder() fi } +function check_warm_boot_and_fast_boot_or_exit() +{ + check_fast_reboot + check_warm_boot + if [[ x"${WARM_BOOT}" != x"true" ]]; then + debug "warmboot is not enabled ..." + if [[ x"${FAST_REBOOT}" != x"true" ]]; then + debug "fastboot is not enabled ..." + exit 0 + fi + fi +} + +# Wait until a given list of components reach the reconciled state or timeout after 5 minutes. +function wait_for_components_to_reconcile() { + local -r service_list="$1" + get_component_list "${service_list}" -wait_for_database_service + debug "Waiting for components: '${COMPONENT_LIST}' to reconcile ..." -check_fast_reboot -check_warm_boot + list=${COMPONENT_LIST} -if [[ x"${WARM_BOOT}" != x"true" ]]; then - debug "warmboot is not enabled ..." - if [[ x"${FAST_REBOOT}" != x"true" ]]; then - debug "fastboot is not enabled ..." - exit 0 + # Wait up to 5 minutes + for i in `seq 60`; do + list=`check_list ${list}` + debug "Waiting for components to reconcile: ${list}" + if [[ -z "${list}" ]]; then + break + fi + sleep 5 + done + + if [[ -n "${list}" ]]; then + debug "Some components didn't finish reconcile: ${list} ..." fi -fi +} + +wait_for_database_service +check_warm_boot_and_fast_boot_or_exit if [[ (x"${WARM_BOOT}" == x"true") && (x"${FAST_REBOOT}" != x"true") ]]; then restore_counters_folder fi -get_component_list +# Wait for asic services to reconcile. +# Spawns a separate process for each ASIC to run finalization in parallel. +for dev in `seq 0 $((NUM_ASIC - 1))`; do + ( + if [[ $NUM_ASIC -gt 1 ]]; then + export DEV=$dev + export NETNS=asic$dev + fi -debug "Waiting for components: '${COMPONENT_LIST}' to reconcile ..." + # For multi-ASIC devices, wait for the namespace database to be ready + # and check if warm/fast boot is enabled. + if [[ -n $NETNS ]]; then + wait_for_database_service + check_warm_boot_and_fast_boot_or_exit + fi -list=${COMPONENT_LIST} + wait_for_components_to_reconcile "${ASIC_SERVICE_LIST}" -# Wait up to 5 minutes -for i in `seq 60`; do - list=`check_list ${list}` - if [[ -z "${list}" ]]; then - break - fi - sleep 5 + # For multi-ASIC devices, finalize the warm/fast boot flags in the namespace database. + if [[ -n $NETNS ]]; then + finalize_boot + fi + ) & done -if [[ (x"${WARM_BOOT}" == x"true") && (x"${FAST_REBOOT}" != x"true") ]]; then - stop_control_plane_assistant -fi +# Wait for global services to reconcile. +# Spawns a separate process to run finalization in parallel. +( + wait_for_components_to_reconcile "${GLOBAL_SERVICE_LIST}" +) & -if [[ -n "${list}" ]]; then - debug "Some components didn't finish reconcile: ${list} ..." -fi +# Block till all processes complete. +wait -if [ x"${FAST_REBOOT}" == x"true" ]; then - finalize_fast_reboot -fi +finalize_global -if [ x"${WARM_BOOT}" == x"true" ]; then - finalize_warm_boot +if [[ (x"${WARM_BOOT}" == x"true") && (x"${FAST_REBOOT}" != x"true") ]]; then + stop_control_plane_assistant fi # Save DB after stopped control plane assistant to avoid extra entries diff --git a/files/initramfs-tools/arista-wait-blockdev b/files/initramfs-tools/arista-wait-blockdev new file mode 100644 index 00000000000..8c17f547046 --- /dev/null +++ b/files/initramfs-tools/arista-wait-blockdev @@ -0,0 +1,49 @@ +#!/bin/sh + +case $1 in + prereqs) + exit 0 + ;; +esac + +info() { printf "%04.2f: $@\n" "$(cut -f1 -d' ' /proc/uptime)"; } +warn() { info "Warning: $@"; } + +aboot_flag='' +root_val='' + +# Extract kernel parameters +set -- $(cat /proc/cmdline) +for x in "$@"; do + case "$x" in + Aboot=*) + aboot_flag="${x#Aboot=}" + ;; + root=UUID=*) + root_val="${x#root=UUID=}" + ;; + systemd.unit=kdump-tools.service) + # In kdump environment, skip hooks + exit 0 + ;; + esac +done + +[ -z "$aboot_flag" ] && exit 0 +[ -z "$root_val" ] && exit 0 + +wait_blockdev_retry_count=1 +while [ "$wait_blockdev_retry_count" -le 30 ]; do + info "Waiting for UUID=${root_val}: attempt ${wait_blockdev_retry_count}" + if blkid --uuid $root_val > /dev/null 2>&1; then + info "Finished waiting for UUID=${root_val}" + exit 0 + fi + wait_blockdev_retry_count=$((wait_blockdev_retry_count + 1)) + sleep 1 +done +warn "Failed to wait for UUID=${root_val}" +ls /dev +dmesg | tail -n 100 +blkid +exit 0 diff --git a/files/initramfs-tools/modules b/files/initramfs-tools/modules index 546660daefe..dd8cb3c8edd 100644 --- a/files/initramfs-tools/modules +++ b/files/initramfs-tools/modules @@ -6,3 +6,4 @@ nls_cp437 nls_utf8 nvme zstd +efivarfs diff --git a/files/initramfs-tools/swi2bin b/files/initramfs-tools/swi2bin new file mode 100644 index 00000000000..83da26c20da --- /dev/null +++ b/files/initramfs-tools/swi2bin @@ -0,0 +1,159 @@ +#!/bin/sh -e +# This hook is the 2nd stage of the swi2bin installation + +PREREQS="" + +prereqs() { echo "$PREREQS"; } + +case $1 in + prereqs) + prereqs + exit 0 + ;; +esac + +perform_swi2bin=false +verbose=false + +for x in $(cat /proc/cmdline); do + case "$x" in + arista.swi2bin=verbose) + perform_swi2bin=true + verbose=true + ;; + arista.swi2bin|arista.swi2bin=*) + perform_swi2bin=true + ;; + esac +done + +if ! $perform_swi2bin; then + exit 0 +fi + +if $verbose; then + set -x +fi + +log() { + echo "[+] $@" +} + +is_bin_signed() { + test "$(tail -n 1 "$1")" = "-----END CMS-----" +} + +log "Entering initrd phase of installation" + +nosname=SONiC-OS +image_name="$(cat /proc/cmdline | sed -e 's/.*loop=\(\S*\)\/.*/\1/')" + +bin_signed=false +if is_bin_signed "$rootmnt/host/$image_name/sonic.bin"; then + bin_signed=true +fi + +log "Mounting root filesystem" +rootdir=/install-root +installtmp=/tmp/install +rwdir="$installtmp/rw" +workdir="$installtmp/workdir" + +mkdir -p "$rootdir" +mkdir -p "$installtmp" + +mount -t tmpfs none "$installtmp" +mkdir -p "$rwdir" +mkdir -p "$workdir" + +mount -n -o "lowerdir=$rootmnt,upperdir=$rwdir,workdir=$workdir" -t overlay root-overlay "$rootdir" +mount -o bind "$rootmnt/host" "$rootdir/host" +mount -t proc proc "$rootdir/proc" +mount -t devtmpfs udev "$rootdir/dev" +mount -t sysfs sysfs "$rootdir/sys" + +log "Installing grub" +espdev="$(blkid --label ESP)" +blkdev="/dev/$(basename "$(readlink -f "/sys/class/block/$(basename "$espdev")/..")")" +esppartnum="$(echo "$espdev" | grep -Eo '[0-9]+$')" + +mkdir -p "$rootdir/boot" +mount -o bind "$rootmnt/host/$image_name/boot" "$rootdir/boot" +mkdir -p "$rootdir/boot/efi" +mount "$espdev" "$rootdir/boot/efi" + +# ensure grub folder exists +mkdir -p "$rootdir/host/grub" + +# mounting efivarfs which is necessary for efitools to work +mount -t efivarfs efivarfs "$rootdir/sys/firmware/efi/efivars" + +# installing grub packages from platform.tar.gz +chroot "$rootdir" sh -c "dpkg -i /host/$image_name/platform/grub/*" + +# install grub-efi on /boot/efi/SONiC-OS and configuration on /host/grub/ +chroot "$rootdir" grub-install \ + --target=x86_64-efi \ + --boot-directory=/host \ + --efi-directory=/boot/efi \ + --bootloader-id=$nosname + +if $bin_signed; then + log "Installing signed shim/grub/mm" + + # installing signed grub, shim, mm and other efi tools + mkdir -p "$rootdir/boot/efi/EFI/$nosname" + cp "$rootdir/host/$image_name/boot/"*.efi "$rootdir/boot/efi/EFI/$nosname" + + # creating new EFI boot entry + chroot "$rootdir" efibootmgr \ + --create \ + --quiet \ + --label "$nosname" \ + --disk "$blkdev" \ + --part "$esppartnum" \ + --loader "/EFI/$nosname/shimx64.efi" +fi + +# FIXME: populate fake entry in grub.cfg to allow the installer to find the /host +# partition +grubentry="SONiC-OS-$(echo "$image_name" | cut -c7-)" +cat > "$rootdir/host/grub/grub.cfg" < /proc/sysrq-trigger diff --git a/files/initramfs-tools/union-mount.j2 b/files/initramfs-tools/union-mount.j2 index 6df78736405..88ae34889eb 100644 --- a/files/initramfs-tools/union-mount.j2 +++ b/files/initramfs-tools/union-mount.j2 @@ -54,6 +54,15 @@ for x in $(cat /proc/cmdline); do esac done +# On Switch-BMC systems /var/log is always on tmpfs to avoid wearing out +# the eMMC flash with high-frequency syslog writes. +_platform=$(grep '^onie_platform=' ${rootmnt}/host/machine.conf 2>/dev/null | cut -d= -f2) +_penv="${rootmnt}/usr/share/sonic/device/${_platform}/platform_env.conf" +if [ -f "$_penv" ] && grep -q '^switch_bmc=1' "$_penv" 2>/dev/null; then + logs_inram=true +fi +unset _platform _penv + set_tmpfs_log_partition_size() { if [ $varlog_size -gt 0 ]; then diff --git a/files/initramfs-tools/varlog b/files/initramfs-tools/varlog index 980b2452345..1dc3644906a 100644 --- a/files/initramfs-tools/varlog +++ b/files/initramfs-tools/varlog @@ -1,6 +1,6 @@ #!/bin/sh -e -PREREQS="" +PREREQS="swi2bin" prereqs() { echo "$PREREQS"; } diff --git a/files/scripts/arp_update b/files/scripts/arp_update index 240cd9fdfc2..f616b9bc79c 100755 --- a/files/scripts/arp_update +++ b/files/scripts/arp_update @@ -11,7 +11,7 @@ ARP_UPDATE_VARS_FILE="/usr/share/sonic/templates/arp_update_vars.j2" # Overload `logger` command to include arp_update tag logger () { - command logger -i "$$" -t "arp_update" "$@" + command logger -t "arp_update" "$@" } # Function to run a command with retries on failure @@ -97,9 +97,6 @@ while /bin/true; do fi intf_up=$(ip link show $interface | grep "state UP") if [[ -n "$intf_up" ]]; then - if [[ -z $(echo ${neigh_state} | grep 'STALE') ]]; then - logger "static route nexthop not resolved ($neigh_state), pinging $nexthop on $interface" - fi run_with_retry_cmd "static route ping to $nexthop on $interface" \ timeout 0.2 $ping_prefix -I "$interface" -n -q -i 0 -c 1 -W 1 "$nexthop" >/dev/null 2>&1 fi diff --git a/files/scripts/bgp.sh b/files/scripts/bgp.sh index 328f8ab01ec..05f7ac3dfef 100755 --- a/files/scripts/bgp.sh +++ b/files/scripts/bgp.sh @@ -69,7 +69,7 @@ stop() { # Kill bgpd to start the bgp graceful restart procedure if [[ x"$WARM_BOOT" == x"true" ]] || [[ x"$FAST_BOOT" == x"true" ]]; then - debug "Kill zebra first" + debug "Kill zebra and bgpd" /usr/bin/docker exec -i bgp pkill -9 zebra || [ $? == 1 ] /usr/bin/docker exec -i bgp pkill -9 bgpd || [ $? == 1 ] fi diff --git a/files/scripts/gbsyncd.sh b/files/scripts/gbsyncd.sh index 34bcb7044be..a236c8060fc 100755 --- a/files/scripts/gbsyncd.sh +++ b/files/scripts/gbsyncd.sh @@ -8,7 +8,7 @@ function startplatform() { for DB_CLI in "${DbCliArray[@]}"; do # Add gbsyncd to FEATURE table, if not in. It did have same config as syncd. if [ -z $($DB_CLI CONFIG_DB HGET 'FEATURE|gbsyncd' state) ]; then - local CMD="local r=redis.call('DUMP', KEYS[1]); redis.call('RESTORE', KEYS[2], 0, r)" + local CMD="local r=redis.call('DUMP', KEYS[1]); redis.call('RESTORE', KEYS[2], 0, r, 'REPLACE')" $DB_CLI CONFIG_DB EVAL "$CMD" 2 'FEATURE|syncd' 'FEATURE|gbsyncd' $DB_CLI CONFIG_DB EVAL "$CMD" 2 'SYSLOG_CONFIG_FEATURE|syncd' 'SYSLOG_CONFIG_FEATURE|gbsyncd' fi diff --git a/files/scripts/k8s_pod_control.sh b/files/scripts/k8s_pod_control.sh index 5cc5d361667..771cb9a7c17 100644 --- a/files/scripts/k8s_pod_control.sh +++ b/files/scripts/k8s_pod_control.sh @@ -1,9 +1,9 @@ #!/bin/bash # Shared Kubernetes pod control script for SONiC sidecar services -# 1. Runs as root via systemd service, so direct access to kubelet.conf is available; sudo is not required -# 2. Use kubectl to get pods and delete pods with retry -# 3. start/stop/restart are NON-BLOCKING -# 4. Only target pods matching POD_SELECTOR (default: raw_container_name=) +# 1. Discovers K8s-managed containers via 'docker ps' label filtering +# (exact match on io.kubernetes.container.name + io.kubernetes.pod.namespace, +# which are injected by the dockershim/CRI on every K8s-managed container). +# 2. Uses 'docker restart' to restart the target container. # # Usage: SERVICE_NAME=telemetry k8s_pod_control.sh start # Or source this script after setting SERVICE_NAME @@ -23,121 +23,80 @@ if [[ -z "${SERVICE_NAME:-}" ]]; then fi NS="sonic" -KUBECTL_BIN="/usr/bin/kubectl" -KCF=(--kubeconfig=/etc/kubernetes/kubelet.conf) -REQ_TIMEOUT="5s" -MAX_ATTEMPTS=10 -BACKOFF_START=1 -BACKOFF_MAX=8 - -# Label selector for pods; can be overridden via env -# Example override: POD_SELECTOR="app=telemetry" telemetry.sh start -POD_SELECTOR="${POD_SELECTOR:-raw_container_name=${SERVICE_NAME}}" NODE_NAME="$(hostname | tr '[:upper:]' '[:lower:]')" log() { /usr/bin/logger -t "k8s-podctl#system" "$*"; } -kubectl_retry() { - local attempt=1 backoff=${BACKOFF_START} out rc - while true; do - out="$("${KUBECTL_BIN}" "${KCF[@]}" --request-timeout="${REQ_TIMEOUT}" "$@" 2>&1)"; rc=$? - if (( rc == 0 )); then - printf '%s' "$out" - return 0 - fi - if (( attempt >= MAX_ATTEMPTS )); then - echo "$out" >&2 - return "$rc" - fi - log "kubectl retry ${attempt}/${MAX_ATTEMPTS} for: $*" - sleep "${backoff}" - (( backoff = backoff < BACKOFF_MAX ? backoff*2 : BACKOFF_MAX )) - (( attempt++ )) - done +# Docker label filters for K8s-managed containers of this service. +# Using labels (rather than name= substring matching) gives an EXACT match on +# the container name, so e.g. SERVICE_NAME=telemetry will not also match a +# hypothetical 'telemetry_v2' container, and is independent of the +# k8s____ dockershim naming convention. +DOCKER_FILTERS=( + --filter "label=io.kubernetes.container.name=${SERVICE_NAME}" + --filter "label=io.kubernetes.pod.namespace=${NS}" +) + +container_ids_on_node() { + docker ps -q "${DOCKER_FILTERS[@]}" 2>/dev/null || true } pods_on_node() { - kubectl_retry -n "${NS}" get pods \ - --field-selector "spec.nodeName=${NODE_NAME}" \ - -l "${POD_SELECTOR}" \ - -o jsonpath='{range .items[*]}{.metadata.name}{" "}{.status.phase}{"\n"}{end}' || true -} - -pod_names_on_node() { - kubectl_retry -n "${NS}" get pods \ - --field-selector "spec.nodeName=${NODE_NAME}" \ - -l "${POD_SELECTOR}" \ - -o jsonpath='{range .items[*]}{.metadata.name}{"\n"}{end}' || true -} - -delete_pod_with_retry() { - local name="$1" - local out rc - out=$(kubectl_retry -n "${NS}" delete pod "${name}" --force --grace-period=0 --wait=false 2>&1) - rc=$? - if (( rc != 0 )); then - log "ERROR delete pod '${name}' failed rc=${rc}: ${out}" - else - log "Deleted pod '${name}'" - fi - return "$rc" + docker ps -a "${DOCKER_FILTERS[@]}" \ + --format '{{index .Labels "io.kubernetes.pod.name"}} {{.State}}' \ + 2>/dev/null || true } -kill_pods() { - mapfile -t names < <(pod_names_on_node) - if (( ${#names[@]} == 0 )); then - log "No pods found on ${NODE_NAME} (ns=${NS}, selector=${POD_SELECTOR})." +restart_containers() { + mapfile -t cids < <(container_ids_on_node) + if (( ${#cids[@]} == 0 )); then + log "No containers found for '${SERVICE_NAME}' on ${NODE_NAME} (ns=${NS})." return 0 fi - log "Deleting pods on ${NODE_NAME} (ns=${NS}, selector=${POD_SELECTOR}): ${names[*]}" + log "Restarting containers for '${SERVICE_NAME}' on ${NODE_NAME}: ${cids[*]}" local rc_any=0 - for p in "${names[@]}"; do - [[ -z "$p" ]] && continue - if ! delete_pod_with_retry "$p"; then + for cid in "${cids[@]}"; do + [[ -z "$cid" ]] && continue + if docker restart "$cid" >/dev/null 2>&1; then + log "Restarted container ${cid} (${SERVICE_NAME})" + else + log "ERROR: failed to restart container ${cid} (${SERVICE_NAME})" rc_any=1 fi done if (( rc_any != 0 )); then - log "ERROR one or more pod deletions failed on ${NODE_NAME} (selector=${POD_SELECTOR})" + log "ERROR one or more container restarts failed for '${SERVICE_NAME}' on ${NODE_NAME}" else - log "All targeted pods deleted on ${NODE_NAME} (selector=${POD_SELECTOR})" + log "All containers restarted for '${SERVICE_NAME}' on ${NODE_NAME}" fi return "$rc_any" } cmd_start() { - if command -v systemd-cat >/dev/null 2>&1; then - # background + pipe to journald with distinct priorities - ( kill_pods ) \ - > >(systemd-cat -t "${SERVICE_NAME}-start" -p info) \ - 2> >(systemd-cat -t "${SERVICE_NAME}-start" -p err) - else - # background + pipe to syslog via logger in case systemd-journald is masked/disabled - ( kill_pods ) \ - > >(logger -t "${SERVICE_NAME}-start" -p user.info) \ - 2> >(logger -t "${SERVICE_NAME}-start" -p user.err) - fi & - disown - exit 0 + # Re-invoke ourselves with the "restart" action under a hard 20s cap. + # On a healthy node this finishes in 1-2s; the timeout guards against + # a hung 'docker restart' so we stay within TimeoutStartSec (30s). + timeout 20 "${BASH_SOURCE[0]}" "${SERVICE_NAME}" restart 2>&1 \ + | logger -t "${SERVICE_NAME}-start" || true } -cmd_stop() { kill_pods; } -cmd_restart() { kill_pods; } +cmd_stop() { restart_containers; } +cmd_restart() { restart_containers; } cmd_status() { local out=""; out="$(pods_on_node)" if [[ -z "$out" ]]; then - echo "NOT RUNNING (no pod on node ${NODE_NAME} with selector '${POD_SELECTOR}')" + echo "NOT RUNNING (no container on node ${NODE_NAME} for '${SERVICE_NAME}')" exit 3 fi - while read -r name phase; do + while read -r name state; do [[ -z "$name" ]] && continue - echo "pod ${name}: ${phase}" + echo "pod ${name}: ${state}" done <<<"$out" - if awk '$2=="Running"{found=1} END{exit found?0:1}' <<<"$out"; then + if awk '$2=="running"{found=1} END{exit found?0:1}' <<<"$out"; then exit 0 else exit 1 @@ -145,18 +104,9 @@ cmd_status() { } cmd_wait() { - log "Waiting on pods (ns=${NS}, selector=${POD_SELECTOR}) on node ${NODE_NAME}…" - while true; do - local out=""; out="$(pods_on_node)" - if [[ -z "$out" ]]; then - sleep 5; continue - fi - if awk '$2=="Running"{found=1} END{exit found?0:1}' <<<"$out"; then - sleep 60 - else - sleep 5 - fi - done + # No-op: just sleep forever so the systemd unit stays "active". + log "cmd_wait: sleeping indefinitely for '${SERVICE_NAME}' on ${NODE_NAME}" + while true; do sleep 300; done } case "${1:-}" in diff --git a/files/scripts/sonic-db-aliases.py b/files/scripts/sonic-db-aliases.py new file mode 100755 index 00000000000..09973513bff --- /dev/null +++ b/files/scripts/sonic-db-aliases.py @@ -0,0 +1,47 @@ +#!/usr/bin/env python3 +import sys + +# Expect DB names as command-line arguments +db_names = sys.argv[1:] + +if not db_names: + print('ERROR:No database names provided as arguments', file=sys.stderr) + sys.exit(1) + +try: + import swsscommon.swsscommon + + SonicDBConfig = None + + if hasattr(swsscommon.swsscommon, 'SonicDBConfig'): + SonicDBConfig = swsscommon.swsscommon.SonicDBConfig + + if SonicDBConfig is None: + print('ERROR:SonicDBConfig not found in swsscommon module', file=sys.stderr) + sys.exit(1) + + # Initialize config (some versions require this) + try: + SonicDBConfig.loadSonicDBConfig() + except AttributeError: + pass # Some versions don't have this method + except Exception: + pass # Ignore if config file is missing + + # Iterate over provided arguments + for db in db_names: + try: + db_id = SonicDBConfig.getDbId(db) + db_port = SonicDBConfig.getDbPort(db) + # Output format: DB_NAME:DB_ID:DB_PORT + print(f'{db}:{db_id}:{db_port}') + except Exception as e: + # Print error to stderr (will be captured by bash) + print(f'ERROR:Failed to get config for {db}: {e}', file=sys.stderr) + +except ImportError as e: + print(f'ERROR:swsscommon module not found: {e}', file=sys.stderr) + sys.exit(1) +except Exception as e: + print(f'ERROR:Unexpected error: {e}', file=sys.stderr) + sys.exit(1) \ No newline at end of file diff --git a/files/scripts/swss.sh b/files/scripts/swss.sh index da2bc22215f..b1ae5d26ba9 100755 --- a/files/scripts/swss.sh +++ b/files/scripts/swss.sh @@ -14,7 +14,9 @@ TSA_TSB_SERVICE="startup_tsa_tsb.service" function debug() { - /usr/bin/logger $1 + # Use --id=$$ so all messages from this script share the parent shell's PID, + # preventing rsyslog imuxsock ratelimiter memory growth. + /usr/bin/logger --id=$$ -- "$1" /bin/echo `date` "- $1" >> ${DEBUGLOG} } @@ -406,8 +408,22 @@ start() { $SONIC_DB_CLI GB_ASIC_DB FLUSHDB $SONIC_DB_CLI GB_COUNTERS_DB FLUSHDB $SONIC_DB_CLI RESTAPI_DB FLUSHDB - clean_up_tables STATE_DB "'PORT_TABLE*', 'MGMT_PORT_TABLE*', 'VLAN_TABLE*', 'VLAN_MEMBER_TABLE*', 'LAG_TABLE*', 'LAG_MEMBER_TABLE*', 'INTERFACE_TABLE*', 'MIRROR_SESSION*', 'VRF_TABLE*', 'FDB_TABLE*', 'FG_ROUTE_TABLE*', 'BUFFER_POOL*', 'BUFFER_PROFILE*', 'MUX_CABLE_TABLE*', 'ADVERTISE_NETWORK_TABLE*', 'VXLAN_TUNNEL_TABLE*', 'VNET_ROUTE*', 'MACSEC_PORT_TABLE*', 'MACSEC_INGRESS_SA_TABLE*', 'MACSEC_EGRESS_SA_TABLE*', 'MACSEC_INGRESS_SC_TABLE*', 'MACSEC_EGRESS_SC_TABLE*', 'VRF_OBJECT_TABLE*', 'VNET_MONITOR_TABLE*', 'BFD_SESSION_TABLE*', 'SYSTEM_NEIGH_TABLE*', 'FABRIC_PORT_TABLE*', 'TUNNEL_DECAP_TABLE*', 'TUNNEL_DECAP_TERM_TABLE*', 'HIGH_FREQUENCY_TELEMETRY_SESSION_TABLE*' " + clean_up_tables STATE_DB "'PORT_TABLE*', 'MGMT_PORT_TABLE*', 'VLAN_TABLE*', 'VLAN_MEMBER_TABLE*', 'LAG_TABLE*', 'LAG_MEMBER_TABLE*', 'INTERFACE_TABLE*', 'MIRROR_SESSION*', 'VRF_TABLE*', 'FDB_TABLE*', 'FG_ROUTE_TABLE*', 'BUFFER_POOL*', 'BUFFER_PROFILE*', 'MUX_CABLE_TABLE*', 'ADVERTISE_NETWORK_TABLE*', 'VXLAN_TUNNEL_TABLE*', 'VNET_ROUTE*', 'MACSEC_PORT_TABLE*', 'MACSEC_INGRESS_SA_TABLE*', 'MACSEC_EGRESS_SA_TABLE*', 'MACSEC_INGRESS_SC_TABLE*', 'MACSEC_EGRESS_SC_TABLE*', 'VRF_OBJECT_TABLE*', 'VNET_MONITOR_TABLE*', 'BFD_SESSION_TABLE*', 'SYSTEM_NEIGH_TABLE*', 'FABRIC_PORT_TABLE*', 'TUNNEL_DECAP_TABLE*', 'TUNNEL_DECAP_TERM_TABLE*', 'HIGH_FREQUENCY_TELEMETRY_SESSION_TABLE*', 'PROCESS_HEALTH*' " $SONIC_DB_CLI APPL_STATE_DB FLUSHDB + # Flush DPU remote databases (DPU device only) + # Only run if this is a DPU device (type=SmartSwitchDPU or switch_type=dpu) + DEVICE_TYPE=`$SONIC_DB_CLI CONFIG_DB hget "DEVICE_METADATA|localhost" type` + SWITCH_TYPE=`$SONIC_DB_CLI CONFIG_DB hget "DEVICE_METADATA|localhost" switch_type` + if [[ x"${DEVICE_TYPE}" == x"SmartSwitchDPU" || x"${SWITCH_TYPE}" == x"dpu" ]]; then + # Check if DPU_APPL_DB remote database is reachable + if $SONIC_DB_CLI DPU_APPL_DB PING >/dev/null 2>&1; then + debug "Flushing DPU remote databases (DPU_APPL_DB, DPU_STATE_DB, DPU_APPL_STATE_DB, DPU_COUNTERS_DB) ..." + $SONIC_DB_CLI DPU_APPL_DB FLUSHDB + $SONIC_DB_CLI DPU_STATE_DB FLUSHDB + $SONIC_DB_CLI DPU_APPL_STATE_DB FLUSHDB + $SONIC_DB_CLI DPU_COUNTERS_DB FLUSHDB + fi + fi clean_up_chassis_db_tables rm -rf /tmp/cache MEDIA_SETTINGS="/usr/share/sonic/device/$PLATFORM/media_settings.json" diff --git a/files/scripts/syncd.sh b/files/scripts/syncd.sh index dabc3a2dfce..be0ea1990a2 100755 --- a/files/scripts/syncd.sh +++ b/files/scripts/syncd.sh @@ -34,11 +34,17 @@ function remove_ethernet_interfaces() { debug "remove_ethernet_interfaces: Execution time: ${duration}s (NET_NS: $NET_NS)" } -function reset_mellanox_drivers() { +function get_mellanox_dev() +{ local mlx_dev="/proc/mlx_sx/sx_core" if [[ $DEV != "" ]]; then mlx_dev="/proc/mlx_sx/asic$DEV/sx_core" fi + echo $mlx_dev +} + +function reset_mellanox_drivers() { + local mlx_dev=$(get_mellanox_dev) if [[ -f /var/run/mlx_sx_core_restart_required$DEV ]]; then debug "Restarting Mellanox drivers for ASIC $DEV" @@ -137,10 +143,6 @@ function waitplatform() { } function stopplatform1() { - if [[ x$sonic_asic_platform == x"mellanox" ]]; then - echo "health_check_trigger del_dev 1" > /proc/mlx_sx/sx_core - fi - if [[ x$sonic_asic_platform != x"mellanox" ]] || [[ x$TYPE != x"cold" ]]; then # Invoke platform specific pre shutdown routine. PLATFORM=`$SONIC_DB_CLI CONFIG_DB hget 'DEVICE_METADATA|localhost' platform` diff --git a/files/scripts/syncd_common.sh b/files/scripts/syncd_common.sh index d3a8b0df7c4..360faec70a4 100755 --- a/files/scripts/syncd_common.sh +++ b/files/scripts/syncd_common.sh @@ -15,7 +15,9 @@ function debug() { - /usr/bin/logger $1 + # Use --id=$$ so all messages from this script share the parent shell's PID, + # preventing rsyslog imuxsock ratelimiter memory growth. + /usr/bin/logger --id=$$ -- "$1" /bin/echo `date` "- $1" >> ${DEBUGLOG} } @@ -104,7 +106,7 @@ start() { lock_service_state_change - mkdir -p /host/warmboot + mkdir -p /host/warmboot$DEV wait_for_database_service check_warm_boot @@ -113,9 +115,9 @@ start() { if [[ x"$WARM_BOOT" == x"true" ]]; then # Leave a mark for syncd scripts running inside docker. - touch /host/warmboot/warm-starting + touch /host/warmboot$DEV/warm-starting else - rm -f /host/warmboot/warm-starting + rm -f /host/warmboot$DEV/warm-starting fi startplatform diff --git a/files/scripts/tests/test_k8s_pod_control.sh b/files/scripts/tests/test_k8s_pod_control.sh new file mode 100644 index 00000000000..1d9f1125058 --- /dev/null +++ b/files/scripts/tests/test_k8s_pod_control.sh @@ -0,0 +1,218 @@ +#!/bin/bash +# Unit tests for k8s_pod_control.sh +# Uses a mock docker command to test container discovery and restart logic. +# +# Usage: bash files/scripts/tests/test_k8s_pod_control.sh + +set -euo pipefail + +PASS=0 +FAIL=0 +SCRIPT_DIR="$(cd "$(dirname "$0")/.." && pwd)" +SCRIPT="${SCRIPT_DIR}/k8s_pod_control.sh" + +# ── helpers ────────────────────────────────────────────────────────── +red() { printf '\033[31m%s\033[0m' "$*"; } +green() { printf '\033[32m%s\033[0m' "$*"; } + +assert_eq() { + local test_name="$1" expected="$2" actual="$3" + if [[ "$expected" == "$actual" ]]; then + echo " $(green PASS): ${test_name}" + (( ++PASS )) + else + echo " $(red FAIL): ${test_name}" + echo " expected: $(printf '%q' "$expected")" + echo " actual: $(printf '%q' "$actual")" + (( ++FAIL )) + fi +} + +# ── Mock environment ────────────────────────────────────────────────── +MOCK_DIR="$(mktemp -d)" +trap 'rm -rf "${MOCK_DIR}"' EXIT + +# Mock docker: handles ps and restart subcommands +cat > "${MOCK_DIR}/docker" <<'MOCK_DOCKER' +#!/bin/bash +subcmd="$1"; shift +case "$subcmd" in + ps) + quiet=false; all=false; format="" + container_name=""; pod_namespace="" + while (( $# > 0 )); do + case "$1" in + -q) quiet=true; shift ;; + -a) all=true; shift ;; + --filter) + case "$2" in + label=io.kubernetes.container.name=*) + container_name="${2#label=io.kubernetes.container.name=}" + ;; + label=io.kubernetes.pod.namespace=*) + pod_namespace="${2#label=io.kubernetes.pod.namespace=}" + ;; + esac + shift 2 + ;; + --format) format="$2"; shift 2 ;; + *) shift ;; + esac + done + # Only respond when namespace is sonic (matches script's NS). + if [[ "$pod_namespace" != "sonic" ]]; then + exit 0 + fi + case "$container_name" in + "telemetry") + if $quiet; then + echo "abc123def456" + elif [[ "$format" == *".State"* ]]; then + echo "ds-leafrouter-telemetry-zgmsl running" + else + echo "ds-leafrouter-telemetry-zgmsl" + fi + ;; + "multi") + if $quiet; then + printf '%s\n' "aaa111" "bbb222" + elif [[ "$format" == *".State"* ]]; then + printf '%s\n' "pod-multi-1 running" "pod-multi-2 exited" + else + printf '%s\n' "pod-multi-1" "pod-multi-2" + fi + ;; + "nonexistent") + ;; # no output + esac + ;; + restart) + cid="$1" + case "$cid" in + "abc123def456"|"aaa111"|"bbb222") ;; + *) exit 1 ;; + esac + ;; +esac +MOCK_DOCKER +chmod +x "${MOCK_DIR}/docker" + +# Mock logger (absorb all log output) +cat > "${MOCK_DIR}/logger" <<'MOCK_LOGGER' +#!/bin/bash +exit 0 +MOCK_LOGGER +chmod +x "${MOCK_DIR}/logger" + +export PATH="${MOCK_DIR}:${PATH}" + +# Create a sourceable version of the script: +# - replace /usr/bin/logger with plain logger (so our PATH mock is used) +# - strip the case dispatch block at the bottom +SOURCE_SCRIPT="${MOCK_DIR}/k8s_pod_control_funcs.sh" +sed -e 's|/usr/bin/logger|logger|g' \ + -e '/^case "\${1:-}" in$/,/^esac$/d' \ + "$SCRIPT" > "$SOURCE_SCRIPT" + +# Source functions with SERVICE_NAME pre-set +export SERVICE_NAME="telemetry" +source "$SOURCE_SCRIPT" + +# ── Test suite ──────────────────────────────────────────────────────── +echo "=== DOCKER_FILTERS ===" + +assert_eq "DOCKER_FILTERS contains container.name filter for telemetry" \ + "label=io.kubernetes.container.name=telemetry" "${DOCKER_FILTERS[1]}" +assert_eq "DOCKER_FILTERS contains pod.namespace filter" \ + "label=io.kubernetes.pod.namespace=sonic" "${DOCKER_FILTERS[3]}" + +# Helper to rebuild DOCKER_FILTERS for a different SERVICE_NAME (mirrors script) +set_filters_for() { + DOCKER_FILTERS=( + --filter "label=io.kubernetes.container.name=$1" + --filter "label=io.kubernetes.pod.namespace=${NS}" + ) +} + +echo "" +echo "=== container_ids_on_node ===" + +result="$(container_ids_on_node)" +assert_eq "returns container ID for telemetry" "abc123def456" "$result" + +# Switch to multi-container service +set_filters_for "multi" +result="$(container_ids_on_node)" +line_count=$(printf '%s\n' "$result" | grep -c .) +assert_eq "returns multiple container IDs" "2" "$line_count" + +# No match +set_filters_for "nonexistent" +result="$(container_ids_on_node)" +assert_eq "no match returns empty" "" "$result" + +echo "" +echo "=== pods_on_node ===" + +set_filters_for "telemetry" +result="$(pods_on_node)" +assert_eq "returns pod name and state" \ + "ds-leafrouter-telemetry-zgmsl running" "$result" + +set_filters_for "multi" +result="$(pods_on_node)" +line_count=$(printf '%s\n' "$result" | grep -c .) +assert_eq "returns multiple pods" "2" "$line_count" + +set_filters_for "nonexistent" +result="$(pods_on_node)" +assert_eq "no match returns empty" "" "$result" + +echo "" +echo "=== restart_containers ===" + +set_filters_for "telemetry" +SERVICE_NAME="telemetry" +restart_containers; rc=$? +assert_eq "restart single container succeeds" "0" "$rc" + +set_filters_for "multi" +SERVICE_NAME="multi" +restart_containers; rc=$? +assert_eq "restart multiple containers succeeds" "0" "$rc" + +set_filters_for "nonexistent" +SERVICE_NAME="nonexistent" +restart_containers; rc=$? +assert_eq "restart with no containers is no-op" "0" "$rc" + +echo "" +echo "=== cmd_status awk filter ===" + +has_running() { + awk '$2=="running"{found=1} END{exit found?0:1}' <<<"$1" && echo "yes" || echo "no" +} + +result="$(has_running "ds-leafrouter-telemetry-zgmsl running")" +assert_eq "awk detects running" "yes" "$result" + +result="$(has_running "ds-leafrouter-restapi-abc12 exited")" +assert_eq "awk detects exited" "no" "$result" + +result="$(has_running $'pod1 running\npod2 exited')" +assert_eq "awk mixed (has running)" "yes" "$result" + +result="$(has_running $'pod1 exited\npod2 exited')" +assert_eq "awk all exited" "no" "$result" + +# ── Summary ─────────────────────────────────────────────────────────── +echo "" +echo "==============================" +echo "Results: $(green "${PASS} passed"), $(red "${FAIL} failed")" +echo "==============================" + +if (( FAIL > 0 )); then + exit 1 +fi +echo "PASS!!" +exit 0 diff --git a/files/scripts/write_standby.py b/files/scripts/write_standby.py index 07154cc69d5..e351388f23a 100755 --- a/files/scripts/write_standby.py +++ b/files/scripts/write_standby.py @@ -161,6 +161,14 @@ def apply_mux_config(self): Writes standby mux state to APP DB for all mux interfaces """ if not self.is_dualtor: + if self.shutdown_module == 'bgp': + # On non-dualToR, --shutdown bgp is a no-op (no MUX_CABLE_TABLE to update). + # Returning here lets bgp.service ExecStopPost succeed; exiting non-zero + # would mark bgp.service failed and burn the unit's StartLimitBurst. + # The mux startup path (no --shutdown arg) and the --shutdown mux path + # intentionally still exit 1 — refusing mux operations on non-dualToR + # is the intent of #23804. + return logger.log_warning("It is not a Dual-ToR system, do not start mux container") sys.exit(1) diff --git a/functions.sh b/functions.sh index cb52bf816c5..b1ee84e1da5 100644 --- a/functions.sh +++ b/functions.sh @@ -40,13 +40,13 @@ die() { docker_try_rmi() { local image_name="$1" ## Note: inspect output has quotation characters, so sed to remove it as an argument - local image_id=$(docker inspect --format="{{json .Id}}" $image_name | sed -e 's/^"//' -e 's/"$//') + local image_id=$(docker inspect --format="{{json .Id}}" "$image_name" | sed -e 's/^"//' -e 's/"$//') [ -z "$image_id" ] || { ## Remove all the exited containers from this image - docker ps -a -q -f "status=exited" -f "ancestor=$1" | xargs --no-run-if-empty docker rm + docker ps -a -q -f "status=exited" -f "ancestor=$image_name" | xargs --no-run-if-empty docker rm ## Note: If there are running containers from this image, the build system is in an ## unexpected state. The 'rmi' will fail and we need investigate the build environment. - docker rmi $image_name + docker rmi "$image_name" } } diff --git a/get_docker-base.sh b/get_docker-base.sh index 91359c49bed..3f6ea9f6d22 100755 --- a/get_docker-base.sh +++ b/get_docker-base.sh @@ -12,7 +12,7 @@ set -x -e TARGET_PATH=$(sed -n 's/TARGET_PATH\s*=\s*//p' slave.mk) ## [SuppressMessage("Microsoft.Security", "CS002:SecretInNextLine", Justification="Read-only link of Azure Blob storage with shared access signature (SAS)")] -BASE_URL="https://packages.trafficmanager.net/public/docker-base.ea507753d98b0769e2a15be13003331f8ad38d1c15b40a683e05fc53b1463b10.gz" +BASE_URL="$BUILD_PUBLIC_URL/docker-base.ea507753d98b0769e2a15be13003331f8ad38d1c15b40a683e05fc53b1463b10.gz" base_image_name=docker-base docker_try_rmi $base_image_name diff --git a/installer/default_platform.conf b/installer/default_platform.conf index 4a882fc1fc3..5a540c0692a 100755 --- a/installer/default_platform.conf +++ b/installer/default_platform.conf @@ -111,6 +111,8 @@ legacy_volume_label="ACS-OS" create_demo_gpt_partition() { blk_dev="$1" + blk_suffix= + echo $blk_dev | grep -q '^/dev/nvme' && blk_suffix="p" # Create a temp fifo and store string in variable tmpfifo=$(mktemp -u) @@ -125,12 +127,16 @@ create_demo_gpt_partition() # Note: You can use any character as a separator for sed, not just '/' echo "$demo_part" > $tmpfifo & while read -r part_index; do - if [ "$blk_dev$part_index" = "$cur_part" ]; then continue; fi + if [ "${blk_dev}${blk_suffix}$part_index" = "$cur_part" ]; then continue; fi echo "deleting partition $part_index ..." # if the partition is already mounted, umount first - df $blk_dev$part_index 2>/dev/null && { - umount $blk_dev$part_index || { - echo "Error: Unable to umount $blk_dev$part_index" + # Note: NVMe partitions require the 'p' suffix (e.g. /dev/nvme0n1p3), + # so use ${blk_dev}${blk_suffix}$part_index instead of $blk_dev$part_index. + # ONIE does not mount the SONiC partition normally, but if a previous + # install was interrupted this ensures umount is not silently skipped. + df ${blk_dev}${blk_suffix}$part_index 2>/dev/null && { + umount ${blk_dev}${blk_suffix}$part_index || { + echo "Error: Unable to umount ${blk_dev}${blk_suffix}$part_index" exit 1 } } @@ -138,8 +144,23 @@ create_demo_gpt_partition() echo "Error: Unable to delete partition $part_index on $blk_dev" exit 1 } - partprobe || { - echo "Error: Unable to partprobe" + # Retry partprobe for up to 10 seconds. sgdisk -d triggers a udev + # event; on fast NVMe devices partprobe may race with udev processing + # that event and return EBUSY. udevadm settle would be ideal but is + # not available in ONIE, so retry until udev finishes. + partprobe_ok=0 + i=1 + while [ $i -le 10 ]; do + if partprobe_err=$(partprobe 2>&1); then + partprobe_ok=1 + break + fi + echo "partprobe attempt $i failed: $partprobe_err (retrying in 1s...)" + sleep 1 + i=$((i + 1)) + done + [ $partprobe_ok -eq 1 ] || { + echo "Error: partprobe failed after 10 attempts, last error: $partprobe_err" exit 1 } done < $tmpfifo @@ -595,6 +616,7 @@ menuentry '$demo_grub_entry' { if [ x$grub_platform = xxen ]; then insmod xzio; insmod lzopio; fi insmod part_msdos insmod ext2 + insmod efi_gop $GRUB_CFG_LINUX_CMD /$image_dir/boot/vmlinuz-6.12.41+deb13-sonic-${arch} root=$grub_cfg_root rw $GRUB_CMDLINE_LINUX \ net.ifnames=0 biosdevname=0 \ loop=$image_dir/$FILESYSTEM_SQUASHFS loopfstype=squashfs \ diff --git a/platform/alpinevs b/platform/alpinevs index cd9e82441fb..d484f504a4e 160000 --- a/platform/alpinevs +++ b/platform/alpinevs @@ -1 +1 @@ -Subproject commit cd9e82441fb67808d3d80dfe7eae7eb199b48f80 +Subproject commit d484f504a4e3c6097a5b7d06139640608de7e1cc diff --git a/platform/aspeed/aspeed-platform-services.mk b/platform/aspeed/aspeed-platform-services.mk new file mode 100644 index 00000000000..1c9fee35552 --- /dev/null +++ b/platform/aspeed/aspeed-platform-services.mk @@ -0,0 +1,7 @@ +# Aspeed Platform Services Package +# Vendor-independent services for all Aspeed platforms +# +ASPEED_PLATFORM_SERVICES = aspeed-platform-services_1.0.0_all.deb +$(ASPEED_PLATFORM_SERVICES)_SRC_PATH = $(PLATFORM_PATH)/aspeed-platform-services +SONIC_DPKG_DEBS += $(ASPEED_PLATFORM_SERVICES) + diff --git a/platform/aspeed/aspeed-platform-services/Makefile b/platform/aspeed/aspeed-platform-services/Makefile new file mode 100644 index 00000000000..6aafc3d2c85 --- /dev/null +++ b/platform/aspeed/aspeed-platform-services/Makefile @@ -0,0 +1,8 @@ +.PHONY: clean + +clean: + rm -rf debian/aspeed-platform-services + rm -rf debian/.debhelper + rm -f debian/files + rm -f debian/*.log + rm -f debian/*.substvars diff --git a/platform/aspeed/aspeed-platform-services/debian/changelog b/platform/aspeed/aspeed-platform-services/debian/changelog new file mode 100644 index 00000000000..c9e18360017 --- /dev/null +++ b/platform/aspeed/aspeed-platform-services/debian/changelog @@ -0,0 +1,8 @@ +aspeed-platform-services (1.0.0) unstable; urgency=low + + * Initial release + * Consolidate Aspeed platform initialization services + * Add watchdog keepalive daemon (180s timeout, 60s interval) + + -- SONiC Team Mon, 16 Mar 2026 00:00:00 +0000 + diff --git a/platform/aspeed/aspeed-platform-services/debian/compat b/platform/aspeed/aspeed-platform-services/debian/compat new file mode 100644 index 00000000000..021ea30c0eb --- /dev/null +++ b/platform/aspeed/aspeed-platform-services/debian/compat @@ -0,0 +1,2 @@ +10 + diff --git a/platform/aspeed/aspeed-platform-services/debian/control b/platform/aspeed/aspeed-platform-services/debian/control new file mode 100644 index 00000000000..554b50333cc --- /dev/null +++ b/platform/aspeed/aspeed-platform-services/debian/control @@ -0,0 +1,21 @@ +Source: aspeed-platform-services +Section: misc +Priority: optional +Maintainer: SONiC Team +Build-Depends: debhelper (>= 10) +Standards-Version: 3.9.6 + +Package: aspeed-platform-services +Architecture: all +Depends: ${misc:Depends} +Description: Aspeed platform services for SONiC + This package provides platform-specific services for Aspeed-based BMC platforms: + - Machine configuration initialization + - Platform initialization + - Switch CPU console initialization + - U-Boot environment initialization + - Watchdog keepalive daemon + . + The watchdog keepalive daemon keeps the hardware watchdog armed and sends + periodic keepalive signals to prevent system resets. + diff --git a/platform/aspeed/aspeed-platform-services/debian/rules b/platform/aspeed/aspeed-platform-services/debian/rules new file mode 100755 index 00000000000..36a0021b5ee --- /dev/null +++ b/platform/aspeed/aspeed-platform-services/debian/rules @@ -0,0 +1,24 @@ +#!/usr/bin/make -f + +%: + dh $@ + +override_dh_auto_build: + # Nothing to build + +override_dh_auto_install: + # Install scripts + install -d $(CURDIR)/debian/aspeed-platform-services/usr/bin + install -m 0755 $(CURDIR)/scripts/*.sh $(CURDIR)/debian/aspeed-platform-services/usr/bin/ + + # Install systemd service files + install -d $(CURDIR)/debian/aspeed-platform-services/lib/systemd/system + install -m 0644 $(CURDIR)/systemd/*.service $(CURDIR)/debian/aspeed-platform-services/lib/systemd/system/ + +override_dh_installsystemd: + dh_installsystemd --name=sonic-machine-conf-init sonic-machine-conf-init.service + dh_installsystemd --name=sonic-platform-init sonic-platform-init.service + dh_installsystemd --name=sonic-switchcpu-console-init sonic-switchcpu-console-init.service + dh_installsystemd --name=sonic-uboot-env-init sonic-uboot-env-init.service + dh_installsystemd --name=watchdog-keepalive watchdog-keepalive.service + diff --git a/platform/aspeed/aspeed-platform-services/scripts/sonic-fw-env-config.sh b/platform/aspeed/aspeed-platform-services/scripts/sonic-fw-env-config.sh new file mode 100644 index 00000000000..db58fb59dd0 --- /dev/null +++ b/platform/aspeed/aspeed-platform-services/scripts/sonic-fw-env-config.sh @@ -0,0 +1,147 @@ +#!/bin/sh +# Generate /etc/fw_env.config for fw_printenv/fw_setenv. +# Order: device data (per onie_platform), then /proc/mtd, then device-tree hints, then eMMC default. +# SONIC_MACHINE_CONF: path to machine.conf (default /host/machine.conf). Override for initramfs +# (e.g. /tmp/machine.conf). If onie_platform is unset, that file is sourced when resolving device fw_env. +# Optional: SONIC_FW_ENV_LOG_FILE — if set, each message is appended there (same timestamped format as +# sonic-uboot-env-init log); messages always go to stderr as well. + +FW_ENV_MSG_PREFIX="${FW_ENV_MSG_PREFIX:-sonic-fw-env-config}" +SONIC_MACHINE_CONF="${SONIC_MACHINE_CONF:-/host/machine.conf}" + +fw_env_msg() { + line="[$(date '+%Y-%m-%d %H:%M:%S')] [$FW_ENV_MSG_PREFIX] $*" + echo "$line" >&2 + if [ -n "${SONIC_FW_ENV_LOG_FILE:-}" ]; then + echo "$line" >> "$SONIC_FW_ENV_LOG_FILE" + fi +} + +sonic_fw_env_resolve_onie_platform() { + if [ -n "${onie_platform:-}" ]; then + return 0 + fi + if [ ! -f "$SONIC_MACHINE_CONF" ]; then + fw_env_msg "ERROR: machine.conf not found: $SONIC_MACHINE_CONF" + exit 1 + fi + . "$SONIC_MACHINE_CONF" + if [ -z "${onie_platform:-}" ]; then + fw_env_msg "ERROR: onie_platform not set after sourcing $SONIC_MACHINE_CONF" + exit 1 + fi + return 0 +} + +sonic_fw_env_wait_for_mtd() { + WAIT_COUNT=0 + MAX_WAIT="${SONIC_FW_ENV_MTD_WAIT:-10}" + while [ ! -f /proc/mtd ] && [ "$WAIT_COUNT" -lt "$MAX_WAIT" ]; do + fw_env_msg "Waiting for /proc/mtd ($WAIT_COUNT/$MAX_WAIT)..." + sleep 1 + WAIT_COUNT=$((WAIT_COUNT + 1)) + done + if [ ! -f /proc/mtd ]; then + fw_env_msg "WARNING: /proc/mtd not available after ${MAX_WAIT}s" + fi +} + +sonic_fw_env_install_from_path() { + src="$1" + changed=1 + if [ -f /etc/fw_env.config ]; then + if command -v cmp >/dev/null 2>&1 && cmp -s "$src" /etc/fw_env.config; then + changed=0 + elif [ "$(cat "$src")" = "$(cat /etc/fw_env.config)" ]; then + changed=0 + fi + fi + if [ "$changed" -eq 1 ]; then + cp "$src" /etc/fw_env.config + fw_env_msg "Updated /etc/fw_env.config from $src" + else + fw_env_msg "Keeping /etc/fw_env.config (matches $src)" + fi +} + +sonic_fw_env_install_from_content() { + content="$1" + mkdir -p /etc + if [ -f /etc/fw_env.config ]; then + CURRENT_CONFIG=$(cat /etc/fw_env.config) + if [ "$CURRENT_CONFIG" != "$content" ]; then + fw_env_msg "Updating /etc/fw_env.config" + printf '%s\n' "$content" > /etc/fw_env.config + else + fw_env_msg "Keeping /etc/fw_env.config (unchanged)" + fi + else + printf '%s\n' "$content" > /etc/fw_env.config + fw_env_msg "Created /etc/fw_env.config" + fi +} + +sonic_fw_env_try_device_data() { + sonic_fw_env_resolve_onie_platform + if [ -z "${onie_platform:-}" ]; then + return 1 + fi + for p in \ + "/usr/share/sonic/device/${onie_platform}/fw_env" \ + "/device/aspeed/${onie_platform}/fw_env" + do + if [ -f "$p" ]; then + mkdir -p /etc + sonic_fw_env_install_from_path "$p" + return 0 + fi + done + return 1 +} + +sonic_fw_env_from_mtd_or_fallback() { + sonic_fw_env_wait_for_mtd + + MTD_ENV_LINE=$(grep -E '"u-boot-env"|"uboot-env"' /proc/mtd 2>/dev/null || true) + if [ -n "$MTD_ENV_LINE" ]; then + MTD_DEV=$(echo "$MTD_ENV_LINE" | awk -F: '{print $1}') + MTD_SIZE=$(echo "$MTD_ENV_LINE" | awk '{print "0x" $2}') + MTD_ERASESIZE=$(echo "$MTD_ENV_LINE" | awk '{print "0x" $3}') + if [ -c "/dev/$MTD_DEV" ]; then + FW_ENV_CONFIG="/dev/$MTD_DEV 0x0 $MTD_SIZE $MTD_ERASESIZE" + fw_env_msg "Detected U-Boot env from /proc/mtd: $FW_ENV_CONFIG" + sonic_fw_env_install_from_content "$FW_ENV_CONFIG" + return 0 + fi + fi + + DTB_HAS_ENV_BLK=$(grep -E "uboot-env|u-boot-env" /proc/mtd 2>/dev/null | sed -e 's/:.*$//' || true) + if [ -n "$DTB_HAS_ENV_BLK" ] && [ -c "/dev/$DTB_HAS_ENV_BLK" ]; then + PROC_ENV_FILE=$(find /proc/device-tree/ -name env_size 2>/dev/null | head -1 || true) + if [ -n "$PROC_ENV_FILE" ] && command -v hd >/dev/null 2>&1; then + UBOOT_ENV_SIZ="0x$(hd "$PROC_ENV_FILE" | awk 'FNR==1 {print $2 $3 $4 $5}')" + UBOOT_ENV_ERASE_SIZ="0x$(grep -E "uboot-env|u-boot-env" /proc/mtd | awk '{print $3}')" + if [ -n "$UBOOT_ENV_SIZ" ] && [ -n "$UBOOT_ENV_ERASE_SIZ" ]; then + FW_ENV_CONFIG="/dev/$DTB_HAS_ENV_BLK 0x00000000 $UBOOT_ENV_SIZ $UBOOT_ENV_ERASE_SIZ" + fw_env_msg "Detected U-Boot env from device tree: $FW_ENV_CONFIG" + sonic_fw_env_install_from_content "$FW_ENV_CONFIG" + return 0 + fi + fi + fi + + FW_ENV_CONFIG="/dev/mmcblk0 0x1F40000 0x20000 0x1000" + fw_env_msg "Using default eMMC U-Boot env location: $FW_ENV_CONFIG" + sonic_fw_env_install_from_content "$FW_ENV_CONFIG" + return 0 +} + +mkdir -p /etc + +if sonic_fw_env_try_device_data; then + exit 0 +fi + +sonic_fw_env_from_mtd_or_fallback + +exit 0 diff --git a/platform/aspeed/aspeed-platform-services/scripts/sonic-machine-conf-init.sh b/platform/aspeed/aspeed-platform-services/scripts/sonic-machine-conf-init.sh new file mode 100755 index 00000000000..fde76a038c7 --- /dev/null +++ b/platform/aspeed/aspeed-platform-services/scripts/sonic-machine-conf-init.sh @@ -0,0 +1,80 @@ +#!/bin/sh +# SONiC Machine Configuration Initialization Script +# This script creates machine.conf on first boot by detecting hardware from DTB. +# Override paths for initramfs: MACHINE_CONF=/tmp/machine.conf LOG_FILE=/dev/null + +set -e + +MACHINE_CONF="${MACHINE_CONF:-/host/machine.conf}" +LOG_FILE="${LOG_FILE:-/var/log/sonic-machine-conf-init.log}" + +mkdir -p "$(dirname "$MACHINE_CONF")" +case "$LOG_FILE" in +/dev/fd/*|/dev/null) ;; +*) mkdir -p "$(dirname "$LOG_FILE")" ;; +esac + +log() { + echo "[$(date '+%Y-%m-%d %H:%M:%S')] $*" | tee -a "$LOG_FILE" +} + +log "Starting machine.conf initialization..." + +# Check if machine.conf already exists +if [ -f "$MACHINE_CONF" ]; then + log "machine.conf already exists at $MACHINE_CONF. Skipping initialization." + exit 0 +fi + +# Detect hardware from device tree (compatible and model) +if [ ! -f /proc/device-tree/compatible ]; then + log "ERROR: /proc/device-tree/compatible not found. Cannot detect hardware." + exit 1 +fi + +COMPATIBLE=$(cat /proc/device-tree/compatible | tr '\0' ' ') +MODEL=$(cat /proc/device-tree/model 2>/dev/null || echo "") +log "Detected compatible: $COMPATIBLE, model: $MODEL" + +PLATFORM="" +MACHINE="" + +if echo "$COMPATIBLE" | grep -q "nexthop,nexthop-b27-r0"; then + PLATFORM="arm64-nexthop_b27-r0" + MACHINE="aspeed_ast2700" + log "Detected NextHop B27 BMC platform" +elif echo "$MODEL" | grep -qi -e "AST2700-A1 Spc6" -e "AST2700-A2 Spc6"; then + PLATFORM="arm64-aspeed_nvidia_ast2700_bmc-r0" + MACHINE="aspeed_ast2700" + log "Detected NVIDIA SPC6 BMC platform" +elif echo "$COMPATIBLE" | grep -q "aspeed,ast2700-evb"; then + PLATFORM="arm64-aspeed_ast2700_evb-r0" + MACHINE="aspeed_ast2700" + log "Detected Aspeed AST2700 EVB platform" +elif echo "$COMPATIBLE" | grep -q "arista_goldfinch-r0"; then + PLATFORM="arm64-arista_goldfinch-r0" + MACHINE="aspeed_ast2700" + log "Detected Arista Goldfinch platform" +else + log "ERROR: Unknown hardware. Compatible: $COMPATIBLE, model: $MODEL" + log "Supported platforms: nexthop-b27-r0, nvidia-spc6-bmc, aspeed_ast2700_evb, arista_goldfinch-r0" + exit 1 +fi + +# Create machine.conf +log "Creating $MACHINE_CONF for platform: $PLATFORM" + +cat > "$MACHINE_CONF" << EOF +onie_platform=$PLATFORM +onie_machine=$MACHINE +onie_arch=arm64 +onie_build_platform=$PLATFORM +EOF + +log "Created $MACHINE_CONF:" +cat "$MACHINE_CONF" | tee -a "$LOG_FILE" + +log "Machine configuration initialization complete" + +exit 0 + diff --git a/platform/aspeed/aspeed-platform-services/scripts/sonic-platform-init.sh b/platform/aspeed/aspeed-platform-services/scripts/sonic-platform-init.sh new file mode 100755 index 00000000000..1b2b2547869 --- /dev/null +++ b/platform/aspeed/aspeed-platform-services/scripts/sonic-platform-init.sh @@ -0,0 +1,88 @@ +#!/bin/bash +# Aspeed Platform Initialization Script +# This script sets up the platform symlink and installs platform wheels on the host + +set -e + +LOG_FILE="/var/log/aspeed-platform-init.log" +PLATFORM_SYMLINK="/usr/share/sonic/platform" + +log() { + echo "[$(date '+%Y-%m-%d %H:%M:%S')] $*" | tee -a "$LOG_FILE" +} + +log "Starting Aspeed platform initialization..." + +# Get platform name from machine.conf +if [ ! -f /host/machine.conf ]; then + log "ERROR: /host/machine.conf not found. Cannot determine platform." + exit 1 +fi + +# Source machine.conf to get platform +. /host/machine.conf + +PLATFORM="" +if [ -n "$aboot_platform" ]; then + PLATFORM="$aboot_platform" +elif [ -n "$onie_platform" ]; then + PLATFORM="$onie_platform" +else + log "ERROR: Could not determine platform from /host/machine.conf" + exit 1 +fi + +log "Detected platform: $PLATFORM" + +PLATFORM_DEVICE_DIR="/usr/share/sonic/device/$PLATFORM" + +# Check if platform device directory exists +if [ ! -d "$PLATFORM_DEVICE_DIR" ]; then + log "ERROR: Platform device directory not found: $PLATFORM_DEVICE_DIR" + exit 1 +fi + +# Create platform symlink for host services (watchdog-control, etc.) +log "Creating platform symlink..." + +# Remove old symlink if it exists +if [ -L "$PLATFORM_SYMLINK" ]; then + log "Removing existing symlink: $PLATFORM_SYMLINK" + rm -f "$PLATFORM_SYMLINK" +elif [ -e "$PLATFORM_SYMLINK" ]; then + log "WARNING: $PLATFORM_SYMLINK exists but is not a symlink. Removing..." + rm -rf "$PLATFORM_SYMLINK" +fi + +# Create the symlink +ln -sf "$PLATFORM_DEVICE_DIR" "$PLATFORM_SYMLINK" +log "Created symlink: $PLATFORM_SYMLINK -> $PLATFORM_DEVICE_DIR" + +# Install platform wheels on host for services like watchdog-control +# These services run on the host (not in containers) and need to import sonic_platform +log "Installing platform wheels on host..." + +WHEEL_COUNT=$(find "$PLATFORM_DEVICE_DIR" -maxdepth 1 -name "*.whl" 2>/dev/null | wc -l) + +if [ "$WHEEL_COUNT" -eq 0 ]; then + log "WARNING: No .whl files found in $PLATFORM_DEVICE_DIR" +else + log "Found $WHEEL_COUNT wheel file(s) to install" + + # Install wheels without dependencies (dependencies should already be installed) + for wheel in "$PLATFORM_DEVICE_DIR"/*.whl; do + if [ -f "$wheel" ]; then + log "Installing: $(basename $wheel)" + if pip3 install --no-deps "$wheel"; then + log "Successfully installed: $(basename $wheel)" + else + log "WARNING: Failed to install: $(basename $wheel)" + fi + fi + done +fi + +log "Aspeed platform initialization complete" + +exit 0 + diff --git a/platform/aspeed/aspeed-platform-services/scripts/sonic-program-uboot-env.sh b/platform/aspeed/aspeed-platform-services/scripts/sonic-program-uboot-env.sh new file mode 100644 index 00000000000..b12b5e1714d --- /dev/null +++ b/platform/aspeed/aspeed-platform-services/scripts/sonic-program-uboot-env.sh @@ -0,0 +1,146 @@ +#!/bin/sh +# Program U-Boot variables for SONiC ext4 + FIT boot. Used by sonic-uboot-env-init (host first boot and +# TFTP initrd with SONIC_UBOOT_ENV_INSTALLER=1). +# +# Required environment: +# UBOOT_ENV_BOOT_DEVICE root block device (e.g. /dev/mmcblk0p1) for blkid UUID +# UBOOT_ENV_DEMO_DEV whole-disk device (e.g. /dev/mmcblk0) +# UBOOT_ENV_DEMO_PART partition index for U-Boot ext4load (e.g. 1) +# UBOOT_ENV_DISK_INTERFACE mmc | scsi +# UBOOT_ENV_IMAGE_DIR e.g. image- +# Optional: +# UBOOT_ENV_INSTALLER_CONF if set and exists, sourced before applying defaults +# SONIC_UBOOT_ENV_LOG_FILE append timestamped lines (same style as other SONiC logs) + +sonic_uboot_env_log() { + msg="$*" + echo "$msg" >&2 + if [ -n "${SONIC_UBOOT_ENV_LOG_FILE:-}" ]; then + echo "[$(date '+%Y-%m-%d %H:%M:%S')] $msg" >> "$SONIC_UBOOT_ENV_LOG_FILE" + fi +} + +# Device-tree node with the FIT config U-Boot actually booted -- the source of truth even for +# a runtime bootconf that was never saved (which fw_printenv cannot see). Overridable for tests. +BOOTCONF_DT_PATHS="${BOOTCONF_DT_PATHS:-/proc/device-tree/chosen/u-boot,bootconf /sys/firmware/devicetree/base/chosen/u-boot,bootconf}" + +sonic_read_bootconf_from_dt() { + for _dt in $BOOTCONF_DT_PATHS; do + [ -r "$_dt" ] || continue + # Single NUL-terminated DT string; strip the NUL and any surrounding whitespace + # (a config-node name has none) so a stray CR/space can't corrupt the value. + _val=$(tr -d '\000[:space:]' < "$_dt" 2>/dev/null) + if [ -n "$_val" ]; then + printf '%s' "$_val" + return 0 + fi + done + return 1 +} + +for v in UBOOT_ENV_BOOT_DEVICE UBOOT_ENV_DEMO_DEV UBOOT_ENV_DEMO_PART UBOOT_ENV_DISK_INTERFACE UBOOT_ENV_IMAGE_DIR; do + eval "sonic_uboot_chk=\${$v-}" + if [ -z "$sonic_uboot_chk" ]; then + sonic_uboot_env_log "ERROR: $v is not set" + exit 1 + fi +done + +if ! command -v fw_setenv >/dev/null 2>&1 || ! command -v fw_printenv >/dev/null 2>&1; then + sonic_uboot_env_log "ERROR: fw_setenv or fw_printenv not available" + exit 1 +fi + +# Read the device-tree bootconf up front so it is logged even if the gate below aborts. +BOOTCONF_DT=$(sonic_read_bootconf_from_dt || true) +if [ -n "$BOOTCONF_DT" ]; then + sonic_uboot_env_log "Detected runtime bootconf from device tree: $BOOTCONF_DT" +fi + +if ! fw_printenv bootcmd >/dev/null 2>&1; then + sonic_uboot_env_log "ERROR: fw_printenv cannot read U-Boot env (check /etc/fw_env.config)" + exit 1 +fi + +if [ -n "${UBOOT_ENV_INSTALLER_CONF:-}" ] && [ -f "$UBOOT_ENV_INSTALLER_CONF" ]; then + . "$UBOOT_ENV_INSTALLER_CONF" || true +fi + +CONSOLE_DEV=${CONSOLE_DEV:-12} +CONSOLE_SPEED=${CONSOLE_SPEED:-115200} +EARLYCON=${EARLYCON:-"earlycon=uart8250,mmio32,0x14c33b00"} +VAR_LOG_SIZE=${VAR_LOG_SIZE:-128} # 128MB for /var/log tmpfs +CONSOLE_PORT="ttyS${CONSOLE_DEV}" + +FS_ROOT_DEV=$UBOOT_ENV_BOOT_DEVICE +FS_UUID=$(blkid -s UUID -o value "$FS_ROOT_DEV" 2>/dev/null || true) +if [ -z "$FS_UUID" ]; then + sonic_uboot_env_log "WARNING: Cannot detect filesystem UUID for $FS_ROOT_DEV; using device path for root=" + ROOT_DEV="$FS_ROOT_DEV" +else + ROOT_DEV="UUID=$FS_UUID" +fi + +IMAGE_DIR=$UBOOT_ENV_IMAGE_DIR +SONIC_VERSION=$(echo "$IMAGE_DIR" | sed 's/^image-/SONiC-OS-/') +disk_interface=$UBOOT_ENV_DISK_INTERFACE +demo_part=$UBOOT_ENV_DEMO_PART + +# Resolve the FIT bootconf (config name without "conf-"): device tree -> saved env -> default. +# Read the saved env once; reused as fallback source and for the change-detection compare. +BOOTCONF_SAVED=$(fw_printenv -n bootconf 2>/dev/null || true) +BOOTCONF=${BOOTCONF_DT:-$BOOTCONF_SAVED} + +# Normalize to a FIT config-node name (see platform/aspeed/sonic_fit.its). +# Add future special cases as branches. +if [ -z "$BOOTCONF" ]; then + BOOTCONF="ast2700-evb" # no usable value -> the FIT "default" config + sonic_uboot_env_log "WARNING: no usable bootconf from device tree or saved env; defaulting to $BOOTCONF" +elif [ "$BOOTCONF" != "${BOOTCONF#conf-}" ]; then # value carries the "conf-" prefix from the device tree + BOOTCONF=${BOOTCONF#conf-} +fi + +# Persist only on change (avoid needless flash writes); a failed write is logged, non-fatal. +if [ "$BOOTCONF_SAVED" != "$BOOTCONF" ]; then + sonic_uboot_env_log "Setting bootconf for FIT (saved=${BOOTCONF_SAVED:-empty/unreadable}) -> $BOOTCONF" + fw_setenv bootconf "$BOOTCONF" || sonic_uboot_env_log "ERROR: Failed to set bootconf" +else + sonic_uboot_env_log "bootconf already set to $BOOTCONF" +fi + +sonic_uboot_env_log "Programming U-Boot env (bootconf=$BOOTCONF, image_dir=$IMAGE_DIR, root=$ROOT_DEV)..." + +fw_setenv image_dir "$IMAGE_DIR" || sonic_uboot_env_log "ERROR: Failed to set image_dir" +fw_setenv fit_name "$IMAGE_DIR/boot/sonic_arm64.fit" || sonic_uboot_env_log "ERROR: Failed to set fit_name" +fw_setenv sonic_version_1 "$SONIC_VERSION" || sonic_uboot_env_log "ERROR: Failed to set sonic_version_1" +fw_setenv image_dir_old "" || sonic_uboot_env_log "ERROR: Failed to set image_dir_old" +fw_setenv fit_name_old "" || sonic_uboot_env_log "ERROR: Failed to set fit_name_old" +fw_setenv sonic_version_2 "None" || sonic_uboot_env_log "ERROR: Failed to set sonic_version_2" +fw_setenv linuxargs_old "" || sonic_uboot_env_log "ERROR: Failed to set linuxargs_old" + +LINUXARGS_VAL="console=${CONSOLE_PORT},${CONSOLE_SPEED}n8 ${EARLYCON} loopfstype=squashfs loop=$IMAGE_DIR/fs.squashfs varlog_size=${VAR_LOG_SIZE} logs_inram=on" +fw_setenv linuxargs "$LINUXARGS_VAL" || sonic_uboot_env_log "ERROR: Failed to set linuxargs" +BOOTARGS_VAL="root=$ROOT_DEV rw rootwait panic=1 $LINUXARGS_VAL" +fw_setenv bootargs "$BOOTARGS_VAL" || sonic_uboot_env_log "ERROR: Failed to set bootargs" + +fw_setenv sonic_boot_load "ext4load ${disk_interface} 0:${demo_part} \${loadaddr} \${fit_name}" || sonic_uboot_env_log "ERROR: Failed to set sonic_boot_load" +fw_setenv sonic_boot_load_old "ext4load ${disk_interface} 0:${demo_part} \${loadaddr} \${fit_name_old}" || sonic_uboot_env_log "ERROR: Failed to set sonic_boot_load_old" +fw_setenv sonic_bootargs "setenv bootargs root=$ROOT_DEV rw rootwait panic=1 \${linuxargs}" || sonic_uboot_env_log "ERROR: Failed to set sonic_bootargs" +fw_setenv sonic_bootargs_old "setenv bootargs root=$ROOT_DEV rw rootwait panic=1 \${linuxargs_old}" || sonic_uboot_env_log "ERROR: Failed to set sonic_bootargs_old" +fw_setenv sonic_image_1 "run sonic_bootargs; run sonic_boot_load; bootm \${loadaddr}#conf-\${bootconf}" || sonic_uboot_env_log "ERROR: Failed to set sonic_image_1" +fw_setenv sonic_image_2 "run sonic_bootargs_old; run sonic_boot_load_old; bootm \${loadaddr}#conf-\${bootconf}" || sonic_uboot_env_log "ERROR: Failed to set sonic_image_2" + +fw_setenv print_menu "echo ===================================================; echo SONiC Boot Menu; echo ===================================================; echo To boot \$sonic_version_1; echo type: run sonic_image_1; echo at the U-Boot prompt after interrupting U-Boot when it says; echo \\\"Hit any key to stop autoboot:\\\" during boot; echo; echo To boot \$sonic_version_2; echo type: run sonic_image_2; echo at the U-Boot prompt after interrupting U-Boot when it says; echo \\\"Hit any key to stop autoboot:\\\" during boot; echo; echo ===================================================" || sonic_uboot_env_log "ERROR: Failed to set print_menu" + +fw_setenv boot_next "run sonic_image_1" || sonic_uboot_env_log "ERROR: Failed to set boot_next" +fw_setenv bootcmd "run print_menu; test -n \"\$boot_once\" && setenv do_boot_once \"\$boot_once\" && setenv boot_once \"\" && saveenv && run do_boot_once; run boot_next" || sonic_uboot_env_log "ERROR: Failed to set bootcmd" + +fw_setenv loadaddr "0x432000000" || sonic_uboot_env_log "ERROR: Failed to set loadaddr" +fw_setenv kernel_addr "0x403000000" || sonic_uboot_env_log "ERROR: Failed to set kernel_addr" +fw_setenv fdt_addr "0x44C000000" || sonic_uboot_env_log "ERROR: Failed to set fdt_addr" +fw_setenv initrd_addr "0x440000000" || sonic_uboot_env_log "ERROR: Failed to set initrd_addr" + +# fw_setenv failures are logged but non-fatal (exit 0): the caller runs us under `set -e`, +# so a non-zero exit would skip the first-boot marker and drop the installer to a shell. +sonic_uboot_env_log "U-Boot environment variables programmed successfully." +exit 0 diff --git a/platform/aspeed/aspeed-platform-services/scripts/sonic-switchcpu-console-init.sh b/platform/aspeed/aspeed-platform-services/scripts/sonic-switchcpu-console-init.sh new file mode 100755 index 00000000000..23e83b27533 --- /dev/null +++ b/platform/aspeed/aspeed-platform-services/scripts/sonic-switchcpu-console-init.sh @@ -0,0 +1,98 @@ +#!/bin/bash +# Aspeed Switch CPU Console Initialization Script +# This script configures the switch CPU console for consutil access + +set -e + +LOG_FILE="/var/log/aspeed-switchcpu-console-init.log" +PLATFORM_SYMLINK="/usr/share/sonic/platform" + +log() { + echo "[$(date '+%Y-%m-%d %H:%M:%S')] $*" | tee -a "$LOG_FILE" +} + +log "Starting switch CPU console initialization..." + +# Verify platform symlink exists +if [ ! -L "$PLATFORM_SYMLINK" ]; then + log "ERROR: Platform symlink $PLATFORM_SYMLINK does not exist" + exit 1 +fi + +RULES_SRC="${PLATFORM_SYMLINK}/99-switchCpu.rules" +RULES_DEST="/etc/udev/rules.d/99-switchCpu.rules" +CONSOLE_CONF="${PLATFORM_SYMLINK}/switch_cpu_console.conf" + +# Set default console parameters +CONSOLE_BAUD_RATE=115200 +CONSOLE_FLOW_CONTROL=0 +CONSOLE_REMOTE_DEVICE=SwitchCpu + +# Load platform-specific console configuration if available +if [ -f "$CONSOLE_CONF" ]; then + log "Loading console configuration from $CONSOLE_CONF" + # shellcheck disable=SC1090 + . "$CONSOLE_CONF" + log "Console settings: baud=$CONSOLE_BAUD_RATE, flow=$CONSOLE_FLOW_CONTROL, device=$CONSOLE_REMOTE_DEVICE" +else + log "No console.conf found, using defaults" +fi + +# Check if platform provides switch CPU console rules +if [ ! -f "$RULES_SRC" ]; then + log "No switch CPU console rules found at $RULES_SRC, skipping console setup" + exit 0 +fi + +log "Found switch CPU console rules, configuring console..." + +# Symlink udev rules +ln -sf "$RULES_SRC" "$RULES_DEST" +log "Created symlink: $RULES_DEST -> $RULES_SRC" + +# Enable console feature +log "Enabling console feature..." +if config console enable; then + log "Console feature enabled via config command" +else + log "WARNING: config console enable failed, trying direct DB write..." +fi + +# Verify and ensure it's actually enabled in CONFIG_DB +if sonic-db-cli CONFIG_DB HSET "CONSOLE_SWITCH|console_mgmt" enabled yes; then + log "Console feature enabled in CONFIG_DB" +else + log "ERROR: Failed to enable console feature in CONFIG_DB" + exit 1 +fi + +# Reload udev to activate the rules +log "Reloading udev rules..." +udevadm control --reload-rules +udevadm trigger +log "Udev rules reloaded and triggered" + +# Configure CONSOLE_PORT|0 with platform settings +log "Configuring CONSOLE_PORT|0 in CONFIG_DB..." + +# Check if entry exists +if sonic-db-cli CONFIG_DB HGETALL "CONSOLE_PORT|0" >/dev/null 2>&1; then + log "CONSOLE_PORT|0 already exists, deleting to ensure correct settings..." + sonic-db-cli CONFIG_DB DEL "CONSOLE_PORT|0" +fi + +# Create with platform-specific settings +log "Creating CONSOLE_PORT|0 with baud=$CONSOLE_BAUD_RATE, flow=$CONSOLE_FLOW_CONTROL, device=$CONSOLE_REMOTE_DEVICE" +if sonic-db-cli CONFIG_DB HMSET "CONSOLE_PORT|0" \ + baud_rate "$CONSOLE_BAUD_RATE" \ + flow_control "$CONSOLE_FLOW_CONTROL" \ + remote_device "$CONSOLE_REMOTE_DEVICE"; then + log "Created CONSOLE_PORT|0 successfully" +else + log "ERROR: Failed to create CONSOLE_PORT|0" + exit 1 +fi + +log "Switch CPU console initialization complete" +exit 0 + diff --git a/platform/aspeed/aspeed-platform-services/scripts/sonic-uboot-env-init.sh b/platform/aspeed/aspeed-platform-services/scripts/sonic-uboot-env-init.sh new file mode 100755 index 00000000000..23ae36c6f77 --- /dev/null +++ b/platform/aspeed/aspeed-platform-services/scripts/sonic-uboot-env-init.sh @@ -0,0 +1,224 @@ +#!/bin/sh +# SONiC U-Boot Environment Initialization Script +# +# Host (default): systemd; /etc/fw_env.config every boot; program U-Boot once (marker on /host). +# Installer: TFTP/raw eMMC initramfs after install; same flow with /sbin helpers. Enable with +# SONIC_UBOOT_ENV_INSTALLER=1 (TFTP init sets this) or pass --installer. + +set -e + +installer_mode() { + case "${SONIC_UBOOT_ENV_INSTALLER:-}" in + 1|yes|true) return 0 ;; + esac + for a in "$@"; do + [ "$a" = "--installer" ] && return 0 + done + return 1 +} + +if installer_mode "$@"; then + INSTALLER_MODE=1 + LOG_FILE="${SONIC_UBOOT_ENV_LOG_FILE:-/tmp/sonic-uboot-env-init.log}" + export FW_ENV_MSG_PREFIX="${FW_ENV_MSG_PREFIX:-sonic-uboot-env-init-installer}" + export SONIC_MACHINE_CONF="${SONIC_MACHINE_CONF:-/tmp/machine.conf}" +else + INSTALLER_MODE=0 + LOG_FILE="${SONIC_UBOOT_ENV_LOG_FILE:-/var/log/sonic-uboot-env-init.log}" + export FW_ENV_MSG_PREFIX="${FW_ENV_MSG_PREFIX:-sonic-uboot-env-init}" +fi + +MARKER_FILE="/host/.uboot-env-initialized" +EMMC="${EMMC:-/dev/mmcblk0}" +MNT="${MNT:-/mnt}" + +log() { + echo "[$(date '+%Y-%m-%d %H:%M:%S')] $*" | tee -a "$LOG_FILE" 2>/dev/null || echo "[$(date '+%Y-%m-%d %H:%M:%S')] $*" >&2 +} + +mkdir -p "$(dirname "$LOG_FILE")" 2>/dev/null || true + +log "Starting U-Boot environment configuration..." + +resolve_fw_env_config_sh() { + if [ -x /usr/bin/sonic-fw-env-config.sh ]; then + SONIC_FW_ENV_CONFIG_SH=/usr/bin/sonic-fw-env-config.sh + elif [ -x /sbin/sonic-fw-env-config.sh ]; then + SONIC_FW_ENV_CONFIG_SH=/sbin/sonic-fw-env-config.sh + else + return 1 + fi + return 0 +} + +resolve_program_uboot_sh() { + if [ -x /usr/bin/sonic-program-uboot-env.sh ]; then + SONIC_PROGRAM_UBOOT_ENV_SH=/usr/bin/sonic-program-uboot-env.sh + elif [ -x /sbin/sonic-program-uboot-env.sh ]; then + SONIC_PROGRAM_UBOOT_ENV_SH=/sbin/sonic-program-uboot-env.sh + else + return 1 + fi + return 0 +} + +run_fw_env_config() { + export SONIC_FW_ENV_LOG_FILE="$LOG_FILE" + "$SONIC_FW_ENV_CONFIG_SH" +} + +run_installer_uboot_programming() { + if ! resolve_program_uboot_sh; then + umount "$MNT" 2>/dev/null || true + log "ERROR: sonic-program-uboot-env.sh not found in /usr/bin or /sbin." + return 1 + fi + + export UBOOT_ENV_BOOT_DEVICE="$BOOT_PART" + export UBOOT_ENV_DEMO_DEV="$EMMC" + export UBOOT_ENV_DEMO_PART=1 + export UBOOT_ENV_DISK_INTERFACE=mmc + export UBOOT_ENV_IMAGE_DIR="$IMAGE_DIR" + export UBOOT_ENV_INSTALLER_CONF="$MNT/$IMAGE_DIR/installer.conf" + export SONIC_UBOOT_ENV_LOG_FILE="$LOG_FILE" + if "$SONIC_PROGRAM_UBOOT_ENV_SH"; then + log "U-Boot environment updated." + else + log "ERROR: sonic-program-uboot-env.sh failed (see messages above)." + return 1 + fi +} + +if [ "$INSTALLER_MODE" = 1 ]; then + if ! resolve_fw_env_config_sh; then + log "ERROR: sonic-fw-env-config.sh not found in /usr/bin or /sbin." + exit 1 + fi + run_fw_env_config + + if ! command -v fw_setenv >/dev/null 2>&1 || ! command -v fw_printenv >/dev/null 2>&1; then + log "ERROR: fw_setenv/fw_printenv not available in installer mode." + exit 1 + fi + + sync + blockdev --rereadpt "$EMMC" 2>/dev/null || true + command -v partprobe >/dev/null 2>&1 && partprobe "$EMMC" 2>/dev/null || true + sleep 1 + + BOOT_PART=$(blkid -L SONiC-OS 2>/dev/null || true) + if [ -z "$BOOT_PART" ] && [ -b "${EMMC}p1" ]; then + BOOT_PART="${EMMC}p1" + fi + if [ -z "$BOOT_PART" ] || [ ! -b "$BOOT_PART" ]; then + log "ERROR: SONiC-OS partition not found in installer mode." + exit 1 + fi + + mkdir -p "$MNT" + if ! mount -t ext4 -o ro "$BOOT_PART" "$MNT" 2>/dev/null; then + log "ERROR: could not mount $BOOT_PART in installer mode." + exit 1 + fi + + IMAGE_DIR="" + for d in "$MNT"/image-*; do + [ ! -e "$d" ] && continue + [ -d "$d" ] || continue + IMAGE_DIR=$(basename "$d") + break + done + if [ -z "$IMAGE_DIR" ]; then + umount "$MNT" 2>/dev/null || true + log "ERROR: no image-* directory on $BOOT_PART in installer mode." + exit 1 + fi + + if ! run_installer_uboot_programming; then + umount "$MNT" 2>/dev/null || true + exit 1 + fi + umount "$MNT" 2>/dev/null || true + exit 0 +fi + +if ! command -v fw_setenv >/dev/null 2>&1; then + log "ERROR: fw_setenv not found. Cannot configure U-Boot environment." + exit 1 +fi + +if ! resolve_fw_env_config_sh; then + log "ERROR: sonic-fw-env-config.sh not found in /usr/bin or /sbin." + exit 1 +fi + +log "Configuring U-Boot environment access..." +run_fw_env_config + +if blkid -L "ONIE" >/dev/null 2>&1 || blkid -L "ONIE-BOOT" >/dev/null 2>&1; then + echo "ONIE partition found. Skipping U-Boot environment configurations." + exit 0 +fi + +if [ -f "$MARKER_FILE" ]; then + log "U-Boot environment already initialized (marker file exists). Skipping U-Boot env setup." + log "fw_env.config configuration complete." + exit 0 +fi + +log "U-Boot environment not yet initialized. Proceeding with first-time setup..." + +boot_device=$(findmnt -n -o SOURCE /host) +demo_dev=$(echo "$boot_device" | sed 's/p\?[0-9]*$//') +demo_part=$(echo "$boot_device" | grep -o '[0-9]*$') + +if [ -z "$boot_device" ]; then + boot_device="/dev/mmcblk0p1" + demo_dev="/dev/mmcblk0" + demo_part=1 + log "WARNING: Could not detect boot device, defaulting to $boot_device" +fi + +if echo "$demo_dev" | grep -q "mmc"; then + disk_interface="mmc" +else + disk_interface="scsi" +fi + +log "Detected boot device: ${boot_device}, partition: ${demo_part}, interface: ${disk_interface}" + +IMAGE_DIR=$(grep -o 'loop=[^ ]*' /proc/cmdline | sed 's|loop=\([^/]*\)/.*|\1|') +if [ -z "$IMAGE_DIR" ]; then + log "WARNING: Cannot detect image from /proc/cmdline, trying fallback method" + IMAGE_DIR=$(ls -d /host/image-* 2>/dev/null | head -1 | xargs basename) + if [ -z "$IMAGE_DIR" ]; then + log "ERROR: Cannot find image directory in /host/" + exit 1 + fi + log "Using fallback image directory: $IMAGE_DIR" +else + log "Detected image directory from /proc/cmdline: $IMAGE_DIR" +fi + +if ! resolve_program_uboot_sh; then + log "ERROR: sonic-program-uboot-env.sh not found in /usr/bin or /sbin." + exit 1 +fi + +export UBOOT_ENV_BOOT_DEVICE="$boot_device" +export UBOOT_ENV_DEMO_DEV="$demo_dev" +export UBOOT_ENV_DEMO_PART="$demo_part" +export UBOOT_ENV_DISK_INTERFACE="$disk_interface" +export UBOOT_ENV_IMAGE_DIR="$IMAGE_DIR" +export UBOOT_ENV_INSTALLER_CONF="/host/${IMAGE_DIR}/installer.conf" +export SONIC_UBOOT_ENV_LOG_FILE="$LOG_FILE" +"$SONIC_PROGRAM_UBOOT_ENV_SH" + +log "U-Boot environment variables set successfully" + +mkdir -p "$(dirname "$MARKER_FILE")" +touch "$MARKER_FILE" + +log "U-Boot environment initialization complete" + +exit 0 diff --git a/platform/aspeed/aspeed-platform-services/scripts/watchdog-keepalive.sh b/platform/aspeed/aspeed-platform-services/scripts/watchdog-keepalive.sh new file mode 100755 index 00000000000..99cafe1f2da --- /dev/null +++ b/platform/aspeed/aspeed-platform-services/scripts/watchdog-keepalive.sh @@ -0,0 +1,98 @@ +#!/bin/bash +# +# Watchdog keepalive daemon for Aspeed platforms. +# +# This daemon keeps the hardware watchdog alive by sending periodic keepalive +# signals. It opens /dev/watchdog and writes 'w' character every 60 seconds +# (with a 180 second watchdog timeout). +# + +WATCHDOG_DEVICE="/dev/watchdog0" +KEEPALIVE_INTERVAL=60 # seconds +LOG_DIR="/host/bmc" +LOG_FILE="${LOG_DIR}/watchdog.log" +MAX_RETAINED_LOGS=5 +KEEPALIVE_LOG_INTERVAL=3600 # Log keepalive status every hour (3600 seconds) + +# Ensure log directory exists +if [ ! -d "$LOG_DIR" ]; then + mkdir -p "$LOG_DIR" || { + echo "ERROR: Failed to create log directory: $LOG_DIR" >&2 + exit 1 + } +fi + +# Rotate old logs +rotate_logs() { + ls -t ${LOG_DIR}/watchdog*.log 2>/dev/null | cat -n | while read n f; do + if [ $n -gt $MAX_RETAINED_LOGS ]; then + rm -f "$f" + fi + done +} + +# Signal handler for graceful shutdown +cleanup() { + echo "$(date -u): Watchdog keepalive daemon stopping" >> "$LOG_FILE" + + # Disarm the watchdog using watchdogutil + if command -v watchdogutil &> /dev/null; then + watchdogutil disarm >> "$LOG_FILE" 2>&1 || { + echo "$(date -u): WARNING: Failed to disarm watchdog - system may reboot" >> "$LOG_FILE" + } + else + echo "$(date -u): WARNING: watchdogutil not found - cannot disarm watchdog" >> "$LOG_FILE" + fi + + # Close the file descriptor + exec {wdt_fd}>&- 2>/dev/null || true + + echo "$(date -u): Watchdog keepalive daemon stopped" >> "$LOG_FILE" + exit 0 +} + +trap 'cleanup' SIGTERM SIGINT + +# Rotate logs +rotate_logs + +# Start logging +echo "$(date -u): Watchdog keepalive daemon starting" > "$LOG_FILE" + +# Set watchdog interval to 180 seconds +# Set watchdog timeout to 180 seconds +if command -v watchdogutil &> /dev/null; then + watchdogutil arm -s 180 >> "$LOG_FILE" 2>&1 + echo "$(date -u): Watchdog timeout set to 180 seconds" >> "$LOG_FILE" +else + echo "$(date -u): WARNING: watchdogutil not found, using default timeout" >> "$LOG_FILE" +fi + +# Open watchdog device and assign FD to variable wdt_fd +exec {wdt_fd}>"$WATCHDOG_DEVICE" +if [ $? -ne 0 ]; then + echo "$(date -u): ERROR: Failed to open $WATCHDOG_DEVICE" >> "$LOG_FILE" + exit 1 +fi + +echo "$(date -u): Opened $WATCHDOG_DEVICE with FD $wdt_fd" >> "$LOG_FILE" + +# Send first keepalive +echo "w" >&${wdt_fd} +echo "$(date -u): First watchdog keepalive sent" >> "$LOG_FILE" + +# Main keepalive loop with reduced logging +keepalive_count=0 +log_threshold=$((KEEPALIVE_LOG_INTERVAL / KEEPALIVE_INTERVAL)) + +while true; do + sleep $KEEPALIVE_INTERVAL + echo "w" >&${wdt_fd} + + # Only log periodically (every hour by default) to reduce eMMC writes + keepalive_count=$((keepalive_count + 1)) + if [ $((keepalive_count % log_threshold)) -eq 0 ]; then + echo "$(date -u): Watchdog keepalive active (sent $keepalive_count keepalives)" >> "$LOG_FILE" + fi +done + diff --git a/platform/aspeed/aspeed-platform-services/systemd/sonic-machine-conf-init.service b/platform/aspeed/aspeed-platform-services/systemd/sonic-machine-conf-init.service new file mode 100644 index 00000000000..850fa0b58c7 --- /dev/null +++ b/platform/aspeed/aspeed-platform-services/systemd/sonic-machine-conf-init.service @@ -0,0 +1,16 @@ +[Unit] +Description=SONiC Machine Configuration Initialization +Documentation=man:machine.conf(5) +DefaultDependencies=no +After=local-fs.target +Before=sonic.target sonic-uboot-env-init.service rc-local.service +ConditionPathExists=!/host/machine.conf + +[Service] +Type=oneshot +ExecStart=/usr/bin/sonic-machine-conf-init.sh +RemainAfterExit=yes + +[Install] +WantedBy=multi-user.target + diff --git a/platform/aspeed/aspeed-platform-services/systemd/sonic-platform-init.service b/platform/aspeed/aspeed-platform-services/systemd/sonic-platform-init.service new file mode 100644 index 00000000000..4d77a079042 --- /dev/null +++ b/platform/aspeed/aspeed-platform-services/systemd/sonic-platform-init.service @@ -0,0 +1,16 @@ +[Unit] +Description=Aspeed Platform Initialization +Documentation=https://github.com/sonic-net/sonic-buildimage +DefaultDependencies=no +After=local-fs.target sonic-machine-conf-init.service +Before=watchdog-control.service determine-reboot-cause.service pmon.service +Requires=sonic-machine-conf-init.service + +[Service] +Type=oneshot +ExecStart=/usr/bin/sonic-platform-init.sh +RemainAfterExit=yes + +[Install] +WantedBy=multi-user.target + diff --git a/platform/aspeed/aspeed-platform-services/systemd/sonic-switchcpu-console-init.service b/platform/aspeed/aspeed-platform-services/systemd/sonic-switchcpu-console-init.service new file mode 100644 index 00000000000..d69a1da5a85 --- /dev/null +++ b/platform/aspeed/aspeed-platform-services/systemd/sonic-switchcpu-console-init.service @@ -0,0 +1,17 @@ +[Unit] +Description=Aspeed Switch CPU Console Initialization +Documentation=https://github.com/sonic-net/sonic-buildimage +After=database.service sonic-platform-init.service config-setup.service +Requires=database.service +PartOf=sonic.target + +[Service] +Type=oneshot +ExecStart=/usr/bin/sonic-switchcpu-console-init.sh +RemainAfterExit=yes +StandardOutput=journal +StandardError=journal + +[Install] +WantedBy=multi-user.target sonic.target + diff --git a/platform/aspeed/aspeed-platform-services/systemd/sonic-uboot-env-init.service b/platform/aspeed/aspeed-platform-services/systemd/sonic-uboot-env-init.service new file mode 100644 index 00000000000..c8d3364830d --- /dev/null +++ b/platform/aspeed/aspeed-platform-services/systemd/sonic-uboot-env-init.service @@ -0,0 +1,17 @@ +[Unit] +Description=SONiC U-Boot Environment Initialization +Documentation=man:fw_setenv(8) +DefaultDependencies=no +After=local-fs.target systemd-udev-settle.service +Wants=systemd-udev-settle.service +Before=sonic.target + +[Service] +Type=oneshot +Environment=SONIC_MACHINE_CONF=/host/machine.conf +ExecStart=/usr/bin/sonic-uboot-env-init.sh +RemainAfterExit=yes + +[Install] +WantedBy=multi-user.target + diff --git a/platform/aspeed/aspeed-platform-services/systemd/watchdog-keepalive.service b/platform/aspeed/aspeed-platform-services/systemd/watchdog-keepalive.service new file mode 100644 index 00000000000..3d1ebb4de3b --- /dev/null +++ b/platform/aspeed/aspeed-platform-services/systemd/watchdog-keepalive.service @@ -0,0 +1,17 @@ +[Unit] +Description=Watchdog Keepalive Daemon +Documentation=man:watchdog(8) +After=multi-user.target +Before=shutdown.target + +[Service] +Type=simple +ExecStart=/usr/bin/watchdog-keepalive.sh +Restart=always +RestartSec=5 +StandardOutput=journal +StandardError=journal + +[Install] +WantedBy=multi-user.target + diff --git a/platform/aspeed/build-emmc-image-installer.sh b/platform/aspeed/build-emmc-image-installer.sh new file mode 100755 index 00000000000..7d0b841c4dc --- /dev/null +++ b/platform/aspeed/build-emmc-image-installer.sh @@ -0,0 +1,179 @@ +#!/bin/bash +# Build Complete SONiC eMMC Image for AST2700 Using SONiC Installer +# This creates a ready-to-flash disk image by leveraging the built-in SONiC installer +# +# Usage: ./build-emmc-image-installer.sh [output-image-name] [emmc_size_mb] +# Sources platform/aspeed/onie-image-arm64.conf for EMMC_SIZE_MB and other platform variables. +# EMMC_SIZE_MB is required in onie-image-arm64.conf. Optional: third argument or env overrides it. +# +# This script uses the SONiC installer's "build" mode to create a raw ext4 image, +# then embeds it into a full GPT-partitioned eMMC image with a single SONiC-OS partition. +# +# Partition Layout (Standard SONiC Approach): +# /dev/mmcblk0p1 - SONiC-OS (single partition; size = emmc_size_mb - 100 MB for GPT) +# ├── image-SONiC-OS-/ +# ├── image-SONiC-OS-/ +# └── machine.conf +# +# For 10 GB (pSLC) set EMMC_SIZE_MB=10240 in onie-image-arm64.conf (or override with the third argument). +# +# Requirements: +# - Root privileges (for loop device mounting) +# - sgdisk (gdisk package) +# - mkfs.ext4 (e2fsprogs package) +# - bash, unzip, tar, gzip + +set -e # Exit on error + +SCRIPT_DIR="$(cd "$(dirname "${BASH_SOURCE[0]}")" && pwd)" +ONIE_IMAGE_ARM64_CONF="$SCRIPT_DIR/onie-image-arm64.conf" +if [ -n "${EMMC_SIZE_MB+x}" ]; then + _emmc_size_mb_override=$EMMC_SIZE_MB +fi +if [ ! -r "$ONIE_IMAGE_ARM64_CONF" ]; then + echo "Error: cannot read $ONIE_IMAGE_ARM64_CONF" >&2 + exit 1 +fi +. "$ONIE_IMAGE_ARM64_CONF" +if [ -n "${_emmc_size_mb_override+x}" ]; then + EMMC_SIZE_MB="$_emmc_size_mb_override" +fi +unset _emmc_size_mb_override +if [ -z "${EMMC_SIZE_MB:-}" ]; then + echo "Error: EMMC_SIZE_MB must be set in $ONIE_IMAGE_ARM64_CONF" >&2 + exit 1 +fi +PARTITION_LABEL="SONiC-OS" + +# Colors +RED='\033[0;31m' +GREEN='\033[0;32m' +YELLOW='\033[1;33m' +NC='\033[0m' + +log_info() { echo -e "${GREEN}[INFO]${NC} $1"; } +log_warn() { echo -e "${YELLOW}[WARN]${NC} $1"; } +log_error() { echo -e "${RED}[ERROR]${NC} $1"; } + +check_requirements() { + log_info "Checking requirements..." + local missing=0 + for cmd in sgdisk mkfs.ext4 losetup bash unzip tar gzip; do + if ! command -v $cmd &> /dev/null; then + log_error "Required command not found: $cmd" + missing=1 + fi + done + [ $missing -eq 1 ] && exit 1 + [ "$(id -u)" -ne 0 ] && { log_error "Must run as root"; exit 1; } + log_info "All requirements satisfied" +} + +cleanup() { + log_info "Cleaning up..." + [ -n "$LOOP_DEV" ] && losetup -d "$LOOP_DEV" 2>/dev/null || true + [ -n "$RAW_IMAGE" ] && [ -f "$RAW_IMAGE" ] && rm -f "$RAW_IMAGE" || true +} + +# Parse arguments +[ $# -lt 1 ] && { echo "Usage: $0 [output-image-name] [emmc_size_mb]"; exit 1; } + +SONIC_BIN="$(realpath "$1")" +OUTPUT_IMAGE="${2:-target/sonic-aspeed-arm64-emmc.img}" +[ -n "${3:-}" ] && EMMC_SIZE_MB="$3" + +ROOT_PART_SIZE_MB=$((EMMC_SIZE_MB - 100)) + +[ ! -f "$SONIC_BIN" ] && { log_error "SONiC binary not found: $SONIC_BIN"; exit 1; } +[ "$EMMC_SIZE_MB" -lt 1024 ] && { log_error "EMMC_SIZE_MB must be >= 1024 (1 GB)"; exit 1; } + +check_requirements +trap cleanup EXIT + +ORIG_DIR=$(pwd) +LOOP_DEV="" +# Must match OUTPUT_RAW_IMAGE embedded in the .bin (this build uses target/sonic-aspeed.raw) +RAW_IMAGE="target/sonic-aspeed.raw" + +# Create target directory if it doesn't exist +mkdir -p target + +log_info "Building eMMC image from: $SONIC_BIN" +log_info "Output image: $OUTPUT_IMAGE" +log_info "eMMC size: ${EMMC_SIZE_MB} MB (SONiC-OS partition: ${ROOT_PART_SIZE_MB} MB)" + +# Step 1: Use SONiC installer in "build" mode to create raw ext4 image +log_info "Running SONiC installer in 'build' mode..." +log_info "This will create a raw ext4 image with SONiC installed..." + +# The installer expects to be run as a self-extracting archive +# In "build" mode, it creates OUTPUT_RAW_IMAGE +# We need to: +# 1. Pre-create the raw image file with the right size (installer expects it to exist) +# 2. Patch the installer to use our filename + +# Pre-create the raw image file (same as build_image.sh does) +log_info "Creating raw image file: $RAW_IMAGE (${ROOT_PART_SIZE_MB} MB)..." +fallocate -l "${ROOT_PART_SIZE_MB}M" "$RAW_IMAGE" || { + log_error "Failed to create raw image file" + exit 1 +} + +# Run the installer from ORIG_DIR so cur_wd matches where we created the raw image +log_info "Running installer (this may take a few minutes)..." +(cd "$ORIG_DIR" && bash "$SONIC_BIN") || { + log_error "Installer failed" + exit 1 +} + +# Verify raw image was created +if [ ! -f "$RAW_IMAGE" ]; then + log_error "Raw image not created by installer" + exit 1 +fi + +log_info "Raw SONiC image created: $RAW_IMAGE ($(du -h $RAW_IMAGE | cut -f1))" + +# Step 2: Mark first boot in the raw image +# Note: machine.conf will be created by first-boot service based on DTB detection +log_info "Marking first boot in raw image..." +TEMP_MOUNT=$(mktemp -d) +mount -o loop "$RAW_IMAGE" "$TEMP_MOUNT" + +touch "$TEMP_MOUNT/.first_boot_from_prebuilt_image" +IMAGE_DIR_NAME=$(ls -d "$TEMP_MOUNT"/image-* 2>/dev/null | head -1 | xargs basename) +[ -n "$IMAGE_DIR_NAME" ] && log_info "U-Boot image directory on eMMC (use in ext4load): $IMAGE_DIR_NAME" + +umount "$TEMP_MOUNT" +rmdir "$TEMP_MOUNT" + +# Step 3: Create full eMMC disk image with GPT partitions +DISK_IMAGE="${OUTPUT_IMAGE%.gz}" +DISK_IMAGE="${DISK_IMAGE%.img}.img" + +log_info "Creating eMMC disk image (${EMMC_SIZE_MB} MB)..." +dd if=/dev/zero of="$DISK_IMAGE" bs=1M count=$EMMC_SIZE_MB + +log_info "Creating GPT partition table..." +sgdisk -o "$DISK_IMAGE" + +log_info "Creating single SONiC-OS partition using entire disk..." +sgdisk -n 1:0:0 -t 1:8300 -c 1:"$PARTITION_LABEL" "$DISK_IMAGE" + +PART_START_SECTOR=$(sgdisk -i 1 "$DISK_IMAGE" | sed -n 's/^First sector: *\([0-9]*\).*/\1/p') +[ -z "$PART_START_SECTOR" ] && { log_error "Could not get partition start sector"; exit 1; } +log_info "Partition 1 starts at sector $PART_START_SECTOR" + +log_info "Copying SONiC installation to SONiC-OS partition..." +# notrunc: without it dd ftruncates DISK_IMAGE to (seek + input_size) at EOF, dropping the partition tail. +dd if="$RAW_IMAGE" of="$DISK_IMAGE" bs=512 seek="$PART_START_SECTOR" conv=notrunc,fsync status=progress + +rm -f "$RAW_IMAGE" +RAW_IMAGE="" + +log_info "Compressing image..." +gzip -f "$DISK_IMAGE" + +log_info "eMMC image created successfully: ${DISK_IMAGE}.gz" +log_info "" +log_info "Image size: $(du -h ${DISK_IMAGE}.gz | cut -f1)" diff --git a/platform/aspeed/install-sonic-to-emmc.sh b/platform/aspeed/install-sonic-to-emmc.sh new file mode 100755 index 00000000000..26f884e3566 --- /dev/null +++ b/platform/aspeed/install-sonic-to-emmc.sh @@ -0,0 +1,265 @@ +#!/bin/bash +# +# Install SONiC to eMMC from OpenBMC +# +# This script is designed to be run from a running OpenBMC instance (in SPI flash) +# to install SONiC onto the eMMC storage. +# +# Usage: ./install-sonic-to-emmc.sh +# + +set -e + +EMMC_DEVICE="/dev/mmcblk0" +EMMC_PARTITION="${EMMC_DEVICE}p1" +MOUNT_POINT="/mnt/sonic_install" +#BOOTCONF="ast2700-evb" +BOOTCONF="nexthop-b27-r0" + +# Platform-specific console settings +# AST2700 EVB uses ttyS12, AST2720 uses ttyS12 +CONSOLE_DEV="12" +CONSOLE_SPEED="115200" +EARLYCON="earlycon=uart8250,mmio32,0x14c33b00" +VAR_LOG_SIZE="128" # 128MB for /var/log tmpfs + +# Color output +RED='\033[0;31m' +GREEN='\033[0;32m' +YELLOW='\033[1;33m' +NC='\033[0m' # No Color + +log_info() { + echo -e "${GREEN}[INFO]${NC} $1" +} + +log_warn() { + echo -e "${YELLOW}[WARN]${NC} $1" +} + +log_error() { + echo -e "${RED}[ERROR]${NC} $1" +} + +# Check if running as root +if [ "$EUID" -ne 0 ]; then + log_error "This script must be run as root" + exit 1 +fi + +# Check arguments +if [ $# -ne 1 ]; then + log_error "Usage: $0 " + exit 1 +fi + +SONIC_IMAGE="$1" + +# Verify image file exists +if [ ! -f "$SONIC_IMAGE" ]; then + log_error "Image file not found: $SONIC_IMAGE" + exit 1 +fi + +log_info "SONiC eMMC Installation Script" +log_info "================================" +log_info "Image: $SONIC_IMAGE" +log_info "Target: $EMMC_DEVICE" +log_info "" + +# Verify eMMC device exists +if [ ! -b "$EMMC_DEVICE" ]; then + log_error "eMMC device not found: $EMMC_DEVICE" + exit 1 +fi + +log_info "eMMC device found: $EMMC_DEVICE" + +# Get eMMC size +EMMC_SIZE=$(blockdev --getsize64 $EMMC_DEVICE 2>/dev/null || echo "0") +EMMC_SIZE_GB=$((EMMC_SIZE / 1024 / 1024 / 1024)) +log_info "eMMC size: ${EMMC_SIZE_GB}GB" + +# Confirm installation +log_warn "WARNING: This will ERASE all data on $EMMC_DEVICE!" +read -p "Are you sure you want to continue? (yes/no): " CONFIRM +if [ "$CONFIRM" != "yes" ]; then + log_info "Installation cancelled" + exit 0 +fi + +# Unmount any existing partitions +log_info "Unmounting any existing eMMC partitions..." +umount ${EMMC_DEVICE}p* 2>/dev/null || true + +# Write image to eMMC +log_info "Writing SONiC image to eMMC (this may take several minutes)..." +log_info "Command: gunzip -c $SONIC_IMAGE | dd of=$EMMC_DEVICE bs=4M" + +if ! gunzip -c "$SONIC_IMAGE" | dd of="$EMMC_DEVICE" bs=4M; then + log_error "Failed to write image to eMMC" + exit 1 +fi + +log_info "Syncing writes to disk..." +sync +sleep 2 + +# Verify partition exists +if [ ! -b "$EMMC_PARTITION" ]; then + log_error "Partition not found after writing: $EMMC_PARTITION" + exit 1 +fi + +# Mount the SONiC partition +log_info "Mounting SONiC partition..." +mkdir -p "$MOUNT_POINT" +if ! mount "$EMMC_PARTITION" "$MOUNT_POINT"; then + log_error "Failed to mount $EMMC_PARTITION" + exit 1 +fi + +# Get SONiC version from image directory +log_info "Detecting SONiC version..." +SONIC_IMAGE_DIR=$(ls -1 "$MOUNT_POINT" | grep "^image-" | head -n 1) + +if [ -z "$SONIC_IMAGE_DIR" ]; then + log_error "No SONiC image directory found in $MOUNT_POINT" + umount "$MOUNT_POINT" + exit 1 +fi + +# Extract version (remove 'image-' prefix) +IMAGE_DIR="$SONIC_IMAGE_DIR" +SONIC_VERSION="${SONIC_IMAGE_DIR#image-}" + +log_info "Detected image directory: $IMAGE_DIR" +log_info "Detected SONiC version: $SONIC_VERSION" + +# Get partition UUID +log_info "Getting partition UUID..." +UUID=$(blkid "$EMMC_PARTITION" | sed -n 's/.*UUID="\([^"]*\)".*/\1/p') + +if [ -z "$UUID" ]; then + log_error "Failed to get partition UUID" + umount "$MOUNT_POINT" + exit 1 +fi + +log_info "Partition UUID: $UUID" + +# Unmount +log_info "Unmounting SONiC partition..." +umount "$MOUNT_POINT" +rmdir "$MOUNT_POINT" + +# Configure U-Boot environment +log_info "Configuring U-Boot environment for dual boot..." + +# Construct console port +CONSOLE_PORT="ttyS${CONSOLE_DEV}" + +# Construct kernel command line arguments (linuxargs) +LINUXARGS="console=${CONSOLE_PORT},${CONSOLE_SPEED}n8 ${EARLYCON} loopfstype=squashfs loop=${IMAGE_DIR}/fs.squashfs varlog_size=${VAR_LOG_SIZE} logs_inram=on" + +# FIT image path +FIT_NAME="${IMAGE_DIR}/boot/sonic_arm64.fit" + +# Partition number (typically 1 for single partition setup) +DEMO_PART="1" + +# Disk interface (mmc for eMMC) +DISK_INTERFACE="mmc" + +log_info "Setting U-Boot variables..." + +# Image configuration (slot 1 - current image) +fw_setenv image_dir "$IMAGE_DIR" || { log_error "Failed to set image_dir"; exit 1; } +fw_setenv fit_name "$FIT_NAME" || { log_error "Failed to set fit_name"; exit 1; } +fw_setenv sonic_version_1 "$SONIC_VERSION" || { log_error "Failed to set sonic_version_1"; exit 1; } + +# Old/backup image (slot 2 - empty for first installation) +fw_setenv image_dir_old "" || { log_error "Failed to set image_dir_old"; exit 1; } +fw_setenv fit_name_old "" || { log_error "Failed to set fit_name_old"; exit 1; } +fw_setenv sonic_version_2 "None" || { log_error "Failed to set sonic_version_2"; exit 1; } +fw_setenv linuxargs_old "" || { log_error "Failed to set linuxargs_old"; exit 1; } + +# Kernel command line arguments +fw_setenv linuxargs "$LINUXARGS" || { log_error "Failed to set linuxargs"; exit 1; } + +# Boot commands +fw_setenv sonic_boot_load "ext4load ${DISK_INTERFACE} 0:${DEMO_PART} \${loadaddr} \${fit_name}" || { log_error "Failed to set sonic_boot_load"; exit 1; } +fw_setenv sonic_boot_load_old "ext4load ${DISK_INTERFACE} 0:${DEMO_PART} \${loadaddr} \${fit_name_old}" || { log_error "Failed to set sonic_boot_load_old"; exit 1; } +fw_setenv sonic_bootargs "setenv bootargs root=UUID=${UUID} rw rootwait panic=1 \${linuxargs}" || { log_error "Failed to set sonic_bootargs"; exit 1; } +fw_setenv sonic_bootargs_old "setenv bootargs root=UUID=${UUID} rw rootwait panic=1 \${linuxargs_old}" || { log_error "Failed to set sonic_bootargs_old"; exit 1; } +fw_setenv sonic_image_1 "run sonic_bootargs; run sonic_boot_load; bootm \${loadaddr}#conf-\${bootconf}" || { log_error "Failed to set sonic_image_1"; exit 1; } +fw_setenv sonic_image_2 "run sonic_bootargs_old; run sonic_boot_load_old; bootm \${loadaddr}#conf-\${bootconf}" || { log_error "Failed to set sonic_image_2"; exit 1; } + +# Boot menu with instructions +fw_setenv print_menu "echo ===================================================; echo SONiC Boot Menu; echo ===================================================; echo To boot \$sonic_version_1; echo type: run sonic_image_1; echo at the U-Boot prompt after interrupting U-Boot when it says; echo \\\"Hit any key to stop autoboot:\\\" during boot; echo; echo To boot \$sonic_version_2; echo type: run sonic_image_2; echo at the U-Boot prompt after interrupting U-Boot when it says; echo \\\"Hit any key to stop autoboot:\\\" during boot; echo; echo ===================================================" || { log_error "Failed to set print_menu"; exit 1; } + +# Boot configuration +fw_setenv boot_next "run sonic_image_1" || { log_error "Failed to set boot_next"; exit 1; } +fw_setenv bootcmd "run print_menu; test -n \"\$boot_once\" && setenv do_boot_once \"\$boot_once\" && setenv boot_once \"\" && saveenv && run do_boot_once; run boot_next" || { log_error "Failed to set bootcmd"; exit 1; } + +# Set bootconf (platform identifier) +fw_setenv bootconf "$BOOTCONF" || { log_error "Failed to set bootconf"; exit 1; } + +# Memory addresses (from platform_arm64.conf) +fw_setenv loadaddr "0x432000000" || { log_error "Failed to set loadaddr"; exit 1; } +fw_setenv kernel_addr "0x403000000" || { log_error "Failed to set kernel_addr"; exit 1; } +fw_setenv fdt_addr "0x44C000000" || { log_error "Failed to set fdt_addr"; exit 1; } +fw_setenv initrd_addr "0x440000000" || { log_error "Failed to set initrd_addr"; exit 1; } + +log_info "✓ All U-Boot variables set successfully" + +# Verify U-Boot environment +log_info "" +log_info "Verifying U-Boot environment..." +log_info "================================" + +VERIFY_FAILED=0 + +# Verify critical variables +for var in image_dir fit_name sonic_version_1 linuxargs bootconf sonic_image_1 boot_next bootcmd; do + VALUE=$(fw_printenv -n $var 2>/dev/null || echo "") + if [ -z "$VALUE" ]; then + log_error "Variable '$var' is not set!" + VERIFY_FAILED=1 + else + log_info "✓ $var: ${VALUE:0:60}$([ ${#VALUE} -gt 60 ] && echo '...')" + fi +done + +log_info "" + +if [ $VERIFY_FAILED -eq 1 ]; then + log_error "U-Boot environment verification failed!" + exit 1 +fi + +# Installation complete +log_info "================================" +log_info "SONiC installation completed successfully!" +log_info "" +log_info "Summary:" +log_info " - SONiC version: $SONIC_VERSION" +log_info " - Image directory: $IMAGE_DIR" +log_info " - Partition: ${EMMC_PARTITION} (UUID: $UUID)" +log_info " - Boot configuration: $BOOTCONF" +log_info " - Console: $CONSOLE_PORT @ ${CONSOLE_SPEED}n8" +log_info " - Default boot: sonic_image_1" +log_info "" +log_info "Boot configuration:" +log_info " - Image 1 (sonic_version_1): $SONIC_VERSION" +log_info " - Image 2 (sonic_version_2): None" +log_info "" +log_info "Next steps:" +log_info " 1. Reboot the system: 'reboot'" +log_info " 2. U-Boot will boot SONiC from eMMC" +log_info " 3. After boot, verify with: 'show version'" +log_info "" +log_warn "Note: Ensure U-Boot is configured to boot from eMMC!" +log_info "" + +exit 0 diff --git a/platform/aspeed/installer/create_tftp_image.sh b/platform/aspeed/installer/create_tftp_image.sh new file mode 100755 index 00000000000..22f0f5acda9 --- /dev/null +++ b/platform/aspeed/installer/create_tftp_image.sh @@ -0,0 +1,442 @@ +#!/bin/bash +# +# Build the Aspeed U-Boot net-install bundle (FIT + initramfs + optional raw eMMC image). +# +# Transport layout: +# - FIT: U-Boot loads via TFTP (`tftp $loadaddr sonic_tftp_install.fit`). Small, one-shot. +# - eMMC payload (*.img.gz): the initramfs picks transport by scheme of sonic_install.bmc_image= +# * http://... or https://... -> curl +# * plain path / filename -> TFTP, server from sonic_install.tftp_server= +# +# Platform-local installer orchestration under platform//installer/ (same structural role as +# other platforms' installer scripts). Difference: output is a FIT for TFTP boot, and second-stage +# logic lives in ../tftp-installer-init/. +# +# This script is not wired as a second SONIC_INSTALLERS entry: that would create a second RFS +# squashfs target (see slave.mk rfs_define_target). The bundle reuses the rootfs built for +# sonic-aspeed-arm64.bin (see recipes/installer-tftp.mk) and injects curl from it. +# +# Usage (from sonic-buildimage root): +# ./platform/aspeed/installer/create_tftp_image.sh [output_dir] +# OUTPUT_TFTP_INSTALL_TAR=target/sonic-aspeed-arm64-tftp-install.tar \ +# ./platform/aspeed/installer/create_tftp_image.sh target/aspeed-tftp +# +# Environment (see also platform/aspeed/onie-image-arm64.conf): +# FILESYSTEM_ROOT, EMMC_RAW_IMAGE, OUTPUT_TFTP_INSTALL_TAR, TFTP_EMMC_IMAGE_NAME + +set -e + +unpack_initrd_to_dir() { + local img="$1" dir="$2" + local decom=zcat mime magic + mime=$(file --brief --mime-type "$img" 2>/dev/null) || mime="" + case "$mime" in + application/zstd) decom=zstdcat ;; + application/x-lz4) decom=lz4cat ;; + application/x-lzma) decom=xzcat ;; + application/gzip|application/x-gzip) decom=zcat ;; + application/octet-stream) + magic=$(head -c 6 "$img" | xxd -p 2>/dev/null | tr -d '\n') + case "$magic" in + 28b52ffd*) decom=zstdcat ;; + 1f8b*) decom=zcat ;; + fd377a585a00) decom=xzcat ;; + esac + ;; + esac + mkdir -p "$dir" + $decom "$img" | (cd "$dir" && cpio -id 2>/dev/null) || true +} + +repack_initrd_cpio_gz() { + local dir="$1" out="$2" + (cd "$dir" && find . | cpio -o -H newc) | gzip -9 > "$out" +} + +# Walk DT_NEEDED from readelf and copy matching SONAMEs from FILESYSTEM_ROOT (transitive). Used when +# chroot ldd / host ldd yield nothing for the target arch during cross-builds. +copy_elf_needed_closure_into() { + local seed="$1" + local dest_root="$2" + local fs="$FILESYSTEM_ROOT" + local pending scanned work s f rel + + [ -f "$seed" ] || return 0 + pending=$(mktemp) + scanned=$(mktemp) + echo "$seed" >> "$pending" + while [ -s "$pending" ]; do + work=$(head -n1 "$pending") + tail -n +2 "$pending" > "$pending.new" && mv "$pending.new" "$pending" + if grep -qxF "$work" "$scanned" 2>/dev/null; then + continue + fi + echo "$work" >> "$scanned" + for s in $(readelf -d "$work" 2>/dev/null | sed -n 's/.*Shared library: \[\([^]]*\)\]/\1/p'); do + [ -z "$s" ] && continue + f=$(find "$fs/lib" "$fs/usr/lib" -name "$s" 2>/dev/null | head -n1) + [ -n "$f" ] && [ -f "$f" ] || continue + rel="${f#$fs}" + rel="/${rel#/}" + mkdir -p "$dest_root$(dirname "$rel")" + cp -L "$f" "$dest_root$rel" 2>/dev/null || true + echo "$f" >> "$pending" + done + done + rm -f "$pending" "$scanned" +} + +copy_fsroot_binary_to_initrd() { + local abs="$1" dir="$2" + local root="${dir%/}" + local real="$abs" + [ -L "$abs" ] && real=$(readlink -f "$abs") + local rel="${abs#$FILESYSTEM_ROOT}" + rel="/${rel#/}" + local dest="$root$rel" + mkdir -p "$(dirname "$dest")" + rm -f "$dest" + cp -L "$abs" "$dest" + chmod 755 "$dest" + local interp idest ldest chpath + interp=$(readelf -l "$real" 2>/dev/null | sed -n 's/.*Requesting program interpreter: *\[\([^]]*\)\].*/\1/p') + if [ -n "$interp" ] && [ -f "$FILESYSTEM_ROOT$interp" ]; then + idest="$root$interp" + mkdir -p "$(dirname "$idest")" + rm -f "$idest" + cp -L "$FILESYSTEM_ROOT$interp" "$idest" 2>/dev/null || true + fi + chpath="/${rel#/}" + (chroot "$FILESYSTEM_ROOT" ldd "$chpath" 2>/dev/null || ldd "$abs" 2>/dev/null) | awk '/=>/ {print $3}' | while read -r path; do + [ -z "$path" ] || [ "$path" = "not" ] && continue + [ -f "$FILESYSTEM_ROOT$path" ] || continue + ldest="$root$path" + mkdir -p "$(dirname "$ldest")" + rm -f "$ldest" + cp -L "$FILESYSTEM_ROOT$path" "$ldest" 2>/dev/null || true + done + copy_elf_needed_closure_into "$real" "$root" +} + +inject_fsroot_extras_into_initrd() { + local dir="$1" + local p + for p in \ + /usr/sbin/sgdisk /sbin/sgdisk \ + /usr/sbin/gdisk /sbin/gdisk \ + /usr/sbin/cgdisk /sbin/cgdisk \ + /usr/sbin/fixparts /sbin/fixparts \ + /sbin/e2fsck /usr/sbin/e2fsck \ + /sbin/fsck.ext2 /sbin/fsck.ext3 /sbin/fsck.ext4 \ + /sbin/mke2fs /usr/sbin/mke2fs \ + /sbin/mkfs.ext2 /sbin/mkfs.ext3 /sbin/mkfs.ext4 \ + /sbin/resize2fs \ + /sbin/tune2fs \ + /sbin/dumpe2fs \ + /usr/sbin/badblocks \ + /sbin/debugfs \ + /sbin/e4defrag \ + /usr/sbin/filefrag \ + /usr/sbin/logsave \ + /sbin/mkfs.vfat /usr/sbin/mkfs.vfat /sbin/mkfs.fat \ + /sbin/fsck.vfat /usr/sbin/fsck.vfat /sbin/fsck.fat \ + /usr/sbin/fatlabel /sbin/fatlabel \ + /sbin/parted /usr/sbin/parted \ + /usr/sbin/partprobe /sbin/partprobe \ + /sbin/blkid /usr/sbin/blkid \ + /sbin/blockdev /usr/sbin/blockdev \ + /sbin/wipefs /usr/sbin/wipefs \ + /usr/sbin/sfdisk /sbin/sfdisk \ + /usr/bin/fw_printenv /usr/sbin/fw_printenv \ + /usr/bin/fw_setenv /usr/sbin/fw_setenv \ + /usr/bin/fw_getenv /usr/sbin/fw_getenv \ + /usr/bin/curl /bin/curl \ + /usr/bin/dd /bin/dd \ + /usr/sbin/blkdiscard /sbin/blkdiscard; do + [ -e "$FILESYSTEM_ROOT/$p" ] || continue + copy_fsroot_binary_to_initrd "$FILESYSTEM_ROOT/$p" "$dir" + done +} + +# NSS modules are dlopen'd (not DT_NEEDED), so copy_fsroot_binary_to_initrd does not pull them in; +# without them, getaddrinfo() cannot resolve hostnames for HTTP/HTTPS sonic_install.bmc_image=. +inject_fsroot_nss_into_initrd() { + local dir="$1" + local d="/lib/aarch64-linux-gnu" + local lib src + for lib in libnss_dns.so.2 libnss_files.so.2 libresolv.so.2; do + src="$FILESYSTEM_ROOT$d/$lib" + [ -f "$src" ] || continue + mkdir -p "$dir$d" + cp -L "$src" "$dir$d/$lib" + done + if [ -f "$FILESYSTEM_ROOT/etc/nsswitch.conf" ]; then + mkdir -p "$dir/etc" + cp -L "$FILESYSTEM_ROOT/etc/nsswitch.conf" "$dir/etc/nsswitch.conf" + fi +} + +repack_sonic_initrd_for_tftp_installer() { + local in="$1" out="$2" + local d ko + d=$(mktemp -d) + unpack_initrd_to_dir "$in" "$d" + rm -f "$d/init-options" "$d/init-options-base" + cp "$d/init" "$d/init.stock" + cp "$PLATFORM_ASPEED/tftp-installer-init/init" "$d/init" + chmod 755 "$d/init" + mkdir -p "$d/sbin" + cp "$PLATFORM_ASPEED/tftp-installer-init/install-to-emmc.sh" "$d/sbin/install-to-emmc.sh" + chmod 755 "$d/sbin/install-to-emmc.sh" + cp "$PLATFORM_ASPEED/tftp-installer-init/udhcpc.script" "$d/sbin/udhcpc.script" + chmod 755 "$d/sbin/udhcpc.script" + cp "$PLATFORM_ASPEED/aspeed-platform-services/scripts/sonic-uboot-env-init.sh" "$d/sbin/sonic-uboot-env-init.sh" + chmod 755 "$d/sbin/sonic-uboot-env-init.sh" + cp "$PLATFORM_ASPEED/aspeed-platform-services/scripts/sonic-machine-conf-init.sh" "$d/sbin/sonic-machine-conf-init.sh" + chmod 755 "$d/sbin/sonic-machine-conf-init.sh" + cp "$PLATFORM_ASPEED/aspeed-platform-services/scripts/sonic-fw-env-config.sh" "$d/sbin/sonic-fw-env-config.sh" + chmod 755 "$d/sbin/sonic-fw-env-config.sh" + cp "$PLATFORM_ASPEED/aspeed-platform-services/scripts/sonic-program-uboot-env.sh" "$d/sbin/sonic-program-uboot-env.sh" + chmod 755 "$d/sbin/sonic-program-uboot-env.sh" + _aspeed_repo_root="$(cd "$PLATFORM_ASPEED/../.." && pwd)" + if [ -d "$_aspeed_repo_root/device/aspeed" ]; then + mkdir -p "$d/device/aspeed" + cp -a "$_aspeed_repo_root/device/aspeed/." "$d/device/aspeed/" + fi + unset _aspeed_repo_root + inject_fsroot_extras_into_initrd "$d" + inject_fsroot_nss_into_initrd "$d" + if [ ! -f "$d/lib/modules/ftgmac100.ko" ] && [ -d "$d/lib/modules" ]; then + ko=$(find "$d/lib/modules" -name ftgmac100.ko 2>/dev/null | head -1) + if [ -n "$ko" ]; then + mkdir -p "$d/lib/modules" + cp "$ko" "$d/lib/modules/ftgmac100.ko" + fi + fi + repack_initrd_cpio_gz "$d" "$out" + rm -rf "$d" +} + +# Populates globals: KERNEL, KERNEL_VERSION_FULL, SONIC_INITRD. May set BOOT_FALLBACK_TMP for unzip cleanup. +resolve_kernel_and_initrd() { + local root="$1" + local k ver ir payload zpath + KERNEL="" + KERNEL_VERSION_FULL="" + SONIC_INITRD="" + payload="${INSTALLER_PAYLOAD:-fs.zip}" + zpath="$REPO_ROOT/$payload" + + for k in "$root/boot"/vmlinuz-*; do + [ -f "$k" ] || continue + KERNEL="$k" + break + done + if [ -z "$KERNEL" ]; then + KERNEL=$(find "$root/usr/lib" -path '*/linux-image-*/vmlinuz-*' -type f 2>/dev/null | head -1) + fi + if [ -z "$KERNEL" ] || [ ! -f "$KERNEL" ]; then + if [ -f "$zpath" ] && command -v unzip >/dev/null 2>&1; then + BOOT_FALLBACK_TMP=$(mktemp -d) + if unzip -qq -j -o "$zpath" "boot/vmlinuz-*" -d "$BOOT_FALLBACK_TMP" 2>/dev/null; then + KERNEL=$(ls -1 "$BOOT_FALLBACK_TMP"/vmlinuz-* 2>/dev/null | head -1) + fi + if [ -z "$KERNEL" ] || [ ! -f "$KERNEL" ]; then + rm -rf "$BOOT_FALLBACK_TMP" + BOOT_FALLBACK_TMP="" + fi + fi + fi + if [ -z "$KERNEL" ] || [ ! -f "$KERNEL" ]; then + echo "Error: No kernel found (checked $root/boot/, usr/lib/linux-image-*/vmlinuz-*, and $zpath boot/)." + echo "Build target/sonic-aspeed-arm64.bin first so fs.zip or fsroot contains /boot." + return 1 + fi + ver=$(basename "$KERNEL" | sed 's/^vmlinuz-//') + KERNEL_VERSION_FULL="$ver" + + SONIC_INITRD="$root/boot/initrd.img-$ver" + if [ ! -f "$SONIC_INITRD" ]; then + SONIC_INITRD=$(find "$root/usr/lib" -path "*/linux-image-$ver/initrd.img*" -type f 2>/dev/null | head -1) + fi + if [ -n "$BOOT_FALLBACK_TMP" ] && [ -d "$BOOT_FALLBACK_TMP" ]; then + ir=$(ls -1 "$BOOT_FALLBACK_TMP"/initrd.img-* 2>/dev/null | head -1) + if [ -n "$ir" ] && [ -f "$ir" ]; then + SONIC_INITRD="$ir" + fi + fi + if [ -z "$SONIC_INITRD" ] || [ ! -f "$SONIC_INITRD" ]; then + if [ -f "$zpath" ] && command -v unzip >/dev/null 2>&1; then + [ -z "$BOOT_FALLBACK_TMP" ] && BOOT_FALLBACK_TMP=$(mktemp -d) + unzip -qq -j -o "$zpath" "boot/initrd.img-*" -d "$BOOT_FALLBACK_TMP" 2>/dev/null || true + ir=$(ls -1 "$BOOT_FALLBACK_TMP"/initrd.img-* 2>/dev/null | head -1) + [ -n "$ir" ] && [ -f "$ir" ] && SONIC_INITRD="$ir" + fi + fi + if [ -z "$SONIC_INITRD" ] || [ ! -f "$SONIC_INITRD" ]; then + echo "Error: No initrd for kernel $ver (expected boot/initrd.img-$ver, usr/lib/linux-image-$ver/, or $zpath boot/)." + return 1 + fi + return 0 +} + +INSTALLER_DIR="$(cd "$(dirname "$0")" && pwd)" +PLATFORM_ASPEED="$(cd "$INSTALLER_DIR/.." && pwd)" +REPO_ROOT="$(cd "$PLATFORM_ASPEED/../.." && pwd)" +cd "$REPO_ROOT" + +OUTPUT_DIR="${1:-target/aspeed-tftp}" +FIT_NAME="sonic_tftp_install.fit" + +if [ -r "./platform/aspeed/onie-image-arm64.conf" ]; then + . ./platform/aspeed/onie-image-arm64.conf +fi +FILESYSTEM_ROOT="${FILESYSTEM_ROOT:-./fsroot-aspeed}" + +if [ ! -d "$FILESYSTEM_ROOT" ]; then + echo "Error: $FILESYSTEM_ROOT not found. Build the Aspeed image first:" + echo " make target/sonic-aspeed-arm64.bin" + exit 1 +fi +FILESYSTEM_ROOT="$(cd "$FILESYSTEM_ROOT" && pwd)" + +INSTALLER_PAYLOAD="${INSTALLER_PAYLOAD:-fs.zip}" +BOOT_FALLBACK_TMP="" +FIT_STAGING="" + +cleanup_all() { + sudo umount "$FILESYSTEM_ROOT/tmp/tftp-fit" 2>/dev/null || true + rm -rf "${FIT_STAGING:-}" 2>/dev/null || true + rm -rf "${BOOT_FALLBACK_TMP:-}" 2>/dev/null || true +} +trap cleanup_all EXIT + +if ! resolve_kernel_and_initrd "$FILESYSTEM_ROOT"; then + exit 1 +fi + +DTB_DIR=$(ls -d "$FILESYSTEM_ROOT/usr/lib/linux-image-"*/aspeed 2>/dev/null | head -1) +if [ -z "$DTB_DIR" ] || [ ! -d "$DTB_DIR" ]; then + DTB_DIR=$(ls -d "$FILESYSTEM_ROOT/usr/lib/linux-image-${KERNEL_VERSION_FULL}/aspeed" 2>/dev/null | head -1) +fi + +EMMC_RAW_IMAGE="${EMMC_RAW_IMAGE:-target/sonic-aspeed-arm64-emmc.img.gz}" +[ -n "$EMMC_RAW_IMAGE" ] || EMMC_RAW_IMAGE="target/sonic-aspeed-arm64-emmc.img.gz" +if [ -n "${TFTP_EMMC_IMAGE_NAME:-}" ]; then + TFTP_IMAGE_NAME="$TFTP_EMMC_IMAGE_NAME" +else + TFTP_IMAGE_NAME=$(basename "$EMMC_RAW_IMAGE") +fi + +if [ -z "$DTB_DIR" ] || [ ! -d "$DTB_DIR" ]; then + echo "Error: No DTB dir under $FILESYSTEM_ROOT/usr/lib/linux-image-*/aspeed" + exit 1 +fi +if [ ! -f "$EMMC_RAW_IMAGE" ]; then + echo "Error: Raw eMMC image not found: $EMMC_RAW_IMAGE" + echo "Build it first: make aspeed-emmc-image" + echo "Or manually: sudo ./platform/aspeed/build-emmc-image-installer.sh target/sonic-aspeed-arm64.bin" + exit 1 +fi + +mkdir -p "$OUTPUT_DIR" + +INITRD_DEST="$OUTPUT_DIR/initrd-tftp-net-install.img" +echo "Repacking production initrd $SONIC_INITRD (strip init-options; installer /init)..." +repack_sonic_initrd_for_tftp_installer "$SONIC_INITRD" "$INITRD_DEST" +INITRAMFS="$INITRD_DEST" + +echo "Using kernel: $KERNEL" +echo "Using initramfs (source): $SONIC_INITRD" +echo "Using repacked initramfs: $INITRAMFS" + +echo "Building FIT image..." +FIT_STAGING=$(mktemp -d) +cp "$KERNEL" "$FIT_STAGING/kernel" +cp "$OUTPUT_DIR/initrd-tftp-net-install.img" "$FIT_STAGING/initrd" +mkdir -p "$FIT_STAGING/dtb" +cp "$DTB_DIR"/*.dtb "$FIT_STAGING/dtb/" 2>/dev/null || true +sed -e "s|__KERNEL_PATH__|/tmp/tftp-fit/kernel|g" \ + -e "s|__INITRD_PATH__|/tmp/tftp-fit/initrd|g" \ + -e "s|__DTB_PATH_ASPEED__|/tmp/tftp-fit/dtb|g" \ + "$PLATFORM_ASPEED/sonic_fit.its" > "$FIT_STAGING/sonic.its" + +sudo mkdir -p "$FILESYSTEM_ROOT/tmp/tftp-fit" +sudo mount --bind "$FIT_STAGING" "$FILESYSTEM_ROOT/tmp/tftp-fit" +sudo chroot "$FILESYSTEM_ROOT" mkimage -f /tmp/tftp-fit/sonic.its /tmp/tftp-fit/out.fit +sudo cp "$FILESYSTEM_ROOT/tmp/tftp-fit/out.fit" "$OUTPUT_DIR/$FIT_NAME" +sudo chown "$(id -u):$(id -g)" "$OUTPUT_DIR/$FIT_NAME" +sudo umount "$FILESYSTEM_ROOT/tmp/tftp-fit" +rm -rf "$FIT_STAGING" +FIT_STAGING="" + +cp -v "$EMMC_RAW_IMAGE" "$OUTPUT_DIR/$TFTP_IMAGE_NAME" + +fit_addr=0x432000000 + +cat > "$OUTPUT_DIR/uboot-tftp-commands.txt" << EOF +# Aspeed net-install: /init brings up network, fetches the eMMC image, and runs +# install-to-emmc.sh. U-Boot still fetches the FIT via TFTP (small, one-shot); the large eMMC +# payload transport is selected from sonic_install.bmc_image= (HTTP/HTTPS or TFTP). +# +# 1. Layout: +# - sonic_tftp_install.fit -> on the TFTP server (U-Boot boots this). +# - $TFTP_IMAGE_NAME -> served by an HTTP/HTTPS server, OR placed on the TFTP server. +# +# 2. In U-Boot — auto install to eMMC (DHCP + TFTP for FIT; payload by sonic_install.bmc_image=): +dhcp +setenv serverip +setenv loadaddr $fit_addr +# HTTP example (payload served over HTTP, e.g. on same host as TFTP, default port 80): +setenv bootargs "console=ttyS12,115200n8 earlycon=uart8250,mmio32,0x14c33b00 root=/dev/ram0 rw sonic_install.bmc_image=http://\${serverip}/$TFTP_IMAGE_NAME" +# HTTPS example: +# setenv bootargs "console=ttyS12,115200n8 ... root=/dev/ram0 rw sonic_install.bmc_image=https://images.example.com/sonic/$TFTP_IMAGE_NAME" +# TFTP example (plain path/filename triggers TFTP; pair with sonic_install.tftp_server=): +# setenv bootargs "console=ttyS12,115200n8 ... root=/dev/ram0 rw sonic_install.bmc_image=$TFTP_IMAGE_NAME sonic_install.tftp_server=\${serverip}" +tftp \$loadaddr sonic_tftp_install.fit +# bootconf must match a "configurations" entry in platform/aspeed/sonic_fit.its (name without conf- prefix). +setenv bootconf +bootm \$loadaddr#conf-\$bootconf +# +# Auto-reboot after a successful install is enabled by default. +# To stay in the installer shell after success, add: sonic_install.reboot=n +# Static IP instead of DHCP: add e.g. ip=192.168.1.50::192.168.1.1:255.255.255.0::eth0:off +# Static IP has no DHCP, so hostname URLs won't resolve — use an IP-literal URL. +# (network is always eth0) +# +# 3. Manual install (no sonic_install.bmc_image in bootargs): shell then +# /sbin/install-to-emmc.sh /tmp/$TFTP_IMAGE_NAME +# (after fetching the image yourself — curl http(s)://.../$TFTP_IMAGE_NAME -o /tmp/$TFTP_IMAGE_NAME +# or tftp -g -r $TFTP_IMAGE_NAME -l /tmp/$TFTP_IMAGE_NAME ) +# If you use gunzip|dd manually, run sync (and blockdev --flushbufs /dev/mmcblk0) before reboot +# or the eMMC root fs may be corrupt (EXT4 journal / I/O errors on first boot). +EOF + +if [ -n "${OUTPUT_TFTP_INSTALL_TAR:-}" ]; then + mkdir -p "$(dirname "$OUTPUT_TFTP_INSTALL_TAR")" + rm -f "$OUTPUT_TFTP_INSTALL_TAR" + tar -chf "$OUTPUT_TFTP_INSTALL_TAR" -C "$OUTPUT_DIR" \ + "$FIT_NAME" uboot-tftp-commands.txt "$TFTP_IMAGE_NAME" + echo "Net-install archive: $OUTPUT_TFTP_INSTALL_TAR" +fi + +echo "" +echo "Net-install bundle ready in: $OUTPUT_DIR" +echo " - $FIT_NAME (U-Boot loads this via TFTP)" +echo " - $TFTP_IMAGE_NAME (serve via HTTP/HTTPS, or place on the TFTP server)" +echo " - uboot-tftp-commands.txt (U-Boot commands)" +echo "" +echo "Put $FIT_NAME on your TFTP server. Pick a transport for $TFTP_IMAGE_NAME, then in U-Boot:" +echo " setenv serverip " +echo " # HTTP/HTTPS payload:" +echo " setenv bootargs \"console=... root=/dev/ram0 rw sonic_install.bmc_image=http(s):////$TFTP_IMAGE_NAME\"" +echo " # OR TFTP payload (plain path/filename + tftp_server):" +echo " setenv bootargs \"console=... root=/dev/ram0 rw sonic_install.bmc_image=$TFTP_IMAGE_NAME sonic_install.tftp_server=\${serverip}\"" +echo " tftp $fit_addr sonic_tftp_install.fit" +echo " setenv bootconf # see configurations in platform/aspeed/sonic_fit.its (no conf- prefix)" +echo " bootm $fit_addr#conf-\$bootconf" +echo "" +echo "Auto-reboot after a successful install is enabled by default." +echo "Add sonic_install.reboot=n to the bootargs to stay in the installer shell after success." +echo "" +echo "Without sonic_install.bmc_image=: shell, then /sbin/install-to-emmc.sh /tmp/$TFTP_IMAGE_NAME" diff --git a/platform/aspeed/nvidia-hw-mgmt.mk b/platform/aspeed/nvidia-hw-mgmt.mk new file mode 100644 index 00000000000..3159645974a --- /dev/null +++ b/platform/aspeed/nvidia-hw-mgmt.mk @@ -0,0 +1,32 @@ +# +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +# NVIDIA hw-mgmt for BMC (Aspeed platform) + +include platform/mellanox/hw-management.mk + +# Override SRC_PATH: the include above set it to $(PLATFORM_PATH)/hw-management +$(MLNX_HW_MANAGEMENT)_SRC_PATH = platform/mellanox/hw-management +$(MLNX_HW_MANAGEMENT_BMC)_SRC_PATH = platform/mellanox/hw-management +$(MLNX_HW_MANAGEMENT_BMC)_PLATFORM = arm64-aspeed_nvidia_ast2700_bmc-r0 +SONIC_MAKE_DEBS += $(MLNX_HW_MANAGEMENT_BMC) + +# Point to mellanox platform directory where hw-mgmt source and integration scripts live. +MLNX_PLATFORM_PATH = platform/mellanox + +include platform/mellanox/integration-scripts.mk diff --git a/platform/aspeed/one-image.mk b/platform/aspeed/one-image.mk new file mode 100644 index 00000000000..80dc073c5f6 --- /dev/null +++ b/platform/aspeed/one-image.mk @@ -0,0 +1,42 @@ +# ONIE installer for Aspeed BMC platform with U-Boot + +SONIC_ONE_IMAGE = sonic-aspeed-arm64.bin +$(SONIC_ONE_IMAGE)_ARCH = arm64 +$(SONIC_ONE_IMAGE)_MACHINE = aspeed +$(SONIC_ONE_IMAGE)_PLATFORM = aspeed +$(SONIC_ONE_IMAGE)_IMAGE_TYPE = onie + +# Aspeed BMC is a minimal embedded platform - only include essential components +DISABLED_PACKAGES_LOCAL = $(DOCKER_DHCP_RELAY) $(DOCKER_SFLOW) $(DOCKER_MGMT_FRAMEWORK) \ + $(DOCKER_NAT) $(DOCKER_TEAMD) $(DOCKER_ROUTER_ADVERTISER) \ + $(DOCKER_MUX) $(DOCKER_MACSEC) \ + $(DOCKER_EVENTD) $(DOCKER_DASH_HA) $(DOCKER_STP) \ + $(DOCKER_RESTAPI) + +# Aspeed BMC does not ship eventd / snmp / radv / restapi as features. Disable +# their INCLUDE_* flags so the rendered init_cfg.json FEATURE table does not +# advertise them as enabled, which would otherwise cause "show feature status" +# and tools/tests that trust it to try to operate on systemd units that do not +# exist on BMC. +DISABLED_FEATURE_FLAGS = INCLUDE_SYSTEM_EVENTD \ + INCLUDE_SNMP \ + INCLUDE_ROUTER_ADVERTISER \ + INCLUDE_RESTAPI + +$(info [aspeed] Filtering out packages: $(DISABLED_PACKAGES_LOCAL)) +$(info [aspeed] Disabling feature flags: $(DISABLED_FEATURE_FLAGS)) + +SONIC_PACKAGES_LOCAL := $(filter-out $(DISABLED_PACKAGES_LOCAL), $(SONIC_PACKAGES_LOCAL)) +$(foreach feature, $(DISABLED_FEATURE_FLAGS), $(eval override $(feature)=n)) + +$(SONIC_ONE_IMAGE)_INSTALLS += $(SYSTEMD_SONIC_GENERATOR) +$(SONIC_ONE_IMAGE)_INSTALLS += $(ASPEED_PLATFORM_SERVICES) +$(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(ASPEED_EVB_AST2700_PLATFORM_MODULE) +$(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(NEXTHOP_COMMON_PLATFORM_MODULE) +$(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(ASPEED_NEXTHOP_B27_PLATFORM_MODULE) +$(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(ASPEED_NVIDIA_AST2700_BMC_PLATFORM_MODULE) +$(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(ARISTA_PLATFORM_MODULE_ALL) +$(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(NOKIA_BMC_H6_128_PLATFORM_MODULE) + +$(SONIC_ONE_IMAGE)_DOCKERS = $(DOCKER_DATABASE) $(DOCKER_GNMI) $(DOCKER_PLATFORM_MONITOR) $(DOCKER_LLDP) $(DOCKER_TELEMETRY) $(DOCKER_SYSMGR) $(DOCKER_SONIC_REDFISH) +SONIC_INSTALLERS += $(SONIC_ONE_IMAGE) diff --git a/platform/aspeed/onie-image-arm64.conf b/platform/aspeed/onie-image-arm64.conf new file mode 100644 index 00000000000..b858848a768 --- /dev/null +++ b/platform/aspeed/onie-image-arm64.conf @@ -0,0 +1,49 @@ +## DESCRIPTION: +## config for ONIE image for Aspeed BMC platform +## + +## Partition size in MB +: ${ONIE_IMAGE_PART_SIZE:=32768} + +## Target hardware information +: ${TARGET_PLATFORM:=arm64} +: ${TARGET_MACHINE:=aspeed} + +ONIEIMAGE_VERSION=r0 + +## Filesystem root +FILESYSTEM_ROOT=./fsroot-${TARGET_MACHINE} + +## Filename for squashfs file system +FILESYSTEM_SQUASHFS=fs.squashfs + +## Filename for onie installer payload, will be the main part of onie installer +INSTALLER_PAYLOAD=fs.zip + +## Filename for docker file system +FILESYSTEM_DOCKERFS=dockerfs.tar.gz + +## docker directory on the root filesystem +DOCKERFS_DIR=docker + +## docker ramfs disk space +DOCKER_RAMFS_SIZE=3500M + +## Output file name for onie installer +OUTPUT_ONIE_IMAGE=target/sonic-$TARGET_MACHINE-$CONFIGURED_ARCH.bin + +## Output file name for raw image (referenced in installer script even if not building raw image) +OUTPUT_RAW_IMAGE=target/sonic-$TARGET_MACHINE-$CONFIGURED_ARCH.raw + +## Optional: tar of TFTP install bundle (FIT + U-Boot cheat sheet + raw eMMC image), see installer/create_tftp_image.sh +OUTPUT_TFTP_INSTALL_TAR=target/sonic-$TARGET_MACHINE-$CONFIGURED_ARCH-tftp-install.tar + +## eMMC disk image size in MiB (required by build-emmc-image-installer.sh; optional env or third script arg overrides) +EMMC_SIZE_MB=7168 + +## Raw eMMC image path for TFTP bundle (build: make aspeed-emmc-image; see build-emmc-image-installer.sh) +EMMC_RAW_IMAGE=target/sonic-$TARGET_MACHINE-$CONFIGURED_ARCH-emmc.img.gz + +## Basename of that file inside the TFTP output directory / tar archive +TFTP_EMMC_IMAGE_NAME=sonic-$TARGET_MACHINE-$CONFIGURED_ARCH-emmc.img.gz + diff --git a/platform/aspeed/platform-modules-arista.dep b/platform/aspeed/platform-modules-arista.dep new file mode 100644 index 00000000000..63663085385 --- /dev/null +++ b/platform/aspeed/platform-modules-arista.dep @@ -0,0 +1,11 @@ + +MPATH := $($(ARISTA_PLATFORM_MODULE_ALL)_SRC_PATH) +DEP_FILES := $(SONIC_COMMON_FILES_LIST) platform/aspeed/platform-modules-arista.mk platform/aspeed/platform-modules-arista.dep +DEP_FILES += $(SONIC_COMMON_BASE_FILES_LIST) +SMDEP_FILES := $(addprefix $(MPATH)/,$(shell cd $(MPATH) && git ls-files)) + +$(ARISTA_PLATFORM_MODULE_ALL)_CACHE_MODE := GIT_CONTENT_SHA +$(ARISTA_PLATFORM_MODULE_ALL)_DEP_FLAGS := $(SONIC_COMMON_FLAGS_LIST) +$(ARISTA_PLATFORM_MODULE_ALL)_DEP_FILES := $(DEP_FILES) +$(ARISTA_PLATFORM_MODULE_ALL)_SMDEP_FILES := $(SMDEP_FILES) +$(ARISTA_PLATFORM_MODULE_ALL)_SMDEP_PATHS := $(MPATH) diff --git a/platform/aspeed/platform-modules-arista.mk b/platform/aspeed/platform-modules-arista.mk new file mode 100644 index 00000000000..af8c3bb6c01 --- /dev/null +++ b/platform/aspeed/platform-modules-arista.mk @@ -0,0 +1,22 @@ +# Arista Platform modules for ARM64 + +ARISTA_PLATFORM_MODULE_VERSION = 1.0 + +export ARISTA_PLATFORM_MODULE_VERSION + +# Get list of Arista platforms (if any arm64 platforms exist) +ARISTA_PLATFORMS_ARM64 = $(subst device/arista/,, $(wildcard device/arista/arm64-arista_*)) + +export ARISTA_PLATFORMS_ARM64 + +# All-in-one package (whl + fs + postinst) +ARISTA_PLATFORM_MODULE_ALL = sonic-platform-arista-all_$(ARISTA_PLATFORM_MODULE_VERSION)_arm64.deb +$(ARISTA_PLATFORM_MODULE_ALL)_SRC_PATH = $(PLATFORM_PATH)/sonic-platform-modules-arista +$(ARISTA_PLATFORM_MODULE_ALL)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON) +$(ARISTA_PLATFORM_MODULE_ALL)_BUILD_ENV = KVERSION_SHORT=$(KVERSION_SHORT) KVERSION=$(KVERSION) ARCH=$(CONFIGURED_ARCH) +ifneq ($(ARISTA_PLATFORMS_ARM64),) +$(ARISTA_PLATFORM_MODULE_ALL)_PLATFORM = $(ARISTA_PLATFORMS_ARM64) +endif +SONIC_DPKG_DEBS += $(ARISTA_PLATFORM_MODULE_ALL) + +export ARISTA_PLATFORM_MODULE_ALL diff --git a/platform/aspeed/platform-modules-ast-evb.dep b/platform/aspeed/platform-modules-ast-evb.dep new file mode 100644 index 00000000000..bd31268b451 --- /dev/null +++ b/platform/aspeed/platform-modules-ast-evb.dep @@ -0,0 +1,9 @@ +MPATH := $($(ASPEED_EVB_AST2700_PLATFORM_MODULE)_SRC_PATH) +DEP_FILES := $(SONIC_COMMON_FILES_LIST) platform/aspeed/platform-modules-ast-evb.mk platform/aspeed/platform-modules-ast-evb.dep +DEP_FILES += $(SONIC_COMMON_BASE_FILES_LIST) +DEP_FILES += $(addprefix $(MPATH)/,$(shell cd $(MPATH) && git ls-files)) + +$(ASPEED_EVB_AST2700_PLATFORM_MODULE)_CACHE_MODE := GIT_CONTENT_SHA +$(ASPEED_EVB_AST2700_PLATFORM_MODULE)_DEP_FLAGS := $(SONIC_COMMON_FLAGS_LIST) +$(ASPEED_EVB_AST2700_PLATFORM_MODULE)_DEP_FILES := $(DEP_FILES) + diff --git a/platform/aspeed/platform-modules-ast-evb.mk b/platform/aspeed/platform-modules-ast-evb.mk new file mode 100644 index 00000000000..127039039ae --- /dev/null +++ b/platform/aspeed/platform-modules-ast-evb.mk @@ -0,0 +1,6 @@ +# Aspeed EVB Platform modules +# +ASPEED_EVB_AST2700_PLATFORM_MODULE = sonic-platform-ast-evb-ast2700_1.0_arm64.deb +$(ASPEED_EVB_AST2700_PLATFORM_MODULE)_SRC_PATH = $(PLATFORM_PATH)/sonic-platform-modules-ast-evb +$(ASPEED_EVB_AST2700_PLATFORM_MODULE)_PLATFORM = arm64-aspeed_ast2700_evb-r0 +SONIC_DPKG_DEBS += $(ASPEED_EVB_AST2700_PLATFORM_MODULE) diff --git a/platform/aspeed/platform-modules-nexthop.dep b/platform/aspeed/platform-modules-nexthop.dep new file mode 100644 index 00000000000..467a3c51327 --- /dev/null +++ b/platform/aspeed/platform-modules-nexthop.dep @@ -0,0 +1,9 @@ +MPATH := $($(NEXTHOP_COMMON_PLATFORM_MODULE)_SRC_PATH) +DEP_FILES := $(SONIC_COMMON_FILES_LIST) platform/aspeed/platform-modules-nexthop.mk platform/aspeed/platform-modules-nexthop.dep +DEP_FILES += $(SONIC_COMMON_BASE_FILES_LIST) +DEP_FILES += $(addprefix $(MPATH)/,$(shell cd $(MPATH) && git ls-files)) + +$(NEXTHOP_COMMON_PLATFORM_MODULE)_CACHE_MODE := GIT_CONTENT_SHA +$(NEXTHOP_COMMON_PLATFORM_MODULE)_DEP_FLAGS := $(SONIC_COMMON_FLAGS_LIST) +$(NEXTHOP_COMMON_PLATFORM_MODULE)_DEP_FILES := $(DEP_FILES) + diff --git a/platform/aspeed/platform-modules-nexthop.mk b/platform/aspeed/platform-modules-nexthop.mk new file mode 100644 index 00000000000..e0de9eeb356 --- /dev/null +++ b/platform/aspeed/platform-modules-nexthop.mk @@ -0,0 +1,20 @@ +# NextHop Platform modules +# + +# Common package - contains USB network gadget and shared utilities +NEXTHOP_COMMON_PLATFORM_MODULE = sonic-platform-aspeed-nexthop-common_1.0_arm64.deb +$(NEXTHOP_COMMON_PLATFORM_MODULE)_SRC_PATH = $(PLATFORM_PATH)/sonic-platform-modules-nexthop +$(NEXTHOP_COMMON_PLATFORM_MODULE)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON) +$(NEXTHOP_COMMON_PLATFORM_MODULE)_PLATFORM = arm64-nexthop-common +SONIC_DPKG_DEBS += $(NEXTHOP_COMMON_PLATFORM_MODULE) + +# B27 platform package +ASPEED_NEXTHOP_B27_PLATFORM_MODULE = sonic-platform-aspeed-nexthop-b27_1.0_arm64.deb +$(ASPEED_NEXTHOP_B27_PLATFORM_MODULE)_PLATFORM = arm64-nexthop_b27-r0 +$(eval $(call add_extra_package,$(NEXTHOP_COMMON_PLATFORM_MODULE),$(ASPEED_NEXTHOP_B27_PLATFORM_MODULE))) + +# Future B28 platform (example): +# ASPEED_NEXTHOP_B28_PLATFORM_MODULE = sonic-platform-aspeed-nexthop-b28_1.0_arm64.deb +# $(ASPEED_NEXTHOP_B28_PLATFORM_MODULE)_PLATFORM = arm64-nexthop_b28-r0 +# $(eval $(call add_extra_package,$(NEXTHOP_COMMON_PLATFORM_MODULE),$(ASPEED_NEXTHOP_B28_PLATFORM_MODULE))) + diff --git a/platform/aspeed/platform-modules-nokia.dep b/platform/aspeed/platform-modules-nokia.dep new file mode 100644 index 00000000000..40fecdb467c --- /dev/null +++ b/platform/aspeed/platform-modules-nokia.dep @@ -0,0 +1,8 @@ +MPATH := $($(NOKIA_BMC_H6_128_PLATFORM_MODULE)_SRC_PATH) +DEP_FILES := $(SONIC_COMMON_FILES_LIST) $(PLATFORM_PATH)/platform-modules-nokia.mk $(PLATFORM_PATH)/platform-modules-nokia.dep +DEP_FILES += $(SONIC_COMMON_BASE_FILES_LIST) +DEP_FILES += $(shell git ls-files $(MPATH)) + +$(NOKIA_BMC_H6_128_PLATFORM_MODULE)_CACHE_MODE := GIT_CONTENT_SHA +$(NOKIA_BMC_H6_128_PLATFORM_MODULE)_DEP_FLAGS := $(SONIC_COMMON_FLAGS_LIST) +$(NOKIA_BMC_H6_128_PLATFORM_MODULE)_DEP_FILES := $(DEP_FILES) diff --git a/platform/aspeed/platform-modules-nokia.mk b/platform/aspeed/platform-modules-nokia.mk new file mode 100644 index 00000000000..5daaf8087a4 --- /dev/null +++ b/platform/aspeed/platform-modules-nokia.mk @@ -0,0 +1,17 @@ +# Nokia platforms +NOKIA_BMC_H6_128_PLATFORM_VERSION = 1.0 +export NOKIA_BMC_H6_128_PLATFORM_VERSION +NOKIA_BMC_H6_128_PLATFORM_MODULE = sonic-platform-aspeed-nokia-h6-128_$(NOKIA_BMC_H6_128_PLATFORM_VERSION)_$(CONFIGURED_ARCH).deb +$(NOKIA_BMC_H6_128_PLATFORM_MODULE)_SRC_PATH = $(PLATFORM_PATH)/sonic-platform-modules-nokia +$(NOKIA_BMC_H6_128_PLATFORM_MODULE)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON) $(ASPEED_COMMON_PLATFORM_MODULE) +$(NOKIA_BMC_H6_128_PLATFORM_MODULE)_PLATFORM = arm64-nokia_bmc_h6_128-r0 + +MPATH := $($(NOKIA_BMC_H6_128_PLATFORM_MODULE)_SRC_PATH) +DEP_FILES := $(SONIC_COMMON_FILES_LIST) platform/aspeed/platform-modules-nokia.mk +DEP_FILES += $(SONIC_COMMON_BASE_FILES_LIST) +DEP_FILES += $(shell git ls-files $(MPATH)) + +$(NOKIA_BMC_H6_128_PLATFORM_MODULE)_CACHE_MODE := GIT_CONTENT_SHA +$(NOKIA_BMC_H6_128_PLATFORM_MODULE)_DEP_FLAGS := $(SONIC_COMMON_FLAGS_LIST) +$(NOKIA_BMC_H6_128_PLATFORM_MODULE)_DEP_FILES := $(DEP_FILES) +SONIC_DPKG_DEBS += $(NOKIA_BMC_H6_128_PLATFORM_MODULE) diff --git a/platform/aspeed/platform-modules-nvidia-bmc.mk b/platform/aspeed/platform-modules-nvidia-bmc.mk new file mode 100644 index 00000000000..fd3f16bbbc1 --- /dev/null +++ b/platform/aspeed/platform-modules-nvidia-bmc.mk @@ -0,0 +1,26 @@ +# +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +# NVIDIA BMC Platform modules + +ASPEED_NVIDIA_AST2700_BMC_PLATFORM_MODULE = sonic-platform-aspeed-nvidia-ast2700-bmc_1.0_arm64.deb +$(ASPEED_NVIDIA_AST2700_BMC_PLATFORM_MODULE)_SRC_PATH = $(PLATFORM_PATH)/sonic-platform-modules-nvidia-bmc +$(ASPEED_NVIDIA_AST2700_BMC_PLATFORM_MODULE)_PLATFORM = arm64-aspeed_nvidia_ast2700_bmc-r0 +$(ASPEED_NVIDIA_AST2700_BMC_PLATFORM_MODULE)_WHEEL_DEPENDS += $(SONIC_PLATFORM_COMMON_PY3) $(SONIC_PY_COMMON_PY3) + +SONIC_DPKG_DEBS += $(ASPEED_NVIDIA_AST2700_BMC_PLATFORM_MODULE) diff --git a/platform/aspeed/platform_arm64.conf b/platform/aspeed/platform_arm64.conf new file mode 100644 index 00000000000..15cec9299b6 --- /dev/null +++ b/platform/aspeed/platform_arm64.conf @@ -0,0 +1,387 @@ +#!/bin/sh +# Implementation of installation behavior for Aspeed AST2700 BMC platform + +echo "Preparing for Aspeed AST2700 installation..." + +# SONiC filesystem definitions (must match installer/install.sh) +DOCKERFS_DIR=docker +FILESYSTEM_DOCKERFS=dockerfs.tar.gz +FILESYSTEM_SQUASHFS=fs.squashfs + +# FIT image configuration +fit_fname="/boot/sonic_arm64.fit" + +# Device tree blob configuration +# The DTB is selected at boot time by U-Boot based on hardware detection +# U-Boot sets the 'bootconf' environment variable to the appropriate configuration name +# This supports multiple vendors with a single image containing multiple DTBs in a FIT image +# Example: bootconf="ast2700-evb" or bootconf="nexthop-b27-r0" +# The bootconf variable is used to select the FIT configuration: #conf-${bootconf} +# Note: bootconf contains the base name without .dtb extension + +# Platform detection +# During ONIE or SONiC installation, $onie_platform is already set by install.sh from machine.conf +# During build (install_env=build), machine.conf doesn't exist yet, use a default +if [ "$install_env" = "build" ]; then + onie_platform="arm64-aspeed_ast2700_evb-r0" + echo "Build mode: Using default platform $onie_platform" +else + # Try to load device-specific configuration + if [ -n "$onie_platform" ] && [ -r "platforms/$onie_platform" ]; then + . "platforms/$onie_platform" + else + echo "Warning: No device-specific configuration found for $onie_platform" + echo " Will use default configuration for Aspeed AST2700" + fi +fi + +# Set defaults when invoked from 'build' install env OR +# if not specified in installer.conf +# Override these values in device-specific installer.conf +# AND here if hand crafting a disk image to burn for the +# first install +CONSOLE_DEV=${CONSOLE_DEV:-12} +CONSOLE_SPEED=${CONSOLE_SPEED:-115200} +EARLYCON=${EARLYCON:-"earlycon=uart8250,mmio32,0x14c33b00"} +VAR_LOG=${VAR_LOG:-${VAR_LOG_SIZE:-128}} # 128MB for /var/log tmpfs + +# Construct console device name +CONSOLE_PORT="ttyS${CONSOLE_DEV}" + +echo "Installing SONiC from ${install_env:-unknown} on Platform $onie_platform" + +# AST2700 platform default configurations +disk_interface="mmc" +mmc_bus="mmc0:0001" + +# Device tree and FIT image configuration +# DTB is embedded in FIT image, selected by bootconf U-Boot variable +# FIT configuration is selected by U-Boot bootconf variable +# bootconf can be set by either U-Boot based on hardware detection or +# from device///installer.conf +# Example: bootconf="ast2700-evb" selects #conf-ast2700-evb from FIT image + +# U-Boot memory addresses for AST2700 +# Based on actual hardware memory map from bdinfo: +# - RAM: 0x400000000 - 0x47e000000 (2016 MB) +# - Reserved: 0x41b800000-0x423ffffff (136 MB), 0x42c000000-0x431bfffff (92 MB) +# - Safe addresses avoid reserved regions +# See platform/aspeed/AST2700-MEMORY-MAP.md for details +# +# Memory Layout (works for both production and installation initramfs): +# 0x403000000: Kernel (~10 MB) +# 0x440000000: Initramfs (192 MB allocated for decompression) +# - Production initramfs: 37.4 MB compressed, 160 MB uncompressed +# - Installation initramfs: 3-5 MB compressed, ~10 MB uncompressed +# 0x44C000000: DTB (~50 KB) - after initramfs (0x440000000 + 192 MB) +# +# IMPORTANT: Initramfs is compressed (zstd) but kernel decompresses IN PLACE +# Need space for UNCOMPRESSED size (160 MB), not compressed size (37 MB)! +# +# Memory layout (avoiding reserved regions 0x41b800000-0x423ffffff and 0x42c000000-0x431bfffff): +# fit_addr: where FIT image is loaded (temporary, ~100 MB, after reserved region 2) +# kernel_addr: where kernel is extracted from FIT (U-Boot default loadaddr) +# initrd_addr: where initrd is extracted from FIT (after reserved regions, 192 MB allocated) +# fdt_addr: where device tree blob is extracted from FIT (after initramfs space) +fit_addr=0x432000000 +kernel_addr=0x403000000 +initrd_addr=0x440000000 +fdt_addr=0x44C000000 + +# U-Boot environment location +# AST2700 typically stores U-Boot env in SPI flash (MTD) +FW_ENV_DEFAULT='/dev/mtd1 0x0 0x20000 0x10000' + +# Extra kernel command line for GRUB bootloader configuration +# This is appended to the kernel command line in the generated grub.cfg +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="$EARLYCON console=$CONSOLE_PORT,${CONSOLE_SPEED}n8" + +# Get eMMC block device +# AST2700 EVB has eMMC at /dev/mmcblk0 (mmc0:0001) +get_install_device() +{ + # In build mode, there's no hardware - skip device detection + if [ "$install_env" = "build" ]; then + return 0 + fi + + if [ ! -z "$mmc_bus" ]; then + for i in 0 1 2 ; do + if $(ls -l /sys/block/mmcblk$i/device 2>/dev/null | grep -q "$mmc_bus") ; then + echo "/dev/mmcblk$i" + blk_dev=/dev/mmcblk$i + disk_interface="mmc" + echo "Selected eMMC device: $blk_dev" + return + fi + done + fi + + echo "Warning: eMMC not found. Will try installing on the same disk as ONIE." +} + +get_install_device + +# Run the new image's sonic-fw-env-config.sh (loop-mounted from its squashfs), +# not the old rootfs's copy which may predate AST2700 fixes. +configure_uboot_env() { + echo "Configuring U-Boot environment access..." + + new_squashfs="$demo_mnt/$image_dir/$FILESYSTEM_SQUASHFS" + if [ ! -f "$new_squashfs" ]; then + echo "ERROR: new image squashfs not found at $new_squashfs" + return 1 + fi + + loop_mnt=$(mktemp -d) || { + echo "ERROR: mktemp -d failed." + return 1 + } + + if ! mount -o ro,loop -t squashfs "$new_squashfs" "$loop_mnt"; then + echo "ERROR: failed to mount $new_squashfs on $loop_mnt" + rmdir "$loop_mnt" 2>/dev/null + return 1 + fi + + cue_rc=0 + cue_sh="" + for p in "$loop_mnt/usr/bin/sonic-fw-env-config.sh" \ + "$loop_mnt/sbin/sonic-fw-env-config.sh"; do + if [ -x "$p" ]; then + cue_sh="$p" + break + fi + done + + if [ -z "$cue_sh" ]; then + echo "ERROR: sonic-fw-env-config.sh not found in $new_squashfs" + cue_rc=1 + elif ! onie_platform="$onie_platform" "$cue_sh"; then + echo "ERROR: $cue_sh failed." + cue_rc=1 + fi + + umount "$loop_mnt" 2>/dev/null || umount -l "$loop_mnt" 2>/dev/null || true + rmdir "$loop_mnt" 2>/dev/null || true + + [ "$cue_rc" -ne 0 ] && return "$cue_rc" + + if fw_printenv bootcmd >/dev/null 2>&1; then + echo "U-Boot environment is accessible" + return 0 + fi + + echo "ERROR: fw_printenv cannot read U-Boot environment." + cat /etc/fw_env.config 2>/dev/null | sed 's/^/ /' + return 1 +} + +# Prepare U-Boot boot menu +prepare_boot_menu() { + echo "Sync up cache ..." + sync + echo "Setting up U-Boot environment for Aspeed AST2700..." + + # Configure U-Boot environment access first + # This function detects MTD, device tree, or uses eMMC default + configure_uboot_env + + # U-Boot uses relative paths (without leading /) + # image_dir from installer.sh is already in correct format (e.g., "image-version") + fit_name=${image_dir}${fit_fname} + + # Get partition UUID for the installation target (single SONiC-OS partition) + uuid=$(blkid | grep "$demo_volume_label" | sed -ne 's/.* UUID=\"\([^"]*\)\".*/\1/p') + demo_part=$(sgdisk -p $blk_dev | grep -e "$demo_volume_label" | awk '{print $1}') + + # Standard SONiC approach: Single partition with multiple image directories + # sonic_image_1 = current/new image + # sonic_image_2 = previous image (for rollback) + + if [ "$install_env" = "onie" ]; then + FW_ARG="-f" + fi + if [ "$install_env" = "onie" ] || [ "$install_env" = "build" ]; then + # First installation - initialize boot configuration + echo "First installation: Setting up boot configuration for image directory: $image_dir" + fw_setenv ${FW_ARG} image_dir_old "" + fw_setenv ${FW_ARG} fit_name_old "" + fw_setenv ${FW_ARG} sonic_version_2 "None" + fw_setenv ${FW_ARG} linuxargs_old "" + else + # Upgrade scenario - save current image as "old" (image_2) + echo "Upgrade installation: Saving current image as backup" + + CURR_SONIC_IMAGE="$(sonic-installer list 2>/dev/null | grep "Current: " | cut -f2 -d' ')" + FIRST_SONIC_IMAGE="$(fw_printenv -n sonic_version_1 2>/dev/null || true)" + SECOND_SONIC_IMAGE="$(fw_printenv -n sonic_version_2 2>/dev/null || true)" + + echo "Current running image: $CURR_SONIC_IMAGE" + echo "Image slot 1 (sonic_version_1): $FIRST_SONIC_IMAGE" + echo "Image slot 2 (sonic_version_2): $SECOND_SONIC_IMAGE" + + # Guard against fw_printenv-broken state: without a valid current image, + # empty==empty below would match slot 1 and wipe slot 2 with empty values. + # Requiring the comparand to be non-empty closes the same hole per-branch. + if [ -z "$CURR_SONIC_IMAGE" ]; then + echo "WARNING: current SONiC image unknown; skipping slot-2 backup." + elif [ -n "$FIRST_SONIC_IMAGE" ] && [ "$CURR_SONIC_IMAGE" = "$FIRST_SONIC_IMAGE" ]; then + # Currently running image_1, save it to image_2 slot + echo "Current image matches slot 1, saving to slot 2 as backup" + image_dir_old=$(fw_printenv -n image_dir 2>/dev/null || true) + fit_name_old=$(fw_printenv -n fit_name 2>/dev/null || true) + sonic_version_2="$CURR_SONIC_IMAGE" + linuxargs_old=$(fw_printenv -n linuxargs 2>/dev/null || true) + + echo "Saving current image to slot 2: $sonic_version_2" + fw_setenv ${FW_ARG} image_dir_old "$image_dir_old" + fw_setenv ${FW_ARG} fit_name_old "$fit_name_old" + fw_setenv ${FW_ARG} sonic_version_2 "$sonic_version_2" + fw_setenv ${FW_ARG} linuxargs_old "$linuxargs_old" + elif [ -n "$SECOND_SONIC_IMAGE" ] && [ "$CURR_SONIC_IMAGE" = "$SECOND_SONIC_IMAGE" ]; then + # Currently running image_2, keep it in slot 2 + echo "Current image matches slot 2, keeping it as backup" + # No need to update image_2 variables, they're already correct + else + # Current image doesn't match either slot - this shouldn't happen in normal operation + # But we'll save it anyway to be safe + echo "WARNING: Current image doesn't match any slot, saving to slot 2 anyway" + + # Try to find the current image directory from /proc/cmdline (most reliable) + CURR_IMAGE_DIR=$(cat /proc/cmdline | sed -n 's/^.*loop=\/*\(image-[^/]*\)\/.*$/\1/p') + + if [ -z "$CURR_IMAGE_DIR" ]; then + # Fallback: derive from sonic-installer list + CURR_IMAGE_DIR=$(echo "$CURR_SONIC_IMAGE" | sed 's/SONiC-OS-/image-/') + fi + + if [ -n "$CURR_IMAGE_DIR" ] && [ -d "/host/$CURR_IMAGE_DIR" ]; then + image_dir_old="$CURR_IMAGE_DIR" + fit_name_old="$CURR_IMAGE_DIR/boot/sonic_arm64.fit" + sonic_version_2="$CURR_SONIC_IMAGE" + + # Reconstruct linuxargs from current boot + linuxargs_old="console=$CONSOLE_PORT,${CONSOLE_SPEED}n8 $EARLYCON loopfstype=squashfs loop=$CURR_IMAGE_DIR/$FILESYSTEM_SQUASHFS varlog_size=$VAR_LOG logs_inram=on" + + echo "Saving current image to slot 2: $sonic_version_2" + fw_setenv ${FW_ARG} image_dir_old "$image_dir_old" + fw_setenv ${FW_ARG} fit_name_old "$fit_name_old" + fw_setenv ${FW_ARG} sonic_version_2 "$sonic_version_2" + fw_setenv ${FW_ARG} linuxargs_old "$linuxargs_old" + else + echo "ERROR: Cannot find current image directory, skipping backup" + fi + fi + fi + + # Set current image variables (image_1) + echo "Setting sonic_version_1 to: $demo_volume_revision_label" + + fw_setenv ${FW_ARG} image_dir "$image_dir" + fw_setenv ${FW_ARG} fit_name "$fit_name" + fw_setenv ${FW_ARG} sonic_version_1 "$demo_volume_revision_label" + + # Boot menu with instructions + BORDER='echo "===================================================";' + TITLE='echo "SONiC Boot Menu";' + BOOT1='echo "To boot $sonic_version_1";echo " type: run sonic_image_1";echo " at the U-Boot prompt after interrupting U-Boot when it says";echo " \"Hit any key to stop autoboot:\" during boot";echo;' + BOOT2='echo "To boot $sonic_version_2";echo " type: run sonic_image_2";echo " at the U-Boot prompt after interrupting U-Boot when it says";echo " \"Hit any key to stop autoboot:\" during boot";echo;' + FOOTER='echo "===================================================";' + fw_setenv ${FW_ARG} print_menu "$BORDER $TITLE $BORDER $BOOT1 $BOOT2 $FOOTER" + + # Boot arguments for current image (linuxargs contains loop path) + fw_setenv ${FW_ARG} linuxargs "console=$CONSOLE_PORT,${CONSOLE_SPEED}n8 $EARLYCON loopfstype=squashfs loop=$image_dir/$FILESYSTEM_SQUASHFS varlog_size=$VAR_LOG logs_inram=on" + + # Boot commands - always load from partition 1 (SONiC-OS) + DISK_LOAD="ext4load $disk_interface 0:$demo_part \${loadaddr} \${fit_name}" + BOOTARGS='setenv bootargs root=UUID='$uuid' rw rootwait panic=1 ${linuxargs}' + SONIC_BOOT_CMD='run sonic_bootargs; run sonic_boot_load; bootm $loadaddr#conf-$bootconf' + + # Old image boot commands + sonic_bootargs_old='setenv bootargs root=UUID='$uuid' rw rootwait panic=1 ${linuxargs_old}' + DISK_LOAD_OLD="ext4load $disk_interface 0:$demo_part \${loadaddr} \${fit_name_old}" + SONIC_BOOT_CMD_OLD='run sonic_bootargs_old; run sonic_boot_load_old; bootm $loadaddr#conf-$bootconf' + + # Set U-Boot variables + fw_setenv ${FW_ARG} sonic_boot_load "$DISK_LOAD" + fw_setenv ${FW_ARG} sonic_boot_load_old "$DISK_LOAD_OLD" + fw_setenv ${FW_ARG} sonic_bootargs "$BOOTARGS" + fw_setenv ${FW_ARG} sonic_bootargs_old "$sonic_bootargs_old" + fw_setenv ${FW_ARG} sonic_image_1 "$SONIC_BOOT_CMD" + fw_setenv ${FW_ARG} sonic_image_2 "$SONIC_BOOT_CMD_OLD" + fw_setenv ${FW_ARG} boot_next 'run sonic_image_1' + fw_setenv ${FW_ARG} bootcmd 'run print_menu; test -n "$boot_once" && setenv do_boot_once "$boot_once" && setenv boot_once "" && saveenv && run do_boot_once; run boot_next' + + # Set memory addresses (used by manual boot if needed) + fw_setenv ${FW_ARG} loadaddr $fit_addr + fw_setenv ${FW_ARG} kernel_addr $kernel_addr + fw_setenv ${FW_ARG} fdt_addr $fdt_addr + fw_setenv ${FW_ARG} initrd_addr $initrd_addr + + # bootconf is overrided with device///installer.conf + if [ -n "${bootconf}" ]; then + fw_setenv ${FW_ARG} bootconf $bootconf + fi + + # Display installation summary + echo "" + echo "=========================================" + echo "SONiC Installation Complete" + echo "=========================================" + echo "Installed to: Partition $demo_part ($demo_volume_label)" + echo "Image: $demo_volume_revision_label" + echo "" + + if [ "$install_env" != "onie" ] && [ "$install_env" != "build" ]; then + # Get current U-Boot variables for display + UBOOT_VERSION_1=$(fw_printenv -n sonic_version_1 2>/dev/null || echo "None") + UBOOT_VERSION_2=$(fw_printenv -n sonic_version_2 2>/dev/null || echo "None") + + echo "Dual-boot configuration:" + echo " - Image 1 (sonic_version_1): $UBOOT_VERSION_1" + echo " - Image 2 (sonic_version_2): $UBOOT_VERSION_2" + echo " - Next boot: Image 1" + echo "" + echo "To switch to backup image, run:" + echo " sonic-installer set-default $UBOOT_VERSION_2" + echo "" + fi + + echo "U-Boot configuration updated successfully" + echo "=========================================" +} + +# Configure bootloader menu +bootloader_menu_config() { + # In "build" mode (creating raw image), we can't access U-Boot environment + # Skip U-Boot configuration in this case + if [ "$install_env" = "build" ]; then + echo "Build mode: Skipping U-Boot environment configuration" + echo "U-Boot environment will be configured on first boot" + + # Sync to flush all writes + sync + + # Convert demo_mnt to absolute path before changing directory + # (demo_mnt is a relative path like "build_raw_image_mnt") + demo_mnt_abs=$(realpath "$demo_mnt") + + # Change back to root directory BEFORE unmounting (critical for cleanup) + cd / + + # Unmount the raw image using absolute path + umount "$demo_mnt_abs" || { + echo "Warning: Failed to unmount $demo_mnt_abs" + # Try lazy unmount as fallback + umount -l "$demo_mnt_abs" || true + } + + echo "Installed SONiC base image $demo_volume_label successfully" + return 0 + fi + + # Update U-Boot Environment for ONIE or SONiC installation + prepare_boot_menu +} + diff --git a/platform/aspeed/recipes/installer-tftp.mk b/platform/aspeed/recipes/installer-tftp.mk new file mode 100644 index 00000000000..edd339f65d0 --- /dev/null +++ b/platform/aspeed/recipes/installer-tftp.mk @@ -0,0 +1,36 @@ +# Aspeed TFTP / U-Boot netboot installer bundle (FIT + payload). +# +# Platform-local installer recipes and scripts live under platform/aspeed/installer/. +# +# This is not added as a second SONIC_INSTALLERS target: that would register another RFS squashfs +# name and rebuild the same rootfs (slave.mk rfs_define_target). The bundle reuses fsroot-aspeed +# produced for sonic-aspeed-arm64.bin. + +SONIC_ASPEED_TFTP_TAR = sonic-aspeed-arm64-tftp-install.tar + +ASPEED_EMMC_IMAGE_STEM = sonic-aspeed-arm64-emmc +ASPEED_EMMC_IMAGE_GZ = $(TARGET_PATH)/$(ASPEED_EMMC_IMAGE_STEM).img.gz +ASPEED_TFTP_BUILD_DIR = $(TARGET_PATH)/aspeed-tftp + +$(ASPEED_EMMC_IMAGE_GZ): $(TARGET_PATH)/$(SONIC_ONE_IMAGE) $(PLATFORM_PATH)/onie-image-arm64.conf + @echo "=== Building $(ASPEED_EMMC_IMAGE_GZ) (sudo required) ===" + sudo $(PLATFORM_PATH)/build-emmc-image-installer.sh \ + $(abspath $(TARGET_PATH)/$(SONIC_ONE_IMAGE)) \ + $(abspath $(TARGET_PATH)/$(ASPEED_EMMC_IMAGE_STEM).img) + @test -f $@ || { echo "Error: expected $@ after build-emmc-image-installer.sh"; exit 1; } + +.PHONY: aspeed-emmc-image +aspeed-emmc-image: $(ASPEED_EMMC_IMAGE_GZ) + +$(ASPEED_TFTP_BUILD_DIR)/.stamp: $(TARGET_PATH)/$(SONIC_ONE_IMAGE) $(ASPEED_EMMC_IMAGE_GZ) + $(PLATFORM_PATH)/installer/create_tftp_image.sh $(abspath $(ASPEED_TFTP_BUILD_DIR)) + @touch $@ + +aspeed-tftp: $(ASPEED_TFTP_BUILD_DIR)/.stamp +.PHONY: aspeed-tftp + +$(TARGET_PATH)/$(SONIC_ASPEED_TFTP_TAR): $(TARGET_PATH)/$(SONIC_ONE_IMAGE) $(ASPEED_EMMC_IMAGE_GZ) + OUTPUT_TFTP_INSTALL_TAR=$(abspath $@) $(PLATFORM_PATH)/installer/create_tftp_image.sh $(abspath $(ASPEED_TFTP_BUILD_DIR)) + +aspeed-tftp-tar: $(TARGET_PATH)/$(SONIC_ASPEED_TFTP_TAR) +.PHONY: aspeed-tftp-tar diff --git a/platform/aspeed/rules.mk b/platform/aspeed/rules.mk new file mode 100644 index 00000000000..37282108682 --- /dev/null +++ b/platform/aspeed/rules.mk @@ -0,0 +1,11 @@ +include $(PLATFORM_PATH)/platform-modules-ast-evb.mk +include $(PLATFORM_PATH)/platform-modules-nexthop.mk +include $(PLATFORM_PATH)/platform-modules-nvidia-bmc.mk +include $(PLATFORM_PATH)/aspeed-platform-services.mk +include $(PLATFORM_PATH)/nvidia-hw-mgmt.mk +include $(PLATFORM_PATH)/platform-modules-arista.mk +include $(PLATFORM_PATH)/platform-modules-nokia.mk +include $(PLATFORM_PATH)/one-image.mk +include $(PLATFORM_PATH)/recipes/installer-tftp.mk + +SONIC_ALL += $(SONIC_ONE_IMAGE) diff --git a/platform/aspeed/sonic-platform-modules-arista b/platform/aspeed/sonic-platform-modules-arista new file mode 160000 index 00000000000..74da9a8beeb --- /dev/null +++ b/platform/aspeed/sonic-platform-modules-arista @@ -0,0 +1 @@ +Subproject commit 74da9a8beeb34773544a63ed08c2d2854504b4ae diff --git a/platform/aspeed/sonic-platform-modules-ast-evb/ast2700/sonic_platform/__init__.py b/platform/aspeed/sonic-platform-modules-ast-evb/ast2700/sonic_platform/__init__.py new file mode 100644 index 00000000000..3f3f3118fc4 --- /dev/null +++ b/platform/aspeed/sonic-platform-modules-ast-evb/ast2700/sonic_platform/__init__.py @@ -0,0 +1,13 @@ +#!/usr/bin/env python3 +# +# __init__.py +# +# Platform-specific SONiC platform API for Aspeed AST2700 EVB +# + +try: + from sonic_platform.platform import Platform + from sonic_platform.chassis import Chassis +except ImportError as e: + raise ImportError(str(e) + " - required module not found") + diff --git a/platform/aspeed/sonic-platform-modules-ast-evb/ast2700/sonic_platform/chassis.py b/platform/aspeed/sonic-platform-modules-ast-evb/ast2700/sonic_platform/chassis.py new file mode 100644 index 00000000000..a558b7a9911 --- /dev/null +++ b/platform/aspeed/sonic-platform-modules-ast-evb/ast2700/sonic_platform/chassis.py @@ -0,0 +1,267 @@ +""" +SONiC Platform API - Chassis class for Aspeed BMC + +This module provides the Chassis class for Aspeed AST2700 BMC platform. +""" + +import os + +try: + from sonic_platform_base.chassis_base import ChassisBase + from sonic_platform.watchdog import Watchdog + from sonic_platform.thermal import Thermal + from sonic_platform.fan import Fan + from sonic_platform.fan_drawer import FanDrawer +except ImportError as e: + raise ImportError(str(e) + " - required module not found") + + +# Watchdog bootstatus file paths for AST2700 +WATCHDOG0_BOOTSTATUS_PATH = "/sys/devices/platform/soc@14000000/14c37000.watchdog/watchdog/watchdog0/bootstatus" +WATCHDOG1_BOOTSTATUS_PATH = "/sys/devices/platform/soc@14000000/14c37080.watchdog/watchdog/watchdog1/bootstatus" + +# Watchdog bootstatus bit flags (from Linux kernel watchdog.h) +WDIOF_OVERHEAT = 0x0001 # Reset due to CPU overheat +WDIOF_FANFAULT = 0x0002 # Fan failed +WDIOF_EXTERN1 = 0x0004 # External relay 1 +WDIOF_EXTERN2 = 0x0008 # External relay 2 +WDIOF_POWERUNDER = 0x0010 # Power bad/power fault +WDIOF_CARDRESET = 0x0020 # Card previously reset the CPU (normal reboot) +WDIOF_POWEROVER = 0x0040 # Power over voltage + + +class Chassis(ChassisBase): + """ + Chassis class for Aspeed AST2700 EVB BMC platform + + Provides chassis-level functionality including reboot cause detection, + thermal sensors, and fan management. + """ + + # EVB has 9 PWM-controlled fans (fan0-fan8) + # Even though there are 16 TACH inputs, only 9 have PWM control + NUM_FANS = 9 + + # EVB has 16 ADC channels enabled (ADC0 + ADC1) + NUM_THERMAL_SENSORS = 16 + + def __init__(self): + """ + Initialize the Chassis object + """ + super().__init__() + + # Initialize watchdog + self._watchdog = Watchdog() + + # Initialize thermal sensors (16 ADC channels) + self._thermal_list = [] + for i in range(self.NUM_THERMAL_SENSORS): + thermal = Thermal(i) + self._thermal_list.append(thermal) + + # Initialize fans (16 TACH inputs) + self._fan_list = [] + for i in range(self.NUM_FANS): + fan = Fan(i) + self._fan_list.append(fan) + + # Initialize fan drawers (wrap each fan in a virtual drawer for thermalctld) + # thermalctld reads fans from fan drawers, not directly from chassis + self._fan_drawer_list = [] + for i in range(self.NUM_FANS): + fan_drawer = FanDrawer(i, self._fan_list[i]) + self._fan_drawer_list.append(fan_drawer) + + def _read_watchdog_bootstatus(self, path): + """ + Read watchdog bootstatus value from sysfs + + Args: + path: Path to the bootstatus file + + Returns: + Integer value of bootstatus, or 0 if file doesn't exist or can't be read + """ + try: + with open(path, 'r') as f: + value = f.read().strip() + return int(value) + except (IOError, OSError, ValueError): + return 0 + + def get_reboot_cause(self): + """ + Retrieves the cause of the previous reboot + + This method reads the watchdog bootstatus register to determine + the hardware reboot cause. The AST2700 BMC has two watchdog timers, + and we check watchdog0 for the reboot cause. + + Returns: + A tuple (string, string) where the first element is a string + containing the cause of the previous reboot. This string must be + one of the predefined strings in ChassisBase. If the first string + is "REBOOT_CAUSE_HARDWARE_OTHER", the second string can be used + to pass a description of the reboot cause. + + Reboot cause mapping: + - WDIOF_OVERHEAT (0x01): Thermal overload + - WDIOF_FANFAULT (0x02): Insufficient fan speed + - WDIOF_POWERUNDER (0x10): Power loss + - WDIOF_POWEROVER (0x40): Power over voltage + - WDIOF_CARDRESET (0x20): Normal reboot/reset + - Other bits: Hardware other + - No bits set: Non-hardware (software reboot) + """ + # Read watchdog0 bootstatus + bootstatus = self._read_watchdog_bootstatus(WATCHDOG0_BOOTSTATUS_PATH) + + # Map bootstatus bits to reboot causes + # Check in order of priority (most specific first) + + if bootstatus & WDIOF_OVERHEAT: + return (self.REBOOT_CAUSE_THERMAL_OVERLOAD_CPU, "CPU Overheat") + + if bootstatus & WDIOF_FANFAULT: + return (self.REBOOT_CAUSE_INSUFFICIENT_FAN_SPEED, "Fan Fault") + + if bootstatus & WDIOF_POWERUNDER: + return (self.REBOOT_CAUSE_POWER_LOSS, "Power Under Voltage") + + if bootstatus & WDIOF_POWEROVER: + return (self.REBOOT_CAUSE_POWER_LOSS, "Power Over Voltage") + + if bootstatus & WDIOF_CARDRESET: + # CARDRESET can indicate either: + # 1. Watchdog timeout reset (no software reboot cause file) + # 2. Normal software reboot (software reboot cause file exists) + # Check if software reboot cause exists + try: + with open('/host/reboot-cause/reboot-cause.txt', 'r') as f: + software_cause = f.read().strip() + if software_cause and not software_cause.startswith('Unknown'): + # Software initiated reboot + return (self.REBOOT_CAUSE_NON_HARDWARE, None) + except (IOError, OSError): + pass + + # No software reboot cause found - assume watchdog timeout + return (self.REBOOT_CAUSE_WATCHDOG, "Watchdog timeout reset") + + if bootstatus & (WDIOF_EXTERN1 | WDIOF_EXTERN2): + return (self.REBOOT_CAUSE_HARDWARE_OTHER, f"External Reset (bootstatus=0x{bootstatus:x})") + + # If no specific bits are set, or only unknown bits are set + if bootstatus == 0: + # No hardware reboot cause detected + return (self.REBOOT_CAUSE_NON_HARDWARE, None) + else: + # Unknown bootstatus bits + return (self.REBOOT_CAUSE_HARDWARE_OTHER, f"Unknown (bootstatus=0x{bootstatus:x})") + + def get_name(self): + """ + Retrieves the name of the chassis + + Returns: + String containing the name of the chassis + """ + return "AST2700-BMC" + + def get_model(self): + """ + Retrieves the model number (or part number) of the chassis + + Returns: + String containing the model number of the chassis + """ + return "AST2700" + + def get_serial(self): + """ + Retrieves the serial number of the chassis + + Returns: + String containing the serial number of the chassis + """ + return "N/A" + + def get_watchdog(self): + """ + Retrieves the hardware watchdog device on this chassis + + Returns: + An object derived from WatchdogBase representing the hardware + watchdog device + """ + return self._watchdog + + def get_num_thermals(self): + """ + Retrieves the number of thermal sensors available on this chassis + + Returns: + An integer, the number of thermal sensors available on this chassis + """ + return len(self._thermal_list) + + def get_all_thermals(self): + """ + Retrieves all thermal sensors available on this chassis + + Returns: + A list of objects derived from ThermalBase representing all thermal + sensors available on this chassis + """ + return self._thermal_list + + def get_thermal(self, index): + """ + Retrieves thermal sensor represented by (0-based) index + + Args: + index: An integer, the index (0-based) of the thermal sensor to retrieve + + Returns: + An object derived from ThermalBase representing the specified thermal + sensor, or None if index is out of range + """ + if index < 0 or index >= len(self._thermal_list): + return None + return self._thermal_list[index] + + def get_num_fans(self): + """ + Retrieves the number of fans available on this chassis + + Returns: + An integer, the number of fans available on this chassis + """ + return len(self._fan_list) + + def get_all_fans(self): + """ + Retrieves all fan modules available on this chassis + + Returns: + A list of objects derived from FanBase representing all fan + modules available on this chassis + """ + return self._fan_list + + def get_fan(self, index): + """ + Retrieves fan module represented by (0-based) index + + Args: + index: An integer, the index (0-based) of the fan module to retrieve + + Returns: + An object derived from FanBase representing the specified fan + module, or None if index is out of range + """ + if index < 0 or index >= len(self._fan_list): + return None + return self._fan_list[index] + diff --git a/platform/aspeed/sonic-platform-modules-ast-evb/ast2700/sonic_platform/fan.py b/platform/aspeed/sonic-platform-modules-ast-evb/ast2700/sonic_platform/fan.py new file mode 100644 index 00000000000..d08beb7ff3e --- /dev/null +++ b/platform/aspeed/sonic-platform-modules-ast-evb/ast2700/sonic_platform/fan.py @@ -0,0 +1,293 @@ +""" +SONiC Platform API - Fan class for Aspeed BMC + +This module provides the Fan class for Aspeed AST2700 BMC platform. +Fans are controlled via PWM and monitored via TACH inputs. +""" + +import os + +try: + from sonic_platform_base.fan_base import FanBase +except ImportError as e: + raise ImportError(str(e) + " - required module not found") + + +class Fan(FanBase): + """ + Fan class for Aspeed AST2700 BMC platform + + The AST2700 supports: + - 16 TACH inputs for fan speed monitoring (hwmon0) + - 9 PWM outputs for fan speed control (hwmon1-9) + """ + + # Base paths for fan devices + TACH_HWMON_PATH = "/sys/class/hwmon/hwmon0" # aspeed_tach + PWM_HWMON_BASE = "/sys/class/hwmon/hwmon" # pwm-fan devices (hwmon1-9) + + # PWM range (0-255) + PWM_MAX = 255 + + def __init__(self, fan_index, is_psu_fan=False): + """ + Initialize a Fan object + + Args: + fan_index: 0-based index of the fan (0-15 for TACH, 0-8 for PWM) + is_psu_fan: True if this is a PSU fan, False otherwise + """ + FanBase.__init__(self) + + self.index = fan_index + self.is_psu_fan = is_psu_fan + self.name = f"Fan{fan_index + 1}" + + # TACH input path (1-based in sysfs) + self.tach_input_path = os.path.join( + self.TACH_HWMON_PATH, + f"fan{fan_index + 1}_input" + ) + + # PWM control path (for fans 0-8, maps to hwmon1-9) + # pwm-fan0 -> hwmon8, pwm-fan1 -> hwmon9, pwm-fan2 -> hwmon1, etc. + # We'll need to find the correct hwmon device + self.pwm_path = None + if fan_index < 9: + self._find_pwm_path(fan_index) + + def _find_pwm_path(self, fan_index): + """ + Find the PWM control path for this fan + + Args: + fan_index: 0-based fan index + """ + # Search for the pwm-fan device + for hwmon_num in range(1, 10): + hwmon_path = f"{self.PWM_HWMON_BASE}{hwmon_num}" + device_path = os.path.join(hwmon_path, "device") + + try: + # Read the device name + device_name = os.path.basename(os.readlink(device_path)) + if device_name == f"pwm-fan{fan_index}": + self.pwm_path = os.path.join(hwmon_path, "pwm1") + return + except (OSError, IOError): + continue + + def _read_sysfs_file(self, path): + """ + Read a value from a sysfs file + + Args: + path: Path to the sysfs file + + Returns: + String value from the file, or None if read fails + """ + try: + with open(path, 'r') as f: + return f.read().strip() + except (IOError, OSError): + return None + + def _write_sysfs_file(self, path, value): + """ + Write a value to a sysfs file + + Args: + path: Path to the sysfs file + value: Value to write + + Returns: + True if write succeeds, False otherwise + """ + try: + with open(path, 'w') as f: + f.write(str(value)) + return True + except (IOError, OSError): + return False + + def get_name(self): + """ + Retrieves the name of the fan + + Returns: + String containing the name of the fan + """ + return self.name + + def get_presence(self): + """ + Retrieves the presence of the fan + + Returns: + True if fan is present, False if not + """ + # On BMC, fans are always "present" if the TACH input exists + return os.path.exists(self.tach_input_path) + + def get_model(self): + """ + Retrieves the model of the fan + + Returns: + String containing the model of the fan + """ + return "AST2700-FAN" + + def get_serial(self): + """ + Retrieves the serial number of the fan + + Returns: + String containing the serial number of the fan + """ + return "N/A" + + def get_status(self): + """ + Retrieves the operational status of the fan + + Returns: + True if fan is operating properly, False if not + """ + # Fan is operational if it's present and speed can be read + if not self.get_presence(): + return False + + speed_rpm = self.get_speed_rpm() + return speed_rpm is not None + + def get_direction(self): + """ + Retrieves the direction of fan + + Returns: + A string, either FAN_DIRECTION_INTAKE or FAN_DIRECTION_EXHAUST + depending on fan direction + """ + # BMC fans don't have direction detection on EVB + return self.FAN_DIRECTION_NOT_APPLICABLE + + def get_speed_rpm(self): + """ + Retrieves the speed of fan in RPM + + Returns: + An integer, the fan speed in RPM, or None if not available + """ + value_str = self._read_sysfs_file(self.tach_input_path) + if value_str is None: + return None + + try: + return int(value_str) + except ValueError: + return None + + def get_speed(self): + """ + Retrieves the speed of fan as a percentage of full speed + + Returns: + An integer, the percentage of full fan speed, in the range 0 (off) + to 100 (full speed) + """ + # Get current PWM value + if self.pwm_path is None or not os.path.exists(self.pwm_path): + # If no PWM control, estimate from RPM + # Assume max speed is 10000 RPM (platform-specific) + rpm = self.get_speed_rpm() + if rpm is None: + return 0 + max_rpm = 10000 + speed_percent = min(100, int((rpm * 100) / max_rpm)) + return speed_percent + + pwm_str = self._read_sysfs_file(self.pwm_path) + if pwm_str is None: + return 0 + + try: + pwm_value = int(pwm_str) + # Convert PWM (0-255) to percentage (0-100) + return int((pwm_value * 100) / self.PWM_MAX) + except ValueError: + return 0 + + def get_target_speed(self): + """ + Retrieves the target (expected) speed of the fan + + Returns: + An integer, the percentage of full fan speed, in the range 0 (off) + to 100 (full speed) + """ + # Target speed is the same as current speed (no separate target register) + return self.get_speed() + + def get_speed_tolerance(self): + """ + Retrieves the speed tolerance of the fan + + Returns: + An integer, the percentage of variance from target speed which is + considered tolerable + """ + # Default tolerance of 20% + return 20 + + def set_speed(self, speed): + """ + Sets the fan speed + + Args: + speed: An integer, the percentage of full fan speed to set fan to, + in the range 0 (off) to 100 (full speed) + + Returns: + A boolean, True if speed is set successfully, False if not + """ + if self.is_psu_fan: + # PSU fans are controlled by the PSU itself + return False + + if speed < 0 or speed > 100: + return False + + if self.pwm_path is None or not os.path.exists(self.pwm_path): + return False + + # Convert percentage (0-100) to PWM value (0-255) + pwm_value = int((speed * self.PWM_MAX) / 100) + + return self._write_sysfs_file(self.pwm_path, pwm_value) + + def set_status_led(self, color): + """ + Sets the state of the fan status LED + + Args: + color: A string representing the color with which to set the + fan status LED + + Returns: + bool: True if status LED state is set successfully, False if not + """ + # BMC fans don't have individual status LEDs + return False + + def get_status_led(self): + """ + Gets the state of the fan status LED + + Returns: + A string, one of the predefined STATUS_LED_COLOR_* strings + """ + # BMC fans don't have individual status LEDs + return self.STATUS_LED_COLOR_OFF + diff --git a/platform/aspeed/sonic-platform-modules-ast-evb/ast2700/sonic_platform/fan_drawer.py b/platform/aspeed/sonic-platform-modules-ast-evb/ast2700/sonic_platform/fan_drawer.py new file mode 100644 index 00000000000..7e89313aeec --- /dev/null +++ b/platform/aspeed/sonic-platform-modules-ast-evb/ast2700/sonic_platform/fan_drawer.py @@ -0,0 +1,138 @@ +#!/usr/bin/env python3 + +""" +fan_drawer.py + +Implementation of FanDrawer class for Aspeed AST2700 BMC platform. +Since BMC platforms typically don't have physical fan drawers/trays, +we create virtual fan drawers with one fan each to satisfy SONiC's +thermalctld requirements. +""" + +try: + from sonic_platform_base.fan_drawer_base import FanDrawerBase +except ImportError as e: + raise ImportError(str(e) + " - required module not found") + + +class FanDrawer(FanDrawerBase): + """ + Platform-specific FanDrawer class for Aspeed AST2700 BMC. + + Each FanDrawer represents a virtual drawer containing a single fan. + This is required because thermalctld reads fans from fan drawers, + not directly from the chassis. + """ + + def __init__(self, drawer_index, fan): + """ + Initialize a FanDrawer with a single fan. + + Args: + drawer_index: 0-based index of this fan drawer + fan: Fan object to be contained in this drawer + """ + FanDrawerBase.__init__(self) + self._drawer_index = drawer_index + self._fan_list.append(fan) + + def get_name(self): + """ + Retrieves the fan drawer name. + + Returns: + string: The name of the fan drawer (e.g., "FanDrawer1") + """ + return "FanDrawer{}".format(self._drawer_index + 1) + + def get_presence(self): + """ + Retrieves the presence of the fan drawer. + + Returns: + bool: True if fan drawer is present, False otherwise + """ + # Virtual fan drawers are always present + return True + + def get_status(self): + """ + Retrieves the operational status of the fan drawer. + + Returns: + bool: True if fan drawer is operating properly, False otherwise + """ + # Fan drawer status is based on the contained fan's status + if len(self._fan_list) > 0: + return self._fan_list[0].get_status() + return False + + def get_model(self): + """ + Retrieves the model number of the fan drawer. + + Returns: + string: Model number of the fan drawer + """ + return "N/A" + + def get_serial(self): + """ + Retrieves the serial number of the fan drawer. + + Returns: + string: Serial number of the fan drawer + """ + return "N/A" + + def get_status_led(self): + """ + Gets the state of the fan drawer LED. + + Returns: + string: One of the STATUS_LED_COLOR_* strings (GREEN, RED, etc.) + """ + return "N/A" + + def set_status_led(self, color): + """ + Sets the state of the fan drawer LED. + + Args: + color: A string representing the color with which to set the LED + + Returns: + bool: True if LED state is set successfully, False otherwise + """ + # LED control not supported on BMC platform + return False + + def get_maximum_consumed_power(self): + """ + Retrieves the maximum power drawn by the fan drawer. + + Returns: + float: Maximum power consumption in watts + """ + # Typical BMC fan power consumption + return 5.0 + + def is_replaceable(self): + """ + Indicate whether this fan drawer is replaceable. + + Returns: + bool: True if replaceable, False otherwise + """ + # Virtual fan drawers are not physically replaceable + return False + + def get_position_in_parent(self): + """ + Retrieves the 1-based relative physical position in parent device. + + Returns: + integer: The 1-based relative physical position in parent device + """ + return self._drawer_index + 1 + diff --git a/platform/aspeed/sonic-platform-modules-ast-evb/ast2700/sonic_platform/platform.py b/platform/aspeed/sonic-platform-modules-ast-evb/ast2700/sonic_platform/platform.py new file mode 100644 index 00000000000..8ce51d8b1fc --- /dev/null +++ b/platform/aspeed/sonic-platform-modules-ast-evb/ast2700/sonic_platform/platform.py @@ -0,0 +1,34 @@ +#!/usr/bin/env python3 +# +# platform.py +# +# Platform implementation for Aspeed AST2700 EVB +# + +try: + from sonic_platform.chassis import Chassis +except ImportError as e: + raise ImportError(str(e) + " - required module not found") + +class Platform: + """ + Platform class for Aspeed AST2700 EVB + + Provides access to chassis-level functionality. + """ + + def __init__(self): + """ + Initialize the Platform object + """ + self._chassis = Chassis() + + def get_chassis(self): + """ + Retrieves the chassis object + + Returns: + An object derived from ChassisBase representing the chassis + """ + return self._chassis + diff --git a/platform/aspeed/sonic-platform-modules-ast-evb/ast2700/sonic_platform/thermal.py b/platform/aspeed/sonic-platform-modules-ast-evb/ast2700/sonic_platform/thermal.py new file mode 100644 index 00000000000..655da029d1d --- /dev/null +++ b/platform/aspeed/sonic-platform-modules-ast-evb/ast2700/sonic_platform/thermal.py @@ -0,0 +1,207 @@ +""" +SONiC Platform API - Thermal class for Aspeed BMC + +This module provides the Thermal class for Aspeed AST2700 BMC platform. +Thermal sensors are exposed via the IIO-HWMON bridge from ADC channels. +""" + +import os + +try: + from sonic_platform_base.thermal_base import ThermalBase +except ImportError as e: + raise ImportError(str(e) + " - required module not found") + + +class Thermal(ThermalBase): + """ + Thermal sensor class for Aspeed AST2700 BMC platform + + Reads temperature/voltage values from ADC channels exposed via iio-hwmon. + The AST2700 has 16 ADC channels available for monitoring. + """ + + # Base path for IIO-HWMON device + HWMON_IIO_PATH = "/sys/class/hwmon/hwmon10" + + def __init__(self, thermal_index): + """ + Initialize a Thermal object + + Args: + thermal_index: 0-based index of the thermal sensor (0-15 for 16 ADC channels) + """ + ThermalBase.__init__(self) + + self.index = thermal_index + self.name = f"ADC{thermal_index + 1}" + + # ADC channel input file (1-based in sysfs) + self.thermal_input_path = os.path.join( + self.HWMON_IIO_PATH, + f"in{thermal_index + 1}_input" + ) + + def _read_sysfs_file(self, path): + """ + Read a value from a sysfs file + + Args: + path: Path to the sysfs file + + Returns: + String value from the file, or None if read fails + """ + try: + with open(path, 'r') as f: + return f.read().strip() + except (IOError, OSError): + return None + + def get_name(self): + """ + Retrieves the name of the thermal sensor + + Returns: + String containing the name of the thermal sensor + """ + return self.name + + def get_presence(self): + """ + Retrieves the presence of the thermal sensor + + Returns: + True if thermal sensor is present, False if not + """ + # ADC channels are always present on the BMC + return os.path.exists(self.thermal_input_path) + + def get_model(self): + """ + Retrieves the model of the thermal sensor + + Returns: + String containing the model of the thermal sensor + """ + return "AST2700-ADC" + + def get_serial(self): + """ + Retrieves the serial number of the thermal sensor + + Returns: + String containing the serial number of the thermal sensor + """ + return "N/A" + + def get_status(self): + """ + Retrieves the operational status of the thermal sensor + + Returns: + True if thermal sensor is operating properly, False if not + """ + return self.get_presence() and self.get_temperature() is not None + + def get_temperature(self): + """ + Retrieves current temperature reading from thermal sensor + + Returns: + A float number of current temperature in Celsius up to nearest + thousandth of one degree Celsius, e.g. 30.125 + + Note: + ADC channels return millivolts. For actual temperature sensors, + the voltage needs to be converted based on the sensor type. + For now, we return the raw millivolt value divided by 1000 as + a placeholder. Platform-specific implementations should override + this with proper temperature conversion formulas. + """ + value_str = self._read_sysfs_file(self.thermal_input_path) + if value_str is None: + return None + + try: + # ADC returns millivolts, convert to a temperature-like value + # This is a placeholder - actual conversion depends on sensor type + millivolts = float(value_str) + # For demonstration, just return mV/10 as "temperature" + # Real implementation would use proper sensor calibration + return millivolts / 10.0 + except ValueError: + return None + + def get_high_threshold(self): + """ + Retrieves the high threshold temperature of thermal sensor + + Returns: + A float number, the high threshold temperature of thermal in + Celsius up to nearest thousandth of one degree Celsius + """ + # Default threshold - should be configured per platform + return 85.0 + + def get_low_threshold(self): + """ + Retrieves the low threshold temperature of thermal sensor + + Returns: + A float number, the low threshold temperature of thermal in + Celsius up to nearest thousandth of one degree Celsius + """ + # Default threshold - should be configured per platform + return 0.0 + + def get_high_critical_threshold(self): + """ + Retrieves the high critical threshold temperature of thermal sensor + + Returns: + A float number, the high critical threshold temperature of thermal + in Celsius up to nearest thousandth of one degree Celsius + """ + # Default threshold - should be configured per platform + return 100.0 + + def get_low_critical_threshold(self): + """ + Retrieves the low critical threshold temperature of thermal sensor + + Returns: + A float number, the low critical threshold temperature of thermal + in Celsius up to nearest thousandth of one degree Celsius + """ + # Default threshold - should be configured per platform + return -10.0 + + def set_high_threshold(self, temperature): + """ + Sets the high threshold temperature of thermal sensor + + Args: + temperature: A float number up to nearest thousandth of one degree + Celsius, e.g. 30.125 + + Returns: + A boolean, True if threshold is set successfully, False if not + """ + # ADC channels don't support setting thresholds via sysfs + return False + + def set_low_threshold(self, temperature): + """ + Sets the low threshold temperature of thermal sensor + + Args: + temperature: A float number up to nearest thousandth of one degree + Celsius, e.g. 30.125 + + Returns: + A boolean, True if threshold is set successfully, False if not + """ + # ADC channels don't support setting thresholds via sysfs + return False + diff --git a/platform/aspeed/sonic-platform-modules-ast-evb/ast2700/sonic_platform/watchdog.py b/platform/aspeed/sonic-platform-modules-ast-evb/ast2700/sonic_platform/watchdog.py new file mode 100644 index 00000000000..d24e29733e6 --- /dev/null +++ b/platform/aspeed/sonic-platform-modules-ast-evb/ast2700/sonic_platform/watchdog.py @@ -0,0 +1,211 @@ +""" +SONiC Platform API - Watchdog class for Aspeed BMC + +This module provides the Watchdog class for Aspeed AST2700 BMC platform. +""" + +import os +import fcntl +import array +import ctypes + +try: + from sonic_platform_base.watchdog_base import WatchdogBase +except ImportError as e: + raise ImportError(str(e) + " - required module not found") + + +# Watchdog ioctl commands (from Linux kernel watchdog.h) +WDIOC_GETSUPPORT = 0x80285700 +WDIOC_GETSTATUS = 0x80045701 +WDIOC_GETBOOTSTATUS = 0x80045702 +WDIOC_GETTEMP = 0x80045703 +WDIOC_SETOPTIONS = 0x80045704 +WDIOC_KEEPALIVE = 0x80045705 +WDIOC_SETTIMEOUT = 0xc0045706 +WDIOC_GETTIMEOUT = 0x80045707 +WDIOC_SETPRETIMEOUT = 0xc0045708 +WDIOC_GETPRETIMEOUT = 0x80045709 +WDIOC_GETTIMELEFT = 0x8004570a + +# Watchdog options +WDIOS_DISABLECARD = 0x0001 +WDIOS_ENABLECARD = 0x0002 + +# Default watchdog device +WATCHDOG_DEVICE = "/dev/watchdog0" + +# Sysfs paths for AST2700 watchdog +WATCHDOG_SYSFS_PATH = "/sys/class/watchdog/watchdog0/" + + +class Watchdog(WatchdogBase): + """ + Watchdog class for Aspeed AST2700 BMC platform + + Provides hardware watchdog functionality using the aspeed_wdt driver. + """ + + def __init__(self): + """ + Initialize the Watchdog object + """ + self.watchdog_device = WATCHDOG_DEVICE + self.watchdog_fd = None + self.timeout = 0 + + def _read_sysfs_int(self, filename): + """ + Read an integer value from sysfs + + Args: + filename: Name of the file in WATCHDOG_SYSFS_PATH + + Returns: + Integer value, or -1 on error + """ + try: + with open(os.path.join(WATCHDOG_SYSFS_PATH, filename), 'r') as f: + return int(f.read().strip()) + except (IOError, OSError, ValueError): + return -1 + + def _read_sysfs_str(self, filename): + """ + Read a string value from sysfs + + Args: + filename: Name of the file in WATCHDOG_SYSFS_PATH + + Returns: + String value, or empty string on error + """ + try: + with open(os.path.join(WATCHDOG_SYSFS_PATH, filename), 'r') as f: + return f.read().strip() + except (IOError, OSError): + return "" + + def _open_watchdog(self): + """ + Open the watchdog device file + + Returns: + True if successful, False otherwise + """ + if self.watchdog_fd is None: + try: + self.watchdog_fd = os.open(self.watchdog_device, os.O_WRONLY) + except (IOError, OSError): + return False + return True + + def _disablewatchdog(self): + """ + Turn off the watchdog timer + """ + req = array.array('I', [WDIOS_DISABLECARD]) + fcntl.ioctl(self.watchdog_fd, WDIOC_SETOPTIONS, req, False) + + def _enablewatchdog(self): + """ + Turn on the watchdog timer + """ + req = array.array('I', [WDIOS_ENABLECARD]) + fcntl.ioctl(self.watchdog_fd, WDIOC_SETOPTIONS, req, False) + + def _keepalive(self): + """ + Keep alive watchdog timer + """ + fcntl.ioctl(self.watchdog_fd, WDIOC_KEEPALIVE) + + def _settimeout(self, seconds): + """ + Set watchdog timer timeout + @param seconds - timeout in seconds + @return is the actual set timeout + """ + req = array.array('I', [seconds]) + fcntl.ioctl(self.watchdog_fd, WDIOC_SETTIMEOUT, req, True) + + return int(req[0]) + + def _gettimeout(self): + """ + Get watchdog timeout + @return watchdog timeout + """ + return self._read_sysfs_int("timeout") + + def is_armed(self): + """ + Retrieves the armed state of the hardware watchdog + + Returns: + A boolean, True if watchdog is armed, False if not + """ + # Check the state from sysfs + state = self._read_sysfs_str("state") + if (state != 'inactive'): + return True + else: + return False + + def arm(self, seconds): + """ + Arm the hardware watchdog with a timeout of seconds + + Args: + seconds: Timeout value in seconds + + Returns: + An integer specifying the actual number of seconds the watchdog + was armed with. On failure returns -1. + """ + if (seconds < 0 or seconds > 300 ): + return -1 + + if not self._open_watchdog(): + return -1 + try: + if self.timeout != seconds: + self.timeout = self._settimeout(seconds) + if self.is_armed(): + self._keepalive() + else: + self._enablewatchdog() + except (IOError, OSError): + return -1 + + return self.timeout + + def disarm(self): + """ + Disarm the hardware watchdog + + Returns: + A boolean, True if watchdog is disarmed successfully, False if not + """ + if not self._open_watchdog(): + return False + + try: + self._disablewatchdog() + self.timeout = 0 + + except (IOError, OSError): + return False + + return True + + def get_remaining_time(self): + """ + Get the number of seconds remaining on the watchdog timer + + Returns: + An integer specifying the number of seconds remaining on the + watchdog timer. If the watchdog is not armed, returns -1. + """ + return -1 + diff --git a/platform/aspeed/sonic-platform-modules-ast-evb/debian/changelog b/platform/aspeed/sonic-platform-modules-ast-evb/debian/changelog new file mode 100644 index 00000000000..3d89c1cffc1 --- /dev/null +++ b/platform/aspeed/sonic-platform-modules-ast-evb/debian/changelog @@ -0,0 +1,5 @@ +sonic-platform-ast-evb (1.0) unstable; urgency=low + + * Initial release + + -- Aspeed Technology Inc. Mon, 17 Feb 2025 00:00:00 +0000 diff --git a/platform/aspeed/sonic-platform-modules-ast-evb/debian/control b/platform/aspeed/sonic-platform-modules-ast-evb/debian/control new file mode 100644 index 00000000000..c9889248be6 --- /dev/null +++ b/platform/aspeed/sonic-platform-modules-ast-evb/debian/control @@ -0,0 +1,13 @@ +Source: sonic-platform-ast-evb +Section: misc +Priority: optional +Maintainer: Aspeed Technology Inc. +Build-Depends: debhelper-compat (= 13), dh-python, python3-all, python3-setuptools, python3-wheel +Standards-Version: 3.9.6 + +Package: sonic-platform-ast-evb-ast2700 +Architecture: arm64 +Depends: ${misc:Depends}, ${python3:Depends} +Description: SONiC platform support for Aspeed AST2700 EVB + This package provides platform-specific implementation for Aspeed's + AST2700 EVB platform. diff --git a/platform/aspeed/sonic-platform-modules-ast-evb/debian/rules b/platform/aspeed/sonic-platform-modules-ast-evb/debian/rules new file mode 100755 index 00000000000..37d206906ef --- /dev/null +++ b/platform/aspeed/sonic-platform-modules-ast-evb/debian/rules @@ -0,0 +1,27 @@ +#!/usr/bin/make -f + +PACKAGE_PRE_NAME := sonic-platform-ast-evb +MODULE_DIRS := ast2700 + +%: + dh $@ --with python3 --buildsystem=pybuild + +override_dh_auto_build: + # Build the vendor-specific platform wheel + python3 setup.py bdist_wheel -d $(CURDIR) + +override_dh_auto_install: + set -e + (for mod in $(MODULE_DIRS); do \ + pkg_name=$(PACKAGE_PRE_NAME)-$${mod}; \ + device_name=arm64-aspeed_$${mod}_evb-r0; \ + dh_installdirs -p$${pkg_name} usr/share/sonic/device/$${device_name}/; \ + dh_install -p$${pkg_name} sonic_platform-1.0-py3-none-any.whl usr/share/sonic/device/$${device_name}/; \ + done) + +override_dh_auto_test: + +override_dh_clean: + dh_clean + rm -f *.whl + rm -rf build dist *.egg-info diff --git a/platform/aspeed/sonic-platform-modules-ast-evb/debian/sonic-platform-ast-evb-ast2700.postinst b/platform/aspeed/sonic-platform-modules-ast-evb/debian/sonic-platform-ast-evb-ast2700.postinst new file mode 100755 index 00000000000..8a44d702f3b --- /dev/null +++ b/platform/aspeed/sonic-platform-modules-ast-evb/debian/sonic-platform-ast-evb-ast2700.postinst @@ -0,0 +1,22 @@ +#!/bin/bash +set -e + +case "$1" in + configure) + if [ -f /host/machine.conf ]; then + . /host/machine.conf + DEVICE_NAME="$onie_platform" + else + echo "Warning: /host/machine.conf not found, cannot determine platform. Hardcoding to arm64-aspeed_ast2700_evb-r0" + DEVICE_NAME="arm64-aspeed_ast2700_evb-r0" + fi + DEVICE_DIR="/usr/share/sonic/device/${DEVICE_NAME}" + if [ -f "${DEVICE_DIR}"/*.whl ]; then + # Force reinstall to ensure this platform's wheel is installed + #pip3 install --force-reinstall --no-deps "${DEVICE_DIR}"/*.whl + fi + ;; +esac + +#DEBHELPER# +exit 0 diff --git a/platform/aspeed/sonic-platform-modules-ast-evb/setup.py b/platform/aspeed/sonic-platform-modules-ast-evb/setup.py new file mode 100644 index 00000000000..a06fa2f861a --- /dev/null +++ b/platform/aspeed/sonic-platform-modules-ast-evb/setup.py @@ -0,0 +1,30 @@ +import os +from setuptools import setup + +setup( + name="sonic-platform", + version="1.0", + description="SONiC platform API implementation on Aspeed EVB Platforms", + license="Apache 2.0", + author="Aspeed Technology Inc.", + author_email="opensource@aspeedtech.com", + url="https://github.com/AspeedTech-BMC/sonic-buildimage", + packages=["sonic_platform"], + package_dir={ + "sonic_platform": "ast2700/sonic_platform", + }, + classifiers=[ + "Development Status :: 3 - Alpha", + "Environment :: Plugins", + "Intended Audience :: Developers", + "Intended Audience :: Information Technology", + "Intended Audience :: System Administrators", + "License :: OSI Approved :: Apache Software License", + "Natural Language :: English", + "Operating System :: POSIX :: Linux", + "Programming Language :: Python :: 3.11", + "Topic :: Utilities", + ], + keywords="sonic SONiC platform PLATFORM aspeed bmc", +) + diff --git a/platform/aspeed/sonic-platform-modules-nexthop/b27/scripts/bmc_host_monitor.py b/platform/aspeed/sonic-platform-modules-nexthop/b27/scripts/bmc_host_monitor.py new file mode 100755 index 00000000000..2d58fb83140 --- /dev/null +++ b/platform/aspeed/sonic-platform-modules-nexthop/b27/scripts/bmc_host_monitor.py @@ -0,0 +1,196 @@ +#!/usr/bin/env python3 +""" +BMC Host Request Monitor + +Monitors Redis STATE_DB for host transition requests and executes +the corresponding switch CPU control commands. + +Flow: +1. Monitor BMC_HOST_REQUEST in Redis STATE_DB (db 6) +2. When status is "pending", read requested_transition +3. Execute switch_cpu_utils.sh with the transition command +4. Update status to "completed" or "failed" +""" + +import redis +import subprocess +import time +import logging +import sys +import os +from datetime import datetime + +# Configuration +REDIS_HOST = 'localhost' +REDIS_PORT = 6379 +REDIS_DB = 6 # STATE_DB +REDIS_KEY = 'BMC_HOST_REQUEST' +POLL_INTERVAL = 0.5 # seconds +SCRIPT_PATH = '/usr/local/bin/switch_cpu_utils.sh' + +# Logging setup +logging.basicConfig( + level=logging.INFO, + format='%(asctime)s - %(name)s - %(levelname)s - %(message)s', + handlers=[ + logging.StreamHandler(sys.stdout), + logging.FileHandler('/var/log/bmc_host_monitor.log') + ] +) +logger = logging.getLogger('bmc_host_monitor') + + +class BMCHostMonitor: + """Monitor Redis for host transition requests and execute them""" + + def __init__(self): + """Initialize Redis connection""" + self.redis_client = None + self.last_request_id = None + self.connect_redis() + + def connect_redis(self): + """Connect to Redis STATE_DB""" + try: + self.redis_client = redis.Redis( + host=REDIS_HOST, + port=REDIS_PORT, + db=REDIS_DB, + decode_responses=True, + socket_connect_timeout=5, + socket_timeout=5 + ) + # Test connection + self.redis_client.ping() + logger.info(f"Connected to Redis STATE_DB (db {REDIS_DB})") + except redis.ConnectionError as e: + logger.error(f"Failed to connect to Redis: {e}") + raise + + def get_host_request(self): + """Get current host request from Redis""" + try: + request = self.redis_client.hgetall(REDIS_KEY) + return request if request else None + except redis.RedisError as e: + logger.error(f"Failed to read from Redis: {e}") + return None + + def update_request_status(self, status, error_msg=None): + """Update the status of the current request""" + try: + updates = { + 'status': status, + 'timestamp': str(int(time.time() * 1e9)) # nanoseconds + } + if error_msg: + updates['error'] = error_msg + + self.redis_client.hset(REDIS_KEY, mapping=updates) + logger.info(f"Updated request status to: {status}") + except redis.RedisError as e: + logger.error(f"Failed to update Redis: {e}") + + def execute_transition(self, transition): + """Execute the switch CPU control script""" + if not os.path.exists(SCRIPT_PATH): + logger.error(f"Script not found: {SCRIPT_PATH}") + return False, f"Script not found: {SCRIPT_PATH}" + + cmd = [SCRIPT_PATH, transition] + logger.info(f"Executing: {' '.join(cmd)}") + + try: + result = subprocess.run( + cmd, + capture_output=True, + text=True, + timeout=30, + check=False + ) + + if result.returncode == 0: + logger.info(f"Command succeeded: {transition}") + logger.debug(f"Output: {result.stdout}") + return True, None + else: + error_msg = f"Command failed with exit code {result.returncode}: {result.stderr}" + logger.error(error_msg) + return False, error_msg + + except subprocess.TimeoutExpired: + error_msg = f"Command timed out: {transition}" + logger.error(error_msg) + return False, error_msg + except Exception as e: + error_msg = f"Failed to execute command: {e}" + logger.error(error_msg) + return False, error_msg + + def process_request(self, request): + """Process a pending host request""" + request_id = request.get('request_id') + transition = request.get('requested_transition') + status = request.get('status') + + logger.info(f"Processing request: {request_id}, transition: {transition}, status: {status}") + + # Validate transition + valid_transitions = ['reset-out', 'reset-in', 'reset-cycle'] + if transition not in valid_transitions: + error_msg = f"Invalid transition: {transition}" + logger.error(error_msg) + self.update_request_status('failed', error_msg) + return + + # Execute the transition + success, error_msg = self.execute_transition(transition) + + # Update status + if success: + self.update_request_status('completed') + else: + self.update_request_status('failed', error_msg) + + def run(self): + """Main monitoring loop""" + logger.info("BMC Host Monitor started") + logger.info(f"Monitoring Redis key: {REDIS_KEY}") + logger.info(f"Script path: {SCRIPT_PATH}") + + while True: + try: + request = self.get_host_request() + + if request: + request_id = request.get('request_id') + status = request.get('status') + + # Process only new pending requests + if status == 'pending' and request_id != self.last_request_id: + self.last_request_id = request_id + self.process_request(request) + + time.sleep(POLL_INTERVAL) + + except KeyboardInterrupt: + logger.info("Received shutdown signal") + break + except Exception as e: + logger.error(f"Unexpected error in main loop: {e}", exc_info=True) + time.sleep(5) # Back off on errors + + +def main(): + """Entry point""" + try: + monitor = BMCHostMonitor() + monitor.run() + except Exception as e: + logger.error(f"Fatal error: {e}", exc_info=True) + sys.exit(1) + + +if __name__ == '__main__': + main() + diff --git a/platform/aspeed/sonic-platform-modules-nexthop/b27/scripts/generate_certificates.sh b/platform/aspeed/sonic-platform-modules-nexthop/b27/scripts/generate_certificates.sh new file mode 100755 index 00000000000..6d6afab3f94 --- /dev/null +++ b/platform/aspeed/sonic-platform-modules-nexthop/b27/scripts/generate_certificates.sh @@ -0,0 +1,532 @@ +#!/bin/bash +# +# Script to generate and install HTTPS certificates for SONiC BMC +# +# Modes: +# generate (default) — Generate certificates locally +# install — Install generated certificates into the redfish container +# +# Generates: +# CA-cert.pem, CA-key.pem — CA certificate and key +# server-cert.pem, server-key.pem — Server certificate and key +# server-combined.pem — Combined cert+key (for /etc/ssl/certs/https/server.pem) +# client-cert.pem, client-key.pem — Client certificate and key (stays on client) +# client-combined.pem — Combined client cert+key +# bmcweb_tls_config.json — bmcweb persistent data with TLSStrict +# +# BMC container paths: +# /etc/ssl/certs/https/server.pem — HTTPS server certificate (cert+key) +# /etc/ssl/certs/authority/.pem — CA certificates for client verification +# /bmcweb_persistent_data.json — bmcweb auth configuration +# +# Usage: +# Generate: +# ./generate_https_certificate.sh -c -i [options] +# +# Install: +# ./generate_https_certificate.sh --install --bmc-ip --bmc-pass [options] +# +# Required for generate: +# -i, --ip IP Server IP address for SAN +# +# Optional for generate: +# -c, --common-name CN Server Common Name (default: bmc.example.com) +# +# Required for install: +# --bmc-ip IP BMC IP address +# +# Optional for install: +# --bmc-pass PASS BMC SSH password (default: YourPaSsWoRd) +# +# Optional: +# -d, --dir DIR Working directory (default: current directory) +# --country CODE 2-letter country code (default: IN) +# --state STATE State or province (default: Karnataka) +# --city CITY City (default: Bengaluru) +# --org NAME Organization name (default: Nexthop AI) +# --ou OU Organizational unit (default: BMC) +# --client-cn CN Client Common Name for mTLS (default: bmcweb) +# --bmc-user USER BMC SSH user (default: admin) +# --container NAME Docker container name (default: redfish) +# -h, --help Show this help message +# + +set -e + +# Default values +WORK_DIR="$(pwd)" +SERVER_CN="bmc.example.com" +SERVER_IP="" +COUNTRY="IN" +STATE="Karnataka" +CITY="Bengaluru" +ORG="Nexthop AI" +OU="BMC" +CLIENT_CN="bmcweb" +INSTALL=false +BMC_IP="" +BMC_USER="admin" +BMC_PASS="YourPaSsWoRd" +CONTAINER="redfish" + +# Parse command line arguments +while [[ $# -gt 0 ]]; do + case $1 in + -d|--dir) + WORK_DIR="$2" + shift 2 + ;; + -c|--common-name) + SERVER_CN="$2" + shift 2 + ;; + -i|--ip) + SERVER_IP="$2" + shift 2 + ;; + --country) + COUNTRY="$2" + shift 2 + ;; + --state) + STATE="$2" + shift 2 + ;; + --city) + CITY="$2" + shift 2 + ;; + --org) + ORG="$2" + shift 2 + ;; + --ou) + OU="$2" + shift 2 + ;; + --client-cn) + CLIENT_CN="$2" + shift 2 + ;; + --install) + INSTALL=true + shift + ;; + --bmc-ip) + BMC_IP="$2" + shift 2 + ;; + --bmc-user) + BMC_USER="$2" + shift 2 + ;; + --bmc-pass) + BMC_PASS="$2" + shift 2 + ;; + --container) + CONTAINER="$2" + shift 2 + ;; + -h|--help) + grep '^#' "$0" | grep -v '#!/bin/bash' | sed 's/^# //' + exit 0 + ;; + *) + echo "Unknown option: $1" + echo "Use -h or --help for usage information" + exit 1 + ;; + esac +done + +TOTAL=8 + +# ========================================================================= +# INSTALL-ONLY MODE — skip generation, just install existing certs +# ========================================================================= + +if $INSTALL; then + cd "$WORK_DIR" + + # Validate install requirements + if [ -z "$BMC_IP" ]; then + echo "ERROR: Missing required option: --bmc-ip" + echo "Usage: $0 --install --bmc-ip [--bmc-pass ] [--bmc-user ] [--container ] [-d ]" + exit 1 + fi + + for f in server-combined.pem CA-cert.pem bmcweb_tls_config.json; do + if [ ! -f "$f" ]; then + echo "ERROR: $f not found in $WORK_DIR" + echo "Run without --install first to generate certificates." + exit 1 + fi + done + + # Check if SSH key auth works, otherwise require sshpass + if ssh -o StrictHostKeyChecking=no -o BatchMode=yes -o ConnectTimeout=5 "${BMC_USER}@${BMC_IP}" true 2>/dev/null; then + echo "Using SSH key authentication" + SCP="scp -o StrictHostKeyChecking=no" + SSH="ssh -o StrictHostKeyChecking=no" + elif command -v sshpass &>/dev/null; then + echo "Using sshpass for authentication" + export SSHPASS="$BMC_PASS" + SCP="sshpass -e scp -o StrictHostKeyChecking=no" + SSH="sshpass -e ssh -o StrictHostKeyChecking=no" + else + echo "ERROR: Cannot authenticate to BMC." + echo "" + echo "Either:" + echo " 1. Set up SSH key auth: ssh-copy-id ${BMC_USER}@${BMC_IP}" + echo " 2. Install sshpass: sudo apt install sshpass" + exit 1 + fi + + echo "===========================================================" + echo " INSTALLING CERTIFICATES" + echo "===========================================================" + echo "" + echo " Working dir: $WORK_DIR" + echo " BMC IP: $BMC_IP" + echo " BMC User: $BMC_USER" + echo " Container: $CONTAINER" + echo "" + + # --- Step 1: Install server certificate --- + echo "--- Step 1: Installing HTTPS server certificate ---" + echo "" + + echo " Copying server-combined.pem to BMC..." + $SCP server-combined.pem "${BMC_USER}@${BMC_IP}:/tmp/server-combined.pem" + + echo " Installing into container $CONTAINER:/etc/ssl/certs/https/server.pem..." + $SSH "${BMC_USER}@${BMC_IP}" "docker cp /tmp/server-combined.pem ${CONTAINER}:/etc/ssl/certs/https/server.pem" + + echo " Server certificate installed" + echo "" + + # --- Step 2: Install CA cert to truststore --- + echo "--- Step 2: Installing CA certificate to truststore ---" + echo "" + + echo " Copying CA-cert.pem to BMC..." + $SCP CA-cert.pem "${BMC_USER}@${BMC_IP}:/tmp/CA-cert.pem" + + echo " Creating truststore directory and installing CA cert..." + $SSH "${BMC_USER}@${BMC_IP}" " + docker exec ${CONTAINER} mkdir -p /etc/ssl/certs/authority + docker cp /tmp/CA-cert.pem ${CONTAINER}:/etc/ssl/certs/authority/CA-cert.pem + docker exec ${CONTAINER} bash -c 'cd /etc/ssl/certs/authority && \ + ln -sf CA-cert.pem \$(openssl x509 -hash -noout -in CA-cert.pem).0' + " + + echo " CA certificate installed to truststore" + echo "" + + # --- Step 3: Enable TLSStrict --- + echo "--- Step 3: Enabling TLSStrict on bmcweb ---" + echo "" + + echo " Stopping bmcweb..." + $SSH "${BMC_USER}@${BMC_IP}" "docker exec ${CONTAINER} supervisorctl stop bmcweb" + + echo " Copying TLS config to BMC..." + $SCP bmcweb_tls_config.json "${BMC_USER}@${BMC_IP}:/tmp/bmcweb_tls_config.json" + + echo " Installing bmcweb_persistent_data.json..." + $SSH "${BMC_USER}@${BMC_IP}" " + docker cp /tmp/bmcweb_tls_config.json ${CONTAINER}:/bmcweb_persistent_data.json + " + + echo " TLSStrict configuration installed" + echo "" + + # --- Restart bmcweb --- + echo "--- Restarting bmcweb ---" + echo "" + + $SSH "${BMC_USER}@${BMC_IP}" "docker exec ${CONTAINER} supervisorctl start bmcweb" + + echo " bmcweb restarted" + echo "" + + # --- Verify --- + echo "--- Verifying installation ---" + echo "" + + echo " Checking server certificate..." + openssl s_client -connect "${BMC_IP}:443" -showcerts < /dev/null 2>/dev/null | \ + openssl x509 -text -noout | grep -E "Subject:|Issuer:|DNS:|IP:" || true + + echo "" + echo " Test mTLS with:" + echo "" + echo " curl --noproxy ${BMC_IP} --cert $WORK_DIR/client-cert.pem --key $WORK_DIR/client-key.pem \\" + echo " --cacert $WORK_DIR/CA-cert.pem \\" + echo " https://${BMC_IP}/redfish/v1/" + echo "" + + echo "=== Installation Complete! ===" + exit 0 +fi + +# ========================================================================= +# GENERATE MODE +# ========================================================================= + +# Validate required options for generate +MISSING="" +[ -z "$SERVER_IP" ] && MISSING="$MISSING -i" +if [ -n "$MISSING" ]; then + echo "ERROR: Missing required options:$MISSING" + echo "" + echo "Usage: $0 -i [options]" + echo "" + echo "Example:" + echo " $0 -i -c --client-cn bmcweb" + echo "" + echo "Run with -h for full usage." + exit 1 +fi + +# Derive CA Common Name from organization +CA_CN="${ORG} BMC CA" + +echo "=== SONiC BMC HTTPS Certificate Generator ===" +echo "" +echo "Working directory: $WORK_DIR" +echo "Server Common Name: $SERVER_CN" +if [ -n "$SERVER_IP" ]; then + echo "Server IP (SAN): $SERVER_IP" +fi +echo "Client CN (mTLS): $CLIENT_CN" +echo "" + +# Create working directory +mkdir -p "$WORK_DIR" +cd "$WORK_DIR" + +# Step 1: Create OpenSSL configuration for server certificate +echo "[1/$TOTAL] Creating OpenSSL configuration..." + +cat > openssl-server.cnf << 'EOF' +[ req ] +default_bits = 2048 +prompt = no +default_md = sha256 +distinguished_name = dn +req_extensions = v3_req + +[ dn ] +C = COUNTRY_PLACEHOLDER +ST = STATE_PLACEHOLDER +L = CITY_PLACEHOLDER +O = ORG_PLACEHOLDER +OU = OU_PLACEHOLDER +CN = CN_PLACEHOLDER + +[ v3_req ] +keyUsage = digitalSignature, keyAgreement +extendedKeyUsage = serverAuth +subjectAltName = @alt_names + +[ alt_names ] +DNS.1 = CN_PLACEHOLDER +EOF + +# Replace placeholders +sed -i "s/COUNTRY_PLACEHOLDER/$COUNTRY/" openssl-server.cnf +sed -i "s/STATE_PLACEHOLDER/$STATE/" openssl-server.cnf +sed -i "s/CITY_PLACEHOLDER/$CITY/" openssl-server.cnf +sed -i "s/ORG_PLACEHOLDER/$ORG/" openssl-server.cnf +sed -i "s/OU_PLACEHOLDER/$OU/" openssl-server.cnf +sed -i "s/CN_PLACEHOLDER/$SERVER_CN/g" openssl-server.cnf + +# Add IP to SAN if provided +if [ -n "$SERVER_IP" ]; then + echo "IP.1 = $SERVER_IP" >> openssl-server.cnf +fi + +# Step 2: Create extension file for CA signing +# NOTE: openssl x509 -req does NOT copy extensions from the CSR, so we must +# include subjectAltName here to preserve SAN in the signed certificate. +echo "[2/$TOTAL] Creating certificate extension file..." + +cat > myext-server.cnf << EOFEXT +[ my_ext_section ] +keyUsage = digitalSignature, keyAgreement +extendedKeyUsage = serverAuth +authorityKeyIdentifier = keyid +subjectKeyIdentifier = hash +subjectAltName = @alt_names + +[ alt_names ] +DNS.1 = $SERVER_CN +EOFEXT + +if [ -n "$SERVER_IP" ]; then + echo "IP.1 = $SERVER_IP" >> myext-server.cnf +fi + +# Step 3: Generate CA certificate (if not exists) +if [ ! -f "CA-cert.pem" ] || [ ! -f "CA-key.pem" ]; then + echo "[3/$TOTAL] Generating CA certificate..." + + openssl genrsa -out CA-key.pem 2048 + + openssl req -new -x509 -days 3650 -key CA-key.pem -out CA-cert.pem \ + -subj "/C=$COUNTRY/ST=$STATE/L=$CITY/O=$ORG/OU=$OU/CN=$CA_CN" + + echo " CA certificate created" +else + echo "[3/$TOTAL] Using existing CA certificate" +fi + +# Step 4: Generate server private key and CSR +echo "[4/$TOTAL] Generating server certificate..." + +openssl genrsa -out server-key.pem 2048 + +openssl req -new -config openssl-server.cnf -key server-key.pem -out server.csr + +# Step 5: Sign server certificate with CA +openssl x509 -req -extensions my_ext_section -extfile myext-server.cnf -days 730 \ + -in server.csr -CA CA-cert.pem -CAkey CA-key.pem -CAcreateserial \ + -out server-cert.pem + +echo " Server certificate created" + +# Step 5: Create combined PEM (cert + key for bmcweb) +echo "[5/$TOTAL] Creating combined PEM file..." + +cat server-cert.pem server-key.pem > server-combined.pem + +echo " Combined PEM: server-combined.pem" + +# Verify server certificates +echo "" +echo "=== Verification ===" + +echo -n "CA certificate: " +openssl x509 -in CA-cert.pem -noout -subject -dates | head -1 + +echo -n "Server certificate: " +openssl verify -CAfile CA-cert.pem server-cert.pem + +echo "" +echo "Server certificate details:" +openssl x509 -in server-cert.pem -noout -subject -issuer -dates -ext subjectAltName + +# --------------------------------------------------------------------------- +# mTLS — client certificate + CA truststore + TLSStrict config +# --------------------------------------------------------------------------- +echo "" +echo "=== mTLS ===" +echo "" + +# Step 6: OpenSSL config for client certificate +echo "[6/$TOTAL] Creating client certificate OpenSSL configuration..." + +cat > openssl-client.cnf << 'EOF' +[ req ] +default_bits = 2048 +prompt = no +default_md = sha256 +distinguished_name = dn +req_extensions = v3_req + +[ dn ] +C = COUNTRY_PLACEHOLDER +ST = STATE_PLACEHOLDER +L = CITY_PLACEHOLDER +O = ORG_PLACEHOLDER +OU = OU_PLACEHOLDER +CN = CN_PLACEHOLDER + +[ v3_req ] +keyUsage = digitalSignature +extendedKeyUsage = clientAuth +EOF + +sed -i "s/COUNTRY_PLACEHOLDER/$COUNTRY/" openssl-client.cnf +sed -i "s/STATE_PLACEHOLDER/$STATE/" openssl-client.cnf +sed -i "s/CITY_PLACEHOLDER/$CITY/" openssl-client.cnf +sed -i "s/ORG_PLACEHOLDER/$ORG/" openssl-client.cnf +sed -i "s/OU_PLACEHOLDER/$OU/" openssl-client.cnf +sed -i "s/CN_PLACEHOLDER/$CLIENT_CN/g" openssl-client.cnf + +cat > myext-client.cnf << 'EOF' +[ my_ext_section ] +keyUsage = digitalSignature +extendedKeyUsage = clientAuth +authorityKeyIdentifier = keyid +subjectKeyIdentifier = hash +EOF + +# Step 7: Generate client private key, CSR, and sign with CA +echo "[7/$TOTAL] Generating client certificate..." + +openssl genrsa -out client-key.pem 2048 + +openssl req -new -config openssl-client.cnf -key client-key.pem -out client.csr + +openssl x509 -req -extensions my_ext_section -extfile myext-client.cnf -days 730 \ + -in client.csr -CA CA-cert.pem -CAkey CA-key.pem -CAcreateserial \ + -out client-cert.pem + +cat client-cert.pem client-key.pem > client-combined.pem + +echo " Client certificate created" + +# Verify client cert +echo -n "Client certificate: " +openssl verify -CAfile CA-cert.pem client-cert.pem + +echo "" +echo "Client certificate details:" +openssl x509 -in client-cert.pem -noout -subject -issuer -dates + +# Step 8: Create bmcweb TLSStrict config +echo "" +echo "[8/$TOTAL] Creating mTLS configuration files..." + +# bmcweb persistent data — enable mTLS with TLSStrict +cat > bmcweb_tls_config.json << 'EOFJ' +{ + "auth_config": { + "BasicAuth": true, + "Cookie": true, + "SessionToken": true, + "XToken": true, + "TLS": true, + "TLSStrict": true, + "MTLSCommonNameParseMode": 2 + }, + "sessions": [], + "revision": 1 +} +EOFJ + +echo " TLSStrict config: bmcweb_tls_config.json" + +echo "" +echo "=== Certificate Generation Complete! ===" +echo "" +echo "Generated files:" +echo " CA-cert.pem — CA certificate" +echo " CA-key.pem — CA private key (keep secure)" +echo " server-cert.pem — Server certificate" +echo " server-key.pem — Server private key" +echo " server-combined.pem — Server cert + key combined" +echo " client-cert.pem — Client certificate (stays on client)" +echo " client-key.pem — Client private key (stays on client)" +echo " client-combined.pem — Client cert + key combined" +echo " bmcweb_tls_config.json — bmcweb TLSStrict config" +echo "" + +echo "" +echo "To install certificates into the BMC, run:" +echo "" +echo " $0 --install --bmc-ip [--bmc-pass ] [--bmc-user ] [-d $WORK_DIR]" +echo "" diff --git a/platform/aspeed/sonic-platform-modules-nexthop/b27/scripts/switch_cpu_utils.sh b/platform/aspeed/sonic-platform-modules-nexthop/b27/scripts/switch_cpu_utils.sh new file mode 100755 index 00000000000..e64ae0bdb81 --- /dev/null +++ b/platform/aspeed/sonic-platform-modules-nexthop/b27/scripts/switch_cpu_utils.sh @@ -0,0 +1,188 @@ +#!/bin/bash +# Switch CPU Utility Script for ASPEED AST2700 BMC +# Provides utilities to manage the switch CPU (x86) from BMC +# Uses the SwitchHostModule Python platform API +# +# Usage: switch_cpu_utils.sh [options] + +set -e + +# Script metadata +SCRIPT_NAME="$(basename "$0")" +LOG_TAG="switch-cpu-utils" + +####################################### +# Print usage information +####################################### +usage() { + cat << EOF +Usage: ${SCRIPT_NAME} [options] + +Switch CPU management utilities for ASPEED AST2700 BMC. +This script uses the SwitchHostModule platform API. + +Commands: + power-on Power on switch CPU (bring out of reset) + power-off Power off switch CPU (put into reset) + power-cycle Power cycle switch CPU + status Show switch CPU operational status + help Show this help message + +Options: + -h, --help Show this help message + +Examples: + ${SCRIPT_NAME} power-on + ${SCRIPT_NAME} power-cycle + ${SCRIPT_NAME} status + +EOF +} + +####################################### +# Execute Python platform API command +####################################### +execute_python_command() { + local command="$1" + + python3 << EOF +import sys + +try: + from sonic_platform.switch_host_module import SwitchHostModule + + # Create module instance + module = SwitchHostModule(module_index=0) + + # Execute command + if "${command}" == "power-on": + result = module.set_admin_state(True) + if result: + print("Switch CPU powered on successfully") + sys.exit(0) + else: + print("ERROR: Failed to power on switch CPU", file=sys.stderr) + sys.exit(1) + + elif "${command}" == "power-off": + result = module.set_admin_state(False) + if result: + print("Switch CPU powered off successfully") + sys.exit(0) + else: + print("ERROR: Failed to power off switch CPU", file=sys.stderr) + sys.exit(1) + + elif "${command}" == "power-cycle": + result = module.do_power_cycle() + if result: + print("Switch CPU power cycle completed successfully") + sys.exit(0) + else: + print("ERROR: Failed to power cycle switch CPU", file=sys.stderr) + sys.exit(1) + + elif "${command}" == "status": + status = module.get_oper_status() + name = module.get_name() + desc = module.get_description() + + print("Switch CPU Status:") + print(f" Name: {name}") + print(f" Description: {desc}") + print(f" Operational State: {status}") + + # Additional human-readable interpretation + if status == module.MODULE_STATUS_ONLINE: + print(" Interpretation: CPU is OUT OF RESET (running)") + elif status == module.MODULE_STATUS_OFFLINE: + print(" Interpretation: CPU is IN RESET (held in reset)") + elif status == module.MODULE_STATUS_FAULT: + print(" Interpretation: ERROR reading CPU status") + else: + print(f" Interpretation: Unknown status ({status})") + + sys.exit(0) + + else: + print(f"ERROR: Unknown command '{command}'", file=sys.stderr) + sys.exit(1) + +except ImportError as e: + print(f"ERROR: Failed to import SwitchHostModule: {e}", file=sys.stderr) + print("Make sure the platform module is installed correctly", file=sys.stderr) + sys.exit(1) +except Exception as e: + print(f"ERROR: {e}", file=sys.stderr) + sys.exit(1) +EOF + + return $? +} + +####################################### +# Main function +####################################### +main() { + # Handle no arguments + if [ $# -eq 0 ]; then + echo "ERROR: No command specified" >&2 + echo "" + usage + exit 1 + fi + + # Parse command + COMMAND="$1" + shift + + case "${COMMAND}" in + power-on) + logger -t ${LOG_TAG} "Executing power-on command via SwitchHostModule" + execute_python_command "power-on" + ;; + power-off) + logger -t ${LOG_TAG} "Executing power-off command via SwitchHostModule" + execute_python_command "power-off" + ;; + power-cycle) + logger -t ${LOG_TAG} "Executing power-cycle command via SwitchHostModule" + execute_python_command "power-cycle" + ;; + status) + execute_python_command "status" + ;; + + # Legacy command compatibility (optional - map old names to new) + reset-out) + echo "NOTE: 'reset-out' is deprecated, use 'power-on' instead" >&2 + logger -t ${LOG_TAG} "Executing power-on command (via legacy reset-out)" + execute_python_command "power-on" + ;; + reset-in) + echo "NOTE: 'reset-in' is deprecated, use 'power-off' instead" >&2 + logger -t ${LOG_TAG} "Executing power-off command (via legacy reset-in)" + execute_python_command "power-off" + ;; + reset-cycle) + echo "NOTE: 'reset-cycle' is deprecated, use 'power-cycle' instead" >&2 + logger -t ${LOG_TAG} "Executing power-cycle command (via legacy reset-cycle)" + execute_python_command "power-cycle" + ;; + + help|--help|-h) + usage + exit 0 + ;; + *) + echo "ERROR: Unknown command '${COMMAND}'" >&2 + echo "" + usage + exit 1 + ;; + esac + exit $? +} + +# Run main function +main "$@" diff --git a/platform/aspeed/sonic-platform-modules-nexthop/common/cfg/usb-gadget.conf b/platform/aspeed/sonic-platform-modules-nexthop/common/cfg/usb-gadget.conf new file mode 100644 index 00000000000..931d01d6b6c --- /dev/null +++ b/platform/aspeed/sonic-platform-modules-nexthop/common/cfg/usb-gadget.conf @@ -0,0 +1,6 @@ +# USB Gadget kernel modules for NextHop BMC platforms +# Loaded at boot by systemd-modules-load.service +libcomposite +aspeed_vhub +u_ether +usb_f_ncm diff --git a/platform/aspeed/sonic-platform-modules-nexthop/common/scripts/sonic-usb-network-udev-init.sh b/platform/aspeed/sonic-platform-modules-nexthop/common/scripts/sonic-usb-network-udev-init.sh new file mode 100755 index 00000000000..535fad211dc --- /dev/null +++ b/platform/aspeed/sonic-platform-modules-nexthop/common/scripts/sonic-usb-network-udev-init.sh @@ -0,0 +1,46 @@ +#!/bin/bash +# Aspeed USB Network Gadget udev Rules Initialization Script +# This script installs udev rules to rename USB network interface from usb0 to bmc0 + +set -e + +LOG_FILE="/var/log/nexthop-usb-network-udev-init.log" +PLATFORM_SYMLINK="/usr/share/sonic/platform" +RULES_SRC="${PLATFORM_SYMLINK}/70-usb-network.rules" +RULES_DEST="/etc/udev/rules.d/70-usb-network.rules" + +log() { + echo "[$(date '+%Y-%m-%d %H:%M:%S')] $*" | tee -a "$LOG_FILE" +} + +log "Starting USB network udev rules initialization..." + +# Check if rules source exists +if [ ! -f "$RULES_SRC" ]; then + log "ERROR: USB network udev rules not found at $RULES_SRC" + exit 1 +fi + +# Install udev rules +log "Installing USB network udev rules..." +cp "$RULES_SRC" "$RULES_DEST" +log "Installed: $RULES_DEST" + +# Reload udev to activate the rules +log "Reloading udev rules..." +udevadm control --reload-rules +udevadm trigger --subsystem-match=net +log "Udev rules reloaded and triggered" + +# Check if interface was renamed (if it already exists) +if ip link show bmc0 &>/dev/null; then + log "USB network interface 'bmc0' found" +elif ip link show usb0 &>/dev/null; then + log "WARNING: Interface 'usb0' still exists, rename may apply on next interface creation" +else + log "No USB network interface found yet (will be created by usb-network-init.sh)" +fi + +log "USB network udev rules initialization complete" +exit 0 + diff --git a/platform/aspeed/sonic-platform-modules-nexthop/common/scripts/usb-network-init.sh b/platform/aspeed/sonic-platform-modules-nexthop/common/scripts/usb-network-init.sh new file mode 100755 index 00000000000..7af9d542b40 --- /dev/null +++ b/platform/aspeed/sonic-platform-modules-nexthop/common/scripts/usb-network-init.sh @@ -0,0 +1,143 @@ +#!/bin/bash +# USB Network Gadget Initialization Script for ASPEED AST2700 +# Sets up USB network device using ConfigFS + +set -e + +# Configuration +GADGET_NAME="g1" +FUNCTION_TYPE="ncm" +INTERFACE_NAME="bmc0" +VENDOR_ID="0x1d6b" # Linux Foundation +PRODUCT_ID="0x0104" # Multifunction Composite Gadget +SERIAL_NUMBER="0123456789" +MANUFACTURER="Nexthop Inc." +PRODUCT_NAME="USB Network Device" +DEV_MAC="02:00:00:00:00:01" +HOST_MAC="02:00:00:00:00:02" + +logger -t usb-network "Starting USB network gadget initialization..." + +# Step 1: Mount ConfigFS +if ! mountpoint -q /sys/kernel/config 2>/dev/null; then + mount -t configfs none /sys/kernel/config + logger -t usb-network "ConfigFS mounted at /sys/kernel/config" +fi + +# Step 2: Create gadget configuration +GADGET_DIR="/sys/kernel/config/usb_gadget/${GADGET_NAME}" + +# Remove existing gadget if present +if [ -d "${GADGET_DIR}" ]; then + logger -t usb-network "Removing existing gadget configuration..." + # Disable gadget first + if [ -f "${GADGET_DIR}/UDC" ]; then + echo "" > "${GADGET_DIR}/UDC" 2>/dev/null || true + fi + # Remove gadget directory and all contents + rm -rf "${GADGET_DIR}" 2>/dev/null || true +fi + +# Create new gadget +logger -t usb-network "Creating USB gadget configuration..." +mkdir -p "${GADGET_DIR}" +cd "${GADGET_DIR}" + +# Set USB device descriptor +echo "${VENDOR_ID}" > idVendor +echo "${PRODUCT_ID}" > idProduct +echo "0x0100" > bcdDevice # v1.0.0 +echo "0x0200" > bcdUSB # USB 2.0 + +# Create English strings +mkdir -p strings/0x409 +echo "${SERIAL_NUMBER}" > strings/0x409/serialnumber +echo "${MANUFACTURER}" > strings/0x409/manufacturer +echo "${PRODUCT_NAME}" > strings/0x409/product + +# Create configuration +mkdir -p configs/c.1/strings/0x409 +echo "${FUNCTION_TYPE^^} Network" > configs/c.1/strings/0x409/configuration +echo "250" > configs/c.1/MaxPower # 250mA + +# Create network function +mkdir -p "functions/${FUNCTION_TYPE}.${INTERFACE_NAME}" +echo "${DEV_MAC}" > "functions/${FUNCTION_TYPE}.${INTERFACE_NAME}/dev_addr" +echo "${HOST_MAC}" > "functions/${FUNCTION_TYPE}.${INTERFACE_NAME}/host_addr" + +# Link function to configuration +ln -s "functions/${FUNCTION_TYPE}.${INTERFACE_NAME}" configs/c.1/ + +logger -t usb-network "Gadget '${GADGET_NAME}' created with ${FUNCTION_TYPE^^} function" + +# Step 4: Enable the gadget +# Use the specific UDC port for AST2700 USB virtual hub +UDC_NAME="12021000.usb-vhub:p1" + +if [ -z "${UDC_NAME}" ]; then + logger -t usb-network "ERROR: No UDC (USB Device Controller) found!" + echo "ERROR: No UDC found. Make sure aspeed_vhub module is loaded." >&2 + exit 1 +fi + +logger -t usb-network "Using UDC: ${UDC_NAME}" +echo "${UDC_NAME}" > UDC + +# Step 5: Wait for interface to appear +logger -t usb-network "Waiting for network interface ${INTERFACE_NAME}..." +for i in {1..10}; do + if ip link show "${INTERFACE_NAME}" &>/dev/null; then + logger -t usb-network "Interface '${INTERFACE_NAME}' detected" + break + fi + sleep 1 + logger -t usb-network "Interface '${INTERFACE_NAME}' still not up" +done + +if ! ip link show "${INTERFACE_NAME}" &>/dev/null; then + logger -t usb-network "WARNING: Interface '${INTERFACE_NAME}' not found after 10 seconds" + exit 1 +fi + +# Step 6: Configure network interface +logger -t usb-network "Configuring network interface..." +ip addr flush dev "${INTERFACE_NAME}" 2>/dev/null || true + +# Bring interface up (required for IPv6) +ip link set "${INTERFACE_NAME}" up + +# Enable IPv6 on the interface +sysctl -w net.ipv6.conf.${INTERFACE_NAME}.disable_ipv6=0 2>/dev/null || true + +# Step 6b: IP address configuration handled by /etc/network/interfaces +# The interface configuration is managed through sonic-cfggen and interfaces.j2 template +# which reads from bmc.json (DEVICE_METADATA['bmc']) and generates /etc/network/interfaces +# This approach ensures consistent network configuration management across SONiC +logger -t usb-network "IP configuration will be applied by networking.service from /etc/network/interfaces" + +# Wait a moment for interface to stabilize +sleep 1 + +# Check interface state +LINK_STATE=$(ip link show "${INTERFACE_NAME}" | grep -oP 'state \K\w+') + +logger -t usb-network "USB network gadget initialized successfully" +logger -t usb-network "Interface: ${INTERFACE_NAME} (MAC: ${DEV_MAC}), State: ${LINK_STATE}, UDC: ${UDC_NAME}" + +# IPv6 link-local address will be auto-configured when link comes up +# Provide guidance on next steps +if [ "${LINK_STATE}" = "DOWN" ]; then + logger -t usb-network "Interface is DOWN - waiting for USB host connection" + logger -t usb-network "To bring switch CPU out of reset, run: switch_cpu_utils.sh reset-out" + echo "USB network interface '${INTERFACE_NAME}' is ready but link is DOWN (no host connected)" + echo "To bring switch CPU out of reset and establish USB connection, run:" + echo " switch_cpu_utils.sh reset-out" +else + # Link is UP - show IPv6 address + IPV6_ADDR=$(ip -6 addr show dev "${INTERFACE_NAME}" scope link | grep -oP 'fe80::[0-9a-f:]+' | head -n1) + logger -t usb-network "Link is UP - IPv6 link-local: ${IPV6_ADDR}" + echo "USB network interface '${INTERFACE_NAME}' is UP with IPv6 link-local: ${IPV6_ADDR}" +fi + +exit 0 + diff --git a/platform/aspeed/sonic-platform-modules-nexthop/common/sonic_platform/__init__.py b/platform/aspeed/sonic-platform-modules-nexthop/common/sonic_platform/__init__.py new file mode 100644 index 00000000000..464315b4746 --- /dev/null +++ b/platform/aspeed/sonic-platform-modules-nexthop/common/sonic_platform/__init__.py @@ -0,0 +1,13 @@ +#!/usr/bin/env python3 +# +# __init__.py +# +# Platform-specific SONiC platform API for NextHop Aspeed AST2700 BMC +# + +try: + from sonic_platform.platform import Platform + from sonic_platform.chassis import Chassis +except ImportError as e: + raise ImportError(str(e) + " - required module not found") + diff --git a/platform/aspeed/sonic-platform-modules-nexthop/common/sonic_platform/chassis.py b/platform/aspeed/sonic-platform-modules-nexthop/common/sonic_platform/chassis.py new file mode 100644 index 00000000000..25ab74c7163 --- /dev/null +++ b/platform/aspeed/sonic-platform-modules-nexthop/common/sonic_platform/chassis.py @@ -0,0 +1,321 @@ +#!/usr/bin/env python3 +# +# chassis.py +# +# Chassis implementation for NextHop B27 BMC +# + +try: + from sonic_platform_base.chassis_base import ChassisBase + from sonic_platform.thermal import Thermal + from sonic_platform.watchdog import Watchdog + from sonic_platform.eeprom import Eeprom + from sonic_platform.switch_host_module import SwitchHostModule +except ImportError as e: + raise ImportError(str(e) + " - required module not found") + + +# Watchdog bootstatus file paths for AST2700 +WATCHDOG0_BOOTSTATUS_PATH = "/sys/devices/platform/soc@14000000/14c37000.watchdog/watchdog/watchdog0/bootstatus" +WATCHDOG1_BOOTSTATUS_PATH = "/sys/devices/platform/soc@14000000/14c37080.watchdog/watchdog/watchdog1/bootstatus" + +# Watchdog bootstatus bit flags (from Linux kernel watchdog.h) +WDIOF_OVERHEAT = 0x0001 # Reset due to CPU overheat +WDIOF_FANFAULT = 0x0002 # Fan failed +WDIOF_EXTERN1 = 0x0004 # External relay 1 +WDIOF_EXTERN2 = 0x0008 # External relay 2 +WDIOF_POWERUNDER = 0x0010 # Power bad/power fault +WDIOF_CARDRESET = 0x0020 # Card previously reset the CPU (normal reboot) +WDIOF_POWEROVER = 0x0040 # Power over voltage + +class Chassis(ChassisBase): + """ + Platform-specific Chassis class for NextHop B27 BMC + + Hardware Configuration (from nexthop-b27-r0.dts): + - 0 PWM fans (all fan controllers disabled in DTS) + - 0 TACH inputs (all disabled in DTS) + - ADC controllers disabled (ADC0 and ADC1 both disabled) + - 2 Watchdog timers (wdt0, wdt1) + - BCM53134 managed switch with DSA configuration + + Supports multiple card revisions with runtime detection. + """ + + # NextHop has NO fans - all fan/PWM/TACH controllers are disabled in DTS + NUM_FANS = 0 + + # NextHop has ADC controllers disabled - thermal sensors may not be available + # We'll check at runtime which sensors actually exist + NUM_THERMAL_SENSORS = 16 # Keep same as base, but filter in __init__ + + def __init__(self): + """ + Initialize NextHop chassis with hardware-specific configuration + """ + super().__init__() + + # Initialize watchdog (same as base class) + self._watchdog = Watchdog() + + # Initialize eeprom + self._eeprom = Eeprom() + + # Initialize Switch Host Module (x86 CPU managed by BMC) + self._module_list = [] + switch_host = SwitchHostModule(module_index=0) + self._module_list.append(switch_host) + + # NextHop has NO fans - create empty lists + self._fan_list = [] + self._fan_drawer_list = [] + + # For thermal sensors, only add those that actually exist + # ADC controllers are disabled in DTS, so most/all may not be present + self._thermal_list = [] + for i in range(self.NUM_THERMAL_SENSORS): + thermal = Thermal(i) + # Only add thermal sensor if it's actually present in hardware + if thermal.get_presence(): + self._thermal_list.append(thermal) + + def is_bmc(self): + return True + + def _read_watchdog_bootstatus(self, path): + """ + Read watchdog bootstatus value from sysfs + + Args: + path: Path to the bootstatus file + + Returns: + Integer value of bootstatus, or 0 if file doesn't exist or can't be read + """ + try: + with open(path, 'r') as f: + value = f.read().strip() + return int(value) + except (IOError, OSError, ValueError): + return 0 + + def get_reboot_cause(self): + """ + Retrieves the cause of the previous reboot + + This method reads the watchdog bootstatus register to determine + the hardware reboot cause. The AST2700 based B27 has two watchdog timers, + and we check watchdog0 for the reboot cause. + + Returns: + A tuple (string, string) where the first element is a string + containing the cause of the previous reboot. This string must be + one of the predefined strings in ChassisBase. If the first string + is "REBOOT_CAUSE_HARDWARE_OTHER", the second string can be used + to pass a description of the reboot cause. + + Reboot cause mapping: + - WDIOF_OVERHEAT (0x01): Thermal overload + - WDIOF_FANFAULT (0x02): Insufficient fan speed + - WDIOF_POWERUNDER (0x10): Power loss + - WDIOF_POWEROVER (0x40): Power over voltage + - WDIOF_CARDRESET (0x20): Normal reboot/reset + - Other bits: Hardware other + - No bits set: Non-hardware (software reboot) + """ + # Read watchdog0 bootstatus + bootstatus = self._read_watchdog_bootstatus(WATCHDOG0_BOOTSTATUS_PATH) + + # Map bootstatus bits to reboot causes + # Check in order of priority (most specific first) + + if bootstatus & WDIOF_OVERHEAT: + return (self.REBOOT_CAUSE_THERMAL_OVERLOAD_CPU, "CPU Overheat") + + if bootstatus & WDIOF_FANFAULT: + return (self.REBOOT_CAUSE_INSUFFICIENT_FAN_SPEED, "Fan Fault") + + if bootstatus & WDIOF_POWERUNDER: + return (self.REBOOT_CAUSE_POWER_LOSS, "Power Under Voltage") + + if bootstatus & WDIOF_POWEROVER: + return (self.REBOOT_CAUSE_POWER_LOSS, "Power Over Voltage") + + if bootstatus & WDIOF_CARDRESET: + # CARDRESET can indicate either: + # 1. Watchdog timeout reset (no software reboot cause file) + # 2. Normal software reboot (software reboot cause file exists) + # Check if software reboot cause exists + try: + with open('/host/reboot-cause/reboot-cause.txt', 'r') as f: + software_cause = f.read().strip() + if software_cause and not software_cause.startswith('Unknown'): + # Software initiated reboot + return (self.REBOOT_CAUSE_NON_HARDWARE, None) + except (IOError, OSError): + pass + + # No software reboot cause found - assume watchdog timeout + return (self.REBOOT_CAUSE_WATCHDOG, "Watchdog timeout reset") + + if bootstatus & (WDIOF_EXTERN1 | WDIOF_EXTERN2): + return (self.REBOOT_CAUSE_HARDWARE_OTHER, f"External Reset (bootstatus=0x{bootstatus:x})") + + # If no specific bits are set, or only unknown bits are set + if bootstatus == 0: + # No hardware reboot cause detected + return (self.REBOOT_CAUSE_NON_HARDWARE, None) + else: + # Unknown bootstatus bits + return (self.REBOOT_CAUSE_HARDWARE_OTHER, f"Unknown (bootstatus=0x{bootstatus:x})") + + def get_all_modules(self): + """ + Retrieves all modules available on this chassis + + Returns: + A list of Module objects representing all modules on the chassis + """ + return self._module_list + + def get_name(self): + """ + Retrieves the name of the chassis + + Returns: + String containing the name of the chassis + """ + return "Nexthop BMC Card" + + def get_model(self): + """ + Retrieves the model number (or part number) of the chassis + + Returns: + String containing the model number of the chassis + """ + return self._eeprom.modelstr() + + def get_revision(self): + """ + Retrieves the hardware revision of the device + Returns: + string: Label Revision value of device + """ + return self._eeprom.label_revision_str() + + def get_serial_number(self): + """ + Returns the BMC card's serial number from BMC EEPROM + + Returns: + string: BMC serial number from BMC EEPROM (i2c-4) + """ + if self._eeprom: + try: + e = self._eeprom.read_eeprom() + bmc_sn = self._eeprom.serial_number_str(e) + return bmc_sn if bmc_sn else "N/A" + except Exception: + pass + return "N/A" + + def get_serial(self): + """ + Retrieves the serial number of the chassis + + Returns: + String containing the serial number of the chassis + """ + return self.get_serial_number() + + def get_switch_host_serial(self): + """ + Returns the switch/host system serial number (from switch card EEPROM). + This is the primary system/chassis identifier. + + Returns: + string: System serial number from switch card EEPROM (i2c-10) + On a failure return "N/A" + """ + switch_host = self._module_list[0] + return switch_host.get_serial() + + def get_watchdog(self): + """ + Retrieves the hardware watchdog device on this chassis + + Returns: + An object derived from WatchdogBase representing the hardware + watchdog device + """ + return self._watchdog + + def get_num_thermals(self): + """ + Retrieves the number of thermal sensors available on this chassis + + Returns: + An integer, the number of thermal sensors available on this chassis + """ + return len(self._thermal_list) + + def get_all_thermals(self): + """ + Retrieves all thermal sensors available on this chassis + + Returns: + A list of objects derived from ThermalBase representing all thermal + sensors available on this chassis + """ + return self._thermal_list + + def get_thermal(self, index): + """ + Retrieves thermal sensor represented by (0-based) index + + Args: + index: An integer, the index (0-based) of the thermal sensor to retrieve + + Returns: + An object derived from ThermalBase representing the specified thermal + sensor, or None if index is out of range + """ + if index < 0 or index >= len(self._thermal_list): + return None + return self._thermal_list[index] + + def get_num_fans(self): + """ + Retrieves the number of fans available on this chassis + + Returns: + An integer, the number of fans available on this chassis + """ + return len(self._fan_list) + + def get_all_fans(self): + """ + Retrieves all fan modules available on this chassis + + Returns: + A list of objects derived from FanBase representing all fan + modules available on this chassis + """ + return self._fan_list + + def get_fan(self, index): + """ + Retrieves fan module represented by (0-based) index + + Args: + index: An integer, the index (0-based) of the fan module to retrieve + + Returns: + An object derived from FanBase representing the specified fan + module, or None if index is out of range + """ + if index < 0 or index >= len(self._fan_list): + return None + return self._fan_list[index] + diff --git a/platform/aspeed/sonic-platform-modules-nexthop/common/sonic_platform/eeprom.py b/platform/aspeed/sonic-platform-modules-nexthop/common/sonic_platform/eeprom.py new file mode 100644 index 00000000000..a8aeb0122f7 --- /dev/null +++ b/platform/aspeed/sonic-platform-modules-nexthop/common/sonic_platform/eeprom.py @@ -0,0 +1,37 @@ +from __future__ import annotations + +import os +import time +from sonic_platform import eeprom_utils + +BMC_EEPROM_PATH = "/sys/bus/i2c/devices/4-0050/eeprom" + +class Eeprom(eeprom_utils.Eeprom): + """ + BMC SONiC EEPROM handler for the BMC IDPROM on Chipmunk. + + - Uses Nexthop Eeprom subclass so Vendor Extension TLVs + (IANA 63074 + custom field codes) map to friendly names like + "Switch Host Serial Number". + """ + + def __init__(self): + # Nexthop Eeprom ctor matches TlvInfoDecoder(path, start, status, ro) + if not os.path.exists(BMC_EEPROM_PATH): + raise RuntimeError(f"EEPROM device not found at {BMC_EEPROM_PATH}") + super(Eeprom, self).__init__(BMC_EEPROM_PATH, start=0, status="", ro=True) + + def get_eeprom(self): + """ + Read EEPROM, update Redis, and return raw bytes. + syseepromd calls this. + """ + e = self.read_eeprom() + # Populate STATE_DB: EEPROM_INFO|* keys + self.update_eeprom_db(e) + return e + + def read_eeprom(self): + # Just delegate to base class + return super(Eeprom, self).read_eeprom() + diff --git a/platform/aspeed/sonic-platform-modules-nexthop/common/sonic_platform/eeprom_utils.py b/platform/aspeed/sonic-platform-modules-nexthop/common/sonic_platform/eeprom_utils.py new file mode 100644 index 00000000000..8daae6f16a7 --- /dev/null +++ b/platform/aspeed/sonic-platform-modules-nexthop/common/sonic_platform/eeprom_utils.py @@ -0,0 +1,355 @@ +# Copyright 2025 Nexthop Systems Inc. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 + +import os +import sys +import struct + +from dataclasses import dataclass +from enum import Enum + +try: + from sonic_platform_base.sonic_eeprom import eeprom_tlvinfo +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +NEXTHOP_IANA = "63074" +NEXTHOP_IANA_SIZE = 4 # IANA is 4 bytes +VENDOR_EXT_STR = "Vendor Extension" + + +class CustomField(Enum): + """ + Enum for Nexthop custom EEPROM fields used for "Vendor Extension" + TLV programming and decoding. + """ + + SECONDARY_SERIAL_NUMBER = (0x01, "Custom Serial Number") + REGULATORY_MODEL_NUMBER = (0x02, "Regulatory Model Number") + SWITCH_HOST_SERIAL_NUMBER = (0x03, "Switch Host Serial Number") + + def __init__(self, code, display_name): + self.code = code + self.display_name = display_name + + @classmethod + def get_by_code(cls, code): + for field in cls: + if field.code == code: + return field + return None + + +@dataclass +class CustomFieldStruct: + iana: bytearray + code: int + payload: bytearray + + +def big_endian_to_int(bytes: bytearray) -> int: + return struct.unpack(">I", bytes)[0] + + +def tlv_to_custom_field_struct(t: bytearray) -> tuple[CustomFieldStruct | None, str]: + """ + Parses the given TLV in the form of bytes into a CustomFieldStruct. + Returns (None, error_message) if the given TLV bytes is not a valid Vendor Extension TLV. + + Vendor Extension TLV schema: + Byte | Name + ------------- + 0 | Type + 1 | Payload length (including IANA, Custom field code, and Custom payload) + 2-5 | IANA + 6 | Custom field code + 7+ | Custom payload (variable length) + """ + # Check minimum TLV length (1 + 1 + 4 + 1 = 7 bytes minimum) + if len(t) < 7: + return None, "Invalid format - too short" + + if t[0] != eeprom_tlvinfo.TlvInfoDecoder._TLV_CODE_VENDOR_EXT: + return None, "Not a Vendor Extension TLV" + + # Check minimum payload length (4 + 1 = 5 bytes minimum) + if t[1] < 5: + return None, "Invalid payload length - too short" + + # Parse the structure + iana_bytes = t[2:6] + custom_field_code = t[6] + payload = t[7 : 2 + t[1]] + # ============= FOR BACKWARD COMPATIBILITY ============= + # Some early units may have a garbage value at byte 2 + # of the "Custom Serial Number" (code 0x01) TLV. So, + # IANA, custom field code, and custom payload are all + # shifted right by 1 byte. This special check is so we + # can decode the "Custom Serial Number" for those units. + # Although, the value of payload length at byte 1 is + # still correct. + if ( + big_endian_to_int(iana_bytes) != int(NEXTHOP_IANA) + and len(t) >= 8 + and t[1] >= 6 + and big_endian_to_int(t[3:7]) == int(NEXTHOP_IANA) + and t[7] == CustomField.SECONDARY_SERIAL_NUMBER.code + ): + iana_bytes = t[3:7] + custom_field_code = t[7] + payload = t[8 : 2 + t[1]] + # ====================================================== + return CustomFieldStruct(iana_bytes, custom_field_code, payload), "" + + +class NexthopEepromDecodeVisitor(eeprom_tlvinfo.EepromDecodeVisitor): + """ + Custom visitor class, which lengthen the "TLV Name" column to 25 characters. + """ + def visit_header(self, eeprom_id, version, header_length): + if eeprom_id is not None: + print("TlvInfo Header:") + print(" Id String: %s" % eeprom_id) + print(" Version: %d" % version) + print(" Total Length: %d" % header_length) + print("TLV Name Code Len Value") + print("------------------------- ---- --- -----") + + def visit_tlv(self, name, code, length, value): + print("%-25s 0x%02X %3d %s" % (name, code, length, value)) + + +class Eeprom(eeprom_tlvinfo.TlvInfoDecoder): + def decoder(self, s, t): + # Vendor Extension TLV schema: + # Byte | Name + # ------------- + # 0 | Type + # 1 | Payload length (including IANA, Custom field code, and Custom payload) + # 2-5 | IANA + # 6 | Custom field code + # 7+ | Custom payload (variable length) + if t[0] != self._TLV_CODE_VENDOR_EXT: + return eeprom_tlvinfo.TlvInfoDecoder.decoder(self, s, t) + + # Parse the structure + custom_field_struct, err = tlv_to_custom_field_struct(t) + if custom_field_struct is None: + name = VENDOR_EXT_STR + return name, err + + # Verify IANA + iana = big_endian_to_int(custom_field_struct.iana) + if iana != int(NEXTHOP_IANA): + name = VENDOR_EXT_STR + return ( + name, + f"Invalid IANA: {iana}, expected {NEXTHOP_IANA}", + ) + + # Verify custom field code + custom_field = CustomField.get_by_code(custom_field_struct.code) + if custom_field is None: + name = VENDOR_EXT_STR + return name, f"Invalid field code: 0x{custom_field_struct.code:02x}" + + # Extract and decode the actual payload + custom_value = custom_field_struct.payload.decode("utf-8", errors="replace") + name = custom_field.display_name + return name, custom_value + + def _encode_arg_to_tlv_bytes(self, arg: str) -> bytearray: + """ + Convert a string in the format of "{type} = {payload}", where payload is + space-separated hexidecimal numbers, to a TLV bytearray consisting of + type (1 byte) + payload length (1 byte) + payload (variable length). + """ + type, payload = arg.split("=") + type = int(type.strip(), base=0) + payload = payload.strip() + tlv = self.encoder((type,), payload) + return tlv + + def _find_tlv_vendor_ext_start_offset( + self, e: bytearray, iana: bytearray, custom_field_code: int + ) -> int | None: + """ + If exists in the given EEPROM data, returns the start index of the + Vendor Extension TLV which contains the given IANA (bytes [2,5]) and + the given custom field code (6th byte). + Returns None if not found. + """ + tlv_start = 0 + # Iterate through TLVs until we find the matching Vendor Extension TLV + while tlv_start < len(e) and self.is_valid_tlv(e[tlv_start:]): + # Check if this is the Vendor Extension TLV we're looking for. + tlv_end = tlv_start + 2 + e[tlv_start + 1] + custom_field_struct, _ = tlv_to_custom_field_struct(e[tlv_start:tlv_end]) + if ( + custom_field_struct is not None + and custom_field_struct.iana == iana + and custom_field_struct.code == custom_field_code + ): + return tlv_start + + # Move to the next TLV. + tlv_start = tlv_end + return None + + def _remove_header_and_checksum_tlv(self, e: bytearray) -> bytearray: + """ + Returns the given EEPROM data with the header and the checksum TLV removed. + """ + # Skip header. + tlv_start = 0 + if self._TLV_HDR_ENABLED: + tlv_start = self._TLV_INFO_HDR_LEN + total_length = (e[9] << 8) | e[10] + e_end = self._TLV_INFO_HDR_LEN + total_length + else: + tlv_start = self.eeprom_start + e_end = min(self._TLV_INFO_MAX_LEN, self.eeprom_max_len) + + # Include all TLVs but not the checksum TLV which is always the last TLV. + # TLV schema: + # Byte | Name + # ------------ + # 0 | Type + # 1 | Payload length + # 2+ | Payload (variable length) + new_e = bytearray() + while ( + tlv_start < len(e) + and tlv_start < e_end + and self.is_valid_tlv(e[tlv_start:]) + and e[tlv_start] != self._TLV_CODE_CRC_32 + ): + tlv_end = tlv_start + 2 + e[tlv_start + 1] + new_e += e[tlv_start:tlv_end] + tlv_start = tlv_end + return new_e + + def decode_eeprom(self, e): + visitor = NexthopEepromDecodeVisitor() + self.visit_eeprom(e, visitor) + + +def format_vendor_ext(custom_payload, custom_field_code): + """ + Format vendor extension field according to Nexthop specification: + - NEXTHOP IANA (4 bytes) + - Custom field code (1 byte) + - Custom payload (variable length) + + Args: + custom_payload (bytes): The custom payload data + custom_field_code (int): Custom field code (default: 0x01) + + Returns: + str: Formatted vendor extension string in hex format + """ + + # Ensure custom_payload is bytes + if not isinstance(custom_payload, bytes): + raise TypeError("custom_payload must be bytes") + + # Build the vendor extension data + vendor_ext_data = bytearray() + + # Add NEXTHOP IANA (4 bytes) - convert string to integer then to 4 bytes + iana_int = int(NEXTHOP_IANA) + vendor_ext_data.extend(struct.pack(">I", iana_int)) # Big-endian 4-byte integer + + # Add custom field code (1 byte) + vendor_ext_data.append(custom_field_code & 0xFF) + + # Add custom payload + vendor_ext_data.extend(custom_payload) + + # Convert to hex string format expected by eeprom_tlvinfo + return " ".join(f"0x{b:02x}" for b in vendor_ext_data) + + +def get_at24_eeprom_paths(root=""): + results = [] + i2c_devices_dir = f"{root}/sys/bus/i2c/devices" + if not os.path.isdir(i2c_devices_dir): + return results + for device in os.listdir(i2c_devices_dir): + name_file_path = os.path.join(i2c_devices_dir, device, "name") + os.path.isfile(name_file_path) + with open(name_file_path, "r") as f: + if f.read().strip() == "24c64": + eeprom_path = os.path.join(i2c_devices_dir, device, "eeprom") + if os.path.isfile(eeprom_path): + results.append(eeprom_path) + return results + +def decode_eeprom(eeprom_path: str): + eeprom_class = Eeprom(eeprom_path, start=0, status="", ro=True) + eeprom = eeprom_class.read_eeprom() + # will print out contents + eeprom_class.decode_eeprom(eeprom) + +def program_eeprom( + eeprom_path, + product_name, + part_num, + serial_num, + mac, + device_version, + label_revision, + platform_name, + manufacturer_name, + vendor_name, + service_tag, + custom_serial_number, + regulatory_model_number, +): + eeprom_class = Eeprom(eeprom_path, start=0, status="", ro=True) + tmp_contents = eeprom_class.read_eeprom() + cmds = [] + if product_name is not None: + cmds.append(f"{eeprom_class._TLV_CODE_PRODUCT_NAME} = {product_name}") + if part_num is not None: + cmds.append(f"{eeprom_class._TLV_CODE_PART_NUMBER} = {part_num}") + if serial_num is not None: + cmds.append(f"{eeprom_class._TLV_CODE_SERIAL_NUMBER} = {serial_num}") + if mac is not None: + cmds.append(f"{eeprom_class._TLV_CODE_MAC_BASE} = {mac}") + if device_version is not None: + cmds.append(f"{eeprom_class._TLV_CODE_DEVICE_VERSION} = {device_version}") + if label_revision is not None: + cmds.append(f"{eeprom_class._TLV_CODE_LABEL_REVISION} = {label_revision}") + if platform_name is not None: + cmds.append(f"{eeprom_class._TLV_CODE_PLATFORM_NAME} = {platform_name}") + if manufacturer_name is not None: + cmds.append(f"{eeprom_class._TLV_CODE_MANUF_NAME} = {manufacturer_name}") + if vendor_name is not None: + cmds.append(f"{eeprom_class._TLV_CODE_VENDOR_NAME} = {vendor_name}") + if service_tag is not None: + cmds.append(f"{eeprom_class._TLV_CODE_SERVICE_TAG} = {service_tag}") + + # Vendor extension fields. See Nexthop custom EEPROM fields in `CustomField` enum above. + if custom_serial_number is not None: + payload_hex_str = format_vendor_ext( + custom_serial_number.encode("utf-8"), + CustomField.SECONDARY_SERIAL_NUMBER.code, + ) + cmds.append(f"{eeprom_class._TLV_CODE_VENDOR_EXT} = {payload_hex_str}") + if regulatory_model_number is not None: + payload_hex_str = format_vendor_ext( + regulatory_model_number.encode("utf-8"), + CustomField.REGULATORY_MODEL_NUMBER.code, + ) + cmds.append(f"{eeprom_class._TLV_CODE_VENDOR_EXT} = {payload_hex_str}") + + tmp_contents = eeprom_class.set_eeprom(tmp_contents, cmds) + + eeprom_class.write_eeprom(tmp_contents) + + +def clear_eeprom(eeprom_path: str): + size = os.path.getsize(eeprom_path) + with open(eeprom_path, "r+b") as f: + f.write(bytearray([0xFF] * size)) diff --git a/platform/aspeed/sonic-platform-modules-nexthop/common/sonic_platform/fan.py b/platform/aspeed/sonic-platform-modules-nexthop/common/sonic_platform/fan.py new file mode 100644 index 00000000000..d08beb7ff3e --- /dev/null +++ b/platform/aspeed/sonic-platform-modules-nexthop/common/sonic_platform/fan.py @@ -0,0 +1,293 @@ +""" +SONiC Platform API - Fan class for Aspeed BMC + +This module provides the Fan class for Aspeed AST2700 BMC platform. +Fans are controlled via PWM and monitored via TACH inputs. +""" + +import os + +try: + from sonic_platform_base.fan_base import FanBase +except ImportError as e: + raise ImportError(str(e) + " - required module not found") + + +class Fan(FanBase): + """ + Fan class for Aspeed AST2700 BMC platform + + The AST2700 supports: + - 16 TACH inputs for fan speed monitoring (hwmon0) + - 9 PWM outputs for fan speed control (hwmon1-9) + """ + + # Base paths for fan devices + TACH_HWMON_PATH = "/sys/class/hwmon/hwmon0" # aspeed_tach + PWM_HWMON_BASE = "/sys/class/hwmon/hwmon" # pwm-fan devices (hwmon1-9) + + # PWM range (0-255) + PWM_MAX = 255 + + def __init__(self, fan_index, is_psu_fan=False): + """ + Initialize a Fan object + + Args: + fan_index: 0-based index of the fan (0-15 for TACH, 0-8 for PWM) + is_psu_fan: True if this is a PSU fan, False otherwise + """ + FanBase.__init__(self) + + self.index = fan_index + self.is_psu_fan = is_psu_fan + self.name = f"Fan{fan_index + 1}" + + # TACH input path (1-based in sysfs) + self.tach_input_path = os.path.join( + self.TACH_HWMON_PATH, + f"fan{fan_index + 1}_input" + ) + + # PWM control path (for fans 0-8, maps to hwmon1-9) + # pwm-fan0 -> hwmon8, pwm-fan1 -> hwmon9, pwm-fan2 -> hwmon1, etc. + # We'll need to find the correct hwmon device + self.pwm_path = None + if fan_index < 9: + self._find_pwm_path(fan_index) + + def _find_pwm_path(self, fan_index): + """ + Find the PWM control path for this fan + + Args: + fan_index: 0-based fan index + """ + # Search for the pwm-fan device + for hwmon_num in range(1, 10): + hwmon_path = f"{self.PWM_HWMON_BASE}{hwmon_num}" + device_path = os.path.join(hwmon_path, "device") + + try: + # Read the device name + device_name = os.path.basename(os.readlink(device_path)) + if device_name == f"pwm-fan{fan_index}": + self.pwm_path = os.path.join(hwmon_path, "pwm1") + return + except (OSError, IOError): + continue + + def _read_sysfs_file(self, path): + """ + Read a value from a sysfs file + + Args: + path: Path to the sysfs file + + Returns: + String value from the file, or None if read fails + """ + try: + with open(path, 'r') as f: + return f.read().strip() + except (IOError, OSError): + return None + + def _write_sysfs_file(self, path, value): + """ + Write a value to a sysfs file + + Args: + path: Path to the sysfs file + value: Value to write + + Returns: + True if write succeeds, False otherwise + """ + try: + with open(path, 'w') as f: + f.write(str(value)) + return True + except (IOError, OSError): + return False + + def get_name(self): + """ + Retrieves the name of the fan + + Returns: + String containing the name of the fan + """ + return self.name + + def get_presence(self): + """ + Retrieves the presence of the fan + + Returns: + True if fan is present, False if not + """ + # On BMC, fans are always "present" if the TACH input exists + return os.path.exists(self.tach_input_path) + + def get_model(self): + """ + Retrieves the model of the fan + + Returns: + String containing the model of the fan + """ + return "AST2700-FAN" + + def get_serial(self): + """ + Retrieves the serial number of the fan + + Returns: + String containing the serial number of the fan + """ + return "N/A" + + def get_status(self): + """ + Retrieves the operational status of the fan + + Returns: + True if fan is operating properly, False if not + """ + # Fan is operational if it's present and speed can be read + if not self.get_presence(): + return False + + speed_rpm = self.get_speed_rpm() + return speed_rpm is not None + + def get_direction(self): + """ + Retrieves the direction of fan + + Returns: + A string, either FAN_DIRECTION_INTAKE or FAN_DIRECTION_EXHAUST + depending on fan direction + """ + # BMC fans don't have direction detection on EVB + return self.FAN_DIRECTION_NOT_APPLICABLE + + def get_speed_rpm(self): + """ + Retrieves the speed of fan in RPM + + Returns: + An integer, the fan speed in RPM, or None if not available + """ + value_str = self._read_sysfs_file(self.tach_input_path) + if value_str is None: + return None + + try: + return int(value_str) + except ValueError: + return None + + def get_speed(self): + """ + Retrieves the speed of fan as a percentage of full speed + + Returns: + An integer, the percentage of full fan speed, in the range 0 (off) + to 100 (full speed) + """ + # Get current PWM value + if self.pwm_path is None or not os.path.exists(self.pwm_path): + # If no PWM control, estimate from RPM + # Assume max speed is 10000 RPM (platform-specific) + rpm = self.get_speed_rpm() + if rpm is None: + return 0 + max_rpm = 10000 + speed_percent = min(100, int((rpm * 100) / max_rpm)) + return speed_percent + + pwm_str = self._read_sysfs_file(self.pwm_path) + if pwm_str is None: + return 0 + + try: + pwm_value = int(pwm_str) + # Convert PWM (0-255) to percentage (0-100) + return int((pwm_value * 100) / self.PWM_MAX) + except ValueError: + return 0 + + def get_target_speed(self): + """ + Retrieves the target (expected) speed of the fan + + Returns: + An integer, the percentage of full fan speed, in the range 0 (off) + to 100 (full speed) + """ + # Target speed is the same as current speed (no separate target register) + return self.get_speed() + + def get_speed_tolerance(self): + """ + Retrieves the speed tolerance of the fan + + Returns: + An integer, the percentage of variance from target speed which is + considered tolerable + """ + # Default tolerance of 20% + return 20 + + def set_speed(self, speed): + """ + Sets the fan speed + + Args: + speed: An integer, the percentage of full fan speed to set fan to, + in the range 0 (off) to 100 (full speed) + + Returns: + A boolean, True if speed is set successfully, False if not + """ + if self.is_psu_fan: + # PSU fans are controlled by the PSU itself + return False + + if speed < 0 or speed > 100: + return False + + if self.pwm_path is None or not os.path.exists(self.pwm_path): + return False + + # Convert percentage (0-100) to PWM value (0-255) + pwm_value = int((speed * self.PWM_MAX) / 100) + + return self._write_sysfs_file(self.pwm_path, pwm_value) + + def set_status_led(self, color): + """ + Sets the state of the fan status LED + + Args: + color: A string representing the color with which to set the + fan status LED + + Returns: + bool: True if status LED state is set successfully, False if not + """ + # BMC fans don't have individual status LEDs + return False + + def get_status_led(self): + """ + Gets the state of the fan status LED + + Returns: + A string, one of the predefined STATUS_LED_COLOR_* strings + """ + # BMC fans don't have individual status LEDs + return self.STATUS_LED_COLOR_OFF + diff --git a/platform/aspeed/sonic-platform-modules-nexthop/common/sonic_platform/fan_drawer.py b/platform/aspeed/sonic-platform-modules-nexthop/common/sonic_platform/fan_drawer.py new file mode 100644 index 00000000000..7e89313aeec --- /dev/null +++ b/platform/aspeed/sonic-platform-modules-nexthop/common/sonic_platform/fan_drawer.py @@ -0,0 +1,138 @@ +#!/usr/bin/env python3 + +""" +fan_drawer.py + +Implementation of FanDrawer class for Aspeed AST2700 BMC platform. +Since BMC platforms typically don't have physical fan drawers/trays, +we create virtual fan drawers with one fan each to satisfy SONiC's +thermalctld requirements. +""" + +try: + from sonic_platform_base.fan_drawer_base import FanDrawerBase +except ImportError as e: + raise ImportError(str(e) + " - required module not found") + + +class FanDrawer(FanDrawerBase): + """ + Platform-specific FanDrawer class for Aspeed AST2700 BMC. + + Each FanDrawer represents a virtual drawer containing a single fan. + This is required because thermalctld reads fans from fan drawers, + not directly from the chassis. + """ + + def __init__(self, drawer_index, fan): + """ + Initialize a FanDrawer with a single fan. + + Args: + drawer_index: 0-based index of this fan drawer + fan: Fan object to be contained in this drawer + """ + FanDrawerBase.__init__(self) + self._drawer_index = drawer_index + self._fan_list.append(fan) + + def get_name(self): + """ + Retrieves the fan drawer name. + + Returns: + string: The name of the fan drawer (e.g., "FanDrawer1") + """ + return "FanDrawer{}".format(self._drawer_index + 1) + + def get_presence(self): + """ + Retrieves the presence of the fan drawer. + + Returns: + bool: True if fan drawer is present, False otherwise + """ + # Virtual fan drawers are always present + return True + + def get_status(self): + """ + Retrieves the operational status of the fan drawer. + + Returns: + bool: True if fan drawer is operating properly, False otherwise + """ + # Fan drawer status is based on the contained fan's status + if len(self._fan_list) > 0: + return self._fan_list[0].get_status() + return False + + def get_model(self): + """ + Retrieves the model number of the fan drawer. + + Returns: + string: Model number of the fan drawer + """ + return "N/A" + + def get_serial(self): + """ + Retrieves the serial number of the fan drawer. + + Returns: + string: Serial number of the fan drawer + """ + return "N/A" + + def get_status_led(self): + """ + Gets the state of the fan drawer LED. + + Returns: + string: One of the STATUS_LED_COLOR_* strings (GREEN, RED, etc.) + """ + return "N/A" + + def set_status_led(self, color): + """ + Sets the state of the fan drawer LED. + + Args: + color: A string representing the color with which to set the LED + + Returns: + bool: True if LED state is set successfully, False otherwise + """ + # LED control not supported on BMC platform + return False + + def get_maximum_consumed_power(self): + """ + Retrieves the maximum power drawn by the fan drawer. + + Returns: + float: Maximum power consumption in watts + """ + # Typical BMC fan power consumption + return 5.0 + + def is_replaceable(self): + """ + Indicate whether this fan drawer is replaceable. + + Returns: + bool: True if replaceable, False otherwise + """ + # Virtual fan drawers are not physically replaceable + return False + + def get_position_in_parent(self): + """ + Retrieves the 1-based relative physical position in parent device. + + Returns: + integer: The 1-based relative physical position in parent device + """ + return self._drawer_index + 1 + diff --git a/platform/aspeed/sonic-platform-modules-nexthop/common/sonic_platform/platform.py b/platform/aspeed/sonic-platform-modules-nexthop/common/sonic_platform/platform.py new file mode 100644 index 00000000000..ae6e37873d2 --- /dev/null +++ b/platform/aspeed/sonic-platform-modules-nexthop/common/sonic_platform/platform.py @@ -0,0 +1,32 @@ +""" +SONiC Platform API - Platform class for Nexthop B27 BMC +""" + +try: + from sonic_platform.chassis import Chassis +except ImportError as e: + raise ImportError(str(e) + " - required module not found") + + +class Platform: + """ + Platform class for Nexthop B27 BMC + + Provides access to chassis-level functionality. + """ + + def __init__(self): + """ + Initialize the Platform object + """ + self._chassis = Chassis() + + def get_chassis(self): + """ + Retrieves the chassis object + + Returns: + An object derived from ChassisBase representing the chassis + """ + return self._chassis + diff --git a/platform/aspeed/sonic-platform-modules-nexthop/common/sonic_platform/switch_host_module.py b/platform/aspeed/sonic-platform-modules-nexthop/common/sonic_platform/switch_host_module.py new file mode 100644 index 00000000000..99d29073206 --- /dev/null +++ b/platform/aspeed/sonic-platform-modules-nexthop/common/sonic_platform/switch_host_module.py @@ -0,0 +1,346 @@ +""" +SwitchHostModule implementation for Nexthop BMC Platform + +This module provides an abstraction for the BMC's interaction with the +switch host CPU, including power management operations. +""" + +import subprocess +import json +import os +import sys +import time + +try: + from sonic_platform_base.module_base import ModuleBase +except ImportError as e: + raise ImportError(str(e) + " - required module not found") + + +class SwitchHostModule(ModuleBase): + """ + Module representing the main x86 Switch Host CPU managed by the BMC. + + This module provides an abstraction for the BMC's interaction with the + switch host CPU, including power management and status reporting. + """ + + # Hardware register constants + CPE_CTRL_REG = "0x14C0B208" # CPU reset control register + RESET_VALUE_ASSERT = "2" # Write 2 => drive low (into reset) + RESET_VALUE_DEASSERT = "3" # Write 3 => drive high (out of reset) + + def __init__(self, module_index=0): + """ + Initialize SwitchHostModule + + Args: + module_index: Module index (default 0, as BMC manages single switch host) + """ + super(SwitchHostModule, self).__init__() + self.module_index = module_index + + def _write_reset_register(self, value): + """ + Write to the switch CPU reset register using devmem. + + Args: + value: Register value to write (str) + + Returns: + bool: True if operation succeeded, False otherwise + """ + try: + cmd = ["busybox", "devmem", self.CPE_CTRL_REG, "32", value] + result = subprocess.run(cmd, capture_output=True, timeout=5) + if result.returncode != 0: + sys.stderr.write(f"devmem write failed: {result.stderr}\n") + return False + return True + except Exception as e: + sys.stderr.write(f"Failed to write reset register: {e}\n") + return False + + def _read_reset_register(self): + """ + Read current value from switch CPU reset register. + + Returns: + int: 0 or 1 (CPU in reset or out of reset), -1 on error + """ + try: + cmd = ["busybox", "devmem", self.CPE_CTRL_REG, "32"] + result = subprocess.run(cmd, capture_output=True, timeout=5, text=True) + if result.returncode == 0: + # Parse hex value (e.g., "0x00000001") + value = int(result.stdout.strip(), 16) + return value & 0x1 # Extract bit 0: 0=in reset, 1=out of reset + except Exception as e: + sys.stderr.write(f"Failed to read reset register: {e}\n") + return -1 + + def _is_cpu_released_from_reset(self): + """ + Check if CPU is released from reset. + + Returns: + bool: True if CPU is out of reset, False otherwise + """ + value = self._read_reset_register() + return bool(value & 0x1) # 1 = out of reset + + ############################################## + # Core Power Management APIs + ############################################## + + def set_admin_state(self, up): + """ + Power ON (up=True) or Power OFF (up=False) the switch host CPU. + + Args: + up: True to power on (release from reset), False to power off (put into reset) + + Returns: + bool: True if operation succeeded, False otherwise + """ + if up: + # Power ON: Drive high (release from reset) + sys.stderr.write("SwitchHost: Powering ON (releasing from reset)...\n") + return self._write_reset_register(self.RESET_VALUE_DEASSERT) + else: + # Power OFF: Drive low (assert reset) + sys.stderr.write("SwitchHost: Powering OFF (asserting reset)...\n") + return self._write_reset_register(self.RESET_VALUE_ASSERT) + + def do_power_cycle(self): + """ + Power cycle the switch host CPU. + + Sequence: + 1. Assert reset (drive low) + 2. Wait 2 seconds + 3. Deassert reset (drive high) + + Returns: + bool: True if operation succeeded, False otherwise + """ + sys.stderr.write("SwitchHost: Starting power cycle...\n") + + # Step 1: Assert reset (power off) + if not self._write_reset_register(self.RESET_VALUE_ASSERT): + sys.stderr.write("SwitchHost: Failed to assert reset\n") + return False + + sys.stderr.write("SwitchHost: Reset asserted, waiting 2 seconds...\n") + + time.sleep(2) + + # Step 3: Deassert reset (power on) + if not self._write_reset_register(self.RESET_VALUE_DEASSERT): + sys.stderr.write("SwitchHost: Failed to deassert reset\n") + return False + + sys.stderr.write("SwitchHost: Power cycle complete\n") + return True + + def reboot(self, reboot_type=None): + """ + Alias for do_power_cycle() to maintain ModuleBase compatibility. + + Args: + reboot_type: Reboot type (unused, for compatibility) + + Returns: + bool: True if operation succeeded + """ + return self.do_power_cycle() + + def get_oper_status(self): + """ + Get operational status of the switch host CPU. + + Based on hardware register read: + - Register value bit 0 = 1 (out of reset) => MODULE_STATUS_ONLINE + - Register value bit 0 = 0 (in reset) => MODULE_STATUS_OFFLINE + - Read error => MODULE_STATUS_FAULT + + Returns: + str: One of MODULE_STATUS_ONLINE, MODULE_STATUS_OFFLINE, MODULE_STATUS_FAULT + """ + reg_value = self._read_reset_register() + + if reg_value == -1: + # Read error + return self.MODULE_STATUS_FAULT + + if self._is_cpu_released_from_reset(): + # Bit 0 = 1: CPU is out of reset + return self.MODULE_STATUS_ONLINE + else: + # Bit 0 = 0: CPU is in reset + return self.MODULE_STATUS_OFFLINE + + ############################################## + # Required ModuleBase Implementations + ############################################## + + def get_name(self): + """ + Returns module name: SWITCH_HOST + + Returns: + str: Module name + """ + return f"{self.MODULE_TYPE_SWITCH_HOST}" + + def get_type(self): + """ + Returns module type + + Returns: + str: Module type (SWITCH_HOST) + """ + return self.MODULE_TYPE_SWITCH_HOST + + def get_slot(self): + """ + Returns slot number (0 for single switch host) + + Returns: + int: Slot number + """ + return 0 + + def get_presence(self): + """ + Switch host is always present (fixed hardware) + + Returns: + bool: True (always present) + """ + return True + + def get_description(self): + """ + Returns description + + Returns: + str: Module description + """ + return "Main x86 Switch Host CPU managed by BMC" + + def get_maximum_consumed_power(self): + """ + Returns maximum consumed power. + Returns: + None: Power measurement not available for switch host module + """ + return None + + def get_base_mac(self): + """ + Not applicable for switch host + + Raises: + NotImplementedError + """ + raise NotImplementedError + + def get_system_eeprom_info(self): + """ + Not applicable for switch host + + Raises: + NotImplementedError + """ + raise NotImplementedError + + def get_serial(self): + """ + Read the system/chassis serial number from the switch card EEPROM. + + Returns: + str: Serial number string if found, else "N/A" + """ + SWITCH_CARD_EEPROM_I2C_PATH = "/sys/bus/i2c/devices/i2c-10" + SWITCH_CARD_EEPROM_PATH = "/sys/bus/i2c/devices/10-0050/eeprom" + CHIP_TYPE = "24c64" + INSTANTIATE_TIMEOUT_SEC = 1.0 + created = False + + # Helper: instantiate device if missing + def ensure_device(): + nonlocal created + if os.path.exists(SWITCH_CARD_EEPROM_PATH): + return True + + new_dev_path = SWITCH_CARD_EEPROM_I2C_PATH + "/new_device" + if not os.path.exists(new_dev_path): + return False + + try: + with open(new_dev_path, "w") as f: + f.write(f"{CHIP_TYPE} 0x50\n") + created = True + except OSError: + return False + + # Poll for eeprom node to appear + deadline = time.time() + INSTANTIATE_TIMEOUT_SEC + while time.time() < deadline: + if os.path.exists(SWITCH_CARD_EEPROM_PATH): + return True + time.sleep(0.05) + + return os.path.exists(SWITCH_CARD_EEPROM_PATH) + + # Helper: cleanup if we created the device + def cleanup(): + if not created: + return + delete_path_bus = SWITCH_CARD_EEPROM_I2C_PATH + "/delete_device" + if not os.path.exists(delete_path_bus): + return + try: + with open(delete_path_bus, "w") as f: + f.write("10-0050\n") + except OSError: + pass + + if not ensure_device(): + return "N/A" + + try: + with open(SWITCH_CARD_EEPROM_PATH, "rb") as f: + e = f.read() + except Exception: + return "N/A" + finally: + cleanup() + + # Parse TlvInfo TLV 0x23 + if len(e) < 11 or e[0:7] != b"TlvInfo": + return "N/A" + + total_len = (e[9] << 8) | e[10] + idx = 11 + end = 11 + total_len + + while idx + 2 <= len(e) and idx < end: + t = e[idx] + l = e[idx + 1] + vstart = idx + 2 + vend = vstart + l + if vend > len(e): + break + + if t == 0x23: # Serial Number TLV + return e[vstart:vend].decode("ascii", errors="ignore").strip() + + if t == 0xFE: # CRC TLV + break + + idx = vend + + return "N/A" + diff --git a/platform/aspeed/sonic-platform-modules-nexthop/common/sonic_platform/thermal.py b/platform/aspeed/sonic-platform-modules-nexthop/common/sonic_platform/thermal.py new file mode 100644 index 00000000000..655da029d1d --- /dev/null +++ b/platform/aspeed/sonic-platform-modules-nexthop/common/sonic_platform/thermal.py @@ -0,0 +1,207 @@ +""" +SONiC Platform API - Thermal class for Aspeed BMC + +This module provides the Thermal class for Aspeed AST2700 BMC platform. +Thermal sensors are exposed via the IIO-HWMON bridge from ADC channels. +""" + +import os + +try: + from sonic_platform_base.thermal_base import ThermalBase +except ImportError as e: + raise ImportError(str(e) + " - required module not found") + + +class Thermal(ThermalBase): + """ + Thermal sensor class for Aspeed AST2700 BMC platform + + Reads temperature/voltage values from ADC channels exposed via iio-hwmon. + The AST2700 has 16 ADC channels available for monitoring. + """ + + # Base path for IIO-HWMON device + HWMON_IIO_PATH = "/sys/class/hwmon/hwmon10" + + def __init__(self, thermal_index): + """ + Initialize a Thermal object + + Args: + thermal_index: 0-based index of the thermal sensor (0-15 for 16 ADC channels) + """ + ThermalBase.__init__(self) + + self.index = thermal_index + self.name = f"ADC{thermal_index + 1}" + + # ADC channel input file (1-based in sysfs) + self.thermal_input_path = os.path.join( + self.HWMON_IIO_PATH, + f"in{thermal_index + 1}_input" + ) + + def _read_sysfs_file(self, path): + """ + Read a value from a sysfs file + + Args: + path: Path to the sysfs file + + Returns: + String value from the file, or None if read fails + """ + try: + with open(path, 'r') as f: + return f.read().strip() + except (IOError, OSError): + return None + + def get_name(self): + """ + Retrieves the name of the thermal sensor + + Returns: + String containing the name of the thermal sensor + """ + return self.name + + def get_presence(self): + """ + Retrieves the presence of the thermal sensor + + Returns: + True if thermal sensor is present, False if not + """ + # ADC channels are always present on the BMC + return os.path.exists(self.thermal_input_path) + + def get_model(self): + """ + Retrieves the model of the thermal sensor + + Returns: + String containing the model of the thermal sensor + """ + return "AST2700-ADC" + + def get_serial(self): + """ + Retrieves the serial number of the thermal sensor + + Returns: + String containing the serial number of the thermal sensor + """ + return "N/A" + + def get_status(self): + """ + Retrieves the operational status of the thermal sensor + + Returns: + True if thermal sensor is operating properly, False if not + """ + return self.get_presence() and self.get_temperature() is not None + + def get_temperature(self): + """ + Retrieves current temperature reading from thermal sensor + + Returns: + A float number of current temperature in Celsius up to nearest + thousandth of one degree Celsius, e.g. 30.125 + + Note: + ADC channels return millivolts. For actual temperature sensors, + the voltage needs to be converted based on the sensor type. + For now, we return the raw millivolt value divided by 1000 as + a placeholder. Platform-specific implementations should override + this with proper temperature conversion formulas. + """ + value_str = self._read_sysfs_file(self.thermal_input_path) + if value_str is None: + return None + + try: + # ADC returns millivolts, convert to a temperature-like value + # This is a placeholder - actual conversion depends on sensor type + millivolts = float(value_str) + # For demonstration, just return mV/10 as "temperature" + # Real implementation would use proper sensor calibration + return millivolts / 10.0 + except ValueError: + return None + + def get_high_threshold(self): + """ + Retrieves the high threshold temperature of thermal sensor + + Returns: + A float number, the high threshold temperature of thermal in + Celsius up to nearest thousandth of one degree Celsius + """ + # Default threshold - should be configured per platform + return 85.0 + + def get_low_threshold(self): + """ + Retrieves the low threshold temperature of thermal sensor + + Returns: + A float number, the low threshold temperature of thermal in + Celsius up to nearest thousandth of one degree Celsius + """ + # Default threshold - should be configured per platform + return 0.0 + + def get_high_critical_threshold(self): + """ + Retrieves the high critical threshold temperature of thermal sensor + + Returns: + A float number, the high critical threshold temperature of thermal + in Celsius up to nearest thousandth of one degree Celsius + """ + # Default threshold - should be configured per platform + return 100.0 + + def get_low_critical_threshold(self): + """ + Retrieves the low critical threshold temperature of thermal sensor + + Returns: + A float number, the low critical threshold temperature of thermal + in Celsius up to nearest thousandth of one degree Celsius + """ + # Default threshold - should be configured per platform + return -10.0 + + def set_high_threshold(self, temperature): + """ + Sets the high threshold temperature of thermal sensor + + Args: + temperature: A float number up to nearest thousandth of one degree + Celsius, e.g. 30.125 + + Returns: + A boolean, True if threshold is set successfully, False if not + """ + # ADC channels don't support setting thresholds via sysfs + return False + + def set_low_threshold(self, temperature): + """ + Sets the low threshold temperature of thermal sensor + + Args: + temperature: A float number up to nearest thousandth of one degree + Celsius, e.g. 30.125 + + Returns: + A boolean, True if threshold is set successfully, False if not + """ + # ADC channels don't support setting thresholds via sysfs + return False + diff --git a/platform/aspeed/sonic-platform-modules-nexthop/common/sonic_platform/watchdog.py b/platform/aspeed/sonic-platform-modules-nexthop/common/sonic_platform/watchdog.py new file mode 100644 index 00000000000..d24e29733e6 --- /dev/null +++ b/platform/aspeed/sonic-platform-modules-nexthop/common/sonic_platform/watchdog.py @@ -0,0 +1,211 @@ +""" +SONiC Platform API - Watchdog class for Aspeed BMC + +This module provides the Watchdog class for Aspeed AST2700 BMC platform. +""" + +import os +import fcntl +import array +import ctypes + +try: + from sonic_platform_base.watchdog_base import WatchdogBase +except ImportError as e: + raise ImportError(str(e) + " - required module not found") + + +# Watchdog ioctl commands (from Linux kernel watchdog.h) +WDIOC_GETSUPPORT = 0x80285700 +WDIOC_GETSTATUS = 0x80045701 +WDIOC_GETBOOTSTATUS = 0x80045702 +WDIOC_GETTEMP = 0x80045703 +WDIOC_SETOPTIONS = 0x80045704 +WDIOC_KEEPALIVE = 0x80045705 +WDIOC_SETTIMEOUT = 0xc0045706 +WDIOC_GETTIMEOUT = 0x80045707 +WDIOC_SETPRETIMEOUT = 0xc0045708 +WDIOC_GETPRETIMEOUT = 0x80045709 +WDIOC_GETTIMELEFT = 0x8004570a + +# Watchdog options +WDIOS_DISABLECARD = 0x0001 +WDIOS_ENABLECARD = 0x0002 + +# Default watchdog device +WATCHDOG_DEVICE = "/dev/watchdog0" + +# Sysfs paths for AST2700 watchdog +WATCHDOG_SYSFS_PATH = "/sys/class/watchdog/watchdog0/" + + +class Watchdog(WatchdogBase): + """ + Watchdog class for Aspeed AST2700 BMC platform + + Provides hardware watchdog functionality using the aspeed_wdt driver. + """ + + def __init__(self): + """ + Initialize the Watchdog object + """ + self.watchdog_device = WATCHDOG_DEVICE + self.watchdog_fd = None + self.timeout = 0 + + def _read_sysfs_int(self, filename): + """ + Read an integer value from sysfs + + Args: + filename: Name of the file in WATCHDOG_SYSFS_PATH + + Returns: + Integer value, or -1 on error + """ + try: + with open(os.path.join(WATCHDOG_SYSFS_PATH, filename), 'r') as f: + return int(f.read().strip()) + except (IOError, OSError, ValueError): + return -1 + + def _read_sysfs_str(self, filename): + """ + Read a string value from sysfs + + Args: + filename: Name of the file in WATCHDOG_SYSFS_PATH + + Returns: + String value, or empty string on error + """ + try: + with open(os.path.join(WATCHDOG_SYSFS_PATH, filename), 'r') as f: + return f.read().strip() + except (IOError, OSError): + return "" + + def _open_watchdog(self): + """ + Open the watchdog device file + + Returns: + True if successful, False otherwise + """ + if self.watchdog_fd is None: + try: + self.watchdog_fd = os.open(self.watchdog_device, os.O_WRONLY) + except (IOError, OSError): + return False + return True + + def _disablewatchdog(self): + """ + Turn off the watchdog timer + """ + req = array.array('I', [WDIOS_DISABLECARD]) + fcntl.ioctl(self.watchdog_fd, WDIOC_SETOPTIONS, req, False) + + def _enablewatchdog(self): + """ + Turn on the watchdog timer + """ + req = array.array('I', [WDIOS_ENABLECARD]) + fcntl.ioctl(self.watchdog_fd, WDIOC_SETOPTIONS, req, False) + + def _keepalive(self): + """ + Keep alive watchdog timer + """ + fcntl.ioctl(self.watchdog_fd, WDIOC_KEEPALIVE) + + def _settimeout(self, seconds): + """ + Set watchdog timer timeout + @param seconds - timeout in seconds + @return is the actual set timeout + """ + req = array.array('I', [seconds]) + fcntl.ioctl(self.watchdog_fd, WDIOC_SETTIMEOUT, req, True) + + return int(req[0]) + + def _gettimeout(self): + """ + Get watchdog timeout + @return watchdog timeout + """ + return self._read_sysfs_int("timeout") + + def is_armed(self): + """ + Retrieves the armed state of the hardware watchdog + + Returns: + A boolean, True if watchdog is armed, False if not + """ + # Check the state from sysfs + state = self._read_sysfs_str("state") + if (state != 'inactive'): + return True + else: + return False + + def arm(self, seconds): + """ + Arm the hardware watchdog with a timeout of seconds + + Args: + seconds: Timeout value in seconds + + Returns: + An integer specifying the actual number of seconds the watchdog + was armed with. On failure returns -1. + """ + if (seconds < 0 or seconds > 300 ): + return -1 + + if not self._open_watchdog(): + return -1 + try: + if self.timeout != seconds: + self.timeout = self._settimeout(seconds) + if self.is_armed(): + self._keepalive() + else: + self._enablewatchdog() + except (IOError, OSError): + return -1 + + return self.timeout + + def disarm(self): + """ + Disarm the hardware watchdog + + Returns: + A boolean, True if watchdog is disarmed successfully, False if not + """ + if not self._open_watchdog(): + return False + + try: + self._disablewatchdog() + self.timeout = 0 + + except (IOError, OSError): + return False + + return True + + def get_remaining_time(self): + """ + Get the number of seconds remaining on the watchdog timer + + Returns: + An integer specifying the number of seconds remaining on the + watchdog timer. If the watchdog is not armed, returns -1. + """ + return -1 + diff --git a/platform/aspeed/sonic-platform-modules-nexthop/common/systemd/sonic-usb-network-udev-init.service b/platform/aspeed/sonic-platform-modules-nexthop/common/systemd/sonic-usb-network-udev-init.service new file mode 100644 index 00000000000..96902f0c2e2 --- /dev/null +++ b/platform/aspeed/sonic-platform-modules-nexthop/common/systemd/sonic-usb-network-udev-init.service @@ -0,0 +1,17 @@ +[Unit] +Description=Aspeed USB Network Gadget udev Rules Initialization +Documentation=https://github.com/sonic-net/sonic-buildimage +DefaultDependencies=no +After=local-fs.target +Before=usb-network-init.service + +[Service] +Type=oneshot +ExecStart=/usr/local/bin/sonic-usb-network-udev-init.sh +RemainAfterExit=yes +StandardOutput=journal +StandardError=journal + +[Install] +WantedBy=multi-user.target + diff --git a/platform/aspeed/sonic-platform-modules-nexthop/common/systemd/usb-network-init.service b/platform/aspeed/sonic-platform-modules-nexthop/common/systemd/usb-network-init.service new file mode 100644 index 00000000000..0b0dd0ad23c --- /dev/null +++ b/platform/aspeed/sonic-platform-modules-nexthop/common/systemd/usb-network-init.service @@ -0,0 +1,14 @@ +[Unit] +Description=NextHop USB Network Gadget Service +Documentation=https://github.com/sonic-net/SONiC/wiki/ +DefaultDependencies=no +After=systemd-modules-load.service local-fs.target +Before=networking.service + +[Service] +Type=oneshot +ExecStart=/usr/local/bin/usb-network-init.sh +RemainAfterExit=yes + +[Install] +WantedBy=multi-user.target diff --git a/platform/aspeed/sonic-platform-modules-nexthop/debian/changelog b/platform/aspeed/sonic-platform-modules-nexthop/debian/changelog new file mode 100644 index 00000000000..ab401fe88c0 --- /dev/null +++ b/platform/aspeed/sonic-platform-modules-nexthop/debian/changelog @@ -0,0 +1,6 @@ +sonic-platform-aspeed-nexthop (1.0) unstable; urgency=low + + * Initial release + + -- Nexthop Mon, 17 Feb 2025 00:00:00 +0000 + diff --git a/platform/aspeed/sonic-platform-modules-nexthop/debian/control b/platform/aspeed/sonic-platform-modules-nexthop/debian/control new file mode 100644 index 00000000000..7bb6ab3a23c --- /dev/null +++ b/platform/aspeed/sonic-platform-modules-nexthop/debian/control @@ -0,0 +1,19 @@ +Source: sonic-platform-aspeed-nexthop +Section: misc +Priority: optional +Maintainer: Nexthop +Build-Depends: debhelper-compat (= 13), dh-python, python3-all, python3-setuptools, python3-wheel +Standards-Version: 3.9.6 + +Package: sonic-platform-aspeed-nexthop-common +Architecture: arm64 +Depends: ${misc:Depends}, ${python3:Depends} +Description: Common modules, USB network gadget configuration and initialization scripts + shared across all NextHop Aspeed-based BMC cards. + +Package: sonic-platform-aspeed-nexthop-b27 +Architecture: arm64 +Depends: ${misc:Depends}, ${python3:Depends}, sonic-platform-aspeed-nexthop-common +Description: SONiC platform support for NextHop B27 + This package provides platform-specific implementation for NextHop's + B27 card based on Aspeed AST2700 BMC. diff --git a/platform/aspeed/sonic-platform-modules-nexthop/debian/rules b/platform/aspeed/sonic-platform-modules-nexthop/debian/rules new file mode 100755 index 00000000000..52fadd763a4 --- /dev/null +++ b/platform/aspeed/sonic-platform-modules-nexthop/debian/rules @@ -0,0 +1,130 @@ +#!/usr/bin/make -f + +include /usr/share/dpkg/pkg-info.mk + +export INSTALL_MOD_DIR := extra + +export KVERSION ?= $(shell uname -r) +export KERNEL_SRC ?= /lib/modules/$(KVERSION) +KERNEL_BUILD := $(KERNEL_SRC)/build +MOD_SRC_DIR := $(shell pwd) +MODULE_DIRS := + +# Common - shared across all NextHop BMC cards +MODULE_DIRS += common +# Card-specific +MODULE_DIRS += b27 + +# Directory names used in card-specific directories +SERVICE_DIR := service +SYSTEMD_DIR := systemd +SCRIPTS_DIR := scripts +CFG_DIR := cfg + +# Uncomment this to turn on verbose mode. +#export DH_VERBOSE=1 + +PACKAGE_PRE_NAME := sonic-platform-aspeed-nexthop + +%: + dh $@ --with python3 --buildsystem=pybuild + +override_dh_auto_build: + set -e + # Build kernel modules if they exist + (for mod in $(MODULE_DIRS); do \ + set -e; \ + if [ -f $(MOD_SRC_DIR)/$${mod}/modules/Makefile ]; then \ + if [ ! -d "$(KERNEL_BUILD)" ]; then \ + echo "WARNING: Kernel build directory $(KERNEL_BUILD) not found. Skipping kernel module build for $${mod}."; \ + else \ + $(MAKE) -C $(KERNEL_BUILD) M=$(MOD_SRC_DIR)/$${mod}/modules modules; \ + fi; \ + fi; \ + done) + # Build Python wheel from root setup.py + python3 setup.py bdist_wheel -d $(MOD_SRC_DIR) + echo "Finished making sonic_platform whl package" + +override_dh_auto_test: +# Skip tests for now + +override_dh_usrlocal: +# Needed since we are installing files to /usr/local + +override_dh_installsystemd: +# Disables dh_installsystemd from autogenerating postinst scripts which +# prematurely start platform services. + +override_dh_auto_install: + set -e + (for mod in $(MODULE_DIRS); do \ + set -e; \ + pkg_name=$(PACKAGE_PRE_NAME)-$${mod}; \ + dh_installdirs -p$${pkg_name} /lib/systemd/system; \ + dh_installdirs -p$${pkg_name} /usr/local/bin; \ + dh_installdirs -p$${pkg_name} etc/modules-load.d; \ + if [ -f $(MOD_SRC_DIR)/$${mod}/modules/Makefile ]; then \ + if [ -d "$(KERNEL_BUILD)" ]; then \ + dh_installdirs -p$${pkg_name} $(KERNEL_SRC)/$(INSTALL_MOD_DIR); \ + if [ -n "$$(ls -A $(MOD_SRC_DIR)/$${mod}/modules/*.ko 2>/dev/null)" ]; then \ + cp $(MOD_SRC_DIR)/$${mod}/modules/*.ko \ + debian/$${pkg_name}$(KERNEL_SRC)/$(INSTALL_MOD_DIR)/; \ + fi; \ + fi; \ + fi; \ + if [ -d $(MOD_SRC_DIR)/$${mod}/$(SERVICE_DIR) ]; then \ + if [ -n "$$(ls -A $(MOD_SRC_DIR)/$${mod}/$(SERVICE_DIR)/*.service 2>/dev/null)" ]; then \ + cp $(MOD_SRC_DIR)/$${mod}/$(SERVICE_DIR)/*.service \ + debian/$${pkg_name}/lib/systemd/system/; \ + fi; \ + fi; \ + if [ -d $(MOD_SRC_DIR)/$${mod}/$(SYSTEMD_DIR) ]; then \ + if [ -n "$$(ls -A $(MOD_SRC_DIR)/$${mod}/$(SYSTEMD_DIR)/*.service 2>/dev/null)" ]; then \ + cp $(MOD_SRC_DIR)/$${mod}/$(SYSTEMD_DIR)/*.service \ + debian/$${pkg_name}/lib/systemd/system/; \ + fi; \ + fi; \ + if [ -d $(MOD_SRC_DIR)/$${mod}/$(SCRIPTS_DIR) ]; then \ + if [ -n "$$(ls -A $(MOD_SRC_DIR)/$${mod}/$(SCRIPTS_DIR)/* 2>/dev/null)" ]; then \ + cp $(MOD_SRC_DIR)/$${mod}/$(SCRIPTS_DIR)/* \ + debian/$${pkg_name}/usr/local/bin/; \ + fi; \ + fi; \ + if [ -d $(MOD_SRC_DIR)/$${mod}/$(CFG_DIR) ]; then \ + if [ -n "$$(ls -A $(MOD_SRC_DIR)/$${mod}/$(CFG_DIR)/* 2>/dev/null)" ]; then \ + cp $(MOD_SRC_DIR)/$${mod}/$(CFG_DIR)/* \ + debian/$${pkg_name}/etc/modules-load.d/; \ + fi; \ + fi; \ + done) + +override_dh_install: + set -e + # Get all package names from debian/control + (for pkg_name in $$(dh_listpackages); do \ + set -e; \ + if [ "$${pkg_name}" = "$(PACKAGE_PRE_NAME)-common" ]; then \ + continue; \ + fi; \ + if [ -f sonic_platform-1.0-py3-none-any.whl ]; then \ + card_name="$${pkg_name#$(PACKAGE_PRE_NAME)-}"; \ + device_name="arm64-nexthop_$${card_name}-r0"; \ + dh_installdirs -p$${pkg_name} usr/share/sonic/device/$${device_name}/; \ + dh_install -p$${pkg_name} sonic_platform-1.0-py3-none-any.whl \ + usr/share/sonic/device/$${device_name}/; \ + fi; \ + done) + +override_dh_clean: + set -e + dh_clean + (for mod in $(MODULE_DIRS); do \ + set -e; \ + if [ -d "$(KERNEL_BUILD)" ] && [ -f "$(MOD_SRC_DIR)/$${mod}/modules/Makefile" ]; then \ + make -C $(KERNEL_BUILD) M=$(MOD_SRC_DIR)/$${mod}/modules clean; \ + fi; \ + done) + rm -f $(MOD_SRC_DIR)/*.whl + rm -rf $(MOD_SRC_DIR)/build $(MOD_SRC_DIR)/dist $(MOD_SRC_DIR)/*.egg-info + diff --git a/platform/aspeed/sonic-platform-modules-nexthop/debian/sonic-platform-aspeed-nexthop-b27.postinst b/platform/aspeed/sonic-platform-modules-nexthop/debian/sonic-platform-aspeed-nexthop-b27.postinst new file mode 100755 index 00000000000..6208596db41 --- /dev/null +++ b/platform/aspeed/sonic-platform-modules-nexthop/debian/sonic-platform-aspeed-nexthop-b27.postinst @@ -0,0 +1,22 @@ +#!/bin/bash +set -e + +case "$1" in + configure) + if [ -f /host/machine.conf ]; then + . /host/machine.conf + DEVICE_NAME="$onie_platform" + else + echo "Warning: /host/machine.conf not found, cannot determine platform" + exit 1 + fi + DEVICE_DIR="/usr/share/sonic/device/${DEVICE_NAME}" + if [ -f "${DEVICE_DIR}"/*.whl ]; then + # Force reinstall to ensure this platform's wheel is installed + pip3 install --force-reinstall --no-deps "${DEVICE_DIR}"/*.whl + fi + ;; +esac + +#DEBHELPER# +exit 0 diff --git a/platform/aspeed/sonic-platform-modules-nexthop/debian/sonic-platform-aspeed-nexthop-common.postinst b/platform/aspeed/sonic-platform-modules-nexthop/debian/sonic-platform-aspeed-nexthop-common.postinst new file mode 100755 index 00000000000..2a926fc67d6 --- /dev/null +++ b/platform/aspeed/sonic-platform-modules-nexthop/debian/sonic-platform-aspeed-nexthop-common.postinst @@ -0,0 +1,39 @@ +#!/bin/bash +# postinst script for sonic-platform-aspeed-nexthop-common + +set -e + +case "$1" in + configure) + # Load USB gadget modules + # These may fail during image build (wrong arch/kernel) - that's OK + # On real hardware, if they fail, the service will fail to start (visible error) + echo "Loading USB gadget kernel modules..." + + for module in libcomposite usb_f_ncm u_ether aspeed_vhub; do + if modprobe "$module" 2>/dev/null; then + echo " Loaded module: $module" + elif lsmod | grep -q "^${module} "; then + echo " Module already loaded: $module" + else + echo " WARNING: Could not load module: $module" >&2 + echo " (This is expected during image build)" >&2 + fi + done + + # Update module dependencies + depmod -a 2>/dev/null || true + + # Enable USB network udev init service (must run before usb-network-init) + echo "Enabling USB network udev init service..." + systemctl enable --now sonic-usb-network-udev-init.service 2>/dev/null || true + + # Enable USB network service + echo "Enabling USB network service..." + systemctl enable --now usb-network-init.service 2>/dev/null || true + ;; +esac + +#DEBHELPER# + +exit 0 diff --git a/platform/aspeed/sonic-platform-modules-nexthop/setup.py b/platform/aspeed/sonic-platform-modules-nexthop/setup.py new file mode 100644 index 00000000000..f9d2f21b603 --- /dev/null +++ b/platform/aspeed/sonic-platform-modules-nexthop/setup.py @@ -0,0 +1,30 @@ +import os +from setuptools import setup + +setup( + name="sonic-platform", + version="1.0", + description="SONiC platform API implementation on NextHop Aspeed Platforms", + license="Apache 2.0", + author="Nexthop Team", + author_email="opensource@nexthop.ai", + url="https://github.com/nexthop-ai/sonic-buildimage", + packages=["sonic_platform"], + package_dir={ + "sonic_platform": "common/sonic_platform", + }, + classifiers=[ + "Development Status :: 3 - Alpha", + "Environment :: Plugins", + "Intended Audience :: Developers", + "Intended Audience :: Information Technology", + "Intended Audience :: System Administrators", + "License :: OSI Approved :: Apache Software License", + "Natural Language :: English", + "Operating System :: POSIX :: Linux", + "Programming Language :: Python :: 3.11", + "Topic :: Utilities", + ], + keywords="sonic SONiC platform PLATFORM aspeed bmc nexthop", +) + diff --git a/platform/aspeed/sonic-platform-modules-nokia/debian/changelog b/platform/aspeed/sonic-platform-modules-nokia/debian/changelog new file mode 100644 index 00000000000..319d0d02336 --- /dev/null +++ b/platform/aspeed/sonic-platform-modules-nokia/debian/changelog @@ -0,0 +1,6 @@ +sonic-platform-aspeed-nokia (1.0) unstable; urgency=low + + * Add support for nokia-aspeed-h6-128 + + -- Nokia Mon, 23 Feb 2025 09:35:58 +0800 + diff --git a/platform/aspeed/sonic-platform-modules-nokia/debian/control b/platform/aspeed/sonic-platform-modules-nokia/debian/control new file mode 100644 index 00000000000..50b8650f9d5 --- /dev/null +++ b/platform/aspeed/sonic-platform-modules-nokia/debian/control @@ -0,0 +1,12 @@ +Source: sonic-platform-aspeed-nokia +Section: misc +Priority: optional +Maintainer: Nokia +Build-Depends: debhelper-compat (= 13), dh-python, python3-all, python3-setuptools, python3-wheel +Standards-Version: 3.9.6 + +Package: sonic-platform-aspeed-nokia-h6-128 +Architecture: arm64 +Depends: ${misc:Depends}, ${python3:Depends} +Description: SONiC platform support for Nokia H6-128 AST2700 BMC + Support package for Nokia H6-128 BMC AST2720 platform diff --git a/platform/aspeed/sonic-platform-modules-nokia/debian/rules b/platform/aspeed/sonic-platform-modules-nokia/debian/rules new file mode 100755 index 00000000000..cb96554f251 --- /dev/null +++ b/platform/aspeed/sonic-platform-modules-nokia/debian/rules @@ -0,0 +1,74 @@ +#!/usr/bin/make -f + +include /usr/share/dpkg/pkg-info.mk +PACKAGE_PRE_NAME := sonic-platform-aspeed-nokia +ifneq ($(CROSS_BUILD_ENVIRON), y) +KVERSION ?= $(shell uname -r) +endif +KERNEL_SRC := /lib/modules/$(KVERSION) +INSTALL_MOD_DIR := kernel/extra/ +MOD_SRC_DIR:= $(shell pwd) +MODULE_DIRS := h6-128 +UTILS_DIR := utils +MODULE_DIR:= modules +SERVICE_DIR := service +PLATFORM_DIR := sonic_platform +CFG_DIR := cfg + +%: + dh $@ --with python3 --buildsystem=pybuild + +override_dh_auto_clean: + (set -e; for mod in $(MODULE_DIRS); do \ + if [ -f $(MOD_SRC_DIR)/$${mod}/$(MODULE_DIR)/Makefile ]; then \ + $(MAKE) clean -C $(KERNEL_SRC)/build M=$(MOD_SRC_DIR)/$${mod}/$(MODULE_DIR); \ + fi; \ + if [ -f $(MOD_SRC_DIR)/$${mod}/setup.py ]; then \ + PYBUILD_NAME=$${mod} pybuild --clean -d $${mod}; \ + fi; \ + cd $(MOD_SRC_DIR)/$${mod}; \ + rm -rf *.egg-info/; \ + rm -f *.whl; \ + cd $(MOD_SRC_DIR)/; \ + done) + dh_clean + +override_dh_auto_configure: + (for mod in $(MODULE_DIRS); do \ + if [ -f $(MOD_SRC_DIR)/$${mod}/setup.py ]; then \ + PYBUILD_NAME=$${mod} pybuild --configure -d $${mod}; \ + fi; \ + done) + +override_dh_auto_build: + (set -e; for mod in $(MODULE_DIRS); do \ + if [ -f $(MOD_SRC_DIR)/$${mod}/$(MODULE_DIR)/Makefile ]; then \ + make modules -C $(KERNEL_SRC)/build M=$(MOD_SRC_DIR)/$${mod}/$(MODULE_DIR) || exit 1; \ + fi; \ + cd $(MOD_SRC_DIR)/$${mod}; \ + python3 setup.py build; \ + python3 setup.py bdist_wheel -d $(MOD_SRC_DIR)/$${mod}; \ + cd $(MOD_SRC_DIR); \ + done) + +override_dh_auto_test: + # No tests to run + +override_dh_usrlocal: + # debian/sonic-platform-<>-<>/usr/local/bin/* are already done + +override_dh_auto_install: + set -e + (for mod in $(MODULE_DIRS); do \ + pkg_name=$(PACKAGE_PRE_NAME)-$${mod}; \ + dh_installdirs -p$${pkg_name} usr/local/bin/; \ + dh_installdirs -p$${pkg_name} etc/modules-load.d/; \ + if [ -f $(MOD_SRC_DIR)/$${mod}/$(MODULE_DIR)/Makefile ]; then \ + dh_installdirs -p$${pkg_name} /$(KERNEL_SRC)/$(INSTALL_MOD_DIR); \ + cp $(MOD_SRC_DIR)/$${mod}/$(MODULE_DIR)/*.ko debian/$(PACKAGE_PRE_NAME)-$${mod}/$(KERNEL_SRC)/$(INSTALL_MOD_DIR); \ + fi; \ + cd $(MOD_SRC_DIR)/$${mod}; \ + python3 setup.py install --root=$(MOD_SRC_DIR)/debian/$(PACKAGE_PRE_NAME)-$${mod} --install-layout=deb; \ + cd $(MOD_SRC_DIR); \ + done) + diff --git a/platform/aspeed/sonic-platform-modules-nokia/debian/sonic-platform-aspeed-nokia-h6-128.install b/platform/aspeed/sonic-platform-modules-nokia/debian/sonic-platform-aspeed-nokia-h6-128.install new file mode 100644 index 00000000000..8bf1459e61a --- /dev/null +++ b/platform/aspeed/sonic-platform-modules-nokia/debian/sonic-platform-aspeed-nokia-h6-128.install @@ -0,0 +1,4 @@ +h6-128/scripts/*.sh usr/local/bin/ +h6-128/service/*.service etc/systemd/system/ +h6-128/cfg/* etc/modules-load.d/ +h6-128/sonic_platform-1.0-py3-none-any.whl usr/share/sonic/device/arm64-nokia_bmc_h6_128-r0/ diff --git a/platform/aspeed/sonic-platform-modules-nokia/debian/sonic-platform-aspeed-nokia-h6-128.postinst b/platform/aspeed/sonic-platform-modules-nokia/debian/sonic-platform-aspeed-nokia-h6-128.postinst new file mode 100644 index 00000000000..cdb0288aad9 --- /dev/null +++ b/platform/aspeed/sonic-platform-modules-nokia/debian/sonic-platform-aspeed-nokia-h6-128.postinst @@ -0,0 +1,62 @@ +#!/bin/sh +# postinst script for sonic-platform-aspeed-nokia-h6-128 +# +# see: dh_installdeb(1) + +set -e + +# summary of how this script can be called: +# * `configure' +# * `abort-upgrade' +# * `abort-remove' `in-favour' +# +# * `abort-remove' +# * `abort-deconfigure' `in-favour' +# `removing' +# +# for details, see https://www.debian.org/doc/debian-policy/ or +# the debian-policy package + + +case "$1" in + configure) + echo "Loading USB gadget kernel modules..." + for module in libcomposite usb_f_ncm u_ether aspeed_vhub; do + if modprobe "$module" 2>/dev/null; then + echo " Loaded module: $module" + elif lsmod | grep -q "^${module} "; then + echo " Module already loaded: $module" + else + echo " WARNING: Could not load module: $module" >&2 + echo " (This is expected during image build)" >&2 + fi + done + depmod -a 2>/dev/null || true + + # Enable USB network udev init service (must run before usb-network-init) + echo "Enabling USB network udev init service..." + systemctl enable --now sonic-usb-network-udev-init.service 2>/dev/null || true + + systemctl restart kmod + echo "Enabling USB network service..." + systemctl enable --now usb-network-init.service + + systemctl enable nokia-bmc-h6-128-init.service + systemctl start nokia-bmc-h6-128-init.service + ;; + + abort-upgrade|abort-remove|abort-deconfigure) + ;; + + *) + echo "postinst called with unknown argument \`$1'" >&2 + exit 1 + ;; +esac + +# dh_installdeb will replace this with shell code automatically +# generated by other debhelper scripts. + +#DEBHELPER# + +exit 0 diff --git a/platform/aspeed/sonic-platform-modules-nokia/h6-128/cfg/usb-gadget.conf b/platform/aspeed/sonic-platform-modules-nokia/h6-128/cfg/usb-gadget.conf new file mode 100644 index 00000000000..cf656c279bf --- /dev/null +++ b/platform/aspeed/sonic-platform-modules-nokia/h6-128/cfg/usb-gadget.conf @@ -0,0 +1,6 @@ +# USB Gadget kernel modules for BMC platforms +# Loaded at boot by systemd-modules-load.service +libcomposite +aspeed_vhub +u_ether +usb_f_ncm diff --git a/platform/aspeed/sonic-platform-modules-nokia/h6-128/scripts/nokia-bmc-h6-128-init.sh b/platform/aspeed/sonic-platform-modules-nokia/h6-128/scripts/nokia-bmc-h6-128-init.sh new file mode 100755 index 00000000000..a7879650033 --- /dev/null +++ b/platform/aspeed/sonic-platform-modules-nokia/h6-128/scripts/nokia-bmc-h6-128-init.sh @@ -0,0 +1,48 @@ +#!/bin/bash + +# Platform init script +FLAG_FILE="/tmp/nokia_bmc_h6_128_init_done" +if [ ! -f "$FLAG_FILE" ]; then + sudo touch "$FLAG_FILE" +else + echo "Script has already run since the last reboot. Exiting." + exit 0 +fi + +file_exists() { + # Wait 10 seconds max till file exists + for((i=0; i<10; i++)); + do + [[ -f $1 ]] && return 0 + sleep 1 + done + return 1 +} + +assign_mac_eth0() +{ + MAC_ADDR=$(sudo decode-syseeprom -m) + if [ -n $MAC_ADDR ]; then + sudo ifconfig eth0 down + sudo ifconfig eth0 hw ether $MAC_ADDR + sudo ifconfig eth0 up + echo "Nokia-BMC-H6-128: Updating BMC eth0 mac address ${MAC_ADDR}" + else + echo "ERROR: MAC address is not found in SYS_EEPROM." + fi +} + +# Disable sysrq-trigger +echo 0 > /proc/sys/kernel/sysrq + +assign_mac_eth0 + +EEPROM_PATH="/sys/bus/i2c/devices/13-0056/eeprom" +if file_exists "$EEPROM_PATH"; then + chmod 644 "$EEPROM_PATH" +else + echo "Error: SYSEEPROM file not found" >&2 + exit 1 +fi + +exit 0 diff --git a/platform/aspeed/sonic-platform-modules-nokia/h6-128/scripts/sonic-usb-network-udev-init.sh b/platform/aspeed/sonic-platform-modules-nokia/h6-128/scripts/sonic-usb-network-udev-init.sh new file mode 100755 index 00000000000..2d40671b4ad --- /dev/null +++ b/platform/aspeed/sonic-platform-modules-nokia/h6-128/scripts/sonic-usb-network-udev-init.sh @@ -0,0 +1,46 @@ +#!/bin/bash +# Aspeed USB Network Gadget udev Rules Initialization Script +# This script installs udev rules to rename USB network interface from usb0 to bmc0 + +set -e + +LOG_FILE="/var/log/sonic-usb-network-udev-init.log" +PLATFORM_SYMLINK="/usr/share/sonic/platform" +RULES_SRC="${PLATFORM_SYMLINK}/70-usb-network.rules" +RULES_DEST="/etc/udev/rules.d/70-usb-network.rules" + +log() { + echo "[$(date '+%Y-%m-%d %H:%M:%S')] $*" | tee -a "$LOG_FILE" +} + +log "Starting USB network udev rules initialization..." + +# Check if rules source exists +if [ ! -f "$RULES_SRC" ]; then + log "ERROR: USB network udev rules not found at $RULES_SRC" + exit 1 +fi + +# Install udev rules +log "Installing USB network udev rules..." +cp "$RULES_SRC" "$RULES_DEST" +log "Installed: $RULES_DEST" + +# Reload udev to activate the rules +log "Reloading udev rules..." +udevadm control --reload-rules +udevadm trigger --subsystem-match=net +log "Udev rules reloaded and triggered" + +# Check if interface was renamed (if it already exists) +if ip link show bmc0 &>/dev/null; then + log "USB network interface 'bmc0' found" +elif ip link show usb0 &>/dev/null; then + log "WARNING: Interface 'usb0' still exists, rename may apply on next interface creation" +else + log "No USB network interface found yet (will be created by usb-network-init.sh)" +fi + +log "USB network udev rules initialization complete" +exit 0 + diff --git a/platform/aspeed/sonic-platform-modules-nokia/h6-128/scripts/switch_cpu_utils.sh b/platform/aspeed/sonic-platform-modules-nokia/h6-128/scripts/switch_cpu_utils.sh new file mode 100755 index 00000000000..dd92c46ad6c --- /dev/null +++ b/platform/aspeed/sonic-platform-modules-nokia/h6-128/scripts/switch_cpu_utils.sh @@ -0,0 +1,176 @@ +#!/bin/bash +# Switch CPU Utility Script for ASPEED AST2700 BMC +# Provides utilities to manage the switch CPU (x86) from BMC +# Uses the SwitchHostModule Python platform API +# +# Usage: switch_cpu_utils.sh [options] + +set -e + +# Script metadata +SCRIPT_NAME="$(basename "$0")" +LOG_TAG="switch-cpu-utils" + +####################################### +# Print usage information +####################################### +usage() { + cat << EOF +Usage: ${SCRIPT_NAME} [options] + +Switch CPU management utilities for ASPEED AST2700 BMC. +This script uses the SwitchHostModule platform API. + +Commands: + power-on Power on switch CPU (bring out of reset) + power-off Power off switch CPU (put into reset) + power-cycle Power cycle switch CPU + reset Power cycle switch CPU + status Show switch CPU operational status + help Show this help message + +Options: + -h, --help Show this help message + +Examples: + ${SCRIPT_NAME} power-on + ${SCRIPT_NAME} power-off + ${SCRIPT_NAME} power-cycle + ${SCRIPT_NAME} reset + ${SCRIPT_NAME} status + +EOF +} + +####################################### +# Execute Python platform API command +####################################### +execute_python_command() { + local command="$1" + + python3 << EOF +import sys + +try: + from sonic_platform.switch_host_module import SwitchHostModule + + # Create module instance + module = SwitchHostModule(module_index=0) + + # Assign the Bash variable to a Python variable safely + cmd = "${command}" + + # Execute command + if cmd == "power-on": + result = module.set_admin_state(True) + if result: + print("Switch CPU powered on successfully") + sys.exit(0) + else: + print("ERROR: Failed to power on switch CPU", file=sys.stderr) + sys.exit(1) + + elif cmd == "power-off": + result = module.set_admin_state(False) + if result: + print("Switch CPU powered off successfully") + sys.exit(0) + else: + print("ERROR: Failed to power off switch CPU", file=sys.stderr) + sys.exit(1) + + elif cmd == "power-cycle": + result = module.do_power_cycle() + if result: + print("Switch CPU power cycle completed successfully") + sys.exit(0) + else: + print("ERROR: Failed to power cycle switch CPU", file=sys.stderr) + sys.exit(1) + + elif cmd == "status": + status = module.get_oper_status() + name = module.get_name() + desc = module.get_description() + + print("Switch CPU Status:") + print(f" Name: {name}") + print(f" Description: {desc}") + print(f" Operational State: {status}") + + # Additional human-readable interpretation + if status == module.MODULE_STATUS_ONLINE: + print(" Interpretation: CPU is ONLINE (OUT OF RESET)") + elif status == module.MODULE_STATUS_OFFLINE: + print(" Interpretation: CPU is OFFLINE (held in reset)") + elif status == module.MODULE_STATUS_FAULT: + print(" Interpretation: ERROR reading CPU status") + else: + print(f" Interpretation: Unknown status ({status})") + + sys.exit(0) + + else: + print(f"ERROR: Unknown command '{cmd}'", file=sys.stderr) + sys.exit(1) + +except ImportError as e: + print(f"ERROR: Failed to import SwitchHostModule: {e}", file=sys.stderr) + print("Make sure the platform module is installed correctly", file=sys.stderr) + sys.exit(1) +except Exception as e: + print(f"ERROR: {e}", file=sys.stderr) + sys.exit(1) +EOF + + return $? +} + +####################################### +# Main function +####################################### +main() { + # Handle no arguments + if [ $# -eq 0 ]; then + echo "ERROR: No command specified" >&2 + echo "" + usage + exit 1 + fi + + # Parse command + COMMAND="$1" + shift + + case "${COMMAND}" in + power-on) + logger -t ${LOG_TAG} "Executing power-on command via SwitchHostModule" + execute_python_command "power-on" + ;; + power-off) + logger -t ${LOG_TAG} "Executing power-off command via SwitchHostModule" + execute_python_command "power-off" + ;; + power-cycle | reset) + logger -t ${LOG_TAG} "Executing power-cycle command via SwitchHostModule" + execute_python_command "power-cycle" + ;; + status) + execute_python_command "status" + ;; + help|--help|-h) + usage + exit 0 + ;; + *) + echo "ERROR: Unknown command '${COMMAND}'" >&2 + echo "" + usage + exit 1 + ;; + esac + exit $? +} + +# Run main function +main "$@" diff --git a/platform/aspeed/sonic-platform-modules-nokia/h6-128/scripts/usb-network-init.sh b/platform/aspeed/sonic-platform-modules-nokia/h6-128/scripts/usb-network-init.sh new file mode 100755 index 00000000000..cc868930fab --- /dev/null +++ b/platform/aspeed/sonic-platform-modules-nokia/h6-128/scripts/usb-network-init.sh @@ -0,0 +1,190 @@ +#!/bin/bash +# USB Network Gadget Initialization Script for ASPEED AST2700 +# Sets up USB network device using ConfigFS + +set -e + +# Configuration +GADGET_NAME="ast2720_usb_eth" +FUNCTION_TYPE="ncm" +INTERFACE_NAME="bmc0" +VENDOR_ID="0x1d6b" # Linux Foundation +PRODUCT_ID="0x0104" # Multifunction Composite Gadget +SERIAL_NUMBER="0123456789" +MANUFACTURER="Nokia" +PRODUCT_NAME="USB Network Device" +DEV_MAC="02:00:00:00:00:01" +HOST_MAC="02:00:00:00:00:02" + +logger -t usb-network "Starting USB network gadget initialization..." + +# Step 1: Mount ConfigFS +if ! mountpoint -q /sys/kernel/config 2>/dev/null; then + mount -t configfs none /sys/kernel/config + logger -t usb-network "ConfigFS mounted at /sys/kernel/config" +fi + +# Step 2: Create gadget configuration +GADGET_DIR="/sys/kernel/config/usb_gadget/${GADGET_NAME}" + +# Remove existing gadget if present +if [ -d "${GADGET_DIR}" ]; then + logger -t usb-network "Removing existing gadget configuration..." + # Disable gadget first + if [ -f "${GADGET_DIR}/UDC" ]; then + echo "" > "${GADGET_DIR}/UDC" 2>/dev/null || true + fi + # Remove gadget directory and all contents + rm -rf "${GADGET_DIR}" 2>/dev/null || true +fi + +# Create new gadget +logger -t usb-network "Creating USB gadget configuration..." +mkdir -p "${GADGET_DIR}" +cd "${GADGET_DIR}" + +# Set USB device descriptor +echo "${VENDOR_ID}" > idVendor +echo "${PRODUCT_ID}" > idProduct +echo "0x0100" > bcdDevice # v1.0.0 +echo "0x0200" > bcdUSB # USB 2.0 + +# Create English strings +mkdir -p strings/0x409 +echo "${SERIAL_NUMBER}" > strings/0x409/serialnumber +echo "${MANUFACTURER}" > strings/0x409/manufacturer +echo "${PRODUCT_NAME}" > strings/0x409/product + +# Create configuration +mkdir -p configs/c.1/strings/0x409 +echo "${FUNCTION_TYPE^^} Network" > configs/c.1/strings/0x409/configuration +echo "250" > configs/c.1/MaxPower # 250mA + +# Create network function +mkdir -p "functions/${FUNCTION_TYPE}.${INTERFACE_NAME}" +echo "${DEV_MAC}" > "functions/${FUNCTION_TYPE}.${INTERFACE_NAME}/dev_addr" +echo "${HOST_MAC}" > "functions/${FUNCTION_TYPE}.${INTERFACE_NAME}/host_addr" + +# Link function to configuration +ln -s "functions/${FUNCTION_TYPE}.${INTERFACE_NAME}" configs/c.1/ + +logger -t usb-network "Gadget '${GADGET_NAME}' created with ${FUNCTION_TYPE^^} function" + +# Step 4: Enable the gadget +# Use the specific UDC port for AST2700 USB virtual hub +UDC_NAME="12060000.usb-vhub:p1" + +if [ -z "${UDC_NAME}" ]; then + logger -t usb-network "ERROR: No UDC (USB Device Controller) found!" + echo "ERROR: No UDC found. Make sure aspeed_vhub module is loaded." >&2 + exit 1 +fi + +logger -t usb-network "Using UDC: ${UDC_NAME}" +echo "${UDC_NAME}" > UDC + +# Step 5: Wait for interface to appear +logger -t usb-network "Waiting for network interface ${INTERFACE_NAME}..." +for i in {1..10}; do + if ip link show "${INTERFACE_NAME}" &>/dev/null; then + logger -t usb-network "Interface '${INTERFACE_NAME}' detected" + break + fi + sleep 1 + logger -t usb-network "Interface '${INTERFACE_NAME}' still not up" +done + +if ! ip link show "${INTERFACE_NAME}" &>/dev/null; then + logger -t usb-network "WARNING: Interface '${INTERFACE_NAME}' not found after 10 seconds" + exit 1 +fi + +# Step 6: Configure network interface +logger -t usb-network "Configuring network interface..." +ip addr flush dev "${INTERFACE_NAME}" 2>/dev/null || true + +# Bring interface down (required for IPv6) +ip link set "${INTERFACE_NAME}" down + +# Enable IPv6 on the interface +sysctl -w net.ipv6.conf."${INTERFACE_NAME}".autoconf=1 2>/dev/null || true +sysctl -w net.ipv6.conf.${INTERFACE_NAME}.disable_ipv6=0 2>/dev/null || true + +# Bring interface up (required for IPv6) +ip link set "${INTERFACE_NAME}" up + +# Step 6b: IP address configuration handled by /etc/network/interfaces +# The interface configuration is managed through sonic-cfggen and interfaces.j2 template +# which reads from bmc.json (DEVICE_METADATA['bmc']) and generates /etc/network/interfaces +# This approach ensures consistent network configuration management across SONiC +#logger -t usb-network "IP configuration will be applied by networking.service from /etc/network/interfaces" + +#TODO: This temoporary workaround will be removed once +# interface configuration is managed through sonic-cfggen and interfaces.j2 +# Step 6b: Add static IPv4 for gNOI communication with switch host +# Read configuration from bmc.json +BMC_CONFIG="/etc/sonic/bmc.json" +BMC_IPV4="" + +if [ ! -f "${BMC_CONFIG}" ]; then + # Use platform specific if global bmc.json is missing + BMC_CONFIG="/usr/share/sonic/platform/bmc.json" +fi + +if [ -f "${BMC_CONFIG}" ]; then + logger -t usb-network "Reading BMC configuration from ${BMC_CONFIG}" + BMC_IPV4=$(python3 -c " +import json +import sys +import ipaddress +try: + with open('${BMC_CONFIG}') as f: + data = json.load(f) + bmc_ip = data.get('bmc_addr', '') + netmask = data.get('bmc_net_mask', '') + if bmc_ip and netmask: + interface = ipaddress.IPv4Interface(f'{bmc_ip}/{netmask}') + print(f'{interface.with_prefixlen}') + else: + sys.exit(1) +except Exception as e: + print(f'Error reading BMC config: {e}', file=sys.stderr) + sys.exit(1) +" 2>/dev/null) +fi + +if [ -n "${BMC_IPV4}" ]; then + # Configure IPv4 address + ip addr add "${BMC_IPV4}" dev "${INTERFACE_NAME}" + + # Display configuration + IPV4_ADDR=$(ip -4 addr show dev "${INTERFACE_NAME}" | grep -oP 'inet \K[0-9.]+') + logger -t usb-network "IPv4 address configured: ${IPV4_ADDR}" +fi + +# Wait a moment for interface to stabilize +sleep 1 + +# Check interface state +LINK_STATE=$(ip link show "${INTERFACE_NAME}" | grep -oP 'state \K\w+') + +logger -t usb-network "USB network gadget initialized successfully" +logger -t usb-network "Interface: ${INTERFACE_NAME} (MAC: ${DEV_MAC}), State: ${LINK_STATE}, UDC: ${UDC_NAME}" + +# IPv6 link-local address will be auto-configured when link comes up +# Provide guidance on next steps +if [ "${LINK_STATE}" = "DOWN" ]; then + logger -t usb-network "Interface is DOWN - waiting for USB host connection" + logger -t usb-network "To bring switch CPU out of reset, run: switch_cpu_utils.sh power-on" + echo "USB network interface '${INTERFACE_NAME}' is ready but link is DOWN (no host connected)" + echo "To bring switch CPU out of reset and establish USB connection, run:" + echo " switch_cpu_utils.sh power-on" +else + # Link is UP - show IPv6 address + IPV6_ADDR=$(ip -6 addr show dev "${INTERFACE_NAME}" scope link | grep -oP 'fe80::[0-9a-f:]+' | head -n1) + logger -t usb-network "Link is UP - IPv6 link-local: ${IPV6_ADDR}" + echo "USB network interface '${INTERFACE_NAME}' is UP with IPv6 link-local: ${IPV6_ADDR}" +fi + +exit 0 + diff --git a/platform/aspeed/sonic-platform-modules-nokia/h6-128/service/nokia-bmc-h6-128-init.service b/platform/aspeed/sonic-platform-modules-nokia/h6-128/service/nokia-bmc-h6-128-init.service new file mode 100644 index 00000000000..be77c6f9ee4 --- /dev/null +++ b/platform/aspeed/sonic-platform-modules-nokia/h6-128/service/nokia-bmc-h6-128-init.service @@ -0,0 +1,12 @@ +[Unit] +Description=Nokia-BMC-H6-128 Platform Service +After=sysinit.target +Before=database.service + +[Service] +Type=oneshot +ExecStart=/usr/local/bin/nokia-bmc-h6-128-init.sh +StandardOutput=tty + +[Install] +WantedBy=multi-user.target diff --git a/platform/aspeed/sonic-platform-modules-nokia/h6-128/service/sonic-usb-network-udev-init.service b/platform/aspeed/sonic-platform-modules-nokia/h6-128/service/sonic-usb-network-udev-init.service new file mode 100644 index 00000000000..1371cf7feec --- /dev/null +++ b/platform/aspeed/sonic-platform-modules-nokia/h6-128/service/sonic-usb-network-udev-init.service @@ -0,0 +1,16 @@ +[Unit] +Description=Aspeed USB Network Gadget udev Rules Initialization +Documentation=https://github.com/sonic-net/sonic-buildimage +After=local-fs.target +Before=usb-network-init.service + +[Service] +Type=oneshot +ExecStart=/usr/local/bin/sonic-usb-network-udev-init.sh +RemainAfterExit=yes +StandardOutput=journal +StandardError=journal + +[Install] +WantedBy=multi-user.target + diff --git a/platform/aspeed/sonic-platform-modules-nokia/h6-128/service/usb-network-init.service b/platform/aspeed/sonic-platform-modules-nokia/h6-128/service/usb-network-init.service new file mode 100644 index 00000000000..a53cecd0bef --- /dev/null +++ b/platform/aspeed/sonic-platform-modules-nokia/h6-128/service/usb-network-init.service @@ -0,0 +1,13 @@ +[Unit] +Description=Nokia USB Network Gadget Service +Documentation=https://github.com/sonic-net/SONiC/wiki/ +After=systemd-modules-load.service local-fs.target +Before=networking.service + +[Service] +Type=oneshot +ExecStart=/usr/local/bin/usb-network-init.sh +RemainAfterExit=yes + +[Install] +WantedBy=multi-user.target diff --git a/platform/aspeed/sonic-platform-modules-nokia/h6-128/setup.py b/platform/aspeed/sonic-platform-modules-nokia/h6-128/setup.py new file mode 100644 index 00000000000..cda5856e296 --- /dev/null +++ b/platform/aspeed/sonic-platform-modules-nokia/h6-128/setup.py @@ -0,0 +1,12 @@ +#!/usr/bin/env python3 + +from setuptools import setup + +setup( + name='sonic-platform', + version='1.0', + description='Module to initialize Nokia H6-128 BMC AST2720', + packages=['sonic_platform'], + package_dir={'sonic_platform': 'sonic_platform'}, +) + diff --git a/platform/aspeed/sonic-platform-modules-nokia/h6-128/sonic_platform/__init__.py b/platform/aspeed/sonic-platform-modules-nokia/h6-128/sonic_platform/__init__.py new file mode 100644 index 00000000000..10eca18766f --- /dev/null +++ b/platform/aspeed/sonic-platform-modules-nokia/h6-128/sonic_platform/__init__.py @@ -0,0 +1,13 @@ +#!/usr/bin/env python3 +# +# __init__.py +# +# Platform-specific SONiC platform API for Nokia H6-128 BMC +# + +try: + from sonic_platform.platform import Platform + from sonic_platform.chassis import Chassis +except ImportError as e: + raise ImportError(str(e) + " - required module not found") + diff --git a/platform/aspeed/sonic-platform-modules-nokia/h6-128/sonic_platform/chassis.py b/platform/aspeed/sonic-platform-modules-nokia/h6-128/sonic_platform/chassis.py new file mode 100644 index 00000000000..97cb85e1fa9 --- /dev/null +++ b/platform/aspeed/sonic-platform-modules-nokia/h6-128/sonic_platform/chassis.py @@ -0,0 +1,275 @@ +#!/usr/bin/env python3 +# +# chassis.py +# +# Chassis implementation for Nokia H6-128 BMC +# + +try: + from sonic_platform_base.chassis_base import ChassisBase + from sonic_platform.watchdog import Watchdog + from sonic_platform.eeprom import Eeprom + from sonic_platform.switch_host_module import SwitchHostModule + from sonic_py_common import logger + from sonic_py_common.general import getstatusoutput_noshell +except ImportError as e: + raise ImportError(str(e) + " - required module not found") + +class Chassis(ChassisBase): + """ + Platform-specific Chassis class for Nokia H6-128 BMC + + Hardware Configuration (from nokia-ast2700-h6-128-r0.dts): + - 0 PWM fans (all controlled from host CPU) + - 2 Watchdog timers (wdt0, wdt1) + + Supports multiple card revisions with runtime detection. + """ + + # FANs contolled from host CPU + NUM_FANS = 0 + + # Thermal sensors are controoled by host CPU + NUM_THERMAL_SENSORS = 0 + + def __init__(self): + """ + Initialize Nokia H6-128 BMC with hardware-specific configuration + """ + super().__init__() + + # Initialize watchdog (same as base class) + self._watchdog = Watchdog() + + # Initialize eeprom + self._eeprom = Eeprom() + + # Initialize Switch Host Module (x86 CPU managed by BMC) + self._module_list = [] + switch_host = SwitchHostModule(module_index=0) + self._module_list.append(switch_host) + + # Nokia has NO fans/thermals - create empty lists + self._fan_list = [] + self._fan_drawer_list = [] + self._thermal_list = [] + + # Nokia-specific initialization + self.card_revision = self._detect_card_revision() + + def is_bmc(self): + return True + + def _read_watchdog_bootstatus(self, path): + """ + Read watchdog bootstatus value from sysfs + + Args: + path: Path to the bootstatus file + + Returns: + Integer value of bootstatus, or 0 if file doesn't exist or can't be read + """ + try: + with open(path, 'r') as f: + value = f.read().strip() + return int(value) + except (IOError, OSError, ValueError): + return 0 + + def get_reboot_cause(self): + """ + Retrieves the cause of the previous reboot + + Not implemented yet. + Returns: + A tuple (string, string) where the first element is a string + containing the cause of the previous reboot. This string must be + one of the predefined strings in ChassisBase. If the first string + is "REBOOT_CAUSE_HARDWARE_OTHER", the second string can be used + to pass a description of the reboot cause. + + """ + return (self.REBOOT_CAUSE_NON_HARDWARE, None) + + def get_all_modules(self): + """ + Retrieves all modules available on this chassis + + Returns: + A list of Module objects representing all modules on the chassis + """ + return self._module_list + + def get_name(self): + """ + Retrieves the name of the chassis + + Returns: + String containing the name of the chassis + """ + return self._eeprom.modelstr() + + def get_model(self): + """ + Retrieves the model number (or part number) of the chassis + + Returns: + String containing the model number of the chassis + """ + return self._eeprom.part_number_str() + + def get_revision(self): + """ + Retrieves the hardware revision of the device + Returns: + string: Label Revision value of device + """ + return self._eeprom.label_revision_str() + + def get_serial_number(self): + """ + Returns the BMC card's serial number from BMC EEPROM + + Returns: + string: BMC serial number from BMC EEPROM (i2c-4) + """ + return self._eeprom.serial_number_str() + + def get_serial(self): + """ + Retrieves the serial number of the chassis + + Returns: + String containing the serial number of the chassis + """ + return self.get_serial_number() + + def get_switch_host_serial(self): + """ + Returns the serial via SwitchHostModule.get_serial(), which uses the + same BMC system EEPROM as get_serial() / get_serial_number(). + + Returns: + string: Serial from system EEPROM (same as Chassis.get_serial()) + """ + switch_host = self._module_list[0] + return switch_host.get_serial() + + def get_base_mac(self): + """ + Retrieves the base MAC address for the chassis + + Returns: + A string containing the MAC address in the format + 'XX:XX:XX:XX:XX:XX' + """ + return self._eeprom.base_mac_addr() + + def get_service_tag(self): + """ + Retrieves the Service Tag of the chassis + Returns: + string: Service Tag of chassis + """ + return self._eeprom.service_tag_str() + + def get_system_eeprom_info(self): + """ + Retrieves the full content of system EEPROM information for the + chassis + + Returns: + A dictionary where keys are the type code defined in + OCP ONIE TlvInfo EEPROM format and values are their + corresponding values. + """ + return self._eeprom.system_eeprom_info() + + def get_watchdog(self): + """ + Retrieves the hardware watchdog device on this chassis + + Returns: + An object derived from WatchdogBase representing the hardware + watchdog device + """ + return self._watchdog + + def get_num_thermals(self): + """ + Retrieves the number of thermal sensors available on this chassis + + Returns: + An integer, the number of thermal sensors available on this chassis + """ + return len(self._thermal_list) + + def get_all_thermals(self): + """ + Retrieves all thermal sensors available on this chassis + + Returns: + A list of objects derived from ThermalBase representing all thermal + sensors available on this chassis + """ + return self._thermal_list + + def get_thermal(self, index): + """ + Retrieves thermal sensor represented by (0-based) index + + Args: + index: An integer, the index (0-based) of the thermal sensor to retrieve + + Returns: + An object derived from ThermalBase representing the specified thermal + sensor, or None if index is out of range + """ + if index < 0 or index >= len(self._thermal_list): + return None + return self._thermal_list[index] + + def get_num_fans(self): + """ + Retrieves the number of fans available on this chassis + + Returns: + An integer, the number of fans available on this chassis + """ + return len(self._fan_list) + + def get_all_fans(self): + """ + Retrieves all fan modules available on this chassis + + Returns: + A list of objects derived from FanBase representing all fan + modules available on this chassis + """ + return self._fan_list + + def get_fan(self, index): + """ + Retrieves fan module represented by (0-based) index + + Args: + index: An integer, the index (0-based) of the fan module to retrieve + + Returns: + An object derived from FanBase representing the specified fan + module, or None if index is out of range + """ + if index < 0 or index >= len(self._fan_list): + return None + return self._fan_list[index] + + def _detect_card_revision(self): + """ + Detect the Nokia BMC card revision from hardware + + Returns: + str: Card revision identifier (e.g., 'r0', 'r1') + """ + # For now, default to 'r0' + return 'r0' diff --git a/platform/aspeed/sonic-platform-modules-nokia/h6-128/sonic_platform/eeprom.py b/platform/aspeed/sonic-platform-modules-nokia/h6-128/sonic_platform/eeprom.py new file mode 100644 index 00000000000..de7a5698205 --- /dev/null +++ b/platform/aspeed/sonic-platform-modules-nokia/h6-128/sonic_platform/eeprom.py @@ -0,0 +1,188 @@ +""" + Nokia H6-128 BMC + + Module contains platform specific implementation of SONiC Platform + Base API and provides the EEPROMs' information. + + The FAN and PSU EEPROMs ar not available in BMC. + - System EEPROM : Contains Serial number, Service tag, Base MA + address, etc. in ONIE TlvInfo EEPROM format. +""" + +try: + import os + from sonic_platform_base.sonic_eeprom.eeprom_tlvinfo import TlvInfoDecoder + from sonic_py_common import logger +except ImportError as e: + raise ImportError(str(e) + ' - required module not found') from e + +sonic_logger = logger.Logger('eeprom') + +class Eeprom(TlvInfoDecoder): + """Nokia platform-specific EEPROM class""" + + I2C_DIR = "/sys/bus/i2c/devices/" + def __init__(self): + # System EEPROM is in ONIE TlvInfo EEPROM format + self.start_offset = 0 + self.eeprom_path = self.I2C_DIR + "13-0056/eeprom" + super(Eeprom, self).__init__(self.eeprom_path, self.start_offset, '', True) + + self.base_mac = '' + self.serial_number = '' + self.part_number = '' + self.model_str = '' + self.service_tag = '' + self.manuf_date = 'NA' + + def _load_system_eeprom(self): + """ + Reads the system EEPROM and retrieves the values corresponding + to the codes defined as per ONIE TlvInfo EEPROM format and fills + them in a dictionary. + """ + try: + # Read System EEPROM as per ONIE TlvInfo EEPROM format. + self.eeprom_data = self.read_eeprom() + except Exception as e: + sonic_logger.log_warning("Unable to read system eeprom") + self.base_mac = 'NA' + self.serial_number = 'NA' + self.part_number = 'NA' + self.model_str = 'NA' + self.service_tag = 'NA' + self.manuf_date = 'NA' + self.eeprom_tlv_dict = dict() + else: + eeprom = self.eeprom_data + self.eeprom_tlv_dict = dict() + + if not self.is_valid_tlvinfo_header(eeprom): + sonic_logger.log_warning("Invalid system eeprom TLV header") + self.base_mac = 'NA' + self.serial_number = 'NA' + self.part_number = 'NA' + self.model_str = 'NA' + self.service_tag = 'NA' + self.manuf_date = 'NA' + return + + total_length = (eeprom[9] << 8) | eeprom[10] + tlv_index = self._TLV_INFO_HDR_LEN + tlv_end = self._TLV_INFO_HDR_LEN + total_length + + while (tlv_index + 2) < len(eeprom) and tlv_index < tlv_end: + if not self.is_valid_tlv(eeprom[tlv_index:]): + break + + tlv = eeprom[tlv_index:tlv_index + 2 + + eeprom[tlv_index + 1]] + code = "0x%02X" % (tlv[0]) + + name, value = self.decoder(None, tlv) + + self.eeprom_tlv_dict[code] = value + if eeprom[tlv_index] == self._TLV_CODE_CRC_32: + break + + tlv_index += eeprom[tlv_index+1] + 2 + + self.base_mac = self.eeprom_tlv_dict.get( + "0x%X" % (self._TLV_CODE_MAC_BASE), 'NA') + self.serial_number = self.eeprom_tlv_dict.get( + "0x%X" % (self._TLV_CODE_SERIAL_NUMBER), 'NA') + self.part_number = self.eeprom_tlv_dict.get( + "0x%X" % (self._TLV_CODE_PART_NUMBER), 'NA') + self.model_str = self.eeprom_tlv_dict.get( + "0x%X" % (self._TLV_CODE_PRODUCT_NAME), 'NA') + self.service_tag = self.eeprom_tlv_dict.get( + "0x%X" % (self._TLV_CODE_SERVICE_TAG), 'NA') + self.manuf_date = self.eeprom_tlv_dict.get( + "0x%X" % (self._TLV_CODE_MANUF_DATE), 'NA') + + + def _get_eeprom_field(self, field_name): + """ + For a field name specified in the EEPROM format, returns the + presence of the field and the value for the same. + """ + field_start = 0 + for field in self.format: + field_end = field_start + field[2] + if field[0] == field_name: + return (True, self.eeprom_data[field_start:field_end]) + field_start = field_end + + return (False, None) + + def serial_number_str(self): + """ + Returns the serial number. + """ + if not self.serial_number: + self._load_system_eeprom() + + return self.serial_number + + def part_number_str(self): + """ + Returns the part number. + """ + if not self.part_number: + self._load_system_eeprom() + + return self.part_number + + def airflow_fan_type(self): + """ + Returns the airflow fan type. + """ + return None + + # System EEPROM specific methods + def base_mac_addr(self): + """ + Returns the base MAC address found in the system EEPROM. + """ + if not self.base_mac: + self._load_system_eeprom() + + return self.base_mac + + def modelstr(self): + """ + Returns the Model name. + """ + if not self.model_str: + self._load_system_eeprom() + + return self.model_str + + def service_tag_str(self): + """ + Returns the servicetag number. + """ + if not self.service_tag: + self._load_system_eeprom() + + return self.service_tag + + def manuf_date_str(self): + """ + Returns the servicetag number. + """ + if not self.manuf_date: + self._load_system_eeprom() + + return self.manuf_date + + def system_eeprom_info(self): + """ + Returns a dictionary, where keys are the type code defined in + ONIE EEPROM format and values are their corresponding values + found in the system EEPROM. + """ + if not self.eeprom_tlv_dict: + self._load_system_eeprom() + + return self.eeprom_tlv_dict diff --git a/platform/aspeed/sonic-platform-modules-nokia/h6-128/sonic_platform/platform.py b/platform/aspeed/sonic-platform-modules-nokia/h6-128/sonic_platform/platform.py new file mode 100644 index 00000000000..79fd2a12f92 --- /dev/null +++ b/platform/aspeed/sonic-platform-modules-nokia/h6-128/sonic_platform/platform.py @@ -0,0 +1,32 @@ +""" +SONiC Platform API - Platform class for Nokia H6-128 BMC +""" + +try: + from sonic_platform.chassis import Chassis +except ImportError as e: + raise ImportError(str(e) + " - required module not found") + + +class Platform: + """ + Platform class for Nokia H6-128 BMC + + Provides access to chassis-level functionality. + """ + + def __init__(self): + """ + Initialize the Platform object + """ + self._chassis = Chassis() + + def get_chassis(self): + """ + Retrieves the chassis object + + Returns: + An object derived from ChassisBase representing the chassis + """ + return self._chassis + diff --git a/platform/aspeed/sonic-platform-modules-nokia/h6-128/sonic_platform/switch_host_module.py b/platform/aspeed/sonic-platform-modules-nokia/h6-128/sonic_platform/switch_host_module.py new file mode 100644 index 00000000000..b1ce6d4f6e4 --- /dev/null +++ b/platform/aspeed/sonic-platform-modules-nokia/h6-128/sonic_platform/switch_host_module.py @@ -0,0 +1,351 @@ +""" +SwitchHostModule implementation for Nokia H6-128 BMC Platform + +This module provides an abstraction for the BMC's interaction with the +switch host CPU, including power management operations. +""" + +import subprocess +import sys +import time + +try: + from sonic_platform_base.module_base import ModuleBase + from sonic_platform.eeprom import Eeprom +except ImportError as e: + raise ImportError(str(e) + " - required module not found") + + +class SwitchHostModule(ModuleBase): + """ + Module representing the main x86 Switch Host CPU managed by the BMC. + + This module provides an abstraction for the BMC's interaction with the + switch host CPU, including power management and status reporting. + """ + + def __init__(self, module_index=0): + """ + Initialize SwitchHostModule + + Args: + module_index: Module index (default 0, as BMC manages single switch host) + """ + super(SwitchHostModule, self).__init__() + self.module_index = module_index + + def _i2c_set_reg(self, addr, reg, value, bus="14"): + """ + I2C set register + + Args: + addr: i2c slave addr + reg: register to write + value: value to write + bus: bus_num + + Returns: + bool: True if operation succeeded, False otherwise + """ + try: + cmd = ["sudo", "i2cset", "-y", bus, addr, reg, value] + result = subprocess.run(cmd, capture_output=True, timeout=5) + if result.returncode != 0: + sys.stderr.write(f"i2c_set cmd={cmd} failed({result.stderr})\n") + return False + return True + except Exception as e: + sys.stderr.write(f"Failed to set i2c {cmd} {e}\n") + return False + + def _i2c_set_byte(self, addr, value, bus="14"): + """ + I2C write a single byte + Args: + addr: i2c slave addr + value: value to write + bus: bus_num + + Returns: + bool: True if operation succeeded, False otherwise + """ + try: + cmd = ["sudo", "i2cset", "-y", bus, addr, value] + result = subprocess.run(cmd, capture_output=True, timeout=5) + if result.returncode != 0: + sys.stderr.write(f"i2c_set cmd={cmd} failed({result.stderr})\n") + return False + return True + except Exception as e: + sys.stderr.write(f"Failed to set i2c {cmd} {e}\n") + return False + + def _i2c_get_reg(self, addr, reg, bus="14"): + """ + I2C get register + + Args: + addr: i2c slave addr + reg: register to read + bus: bus_num + + Returns: + int: value (read from i2c reg), -1 on error + """ + try: + cmd = ["sudo", "i2cget", "-y", bus, addr, reg] + result = subprocess.run(cmd, capture_output=True, timeout=5) + if result.returncode == 0: + # Parse hex value (e.g., "0xff") + value = int(result.stdout.strip(), 16) + return value + except Exception as e: + sys.stderr.write(f"Failed to get i2c {cmd} {e}\n") + return -1 + + def _do_power_off(self): + """ + Perform SwitchCpu power off + + Returns: + bool: True if SwitchCpu is powered off, False otherwise + """ + try: + if not self._i2c_set_reg("0x60", "0x20", "0x7f"): + return False + time.sleep(1) + if not self._i2c_set_reg("0x60", "0xf", "0x0"): + return False + time.sleep(1) + if not self._i2c_set_reg("0x77", "0x0", "0x3"): + return False + time.sleep(1) + if not self._i2c_set_reg("0x71", "0x18", "0x0"): + return False + time.sleep(1) + if not self._i2c_set_reg("0x71", "0xc", "0x0"): + return False + time.sleep(1) + if not self._i2c_set_reg("0x71", "0x19", "0x0"): + return False + time.sleep(1) + if not self._i2c_set_reg("0x72", "0x0", "0xe"): + return False + time.sleep(1) + if not self._i2c_set_byte("0x11", "0xdb"): + return False + time.sleep(1) + if not self._i2c_set_reg("0x60", "0x37", "0x0"): + return False + time.sleep(1) + if not self._i2c_set_reg("0x60", "0x5", "0x9"): + return False + time.sleep(1) + return True + finally: + self._i2c_set_reg("0x60", "0xf", "0x1") + + def _do_power_on(self): + """ + Perform SwitchCpu power on + + Returns: + bool: True if SwitchCpu is powered on, False otherwise + """ + try: + if not self._i2c_set_reg("0x60", "0xf", "0x0"): + return False + time.sleep(1) + if not self._i2c_set_reg("0x77", "0x0", "0x3"): + return False + time.sleep(1) + if not self._i2c_set_reg("0x71", "0x18", "0xff"): + return False + time.sleep(1) + if not self._i2c_set_reg("0x71", "0x19", "0x1f"): + return False + time.sleep(1) + if not self._i2c_set_reg("0x60", "0x20", "0xff"): + return False + time.sleep(1) + if not self._i2c_set_reg("0x60", "0x5", "0xb"): + return False + time.sleep(1) + if not self._i2c_set_reg("0x60", "0x37", "0x4"): + return False + time.sleep(1) + return True + finally: + self._i2c_set_reg("0x60", "0xf", "0x1") + + ############################################## + # Core Power Management APIs + ############################################## + + def set_admin_state(self, up): + """ + Power ON (up=True) or Power OFF (up=False) the switch host CPU. + + Args: + up: True to power on (release from reset), False to power off (put into reset) + + Returns: + bool: True if operation succeeded, False otherwise + """ + if up: + sys.stderr.write("SwitchHost: Powering ON (out-of-reset)...\n") + return self._do_power_on() + else: + sys.stderr.write("SwitchHost: Powering OFF (put-in-reset)...\n") + return self._do_power_off() + + def do_power_cycle(self): + """ + Power cycle the switch host CPU. + + Sequence: + 1. Assert reset (drive low) + 2. Wait 6 seconds + 3. Deassert reset (drive high) + + Returns: + bool: True if operation succeeded, False otherwise + """ + sys.stderr.write("SwitchHost: Starting power cycle...\n") + + if not self._do_power_off(): + sys.stderr.write("SwitchHost: Failed to assert reset\n") + return False + + sys.stderr.write("SwitchHost: Reset asserted, waiting 6 seconds...\n") + + time.sleep(6) + + if not self._do_power_on(): + sys.stderr.write("SwitchHost: Failed to deassert reset\n") + return False + + sys.stderr.write("SwitchHost: Power cycle complete\n") + return True + + def reboot(self, reboot_type=None): + """ + Alias for do_power_cycle() to maintain ModuleBase compatibility. + + Args: + reboot_type: Reboot type (unused, for compatibility) + + Returns: + bool: True if operation succeeded + """ + return self.do_power_cycle() + + def get_oper_status(self): + """ + Get operational status of the switch host CPU. + + Based on hardware register read: + - Register value bit 1 = 1 (out of reset) => MODULE_STATUS_ONLINE + - Register value bit 1 = 0 (in reset) => MODULE_STATUS_OFFLINE + - Read error => MODULE_STATUS_FAULT + + Returns: + str: One of MODULE_STATUS_ONLINE, MODULE_STATUS_OFFLINE, MODULE_STATUS_FAULT + """ + reg_value = self._i2c_get_reg("0x60", "0x5") + + if reg_value == -1: + # Read error + return self.MODULE_STATUS_FAULT + + if reg_value & 0x2: + # Bit 1 = 1: CPU is powered-on + return self.MODULE_STATUS_ONLINE + else: + # Bit 1 = 0: CPU is powered-off + return self.MODULE_STATUS_OFFLINE + + ############################################## + # Required ModuleBase Implementations + ############################################## + + def get_name(self): + """ + Returns module name: SWITCH_HOST0 + + Returns: + str: Module name + """ + return f"{self.MODULE_TYPE_SWITCH_HOST}{self.module_index}" + + def get_type(self): + """ + Returns module type + + Returns: + str: Module type (SWITCH_HOST) + """ + return self.MODULE_TYPE_SWITCH_HOST + + def get_slot(self): + """ + Returns slot number (0 for single switch host) + + Returns: + int: Slot number + """ + return 0 + + def get_presence(self): + """ + Switch host is always present (fixed hardware) + + Returns: + bool: True (always present) + """ + return True + + def get_description(self): + """ + Returns description + + Returns: + str: Module description + """ + return "Main x86 Switch Host CPU managed by BMC" + + def get_maximum_consumed_power(self): + """ + Returns maximum consumed power. + Returns: + None: Power measurement not available for switch host module + """ + return None + + def get_base_mac(self): + """ + Not applicable for switch host + + Raises: + NotImplementedError + """ + raise NotImplementedError + + def get_system_eeprom_info(self): + """ + Not applicable for switch host + + Raises: + NotImplementedError + """ + raise NotImplementedError + + def get_serial(self): + """ + Serial number aligned with Chassis.get_serial() / get_serial_number(): + BMC system EEPROM (same source as sonic_platform.chassis.Chassis). + + Returns: + str: Serial number string from system EEPROM, or "NA" on failure + """ + return Eeprom().serial_number_str() diff --git a/platform/aspeed/sonic-platform-modules-nokia/h6-128/sonic_platform/watchdog.py b/platform/aspeed/sonic-platform-modules-nokia/h6-128/sonic_platform/watchdog.py new file mode 100644 index 00000000000..7923d8e6a1d --- /dev/null +++ b/platform/aspeed/sonic-platform-modules-nokia/h6-128/sonic_platform/watchdog.py @@ -0,0 +1,212 @@ +""" +SONiC Platform API - Watchdog class for Aspeed BMC + +This module provides the Watchdog class for Aspeed AST2700 BMC platform. +""" + +import os +import fcntl +import array +import ctypes + +try: + from sonic_platform_base.watchdog_base import WatchdogBase +except ImportError as e: + raise ImportError(str(e) + " - required module not found") + + +# Watchdog ioctl commands (from Linux kernel watchdog.h) +WDIOC_GETSUPPORT = 0x80285700 +WDIOC_GETSTATUS = 0x80045701 +WDIOC_GETBOOTSTATUS = 0x80045702 +WDIOC_GETTEMP = 0x80045703 +WDIOC_SETOPTIONS = 0x80045704 +WDIOC_KEEPALIVE = 0x80045705 +WDIOC_SETTIMEOUT = 0xc0045706 +WDIOC_GETTIMEOUT = 0x80045707 +WDIOC_SETPRETIMEOUT = 0xc0045708 +WDIOC_GETPRETIMEOUT = 0x80045709 +WDIOC_GETTIMELEFT = 0x8004570a + +# Watchdog options +WDIOS_DISABLECARD = 0x0001 +WDIOS_ENABLECARD = 0x0002 + +# Default watchdog device +WATCHDOG_DEVICE = "/dev/watchdog0" + +# Sysfs paths for AST2700 watchdog +WATCHDOG_SYSFS_PATH = "/sys/class/watchdog/watchdog0/" + + +class Watchdog(WatchdogBase): + """ + Watchdog class for Aspeed AST2700 BMC platform + + Provides hardware watchdog functionality using the aspeed_wdt driver. + """ + + def __init__(self): + """ + Initialize the Watchdog object + """ + super(Watchdog, self).__init__() + self.watchdog_device = WATCHDOG_DEVICE + self.watchdog_fd = None + self.timeout = 0 + + def _read_sysfs_int(self, filename): + """ + Read an integer value from sysfs + + Args: + filename: Name of the file in WATCHDOG_SYSFS_PATH + + Returns: + Integer value, or -1 on error + """ + try: + with open(os.path.join(WATCHDOG_SYSFS_PATH, filename), 'r') as f: + return int(f.read().strip()) + except (IOError, OSError, ValueError): + return -1 + + def _read_sysfs_str(self, filename): + """ + Read a string value from sysfs + + Args: + filename: Name of the file in WATCHDOG_SYSFS_PATH + + Returns: + String value, or empty string on error + """ + try: + with open(os.path.join(WATCHDOG_SYSFS_PATH, filename), 'r') as f: + return f.read().strip() + except (IOError, OSError): + return "" + + def _open_watchdog(self): + """ + Open the watchdog device file + + Returns: + True if successful, False otherwise + """ + if self.watchdog_fd is None: + try: + self.watchdog_fd = os.open(self.watchdog_device, os.O_WRONLY) + except (IOError, OSError): + return False + return True + + def _disablewatchdog(self): + """ + Turn off the watchdog timer + """ + req = array.array('I', [WDIOS_DISABLECARD]) + fcntl.ioctl(self.watchdog_fd, WDIOC_SETOPTIONS, req, False) + + def _enablewatchdog(self): + """ + Turn on the watchdog timer + """ + req = array.array('I', [WDIOS_ENABLECARD]) + fcntl.ioctl(self.watchdog_fd, WDIOC_SETOPTIONS, req, False) + + def _keepalive(self): + """ + Keep alive watchdog timer + """ + fcntl.ioctl(self.watchdog_fd, WDIOC_KEEPALIVE) + + def _settimeout(self, seconds): + """ + Set watchdog timer timeout + @param seconds - timeout in seconds + @return is the actual set timeout + """ + req = array.array('I', [seconds]) + fcntl.ioctl(self.watchdog_fd, WDIOC_SETTIMEOUT, req, True) + + return int(req[0]) + + def _gettimeout(self): + """ + Get watchdog timeout + @return watchdog timeout + """ + return self._read_sysfs_int("timeout") + + def is_armed(self): + """ + Retrieves the armed state of the hardware watchdog + + Returns: + A boolean, True if watchdog is armed, False if not + """ + # Check the state from sysfs + state = self._read_sysfs_str("state") + if (state != 'inactive'): + return True + else: + return False + + def arm(self, seconds): + """ + Arm the hardware watchdog with a timeout of seconds + + Args: + seconds: Timeout value in seconds + + Returns: + An integer specifying the actual number of seconds the watchdog + was armed with. On failure returns -1. + """ + if (seconds < 0 or seconds > 300 ): + return -1 + + if not self._open_watchdog(): + return -1 + try: + if self.timeout != seconds: + self.timeout = self._settimeout(seconds) + if self.is_armed(): + self._keepalive() + else: + self._enablewatchdog() + except (IOError, OSError): + return -1 + + return self.timeout + + def disarm(self): + """ + Disarm the hardware watchdog + + Returns: + A boolean, True if watchdog is disarmed successfully, False if not + """ + if not self._open_watchdog(): + return False + + try: + self._disablewatchdog() + self.timeout = 0 + + except (IOError, OSError): + return False + + return True + + def get_remaining_time(self): + """ + Get the number of seconds remaining on the watchdog timer + + Returns: + An integer specifying the number of seconds remaining on the + watchdog timer. If the watchdog is not armed, returns -1. + """ + return -1 + diff --git a/platform/aspeed/sonic-platform-modules-nvidia-bmc/ast2700/sonic_platform/__init__.py b/platform/aspeed/sonic-platform-modules-nvidia-bmc/ast2700/sonic_platform/__init__.py new file mode 100644 index 00000000000..fca30c911f4 --- /dev/null +++ b/platform/aspeed/sonic-platform-modules-nvidia-bmc/ast2700/sonic_platform/__init__.py @@ -0,0 +1,23 @@ +# +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +try: + from sonic_platform.platform import Platform + from sonic_platform.chassis import Chassis +except ImportError as e: + raise ImportError(str(e) + " - required module not found") diff --git a/platform/aspeed/sonic-platform-modules-nvidia-bmc/ast2700/sonic_platform/chassis.py b/platform/aspeed/sonic-platform-modules-nvidia-bmc/ast2700/sonic_platform/chassis.py new file mode 100644 index 00000000000..532167b3cbd --- /dev/null +++ b/platform/aspeed/sonic-platform-modules-nvidia-bmc/ast2700/sonic_platform/chassis.py @@ -0,0 +1,159 @@ +# +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +try: + from sonic_platform_base.chassis_base import ChassisBase + from sonic_platform.thermal import ThermalBMC + from sonic_platform.switch_host_module import SwitchHostModule + from sonic_platform.eeprom import EepromBMC + from sonic_platform.reboot_cause import RebootCause + from sonic_py_common import device_info +except ImportError as e: + raise ImportError(str(e) + " - required module not found") + + +class Chassis(ChassisBase): + """ + Platform-specific Chassis class for the NVIDIA AST2700 BMC. + """ + + def __init__(self): + super().__init__() + + self._thermal_list = [ThermalBMC()] + self._switch_host_module = SwitchHostModule() + self._module_list = [self._switch_host_module] + self._liquid_cooling = None + self._eeprom = EepromBMC() + self._reboot_cause = RebootCause() + + def get_reboot_cause(self): + """ + Retrieves the cause of the previous reboot + + Returns: + A tuple (string, string) where the first element is a reboot cause + string from ChassisBase and the second is an optional description. + """ + return self._reboot_cause.get_reboot_cause() + + def get_eeprom(self): + """ + Retrieves the system eeprom device on this chassis + + Returns: + An object representing the hardware eeprom device. + """ + return self._eeprom + + def get_name(self): + """ + Retrieves the name of the device + + Returns: + string: The name of the device + """ + return self._eeprom.get_product_name() + + def get_model(self): + """ + Retrieves the model number (or part number) of the device + + Returns: + string: Model/part number of device + """ + return self._eeprom.get_part_number() + + def get_base_mac(self): + """ + Retrieves the base MAC address for the chassis + + Returns: + A string containing the MAC address in the format + 'XX:XX:XX:XX:XX:XX' + """ + return self._eeprom.get_base_mac() + + def get_serial(self): + """ + Retrieves the hardware serial number for the chassis + + Returns: + A string containing the hardware serial number for this chassis. + """ + return self._eeprom.get_serial_number() + + def get_switch_host_serial(self): + """ + Retrieves the hardware serial number for the switch host module + + Returns: + A string containing the hardware serial number for the switch host module. + """ + return self._switch_host_module.get_serial() + + def get_system_eeprom_info(self): + """ + Retrieves the full content of system EEPROM information for the chassis + + Returns: + A dictionary where keys are the type code defined in + OCP ONIE TlvInfo EEPROM format and values are their corresponding + values. + """ + return self._eeprom.get_system_eeprom_info() + + def get_revision(self): + """ + Retrieves the hardware revision of the device + + Returns: + string: Revision value of device + """ + return self._eeprom.get_revision() + + def is_bmc(self): + """ + Retrieves whether this chassis is a BMC + + Returns: + bool: True if this chassis is a BMC, False otherwise + """ + return True + + def is_liquid_cooled(self): + """ + Retrieves whether this chassis is liquid cooled + + Returns: + bool: True if this chassis is liquid cooled, False otherwise + """ + platform_data = device_info.get_platform_json_data() or {} + return bool(platform_data.get("chassis", {}).get("liquid_cooled", False)) + + def get_liquid_cooling(self): + """ + Lazily construct and return the platform's LiquidCooling object. + + Returns: + LiquidCooling: the (cached) liquid cooling object for this chassis. + """ + if self._liquid_cooling is None: + from sonic_platform.liquid_cooling import LiquidCooling + self._liquid_cooling = LiquidCooling() + return self._liquid_cooling diff --git a/platform/aspeed/sonic-platform-modules-nvidia-bmc/ast2700/sonic_platform/eeprom.py b/platform/aspeed/sonic-platform-modules-nvidia-bmc/ast2700/sonic_platform/eeprom.py new file mode 100644 index 00000000000..2f4b2f22d7b --- /dev/null +++ b/platform/aspeed/sonic-platform-modules-nvidia-bmc/ast2700/sonic_platform/eeprom.py @@ -0,0 +1,174 @@ +# +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +from functools import reduce, cache +import subprocess + +try: + from sonic_platform_base.sonic_eeprom.eeprom_tlvinfo import TlvInfoDecoder + from sonic_py_common.logger import Logger + from sonic_platform.utils import hw_mgmt_path +except ImportError as e: + raise ImportError(str(e) + " - required module not found") + +logger = Logger() + +EEPROM_BMC_PATH = hw_mgmt_path("eeprom", "eeprom_bmc") +EEPROM_SYSTEM_PATH = hw_mgmt_path("eeprom", "eeprom_system") + + +class IpmiFru: + PARSING_RULES = { + "FRU Board Product Name:": TlvInfoDecoder._TLV_CODE_PRODUCT_NAME, + "FRU Board Part Number:": TlvInfoDecoder._TLV_CODE_PART_NUMBER, + "FRU Board Serial Number:": TlvInfoDecoder._TLV_CODE_SERIAL_NUMBER, + "FRU Board Custom Info: MAC:": TlvInfoDecoder._TLV_CODE_MAC_BASE, + "FRU Product Version:": TlvInfoDecoder._TLV_CODE_LABEL_REVISION, + } + + IPMI_FRU_BIN = "ipmi-fru" + IPMI_FRU_TIMEOUT = 20 + + def __init__(self, fru_file): + self.fru_file = fru_file + + def get_fru_info(self): + cmd = [self.IPMI_FRU_BIN, "--fru-file", self.fru_file] + try: + result = subprocess.run(cmd, capture_output=True, text=True, check=False, timeout=self.IPMI_FRU_TIMEOUT) + except subprocess.TimeoutExpired as exc: + logger.log_error(f"timeout executing {' '.join(cmd)}: {exc}") + return "" + except OSError as exc: + logger.log_error(f"failed to execute {' '.join(cmd)}: {exc}") + return "" + + if result.returncode != 0: + stderr = (getattr(result, "stderr", "") or "").strip() + logger.log_error(f"{' '.join(cmd)} exited with {result.returncode}: {stderr}") + return "" + + return result.stdout or "" + + def get_tlv_list(self): + return list(self.PARSING_RULES.values()) + + @cache + def get_tlv_dict(self): + tlv_dict = {} + fru_info = self.get_fru_info() + for line in fru_info.splitlines(): + for key, value in self.PARSING_RULES.items(): + if key in line: + tlv_dict[value] = line.split(key)[1].strip() + return tlv_dict + + +class Eeprom(TlvInfoDecoder): + + def __init__(self, fru_file, available_in_redis=False): + self.fru = IpmiFru(fru_file) + self._eeprom_info_dict = None + self._eeprom_raw = None + self.available_in_redis = available_in_redis + super().__init__('', 0, '', True) + + def _read_from_redis(self): + db_initialized = self._redis_hget('EEPROM_INFO|State', 'Initialized') + if db_initialized != '1': + return None + data = {} + for code in self.fru.get_tlv_list(): + value = self._redis_hget(f'EEPROM_INFO|{hex(code)}', 'Value') + if value: + data[code] = value + return data + + def _eeprom_dict_get(self): + if self.available_in_redis: + from_redis = self._read_from_redis() + if from_redis: + return from_redis + return self.fru.get_tlv_dict() + + def _eeprom_init_raw(self, tlvs_info): + """ + Initialize `_eeprom_raw` by encoding `tlvs_info` values via `TlvInfoDecoder.encoder`. + """ + encoded = [self.encoder((k,), tlvs_info[k]) for k in sorted(tlvs_info.keys())] + tlvs = reduce(lambda x, y: x + y, encoded, bytearray()) + + # Append the TLV_CODE_CRC_32 [type, len] header used for the checksum entry. + tlvs += bytearray([self._TLV_CODE_CRC_32]) + bytearray([4]) + + # Reserve 4 extra bytes for the checksum value computed and appended below. + tlvs_len = len(tlvs) + 4 + + tlvs_len_header = bytearray([(tlvs_len >> 8) & 0xFF]) + bytearray([tlvs_len & 0xFF]) + header = self._TLV_INFO_ID_STRING + bytearray([self._TLV_INFO_VERSION]) + tlvs_len_header + raw = header + tlvs + checksum = self.calculate_checksum(raw) + raw += self.encode_checksum(checksum) + self._eeprom_raw = raw + return checksum + + def _eeprom_init(self): + tlv_dict = self._eeprom_dict_get() + checksum = self._eeprom_init_raw(tlv_dict) + + self._eeprom_info_dict = {hex(k): v for k, v in tlv_dict.items()} + self._eeprom_info_dict[hex(self._TLV_CODE_CRC_32)] = checksum + + def _get_eeprom_value(self, code): + info = self.get_system_eeprom_info() + return info.get(hex(code), None) + + def read_eeprom(self): + if self._eeprom_raw is None: + self._eeprom_init() + return self._eeprom_raw + + def get_system_eeprom_info(self): + if self._eeprom_info_dict is None: + self._eeprom_init() + return self._eeprom_info_dict + + def get_base_mac(self): + return self._get_eeprom_value(self._TLV_CODE_MAC_BASE) + + def get_serial_number(self): + return self._get_eeprom_value(self._TLV_CODE_SERIAL_NUMBER) + + def get_product_name(self): + return self._get_eeprom_value(self._TLV_CODE_PRODUCT_NAME) + + def get_part_number(self): + return self._get_eeprom_value(self._TLV_CODE_PART_NUMBER) + + def get_revision(self): + return self._get_eeprom_value(self._TLV_CODE_LABEL_REVISION) + + +class EepromBMC(Eeprom): + def __init__(self): + super().__init__(EEPROM_BMC_PATH, True) + + +class EepromSystem(Eeprom): + def __init__(self): + super().__init__(EEPROM_SYSTEM_PATH, False) diff --git a/platform/aspeed/sonic-platform-modules-nvidia-bmc/ast2700/sonic_platform/leak_sensor_profile.py b/platform/aspeed/sonic-platform-modules-nvidia-bmc/ast2700/sonic_platform/leak_sensor_profile.py new file mode 100644 index 00000000000..0c907477aee --- /dev/null +++ b/platform/aspeed/sonic-platform-modules-nvidia-bmc/ast2700/sonic_platform/leak_sensor_profile.py @@ -0,0 +1,45 @@ +# +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +try: + from sonic_platform_base.liquid_cooling_base import LeakSensorProfileBase +except ImportError as e: + raise ImportError(str(e) + " - required module not found") + + +class LeakSensorProfile(LeakSensorProfileBase): + """ + Platform-specific leak sensor profile. + """ + + def __init__(self, sensor_type=None): + super().__init__() + self._sensor_type = sensor_type + + def get_type(self) -> str: + return self._sensor_type + + def get_leak_max_minor_duration_sec(self): + """ + Maximum number of seconds a sensor may remain in MINOR leak state before being + escalated to CRITICAL. + + The NVIDIA AST2700 BMC platform does not implement minor-leak escalation timing, + so this always returns 0 (no escalation). + """ + return 0 diff --git a/platform/aspeed/sonic-platform-modules-nvidia-bmc/ast2700/sonic_platform/leakage_sensor.py b/platform/aspeed/sonic-platform-modules-nvidia-bmc/ast2700/sonic_platform/leakage_sensor.py new file mode 100644 index 00000000000..108f1d060a4 --- /dev/null +++ b/platform/aspeed/sonic-platform-modules-nvidia-bmc/ast2700/sonic_platform/leakage_sensor.py @@ -0,0 +1,164 @@ +# +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +import os +from typing import List, Optional, Tuple + +try: + from sonic_platform_base.liquid_cooling_base import LeakageSensorBase + from sonic_platform.leak_sensor_profile import LeakSensorProfile + from sonic_platform_base.liquid_cooling_base import LeakSeverity + from sonic_platform.utils import hw_mgmt_path, read_sysfs_float, read_sysfs_text + from sonic_py_common.logger import Logger +except ImportError as e: + raise ImportError(str(e) + " - required module not found") + +logger = Logger() + + +def _check_value_in_range(scaled, bound_a, bound_b): + low, high = (bound_a, bound_b) if bound_a <= bound_b else (bound_b, bound_a) + return low <= scaled <= high + + +class LeakageSensor(LeakageSensorBase): + """ + NVIDIA BMC leakage sensor. + """ + + LEAKAGE_CHANNEL_DIR = hw_mgmt_path("leakage", "{a2d_index}", "{channel_index}") + + def __init__(self, a2d_index, channel_index): + self._a2d_index = a2d_index + self._channel_index = channel_index + self._channel_dir = self.LEAKAGE_CHANNEL_DIR.format(a2d_index=a2d_index, channel_index=channel_index) + name, sensor_type, location = self._get_leak_sensor_identity_from_hwmgmt() + super().__init__(name, type=sensor_type, location=location) + self._init_thresholds() + self._profile = LeakSensorProfile(self.get_leak_sensor_type()) + + def _get_leak_sensor_identity_from_hwmgmt(self) -> Tuple[str, Optional[str], Optional[str]]: + channel_raw = read_sysfs_text(os.path.join(self._channel_dir, "channel_name")) + sensor_type = read_sysfs_text(os.path.join(self._channel_dir, "type")) + default_name = f"leakage_{self._a2d_index}_{self._channel_index}" + name = channel_raw.strip() if channel_raw else default_name + location = name.split("_", 1)[0] if name else None + return name, sensor_type, location + + def _init_thresholds(self): + self._scale = self._read_channel_sysfs("scale") + self._min_threshold = self._read_channel_sysfs("min") + self._max_threshold = self._read_channel_sysfs("max") + self._lwarn_threshold = self._read_channel_sysfs("lwarn") + self._warn_threshold = self._read_channel_sysfs("warn") + self._lcrit_threshold = self._read_channel_sysfs("lcrit") + self._crit_threshold = self._read_channel_sysfs("crit") + self._hwmgmt_thresholds_valid = self._validate_hwmgmt_thresholds() + + def _read_channel_sysfs(self, path): + return read_sysfs_float(os.path.join(self._channel_dir, path)) + + def _verify_hwmgmt_data(self) -> Tuple[List[str], Optional[str]]: + required = ( + ("scale", self._scale), + ("min", self._min_threshold), + ("max", self._max_threshold), + ("lwarn", self._lwarn_threshold), + ("warn", self._warn_threshold), + ("lcrit", self._lcrit_threshold), + ("crit", self._crit_threshold), + ) + missing = [n for n, v in required if v is None] + if missing: + return missing, None + + order = ("lcrit", "crit", "lwarn", "warn", "min", "max") + values = ( + self._lcrit_threshold, + self._crit_threshold, + self._lwarn_threshold, + self._warn_threshold, + self._min_threshold, + self._max_threshold, + ) + for lo, hi, lo_n, hi_n in zip(values, values[1:], order, order[1:]): + if not lo < hi: + msg = ( + "thresholds must be strictly ordered as " + "lcrit < crit < lwarn < warn < min < max; " + f"failed {lo_n} ({lo!r}) < {hi_n} ({hi!r})" + ) + return [], msg + return [], None + + def _log_prefix(self) -> str: + return f"leak sensor {self.name} ({self._channel_dir})" + + def _validate_hwmgmt_thresholds(self): + missing, ordering_error = self._verify_hwmgmt_data() + if missing: + missing_list = ", ".join(sorted(missing)) + logger.log_error(f"{self._log_prefix()}: missing required sysfs values: {missing_list}") + return False + if ordering_error: + logger.log_error(f"{self._log_prefix()}: {ordering_error}") + return False + return True + + def _check_channel_value(self) -> Tuple[bool, bool, Optional[str]]: + """ + Evaluate the sensor and return a `(leaking, sensor_ok, severity)` tuple. + """ + READING_ERROR = False, False, None + + if not self._hwmgmt_thresholds_valid: + return READING_ERROR + + input_value = self._read_channel_sysfs("input") + if input_value is None: + logger.log_error(f"{self._log_prefix()}: missing sysfs value: input") + return READING_ERROR + + scaled = input_value * self._scale + + if scaled > self._max_threshold or scaled < self._lcrit_threshold: + return READING_ERROR + + if _check_value_in_range(scaled, self._min_threshold, self._max_threshold): + return False, True, None + if _check_value_in_range(scaled, self._lcrit_threshold, self._crit_threshold): + return True, True, LeakSeverity.CRITICAL + if _check_value_in_range(scaled, self._lwarn_threshold, self._warn_threshold): + return True, True, LeakSeverity.MINOR + + return False, False, None + + def is_leak(self): + leaking, _, _ = self._check_channel_value() + return leaking + + def is_leak_sensor_ok(self): + _, sensor_ok, _ = self._check_channel_value() + return sensor_ok + + def get_leak_severity(self): + _, _, severity = self._check_channel_value() + return severity + + def get_leak_profile(self): + return self._profile diff --git a/platform/aspeed/sonic-platform-modules-nvidia-bmc/ast2700/sonic_platform/liquid_cooling.py b/platform/aspeed/sonic-platform-modules-nvidia-bmc/ast2700/sonic_platform/liquid_cooling.py new file mode 100644 index 00000000000..e6eac4b19e9 --- /dev/null +++ b/platform/aspeed/sonic-platform-modules-nvidia-bmc/ast2700/sonic_platform/liquid_cooling.py @@ -0,0 +1,71 @@ +# +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +import os +from typing import List, Tuple + +try: + from sonic_platform_base.liquid_cooling_base import LiquidCoolingBase + from sonic_platform.leakage_sensor import LeakageSensor + from sonic_platform.utils import hw_mgmt_path +except ImportError as e: + raise ImportError(str(e) + " - required module not found") + + +def _sorted_numeric_subdirs(parent: str) -> List[int]: + """Return numeric subdirectory names under `parent` as a sorted `int` list.""" + if not os.path.isdir(parent): + return [] + out = [] + for name in os.listdir(parent): + if not name.isdigit(): + continue + if os.path.isdir(os.path.join(parent, name)): + out.append(int(name)) + out.sort() + return out + + +def _discover_leakage_hw_indices() -> List[Tuple[int, int]]: + """ + Discover `(a2d, channel)` indices under `/var/run/hw-management/leakage`. + + The layout is `leakage///` with positive integer path components. + Returns an ordered list of `(a2d, channel)` pairs for every present channel + directory. If `leakage` is missing or empty, returns an empty list. + """ + root = hw_mgmt_path("leakage") + pairs = [] + for a2d in _sorted_numeric_subdirs(root): + base = os.path.join(root, str(a2d)) + for channel in _sorted_numeric_subdirs(base): + pairs.append((a2d, channel)) + return pairs + + +class LiquidCooling(LiquidCoolingBase): + def __init__(self): + sensors = [LeakageSensor(a2d, channel) for a2d, channel in _discover_leakage_hw_indices()] + + profiles_by_type = {} + for sensor in sensors: + profile = sensor.get_leak_profile() + if profile is None: + continue + profiles_by_type.setdefault(profile.get_type(), profile) + super().__init__(len(sensors), sensors, profiles=list(profiles_by_type.values())) diff --git a/platform/aspeed/sonic-platform-modules-nvidia-bmc/ast2700/sonic_platform/platform.py b/platform/aspeed/sonic-platform-modules-nvidia-bmc/ast2700/sonic_platform/platform.py new file mode 100644 index 00000000000..e27eb0fc109 --- /dev/null +++ b/platform/aspeed/sonic-platform-modules-nvidia-bmc/ast2700/sonic_platform/platform.py @@ -0,0 +1,44 @@ +# +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +"""SONiC Platform API - Platform class for the NVIDIA AST2700 BMC.""" + +try: + from sonic_platform.chassis import Chassis +except ImportError as e: + raise ImportError(str(e) + " - required module not found") + + +class Platform: + """ + Platform class for the NVIDIA AST2700 BMC. + + Provides access to chassis-level functionality. + """ + + def __init__(self) -> None: + self._chassis = Chassis() + + def get_chassis(self): + """ + Retrieve the chassis object. + + Returns: + An object derived from `ChassisBase` representing the chassis. + """ + return self._chassis diff --git a/platform/aspeed/sonic-platform-modules-nvidia-bmc/ast2700/sonic_platform/reboot_cause.py b/platform/aspeed/sonic-platform-modules-nvidia-bmc/ast2700/sonic_platform/reboot_cause.py new file mode 100644 index 00000000000..7c851b3a0a8 --- /dev/null +++ b/platform/aspeed/sonic-platform-modules-nvidia-bmc/ast2700/sonic_platform/reboot_cause.py @@ -0,0 +1,68 @@ +# +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +from sonic_platform.utils import hwmgmt_flag_is_set +from sonic_py_common.logger import Logger + +try: + from sonic_platform_base.chassis_base import ChassisBase +except ImportError as e: + raise ImportError(str(e) + " - required module not found") + +logger = Logger() + + +class RebootCause: + """ + Reboot-cause provider for the NVIDIA AST2700 BMC. + + Reads hw-management reset attribute files under `/var/run/hw-management/bmc/`. + """ + + _BMC_RESET_DIR = "bmc" + + def __init__(self): + self._reboot_major_cause_dict = { + 'reset_security_watchdog2': ChassisBase.REBOOT_CAUSE_WATCHDOG, + 'reset_cpu': ChassisBase.REBOOT_CAUSE_HARDWARE_CPU, + 'reset_other': ChassisBase.REBOOT_CAUSE_HARDWARE_OTHER, + 'reset_power_on': ChassisBase.REBOOT_CAUSE_POWER_LOSS, + } + self._watchdog_file = 'reset_watchdog' + self._power_on_file = 'reset_power_on' + + def get_reboot_cause(self): + """ + Returns: + tuple(str, str): `(cause, description)`. `cause` is one of the + `ChassisBase.REBOOT_CAUSE_*` constants. + """ + if (hwmgmt_flag_is_set(self._BMC_RESET_DIR, self._watchdog_file) + and hwmgmt_flag_is_set(self._BMC_RESET_DIR, self._power_on_file)): + logger.log_info( + f"Reboot cause: {self._watchdog_file} and {self._power_on_file} (software watchdog)" + ) + return ChassisBase.REBOOT_CAUSE_NON_HARDWARE, '' + + for reset_file, reset_cause in self._reboot_major_cause_dict.items(): + if hwmgmt_flag_is_set(self._BMC_RESET_DIR, reset_file): + logger.log_info(f"Hardware reboot cause: {reset_file}") + return reset_cause, '' + + logger.log_info("No hardware reboot cause found") + return ChassisBase.REBOOT_CAUSE_NON_HARDWARE, '' diff --git a/platform/aspeed/sonic-platform-modules-nvidia-bmc/ast2700/sonic_platform/switch_host_module.py b/platform/aspeed/sonic-platform-modules-nvidia-bmc/ast2700/sonic_platform/switch_host_module.py new file mode 100644 index 00000000000..f064d9a17e9 --- /dev/null +++ b/platform/aspeed/sonic-platform-modules-nvidia-bmc/ast2700/sonic_platform/switch_host_module.py @@ -0,0 +1,136 @@ +# +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +import os +import subprocess + +try: + from sonic_platform_base.module_base import ModuleBase + from sonic_platform.eeprom import EepromSystem + from sonic_platform.utils import hw_mgmt_path, read_sysfs_int + from sonic_py_common.logger import Logger +except ImportError as e: + raise ImportError(str(e) + " - required module not found") + +logger = Logger() + +# hw-management helper script used for Switch-Host power actions. +HW_MGMT_POWERCTRL = "/usr/bin/hw-management-bmc-powerctrl.sh" + +# Maximum time (in seconds) to wait for `hw-management-bmc-powerctrl.sh` to complete. +HW_MGMT_POWERCTRL_TIMEOUT = 10 + +# `pwr_down` sysfs values: +# 0 -> Switch-Host powered on +# 1 -> Switch-Host powered off +PWR_DOWN_SYSFS = hw_mgmt_path("system", "pwr_down") + +# hw-management-bmc-powerctrl.sh actions. +_POWERCTRL_POWER_ON = "power_on" +_POWERCTRL_POWER_OFF = "power_off" +_POWERCTRL_RESET = "reset" + + +class SwitchHostModule(ModuleBase): + """ + Module object representing the Switch-Host on the NVIDIA AST2700 BMC. + """ + + NAME = "SWITCH-HOST" + DESCRIPTION = "NVIDIA Switch-Host" + + def __init__(self, slot=0): + super().__init__() + self._slot = slot + self._eeprom = EepromSystem() + + @staticmethod + def _run_powerctrl(action): + """ + Invoke `hw-management-bmc-powerctrl.sh `. + + A non-zero exit or spawn failure is logged as ERROR together with the subprocess stderr. + + Args: + action: one of `_POWERCTRL_POWER_ON`, `_POWERCTRL_POWER_OFF`, `_POWERCTRL_RESET`. + + Returns: + bool: True on a zero exit, False otherwise. + """ + try: + result = subprocess.run( + [HW_MGMT_POWERCTRL, action], + stdout=subprocess.PIPE, + stderr=subprocess.PIPE, + check=False, + timeout=HW_MGMT_POWERCTRL_TIMEOUT, + ) + except subprocess.TimeoutExpired as exc: + logger.log_error(f"{HW_MGMT_POWERCTRL} {action} timed out: {exc}") + return False + except OSError as exc: + logger.log_error(f"{HW_MGMT_POWERCTRL} {action} failed to execute: {exc}") + return False + + if result.returncode != 0: + stderr = (result.stderr or b"").decode(errors="replace").strip() + logger.log_error(f"{HW_MGMT_POWERCTRL} {action} exited with {result.returncode}: {stderr}") + return False + return True + + def get_name(self): + return self.NAME + + def get_description(self): + return self.DESCRIPTION + + def get_type(self): + return self.MODULE_TYPE_SWITCH_HOST + + def get_slot(self): + return self._slot + + def get_presence(self): + return True + + def is_replaceable(self): + return False + + def set_admin_state(self, up): + action = _POWERCTRL_POWER_ON if up else _POWERCTRL_POWER_OFF + return self._run_powerctrl(action) + + def reboot(self, reboot_type=ModuleBase.MODULE_REBOOT_DEFAULT): + if reboot_type != ModuleBase.MODULE_REBOOT_DEFAULT: + logger.log_error( + f"Switch-Host reboot type {reboot_type!r} is not supported; " + "only MODULE_REBOOT_DEFAULT is supported" + ) + return False + return self._run_powerctrl(_POWERCTRL_RESET) + + def get_oper_status(self): + value = read_sysfs_int(PWR_DOWN_SYSFS) + if value == 0: + return ModuleBase.MODULE_STATUS_ONLINE + if value == 1: + return ModuleBase.MODULE_STATUS_OFFLINE + return ModuleBase.MODULE_STATUS_EMPTY + + def get_serial(self): + return self._eeprom.get_serial_number() diff --git a/platform/aspeed/sonic-platform-modules-nvidia-bmc/ast2700/sonic_platform/thermal.py b/platform/aspeed/sonic-platform-modules-nvidia-bmc/ast2700/sonic_platform/thermal.py new file mode 100644 index 00000000000..a39b30ec03c --- /dev/null +++ b/platform/aspeed/sonic-platform-modules-nvidia-bmc/ast2700/sonic_platform/thermal.py @@ -0,0 +1,108 @@ +# +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +import os + +try: + from sonic_platform_base.thermal_base import ThermalBase +except ImportError as e: + raise ImportError(str(e) + " - required module not found") + +from sonic_platform.utils import hw_mgmt_path, read_sysfs_float + + +class ThermalBMC(ThermalBase): + """ + Thermal sensor class for the NVIDIA AST2700 BMC platform. + + Reads the BMC ambient temperature exposed by hw-management under + `/var/run/hw-management/thermal/`. + """ + + HW_MGMT_ROOT = hw_mgmt_path("thermal") + TEMP_SCALE = 1000.0 + NA = "N/A" + + def __init__(self): + ThermalBase.__init__(self) + + self.name = "BMC Ambient" + self.input_path = os.path.join(self.HW_MGMT_ROOT, "bmc_temp_input") + self.max_path = os.path.join(self.HW_MGMT_ROOT, "bmc_temp") + self.min_path = os.path.join(self.HW_MGMT_ROOT, "bmc_min") + + def _read_scaled(self, path): + value = read_sysfs_float(path) + if value is None: + return self.NA + return value / self.TEMP_SCALE + + def get_name(self): + """ + Retrieve the name of the thermal sensor. + + Returns: + str: The name of the thermal sensor. + """ + return self.name + + def get_temperature(self): + """ + Retrieve the current temperature reading from the thermal sensor. + + Returns: + The current temperature in Celsius to the nearest thousandth of a degree (e.g. 30.125), + or `"N/A"` if unavailable. + """ + return self._read_scaled(self.input_path) + + def get_high_threshold(self): + """ + Retrieve the high threshold temperature of the thermal sensor. + + Returns: + The high threshold temperature in Celsius, or `"N/A"` if unavailable. + """ + return self._read_scaled(self.max_path) + + def get_low_threshold(self): + """ + Retrieve the low threshold temperature of the thermal sensor. + + Returns: + The low threshold temperature in Celsius, or `"N/A"` if unavailable. + """ + return self._read_scaled(self.min_path) + + def get_high_critical_threshold(self): + """ + Retrieve the high critical threshold temperature of the thermal sensor. + + Returns: + `"N/A"` -- the BMC ambient sensor has no critical threshold. + """ + return self.NA + + def get_low_critical_threshold(self): + """ + Retrieve the low critical threshold temperature of the thermal sensor. + + Returns: + `"N/A"` -- the BMC ambient sensor has no critical threshold. + """ + return self.NA diff --git a/platform/aspeed/sonic-platform-modules-nvidia-bmc/ast2700/sonic_platform/utils.py b/platform/aspeed/sonic-platform-modules-nvidia-bmc/ast2700/sonic_platform/utils.py new file mode 100644 index 00000000000..0f561531e9b --- /dev/null +++ b/platform/aspeed/sonic-platform-modules-nvidia-bmc/ast2700/sonic_platform/utils.py @@ -0,0 +1,85 @@ +# +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +"""Helpers for paths and sysfs-style files under `/var/run/hw-management`.""" + +import os + +from sonic_py_common.logger import Logger + +HW_MANAGEMENT_ROOT = "/var/run/hw-management" + +logger = Logger() + + +def hw_mgmt_path(*relative_parts): + return os.path.join(HW_MANAGEMENT_ROOT, *relative_parts) + + +def _read_sysfs_strip(path, log_errors=True): + """ + Read `path` and return its stripped content. + + Returns: + tuple: `(True, stripped_str)` on success, `(False, None)` on I/O error. + """ + try: + with open(path, "r") as f: + return True, f.read().strip() + except OSError as exc: + if log_errors: + logger.log_error(f"failed to read {path}: {exc}") + return False, None + + +def read_sysfs_text(path, default=None): + ok, raw = _read_sysfs_strip(path) + return raw if ok else default + + +def read_sysfs_int(path, base=0, default=None, log_errors=True): + ok, raw = _read_sysfs_strip(path, log_errors=log_errors) + if not ok: + return default + try: + return int(raw, base) + except ValueError: + if log_errors: + logger.log_error(f"failed to parse integer from {path}: {raw!r}") + return default + + +def hwmgmt_flag_is_set(*relative_parts): + """ + Return True when the hw-management attribute at `relative_parts` is non-zero. + + Missing or unreadable files return False without logging. + """ + value = read_sysfs_int(hw_mgmt_path(*relative_parts), default=0, log_errors=False) + return bool(value) + + +def read_sysfs_float(path, default=None): + ok, raw = _read_sysfs_strip(path) + if not ok: + return default + try: + return float(raw) + except ValueError: + logger.log_error(f"failed to parse float from {path}: {raw!r}") + return default diff --git a/platform/aspeed/sonic-platform-modules-nvidia-bmc/ast2700/tests/__init__.py b/platform/aspeed/sonic-platform-modules-nvidia-bmc/ast2700/tests/__init__.py new file mode 100644 index 00000000000..fa1251bb6bd --- /dev/null +++ b/platform/aspeed/sonic-platform-modules-nvidia-bmc/ast2700/tests/__init__.py @@ -0,0 +1,17 @@ +# +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# diff --git a/platform/aspeed/sonic-platform-modules-nvidia-bmc/ast2700/tests/conftest.py b/platform/aspeed/sonic-platform-modules-nvidia-bmc/ast2700/tests/conftest.py new file mode 100644 index 00000000000..24b6147ac3d --- /dev/null +++ b/platform/aspeed/sonic-platform-modules-nvidia-bmc/ast2700/tests/conftest.py @@ -0,0 +1,27 @@ +# +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +import os +import sys + +TESTS_DIR = os.path.dirname(os.path.abspath(__file__)) +PKG_PARENT_DIR = os.path.dirname(TESTS_DIR) + +# Make the top-level `sonic_platform` package importable from source. +if PKG_PARENT_DIR not in sys.path: + sys.path.insert(0, PKG_PARENT_DIR) diff --git a/platform/aspeed/sonic-platform-modules-nvidia-bmc/ast2700/tests/test_chassis.py b/platform/aspeed/sonic-platform-modules-nvidia-bmc/ast2700/tests/test_chassis.py new file mode 100644 index 00000000000..61882c4e1d9 --- /dev/null +++ b/platform/aspeed/sonic-platform-modules-nvidia-bmc/ast2700/tests/test_chassis.py @@ -0,0 +1,150 @@ +# +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +from unittest.mock import MagicMock, patch + +import pytest + +from sonic_platform_base.chassis_base import ChassisBase + + +# `EepromBMC` / `EepromSystem` run an `ipmi-fru` subprocess from `__init__` via +# `super().__init__`. We patch them at the point they're imported into the chassis +# and switch_host_module modules so that tests never touch the real hardware. +PATCH_EEPROM_BMC = "sonic_platform.chassis.EepromBMC" +PATCH_THERMAL_BMC = "sonic_platform.chassis.ThermalBMC" +PATCH_SWITCH_HOST = "sonic_platform.chassis.SwitchHostModule" +PATCH_REBOOT_CAUSE = "sonic_platform.chassis.RebootCause" +PATCH_PLATFORM_JSON = "sonic_platform.chassis.device_info.get_platform_json_data" + + +@pytest.fixture +def chassis(): + """Build a `Chassis` instance with all collaborators mocked out.""" + with patch(PATCH_EEPROM_BMC) as eeprom_cls, \ + patch(PATCH_THERMAL_BMC) as thermal_cls, \ + patch(PATCH_SWITCH_HOST) as module_cls, \ + patch(PATCH_REBOOT_CAUSE) as reboot_cls: + eeprom_cls.return_value = MagicMock(name="EepromBMC") + thermal_cls.return_value = MagicMock(name="ThermalBMC") + module_cls.return_value = MagicMock(name="SwitchHostModule") + reboot_cls.return_value = MagicMock(name="RebootCause") + + from sonic_platform.chassis import Chassis + yield Chassis() + + +class TestChassis: + """Mock-based coverage for `sonic_platform.chassis.Chassis`.""" + + def test_is_chassis_base_subclass(self, chassis): + assert isinstance(chassis, ChassisBase) + + def test_is_bmc_true(self, chassis): + assert chassis.is_bmc() is True + + def test_is_liquid_cooled_true_from_platform_json(self, chassis): + with patch(PATCH_PLATFORM_JSON, return_value={"chassis": {"liquid_cooled": True}}): + assert chassis.is_liquid_cooled() is True + + def test_is_liquid_cooled_false_from_platform_json(self, chassis): + with patch(PATCH_PLATFORM_JSON, return_value={"chassis": {"liquid_cooled": False}}): + assert chassis.is_liquid_cooled() is False + + def test_is_liquid_cooled_defaults_false_when_field_missing(self, chassis): + with patch(PATCH_PLATFORM_JSON, return_value={"chassis": {}}): + assert chassis.is_liquid_cooled() is False + + def test_is_liquid_cooled_defaults_false_when_chassis_missing(self, chassis): + with patch(PATCH_PLATFORM_JSON, return_value={}): + assert chassis.is_liquid_cooled() is False + + def test_is_liquid_cooled_false_when_platform_json_unavailable(self, chassis): + with patch(PATCH_PLATFORM_JSON, return_value=None): + assert chassis.is_liquid_cooled() is False + + def test_default_collaborator_lists(self, chassis): + assert len(chassis._thermal_list) == 1 + assert len(chassis._module_list) == 1 + assert chassis._liquid_cooling is None + + def test_get_eeprom_returns_internal_eeprom(self, chassis): + assert chassis.get_eeprom() is chassis._eeprom + + def test_get_name_delegates_to_eeprom(self, chassis): + chassis._eeprom.get_product_name.return_value = "Nvidia-BMC-AST2700" + assert chassis.get_name() == "Nvidia-BMC-AST2700" + chassis._eeprom.get_product_name.assert_called_once_with() + + def test_get_model_delegates_to_eeprom(self, chassis): + chassis._eeprom.get_part_number.return_value = "MBF-AST2700-001" + assert chassis.get_model() == "MBF-AST2700-001" + chassis._eeprom.get_part_number.assert_called_once_with() + + def test_get_base_mac_delegates_to_eeprom(self, chassis): + chassis._eeprom.get_base_mac.return_value = "aa:bb:cc:dd:ee:ff" + assert chassis.get_base_mac() == "aa:bb:cc:dd:ee:ff" + + def test_get_serial_delegates_to_eeprom(self, chassis): + chassis._eeprom.get_serial_number.return_value = "SN1234567" + assert chassis.get_serial() == "SN1234567" + + def test_get_system_eeprom_info_delegates(self, chassis): + info = {hex(0x21): "product", hex(0x23): "SN0"} + chassis._eeprom.get_system_eeprom_info.return_value = info + assert chassis.get_system_eeprom_info() == info + + def test_get_revision_delegates_to_eeprom(self, chassis): + chassis._eeprom.get_revision.return_value = "A0" + assert chassis.get_revision() == "A0" + + def test_get_reboot_cause_delegates(self, chassis): + expected = (ChassisBase.REBOOT_CAUSE_NON_HARDWARE, "") + chassis._reboot_cause.get_reboot_cause.return_value = expected + assert chassis.get_reboot_cause() == expected + chassis._reboot_cause.get_reboot_cause.assert_called_once_with() + + def test_get_switch_host_serial_delegates(self, chassis): + expected = "SWHOST-SN-0001" + chassis._switch_host_module.get_serial.return_value = expected + assert chassis.get_switch_host_serial() == expected + chassis._switch_host_module.get_serial.assert_called_once_with() + + def test_get_liquid_cooling_lazily_initializes(self, chassis): + assert chassis._liquid_cooling is None + with patch("sonic_platform.liquid_cooling.LiquidCooling") as lc_cls: + lc_instance = MagicMock(name="LiquidCooling") + lc_cls.return_value = lc_instance + lc = chassis.get_liquid_cooling() + lc_cls.assert_called_once_with() + assert lc is lc_instance + assert chassis._liquid_cooling is lc_instance + + def test_get_liquid_cooling_is_cached(self, chassis): + with patch("sonic_platform.liquid_cooling.LiquidCooling") as lc_cls: + lc_instance = MagicMock(name="LiquidCooling") + lc_cls.return_value = lc_instance + first = chassis.get_liquid_cooling() + second = chassis.get_liquid_cooling() + lc_cls.assert_called_once_with() + assert first is lc_instance + assert second is lc_instance + + def test_thermal_and_module_lists_accessible_via_base_api(self, chassis): + assert chassis.get_all_thermals() == chassis._thermal_list + assert chassis.get_all_modules() == chassis._module_list diff --git a/platform/aspeed/sonic-platform-modules-nvidia-bmc/ast2700/tests/test_eeprom.py b/platform/aspeed/sonic-platform-modules-nvidia-bmc/ast2700/tests/test_eeprom.py new file mode 100644 index 00000000000..812f1d5aed6 --- /dev/null +++ b/platform/aspeed/sonic-platform-modules-nvidia-bmc/ast2700/tests/test_eeprom.py @@ -0,0 +1,229 @@ +# +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +import subprocess +from types import SimpleNamespace +from unittest.mock import MagicMock, patch + +import pytest + +from sonic_platform.eeprom import ( + EEPROM_BMC_PATH, + EEPROM_SYSTEM_PATH, + Eeprom, + EepromBMC, + EepromSystem, + IpmiFru, +) + + +# Sample stdout from `ipmi-fru --fru-file=`. The parser keys off the labels +# listed in `IpmiFru.PARSING_RULES`. +IPMI_FRU_OUTPUT = ( + "FRU Inventory Area Size: 256 bytes\n" + "FRU Board Product Name: AST2700-BMC\n" + "FRU Board Part Number: MBF-AST2700-001\n" + "FRU Board Serial Number: SN1234567\n" + "FRU Board Custom Info: MAC: aa:bb:cc:dd:ee:ff\n" + "FRU Product Version: A0\n" +) + + +@pytest.fixture(autouse=True) +def _isolate_ipmi_fru_cache(): + """ + Reset the `functools.cache` on `IpmiFru.get_tlv_dict` between tests. + + The cache is per-instance so this is normally safe, but mocking `subprocess.run` + means a stale cached entry could leak if a test reused the same instance. + """ + IpmiFru.get_tlv_dict.cache_clear() + yield + IpmiFru.get_tlv_dict.cache_clear() + + +class TestIpmiFru: + + def test_get_fru_info_invokes_ipmi_fru(self): + fru = IpmiFru("/var/run/fake") + fake_result = SimpleNamespace(stdout=IPMI_FRU_OUTPUT, stderr="", returncode=0) + with patch("sonic_platform.eeprom.subprocess.run", return_value=fake_result) as sp: + assert fru.get_fru_info() == IPMI_FRU_OUTPUT + sp.assert_called_once() + cmd = sp.call_args[0][0] + assert "ipmi-fru" in cmd + assert "/var/run/fake" in cmd + + def test_get_fru_info_returns_empty_on_nonzero_exit(self): + fru = IpmiFru("/var/run/fake") + fake_result = SimpleNamespace(stdout="garbage", stderr="boom", returncode=2) + with patch("sonic_platform.eeprom.subprocess.run", return_value=fake_result): + assert fru.get_fru_info() == "" + + def test_get_fru_info_returns_empty_when_binary_missing(self): + fru = IpmiFru("/var/run/fake") + with patch("sonic_platform.eeprom.subprocess.run", side_effect=FileNotFoundError("ipmi-fru")): + assert fru.get_fru_info() == "" + + def test_get_fru_info_returns_empty_on_timeout(self): + fru = IpmiFru("/var/run/fake") + timeout_exc = subprocess.TimeoutExpired(cmd="ipmi-fru", timeout=fru.IPMI_FRU_TIMEOUT) + with patch("sonic_platform.eeprom.subprocess.run", side_effect=timeout_exc): + assert fru.get_fru_info() == "" + + def test_get_tlv_list_contains_expected_codes(self): + fru = IpmiFru("/dev/null") + tlv_list = fru.get_tlv_list() + assert Eeprom._TLV_CODE_PRODUCT_NAME in tlv_list + assert Eeprom._TLV_CODE_PART_NUMBER in tlv_list + assert Eeprom._TLV_CODE_SERIAL_NUMBER in tlv_list + assert Eeprom._TLV_CODE_MAC_BASE in tlv_list + assert Eeprom._TLV_CODE_LABEL_REVISION in tlv_list + + def test_get_tlv_dict_parses_output(self): + fru = IpmiFru("/dev/null") + with patch.object(fru, "get_fru_info", return_value=IPMI_FRU_OUTPUT): + tlvs = fru.get_tlv_dict() + assert tlvs[Eeprom._TLV_CODE_PRODUCT_NAME] == "AST2700-BMC" + assert tlvs[Eeprom._TLV_CODE_PART_NUMBER] == "MBF-AST2700-001" + assert tlvs[Eeprom._TLV_CODE_SERIAL_NUMBER] == "SN1234567" + assert tlvs[Eeprom._TLV_CODE_MAC_BASE] == "aa:bb:cc:dd:ee:ff" + assert tlvs[Eeprom._TLV_CODE_LABEL_REVISION] == "A0" + + def test_get_tlv_dict_ignores_unknown_lines(self): + fru = IpmiFru("/dev/null") + noisy = "Random line\nAnother: thing\nFRU Board Serial Number: XYZ\n" + with patch.object(fru, "get_fru_info", return_value=noisy): + tlvs = fru.get_tlv_dict() + assert tlvs == {Eeprom._TLV_CODE_SERIAL_NUMBER: "XYZ"} + + +class TestEeprom: + + def _make_eeprom(self, available_in_redis=False): + # The `TlvInfoDecoder` base class reaches for sonic-db; the `Eeprom` subclass + # only accesses it through `_redis_hget` which we override in each test. + return Eeprom("/var/run/fake-fru", available_in_redis=available_in_redis) + + def test_eeprom_dict_get_returns_fru_dict_when_redis_disabled(self): + eeprom = self._make_eeprom(available_in_redis=False) + with patch.object(eeprom.fru, "get_tlv_dict", return_value={Eeprom._TLV_CODE_PRODUCT_NAME: "P"}): + data = eeprom._eeprom_dict_get() + assert data == {Eeprom._TLV_CODE_PRODUCT_NAME: "P"} + + def test_eeprom_dict_get_falls_back_when_redis_uninitialized(self): + eeprom = self._make_eeprom(available_in_redis=True) + eeprom._redis_hget = MagicMock(return_value="0") + with patch.object(eeprom.fru, "get_tlv_dict", return_value={Eeprom._TLV_CODE_SERIAL_NUMBER: "S"}): + data = eeprom._eeprom_dict_get() + assert data == {Eeprom._TLV_CODE_SERIAL_NUMBER: "S"} + + def test_eeprom_init_populates_info_and_raw(self): + eeprom = self._make_eeprom() + tlv_dict = { + Eeprom._TLV_CODE_PRODUCT_NAME: "AST2700-BMC", + Eeprom._TLV_CODE_PART_NUMBER: "MBF-AST2700-001", + Eeprom._TLV_CODE_SERIAL_NUMBER: "SN1234567", + Eeprom._TLV_CODE_MAC_BASE: "aa:bb:cc:dd:ee:ff", + Eeprom._TLV_CODE_LABEL_REVISION: "A0", + } + with patch.object(eeprom, "_eeprom_dict_get", return_value=tlv_dict): + eeprom._eeprom_init() + + assert eeprom._eeprom_raw is not None + assert eeprom._eeprom_raw.startswith(Eeprom._TLV_INFO_ID_STRING) + + info = eeprom._eeprom_info_dict + assert info[hex(Eeprom._TLV_CODE_PRODUCT_NAME)] == "AST2700-BMC" + assert info[hex(Eeprom._TLV_CODE_PART_NUMBER)] == "MBF-AST2700-001" + assert info[hex(Eeprom._TLV_CODE_SERIAL_NUMBER)] == "SN1234567" + assert info[hex(Eeprom._TLV_CODE_MAC_BASE)] == "aa:bb:cc:dd:ee:ff" + assert info[hex(Eeprom._TLV_CODE_LABEL_REVISION)] == "A0" + # The checksum is appended as a CRC32 entry. + assert hex(Eeprom._TLV_CODE_CRC_32) in info + + def test_getter_helpers_use_system_eeprom_info(self): + eeprom = self._make_eeprom() + info = { + hex(Eeprom._TLV_CODE_PRODUCT_NAME): "prod", + hex(Eeprom._TLV_CODE_PART_NUMBER): "part", + hex(Eeprom._TLV_CODE_SERIAL_NUMBER): "serial", + hex(Eeprom._TLV_CODE_MAC_BASE): "11:22:33:44:55:66", + hex(Eeprom._TLV_CODE_LABEL_REVISION): "A0", + } + eeprom._eeprom_info_dict = info + + assert eeprom.get_product_name() == "prod" + assert eeprom.get_part_number() == "part" + assert eeprom.get_serial_number() == "serial" + assert eeprom.get_base_mac() == "11:22:33:44:55:66" + assert eeprom.get_revision() == "A0" + + def test_getters_return_none_when_code_missing(self): + eeprom = self._make_eeprom() + eeprom._eeprom_info_dict = {} + assert eeprom.get_product_name() is None + assert eeprom.get_part_number() is None + assert eeprom.get_serial_number() is None + assert eeprom.get_base_mac() is None + assert eeprom.get_revision() is None + + def test_read_eeprom_caches_raw_buffer(self): + eeprom = self._make_eeprom() + with patch.object(eeprom, "_eeprom_init") as init: + def fake_init(): + eeprom._eeprom_raw = b"RAW" + eeprom._eeprom_info_dict = {} + init.side_effect = fake_init + + first = eeprom.read_eeprom() + second = eeprom.read_eeprom() + + assert first == b"RAW" + assert second == b"RAW" + init.assert_called_once() + + def test_get_system_eeprom_info_caches(self): + eeprom = self._make_eeprom() + with patch.object(eeprom, "_eeprom_init") as init: + def fake_init(): + eeprom._eeprom_info_dict = {"a": 1} + eeprom._eeprom_raw = b"X" + init.side_effect = fake_init + + info = eeprom.get_system_eeprom_info() + info2 = eeprom.get_system_eeprom_info() + + assert info == {"a": 1} + assert info is info2 + init.assert_called_once() + + +class TestEepromBMCAndSystem: + + def test_eeprom_bmc_uses_bmc_path_and_redis(self): + with patch("sonic_platform.eeprom.IpmiFru") as fru_cls: + bmc = EepromBMC() + fru_cls.assert_called_once_with(EEPROM_BMC_PATH) + assert bmc.available_in_redis is True + + def test_eeprom_system_uses_system_path_no_redis(self): + with patch("sonic_platform.eeprom.IpmiFru") as fru_cls: + system = EepromSystem() + fru_cls.assert_called_once_with(EEPROM_SYSTEM_PATH) + assert system.available_in_redis is False diff --git a/platform/aspeed/sonic-platform-modules-nvidia-bmc/ast2700/tests/test_leak_sensor_profile.py b/platform/aspeed/sonic-platform-modules-nvidia-bmc/ast2700/tests/test_leak_sensor_profile.py new file mode 100644 index 00000000000..c324df626e5 --- /dev/null +++ b/platform/aspeed/sonic-platform-modules-nvidia-bmc/ast2700/tests/test_leak_sensor_profile.py @@ -0,0 +1,38 @@ +# +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +from sonic_platform_base.liquid_cooling_base import LeakSensorProfileBase +from sonic_platform.leak_sensor_profile import LeakSensorProfile + + +class TestLeakSensorProfile: + + def test_is_subclass_of_base(self): + assert issubclass(LeakSensorProfile, LeakSensorProfileBase) + + def test_get_type_returns_configured_value(self): + profile = LeakSensorProfile(sensor_type="conductive") + assert profile.get_type() == "conductive" + + def test_get_type_defaults_to_none(self): + profile = LeakSensorProfile() + assert profile.get_type() is None + + def test_max_minor_duration_is_zero(self): + # The platform does not escalate MINOR -> CRITICAL on a timer. + assert LeakSensorProfile("anything").get_leak_max_minor_duration_sec() == 0 diff --git a/platform/aspeed/sonic-platform-modules-nvidia-bmc/ast2700/tests/test_leakage_sensor.py b/platform/aspeed/sonic-platform-modules-nvidia-bmc/ast2700/tests/test_leakage_sensor.py new file mode 100644 index 00000000000..88999ff0385 --- /dev/null +++ b/platform/aspeed/sonic-platform-modules-nvidia-bmc/ast2700/tests/test_leakage_sensor.py @@ -0,0 +1,215 @@ +# +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +import os +from unittest.mock import patch + +import pytest + +from sonic_platform_base.liquid_cooling_base import LeakageSensorBase, LeakSeverity +from sonic_platform import leakage_sensor as leakage_mod +from sonic_platform.leakage_sensor import ( + LeakageSensor, + _check_value_in_range, +) +from sonic_platform.leak_sensor_profile import LeakSensorProfile + + +# Strictly ordered thresholds per the hwmgmt convention used by this driver: +# lcrit < crit < lwarn < warn < min < max +GOOD_THRESHOLDS = { + "scale": 1.0, + "lcrit": 0.0, + "crit": 10.0, + "lwarn": 20.0, + "warn": 30.0, + "min": 40.0, + "max": 100.0, +} +GOOD_TEXT = { + "channel_name": "Mngm_ADC0_Ch0_Embedded_0", + "type": "rop", +} + + +def _make_sensor(text=None, floats=None, a2d=1, channel=2): + """Build a LeakageSensor with controlled hwmgmt reads, no real sysfs.""" + text_map = dict(GOOD_TEXT) + if text is not None: + text_map.update(text) + float_map = dict(GOOD_THRESHOLDS) + if floats is not None: + float_map.update(floats) + + def fake_text(path, default=None): + return text_map.get(os.path.basename(path), default) + + def fake_float(path, default=None): + return float_map.get(os.path.basename(path), default) + + with patch.object(leakage_mod, "read_sysfs_text", side_effect=fake_text), \ + patch.object(leakage_mod, "read_sysfs_float", side_effect=fake_float): + return LeakageSensor(a2d, channel) + + +class TestCheckValueInRange: + + def test_inclusive_bounds_in_order(self): + assert _check_value_in_range(5, 0, 10) is True + assert _check_value_in_range(0, 0, 10) is True + assert _check_value_in_range(10, 0, 10) is True + + def test_swapped_bounds_ok(self): + assert _check_value_in_range(5, 10, 0) is True + + def test_outside(self): + assert _check_value_in_range(11, 0, 10) is False + assert _check_value_in_range(-1, 0, 10) is False + + +class TestLeakageSensorConstruction: + + def test_inherits_from_base(self): + sensor = _make_sensor() + assert isinstance(sensor, LeakageSensorBase) + + def test_identity_from_hwmgmt(self): + sensor = _make_sensor() + assert sensor.get_name() == "Mngm_ADC0_Ch0_Embedded_0" + assert sensor.get_leak_sensor_type() == "rop" + assert sensor.get_leak_sensor_location() == "Mngm" + + def test_fallback_name_when_channel_name_missing(self): + sensor = _make_sensor(text={"channel_name": None}) + # Falls back to `leakage_{a2d_index}_{channel_index}`. + assert sensor.get_name() == "leakage_1_2" + assert sensor.get_leak_sensor_location() == "leakage" + + def test_get_leak_profile_is_a_profile(self): + sensor = _make_sensor() + profile = sensor.get_leak_profile() + assert isinstance(profile, LeakSensorProfile) + assert profile.get_type() == "rop" + + +class TestThresholdValidation: + + def test_valid_thresholds(self): + sensor = _make_sensor() + assert sensor._hwmgmt_thresholds_valid is True + + def test_missing_threshold_invalidates(self): + sensor = _make_sensor(floats={"lcrit": None}) + assert sensor._hwmgmt_thresholds_valid is False + + def test_misordered_thresholds_invalidates(self): + # `crit` must be < `lwarn`; make `crit` larger than `lwarn` (20.0). + bad = dict(GOOD_THRESHOLDS) + bad["crit"] = 25.0 + sensor = _make_sensor(floats=bad) + assert sensor._hwmgmt_thresholds_valid is False + + +class TestCheckChannelValue: + """ + Threshold layout used by the driver (strictly ordered): + + lcrit=0 < crit=10 < lwarn=20 < warn=30 < min=40 < max=100 + + Bands: + [min, max] = [40, 100] -> normal + [lwarn, warn] = [20, 30] -> MINOR leak + [lcrit, crit] = [0, 10] -> CRITICAL leak + (crit, lwarn) and (warn, min) -> sensor fault (no leak, not OK) + scaled > max or < lcrit -> reading error + """ + + @staticmethod + def _eval(sensor, input_value): + side_effect = lambda key: input_value if key == "input" else None + with patch.object(sensor, "_read_channel_sysfs", side_effect=side_effect): + return sensor._check_channel_value() + + def test_normal_band(self): + sensor = _make_sensor() + assert self._eval(sensor, 50) == (False, True, None) + + def test_minor_leak_band(self): + sensor = _make_sensor() + assert self._eval(sensor, 25) == (True, True, LeakSeverity.MINOR) + + def test_critical_leak_band(self): + sensor = _make_sensor() + assert self._eval(sensor, 5) == (True, True, LeakSeverity.CRITICAL) + + def test_sensor_fault_between_critical_and_minor(self): + sensor = _make_sensor() + # 15 is in (crit=10, lwarn=20) -- between the critical and warning bands. + assert self._eval(sensor, 15) == (False, False, None) + + def test_sensor_fault_between_minor_and_normal(self): + sensor = _make_sensor() + # 35 is in (warn=30, min=40) -- between the warning and normal bands. + assert self._eval(sensor, 35) == (False, False, None) + + def test_above_max_is_reading_error(self): + sensor = _make_sensor() + assert self._eval(sensor, 200) == (False, False, None) + + def test_below_lcrit_is_reading_error(self): + sensor = _make_sensor() + assert self._eval(sensor, -5) == (False, False, None) + + def test_invalid_thresholds_short_circuit(self): + sensor = _make_sensor(floats={"lcrit": None}) + # When thresholds are invalid, `_read_channel_sysfs` should not even be called. + with patch.object(sensor, "_read_channel_sysfs") as read: + assert sensor._check_channel_value() == (False, False, None) + read.assert_not_called() + + def test_missing_input_is_reading_error(self): + sensor = _make_sensor() + assert self._eval(sensor, None) == (False, False, None) + + def test_scale_is_applied(self): + # Same input value, different scale -> different band. + sensor = _make_sensor(floats={"scale": 2.0}) + # 12.5 * 2.0 = 25.0 -> MINOR + assert self._eval(sensor, 12.5) == (True, True, LeakSeverity.MINOR) + + +class TestPublicAccessors: + + def test_is_leak_reflects_check(self): + sensor = _make_sensor() + with patch.object(sensor, "_check_channel_value", return_value=(True, True, LeakSeverity.MINOR)): + assert sensor.is_leak() is True + + def test_is_leak_sensor_ok_reflects_check(self): + sensor = _make_sensor() + with patch.object(sensor, "_check_channel_value", return_value=(False, True, None)): + assert sensor.is_leak_sensor_ok() is True + with patch.object(sensor, "_check_channel_value", return_value=(False, False, None)): + assert sensor.is_leak_sensor_ok() is False + + def test_get_leak_severity_returns_enum_or_none(self): + sensor = _make_sensor() + with patch.object(sensor, "_check_channel_value", return_value=(True, True, LeakSeverity.CRITICAL)): + assert sensor.get_leak_severity() is LeakSeverity.CRITICAL + with patch.object(sensor, "_check_channel_value", return_value=(False, True, None)): + assert sensor.get_leak_severity() is None diff --git a/platform/aspeed/sonic-platform-modules-nvidia-bmc/ast2700/tests/test_liquid_cooling.py b/platform/aspeed/sonic-platform-modules-nvidia-bmc/ast2700/tests/test_liquid_cooling.py new file mode 100644 index 00000000000..29b6252849d --- /dev/null +++ b/platform/aspeed/sonic-platform-modules-nvidia-bmc/ast2700/tests/test_liquid_cooling.py @@ -0,0 +1,129 @@ +# +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +from unittest.mock import MagicMock, patch + +import pytest + +from sonic_platform_base.liquid_cooling_base import LiquidCoolingBase +from sonic_platform import liquid_cooling as lc_mod +from sonic_platform.liquid_cooling import LiquidCooling + + +def _fake_sensor(profile_type): + """Build a stand-in for `LeakageSensor` with the given profile type.""" + sensor = MagicMock() + profile = MagicMock() + profile.get_type.return_value = profile_type + sensor.get_leak_profile.return_value = profile + return sensor, profile + + +class TestSortedNumericSubdirs: + + def test_returns_empty_for_missing_dir(self): + with patch("os.path.isdir", return_value=False): + assert lc_mod._sorted_numeric_subdirs("/nope") == [] + + def test_returns_sorted_ints_skipping_non_numeric(self): + names = ["2", "10", "1", "skip", ".hidden", "3"] + is_dir_for = {"/p/" + n for n in names if n.isdigit()} + with patch("os.path.isdir", side_effect=lambda p: p == "/p" or p in is_dir_for), \ + patch("os.listdir", return_value=names): + assert lc_mod._sorted_numeric_subdirs("/p") == [1, 2, 3, 10] + + def test_skips_files_named_as_integers(self): + # A regular file whose name is a digit must not be picked up. + with patch("os.path.isdir", side_effect=lambda p: p == "/p"), \ + patch("os.listdir", return_value=["1", "2"]): + assert lc_mod._sorted_numeric_subdirs("/p") == [] + + +class TestDiscoverLeakageHwIndices: + + def test_empty_when_root_missing(self): + with patch.object(lc_mod, "_sorted_numeric_subdirs", return_value=[]): + assert lc_mod._discover_leakage_hw_indices() == [] + + def test_enumerates_a2d_and_channels(self): + def fake_subdirs(parent): + # Layout: two a2d directories at the root; the first has two channels, + # the second has one. + if parent.endswith("/leakage"): + return [0, 1] + if parent.endswith("/leakage/0"): + return [0, 1] + if parent.endswith("/leakage/1"): + return [2] + return [] + + with patch.object(lc_mod, "_sorted_numeric_subdirs", side_effect=fake_subdirs): + pairs = lc_mod._discover_leakage_hw_indices() + + assert pairs == [(0, 0), (0, 1), (1, 2)] + + +class TestLiquidCoolingConstruction: + + def test_no_sensors_when_discovery_empty(self): + with patch.object(lc_mod, "_discover_leakage_hw_indices", return_value=[]): + lc = LiquidCooling() + assert isinstance(lc, LiquidCoolingBase) + assert lc.get_num_leak_sensors() == 0 + assert lc.get_all_profiles() == [] + + def test_registers_one_profile_per_distinct_type(self): + s1, p_cond_a = _fake_sensor("conductive") + s2, p_cond_b = _fake_sensor("conductive") + s3, p_opt = _fake_sensor("optical") + + with patch.object(lc_mod, "_discover_leakage_hw_indices", return_value=[(0, 0), (0, 1), (1, 0)]), \ + patch.object(lc_mod, "LeakageSensor", side_effect=[s1, s2, s3]): + lc = LiquidCooling() + + assert lc.get_num_leak_sensors() == 3 + profiles = lc.get_all_profiles() + # One profile per distinct type; the first sensor of that type wins. + types = {p.get_type() for p in profiles} + assert types == {"conductive", "optical"} + assert p_cond_a in profiles + assert p_opt in profiles + assert p_cond_b not in profiles + + def test_skips_sensors_returning_no_profile(self): + s_with, profile = _fake_sensor("conductive") + s_without = MagicMock() + s_without.get_leak_profile.return_value = None + + with patch.object(lc_mod, "_discover_leakage_hw_indices", return_value=[(0, 0), (0, 1)]), \ + patch.object(lc_mod, "LeakageSensor", side_effect=[s_with, s_without]): + lc = LiquidCooling() + + # Both sensors are kept, but only one profile is registered. + assert lc.get_num_leak_sensors() == 2 + assert lc.get_all_profiles() == [profile] + + def test_sensors_are_passed_to_base(self): + s1, _ = _fake_sensor("conductive") + s2, _ = _fake_sensor("conductive") + + with patch.object(lc_mod, "_discover_leakage_hw_indices", return_value=[(0, 0), (1, 0)]), \ + patch.object(lc_mod, "LeakageSensor", side_effect=[s1, s2]): + lc = LiquidCooling() + + assert lc.get_all_leak_sensors() == [s1, s2] diff --git a/platform/aspeed/sonic-platform-modules-nvidia-bmc/ast2700/tests/test_platform.py b/platform/aspeed/sonic-platform-modules-nvidia-bmc/ast2700/tests/test_platform.py new file mode 100644 index 00000000000..25def858dbb --- /dev/null +++ b/platform/aspeed/sonic-platform-modules-nvidia-bmc/ast2700/tests/test_platform.py @@ -0,0 +1,32 @@ +# +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +from unittest.mock import MagicMock, patch + + +class TestPlatform: + """Minimal checks that `Platform` instantiates and owns a chassis.""" + + def test_platform_constructs_chassis(self): + sentinel = MagicMock(name="Chassis-sentinel") + with patch("sonic_platform.platform.Chassis", return_value=sentinel) as chassis_cls: + from sonic_platform.platform import Platform + platform = Platform() + + chassis_cls.assert_called_once_with() + assert platform.get_chassis() is sentinel diff --git a/platform/aspeed/sonic-platform-modules-nvidia-bmc/ast2700/tests/test_reboot_cause.py b/platform/aspeed/sonic-platform-modules-nvidia-bmc/ast2700/tests/test_reboot_cause.py new file mode 100644 index 00000000000..987ab15adbe --- /dev/null +++ b/platform/aspeed/sonic-platform-modules-nvidia-bmc/ast2700/tests/test_reboot_cause.py @@ -0,0 +1,57 @@ +# +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +from unittest import mock + +from sonic_platform_base.chassis_base import ChassisBase +from sonic_platform.reboot_cause import RebootCause + + +class TestRebootCause: + + def test_returns_non_hardware_when_no_cause_set(self): + with mock.patch('sonic_platform.reboot_cause.hwmgmt_flag_is_set', return_value=False): + cause, description = RebootCause().get_reboot_cause() + assert cause == ChassisBase.REBOOT_CAUSE_NON_HARDWARE + assert description == "" + + def test_major_reboot_causes(self): + reboot_cause = RebootCause() + active_flags = set() + + def flag_side_effect(bmc_dir, filename): + assert bmc_dir == reboot_cause._BMC_RESET_DIR + return filename in active_flags + + with mock.patch('sonic_platform.reboot_cause.hwmgmt_flag_is_set', side_effect=flag_side_effect): + for key, value in reboot_cause._reboot_major_cause_dict.items(): + active_flags.add(key) + cause, description = reboot_cause.get_reboot_cause() + assert cause == value + assert description == "" + active_flags.discard(key) + + def test_watchdog_with_power_on_is_non_hardware(self): + reboot_cause = RebootCause() + flag_files = (reboot_cause._watchdog_file, reboot_cause._power_on_file) + with mock.patch( + 'sonic_platform.reboot_cause.hwmgmt_flag_is_set', + side_effect=lambda _bmc, name: name in flag_files): + cause, description = reboot_cause.get_reboot_cause() + assert cause == ChassisBase.REBOOT_CAUSE_NON_HARDWARE + assert description == "" diff --git a/platform/aspeed/sonic-platform-modules-nvidia-bmc/ast2700/tests/test_switch_host_module.py b/platform/aspeed/sonic-platform-modules-nvidia-bmc/ast2700/tests/test_switch_host_module.py new file mode 100644 index 00000000000..6e3d9e45319 --- /dev/null +++ b/platform/aspeed/sonic-platform-modules-nvidia-bmc/ast2700/tests/test_switch_host_module.py @@ -0,0 +1,121 @@ +# +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +from types import SimpleNamespace +from unittest.mock import MagicMock, mock_open, patch + +import pytest + +from sonic_platform_base.module_base import ModuleBase +from sonic_platform import switch_host_module as shm_mod +from sonic_platform.switch_host_module import ( + PWR_DOWN_SYSFS, + SwitchHostModule, +) + + +@pytest.fixture +def module(): + """Return a `SwitchHostModule` with a mocked `EepromSystem` backend.""" + with patch("sonic_platform.switch_host_module.EepromSystem") as eeprom_cls: + eeprom_cls.return_value = MagicMock(name="EepromSystem") + yield SwitchHostModule() + + +class TestSwitchHostModuleBasics: + + def test_inherits_from_module_base(self, module): + assert isinstance(module, ModuleBase) + + def test_static_identity(self, module): + assert module.get_name() == SwitchHostModule.NAME == "SWITCH-HOST" + assert module.get_description() == SwitchHostModule.DESCRIPTION + assert module.get_type() == SwitchHostModule.MODULE_TYPE_SWITCH_HOST + assert module.get_slot() == 0 + assert module.is_replaceable() is False + + def test_custom_slot(self): + with patch("sonic_platform.switch_host_module.EepromSystem"): + mod = SwitchHostModule(slot=3) + assert mod.get_slot() == 3 + + def test_get_serial_delegates_to_eeprom(self, module): + module._eeprom.get_serial_number.return_value = "SN-SH-1234" + assert module.get_serial() == "SN-SH-1234" + module._eeprom.get_serial_number.assert_called_once_with() + + +class TestSwitchHostOperStatus: + + def test_online_when_pwr_down_zero(self, module): + with patch("builtins.open", mock_open(read_data="0\n")): + assert module.get_oper_status() == ModuleBase.MODULE_STATUS_ONLINE + + def test_offline_when_pwr_down_one(self, module): + with patch("builtins.open", mock_open(read_data="1\n")): + assert module.get_oper_status() == ModuleBase.MODULE_STATUS_OFFLINE + + def test_empty_when_pwr_down_unreadable(self, module): + with patch("builtins.open", side_effect=OSError("missing")): + assert module.get_oper_status() == ModuleBase.MODULE_STATUS_EMPTY + + def test_empty_on_bad_content(self, module): + with patch("builtins.open", mock_open(read_data="not-a-number")): + assert module.get_oper_status() == ModuleBase.MODULE_STATUS_EMPTY + + def test_online_when_pwr_down_hex_zero(self, module): + # The parser uses `int(raw, 0)` so hex literals must work too. + with patch("builtins.open", mock_open(read_data="0x0")): + assert module.get_oper_status() == ModuleBase.MODULE_STATUS_ONLINE + + +class TestSwitchHostPowerControl: + + def _mock_run(self, returncode=0, stderr=b""): + return SimpleNamespace(returncode=returncode, stdout=b"", stderr=stderr) + + def test_set_admin_state_up_invokes_power_on(self, module): + with patch("sonic_platform.switch_host_module.subprocess.run", return_value=self._mock_run()) as run: + assert module.set_admin_state(True) is True + args = run.call_args[0][0] + assert args[0] == shm_mod.HW_MGMT_POWERCTRL + assert args[1] == "power_on" + + def test_set_admin_state_down_invokes_power_off(self, module): + with patch("sonic_platform.switch_host_module.subprocess.run", return_value=self._mock_run()) as run: + assert module.set_admin_state(False) is True + assert run.call_args[0][0][1] == "power_off" + + def test_reboot_invokes_reset(self, module): + with patch("sonic_platform.switch_host_module.subprocess.run", return_value=self._mock_run()) as run: + assert module.reboot() is True + assert run.call_args[0][0][1] == "reset" + + def test_reboot_unsupported_type_returns_false_without_running(self, module): + with patch("sonic_platform.switch_host_module.subprocess.run") as run: + assert module.reboot(ModuleBase.MODULE_REBOOT_CPU_COMPLEX) is False + run.assert_not_called() + + def test_powerctrl_returns_false_on_non_zero_exit(self, module): + fake = self._mock_run(returncode=7, stderr=b"boom") + with patch("sonic_platform.switch_host_module.subprocess.run", return_value=fake): + assert module.set_admin_state(True) is False + + def test_powerctrl_returns_false_on_oserror(self, module): + with patch("sonic_platform.switch_host_module.subprocess.run", side_effect=OSError("no such binary")): + assert module.reboot() is False diff --git a/platform/aspeed/sonic-platform-modules-nvidia-bmc/ast2700/tests/test_thermal.py b/platform/aspeed/sonic-platform-modules-nvidia-bmc/ast2700/tests/test_thermal.py new file mode 100644 index 00000000000..4f5da805619 --- /dev/null +++ b/platform/aspeed/sonic-platform-modules-nvidia-bmc/ast2700/tests/test_thermal.py @@ -0,0 +1,63 @@ +# +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +from unittest.mock import patch + +import pytest + +from sonic_platform import thermal as thermal_mod +from sonic_platform.thermal import ThermalBMC + + +class TestThermalBMC: + + def test_get_name(self): + t = ThermalBMC() + assert t.get_name() == "BMC Ambient" + + def test_sysfs_paths_rooted_under_hw_management(self): + t = ThermalBMC() + assert t.input_path.startswith(ThermalBMC.HW_MGMT_ROOT) + assert t.max_path.startswith(ThermalBMC.HW_MGMT_ROOT) + assert t.min_path.startswith(ThermalBMC.HW_MGMT_ROOT) + assert t.input_path.endswith("bmc_temp_input") + assert t.max_path.endswith("bmc_temp") + assert t.min_path.endswith("bmc_min") + + @patch.object(thermal_mod, "read_sysfs_float", return_value=37125.0) + def test_get_temperature_scales_milli_celsius(self, read_float): + t = ThermalBMC() + assert t.get_temperature() == pytest.approx(37.125) + read_float.assert_called_with(t.input_path) + + @patch.object(thermal_mod, "read_sysfs_float", return_value=90000.0) + def test_get_high_threshold_uses_max_path(self, read_float): + t = ThermalBMC() + assert t.get_high_threshold() == pytest.approx(90.0) + read_float.assert_called_with(t.max_path) + + @patch.object(thermal_mod, "read_sysfs_float", return_value=5000.0) + def test_get_low_threshold_uses_min_path(self, read_float): + t = ThermalBMC() + assert t.get_low_threshold() == pytest.approx(5.0) + read_float.assert_called_with(t.min_path) + + def test_high_low_critical_thresholds_return_na(self): + t = ThermalBMC() + assert t.get_high_critical_threshold() == "N/A" + assert t.get_low_critical_threshold() == "N/A" diff --git a/platform/aspeed/sonic-platform-modules-nvidia-bmc/ast2700/tests/test_utils.py b/platform/aspeed/sonic-platform-modules-nvidia-bmc/ast2700/tests/test_utils.py new file mode 100644 index 00000000000..5128ae8afb6 --- /dev/null +++ b/platform/aspeed/sonic-platform-modules-nvidia-bmc/ast2700/tests/test_utils.py @@ -0,0 +1,106 @@ +# +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +from unittest.mock import mock_open, patch + +import pytest + +from sonic_platform import utils + + +class TestHwMgmtPath: + + def test_joins_under_root(self): + assert utils.hw_mgmt_path("thermal", "bmc_temp_input") == ( + utils.HW_MANAGEMENT_ROOT + "/thermal/bmc_temp_input" + ) + + def test_no_parts_returns_root(self): + assert utils.hw_mgmt_path() == utils.HW_MANAGEMENT_ROOT + + +class TestReadSysfsText: + + def test_returns_stripped_value(self): + with patch("builtins.open", mock_open(read_data=" hello\n")): + assert utils.read_sysfs_text("/fake") == "hello" + + def test_returns_default_on_io_error(self): + with patch("builtins.open", side_effect=OSError("nope")): + assert utils.read_sysfs_text("/fake", default="x") == "x" + + def test_default_is_none(self): + with patch("builtins.open", side_effect=OSError("nope")): + assert utils.read_sysfs_text("/fake") is None + + +class TestReadSysfsInt: + + def test_parses_decimal(self): + with patch("builtins.open", mock_open(read_data="42\n")): + assert utils.read_sysfs_int("/fake") == 42 + + def test_parses_hex_with_base_zero(self): + with patch("builtins.open", mock_open(read_data="0x10")): + assert utils.read_sysfs_int("/fake") == 16 + + def test_respects_explicit_base(self): + with patch("builtins.open", mock_open(read_data="10")): + assert utils.read_sysfs_int("/fake", base=16) == 16 + + def test_returns_default_on_io_error(self): + with patch("builtins.open", side_effect=OSError("nope")): + assert utils.read_sysfs_int("/fake", default=7) == 7 + + def test_returns_default_on_value_error(self): + with patch("builtins.open", mock_open(read_data="not-a-number")): + assert utils.read_sysfs_int("/fake", default=-1) == -1 + + +class TestReadSysfsFloat: + + def test_parses_value(self): + with patch("builtins.open", mock_open(read_data="3.5\n")): + assert utils.read_sysfs_float("/fake") == pytest.approx(3.5) + + def test_returns_default_on_io_error(self): + with patch("builtins.open", side_effect=OSError("nope")): + assert utils.read_sysfs_float("/fake", default=1.25) == 1.25 + + def test_returns_default_on_value_error(self): + with patch("builtins.open", mock_open(read_data="garbage")): + assert utils.read_sysfs_float("/fake") is None + + +class TestHwmgmtFlagIsSet: + + def test_true_when_nonzero(self): + with patch("builtins.open", mock_open(read_data="1\n")): + assert utils.hwmgmt_flag_is_set("bmc", "reset_cpu") is True + + def test_false_when_zero(self): + with patch("builtins.open", mock_open(read_data="0")): + assert utils.hwmgmt_flag_is_set("bmc", "reset_cpu") is False + + def test_false_when_missing(self): + with patch("builtins.open", side_effect=FileNotFoundError): + assert utils.hwmgmt_flag_is_set("bmc", "reset_cpu") is False + + def test_false_when_unparseable(self): + with patch("builtins.open", mock_open(read_data="garbage")): + assert utils.hwmgmt_flag_is_set("bmc", "reset_cpu") is False diff --git a/platform/aspeed/sonic-platform-modules-nvidia-bmc/debian/changelog b/platform/aspeed/sonic-platform-modules-nvidia-bmc/debian/changelog new file mode 100644 index 00000000000..637c570d29d --- /dev/null +++ b/platform/aspeed/sonic-platform-modules-nvidia-bmc/debian/changelog @@ -0,0 +1,6 @@ +sonic-platform-aspeed-nvidia (1.0) unstable; urgency=low + + * Initial release + + -- NVIDIA Mon, 17 Mar 2026 00:00:00 +0000 + diff --git a/platform/aspeed/sonic-platform-modules-nvidia-bmc/debian/control b/platform/aspeed/sonic-platform-modules-nvidia-bmc/debian/control new file mode 100644 index 00000000000..4bddef535be --- /dev/null +++ b/platform/aspeed/sonic-platform-modules-nvidia-bmc/debian/control @@ -0,0 +1,14 @@ +Source: sonic-platform-aspeed-nvidia +Section: misc +Priority: optional +Maintainer: NVIDIA +Build-Depends: debhelper-compat (= 13), dh-python, python3-all, python3-setuptools, python3-wheel, + python3-pytest, python3-pytest-cov +Standards-Version: 3.9.6 + +Package: sonic-platform-aspeed-nvidia-ast2700-bmc +Architecture: arm64 +Depends: ${misc:Depends}, ${python3:Depends} +Description: SONiC platform support for NVIDIA Aspeed AST2700 BMC + This package provides platform-specific implementation for NVIDIA's + BMC card based on Aspeed AST2700. diff --git a/platform/aspeed/sonic-platform-modules-nvidia-bmc/debian/rules b/platform/aspeed/sonic-platform-modules-nvidia-bmc/debian/rules new file mode 100755 index 00000000000..8f3d141c07a --- /dev/null +++ b/platform/aspeed/sonic-platform-modules-nvidia-bmc/debian/rules @@ -0,0 +1,31 @@ +#!/usr/bin/make -f + +PACKAGE_PRE_NAME := sonic-platform-aspeed-nvidia +PACKAGE_NAME := $(PACKAGE_PRE_NAME)-ast2700-bmc +DEVICE_NAME := arm64-aspeed_nvidia_ast2700_bmc-r0 + +%: + dh $@ --with python3 --buildsystem=pybuild + +override_dh_auto_build: + python3 setup.py bdist_wheel -d $(CURDIR) + +override_dh_auto_test: + # Run the sonic_platform unit tests directly via pytest. Honor + # BUILD_SKIP_TEST=y to mirror slave.mk's behavior for wheel-based + # platforms (see SONIC_PYTHON_WHEELS). + @if [ "$(BUILD_SKIP_TEST)" = "y" ]; then \ + echo "BUILD_SKIP_TEST=y: skipping sonic_platform unit tests"; \ + else \ + python3 -m pytest ast2700/tests; \ + fi + +override_dh_auto_install: + set -e + dh_installdirs -p$(PACKAGE_NAME) usr/share/sonic/device/$(DEVICE_NAME)/ + dh_install -p$(PACKAGE_NAME) sonic_platform-1.0-py3-none-any.whl usr/share/sonic/device/$(DEVICE_NAME)/ + +override_dh_clean: + dh_clean + rm -f *.whl + rm -rf build dist *.egg-info diff --git a/platform/aspeed/sonic-platform-modules-nvidia-bmc/debian/sonic-platform-aspeed-nvidia-ast2700-bmc.postinst b/platform/aspeed/sonic-platform-modules-nvidia-bmc/debian/sonic-platform-aspeed-nvidia-ast2700-bmc.postinst new file mode 100755 index 00000000000..6208596db41 --- /dev/null +++ b/platform/aspeed/sonic-platform-modules-nvidia-bmc/debian/sonic-platform-aspeed-nvidia-ast2700-bmc.postinst @@ -0,0 +1,22 @@ +#!/bin/bash +set -e + +case "$1" in + configure) + if [ -f /host/machine.conf ]; then + . /host/machine.conf + DEVICE_NAME="$onie_platform" + else + echo "Warning: /host/machine.conf not found, cannot determine platform" + exit 1 + fi + DEVICE_DIR="/usr/share/sonic/device/${DEVICE_NAME}" + if [ -f "${DEVICE_DIR}"/*.whl ]; then + # Force reinstall to ensure this platform's wheel is installed + pip3 install --force-reinstall --no-deps "${DEVICE_DIR}"/*.whl + fi + ;; +esac + +#DEBHELPER# +exit 0 diff --git a/platform/aspeed/sonic-platform-modules-nvidia-bmc/pytest.ini b/platform/aspeed/sonic-platform-modules-nvidia-bmc/pytest.ini new file mode 100644 index 00000000000..62c71c82f5e --- /dev/null +++ b/platform/aspeed/sonic-platform-modules-nvidia-bmc/pytest.ini @@ -0,0 +1,22 @@ +# +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +[pytest] +testpaths = ast2700/tests +addopts = --cov=ast2700/sonic_platform --cov-report term --cov-report xml --junitxml=test-results.xml -vv +filterwarnings = + ignore::DeprecationWarning diff --git a/platform/aspeed/sonic-platform-modules-nvidia-bmc/setup.py b/platform/aspeed/sonic-platform-modules-nvidia-bmc/setup.py new file mode 100644 index 00000000000..15f40574ffc --- /dev/null +++ b/platform/aspeed/sonic-platform-modules-nvidia-bmc/setup.py @@ -0,0 +1,54 @@ +# +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +from setuptools import setup + +setup( + name="sonic-platform", + version="1.0", + description="SONiC platform API implementation on NVIDIA Aspeed BMC Platforms", + license="Apache 2.0", + author="NVIDIA", + author_email="willtsai@nvidia.com", + url="https://github.com/sonic-net/sonic-buildimage", + packages=[ + "sonic_platform", + ], + package_dir={ + "sonic_platform": "ast2700/sonic_platform", + }, + extras_require={ + "test": [ + "pytest", + "pytest-cov", + ], + }, + classifiers=[ + "Development Status :: 3 - Alpha", + "Environment :: Plugins", + "Intended Audience :: Developers", + "Intended Audience :: Information Technology", + "Intended Audience :: System Administrators", + "License :: OSI Approved :: Apache Software License", + "Natural Language :: English", + "Operating System :: POSIX :: Linux", + "Programming Language :: Python :: 3.11", + "Topic :: Utilities", + ], + keywords="sonic SONiC platform PLATFORM aspeed bmc nvidia ast2700", +) diff --git a/platform/aspeed/sonic_fit.its b/platform/aspeed/sonic_fit.its new file mode 100644 index 00000000000..f0bdd14d21a --- /dev/null +++ b/platform/aspeed/sonic_fit.its @@ -0,0 +1,153 @@ +/dts-v1/; + +/* + * FIT Image Configuration for AST2700 SONiC - Multi-DTB Support + * + * This FIT image contains multiple DTBs for different hardware variants: + * - ast2700-evb: Aspeed AST2700 EVB reference platform + * - nexthop-b27-r0: NextHop AST2700 platform + * - arista_goldfinch-r0: Arista AST2700 BMC platform + * + * U-Boot selects the appropriate DTB configuration using the 'bootconf' variable + * which is set based on hardware detection at boot time. + * + * Load addresses are chosen based on AST2700 memory map: + * - RAM: 0x400000000 - 0x47e000000 (2016 MB) + * - Reserved regions: 0x41b800000-0x423ffffff, 0x42c000000-0x431bfffff + * + * Safe load addresses (avoiding reserved regions): + * - Kernel: 0x403000000 (U-Boot default loadaddr, ~10 MB) + * - Ramdisk: 0x440000000 (after reserved regions, 192 MB allocated) + * Production initramfs: 37.4 MB compressed, 160 MB uncompressed + * IMPORTANT: Kernel decompresses initramfs IN PLACE! + * - FDT: 0x44C000000 (after ramdisk: 0x440000000 + 192 MB) + * + * Memory Layout: + * 0x403000000 ──> Kernel (10 MB) + * 0x440000000 ──> Ramdisk (192 MB allocated for decompression) + * Compressed: 37.4 MB (zstd) + * Uncompressed: 160 MB (in-place decompression) + * 0x44C000000 ──> DTB (50 KB) + * + * Two-cell address format: <0xHIGH 0xLOW> + * Example: 0x44C000000 = <0x4 0x4C000000> + * + * See platform/aspeed/AST2700-MEMORY-MAP.md for details. + */ + +/ { + description = "Kernel fitImage for SONiC AST2700 with Multi-DTB Support"; + #address-cells = <2>; + + images { + kernel-1 { + description = "Linux kernel"; + data = /incbin/("__KERNEL_PATH__"); + type = "kernel"; + arch = "arm64"; + os = "linux"; + compression = "none"; + load = <0x4 0x03000000>; + entry = <0x4 0x03000000>; + hash-1 { + algo = "sha256"; + }; + }; + fdt-ast2700-evb { + description = "Flattened Device Tree blob for Aspeed AST2700 EVB"; + data = /incbin/("__DTB_PATH_ASPEED__/ast2700-evb.dtb"); + type = "flat_dt"; + arch = "arm64"; + compression = "none"; + load = <0x4 0x4C000000>; + hash-1 { + algo = "sha256"; + }; + }; + fdt-nokia-h6-128-r0 { + description = "Flattened Device Tree blob for Nokia AST2720"; + data = /incbin/("__DTB_PATH_ASPEED__/nokia-ast2700-h6-128-r0.dtb"); + type = "flat_dt"; + arch = "arm64"; + compression = "none"; + load = <0x4 0x4C000000>; + hash-1 { + algo = "sha256"; + }; + }; + fdt-nexthop-b27-r0 { + description = "Flattened Device Tree blob for NextHop AST2700"; + data = /incbin/("__DTB_PATH_ASPEED__/nexthop-b27-r0.dtb"); + type = "flat_dt"; + arch = "arm64"; + compression = "none"; + load = <0x4 0x4C000000>; + hash-1 { + algo = "sha256"; + }; + }; + fdt-arista_goldfinch-r0 { + description = "Flattened Device Tree blob for Arista 2700 BMC"; + data = /incbin/("__DTB_PATH_ASPEED__/arista_goldfinch-r0.dtb"); + type = "flat_dt"; + arch = "arm64"; + compression = "none"; + load = <0x4 0x4C000000>; + hash-1 { + algo = "sha256"; + }; + }; + ramdisk-1 { + description = "Initramfs"; + data = /incbin/("__INITRD_PATH__"); + type = "ramdisk"; + arch = "arm64"; + os = "linux"; + compression = "none"; + load = <0x4 0x40000000>; + hash-1 { + algo = "sha256"; + }; + }; + }; + + configurations { + default = "conf-ast2700-evb"; + conf-ast2700-evb { + description = "SONiC for Aspeed AST2700 EVB"; + kernel = "kernel-1"; + fdt = "fdt-ast2700-evb"; + ramdisk = "ramdisk-1"; + hash-1 { + algo = "sha256"; + }; + }; + conf-nokia-h6-128-r0 { + description = "SONiC for Nokia AST2720"; + kernel = "kernel-1"; + fdt = "fdt-nokia-h6-128-r0"; + ramdisk = "ramdisk-1"; + hash-1 { + algo = "sha256"; + }; + }; + conf-nexthop-b27-r0 { + description = "SONiC for NextHop AST2700"; + kernel = "kernel-1"; + fdt = "fdt-nexthop-b27-r0"; + ramdisk = "ramdisk-1"; + hash-1 { + algo = "sha256"; + }; + }; + conf-arista_goldfinch-r0 { + description = "SONiC for Arista 2700 BMC"; + kernel = "kernel-1"; + fdt = "fdt-arista_goldfinch-r0"; + ramdisk = "ramdisk-1"; + hash-1 { + algo = "sha256"; + }; + }; + }; +}; diff --git a/platform/aspeed/tftp-installer-init/init b/platform/aspeed/tftp-installer-init/init new file mode 100644 index 00000000000..191e45129c3 --- /dev/null +++ b/platform/aspeed/tftp-installer-init/init @@ -0,0 +1,339 @@ +#!/bin/sh +# Net-install initramfs: minimal bring-up, then same driver load path as stock SONiC initramfs +# (init-top + /conf/modules + init-premount/udev) so MDIO/I2C/GPIO/PHY deps match full initramfs. +# If cmdline has sonic_install.bmc_image=, DHCP (or existing ip=) + fetch + /sbin/install-to-emmc.sh; +# else interactive shell. Optional: sonic_install.reboot=n (network: always eth0) +# (auto-reboot is the default on successful auto-install; reboot=n keeps the shell open). +# +# Transport is selected from the bmc_image value: +# http://… or https://… -> curl +# plain path / filename -> TFTP, server from sonic_install.tftp_server= +# +# The FIT is still TFTP-loaded by U-Boot (U-Boot-side transport unchanged); only the large eMMC +# payload fetch inside this initramfs picks per-scheme. + +export PATH=/sbin:/usr/sbin:/bin:/usr/bin + +mkdir -p /proc /sys /dev /tmp /run + +mount -t proc -o nodev,noexec,nosuid proc /proc || { + echo "Error: mount -t proc proc /proc failed (ifconfig/ip need /proc)." + exec /bin/sh +} +mount -t sysfs -o nodev,noexec,nosuid sysfs /sys || { + echo "Warning: sysfs mount failed." +} +mount -t devtmpfs -o nosuid,mode=0755 udev /dev 2>/dev/null || \ + mount -t devtmpfs devtmpfs /dev || { + echo "Warning: devtmpfs mount failed." +} + +[ ! -h /dev/fd ] && ln -sf /proc/self/fd /dev/fd 2>/dev/null || true +[ ! -h /dev/stdin ] && ln -sf /proc/self/fd/0 /dev/stdin 2>/dev/null || true +[ ! -h /dev/stdout ] && ln -sf /proc/self/fd/1 /dev/stdout 2>/dev/null || true +[ ! -h /dev/stderr ] && ln -sf /proc/self/fd/2 /dev/stderr 2>/dev/null || true +mkdir -p /dev/pts +mount -t devpts -o noexec,nosuid,gid=5,mode=0620 devpts /dev/pts 2>/dev/null || true + +refresh_machine_conf_for_installer() { + INSTALLER_MACHINE_CONF=/tmp/machine.conf + rm -f "$INSTALLER_MACHINE_CONF" + if [ -x /sbin/sonic-machine-conf-init.sh ]; then + MACHINE_CONF="$INSTALLER_MACHINE_CONF" LOG_FILE=/dev/null \ + /bin/sh /sbin/sonic-machine-conf-init.sh || true + fi + if [ -f "$INSTALLER_MACHINE_CONF" ]; then + . "$INSTALLER_MACHINE_CONF" + export onie_platform + fi +} + +# Match Debian initramfs-tools early boot (see usr/share/initramfs-tools/init): loads modules and +# runs udev coldplug so Ethernet/PHY/MDIO match "full" SONiC initramfs behavior. +run_initramfs_tools_drivers() { + [ -f /scripts/functions ] && [ -f /conf/arch.conf ] || return 0 + ( + cd / + export DPKG_ARCH= + . /conf/arch.conf + export MODPROBE_OPTIONS="-qb" + export ROOT= ROOTDELAY= ROOTFLAGS= ROOTFSTYPE= + export LOOP= LOOPFLAGS= LOOPFSTYPE= LOOPOFFSET= + export IP= DEVICE= BOOT= BOOTIF= UBIMTD= + export init=/sbin/init readonly=y rootmnt=/root + export resume= resume_offset= noresume= drop_caps= + export fastboot=n forcefsck=n fsckfix= + export debug= panic= blacklist= break= + RUNSIZE=10% + quiet=n + netconsole= + for x in $(cat /proc/cmdline); do + case $x in + quiet) quiet=y ;; + initramfs.runsize=*) RUNSIZE="${x#initramfs.runsize=}" ;; + blacklist=*) blacklist=${x#blacklist=} ;; + panic=*) panic=${x#panic=} ;; + break=*) break=${x#break=} ;; + break) break=premount ;; + debug|debug=*) debug=y; quiet=n ;; + netconsole=*) netconsole=${x#netconsole=} ;; + esac + done + export quiet blacklist panic break debug netconsole + [ -d /root ] || mkdir -m 0700 /root + mkdir -p /var/lock + mkdir -p /run/initramfs + if command -v mountpoint >/dev/null 2>&1; then + mountpoint -q /run || mount -t tmpfs -o "nodev,noexec,nosuid,size=${RUNSIZE},mode=0755" tmpfs /run + else + mount -t tmpfs -o "nodev,noexec,nosuid,size=${RUNSIZE},mode=0755" tmpfs /run 2>/dev/null || true + fi + mkdir -m 0700 /run/initramfs + . /conf/initramfs.conf + for conf in /conf/conf.d/*; do + [ -f "$conf" ] && . "$conf" + done + . /scripts/functions + if [ -n "$netconsole" ]; then + /sbin/modprobe netconsole netconsole="$netconsole" 2>/dev/null || true + fi + run_scripts /scripts/init-top + load_modules + run_scripts /scripts/init-premount + ) || echo "Warning: initramfs-tools driver phase had errors (continuing to shell)." +} + +run_initramfs_tools_drivers + +refresh_machine_conf_for_installer + +cd /tmp + +INSTALL_BMC_IMAGE= +INSTALL_TFTP_SERVER= +INSTALL_REBOOT=y +INSTALL_REBOOT_REASON="enabled by default" + +parse_install_reboot_arg() { + case "$1" in + y|1|yes|true) + INSTALL_REBOOT=y + INSTALL_REBOOT_REASON="enabled by sonic_install.reboot=$1" + ;; + n|0|no|false) + INSTALL_REBOOT=n + INSTALL_REBOOT_REASON="disabled by sonic_install.reboot=$1" + ;; + *) + # An unrecognized or empty value is not an explicit disable. The policy is + # "reboot on success unless explicitly disabled", so keep the default (reboot) + # rather than silently suppressing it; still warn so the typo is visible. + INSTALL_REBOOT=y + INSTALL_REBOOT_REASON="enabled by default (ignored invalid sonic_install.reboot=$1)" + echo "Warning: invalid sonic_install.reboot=$1; using default (auto-reboot enabled)." + ;; + esac +} + +for x in $(cat /proc/cmdline); do + case $x in + sonic_install.bmc_image=*) INSTALL_BMC_IMAGE="${x#sonic_install.bmc_image=}" ;; + sonic_install.tftp_server=*) INSTALL_TFTP_SERVER="${x#sonic_install.tftp_server=}" ;; + sonic_install.reboot=*) parse_install_reboot_arg "${x#sonic_install.reboot=}" ;; + esac +done + +drop_shell() { + echo "Aspeed net-install: dropping to shell." + echo " Manual install: /sbin/install-to-emmc.sh /tmp/" + echo " Auto install (HTTP/HTTPS): sonic_install.bmc_image=http(s):////" + echo " Auto install (TFTP): sonic_install.bmc_image= sonic_install.tftp_server=" + echo " (auto-reboot is the default; pass sonic_install.reboot=n to stay here on success)" + echo "" + if [ -x /bin/bash ]; then + exec /bin/bash + fi + exec /bin/sh +} + +iface_has_ipv4() { + if command -v ip >/dev/null 2>&1; then + ip -4 -o addr show dev "$1" 2>/dev/null | grep -q . + return $? + fi + ifconfig "$1" 2>/dev/null | grep -q 'inet ' +} + +bringup_network() { + IFACE=eth0 + case "$onie_platform" in + arm64-aspeed_nvidia_ast2700_bmc-r0) + # Reload ftgmac100 to ensure the driver is loaded and the interface is up + rmmod ftgmac100 2>/dev/null || true + ;; + esac + modprobe ftgmac100 2>/dev/null || true + + echo "Waiting for $IFACE in sysfs (up to 30s)..." + n=0 + while [ ! -d "/sys/class/net/$IFACE" ] && [ "$n" -lt 30 ]; do + sleep 1 + n=$((n + 1)) + done + if [ ! -d "/sys/class/net/$IFACE" ]; then + echo "Error: /sys/class/net/$IFACE not found." + return 1 + fi + echo "Using interface $IFACE" + ip link set "$IFACE" up 2>/dev/null || ifconfig "$IFACE" up 2>/dev/null || true + sleep 1 + if iface_has_ipv4 "$IFACE"; then + echo "Interface $IFACE already has an IPv4 address (kernel/ip=)." + return 0 + fi + if [ ! -x /sbin/udhcpc.script ]; then + echo "Error: /sbin/udhcpc.script missing (net-install initrd must ship udhcpc.script next to install-to-emmc.sh)." + return 1 + fi + echo "Running DHCP on $IFACE..." + udhcpc -n -q -i "$IFACE" -s /sbin/udhcpc.script -t 10 -T 3 || true + if iface_has_ipv4 "$IFACE"; then + return 0 + fi + echo "Error: no IPv4 on $IFACE (set ip=... in bootargs or fix DHCP)." + return 1 +} + +http_fetch_image() { + url="$1" + name=${url%%\?*}; name=${name%%#*}; name=${name##*/} + [ -n "$name" ] || name=sonic-aspeed-arm64-emmc.img.gz + dest="/tmp/$name" + rm -f "$dest" + echo "HTTP/HTTPS: $url -> $dest" + if curl -fkL --retry 3 --connect-timeout 10 -o "$dest" "$url" && [ -s "$dest" ]; then + FETCHED_IMAGE="$dest" + return 0 + fi + rm -f "$dest" + echo "Error: curl failed or empty file (check URL, server, DNS)." + return 1 +} + +tftp_fetch_image() { + srv="$1" + img="$2" + name=${img##*/} + [ -n "$name" ] || name=sonic-aspeed-arm64-emmc.img.gz + dest="/tmp/$name" + rm -f "$dest" + echo "TFTP: $srv:$img -> $dest" + if command -v tftp >/dev/null 2>&1 && tftp -g -r "$img" -l "$dest" "$srv" && [ -s "$dest" ]; then + FETCHED_IMAGE="$dest" + return 0 + fi + if command -v busybox >/dev/null 2>&1 && busybox tftp -g -r "$img" -l "$dest" "$srv" && [ -s "$dest" ]; then + FETCHED_IMAGE="$dest" + return 0 + fi + rm -f "$dest" + echo "Error: tftp failed or empty file (check server, filename, firewall)." + return 1 +} + +fetch_image_by_scheme() { + case "$INSTALL_BMC_IMAGE" in + http://*|https://*) + http_fetch_image "$INSTALL_BMC_IMAGE" + return $? + ;; + *) + if [ -z "$INSTALL_TFTP_SERVER" ]; then + echo "Error: TFTP transport selected (sonic_install.bmc_image=$INSTALL_BMC_IMAGE has no http/https scheme)," + echo " but sonic_install.tftp_server= is missing from bootargs." + return 1 + fi + tftp_fetch_image "$INSTALL_TFTP_SERVER" "$INSTALL_BMC_IMAGE" + return $? + ;; + esac +} + +if [ -z "$INSTALL_BMC_IMAGE" ]; then + echo "Aspeed net-install: no sonic_install.bmc_image= in cmdline — interactive shell." + echo " eMMC helper: /sbin/install-to-emmc.sh " + echo "" + drop_shell +fi + +if ! bringup_network; then + drop_shell +fi + +if ! fetch_image_by_scheme; then + drop_shell +fi + +if [ ! -x /sbin/install-to-emmc.sh ]; then + echo "Error: /sbin/install-to-emmc.sh missing from initramfs." + drop_shell +fi + +if ! /sbin/install-to-emmc.sh "$FETCHED_IMAGE"; then + echo "Install script failed." + drop_shell +fi + +if [ ! -x /sbin/sonic-uboot-env-init.sh ]; then + echo "Error: /sbin/sonic-uboot-env-init.sh missing from initramfs; not safe to reboot." + drop_shell +fi +if ! SONIC_UBOOT_ENV_INSTALLER=1 /sbin/sonic-uboot-env-init.sh; then + echo "Error: U-Boot env update failed; not safe to reboot." + drop_shell +fi + +print_install_success_banner() { + target_device= + image_dir= + # Parse as data rather than sourcing — the file is generated, but a glob-derived basename + # shouldn't be eval'd into the running shell. + if [ -r /tmp/sonic-bmc-install-status ]; then + while IFS='=' read -r _k _v; do + case "$_k" in + target_device) target_device="$_v" ;; + image_dir) image_dir="$_v" ;; + esac + done < /tmp/sonic-bmc-install-status + fi + if [ "$INSTALL_REBOOT" = y ]; then + _result="rebooting to boot SONiC from eMMC." + else + _result="reboot manually to boot SONiC from eMMC." + fi + cat </dev/null || busybox reboot -f 2>/dev/null || /sbin/reboot -f + echo "Error: reboot command failed; dropping to shell." +fi + +drop_shell diff --git a/platform/aspeed/tftp-installer-init/install-to-emmc.sh b/platform/aspeed/tftp-installer-init/install-to-emmc.sh new file mode 100644 index 00000000000..658a53da246 --- /dev/null +++ b/platform/aspeed/tftp-installer-init/install-to-emmc.sh @@ -0,0 +1,146 @@ +#!/bin/sh +# Write eMMC image to /dev/mmcblk0 and ensure data is persisted before reboot. +# Usage: install-to-emmc.sh [path-to-image.img.gz] +# Default: /tmp/sonic-aspeed-arm64-emmc.img.gz +# After running, reboot to boot from eMMC. +# Initramfs must provide: sgdisk, wipefs, blockdev, partprobe, e2fsck, +# gunzip, dd (with conv=sparse — coreutils, not BusyBox's), blkdiscard, +# blkid, mount. (TFTP installer ramfs has no swap and no eMMC mounts.) + +IMG="${1:-/tmp/sonic-aspeed-arm64-emmc.img.gz}" +EMMC="/dev/mmcblk0" + +if [ ! -b "$EMMC" ]; then + echo "Error: $EMMC not found" + exit 1 +fi +if [ ! -f "$IMG" ]; then + echo "Error: image not found: $IMG" + echo "Usage: $0 [path-to-image.img.gz]" + exit 1 +fi + +rosys="/sys/block/$(basename "$EMMC")/force_ro" +if [ -w "$rosys" ]; then + echo 0 > "$rosys" 2>/dev/null || true +fi +blockdev --setrw "$EMMC" 2>/dev/null || true +sync + +echo "Clearing existing partition table on $EMMC..." +sgdisk --zap-all "$EMMC" || echo "Warning: sgdisk --zap-all failed; continuing with full image write." +wipefs -a "$EMMC" || echo "Warning: wipefs -a failed; continuing with full image write." +sync +blockdev --rereadpt "$EMMC" 2>/dev/null || true +partprobe "$EMMC" 2>/dev/null || true + +# -z (BLKZEROOUT): the sparse dd below assumes skipped regions read as zero; +# plain discard does not guarantee that on this eMMC (discard_zeroes_data=0). +echo "Zeroing all blocks on $EMMC..." +blkdiscard -z "$EMMC" +sync + +echo "Writing $IMG to $EMMC..." +# Smaller bs + full pipe reads: fewer phys_seg per I/O on some MMC hosts than bs=1M; conv=sparse,fsync at end. +# sparse: lseek() over all-zero source blocks instead of writing them. +# Pipeline exit status is only from dd; corrupt/truncated gzip can still yield dd exit 0, so require gunzip success. +gz_ok=$(mktemp) || exit 1 +(gunzip -c "$IMG" && echo ok >"$gz_ok") | dd of="$EMMC" bs=128k iflag=fullblock conv=sparse,fsync +DD_RC=$? +if [ "$DD_RC" -ne 0 ] || [ ! -s "$gz_ok" ]; then + rm -f "$gz_ok" + echo "Error: write to $EMMC failed, or image is corrupt/truncated (see kernel log for mmcblk I/O errors)." + exit 1 +fi +rm -f "$gz_ok" +echo "Syncing..." +sync +blockdev --flushbufs "$EMMC" 2>/dev/null || true +echo "Relocating GPT backup to end of $EMMC (fixes invalid alternate GPT when image < device)..." +sgdisk -e "$EMMC" || echo "Warning: sgdisk -e failed" +partprobe "$EMMC" 2>/dev/null || true + +# SONiC mounts the SONiC-OS ext4 root at /host; machine.conf must be the file at the fs root +# (see platform/aspeed/build-emmc-image-installer.sh). Copy from TFTP init if we generated it in initramfs. +MACHINE_CONF_SRC=/tmp/machine.conf +if [ -f "$MACHINE_CONF_SRC" ] && [ -s "$MACHINE_CONF_SRC" ]; then + sync + blockdev --rereadpt "$EMMC" 2>/dev/null || true + partprobe "$EMMC" 2>/dev/null || true + sleep 1 + BOOT_PART=$(blkid -L SONiC-OS 2>/dev/null || true) + if [ -z "$BOOT_PART" ] && [ -b "${EMMC}p1" ]; then + BOOT_PART="${EMMC}p1" + fi + if [ -n "$BOOT_PART" ] && [ -b "$BOOT_PART" ]; then + echo "Checking ext4 on $BOOT_PART (e2fsck)..." + e2fsck -fy "$BOOT_PART" /dev/null || true + MNT=$(mktemp -d) + if mount -t ext4 -o rw "$BOOT_PART" "$MNT" 2>/dev/null; then + cp "$MACHINE_CONF_SRC" "$MNT/machine.conf" + chmod 644 "$MNT/machine.conf" 2>/dev/null || true + sync + umount "$MNT" 2>/dev/null || true + echo "Wrote machine.conf to SONiC-OS partition (visible as /host/machine.conf after boot)." + else + echo "Warning: could not mount $BOOT_PART rw; left machine.conf only in initramfs ($MACHINE_CONF_SRC)." + fi + rmdir "$MNT" 2>/dev/null || true + else + echo "Warning: SONiC-OS partition not found; could not write machine.conf to eMMC." + fi +fi + +# Post-write sanity check: mount the SONiC-OS partition and confirm an image-* directory +# is present. This catches the rare case where dd reported success but the eMMC didn't +# actually persist a valid SONiC payload. Also captures the image dir for /init's banner. +sync +blockdev --rereadpt "$EMMC" 2>/dev/null || true +partprobe "$EMMC" 2>/dev/null || true +INSTALL_PART=$(blkid -L SONiC-OS 2>/dev/null || true) +# blkid -L searches every visible block device; reject any match that isn't on our target eMMC +# (e.g. a USB stick with the same label) so we don't verify the wrong disk. +case "$INSTALL_PART" in + "${EMMC}"*) ;; + *) INSTALL_PART="" ;; +esac +if [ -z "$INSTALL_PART" ] && [ -b "${EMMC}p1" ]; then + INSTALL_PART="${EMMC}p1" +fi +INSTALL_IMAGE_DIR="" +INSTALL_VERIFY_ERR="" +if [ -n "$INSTALL_PART" ] && [ -b "$INSTALL_PART" ]; then + MNT_STATUS=$(mktemp -d) + if mount -t ext4 -o ro "$INSTALL_PART" "$MNT_STATUS" 2>/dev/null; then + for d in "$MNT_STATUS"/image-*; do + [ -d "$d" ] || continue + if [ ! -s "$d/boot/sonic_arm64.fit" ]; then + INSTALL_VERIFY_ERR="$(basename "$d")/boot/sonic_arm64.fit missing or empty" + continue + fi + if [ ! -s "$d/fs.squashfs" ]; then + INSTALL_VERIFY_ERR="$(basename "$d")/fs.squashfs missing or empty" + continue + fi + INSTALL_IMAGE_DIR=$(basename "$d") + break + done + umount "$MNT_STATUS" 2>/dev/null || true + [ -z "$INSTALL_IMAGE_DIR" ] && [ -z "$INSTALL_VERIFY_ERR" ] && \ + INSTALL_VERIFY_ERR="no image-* directory on $INSTALL_PART" + else + INSTALL_VERIFY_ERR="could not mount $INSTALL_PART read-only" + fi + rmdir "$MNT_STATUS" 2>/dev/null || true +else + INSTALL_VERIFY_ERR="SONiC-OS partition not found on $EMMC" +fi +if [ -z "$INSTALL_IMAGE_DIR" ]; then + echo "Error: post-write verification failed: $INSTALL_VERIFY_ERR" + exit 1 +fi +{ + echo "target_device=$EMMC" + echo "image_dir=$INSTALL_IMAGE_DIR" +} > /tmp/sonic-bmc-install-status +echo "Image write complete: image_dir=$INSTALL_IMAGE_DIR on $EMMC" diff --git a/platform/aspeed/tftp-installer-init/udhcpc.script b/platform/aspeed/tftp-installer-init/udhcpc.script new file mode 100644 index 00000000000..b90433ef591 --- /dev/null +++ b/platform/aspeed/tftp-installer-init/udhcpc.script @@ -0,0 +1,43 @@ +#!/bin/sh +# BusyBox udhcpc handler: apply lease (address + default route + DNS). Bundled as /sbin/udhcpc.script +# because minimal initramfs has no /usr/share/udhcpc/default.script. + +case "$1" in +deconfig) + if command -v ip >/dev/null 2>&1; then + ip -4 addr flush dev "$interface" 2>/dev/null || true + else + ifconfig "$interface" 0.0.0.0 2>/dev/null || true + fi + ;; +renew|bound) + [ -n "$interface" ] && [ -n "$ip" ] || exit 1 + if command -v ip >/dev/null 2>&1 && [ -n "$mask" ]; then + ip -4 addr flush dev "$interface" 2>/dev/null || true + ip -4 addr add "$ip/$mask" dev "$interface" || exit 1 + ip link set "$interface" up 2>/dev/null || true + elif [ -n "$subnet" ]; then + ifconfig "$interface" "$ip" netmask "$subnet" up || exit 1 + else + exit 1 + fi + if [ -n "$router" ]; then + for gw in $router; do + if command -v ip >/dev/null 2>&1; then + ip -4 route add default via "$gw" dev "$interface" 2>/dev/null && break + else + route add default gw "$gw" dev "$interface" 2>/dev/null && break + fi + done + fi + if [ -n "$dns" ] || [ -n "$domain" ]; then + { + [ -n "$domain" ] && echo "search $domain" + for ns in $dns; do + echo "nameserver $ns" + done + } > /etc/resolv.conf + fi + ;; +esac +exit 0 diff --git a/platform/barefoot/docker-saiserver-bfn.mk b/platform/barefoot/docker-saiserver-bfn.mk index dde7e8888a5..ff90e6053bf 100644 --- a/platform/barefoot/docker-saiserver-bfn.mk +++ b/platform/barefoot/docker-saiserver-bfn.mk @@ -36,4 +36,3 @@ $(DOCKER_SAISERVER_BFN)_RUN_OPT += --privileged -t $(DOCKER_SAISERVER_BFN)_RUN_OPT += -v /host/machine.conf:/etc/machine.conf $(DOCKER_SAISERVER_BFN)_RUN_OPT += -v /var/run/docker-saiserver:/var/run/sswsyncd $(DOCKER_SAISERVER_BFN)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro -$(DOCKER_SAISERVER_BFN)_RUN_OPT += -v /host/warmboot:/var/warmboot diff --git a/platform/barefoot/docker-syncd-bfn-rpc.mk b/platform/barefoot/docker-syncd-bfn-rpc.mk index 8b5789ba355..8ab95647f6a 100644 --- a/platform/barefoot/docker-syncd-bfn-rpc.mk +++ b/platform/barefoot/docker-syncd-bfn-rpc.mk @@ -22,4 +22,3 @@ $(DOCKER_SYNCD_BFN_RPC)_PACKAGE_NAME = syncd $(DOCKER_SYNCD_BFN_RPC)_RUN_OPT += --privileged -t $(DOCKER_SYNCD_BFN_RPC)_RUN_OPT += -v /host/machine.conf:/etc/machine.conf $(DOCKER_SYNCD_BFN_RPC)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro -$(DOCKER_SYNCD_BFN_RPC)_RUN_OPT += -v /host/warmboot:/var/warmboot diff --git a/platform/barefoot/docker-syncd-bfn.mk b/platform/barefoot/docker-syncd-bfn.mk index 55303557c34..06e2e432c30 100644 --- a/platform/barefoot/docker-syncd-bfn.mk +++ b/platform/barefoot/docker-syncd-bfn.mk @@ -14,6 +14,5 @@ $(DOCKER_SYNCD_BASE)_DBG_DEPENDS += $(SYNCD_DBG) \ $(DOCKER_SYNCD_BASE)_VERSION = 1.0.0 $(DOCKER_SYNCD_BASE)_PACKAGE_NAME = syncd -$(DOCKER_SYNCD_BASE)_RUN_OPT += -v /host/warmboot:/var/warmboot SONIC_BULLSEYE_DOCKERS += $(DOCKER_SYNCD_BASE) diff --git a/platform/barefoot/docker-syncd-bfn/supervisord.conf b/platform/barefoot/docker-syncd-bfn/supervisord.conf index 7ea644b6d6f..927db394010 100644 --- a/platform/barefoot/docker-syncd-bfn/supervisord.conf +++ b/platform/barefoot/docker-syncd-bfn/supervisord.conf @@ -14,7 +14,7 @@ buffer_size=1024 [eventlistener:supervisor-proc-exit-listener] command=/usr/bin/supervisor-proc-exit-listener-rs --container-name syncd -events=PROCESS_STATE_EXITED,PROCESS_STATE_RUNNING +events=PROCESS_STATE_EXITED,PROCESS_STATE_RUNNING,PROCESS_STATE_FATAL autostart=true autorestart=unexpected buffer_size=1024 diff --git a/platform/barefoot/sonic-platform-modules-arista b/platform/barefoot/sonic-platform-modules-arista index 90971a883d5..e0904bc3ca3 160000 --- a/platform/barefoot/sonic-platform-modules-arista +++ b/platform/barefoot/sonic-platform-modules-arista @@ -1 +1 @@ -Subproject commit 90971a883d5da50a1eec22e2ca0dbd03ace60c08 +Subproject commit e0904bc3ca3322bd27ddc732381ddac4ce36c248 diff --git a/platform/broadcom/docker-pde.mk b/platform/broadcom/docker-pde.mk index 476b2e09e1c..7c76ef76a0e 100644 --- a/platform/broadcom/docker-pde.mk +++ b/platform/broadcom/docker-pde.mk @@ -16,14 +16,14 @@ ifeq ($(PDDF_SUPPORT), y) $(DOCKER_PDE)_PYTHON_WHEELS += $(PDDF_PLATFORM_API_BASE_PY3) endif $(DOCKER_PDE)_PYTHON_WHEELS += $(SONIC_DAEMON_BASE_PY3) -$(DOCKER_PDE)_DBG_DEPENDS = $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_DEPENDS) -$(DOCKER_PDE)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_IMAGE_PACKAGES) -$(DOCKER_PDE)_LOAD_DOCKERS = $(DOCKER_CONFIG_ENGINE_BOOKWORM) +$(DOCKER_PDE)_DBG_DEPENDS = $($(DOCKER_CONFIG_ENGINE_TRIXIE)_DBG_DEPENDS) +$(DOCKER_PDE)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_TRIXIE)_DBG_IMAGE_PACKAGES) +$(DOCKER_PDE)_LOAD_DOCKERS = $(DOCKER_CONFIG_ENGINE_TRIXIE) SONIC_DOCKER_IMAGES += $(DOCKER_PDE) -SONIC_BOOKWORM_DOCKERS += $(DOCKER_PDE) +SONIC_TRIXIE_DOCKERS += $(DOCKER_PDE) SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_PDE) -SONIC_BOOKWORM_DBG_DOCKERS += $(DOCKER_PDE_DBG) +SONIC_TRIXIE_DBG_DOCKERS += $(DOCKER_PDE_DBG) SONIC_DOCKER_DBG_IMAGES += $(DOCKER_PDE_DBG) SONIC_INSTALL_DOCKER_DBG_IMAGES += $(DOCKER_PDE_DBG) diff --git a/platform/broadcom/docker-saiserver-brcm.mk b/platform/broadcom/docker-saiserver-brcm.mk index dd6324e0f26..13a2e1fecb4 100644 --- a/platform/broadcom/docker-saiserver-brcm.mk +++ b/platform/broadcom/docker-saiserver-brcm.mk @@ -11,9 +11,9 @@ $(SYNCD_INIT_COMMON_SCRIPT)_PATH = $(SRC_PATH)/sonic-sairedis/syncd/scripts SONIC_COPY_FILES += $(SYNCD_INIT_COMMON_SCRIPT) $(DOCKER_SAISERVER_BRCM)_FILES += $(SYNCD_INIT_COMMON_SCRIPT) -$(DOCKER_SAISERVER_BRCM)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_BOOKWORM) +$(DOCKER_SAISERVER_BRCM)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_TRIXIE) SONIC_DOCKER_IMAGES += $(DOCKER_SAISERVER_BRCM) -SONIC_BOOKWORM_DOCKERS += $(DOCKER_SAISERVER_BRCM) +SONIC_TRIXIE_DOCKERS += $(DOCKER_SAISERVER_BRCM) #Support two versions of saiserver $(DOCKER_SAISERVER_BRCM)_CONTAINER_NAME = saiserver$(SAITHRIFT_VER) @@ -22,7 +22,6 @@ $(DOCKER_SAISERVER_BRCM)_RUN_OPT += --privileged -t $(DOCKER_SAISERVER_BRCM)_RUN_OPT += -v /host/machine.conf:/etc/machine.conf $(DOCKER_SAISERVER_BRCM)_RUN_OPT += -v /var/run/docker-saiserver:/var/run/sswsyncd $(DOCKER_SAISERVER_BRCM)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro -$(DOCKER_SAISERVER_BRCM)_RUN_OPT += -v /host/warmboot:/var/warmboot $(DOCKER_SAISERVER_BRCM)_BASE_IMAGE_FILES += bcmcmd:/usr/bin/bcmcmd $(DOCKER_SAISERVER_BRCM)_BASE_IMAGE_FILES += bcmsh:/usr/bin/bcmsh diff --git a/platform/broadcom/docker-saiserver-brcm/Dockerfile.j2 b/platform/broadcom/docker-saiserver-brcm/Dockerfile.j2 index 474278b224d..f2b61b1eb9b 100644 --- a/platform/broadcom/docker-saiserver-brcm/Dockerfile.j2 +++ b/platform/broadcom/docker-saiserver-brcm/Dockerfile.j2 @@ -1,5 +1,5 @@ {% from "dockers/dockerfile-macros.j2" import install_debian_packages %} -FROM docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} +FROM docker-config-engine-trixie-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} ARG docker_container_name diff --git a/platform/broadcom/docker-syncd-brcm-dnx-rpc.mk b/platform/broadcom/docker-syncd-brcm-dnx-rpc.mk index d8e9d644191..929f3bc6a56 100644 --- a/platform/broadcom/docker-syncd-brcm-dnx-rpc.mk +++ b/platform/broadcom/docker-syncd-brcm-dnx-rpc.mk @@ -23,7 +23,6 @@ $(DOCKER_SYNCD_BRCM_DNX_RPC)_VERSION = 1.0.0+rpc $(DOCKER_SYNCD_BRCM_DNX_RPC)_PACKAGE_NAME = syncd-dnx $(DOCKER_SYNCD_BRCM_DNX_RPC)_RUN_OPT += --privileged -t $(DOCKER_SYNCD_BRCM_DNX_RPC)_RUN_OPT += -v /host/machine.conf:/etc/machine.conf -$(DOCKER_SYNCD_BRCM_DNX_RPC)_RUN_OPT += -v /host/warmboot:/var/warmboot $(DOCKER_SYNCD_BRCM_DNX_RPC)_RUN_OPT += -v /var/run/docker-syncd:/var/run/sswsyncd $(DOCKER_SYNCD_BRCM_DNX_RPC)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro @@ -31,4 +30,4 @@ $(DOCKER_SYNCD_BRCM_DNX_RPC)_BASE_IMAGE_FILES += bcmcmd:/usr/bin/bcmcmd $(DOCKER_SYNCD_BRCM_DNX_RPC)_BASE_IMAGE_FILES += bcmsh:/usr/bin/bcmsh $(DOCKER_SYNCD_BRCM_DNX_RPC)_MACHINE = broadcom-dnx -SONIC_BOOKWORM_DOCKERS += $(DOCKER_SYNCD_BRCM_DNX_RPC) +SONIC_TRIXIE_DOCKERS += $(DOCKER_SYNCD_BRCM_DNX_RPC) diff --git a/platform/broadcom/docker-syncd-brcm-dnx-rpc/Dockerfile.j2 b/platform/broadcom/docker-syncd-brcm-dnx-rpc/Dockerfile.j2 index ca46722a627..53bbb43a2f4 100644 --- a/platform/broadcom/docker-syncd-brcm-dnx-rpc/Dockerfile.j2 +++ b/platform/broadcom/docker-syncd-brcm-dnx-rpc/Dockerfile.j2 @@ -22,7 +22,7 @@ RUN apt-get update \ wget \ cmake \ libnanomsg-dev \ - libthrift-0.17.0 + libthrift-0.19.0t64 {% if docker_syncd_brcm_dnx_rpc_debs.strip() -%} # Copy locally-built Debian package dependencies diff --git a/platform/broadcom/docker-syncd-brcm-dnx.mk b/platform/broadcom/docker-syncd-brcm-dnx.mk index a7299cbad92..354fb9e89d6 100644 --- a/platform/broadcom/docker-syncd-brcm-dnx.mk +++ b/platform/broadcom/docker-syncd-brcm-dnx.mk @@ -6,9 +6,9 @@ DOCKER_SYNCD_DNX_PLATFORM_CODE = brcm-dnx $(DOCKER_SYNCD_DNX_BASE)_PATH = $(PLATFORM_PATH)/docker-syncd-$(DOCKER_SYNCD_DNX_PLATFORM_CODE) -$(DOCKER_SYNCD_DNX_BASE)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_BOOKWORM) -$(DOCKER_SYNCD_DNX_BASE)_DBG_DEPENDS += $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_DEPENDS) -$(DOCKER_SYNCD_DNX_BASE)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_IMAGE_PACKAGES) +$(DOCKER_SYNCD_DNX_BASE)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_TRIXIE) +$(DOCKER_SYNCD_DNX_BASE)_DBG_DEPENDS += $($(DOCKER_CONFIG_ENGINE_TRIXIE)_DBG_DEPENDS) +$(DOCKER_SYNCD_DNX_BASE)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_TRIXIE)_DBG_IMAGE_PACKAGES) SONIC_DOCKER_IMAGES += $(DOCKER_SYNCD_DNX_BASE) ifneq ($(ENABLE_SYNCD_RPC),y) @@ -41,11 +41,10 @@ $(DOCKER_SYNCD_DNX_BASE)_CONTAINER_NAME = syncd $(DOCKER_SYNCD_DNX_BASE)_RUN_OPT += --privileged -t $(DOCKER_SYNCD_DNX_BASE)_RUN_OPT += -v /host/machine.conf:/etc/machine.conf $(DOCKER_SYNCD_DNX_BASE)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro -$(DOCKER_SYNCD_DNX_BASE)_RUN_OPT += -v /host/warmboot:/var/warmboot $(DOCKER_SYNCD_DNX_BASE)_BASE_IMAGE_FILES += bcmcmd:/usr/bin/bcmcmd $(DOCKER_SYNCD_DNX_BASE)_BASE_IMAGE_FILES += bcmsh:/usr/bin/bcmsh $(DOCKER_SYNCD_DNX_BASE)_BASE_IMAGE_FILES += bcm_common:/usr/bin/bcm_common -SONIC_BOOKWORM_DOCKERS += $(DOCKER_SYNCD_DNX_BASE) -SONIC_BOOKWORM_DBG_DOCKERS += $(DOCKER_SYNCD_DNX_BASE_DBG) +SONIC_TRIXIE_DOCKERS += $(DOCKER_SYNCD_DNX_BASE) +SONIC_TRIXIE_DBG_DOCKERS += $(DOCKER_SYNCD_DNX_BASE_DBG) diff --git a/platform/broadcom/docker-syncd-brcm-dnx/Dockerfile.j2 b/platform/broadcom/docker-syncd-brcm-dnx/Dockerfile.j2 index dd5818f0a54..d82f030b00a 100755 --- a/platform/broadcom/docker-syncd-brcm-dnx/Dockerfile.j2 +++ b/platform/broadcom/docker-syncd-brcm-dnx/Dockerfile.j2 @@ -1,5 +1,5 @@ {% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files %} -ARG BASE=docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} +ARG BASE=docker-config-engine-trixie-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} FROM $BASE AS base diff --git a/platform/broadcom/docker-syncd-brcm-dnx/start.sh b/platform/broadcom/docker-syncd-brcm-dnx/start.sh index e4a5b2e2c5b..d1bee1206c4 100755 --- a/platform/broadcom/docker-syncd-brcm-dnx/start.sh +++ b/platform/broadcom/docker-syncd-brcm-dnx/start.sh @@ -26,6 +26,16 @@ else sonic-cfggen -d -t $HWSKU_DIR/config.bcm.j2 > /etc/sai.d/config.bcm fi if [ -f $HWSKU_DIR/sai.profile ]; then + if [ ! -z $(grep "aboot_platform=.*arista" "/etc/machine.conf") ]; then + if [ -f /etc/sai.d/sai.profile ]; then + hashSrc=$(md5sum $HWSKU_DIR/sai.profile | cut -d ' ' -f 1) + hashDst=$(md5sum /etc/sai.d/sai.profile | cut -d ' ' -f 1) + if [ "${hashSrc}" == "${hashDst}" ]; then + logger -p info "Arista: sai.profile unchanged, skip copying" + exit 0 + fi + fi + fi cp $HWSKU_DIR/sai.profile /etc/sai.d/sai.profile fi fi diff --git a/platform/broadcom/docker-syncd-brcm-dnx/supervisord.conf b/platform/broadcom/docker-syncd-brcm-dnx/supervisord.conf index c470399cce5..0681912ba88 100644 --- a/platform/broadcom/docker-syncd-brcm-dnx/supervisord.conf +++ b/platform/broadcom/docker-syncd-brcm-dnx/supervisord.conf @@ -14,7 +14,7 @@ buffer_size=1024 [eventlistener:supervisor-proc-exit-listener] command=/usr/bin/supervisor-proc-exit-listener-rs --container-name syncd -events=PROCESS_STATE_EXITED,PROCESS_STATE_RUNNING +events=PROCESS_STATE_EXITED,PROCESS_STATE_RUNNING,PROCESS_STATE_FATAL autostart=true autorestart=unexpected buffer_size=1024 diff --git a/platform/broadcom/docker-syncd-brcm-legacy-th-rpc.dep b/platform/broadcom/docker-syncd-brcm-legacy-th-rpc.dep new file mode 100644 index 00000000000..255921ac6ec --- /dev/null +++ b/platform/broadcom/docker-syncd-brcm-legacy-th-rpc.dep @@ -0,0 +1,8 @@ +DPATH := $($(DOCKER_SYNCD_BRCM_LEGACY_TH_RPC)_PATH) +DEP_FILES := $(SONIC_COMMON_FILES_LIST) $(PLATFORM_PATH)/docker-syncd-brcm-legacy-th-rpc.mk $(PLATFORM_PATH)/docker-syncd-brcm-legacy-th-rpc.dep +DEP_FILES += $(SONIC_COMMON_BASE_FILES_LIST) +DEP_FILES += $(shell git ls-files $(DPATH)) + +$(DOCKER_SYNCD_BRCM_LEGACY_TH_RPC)_CACHE_MODE := GIT_CONTENT_SHA +$(DOCKER_SYNCD_BRCM_LEGACY_TH_RPC)_DEP_FLAGS := $(SONIC_COMMON_FLAGS_LIST) +$(DOCKER_SYNCD_BRCM_LEGACY_TH_RPC)_DEP_FILES := $(DEP_FILES) diff --git a/platform/broadcom/docker-syncd-brcm-legacy-th-rpc.mk b/platform/broadcom/docker-syncd-brcm-legacy-th-rpc.mk new file mode 100644 index 00000000000..bbbcb1f5eeb --- /dev/null +++ b/platform/broadcom/docker-syncd-brcm-legacy-th-rpc.mk @@ -0,0 +1,32 @@ +# docker image for brcm-legacy-th syncd with rpc + +DOCKER_SYNCD_BRCM_LEGACY_TH_RPC = docker-syncd-brcm-legacy-th-rpc.gz +$(DOCKER_SYNCD_BRCM_LEGACY_TH_RPC)_PATH = $(PLATFORM_PATH)/docker-syncd-brcm-legacy-th-rpc +$(DOCKER_SYNCD_BRCM_LEGACY_TH_RPC)_DEPENDS += $(SYNCD_RPC) +ifeq ($(INSTALL_DEBUG_TOOLS), y) +$(DOCKER_SYNCD_BRCM_LEGACY_TH_RPC)_DEPENDS += $(SYNCD_RPC_DBG) \ + $(LIBSWSSCOMMON_DBG) \ + $(LIBSAIMETADATA_DBG) \ + $(LIBSAIREDIS_DBG) \ + $(SSWSYNCD) +endif +$(DOCKER_SYNCD_BRCM_LEGACY_TH_RPC)_PYTHON_WHEELS += $(PTF_PY3) +$(DOCKER_SYNCD_BRCM_LEGACY_TH_RPC)_LOAD_DOCKERS += $(DOCKER_SYNCD_LEGACY_TH_BASE) +SONIC_DOCKER_IMAGES += $(DOCKER_SYNCD_BRCM_LEGACY_TH_RPC) +ifeq ($(ENABLE_SYNCD_RPC),y) +SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_SYNCD_BRCM_LEGACY_TH_RPC) +endif + +$(DOCKER_SYNCD_BRCM_LEGACY_TH_RPC)_CONTAINER_NAME = syncd +$(DOCKER_SYNCD_BRCM_LEGACY_TH_RPC)_VERSION = 1.0.0+rpc +$(DOCKER_SYNCD_BRCM_LEGACY_TH_RPC)_PACKAGE_NAME = syncd-legacy-th +$(DOCKER_SYNCD_BRCM_LEGACY_TH_RPC)_RUN_OPT += --privileged -t +$(DOCKER_SYNCD_BRCM_LEGACY_TH_RPC)_RUN_OPT += -v /host/machine.conf:/etc/machine.conf +$(DOCKER_SYNCD_BRCM_LEGACY_TH_RPC)_RUN_OPT += -v /var/run/docker-syncd:/var/run/sswsyncd +$(DOCKER_SYNCD_BRCM_LEGACY_TH_RPC)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro + +$(DOCKER_SYNCD_BRCM_LEGACY_TH_RPC)_BASE_IMAGE_FILES += bcmcmd:/usr/bin/bcmcmd +$(DOCKER_SYNCD_BRCM_LEGACY_TH_RPC)_BASE_IMAGE_FILES += bcmsh:/usr/bin/bcmsh +$(DOCKER_SYNCD_BRCM_LEGACY_TH_RPC)_MACHINE = broadcom-legacy-th + +SONIC_TRIXIE_DOCKERS += $(DOCKER_SYNCD_BRCM_LEGACY_TH_RPC) diff --git a/platform/broadcom/docker-syncd-brcm-legacy-th-rpc/Dockerfile.j2 b/platform/broadcom/docker-syncd-brcm-legacy-th-rpc/Dockerfile.j2 new file mode 100644 index 00000000000..d297d2f3920 --- /dev/null +++ b/platform/broadcom/docker-syncd-brcm-legacy-th-rpc/Dockerfile.j2 @@ -0,0 +1,73 @@ +{% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files, rsync_from_builder_stage %} +ARG BASE=docker-syncd-brcm-legacy-th-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} + +FROM $BASE AS base + +## Make apt-get non-interactive +ENV DEBIAN_FRONTEND=noninteractive + +RUN apt-get purge -y syncd + +## Pre-install the fundamental packages +RUN apt-get update \ + && apt-get -y install \ + net-tools \ + python3-pip \ + python3-dev \ + python-is-python3 \ + python3-scapy \ + build-essential \ + libssl-dev \ + libffi-dev \ + wget \ + cmake \ + libnanomsg-dev \ + libthrift-0.19.0t64 + +{% if docker_syncd_brcm_legacy_th_rpc_debs.strip() -%} +# Copy locally-built Debian package dependencies +{{ copy_files("debs/", docker_syncd_brcm_legacy_th_rpc_debs.split(' '), "/debs/") }} +{% endif %} + +{% if docker_syncd_brcm_legacy_th_rpc_pydebs.strip() -%} +# Copy locally-built Debian package dependencies +{{ copy_files("python-debs/", docker_syncd_brcm_legacy_th_rpc_pydebs.split(' '), "/debs/") }} +{% endif %} + +{% if docker_syncd_brcm_legacy_th_rpc_debs.strip() -%} +# Install locally-built Debian packages and implicitly install their dependencies +{{ install_debian_packages(docker_syncd_brcm_legacy_th_rpc_debs.split(' ')) }} +{% endif %} + +{% if docker_syncd_brcm_legacy_th_rpc_pydebs.strip() -%} +# Install locally-built Debian packages and implicitly install their dependencies +{{ install_debian_packages(docker_syncd_brcm_legacy_th_rpc_pydebs.split(' ')) }} +{% endif %} + +RUN pip3 install cffi==1.16.0 \ + && pip3 install wheel \ + && pip3 install nnpy \ + && mkdir -p /opt \ + && cd /opt \ + && wget https://raw.githubusercontent.com/p4lang/ptf/master/ptf_nn/ptf_nn_agent.py \ + && apt-get clean -y; apt-get autoclean -y; apt-get autoremove -y \ + && rm -rf /root/deps + +COPY ["ptf_nn_agent.conf", "/etc/supervisor/conf.d/"] + +## Clean up +RUN apt-get -y purge \ + cmake \ + libssl-dev \ + libffi-dev \ + python3-dev \ + python3-pip \ + libthrift-dev \ + build-essential + +FROM $BASE + +{{ rsync_from_builder_stage() }} + +ENV DEBIAN_FRONTEND=noninteractive +ENTRYPOINT ["/usr/local/bin/supervisord"] diff --git a/platform/broadcom/docker-syncd-brcm-legacy-th-rpc/base_image_files/bcmcmd b/platform/broadcom/docker-syncd-brcm-legacy-th-rpc/base_image_files/bcmcmd new file mode 100755 index 00000000000..7903db6ed6a --- /dev/null +++ b/platform/broadcom/docker-syncd-brcm-legacy-th-rpc/base_image_files/bcmcmd @@ -0,0 +1,3 @@ +#!/bin/bash + +docker exec -i syncd bcmcmd "$@" diff --git a/platform/broadcom/docker-syncd-brcm-legacy-th-rpc/base_image_files/bcmsh b/platform/broadcom/docker-syncd-brcm-legacy-th-rpc/base_image_files/bcmsh new file mode 100755 index 00000000000..3bb78b0da79 --- /dev/null +++ b/platform/broadcom/docker-syncd-brcm-legacy-th-rpc/base_image_files/bcmsh @@ -0,0 +1,3 @@ +#!/bin/bash + +docker exec -it syncd bcmsh "$@" diff --git a/platform/broadcom/docker-syncd-brcm-legacy-th-rpc/ptf_nn_agent.conf b/platform/broadcom/docker-syncd-brcm-legacy-th-rpc/ptf_nn_agent.conf new file mode 100644 index 00000000000..fa1ed0eb162 --- /dev/null +++ b/platform/broadcom/docker-syncd-brcm-legacy-th-rpc/ptf_nn_agent.conf @@ -0,0 +1,10 @@ +[program:ptf_nn_agent] +command=/usr/bin/python /opt/ptf_nn_agent.py --device-socket 1@tcp://0.0.0.0:10900 -i 1-3@Ethernet12 --set-iface-rcv-buffer=109430400 +process_name=ptf_nn_agent +stdout_logfile=/tmp/ptf_nn_agent.out.log +stderr_logfile=/tmp/ptf_nn_agent.err.log +redirect_stderr=false +autostart=true +autorestart=true +startsecs=1 +numprocs=1 diff --git a/platform/broadcom/docker-syncd-brcm-legacy-th.dep b/platform/broadcom/docker-syncd-brcm-legacy-th.dep new file mode 100644 index 00000000000..d427a1f8735 --- /dev/null +++ b/platform/broadcom/docker-syncd-brcm-legacy-th.dep @@ -0,0 +1,8 @@ +DPATH := $($(DOCKER_SYNCD_LEGACY_TH_BASE)_PATH) +DEP_FILES := $(SONIC_COMMON_FILES_LIST) $(PLATFORM_PATH)/docker-syncd-brcm-legacy-th.mk $(PLATFORM_PATH)/docker-syncd-brcm-legacy-th.dep +DEP_FILES += $(SONIC_COMMON_BASE_FILES_LIST) +DEP_FILES += $(shell git ls-files $(DPATH)) + +$(DOCKER_SYNCD_LEGACY_TH_BASE)_CACHE_MODE := GIT_CONTENT_SHA +$(DOCKER_SYNCD_LEGACY_TH_BASE)_DEP_FLAGS := $(SONIC_COMMON_FLAGS_LIST) +$(DOCKER_SYNCD_LEGACY_TH_BASE)_DEP_FILES := $(DEP_FILES) diff --git a/platform/broadcom/docker-syncd-brcm-legacy-th.mk b/platform/broadcom/docker-syncd-brcm-legacy-th.mk new file mode 100644 index 00000000000..054e48f790c --- /dev/null +++ b/platform/broadcom/docker-syncd-brcm-legacy-th.mk @@ -0,0 +1,51 @@ +# docker image for brcm-legacy-th syncd + +DOCKER_SYNCD_LEGACY_TH_BASE = docker-syncd-brcm-legacy-th.gz +DOCKER_SYNCD_LEGACY_TH_BASE_DBG = docker-syncd-brcm-legacy-th-$(DBG_IMAGE_MARK).gz +DOCKER_SYNCD_LEGACY_TH_PLATFORM_CODE = brcm-legacy-th + +$(DOCKER_SYNCD_LEGACY_TH_BASE)_PATH = $(PLATFORM_PATH)/docker-syncd-$(DOCKER_SYNCD_LEGACY_TH_PLATFORM_CODE) + +$(DOCKER_SYNCD_LEGACY_TH_BASE)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_TRIXIE) +$(DOCKER_SYNCD_LEGACY_TH_BASE)_DBG_DEPENDS += $($(DOCKER_CONFIG_ENGINE_TRIXIE)_DBG_DEPENDS) +$(DOCKER_SYNCD_LEGACY_TH_BASE)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_TRIXIE)_DBG_IMAGE_PACKAGES) + +SONIC_DOCKER_IMAGES += $(DOCKER_SYNCD_LEGACY_TH_BASE) +ifneq ($(ENABLE_SYNCD_RPC),y) +SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_SYNCD_LEGACY_TH_BASE) +endif + +SONIC_DOCKER_DBG_IMAGES += $(DOCKER_SYNCD_LEGACY_TH_BASE_DBG) +ifneq ($(ENABLE_SYNCD_RPC),y) +SONIC_INSTALL_DOCKER_DBG_IMAGES += $(DOCKER_SYNCD_LEGACY_TH_BASE_DBG) +endif + + +$(DOCKER_SYNCD_LEGACY_TH_BASE)_DEPENDS += $(SYNCD) +$(DOCKER_SYNCD_LEGACY_TH_BASE)_DEPENDS += $(BRCM_LEGACY_TH_SAI) +$(DOCKER_SYNCD_LEGACY_TH_BASE)_DEPENDS += $(SSWSYNCD) +$(DOCKER_SYNCD_LEGACY_TH_BASE)_FILES += $(RDB-CLI) + +ifeq ($(INSTALL_DEBUG_TOOLS), y) +$(DOCKER_SYNCD_LEGACY_TH_BASE)_DBG_DEPENDS += $(SYNCD_DBG) \ + $(LIBSWSSCOMMON_DBG) \ + $(LIBSAIMETADATA_DBG) \ + $(LIBSAIREDIS_DBG) +endif + +$(DOCKER_SYNCD_LEGACY_TH_BASE)_VERSION = 1.0.0 +$(DOCKER_SYNCD_LEGACY_TH_BASE)_PACKAGE_NAME = syncd-legacy-th +$(DOCKER_SYNCD_LEGACY_TH_BASE)_MACHINE = broadcom-legacy-th +$(DOCKER_SYNCD_LEGACY_TH_BASE)_AFTER = $(DOCKER_CONFIG_ENGINE_TRIXIE) +$(DOCKER_SYNCD_LEGACY_TH_BASE)_CONTAINER_NAME = syncd + +$(DOCKER_SYNCD_LEGACY_TH_BASE)_RUN_OPT += --privileged -t +$(DOCKER_SYNCD_LEGACY_TH_BASE)_RUN_OPT += -v /host/machine.conf:/etc/machine.conf +$(DOCKER_SYNCD_LEGACY_TH_BASE)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro + +$(DOCKER_SYNCD_LEGACY_TH_BASE)_BASE_IMAGE_FILES += bcmcmd:/usr/bin/bcmcmd +$(DOCKER_SYNCD_LEGACY_TH_BASE)_BASE_IMAGE_FILES += bcmsh:/usr/bin/bcmsh +$(DOCKER_SYNCD_LEGACY_TH_BASE)_BASE_IMAGE_FILES += bcm_common:/usr/bin/bcm_common + +SONIC_TRIXIE_DOCKERS += $(DOCKER_SYNCD_LEGACY_TH_BASE) +SONIC_TRIXIE_DBG_DOCKERS += $(DOCKER_SYNCD_LEGACY_TH_BASE_DBG) diff --git a/platform/broadcom/docker-syncd-brcm-legacy-th/Dockerfile.j2 b/platform/broadcom/docker-syncd-brcm-legacy-th/Dockerfile.j2 new file mode 100755 index 00000000000..3fb68c70c85 --- /dev/null +++ b/platform/broadcom/docker-syncd-brcm-legacy-th/Dockerfile.j2 @@ -0,0 +1,38 @@ +{% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files %} +ARG BASE=docker-config-engine-trixie-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} + +FROM $BASE AS base + +ARG docker_container_name + +## Make apt-get non-interactive +ENV DEBIAN_FRONTEND=noninteractive + +RUN apt-get update + +{% if docker_syncd_brcm_legacy_th_debs.strip() -%} +# Copy locally-built Debian package dependencies +{{ copy_files("debs/", docker_syncd_brcm_legacy_th_debs.split(' '), "/debs/") }} + +# Install locally-built Debian packages and implicitly install their dependencies +{{ install_debian_packages(docker_syncd_brcm_legacy_th_debs.split(' ')) }} +{%- endif %} + +## TODO: add kmod into Depends +RUN apt-get install -yf kmod + +## BRCM uses ethtool to set host interface speed +RUN apt-get install -y ethtool + +COPY ["start.sh", "start_led.sh", "bcmsh", "files/rdb-cli", "/usr/bin/"] +RUN chmod +x /usr/bin/rdb-cli + +COPY ["supervisord.conf", "/etc/supervisor/conf.d/"] +COPY ["critical_processes", "/etc/supervisor/"] + +FROM $BASE + +RUN --mount=type=bind,from=base,target=/changes-to-image rsync -axAX --no-D --exclude=/sys --exclude=/proc --exclude=/dev --exclude=resolv.conf /changes-to-image/ / + +ENV DEBIAN_FRONTEND=noninteractive +ENTRYPOINT ["/usr/local/bin/supervisord"] diff --git a/platform/broadcom/docker-syncd-brcm-legacy-th/base_image_files/bcm_common b/platform/broadcom/docker-syncd-brcm-legacy-th/base_image_files/bcm_common new file mode 100644 index 00000000000..1b560a1a152 --- /dev/null +++ b/platform/broadcom/docker-syncd-brcm-legacy-th/base_image_files/bcm_common @@ -0,0 +1,40 @@ +#!/bin/bash + +function help() +{ + echo "Usage: $0 -n [0 to $(($NUM_ASIC-1))]" 1>&2; exit 1; + +} + + +DEV="" + +PLATFORM=`sonic-cfggen -H -v DEVICE_METADATA.localhost.platform` + +# Parse the device specific asic conf file, if it exists + +ASIC_CONF=/usr/share/sonic/device/$PLATFORM/asic.conf +if [ -f "$ASIC_CONF" ]; then + source $ASIC_CONF +fi + + +if [[ ($NUM_ASIC -gt 1) ]]; then + OPTIND=1 + + while getopts ":n:h:" opt; do + case "${opt}" in + h) help + exit 0 + ;; + n) DEV=${OPTARG} + [ $DEV -lt $NUM_ASIC -a $DEV -ge 0 ] || help + ;; + esac + done + shift "$((OPTIND-1))" + + if [ -z "${DEV}" ]; then + help + fi +fi diff --git a/platform/broadcom/docker-syncd-brcm-legacy-th/base_image_files/bcmcmd b/platform/broadcom/docker-syncd-brcm-legacy-th/base_image_files/bcmcmd new file mode 100755 index 00000000000..76362fc6480 --- /dev/null +++ b/platform/broadcom/docker-syncd-brcm-legacy-th/base_image_files/bcmcmd @@ -0,0 +1,8 @@ +#!/bin/bash + +BCM_COMMON=/usr/bin/bcm_common +if [ -f "$BCM_COMMON" ]; then + source $BCM_COMMON +fi +docker exec -i syncd$DEV bcmcmd "$@" + diff --git a/platform/broadcom/docker-syncd-brcm-legacy-th/base_image_files/bcmsh b/platform/broadcom/docker-syncd-brcm-legacy-th/base_image_files/bcmsh new file mode 100755 index 00000000000..3cb2aad7afb --- /dev/null +++ b/platform/broadcom/docker-syncd-brcm-legacy-th/base_image_files/bcmsh @@ -0,0 +1,8 @@ +#!/bin/bash + +BCM_COMMON=/usr/bin/bcm_common +if [ -f "$BCM_COMMON" ]; then + source $BCM_COMMON +fi + +docker exec -it syncd$DEV bcmsh "$@" diff --git a/platform/broadcom/docker-syncd-brcm-legacy-th/bcmsh b/platform/broadcom/docker-syncd-brcm-legacy-th/bcmsh new file mode 100755 index 00000000000..7488e63c64f --- /dev/null +++ b/platform/broadcom/docker-syncd-brcm-legacy-th/bcmsh @@ -0,0 +1,40 @@ +#!/bin/bash +usage="$(basename "$0") [-h] [-q] [-t timeout] -- interactive shell for bcm service + +where: + -h show this help text + -t inactivity timeout in seconds (default 300 seconds, 0 for no timeout) + -q quite, no banner (default: verbose)" + +banner="Press Enter to show prompt. +Press Ctrl+C to exit. +NOTICE: Only one bcmsh or bcmcmd can connect to the shell at same time. +" + +# Default verbose +quiet=false +timeout=300 + +while getopts 'hqt:' option; do + case "$option" in + h) echo "$usage" + exit + ;; + q) quiet=true + ;; + t) timeout=$OPTARG + ;; + \?) printf "illegal option: -%s\n" "$OPTARG" >&2 + echo "$usage" >&2 + exit 1 + ;; + esac +done +shift $((OPTIND - 1)) + +if [ "$quiet" = false ]; then + echo "$banner" +fi + +/usr/bin/socat -T$timeout readline UNIX-CONNECT:/var/run/sswsyncd/sswsyncd.socket + diff --git a/platform/broadcom/docker-syncd-brcm-legacy-th/critical_processes b/platform/broadcom/docker-syncd-brcm-legacy-th/critical_processes new file mode 100644 index 00000000000..d1163a9c304 --- /dev/null +++ b/platform/broadcom/docker-syncd-brcm-legacy-th/critical_processes @@ -0,0 +1,2 @@ +program:dsserve +program:syncd diff --git a/platform/broadcom/docker-syncd-brcm-legacy-th/start.sh b/platform/broadcom/docker-syncd-brcm-legacy-th/start.sh new file mode 100755 index 00000000000..e4a5b2e2c5b --- /dev/null +++ b/platform/broadcom/docker-syncd-brcm-legacy-th/start.sh @@ -0,0 +1,31 @@ +#!/usr/bin/env bash + +HWSKU_DIR=/usr/share/sonic/hwsku + +SYNCD_SOCKET_FILE=/var/run/sswsyncd/sswsyncd.socket + +# Remove stale files if they exist +rm -f ${SYNCD_SOCKET_FILE} + +mkdir -p /etc/sai.d/ + +# There are two ways to specify the contents of the SAI_INIT_CONFIG_FILE and they are mutually exclusive +# via current method (sai.profile.j2) or new method (config.bcm.j2) +# If delta is large, use sai.profile.j2 which basically require the user to select which config file to use +# If delta is small, use config.bcm.j2 where additional SAI INIT config properties are added +# based on specific device metadata requirement +# in this case sai.profile should have been modified to use the path /etc/sai.d/config.bcm +# There is also a possibility that both sai.profile.j2 and config.bcm.j2 are absent. in that cacse just copy +# sai.profile to the new /etc/said directory. + +# Create/Copy the sai.profile to /etc/sai.d/sai.profile +if [ -f $HWSKU_DIR/sai.profile.j2 ]; then + sonic-cfggen -d -t $HWSKU_DIR/sai.profile.j2 > /etc/sai.d/sai.profile +else + if [ -f $HWSKU_DIR/config.bcm.j2 ]; then + sonic-cfggen -d -t $HWSKU_DIR/config.bcm.j2 > /etc/sai.d/config.bcm + fi + if [ -f $HWSKU_DIR/sai.profile ]; then + cp $HWSKU_DIR/sai.profile /etc/sai.d/sai.profile + fi +fi diff --git a/platform/broadcom/docker-syncd-brcm-legacy-th/start_led.sh b/platform/broadcom/docker-syncd-brcm-legacy-th/start_led.sh new file mode 100755 index 00000000000..0b133d6d811 --- /dev/null +++ b/platform/broadcom/docker-syncd-brcm-legacy-th/start_led.sh @@ -0,0 +1,38 @@ +#!/usr/bin/env bash + +PLATFORM_DIR=/usr/share/sonic/platform +SYNCD_SOCKET_FILE=/var/run/sswsyncd/sswsyncd.socket +LED_PROC_INIT_SOC=${PLATFORM_DIR}/led_proc_init.soc + +# Function: wait until syncd has created the socket for bcmcmd to connect to +wait_syncd() { + while true; do + if [ -e ${SYNCD_SOCKET_FILE} ]; then + break + fi + sleep 1 + done + + # wait until bcm sdk is ready to get a request + counter=0 + while true; do + /usr/bin/bcmcmd -t 1 "show unit" | grep BCM >/dev/null 2>&1 + rv=$? + if [ $rv -eq 0 ]; then + break + fi + counter=$((counter+1)) + if [ $counter -ge 60 ]; then + echo "syncd is not ready to take commands after $counter re-tries; Exiting!" + break + fi + sleep 1 + done +} + +# If this platform has an initialization file for the Broadcom LED microprocessor, load it +if [[ -r "$LED_PROC_INIT_SOC" && ! -f /var/warmboot/warm-starting ]]; then + wait_syncd + /usr/bin/bcmcmd -t 60 "rcload $LED_PROC_INIT_SOC" +fi + diff --git a/platform/broadcom/docker-syncd-brcm-legacy-th/supervisord.conf b/platform/broadcom/docker-syncd-brcm-legacy-th/supervisord.conf new file mode 100644 index 00000000000..0681912ba88 --- /dev/null +++ b/platform/broadcom/docker-syncd-brcm-legacy-th/supervisord.conf @@ -0,0 +1,69 @@ +[supervisord] +logfile_maxbytes=1MB +logfile_backups=2 +nodaemon=true + +[eventlistener:dependent-startup] +command=python3 -m supervisord_dependent_startup +autostart=true +autorestart=unexpected +startretries=0 +exitcodes=0,3 +events=PROCESS_STATE +buffer_size=1024 + +[eventlistener:supervisor-proc-exit-listener] +command=/usr/bin/supervisor-proc-exit-listener-rs --container-name syncd +events=PROCESS_STATE_EXITED,PROCESS_STATE_RUNNING,PROCESS_STATE_FATAL +autostart=true +autorestart=unexpected +buffer_size=1024 + +[program:rsyslogd] +command=/usr/sbin/rsyslogd -n -iNONE +priority=1 +autostart=false +autorestart=unexpected +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true +dependent_startup=true + +[program:start] +command=/usr/bin/start.sh +priority=2 +autostart=false +autorestart=false +startsecs=0 +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true +dependent_startup=true +dependent_startup_wait_for=rsyslogd:running + +[program:syncd] +command=/usr/bin/syncd_start.sh +priority=3 +autostart=false +autorestart=false +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true +dependent_startup=true +dependent_startup_wait_for=start:exited + +[program:ledinit] +command=/usr/bin/start_led.sh +priority=4 +autostart=false +autorestart=false +startsecs=0 +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true +dependent_startup=true +dependent_startup_wait_for=syncd:running diff --git a/platform/broadcom/docker-syncd-brcm-rpc.mk b/platform/broadcom/docker-syncd-brcm-rpc.mk index 935eed23f45..75877dc966d 100644 --- a/platform/broadcom/docker-syncd-brcm-rpc.mk +++ b/platform/broadcom/docker-syncd-brcm-rpc.mk @@ -22,7 +22,6 @@ $(DOCKER_SYNCD_BRCM_RPC)_VERSION = 1.0.0+rpc $(DOCKER_SYNCD_BRCM_RPC)_PACKAGE_NAME = syncd $(DOCKER_SYNCD_BRCM_RPC)_RUN_OPT += --privileged -t $(DOCKER_SYNCD_BRCM_RPC)_RUN_OPT += -v /host/machine.conf:/etc/machine.conf -$(DOCKER_SYNCD_BRCM_RPC)_RUN_OPT += -v /host/warmboot:/var/warmboot $(DOCKER_SYNCD_BRCM_RPC)_RUN_OPT += -v /var/run/docker-syncd:/var/run/sswsyncd $(DOCKER_SYNCD_BRCM_RPC)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro @@ -30,4 +29,4 @@ $(DOCKER_SYNCD_BRCM_RPC)_BASE_IMAGE_FILES += bcmcmd:/usr/bin/bcmcmd $(DOCKER_SYNCD_BRCM_RPC)_BASE_IMAGE_FILES += bcmsh:/usr/bin/bcmsh $(DOCKER_SYNCD_BRCM_RPC)_MACHINE = broadcom -SONIC_BOOKWORM_DOCKERS += $(DOCKER_SYNCD_BRCM_RPC) +SONIC_TRIXIE_DOCKERS += $(DOCKER_SYNCD_BRCM_RPC) diff --git a/platform/broadcom/docker-syncd-brcm-rpc/Dockerfile.j2 b/platform/broadcom/docker-syncd-brcm-rpc/Dockerfile.j2 index faeacc39d63..183be767bbc 100644 --- a/platform/broadcom/docker-syncd-brcm-rpc/Dockerfile.j2 +++ b/platform/broadcom/docker-syncd-brcm-rpc/Dockerfile.j2 @@ -22,7 +22,7 @@ RUN apt-get update \ wget \ cmake \ libnanomsg-dev \ - libthrift-0.17.0 + libthrift-0.19.0t64 {% if docker_syncd_brcm_rpc_debs.strip() -%} # Copy locally-built Debian package dependencies diff --git a/platform/broadcom/docker-syncd-brcm.mk b/platform/broadcom/docker-syncd-brcm.mk index 8ae78a6bf30..42862cc870c 100644 --- a/platform/broadcom/docker-syncd-brcm.mk +++ b/platform/broadcom/docker-syncd-brcm.mk @@ -1,7 +1,8 @@ # docker image for brcm syncd DOCKER_SYNCD_PLATFORM_CODE = brcm -include $(PLATFORM_PATH)/../template/docker-syncd-bookworm.mk + +include $(PLATFORM_PATH)/../template/docker-syncd-trixie.mk $(DOCKER_SYNCD_BASE)_DEPENDS += $(SYNCD) $(DOCKER_SYNCD_BASE)_DEPENDS += $(BRCM_XGS_SAI) @@ -17,7 +18,6 @@ $(DOCKER_SYNCD_BASE)_VERSION = 1.0.0 $(DOCKER_SYNCD_BASE)_PACKAGE_NAME = syncd $(DOCKER_SYNCD_BASE)_MACHINE = broadcom -$(DOCKER_SYNCD_BASE)_RUN_OPT += -v /host/warmboot:/var/warmboot $(DOCKER_SYNCD_BASE)_RUN_OPT += -v /usr/share/sonic/device/x86_64-broadcom_common:/usr/share/sonic/device/x86_64-broadcom_common:ro $(DOCKER_SYNCD_BASE)_BASE_IMAGE_FILES += bcmcmd:/usr/bin/bcmcmd diff --git a/platform/broadcom/docker-syncd-brcm/Dockerfile.j2 b/platform/broadcom/docker-syncd-brcm/Dockerfile.j2 index bde3d59fc1e..b62d3210474 100755 --- a/platform/broadcom/docker-syncd-brcm/Dockerfile.j2 +++ b/platform/broadcom/docker-syncd-brcm/Dockerfile.j2 @@ -1,5 +1,5 @@ -{% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files %} -ARG BASE=docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} +{% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files, rsync_from_builder_stage %} +ARG BASE=docker-config-engine-trixie-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} FROM $BASE AS base @@ -32,7 +32,7 @@ COPY ["critical_processes", "/etc/supervisor/"] FROM $BASE -RUN --mount=type=bind,from=base,target=/changes-to-image rsync -axAX --no-D --exclude=/sys --exclude=/proc --exclude=/dev --exclude=resolv.conf /changes-to-image/ / +{{ rsync_from_builder_stage() }} ENV DEBIAN_FRONTEND=noninteractive ENTRYPOINT ["/usr/local/bin/supervisord"] diff --git a/platform/broadcom/docker-syncd-brcm/supervisord.conf b/platform/broadcom/docker-syncd-brcm/supervisord.conf index c470399cce5..0681912ba88 100644 --- a/platform/broadcom/docker-syncd-brcm/supervisord.conf +++ b/platform/broadcom/docker-syncd-brcm/supervisord.conf @@ -14,7 +14,7 @@ buffer_size=1024 [eventlistener:supervisor-proc-exit-listener] command=/usr/bin/supervisor-proc-exit-listener-rs --container-name syncd -events=PROCESS_STATE_EXITED,PROCESS_STATE_RUNNING +events=PROCESS_STATE_EXITED,PROCESS_STATE_RUNNING,PROCESS_STATE_FATAL autostart=true autorestart=unexpected buffer_size=1024 diff --git a/platform/broadcom/one-aboot.mk b/platform/broadcom/one-aboot.mk index 2f2fdae389f..20ff4120de1 100644 --- a/platform/broadcom/one-aboot.mk +++ b/platform/broadcom/one-aboot.mk @@ -2,14 +2,14 @@ SONIC_ONE_ABOOT_IMAGE = sonic-aboot-broadcom.swi $(SONIC_ONE_ABOOT_IMAGE)_MACHINE = broadcom -$(SONIC_ONE_ABOOT_IMAGE)_DEPENDENT_MACHINE = broadcom-dnx +$(SONIC_ONE_ABOOT_IMAGE)_DEPENDENT_MACHINE = broadcom-dnx broadcom-legacy-th $(SONIC_ONE_ABOOT_IMAGE)_IMAGE_TYPE = aboot ifeq ($(INCLUDE_GBSYNCD), y) $(SONIC_ONE_ABOOT_IMAGE)_INSTALLS += $(PHY_CREDO) endif $(SONIC_ONE_ABOOT_IMAGE)_INSTALLS += $(FLASHROM) $(SONIC_ONE_ABOOT_IMAGE)_INSTALLS += $(SYSTEMD_SONIC_GENERATOR) -$(SONIC_ONE_ABOOT_IMAGE)_LAZY_BUILD_INSTALLS = $(BRCM_OPENNSL_KERNEL) $(BRCM_DNX_OPENNSL_KERNEL) +$(SONIC_ONE_ABOOT_IMAGE)_LAZY_BUILD_INSTALLS = $(BRCM_OPENNSL_KERNEL) $(BRCM_DNX_OPENNSL_KERNEL) $(BRCM_LEGACY_TH_OPENNSL_KERNEL) $(SONIC_ONE_ABOOT_IMAGE)_INSTALLS += $(ARISTA_PLATFORM_MODULE_PYTHON3) \ $(ARISTA_PLATFORM_MODULE_DRIVERS) \ $(ARISTA_PLATFORM_MODULE_LIBS) \ @@ -17,6 +17,9 @@ $(SONIC_ONE_ABOOT_IMAGE)_INSTALLS += $(ARISTA_PLATFORM_MODULE_PYTHON3) \ ifeq ($(INSTALL_ARISTA_FWUTIL),y) $(SONIC_ONE_ABOOT_IMAGE)_INSTALLS += $(ARISTA_FWUTIL) endif +ifeq ($(INSTALL_ARISTA_FIRMWARE),y) +$(SONIC_ONE_ABOOT_IMAGE)_INSTALLS += $(ARISTA_FIRMWARE) +endif ifeq ($(INSTALL_DEBUG_TOOLS),y) $(SONIC_ONE_ABOOT_IMAGE)_DOCKERS += $(SONIC_INSTALL_DOCKER_DBG_IMAGES) $(SONIC_ONE_ABOOT_IMAGE)_DOCKERS += $(filter-out $(patsubst %-$(DBG_IMAGE_MARK).gz,%.gz, $(SONIC_INSTALL_DOCKER_DBG_IMAGES)), $(SONIC_INSTALL_DOCKER_IMAGES)) diff --git a/platform/broadcom/one-image.mk b/platform/broadcom/one-image.mk index 851c62f2527..287ceedb0e1 100755 --- a/platform/broadcom/one-image.mk +++ b/platform/broadcom/one-image.mk @@ -2,12 +2,14 @@ SONIC_ONE_IMAGE = sonic-broadcom.bin $(SONIC_ONE_IMAGE)_MACHINE = broadcom -$(SONIC_ONE_IMAGE)_DEPENDENT_MACHINE = broadcom-dnx +$(SONIC_ONE_IMAGE)_DEPENDENT_MACHINE = broadcom-dnx broadcom-legacy-th $(SONIC_ONE_IMAGE)_IMAGE_TYPE = onie $(SONIC_ONE_IMAGE)_INSTALLS += $(PDDF_PLATFORM_MODULE) $(SONIC_ONE_IMAGE)_INSTALLS += $(SYSTEMD_SONIC_GENERATOR) $(SONIC_ONE_IMAGE)_INSTALLS += $(FLASHROM) -$(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(DELL_S6000_PLATFORM_MODULE) \ +$(SONIC_ONE_IMAGE)_LAZY_INSTALLS += \ + $(ARISTA_PLATFORM_MODULE_ALL) \ + $(DELL_S6000_PLATFORM_MODULE) \ $(DELL_Z9264F_PLATFORM_MODULE) \ $(DELL_S5212F_PLATFORM_MODULE) \ $(DELL_S5224F_PLATFORM_MODULE) \ @@ -22,7 +24,9 @@ $(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(DELL_S6000_PLATFORM_MODULE) \ $(DELL_N3248PXE_PLATFORM_MODULE) \ $(DELL_N3248TE_PLATFORM_MODULE) \ $(DELL_E3224F_PLATFORM_MODULE) \ - $(DELL_Z9664F_PLATFORM_MODULE) \ + $(DELL_S3248T_PLATFORM_MODULE) \ + $(DELL_Z9664F_PLATFORM_MODULE) \ + $(DELL_Z9864F_PLATFORM_MODULE) \ $(INGRASYS_S8900_54XC_PLATFORM_MODULE) \ $(INGRASYS_S8900_64XC_PLATFORM_MODULE) \ $(INGRASYS_S9100_PLATFORM_MODULE) \ @@ -94,6 +98,7 @@ $(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(DELL_S6000_PLATFORM_MODULE) \ $(NOKIA_IXR7220H5_64D_PLATFORM_MODULE) \ $(NOKIA_IXR7220H5_32D_PLATFORM_MODULE) \ $(NOKIA_IXR7220H6_64_PLATFORM_MODULE) \ + $(NOKIA_IXR7220H6_128_PLATFORM_MODULE) \ $(NOKIA_IXR7250X1B_PLATFORM_MODULE) \ $(NOKIA_IXR7250X3B_PLATFORM_MODULE) \ $(NOKIA_IXR7250X4_PLATFORM_MODULE) \ @@ -115,6 +120,8 @@ $(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(DELL_S6000_PLATFORM_MODULE) \ $(NEXTHOP_4010_R0_PLATFORM_MODULE) \ $(NEXTHOP_4010_R1_PLATFORM_MODULE) \ $(NEXTHOP_4020_R0_PLATFORM_MODULE) \ + $(NEXTHOP_4210_PLATFORM_MODULE) \ + $(NEXTHOP_4210_R0021_PLATFORM_MODULE) \ $(NEXTHOP_4220_PLATFORM_MODULE) \ $(NEXTHOP_4220_R0_PLATFORM_MODULE) \ $(NEXTHOP_5010_PLATFORM_MODULE) \ @@ -128,9 +135,20 @@ $(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(DELL_S6000_PLATFORM_MODULE) \ $(MICAS_M2_W6920_32QC2X_PLATFORM_MODULE) \ $(MICAS_M2_W6510_32C_PLATFORM_MODULE) \ $(MICAS_M2_W6520_48C8QC_PLATFORM_MODULE) \ + $(MICAS_M2_W6940_128X1_FR4_PLATFORM_MODULE) \ + $(MICAS_M2_W6950_128OC_PLATFORM_MODULE) \ + $(MICAS_M2_W6951_64HC_CP_PLATFORM_MODULE) \ $(SMCI_SSE_T8164_PLATFORM_MODULE) \ $(SMCI_SSE_T8196_PLATFORM_MODULE) +ifeq ($(INSTALL_ARISTA_FWUTIL),y) +$(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(ARISTA_FWUTIL) +endif + +ifeq ($(INSTALL_ARISTA_FIRMWARE),y) +$(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(ARISTA_FIRMWARE) +endif + $(SONIC_ONE_IMAGE)_LAZY_BUILD_INSTALLS = $(BRCM_OPENNSL_KERNEL) $(BRCM_DNX_OPENNSL_KERNEL) ifeq ($(INSTALL_DEBUG_TOOLS),y) $(SONIC_ONE_IMAGE)_DOCKERS += $(SONIC_INSTALL_DOCKER_DBG_IMAGES) diff --git a/platform/broadcom/platform-modules-arista.mk b/platform/broadcom/platform-modules-arista.mk index 44224596e49..6d0c3340288 100644 --- a/platform/broadcom/platform-modules-arista.mk +++ b/platform/broadcom/platform-modules-arista.mk @@ -4,11 +4,21 @@ ARISTA_PLATFORM_MODULE_VERSION = 1.0 export ARISTA_PLATFORM_MODULE_VERSION +ARISTA_PLATFORMS = $(subst device/arista/,, $(wildcard device/arista/x86_64-arista_[0-9]*)) + +export ARISTA_PLATFORMS + ARISTA_PLATFORM_MODULE = sonic-platform-arista_$(ARISTA_PLATFORM_MODULE_VERSION)_amd64.deb $(ARISTA_PLATFORM_MODULE)_SRC_PATH = $(PLATFORM_PATH)/sonic-platform-modules-arista $(ARISTA_PLATFORM_MODULE)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON) SONIC_DPKG_DEBS += $(ARISTA_PLATFORM_MODULE) +ARISTA_PLATFORM_MODULE_ALL = sonic-platform-arista-all_$(ARISTA_PLATFORM_MODULE_VERSION)_amd64.deb +$(ARISTA_PLATFORM_MODULE_ALL)_SRC_PATH = $(PLATFORM_PATH)/sonic-platform-modules-arista +$(ARISTA_PLATFORM_MODULE_ALL)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON) +$(ARISTA_PLATFORM_MODULE_ALL)_PLATFORM = $(ARISTA_PLATFORMS) +SONIC_DPKG_DEBS += $(ARISTA_PLATFORM_MODULE_ALL) + ARISTA_PLATFORM_MODULE_PYTHON3 = python3-sonic-platform-arista_$(ARISTA_PLATFORM_MODULE_VERSION)_all.deb $(eval $(call add_extra_package,$(ARISTA_PLATFORM_MODULE),$(ARISTA_PLATFORM_MODULE_PYTHON3))) @@ -19,13 +29,15 @@ ARISTA_PLATFORM_MODULE_LIBS = sonic-platform-arista-libs_$(ARISTA_PLATFORM_MODUL $(eval $(call add_extra_package,$(ARISTA_PLATFORM_MODULE),$(ARISTA_PLATFORM_MODULE_LIBS))) export ARISTA_PLATFORM_MODULE \ + ARISTA_PLATFORM_MODULE_ALL \ ARISTA_PLATFORM_MODULE_PYTHON3 \ ARISTA_PLATFORM_MODULE_DRIVERS \ ARISTA_PLATFORM_MODULE_LIBS -ARISTA_FWUTIL_VERSION = 202511.1 +ARISTA_FWUTIL_VERSION = 202511.4 ARISTA_FWUTIL = arista-fwutil_$(ARISTA_FWUTIL_VERSION)_amd64.deb $(ARISTA_FWUTIL)_PATH = $(PLATFORM_PATH)/extra-debs +$(ARISTA_FWUTIL)_PLATFORM = $(ARISTA_PLATFORMS) #Install fwutil package if it exists ifneq (,$(wildcard $($(ARISTA_FWUTIL)_PATH)/$(ARISTA_FWUTIL))) @@ -33,3 +45,14 @@ SONIC_COPY_DEBS += $(ARISTA_FWUTIL) INSTALL_ARISTA_FWUTIL = y endif +ARISTA_FIRMWARE_VERSION = 202511.1 +ARISTA_FIRMWARE = arista-firmware_$(ARISTA_FIRMWARE_VERSION)_all.deb +$(ARISTA_FIRMWARE)_PATH = $(PLATFORM_PATH)/extra-debs +$(ARISTA_FIRMWARE)_PLATFORM = $(ARISTA_PLATFORMS) + +#Install firmware package if it exists +ifneq (,$(wildcard $($(ARISTA_FIRMWARE)_PATH)/$(ARISTA_FIRMWARE))) +SONIC_COPY_DEBS += $(ARISTA_FIRMWARE) +INSTALL_ARISTA_FIRMWARE = y +endif + diff --git a/platform/broadcom/platform-modules-dell.mk b/platform/broadcom/platform-modules-dell.mk index f38ce3f55e5..f4c96e9d42d 100644 --- a/platform/broadcom/platform-modules-dell.mk +++ b/platform/broadcom/platform-modules-dell.mk @@ -1,4 +1,4 @@ -# Dell S6000,Z9100, S6100, Z9264F , S5232F,Z9332F, Z9664F Platform modules +# Dell S6000, Z9100, S6100, Z9264F, S5232F, Z9332F, Z9664F, S3248T Platform modules DELL_S6000_PLATFORM_MODULE_VERSION = 1.1 DELL_Z9100_PLATFORM_MODULE_VERSION = 1.1 @@ -16,6 +16,8 @@ DELL_N3248PXE_PLATFORM_MODULE_VERSION = 1.1 DELL_N3248TE_PLATFORM_MODULE_VERSION = 1.1 DELL_E3224F_PLATFORM_MODULE_VERSION = 1.1 DELL_Z9664F_PLATFORM_MODULE_VERSION= 1.1 +DELL_S3248T_PLATFORM_MODULE_VERSION= 1.1 +DELL_Z9864F_PLATFORM_MODULE_VERSION= 1.1 export DELL_S6000_PLATFORM_MODULE_VERSION export DELL_Z9100_PLATFORM_MODULE_VERSION @@ -33,6 +35,8 @@ export DELL_N3248PXE_PLATFORM_MODULE_VERSION export DELL_N3248TE_PLATFORM_MODULE_VERSION export DELL_E3224F_PLATFORM_MODULE_VERSION export DELL_Z9664F_PLATFORM_MODULE_VERSION +export DELL_S3248T_PLATFORM_MODULE_VERSION +export DELL_Z9864F_PLATFORM_MODULE_VERSION DELL_Z9100_PLATFORM_MODULE = platform-modules-z9100_$(DELL_Z9100_PLATFORM_MODULE_VERSION)_amd64.deb $(DELL_Z9100_PLATFORM_MODULE)_SRC_PATH = $(PLATFORM_PATH)/sonic-platform-modules-dell @@ -100,3 +104,11 @@ $(eval $(call add_extra_package,$(DELL_Z9100_PLATFORM_MODULE),$(DELL_N3248PXE_PL DELL_Z9664F_PLATFORM_MODULE = platform-modules-z9664f_$(DELL_Z9664F_PLATFORM_MODULE_VERSION)_amd64.deb $(DELL_Z9664F_PLATFORM_MODULE)_PLATFORM = x86_64-dell_z9664f-r0 $(eval $(call add_extra_package,$(DELL_Z9100_PLATFORM_MODULE),$(DELL_Z9664F_PLATFORM_MODULE))) + +DELL_S3248T_PLATFORM_MODULE = platform-modules-s3248t_$(DELL_S3248T_PLATFORM_MODULE_VERSION)_amd64.deb +$(DELL_S3248T_PLATFORM_MODULE)_PLATFORM = x86_64-dell_s3248t-r0 +$(eval $(call add_extra_package,$(DELL_Z9100_PLATFORM_MODULE),$(DELL_S3248T_PLATFORM_MODULE))) + +DELL_Z9864F_PLATFORM_MODULE = platform-modules-z9864f_$(DELL_Z9864F_PLATFORM_MODULE_VERSION)_amd64.deb +$(DELL_Z9864F_PLATFORM_MODULE)_PLATFORM = x86_64-dell_z9864f-r0 +$(eval $(call add_extra_package,$(DELL_Z9100_PLATFORM_MODULE),$(DELL_Z9864F_PLATFORM_MODULE))) diff --git a/platform/broadcom/platform-modules-micas.mk b/platform/broadcom/platform-modules-micas.mk index 220b9a6ac08..85bd9ca95d1 100644 --- a/platform/broadcom/platform-modules-micas.mk +++ b/platform/broadcom/platform-modules-micas.mk @@ -72,3 +72,28 @@ export MICAS_M2_W6520_48C8QC_PLATFORM_MODULE_VERSION MICAS_M2_W6520_48C8QC_PLATFORM_MODULE = platform-modules-micas-m2-w6520-48c8qc_$(MICAS_M2_W6520_48C8QC_PLATFORM_MODULE_VERSION)_amd64.deb $(MICAS_M2_W6520_48C8QC_PLATFORM_MODULE)_PLATFORM = x86_64-micas_m2-w6520-48c8qc-r0 $(eval $(call add_extra_package,$(MICAS_M2_W6510_48V8C_PLATFORM_MODULE),$(MICAS_M2_W6520_48C8QC_PLATFORM_MODULE))) + +## M2-W6940-128X1-FR4 +MICAS_M2_W6940_128X1_FR4_PLATFORM_MODULE_VERSION = 1.0 +export MICAS_M2_W6940_128X1_FR4_PLATFORM_MODULE_VERSION + +MICAS_M2_W6940_128X1_FR4_PLATFORM_MODULE = platform-modules-micas-m2-w6940-128x1-fr4_$(MICAS_M2_W6940_128X1_FR4_PLATFORM_MODULE_VERSION)_amd64.deb +$(MICAS_M2_W6940_128X1_FR4_PLATFORM_MODULE)_PLATFORM = x86_64-micas_m2-w6940-128x1-fr4-r0 +$(eval $(call add_extra_package,$(MICAS_M2_W6510_48V8C_PLATFORM_MODULE),$(MICAS_M2_W6940_128X1_FR4_PLATFORM_MODULE))) + +## M2-W6950-128OC +MICAS_M2_W6950_128OC_PLATFORM_MODULE_VERSION = 1.0 +export MICAS_M2_W6950_128OC_PLATFORM_MODULE_VERSION + +MICAS_M2_W6950_128OC_PLATFORM_MODULE = platform-modules-micas-m2-w6950-128oc_$(MICAS_M2_W6950_128OC_PLATFORM_MODULE_VERSION)_amd64.deb +$(MICAS_M2_W6950_128OC_PLATFORM_MODULE)_PLATFORM = x86_64-micas_m2-w6950-128oc-r0 +$(eval $(call add_extra_package,$(MICAS_M2_W6510_48V8C_PLATFORM_MODULE),$(MICAS_M2_W6950_128OC_PLATFORM_MODULE))) + +## M2-W6951-64HC-CP +MICAS_M2_W6951_64HC_CP_PLATFORM_MODULE_VERSION = 1.0 +export MICAS_M2_W6951_64HC_CP_PLATFORM_MODULE_VERSION + +MICAS_M2_W6951_64HC_CP_PLATFORM_MODULE = platform-modules-micas-m2-w6951-64hc-cp_$(MICAS_M2_W6951_64HC_CP_PLATFORM_MODULE_VERSION)_amd64.deb +$(MICAS_M2_W6951_64HC_CP_PLATFORM_MODULE)_PLATFORM = x86_64-micas_m2-w6951-64hc-cp-r0 +$(eval $(call add_extra_package,$(MICAS_M2_W6510_48V8C_PLATFORM_MODULE),$(MICAS_M2_W6951_64HC_CP_PLATFORM_MODULE))) + diff --git a/platform/broadcom/platform-modules-nexthop.mk b/platform/broadcom/platform-modules-nexthop.mk index e6dfb8d8e70..6c65d71bb13 100644 --- a/platform/broadcom/platform-modules-nexthop.mk +++ b/platform/broadcom/platform-modules-nexthop.mk @@ -31,6 +31,15 @@ NEXTHOP_4020_R0_PLATFORM_MODULE = sonic-platform-nexthop-4020-r0_1.0_amd64.deb $(NEXTHOP_4020_R0_PLATFORM_MODULE)_PLATFORM = x86_64-nexthop_4020-r0 $(eval $(call add_extra_package,$(NEXTHOP_COMMON_PLATFORM_MODULE),$(NEXTHOP_4020_R0_PLATFORM_MODULE))) +# NH-4210 +NEXTHOP_4210_PLATFORM_MODULE = sonic-platform-nexthop-4210_1.0_amd64.deb +$(NEXTHOP_4210_PLATFORM_MODULE)_PLATFORM = nexthop-4210 +$(eval $(call add_extra_package,$(NEXTHOP_COMMON_PLATFORM_MODULE),$(NEXTHOP_4210_PLATFORM_MODULE))) + +NEXTHOP_4210_R0021_PLATFORM_MODULE = sonic-platform-nexthop-4210-r0021_1.0_amd64.deb +$(NEXTHOP_4210_R0021_PLATFORM_MODULE)_PLATFORM = x86_64-nexthop_4210-r0021 +$(eval $(call add_extra_package,$(NEXTHOP_COMMON_PLATFORM_MODULE),$(NEXTHOP_4210_R0021_PLATFORM_MODULE))) + # NH-4220 NEXTHOP_4220_PLATFORM_MODULE = sonic-platform-nexthop-4220_1.0_amd64.deb $(NEXTHOP_4220_PLATFORM_MODULE)_PLATFORM = nexthop-4220 diff --git a/platform/broadcom/platform-modules-nokia.mk b/platform/broadcom/platform-modules-nokia.mk index c60aa53461e..91a96f5166d 100644 --- a/platform/broadcom/platform-modules-nokia.mk +++ b/platform/broadcom/platform-modules-nokia.mk @@ -9,6 +9,7 @@ NOKIA_IXR7220H5_64D_PLATFORM_MODULE_VERSION = 1.0 NOKIA_IXR7220H5_64O_PLATFORM_MODULE_VERSION = 1.0 NOKIA_IXR7220H5_32D_PLATFORM_MODULE_VERSION = 1.0 NOKIA_IXR7220H6_64_PLATFORM_MODULE_VERSION = 1.0 +NOKIA_IXR7220H6_128_PLATFORM_MODULE_VERSION = 1.0 export NOKIA_IXR7250_PLATFORM_MODULE_VERSION export NOKIA_IXR7220D4_PLATFORM_MODULE_VERSION @@ -19,6 +20,7 @@ export NOKIA_IXR7220H5_64D_PLATFORM_MODULE_VERSION export NOKIA_IXR7220H5_64O_PLATFORM_MODULE_VERSION export NOKIA_IXR7220H5_32D_PLATFORM_MODULE_VERSION export NOKIA_IXR7220H6_64_PLATFORM_MODULE_VERSION +export NOKIA_IXR7220H6_128_PLATFORM_MODULE_VERSION NOKIA_IXR7250_PLATFORM_MODULE = sonic-platform-nokia-chassis_$(NOKIA_IXR7250_PLATFORM_MODULE_VERSION)_amd64.deb $(NOKIA_IXR7250_PLATFORM_MODULE)_SRC_PATH = $(PLATFORM_PATH)/sonic-platform-modules-nokia @@ -80,4 +82,9 @@ $(eval $(call add_extra_package,$(NOKIA_IXR7250_PLATFORM_MODULE),$(NOKIA_IXR7250 NOKIA_IXR7220H6_64_PLATFORM_MODULE = sonic-platform-nokia-ixr7220h6-64_$(NOKIA_IXR7220H6_64_PLATFORM_MODULE_VERSION)_amd64.deb $(NOKIA_IXR7220H6_64_PLATFORM_MODULE)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON) $(NOKIA_IXR7220H6_64_PLATFORM_MODULE)_PLATFORM = x86_64-nokia_ixr7220_h6_64-r0 -$(eval $(call add_extra_package,$(NOKIA_IXR7250_PLATFORM_MODULE),$(NOKIA_IXR7220H6_64_PLATFORM_MODULE))) \ No newline at end of file +$(eval $(call add_extra_package,$(NOKIA_IXR7250_PLATFORM_MODULE),$(NOKIA_IXR7220H6_64_PLATFORM_MODULE))) + +NOKIA_IXR7220H6_128_PLATFORM_MODULE = sonic-platform-nokia-ixr7220h6-128_$(NOKIA_IXR7220H6_128_PLATFORM_MODULE_VERSION)_amd64.deb +$(NOKIA_IXR7220H6_128_PLATFORM_MODULE)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON) +$(NOKIA_IXR7220H6_128_PLATFORM_MODULE)_PLATFORM = x86_64-nokia_ixr7220_h6_128-r0 +$(eval $(call add_extra_package,$(NOKIA_IXR7250_PLATFORM_MODULE),$(NOKIA_IXR7220H6_128_PLATFORM_MODULE))) diff --git a/platform/broadcom/rules.dep b/platform/broadcom/rules.dep index 806f8d50e03..5662eb499e3 100644 --- a/platform/broadcom/rules.dep +++ b/platform/broadcom/rules.dep @@ -6,7 +6,7 @@ include $(PLATFORM_PATH)/platform-modules-dell.dep include $(PLATFORM_PATH)/platform-modules-arista.dep include $(PLATFORM_PATH)/platform-modules-nexthop.dep #include $(PLATFORM_PATH)/platform-modules-ingrasys.dep -#include $(PLATFORM_PATH)/platform-modules-accton.dep +include $(PLATFORM_PATH)/platform-modules-accton.dep #include $(PLATFORM_PATH)/platform-modules-alphanetworks.dep #include $(PLATFORM_PATH)/platform-modules-inventec.dep include $(PLATFORM_PATH)/platform-modules-cel.dep @@ -19,9 +19,11 @@ include $(PLATFORM_PATH)/platform-modules-cel.dep #include $(PLATFORM_PATH)/platform-modules-ragile.dep include $(PLATFORM_PATH)/platform-modules-supermicro.dep include $(PLATFORM_PATH)/platform-modules-ufispace.dep -#include $(PLATFORM_PATH)/platform-modules-micas.dep +include $(PLATFORM_PATH)/platform-modules-micas.dep include $(PLATFORM_PATH)/docker-syncd-brcm.dep include $(PLATFORM_PATH)/docker-syncd-brcm-rpc.dep +include $(PLATFORM_PATH)/docker-syncd-brcm-legacy-th.dep +include $(PLATFORM_PATH)/docker-syncd-brcm-legacy-th-rpc.dep include $(PLATFORM_PATH)/docker-saiserver-brcm.dep include $(PLATFORM_PATH)/sswsyncd.dep ifeq ($(INCLUDE_PDE), y) diff --git a/platform/broadcom/rules.mk b/platform/broadcom/rules.mk old mode 100755 new mode 100644 index 26f24cb56c9..4cf165cc83d --- a/platform/broadcom/rules.mk +++ b/platform/broadcom/rules.mk @@ -1,6 +1,7 @@ include $(PLATFORM_PATH)/sai-modules.mk include $(PLATFORM_PATH)/sai-xgs.mk include $(PLATFORM_PATH)/sai-dnx.mk +include $(PLATFORM_PATH)/sai-legacy-th.mk include $(PLATFORM_PATH)/sswsyncd.mk # TODO(trixie): re-enable modules after updating for Trixie include $(PLATFORM_PATH)/platform-modules-nokia.mk @@ -8,7 +9,7 @@ include $(PLATFORM_PATH)/platform-modules-dell.mk include $(PLATFORM_PATH)/platform-modules-arista.mk include $(PLATFORM_PATH)/platform-modules-nexthop.mk #include $(PLATFORM_PATH)/platform-modules-ingrasys.mk -#include $(PLATFORM_PATH)/platform-modules-accton.mk +include $(PLATFORM_PATH)/platform-modules-accton.mk #include $(PLATFORM_PATH)/platform-modules-alphanetworks.mk #include $(PLATFORM_PATH)/platform-modules-inventec.mk include $(PLATFORM_PATH)/platform-modules-cel.mk @@ -22,10 +23,12 @@ include $(PLATFORM_PATH)/platform-modules-cel.mk include $(PLATFORM_PATH)/platform-modules-supermicro.mk #include $(PLATFORM_PATH)/platform-modules-tencent.mk include $(PLATFORM_PATH)/platform-modules-ufispace.mk -#include $(PLATFORM_PATH)/platform-modules-micas.mk +include $(PLATFORM_PATH)/platform-modules-micas.mk include $(PLATFORM_PATH)/docker-syncd-brcm.mk include $(PLATFORM_PATH)/docker-syncd-brcm-rpc.mk include $(PLATFORM_PATH)/docker-saiserver-brcm.mk +include $(PLATFORM_PATH)/docker-syncd-brcm-legacy-th.mk +include $(PLATFORM_PATH)/docker-syncd-brcm-legacy-th-rpc.mk ifeq ($(INCLUDE_PDE), y) include $(PLATFORM_PATH)/docker-pde.mk include $(PLATFORM_PATH)/sonic-pde-tests.mk @@ -44,10 +47,10 @@ include $(PLATFORM_PATH)/../components/docker-gbsyncd-milleniob.mk endif BCMCMD = bcmcmd -$(BCMCMD)_URL = "https://packages.trafficmanager.net/public/20190307/bcmcmd" +$(BCMCMD)_URL = "$(BUILD_PUBLIC_URL)/20190307/bcmcmd" DSSERVE = dsserve -$(DSSERVE)_URL = "https://packages.trafficmanager.net/public/20190307/dsserve" +$(DSSERVE)_URL = "$(BUILD_PUBLIC_URL)/20190307/dsserve" SONIC_ONLINE_FILES += $(BCMCMD) $(DSSERVE) diff --git a/platform/broadcom/sai-dnx.mk b/platform/broadcom/sai-dnx.mk index 2717d2eea03..58894fb045c 100644 --- a/platform/broadcom/sai-dnx.mk +++ b/platform/broadcom/sai-dnx.mk @@ -1,8 +1,8 @@ # Broadcom DNX SAI definitions -LIBSAIBCM_DNX_VERSION = 14.1.0.1.0.0.5.0 +LIBSAIBCM_DNX_VERSION = 14.1.0.1.0.0.27.0 LIBSAIBCM_DNX_BRANCH_NAME = SAI_14.1.0_GA -LIBSAIBCM_DNX_URL_PREFIX = "https://packages.trafficmanager.net/public/sai/sai-broadcom/$(LIBSAIBCM_DNX_BRANCH_NAME)/$(LIBSAIBCM_DNX_VERSION)/dnx" +LIBSAIBCM_DNX_URL_PREFIX = "$(BUILD_PUBLIC_URL)/sai/sai-broadcom/$(LIBSAIBCM_DNX_BRANCH_NAME)/$(LIBSAIBCM_DNX_VERSION)/dnx" # SAI module for DNX Asic family BRCM_DNX_SAI = libsaibcm_dnx_$(LIBSAIBCM_DNX_VERSION)_amd64.deb diff --git a/platform/broadcom/sai-legacy-th.mk b/platform/broadcom/sai-legacy-th.mk new file mode 100644 index 00000000000..bd40f7691f0 --- /dev/null +++ b/platform/broadcom/sai-legacy-th.mk @@ -0,0 +1,15 @@ +# Broadcom LEGACY-TH SAI definitions +LIBSAIBCM_LEGACY_TH_VERSION = 13.2.1.120 +LIBSAIBCM_LEGACY_TH_BRANCH_NAME = SAI_13.2.1_compat_OCP1.18.1 + +LIBSAIBCM_LEGACY_TH_URL_PREFIX = "https://packages.trafficmanager.net/public/sai/sai-broadcom/$(LIBSAIBCM_LEGACY_TH_BRANCH_NAME)/$(LIBSAIBCM_LEGACY_TH_VERSION)/xgs" + +# SAI module for LEGACY-TH Asic family +BRCM_LEGACY_TH_SAI = libsaibcm_$(LIBSAIBCM_LEGACY_TH_VERSION)_amd64.deb +$(BRCM_LEGACY_TH_SAI)_URL = "$(LIBSAIBCM_LEGACY_TH_URL_PREFIX)/$(BRCM_LEGACY_TH_SAI)" + +# Package registration +SONIC_ONLINE_DEBS += $(BRCM_LEGACY_TH_SAI) + +# Version handling +$(BRCM_LEGACY_TH_SAI)_SKIP_VERSION=y diff --git a/platform/broadcom/sai-modules.dep b/platform/broadcom/sai-modules.dep index 79c4efb9b22..1f8fddf73cd 100644 --- a/platform/broadcom/sai-modules.dep +++ b/platform/broadcom/sai-modules.dep @@ -2,11 +2,13 @@ MPATH := $($(BRCM_OPENNSL_KERNEL)_SRC_PATH) DEP_FILES := $(SONIC_COMMON_FILES_LIST) platform/broadcom/sai-modules.mk platform/broadcom/sai-modules.dep DEP_FILES += $(SONIC_COMMON_BASE_FILES_LIST) -DEP_FILES += $(shell git ls-files $(MPATH)) +SMDEP_FILES := $(addprefix $(MPATH)/,$(shell cd $(MPATH) && git ls-files)) $(BRCM_OPENNSL_KERNEL)_CACHE_MODE := GIT_CONTENT_SHA $(BRCM_OPENNSL_KERNEL)_DEP_FLAGS := $(SONIC_COMMON_FLAGS_LIST) $(BRCM_OPENNSL_KERNEL)_DEP_FILES := $(DEP_FILES) +$(BRCM_OPENNSL_KERNEL)_SMDEP_FILES := $(SMDEP_FILES) +$(BRCM_OPENNSL_KERNEL)_SMDEP_PATHS := $(MPATH) # SAI bcm modules for DNX family ASIC MPATH_DNX := $($(BRCM_DNX_OPENNSL_KERNEL)_SRC_PATH) @@ -19,3 +21,13 @@ $(BRCM_DNX_OPENNSL_KERNEL)_DEP_FLAGS := $(SONIC_COMMON_FLAGS_LIST) $(BRCM_DNX_OPENNSL_KERNEL)_DEP_FILES := $(DEP_FILES) $(BRCM_DNX_OPENNSL_KERNEL)_SMDEP_FILES := $(SMDEP_FILES) $(BRCM_DNX_OPENNSL_KERNEL)_SMDEP_PATHS := $(MPATH_DNX) + +# SAI bcm modules for Legacy-TH family ASIC (inline source dir) +MPATH_LEGACY_TH := $($(BRCM_LEGACY_TH_OPENNSL_KERNEL)_SRC_PATH) +DEP_FILES := $(SONIC_COMMON_FILES_LIST) platform/broadcom/sai-modules.mk platform/broadcom/sai-modules.dep +DEP_FILES += $(SONIC_COMMON_BASE_FILES_LIST) +DEP_FILES += $(shell git ls-files $(MPATH_LEGACY_TH)) + +$(BRCM_LEGACY_TH_OPENNSL_KERNEL)_CACHE_MODE := GIT_CONTENT_SHA +$(BRCM_LEGACY_TH_OPENNSL_KERNEL)_DEP_FLAGS := $(SONIC_COMMON_FLAGS_LIST) +$(BRCM_LEGACY_TH_OPENNSL_KERNEL)_DEP_FILES := $(DEP_FILES) diff --git a/platform/broadcom/sai-modules.mk b/platform/broadcom/sai-modules.mk index e65124a9f42..05512700b7b 100644 --- a/platform/broadcom/sai-modules.mk +++ b/platform/broadcom/sai-modules.mk @@ -1,6 +1,6 @@ # Broadcom SAI modules -BRCM_OPENNSL_KERNEL_VERSION = 14.1.0.1 +BRCM_OPENNSL_KERNEL_VERSION = 15.2.0.0.0.0.0.0 BRCM_OPENNSL_KERNEL = opennsl-modules_$(BRCM_OPENNSL_KERNEL_VERSION)_amd64.deb $(BRCM_OPENNSL_KERNEL)_SRC_PATH = $(PLATFORM_PATH)/saibcm-modules $(BRCM_OPENNSL_KERNEL)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON) @@ -18,3 +18,14 @@ $(BRCM_DNX_OPENNSL_KERNEL)_BUILD_ENV += PKG_NAME=$(BRCM_DNX_OPENNSL_KERNEL) $(BRCM_DNX_OPENNSL_KERNEL)_MACHINE = broadcom-dnx $(BRCM_DNX_OPENNSL_KERNEL)_AFTER = $(BRCM_OPENNSL_KERNEL) SONIC_DPKG_DEBS += $(BRCM_DNX_OPENNSL_KERNEL) + +# SAI bcm modules for Legacy-TH family ASIC +BRCM_LEGACY_TH_OPENNSL_KERNEL_VERSION = 13.2.1.0 + +BRCM_LEGACY_TH_OPENNSL_KERNEL = opennsl-modules-legacy-th_$(BRCM_LEGACY_TH_OPENNSL_KERNEL_VERSION)_amd64.deb +$(BRCM_LEGACY_TH_OPENNSL_KERNEL)_SRC_PATH = $(PLATFORM_PATH)/saibcm-modules-legacy-th +$(BRCM_LEGACY_TH_OPENNSL_KERNEL)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON) +$(BRCM_LEGACY_TH_OPENNSL_KERNEL)_BUILD_ENV += PKG_NAME=$(BRCM_LEGACY_TH_OPENNSL_KERNEL) +$(BRCM_LEGACY_TH_OPENNSL_KERNEL)_MACHINE = broadcom-legacy-th +$(BRCM_LEGACY_TH_OPENNSL_KERNEL)_AFTER = $(BRCM_DNX_OPENNSL_KERNEL) +SONIC_DPKG_DEBS += $(BRCM_LEGACY_TH_OPENNSL_KERNEL) diff --git a/platform/broadcom/sai-xgs.mk b/platform/broadcom/sai-xgs.mk index 9c98ea076be..774988ac2ad 100644 --- a/platform/broadcom/sai-xgs.mk +++ b/platform/broadcom/sai-xgs.mk @@ -1,8 +1,7 @@ -# Broadcom XGS SAI definitions -LIBSAIBCM_XGS_VERSION = 14.1.0.1.0.0.9.0 -LIBSAIBCM_XGS_BRANCH_NAME = SAI_14.1.0_GA +LIBSAIBCM_XGS_VERSION = 15.2.0.0.0.0.3.1 +LIBSAIBCM_XGS_BRANCH_NAME = SAI_15.2.0_GA -LIBSAIBCM_XGS_URL_PREFIX = "https://packages.trafficmanager.net/public/sai/sai-broadcom/$(LIBSAIBCM_XGS_BRANCH_NAME)/$(LIBSAIBCM_XGS_VERSION)/xgs" +LIBSAIBCM_XGS_URL_PREFIX = "$(BUILD_PUBLIC_URL)/sai/sai-broadcom/$(LIBSAIBCM_XGS_BRANCH_NAME)/$(LIBSAIBCM_XGS_VERSION)/xgs" # Runtime package BRCM_XGS_SAI = libsaibcm_$(LIBSAIBCM_XGS_VERSION)_amd64.deb diff --git a/platform/broadcom/saibcm-modules b/platform/broadcom/saibcm-modules new file mode 160000 index 00000000000..b9b38791bc5 --- /dev/null +++ b/platform/broadcom/saibcm-modules @@ -0,0 +1 @@ +Subproject commit b9b38791bc5fd81f846789677ca873345fbf2048 diff --git a/platform/broadcom/saibcm-modules/.gitignore b/platform/broadcom/saibcm-modules-legacy-th/.gitignore similarity index 100% rename from platform/broadcom/saibcm-modules/.gitignore rename to platform/broadcom/saibcm-modules-legacy-th/.gitignore diff --git a/platform/broadcom/saibcm-modules-legacy-th/GFILE b/platform/broadcom/saibcm-modules-legacy-th/GFILE new file mode 100644 index 00000000000..e69de29bb2d diff --git a/platform/broadcom/saibcm-modules-legacy-th/GFILES b/platform/broadcom/saibcm-modules-legacy-th/GFILES new file mode 100644 index 00000000000..e69de29bb2d diff --git a/platform/broadcom/saibcm-modules/GLOG b/platform/broadcom/saibcm-modules-legacy-th/GLOG similarity index 100% rename from platform/broadcom/saibcm-modules/GLOG rename to platform/broadcom/saibcm-modules-legacy-th/GLOG diff --git a/platform/broadcom/saibcm-modules-legacy-th/GPATH b/platform/broadcom/saibcm-modules-legacy-th/GPATH new file mode 100644 index 00000000000..e69de29bb2d diff --git a/platform/broadcom/saibcm-modules-legacy-th/GRTAGS b/platform/broadcom/saibcm-modules-legacy-th/GRTAGS new file mode 100644 index 00000000000..e69de29bb2d diff --git a/platform/broadcom/saibcm-modules-legacy-th/GTAGS b/platform/broadcom/saibcm-modules-legacy-th/GTAGS new file mode 100644 index 00000000000..e69de29bb2d diff --git a/platform/broadcom/saibcm-modules-legacy-th/debian/changelog b/platform/broadcom/saibcm-modules-legacy-th/debian/changelog new file mode 100644 index 00000000000..9550e853560 --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/debian/changelog @@ -0,0 +1,154 @@ +opennsl (13.2.1.0) unstable; urgency=medium + + * Update to Broadcom SAI 13.2.1.0 + + -- Ziting Guo Wed, 25 Jun 2025 05:46:10 +0000 + +opennsl (13.2.0.0) unstable; urgency=medium + + * Update to Broadcom SAI 13.2.0.0 + + -- Ziting Guo Wed, 21 May 2025 01:43:59 +0000 + +opennsl (12.1.0.2) unstable; urgency=medium + + * Update to Broadcom SAI 12.1.0.2 + + -- Ziting Guo Wed, 18 Dec 2024 02:33:59 +0000 + +opennsl (11.2.4.1) unstable; urgency=medium + + * Update to Broadcom SAI 11.2.4.1 + + -- Ziting Guo Mon, 2 Sep 2024 02:53:09 +0000 + +opennsl (10.1.0.0) unstable; urgency=medium + + * Update to Broadcom SAI 10.1.0.0 + + -- Ziting Guo Mon Jun 17 05:18:47 2024 +0000 + +opennsl (8.4.0.2) unstable; urgency=medium + + * Update to Broadcom SAI 8.4.0.2 + + -- Ziting Guo Tue, Sep 5 02:25:03 2023 +0000 + +opennsl (7.1.0.0) unstable; urgency=medium + + * Update to Broadcom SAI 7.1.0.0. + + -- Vineet Mittal Tue, 19 APR 2022 12:30:00 +0000 + +opennsl (6.1.0.3) unstable; urgency=medium + + * Update to Broadcom SAI 6.1.0.3 + + -- Tejaswini Chadaga Fri, 24 MAR 2022 12:30:00 +0000 + +opennsl (6.0.0.13) unstable; urgency=medium + + * Update to Broadcom SAI 6.0.0.13 + + -- Judy Joseph Fri, 14 Jan 2022 18:36:38 +0000 + +opennsl (6.0.0.10) unstable; urgency=medium + + * Update to Broadcom SAI 6.0.0.10 + + -- Vineet Mittal Fri, 21 Oct 2021 18:36:38 +0000 + +opennsl (5.0.0.4) unstable; urgency=medium + + * Update to Broadcom SAI 5.0.0.4 + + -- Judy Joseph Fri, 12 July 2021 18:36:38 +0000 + +opennsl (5.0.0.1) unstable; urgency=medium + + * Update to Broadcom SAI 5.0.0.1 + + -- Abhishek Dosi Fri, 11 June 2021 18:36:38 +0000 + +opennsl (4.3.0.10-2) unstable; urgency=medium + + * Update to Broadcom SAI 4.3.0.10 + * Added SDKLT modules 4.3.0.10-2 + + -- Mahesh Maddikayala Thu, 21 Jan 2021 18:36:38 +0000 + +opennsl (4.2.1.3-1) unstable; urgency=medium + + * Update to Broadcom SAI 4.2.1.3 + + -- Mahesh Maddikayala Fri, 18 Sep 2029 10:57:47 +0000 + +opennsl (3.7.3.3-1) unstable; urgency=medium + + * Port Broadcom SAI 3.7.3.3 + * Cherry-pick change from master branch, 3.7.3.3-1 + + -- Judy Joseph Fri, 2 Dec 2019 15:32:47 +0000 + +opennsl (3.7.3.2-1) unstable; urgency=medium + + * Port Broadcom SAI 3.7.3.2 + * Cherry-pick change from master branch, 3.7.3.2-1 + + -- Judy Joseph Fri, 12 Nov 2019 15:22:47 +0000 + +opennsl (3.7.3.1-1) unstable; urgency=medium + + * Port Broadcom SAI 3.7.3.1 + * Cherry-pick change from master branch, 3.7.3.1-1 + + -- Judy Joseph Fri, 19 Sep 2019 13:11:47 +0000 + +opennsl (3.4.1.11-1) unstable; urgency=medium + + * Port Broadcom SAI 3.4.1.11 + * Cherry-pick change from master branch, 3.4.1.11-1 + + -- Ying Xie Fri, 05 Jan 2018 23:21:47 +0000 + +opennsl (3.4.1.10-1) unstable; urgency=medium + + * Upgrade to 3.4.1.10-1 + + -- Ying Xie Tue, 19 Dec 2017 21:33:48 +0000 + +opennsl (3.4.1.9-1) unstable; urgency=medium + + * Upgrade to 3.4.1.9-1 + + -- Ying Xie Thu, 14 Dec 2017 22:04:11 +0000 + +opennsl (3.4.1.7-2) unstable; urgency=medium + + * Add Arista 7260cx3 Rev2 hardware support + + -- Ying Xie Mon, 27 Nov 2017 18:13:50 +0000 + +opennsl (3.4.1.7-1) unstable; urgency=medium + + * Importing opennsl 3.4.1.7 + + -- Ying Xie Mon, 23 Oct 2017 23:47:25 +0000 + +opennsl (3.4.1.5-2) unstable; urgency=medium + + * Importing TD2 changes from opennsl 3.2.2.2 + + -- Ying Xie Tue, 26 Sep 2017 01:28:44 +0000 + +opennsl (3.4.1.5-1) unstable; urgency=medium + + * Importing opennsl 3.4.1.5 + + -- Ying Xie Wed, 20 Sep 2017 16:42:12 +0000 + +opennsl (3.4.1.3-1) unstable; urgency=low + + * Initial release + + -- Guohan Lu Fri, 17 Jul 2015 04:46:01 -0700 diff --git a/platform/broadcom/saibcm-modules/debian/compat b/platform/broadcom/saibcm-modules-legacy-th/debian/compat similarity index 100% rename from platform/broadcom/saibcm-modules/debian/compat rename to platform/broadcom/saibcm-modules-legacy-th/debian/compat diff --git a/platform/broadcom/saibcm-modules/debian/control b/platform/broadcom/saibcm-modules-legacy-th/debian/control similarity index 100% rename from platform/broadcom/saibcm-modules/debian/control rename to platform/broadcom/saibcm-modules-legacy-th/debian/control diff --git a/platform/broadcom/saibcm-modules-legacy-th/debian/opennsl-modules.dirs b/platform/broadcom/saibcm-modules-legacy-th/debian/opennsl-modules.dirs new file mode 100644 index 00000000000..02a5524ad5a --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/debian/opennsl-modules.dirs @@ -0,0 +1 @@ +lib/modules/6.12.41+deb13-sonic-amd64/extra diff --git a/platform/broadcom/saibcm-modules/debian/opennsl-modules.init b/platform/broadcom/saibcm-modules-legacy-th/debian/opennsl-modules.init similarity index 99% rename from platform/broadcom/saibcm-modules/debian/opennsl-modules.init rename to platform/broadcom/saibcm-modules-legacy-th/debian/opennsl-modules.init index fbc893278f5..d9fe27ae227 100755 --- a/platform/broadcom/saibcm-modules/debian/opennsl-modules.init +++ b/platform/broadcom/saibcm-modules-legacy-th/debian/opennsl-modules.init @@ -131,4 +131,3 @@ force-reload|restart) esac exit 0 - diff --git a/platform/broadcom/saibcm-modules/debian/opennsl-modules.install b/platform/broadcom/saibcm-modules-legacy-th/debian/opennsl-modules.install similarity index 100% rename from platform/broadcom/saibcm-modules/debian/opennsl-modules.install rename to platform/broadcom/saibcm-modules-legacy-th/debian/opennsl-modules.install diff --git a/platform/broadcom/saibcm-modules-legacy-th/debian/rules b/platform/broadcom/saibcm-modules-legacy-th/debian/rules new file mode 100755 index 00000000000..eb7ec913710 --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/debian/rules @@ -0,0 +1,217 @@ +#!/usr/bin/make -f +# -*- makefile -*- +# Sample debian/rules that uses debhelper. +# This file was originally written by Joey Hess and Craig Small. +# As a special exception, when this file is copied by dh-make into a +# dh-make output file, you may use that output file without restriction. +# This special exception was added by Craig Small in version 0.37 of dh-make. +# +# This version is for a hypothetical package that can build a kernel modules +# architecture-dependant package via make-kpkg, as well as an +# architecture-independent module source package, and other packages +# either dep/indep for things like common files or userspace components +# needed for the kernel modules. + +# Uncomment this to turn on verbose mode. +#export DH_VERBOSE=1 + + + + +# some default definitions, important! +# +# Name of the source package +psource:=opennsl-source + +# The short upstream name, used for the module source directory +sname:=opennsl + +### KERNEL SETUP +### Setup the stuff needed for making kernel module packages +### taken from /usr/share/kernel-package/sample.module.rules + +# prefix of the target package name +PACKAGE=opennsl-modules +# modifieable for experiments or debugging m-a +MA_DIR ?= /usr/share/modass +KVER := $(word 1,$(subst -, ,$(KVERSION))) +KVER_ARCH := $(KVER)-sonic-amd64 +KVER_COMMON := $(KVER)-common-sonic + +# load generic variable handling +-include $(MA_DIR)/include/generic.make +# load default rules, including kdist, kdist_image, ... +-include $(MA_DIR)/include/common-rules.make + + + +# module assistant calculates all needed things for us and sets +# following variables: +# KSRC (kernel source directory), KVERS (kernel version string), KDREV +# (revision of the Debian kernel-image package), CC (the correct +# compiler), VERSION (the final package version string), PKGNAME (full +# package name with KVERS included), DEB_DESTDIR (path to store DEBs) + +# The kdist_config target is called by make-kpkg modules_config and +# by kdist* rules by dependency. It should configure the module so it is +# ready for compilation (mostly useful for calling configure). +# prep-deb-files from module-assistant creates the neccessary debian/ files +kdist_config: prep-deb-files + +# the kdist_clean target is called by make-kpkg modules_clean and from +# kdist* rules. It is responsible for cleaning up any changes that have +# been made by the other kdist_commands (except for the .deb files created) +kdist_clean: clean + dh_testdir + dh_clean + SDK=$(realpath .) LINUX_UAPI_SPLIT=1 DEBIAN_LINUX_HEADER=1 BUILD_KNET_CB=1 \ + KERNDIR=/usr/src/linux-headers-$(KVER_COMMON) \ + KERNEL_SRC=/usr/src/linux-headers-$(KVER_ARCH) \ + $(MAKE) -C systems/linux/user/x86-smp_generic_64-2_6 clean + SDK=$(realpath .) BUILD_KNET_CB=1 \ + KDIR=/usr/src/linux-headers-$(KVER_COMMON) \ + $(MAKE) -C sdklt/ clean +# rm -f driver/*.o driver/*.ko +# +### end KERNEL SETUP + +configure: configure-stamp +configure-stamp: + dh_testdir + # Add here commands to configure the package. + + touch configure-stamp + + +build-arch: configure-stamp build-arch-stamp +build-arch-stamp: + dh_testdir + + # create links + cd /; sudo mkdir -p /lib/modules/$(KVER_ARCH) + cd /; sudo ln -sfn /usr/src/linux-headers-$(KVER_COMMON)/ /lib/modules/$(KVER_ARCH)/source + cd /; sudo ln -sfn /usr/src/linux-headers-$(KVER_ARCH)/ /lib/modules/$(KVER_ARCH)/build + cd /; sudo ln -sfn /usr/src/linux-headers-$(KVER_ARCH)/include/generated/ /usr/src/linux-headers-$(KVER_COMMON)/include/generated + cd /; sudo ln -sfn /usr/src/linux-headers-$(KVER_ARCH)/arch/x86/include/generated/ /usr/src/linux-headers-$(KVER_COMMON)/arch/x86/include/generated + cd /; sudo ln -sf /usr/src/linux-headers-$(KVER_ARCH)/arch/x86/module.lds /usr/src/linux-headers-$(KVER_COMMON)/arch/x86/module.lds + cd /; sudo ln -sfn /usr/src/linux-headers-$(KVER_ARCH)/include/config/ /usr/src/linux-headers-$(KVER_COMMON)/include/config + cd /; sudo cp /usr/src/linux-headers-$(KVER_ARCH)/Module.symvers /usr/src/linux-headers-$(KVER_COMMON)/Module.symvers + + # Add here command to compile/build the package. + SDK=$(realpath .) LINUX_UAPI_SPLIT=1 DEBIAN_LINUX_HEADER=1 BUILD_KNET_CB=1 \ + KERNDIR=/usr/src/linux-headers-$(KVER_COMMON) \ + KERNEL_SRC=/usr/src/linux-headers-$(KVER_ARCH) \ + $(MAKE) -C systems/linux/user/x86-smp_generic_64-2_6 + + SDK=$(realpath .) BUILD_KNET_CB=1 \ + KDIR=/usr/src/linux-headers-$(KVER_COMMON) \ + $(MAKE) -C sdklt/ kmod + + touch $@ + +#k = $(shell echo $(KVERS) | grep -q ^2.6 && echo k) + +build-indep: configure-stamp build-indep-stamp +build-indep-stamp: + dh_testdir + + # Add here command to compile/build the arch indep package. + # It's ok not to do anything here, if you don't need to build + # anything for this package. + #docbook-to-man debian/opennsl.sgml > opennsl.1 + + touch $@ + +build: build-arch + +clean: + dh_testdir + #dh_testroot + rm -f build-arch-stamp build-indep-stamp configure-stamp + + # Add here commands to clean up after the build process. + SDK=$(realpath .) LINUX_UAPI_SPLIT=1 DEBIAN_LINUX_HEADER=1 BUILD_KNET_CB=1 \ + KERNDIR=/usr/src/linux-headers-$(KVER_COMMON) \ + KERNEL_SRC=/usr/src/linux-headers-$(KVER_ARCH) \ + $(MAKE) -C systems/linux/user/x86-smp_generic_64-2_6 clean + + SDK=$(realpath .) BUILD_KNET_CB=1 \ + KDIR=/usr/src/linux-headers-$(KVER_COMMON) \ + $(MAKE) -C sdklt/ clean + + dh_clean + +install: DH_OPTIONS= +install: build + dh_testdir + dh_testroot + dh_prep + dh_installdirs + dh_install + +# Build architecture-independent files here. +# Pass -i to all debhelper commands in this target to reduce clutter. +binary-indep: build install + dh_testdir -i + dh_testroot -i + dh_installchangelogs -i + dh_installdocs -i + dh_installexamples -i +# dh_install -i +# dh_installmenu -i +# dh_installdebconf -i +# dh_installlogrotate -i +# dh_installemacsen -i +# dh_installpam -i +# dh_installmime -i +# dh_installinit -i +# dh_installcron -i +# dh_installinfo -i + dh_installman -i + dh_link -i + dh_compress -i + dh_fixperms -i + dh_installdeb -i +# dh_perl -i +# dh_makeshlibs -i + dh_installdeb -i + dh_shlibdeps -i + dh_gencontrol -i + dh_md5sums -i + dh_builddeb -i --filename $(PKG_NAME) + +# Build architecture-dependent files here. +binary-arch: build install + dh_testdir -s + dh_testroot -s +# dh_installdebconf -s + + dh_installdocs -s + dh_installexamples -s + dh_installmenu -s +# dh_installlogrotate -s +# dh_installemacsen -s +# dh_installpam -s +# dh_installmime -s + dh_installmodules -s + dh_systemd_enable -s + dh_installinit -s + dh_systemd_start -s + dh_installcron -s +# dh_installman -s + dh_installinfo -s + dh_installchangelogs -s + dh_strip -s + dh_link -s + dh_compress -s + dh_fixperms -s + dh_makeshlibs -s + dh_installdeb -s +# dh_perl -s + dh_shlibdeps -s + dh_gencontrol -s -- -n"$(PKG_NAME)" + dh_md5sums -s + dh_builddeb -s --filename $(PKG_NAME) + +binary: binary-indep binary-arch +.PHONY: build clean binary-indep binary-arch binary install configure binary-modules kdist kdist_configure kdist_image kdist_clean diff --git a/platform/broadcom/saibcm-modules/include/ibde.h b/platform/broadcom/saibcm-modules-legacy-th/include/ibde.h similarity index 94% rename from platform/broadcom/saibcm-modules/include/ibde.h rename to platform/broadcom/saibcm-modules-legacy-th/include/ibde.h index 67e9f8baeac..56430ab37dd 100644 --- a/platform/broadcom/saibcm-modules/include/ibde.h +++ b/platform/broadcom/saibcm-modules-legacy-th/include/ibde.h @@ -1,7 +1,6 @@ /* * $Id: ibde.h,v 1.27 Broadcom SDK $ - * - * $Copyright: 2017-2025 Broadcom Inc. All rights reserved. + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. @@ -133,17 +132,11 @@ typedef struct ibde_s { uint32 (*read)(int d, uint32 addr); int (*write)(int d, uint32 addr, uint32 data); - /* - * DMA Management - */ uint32* (*salloc)(int d, int size, const char *name); void (*sfree)(int d, void *ptr); int (*sflush)(int d, void *addr, int length); int (*sinval)(int d, void *addr, int length); - /* - * Interrupt Management - */ int (*interrupt_connect)(int d, void (*)(void*), void *data); int (*interrupt_disconnect)(int d); @@ -172,7 +165,7 @@ typedef struct ibde_s { sal_vaddr_t (*shmem_map)(int dev, uint32 addr, uint32 size); /* - * CMIC + * cmic */ int (*get_cmic_ver)(int d, uint32 *ver); @@ -211,16 +204,6 @@ typedef struct ibde_s { * -1: An error happened during device probe. */ int (*probe)(void); - - /* - * Get DMA debug information. - * - * This function was placed here to retain backward compatibility - * with BDE implementations that employ a fixed-order function - * list. - */ - int (*sinfo)(int d, int type, uint32 *data); - } ibde_t; diff --git a/platform/broadcom/saibcm-modules/include/kcom.h b/platform/broadcom/saibcm-modules-legacy-th/include/kcom.h similarity index 92% rename from platform/broadcom/saibcm-modules/include/kcom.h rename to platform/broadcom/saibcm-modules-legacy-th/include/kcom.h index d4b129ad516..0b93cf540cf 100644 --- a/platform/broadcom/saibcm-modules/include/kcom.h +++ b/platform/broadcom/saibcm-modules-legacy-th/include/kcom.h @@ -1,7 +1,6 @@ /* * $Id: kcom.h,v 1.9 Broadcom SDK $ - * - * $Copyright: 2017-2025 Broadcom Inc. All rights reserved. + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. @@ -62,7 +61,6 @@ #define KCOM_M_NETIF_DESTROY 12 /* Destroy network interface */ #define KCOM_M_NETIF_LIST 13 /* Get list of network interface IDs */ #define KCOM_M_NETIF_GET 14 /* Get network interface info */ -#define KCOM_M_NETIF_REPLACE 15 /* Replace network interface with ID */ #define KCOM_M_FILTER_CREATE 21 /* Create Rx filter */ #define KCOM_M_FILTER_DESTROY 22 /* Destroy Rx filter */ #define KCOM_M_FILTER_LIST 23 /* Get list of Rx filter IDs */ @@ -74,7 +72,7 @@ #define KCOM_M_CLOCK_CMD 52 /* Clock Commands */ #define KCOM_M_PCIE_LINK_STATUS 53 /* PCIe link status */ -#define KCOM_VERSION 24 /* Protocol version */ +#define KCOM_VERSION 18 /* Protocol version */ /* * Message status codes @@ -144,18 +142,18 @@ typedef struct kcom_msg_hdr_s { #define KCOM_NETIF_SYSTEM_HEADERS_SIZE_MAX 64 typedef struct kcom_netif_s { - uint32 cb_user_data; uint16 id; + uint8 type; + uint8 flags; + uint32 cb_user_data; uint16 port; uint16 vlan; uint16 qnum; - uint16 phys_port; - uint8 type; - uint8 flags; uint8 macaddr[6]; uint8 system_headers[KCOM_NETIF_SYSTEM_HEADERS_SIZE_MAX]; uint8 system_headers_size; char name[KCOM_NETIF_NAME_MAX]; + uint8 phys_port; } kcom_netif_t; /* @@ -363,27 +361,13 @@ typedef struct kcom_msg_version_s { /* * Request KCOM interface clock info. */ -#define KSYNC_M_HW_INIT 0 -#define KSYNC_M_HW_DEINIT 1 -#define KSYNC_M_VERSION 2 -#define KSYNC_M_HW_TS_DISABLE 3 -#define KSYNC_M_MTP_TS_UPDATE_ENABLE 4 -#define KSYNC_M_MTP_TS_UPDATE_DISABLE 5 -#define KSYNC_M_DNX_JR2DEVS_SYS_CONFIG 6 -#define KSYNC_M_BS_CONFIG_SET 7 -#define KSYNC_M_BS_CONFIG_CLEAR 8 -#define KSYNC_M_BS_STATUS 9 -#define KSYNC_M_PTP_TOD_OFFSET_SET 10 -#define KSYNC_M_PTP_TOD_OFFSET_GET 11 -#define KSYNC_M_NTP_TOD_OFFSET_SET 12 -#define KSYNC_M_NTP_TOD_OFFSET_GET 13 -#define KSYNC_M_PTP_TOD_GET 14 -#define KSYNC_M_NTP_TOD_GET 15 -#define KSYNC_M_GPIO_CONFIG_SET 16 -#define KSYNC_M_GPIO_CONFIG_GET 17 -#define KSYNC_M_LEAP_SEC_SET 18 -#define KSYNC_M_LEAP_SEC_GET 19 -#define KSYNC_M_BS_PHASE_OFFSET_SET 20 +#define KSYNC_M_HW_INIT 0 +#define KSYNC_M_HW_DEINIT 1 +#define KSYNC_M_VERSION 2 +#define KSYNC_M_HW_TS_DISABLE 3 +#define KSYNC_M_MTP_TS_UPDATE_ENABLE 4 +#define KSYNC_M_MTP_TS_UPDATE_DISABLE 5 +#define KSYNC_M_DNX_JR2DEVS_SYS_CONFIG 6 typedef struct kcom_clock_info_s { uint8 cmd; @@ -604,16 +588,11 @@ typedef struct kcom_msg_hw_info_s { uint32 udh_length_type[4]; uint32 udh_size; uint32 oamp_punted; - uint32 jr_mode_udh_size_compensation; - uint32 jr_mode_add_udh_base; uint32 enet_channels; uint8 no_skip_udh_check; uint8 oam_dm_tod_exist; uint8 system_headers_mode; uint8 udh_enable; - uint16 up_mep_ingress_cpu_trap_id1; - uint16 up_mep_ingress_cpu_trap_id2; - uint8 spa_mode; } kcom_msg_hw_info_t; /* diff --git a/platform/broadcom/saibcm-modules-legacy-th/include/sal/types.h b/platform/broadcom/saibcm-modules-legacy-th/include/sal/types.h new file mode 100644 index 00000000000..11f85d0578d --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/include/sal/types.h @@ -0,0 +1,175 @@ +/* + * $Id: types.h,v 1.3 Broadcom SDK $ + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * + * + * File: types.h + * Purpose: SAL type definitions + */ + +#ifndef _SAL_TYPES_H +#define _SAL_TYPES_H + +/* + * Define platform-independent types + */ + +#ifndef TRUE +#define TRUE 1 +#endif + +#ifndef FALSE +#define FALSE 0 +#endif + +#ifndef NULL +#define NULL 0 +#endif + +#ifndef DONT_CARE +#define DONT_CARE 0 +#endif + +#define VOL volatile + +/* + * 64-bit type + */ + +#ifdef LONGS_ARE_64BITS + +#define COMPILER_64BIT +#define COMPILER_UINT64 unsigned long +#define u64_H(v) (((uint32 *) &(v))[u64_MSW]) +#define u64_L(v) (((uint32 *) &(v))[u64_LSW]) + +#else /* !LONGS_ARE_64BITS */ + +#define COMPILER_64BIT +#define COMPILER_UINT64 unsigned long long +#define u64_H(v) (((uint32 *) &(v))[u64_MSW]) +#define u64_L(v) (((uint32 *) &(v))[u64_LSW]) + +#endif /* LONGS_ARE_64BITS */ + +/* + * Define unsigned and signed integers with guaranteed sizes. + * Adjust if your compiler uses different sizes for short or int. + */ + +typedef unsigned char uint8; /* 8-bit quantity */ +typedef unsigned short uint16; /* 16-bit quantity */ +typedef unsigned int uint32; /* 32-bit quantity */ +typedef COMPILER_UINT64 uint64; /* 64-bit quantity */ + +typedef signed char int8; /* 8-bit quantity */ +typedef signed short int16; /* 16-bit quantity */ +typedef signed int int32; /* 32-bit quantity */ + +#define BITS2BYTES(x) (((x) + 7) / 8) +#define BITS2WORDS(x) (((x) + 31) / 32) + +#define BYTES2BITS(x) ((x) * 8) +#define BYTES2WORDS(x) (((x) + 3) / 4) + +#define WORDS2BITS(x) ((x) * 32) +#define WORDS2BYTES(x) ((x) * 4) + +#define COUNTOF(ary) ((int) (sizeof (ary) / sizeof ((ary)[0]))) + +#ifdef PTRS_ARE_64BITS +typedef uint64 sal_vaddr_t; /* Virtual address (Host address) */ +typedef uint64 sal_paddr_t; /* Physical address (PCI address) */ +#define PTR_TO_INT(x) ((uint32)(((sal_vaddr_t)(x))&0xFFFFFFFF)) +#define PTR_HI_TO_INT(x) ((uint32)((((sal_vaddr_t)(x))>>32)&0xFFFFFFFF)) +#else +typedef uint32 sal_vaddr_t; /* Virtual address (Host address) */ +/* Physical address (PCI address) */ +#ifdef PHYS_ADDRS_ARE_64BITS +typedef uint64 sal_paddr_t; +#define PTR_HI_TO_INT(x) ((uint32)((((uint64)(x))>>32)&0xFFFFFFFF)) +#else +typedef uint32 sal_paddr_t; +#define PTR_HI_TO_INT(x) (0) +#endif +#define PTR_TO_INT(x) ((uint32)(x)) +#endif + +#define INT_TO_PTR(x) ((void *)((sal_vaddr_t)(x))) + +#define PTR_TO_UINTPTR(x) ((sal_vaddr_t)(x)) +#define UINTPTR_TO_PTR(x) ((void *)(x)) + +typedef union +{ + uint8 u8; + uint16 u16; + uint32 u32; + uint64 u64; + sal_paddr_t paddr; + sal_vaddr_t vaddr; + void *ptr; +} any_t; + +/* Device bus types */ +#define SAL_PCI_DEV_TYPE 0x00001 /* PCI device */ +#define SAL_SPI_DEV_TYPE 0x00002 /* SPI device */ +#define SAL_EB_DEV_TYPE 0x00004 /* EB device */ +#define SAL_ICS_DEV_TYPE 0x00008 /* ICS device */ +#define SAL_MII_DEV_TYPE 0x00010 /* MII device */ +#define SAL_RCPU_DEV_TYPE 0x00020 /* RCPU device */ +#define SAL_I2C_DEV_TYPE 0x00040 /* I2C device */ +#define SAL_AXI_DEV_TYPE 0x00080 /* AXI device */ +#define SAL_EMMI_DEV_TYPE 0x10000 /* EMMI device */ +#define SAL_COMPOSITE_DEV_TYPE 0x20000 /* Composite device, composed of sub-devices with buses */ +#define SAL_USER_DEV_TYPE 0x40000 /* User implemented method of access to the device */ +#define SAL_SUB_DEV_TYPE 0x80000 /* A sub-device (with a bus) of a composite device */ +#define SAL_DEV_BUS_TYPE_MASK 0xf00ff /* Odd for historical reasons */ + +/* Device types */ +#define SAL_SWITCH_DEV_TYPE 0x00100 /* Switch device */ +#define SAL_ETHER_DEV_TYPE 0x00200 /* Ethernet device */ +#define SAL_CPU_DEV_TYPE 0x00400 /* CPU device */ +#define SAL_DEV_TYPE_MASK 0x00f00 + +/* Access types */ +#define SAL_DEV_BUS_RD_16BIT 0x01000 /* 16 bit reads on bus */ +#define SAL_DEV_BUS_WR_16BIT 0x02000 /* 16 bit writes on bus */ +#define SAL_DEV_BUS_ALT 0x04000 /* Alternate access */ +#define SAL_DEV_BUS_MSI 0x08000 /* Message-signaled interrupts */ +#define SAL_DEV_FLAG_MASK 0x0f000 + +/* BDE reserved mask (cannot be used by SAL) */ +#define SAL_DEV_BDE_MASK 0xff000000 + +/* Backward compatibility */ +#define SAL_ET_DEV_TYPE SAL_MII_DEV_TYPE + +/* Special access addresses */ +#define SAL_DEV_OP_EMMI_INIT 0x0fff1000 + +#endif /* !_SAL_TYPES_H */ diff --git a/platform/broadcom/saibcm-modules-legacy-th/include/sdk_config.h b/platform/broadcom/saibcm-modules-legacy-th/include/sdk_config.h new file mode 100644 index 00000000000..36c33b8412c --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/include/sdk_config.h @@ -0,0 +1,54 @@ +/* + * $Id: sdk_config.h,v 1.5 Broadcom SDK $ + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * + * + * + */ + +#ifndef __SDK_CONFIG_H__ +#define __SDK_CONFIG_H__ + +/* + * Include custom overrides + */ +#ifdef SDK_INCLUDE_CUSTOM_CONFIG +#include +#endif + + +/* + * Memory Barrier operation if required. + * Defaults to nothing. + */ +#ifndef SDK_CONFIG_MEMORY_BARRIER +#define SDK_CONFIG_MEMORY_BARRIER +#endif + + + +#endif /* __SDK_CONFIG_H__ */ diff --git a/platform/broadcom/saibcm-modules-legacy-th/include/soc/devids.h b/platform/broadcom/saibcm-modules-legacy-th/include/soc/devids.h new file mode 100644 index 00000000000..2aac087b3de --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/include/soc/devids.h @@ -0,0 +1,2347 @@ +/* + * $Id: devids.h,v 1.309 Broadcom SDK $ + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * + * + */ + +#ifndef _SOC_DEVIDS_H +#define _SOC_DEVIDS_H + +/* + * Defines PCI device and revision ID for every recognized device. + * All driver routines refer to this ID only. + */ + +#define BROADCOM_VENDOR_ID 0x14e4 + +/* Draco */ +#define BCM5690_DEVICE_ID 0x5690 +#define BCM5690_A0_REV_ID 1 +#define BCM5690_A1_REV_ID 2 +#define BCM5690_A2_REV_ID 3 + +/* Draco without HG (Medusa) */ +#define BCM5691_DEVICE_ID 0x5691 +#define BCM5691_A0_REV_ID 1 +#define BCM5691_A1_REV_ID 2 +#define BCM5691_A2_REV_ID 3 + +/* Draco without L3 */ +#define BCM5692_DEVICE_ID 0x5692 +#define BCM5692_A0_REV_ID 1 +#define BCM5692_A1_REV_ID 2 +#define BCM5692_A2_REV_ID 3 + +/* Draco without HG or L3 */ +#define BCM5693_DEVICE_ID 0x5693 +#define BCM5693_A0_REV_ID 1 +#define BCM5693_A1_REV_ID 2 +#define BCM5693_A2_REV_ID 3 + +/* Draco 1.5 */ +#define BCM5695_DEVICE_ID 0x5695 +#define BCM5695_A0_REV_ID 1 +#define BCM5695_A1_REV_ID 2 +#define BCM5695_B0_REV_ID 0x11 + +/* Draco 1.5 without HG */ +#define BCM5696_DEVICE_ID 0x5696 +#define BCM5696_A0_REV_ID 1 +#define BCM5696_A1_REV_ID 2 +#define BCM5696_B0_REV_ID 0x11 + +/* Draco 1.5 without L3 */ +#define BCM5697_DEVICE_ID 0x5697 +#define BCM5697_A0_REV_ID 1 +#define BCM5697_A1_REV_ID 2 +#define BCM5697_B0_REV_ID 0x11 + +/* Draco 1.5 without HG or L3 */ +#define BCM5698_DEVICE_ID 0x5698 +#define BCM5698_A0_REV_ID 1 +#define BCM5698_A1_REV_ID 2 +#define BCM5698_B0_REV_ID 0x11 + +/* Hercules with 8 ports */ +#define BCM5670_DEVICE_ID 0x5670 +#define BCM5670_A0_REV_ID 1 +#define BCM5670_A1_REV_ID 2 + +/* Hercules with 4 ports */ +#define BCM5671_DEVICE_ID 0x5671 +#define BCM5671_A0_REV_ID 1 +#define BCM5671_A1_REV_ID 2 +#define BCM5671_A2_REV_ID 3 /* Maxxus */ + +/* Hercules 1.5 with 8 ports */ +#define BCM5675_DEVICE_ID 0x5675 +#define BCM5675_A0_REV_ID 1 +#define BCM5675_A1_REV_ID 2 + +/* Hercules 1.5 with 4 ports */ +#define BCM5676_DEVICE_ID 0x5676 +#define BCM5676_A0_REV_ID 1 +#define BCM5676_A1_REV_ID 2 + +/* Lynx */ +#define BCM5673_DEVICE_ID 0x5673 +#define BCM5673_A0_REV_ID 1 +#define BCM5673_A1_REV_ID 2 +#define BCM5673_A2_REV_ID 3 + +/* Lynx 1.5 */ +#define BCM5674_DEVICE_ID 0x5674 +#define BCM5674_A0_REV_ID 1 + +/* Felix */ +#define BCM56100_DEVICE_ID 0xb100 +#define BCM56100_A0_REV_ID 1 +#define BCM56100_A1_REV_ID 2 +#define BCM56101_DEVICE_ID 0xb101 +#define BCM56101_A0_REV_ID 1 +#define BCM56101_A1_REV_ID 2 +#define BCM56102_DEVICE_ID 0xb102 +#define BCM56102_A0_REV_ID 1 +#define BCM56102_A1_REV_ID 2 +#define BCM56105_DEVICE_ID 0xb105 +#define BCM56105_A0_REV_ID 1 +#define BCM56105_A1_REV_ID 2 +#define BCM56106_DEVICE_ID 0xb106 +#define BCM56106_A0_REV_ID 1 +#define BCM56106_A1_REV_ID 2 +#define BCM56107_DEVICE_ID 0xb107 +#define BCM56107_A0_REV_ID 1 +#define BCM56107_A1_REV_ID 2 + +/* Felix 1.5 */ +#define BCM56110_DEVICE_ID 0xb110 +#define BCM56110_A0_REV_ID 1 +#define BCM56111_DEVICE_ID 0xb111 +#define BCM56111_A0_REV_ID 1 +#define BCM56112_DEVICE_ID 0xb112 +#define BCM56112_A0_REV_ID 1 +#define BCM56115_DEVICE_ID 0xb115 +#define BCM56115_A0_REV_ID 1 +#define BCM56116_DEVICE_ID 0xb116 +#define BCM56116_A0_REV_ID 1 +#define BCM56117_DEVICE_ID 0xb117 +#define BCM56117_A0_REV_ID 1 + +/* Helix */ +#define BCM56300_DEVICE_ID 0xb300 +#define BCM56300_A0_REV_ID 1 +#define BCM56300_A1_REV_ID 2 +#define BCM56300_B0_REV_ID 0x11 +#define BCM56300_B1_REV_ID 0x12 +#define BCM56301_DEVICE_ID 0xb301 +#define BCM56301_A0_REV_ID 1 +#define BCM56301_A1_REV_ID 2 +#define BCM56301_B0_REV_ID 0x11 +#define BCM56301_B1_REV_ID 0x12 +#define BCM56302_DEVICE_ID 0xb302 +#define BCM56302_A0_REV_ID 1 +#define BCM56302_A1_REV_ID 2 +#define BCM56302_B0_REV_ID 0x11 +#define BCM56302_B1_REV_ID 0x12 +#define BCM56303_DEVICE_ID 0xb303 +#define BCM56303_A1_REV_ID 2 +#define BCM56303_A0_REV_ID 1 +#define BCM56303_B0_REV_ID 0x11 +#define BCM56303_B1_REV_ID 0x12 +#define BCM56304_DEVICE_ID 0xb304 +#define BCM56304_A0_REV_ID 1 +#define BCM56304_A1_REV_ID 2 +#define BCM56304_B0_REV_ID 0x11 +#define BCM56304_B1_REV_ID 0x12 +#define BCM56404_DEVICE_ID 0xb404 +#define BCM56404_A0_REV_ID 1 +#define BCM56404_A1_REV_ID 2 +#define BCM56305_DEVICE_ID 0xb305 +#define BCM56305_A0_REV_ID 1 +#define BCM56305_A1_REV_ID 2 +#define BCM56305_B0_REV_ID 0x11 +#define BCM56305_B1_REV_ID 0x12 +#define BCM56306_DEVICE_ID 0xb306 +#define BCM56306_A0_REV_ID 1 +#define BCM56306_A1_REV_ID 2 +#define BCM56306_B0_REV_ID 0x11 +#define BCM56306_B1_REV_ID 0x12 +#define BCM56307_DEVICE_ID 0xb307 +#define BCM56307_A0_REV_ID 1 +#define BCM56307_A1_REV_ID 2 +#define BCM56307_B0_REV_ID 0x11 +#define BCM56307_B1_REV_ID 0x12 +#define BCM56308_DEVICE_ID 0xb308 +#define BCM56308_A0_REV_ID 1 +#define BCM56308_A1_REV_ID 2 +#define BCM56308_B0_REV_ID 0x11 +#define BCM56308_B1_REV_ID 0x12 +#define BCM56309_DEVICE_ID 0xb309 +#define BCM56309_A0_REV_ID 1 +#define BCM56309_A1_REV_ID 2 +#define BCM56309_B0_REV_ID 0x11 +#define BCM56309_B1_REV_ID 0x12 + +/* Helix 1.5 */ +#define BCM56310_DEVICE_ID 0xb310 +#define BCM56310_A0_REV_ID 1 +#define BCM56311_DEVICE_ID 0xb311 +#define BCM56311_A0_REV_ID 1 +#define BCM56312_DEVICE_ID 0xb312 +#define BCM56312_A0_REV_ID 1 +#define BCM56313_DEVICE_ID 0xb313 +#define BCM56313_A0_REV_ID 1 +#define BCM56314_DEVICE_ID 0xb314 +#define BCM56314_A0_REV_ID 1 +#define BCM56315_DEVICE_ID 0xb315 +#define BCM56315_A0_REV_ID 1 +#define BCM56316_DEVICE_ID 0xb316 +#define BCM56316_A0_REV_ID 1 +#define BCM56317_DEVICE_ID 0xb317 +#define BCM56317_A0_REV_ID 1 +#define BCM56318_DEVICE_ID 0xb318 +#define BCM56318_A0_REV_ID 1 +#define BCM56319_DEVICE_ID 0xb319 +#define BCM56319_A0_REV_ID 1 + +#ifndef EXCLUDE_BCM56324 +/* Helix 2 */ +#define BCM56322_DEVICE_ID 0xb322 +#define BCM56322_A0_REV_ID 1 +#define BCM56324_DEVICE_ID 0xb324 +#define BCM56324_A0_REV_ID 1 +#endif /* EXCLUDE_BCM56324 */ + +#define BCM53300_DEVICE_ID 0xb006 +#define BCM53300_A0_REV_ID 0x11 +#define BCM53300_A1_REV_ID 0x12 +#define BCM53301_DEVICE_ID 0xb206 +#define BCM53301_A0_REV_ID 0x11 +#define BCM53301_A1_REV_ID 0x12 +#define BCM53302_DEVICE_ID 0xb008 +#define BCM53302_A0_REV_ID 0x11 +#define BCM53302_A1_REV_ID 0x12 + +/* Firebolt */ +#define BCM56500_DEVICE_ID 0xb500 +#define BCM56500_A0_REV_ID 1 +#define BCM56500_A1_REV_ID 2 +#define BCM56500_B0_REV_ID 0x11 +#define BCM56500_B1_REV_ID 0x12 +#define BCM56500_B2_REV_ID 0x13 +#define BCM56501_DEVICE_ID 0xb501 +#define BCM56501_A0_REV_ID 1 +#define BCM56501_A1_REV_ID 2 +#define BCM56501_B0_REV_ID 0x11 +#define BCM56501_B1_REV_ID 0x12 +#define BCM56501_B2_REV_ID 0x13 +#define BCM56502_DEVICE_ID 0xb502 +#define BCM56502_A0_REV_ID 1 +#define BCM56502_A1_REV_ID 2 +#define BCM56502_B0_REV_ID 0x11 +#define BCM56502_B1_REV_ID 0x12 +#define BCM56502_B2_REV_ID 0x13 +#define BCM56503_DEVICE_ID 0xb503 +#define BCM56503_A0_REV_ID 1 +#define BCM56503_A1_REV_ID 2 +#define BCM56503_B0_REV_ID 0x11 +#define BCM56503_B1_REV_ID 0x12 +#define BCM56503_B2_REV_ID 0x13 +#define BCM56504_DEVICE_ID 0xb504 +#define BCM56504_A0_REV_ID 1 +#define BCM56504_A1_REV_ID 2 +#define BCM56504_B0_REV_ID 0x11 +#define BCM56504_B1_REV_ID 0x12 +#define BCM56504_B2_REV_ID 0x13 +#define BCM56505_DEVICE_ID 0xb505 +#define BCM56505_A0_REV_ID 1 +#define BCM56505_A1_REV_ID 2 +#define BCM56505_B0_REV_ID 0x11 +#define BCM56505_B1_REV_ID 0x12 +#define BCM56505_B2_REV_ID 0x13 +#define BCM56506_DEVICE_ID 0xb506 +#define BCM56506_A0_REV_ID 1 +#define BCM56506_A1_REV_ID 2 +#define BCM56506_B0_REV_ID 0x11 +#define BCM56506_B1_REV_ID 0x12 +#define BCM56506_B2_REV_ID 0x13 +#define BCM56507_DEVICE_ID 0xb507 +#define BCM56507_A0_REV_ID 1 +#define BCM56507_A1_REV_ID 2 +#define BCM56507_B0_REV_ID 0x11 +#define BCM56507_B1_REV_ID 0x12 +#define BCM56507_B2_REV_ID 0x13 +#define BCM56508_DEVICE_ID 0xb508 +#define BCM56508_A0_REV_ID 1 +#define BCM56508_A1_REV_ID 2 +#define BCM56508_B0_REV_ID 0x11 +#define BCM56508_B1_REV_ID 0x12 +#define BCM56508_B2_REV_ID 0x13 +#define BCM56509_DEVICE_ID 0xb509 +#define BCM56509_A0_REV_ID 1 +#define BCM56509_A1_REV_ID 2 +#define BCM56509_B0_REV_ID 0x11 +#define BCM56509_B1_REV_ID 0x12 +#define BCM56509_B2_REV_ID 0x13 + +/* Easyrider */ +#define BCM56600_DEVICE_ID 0xb600 +#define BCM56600_A0_REV_ID 1 +#define BCM56600_B0_REV_ID 0x11 +#define BCM56600_C0_REV_ID 0x21 +#define BCM56601_DEVICE_ID 0xb601 +#define BCM56601_A0_REV_ID 1 +#define BCM56601_B0_REV_ID 0x11 +#define BCM56601_C0_REV_ID 0x21 +#define BCM56602_DEVICE_ID 0xb602 +#define BCM56602_A0_REV_ID 1 +#define BCM56602_B0_REV_ID 0x11 +#define BCM56602_C0_REV_ID 0x21 +#define BCM56603_DEVICE_ID 0xb603 +#define BCM56603_A0_REV_ID 1 +#define BCM56603_B0_REV_ID 0x11 +#define BCM56603_C0_REV_ID 0x21 +#define BCM56605_DEVICE_ID 0xb605 +#define BCM56605_A0_REV_ID 1 +#define BCM56605_B0_REV_ID 0x11 +#define BCM56605_C0_REV_ID 0x21 +#define BCM56606_DEVICE_ID 0xb606 +#define BCM56606_A0_REV_ID 1 +#define BCM56606_B0_REV_ID 0x11 +#define BCM56606_C0_REV_ID 0x21 +#define BCM56607_DEVICE_ID 0xb607 +#define BCM56607_A0_REV_ID 1 +#define BCM56607_B0_REV_ID 0x11 +#define BCM56607_C0_REV_ID 0x21 +#define BCM56608_DEVICE_ID 0xb608 +#define BCM56608_A0_REV_ID 1 +#define BCM56608_B0_REV_ID 0x11 +#define BCM56608_C0_REV_ID 0x21 + +/* Goldwing */ +#define BCM56580_DEVICE_ID 0xb580 +#define BCM56580_A0_REV_ID 1 + +/* HUMV */ +#define BCM56700_DEVICE_ID 0xb700 +#define BCM56700_A0_REV_ID 1 +#define BCM56701_DEVICE_ID 0xb701 +#define BCM56701_A0_REV_ID 1 + +/* Bradley */ +#define BCM56800_DEVICE_ID 0xb800 +#define BCM56800_A0_REV_ID 1 +#define BCM56801_DEVICE_ID 0xb801 +#define BCM56801_A0_REV_ID 1 +#define BCM56802_DEVICE_ID 0xb802 +#define BCM56802_A0_REV_ID 1 +#define BCM56803_DEVICE_ID 0xb803 +#define BCM56803_A0_REV_ID 1 + +/* Raven */ +#define BCM56224_DEVICE_ID 0xb224 +#define BCM56224_A0_REV_ID 1 +#define BCM56224_B0_REV_ID 0x11 +#define BCM56225_DEVICE_ID 0xb225 +#define BCM56225_A0_REV_ID 1 +#define BCM56225_B0_REV_ID 0x11 +#define BCM56226_DEVICE_ID 0xb226 +#define BCM56226_A0_REV_ID 1 +#define BCM56226_B0_REV_ID 0x11 +#define BCM56227_DEVICE_ID 0xb227 +#define BCM56227_A0_REV_ID 1 +#define BCM56227_B0_REV_ID 0x11 +#define BCM56228_DEVICE_ID 0xb228 +#define BCM56228_A0_REV_ID 1 +#define BCM56228_B0_REV_ID 0x11 +#define BCM56229_DEVICE_ID 0xb229 +#define BCM56229_A0_REV_ID 1 +#define BCM56229_B0_REV_ID 0x11 +#define BCM56024_DEVICE_ID 0xb024 +#define BCM56024_A0_REV_ID 1 +#define BCM56024_B0_REV_ID 0x11 +#define BCM56025_DEVICE_ID 0xb025 +#define BCM56025_A0_REV_ID 1 +#define BCM56025_B0_REV_ID 0x11 +#define BCM53724_DEVICE_ID 0xc724 +#define BCM53724_A0_REV_ID 1 +#define BCM53724_B0_REV_ID 0x11 +#define BCM53726_DEVICE_ID 0xc726 +#define BCM53726_A0_REV_ID 1 +#define BCM53726_B0_REV_ID 0x11 + +/* Hawkeye */ +#define BCM53312_DEVICE_ID 0xc312 +#define BCM53312_A0_REV_ID 1 +#define BCM53312_B0_REV_ID 0x11 +#define BCM53313_DEVICE_ID 0xc313 +#define BCM53313_A0_REV_ID 1 +#define BCM53313_B0_REV_ID 0x11 +#define BCM53314_DEVICE_ID 0xc314 +#define BCM53314_A0_REV_ID 1 +#define BCM53314_B0_REV_ID 0x11 + +/* Hawkeye EEE */ +#define BCM53322_DEVICE_ID 0xc322 +#define BCM53322_A0_REV_ID 1 +#define BCM53323_DEVICE_ID 0xc323 +#define BCM53323_A0_REV_ID 1 +#define BCM53324_DEVICE_ID 0xc324 +#define BCM53324_A0_REV_ID 1 + + +/* Raptor */ +#define BCM56218_DEVICE_ID 0xB218 +#define BCM56218_A0_REV_ID 1 +#define BCM56218_A1_REV_ID 2 +#define BCM56218_A2_REV_ID 3 +#define BCM56218X_DEVICE_ID 0xc710 +#define BCM56218X_A0_REV_ID 1 +#define BCM56218X_A1_REV_ID 2 +#define BCM56218X_A2_REV_ID 3 +#define BCM56219_DEVICE_ID 0xB219 +#define BCM56219_A0_REV_ID 1 +#define BCM56219_A1_REV_ID 2 +#define BCM56219_A2_REV_ID 3 +#define BCM56218R_DEVICE_ID 0xB21A +#define BCM56218R_A0_REV_ID 1 +#define BCM56218R_A1_REV_ID 2 +#define BCM56218R_A2_REV_ID 3 +#define BCM56219R_DEVICE_ID 0xB21B +#define BCM56219R_A0_REV_ID 1 +#define BCM56219R_A1_REV_ID 2 +#define BCM56219R_A2_REV_ID 3 +#define BCM56214_DEVICE_ID 0xB214 +#define BCM56214_A0_REV_ID 1 +#define BCM56214_A1_REV_ID 2 +#define BCM56214_A2_REV_ID 3 +#define BCM56215_DEVICE_ID 0xB215 +#define BCM56215_A0_REV_ID 1 +#define BCM56215_A1_REV_ID 2 +#define BCM56215_A2_REV_ID 3 +#define BCM56214R_DEVICE_ID 0xB21C +#define BCM56214R_A0_REV_ID 1 +#define BCM56214R_A1_REV_ID 2 +#define BCM56214R_A2_REV_ID 3 +#define BCM56215R_DEVICE_ID 0xB21D +#define BCM56215R_A0_REV_ID 1 +#define BCM56215R_A1_REV_ID 2 +#define BCM56215R_A2_REV_ID 3 +#define BCM56216_DEVICE_ID 0xB216 +#define BCM56216_A0_REV_ID 1 +#define BCM56216_A1_REV_ID 2 +#define BCM56216_A2_REV_ID 3 +#define BCM56217_DEVICE_ID 0xB217 +#define BCM56217_A0_REV_ID 1 +#define BCM56217_A1_REV_ID 2 +#define BCM56217_A2_REV_ID 3 +#define BCM56212_DEVICE_ID 0xB212 +#define BCM56212_A0_REV_ID 1 +#define BCM56212_A1_REV_ID 2 +#define BCM56212_A2_REV_ID 3 +#define BCM56213_DEVICE_ID 0xB213 +#define BCM56213_A0_REV_ID 1 +#define BCM56213_A1_REV_ID 2 +#define BCM56213_A2_REV_ID 3 +#define BCM53718_DEVICE_ID 0xC71A +#define BCM53718_A0_REV_ID 1 +#define BCM53718_A1_REV_ID 2 +#define BCM53718_A2_REV_ID 3 +#define BCM53714_DEVICE_ID 0xC71B +#define BCM53714_A0_REV_ID 1 +#define BCM53714_A1_REV_ID 2 +#define BCM53714_A2_REV_ID 3 +#define BCM53716_DEVICE_ID 0xC716 +#define BCM53716_A0_REV_ID 1 +#define BCM53716_A1_REV_ID 2 +#define BCM53716_A2_REV_ID 3 +#define BCM56018_DEVICE_ID 0xB018 +#define BCM56018_A0_REV_ID 1 +#define BCM56018_A1_REV_ID 2 +#define BCM56018_A2_REV_ID 3 +#define BCM56014_DEVICE_ID 0xB014 +#define BCM56014_A0_REV_ID 1 +#define BCM56014_A1_REV_ID 2 +#define BCM56014_A2_REV_ID 3 + +/* Firebolt2 */ +#define BCM56510_DEVICE_ID 0xb510 +#define BCM56510_A0_REV_ID 1 +#define BCM56511_DEVICE_ID 0xb511 +#define BCM56511_A0_REV_ID 1 +#define BCM56512_DEVICE_ID 0xb512 +#define BCM56512_A0_REV_ID 1 +#define BCM56513_DEVICE_ID 0xb513 +#define BCM56513_A0_REV_ID 1 +#define BCM56514_DEVICE_ID 0xb514 +#define BCM56514_A0_REV_ID 1 +#define BCM56516_DEVICE_ID 0xb516 +#define BCM56516_A0_REV_ID 1 +#define BCM56517_DEVICE_ID 0xb517 +#define BCM56517_A0_REV_ID 1 +#define BCM56518_DEVICE_ID 0xb518 +#define BCM56518_A0_REV_ID 1 +#define BCM56519_DEVICE_ID 0xb519 +#define BCM56519_A0_REV_ID 1 + +/* Triumph */ +#define BCM56620_DEVICE_ID 0xb620 +#define BCM56620_A0_REV_ID 1 +#define BCM56620_A1_REV_ID 2 +#define BCM56620_B0_REV_ID 0x11 +#define BCM56620_B1_REV_ID 0x12 +#define BCM56620_B2_REV_ID 0x13 +#define BCM56624_DEVICE_ID 0xb624 +#define BCM56624_A0_REV_ID 1 +#define BCM56624_A1_REV_ID 2 +#define BCM56624_B0_REV_ID 0x11 +#define BCM56624_B1_REV_ID 0x12 +#define BCM56624_B2_REV_ID 0x13 +#define BCM56626_DEVICE_ID 0xb626 +#define BCM56626_A0_REV_ID 1 +#define BCM56626_A1_REV_ID 2 +#define BCM56626_B0_REV_ID 0x11 +#define BCM56626_B1_REV_ID 0x12 +#define BCM56626_B2_REV_ID 0x13 +#define BCM56628_DEVICE_ID 0xb628 +#define BCM56628_A0_REV_ID 1 +#define BCM56628_A1_REV_ID 2 +#define BCM56628_B0_REV_ID 0x11 +#define BCM56628_B1_REV_ID 0x12 +#define BCM56628_B2_REV_ID 0x13 +#define BCM56629_DEVICE_ID 0xb629 +#define BCM56629_A0_REV_ID 1 +#define BCM56629_A1_REV_ID 2 +#define BCM56629_B0_REV_ID 0x11 +#define BCM56629_B1_REV_ID 0x12 +#define BCM56629_B2_REV_ID 0x13 + +/* Valkyrie */ +#define BCM56680_DEVICE_ID 0xb680 +#define BCM56680_A0_REV_ID 1 +#define BCM56680_A1_REV_ID 2 +#define BCM56680_B0_REV_ID 0x11 +#define BCM56680_B1_REV_ID 0x12 +#define BCM56680_B2_REV_ID 0x13 +#define BCM56684_DEVICE_ID 0xb684 +#define BCM56684_A0_REV_ID 1 +#define BCM56684_A1_REV_ID 2 +#define BCM56684_B0_REV_ID 0x11 +#define BCM56684_B1_REV_ID 0x12 +#define BCM56684_B2_REV_ID 0x13 +#define BCM56686_DEVICE_ID 0xb686 +#define BCM56686_B0_REV_ID 0x11 +#define BCM56686_B1_REV_ID 0x12 +#define BCM56686_B2_REV_ID 0x13 + +/* Scorpion */ +#define BCM56820_DEVICE_ID 0xb820 +#define BCM56820_A0_REV_ID 1 +#define BCM56820_B0_REV_ID 0x11 +#define BCM56821_DEVICE_ID 0xb821 +#define BCM56821_A0_REV_ID 1 +#define BCM56821_B0_REV_ID 0x11 +#define BCM56822_DEVICE_ID 0xb822 +#define BCM56822_A0_REV_ID 1 +#define BCM56822_B0_REV_ID 0x11 +#define BCM56823_DEVICE_ID 0xb823 +#define BCM56823_A0_REV_ID 1 +#define BCM56823_B0_REV_ID 0x11 +#define BCM56825_DEVICE_ID 0xb825 +#define BCM56825_B0_REV_ID 0x11 + +/* HUMV Plus */ +#define BCM56720_DEVICE_ID 0xb720 +#define BCM56720_A0_REV_ID 1 +#define BCM56720_B0_REV_ID 0x11 +#define BCM56721_DEVICE_ID 0xb721 +#define BCM56721_A0_REV_ID 1 +#define BCM56721_B0_REV_ID 0x11 + +/* Conqueror */ +#define BCM56725_DEVICE_ID 0xb725 +#define BCM56725_A0_REV_ID 1 +#define BCM56725_B0_REV_ID 0x11 + +/* Triumph2 */ +#define BCM56630_DEVICE_ID 0xb630 +#define BCM56630_A0_REV_ID 1 +#define BCM56630_B0_REV_ID 0x11 +#define BCM56634_DEVICE_ID 0xb634 +#define BCM56634_A0_REV_ID 1 +#define BCM56634_B0_REV_ID 0x11 +#define BCM56636_DEVICE_ID 0xb636 +#define BCM56636_A0_REV_ID 1 +#define BCM56636_B0_REV_ID 0x11 +#define BCM56638_DEVICE_ID 0xb638 +#define BCM56638_A0_REV_ID 1 +#define BCM56638_B0_REV_ID 0x11 +#define BCM56639_DEVICE_ID 0xb639 +#define BCM56639_A0_REV_ID 1 +#define BCM56639_B0_REV_ID 0x11 + +/* Valkyrie2 */ +#define BCM56685_DEVICE_ID 0xb685 +#define BCM56685_A0_REV_ID 1 +#define BCM56685_B0_REV_ID 0x11 +#define BCM56689_DEVICE_ID 0xb689 +#define BCM56689_A0_REV_ID 1 +#define BCM56689_B0_REV_ID 0x11 + +/* Apollo */ +#define BCM56520_DEVICE_ID 0xb520 +#define BCM56520_A0_REV_ID 1 +#define BCM56520_B0_REV_ID 0x11 +#define BCM56521_DEVICE_ID 0xb521 +#define BCM56521_A0_REV_ID 1 +#define BCM56521_B0_REV_ID 0x11 +#define BCM56522_DEVICE_ID 0xb522 +#define BCM56522_A0_REV_ID 1 +#define BCM56522_B0_REV_ID 0x11 +#define BCM56524_DEVICE_ID 0xb524 +#define BCM56524_A0_REV_ID 1 +#define BCM56524_B0_REV_ID 0x11 +#define BCM56526_DEVICE_ID 0xb526 +#define BCM56526_A0_REV_ID 1 +#define BCM56526_B0_REV_ID 0x11 + +/* Firebolt 3 */ +#define BCM56534_DEVICE_ID 0xb534 +#define BCM56534_B0_REV_ID 0x11 +#define BCM56538_DEVICE_ID 0xb538 +#define BCM56538_B0_REV_ID 0x11 + +/* Enduro */ +#define BCM56331_DEVICE_ID 0xb331 +#define BCM56331_A0_REV_ID 1 +#define BCM56331_B0_REV_ID 0x11 +#define BCM56331_B1_REV_ID 0x12 +#define BCM56333_DEVICE_ID 0xb333 +#define BCM56333_A0_REV_ID 1 +#define BCM56333_B0_REV_ID 0x11 +#define BCM56333_B1_REV_ID 0x12 +#define BCM56334_DEVICE_ID 0xb334 +#define BCM56334_A0_REV_ID 1 +#define BCM56334_B0_REV_ID 0x11 +#define BCM56334_B1_REV_ID 0x12 +#define BCM56338_DEVICE_ID 0xb338 +#define BCM56338_A0_REV_ID 1 +#define BCM56338_B0_REV_ID 0x11 +#define BCM56338_B1_REV_ID 0x12 + +/* Helix 3 */ +#define BCM56320_DEVICE_ID 0xb320 +#define BCM56320_A0_REV_ID 1 +#define BCM56320_B0_REV_ID 0x11 +#define BCM56320_B1_REV_ID 0x12 +#define BCM56321_DEVICE_ID 0xb321 +#define BCM56321_A0_REV_ID 1 +#define BCM56321_B0_REV_ID 0x11 +#define BCM56321_B1_REV_ID 0x12 + + +/* FireScout */ +#define BCM56548H_DEVICE_ID 0xB54A +#define BCM56548H_A0_REV_ID 1 +#define BCM56548_DEVICE_ID 0xb548 +#define BCM56548_A0_REV_ID 1 +#define BCM56547_DEVICE_ID 0xb547 +#define BCM56547_A0_REV_ID 1 + +/* Helix 4 */ +#define BCM56346_DEVICE_ID 0xb346 +#define BCM56346_A0_REV_ID 1 +#define BCM56345_DEVICE_ID 0xb345 +#define BCM56345_A0_REV_ID 1 +#define BCM56344_DEVICE_ID 0xb344 +#define BCM56344_A0_REV_ID 1 +#define BCM56342_DEVICE_ID 0xb342 +#define BCM56342_A0_REV_ID 1 +#define BCM56340_DEVICE_ID 0xb340 +#define BCM56340_A0_REV_ID 1 + +/* Spiral */ +#define BCM56049_DEVICE_ID 0xb049 +#define BCM56049_A0_REV_ID 1 +#define BCM56048_DEVICE_ID 0xb048 +#define BCM56048_A0_REV_ID 1 +#define BCM56047_DEVICE_ID 0xb047 +#define BCM56047_A0_REV_ID 1 + +/* Ranger */ +#define BCM56042_DEVICE_ID 0xb042 +#define BCM56042_A0_REV_ID 1 +#define BCM56041_DEVICE_ID 0xb041 +#define BCM56041_A0_REV_ID 1 +#define BCM56040_DEVICE_ID 0xb040 +#define BCM56040_A0_REV_ID 1 + +/* Stardust */ +#define BCM56132_DEVICE_ID 0xb132 +#define BCM56132_A0_REV_ID 1 +#define BCM56132_B0_REV_ID 0x11 +#define BCM56132_B1_REV_ID 0x12 +#define BCM56134_DEVICE_ID 0xb134 +#define BCM56134_A0_REV_ID 1 +#define BCM56134_B0_REV_ID 0x11 +#define BCM56134_B1_REV_ID 0x12 + +/* Dagger */ +#define BCM56230_DEVICE_ID 0xb230 +#define BCM56230_B1_REV_ID 0x12 +#define BCM56231_DEVICE_ID 0xb231 +#define BCM56231_B1_REV_ID 0x12 + +/* Hurricane */ +#define BCM56140_DEVICE_ID 0xb140 +#define BCM56140_A0_REV_ID 1 +#define BCM56142_DEVICE_ID 0xb142 +#define BCM56142_A0_REV_ID 1 +#define BCM56143_DEVICE_ID 0xb143 +#define BCM56143_A0_REV_ID 1 +#define BCM56144_DEVICE_ID 0xb144 +#define BCM56144_A0_REV_ID 1 +#define BCM56146_DEVICE_ID 0xb146 +#define BCM56146_A0_REV_ID 1 +#define BCM56147_DEVICE_ID 0xb147 +#define BCM56147_A0_REV_ID 1 +#define BCM56149_DEVICE_ID 0xb149 +#define BCM56149_A0_REV_ID 1 + +/* Trident */ +#define BCM56840_DEVICE_ID 0xb840 +#define BCM56840_A0_REV_ID 1 +#define BCM56840_A1_REV_ID 2 +#define BCM56840_A2_REV_ID 3 +#define BCM56840_A3_REV_ID 4 +#define BCM56840_A4_REV_ID 5 +#define BCM56840_B0_REV_ID 0x11 +#define BCM56840_B1_REV_ID 0x12 +#define BCM56841_DEVICE_ID 0xb841 +#define BCM56841_A0_REV_ID 1 +#define BCM56841_A1_REV_ID 2 +#define BCM56841_A2_REV_ID 3 +#define BCM56841_A3_REV_ID 4 +#define BCM56841_A4_REV_ID 5 +#define BCM56841_B0_REV_ID 0x11 +#define BCM56841_B1_REV_ID 0x12 +#define BCM56843_DEVICE_ID 0xb843 +#define BCM56843_A0_REV_ID 1 +#define BCM56843_A1_REV_ID 2 +#define BCM56843_A2_REV_ID 3 +#define BCM56843_A3_REV_ID 4 +#define BCM56843_A4_REV_ID 5 +#define BCM56843_B0_REV_ID 0x11 +#define BCM56843_B1_REV_ID 0x12 +#define BCM56845_DEVICE_ID 0xb845 +#define BCM56845_A0_REV_ID 1 +#define BCM56845_A1_REV_ID 2 +#define BCM56845_A2_REV_ID 3 +#define BCM56845_A3_REV_ID 4 +#define BCM56845_A4_REV_ID 5 +#define BCM56845_B0_REV_ID 0x11 +#define BCM56845_B1_REV_ID 0x12 + +/* Titan */ +#define BCM56743_DEVICE_ID 0xb743 +#define BCM56743_A0_REV_ID 1 +#define BCM56743_A1_REV_ID 2 +#define BCM56743_A2_REV_ID 3 +#define BCM56743_A3_REV_ID 4 +#define BCM56743_A4_REV_ID 5 +#define BCM56743_B0_REV_ID 0x11 +#define BCM56743_B1_REV_ID 0x12 +#define BCM56745_DEVICE_ID 0xb745 +#define BCM56745_A0_REV_ID 1 +#define BCM56745_A1_REV_ID 2 +#define BCM56745_A2_REV_ID 3 +#define BCM56745_A3_REV_ID 4 +#define BCM56745_A4_REV_ID 5 +#define BCM56745_B0_REV_ID 0x11 +#define BCM56745_B1_REV_ID 0x12 + +/* Saber 2 */ +#define BCM56260_DEVICE_ID 0xb260 +#define BCM56260_A0_REV_ID 1 +#define BCM56260_B0_REV_ID 0x11 +#define BCM56261_DEVICE_ID 0xb261 +#define BCM56261_A0_REV_ID 1 +#define BCM56261_B0_REV_ID 0x11 +#define BCM56262_DEVICE_ID 0xb262 +#define BCM56262_A0_REV_ID 1 +#define BCM56262_B0_REV_ID 0x11 +#define BCM56263_DEVICE_ID 0xb263 +#define BCM56263_A0_REV_ID 1 +#define BCM56263_B0_REV_ID 0x11 + +#define BCM56265_DEVICE_ID 0xb265 +#define BCM56265_A0_REV_ID 1 +#define BCM56265_B0_REV_ID 0x11 +#define BCM56266_DEVICE_ID 0xb266 +#define BCM56266_A0_REV_ID 1 +#define BCM56266_B0_REV_ID 0x11 +#define BCM56267_DEVICE_ID 0xb267 +#define BCM56267_A0_REV_ID 1 +#define BCM56267_B0_REV_ID 0x11 +#define BCM56268_DEVICE_ID 0xb268 +#define BCM56268_A0_REV_ID 1 +#define BCM56268_B0_REV_ID 0x11 + +/*Dagger 2*/ +#define BCM56233_DEVICE_ID 0xb233 +#define BCM56233_B0_REV_ID 0x11 + +#define BCM56460_DEVICE_ID 0xb460 +#define BCM56460_A0_REV_ID 1 +#define BCM56460_B0_REV_ID 0x11 +#define BCM56461_DEVICE_ID 0xb461 +#define BCM56461_A0_REV_ID 1 +#define BCM56461_B0_REV_ID 0x11 +#define BCM56462_DEVICE_ID 0xb462 +#define BCM56462_A0_REV_ID 1 +#define BCM56462_B0_REV_ID 0x11 +#define BCM56463_DEVICE_ID 0xb463 +#define BCM56463_A0_REV_ID 1 +#define BCM56463_B0_REV_ID 0x11 + +#define BCM56465_DEVICE_ID 0xb465 +#define BCM56465_A0_REV_ID 1 +#define BCM56465_B0_REV_ID 0x11 +#define BCM56466_DEVICE_ID 0xb466 +#define BCM56466_A0_REV_ID 1 +#define BCM56466_B0_REV_ID 0x11 +#define BCM56467_DEVICE_ID 0xb467 +#define BCM56467_A0_REV_ID 1 +#define BCM56467_B0_REV_ID 0x11 +#define BCM56468_DEVICE_ID 0xb468 +#define BCM56468_A0_REV_ID 1 +#define BCM56468_B0_REV_ID 0x11 + +/* Metrolite */ +#define BCM56270_DEVICE_ID 0xb270 +#define BCM56270_A0_REV_ID 1 +#define BCM56271_DEVICE_ID 0xb271 +#define BCM56271_A0_REV_ID 1 +#define BCM56272_DEVICE_ID 0xb272 +#define BCM56272_A0_REV_ID 1 + +/* Beagle */ +#define BCM53460_DEVICE_ID 0x8460 +#define BCM53460_A0_REV_ID 1 +#define BCM53461_DEVICE_ID 0x8461 +#define BCM53461_A0_REV_ID 1 + +/* Trident Plus */ +#define BCM56842_DEVICE_ID 0xb842 +#define BCM56842_A0_REV_ID 1 +#define BCM56842_A1_REV_ID 2 +#define BCM56844_DEVICE_ID 0xb844 +#define BCM56844_A0_REV_ID 1 +#define BCM56844_A1_REV_ID 2 +#define BCM56846_DEVICE_ID 0xb846 +#define BCM56846_A0_REV_ID 1 +#define BCM56846_A1_REV_ID 2 +#define BCM56549_DEVICE_ID 0xb549 +#define BCM56549_A0_REV_ID 1 +#define BCM56549_A1_REV_ID 2 +#define BCM56053_DEVICE_ID 0xb053 +#define BCM56053_A0_REV_ID 1 +#define BCM56053_A1_REV_ID 2 +#define BCM56831_DEVICE_ID 0xb831 +#define BCM56831_A0_REV_ID 1 +#define BCM56831_A1_REV_ID 2 +#define BCM56835_DEVICE_ID 0xb835 +#define BCM56835_A0_REV_ID 1 +#define BCM56835_A1_REV_ID 2 +#define BCM56838_DEVICE_ID 0xb838 +#define BCM56838_A0_REV_ID 1 +#define BCM56838_A1_REV_ID 2 +#define BCM56847_DEVICE_ID 0xb847 +#define BCM56847_A0_REV_ID 1 +#define BCM56847_A1_REV_ID 2 +#define BCM56847_A2_REV_ID 3 +#define BCM56847_A3_REV_ID 4 +#define BCM56847_A4_REV_ID 5 +#define BCM56847_B0_REV_ID 0x11 +#define BCM56847_B1_REV_ID 0x12 +#define BCM56849_DEVICE_ID 0xb849 +#define BCM56849_A0_REV_ID 1 +#define BCM56849_A1_REV_ID 2 + +/* Titan Plus */ +#define BCM56742_DEVICE_ID 0xb742 +#define BCM56742_A0_REV_ID 1 +#define BCM56742_A1_REV_ID 2 +#define BCM56742_A2_REV_ID 3 +#define BCM56744_DEVICE_ID 0xb744 +#define BCM56744_A0_REV_ID 1 +#define BCM56744_A1_REV_ID 2 +#define BCM56746_DEVICE_ID 0xb746 +#define BCM56746_A0_REV_ID 1 +#define BCM56746_A1_REV_ID 2 + + +/* Triumph 3 */ +#define BCM56640_DEVICE_ID 0xb640 +#define BCM56640_A0_REV_ID 1 +#define BCM56640_A1_REV_ID 2 +#define BCM56640_B0_REV_ID 0x11 +#define BCM56643_DEVICE_ID 0xb643 +#define BCM56643_A0_REV_ID 1 +#define BCM56643_A1_REV_ID 2 +#define BCM56643_B0_REV_ID 0x11 +#define BCM56644_DEVICE_ID 0xb644 +#define BCM56644_A0_REV_ID 1 +#define BCM56644_A1_REV_ID 2 +#define BCM56644_B0_REV_ID 0x11 +#define BCM56648_DEVICE_ID 0xb648 +#define BCM56648_A0_REV_ID 1 +#define BCM56648_A1_REV_ID 2 +#define BCM56648_B0_REV_ID 0x11 +#define BCM56649_DEVICE_ID 0xb649 +#define BCM56649_A0_REV_ID 1 +#define BCM56649_A1_REV_ID 2 +#define BCM56649_B0_REV_ID 0x11 + +/* Apollo 2 */ +#define BCM56540_DEVICE_ID 0xb540 +#define BCM56540_A0_REV_ID 1 +#define BCM56540_A1_REV_ID 2 +#define BCM56540_B0_REV_ID 0x11 +#define BCM56541_DEVICE_ID 0xb541 +#define BCM56541_A0_REV_ID 1 +#define BCM56541_A1_REV_ID 2 +#define BCM56541_B0_REV_ID 0x11 +#define BCM56542_DEVICE_ID 0xb542 +#define BCM56542_A0_REV_ID 1 +#define BCM56542_A1_REV_ID 2 +#define BCM56542_B0_REV_ID 0x11 +#define BCM56543_DEVICE_ID 0xb543 +#define BCM56543_A0_REV_ID 1 +#define BCM56543_A1_REV_ID 2 +#define BCM56543_B0_REV_ID 0x11 +#define BCM56544_DEVICE_ID 0xb544 +#define BCM56544_A0_REV_ID 1 +#define BCM56544_A1_REV_ID 2 +#define BCM56544_B0_REV_ID 0x11 + +/* Firebolt 4 */ +#define BCM56545_DEVICE_ID 0xb545 +#define BCM56545_A0_REV_ID 1 +#define BCM56545_A1_REV_ID 2 +#define BCM56545_B0_REV_ID 0x11 +#define BCM56546_DEVICE_ID 0xb546 +#define BCM56546_A0_REV_ID 1 +#define BCM56546_A1_REV_ID 2 +#define BCM56546_B0_REV_ID 0x11 + +/* Ranger plus */ +#define BCM56044_DEVICE_ID 0xb044 +#define BCM56044_B0_REV_ID 0x11 +#define BCM56045_DEVICE_ID 0xb045 +#define BCM56045_A0_REV_ID 1 +#define BCM56045_A1_REV_ID 2 +#define BCM56045_B0_REV_ID 0x11 +#define BCM56046_DEVICE_ID 0xb046 +#define BCM56046_A0_REV_ID 1 +#define BCM56046_A1_REV_ID 2 +#define BCM56046_B0_REV_ID 0x11 + + +/* Katana */ +#define BCM56440_DEVICE_ID 0xb440 +#define BCM56440_A0_REV_ID 1 +#define BCM56440_B0_REV_ID 0x11 +#define BCM56441_DEVICE_ID 0xb441 +#define BCM56441_A0_REV_ID 1 +#define BCM56441_B0_REV_ID 0x11 +#define BCM56442_DEVICE_ID 0xb442 +#define BCM56442_A0_REV_ID 1 +#define BCM56442_B0_REV_ID 0x11 +#define BCM56443_DEVICE_ID 0xb443 +#define BCM56443_A0_REV_ID 1 +#define BCM56443_B0_REV_ID 0x11 +#define BCM56445_DEVICE_ID 0xb445 +#define BCM56445_A0_REV_ID 1 +#define BCM56445_B0_REV_ID 0x11 +#define BCM56446_DEVICE_ID 0xb446 +#define BCM56446_A0_REV_ID 1 +#define BCM56446_B0_REV_ID 0x11 +#define BCM56447_DEVICE_ID 0xb447 +#define BCM56447_A0_REV_ID 1 +#define BCM56447_B0_REV_ID 0x11 +#define BCM56448_DEVICE_ID 0xb448 +#define BCM56448_A0_REV_ID 1 +#define BCM56448_B0_REV_ID 0x11 +#define BCM56449_DEVICE_ID 0xb449 +#define BCM56449_A0_REV_ID 1 +#define BCM56449_B0_REV_ID 0x11 +#define BCM56240_DEVICE_ID 0xb240 +#define BCM56240_A0_REV_ID 1 +#define BCM56240_B0_REV_ID 0x11 +#define BCM56241_DEVICE_ID 0xb241 +#define BCM56241_A0_REV_ID 1 +#define BCM56241_B0_REV_ID 0x11 +#define BCM56242_DEVICE_ID 0xb242 +#define BCM56242_A0_REV_ID 1 +#define BCM56242_B0_REV_ID 0x11 +#define BCM56243_DEVICE_ID 0xb243 +#define BCM56243_A0_REV_ID 1 +#define BCM56243_B0_REV_ID 0x11 +#define BCM56245_DEVICE_ID 0xb245 +#define BCM56245_A0_REV_ID 1 +#define BCM56245_B0_REV_ID 0x11 +#define BCM56246_DEVICE_ID 0xb246 +#define BCM56246_A0_REV_ID 1 +#define BCM56246_B0_REV_ID 0x11 +#define BCM55440_DEVICE_ID 0xa440 +#define BCM55440_A0_REV_ID 1 +#define BCM55440_B0_REV_ID 0x11 +#define BCM55441_DEVICE_ID 0xa441 +#define BCM55441_A0_REV_ID 1 +#define BCM55441_B0_REV_ID 0x11 + +/* Katana 2 */ +#define BCM55450_DEVICE_ID 0xa450 +#define BCM55450_A0_REV_ID 1 +#define BCM55450_B0_REV_ID 0x11 +#define BCM55450_B1_REV_ID 0x12 + +#define BCM55455_DEVICE_ID 0xa455 +#define BCM55455_A0_REV_ID 1 +#define BCM55455_B0_REV_ID 0x11 +#define BCM55455_B1_REV_ID 0x12 + +#define BCM56248_DEVICE_ID 0xb248 +#define BCM56248_A0_REV_ID 1 +#define BCM56248_B0_REV_ID 0x11 +#define BCM56248_B1_REV_ID 0x12 + +#define BCM56450_DEVICE_ID 0xb450 +#define BCM56450_A0_REV_ID 1 +#define BCM56450_B0_REV_ID 0x11 +#define BCM56450_B1_REV_ID 0x12 + +#define BCM56452_DEVICE_ID 0xb452 +#define BCM56452_A0_REV_ID 1 +#define BCM56452_B0_REV_ID 0x11 +#define BCM56452_B1_REV_ID 0x12 + +#define BCM56454_DEVICE_ID 0xb454 +#define BCM56454_A0_REV_ID 1 +#define BCM56454_B0_REV_ID 0x11 +#define BCM56454_B1_REV_ID 0x12 + +#define BCM56455_DEVICE_ID 0xb455 +#define BCM56455_A0_REV_ID 1 +#define BCM56455_B0_REV_ID 0x11 +#define BCM56455_B1_REV_ID 0x12 + +#define BCM56456_DEVICE_ID 0xb456 +#define BCM56456_A0_REV_ID 1 +#define BCM56456_B0_REV_ID 0x11 +#define BCM56456_B1_REV_ID 0x12 + +#define BCM56457_DEVICE_ID 0xb457 +#define BCM56457_A0_REV_ID 1 +#define BCM56457_B0_REV_ID 0x11 +#define BCM56457_B1_REV_ID 0x12 + +#define BCM56458_DEVICE_ID 0xb458 +#define BCM56458_A0_REV_ID 1 +#define BCM56458_B0_REV_ID 0x11 +#define BCM56458_B1_REV_ID 0x12 + +/* Trident 2 */ +#define BCM56850_DEVICE_ID 0xb850 +#define BCM56850_A0_REV_ID 1 +#define BCM56850_A1_REV_ID 2 +#define BCM56850_A2_REV_ID 3 +#define BCM56851_DEVICE_ID 0xb851 +#define BCM56851_A0_REV_ID 1 +#define BCM56851_A1_REV_ID 2 +#define BCM56851_A2_REV_ID 3 +#define BCM56852_DEVICE_ID 0xb852 +#define BCM56852_A0_REV_ID 1 +#define BCM56852_A1_REV_ID 2 +#define BCM56852_A2_REV_ID 3 +#define BCM56853_DEVICE_ID 0xb853 +#define BCM56853_A0_REV_ID 1 +#define BCM56853_A1_REV_ID 2 +#define BCM56853_A2_REV_ID 3 +#define BCM56854_DEVICE_ID 0xb854 +#define BCM56854_A0_REV_ID 1 +#define BCM56854_A1_REV_ID 2 +#define BCM56854_A2_REV_ID 3 +#define BCM56855_DEVICE_ID 0xb855 +#define BCM56855_A0_REV_ID 1 +#define BCM56855_A1_REV_ID 2 +#define BCM56855_A2_REV_ID 3 +#define BCM56834_DEVICE_ID 0xb834 +#define BCM56834_A0_REV_ID 1 +#define BCM56834_A1_REV_ID 2 +#define BCM56834_A2_REV_ID 3 + +/* Trident 2+ */ +#define BCM56860_DEVICE_ID 0xb860 +#define BCM56860_A0_REV_ID 1 +#define BCM56860_A1_REV_ID 2 +#define BCM56861_DEVICE_ID 0xb861 +#define BCM56861_A0_REV_ID 1 +#define BCM56861_A1_REV_ID 2 +#define BCM56862_DEVICE_ID 0xb862 +#define BCM56862_A0_REV_ID 1 +#define BCM56862_A1_REV_ID 2 +#define BCM56864_DEVICE_ID 0xb864 +#define BCM56864_A0_REV_ID 1 +#define BCM56864_A1_REV_ID 2 +#define BCM56865_DEVICE_ID 0xb865 +#define BCM56865_A0_REV_ID 1 +#define BCM56865_A1_REV_ID 2 +#define BCM56866_DEVICE_ID 0xb866 +#define BCM56866_A0_REV_ID 1 +#define BCM56866_A1_REV_ID 2 +#define BCM56867_DEVICE_ID 0xb867 +#define BCM56867_A0_REV_ID 1 +#define BCM56867_A1_REV_ID 2 +#define BCM56868_DEVICE_ID 0xb868 +#define BCM56868_A0_REV_ID 1 +#define BCM56868_A1_REV_ID 2 +#define BCM56832_DEVICE_ID 0xb832 +#define BCM56832_A0_REV_ID 1 +#define BCM56832_A1_REV_ID 2 +#define BCM56833_DEVICE_ID 0xb833 +#define BCM56833_A0_REV_ID 1 +#define BCM56833_A1_REV_ID 2 +#define BCM56836_DEVICE_ID 0xb836 +#define BCM56836_A0_REV_ID 1 +#define BCM56836_A1_REV_ID 2 + + +/* Titan 2 */ +#define BCM56750_DEVICE_ID 0xb750 +#define BCM56750_A0_REV_ID 1 +#define BCM56750_A1_REV_ID 2 +#define BCM56750_A2_REV_ID 3 + +/* Scorpion 960 */ +#define BCM56830_DEVICE_ID 0xb830 +#define BCM56830_A0_REV_ID 1 +#define BCM56830_A1_REV_ID 2 +#define BCM56830_A2_REV_ID 3 + +/* Hurricane 2*/ +#define BCM56150_DEVICE_ID 0xb150 +#define BCM56150_A0_REV_ID 1 +#define BCM56151_DEVICE_ID 0xb151 +#define BCM56151_A0_REV_ID 1 +#define BCM56152_DEVICE_ID 0xb152 +#define BCM56152_A0_REV_ID 1 + +/* Wolfhound*/ +#define BCM53342_DEVICE_ID 0x8342 +#define BCM53342_A0_REV_ID 1 +#define BCM53343_DEVICE_ID 0x8343 +#define BCM53343_A0_REV_ID 1 +#define BCM53344_DEVICE_ID 0x8344 +#define BCM53344_A0_REV_ID 1 +#define BCM53346_DEVICE_ID 0x8346 +#define BCM53346_A0_REV_ID 1 +#define BCM53347_DEVICE_ID 0x8347 +#define BCM53347_A0_REV_ID 1 + +/* Foxhound*/ +#define BCM53333_DEVICE_ID 0x8333 +#define BCM53333_A0_REV_ID 1 +#define BCM53334_DEVICE_ID 0x8334 +#define BCM53334_A0_REV_ID 1 + +/* Deerhound*/ +#define BCM53393_DEVICE_ID 0x8393 +#define BCM53393_A0_REV_ID 1 +#define BCM53394_DEVICE_ID 0x8394 +#define BCM53394_A0_REV_ID 1 + +/* Greyhound , Ranger 2 */ +#define BCM53400_DEVICE_ID 0x8400 +#define BCM53400_A0_REV_ID 1 +#define BCM56060_DEVICE_ID 0xb060 +#define BCM56060_A0_REV_ID 1 +#define BCM56062_DEVICE_ID 0xb062 +#define BCM56062_A0_REV_ID 1 +#define BCM56063_DEVICE_ID 0xb063 +#define BCM56063_A0_REV_ID 1 +#define BCM56064_DEVICE_ID 0xb064 +#define BCM56064_A0_REV_ID 1 +#define BCM56065_DEVICE_ID 0xb065 +#define BCM56065_A0_REV_ID 1 +#define BCM56066_DEVICE_ID 0xb066 +#define BCM56066_A0_REV_ID 1 +#define BCM53401_DEVICE_ID 0x8401 +#define BCM53411_DEVICE_ID 0x8411 +#define BCM53401_A0_REV_ID 1 +#define BCM53402_DEVICE_ID 0x8402 +#define BCM53412_DEVICE_ID 0x8412 +#define BCM53402_A0_REV_ID 1 +#define BCM53403_DEVICE_ID 0x8403 +#define BCM53413_DEVICE_ID 0x8413 +#define BCM53403_A0_REV_ID 1 +#define BCM53404_DEVICE_ID 0x8404 +#define BCM53414_DEVICE_ID 0x8414 +#define BCM53404_A0_REV_ID 1 +#define BCM53405_DEVICE_ID 0x8405 +#define BCM53415_DEVICE_ID 0x8415 +#define BCM53405_A0_REV_ID 1 +#define BCM53406_DEVICE_ID 0x8406 +#define BCM53416_DEVICE_ID 0x8416 +#define BCM53406_A0_REV_ID 1 +#define BCM53408_DEVICE_ID 0x8408 +#define BCM53418_DEVICE_ID 0x8418 +#define BCM53408_A0_REV_ID 1 +#define BCM53365_DEVICE_ID 0x8365 +#define BCM53365_A0_REV_ID 1 +#define BCM53369_DEVICE_ID 0x8369 +#define BCM53369_A0_REV_ID 1 + +/* Elkhound */ +#define BCM53454_DEVICE_ID 0x8454 +#define BCM53455_DEVICE_ID 0x8455 +#define BCM53454_A0_REV_ID 1 +#define BCM53456_DEVICE_ID 0x8456 +#define BCM53457_DEVICE_ID 0x8457 +#define BCM53456_A0_REV_ID 1 + +/* Bloodhound */ +#define BCM53422_DEVICE_ID 0x8422 +#define BCM53422_A0_REV_ID 1 +#define BCM53424_DEVICE_ID 0x8424 +#define BCM53424_A0_REV_ID 1 +#define BCM53426_DEVICE_ID 0x8426 +#define BCM53426_A0_REV_ID 1 + +/* Tomahawk */ +#define BCM56960_DEVICE_ID 0xb960 +#define BCM56960_A0_REV_ID 1 +#define BCM56960_B0_REV_ID 0x11 +#define BCM56960_B1_REV_ID 0x12 +#define BCM56961_DEVICE_ID 0xb961 +#define BCM56961_A0_REV_ID 1 +#define BCM56961_B0_REV_ID 0x11 +#define BCM56961_B1_REV_ID 0x12 +#define BCM56962_DEVICE_ID 0xb962 +#define BCM56962_A0_REV_ID 1 +#define BCM56962_B0_REV_ID 0x11 +#define BCM56962_B1_REV_ID 0x12 +#define BCM56963_DEVICE_ID 0xb963 +#define BCM56963_A0_REV_ID 1 +#define BCM56963_B0_REV_ID 0x11 +#define BCM56963_B1_REV_ID 0x12 +#define BCM56930_DEVICE_ID 0xb930 +#define BCM56930_A0_REV_ID 1 +#define BCM56930_B0_REV_ID 0x11 +#define BCM56930_B1_REV_ID 0x12 +#define BCM56930_C0_REV_ID 0x21 +#define BCM56931_DEVICE_ID 0xb931 +#define BCM56931_A0_REV_ID 1 +#define BCM56931_B0_REV_ID 0x11 +#define BCM56931_C0_REV_ID 0x21 +#define BCM56935_DEVICE_ID 0xb935 +#define BCM56935_A0_REV_ID 1 +#define BCM56935_B0_REV_ID 0x11 +#define BCM56935_C0_REV_ID 0x21 +#define BCM56936_DEVICE_ID 0xb936 +#define BCM56936_A0_REV_ID 1 +#define BCM56936_B0_REV_ID 0x11 +#define BCM56936_C0_REV_ID 0x21 +#define BCM56939_DEVICE_ID 0xb939 +#define BCM56939_A0_REV_ID 1 +#define BCM56939_B0_REV_ID 0x11 +#define BCM56939_C0_REV_ID 0x21 + +/* Ranger3+ */ +#define BCM56168_DEVICE_ID 0xb168 +#define BCM56168_A0_REV_ID 1 +#define BCM56168_B0_REV_ID 0x11 +#define BCM56168_B1_REV_ID 0x12 +#define BCM56169_DEVICE_ID 0xb169 +#define BCM56169_A0_REV_ID 1 +#define BCM56169_B0_REV_ID 0x11 +#define BCM56169_B1_REV_ID 0x12 + +/* Tomahawk 3 */ +#define BCM56980_DEVICE_ID_MASK 0xFFF0 +#define BCM56980_DEVICE_ID 0xb980 +#define BCM56980_A0_REV_ID 1 +#define BCM56980_B0_REV_ID 0x11 +#define BCM56981_DEVICE_ID 0xb981 +#define BCM56981_A0_REV_ID 1 +#define BCM56981_B0_REV_ID 0x11 +#define BCM56982_DEVICE_ID 0xb982 +#define BCM56982_A0_REV_ID 1 +#define BCM56982_B0_REV_ID 0x11 +#define BCM56983_DEVICE_ID 0xb983 +#define BCM56983_A0_REV_ID 1 +#define BCM56983_B0_REV_ID 0x11 +#define BCM56984_DEVICE_ID 0xb984 +#define BCM56984_A0_REV_ID 1 +#define BCM56984_B0_REV_ID 0x11 + +/* Titanhawk */ +#define BCM56968_DEVICE_ID 0xb968 +#define BCM56968_A0_REV_ID 1 +#define BCM56968_B0_REV_ID 0x11 +#define BCM56968_B1_REV_ID 0x12 + +/* Hurricane 3 */ +#define BCM56160_DEVICE_ID 0xb160 +#define BCM56160_A0_REV_ID 1 +#define BCM56160_B0_REV_ID 0x11 +#define BCM56162_DEVICE_ID 0xb162 +#define BCM56162_A0_REV_ID 1 +#define BCM56162_B0_REV_ID 0x11 + +/* Hurricane3 Lite */ +#define BCM56163_DEVICE_ID 0xb163 +#define BCM56163_A0_REV_ID 1 +#define BCM56163_B0_REV_ID 0x11 +#define BCM56164_DEVICE_ID 0xb164 +#define BCM56164_A0_REV_ID 1 +#define BCM56164_B0_REV_ID 0x11 +#define BCM56166_DEVICE_ID 0xb166 +#define BCM56166_A0_REV_ID 1 +#define BCM56166_B0_REV_ID 0x11 + +/* Hurricane4 */ +#define BCM56273_DEVICE_ID 0xb273 +#define BCM56273_A0_REV_ID 1 +#define BCM56273_A1_REV_ID 2 + +#define BCM56274_DEVICE_ID 0xb274 +#define BCM56274_A0_REV_ID 1 +#define BCM56274_A1_REV_ID 2 + +#define BCM56275_DEVICE_ID 0xb275 +#define BCM56275_A0_REV_ID 1 +#define BCM56275_A1_REV_ID 2 + +#define BCM56276_DEVICE_ID 0xb276 +#define BCM56276_A0_REV_ID 1 +#define BCM56276_A1_REV_ID 2 + +#define BCM56277_DEVICE_ID 0xb277 +#define BCM56277_A0_REV_ID 1 +#define BCM56277_A1_REV_ID 2 + +#define BCM56278_DEVICE_ID 0xb278 +#define BCM56278_A0_REV_ID 1 +#define BCM56278_A1_REV_ID 2 + +#define BCM56279_DEVICE_ID 0xb279 +#define BCM56279_A1_REV_ID 2 + +#define BCM56575_DEVICE_ID 0xb575 +#define BCM56575_A1_REV_ID 2 + +#define BCM56175_DEVICE_ID 0xb175 +#define BCM56175_A1_REV_ID 2 + +#define BCM56176_DEVICE_ID 0xb176 +#define BCM56176_A1_REV_ID 2 + +/* Buckhound */ +#define BCM53440_DEVICE_ID 0x8440 +#define BCM53440_A0_REV_ID 1 +#define BCM53440_B0_REV_ID 0x11 +#define BCM53442_DEVICE_ID 0x8442 +#define BCM53442_A0_REV_ID 1 +#define BCM53442_B0_REV_ID 0x11 +#define BCM53443_DEVICE_ID 0x8443 +#define BCM53443_A0_REV_ID 1 +#define BCM53443_B0_REV_ID 0x11 + +/* Foxhound2 */ +#define BCM53434_DEVICE_ID 0x8434 +#define BCM53434_A0_REV_ID 1 +#define BCM53434_B0_REV_ID 0x11 + +/* Apache */ +#define BCM56560_DEVICE_ID 0xb560 +#define BCM56560_A0_REV_ID 1 +#define BCM56560_B0_REV_ID 0x11 + +#define BCM56561_DEVICE_ID 0xb561 +#define BCM56561_A0_REV_ID 1 +#define BCM56561_B0_REV_ID 0x11 + +#define BCM56562_DEVICE_ID 0xb562 +#define BCM56562_A0_REV_ID 1 +#define BCM56562_B0_REV_ID 0x11 + +/* MONTEREY */ +#define BCM56670_DEVICE_ID 0xb670 +#define BCM56670_A0_REV_ID 1 +#define BCM56670_B0_REV_ID 0x11 +#define BCM56670_C0_REV_ID 0x21 + + +#define BCM56671_DEVICE_ID 0xb671 +#define BCM56671_A0_REV_ID 1 +#define BCM56671_B0_REV_ID 0x11 +#define BCM56671_C0_REV_ID 0x21 + +#define BCM56672_DEVICE_ID 0xb672 +#define BCM56672_A0_REV_ID 1 +#define BCM56672_B0_REV_ID 0x11 +#define BCM56672_C0_REV_ID 0x21 + +#define BCM56675_DEVICE_ID 0xb675 +#define BCM56675_A0_REV_ID 1 +#define BCM56675_B0_REV_ID 0x11 +#define BCM56675_C0_REV_ID 0x21 + +/* WOLFHOUND3 PLUS */ +#define BCM53650_DEVICE_ID 0x8650 +#define BCM53650_A0_REV_ID 1 +#define BCM53650_B0_REV_ID 0x11 +#define BCM53650_C0_REV_ID 0x21 + +#define BCM53651_DEVICE_ID 0x8651 +#define BCM53651_A0_REV_ID 1 +#define BCM53651_B0_REV_ID 0x11 +#define BCM53651_C0_REV_ID 0x21 + +#define BCM53652_DEVICE_ID 0x8652 +#define BCM53652_A0_REV_ID 1 +#define BCM53652_B0_REV_ID 0x11 +#define BCM53652_C0_REV_ID 0x21 + +#define BCM53653_DEVICE_ID 0x8653 +#define BCM53653_A0_REV_ID 1 +#define BCM53653_B0_REV_ID 0x11 +#define BCM53653_C0_REV_ID 0x21 + +#define BCM53654_DEVICE_ID 0x8654 +#define BCM53654_A0_REV_ID 1 +#define BCM53654_B0_REV_ID 0x11 +#define BCM53654_C0_REV_ID 0x21 + +/* Firebolt-5 */ +#define BCM56565_DEVICE_ID 0xb565 +#define BCM56565_A0_REV_ID 1 +#define BCM56565_B0_REV_ID 0x11 + +#define BCM56566_DEVICE_ID 0xb566 +#define BCM56566_A0_REV_ID 1 +#define BCM56566_B0_REV_ID 0x11 + +#define BCM56567_DEVICE_ID 0xb567 +#define BCM56567_A0_REV_ID 1 +#define BCM56567_B0_REV_ID 0x11 + +#define BCM56568_DEVICE_ID 0xb568 +#define BCM56568_A0_REV_ID 1 +#define BCM56568_B0_REV_ID 0x11 + +/* Maverick */ +#define BCM56760_DEVICE_ID 0xb760 +#define BCM56760_A0_REV_ID 1 +#define BCM56760_A1_REV_ID 2 +#define BCM56760_B0_REV_ID 0x11 + + +#define BCM56761_DEVICE_ID 0xb761 +#define BCM56761_A0_REV_ID 1 +#define BCM56761_A1_REV_ID 2 +#define BCM56761_B0_REV_ID 0x11 +#define BCM56761_B1_REV_ID 0x12 + +#define BCM56762_DEVICE_ID 0xb762 +#define BCM56762_A0_REV_ID 1 +#define BCM56762_B0_REV_ID 0x11 + +#define BCM56764_DEVICE_ID 0xb764 +#define BCM56764_A0_REV_ID 1 +#define BCM56764_B0_REV_ID 0x11 + +#define BCM56765_DEVICE_ID 0xb765 +#define BCM56765_A0_REV_ID 1 +#define BCM56765_B0_REV_ID 0x11 + +#define BCM56766_DEVICE_ID 0xb766 +#define BCM56766_A0_REV_ID 1 +#define BCM56766_B0_REV_ID 0x11 + +#define BCM56768_DEVICE_ID 0xb768 +#define BCM56768_A0_REV_ID 1 +#define BCM56768_B0_REV_ID 0x11 + +/* Ranger 2+ */ +#define BCM56068_DEVICE_ID 0xb068 +#define BCM56068_A0_REV_ID 1 +#define BCM56068_B0_REV_ID 0x11 +#define BCM56068_B1_REV_ID 0x12 + +#define BCM56069_DEVICE_ID 0xb069 +#define BCM56069_A0_REV_ID 1 +#define BCM56069_B0_REV_ID 0x11 + +/* Hurricane3-MG */ +#define BCM56170_DEVICE_ID 0xb170 +#define BCM56170_A0_REV_ID 1 +#define BCM56170_B0_REV_ID 0x11 +#define BCM56172_DEVICE_ID 0xb172 +#define BCM56172_A0_REV_ID 1 +#define BCM56172_B0_REV_ID 0x11 +#define BCM56174_DEVICE_ID 0xb174 +#define BCM56174_A0_REV_ID 1 +#define BCM56174_B0_REV_ID 0x11 + +/* Quartz, Greyhound 2 */ +#define BCM53570_DEVICE_ID 0x8570 +#define BCM53570_A0_REV_ID 1 +#define BCM53570_B0_REV_ID 0x11 +#define BCM53575_DEVICE_ID 0x8575 +#define BCM53575_A0_REV_ID 1 +#define BCM53575_B0_REV_ID 0x11 + +/* FireLight */ +#define BCM56070_DEVICE_ID 0xb070 +#define BCM56070_A0_REV_ID 1 +#define BCM56071_DEVICE_ID 0xb071 +#define BCM56071_A0_REV_ID 1 +#define BCM56072_DEVICE_ID 0xb072 +#define BCM56072_A0_REV_ID 1 + + +/* Tomahawk+ */ +#define BCM56965_DEVICE_ID 0xb965 +#define BCM56965_A0_REV_ID 1 +#define BCM56965_A1_REV_ID 2 +#define BCM56969_DEVICE_ID 0xb969 /* Corresponds to TH 56961 */ +#define BCM56969_A0_REV_ID 1 +#define BCM56966_DEVICE_ID 0xb966 /* Corresponds to TH 56962 */ +#define BCM56966_A0_REV_ID 1 +#define BCM56967_DEVICE_ID 0xb967 /* Corresponds to TH 56963 */ +#define BCM56967_A0_REV_ID 1 + +/* Tomahawk 2 */ +#define BCM56970_DEVICE_ID 0xb970 +#define BCM56970_A0_REV_ID 1 +#define BCM56970_B0_REV_ID 0x11 +#define BCM56971_DEVICE_ID 0xb971 +#define BCM56971_A0_REV_ID 1 +#define BCM56971_B0_REV_ID 0x11 +#define BCM56972_DEVICE_ID 0xb972 +#define BCM56972_A0_REV_ID 1 +#define BCM56972_B0_REV_ID 0x11 +#define BCM56974_DEVICE_ID 0xb974 +#define BCM56974_A0_REV_ID 1 +#define BCM56974_B0_REV_ID 0x11 +#define BCM56975_DEVICE_ID 0xb975 +#define BCM56975_A0_REV_ID 1 +#define BCM56975_B0_REV_ID 0x11 + +/* Trident3 */ +#define BCM56870_DEVICE_ID 0xb870 +#define BCM56870_A0_REV_ID 1 +#define BCM56873_DEVICE_ID 0xb873 +#define BCM56873_A0_REV_ID 1 + +/* Helix5 */ +#define BCM56370_DEVICE_ID 0xb370 +#define BCM56370_A0_REV_ID 1 +#define BCM56370_A1_REV_ID 0x02 +#define BCM56370_A2_REV_ID 0x03 + +#define BCM56371_DEVICE_ID 0xb371 +#define BCM56371_A0_REV_ID 1 +#define BCM56371_A1_REV_ID 0x02 +#define BCM56371_A2_REV_ID 0x03 + +#define BCM56372_DEVICE_ID 0xb372 +#define BCM56372_A0_REV_ID 1 +#define BCM56372_A1_REV_ID 0x02 +#define BCM56372_A2_REV_ID 0x03 + +#define BCM56374_DEVICE_ID 0xb374 +#define BCM56374_A0_REV_ID 1 +#define BCM56374_A1_REV_ID 0x02 +#define BCM56374_A2_REV_ID 0x03 + +#define BCM56375_DEVICE_ID 0xb375 +#define BCM56375_A0_REV_ID 1 +#define BCM56375_A1_REV_ID 0x02 +#define BCM56375_A2_REV_ID 0x03 + +#define BCM56376_DEVICE_ID 0xb376 +#define BCM56376_A0_REV_ID 1 +#define BCM56376_A1_REV_ID 0x02 +#define BCM56376_A2_REV_ID 0x03 + +#define BCM56377_DEVICE_ID 0xb377 +#define BCM56377_A0_REV_ID 1 +#define BCM56377_A1_REV_ID 0x02 +#define BCM56377_A2_REV_ID 0x03 + +#define BCM56577_DEVICE_ID 0xb577 +#define BCM56577_A0_REV_ID 1 +#define BCM56577_A1_REV_ID 0x02 +#define BCM56577_A2_REV_ID 0x03 + +#define BCM56578_DEVICE_ID 0xb578 +#define BCM56578_A0_REV_ID 1 +#define BCM56578_A1_REV_ID 0x02 +#define BCM56578_A2_REV_ID 0x03 + +#define BCM56579_DEVICE_ID 0xb579 +#define BCM56579_A0_REV_ID 1 +#define BCM56579_A1_REV_ID 0x02 +#define BCM56579_A2_REV_ID 0x03 + +/* Maverick2 */ +#define BCM56770_DEVICE_ID 0xb770 +#define BCM56770_A0_REV_ID 1 + +#define BCM56771_DEVICE_ID 0xb771 +#define BCM56771_A0_REV_ID 1 + +/* Firebolt6 */ +#define BCM56470_DEVICE_ID 0xb470 +#define BCM56470_A0_REV_ID 1 +#define BCM56471_DEVICE_ID 0xb471 +#define BCM56471_A0_REV_ID 1 +#define BCM56472_DEVICE_ID 0xb472 +#define BCM56472_A0_REV_ID 1 +#define BCM56475_DEVICE_ID 0xb475 +#define BCM56475_A0_REV_ID 1 +#define BCM56474_DEVICE_ID 0xb474 +#define BCM56474_A0_REV_ID 1 + + +/* Wolfhound2 (Hurricane3-CR)*/ +#define BCM53540_DEVICE_ID 0x8540 +#define BCM53540_A0_REV_ID 1 +#define BCM53547_DEVICE_ID 0x8547 +#define BCM53547_A0_REV_ID 1 +#define BCM53548_DEVICE_ID 0x8548 +#define BCM53548_A0_REV_ID 1 +#define BCM53549_DEVICE_ID 0x8549 +#define BCM53549_A0_REV_ID 1 + +/* Wolfhound3 */ +#define BCM53642_DEVICE_ID 0x8642 +#define BCM53642_A0_REV_ID 1 + +/* + * BCM5665: Tucana48 (48+4+1) + * BCM5665L: Tucana24 (24+4+1) + * BCM5666: Tucana48 (48+4+1) without L3 + * BCM5666L: Tucana24 (24+4+1) without L3 + * + * The device ID is 0x5665 for all of these parts. For BCM5665L and + * BCM5666L, the pbmp_valid property must be set to invalidate fe24-fe47 + * (see $SDK/rc/config.bcm). + */ +#define BCM5665_DEVICE_ID 0x5665 +#define BCM5665_A0_REV_ID 1 +#define BCM5665_B0_REV_ID 0x11 + + +/* + * BCM5655: Titanium48 (48+4) + * BCM5656: Titanium48 (48+4) without L3 + * + * The device ID is 0x5655 for both parts. + */ +#define BCM5655_DEVICE_ID 0x5655 +#define BCM5655_A0_REV_ID 1 +#define BCM5655_B0_REV_ID 0x11 + + +/* + * BCM5650: Titanium-II (24+4) + * BCM5651: Titanium-II (24+4) without L3 + * + * The device ID is 0x5650 for both parts. + * BCM5650C0 is the first spin of a real 24+4 cost-reduced chip. + */ +#define BCM5650_DEVICE_ID 0x5650 +#define BCM5650_A0_REV_ID 1 +#define BCM5650_B0_REV_ID 0x11 +#define BCM5650_C0_REV_ID 0x21 + +#define BROADCOM_PHYID_HIGH 0x0040 + +/* Define Dune device IDs */ +#define ARAD_DEVICE_ID 0x8650 +#define ARAD_A0_REV_ID 0x0000 +#define ARAD_B0_REV_ID 0x0011 +#define ARAD_B1_REV_ID 0x0012 +#define BCM88770_DEVICE_ID 0x8770 +#define BCM88770_A1_REV_ID 0x0002 +#define BCM88773_DEVICE_ID 0x8773 +#define BCM88773_A1_REV_ID 0x0002 +#define BCM88774_DEVICE_ID 0x8774 +#define BCM88774_A1_REV_ID 0x0002 +#define BCM88775_DEVICE_ID 0x8775 +#define BCM88775_A1_REV_ID 0x0002 +#define BCM88776_DEVICE_ID 0x8776 +#define BCM88776_A1_REV_ID 0x0002 +#define BCM88777_DEVICE_ID 0x8777 +#define BCM88777_A1_REV_ID 0x0002 +#define BCM88950_DEVICE_ID 0x8950 +#define BCM88950_A0_REV_ID 0x0001 +#define BCM88950_A1_REV_ID 0x0002 +#define BCM88953_DEVICE_ID 0x8953 +#define BCM88953_A1_REV_ID 0x0002 +#define BCM88954_DEVICE_ID 0x8954 +#define BCM88954_A1_REV_ID 0x0002 +#define BCM88955_DEVICE_ID 0x8955 +#define BCM88955_A1_REV_ID 0x0002 +#define BCM88956_DEVICE_ID 0x8956 +#define BCM88956_A1_REV_ID 0x0002 +#define DNXC_A0_REV_ID 0x0001 +#define DNXC_A1_REV_ID 0x0002 +#define DNXC_A2_REV_ID 0x0003 +#define DNXC_B0_REV_ID 0x0011 +#define DNXC_B1_REV_ID 0x0012 +#define DNXC_B2_REV_ID 0x0013 +#define DNXC_C0_REV_ID 0x0021 +#define DNXC_C1_REV_ID 0x0022 +#define DNXC_C2_REV_ID 0x0023 +#define DNXC_D0_REV_ID 0x0031 +#define DNXC_D1_REV_ID 0x0032 +#define DNXC_DEVID_FAMILY_MASK 0xfff0 +#define BCM88790_DEVICE_ID 0x8790 +#define BCM88790_A0_REV_ID DNXC_A0_REV_ID +#define BCM88790_B0_REV_ID DNXC_B0_REV_ID +#define BCM88791_DEVICE_ID 0x8791 +#define BCM88792_DEVICE_ID 0x8792 +#define BCM88793_DEVICE_ID 0x8793 +#define BCM88794_DEVICE_ID 0x8794 +#define BCM88795_DEVICE_ID 0x8795 +#define BCM88796_DEVICE_ID 0x8796 +#define BCM88797_DEVICE_ID 0x8797 +#define BCM88798_DEVICE_ID 0x8798 +#define BCM88799_DEVICE_ID 0x8799 +#define BCM8879A_DEVICE_ID 0x879A +#define BCM8879B_DEVICE_ID 0x879B +#define BCM8879C_DEVICE_ID 0x879C +#define BCM8879D_DEVICE_ID 0x879D +#define BCM8879E_DEVICE_ID 0x879E +#define BCM8879F_DEVICE_ID 0x879F +#ifdef BCM_DNXF3_SUPPORT +#define RAMON2_DEVICE_ID 0x8910 +#define BCM8891F_DEVICE_ID 0x891F +#define RAMON3_DEVICE_ID 0x8920 +#endif +#define ARADPLUS_DEVICE_ID 0x8660 +#define ARADPLUS_A0_REV_ID 0x0001 +#define BCM88660_DEVICE_ID ARADPLUS_DEVICE_ID +#define BCM88660_A0_REV_ID ARADPLUS_A0_REV_ID +/* Jericho */ +#define JERICHO_DEVICE_ID 0x8675 +#define JERICHO_A0_REV_ID 0x0001 +#define JERICHO_B0_REV_ID 0x0011 +#define JERICHO_A1_REV_ID 0x0002 +/* Jericho SKUs */ +#define BCM88670_DEVICE_ID 0x8670 +#define BCM88670_A0_REV_ID JERICHO_A0_REV_ID +#define BCM88670_A1_REV_ID JERICHO_A1_REV_ID +#define BCM88671_DEVICE_ID 0x8671 +#define BCM88671_A0_REV_ID JERICHO_A0_REV_ID +#define BCM88671_A1_REV_ID JERICHO_A1_REV_ID +#define BCM88671M_DEVICE_ID 0x867A +#define BCM88671M_A0_REV_ID JERICHO_A0_REV_ID +#define BCM88671M_A1_REV_ID JERICHO_A1_REV_ID + +#define BCM88670_B0_REV_ID JERICHO_B0_REV_ID +#define BCM88671_B0_REV_ID JERICHO_B0_REV_ID +#define BCM88671M_B0_REV_ID JERICHO_B0_REV_ID + +#define BCM88672_DEVICE_ID 0x8672 +#define BCM88672_A0_REV_ID JERICHO_A0_REV_ID +#define BCM88672_A1_REV_ID JERICHO_A1_REV_ID + +#define BCM88672_B0_REV_ID JERICHO_B0_REV_ID + +#define BCM88673_DEVICE_ID 0x8673 +#define BCM88673_A0_REV_ID JERICHO_A0_REV_ID +#define BCM88673_A1_REV_ID JERICHO_A1_REV_ID +#define BCM88674_DEVICE_ID 0x8674 +#define BCM88674_A0_REV_ID JERICHO_A0_REV_ID +#define BCM88674_A1_REV_ID JERICHO_A1_REV_ID +#define BCM88675_DEVICE_ID JERICHO_DEVICE_ID +#define BCM88675_A0_REV_ID JERICHO_A0_REV_ID +#define BCM88675_A1_REV_ID JERICHO_A1_REV_ID +#define BCM88675M_DEVICE_ID 0x867B +#define BCM88675M_A0_REV_ID JERICHO_A0_REV_ID +#define BCM88675M_A1_REV_ID JERICHO_A1_REV_ID +#define BCM88676_DEVICE_ID 0x8676 +#define BCM88676_A0_REV_ID JERICHO_A0_REV_ID +#define BCM88676_A1_REV_ID JERICHO_A1_REV_ID +#define BCM88676M_DEVICE_ID 0x867C +#define BCM88676M_A0_REV_ID JERICHO_A0_REV_ID +#define BCM88676M_A1_REV_ID JERICHO_A1_REV_ID +#define BCM88677_DEVICE_ID 0x8677 +#define BCM88677_A0_REV_ID JERICHO_A0_REV_ID +#define BCM88677_A1_REV_ID JERICHO_A1_REV_ID +#define BCM88678_DEVICE_ID 0x8678 +#define BCM88678_A0_REV_ID JERICHO_A0_REV_ID +#define BCM88678_A1_REV_ID JERICHO_A1_REV_ID +#define BCM88679_DEVICE_ID 0x8679 +#define BCM88679_A0_REV_ID JERICHO_A0_REV_ID +#define BCM88679_A1_REV_ID JERICHO_A1_REV_ID + +#define BCM88673_B0_REV_ID JERICHO_B0_REV_ID +#define BCM88674_B0_REV_ID JERICHO_B0_REV_ID +#define BCM88675_B0_REV_ID JERICHO_B0_REV_ID +#define BCM88675M_B0_REV_ID JERICHO_B0_REV_ID +#define BCM88676_B0_REV_ID JERICHO_B0_REV_ID +#define BCM88676M_B0_REV_ID JERICHO_B0_REV_ID +#define BCM88677_B0_REV_ID JERICHO_B0_REV_ID +#define BCM88678_B0_REV_ID JERICHO_B0_REV_ID +#define BCM88679_B0_REV_ID JERICHO_B0_REV_ID +/* Qumran MX */ +#define QMX_DEVICE_ID 0x8375 +#define QMX_A0_REV_ID 0x0001 +#define QMX_B0_REV_ID 0x0011 +#define QMX_A1_REV_ID 0x0002 +/* Qumran MX SKUs*/ +#define BCM88370_DEVICE_ID 0x8370 +#define BCM88370_A0_REV_ID QMX_A0_REV_ID +#define BCM88370_A1_REV_ID QMX_A1_REV_ID +#define BCM88371_DEVICE_ID 0x8371 +#define BCM88371_A0_REV_ID QMX_A0_REV_ID +#define BCM88371_A1_REV_ID QMX_A1_REV_ID +#define BCM88371M_DEVICE_ID 0x837A +#define BCM88371M_A0_REV_ID QMX_A0_REV_ID +#define BCM88371M_A1_REV_ID QMX_A1_REV_ID +#define BCM88375_DEVICE_ID QMX_DEVICE_ID +#define BCM88375_A0_REV_ID QMX_A0_REV_ID +#define BCM88375_A1_REV_ID QMX_A1_REV_ID +#define BCM88376_DEVICE_ID 0x8376 +#define BCM88376_A0_REV_ID QMX_A0_REV_ID +#define BCM88376_A1_REV_ID QMX_A1_REV_ID +#define BCM88376M_DEVICE_ID 0x837B +#define BCM88376M_A0_REV_ID QMX_A0_REV_ID +#define BCM88376M_A1_REV_ID QMX_A1_REV_ID +#define BCM88377_DEVICE_ID 0x8377 +#define BCM88377_A0_REV_ID QMX_A0_REV_ID +#define BCM88377_A1_REV_ID QMX_A1_REV_ID +#define BCM88378_DEVICE_ID 0x8378 +#define BCM88378_A0_REV_ID QMX_A0_REV_ID +#define BCM88378_A1_REV_ID QMX_A1_REV_ID +#define BCM88379_DEVICE_ID 0x8379 +#define BCM88379_A0_REV_ID QMX_A0_REV_ID +#define BCM88379_A1_REV_ID QMX_A1_REV_ID + +#define BCM88370_B0_REV_ID QMX_B0_REV_ID +#define BCM88371_B0_REV_ID QMX_B0_REV_ID +#define BCM88371M_B0_REV_ID QMX_B0_REV_ID +#define BCM88375_B0_REV_ID QMX_B0_REV_ID +#define BCM88376_B0_REV_ID QMX_B0_REV_ID +#define BCM88376M_B0_REV_ID QMX_B0_REV_ID +#define BCM88377_B0_REV_ID QMX_B0_REV_ID +#define BCM88378_B0_REV_ID QMX_B0_REV_ID +#define BCM88379_B0_REV_ID QMX_B0_REV_ID + + +#define JERICHO_PLUS_DEVICE_ID 0x8680 +#define JERICHO_PLUS_A0_REV_ID 0x0001 +#define BCM88680_DEVICE_ID JERICHO_PLUS_DEVICE_ID +#define BCM88680_A0_REV_ID JERICHO_PLUS_A0_REV_ID +#define BCM88680_A1_REV_ID 0x0002 + + +#define BCM88681_DEVICE_ID 0x8681 +#define BCM88681_A0_REV_ID JERICHO_PLUS_A0_REV_ID + +#define BCM88682_DEVICE_ID 0x8682 +#define BCM88682_A0_REV_ID JERICHO_PLUS_A0_REV_ID + +#define BCM88683_DEVICE_ID 0x8683 +#define BCM88683_A0_REV_ID JERICHO_PLUS_A0_REV_ID + +#define BCM88684_DEVICE_ID 0x8684 +#define BCM88684_A0_REV_ID JERICHO_PLUS_A0_REV_ID + +#define BCM88685_DEVICE_ID 0x8685 +#define BCM88685_A0_REV_ID JERICHO_PLUS_A0_REV_ID + +#define BCM88687_DEVICE_ID 0x8687 +#define BCM88687_A0_REV_ID JERICHO_PLUS_A0_REV_ID + +#define BCM88380_DEVICE_ID 0x8380 +#define BCM88380_A0_REV_ID JERICHO_PLUS_A0_REV_ID +#define BCM88381_DEVICE_ID 0x8381 +#define BCM88381_A0_REV_ID JERICHO_PLUS_A0_REV_ID + +#define JERICHO2_DEVICE_ID 0x8690 +#define JERICHO2_A0_REV_ID DNXC_A0_REV_ID +#define JERICHO2_B0_REV_ID DNXC_B0_REV_ID +#define JERICHO2_B1_REV_ID DNXC_B1_REV_ID +#define BCM88690_DEVICE_ID JERICHO2_DEVICE_ID +#define BCM88690_A0_REV_ID JERICHO2_A0_REV_ID +#define BCM88690_B0_REV_ID JERICHO2_B0_REV_ID +#define BCM88690_B1_REV_ID JERICHO2_B1_REV_ID +#define BCM88691_DEVICE_ID 0x8691 +#define BCM88692_DEVICE_ID 0x8692 +#define BCM88693_DEVICE_ID 0x8693 +#define BCM88694_DEVICE_ID 0x8694 +#define BCM88695_DEVICE_ID 0x8695 +#define BCM88696_DEVICE_ID 0x8696 +#define BCM88697_DEVICE_ID 0x8697 +#define BCM88698_DEVICE_ID 0x8698 +#define BCM88699_DEVICE_ID 0x8699 +#define BCM8869A_DEVICE_ID 0x869A +#define BCM8869B_DEVICE_ID 0x869B +#define BCM8869C_DEVICE_ID 0x869C +#define BCM8869D_DEVICE_ID 0x869D +#define BCM8869E_DEVICE_ID 0x869E +#define BCM8869F_DEVICE_ID 0x869F + +#define J2C_DEVICE_ID 0x8800 +#define J2C_2ND_DEVICE_ID 0x8820 +#define J2C_DEVID_FAMILY_MASK 0xffd0 +#define J2C_A0_REV_ID DNXC_A0_REV_ID +#define J2C_A1_REV_ID DNXC_A1_REV_ID +#define BCM88800_DEVICE_ID J2C_DEVICE_ID +#define BCM88820_DEVICE_ID J2C_2ND_DEVICE_ID +#define BCM88800_A0_REV_ID J2C_A0_REV_ID +#define BCM88800_A1_REV_ID J2C_A1_REV_ID +#define BCM88801_DEVICE_ID 0x8801 +#define BCM88802_DEVICE_ID 0x8802 +#define BCM88803_DEVICE_ID 0x8803 +#define BCM88804_DEVICE_ID 0x8804 +#define BCM88805_DEVICE_ID 0x8805 +#define BCM88806_DEVICE_ID 0x8806 +#define BCM88807_DEVICE_ID 0x8807 +#define BCM88808_DEVICE_ID 0x8808 +#define BCM88809_DEVICE_ID 0x8809 +#define BCM8880A_DEVICE_ID 0x880A +#define BCM8880B_DEVICE_ID 0x880B +#define BCM8880C_DEVICE_ID 0x880C +#define BCM8880D_DEVICE_ID 0x880D +#define BCM8880E_DEVICE_ID 0x880E +#define BCM8880F_DEVICE_ID 0x880F +#define BCM88821_DEVICE_ID 0x8821 +#define BCM88822_DEVICE_ID 0x8822 +#define BCM88823_DEVICE_ID 0x8823 +#define BCM88824_DEVICE_ID 0x8824 +#define BCM88825_DEVICE_ID 0x8825 +#define BCM88826_DEVICE_ID 0x8826 +#define BCM88827_DEVICE_ID 0x8827 +#define BCM88828_DEVICE_ID 0x8828 +#define BCM88829_DEVICE_ID 0x8829 +#define BCM8882A_DEVICE_ID 0x882A +#define BCM8882B_DEVICE_ID 0x882B +#define BCM8882C_DEVICE_ID 0x882C +#define BCM8882D_DEVICE_ID 0x882D +#define BCM8882E_DEVICE_ID 0x882E +#define BCM8882F_DEVICE_ID 0x882F + +#define J2P_DEVICE_ID 0x8850 +#define J2P_A0_REV_ID DNXC_A0_REV_ID +#define J2P_A1_REV_ID DNXC_A1_REV_ID +#define J2P_A2_REV_ID DNXC_A2_REV_ID +#define BCM88850_DEVICE_ID J2P_DEVICE_ID +#define BCM88850_A0_REV_ID J2P_A0_REV_ID +#define BCM88850_A1_REV_ID J2P_A1_REV_ID +#define BCM88850_A2_REV_ID J2P_A2_REV_ID +#define BCM88851_DEVICE_ID 0x8851 +#define BCM88852_DEVICE_ID 0x8852 +#define BCM88853_DEVICE_ID 0x8853 +#define BCM88854_DEVICE_ID 0x8854 +#define BCM88855_DEVICE_ID 0x8855 +#define BCM88856_DEVICE_ID 0x8856 +#define BCM88857_DEVICE_ID 0x8857 +#define BCM88858_DEVICE_ID 0x8858 +#define BCM88859_DEVICE_ID 0x8859 +#define BCM8885A_DEVICE_ID 0x885A +#define BCM8885B_DEVICE_ID 0x885B +#define BCM8885C_DEVICE_ID 0x885C +#define BCM8885D_DEVICE_ID 0x885D +#define BCM8885E_DEVICE_ID 0x885E +#define BCM8885F_DEVICE_ID 0x885F + +#define BCM88840_DEVICE_ID 0x8840 +#define BCM88841_DEVICE_ID 0x8841 +#define BCM88842_DEVICE_ID 0x8842 +#define BCM88843_DEVICE_ID 0x8843 +#define BCM88844_DEVICE_ID 0x8844 +#define BCM88845_DEVICE_ID 0x8845 +#define BCM88846_DEVICE_ID 0x8846 +#define BCM88847_DEVICE_ID 0x8847 +#define BCM88848_DEVICE_ID 0x8848 +#define BCM88849_DEVICE_ID 0x8849 +#define BCM8884A_DEVICE_ID 0x884A +#define BCM8884B_DEVICE_ID 0x884B +#define BCM8884C_DEVICE_ID 0x884C +#define BCM8884D_DEVICE_ID 0x884D +#define BCM8884E_DEVICE_ID 0x884E +#define BCM8884F_DEVICE_ID 0x884F + +#define BCM88810_DEVICE_ID 0x8810 +#define BCM88811_DEVICE_ID 0x8811 +#define BCM88812_DEVICE_ID 0x8812 +#define BCM88813_DEVICE_ID 0x8813 +#define BCM88814_DEVICE_ID 0x8814 +#define BCM88815_DEVICE_ID 0x8815 +#define BCM88816_DEVICE_ID 0x8816 +#define BCM88817_DEVICE_ID 0x8817 +#define BCM88818_DEVICE_ID 0x8818 +#define BCM88819_DEVICE_ID 0x8819 +#define BCM8881A_DEVICE_ID 0x881A +#define BCM8881B_DEVICE_ID 0x881B +#define BCM8881C_DEVICE_ID 0x881C +#define BCM8881D_DEVICE_ID 0x881D +#define BCM8881E_DEVICE_ID 0x881E +#define BCM8881F_DEVICE_ID 0x881F + +#define J2X_DEVICE_ID 0x8830 +#define J2X_A0_REV_ID DNXC_A0_REV_ID +#define BCM88830_DEVICE_ID J2X_DEVICE_ID +#define BCM88830_A0_REV_ID J2X_A0_REV_ID +#define BCM88831_DEVICE_ID 0x8831 +#define BCM88832_DEVICE_ID 0x8832 +#define BCM88833_DEVICE_ID 0x8833 +#define BCM88834_DEVICE_ID 0x8834 +#define BCM88835_DEVICE_ID 0x8835 +#define BCM88836_DEVICE_ID 0x8836 +#define BCM88837_DEVICE_ID 0x8837 +#define BCM88838_DEVICE_ID 0x8838 +#define BCM88839_DEVICE_ID 0x8839 +#define BCM8883A_DEVICE_ID 0x883A +#define BCM8883B_DEVICE_ID 0x883B +#define BCM8883C_DEVICE_ID 0x883C +#define BCM8883D_DEVICE_ID 0x883D +#define BCM8883E_DEVICE_ID 0x883E +#define BCM8883F_DEVICE_ID 0x883F + +#define J2Z_DEVICE_ID 0x216 +#define J2Z_A0_REV_ID DNXC_A0_REV_ID +#define BCM8216_DEVICE_ID J2Z_DEVICE_ID +#define BCM8216_A0_REV_ID J2Z_A0_REV_ID + +#ifdef BCM_DNX3_SUPPORT +#define JERICHO3_DEVICE_ID 0x8860 +#define Q3_DEVICE_ID_START 0x886a +#define Q3_DEVICE_ID_END 0x886f +#define J3AI_DEVICE_ID 0x8890 +#define Q3D_DEVICE_ID 0x8870 +#ifdef BCM_Q3A_SUPPORT +#define Q3A_DEVICE_ID 0x8490 +#define Q3U_DEVICE_ID 0x84A0 +#define Q3N_DEVICE_ID 0x84A5 +#define Q3U_ORIG_DEVICE_ID 0x8400 +#define Q3N_ORIG_DEVICE_ID 0x8405 +#endif +#endif +#define Q2A_DEVICE_ID 0x8480 +#define Q2A_A0_REV_ID DNXC_A0_REV_ID +#define Q2A_B0_REV_ID DNXC_B0_REV_ID +#define Q2A_B1_REV_ID DNXC_B1_REV_ID +#define BCM88480_DEVICE_ID Q2A_DEVICE_ID +#define BCM88480_A0_REV_ID Q2A_A0_REV_ID +#define BCM88480_B0_REV_ID Q2A_B0_REV_ID +#define BCM88480_B1_REV_ID Q2A_B1_REV_ID +#define BCM88481_DEVICE_ID 0x8481 +#define BCM88482_DEVICE_ID 0x8482 +#define BCM88483_DEVICE_ID 0x8483 +#define BCM88484_DEVICE_ID 0x8484 +#define BCM88485_DEVICE_ID 0x8485 +#define BCM88486_DEVICE_ID 0x8486 +#define BCM88487_DEVICE_ID 0x8487 +#define BCM88488_DEVICE_ID 0x8488 +#define BCM88489_DEVICE_ID 0x8489 +#define BCM8848A_DEVICE_ID 0x848A +#define BCM8848B_DEVICE_ID 0x848B +#define BCM8848C_DEVICE_ID 0x848C +#define BCM8848D_DEVICE_ID 0x848D +#define BCM8848E_DEVICE_ID 0x848E +#define BCM8848F_DEVICE_ID 0x848F + +#define Q2U_DEVICE_ID 0x8280 +#define BCM88280_DEVICE_ID Q2U_DEVICE_ID +#define BCM88281_DEVICE_ID 0x8281 +#define BCM88282_DEVICE_ID 0x8282 +#define BCM88283_DEVICE_ID 0x8283 +#define BCM88284_DEVICE_ID 0x8284 +#define BCM88285_DEVICE_ID 0x8285 +#define BCM88286_DEVICE_ID 0x8286 +#define BCM88287_DEVICE_ID 0x8287 +#define BCM88288_DEVICE_ID 0x8288 +#define BCM88289_DEVICE_ID 0x8289 +#define BCM8828A_DEVICE_ID 0x828A +#define BCM8828B_DEVICE_ID 0x828B +#define BCM8828C_DEVICE_ID 0x828C +#define BCM8828D_DEVICE_ID 0x828D +#define BCM8828E_DEVICE_ID 0x828E +#define BCM8828F_DEVICE_ID 0x828F + +#define Q2N_DEVICE_ID 0x8290 +#define BCM88290_DEVICE_ID Q2N_DEVICE_ID +#define BCM88291_DEVICE_ID 0x8291 +#define BCM88292_DEVICE_ID 0x8292 +#define BCM88293_DEVICE_ID 0x8293 +#define BCM88294_DEVICE_ID 0x8294 +#define BCM88295_DEVICE_ID 0x8295 +#define BCM88296_DEVICE_ID 0x8296 +#define BCM88297_DEVICE_ID 0x8297 +#define BCM88298_DEVICE_ID 0x8298 +#define BCM88299_DEVICE_ID 0x8299 +#define BCM8829A_DEVICE_ID 0x829A +#define BCM8829B_DEVICE_ID 0x829B +#define BCM8829C_DEVICE_ID 0x829C +#define BCM8829D_DEVICE_ID 0x829D +#define BCM8829E_DEVICE_ID 0x829E +#define BCM8829F_DEVICE_ID 0x829F + +#define QAX_DEVICE_ID 0x8470 +#define QAX_A0_REV_ID 0x0001 +#define QAX_B0_REV_ID 0x0011 +#define BCM88470_DEVICE_ID QAX_DEVICE_ID +#define BCM88470_B0_REV_ID QAX_B0_REV_ID +#define BCM88470P_DEVICE_ID 0x847C +#define BCM88471_DEVICE_ID 0x8471 +#define BCM88473_DEVICE_ID 0x8473 +#define BCM88474_DEVICE_ID 0x8474 +#define BCM88474H_DEVICE_ID 0x847B +#define BCM88476_DEVICE_ID 0x8476 +#define BCM88477_DEVICE_ID 0x8477 + +#define BCM88479_DEVICE_ID 0x8479 + + + +#define BCM88470_A0_REV_ID QAX_A0_REV_ID + +#define QUX_DEVICE_ID 0x8270 +#define QUX_A0_REV_ID 0x0001 +#define QUX_A1_REV_ID 0x0002 +#define QUX_B0_REV_ID 0x0011 +#define BCM88270_DEVICE_ID QUX_DEVICE_ID +#define BCM88270_A0_REV_ID QUX_A0_REV_ID +#define BCM88270_A1_REV_ID QUX_A1_REV_ID +#define BCM88271_DEVICE_ID 0x8271 +#define BCM88272_DEVICE_ID 0x8272 +#define BCM88273_DEVICE_ID 0x8273 +#define BCM88274_DEVICE_ID 0x8274 +#define BCM88276_DEVICE_ID 0x8276 +#define BCM88278_DEVICE_ID 0x8278 +#define BCM88279_DEVICE_ID 0x8279 + +#define BCM88360_DEVICE_ID 0x8360 +#define BCM88360_A0_REV_ID ARADPLUS_A0_REV_ID +#define BCM88361_DEVICE_ID 0x8361 +#define BCM88361_A0_REV_ID ARADPLUS_A0_REV_ID +#define BCM88363_DEVICE_ID 0x8363 +#define BCM88363_A0_REV_ID ARADPLUS_A0_REV_ID +#define BCM88460_DEVICE_ID 0x8460 +#define BCM88460_A0_REV_ID ARADPLUS_A0_REV_ID +#define BCM88461_DEVICE_ID 0x8461 +#define BCM88461_A0_REV_ID ARADPLUS_A0_REV_ID +#define BCM88560_DEVICE_ID 0x8560 +#define BCM88560_A0_REV_ID ARADPLUS_A0_REV_ID +#define BCM88561_DEVICE_ID 0x8561 +#define BCM88561_A0_REV_ID ARADPLUS_A0_REV_ID +#define BCM88562_DEVICE_ID 0x8562 +#define BCM88562_A0_REV_ID ARADPLUS_A0_REV_ID +#define BCM88661_DEVICE_ID 0x8661 +#define BCM88661_A0_REV_ID ARADPLUS_A0_REV_ID +#define BCM88664_DEVICE_ID 0x8664 +#define BCM88664_A0_REV_ID ARADPLUS_A0_REV_ID + + +#define BCM88350_DEVICE_ID 0x8350 +#define BCM88350_B1_REV_ID ARAD_B1_REV_ID +#define BCM88351_DEVICE_ID 0x8351 +#define BCM88351_B1_REV_ID ARAD_B1_REV_ID +#define BCM88450_DEVICE_ID 0x8450 +#define BCM88450_B1_REV_ID ARAD_B1_REV_ID +#define BCM88451_DEVICE_ID 0x8451 +#define BCM88451_B1_REV_ID ARAD_B1_REV_ID +#define BCM88550_DEVICE_ID 0x8550 +#define BCM88550_B1_REV_ID ARAD_B0_REV_ID +#define BCM88551_DEVICE_ID 0x8551 +#define BCM88551_B1_REV_ID ARAD_B1_REV_ID +#define BCM88552_DEVICE_ID 0x8552 +#define BCM88552_B1_REV_ID ARAD_B1_REV_ID + +#define BCM88772_DEVICE_ID 0x8772 +#define BCM88952_DEVICE_ID 0x8952 +#define BCM88772_A1_REV_ID 0x0002 +#define BCM88952_A0_REV_ID 0x0001 +#define BCM88952_A1_REV_ID 0x0002 + +#define PLX9056_DEVICE_ID 0x9056 /* needed for DNX_TEST_BOARD */ + +/* Trident4 X11c */ +#define BCM56890_DEVICE_ID 0xb890 +#define BCM56890_A0_REV_ID 0x0001 +#define BCM56891_DEVICE_ID 0xb891 +#define BCM56891_A0_REV_ID 0x0001 +#define BCM56892_DEVICE_ID 0xb892 +#define BCM56892_A0_REV_ID 0x0001 +#define BCM56895_DEVICE_ID 0xb895 +#define BCM56895_A0_REV_ID 0x0001 +#define BCM56896_DEVICE_ID 0xb896 +#define BCM56896_A0_REV_ID 0x0001 + +/* Trident4 X7 */ +#define BCM56690_DEVICE_ID 0xb690 +#define BCM56690_A0_REV_ID 0x0001 +#define BCM56692_DEVICE_ID 0xb692 +#define BCM56692_A0_REV_ID 0x0001 + +/* Trident5 X12 */ +#define BCM78800_DEVICE_ID 0xf800 +#define BCM78800_A0_REV_ID 0x0001 +/* Trident5 X12 8Tbps */ +#define BCM78808_DEVICE_ID 0xf808 +#define BCM78808_A0_REV_ID 0x0001 + +/* Trident4 */ +#define BCM56880_DEVICE_ID 0xb880 +#define BCM56880_A0_REV_ID 0x0001 +#define BCM56880_B0_REV_ID 0x0011 +#define BCM56881_DEVICE_ID 0xb881 +#define BCM56881_A0_REV_ID 0x0001 +#define BCM56881_B0_REV_ID 0x0011 +#define BCM56883_DEVICE_ID 0xb883 +#define BCM56883_A0_REV_ID 0x0001 +#define BCM56883_B0_REV_ID 0x0011 + +/* Trident4 X9 */ +#define BCM56780_DEVICE_ID 0xb780 +#define BCM56780_A0_REV_ID 0x0001 +#define BCM56782_DEVICE_ID 0xb782 +#define BCM56782_A0_REV_ID 0x0001 +#define BCM56782_A1_REV_ID 0x0002 +#define BCM56784_DEVICE_ID 0xb784 +#define BCM56784_A0_REV_ID 0x0001 +#define BCM56785_DEVICE_ID 0xb785 +#define BCM56785_A0_REV_ID 0x0001 +#define BCM56786_DEVICE_ID 0xb786 +#define BCM56786_A0_REV_ID 0x0001 +#define BCM56786_A1_REV_ID 0x0002 +#define BCM56787_DEVICE_ID 0xb787 +#define BCM56787_A0_REV_ID 0x0001 +#define BCM56787_A1_REV_ID 0x0002 +#define BCM56788_DEVICE_ID 0xb788 +#define BCM56788_A0_REV_ID 0x0001 +#define BCM56788_A1_REV_ID 0x0002 +#define BCM56789_DEVICE_ID 0xb789 +#define BCM56789_A0_REV_ID 0x0001 +/* Firelight3 */ +#define BCM56089_DEVICE_ID 0xb089 +#define BCM56089_A0_REV_ID 0x0001 +#define BCM56089_A1_REV_ID 0x0002 + +/* Tomahawk4 */ +#define BCM56990_DEVICE_ID 0xb990 +#define BCM56990_A0_REV_ID 0x0001 + +/* Tomahawk4 */ +#ifndef BCM56990_DEVICE_ID +#define BCM56990_DEVICE_ID 0xb990 +#define BCM56990_A0_REV_ID 0x0001 +#endif +#define BCM56990_B0_REV_ID 0x0011 +#define BCM56991_DEVICE_ID 0xb991 +#define BCM56991_B0_REV_ID 0x0011 +#define BCM56992_DEVICE_ID 0xb992 +#define BCM56992_B0_REV_ID 0x0011 +#define BCM56993_DEVICE_ID 0xb993 +#define BCM56993_B0_REV_ID 0x0011 + +/* Tomahawk4G */ +#define BCM56996_DEVICE_ID 0xb996 +#define BCM56996_A0_REV_ID 0x0001 +#define BCM56997_DEVICE_ID 0xb997 +#define BCM56997_A0_REV_ID 0x0001 + +/* Tomahawk4G */ +#ifndef BCM56996_DEVICE_ID +#define BCM56996_DEVICE_ID 0xb996 +#define BCM56996_A0_REV_ID 0x0001 +#define BCM56997_DEVICE_ID 0xb997 +#endif +#define BCM56996_B0_REV_ID 0x0011 +#define BCM56997_B0_REV_ID 0x0011 + +/* Tomahawk4GT */ +#define BCM56998_DEVICE_ID 0xb998 +#define BCM56998_A0_REV_ID 0x0001 + +/* Tomahawk4D */ +#define BCM56999_DEVICE_ID 0xb999 +#define BCM56999_A0_REV_ID 0x0001 +#define BCM56999_B0_REV_ID 0x0011 +#define BCM56995_DEVICE_ID 0xb995 +#define BCM56995_A0_REV_ID 0x0001 +#define BCM56995_B0_REV_ID 0x0011 + +/* Tomahawk5 */ +#define BCM78900_DEVICE_ID 0xf900 +#define BCM78900_B0_REV_ID 0x0011 +#define BCM78902_DEVICE_ID 0xf902 +#define BCM78902_B0_REV_ID 0x0011 +#define BCM78903_DEVICE_ID 0xf903 +#define BCM78903_B0_REV_ID 0x0011 + +/* Tomahawk5+ */ +#define BCM78905_DEVICE_ID 0xf905 +#define BCM78905_A0_REV_ID 0x0001 + +/* Tomahawk5-512 */ +#define BCM78907_DEVICE_ID 0xf907 +#define BCM78907_A0_REV_ID 0x0001 + +/* Firelight2 */ +#define BCM56080_DEVICE_ID 0xb080 +#define BCM56080_A0_REV_ID 0x0001 +#define BCM56080_A1_REV_ID 0x0002 +#define BCM56081_DEVICE_ID 0xb081 +#define BCM56081_A0_REV_ID 0x0001 +#define BCM56081_A1_REV_ID 0x0002 +#define BCM56082_DEVICE_ID 0xb082 +#define BCM56082_A0_REV_ID 0x0001 +#define BCM56082_A1_REV_ID 0x0002 +#define BCM56083_DEVICE_ID 0xb083 +#define BCM56083_A0_REV_ID 0x0001 +#define BCM56083_A1_REV_ID 0x0002 +#define BCM56084_DEVICE_ID 0xb084 +#define BCM56084_A0_REV_ID 0x0001 +#define BCM56084_A1_REV_ID 0x0002 +#define BCM56085_DEVICE_ID 0xb085 +#define BCM56085_A0_REV_ID 0x0001 +#define BCM56085_A1_REV_ID 0x0002 + +#endif /* !_SOC_DEVIDS_H */ diff --git a/platform/broadcom/saibcm-modules/make/Make.clang b/platform/broadcom/saibcm-modules-legacy-th/make/Make.clang similarity index 97% rename from platform/broadcom/saibcm-modules/make/Make.clang rename to platform/broadcom/saibcm-modules-legacy-th/make/Make.clang index 0f27927be4e..ee1e30842e5 100644 --- a/platform/broadcom/saibcm-modules/make/Make.clang +++ b/platform/broadcom/saibcm-modules-legacy-th/make/Make.clang @@ -1,6 +1,5 @@ # $Id: Make.clang -# -# $Copyright: 2017-2025 Broadcom Inc. All rights reserved. +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. # # Permission is granted to use, copy, modify and/or distribute this # software under either one of the licenses below. diff --git a/platform/broadcom/saibcm-modules/make/Make.config b/platform/broadcom/saibcm-modules-legacy-th/make/Make.config similarity index 97% rename from platform/broadcom/saibcm-modules/make/Make.config rename to platform/broadcom/saibcm-modules-legacy-th/make/Make.config index 8820719120e..c9eccf64d3f 100644 --- a/platform/broadcom/saibcm-modules/make/Make.config +++ b/platform/broadcom/saibcm-modules-legacy-th/make/Make.config @@ -1,6 +1,5 @@ # $Id: Make.config,v 1.3 Broadcom SDK $ -# -# $Copyright: 2017-2025 Broadcom Inc. All rights reserved. +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. # # Permission is granted to use, copy, modify and/or distribute this # software under either one of the licenses below. @@ -83,23 +82,19 @@ endif # ALL_CHIPS ifdef ALL_DNX2_CHIPS CFGFLAGS += -DBCM_DNX_SUPPORT - CFGFLAGS += -DBCM_INSTANCE_SUPPORT endif ifdef ALL_DNX3_CHIPS CFGFLAGS += -DBCM_DNX3_SUPPORT - CFGFLAGS += -DBCM_INSTANCE_SUPPORT endif ifdef ALL_DNXF1_CHIPS CFGFLAGS += -DBCM_DNXF_SUPPORT - CFGFLAGS += -DBCM_INSTANCE_SUPPORT endif ifdef ALL_DNXF3_CHIPS CFGFLAGS += -DBCM_DNXF3_SUPPORT - CFGFLAGS += -DBCM_INSTANCE_SUPPORT endif diff --git a/platform/broadcom/saibcm-modules-legacy-th/make/Make.depend b/platform/broadcom/saibcm-modules-legacy-th/make/Make.depend new file mode 100644 index 00000000000..7f737a26045 --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/make/Make.depend @@ -0,0 +1,126 @@ +# $Id: Make.depend,v 1.14 Broadcom SDK $ +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# +# +# +# Default rule to build dependencies. This builds a x.d file for each +# x.c file that describes the dependencies. We then conditionally include +# the generated .d files. +# + +# +# If making 'clean', do not include any .d files. If they are included, +# gmake intrinsically tries to remake them all. +# +ifeq (,$(findstring clean,$(MAKECMDGOALS))) + +ZFS :=$(wildcard *.zf) +ZFC := $(ZFS:.zf=.c) + +ifdef GENERATE_C_FILES +ifndef GEN_INCS +$(error "GEN_INCS was not defined") +endif + +ZF_GEN = ${SDK}/tools/zFrameCodeGen.pl + +# 1=.zf +define ZFS_RULE +$(1:.zf=Console.c) : $(1:.zf=.c) + @echo updated $$@ from $$? + +$(1:.zf=.c) : $(1) $(ZF_GEN) + @$(PERL) $(ZF_GEN) -s -z . -p . -g $1 -t c + @echo generated ${LOCALDIR}/$$@ from $(1) + @mv $$(*F).cx $$@ + @if [ -e $$(*F)Console.cx ] ; then \ + mv $$(*F)Console.cx $$(*F)Console.c; \ + echo Created $$(*F)Console.c ;\ + fi + @if [ -e $$(*F)Console.hx ] ; then \ + echo Created $(GEN_INCS)/$$(*F)Console.hx ;\ + mv $$(*F)Console.hx $(GEN_INCS)/ ; \ + fi + @mv $$(*F).hx $(GEN_INCS)/ +endef + +$(foreach zf,$(ZFS),$(eval $(call ZFS_RULE,$(zf)))) + +${BLDDIR}/%.P : ${BLDDIR}/.tree %.c + +.PHONY: GENFILES +GENFILES: $(ZFC) + +$(BOBJS) : $(ZFC) + +else +# +# Attempt to build the depend files. If it fails, the depend file is +# removed so that it is not included in later builds. +# +${BLDDIR}/%.P : %.c ${BLDDIR}/.tree + @$(ECHO) Dependencies for ${LOCALDIR}/$< + +${BLDDIR}/%.P : %.cc ${BLDDIR}/.tree + @$(ECHO) Dependencies for ${LOCALDIR}/$< + +endif + +# +# If there are C or C++ files in this directory, include the +# depend files for them. +# + +ifeq ($(findstring _COMPILER,$(MAKECMDGOALS))$(findstring variable,$(MAKECMDGOALS)),) +ifneq ($(strip ${LSRCS}),) +ifneq (,$(findstring .o,$(MAKECMDGOALS))) +-include $(addprefix ${BLDDIR}/,$(MAKECMDGOALS:.o=.P)) $(addprefix ${BLDDIR}/,$(MAKECMDGOALS:.o=.sig)) +else +-include $(addprefix ${BLDDIR}/,$(addsuffix .P,$(basename $(LSRCS)))) $(addprefix ${BLDDIR}/,$(addsuffix .sig,$(basename $(LSRCS)))) +endif +endif +endif + +endif # !CLEANING + +ifeq ($(ARCH),arm64) +# SAI: SONIC-76388 and SDK: SDK-367718 +# This macro removes the redundant macros and gcc options +# JIRA SONIC-69062 +UNIQE = $(if $1,$(firstword $1) $(call UNIQE,$(filter-out $(firstword $1),$1))) +CFLAGS := $(call UNIQE,$(CFLAGS)) +CFGFLAGS := $(call UNIQE,$(CFGFLAGS)) +endif + +clean_d:: +ifdef QUIET + @$(ECHO) Cleaning dependencies for ${LOCALDIR} +endif +ifdef GENERATE_C_FILES + $Q$(RM) $(ZFC:%=$(SDK)/$(LOCALDIR)/%) $(ZFC:%.c=$(SDK)/$(LOCALDIR)/%Console.c) +endif + +clean:: clean_d diff --git a/platform/broadcom/saibcm-modules/make/Make.kernlib b/platform/broadcom/saibcm-modules-legacy-th/make/Make.kernlib similarity index 96% rename from platform/broadcom/saibcm-modules/make/Make.kernlib rename to platform/broadcom/saibcm-modules-legacy-th/make/Make.kernlib index 49e7f75dcc3..909607ef035 100644 --- a/platform/broadcom/saibcm-modules/make/Make.kernlib +++ b/platform/broadcom/saibcm-modules-legacy-th/make/Make.kernlib @@ -1,6 +1,5 @@ # $Id: Make.kernlib,v 1.7 Broadcom SDK $ -# -# $Copyright: 2017-2025 Broadcom Inc. All rights reserved. +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. # # Permission is granted to use, copy, modify and/or distribute this # software under either one of the licenses below. diff --git a/platform/broadcom/saibcm-modules/make/Make.lib b/platform/broadcom/saibcm-modules-legacy-th/make/Make.lib similarity index 96% rename from platform/broadcom/saibcm-modules/make/Make.lib rename to platform/broadcom/saibcm-modules-legacy-th/make/Make.lib index 8973c89f686..e710c84b8fa 100644 --- a/platform/broadcom/saibcm-modules/make/Make.lib +++ b/platform/broadcom/saibcm-modules-legacy-th/make/Make.lib @@ -1,6 +1,5 @@ # $Id: Make.lib,v 1.14 Broadcom SDK $ -# -# $Copyright: 2017-2025 Broadcom Inc. All rights reserved. +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. # # Permission is granted to use, copy, modify and/or distribute this # software under either one of the licenses below. diff --git a/platform/broadcom/saibcm-modules/make/Make.linux b/platform/broadcom/saibcm-modules-legacy-th/make/Make.linux similarity index 97% rename from platform/broadcom/saibcm-modules/make/Make.linux rename to platform/broadcom/saibcm-modules-legacy-th/make/Make.linux index c47bf56eabc..f053c96dda2 100644 --- a/platform/broadcom/saibcm-modules/make/Make.linux +++ b/platform/broadcom/saibcm-modules-legacy-th/make/Make.linux @@ -1,7 +1,6 @@ # # $Id: Make.linux,v 1.18 Broadcom SDK $ -# -# $Copyright: 2017-2025 Broadcom Inc. All rights reserved. +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. # # Permission is granted to use, copy, modify and/or distribute this # software under either one of the licenses below. diff --git a/platform/broadcom/saibcm-modules/make/Make.subdirs b/platform/broadcom/saibcm-modules-legacy-th/make/Make.subdirs similarity index 96% rename from platform/broadcom/saibcm-modules/make/Make.subdirs rename to platform/broadcom/saibcm-modules-legacy-th/make/Make.subdirs index 9f89fa79083..9f3cf705603 100644 --- a/platform/broadcom/saibcm-modules/make/Make.subdirs +++ b/platform/broadcom/saibcm-modules-legacy-th/make/Make.subdirs @@ -1,6 +1,5 @@ # $Id: Make.subdirs,v 1.8 Broadcom SDK $ -# -# $Copyright: 2017-2025 Broadcom Inc. All rights reserved. +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. # # Permission is granted to use, copy, modify and/or distribute this # software under either one of the licenses below. diff --git a/platform/broadcom/saibcm-modules/make/Make.tools b/platform/broadcom/saibcm-modules-legacy-th/make/Make.tools similarity index 95% rename from platform/broadcom/saibcm-modules/make/Make.tools rename to platform/broadcom/saibcm-modules-legacy-th/make/Make.tools index 32a1a8a55d3..189abf92c74 100644 --- a/platform/broadcom/saibcm-modules/make/Make.tools +++ b/platform/broadcom/saibcm-modules-legacy-th/make/Make.tools @@ -1,6 +1,5 @@ # $Id: Make.tools,v 1.2 Broadcom SDK $ -# -# $Copyright: 2017-2025 Broadcom Inc. All rights reserved. +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. # # Permission is granted to use, copy, modify and/or distribute this # software under either one of the licenses below. diff --git a/platform/broadcom/saibcm-modules-legacy-th/make/Makefile.linux-gts b/platform/broadcom/saibcm-modules-legacy-th/make/Makefile.linux-gts new file mode 100644 index 00000000000..690e0eb8d62 --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/make/Makefile.linux-gts @@ -0,0 +1,201 @@ +# $Id: Makefile.linux-xlr-4_19,v 0.1 Broadcom SDK $ +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# +# + +# +# XLR system make file. +# +# Most of this was taken from target x86-smp_generic_64-2_6. +# + +############################################################################# +# this segment is custom and not sourced from any existing makefile # +# (base thanks to http:confluence.broadcom.com/display/NTSWSW/X86+System) # +############################################################################# + +# set up a basic feature list. tcl, etc. # +#ifeq (,$(FEATURE_LIST)) +#FEATURE_LIST = TCL BFD PTP CINT L3 I2C MEM_SCAN EDITLINE BCM_SAL_PROFILE CUSTOMER TEST CHASSIS MSTP RCPU +#endif + +# some basic path variables for tools and kernel source, etc # +XLR_TOOLS_BASE ?= /projects/ntsw-tools/linux/xlr-66 +TOOLCHAIN_DIR = $(XLR_TOOLS_BASE)/buildroot/host/usr +ifeq (1,$(USE_CLANG)) +KERNDIR = $(XLR_TOOLS_BASE)/kernel/linux-clang +endif +KERNDIR ?= $(XLR_TOOLS_BASE)/kernel/linux + +# Target machine for EDK-Host defconfig +TARGET_MACHINE ?= x86_64 + +# set up cross compile prefix, tools dir variables. # +export CROSS_COMPILE := x86_64-linux- +export TOOLS_DIR := $(TOOLCHAIN_DIR)/bin + +# architecture. # +ARCH = x86_64 +TARGET_ARCHITECTURE = x86_64-broadcom-linux-gnu + +# Noisy kernel build +KBUILD_VERBOSE = 1 + +export ARCH KBUILD_VERBOSE + +# set up paths. # +export LIBRARY_PATH := $(TOOLCHAIN_DIR)/lib:$(TOOLCHAIN_DIR)/lib64:$(LIBRARY_PATH) +export PATH := $(TOOLCHAIN_DIR)/bin:$(KERNDIR):$(PATH) + +# set up SYSINC path # +CROSS_GCC_VER ?= $(shell $(TOOLCHAIN_DIR)/bin/$(CROSS_COMPILE)gcc -dumpversion) +CROSS_GCC_VER_MAJOR := $(shell echo $(CROSS_GCC_VER) | cut -f1 -d.) +export SYSINC := $(TOOLCHAIN_DIR)/lib/gcc/$(TARGET_ARCHITECTURE)/$(CROSS_GCC_VER)/include + +# Glibc 2.27 or later version doesn't support SVID libm error handling. +# Building tcl 8.3.3 with the new toolchain will occur errors. +export TCL840 := 1 + +# Common CFLAGS +CFGFLAGS += -DUSE_LINUX_BDE_MMAP=1 +#CFGFLAGS += -DBDE_LINUX_USE_MSI_INTERRUPT +ifneq (1,$(USE_CLANG)) +CFLAGS += -L$(TOOLCHAIN_DIR)/lib +CFLAGS += -L$(TOOLCHAIN_DIR)/lib64 +endif +#OPT_CFLAGS += -Wl,--rpath=/lib64 # may need to set rpath and dynamic-linker path here (and possibly in KLFAGS below) in the future, # +#OPT_CFLAGS += -Wl,--dynamic-linker=/lib64/ld-linux-x86-64.so.2 # if we want to build the target executable to be used with shared libs # + +# Needed for a warning in src/soc/phy/fcmap/src/bfcmap88060_a0.c that can't be +# fixed because of a Montreal2 FW dependency +ifeq ($(LOCALDIR),src/soc/phy/fcmap/src) +OPT_CFLAGS += -Wno-address-of-packed-member +endif + +# Compiler-specific CFLAGS +ifeq (1,$(USE_CLANG)) # CLANG-specific CFLAGS +ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 12)" "1" + export LIBNSL_DEPRECATED := 1 +endif +else # GCC-specific CFLAGS +ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 8)" "1" +endif +ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 9)" "1" +endif +ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 10)" "1" + CFLAGS += -fcommon +endif +ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 12)" "1" + CFLAGS += -flarge-source-files + export LIBNSL_DEPRECATED := 1 +endif +ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 13)" "1" + CFLAGS += -fcf-protection +endif +endif # Compiler-specific CFLAGS + +#XLDK-568 fix inline references +CFGFLAGS += -fgnu89-inline + +# set up KFLAGS appropriately. # +ifeq (,$(KFLAGS)) +KFLAGS := -I$(KERNDIR) -nostdinc -isystem $(SYSINC) -Iinclude -I$(KERNDIR)/arch/x86/include -I$(KERNDIR)/arch/x86/include/generated -I$(KERNDIR)/arch/x86/include/generated/uapi -I$(KERNDIR)/arch/x86/include/uapi -I$(KERNDIR)/include -I$(KERNDIR)/include/generated -I$(KERNDIR)/include/generated/uapi -I$(KERNDIR)/include/uapi -include $(KERNDIR)/include/generated/autoconf.h -D__KERNEL__ -DNDEBUG -Wundef -Wstrict-prototypes -Wno-trigraphs -fno-strict-aliasing -fno-common -Wno-format-security -fno-delete-null-pointer-checks -Os -mno-sse -m64 -mtune=generic -mno-red-zone -mcmodel=kernel -fstack-protector -DCONFIG_AS_CFI=1 -DCONFIG_AS_CFI_SIGNAL_FRAME=1 -pipe -Wno-sign-compare -fno-asynchronous-unwind-tables -fno-omit-frame-pointer -Wdeclaration-after-statement -Wno-pointer-sign -fno-dwarf2-cfi-asm +ifneq (1,$(USE_CLANG)) +KFLAGS += -L$(TOOLCHAIN_DIR)/lib -L$(TOOLCHAIN_DIR)/lib64 -lc -funit-at-a-time -maccumulate-outgoing-args -fconserve-stack +else +KFLAGS += -fno-pie +endif +endif + + +###################################################################### +# this segment comes from make/Makefile.linux-x86-smp_generic_64-2_6 # +###################################################################### +CFGFLAGS += -DLONGS_ARE_64BITS +CFGFLAGS += -DPTRS_ARE_64BITS +CFGFLAGS += -DPHYS_ADDRS_ARE_64BITS +CFGFLAGS += -DSAL_SPL_LOCK_ON_IRQ + + +############################################################## +# This segment comes from make/Makefile.linux-x86-common-2_6 # +############################################################## +CFGFLAGS += -DSYS_BE_PIO=0 -DSYS_BE_PACKET=0 -DSYS_BE_OTHER=0 +ENDIAN = LE_HOST=1 +CFGFLAGS += -D$(ENDIAN) +CFGFLAGS += -DBCM_PLATFORM_STRING=\"X86\" +CFGFLAGS += -DSAL_BDE_DMA_MEM_DEFAULT=32 + +# Extra variables. +EXTRA_CFLAGS = -D"KBUILD_STR(s)=\#s" $(basename_flags) $(modname_flags) + +comma = , +basetarget = $(basename $(notdir $@)) +modname = $(basetarget) + +name-fix = $(subst $(comma),_,$(subst -,_,$1)) +basename_flags = -D"KBUILD_BASENAME=KBUILD_STR($(call name-fix,$(basetarget)))" +modname_flags = $(if $(filter 1,$(words $(modname))),\ +-D"KBUILD_MODNAME=KBUILD_STR($(call name-fix,$(modname)))") + +ifdef LTSW_CHIPS +# Ensure we do not use an out-of-date libelf.so +ELFUTILS_MIN = 158 +ELFUTILS_DIR ?= /projects/ntsw-tools/lib + +# Default open source target build +OPENSRC_BUILD ?= fed21-x86_64 + +# Hardware interface (see $SDKLT/bcma/sys/probe directory) +SYSTEM_INTERFACE ?= ngbde + +# Support BCMSIM in the same build +ifeq (1,$(BCM_SIM_PATH_SUPPORT)) +EXTRA_SYSTEM_INTERFACES = plisim +endif + +# Turn on direct register access if running on real hardware. +ifeq (ngbde,$(SYSTEM_INTERFACE)) +# Except if using multiple probe interfaces +ifeq (,$(EXTRA_SYSTEM_INTERFACES)) +LTSW_ADD_CPPFLAGS += -DBCMDRD_CONFIG_MEMMAP_DIRECT=1 +endif +endif + +export SYSTEM_INTERFACE +export EXTRA_SYSTEM_INTERFACES +endif + +ifneq (, $(EDKHOST)) +# Default open source target build +OPENSRC_BUILD ?= fed21-x86_64 +endif + +ifneq ($(targetplat),user) +# By default we exclude -Werror from x86 kernel builds +BCM_CFLAGS = -Wall +include ${SDK}/make/Makefile.linux-kernel-2_6 +endif diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc b/platform/broadcom/saibcm-modules-legacy-th/make/Makefile.linux-iproc similarity index 97% rename from platform/broadcom/saibcm-modules/make/Makefile.linux-iproc rename to platform/broadcom/saibcm-modules-legacy-th/make/Makefile.linux-iproc index fe2501e46bf..067b225b714 100644 --- a/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc +++ b/platform/broadcom/saibcm-modules-legacy-th/make/Makefile.linux-iproc @@ -1,6 +1,5 @@ # $Id: Makefile.linux-iproc Exp $ -# -# $Copyright: 2017-2025 Broadcom Inc. All rights reserved. +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. # # Permission is granted to use, copy, modify and/or distribute this # software under either one of the licenses below. @@ -104,9 +103,8 @@ comma = , basetarget = $(basename $(notdir $@)) modname = $(basetarget) -HASH := \# # Extra variables. -EXTRA_CFLAGS = -D"KBUILD_STR(s)=$(HASH)s" $(basename_flags) $(modname_flags) +EXTRA_CFLAGS = -D"KBUILD_STR(s)=\#s" $(basename_flags) $(modname_flags) name-fix = $(subst $(comma),_,$(subst -,_,$1)) basename_flags = -D"KBUILD_BASENAME=KBUILD_STR($(call name-fix,$(basetarget)))" diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc-3_14 b/platform/broadcom/saibcm-modules-legacy-th/make/Makefile.linux-iproc-3_14 similarity index 96% rename from platform/broadcom/saibcm-modules/make/Makefile.linux-iproc-3_14 rename to platform/broadcom/saibcm-modules-legacy-th/make/Makefile.linux-iproc-3_14 index f0b6ab046b1..61c7ad1d0e5 100644 --- a/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc-3_14 +++ b/platform/broadcom/saibcm-modules-legacy-th/make/Makefile.linux-iproc-3_14 @@ -1,6 +1,5 @@ # $Id: Makefile.linux-iproc-3_6,v 1.1 Broadcom SDK $ -# -# $Copyright: 2017-2025 Broadcom Inc. All rights reserved. +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. # # Permission is granted to use, copy, modify and/or distribute this # software under either one of the licenses below. @@ -89,9 +88,8 @@ comma = , basetarget = $(basename $(notdir $@)) modname = $(basetarget) -HASH := \# # Extra variables. -EXTRA_CFLAGS = -D"KBUILD_STR(s)=$(HASH)s" $(basename_flags) $(modname_flags) +EXTRA_CFLAGS = -D"KBUILD_STR(s)=\#s" $(basename_flags) $(modname_flags) name-fix = $(subst $(comma),_,$(subst -,_,$1)) basename_flags = -D"KBUILD_BASENAME=KBUILD_STR($(call name-fix,$(basetarget)))" diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc-4_4 b/platform/broadcom/saibcm-modules-legacy-th/make/Makefile.linux-iproc-4_4 similarity index 96% rename from platform/broadcom/saibcm-modules/make/Makefile.linux-iproc-4_4 rename to platform/broadcom/saibcm-modules-legacy-th/make/Makefile.linux-iproc-4_4 index 0d23f7972ea..f60d8c89910 100644 --- a/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc-4_4 +++ b/platform/broadcom/saibcm-modules-legacy-th/make/Makefile.linux-iproc-4_4 @@ -1,6 +1,5 @@ # $Id: Makefile.linux-iproc Exp $ -# -# $Copyright: 2017-2025 Broadcom Inc. All rights reserved. +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. # # Permission is granted to use, copy, modify and/or distribute this # software under either one of the licenses below. @@ -82,9 +81,8 @@ comma = , basetarget = $(basename $(notdir $@)) modname = $(basetarget) -HASH := \# # Extra variables. -EXTRA_CFLAGS = -D"KBUILD_STR(s)=$(HASH)s" $(basename_flags) $(modname_flags) +EXTRA_CFLAGS = -D"KBUILD_STR(s)=\#s" $(basename_flags) $(modname_flags) name-fix = $(subst $(comma),_,$(subst -,_,$1)) basename_flags = -D"KBUILD_BASENAME=KBUILD_STR($(call name-fix,$(basetarget)))" diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc_64 b/platform/broadcom/saibcm-modules-legacy-th/make/Makefile.linux-iproc_64 similarity index 97% rename from platform/broadcom/saibcm-modules/make/Makefile.linux-iproc_64 rename to platform/broadcom/saibcm-modules-legacy-th/make/Makefile.linux-iproc_64 index 51dd8d1a9da..96aede74a6f 100644 --- a/platform/broadcom/saibcm-modules/make/Makefile.linux-iproc_64 +++ b/platform/broadcom/saibcm-modules-legacy-th/make/Makefile.linux-iproc_64 @@ -1,6 +1,5 @@ # $Id: Makefile.linux-iproc Exp $ -# -# $Copyright: 2017-2025 Broadcom Inc. All rights reserved. +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. # # Permission is granted to use, copy, modify and/or distribute this # software under either one of the licenses below. @@ -113,9 +112,8 @@ comma = , basetarget = $(basename $(notdir $@)) modname = $(basetarget) -HASH := \# # Extra variables. -EXTRA_CFLAGS = -D"KBUILD_STR(s)=$(HASH)s" $(basename_flags) $(modname_flags) +EXTRA_CFLAGS = -D"KBUILD_STR(s)=\#s" $(basename_flags) $(modname_flags) name-fix = $(subst $(comma),_,$(subst -,_,$1)) basename_flags = -D"KBUILD_BASENAME=KBUILD_STR($(call name-fix,$(basetarget)))" diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel b/platform/broadcom/saibcm-modules-legacy-th/make/Makefile.linux-kernel similarity index 98% rename from platform/broadcom/saibcm-modules/make/Makefile.linux-kernel rename to platform/broadcom/saibcm-modules-legacy-th/make/Makefile.linux-kernel index a9b5b252d93..37416d5897a 100644 --- a/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel +++ b/platform/broadcom/saibcm-modules-legacy-th/make/Makefile.linux-kernel @@ -1,6 +1,5 @@ # $Id: Makefile.linux-kernel,v 1.27 Broadcom SDK $ -# -# $Copyright: 2017-2025 Broadcom Inc. All rights reserved. +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. # # Permission is granted to use, copy, modify and/or distribute this # software under either one of the licenses below. diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel-2_6 b/platform/broadcom/saibcm-modules-legacy-th/make/Makefile.linux-kernel-2_6 similarity index 98% rename from platform/broadcom/saibcm-modules/make/Makefile.linux-kernel-2_6 rename to platform/broadcom/saibcm-modules-legacy-th/make/Makefile.linux-kernel-2_6 index f203da19dc3..229eee53316 100644 --- a/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel-2_6 +++ b/platform/broadcom/saibcm-modules-legacy-th/make/Makefile.linux-kernel-2_6 @@ -1,6 +1,5 @@ # $Id: Makefile.linux-kernel-2_6,v 1.40 Broadcom SDK $ -# -# $Copyright: 2017-2025 Broadcom Inc. All rights reserved. +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. # # Permission is granted to use, copy, modify and/or distribute this # software under either one of the licenses below. diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel-3_6 b/platform/broadcom/saibcm-modules-legacy-th/make/Makefile.linux-kernel-3_6 similarity index 98% rename from platform/broadcom/saibcm-modules/make/Makefile.linux-kernel-3_6 rename to platform/broadcom/saibcm-modules-legacy-th/make/Makefile.linux-kernel-3_6 index b3df4402f9e..f5c51de59f5 100644 --- a/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel-3_6 +++ b/platform/broadcom/saibcm-modules-legacy-th/make/Makefile.linux-kernel-3_6 @@ -1,6 +1,5 @@ # $Id: Makefile.linux-kernel-3_6,v 1.2 Broadcom SDK $ -# -# $Copyright: 2017-2025 Broadcom Inc. All rights reserved. +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. # # Permission is granted to use, copy, modify and/or distribute this # software under either one of the licenses below. diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel-4_18 b/platform/broadcom/saibcm-modules-legacy-th/make/Makefile.linux-kernel-4_18 similarity index 98% rename from platform/broadcom/saibcm-modules/make/Makefile.linux-kernel-4_18 rename to platform/broadcom/saibcm-modules-legacy-th/make/Makefile.linux-kernel-4_18 index 82b09cdc4ea..59953d5ab67 100644 --- a/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel-4_18 +++ b/platform/broadcom/saibcm-modules-legacy-th/make/Makefile.linux-kernel-4_18 @@ -1,6 +1,5 @@ # $Id: Makefile.linux-kernel-4_18,v 1.00 $ -# -# $Copyright: 2017-2025 Broadcom Inc. All rights reserved. +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. # # Permission is granted to use, copy, modify and/or distribute this # software under either one of the licenses below. diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel-4_4 b/platform/broadcom/saibcm-modules-legacy-th/make/Makefile.linux-kernel-4_4 similarity index 98% rename from platform/broadcom/saibcm-modules/make/Makefile.linux-kernel-4_4 rename to platform/broadcom/saibcm-modules-legacy-th/make/Makefile.linux-kernel-4_4 index 2ad61c67d6b..10cfd9cd9e2 100644 --- a/platform/broadcom/saibcm-modules/make/Makefile.linux-kernel-4_4 +++ b/platform/broadcom/saibcm-modules-legacy-th/make/Makefile.linux-kernel-4_4 @@ -1,6 +1,5 @@ # $Id: Makefile.linux-kernel-2_6,v 1.40 Broadcom SDK $ -# -# $Copyright: 2017-2025 Broadcom Inc. All rights reserved. +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. # # Permission is granted to use, copy, modify and/or distribute this # software under either one of the licenses below. diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-kmodule b/platform/broadcom/saibcm-modules-legacy-th/make/Makefile.linux-kmodule similarity index 98% rename from platform/broadcom/saibcm-modules/make/Makefile.linux-kmodule rename to platform/broadcom/saibcm-modules-legacy-th/make/Makefile.linux-kmodule index 422407f06a1..dcf9a92e22d 100644 --- a/platform/broadcom/saibcm-modules/make/Makefile.linux-kmodule +++ b/platform/broadcom/saibcm-modules-legacy-th/make/Makefile.linux-kmodule @@ -1,6 +1,5 @@ # $Id: Makefile.linux-kmodule-3_6,v 1.2 Broadcom SDK $ -# -# $Copyright: 2017-2025 Broadcom Inc. All rights reserved. +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. # # Permission is granted to use, copy, modify and/or distribute this # software under either one of the licenses below. diff --git a/platform/broadcom/saibcm-modules-legacy-th/make/Makefile.linux-slk b/platform/broadcom/saibcm-modules-legacy-th/make/Makefile.linux-slk new file mode 100644 index 00000000000..9f22e2c6e4d --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/make/Makefile.linux-slk @@ -0,0 +1,180 @@ +# $Id: Makefile.linux-slk-3_14,v 1.2 Broadcom SDK $ +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# +# +# Makefile for SLK(BCM957812) + +# User must select one platform from below.By default ARM_LINUX is selected. . +ifeq (,$(BUILD_PLATFORM)) +BUILD_PLATFORM=ARM_LINUX +endif + +# Upgrade TCL version from default 8.3 to 8.4 +ifneq ($(ESW_CHIPS)$(LTSW_CHIPS),) +export TCL840 := 1 +endif + +# Toolchain base directory for NS2 XMC card +ifeq (BE,$(ENDIAN_MODE)) +TOOLCHAIN_BASE_DIR ?= /projects/ntsw-tools/toolchains/slk/linaro-be +TARGET_ARCHITECTURE:=aarch64_be-linux-gnu +# Target machine for EDK-Host defconfig +TARGET_MACHINE ?= slk_be +KERNDIR ?= /projects/ntsw-tools/linux/iproc_ldks/slk-be/poky/brcm-released-source/git +else +TOOLCHAIN_BASE_DIR ?= /projects/ntsw-tools/toolchains/slk/linaro-le +# Compiler for target architecture +TARGET_ARCHITECTURE:= aarch64-linux-gnu +# Target machine for EDK-Host defconfig +TARGET_MACHINE ?= slk_le +# Kernel directory +KERNDIR ?= /projects/ntsw-tools/linux/iproc_ldks/slk/poky/brcm-released-source/git +endif + +ifeq (,$(CROSS_COMPILE)) +CROSS_COMPILE:= $(TARGET_ARCHITECTURE)- +endif + +# armtools +TOOLCHAIN_BIN_DIR=$(TOOLCHAIN_BASE_DIR)/bin +override PATH:=$(TOOLCHAIN_BIN_DIR):$(PATH) +LD_LIBRARY_PATH=$(TOOLCHAIN_BASE_DIR)/lib + +export TOOLCHAIN_BIN_DIR LD_LIBRARY_PATH + +# Default Linux include directory +ifeq (,$(LINUX_INCLUDE)) +LINUX_INCLUDE := $(KERNDIR)/include +endif + +ifeq (BE,$(ENDIAN_MODE)) +CFGFLAGS += -DSYS_BE_PIO=1 -DSYS_BE_PACKET=0 -DSYS_BE_OTHER=1 +ENDIAN = BE_HOST=1 +else +CFGFLAGS += -DSYS_BE_PIO=0 -DSYS_BE_PACKET=0 -DSYS_BE_OTHER=0 +ENDIAN = LE_HOST=1 +endif + +CFGFLAGS += -D$(ENDIAN) -DBCM958525 +CFGFLAGS += -DBCM_PLATFORM_STRING=\"SLK_BCM957812\" +CFGFLAGS += -DSAL_BDE_DMA_MEM_DEFAULT=32 +ifeq (1,$(SLK_32BIT)) +CFGFLAGS += -DSAL_BDE_32BIT_USER_64BIT_KERNEL +else +CFGFLAGS += -DPTRS_ARE_64BITS -DLONGS_ARE_64BITS +endif +CFGFLAGS += -DPHYS_ADDRS_ARE_64BITS + +ifeq (1,$(USE_CLANG)) +CLANG_ADD_CFLAGS += --target=$(TARGET_ARCHITECTURE) --gcc-toolchain=$(TOOLCHAIN_BASE_DIR) --sysroot=$(TOOLCHAIN_BASE_DIR)/$(TARGET_ARCHITECTURE)/libc +export KERNEL_LLVM = 0 +OPT_KERNEL_TOOLCHAIN = CC=$(CROSS_COMPILE)gcc LD=$(CROSS_COMPILE)ld AR=$(CROSS_COMPILE)ar +else +OPT_CFLAGS += -fno-aggressive-loop-optimizations +endif + +ifdef DPP_CHIPS +CFGFLAGS += -DDUNE_BCM -D__DUNE_LINUX_BCM_CPU_PCP_DMA__ +CFGFLAGS += -DSOC_CM_FUNCTION +endif + +ifdef DFE_CHIPS +CFGFLAGS += -DDUNE_BCM +CFGFLAGS += -DSOC_CM_FUNCTION +endif + +ifdef SAND_CHIPS +CFGFLAGS += -D__DUNE_SLK_BCM_CPU__ -D__DUNE_LINUX_BCM_CPU_PCIE__ +endif + +# Enable cached DMA memory by default +ifeq (,$(SAL_BDE_USE_CACHED_DMA_MEM)) +SAL_BDE_USE_CACHED_DMA_MEM = 1 +endif +ifeq ($(SAL_BDE_USE_CACHED_DMA_MEM),1) +CFGFLAGS += -DSAL_BDE_CACHE_DMA_MEM +endif + +ifeq (1,$(SLK_32BIT)) +ARCH = arm +else +ARCH = arm64 +endif + +KBUILD_VERBOSE = 1 + +export ARCH KBUILD_VERBOSE + +comma = , +basetarget = $(basename $(notdir $@)) +modname = $(basetarget) + +# Extra variables. +EXTRA_CFLAGS = -D"KBUILD_STR(s)=\#s" $(basename_flags) $(modname_flags) + +name-fix = $(subst $(comma),_,$(subst -,_,$1)) +basename_flags = -D"KBUILD_BASENAME=KBUILD_STR($(call name-fix,$(basetarget)))" +modname_flags = $(if $(filter 1,$(words $(modname))),\ + -D"KBUILD_MODNAME=KBUILD_STR($(call name-fix,$(modname)))") + +CROSS_GCC_VER ?= $(shell $(TOOLCHAIN_BIN_DIR)/$(CROSS_COMPILE)gcc -dumpversion) + +KFLAG_INCLD = $(TOOLCHAIN_BASE_DIR)/lib/gcc/$(TARGET_ARCHITECTURE)/$(CROSS_GCC_VER)/include + +ifeq (,$(KFLAGS)) +KFLAGS := -D__LINUX_ARM_ARCH__=8 -D__KERNEL__ -DPTRS_ARE_64BITS -DLONGS_ARE_64BITS -nostdinc -isystem $(KFLAG_INCLD) -I$(LINUX_INCLUDE) -include $(LINUX_INCLUDE)/generated/autoconf.h -I$(KERNDIR)/arch/arm64/include -I$(KERNDIR)/arch/arm64/include/generated -I$(KERNDIR)/arch/arm64/include/generated/asm -I$(KERNDIR)/include/uapi -I$(KERNDIR)/include/generated/uapi -I$(KERNDIR)/arch/arm64/include/uapi -Wall -Wstrict-prototypes -Wno-trigraphs -Os -fno-strict-aliasing -fno-common -fno-pic -pipe -ffreestanding -fomit-frame-pointer -g -fno-stack-protector -Wdeclaration-after-statement -Wno-pointer-sign -Wno-unused-but-set-variable +endif + +ifdef LTSW_CHIPS +# Default open source target build +ifeq (BE,$(ENDIAN_MODE)) +OPENSRC_BUILD ?= linaro_arm64_be +else +OPENSRC_BUILD ?= linaro_arm64_le +endif + +# Hardware interface (see $SDKLT/bcma/sys/probe directory) +SYSTEM_INTERFACE ?= ngbde + +# Turn on direct register access if running on real hardware. +ifeq (ngbde,$(SYSTEM_INTERFACE)) +LTSW_ADD_CPPFLAGS += -DBCMDRD_CONFIG_MEMMAP_DIRECT=1 +endif + +export SYSTEM_INTERFACE +endif + +ifneq (, $(EDKHOST)) +ifeq (BE,$(ENDIAN_MODE)) +OPENSRC_BUILD ?= linaro_arm64_be +else +OPENSRC_BUILD ?= linaro_arm64_le +endif +endif + +ifneq ($(targetplat),user) +include ${SDK}/make/Makefile.linux-kernel-3_6 +endif diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-5_10 b/platform/broadcom/saibcm-modules-legacy-th/make/Makefile.linux-x86-5_10 similarity index 87% rename from platform/broadcom/saibcm-modules/make/Makefile.linux-x86-5_10 rename to platform/broadcom/saibcm-modules-legacy-th/make/Makefile.linux-x86-5_10 index 099e24ee679..ef36d714c71 100644 --- a/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-5_10 +++ b/platform/broadcom/saibcm-modules-legacy-th/make/Makefile.linux-x86-5_10 @@ -1,6 +1,5 @@ # $Id: Makefile.linux-gts,v 0.1 Broadcom SDK $ -# -# $Copyright: 2017-2025 Broadcom Inc. All rights reserved. +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. # # Permission is granted to use, copy, modify and/or distribute this # software under either one of the licenses below. @@ -46,21 +45,16 @@ # some basic path variables for tools and kernel source, etc # export BINUTILSVER := 2.41 -RHEL_VERSION=$(shell sed -n 's/.*release *\([0-9]\+\)\..*/\1/p' /etc/redhat-release) # # For ESW compilation, suppress 'stringop-overflow' # ifeq (1,$(GCC_12_1_0)) export GCCVER := 12.1.0 - TOOLCHAIN_DIR = /tools/oss/packages/x86_64-rhel$(RHEL_VERSION)/gcc/$(GCCVER) + TOOLCHAIN_DIR = /tools/oss/packages/x86_64-rhel7/gcc/$(GCCVER) else ifeq (1,$(GCC_13_1_0)) export GCCVER := 13.1.0 - ifeq "$(shell expr $(RHEL_VERSION) \>= 8)" "1" - TOOLCHAIN_DIR = /tools/oss/packages/x86_64-rhel$(RHEL_VERSION)/gcc/$(GCCVER) - else - TOOLCHAIN_DIR = /projects/ntsw-tools/linux/gcc/$(GCCVER) - endif + TOOLCHAIN_DIR = /projects/ntsw-tools/linux/gcc/13.1.0 ifneq ($(DEBUG_OPTIMIZE),FALSE) # { # These flags are required for -O2 'optimized' compilation @@ -73,12 +67,7 @@ else ifeq (1,$(GCC_13_1_0)) endif else ifeq (1,$(GCC_14_1_0)) export GCCVER := 14.1.0 - TOOLCHAIN_DIR = /tools/oss/packages/x86_64-rhel$(RHEL_VERSION)/gcc/$(GCCVER) - # - # We do cast 'int' to pointers in include/sal/types.h. This is - # intentional and OK - # - OPT_CFLAGS += -Wno-error=pointer-to-int-cast + TOOLCHAIN_DIR = /tools/oss/packages/x86_64-rhel7/gcc/$(GCCVER) ifneq ($(DEBUG_OPTIMIZE),FALSE) # { # These flags are required for -O2 'optimized' compilation @@ -90,7 +79,12 @@ else ifeq (1,$(GCC_14_1_0)) endif else export GCCVER := 11.2.0 - TOOLCHAIN_DIR = /tools/oss/packages/x86_64-rhel$(RHEL_VERSION)/gcc/$(GCCVER) + TOOLCHAIN_DIR = /projects/ntsw-tools/linux/gcc/11.2.0-x86_64 +endif + +#The LCOV tool is not compatible with GCC version 9.x and newer, thus we are forced to compile with older one. +ifeq (1,$(GCOV)) + use_gcc_8_1_0 = 1 endif #Valgrind does not have symbolic traceback on newer gcc versions @@ -103,15 +97,13 @@ ifeq (1,$(use_gcc_8_1_0)) # GCC 8.1 does not work with binutils 2.41 and newer export BINUTILSVER := 2.38 export GCCVER := 8.1.0 - TOOLCHAIN_DIR = /tools/oss/packages/x86_64-rhel$(RHEL_VERSION)/gcc/$(GCCVER) + TOOLCHAIN_DIR = /tools/oss/packages/x86_64-rhel7/gcc/$(GCCVER) endif endif -BINUTILS_DIR = /tools/oss/packages/x86_64-rhel$(RHEL_VERSION)/binutils/$(BINUTILSVER)/bin +BINUTILS_DIR = /tools/oss/packages/x86_64-rhel7/binutils/$(BINUTILSVER)/bin export TCL860 := 1 -$(info INFO from make/Makefile.linux-x86-5_10. GCCVER is $(GCCVER). BINUTILSVER is $(BINUTILSVER). TOOLCHAIN_DIR is $(TOOLCHAIN_DIR)) - -export LIBNSL_DEPRECATED := 1 +$(info INFO from make/Makefile.linux-x86-5_10. GCCVER is $(GCCVER). BINUTILSVER is $(BINUTILSVER)) # For GCC versions >= 4.7 USE_GCC_TOOLS := 1 @@ -237,8 +229,7 @@ CFGFLAGS += -DBCM_PLATFORM_STRING=\"X86\" CFGFLAGS += -DSAL_BDE_DMA_MEM_DEFAULT=192 # Extra variables. -HASH := \# -EXTRA_CFLAGS = -D"KBUILD_STR(s)=$(HASH)s" $(basename_flags) $(modname_flags) +EXTRA_CFLAGS = -D"KBUILD_STR(s)=\#s" $(basename_flags) $(modname_flags) comma = , basetarget = $(basename $(notdir $@)) @@ -249,8 +240,10 @@ basename_flags = -D"KBUILD_BASENAME=KBUILD_STR($(call name-fix,$(basetarget)))" modname_flags = $(if $(filter 1,$(words $(modname))),\ -D"KBUILD_MODNAME=KBUILD_STR($(call name-fix,$(modname)))") +ifneq (, $(EDKHOST)) # Default open source target build OPENSRC_BUILD ?= fed21-x86_64 +endif ifneq ($(targetplat),user) # By default we exclude -Werror from x86 kernel builds diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-64-fc28 b/platform/broadcom/saibcm-modules-legacy-th/make/Makefile.linux-x86-64-fc28 similarity index 80% rename from platform/broadcom/saibcm-modules/make/Makefile.linux-x86-64-fc28 rename to platform/broadcom/saibcm-modules-legacy-th/make/Makefile.linux-x86-64-fc28 index 05ebf9ce56f..f96cdd06db9 100644 --- a/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-64-fc28 +++ b/platform/broadcom/saibcm-modules-legacy-th/make/Makefile.linux-x86-64-fc28 @@ -1,6 +1,5 @@ # $Id: Makefile.linux-gts,v 0.1 Broadcom SDK $ -# -# $Copyright: 2017-2025 Broadcom Inc. All rights reserved. +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. # # Permission is granted to use, copy, modify and/or distribute this # software under either one of the licenses below. @@ -45,29 +44,23 @@ # some basic path variables for tools and kernel source, etc # -RHEL_VERSION=$(shell sed -n 's/.*release *\([0-9]\+\)\..*/\1/p' /etc/redhat-release) - # # For ESW compilation, suppress 'stringop-overflow' # ifeq (1,$(GCC_11_2_0)) export BINUTILSVER := 2.41 export GCCVER := 11.2.0 - TOOLCHAIN_DIR = /tools/oss/packages/x86_64-rhel$(RHEL_VERSION)/gcc/$(GCCVER) + TOOLCHAIN_DIR = /projects/ntsw-tools/linux/gcc/11.2.0-x86_64 else ifeq (1,$(GCC_12_1_0)) export BINUTILSVER := 2.41 export GCCVER := 12.1.0 - TOOLCHAIN_DIR = /tools/oss/packages/x86_64-rhel$(RHEL_VERSION)/gcc/$(GCCVER) + TOOLCHAIN_DIR = /tools/oss/packages/x86_64-rhel7/gcc/$(GCCVER) else ifeq (1,$(GCC_13_1_0)) export BINUTILSVER := 2.41 export GCCVER := 13.1.0 - ifeq "$(shell expr $(RHEL_VERSION) \>= 8)" "1" - TOOLCHAIN_DIR = /tools/oss/packages/x86_64-rhel$(RHEL_VERSION)/gcc/$(GCCVER) - else - TOOLCHAIN_DIR = /projects/ntsw-tools/linux/gcc/$(GCCVER) - endif + TOOLCHAIN_DIR = /projects/ntsw-tools/linux/gcc/13.1.0 ifneq ($(DEBUG_OPTIMIZE),FALSE) # { # These flags are required for -O2 'optimized' compilation @@ -79,34 +72,14 @@ else # } endif else - ifeq (1,$(GCC_14_1_0)) - export GCCVER := 14.1.0 - export BINUTILSVER := 2.41 - TOOLCHAIN_DIR = /tools/oss/packages/x86_64-rhel$(RHEL_VERSION)/gcc/$(GCCVER) - # - # We do cast 'int' to pointers in include/sal/types.h. This is - # intentional and OK - # - OPT_CFLAGS += -Wno-error=pointer-to-int-cast - ifneq ($(DEBUG_OPTIMIZE),FALSE) - # { - # These flags are required for -O2 'optimized' compilation - # We leave the suppression of array-bounds since, currently, - # GCC emits many 'false positive' errors of this kind (among a - # few that are justified) - OPT_CFLAGS += -Wno-error=array-bounds= - # } - endif - else - # GCC 8.1 does not work with binutils 2.41 and newer - export BINUTILSVER := 2.38 - export GCCVER := 8.1.0 - TOOLCHAIN_DIR = /tools/oss/packages/x86_64-rhel$(RHEL_VERSION)/gcc/$(GCCVER) - endif + # GCC 8.1 does not work with binutils 2.41 and newer + export BINUTILSVER := 2.38 + export GCCVER := 8.1.0 + TOOLCHAIN_DIR = /tools/oss/packages/x86_64-rhel7/gcc/$(GCCVER) endif endif endif -BINUTILS_DIR = /tools/oss/packages/x86_64-rhel$(RHEL_VERSION)/binutils/$(BINUTILSVER)/bin +BINUTILS_DIR = /tools/oss/packages/x86_64-rhel7/binutils/$(BINUTILSVER)/bin export TCL860 := 1 # For GCC versions >= 4.7 @@ -178,10 +151,6 @@ endif endif -CFGFLAGS += -D_SIMPLE_MEMORY_ALLOCATION_=9 - -export LIBNSL_DEPRECATED := 1 - ###################################################################### # this segment comes from make/Makefile.linux-x86-smp_generic_64-2_6 # ###################################################################### @@ -236,8 +205,7 @@ CFGFLAGS += -DBCM_PLATFORM_STRING=\"X86\" CFGFLAGS += -DSAL_BDE_DMA_MEM_DEFAULT=32 # Extra variables. -HASH := \# -EXTRA_CFLAGS = -D"KBUILD_STR(s)=$(HASH)s" $(basename_flags) $(modname_flags) +EXTRA_CFLAGS = -D"KBUILD_STR(s)=\#s" $(basename_flags) $(modname_flags) comma = , basetarget = $(basename $(notdir $@)) @@ -248,7 +216,7 @@ basename_flags = -D"KBUILD_BASENAME=KBUILD_STR($(call name-fix,$(basetarget)))" modname_flags = $(if $(filter 1,$(words $(modname))),\ -D"KBUILD_MODNAME=KBUILD_STR($(call name-fix,$(modname)))") -ifeq (EDK,$(findstring EDK,$(FEATURE_LIST))) +ifneq (, $(EDKHOST)) # Default open source target build OPENSRC_BUILD ?= fed21-x86_64 endif diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-common-2_6 b/platform/broadcom/saibcm-modules-legacy-th/make/Makefile.linux-x86-common-2_6 similarity index 92% rename from platform/broadcom/saibcm-modules/make/Makefile.linux-x86-common-2_6 rename to platform/broadcom/saibcm-modules-legacy-th/make/Makefile.linux-x86-common-2_6 index c3661c15910..b888606ec2a 100644 --- a/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-common-2_6 +++ b/platform/broadcom/saibcm-modules-legacy-th/make/Makefile.linux-x86-common-2_6 @@ -1,6 +1,5 @@ # $Id: Makefile.linux-x86-common-2_6,v 1.13 Broadcom SDK $ -# -# $Copyright: 2017-2025 Broadcom Inc. All rights reserved. +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. # # Permission is granted to use, copy, modify and/or distribute this # software under either one of the licenses below. @@ -35,9 +34,8 @@ ifeq (,$(findstring -DSAL_BDE_DMA_MEM_DEFAULT,$(CFGFLAGS))) CFGFLAGS += -DSAL_BDE_DMA_MEM_DEFAULT=16 endif -HASH := \# # Extra variables. -EXTRA_CFLAGS = -D"KBUILD_STR(s)=$(HASH)s" $(basename_flags) $(modname_flags) +EXTRA_CFLAGS = -D"KBUILD_STR(s)=\#s" $(basename_flags) $(modname_flags) comma = , basetarget = $(basename $(notdir $@)) diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-generic-common-2_6 b/platform/broadcom/saibcm-modules-legacy-th/make/Makefile.linux-x86-generic-common-2_6 similarity index 95% rename from platform/broadcom/saibcm-modules/make/Makefile.linux-x86-generic-common-2_6 rename to platform/broadcom/saibcm-modules-legacy-th/make/Makefile.linux-x86-generic-common-2_6 index d3db4294ee6..6393e955dce 100644 --- a/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-generic-common-2_6 +++ b/platform/broadcom/saibcm-modules-legacy-th/make/Makefile.linux-x86-generic-common-2_6 @@ -1,6 +1,5 @@ # $Id: Makefile.linux-x86-generic-common-2_6,v 1.2 Broadcom SDK $ -# -# $Copyright: 2017-2025 Broadcom Inc. All rights reserved. +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. # # Permission is granted to use, copy, modify and/or distribute this # software under either one of the licenses below. @@ -43,7 +42,6 @@ endif # Target machine for EDK-Host defconfig TARGET_MACHINE ?= x86_64 - # Noisy kernel build KBUILD_VERBOSE = 1 @@ -62,6 +60,3 @@ endif # gcc system include path SYSINC = $(shell $(CC) -print-search-dirs | grep install | cut -c 10-)include - -export LIBNSL_DEPRECATED := 1 - diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-smp_generic_64-2_6 b/platform/broadcom/saibcm-modules-legacy-th/make/Makefile.linux-x86-smp_generic_64-2_6 similarity index 81% rename from platform/broadcom/saibcm-modules/make/Makefile.linux-x86-smp_generic_64-2_6 rename to platform/broadcom/saibcm-modules-legacy-th/make/Makefile.linux-x86-smp_generic_64-2_6 index 3dd7302aead..e5509617f09 100644 --- a/platform/broadcom/saibcm-modules/make/Makefile.linux-x86-smp_generic_64-2_6 +++ b/platform/broadcom/saibcm-modules-legacy-th/make/Makefile.linux-x86-smp_generic_64-2_6 @@ -1,6 +1,5 @@ # $Id: Makefile.linux-x86-smp_generic_64-2_6,v 1.5 Broadcom SDK $ -# -# $Copyright: 2017-2025 Broadcom Inc. All rights reserved. +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. # # Permission is granted to use, copy, modify and/or distribute this # software under either one of the licenses below. @@ -48,7 +47,27 @@ ifneq (,$(shell ls $(LINUX_UAPI) 2>/dev/null)) KFLAGS += -I$(LINUX_INCLUDE)/uapi -I$(LINUX_INCLUDE)/generated/uapi -I$(KERNDIR)/arch/x86/include/generated -I$(KERNDIR)/arch/x86/include/uapi -I$(KERNDIR)/arch/x86/include/generated/uapi endif +GCC_MAJOR_VER = $(shell GCCVER=$(GCCVER) $(CC) -dumpversion | cut -d'.' -f1) + +ifeq (${GCC_MAJOR_VER}, 11) +CFGFLAGS += -Wno-error=sizeof-array-div +CFGFLAGS += -Wno-error=stringop-overread +endif +ifneq (1,$(USE_CLANG)) +CFGFLAGS += -Wno-error=stringop-truncation +CFGFLAGS += -Wno-error=maybe-uninitialized +CFGFLAGS += -Wno-error=format-overflow +CFGFLAGS += -Wno-error=array-bounds +endif + ifdef LTSW_CHIPS +# Ensure we do not use an out-of-date libelf.so +ELFUTILS_MIN = 158 +ELFUTILS_DIR ?= /projects/ntsw-tools/lib + +# Default open source target build +OPENSRC_BUILD ?= x86_64 + # Hardware interface (see $SDKLT/bcma/sys/probe directory) SYSTEM_INTERFACE ?= ngbde @@ -62,7 +81,9 @@ endif export SYSTEM_INTERFACE endif +ifneq (, $(EDKHOST)) # Default open source target build OPENSRC_BUILD ?= x86_64 +endif include ${SDK}/make/Makefile.linux-x86-common-2_6 diff --git a/platform/broadcom/saibcm-modules-legacy-th/make/Makefile.linux-xlr b/platform/broadcom/saibcm-modules-legacy-th/make/Makefile.linux-xlr new file mode 100644 index 00000000000..690e0eb8d62 --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/make/Makefile.linux-xlr @@ -0,0 +1,201 @@ +# $Id: Makefile.linux-xlr-4_19,v 0.1 Broadcom SDK $ +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# +# + +# +# XLR system make file. +# +# Most of this was taken from target x86-smp_generic_64-2_6. +# + +############################################################################# +# this segment is custom and not sourced from any existing makefile # +# (base thanks to http:confluence.broadcom.com/display/NTSWSW/X86+System) # +############################################################################# + +# set up a basic feature list. tcl, etc. # +#ifeq (,$(FEATURE_LIST)) +#FEATURE_LIST = TCL BFD PTP CINT L3 I2C MEM_SCAN EDITLINE BCM_SAL_PROFILE CUSTOMER TEST CHASSIS MSTP RCPU +#endif + +# some basic path variables for tools and kernel source, etc # +XLR_TOOLS_BASE ?= /projects/ntsw-tools/linux/xlr-66 +TOOLCHAIN_DIR = $(XLR_TOOLS_BASE)/buildroot/host/usr +ifeq (1,$(USE_CLANG)) +KERNDIR = $(XLR_TOOLS_BASE)/kernel/linux-clang +endif +KERNDIR ?= $(XLR_TOOLS_BASE)/kernel/linux + +# Target machine for EDK-Host defconfig +TARGET_MACHINE ?= x86_64 + +# set up cross compile prefix, tools dir variables. # +export CROSS_COMPILE := x86_64-linux- +export TOOLS_DIR := $(TOOLCHAIN_DIR)/bin + +# architecture. # +ARCH = x86_64 +TARGET_ARCHITECTURE = x86_64-broadcom-linux-gnu + +# Noisy kernel build +KBUILD_VERBOSE = 1 + +export ARCH KBUILD_VERBOSE + +# set up paths. # +export LIBRARY_PATH := $(TOOLCHAIN_DIR)/lib:$(TOOLCHAIN_DIR)/lib64:$(LIBRARY_PATH) +export PATH := $(TOOLCHAIN_DIR)/bin:$(KERNDIR):$(PATH) + +# set up SYSINC path # +CROSS_GCC_VER ?= $(shell $(TOOLCHAIN_DIR)/bin/$(CROSS_COMPILE)gcc -dumpversion) +CROSS_GCC_VER_MAJOR := $(shell echo $(CROSS_GCC_VER) | cut -f1 -d.) +export SYSINC := $(TOOLCHAIN_DIR)/lib/gcc/$(TARGET_ARCHITECTURE)/$(CROSS_GCC_VER)/include + +# Glibc 2.27 or later version doesn't support SVID libm error handling. +# Building tcl 8.3.3 with the new toolchain will occur errors. +export TCL840 := 1 + +# Common CFLAGS +CFGFLAGS += -DUSE_LINUX_BDE_MMAP=1 +#CFGFLAGS += -DBDE_LINUX_USE_MSI_INTERRUPT +ifneq (1,$(USE_CLANG)) +CFLAGS += -L$(TOOLCHAIN_DIR)/lib +CFLAGS += -L$(TOOLCHAIN_DIR)/lib64 +endif +#OPT_CFLAGS += -Wl,--rpath=/lib64 # may need to set rpath and dynamic-linker path here (and possibly in KLFAGS below) in the future, # +#OPT_CFLAGS += -Wl,--dynamic-linker=/lib64/ld-linux-x86-64.so.2 # if we want to build the target executable to be used with shared libs # + +# Needed for a warning in src/soc/phy/fcmap/src/bfcmap88060_a0.c that can't be +# fixed because of a Montreal2 FW dependency +ifeq ($(LOCALDIR),src/soc/phy/fcmap/src) +OPT_CFLAGS += -Wno-address-of-packed-member +endif + +# Compiler-specific CFLAGS +ifeq (1,$(USE_CLANG)) # CLANG-specific CFLAGS +ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 12)" "1" + export LIBNSL_DEPRECATED := 1 +endif +else # GCC-specific CFLAGS +ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 8)" "1" +endif +ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 9)" "1" +endif +ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 10)" "1" + CFLAGS += -fcommon +endif +ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 12)" "1" + CFLAGS += -flarge-source-files + export LIBNSL_DEPRECATED := 1 +endif +ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 13)" "1" + CFLAGS += -fcf-protection +endif +endif # Compiler-specific CFLAGS + +#XLDK-568 fix inline references +CFGFLAGS += -fgnu89-inline + +# set up KFLAGS appropriately. # +ifeq (,$(KFLAGS)) +KFLAGS := -I$(KERNDIR) -nostdinc -isystem $(SYSINC) -Iinclude -I$(KERNDIR)/arch/x86/include -I$(KERNDIR)/arch/x86/include/generated -I$(KERNDIR)/arch/x86/include/generated/uapi -I$(KERNDIR)/arch/x86/include/uapi -I$(KERNDIR)/include -I$(KERNDIR)/include/generated -I$(KERNDIR)/include/generated/uapi -I$(KERNDIR)/include/uapi -include $(KERNDIR)/include/generated/autoconf.h -D__KERNEL__ -DNDEBUG -Wundef -Wstrict-prototypes -Wno-trigraphs -fno-strict-aliasing -fno-common -Wno-format-security -fno-delete-null-pointer-checks -Os -mno-sse -m64 -mtune=generic -mno-red-zone -mcmodel=kernel -fstack-protector -DCONFIG_AS_CFI=1 -DCONFIG_AS_CFI_SIGNAL_FRAME=1 -pipe -Wno-sign-compare -fno-asynchronous-unwind-tables -fno-omit-frame-pointer -Wdeclaration-after-statement -Wno-pointer-sign -fno-dwarf2-cfi-asm +ifneq (1,$(USE_CLANG)) +KFLAGS += -L$(TOOLCHAIN_DIR)/lib -L$(TOOLCHAIN_DIR)/lib64 -lc -funit-at-a-time -maccumulate-outgoing-args -fconserve-stack +else +KFLAGS += -fno-pie +endif +endif + + +###################################################################### +# this segment comes from make/Makefile.linux-x86-smp_generic_64-2_6 # +###################################################################### +CFGFLAGS += -DLONGS_ARE_64BITS +CFGFLAGS += -DPTRS_ARE_64BITS +CFGFLAGS += -DPHYS_ADDRS_ARE_64BITS +CFGFLAGS += -DSAL_SPL_LOCK_ON_IRQ + + +############################################################## +# This segment comes from make/Makefile.linux-x86-common-2_6 # +############################################################## +CFGFLAGS += -DSYS_BE_PIO=0 -DSYS_BE_PACKET=0 -DSYS_BE_OTHER=0 +ENDIAN = LE_HOST=1 +CFGFLAGS += -D$(ENDIAN) +CFGFLAGS += -DBCM_PLATFORM_STRING=\"X86\" +CFGFLAGS += -DSAL_BDE_DMA_MEM_DEFAULT=32 + +# Extra variables. +EXTRA_CFLAGS = -D"KBUILD_STR(s)=\#s" $(basename_flags) $(modname_flags) + +comma = , +basetarget = $(basename $(notdir $@)) +modname = $(basetarget) + +name-fix = $(subst $(comma),_,$(subst -,_,$1)) +basename_flags = -D"KBUILD_BASENAME=KBUILD_STR($(call name-fix,$(basetarget)))" +modname_flags = $(if $(filter 1,$(words $(modname))),\ +-D"KBUILD_MODNAME=KBUILD_STR($(call name-fix,$(modname)))") + +ifdef LTSW_CHIPS +# Ensure we do not use an out-of-date libelf.so +ELFUTILS_MIN = 158 +ELFUTILS_DIR ?= /projects/ntsw-tools/lib + +# Default open source target build +OPENSRC_BUILD ?= fed21-x86_64 + +# Hardware interface (see $SDKLT/bcma/sys/probe directory) +SYSTEM_INTERFACE ?= ngbde + +# Support BCMSIM in the same build +ifeq (1,$(BCM_SIM_PATH_SUPPORT)) +EXTRA_SYSTEM_INTERFACES = plisim +endif + +# Turn on direct register access if running on real hardware. +ifeq (ngbde,$(SYSTEM_INTERFACE)) +# Except if using multiple probe interfaces +ifeq (,$(EXTRA_SYSTEM_INTERFACES)) +LTSW_ADD_CPPFLAGS += -DBCMDRD_CONFIG_MEMMAP_DIRECT=1 +endif +endif + +export SYSTEM_INTERFACE +export EXTRA_SYSTEM_INTERFACES +endif + +ifneq (, $(EDKHOST)) +# Default open source target build +OPENSRC_BUILD ?= fed21-x86_64 +endif + +ifneq ($(targetplat),user) +# By default we exclude -Werror from x86 kernel builds +BCM_CFLAGS = -Wall +include ${SDK}/make/Makefile.linux-kernel-2_6 +endif diff --git a/platform/broadcom/saibcm-modules/sdklt/LICENSES/gpl-2.0.txt b/platform/broadcom/saibcm-modules-legacy-th/sdklt/LICENSES/gpl-2.0.txt similarity index 100% rename from platform/broadcom/saibcm-modules/sdklt/LICENSES/gpl-2.0.txt rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/LICENSES/gpl-2.0.txt diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/Makefile b/platform/broadcom/saibcm-modules-legacy-th/sdklt/Makefile new file mode 100644 index 00000000000..45442dcfbf5 --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/Makefile @@ -0,0 +1,126 @@ +# +# Copyright 2018-2024 Broadcom. All rights reserved. +# The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License +# version 2 as published by the Free Software Foundation. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# A copy of the GNU General Public License version 2 (GPLv2) can +# be found in the LICENSES folder. +# +# Makefile for building Linux GPL kernel modules for SDKLT. +# + +help: + @echo '' + @echo 'Build Linux GPL kernel modules for SDKLT.' + @echo '' + @echo 'Available make targets:' + @echo 'kmod - Build kernel modules' + @echo 'clean - Remove object files' + @echo '' + @echo 'Supported make variables:' + @echo 'KDIR - Linux kernel source directory (mandatory)' + @echo 'CROSS_COPILE - Cross-compiler prefix (optional)' + @echo 'OUTPUT_DIR - Output directory (build/ by default)' + @echo '' + @echo 'Examples:' + @echo 'make -s KDIR=$$KERNEL/linux kmod' + @echo 'make -s clean' + @echo '' + +ifndef KDIR +nokdir: + @echo 'Error: The $$KDIR environment variable is not set.' + @echo '$$KDIR must point to a configured Linux kernel source tree.' + exit 1 +endif + +export KDIR +export CROSS_COMPILE + +override SDK := $(CURDIR) + +ifeq (,$(OUTPUT_DIR)) +OUTPUT_DIR := $(CURDIR)/build +endif + +BDE_BLDDIR := $(OUTPUT_DIR)/bde +KNET_BLDDIR := $(OUTPUT_DIR)/knet +KNETCB_BLDDIR := $(OUTPUT_DIR)/knetcb +BCMGENL_BLDDIR := $(OUTPUT_DIR)/bcmgenl +GENL_PACKET_BLDDIR := $(OUTPUT_DIR)/genl-packet +EDK_BLDDIR := $(OUTPUT_DIR)/edk +PTPCLOCK_BLDDIR := $(OUTPUT_DIR)/ptpclock +ST_BLDDIR := $(OUTPUT_DIR)/st + +LKM_CFLAGS += -UNGKNET_NETIF_MAX -DNGKNET_NETIF_MAX=1056 -UNGKNET_FILTER_MAX -DNGKNET_FILTER_MAX=1025 +export LKM_CFLAGS + +KMODS := bde knet knetcb genl-packet bcmgenl edk ptpclock st + +kmod: $(KMODS) + +bde: + $(MAKE) -C $(SDK)/linux/bde SDK=$(SDK) \ + LKM_BLDDIR=$(BDE_BLDDIR) $(TARGET) + ln -sf $(BDE_BLDDIR)/*.ko $(OUTPUT_DIR) + +knet: bde + $(MAKE) -C $(SDK)/linux/knet SDK=$(SDK) \ + KBUILD_EXTRA_SYMBOLS=$(BDE_BLDDIR)/Module.symvers \ + LKM_BLDDIR=$(KNET_BLDDIR) $(TARGET) + ln -sf $(KNET_BLDDIR)/*.ko $(OUTPUT_DIR) + +knetcb: knet + $(MAKE) -C $(SDK)/linux/knetcb SDK=$(SDK) \ + KBUILD_EXTRA_SYMBOLS=$(KNET_BLDDIR)/Module.symvers \ + LKM_BLDDIR=$(KNETCB_BLDDIR) $(TARGET) + ln -sf $(KNETCB_BLDDIR)/*.ko $(OUTPUT_DIR) + +bcmgenl: knet genl-packet + $(MAKE) -C $(SDK)/linux/bcmgenl SDK=$(SDK) \ + KBUILD_EXTRA_SYMBOLS=$(KNET_BLDDIR)/Module.symvers \ + LKM_BLDDIR=$(BCMGENL_BLDDIR) $(TARGET) + ln -sf $(BCMGENL_BLDDIR)/*.ko $(OUTPUT_DIR) + +genl-packet: + $(MAKE) -C $(SDK)/linux/genl-packet SDK=$(SDK) \ + LKM_BLDDIR=$(GENL_PACKET_BLDDIR) $(TARGET) + ln -sf $(GENL_PACKET_BLDDIR)/*.ko $(OUTPUT_DIR) + +edk: bde + $(MAKE) -C $(SDK)/linux/edk SDK=$(SDK) \ + KBUILD_EXTRA_SYMBOLS=$(BDE_BLDDIR)/Module.symvers \ + LKM_BLDDIR=$(EDK_BLDDIR) $(TARGET) + ln -sf $(EDK_BLDDIR)/*.ko $(OUTPUT_DIR) + +ptpclock: bde knet edk + $(MAKE) -C $(SDK)/linux/ptpclock SDK=$(SDK) \ + KBUILD_EXTRA_SYMBOLS=$(BDE_BLDDIR)/Module.symvers \ + KBUILD_EXTRA_SYMBOLS+=$(KNET_BLDDIR)/Module.symvers \ + KBUILD_EXTRA_SYMBOLS+=$(EDK_BLDDIR)/Module.symvers \ + LKM_BLDDIR=$(PTPCLOCK_BLDDIR) $(TARGET) + ln -sf $(PTPCLOCK_BLDDIR)/*.ko $(OUTPUT_DIR) + +st: bde + $(MAKE) -C $(SDK)/linux/st SDK=$(SDK) \ + KBUILD_EXTRA_SYMBOLS=$(BDE_BLDDIR)/Module.symvers \ + LKM_BLDDIR=$(ST_BLDDIR) $(TARGET) + ln -sf $(ST_BLDDIR)/*.ko $(OUTPUT_DIR) + +clean: + $(MAKE) kmod TARGET=$@ + rm -f $(OUTPUT_DIR)/*.ko + +distclean: + $(MAKE) kmod TARGET=$@ + rm -rf $(OUTPUT_DIR) + +.PHONY: help kmod clean distclean $(KMODS) diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56080_a0/bcm56080_a0_pdma_attach.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/chip/bcm56080_a0/bcm56080_a0_pdma_attach.c similarity index 94% rename from platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56080_a0/bcm56080_a0_pdma_attach.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/chip/bcm56080_a0/bcm56080_a0_pdma_attach.c index a6754d004e0..4f2f776c653 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56080_a0/bcm56080_a0_pdma_attach.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/chip/bcm56080_a0/bcm56080_a0_pdma_attach.c @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56690_a0/bcm56690_a0_pdma_attach.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/chip/bcm56690_a0/bcm56690_a0_pdma_attach.c similarity index 94% rename from platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56690_a0/bcm56690_a0_pdma_attach.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/chip/bcm56690_a0/bcm56690_a0_pdma_attach.c index 9cb524f9ece..65d28a0113b 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56690_a0/bcm56690_a0_pdma_attach.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/chip/bcm56690_a0/bcm56690_a0_pdma_attach.c @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56780_a0/bcm56780_a0_pdma_attach.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/chip/bcm56780_a0/bcm56780_a0_pdma_attach.c similarity index 94% rename from platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56780_a0/bcm56780_a0_pdma_attach.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/chip/bcm56780_a0/bcm56780_a0_pdma_attach.c index bcb7579427b..cdff9ce0a3f 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56780_a0/bcm56780_a0_pdma_attach.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/chip/bcm56780_a0/bcm56780_a0_pdma_attach.c @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56880_a0/bcm56880_a0_pdma_attach.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/chip/bcm56880_a0/bcm56880_a0_pdma_attach.c similarity index 94% rename from platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56880_a0/bcm56880_a0_pdma_attach.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/chip/bcm56880_a0/bcm56880_a0_pdma_attach.c index 51fea730d56..8abad49b700 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56880_a0/bcm56880_a0_pdma_attach.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/chip/bcm56880_a0/bcm56880_a0_pdma_attach.c @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56890_a0/bcm56890_a0_pdma_attach.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/chip/bcm56890_a0/bcm56890_a0_pdma_attach.c similarity index 94% rename from platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56890_a0/bcm56890_a0_pdma_attach.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/chip/bcm56890_a0/bcm56890_a0_pdma_attach.c index 1127b844a72..7b066852280 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56890_a0/bcm56890_a0_pdma_attach.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/chip/bcm56890_a0/bcm56890_a0_pdma_attach.c @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56990_a0/bcm56990_a0_pdma_attach.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/chip/bcm56990_a0/bcm56990_a0_pdma_attach.c similarity index 94% rename from platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56990_a0/bcm56990_a0_pdma_attach.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/chip/bcm56990_a0/bcm56990_a0_pdma_attach.c index d80c9bd9385..3f233826369 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56990_a0/bcm56990_a0_pdma_attach.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/chip/bcm56990_a0/bcm56990_a0_pdma_attach.c @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56990_b0/bcm56990_b0_pdma_attach.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/chip/bcm56990_b0/bcm56990_b0_pdma_attach.c similarity index 94% rename from platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56990_b0/bcm56990_b0_pdma_attach.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/chip/bcm56990_b0/bcm56990_b0_pdma_attach.c index f51bb7b51cc..6f16042a5b9 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56990_b0/bcm56990_b0_pdma_attach.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/chip/bcm56990_b0/bcm56990_b0_pdma_attach.c @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56996_a0/bcm56996_a0_pdma_attach.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/chip/bcm56996_a0/bcm56996_a0_pdma_attach.c similarity index 94% rename from platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56996_a0/bcm56996_a0_pdma_attach.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/chip/bcm56996_a0/bcm56996_a0_pdma_attach.c index 0cd084229db..e889d221a23 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56996_a0/bcm56996_a0_pdma_attach.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/chip/bcm56996_a0/bcm56996_a0_pdma_attach.c @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56996_b0/bcm56996_b0_pdma_attach.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/chip/bcm56996_b0/bcm56996_b0_pdma_attach.c similarity index 94% rename from platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56996_b0/bcm56996_b0_pdma_attach.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/chip/bcm56996_b0/bcm56996_b0_pdma_attach.c index a887f11dcb6..fad6934e869 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56996_b0/bcm56996_b0_pdma_attach.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/chip/bcm56996_b0/bcm56996_b0_pdma_attach.c @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56998_a0/bcm56998_a0_pdma_attach.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/chip/bcm56998_a0/bcm56998_a0_pdma_attach.c similarity index 94% rename from platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56998_a0/bcm56998_a0_pdma_attach.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/chip/bcm56998_a0/bcm56998_a0_pdma_attach.c index 11b4ada9944..5a9745e211e 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56998_a0/bcm56998_a0_pdma_attach.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/chip/bcm56998_a0/bcm56998_a0_pdma_attach.c @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56999_a0/bcm56999_a0_pdma_attach.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/chip/bcm56999_a0/bcm56999_a0_pdma_attach.c similarity index 94% rename from platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56999_a0/bcm56999_a0_pdma_attach.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/chip/bcm56999_a0/bcm56999_a0_pdma_attach.c index b592b39fbcb..75d0c2f3650 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm56999_a0/bcm56999_a0_pdma_attach.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/chip/bcm56999_a0/bcm56999_a0_pdma_attach.c @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm78800_a0/bcm78800_a0_pdma_attach.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/chip/bcm78800_a0/bcm78800_a0_pdma_attach.c similarity index 94% rename from platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm78800_a0/bcm78800_a0_pdma_attach.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/chip/bcm78800_a0/bcm78800_a0_pdma_attach.c index 4995909e17a..ae9f2b921b9 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm78800_a0/bcm78800_a0_pdma_attach.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/chip/bcm78800_a0/bcm78800_a0_pdma_attach.c @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm78900_b0/bcm78900_b0_pdma_attach.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/chip/bcm78900_b0/bcm78900_b0_pdma_attach.c similarity index 94% rename from platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm78900_b0/bcm78900_b0_pdma_attach.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/chip/bcm78900_b0/bcm78900_b0_pdma_attach.c index 910a65701ee..a84aabba94b 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm78900_b0/bcm78900_b0_pdma_attach.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/chip/bcm78900_b0/bcm78900_b0_pdma_attach.c @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm78905_a0/bcm78905_a0_pdma_attach.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/chip/bcm78905_a0/bcm78905_a0_pdma_attach.c similarity index 94% rename from platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm78905_a0/bcm78905_a0_pdma_attach.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/chip/bcm78905_a0/bcm78905_a0_pdma_attach.c index 3333794af5a..ded5f926a3b 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm78905_a0/bcm78905_a0_pdma_attach.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/chip/bcm78905_a0/bcm78905_a0_pdma_attach.c @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm78907_a0/bcm78907_a0_pdma_attach.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/chip/bcm78907_a0/bcm78907_a0_pdma_attach.c similarity index 94% rename from platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm78907_a0/bcm78907_a0_pdma_attach.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/chip/bcm78907_a0/bcm78907_a0_pdma_attach.c index efb8e859d9f..17e4e62b5e3 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm78907_a0/bcm78907_a0_pdma_attach.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/chip/bcm78907_a0/bcm78907_a0_pdma_attach.c @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicd/bcmcnet_cmicd_pdma_hw.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/hmi/cmicd/bcmcnet_cmicd_pdma_hw.c similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicd/bcmcnet_cmicd_pdma_hw.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/hmi/cmicd/bcmcnet_cmicd_pdma_hw.c index 06d91116438..d64b67434a5 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicd/bcmcnet_cmicd_pdma_hw.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/hmi/cmicd/bcmcnet_cmicd_pdma_hw.c @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicd/bcmcnet_cmicd_pdma_rxtx.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/hmi/cmicd/bcmcnet_cmicd_pdma_rxtx.c similarity index 90% rename from platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicd/bcmcnet_cmicd_pdma_rxtx.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/hmi/cmicd/bcmcnet_cmicd_pdma_rxtx.c index f7b98fd654b..5cf72ff861d 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicd/bcmcnet_cmicd_pdma_rxtx.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/hmi/cmicd/bcmcnet_cmicd_pdma_rxtx.c @@ -38,8 +38,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -176,7 +175,6 @@ cmicd_pdma_rx_desc_init(struct pdma_hw *hw, struct pdma_rx_queue *rxq) struct pdma_dev *dev = hw->dev; struct pdma_buf_mngr *bm = (struct pdma_buf_mngr *)dev->ctrl.buf_mngr; struct cmicd_rx_desc *ring = (struct cmicd_rx_desc *)rxq->ring; - bool refill = false; dma_addr_t addr; uint32_t di; int rv; @@ -187,11 +185,7 @@ cmicd_pdma_rx_desc_init(struct pdma_hw *hw, struct pdma_rx_queue *rxq) rxq->pbuf[di].adj = CMICD_RX_META_RESV; rv = bm->rx_buf_alloc(dev, rxq, &rxq->pbuf[di]); if (SHR_FAILURE(rv)) { - if (rxq->state & PDMA_RX_BATCH_REFILL) { - refill = true; - } else { - goto cleanup; - } + goto cleanup; } } /* Config receive descriptor ring */ @@ -205,9 +199,7 @@ cmicd_pdma_rx_desc_init(struct pdma_hw *hw, struct pdma_rx_queue *rxq) cmicd_rx_rldesc_config(&ring[di], rxq->ring_addr); rxq->curr = 0; - if (!refill) { - rxq->halt = rxq->nb_desc - 1; - } + rxq->halt = rxq->nb_desc - 1; rxq->halt_addr = rxq->ring_addr + sizeof(struct cmicd_rx_desc) * rxq->halt; hw->hdls.chan_goto(hw, rxq->chan_id, rxq->halt_addr); @@ -370,7 +362,7 @@ cmicd_pdma_rx_ring_refill(struct pdma_hw *hw, struct pdma_rx_queue *rxq) int unused = cmicd_pdma_rx_ring_unused(rxq); dma_addr_t addr; uint32_t halt; - int rv = SHR_E_NONE; + int rv; for (halt = rxq->halt; halt < rxq->halt + unused; halt++) { if (ring[halt % rxq->nb_desc].addr) { @@ -383,8 +375,8 @@ cmicd_pdma_rx_ring_refill(struct pdma_hw *hw, struct pdma_rx_queue *rxq) if (SHR_FAILURE(rv)) { rxq->stats.nomems++; rxq->halt = halt % rxq->nb_desc; - CNET_INFO(hw->unit, "%d DCBs not filled, will retry late\n", - cmicd_pdma_rx_ring_unused(rxq)); + CNET_ERROR(hw->unit, "Can not alloc RX buffer, %d DCBs not filled\n", + cmicd_pdma_rx_ring_unused(rxq)); break; } } @@ -406,7 +398,7 @@ cmicd_pdma_rx_ring_refill(struct pdma_hw *hw, struct pdma_rx_queue *rxq) } sal_spinlock_unlock(rxq->lock); - return rv; + return SHR_E_NONE; } /*! @@ -428,25 +420,14 @@ cmicd_pdma_rx_ring_clean(struct pdma_hw *hw, struct pdma_rx_queue *rxq, int budg struct pdma_rx_buf *pbuf = NULL; struct pkt_hdr *pkh = NULL; dma_addr_t addr; - uint32_t stat, curr = rxq->curr; + uint32_t stat, curr; int len, done = 0; - int retry, fill = SHR_E_NONE; + int retry; int rv; - while (done < budget && !(dev->flags & PDMA_ABORT)) { - /* Replenish all the unused descriptors in batch mode */ - if (rxq->state & PDMA_RX_BATCH_REFILL && - cmicd_pdma_rx_ring_unused(rxq) >= (int)rxq->free_thresh) { - fill = cmicd_pdma_rx_ring_refill(hw, rxq); - /* If no one filled, return budget and keep polling */ - if (cmicd_pdma_rx_ring_unused(rxq) == (int)(rxq->nb_desc - 1)) { - rxq->state |= PDMA_RX_QUEUE_BUSY; - return budget; - } - } - - /* Check new packet */ - if (!CMICD_DESC_STAT_DONE(ring[curr].md.status)) { + curr = rxq->curr; + while (CMICD_DESC_STAT_DONE(ring[curr].md.status)) { + if (done == budget) { break; } @@ -462,8 +443,46 @@ cmicd_pdma_rx_ring_clean(struct pdma_hw *hw, struct pdma_rx_queue *rxq, int budg sal_spinlock_unlock(rxq->lock); } - /* Check the status */ + /* Get the current pktbuf to process */ + pbuf = &rxq->pbuf[curr]; stat = ring[curr].md.status; + len = CMICD_DESC_STAT_LEN(stat); + pkh = bm->rx_buf_get(dev, rxq, pbuf, len); + if (!pkh) { + CNET_ERROR(hw->unit, "RX buffer build failed, retry ...\n"); + rxq->stats.nomems++; + /* Set busy state to retry */ + rxq->state |= PDMA_RX_QUEUE_BUSY; + return budget; + } + + /* Setup packet header */ + pkh->data_len = len; + pkh->meta_len = pbuf->adj; + pkh->queue_id = rxq->queue_id; + pkh->attrs = CMICD_DESC_STAT_FLAGS(stat); + sal_memcpy(pkh + 1, &ring[curr].md, sizeof(struct rx_metadata)); + + /* Send up the packet */ + rv = dev->pkt_recv(dev, rxq->queue_id, (void *)pbuf->skb); + if (SHR_FAILURE(rv)) { + if (dev->mode == DEV_MODE_HNET && pkh->attrs & PDMA_RX_TO_VNET) { + rv = cmicd_pdma_rx_vring_process(hw, rxq, pbuf); + if (SHR_FAILURE(rv) && rv == SHR_E_BUSY) { + rxq->state |= PDMA_RX_QUEUE_BUSY; + return done; + } + } else { + rxq->stats.dropped++; + } + bm->rx_buf_put(dev, rxq, pbuf, len); + } + + /* Count the packets/bytes */ + rxq->stats.packets++; + rxq->stats.bytes += len; + + /* Count the errors if any */ if (stat & CMICD_DESC_STAT_ERR_MASK) { rxq->stats.errors++; if (stat & CMICD_DESC_STAT_HEAD_ERR) { @@ -475,56 +494,8 @@ cmicd_pdma_rx_ring_clean(struct pdma_hw *hw, struct pdma_rx_queue *rxq, int budg if (stat & CMICD_DESC_STAT_CELL_ERR) { rxq->stats.cell_errors++; } - - CNET_ERROR(hw->unit, "Packet data corrupted, ignore it ...\n"); - - /* Update the indicators (no lock required) */ - ring[curr].md.status = 0; - curr = (curr + 1) % rxq->nb_desc; - rxq->curr = curr; - done++; - continue; - } - - /* Get the current pktbuf to process */ - pbuf = &rxq->pbuf[curr]; - len = CMICD_DESC_STAT_LEN(stat); - rv = bm->rx_buf_get(dev, rxq, pbuf, len); - if (SHR_SUCCESS(rv)) { - /* Setup packet header */ - pkh = &pbuf->pkb->pkh; - pkh->data_len = len; - pkh->meta_len = pbuf->adj; - pkh->queue_id = rxq->queue_id; - pkh->attrs = CMICD_DESC_STAT_FLAGS(stat); - sal_memcpy(&pbuf->pkb->data, &ring[curr].md, sizeof(struct rx_metadata)); - - /* Send up the packet */ - rv = dev->pkt_recv(dev, rxq->queue_id, (void *)pbuf->skb); - if (SHR_FAILURE(rv)) { - if (dev->mode == DEV_MODE_HNET && pkh->attrs & PDMA_RX_TO_VNET) { - rv = cmicd_pdma_rx_vring_process(hw, rxq, pbuf); - if (SHR_FAILURE(rv) && rv == SHR_E_BUSY) { - rxq->state |= PDMA_RX_QUEUE_BUSY; - return done; - } - } else { - rxq->stats.dropped++; - } - bm->rx_buf_put(dev, rxq, pbuf, len); - } - } else if (rv != SHR_E_UNAVAIL) { - CNET_INFO(hw->unit, "RX buffer not enough, retry ...\n"); - rxq->stats.nomems++; - /* Set busy state to retry */ - rxq->state |= PDMA_RX_QUEUE_BUSY; - return budget; } - /* Count the packets/bytes */ - rxq->stats.packets++; - rxq->stats.bytes += len; - /* Setup the new descriptor */ if (!(rxq->state & PDMA_RX_BATCH_REFILL)) { if (!bm->rx_buf_avail(dev, rxq, pbuf)) { @@ -562,15 +533,27 @@ cmicd_pdma_rx_ring_clean(struct pdma_hw *hw, struct pdma_rx_queue *rxq, int budg /* Notify HNET to process if needed */ if (dev->mode == DEV_MODE_VNET) { - if (ring[(curr + rxq->nb_desc - 1) % rxq->nb_desc].md.status == 0 && - ring[(curr + rxq->nb_desc - 2) % rxq->nb_desc].md.status != 0) { + if (ring[(curr + rxq->nb_desc - 1) % rxq->nb_desc].md.status) { dev->xnet_wake(dev); } } /* Update the indicators */ - curr = (curr + 1) % rxq->nb_desc; - rxq->curr = curr; + if (!(rxq->state & PDMA_RX_BATCH_REFILL)) { + sal_spinlock_lock(rxq->lock); + if (!(rxq->status & PDMA_RX_QUEUE_XOFF) && (rxq->halt != curr)) { + /* Descriptor cherry pick */ + rxq->halt_addr = rxq->ring_addr + sizeof(struct cmicd_rx_desc) * curr; + hw->hdls.chan_goto(hw, rxq->chan_id, rxq->halt_addr); + rxq->halt = curr; + } + curr = (curr + 1) % rxq->nb_desc; + rxq->curr = curr; + sal_spinlock_unlock(rxq->lock); + } else { + curr = (curr + 1) % rxq->nb_desc; + rxq->curr = curr; + } done++; /* Restart DMA if in chain mode */ @@ -591,7 +574,18 @@ cmicd_pdma_rx_ring_clean(struct pdma_hw *hw, struct pdma_rx_queue *rxq, int budg } } - return SHR_FAILURE(fill) ? budget : done; + /* In batching mode, replenish all the unused descriptors */ + if (rxq->state & PDMA_RX_BATCH_REFILL && + cmicd_pdma_rx_ring_unused(rxq) >= (int)rxq->free_thresh) { + cmicd_pdma_rx_ring_refill(hw, rxq); + /* If no one filled, return budget and keep polling */ + if (cmicd_pdma_rx_ring_unused(rxq) == (int)(rxq->nb_desc - 1)) { + rxq->state |= PDMA_RX_QUEUE_BUSY; + return budget; + } + } + + return done; } /*! @@ -643,11 +637,15 @@ cmicd_pdma_tx_ring_clean(struct pdma_hw *hw, struct pdma_tx_queue *txq, int budg struct pdma_dev *dev = hw->dev; struct pdma_buf_mngr *bm = (struct pdma_buf_mngr *)dev->ctrl.buf_mngr; struct cmicd_tx_desc *ring = (struct cmicd_tx_desc *)txq->ring; - uint32_t curr, dirt = txq->dirt; + uint32_t dirt, curr; int done = 0; - while (done < budget) { - if (!txq->pbuf[dirt].dma || !CMICD_DESC_STAT_DONE(ring[dirt].md.status)) { + dirt = txq->dirt; + while (txq->pbuf[dirt].dma) { + if (!CMICD_DESC_STAT_DONE(ring[dirt].md.status)) { + break; + } + if (done == budget) { break; } @@ -679,10 +677,6 @@ cmicd_pdma_tx_ring_clean(struct pdma_hw *hw, struct pdma_tx_queue *txq, int budg } sal_spinlock_unlock(txq->lock); } - - if (dev->flags & PDMA_ABORT) { - break; - } } /* One more poll for chain done in chain mode */ @@ -896,9 +890,9 @@ cmicd_pdma_pkt_xmit(struct pdma_hw *hw, struct pdma_tx_queue *txq, void *buf) } txq->state |= PDMA_TX_QUEUE_BUSY; } else { - pbuf->adj = 1; - rv = bm->tx_buf_get(dev, txq, pbuf, buf); - if (SHR_FAILURE(rv)) { + pbuf->adj = 0; + pkh = bm->tx_buf_get(dev, txq, pbuf, buf); + if (!pkh) { txq->stats.dropped++; if (dev->tx_suspend) { sal_spinlock_unlock(txq->mutex); @@ -908,13 +902,12 @@ cmicd_pdma_pkt_xmit(struct pdma_hw *hw, struct pdma_tx_queue *txq, void *buf) return SHR_E_RESOURCE; } bm->tx_buf_dma(dev, txq, pbuf, &addr); - pkh = &pbuf->pkb->pkh; flags |= pkh->attrs & PDMA_TX_HIGIG_PKT ? CMICD_DESC_TX_HIGIG_PKT : 0; flags |= pkh->attrs & PDMA_TX_PAUSE_PKT ? CMICD_DESC_TX_PAUSE_PKT : 0; flags |= pkh->attrs & PDMA_TX_PURGE_PKT ? CMICD_DESC_TX_PURGE_PKT : 0; cmicd_tx_desc_config(&ring[curr], addr, pbuf->len, flags); if (pkh->meta_len) { - sal_memcpy(&ring[curr].md, &pbuf->pkb->data, sizeof(ring->md.data)); + sal_memcpy(&ring[curr].md, pkh + 1, sizeof(ring->md.data)); } } @@ -1042,7 +1035,8 @@ cmicd_pdma_rx_resume(struct pdma_hw *hw, struct pdma_rx_queue *rxq) if (rxq->state & PDMA_RX_BATCH_REFILL) { rxq->halt_addr = rxq->ring_addr + sizeof(struct cmicd_rx_desc) * rxq->halt; hw->hdls.chan_goto(hw, rxq->chan_id, rxq->halt_addr); - } else if (!ring[(rxq->curr + 1) % rxq->nb_desc].md.status) { + } else if ((rxq->halt == rxq->curr) && + (ring[(rxq->curr + 1) % rxq->nb_desc].md.status == 0)) { rxq->halt = (rxq->curr + rxq->nb_desc - 1) % rxq->nb_desc; rxq->halt_addr = rxq->ring_addr + sizeof(struct cmicd_rx_desc) * rxq->halt; hw->hdls.chan_goto(hw, rxq->chan_id, rxq->halt_addr); diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicr/bcmcnet_cmicr2_pdma_rxtx.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/hmi/cmicr/bcmcnet_cmicr2_pdma_rxtx.c similarity index 98% rename from platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicr/bcmcnet_cmicr2_pdma_rxtx.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/hmi/cmicr/bcmcnet_cmicr2_pdma_rxtx.c index 3694a1aff3f..74c78973fd1 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicr/bcmcnet_cmicr2_pdma_rxtx.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/hmi/cmicr/bcmcnet_cmicr2_pdma_rxtx.c @@ -5,8 +5,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -222,8 +221,9 @@ cmicr2_pdma_pkt_xmit(struct pdma_hw *hw, struct pdma_tx_queue *txq, void *buf) } txq->state |= PDMA_TX_QUEUE_BUSY; } else { - rv = bm->tx_buf_get(dev, txq, pbuf, buf); - if (SHR_FAILURE(rv)) { + pbuf->adj = 1; + pkh = bm->tx_buf_get(dev, txq, pbuf, buf); + if (!pkh) { txq->stats.dropped++; if (dev->tx_suspend) { sal_spinlock_unlock(txq->mutex); @@ -233,7 +233,6 @@ cmicr2_pdma_pkt_xmit(struct pdma_hw *hw, struct pdma_tx_queue *txq, void *buf) return SHR_E_RESOURCE; } bm->tx_buf_dma(dev, txq, pbuf, &addr); - pkh = &pbuf->pkb->pkh; cmicr2_tx_desc_config(&ring[curr], addr, pbuf->len, pkh->hdr_prof, pkh->attrs); } diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicr/bcmcnet_cmicr_pdma_hw.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/hmi/cmicr/bcmcnet_cmicr_pdma_hw.c similarity index 95% rename from platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicr/bcmcnet_cmicr_pdma_hw.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/hmi/cmicr/bcmcnet_cmicr_pdma_hw.c index 075bce97882..fdcc03ebba3 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicr/bcmcnet_cmicr_pdma_hw.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/hmi/cmicr/bcmcnet_cmicr_pdma_hw.c @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -321,6 +320,7 @@ static int cmicr_pdma_chan_stop(struct pdma_hw *hw, int chan) { CMIC_CMC_PKTDMA_CTRLr_t pktdma_ctrl; + CMIC_CMC_PKTDMA_INTR_ENABLEr_t pktdma_intr_enable; CMIC_CMC_PKTDMA_INTR_CLRr_t pktdma_intr_clr; CMIC_CMC_PKTDMA_STATr_t pktdma_stat; int grp, que; @@ -329,21 +329,17 @@ cmicr_pdma_chan_stop(struct pdma_hw *hw, int chan) grp = chan / CMICR_PDMA_CMC_CHAN; que = chan % CMICR_PDMA_CMC_CHAN; - do { - hw->hdls.reg_rd32(hw, CMICR_PDMA_STAT(grp, que), - &CMIC_CMC_PKTDMA_STATr_GET(pktdma_stat)); - if (CMIC_CMC_PKTDMA_STATr_CHAIN_DONEf_GET(pktdma_stat)) { - hw->hdls.reg_rd32(hw, CMICR_PDMA_CTRL(grp, que), - &CMIC_CMC_PKTDMA_CTRLr_GET(pktdma_ctrl)); - CMIC_CMC_PKTDMA_CTRLr_DMA_ENf_SET(pktdma_ctrl, 0); - hw->hdls.reg_wr32(hw, CMICR_PDMA_CTRL(grp, que), - CMIC_CMC_PKTDMA_CTRLr_GET(pktdma_ctrl)); - return SHR_E_NONE; - } - if (!(hw->dev->flags & PDMA_CHAIN_MODE)) { - break; - } - } while (retry--); + hw->hdls.reg_rd32(hw, CMICR_PDMA_STAT(grp, que), + &CMIC_CMC_PKTDMA_STATr_GET(pktdma_stat)); + + if (CMIC_CMC_PKTDMA_STATr_CHAIN_DONEf_GET(pktdma_stat)) { + hw->hdls.reg_rd32(hw, CMICR_PDMA_CTRL(grp, que), + &CMIC_CMC_PKTDMA_CTRLr_GET(pktdma_ctrl)); + CMIC_CMC_PKTDMA_CTRLr_DMA_ENf_SET(pktdma_ctrl, 0); + hw->hdls.reg_wr32(hw, CMICR_PDMA_CTRL(grp, que), + CMIC_CMC_PKTDMA_CTRLr_GET(pktdma_ctrl)); + return SHR_E_NONE; + } /* if chain done is 0, abort */ hw->hdls.reg_rd32(hw, CMICR_PDMA_CTRL(grp, que), @@ -355,17 +351,10 @@ cmicr_pdma_chan_stop(struct pdma_hw *hw, int chan) MEMORY_BARRIER; - retry = CMICR_HW_RETRY_TIMES; do { hw->hdls.reg_rd32(hw, CMICR_PDMA_STAT(grp, que), &CMIC_CMC_PKTDMA_STATr_GET(pktdma_stat)); - if (CMIC_CMC_PKTDMA_STATr_CHAIN_DONEf_GET(pktdma_stat)) { - break; - } - if (!retry) { - CNET_ERROR(hw->unit, "Timeout to wait abort done\n"); - } - } while (retry--); + } while (!CMIC_CMC_PKTDMA_STATr_CHAIN_DONEf_GET(pktdma_stat) && (--retry > 0)); hw->hdls.reg_rd32(hw, CMICR_PDMA_CTRL(grp, que), &CMIC_CMC_PKTDMA_CTRLr_GET(pktdma_ctrl)); @@ -376,6 +365,12 @@ cmicr_pdma_chan_stop(struct pdma_hw *hw, int chan) MEMORY_BARRIER; + CMIC_CMC_PKTDMA_INTR_ENABLEr_CLR(pktdma_intr_enable); + hw->hdls.reg_wr32(hw, CMICR_PDMA_INTR_ENAB(grp, que), + CMIC_CMC_PKTDMA_INTR_ENABLEr_GET(pktdma_intr_enable)); + + MEMORY_BARRIER; + CMIC_CMC_PKTDMA_INTR_CLRr_CLR(pktdma_intr_clr); CMIC_CMC_PKTDMA_INTR_CLRr_DESC_DONE_INTR_CLRf_SET(pktdma_intr_clr, 1); CMIC_CMC_PKTDMA_INTR_CLRr_DESC_CONTROLLED_INTR_CLRf_SET(pktdma_intr_clr, 1); diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicr/bcmcnet_cmicr_pdma_rxtx.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/hmi/cmicr/bcmcnet_cmicr_pdma_rxtx.c similarity index 91% rename from platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicr/bcmcnet_cmicr_pdma_rxtx.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/hmi/cmicr/bcmcnet_cmicr_pdma_rxtx.c index 86d28694749..58513c888e0 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicr/bcmcnet_cmicr_pdma_rxtx.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/hmi/cmicr/bcmcnet_cmicr_pdma_rxtx.c @@ -38,8 +38,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -256,7 +255,6 @@ cmicr_pdma_rx_desc_init(struct pdma_hw *hw, struct pdma_rx_queue *rxq) struct pdma_dev *dev = hw->dev; struct pdma_buf_mngr *bm = (struct pdma_buf_mngr *)dev->ctrl.buf_mngr; volatile RX_DCB_t *ring = (volatile RX_DCB_t *)rxq->ring; - bool refill = false; dma_addr_t addr; uint32_t di, rm; int rv; @@ -266,11 +264,7 @@ cmicr_pdma_rx_desc_init(struct pdma_hw *hw, struct pdma_rx_queue *rxq) /* Allocate pktbuf for ring entry */ rv = bm->rx_buf_alloc(dev, rxq, &rxq->pbuf[di]); if (SHR_FAILURE(rv)) { - if (rxq->state & PDMA_RX_BATCH_REFILL) { - refill = true; - } else { - goto cleanup; - } + goto cleanup; } } /* Config receive descriptor ring */ @@ -287,9 +281,7 @@ cmicr_pdma_rx_desc_init(struct pdma_hw *hw, struct pdma_rx_queue *rxq) cmicr_rx_rldesc_config(&ring[di], rxq->ring_addr); rxq->curr = 0; - if (!refill) { - rxq->halt = rxq->nb_desc - 1; - } + rxq->halt = rxq->nb_desc - 1; rxq->halt_addr = rxq->ring_addr + sizeof(RX_DCB_t) * rxq->halt; hw->hdls.chan_goto(hw, rxq->chan_id, rxq->halt_addr); @@ -456,7 +448,7 @@ cmicr_pdma_rx_ring_refill(struct pdma_hw *hw, struct pdma_rx_queue *rxq) int unused = cmicr_pdma_rx_ring_unused(rxq); dma_addr_t addr; uint32_t halt; - int rv = SHR_E_NONE; + int rv; for (halt = rxq->halt; halt < rxq->halt + unused; halt++) { if (RX_DCB_ADDR_LOf_GET(ring[halt % rxq->nb_desc])) { @@ -469,8 +461,8 @@ cmicr_pdma_rx_ring_refill(struct pdma_hw *hw, struct pdma_rx_queue *rxq) if (SHR_FAILURE(rv)) { rxq->stats.nomems++; rxq->halt = halt % rxq->nb_desc; - CNET_INFO(hw->unit, "%d DCBs not filled, will retry late\n", - cmicr_pdma_rx_ring_unused(rxq)); + CNET_ERROR(hw->unit, "Can not alloc RX buffer, %d DCBs not filled\n", + cmicr_pdma_rx_ring_unused(rxq)); break; } } @@ -492,7 +484,7 @@ cmicr_pdma_rx_ring_refill(struct pdma_hw *hw, struct pdma_rx_queue *rxq) } sal_spinlock_unlock(rxq->lock); - return rv; + return SHR_E_NONE; } /*! @@ -514,25 +506,14 @@ cmicr_pdma_rx_ring_clean(struct pdma_hw *hw, struct pdma_rx_queue *rxq, int budg struct pdma_rx_buf *pbuf = NULL; struct pkt_hdr *pkh = NULL; dma_addr_t addr; - uint32_t curr = rxq->curr; + uint32_t curr; int len, done = 0; - int retry, fill = SHR_E_NONE; + int retry; int rv; - while (done < budget && !(dev->flags & PDMA_ABORT)) { - /* Replenish all the unused descriptors in batch mode */ - if (rxq->state & PDMA_RX_BATCH_REFILL && - cmicr_pdma_rx_ring_unused(rxq) >= (int)rxq->free_thresh) { - fill = cmicr_pdma_rx_ring_refill(hw, rxq); - /* If no one filled, return budget and keep polling */ - if (cmicr_pdma_rx_ring_unused(rxq) == (int)(rxq->nb_desc - 1)) { - rxq->state |= PDMA_RX_QUEUE_BUSY; - return budget; - } - } - - /* Check new packet */ - if (!RX_DCB_DONEf_GET(ring[curr])) { + curr = rxq->curr; + while (RX_DCB_DONEf_GET(ring[curr])) { + if (done == budget) { break; } @@ -549,64 +530,48 @@ cmicr_pdma_rx_ring_clean(struct pdma_hw *hw, struct pdma_rx_queue *rxq, int budg sal_spinlock_unlock(rxq->lock); } - /* Check the status */ - if (RX_DCB_ECC_ERRORf_GET(ring[curr]) || - RX_DCB_CELL_ERRORf_GET(ring[curr])) { - rxq->stats.errors++; - if (RX_DCB_ECC_ERRORf_GET(ring[curr])) { - rxq->stats.data_errors++; - } - if (RX_DCB_CELL_ERRORf_GET(ring[curr])) { - rxq->stats.cell_errors++; - } - - CNET_ERROR(hw->unit, "Packet data corrupted, ignore it ...\n"); - - /* Update the indicators (no lock required) */ - RX_DCB_STATUS_SET(ring[curr], 0); - curr = (curr + 1) % rxq->nb_desc; - rxq->curr = curr; - done++; - continue; - } - /* Get the current pktbuf to process */ pbuf = &rxq->pbuf[curr]; len = RX_DCB_BYTES_TRANSFERREDf_GET(ring[curr]); - rv = bm->rx_buf_get(dev, rxq, pbuf, len); - if (SHR_SUCCESS(rv)) { - /* Setup packet header */ - pkh = &pbuf->pkb->pkh; - pkh->data_len = len - hw->info.rx_ph_size; - pkh->meta_len = hw->info.rx_ph_size; - pkh->queue_id = rxq->queue_id; - - /* Send up the packet */ - rv = dev->pkt_recv(dev, rxq->queue_id, (void *)pbuf->skb); - if (SHR_FAILURE(rv)) { - if (dev->mode == DEV_MODE_HNET && pkh->attrs & PDMA_RX_TO_VNET) { - rv = cmicr_pdma_rx_vring_process(hw, rxq, pbuf); - if (SHR_FAILURE(rv) && rv == SHR_E_BUSY) { - rxq->state |= PDMA_RX_QUEUE_BUSY; - return done; - } - } else { - rxq->stats.dropped++; - } - bm->rx_buf_put(dev, rxq, pbuf, len); - } - } else if (rv != SHR_E_UNAVAIL) { - CNET_INFO(hw->unit, "RX buffer not enough, retry ...\n"); + pkh = bm->rx_buf_get(dev, rxq, pbuf, len); + if (!pkh) { + CNET_ERROR(hw->unit, "RX buffer build failed, retry ...\n"); rxq->stats.nomems++; /* Set busy state to retry */ rxq->state |= PDMA_RX_QUEUE_BUSY; return budget; } + /* Setup packet header */ + pkh->data_len = len - hw->info.rx_ph_size; + pkh->meta_len = hw->info.rx_ph_size; + pkh->queue_id = rxq->queue_id; + + /* Send up the packet */ + rv = dev->pkt_recv(dev, rxq->queue_id, (void *)pbuf->skb); + if (SHR_FAILURE(rv)) { + if (dev->mode == DEV_MODE_HNET && pkh->attrs & PDMA_RX_TO_VNET) { + rv = cmicr_pdma_rx_vring_process(hw, rxq, pbuf); + if (SHR_FAILURE(rv) && rv == SHR_E_BUSY) { + rxq->state |= PDMA_RX_QUEUE_BUSY; + return done; + } + } else { + rxq->stats.dropped++; + } + bm->rx_buf_put(dev, rxq, pbuf, len); + } + /* Count the packets/bytes */ rxq->stats.packets++; rxq->stats.bytes += len; + /* Count the errors if any */ + if (RX_DCB_CELL_ERRORf_GET(ring[curr]) || + RX_DCB_ECC_ERRORf_GET(ring[curr])) { + rxq->stats.errors++; + } + /* Setup the new descriptor */ if (!(rxq->state & PDMA_RX_BATCH_REFILL)) { if (!bm->rx_buf_avail(dev, rxq, pbuf)) { @@ -644,15 +609,27 @@ cmicr_pdma_rx_ring_clean(struct pdma_hw *hw, struct pdma_rx_queue *rxq, int budg /* Notify HNET to process if needed */ if (dev->mode == DEV_MODE_VNET) { - if (RX_DCB_STATUS_GET(ring[(curr + rxq->nb_desc - 1) % rxq->nb_desc]) == 0 && - RX_DCB_STATUS_GET(ring[(curr + rxq->nb_desc - 2) % rxq->nb_desc]) != 0) { + if (RX_DCB_STATUS_GET(ring[(curr + rxq->nb_desc - 1) % rxq->nb_desc])) { dev->xnet_wake(dev); } } /* Update the indicators */ - curr = (curr + 1) % rxq->nb_desc; - rxq->curr = curr; + if (!(rxq->state & PDMA_RX_BATCH_REFILL)) { + sal_spinlock_lock(rxq->lock); + if (!(rxq->status & PDMA_RX_QUEUE_XOFF) && (rxq->halt != curr)) { + /* Descriptor cherry pick */ + rxq->halt_addr = rxq->ring_addr + sizeof(RX_DCB_t) * curr; + hw->hdls.chan_goto(hw, rxq->chan_id, rxq->halt_addr); + rxq->halt = curr; + } + curr = (curr + 1) % rxq->nb_desc; + rxq->curr = curr; + sal_spinlock_unlock(rxq->lock); + } else { + curr = (curr + 1) % rxq->nb_desc; + rxq->curr = curr; + } done++; /* Restart DMA if in chain mode */ @@ -674,7 +651,18 @@ cmicr_pdma_rx_ring_clean(struct pdma_hw *hw, struct pdma_rx_queue *rxq, int budg } } - return SHR_FAILURE(fill) ? budget : done; + /* In batching mode, replenish all the unused descriptors */ + if (rxq->state & PDMA_RX_BATCH_REFILL && + cmicr_pdma_rx_ring_unused(rxq) >= (int)rxq->free_thresh) { + cmicr_pdma_rx_ring_refill(hw, rxq); + /* If no one filled, return budget and keep polling */ + if (cmicr_pdma_rx_ring_unused(rxq) == (int)(rxq->nb_desc - 1)) { + rxq->state |= PDMA_RX_QUEUE_BUSY; + return budget; + } + } + + return done; } /*! @@ -726,11 +714,15 @@ cmicr_pdma_tx_ring_clean(struct pdma_hw *hw, struct pdma_tx_queue *txq, int budg struct pdma_dev *dev = hw->dev; struct pdma_buf_mngr *bm = (struct pdma_buf_mngr *)dev->ctrl.buf_mngr; volatile TX_DCB_t *ring = (volatile TX_DCB_t *)txq->ring; - uint32_t curr, dirt = txq->dirt; + uint32_t dirt, curr; int done = 0; - while (done < budget) { - if (!txq->pbuf[dirt].dma || !TX_DCB_STATUS_GET(ring[dirt])) { + dirt = txq->dirt; + while (txq->pbuf[dirt].dma) { + if (!TX_DCB_STATUS_GET(ring[dirt])) { + break; + } + if (done == budget) { break; } @@ -762,10 +754,6 @@ cmicr_pdma_tx_ring_clean(struct pdma_hw *hw, struct pdma_tx_queue *txq, int budg } sal_spinlock_unlock(txq->lock); } - - if (dev->flags & PDMA_ABORT) { - break; - } } /* One more poll for chain done in chain mode */ @@ -988,8 +976,9 @@ cmicr_pdma_pkt_xmit(struct pdma_hw *hw, struct pdma_tx_queue *txq, void *buf) } txq->state |= PDMA_TX_QUEUE_BUSY; } else { - rv = bm->tx_buf_get(dev, txq, pbuf, buf); - if (SHR_FAILURE(rv)) { + pbuf->adj = 1; + pkh = bm->tx_buf_get(dev, txq, pbuf, buf); + if (!pkh) { txq->stats.dropped++; if (dev->tx_suspend) { sal_spinlock_unlock(txq->mutex); @@ -999,7 +988,6 @@ cmicr_pdma_pkt_xmit(struct pdma_hw *hw, struct pdma_tx_queue *txq, void *buf) return SHR_E_RESOURCE; } bm->tx_buf_dma(dev, txq, pbuf, &addr); - pkh = &pbuf->pkb->pkh; cmicr_tx_desc_config(&ring[curr], addr, pbuf->len, pkh->attrs); } @@ -1127,7 +1115,8 @@ cmicr_pdma_rx_resume(struct pdma_hw *hw, struct pdma_rx_queue *rxq) if (rxq->state & PDMA_RX_BATCH_REFILL) { rxq->halt_addr = rxq->ring_addr + sizeof(RX_DCB_t) * rxq->halt; hw->hdls.chan_goto(hw, rxq->chan_id, rxq->halt_addr); - } else if (!RX_DCB_STATUS_GET(ring[(rxq->curr + 1) % rxq->nb_desc])) { + } else if ((rxq->halt == rxq->curr) && + !RX_DCB_STATUS_GET(ring[(rxq->curr + 1) % rxq->nb_desc])) { rxq->halt = (rxq->curr + rxq->nb_desc - 1) % rxq->nb_desc; rxq->halt_addr = rxq->ring_addr + sizeof(RX_DCB_t) * rxq->halt; hw->hdls.chan_goto(hw, rxq->chan_id, rxq->halt_addr); diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicx/bcmcnet_cmicx_pdma_hw.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/hmi/cmicx/bcmcnet_cmicx_pdma_hw.c similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicx/bcmcnet_cmicx_pdma_hw.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/hmi/cmicx/bcmcnet_cmicx_pdma_hw.c index aa36b3d162a..988e6373bb3 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicx/bcmcnet_cmicx_pdma_hw.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/hmi/cmicx/bcmcnet_cmicx_pdma_hw.c @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicx/bcmcnet_cmicx_pdma_rxtx.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/hmi/cmicx/bcmcnet_cmicx_pdma_rxtx.c similarity index 91% rename from platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicx/bcmcnet_cmicx_pdma_rxtx.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/hmi/cmicx/bcmcnet_cmicx_pdma_rxtx.c index 7248d0524f0..5515399f308 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/hmi/cmicx/bcmcnet_cmicx_pdma_rxtx.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/hmi/cmicx/bcmcnet_cmicx_pdma_rxtx.c @@ -38,8 +38,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -214,7 +213,6 @@ cmicx_pdma_rx_desc_init(struct pdma_hw *hw, struct pdma_rx_queue *rxq) struct pdma_dev *dev = hw->dev; struct pdma_buf_mngr *bm = (struct pdma_buf_mngr *)dev->ctrl.buf_mngr; struct cmicx_rx_desc *ring = (struct cmicx_rx_desc *)rxq->ring; - bool refill = false; dma_addr_t addr; uint32_t di, rm; int rv; @@ -224,11 +222,7 @@ cmicx_pdma_rx_desc_init(struct pdma_hw *hw, struct pdma_rx_queue *rxq) /* Allocate pktbuf for ring entry */ rv = bm->rx_buf_alloc(dev, rxq, &rxq->pbuf[di]); if (SHR_FAILURE(rv)) { - if (rxq->state & PDMA_RX_BATCH_REFILL) { - refill = true; - } else { - goto cleanup; - } + goto cleanup; } } /* Config receive descriptor ring */ @@ -245,9 +239,7 @@ cmicx_pdma_rx_desc_init(struct pdma_hw *hw, struct pdma_rx_queue *rxq) cmicx_rx_rldesc_config(&ring[di], rxq->ring_addr); rxq->curr = 0; - if (!refill) { - rxq->halt = rxq->nb_desc - 1; - } + rxq->halt = rxq->nb_desc - 1; rxq->halt_addr = rxq->ring_addr + sizeof(struct cmicx_rx_desc) * rxq->halt; hw->hdls.chan_goto(hw, rxq->chan_id, rxq->halt_addr); @@ -414,7 +406,7 @@ cmicx_pdma_rx_ring_refill(struct pdma_hw *hw, struct pdma_rx_queue *rxq) int unused = cmicx_pdma_rx_ring_unused(rxq); dma_addr_t addr; uint32_t halt; - int rv = SHR_E_NONE; + int rv; for (halt = rxq->halt; halt < rxq->halt + unused; halt++) { if (ring[halt % rxq->nb_desc].addr_lo) { @@ -427,8 +419,8 @@ cmicx_pdma_rx_ring_refill(struct pdma_hw *hw, struct pdma_rx_queue *rxq) if (SHR_FAILURE(rv)) { rxq->stats.nomems++; rxq->halt = halt % rxq->nb_desc; - CNET_INFO(hw->unit, "%d DCBs not filled, will retry late\n", - cmicx_pdma_rx_ring_unused(rxq)); + CNET_ERROR(hw->unit, "Can not alloc RX buffer, %d DCBs not filled\n", + cmicx_pdma_rx_ring_unused(rxq)); break; } } @@ -450,7 +442,7 @@ cmicx_pdma_rx_ring_refill(struct pdma_hw *hw, struct pdma_rx_queue *rxq) } sal_spinlock_unlock(rxq->lock); - return rv; + return SHR_E_NONE; } /*! @@ -472,25 +464,14 @@ cmicx_pdma_rx_ring_clean(struct pdma_hw *hw, struct pdma_rx_queue *rxq, int budg struct pdma_rx_buf *pbuf = NULL; struct pkt_hdr *pkh = NULL; dma_addr_t addr; - uint32_t stat, curr = rxq->curr; + uint32_t stat, curr; int len, done = 0; - int retry, fill = SHR_E_NONE; + int retry; int rv; - while (done < budget && !(dev->flags & PDMA_ABORT)) { - /* Replenish all the unused descriptors in batch mode */ - if (rxq->state & PDMA_RX_BATCH_REFILL && - cmicx_pdma_rx_ring_unused(rxq) >= (int)rxq->free_thresh) { - fill = cmicx_pdma_rx_ring_refill(hw, rxq); - /* If no one filled, return budget and keep polling */ - if (cmicx_pdma_rx_ring_unused(rxq) == (int)(rxq->nb_desc - 1)) { - rxq->state |= PDMA_RX_QUEUE_BUSY; - return budget; - } - } - - /* Check new packet */ - if (!CMICX_DESC_STAT_DONE(ring[curr].status)) { + curr = rxq->curr; + while (CMICX_DESC_STAT_DONE(ring[curr].status)) { + if (done == budget) { break; } @@ -506,65 +487,55 @@ cmicx_pdma_rx_ring_clean(struct pdma_hw *hw, struct pdma_rx_queue *rxq, int budg sal_spinlock_unlock(rxq->lock); } - /* Check the status */ - stat = ring[curr].status; - if (stat & CMICX_DESC_STAT_ERR_MASK) { - rxq->stats.errors++; - if (stat & CMICX_DESC_STAT_DATA_ERR) { - rxq->stats.data_errors++; - } - if (stat & CMICX_DESC_STAT_CELL_ERR) { - rxq->stats.cell_errors++; - } - - CNET_ERROR(hw->unit, "Packet data corrupted, ignore it ...\n"); - - /* Update the indicators (no lock required) */ - ring[curr].status = 0; - curr = (curr + 1) % rxq->nb_desc; - rxq->curr = curr; - done++; - continue; - } - /* Get the current pktbuf to process */ pbuf = &rxq->pbuf[curr]; + stat = ring[curr].status; len = CMICX_DESC_STAT_LEN(stat); - rv = bm->rx_buf_get(dev, rxq, pbuf, len); - if (SHR_SUCCESS(rv)) { - /* Setup packet header */ - pkh = &pbuf->pkb->pkh; - pkh->data_len = len - hw->info.rx_ph_size; - pkh->meta_len = hw->info.rx_ph_size; - pkh->queue_id = rxq->queue_id; - pkh->attrs = CMICX_DESC_STAT_FLAGS(stat); - - /* Send up the packet */ - rv = dev->pkt_recv(dev, rxq->queue_id, (void *)pbuf->skb); - if (SHR_FAILURE(rv)) { - if (dev->mode == DEV_MODE_HNET && pkh->attrs & PDMA_RX_TO_VNET) { - rv = cmicx_pdma_rx_vring_process(hw, rxq, pbuf); - if (SHR_FAILURE(rv) && rv == SHR_E_BUSY) { - rxq->state |= PDMA_RX_QUEUE_BUSY; - return done; - } - } else { - rxq->stats.dropped++; - } - bm->rx_buf_put(dev, rxq, pbuf, len); - } - } else if (rv != SHR_E_UNAVAIL) { - CNET_INFO(hw->unit, "RX buffer not enough, retry ...\n"); + pkh = bm->rx_buf_get(dev, rxq, pbuf, len); + if (!pkh) { + CNET_ERROR(hw->unit, "RX buffer build failed, retry ...\n"); rxq->stats.nomems++; /* Set busy state to retry */ rxq->state |= PDMA_RX_QUEUE_BUSY; return budget; } + /* Setup packet header */ + pkh->data_len = len - hw->info.rx_ph_size; + pkh->meta_len = hw->info.rx_ph_size; + pkh->queue_id = rxq->queue_id; + pkh->attrs = CMICX_DESC_STAT_FLAGS(stat); + + /* Send up the packet */ + rv = dev->pkt_recv(dev, rxq->queue_id, (void *)pbuf->skb); + if (SHR_FAILURE(rv)) { + if (dev->mode == DEV_MODE_HNET && pkh->attrs & PDMA_RX_TO_VNET) { + rv = cmicx_pdma_rx_vring_process(hw, rxq, pbuf); + if (SHR_FAILURE(rv) && rv == SHR_E_BUSY) { + rxq->state |= PDMA_RX_QUEUE_BUSY; + return done; + } + } else { + rxq->stats.dropped++; + } + bm->rx_buf_put(dev, rxq, pbuf, len); + } + /* Count the packets/bytes */ rxq->stats.packets++; rxq->stats.bytes += len; + /* Count the errors if any */ + if (stat & CMICX_DESC_STAT_ERR_MASK) { + rxq->stats.errors++; + if (stat & CMICX_DESC_STAT_DATA_ERR) { + rxq->stats.data_errors++; + } + if (stat & CMICX_DESC_STAT_CELL_ERR) { + rxq->stats.cell_errors++; + } + } + /* Setup the new descriptor */ if (!(rxq->state & PDMA_RX_BATCH_REFILL)) { if (!bm->rx_buf_avail(dev, rxq, pbuf)) { @@ -602,15 +573,27 @@ cmicx_pdma_rx_ring_clean(struct pdma_hw *hw, struct pdma_rx_queue *rxq, int budg /* Notify HNET to process if needed */ if (dev->mode == DEV_MODE_VNET) { - if (ring[(curr + rxq->nb_desc - 1) % rxq->nb_desc].status == 0 && - ring[(curr + rxq->nb_desc - 2) % rxq->nb_desc].status != 0) { + if (ring[(curr + rxq->nb_desc - 1) % rxq->nb_desc].status) { dev->xnet_wake(dev); } } /* Update the indicators */ - curr = (curr + 1) % rxq->nb_desc; - rxq->curr = curr; + if (!(rxq->state & PDMA_RX_BATCH_REFILL)) { + sal_spinlock_lock(rxq->lock); + if (!(rxq->status & PDMA_RX_QUEUE_XOFF) && (rxq->halt != curr)) { + /* Descriptor cherry pick */ + rxq->halt_addr = rxq->ring_addr + sizeof(struct cmicx_rx_desc) * curr; + hw->hdls.chan_goto(hw, rxq->chan_id, rxq->halt_addr); + rxq->halt = curr; + } + curr = (curr + 1) % rxq->nb_desc; + rxq->curr = curr; + sal_spinlock_unlock(rxq->lock); + } else { + curr = (curr + 1) % rxq->nb_desc; + rxq->curr = curr; + } done++; /* Restart DMA if in chain mode */ @@ -631,7 +614,18 @@ cmicx_pdma_rx_ring_clean(struct pdma_hw *hw, struct pdma_rx_queue *rxq, int budg } } - return SHR_FAILURE(fill) ? budget : done; + /* In batching mode, replenish all the unused descriptors */ + if (rxq->state & PDMA_RX_BATCH_REFILL && + cmicx_pdma_rx_ring_unused(rxq) >= (int)rxq->free_thresh) { + cmicx_pdma_rx_ring_refill(hw, rxq); + /* If no one filled, return budget and keep polling */ + if (cmicx_pdma_rx_ring_unused(rxq) == (int)(rxq->nb_desc - 1)) { + rxq->state |= PDMA_RX_QUEUE_BUSY; + return budget; + } + } + + return done; } /*! @@ -683,11 +677,15 @@ cmicx_pdma_tx_ring_clean(struct pdma_hw *hw, struct pdma_tx_queue *txq, int budg struct pdma_dev *dev = hw->dev; struct pdma_buf_mngr *bm = (struct pdma_buf_mngr *)dev->ctrl.buf_mngr; struct cmicx_tx_desc *ring = (struct cmicx_tx_desc *)txq->ring; - uint32_t curr, dirt = txq->dirt; + uint32_t dirt, curr; int done = 0; - while (done < budget) { - if (!txq->pbuf[dirt].dma || !CMICX_DESC_STAT_DONE(ring[dirt].status)) { + dirt = txq->dirt; + while (txq->pbuf[dirt].dma) { + if (!CMICX_DESC_STAT_DONE(ring[dirt].status)) { + break; + } + if (done == budget) { break; } @@ -719,10 +717,6 @@ cmicx_pdma_tx_ring_clean(struct pdma_hw *hw, struct pdma_tx_queue *txq, int budg } sal_spinlock_unlock(txq->lock); } - - if (dev->flags & PDMA_ABORT) { - break; - } } /* One more poll for chain done in chain mode */ @@ -940,8 +934,9 @@ cmicx_pdma_pkt_xmit(struct pdma_hw *hw, struct pdma_tx_queue *txq, void *buf) } txq->state |= PDMA_TX_QUEUE_BUSY; } else { - rv = bm->tx_buf_get(dev, txq, pbuf, buf); - if (SHR_FAILURE(rv)) { + pbuf->adj = 1; + pkh = bm->tx_buf_get(dev, txq, pbuf, buf); + if (!pkh) { txq->stats.dropped++; if (dev->tx_suspend) { sal_spinlock_unlock(txq->mutex); @@ -951,7 +946,6 @@ cmicx_pdma_pkt_xmit(struct pdma_hw *hw, struct pdma_tx_queue *txq, void *buf) return SHR_E_RESOURCE; } bm->tx_buf_dma(dev, txq, pbuf, &addr); - pkh = &pbuf->pkb->pkh; flags |= pkh->attrs & PDMA_TX_HIGIG_PKT ? CMICX_DESC_TX_HIGIG_PKT : 0; flags |= pkh->attrs & PDMA_TX_PURGE_PKT ? CMICX_DESC_TX_PURGE_PKT : 0; cmicx_tx_desc_config(&ring[curr], addr, pbuf->len, flags); @@ -1081,7 +1075,8 @@ cmicx_pdma_rx_resume(struct pdma_hw *hw, struct pdma_rx_queue *rxq) if (rxq->state & PDMA_RX_BATCH_REFILL) { rxq->halt_addr = rxq->ring_addr + sizeof(struct cmicx_rx_desc) * rxq->halt; hw->hdls.chan_goto(hw, rxq->chan_id, rxq->halt_addr); - } else if (!ring[(rxq->curr + 1) % rxq->nb_desc].status) { + } else if ((rxq->halt == rxq->curr) && + (ring[(rxq->curr + 1) % rxq->nb_desc].status == 0)) { rxq->halt = (rxq->curr + rxq->nb_desc - 1) % rxq->nb_desc; rxq->halt_addr = rxq->ring_addr + sizeof(struct cmicx_rx_desc) * rxq->halt; hw->hdls.chan_goto(hw, rxq->chan_id, rxq->halt_addr); diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicd.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicd.h similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicd.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicd.h index d17967dad10..57310338525 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicd.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicd.h @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicr.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicr.h similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicr.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicr.h index fa67da82dea..73c52555c8e 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicr.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicr.h @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicr2.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicr2.h similarity index 95% rename from platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicr2.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicr2.h index ce75db2ea33..d052d1abfb8 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicr2.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicr2.h @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicr_acc.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicr_acc.h similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicr_acc.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicr_acc.h index 92ba3c7411e..ebcaf595c04 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicr_acc.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicr_acc.h @@ -6,8 +6,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicx.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicx.h similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicx.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicx.h index f3eff859c59..538c8b2b2f8 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicx.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/include/bcmcnet/bcmcnet_cmicx.h @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_core.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/include/bcmcnet/bcmcnet_core.h similarity index 98% rename from platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_core.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/include/bcmcnet/bcmcnet_core.h index af225146960..67808e167ee 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_core.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/include/bcmcnet/bcmcnet_core.h @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -71,12 +70,6 @@ struct pkt_hdr { #define PDMA_TX_NO_PAD (1 << 5) /*! Tx to HNET */ #define PDMA_TX_TO_HNET (1 << 6) - /*! Tx XDP frame */ -#define PDMA_TX_XDP_FRM (1 << 7) - /*! Tx XDP action */ -#define PDMA_TX_XDP_ACT (1 << 8) - /*! Tx XSK ZC frame */ -#define PDMA_TX_XSK_ZC (1 << 9) /*! Rx to VNET */ #define PDMA_RX_TO_VNET (1 << 10) /*! Rx strip vlan tag */ @@ -272,15 +265,6 @@ struct dev_ctrl { /*! Tx descriptor size */ uint32_t tx_desc_size; - - /*! Bitmap of Rx queues in busy state */ - uint64_t bm_rxq_busy; - - /*! Bitmap of Tx queues in busy state */ - uint64_t bm_txq_busy; - - /*! Device resource lock */ - sal_spinlock_t lock; }; /*! diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_dev.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/include/bcmcnet/bcmcnet_dev.h similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_dev.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/include/bcmcnet/bcmcnet_dev.h index 50147d9a4b7..67118f75709 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_dev.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/include/bcmcnet/bcmcnet_dev.h @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_internal.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/include/bcmcnet/bcmcnet_internal.h similarity index 81% rename from platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_internal.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/include/bcmcnet/bcmcnet_internal.h index 4b85fcbf565..e2e7f2c6cd4 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_internal.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/include/bcmcnet/bcmcnet_internal.h @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -38,10 +37,8 @@ /*! * \brief Allocate descriptor ring buffer. * - * This API is called to allocate DCB ring. - * * \param [in] dev Pointer to Packet DMA device. - * \param [out] dma DMA address of ring buffer. + * \param [in] dma DMA address of ring buffer. * * \retval Pointer to DMA buffer or NULL if an error occurred. */ @@ -50,8 +47,6 @@ typedef void *(*ring_buf_alloc_f)(struct pdma_dev *dev, uint32_t, dma_addr_t *dm /*! * \brief Free descriptor ring buffer. * - * This API is called to free DCB ring. - * * \param [in] dev Pointer to Packet DMA device. * \param [in] size Size of DMA buffer. * \param [in] mem Pointer to DMA buffer. @@ -63,9 +58,6 @@ typedef void (*ring_buf_free_f)(struct pdma_dev *dev, uint32_t size, void *mem, /*! * \brief Allocate Rx packet buffer. * - * This API is called to allocate DMA buffer for Rx packet and update information - * in \ref pdma_rx_buf. - * * \param [in] dev Pointer to Packet DMA device. * \param [in] rxq Pointer to Rx queue struture. * \param [in] pbuf Pointer to packet buffer structure. @@ -79,12 +71,10 @@ typedef int (*rx_buf_alloc_f)(struct pdma_dev *dev, struct pdma_rx_queue *rxq, /*! * \brief Get Rx packet buffer DMA address. * - * This API is called to get DMA address for filling Rx DCB. - * * \param [in] dev Pointer to Packet DMA device. * \param [in] rxq Pointer to Rx queue struture. * \param [in] pbuf Pointer to packet buffer structure. - * \param [out] dma DMA address of packet buffer. + * \param [in] dma DMA address of packet buffer. */ typedef void (*rx_buf_dma_f)(struct pdma_dev *dev, struct pdma_rx_queue *rxq, struct pdma_rx_buf *pbuf, dma_addr_t *dma); @@ -92,8 +82,6 @@ typedef void (*rx_buf_dma_f)(struct pdma_dev *dev, struct pdma_rx_queue *rxq, /*! * \brief Check Rx packet buffer validity. * - * This API is called to validate the buffer. - * * \param [in] dev Pointer to Packet DMA device. * \param [in] rxq Pointer to Rx queue struture. * \param [in] pbuf Pointer to packet buffer structure. @@ -107,26 +95,19 @@ typedef bool (*rx_buf_avail_f)(struct pdma_dev *dev, struct pdma_rx_queue *rxq, /*! * \brief Get Rx packet buffer. * - * This API is called after a packet is received to DMA buffer. - * The buffer information in \ref pdma_rx_buf can be updated for further - * processing in pktio driver. - * * \param [in] dev Pointer to Packet DMA device. * \param [in] rxq Pointer to Rx queue struture. * \param [in] pbuf Pointer to packet buffer structure. * \param [in] len Packet length. * - * \retval SHR_E_NONE No errors. - * \retval SHR_E_MEMORY Allocation failed. + * \retval Pointer to packet header structure or NULL if failed. */ -typedef int (*rx_buf_get_f)(struct pdma_dev *dev, struct pdma_rx_queue *rxq, - struct pdma_rx_buf *pbuf, int len); +typedef struct pkt_hdr *(*rx_buf_get_f)(struct pdma_dev *dev, struct pdma_rx_queue *rxq, + struct pdma_rx_buf *pbuf, int len); /*! * \brief Put Rx packet buffer. * - * This API is called to put back a buffer for hardware if it can be reused. - * * \param [in] dev Pointer to Packet DMA device. * \param [in] rxq Pointer to Rx queue struture. * \param [in] pbuf Pointer to packet buffer structure. @@ -141,9 +122,6 @@ typedef int (*rx_buf_put_f)(struct pdma_dev *dev, struct pdma_rx_queue *rxq, /*! * \brief Free Rx packet buffer. * - * This API is called to free a buffer based on the buffer type described in - * \ref pdma_rx_buf. - * * \param [in] dev Pointer to Packet DMA device. * \param [in] rxq Pointer to Rx queue struture. * \param [in] pbuf Pointer to packet buffer structure. @@ -154,9 +132,6 @@ typedef void (*rx_buf_free_f)(struct pdma_dev *dev, struct pdma_rx_queue *rxq, /*! * \brief Get Rx packet buffer mode. * - * This API is called to get the buffer mode based on pktio working mode and - * update the information in \ref pdma_rx_queue. - * * \param [in] dev Pointer to Packet DMA device. * \param [in] rxq Pointer to Rx queue struture. * @@ -167,30 +142,23 @@ typedef enum buf_mode (*rx_buf_mode_f)(struct pdma_dev *dev, struct pdma_rx_queu /*! * \brief Get Tx packet buffer. * - * This API is called before a packet is transmitted from DMA buffer. - * The buffer information in \ref pdma_tx_buf can be updated for further - * processing in pktio driver. - * * \param [in] dev Pointer to Packet DMA device. * \param [in] txq Pointer to Rx queue struture. * \param [in] pbuf Pointer to packet buffer structure. * \param [in] buf Packet buffer. * - * \retval SHR_E_NONE No errors. - * \retval SHR_E_MEMORY Allocation failed. + * \retval Pointer to packet header structure or NULL if failed. */ -typedef int (*tx_buf_get_f)(struct pdma_dev *dev, struct pdma_tx_queue *txq, - struct pdma_tx_buf *pbuf, void *buf); +typedef struct pkt_hdr *(*tx_buf_get_f)(struct pdma_dev *dev, struct pdma_tx_queue *txq, + struct pdma_tx_buf *pbuf, void *buf); /*! * \brief Get Tx packet buffer DMA address. * - * This API is called to get DMA address for filling Tx DCB. - * * \param [in] dev Pointer to Packet DMA device. * \param [in] txq Pointer to Rx queue struture. * \param [in] pbuf Pointer to packet buffer structure. - * \param [out] dma DMA address of packet buffer. + * \param [in] dma DMA address of packet buffer. */ typedef void (*tx_buf_dma_f)(struct pdma_dev *dev, struct pdma_tx_queue *txq, struct pdma_tx_buf *pbuf, dma_addr_t *dma); @@ -198,9 +166,6 @@ typedef void (*tx_buf_dma_f)(struct pdma_dev *dev, struct pdma_tx_queue *txq, /*! * \brief Free Tx packet buffer. * - * This API is called to free a buffer based on the buffer type described in - * \ref pdma_tx_buf. - * * \param [in] dev Pointer to Packet DMA device. * \param [in] txq Pointer to Rx queue struture. * \param [in] pbuf Pointer to packet buffer structure. diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_rxtx.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/include/bcmcnet/bcmcnet_rxtx.h similarity index 94% rename from platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_rxtx.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/include/bcmcnet/bcmcnet_rxtx.h index a149efc26a5..de42a7194fe 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_rxtx.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/include/bcmcnet/bcmcnet_rxtx.h @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -37,28 +36,21 @@ /*! * \brief Rx buffer mode definitions. - * - * Buffer modes used for pktio various work modes: - * PDMA_BUF_MODE_PRIV - Used for UNET DAM buffers mapped to user space. - * PDMA_BUF_MODE_SKB - Legacy SKB buffer for KNET mode in kernel space. - * PDMA_BUF_MODE_PAGE - Pages as DMA buffer for KNET mode in kernel space. - * PDMA_BUF_MODE_MAPPED - DMA buffers mapped to user space so zero-copy can - * be supported by kernel for KNET mode. */ enum buf_mode { /*! Private DMA buffer in user space */ PDMA_BUF_MODE_PRIV, - /*! Legacy SKB buffer in Linux kernel */ + /*! SKB in kernel */ PDMA_BUF_MODE_SKB, - /*! Raw Page buffer in Linux kernel */ + /*! Paged buffer in kernel */ PDMA_BUF_MODE_PAGE, /*! Kernel buffer mapped to user space */ PDMA_BUF_MODE_MAPPED, - /*! Maximum number of modes */ + /*! MAX mode */ PDMA_BUF_MODE_MAX }; @@ -140,9 +132,6 @@ struct pdma_rx_queue { /*! Page order in PDMA_BUF_MODE_PAGE mode */ uint32_t page_order; - - /*! Page size in PDMA_BUF_MODE_PAGE mode */ - uint32_t page_size; }; /*! diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_types.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/include/bcmcnet/bcmcnet_types.h similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_types.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/include/bcmcnet/bcmcnet_types.h index ff28fc9e766..51ffdeec6b9 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/include/bcmcnet/bcmcnet_types.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/include/bcmcnet/bcmcnet_types.h @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/main/bcmcnet_core.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/main/bcmcnet_core.c similarity index 94% rename from platform/broadcom/saibcm-modules/sdklt/bcmcnet/main/bcmcnet_core.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/main/bcmcnet_core.c index 9a711442406..46cce7eece9 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/main/bcmcnet_core.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/main/bcmcnet_core.c @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -198,7 +197,7 @@ bcmcnet_pdma_dev_resume(struct pdma_dev *dev) { struct dev_ctrl *ctrl = &dev->ctrl; uint32_t qi; - int rv, retry; + int rv; if (!dev->attached) { return SHR_E_UNAVAIL; @@ -207,52 +206,23 @@ bcmcnet_pdma_dev_resume(struct pdma_dev *dev) dev->suspended = false; if (dev->flags & PDMA_ABORT) { - /* Release all the Rx queues */ - for (qi = 0; qi < ctrl->nb_rxq; qi++) { - retry = 0; - while (at_test_set_bit(qi, &ctrl->bm_rxq_busy, ctrl->lock)) { - sal_usleep(100); - if (++retry > 1000) { - CNET_ERROR(dev->unit, "Resume timeout on Rx queue %d\n", qi); - return SHR_E_TIMEOUT; - } - } - dev->ops->rx_queue_release(dev, qi); - } - - /* Release all the Tx queues */ - for (qi = 0; qi < ctrl->nb_txq; qi++) { - retry = 0; - while (at_test_set_bit(qi, &ctrl->bm_txq_busy, ctrl->lock)) { - sal_usleep(100); - if (++retry > 1000) { - CNET_ERROR(dev->unit, "Resume timeout on Tx queue %d\n", qi); - return SHR_E_TIMEOUT; - } - } - dev->ops->tx_queue_release(dev, qi); - } - /* * H/W configuration of Packet DMA is gone in the FFB apply phase, * so we need to program it again. */ dev->ops->dev_config(dev, ctrl->bm_rxq, ctrl->bm_txq); - dev->flags &= ~PDMA_ABORT; - /* Restart all the Rx queues */ for (qi = 0; qi < ctrl->nb_rxq; qi++) { + dev->ops->rx_queue_release(dev, qi); dev->ops->rx_queue_setup(dev, qi); - at_clear_bit(qi, &ctrl->bm_rxq_busy, ctrl->lock); dev->ops->rx_queue_intr_enable(dev, qi); dev->ops->rx_queue_start(dev, qi); } - /* Restart all the Tx queues */ for (qi = 0; qi < ctrl->nb_txq; qi++) { + dev->ops->tx_queue_release(dev, qi); dev->ops->tx_queue_setup(dev, qi); - at_clear_bit(qi, &ctrl->bm_txq_busy, ctrl->lock); dev->ops->tx_queue_intr_enable(dev, qi); dev->ops->tx_queue_start(dev, qi); } @@ -263,6 +233,10 @@ bcmcnet_pdma_dev_resume(struct pdma_dev *dev) return rv; } + if (dev->flags & PDMA_ABORT) { + dev->flags &= ~PDMA_ABORT; + } + return rv; } diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/main/bcmcnet_dev.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/main/bcmcnet_dev.c similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmcnet/main/bcmcnet_dev.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/main/bcmcnet_dev.c index 4432016b3ce..994bfa06b93 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/main/bcmcnet_dev.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/main/bcmcnet_dev.c @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -191,6 +190,7 @@ bcn_rx_queue_group_parse(struct pdma_dev *dev, uint32_t qbm) int gi, qi, qn; ctrl->nb_rxq = 0; + sal_memset(ctrl->rx_queue, 0, sizeof(ctrl->rx_queue)); /* Figure out available groups and Rx queues */ for (gi = 0; gi < dev->num_groups; gi++) { @@ -277,6 +277,7 @@ bcn_tx_queue_group_parse(struct pdma_dev *dev, uint32_t qbm) int gi, qi, qn; ctrl->nb_txq = 0; + sal_memset(ctrl->tx_queue, 0, sizeof(ctrl->tx_queue)); /* Figure out available groups and Tx queues */ for (gi = 0; gi < dev->num_groups; gi++) { @@ -403,11 +404,6 @@ bcmcnet_pdma_close(struct pdma_dev *dev) bcn_rx_queues_free(dev); bcn_tx_queues_free(dev); - if (ctrl->lock) { - sal_spinlock_destroy(ctrl->lock); - ctrl->lock = NULL; - } - return SHR_E_NONE; } @@ -1030,11 +1026,6 @@ bcmcnet_pdma_open(struct pdma_dev *dev) } } - dev->ctrl.lock = sal_spinlock_create("bcmcnetDevCtrlLock"); - if (!dev->ctrl.lock) { - return SHR_E_MEMORY; - } - /* Initialize buffer manager */ bcmcnet_buf_mngr_init(dev); diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/main/bcmcnet_rxtx.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/main/bcmcnet_rxtx.c similarity index 97% rename from platform/broadcom/saibcm-modules/sdklt/bcmcnet/main/bcmcnet_rxtx.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/main/bcmcnet_rxtx.c index 0345429f386..af745618b11 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/main/bcmcnet_rxtx.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmcnet/main/bcmcnet_rxtx.c @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -170,17 +169,8 @@ bcn_rx_poll(struct pdma_rx_queue *rxq, int budget) { struct dev_ctrl *ctrl = rxq->ctrl; struct pdma_hw *hw = (struct pdma_hw *)ctrl->hw; - int rv; - - if (at_test_set_bit(rxq->queue_id, &ctrl->bm_rxq_busy, ctrl->lock)) { - return 0; - } - - rv = hw->dops.rx_ring_clean(hw, rxq, budget); - - at_clear_bit(rxq->queue_id, &ctrl->bm_rxq_busy, ctrl->lock); - return rv; + return hw->dops.rx_ring_clean(hw, rxq, budget); } /*! @@ -191,17 +181,8 @@ bcn_tx_poll(struct pdma_tx_queue *txq, int budget) { struct dev_ctrl *ctrl = txq->ctrl; struct pdma_hw *hw = (struct pdma_hw *)ctrl->hw; - int rv; - - if (at_test_set_bit(txq->queue_id, &ctrl->bm_txq_busy, ctrl->lock)) { - return 0; - } - - rv = hw->dops.tx_ring_clean(hw, txq, budget); - - at_clear_bit(txq->queue_id, &ctrl->bm_txq_busy, ctrl->lock); - return rv; + return hw->dops.tx_ring_clean(hw, txq, budget); } /*! diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd/bcmdrd_devlist.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmdrd/include/bcmdrd/bcmdrd_devlist.h similarity index 90% rename from platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd/bcmdrd_devlist.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmdrd/include/bcmdrd/bcmdrd_devlist.h index fb028d60acf..cd4c62694ca 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd/bcmdrd_devlist.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmdrd/include/bcmdrd/bcmdrd_devlist.h @@ -4,8 +4,7 @@ * Edits to this file will be lost when it is regenerated. * Tool: INTERNAL/drd/instpkgs.pl * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -262,37 +261,6 @@ #define BCM78907_DEVICE_ID 0xf907 #define BCM78907_REV_A0 0x01 -/* BCM78910 */ -#define BCM78910_VENDOR_ID 0x14e4 -#define BCM78910_DEVICE_ID 0xf910 -#define BCM78910_REV_A0 0x01 - -/* BCM78914 */ -#define BCM78914_VENDOR_ID 0x14e4 -#define BCM78914_DEVICE_ID 0xf914 -#define BCM78914_REV_B0 0x11 -#define BCM78914_REV_B1 0x12 - -/* BCM78920 */ -#define BCM78920_VENDOR_ID 0x14e4 -#define BCM78920_DEVICE_ID 0xf920 -#define BCM78920_REV_A0 0x01 - -/* BCM78923 */ -#define BCM78923_VENDOR_ID 0x14e4 -#define BCM78923_DEVICE_ID 0xf923 -#define BCM78923_REV_A0 0x01 - -/* BCM78924 */ -#define BCM78924_VENDOR_ID 0x14e4 -#define BCM78924_DEVICE_ID 0xf924 -#define BCM78924_REV_A0 0x01 - -/* BCM78928 */ -#define BCM78928_VENDOR_ID 0x14e4 -#define BCM78928_DEVICE_ID 0xf928 -#define BCM78928_REV_A0 0x01 - /* * End of Supported Devices and Revisions */ @@ -896,68 +864,6 @@ BCMDRD_DEVLIST_ENTRY(BCM78907, BCM78907_VENDOR_ID, BCM78907_DEVICE_ID, BCM78907_ "51.2 Tbps Multilayer Switch", 0, 0) #endif -#if BCMDRD_CONFIG_INCLUDE_BCM78910_A0 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE) -BCMDRD_DEVLIST_ENTRY(BCM78910, BCM78910_VENDOR_ID, BCM78910_DEVICE_ID, BCM78910_REV_A0, \ - 0, 0, \ - bcm78910_a0, bcm78910_a0, bcm78910_a0, \ - "Tomahawk6P", "BCM78910", \ - "102.4 Tbps Multilayer Switch", 0, 0) -#endif - -#if BCMDRD_CONFIG_INCLUDE_BCM78914_B0 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE) -BCMDRD_DEVLIST_ENTRY(BCM78914, BCM78914_VENDOR_ID, BCM78914_DEVICE_ID, BCM78914_REV_B0, \ - 0, 0, \ - bcm78914_b0, bcm78914_b0, bcm78914_b0, \ - "Tomahawk6C", "BCM78914", \ - "102.4 Tbps Multilayer Switch", 0, 0) -#endif - -#if BCMDRD_CONFIG_INCLUDE_BCM78914_B1 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE) -BCMDRD_DEVLIST_ENTRY(BCM78914, BCM78914_VENDOR_ID, BCM78914_DEVICE_ID, BCM78914_REV_B1, \ - 0, 0, \ - bcm78914_b1, bcm78914_b1, bcm78914_b1, \ - "Tomahawk6C", "BCM78914", \ - "102.4 Tbps Multilayer Switch", 0, 0) -#endif - -#if BCMDRD_CONFIG_INCLUDE_BCM78920_A0 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE) -BCMDRD_DEVLIST_ENTRY(BCM78920, BCM78920_VENDOR_ID, BCM78920_DEVICE_ID, BCM78920_REV_A0, \ - 0, 0, \ - bcm78920_a0, bcm78920_a0, bcm78920_a0, \ - "Tomahawk Ultra", "BCM78920", \ - "51.2 Tbps Multilayer Switch", 0, 0) -#endif - -#if BCMDRD_CONFIG_INCLUDE_BCM78923_A0 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE) -#ifdef BCMDRD_DEVLIST_INCLUDE_ALL -BCMDRD_DEVLIST_ENTRY(BCM78923, BCM78923_VENDOR_ID, BCM78923_DEVICE_ID, BCM78923_REV_A0, \ - 0, 0, \ - bcm78920_a0, bcm78923_a0, bcm78923_a0, \ - "Tomahawk Ultra", "BCM78920", \ - "25.6 Tbps Multilayer Switch", 0, 0) -#endif -#endif - -#if BCMDRD_CONFIG_INCLUDE_BCM78924_A0 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE) -#ifdef BCMDRD_DEVLIST_INCLUDE_ALL -BCMDRD_DEVLIST_ENTRY(BCM78924, BCM78924_VENDOR_ID, BCM78924_DEVICE_ID, BCM78924_REV_A0, \ - 0, 0, \ - bcm78920_a0, bcm78924_a0, bcm78924_a0, \ - "Tomahawk Ultra", "BCM78920", \ - "25.6 Tbps Multilayer Switch", 0, 0) -#endif -#endif - -#if BCMDRD_CONFIG_INCLUDE_BCM78928_A0 == 1 || defined(BCMDRD_DEVLIST_OVERRIDE) -#ifdef BCMDRD_DEVLIST_INCLUDE_ALL -BCMDRD_DEVLIST_ENTRY(BCM78928, BCM78928_VENDOR_ID, BCM78928_DEVICE_ID, BCM78928_REV_A0, \ - 0, 0, \ - bcm78920_a0, bcm78928_a0, bcm78928_a0, \ - "Tomahawk Ultra", "BCM78920", \ - "51.2 Tbps Multilayer Switch", 0, 0) -#endif -#endif - /* End BCMDRD_DEVLIST_ENTRY Macros */ #ifdef BCMDRD_DEVLIST_INCLUDE_ALL diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd/bcmdrd_symbol_types.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmdrd/include/bcmdrd/bcmdrd_symbol_types.h similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd/bcmdrd_symbol_types.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmdrd/include/bcmdrd/bcmdrd_symbol_types.h index a55d29cf505..1cca91ae081 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd/bcmdrd_symbol_types.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmdrd/include/bcmdrd/bcmdrd_symbol_types.h @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd/bcmdrd_symbols.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmdrd/include/bcmdrd/bcmdrd_symbols.h similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd/bcmdrd_symbols.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmdrd/include/bcmdrd/bcmdrd_symbols.h index f16568d101d..273d41fb9e6 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd/bcmdrd_symbols.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmdrd/include/bcmdrd/bcmdrd_symbols.h @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -439,7 +438,7 @@ typedef struct bcmdrd_symbol_s { /*! Extract block types from symbol device-specific information. */ #define BCMDRD_SYM_INFO_BLKTYPES(_w) ((_w) & BCMDRD_SYM_INFO_BLKTYPES_MASK) -/*! Bit position of the encoded access type. */ +/*! Bit number of the encoded access type. */ #define BCMDRD_SYM_INFO_ACCTYPE_SHIFT \ (BCMDRD_SYM_INFO_MAX_BLKTYPES * BCMDRD_SYM_INFO_BLKTYPE_BITS) @@ -453,10 +452,6 @@ typedef struct bcmdrd_symbol_s { #define BCMDRD_SYM_INFO_ACCTYPE(_w) \ (((_w) >> BCMDRD_SYM_INFO_ACCTYPE_SHIFT) & BCMDRD_SYM_INFO_ACCTYPE_MASK) -/*! Bit postion of the encoded sub-pipe instance. */ -#define BCMDRD_SYM_INFO_SUBPIPE_INST_SHIFT \ - (BCMDRD_SYM_INFO_ACCTYPE_SHIFT + BCMDRD_SYM_INFO_ACCTYPE_BITS) - /*! Bit number of the encoded sub-pipe instance. */ #define BCMDRD_SYM_INFO_SUBPIPE_INST_BITS 3 @@ -466,8 +461,7 @@ typedef struct bcmdrd_symbol_s { /*! Extract sub-pipe instance from symbol device-specific information. */ #define BCMDRD_SYM_INFO_SUBPIPE_INST(_w) \ - (((_w) >> BCMDRD_SYM_INFO_SUBPIPE_INST_SHIFT) & \ - BCMDRD_SYM_INFO_SUBPIPE_INST_MASK) + (((_w) >> 21) & BCMDRD_SYM_INFO_SUBPIPE_INST_MASK) /*! Extract block type by index from symbol device-specific information. */ #define BCMDRD_SYM_INFO_BLKTYPE(_w, _i) \ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd/bcmdrd_types.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmdrd/include/bcmdrd/bcmdrd_types.h similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd/bcmdrd_types.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmdrd/include/bcmdrd/bcmdrd_types.h index 41a4071a3db..ea14c91f8df 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd/bcmdrd_types.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmdrd/include/bcmdrd/bcmdrd_types.h @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd_config.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmdrd/include/bcmdrd_config.h similarity index 98% rename from platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd_config.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmdrd/include/bcmdrd_config.h index 2dc18025508..21380990a79 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd_config.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmdrd/include/bcmdrd_config.h @@ -26,8 +26,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -65,7 +64,7 @@ /*! Maximum number of ports per chip supported. */ #ifndef BCMDRD_CONFIG_MAX_PORTS -#define BCMDRD_CONFIG_MAX_PORTS 2048 +#define BCMDRD_CONFIG_MAX_PORTS 1088 #endif /*! Maximum number of pipes per chip supported. */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd_config_chips.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmdrd/include/bcmdrd_config_chips.h similarity index 88% rename from platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd_config_chips.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmdrd/include/bcmdrd_config_chips.h index e2be9e0f409..dae17cb1950 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmdrd/include/bcmdrd_config_chips.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmdrd/include/bcmdrd_config_chips.h @@ -4,8 +4,7 @@ * Edits to this file will be lost when it is regenerated. * Tool: INTERNAL/drd/instpkgs.pl * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -27,17 +26,17 @@ * * (1) #define BCMDRD_CONFIG_INCLUDE_ [1|0] * -- Include or exclude all revisions of the given device - * Example: #define BCMDRD_CONFIG_INCLUDE_BCM56080 1 + * Example: #define BCMDRD_CONFIG_INCLUDE_BCM56780 1 * * (2) #define BCMDRD_CONFIG_INCLUDE__X [1|0] * -- Include or exclude all versions of the given revision - * Example: #define BCMDRD_CONFIG_INCLUDE_BCM56080_Ax 0 - * #define BCMDRD_CONFIG_INCLUde_BCM56080_Bx 1 + * Example: #define BCMDRD_CONFIG_INCLUDE_BCM56780_Ax 0 + * #define BCMDRD_CONFIG_INCLUde_BCM56780_Bx 1 * * (3) #define BCMDRD_CONFIG_INCLUDE_ [1|0] * -- Include or exclude an exact device - * Example: #define BCMDRD_CONFIG_INCLUDE_BCM56080_A0 1 - * #define BCMDRD_CONFIG_INCLUDE_BCM56080_A1 0 + * Example: #define BCMDRD_CONFIG_INCLUDE_BCM56780_A0 1 + * #define BCMDRD_CONFIG_INCLUDE_BCM56780_A1 0 * * * The value of BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT is used for any @@ -1539,185 +1538,6 @@ #endif -/* - * BCM78910 - */ - -/* Sets the default include state if it was not given */ -#ifndef BCMDRD_CONFIG_INCLUDE_BCM78910 -# define BCMDRD_CONFIG_INCLUDE_BCM78910 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT -#endif -/* Resolve revision dependencies */ -#ifndef BCMDRD_CONFIG_INCLUDE_BCM78910_Ax -# define BCMDRD_CONFIG_INCLUDE_BCM78910_Ax BCMDRD_CONFIG_INCLUDE_BCM78910 -#endif -#ifndef BCMDRD_CONFIG_INCLUDE_BCM78910_A0 -# define BCMDRD_CONFIG_INCLUDE_BCM78910_A0 BCMDRD_CONFIG_INCLUDE_BCM78910_Ax -#endif -/* Chip architecture */ -#if defined(BCMDRD_CONFIG_INCLUDE_BCM78910_A0) && BCMDRD_CONFIG_INCLUDE_BCM78910_A0 == 1 -# ifndef BCMDRD_CONFIG_INCLUDE_ARCH_XGSR -# define BCMDRD_CONFIG_INCLUDE_ARCH_XGSR -# endif -#endif - - -/* - * BCM78914 - */ - -/* Sets the default include state if it was not given */ -#ifndef BCMDRD_CONFIG_INCLUDE_BCM78914 -# define BCMDRD_CONFIG_INCLUDE_BCM78914 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT -#endif -/* Resolve revision dependencies */ -#ifndef BCMDRD_CONFIG_INCLUDE_BCM78914_Bx -# define BCMDRD_CONFIG_INCLUDE_BCM78914_Bx BCMDRD_CONFIG_INCLUDE_BCM78914 -#endif -#ifndef BCMDRD_CONFIG_INCLUDE_BCM78914_B0 -# define BCMDRD_CONFIG_INCLUDE_BCM78914_B0 BCMDRD_CONFIG_INCLUDE_BCM78914_Bx -#endif -#ifndef BCMDRD_CONFIG_INCLUDE_BCM78914_B1 -# define BCMDRD_CONFIG_INCLUDE_BCM78914_B1 BCMDRD_CONFIG_INCLUDE_BCM78914_Bx -#endif -/* Chip architecture */ -#if defined(BCMDRD_CONFIG_INCLUDE_BCM78914_B0) && BCMDRD_CONFIG_INCLUDE_BCM78914_B0 == 1 -# ifndef BCMDRD_CONFIG_INCLUDE_ARCH_XGSR -# define BCMDRD_CONFIG_INCLUDE_ARCH_XGSR -# endif -#endif -#if defined(BCMDRD_CONFIG_INCLUDE_BCM78914_B1) && BCMDRD_CONFIG_INCLUDE_BCM78914_B1 == 1 -# ifndef BCMDRD_CONFIG_INCLUDE_ARCH_XGSR -# define BCMDRD_CONFIG_INCLUDE_ARCH_XGSR -# endif -#endif - - -/* - * BCM78920 - */ - -/* Sets the default include state if it was not given */ -#ifndef BCMDRD_CONFIG_INCLUDE_BCM78920 -# define BCMDRD_CONFIG_INCLUDE_BCM78920 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT -#endif -/* Resolve revision dependencies */ -#ifndef BCMDRD_CONFIG_INCLUDE_BCM78920_Ax -# define BCMDRD_CONFIG_INCLUDE_BCM78920_Ax BCMDRD_CONFIG_INCLUDE_BCM78920 -#endif -#ifndef BCMDRD_CONFIG_INCLUDE_BCM78920_A0 -# define BCMDRD_CONFIG_INCLUDE_BCM78920_A0 BCMDRD_CONFIG_INCLUDE_BCM78920_Ax -#endif -/* Chip architecture */ -#if defined(BCMDRD_CONFIG_INCLUDE_BCM78920_A0) && BCMDRD_CONFIG_INCLUDE_BCM78920_A0 == 1 -# ifndef BCMDRD_CONFIG_INCLUDE_ARCH_XGSR -# define BCMDRD_CONFIG_INCLUDE_ARCH_XGSR -# endif -#endif - - -/* - * BCM78923 - */ - -/* Sets the default include state if it was not given */ -#ifndef BCMDRD_CONFIG_INCLUDE_BCM78923 -# define BCMDRD_CONFIG_INCLUDE_BCM78923 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT -#endif -/* Resolve revision dependencies */ -#ifndef BCMDRD_CONFIG_INCLUDE_BCM78923_Ax -# define BCMDRD_CONFIG_INCLUDE_BCM78923_Ax BCMDRD_CONFIG_INCLUDE_BCM78923 -#endif -#ifndef BCMDRD_CONFIG_INCLUDE_BCM78923_A0 -# define BCMDRD_CONFIG_INCLUDE_BCM78923_A0 BCMDRD_CONFIG_INCLUDE_BCM78923_Ax -#endif -/* Resolve all interchip dependencies */ -#if BCMDRD_CONFIG_INCLUDE_BCM78923_A0 == 1 -# ifndef BCMDRD_CONFIG_INCLUDE_BCM78920_A0 -# define BCMDRD_CONFIG_INCLUDE_BCM78920_A0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT -# endif -# if BCMDRD_CONFIG_INCLUDE_BCM78920_A0 != 1 -# undef BCMDRD_CONFIG_INCLUDE_BCM78920_A0 -# define BCMDRD_CONFIG_INCLUDE_BCM78920_A0 1 -# define BCMDRD_CONFIG_INCLUDE_BCM78920_A0_IMPLIED 1 -# endif -#endif -/* Chip architecture */ -#if defined(BCMDRD_CONFIG_INCLUDE_BCM78920_A0) && BCMDRD_CONFIG_INCLUDE_BCM78920_A0 == 1 -# ifndef BCMDRD_CONFIG_INCLUDE_ARCH_XGSR -# define BCMDRD_CONFIG_INCLUDE_ARCH_XGSR -# endif -#endif - - -/* - * BCM78924 - */ - -/* Sets the default include state if it was not given */ -#ifndef BCMDRD_CONFIG_INCLUDE_BCM78924 -# define BCMDRD_CONFIG_INCLUDE_BCM78924 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT -#endif -/* Resolve revision dependencies */ -#ifndef BCMDRD_CONFIG_INCLUDE_BCM78924_Ax -# define BCMDRD_CONFIG_INCLUDE_BCM78924_Ax BCMDRD_CONFIG_INCLUDE_BCM78924 -#endif -#ifndef BCMDRD_CONFIG_INCLUDE_BCM78924_A0 -# define BCMDRD_CONFIG_INCLUDE_BCM78924_A0 BCMDRD_CONFIG_INCLUDE_BCM78924_Ax -#endif -/* Resolve all interchip dependencies */ -#if BCMDRD_CONFIG_INCLUDE_BCM78924_A0 == 1 -# ifndef BCMDRD_CONFIG_INCLUDE_BCM78920_A0 -# define BCMDRD_CONFIG_INCLUDE_BCM78920_A0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT -# endif -# if BCMDRD_CONFIG_INCLUDE_BCM78920_A0 != 1 -# undef BCMDRD_CONFIG_INCLUDE_BCM78920_A0 -# define BCMDRD_CONFIG_INCLUDE_BCM78920_A0 1 -# define BCMDRD_CONFIG_INCLUDE_BCM78920_A0_IMPLIED 1 -# endif -#endif -/* Chip architecture */ -#if defined(BCMDRD_CONFIG_INCLUDE_BCM78920_A0) && BCMDRD_CONFIG_INCLUDE_BCM78920_A0 == 1 -# ifndef BCMDRD_CONFIG_INCLUDE_ARCH_XGSR -# define BCMDRD_CONFIG_INCLUDE_ARCH_XGSR -# endif -#endif - - -/* - * BCM78928 - */ - -/* Sets the default include state if it was not given */ -#ifndef BCMDRD_CONFIG_INCLUDE_BCM78928 -# define BCMDRD_CONFIG_INCLUDE_BCM78928 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT -#endif -/* Resolve revision dependencies */ -#ifndef BCMDRD_CONFIG_INCLUDE_BCM78928_Ax -# define BCMDRD_CONFIG_INCLUDE_BCM78928_Ax BCMDRD_CONFIG_INCLUDE_BCM78928 -#endif -#ifndef BCMDRD_CONFIG_INCLUDE_BCM78928_A0 -# define BCMDRD_CONFIG_INCLUDE_BCM78928_A0 BCMDRD_CONFIG_INCLUDE_BCM78928_Ax -#endif -/* Resolve all interchip dependencies */ -#if BCMDRD_CONFIG_INCLUDE_BCM78928_A0 == 1 -# ifndef BCMDRD_CONFIG_INCLUDE_BCM78920_A0 -# define BCMDRD_CONFIG_INCLUDE_BCM78920_A0 BCMDRD_CONFIG_INCLUDE_CHIP_DEFAULT -# endif -# if BCMDRD_CONFIG_INCLUDE_BCM78920_A0 != 1 -# undef BCMDRD_CONFIG_INCLUDE_BCM78920_A0 -# define BCMDRD_CONFIG_INCLUDE_BCM78920_A0 1 -# define BCMDRD_CONFIG_INCLUDE_BCM78920_A0_IMPLIED 1 -# endif -#endif -/* Chip architecture */ -#if defined(BCMDRD_CONFIG_INCLUDE_BCM78920_A0) && BCMDRD_CONFIG_INCLUDE_BCM78920_A0 == 1 -# ifndef BCMDRD_CONFIG_INCLUDE_ARCH_XGSR -# define BCMDRD_CONFIG_INCLUDE_ARCH_XGSR -# endif -#endif - - #endif /* BCMDRD_CONFIG_CHIPS_H */ /* @@ -1920,36 +1740,5 @@ CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78907_A0) #ifdef BCMDRD_CONFIG_INCLUDE_BCM78907_A0_IMPLIED CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78907_A0_IMPLIED) #endif -CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78910) -CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78910_Ax) -CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78910_A0) -#ifdef BCMDRD_CONFIG_INCLUDE_BCM78910_A0_IMPLIED -CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78910_A0_IMPLIED) -#endif -CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78914) -CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78914_Bx) -CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78914_B0) -CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78914_B1) -#ifdef BCMDRD_CONFIG_INCLUDE_BCM78914_B0_IMPLIED -CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78914_B0_IMPLIED) -#endif -#ifdef BCMDRD_CONFIG_INCLUDE_BCM78914_B1_IMPLIED -CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78914_B1_IMPLIED) -#endif -CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78920) -CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78920_Ax) -CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78920_A0) -#ifdef BCMDRD_CONFIG_INCLUDE_BCM78920_A0_IMPLIED -CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78920_A0_IMPLIED) -#endif -CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78923) -CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78923_Ax) -CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78923_A0) -CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78924) -CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78924_Ax) -CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78924_A0) -CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78928) -CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78928_Ax) -CONFIG_OPTION(BCMDRD_CONFIG_INCLUDE_BCM78928_A0) #undef CONFIG_OPTION #endif /* #ifdef CONFIG_OPTION */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/bcmlrd_conf.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/bcmlrd_conf.h similarity index 98% rename from platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/bcmlrd_conf.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/bcmlrd_conf.h index f7d36bad847..cbc9bd82154 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/bcmlrd_conf.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/bcmlrd_conf.h @@ -8,8 +8,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/bcmlrd_id_types.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/bcmlrd_id_types.h similarity index 95% rename from platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/bcmlrd_id_types.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/bcmlrd_id_types.h index 044f93e621b..c10b86eb7b1 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/bcmlrd_id_types.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/bcmlrd_id_types.h @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/bcmlrd_match_id_db.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/bcmlrd_match_id_db.h similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/bcmlrd_match_id_db.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/bcmlrd_match_id_db.h index 0165d9d71be..f30dacf5d1f 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/bcmlrd_match_id_db.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/bcmlrd_match_id_db.h @@ -7,8 +7,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/bcmlrd_variant.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/bcmlrd_variant.h similarity index 95% rename from platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/bcmlrd_variant.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/bcmlrd_variant.h index be765c2cc7c..d930d7b8496 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/bcmlrd_variant.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/bcmlrd_variant.h @@ -13,8 +13,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/chip/bcmlrd_chip_variant.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/chip/bcmlrd_chip_variant.h similarity index 95% rename from platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/chip/bcmlrd_chip_variant.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/chip/bcmlrd_chip_variant.h index a3bd8023adb..db283eabc29 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/chip/bcmlrd_chip_variant.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/chip/bcmlrd_chip_variant.h @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/chip/generated/bcmlrd_variant_defs.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/chip/generated/bcmlrd_variant_defs.h similarity index 95% rename from platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/chip/generated/bcmlrd_variant_defs.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/chip/generated/bcmlrd_variant_defs.h index 2303659f064..4cde687a4c3 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/chip/generated/bcmlrd_variant_defs.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/chip/generated/bcmlrd_variant_defs.h @@ -7,8 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/chip/generated/bcmlrd_variant_defs_internal.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/chip/generated/bcmlrd_variant_defs_internal.h new file mode 100644 index 00000000000..703ac6470d2 --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/chip/generated/bcmlrd_variant_defs_internal.h @@ -0,0 +1,58 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table definition files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ +#ifndef BCMLRD_VARIANT_DEFS_INTERNAL_H +#define BCMLRD_VARIANT_DEFS_INTERNAL_H +#ifndef DOXYGEN_IGNORE_AUTOGEN +/*+replace reverse */ +#include "../../defs/generated/bcm78907_a0/bcm78907_a0_lrd_variant_def.h" +#include "../../defs/generated/bcm78905_a0/bcm78905_a0_lrd_variant_def.h" +#include "../../defs/generated/bcm78900_b0/bcm78900_b0_lrd_variant_def.h" +#include "../../defs/generated/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_lrd_variant_def.h" +#include "../../defs/generated/bcm78800_a0/cna_6_5_32_3_0/bcm78800_a0_cna_6_5_32_3_0_lrd_variant_def.h" +#include "../../defs/generated/bcm78800_a0/bcm78800_a0_lrd_variant_def.h" +#include "../../defs/generated/bcm56999_a0/bcm56999_a0_lrd_variant_def.h" +#include "../../defs/generated/bcm56998_a0/bcm56998_a0_lrd_variant_def.h" +#include "../../defs/generated/bcm56996_b0/bcm56996_b0_lrd_variant_def.h" +#include "../../defs/generated/bcm56996_a0/bcm56996_a0_lrd_variant_def.h" +#include "../../defs/generated/bcm56990_b0/bcm56990_b0_lrd_variant_def.h" +#include "../../defs/generated/bcm56990_a0/bcm56990_a0_lrd_variant_def.h" +#include "../../defs/generated/bcm56890_a0/dna_6_5_32_4_0/bcm56890_a0_dna_6_5_32_4_0_lrd_variant_def.h" +#include "../../defs/generated/bcm56890_a0/cna_6_5_32_3_0/bcm56890_a0_cna_6_5_32_3_0_lrd_variant_def.h" +#include "../../defs/generated/bcm56890_a0/bcm56890_a0_lrd_variant_def.h" +#include "../../defs/generated/bcm56880_a0/nfa_6_5_32_1_0/bcm56880_a0_nfa_6_5_32_1_0_lrd_variant_def.h" +#include "../../defs/generated/bcm56880_a0/hna_6_5_32_2_0/bcm56880_a0_hna_6_5_32_2_0_lrd_variant_def.h" +#include "../../defs/generated/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_lrd_variant_def.h" +#include "../../defs/generated/bcm56880_a0/bcm56880_a0_lrd_variant_def.h" +#include "../../defs/generated/bcm56780_a0/hna_6_5_32_2_0/bcm56780_a0_hna_6_5_32_2_0_lrd_variant_def.h" +#include "../../defs/generated/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_lrd_variant_def.h" +#include "../../defs/generated/bcm56780_a0/cna_6_5_32_3_0/bcm56780_a0_cna_6_5_32_3_0_lrd_variant_def.h" +#include "../../defs/generated/bcm56780_a0/bcm56780_a0_lrd_variant_def.h" +#include "../../defs/generated/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_lrd_variant_def.h" +#include "../../defs/generated/bcm56690_a0/bcm56690_a0_lrd_variant_def.h" +#include "../../defs/generated/bcm56080_a0/bcm56080_a0_lrd_variant_def.h" +/*-replace*/ +#endif /* DOXYGEN_IGNORE_AUTOGEN */ +#endif /* BCMLRD_VARIANT_DEFS_INTERNAL_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/chip/generated/bcmlrd_variant_limits.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/chip/generated/bcmlrd_variant_limits.h similarity index 95% rename from platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/chip/generated/bcmlrd_variant_limits.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/chip/generated/bcmlrd_variant_limits.h index 7d371340201..10e6e258510 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/chip/generated/bcmlrd_variant_limits.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/chip/generated/bcmlrd_variant_limits.h @@ -7,8 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56080_a0/bcm56080_a0_lrd_variant_def.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56080_a0/bcm56080_a0_lrd_variant_def.h similarity index 95% rename from platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56080_a0/bcm56080_a0_lrd_variant_def.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56080_a0/bcm56080_a0_lrd_variant_def.h index f6ef54e75ff..3ff1d412435 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56080_a0/bcm56080_a0_lrd_variant_def.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56080_a0/bcm56080_a0_lrd_variant_def.h @@ -7,8 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56690_a0/bcm56690_a0_lrd_variant_def.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56690_a0/bcm56690_a0_lrd_variant_def.h similarity index 95% rename from platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56690_a0/bcm56690_a0_lrd_variant_def.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56690_a0/bcm56690_a0_lrd_variant_def.h index 7f551d8a701..ec14ef1471c 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56690_a0/bcm56690_a0_lrd_variant_def.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56690_a0/bcm56690_a0_lrd_variant_def.h @@ -7,8 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_lrd_variant_def.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_lrd_variant_def.h similarity index 95% rename from platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_lrd_variant_def.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_lrd_variant_def.h index 1180e5fffe0..0a64d43e1e4 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_lrd_variant_def.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_lrd_variant_def.h @@ -7,8 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/bcm56780_a0_lrd_variant_def.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/bcm56780_a0_lrd_variant_def.h similarity index 95% rename from platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/bcm56780_a0_lrd_variant_def.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/bcm56780_a0_lrd_variant_def.h index b14926b6f98..e4d567d3364 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/bcm56780_a0_lrd_variant_def.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/bcm56780_a0_lrd_variant_def.h @@ -7,8 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/cna_6_5_32_3_0/bcm56780_a0_cna_6_5_32_3_0_lrd_variant_def.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/cna_6_5_32_3_0/bcm56780_a0_cna_6_5_32_3_0_lrd_variant_def.h new file mode 100644 index 00000000000..89e67a78f8f --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/cna_6_5_32_3_0/bcm56780_a0_cna_6_5_32_3_0_lrd_variant_def.h @@ -0,0 +1,36 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56780_A0_CNA_6_5_32_3_0_LRD_VARIANT_DEF_H +#define GEN_BCM56780_A0_CNA_6_5_32_3_0_LRD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLRD_VARIANT_BCM56780_A0_CNA_6_5_32_3_0 BCMLTD_VARIANT_BCM56780_A0_CNA_6_5_32_3_0 +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56780_A0_CNA_6_5_32_3_0_LRD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_lrd_variant_def.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_lrd_variant_def.h similarity index 95% rename from platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_lrd_variant_def.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_lrd_variant_def.h index d78cf8ce7b0..bdb8f646cfd 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_lrd_variant_def.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_lrd_variant_def.h @@ -7,8 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/hna_6_5_32_2_0/bcm56780_a0_hna_6_5_32_2_0_lrd_variant_def.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/hna_6_5_32_2_0/bcm56780_a0_hna_6_5_32_2_0_lrd_variant_def.h new file mode 100644 index 00000000000..f486aa11cd7 --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/hna_6_5_32_2_0/bcm56780_a0_hna_6_5_32_2_0_lrd_variant_def.h @@ -0,0 +1,36 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56780_A0_HNA_6_5_32_2_0_LRD_VARIANT_DEF_H +#define GEN_BCM56780_A0_HNA_6_5_32_2_0_LRD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLRD_VARIANT_BCM56780_A0_HNA_6_5_32_2_0 BCMLTD_VARIANT_BCM56780_A0_HNA_6_5_32_2_0 +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56780_A0_HNA_6_5_32_2_0_LRD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/bcm56880_a0_lrd_variant_def.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/bcm56880_a0_lrd_variant_def.h similarity index 95% rename from platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/bcm56880_a0_lrd_variant_def.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/bcm56880_a0_lrd_variant_def.h index 512150a0ec0..ee0ec5203cb 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/bcm56880_a0_lrd_variant_def.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/bcm56880_a0_lrd_variant_def.h @@ -7,8 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_lrd_variant_def.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_lrd_variant_def.h similarity index 95% rename from platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_lrd_variant_def.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_lrd_variant_def.h index f95446f1ac5..97c79ac4736 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_lrd_variant_def.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_lrd_variant_def.h @@ -7,8 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/hna_6_5_32_2_0/bcm56880_a0_hna_6_5_32_2_0_lrd_variant_def.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/hna_6_5_32_2_0/bcm56880_a0_hna_6_5_32_2_0_lrd_variant_def.h new file mode 100644 index 00000000000..1a9f0d3ebca --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/hna_6_5_32_2_0/bcm56880_a0_hna_6_5_32_2_0_lrd_variant_def.h @@ -0,0 +1,36 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56880_A0_HNA_6_5_32_2_0_LRD_VARIANT_DEF_H +#define GEN_BCM56880_A0_HNA_6_5_32_2_0_LRD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLRD_VARIANT_BCM56880_A0_HNA_6_5_32_2_0 BCMLTD_VARIANT_BCM56880_A0_HNA_6_5_32_2_0 +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56880_A0_HNA_6_5_32_2_0_LRD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/nfa_6_5_32_1_0/bcm56880_a0_nfa_6_5_32_1_0_lrd_variant_def.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/nfa_6_5_32_1_0/bcm56880_a0_nfa_6_5_32_1_0_lrd_variant_def.h new file mode 100644 index 00000000000..ba6647a3350 --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/nfa_6_5_32_1_0/bcm56880_a0_nfa_6_5_32_1_0_lrd_variant_def.h @@ -0,0 +1,36 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56880_A0_NFA_6_5_32_1_0_LRD_VARIANT_DEF_H +#define GEN_BCM56880_A0_NFA_6_5_32_1_0_LRD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLRD_VARIANT_BCM56880_A0_NFA_6_5_32_1_0 BCMLTD_VARIANT_BCM56880_A0_NFA_6_5_32_1_0 +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56880_A0_NFA_6_5_32_1_0_LRD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/bcm56890_a0_lrd_variant_def.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/bcm56890_a0_lrd_variant_def.h similarity index 95% rename from platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/bcm56890_a0_lrd_variant_def.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/bcm56890_a0_lrd_variant_def.h index a85d070009e..f295d63c419 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/bcm56890_a0_lrd_variant_def.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/bcm56890_a0_lrd_variant_def.h @@ -7,8 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/cna_6_5_32_3_0/bcm56890_a0_cna_6_5_32_3_0_lrd_variant_def.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/cna_6_5_32_3_0/bcm56890_a0_cna_6_5_32_3_0_lrd_variant_def.h new file mode 100644 index 00000000000..7b99b51f993 --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/cna_6_5_32_3_0/bcm56890_a0_cna_6_5_32_3_0_lrd_variant_def.h @@ -0,0 +1,36 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56890_A0_CNA_6_5_32_3_0_LRD_VARIANT_DEF_H +#define GEN_BCM56890_A0_CNA_6_5_32_3_0_LRD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLRD_VARIANT_BCM56890_A0_CNA_6_5_32_3_0 BCMLTD_VARIANT_BCM56890_A0_CNA_6_5_32_3_0 +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56890_A0_CNA_6_5_32_3_0_LRD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/dna_6_5_32_4_0/bcm56890_a0_dna_6_5_32_4_0_lrd_variant_def.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/dna_6_5_32_4_0/bcm56890_a0_dna_6_5_32_4_0_lrd_variant_def.h new file mode 100644 index 00000000000..cce4363fd95 --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/dna_6_5_32_4_0/bcm56890_a0_dna_6_5_32_4_0_lrd_variant_def.h @@ -0,0 +1,36 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56890_A0_DNA_6_5_32_4_0_LRD_VARIANT_DEF_H +#define GEN_BCM56890_A0_DNA_6_5_32_4_0_LRD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLRD_VARIANT_BCM56890_A0_DNA_6_5_32_4_0 BCMLTD_VARIANT_BCM56890_A0_DNA_6_5_32_4_0 +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56890_A0_DNA_6_5_32_4_0_LRD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56990_a0/bcm56990_a0_lrd_variant_def.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56990_a0/bcm56990_a0_lrd_variant_def.h similarity index 95% rename from platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56990_a0/bcm56990_a0_lrd_variant_def.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56990_a0/bcm56990_a0_lrd_variant_def.h index 6a88ee6eb61..c5fed302490 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56990_a0/bcm56990_a0_lrd_variant_def.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56990_a0/bcm56990_a0_lrd_variant_def.h @@ -7,8 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56990_b0/bcm56990_b0_lrd_variant_def.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56990_b0/bcm56990_b0_lrd_variant_def.h similarity index 95% rename from platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56990_b0/bcm56990_b0_lrd_variant_def.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56990_b0/bcm56990_b0_lrd_variant_def.h index d83b7aed85c..09faa730ded 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56990_b0/bcm56990_b0_lrd_variant_def.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56990_b0/bcm56990_b0_lrd_variant_def.h @@ -7,8 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56996_a0/bcm56996_a0_lrd_variant_def.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56996_a0/bcm56996_a0_lrd_variant_def.h similarity index 95% rename from platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56996_a0/bcm56996_a0_lrd_variant_def.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56996_a0/bcm56996_a0_lrd_variant_def.h index c6b4646aea1..0f9d297a3a1 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56996_a0/bcm56996_a0_lrd_variant_def.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56996_a0/bcm56996_a0_lrd_variant_def.h @@ -7,8 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56996_b0/bcm56996_b0_lrd_variant_def.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56996_b0/bcm56996_b0_lrd_variant_def.h similarity index 95% rename from platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56996_b0/bcm56996_b0_lrd_variant_def.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56996_b0/bcm56996_b0_lrd_variant_def.h index 31119fca1b8..e2f3c407f24 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56996_b0/bcm56996_b0_lrd_variant_def.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56996_b0/bcm56996_b0_lrd_variant_def.h @@ -7,8 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56998_a0/bcm56998_a0_lrd_variant_def.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56998_a0/bcm56998_a0_lrd_variant_def.h similarity index 95% rename from platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56998_a0/bcm56998_a0_lrd_variant_def.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56998_a0/bcm56998_a0_lrd_variant_def.h index 0e9aa882023..11a7db0e1fb 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56998_a0/bcm56998_a0_lrd_variant_def.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56998_a0/bcm56998_a0_lrd_variant_def.h @@ -7,8 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56999_a0/bcm56999_a0_lrd_variant_def.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56999_a0/bcm56999_a0_lrd_variant_def.h similarity index 95% rename from platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56999_a0/bcm56999_a0_lrd_variant_def.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56999_a0/bcm56999_a0_lrd_variant_def.h index 5f17a3b1d70..a8ba50b696c 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56999_a0/bcm56999_a0_lrd_variant_def.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56999_a0/bcm56999_a0_lrd_variant_def.h @@ -7,8 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78800_a0/bcm78800_a0_lrd_variant_def.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78800_a0/bcm78800_a0_lrd_variant_def.h similarity index 95% rename from platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78800_a0/bcm78800_a0_lrd_variant_def.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78800_a0/bcm78800_a0_lrd_variant_def.h index a884eedb1ea..24902afc37a 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78800_a0/bcm78800_a0_lrd_variant_def.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78800_a0/bcm78800_a0_lrd_variant_def.h @@ -7,8 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78800_a0/cna_6_5_32_3_0/bcm78800_a0_cna_6_5_32_3_0_lrd_variant_def.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78800_a0/cna_6_5_32_3_0/bcm78800_a0_cna_6_5_32_3_0_lrd_variant_def.h new file mode 100644 index 00000000000..42ebeae8751 --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78800_a0/cna_6_5_32_3_0/bcm78800_a0_cna_6_5_32_3_0_lrd_variant_def.h @@ -0,0 +1,36 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM78800_A0_CNA_6_5_32_3_0_LRD_VARIANT_DEF_H +#define GEN_BCM78800_A0_CNA_6_5_32_3_0_LRD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLRD_VARIANT_BCM78800_A0_CNA_6_5_32_3_0 BCMLTD_VARIANT_BCM78800_A0_CNA_6_5_32_3_0 +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM78800_A0_CNA_6_5_32_3_0_LRD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_lrd_variant_def.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_lrd_variant_def.h similarity index 95% rename from platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_lrd_variant_def.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_lrd_variant_def.h index d1ffd44a206..01a934813d2 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_lrd_variant_def.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_lrd_variant_def.h @@ -7,8 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78900_b0/bcm78900_b0_lrd_variant_def.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78900_b0/bcm78900_b0_lrd_variant_def.h similarity index 95% rename from platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78900_b0/bcm78900_b0_lrd_variant_def.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78900_b0/bcm78900_b0_lrd_variant_def.h index da5a3366762..2a1f1b5f1fc 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78900_b0/bcm78900_b0_lrd_variant_def.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78900_b0/bcm78900_b0_lrd_variant_def.h @@ -7,8 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78905_a0/bcm78905_a0_lrd_variant_def.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78905_a0/bcm78905_a0_lrd_variant_def.h similarity index 95% rename from platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78905_a0/bcm78905_a0_lrd_variant_def.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78905_a0/bcm78905_a0_lrd_variant_def.h index 530cad67d6c..fb7e6a60ac4 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78905_a0/bcm78905_a0_lrd_variant_def.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78905_a0/bcm78905_a0_lrd_variant_def.h @@ -7,8 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78907_a0/bcm78907_a0_lrd_variant_def.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78907_a0/bcm78907_a0_lrd_variant_def.h similarity index 95% rename from platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78907_a0/bcm78907_a0_lrd_variant_def.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78907_a0/bcm78907_a0_lrd_variant_def.h index 648cf8ced34..fdbdd4aedbb 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78907_a0/bcm78907_a0_lrd_variant_def.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78907_a0/bcm78907_a0_lrd_variant_def.h @@ -7,8 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/bcmltd_id_types.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/bcmltd_id_types.h similarity index 96% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/bcmltd_id_types.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/bcmltd_id_types.h index a1e05ad6406..f692eefe3a4 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/bcmltd_id_types.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/bcmltd_id_types.h @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/bcmltd_variant.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/bcmltd_variant.h similarity index 97% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/bcmltd_variant.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/bcmltd_variant.h index 456dd81016f..3938c50b64e 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/bcmltd_variant.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/bcmltd_variant.h @@ -36,8 +36,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/bcmltd_chip_variant.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/chip/bcmltd_chip_variant.h similarity index 95% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/bcmltd_chip_variant.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/chip/bcmltd_chip_variant.h index 6d94dcf7af7..77c57e39584 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/bcmltd_chip_variant.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/chip/bcmltd_chip_variant.h @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/chip/bcmltd_variant_defs.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/chip/bcmltd_variant_defs.h new file mode 100644 index 00000000000..506b8108dfd --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/chip/bcmltd_variant_defs.h @@ -0,0 +1,28 @@ +/*! \file bcmltd_variant_defs.h + * + * \brief BCMLTD variant definitions + * + */ +/* + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + */ + +#ifndef BCMLTD_VARIANT_DEFS_H +#define BCMLTD_VARIANT_DEFS_H +#ifndef DOXYGEN_IGNORE_AUTOGEN +#include +#endif /* DOXYGEN_IGNORE_AUTOGEN */ +#endif /* BCMLTD_VARIANT_DEFS_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_config_variant.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_config_variant.h similarity index 96% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_config_variant.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_config_variant.h index aa85636e54a..1ccf6ca3bff 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_config_variant.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_config_variant.h @@ -7,8 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_config_variant_internal.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_config_variant_internal.h new file mode 100644 index 00000000000..fa342c4895b --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_config_variant_internal.h @@ -0,0 +1,58 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table definition files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ +#ifndef GEN_BCMLTD_CONFIG_VARIANT_INTERNAL_H +#define GEN_BCMLTD_CONFIG_VARIANT_INTERNAL_H +#ifndef DOXYGEN_IGNORE_AUTOGEN +/*+replace reverse */ +#include "../../conf/generated/bcm78907_a0/bcm78907_a0_ltd_config_variant.h" +#include "../../conf/generated/bcm78905_a0/bcm78905_a0_ltd_config_variant.h" +#include "../../conf/generated/bcm78900_b0/bcm78900_b0_ltd_config_variant.h" +#include "../../conf/generated/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_ltd_config_variant.h" +#include "../../conf/generated/bcm78800_a0/cna_6_5_32_3_0/bcm78800_a0_cna_6_5_32_3_0_ltd_config_variant.h" +#include "../../conf/generated/bcm78800_a0/bcm78800_a0_ltd_config_variant.h" +#include "../../conf/generated/bcm56999_a0/bcm56999_a0_ltd_config_variant.h" +#include "../../conf/generated/bcm56998_a0/bcm56998_a0_ltd_config_variant.h" +#include "../../conf/generated/bcm56996_b0/bcm56996_b0_ltd_config_variant.h" +#include "../../conf/generated/bcm56996_a0/bcm56996_a0_ltd_config_variant.h" +#include "../../conf/generated/bcm56990_b0/bcm56990_b0_ltd_config_variant.h" +#include "../../conf/generated/bcm56990_a0/bcm56990_a0_ltd_config_variant.h" +#include "../../conf/generated/bcm56890_a0/dna_6_5_32_4_0/bcm56890_a0_dna_6_5_32_4_0_ltd_config_variant.h" +#include "../../conf/generated/bcm56890_a0/cna_6_5_32_3_0/bcm56890_a0_cna_6_5_32_3_0_ltd_config_variant.h" +#include "../../conf/generated/bcm56890_a0/bcm56890_a0_ltd_config_variant.h" +#include "../../conf/generated/bcm56880_a0/nfa_6_5_32_1_0/bcm56880_a0_nfa_6_5_32_1_0_ltd_config_variant.h" +#include "../../conf/generated/bcm56880_a0/hna_6_5_32_2_0/bcm56880_a0_hna_6_5_32_2_0_ltd_config_variant.h" +#include "../../conf/generated/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_ltd_config_variant.h" +#include "../../conf/generated/bcm56880_a0/bcm56880_a0_ltd_config_variant.h" +#include "../../conf/generated/bcm56780_a0/hna_6_5_32_2_0/bcm56780_a0_hna_6_5_32_2_0_ltd_config_variant.h" +#include "../../conf/generated/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_ltd_config_variant.h" +#include "../../conf/generated/bcm56780_a0/cna_6_5_32_3_0/bcm56780_a0_cna_6_5_32_3_0_ltd_config_variant.h" +#include "../../conf/generated/bcm56780_a0/bcm56780_a0_ltd_config_variant.h" +#include "../../conf/generated/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_ltd_config_variant.h" +#include "../../conf/generated/bcm56690_a0/bcm56690_a0_ltd_config_variant.h" +#include "../../conf/generated/bcm56080_a0/bcm56080_a0_ltd_config_variant.h" +/*-replace*/ +#endif /* DOXYGEN_IGNORE_AUTOGEN */ +#endif /* GEN_BCMLTD_CONFIG_VARIANT_INTERNAL_H */ diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_defs.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_defs.h new file mode 100644 index 00000000000..3c6d3899a48 --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_defs.h @@ -0,0 +1,38 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCMLTD_VARIANT_DEFS_H +#define GEN_BCMLTD_VARIANT_DEFS_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#include +#include + +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCMLTD_VARIANT_DEFS_H */ + diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_defs_internal.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_defs_internal.h new file mode 100644 index 00000000000..e5b157c6bee --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_defs_internal.h @@ -0,0 +1,58 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table definition files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ +#ifndef GEN_BCMLTD_VARIANT_DEFS_INTERNAL_H +#define GEN_BCMLTD_VARIANT_DEFS_INTERNAL_H +#ifndef DOXYGEN_IGNORE_AUTOGEN +/*+replace reverse */ +#include "../../defs/generated/bcm78907_a0/bcm78907_a0_ltd_variant_def.h" +#include "../../defs/generated/bcm78905_a0/bcm78905_a0_ltd_variant_def.h" +#include "../../defs/generated/bcm78900_b0/bcm78900_b0_ltd_variant_def.h" +#include "../../defs/generated/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_ltd_variant_def.h" +#include "../../defs/generated/bcm78800_a0/cna_6_5_32_3_0/bcm78800_a0_cna_6_5_32_3_0_ltd_variant_def.h" +#include "../../defs/generated/bcm78800_a0/bcm78800_a0_ltd_variant_def.h" +#include "../../defs/generated/bcm56999_a0/bcm56999_a0_ltd_variant_def.h" +#include "../../defs/generated/bcm56998_a0/bcm56998_a0_ltd_variant_def.h" +#include "../../defs/generated/bcm56996_b0/bcm56996_b0_ltd_variant_def.h" +#include "../../defs/generated/bcm56996_a0/bcm56996_a0_ltd_variant_def.h" +#include "../../defs/generated/bcm56990_b0/bcm56990_b0_ltd_variant_def.h" +#include "../../defs/generated/bcm56990_a0/bcm56990_a0_ltd_variant_def.h" +#include "../../defs/generated/bcm56890_a0/dna_6_5_32_4_0/bcm56890_a0_dna_6_5_32_4_0_ltd_variant_def.h" +#include "../../defs/generated/bcm56890_a0/cna_6_5_32_3_0/bcm56890_a0_cna_6_5_32_3_0_ltd_variant_def.h" +#include "../../defs/generated/bcm56890_a0/bcm56890_a0_ltd_variant_def.h" +#include "../../defs/generated/bcm56880_a0/nfa_6_5_32_1_0/bcm56880_a0_nfa_6_5_32_1_0_ltd_variant_def.h" +#include "../../defs/generated/bcm56880_a0/hna_6_5_32_2_0/bcm56880_a0_hna_6_5_32_2_0_ltd_variant_def.h" +#include "../../defs/generated/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_ltd_variant_def.h" +#include "../../defs/generated/bcm56880_a0/bcm56880_a0_ltd_variant_def.h" +#include "../../defs/generated/bcm56780_a0/hna_6_5_32_2_0/bcm56780_a0_hna_6_5_32_2_0_ltd_variant_def.h" +#include "../../defs/generated/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_ltd_variant_def.h" +#include "../../defs/generated/bcm56780_a0/cna_6_5_32_3_0/bcm56780_a0_cna_6_5_32_3_0_ltd_variant_def.h" +#include "../../defs/generated/bcm56780_a0/bcm56780_a0_ltd_variant_def.h" +#include "../../defs/generated/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_ltd_variant_def.h" +#include "../../defs/generated/bcm56690_a0/bcm56690_a0_ltd_variant_def.h" +#include "../../defs/generated/bcm56080_a0/bcm56080_a0_ltd_variant_def.h" +/*-replace*/ +#endif /* DOXYGEN_IGNORE_AUTOGEN */ +#endif /* GEN_BCMLTD_VARIANT_DEFS_INTERNAL_H */ diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_entry.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_entry.h new file mode 100644 index 00000000000..7dc89f996bd --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_entry.h @@ -0,0 +1,59 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table definition files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ +#ifndef GEN_BCMLTD_VARIANT_ENTRY_H +#define GEN_BCMLTD_VARIANT_ENTRY_H +/* guard deliberately empty */ +#endif /* GEN_BCMLTD_VARIANT_ENTRY_H */ +#ifndef DOXYGEN_IGNORE_AUTOGEN +/*+replace variant */ +#include "../../entry/generated/bcm56080_a0/bcm56080_a0_ltd_variant_entry.h" +#include "../../entry/generated/bcm56690_a0/bcm56690_a0_ltd_variant_entry.h" +#include "../../entry/generated/bcm56780_a0/bcm56780_a0_ltd_variant_entry.h" +#include "../../entry/generated/bcm56880_a0/bcm56880_a0_ltd_variant_entry.h" +#include "../../entry/generated/bcm56890_a0/bcm56890_a0_ltd_variant_entry.h" +#include "../../entry/generated/bcm56990_a0/bcm56990_a0_ltd_variant_entry.h" +#include "../../entry/generated/bcm56990_b0/bcm56990_b0_ltd_variant_entry.h" +#include "../../entry/generated/bcm56996_a0/bcm56996_a0_ltd_variant_entry.h" +#include "../../entry/generated/bcm56996_b0/bcm56996_b0_ltd_variant_entry.h" +#include "../../entry/generated/bcm56998_a0/bcm56998_a0_ltd_variant_entry.h" +#include "../../entry/generated/bcm56999_a0/bcm56999_a0_ltd_variant_entry.h" +#include "../../entry/generated/bcm78800_a0/bcm78800_a0_ltd_variant_entry.h" +#include "../../entry/generated/bcm78900_b0/bcm78900_b0_ltd_variant_entry.h" +#include "../../entry/generated/bcm78905_a0/bcm78905_a0_ltd_variant_entry.h" +#include "../../entry/generated/bcm78907_a0/bcm78907_a0_ltd_variant_entry.h" +#include "../../entry/generated/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_ltd_variant_entry.h" +#include "../../entry/generated/bcm56780_a0/cna_6_5_32_3_0/bcm56780_a0_cna_6_5_32_3_0_ltd_variant_entry.h" +#include "../../entry/generated/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_ltd_variant_entry.h" +#include "../../entry/generated/bcm56780_a0/hna_6_5_32_2_0/bcm56780_a0_hna_6_5_32_2_0_ltd_variant_entry.h" +#include "../../entry/generated/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_ltd_variant_entry.h" +#include "../../entry/generated/bcm56880_a0/hna_6_5_32_2_0/bcm56880_a0_hna_6_5_32_2_0_ltd_variant_entry.h" +#include "../../entry/generated/bcm56880_a0/nfa_6_5_32_1_0/bcm56880_a0_nfa_6_5_32_1_0_ltd_variant_entry.h" +#include "../../entry/generated/bcm56890_a0/cna_6_5_32_3_0/bcm56890_a0_cna_6_5_32_3_0_ltd_variant_entry.h" +#include "../../entry/generated/bcm56890_a0/dna_6_5_32_4_0/bcm56890_a0_dna_6_5_32_4_0_ltd_variant_entry.h" +#include "../../entry/generated/bcm78800_a0/cna_6_5_32_3_0/bcm78800_a0_cna_6_5_32_3_0_ltd_variant_entry.h" +#include "../../entry/generated/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_ltd_variant_entry.h" +/*-replace*/ +#endif /* DOXYGEN_IGNORE_AUTOGEN */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_limits.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_limits.h similarity index 93% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_limits.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_limits.h index a75d0f13884..13480e7384d 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_limits.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_limits.h @@ -7,8 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -30,7 +29,7 @@ #ifndef DOXYGEN_IGNORE_AUTOGEN -#define BCMLTD_VARIANT_MAX 32 +#define BCMLTD_VARIANT_MAX 26 #endif /* DOXYGEN_IGNORE_AUTOGEN */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56080_a0/bcm56080_a0_ltd_config_variant.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56080_a0/bcm56080_a0_ltd_config_variant.h similarity index 96% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56080_a0/bcm56080_a0_ltd_config_variant.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56080_a0/bcm56080_a0_ltd_config_variant.h index 4dc351fbb60..6cc7dd75e65 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56080_a0/bcm56080_a0_ltd_config_variant.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56080_a0/bcm56080_a0_ltd_config_variant.h @@ -7,8 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56690_a0/bcm56690_a0_ltd_config_variant.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56690_a0/bcm56690_a0_ltd_config_variant.h similarity index 96% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56690_a0/bcm56690_a0_ltd_config_variant.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56690_a0/bcm56690_a0_ltd_config_variant.h index 2e8bee5110f..594c7e6f451 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56690_a0/bcm56690_a0_ltd_config_variant.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56690_a0/bcm56690_a0_ltd_config_variant.h @@ -7,8 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_ltd_config_variant.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_ltd_config_variant.h similarity index 97% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_ltd_config_variant.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_ltd_config_variant.h index 19de856bd8d..4280d6a0da2 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_ltd_config_variant.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_ltd_config_variant.h @@ -7,8 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/bcm56780_a0_ltd_config_variant.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/bcm56780_a0_ltd_config_variant.h similarity index 96% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/bcm56780_a0_ltd_config_variant.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/bcm56780_a0_ltd_config_variant.h index a54429ed641..f023bf66e6d 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/bcm56780_a0_ltd_config_variant.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/bcm56780_a0_ltd_config_variant.h @@ -7,8 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/cna_6_5_32_3_0/bcm56780_a0_cna_6_5_32_3_0_ltd_config_variant.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/cna_6_5_32_3_0/bcm56780_a0_cna_6_5_32_3_0_ltd_config_variant.h new file mode 100644 index 00000000000..24af997af39 --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/cna_6_5_32_3_0/bcm56780_a0_cna_6_5_32_3_0_ltd_config_variant.h @@ -0,0 +1,49 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56780_A0_CNA_6_5_32_3_0_LTD_CONFIG_VARIANT_H +#define GEN_BCM56780_A0_CNA_6_5_32_3_0_LTD_CONFIG_VARIANT_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#if BCMDRD_CONFIG_INCLUDE_BCM56780_A0 +#ifndef BCMLTD_CONFIG_INCLUDE_BCM56780_A0_CNA_6_5_32_3_0 +#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_CNA_6_5_32_3_0 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT +#endif +#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_CNA_6_5_32_3_0 == 1 +#ifndef BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE +#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE 1 +#endif +#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE == 0 +#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56780_A0_CNA_6_5_32_3_0=1, BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE=0. +#endif +#endif +#else +#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_CNA_6_5_32_3_0 0 +#endif +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56780_A0_CNA_6_5_32_3_0_LTD_CONFIG_VARIANT_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_ltd_config_variant.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_ltd_config_variant.h similarity index 97% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_ltd_config_variant.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_ltd_config_variant.h index c267205fc26..16ac6abc404 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_ltd_config_variant.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_ltd_config_variant.h @@ -7,8 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/hna_6_5_32_2_0/bcm56780_a0_hna_6_5_32_2_0_ltd_config_variant.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/hna_6_5_32_2_0/bcm56780_a0_hna_6_5_32_2_0_ltd_config_variant.h new file mode 100644 index 00000000000..15e388cd266 --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/hna_6_5_32_2_0/bcm56780_a0_hna_6_5_32_2_0_ltd_config_variant.h @@ -0,0 +1,49 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56780_A0_HNA_6_5_32_2_0_LTD_CONFIG_VARIANT_H +#define GEN_BCM56780_A0_HNA_6_5_32_2_0_LTD_CONFIG_VARIANT_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#if BCMDRD_CONFIG_INCLUDE_BCM56780_A0 +#ifndef BCMLTD_CONFIG_INCLUDE_BCM56780_A0_HNA_6_5_32_2_0 +#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_HNA_6_5_32_2_0 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT +#endif +#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_HNA_6_5_32_2_0 == 1 +#ifndef BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE +#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE 1 +#endif +#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE == 0 +#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56780_A0_HNA_6_5_32_2_0=1, BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE=0. +#endif +#endif +#else +#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_HNA_6_5_32_2_0 0 +#endif +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56780_A0_HNA_6_5_32_2_0_LTD_CONFIG_VARIANT_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/bcm56880_a0_ltd_config_variant.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/bcm56880_a0_ltd_config_variant.h similarity index 96% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/bcm56880_a0_ltd_config_variant.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/bcm56880_a0_ltd_config_variant.h index 0891400a725..025abf2529c 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/bcm56880_a0_ltd_config_variant.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/bcm56880_a0_ltd_config_variant.h @@ -7,8 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_ltd_config_variant.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_ltd_config_variant.h similarity index 97% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_ltd_config_variant.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_ltd_config_variant.h index e3b867d3228..f9a9c4f8032 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_ltd_config_variant.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_ltd_config_variant.h @@ -7,8 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/hna_6_5_32_2_0/bcm56880_a0_hna_6_5_32_2_0_ltd_config_variant.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/hna_6_5_32_2_0/bcm56880_a0_hna_6_5_32_2_0_ltd_config_variant.h new file mode 100644 index 00000000000..8e40f4074ff --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/hna_6_5_32_2_0/bcm56880_a0_hna_6_5_32_2_0_ltd_config_variant.h @@ -0,0 +1,49 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56880_A0_HNA_6_5_32_2_0_LTD_CONFIG_VARIANT_H +#define GEN_BCM56880_A0_HNA_6_5_32_2_0_LTD_CONFIG_VARIANT_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#if BCMDRD_CONFIG_INCLUDE_BCM56880_A0 +#ifndef BCMLTD_CONFIG_INCLUDE_BCM56880_A0_HNA_6_5_32_2_0 +#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_HNA_6_5_32_2_0 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT +#endif +#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_HNA_6_5_32_2_0 == 1 +#ifndef BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE +#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE 1 +#endif +#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE == 0 +#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56880_A0_HNA_6_5_32_2_0=1, BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE=0. +#endif +#endif +#else +#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_HNA_6_5_32_2_0 0 +#endif +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56880_A0_HNA_6_5_32_2_0_LTD_CONFIG_VARIANT_H */ diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/nfa_6_5_32_1_0/bcm56880_a0_nfa_6_5_32_1_0_ltd_config_variant.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/nfa_6_5_32_1_0/bcm56880_a0_nfa_6_5_32_1_0_ltd_config_variant.h new file mode 100644 index 00000000000..2eab97d7713 --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/nfa_6_5_32_1_0/bcm56880_a0_nfa_6_5_32_1_0_ltd_config_variant.h @@ -0,0 +1,49 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56880_A0_NFA_6_5_32_1_0_LTD_CONFIG_VARIANT_H +#define GEN_BCM56880_A0_NFA_6_5_32_1_0_LTD_CONFIG_VARIANT_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#if BCMDRD_CONFIG_INCLUDE_BCM56880_A0 +#ifndef BCMLTD_CONFIG_INCLUDE_BCM56880_A0_NFA_6_5_32_1_0 +#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_NFA_6_5_32_1_0 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT +#endif +#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_NFA_6_5_32_1_0 == 1 +#ifndef BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE +#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE 1 +#endif +#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE == 0 +#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56880_A0_NFA_6_5_32_1_0=1, BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE=0. +#endif +#endif +#else +#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_NFA_6_5_32_1_0 0 +#endif +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56880_A0_NFA_6_5_32_1_0_LTD_CONFIG_VARIANT_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/bcm56890_a0_ltd_config_variant.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/bcm56890_a0_ltd_config_variant.h similarity index 96% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/bcm56890_a0_ltd_config_variant.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/bcm56890_a0_ltd_config_variant.h index 647980a88aa..10f01c3f2f3 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/bcm56890_a0_ltd_config_variant.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/bcm56890_a0_ltd_config_variant.h @@ -7,8 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/cna_6_5_32_3_0/bcm56890_a0_cna_6_5_32_3_0_ltd_config_variant.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/cna_6_5_32_3_0/bcm56890_a0_cna_6_5_32_3_0_ltd_config_variant.h new file mode 100644 index 00000000000..b1891654fc7 --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/cna_6_5_32_3_0/bcm56890_a0_cna_6_5_32_3_0_ltd_config_variant.h @@ -0,0 +1,49 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56890_A0_CNA_6_5_32_3_0_LTD_CONFIG_VARIANT_H +#define GEN_BCM56890_A0_CNA_6_5_32_3_0_LTD_CONFIG_VARIANT_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#if BCMDRD_CONFIG_INCLUDE_BCM56890_A0 +#ifndef BCMLTD_CONFIG_INCLUDE_BCM56890_A0_CNA_6_5_32_3_0 +#define BCMLTD_CONFIG_INCLUDE_BCM56890_A0_CNA_6_5_32_3_0 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT +#endif +#if BCMLTD_CONFIG_INCLUDE_BCM56890_A0_CNA_6_5_32_3_0 == 1 +#ifndef BCMLTD_CONFIG_INCLUDE_BCM56890_A0_BASE +#define BCMLTD_CONFIG_INCLUDE_BCM56890_A0_BASE 1 +#endif +#if BCMLTD_CONFIG_INCLUDE_BCM56890_A0_BASE == 0 +#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56890_A0_CNA_6_5_32_3_0=1, BCMLTD_CONFIG_INCLUDE_BCM56890_A0_BASE=0. +#endif +#endif +#else +#define BCMLTD_CONFIG_INCLUDE_BCM56890_A0_CNA_6_5_32_3_0 0 +#endif +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56890_A0_CNA_6_5_32_3_0_LTD_CONFIG_VARIANT_H */ diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/dna_6_5_32_4_0/bcm56890_a0_dna_6_5_32_4_0_ltd_config_variant.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/dna_6_5_32_4_0/bcm56890_a0_dna_6_5_32_4_0_ltd_config_variant.h new file mode 100644 index 00000000000..580e11e8644 --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/dna_6_5_32_4_0/bcm56890_a0_dna_6_5_32_4_0_ltd_config_variant.h @@ -0,0 +1,49 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56890_A0_DNA_6_5_32_4_0_LTD_CONFIG_VARIANT_H +#define GEN_BCM56890_A0_DNA_6_5_32_4_0_LTD_CONFIG_VARIANT_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#if BCMDRD_CONFIG_INCLUDE_BCM56890_A0 +#ifndef BCMLTD_CONFIG_INCLUDE_BCM56890_A0_DNA_6_5_32_4_0 +#define BCMLTD_CONFIG_INCLUDE_BCM56890_A0_DNA_6_5_32_4_0 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT +#endif +#if BCMLTD_CONFIG_INCLUDE_BCM56890_A0_DNA_6_5_32_4_0 == 1 +#ifndef BCMLTD_CONFIG_INCLUDE_BCM56890_A0_BASE +#define BCMLTD_CONFIG_INCLUDE_BCM56890_A0_BASE 1 +#endif +#if BCMLTD_CONFIG_INCLUDE_BCM56890_A0_BASE == 0 +#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56890_A0_DNA_6_5_32_4_0=1, BCMLTD_CONFIG_INCLUDE_BCM56890_A0_BASE=0. +#endif +#endif +#else +#define BCMLTD_CONFIG_INCLUDE_BCM56890_A0_DNA_6_5_32_4_0 0 +#endif +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56890_A0_DNA_6_5_32_4_0_LTD_CONFIG_VARIANT_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56990_a0/bcm56990_a0_ltd_config_variant.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56990_a0/bcm56990_a0_ltd_config_variant.h similarity index 96% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56990_a0/bcm56990_a0_ltd_config_variant.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56990_a0/bcm56990_a0_ltd_config_variant.h index e0d638a36cd..0fe4ceaffa9 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56990_a0/bcm56990_a0_ltd_config_variant.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56990_a0/bcm56990_a0_ltd_config_variant.h @@ -7,8 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56990_b0/bcm56990_b0_ltd_config_variant.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56990_b0/bcm56990_b0_ltd_config_variant.h similarity index 96% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56990_b0/bcm56990_b0_ltd_config_variant.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56990_b0/bcm56990_b0_ltd_config_variant.h index 4b63595355c..90d141baf8d 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56990_b0/bcm56990_b0_ltd_config_variant.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56990_b0/bcm56990_b0_ltd_config_variant.h @@ -7,8 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56996_a0/bcm56996_a0_ltd_config_variant.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56996_a0/bcm56996_a0_ltd_config_variant.h similarity index 96% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56996_a0/bcm56996_a0_ltd_config_variant.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56996_a0/bcm56996_a0_ltd_config_variant.h index b7bc1cf2abe..5bba194fcab 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56996_a0/bcm56996_a0_ltd_config_variant.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56996_a0/bcm56996_a0_ltd_config_variant.h @@ -7,8 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56996_b0/bcm56996_b0_ltd_config_variant.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56996_b0/bcm56996_b0_ltd_config_variant.h similarity index 96% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56996_b0/bcm56996_b0_ltd_config_variant.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56996_b0/bcm56996_b0_ltd_config_variant.h index 3e94df77f64..b5203e926f4 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56996_b0/bcm56996_b0_ltd_config_variant.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56996_b0/bcm56996_b0_ltd_config_variant.h @@ -7,8 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56998_a0/bcm56998_a0_ltd_config_variant.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56998_a0/bcm56998_a0_ltd_config_variant.h similarity index 96% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56998_a0/bcm56998_a0_ltd_config_variant.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56998_a0/bcm56998_a0_ltd_config_variant.h index 3f6a55ae540..410ccaf5d52 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56998_a0/bcm56998_a0_ltd_config_variant.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56998_a0/bcm56998_a0_ltd_config_variant.h @@ -7,8 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56999_a0/bcm56999_a0_ltd_config_variant.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56999_a0/bcm56999_a0_ltd_config_variant.h similarity index 96% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56999_a0/bcm56999_a0_ltd_config_variant.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56999_a0/bcm56999_a0_ltd_config_variant.h index 908a0b0fe6c..0383a1b3538 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56999_a0/bcm56999_a0_ltd_config_variant.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56999_a0/bcm56999_a0_ltd_config_variant.h @@ -7,8 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78800_a0/bcm78800_a0_ltd_config_variant.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78800_a0/bcm78800_a0_ltd_config_variant.h similarity index 96% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78800_a0/bcm78800_a0_ltd_config_variant.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78800_a0/bcm78800_a0_ltd_config_variant.h index e36d849cc09..ac5bb875d00 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78800_a0/bcm78800_a0_ltd_config_variant.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78800_a0/bcm78800_a0_ltd_config_variant.h @@ -7,8 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78800_a0/cna_6_5_32_3_0/bcm78800_a0_cna_6_5_32_3_0_ltd_config_variant.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78800_a0/cna_6_5_32_3_0/bcm78800_a0_cna_6_5_32_3_0_ltd_config_variant.h new file mode 100644 index 00000000000..94b08cde07d --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78800_a0/cna_6_5_32_3_0/bcm78800_a0_cna_6_5_32_3_0_ltd_config_variant.h @@ -0,0 +1,49 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM78800_A0_CNA_6_5_32_3_0_LTD_CONFIG_VARIANT_H +#define GEN_BCM78800_A0_CNA_6_5_32_3_0_LTD_CONFIG_VARIANT_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#if BCMDRD_CONFIG_INCLUDE_BCM78800_A0 +#ifndef BCMLTD_CONFIG_INCLUDE_BCM78800_A0_CNA_6_5_32_3_0 +#define BCMLTD_CONFIG_INCLUDE_BCM78800_A0_CNA_6_5_32_3_0 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT +#endif +#if BCMLTD_CONFIG_INCLUDE_BCM78800_A0_CNA_6_5_32_3_0 == 1 +#ifndef BCMLTD_CONFIG_INCLUDE_BCM78800_A0_BASE +#define BCMLTD_CONFIG_INCLUDE_BCM78800_A0_BASE 1 +#endif +#if BCMLTD_CONFIG_INCLUDE_BCM78800_A0_BASE == 0 +#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM78800_A0_CNA_6_5_32_3_0=1, BCMLTD_CONFIG_INCLUDE_BCM78800_A0_BASE=0. +#endif +#endif +#else +#define BCMLTD_CONFIG_INCLUDE_BCM78800_A0_CNA_6_5_32_3_0 0 +#endif +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM78800_A0_CNA_6_5_32_3_0_LTD_CONFIG_VARIANT_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_ltd_config_variant.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_ltd_config_variant.h similarity index 97% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_ltd_config_variant.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_ltd_config_variant.h index 8bae8826f1e..014b425071f 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_ltd_config_variant.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_ltd_config_variant.h @@ -7,8 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78900_b0/bcm78900_b0_ltd_config_variant.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78900_b0/bcm78900_b0_ltd_config_variant.h similarity index 96% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78900_b0/bcm78900_b0_ltd_config_variant.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78900_b0/bcm78900_b0_ltd_config_variant.h index b0b1655d89c..10f1aebe6eb 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78900_b0/bcm78900_b0_ltd_config_variant.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78900_b0/bcm78900_b0_ltd_config_variant.h @@ -7,8 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78905_a0/bcm78905_a0_ltd_config_variant.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78905_a0/bcm78905_a0_ltd_config_variant.h similarity index 96% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78905_a0/bcm78905_a0_ltd_config_variant.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78905_a0/bcm78905_a0_ltd_config_variant.h index 4b800414edc..0d3ff3b3a6a 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78905_a0/bcm78905_a0_ltd_config_variant.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78905_a0/bcm78905_a0_ltd_config_variant.h @@ -7,8 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78907_a0/bcm78907_a0_ltd_config_variant.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78907_a0/bcm78907_a0_ltd_config_variant.h similarity index 96% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78907_a0/bcm78907_a0_ltd_config_variant.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78907_a0/bcm78907_a0_ltd_config_variant.h index 7bec3c27ee2..fbc6d433d38 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78907_a0/bcm78907_a0_ltd_config_variant.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78907_a0/bcm78907_a0_ltd_config_variant.h @@ -7,8 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56080_a0/bcm56080_a0_ltd_variant_def.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56080_a0/bcm56080_a0_ltd_variant_def.h similarity index 95% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56080_a0/bcm56080_a0_ltd_variant_def.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56080_a0/bcm56080_a0_ltd_variant_def.h index e8c606b01fa..452962fed82 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56080_a0/bcm56080_a0_ltd_variant_def.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56080_a0/bcm56080_a0_ltd_variant_def.h @@ -7,8 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56690_a0/bcm56690_a0_ltd_variant_def.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56690_a0/bcm56690_a0_ltd_variant_def.h similarity index 95% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56690_a0/bcm56690_a0_ltd_variant_def.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56690_a0/bcm56690_a0_ltd_variant_def.h index 1f71e9e2aa1..e73cae8cbc0 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56690_a0/bcm56690_a0_ltd_variant_def.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56690_a0/bcm56690_a0_ltd_variant_def.h @@ -7,8 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_ltd_variant_def.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_ltd_variant_def.h similarity index 88% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_ltd_variant_def.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_ltd_variant_def.h index 193c8f09db0..092c5f2154e 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_ltd_variant_def.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_ltd_variant_def.h @@ -7,8 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -30,8 +29,8 @@ #ifndef DOXYGEN_IGNORE_AUTOGEN -#define BCMLTD_VARIANT_BCM56690_A0_DNA_6_5_32_5_0 21 -#define BCMLTD_VARIANT_LOCAL_BCM56690_A0_DNA_6_5_32_5_0 2 +#define BCMLTD_VARIANT_BCM56690_A0_DNA_6_5_32_5_0 16 +#define BCMLTD_VARIANT_LOCAL_BCM56690_A0_DNA_6_5_32_5_0 1 #endif /* DOXYGEN_IGNORE_AUTOGEN */ #endif /* GEN_BCM56690_A0_DNA_6_5_32_5_0_LTD_VARIANT_DEF_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/bcm56780_a0_ltd_variant_def.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/bcm56780_a0_ltd_variant_def.h similarity index 95% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/bcm56780_a0_ltd_variant_def.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/bcm56780_a0_ltd_variant_def.h index 6ae3bd6f6d7..3fdb9451f9a 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/bcm56780_a0_ltd_variant_def.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/bcm56780_a0_ltd_variant_def.h @@ -7,8 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/cna_6_5_32_3_0/bcm56780_a0_cna_6_5_32_3_0_ltd_variant_def.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/cna_6_5_32_3_0/bcm56780_a0_cna_6_5_32_3_0_ltd_variant_def.h new file mode 100644 index 00000000000..4aca2448242 --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/cna_6_5_32_3_0/bcm56780_a0_cna_6_5_32_3_0_ltd_variant_def.h @@ -0,0 +1,37 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56780_A0_CNA_6_5_32_3_0_LTD_VARIANT_DEF_H +#define GEN_BCM56780_A0_CNA_6_5_32_3_0_LTD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLTD_VARIANT_BCM56780_A0_CNA_6_5_32_3_0 17 +#define BCMLTD_VARIANT_LOCAL_BCM56780_A0_CNA_6_5_32_3_0 1 +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56780_A0_CNA_6_5_32_3_0_LTD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_ltd_variant_def.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_ltd_variant_def.h similarity index 92% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_ltd_variant_def.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_ltd_variant_def.h index 361876a490b..5d113cd8512 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_ltd_variant_def.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_ltd_variant_def.h @@ -7,8 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -30,7 +29,7 @@ #ifndef DOXYGEN_IGNORE_AUTOGEN -#define BCMLTD_VARIANT_BCM56780_A0_DNA_6_5_31_7_0 23 +#define BCMLTD_VARIANT_BCM56780_A0_DNA_6_5_31_7_0 18 #define BCMLTD_VARIANT_LOCAL_BCM56780_A0_DNA_6_5_31_7_0 2 #endif /* DOXYGEN_IGNORE_AUTOGEN */ diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/hna_6_5_32_2_0/bcm56780_a0_hna_6_5_32_2_0_ltd_variant_def.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/hna_6_5_32_2_0/bcm56780_a0_hna_6_5_32_2_0_ltd_variant_def.h new file mode 100644 index 00000000000..4ecac153e17 --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/hna_6_5_32_2_0/bcm56780_a0_hna_6_5_32_2_0_ltd_variant_def.h @@ -0,0 +1,37 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56780_A0_HNA_6_5_32_2_0_LTD_VARIANT_DEF_H +#define GEN_BCM56780_A0_HNA_6_5_32_2_0_LTD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLTD_VARIANT_BCM56780_A0_HNA_6_5_32_2_0 19 +#define BCMLTD_VARIANT_LOCAL_BCM56780_A0_HNA_6_5_32_2_0 3 +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56780_A0_HNA_6_5_32_2_0_LTD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/bcm56880_a0_ltd_variant_def.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/bcm56880_a0_ltd_variant_def.h similarity index 95% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/bcm56880_a0_ltd_variant_def.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/bcm56880_a0_ltd_variant_def.h index 0106d71cd9a..bc2252b6785 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/bcm56880_a0_ltd_variant_def.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/bcm56880_a0_ltd_variant_def.h @@ -7,8 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_ltd_variant_def.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_ltd_variant_def.h similarity index 92% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_ltd_variant_def.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_ltd_variant_def.h index bcade53e91b..66b0bed89e9 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_ltd_variant_def.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_ltd_variant_def.h @@ -7,8 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -30,7 +29,7 @@ #ifndef DOXYGEN_IGNORE_AUTOGEN -#define BCMLTD_VARIANT_BCM56880_A0_DNA_6_5_31_6_0 25 +#define BCMLTD_VARIANT_BCM56880_A0_DNA_6_5_31_6_0 20 #define BCMLTD_VARIANT_LOCAL_BCM56880_A0_DNA_6_5_31_6_0 1 #endif /* DOXYGEN_IGNORE_AUTOGEN */ diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/hna_6_5_32_2_0/bcm56880_a0_hna_6_5_32_2_0_ltd_variant_def.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/hna_6_5_32_2_0/bcm56880_a0_hna_6_5_32_2_0_ltd_variant_def.h new file mode 100644 index 00000000000..85057a5a319 --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/hna_6_5_32_2_0/bcm56880_a0_hna_6_5_32_2_0_ltd_variant_def.h @@ -0,0 +1,37 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56880_A0_HNA_6_5_32_2_0_LTD_VARIANT_DEF_H +#define GEN_BCM56880_A0_HNA_6_5_32_2_0_LTD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLTD_VARIANT_BCM56880_A0_HNA_6_5_32_2_0 21 +#define BCMLTD_VARIANT_LOCAL_BCM56880_A0_HNA_6_5_32_2_0 2 +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56880_A0_HNA_6_5_32_2_0_LTD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/nfa_6_5_32_1_0/bcm56880_a0_nfa_6_5_32_1_0_ltd_variant_def.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/nfa_6_5_32_1_0/bcm56880_a0_nfa_6_5_32_1_0_ltd_variant_def.h new file mode 100644 index 00000000000..731e165c331 --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/nfa_6_5_32_1_0/bcm56880_a0_nfa_6_5_32_1_0_ltd_variant_def.h @@ -0,0 +1,37 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56880_A0_NFA_6_5_32_1_0_LTD_VARIANT_DEF_H +#define GEN_BCM56880_A0_NFA_6_5_32_1_0_LTD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLTD_VARIANT_BCM56880_A0_NFA_6_5_32_1_0 22 +#define BCMLTD_VARIANT_LOCAL_BCM56880_A0_NFA_6_5_32_1_0 3 +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56880_A0_NFA_6_5_32_1_0_LTD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/bcm56890_a0_ltd_variant_def.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/bcm56890_a0_ltd_variant_def.h similarity index 95% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/bcm56890_a0_ltd_variant_def.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/bcm56890_a0_ltd_variant_def.h index cc2318cc904..26ea9a04231 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/bcm56890_a0_ltd_variant_def.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/bcm56890_a0_ltd_variant_def.h @@ -7,8 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/cna_6_5_32_3_0/bcm56890_a0_cna_6_5_32_3_0_ltd_variant_def.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/cna_6_5_32_3_0/bcm56890_a0_cna_6_5_32_3_0_ltd_variant_def.h new file mode 100644 index 00000000000..4b5505a6a8f --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/cna_6_5_32_3_0/bcm56890_a0_cna_6_5_32_3_0_ltd_variant_def.h @@ -0,0 +1,37 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56890_A0_CNA_6_5_32_3_0_LTD_VARIANT_DEF_H +#define GEN_BCM56890_A0_CNA_6_5_32_3_0_LTD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLTD_VARIANT_BCM56890_A0_CNA_6_5_32_3_0 23 +#define BCMLTD_VARIANT_LOCAL_BCM56890_A0_CNA_6_5_32_3_0 1 +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56890_A0_CNA_6_5_32_3_0_LTD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/dna_6_5_32_4_0/bcm56890_a0_dna_6_5_32_4_0_ltd_variant_def.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/dna_6_5_32_4_0/bcm56890_a0_dna_6_5_32_4_0_ltd_variant_def.h new file mode 100644 index 00000000000..9ee9f13502a --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/dna_6_5_32_4_0/bcm56890_a0_dna_6_5_32_4_0_ltd_variant_def.h @@ -0,0 +1,37 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56890_A0_DNA_6_5_32_4_0_LTD_VARIANT_DEF_H +#define GEN_BCM56890_A0_DNA_6_5_32_4_0_LTD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLTD_VARIANT_BCM56890_A0_DNA_6_5_32_4_0 24 +#define BCMLTD_VARIANT_LOCAL_BCM56890_A0_DNA_6_5_32_4_0 2 +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM56890_A0_DNA_6_5_32_4_0_LTD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56990_a0/bcm56990_a0_ltd_variant_def.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56990_a0/bcm56990_a0_ltd_variant_def.h similarity index 95% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56990_a0/bcm56990_a0_ltd_variant_def.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56990_a0/bcm56990_a0_ltd_variant_def.h index a3996554095..86a131856a5 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56990_a0/bcm56990_a0_ltd_variant_def.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56990_a0/bcm56990_a0_ltd_variant_def.h @@ -7,8 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56990_b0/bcm56990_b0_ltd_variant_def.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56990_b0/bcm56990_b0_ltd_variant_def.h similarity index 95% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56990_b0/bcm56990_b0_ltd_variant_def.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56990_b0/bcm56990_b0_ltd_variant_def.h index 188c5d075b3..f753a77001b 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56990_b0/bcm56990_b0_ltd_variant_def.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56990_b0/bcm56990_b0_ltd_variant_def.h @@ -7,8 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56996_a0/bcm56996_a0_ltd_variant_def.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56996_a0/bcm56996_a0_ltd_variant_def.h similarity index 95% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56996_a0/bcm56996_a0_ltd_variant_def.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56996_a0/bcm56996_a0_ltd_variant_def.h index 0ac95d26aa6..340ea533668 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56996_a0/bcm56996_a0_ltd_variant_def.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56996_a0/bcm56996_a0_ltd_variant_def.h @@ -7,8 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56996_b0/bcm56996_b0_ltd_variant_def.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56996_b0/bcm56996_b0_ltd_variant_def.h similarity index 95% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56996_b0/bcm56996_b0_ltd_variant_def.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56996_b0/bcm56996_b0_ltd_variant_def.h index 0a400876d49..c7d11581444 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56996_b0/bcm56996_b0_ltd_variant_def.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56996_b0/bcm56996_b0_ltd_variant_def.h @@ -7,8 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56998_a0/bcm56998_a0_ltd_variant_def.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56998_a0/bcm56998_a0_ltd_variant_def.h similarity index 95% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56998_a0/bcm56998_a0_ltd_variant_def.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56998_a0/bcm56998_a0_ltd_variant_def.h index f47a128adda..d193bf95ab9 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56998_a0/bcm56998_a0_ltd_variant_def.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56998_a0/bcm56998_a0_ltd_variant_def.h @@ -7,8 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56999_a0/bcm56999_a0_ltd_variant_def.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56999_a0/bcm56999_a0_ltd_variant_def.h similarity index 95% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56999_a0/bcm56999_a0_ltd_variant_def.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56999_a0/bcm56999_a0_ltd_variant_def.h index 1fb100bc0b9..f89ecfad9f2 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56999_a0/bcm56999_a0_ltd_variant_def.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56999_a0/bcm56999_a0_ltd_variant_def.h @@ -7,8 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78800_a0/bcm78800_a0_ltd_variant_def.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78800_a0/bcm78800_a0_ltd_variant_def.h similarity index 95% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78800_a0/bcm78800_a0_ltd_variant_def.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78800_a0/bcm78800_a0_ltd_variant_def.h index a4b70c45aef..ad0e9daf7db 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78800_a0/bcm78800_a0_ltd_variant_def.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78800_a0/bcm78800_a0_ltd_variant_def.h @@ -7,8 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78800_a0/cna_6_5_32_3_0/bcm78800_a0_cna_6_5_32_3_0_ltd_variant_def.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78800_a0/cna_6_5_32_3_0/bcm78800_a0_cna_6_5_32_3_0_ltd_variant_def.h new file mode 100644 index 00000000000..93572c80ea0 --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78800_a0/cna_6_5_32_3_0/bcm78800_a0_cna_6_5_32_3_0_ltd_variant_def.h @@ -0,0 +1,37 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM78800_A0_CNA_6_5_32_3_0_LTD_VARIANT_DEF_H +#define GEN_BCM78800_A0_CNA_6_5_32_3_0_LTD_VARIANT_DEF_H + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#define BCMLTD_VARIANT_BCM78800_A0_CNA_6_5_32_3_0 25 +#define BCMLTD_VARIANT_LOCAL_BCM78800_A0_CNA_6_5_32_3_0 1 +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + +#endif /* GEN_BCM78800_A0_CNA_6_5_32_3_0_LTD_VARIANT_DEF_H */ + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_ltd_variant_def.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_ltd_variant_def.h similarity index 92% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_ltd_variant_def.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_ltd_variant_def.h index 277c2d49558..3518d18d113 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_ltd_variant_def.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_ltd_variant_def.h @@ -7,8 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -30,7 +29,7 @@ #ifndef DOXYGEN_IGNORE_AUTOGEN -#define BCMLTD_VARIANT_BCM78800_A0_DNA_6_5_32_3_0 31 +#define BCMLTD_VARIANT_BCM78800_A0_DNA_6_5_32_3_0 26 #define BCMLTD_VARIANT_LOCAL_BCM78800_A0_DNA_6_5_32_3_0 2 #endif /* DOXYGEN_IGNORE_AUTOGEN */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78900_b0/bcm78900_b0_ltd_variant_def.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78900_b0/bcm78900_b0_ltd_variant_def.h similarity index 95% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78900_b0/bcm78900_b0_ltd_variant_def.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78900_b0/bcm78900_b0_ltd_variant_def.h index 09ba1e2ce7b..92d633da92c 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78900_b0/bcm78900_b0_ltd_variant_def.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78900_b0/bcm78900_b0_ltd_variant_def.h @@ -7,8 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78905_a0/bcm78905_a0_ltd_variant_def.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78905_a0/bcm78905_a0_ltd_variant_def.h similarity index 95% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78905_a0/bcm78905_a0_ltd_variant_def.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78905_a0/bcm78905_a0_ltd_variant_def.h index 310d1958aa1..b4a083cca9a 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78905_a0/bcm78905_a0_ltd_variant_def.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78905_a0/bcm78905_a0_ltd_variant_def.h @@ -7,8 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78907_a0/bcm78907_a0_ltd_variant_def.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78907_a0/bcm78907_a0_ltd_variant_def.h similarity index 95% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78907_a0/bcm78907_a0_ltd_variant_def.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78907_a0/bcm78907_a0_ltd_variant_def.h index 237930a5164..98d49494a1e 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78907_a0/bcm78907_a0_ltd_variant_def.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78907_a0/bcm78907_a0_ltd_variant_def.h @@ -7,8 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56080_a0/bcm56080_a0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56080_a0/bcm56080_a0_ltd_variant_entry.h similarity index 96% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56080_a0/bcm56080_a0_ltd_variant_entry.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56080_a0/bcm56080_a0_ltd_variant_entry.h index 26289914b8d..69f0454d203 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56080_a0/bcm56080_a0_ltd_variant_entry.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56080_a0/bcm56080_a0_ltd_variant_entry.h @@ -7,8 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56690_a0/bcm56690_a0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56690_a0/bcm56690_a0_ltd_variant_entry.h similarity index 96% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56690_a0/bcm56690_a0_ltd_variant_entry.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56690_a0/bcm56690_a0_ltd_variant_entry.h index 77795016727..e211e30cffa 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56690_a0/bcm56690_a0_ltd_variant_entry.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56690_a0/bcm56690_a0_ltd_variant_entry.h @@ -7,8 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_ltd_variant_entry.h similarity index 96% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_ltd_variant_entry.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_ltd_variant_entry.h index 37847ac8956..494c23e895c 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_ltd_variant_entry.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_ltd_variant_entry.h @@ -7,8 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/bcm56780_a0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/bcm56780_a0_ltd_variant_entry.h similarity index 96% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/bcm56780_a0_ltd_variant_entry.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/bcm56780_a0_ltd_variant_entry.h index cfeda12fa8b..3ef67ceabd3 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/bcm56780_a0_ltd_variant_entry.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/bcm56780_a0_ltd_variant_entry.h @@ -7,8 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/cna_6_5_32_3_0/bcm56780_a0_cna_6_5_32_3_0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/cna_6_5_32_3_0/bcm56780_a0_cna_6_5_32_3_0_ltd_variant_entry.h new file mode 100644 index 00000000000..a90516ffde1 --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/cna_6_5_32_3_0/bcm56780_a0_cna_6_5_32_3_0_ltd_variant_entry.h @@ -0,0 +1,40 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56780_A0_CNA_6_5_32_3_0_LTD_VARIANT_ENTRY_H +#define GEN_BCM56780_A0_CNA_6_5_32_3_0_LTD_VARIANT_ENTRY_H +#include +#endif /* GEN_BCM56780_A0_CNA_6_5_32_3_0_LTD_VARIANT_ENTRY_H */ + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_CNA_6_5_32_3_0 == 1 || defined(BCMLTD_VARIANT_OVERRIDE) +BCMLTD_VARIANT_ENTRY(bcm56780_a0,BCM56780_A0,cna_6_5_32_3_0,CNA_6_5_32_3_0,_,BCMLTD_VARIANT_BCM56780_A0_CNA_6_5_32_3_0,BCMLTD_VARIANT_LOCAL_BCM56780_A0_CNA_6_5_32_3_0,NULL,0,0) +#endif + +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_ltd_variant_entry.h similarity index 96% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_ltd_variant_entry.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_ltd_variant_entry.h index cad2a8b7619..ede67f27bbd 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_ltd_variant_entry.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_ltd_variant_entry.h @@ -7,8 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/hna_6_5_32_2_0/bcm56780_a0_hna_6_5_32_2_0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/hna_6_5_32_2_0/bcm56780_a0_hna_6_5_32_2_0_ltd_variant_entry.h new file mode 100644 index 00000000000..411f25c588c --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/hna_6_5_32_2_0/bcm56780_a0_hna_6_5_32_2_0_ltd_variant_entry.h @@ -0,0 +1,40 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56780_A0_HNA_6_5_32_2_0_LTD_VARIANT_ENTRY_H +#define GEN_BCM56780_A0_HNA_6_5_32_2_0_LTD_VARIANT_ENTRY_H +#include +#endif /* GEN_BCM56780_A0_HNA_6_5_32_2_0_LTD_VARIANT_ENTRY_H */ + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_HNA_6_5_32_2_0 == 1 || defined(BCMLTD_VARIANT_OVERRIDE) +BCMLTD_VARIANT_ENTRY(bcm56780_a0,BCM56780_A0,hna_6_5_32_2_0,HNA_6_5_32_2_0,_,BCMLTD_VARIANT_BCM56780_A0_HNA_6_5_32_2_0,BCMLTD_VARIANT_LOCAL_BCM56780_A0_HNA_6_5_32_2_0,NULL,0,0) +#endif + +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/bcm56880_a0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/bcm56880_a0_ltd_variant_entry.h similarity index 96% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/bcm56880_a0_ltd_variant_entry.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/bcm56880_a0_ltd_variant_entry.h index f980207283a..9c925f030db 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/bcm56880_a0_ltd_variant_entry.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/bcm56880_a0_ltd_variant_entry.h @@ -7,8 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_ltd_variant_entry.h similarity index 96% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_ltd_variant_entry.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_ltd_variant_entry.h index 52f46e75786..feadd4e888d 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_ltd_variant_entry.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_ltd_variant_entry.h @@ -7,8 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/hna_6_5_32_2_0/bcm56880_a0_hna_6_5_32_2_0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/hna_6_5_32_2_0/bcm56880_a0_hna_6_5_32_2_0_ltd_variant_entry.h new file mode 100644 index 00000000000..9dc25470c03 --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/hna_6_5_32_2_0/bcm56880_a0_hna_6_5_32_2_0_ltd_variant_entry.h @@ -0,0 +1,40 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56880_A0_HNA_6_5_32_2_0_LTD_VARIANT_ENTRY_H +#define GEN_BCM56880_A0_HNA_6_5_32_2_0_LTD_VARIANT_ENTRY_H +#include +#endif /* GEN_BCM56880_A0_HNA_6_5_32_2_0_LTD_VARIANT_ENTRY_H */ + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_HNA_6_5_32_2_0 == 1 || defined(BCMLTD_VARIANT_OVERRIDE) +BCMLTD_VARIANT_ENTRY(bcm56880_a0,BCM56880_A0,hna_6_5_32_2_0,HNA_6_5_32_2_0,_,BCMLTD_VARIANT_BCM56880_A0_HNA_6_5_32_2_0,BCMLTD_VARIANT_LOCAL_BCM56880_A0_HNA_6_5_32_2_0,NULL,0,0) +#endif + +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + + diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/nfa_6_5_32_1_0/bcm56880_a0_nfa_6_5_32_1_0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/nfa_6_5_32_1_0/bcm56880_a0_nfa_6_5_32_1_0_ltd_variant_entry.h new file mode 100644 index 00000000000..acabbaf5a55 --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/nfa_6_5_32_1_0/bcm56880_a0_nfa_6_5_32_1_0_ltd_variant_entry.h @@ -0,0 +1,40 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56880_A0_NFA_6_5_32_1_0_LTD_VARIANT_ENTRY_H +#define GEN_BCM56880_A0_NFA_6_5_32_1_0_LTD_VARIANT_ENTRY_H +#include +#endif /* GEN_BCM56880_A0_NFA_6_5_32_1_0_LTD_VARIANT_ENTRY_H */ + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_NFA_6_5_32_1_0 == 1 || defined(BCMLTD_VARIANT_OVERRIDE) +BCMLTD_VARIANT_ENTRY(bcm56880_a0,BCM56880_A0,nfa_6_5_32_1_0,NFA_6_5_32_1_0,_,BCMLTD_VARIANT_BCM56880_A0_NFA_6_5_32_1_0,BCMLTD_VARIANT_LOCAL_BCM56880_A0_NFA_6_5_32_1_0,NULL,0,0) +#endif + +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/bcm56890_a0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/bcm56890_a0_ltd_variant_entry.h similarity index 96% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/bcm56890_a0_ltd_variant_entry.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/bcm56890_a0_ltd_variant_entry.h index 0337e096a1d..a53f9713a7f 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/bcm56890_a0_ltd_variant_entry.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/bcm56890_a0_ltd_variant_entry.h @@ -7,8 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/cna_6_5_32_3_0/bcm56890_a0_cna_6_5_32_3_0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/cna_6_5_32_3_0/bcm56890_a0_cna_6_5_32_3_0_ltd_variant_entry.h new file mode 100644 index 00000000000..61a0c9af8e9 --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/cna_6_5_32_3_0/bcm56890_a0_cna_6_5_32_3_0_ltd_variant_entry.h @@ -0,0 +1,40 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56890_A0_CNA_6_5_32_3_0_LTD_VARIANT_ENTRY_H +#define GEN_BCM56890_A0_CNA_6_5_32_3_0_LTD_VARIANT_ENTRY_H +#include +#endif /* GEN_BCM56890_A0_CNA_6_5_32_3_0_LTD_VARIANT_ENTRY_H */ + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#if BCMLTD_CONFIG_INCLUDE_BCM56890_A0_CNA_6_5_32_3_0 == 1 || defined(BCMLTD_VARIANT_OVERRIDE) +BCMLTD_VARIANT_ENTRY(bcm56890_a0,BCM56890_A0,cna_6_5_32_3_0,CNA_6_5_32_3_0,_,BCMLTD_VARIANT_BCM56890_A0_CNA_6_5_32_3_0,BCMLTD_VARIANT_LOCAL_BCM56890_A0_CNA_6_5_32_3_0,NULL,0,0) +#endif + +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + + diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/dna_6_5_32_4_0/bcm56890_a0_dna_6_5_32_4_0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/dna_6_5_32_4_0/bcm56890_a0_dna_6_5_32_4_0_ltd_variant_entry.h new file mode 100644 index 00000000000..6e2bac0eaf3 --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/dna_6_5_32_4_0/bcm56890_a0_dna_6_5_32_4_0_ltd_variant_entry.h @@ -0,0 +1,40 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM56890_A0_DNA_6_5_32_4_0_LTD_VARIANT_ENTRY_H +#define GEN_BCM56890_A0_DNA_6_5_32_4_0_LTD_VARIANT_ENTRY_H +#include +#endif /* GEN_BCM56890_A0_DNA_6_5_32_4_0_LTD_VARIANT_ENTRY_H */ + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#if BCMLTD_CONFIG_INCLUDE_BCM56890_A0_DNA_6_5_32_4_0 == 1 || defined(BCMLTD_VARIANT_OVERRIDE) +BCMLTD_VARIANT_ENTRY(bcm56890_a0,BCM56890_A0,dna_6_5_32_4_0,DNA_6_5_32_4_0,_,BCMLTD_VARIANT_BCM56890_A0_DNA_6_5_32_4_0,BCMLTD_VARIANT_LOCAL_BCM56890_A0_DNA_6_5_32_4_0,NULL,0,0) +#endif + +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56990_a0/bcm56990_a0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56990_a0/bcm56990_a0_ltd_variant_entry.h similarity index 96% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56990_a0/bcm56990_a0_ltd_variant_entry.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56990_a0/bcm56990_a0_ltd_variant_entry.h index d94ee388220..a77734200c7 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56990_a0/bcm56990_a0_ltd_variant_entry.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56990_a0/bcm56990_a0_ltd_variant_entry.h @@ -7,8 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56990_b0/bcm56990_b0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56990_b0/bcm56990_b0_ltd_variant_entry.h similarity index 96% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56990_b0/bcm56990_b0_ltd_variant_entry.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56990_b0/bcm56990_b0_ltd_variant_entry.h index 26d67347b05..e52261cf99a 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56990_b0/bcm56990_b0_ltd_variant_entry.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56990_b0/bcm56990_b0_ltd_variant_entry.h @@ -7,8 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56996_a0/bcm56996_a0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56996_a0/bcm56996_a0_ltd_variant_entry.h similarity index 96% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56996_a0/bcm56996_a0_ltd_variant_entry.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56996_a0/bcm56996_a0_ltd_variant_entry.h index d855187c812..cab8c914fd1 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56996_a0/bcm56996_a0_ltd_variant_entry.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56996_a0/bcm56996_a0_ltd_variant_entry.h @@ -7,8 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56996_b0/bcm56996_b0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56996_b0/bcm56996_b0_ltd_variant_entry.h similarity index 96% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56996_b0/bcm56996_b0_ltd_variant_entry.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56996_b0/bcm56996_b0_ltd_variant_entry.h index a367ba28998..9a1d414f7ac 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56996_b0/bcm56996_b0_ltd_variant_entry.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56996_b0/bcm56996_b0_ltd_variant_entry.h @@ -7,8 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56998_a0/bcm56998_a0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56998_a0/bcm56998_a0_ltd_variant_entry.h similarity index 96% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56998_a0/bcm56998_a0_ltd_variant_entry.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56998_a0/bcm56998_a0_ltd_variant_entry.h index 0bd08644244..1b5eeeaec89 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56998_a0/bcm56998_a0_ltd_variant_entry.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56998_a0/bcm56998_a0_ltd_variant_entry.h @@ -7,8 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56999_a0/bcm56999_a0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56999_a0/bcm56999_a0_ltd_variant_entry.h similarity index 96% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56999_a0/bcm56999_a0_ltd_variant_entry.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56999_a0/bcm56999_a0_ltd_variant_entry.h index 3832b90094f..17d0d78c7ca 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56999_a0/bcm56999_a0_ltd_variant_entry.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56999_a0/bcm56999_a0_ltd_variant_entry.h @@ -7,8 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78800_a0/bcm78800_a0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78800_a0/bcm78800_a0_ltd_variant_entry.h similarity index 96% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78800_a0/bcm78800_a0_ltd_variant_entry.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78800_a0/bcm78800_a0_ltd_variant_entry.h index 8b2f4f94dd2..1a28b94db35 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78800_a0/bcm78800_a0_ltd_variant_entry.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78800_a0/bcm78800_a0_ltd_variant_entry.h @@ -7,8 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78800_a0/cna_6_5_32_3_0/bcm78800_a0_cna_6_5_32_3_0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78800_a0/cna_6_5_32_3_0/bcm78800_a0_cna_6_5_32_3_0_ltd_variant_entry.h new file mode 100644 index 00000000000..ce4ce5ec99f --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78800_a0/cna_6_5_32_3_0/bcm78800_a0_cna_6_5_32_3_0_ltd_variant_entry.h @@ -0,0 +1,40 @@ +/******************************************************************************* + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by fltg from Logical Table mapping files. + * + * Tool: $SDK/tools/fltg/bin/fltg + * + * Edits to this file will be lost when it is regenerated. + * + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * + ******************************************************************************/ + +#ifndef GEN_BCM78800_A0_CNA_6_5_32_3_0_LTD_VARIANT_ENTRY_H +#define GEN_BCM78800_A0_CNA_6_5_32_3_0_LTD_VARIANT_ENTRY_H +#include +#endif /* GEN_BCM78800_A0_CNA_6_5_32_3_0_LTD_VARIANT_ENTRY_H */ + +#ifndef DOXYGEN_IGNORE_AUTOGEN + +#if BCMLTD_CONFIG_INCLUDE_BCM78800_A0_CNA_6_5_32_3_0 == 1 || defined(BCMLTD_VARIANT_OVERRIDE) +BCMLTD_VARIANT_ENTRY(bcm78800_a0,BCM78800_A0,cna_6_5_32_3_0,CNA_6_5_32_3_0,_,BCMLTD_VARIANT_BCM78800_A0_CNA_6_5_32_3_0,BCMLTD_VARIANT_LOCAL_BCM78800_A0_CNA_6_5_32_3_0,NULL,0,0) +#endif + +#endif /* DOXYGEN_IGNORE_AUTOGEN */ + + diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_ltd_variant_entry.h similarity index 96% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_ltd_variant_entry.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_ltd_variant_entry.h index 7cb1ce929b6..68776fbb52a 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_ltd_variant_entry.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_ltd_variant_entry.h @@ -7,8 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78900_b0/bcm78900_b0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78900_b0/bcm78900_b0_ltd_variant_entry.h similarity index 96% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78900_b0/bcm78900_b0_ltd_variant_entry.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78900_b0/bcm78900_b0_ltd_variant_entry.h index 4c15b490608..d91efcb918c 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78900_b0/bcm78900_b0_ltd_variant_entry.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78900_b0/bcm78900_b0_ltd_variant_entry.h @@ -7,8 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78905_a0/bcm78905_a0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78905_a0/bcm78905_a0_ltd_variant_entry.h similarity index 96% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78905_a0/bcm78905_a0_ltd_variant_entry.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78905_a0/bcm78905_a0_ltd_variant_entry.h index 77b8affeb47..9ca67d38e32 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78905_a0/bcm78905_a0_ltd_variant_entry.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78905_a0/bcm78905_a0_ltd_variant_entry.h @@ -7,8 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78907_a0/bcm78907_a0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78907_a0/bcm78907_a0_ltd_variant_entry.h similarity index 96% rename from platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78907_a0/bcm78907_a0_ltd_variant_entry.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78907_a0/bcm78907_a0_ltd_variant_entry.h index 6f53f99d808..bf9b4969402 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78907_a0/bcm78907_a0_ltd_variant_entry.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78907_a0/bcm78907_a0_ltd_variant_entry.h @@ -7,8 +7,7 @@ * * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56080_a0/bcm56080_a0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56080_a0/bcm56080_a0_pkt_lbhdr.c similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56080_a0/bcm56080_a0_pkt_lbhdr.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56080_a0/bcm56080_a0_pkt_lbhdr.c index c374b586186..74e2543c89c 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56080_a0/bcm56080_a0_pkt_lbhdr.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56080_a0/bcm56080_a0_pkt_lbhdr.c @@ -5,8 +5,7 @@ * Edits to this file will be lost when it is regenerated. * Tool: INTERNAL/regs/xgs/generate-pmd.pl * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56080_a0/bcm56080_a0_pkt_rxpmd.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56080_a0/bcm56080_a0_pkt_rxpmd.c similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56080_a0/bcm56080_a0_pkt_rxpmd.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56080_a0/bcm56080_a0_pkt_rxpmd.c index 567250ed568..7a41a9f17c4 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56080_a0/bcm56080_a0_pkt_rxpmd.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56080_a0/bcm56080_a0_pkt_rxpmd.c @@ -5,8 +5,7 @@ * Edits to this file will be lost when it is regenerated. * Tool: INTERNAL/regs/xgs/generate-pmd.pl * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -1018,8 +1017,6 @@ const bcmpkt_rxpmd_fget_t bcm56080_a0_rxpmd_fget = { NULL, NULL, NULL, - NULL, - NULL, NULL } }; @@ -1125,8 +1122,6 @@ const bcmpkt_rxpmd_fset_t bcm56080_a0_rxpmd_fset = { NULL, NULL, NULL, - NULL, - NULL, NULL } }; @@ -1153,7 +1148,7 @@ static int bcm56080_a0_rxpmd_view_infos[BCMPKT_RXPMD_FID_COUNT] = { -1, -1, -1, -1, -1, -1, -1, -2, -1, -1, -1, -2, -2, -2, -2, -2, -2, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -2, -2, -2, -1, -1, -1, -1, -2, -2, -2, -2, -2, -2, -1, -2, -2, -2, -2, -2, - -2, -2, -2, -2, -2, + -2, -2, -2, }; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56080_a0/bcm56080_a0_pkt_txpmd.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56080_a0/bcm56080_a0_pkt_txpmd.c similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56080_a0/bcm56080_a0_pkt_txpmd.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56080_a0/bcm56080_a0_pkt_txpmd.c index 4b1a3e57d91..c5afc525b72 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56080_a0/bcm56080_a0_pkt_txpmd.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56080_a0/bcm56080_a0_pkt_txpmd.c @@ -5,8 +5,7 @@ * Edits to this file will be lost when it is regenerated. * Tool: INTERNAL/regs/xgs/generate-pmd.pl * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -1237,7 +1236,6 @@ const bcmpkt_txpmd_fget_t bcm56080_a0_txpmd_fget = { NULL, NULL, NULL, - NULL, NULL } }; @@ -1373,7 +1371,6 @@ const bcmpkt_txpmd_fset_t bcm56080_a0_txpmd_fset = { NULL, NULL, NULL, - NULL, NULL } }; @@ -1402,7 +1399,7 @@ static int bcm56080_a0_txpmd_view_infos[BCMPKT_TXPMD_FID_COUNT] = { -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, - -2, -2, + -2, }; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56080_a0/bcm56080_a0_pmd_field.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56080_a0/bcm56080_a0_pmd_field.c similarity index 77% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56080_a0/bcm56080_a0_pmd_field.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56080_a0/bcm56080_a0_pmd_field.c index cc38e1e4dfb..8d3fd4beaaa 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56080_a0/bcm56080_a0_pmd_field.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56080_a0/bcm56080_a0_pmd_field.c @@ -5,8 +5,7 @@ * Edits to this file will be lost when it is regenerated. * Tool: INTERNAL/regs/xgs/generate-pmd.pl * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -3280,52 +3279,52 @@ static const shr_enum_map_t bcm56080_a0_rxpmd_timestamp_type_names[] = }; static bcmpkt_pmd_field_t bcm56080_a0_rxpmd_fields[BCM56080_A0_RXPMD_COUNT] = { - {"ING_L3_INTF",1, field_fmt_0_12_12_12_info, field_fmt_0_12_12_12_set, field_fmt_0_12_12_12_get, NULL, 0}, - {"I2E_CLASSID",1, field_fmt_0_11_12_12_info, field_fmt_0_11_12_12_set, field_fmt_0_11_12_12_get, NULL, 0}, - {"RX_BFD_SESSION_INDEX",1, field_fmt_0_11_12_12_info, field_fmt_0_11_12_12_set, field_fmt_0_11_12_12_get, NULL, 0}, - {"I2E_CLASSID_TYPE",1, field_fmt_12_15_12_12_info, field_fmt_12_15_12_12_set, field_fmt_12_15_12_12_get, NULL, 0}, - {"RX_BFD_START_OFFSET_TYPE",1, field_fmt_12_13_12_12_info, field_fmt_12_13_12_12_set, field_fmt_12_13_12_12_get, NULL, 0}, - {"RX_BFD_START_OFFSET",1, field_fmt_14_21_12_12_info, field_fmt_14_21_12_12_set, field_fmt_14_21_12_12_get, NULL, 0}, - {"ING_L3_INTF_VALID",1, field_fmt_16_16_12_12_info, field_fmt_16_16_12_12_set, field_fmt_16_16_12_12_get, NULL, 0}, - {"CPU_COS",1, field_fmt_22_27_12_12_info, field_fmt_22_27_12_12_set, field_fmt_22_27_12_12_get, NULL, 0}, - {"QUEUE_NUM",1, field_fmt_22_27_12_12_info, field_fmt_22_27_12_12_set, field_fmt_22_27_12_12_get, NULL, 0}, - {"BPDU",1, field_fmt_28_28_12_12_info, field_fmt_28_28_12_12_set, field_fmt_28_28_12_12_get, NULL, 0}, - {"CHANGE_DSCP",1, field_fmt_29_29_12_12_info, field_fmt_29_29_12_12_set, field_fmt_29_29_12_12_get, NULL, 0}, - {"CHANGE_ECN",1, field_fmt_30_30_12_12_info, field_fmt_30_30_12_12_set, field_fmt_30_30_12_12_get, NULL, 0}, - {"DO_NOT_CHANGE_TTL",1, field_fmt_31_31_12_12_info, field_fmt_31_31_12_12_set, field_fmt_31_31_12_12_get, NULL, 0}, - {"REASON",2, field_fmt_32_95_11_10_info, field_fmt_32_95_11_10_set, field_fmt_32_95_11_10_get, NULL, 0}, - {"REASON_TYPE",1, field_fmt_96_99_9_9_info, field_fmt_96_99_9_9_set, field_fmt_96_99_9_9_get, NULL, 0}, - {"DSCP",1, field_fmt_100_105_9_9_info, field_fmt_100_105_9_9_set, field_fmt_100_105_9_9_get, NULL, 0}, - {"SPECIAL_PACKET_TYPE",1, field_fmt_100_102_9_9_info, field_fmt_100_102_9_9_set, field_fmt_100_102_9_9_get, NULL, 0}, - {"ECN",1, field_fmt_106_107_9_9_info, field_fmt_106_107_9_9_set, field_fmt_106_107_9_9_get, NULL, 0}, - {"INCOMING_TAG_STATUS",1, field_fmt_108_109_9_9_info, field_fmt_108_109_9_9_set, field_fmt_108_109_9_9_get, NULL, 0}, - {"O_NHI",1, field_fmt_110_121_9_9_info, field_fmt_110_121_9_9_set, field_fmt_110_121_9_9_get, NULL, 0}, - {"ING_OTAG_ACTION",1, field_fmt_122_123_9_9_info, field_fmt_122_123_9_9_set, field_fmt_122_123_9_9_get, NULL, 0}, - {"IEU",1, field_fmt_124_124_9_9_info, field_fmt_124_124_9_9_set, field_fmt_124_124_9_9_get, NULL, 0}, - {"IEU_VALID",1, field_fmt_125_125_9_9_info, field_fmt_125_125_9_9_set, field_fmt_125_125_9_9_get, NULL, 0}, - {"L3ONLY",1, field_fmt_126_126_9_9_info, field_fmt_126_126_9_9_set, field_fmt_126_126_9_9_get, NULL, 0}, - {"REGEN_CRC",1, field_fmt_127_127_9_9_info, field_fmt_127_127_9_9_set, field_fmt_127_127_9_9_get, NULL, 0}, - {"MATCHED_RULE",1, field_fmt_128_135_8_8_info, field_fmt_128_135_8_8_set, field_fmt_128_135_8_8_get, NULL, 0}, - {"MTP_INDEX",1, field_fmt_136_138_8_8_info, field_fmt_136_138_8_8_set, field_fmt_136_138_8_8_get, NULL, 0}, - {"OUTER_CFI",1, field_fmt_139_139_8_8_info, field_fmt_139_139_8_8_set, field_fmt_139_139_8_8_get, NULL, 0}, - {"OUTER_PRI",1, field_fmt_140_142_8_8_info, field_fmt_140_142_8_8_set, field_fmt_140_142_8_8_get, NULL, 0}, - {"OUTER_VID",1, field_fmt_143_154_8_8_info, field_fmt_143_154_8_8_set, field_fmt_143_154_8_8_get, NULL, 0}, - {"INCOMING_INT_HDR_TYPE",1, field_fmt_155_156_8_8_info, field_fmt_155_156_8_8_set, field_fmt_155_156_8_8_get, NULL, 0}, - {"IP_ROUTED",1, field_fmt_157_157_8_8_info, field_fmt_157_157_8_8_set, field_fmt_157_157_8_8_get, NULL, 0}, - {"SPECIAL_PACKET_INDICATOR",1, field_fmt_158_158_8_8_info, field_fmt_158_158_8_8_set, field_fmt_158_158_8_8_get, NULL, 0}, - {"SWITCH",1, field_fmt_159_159_8_8_info, field_fmt_159_159_8_8_set, field_fmt_159_159_8_8_get, NULL, 0}, - {"PKT_LENGTH",1, field_fmt_160_173_7_7_info, field_fmt_160_173_7_7_set, field_fmt_160_173_7_7_get, NULL, 0}, - {"REPLICATION_OR_NHOP_INDEX",1, field_fmt_174_185_7_7_info, field_fmt_174_185_7_7_set, field_fmt_174_185_7_7_get, NULL, 0}, - {"TUNNEL_DECAP_TYPE",1, field_fmt_186_190_7_7_info, field_fmt_186_190_7_7_set, field_fmt_186_190_7_7_get, NULL, 0}, - {"UC_SW_COPY_DROPPED",1, field_fmt_191_191_7_7_info, field_fmt_191_191_7_7_set, field_fmt_191_191_7_7_get, NULL, 0}, - {"ENTROPY_LABEL",1, field_fmt_192_211_6_6_info, field_fmt_192_211_6_6_set, field_fmt_192_211_6_6_get, NULL, 0}, - {"SRC_PORT_NUM",1, field_fmt_212_220_6_6_info, field_fmt_212_220_6_6_set, field_fmt_212_220_6_6_get, NULL, 0}, - {"UNICAST_QUEUE",1, field_fmt_221_221_6_6_info, field_fmt_221_221_6_6_set, field_fmt_221_221_6_6_get, NULL, 0}, - {"TIMESTAMP_TYPE",1, field_fmt_222_223_6_6_info, field_fmt_222_223_6_6_set, field_fmt_222_223_6_6_get, bcm56080_a0_rxpmd_timestamp_type_names, 0}, - {"TIMESTAMP",1, field_fmt_224_255_5_5_info, field_fmt_224_255_5_5_set, field_fmt_224_255_5_5_get, NULL, 0}, - {"TIMESTAMP_HI",1, field_fmt_256_287_4_4_info, field_fmt_256_287_4_4_set, field_fmt_256_287_4_4_get, NULL, 0}, - {"VRF",1, field_fmt_256_261_4_4_info, field_fmt_256_261_4_4_set, field_fmt_256_261_4_4_get, NULL, 0}, - {"MODULE_HDR",4, field_fmt_288_415_3_0_info, field_fmt_288_415_3_0_set, field_fmt_288_415_3_0_get, NULL, 0}, + {1, field_fmt_0_12_12_12_info, field_fmt_0_12_12_12_set, field_fmt_0_12_12_12_get, NULL, 0}, + {1, field_fmt_0_11_12_12_info, field_fmt_0_11_12_12_set, field_fmt_0_11_12_12_get, NULL, 0}, + {1, field_fmt_0_11_12_12_info, field_fmt_0_11_12_12_set, field_fmt_0_11_12_12_get, NULL, 0}, + {1, field_fmt_12_15_12_12_info, field_fmt_12_15_12_12_set, field_fmt_12_15_12_12_get, NULL, 0}, + {1, field_fmt_12_13_12_12_info, field_fmt_12_13_12_12_set, field_fmt_12_13_12_12_get, NULL, 0}, + {1, field_fmt_14_21_12_12_info, field_fmt_14_21_12_12_set, field_fmt_14_21_12_12_get, NULL, 0}, + {1, field_fmt_16_16_12_12_info, field_fmt_16_16_12_12_set, field_fmt_16_16_12_12_get, NULL, 0}, + {1, field_fmt_22_27_12_12_info, field_fmt_22_27_12_12_set, field_fmt_22_27_12_12_get, NULL, 0}, + {1, field_fmt_22_27_12_12_info, field_fmt_22_27_12_12_set, field_fmt_22_27_12_12_get, NULL, 0}, + {1, field_fmt_28_28_12_12_info, field_fmt_28_28_12_12_set, field_fmt_28_28_12_12_get, NULL, 0}, + {1, field_fmt_29_29_12_12_info, field_fmt_29_29_12_12_set, field_fmt_29_29_12_12_get, NULL, 0}, + {1, field_fmt_30_30_12_12_info, field_fmt_30_30_12_12_set, field_fmt_30_30_12_12_get, NULL, 0}, + {1, field_fmt_31_31_12_12_info, field_fmt_31_31_12_12_set, field_fmt_31_31_12_12_get, NULL, 0}, + {2, field_fmt_32_95_11_10_info, field_fmt_32_95_11_10_set, field_fmt_32_95_11_10_get, NULL, 0}, + {1, field_fmt_96_99_9_9_info, field_fmt_96_99_9_9_set, field_fmt_96_99_9_9_get, NULL, 0}, + {1, field_fmt_100_105_9_9_info, field_fmt_100_105_9_9_set, field_fmt_100_105_9_9_get, NULL, 0}, + {1, field_fmt_100_102_9_9_info, field_fmt_100_102_9_9_set, field_fmt_100_102_9_9_get, NULL, 0}, + {1, field_fmt_106_107_9_9_info, field_fmt_106_107_9_9_set, field_fmt_106_107_9_9_get, NULL, 0}, + {1, field_fmt_108_109_9_9_info, field_fmt_108_109_9_9_set, field_fmt_108_109_9_9_get, NULL, 0}, + {1, field_fmt_110_121_9_9_info, field_fmt_110_121_9_9_set, field_fmt_110_121_9_9_get, NULL, 0}, + {1, field_fmt_122_123_9_9_info, field_fmt_122_123_9_9_set, field_fmt_122_123_9_9_get, NULL, 0}, + {1, field_fmt_124_124_9_9_info, field_fmt_124_124_9_9_set, field_fmt_124_124_9_9_get, NULL, 0}, + {1, field_fmt_125_125_9_9_info, field_fmt_125_125_9_9_set, field_fmt_125_125_9_9_get, NULL, 0}, + {1, field_fmt_126_126_9_9_info, field_fmt_126_126_9_9_set, field_fmt_126_126_9_9_get, NULL, 0}, + {1, field_fmt_127_127_9_9_info, field_fmt_127_127_9_9_set, field_fmt_127_127_9_9_get, NULL, 0}, + {1, field_fmt_128_135_8_8_info, field_fmt_128_135_8_8_set, field_fmt_128_135_8_8_get, NULL, 0}, + {1, field_fmt_136_138_8_8_info, field_fmt_136_138_8_8_set, field_fmt_136_138_8_8_get, NULL, 0}, + {1, field_fmt_139_139_8_8_info, field_fmt_139_139_8_8_set, field_fmt_139_139_8_8_get, NULL, 0}, + {1, field_fmt_140_142_8_8_info, field_fmt_140_142_8_8_set, field_fmt_140_142_8_8_get, NULL, 0}, + {1, field_fmt_143_154_8_8_info, field_fmt_143_154_8_8_set, field_fmt_143_154_8_8_get, NULL, 0}, + {1, field_fmt_155_156_8_8_info, field_fmt_155_156_8_8_set, field_fmt_155_156_8_8_get, NULL, 0}, + {1, field_fmt_157_157_8_8_info, field_fmt_157_157_8_8_set, field_fmt_157_157_8_8_get, NULL, 0}, + {1, field_fmt_158_158_8_8_info, field_fmt_158_158_8_8_set, field_fmt_158_158_8_8_get, NULL, 0}, + {1, field_fmt_159_159_8_8_info, field_fmt_159_159_8_8_set, field_fmt_159_159_8_8_get, NULL, 0}, + {1, field_fmt_160_173_7_7_info, field_fmt_160_173_7_7_set, field_fmt_160_173_7_7_get, NULL, 0}, + {1, field_fmt_174_185_7_7_info, field_fmt_174_185_7_7_set, field_fmt_174_185_7_7_get, NULL, 0}, + {1, field_fmt_186_190_7_7_info, field_fmt_186_190_7_7_set, field_fmt_186_190_7_7_get, NULL, 0}, + {1, field_fmt_191_191_7_7_info, field_fmt_191_191_7_7_set, field_fmt_191_191_7_7_get, NULL, 0}, + {1, field_fmt_192_211_6_6_info, field_fmt_192_211_6_6_set, field_fmt_192_211_6_6_get, NULL, 0}, + {1, field_fmt_212_220_6_6_info, field_fmt_212_220_6_6_set, field_fmt_212_220_6_6_get, NULL, 0}, + {1, field_fmt_221_221_6_6_info, field_fmt_221_221_6_6_set, field_fmt_221_221_6_6_get, NULL, 0}, + {1, field_fmt_222_223_6_6_info, field_fmt_222_223_6_6_set, field_fmt_222_223_6_6_get, bcm56080_a0_rxpmd_timestamp_type_names, 0}, + {1, field_fmt_224_255_5_5_info, field_fmt_224_255_5_5_set, field_fmt_224_255_5_5_get, NULL, 0}, + {1, field_fmt_256_287_4_4_info, field_fmt_256_287_4_4_set, field_fmt_256_287_4_4_get, NULL, 0}, + {1, field_fmt_256_261_4_4_info, field_fmt_256_261_4_4_set, field_fmt_256_261_4_4_get, NULL, 0}, + {4, field_fmt_288_415_3_0_info, field_fmt_288_415_3_0_set, field_fmt_288_415_3_0_get, NULL, 0}, }; @@ -3356,49 +3355,49 @@ static const shr_enum_map_t bcm56080_a0_rx_reason_oam_processing_names[] = }; static bcmpkt_pmd_field_t bcm56080_a0_rx_reason_fields[BCM56080_A0_RX_REASON_COUNT] = { - {"CPU_UVLAN",1, field_fmt_32_32_11_11_info, field_fmt_32_32_11_11_set, field_fmt_32_32_11_11_get, NULL, 0}, - {"CPU_SLF",1, field_fmt_33_33_11_11_info, field_fmt_33_33_11_11_set, field_fmt_33_33_11_11_get, NULL, 0}, - {"CPU_DLF",1, field_fmt_34_34_11_11_info, field_fmt_34_34_11_11_set, field_fmt_34_34_11_11_get, NULL, 0}, - {"CPU_L2MOVE",1, field_fmt_35_35_11_11_info, field_fmt_35_35_11_11_set, field_fmt_35_35_11_11_get, NULL, 0}, - {"CPU_L2CPU",1, field_fmt_36_36_11_11_info, field_fmt_36_36_11_11_set, field_fmt_36_36_11_11_get, NULL, 0}, - {"CPU_L3SRC_MISS",1, field_fmt_37_37_11_11_info, field_fmt_37_37_11_11_set, field_fmt_37_37_11_11_get, NULL, 0}, - {"CPU_L3DST_MISS",1, field_fmt_38_38_11_11_info, field_fmt_38_38_11_11_set, field_fmt_38_38_11_11_get, NULL, 0}, - {"CPU_L3SRC_MOVE",1, field_fmt_39_39_11_11_info, field_fmt_39_39_11_11_set, field_fmt_39_39_11_11_get, NULL, 0}, - {"CPU_MC_MISS",1, field_fmt_40_40_11_11_info, field_fmt_40_40_11_11_set, field_fmt_40_40_11_11_get, NULL, 0}, - {"CPU_IPMC_MISS",1, field_fmt_41_41_11_11_info, field_fmt_41_41_11_11_set, field_fmt_41_41_11_11_get, NULL, 0}, - {"CPU_FFP",1, field_fmt_42_42_11_11_info, field_fmt_42_42_11_11_set, field_fmt_42_42_11_11_get, NULL, 0}, - {"CPU_L3HDR_ERR",1, field_fmt_43_43_11_11_info, field_fmt_43_43_11_11_set, field_fmt_43_43_11_11_get, NULL, 0}, - {"CPU_PROTOCOL_PKT",1, field_fmt_44_44_11_11_info, field_fmt_44_44_11_11_set, field_fmt_44_44_11_11_get, NULL, 0}, - {"CPU_DOS_ATTACK",1, field_fmt_45_45_11_11_info, field_fmt_45_45_11_11_set, field_fmt_45_45_11_11_get, NULL, 0}, - {"CPU_MARTIAN_ADDR",1, field_fmt_46_46_11_11_info, field_fmt_46_46_11_11_set, field_fmt_46_46_11_11_get, NULL, 0}, - {"CPU_TUNNEL_ERR",1, field_fmt_47_47_11_11_info, field_fmt_47_47_11_11_set, field_fmt_47_47_11_11_get, NULL, 0}, - {"CPU_SFLOW",1, field_fmt_48_49_11_11_info, field_fmt_48_49_11_11_set, field_fmt_48_49_11_11_get, bcm56080_a0_rx_reason_cpu_sflow_names, 0}, - {"ICMP_REDIRECT",1, field_fmt_50_50_11_11_info, field_fmt_50_50_11_11_set, field_fmt_50_50_11_11_get, NULL, 0}, - {"L3_SLOWPATH",1, field_fmt_51_51_11_11_info, field_fmt_51_51_11_11_set, field_fmt_51_51_11_11_get, NULL, 0}, - {"PARITY_ERROR",1, field_fmt_52_52_11_11_info, field_fmt_52_52_11_11_set, field_fmt_52_52_11_11_get, NULL, 0}, - {"L3_MTU_CHECK_FAIL",1, field_fmt_53_53_11_11_info, field_fmt_53_53_11_11_set, field_fmt_53_53_11_11_get, NULL, 0}, - {"MCIDX_ERROR",1, field_fmt_54_54_11_11_info, field_fmt_54_54_11_11_set, field_fmt_54_54_11_11_get, NULL, 0}, - {"CPU_VFP",1, field_fmt_55_55_11_11_info, field_fmt_55_55_11_11_set, field_fmt_55_55_11_11_get, NULL, 0}, - {"MPLS_PROC_ERROR",1, field_fmt_56_58_11_11_info, field_fmt_56_58_11_11_set, field_fmt_56_58_11_11_get, bcm56080_a0_rx_reason_mpls_proc_error_names, 0}, - {"PBT_NONUC_PKT",1, field_fmt_59_59_11_11_info, field_fmt_59_59_11_11_set, field_fmt_59_59_11_11_get, NULL, 0}, - {"L3_NEXT_HOP",1, field_fmt_60_60_11_11_info, field_fmt_60_60_11_11_set, field_fmt_60_60_11_11_get, NULL, 0}, - {"MY_STATION",1, field_fmt_61_61_11_11_info, field_fmt_61_61_11_11_set, field_fmt_61_61_11_11_get, NULL, 0}, - {"TIME_SYNC",1, field_fmt_62_62_11_11_info, field_fmt_62_62_11_11_set, field_fmt_62_62_11_11_get, NULL, 0}, - {"TUNNEL_DECAP_ECN_ERROR",1, field_fmt_63_63_11_11_info, field_fmt_63_63_11_11_set, field_fmt_63_63_11_11_get, NULL, 0}, - {"BFD_SLOWPATH",1, field_fmt_64_64_10_10_info, field_fmt_64_64_10_10_set, field_fmt_64_64_10_10_get, NULL, 0}, - {"BFD_ERROR",1, field_fmt_65_65_10_10_info, field_fmt_65_65_10_10_set, field_fmt_65_65_10_10_get, NULL, 0}, - {"PACKET_TRACE_TO_CPU",1, field_fmt_66_66_10_10_info, field_fmt_66_66_10_10_set, field_fmt_66_66_10_10_get, NULL, 0}, - {"MPLS_UNKNOWN_CONTROL_PKT",1, field_fmt_67_67_10_10_info, field_fmt_67_67_10_10_set, field_fmt_67_67_10_10_get, NULL, 0}, - {"MPLS_ALERT_LABEL",1, field_fmt_68_68_10_10_info, field_fmt_68_68_10_10_set, field_fmt_68_68_10_10_get, NULL, 0}, - {"CPU_IPMC_INTERFACE_MISMATCH",1, field_fmt_69_69_10_10_info, field_fmt_69_69_10_10_set, field_fmt_69_69_10_10_get, NULL, 0}, - {"SRV6_ERROR",1, field_fmt_70_70_10_10_info, field_fmt_70_70_10_10_set, field_fmt_70_70_10_10_get, NULL, 0}, - {"VXLAN_VN_ID_MISS",1, field_fmt_71_71_10_10_info, field_fmt_71_71_10_10_set, field_fmt_71_71_10_10_get, NULL, 0}, - {"VXLAN_SIP_MISS",1, field_fmt_72_72_10_10_info, field_fmt_72_72_10_10_set, field_fmt_72_72_10_10_get, NULL, 0}, - {"ADAPT_MISS",1, field_fmt_73_73_10_10_info, field_fmt_73_73_10_10_set, field_fmt_73_73_10_10_get, NULL, 0}, - {"NH_PROTO_STATUS_DOWN",1, field_fmt_74_74_10_10_info, field_fmt_74_74_10_10_set, field_fmt_74_74_10_10_get, NULL, 0}, - {"OAM_PROCESSING",1, field_fmt_75_77_10_10_info, field_fmt_75_77_10_10_set, field_fmt_75_77_10_10_get, bcm56080_a0_rx_reason_oam_processing_names, 0}, - {"SUBPORT_ID_LOOKUP_MISS",1, field_fmt_78_78_10_10_info, field_fmt_78_78_10_10_set, field_fmt_78_78_10_10_get, NULL, 0}, - {"SVTAG_CPU_BIT_SET",1, field_fmt_79_79_10_10_info, field_fmt_79_79_10_10_set, field_fmt_79_79_10_10_get, NULL, 0}, + {1, field_fmt_32_32_11_11_info, field_fmt_32_32_11_11_set, field_fmt_32_32_11_11_get, NULL, 0}, + {1, field_fmt_33_33_11_11_info, field_fmt_33_33_11_11_set, field_fmt_33_33_11_11_get, NULL, 0}, + {1, field_fmt_34_34_11_11_info, field_fmt_34_34_11_11_set, field_fmt_34_34_11_11_get, NULL, 0}, + {1, field_fmt_35_35_11_11_info, field_fmt_35_35_11_11_set, field_fmt_35_35_11_11_get, NULL, 0}, + {1, field_fmt_36_36_11_11_info, field_fmt_36_36_11_11_set, field_fmt_36_36_11_11_get, NULL, 0}, + {1, field_fmt_37_37_11_11_info, field_fmt_37_37_11_11_set, field_fmt_37_37_11_11_get, NULL, 0}, + {1, field_fmt_38_38_11_11_info, field_fmt_38_38_11_11_set, field_fmt_38_38_11_11_get, NULL, 0}, + {1, field_fmt_39_39_11_11_info, field_fmt_39_39_11_11_set, field_fmt_39_39_11_11_get, NULL, 0}, + {1, field_fmt_40_40_11_11_info, field_fmt_40_40_11_11_set, field_fmt_40_40_11_11_get, NULL, 0}, + {1, field_fmt_41_41_11_11_info, field_fmt_41_41_11_11_set, field_fmt_41_41_11_11_get, NULL, 0}, + {1, field_fmt_42_42_11_11_info, field_fmt_42_42_11_11_set, field_fmt_42_42_11_11_get, NULL, 0}, + {1, field_fmt_43_43_11_11_info, field_fmt_43_43_11_11_set, field_fmt_43_43_11_11_get, NULL, 0}, + {1, field_fmt_44_44_11_11_info, field_fmt_44_44_11_11_set, field_fmt_44_44_11_11_get, NULL, 0}, + {1, field_fmt_45_45_11_11_info, field_fmt_45_45_11_11_set, field_fmt_45_45_11_11_get, NULL, 0}, + {1, field_fmt_46_46_11_11_info, field_fmt_46_46_11_11_set, field_fmt_46_46_11_11_get, NULL, 0}, + {1, field_fmt_47_47_11_11_info, field_fmt_47_47_11_11_set, field_fmt_47_47_11_11_get, NULL, 0}, + {1, field_fmt_48_49_11_11_info, field_fmt_48_49_11_11_set, field_fmt_48_49_11_11_get, bcm56080_a0_rx_reason_cpu_sflow_names, 0}, + {1, field_fmt_50_50_11_11_info, field_fmt_50_50_11_11_set, field_fmt_50_50_11_11_get, NULL, 0}, + {1, field_fmt_51_51_11_11_info, field_fmt_51_51_11_11_set, field_fmt_51_51_11_11_get, NULL, 0}, + {1, field_fmt_52_52_11_11_info, field_fmt_52_52_11_11_set, field_fmt_52_52_11_11_get, NULL, 0}, + {1, field_fmt_53_53_11_11_info, field_fmt_53_53_11_11_set, field_fmt_53_53_11_11_get, NULL, 0}, + {1, field_fmt_54_54_11_11_info, field_fmt_54_54_11_11_set, field_fmt_54_54_11_11_get, NULL, 0}, + {1, field_fmt_55_55_11_11_info, field_fmt_55_55_11_11_set, field_fmt_55_55_11_11_get, NULL, 0}, + {1, field_fmt_56_58_11_11_info, field_fmt_56_58_11_11_set, field_fmt_56_58_11_11_get, bcm56080_a0_rx_reason_mpls_proc_error_names, 0}, + {1, field_fmt_59_59_11_11_info, field_fmt_59_59_11_11_set, field_fmt_59_59_11_11_get, NULL, 0}, + {1, field_fmt_60_60_11_11_info, field_fmt_60_60_11_11_set, field_fmt_60_60_11_11_get, NULL, 0}, + {1, field_fmt_61_61_11_11_info, field_fmt_61_61_11_11_set, field_fmt_61_61_11_11_get, NULL, 0}, + {1, field_fmt_62_62_11_11_info, field_fmt_62_62_11_11_set, field_fmt_62_62_11_11_get, NULL, 0}, + {1, field_fmt_63_63_11_11_info, field_fmt_63_63_11_11_set, field_fmt_63_63_11_11_get, NULL, 0}, + {1, field_fmt_64_64_10_10_info, field_fmt_64_64_10_10_set, field_fmt_64_64_10_10_get, NULL, 0}, + {1, field_fmt_65_65_10_10_info, field_fmt_65_65_10_10_set, field_fmt_65_65_10_10_get, NULL, 0}, + {1, field_fmt_66_66_10_10_info, field_fmt_66_66_10_10_set, field_fmt_66_66_10_10_get, NULL, 0}, + {1, field_fmt_67_67_10_10_info, field_fmt_67_67_10_10_set, field_fmt_67_67_10_10_get, NULL, 0}, + {1, field_fmt_68_68_10_10_info, field_fmt_68_68_10_10_set, field_fmt_68_68_10_10_get, NULL, 0}, + {1, field_fmt_69_69_10_10_info, field_fmt_69_69_10_10_set, field_fmt_69_69_10_10_get, NULL, 0}, + {1, field_fmt_70_70_10_10_info, field_fmt_70_70_10_10_set, field_fmt_70_70_10_10_get, NULL, 0}, + {1, field_fmt_71_71_10_10_info, field_fmt_71_71_10_10_set, field_fmt_71_71_10_10_get, NULL, 0}, + {1, field_fmt_72_72_10_10_info, field_fmt_72_72_10_10_set, field_fmt_72_72_10_10_get, NULL, 0}, + {1, field_fmt_73_73_10_10_info, field_fmt_73_73_10_10_set, field_fmt_73_73_10_10_get, NULL, 0}, + {1, field_fmt_74_74_10_10_info, field_fmt_74_74_10_10_set, field_fmt_74_74_10_10_get, NULL, 0}, + {1, field_fmt_75_77_10_10_info, field_fmt_75_77_10_10_set, field_fmt_75_77_10_10_get, bcm56080_a0_rx_reason_oam_processing_names, 0}, + {1, field_fmt_78_78_10_10_info, field_fmt_78_78_10_10_set, field_fmt_78_78_10_10_get, NULL, 0}, + {1, field_fmt_79_79_10_10_info, field_fmt_79_79_10_10_set, field_fmt_79_79_10_10_get, NULL, 0}, }; @@ -3445,65 +3444,65 @@ static const shr_enum_map_t bcm56080_a0_txpmd_start_names[] = }; static bcmpkt_pmd_field_t bcm56080_a0_txpmd_fields[BCM56080_A0_TXPMD_COUNT] = { - {"CPU_TX::ECMP_MEMBER_ID",1, field_fmt_0_9_3_3_info, field_fmt_0_9_3_3_set, field_fmt_0_9_3_3_get, NULL, 2}, - {"CPU_TX::MCAST_LB_INDEX",1, field_fmt_0_6_3_3_info, field_fmt_0_6_3_3_set, field_fmt_0_6_3_3_get, NULL, 2}, - {"CPU_TX::DESTINATION",1, field_fmt_10_25_3_3_info, field_fmt_10_25_3_3_set, field_fmt_10_25_3_3_get, NULL, 2}, - {"CPU_TX::DESTINATION_TYPE",1, field_fmt_26_29_3_3_info, field_fmt_26_29_3_3_set, field_fmt_26_29_3_3_get, bcm56080_a0_txpmd_cpu_tx_destination_type_names, 2}, - {"CPU_TX::DP",1, field_fmt_30_31_3_3_info, field_fmt_30_31_3_3_set, field_fmt_30_31_3_3_get, NULL, 2}, - {"CPU_TX::INPUT_PRI",1, field_fmt_32_35_2_2_info, field_fmt_32_35_2_2_set, field_fmt_32_35_2_2_get, NULL, 2}, - {"CPU_TX::INT_CN",1, field_fmt_36_37_2_2_info, field_fmt_36_37_2_2_set, field_fmt_36_37_2_2_get, NULL, 2}, - {"CPU_TX::INT_PRI",1, field_fmt_38_41_2_2_info, field_fmt_38_41_2_2_set, field_fmt_38_41_2_2_get, NULL, 2}, - {"CPU_TX::MCAST_LB_INDEX_VLD",1, field_fmt_42_42_2_2_info, field_fmt_42_42_2_2_set, field_fmt_42_42_2_2_get, NULL, 2}, - {"CPU_TX::PKT_PROFILE",1, field_fmt_43_45_2_2_info, field_fmt_43_45_2_2_set, field_fmt_43_45_2_2_get, NULL, 2}, - {"CPU_TX::QOS_FIELDS_VLD",1, field_fmt_46_46_2_2_info, field_fmt_46_46_2_2_set, field_fmt_46_46_2_2_get, NULL, 2}, - {"CPU_TX::ROUTED_PKT",1, field_fmt_47_47_2_2_info, field_fmt_47_47_2_2_set, field_fmt_47_47_2_2_get, NULL, 2}, - {"CPU_TX::SOP",1, field_fmt_48_48_2_2_info, field_fmt_48_48_2_2_set, field_fmt_48_48_2_2_get, NULL, 2}, - {"CPU_TX::UNICAST",1, field_fmt_49_49_2_2_info, field_fmt_49_49_2_2_set, field_fmt_49_49_2_2_get, NULL, 2}, - {"CPU_TX::VRF",1, field_fmt_50_55_2_2_info, field_fmt_50_55_2_2_set, field_fmt_50_55_2_2_get, NULL, 2}, - {"CPU_TX::VRF_VALID",1, field_fmt_56_56_2_2_info, field_fmt_56_56_2_2_set, field_fmt_56_56_2_2_get, NULL, 2}, - {"CPU_TX::WCMP_SEL",1, field_fmt_57_57_2_2_info, field_fmt_57_57_2_2_set, field_fmt_57_57_2_2_get, NULL, 2}, - {"OAM_DOWNMEP_TX::CELL_ERROR",1, field_fmt_0_0_3_3_info, field_fmt_0_0_3_3_set, field_fmt_0_0_3_3_get, NULL, 12}, - {"OAM_DOWNMEP_TX::CELL_LENGTH",1, field_fmt_1_8_3_3_info, field_fmt_1_8_3_3_set, field_fmt_1_8_3_3_get, NULL, 12}, - {"OAM_DOWNMEP_TX::COS",1, field_fmt_9_14_3_3_info, field_fmt_9_14_3_3_set, field_fmt_9_14_3_3_get, NULL, 12}, - {"OAM_DOWNMEP_TX::DESTINATION",1, field_fmt_15_30_3_3_info, field_fmt_15_30_3_3_set, field_fmt_15_30_3_3_get, NULL, 12}, - {"OAM_DOWNMEP_TX::DESTINATION_TYPE",1, field_fmt_31_34_3_2_info, field_fmt_31_34_3_2_set, field_fmt_31_34_3_2_get, bcm56080_a0_txpmd_oam_downmep_tx_destination_type_names, 12}, - {"OAM_DOWNMEP_TX::EOP",1, field_fmt_35_35_2_2_info, field_fmt_35_35_2_2_set, field_fmt_35_35_2_2_get, NULL, 12}, - {"OAM_DOWNMEP_TX::INPUT_PRI",1, field_fmt_36_39_2_2_info, field_fmt_36_39_2_2_set, field_fmt_36_39_2_2_get, NULL, 12}, - {"OAM_DOWNMEP_TX::LM_COUNTER_ACTION",1, field_fmt_40_41_2_2_info, field_fmt_40_41_2_2_set, field_fmt_40_41_2_2_get, NULL, 12}, - {"OAM_DOWNMEP_TX::LM_COUNTER_ID",1, field_fmt_42_50_2_2_info, field_fmt_42_50_2_2_set, field_fmt_42_50_2_2_get, NULL, 12}, - {"OAM_DOWNMEP_TX::OAM_REPLACEMENT_OFFSET",1, field_fmt_51_56_2_2_info, field_fmt_51_56_2_2_set, field_fmt_51_56_2_2_get, NULL, 12}, - {"OAM_DOWNMEP_TX::PKT_LENGTH",1, field_fmt_57_70_2_1_info, field_fmt_57_70_2_1_set, field_fmt_57_70_2_1_get, NULL, 12}, - {"OAM_DOWNMEP_TX::RQE_Q_NUM",1, field_fmt_71_74_1_1_info, field_fmt_71_74_1_1_set, field_fmt_71_74_1_1_get, NULL, 12}, - {"OAM_DOWNMEP_TX::SOP",1, field_fmt_75_75_1_1_info, field_fmt_75_75_1_1_set, field_fmt_75_75_1_1_get, NULL, 12}, - {"OAM_DOWNMEP_TX::SPAP",1, field_fmt_76_77_1_1_info, field_fmt_76_77_1_1_set, field_fmt_76_77_1_1_get, NULL, 12}, - {"OAM_DOWNMEP_TX::SPID",1, field_fmt_78_79_1_1_info, field_fmt_78_79_1_1_set, field_fmt_78_79_1_1_get, NULL, 12}, - {"OAM_DOWNMEP_TX::SPID_OVERRIDE",1, field_fmt_80_80_1_1_info, field_fmt_80_80_1_1_set, field_fmt_80_80_1_1_get, NULL, 12}, - {"OAM_DOWNMEP_TX::SRC_MODID",1, field_fmt_81_88_1_1_info, field_fmt_81_88_1_1_set, field_fmt_81_88_1_1_get, NULL, 12}, - {"OAM_DOWNMEP_TX::TIMESTAMP_ACTION",1, field_fmt_89_89_1_1_info, field_fmt_89_89_1_1_set, field_fmt_89_89_1_1_get, NULL, 12}, - {"OAM_DOWNMEP_TX::UNICAST",1, field_fmt_90_90_1_1_info, field_fmt_90_90_1_1_set, field_fmt_90_90_1_1_get, NULL, 12}, - {"SOBMH_FROM_CPU::CELL_ERROR",1, field_fmt_0_0_3_3_info, field_fmt_0_0_3_3_set, field_fmt_0_0_3_3_get, NULL, 1}, - {"SOBMH_FROM_CPU::CNG",1, field_fmt_1_2_3_3_info, field_fmt_1_2_3_3_set, field_fmt_1_2_3_3_get, NULL, 1}, - {"SOBMH_FROM_CPU::COS",1, field_fmt_3_8_3_3_info, field_fmt_3_8_3_3_set, field_fmt_3_8_3_3_get, NULL, 1}, - {"SOBMH_FROM_CPU::DESTINATION",1, field_fmt_9_24_3_3_info, field_fmt_9_24_3_3_set, field_fmt_9_24_3_3_get, NULL, 1}, - {"SOBMH_FROM_CPU::DESTINATION_TYPE",1, field_fmt_25_28_3_3_info, field_fmt_25_28_3_3_set, field_fmt_25_28_3_3_get, bcm56080_a0_txpmd_sobmh_from_cpu_destination_type_names, 1}, - {"SOBMH_FROM_CPU::EOP",1, field_fmt_29_29_3_3_info, field_fmt_29_29_3_3_set, field_fmt_29_29_3_3_get, NULL, 1}, - {"SOBMH_FROM_CPU::IEEE1588_INGRESS_TIMESTAMP_SIGN",1, field_fmt_30_30_3_3_info, field_fmt_30_30_3_3_set, field_fmt_30_30_3_3_get, NULL, 1}, - {"SOBMH_FROM_CPU::IEEE1588_ONE_STEP_ENABLE",1, field_fmt_31_31_3_3_info, field_fmt_31_31_3_3_set, field_fmt_31_31_3_3_get, NULL, 1}, - {"SOBMH_FROM_CPU::IEEE1588_REGEN_UDP_CHECKSUM",1, field_fmt_32_32_2_2_info, field_fmt_32_32_2_2_set, field_fmt_32_32_2_2_get, NULL, 1}, - {"SOBMH_FROM_CPU::IEEE1588_TIMESTAMP_HDR_OFFSET",1, field_fmt_33_40_2_2_info, field_fmt_33_40_2_2_set, field_fmt_33_40_2_2_get, NULL, 1}, - {"SOBMH_FROM_CPU::INPUT_PRI",1, field_fmt_41_44_2_2_info, field_fmt_41_44_2_2_set, field_fmt_41_44_2_2_get, NULL, 1}, - {"SOBMH_FROM_CPU::RQE_Q_NUM",1, field_fmt_45_48_2_2_info, field_fmt_45_48_2_2_set, field_fmt_45_48_2_2_get, NULL, 1}, - {"SOBMH_FROM_CPU::SOP",1, field_fmt_49_49_2_2_info, field_fmt_49_49_2_2_set, field_fmt_49_49_2_2_get, NULL, 1}, - {"SOBMH_FROM_CPU::SPAP",1, field_fmt_50_51_2_2_info, field_fmt_50_51_2_2_set, field_fmt_50_51_2_2_get, NULL, 1}, - {"SOBMH_FROM_CPU::SPID",1, field_fmt_52_53_2_2_info, field_fmt_52_53_2_2_set, field_fmt_52_53_2_2_get, NULL, 1}, - {"SOBMH_FROM_CPU::SPID_OVERRIDE",1, field_fmt_54_54_2_2_info, field_fmt_54_54_2_2_set, field_fmt_54_54_2_2_get, NULL, 1}, - {"SOBMH_FROM_CPU::SRC_MODID",1, field_fmt_55_62_2_2_info, field_fmt_55_62_2_2_set, field_fmt_55_62_2_2_get, NULL, 1}, - {"SOBMH_FROM_CPU::TX_TS",1, field_fmt_63_63_2_2_info, field_fmt_63_63_2_2_set, field_fmt_63_63_2_2_get, NULL, 1}, - {"SOBMH_FROM_CPU::UNICAST",1, field_fmt_64_64_1_1_info, field_fmt_64_64_1_1_set, field_fmt_64_64_1_1_get, NULL, 1}, - {"SOBMH_FROM_CPU::WRED_MARK_ELIGIBLE",1, field_fmt_65_65_1_1_info, field_fmt_65_65_1_1_set, field_fmt_65_65_1_1_get, NULL, 1}, - {"SOBMH_FROM_CPU::WRED_RESPONSE",1, field_fmt_66_66_1_1_info, field_fmt_66_66_1_1_set, field_fmt_66_66_1_1_get, NULL, 1}, - {"HEADER_TYPE",1, field_fmt_120_125_0_0_info, field_fmt_120_125_0_0_set, field_fmt_120_125_0_0_get, bcm56080_a0_txpmd_header_type_names, 0}, - {"START",1, field_fmt_126_127_0_0_info, field_fmt_126_127_0_0_set, field_fmt_126_127_0_0_get, bcm56080_a0_txpmd_start_names, 0}, + {1, field_fmt_0_9_3_3_info, field_fmt_0_9_3_3_set, field_fmt_0_9_3_3_get, NULL, 2}, + {1, field_fmt_0_6_3_3_info, field_fmt_0_6_3_3_set, field_fmt_0_6_3_3_get, NULL, 2}, + {1, field_fmt_10_25_3_3_info, field_fmt_10_25_3_3_set, field_fmt_10_25_3_3_get, NULL, 2}, + {1, field_fmt_26_29_3_3_info, field_fmt_26_29_3_3_set, field_fmt_26_29_3_3_get, bcm56080_a0_txpmd_cpu_tx_destination_type_names, 2}, + {1, field_fmt_30_31_3_3_info, field_fmt_30_31_3_3_set, field_fmt_30_31_3_3_get, NULL, 2}, + {1, field_fmt_32_35_2_2_info, field_fmt_32_35_2_2_set, field_fmt_32_35_2_2_get, NULL, 2}, + {1, field_fmt_36_37_2_2_info, field_fmt_36_37_2_2_set, field_fmt_36_37_2_2_get, NULL, 2}, + {1, field_fmt_38_41_2_2_info, field_fmt_38_41_2_2_set, field_fmt_38_41_2_2_get, NULL, 2}, + {1, field_fmt_42_42_2_2_info, field_fmt_42_42_2_2_set, field_fmt_42_42_2_2_get, NULL, 2}, + {1, field_fmt_43_45_2_2_info, field_fmt_43_45_2_2_set, field_fmt_43_45_2_2_get, NULL, 2}, + {1, field_fmt_46_46_2_2_info, field_fmt_46_46_2_2_set, field_fmt_46_46_2_2_get, NULL, 2}, + {1, field_fmt_47_47_2_2_info, field_fmt_47_47_2_2_set, field_fmt_47_47_2_2_get, NULL, 2}, + {1, field_fmt_48_48_2_2_info, field_fmt_48_48_2_2_set, field_fmt_48_48_2_2_get, NULL, 2}, + {1, field_fmt_49_49_2_2_info, field_fmt_49_49_2_2_set, field_fmt_49_49_2_2_get, NULL, 2}, + {1, field_fmt_50_55_2_2_info, field_fmt_50_55_2_2_set, field_fmt_50_55_2_2_get, NULL, 2}, + {1, field_fmt_56_56_2_2_info, field_fmt_56_56_2_2_set, field_fmt_56_56_2_2_get, NULL, 2}, + {1, field_fmt_57_57_2_2_info, field_fmt_57_57_2_2_set, field_fmt_57_57_2_2_get, NULL, 2}, + {1, field_fmt_0_0_3_3_info, field_fmt_0_0_3_3_set, field_fmt_0_0_3_3_get, NULL, 12}, + {1, field_fmt_1_8_3_3_info, field_fmt_1_8_3_3_set, field_fmt_1_8_3_3_get, NULL, 12}, + {1, field_fmt_9_14_3_3_info, field_fmt_9_14_3_3_set, field_fmt_9_14_3_3_get, NULL, 12}, + {1, field_fmt_15_30_3_3_info, field_fmt_15_30_3_3_set, field_fmt_15_30_3_3_get, NULL, 12}, + {1, field_fmt_31_34_3_2_info, field_fmt_31_34_3_2_set, field_fmt_31_34_3_2_get, bcm56080_a0_txpmd_oam_downmep_tx_destination_type_names, 12}, + {1, field_fmt_35_35_2_2_info, field_fmt_35_35_2_2_set, field_fmt_35_35_2_2_get, NULL, 12}, + {1, field_fmt_36_39_2_2_info, field_fmt_36_39_2_2_set, field_fmt_36_39_2_2_get, NULL, 12}, + {1, field_fmt_40_41_2_2_info, field_fmt_40_41_2_2_set, field_fmt_40_41_2_2_get, NULL, 12}, + {1, field_fmt_42_50_2_2_info, field_fmt_42_50_2_2_set, field_fmt_42_50_2_2_get, NULL, 12}, + {1, field_fmt_51_56_2_2_info, field_fmt_51_56_2_2_set, field_fmt_51_56_2_2_get, NULL, 12}, + {1, field_fmt_57_70_2_1_info, field_fmt_57_70_2_1_set, field_fmt_57_70_2_1_get, NULL, 12}, + {1, field_fmt_71_74_1_1_info, field_fmt_71_74_1_1_set, field_fmt_71_74_1_1_get, NULL, 12}, + {1, field_fmt_75_75_1_1_info, field_fmt_75_75_1_1_set, field_fmt_75_75_1_1_get, NULL, 12}, + {1, field_fmt_76_77_1_1_info, field_fmt_76_77_1_1_set, field_fmt_76_77_1_1_get, NULL, 12}, + {1, field_fmt_78_79_1_1_info, field_fmt_78_79_1_1_set, field_fmt_78_79_1_1_get, NULL, 12}, + {1, field_fmt_80_80_1_1_info, field_fmt_80_80_1_1_set, field_fmt_80_80_1_1_get, NULL, 12}, + {1, field_fmt_81_88_1_1_info, field_fmt_81_88_1_1_set, field_fmt_81_88_1_1_get, NULL, 12}, + {1, field_fmt_89_89_1_1_info, field_fmt_89_89_1_1_set, field_fmt_89_89_1_1_get, NULL, 12}, + {1, field_fmt_90_90_1_1_info, field_fmt_90_90_1_1_set, field_fmt_90_90_1_1_get, NULL, 12}, + {1, field_fmt_0_0_3_3_info, field_fmt_0_0_3_3_set, field_fmt_0_0_3_3_get, NULL, 1}, + {1, field_fmt_1_2_3_3_info, field_fmt_1_2_3_3_set, field_fmt_1_2_3_3_get, NULL, 1}, + {1, field_fmt_3_8_3_3_info, field_fmt_3_8_3_3_set, field_fmt_3_8_3_3_get, NULL, 1}, + {1, field_fmt_9_24_3_3_info, field_fmt_9_24_3_3_set, field_fmt_9_24_3_3_get, NULL, 1}, + {1, field_fmt_25_28_3_3_info, field_fmt_25_28_3_3_set, field_fmt_25_28_3_3_get, bcm56080_a0_txpmd_sobmh_from_cpu_destination_type_names, 1}, + {1, field_fmt_29_29_3_3_info, field_fmt_29_29_3_3_set, field_fmt_29_29_3_3_get, NULL, 1}, + {1, field_fmt_30_30_3_3_info, field_fmt_30_30_3_3_set, field_fmt_30_30_3_3_get, NULL, 1}, + {1, field_fmt_31_31_3_3_info, field_fmt_31_31_3_3_set, field_fmt_31_31_3_3_get, NULL, 1}, + {1, field_fmt_32_32_2_2_info, field_fmt_32_32_2_2_set, field_fmt_32_32_2_2_get, NULL, 1}, + {1, field_fmt_33_40_2_2_info, field_fmt_33_40_2_2_set, field_fmt_33_40_2_2_get, NULL, 1}, + {1, field_fmt_41_44_2_2_info, field_fmt_41_44_2_2_set, field_fmt_41_44_2_2_get, NULL, 1}, + {1, field_fmt_45_48_2_2_info, field_fmt_45_48_2_2_set, field_fmt_45_48_2_2_get, NULL, 1}, + {1, field_fmt_49_49_2_2_info, field_fmt_49_49_2_2_set, field_fmt_49_49_2_2_get, NULL, 1}, + {1, field_fmt_50_51_2_2_info, field_fmt_50_51_2_2_set, field_fmt_50_51_2_2_get, NULL, 1}, + {1, field_fmt_52_53_2_2_info, field_fmt_52_53_2_2_set, field_fmt_52_53_2_2_get, NULL, 1}, + {1, field_fmt_54_54_2_2_info, field_fmt_54_54_2_2_set, field_fmt_54_54_2_2_get, NULL, 1}, + {1, field_fmt_55_62_2_2_info, field_fmt_55_62_2_2_set, field_fmt_55_62_2_2_get, NULL, 1}, + {1, field_fmt_63_63_2_2_info, field_fmt_63_63_2_2_set, field_fmt_63_63_2_2_get, NULL, 1}, + {1, field_fmt_64_64_1_1_info, field_fmt_64_64_1_1_set, field_fmt_64_64_1_1_get, NULL, 1}, + {1, field_fmt_65_65_1_1_info, field_fmt_65_65_1_1_set, field_fmt_65_65_1_1_get, NULL, 1}, + {1, field_fmt_66_66_1_1_info, field_fmt_66_66_1_1_set, field_fmt_66_66_1_1_get, NULL, 1}, + {1, field_fmt_120_125_0_0_info, field_fmt_120_125_0_0_set, field_fmt_120_125_0_0_get, bcm56080_a0_txpmd_header_type_names, 0}, + {1, field_fmt_126_127_0_0_info, field_fmt_126_127_0_0_set, field_fmt_126_127_0_0_get, bcm56080_a0_txpmd_start_names, 0}, }; @@ -3524,18 +3523,18 @@ static const shr_enum_map_t bcm56080_a0_lbhdr_header_type_names[] = }; static bcmpkt_pmd_field_t bcm56080_a0_lbhdr_fields[BCM56080_A0_LBHDR_COUNT] = { - {"PP_PORT",1, field_fmt_0_6_3_3_info, field_fmt_0_6_3_3_set, field_fmt_0_6_3_3_get, NULL, 0}, - {"ROUTED_PKT",1, field_fmt_31_31_3_3_info, field_fmt_31_31_3_3_set, field_fmt_31_31_3_3_get, NULL, 0}, - {"VRF",1, field_fmt_62_67_2_1_info, field_fmt_62_67_2_1_set, field_fmt_62_67_2_1_get, NULL, 0}, - {"VRF_VALID",1, field_fmt_68_68_1_1_info, field_fmt_68_68_1_1_set, field_fmt_68_68_1_1_get, NULL, 0}, - {"ZERO",1, field_fmt_69_69_1_1_info, field_fmt_69_69_1_1_set, field_fmt_69_69_1_1_get, NULL, 0}, - {"PKT_PROFILE",1, field_fmt_90_92_1_1_info, field_fmt_90_92_1_1_set, field_fmt_90_92_1_1_get, NULL, 0}, - {"VISIBILITY_PKT",1, field_fmt_93_93_1_1_info, field_fmt_93_93_1_1_set, field_fmt_93_93_1_1_get, NULL, 0}, - {"SOURCE",1, field_fmt_94_109_1_0_info, field_fmt_94_109_1_0_set, field_fmt_94_109_1_0_get, NULL, 0}, - {"SOURCE_TYPE",1, field_fmt_110_110_0_0_info, field_fmt_110_110_0_0_set, field_fmt_110_110_0_0_get, NULL, 0}, - {"HEADER_TYPE",1, field_fmt_111_111_0_0_info, field_fmt_111_111_0_0_set, field_fmt_111_111_0_0_get, bcm56080_a0_lbhdr_header_type_names, 0}, - {"INPUT_PRIORITY",1, field_fmt_116_119_0_0_info, field_fmt_116_119_0_0_set, field_fmt_116_119_0_0_get, NULL, 0}, - {"START",1, field_fmt_120_127_0_0_info, field_fmt_120_127_0_0_set, field_fmt_120_127_0_0_get, NULL, 0}, + {1, field_fmt_0_6_3_3_info, field_fmt_0_6_3_3_set, field_fmt_0_6_3_3_get, NULL, 0}, + {1, field_fmt_31_31_3_3_info, field_fmt_31_31_3_3_set, field_fmt_31_31_3_3_get, NULL, 0}, + {1, field_fmt_62_67_2_1_info, field_fmt_62_67_2_1_set, field_fmt_62_67_2_1_get, NULL, 0}, + {1, field_fmt_68_68_1_1_info, field_fmt_68_68_1_1_set, field_fmt_68_68_1_1_get, NULL, 0}, + {1, field_fmt_69_69_1_1_info, field_fmt_69_69_1_1_set, field_fmt_69_69_1_1_get, NULL, 0}, + {1, field_fmt_90_92_1_1_info, field_fmt_90_92_1_1_set, field_fmt_90_92_1_1_get, NULL, 0}, + {1, field_fmt_93_93_1_1_info, field_fmt_93_93_1_1_set, field_fmt_93_93_1_1_get, NULL, 0}, + {1, field_fmt_94_109_1_0_info, field_fmt_94_109_1_0_set, field_fmt_94_109_1_0_get, NULL, 0}, + {1, field_fmt_110_110_0_0_info, field_fmt_110_110_0_0_set, field_fmt_110_110_0_0_get, NULL, 0}, + {1, field_fmt_111_111_0_0_info, field_fmt_111_111_0_0_set, field_fmt_111_111_0_0_get, bcm56080_a0_lbhdr_header_type_names, 0}, + {1, field_fmt_116_119_0_0_info, field_fmt_116_119_0_0_set, field_fmt_116_119_0_0_get, NULL, 0}, + {1, field_fmt_120_127_0_0_info, field_fmt_120_127_0_0_set, field_fmt_120_127_0_0_get, NULL, 0}, }; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_lbhdr.c similarity index 98% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_lbhdr.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_lbhdr.c index 22d20ca370c..9a6d771facf 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_lbhdr.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_lbhdr.c @@ -5,8 +5,7 @@ * Edits to this file will be lost when it is regenerated. * Tool: INTERNAL/regs/xgs/generate-pmd.pl * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_rxpmd.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_rxpmd.c similarity index 98% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_rxpmd.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_rxpmd.c index b3602504bfc..2fb78ae3f6e 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_rxpmd.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_rxpmd.c @@ -5,8 +5,7 @@ * Edits to this file will be lost when it is regenerated. * Tool: INTERNAL/regs/xgs/generate-pmd.pl * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -417,8 +416,6 @@ const bcmpkt_rxpmd_fget_t bcm56690_a0_rxpmd_fget = { NULL, NULL, NULL, - NULL, - NULL, NULL } }; @@ -524,8 +521,6 @@ const bcmpkt_rxpmd_fset_t bcm56690_a0_rxpmd_fset = { NULL, NULL, NULL, - NULL, - NULL, NULL } }; @@ -552,7 +547,7 @@ static int bcm56690_a0_rxpmd_view_infos[BCMPKT_RXPMD_FID_COUNT] = { -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -2, -2, -1, -1, -1, -1, -1, -1, -1, -1, -2, -1, -1, -2, -2, -2, -2, -2, -2, -1, -2, -1, -1, -2, -2, -2, -2, -2, -2, -2, - -2, -2, -2, -2, -2, + -2, -2, -2, }; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_rxpmd_field.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_rxpmd_field.c similarity index 98% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_rxpmd_field.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_rxpmd_field.c index 81a649552c0..dfe1fae7931 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_rxpmd_field.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_rxpmd_field.c @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_txpmd.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_txpmd.c similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_txpmd.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_txpmd.c index 81fc469dc1b..8dd5a62bed2 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_txpmd.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pkt_txpmd.c @@ -5,8 +5,7 @@ * Edits to this file will be lost when it is regenerated. * Tool: INTERNAL/regs/xgs/generate-pmd.pl * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -522,7 +521,6 @@ const bcmpkt_txpmd_fget_t bcm56690_a0_txpmd_fget = { NULL, NULL, NULL, - NULL, NULL } }; @@ -658,7 +656,6 @@ const bcmpkt_txpmd_fset_t bcm56690_a0_txpmd_fset = { NULL, NULL, NULL, - NULL, NULL } }; @@ -684,7 +681,7 @@ static int bcm56690_a0_txpmd_view_infos[BCMPKT_TXPMD_FID_COUNT] = { -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, - -2, -2, + -2, }; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pmd_field.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pmd_field.c similarity index 79% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pmd_field.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pmd_field.c index aa546e94a1f..75f674f7253 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pmd_field.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pmd_field.c @@ -5,8 +5,7 @@ * Edits to this file will be lost when it is regenerated. * Tool: INTERNAL/regs/xgs/generate-pmd.pl * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -1106,28 +1105,28 @@ field_fmt_9_9_3_3_get(uint32_t *pmd, uint32_t *val) } static bcmpkt_pmd_field_t bcm56690_a0_rxpmd_fields[BCM56690_A0_RXPMD_COUNT] = { - {"FLEX_DATA",14, field_fmt_0_447_17_4_info, field_fmt_0_447_17_4_set, field_fmt_0_447_17_4_get, NULL, 0}, - {"MPB_FLEX_DATA_TYPE",1, field_fmt_449_454_3_3_info, field_fmt_449_454_3_3_set, field_fmt_449_454_3_3_get, NULL, 0}, - {"DOP_TRIGGER",1, field_fmt_455_455_3_3_info, field_fmt_455_455_3_3_set, field_fmt_455_455_3_3_get, NULL, 0}, - {"EPARSE_EXTRACT_OFFSETS_3_0_OR_MIRROR_ENCAP_INDEX",1, field_fmt_456_459_3_3_info, field_fmt_456_459_3_3_set, field_fmt_456_459_3_3_get, NULL, 0}, - {"EPARSE_EXTRACT_OFFSETS_6_4",1, field_fmt_460_462_3_3_info, field_fmt_460_462_3_3_set, field_fmt_460_462_3_3_get, NULL, 0}, - {"INT_CN",1, field_fmt_464_465_3_3_info, field_fmt_464_465_3_3_set, field_fmt_464_465_3_3_get, NULL, 0}, - {"CNG",1, field_fmt_466_467_3_3_info, field_fmt_466_467_3_3_set, field_fmt_466_467_3_3_get, NULL, 0}, - {"MULTICAST",1, field_fmt_468_468_3_3_info, field_fmt_468_468_3_3_set, field_fmt_468_468_3_3_get, NULL, 0}, - {"IP_ROUTED",1, field_fmt_469_469_3_3_info, field_fmt_469_469_3_3_set, field_fmt_469_469_3_3_get, NULL, 0}, - {"COPY_TO_CPU",1, field_fmt_470_470_3_3_info, field_fmt_470_470_3_3_set, field_fmt_470_470_3_3_get, NULL, 0}, - {"SRC_PORT_NUM",1, field_fmt_473_479_3_3_info, field_fmt_473_479_3_3_set, field_fmt_473_479_3_3_get, NULL, 0}, - {"ARC_ID_LO",1, field_fmt_480_511_2_2_info, field_fmt_480_511_2_2_set, field_fmt_480_511_2_2_get, NULL, 0}, - {"ARC_ID_HI",1, field_fmt_512_527_1_1_info, field_fmt_512_527_1_1_set, field_fmt_512_527_1_1_get, NULL, 0}, - {"REPLICATION_OR_NHOP_INDEX",1, field_fmt_528_543_1_1_info, field_fmt_528_543_1_1_set, field_fmt_528_543_1_1_get, NULL, 0}, - {"DMA_HEADER_VERSION",1, field_fmt_544_545_0_0_info, field_fmt_544_545_0_0_set, field_fmt_544_545_0_0_get, NULL, 0}, - {"QUEUE_NUM",1, field_fmt_546_551_0_0_info, field_fmt_546_551_0_0_set, field_fmt_546_551_0_0_get, NULL, 0}, - {"TRUNCATE_CPU_COPY",1, field_fmt_552_552_0_0_info, field_fmt_552_552_0_0_set, field_fmt_552_552_0_0_get, NULL, 0}, - {"EGR_ZONE_REMAP_CTRL",1, field_fmt_553_556_0_0_info, field_fmt_553_556_0_0_set, field_fmt_553_556_0_0_get, NULL, 0}, - {"SWITCH",1, field_fmt_557_557_0_0_info, field_fmt_557_557_0_0_set, field_fmt_557_557_0_0_get, NULL, 0}, - {"L3ONLY",1, field_fmt_558_558_0_0_info, field_fmt_558_558_0_0_set, field_fmt_558_558_0_0_get, NULL, 0}, - {"UC_SW_COPY_DROPPED",1, field_fmt_559_559_0_0_info, field_fmt_559_559_0_0_set, field_fmt_559_559_0_0_get, NULL, 0}, - {"PKT_LENGTH",1, field_fmt_560_575_0_0_info, field_fmt_560_575_0_0_set, field_fmt_560_575_0_0_get, NULL, 0}, + {14, field_fmt_0_447_17_4_info, field_fmt_0_447_17_4_set, field_fmt_0_447_17_4_get, NULL, 0}, + {1, field_fmt_449_454_3_3_info, field_fmt_449_454_3_3_set, field_fmt_449_454_3_3_get, NULL, 0}, + {1, field_fmt_455_455_3_3_info, field_fmt_455_455_3_3_set, field_fmt_455_455_3_3_get, NULL, 0}, + {1, field_fmt_456_459_3_3_info, field_fmt_456_459_3_3_set, field_fmt_456_459_3_3_get, NULL, 0}, + {1, field_fmt_460_462_3_3_info, field_fmt_460_462_3_3_set, field_fmt_460_462_3_3_get, NULL, 0}, + {1, field_fmt_464_465_3_3_info, field_fmt_464_465_3_3_set, field_fmt_464_465_3_3_get, NULL, 0}, + {1, field_fmt_466_467_3_3_info, field_fmt_466_467_3_3_set, field_fmt_466_467_3_3_get, NULL, 0}, + {1, field_fmt_468_468_3_3_info, field_fmt_468_468_3_3_set, field_fmt_468_468_3_3_get, NULL, 0}, + {1, field_fmt_469_469_3_3_info, field_fmt_469_469_3_3_set, field_fmt_469_469_3_3_get, NULL, 0}, + {1, field_fmt_470_470_3_3_info, field_fmt_470_470_3_3_set, field_fmt_470_470_3_3_get, NULL, 0}, + {1, field_fmt_473_479_3_3_info, field_fmt_473_479_3_3_set, field_fmt_473_479_3_3_get, NULL, 0}, + {1, field_fmt_480_511_2_2_info, field_fmt_480_511_2_2_set, field_fmt_480_511_2_2_get, NULL, 0}, + {1, field_fmt_512_527_1_1_info, field_fmt_512_527_1_1_set, field_fmt_512_527_1_1_get, NULL, 0}, + {1, field_fmt_528_543_1_1_info, field_fmt_528_543_1_1_set, field_fmt_528_543_1_1_get, NULL, 0}, + {1, field_fmt_544_545_0_0_info, field_fmt_544_545_0_0_set, field_fmt_544_545_0_0_get, NULL, 0}, + {1, field_fmt_546_551_0_0_info, field_fmt_546_551_0_0_set, field_fmt_546_551_0_0_get, NULL, 0}, + {1, field_fmt_552_552_0_0_info, field_fmt_552_552_0_0_set, field_fmt_552_552_0_0_get, NULL, 0}, + {1, field_fmt_553_556_0_0_info, field_fmt_553_556_0_0_set, field_fmt_553_556_0_0_get, NULL, 0}, + {1, field_fmt_557_557_0_0_info, field_fmt_557_557_0_0_set, field_fmt_557_557_0_0_get, NULL, 0}, + {1, field_fmt_558_558_0_0_info, field_fmt_558_558_0_0_set, field_fmt_558_558_0_0_get, NULL, 0}, + {1, field_fmt_559_559_0_0_info, field_fmt_559_559_0_0_set, field_fmt_559_559_0_0_get, NULL, 0}, + {1, field_fmt_560_575_0_0_info, field_fmt_560_575_0_0_set, field_fmt_560_575_0_0_get, NULL, 0}, }; @@ -1165,35 +1164,35 @@ static const shr_enum_map_t bcm56690_a0_txpmd_start_names[] = }; static bcmpkt_pmd_field_t bcm56690_a0_txpmd_fields[BCM56690_A0_TXPMD_COUNT] = { - {"CELL_LENGTH",1, field_fmt_0_7_3_3_info, field_fmt_0_7_3_3_set, field_fmt_0_7_3_3_get, NULL, 0}, - {"EOP",1, field_fmt_8_8_3_3_info, field_fmt_8_8_3_3_set, field_fmt_8_8_3_3_get, NULL, 0}, - {"SOP",1, field_fmt_9_9_3_3_info, field_fmt_9_9_3_3_set, field_fmt_9_9_3_3_get, NULL, 0}, - {"PKT_LENGTH",1, field_fmt_10_23_3_3_info, field_fmt_10_23_3_3_set, field_fmt_10_23_3_3_get, NULL, 0}, - {"COPY_TO_DEBUG",1, field_fmt_37_37_2_2_info, field_fmt_37_37_2_2_set, field_fmt_37_37_2_2_get, NULL, 0}, - {"COS",1, field_fmt_38_43_2_2_info, field_fmt_38_43_2_2_set, field_fmt_38_43_2_2_get, NULL, 0}, - {"UNICAST_PKT",1, field_fmt_44_44_2_2_info, field_fmt_44_44_2_2_set, field_fmt_44_44_2_2_get, NULL, 0}, - {"UNICAST",1, field_fmt_45_45_2_2_info, field_fmt_45_45_2_2_set, field_fmt_45_45_2_2_get, NULL, 0}, - {"SET_L2BM",1, field_fmt_46_46_2_2_info, field_fmt_46_46_2_2_set, field_fmt_46_46_2_2_get, NULL, 0}, - {"RQE_Q_NUM",1, field_fmt_47_50_2_2_info, field_fmt_47_50_2_2_set, field_fmt_47_50_2_2_get, NULL, 0}, - {"SPAP",1, field_fmt_51_52_2_2_info, field_fmt_51_52_2_2_set, field_fmt_51_52_2_2_get, NULL, 0}, - {"SPID",1, field_fmt_53_54_2_2_info, field_fmt_53_54_2_2_set, field_fmt_53_54_2_2_get, NULL, 0}, - {"SPID_OVERRIDE",1, field_fmt_55_55_2_2_info, field_fmt_55_55_2_2_set, field_fmt_55_55_2_2_get, NULL, 0}, - {"INPUT_PRI",1, field_fmt_56_59_2_2_info, field_fmt_56_59_2_2_set, field_fmt_56_59_2_2_get, NULL, 0}, - {"LOCAL_DEST_PORT",1, field_fmt_65_71_1_1_info, field_fmt_65_71_1_1_set, field_fmt_65_71_1_1_get, NULL, 0}, - {"IEEE1588_TIMESTAMP_HDR_OFFSET",1, field_fmt_72_79_1_1_info, field_fmt_72_79_1_1_set, field_fmt_72_79_1_1_get, NULL, 0}, - {"TX_TS",1, field_fmt_80_80_1_1_info, field_fmt_80_80_1_1_set, field_fmt_80_80_1_1_get, NULL, 0}, - {"IEEE1588_INGRESS_TIMESTAMP_SIGN",1, field_fmt_81_81_1_1_info, field_fmt_81_81_1_1_set, field_fmt_81_81_1_1_get, NULL, 0}, - {"IEEE1588_REGEN_UDP_CHECKSUM",1, field_fmt_82_82_1_1_info, field_fmt_82_82_1_1_set, field_fmt_82_82_1_1_get, NULL, 0}, - {"IEEE1588_ONE_STEP_ENABLE",1, field_fmt_83_83_1_1_info, field_fmt_83_83_1_1_set, field_fmt_83_83_1_1_get, NULL, 0}, - {"TS_ACTION_LSB",1, field_fmt_83_83_1_1_info, field_fmt_83_83_1_1_set, field_fmt_83_83_1_1_get, NULL, 0}, - {"CELL_ERROR",1, field_fmt_84_84_1_1_info, field_fmt_84_84_1_1_set, field_fmt_84_84_1_1_get, NULL, 0}, - {"TS_ACTION_MSB",1, field_fmt_85_85_1_1_info, field_fmt_85_85_1_1_set, field_fmt_85_85_1_1_get, NULL, 0}, - {"TS_TYPE",1, field_fmt_86_86_1_1_info, field_fmt_86_86_1_1_set, field_fmt_86_86_1_1_get, NULL, 0}, - {"DST_SUBPORT_NUM",1, field_fmt_87_96_1_0_info, field_fmt_87_96_1_0_set, field_fmt_87_96_1_0_get, NULL, 0}, - {"UDP_CHECKSUM_UPDATE_ENABLE",1, field_fmt_97_97_0_0_info, field_fmt_97_97_0_0_set, field_fmt_97_97_0_0_get, NULL, 0}, - {"UDP_CHECKSUM_OFFSET",1, field_fmt_98_103_0_0_info, field_fmt_98_103_0_0_set, field_fmt_98_103_0_0_get, NULL, 0}, - {"HEADER_TYPE",1, field_fmt_120_125_0_0_info, field_fmt_120_125_0_0_set, field_fmt_120_125_0_0_get, bcm56690_a0_txpmd_header_type_names, 0}, - {"START",1, field_fmt_126_127_0_0_info, field_fmt_126_127_0_0_set, field_fmt_126_127_0_0_get, bcm56690_a0_txpmd_start_names, 0}, + {1, field_fmt_0_7_3_3_info, field_fmt_0_7_3_3_set, field_fmt_0_7_3_3_get, NULL, 0}, + {1, field_fmt_8_8_3_3_info, field_fmt_8_8_3_3_set, field_fmt_8_8_3_3_get, NULL, 0}, + {1, field_fmt_9_9_3_3_info, field_fmt_9_9_3_3_set, field_fmt_9_9_3_3_get, NULL, 0}, + {1, field_fmt_10_23_3_3_info, field_fmt_10_23_3_3_set, field_fmt_10_23_3_3_get, NULL, 0}, + {1, field_fmt_37_37_2_2_info, field_fmt_37_37_2_2_set, field_fmt_37_37_2_2_get, NULL, 0}, + {1, field_fmt_38_43_2_2_info, field_fmt_38_43_2_2_set, field_fmt_38_43_2_2_get, NULL, 0}, + {1, field_fmt_44_44_2_2_info, field_fmt_44_44_2_2_set, field_fmt_44_44_2_2_get, NULL, 0}, + {1, field_fmt_45_45_2_2_info, field_fmt_45_45_2_2_set, field_fmt_45_45_2_2_get, NULL, 0}, + {1, field_fmt_46_46_2_2_info, field_fmt_46_46_2_2_set, field_fmt_46_46_2_2_get, NULL, 0}, + {1, field_fmt_47_50_2_2_info, field_fmt_47_50_2_2_set, field_fmt_47_50_2_2_get, NULL, 0}, + {1, field_fmt_51_52_2_2_info, field_fmt_51_52_2_2_set, field_fmt_51_52_2_2_get, NULL, 0}, + {1, field_fmt_53_54_2_2_info, field_fmt_53_54_2_2_set, field_fmt_53_54_2_2_get, NULL, 0}, + {1, field_fmt_55_55_2_2_info, field_fmt_55_55_2_2_set, field_fmt_55_55_2_2_get, NULL, 0}, + {1, field_fmt_56_59_2_2_info, field_fmt_56_59_2_2_set, field_fmt_56_59_2_2_get, NULL, 0}, + {1, field_fmt_65_71_1_1_info, field_fmt_65_71_1_1_set, field_fmt_65_71_1_1_get, NULL, 0}, + {1, field_fmt_72_79_1_1_info, field_fmt_72_79_1_1_set, field_fmt_72_79_1_1_get, NULL, 0}, + {1, field_fmt_80_80_1_1_info, field_fmt_80_80_1_1_set, field_fmt_80_80_1_1_get, NULL, 0}, + {1, field_fmt_81_81_1_1_info, field_fmt_81_81_1_1_set, field_fmt_81_81_1_1_get, NULL, 0}, + {1, field_fmt_82_82_1_1_info, field_fmt_82_82_1_1_set, field_fmt_82_82_1_1_get, NULL, 0}, + {1, field_fmt_83_83_1_1_info, field_fmt_83_83_1_1_set, field_fmt_83_83_1_1_get, NULL, 0}, + {1, field_fmt_83_83_1_1_info, field_fmt_83_83_1_1_set, field_fmt_83_83_1_1_get, NULL, 0}, + {1, field_fmt_84_84_1_1_info, field_fmt_84_84_1_1_set, field_fmt_84_84_1_1_get, NULL, 0}, + {1, field_fmt_85_85_1_1_info, field_fmt_85_85_1_1_set, field_fmt_85_85_1_1_get, NULL, 0}, + {1, field_fmt_86_86_1_1_info, field_fmt_86_86_1_1_set, field_fmt_86_86_1_1_get, NULL, 0}, + {1, field_fmt_87_96_1_0_info, field_fmt_87_96_1_0_set, field_fmt_87_96_1_0_get, NULL, 0}, + {1, field_fmt_97_97_0_0_info, field_fmt_97_97_0_0_set, field_fmt_97_97_0_0_get, NULL, 0}, + {1, field_fmt_98_103_0_0_info, field_fmt_98_103_0_0_set, field_fmt_98_103_0_0_get, NULL, 0}, + {1, field_fmt_120_125_0_0_info, field_fmt_120_125_0_0_set, field_fmt_120_125_0_0_get, bcm56690_a0_txpmd_header_type_names, 0}, + {1, field_fmt_126_127_0_0_info, field_fmt_126_127_0_0_set, field_fmt_126_127_0_0_get, bcm56690_a0_txpmd_start_names, 0}, }; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pkt_lbhdr.c similarity index 98% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pkt_lbhdr.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pkt_lbhdr.c index 8f2d15fbca3..c64685aa2ac 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pkt_lbhdr.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pkt_lbhdr.c @@ -5,8 +5,7 @@ * Edits to this file will be lost when it is regenerated. * Tool: INTERNAL/regs/xgs/generate-pmd.pl * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pkt_rxpmd.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pkt_rxpmd.c similarity index 98% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pkt_rxpmd.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pkt_rxpmd.c index 771162ef02d..9449bce00cb 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pkt_rxpmd.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pkt_rxpmd.c @@ -5,8 +5,7 @@ * Edits to this file will be lost when it is regenerated. * Tool: INTERNAL/regs/xgs/generate-pmd.pl * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -429,8 +428,6 @@ const bcmpkt_rxpmd_fget_t bcm56780_a0_rxpmd_fget = { NULL, NULL, NULL, - NULL, - NULL, NULL } }; @@ -536,8 +533,6 @@ const bcmpkt_rxpmd_fset_t bcm56780_a0_rxpmd_fset = { NULL, NULL, NULL, - NULL, - NULL, NULL } }; @@ -564,7 +559,7 @@ static int bcm56780_a0_rxpmd_view_infos[BCMPKT_RXPMD_FID_COUNT] = { -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -2, -1, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, - -2, -2, -2, -2, -2, + -2, -2, -2, }; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pkt_rxpmd_field.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pkt_rxpmd_field.c similarity index 92% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pkt_rxpmd_field.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pkt_rxpmd_field.c index fdec9264795..e860a841cb7 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pkt_rxpmd_field.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pkt_rxpmd_field.c @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -53,11 +52,6 @@ int bcm56780_a0_rxpmd_flex_fget(uint32_t *data, return SHR_E_PARAM; } - /* Skip fields with minbit >= 448.*/ - if (minbit >= 448) { - return SHR_E_PARAM; - } - if (diff == 31) { *val = data[index]; } else if (diff < 31) { @@ -89,11 +83,6 @@ int bcm56780_a0_rxpmd_flex_fset(uint32_t *data, return SHR_E_PARAM; } - /* Skip fields with minbit >= 448.*/ - if (minbit >= 448) { - return SHR_E_PARAM; - } - if (diff == 31) { data[index] = val; } else if (diff < 31) { diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pkt_txpmd.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pkt_txpmd.c similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pkt_txpmd.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pkt_txpmd.c index 47e77bf22c4..d02b97769a2 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pkt_txpmd.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pkt_txpmd.c @@ -5,8 +5,7 @@ * Edits to this file will be lost when it is regenerated. * Tool: INTERNAL/regs/xgs/generate-pmd.pl * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -437,7 +436,6 @@ const bcmpkt_txpmd_fget_t bcm56780_a0_txpmd_fget = { NULL, NULL, NULL, - NULL, NULL } }; @@ -573,7 +571,6 @@ const bcmpkt_txpmd_fset_t bcm56780_a0_txpmd_fset = { NULL, NULL, NULL, - NULL, NULL } }; @@ -599,7 +596,7 @@ static int bcm56780_a0_txpmd_view_infos[BCMPKT_TXPMD_FID_COUNT] = { -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, - -2, -2, + -2, }; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pmd_field.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pmd_field.c similarity index 79% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pmd_field.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pmd_field.c index 32298144fbd..b3febee5fef 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pmd_field.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pmd_field.c @@ -5,8 +5,7 @@ * Edits to this file will be lost when it is regenerated. * Tool: INTERNAL/regs/xgs/generate-pmd.pl * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -1000,29 +999,29 @@ field_fmt_9_9_3_3_get(uint32_t *pmd, uint32_t *val) } static bcmpkt_pmd_field_t bcm56780_a0_rxpmd_fields[BCM56780_A0_RXPMD_COUNT] = { - {"FLEX_DATA",14, field_fmt_0_447_17_4_info, field_fmt_0_447_17_4_set, field_fmt_0_447_17_4_get, NULL, 0}, - {"MPB_FLEX_DATA_TYPE",1, field_fmt_448_454_3_3_info, field_fmt_448_454_3_3_set, field_fmt_448_454_3_3_get, NULL, 0}, - {"DOP_TRIGGER",1, field_fmt_455_455_3_3_info, field_fmt_455_455_3_3_set, field_fmt_455_455_3_3_get, NULL, 0}, - {"EPARSE_EXTRACT_OFFSETS_3_0_OR_MIRROR_ENCAP_INDEX",1, field_fmt_456_459_3_3_info, field_fmt_456_459_3_3_set, field_fmt_456_459_3_3_get, NULL, 0}, - {"EPARSE_EXTRACT_OFFSETS_7_4",1, field_fmt_460_463_3_3_info, field_fmt_460_463_3_3_set, field_fmt_460_463_3_3_get, NULL, 0}, - {"INT_CN",1, field_fmt_464_465_3_3_info, field_fmt_464_465_3_3_set, field_fmt_464_465_3_3_get, NULL, 0}, - {"CNG",1, field_fmt_466_467_3_3_info, field_fmt_466_467_3_3_set, field_fmt_466_467_3_3_get, NULL, 0}, - {"MULTICAST",1, field_fmt_468_468_3_3_info, field_fmt_468_468_3_3_set, field_fmt_468_468_3_3_get, NULL, 0}, - {"IP_ROUTED",1, field_fmt_469_469_3_3_info, field_fmt_469_469_3_3_set, field_fmt_469_469_3_3_get, NULL, 0}, - {"COPY_TO_CPU",1, field_fmt_470_470_3_3_info, field_fmt_470_470_3_3_set, field_fmt_470_470_3_3_get, NULL, 0}, - {"TRUNCATE_CPU_COPY",1, field_fmt_471_471_3_3_info, field_fmt_471_471_3_3_set, field_fmt_471_471_3_3_get, NULL, 0}, - {"EGR_ZONE_REMAP_CTRL",1, field_fmt_472_475_3_3_info, field_fmt_472_475_3_3_set, field_fmt_472_475_3_3_get, NULL, 0}, - {"SWITCH",1, field_fmt_476_476_3_3_info, field_fmt_476_476_3_3_set, field_fmt_476_476_3_3_get, NULL, 0}, - {"L3ONLY",1, field_fmt_477_477_3_3_info, field_fmt_477_477_3_3_set, field_fmt_477_477_3_3_get, NULL, 0}, - {"UC_SW_COPY_DROPPED",1, field_fmt_478_478_3_3_info, field_fmt_478_478_3_3_set, field_fmt_478_478_3_3_get, NULL, 0}, - {"UNICAST_QUEUE",1, field_fmt_479_479_3_3_info, field_fmt_479_479_3_3_set, field_fmt_479_479_3_3_get, NULL, 0}, - {"MATCH_ID_LO",1, field_fmt_480_511_2_2_info, field_fmt_480_511_2_2_set, field_fmt_480_511_2_2_get, NULL, 0}, - {"MATCH_ID_HI",1, field_fmt_512_527_1_1_info, field_fmt_512_527_1_1_set, field_fmt_512_527_1_1_get, NULL, 0}, - {"REPLICATION_OR_NHOP_INDEX",1, field_fmt_528_543_1_1_info, field_fmt_528_543_1_1_set, field_fmt_528_543_1_1_get, NULL, 0}, - {"DMA_HEADER_VERSION",1, field_fmt_544_545_0_0_info, field_fmt_544_545_0_0_set, field_fmt_544_545_0_0_get, NULL, 0}, - {"QUEUE_NUM",1, field_fmt_546_551_0_0_info, field_fmt_546_551_0_0_set, field_fmt_546_551_0_0_get, NULL, 0}, - {"SRC_PORT_NUM",1, field_fmt_552_559_0_0_info, field_fmt_552_559_0_0_set, field_fmt_552_559_0_0_get, NULL, 0}, - {"PKT_LENGTH",1, field_fmt_560_575_0_0_info, field_fmt_560_575_0_0_set, field_fmt_560_575_0_0_get, NULL, 0}, + {14, field_fmt_0_447_17_4_info, field_fmt_0_447_17_4_set, field_fmt_0_447_17_4_get, NULL, 0}, + {1, field_fmt_448_454_3_3_info, field_fmt_448_454_3_3_set, field_fmt_448_454_3_3_get, NULL, 0}, + {1, field_fmt_455_455_3_3_info, field_fmt_455_455_3_3_set, field_fmt_455_455_3_3_get, NULL, 0}, + {1, field_fmt_456_459_3_3_info, field_fmt_456_459_3_3_set, field_fmt_456_459_3_3_get, NULL, 0}, + {1, field_fmt_460_463_3_3_info, field_fmt_460_463_3_3_set, field_fmt_460_463_3_3_get, NULL, 0}, + {1, field_fmt_464_465_3_3_info, field_fmt_464_465_3_3_set, field_fmt_464_465_3_3_get, NULL, 0}, + {1, field_fmt_466_467_3_3_info, field_fmt_466_467_3_3_set, field_fmt_466_467_3_3_get, NULL, 0}, + {1, field_fmt_468_468_3_3_info, field_fmt_468_468_3_3_set, field_fmt_468_468_3_3_get, NULL, 0}, + {1, field_fmt_469_469_3_3_info, field_fmt_469_469_3_3_set, field_fmt_469_469_3_3_get, NULL, 0}, + {1, field_fmt_470_470_3_3_info, field_fmt_470_470_3_3_set, field_fmt_470_470_3_3_get, NULL, 0}, + {1, field_fmt_471_471_3_3_info, field_fmt_471_471_3_3_set, field_fmt_471_471_3_3_get, NULL, 0}, + {1, field_fmt_472_475_3_3_info, field_fmt_472_475_3_3_set, field_fmt_472_475_3_3_get, NULL, 0}, + {1, field_fmt_476_476_3_3_info, field_fmt_476_476_3_3_set, field_fmt_476_476_3_3_get, NULL, 0}, + {1, field_fmt_477_477_3_3_info, field_fmt_477_477_3_3_set, field_fmt_477_477_3_3_get, NULL, 0}, + {1, field_fmt_478_478_3_3_info, field_fmt_478_478_3_3_set, field_fmt_478_478_3_3_get, NULL, 0}, + {1, field_fmt_479_479_3_3_info, field_fmt_479_479_3_3_set, field_fmt_479_479_3_3_get, NULL, 0}, + {1, field_fmt_480_511_2_2_info, field_fmt_480_511_2_2_set, field_fmt_480_511_2_2_get, NULL, 0}, + {1, field_fmt_512_527_1_1_info, field_fmt_512_527_1_1_set, field_fmt_512_527_1_1_get, NULL, 0}, + {1, field_fmt_528_543_1_1_info, field_fmt_528_543_1_1_set, field_fmt_528_543_1_1_get, NULL, 0}, + {1, field_fmt_544_545_0_0_info, field_fmt_544_545_0_0_set, field_fmt_544_545_0_0_get, NULL, 0}, + {1, field_fmt_546_551_0_0_info, field_fmt_546_551_0_0_set, field_fmt_546_551_0_0_get, NULL, 0}, + {1, field_fmt_552_559_0_0_info, field_fmt_552_559_0_0_set, field_fmt_552_559_0_0_get, NULL, 0}, + {1, field_fmt_560_575_0_0_info, field_fmt_560_575_0_0_set, field_fmt_560_575_0_0_get, NULL, 0}, }; @@ -1060,28 +1059,28 @@ static const shr_enum_map_t bcm56780_a0_txpmd_start_names[] = }; static bcmpkt_pmd_field_t bcm56780_a0_txpmd_fields[BCM56780_A0_TXPMD_COUNT] = { - {"CELL_LENGTH",1, field_fmt_0_8_3_3_info, field_fmt_0_8_3_3_set, field_fmt_0_8_3_3_get, NULL, 0}, - {"EOP",1, field_fmt_9_9_3_3_info, field_fmt_9_9_3_3_set, field_fmt_9_9_3_3_get, NULL, 0}, - {"SOP",1, field_fmt_10_10_3_3_info, field_fmt_10_10_3_3_set, field_fmt_10_10_3_3_get, NULL, 0}, - {"PKT_LENGTH",1, field_fmt_11_24_3_3_info, field_fmt_11_24_3_3_set, field_fmt_11_24_3_3_get, NULL, 0}, - {"COS",1, field_fmt_39_44_2_2_info, field_fmt_39_44_2_2_set, field_fmt_39_44_2_2_get, NULL, 0}, - {"UNICAST_PKT",1, field_fmt_45_45_2_2_info, field_fmt_45_45_2_2_set, field_fmt_45_45_2_2_get, NULL, 0}, - {"UNICAST",1, field_fmt_46_46_2_2_info, field_fmt_46_46_2_2_set, field_fmt_46_46_2_2_get, NULL, 0}, - {"SET_L2BM",1, field_fmt_47_47_2_2_info, field_fmt_47_47_2_2_set, field_fmt_47_47_2_2_get, NULL, 0}, - {"RQE_Q_NUM",1, field_fmt_48_51_2_2_info, field_fmt_48_51_2_2_set, field_fmt_48_51_2_2_get, NULL, 0}, - {"SPAP",1, field_fmt_52_53_2_2_info, field_fmt_52_53_2_2_set, field_fmt_52_53_2_2_get, NULL, 0}, - {"SPID",1, field_fmt_54_55_2_2_info, field_fmt_54_55_2_2_set, field_fmt_54_55_2_2_get, NULL, 0}, - {"SPID_OVERRIDE",1, field_fmt_56_56_2_2_info, field_fmt_56_56_2_2_set, field_fmt_56_56_2_2_get, NULL, 0}, - {"INPUT_PRI",1, field_fmt_57_60_2_2_info, field_fmt_57_60_2_2_set, field_fmt_57_60_2_2_get, NULL, 0}, - {"LOCAL_DEST_PORT",1, field_fmt_64_71_1_1_info, field_fmt_64_71_1_1_set, field_fmt_64_71_1_1_get, NULL, 0}, - {"IEEE1588_TIMESTAMP_HDR_OFFSET",1, field_fmt_72_79_1_1_info, field_fmt_72_79_1_1_set, field_fmt_72_79_1_1_get, NULL, 0}, - {"TX_TS",1, field_fmt_80_80_1_1_info, field_fmt_80_80_1_1_set, field_fmt_80_80_1_1_get, NULL, 0}, - {"IEEE1588_INGRESS_TIMESTAMP_SIGN",1, field_fmt_81_81_1_1_info, field_fmt_81_81_1_1_set, field_fmt_81_81_1_1_get, NULL, 0}, - {"IEEE1588_REGEN_UDP_CHECKSUM",1, field_fmt_82_82_1_1_info, field_fmt_82_82_1_1_set, field_fmt_82_82_1_1_get, NULL, 0}, - {"IEEE1588_ONE_STEP_ENABLE",1, field_fmt_83_83_1_1_info, field_fmt_83_83_1_1_set, field_fmt_83_83_1_1_get, NULL, 0}, - {"CELL_ERROR",1, field_fmt_84_84_1_1_info, field_fmt_84_84_1_1_set, field_fmt_84_84_1_1_get, NULL, 0}, - {"HEADER_TYPE",1, field_fmt_120_125_0_0_info, field_fmt_120_125_0_0_set, field_fmt_120_125_0_0_get, bcm56780_a0_txpmd_header_type_names, 0}, - {"START",1, field_fmt_126_127_0_0_info, field_fmt_126_127_0_0_set, field_fmt_126_127_0_0_get, bcm56780_a0_txpmd_start_names, 0}, + {1, field_fmt_0_8_3_3_info, field_fmt_0_8_3_3_set, field_fmt_0_8_3_3_get, NULL, 0}, + {1, field_fmt_9_9_3_3_info, field_fmt_9_9_3_3_set, field_fmt_9_9_3_3_get, NULL, 0}, + {1, field_fmt_10_10_3_3_info, field_fmt_10_10_3_3_set, field_fmt_10_10_3_3_get, NULL, 0}, + {1, field_fmt_11_24_3_3_info, field_fmt_11_24_3_3_set, field_fmt_11_24_3_3_get, NULL, 0}, + {1, field_fmt_39_44_2_2_info, field_fmt_39_44_2_2_set, field_fmt_39_44_2_2_get, NULL, 0}, + {1, field_fmt_45_45_2_2_info, field_fmt_45_45_2_2_set, field_fmt_45_45_2_2_get, NULL, 0}, + {1, field_fmt_46_46_2_2_info, field_fmt_46_46_2_2_set, field_fmt_46_46_2_2_get, NULL, 0}, + {1, field_fmt_47_47_2_2_info, field_fmt_47_47_2_2_set, field_fmt_47_47_2_2_get, NULL, 0}, + {1, field_fmt_48_51_2_2_info, field_fmt_48_51_2_2_set, field_fmt_48_51_2_2_get, NULL, 0}, + {1, field_fmt_52_53_2_2_info, field_fmt_52_53_2_2_set, field_fmt_52_53_2_2_get, NULL, 0}, + {1, field_fmt_54_55_2_2_info, field_fmt_54_55_2_2_set, field_fmt_54_55_2_2_get, NULL, 0}, + {1, field_fmt_56_56_2_2_info, field_fmt_56_56_2_2_set, field_fmt_56_56_2_2_get, NULL, 0}, + {1, field_fmt_57_60_2_2_info, field_fmt_57_60_2_2_set, field_fmt_57_60_2_2_get, NULL, 0}, + {1, field_fmt_64_71_1_1_info, field_fmt_64_71_1_1_set, field_fmt_64_71_1_1_get, NULL, 0}, + {1, field_fmt_72_79_1_1_info, field_fmt_72_79_1_1_set, field_fmt_72_79_1_1_get, NULL, 0}, + {1, field_fmt_80_80_1_1_info, field_fmt_80_80_1_1_set, field_fmt_80_80_1_1_get, NULL, 0}, + {1, field_fmt_81_81_1_1_info, field_fmt_81_81_1_1_set, field_fmt_81_81_1_1_get, NULL, 0}, + {1, field_fmt_82_82_1_1_info, field_fmt_82_82_1_1_set, field_fmt_82_82_1_1_get, NULL, 0}, + {1, field_fmt_83_83_1_1_info, field_fmt_83_83_1_1_set, field_fmt_83_83_1_1_get, NULL, 0}, + {1, field_fmt_84_84_1_1_info, field_fmt_84_84_1_1_set, field_fmt_84_84_1_1_get, NULL, 0}, + {1, field_fmt_120_125_0_0_info, field_fmt_120_125_0_0_set, field_fmt_120_125_0_0_get, bcm56780_a0_txpmd_header_type_names, 0}, + {1, field_fmt_126_127_0_0_info, field_fmt_126_127_0_0_set, field_fmt_126_127_0_0_get, bcm56780_a0_txpmd_start_names, 0}, }; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_lbhdr.c similarity index 98% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_lbhdr.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_lbhdr.c index 74b3eed81aa..653db2b54fb 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_lbhdr.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_lbhdr.c @@ -5,8 +5,7 @@ * Edits to this file will be lost when it is regenerated. * Tool: INTERNAL/regs/xgs/generate-pmd.pl * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_rxpmd.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_rxpmd.c similarity index 98% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_rxpmd.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_rxpmd.c index 095a537d3e5..5d5538534e7 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_rxpmd.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_rxpmd.c @@ -5,8 +5,7 @@ * Edits to this file will be lost when it is regenerated. * Tool: INTERNAL/regs/xgs/generate-pmd.pl * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -393,8 +392,6 @@ const bcmpkt_rxpmd_fget_t bcm56880_a0_rxpmd_fget = { NULL, NULL, NULL, - NULL, - NULL, NULL } }; @@ -500,8 +497,6 @@ const bcmpkt_rxpmd_fset_t bcm56880_a0_rxpmd_fset = { NULL, NULL, NULL, - NULL, - NULL, NULL } }; @@ -528,7 +523,7 @@ static int bcm56880_a0_rxpmd_view_infos[BCMPKT_RXPMD_FID_COUNT] = { -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, - -2, -2, -2, -2, -2, + -2, -2, -2, }; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_rxpmd_field.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_rxpmd_field.c similarity index 98% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_rxpmd_field.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_rxpmd_field.c index 1fccf6af956..2baed240102 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_rxpmd_field.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_rxpmd_field.c @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_txpmd.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_txpmd.c similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_txpmd.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_txpmd.c index 6fa6cbc6108..10903d9878a 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_txpmd.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pkt_txpmd.c @@ -5,8 +5,7 @@ * Edits to this file will be lost when it is regenerated. * Tool: INTERNAL/regs/xgs/generate-pmd.pl * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -437,7 +436,6 @@ const bcmpkt_txpmd_fget_t bcm56880_a0_txpmd_fget = { NULL, NULL, NULL, - NULL, NULL } }; @@ -573,7 +571,6 @@ const bcmpkt_txpmd_fset_t bcm56880_a0_txpmd_fset = { NULL, NULL, NULL, - NULL, NULL } }; @@ -599,7 +596,7 @@ static int bcm56880_a0_txpmd_view_infos[BCMPKT_TXPMD_FID_COUNT] = { -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, - -2, -2, + -2, }; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pmd_field.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pmd_field.c similarity index 80% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pmd_field.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pmd_field.c index 66b3f1557ef..4672a7a8d4f 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pmd_field.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pmd_field.c @@ -5,8 +5,7 @@ * Edits to this file will be lost when it is regenerated. * Tool: INTERNAL/regs/xgs/generate-pmd.pl * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -935,26 +934,26 @@ field_fmt_9_9_3_3_get(uint32_t *pmd, uint32_t *val) } static bcmpkt_pmd_field_t bcm56880_a0_rxpmd_fields[BCM56880_A0_RXPMD_COUNT] = { - {"FLEX_DATA",13, field_fmt_32_447_16_4_info, field_fmt_32_447_16_4_set, field_fmt_32_447_16_4_get, NULL, 0}, - {"MPB_FLEX_DATA_TYPE",1, field_fmt_448_454_3_3_info, field_fmt_448_454_3_3_set, field_fmt_448_454_3_3_get, NULL, 0}, - {"INT_CN",1, field_fmt_456_457_3_3_info, field_fmt_456_457_3_3_set, field_fmt_456_457_3_3_get, NULL, 0}, - {"CNG",1, field_fmt_458_459_3_3_info, field_fmt_458_459_3_3_set, field_fmt_458_459_3_3_get, NULL, 0}, - {"MULTICAST",1, field_fmt_464_464_3_3_info, field_fmt_464_464_3_3_set, field_fmt_464_464_3_3_get, NULL, 0}, - {"IP_ROUTED",1, field_fmt_465_465_3_3_info, field_fmt_465_465_3_3_set, field_fmt_465_465_3_3_get, NULL, 0}, - {"COPY_TO_CPU",1, field_fmt_468_468_3_3_info, field_fmt_468_468_3_3_set, field_fmt_468_468_3_3_get, NULL, 0}, - {"TRUNCATE_CPU_COPY",1, field_fmt_469_469_3_3_info, field_fmt_469_469_3_3_set, field_fmt_469_469_3_3_get, NULL, 0}, - {"EGR_ZONE_REMAP_CTRL",1, field_fmt_472_475_3_3_info, field_fmt_472_475_3_3_set, field_fmt_472_475_3_3_get, NULL, 0}, - {"SWITCH",1, field_fmt_476_476_3_3_info, field_fmt_476_476_3_3_set, field_fmt_476_476_3_3_get, NULL, 0}, - {"L3ONLY",1, field_fmt_477_477_3_3_info, field_fmt_477_477_3_3_set, field_fmt_477_477_3_3_get, NULL, 0}, - {"UC_SW_COPY_DROPPED",1, field_fmt_478_478_3_3_info, field_fmt_478_478_3_3_set, field_fmt_478_478_3_3_get, NULL, 0}, - {"UNICAST_QUEUE",1, field_fmt_479_479_3_3_info, field_fmt_479_479_3_3_set, field_fmt_479_479_3_3_get, NULL, 0}, - {"MATCH_ID_LO",1, field_fmt_480_511_2_2_info, field_fmt_480_511_2_2_set, field_fmt_480_511_2_2_get, NULL, 0}, - {"MATCH_ID_HI",1, field_fmt_512_527_1_1_info, field_fmt_512_527_1_1_set, field_fmt_512_527_1_1_get, NULL, 0}, - {"REPLICATION_OR_NHOP_INDEX",1, field_fmt_528_543_1_1_info, field_fmt_528_543_1_1_set, field_fmt_528_543_1_1_get, NULL, 0}, - {"DMA_HEADER_VERSION",1, field_fmt_544_545_0_0_info, field_fmt_544_545_0_0_set, field_fmt_544_545_0_0_get, NULL, 0}, - {"QUEUE_NUM",1, field_fmt_546_551_0_0_info, field_fmt_546_551_0_0_set, field_fmt_546_551_0_0_get, NULL, 0}, - {"SRC_PORT_NUM",1, field_fmt_552_559_0_0_info, field_fmt_552_559_0_0_set, field_fmt_552_559_0_0_get, NULL, 0}, - {"PKT_LENGTH",1, field_fmt_560_575_0_0_info, field_fmt_560_575_0_0_set, field_fmt_560_575_0_0_get, NULL, 0}, + {13, field_fmt_32_447_16_4_info, field_fmt_32_447_16_4_set, field_fmt_32_447_16_4_get, NULL, 0}, + {1, field_fmt_448_454_3_3_info, field_fmt_448_454_3_3_set, field_fmt_448_454_3_3_get, NULL, 0}, + {1, field_fmt_456_457_3_3_info, field_fmt_456_457_3_3_set, field_fmt_456_457_3_3_get, NULL, 0}, + {1, field_fmt_458_459_3_3_info, field_fmt_458_459_3_3_set, field_fmt_458_459_3_3_get, NULL, 0}, + {1, field_fmt_464_464_3_3_info, field_fmt_464_464_3_3_set, field_fmt_464_464_3_3_get, NULL, 0}, + {1, field_fmt_465_465_3_3_info, field_fmt_465_465_3_3_set, field_fmt_465_465_3_3_get, NULL, 0}, + {1, field_fmt_468_468_3_3_info, field_fmt_468_468_3_3_set, field_fmt_468_468_3_3_get, NULL, 0}, + {1, field_fmt_469_469_3_3_info, field_fmt_469_469_3_3_set, field_fmt_469_469_3_3_get, NULL, 0}, + {1, field_fmt_472_475_3_3_info, field_fmt_472_475_3_3_set, field_fmt_472_475_3_3_get, NULL, 0}, + {1, field_fmt_476_476_3_3_info, field_fmt_476_476_3_3_set, field_fmt_476_476_3_3_get, NULL, 0}, + {1, field_fmt_477_477_3_3_info, field_fmt_477_477_3_3_set, field_fmt_477_477_3_3_get, NULL, 0}, + {1, field_fmt_478_478_3_3_info, field_fmt_478_478_3_3_set, field_fmt_478_478_3_3_get, NULL, 0}, + {1, field_fmt_479_479_3_3_info, field_fmt_479_479_3_3_set, field_fmt_479_479_3_3_get, NULL, 0}, + {1, field_fmt_480_511_2_2_info, field_fmt_480_511_2_2_set, field_fmt_480_511_2_2_get, NULL, 0}, + {1, field_fmt_512_527_1_1_info, field_fmt_512_527_1_1_set, field_fmt_512_527_1_1_get, NULL, 0}, + {1, field_fmt_528_543_1_1_info, field_fmt_528_543_1_1_set, field_fmt_528_543_1_1_get, NULL, 0}, + {1, field_fmt_544_545_0_0_info, field_fmt_544_545_0_0_set, field_fmt_544_545_0_0_get, NULL, 0}, + {1, field_fmt_546_551_0_0_info, field_fmt_546_551_0_0_set, field_fmt_546_551_0_0_get, NULL, 0}, + {1, field_fmt_552_559_0_0_info, field_fmt_552_559_0_0_set, field_fmt_552_559_0_0_get, NULL, 0}, + {1, field_fmt_560_575_0_0_info, field_fmt_560_575_0_0_set, field_fmt_560_575_0_0_get, NULL, 0}, }; @@ -992,28 +991,28 @@ static const shr_enum_map_t bcm56880_a0_txpmd_start_names[] = }; static bcmpkt_pmd_field_t bcm56880_a0_txpmd_fields[BCM56880_A0_TXPMD_COUNT] = { - {"CELL_LENGTH",1, field_fmt_0_7_3_3_info, field_fmt_0_7_3_3_set, field_fmt_0_7_3_3_get, NULL, 0}, - {"EOP",1, field_fmt_8_8_3_3_info, field_fmt_8_8_3_3_set, field_fmt_8_8_3_3_get, NULL, 0}, - {"SOP",1, field_fmt_9_9_3_3_info, field_fmt_9_9_3_3_set, field_fmt_9_9_3_3_get, NULL, 0}, - {"PKT_LENGTH",1, field_fmt_10_23_3_3_info, field_fmt_10_23_3_3_set, field_fmt_10_23_3_3_get, NULL, 0}, - {"COS",1, field_fmt_39_44_2_2_info, field_fmt_39_44_2_2_set, field_fmt_39_44_2_2_get, NULL, 0}, - {"UNICAST_PKT",1, field_fmt_45_45_2_2_info, field_fmt_45_45_2_2_set, field_fmt_45_45_2_2_get, NULL, 0}, - {"UNICAST",1, field_fmt_46_46_2_2_info, field_fmt_46_46_2_2_set, field_fmt_46_46_2_2_get, NULL, 0}, - {"SET_L2BM",1, field_fmt_47_47_2_2_info, field_fmt_47_47_2_2_set, field_fmt_47_47_2_2_get, NULL, 0}, - {"RQE_Q_NUM",1, field_fmt_48_51_2_2_info, field_fmt_48_51_2_2_set, field_fmt_48_51_2_2_get, NULL, 0}, - {"SPAP",1, field_fmt_52_53_2_2_info, field_fmt_52_53_2_2_set, field_fmt_52_53_2_2_get, NULL, 0}, - {"SPID",1, field_fmt_54_55_2_2_info, field_fmt_54_55_2_2_set, field_fmt_54_55_2_2_get, NULL, 0}, - {"SPID_OVERRIDE",1, field_fmt_56_56_2_2_info, field_fmt_56_56_2_2_set, field_fmt_56_56_2_2_get, NULL, 0}, - {"INPUT_PRI",1, field_fmt_57_60_2_2_info, field_fmt_57_60_2_2_set, field_fmt_57_60_2_2_get, NULL, 0}, - {"LOCAL_DEST_PORT",1, field_fmt_64_71_1_1_info, field_fmt_64_71_1_1_set, field_fmt_64_71_1_1_get, NULL, 0}, - {"IEEE1588_TIMESTAMP_HDR_OFFSET",1, field_fmt_72_79_1_1_info, field_fmt_72_79_1_1_set, field_fmt_72_79_1_1_get, NULL, 0}, - {"TX_TS",1, field_fmt_80_80_1_1_info, field_fmt_80_80_1_1_set, field_fmt_80_80_1_1_get, NULL, 0}, - {"IEEE1588_INGRESS_TIMESTAMP_SIGN",1, field_fmt_81_81_1_1_info, field_fmt_81_81_1_1_set, field_fmt_81_81_1_1_get, NULL, 0}, - {"IEEE1588_REGEN_UDP_CHECKSUM",1, field_fmt_82_82_1_1_info, field_fmt_82_82_1_1_set, field_fmt_82_82_1_1_get, NULL, 0}, - {"IEEE1588_ONE_STEP_ENABLE",1, field_fmt_83_83_1_1_info, field_fmt_83_83_1_1_set, field_fmt_83_83_1_1_get, NULL, 0}, - {"CELL_ERROR",1, field_fmt_84_84_1_1_info, field_fmt_84_84_1_1_set, field_fmt_84_84_1_1_get, NULL, 0}, - {"HEADER_TYPE",1, field_fmt_120_125_0_0_info, field_fmt_120_125_0_0_set, field_fmt_120_125_0_0_get, bcm56880_a0_txpmd_header_type_names, 0}, - {"START",1, field_fmt_126_127_0_0_info, field_fmt_126_127_0_0_set, field_fmt_126_127_0_0_get, bcm56880_a0_txpmd_start_names, 0}, + {1, field_fmt_0_7_3_3_info, field_fmt_0_7_3_3_set, field_fmt_0_7_3_3_get, NULL, 0}, + {1, field_fmt_8_8_3_3_info, field_fmt_8_8_3_3_set, field_fmt_8_8_3_3_get, NULL, 0}, + {1, field_fmt_9_9_3_3_info, field_fmt_9_9_3_3_set, field_fmt_9_9_3_3_get, NULL, 0}, + {1, field_fmt_10_23_3_3_info, field_fmt_10_23_3_3_set, field_fmt_10_23_3_3_get, NULL, 0}, + {1, field_fmt_39_44_2_2_info, field_fmt_39_44_2_2_set, field_fmt_39_44_2_2_get, NULL, 0}, + {1, field_fmt_45_45_2_2_info, field_fmt_45_45_2_2_set, field_fmt_45_45_2_2_get, NULL, 0}, + {1, field_fmt_46_46_2_2_info, field_fmt_46_46_2_2_set, field_fmt_46_46_2_2_get, NULL, 0}, + {1, field_fmt_47_47_2_2_info, field_fmt_47_47_2_2_set, field_fmt_47_47_2_2_get, NULL, 0}, + {1, field_fmt_48_51_2_2_info, field_fmt_48_51_2_2_set, field_fmt_48_51_2_2_get, NULL, 0}, + {1, field_fmt_52_53_2_2_info, field_fmt_52_53_2_2_set, field_fmt_52_53_2_2_get, NULL, 0}, + {1, field_fmt_54_55_2_2_info, field_fmt_54_55_2_2_set, field_fmt_54_55_2_2_get, NULL, 0}, + {1, field_fmt_56_56_2_2_info, field_fmt_56_56_2_2_set, field_fmt_56_56_2_2_get, NULL, 0}, + {1, field_fmt_57_60_2_2_info, field_fmt_57_60_2_2_set, field_fmt_57_60_2_2_get, NULL, 0}, + {1, field_fmt_64_71_1_1_info, field_fmt_64_71_1_1_set, field_fmt_64_71_1_1_get, NULL, 0}, + {1, field_fmt_72_79_1_1_info, field_fmt_72_79_1_1_set, field_fmt_72_79_1_1_get, NULL, 0}, + {1, field_fmt_80_80_1_1_info, field_fmt_80_80_1_1_set, field_fmt_80_80_1_1_get, NULL, 0}, + {1, field_fmt_81_81_1_1_info, field_fmt_81_81_1_1_set, field_fmt_81_81_1_1_get, NULL, 0}, + {1, field_fmt_82_82_1_1_info, field_fmt_82_82_1_1_set, field_fmt_82_82_1_1_get, NULL, 0}, + {1, field_fmt_83_83_1_1_info, field_fmt_83_83_1_1_set, field_fmt_83_83_1_1_get, NULL, 0}, + {1, field_fmt_84_84_1_1_info, field_fmt_84_84_1_1_set, field_fmt_84_84_1_1_get, NULL, 0}, + {1, field_fmt_120_125_0_0_info, field_fmt_120_125_0_0_set, field_fmt_120_125_0_0_get, bcm56880_a0_txpmd_header_type_names, 0}, + {1, field_fmt_126_127_0_0_info, field_fmt_126_127_0_0_set, field_fmt_126_127_0_0_get, bcm56880_a0_txpmd_start_names, 0}, }; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_lbhdr.c similarity index 98% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_lbhdr.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_lbhdr.c index e26015286c6..fbe82b1b60e 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_lbhdr.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_lbhdr.c @@ -5,8 +5,7 @@ * Edits to this file will be lost when it is regenerated. * Tool: INTERNAL/regs/xgs/generate-pmd.pl * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_rxpmd.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_rxpmd.c similarity index 98% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_rxpmd.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_rxpmd.c index 7714f45a3c1..6e1c8c1984b 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_rxpmd.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_rxpmd.c @@ -5,8 +5,7 @@ * Edits to this file will be lost when it is regenerated. * Tool: INTERNAL/regs/xgs/generate-pmd.pl * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -417,8 +416,6 @@ const bcmpkt_rxpmd_fget_t bcm56890_a0_rxpmd_fget = { NULL, NULL, NULL, - NULL, - NULL, NULL } }; @@ -524,8 +521,6 @@ const bcmpkt_rxpmd_fset_t bcm56890_a0_rxpmd_fset = { NULL, NULL, NULL, - NULL, - NULL, NULL } }; @@ -552,7 +547,7 @@ static int bcm56890_a0_rxpmd_view_infos[BCMPKT_RXPMD_FID_COUNT] = { -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -2, -2, -1, -1, -1, -1, -1, -1, -1, -1, -2, -1, -1, -2, -2, -2, -2, -2, -2, -1, -2, -1, -1, -2, -2, -2, -2, -2, -2, -2, - -2, -2, -2, -2, -2, + -2, -2, -2, }; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_rxpmd_field.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_rxpmd_field.c similarity index 98% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_rxpmd_field.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_rxpmd_field.c index 07c18685fc3..131e8022a76 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_rxpmd_field.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_rxpmd_field.c @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_txpmd.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_txpmd.c similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_txpmd.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_txpmd.c index 168047d493e..560b2990dd3 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_txpmd.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pkt_txpmd.c @@ -5,8 +5,7 @@ * Edits to this file will be lost when it is regenerated. * Tool: INTERNAL/regs/xgs/generate-pmd.pl * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -523,7 +522,6 @@ const bcmpkt_txpmd_fget_t bcm56890_a0_txpmd_fget = { NULL, NULL, NULL, - NULL, NULL } }; @@ -659,7 +657,6 @@ const bcmpkt_txpmd_fset_t bcm56890_a0_txpmd_fset = { NULL, NULL, NULL, - NULL, NULL } }; @@ -685,7 +682,7 @@ static int bcm56890_a0_txpmd_view_infos[BCMPKT_TXPMD_FID_COUNT] = { -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, - -2, -2, + -2, }; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pmd_field.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pmd_field.c similarity index 79% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pmd_field.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pmd_field.c index 9671b4c3d01..08996622a1f 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pmd_field.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pmd_field.c @@ -5,8 +5,7 @@ * Edits to this file will be lost when it is regenerated. * Tool: INTERNAL/regs/xgs/generate-pmd.pl * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -1107,28 +1106,28 @@ field_fmt_9_9_3_3_get(uint32_t *pmd, uint32_t *val) } static bcmpkt_pmd_field_t bcm56890_a0_rxpmd_fields[BCM56890_A0_RXPMD_COUNT] = { - {"FLEX_DATA",14, field_fmt_0_447_17_4_info, field_fmt_0_447_17_4_set, field_fmt_0_447_17_4_get, NULL, 0}, - {"MPB_FLEX_DATA_TYPE",1, field_fmt_449_454_3_3_info, field_fmt_449_454_3_3_set, field_fmt_449_454_3_3_get, NULL, 0}, - {"DOP_TRIGGER",1, field_fmt_455_455_3_3_info, field_fmt_455_455_3_3_set, field_fmt_455_455_3_3_get, NULL, 0}, - {"EPARSE_EXTRACT_OFFSETS_3_0_OR_MIRROR_ENCAP_INDEX",1, field_fmt_456_459_3_3_info, field_fmt_456_459_3_3_set, field_fmt_456_459_3_3_get, NULL, 0}, - {"EPARSE_EXTRACT_OFFSETS_6_4",1, field_fmt_460_462_3_3_info, field_fmt_460_462_3_3_set, field_fmt_460_462_3_3_get, NULL, 0}, - {"INT_CN",1, field_fmt_464_465_3_3_info, field_fmt_464_465_3_3_set, field_fmt_464_465_3_3_get, NULL, 0}, - {"CNG",1, field_fmt_466_467_3_3_info, field_fmt_466_467_3_3_set, field_fmt_466_467_3_3_get, NULL, 0}, - {"MULTICAST",1, field_fmt_468_468_3_3_info, field_fmt_468_468_3_3_set, field_fmt_468_468_3_3_get, NULL, 0}, - {"IP_ROUTED",1, field_fmt_469_469_3_3_info, field_fmt_469_469_3_3_set, field_fmt_469_469_3_3_get, NULL, 0}, - {"COPY_TO_CPU",1, field_fmt_470_470_3_3_info, field_fmt_470_470_3_3_set, field_fmt_470_470_3_3_get, NULL, 0}, - {"SRC_PORT_NUM",1, field_fmt_471_479_3_3_info, field_fmt_471_479_3_3_set, field_fmt_471_479_3_3_get, NULL, 0}, - {"ARC_ID_LO",1, field_fmt_480_511_2_2_info, field_fmt_480_511_2_2_set, field_fmt_480_511_2_2_get, NULL, 0}, - {"ARC_ID_HI",1, field_fmt_512_527_1_1_info, field_fmt_512_527_1_1_set, field_fmt_512_527_1_1_get, NULL, 0}, - {"REPLICATION_OR_NHOP_INDEX",1, field_fmt_528_543_1_1_info, field_fmt_528_543_1_1_set, field_fmt_528_543_1_1_get, NULL, 0}, - {"DMA_HEADER_VERSION",1, field_fmt_544_545_0_0_info, field_fmt_544_545_0_0_set, field_fmt_544_545_0_0_get, NULL, 0}, - {"QUEUE_NUM",1, field_fmt_546_551_0_0_info, field_fmt_546_551_0_0_set, field_fmt_546_551_0_0_get, NULL, 0}, - {"TRUNCATE_CPU_COPY",1, field_fmt_552_552_0_0_info, field_fmt_552_552_0_0_set, field_fmt_552_552_0_0_get, NULL, 0}, - {"EGR_ZONE_REMAP_CTRL",1, field_fmt_553_556_0_0_info, field_fmt_553_556_0_0_set, field_fmt_553_556_0_0_get, NULL, 0}, - {"SWITCH",1, field_fmt_557_557_0_0_info, field_fmt_557_557_0_0_set, field_fmt_557_557_0_0_get, NULL, 0}, - {"L3ONLY",1, field_fmt_558_558_0_0_info, field_fmt_558_558_0_0_set, field_fmt_558_558_0_0_get, NULL, 0}, - {"UC_SW_COPY_DROPPED",1, field_fmt_559_559_0_0_info, field_fmt_559_559_0_0_set, field_fmt_559_559_0_0_get, NULL, 0}, - {"PKT_LENGTH",1, field_fmt_560_575_0_0_info, field_fmt_560_575_0_0_set, field_fmt_560_575_0_0_get, NULL, 0}, + {14, field_fmt_0_447_17_4_info, field_fmt_0_447_17_4_set, field_fmt_0_447_17_4_get, NULL, 0}, + {1, field_fmt_449_454_3_3_info, field_fmt_449_454_3_3_set, field_fmt_449_454_3_3_get, NULL, 0}, + {1, field_fmt_455_455_3_3_info, field_fmt_455_455_3_3_set, field_fmt_455_455_3_3_get, NULL, 0}, + {1, field_fmt_456_459_3_3_info, field_fmt_456_459_3_3_set, field_fmt_456_459_3_3_get, NULL, 0}, + {1, field_fmt_460_462_3_3_info, field_fmt_460_462_3_3_set, field_fmt_460_462_3_3_get, NULL, 0}, + {1, field_fmt_464_465_3_3_info, field_fmt_464_465_3_3_set, field_fmt_464_465_3_3_get, NULL, 0}, + {1, field_fmt_466_467_3_3_info, field_fmt_466_467_3_3_set, field_fmt_466_467_3_3_get, NULL, 0}, + {1, field_fmt_468_468_3_3_info, field_fmt_468_468_3_3_set, field_fmt_468_468_3_3_get, NULL, 0}, + {1, field_fmt_469_469_3_3_info, field_fmt_469_469_3_3_set, field_fmt_469_469_3_3_get, NULL, 0}, + {1, field_fmt_470_470_3_3_info, field_fmt_470_470_3_3_set, field_fmt_470_470_3_3_get, NULL, 0}, + {1, field_fmt_471_479_3_3_info, field_fmt_471_479_3_3_set, field_fmt_471_479_3_3_get, NULL, 0}, + {1, field_fmt_480_511_2_2_info, field_fmt_480_511_2_2_set, field_fmt_480_511_2_2_get, NULL, 0}, + {1, field_fmt_512_527_1_1_info, field_fmt_512_527_1_1_set, field_fmt_512_527_1_1_get, NULL, 0}, + {1, field_fmt_528_543_1_1_info, field_fmt_528_543_1_1_set, field_fmt_528_543_1_1_get, NULL, 0}, + {1, field_fmt_544_545_0_0_info, field_fmt_544_545_0_0_set, field_fmt_544_545_0_0_get, NULL, 0}, + {1, field_fmt_546_551_0_0_info, field_fmt_546_551_0_0_set, field_fmt_546_551_0_0_get, NULL, 0}, + {1, field_fmt_552_552_0_0_info, field_fmt_552_552_0_0_set, field_fmt_552_552_0_0_get, NULL, 0}, + {1, field_fmt_553_556_0_0_info, field_fmt_553_556_0_0_set, field_fmt_553_556_0_0_get, NULL, 0}, + {1, field_fmt_557_557_0_0_info, field_fmt_557_557_0_0_set, field_fmt_557_557_0_0_get, NULL, 0}, + {1, field_fmt_558_558_0_0_info, field_fmt_558_558_0_0_set, field_fmt_558_558_0_0_get, NULL, 0}, + {1, field_fmt_559_559_0_0_info, field_fmt_559_559_0_0_set, field_fmt_559_559_0_0_get, NULL, 0}, + {1, field_fmt_560_575_0_0_info, field_fmt_560_575_0_0_set, field_fmt_560_575_0_0_get, NULL, 0}, }; @@ -1166,35 +1165,35 @@ static const shr_enum_map_t bcm56890_a0_txpmd_start_names[] = }; static bcmpkt_pmd_field_t bcm56890_a0_txpmd_fields[BCM56890_A0_TXPMD_COUNT] = { - {"CELL_LENGTH",1, field_fmt_0_7_3_3_info, field_fmt_0_7_3_3_set, field_fmt_0_7_3_3_get, NULL, 0}, - {"EOP",1, field_fmt_8_8_3_3_info, field_fmt_8_8_3_3_set, field_fmt_8_8_3_3_get, NULL, 0}, - {"SOP",1, field_fmt_9_9_3_3_info, field_fmt_9_9_3_3_set, field_fmt_9_9_3_3_get, NULL, 0}, - {"PKT_LENGTH",1, field_fmt_10_23_3_3_info, field_fmt_10_23_3_3_set, field_fmt_10_23_3_3_get, NULL, 0}, - {"COPY_TO_DEBUG",1, field_fmt_37_37_2_2_info, field_fmt_37_37_2_2_set, field_fmt_37_37_2_2_get, NULL, 0}, - {"COS",1, field_fmt_38_43_2_2_info, field_fmt_38_43_2_2_set, field_fmt_38_43_2_2_get, NULL, 0}, - {"UNICAST_PKT",1, field_fmt_44_44_2_2_info, field_fmt_44_44_2_2_set, field_fmt_44_44_2_2_get, NULL, 0}, - {"UNICAST",1, field_fmt_45_45_2_2_info, field_fmt_45_45_2_2_set, field_fmt_45_45_2_2_get, NULL, 0}, - {"SET_L2BM",1, field_fmt_46_46_2_2_info, field_fmt_46_46_2_2_set, field_fmt_46_46_2_2_get, NULL, 0}, - {"RQE_Q_NUM",1, field_fmt_47_50_2_2_info, field_fmt_47_50_2_2_set, field_fmt_47_50_2_2_get, NULL, 0}, - {"SPAP",1, field_fmt_51_52_2_2_info, field_fmt_51_52_2_2_set, field_fmt_51_52_2_2_get, NULL, 0}, - {"SPID",1, field_fmt_53_54_2_2_info, field_fmt_53_54_2_2_set, field_fmt_53_54_2_2_get, NULL, 0}, - {"SPID_OVERRIDE",1, field_fmt_55_55_2_2_info, field_fmt_55_55_2_2_set, field_fmt_55_55_2_2_get, NULL, 0}, - {"INPUT_PRI",1, field_fmt_56_59_2_2_info, field_fmt_56_59_2_2_set, field_fmt_56_59_2_2_get, NULL, 0}, - {"LOCAL_DEST_PORT",1, field_fmt_63_71_2_1_info, field_fmt_63_71_2_1_set, field_fmt_63_71_2_1_get, NULL, 0}, - {"IEEE1588_TIMESTAMP_HDR_OFFSET",1, field_fmt_72_79_1_1_info, field_fmt_72_79_1_1_set, field_fmt_72_79_1_1_get, NULL, 0}, - {"TX_TS",1, field_fmt_80_80_1_1_info, field_fmt_80_80_1_1_set, field_fmt_80_80_1_1_get, NULL, 0}, - {"IEEE1588_INGRESS_TIMESTAMP_SIGN",1, field_fmt_81_81_1_1_info, field_fmt_81_81_1_1_set, field_fmt_81_81_1_1_get, NULL, 0}, - {"IEEE1588_REGEN_UDP_CHECKSUM",1, field_fmt_82_82_1_1_info, field_fmt_82_82_1_1_set, field_fmt_82_82_1_1_get, NULL, 0}, - {"IEEE1588_ONE_STEP_ENABLE",1, field_fmt_83_83_1_1_info, field_fmt_83_83_1_1_set, field_fmt_83_83_1_1_get, NULL, 0}, - {"TS_ACTION_LSB",1, field_fmt_83_83_1_1_info, field_fmt_83_83_1_1_set, field_fmt_83_83_1_1_get, NULL, 0}, - {"CELL_ERROR",1, field_fmt_84_84_1_1_info, field_fmt_84_84_1_1_set, field_fmt_84_84_1_1_get, NULL, 0}, - {"TS_ACTION_MSB",1, field_fmt_85_85_1_1_info, field_fmt_85_85_1_1_set, field_fmt_85_85_1_1_get, NULL, 0}, - {"TS_TYPE",1, field_fmt_86_86_1_1_info, field_fmt_86_86_1_1_set, field_fmt_86_86_1_1_get, NULL, 0}, - {"DST_SUBPORT_NUM",1, field_fmt_87_96_1_0_info, field_fmt_87_96_1_0_set, field_fmt_87_96_1_0_get, NULL, 0}, - {"UDP_CHECKSUM_UPDATE_ENABLE",1, field_fmt_97_97_0_0_info, field_fmt_97_97_0_0_set, field_fmt_97_97_0_0_get, NULL, 0}, - {"UDP_CHECKSUM_OFFSET",1, field_fmt_98_103_0_0_info, field_fmt_98_103_0_0_set, field_fmt_98_103_0_0_get, NULL, 0}, - {"HEADER_TYPE",1, field_fmt_120_125_0_0_info, field_fmt_120_125_0_0_set, field_fmt_120_125_0_0_get, bcm56890_a0_txpmd_header_type_names, 0}, - {"START",1, field_fmt_126_127_0_0_info, field_fmt_126_127_0_0_set, field_fmt_126_127_0_0_get, bcm56890_a0_txpmd_start_names, 0}, + {1, field_fmt_0_7_3_3_info, field_fmt_0_7_3_3_set, field_fmt_0_7_3_3_get, NULL, 0}, + {1, field_fmt_8_8_3_3_info, field_fmt_8_8_3_3_set, field_fmt_8_8_3_3_get, NULL, 0}, + {1, field_fmt_9_9_3_3_info, field_fmt_9_9_3_3_set, field_fmt_9_9_3_3_get, NULL, 0}, + {1, field_fmt_10_23_3_3_info, field_fmt_10_23_3_3_set, field_fmt_10_23_3_3_get, NULL, 0}, + {1, field_fmt_37_37_2_2_info, field_fmt_37_37_2_2_set, field_fmt_37_37_2_2_get, NULL, 0}, + {1, field_fmt_38_43_2_2_info, field_fmt_38_43_2_2_set, field_fmt_38_43_2_2_get, NULL, 0}, + {1, field_fmt_44_44_2_2_info, field_fmt_44_44_2_2_set, field_fmt_44_44_2_2_get, NULL, 0}, + {1, field_fmt_45_45_2_2_info, field_fmt_45_45_2_2_set, field_fmt_45_45_2_2_get, NULL, 0}, + {1, field_fmt_46_46_2_2_info, field_fmt_46_46_2_2_set, field_fmt_46_46_2_2_get, NULL, 0}, + {1, field_fmt_47_50_2_2_info, field_fmt_47_50_2_2_set, field_fmt_47_50_2_2_get, NULL, 0}, + {1, field_fmt_51_52_2_2_info, field_fmt_51_52_2_2_set, field_fmt_51_52_2_2_get, NULL, 0}, + {1, field_fmt_53_54_2_2_info, field_fmt_53_54_2_2_set, field_fmt_53_54_2_2_get, NULL, 0}, + {1, field_fmt_55_55_2_2_info, field_fmt_55_55_2_2_set, field_fmt_55_55_2_2_get, NULL, 0}, + {1, field_fmt_56_59_2_2_info, field_fmt_56_59_2_2_set, field_fmt_56_59_2_2_get, NULL, 0}, + {1, field_fmt_63_71_2_1_info, field_fmt_63_71_2_1_set, field_fmt_63_71_2_1_get, NULL, 0}, + {1, field_fmt_72_79_1_1_info, field_fmt_72_79_1_1_set, field_fmt_72_79_1_1_get, NULL, 0}, + {1, field_fmt_80_80_1_1_info, field_fmt_80_80_1_1_set, field_fmt_80_80_1_1_get, NULL, 0}, + {1, field_fmt_81_81_1_1_info, field_fmt_81_81_1_1_set, field_fmt_81_81_1_1_get, NULL, 0}, + {1, field_fmt_82_82_1_1_info, field_fmt_82_82_1_1_set, field_fmt_82_82_1_1_get, NULL, 0}, + {1, field_fmt_83_83_1_1_info, field_fmt_83_83_1_1_set, field_fmt_83_83_1_1_get, NULL, 0}, + {1, field_fmt_83_83_1_1_info, field_fmt_83_83_1_1_set, field_fmt_83_83_1_1_get, NULL, 0}, + {1, field_fmt_84_84_1_1_info, field_fmt_84_84_1_1_set, field_fmt_84_84_1_1_get, NULL, 0}, + {1, field_fmt_85_85_1_1_info, field_fmt_85_85_1_1_set, field_fmt_85_85_1_1_get, NULL, 0}, + {1, field_fmt_86_86_1_1_info, field_fmt_86_86_1_1_set, field_fmt_86_86_1_1_get, NULL, 0}, + {1, field_fmt_87_96_1_0_info, field_fmt_87_96_1_0_set, field_fmt_87_96_1_0_get, NULL, 0}, + {1, field_fmt_97_97_0_0_info, field_fmt_97_97_0_0_set, field_fmt_97_97_0_0_get, NULL, 0}, + {1, field_fmt_98_103_0_0_info, field_fmt_98_103_0_0_set, field_fmt_98_103_0_0_get, NULL, 0}, + {1, field_fmt_120_125_0_0_info, field_fmt_120_125_0_0_set, field_fmt_120_125_0_0_get, bcm56890_a0_txpmd_header_type_names, 0}, + {1, field_fmt_126_127_0_0_info, field_fmt_126_127_0_0_set, field_fmt_126_127_0_0_get, bcm56890_a0_txpmd_start_names, 0}, }; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pkt_lbhdr.c similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pkt_lbhdr.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pkt_lbhdr.c index 7399c0b019a..7c46f0f1306 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pkt_lbhdr.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pkt_lbhdr.c @@ -5,8 +5,7 @@ * Edits to this file will be lost when it is regenerated. * Tool: INTERNAL/regs/xgs/generate-pmd.pl * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pkt_rxpmd.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pkt_rxpmd.c similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pkt_rxpmd.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pkt_rxpmd.c index 934e5ac1290..0163fd4ddca 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pkt_rxpmd.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pkt_rxpmd.c @@ -5,8 +5,7 @@ * Edits to this file will be lost when it is regenerated. * Tool: INTERNAL/regs/xgs/generate-pmd.pl * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -957,8 +956,6 @@ const bcmpkt_rxpmd_fget_t bcm56990_a0_rxpmd_fget = { NULL, NULL, NULL, - NULL, - NULL, NULL } }; @@ -1064,8 +1061,6 @@ const bcmpkt_rxpmd_fset_t bcm56990_a0_rxpmd_fset = { NULL, NULL, NULL, - NULL, - NULL, NULL } }; @@ -1092,7 +1087,7 @@ static int bcm56990_a0_rxpmd_view_infos[BCMPKT_RXPMD_FID_COUNT] = { -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -2, -2, -2, -2, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, - -2, -2, -2, -2, -2, + -2, -2, -2, }; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pkt_txpmd.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pkt_txpmd.c similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pkt_txpmd.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pkt_txpmd.c index fa2649c1498..3a3bbc451b2 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pkt_txpmd.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pkt_txpmd.c @@ -5,8 +5,7 @@ * Edits to this file will be lost when it is regenerated. * Tool: INTERNAL/regs/xgs/generate-pmd.pl * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -450,7 +449,6 @@ const bcmpkt_txpmd_fget_t bcm56990_a0_txpmd_fget = { NULL, NULL, NULL, - NULL, NULL } }; @@ -586,7 +584,6 @@ const bcmpkt_txpmd_fset_t bcm56990_a0_txpmd_fset = { NULL, NULL, NULL, - NULL, NULL } }; @@ -612,7 +609,7 @@ static int bcm56990_a0_txpmd_view_infos[BCMPKT_TXPMD_FID_COUNT] = { -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, - -2, -2, + -2, }; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pmd_field.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pmd_field.c similarity index 77% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pmd_field.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pmd_field.c index fdddafab6ce..0b70fa65a0e 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pmd_field.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pmd_field.c @@ -5,8 +5,7 @@ * Edits to this file will be lost when it is regenerated. * Tool: INTERNAL/regs/xgs/generate-pmd.pl * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -2733,50 +2732,50 @@ static const shr_enum_map_t bcm56990_a0_rxpmd_timestamp_type_names[] = }; static bcmpkt_pmd_field_t bcm56990_a0_rxpmd_fields[BCM56990_A0_RXPMD_COUNT] = { - {"I2E_CLASSID",1, field_fmt_0_11_12_12_info, field_fmt_0_11_12_12_set, field_fmt_0_11_12_12_get, NULL, 0}, - {"RX_BFD_SESSION_INDEX",1, field_fmt_0_11_12_12_info, field_fmt_0_11_12_12_set, field_fmt_0_11_12_12_get, NULL, 0}, - {"I2E_CLASSID_TYPE",1, field_fmt_12_15_12_12_info, field_fmt_12_15_12_12_set, field_fmt_12_15_12_12_get, NULL, 0}, - {"RX_BFD_START_OFFSET_TYPE",1, field_fmt_12_13_12_12_info, field_fmt_12_13_12_12_set, field_fmt_12_13_12_12_get, NULL, 0}, - {"RX_BFD_START_OFFSET",1, field_fmt_14_21_12_12_info, field_fmt_14_21_12_12_set, field_fmt_14_21_12_12_get, NULL, 0}, - {"CPU_COS",1, field_fmt_22_27_12_12_info, field_fmt_22_27_12_12_set, field_fmt_22_27_12_12_get, NULL, 0}, - {"QUEUE_NUM",1, field_fmt_22_27_12_12_info, field_fmt_22_27_12_12_set, field_fmt_22_27_12_12_get, NULL, 0}, - {"BPDU",1, field_fmt_28_28_12_12_info, field_fmt_28_28_12_12_set, field_fmt_28_28_12_12_get, NULL, 0}, - {"CHANGE_DSCP",1, field_fmt_29_29_12_12_info, field_fmt_29_29_12_12_set, field_fmt_29_29_12_12_get, NULL, 0}, - {"CHANGE_ECN",1, field_fmt_30_30_12_12_info, field_fmt_30_30_12_12_set, field_fmt_30_30_12_12_get, NULL, 0}, - {"DLB_ID_VALID",1, field_fmt_31_31_12_12_info, field_fmt_31_31_12_12_set, field_fmt_31_31_12_12_get, NULL, 0}, - {"REASON",2, field_fmt_32_95_11_10_info, field_fmt_32_95_11_10_set, field_fmt_32_95_11_10_get, NULL, 0}, - {"REASON_TYPE",1, field_fmt_96_99_9_9_info, field_fmt_96_99_9_9_set, field_fmt_96_99_9_9_get, NULL, 0}, - {"DO_NOT_CHANGE_TTL",1, field_fmt_100_100_9_9_info, field_fmt_100_100_9_9_set, field_fmt_100_100_9_9_get, NULL, 0}, - {"DSCP",1, field_fmt_101_106_9_9_info, field_fmt_101_106_9_9_set, field_fmt_101_106_9_9_get, NULL, 0}, - {"SPECIAL_PACKET_TYPE",1, field_fmt_101_103_9_9_info, field_fmt_101_103_9_9_set, field_fmt_101_103_9_9_get, NULL, 0}, - {"ECN",1, field_fmt_107_108_9_9_info, field_fmt_107_108_9_9_set, field_fmt_107_108_9_9_get, NULL, 0}, - {"INCOMING_TAG_STATUS",1, field_fmt_109_110_9_9_info, field_fmt_109_110_9_9_set, field_fmt_109_110_9_9_get, NULL, 0}, - {"ING_L3_INTF",1, field_fmt_111_123_9_9_info, field_fmt_111_123_9_9_set, field_fmt_111_123_9_9_get, NULL, 0}, - {"ING_OTAG_ACTION",1, field_fmt_124_125_9_9_info, field_fmt_124_125_9_9_set, field_fmt_124_125_9_9_get, NULL, 0}, - {"IP_ROUTED",1, field_fmt_126_126_9_9_info, field_fmt_126_126_9_9_set, field_fmt_126_126_9_9_get, NULL, 0}, - {"L3ONLY",1, field_fmt_127_127_9_9_info, field_fmt_127_127_9_9_set, field_fmt_127_127_9_9_get, NULL, 0}, - {"LOOPBACK_PACKET_TYPE",1, field_fmt_128_130_8_8_info, field_fmt_128_130_8_8_set, field_fmt_128_130_8_8_get, NULL, 0}, - {"MATCHED_RULE",1, field_fmt_131_138_8_8_info, field_fmt_131_138_8_8_set, field_fmt_131_138_8_8_get, NULL, 0}, - {"MTP_INDEX",1, field_fmt_139_141_8_8_info, field_fmt_139_141_8_8_set, field_fmt_139_141_8_8_get, NULL, 0}, - {"OUTER_CFI",1, field_fmt_142_142_8_8_info, field_fmt_142_142_8_8_set, field_fmt_142_142_8_8_get, NULL, 0}, - {"OUTER_PRI",1, field_fmt_143_145_8_8_info, field_fmt_143_145_8_8_set, field_fmt_143_145_8_8_get, NULL, 0}, - {"OUTER_VID",1, field_fmt_146_157_8_8_info, field_fmt_146_157_8_8_set, field_fmt_146_157_8_8_get, NULL, 0}, - {"INCOMING_INT_HDR_TYPE",1, field_fmt_158_159_8_8_info, field_fmt_158_159_8_8_set, field_fmt_158_159_8_8_get, NULL, 0}, - {"PKT_LENGTH",1, field_fmt_160_173_7_7_info, field_fmt_160_173_7_7_set, field_fmt_160_173_7_7_get, NULL, 0}, - {"REGEN_CRC",1, field_fmt_174_174_7_7_info, field_fmt_174_174_7_7_set, field_fmt_174_174_7_7_get, NULL, 0}, - {"REPLICATION_OR_NHOP_INDEX",1, field_fmt_175_191_7_7_info, field_fmt_175_191_7_7_set, field_fmt_175_191_7_7_get, NULL, 0}, - {"ENTROPY_LABEL",1, field_fmt_193_212_6_6_info, field_fmt_193_212_6_6_set, field_fmt_193_212_6_6_get, NULL, 0}, - {"SPECIAL_PACKET_INDICATOR",1, field_fmt_213_213_6_6_info, field_fmt_213_213_6_6_set, field_fmt_213_213_6_6_get, NULL, 0}, - {"SRC_PORT_NUM",1, field_fmt_214_222_6_6_info, field_fmt_214_222_6_6_set, field_fmt_214_222_6_6_get, NULL, 0}, - {"SWITCH",1, field_fmt_223_223_6_6_info, field_fmt_223_223_6_6_set, field_fmt_223_223_6_6_get, NULL, 0}, - {"TIMESTAMP",1, field_fmt_224_255_5_5_info, field_fmt_224_255_5_5_set, field_fmt_224_255_5_5_get, NULL, 0}, - {"TIMESTAMP_HI",1, field_fmt_256_271_4_4_info, field_fmt_256_271_4_4_set, field_fmt_256_271_4_4_get, NULL, 0}, - {"TIMESTAMP_TYPE",1, field_fmt_272_273_4_4_info, field_fmt_272_273_4_4_set, field_fmt_272_273_4_4_get, bcm56990_a0_rxpmd_timestamp_type_names, 0}, - {"TUNNEL_DECAP_TYPE",1, field_fmt_274_278_4_4_info, field_fmt_274_278_4_4_set, field_fmt_274_278_4_4_get, NULL, 0}, - {"UC_SW_COPY_DROPPED",1, field_fmt_279_279_4_4_info, field_fmt_279_279_4_4_set, field_fmt_279_279_4_4_get, NULL, 0}, - {"UNICAST_QUEUE",1, field_fmt_280_280_4_4_info, field_fmt_280_280_4_4_set, field_fmt_280_280_4_4_get, NULL, 0}, - {"DLB_ID",1, field_fmt_281_287_4_4_info, field_fmt_281_287_4_4_set, field_fmt_281_287_4_4_get, NULL, 0}, - {"MODULE_HDR",4, field_fmt_288_415_3_0_info, field_fmt_288_415_3_0_set, field_fmt_288_415_3_0_get, NULL, 0}, + {1, field_fmt_0_11_12_12_info, field_fmt_0_11_12_12_set, field_fmt_0_11_12_12_get, NULL, 0}, + {1, field_fmt_0_11_12_12_info, field_fmt_0_11_12_12_set, field_fmt_0_11_12_12_get, NULL, 0}, + {1, field_fmt_12_15_12_12_info, field_fmt_12_15_12_12_set, field_fmt_12_15_12_12_get, NULL, 0}, + {1, field_fmt_12_13_12_12_info, field_fmt_12_13_12_12_set, field_fmt_12_13_12_12_get, NULL, 0}, + {1, field_fmt_14_21_12_12_info, field_fmt_14_21_12_12_set, field_fmt_14_21_12_12_get, NULL, 0}, + {1, field_fmt_22_27_12_12_info, field_fmt_22_27_12_12_set, field_fmt_22_27_12_12_get, NULL, 0}, + {1, field_fmt_22_27_12_12_info, field_fmt_22_27_12_12_set, field_fmt_22_27_12_12_get, NULL, 0}, + {1, field_fmt_28_28_12_12_info, field_fmt_28_28_12_12_set, field_fmt_28_28_12_12_get, NULL, 0}, + {1, field_fmt_29_29_12_12_info, field_fmt_29_29_12_12_set, field_fmt_29_29_12_12_get, NULL, 0}, + {1, field_fmt_30_30_12_12_info, field_fmt_30_30_12_12_set, field_fmt_30_30_12_12_get, NULL, 0}, + {1, field_fmt_31_31_12_12_info, field_fmt_31_31_12_12_set, field_fmt_31_31_12_12_get, NULL, 0}, + {2, field_fmt_32_95_11_10_info, field_fmt_32_95_11_10_set, field_fmt_32_95_11_10_get, NULL, 0}, + {1, field_fmt_96_99_9_9_info, field_fmt_96_99_9_9_set, field_fmt_96_99_9_9_get, NULL, 0}, + {1, field_fmt_100_100_9_9_info, field_fmt_100_100_9_9_set, field_fmt_100_100_9_9_get, NULL, 0}, + {1, field_fmt_101_106_9_9_info, field_fmt_101_106_9_9_set, field_fmt_101_106_9_9_get, NULL, 0}, + {1, field_fmt_101_103_9_9_info, field_fmt_101_103_9_9_set, field_fmt_101_103_9_9_get, NULL, 0}, + {1, field_fmt_107_108_9_9_info, field_fmt_107_108_9_9_set, field_fmt_107_108_9_9_get, NULL, 0}, + {1, field_fmt_109_110_9_9_info, field_fmt_109_110_9_9_set, field_fmt_109_110_9_9_get, NULL, 0}, + {1, field_fmt_111_123_9_9_info, field_fmt_111_123_9_9_set, field_fmt_111_123_9_9_get, NULL, 0}, + {1, field_fmt_124_125_9_9_info, field_fmt_124_125_9_9_set, field_fmt_124_125_9_9_get, NULL, 0}, + {1, field_fmt_126_126_9_9_info, field_fmt_126_126_9_9_set, field_fmt_126_126_9_9_get, NULL, 0}, + {1, field_fmt_127_127_9_9_info, field_fmt_127_127_9_9_set, field_fmt_127_127_9_9_get, NULL, 0}, + {1, field_fmt_128_130_8_8_info, field_fmt_128_130_8_8_set, field_fmt_128_130_8_8_get, NULL, 0}, + {1, field_fmt_131_138_8_8_info, field_fmt_131_138_8_8_set, field_fmt_131_138_8_8_get, NULL, 0}, + {1, field_fmt_139_141_8_8_info, field_fmt_139_141_8_8_set, field_fmt_139_141_8_8_get, NULL, 0}, + {1, field_fmt_142_142_8_8_info, field_fmt_142_142_8_8_set, field_fmt_142_142_8_8_get, NULL, 0}, + {1, field_fmt_143_145_8_8_info, field_fmt_143_145_8_8_set, field_fmt_143_145_8_8_get, NULL, 0}, + {1, field_fmt_146_157_8_8_info, field_fmt_146_157_8_8_set, field_fmt_146_157_8_8_get, NULL, 0}, + {1, field_fmt_158_159_8_8_info, field_fmt_158_159_8_8_set, field_fmt_158_159_8_8_get, NULL, 0}, + {1, field_fmt_160_173_7_7_info, field_fmt_160_173_7_7_set, field_fmt_160_173_7_7_get, NULL, 0}, + {1, field_fmt_174_174_7_7_info, field_fmt_174_174_7_7_set, field_fmt_174_174_7_7_get, NULL, 0}, + {1, field_fmt_175_191_7_7_info, field_fmt_175_191_7_7_set, field_fmt_175_191_7_7_get, NULL, 0}, + {1, field_fmt_193_212_6_6_info, field_fmt_193_212_6_6_set, field_fmt_193_212_6_6_get, NULL, 0}, + {1, field_fmt_213_213_6_6_info, field_fmt_213_213_6_6_set, field_fmt_213_213_6_6_get, NULL, 0}, + {1, field_fmt_214_222_6_6_info, field_fmt_214_222_6_6_set, field_fmt_214_222_6_6_get, NULL, 0}, + {1, field_fmt_223_223_6_6_info, field_fmt_223_223_6_6_set, field_fmt_223_223_6_6_get, NULL, 0}, + {1, field_fmt_224_255_5_5_info, field_fmt_224_255_5_5_set, field_fmt_224_255_5_5_get, NULL, 0}, + {1, field_fmt_256_271_4_4_info, field_fmt_256_271_4_4_set, field_fmt_256_271_4_4_get, NULL, 0}, + {1, field_fmt_272_273_4_4_info, field_fmt_272_273_4_4_set, field_fmt_272_273_4_4_get, bcm56990_a0_rxpmd_timestamp_type_names, 0}, + {1, field_fmt_274_278_4_4_info, field_fmt_274_278_4_4_set, field_fmt_274_278_4_4_get, NULL, 0}, + {1, field_fmt_279_279_4_4_info, field_fmt_279_279_4_4_set, field_fmt_279_279_4_4_get, NULL, 0}, + {1, field_fmt_280_280_4_4_info, field_fmt_280_280_4_4_set, field_fmt_280_280_4_4_get, NULL, 0}, + {1, field_fmt_281_287_4_4_info, field_fmt_281_287_4_4_set, field_fmt_281_287_4_4_get, NULL, 0}, + {4, field_fmt_288_415_3_0_info, field_fmt_288_415_3_0_set, field_fmt_288_415_3_0_get, NULL, 0}, }; @@ -2802,46 +2801,46 @@ static const shr_enum_map_t bcm56990_a0_rx_reason_mpls_proc_error_names[] = }; static bcmpkt_pmd_field_t bcm56990_a0_rx_reason_fields[BCM56990_A0_RX_REASON_COUNT] = { - {"CPU_UVLAN",1, field_fmt_32_32_11_11_info, field_fmt_32_32_11_11_set, field_fmt_32_32_11_11_get, NULL, 0}, - {"CPU_SLF",1, field_fmt_33_33_11_11_info, field_fmt_33_33_11_11_set, field_fmt_33_33_11_11_get, NULL, 0}, - {"CPU_DLF",1, field_fmt_34_34_11_11_info, field_fmt_34_34_11_11_set, field_fmt_34_34_11_11_get, NULL, 0}, - {"CPU_L2MOVE",1, field_fmt_35_35_11_11_info, field_fmt_35_35_11_11_set, field_fmt_35_35_11_11_get, NULL, 0}, - {"CPU_L2CPU",1, field_fmt_36_36_11_11_info, field_fmt_36_36_11_11_set, field_fmt_36_36_11_11_get, NULL, 0}, - {"CPU_L3SRC_MISS",1, field_fmt_37_37_11_11_info, field_fmt_37_37_11_11_set, field_fmt_37_37_11_11_get, NULL, 0}, - {"CPU_L3DST_MISS",1, field_fmt_38_38_11_11_info, field_fmt_38_38_11_11_set, field_fmt_38_38_11_11_get, NULL, 0}, - {"CPU_L3SRC_MOVE",1, field_fmt_39_39_11_11_info, field_fmt_39_39_11_11_set, field_fmt_39_39_11_11_get, NULL, 0}, - {"CPU_MC_MISS",1, field_fmt_40_40_11_11_info, field_fmt_40_40_11_11_set, field_fmt_40_40_11_11_get, NULL, 0}, - {"CPU_IPMC_MISS",1, field_fmt_41_41_11_11_info, field_fmt_41_41_11_11_set, field_fmt_41_41_11_11_get, NULL, 0}, - {"CPU_FFP",1, field_fmt_42_42_11_11_info, field_fmt_42_42_11_11_set, field_fmt_42_42_11_11_get, NULL, 0}, - {"CPU_L3HDR_ERR",1, field_fmt_43_43_11_11_info, field_fmt_43_43_11_11_set, field_fmt_43_43_11_11_get, NULL, 0}, - {"CPU_PROTOCOL_PKT",1, field_fmt_44_44_11_11_info, field_fmt_44_44_11_11_set, field_fmt_44_44_11_11_get, NULL, 0}, - {"CPU_DOS_ATTACK",1, field_fmt_45_45_11_11_info, field_fmt_45_45_11_11_set, field_fmt_45_45_11_11_get, NULL, 0}, - {"CPU_MARTIAN_ADDR",1, field_fmt_46_46_11_11_info, field_fmt_46_46_11_11_set, field_fmt_46_46_11_11_get, NULL, 0}, - {"CPU_TUNNEL_ERR",1, field_fmt_47_47_11_11_info, field_fmt_47_47_11_11_set, field_fmt_47_47_11_11_get, NULL, 0}, - {"CPU_SFLOW",1, field_fmt_48_49_11_11_info, field_fmt_48_49_11_11_set, field_fmt_48_49_11_11_get, bcm56990_a0_rx_reason_cpu_sflow_names, 0}, - {"ICMP_REDIRECT",1, field_fmt_50_50_11_11_info, field_fmt_50_50_11_11_set, field_fmt_50_50_11_11_get, NULL, 0}, - {"L3_SLOWPATH",1, field_fmt_51_51_11_11_info, field_fmt_51_51_11_11_set, field_fmt_51_51_11_11_get, NULL, 0}, - {"PARITY_ERROR",1, field_fmt_52_52_11_11_info, field_fmt_52_52_11_11_set, field_fmt_52_52_11_11_get, NULL, 0}, - {"L3_MTU_CHECK_FAIL",1, field_fmt_53_53_11_11_info, field_fmt_53_53_11_11_set, field_fmt_53_53_11_11_get, NULL, 0}, - {"MCIDX_ERROR",1, field_fmt_54_54_11_11_info, field_fmt_54_54_11_11_set, field_fmt_54_54_11_11_get, NULL, 0}, - {"CPU_VFP",1, field_fmt_55_55_11_11_info, field_fmt_55_55_11_11_set, field_fmt_55_55_11_11_get, NULL, 0}, - {"MPLS_PROC_ERROR",1, field_fmt_56_58_11_11_info, field_fmt_56_58_11_11_set, field_fmt_56_58_11_11_get, bcm56990_a0_rx_reason_mpls_proc_error_names, 0}, - {"PBT_NONUC_PKT",1, field_fmt_59_59_11_11_info, field_fmt_59_59_11_11_set, field_fmt_59_59_11_11_get, NULL, 0}, - {"L3_NEXT_HOP",1, field_fmt_60_60_11_11_info, field_fmt_60_60_11_11_set, field_fmt_60_60_11_11_get, NULL, 0}, - {"MY_STATION",1, field_fmt_61_61_11_11_info, field_fmt_61_61_11_11_set, field_fmt_61_61_11_11_get, NULL, 0}, - {"TIME_SYNC",1, field_fmt_62_62_11_11_info, field_fmt_62_62_11_11_set, field_fmt_62_62_11_11_get, NULL, 0}, - {"TUNNEL_DECAP_ECN_ERROR",1, field_fmt_63_63_11_11_info, field_fmt_63_63_11_11_set, field_fmt_63_63_11_11_get, NULL, 0}, - {"BFD_SLOWPATH",1, field_fmt_64_64_10_10_info, field_fmt_64_64_10_10_set, field_fmt_64_64_10_10_get, NULL, 0}, - {"BFD_ERROR",1, field_fmt_65_65_10_10_info, field_fmt_65_65_10_10_set, field_fmt_65_65_10_10_get, NULL, 0}, - {"PACKET_TRACE_TO_CPU",1, field_fmt_66_66_10_10_info, field_fmt_66_66_10_10_set, field_fmt_66_66_10_10_get, NULL, 0}, - {"MPLS_UNKNOWN_CONTROL_PKT",1, field_fmt_67_67_10_10_info, field_fmt_67_67_10_10_set, field_fmt_67_67_10_10_get, NULL, 0}, - {"MPLS_ALERT_LABEL",1, field_fmt_68_68_10_10_info, field_fmt_68_68_10_10_set, field_fmt_68_68_10_10_get, NULL, 0}, - {"CPU_IPMC_INTERFACE_MISMATCH",1, field_fmt_69_69_10_10_info, field_fmt_69_69_10_10_set, field_fmt_69_69_10_10_get, NULL, 0}, - {"DLB_MONITOR",1, field_fmt_70_70_10_10_info, field_fmt_70_70_10_10_set, field_fmt_70_70_10_10_get, NULL, 0}, - {"INT_TURN_AROUND",1, field_fmt_71_71_10_10_info, field_fmt_71_71_10_10_set, field_fmt_71_71_10_10_get, NULL, 0}, - {"ETRAP_MONITOR",1, field_fmt_72_72_10_10_info, field_fmt_72_72_10_10_set, field_fmt_72_72_10_10_get, NULL, 0}, - {"SRV6_ERROR",1, field_fmt_73_73_10_10_info, field_fmt_73_73_10_10_set, field_fmt_73_73_10_10_get, NULL, 0}, - {"VXLAN_VN_ID_MISS",1, field_fmt_74_74_10_10_info, field_fmt_74_74_10_10_set, field_fmt_74_74_10_10_get, NULL, 0}, + {1, field_fmt_32_32_11_11_info, field_fmt_32_32_11_11_set, field_fmt_32_32_11_11_get, NULL, 0}, + {1, field_fmt_33_33_11_11_info, field_fmt_33_33_11_11_set, field_fmt_33_33_11_11_get, NULL, 0}, + {1, field_fmt_34_34_11_11_info, field_fmt_34_34_11_11_set, field_fmt_34_34_11_11_get, NULL, 0}, + {1, field_fmt_35_35_11_11_info, field_fmt_35_35_11_11_set, field_fmt_35_35_11_11_get, NULL, 0}, + {1, field_fmt_36_36_11_11_info, field_fmt_36_36_11_11_set, field_fmt_36_36_11_11_get, NULL, 0}, + {1, field_fmt_37_37_11_11_info, field_fmt_37_37_11_11_set, field_fmt_37_37_11_11_get, NULL, 0}, + {1, field_fmt_38_38_11_11_info, field_fmt_38_38_11_11_set, field_fmt_38_38_11_11_get, NULL, 0}, + {1, field_fmt_39_39_11_11_info, field_fmt_39_39_11_11_set, field_fmt_39_39_11_11_get, NULL, 0}, + {1, field_fmt_40_40_11_11_info, field_fmt_40_40_11_11_set, field_fmt_40_40_11_11_get, NULL, 0}, + {1, field_fmt_41_41_11_11_info, field_fmt_41_41_11_11_set, field_fmt_41_41_11_11_get, NULL, 0}, + {1, field_fmt_42_42_11_11_info, field_fmt_42_42_11_11_set, field_fmt_42_42_11_11_get, NULL, 0}, + {1, field_fmt_43_43_11_11_info, field_fmt_43_43_11_11_set, field_fmt_43_43_11_11_get, NULL, 0}, + {1, field_fmt_44_44_11_11_info, field_fmt_44_44_11_11_set, field_fmt_44_44_11_11_get, NULL, 0}, + {1, field_fmt_45_45_11_11_info, field_fmt_45_45_11_11_set, field_fmt_45_45_11_11_get, NULL, 0}, + {1, field_fmt_46_46_11_11_info, field_fmt_46_46_11_11_set, field_fmt_46_46_11_11_get, NULL, 0}, + {1, field_fmt_47_47_11_11_info, field_fmt_47_47_11_11_set, field_fmt_47_47_11_11_get, NULL, 0}, + {1, field_fmt_48_49_11_11_info, field_fmt_48_49_11_11_set, field_fmt_48_49_11_11_get, bcm56990_a0_rx_reason_cpu_sflow_names, 0}, + {1, field_fmt_50_50_11_11_info, field_fmt_50_50_11_11_set, field_fmt_50_50_11_11_get, NULL, 0}, + {1, field_fmt_51_51_11_11_info, field_fmt_51_51_11_11_set, field_fmt_51_51_11_11_get, NULL, 0}, + {1, field_fmt_52_52_11_11_info, field_fmt_52_52_11_11_set, field_fmt_52_52_11_11_get, NULL, 0}, + {1, field_fmt_53_53_11_11_info, field_fmt_53_53_11_11_set, field_fmt_53_53_11_11_get, NULL, 0}, + {1, field_fmt_54_54_11_11_info, field_fmt_54_54_11_11_set, field_fmt_54_54_11_11_get, NULL, 0}, + {1, field_fmt_55_55_11_11_info, field_fmt_55_55_11_11_set, field_fmt_55_55_11_11_get, NULL, 0}, + {1, field_fmt_56_58_11_11_info, field_fmt_56_58_11_11_set, field_fmt_56_58_11_11_get, bcm56990_a0_rx_reason_mpls_proc_error_names, 0}, + {1, field_fmt_59_59_11_11_info, field_fmt_59_59_11_11_set, field_fmt_59_59_11_11_get, NULL, 0}, + {1, field_fmt_60_60_11_11_info, field_fmt_60_60_11_11_set, field_fmt_60_60_11_11_get, NULL, 0}, + {1, field_fmt_61_61_11_11_info, field_fmt_61_61_11_11_set, field_fmt_61_61_11_11_get, NULL, 0}, + {1, field_fmt_62_62_11_11_info, field_fmt_62_62_11_11_set, field_fmt_62_62_11_11_get, NULL, 0}, + {1, field_fmt_63_63_11_11_info, field_fmt_63_63_11_11_set, field_fmt_63_63_11_11_get, NULL, 0}, + {1, field_fmt_64_64_10_10_info, field_fmt_64_64_10_10_set, field_fmt_64_64_10_10_get, NULL, 0}, + {1, field_fmt_65_65_10_10_info, field_fmt_65_65_10_10_set, field_fmt_65_65_10_10_get, NULL, 0}, + {1, field_fmt_66_66_10_10_info, field_fmt_66_66_10_10_set, field_fmt_66_66_10_10_get, NULL, 0}, + {1, field_fmt_67_67_10_10_info, field_fmt_67_67_10_10_set, field_fmt_67_67_10_10_get, NULL, 0}, + {1, field_fmt_68_68_10_10_info, field_fmt_68_68_10_10_set, field_fmt_68_68_10_10_get, NULL, 0}, + {1, field_fmt_69_69_10_10_info, field_fmt_69_69_10_10_set, field_fmt_69_69_10_10_get, NULL, 0}, + {1, field_fmt_70_70_10_10_info, field_fmt_70_70_10_10_set, field_fmt_70_70_10_10_get, NULL, 0}, + {1, field_fmt_71_71_10_10_info, field_fmt_71_71_10_10_set, field_fmt_71_71_10_10_get, NULL, 0}, + {1, field_fmt_72_72_10_10_info, field_fmt_72_72_10_10_set, field_fmt_72_72_10_10_get, NULL, 0}, + {1, field_fmt_73_73_10_10_info, field_fmt_73_73_10_10_set, field_fmt_73_73_10_10_get, NULL, 0}, + {1, field_fmt_74_74_10_10_info, field_fmt_74_74_10_10_set, field_fmt_74_74_10_10_get, NULL, 0}, }; @@ -2873,29 +2872,29 @@ static const shr_enum_map_t bcm56990_a0_txpmd_start_names[] = }; static bcmpkt_pmd_field_t bcm56990_a0_txpmd_fields[BCM56990_A0_TXPMD_COUNT] = { - {"CELL_LENGTH",1, field_fmt_0_7_3_3_info, field_fmt_0_7_3_3_set, field_fmt_0_7_3_3_get, NULL, 0}, - {"EOP",1, field_fmt_8_8_3_3_info, field_fmt_8_8_3_3_set, field_fmt_8_8_3_3_get, NULL, 0}, - {"SOP",1, field_fmt_9_9_3_3_info, field_fmt_9_9_3_3_set, field_fmt_9_9_3_3_get, NULL, 0}, - {"PKT_LENGTH",1, field_fmt_10_23_3_3_info, field_fmt_10_23_3_3_set, field_fmt_10_23_3_3_get, NULL, 0}, - {"IPCF_PTR",1, field_fmt_24_31_3_3_info, field_fmt_24_31_3_3_set, field_fmt_24_31_3_3_get, NULL, 0}, - {"SRC_MODID",1, field_fmt_32_39_2_2_info, field_fmt_32_39_2_2_set, field_fmt_32_39_2_2_get, NULL, 0}, - {"COS",1, field_fmt_40_45_2_2_info, field_fmt_40_45_2_2_set, field_fmt_40_45_2_2_get, NULL, 0}, - {"UNICAST",1, field_fmt_46_46_2_2_info, field_fmt_46_46_2_2_set, field_fmt_46_46_2_2_get, NULL, 0}, - {"SET_L2BM",1, field_fmt_47_47_2_2_info, field_fmt_47_47_2_2_set, field_fmt_47_47_2_2_get, NULL, 0}, - {"RQE_Q_NUM",1, field_fmt_48_51_2_2_info, field_fmt_48_51_2_2_set, field_fmt_48_51_2_2_get, NULL, 0}, - {"SPAP",1, field_fmt_52_53_2_2_info, field_fmt_52_53_2_2_set, field_fmt_52_53_2_2_get, NULL, 0}, - {"SPID",1, field_fmt_54_55_2_2_info, field_fmt_54_55_2_2_set, field_fmt_54_55_2_2_get, NULL, 0}, - {"SPID_OVERRIDE",1, field_fmt_56_56_2_2_info, field_fmt_56_56_2_2_set, field_fmt_56_56_2_2_get, NULL, 0}, - {"INPUT_PRI",1, field_fmt_57_60_2_2_info, field_fmt_57_60_2_2_set, field_fmt_57_60_2_2_get, NULL, 0}, - {"LOCAL_DEST_PORT",1, field_fmt_63_71_2_1_info, field_fmt_63_71_2_1_set, field_fmt_63_71_2_1_get, NULL, 0}, - {"IEEE1588_TIMESTAMP_HDR_OFFSET",1, field_fmt_72_79_1_1_info, field_fmt_72_79_1_1_set, field_fmt_72_79_1_1_get, NULL, 0}, - {"TX_TS",1, field_fmt_80_80_1_1_info, field_fmt_80_80_1_1_set, field_fmt_80_80_1_1_get, NULL, 0}, - {"IEEE1588_INGRESS_TIMESTAMP_SIGN",1, field_fmt_81_81_1_1_info, field_fmt_81_81_1_1_set, field_fmt_81_81_1_1_get, NULL, 0}, - {"IEEE1588_REGEN_UDP_CHECKSUM",1, field_fmt_82_82_1_1_info, field_fmt_82_82_1_1_set, field_fmt_82_82_1_1_get, NULL, 0}, - {"IEEE1588_ONE_STEP_ENABLE",1, field_fmt_83_83_1_1_info, field_fmt_83_83_1_1_set, field_fmt_83_83_1_1_get, NULL, 0}, - {"CELL_ERROR",1, field_fmt_84_84_1_1_info, field_fmt_84_84_1_1_set, field_fmt_84_84_1_1_get, NULL, 0}, - {"HEADER_TYPE",1, field_fmt_120_125_0_0_info, field_fmt_120_125_0_0_set, field_fmt_120_125_0_0_get, bcm56990_a0_txpmd_header_type_names, 0}, - {"START",1, field_fmt_126_127_0_0_info, field_fmt_126_127_0_0_set, field_fmt_126_127_0_0_get, bcm56990_a0_txpmd_start_names, 0}, + {1, field_fmt_0_7_3_3_info, field_fmt_0_7_3_3_set, field_fmt_0_7_3_3_get, NULL, 0}, + {1, field_fmt_8_8_3_3_info, field_fmt_8_8_3_3_set, field_fmt_8_8_3_3_get, NULL, 0}, + {1, field_fmt_9_9_3_3_info, field_fmt_9_9_3_3_set, field_fmt_9_9_3_3_get, NULL, 0}, + {1, field_fmt_10_23_3_3_info, field_fmt_10_23_3_3_set, field_fmt_10_23_3_3_get, NULL, 0}, + {1, field_fmt_24_31_3_3_info, field_fmt_24_31_3_3_set, field_fmt_24_31_3_3_get, NULL, 0}, + {1, field_fmt_32_39_2_2_info, field_fmt_32_39_2_2_set, field_fmt_32_39_2_2_get, NULL, 0}, + {1, field_fmt_40_45_2_2_info, field_fmt_40_45_2_2_set, field_fmt_40_45_2_2_get, NULL, 0}, + {1, field_fmt_46_46_2_2_info, field_fmt_46_46_2_2_set, field_fmt_46_46_2_2_get, NULL, 0}, + {1, field_fmt_47_47_2_2_info, field_fmt_47_47_2_2_set, field_fmt_47_47_2_2_get, NULL, 0}, + {1, field_fmt_48_51_2_2_info, field_fmt_48_51_2_2_set, field_fmt_48_51_2_2_get, NULL, 0}, + {1, field_fmt_52_53_2_2_info, field_fmt_52_53_2_2_set, field_fmt_52_53_2_2_get, NULL, 0}, + {1, field_fmt_54_55_2_2_info, field_fmt_54_55_2_2_set, field_fmt_54_55_2_2_get, NULL, 0}, + {1, field_fmt_56_56_2_2_info, field_fmt_56_56_2_2_set, field_fmt_56_56_2_2_get, NULL, 0}, + {1, field_fmt_57_60_2_2_info, field_fmt_57_60_2_2_set, field_fmt_57_60_2_2_get, NULL, 0}, + {1, field_fmt_63_71_2_1_info, field_fmt_63_71_2_1_set, field_fmt_63_71_2_1_get, NULL, 0}, + {1, field_fmt_72_79_1_1_info, field_fmt_72_79_1_1_set, field_fmt_72_79_1_1_get, NULL, 0}, + {1, field_fmt_80_80_1_1_info, field_fmt_80_80_1_1_set, field_fmt_80_80_1_1_get, NULL, 0}, + {1, field_fmt_81_81_1_1_info, field_fmt_81_81_1_1_set, field_fmt_81_81_1_1_get, NULL, 0}, + {1, field_fmt_82_82_1_1_info, field_fmt_82_82_1_1_set, field_fmt_82_82_1_1_get, NULL, 0}, + {1, field_fmt_83_83_1_1_info, field_fmt_83_83_1_1_set, field_fmt_83_83_1_1_get, NULL, 0}, + {1, field_fmt_84_84_1_1_info, field_fmt_84_84_1_1_set, field_fmt_84_84_1_1_get, NULL, 0}, + {1, field_fmt_120_125_0_0_info, field_fmt_120_125_0_0_set, field_fmt_120_125_0_0_get, bcm56990_a0_txpmd_header_type_names, 0}, + {1, field_fmt_126_127_0_0_info, field_fmt_126_127_0_0_set, field_fmt_126_127_0_0_get, bcm56990_a0_txpmd_start_names, 0}, }; @@ -2926,31 +2925,31 @@ static const shr_enum_map_t bcm56990_a0_lbhdr_header_type_names[] = }; static bcmpkt_pmd_field_t bcm56990_a0_lbhdr_fields[BCM56990_A0_LBHDR_COUNT] = { - {"ETHERNET::PP_PORT",1, field_fmt_0_8_3_3_info, field_fmt_0_8_3_3_set, field_fmt_0_8_3_3_get, NULL, 3}, - {"ETHERNET::SUBFLOW_TYPE",1, field_fmt_9_10_3_3_info, field_fmt_9_10_3_3_set, field_fmt_9_10_3_3_get, bcm56990_a0_lbhdr_ethernet_subflow_type_names, 3}, - {"ETHERNET::DESTINATION_TYPE",1, field_fmt_11_14_3_3_info, field_fmt_11_14_3_3_set, field_fmt_11_14_3_3_get, bcm56990_a0_lbhdr_ethernet_destination_type_names, 3}, - {"ETHERNET::DESTINATION",1, field_fmt_15_30_3_3_info, field_fmt_15_30_3_3_set, field_fmt_15_30_3_3_get, NULL, 3}, - {"ETHERNET::ROUTED_PKT",1, field_fmt_31_31_3_3_info, field_fmt_31_31_3_3_set, field_fmt_31_31_3_3_get, NULL, 3}, - {"ETHERNET::QOS_FIELDS_VLD",1, field_fmt_32_32_2_2_info, field_fmt_32_32_2_2_set, field_fmt_32_32_2_2_get, NULL, 3}, - {"ETHERNET::INT_CN",1, field_fmt_33_34_2_2_info, field_fmt_33_34_2_2_set, field_fmt_33_34_2_2_get, NULL, 3}, - {"ETHERNET::INT_PRI",1, field_fmt_35_38_2_2_info, field_fmt_35_38_2_2_set, field_fmt_35_38_2_2_get, NULL, 3}, - {"ETHERNET::DP",1, field_fmt_39_40_2_2_info, field_fmt_39_40_2_2_set, field_fmt_39_40_2_2_get, NULL, 3}, - {"ETHERNET::ECMP_MEMBER_ID",1, field_fmt_41_52_2_2_info, field_fmt_41_52_2_2_set, field_fmt_41_52_2_2_get, NULL, 3}, - {"ETHERNET::VRF",1, field_fmt_53_65_2_1_info, field_fmt_53_65_2_1_set, field_fmt_53_65_2_1_get, NULL, 3}, - {"ETHERNET::VRF_VALID",1, field_fmt_66_66_1_1_info, field_fmt_66_66_1_1_set, field_fmt_66_66_1_1_get, NULL, 3}, - {"ETHERNET::MCAST_LB_INDEX",1, field_fmt_70_77_1_1_info, field_fmt_70_77_1_1_set, field_fmt_70_77_1_1_get, NULL, 3}, - {"ETHERNET::MCAST_LB_INDEX_VLD",1, field_fmt_78_78_1_1_info, field_fmt_78_78_1_1_set, field_fmt_78_78_1_1_get, NULL, 3}, - {"TRILL_ACCESS_NONUC::TC",1, field_fmt_0_3_3_3_info, field_fmt_0_3_3_3_set, field_fmt_0_3_3_3_get, NULL, 2}, - {"TRILL_ACCESS_NONUC::CNG",1, field_fmt_4_5_3_3_info, field_fmt_4_5_3_3_set, field_fmt_4_5_3_3_get, NULL, 2}, - {"TRILL_NETWORK_NONUC::TC",1, field_fmt_0_3_3_3_info, field_fmt_0_3_3_3_set, field_fmt_0_3_3_3_get, NULL, 1}, - {"TRILL_NETWORK_NONUC::CNG",1, field_fmt_4_5_3_3_info, field_fmt_4_5_3_3_set, field_fmt_4_5_3_3_get, NULL, 1}, - {"PKT_PROFILE",1, field_fmt_90_92_1_1_info, field_fmt_90_92_1_1_set, field_fmt_90_92_1_1_get, NULL, 0}, - {"VISIBILITY_PKT",1, field_fmt_93_93_1_1_info, field_fmt_93_93_1_1_set, field_fmt_93_93_1_1_get, NULL, 0}, - {"SOURCE",1, field_fmt_94_109_1_0_info, field_fmt_94_109_1_0_set, field_fmt_94_109_1_0_get, NULL, 0}, - {"SOURCE_TYPE",1, field_fmt_110_110_0_0_info, field_fmt_110_110_0_0_set, field_fmt_110_110_0_0_get, NULL, 0}, - {"HEADER_TYPE",1, field_fmt_111_115_0_0_info, field_fmt_111_115_0_0_set, field_fmt_111_115_0_0_get, bcm56990_a0_lbhdr_header_type_names, 0}, - {"INPUT_PRIORITY",1, field_fmt_116_119_0_0_info, field_fmt_116_119_0_0_set, field_fmt_116_119_0_0_get, NULL, 0}, - {"START",1, field_fmt_120_127_0_0_info, field_fmt_120_127_0_0_set, field_fmt_120_127_0_0_get, NULL, 0}, + {1, field_fmt_0_8_3_3_info, field_fmt_0_8_3_3_set, field_fmt_0_8_3_3_get, NULL, 3}, + {1, field_fmt_9_10_3_3_info, field_fmt_9_10_3_3_set, field_fmt_9_10_3_3_get, bcm56990_a0_lbhdr_ethernet_subflow_type_names, 3}, + {1, field_fmt_11_14_3_3_info, field_fmt_11_14_3_3_set, field_fmt_11_14_3_3_get, bcm56990_a0_lbhdr_ethernet_destination_type_names, 3}, + {1, field_fmt_15_30_3_3_info, field_fmt_15_30_3_3_set, field_fmt_15_30_3_3_get, NULL, 3}, + {1, field_fmt_31_31_3_3_info, field_fmt_31_31_3_3_set, field_fmt_31_31_3_3_get, NULL, 3}, + {1, field_fmt_32_32_2_2_info, field_fmt_32_32_2_2_set, field_fmt_32_32_2_2_get, NULL, 3}, + {1, field_fmt_33_34_2_2_info, field_fmt_33_34_2_2_set, field_fmt_33_34_2_2_get, NULL, 3}, + {1, field_fmt_35_38_2_2_info, field_fmt_35_38_2_2_set, field_fmt_35_38_2_2_get, NULL, 3}, + {1, field_fmt_39_40_2_2_info, field_fmt_39_40_2_2_set, field_fmt_39_40_2_2_get, NULL, 3}, + {1, field_fmt_41_52_2_2_info, field_fmt_41_52_2_2_set, field_fmt_41_52_2_2_get, NULL, 3}, + {1, field_fmt_53_65_2_1_info, field_fmt_53_65_2_1_set, field_fmt_53_65_2_1_get, NULL, 3}, + {1, field_fmt_66_66_1_1_info, field_fmt_66_66_1_1_set, field_fmt_66_66_1_1_get, NULL, 3}, + {1, field_fmt_70_77_1_1_info, field_fmt_70_77_1_1_set, field_fmt_70_77_1_1_get, NULL, 3}, + {1, field_fmt_78_78_1_1_info, field_fmt_78_78_1_1_set, field_fmt_78_78_1_1_get, NULL, 3}, + {1, field_fmt_0_3_3_3_info, field_fmt_0_3_3_3_set, field_fmt_0_3_3_3_get, NULL, 2}, + {1, field_fmt_4_5_3_3_info, field_fmt_4_5_3_3_set, field_fmt_4_5_3_3_get, NULL, 2}, + {1, field_fmt_0_3_3_3_info, field_fmt_0_3_3_3_set, field_fmt_0_3_3_3_get, NULL, 1}, + {1, field_fmt_4_5_3_3_info, field_fmt_4_5_3_3_set, field_fmt_4_5_3_3_get, NULL, 1}, + {1, field_fmt_90_92_1_1_info, field_fmt_90_92_1_1_set, field_fmt_90_92_1_1_get, NULL, 0}, + {1, field_fmt_93_93_1_1_info, field_fmt_93_93_1_1_set, field_fmt_93_93_1_1_get, NULL, 0}, + {1, field_fmt_94_109_1_0_info, field_fmt_94_109_1_0_set, field_fmt_94_109_1_0_get, NULL, 0}, + {1, field_fmt_110_110_0_0_info, field_fmt_110_110_0_0_set, field_fmt_110_110_0_0_get, NULL, 0}, + {1, field_fmt_111_115_0_0_info, field_fmt_111_115_0_0_set, field_fmt_111_115_0_0_get, bcm56990_a0_lbhdr_header_type_names, 0}, + {1, field_fmt_116_119_0_0_info, field_fmt_116_119_0_0_set, field_fmt_116_119_0_0_get, NULL, 0}, + {1, field_fmt_120_127_0_0_info, field_fmt_120_127_0_0_set, field_fmt_120_127_0_0_get, NULL, 0}, }; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pkt_lbhdr.c similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pkt_lbhdr.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pkt_lbhdr.c index 8ca20e3fa5c..1194c17f858 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pkt_lbhdr.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pkt_lbhdr.c @@ -5,8 +5,7 @@ * Edits to this file will be lost when it is regenerated. * Tool: INTERNAL/regs/xgs/generate-pmd.pl * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pkt_rxpmd.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pkt_rxpmd.c similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pkt_rxpmd.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pkt_rxpmd.c index 3a3e1d85379..53e9c9e2353 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pkt_rxpmd.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pkt_rxpmd.c @@ -5,8 +5,7 @@ * Edits to this file will be lost when it is regenerated. * Tool: INTERNAL/regs/xgs/generate-pmd.pl * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -981,8 +980,6 @@ const bcmpkt_rxpmd_fget_t bcm56990_b0_rxpmd_fget = { NULL, NULL, NULL, - NULL, - NULL, NULL } }; @@ -1088,8 +1085,6 @@ const bcmpkt_rxpmd_fset_t bcm56990_b0_rxpmd_fset = { NULL, NULL, NULL, - NULL, - NULL, NULL } }; @@ -1116,7 +1111,7 @@ static int bcm56990_b0_rxpmd_view_infos[BCMPKT_RXPMD_FID_COUNT] = { -1, -1, -1, -1, -1, -1, -1, -2, -1, -1, -1, -1, -1, -2, -2, -2, -2, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -2, -2, -2, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, - -2, -2, -2, -2, -2, + -2, -2, -2, }; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pkt_txpmd.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pkt_txpmd.c similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pkt_txpmd.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pkt_txpmd.c index 38e6ba5ee55..209f2dad1cd 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pkt_txpmd.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pkt_txpmd.c @@ -5,8 +5,7 @@ * Edits to this file will be lost when it is regenerated. * Tool: INTERNAL/regs/xgs/generate-pmd.pl * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -450,7 +449,6 @@ const bcmpkt_txpmd_fget_t bcm56990_b0_txpmd_fget = { NULL, NULL, NULL, - NULL, NULL } }; @@ -586,7 +584,6 @@ const bcmpkt_txpmd_fset_t bcm56990_b0_txpmd_fset = { NULL, NULL, NULL, - NULL, NULL } }; @@ -612,7 +609,7 @@ static int bcm56990_b0_txpmd_view_infos[BCMPKT_TXPMD_FID_COUNT] = { -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, - -2, -2, + -2, }; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pmd_field.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pmd_field.c similarity index 78% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pmd_field.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pmd_field.c index ae61b9ae5d1..3050d261c30 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pmd_field.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pmd_field.c @@ -5,8 +5,7 @@ * Edits to this file will be lost when it is regenerated. * Tool: INTERNAL/regs/xgs/generate-pmd.pl * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -2796,51 +2795,51 @@ static const shr_enum_map_t bcm56990_b0_rxpmd_timestamp_type_names[] = }; static bcmpkt_pmd_field_t bcm56990_b0_rxpmd_fields[BCM56990_B0_RXPMD_COUNT] = { - {"ING_L3_INTF",1, field_fmt_0_12_12_12_info, field_fmt_0_12_12_12_set, field_fmt_0_12_12_12_get, NULL, 0}, - {"I2E_CLASSID",1, field_fmt_0_11_12_12_info, field_fmt_0_11_12_12_set, field_fmt_0_11_12_12_get, NULL, 0}, - {"RX_BFD_SESSION_INDEX",1, field_fmt_0_11_12_12_info, field_fmt_0_11_12_12_set, field_fmt_0_11_12_12_get, NULL, 0}, - {"I2E_CLASSID_TYPE",1, field_fmt_12_15_12_12_info, field_fmt_12_15_12_12_set, field_fmt_12_15_12_12_get, NULL, 0}, - {"RX_BFD_START_OFFSET_TYPE",1, field_fmt_12_13_12_12_info, field_fmt_12_13_12_12_set, field_fmt_12_13_12_12_get, NULL, 0}, - {"RX_BFD_START_OFFSET",1, field_fmt_14_21_12_12_info, field_fmt_14_21_12_12_set, field_fmt_14_21_12_12_get, NULL, 0}, - {"ING_L3_INTF_VALID",1, field_fmt_16_16_12_12_info, field_fmt_16_16_12_12_set, field_fmt_16_16_12_12_get, NULL, 0}, - {"CPU_COS",1, field_fmt_22_27_12_12_info, field_fmt_22_27_12_12_set, field_fmt_22_27_12_12_get, NULL, 0}, - {"QUEUE_NUM",1, field_fmt_22_27_12_12_info, field_fmt_22_27_12_12_set, field_fmt_22_27_12_12_get, NULL, 0}, - {"BPDU",1, field_fmt_28_28_12_12_info, field_fmt_28_28_12_12_set, field_fmt_28_28_12_12_get, NULL, 0}, - {"CHANGE_DSCP",1, field_fmt_29_29_12_12_info, field_fmt_29_29_12_12_set, field_fmt_29_29_12_12_get, NULL, 0}, - {"CHANGE_ECN",1, field_fmt_30_30_12_12_info, field_fmt_30_30_12_12_set, field_fmt_30_30_12_12_get, NULL, 0}, - {"DLB_ID_VALID",1, field_fmt_31_31_12_12_info, field_fmt_31_31_12_12_set, field_fmt_31_31_12_12_get, NULL, 0}, - {"REASON",2, field_fmt_32_95_11_10_info, field_fmt_32_95_11_10_set, field_fmt_32_95_11_10_get, NULL, 0}, - {"REASON_TYPE",1, field_fmt_96_99_9_9_info, field_fmt_96_99_9_9_set, field_fmt_96_99_9_9_get, NULL, 0}, - {"DO_NOT_CHANGE_TTL",1, field_fmt_100_100_9_9_info, field_fmt_100_100_9_9_set, field_fmt_100_100_9_9_get, NULL, 0}, - {"DSCP",1, field_fmt_101_106_9_9_info, field_fmt_101_106_9_9_set, field_fmt_101_106_9_9_get, NULL, 0}, - {"SPECIAL_PACKET_TYPE",1, field_fmt_101_103_9_9_info, field_fmt_101_103_9_9_set, field_fmt_101_103_9_9_get, NULL, 0}, - {"ECN",1, field_fmt_107_108_9_9_info, field_fmt_107_108_9_9_set, field_fmt_107_108_9_9_get, NULL, 0}, - {"INCOMING_TAG_STATUS",1, field_fmt_109_110_9_9_info, field_fmt_109_110_9_9_set, field_fmt_109_110_9_9_get, NULL, 0}, - {"O_NHI",1, field_fmt_111_125_9_9_info, field_fmt_111_125_9_9_set, field_fmt_111_125_9_9_get, NULL, 0}, - {"ING_OTAG_ACTION",1, field_fmt_126_127_9_9_info, field_fmt_126_127_9_9_set, field_fmt_126_127_9_9_get, NULL, 0}, - {"IP_ROUTED",1, field_fmt_129_129_8_8_info, field_fmt_129_129_8_8_set, field_fmt_129_129_8_8_get, NULL, 0}, - {"L3ONLY",1, field_fmt_130_130_8_8_info, field_fmt_130_130_8_8_set, field_fmt_130_130_8_8_get, NULL, 0}, - {"MATCHED_RULE",1, field_fmt_131_138_8_8_info, field_fmt_131_138_8_8_set, field_fmt_131_138_8_8_get, NULL, 0}, - {"MTP_INDEX",1, field_fmt_139_141_8_8_info, field_fmt_139_141_8_8_set, field_fmt_139_141_8_8_get, NULL, 0}, - {"OUTER_CFI",1, field_fmt_142_142_8_8_info, field_fmt_142_142_8_8_set, field_fmt_142_142_8_8_get, NULL, 0}, - {"OUTER_PRI",1, field_fmt_143_145_8_8_info, field_fmt_143_145_8_8_set, field_fmt_143_145_8_8_get, NULL, 0}, - {"OUTER_VID",1, field_fmt_146_157_8_8_info, field_fmt_146_157_8_8_set, field_fmt_146_157_8_8_get, NULL, 0}, - {"INCOMING_INT_HDR_TYPE",1, field_fmt_158_159_8_8_info, field_fmt_158_159_8_8_set, field_fmt_158_159_8_8_get, NULL, 0}, - {"PKT_LENGTH",1, field_fmt_160_173_7_7_info, field_fmt_160_173_7_7_set, field_fmt_160_173_7_7_get, NULL, 0}, - {"REGEN_CRC",1, field_fmt_174_174_7_7_info, field_fmt_174_174_7_7_set, field_fmt_174_174_7_7_get, NULL, 0}, - {"REPLICATION_OR_NHOP_INDEX",1, field_fmt_175_191_7_7_info, field_fmt_175_191_7_7_set, field_fmt_175_191_7_7_get, NULL, 0}, - {"ENTROPY_LABEL",1, field_fmt_193_212_6_6_info, field_fmt_193_212_6_6_set, field_fmt_193_212_6_6_get, NULL, 0}, - {"SPECIAL_PACKET_INDICATOR",1, field_fmt_213_213_6_6_info, field_fmt_213_213_6_6_set, field_fmt_213_213_6_6_get, NULL, 0}, - {"SRC_PORT_NUM",1, field_fmt_214_222_6_6_info, field_fmt_214_222_6_6_set, field_fmt_214_222_6_6_get, NULL, 0}, - {"SWITCH",1, field_fmt_223_223_6_6_info, field_fmt_223_223_6_6_set, field_fmt_223_223_6_6_get, NULL, 0}, - {"TIMESTAMP",1, field_fmt_224_255_5_5_info, field_fmt_224_255_5_5_set, field_fmt_224_255_5_5_get, NULL, 0}, - {"TIMESTAMP_HI",1, field_fmt_256_271_4_4_info, field_fmt_256_271_4_4_set, field_fmt_256_271_4_4_get, NULL, 0}, - {"TIMESTAMP_TYPE",1, field_fmt_272_273_4_4_info, field_fmt_272_273_4_4_set, field_fmt_272_273_4_4_get, bcm56990_b0_rxpmd_timestamp_type_names, 0}, - {"TUNNEL_DECAP_TYPE",1, field_fmt_274_278_4_4_info, field_fmt_274_278_4_4_set, field_fmt_274_278_4_4_get, NULL, 0}, - {"UC_SW_COPY_DROPPED",1, field_fmt_279_279_4_4_info, field_fmt_279_279_4_4_set, field_fmt_279_279_4_4_get, NULL, 0}, - {"UNICAST_QUEUE",1, field_fmt_280_280_4_4_info, field_fmt_280_280_4_4_set, field_fmt_280_280_4_4_get, NULL, 0}, - {"DLB_ID",1, field_fmt_281_287_4_4_info, field_fmt_281_287_4_4_set, field_fmt_281_287_4_4_get, NULL, 0}, - {"MODULE_HDR",4, field_fmt_288_415_3_0_info, field_fmt_288_415_3_0_set, field_fmt_288_415_3_0_get, NULL, 0}, + {1, field_fmt_0_12_12_12_info, field_fmt_0_12_12_12_set, field_fmt_0_12_12_12_get, NULL, 0}, + {1, field_fmt_0_11_12_12_info, field_fmt_0_11_12_12_set, field_fmt_0_11_12_12_get, NULL, 0}, + {1, field_fmt_0_11_12_12_info, field_fmt_0_11_12_12_set, field_fmt_0_11_12_12_get, NULL, 0}, + {1, field_fmt_12_15_12_12_info, field_fmt_12_15_12_12_set, field_fmt_12_15_12_12_get, NULL, 0}, + {1, field_fmt_12_13_12_12_info, field_fmt_12_13_12_12_set, field_fmt_12_13_12_12_get, NULL, 0}, + {1, field_fmt_14_21_12_12_info, field_fmt_14_21_12_12_set, field_fmt_14_21_12_12_get, NULL, 0}, + {1, field_fmt_16_16_12_12_info, field_fmt_16_16_12_12_set, field_fmt_16_16_12_12_get, NULL, 0}, + {1, field_fmt_22_27_12_12_info, field_fmt_22_27_12_12_set, field_fmt_22_27_12_12_get, NULL, 0}, + {1, field_fmt_22_27_12_12_info, field_fmt_22_27_12_12_set, field_fmt_22_27_12_12_get, NULL, 0}, + {1, field_fmt_28_28_12_12_info, field_fmt_28_28_12_12_set, field_fmt_28_28_12_12_get, NULL, 0}, + {1, field_fmt_29_29_12_12_info, field_fmt_29_29_12_12_set, field_fmt_29_29_12_12_get, NULL, 0}, + {1, field_fmt_30_30_12_12_info, field_fmt_30_30_12_12_set, field_fmt_30_30_12_12_get, NULL, 0}, + {1, field_fmt_31_31_12_12_info, field_fmt_31_31_12_12_set, field_fmt_31_31_12_12_get, NULL, 0}, + {2, field_fmt_32_95_11_10_info, field_fmt_32_95_11_10_set, field_fmt_32_95_11_10_get, NULL, 0}, + {1, field_fmt_96_99_9_9_info, field_fmt_96_99_9_9_set, field_fmt_96_99_9_9_get, NULL, 0}, + {1, field_fmt_100_100_9_9_info, field_fmt_100_100_9_9_set, field_fmt_100_100_9_9_get, NULL, 0}, + {1, field_fmt_101_106_9_9_info, field_fmt_101_106_9_9_set, field_fmt_101_106_9_9_get, NULL, 0}, + {1, field_fmt_101_103_9_9_info, field_fmt_101_103_9_9_set, field_fmt_101_103_9_9_get, NULL, 0}, + {1, field_fmt_107_108_9_9_info, field_fmt_107_108_9_9_set, field_fmt_107_108_9_9_get, NULL, 0}, + {1, field_fmt_109_110_9_9_info, field_fmt_109_110_9_9_set, field_fmt_109_110_9_9_get, NULL, 0}, + {1, field_fmt_111_125_9_9_info, field_fmt_111_125_9_9_set, field_fmt_111_125_9_9_get, NULL, 0}, + {1, field_fmt_126_127_9_9_info, field_fmt_126_127_9_9_set, field_fmt_126_127_9_9_get, NULL, 0}, + {1, field_fmt_129_129_8_8_info, field_fmt_129_129_8_8_set, field_fmt_129_129_8_8_get, NULL, 0}, + {1, field_fmt_130_130_8_8_info, field_fmt_130_130_8_8_set, field_fmt_130_130_8_8_get, NULL, 0}, + {1, field_fmt_131_138_8_8_info, field_fmt_131_138_8_8_set, field_fmt_131_138_8_8_get, NULL, 0}, + {1, field_fmt_139_141_8_8_info, field_fmt_139_141_8_8_set, field_fmt_139_141_8_8_get, NULL, 0}, + {1, field_fmt_142_142_8_8_info, field_fmt_142_142_8_8_set, field_fmt_142_142_8_8_get, NULL, 0}, + {1, field_fmt_143_145_8_8_info, field_fmt_143_145_8_8_set, field_fmt_143_145_8_8_get, NULL, 0}, + {1, field_fmt_146_157_8_8_info, field_fmt_146_157_8_8_set, field_fmt_146_157_8_8_get, NULL, 0}, + {1, field_fmt_158_159_8_8_info, field_fmt_158_159_8_8_set, field_fmt_158_159_8_8_get, NULL, 0}, + {1, field_fmt_160_173_7_7_info, field_fmt_160_173_7_7_set, field_fmt_160_173_7_7_get, NULL, 0}, + {1, field_fmt_174_174_7_7_info, field_fmt_174_174_7_7_set, field_fmt_174_174_7_7_get, NULL, 0}, + {1, field_fmt_175_191_7_7_info, field_fmt_175_191_7_7_set, field_fmt_175_191_7_7_get, NULL, 0}, + {1, field_fmt_193_212_6_6_info, field_fmt_193_212_6_6_set, field_fmt_193_212_6_6_get, NULL, 0}, + {1, field_fmt_213_213_6_6_info, field_fmt_213_213_6_6_set, field_fmt_213_213_6_6_get, NULL, 0}, + {1, field_fmt_214_222_6_6_info, field_fmt_214_222_6_6_set, field_fmt_214_222_6_6_get, NULL, 0}, + {1, field_fmt_223_223_6_6_info, field_fmt_223_223_6_6_set, field_fmt_223_223_6_6_get, NULL, 0}, + {1, field_fmt_224_255_5_5_info, field_fmt_224_255_5_5_set, field_fmt_224_255_5_5_get, NULL, 0}, + {1, field_fmt_256_271_4_4_info, field_fmt_256_271_4_4_set, field_fmt_256_271_4_4_get, NULL, 0}, + {1, field_fmt_272_273_4_4_info, field_fmt_272_273_4_4_set, field_fmt_272_273_4_4_get, bcm56990_b0_rxpmd_timestamp_type_names, 0}, + {1, field_fmt_274_278_4_4_info, field_fmt_274_278_4_4_set, field_fmt_274_278_4_4_get, NULL, 0}, + {1, field_fmt_279_279_4_4_info, field_fmt_279_279_4_4_set, field_fmt_279_279_4_4_get, NULL, 0}, + {1, field_fmt_280_280_4_4_info, field_fmt_280_280_4_4_set, field_fmt_280_280_4_4_get, NULL, 0}, + {1, field_fmt_281_287_4_4_info, field_fmt_281_287_4_4_set, field_fmt_281_287_4_4_get, NULL, 0}, + {4, field_fmt_288_415_3_0_info, field_fmt_288_415_3_0_set, field_fmt_288_415_3_0_get, NULL, 0}, }; @@ -2866,48 +2865,48 @@ static const shr_enum_map_t bcm56990_b0_rx_reason_mpls_proc_error_names[] = }; static bcmpkt_pmd_field_t bcm56990_b0_rx_reason_fields[BCM56990_B0_RX_REASON_COUNT] = { - {"CPU_UVLAN",1, field_fmt_32_32_11_11_info, field_fmt_32_32_11_11_set, field_fmt_32_32_11_11_get, NULL, 0}, - {"CPU_SLF",1, field_fmt_33_33_11_11_info, field_fmt_33_33_11_11_set, field_fmt_33_33_11_11_get, NULL, 0}, - {"CPU_DLF",1, field_fmt_34_34_11_11_info, field_fmt_34_34_11_11_set, field_fmt_34_34_11_11_get, NULL, 0}, - {"CPU_L2MOVE",1, field_fmt_35_35_11_11_info, field_fmt_35_35_11_11_set, field_fmt_35_35_11_11_get, NULL, 0}, - {"CPU_L2CPU",1, field_fmt_36_36_11_11_info, field_fmt_36_36_11_11_set, field_fmt_36_36_11_11_get, NULL, 0}, - {"CPU_L3SRC_MISS",1, field_fmt_37_37_11_11_info, field_fmt_37_37_11_11_set, field_fmt_37_37_11_11_get, NULL, 0}, - {"CPU_L3DST_MISS",1, field_fmt_38_38_11_11_info, field_fmt_38_38_11_11_set, field_fmt_38_38_11_11_get, NULL, 0}, - {"CPU_L3SRC_MOVE",1, field_fmt_39_39_11_11_info, field_fmt_39_39_11_11_set, field_fmt_39_39_11_11_get, NULL, 0}, - {"CPU_MC_MISS",1, field_fmt_40_40_11_11_info, field_fmt_40_40_11_11_set, field_fmt_40_40_11_11_get, NULL, 0}, - {"CPU_IPMC_MISS",1, field_fmt_41_41_11_11_info, field_fmt_41_41_11_11_set, field_fmt_41_41_11_11_get, NULL, 0}, - {"CPU_FFP",1, field_fmt_42_42_11_11_info, field_fmt_42_42_11_11_set, field_fmt_42_42_11_11_get, NULL, 0}, - {"CPU_L3HDR_ERR",1, field_fmt_43_43_11_11_info, field_fmt_43_43_11_11_set, field_fmt_43_43_11_11_get, NULL, 0}, - {"CPU_PROTOCOL_PKT",1, field_fmt_44_44_11_11_info, field_fmt_44_44_11_11_set, field_fmt_44_44_11_11_get, NULL, 0}, - {"CPU_DOS_ATTACK",1, field_fmt_45_45_11_11_info, field_fmt_45_45_11_11_set, field_fmt_45_45_11_11_get, NULL, 0}, - {"CPU_MARTIAN_ADDR",1, field_fmt_46_46_11_11_info, field_fmt_46_46_11_11_set, field_fmt_46_46_11_11_get, NULL, 0}, - {"CPU_TUNNEL_ERR",1, field_fmt_47_47_11_11_info, field_fmt_47_47_11_11_set, field_fmt_47_47_11_11_get, NULL, 0}, - {"CPU_SFLOW",1, field_fmt_48_49_11_11_info, field_fmt_48_49_11_11_set, field_fmt_48_49_11_11_get, bcm56990_b0_rx_reason_cpu_sflow_names, 0}, - {"ICMP_REDIRECT",1, field_fmt_50_50_11_11_info, field_fmt_50_50_11_11_set, field_fmt_50_50_11_11_get, NULL, 0}, - {"L3_SLOWPATH",1, field_fmt_51_51_11_11_info, field_fmt_51_51_11_11_set, field_fmt_51_51_11_11_get, NULL, 0}, - {"PARITY_ERROR",1, field_fmt_52_52_11_11_info, field_fmt_52_52_11_11_set, field_fmt_52_52_11_11_get, NULL, 0}, - {"L3_MTU_CHECK_FAIL",1, field_fmt_53_53_11_11_info, field_fmt_53_53_11_11_set, field_fmt_53_53_11_11_get, NULL, 0}, - {"MCIDX_ERROR",1, field_fmt_54_54_11_11_info, field_fmt_54_54_11_11_set, field_fmt_54_54_11_11_get, NULL, 0}, - {"CPU_VFP",1, field_fmt_55_55_11_11_info, field_fmt_55_55_11_11_set, field_fmt_55_55_11_11_get, NULL, 0}, - {"MPLS_PROC_ERROR",1, field_fmt_56_58_11_11_info, field_fmt_56_58_11_11_set, field_fmt_56_58_11_11_get, bcm56990_b0_rx_reason_mpls_proc_error_names, 0}, - {"PBT_NONUC_PKT",1, field_fmt_59_59_11_11_info, field_fmt_59_59_11_11_set, field_fmt_59_59_11_11_get, NULL, 0}, - {"L3_NEXT_HOP",1, field_fmt_60_60_11_11_info, field_fmt_60_60_11_11_set, field_fmt_60_60_11_11_get, NULL, 0}, - {"MY_STATION",1, field_fmt_61_61_11_11_info, field_fmt_61_61_11_11_set, field_fmt_61_61_11_11_get, NULL, 0}, - {"TIME_SYNC",1, field_fmt_62_62_11_11_info, field_fmt_62_62_11_11_set, field_fmt_62_62_11_11_get, NULL, 0}, - {"TUNNEL_DECAP_ECN_ERROR",1, field_fmt_63_63_11_11_info, field_fmt_63_63_11_11_set, field_fmt_63_63_11_11_get, NULL, 0}, - {"BFD_SLOWPATH",1, field_fmt_64_64_10_10_info, field_fmt_64_64_10_10_set, field_fmt_64_64_10_10_get, NULL, 0}, - {"BFD_ERROR",1, field_fmt_65_65_10_10_info, field_fmt_65_65_10_10_set, field_fmt_65_65_10_10_get, NULL, 0}, - {"PACKET_TRACE_TO_CPU",1, field_fmt_66_66_10_10_info, field_fmt_66_66_10_10_set, field_fmt_66_66_10_10_get, NULL, 0}, - {"MPLS_UNKNOWN_CONTROL_PKT",1, field_fmt_67_67_10_10_info, field_fmt_67_67_10_10_set, field_fmt_67_67_10_10_get, NULL, 0}, - {"MPLS_ALERT_LABEL",1, field_fmt_68_68_10_10_info, field_fmt_68_68_10_10_set, field_fmt_68_68_10_10_get, NULL, 0}, - {"CPU_IPMC_INTERFACE_MISMATCH",1, field_fmt_69_69_10_10_info, field_fmt_69_69_10_10_set, field_fmt_69_69_10_10_get, NULL, 0}, - {"DLB_MONITOR",1, field_fmt_70_70_10_10_info, field_fmt_70_70_10_10_set, field_fmt_70_70_10_10_get, NULL, 0}, - {"INT_TURN_AROUND",1, field_fmt_71_71_10_10_info, field_fmt_71_71_10_10_set, field_fmt_71_71_10_10_get, NULL, 0}, - {"ETRAP_MONITOR",1, field_fmt_72_72_10_10_info, field_fmt_72_72_10_10_set, field_fmt_72_72_10_10_get, NULL, 0}, - {"SRV6_ERROR",1, field_fmt_73_73_10_10_info, field_fmt_73_73_10_10_set, field_fmt_73_73_10_10_get, NULL, 0}, - {"VXLAN_VN_ID_MISS",1, field_fmt_74_74_10_10_info, field_fmt_74_74_10_10_set, field_fmt_74_74_10_10_get, NULL, 0}, - {"VXLAN_SIP_MISS",1, field_fmt_75_75_10_10_info, field_fmt_75_75_10_10_set, field_fmt_75_75_10_10_get, NULL, 0}, - {"ADAPT_MISS",1, field_fmt_76_76_10_10_info, field_fmt_76_76_10_10_set, field_fmt_76_76_10_10_get, NULL, 0}, + {1, field_fmt_32_32_11_11_info, field_fmt_32_32_11_11_set, field_fmt_32_32_11_11_get, NULL, 0}, + {1, field_fmt_33_33_11_11_info, field_fmt_33_33_11_11_set, field_fmt_33_33_11_11_get, NULL, 0}, + {1, field_fmt_34_34_11_11_info, field_fmt_34_34_11_11_set, field_fmt_34_34_11_11_get, NULL, 0}, + {1, field_fmt_35_35_11_11_info, field_fmt_35_35_11_11_set, field_fmt_35_35_11_11_get, NULL, 0}, + {1, field_fmt_36_36_11_11_info, field_fmt_36_36_11_11_set, field_fmt_36_36_11_11_get, NULL, 0}, + {1, field_fmt_37_37_11_11_info, field_fmt_37_37_11_11_set, field_fmt_37_37_11_11_get, NULL, 0}, + {1, field_fmt_38_38_11_11_info, field_fmt_38_38_11_11_set, field_fmt_38_38_11_11_get, NULL, 0}, + {1, field_fmt_39_39_11_11_info, field_fmt_39_39_11_11_set, field_fmt_39_39_11_11_get, NULL, 0}, + {1, field_fmt_40_40_11_11_info, field_fmt_40_40_11_11_set, field_fmt_40_40_11_11_get, NULL, 0}, + {1, field_fmt_41_41_11_11_info, field_fmt_41_41_11_11_set, field_fmt_41_41_11_11_get, NULL, 0}, + {1, field_fmt_42_42_11_11_info, field_fmt_42_42_11_11_set, field_fmt_42_42_11_11_get, NULL, 0}, + {1, field_fmt_43_43_11_11_info, field_fmt_43_43_11_11_set, field_fmt_43_43_11_11_get, NULL, 0}, + {1, field_fmt_44_44_11_11_info, field_fmt_44_44_11_11_set, field_fmt_44_44_11_11_get, NULL, 0}, + {1, field_fmt_45_45_11_11_info, field_fmt_45_45_11_11_set, field_fmt_45_45_11_11_get, NULL, 0}, + {1, field_fmt_46_46_11_11_info, field_fmt_46_46_11_11_set, field_fmt_46_46_11_11_get, NULL, 0}, + {1, field_fmt_47_47_11_11_info, field_fmt_47_47_11_11_set, field_fmt_47_47_11_11_get, NULL, 0}, + {1, field_fmt_48_49_11_11_info, field_fmt_48_49_11_11_set, field_fmt_48_49_11_11_get, bcm56990_b0_rx_reason_cpu_sflow_names, 0}, + {1, field_fmt_50_50_11_11_info, field_fmt_50_50_11_11_set, field_fmt_50_50_11_11_get, NULL, 0}, + {1, field_fmt_51_51_11_11_info, field_fmt_51_51_11_11_set, field_fmt_51_51_11_11_get, NULL, 0}, + {1, field_fmt_52_52_11_11_info, field_fmt_52_52_11_11_set, field_fmt_52_52_11_11_get, NULL, 0}, + {1, field_fmt_53_53_11_11_info, field_fmt_53_53_11_11_set, field_fmt_53_53_11_11_get, NULL, 0}, + {1, field_fmt_54_54_11_11_info, field_fmt_54_54_11_11_set, field_fmt_54_54_11_11_get, NULL, 0}, + {1, field_fmt_55_55_11_11_info, field_fmt_55_55_11_11_set, field_fmt_55_55_11_11_get, NULL, 0}, + {1, field_fmt_56_58_11_11_info, field_fmt_56_58_11_11_set, field_fmt_56_58_11_11_get, bcm56990_b0_rx_reason_mpls_proc_error_names, 0}, + {1, field_fmt_59_59_11_11_info, field_fmt_59_59_11_11_set, field_fmt_59_59_11_11_get, NULL, 0}, + {1, field_fmt_60_60_11_11_info, field_fmt_60_60_11_11_set, field_fmt_60_60_11_11_get, NULL, 0}, + {1, field_fmt_61_61_11_11_info, field_fmt_61_61_11_11_set, field_fmt_61_61_11_11_get, NULL, 0}, + {1, field_fmt_62_62_11_11_info, field_fmt_62_62_11_11_set, field_fmt_62_62_11_11_get, NULL, 0}, + {1, field_fmt_63_63_11_11_info, field_fmt_63_63_11_11_set, field_fmt_63_63_11_11_get, NULL, 0}, + {1, field_fmt_64_64_10_10_info, field_fmt_64_64_10_10_set, field_fmt_64_64_10_10_get, NULL, 0}, + {1, field_fmt_65_65_10_10_info, field_fmt_65_65_10_10_set, field_fmt_65_65_10_10_get, NULL, 0}, + {1, field_fmt_66_66_10_10_info, field_fmt_66_66_10_10_set, field_fmt_66_66_10_10_get, NULL, 0}, + {1, field_fmt_67_67_10_10_info, field_fmt_67_67_10_10_set, field_fmt_67_67_10_10_get, NULL, 0}, + {1, field_fmt_68_68_10_10_info, field_fmt_68_68_10_10_set, field_fmt_68_68_10_10_get, NULL, 0}, + {1, field_fmt_69_69_10_10_info, field_fmt_69_69_10_10_set, field_fmt_69_69_10_10_get, NULL, 0}, + {1, field_fmt_70_70_10_10_info, field_fmt_70_70_10_10_set, field_fmt_70_70_10_10_get, NULL, 0}, + {1, field_fmt_71_71_10_10_info, field_fmt_71_71_10_10_set, field_fmt_71_71_10_10_get, NULL, 0}, + {1, field_fmt_72_72_10_10_info, field_fmt_72_72_10_10_set, field_fmt_72_72_10_10_get, NULL, 0}, + {1, field_fmt_73_73_10_10_info, field_fmt_73_73_10_10_set, field_fmt_73_73_10_10_get, NULL, 0}, + {1, field_fmt_74_74_10_10_info, field_fmt_74_74_10_10_set, field_fmt_74_74_10_10_get, NULL, 0}, + {1, field_fmt_75_75_10_10_info, field_fmt_75_75_10_10_set, field_fmt_75_75_10_10_get, NULL, 0}, + {1, field_fmt_76_76_10_10_info, field_fmt_76_76_10_10_set, field_fmt_76_76_10_10_get, NULL, 0}, }; @@ -2939,29 +2938,29 @@ static const shr_enum_map_t bcm56990_b0_txpmd_start_names[] = }; static bcmpkt_pmd_field_t bcm56990_b0_txpmd_fields[BCM56990_B0_TXPMD_COUNT] = { - {"CELL_LENGTH",1, field_fmt_0_7_3_3_info, field_fmt_0_7_3_3_set, field_fmt_0_7_3_3_get, NULL, 0}, - {"EOP",1, field_fmt_8_8_3_3_info, field_fmt_8_8_3_3_set, field_fmt_8_8_3_3_get, NULL, 0}, - {"SOP",1, field_fmt_9_9_3_3_info, field_fmt_9_9_3_3_set, field_fmt_9_9_3_3_get, NULL, 0}, - {"PKT_LENGTH",1, field_fmt_10_23_3_3_info, field_fmt_10_23_3_3_set, field_fmt_10_23_3_3_get, NULL, 0}, - {"IPCF_PTR",1, field_fmt_24_31_3_3_info, field_fmt_24_31_3_3_set, field_fmt_24_31_3_3_get, NULL, 0}, - {"SRC_MODID",1, field_fmt_32_39_2_2_info, field_fmt_32_39_2_2_set, field_fmt_32_39_2_2_get, NULL, 0}, - {"COS",1, field_fmt_40_45_2_2_info, field_fmt_40_45_2_2_set, field_fmt_40_45_2_2_get, NULL, 0}, - {"UNICAST",1, field_fmt_46_46_2_2_info, field_fmt_46_46_2_2_set, field_fmt_46_46_2_2_get, NULL, 0}, - {"SET_L2BM",1, field_fmt_47_47_2_2_info, field_fmt_47_47_2_2_set, field_fmt_47_47_2_2_get, NULL, 0}, - {"RQE_Q_NUM",1, field_fmt_48_51_2_2_info, field_fmt_48_51_2_2_set, field_fmt_48_51_2_2_get, NULL, 0}, - {"SPAP",1, field_fmt_52_53_2_2_info, field_fmt_52_53_2_2_set, field_fmt_52_53_2_2_get, NULL, 0}, - {"SPID",1, field_fmt_54_55_2_2_info, field_fmt_54_55_2_2_set, field_fmt_54_55_2_2_get, NULL, 0}, - {"SPID_OVERRIDE",1, field_fmt_56_56_2_2_info, field_fmt_56_56_2_2_set, field_fmt_56_56_2_2_get, NULL, 0}, - {"INPUT_PRI",1, field_fmt_57_60_2_2_info, field_fmt_57_60_2_2_set, field_fmt_57_60_2_2_get, NULL, 0}, - {"LOCAL_DEST_PORT",1, field_fmt_63_71_2_1_info, field_fmt_63_71_2_1_set, field_fmt_63_71_2_1_get, NULL, 0}, - {"IEEE1588_TIMESTAMP_HDR_OFFSET",1, field_fmt_72_79_1_1_info, field_fmt_72_79_1_1_set, field_fmt_72_79_1_1_get, NULL, 0}, - {"TX_TS",1, field_fmt_80_80_1_1_info, field_fmt_80_80_1_1_set, field_fmt_80_80_1_1_get, NULL, 0}, - {"IEEE1588_INGRESS_TIMESTAMP_SIGN",1, field_fmt_81_81_1_1_info, field_fmt_81_81_1_1_set, field_fmt_81_81_1_1_get, NULL, 0}, - {"IEEE1588_REGEN_UDP_CHECKSUM",1, field_fmt_82_82_1_1_info, field_fmt_82_82_1_1_set, field_fmt_82_82_1_1_get, NULL, 0}, - {"IEEE1588_ONE_STEP_ENABLE",1, field_fmt_83_83_1_1_info, field_fmt_83_83_1_1_set, field_fmt_83_83_1_1_get, NULL, 0}, - {"CELL_ERROR",1, field_fmt_84_84_1_1_info, field_fmt_84_84_1_1_set, field_fmt_84_84_1_1_get, NULL, 0}, - {"HEADER_TYPE",1, field_fmt_120_125_0_0_info, field_fmt_120_125_0_0_set, field_fmt_120_125_0_0_get, bcm56990_b0_txpmd_header_type_names, 0}, - {"START",1, field_fmt_126_127_0_0_info, field_fmt_126_127_0_0_set, field_fmt_126_127_0_0_get, bcm56990_b0_txpmd_start_names, 0}, + {1, field_fmt_0_7_3_3_info, field_fmt_0_7_3_3_set, field_fmt_0_7_3_3_get, NULL, 0}, + {1, field_fmt_8_8_3_3_info, field_fmt_8_8_3_3_set, field_fmt_8_8_3_3_get, NULL, 0}, + {1, field_fmt_9_9_3_3_info, field_fmt_9_9_3_3_set, field_fmt_9_9_3_3_get, NULL, 0}, + {1, field_fmt_10_23_3_3_info, field_fmt_10_23_3_3_set, field_fmt_10_23_3_3_get, NULL, 0}, + {1, field_fmt_24_31_3_3_info, field_fmt_24_31_3_3_set, field_fmt_24_31_3_3_get, NULL, 0}, + {1, field_fmt_32_39_2_2_info, field_fmt_32_39_2_2_set, field_fmt_32_39_2_2_get, NULL, 0}, + {1, field_fmt_40_45_2_2_info, field_fmt_40_45_2_2_set, field_fmt_40_45_2_2_get, NULL, 0}, + {1, field_fmt_46_46_2_2_info, field_fmt_46_46_2_2_set, field_fmt_46_46_2_2_get, NULL, 0}, + {1, field_fmt_47_47_2_2_info, field_fmt_47_47_2_2_set, field_fmt_47_47_2_2_get, NULL, 0}, + {1, field_fmt_48_51_2_2_info, field_fmt_48_51_2_2_set, field_fmt_48_51_2_2_get, NULL, 0}, + {1, field_fmt_52_53_2_2_info, field_fmt_52_53_2_2_set, field_fmt_52_53_2_2_get, NULL, 0}, + {1, field_fmt_54_55_2_2_info, field_fmt_54_55_2_2_set, field_fmt_54_55_2_2_get, NULL, 0}, + {1, field_fmt_56_56_2_2_info, field_fmt_56_56_2_2_set, field_fmt_56_56_2_2_get, NULL, 0}, + {1, field_fmt_57_60_2_2_info, field_fmt_57_60_2_2_set, field_fmt_57_60_2_2_get, NULL, 0}, + {1, field_fmt_63_71_2_1_info, field_fmt_63_71_2_1_set, field_fmt_63_71_2_1_get, NULL, 0}, + {1, field_fmt_72_79_1_1_info, field_fmt_72_79_1_1_set, field_fmt_72_79_1_1_get, NULL, 0}, + {1, field_fmt_80_80_1_1_info, field_fmt_80_80_1_1_set, field_fmt_80_80_1_1_get, NULL, 0}, + {1, field_fmt_81_81_1_1_info, field_fmt_81_81_1_1_set, field_fmt_81_81_1_1_get, NULL, 0}, + {1, field_fmt_82_82_1_1_info, field_fmt_82_82_1_1_set, field_fmt_82_82_1_1_get, NULL, 0}, + {1, field_fmt_83_83_1_1_info, field_fmt_83_83_1_1_set, field_fmt_83_83_1_1_get, NULL, 0}, + {1, field_fmt_84_84_1_1_info, field_fmt_84_84_1_1_set, field_fmt_84_84_1_1_get, NULL, 0}, + {1, field_fmt_120_125_0_0_info, field_fmt_120_125_0_0_set, field_fmt_120_125_0_0_get, bcm56990_b0_txpmd_header_type_names, 0}, + {1, field_fmt_126_127_0_0_info, field_fmt_126_127_0_0_set, field_fmt_126_127_0_0_get, bcm56990_b0_txpmd_start_names, 0}, }; @@ -2992,31 +2991,31 @@ static const shr_enum_map_t bcm56990_b0_lbhdr_header_type_names[] = }; static bcmpkt_pmd_field_t bcm56990_b0_lbhdr_fields[BCM56990_B0_LBHDR_COUNT] = { - {"ETHERNET::PP_PORT",1, field_fmt_0_8_3_3_info, field_fmt_0_8_3_3_set, field_fmt_0_8_3_3_get, NULL, 3}, - {"ETHERNET::SUBFLOW_TYPE",1, field_fmt_9_10_3_3_info, field_fmt_9_10_3_3_set, field_fmt_9_10_3_3_get, bcm56990_b0_lbhdr_ethernet_subflow_type_names, 3}, - {"ETHERNET::DESTINATION_TYPE",1, field_fmt_11_14_3_3_info, field_fmt_11_14_3_3_set, field_fmt_11_14_3_3_get, bcm56990_b0_lbhdr_ethernet_destination_type_names, 3}, - {"ETHERNET::DESTINATION",1, field_fmt_15_30_3_3_info, field_fmt_15_30_3_3_set, field_fmt_15_30_3_3_get, NULL, 3}, - {"ETHERNET::ROUTED_PKT",1, field_fmt_31_31_3_3_info, field_fmt_31_31_3_3_set, field_fmt_31_31_3_3_get, NULL, 3}, - {"ETHERNET::QOS_FIELDS_VLD",1, field_fmt_32_32_2_2_info, field_fmt_32_32_2_2_set, field_fmt_32_32_2_2_get, NULL, 3}, - {"ETHERNET::INT_CN",1, field_fmt_33_34_2_2_info, field_fmt_33_34_2_2_set, field_fmt_33_34_2_2_get, NULL, 3}, - {"ETHERNET::INT_PRI",1, field_fmt_35_38_2_2_info, field_fmt_35_38_2_2_set, field_fmt_35_38_2_2_get, NULL, 3}, - {"ETHERNET::DP",1, field_fmt_39_40_2_2_info, field_fmt_39_40_2_2_set, field_fmt_39_40_2_2_get, NULL, 3}, - {"ETHERNET::ECMP_MEMBER_ID",1, field_fmt_41_54_2_2_info, field_fmt_41_54_2_2_set, field_fmt_41_54_2_2_get, NULL, 3}, - {"ETHERNET::VRF",1, field_fmt_55_67_2_1_info, field_fmt_55_67_2_1_set, field_fmt_55_67_2_1_get, NULL, 3}, - {"ETHERNET::VRF_VALID",1, field_fmt_68_68_1_1_info, field_fmt_68_68_1_1_set, field_fmt_68_68_1_1_get, NULL, 3}, - {"ETHERNET::MCAST_LB_INDEX",1, field_fmt_70_77_1_1_info, field_fmt_70_77_1_1_set, field_fmt_70_77_1_1_get, NULL, 3}, - {"ETHERNET::MCAST_LB_INDEX_VLD",1, field_fmt_78_78_1_1_info, field_fmt_78_78_1_1_set, field_fmt_78_78_1_1_get, NULL, 3}, - {"TRILL_ACCESS_NONUC::TC",1, field_fmt_0_3_3_3_info, field_fmt_0_3_3_3_set, field_fmt_0_3_3_3_get, NULL, 2}, - {"TRILL_ACCESS_NONUC::CNG",1, field_fmt_4_5_3_3_info, field_fmt_4_5_3_3_set, field_fmt_4_5_3_3_get, NULL, 2}, - {"TRILL_NETWORK_NONUC::TC",1, field_fmt_0_3_3_3_info, field_fmt_0_3_3_3_set, field_fmt_0_3_3_3_get, NULL, 1}, - {"TRILL_NETWORK_NONUC::CNG",1, field_fmt_4_5_3_3_info, field_fmt_4_5_3_3_set, field_fmt_4_5_3_3_get, NULL, 1}, - {"PKT_PROFILE",1, field_fmt_90_92_1_1_info, field_fmt_90_92_1_1_set, field_fmt_90_92_1_1_get, NULL, 0}, - {"VISIBILITY_PKT",1, field_fmt_93_93_1_1_info, field_fmt_93_93_1_1_set, field_fmt_93_93_1_1_get, NULL, 0}, - {"SOURCE",1, field_fmt_94_109_1_0_info, field_fmt_94_109_1_0_set, field_fmt_94_109_1_0_get, NULL, 0}, - {"SOURCE_TYPE",1, field_fmt_110_110_0_0_info, field_fmt_110_110_0_0_set, field_fmt_110_110_0_0_get, NULL, 0}, - {"HEADER_TYPE",1, field_fmt_111_115_0_0_info, field_fmt_111_115_0_0_set, field_fmt_111_115_0_0_get, bcm56990_b0_lbhdr_header_type_names, 0}, - {"INPUT_PRIORITY",1, field_fmt_116_119_0_0_info, field_fmt_116_119_0_0_set, field_fmt_116_119_0_0_get, NULL, 0}, - {"START",1, field_fmt_120_127_0_0_info, field_fmt_120_127_0_0_set, field_fmt_120_127_0_0_get, NULL, 0}, + {1, field_fmt_0_8_3_3_info, field_fmt_0_8_3_3_set, field_fmt_0_8_3_3_get, NULL, 3}, + {1, field_fmt_9_10_3_3_info, field_fmt_9_10_3_3_set, field_fmt_9_10_3_3_get, bcm56990_b0_lbhdr_ethernet_subflow_type_names, 3}, + {1, field_fmt_11_14_3_3_info, field_fmt_11_14_3_3_set, field_fmt_11_14_3_3_get, bcm56990_b0_lbhdr_ethernet_destination_type_names, 3}, + {1, field_fmt_15_30_3_3_info, field_fmt_15_30_3_3_set, field_fmt_15_30_3_3_get, NULL, 3}, + {1, field_fmt_31_31_3_3_info, field_fmt_31_31_3_3_set, field_fmt_31_31_3_3_get, NULL, 3}, + {1, field_fmt_32_32_2_2_info, field_fmt_32_32_2_2_set, field_fmt_32_32_2_2_get, NULL, 3}, + {1, field_fmt_33_34_2_2_info, field_fmt_33_34_2_2_set, field_fmt_33_34_2_2_get, NULL, 3}, + {1, field_fmt_35_38_2_2_info, field_fmt_35_38_2_2_set, field_fmt_35_38_2_2_get, NULL, 3}, + {1, field_fmt_39_40_2_2_info, field_fmt_39_40_2_2_set, field_fmt_39_40_2_2_get, NULL, 3}, + {1, field_fmt_41_54_2_2_info, field_fmt_41_54_2_2_set, field_fmt_41_54_2_2_get, NULL, 3}, + {1, field_fmt_55_67_2_1_info, field_fmt_55_67_2_1_set, field_fmt_55_67_2_1_get, NULL, 3}, + {1, field_fmt_68_68_1_1_info, field_fmt_68_68_1_1_set, field_fmt_68_68_1_1_get, NULL, 3}, + {1, field_fmt_70_77_1_1_info, field_fmt_70_77_1_1_set, field_fmt_70_77_1_1_get, NULL, 3}, + {1, field_fmt_78_78_1_1_info, field_fmt_78_78_1_1_set, field_fmt_78_78_1_1_get, NULL, 3}, + {1, field_fmt_0_3_3_3_info, field_fmt_0_3_3_3_set, field_fmt_0_3_3_3_get, NULL, 2}, + {1, field_fmt_4_5_3_3_info, field_fmt_4_5_3_3_set, field_fmt_4_5_3_3_get, NULL, 2}, + {1, field_fmt_0_3_3_3_info, field_fmt_0_3_3_3_set, field_fmt_0_3_3_3_get, NULL, 1}, + {1, field_fmt_4_5_3_3_info, field_fmt_4_5_3_3_set, field_fmt_4_5_3_3_get, NULL, 1}, + {1, field_fmt_90_92_1_1_info, field_fmt_90_92_1_1_set, field_fmt_90_92_1_1_get, NULL, 0}, + {1, field_fmt_93_93_1_1_info, field_fmt_93_93_1_1_set, field_fmt_93_93_1_1_get, NULL, 0}, + {1, field_fmt_94_109_1_0_info, field_fmt_94_109_1_0_set, field_fmt_94_109_1_0_get, NULL, 0}, + {1, field_fmt_110_110_0_0_info, field_fmt_110_110_0_0_set, field_fmt_110_110_0_0_get, NULL, 0}, + {1, field_fmt_111_115_0_0_info, field_fmt_111_115_0_0_set, field_fmt_111_115_0_0_get, bcm56990_b0_lbhdr_header_type_names, 0}, + {1, field_fmt_116_119_0_0_info, field_fmt_116_119_0_0_set, field_fmt_116_119_0_0_get, NULL, 0}, + {1, field_fmt_120_127_0_0_info, field_fmt_120_127_0_0_set, field_fmt_120_127_0_0_get, NULL, 0}, }; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pkt_lbhdr.c similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pkt_lbhdr.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pkt_lbhdr.c index a6e3e47da57..787ef149de5 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pkt_lbhdr.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pkt_lbhdr.c @@ -5,8 +5,7 @@ * Edits to this file will be lost when it is regenerated. * Tool: INTERNAL/regs/xgs/generate-pmd.pl * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pkt_rxpmd.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pkt_rxpmd.c similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pkt_rxpmd.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pkt_rxpmd.c index dc7a7fa9879..27201c56ee2 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pkt_rxpmd.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pkt_rxpmd.c @@ -5,8 +5,7 @@ * Edits to this file will be lost when it is regenerated. * Tool: INTERNAL/regs/xgs/generate-pmd.pl * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -981,8 +980,6 @@ const bcmpkt_rxpmd_fget_t bcm56996_a0_rxpmd_fget = { NULL, NULL, NULL, - NULL, - NULL, NULL } }; @@ -1088,8 +1085,6 @@ const bcmpkt_rxpmd_fset_t bcm56996_a0_rxpmd_fset = { NULL, NULL, NULL, - NULL, - NULL, NULL } }; @@ -1116,7 +1111,7 @@ static int bcm56996_a0_rxpmd_view_infos[BCMPKT_RXPMD_FID_COUNT] = { -1, -1, -1, -1, -1, -1, -1, -2, -1, -1, -1, -1, -1, -2, -2, -2, -2, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -2, -2, -2, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, - -2, -2, -2, -2, -2, + -2, -2, -2, }; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pkt_txpmd.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pkt_txpmd.c similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pkt_txpmd.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pkt_txpmd.c index cbbe902e5fd..c9503facfc1 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pkt_txpmd.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pkt_txpmd.c @@ -5,8 +5,7 @@ * Edits to this file will be lost when it is regenerated. * Tool: INTERNAL/regs/xgs/generate-pmd.pl * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -450,7 +449,6 @@ const bcmpkt_txpmd_fget_t bcm56996_a0_txpmd_fget = { NULL, NULL, NULL, - NULL, NULL } }; @@ -586,7 +584,6 @@ const bcmpkt_txpmd_fset_t bcm56996_a0_txpmd_fset = { NULL, NULL, NULL, - NULL, NULL } }; @@ -612,7 +609,7 @@ static int bcm56996_a0_txpmd_view_infos[BCMPKT_TXPMD_FID_COUNT] = { -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, - -2, -2, + -2, }; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pmd_field.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pmd_field.c similarity index 77% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pmd_field.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pmd_field.c index e4a504217b4..3e097c3fca8 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pmd_field.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pmd_field.c @@ -5,8 +5,7 @@ * Edits to this file will be lost when it is regenerated. * Tool: INTERNAL/regs/xgs/generate-pmd.pl * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -2796,51 +2795,51 @@ static const shr_enum_map_t bcm56996_a0_rxpmd_timestamp_type_names[] = }; static bcmpkt_pmd_field_t bcm56996_a0_rxpmd_fields[BCM56996_A0_RXPMD_COUNT] = { - {"ING_L3_INTF",1, field_fmt_0_12_12_12_info, field_fmt_0_12_12_12_set, field_fmt_0_12_12_12_get, NULL, 0}, - {"I2E_CLASSID",1, field_fmt_0_11_12_12_info, field_fmt_0_11_12_12_set, field_fmt_0_11_12_12_get, NULL, 0}, - {"RX_BFD_SESSION_INDEX",1, field_fmt_0_11_12_12_info, field_fmt_0_11_12_12_set, field_fmt_0_11_12_12_get, NULL, 0}, - {"I2E_CLASSID_TYPE",1, field_fmt_12_15_12_12_info, field_fmt_12_15_12_12_set, field_fmt_12_15_12_12_get, NULL, 0}, - {"RX_BFD_START_OFFSET_TYPE",1, field_fmt_12_13_12_12_info, field_fmt_12_13_12_12_set, field_fmt_12_13_12_12_get, NULL, 0}, - {"RX_BFD_START_OFFSET",1, field_fmt_14_21_12_12_info, field_fmt_14_21_12_12_set, field_fmt_14_21_12_12_get, NULL, 0}, - {"ING_L3_INTF_VALID",1, field_fmt_16_16_12_12_info, field_fmt_16_16_12_12_set, field_fmt_16_16_12_12_get, NULL, 0}, - {"CPU_COS",1, field_fmt_22_27_12_12_info, field_fmt_22_27_12_12_set, field_fmt_22_27_12_12_get, NULL, 0}, - {"QUEUE_NUM",1, field_fmt_22_27_12_12_info, field_fmt_22_27_12_12_set, field_fmt_22_27_12_12_get, NULL, 0}, - {"BPDU",1, field_fmt_28_28_12_12_info, field_fmt_28_28_12_12_set, field_fmt_28_28_12_12_get, NULL, 0}, - {"CHANGE_DSCP",1, field_fmt_29_29_12_12_info, field_fmt_29_29_12_12_set, field_fmt_29_29_12_12_get, NULL, 0}, - {"CHANGE_ECN",1, field_fmt_30_30_12_12_info, field_fmt_30_30_12_12_set, field_fmt_30_30_12_12_get, NULL, 0}, - {"DLB_ID_VALID",1, field_fmt_31_31_12_12_info, field_fmt_31_31_12_12_set, field_fmt_31_31_12_12_get, NULL, 0}, - {"REASON",2, field_fmt_32_95_11_10_info, field_fmt_32_95_11_10_set, field_fmt_32_95_11_10_get, NULL, 0}, - {"REASON_TYPE",1, field_fmt_96_99_9_9_info, field_fmt_96_99_9_9_set, field_fmt_96_99_9_9_get, NULL, 0}, - {"DO_NOT_CHANGE_TTL",1, field_fmt_100_100_9_9_info, field_fmt_100_100_9_9_set, field_fmt_100_100_9_9_get, NULL, 0}, - {"DSCP",1, field_fmt_101_106_9_9_info, field_fmt_101_106_9_9_set, field_fmt_101_106_9_9_get, NULL, 0}, - {"SPECIAL_PACKET_TYPE",1, field_fmt_101_103_9_9_info, field_fmt_101_103_9_9_set, field_fmt_101_103_9_9_get, NULL, 0}, - {"ECN",1, field_fmt_107_108_9_9_info, field_fmt_107_108_9_9_set, field_fmt_107_108_9_9_get, NULL, 0}, - {"INCOMING_TAG_STATUS",1, field_fmt_109_110_9_9_info, field_fmt_109_110_9_9_set, field_fmt_109_110_9_9_get, NULL, 0}, - {"O_NHI",1, field_fmt_111_125_9_9_info, field_fmt_111_125_9_9_set, field_fmt_111_125_9_9_get, NULL, 0}, - {"ING_OTAG_ACTION",1, field_fmt_126_127_9_9_info, field_fmt_126_127_9_9_set, field_fmt_126_127_9_9_get, NULL, 0}, - {"IP_ROUTED",1, field_fmt_129_129_8_8_info, field_fmt_129_129_8_8_set, field_fmt_129_129_8_8_get, NULL, 0}, - {"L3ONLY",1, field_fmt_130_130_8_8_info, field_fmt_130_130_8_8_set, field_fmt_130_130_8_8_get, NULL, 0}, - {"MATCHED_RULE",1, field_fmt_131_138_8_8_info, field_fmt_131_138_8_8_set, field_fmt_131_138_8_8_get, NULL, 0}, - {"MTP_INDEX",1, field_fmt_139_141_8_8_info, field_fmt_139_141_8_8_set, field_fmt_139_141_8_8_get, NULL, 0}, - {"OUTER_CFI",1, field_fmt_142_142_8_8_info, field_fmt_142_142_8_8_set, field_fmt_142_142_8_8_get, NULL, 0}, - {"OUTER_PRI",1, field_fmt_143_145_8_8_info, field_fmt_143_145_8_8_set, field_fmt_143_145_8_8_get, NULL, 0}, - {"OUTER_VID",1, field_fmt_146_157_8_8_info, field_fmt_146_157_8_8_set, field_fmt_146_157_8_8_get, NULL, 0}, - {"INCOMING_INT_HDR_TYPE",1, field_fmt_158_159_8_8_info, field_fmt_158_159_8_8_set, field_fmt_158_159_8_8_get, NULL, 0}, - {"PKT_LENGTH",1, field_fmt_160_173_7_7_info, field_fmt_160_173_7_7_set, field_fmt_160_173_7_7_get, NULL, 0}, - {"REGEN_CRC",1, field_fmt_174_174_7_7_info, field_fmt_174_174_7_7_set, field_fmt_174_174_7_7_get, NULL, 0}, - {"REPLICATION_OR_NHOP_INDEX",1, field_fmt_175_191_7_7_info, field_fmt_175_191_7_7_set, field_fmt_175_191_7_7_get, NULL, 0}, - {"ENTROPY_LABEL",1, field_fmt_193_212_6_6_info, field_fmt_193_212_6_6_set, field_fmt_193_212_6_6_get, NULL, 0}, - {"SPECIAL_PACKET_INDICATOR",1, field_fmt_213_213_6_6_info, field_fmt_213_213_6_6_set, field_fmt_213_213_6_6_get, NULL, 0}, - {"SRC_PORT_NUM",1, field_fmt_214_222_6_6_info, field_fmt_214_222_6_6_set, field_fmt_214_222_6_6_get, NULL, 0}, - {"SWITCH",1, field_fmt_223_223_6_6_info, field_fmt_223_223_6_6_set, field_fmt_223_223_6_6_get, NULL, 0}, - {"TIMESTAMP",1, field_fmt_224_255_5_5_info, field_fmt_224_255_5_5_set, field_fmt_224_255_5_5_get, NULL, 0}, - {"TIMESTAMP_HI",1, field_fmt_256_271_4_4_info, field_fmt_256_271_4_4_set, field_fmt_256_271_4_4_get, NULL, 0}, - {"TIMESTAMP_TYPE",1, field_fmt_272_273_4_4_info, field_fmt_272_273_4_4_set, field_fmt_272_273_4_4_get, bcm56996_a0_rxpmd_timestamp_type_names, 0}, - {"TUNNEL_DECAP_TYPE",1, field_fmt_274_278_4_4_info, field_fmt_274_278_4_4_set, field_fmt_274_278_4_4_get, NULL, 0}, - {"UC_SW_COPY_DROPPED",1, field_fmt_279_279_4_4_info, field_fmt_279_279_4_4_set, field_fmt_279_279_4_4_get, NULL, 0}, - {"UNICAST_QUEUE",1, field_fmt_280_280_4_4_info, field_fmt_280_280_4_4_set, field_fmt_280_280_4_4_get, NULL, 0}, - {"DLB_ID",1, field_fmt_281_287_4_4_info, field_fmt_281_287_4_4_set, field_fmt_281_287_4_4_get, NULL, 0}, - {"MODULE_HDR",4, field_fmt_288_415_3_0_info, field_fmt_288_415_3_0_set, field_fmt_288_415_3_0_get, NULL, 0}, + {1, field_fmt_0_12_12_12_info, field_fmt_0_12_12_12_set, field_fmt_0_12_12_12_get, NULL, 0}, + {1, field_fmt_0_11_12_12_info, field_fmt_0_11_12_12_set, field_fmt_0_11_12_12_get, NULL, 0}, + {1, field_fmt_0_11_12_12_info, field_fmt_0_11_12_12_set, field_fmt_0_11_12_12_get, NULL, 0}, + {1, field_fmt_12_15_12_12_info, field_fmt_12_15_12_12_set, field_fmt_12_15_12_12_get, NULL, 0}, + {1, field_fmt_12_13_12_12_info, field_fmt_12_13_12_12_set, field_fmt_12_13_12_12_get, NULL, 0}, + {1, field_fmt_14_21_12_12_info, field_fmt_14_21_12_12_set, field_fmt_14_21_12_12_get, NULL, 0}, + {1, field_fmt_16_16_12_12_info, field_fmt_16_16_12_12_set, field_fmt_16_16_12_12_get, NULL, 0}, + {1, field_fmt_22_27_12_12_info, field_fmt_22_27_12_12_set, field_fmt_22_27_12_12_get, NULL, 0}, + {1, field_fmt_22_27_12_12_info, field_fmt_22_27_12_12_set, field_fmt_22_27_12_12_get, NULL, 0}, + {1, field_fmt_28_28_12_12_info, field_fmt_28_28_12_12_set, field_fmt_28_28_12_12_get, NULL, 0}, + {1, field_fmt_29_29_12_12_info, field_fmt_29_29_12_12_set, field_fmt_29_29_12_12_get, NULL, 0}, + {1, field_fmt_30_30_12_12_info, field_fmt_30_30_12_12_set, field_fmt_30_30_12_12_get, NULL, 0}, + {1, field_fmt_31_31_12_12_info, field_fmt_31_31_12_12_set, field_fmt_31_31_12_12_get, NULL, 0}, + {2, field_fmt_32_95_11_10_info, field_fmt_32_95_11_10_set, field_fmt_32_95_11_10_get, NULL, 0}, + {1, field_fmt_96_99_9_9_info, field_fmt_96_99_9_9_set, field_fmt_96_99_9_9_get, NULL, 0}, + {1, field_fmt_100_100_9_9_info, field_fmt_100_100_9_9_set, field_fmt_100_100_9_9_get, NULL, 0}, + {1, field_fmt_101_106_9_9_info, field_fmt_101_106_9_9_set, field_fmt_101_106_9_9_get, NULL, 0}, + {1, field_fmt_101_103_9_9_info, field_fmt_101_103_9_9_set, field_fmt_101_103_9_9_get, NULL, 0}, + {1, field_fmt_107_108_9_9_info, field_fmt_107_108_9_9_set, field_fmt_107_108_9_9_get, NULL, 0}, + {1, field_fmt_109_110_9_9_info, field_fmt_109_110_9_9_set, field_fmt_109_110_9_9_get, NULL, 0}, + {1, field_fmt_111_125_9_9_info, field_fmt_111_125_9_9_set, field_fmt_111_125_9_9_get, NULL, 0}, + {1, field_fmt_126_127_9_9_info, field_fmt_126_127_9_9_set, field_fmt_126_127_9_9_get, NULL, 0}, + {1, field_fmt_129_129_8_8_info, field_fmt_129_129_8_8_set, field_fmt_129_129_8_8_get, NULL, 0}, + {1, field_fmt_130_130_8_8_info, field_fmt_130_130_8_8_set, field_fmt_130_130_8_8_get, NULL, 0}, + {1, field_fmt_131_138_8_8_info, field_fmt_131_138_8_8_set, field_fmt_131_138_8_8_get, NULL, 0}, + {1, field_fmt_139_141_8_8_info, field_fmt_139_141_8_8_set, field_fmt_139_141_8_8_get, NULL, 0}, + {1, field_fmt_142_142_8_8_info, field_fmt_142_142_8_8_set, field_fmt_142_142_8_8_get, NULL, 0}, + {1, field_fmt_143_145_8_8_info, field_fmt_143_145_8_8_set, field_fmt_143_145_8_8_get, NULL, 0}, + {1, field_fmt_146_157_8_8_info, field_fmt_146_157_8_8_set, field_fmt_146_157_8_8_get, NULL, 0}, + {1, field_fmt_158_159_8_8_info, field_fmt_158_159_8_8_set, field_fmt_158_159_8_8_get, NULL, 0}, + {1, field_fmt_160_173_7_7_info, field_fmt_160_173_7_7_set, field_fmt_160_173_7_7_get, NULL, 0}, + {1, field_fmt_174_174_7_7_info, field_fmt_174_174_7_7_set, field_fmt_174_174_7_7_get, NULL, 0}, + {1, field_fmt_175_191_7_7_info, field_fmt_175_191_7_7_set, field_fmt_175_191_7_7_get, NULL, 0}, + {1, field_fmt_193_212_6_6_info, field_fmt_193_212_6_6_set, field_fmt_193_212_6_6_get, NULL, 0}, + {1, field_fmt_213_213_6_6_info, field_fmt_213_213_6_6_set, field_fmt_213_213_6_6_get, NULL, 0}, + {1, field_fmt_214_222_6_6_info, field_fmt_214_222_6_6_set, field_fmt_214_222_6_6_get, NULL, 0}, + {1, field_fmt_223_223_6_6_info, field_fmt_223_223_6_6_set, field_fmt_223_223_6_6_get, NULL, 0}, + {1, field_fmt_224_255_5_5_info, field_fmt_224_255_5_5_set, field_fmt_224_255_5_5_get, NULL, 0}, + {1, field_fmt_256_271_4_4_info, field_fmt_256_271_4_4_set, field_fmt_256_271_4_4_get, NULL, 0}, + {1, field_fmt_272_273_4_4_info, field_fmt_272_273_4_4_set, field_fmt_272_273_4_4_get, bcm56996_a0_rxpmd_timestamp_type_names, 0}, + {1, field_fmt_274_278_4_4_info, field_fmt_274_278_4_4_set, field_fmt_274_278_4_4_get, NULL, 0}, + {1, field_fmt_279_279_4_4_info, field_fmt_279_279_4_4_set, field_fmt_279_279_4_4_get, NULL, 0}, + {1, field_fmt_280_280_4_4_info, field_fmt_280_280_4_4_set, field_fmt_280_280_4_4_get, NULL, 0}, + {1, field_fmt_281_287_4_4_info, field_fmt_281_287_4_4_set, field_fmt_281_287_4_4_get, NULL, 0}, + {4, field_fmt_288_415_3_0_info, field_fmt_288_415_3_0_set, field_fmt_288_415_3_0_get, NULL, 0}, }; @@ -2866,48 +2865,48 @@ static const shr_enum_map_t bcm56996_a0_rx_reason_mpls_proc_error_names[] = }; static bcmpkt_pmd_field_t bcm56996_a0_rx_reason_fields[BCM56996_A0_RX_REASON_COUNT] = { - {"CPU_UVLAN",1, field_fmt_32_32_11_11_info, field_fmt_32_32_11_11_set, field_fmt_32_32_11_11_get, NULL, 0}, - {"CPU_SLF",1, field_fmt_33_33_11_11_info, field_fmt_33_33_11_11_set, field_fmt_33_33_11_11_get, NULL, 0}, - {"CPU_DLF",1, field_fmt_34_34_11_11_info, field_fmt_34_34_11_11_set, field_fmt_34_34_11_11_get, NULL, 0}, - {"CPU_L2MOVE",1, field_fmt_35_35_11_11_info, field_fmt_35_35_11_11_set, field_fmt_35_35_11_11_get, NULL, 0}, - {"CPU_L2CPU",1, field_fmt_36_36_11_11_info, field_fmt_36_36_11_11_set, field_fmt_36_36_11_11_get, NULL, 0}, - {"CPU_L3SRC_MISS",1, field_fmt_37_37_11_11_info, field_fmt_37_37_11_11_set, field_fmt_37_37_11_11_get, NULL, 0}, - {"CPU_L3DST_MISS",1, field_fmt_38_38_11_11_info, field_fmt_38_38_11_11_set, field_fmt_38_38_11_11_get, NULL, 0}, - {"CPU_L3SRC_MOVE",1, field_fmt_39_39_11_11_info, field_fmt_39_39_11_11_set, field_fmt_39_39_11_11_get, NULL, 0}, - {"CPU_MC_MISS",1, field_fmt_40_40_11_11_info, field_fmt_40_40_11_11_set, field_fmt_40_40_11_11_get, NULL, 0}, - {"CPU_IPMC_MISS",1, field_fmt_41_41_11_11_info, field_fmt_41_41_11_11_set, field_fmt_41_41_11_11_get, NULL, 0}, - {"CPU_FFP",1, field_fmt_42_42_11_11_info, field_fmt_42_42_11_11_set, field_fmt_42_42_11_11_get, NULL, 0}, - {"CPU_L3HDR_ERR",1, field_fmt_43_43_11_11_info, field_fmt_43_43_11_11_set, field_fmt_43_43_11_11_get, NULL, 0}, - {"CPU_PROTOCOL_PKT",1, field_fmt_44_44_11_11_info, field_fmt_44_44_11_11_set, field_fmt_44_44_11_11_get, NULL, 0}, - {"CPU_DOS_ATTACK",1, field_fmt_45_45_11_11_info, field_fmt_45_45_11_11_set, field_fmt_45_45_11_11_get, NULL, 0}, - {"CPU_MARTIAN_ADDR",1, field_fmt_46_46_11_11_info, field_fmt_46_46_11_11_set, field_fmt_46_46_11_11_get, NULL, 0}, - {"CPU_TUNNEL_ERR",1, field_fmt_47_47_11_11_info, field_fmt_47_47_11_11_set, field_fmt_47_47_11_11_get, NULL, 0}, - {"CPU_SFLOW",1, field_fmt_48_49_11_11_info, field_fmt_48_49_11_11_set, field_fmt_48_49_11_11_get, bcm56996_a0_rx_reason_cpu_sflow_names, 0}, - {"ICMP_REDIRECT",1, field_fmt_50_50_11_11_info, field_fmt_50_50_11_11_set, field_fmt_50_50_11_11_get, NULL, 0}, - {"L3_SLOWPATH",1, field_fmt_51_51_11_11_info, field_fmt_51_51_11_11_set, field_fmt_51_51_11_11_get, NULL, 0}, - {"PARITY_ERROR",1, field_fmt_52_52_11_11_info, field_fmt_52_52_11_11_set, field_fmt_52_52_11_11_get, NULL, 0}, - {"L3_MTU_CHECK_FAIL",1, field_fmt_53_53_11_11_info, field_fmt_53_53_11_11_set, field_fmt_53_53_11_11_get, NULL, 0}, - {"MCIDX_ERROR",1, field_fmt_54_54_11_11_info, field_fmt_54_54_11_11_set, field_fmt_54_54_11_11_get, NULL, 0}, - {"CPU_VFP",1, field_fmt_55_55_11_11_info, field_fmt_55_55_11_11_set, field_fmt_55_55_11_11_get, NULL, 0}, - {"MPLS_PROC_ERROR",1, field_fmt_56_58_11_11_info, field_fmt_56_58_11_11_set, field_fmt_56_58_11_11_get, bcm56996_a0_rx_reason_mpls_proc_error_names, 0}, - {"PBT_NONUC_PKT",1, field_fmt_59_59_11_11_info, field_fmt_59_59_11_11_set, field_fmt_59_59_11_11_get, NULL, 0}, - {"L3_NEXT_HOP",1, field_fmt_60_60_11_11_info, field_fmt_60_60_11_11_set, field_fmt_60_60_11_11_get, NULL, 0}, - {"MY_STATION",1, field_fmt_61_61_11_11_info, field_fmt_61_61_11_11_set, field_fmt_61_61_11_11_get, NULL, 0}, - {"TIME_SYNC",1, field_fmt_62_62_11_11_info, field_fmt_62_62_11_11_set, field_fmt_62_62_11_11_get, NULL, 0}, - {"TUNNEL_DECAP_ECN_ERROR",1, field_fmt_63_63_11_11_info, field_fmt_63_63_11_11_set, field_fmt_63_63_11_11_get, NULL, 0}, - {"BFD_SLOWPATH",1, field_fmt_64_64_10_10_info, field_fmt_64_64_10_10_set, field_fmt_64_64_10_10_get, NULL, 0}, - {"BFD_ERROR",1, field_fmt_65_65_10_10_info, field_fmt_65_65_10_10_set, field_fmt_65_65_10_10_get, NULL, 0}, - {"PACKET_TRACE_TO_CPU",1, field_fmt_66_66_10_10_info, field_fmt_66_66_10_10_set, field_fmt_66_66_10_10_get, NULL, 0}, - {"MPLS_UNKNOWN_CONTROL_PKT",1, field_fmt_67_67_10_10_info, field_fmt_67_67_10_10_set, field_fmt_67_67_10_10_get, NULL, 0}, - {"MPLS_ALERT_LABEL",1, field_fmt_68_68_10_10_info, field_fmt_68_68_10_10_set, field_fmt_68_68_10_10_get, NULL, 0}, - {"CPU_IPMC_INTERFACE_MISMATCH",1, field_fmt_69_69_10_10_info, field_fmt_69_69_10_10_set, field_fmt_69_69_10_10_get, NULL, 0}, - {"DLB_MONITOR",1, field_fmt_70_70_10_10_info, field_fmt_70_70_10_10_set, field_fmt_70_70_10_10_get, NULL, 0}, - {"INT_TURN_AROUND",1, field_fmt_71_71_10_10_info, field_fmt_71_71_10_10_set, field_fmt_71_71_10_10_get, NULL, 0}, - {"ETRAP_MONITOR",1, field_fmt_72_72_10_10_info, field_fmt_72_72_10_10_set, field_fmt_72_72_10_10_get, NULL, 0}, - {"SRV6_ERROR",1, field_fmt_73_73_10_10_info, field_fmt_73_73_10_10_set, field_fmt_73_73_10_10_get, NULL, 0}, - {"VXLAN_VN_ID_MISS",1, field_fmt_74_74_10_10_info, field_fmt_74_74_10_10_set, field_fmt_74_74_10_10_get, NULL, 0}, - {"VXLAN_SIP_MISS",1, field_fmt_75_75_10_10_info, field_fmt_75_75_10_10_set, field_fmt_75_75_10_10_get, NULL, 0}, - {"ADAPT_MISS",1, field_fmt_76_76_10_10_info, field_fmt_76_76_10_10_set, field_fmt_76_76_10_10_get, NULL, 0}, + {1, field_fmt_32_32_11_11_info, field_fmt_32_32_11_11_set, field_fmt_32_32_11_11_get, NULL, 0}, + {1, field_fmt_33_33_11_11_info, field_fmt_33_33_11_11_set, field_fmt_33_33_11_11_get, NULL, 0}, + {1, field_fmt_34_34_11_11_info, field_fmt_34_34_11_11_set, field_fmt_34_34_11_11_get, NULL, 0}, + {1, field_fmt_35_35_11_11_info, field_fmt_35_35_11_11_set, field_fmt_35_35_11_11_get, NULL, 0}, + {1, field_fmt_36_36_11_11_info, field_fmt_36_36_11_11_set, field_fmt_36_36_11_11_get, NULL, 0}, + {1, field_fmt_37_37_11_11_info, field_fmt_37_37_11_11_set, field_fmt_37_37_11_11_get, NULL, 0}, + {1, field_fmt_38_38_11_11_info, field_fmt_38_38_11_11_set, field_fmt_38_38_11_11_get, NULL, 0}, + {1, field_fmt_39_39_11_11_info, field_fmt_39_39_11_11_set, field_fmt_39_39_11_11_get, NULL, 0}, + {1, field_fmt_40_40_11_11_info, field_fmt_40_40_11_11_set, field_fmt_40_40_11_11_get, NULL, 0}, + {1, field_fmt_41_41_11_11_info, field_fmt_41_41_11_11_set, field_fmt_41_41_11_11_get, NULL, 0}, + {1, field_fmt_42_42_11_11_info, field_fmt_42_42_11_11_set, field_fmt_42_42_11_11_get, NULL, 0}, + {1, field_fmt_43_43_11_11_info, field_fmt_43_43_11_11_set, field_fmt_43_43_11_11_get, NULL, 0}, + {1, field_fmt_44_44_11_11_info, field_fmt_44_44_11_11_set, field_fmt_44_44_11_11_get, NULL, 0}, + {1, field_fmt_45_45_11_11_info, field_fmt_45_45_11_11_set, field_fmt_45_45_11_11_get, NULL, 0}, + {1, field_fmt_46_46_11_11_info, field_fmt_46_46_11_11_set, field_fmt_46_46_11_11_get, NULL, 0}, + {1, field_fmt_47_47_11_11_info, field_fmt_47_47_11_11_set, field_fmt_47_47_11_11_get, NULL, 0}, + {1, field_fmt_48_49_11_11_info, field_fmt_48_49_11_11_set, field_fmt_48_49_11_11_get, bcm56996_a0_rx_reason_cpu_sflow_names, 0}, + {1, field_fmt_50_50_11_11_info, field_fmt_50_50_11_11_set, field_fmt_50_50_11_11_get, NULL, 0}, + {1, field_fmt_51_51_11_11_info, field_fmt_51_51_11_11_set, field_fmt_51_51_11_11_get, NULL, 0}, + {1, field_fmt_52_52_11_11_info, field_fmt_52_52_11_11_set, field_fmt_52_52_11_11_get, NULL, 0}, + {1, field_fmt_53_53_11_11_info, field_fmt_53_53_11_11_set, field_fmt_53_53_11_11_get, NULL, 0}, + {1, field_fmt_54_54_11_11_info, field_fmt_54_54_11_11_set, field_fmt_54_54_11_11_get, NULL, 0}, + {1, field_fmt_55_55_11_11_info, field_fmt_55_55_11_11_set, field_fmt_55_55_11_11_get, NULL, 0}, + {1, field_fmt_56_58_11_11_info, field_fmt_56_58_11_11_set, field_fmt_56_58_11_11_get, bcm56996_a0_rx_reason_mpls_proc_error_names, 0}, + {1, field_fmt_59_59_11_11_info, field_fmt_59_59_11_11_set, field_fmt_59_59_11_11_get, NULL, 0}, + {1, field_fmt_60_60_11_11_info, field_fmt_60_60_11_11_set, field_fmt_60_60_11_11_get, NULL, 0}, + {1, field_fmt_61_61_11_11_info, field_fmt_61_61_11_11_set, field_fmt_61_61_11_11_get, NULL, 0}, + {1, field_fmt_62_62_11_11_info, field_fmt_62_62_11_11_set, field_fmt_62_62_11_11_get, NULL, 0}, + {1, field_fmt_63_63_11_11_info, field_fmt_63_63_11_11_set, field_fmt_63_63_11_11_get, NULL, 0}, + {1, field_fmt_64_64_10_10_info, field_fmt_64_64_10_10_set, field_fmt_64_64_10_10_get, NULL, 0}, + {1, field_fmt_65_65_10_10_info, field_fmt_65_65_10_10_set, field_fmt_65_65_10_10_get, NULL, 0}, + {1, field_fmt_66_66_10_10_info, field_fmt_66_66_10_10_set, field_fmt_66_66_10_10_get, NULL, 0}, + {1, field_fmt_67_67_10_10_info, field_fmt_67_67_10_10_set, field_fmt_67_67_10_10_get, NULL, 0}, + {1, field_fmt_68_68_10_10_info, field_fmt_68_68_10_10_set, field_fmt_68_68_10_10_get, NULL, 0}, + {1, field_fmt_69_69_10_10_info, field_fmt_69_69_10_10_set, field_fmt_69_69_10_10_get, NULL, 0}, + {1, field_fmt_70_70_10_10_info, field_fmt_70_70_10_10_set, field_fmt_70_70_10_10_get, NULL, 0}, + {1, field_fmt_71_71_10_10_info, field_fmt_71_71_10_10_set, field_fmt_71_71_10_10_get, NULL, 0}, + {1, field_fmt_72_72_10_10_info, field_fmt_72_72_10_10_set, field_fmt_72_72_10_10_get, NULL, 0}, + {1, field_fmt_73_73_10_10_info, field_fmt_73_73_10_10_set, field_fmt_73_73_10_10_get, NULL, 0}, + {1, field_fmt_74_74_10_10_info, field_fmt_74_74_10_10_set, field_fmt_74_74_10_10_get, NULL, 0}, + {1, field_fmt_75_75_10_10_info, field_fmt_75_75_10_10_set, field_fmt_75_75_10_10_get, NULL, 0}, + {1, field_fmt_76_76_10_10_info, field_fmt_76_76_10_10_set, field_fmt_76_76_10_10_get, NULL, 0}, }; @@ -2939,29 +2938,29 @@ static const shr_enum_map_t bcm56996_a0_txpmd_start_names[] = }; static bcmpkt_pmd_field_t bcm56996_a0_txpmd_fields[BCM56996_A0_TXPMD_COUNT] = { - {"CELL_LENGTH",1, field_fmt_0_7_3_3_info, field_fmt_0_7_3_3_set, field_fmt_0_7_3_3_get, NULL, 0}, - {"EOP",1, field_fmt_8_8_3_3_info, field_fmt_8_8_3_3_set, field_fmt_8_8_3_3_get, NULL, 0}, - {"SOP",1, field_fmt_9_9_3_3_info, field_fmt_9_9_3_3_set, field_fmt_9_9_3_3_get, NULL, 0}, - {"PKT_LENGTH",1, field_fmt_10_23_3_3_info, field_fmt_10_23_3_3_set, field_fmt_10_23_3_3_get, NULL, 0}, - {"IPCF_PTR",1, field_fmt_24_31_3_3_info, field_fmt_24_31_3_3_set, field_fmt_24_31_3_3_get, NULL, 0}, - {"SRC_MODID",1, field_fmt_32_39_2_2_info, field_fmt_32_39_2_2_set, field_fmt_32_39_2_2_get, NULL, 0}, - {"COS",1, field_fmt_40_45_2_2_info, field_fmt_40_45_2_2_set, field_fmt_40_45_2_2_get, NULL, 0}, - {"UNICAST",1, field_fmt_46_46_2_2_info, field_fmt_46_46_2_2_set, field_fmt_46_46_2_2_get, NULL, 0}, - {"SET_L2BM",1, field_fmt_47_47_2_2_info, field_fmt_47_47_2_2_set, field_fmt_47_47_2_2_get, NULL, 0}, - {"RQE_Q_NUM",1, field_fmt_48_51_2_2_info, field_fmt_48_51_2_2_set, field_fmt_48_51_2_2_get, NULL, 0}, - {"SPAP",1, field_fmt_52_53_2_2_info, field_fmt_52_53_2_2_set, field_fmt_52_53_2_2_get, NULL, 0}, - {"SPID",1, field_fmt_54_55_2_2_info, field_fmt_54_55_2_2_set, field_fmt_54_55_2_2_get, NULL, 0}, - {"SPID_OVERRIDE",1, field_fmt_56_56_2_2_info, field_fmt_56_56_2_2_set, field_fmt_56_56_2_2_get, NULL, 0}, - {"INPUT_PRI",1, field_fmt_57_60_2_2_info, field_fmt_57_60_2_2_set, field_fmt_57_60_2_2_get, NULL, 0}, - {"LOCAL_DEST_PORT",1, field_fmt_63_71_2_1_info, field_fmt_63_71_2_1_set, field_fmt_63_71_2_1_get, NULL, 0}, - {"IEEE1588_TIMESTAMP_HDR_OFFSET",1, field_fmt_72_79_1_1_info, field_fmt_72_79_1_1_set, field_fmt_72_79_1_1_get, NULL, 0}, - {"TX_TS",1, field_fmt_80_80_1_1_info, field_fmt_80_80_1_1_set, field_fmt_80_80_1_1_get, NULL, 0}, - {"IEEE1588_INGRESS_TIMESTAMP_SIGN",1, field_fmt_81_81_1_1_info, field_fmt_81_81_1_1_set, field_fmt_81_81_1_1_get, NULL, 0}, - {"IEEE1588_REGEN_UDP_CHECKSUM",1, field_fmt_82_82_1_1_info, field_fmt_82_82_1_1_set, field_fmt_82_82_1_1_get, NULL, 0}, - {"IEEE1588_ONE_STEP_ENABLE",1, field_fmt_83_83_1_1_info, field_fmt_83_83_1_1_set, field_fmt_83_83_1_1_get, NULL, 0}, - {"CELL_ERROR",1, field_fmt_84_84_1_1_info, field_fmt_84_84_1_1_set, field_fmt_84_84_1_1_get, NULL, 0}, - {"HEADER_TYPE",1, field_fmt_120_125_0_0_info, field_fmt_120_125_0_0_set, field_fmt_120_125_0_0_get, bcm56996_a0_txpmd_header_type_names, 0}, - {"START",1, field_fmt_126_127_0_0_info, field_fmt_126_127_0_0_set, field_fmt_126_127_0_0_get, bcm56996_a0_txpmd_start_names, 0}, + {1, field_fmt_0_7_3_3_info, field_fmt_0_7_3_3_set, field_fmt_0_7_3_3_get, NULL, 0}, + {1, field_fmt_8_8_3_3_info, field_fmt_8_8_3_3_set, field_fmt_8_8_3_3_get, NULL, 0}, + {1, field_fmt_9_9_3_3_info, field_fmt_9_9_3_3_set, field_fmt_9_9_3_3_get, NULL, 0}, + {1, field_fmt_10_23_3_3_info, field_fmt_10_23_3_3_set, field_fmt_10_23_3_3_get, NULL, 0}, + {1, field_fmt_24_31_3_3_info, field_fmt_24_31_3_3_set, field_fmt_24_31_3_3_get, NULL, 0}, + {1, field_fmt_32_39_2_2_info, field_fmt_32_39_2_2_set, field_fmt_32_39_2_2_get, NULL, 0}, + {1, field_fmt_40_45_2_2_info, field_fmt_40_45_2_2_set, field_fmt_40_45_2_2_get, NULL, 0}, + {1, field_fmt_46_46_2_2_info, field_fmt_46_46_2_2_set, field_fmt_46_46_2_2_get, NULL, 0}, + {1, field_fmt_47_47_2_2_info, field_fmt_47_47_2_2_set, field_fmt_47_47_2_2_get, NULL, 0}, + {1, field_fmt_48_51_2_2_info, field_fmt_48_51_2_2_set, field_fmt_48_51_2_2_get, NULL, 0}, + {1, field_fmt_52_53_2_2_info, field_fmt_52_53_2_2_set, field_fmt_52_53_2_2_get, NULL, 0}, + {1, field_fmt_54_55_2_2_info, field_fmt_54_55_2_2_set, field_fmt_54_55_2_2_get, NULL, 0}, + {1, field_fmt_56_56_2_2_info, field_fmt_56_56_2_2_set, field_fmt_56_56_2_2_get, NULL, 0}, + {1, field_fmt_57_60_2_2_info, field_fmt_57_60_2_2_set, field_fmt_57_60_2_2_get, NULL, 0}, + {1, field_fmt_63_71_2_1_info, field_fmt_63_71_2_1_set, field_fmt_63_71_2_1_get, NULL, 0}, + {1, field_fmt_72_79_1_1_info, field_fmt_72_79_1_1_set, field_fmt_72_79_1_1_get, NULL, 0}, + {1, field_fmt_80_80_1_1_info, field_fmt_80_80_1_1_set, field_fmt_80_80_1_1_get, NULL, 0}, + {1, field_fmt_81_81_1_1_info, field_fmt_81_81_1_1_set, field_fmt_81_81_1_1_get, NULL, 0}, + {1, field_fmt_82_82_1_1_info, field_fmt_82_82_1_1_set, field_fmt_82_82_1_1_get, NULL, 0}, + {1, field_fmt_83_83_1_1_info, field_fmt_83_83_1_1_set, field_fmt_83_83_1_1_get, NULL, 0}, + {1, field_fmt_84_84_1_1_info, field_fmt_84_84_1_1_set, field_fmt_84_84_1_1_get, NULL, 0}, + {1, field_fmt_120_125_0_0_info, field_fmt_120_125_0_0_set, field_fmt_120_125_0_0_get, bcm56996_a0_txpmd_header_type_names, 0}, + {1, field_fmt_126_127_0_0_info, field_fmt_126_127_0_0_set, field_fmt_126_127_0_0_get, bcm56996_a0_txpmd_start_names, 0}, }; @@ -2992,31 +2991,31 @@ static const shr_enum_map_t bcm56996_a0_lbhdr_header_type_names[] = }; static bcmpkt_pmd_field_t bcm56996_a0_lbhdr_fields[BCM56996_A0_LBHDR_COUNT] = { - {"ETHERNET::PP_PORT",1, field_fmt_0_8_3_3_info, field_fmt_0_8_3_3_set, field_fmt_0_8_3_3_get, NULL, 3}, - {"ETHERNET::SUBFLOW_TYPE",1, field_fmt_9_10_3_3_info, field_fmt_9_10_3_3_set, field_fmt_9_10_3_3_get, bcm56996_a0_lbhdr_ethernet_subflow_type_names, 3}, - {"ETHERNET::DESTINATION_TYPE",1, field_fmt_11_14_3_3_info, field_fmt_11_14_3_3_set, field_fmt_11_14_3_3_get, bcm56996_a0_lbhdr_ethernet_destination_type_names, 3}, - {"ETHERNET::DESTINATION",1, field_fmt_15_30_3_3_info, field_fmt_15_30_3_3_set, field_fmt_15_30_3_3_get, NULL, 3}, - {"ETHERNET::ROUTED_PKT",1, field_fmt_31_31_3_3_info, field_fmt_31_31_3_3_set, field_fmt_31_31_3_3_get, NULL, 3}, - {"ETHERNET::QOS_FIELDS_VLD",1, field_fmt_32_32_2_2_info, field_fmt_32_32_2_2_set, field_fmt_32_32_2_2_get, NULL, 3}, - {"ETHERNET::INT_CN",1, field_fmt_33_34_2_2_info, field_fmt_33_34_2_2_set, field_fmt_33_34_2_2_get, NULL, 3}, - {"ETHERNET::INT_PRI",1, field_fmt_35_38_2_2_info, field_fmt_35_38_2_2_set, field_fmt_35_38_2_2_get, NULL, 3}, - {"ETHERNET::DP",1, field_fmt_39_40_2_2_info, field_fmt_39_40_2_2_set, field_fmt_39_40_2_2_get, NULL, 3}, - {"ETHERNET::ECMP_MEMBER_ID",1, field_fmt_41_54_2_2_info, field_fmt_41_54_2_2_set, field_fmt_41_54_2_2_get, NULL, 3}, - {"ETHERNET::VRF",1, field_fmt_55_67_2_1_info, field_fmt_55_67_2_1_set, field_fmt_55_67_2_1_get, NULL, 3}, - {"ETHERNET::VRF_VALID",1, field_fmt_68_68_1_1_info, field_fmt_68_68_1_1_set, field_fmt_68_68_1_1_get, NULL, 3}, - {"ETHERNET::MCAST_LB_INDEX",1, field_fmt_70_77_1_1_info, field_fmt_70_77_1_1_set, field_fmt_70_77_1_1_get, NULL, 3}, - {"ETHERNET::MCAST_LB_INDEX_VLD",1, field_fmt_78_78_1_1_info, field_fmt_78_78_1_1_set, field_fmt_78_78_1_1_get, NULL, 3}, - {"TRILL_ACCESS_NONUC::TC",1, field_fmt_0_3_3_3_info, field_fmt_0_3_3_3_set, field_fmt_0_3_3_3_get, NULL, 2}, - {"TRILL_ACCESS_NONUC::CNG",1, field_fmt_4_5_3_3_info, field_fmt_4_5_3_3_set, field_fmt_4_5_3_3_get, NULL, 2}, - {"TRILL_NETWORK_NONUC::TC",1, field_fmt_0_3_3_3_info, field_fmt_0_3_3_3_set, field_fmt_0_3_3_3_get, NULL, 1}, - {"TRILL_NETWORK_NONUC::CNG",1, field_fmt_4_5_3_3_info, field_fmt_4_5_3_3_set, field_fmt_4_5_3_3_get, NULL, 1}, - {"PKT_PROFILE",1, field_fmt_90_92_1_1_info, field_fmt_90_92_1_1_set, field_fmt_90_92_1_1_get, NULL, 0}, - {"VISIBILITY_PKT",1, field_fmt_93_93_1_1_info, field_fmt_93_93_1_1_set, field_fmt_93_93_1_1_get, NULL, 0}, - {"SOURCE",1, field_fmt_94_109_1_0_info, field_fmt_94_109_1_0_set, field_fmt_94_109_1_0_get, NULL, 0}, - {"SOURCE_TYPE",1, field_fmt_110_110_0_0_info, field_fmt_110_110_0_0_set, field_fmt_110_110_0_0_get, NULL, 0}, - {"HEADER_TYPE",1, field_fmt_111_115_0_0_info, field_fmt_111_115_0_0_set, field_fmt_111_115_0_0_get, bcm56996_a0_lbhdr_header_type_names, 0}, - {"INPUT_PRIORITY",1, field_fmt_116_119_0_0_info, field_fmt_116_119_0_0_set, field_fmt_116_119_0_0_get, NULL, 0}, - {"START",1, field_fmt_120_127_0_0_info, field_fmt_120_127_0_0_set, field_fmt_120_127_0_0_get, NULL, 0}, + {1, field_fmt_0_8_3_3_info, field_fmt_0_8_3_3_set, field_fmt_0_8_3_3_get, NULL, 3}, + {1, field_fmt_9_10_3_3_info, field_fmt_9_10_3_3_set, field_fmt_9_10_3_3_get, bcm56996_a0_lbhdr_ethernet_subflow_type_names, 3}, + {1, field_fmt_11_14_3_3_info, field_fmt_11_14_3_3_set, field_fmt_11_14_3_3_get, bcm56996_a0_lbhdr_ethernet_destination_type_names, 3}, + {1, field_fmt_15_30_3_3_info, field_fmt_15_30_3_3_set, field_fmt_15_30_3_3_get, NULL, 3}, + {1, field_fmt_31_31_3_3_info, field_fmt_31_31_3_3_set, field_fmt_31_31_3_3_get, NULL, 3}, + {1, field_fmt_32_32_2_2_info, field_fmt_32_32_2_2_set, field_fmt_32_32_2_2_get, NULL, 3}, + {1, field_fmt_33_34_2_2_info, field_fmt_33_34_2_2_set, field_fmt_33_34_2_2_get, NULL, 3}, + {1, field_fmt_35_38_2_2_info, field_fmt_35_38_2_2_set, field_fmt_35_38_2_2_get, NULL, 3}, + {1, field_fmt_39_40_2_2_info, field_fmt_39_40_2_2_set, field_fmt_39_40_2_2_get, NULL, 3}, + {1, field_fmt_41_54_2_2_info, field_fmt_41_54_2_2_set, field_fmt_41_54_2_2_get, NULL, 3}, + {1, field_fmt_55_67_2_1_info, field_fmt_55_67_2_1_set, field_fmt_55_67_2_1_get, NULL, 3}, + {1, field_fmt_68_68_1_1_info, field_fmt_68_68_1_1_set, field_fmt_68_68_1_1_get, NULL, 3}, + {1, field_fmt_70_77_1_1_info, field_fmt_70_77_1_1_set, field_fmt_70_77_1_1_get, NULL, 3}, + {1, field_fmt_78_78_1_1_info, field_fmt_78_78_1_1_set, field_fmt_78_78_1_1_get, NULL, 3}, + {1, field_fmt_0_3_3_3_info, field_fmt_0_3_3_3_set, field_fmt_0_3_3_3_get, NULL, 2}, + {1, field_fmt_4_5_3_3_info, field_fmt_4_5_3_3_set, field_fmt_4_5_3_3_get, NULL, 2}, + {1, field_fmt_0_3_3_3_info, field_fmt_0_3_3_3_set, field_fmt_0_3_3_3_get, NULL, 1}, + {1, field_fmt_4_5_3_3_info, field_fmt_4_5_3_3_set, field_fmt_4_5_3_3_get, NULL, 1}, + {1, field_fmt_90_92_1_1_info, field_fmt_90_92_1_1_set, field_fmt_90_92_1_1_get, NULL, 0}, + {1, field_fmt_93_93_1_1_info, field_fmt_93_93_1_1_set, field_fmt_93_93_1_1_get, NULL, 0}, + {1, field_fmt_94_109_1_0_info, field_fmt_94_109_1_0_set, field_fmt_94_109_1_0_get, NULL, 0}, + {1, field_fmt_110_110_0_0_info, field_fmt_110_110_0_0_set, field_fmt_110_110_0_0_get, NULL, 0}, + {1, field_fmt_111_115_0_0_info, field_fmt_111_115_0_0_set, field_fmt_111_115_0_0_get, bcm56996_a0_lbhdr_header_type_names, 0}, + {1, field_fmt_116_119_0_0_info, field_fmt_116_119_0_0_set, field_fmt_116_119_0_0_get, NULL, 0}, + {1, field_fmt_120_127_0_0_info, field_fmt_120_127_0_0_set, field_fmt_120_127_0_0_get, NULL, 0}, }; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pkt_lbhdr.c similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pkt_lbhdr.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pkt_lbhdr.c index ad45d4a6058..579124c1f36 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pkt_lbhdr.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pkt_lbhdr.c @@ -5,8 +5,7 @@ * Edits to this file will be lost when it is regenerated. * Tool: INTERNAL/regs/xgs/generate-pmd.pl * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pkt_rxpmd.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pkt_rxpmd.c similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pkt_rxpmd.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pkt_rxpmd.c index 4fdc3f21525..3ec995e60a4 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pkt_rxpmd.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pkt_rxpmd.c @@ -5,8 +5,7 @@ * Edits to this file will be lost when it is regenerated. * Tool: INTERNAL/regs/xgs/generate-pmd.pl * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -981,8 +980,6 @@ const bcmpkt_rxpmd_fget_t bcm56996_b0_rxpmd_fget = { NULL, NULL, NULL, - NULL, - NULL, NULL } }; @@ -1088,8 +1085,6 @@ const bcmpkt_rxpmd_fset_t bcm56996_b0_rxpmd_fset = { NULL, NULL, NULL, - NULL, - NULL, NULL } }; @@ -1116,7 +1111,7 @@ static int bcm56996_b0_rxpmd_view_infos[BCMPKT_RXPMD_FID_COUNT] = { -1, -1, -1, -1, -1, -1, -1, -2, -1, -1, -1, -1, -1, -2, -2, -2, -2, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -2, -2, -2, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, - -2, -2, -2, -2, -2, + -2, -2, -2, }; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pkt_txpmd.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pkt_txpmd.c similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pkt_txpmd.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pkt_txpmd.c index e0b7774e16a..86155aa1272 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pkt_txpmd.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pkt_txpmd.c @@ -5,8 +5,7 @@ * Edits to this file will be lost when it is regenerated. * Tool: INTERNAL/regs/xgs/generate-pmd.pl * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -450,7 +449,6 @@ const bcmpkt_txpmd_fget_t bcm56996_b0_txpmd_fget = { NULL, NULL, NULL, - NULL, NULL } }; @@ -586,7 +584,6 @@ const bcmpkt_txpmd_fset_t bcm56996_b0_txpmd_fset = { NULL, NULL, NULL, - NULL, NULL } }; @@ -612,7 +609,7 @@ static int bcm56996_b0_txpmd_view_infos[BCMPKT_TXPMD_FID_COUNT] = { -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, - -2, -2, + -2, }; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pmd_field.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pmd_field.c similarity index 77% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pmd_field.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pmd_field.c index 58d363b952b..949b448c117 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pmd_field.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pmd_field.c @@ -5,8 +5,7 @@ * Edits to this file will be lost when it is regenerated. * Tool: INTERNAL/regs/xgs/generate-pmd.pl * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -2796,51 +2795,51 @@ static const shr_enum_map_t bcm56996_b0_rxpmd_timestamp_type_names[] = }; static bcmpkt_pmd_field_t bcm56996_b0_rxpmd_fields[BCM56996_B0_RXPMD_COUNT] = { - {"ING_L3_INTF",1, field_fmt_0_12_12_12_info, field_fmt_0_12_12_12_set, field_fmt_0_12_12_12_get, NULL, 0}, - {"I2E_CLASSID",1, field_fmt_0_11_12_12_info, field_fmt_0_11_12_12_set, field_fmt_0_11_12_12_get, NULL, 0}, - {"RX_BFD_SESSION_INDEX",1, field_fmt_0_11_12_12_info, field_fmt_0_11_12_12_set, field_fmt_0_11_12_12_get, NULL, 0}, - {"I2E_CLASSID_TYPE",1, field_fmt_12_15_12_12_info, field_fmt_12_15_12_12_set, field_fmt_12_15_12_12_get, NULL, 0}, - {"RX_BFD_START_OFFSET_TYPE",1, field_fmt_12_13_12_12_info, field_fmt_12_13_12_12_set, field_fmt_12_13_12_12_get, NULL, 0}, - {"RX_BFD_START_OFFSET",1, field_fmt_14_21_12_12_info, field_fmt_14_21_12_12_set, field_fmt_14_21_12_12_get, NULL, 0}, - {"ING_L3_INTF_VALID",1, field_fmt_16_16_12_12_info, field_fmt_16_16_12_12_set, field_fmt_16_16_12_12_get, NULL, 0}, - {"CPU_COS",1, field_fmt_22_27_12_12_info, field_fmt_22_27_12_12_set, field_fmt_22_27_12_12_get, NULL, 0}, - {"QUEUE_NUM",1, field_fmt_22_27_12_12_info, field_fmt_22_27_12_12_set, field_fmt_22_27_12_12_get, NULL, 0}, - {"BPDU",1, field_fmt_28_28_12_12_info, field_fmt_28_28_12_12_set, field_fmt_28_28_12_12_get, NULL, 0}, - {"CHANGE_DSCP",1, field_fmt_29_29_12_12_info, field_fmt_29_29_12_12_set, field_fmt_29_29_12_12_get, NULL, 0}, - {"CHANGE_ECN",1, field_fmt_30_30_12_12_info, field_fmt_30_30_12_12_set, field_fmt_30_30_12_12_get, NULL, 0}, - {"DLB_ID_VALID",1, field_fmt_31_31_12_12_info, field_fmt_31_31_12_12_set, field_fmt_31_31_12_12_get, NULL, 0}, - {"REASON",2, field_fmt_32_95_11_10_info, field_fmt_32_95_11_10_set, field_fmt_32_95_11_10_get, NULL, 0}, - {"REASON_TYPE",1, field_fmt_96_99_9_9_info, field_fmt_96_99_9_9_set, field_fmt_96_99_9_9_get, NULL, 0}, - {"DO_NOT_CHANGE_TTL",1, field_fmt_100_100_9_9_info, field_fmt_100_100_9_9_set, field_fmt_100_100_9_9_get, NULL, 0}, - {"DSCP",1, field_fmt_101_106_9_9_info, field_fmt_101_106_9_9_set, field_fmt_101_106_9_9_get, NULL, 0}, - {"SPECIAL_PACKET_TYPE",1, field_fmt_101_103_9_9_info, field_fmt_101_103_9_9_set, field_fmt_101_103_9_9_get, NULL, 0}, - {"ECN",1, field_fmt_107_108_9_9_info, field_fmt_107_108_9_9_set, field_fmt_107_108_9_9_get, NULL, 0}, - {"INCOMING_TAG_STATUS",1, field_fmt_109_110_9_9_info, field_fmt_109_110_9_9_set, field_fmt_109_110_9_9_get, NULL, 0}, - {"O_NHI",1, field_fmt_111_125_9_9_info, field_fmt_111_125_9_9_set, field_fmt_111_125_9_9_get, NULL, 0}, - {"ING_OTAG_ACTION",1, field_fmt_126_127_9_9_info, field_fmt_126_127_9_9_set, field_fmt_126_127_9_9_get, NULL, 0}, - {"IP_ROUTED",1, field_fmt_129_129_8_8_info, field_fmt_129_129_8_8_set, field_fmt_129_129_8_8_get, NULL, 0}, - {"L3ONLY",1, field_fmt_130_130_8_8_info, field_fmt_130_130_8_8_set, field_fmt_130_130_8_8_get, NULL, 0}, - {"MATCHED_RULE",1, field_fmt_131_138_8_8_info, field_fmt_131_138_8_8_set, field_fmt_131_138_8_8_get, NULL, 0}, - {"MTP_INDEX",1, field_fmt_139_141_8_8_info, field_fmt_139_141_8_8_set, field_fmt_139_141_8_8_get, NULL, 0}, - {"OUTER_CFI",1, field_fmt_142_142_8_8_info, field_fmt_142_142_8_8_set, field_fmt_142_142_8_8_get, NULL, 0}, - {"OUTER_PRI",1, field_fmt_143_145_8_8_info, field_fmt_143_145_8_8_set, field_fmt_143_145_8_8_get, NULL, 0}, - {"OUTER_VID",1, field_fmt_146_157_8_8_info, field_fmt_146_157_8_8_set, field_fmt_146_157_8_8_get, NULL, 0}, - {"INCOMING_INT_HDR_TYPE",1, field_fmt_158_159_8_8_info, field_fmt_158_159_8_8_set, field_fmt_158_159_8_8_get, NULL, 0}, - {"PKT_LENGTH",1, field_fmt_160_173_7_7_info, field_fmt_160_173_7_7_set, field_fmt_160_173_7_7_get, NULL, 0}, - {"REGEN_CRC",1, field_fmt_174_174_7_7_info, field_fmt_174_174_7_7_set, field_fmt_174_174_7_7_get, NULL, 0}, - {"REPLICATION_OR_NHOP_INDEX",1, field_fmt_175_191_7_7_info, field_fmt_175_191_7_7_set, field_fmt_175_191_7_7_get, NULL, 0}, - {"ENTROPY_LABEL",1, field_fmt_193_212_6_6_info, field_fmt_193_212_6_6_set, field_fmt_193_212_6_6_get, NULL, 0}, - {"SPECIAL_PACKET_INDICATOR",1, field_fmt_213_213_6_6_info, field_fmt_213_213_6_6_set, field_fmt_213_213_6_6_get, NULL, 0}, - {"SRC_PORT_NUM",1, field_fmt_214_222_6_6_info, field_fmt_214_222_6_6_set, field_fmt_214_222_6_6_get, NULL, 0}, - {"SWITCH",1, field_fmt_223_223_6_6_info, field_fmt_223_223_6_6_set, field_fmt_223_223_6_6_get, NULL, 0}, - {"TIMESTAMP",1, field_fmt_224_255_5_5_info, field_fmt_224_255_5_5_set, field_fmt_224_255_5_5_get, NULL, 0}, - {"TIMESTAMP_HI",1, field_fmt_256_271_4_4_info, field_fmt_256_271_4_4_set, field_fmt_256_271_4_4_get, NULL, 0}, - {"TIMESTAMP_TYPE",1, field_fmt_272_273_4_4_info, field_fmt_272_273_4_4_set, field_fmt_272_273_4_4_get, bcm56996_b0_rxpmd_timestamp_type_names, 0}, - {"TUNNEL_DECAP_TYPE",1, field_fmt_274_278_4_4_info, field_fmt_274_278_4_4_set, field_fmt_274_278_4_4_get, NULL, 0}, - {"UC_SW_COPY_DROPPED",1, field_fmt_279_279_4_4_info, field_fmt_279_279_4_4_set, field_fmt_279_279_4_4_get, NULL, 0}, - {"UNICAST_QUEUE",1, field_fmt_280_280_4_4_info, field_fmt_280_280_4_4_set, field_fmt_280_280_4_4_get, NULL, 0}, - {"DLB_ID",1, field_fmt_281_287_4_4_info, field_fmt_281_287_4_4_set, field_fmt_281_287_4_4_get, NULL, 0}, - {"MODULE_HDR",4, field_fmt_288_415_3_0_info, field_fmt_288_415_3_0_set, field_fmt_288_415_3_0_get, NULL, 0}, + {1, field_fmt_0_12_12_12_info, field_fmt_0_12_12_12_set, field_fmt_0_12_12_12_get, NULL, 0}, + {1, field_fmt_0_11_12_12_info, field_fmt_0_11_12_12_set, field_fmt_0_11_12_12_get, NULL, 0}, + {1, field_fmt_0_11_12_12_info, field_fmt_0_11_12_12_set, field_fmt_0_11_12_12_get, NULL, 0}, + {1, field_fmt_12_15_12_12_info, field_fmt_12_15_12_12_set, field_fmt_12_15_12_12_get, NULL, 0}, + {1, field_fmt_12_13_12_12_info, field_fmt_12_13_12_12_set, field_fmt_12_13_12_12_get, NULL, 0}, + {1, field_fmt_14_21_12_12_info, field_fmt_14_21_12_12_set, field_fmt_14_21_12_12_get, NULL, 0}, + {1, field_fmt_16_16_12_12_info, field_fmt_16_16_12_12_set, field_fmt_16_16_12_12_get, NULL, 0}, + {1, field_fmt_22_27_12_12_info, field_fmt_22_27_12_12_set, field_fmt_22_27_12_12_get, NULL, 0}, + {1, field_fmt_22_27_12_12_info, field_fmt_22_27_12_12_set, field_fmt_22_27_12_12_get, NULL, 0}, + {1, field_fmt_28_28_12_12_info, field_fmt_28_28_12_12_set, field_fmt_28_28_12_12_get, NULL, 0}, + {1, field_fmt_29_29_12_12_info, field_fmt_29_29_12_12_set, field_fmt_29_29_12_12_get, NULL, 0}, + {1, field_fmt_30_30_12_12_info, field_fmt_30_30_12_12_set, field_fmt_30_30_12_12_get, NULL, 0}, + {1, field_fmt_31_31_12_12_info, field_fmt_31_31_12_12_set, field_fmt_31_31_12_12_get, NULL, 0}, + {2, field_fmt_32_95_11_10_info, field_fmt_32_95_11_10_set, field_fmt_32_95_11_10_get, NULL, 0}, + {1, field_fmt_96_99_9_9_info, field_fmt_96_99_9_9_set, field_fmt_96_99_9_9_get, NULL, 0}, + {1, field_fmt_100_100_9_9_info, field_fmt_100_100_9_9_set, field_fmt_100_100_9_9_get, NULL, 0}, + {1, field_fmt_101_106_9_9_info, field_fmt_101_106_9_9_set, field_fmt_101_106_9_9_get, NULL, 0}, + {1, field_fmt_101_103_9_9_info, field_fmt_101_103_9_9_set, field_fmt_101_103_9_9_get, NULL, 0}, + {1, field_fmt_107_108_9_9_info, field_fmt_107_108_9_9_set, field_fmt_107_108_9_9_get, NULL, 0}, + {1, field_fmt_109_110_9_9_info, field_fmt_109_110_9_9_set, field_fmt_109_110_9_9_get, NULL, 0}, + {1, field_fmt_111_125_9_9_info, field_fmt_111_125_9_9_set, field_fmt_111_125_9_9_get, NULL, 0}, + {1, field_fmt_126_127_9_9_info, field_fmt_126_127_9_9_set, field_fmt_126_127_9_9_get, NULL, 0}, + {1, field_fmt_129_129_8_8_info, field_fmt_129_129_8_8_set, field_fmt_129_129_8_8_get, NULL, 0}, + {1, field_fmt_130_130_8_8_info, field_fmt_130_130_8_8_set, field_fmt_130_130_8_8_get, NULL, 0}, + {1, field_fmt_131_138_8_8_info, field_fmt_131_138_8_8_set, field_fmt_131_138_8_8_get, NULL, 0}, + {1, field_fmt_139_141_8_8_info, field_fmt_139_141_8_8_set, field_fmt_139_141_8_8_get, NULL, 0}, + {1, field_fmt_142_142_8_8_info, field_fmt_142_142_8_8_set, field_fmt_142_142_8_8_get, NULL, 0}, + {1, field_fmt_143_145_8_8_info, field_fmt_143_145_8_8_set, field_fmt_143_145_8_8_get, NULL, 0}, + {1, field_fmt_146_157_8_8_info, field_fmt_146_157_8_8_set, field_fmt_146_157_8_8_get, NULL, 0}, + {1, field_fmt_158_159_8_8_info, field_fmt_158_159_8_8_set, field_fmt_158_159_8_8_get, NULL, 0}, + {1, field_fmt_160_173_7_7_info, field_fmt_160_173_7_7_set, field_fmt_160_173_7_7_get, NULL, 0}, + {1, field_fmt_174_174_7_7_info, field_fmt_174_174_7_7_set, field_fmt_174_174_7_7_get, NULL, 0}, + {1, field_fmt_175_191_7_7_info, field_fmt_175_191_7_7_set, field_fmt_175_191_7_7_get, NULL, 0}, + {1, field_fmt_193_212_6_6_info, field_fmt_193_212_6_6_set, field_fmt_193_212_6_6_get, NULL, 0}, + {1, field_fmt_213_213_6_6_info, field_fmt_213_213_6_6_set, field_fmt_213_213_6_6_get, NULL, 0}, + {1, field_fmt_214_222_6_6_info, field_fmt_214_222_6_6_set, field_fmt_214_222_6_6_get, NULL, 0}, + {1, field_fmt_223_223_6_6_info, field_fmt_223_223_6_6_set, field_fmt_223_223_6_6_get, NULL, 0}, + {1, field_fmt_224_255_5_5_info, field_fmt_224_255_5_5_set, field_fmt_224_255_5_5_get, NULL, 0}, + {1, field_fmt_256_271_4_4_info, field_fmt_256_271_4_4_set, field_fmt_256_271_4_4_get, NULL, 0}, + {1, field_fmt_272_273_4_4_info, field_fmt_272_273_4_4_set, field_fmt_272_273_4_4_get, bcm56996_b0_rxpmd_timestamp_type_names, 0}, + {1, field_fmt_274_278_4_4_info, field_fmt_274_278_4_4_set, field_fmt_274_278_4_4_get, NULL, 0}, + {1, field_fmt_279_279_4_4_info, field_fmt_279_279_4_4_set, field_fmt_279_279_4_4_get, NULL, 0}, + {1, field_fmt_280_280_4_4_info, field_fmt_280_280_4_4_set, field_fmt_280_280_4_4_get, NULL, 0}, + {1, field_fmt_281_287_4_4_info, field_fmt_281_287_4_4_set, field_fmt_281_287_4_4_get, NULL, 0}, + {4, field_fmt_288_415_3_0_info, field_fmt_288_415_3_0_set, field_fmt_288_415_3_0_get, NULL, 0}, }; @@ -2866,48 +2865,48 @@ static const shr_enum_map_t bcm56996_b0_rx_reason_mpls_proc_error_names[] = }; static bcmpkt_pmd_field_t bcm56996_b0_rx_reason_fields[BCM56996_B0_RX_REASON_COUNT] = { - {"CPU_UVLAN",1, field_fmt_32_32_11_11_info, field_fmt_32_32_11_11_set, field_fmt_32_32_11_11_get, NULL, 0}, - {"CPU_SLF",1, field_fmt_33_33_11_11_info, field_fmt_33_33_11_11_set, field_fmt_33_33_11_11_get, NULL, 0}, - {"CPU_DLF",1, field_fmt_34_34_11_11_info, field_fmt_34_34_11_11_set, field_fmt_34_34_11_11_get, NULL, 0}, - {"CPU_L2MOVE",1, field_fmt_35_35_11_11_info, field_fmt_35_35_11_11_set, field_fmt_35_35_11_11_get, NULL, 0}, - {"CPU_L2CPU",1, field_fmt_36_36_11_11_info, field_fmt_36_36_11_11_set, field_fmt_36_36_11_11_get, NULL, 0}, - {"CPU_L3SRC_MISS",1, field_fmt_37_37_11_11_info, field_fmt_37_37_11_11_set, field_fmt_37_37_11_11_get, NULL, 0}, - {"CPU_L3DST_MISS",1, field_fmt_38_38_11_11_info, field_fmt_38_38_11_11_set, field_fmt_38_38_11_11_get, NULL, 0}, - {"CPU_L3SRC_MOVE",1, field_fmt_39_39_11_11_info, field_fmt_39_39_11_11_set, field_fmt_39_39_11_11_get, NULL, 0}, - {"CPU_MC_MISS",1, field_fmt_40_40_11_11_info, field_fmt_40_40_11_11_set, field_fmt_40_40_11_11_get, NULL, 0}, - {"CPU_IPMC_MISS",1, field_fmt_41_41_11_11_info, field_fmt_41_41_11_11_set, field_fmt_41_41_11_11_get, NULL, 0}, - {"CPU_FFP",1, field_fmt_42_42_11_11_info, field_fmt_42_42_11_11_set, field_fmt_42_42_11_11_get, NULL, 0}, - {"CPU_L3HDR_ERR",1, field_fmt_43_43_11_11_info, field_fmt_43_43_11_11_set, field_fmt_43_43_11_11_get, NULL, 0}, - {"CPU_PROTOCOL_PKT",1, field_fmt_44_44_11_11_info, field_fmt_44_44_11_11_set, field_fmt_44_44_11_11_get, NULL, 0}, - {"CPU_DOS_ATTACK",1, field_fmt_45_45_11_11_info, field_fmt_45_45_11_11_set, field_fmt_45_45_11_11_get, NULL, 0}, - {"CPU_MARTIAN_ADDR",1, field_fmt_46_46_11_11_info, field_fmt_46_46_11_11_set, field_fmt_46_46_11_11_get, NULL, 0}, - {"CPU_TUNNEL_ERR",1, field_fmt_47_47_11_11_info, field_fmt_47_47_11_11_set, field_fmt_47_47_11_11_get, NULL, 0}, - {"CPU_SFLOW",1, field_fmt_48_49_11_11_info, field_fmt_48_49_11_11_set, field_fmt_48_49_11_11_get, bcm56996_b0_rx_reason_cpu_sflow_names, 0}, - {"ICMP_REDIRECT",1, field_fmt_50_50_11_11_info, field_fmt_50_50_11_11_set, field_fmt_50_50_11_11_get, NULL, 0}, - {"L3_SLOWPATH",1, field_fmt_51_51_11_11_info, field_fmt_51_51_11_11_set, field_fmt_51_51_11_11_get, NULL, 0}, - {"PARITY_ERROR",1, field_fmt_52_52_11_11_info, field_fmt_52_52_11_11_set, field_fmt_52_52_11_11_get, NULL, 0}, - {"L3_MTU_CHECK_FAIL",1, field_fmt_53_53_11_11_info, field_fmt_53_53_11_11_set, field_fmt_53_53_11_11_get, NULL, 0}, - {"MCIDX_ERROR",1, field_fmt_54_54_11_11_info, field_fmt_54_54_11_11_set, field_fmt_54_54_11_11_get, NULL, 0}, - {"CPU_VFP",1, field_fmt_55_55_11_11_info, field_fmt_55_55_11_11_set, field_fmt_55_55_11_11_get, NULL, 0}, - {"MPLS_PROC_ERROR",1, field_fmt_56_58_11_11_info, field_fmt_56_58_11_11_set, field_fmt_56_58_11_11_get, bcm56996_b0_rx_reason_mpls_proc_error_names, 0}, - {"PBT_NONUC_PKT",1, field_fmt_59_59_11_11_info, field_fmt_59_59_11_11_set, field_fmt_59_59_11_11_get, NULL, 0}, - {"L3_NEXT_HOP",1, field_fmt_60_60_11_11_info, field_fmt_60_60_11_11_set, field_fmt_60_60_11_11_get, NULL, 0}, - {"MY_STATION",1, field_fmt_61_61_11_11_info, field_fmt_61_61_11_11_set, field_fmt_61_61_11_11_get, NULL, 0}, - {"TIME_SYNC",1, field_fmt_62_62_11_11_info, field_fmt_62_62_11_11_set, field_fmt_62_62_11_11_get, NULL, 0}, - {"TUNNEL_DECAP_ECN_ERROR",1, field_fmt_63_63_11_11_info, field_fmt_63_63_11_11_set, field_fmt_63_63_11_11_get, NULL, 0}, - {"BFD_SLOWPATH",1, field_fmt_64_64_10_10_info, field_fmt_64_64_10_10_set, field_fmt_64_64_10_10_get, NULL, 0}, - {"BFD_ERROR",1, field_fmt_65_65_10_10_info, field_fmt_65_65_10_10_set, field_fmt_65_65_10_10_get, NULL, 0}, - {"PACKET_TRACE_TO_CPU",1, field_fmt_66_66_10_10_info, field_fmt_66_66_10_10_set, field_fmt_66_66_10_10_get, NULL, 0}, - {"MPLS_UNKNOWN_CONTROL_PKT",1, field_fmt_67_67_10_10_info, field_fmt_67_67_10_10_set, field_fmt_67_67_10_10_get, NULL, 0}, - {"MPLS_ALERT_LABEL",1, field_fmt_68_68_10_10_info, field_fmt_68_68_10_10_set, field_fmt_68_68_10_10_get, NULL, 0}, - {"CPU_IPMC_INTERFACE_MISMATCH",1, field_fmt_69_69_10_10_info, field_fmt_69_69_10_10_set, field_fmt_69_69_10_10_get, NULL, 0}, - {"DLB_MONITOR",1, field_fmt_70_70_10_10_info, field_fmt_70_70_10_10_set, field_fmt_70_70_10_10_get, NULL, 0}, - {"INT_TURN_AROUND",1, field_fmt_71_71_10_10_info, field_fmt_71_71_10_10_set, field_fmt_71_71_10_10_get, NULL, 0}, - {"ETRAP_MONITOR",1, field_fmt_72_72_10_10_info, field_fmt_72_72_10_10_set, field_fmt_72_72_10_10_get, NULL, 0}, - {"SRV6_ERROR",1, field_fmt_73_73_10_10_info, field_fmt_73_73_10_10_set, field_fmt_73_73_10_10_get, NULL, 0}, - {"VXLAN_VN_ID_MISS",1, field_fmt_74_74_10_10_info, field_fmt_74_74_10_10_set, field_fmt_74_74_10_10_get, NULL, 0}, - {"VXLAN_SIP_MISS",1, field_fmt_75_75_10_10_info, field_fmt_75_75_10_10_set, field_fmt_75_75_10_10_get, NULL, 0}, - {"ADAPT_MISS",1, field_fmt_76_76_10_10_info, field_fmt_76_76_10_10_set, field_fmt_76_76_10_10_get, NULL, 0}, + {1, field_fmt_32_32_11_11_info, field_fmt_32_32_11_11_set, field_fmt_32_32_11_11_get, NULL, 0}, + {1, field_fmt_33_33_11_11_info, field_fmt_33_33_11_11_set, field_fmt_33_33_11_11_get, NULL, 0}, + {1, field_fmt_34_34_11_11_info, field_fmt_34_34_11_11_set, field_fmt_34_34_11_11_get, NULL, 0}, + {1, field_fmt_35_35_11_11_info, field_fmt_35_35_11_11_set, field_fmt_35_35_11_11_get, NULL, 0}, + {1, field_fmt_36_36_11_11_info, field_fmt_36_36_11_11_set, field_fmt_36_36_11_11_get, NULL, 0}, + {1, field_fmt_37_37_11_11_info, field_fmt_37_37_11_11_set, field_fmt_37_37_11_11_get, NULL, 0}, + {1, field_fmt_38_38_11_11_info, field_fmt_38_38_11_11_set, field_fmt_38_38_11_11_get, NULL, 0}, + {1, field_fmt_39_39_11_11_info, field_fmt_39_39_11_11_set, field_fmt_39_39_11_11_get, NULL, 0}, + {1, field_fmt_40_40_11_11_info, field_fmt_40_40_11_11_set, field_fmt_40_40_11_11_get, NULL, 0}, + {1, field_fmt_41_41_11_11_info, field_fmt_41_41_11_11_set, field_fmt_41_41_11_11_get, NULL, 0}, + {1, field_fmt_42_42_11_11_info, field_fmt_42_42_11_11_set, field_fmt_42_42_11_11_get, NULL, 0}, + {1, field_fmt_43_43_11_11_info, field_fmt_43_43_11_11_set, field_fmt_43_43_11_11_get, NULL, 0}, + {1, field_fmt_44_44_11_11_info, field_fmt_44_44_11_11_set, field_fmt_44_44_11_11_get, NULL, 0}, + {1, field_fmt_45_45_11_11_info, field_fmt_45_45_11_11_set, field_fmt_45_45_11_11_get, NULL, 0}, + {1, field_fmt_46_46_11_11_info, field_fmt_46_46_11_11_set, field_fmt_46_46_11_11_get, NULL, 0}, + {1, field_fmt_47_47_11_11_info, field_fmt_47_47_11_11_set, field_fmt_47_47_11_11_get, NULL, 0}, + {1, field_fmt_48_49_11_11_info, field_fmt_48_49_11_11_set, field_fmt_48_49_11_11_get, bcm56996_b0_rx_reason_cpu_sflow_names, 0}, + {1, field_fmt_50_50_11_11_info, field_fmt_50_50_11_11_set, field_fmt_50_50_11_11_get, NULL, 0}, + {1, field_fmt_51_51_11_11_info, field_fmt_51_51_11_11_set, field_fmt_51_51_11_11_get, NULL, 0}, + {1, field_fmt_52_52_11_11_info, field_fmt_52_52_11_11_set, field_fmt_52_52_11_11_get, NULL, 0}, + {1, field_fmt_53_53_11_11_info, field_fmt_53_53_11_11_set, field_fmt_53_53_11_11_get, NULL, 0}, + {1, field_fmt_54_54_11_11_info, field_fmt_54_54_11_11_set, field_fmt_54_54_11_11_get, NULL, 0}, + {1, field_fmt_55_55_11_11_info, field_fmt_55_55_11_11_set, field_fmt_55_55_11_11_get, NULL, 0}, + {1, field_fmt_56_58_11_11_info, field_fmt_56_58_11_11_set, field_fmt_56_58_11_11_get, bcm56996_b0_rx_reason_mpls_proc_error_names, 0}, + {1, field_fmt_59_59_11_11_info, field_fmt_59_59_11_11_set, field_fmt_59_59_11_11_get, NULL, 0}, + {1, field_fmt_60_60_11_11_info, field_fmt_60_60_11_11_set, field_fmt_60_60_11_11_get, NULL, 0}, + {1, field_fmt_61_61_11_11_info, field_fmt_61_61_11_11_set, field_fmt_61_61_11_11_get, NULL, 0}, + {1, field_fmt_62_62_11_11_info, field_fmt_62_62_11_11_set, field_fmt_62_62_11_11_get, NULL, 0}, + {1, field_fmt_63_63_11_11_info, field_fmt_63_63_11_11_set, field_fmt_63_63_11_11_get, NULL, 0}, + {1, field_fmt_64_64_10_10_info, field_fmt_64_64_10_10_set, field_fmt_64_64_10_10_get, NULL, 0}, + {1, field_fmt_65_65_10_10_info, field_fmt_65_65_10_10_set, field_fmt_65_65_10_10_get, NULL, 0}, + {1, field_fmt_66_66_10_10_info, field_fmt_66_66_10_10_set, field_fmt_66_66_10_10_get, NULL, 0}, + {1, field_fmt_67_67_10_10_info, field_fmt_67_67_10_10_set, field_fmt_67_67_10_10_get, NULL, 0}, + {1, field_fmt_68_68_10_10_info, field_fmt_68_68_10_10_set, field_fmt_68_68_10_10_get, NULL, 0}, + {1, field_fmt_69_69_10_10_info, field_fmt_69_69_10_10_set, field_fmt_69_69_10_10_get, NULL, 0}, + {1, field_fmt_70_70_10_10_info, field_fmt_70_70_10_10_set, field_fmt_70_70_10_10_get, NULL, 0}, + {1, field_fmt_71_71_10_10_info, field_fmt_71_71_10_10_set, field_fmt_71_71_10_10_get, NULL, 0}, + {1, field_fmt_72_72_10_10_info, field_fmt_72_72_10_10_set, field_fmt_72_72_10_10_get, NULL, 0}, + {1, field_fmt_73_73_10_10_info, field_fmt_73_73_10_10_set, field_fmt_73_73_10_10_get, NULL, 0}, + {1, field_fmt_74_74_10_10_info, field_fmt_74_74_10_10_set, field_fmt_74_74_10_10_get, NULL, 0}, + {1, field_fmt_75_75_10_10_info, field_fmt_75_75_10_10_set, field_fmt_75_75_10_10_get, NULL, 0}, + {1, field_fmt_76_76_10_10_info, field_fmt_76_76_10_10_set, field_fmt_76_76_10_10_get, NULL, 0}, }; @@ -2939,29 +2938,29 @@ static const shr_enum_map_t bcm56996_b0_txpmd_start_names[] = }; static bcmpkt_pmd_field_t bcm56996_b0_txpmd_fields[BCM56996_B0_TXPMD_COUNT] = { - {"CELL_LENGTH",1, field_fmt_0_7_3_3_info, field_fmt_0_7_3_3_set, field_fmt_0_7_3_3_get, NULL, 0}, - {"EOP",1, field_fmt_8_8_3_3_info, field_fmt_8_8_3_3_set, field_fmt_8_8_3_3_get, NULL, 0}, - {"SOP",1, field_fmt_9_9_3_3_info, field_fmt_9_9_3_3_set, field_fmt_9_9_3_3_get, NULL, 0}, - {"PKT_LENGTH",1, field_fmt_10_23_3_3_info, field_fmt_10_23_3_3_set, field_fmt_10_23_3_3_get, NULL, 0}, - {"IPCF_PTR",1, field_fmt_24_31_3_3_info, field_fmt_24_31_3_3_set, field_fmt_24_31_3_3_get, NULL, 0}, - {"SRC_MODID",1, field_fmt_32_39_2_2_info, field_fmt_32_39_2_2_set, field_fmt_32_39_2_2_get, NULL, 0}, - {"COS",1, field_fmt_40_45_2_2_info, field_fmt_40_45_2_2_set, field_fmt_40_45_2_2_get, NULL, 0}, - {"UNICAST",1, field_fmt_46_46_2_2_info, field_fmt_46_46_2_2_set, field_fmt_46_46_2_2_get, NULL, 0}, - {"SET_L2BM",1, field_fmt_47_47_2_2_info, field_fmt_47_47_2_2_set, field_fmt_47_47_2_2_get, NULL, 0}, - {"RQE_Q_NUM",1, field_fmt_48_51_2_2_info, field_fmt_48_51_2_2_set, field_fmt_48_51_2_2_get, NULL, 0}, - {"SPAP",1, field_fmt_52_53_2_2_info, field_fmt_52_53_2_2_set, field_fmt_52_53_2_2_get, NULL, 0}, - {"SPID",1, field_fmt_54_55_2_2_info, field_fmt_54_55_2_2_set, field_fmt_54_55_2_2_get, NULL, 0}, - {"SPID_OVERRIDE",1, field_fmt_56_56_2_2_info, field_fmt_56_56_2_2_set, field_fmt_56_56_2_2_get, NULL, 0}, - {"INPUT_PRI",1, field_fmt_57_60_2_2_info, field_fmt_57_60_2_2_set, field_fmt_57_60_2_2_get, NULL, 0}, - {"LOCAL_DEST_PORT",1, field_fmt_63_71_2_1_info, field_fmt_63_71_2_1_set, field_fmt_63_71_2_1_get, NULL, 0}, - {"IEEE1588_TIMESTAMP_HDR_OFFSET",1, field_fmt_72_79_1_1_info, field_fmt_72_79_1_1_set, field_fmt_72_79_1_1_get, NULL, 0}, - {"TX_TS",1, field_fmt_80_80_1_1_info, field_fmt_80_80_1_1_set, field_fmt_80_80_1_1_get, NULL, 0}, - {"IEEE1588_INGRESS_TIMESTAMP_SIGN",1, field_fmt_81_81_1_1_info, field_fmt_81_81_1_1_set, field_fmt_81_81_1_1_get, NULL, 0}, - {"IEEE1588_REGEN_UDP_CHECKSUM",1, field_fmt_82_82_1_1_info, field_fmt_82_82_1_1_set, field_fmt_82_82_1_1_get, NULL, 0}, - {"IEEE1588_ONE_STEP_ENABLE",1, field_fmt_83_83_1_1_info, field_fmt_83_83_1_1_set, field_fmt_83_83_1_1_get, NULL, 0}, - {"CELL_ERROR",1, field_fmt_84_84_1_1_info, field_fmt_84_84_1_1_set, field_fmt_84_84_1_1_get, NULL, 0}, - {"HEADER_TYPE",1, field_fmt_120_125_0_0_info, field_fmt_120_125_0_0_set, field_fmt_120_125_0_0_get, bcm56996_b0_txpmd_header_type_names, 0}, - {"START",1, field_fmt_126_127_0_0_info, field_fmt_126_127_0_0_set, field_fmt_126_127_0_0_get, bcm56996_b0_txpmd_start_names, 0}, + {1, field_fmt_0_7_3_3_info, field_fmt_0_7_3_3_set, field_fmt_0_7_3_3_get, NULL, 0}, + {1, field_fmt_8_8_3_3_info, field_fmt_8_8_3_3_set, field_fmt_8_8_3_3_get, NULL, 0}, + {1, field_fmt_9_9_3_3_info, field_fmt_9_9_3_3_set, field_fmt_9_9_3_3_get, NULL, 0}, + {1, field_fmt_10_23_3_3_info, field_fmt_10_23_3_3_set, field_fmt_10_23_3_3_get, NULL, 0}, + {1, field_fmt_24_31_3_3_info, field_fmt_24_31_3_3_set, field_fmt_24_31_3_3_get, NULL, 0}, + {1, field_fmt_32_39_2_2_info, field_fmt_32_39_2_2_set, field_fmt_32_39_2_2_get, NULL, 0}, + {1, field_fmt_40_45_2_2_info, field_fmt_40_45_2_2_set, field_fmt_40_45_2_2_get, NULL, 0}, + {1, field_fmt_46_46_2_2_info, field_fmt_46_46_2_2_set, field_fmt_46_46_2_2_get, NULL, 0}, + {1, field_fmt_47_47_2_2_info, field_fmt_47_47_2_2_set, field_fmt_47_47_2_2_get, NULL, 0}, + {1, field_fmt_48_51_2_2_info, field_fmt_48_51_2_2_set, field_fmt_48_51_2_2_get, NULL, 0}, + {1, field_fmt_52_53_2_2_info, field_fmt_52_53_2_2_set, field_fmt_52_53_2_2_get, NULL, 0}, + {1, field_fmt_54_55_2_2_info, field_fmt_54_55_2_2_set, field_fmt_54_55_2_2_get, NULL, 0}, + {1, field_fmt_56_56_2_2_info, field_fmt_56_56_2_2_set, field_fmt_56_56_2_2_get, NULL, 0}, + {1, field_fmt_57_60_2_2_info, field_fmt_57_60_2_2_set, field_fmt_57_60_2_2_get, NULL, 0}, + {1, field_fmt_63_71_2_1_info, field_fmt_63_71_2_1_set, field_fmt_63_71_2_1_get, NULL, 0}, + {1, field_fmt_72_79_1_1_info, field_fmt_72_79_1_1_set, field_fmt_72_79_1_1_get, NULL, 0}, + {1, field_fmt_80_80_1_1_info, field_fmt_80_80_1_1_set, field_fmt_80_80_1_1_get, NULL, 0}, + {1, field_fmt_81_81_1_1_info, field_fmt_81_81_1_1_set, field_fmt_81_81_1_1_get, NULL, 0}, + {1, field_fmt_82_82_1_1_info, field_fmt_82_82_1_1_set, field_fmt_82_82_1_1_get, NULL, 0}, + {1, field_fmt_83_83_1_1_info, field_fmt_83_83_1_1_set, field_fmt_83_83_1_1_get, NULL, 0}, + {1, field_fmt_84_84_1_1_info, field_fmt_84_84_1_1_set, field_fmt_84_84_1_1_get, NULL, 0}, + {1, field_fmt_120_125_0_0_info, field_fmt_120_125_0_0_set, field_fmt_120_125_0_0_get, bcm56996_b0_txpmd_header_type_names, 0}, + {1, field_fmt_126_127_0_0_info, field_fmt_126_127_0_0_set, field_fmt_126_127_0_0_get, bcm56996_b0_txpmd_start_names, 0}, }; @@ -2992,31 +2991,31 @@ static const shr_enum_map_t bcm56996_b0_lbhdr_header_type_names[] = }; static bcmpkt_pmd_field_t bcm56996_b0_lbhdr_fields[BCM56996_B0_LBHDR_COUNT] = { - {"ETHERNET::PP_PORT",1, field_fmt_0_8_3_3_info, field_fmt_0_8_3_3_set, field_fmt_0_8_3_3_get, NULL, 3}, - {"ETHERNET::SUBFLOW_TYPE",1, field_fmt_9_10_3_3_info, field_fmt_9_10_3_3_set, field_fmt_9_10_3_3_get, bcm56996_b0_lbhdr_ethernet_subflow_type_names, 3}, - {"ETHERNET::DESTINATION_TYPE",1, field_fmt_11_14_3_3_info, field_fmt_11_14_3_3_set, field_fmt_11_14_3_3_get, bcm56996_b0_lbhdr_ethernet_destination_type_names, 3}, - {"ETHERNET::DESTINATION",1, field_fmt_15_30_3_3_info, field_fmt_15_30_3_3_set, field_fmt_15_30_3_3_get, NULL, 3}, - {"ETHERNET::ROUTED_PKT",1, field_fmt_31_31_3_3_info, field_fmt_31_31_3_3_set, field_fmt_31_31_3_3_get, NULL, 3}, - {"ETHERNET::QOS_FIELDS_VLD",1, field_fmt_32_32_2_2_info, field_fmt_32_32_2_2_set, field_fmt_32_32_2_2_get, NULL, 3}, - {"ETHERNET::INT_CN",1, field_fmt_33_34_2_2_info, field_fmt_33_34_2_2_set, field_fmt_33_34_2_2_get, NULL, 3}, - {"ETHERNET::INT_PRI",1, field_fmt_35_38_2_2_info, field_fmt_35_38_2_2_set, field_fmt_35_38_2_2_get, NULL, 3}, - {"ETHERNET::DP",1, field_fmt_39_40_2_2_info, field_fmt_39_40_2_2_set, field_fmt_39_40_2_2_get, NULL, 3}, - {"ETHERNET::ECMP_MEMBER_ID",1, field_fmt_41_54_2_2_info, field_fmt_41_54_2_2_set, field_fmt_41_54_2_2_get, NULL, 3}, - {"ETHERNET::VRF",1, field_fmt_55_67_2_1_info, field_fmt_55_67_2_1_set, field_fmt_55_67_2_1_get, NULL, 3}, - {"ETHERNET::VRF_VALID",1, field_fmt_68_68_1_1_info, field_fmt_68_68_1_1_set, field_fmt_68_68_1_1_get, NULL, 3}, - {"ETHERNET::MCAST_LB_INDEX",1, field_fmt_70_77_1_1_info, field_fmt_70_77_1_1_set, field_fmt_70_77_1_1_get, NULL, 3}, - {"ETHERNET::MCAST_LB_INDEX_VLD",1, field_fmt_78_78_1_1_info, field_fmt_78_78_1_1_set, field_fmt_78_78_1_1_get, NULL, 3}, - {"TRILL_ACCESS_NONUC::TC",1, field_fmt_0_3_3_3_info, field_fmt_0_3_3_3_set, field_fmt_0_3_3_3_get, NULL, 2}, - {"TRILL_ACCESS_NONUC::CNG",1, field_fmt_4_5_3_3_info, field_fmt_4_5_3_3_set, field_fmt_4_5_3_3_get, NULL, 2}, - {"TRILL_NETWORK_NONUC::TC",1, field_fmt_0_3_3_3_info, field_fmt_0_3_3_3_set, field_fmt_0_3_3_3_get, NULL, 1}, - {"TRILL_NETWORK_NONUC::CNG",1, field_fmt_4_5_3_3_info, field_fmt_4_5_3_3_set, field_fmt_4_5_3_3_get, NULL, 1}, - {"PKT_PROFILE",1, field_fmt_90_92_1_1_info, field_fmt_90_92_1_1_set, field_fmt_90_92_1_1_get, NULL, 0}, - {"VISIBILITY_PKT",1, field_fmt_93_93_1_1_info, field_fmt_93_93_1_1_set, field_fmt_93_93_1_1_get, NULL, 0}, - {"SOURCE",1, field_fmt_94_109_1_0_info, field_fmt_94_109_1_0_set, field_fmt_94_109_1_0_get, NULL, 0}, - {"SOURCE_TYPE",1, field_fmt_110_110_0_0_info, field_fmt_110_110_0_0_set, field_fmt_110_110_0_0_get, NULL, 0}, - {"HEADER_TYPE",1, field_fmt_111_115_0_0_info, field_fmt_111_115_0_0_set, field_fmt_111_115_0_0_get, bcm56996_b0_lbhdr_header_type_names, 0}, - {"INPUT_PRIORITY",1, field_fmt_116_119_0_0_info, field_fmt_116_119_0_0_set, field_fmt_116_119_0_0_get, NULL, 0}, - {"START",1, field_fmt_120_127_0_0_info, field_fmt_120_127_0_0_set, field_fmt_120_127_0_0_get, NULL, 0}, + {1, field_fmt_0_8_3_3_info, field_fmt_0_8_3_3_set, field_fmt_0_8_3_3_get, NULL, 3}, + {1, field_fmt_9_10_3_3_info, field_fmt_9_10_3_3_set, field_fmt_9_10_3_3_get, bcm56996_b0_lbhdr_ethernet_subflow_type_names, 3}, + {1, field_fmt_11_14_3_3_info, field_fmt_11_14_3_3_set, field_fmt_11_14_3_3_get, bcm56996_b0_lbhdr_ethernet_destination_type_names, 3}, + {1, field_fmt_15_30_3_3_info, field_fmt_15_30_3_3_set, field_fmt_15_30_3_3_get, NULL, 3}, + {1, field_fmt_31_31_3_3_info, field_fmt_31_31_3_3_set, field_fmt_31_31_3_3_get, NULL, 3}, + {1, field_fmt_32_32_2_2_info, field_fmt_32_32_2_2_set, field_fmt_32_32_2_2_get, NULL, 3}, + {1, field_fmt_33_34_2_2_info, field_fmt_33_34_2_2_set, field_fmt_33_34_2_2_get, NULL, 3}, + {1, field_fmt_35_38_2_2_info, field_fmt_35_38_2_2_set, field_fmt_35_38_2_2_get, NULL, 3}, + {1, field_fmt_39_40_2_2_info, field_fmt_39_40_2_2_set, field_fmt_39_40_2_2_get, NULL, 3}, + {1, field_fmt_41_54_2_2_info, field_fmt_41_54_2_2_set, field_fmt_41_54_2_2_get, NULL, 3}, + {1, field_fmt_55_67_2_1_info, field_fmt_55_67_2_1_set, field_fmt_55_67_2_1_get, NULL, 3}, + {1, field_fmt_68_68_1_1_info, field_fmt_68_68_1_1_set, field_fmt_68_68_1_1_get, NULL, 3}, + {1, field_fmt_70_77_1_1_info, field_fmt_70_77_1_1_set, field_fmt_70_77_1_1_get, NULL, 3}, + {1, field_fmt_78_78_1_1_info, field_fmt_78_78_1_1_set, field_fmt_78_78_1_1_get, NULL, 3}, + {1, field_fmt_0_3_3_3_info, field_fmt_0_3_3_3_set, field_fmt_0_3_3_3_get, NULL, 2}, + {1, field_fmt_4_5_3_3_info, field_fmt_4_5_3_3_set, field_fmt_4_5_3_3_get, NULL, 2}, + {1, field_fmt_0_3_3_3_info, field_fmt_0_3_3_3_set, field_fmt_0_3_3_3_get, NULL, 1}, + {1, field_fmt_4_5_3_3_info, field_fmt_4_5_3_3_set, field_fmt_4_5_3_3_get, NULL, 1}, + {1, field_fmt_90_92_1_1_info, field_fmt_90_92_1_1_set, field_fmt_90_92_1_1_get, NULL, 0}, + {1, field_fmt_93_93_1_1_info, field_fmt_93_93_1_1_set, field_fmt_93_93_1_1_get, NULL, 0}, + {1, field_fmt_94_109_1_0_info, field_fmt_94_109_1_0_set, field_fmt_94_109_1_0_get, NULL, 0}, + {1, field_fmt_110_110_0_0_info, field_fmt_110_110_0_0_set, field_fmt_110_110_0_0_get, NULL, 0}, + {1, field_fmt_111_115_0_0_info, field_fmt_111_115_0_0_set, field_fmt_111_115_0_0_get, bcm56996_b0_lbhdr_header_type_names, 0}, + {1, field_fmt_116_119_0_0_info, field_fmt_116_119_0_0_set, field_fmt_116_119_0_0_get, NULL, 0}, + {1, field_fmt_120_127_0_0_info, field_fmt_120_127_0_0_set, field_fmt_120_127_0_0_get, NULL, 0}, }; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56998_a0/bcm56998_a0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56998_a0/bcm56998_a0_pkt_lbhdr.c similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56998_a0/bcm56998_a0_pkt_lbhdr.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56998_a0/bcm56998_a0_pkt_lbhdr.c index 6a2d99cff52..83e3eef556c 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56998_a0/bcm56998_a0_pkt_lbhdr.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56998_a0/bcm56998_a0_pkt_lbhdr.c @@ -5,8 +5,7 @@ * Edits to this file will be lost when it is regenerated. * Tool: INTERNAL/regs/xgs/generate-pmd.pl * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56998_a0/bcm56998_a0_pkt_rxpmd.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56998_a0/bcm56998_a0_pkt_rxpmd.c similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56998_a0/bcm56998_a0_pkt_rxpmd.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56998_a0/bcm56998_a0_pkt_rxpmd.c index 0294ea679be..8b1ccb26e6b 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56998_a0/bcm56998_a0_pkt_rxpmd.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56998_a0/bcm56998_a0_pkt_rxpmd.c @@ -5,8 +5,7 @@ * Edits to this file will be lost when it is regenerated. * Tool: INTERNAL/regs/xgs/generate-pmd.pl * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -1011,8 +1010,6 @@ const bcmpkt_rxpmd_fget_t bcm56998_a0_rxpmd_fget = { NULL, NULL, NULL, - NULL, - NULL, NULL } }; @@ -1118,8 +1115,6 @@ const bcmpkt_rxpmd_fset_t bcm56998_a0_rxpmd_fset = { NULL, NULL, NULL, - NULL, - NULL, NULL } }; @@ -1146,7 +1141,7 @@ static int bcm56998_a0_rxpmd_view_infos[BCMPKT_RXPMD_FID_COUNT] = { -1, -1, -1, -1, -1, -1, -1, -2, -1, -1, -1, -1, -1, -2, -2, -2, -2, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -2, -2, -2, -1, -1, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, - -2, -2, -2, -2, -2, + -2, -2, -2, }; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56998_a0/bcm56998_a0_pkt_txpmd.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56998_a0/bcm56998_a0_pkt_txpmd.c similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56998_a0/bcm56998_a0_pkt_txpmd.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56998_a0/bcm56998_a0_pkt_txpmd.c index 468be872b20..d5d17b82bef 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56998_a0/bcm56998_a0_pkt_txpmd.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56998_a0/bcm56998_a0_pkt_txpmd.c @@ -5,8 +5,7 @@ * Edits to this file will be lost when it is regenerated. * Tool: INTERNAL/regs/xgs/generate-pmd.pl * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -450,7 +449,6 @@ const bcmpkt_txpmd_fget_t bcm56998_a0_txpmd_fget = { NULL, NULL, NULL, - NULL, NULL } }; @@ -586,7 +584,6 @@ const bcmpkt_txpmd_fset_t bcm56998_a0_txpmd_fset = { NULL, NULL, NULL, - NULL, NULL } }; @@ -612,7 +609,7 @@ static int bcm56998_a0_txpmd_view_infos[BCMPKT_TXPMD_FID_COUNT] = { -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, - -2, -2, + -2, }; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56998_a0/bcm56998_a0_pmd_field.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56998_a0/bcm56998_a0_pmd_field.c similarity index 77% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56998_a0/bcm56998_a0_pmd_field.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56998_a0/bcm56998_a0_pmd_field.c index 15ec5aac895..b966cc00edd 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56998_a0/bcm56998_a0_pmd_field.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56998_a0/bcm56998_a0_pmd_field.c @@ -5,8 +5,7 @@ * Edits to this file will be lost when it is regenerated. * Tool: INTERNAL/regs/xgs/generate-pmd.pl * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -2859,53 +2858,53 @@ static const shr_enum_map_t bcm56998_a0_rxpmd_timestamp_type_names[] = }; static bcmpkt_pmd_field_t bcm56998_a0_rxpmd_fields[BCM56998_A0_RXPMD_COUNT] = { - {"ING_L3_INTF",1, field_fmt_0_12_12_12_info, field_fmt_0_12_12_12_set, field_fmt_0_12_12_12_get, NULL, 0}, - {"I2E_CLASSID",1, field_fmt_0_11_12_12_info, field_fmt_0_11_12_12_set, field_fmt_0_11_12_12_get, NULL, 0}, - {"RX_BFD_SESSION_INDEX",1, field_fmt_0_11_12_12_info, field_fmt_0_11_12_12_set, field_fmt_0_11_12_12_get, NULL, 0}, - {"I2E_CLASSID_TYPE",1, field_fmt_12_15_12_12_info, field_fmt_12_15_12_12_set, field_fmt_12_15_12_12_get, NULL, 0}, - {"RX_BFD_START_OFFSET_TYPE",1, field_fmt_12_13_12_12_info, field_fmt_12_13_12_12_set, field_fmt_12_13_12_12_get, NULL, 0}, - {"RX_BFD_START_OFFSET",1, field_fmt_14_21_12_12_info, field_fmt_14_21_12_12_set, field_fmt_14_21_12_12_get, NULL, 0}, - {"ING_L3_INTF_VALID",1, field_fmt_16_16_12_12_info, field_fmt_16_16_12_12_set, field_fmt_16_16_12_12_get, NULL, 0}, - {"CPU_COS",1, field_fmt_22_27_12_12_info, field_fmt_22_27_12_12_set, field_fmt_22_27_12_12_get, NULL, 0}, - {"QUEUE_NUM",1, field_fmt_22_27_12_12_info, field_fmt_22_27_12_12_set, field_fmt_22_27_12_12_get, NULL, 0}, - {"BPDU",1, field_fmt_28_28_12_12_info, field_fmt_28_28_12_12_set, field_fmt_28_28_12_12_get, NULL, 0}, - {"CHANGE_DSCP",1, field_fmt_29_29_12_12_info, field_fmt_29_29_12_12_set, field_fmt_29_29_12_12_get, NULL, 0}, - {"CHANGE_ECN",1, field_fmt_30_30_12_12_info, field_fmt_30_30_12_12_set, field_fmt_30_30_12_12_get, NULL, 0}, - {"DLB_ID_VALID",1, field_fmt_31_31_12_12_info, field_fmt_31_31_12_12_set, field_fmt_31_31_12_12_get, NULL, 0}, - {"REASON",2, field_fmt_32_95_11_10_info, field_fmt_32_95_11_10_set, field_fmt_32_95_11_10_get, NULL, 0}, - {"REASON_TYPE",1, field_fmt_96_99_9_9_info, field_fmt_96_99_9_9_set, field_fmt_96_99_9_9_get, NULL, 0}, - {"DO_NOT_CHANGE_TTL",1, field_fmt_100_100_9_9_info, field_fmt_100_100_9_9_set, field_fmt_100_100_9_9_get, NULL, 0}, - {"DSCP",1, field_fmt_101_106_9_9_info, field_fmt_101_106_9_9_set, field_fmt_101_106_9_9_get, NULL, 0}, - {"SPECIAL_PACKET_TYPE",1, field_fmt_101_103_9_9_info, field_fmt_101_103_9_9_set, field_fmt_101_103_9_9_get, NULL, 0}, - {"ECN",1, field_fmt_107_108_9_9_info, field_fmt_107_108_9_9_set, field_fmt_107_108_9_9_get, NULL, 0}, - {"INCOMING_TAG_STATUS",1, field_fmt_109_110_9_9_info, field_fmt_109_110_9_9_set, field_fmt_109_110_9_9_get, NULL, 0}, - {"O_NHI",1, field_fmt_111_125_9_9_info, field_fmt_111_125_9_9_set, field_fmt_111_125_9_9_get, NULL, 0}, - {"ING_OTAG_ACTION",1, field_fmt_126_127_9_9_info, field_fmt_126_127_9_9_set, field_fmt_126_127_9_9_get, NULL, 0}, - {"IEU",1, field_fmt_128_128_8_8_info, field_fmt_128_128_8_8_set, field_fmt_128_128_8_8_get, NULL, 0}, - {"IEU_VALID",1, field_fmt_129_129_8_8_info, field_fmt_129_129_8_8_set, field_fmt_129_129_8_8_get, NULL, 0}, - {"L3ONLY",1, field_fmt_130_130_8_8_info, field_fmt_130_130_8_8_set, field_fmt_130_130_8_8_get, NULL, 0}, - {"MATCHED_RULE",1, field_fmt_131_138_8_8_info, field_fmt_131_138_8_8_set, field_fmt_131_138_8_8_get, NULL, 0}, - {"MTP_INDEX",1, field_fmt_139_141_8_8_info, field_fmt_139_141_8_8_set, field_fmt_139_141_8_8_get, NULL, 0}, - {"OUTER_CFI",1, field_fmt_142_142_8_8_info, field_fmt_142_142_8_8_set, field_fmt_142_142_8_8_get, NULL, 0}, - {"OUTER_PRI",1, field_fmt_143_145_8_8_info, field_fmt_143_145_8_8_set, field_fmt_143_145_8_8_get, NULL, 0}, - {"OUTER_VID",1, field_fmt_146_157_8_8_info, field_fmt_146_157_8_8_set, field_fmt_146_157_8_8_get, NULL, 0}, - {"INCOMING_INT_HDR_TYPE",1, field_fmt_158_159_8_8_info, field_fmt_158_159_8_8_set, field_fmt_158_159_8_8_get, NULL, 0}, - {"PKT_LENGTH",1, field_fmt_160_173_7_7_info, field_fmt_160_173_7_7_set, field_fmt_160_173_7_7_get, NULL, 0}, - {"REGEN_CRC",1, field_fmt_174_174_7_7_info, field_fmt_174_174_7_7_set, field_fmt_174_174_7_7_get, NULL, 0}, - {"REPLICATION_OR_NHOP_INDEX",1, field_fmt_175_191_7_7_info, field_fmt_175_191_7_7_set, field_fmt_175_191_7_7_get, NULL, 0}, - {"IP_ROUTED",1, field_fmt_192_192_6_6_info, field_fmt_192_192_6_6_set, field_fmt_192_192_6_6_get, NULL, 0}, - {"ENTROPY_LABEL",1, field_fmt_193_212_6_6_info, field_fmt_193_212_6_6_set, field_fmt_193_212_6_6_get, NULL, 0}, - {"SPECIAL_PACKET_INDICATOR",1, field_fmt_213_213_6_6_info, field_fmt_213_213_6_6_set, field_fmt_213_213_6_6_get, NULL, 0}, - {"SRC_PORT_NUM",1, field_fmt_214_222_6_6_info, field_fmt_214_222_6_6_set, field_fmt_214_222_6_6_get, NULL, 0}, - {"SWITCH",1, field_fmt_223_223_6_6_info, field_fmt_223_223_6_6_set, field_fmt_223_223_6_6_get, NULL, 0}, - {"TIMESTAMP",1, field_fmt_224_255_5_5_info, field_fmt_224_255_5_5_set, field_fmt_224_255_5_5_get, NULL, 0}, - {"TIMESTAMP_HI",1, field_fmt_256_271_4_4_info, field_fmt_256_271_4_4_set, field_fmt_256_271_4_4_get, NULL, 0}, - {"TIMESTAMP_TYPE",1, field_fmt_272_273_4_4_info, field_fmt_272_273_4_4_set, field_fmt_272_273_4_4_get, bcm56998_a0_rxpmd_timestamp_type_names, 0}, - {"TUNNEL_DECAP_TYPE",1, field_fmt_274_278_4_4_info, field_fmt_274_278_4_4_set, field_fmt_274_278_4_4_get, NULL, 0}, - {"UC_SW_COPY_DROPPED",1, field_fmt_279_279_4_4_info, field_fmt_279_279_4_4_set, field_fmt_279_279_4_4_get, NULL, 0}, - {"UNICAST_QUEUE",1, field_fmt_280_280_4_4_info, field_fmt_280_280_4_4_set, field_fmt_280_280_4_4_get, NULL, 0}, - {"DLB_ID",1, field_fmt_281_287_4_4_info, field_fmt_281_287_4_4_set, field_fmt_281_287_4_4_get, NULL, 0}, - {"MODULE_HDR",4, field_fmt_288_415_3_0_info, field_fmt_288_415_3_0_set, field_fmt_288_415_3_0_get, NULL, 0}, + {1, field_fmt_0_12_12_12_info, field_fmt_0_12_12_12_set, field_fmt_0_12_12_12_get, NULL, 0}, + {1, field_fmt_0_11_12_12_info, field_fmt_0_11_12_12_set, field_fmt_0_11_12_12_get, NULL, 0}, + {1, field_fmt_0_11_12_12_info, field_fmt_0_11_12_12_set, field_fmt_0_11_12_12_get, NULL, 0}, + {1, field_fmt_12_15_12_12_info, field_fmt_12_15_12_12_set, field_fmt_12_15_12_12_get, NULL, 0}, + {1, field_fmt_12_13_12_12_info, field_fmt_12_13_12_12_set, field_fmt_12_13_12_12_get, NULL, 0}, + {1, field_fmt_14_21_12_12_info, field_fmt_14_21_12_12_set, field_fmt_14_21_12_12_get, NULL, 0}, + {1, field_fmt_16_16_12_12_info, field_fmt_16_16_12_12_set, field_fmt_16_16_12_12_get, NULL, 0}, + {1, field_fmt_22_27_12_12_info, field_fmt_22_27_12_12_set, field_fmt_22_27_12_12_get, NULL, 0}, + {1, field_fmt_22_27_12_12_info, field_fmt_22_27_12_12_set, field_fmt_22_27_12_12_get, NULL, 0}, + {1, field_fmt_28_28_12_12_info, field_fmt_28_28_12_12_set, field_fmt_28_28_12_12_get, NULL, 0}, + {1, field_fmt_29_29_12_12_info, field_fmt_29_29_12_12_set, field_fmt_29_29_12_12_get, NULL, 0}, + {1, field_fmt_30_30_12_12_info, field_fmt_30_30_12_12_set, field_fmt_30_30_12_12_get, NULL, 0}, + {1, field_fmt_31_31_12_12_info, field_fmt_31_31_12_12_set, field_fmt_31_31_12_12_get, NULL, 0}, + {2, field_fmt_32_95_11_10_info, field_fmt_32_95_11_10_set, field_fmt_32_95_11_10_get, NULL, 0}, + {1, field_fmt_96_99_9_9_info, field_fmt_96_99_9_9_set, field_fmt_96_99_9_9_get, NULL, 0}, + {1, field_fmt_100_100_9_9_info, field_fmt_100_100_9_9_set, field_fmt_100_100_9_9_get, NULL, 0}, + {1, field_fmt_101_106_9_9_info, field_fmt_101_106_9_9_set, field_fmt_101_106_9_9_get, NULL, 0}, + {1, field_fmt_101_103_9_9_info, field_fmt_101_103_9_9_set, field_fmt_101_103_9_9_get, NULL, 0}, + {1, field_fmt_107_108_9_9_info, field_fmt_107_108_9_9_set, field_fmt_107_108_9_9_get, NULL, 0}, + {1, field_fmt_109_110_9_9_info, field_fmt_109_110_9_9_set, field_fmt_109_110_9_9_get, NULL, 0}, + {1, field_fmt_111_125_9_9_info, field_fmt_111_125_9_9_set, field_fmt_111_125_9_9_get, NULL, 0}, + {1, field_fmt_126_127_9_9_info, field_fmt_126_127_9_9_set, field_fmt_126_127_9_9_get, NULL, 0}, + {1, field_fmt_128_128_8_8_info, field_fmt_128_128_8_8_set, field_fmt_128_128_8_8_get, NULL, 0}, + {1, field_fmt_129_129_8_8_info, field_fmt_129_129_8_8_set, field_fmt_129_129_8_8_get, NULL, 0}, + {1, field_fmt_130_130_8_8_info, field_fmt_130_130_8_8_set, field_fmt_130_130_8_8_get, NULL, 0}, + {1, field_fmt_131_138_8_8_info, field_fmt_131_138_8_8_set, field_fmt_131_138_8_8_get, NULL, 0}, + {1, field_fmt_139_141_8_8_info, field_fmt_139_141_8_8_set, field_fmt_139_141_8_8_get, NULL, 0}, + {1, field_fmt_142_142_8_8_info, field_fmt_142_142_8_8_set, field_fmt_142_142_8_8_get, NULL, 0}, + {1, field_fmt_143_145_8_8_info, field_fmt_143_145_8_8_set, field_fmt_143_145_8_8_get, NULL, 0}, + {1, field_fmt_146_157_8_8_info, field_fmt_146_157_8_8_set, field_fmt_146_157_8_8_get, NULL, 0}, + {1, field_fmt_158_159_8_8_info, field_fmt_158_159_8_8_set, field_fmt_158_159_8_8_get, NULL, 0}, + {1, field_fmt_160_173_7_7_info, field_fmt_160_173_7_7_set, field_fmt_160_173_7_7_get, NULL, 0}, + {1, field_fmt_174_174_7_7_info, field_fmt_174_174_7_7_set, field_fmt_174_174_7_7_get, NULL, 0}, + {1, field_fmt_175_191_7_7_info, field_fmt_175_191_7_7_set, field_fmt_175_191_7_7_get, NULL, 0}, + {1, field_fmt_192_192_6_6_info, field_fmt_192_192_6_6_set, field_fmt_192_192_6_6_get, NULL, 0}, + {1, field_fmt_193_212_6_6_info, field_fmt_193_212_6_6_set, field_fmt_193_212_6_6_get, NULL, 0}, + {1, field_fmt_213_213_6_6_info, field_fmt_213_213_6_6_set, field_fmt_213_213_6_6_get, NULL, 0}, + {1, field_fmt_214_222_6_6_info, field_fmt_214_222_6_6_set, field_fmt_214_222_6_6_get, NULL, 0}, + {1, field_fmt_223_223_6_6_info, field_fmt_223_223_6_6_set, field_fmt_223_223_6_6_get, NULL, 0}, + {1, field_fmt_224_255_5_5_info, field_fmt_224_255_5_5_set, field_fmt_224_255_5_5_get, NULL, 0}, + {1, field_fmt_256_271_4_4_info, field_fmt_256_271_4_4_set, field_fmt_256_271_4_4_get, NULL, 0}, + {1, field_fmt_272_273_4_4_info, field_fmt_272_273_4_4_set, field_fmt_272_273_4_4_get, bcm56998_a0_rxpmd_timestamp_type_names, 0}, + {1, field_fmt_274_278_4_4_info, field_fmt_274_278_4_4_set, field_fmt_274_278_4_4_get, NULL, 0}, + {1, field_fmt_279_279_4_4_info, field_fmt_279_279_4_4_set, field_fmt_279_279_4_4_get, NULL, 0}, + {1, field_fmt_280_280_4_4_info, field_fmt_280_280_4_4_set, field_fmt_280_280_4_4_get, NULL, 0}, + {1, field_fmt_281_287_4_4_info, field_fmt_281_287_4_4_set, field_fmt_281_287_4_4_get, NULL, 0}, + {4, field_fmt_288_415_3_0_info, field_fmt_288_415_3_0_set, field_fmt_288_415_3_0_get, NULL, 0}, }; @@ -2931,49 +2930,49 @@ static const shr_enum_map_t bcm56998_a0_rx_reason_mpls_proc_error_names[] = }; static bcmpkt_pmd_field_t bcm56998_a0_rx_reason_fields[BCM56998_A0_RX_REASON_COUNT] = { - {"CPU_UVLAN",1, field_fmt_32_32_11_11_info, field_fmt_32_32_11_11_set, field_fmt_32_32_11_11_get, NULL, 0}, - {"CPU_SLF",1, field_fmt_33_33_11_11_info, field_fmt_33_33_11_11_set, field_fmt_33_33_11_11_get, NULL, 0}, - {"CPU_DLF",1, field_fmt_34_34_11_11_info, field_fmt_34_34_11_11_set, field_fmt_34_34_11_11_get, NULL, 0}, - {"CPU_L2MOVE",1, field_fmt_35_35_11_11_info, field_fmt_35_35_11_11_set, field_fmt_35_35_11_11_get, NULL, 0}, - {"CPU_L2CPU",1, field_fmt_36_36_11_11_info, field_fmt_36_36_11_11_set, field_fmt_36_36_11_11_get, NULL, 0}, - {"CPU_L3SRC_MISS",1, field_fmt_37_37_11_11_info, field_fmt_37_37_11_11_set, field_fmt_37_37_11_11_get, NULL, 0}, - {"CPU_L3DST_MISS",1, field_fmt_38_38_11_11_info, field_fmt_38_38_11_11_set, field_fmt_38_38_11_11_get, NULL, 0}, - {"CPU_L3SRC_MOVE",1, field_fmt_39_39_11_11_info, field_fmt_39_39_11_11_set, field_fmt_39_39_11_11_get, NULL, 0}, - {"CPU_MC_MISS",1, field_fmt_40_40_11_11_info, field_fmt_40_40_11_11_set, field_fmt_40_40_11_11_get, NULL, 0}, - {"CPU_IPMC_MISS",1, field_fmt_41_41_11_11_info, field_fmt_41_41_11_11_set, field_fmt_41_41_11_11_get, NULL, 0}, - {"CPU_FFP",1, field_fmt_42_42_11_11_info, field_fmt_42_42_11_11_set, field_fmt_42_42_11_11_get, NULL, 0}, - {"CPU_L3HDR_ERR",1, field_fmt_43_43_11_11_info, field_fmt_43_43_11_11_set, field_fmt_43_43_11_11_get, NULL, 0}, - {"CPU_PROTOCOL_PKT",1, field_fmt_44_44_11_11_info, field_fmt_44_44_11_11_set, field_fmt_44_44_11_11_get, NULL, 0}, - {"CPU_DOS_ATTACK",1, field_fmt_45_45_11_11_info, field_fmt_45_45_11_11_set, field_fmt_45_45_11_11_get, NULL, 0}, - {"CPU_MARTIAN_ADDR",1, field_fmt_46_46_11_11_info, field_fmt_46_46_11_11_set, field_fmt_46_46_11_11_get, NULL, 0}, - {"CPU_TUNNEL_ERR",1, field_fmt_47_47_11_11_info, field_fmt_47_47_11_11_set, field_fmt_47_47_11_11_get, NULL, 0}, - {"CPU_SFLOW",1, field_fmt_48_49_11_11_info, field_fmt_48_49_11_11_set, field_fmt_48_49_11_11_get, bcm56998_a0_rx_reason_cpu_sflow_names, 0}, - {"ICMP_REDIRECT",1, field_fmt_50_50_11_11_info, field_fmt_50_50_11_11_set, field_fmt_50_50_11_11_get, NULL, 0}, - {"L3_SLOWPATH",1, field_fmt_51_51_11_11_info, field_fmt_51_51_11_11_set, field_fmt_51_51_11_11_get, NULL, 0}, - {"PARITY_ERROR",1, field_fmt_52_52_11_11_info, field_fmt_52_52_11_11_set, field_fmt_52_52_11_11_get, NULL, 0}, - {"L3_MTU_CHECK_FAIL",1, field_fmt_53_53_11_11_info, field_fmt_53_53_11_11_set, field_fmt_53_53_11_11_get, NULL, 0}, - {"MCIDX_ERROR",1, field_fmt_54_54_11_11_info, field_fmt_54_54_11_11_set, field_fmt_54_54_11_11_get, NULL, 0}, - {"CPU_VFP",1, field_fmt_55_55_11_11_info, field_fmt_55_55_11_11_set, field_fmt_55_55_11_11_get, NULL, 0}, - {"MPLS_PROC_ERROR",1, field_fmt_56_58_11_11_info, field_fmt_56_58_11_11_set, field_fmt_56_58_11_11_get, bcm56998_a0_rx_reason_mpls_proc_error_names, 0}, - {"PBT_NONUC_PKT",1, field_fmt_59_59_11_11_info, field_fmt_59_59_11_11_set, field_fmt_59_59_11_11_get, NULL, 0}, - {"L3_NEXT_HOP",1, field_fmt_60_60_11_11_info, field_fmt_60_60_11_11_set, field_fmt_60_60_11_11_get, NULL, 0}, - {"MY_STATION",1, field_fmt_61_61_11_11_info, field_fmt_61_61_11_11_set, field_fmt_61_61_11_11_get, NULL, 0}, - {"TIME_SYNC",1, field_fmt_62_62_11_11_info, field_fmt_62_62_11_11_set, field_fmt_62_62_11_11_get, NULL, 0}, - {"TUNNEL_DECAP_ECN_ERROR",1, field_fmt_63_63_11_11_info, field_fmt_63_63_11_11_set, field_fmt_63_63_11_11_get, NULL, 0}, - {"BFD_SLOWPATH",1, field_fmt_64_64_10_10_info, field_fmt_64_64_10_10_set, field_fmt_64_64_10_10_get, NULL, 0}, - {"BFD_ERROR",1, field_fmt_65_65_10_10_info, field_fmt_65_65_10_10_set, field_fmt_65_65_10_10_get, NULL, 0}, - {"PACKET_TRACE_TO_CPU",1, field_fmt_66_66_10_10_info, field_fmt_66_66_10_10_set, field_fmt_66_66_10_10_get, NULL, 0}, - {"MPLS_UNKNOWN_CONTROL_PKT",1, field_fmt_67_67_10_10_info, field_fmt_67_67_10_10_set, field_fmt_67_67_10_10_get, NULL, 0}, - {"MPLS_ALERT_LABEL",1, field_fmt_68_68_10_10_info, field_fmt_68_68_10_10_set, field_fmt_68_68_10_10_get, NULL, 0}, - {"CPU_IPMC_INTERFACE_MISMATCH",1, field_fmt_69_69_10_10_info, field_fmt_69_69_10_10_set, field_fmt_69_69_10_10_get, NULL, 0}, - {"DLB_MONITOR",1, field_fmt_70_70_10_10_info, field_fmt_70_70_10_10_set, field_fmt_70_70_10_10_get, NULL, 0}, - {"INT_TURN_AROUND",1, field_fmt_71_71_10_10_info, field_fmt_71_71_10_10_set, field_fmt_71_71_10_10_get, NULL, 0}, - {"ETRAP_MONITOR",1, field_fmt_72_72_10_10_info, field_fmt_72_72_10_10_set, field_fmt_72_72_10_10_get, NULL, 0}, - {"SRV6_ERROR",1, field_fmt_73_73_10_10_info, field_fmt_73_73_10_10_set, field_fmt_73_73_10_10_get, NULL, 0}, - {"VXLAN_VN_ID_MISS",1, field_fmt_74_74_10_10_info, field_fmt_74_74_10_10_set, field_fmt_74_74_10_10_get, NULL, 0}, - {"VXLAN_SIP_MISS",1, field_fmt_75_75_10_10_info, field_fmt_75_75_10_10_set, field_fmt_75_75_10_10_get, NULL, 0}, - {"ADAPT_MISS",1, field_fmt_76_76_10_10_info, field_fmt_76_76_10_10_set, field_fmt_76_76_10_10_get, NULL, 0}, - {"NH_PROTO_STATUS_DOWN",1, field_fmt_77_77_10_10_info, field_fmt_77_77_10_10_set, field_fmt_77_77_10_10_get, NULL, 0}, + {1, field_fmt_32_32_11_11_info, field_fmt_32_32_11_11_set, field_fmt_32_32_11_11_get, NULL, 0}, + {1, field_fmt_33_33_11_11_info, field_fmt_33_33_11_11_set, field_fmt_33_33_11_11_get, NULL, 0}, + {1, field_fmt_34_34_11_11_info, field_fmt_34_34_11_11_set, field_fmt_34_34_11_11_get, NULL, 0}, + {1, field_fmt_35_35_11_11_info, field_fmt_35_35_11_11_set, field_fmt_35_35_11_11_get, NULL, 0}, + {1, field_fmt_36_36_11_11_info, field_fmt_36_36_11_11_set, field_fmt_36_36_11_11_get, NULL, 0}, + {1, field_fmt_37_37_11_11_info, field_fmt_37_37_11_11_set, field_fmt_37_37_11_11_get, NULL, 0}, + {1, field_fmt_38_38_11_11_info, field_fmt_38_38_11_11_set, field_fmt_38_38_11_11_get, NULL, 0}, + {1, field_fmt_39_39_11_11_info, field_fmt_39_39_11_11_set, field_fmt_39_39_11_11_get, NULL, 0}, + {1, field_fmt_40_40_11_11_info, field_fmt_40_40_11_11_set, field_fmt_40_40_11_11_get, NULL, 0}, + {1, field_fmt_41_41_11_11_info, field_fmt_41_41_11_11_set, field_fmt_41_41_11_11_get, NULL, 0}, + {1, field_fmt_42_42_11_11_info, field_fmt_42_42_11_11_set, field_fmt_42_42_11_11_get, NULL, 0}, + {1, field_fmt_43_43_11_11_info, field_fmt_43_43_11_11_set, field_fmt_43_43_11_11_get, NULL, 0}, + {1, field_fmt_44_44_11_11_info, field_fmt_44_44_11_11_set, field_fmt_44_44_11_11_get, NULL, 0}, + {1, field_fmt_45_45_11_11_info, field_fmt_45_45_11_11_set, field_fmt_45_45_11_11_get, NULL, 0}, + {1, field_fmt_46_46_11_11_info, field_fmt_46_46_11_11_set, field_fmt_46_46_11_11_get, NULL, 0}, + {1, field_fmt_47_47_11_11_info, field_fmt_47_47_11_11_set, field_fmt_47_47_11_11_get, NULL, 0}, + {1, field_fmt_48_49_11_11_info, field_fmt_48_49_11_11_set, field_fmt_48_49_11_11_get, bcm56998_a0_rx_reason_cpu_sflow_names, 0}, + {1, field_fmt_50_50_11_11_info, field_fmt_50_50_11_11_set, field_fmt_50_50_11_11_get, NULL, 0}, + {1, field_fmt_51_51_11_11_info, field_fmt_51_51_11_11_set, field_fmt_51_51_11_11_get, NULL, 0}, + {1, field_fmt_52_52_11_11_info, field_fmt_52_52_11_11_set, field_fmt_52_52_11_11_get, NULL, 0}, + {1, field_fmt_53_53_11_11_info, field_fmt_53_53_11_11_set, field_fmt_53_53_11_11_get, NULL, 0}, + {1, field_fmt_54_54_11_11_info, field_fmt_54_54_11_11_set, field_fmt_54_54_11_11_get, NULL, 0}, + {1, field_fmt_55_55_11_11_info, field_fmt_55_55_11_11_set, field_fmt_55_55_11_11_get, NULL, 0}, + {1, field_fmt_56_58_11_11_info, field_fmt_56_58_11_11_set, field_fmt_56_58_11_11_get, bcm56998_a0_rx_reason_mpls_proc_error_names, 0}, + {1, field_fmt_59_59_11_11_info, field_fmt_59_59_11_11_set, field_fmt_59_59_11_11_get, NULL, 0}, + {1, field_fmt_60_60_11_11_info, field_fmt_60_60_11_11_set, field_fmt_60_60_11_11_get, NULL, 0}, + {1, field_fmt_61_61_11_11_info, field_fmt_61_61_11_11_set, field_fmt_61_61_11_11_get, NULL, 0}, + {1, field_fmt_62_62_11_11_info, field_fmt_62_62_11_11_set, field_fmt_62_62_11_11_get, NULL, 0}, + {1, field_fmt_63_63_11_11_info, field_fmt_63_63_11_11_set, field_fmt_63_63_11_11_get, NULL, 0}, + {1, field_fmt_64_64_10_10_info, field_fmt_64_64_10_10_set, field_fmt_64_64_10_10_get, NULL, 0}, + {1, field_fmt_65_65_10_10_info, field_fmt_65_65_10_10_set, field_fmt_65_65_10_10_get, NULL, 0}, + {1, field_fmt_66_66_10_10_info, field_fmt_66_66_10_10_set, field_fmt_66_66_10_10_get, NULL, 0}, + {1, field_fmt_67_67_10_10_info, field_fmt_67_67_10_10_set, field_fmt_67_67_10_10_get, NULL, 0}, + {1, field_fmt_68_68_10_10_info, field_fmt_68_68_10_10_set, field_fmt_68_68_10_10_get, NULL, 0}, + {1, field_fmt_69_69_10_10_info, field_fmt_69_69_10_10_set, field_fmt_69_69_10_10_get, NULL, 0}, + {1, field_fmt_70_70_10_10_info, field_fmt_70_70_10_10_set, field_fmt_70_70_10_10_get, NULL, 0}, + {1, field_fmt_71_71_10_10_info, field_fmt_71_71_10_10_set, field_fmt_71_71_10_10_get, NULL, 0}, + {1, field_fmt_72_72_10_10_info, field_fmt_72_72_10_10_set, field_fmt_72_72_10_10_get, NULL, 0}, + {1, field_fmt_73_73_10_10_info, field_fmt_73_73_10_10_set, field_fmt_73_73_10_10_get, NULL, 0}, + {1, field_fmt_74_74_10_10_info, field_fmt_74_74_10_10_set, field_fmt_74_74_10_10_get, NULL, 0}, + {1, field_fmt_75_75_10_10_info, field_fmt_75_75_10_10_set, field_fmt_75_75_10_10_get, NULL, 0}, + {1, field_fmt_76_76_10_10_info, field_fmt_76_76_10_10_set, field_fmt_76_76_10_10_get, NULL, 0}, + {1, field_fmt_77_77_10_10_info, field_fmt_77_77_10_10_set, field_fmt_77_77_10_10_get, NULL, 0}, }; @@ -3005,29 +3004,29 @@ static const shr_enum_map_t bcm56998_a0_txpmd_start_names[] = }; static bcmpkt_pmd_field_t bcm56998_a0_txpmd_fields[BCM56998_A0_TXPMD_COUNT] = { - {"CELL_LENGTH",1, field_fmt_0_7_3_3_info, field_fmt_0_7_3_3_set, field_fmt_0_7_3_3_get, NULL, 0}, - {"EOP",1, field_fmt_8_8_3_3_info, field_fmt_8_8_3_3_set, field_fmt_8_8_3_3_get, NULL, 0}, - {"SOP",1, field_fmt_9_9_3_3_info, field_fmt_9_9_3_3_set, field_fmt_9_9_3_3_get, NULL, 0}, - {"PKT_LENGTH",1, field_fmt_10_23_3_3_info, field_fmt_10_23_3_3_set, field_fmt_10_23_3_3_get, NULL, 0}, - {"IPCF_PTR",1, field_fmt_24_31_3_3_info, field_fmt_24_31_3_3_set, field_fmt_24_31_3_3_get, NULL, 0}, - {"SRC_MODID",1, field_fmt_32_39_2_2_info, field_fmt_32_39_2_2_set, field_fmt_32_39_2_2_get, NULL, 0}, - {"COS",1, field_fmt_40_45_2_2_info, field_fmt_40_45_2_2_set, field_fmt_40_45_2_2_get, NULL, 0}, - {"UNICAST",1, field_fmt_46_46_2_2_info, field_fmt_46_46_2_2_set, field_fmt_46_46_2_2_get, NULL, 0}, - {"SET_L2BM",1, field_fmt_47_47_2_2_info, field_fmt_47_47_2_2_set, field_fmt_47_47_2_2_get, NULL, 0}, - {"RQE_Q_NUM",1, field_fmt_48_51_2_2_info, field_fmt_48_51_2_2_set, field_fmt_48_51_2_2_get, NULL, 0}, - {"SPAP",1, field_fmt_52_53_2_2_info, field_fmt_52_53_2_2_set, field_fmt_52_53_2_2_get, NULL, 0}, - {"SPID",1, field_fmt_54_55_2_2_info, field_fmt_54_55_2_2_set, field_fmt_54_55_2_2_get, NULL, 0}, - {"SPID_OVERRIDE",1, field_fmt_56_56_2_2_info, field_fmt_56_56_2_2_set, field_fmt_56_56_2_2_get, NULL, 0}, - {"INPUT_PRI",1, field_fmt_57_60_2_2_info, field_fmt_57_60_2_2_set, field_fmt_57_60_2_2_get, NULL, 0}, - {"LOCAL_DEST_PORT",1, field_fmt_63_71_2_1_info, field_fmt_63_71_2_1_set, field_fmt_63_71_2_1_get, NULL, 0}, - {"IEEE1588_TIMESTAMP_HDR_OFFSET",1, field_fmt_72_79_1_1_info, field_fmt_72_79_1_1_set, field_fmt_72_79_1_1_get, NULL, 0}, - {"TX_TS",1, field_fmt_80_80_1_1_info, field_fmt_80_80_1_1_set, field_fmt_80_80_1_1_get, NULL, 0}, - {"IEEE1588_INGRESS_TIMESTAMP_SIGN",1, field_fmt_81_81_1_1_info, field_fmt_81_81_1_1_set, field_fmt_81_81_1_1_get, NULL, 0}, - {"IEEE1588_REGEN_UDP_CHECKSUM",1, field_fmt_82_82_1_1_info, field_fmt_82_82_1_1_set, field_fmt_82_82_1_1_get, NULL, 0}, - {"IEEE1588_ONE_STEP_ENABLE",1, field_fmt_83_83_1_1_info, field_fmt_83_83_1_1_set, field_fmt_83_83_1_1_get, NULL, 0}, - {"CELL_ERROR",1, field_fmt_84_84_1_1_info, field_fmt_84_84_1_1_set, field_fmt_84_84_1_1_get, NULL, 0}, - {"HEADER_TYPE",1, field_fmt_120_125_0_0_info, field_fmt_120_125_0_0_set, field_fmt_120_125_0_0_get, bcm56998_a0_txpmd_header_type_names, 0}, - {"START",1, field_fmt_126_127_0_0_info, field_fmt_126_127_0_0_set, field_fmt_126_127_0_0_get, bcm56998_a0_txpmd_start_names, 0}, + {1, field_fmt_0_7_3_3_info, field_fmt_0_7_3_3_set, field_fmt_0_7_3_3_get, NULL, 0}, + {1, field_fmt_8_8_3_3_info, field_fmt_8_8_3_3_set, field_fmt_8_8_3_3_get, NULL, 0}, + {1, field_fmt_9_9_3_3_info, field_fmt_9_9_3_3_set, field_fmt_9_9_3_3_get, NULL, 0}, + {1, field_fmt_10_23_3_3_info, field_fmt_10_23_3_3_set, field_fmt_10_23_3_3_get, NULL, 0}, + {1, field_fmt_24_31_3_3_info, field_fmt_24_31_3_3_set, field_fmt_24_31_3_3_get, NULL, 0}, + {1, field_fmt_32_39_2_2_info, field_fmt_32_39_2_2_set, field_fmt_32_39_2_2_get, NULL, 0}, + {1, field_fmt_40_45_2_2_info, field_fmt_40_45_2_2_set, field_fmt_40_45_2_2_get, NULL, 0}, + {1, field_fmt_46_46_2_2_info, field_fmt_46_46_2_2_set, field_fmt_46_46_2_2_get, NULL, 0}, + {1, field_fmt_47_47_2_2_info, field_fmt_47_47_2_2_set, field_fmt_47_47_2_2_get, NULL, 0}, + {1, field_fmt_48_51_2_2_info, field_fmt_48_51_2_2_set, field_fmt_48_51_2_2_get, NULL, 0}, + {1, field_fmt_52_53_2_2_info, field_fmt_52_53_2_2_set, field_fmt_52_53_2_2_get, NULL, 0}, + {1, field_fmt_54_55_2_2_info, field_fmt_54_55_2_2_set, field_fmt_54_55_2_2_get, NULL, 0}, + {1, field_fmt_56_56_2_2_info, field_fmt_56_56_2_2_set, field_fmt_56_56_2_2_get, NULL, 0}, + {1, field_fmt_57_60_2_2_info, field_fmt_57_60_2_2_set, field_fmt_57_60_2_2_get, NULL, 0}, + {1, field_fmt_63_71_2_1_info, field_fmt_63_71_2_1_set, field_fmt_63_71_2_1_get, NULL, 0}, + {1, field_fmt_72_79_1_1_info, field_fmt_72_79_1_1_set, field_fmt_72_79_1_1_get, NULL, 0}, + {1, field_fmt_80_80_1_1_info, field_fmt_80_80_1_1_set, field_fmt_80_80_1_1_get, NULL, 0}, + {1, field_fmt_81_81_1_1_info, field_fmt_81_81_1_1_set, field_fmt_81_81_1_1_get, NULL, 0}, + {1, field_fmt_82_82_1_1_info, field_fmt_82_82_1_1_set, field_fmt_82_82_1_1_get, NULL, 0}, + {1, field_fmt_83_83_1_1_info, field_fmt_83_83_1_1_set, field_fmt_83_83_1_1_get, NULL, 0}, + {1, field_fmt_84_84_1_1_info, field_fmt_84_84_1_1_set, field_fmt_84_84_1_1_get, NULL, 0}, + {1, field_fmt_120_125_0_0_info, field_fmt_120_125_0_0_set, field_fmt_120_125_0_0_get, bcm56998_a0_txpmd_header_type_names, 0}, + {1, field_fmt_126_127_0_0_info, field_fmt_126_127_0_0_set, field_fmt_126_127_0_0_get, bcm56998_a0_txpmd_start_names, 0}, }; @@ -3058,31 +3057,31 @@ static const shr_enum_map_t bcm56998_a0_lbhdr_header_type_names[] = }; static bcmpkt_pmd_field_t bcm56998_a0_lbhdr_fields[BCM56998_A0_LBHDR_COUNT] = { - {"ETHERNET::PP_PORT",1, field_fmt_0_8_3_3_info, field_fmt_0_8_3_3_set, field_fmt_0_8_3_3_get, NULL, 3}, - {"ETHERNET::SUBFLOW_TYPE",1, field_fmt_9_10_3_3_info, field_fmt_9_10_3_3_set, field_fmt_9_10_3_3_get, bcm56998_a0_lbhdr_ethernet_subflow_type_names, 3}, - {"ETHERNET::DESTINATION_TYPE",1, field_fmt_11_14_3_3_info, field_fmt_11_14_3_3_set, field_fmt_11_14_3_3_get, bcm56998_a0_lbhdr_ethernet_destination_type_names, 3}, - {"ETHERNET::DESTINATION",1, field_fmt_15_30_3_3_info, field_fmt_15_30_3_3_set, field_fmt_15_30_3_3_get, NULL, 3}, - {"ETHERNET::ROUTED_PKT",1, field_fmt_31_31_3_3_info, field_fmt_31_31_3_3_set, field_fmt_31_31_3_3_get, NULL, 3}, - {"ETHERNET::QOS_FIELDS_VLD",1, field_fmt_32_32_2_2_info, field_fmt_32_32_2_2_set, field_fmt_32_32_2_2_get, NULL, 3}, - {"ETHERNET::INT_CN",1, field_fmt_33_34_2_2_info, field_fmt_33_34_2_2_set, field_fmt_33_34_2_2_get, NULL, 3}, - {"ETHERNET::INT_PRI",1, field_fmt_35_38_2_2_info, field_fmt_35_38_2_2_set, field_fmt_35_38_2_2_get, NULL, 3}, - {"ETHERNET::DP",1, field_fmt_39_40_2_2_info, field_fmt_39_40_2_2_set, field_fmt_39_40_2_2_get, NULL, 3}, - {"ETHERNET::ECMP_MEMBER_ID",1, field_fmt_41_54_2_2_info, field_fmt_41_54_2_2_set, field_fmt_41_54_2_2_get, NULL, 3}, - {"ETHERNET::VRF",1, field_fmt_55_67_2_1_info, field_fmt_55_67_2_1_set, field_fmt_55_67_2_1_get, NULL, 3}, - {"ETHERNET::VRF_VALID",1, field_fmt_68_68_1_1_info, field_fmt_68_68_1_1_set, field_fmt_68_68_1_1_get, NULL, 3}, - {"ETHERNET::MCAST_LB_INDEX",1, field_fmt_70_77_1_1_info, field_fmt_70_77_1_1_set, field_fmt_70_77_1_1_get, NULL, 3}, - {"ETHERNET::MCAST_LB_INDEX_VLD",1, field_fmt_78_78_1_1_info, field_fmt_78_78_1_1_set, field_fmt_78_78_1_1_get, NULL, 3}, - {"TRILL_ACCESS_NONUC::TC",1, field_fmt_0_3_3_3_info, field_fmt_0_3_3_3_set, field_fmt_0_3_3_3_get, NULL, 2}, - {"TRILL_ACCESS_NONUC::CNG",1, field_fmt_4_5_3_3_info, field_fmt_4_5_3_3_set, field_fmt_4_5_3_3_get, NULL, 2}, - {"TRILL_NETWORK_NONUC::TC",1, field_fmt_0_3_3_3_info, field_fmt_0_3_3_3_set, field_fmt_0_3_3_3_get, NULL, 1}, - {"TRILL_NETWORK_NONUC::CNG",1, field_fmt_4_5_3_3_info, field_fmt_4_5_3_3_set, field_fmt_4_5_3_3_get, NULL, 1}, - {"PKT_PROFILE",1, field_fmt_90_92_1_1_info, field_fmt_90_92_1_1_set, field_fmt_90_92_1_1_get, NULL, 0}, - {"VISIBILITY_PKT",1, field_fmt_93_93_1_1_info, field_fmt_93_93_1_1_set, field_fmt_93_93_1_1_get, NULL, 0}, - {"SOURCE",1, field_fmt_94_109_1_0_info, field_fmt_94_109_1_0_set, field_fmt_94_109_1_0_get, NULL, 0}, - {"SOURCE_TYPE",1, field_fmt_110_110_0_0_info, field_fmt_110_110_0_0_set, field_fmt_110_110_0_0_get, NULL, 0}, - {"HEADER_TYPE",1, field_fmt_111_115_0_0_info, field_fmt_111_115_0_0_set, field_fmt_111_115_0_0_get, bcm56998_a0_lbhdr_header_type_names, 0}, - {"INPUT_PRIORITY",1, field_fmt_116_119_0_0_info, field_fmt_116_119_0_0_set, field_fmt_116_119_0_0_get, NULL, 0}, - {"START",1, field_fmt_120_127_0_0_info, field_fmt_120_127_0_0_set, field_fmt_120_127_0_0_get, NULL, 0}, + {1, field_fmt_0_8_3_3_info, field_fmt_0_8_3_3_set, field_fmt_0_8_3_3_get, NULL, 3}, + {1, field_fmt_9_10_3_3_info, field_fmt_9_10_3_3_set, field_fmt_9_10_3_3_get, bcm56998_a0_lbhdr_ethernet_subflow_type_names, 3}, + {1, field_fmt_11_14_3_3_info, field_fmt_11_14_3_3_set, field_fmt_11_14_3_3_get, bcm56998_a0_lbhdr_ethernet_destination_type_names, 3}, + {1, field_fmt_15_30_3_3_info, field_fmt_15_30_3_3_set, field_fmt_15_30_3_3_get, NULL, 3}, + {1, field_fmt_31_31_3_3_info, field_fmt_31_31_3_3_set, field_fmt_31_31_3_3_get, NULL, 3}, + {1, field_fmt_32_32_2_2_info, field_fmt_32_32_2_2_set, field_fmt_32_32_2_2_get, NULL, 3}, + {1, field_fmt_33_34_2_2_info, field_fmt_33_34_2_2_set, field_fmt_33_34_2_2_get, NULL, 3}, + {1, field_fmt_35_38_2_2_info, field_fmt_35_38_2_2_set, field_fmt_35_38_2_2_get, NULL, 3}, + {1, field_fmt_39_40_2_2_info, field_fmt_39_40_2_2_set, field_fmt_39_40_2_2_get, NULL, 3}, + {1, field_fmt_41_54_2_2_info, field_fmt_41_54_2_2_set, field_fmt_41_54_2_2_get, NULL, 3}, + {1, field_fmt_55_67_2_1_info, field_fmt_55_67_2_1_set, field_fmt_55_67_2_1_get, NULL, 3}, + {1, field_fmt_68_68_1_1_info, field_fmt_68_68_1_1_set, field_fmt_68_68_1_1_get, NULL, 3}, + {1, field_fmt_70_77_1_1_info, field_fmt_70_77_1_1_set, field_fmt_70_77_1_1_get, NULL, 3}, + {1, field_fmt_78_78_1_1_info, field_fmt_78_78_1_1_set, field_fmt_78_78_1_1_get, NULL, 3}, + {1, field_fmt_0_3_3_3_info, field_fmt_0_3_3_3_set, field_fmt_0_3_3_3_get, NULL, 2}, + {1, field_fmt_4_5_3_3_info, field_fmt_4_5_3_3_set, field_fmt_4_5_3_3_get, NULL, 2}, + {1, field_fmt_0_3_3_3_info, field_fmt_0_3_3_3_set, field_fmt_0_3_3_3_get, NULL, 1}, + {1, field_fmt_4_5_3_3_info, field_fmt_4_5_3_3_set, field_fmt_4_5_3_3_get, NULL, 1}, + {1, field_fmt_90_92_1_1_info, field_fmt_90_92_1_1_set, field_fmt_90_92_1_1_get, NULL, 0}, + {1, field_fmt_93_93_1_1_info, field_fmt_93_93_1_1_set, field_fmt_93_93_1_1_get, NULL, 0}, + {1, field_fmt_94_109_1_0_info, field_fmt_94_109_1_0_set, field_fmt_94_109_1_0_get, NULL, 0}, + {1, field_fmt_110_110_0_0_info, field_fmt_110_110_0_0_set, field_fmt_110_110_0_0_get, NULL, 0}, + {1, field_fmt_111_115_0_0_info, field_fmt_111_115_0_0_set, field_fmt_111_115_0_0_get, bcm56998_a0_lbhdr_header_type_names, 0}, + {1, field_fmt_116_119_0_0_info, field_fmt_116_119_0_0_set, field_fmt_116_119_0_0_get, NULL, 0}, + {1, field_fmt_120_127_0_0_info, field_fmt_120_127_0_0_set, field_fmt_120_127_0_0_get, NULL, 0}, }; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pkt_lbhdr.c similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pkt_lbhdr.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pkt_lbhdr.c index 017c2fd4fdd..f085fab81a2 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pkt_lbhdr.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pkt_lbhdr.c @@ -5,8 +5,7 @@ * Edits to this file will be lost when it is regenerated. * Tool: INTERNAL/regs/xgs/generate-pmd.pl * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pkt_rxpmd.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pkt_rxpmd.c similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pkt_rxpmd.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pkt_rxpmd.c index 6efddb717da..fdd431831ff 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pkt_rxpmd.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pkt_rxpmd.c @@ -5,8 +5,7 @@ * Edits to this file will be lost when it is regenerated. * Tool: INTERNAL/regs/xgs/generate-pmd.pl * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -981,8 +980,6 @@ const bcmpkt_rxpmd_fget_t bcm56999_a0_rxpmd_fget = { NULL, NULL, NULL, - NULL, - NULL, NULL } }; @@ -1088,8 +1085,6 @@ const bcmpkt_rxpmd_fset_t bcm56999_a0_rxpmd_fset = { NULL, NULL, NULL, - NULL, - NULL, NULL } }; @@ -1116,7 +1111,7 @@ static int bcm56999_a0_rxpmd_view_infos[BCMPKT_RXPMD_FID_COUNT] = { -1, -1, -1, -1, -1, -1, -1, -2, -1, -1, -1, -1, -1, -2, -2, -2, -2, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -2, -2, -2, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, - -2, -2, -2, -2, -2, + -2, -2, -2, }; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pkt_txpmd.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pkt_txpmd.c similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pkt_txpmd.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pkt_txpmd.c index 2e11cc72154..6ff890582d3 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pkt_txpmd.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pkt_txpmd.c @@ -5,8 +5,7 @@ * Edits to this file will be lost when it is regenerated. * Tool: INTERNAL/regs/xgs/generate-pmd.pl * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -450,7 +449,6 @@ const bcmpkt_txpmd_fget_t bcm56999_a0_txpmd_fget = { NULL, NULL, NULL, - NULL, NULL } }; @@ -586,7 +584,6 @@ const bcmpkt_txpmd_fset_t bcm56999_a0_txpmd_fset = { NULL, NULL, NULL, - NULL, NULL } }; @@ -612,7 +609,7 @@ static int bcm56999_a0_txpmd_view_infos[BCMPKT_TXPMD_FID_COUNT] = { -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, - -2, -2, + -2, }; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pmd_field.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pmd_field.c similarity index 77% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pmd_field.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pmd_field.c index c1c54e481ef..318177e9982 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pmd_field.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pmd_field.c @@ -5,8 +5,7 @@ * Edits to this file will be lost when it is regenerated. * Tool: INTERNAL/regs/xgs/generate-pmd.pl * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -2796,51 +2795,51 @@ static const shr_enum_map_t bcm56999_a0_rxpmd_timestamp_type_names[] = }; static bcmpkt_pmd_field_t bcm56999_a0_rxpmd_fields[BCM56999_A0_RXPMD_COUNT] = { - {"ING_L3_INTF",1, field_fmt_0_12_12_12_info, field_fmt_0_12_12_12_set, field_fmt_0_12_12_12_get, NULL, 0}, - {"I2E_CLASSID",1, field_fmt_0_11_12_12_info, field_fmt_0_11_12_12_set, field_fmt_0_11_12_12_get, NULL, 0}, - {"RX_BFD_SESSION_INDEX",1, field_fmt_0_11_12_12_info, field_fmt_0_11_12_12_set, field_fmt_0_11_12_12_get, NULL, 0}, - {"I2E_CLASSID_TYPE",1, field_fmt_12_15_12_12_info, field_fmt_12_15_12_12_set, field_fmt_12_15_12_12_get, NULL, 0}, - {"RX_BFD_START_OFFSET_TYPE",1, field_fmt_12_13_12_12_info, field_fmt_12_13_12_12_set, field_fmt_12_13_12_12_get, NULL, 0}, - {"RX_BFD_START_OFFSET",1, field_fmt_14_21_12_12_info, field_fmt_14_21_12_12_set, field_fmt_14_21_12_12_get, NULL, 0}, - {"ING_L3_INTF_VALID",1, field_fmt_16_16_12_12_info, field_fmt_16_16_12_12_set, field_fmt_16_16_12_12_get, NULL, 0}, - {"CPU_COS",1, field_fmt_22_27_12_12_info, field_fmt_22_27_12_12_set, field_fmt_22_27_12_12_get, NULL, 0}, - {"QUEUE_NUM",1, field_fmt_22_27_12_12_info, field_fmt_22_27_12_12_set, field_fmt_22_27_12_12_get, NULL, 0}, - {"BPDU",1, field_fmt_28_28_12_12_info, field_fmt_28_28_12_12_set, field_fmt_28_28_12_12_get, NULL, 0}, - {"CHANGE_DSCP",1, field_fmt_29_29_12_12_info, field_fmt_29_29_12_12_set, field_fmt_29_29_12_12_get, NULL, 0}, - {"CHANGE_ECN",1, field_fmt_30_30_12_12_info, field_fmt_30_30_12_12_set, field_fmt_30_30_12_12_get, NULL, 0}, - {"DLB_ID_VALID",1, field_fmt_31_31_12_12_info, field_fmt_31_31_12_12_set, field_fmt_31_31_12_12_get, NULL, 0}, - {"REASON",2, field_fmt_32_95_11_10_info, field_fmt_32_95_11_10_set, field_fmt_32_95_11_10_get, NULL, 0}, - {"REASON_TYPE",1, field_fmt_96_99_9_9_info, field_fmt_96_99_9_9_set, field_fmt_96_99_9_9_get, NULL, 0}, - {"DO_NOT_CHANGE_TTL",1, field_fmt_100_100_9_9_info, field_fmt_100_100_9_9_set, field_fmt_100_100_9_9_get, NULL, 0}, - {"DSCP",1, field_fmt_101_106_9_9_info, field_fmt_101_106_9_9_set, field_fmt_101_106_9_9_get, NULL, 0}, - {"SPECIAL_PACKET_TYPE",1, field_fmt_101_103_9_9_info, field_fmt_101_103_9_9_set, field_fmt_101_103_9_9_get, NULL, 0}, - {"ECN",1, field_fmt_107_108_9_9_info, field_fmt_107_108_9_9_set, field_fmt_107_108_9_9_get, NULL, 0}, - {"INCOMING_TAG_STATUS",1, field_fmt_109_110_9_9_info, field_fmt_109_110_9_9_set, field_fmt_109_110_9_9_get, NULL, 0}, - {"O_NHI",1, field_fmt_111_125_9_9_info, field_fmt_111_125_9_9_set, field_fmt_111_125_9_9_get, NULL, 0}, - {"ING_OTAG_ACTION",1, field_fmt_126_127_9_9_info, field_fmt_126_127_9_9_set, field_fmt_126_127_9_9_get, NULL, 0}, - {"IP_ROUTED",1, field_fmt_129_129_8_8_info, field_fmt_129_129_8_8_set, field_fmt_129_129_8_8_get, NULL, 0}, - {"L3ONLY",1, field_fmt_130_130_8_8_info, field_fmt_130_130_8_8_set, field_fmt_130_130_8_8_get, NULL, 0}, - {"MATCHED_RULE",1, field_fmt_131_138_8_8_info, field_fmt_131_138_8_8_set, field_fmt_131_138_8_8_get, NULL, 0}, - {"MTP_INDEX",1, field_fmt_139_141_8_8_info, field_fmt_139_141_8_8_set, field_fmt_139_141_8_8_get, NULL, 0}, - {"OUTER_CFI",1, field_fmt_142_142_8_8_info, field_fmt_142_142_8_8_set, field_fmt_142_142_8_8_get, NULL, 0}, - {"OUTER_PRI",1, field_fmt_143_145_8_8_info, field_fmt_143_145_8_8_set, field_fmt_143_145_8_8_get, NULL, 0}, - {"OUTER_VID",1, field_fmt_146_157_8_8_info, field_fmt_146_157_8_8_set, field_fmt_146_157_8_8_get, NULL, 0}, - {"INCOMING_INT_HDR_TYPE",1, field_fmt_158_159_8_8_info, field_fmt_158_159_8_8_set, field_fmt_158_159_8_8_get, NULL, 0}, - {"PKT_LENGTH",1, field_fmt_160_173_7_7_info, field_fmt_160_173_7_7_set, field_fmt_160_173_7_7_get, NULL, 0}, - {"REGEN_CRC",1, field_fmt_174_174_7_7_info, field_fmt_174_174_7_7_set, field_fmt_174_174_7_7_get, NULL, 0}, - {"REPLICATION_OR_NHOP_INDEX",1, field_fmt_175_191_7_7_info, field_fmt_175_191_7_7_set, field_fmt_175_191_7_7_get, NULL, 0}, - {"ENTROPY_LABEL",1, field_fmt_193_212_6_6_info, field_fmt_193_212_6_6_set, field_fmt_193_212_6_6_get, NULL, 0}, - {"SPECIAL_PACKET_INDICATOR",1, field_fmt_213_213_6_6_info, field_fmt_213_213_6_6_set, field_fmt_213_213_6_6_get, NULL, 0}, - {"SRC_PORT_NUM",1, field_fmt_214_222_6_6_info, field_fmt_214_222_6_6_set, field_fmt_214_222_6_6_get, NULL, 0}, - {"SWITCH",1, field_fmt_223_223_6_6_info, field_fmt_223_223_6_6_set, field_fmt_223_223_6_6_get, NULL, 0}, - {"TIMESTAMP",1, field_fmt_224_255_5_5_info, field_fmt_224_255_5_5_set, field_fmt_224_255_5_5_get, NULL, 0}, - {"TIMESTAMP_HI",1, field_fmt_256_271_4_4_info, field_fmt_256_271_4_4_set, field_fmt_256_271_4_4_get, NULL, 0}, - {"TIMESTAMP_TYPE",1, field_fmt_272_273_4_4_info, field_fmt_272_273_4_4_set, field_fmt_272_273_4_4_get, bcm56999_a0_rxpmd_timestamp_type_names, 0}, - {"TUNNEL_DECAP_TYPE",1, field_fmt_274_278_4_4_info, field_fmt_274_278_4_4_set, field_fmt_274_278_4_4_get, NULL, 0}, - {"UC_SW_COPY_DROPPED",1, field_fmt_279_279_4_4_info, field_fmt_279_279_4_4_set, field_fmt_279_279_4_4_get, NULL, 0}, - {"UNICAST_QUEUE",1, field_fmt_280_280_4_4_info, field_fmt_280_280_4_4_set, field_fmt_280_280_4_4_get, NULL, 0}, - {"DLB_ID",1, field_fmt_281_287_4_4_info, field_fmt_281_287_4_4_set, field_fmt_281_287_4_4_get, NULL, 0}, - {"MODULE_HDR",4, field_fmt_288_415_3_0_info, field_fmt_288_415_3_0_set, field_fmt_288_415_3_0_get, NULL, 0}, + {1, field_fmt_0_12_12_12_info, field_fmt_0_12_12_12_set, field_fmt_0_12_12_12_get, NULL, 0}, + {1, field_fmt_0_11_12_12_info, field_fmt_0_11_12_12_set, field_fmt_0_11_12_12_get, NULL, 0}, + {1, field_fmt_0_11_12_12_info, field_fmt_0_11_12_12_set, field_fmt_0_11_12_12_get, NULL, 0}, + {1, field_fmt_12_15_12_12_info, field_fmt_12_15_12_12_set, field_fmt_12_15_12_12_get, NULL, 0}, + {1, field_fmt_12_13_12_12_info, field_fmt_12_13_12_12_set, field_fmt_12_13_12_12_get, NULL, 0}, + {1, field_fmt_14_21_12_12_info, field_fmt_14_21_12_12_set, field_fmt_14_21_12_12_get, NULL, 0}, + {1, field_fmt_16_16_12_12_info, field_fmt_16_16_12_12_set, field_fmt_16_16_12_12_get, NULL, 0}, + {1, field_fmt_22_27_12_12_info, field_fmt_22_27_12_12_set, field_fmt_22_27_12_12_get, NULL, 0}, + {1, field_fmt_22_27_12_12_info, field_fmt_22_27_12_12_set, field_fmt_22_27_12_12_get, NULL, 0}, + {1, field_fmt_28_28_12_12_info, field_fmt_28_28_12_12_set, field_fmt_28_28_12_12_get, NULL, 0}, + {1, field_fmt_29_29_12_12_info, field_fmt_29_29_12_12_set, field_fmt_29_29_12_12_get, NULL, 0}, + {1, field_fmt_30_30_12_12_info, field_fmt_30_30_12_12_set, field_fmt_30_30_12_12_get, NULL, 0}, + {1, field_fmt_31_31_12_12_info, field_fmt_31_31_12_12_set, field_fmt_31_31_12_12_get, NULL, 0}, + {2, field_fmt_32_95_11_10_info, field_fmt_32_95_11_10_set, field_fmt_32_95_11_10_get, NULL, 0}, + {1, field_fmt_96_99_9_9_info, field_fmt_96_99_9_9_set, field_fmt_96_99_9_9_get, NULL, 0}, + {1, field_fmt_100_100_9_9_info, field_fmt_100_100_9_9_set, field_fmt_100_100_9_9_get, NULL, 0}, + {1, field_fmt_101_106_9_9_info, field_fmt_101_106_9_9_set, field_fmt_101_106_9_9_get, NULL, 0}, + {1, field_fmt_101_103_9_9_info, field_fmt_101_103_9_9_set, field_fmt_101_103_9_9_get, NULL, 0}, + {1, field_fmt_107_108_9_9_info, field_fmt_107_108_9_9_set, field_fmt_107_108_9_9_get, NULL, 0}, + {1, field_fmt_109_110_9_9_info, field_fmt_109_110_9_9_set, field_fmt_109_110_9_9_get, NULL, 0}, + {1, field_fmt_111_125_9_9_info, field_fmt_111_125_9_9_set, field_fmt_111_125_9_9_get, NULL, 0}, + {1, field_fmt_126_127_9_9_info, field_fmt_126_127_9_9_set, field_fmt_126_127_9_9_get, NULL, 0}, + {1, field_fmt_129_129_8_8_info, field_fmt_129_129_8_8_set, field_fmt_129_129_8_8_get, NULL, 0}, + {1, field_fmt_130_130_8_8_info, field_fmt_130_130_8_8_set, field_fmt_130_130_8_8_get, NULL, 0}, + {1, field_fmt_131_138_8_8_info, field_fmt_131_138_8_8_set, field_fmt_131_138_8_8_get, NULL, 0}, + {1, field_fmt_139_141_8_8_info, field_fmt_139_141_8_8_set, field_fmt_139_141_8_8_get, NULL, 0}, + {1, field_fmt_142_142_8_8_info, field_fmt_142_142_8_8_set, field_fmt_142_142_8_8_get, NULL, 0}, + {1, field_fmt_143_145_8_8_info, field_fmt_143_145_8_8_set, field_fmt_143_145_8_8_get, NULL, 0}, + {1, field_fmt_146_157_8_8_info, field_fmt_146_157_8_8_set, field_fmt_146_157_8_8_get, NULL, 0}, + {1, field_fmt_158_159_8_8_info, field_fmt_158_159_8_8_set, field_fmt_158_159_8_8_get, NULL, 0}, + {1, field_fmt_160_173_7_7_info, field_fmt_160_173_7_7_set, field_fmt_160_173_7_7_get, NULL, 0}, + {1, field_fmt_174_174_7_7_info, field_fmt_174_174_7_7_set, field_fmt_174_174_7_7_get, NULL, 0}, + {1, field_fmt_175_191_7_7_info, field_fmt_175_191_7_7_set, field_fmt_175_191_7_7_get, NULL, 0}, + {1, field_fmt_193_212_6_6_info, field_fmt_193_212_6_6_set, field_fmt_193_212_6_6_get, NULL, 0}, + {1, field_fmt_213_213_6_6_info, field_fmt_213_213_6_6_set, field_fmt_213_213_6_6_get, NULL, 0}, + {1, field_fmt_214_222_6_6_info, field_fmt_214_222_6_6_set, field_fmt_214_222_6_6_get, NULL, 0}, + {1, field_fmt_223_223_6_6_info, field_fmt_223_223_6_6_set, field_fmt_223_223_6_6_get, NULL, 0}, + {1, field_fmt_224_255_5_5_info, field_fmt_224_255_5_5_set, field_fmt_224_255_5_5_get, NULL, 0}, + {1, field_fmt_256_271_4_4_info, field_fmt_256_271_4_4_set, field_fmt_256_271_4_4_get, NULL, 0}, + {1, field_fmt_272_273_4_4_info, field_fmt_272_273_4_4_set, field_fmt_272_273_4_4_get, bcm56999_a0_rxpmd_timestamp_type_names, 0}, + {1, field_fmt_274_278_4_4_info, field_fmt_274_278_4_4_set, field_fmt_274_278_4_4_get, NULL, 0}, + {1, field_fmt_279_279_4_4_info, field_fmt_279_279_4_4_set, field_fmt_279_279_4_4_get, NULL, 0}, + {1, field_fmt_280_280_4_4_info, field_fmt_280_280_4_4_set, field_fmt_280_280_4_4_get, NULL, 0}, + {1, field_fmt_281_287_4_4_info, field_fmt_281_287_4_4_set, field_fmt_281_287_4_4_get, NULL, 0}, + {4, field_fmt_288_415_3_0_info, field_fmt_288_415_3_0_set, field_fmt_288_415_3_0_get, NULL, 0}, }; @@ -2866,48 +2865,48 @@ static const shr_enum_map_t bcm56999_a0_rx_reason_mpls_proc_error_names[] = }; static bcmpkt_pmd_field_t bcm56999_a0_rx_reason_fields[BCM56999_A0_RX_REASON_COUNT] = { - {"CPU_UVLAN",1, field_fmt_32_32_11_11_info, field_fmt_32_32_11_11_set, field_fmt_32_32_11_11_get, NULL, 0}, - {"CPU_SLF",1, field_fmt_33_33_11_11_info, field_fmt_33_33_11_11_set, field_fmt_33_33_11_11_get, NULL, 0}, - {"CPU_DLF",1, field_fmt_34_34_11_11_info, field_fmt_34_34_11_11_set, field_fmt_34_34_11_11_get, NULL, 0}, - {"CPU_L2MOVE",1, field_fmt_35_35_11_11_info, field_fmt_35_35_11_11_set, field_fmt_35_35_11_11_get, NULL, 0}, - {"CPU_L2CPU",1, field_fmt_36_36_11_11_info, field_fmt_36_36_11_11_set, field_fmt_36_36_11_11_get, NULL, 0}, - {"CPU_L3SRC_MISS",1, field_fmt_37_37_11_11_info, field_fmt_37_37_11_11_set, field_fmt_37_37_11_11_get, NULL, 0}, - {"CPU_L3DST_MISS",1, field_fmt_38_38_11_11_info, field_fmt_38_38_11_11_set, field_fmt_38_38_11_11_get, NULL, 0}, - {"CPU_L3SRC_MOVE",1, field_fmt_39_39_11_11_info, field_fmt_39_39_11_11_set, field_fmt_39_39_11_11_get, NULL, 0}, - {"CPU_MC_MISS",1, field_fmt_40_40_11_11_info, field_fmt_40_40_11_11_set, field_fmt_40_40_11_11_get, NULL, 0}, - {"CPU_IPMC_MISS",1, field_fmt_41_41_11_11_info, field_fmt_41_41_11_11_set, field_fmt_41_41_11_11_get, NULL, 0}, - {"CPU_FFP",1, field_fmt_42_42_11_11_info, field_fmt_42_42_11_11_set, field_fmt_42_42_11_11_get, NULL, 0}, - {"CPU_L3HDR_ERR",1, field_fmt_43_43_11_11_info, field_fmt_43_43_11_11_set, field_fmt_43_43_11_11_get, NULL, 0}, - {"CPU_PROTOCOL_PKT",1, field_fmt_44_44_11_11_info, field_fmt_44_44_11_11_set, field_fmt_44_44_11_11_get, NULL, 0}, - {"CPU_DOS_ATTACK",1, field_fmt_45_45_11_11_info, field_fmt_45_45_11_11_set, field_fmt_45_45_11_11_get, NULL, 0}, - {"CPU_MARTIAN_ADDR",1, field_fmt_46_46_11_11_info, field_fmt_46_46_11_11_set, field_fmt_46_46_11_11_get, NULL, 0}, - {"CPU_TUNNEL_ERR",1, field_fmt_47_47_11_11_info, field_fmt_47_47_11_11_set, field_fmt_47_47_11_11_get, NULL, 0}, - {"CPU_SFLOW",1, field_fmt_48_49_11_11_info, field_fmt_48_49_11_11_set, field_fmt_48_49_11_11_get, bcm56999_a0_rx_reason_cpu_sflow_names, 0}, - {"ICMP_REDIRECT",1, field_fmt_50_50_11_11_info, field_fmt_50_50_11_11_set, field_fmt_50_50_11_11_get, NULL, 0}, - {"L3_SLOWPATH",1, field_fmt_51_51_11_11_info, field_fmt_51_51_11_11_set, field_fmt_51_51_11_11_get, NULL, 0}, - {"PARITY_ERROR",1, field_fmt_52_52_11_11_info, field_fmt_52_52_11_11_set, field_fmt_52_52_11_11_get, NULL, 0}, - {"L3_MTU_CHECK_FAIL",1, field_fmt_53_53_11_11_info, field_fmt_53_53_11_11_set, field_fmt_53_53_11_11_get, NULL, 0}, - {"MCIDX_ERROR",1, field_fmt_54_54_11_11_info, field_fmt_54_54_11_11_set, field_fmt_54_54_11_11_get, NULL, 0}, - {"CPU_VFP",1, field_fmt_55_55_11_11_info, field_fmt_55_55_11_11_set, field_fmt_55_55_11_11_get, NULL, 0}, - {"MPLS_PROC_ERROR",1, field_fmt_56_58_11_11_info, field_fmt_56_58_11_11_set, field_fmt_56_58_11_11_get, bcm56999_a0_rx_reason_mpls_proc_error_names, 0}, - {"PBT_NONUC_PKT",1, field_fmt_59_59_11_11_info, field_fmt_59_59_11_11_set, field_fmt_59_59_11_11_get, NULL, 0}, - {"L3_NEXT_HOP",1, field_fmt_60_60_11_11_info, field_fmt_60_60_11_11_set, field_fmt_60_60_11_11_get, NULL, 0}, - {"MY_STATION",1, field_fmt_61_61_11_11_info, field_fmt_61_61_11_11_set, field_fmt_61_61_11_11_get, NULL, 0}, - {"TIME_SYNC",1, field_fmt_62_62_11_11_info, field_fmt_62_62_11_11_set, field_fmt_62_62_11_11_get, NULL, 0}, - {"TUNNEL_DECAP_ECN_ERROR",1, field_fmt_63_63_11_11_info, field_fmt_63_63_11_11_set, field_fmt_63_63_11_11_get, NULL, 0}, - {"BFD_SLOWPATH",1, field_fmt_64_64_10_10_info, field_fmt_64_64_10_10_set, field_fmt_64_64_10_10_get, NULL, 0}, - {"BFD_ERROR",1, field_fmt_65_65_10_10_info, field_fmt_65_65_10_10_set, field_fmt_65_65_10_10_get, NULL, 0}, - {"PACKET_TRACE_TO_CPU",1, field_fmt_66_66_10_10_info, field_fmt_66_66_10_10_set, field_fmt_66_66_10_10_get, NULL, 0}, - {"MPLS_UNKNOWN_CONTROL_PKT",1, field_fmt_67_67_10_10_info, field_fmt_67_67_10_10_set, field_fmt_67_67_10_10_get, NULL, 0}, - {"MPLS_ALERT_LABEL",1, field_fmt_68_68_10_10_info, field_fmt_68_68_10_10_set, field_fmt_68_68_10_10_get, NULL, 0}, - {"CPU_IPMC_INTERFACE_MISMATCH",1, field_fmt_69_69_10_10_info, field_fmt_69_69_10_10_set, field_fmt_69_69_10_10_get, NULL, 0}, - {"DLB_MONITOR",1, field_fmt_70_70_10_10_info, field_fmt_70_70_10_10_set, field_fmt_70_70_10_10_get, NULL, 0}, - {"INT_TURN_AROUND",1, field_fmt_71_71_10_10_info, field_fmt_71_71_10_10_set, field_fmt_71_71_10_10_get, NULL, 0}, - {"ETRAP_MONITOR",1, field_fmt_72_72_10_10_info, field_fmt_72_72_10_10_set, field_fmt_72_72_10_10_get, NULL, 0}, - {"SRV6_ERROR",1, field_fmt_73_73_10_10_info, field_fmt_73_73_10_10_set, field_fmt_73_73_10_10_get, NULL, 0}, - {"VXLAN_VN_ID_MISS",1, field_fmt_74_74_10_10_info, field_fmt_74_74_10_10_set, field_fmt_74_74_10_10_get, NULL, 0}, - {"VXLAN_SIP_MISS",1, field_fmt_75_75_10_10_info, field_fmt_75_75_10_10_set, field_fmt_75_75_10_10_get, NULL, 0}, - {"ADAPT_MISS",1, field_fmt_76_76_10_10_info, field_fmt_76_76_10_10_set, field_fmt_76_76_10_10_get, NULL, 0}, + {1, field_fmt_32_32_11_11_info, field_fmt_32_32_11_11_set, field_fmt_32_32_11_11_get, NULL, 0}, + {1, field_fmt_33_33_11_11_info, field_fmt_33_33_11_11_set, field_fmt_33_33_11_11_get, NULL, 0}, + {1, field_fmt_34_34_11_11_info, field_fmt_34_34_11_11_set, field_fmt_34_34_11_11_get, NULL, 0}, + {1, field_fmt_35_35_11_11_info, field_fmt_35_35_11_11_set, field_fmt_35_35_11_11_get, NULL, 0}, + {1, field_fmt_36_36_11_11_info, field_fmt_36_36_11_11_set, field_fmt_36_36_11_11_get, NULL, 0}, + {1, field_fmt_37_37_11_11_info, field_fmt_37_37_11_11_set, field_fmt_37_37_11_11_get, NULL, 0}, + {1, field_fmt_38_38_11_11_info, field_fmt_38_38_11_11_set, field_fmt_38_38_11_11_get, NULL, 0}, + {1, field_fmt_39_39_11_11_info, field_fmt_39_39_11_11_set, field_fmt_39_39_11_11_get, NULL, 0}, + {1, field_fmt_40_40_11_11_info, field_fmt_40_40_11_11_set, field_fmt_40_40_11_11_get, NULL, 0}, + {1, field_fmt_41_41_11_11_info, field_fmt_41_41_11_11_set, field_fmt_41_41_11_11_get, NULL, 0}, + {1, field_fmt_42_42_11_11_info, field_fmt_42_42_11_11_set, field_fmt_42_42_11_11_get, NULL, 0}, + {1, field_fmt_43_43_11_11_info, field_fmt_43_43_11_11_set, field_fmt_43_43_11_11_get, NULL, 0}, + {1, field_fmt_44_44_11_11_info, field_fmt_44_44_11_11_set, field_fmt_44_44_11_11_get, NULL, 0}, + {1, field_fmt_45_45_11_11_info, field_fmt_45_45_11_11_set, field_fmt_45_45_11_11_get, NULL, 0}, + {1, field_fmt_46_46_11_11_info, field_fmt_46_46_11_11_set, field_fmt_46_46_11_11_get, NULL, 0}, + {1, field_fmt_47_47_11_11_info, field_fmt_47_47_11_11_set, field_fmt_47_47_11_11_get, NULL, 0}, + {1, field_fmt_48_49_11_11_info, field_fmt_48_49_11_11_set, field_fmt_48_49_11_11_get, bcm56999_a0_rx_reason_cpu_sflow_names, 0}, + {1, field_fmt_50_50_11_11_info, field_fmt_50_50_11_11_set, field_fmt_50_50_11_11_get, NULL, 0}, + {1, field_fmt_51_51_11_11_info, field_fmt_51_51_11_11_set, field_fmt_51_51_11_11_get, NULL, 0}, + {1, field_fmt_52_52_11_11_info, field_fmt_52_52_11_11_set, field_fmt_52_52_11_11_get, NULL, 0}, + {1, field_fmt_53_53_11_11_info, field_fmt_53_53_11_11_set, field_fmt_53_53_11_11_get, NULL, 0}, + {1, field_fmt_54_54_11_11_info, field_fmt_54_54_11_11_set, field_fmt_54_54_11_11_get, NULL, 0}, + {1, field_fmt_55_55_11_11_info, field_fmt_55_55_11_11_set, field_fmt_55_55_11_11_get, NULL, 0}, + {1, field_fmt_56_58_11_11_info, field_fmt_56_58_11_11_set, field_fmt_56_58_11_11_get, bcm56999_a0_rx_reason_mpls_proc_error_names, 0}, + {1, field_fmt_59_59_11_11_info, field_fmt_59_59_11_11_set, field_fmt_59_59_11_11_get, NULL, 0}, + {1, field_fmt_60_60_11_11_info, field_fmt_60_60_11_11_set, field_fmt_60_60_11_11_get, NULL, 0}, + {1, field_fmt_61_61_11_11_info, field_fmt_61_61_11_11_set, field_fmt_61_61_11_11_get, NULL, 0}, + {1, field_fmt_62_62_11_11_info, field_fmt_62_62_11_11_set, field_fmt_62_62_11_11_get, NULL, 0}, + {1, field_fmt_63_63_11_11_info, field_fmt_63_63_11_11_set, field_fmt_63_63_11_11_get, NULL, 0}, + {1, field_fmt_64_64_10_10_info, field_fmt_64_64_10_10_set, field_fmt_64_64_10_10_get, NULL, 0}, + {1, field_fmt_65_65_10_10_info, field_fmt_65_65_10_10_set, field_fmt_65_65_10_10_get, NULL, 0}, + {1, field_fmt_66_66_10_10_info, field_fmt_66_66_10_10_set, field_fmt_66_66_10_10_get, NULL, 0}, + {1, field_fmt_67_67_10_10_info, field_fmt_67_67_10_10_set, field_fmt_67_67_10_10_get, NULL, 0}, + {1, field_fmt_68_68_10_10_info, field_fmt_68_68_10_10_set, field_fmt_68_68_10_10_get, NULL, 0}, + {1, field_fmt_69_69_10_10_info, field_fmt_69_69_10_10_set, field_fmt_69_69_10_10_get, NULL, 0}, + {1, field_fmt_70_70_10_10_info, field_fmt_70_70_10_10_set, field_fmt_70_70_10_10_get, NULL, 0}, + {1, field_fmt_71_71_10_10_info, field_fmt_71_71_10_10_set, field_fmt_71_71_10_10_get, NULL, 0}, + {1, field_fmt_72_72_10_10_info, field_fmt_72_72_10_10_set, field_fmt_72_72_10_10_get, NULL, 0}, + {1, field_fmt_73_73_10_10_info, field_fmt_73_73_10_10_set, field_fmt_73_73_10_10_get, NULL, 0}, + {1, field_fmt_74_74_10_10_info, field_fmt_74_74_10_10_set, field_fmt_74_74_10_10_get, NULL, 0}, + {1, field_fmt_75_75_10_10_info, field_fmt_75_75_10_10_set, field_fmt_75_75_10_10_get, NULL, 0}, + {1, field_fmt_76_76_10_10_info, field_fmt_76_76_10_10_set, field_fmt_76_76_10_10_get, NULL, 0}, }; @@ -2939,29 +2938,29 @@ static const shr_enum_map_t bcm56999_a0_txpmd_start_names[] = }; static bcmpkt_pmd_field_t bcm56999_a0_txpmd_fields[BCM56999_A0_TXPMD_COUNT] = { - {"CELL_LENGTH",1, field_fmt_0_7_3_3_info, field_fmt_0_7_3_3_set, field_fmt_0_7_3_3_get, NULL, 0}, - {"EOP",1, field_fmt_8_8_3_3_info, field_fmt_8_8_3_3_set, field_fmt_8_8_3_3_get, NULL, 0}, - {"SOP",1, field_fmt_9_9_3_3_info, field_fmt_9_9_3_3_set, field_fmt_9_9_3_3_get, NULL, 0}, - {"PKT_LENGTH",1, field_fmt_10_23_3_3_info, field_fmt_10_23_3_3_set, field_fmt_10_23_3_3_get, NULL, 0}, - {"IPCF_PTR",1, field_fmt_24_31_3_3_info, field_fmt_24_31_3_3_set, field_fmt_24_31_3_3_get, NULL, 0}, - {"SRC_MODID",1, field_fmt_32_39_2_2_info, field_fmt_32_39_2_2_set, field_fmt_32_39_2_2_get, NULL, 0}, - {"COS",1, field_fmt_40_45_2_2_info, field_fmt_40_45_2_2_set, field_fmt_40_45_2_2_get, NULL, 0}, - {"UNICAST",1, field_fmt_46_46_2_2_info, field_fmt_46_46_2_2_set, field_fmt_46_46_2_2_get, NULL, 0}, - {"SET_L2BM",1, field_fmt_47_47_2_2_info, field_fmt_47_47_2_2_set, field_fmt_47_47_2_2_get, NULL, 0}, - {"RQE_Q_NUM",1, field_fmt_48_51_2_2_info, field_fmt_48_51_2_2_set, field_fmt_48_51_2_2_get, NULL, 0}, - {"SPAP",1, field_fmt_52_53_2_2_info, field_fmt_52_53_2_2_set, field_fmt_52_53_2_2_get, NULL, 0}, - {"SPID",1, field_fmt_54_55_2_2_info, field_fmt_54_55_2_2_set, field_fmt_54_55_2_2_get, NULL, 0}, - {"SPID_OVERRIDE",1, field_fmt_56_56_2_2_info, field_fmt_56_56_2_2_set, field_fmt_56_56_2_2_get, NULL, 0}, - {"INPUT_PRI",1, field_fmt_57_60_2_2_info, field_fmt_57_60_2_2_set, field_fmt_57_60_2_2_get, NULL, 0}, - {"LOCAL_DEST_PORT",1, field_fmt_63_71_2_1_info, field_fmt_63_71_2_1_set, field_fmt_63_71_2_1_get, NULL, 0}, - {"IEEE1588_TIMESTAMP_HDR_OFFSET",1, field_fmt_72_79_1_1_info, field_fmt_72_79_1_1_set, field_fmt_72_79_1_1_get, NULL, 0}, - {"TX_TS",1, field_fmt_80_80_1_1_info, field_fmt_80_80_1_1_set, field_fmt_80_80_1_1_get, NULL, 0}, - {"IEEE1588_INGRESS_TIMESTAMP_SIGN",1, field_fmt_81_81_1_1_info, field_fmt_81_81_1_1_set, field_fmt_81_81_1_1_get, NULL, 0}, - {"IEEE1588_REGEN_UDP_CHECKSUM",1, field_fmt_82_82_1_1_info, field_fmt_82_82_1_1_set, field_fmt_82_82_1_1_get, NULL, 0}, - {"IEEE1588_ONE_STEP_ENABLE",1, field_fmt_83_83_1_1_info, field_fmt_83_83_1_1_set, field_fmt_83_83_1_1_get, NULL, 0}, - {"CELL_ERROR",1, field_fmt_84_84_1_1_info, field_fmt_84_84_1_1_set, field_fmt_84_84_1_1_get, NULL, 0}, - {"HEADER_TYPE",1, field_fmt_120_125_0_0_info, field_fmt_120_125_0_0_set, field_fmt_120_125_0_0_get, bcm56999_a0_txpmd_header_type_names, 0}, - {"START",1, field_fmt_126_127_0_0_info, field_fmt_126_127_0_0_set, field_fmt_126_127_0_0_get, bcm56999_a0_txpmd_start_names, 0}, + {1, field_fmt_0_7_3_3_info, field_fmt_0_7_3_3_set, field_fmt_0_7_3_3_get, NULL, 0}, + {1, field_fmt_8_8_3_3_info, field_fmt_8_8_3_3_set, field_fmt_8_8_3_3_get, NULL, 0}, + {1, field_fmt_9_9_3_3_info, field_fmt_9_9_3_3_set, field_fmt_9_9_3_3_get, NULL, 0}, + {1, field_fmt_10_23_3_3_info, field_fmt_10_23_3_3_set, field_fmt_10_23_3_3_get, NULL, 0}, + {1, field_fmt_24_31_3_3_info, field_fmt_24_31_3_3_set, field_fmt_24_31_3_3_get, NULL, 0}, + {1, field_fmt_32_39_2_2_info, field_fmt_32_39_2_2_set, field_fmt_32_39_2_2_get, NULL, 0}, + {1, field_fmt_40_45_2_2_info, field_fmt_40_45_2_2_set, field_fmt_40_45_2_2_get, NULL, 0}, + {1, field_fmt_46_46_2_2_info, field_fmt_46_46_2_2_set, field_fmt_46_46_2_2_get, NULL, 0}, + {1, field_fmt_47_47_2_2_info, field_fmt_47_47_2_2_set, field_fmt_47_47_2_2_get, NULL, 0}, + {1, field_fmt_48_51_2_2_info, field_fmt_48_51_2_2_set, field_fmt_48_51_2_2_get, NULL, 0}, + {1, field_fmt_52_53_2_2_info, field_fmt_52_53_2_2_set, field_fmt_52_53_2_2_get, NULL, 0}, + {1, field_fmt_54_55_2_2_info, field_fmt_54_55_2_2_set, field_fmt_54_55_2_2_get, NULL, 0}, + {1, field_fmt_56_56_2_2_info, field_fmt_56_56_2_2_set, field_fmt_56_56_2_2_get, NULL, 0}, + {1, field_fmt_57_60_2_2_info, field_fmt_57_60_2_2_set, field_fmt_57_60_2_2_get, NULL, 0}, + {1, field_fmt_63_71_2_1_info, field_fmt_63_71_2_1_set, field_fmt_63_71_2_1_get, NULL, 0}, + {1, field_fmt_72_79_1_1_info, field_fmt_72_79_1_1_set, field_fmt_72_79_1_1_get, NULL, 0}, + {1, field_fmt_80_80_1_1_info, field_fmt_80_80_1_1_set, field_fmt_80_80_1_1_get, NULL, 0}, + {1, field_fmt_81_81_1_1_info, field_fmt_81_81_1_1_set, field_fmt_81_81_1_1_get, NULL, 0}, + {1, field_fmt_82_82_1_1_info, field_fmt_82_82_1_1_set, field_fmt_82_82_1_1_get, NULL, 0}, + {1, field_fmt_83_83_1_1_info, field_fmt_83_83_1_1_set, field_fmt_83_83_1_1_get, NULL, 0}, + {1, field_fmt_84_84_1_1_info, field_fmt_84_84_1_1_set, field_fmt_84_84_1_1_get, NULL, 0}, + {1, field_fmt_120_125_0_0_info, field_fmt_120_125_0_0_set, field_fmt_120_125_0_0_get, bcm56999_a0_txpmd_header_type_names, 0}, + {1, field_fmt_126_127_0_0_info, field_fmt_126_127_0_0_set, field_fmt_126_127_0_0_get, bcm56999_a0_txpmd_start_names, 0}, }; @@ -2992,31 +2991,31 @@ static const shr_enum_map_t bcm56999_a0_lbhdr_header_type_names[] = }; static bcmpkt_pmd_field_t bcm56999_a0_lbhdr_fields[BCM56999_A0_LBHDR_COUNT] = { - {"ETHERNET::PP_PORT",1, field_fmt_0_8_3_3_info, field_fmt_0_8_3_3_set, field_fmt_0_8_3_3_get, NULL, 3}, - {"ETHERNET::SUBFLOW_TYPE",1, field_fmt_9_10_3_3_info, field_fmt_9_10_3_3_set, field_fmt_9_10_3_3_get, bcm56999_a0_lbhdr_ethernet_subflow_type_names, 3}, - {"ETHERNET::DESTINATION_TYPE",1, field_fmt_11_14_3_3_info, field_fmt_11_14_3_3_set, field_fmt_11_14_3_3_get, bcm56999_a0_lbhdr_ethernet_destination_type_names, 3}, - {"ETHERNET::DESTINATION",1, field_fmt_15_30_3_3_info, field_fmt_15_30_3_3_set, field_fmt_15_30_3_3_get, NULL, 3}, - {"ETHERNET::ROUTED_PKT",1, field_fmt_31_31_3_3_info, field_fmt_31_31_3_3_set, field_fmt_31_31_3_3_get, NULL, 3}, - {"ETHERNET::QOS_FIELDS_VLD",1, field_fmt_32_32_2_2_info, field_fmt_32_32_2_2_set, field_fmt_32_32_2_2_get, NULL, 3}, - {"ETHERNET::INT_CN",1, field_fmt_33_34_2_2_info, field_fmt_33_34_2_2_set, field_fmt_33_34_2_2_get, NULL, 3}, - {"ETHERNET::INT_PRI",1, field_fmt_35_38_2_2_info, field_fmt_35_38_2_2_set, field_fmt_35_38_2_2_get, NULL, 3}, - {"ETHERNET::DP",1, field_fmt_39_40_2_2_info, field_fmt_39_40_2_2_set, field_fmt_39_40_2_2_get, NULL, 3}, - {"ETHERNET::ECMP_MEMBER_ID",1, field_fmt_41_54_2_2_info, field_fmt_41_54_2_2_set, field_fmt_41_54_2_2_get, NULL, 3}, - {"ETHERNET::VRF",1, field_fmt_55_67_2_1_info, field_fmt_55_67_2_1_set, field_fmt_55_67_2_1_get, NULL, 3}, - {"ETHERNET::VRF_VALID",1, field_fmt_68_68_1_1_info, field_fmt_68_68_1_1_set, field_fmt_68_68_1_1_get, NULL, 3}, - {"ETHERNET::MCAST_LB_INDEX",1, field_fmt_70_77_1_1_info, field_fmt_70_77_1_1_set, field_fmt_70_77_1_1_get, NULL, 3}, - {"ETHERNET::MCAST_LB_INDEX_VLD",1, field_fmt_78_78_1_1_info, field_fmt_78_78_1_1_set, field_fmt_78_78_1_1_get, NULL, 3}, - {"TRILL_ACCESS_NONUC::TC",1, field_fmt_0_3_3_3_info, field_fmt_0_3_3_3_set, field_fmt_0_3_3_3_get, NULL, 2}, - {"TRILL_ACCESS_NONUC::CNG",1, field_fmt_4_5_3_3_info, field_fmt_4_5_3_3_set, field_fmt_4_5_3_3_get, NULL, 2}, - {"TRILL_NETWORK_NONUC::TC",1, field_fmt_0_3_3_3_info, field_fmt_0_3_3_3_set, field_fmt_0_3_3_3_get, NULL, 1}, - {"TRILL_NETWORK_NONUC::CNG",1, field_fmt_4_5_3_3_info, field_fmt_4_5_3_3_set, field_fmt_4_5_3_3_get, NULL, 1}, - {"PKT_PROFILE",1, field_fmt_90_92_1_1_info, field_fmt_90_92_1_1_set, field_fmt_90_92_1_1_get, NULL, 0}, - {"VISIBILITY_PKT",1, field_fmt_93_93_1_1_info, field_fmt_93_93_1_1_set, field_fmt_93_93_1_1_get, NULL, 0}, - {"SOURCE",1, field_fmt_94_109_1_0_info, field_fmt_94_109_1_0_set, field_fmt_94_109_1_0_get, NULL, 0}, - {"SOURCE_TYPE",1, field_fmt_110_110_0_0_info, field_fmt_110_110_0_0_set, field_fmt_110_110_0_0_get, NULL, 0}, - {"HEADER_TYPE",1, field_fmt_111_115_0_0_info, field_fmt_111_115_0_0_set, field_fmt_111_115_0_0_get, bcm56999_a0_lbhdr_header_type_names, 0}, - {"INPUT_PRIORITY",1, field_fmt_116_119_0_0_info, field_fmt_116_119_0_0_set, field_fmt_116_119_0_0_get, NULL, 0}, - {"START",1, field_fmt_120_127_0_0_info, field_fmt_120_127_0_0_set, field_fmt_120_127_0_0_get, NULL, 0}, + {1, field_fmt_0_8_3_3_info, field_fmt_0_8_3_3_set, field_fmt_0_8_3_3_get, NULL, 3}, + {1, field_fmt_9_10_3_3_info, field_fmt_9_10_3_3_set, field_fmt_9_10_3_3_get, bcm56999_a0_lbhdr_ethernet_subflow_type_names, 3}, + {1, field_fmt_11_14_3_3_info, field_fmt_11_14_3_3_set, field_fmt_11_14_3_3_get, bcm56999_a0_lbhdr_ethernet_destination_type_names, 3}, + {1, field_fmt_15_30_3_3_info, field_fmt_15_30_3_3_set, field_fmt_15_30_3_3_get, NULL, 3}, + {1, field_fmt_31_31_3_3_info, field_fmt_31_31_3_3_set, field_fmt_31_31_3_3_get, NULL, 3}, + {1, field_fmt_32_32_2_2_info, field_fmt_32_32_2_2_set, field_fmt_32_32_2_2_get, NULL, 3}, + {1, field_fmt_33_34_2_2_info, field_fmt_33_34_2_2_set, field_fmt_33_34_2_2_get, NULL, 3}, + {1, field_fmt_35_38_2_2_info, field_fmt_35_38_2_2_set, field_fmt_35_38_2_2_get, NULL, 3}, + {1, field_fmt_39_40_2_2_info, field_fmt_39_40_2_2_set, field_fmt_39_40_2_2_get, NULL, 3}, + {1, field_fmt_41_54_2_2_info, field_fmt_41_54_2_2_set, field_fmt_41_54_2_2_get, NULL, 3}, + {1, field_fmt_55_67_2_1_info, field_fmt_55_67_2_1_set, field_fmt_55_67_2_1_get, NULL, 3}, + {1, field_fmt_68_68_1_1_info, field_fmt_68_68_1_1_set, field_fmt_68_68_1_1_get, NULL, 3}, + {1, field_fmt_70_77_1_1_info, field_fmt_70_77_1_1_set, field_fmt_70_77_1_1_get, NULL, 3}, + {1, field_fmt_78_78_1_1_info, field_fmt_78_78_1_1_set, field_fmt_78_78_1_1_get, NULL, 3}, + {1, field_fmt_0_3_3_3_info, field_fmt_0_3_3_3_set, field_fmt_0_3_3_3_get, NULL, 2}, + {1, field_fmt_4_5_3_3_info, field_fmt_4_5_3_3_set, field_fmt_4_5_3_3_get, NULL, 2}, + {1, field_fmt_0_3_3_3_info, field_fmt_0_3_3_3_set, field_fmt_0_3_3_3_get, NULL, 1}, + {1, field_fmt_4_5_3_3_info, field_fmt_4_5_3_3_set, field_fmt_4_5_3_3_get, NULL, 1}, + {1, field_fmt_90_92_1_1_info, field_fmt_90_92_1_1_set, field_fmt_90_92_1_1_get, NULL, 0}, + {1, field_fmt_93_93_1_1_info, field_fmt_93_93_1_1_set, field_fmt_93_93_1_1_get, NULL, 0}, + {1, field_fmt_94_109_1_0_info, field_fmt_94_109_1_0_set, field_fmt_94_109_1_0_get, NULL, 0}, + {1, field_fmt_110_110_0_0_info, field_fmt_110_110_0_0_set, field_fmt_110_110_0_0_get, NULL, 0}, + {1, field_fmt_111_115_0_0_info, field_fmt_111_115_0_0_set, field_fmt_111_115_0_0_get, bcm56999_a0_lbhdr_header_type_names, 0}, + {1, field_fmt_116_119_0_0_info, field_fmt_116_119_0_0_set, field_fmt_116_119_0_0_get, NULL, 0}, + {1, field_fmt_120_127_0_0_info, field_fmt_120_127_0_0_set, field_fmt_120_127_0_0_get, NULL, 0}, }; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78800_a0/bcm78800_a0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm78800_a0/bcm78800_a0_pkt_lbhdr.c similarity index 98% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78800_a0/bcm78800_a0_pkt_lbhdr.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm78800_a0/bcm78800_a0_pkt_lbhdr.c index a16c54f5873..a4c4aed11a6 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78800_a0/bcm78800_a0_pkt_lbhdr.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm78800_a0/bcm78800_a0_pkt_lbhdr.c @@ -5,8 +5,7 @@ * Edits to this file will be lost when it is regenerated. * Tool: INTERNAL/regs/xgs/generate-pmd.pl * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78800_a0/bcm78800_a0_pkt_rxpmd.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm78800_a0/bcm78800_a0_pkt_rxpmd.c similarity index 98% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78800_a0/bcm78800_a0_pkt_rxpmd.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm78800_a0/bcm78800_a0_pkt_rxpmd.c index 68df0da9ed5..d2a5cf0bdb7 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78800_a0/bcm78800_a0_pkt_rxpmd.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm78800_a0/bcm78800_a0_pkt_rxpmd.c @@ -5,8 +5,7 @@ * Edits to this file will be lost when it is regenerated. * Tool: INTERNAL/regs/xgs/generate-pmd.pl * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -417,8 +416,6 @@ const bcmpkt_rxpmd_fget_t bcm78800_a0_rxpmd_fget = { NULL, NULL, NULL, - NULL, - NULL, NULL } }; @@ -524,8 +521,6 @@ const bcmpkt_rxpmd_fset_t bcm78800_a0_rxpmd_fset = { NULL, NULL, NULL, - NULL, - NULL, NULL } }; @@ -552,7 +547,7 @@ static int bcm78800_a0_rxpmd_view_infos[BCMPKT_RXPMD_FID_COUNT] = { -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -2, -2, -1, -1, -1, -1, -1, -1, -1, -1, -2, -1, -1, -2, -2, -2, -2, -2, -2, -1, -2, -1, -1, -2, -2, -2, -2, -2, -2, -2, - -2, -2, -2, -2, -2, + -2, -2, -2, }; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78800_a0/bcm78800_a0_pkt_rxpmd_field.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm78800_a0/bcm78800_a0_pkt_rxpmd_field.c similarity index 98% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78800_a0/bcm78800_a0_pkt_rxpmd_field.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm78800_a0/bcm78800_a0_pkt_rxpmd_field.c index a927d0f39bd..eb09375b09b 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78800_a0/bcm78800_a0_pkt_rxpmd_field.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm78800_a0/bcm78800_a0_pkt_rxpmd_field.c @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78800_a0/bcm78800_a0_pkt_txpmd.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm78800_a0/bcm78800_a0_pkt_txpmd.c similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78800_a0/bcm78800_a0_pkt_txpmd.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm78800_a0/bcm78800_a0_pkt_txpmd.c index 2b1e1116190..df3ecbf00ca 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78800_a0/bcm78800_a0_pkt_txpmd.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm78800_a0/bcm78800_a0_pkt_txpmd.c @@ -5,8 +5,7 @@ * Edits to this file will be lost when it is regenerated. * Tool: INTERNAL/regs/xgs/generate-pmd.pl * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -569,7 +568,6 @@ const bcmpkt_txpmd_fget_t bcm78800_a0_txpmd_fget = { NULL, NULL, NULL, - NULL, NULL } }; @@ -705,7 +703,6 @@ const bcmpkt_txpmd_fset_t bcm78800_a0_txpmd_fset = { NULL, NULL, NULL, - NULL, NULL } }; @@ -731,7 +728,7 @@ static int bcm78800_a0_txpmd_view_infos[BCMPKT_TXPMD_FID_COUNT] = { -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, - -2, -2, + -2, }; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78800_a0/bcm78800_a0_pmd_field.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm78800_a0/bcm78800_a0_pmd_field.c similarity index 79% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78800_a0/bcm78800_a0_pmd_field.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm78800_a0/bcm78800_a0_pmd_field.c index 929815c2f0c..fc13a41f672 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78800_a0/bcm78800_a0_pmd_field.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm78800_a0/bcm78800_a0_pmd_field.c @@ -5,8 +5,7 @@ * Edits to this file will be lost when it is regenerated. * Tool: INTERNAL/regs/xgs/generate-pmd.pl * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -1189,28 +1188,28 @@ field_fmt_9_9_3_3_get(uint32_t *pmd, uint32_t *val) } static bcmpkt_pmd_field_t bcm78800_a0_rxpmd_fields[BCM78800_A0_RXPMD_COUNT] = { - {"FLEX_DATA",14, field_fmt_0_447_17_4_info, field_fmt_0_447_17_4_set, field_fmt_0_447_17_4_get, NULL, 0}, - {"MPB_FLEX_DATA_TYPE",1, field_fmt_449_454_3_3_info, field_fmt_449_454_3_3_set, field_fmt_449_454_3_3_get, NULL, 0}, - {"DOP_TRIGGER",1, field_fmt_455_455_3_3_info, field_fmt_455_455_3_3_set, field_fmt_455_455_3_3_get, NULL, 0}, - {"EPARSE_EXTRACT_OFFSETS_3_0_OR_MIRROR_ENCAP_INDEX",1, field_fmt_456_459_3_3_info, field_fmt_456_459_3_3_set, field_fmt_456_459_3_3_get, NULL, 0}, - {"EPARSE_EXTRACT_OFFSETS_6_4",1, field_fmt_460_462_3_3_info, field_fmt_460_462_3_3_set, field_fmt_460_462_3_3_get, NULL, 0}, - {"INT_CN",1, field_fmt_464_465_3_3_info, field_fmt_464_465_3_3_set, field_fmt_464_465_3_3_get, NULL, 0}, - {"CNG",1, field_fmt_466_467_3_3_info, field_fmt_466_467_3_3_set, field_fmt_466_467_3_3_get, NULL, 0}, - {"MULTICAST",1, field_fmt_468_468_3_3_info, field_fmt_468_468_3_3_set, field_fmt_468_468_3_3_get, NULL, 0}, - {"IP_ROUTED",1, field_fmt_469_469_3_3_info, field_fmt_469_469_3_3_set, field_fmt_469_469_3_3_get, NULL, 0}, - {"COPY_TO_CPU",1, field_fmt_470_470_3_3_info, field_fmt_470_470_3_3_set, field_fmt_470_470_3_3_get, NULL, 0}, - {"SRC_PORT_NUM",1, field_fmt_471_478_3_3_info, field_fmt_471_478_3_3_set, field_fmt_471_478_3_3_get, NULL, 0}, - {"ARC_ID_LO",1, field_fmt_480_511_2_2_info, field_fmt_480_511_2_2_set, field_fmt_480_511_2_2_get, NULL, 0}, - {"ARC_ID_HI",1, field_fmt_512_527_1_1_info, field_fmt_512_527_1_1_set, field_fmt_512_527_1_1_get, NULL, 0}, - {"REPLICATION_OR_NHOP_INDEX",1, field_fmt_528_543_1_1_info, field_fmt_528_543_1_1_set, field_fmt_528_543_1_1_get, NULL, 0}, - {"DMA_HEADER_VERSION",1, field_fmt_544_545_0_0_info, field_fmt_544_545_0_0_set, field_fmt_544_545_0_0_get, NULL, 0}, - {"QUEUE_NUM",1, field_fmt_546_551_0_0_info, field_fmt_546_551_0_0_set, field_fmt_546_551_0_0_get, NULL, 0}, - {"TRUNCATE_CPU_COPY",1, field_fmt_552_552_0_0_info, field_fmt_552_552_0_0_set, field_fmt_552_552_0_0_get, NULL, 0}, - {"EGR_ZONE_REMAP_CTRL",1, field_fmt_553_556_0_0_info, field_fmt_553_556_0_0_set, field_fmt_553_556_0_0_get, NULL, 0}, - {"SWITCH",1, field_fmt_557_557_0_0_info, field_fmt_557_557_0_0_set, field_fmt_557_557_0_0_get, NULL, 0}, - {"L3ONLY",1, field_fmt_558_558_0_0_info, field_fmt_558_558_0_0_set, field_fmt_558_558_0_0_get, NULL, 0}, - {"UC_SW_COPY_DROPPED",1, field_fmt_559_559_0_0_info, field_fmt_559_559_0_0_set, field_fmt_559_559_0_0_get, NULL, 0}, - {"PKT_LENGTH",1, field_fmt_560_575_0_0_info, field_fmt_560_575_0_0_set, field_fmt_560_575_0_0_get, NULL, 0}, + {14, field_fmt_0_447_17_4_info, field_fmt_0_447_17_4_set, field_fmt_0_447_17_4_get, NULL, 0}, + {1, field_fmt_449_454_3_3_info, field_fmt_449_454_3_3_set, field_fmt_449_454_3_3_get, NULL, 0}, + {1, field_fmt_455_455_3_3_info, field_fmt_455_455_3_3_set, field_fmt_455_455_3_3_get, NULL, 0}, + {1, field_fmt_456_459_3_3_info, field_fmt_456_459_3_3_set, field_fmt_456_459_3_3_get, NULL, 0}, + {1, field_fmt_460_462_3_3_info, field_fmt_460_462_3_3_set, field_fmt_460_462_3_3_get, NULL, 0}, + {1, field_fmt_464_465_3_3_info, field_fmt_464_465_3_3_set, field_fmt_464_465_3_3_get, NULL, 0}, + {1, field_fmt_466_467_3_3_info, field_fmt_466_467_3_3_set, field_fmt_466_467_3_3_get, NULL, 0}, + {1, field_fmt_468_468_3_3_info, field_fmt_468_468_3_3_set, field_fmt_468_468_3_3_get, NULL, 0}, + {1, field_fmt_469_469_3_3_info, field_fmt_469_469_3_3_set, field_fmt_469_469_3_3_get, NULL, 0}, + {1, field_fmt_470_470_3_3_info, field_fmt_470_470_3_3_set, field_fmt_470_470_3_3_get, NULL, 0}, + {1, field_fmt_471_478_3_3_info, field_fmt_471_478_3_3_set, field_fmt_471_478_3_3_get, NULL, 0}, + {1, field_fmt_480_511_2_2_info, field_fmt_480_511_2_2_set, field_fmt_480_511_2_2_get, NULL, 0}, + {1, field_fmt_512_527_1_1_info, field_fmt_512_527_1_1_set, field_fmt_512_527_1_1_get, NULL, 0}, + {1, field_fmt_528_543_1_1_info, field_fmt_528_543_1_1_set, field_fmt_528_543_1_1_get, NULL, 0}, + {1, field_fmt_544_545_0_0_info, field_fmt_544_545_0_0_set, field_fmt_544_545_0_0_get, NULL, 0}, + {1, field_fmt_546_551_0_0_info, field_fmt_546_551_0_0_set, field_fmt_546_551_0_0_get, NULL, 0}, + {1, field_fmt_552_552_0_0_info, field_fmt_552_552_0_0_set, field_fmt_552_552_0_0_get, NULL, 0}, + {1, field_fmt_553_556_0_0_info, field_fmt_553_556_0_0_set, field_fmt_553_556_0_0_get, NULL, 0}, + {1, field_fmt_557_557_0_0_info, field_fmt_557_557_0_0_set, field_fmt_557_557_0_0_get, NULL, 0}, + {1, field_fmt_558_558_0_0_info, field_fmt_558_558_0_0_set, field_fmt_558_558_0_0_get, NULL, 0}, + {1, field_fmt_559_559_0_0_info, field_fmt_559_559_0_0_set, field_fmt_559_559_0_0_get, NULL, 0}, + {1, field_fmt_560_575_0_0_info, field_fmt_560_575_0_0_set, field_fmt_560_575_0_0_get, NULL, 0}, }; @@ -1248,39 +1247,39 @@ static const shr_enum_map_t bcm78800_a0_txpmd_start_names[] = }; static bcmpkt_pmd_field_t bcm78800_a0_txpmd_fields[BCM78800_A0_TXPMD_COUNT] = { - {"CELL_LENGTH",1, field_fmt_0_8_3_3_info, field_fmt_0_8_3_3_set, field_fmt_0_8_3_3_get, NULL, 0}, - {"EOP",1, field_fmt_9_9_3_3_info, field_fmt_9_9_3_3_set, field_fmt_9_9_3_3_get, NULL, 0}, - {"SOP",1, field_fmt_10_10_3_3_info, field_fmt_10_10_3_3_set, field_fmt_10_10_3_3_get, NULL, 0}, - {"PKT_LENGTH",1, field_fmt_11_24_3_3_info, field_fmt_11_24_3_3_set, field_fmt_11_24_3_3_get, NULL, 0}, - {"COPY_TO_CPU",1, field_fmt_25_25_3_3_info, field_fmt_25_25_3_3_set, field_fmt_25_25_3_3_get, NULL, 0}, - {"COPY_TO_DEBUG",1, field_fmt_26_26_3_3_info, field_fmt_26_26_3_3_set, field_fmt_26_26_3_3_get, NULL, 0}, - {"WRED_MARK_ELIGIBLE",1, field_fmt_35_35_2_2_info, field_fmt_35_35_2_2_set, field_fmt_35_35_2_2_get, NULL, 0}, - {"WRED_RESPONSIVE",1, field_fmt_36_36_2_2_info, field_fmt_36_36_2_2_set, field_fmt_36_36_2_2_get, NULL, 0}, - {"CNG",1, field_fmt_37_38_2_2_info, field_fmt_37_38_2_2_set, field_fmt_37_38_2_2_get, NULL, 0}, - {"COS",1, field_fmt_39_44_2_2_info, field_fmt_39_44_2_2_set, field_fmt_39_44_2_2_get, NULL, 0}, - {"UNICAST_PKT",1, field_fmt_45_45_2_2_info, field_fmt_45_45_2_2_set, field_fmt_45_45_2_2_get, NULL, 0}, - {"UNICAST",1, field_fmt_46_46_2_2_info, field_fmt_46_46_2_2_set, field_fmt_46_46_2_2_get, NULL, 0}, - {"SET_L2BM",1, field_fmt_47_47_2_2_info, field_fmt_47_47_2_2_set, field_fmt_47_47_2_2_get, NULL, 0}, - {"RQE_Q_NUM",1, field_fmt_48_51_2_2_info, field_fmt_48_51_2_2_set, field_fmt_48_51_2_2_get, NULL, 0}, - {"SPAP",1, field_fmt_52_53_2_2_info, field_fmt_52_53_2_2_set, field_fmt_52_53_2_2_get, NULL, 0}, - {"SPID",1, field_fmt_54_55_2_2_info, field_fmt_54_55_2_2_set, field_fmt_54_55_2_2_get, NULL, 0}, - {"SPID_OVERRIDE",1, field_fmt_56_56_2_2_info, field_fmt_56_56_2_2_set, field_fmt_56_56_2_2_get, NULL, 0}, - {"INPUT_PRI",1, field_fmt_57_60_2_2_info, field_fmt_57_60_2_2_set, field_fmt_57_60_2_2_get, NULL, 0}, - {"LOCAL_DEST_PORT",1, field_fmt_64_71_1_1_info, field_fmt_64_71_1_1_set, field_fmt_64_71_1_1_get, NULL, 0}, - {"IEEE1588_TIMESTAMP_HDR_OFFSET",1, field_fmt_72_79_1_1_info, field_fmt_72_79_1_1_set, field_fmt_72_79_1_1_get, NULL, 0}, - {"TX_TS",1, field_fmt_80_80_1_1_info, field_fmt_80_80_1_1_set, field_fmt_80_80_1_1_get, NULL, 0}, - {"IEEE1588_INGRESS_TIMESTAMP_SIGN",1, field_fmt_81_81_1_1_info, field_fmt_81_81_1_1_set, field_fmt_81_81_1_1_get, NULL, 0}, - {"IEEE1588_REGEN_UDP_CHECKSUM",1, field_fmt_82_82_1_1_info, field_fmt_82_82_1_1_set, field_fmt_82_82_1_1_get, NULL, 0}, - {"IEEE1588_ONE_STEP_ENABLE",1, field_fmt_83_83_1_1_info, field_fmt_83_83_1_1_set, field_fmt_83_83_1_1_get, NULL, 0}, - {"TS_ACTION_LSB",1, field_fmt_83_83_1_1_info, field_fmt_83_83_1_1_set, field_fmt_83_83_1_1_get, NULL, 0}, - {"CELL_ERROR",1, field_fmt_84_84_1_1_info, field_fmt_84_84_1_1_set, field_fmt_84_84_1_1_get, NULL, 0}, - {"TS_ACTION_MSB",1, field_fmt_85_85_1_1_info, field_fmt_85_85_1_1_set, field_fmt_85_85_1_1_get, NULL, 0}, - {"TS_TYPE",1, field_fmt_86_86_1_1_info, field_fmt_86_86_1_1_set, field_fmt_86_86_1_1_get, NULL, 0}, - {"DST_SUBPORT_NUM",1, field_fmt_87_94_1_1_info, field_fmt_87_94_1_1_set, field_fmt_87_94_1_1_get, NULL, 0}, - {"UDP_CHECKSUM_UPDATE_ENABLE",1, field_fmt_95_95_1_1_info, field_fmt_95_95_1_1_set, field_fmt_95_95_1_1_get, NULL, 0}, - {"UDP_CHECKSUM_OFFSET",1, field_fmt_96_101_0_0_info, field_fmt_96_101_0_0_set, field_fmt_96_101_0_0_get, NULL, 0}, - {"HEADER_TYPE",1, field_fmt_120_125_0_0_info, field_fmt_120_125_0_0_set, field_fmt_120_125_0_0_get, bcm78800_a0_txpmd_header_type_names, 0}, - {"START",1, field_fmt_126_127_0_0_info, field_fmt_126_127_0_0_set, field_fmt_126_127_0_0_get, bcm78800_a0_txpmd_start_names, 0}, + {1, field_fmt_0_8_3_3_info, field_fmt_0_8_3_3_set, field_fmt_0_8_3_3_get, NULL, 0}, + {1, field_fmt_9_9_3_3_info, field_fmt_9_9_3_3_set, field_fmt_9_9_3_3_get, NULL, 0}, + {1, field_fmt_10_10_3_3_info, field_fmt_10_10_3_3_set, field_fmt_10_10_3_3_get, NULL, 0}, + {1, field_fmt_11_24_3_3_info, field_fmt_11_24_3_3_set, field_fmt_11_24_3_3_get, NULL, 0}, + {1, field_fmt_25_25_3_3_info, field_fmt_25_25_3_3_set, field_fmt_25_25_3_3_get, NULL, 0}, + {1, field_fmt_26_26_3_3_info, field_fmt_26_26_3_3_set, field_fmt_26_26_3_3_get, NULL, 0}, + {1, field_fmt_35_35_2_2_info, field_fmt_35_35_2_2_set, field_fmt_35_35_2_2_get, NULL, 0}, + {1, field_fmt_36_36_2_2_info, field_fmt_36_36_2_2_set, field_fmt_36_36_2_2_get, NULL, 0}, + {1, field_fmt_37_38_2_2_info, field_fmt_37_38_2_2_set, field_fmt_37_38_2_2_get, NULL, 0}, + {1, field_fmt_39_44_2_2_info, field_fmt_39_44_2_2_set, field_fmt_39_44_2_2_get, NULL, 0}, + {1, field_fmt_45_45_2_2_info, field_fmt_45_45_2_2_set, field_fmt_45_45_2_2_get, NULL, 0}, + {1, field_fmt_46_46_2_2_info, field_fmt_46_46_2_2_set, field_fmt_46_46_2_2_get, NULL, 0}, + {1, field_fmt_47_47_2_2_info, field_fmt_47_47_2_2_set, field_fmt_47_47_2_2_get, NULL, 0}, + {1, field_fmt_48_51_2_2_info, field_fmt_48_51_2_2_set, field_fmt_48_51_2_2_get, NULL, 0}, + {1, field_fmt_52_53_2_2_info, field_fmt_52_53_2_2_set, field_fmt_52_53_2_2_get, NULL, 0}, + {1, field_fmt_54_55_2_2_info, field_fmt_54_55_2_2_set, field_fmt_54_55_2_2_get, NULL, 0}, + {1, field_fmt_56_56_2_2_info, field_fmt_56_56_2_2_set, field_fmt_56_56_2_2_get, NULL, 0}, + {1, field_fmt_57_60_2_2_info, field_fmt_57_60_2_2_set, field_fmt_57_60_2_2_get, NULL, 0}, + {1, field_fmt_64_71_1_1_info, field_fmt_64_71_1_1_set, field_fmt_64_71_1_1_get, NULL, 0}, + {1, field_fmt_72_79_1_1_info, field_fmt_72_79_1_1_set, field_fmt_72_79_1_1_get, NULL, 0}, + {1, field_fmt_80_80_1_1_info, field_fmt_80_80_1_1_set, field_fmt_80_80_1_1_get, NULL, 0}, + {1, field_fmt_81_81_1_1_info, field_fmt_81_81_1_1_set, field_fmt_81_81_1_1_get, NULL, 0}, + {1, field_fmt_82_82_1_1_info, field_fmt_82_82_1_1_set, field_fmt_82_82_1_1_get, NULL, 0}, + {1, field_fmt_83_83_1_1_info, field_fmt_83_83_1_1_set, field_fmt_83_83_1_1_get, NULL, 0}, + {1, field_fmt_83_83_1_1_info, field_fmt_83_83_1_1_set, field_fmt_83_83_1_1_get, NULL, 0}, + {1, field_fmt_84_84_1_1_info, field_fmt_84_84_1_1_set, field_fmt_84_84_1_1_get, NULL, 0}, + {1, field_fmt_85_85_1_1_info, field_fmt_85_85_1_1_set, field_fmt_85_85_1_1_get, NULL, 0}, + {1, field_fmt_86_86_1_1_info, field_fmt_86_86_1_1_set, field_fmt_86_86_1_1_get, NULL, 0}, + {1, field_fmt_87_94_1_1_info, field_fmt_87_94_1_1_set, field_fmt_87_94_1_1_get, NULL, 0}, + {1, field_fmt_95_95_1_1_info, field_fmt_95_95_1_1_set, field_fmt_95_95_1_1_get, NULL, 0}, + {1, field_fmt_96_101_0_0_info, field_fmt_96_101_0_0_set, field_fmt_96_101_0_0_get, NULL, 0}, + {1, field_fmt_120_125_0_0_info, field_fmt_120_125_0_0_set, field_fmt_120_125_0_0_get, bcm78800_a0_txpmd_header_type_names, 0}, + {1, field_fmt_126_127_0_0_info, field_fmt_126_127_0_0_set, field_fmt_126_127_0_0_get, bcm78800_a0_txpmd_start_names, 0}, }; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pkt_lbhdr.c similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pkt_lbhdr.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pkt_lbhdr.c index 36849a9cbfa..5af20b7def4 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pkt_lbhdr.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pkt_lbhdr.c @@ -5,8 +5,7 @@ * Edits to this file will be lost when it is regenerated. * Tool: INTERNAL/regs/xgs/generate-pmd.pl * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pkt_rxpmd.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pkt_rxpmd.c similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pkt_rxpmd.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pkt_rxpmd.c index 1bee6ed1677..9ae1a6b5e46 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pkt_rxpmd.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pkt_rxpmd.c @@ -5,8 +5,7 @@ * Edits to this file will be lost when it is regenerated. * Tool: INTERNAL/regs/xgs/generate-pmd.pl * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -995,8 +994,6 @@ const bcmpkt_rxpmd_fget_t bcm78900_b0_rxpmd_fget = { NULL, NULL, NULL, - NULL, - NULL, NULL } }; @@ -1102,8 +1099,6 @@ const bcmpkt_rxpmd_fset_t bcm78900_b0_rxpmd_fset = { NULL, NULL, NULL, - NULL, - NULL, NULL } }; @@ -1130,7 +1125,7 @@ static int bcm78900_b0_rxpmd_view_infos[BCMPKT_RXPMD_FID_COUNT] = { -1, -1, -1, -1, -1, -1, -1, -2, -1, -1, -1, -1, -1, -2, -2, -2, -2, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -2, -2, -2, -1, -1, -2, -2, -1, -2, -2, -2, -2, -1, -2, -2, -2, -2, -2, -2, - -2, -2, -2, -2, -2, + -2, -2, -2, }; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pkt_txpmd.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pkt_txpmd.c similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pkt_txpmd.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pkt_txpmd.c index 04ba5b75b11..e897c4001ea 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pkt_txpmd.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pkt_txpmd.c @@ -5,8 +5,7 @@ * Edits to this file will be lost when it is regenerated. * Tool: INTERNAL/regs/xgs/generate-pmd.pl * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -793,7 +792,6 @@ const bcmpkt_txpmd_fget_t bcm78900_b0_txpmd_fget = { NULL, NULL, NULL, - NULL, NULL } }; @@ -929,7 +927,6 @@ const bcmpkt_txpmd_fset_t bcm78900_b0_txpmd_fset = { NULL, NULL, NULL, - NULL, NULL } }; @@ -957,7 +954,7 @@ static int bcm78900_b0_txpmd_view_infos[BCMPKT_TXPMD_FID_COUNT] = { -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, - -2, -2, + -2, }; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pmd_field.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pmd_field.c similarity index 77% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pmd_field.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pmd_field.c index f27eb0acb3c..9c7e1782e93 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pmd_field.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pmd_field.c @@ -5,8 +5,7 @@ * Edits to this file will be lost when it is regenerated. * Tool: INTERNAL/regs/xgs/generate-pmd.pl * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -2926,52 +2925,52 @@ static const shr_enum_map_t bcm78900_b0_rxpmd_ieee_802_1as_timestamp_enabled_nam }; static bcmpkt_pmd_field_t bcm78900_b0_rxpmd_fields[BCM78900_B0_RXPMD_COUNT] = { - {"REASON",2, field_fmt_0_63_12_11_info, field_fmt_0_63_12_11_set, field_fmt_0_63_12_11_get, NULL, 0}, - {"REASON_TYPE",1, field_fmt_64_67_10_10_info, field_fmt_64_67_10_10_set, field_fmt_64_67_10_10_get, bcm78900_b0_rxpmd_reason_type_names, 0}, - {"ING_L3_INTF",1, field_fmt_68_80_10_10_info, field_fmt_68_80_10_10_set, field_fmt_68_80_10_10_get, NULL, 0}, - {"I2E_CLASSID",1, field_fmt_68_79_10_10_info, field_fmt_68_79_10_10_set, field_fmt_68_79_10_10_get, NULL, 0}, - {"RX_BFD_SESSION_INDEX",1, field_fmt_68_79_10_10_info, field_fmt_68_79_10_10_set, field_fmt_68_79_10_10_get, NULL, 0}, - {"I2E_CLASSID_TYPE",1, field_fmt_80_83_10_10_info, field_fmt_80_83_10_10_set, field_fmt_80_83_10_10_get, NULL, 0}, - {"RX_BFD_START_OFFSET_TYPE",1, field_fmt_80_81_10_10_info, field_fmt_80_81_10_10_set, field_fmt_80_81_10_10_get, NULL, 0}, - {"RX_BFD_START_OFFSET",1, field_fmt_82_89_10_10_info, field_fmt_82_89_10_10_set, field_fmt_82_89_10_10_get, NULL, 0}, - {"ING_L3_INTF_VALID",1, field_fmt_84_84_10_10_info, field_fmt_84_84_10_10_set, field_fmt_84_84_10_10_get, NULL, 0}, - {"CPU_COS",1, field_fmt_90_95_10_10_info, field_fmt_90_95_10_10_set, field_fmt_90_95_10_10_get, NULL, 0}, - {"QUEUE_NUM",1, field_fmt_90_95_10_10_info, field_fmt_90_95_10_10_set, field_fmt_90_95_10_10_get, NULL, 0}, - {"INCOMING_TAG_STATUS",1, field_fmt_96_96_9_9_info, field_fmt_96_96_9_9_set, field_fmt_96_96_9_9_get, NULL, 0}, - {"ING_OTAG_ACTION",1, field_fmt_97_98_9_9_info, field_fmt_97_98_9_9_set, field_fmt_97_98_9_9_get, NULL, 0}, - {"PKT_LENGTH",1, field_fmt_99_112_9_9_info, field_fmt_99_112_9_9_set, field_fmt_99_112_9_9_get, NULL, 0}, - {"O_NHI",1, field_fmt_113_127_9_9_info, field_fmt_113_127_9_9_set, field_fmt_113_127_9_9_get, NULL, 0}, - {"INCOMING_OPAQUE_TAG_STATUS",1, field_fmt_128_128_8_8_info, field_fmt_128_128_8_8_set, field_fmt_128_128_8_8_get, NULL, 0}, - {"BPDU",1, field_fmt_129_129_8_8_info, field_fmt_129_129_8_8_set, field_fmt_129_129_8_8_get, NULL, 0}, - {"CHANGE_DSCP",1, field_fmt_130_130_8_8_info, field_fmt_130_130_8_8_set, field_fmt_130_130_8_8_get, NULL, 0}, - {"CHANGE_ECN",1, field_fmt_131_131_8_8_info, field_fmt_131_131_8_8_set, field_fmt_131_131_8_8_get, NULL, 0}, - {"DLB_ID_VALID",1, field_fmt_132_132_8_8_info, field_fmt_132_132_8_8_set, field_fmt_132_132_8_8_get, NULL, 0}, - {"DO_NOT_CHANGE_TTL",1, field_fmt_133_133_8_8_info, field_fmt_133_133_8_8_set, field_fmt_133_133_8_8_get, NULL, 0}, - {"DSCP",1, field_fmt_134_139_8_8_info, field_fmt_134_139_8_8_set, field_fmt_134_139_8_8_get, NULL, 0}, - {"SPECIAL_PACKET_TYPE",1, field_fmt_134_136_8_8_info, field_fmt_134_136_8_8_set, field_fmt_134_136_8_8_get, NULL, 0}, - {"ECN",1, field_fmt_140_141_8_8_info, field_fmt_140_141_8_8_set, field_fmt_140_141_8_8_get, NULL, 0}, - {"IP_ROUTED",1, field_fmt_142_142_8_8_info, field_fmt_142_142_8_8_set, field_fmt_142_142_8_8_get, NULL, 0}, - {"L3ONLY",1, field_fmt_143_143_8_8_info, field_fmt_143_143_8_8_set, field_fmt_143_143_8_8_get, NULL, 0}, - {"MATCHED_RULE",1, field_fmt_144_155_8_8_info, field_fmt_144_155_8_8_set, field_fmt_144_155_8_8_get, NULL, 0}, - {"MTP_INDEX",1, field_fmt_156_158_8_8_info, field_fmt_156_158_8_8_set, field_fmt_156_158_8_8_get, NULL, 0}, - {"OUTER_CFI",1, field_fmt_159_159_8_8_info, field_fmt_159_159_8_8_set, field_fmt_159_159_8_8_get, NULL, 0}, - {"OUTER_PRI",1, field_fmt_160_162_7_7_info, field_fmt_160_162_7_7_set, field_fmt_160_162_7_7_get, NULL, 0}, - {"OUTER_VID",1, field_fmt_163_174_7_7_info, field_fmt_163_174_7_7_set, field_fmt_163_174_7_7_get, NULL, 0}, - {"REPLICATION_OR_NHOP_INDEX",1, field_fmt_175_191_7_7_info, field_fmt_175_191_7_7_set, field_fmt_175_191_7_7_get, NULL, 0}, - {"REGEN_CRC",1, field_fmt_192_192_6_6_info, field_fmt_192_192_6_6_set, field_fmt_192_192_6_6_get, NULL, 0}, - {"ENTROPY_LABEL",1, field_fmt_193_212_6_6_info, field_fmt_193_212_6_6_set, field_fmt_193_212_6_6_get, NULL, 0}, - {"SPECIAL_PACKET_INDICATOR",1, field_fmt_213_213_6_6_info, field_fmt_213_213_6_6_set, field_fmt_213_213_6_6_get, NULL, 0}, - {"SRC_PORT_NUM",1, field_fmt_214_222_6_6_info, field_fmt_214_222_6_6_set, field_fmt_214_222_6_6_get, NULL, 0}, - {"SWITCH",1, field_fmt_223_223_6_6_info, field_fmt_223_223_6_6_set, field_fmt_223_223_6_6_get, NULL, 0}, - {"TIMESTAMP",1, field_fmt_224_255_5_5_info, field_fmt_224_255_5_5_set, field_fmt_224_255_5_5_get, NULL, 0}, - {"TIMESTAMP_HI",1, field_fmt_256_271_4_4_info, field_fmt_256_271_4_4_set, field_fmt_256_271_4_4_get, NULL, 0}, - {"IEEE_802_1AS_TIMESTAMP_ENABLED",1, field_fmt_272_272_4_4_info, field_fmt_272_272_4_4_set, field_fmt_272_272_4_4_get, bcm78900_b0_rxpmd_ieee_802_1as_timestamp_enabled_names, 0}, - {"TUNNEL_DECAP_TYPE",1, field_fmt_273_276_4_4_info, field_fmt_273_276_4_4_set, field_fmt_273_276_4_4_get, NULL, 0}, - {"UC_SW_COPY_DROPPED",1, field_fmt_277_277_4_4_info, field_fmt_277_277_4_4_set, field_fmt_277_277_4_4_get, NULL, 0}, - {"UNICAST_QUEUE",1, field_fmt_278_278_4_4_info, field_fmt_278_278_4_4_set, field_fmt_278_278_4_4_get, NULL, 0}, - {"INCOMING_INT_HDR_TYPE",1, field_fmt_279_280_4_4_info, field_fmt_279_280_4_4_set, field_fmt_279_280_4_4_get, NULL, 0}, - {"DLB_ID",1, field_fmt_281_287_4_4_info, field_fmt_281_287_4_4_set, field_fmt_281_287_4_4_get, NULL, 0}, - {"MODULE_HDR",4, field_fmt_288_415_3_0_info, field_fmt_288_415_3_0_set, field_fmt_288_415_3_0_get, NULL, 0}, + {2, field_fmt_0_63_12_11_info, field_fmt_0_63_12_11_set, field_fmt_0_63_12_11_get, NULL, 0}, + {1, field_fmt_64_67_10_10_info, field_fmt_64_67_10_10_set, field_fmt_64_67_10_10_get, bcm78900_b0_rxpmd_reason_type_names, 0}, + {1, field_fmt_68_80_10_10_info, field_fmt_68_80_10_10_set, field_fmt_68_80_10_10_get, NULL, 0}, + {1, field_fmt_68_79_10_10_info, field_fmt_68_79_10_10_set, field_fmt_68_79_10_10_get, NULL, 0}, + {1, field_fmt_68_79_10_10_info, field_fmt_68_79_10_10_set, field_fmt_68_79_10_10_get, NULL, 0}, + {1, field_fmt_80_83_10_10_info, field_fmt_80_83_10_10_set, field_fmt_80_83_10_10_get, NULL, 0}, + {1, field_fmt_80_81_10_10_info, field_fmt_80_81_10_10_set, field_fmt_80_81_10_10_get, NULL, 0}, + {1, field_fmt_82_89_10_10_info, field_fmt_82_89_10_10_set, field_fmt_82_89_10_10_get, NULL, 0}, + {1, field_fmt_84_84_10_10_info, field_fmt_84_84_10_10_set, field_fmt_84_84_10_10_get, NULL, 0}, + {1, field_fmt_90_95_10_10_info, field_fmt_90_95_10_10_set, field_fmt_90_95_10_10_get, NULL, 0}, + {1, field_fmt_90_95_10_10_info, field_fmt_90_95_10_10_set, field_fmt_90_95_10_10_get, NULL, 0}, + {1, field_fmt_96_96_9_9_info, field_fmt_96_96_9_9_set, field_fmt_96_96_9_9_get, NULL, 0}, + {1, field_fmt_97_98_9_9_info, field_fmt_97_98_9_9_set, field_fmt_97_98_9_9_get, NULL, 0}, + {1, field_fmt_99_112_9_9_info, field_fmt_99_112_9_9_set, field_fmt_99_112_9_9_get, NULL, 0}, + {1, field_fmt_113_127_9_9_info, field_fmt_113_127_9_9_set, field_fmt_113_127_9_9_get, NULL, 0}, + {1, field_fmt_128_128_8_8_info, field_fmt_128_128_8_8_set, field_fmt_128_128_8_8_get, NULL, 0}, + {1, field_fmt_129_129_8_8_info, field_fmt_129_129_8_8_set, field_fmt_129_129_8_8_get, NULL, 0}, + {1, field_fmt_130_130_8_8_info, field_fmt_130_130_8_8_set, field_fmt_130_130_8_8_get, NULL, 0}, + {1, field_fmt_131_131_8_8_info, field_fmt_131_131_8_8_set, field_fmt_131_131_8_8_get, NULL, 0}, + {1, field_fmt_132_132_8_8_info, field_fmt_132_132_8_8_set, field_fmt_132_132_8_8_get, NULL, 0}, + {1, field_fmt_133_133_8_8_info, field_fmt_133_133_8_8_set, field_fmt_133_133_8_8_get, NULL, 0}, + {1, field_fmt_134_139_8_8_info, field_fmt_134_139_8_8_set, field_fmt_134_139_8_8_get, NULL, 0}, + {1, field_fmt_134_136_8_8_info, field_fmt_134_136_8_8_set, field_fmt_134_136_8_8_get, NULL, 0}, + {1, field_fmt_140_141_8_8_info, field_fmt_140_141_8_8_set, field_fmt_140_141_8_8_get, NULL, 0}, + {1, field_fmt_142_142_8_8_info, field_fmt_142_142_8_8_set, field_fmt_142_142_8_8_get, NULL, 0}, + {1, field_fmt_143_143_8_8_info, field_fmt_143_143_8_8_set, field_fmt_143_143_8_8_get, NULL, 0}, + {1, field_fmt_144_155_8_8_info, field_fmt_144_155_8_8_set, field_fmt_144_155_8_8_get, NULL, 0}, + {1, field_fmt_156_158_8_8_info, field_fmt_156_158_8_8_set, field_fmt_156_158_8_8_get, NULL, 0}, + {1, field_fmt_159_159_8_8_info, field_fmt_159_159_8_8_set, field_fmt_159_159_8_8_get, NULL, 0}, + {1, field_fmt_160_162_7_7_info, field_fmt_160_162_7_7_set, field_fmt_160_162_7_7_get, NULL, 0}, + {1, field_fmt_163_174_7_7_info, field_fmt_163_174_7_7_set, field_fmt_163_174_7_7_get, NULL, 0}, + {1, field_fmt_175_191_7_7_info, field_fmt_175_191_7_7_set, field_fmt_175_191_7_7_get, NULL, 0}, + {1, field_fmt_192_192_6_6_info, field_fmt_192_192_6_6_set, field_fmt_192_192_6_6_get, NULL, 0}, + {1, field_fmt_193_212_6_6_info, field_fmt_193_212_6_6_set, field_fmt_193_212_6_6_get, NULL, 0}, + {1, field_fmt_213_213_6_6_info, field_fmt_213_213_6_6_set, field_fmt_213_213_6_6_get, NULL, 0}, + {1, field_fmt_214_222_6_6_info, field_fmt_214_222_6_6_set, field_fmt_214_222_6_6_get, NULL, 0}, + {1, field_fmt_223_223_6_6_info, field_fmt_223_223_6_6_set, field_fmt_223_223_6_6_get, NULL, 0}, + {1, field_fmt_224_255_5_5_info, field_fmt_224_255_5_5_set, field_fmt_224_255_5_5_get, NULL, 0}, + {1, field_fmt_256_271_4_4_info, field_fmt_256_271_4_4_set, field_fmt_256_271_4_4_get, NULL, 0}, + {1, field_fmt_272_272_4_4_info, field_fmt_272_272_4_4_set, field_fmt_272_272_4_4_get, bcm78900_b0_rxpmd_ieee_802_1as_timestamp_enabled_names, 0}, + {1, field_fmt_273_276_4_4_info, field_fmt_273_276_4_4_set, field_fmt_273_276_4_4_get, NULL, 0}, + {1, field_fmt_277_277_4_4_info, field_fmt_277_277_4_4_set, field_fmt_277_277_4_4_get, NULL, 0}, + {1, field_fmt_278_278_4_4_info, field_fmt_278_278_4_4_set, field_fmt_278_278_4_4_get, NULL, 0}, + {1, field_fmt_279_280_4_4_info, field_fmt_279_280_4_4_set, field_fmt_279_280_4_4_get, NULL, 0}, + {1, field_fmt_281_287_4_4_info, field_fmt_281_287_4_4_set, field_fmt_281_287_4_4_get, NULL, 0}, + {4, field_fmt_288_415_3_0_info, field_fmt_288_415_3_0_set, field_fmt_288_415_3_0_get, NULL, 0}, }; @@ -2987,52 +2986,52 @@ bcmpkt_pmd_info_t bcm78900_b0_rxpmd_info_get(void) } static bcmpkt_pmd_field_t bcm78900_b0_rx_reason_fields[BCM78900_B0_RX_REASON_COUNT] = { - {"CPU_INVALID_REASON",1, field_fmt_0_0_12_12_info, field_fmt_0_0_12_12_set, field_fmt_0_0_12_12_get, NULL, 0}, - {"CPU_SLF",1, field_fmt_1_1_12_12_info, field_fmt_1_1_12_12_set, field_fmt_1_1_12_12_get, NULL, 0}, - {"CPU_DLF",1, field_fmt_2_2_12_12_info, field_fmt_2_2_12_12_set, field_fmt_2_2_12_12_get, NULL, 0}, - {"CPU_L2MOVE",1, field_fmt_3_3_12_12_info, field_fmt_3_3_12_12_set, field_fmt_3_3_12_12_get, NULL, 0}, - {"CPU_L2CPU",1, field_fmt_4_4_12_12_info, field_fmt_4_4_12_12_set, field_fmt_4_4_12_12_get, NULL, 0}, - {"CPU_L3SRC_MISS",1, field_fmt_5_5_12_12_info, field_fmt_5_5_12_12_set, field_fmt_5_5_12_12_get, NULL, 0}, - {"CPU_L3DST_MISS",1, field_fmt_6_6_12_12_info, field_fmt_6_6_12_12_set, field_fmt_6_6_12_12_get, NULL, 0}, - {"CPU_L3SRC_MOVE",1, field_fmt_7_7_12_12_info, field_fmt_7_7_12_12_set, field_fmt_7_7_12_12_get, NULL, 0}, - {"CPU_MC_MISS",1, field_fmt_8_8_12_12_info, field_fmt_8_8_12_12_set, field_fmt_8_8_12_12_get, NULL, 0}, - {"CPU_IPMC_MISS",1, field_fmt_9_9_12_12_info, field_fmt_9_9_12_12_set, field_fmt_9_9_12_12_get, NULL, 0}, - {"CPU_FFP",1, field_fmt_10_10_12_12_info, field_fmt_10_10_12_12_set, field_fmt_10_10_12_12_get, NULL, 0}, - {"CPU_L3HDR_ERR",1, field_fmt_11_11_12_12_info, field_fmt_11_11_12_12_set, field_fmt_11_11_12_12_get, NULL, 0}, - {"CPU_PROTOCOL_PKT",1, field_fmt_12_12_12_12_info, field_fmt_12_12_12_12_set, field_fmt_12_12_12_12_get, NULL, 0}, - {"CPU_DOS_ATTACK",1, field_fmt_13_13_12_12_info, field_fmt_13_13_12_12_set, field_fmt_13_13_12_12_get, NULL, 0}, - {"CPU_MARTIAN_ADDR",1, field_fmt_14_14_12_12_info, field_fmt_14_14_12_12_set, field_fmt_14_14_12_12_get, NULL, 0}, - {"CPU_TUNNEL_ERR",1, field_fmt_15_15_12_12_info, field_fmt_15_15_12_12_set, field_fmt_15_15_12_12_get, NULL, 0}, - {"CPU_SFLOW_SRC",1, field_fmt_16_16_12_12_info, field_fmt_16_16_12_12_set, field_fmt_16_16_12_12_get, NULL, 0}, - {"CPU_SFLOW_DST",1, field_fmt_17_17_12_12_info, field_fmt_17_17_12_12_set, field_fmt_17_17_12_12_get, NULL, 0}, - {"ICMP_REDIRECT",1, field_fmt_18_18_12_12_info, field_fmt_18_18_12_12_set, field_fmt_18_18_12_12_get, NULL, 0}, - {"L3_SLOWPATH",1, field_fmt_19_19_12_12_info, field_fmt_19_19_12_12_set, field_fmt_19_19_12_12_get, NULL, 0}, - {"PARITY_ERROR",1, field_fmt_20_20_12_12_info, field_fmt_20_20_12_12_set, field_fmt_20_20_12_12_get, NULL, 0}, - {"L3_MTU_CHECK_FAIL",1, field_fmt_21_21_12_12_info, field_fmt_21_21_12_12_set, field_fmt_21_21_12_12_get, NULL, 0}, - {"MPLS_TTL_CHECK",1, field_fmt_22_22_12_12_info, field_fmt_22_22_12_12_set, field_fmt_22_22_12_12_get, NULL, 0}, - {"MPLS_LABEL_MISS",1, field_fmt_23_23_12_12_info, field_fmt_23_23_12_12_set, field_fmt_23_23_12_12_get, NULL, 0}, - {"MPLS_INVALID_ACTION",1, field_fmt_24_24_12_12_info, field_fmt_24_24_12_12_set, field_fmt_24_24_12_12_get, NULL, 0}, - {"MPLS_INVALID_PAYLOAD",1, field_fmt_25_25_12_12_info, field_fmt_25_25_12_12_set, field_fmt_25_25_12_12_get, NULL, 0}, - {"CPU_VFP",1, field_fmt_26_26_12_12_info, field_fmt_26_26_12_12_set, field_fmt_26_26_12_12_get, NULL, 0}, - {"PBT_NONUC_PKT",1, field_fmt_27_27_12_12_info, field_fmt_27_27_12_12_set, field_fmt_27_27_12_12_get, NULL, 0}, - {"L3_NEXT_HOP",1, field_fmt_28_28_12_12_info, field_fmt_28_28_12_12_set, field_fmt_28_28_12_12_get, NULL, 0}, - {"MY_STATION",1, field_fmt_29_29_12_12_info, field_fmt_29_29_12_12_set, field_fmt_29_29_12_12_get, NULL, 0}, - {"TIME_SYNC",1, field_fmt_30_30_12_12_info, field_fmt_30_30_12_12_set, field_fmt_30_30_12_12_get, NULL, 0}, - {"TUNNEL_DECAP_ECN_ERROR",1, field_fmt_31_31_12_12_info, field_fmt_31_31_12_12_set, field_fmt_31_31_12_12_get, NULL, 0}, - {"BFD_SLOWPATH",1, field_fmt_32_32_11_11_info, field_fmt_32_32_11_11_set, field_fmt_32_32_11_11_get, NULL, 0}, - {"BFD_ERROR",1, field_fmt_33_33_11_11_info, field_fmt_33_33_11_11_set, field_fmt_33_33_11_11_get, NULL, 0}, - {"PACKET_TRACE_TO_CPU",1, field_fmt_34_34_11_11_info, field_fmt_34_34_11_11_set, field_fmt_34_34_11_11_get, NULL, 0}, - {"MPLS_UNKNOWN_CONTROL_PKT",1, field_fmt_35_35_11_11_info, field_fmt_35_35_11_11_set, field_fmt_35_35_11_11_get, NULL, 0}, - {"MPLS_ALERT_LABEL",1, field_fmt_36_36_11_11_info, field_fmt_36_36_11_11_set, field_fmt_36_36_11_11_get, NULL, 0}, - {"CPU_IPMC_INTERFACE_MISMATCH",1, field_fmt_37_37_11_11_info, field_fmt_37_37_11_11_set, field_fmt_37_37_11_11_get, NULL, 0}, - {"DLB_MONITOR",1, field_fmt_38_38_11_11_info, field_fmt_38_38_11_11_set, field_fmt_38_38_11_11_get, NULL, 0}, - {"CPU_SFLOW_FLEX",1, field_fmt_39_39_11_11_info, field_fmt_39_39_11_11_set, field_fmt_39_39_11_11_get, NULL, 0}, - {"CPU_UVLAN",1, field_fmt_40_40_11_11_info, field_fmt_40_40_11_11_set, field_fmt_40_40_11_11_get, NULL, 0}, - {"SRV6_ERROR",1, field_fmt_41_41_11_11_info, field_fmt_41_41_11_11_set, field_fmt_41_41_11_11_get, NULL, 0}, - {"VXLAN_VN_ID_MISS",1, field_fmt_42_42_11_11_info, field_fmt_42_42_11_11_set, field_fmt_42_42_11_11_get, NULL, 0}, - {"VXLAN_SIP_MISS",1, field_fmt_43_43_11_11_info, field_fmt_43_43_11_11_set, field_fmt_43_43_11_11_get, NULL, 0}, - {"ADAPT_MISS",1, field_fmt_44_44_11_11_info, field_fmt_44_44_11_11_set, field_fmt_44_44_11_11_get, NULL, 0}, - {"INVALID_GSH_NON_GSH",1, field_fmt_45_45_11_11_info, field_fmt_45_45_11_11_set, field_fmt_45_45_11_11_get, NULL, 0}, + {1, field_fmt_0_0_12_12_info, field_fmt_0_0_12_12_set, field_fmt_0_0_12_12_get, NULL, 0}, + {1, field_fmt_1_1_12_12_info, field_fmt_1_1_12_12_set, field_fmt_1_1_12_12_get, NULL, 0}, + {1, field_fmt_2_2_12_12_info, field_fmt_2_2_12_12_set, field_fmt_2_2_12_12_get, NULL, 0}, + {1, field_fmt_3_3_12_12_info, field_fmt_3_3_12_12_set, field_fmt_3_3_12_12_get, NULL, 0}, + {1, field_fmt_4_4_12_12_info, field_fmt_4_4_12_12_set, field_fmt_4_4_12_12_get, NULL, 0}, + {1, field_fmt_5_5_12_12_info, field_fmt_5_5_12_12_set, field_fmt_5_5_12_12_get, NULL, 0}, + {1, field_fmt_6_6_12_12_info, field_fmt_6_6_12_12_set, field_fmt_6_6_12_12_get, NULL, 0}, + {1, field_fmt_7_7_12_12_info, field_fmt_7_7_12_12_set, field_fmt_7_7_12_12_get, NULL, 0}, + {1, field_fmt_8_8_12_12_info, field_fmt_8_8_12_12_set, field_fmt_8_8_12_12_get, NULL, 0}, + {1, field_fmt_9_9_12_12_info, field_fmt_9_9_12_12_set, field_fmt_9_9_12_12_get, NULL, 0}, + {1, field_fmt_10_10_12_12_info, field_fmt_10_10_12_12_set, field_fmt_10_10_12_12_get, NULL, 0}, + {1, field_fmt_11_11_12_12_info, field_fmt_11_11_12_12_set, field_fmt_11_11_12_12_get, NULL, 0}, + {1, field_fmt_12_12_12_12_info, field_fmt_12_12_12_12_set, field_fmt_12_12_12_12_get, NULL, 0}, + {1, field_fmt_13_13_12_12_info, field_fmt_13_13_12_12_set, field_fmt_13_13_12_12_get, NULL, 0}, + {1, field_fmt_14_14_12_12_info, field_fmt_14_14_12_12_set, field_fmt_14_14_12_12_get, NULL, 0}, + {1, field_fmt_15_15_12_12_info, field_fmt_15_15_12_12_set, field_fmt_15_15_12_12_get, NULL, 0}, + {1, field_fmt_16_16_12_12_info, field_fmt_16_16_12_12_set, field_fmt_16_16_12_12_get, NULL, 0}, + {1, field_fmt_17_17_12_12_info, field_fmt_17_17_12_12_set, field_fmt_17_17_12_12_get, NULL, 0}, + {1, field_fmt_18_18_12_12_info, field_fmt_18_18_12_12_set, field_fmt_18_18_12_12_get, NULL, 0}, + {1, field_fmt_19_19_12_12_info, field_fmt_19_19_12_12_set, field_fmt_19_19_12_12_get, NULL, 0}, + {1, field_fmt_20_20_12_12_info, field_fmt_20_20_12_12_set, field_fmt_20_20_12_12_get, NULL, 0}, + {1, field_fmt_21_21_12_12_info, field_fmt_21_21_12_12_set, field_fmt_21_21_12_12_get, NULL, 0}, + {1, field_fmt_22_22_12_12_info, field_fmt_22_22_12_12_set, field_fmt_22_22_12_12_get, NULL, 0}, + {1, field_fmt_23_23_12_12_info, field_fmt_23_23_12_12_set, field_fmt_23_23_12_12_get, NULL, 0}, + {1, field_fmt_24_24_12_12_info, field_fmt_24_24_12_12_set, field_fmt_24_24_12_12_get, NULL, 0}, + {1, field_fmt_25_25_12_12_info, field_fmt_25_25_12_12_set, field_fmt_25_25_12_12_get, NULL, 0}, + {1, field_fmt_26_26_12_12_info, field_fmt_26_26_12_12_set, field_fmt_26_26_12_12_get, NULL, 0}, + {1, field_fmt_27_27_12_12_info, field_fmt_27_27_12_12_set, field_fmt_27_27_12_12_get, NULL, 0}, + {1, field_fmt_28_28_12_12_info, field_fmt_28_28_12_12_set, field_fmt_28_28_12_12_get, NULL, 0}, + {1, field_fmt_29_29_12_12_info, field_fmt_29_29_12_12_set, field_fmt_29_29_12_12_get, NULL, 0}, + {1, field_fmt_30_30_12_12_info, field_fmt_30_30_12_12_set, field_fmt_30_30_12_12_get, NULL, 0}, + {1, field_fmt_31_31_12_12_info, field_fmt_31_31_12_12_set, field_fmt_31_31_12_12_get, NULL, 0}, + {1, field_fmt_32_32_11_11_info, field_fmt_32_32_11_11_set, field_fmt_32_32_11_11_get, NULL, 0}, + {1, field_fmt_33_33_11_11_info, field_fmt_33_33_11_11_set, field_fmt_33_33_11_11_get, NULL, 0}, + {1, field_fmt_34_34_11_11_info, field_fmt_34_34_11_11_set, field_fmt_34_34_11_11_get, NULL, 0}, + {1, field_fmt_35_35_11_11_info, field_fmt_35_35_11_11_set, field_fmt_35_35_11_11_get, NULL, 0}, + {1, field_fmt_36_36_11_11_info, field_fmt_36_36_11_11_set, field_fmt_36_36_11_11_get, NULL, 0}, + {1, field_fmt_37_37_11_11_info, field_fmt_37_37_11_11_set, field_fmt_37_37_11_11_get, NULL, 0}, + {1, field_fmt_38_38_11_11_info, field_fmt_38_38_11_11_set, field_fmt_38_38_11_11_get, NULL, 0}, + {1, field_fmt_39_39_11_11_info, field_fmt_39_39_11_11_set, field_fmt_39_39_11_11_get, NULL, 0}, + {1, field_fmt_40_40_11_11_info, field_fmt_40_40_11_11_set, field_fmt_40_40_11_11_get, NULL, 0}, + {1, field_fmt_41_41_11_11_info, field_fmt_41_41_11_11_set, field_fmt_41_41_11_11_get, NULL, 0}, + {1, field_fmt_42_42_11_11_info, field_fmt_42_42_11_11_set, field_fmt_42_42_11_11_get, NULL, 0}, + {1, field_fmt_43_43_11_11_info, field_fmt_43_43_11_11_set, field_fmt_43_43_11_11_get, NULL, 0}, + {1, field_fmt_44_44_11_11_info, field_fmt_44_44_11_11_set, field_fmt_44_44_11_11_get, NULL, 0}, + {1, field_fmt_45_45_11_11_info, field_fmt_45_45_11_11_set, field_fmt_45_45_11_11_get, NULL, 0}, }; @@ -3048,7 +3047,7 @@ bcmpkt_pmd_info_t bcm78900_b0_rx_reason_info_get(void) } static bcmpkt_pmd_field_t bcm78900_b0_ep_rx_reason_fields[BCM78900_B0_EP_RX_REASON_COUNT] = { - {"EP_CTC",1, field_fmt_0_0_12_12_info, field_fmt_0_0_12_12_set, field_fmt_0_0_12_12_get, NULL, 0}, + {1, field_fmt_0_0_12_12_info, field_fmt_0_0_12_12_set, field_fmt_0_0_12_12_get, NULL, 0}, }; @@ -3089,41 +3088,41 @@ static const shr_enum_map_t bcm78900_b0_txpmd_start_names[] = }; static bcmpkt_pmd_field_t bcm78900_b0_txpmd_fields[BCM78900_B0_TXPMD_COUNT] = { - {"CPU_TX::ECMP_MEMBER_ID",1, field_fmt_0_16_3_3_info, field_fmt_0_16_3_3_set, field_fmt_0_16_3_3_get, NULL, 2}, - {"CPU_TX::MCAST_LB_INDEX",1, field_fmt_0_7_3_3_info, field_fmt_0_7_3_3_set, field_fmt_0_7_3_3_get, NULL, 2}, - {"CPU_TX::DESTINATION",1, field_fmt_17_32_3_2_info, field_fmt_17_32_3_2_set, field_fmt_17_32_3_2_get, NULL, 2}, - {"CPU_TX::DESTINATION_TYPE",1, field_fmt_33_36_2_2_info, field_fmt_33_36_2_2_set, field_fmt_33_36_2_2_get, bcm78900_b0_txpmd_cpu_tx_destination_type_names, 2}, - {"CPU_TX::DP",1, field_fmt_37_38_2_2_info, field_fmt_37_38_2_2_set, field_fmt_37_38_2_2_get, bcm78900_b0_txpmd_cpu_tx_dp_names, 2}, - {"CPU_TX::INPUT_PRI",1, field_fmt_39_42_2_2_info, field_fmt_39_42_2_2_set, field_fmt_39_42_2_2_get, NULL, 2}, - {"CPU_TX::INT_CN",1, field_fmt_43_44_2_2_info, field_fmt_43_44_2_2_set, field_fmt_43_44_2_2_get, NULL, 2}, - {"CPU_TX::INT_PRI",1, field_fmt_45_48_2_2_info, field_fmt_45_48_2_2_set, field_fmt_45_48_2_2_get, NULL, 2}, - {"CPU_TX::MCAST_LB_INDEX_VLD",1, field_fmt_49_49_2_2_info, field_fmt_49_49_2_2_set, field_fmt_49_49_2_2_get, NULL, 2}, - {"CPU_TX::PKT_PROFILE",1, field_fmt_50_52_2_2_info, field_fmt_50_52_2_2_set, field_fmt_50_52_2_2_get, NULL, 2}, - {"CPU_TX::QOS_FIELDS_VLD",1, field_fmt_53_53_2_2_info, field_fmt_53_53_2_2_set, field_fmt_53_53_2_2_get, NULL, 2}, - {"CPU_TX::ROUTED_PKT",1, field_fmt_54_54_2_2_info, field_fmt_54_54_2_2_set, field_fmt_54_54_2_2_get, NULL, 2}, - {"CPU_TX::VRF",1, field_fmt_55_67_2_1_info, field_fmt_55_67_2_1_set, field_fmt_55_67_2_1_get, NULL, 2}, - {"CPU_TX::VRF_VALID",1, field_fmt_68_68_1_1_info, field_fmt_68_68_1_1_set, field_fmt_68_68_1_1_get, NULL, 2}, - {"SOBMH_FROM_CPU::CELL_ERROR",1, field_fmt_0_0_3_3_info, field_fmt_0_0_3_3_set, field_fmt_0_0_3_3_get, NULL, 1}, - {"SOBMH_FROM_CPU::CNG",1, field_fmt_1_2_3_3_info, field_fmt_1_2_3_3_set, field_fmt_1_2_3_3_get, NULL, 1}, - {"SOBMH_FROM_CPU::COS",1, field_fmt_3_8_3_3_info, field_fmt_3_8_3_3_set, field_fmt_3_8_3_3_get, NULL, 1}, - {"SOBMH_FROM_CPU::DESTINATION",1, field_fmt_9_24_3_3_info, field_fmt_9_24_3_3_set, field_fmt_9_24_3_3_get, NULL, 1}, - {"SOBMH_FROM_CPU::DESTINATION_TYPE",1, field_fmt_25_28_3_3_info, field_fmt_25_28_3_3_set, field_fmt_25_28_3_3_get, bcm78900_b0_txpmd_sobmh_from_cpu_destination_type_names, 1}, - {"SOBMH_FROM_CPU::IEEE1588_INGRESS_TIMESTAMP_SIGN",1, field_fmt_29_29_3_3_info, field_fmt_29_29_3_3_set, field_fmt_29_29_3_3_get, NULL, 1}, - {"SOBMH_FROM_CPU::IEEE1588_ONE_STEP_ENABLE",1, field_fmt_30_30_3_3_info, field_fmt_30_30_3_3_set, field_fmt_30_30_3_3_get, NULL, 1}, - {"SOBMH_FROM_CPU::IEEE1588_REGEN_UDP_CHECKSUM",1, field_fmt_31_31_3_3_info, field_fmt_31_31_3_3_set, field_fmt_31_31_3_3_get, NULL, 1}, - {"SOBMH_FROM_CPU::IEEE1588_TIMESTAMP_HDR_OFFSET",1, field_fmt_32_39_2_2_info, field_fmt_32_39_2_2_set, field_fmt_32_39_2_2_get, NULL, 1}, - {"SOBMH_FROM_CPU::INPUT_PRI",1, field_fmt_40_43_2_2_info, field_fmt_40_43_2_2_set, field_fmt_40_43_2_2_get, NULL, 1}, - {"SOBMH_FROM_CPU::RQE_Q_NUM",1, field_fmt_44_46_2_2_info, field_fmt_44_46_2_2_set, field_fmt_44_46_2_2_get, NULL, 1}, - {"SOBMH_FROM_CPU::SPAP",1, field_fmt_47_48_2_2_info, field_fmt_47_48_2_2_set, field_fmt_47_48_2_2_get, NULL, 1}, - {"SOBMH_FROM_CPU::SPID",1, field_fmt_49_50_2_2_info, field_fmt_49_50_2_2_set, field_fmt_49_50_2_2_get, NULL, 1}, - {"SOBMH_FROM_CPU::SPID_OVERRIDE",1, field_fmt_51_51_2_2_info, field_fmt_51_51_2_2_set, field_fmt_51_51_2_2_get, NULL, 1}, - {"SOBMH_FROM_CPU::SRC_MODID",1, field_fmt_52_59_2_2_info, field_fmt_52_59_2_2_set, field_fmt_52_59_2_2_get, NULL, 1}, - {"SOBMH_FROM_CPU::TX_TS",1, field_fmt_60_60_2_2_info, field_fmt_60_60_2_2_set, field_fmt_60_60_2_2_get, NULL, 1}, - {"SOBMH_FROM_CPU::UNICAST",1, field_fmt_61_61_2_2_info, field_fmt_61_61_2_2_set, field_fmt_61_61_2_2_get, NULL, 1}, - {"SOBMH_FROM_CPU::WRED_MARK_ELIGIBLE",1, field_fmt_62_62_2_2_info, field_fmt_62_62_2_2_set, field_fmt_62_62_2_2_get, NULL, 1}, - {"SOBMH_FROM_CPU::WRED_RESPONSE",1, field_fmt_63_63_2_2_info, field_fmt_63_63_2_2_set, field_fmt_63_63_2_2_get, NULL, 1}, - {"HEADER_TYPE",1, field_fmt_120_125_0_0_info, field_fmt_120_125_0_0_set, field_fmt_120_125_0_0_get, bcm78900_b0_txpmd_header_type_names, 0}, - {"START",1, field_fmt_126_127_0_0_info, field_fmt_126_127_0_0_set, field_fmt_126_127_0_0_get, bcm78900_b0_txpmd_start_names, 0}, + {1, field_fmt_0_16_3_3_info, field_fmt_0_16_3_3_set, field_fmt_0_16_3_3_get, NULL, 2}, + {1, field_fmt_0_7_3_3_info, field_fmt_0_7_3_3_set, field_fmt_0_7_3_3_get, NULL, 2}, + {1, field_fmt_17_32_3_2_info, field_fmt_17_32_3_2_set, field_fmt_17_32_3_2_get, NULL, 2}, + {1, field_fmt_33_36_2_2_info, field_fmt_33_36_2_2_set, field_fmt_33_36_2_2_get, bcm78900_b0_txpmd_cpu_tx_destination_type_names, 2}, + {1, field_fmt_37_38_2_2_info, field_fmt_37_38_2_2_set, field_fmt_37_38_2_2_get, bcm78900_b0_txpmd_cpu_tx_dp_names, 2}, + {1, field_fmt_39_42_2_2_info, field_fmt_39_42_2_2_set, field_fmt_39_42_2_2_get, NULL, 2}, + {1, field_fmt_43_44_2_2_info, field_fmt_43_44_2_2_set, field_fmt_43_44_2_2_get, NULL, 2}, + {1, field_fmt_45_48_2_2_info, field_fmt_45_48_2_2_set, field_fmt_45_48_2_2_get, NULL, 2}, + {1, field_fmt_49_49_2_2_info, field_fmt_49_49_2_2_set, field_fmt_49_49_2_2_get, NULL, 2}, + {1, field_fmt_50_52_2_2_info, field_fmt_50_52_2_2_set, field_fmt_50_52_2_2_get, NULL, 2}, + {1, field_fmt_53_53_2_2_info, field_fmt_53_53_2_2_set, field_fmt_53_53_2_2_get, NULL, 2}, + {1, field_fmt_54_54_2_2_info, field_fmt_54_54_2_2_set, field_fmt_54_54_2_2_get, NULL, 2}, + {1, field_fmt_55_67_2_1_info, field_fmt_55_67_2_1_set, field_fmt_55_67_2_1_get, NULL, 2}, + {1, field_fmt_68_68_1_1_info, field_fmt_68_68_1_1_set, field_fmt_68_68_1_1_get, NULL, 2}, + {1, field_fmt_0_0_3_3_info, field_fmt_0_0_3_3_set, field_fmt_0_0_3_3_get, NULL, 1}, + {1, field_fmt_1_2_3_3_info, field_fmt_1_2_3_3_set, field_fmt_1_2_3_3_get, NULL, 1}, + {1, field_fmt_3_8_3_3_info, field_fmt_3_8_3_3_set, field_fmt_3_8_3_3_get, NULL, 1}, + {1, field_fmt_9_24_3_3_info, field_fmt_9_24_3_3_set, field_fmt_9_24_3_3_get, NULL, 1}, + {1, field_fmt_25_28_3_3_info, field_fmt_25_28_3_3_set, field_fmt_25_28_3_3_get, bcm78900_b0_txpmd_sobmh_from_cpu_destination_type_names, 1}, + {1, field_fmt_29_29_3_3_info, field_fmt_29_29_3_3_set, field_fmt_29_29_3_3_get, NULL, 1}, + {1, field_fmt_30_30_3_3_info, field_fmt_30_30_3_3_set, field_fmt_30_30_3_3_get, NULL, 1}, + {1, field_fmt_31_31_3_3_info, field_fmt_31_31_3_3_set, field_fmt_31_31_3_3_get, NULL, 1}, + {1, field_fmt_32_39_2_2_info, field_fmt_32_39_2_2_set, field_fmt_32_39_2_2_get, NULL, 1}, + {1, field_fmt_40_43_2_2_info, field_fmt_40_43_2_2_set, field_fmt_40_43_2_2_get, NULL, 1}, + {1, field_fmt_44_46_2_2_info, field_fmt_44_46_2_2_set, field_fmt_44_46_2_2_get, NULL, 1}, + {1, field_fmt_47_48_2_2_info, field_fmt_47_48_2_2_set, field_fmt_47_48_2_2_get, NULL, 1}, + {1, field_fmt_49_50_2_2_info, field_fmt_49_50_2_2_set, field_fmt_49_50_2_2_get, NULL, 1}, + {1, field_fmt_51_51_2_2_info, field_fmt_51_51_2_2_set, field_fmt_51_51_2_2_get, NULL, 1}, + {1, field_fmt_52_59_2_2_info, field_fmt_52_59_2_2_set, field_fmt_52_59_2_2_get, NULL, 1}, + {1, field_fmt_60_60_2_2_info, field_fmt_60_60_2_2_set, field_fmt_60_60_2_2_get, NULL, 1}, + {1, field_fmt_61_61_2_2_info, field_fmt_61_61_2_2_set, field_fmt_61_61_2_2_get, NULL, 1}, + {1, field_fmt_62_62_2_2_info, field_fmt_62_62_2_2_set, field_fmt_62_62_2_2_get, NULL, 1}, + {1, field_fmt_63_63_2_2_info, field_fmt_63_63_2_2_set, field_fmt_63_63_2_2_get, NULL, 1}, + {1, field_fmt_120_125_0_0_info, field_fmt_120_125_0_0_set, field_fmt_120_125_0_0_get, bcm78900_b0_txpmd_header_type_names, 0}, + {1, field_fmt_126_127_0_0_info, field_fmt_126_127_0_0_set, field_fmt_126_127_0_0_get, bcm78900_b0_txpmd_start_names, 0}, }; @@ -3149,20 +3148,20 @@ static const shr_enum_map_t bcm78900_b0_lbhdr_start_names[] = }; static bcmpkt_pmd_field_t bcm78900_b0_lbhdr_fields[BCM78900_B0_LBHDR_COUNT] = { - {"VISIBILITY_PKT",1, field_fmt_45_45_2_2_info, field_fmt_45_45_2_2_set, field_fmt_45_45_2_2_get, NULL, 0}, - {"VRF_VALID",1, field_fmt_46_46_2_2_info, field_fmt_46_46_2_2_set, field_fmt_46_46_2_2_get, NULL, 0}, - {"ROUTED_PKT",1, field_fmt_47_47_2_2_info, field_fmt_47_47_2_2_set, field_fmt_47_47_2_2_get, NULL, 0}, - {"VRF",1, field_fmt_66_78_1_1_info, field_fmt_66_78_1_1_set, field_fmt_66_78_1_1_get, NULL, 0}, - {"PKT_PROFILE",1, field_fmt_80_82_1_1_info, field_fmt_80_82_1_1_set, field_fmt_80_82_1_1_get, NULL, 0}, - {"QOS_FIELD_VALID",1, field_fmt_83_83_1_1_info, field_fmt_83_83_1_1_set, field_fmt_83_83_1_1_get, NULL, 0}, - {"PP_PORT",1, field_fmt_85_93_1_1_info, field_fmt_85_93_1_1_set, field_fmt_85_93_1_1_get, NULL, 0}, - {"OPAQUE_OBJECT",1, field_fmt_104_107_0_0_info, field_fmt_104_107_0_0_set, field_fmt_104_107_0_0_get, NULL, 0}, - {"QOS_FIELD_ETH",1, field_fmt_108_115_0_0_info, field_fmt_108_115_0_0_set, field_fmt_108_115_0_0_get, NULL, 0}, - {"INT_PRI_ETH",1, field_fmt_108_111_0_0_info, field_fmt_108_111_0_0_set, field_fmt_108_111_0_0_get, NULL, 0}, - {"INT_CN_ETH",1, field_fmt_112_113_0_0_info, field_fmt_112_113_0_0_set, field_fmt_112_113_0_0_get, NULL, 0}, - {"CNG_ETH",1, field_fmt_114_115_0_0_info, field_fmt_114_115_0_0_set, field_fmt_114_115_0_0_get, NULL, 0}, - {"HEADER_TYPE",1, field_fmt_120_125_0_0_info, field_fmt_120_125_0_0_set, field_fmt_120_125_0_0_get, bcm78900_b0_lbhdr_header_type_names, 0}, - {"START",1, field_fmt_126_127_0_0_info, field_fmt_126_127_0_0_set, field_fmt_126_127_0_0_get, bcm78900_b0_lbhdr_start_names, 0}, + {1, field_fmt_45_45_2_2_info, field_fmt_45_45_2_2_set, field_fmt_45_45_2_2_get, NULL, 0}, + {1, field_fmt_46_46_2_2_info, field_fmt_46_46_2_2_set, field_fmt_46_46_2_2_get, NULL, 0}, + {1, field_fmt_47_47_2_2_info, field_fmt_47_47_2_2_set, field_fmt_47_47_2_2_get, NULL, 0}, + {1, field_fmt_66_78_1_1_info, field_fmt_66_78_1_1_set, field_fmt_66_78_1_1_get, NULL, 0}, + {1, field_fmt_80_82_1_1_info, field_fmt_80_82_1_1_set, field_fmt_80_82_1_1_get, NULL, 0}, + {1, field_fmt_83_83_1_1_info, field_fmt_83_83_1_1_set, field_fmt_83_83_1_1_get, NULL, 0}, + {1, field_fmt_85_93_1_1_info, field_fmt_85_93_1_1_set, field_fmt_85_93_1_1_get, NULL, 0}, + {1, field_fmt_104_107_0_0_info, field_fmt_104_107_0_0_set, field_fmt_104_107_0_0_get, NULL, 0}, + {1, field_fmt_108_115_0_0_info, field_fmt_108_115_0_0_set, field_fmt_108_115_0_0_get, NULL, 0}, + {1, field_fmt_108_111_0_0_info, field_fmt_108_111_0_0_set, field_fmt_108_111_0_0_get, NULL, 0}, + {1, field_fmt_112_113_0_0_info, field_fmt_112_113_0_0_set, field_fmt_112_113_0_0_get, NULL, 0}, + {1, field_fmt_114_115_0_0_info, field_fmt_114_115_0_0_set, field_fmt_114_115_0_0_get, NULL, 0}, + {1, field_fmt_120_125_0_0_info, field_fmt_120_125_0_0_set, field_fmt_120_125_0_0_get, bcm78900_b0_lbhdr_header_type_names, 0}, + {1, field_fmt_126_127_0_0_info, field_fmt_126_127_0_0_set, field_fmt_126_127_0_0_get, bcm78900_b0_lbhdr_start_names, 0}, }; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pkt_lbhdr.c similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pkt_lbhdr.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pkt_lbhdr.c index 33501e35397..d40971d1a4b 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pkt_lbhdr.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pkt_lbhdr.c @@ -5,8 +5,7 @@ * Edits to this file will be lost when it is regenerated. * Tool: INTERNAL/regs/xgs/generate-pmd.pl * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pkt_rxpmd.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pkt_rxpmd.c similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pkt_rxpmd.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pkt_rxpmd.c index 59eba6b2c49..8e7feab9a6b 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pkt_rxpmd.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pkt_rxpmd.c @@ -5,8 +5,7 @@ * Edits to this file will be lost when it is regenerated. * Tool: INTERNAL/regs/xgs/generate-pmd.pl * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -995,8 +994,6 @@ const bcmpkt_rxpmd_fget_t bcm78905_a0_rxpmd_fget = { NULL, NULL, NULL, - NULL, - NULL, NULL } }; @@ -1102,8 +1099,6 @@ const bcmpkt_rxpmd_fset_t bcm78905_a0_rxpmd_fset = { NULL, NULL, NULL, - NULL, - NULL, NULL } }; @@ -1130,7 +1125,7 @@ static int bcm78905_a0_rxpmd_view_infos[BCMPKT_RXPMD_FID_COUNT] = { -1, -1, -1, -1, -1, -1, -1, -2, -1, -1, -1, -1, -1, -2, -2, -2, -2, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -2, -2, -2, -1, -1, -2, -2, -1, -2, -2, -2, -2, -1, -2, -2, -2, -2, -2, -2, - -2, -2, -2, -2, -2, + -2, -2, -2, }; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pkt_txpmd.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pkt_txpmd.c similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pkt_txpmd.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pkt_txpmd.c index 2fe10e95679..2884f806135 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pkt_txpmd.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pkt_txpmd.c @@ -5,8 +5,7 @@ * Edits to this file will be lost when it is regenerated. * Tool: INTERNAL/regs/xgs/generate-pmd.pl * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -793,7 +792,6 @@ const bcmpkt_txpmd_fget_t bcm78905_a0_txpmd_fget = { NULL, NULL, NULL, - NULL, NULL } }; @@ -929,7 +927,6 @@ const bcmpkt_txpmd_fset_t bcm78905_a0_txpmd_fset = { NULL, NULL, NULL, - NULL, NULL } }; @@ -957,7 +954,7 @@ static int bcm78905_a0_txpmd_view_infos[BCMPKT_TXPMD_FID_COUNT] = { -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, - -2, -2, + -2, }; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pmd_field.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pmd_field.c similarity index 77% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pmd_field.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pmd_field.c index 395079e8598..bf5f0f4a265 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pmd_field.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pmd_field.c @@ -5,8 +5,7 @@ * Edits to this file will be lost when it is regenerated. * Tool: INTERNAL/regs/xgs/generate-pmd.pl * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -2926,52 +2925,52 @@ static const shr_enum_map_t bcm78905_a0_rxpmd_ieee_802_1as_timestamp_enabled_nam }; static bcmpkt_pmd_field_t bcm78905_a0_rxpmd_fields[BCM78905_A0_RXPMD_COUNT] = { - {"REASON",2, field_fmt_0_63_12_11_info, field_fmt_0_63_12_11_set, field_fmt_0_63_12_11_get, NULL, 0}, - {"REASON_TYPE",1, field_fmt_64_67_10_10_info, field_fmt_64_67_10_10_set, field_fmt_64_67_10_10_get, bcm78905_a0_rxpmd_reason_type_names, 0}, - {"ING_L3_INTF",1, field_fmt_68_80_10_10_info, field_fmt_68_80_10_10_set, field_fmt_68_80_10_10_get, NULL, 0}, - {"I2E_CLASSID",1, field_fmt_68_79_10_10_info, field_fmt_68_79_10_10_set, field_fmt_68_79_10_10_get, NULL, 0}, - {"RX_BFD_SESSION_INDEX",1, field_fmt_68_79_10_10_info, field_fmt_68_79_10_10_set, field_fmt_68_79_10_10_get, NULL, 0}, - {"I2E_CLASSID_TYPE",1, field_fmt_80_83_10_10_info, field_fmt_80_83_10_10_set, field_fmt_80_83_10_10_get, NULL, 0}, - {"RX_BFD_START_OFFSET_TYPE",1, field_fmt_80_81_10_10_info, field_fmt_80_81_10_10_set, field_fmt_80_81_10_10_get, NULL, 0}, - {"RX_BFD_START_OFFSET",1, field_fmt_82_89_10_10_info, field_fmt_82_89_10_10_set, field_fmt_82_89_10_10_get, NULL, 0}, - {"ING_L3_INTF_VALID",1, field_fmt_84_84_10_10_info, field_fmt_84_84_10_10_set, field_fmt_84_84_10_10_get, NULL, 0}, - {"CPU_COS",1, field_fmt_90_95_10_10_info, field_fmt_90_95_10_10_set, field_fmt_90_95_10_10_get, NULL, 0}, - {"QUEUE_NUM",1, field_fmt_90_95_10_10_info, field_fmt_90_95_10_10_set, field_fmt_90_95_10_10_get, NULL, 0}, - {"INCOMING_TAG_STATUS",1, field_fmt_96_96_9_9_info, field_fmt_96_96_9_9_set, field_fmt_96_96_9_9_get, NULL, 0}, - {"ING_OTAG_ACTION",1, field_fmt_97_98_9_9_info, field_fmt_97_98_9_9_set, field_fmt_97_98_9_9_get, NULL, 0}, - {"PKT_LENGTH",1, field_fmt_99_112_9_9_info, field_fmt_99_112_9_9_set, field_fmt_99_112_9_9_get, NULL, 0}, - {"O_NHI",1, field_fmt_113_127_9_9_info, field_fmt_113_127_9_9_set, field_fmt_113_127_9_9_get, NULL, 0}, - {"INCOMING_OPAQUE_TAG_STATUS",1, field_fmt_128_128_8_8_info, field_fmt_128_128_8_8_set, field_fmt_128_128_8_8_get, NULL, 0}, - {"BPDU",1, field_fmt_129_129_8_8_info, field_fmt_129_129_8_8_set, field_fmt_129_129_8_8_get, NULL, 0}, - {"CHANGE_DSCP",1, field_fmt_130_130_8_8_info, field_fmt_130_130_8_8_set, field_fmt_130_130_8_8_get, NULL, 0}, - {"CHANGE_ECN",1, field_fmt_131_131_8_8_info, field_fmt_131_131_8_8_set, field_fmt_131_131_8_8_get, NULL, 0}, - {"DLB_ID_VALID",1, field_fmt_132_132_8_8_info, field_fmt_132_132_8_8_set, field_fmt_132_132_8_8_get, NULL, 0}, - {"DO_NOT_CHANGE_TTL",1, field_fmt_133_133_8_8_info, field_fmt_133_133_8_8_set, field_fmt_133_133_8_8_get, NULL, 0}, - {"DSCP",1, field_fmt_134_139_8_8_info, field_fmt_134_139_8_8_set, field_fmt_134_139_8_8_get, NULL, 0}, - {"SPECIAL_PACKET_TYPE",1, field_fmt_134_136_8_8_info, field_fmt_134_136_8_8_set, field_fmt_134_136_8_8_get, NULL, 0}, - {"ECN",1, field_fmt_140_141_8_8_info, field_fmt_140_141_8_8_set, field_fmt_140_141_8_8_get, NULL, 0}, - {"IP_ROUTED",1, field_fmt_142_142_8_8_info, field_fmt_142_142_8_8_set, field_fmt_142_142_8_8_get, NULL, 0}, - {"L3ONLY",1, field_fmt_143_143_8_8_info, field_fmt_143_143_8_8_set, field_fmt_143_143_8_8_get, NULL, 0}, - {"MATCHED_RULE",1, field_fmt_144_155_8_8_info, field_fmt_144_155_8_8_set, field_fmt_144_155_8_8_get, NULL, 0}, - {"MTP_INDEX",1, field_fmt_156_158_8_8_info, field_fmt_156_158_8_8_set, field_fmt_156_158_8_8_get, NULL, 0}, - {"OUTER_CFI",1, field_fmt_159_159_8_8_info, field_fmt_159_159_8_8_set, field_fmt_159_159_8_8_get, NULL, 0}, - {"OUTER_PRI",1, field_fmt_160_162_7_7_info, field_fmt_160_162_7_7_set, field_fmt_160_162_7_7_get, NULL, 0}, - {"OUTER_VID",1, field_fmt_163_174_7_7_info, field_fmt_163_174_7_7_set, field_fmt_163_174_7_7_get, NULL, 0}, - {"REPLICATION_OR_NHOP_INDEX",1, field_fmt_175_191_7_7_info, field_fmt_175_191_7_7_set, field_fmt_175_191_7_7_get, NULL, 0}, - {"REGEN_CRC",1, field_fmt_192_192_6_6_info, field_fmt_192_192_6_6_set, field_fmt_192_192_6_6_get, NULL, 0}, - {"ENTROPY_LABEL",1, field_fmt_193_212_6_6_info, field_fmt_193_212_6_6_set, field_fmt_193_212_6_6_get, NULL, 0}, - {"SPECIAL_PACKET_INDICATOR",1, field_fmt_213_213_6_6_info, field_fmt_213_213_6_6_set, field_fmt_213_213_6_6_get, NULL, 0}, - {"SRC_PORT_NUM",1, field_fmt_214_222_6_6_info, field_fmt_214_222_6_6_set, field_fmt_214_222_6_6_get, NULL, 0}, - {"SWITCH",1, field_fmt_223_223_6_6_info, field_fmt_223_223_6_6_set, field_fmt_223_223_6_6_get, NULL, 0}, - {"TIMESTAMP",1, field_fmt_224_255_5_5_info, field_fmt_224_255_5_5_set, field_fmt_224_255_5_5_get, NULL, 0}, - {"TIMESTAMP_HI",1, field_fmt_256_271_4_4_info, field_fmt_256_271_4_4_set, field_fmt_256_271_4_4_get, NULL, 0}, - {"IEEE_802_1AS_TIMESTAMP_ENABLED",1, field_fmt_272_272_4_4_info, field_fmt_272_272_4_4_set, field_fmt_272_272_4_4_get, bcm78905_a0_rxpmd_ieee_802_1as_timestamp_enabled_names, 0}, - {"TUNNEL_DECAP_TYPE",1, field_fmt_273_276_4_4_info, field_fmt_273_276_4_4_set, field_fmt_273_276_4_4_get, NULL, 0}, - {"UC_SW_COPY_DROPPED",1, field_fmt_277_277_4_4_info, field_fmt_277_277_4_4_set, field_fmt_277_277_4_4_get, NULL, 0}, - {"UNICAST_QUEUE",1, field_fmt_278_278_4_4_info, field_fmt_278_278_4_4_set, field_fmt_278_278_4_4_get, NULL, 0}, - {"INCOMING_INT_HDR_TYPE",1, field_fmt_279_280_4_4_info, field_fmt_279_280_4_4_set, field_fmt_279_280_4_4_get, NULL, 0}, - {"DLB_ID",1, field_fmt_281_287_4_4_info, field_fmt_281_287_4_4_set, field_fmt_281_287_4_4_get, NULL, 0}, - {"MODULE_HDR",4, field_fmt_288_415_3_0_info, field_fmt_288_415_3_0_set, field_fmt_288_415_3_0_get, NULL, 0}, + {2, field_fmt_0_63_12_11_info, field_fmt_0_63_12_11_set, field_fmt_0_63_12_11_get, NULL, 0}, + {1, field_fmt_64_67_10_10_info, field_fmt_64_67_10_10_set, field_fmt_64_67_10_10_get, bcm78905_a0_rxpmd_reason_type_names, 0}, + {1, field_fmt_68_80_10_10_info, field_fmt_68_80_10_10_set, field_fmt_68_80_10_10_get, NULL, 0}, + {1, field_fmt_68_79_10_10_info, field_fmt_68_79_10_10_set, field_fmt_68_79_10_10_get, NULL, 0}, + {1, field_fmt_68_79_10_10_info, field_fmt_68_79_10_10_set, field_fmt_68_79_10_10_get, NULL, 0}, + {1, field_fmt_80_83_10_10_info, field_fmt_80_83_10_10_set, field_fmt_80_83_10_10_get, NULL, 0}, + {1, field_fmt_80_81_10_10_info, field_fmt_80_81_10_10_set, field_fmt_80_81_10_10_get, NULL, 0}, + {1, field_fmt_82_89_10_10_info, field_fmt_82_89_10_10_set, field_fmt_82_89_10_10_get, NULL, 0}, + {1, field_fmt_84_84_10_10_info, field_fmt_84_84_10_10_set, field_fmt_84_84_10_10_get, NULL, 0}, + {1, field_fmt_90_95_10_10_info, field_fmt_90_95_10_10_set, field_fmt_90_95_10_10_get, NULL, 0}, + {1, field_fmt_90_95_10_10_info, field_fmt_90_95_10_10_set, field_fmt_90_95_10_10_get, NULL, 0}, + {1, field_fmt_96_96_9_9_info, field_fmt_96_96_9_9_set, field_fmt_96_96_9_9_get, NULL, 0}, + {1, field_fmt_97_98_9_9_info, field_fmt_97_98_9_9_set, field_fmt_97_98_9_9_get, NULL, 0}, + {1, field_fmt_99_112_9_9_info, field_fmt_99_112_9_9_set, field_fmt_99_112_9_9_get, NULL, 0}, + {1, field_fmt_113_127_9_9_info, field_fmt_113_127_9_9_set, field_fmt_113_127_9_9_get, NULL, 0}, + {1, field_fmt_128_128_8_8_info, field_fmt_128_128_8_8_set, field_fmt_128_128_8_8_get, NULL, 0}, + {1, field_fmt_129_129_8_8_info, field_fmt_129_129_8_8_set, field_fmt_129_129_8_8_get, NULL, 0}, + {1, field_fmt_130_130_8_8_info, field_fmt_130_130_8_8_set, field_fmt_130_130_8_8_get, NULL, 0}, + {1, field_fmt_131_131_8_8_info, field_fmt_131_131_8_8_set, field_fmt_131_131_8_8_get, NULL, 0}, + {1, field_fmt_132_132_8_8_info, field_fmt_132_132_8_8_set, field_fmt_132_132_8_8_get, NULL, 0}, + {1, field_fmt_133_133_8_8_info, field_fmt_133_133_8_8_set, field_fmt_133_133_8_8_get, NULL, 0}, + {1, field_fmt_134_139_8_8_info, field_fmt_134_139_8_8_set, field_fmt_134_139_8_8_get, NULL, 0}, + {1, field_fmt_134_136_8_8_info, field_fmt_134_136_8_8_set, field_fmt_134_136_8_8_get, NULL, 0}, + {1, field_fmt_140_141_8_8_info, field_fmt_140_141_8_8_set, field_fmt_140_141_8_8_get, NULL, 0}, + {1, field_fmt_142_142_8_8_info, field_fmt_142_142_8_8_set, field_fmt_142_142_8_8_get, NULL, 0}, + {1, field_fmt_143_143_8_8_info, field_fmt_143_143_8_8_set, field_fmt_143_143_8_8_get, NULL, 0}, + {1, field_fmt_144_155_8_8_info, field_fmt_144_155_8_8_set, field_fmt_144_155_8_8_get, NULL, 0}, + {1, field_fmt_156_158_8_8_info, field_fmt_156_158_8_8_set, field_fmt_156_158_8_8_get, NULL, 0}, + {1, field_fmt_159_159_8_8_info, field_fmt_159_159_8_8_set, field_fmt_159_159_8_8_get, NULL, 0}, + {1, field_fmt_160_162_7_7_info, field_fmt_160_162_7_7_set, field_fmt_160_162_7_7_get, NULL, 0}, + {1, field_fmt_163_174_7_7_info, field_fmt_163_174_7_7_set, field_fmt_163_174_7_7_get, NULL, 0}, + {1, field_fmt_175_191_7_7_info, field_fmt_175_191_7_7_set, field_fmt_175_191_7_7_get, NULL, 0}, + {1, field_fmt_192_192_6_6_info, field_fmt_192_192_6_6_set, field_fmt_192_192_6_6_get, NULL, 0}, + {1, field_fmt_193_212_6_6_info, field_fmt_193_212_6_6_set, field_fmt_193_212_6_6_get, NULL, 0}, + {1, field_fmt_213_213_6_6_info, field_fmt_213_213_6_6_set, field_fmt_213_213_6_6_get, NULL, 0}, + {1, field_fmt_214_222_6_6_info, field_fmt_214_222_6_6_set, field_fmt_214_222_6_6_get, NULL, 0}, + {1, field_fmt_223_223_6_6_info, field_fmt_223_223_6_6_set, field_fmt_223_223_6_6_get, NULL, 0}, + {1, field_fmt_224_255_5_5_info, field_fmt_224_255_5_5_set, field_fmt_224_255_5_5_get, NULL, 0}, + {1, field_fmt_256_271_4_4_info, field_fmt_256_271_4_4_set, field_fmt_256_271_4_4_get, NULL, 0}, + {1, field_fmt_272_272_4_4_info, field_fmt_272_272_4_4_set, field_fmt_272_272_4_4_get, bcm78905_a0_rxpmd_ieee_802_1as_timestamp_enabled_names, 0}, + {1, field_fmt_273_276_4_4_info, field_fmt_273_276_4_4_set, field_fmt_273_276_4_4_get, NULL, 0}, + {1, field_fmt_277_277_4_4_info, field_fmt_277_277_4_4_set, field_fmt_277_277_4_4_get, NULL, 0}, + {1, field_fmt_278_278_4_4_info, field_fmt_278_278_4_4_set, field_fmt_278_278_4_4_get, NULL, 0}, + {1, field_fmt_279_280_4_4_info, field_fmt_279_280_4_4_set, field_fmt_279_280_4_4_get, NULL, 0}, + {1, field_fmt_281_287_4_4_info, field_fmt_281_287_4_4_set, field_fmt_281_287_4_4_get, NULL, 0}, + {4, field_fmt_288_415_3_0_info, field_fmt_288_415_3_0_set, field_fmt_288_415_3_0_get, NULL, 0}, }; @@ -2987,52 +2986,52 @@ bcmpkt_pmd_info_t bcm78905_a0_rxpmd_info_get(void) } static bcmpkt_pmd_field_t bcm78905_a0_rx_reason_fields[BCM78905_A0_RX_REASON_COUNT] = { - {"CPU_INVALID_REASON",1, field_fmt_0_0_12_12_info, field_fmt_0_0_12_12_set, field_fmt_0_0_12_12_get, NULL, 0}, - {"CPU_SLF",1, field_fmt_1_1_12_12_info, field_fmt_1_1_12_12_set, field_fmt_1_1_12_12_get, NULL, 0}, - {"CPU_DLF",1, field_fmt_2_2_12_12_info, field_fmt_2_2_12_12_set, field_fmt_2_2_12_12_get, NULL, 0}, - {"CPU_L2MOVE",1, field_fmt_3_3_12_12_info, field_fmt_3_3_12_12_set, field_fmt_3_3_12_12_get, NULL, 0}, - {"CPU_L2CPU",1, field_fmt_4_4_12_12_info, field_fmt_4_4_12_12_set, field_fmt_4_4_12_12_get, NULL, 0}, - {"CPU_L3SRC_MISS",1, field_fmt_5_5_12_12_info, field_fmt_5_5_12_12_set, field_fmt_5_5_12_12_get, NULL, 0}, - {"CPU_L3DST_MISS",1, field_fmt_6_6_12_12_info, field_fmt_6_6_12_12_set, field_fmt_6_6_12_12_get, NULL, 0}, - {"CPU_L3SRC_MOVE",1, field_fmt_7_7_12_12_info, field_fmt_7_7_12_12_set, field_fmt_7_7_12_12_get, NULL, 0}, - {"CPU_MC_MISS",1, field_fmt_8_8_12_12_info, field_fmt_8_8_12_12_set, field_fmt_8_8_12_12_get, NULL, 0}, - {"CPU_IPMC_MISS",1, field_fmt_9_9_12_12_info, field_fmt_9_9_12_12_set, field_fmt_9_9_12_12_get, NULL, 0}, - {"CPU_FFP",1, field_fmt_10_10_12_12_info, field_fmt_10_10_12_12_set, field_fmt_10_10_12_12_get, NULL, 0}, - {"CPU_L3HDR_ERR",1, field_fmt_11_11_12_12_info, field_fmt_11_11_12_12_set, field_fmt_11_11_12_12_get, NULL, 0}, - {"CPU_PROTOCOL_PKT",1, field_fmt_12_12_12_12_info, field_fmt_12_12_12_12_set, field_fmt_12_12_12_12_get, NULL, 0}, - {"CPU_DOS_ATTACK",1, field_fmt_13_13_12_12_info, field_fmt_13_13_12_12_set, field_fmt_13_13_12_12_get, NULL, 0}, - {"CPU_MARTIAN_ADDR",1, field_fmt_14_14_12_12_info, field_fmt_14_14_12_12_set, field_fmt_14_14_12_12_get, NULL, 0}, - {"CPU_TUNNEL_ERR",1, field_fmt_15_15_12_12_info, field_fmt_15_15_12_12_set, field_fmt_15_15_12_12_get, NULL, 0}, - {"CPU_SFLOW_SRC",1, field_fmt_16_16_12_12_info, field_fmt_16_16_12_12_set, field_fmt_16_16_12_12_get, NULL, 0}, - {"CPU_SFLOW_DST",1, field_fmt_17_17_12_12_info, field_fmt_17_17_12_12_set, field_fmt_17_17_12_12_get, NULL, 0}, - {"ICMP_REDIRECT",1, field_fmt_18_18_12_12_info, field_fmt_18_18_12_12_set, field_fmt_18_18_12_12_get, NULL, 0}, - {"L3_SLOWPATH",1, field_fmt_19_19_12_12_info, field_fmt_19_19_12_12_set, field_fmt_19_19_12_12_get, NULL, 0}, - {"PARITY_ERROR",1, field_fmt_20_20_12_12_info, field_fmt_20_20_12_12_set, field_fmt_20_20_12_12_get, NULL, 0}, - {"L3_MTU_CHECK_FAIL",1, field_fmt_21_21_12_12_info, field_fmt_21_21_12_12_set, field_fmt_21_21_12_12_get, NULL, 0}, - {"MPLS_TTL_CHECK",1, field_fmt_22_22_12_12_info, field_fmt_22_22_12_12_set, field_fmt_22_22_12_12_get, NULL, 0}, - {"MPLS_LABEL_MISS",1, field_fmt_23_23_12_12_info, field_fmt_23_23_12_12_set, field_fmt_23_23_12_12_get, NULL, 0}, - {"MPLS_INVALID_ACTION",1, field_fmt_24_24_12_12_info, field_fmt_24_24_12_12_set, field_fmt_24_24_12_12_get, NULL, 0}, - {"MPLS_INVALID_PAYLOAD",1, field_fmt_25_25_12_12_info, field_fmt_25_25_12_12_set, field_fmt_25_25_12_12_get, NULL, 0}, - {"CPU_VFP",1, field_fmt_26_26_12_12_info, field_fmt_26_26_12_12_set, field_fmt_26_26_12_12_get, NULL, 0}, - {"PBT_NONUC_PKT",1, field_fmt_27_27_12_12_info, field_fmt_27_27_12_12_set, field_fmt_27_27_12_12_get, NULL, 0}, - {"L3_NEXT_HOP",1, field_fmt_28_28_12_12_info, field_fmt_28_28_12_12_set, field_fmt_28_28_12_12_get, NULL, 0}, - {"MY_STATION",1, field_fmt_29_29_12_12_info, field_fmt_29_29_12_12_set, field_fmt_29_29_12_12_get, NULL, 0}, - {"TIME_SYNC",1, field_fmt_30_30_12_12_info, field_fmt_30_30_12_12_set, field_fmt_30_30_12_12_get, NULL, 0}, - {"TUNNEL_DECAP_ECN_ERROR",1, field_fmt_31_31_12_12_info, field_fmt_31_31_12_12_set, field_fmt_31_31_12_12_get, NULL, 0}, - {"BFD_SLOWPATH",1, field_fmt_32_32_11_11_info, field_fmt_32_32_11_11_set, field_fmt_32_32_11_11_get, NULL, 0}, - {"BFD_ERROR",1, field_fmt_33_33_11_11_info, field_fmt_33_33_11_11_set, field_fmt_33_33_11_11_get, NULL, 0}, - {"PACKET_TRACE_TO_CPU",1, field_fmt_34_34_11_11_info, field_fmt_34_34_11_11_set, field_fmt_34_34_11_11_get, NULL, 0}, - {"MPLS_UNKNOWN_CONTROL_PKT",1, field_fmt_35_35_11_11_info, field_fmt_35_35_11_11_set, field_fmt_35_35_11_11_get, NULL, 0}, - {"MPLS_ALERT_LABEL",1, field_fmt_36_36_11_11_info, field_fmt_36_36_11_11_set, field_fmt_36_36_11_11_get, NULL, 0}, - {"CPU_IPMC_INTERFACE_MISMATCH",1, field_fmt_37_37_11_11_info, field_fmt_37_37_11_11_set, field_fmt_37_37_11_11_get, NULL, 0}, - {"DLB_MONITOR",1, field_fmt_38_38_11_11_info, field_fmt_38_38_11_11_set, field_fmt_38_38_11_11_get, NULL, 0}, - {"CPU_SFLOW_FLEX",1, field_fmt_39_39_11_11_info, field_fmt_39_39_11_11_set, field_fmt_39_39_11_11_get, NULL, 0}, - {"CPU_UVLAN",1, field_fmt_40_40_11_11_info, field_fmt_40_40_11_11_set, field_fmt_40_40_11_11_get, NULL, 0}, - {"SRV6_ERROR",1, field_fmt_41_41_11_11_info, field_fmt_41_41_11_11_set, field_fmt_41_41_11_11_get, NULL, 0}, - {"VXLAN_VN_ID_MISS",1, field_fmt_42_42_11_11_info, field_fmt_42_42_11_11_set, field_fmt_42_42_11_11_get, NULL, 0}, - {"VXLAN_SIP_MISS",1, field_fmt_43_43_11_11_info, field_fmt_43_43_11_11_set, field_fmt_43_43_11_11_get, NULL, 0}, - {"ADAPT_MISS",1, field_fmt_44_44_11_11_info, field_fmt_44_44_11_11_set, field_fmt_44_44_11_11_get, NULL, 0}, - {"INVALID_GSH_NON_GSH",1, field_fmt_45_45_11_11_info, field_fmt_45_45_11_11_set, field_fmt_45_45_11_11_get, NULL, 0}, + {1, field_fmt_0_0_12_12_info, field_fmt_0_0_12_12_set, field_fmt_0_0_12_12_get, NULL, 0}, + {1, field_fmt_1_1_12_12_info, field_fmt_1_1_12_12_set, field_fmt_1_1_12_12_get, NULL, 0}, + {1, field_fmt_2_2_12_12_info, field_fmt_2_2_12_12_set, field_fmt_2_2_12_12_get, NULL, 0}, + {1, field_fmt_3_3_12_12_info, field_fmt_3_3_12_12_set, field_fmt_3_3_12_12_get, NULL, 0}, + {1, field_fmt_4_4_12_12_info, field_fmt_4_4_12_12_set, field_fmt_4_4_12_12_get, NULL, 0}, + {1, field_fmt_5_5_12_12_info, field_fmt_5_5_12_12_set, field_fmt_5_5_12_12_get, NULL, 0}, + {1, field_fmt_6_6_12_12_info, field_fmt_6_6_12_12_set, field_fmt_6_6_12_12_get, NULL, 0}, + {1, field_fmt_7_7_12_12_info, field_fmt_7_7_12_12_set, field_fmt_7_7_12_12_get, NULL, 0}, + {1, field_fmt_8_8_12_12_info, field_fmt_8_8_12_12_set, field_fmt_8_8_12_12_get, NULL, 0}, + {1, field_fmt_9_9_12_12_info, field_fmt_9_9_12_12_set, field_fmt_9_9_12_12_get, NULL, 0}, + {1, field_fmt_10_10_12_12_info, field_fmt_10_10_12_12_set, field_fmt_10_10_12_12_get, NULL, 0}, + {1, field_fmt_11_11_12_12_info, field_fmt_11_11_12_12_set, field_fmt_11_11_12_12_get, NULL, 0}, + {1, field_fmt_12_12_12_12_info, field_fmt_12_12_12_12_set, field_fmt_12_12_12_12_get, NULL, 0}, + {1, field_fmt_13_13_12_12_info, field_fmt_13_13_12_12_set, field_fmt_13_13_12_12_get, NULL, 0}, + {1, field_fmt_14_14_12_12_info, field_fmt_14_14_12_12_set, field_fmt_14_14_12_12_get, NULL, 0}, + {1, field_fmt_15_15_12_12_info, field_fmt_15_15_12_12_set, field_fmt_15_15_12_12_get, NULL, 0}, + {1, field_fmt_16_16_12_12_info, field_fmt_16_16_12_12_set, field_fmt_16_16_12_12_get, NULL, 0}, + {1, field_fmt_17_17_12_12_info, field_fmt_17_17_12_12_set, field_fmt_17_17_12_12_get, NULL, 0}, + {1, field_fmt_18_18_12_12_info, field_fmt_18_18_12_12_set, field_fmt_18_18_12_12_get, NULL, 0}, + {1, field_fmt_19_19_12_12_info, field_fmt_19_19_12_12_set, field_fmt_19_19_12_12_get, NULL, 0}, + {1, field_fmt_20_20_12_12_info, field_fmt_20_20_12_12_set, field_fmt_20_20_12_12_get, NULL, 0}, + {1, field_fmt_21_21_12_12_info, field_fmt_21_21_12_12_set, field_fmt_21_21_12_12_get, NULL, 0}, + {1, field_fmt_22_22_12_12_info, field_fmt_22_22_12_12_set, field_fmt_22_22_12_12_get, NULL, 0}, + {1, field_fmt_23_23_12_12_info, field_fmt_23_23_12_12_set, field_fmt_23_23_12_12_get, NULL, 0}, + {1, field_fmt_24_24_12_12_info, field_fmt_24_24_12_12_set, field_fmt_24_24_12_12_get, NULL, 0}, + {1, field_fmt_25_25_12_12_info, field_fmt_25_25_12_12_set, field_fmt_25_25_12_12_get, NULL, 0}, + {1, field_fmt_26_26_12_12_info, field_fmt_26_26_12_12_set, field_fmt_26_26_12_12_get, NULL, 0}, + {1, field_fmt_27_27_12_12_info, field_fmt_27_27_12_12_set, field_fmt_27_27_12_12_get, NULL, 0}, + {1, field_fmt_28_28_12_12_info, field_fmt_28_28_12_12_set, field_fmt_28_28_12_12_get, NULL, 0}, + {1, field_fmt_29_29_12_12_info, field_fmt_29_29_12_12_set, field_fmt_29_29_12_12_get, NULL, 0}, + {1, field_fmt_30_30_12_12_info, field_fmt_30_30_12_12_set, field_fmt_30_30_12_12_get, NULL, 0}, + {1, field_fmt_31_31_12_12_info, field_fmt_31_31_12_12_set, field_fmt_31_31_12_12_get, NULL, 0}, + {1, field_fmt_32_32_11_11_info, field_fmt_32_32_11_11_set, field_fmt_32_32_11_11_get, NULL, 0}, + {1, field_fmt_33_33_11_11_info, field_fmt_33_33_11_11_set, field_fmt_33_33_11_11_get, NULL, 0}, + {1, field_fmt_34_34_11_11_info, field_fmt_34_34_11_11_set, field_fmt_34_34_11_11_get, NULL, 0}, + {1, field_fmt_35_35_11_11_info, field_fmt_35_35_11_11_set, field_fmt_35_35_11_11_get, NULL, 0}, + {1, field_fmt_36_36_11_11_info, field_fmt_36_36_11_11_set, field_fmt_36_36_11_11_get, NULL, 0}, + {1, field_fmt_37_37_11_11_info, field_fmt_37_37_11_11_set, field_fmt_37_37_11_11_get, NULL, 0}, + {1, field_fmt_38_38_11_11_info, field_fmt_38_38_11_11_set, field_fmt_38_38_11_11_get, NULL, 0}, + {1, field_fmt_39_39_11_11_info, field_fmt_39_39_11_11_set, field_fmt_39_39_11_11_get, NULL, 0}, + {1, field_fmt_40_40_11_11_info, field_fmt_40_40_11_11_set, field_fmt_40_40_11_11_get, NULL, 0}, + {1, field_fmt_41_41_11_11_info, field_fmt_41_41_11_11_set, field_fmt_41_41_11_11_get, NULL, 0}, + {1, field_fmt_42_42_11_11_info, field_fmt_42_42_11_11_set, field_fmt_42_42_11_11_get, NULL, 0}, + {1, field_fmt_43_43_11_11_info, field_fmt_43_43_11_11_set, field_fmt_43_43_11_11_get, NULL, 0}, + {1, field_fmt_44_44_11_11_info, field_fmt_44_44_11_11_set, field_fmt_44_44_11_11_get, NULL, 0}, + {1, field_fmt_45_45_11_11_info, field_fmt_45_45_11_11_set, field_fmt_45_45_11_11_get, NULL, 0}, }; @@ -3048,7 +3047,7 @@ bcmpkt_pmd_info_t bcm78905_a0_rx_reason_info_get(void) } static bcmpkt_pmd_field_t bcm78905_a0_ep_rx_reason_fields[BCM78905_A0_EP_RX_REASON_COUNT] = { - {"EP_CTC",1, field_fmt_0_0_12_12_info, field_fmt_0_0_12_12_set, field_fmt_0_0_12_12_get, NULL, 0}, + {1, field_fmt_0_0_12_12_info, field_fmt_0_0_12_12_set, field_fmt_0_0_12_12_get, NULL, 0}, }; @@ -3089,41 +3088,41 @@ static const shr_enum_map_t bcm78905_a0_txpmd_start_names[] = }; static bcmpkt_pmd_field_t bcm78905_a0_txpmd_fields[BCM78905_A0_TXPMD_COUNT] = { - {"CPU_TX::ECMP_MEMBER_ID",1, field_fmt_0_16_3_3_info, field_fmt_0_16_3_3_set, field_fmt_0_16_3_3_get, NULL, 2}, - {"CPU_TX::MCAST_LB_INDEX",1, field_fmt_0_7_3_3_info, field_fmt_0_7_3_3_set, field_fmt_0_7_3_3_get, NULL, 2}, - {"CPU_TX::DESTINATION",1, field_fmt_17_32_3_2_info, field_fmt_17_32_3_2_set, field_fmt_17_32_3_2_get, NULL, 2}, - {"CPU_TX::DESTINATION_TYPE",1, field_fmt_33_36_2_2_info, field_fmt_33_36_2_2_set, field_fmt_33_36_2_2_get, bcm78905_a0_txpmd_cpu_tx_destination_type_names, 2}, - {"CPU_TX::DP",1, field_fmt_37_38_2_2_info, field_fmt_37_38_2_2_set, field_fmt_37_38_2_2_get, bcm78905_a0_txpmd_cpu_tx_dp_names, 2}, - {"CPU_TX::INPUT_PRI",1, field_fmt_39_42_2_2_info, field_fmt_39_42_2_2_set, field_fmt_39_42_2_2_get, NULL, 2}, - {"CPU_TX::INT_CN",1, field_fmt_43_44_2_2_info, field_fmt_43_44_2_2_set, field_fmt_43_44_2_2_get, NULL, 2}, - {"CPU_TX::INT_PRI",1, field_fmt_45_48_2_2_info, field_fmt_45_48_2_2_set, field_fmt_45_48_2_2_get, NULL, 2}, - {"CPU_TX::MCAST_LB_INDEX_VLD",1, field_fmt_49_49_2_2_info, field_fmt_49_49_2_2_set, field_fmt_49_49_2_2_get, NULL, 2}, - {"CPU_TX::PKT_PROFILE",1, field_fmt_50_52_2_2_info, field_fmt_50_52_2_2_set, field_fmt_50_52_2_2_get, NULL, 2}, - {"CPU_TX::QOS_FIELDS_VLD",1, field_fmt_53_53_2_2_info, field_fmt_53_53_2_2_set, field_fmt_53_53_2_2_get, NULL, 2}, - {"CPU_TX::ROUTED_PKT",1, field_fmt_54_54_2_2_info, field_fmt_54_54_2_2_set, field_fmt_54_54_2_2_get, NULL, 2}, - {"CPU_TX::VRF",1, field_fmt_55_67_2_1_info, field_fmt_55_67_2_1_set, field_fmt_55_67_2_1_get, NULL, 2}, - {"CPU_TX::VRF_VALID",1, field_fmt_68_68_1_1_info, field_fmt_68_68_1_1_set, field_fmt_68_68_1_1_get, NULL, 2}, - {"SOBMH_FROM_CPU::CELL_ERROR",1, field_fmt_0_0_3_3_info, field_fmt_0_0_3_3_set, field_fmt_0_0_3_3_get, NULL, 1}, - {"SOBMH_FROM_CPU::CNG",1, field_fmt_1_2_3_3_info, field_fmt_1_2_3_3_set, field_fmt_1_2_3_3_get, NULL, 1}, - {"SOBMH_FROM_CPU::COS",1, field_fmt_3_8_3_3_info, field_fmt_3_8_3_3_set, field_fmt_3_8_3_3_get, NULL, 1}, - {"SOBMH_FROM_CPU::DESTINATION",1, field_fmt_9_24_3_3_info, field_fmt_9_24_3_3_set, field_fmt_9_24_3_3_get, NULL, 1}, - {"SOBMH_FROM_CPU::DESTINATION_TYPE",1, field_fmt_25_28_3_3_info, field_fmt_25_28_3_3_set, field_fmt_25_28_3_3_get, bcm78905_a0_txpmd_sobmh_from_cpu_destination_type_names, 1}, - {"SOBMH_FROM_CPU::IEEE1588_INGRESS_TIMESTAMP_SIGN",1, field_fmt_29_29_3_3_info, field_fmt_29_29_3_3_set, field_fmt_29_29_3_3_get, NULL, 1}, - {"SOBMH_FROM_CPU::IEEE1588_ONE_STEP_ENABLE",1, field_fmt_30_30_3_3_info, field_fmt_30_30_3_3_set, field_fmt_30_30_3_3_get, NULL, 1}, - {"SOBMH_FROM_CPU::IEEE1588_REGEN_UDP_CHECKSUM",1, field_fmt_31_31_3_3_info, field_fmt_31_31_3_3_set, field_fmt_31_31_3_3_get, NULL, 1}, - {"SOBMH_FROM_CPU::IEEE1588_TIMESTAMP_HDR_OFFSET",1, field_fmt_32_39_2_2_info, field_fmt_32_39_2_2_set, field_fmt_32_39_2_2_get, NULL, 1}, - {"SOBMH_FROM_CPU::INPUT_PRI",1, field_fmt_40_43_2_2_info, field_fmt_40_43_2_2_set, field_fmt_40_43_2_2_get, NULL, 1}, - {"SOBMH_FROM_CPU::RQE_Q_NUM",1, field_fmt_44_46_2_2_info, field_fmt_44_46_2_2_set, field_fmt_44_46_2_2_get, NULL, 1}, - {"SOBMH_FROM_CPU::SPAP",1, field_fmt_47_48_2_2_info, field_fmt_47_48_2_2_set, field_fmt_47_48_2_2_get, NULL, 1}, - {"SOBMH_FROM_CPU::SPID",1, field_fmt_49_50_2_2_info, field_fmt_49_50_2_2_set, field_fmt_49_50_2_2_get, NULL, 1}, - {"SOBMH_FROM_CPU::SPID_OVERRIDE",1, field_fmt_51_51_2_2_info, field_fmt_51_51_2_2_set, field_fmt_51_51_2_2_get, NULL, 1}, - {"SOBMH_FROM_CPU::SRC_MODID",1, field_fmt_52_59_2_2_info, field_fmt_52_59_2_2_set, field_fmt_52_59_2_2_get, NULL, 1}, - {"SOBMH_FROM_CPU::TX_TS",1, field_fmt_60_60_2_2_info, field_fmt_60_60_2_2_set, field_fmt_60_60_2_2_get, NULL, 1}, - {"SOBMH_FROM_CPU::UNICAST",1, field_fmt_61_61_2_2_info, field_fmt_61_61_2_2_set, field_fmt_61_61_2_2_get, NULL, 1}, - {"SOBMH_FROM_CPU::WRED_MARK_ELIGIBLE",1, field_fmt_62_62_2_2_info, field_fmt_62_62_2_2_set, field_fmt_62_62_2_2_get, NULL, 1}, - {"SOBMH_FROM_CPU::WRED_RESPONSE",1, field_fmt_63_63_2_2_info, field_fmt_63_63_2_2_set, field_fmt_63_63_2_2_get, NULL, 1}, - {"HEADER_TYPE",1, field_fmt_120_125_0_0_info, field_fmt_120_125_0_0_set, field_fmt_120_125_0_0_get, bcm78905_a0_txpmd_header_type_names, 0}, - {"START",1, field_fmt_126_127_0_0_info, field_fmt_126_127_0_0_set, field_fmt_126_127_0_0_get, bcm78905_a0_txpmd_start_names, 0}, + {1, field_fmt_0_16_3_3_info, field_fmt_0_16_3_3_set, field_fmt_0_16_3_3_get, NULL, 2}, + {1, field_fmt_0_7_3_3_info, field_fmt_0_7_3_3_set, field_fmt_0_7_3_3_get, NULL, 2}, + {1, field_fmt_17_32_3_2_info, field_fmt_17_32_3_2_set, field_fmt_17_32_3_2_get, NULL, 2}, + {1, field_fmt_33_36_2_2_info, field_fmt_33_36_2_2_set, field_fmt_33_36_2_2_get, bcm78905_a0_txpmd_cpu_tx_destination_type_names, 2}, + {1, field_fmt_37_38_2_2_info, field_fmt_37_38_2_2_set, field_fmt_37_38_2_2_get, bcm78905_a0_txpmd_cpu_tx_dp_names, 2}, + {1, field_fmt_39_42_2_2_info, field_fmt_39_42_2_2_set, field_fmt_39_42_2_2_get, NULL, 2}, + {1, field_fmt_43_44_2_2_info, field_fmt_43_44_2_2_set, field_fmt_43_44_2_2_get, NULL, 2}, + {1, field_fmt_45_48_2_2_info, field_fmt_45_48_2_2_set, field_fmt_45_48_2_2_get, NULL, 2}, + {1, field_fmt_49_49_2_2_info, field_fmt_49_49_2_2_set, field_fmt_49_49_2_2_get, NULL, 2}, + {1, field_fmt_50_52_2_2_info, field_fmt_50_52_2_2_set, field_fmt_50_52_2_2_get, NULL, 2}, + {1, field_fmt_53_53_2_2_info, field_fmt_53_53_2_2_set, field_fmt_53_53_2_2_get, NULL, 2}, + {1, field_fmt_54_54_2_2_info, field_fmt_54_54_2_2_set, field_fmt_54_54_2_2_get, NULL, 2}, + {1, field_fmt_55_67_2_1_info, field_fmt_55_67_2_1_set, field_fmt_55_67_2_1_get, NULL, 2}, + {1, field_fmt_68_68_1_1_info, field_fmt_68_68_1_1_set, field_fmt_68_68_1_1_get, NULL, 2}, + {1, field_fmt_0_0_3_3_info, field_fmt_0_0_3_3_set, field_fmt_0_0_3_3_get, NULL, 1}, + {1, field_fmt_1_2_3_3_info, field_fmt_1_2_3_3_set, field_fmt_1_2_3_3_get, NULL, 1}, + {1, field_fmt_3_8_3_3_info, field_fmt_3_8_3_3_set, field_fmt_3_8_3_3_get, NULL, 1}, + {1, field_fmt_9_24_3_3_info, field_fmt_9_24_3_3_set, field_fmt_9_24_3_3_get, NULL, 1}, + {1, field_fmt_25_28_3_3_info, field_fmt_25_28_3_3_set, field_fmt_25_28_3_3_get, bcm78905_a0_txpmd_sobmh_from_cpu_destination_type_names, 1}, + {1, field_fmt_29_29_3_3_info, field_fmt_29_29_3_3_set, field_fmt_29_29_3_3_get, NULL, 1}, + {1, field_fmt_30_30_3_3_info, field_fmt_30_30_3_3_set, field_fmt_30_30_3_3_get, NULL, 1}, + {1, field_fmt_31_31_3_3_info, field_fmt_31_31_3_3_set, field_fmt_31_31_3_3_get, NULL, 1}, + {1, field_fmt_32_39_2_2_info, field_fmt_32_39_2_2_set, field_fmt_32_39_2_2_get, NULL, 1}, + {1, field_fmt_40_43_2_2_info, field_fmt_40_43_2_2_set, field_fmt_40_43_2_2_get, NULL, 1}, + {1, field_fmt_44_46_2_2_info, field_fmt_44_46_2_2_set, field_fmt_44_46_2_2_get, NULL, 1}, + {1, field_fmt_47_48_2_2_info, field_fmt_47_48_2_2_set, field_fmt_47_48_2_2_get, NULL, 1}, + {1, field_fmt_49_50_2_2_info, field_fmt_49_50_2_2_set, field_fmt_49_50_2_2_get, NULL, 1}, + {1, field_fmt_51_51_2_2_info, field_fmt_51_51_2_2_set, field_fmt_51_51_2_2_get, NULL, 1}, + {1, field_fmt_52_59_2_2_info, field_fmt_52_59_2_2_set, field_fmt_52_59_2_2_get, NULL, 1}, + {1, field_fmt_60_60_2_2_info, field_fmt_60_60_2_2_set, field_fmt_60_60_2_2_get, NULL, 1}, + {1, field_fmt_61_61_2_2_info, field_fmt_61_61_2_2_set, field_fmt_61_61_2_2_get, NULL, 1}, + {1, field_fmt_62_62_2_2_info, field_fmt_62_62_2_2_set, field_fmt_62_62_2_2_get, NULL, 1}, + {1, field_fmt_63_63_2_2_info, field_fmt_63_63_2_2_set, field_fmt_63_63_2_2_get, NULL, 1}, + {1, field_fmt_120_125_0_0_info, field_fmt_120_125_0_0_set, field_fmt_120_125_0_0_get, bcm78905_a0_txpmd_header_type_names, 0}, + {1, field_fmt_126_127_0_0_info, field_fmt_126_127_0_0_set, field_fmt_126_127_0_0_get, bcm78905_a0_txpmd_start_names, 0}, }; @@ -3149,20 +3148,20 @@ static const shr_enum_map_t bcm78905_a0_lbhdr_start_names[] = }; static bcmpkt_pmd_field_t bcm78905_a0_lbhdr_fields[BCM78905_A0_LBHDR_COUNT] = { - {"VISIBILITY_PKT",1, field_fmt_45_45_2_2_info, field_fmt_45_45_2_2_set, field_fmt_45_45_2_2_get, NULL, 0}, - {"VRF_VALID",1, field_fmt_46_46_2_2_info, field_fmt_46_46_2_2_set, field_fmt_46_46_2_2_get, NULL, 0}, - {"ROUTED_PKT",1, field_fmt_47_47_2_2_info, field_fmt_47_47_2_2_set, field_fmt_47_47_2_2_get, NULL, 0}, - {"VRF",1, field_fmt_66_78_1_1_info, field_fmt_66_78_1_1_set, field_fmt_66_78_1_1_get, NULL, 0}, - {"PKT_PROFILE",1, field_fmt_80_82_1_1_info, field_fmt_80_82_1_1_set, field_fmt_80_82_1_1_get, NULL, 0}, - {"QOS_FIELD_VALID",1, field_fmt_83_83_1_1_info, field_fmt_83_83_1_1_set, field_fmt_83_83_1_1_get, NULL, 0}, - {"PP_PORT",1, field_fmt_85_93_1_1_info, field_fmt_85_93_1_1_set, field_fmt_85_93_1_1_get, NULL, 0}, - {"OPAQUE_OBJECT",1, field_fmt_104_107_0_0_info, field_fmt_104_107_0_0_set, field_fmt_104_107_0_0_get, NULL, 0}, - {"QOS_FIELD_ETH",1, field_fmt_108_115_0_0_info, field_fmt_108_115_0_0_set, field_fmt_108_115_0_0_get, NULL, 0}, - {"INT_PRI_ETH",1, field_fmt_108_111_0_0_info, field_fmt_108_111_0_0_set, field_fmt_108_111_0_0_get, NULL, 0}, - {"INT_CN_ETH",1, field_fmt_112_113_0_0_info, field_fmt_112_113_0_0_set, field_fmt_112_113_0_0_get, NULL, 0}, - {"CNG_ETH",1, field_fmt_114_115_0_0_info, field_fmt_114_115_0_0_set, field_fmt_114_115_0_0_get, NULL, 0}, - {"HEADER_TYPE",1, field_fmt_120_125_0_0_info, field_fmt_120_125_0_0_set, field_fmt_120_125_0_0_get, bcm78905_a0_lbhdr_header_type_names, 0}, - {"START",1, field_fmt_126_127_0_0_info, field_fmt_126_127_0_0_set, field_fmt_126_127_0_0_get, bcm78905_a0_lbhdr_start_names, 0}, + {1, field_fmt_45_45_2_2_info, field_fmt_45_45_2_2_set, field_fmt_45_45_2_2_get, NULL, 0}, + {1, field_fmt_46_46_2_2_info, field_fmt_46_46_2_2_set, field_fmt_46_46_2_2_get, NULL, 0}, + {1, field_fmt_47_47_2_2_info, field_fmt_47_47_2_2_set, field_fmt_47_47_2_2_get, NULL, 0}, + {1, field_fmt_66_78_1_1_info, field_fmt_66_78_1_1_set, field_fmt_66_78_1_1_get, NULL, 0}, + {1, field_fmt_80_82_1_1_info, field_fmt_80_82_1_1_set, field_fmt_80_82_1_1_get, NULL, 0}, + {1, field_fmt_83_83_1_1_info, field_fmt_83_83_1_1_set, field_fmt_83_83_1_1_get, NULL, 0}, + {1, field_fmt_85_93_1_1_info, field_fmt_85_93_1_1_set, field_fmt_85_93_1_1_get, NULL, 0}, + {1, field_fmt_104_107_0_0_info, field_fmt_104_107_0_0_set, field_fmt_104_107_0_0_get, NULL, 0}, + {1, field_fmt_108_115_0_0_info, field_fmt_108_115_0_0_set, field_fmt_108_115_0_0_get, NULL, 0}, + {1, field_fmt_108_111_0_0_info, field_fmt_108_111_0_0_set, field_fmt_108_111_0_0_get, NULL, 0}, + {1, field_fmt_112_113_0_0_info, field_fmt_112_113_0_0_set, field_fmt_112_113_0_0_get, NULL, 0}, + {1, field_fmt_114_115_0_0_info, field_fmt_114_115_0_0_set, field_fmt_114_115_0_0_get, NULL, 0}, + {1, field_fmt_120_125_0_0_info, field_fmt_120_125_0_0_set, field_fmt_120_125_0_0_get, bcm78905_a0_lbhdr_header_type_names, 0}, + {1, field_fmt_126_127_0_0_info, field_fmt_126_127_0_0_set, field_fmt_126_127_0_0_get, bcm78905_a0_lbhdr_start_names, 0}, }; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78907_a0/bcm78907_a0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm78907_a0/bcm78907_a0_pkt_lbhdr.c similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78907_a0/bcm78907_a0_pkt_lbhdr.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm78907_a0/bcm78907_a0_pkt_lbhdr.c index d2aa8fa9967..76a90e95fb1 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78907_a0/bcm78907_a0_pkt_lbhdr.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm78907_a0/bcm78907_a0_pkt_lbhdr.c @@ -5,8 +5,7 @@ * Edits to this file will be lost when it is regenerated. * Tool: INTERNAL/regs/xgs/generate-pmd.pl * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78907_a0/bcm78907_a0_pkt_rxpmd.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm78907_a0/bcm78907_a0_pkt_rxpmd.c similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78907_a0/bcm78907_a0_pkt_rxpmd.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm78907_a0/bcm78907_a0_pkt_rxpmd.c index e3f2f4ef3dd..f48ca93b4ec 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78907_a0/bcm78907_a0_pkt_rxpmd.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm78907_a0/bcm78907_a0_pkt_rxpmd.c @@ -5,8 +5,7 @@ * Edits to this file will be lost when it is regenerated. * Tool: INTERNAL/regs/xgs/generate-pmd.pl * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -996,8 +995,6 @@ const bcmpkt_rxpmd_fget_t bcm78907_a0_rxpmd_fget = { NULL, NULL, NULL, - NULL, - NULL, NULL } }; @@ -1103,8 +1100,6 @@ const bcmpkt_rxpmd_fset_t bcm78907_a0_rxpmd_fset = { NULL, NULL, NULL, - NULL, - NULL, NULL } }; @@ -1131,7 +1126,7 @@ static int bcm78907_a0_rxpmd_view_infos[BCMPKT_RXPMD_FID_COUNT] = { -1, -1, -1, -1, -1, -1, -1, -2, -1, -1, -1, -1, -1, -2, -2, -2, -2, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -2, -2, -2, -1, -1, -2, -2, -1, -2, -2, -2, -2, -1, -2, -2, -2, -2, -2, -2, - -2, -2, -2, -2, -2, + -2, -2, -2, }; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78907_a0/bcm78907_a0_pkt_txpmd.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm78907_a0/bcm78907_a0_pkt_txpmd.c similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78907_a0/bcm78907_a0_pkt_txpmd.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm78907_a0/bcm78907_a0_pkt_txpmd.c index 271a7eb2ee1..86bc73b902c 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78907_a0/bcm78907_a0_pkt_txpmd.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm78907_a0/bcm78907_a0_pkt_txpmd.c @@ -5,8 +5,7 @@ * Edits to this file will be lost when it is regenerated. * Tool: INTERNAL/regs/xgs/generate-pmd.pl * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -793,7 +792,6 @@ const bcmpkt_txpmd_fget_t bcm78907_a0_txpmd_fget = { NULL, NULL, NULL, - NULL, NULL } }; @@ -929,7 +927,6 @@ const bcmpkt_txpmd_fset_t bcm78907_a0_txpmd_fset = { NULL, NULL, NULL, - NULL, NULL } }; @@ -957,7 +954,7 @@ static int bcm78907_a0_txpmd_view_infos[BCMPKT_TXPMD_FID_COUNT] = { -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, - -2, -2, + -2, }; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78907_a0/bcm78907_a0_pmd_field.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm78907_a0/bcm78907_a0_pmd_field.c similarity index 77% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78907_a0/bcm78907_a0_pmd_field.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm78907_a0/bcm78907_a0_pmd_field.c index 6a0701db789..507fbe3a1a5 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78907_a0/bcm78907_a0_pmd_field.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/chip/bcm78907_a0/bcm78907_a0_pmd_field.c @@ -5,8 +5,7 @@ * Edits to this file will be lost when it is regenerated. * Tool: INTERNAL/regs/xgs/generate-pmd.pl * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -2927,52 +2926,52 @@ static const shr_enum_map_t bcm78907_a0_rxpmd_ieee_802_1as_timestamp_enabled_nam }; static bcmpkt_pmd_field_t bcm78907_a0_rxpmd_fields[BCM78907_A0_RXPMD_COUNT] = { - {"REASON",2, field_fmt_0_63_12_11_info, field_fmt_0_63_12_11_set, field_fmt_0_63_12_11_get, NULL, 0}, - {"REASON_TYPE",1, field_fmt_64_67_10_10_info, field_fmt_64_67_10_10_set, field_fmt_64_67_10_10_get, bcm78907_a0_rxpmd_reason_type_names, 0}, - {"ING_L3_INTF",1, field_fmt_68_80_10_10_info, field_fmt_68_80_10_10_set, field_fmt_68_80_10_10_get, NULL, 0}, - {"I2E_CLASSID",1, field_fmt_68_79_10_10_info, field_fmt_68_79_10_10_set, field_fmt_68_79_10_10_get, NULL, 0}, - {"RX_BFD_SESSION_INDEX",1, field_fmt_68_79_10_10_info, field_fmt_68_79_10_10_set, field_fmt_68_79_10_10_get, NULL, 0}, - {"I2E_CLASSID_TYPE",1, field_fmt_80_83_10_10_info, field_fmt_80_83_10_10_set, field_fmt_80_83_10_10_get, NULL, 0}, - {"RX_BFD_START_OFFSET_TYPE",1, field_fmt_80_81_10_10_info, field_fmt_80_81_10_10_set, field_fmt_80_81_10_10_get, NULL, 0}, - {"RX_BFD_START_OFFSET",1, field_fmt_82_89_10_10_info, field_fmt_82_89_10_10_set, field_fmt_82_89_10_10_get, NULL, 0}, - {"ING_L3_INTF_VALID",1, field_fmt_84_84_10_10_info, field_fmt_84_84_10_10_set, field_fmt_84_84_10_10_get, NULL, 0}, - {"CPU_COS",1, field_fmt_90_95_10_10_info, field_fmt_90_95_10_10_set, field_fmt_90_95_10_10_get, NULL, 0}, - {"QUEUE_NUM",1, field_fmt_90_95_10_10_info, field_fmt_90_95_10_10_set, field_fmt_90_95_10_10_get, NULL, 0}, - {"INCOMING_TAG_STATUS",1, field_fmt_97_97_9_9_info, field_fmt_97_97_9_9_set, field_fmt_97_97_9_9_get, NULL, 0}, - {"ING_OTAG_ACTION",1, field_fmt_98_99_9_9_info, field_fmt_98_99_9_9_set, field_fmt_98_99_9_9_get, NULL, 0}, - {"PKT_LENGTH",1, field_fmt_100_113_9_9_info, field_fmt_100_113_9_9_set, field_fmt_100_113_9_9_get, NULL, 0}, - {"O_NHI",1, field_fmt_114_128_9_8_info, field_fmt_114_128_9_8_set, field_fmt_114_128_9_8_get, NULL, 0}, - {"INCOMING_OPAQUE_TAG_STATUS",1, field_fmt_129_129_8_8_info, field_fmt_129_129_8_8_set, field_fmt_129_129_8_8_get, NULL, 0}, - {"BPDU",1, field_fmt_130_130_8_8_info, field_fmt_130_130_8_8_set, field_fmt_130_130_8_8_get, NULL, 0}, - {"CHANGE_DSCP",1, field_fmt_131_131_8_8_info, field_fmt_131_131_8_8_set, field_fmt_131_131_8_8_get, NULL, 0}, - {"CHANGE_ECN",1, field_fmt_132_132_8_8_info, field_fmt_132_132_8_8_set, field_fmt_132_132_8_8_get, NULL, 0}, - {"DLB_ID_VALID",1, field_fmt_133_133_8_8_info, field_fmt_133_133_8_8_set, field_fmt_133_133_8_8_get, NULL, 0}, - {"DO_NOT_CHANGE_TTL",1, field_fmt_134_134_8_8_info, field_fmt_134_134_8_8_set, field_fmt_134_134_8_8_get, NULL, 0}, - {"DSCP",1, field_fmt_135_140_8_8_info, field_fmt_135_140_8_8_set, field_fmt_135_140_8_8_get, NULL, 0}, - {"SPECIAL_PACKET_TYPE",1, field_fmt_135_137_8_8_info, field_fmt_135_137_8_8_set, field_fmt_135_137_8_8_get, NULL, 0}, - {"ECN",1, field_fmt_141_142_8_8_info, field_fmt_141_142_8_8_set, field_fmt_141_142_8_8_get, NULL, 0}, - {"IP_ROUTED",1, field_fmt_143_143_8_8_info, field_fmt_143_143_8_8_set, field_fmt_143_143_8_8_get, NULL, 0}, - {"L3ONLY",1, field_fmt_144_144_8_8_info, field_fmt_144_144_8_8_set, field_fmt_144_144_8_8_get, NULL, 0}, - {"MATCHED_RULE",1, field_fmt_145_156_8_8_info, field_fmt_145_156_8_8_set, field_fmt_145_156_8_8_get, NULL, 0}, - {"MTP_INDEX",1, field_fmt_157_159_8_8_info, field_fmt_157_159_8_8_set, field_fmt_157_159_8_8_get, NULL, 0}, - {"OUTER_CFI",1, field_fmt_160_160_7_7_info, field_fmt_160_160_7_7_set, field_fmt_160_160_7_7_get, NULL, 0}, - {"OUTER_PRI",1, field_fmt_161_163_7_7_info, field_fmt_161_163_7_7_set, field_fmt_161_163_7_7_get, NULL, 0}, - {"OUTER_VID",1, field_fmt_164_175_7_7_info, field_fmt_164_175_7_7_set, field_fmt_164_175_7_7_get, NULL, 0}, - {"REPLICATION_OR_NHOP_INDEX",1, field_fmt_176_190_7_7_info, field_fmt_176_190_7_7_set, field_fmt_176_190_7_7_get, NULL, 0}, - {"REGEN_CRC",1, field_fmt_191_191_7_7_info, field_fmt_191_191_7_7_set, field_fmt_191_191_7_7_get, NULL, 0}, - {"ENTROPY_LABEL",1, field_fmt_192_211_6_6_info, field_fmt_192_211_6_6_set, field_fmt_192_211_6_6_get, NULL, 0}, - {"SPECIAL_PACKET_INDICATOR",1, field_fmt_212_212_6_6_info, field_fmt_212_212_6_6_set, field_fmt_212_212_6_6_get, NULL, 0}, - {"SRC_PORT_NUM",1, field_fmt_213_222_6_6_info, field_fmt_213_222_6_6_set, field_fmt_213_222_6_6_get, NULL, 0}, - {"SWITCH",1, field_fmt_223_223_6_6_info, field_fmt_223_223_6_6_set, field_fmt_223_223_6_6_get, NULL, 0}, - {"TIMESTAMP",1, field_fmt_224_255_5_5_info, field_fmt_224_255_5_5_set, field_fmt_224_255_5_5_get, NULL, 0}, - {"TIMESTAMP_HI",1, field_fmt_256_271_4_4_info, field_fmt_256_271_4_4_set, field_fmt_256_271_4_4_get, NULL, 0}, - {"IEEE_802_1AS_TIMESTAMP_ENABLED",1, field_fmt_272_272_4_4_info, field_fmt_272_272_4_4_set, field_fmt_272_272_4_4_get, bcm78907_a0_rxpmd_ieee_802_1as_timestamp_enabled_names, 0}, - {"TUNNEL_DECAP_TYPE",1, field_fmt_273_276_4_4_info, field_fmt_273_276_4_4_set, field_fmt_273_276_4_4_get, NULL, 0}, - {"UC_SW_COPY_DROPPED",1, field_fmt_277_277_4_4_info, field_fmt_277_277_4_4_set, field_fmt_277_277_4_4_get, NULL, 0}, - {"UNICAST_QUEUE",1, field_fmt_278_278_4_4_info, field_fmt_278_278_4_4_set, field_fmt_278_278_4_4_get, NULL, 0}, - {"INCOMING_INT_HDR_TYPE",1, field_fmt_279_280_4_4_info, field_fmt_279_280_4_4_set, field_fmt_279_280_4_4_get, NULL, 0}, - {"DLB_ID",1, field_fmt_281_287_4_4_info, field_fmt_281_287_4_4_set, field_fmt_281_287_4_4_get, NULL, 0}, - {"MODULE_HDR",4, field_fmt_288_415_3_0_info, field_fmt_288_415_3_0_set, field_fmt_288_415_3_0_get, NULL, 0}, + {2, field_fmt_0_63_12_11_info, field_fmt_0_63_12_11_set, field_fmt_0_63_12_11_get, NULL, 0}, + {1, field_fmt_64_67_10_10_info, field_fmt_64_67_10_10_set, field_fmt_64_67_10_10_get, bcm78907_a0_rxpmd_reason_type_names, 0}, + {1, field_fmt_68_80_10_10_info, field_fmt_68_80_10_10_set, field_fmt_68_80_10_10_get, NULL, 0}, + {1, field_fmt_68_79_10_10_info, field_fmt_68_79_10_10_set, field_fmt_68_79_10_10_get, NULL, 0}, + {1, field_fmt_68_79_10_10_info, field_fmt_68_79_10_10_set, field_fmt_68_79_10_10_get, NULL, 0}, + {1, field_fmt_80_83_10_10_info, field_fmt_80_83_10_10_set, field_fmt_80_83_10_10_get, NULL, 0}, + {1, field_fmt_80_81_10_10_info, field_fmt_80_81_10_10_set, field_fmt_80_81_10_10_get, NULL, 0}, + {1, field_fmt_82_89_10_10_info, field_fmt_82_89_10_10_set, field_fmt_82_89_10_10_get, NULL, 0}, + {1, field_fmt_84_84_10_10_info, field_fmt_84_84_10_10_set, field_fmt_84_84_10_10_get, NULL, 0}, + {1, field_fmt_90_95_10_10_info, field_fmt_90_95_10_10_set, field_fmt_90_95_10_10_get, NULL, 0}, + {1, field_fmt_90_95_10_10_info, field_fmt_90_95_10_10_set, field_fmt_90_95_10_10_get, NULL, 0}, + {1, field_fmt_97_97_9_9_info, field_fmt_97_97_9_9_set, field_fmt_97_97_9_9_get, NULL, 0}, + {1, field_fmt_98_99_9_9_info, field_fmt_98_99_9_9_set, field_fmt_98_99_9_9_get, NULL, 0}, + {1, field_fmt_100_113_9_9_info, field_fmt_100_113_9_9_set, field_fmt_100_113_9_9_get, NULL, 0}, + {1, field_fmt_114_128_9_8_info, field_fmt_114_128_9_8_set, field_fmt_114_128_9_8_get, NULL, 0}, + {1, field_fmt_129_129_8_8_info, field_fmt_129_129_8_8_set, field_fmt_129_129_8_8_get, NULL, 0}, + {1, field_fmt_130_130_8_8_info, field_fmt_130_130_8_8_set, field_fmt_130_130_8_8_get, NULL, 0}, + {1, field_fmt_131_131_8_8_info, field_fmt_131_131_8_8_set, field_fmt_131_131_8_8_get, NULL, 0}, + {1, field_fmt_132_132_8_8_info, field_fmt_132_132_8_8_set, field_fmt_132_132_8_8_get, NULL, 0}, + {1, field_fmt_133_133_8_8_info, field_fmt_133_133_8_8_set, field_fmt_133_133_8_8_get, NULL, 0}, + {1, field_fmt_134_134_8_8_info, field_fmt_134_134_8_8_set, field_fmt_134_134_8_8_get, NULL, 0}, + {1, field_fmt_135_140_8_8_info, field_fmt_135_140_8_8_set, field_fmt_135_140_8_8_get, NULL, 0}, + {1, field_fmt_135_137_8_8_info, field_fmt_135_137_8_8_set, field_fmt_135_137_8_8_get, NULL, 0}, + {1, field_fmt_141_142_8_8_info, field_fmt_141_142_8_8_set, field_fmt_141_142_8_8_get, NULL, 0}, + {1, field_fmt_143_143_8_8_info, field_fmt_143_143_8_8_set, field_fmt_143_143_8_8_get, NULL, 0}, + {1, field_fmt_144_144_8_8_info, field_fmt_144_144_8_8_set, field_fmt_144_144_8_8_get, NULL, 0}, + {1, field_fmt_145_156_8_8_info, field_fmt_145_156_8_8_set, field_fmt_145_156_8_8_get, NULL, 0}, + {1, field_fmt_157_159_8_8_info, field_fmt_157_159_8_8_set, field_fmt_157_159_8_8_get, NULL, 0}, + {1, field_fmt_160_160_7_7_info, field_fmt_160_160_7_7_set, field_fmt_160_160_7_7_get, NULL, 0}, + {1, field_fmt_161_163_7_7_info, field_fmt_161_163_7_7_set, field_fmt_161_163_7_7_get, NULL, 0}, + {1, field_fmt_164_175_7_7_info, field_fmt_164_175_7_7_set, field_fmt_164_175_7_7_get, NULL, 0}, + {1, field_fmt_176_190_7_7_info, field_fmt_176_190_7_7_set, field_fmt_176_190_7_7_get, NULL, 0}, + {1, field_fmt_191_191_7_7_info, field_fmt_191_191_7_7_set, field_fmt_191_191_7_7_get, NULL, 0}, + {1, field_fmt_192_211_6_6_info, field_fmt_192_211_6_6_set, field_fmt_192_211_6_6_get, NULL, 0}, + {1, field_fmt_212_212_6_6_info, field_fmt_212_212_6_6_set, field_fmt_212_212_6_6_get, NULL, 0}, + {1, field_fmt_213_222_6_6_info, field_fmt_213_222_6_6_set, field_fmt_213_222_6_6_get, NULL, 0}, + {1, field_fmt_223_223_6_6_info, field_fmt_223_223_6_6_set, field_fmt_223_223_6_6_get, NULL, 0}, + {1, field_fmt_224_255_5_5_info, field_fmt_224_255_5_5_set, field_fmt_224_255_5_5_get, NULL, 0}, + {1, field_fmt_256_271_4_4_info, field_fmt_256_271_4_4_set, field_fmt_256_271_4_4_get, NULL, 0}, + {1, field_fmt_272_272_4_4_info, field_fmt_272_272_4_4_set, field_fmt_272_272_4_4_get, bcm78907_a0_rxpmd_ieee_802_1as_timestamp_enabled_names, 0}, + {1, field_fmt_273_276_4_4_info, field_fmt_273_276_4_4_set, field_fmt_273_276_4_4_get, NULL, 0}, + {1, field_fmt_277_277_4_4_info, field_fmt_277_277_4_4_set, field_fmt_277_277_4_4_get, NULL, 0}, + {1, field_fmt_278_278_4_4_info, field_fmt_278_278_4_4_set, field_fmt_278_278_4_4_get, NULL, 0}, + {1, field_fmt_279_280_4_4_info, field_fmt_279_280_4_4_set, field_fmt_279_280_4_4_get, NULL, 0}, + {1, field_fmt_281_287_4_4_info, field_fmt_281_287_4_4_set, field_fmt_281_287_4_4_get, NULL, 0}, + {4, field_fmt_288_415_3_0_info, field_fmt_288_415_3_0_set, field_fmt_288_415_3_0_get, NULL, 0}, }; @@ -2988,52 +2987,52 @@ bcmpkt_pmd_info_t bcm78907_a0_rxpmd_info_get(void) } static bcmpkt_pmd_field_t bcm78907_a0_rx_reason_fields[BCM78907_A0_RX_REASON_COUNT] = { - {"CPU_INVALID_REASON",1, field_fmt_0_0_12_12_info, field_fmt_0_0_12_12_set, field_fmt_0_0_12_12_get, NULL, 0}, - {"CPU_SLF",1, field_fmt_1_1_12_12_info, field_fmt_1_1_12_12_set, field_fmt_1_1_12_12_get, NULL, 0}, - {"CPU_DLF",1, field_fmt_2_2_12_12_info, field_fmt_2_2_12_12_set, field_fmt_2_2_12_12_get, NULL, 0}, - {"CPU_L2MOVE",1, field_fmt_3_3_12_12_info, field_fmt_3_3_12_12_set, field_fmt_3_3_12_12_get, NULL, 0}, - {"CPU_L2CPU",1, field_fmt_4_4_12_12_info, field_fmt_4_4_12_12_set, field_fmt_4_4_12_12_get, NULL, 0}, - {"CPU_L3SRC_MISS",1, field_fmt_5_5_12_12_info, field_fmt_5_5_12_12_set, field_fmt_5_5_12_12_get, NULL, 0}, - {"CPU_L3DST_MISS",1, field_fmt_6_6_12_12_info, field_fmt_6_6_12_12_set, field_fmt_6_6_12_12_get, NULL, 0}, - {"CPU_L3SRC_MOVE",1, field_fmt_7_7_12_12_info, field_fmt_7_7_12_12_set, field_fmt_7_7_12_12_get, NULL, 0}, - {"CPU_MC_MISS",1, field_fmt_8_8_12_12_info, field_fmt_8_8_12_12_set, field_fmt_8_8_12_12_get, NULL, 0}, - {"CPU_IPMC_MISS",1, field_fmt_9_9_12_12_info, field_fmt_9_9_12_12_set, field_fmt_9_9_12_12_get, NULL, 0}, - {"CPU_FFP",1, field_fmt_10_10_12_12_info, field_fmt_10_10_12_12_set, field_fmt_10_10_12_12_get, NULL, 0}, - {"CPU_L3HDR_ERR",1, field_fmt_11_11_12_12_info, field_fmt_11_11_12_12_set, field_fmt_11_11_12_12_get, NULL, 0}, - {"CPU_PROTOCOL_PKT",1, field_fmt_12_12_12_12_info, field_fmt_12_12_12_12_set, field_fmt_12_12_12_12_get, NULL, 0}, - {"CPU_DOS_ATTACK",1, field_fmt_13_13_12_12_info, field_fmt_13_13_12_12_set, field_fmt_13_13_12_12_get, NULL, 0}, - {"CPU_MARTIAN_ADDR",1, field_fmt_14_14_12_12_info, field_fmt_14_14_12_12_set, field_fmt_14_14_12_12_get, NULL, 0}, - {"CPU_TUNNEL_ERR",1, field_fmt_15_15_12_12_info, field_fmt_15_15_12_12_set, field_fmt_15_15_12_12_get, NULL, 0}, - {"CPU_SFLOW_SRC",1, field_fmt_16_16_12_12_info, field_fmt_16_16_12_12_set, field_fmt_16_16_12_12_get, NULL, 0}, - {"CPU_SFLOW_DST",1, field_fmt_17_17_12_12_info, field_fmt_17_17_12_12_set, field_fmt_17_17_12_12_get, NULL, 0}, - {"ICMP_REDIRECT",1, field_fmt_18_18_12_12_info, field_fmt_18_18_12_12_set, field_fmt_18_18_12_12_get, NULL, 0}, - {"L3_SLOWPATH",1, field_fmt_19_19_12_12_info, field_fmt_19_19_12_12_set, field_fmt_19_19_12_12_get, NULL, 0}, - {"PARITY_ERROR",1, field_fmt_20_20_12_12_info, field_fmt_20_20_12_12_set, field_fmt_20_20_12_12_get, NULL, 0}, - {"L3_MTU_CHECK_FAIL",1, field_fmt_21_21_12_12_info, field_fmt_21_21_12_12_set, field_fmt_21_21_12_12_get, NULL, 0}, - {"MPLS_TTL_CHECK",1, field_fmt_22_22_12_12_info, field_fmt_22_22_12_12_set, field_fmt_22_22_12_12_get, NULL, 0}, - {"MPLS_LABEL_MISS",1, field_fmt_23_23_12_12_info, field_fmt_23_23_12_12_set, field_fmt_23_23_12_12_get, NULL, 0}, - {"MPLS_INVALID_ACTION",1, field_fmt_24_24_12_12_info, field_fmt_24_24_12_12_set, field_fmt_24_24_12_12_get, NULL, 0}, - {"MPLS_INVALID_PAYLOAD",1, field_fmt_25_25_12_12_info, field_fmt_25_25_12_12_set, field_fmt_25_25_12_12_get, NULL, 0}, - {"CPU_VFP",1, field_fmt_26_26_12_12_info, field_fmt_26_26_12_12_set, field_fmt_26_26_12_12_get, NULL, 0}, - {"PBT_NONUC_PKT",1, field_fmt_27_27_12_12_info, field_fmt_27_27_12_12_set, field_fmt_27_27_12_12_get, NULL, 0}, - {"L3_NEXT_HOP",1, field_fmt_28_28_12_12_info, field_fmt_28_28_12_12_set, field_fmt_28_28_12_12_get, NULL, 0}, - {"MY_STATION",1, field_fmt_29_29_12_12_info, field_fmt_29_29_12_12_set, field_fmt_29_29_12_12_get, NULL, 0}, - {"TIME_SYNC",1, field_fmt_30_30_12_12_info, field_fmt_30_30_12_12_set, field_fmt_30_30_12_12_get, NULL, 0}, - {"TUNNEL_DECAP_ECN_ERROR",1, field_fmt_31_31_12_12_info, field_fmt_31_31_12_12_set, field_fmt_31_31_12_12_get, NULL, 0}, - {"BFD_SLOWPATH",1, field_fmt_32_32_11_11_info, field_fmt_32_32_11_11_set, field_fmt_32_32_11_11_get, NULL, 0}, - {"BFD_ERROR",1, field_fmt_33_33_11_11_info, field_fmt_33_33_11_11_set, field_fmt_33_33_11_11_get, NULL, 0}, - {"PACKET_TRACE_TO_CPU",1, field_fmt_34_34_11_11_info, field_fmt_34_34_11_11_set, field_fmt_34_34_11_11_get, NULL, 0}, - {"MPLS_UNKNOWN_CONTROL_PKT",1, field_fmt_35_35_11_11_info, field_fmt_35_35_11_11_set, field_fmt_35_35_11_11_get, NULL, 0}, - {"MPLS_ALERT_LABEL",1, field_fmt_36_36_11_11_info, field_fmt_36_36_11_11_set, field_fmt_36_36_11_11_get, NULL, 0}, - {"CPU_IPMC_INTERFACE_MISMATCH",1, field_fmt_37_37_11_11_info, field_fmt_37_37_11_11_set, field_fmt_37_37_11_11_get, NULL, 0}, - {"DLB_MONITOR",1, field_fmt_38_38_11_11_info, field_fmt_38_38_11_11_set, field_fmt_38_38_11_11_get, NULL, 0}, - {"CPU_SFLOW_FLEX",1, field_fmt_39_39_11_11_info, field_fmt_39_39_11_11_set, field_fmt_39_39_11_11_get, NULL, 0}, - {"CPU_UVLAN",1, field_fmt_40_40_11_11_info, field_fmt_40_40_11_11_set, field_fmt_40_40_11_11_get, NULL, 0}, - {"SRV6_ERROR",1, field_fmt_41_41_11_11_info, field_fmt_41_41_11_11_set, field_fmt_41_41_11_11_get, NULL, 0}, - {"VXLAN_VN_ID_MISS",1, field_fmt_42_42_11_11_info, field_fmt_42_42_11_11_set, field_fmt_42_42_11_11_get, NULL, 0}, - {"VXLAN_SIP_MISS",1, field_fmt_43_43_11_11_info, field_fmt_43_43_11_11_set, field_fmt_43_43_11_11_get, NULL, 0}, - {"ADAPT_MISS",1, field_fmt_44_44_11_11_info, field_fmt_44_44_11_11_set, field_fmt_44_44_11_11_get, NULL, 0}, - {"INVALID_GSH_NON_GSH",1, field_fmt_45_45_11_11_info, field_fmt_45_45_11_11_set, field_fmt_45_45_11_11_get, NULL, 0}, + {1, field_fmt_0_0_12_12_info, field_fmt_0_0_12_12_set, field_fmt_0_0_12_12_get, NULL, 0}, + {1, field_fmt_1_1_12_12_info, field_fmt_1_1_12_12_set, field_fmt_1_1_12_12_get, NULL, 0}, + {1, field_fmt_2_2_12_12_info, field_fmt_2_2_12_12_set, field_fmt_2_2_12_12_get, NULL, 0}, + {1, field_fmt_3_3_12_12_info, field_fmt_3_3_12_12_set, field_fmt_3_3_12_12_get, NULL, 0}, + {1, field_fmt_4_4_12_12_info, field_fmt_4_4_12_12_set, field_fmt_4_4_12_12_get, NULL, 0}, + {1, field_fmt_5_5_12_12_info, field_fmt_5_5_12_12_set, field_fmt_5_5_12_12_get, NULL, 0}, + {1, field_fmt_6_6_12_12_info, field_fmt_6_6_12_12_set, field_fmt_6_6_12_12_get, NULL, 0}, + {1, field_fmt_7_7_12_12_info, field_fmt_7_7_12_12_set, field_fmt_7_7_12_12_get, NULL, 0}, + {1, field_fmt_8_8_12_12_info, field_fmt_8_8_12_12_set, field_fmt_8_8_12_12_get, NULL, 0}, + {1, field_fmt_9_9_12_12_info, field_fmt_9_9_12_12_set, field_fmt_9_9_12_12_get, NULL, 0}, + {1, field_fmt_10_10_12_12_info, field_fmt_10_10_12_12_set, field_fmt_10_10_12_12_get, NULL, 0}, + {1, field_fmt_11_11_12_12_info, field_fmt_11_11_12_12_set, field_fmt_11_11_12_12_get, NULL, 0}, + {1, field_fmt_12_12_12_12_info, field_fmt_12_12_12_12_set, field_fmt_12_12_12_12_get, NULL, 0}, + {1, field_fmt_13_13_12_12_info, field_fmt_13_13_12_12_set, field_fmt_13_13_12_12_get, NULL, 0}, + {1, field_fmt_14_14_12_12_info, field_fmt_14_14_12_12_set, field_fmt_14_14_12_12_get, NULL, 0}, + {1, field_fmt_15_15_12_12_info, field_fmt_15_15_12_12_set, field_fmt_15_15_12_12_get, NULL, 0}, + {1, field_fmt_16_16_12_12_info, field_fmt_16_16_12_12_set, field_fmt_16_16_12_12_get, NULL, 0}, + {1, field_fmt_17_17_12_12_info, field_fmt_17_17_12_12_set, field_fmt_17_17_12_12_get, NULL, 0}, + {1, field_fmt_18_18_12_12_info, field_fmt_18_18_12_12_set, field_fmt_18_18_12_12_get, NULL, 0}, + {1, field_fmt_19_19_12_12_info, field_fmt_19_19_12_12_set, field_fmt_19_19_12_12_get, NULL, 0}, + {1, field_fmt_20_20_12_12_info, field_fmt_20_20_12_12_set, field_fmt_20_20_12_12_get, NULL, 0}, + {1, field_fmt_21_21_12_12_info, field_fmt_21_21_12_12_set, field_fmt_21_21_12_12_get, NULL, 0}, + {1, field_fmt_22_22_12_12_info, field_fmt_22_22_12_12_set, field_fmt_22_22_12_12_get, NULL, 0}, + {1, field_fmt_23_23_12_12_info, field_fmt_23_23_12_12_set, field_fmt_23_23_12_12_get, NULL, 0}, + {1, field_fmt_24_24_12_12_info, field_fmt_24_24_12_12_set, field_fmt_24_24_12_12_get, NULL, 0}, + {1, field_fmt_25_25_12_12_info, field_fmt_25_25_12_12_set, field_fmt_25_25_12_12_get, NULL, 0}, + {1, field_fmt_26_26_12_12_info, field_fmt_26_26_12_12_set, field_fmt_26_26_12_12_get, NULL, 0}, + {1, field_fmt_27_27_12_12_info, field_fmt_27_27_12_12_set, field_fmt_27_27_12_12_get, NULL, 0}, + {1, field_fmt_28_28_12_12_info, field_fmt_28_28_12_12_set, field_fmt_28_28_12_12_get, NULL, 0}, + {1, field_fmt_29_29_12_12_info, field_fmt_29_29_12_12_set, field_fmt_29_29_12_12_get, NULL, 0}, + {1, field_fmt_30_30_12_12_info, field_fmt_30_30_12_12_set, field_fmt_30_30_12_12_get, NULL, 0}, + {1, field_fmt_31_31_12_12_info, field_fmt_31_31_12_12_set, field_fmt_31_31_12_12_get, NULL, 0}, + {1, field_fmt_32_32_11_11_info, field_fmt_32_32_11_11_set, field_fmt_32_32_11_11_get, NULL, 0}, + {1, field_fmt_33_33_11_11_info, field_fmt_33_33_11_11_set, field_fmt_33_33_11_11_get, NULL, 0}, + {1, field_fmt_34_34_11_11_info, field_fmt_34_34_11_11_set, field_fmt_34_34_11_11_get, NULL, 0}, + {1, field_fmt_35_35_11_11_info, field_fmt_35_35_11_11_set, field_fmt_35_35_11_11_get, NULL, 0}, + {1, field_fmt_36_36_11_11_info, field_fmt_36_36_11_11_set, field_fmt_36_36_11_11_get, NULL, 0}, + {1, field_fmt_37_37_11_11_info, field_fmt_37_37_11_11_set, field_fmt_37_37_11_11_get, NULL, 0}, + {1, field_fmt_38_38_11_11_info, field_fmt_38_38_11_11_set, field_fmt_38_38_11_11_get, NULL, 0}, + {1, field_fmt_39_39_11_11_info, field_fmt_39_39_11_11_set, field_fmt_39_39_11_11_get, NULL, 0}, + {1, field_fmt_40_40_11_11_info, field_fmt_40_40_11_11_set, field_fmt_40_40_11_11_get, NULL, 0}, + {1, field_fmt_41_41_11_11_info, field_fmt_41_41_11_11_set, field_fmt_41_41_11_11_get, NULL, 0}, + {1, field_fmt_42_42_11_11_info, field_fmt_42_42_11_11_set, field_fmt_42_42_11_11_get, NULL, 0}, + {1, field_fmt_43_43_11_11_info, field_fmt_43_43_11_11_set, field_fmt_43_43_11_11_get, NULL, 0}, + {1, field_fmt_44_44_11_11_info, field_fmt_44_44_11_11_set, field_fmt_44_44_11_11_get, NULL, 0}, + {1, field_fmt_45_45_11_11_info, field_fmt_45_45_11_11_set, field_fmt_45_45_11_11_get, NULL, 0}, }; @@ -3049,7 +3048,7 @@ bcmpkt_pmd_info_t bcm78907_a0_rx_reason_info_get(void) } static bcmpkt_pmd_field_t bcm78907_a0_ep_rx_reason_fields[BCM78907_A0_EP_RX_REASON_COUNT] = { - {"EP_CTC",1, field_fmt_0_0_12_12_info, field_fmt_0_0_12_12_set, field_fmt_0_0_12_12_get, NULL, 0}, + {1, field_fmt_0_0_12_12_info, field_fmt_0_0_12_12_set, field_fmt_0_0_12_12_get, NULL, 0}, }; @@ -3090,41 +3089,41 @@ static const shr_enum_map_t bcm78907_a0_txpmd_start_names[] = }; static bcmpkt_pmd_field_t bcm78907_a0_txpmd_fields[BCM78907_A0_TXPMD_COUNT] = { - {"CPU_TX::ECMP_MEMBER_ID",1, field_fmt_0_16_3_3_info, field_fmt_0_16_3_3_set, field_fmt_0_16_3_3_get, NULL, 2}, - {"CPU_TX::MCAST_LB_INDEX",1, field_fmt_0_7_3_3_info, field_fmt_0_7_3_3_set, field_fmt_0_7_3_3_get, NULL, 2}, - {"CPU_TX::DESTINATION",1, field_fmt_17_32_3_2_info, field_fmt_17_32_3_2_set, field_fmt_17_32_3_2_get, NULL, 2}, - {"CPU_TX::DESTINATION_TYPE",1, field_fmt_33_36_2_2_info, field_fmt_33_36_2_2_set, field_fmt_33_36_2_2_get, bcm78907_a0_txpmd_cpu_tx_destination_type_names, 2}, - {"CPU_TX::DP",1, field_fmt_37_38_2_2_info, field_fmt_37_38_2_2_set, field_fmt_37_38_2_2_get, bcm78907_a0_txpmd_cpu_tx_dp_names, 2}, - {"CPU_TX::INPUT_PRI",1, field_fmt_39_42_2_2_info, field_fmt_39_42_2_2_set, field_fmt_39_42_2_2_get, NULL, 2}, - {"CPU_TX::INT_CN",1, field_fmt_43_44_2_2_info, field_fmt_43_44_2_2_set, field_fmt_43_44_2_2_get, NULL, 2}, - {"CPU_TX::INT_PRI",1, field_fmt_45_48_2_2_info, field_fmt_45_48_2_2_set, field_fmt_45_48_2_2_get, NULL, 2}, - {"CPU_TX::MCAST_LB_INDEX_VLD",1, field_fmt_49_49_2_2_info, field_fmt_49_49_2_2_set, field_fmt_49_49_2_2_get, NULL, 2}, - {"CPU_TX::PKT_PROFILE",1, field_fmt_50_52_2_2_info, field_fmt_50_52_2_2_set, field_fmt_50_52_2_2_get, NULL, 2}, - {"CPU_TX::QOS_FIELDS_VLD",1, field_fmt_53_53_2_2_info, field_fmt_53_53_2_2_set, field_fmt_53_53_2_2_get, NULL, 2}, - {"CPU_TX::ROUTED_PKT",1, field_fmt_54_54_2_2_info, field_fmt_54_54_2_2_set, field_fmt_54_54_2_2_get, NULL, 2}, - {"CPU_TX::VRF",1, field_fmt_55_67_2_1_info, field_fmt_55_67_2_1_set, field_fmt_55_67_2_1_get, NULL, 2}, - {"CPU_TX::VRF_VALID",1, field_fmt_68_68_1_1_info, field_fmt_68_68_1_1_set, field_fmt_68_68_1_1_get, NULL, 2}, - {"SOBMH_FROM_CPU::CELL_ERROR",1, field_fmt_0_0_3_3_info, field_fmt_0_0_3_3_set, field_fmt_0_0_3_3_get, NULL, 1}, - {"SOBMH_FROM_CPU::CNG",1, field_fmt_1_2_3_3_info, field_fmt_1_2_3_3_set, field_fmt_1_2_3_3_get, NULL, 1}, - {"SOBMH_FROM_CPU::COS",1, field_fmt_3_8_3_3_info, field_fmt_3_8_3_3_set, field_fmt_3_8_3_3_get, NULL, 1}, - {"SOBMH_FROM_CPU::DESTINATION",1, field_fmt_9_24_3_3_info, field_fmt_9_24_3_3_set, field_fmt_9_24_3_3_get, NULL, 1}, - {"SOBMH_FROM_CPU::DESTINATION_TYPE",1, field_fmt_25_28_3_3_info, field_fmt_25_28_3_3_set, field_fmt_25_28_3_3_get, bcm78907_a0_txpmd_sobmh_from_cpu_destination_type_names, 1}, - {"SOBMH_FROM_CPU::IEEE1588_INGRESS_TIMESTAMP_SIGN",1, field_fmt_29_29_3_3_info, field_fmt_29_29_3_3_set, field_fmt_29_29_3_3_get, NULL, 1}, - {"SOBMH_FROM_CPU::IEEE1588_ONE_STEP_ENABLE",1, field_fmt_30_30_3_3_info, field_fmt_30_30_3_3_set, field_fmt_30_30_3_3_get, NULL, 1}, - {"SOBMH_FROM_CPU::IEEE1588_REGEN_UDP_CHECKSUM",1, field_fmt_31_31_3_3_info, field_fmt_31_31_3_3_set, field_fmt_31_31_3_3_get, NULL, 1}, - {"SOBMH_FROM_CPU::IEEE1588_TIMESTAMP_HDR_OFFSET",1, field_fmt_32_39_2_2_info, field_fmt_32_39_2_2_set, field_fmt_32_39_2_2_get, NULL, 1}, - {"SOBMH_FROM_CPU::INPUT_PRI",1, field_fmt_40_43_2_2_info, field_fmt_40_43_2_2_set, field_fmt_40_43_2_2_get, NULL, 1}, - {"SOBMH_FROM_CPU::RQE_Q_NUM",1, field_fmt_44_46_2_2_info, field_fmt_44_46_2_2_set, field_fmt_44_46_2_2_get, NULL, 1}, - {"SOBMH_FROM_CPU::SPAP",1, field_fmt_47_48_2_2_info, field_fmt_47_48_2_2_set, field_fmt_47_48_2_2_get, NULL, 1}, - {"SOBMH_FROM_CPU::SPID",1, field_fmt_49_50_2_2_info, field_fmt_49_50_2_2_set, field_fmt_49_50_2_2_get, NULL, 1}, - {"SOBMH_FROM_CPU::SPID_OVERRIDE",1, field_fmt_51_51_2_2_info, field_fmt_51_51_2_2_set, field_fmt_51_51_2_2_get, NULL, 1}, - {"SOBMH_FROM_CPU::SRC_MODID",1, field_fmt_52_59_2_2_info, field_fmt_52_59_2_2_set, field_fmt_52_59_2_2_get, NULL, 1}, - {"SOBMH_FROM_CPU::TX_TS",1, field_fmt_60_60_2_2_info, field_fmt_60_60_2_2_set, field_fmt_60_60_2_2_get, NULL, 1}, - {"SOBMH_FROM_CPU::UNICAST",1, field_fmt_61_61_2_2_info, field_fmt_61_61_2_2_set, field_fmt_61_61_2_2_get, NULL, 1}, - {"SOBMH_FROM_CPU::WRED_MARK_ELIGIBLE",1, field_fmt_62_62_2_2_info, field_fmt_62_62_2_2_set, field_fmt_62_62_2_2_get, NULL, 1}, - {"SOBMH_FROM_CPU::WRED_RESPONSE",1, field_fmt_63_63_2_2_info, field_fmt_63_63_2_2_set, field_fmt_63_63_2_2_get, NULL, 1}, - {"HEADER_TYPE",1, field_fmt_120_125_0_0_info, field_fmt_120_125_0_0_set, field_fmt_120_125_0_0_get, bcm78907_a0_txpmd_header_type_names, 0}, - {"START",1, field_fmt_126_127_0_0_info, field_fmt_126_127_0_0_set, field_fmt_126_127_0_0_get, bcm78907_a0_txpmd_start_names, 0}, + {1, field_fmt_0_16_3_3_info, field_fmt_0_16_3_3_set, field_fmt_0_16_3_3_get, NULL, 2}, + {1, field_fmt_0_7_3_3_info, field_fmt_0_7_3_3_set, field_fmt_0_7_3_3_get, NULL, 2}, + {1, field_fmt_17_32_3_2_info, field_fmt_17_32_3_2_set, field_fmt_17_32_3_2_get, NULL, 2}, + {1, field_fmt_33_36_2_2_info, field_fmt_33_36_2_2_set, field_fmt_33_36_2_2_get, bcm78907_a0_txpmd_cpu_tx_destination_type_names, 2}, + {1, field_fmt_37_38_2_2_info, field_fmt_37_38_2_2_set, field_fmt_37_38_2_2_get, bcm78907_a0_txpmd_cpu_tx_dp_names, 2}, + {1, field_fmt_39_42_2_2_info, field_fmt_39_42_2_2_set, field_fmt_39_42_2_2_get, NULL, 2}, + {1, field_fmt_43_44_2_2_info, field_fmt_43_44_2_2_set, field_fmt_43_44_2_2_get, NULL, 2}, + {1, field_fmt_45_48_2_2_info, field_fmt_45_48_2_2_set, field_fmt_45_48_2_2_get, NULL, 2}, + {1, field_fmt_49_49_2_2_info, field_fmt_49_49_2_2_set, field_fmt_49_49_2_2_get, NULL, 2}, + {1, field_fmt_50_52_2_2_info, field_fmt_50_52_2_2_set, field_fmt_50_52_2_2_get, NULL, 2}, + {1, field_fmt_53_53_2_2_info, field_fmt_53_53_2_2_set, field_fmt_53_53_2_2_get, NULL, 2}, + {1, field_fmt_54_54_2_2_info, field_fmt_54_54_2_2_set, field_fmt_54_54_2_2_get, NULL, 2}, + {1, field_fmt_55_67_2_1_info, field_fmt_55_67_2_1_set, field_fmt_55_67_2_1_get, NULL, 2}, + {1, field_fmt_68_68_1_1_info, field_fmt_68_68_1_1_set, field_fmt_68_68_1_1_get, NULL, 2}, + {1, field_fmt_0_0_3_3_info, field_fmt_0_0_3_3_set, field_fmt_0_0_3_3_get, NULL, 1}, + {1, field_fmt_1_2_3_3_info, field_fmt_1_2_3_3_set, field_fmt_1_2_3_3_get, NULL, 1}, + {1, field_fmt_3_8_3_3_info, field_fmt_3_8_3_3_set, field_fmt_3_8_3_3_get, NULL, 1}, + {1, field_fmt_9_24_3_3_info, field_fmt_9_24_3_3_set, field_fmt_9_24_3_3_get, NULL, 1}, + {1, field_fmt_25_28_3_3_info, field_fmt_25_28_3_3_set, field_fmt_25_28_3_3_get, bcm78907_a0_txpmd_sobmh_from_cpu_destination_type_names, 1}, + {1, field_fmt_29_29_3_3_info, field_fmt_29_29_3_3_set, field_fmt_29_29_3_3_get, NULL, 1}, + {1, field_fmt_30_30_3_3_info, field_fmt_30_30_3_3_set, field_fmt_30_30_3_3_get, NULL, 1}, + {1, field_fmt_31_31_3_3_info, field_fmt_31_31_3_3_set, field_fmt_31_31_3_3_get, NULL, 1}, + {1, field_fmt_32_39_2_2_info, field_fmt_32_39_2_2_set, field_fmt_32_39_2_2_get, NULL, 1}, + {1, field_fmt_40_43_2_2_info, field_fmt_40_43_2_2_set, field_fmt_40_43_2_2_get, NULL, 1}, + {1, field_fmt_44_46_2_2_info, field_fmt_44_46_2_2_set, field_fmt_44_46_2_2_get, NULL, 1}, + {1, field_fmt_47_48_2_2_info, field_fmt_47_48_2_2_set, field_fmt_47_48_2_2_get, NULL, 1}, + {1, field_fmt_49_50_2_2_info, field_fmt_49_50_2_2_set, field_fmt_49_50_2_2_get, NULL, 1}, + {1, field_fmt_51_51_2_2_info, field_fmt_51_51_2_2_set, field_fmt_51_51_2_2_get, NULL, 1}, + {1, field_fmt_52_59_2_2_info, field_fmt_52_59_2_2_set, field_fmt_52_59_2_2_get, NULL, 1}, + {1, field_fmt_60_60_2_2_info, field_fmt_60_60_2_2_set, field_fmt_60_60_2_2_get, NULL, 1}, + {1, field_fmt_61_61_2_2_info, field_fmt_61_61_2_2_set, field_fmt_61_61_2_2_get, NULL, 1}, + {1, field_fmt_62_62_2_2_info, field_fmt_62_62_2_2_set, field_fmt_62_62_2_2_get, NULL, 1}, + {1, field_fmt_63_63_2_2_info, field_fmt_63_63_2_2_set, field_fmt_63_63_2_2_get, NULL, 1}, + {1, field_fmt_120_125_0_0_info, field_fmt_120_125_0_0_set, field_fmt_120_125_0_0_get, bcm78907_a0_txpmd_header_type_names, 0}, + {1, field_fmt_126_127_0_0_info, field_fmt_126_127_0_0_set, field_fmt_126_127_0_0_get, bcm78907_a0_txpmd_start_names, 0}, }; @@ -3150,20 +3149,20 @@ static const shr_enum_map_t bcm78907_a0_lbhdr_start_names[] = }; static bcmpkt_pmd_field_t bcm78907_a0_lbhdr_fields[BCM78907_A0_LBHDR_COUNT] = { - {"VISIBILITY_PKT",1, field_fmt_45_45_2_2_info, field_fmt_45_45_2_2_set, field_fmt_45_45_2_2_get, NULL, 0}, - {"VRF_VALID",1, field_fmt_46_46_2_2_info, field_fmt_46_46_2_2_set, field_fmt_46_46_2_2_get, NULL, 0}, - {"ROUTED_PKT",1, field_fmt_47_47_2_2_info, field_fmt_47_47_2_2_set, field_fmt_47_47_2_2_get, NULL, 0}, - {"VRF",1, field_fmt_66_78_1_1_info, field_fmt_66_78_1_1_set, field_fmt_66_78_1_1_get, NULL, 0}, - {"PKT_PROFILE",1, field_fmt_80_82_1_1_info, field_fmt_80_82_1_1_set, field_fmt_80_82_1_1_get, NULL, 0}, - {"QOS_FIELD_VALID",1, field_fmt_83_83_1_1_info, field_fmt_83_83_1_1_set, field_fmt_83_83_1_1_get, NULL, 0}, - {"PP_PORT",1, field_fmt_86_95_1_1_info, field_fmt_86_95_1_1_set, field_fmt_86_95_1_1_get, NULL, 0}, - {"OPAQUE_OBJECT",1, field_fmt_107_110_0_0_info, field_fmt_107_110_0_0_set, field_fmt_107_110_0_0_get, NULL, 0}, - {"QOS_FIELD_ETH",1, field_fmt_111_118_0_0_info, field_fmt_111_118_0_0_set, field_fmt_111_118_0_0_get, NULL, 0}, - {"INT_PRI_ETH",1, field_fmt_111_114_0_0_info, field_fmt_111_114_0_0_set, field_fmt_111_114_0_0_get, NULL, 0}, - {"INT_CN_ETH",1, field_fmt_115_116_0_0_info, field_fmt_115_116_0_0_set, field_fmt_115_116_0_0_get, NULL, 0}, - {"CNG_ETH",1, field_fmt_117_118_0_0_info, field_fmt_117_118_0_0_set, field_fmt_117_118_0_0_get, NULL, 0}, - {"HEADER_TYPE",1, field_fmt_120_125_0_0_info, field_fmt_120_125_0_0_set, field_fmt_120_125_0_0_get, bcm78907_a0_lbhdr_header_type_names, 0}, - {"START",1, field_fmt_126_127_0_0_info, field_fmt_126_127_0_0_set, field_fmt_126_127_0_0_get, bcm78907_a0_lbhdr_start_names, 0}, + {1, field_fmt_45_45_2_2_info, field_fmt_45_45_2_2_set, field_fmt_45_45_2_2_get, NULL, 0}, + {1, field_fmt_46_46_2_2_info, field_fmt_46_46_2_2_set, field_fmt_46_46_2_2_get, NULL, 0}, + {1, field_fmt_47_47_2_2_info, field_fmt_47_47_2_2_set, field_fmt_47_47_2_2_get, NULL, 0}, + {1, field_fmt_66_78_1_1_info, field_fmt_66_78_1_1_set, field_fmt_66_78_1_1_get, NULL, 0}, + {1, field_fmt_80_82_1_1_info, field_fmt_80_82_1_1_set, field_fmt_80_82_1_1_get, NULL, 0}, + {1, field_fmt_83_83_1_1_info, field_fmt_83_83_1_1_set, field_fmt_83_83_1_1_get, NULL, 0}, + {1, field_fmt_86_95_1_1_info, field_fmt_86_95_1_1_set, field_fmt_86_95_1_1_get, NULL, 0}, + {1, field_fmt_107_110_0_0_info, field_fmt_107_110_0_0_set, field_fmt_107_110_0_0_get, NULL, 0}, + {1, field_fmt_111_118_0_0_info, field_fmt_111_118_0_0_set, field_fmt_111_118_0_0_get, NULL, 0}, + {1, field_fmt_111_114_0_0_info, field_fmt_111_114_0_0_set, field_fmt_111_114_0_0_get, NULL, 0}, + {1, field_fmt_115_116_0_0_info, field_fmt_115_116_0_0_set, field_fmt_115_116_0_0_get, NULL, 0}, + {1, field_fmt_117_118_0_0_info, field_fmt_117_118_0_0_set, field_fmt_117_118_0_0_get, NULL, 0}, + {1, field_fmt_120_125_0_0_info, field_fmt_120_125_0_0_set, field_fmt_120_125_0_0_get, bcm78907_a0_lbhdr_header_type_names, 0}, + {1, field_fmt_126_127_0_0_info, field_fmt_126_127_0_0_set, field_fmt_126_127_0_0_get, bcm78907_a0_lbhdr_start_names, 0}, }; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/flexhdr/bcmpkt_flexhdr.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/flexhdr/bcmpkt_flexhdr.c similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/flexhdr/bcmpkt_flexhdr.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/flexhdr/bcmpkt_flexhdr.c index 382efdfc0cb..b4a85434bcd 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/flexhdr/bcmpkt_flexhdr.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/flexhdr/bcmpkt_flexhdr.c @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/bcmpkt_flexhdr.h similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_flexhdr.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/bcmpkt_flexhdr.h index 3b517278386..08df89563d0 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_flexhdr.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/bcmpkt_flexhdr.h @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_flexhdr_field.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/bcmpkt_flexhdr_field.h similarity index 98% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_flexhdr_field.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/bcmpkt_flexhdr_field.h index e55deab4f23..9a458358949 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_flexhdr_field.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/bcmpkt_flexhdr_field.h @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_flexhdr_internal.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/bcmpkt_flexhdr_internal.h similarity index 98% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_flexhdr_internal.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/bcmpkt_flexhdr_internal.h index acab190c14a..95713270468 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_flexhdr_internal.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/bcmpkt_flexhdr_internal.h @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_hg3.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/bcmpkt_hg3.h similarity index 97% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_hg3.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/bcmpkt_hg3.h index 7dc496b719c..80474121b92 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_hg3.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/bcmpkt_hg3.h @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_higig_defs.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/bcmpkt_higig_defs.h similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_higig_defs.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/bcmpkt_higig_defs.h index 566e40fc9f3..928eeaff52a 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_higig_defs.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/bcmpkt_higig_defs.h @@ -7,8 +7,7 @@ * Edits to this file will be lost when it is regenerated. * Tool: INTERNAL/regs/xgs/generate-chip.pl * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr.h similarity index 98% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr.h index 68ff3903ebc..5252a33269e 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr.h @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr_defs.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr_defs.h similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr_defs.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr_defs.h index 5ce55685167..d85047062b1 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr_defs.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr_defs.h @@ -7,8 +7,7 @@ * Edits to this file will be lost when it is regenerated. * Tool: INTERNAL/regs/xgs/generate-pmd.pl * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr_field.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr_field.h similarity index 96% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr_field.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr_field.h index 132dd1cdfa3..56c10eee1f2 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr_field.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr_field.h @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr_internal.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr_internal.h similarity index 97% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr_internal.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr_internal.h index e744fcb930a..830d9663d56 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr_internal.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/bcmpkt_lbhdr_internal.h @@ -5,8 +5,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_pmd.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/bcmpkt_pmd.h similarity index 96% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_pmd.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/bcmpkt_pmd.h index b8584b3744b..20ff6afda2d 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_pmd.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/bcmpkt_pmd.h @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_pmd_internal.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/bcmpkt_pmd_internal.h similarity index 96% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_pmd_internal.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/bcmpkt_pmd_internal.h index 21966107500..ce8d21fd096 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_pmd_internal.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/bcmpkt_pmd_internal.h @@ -7,8 +7,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rcpu_hdr.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rcpu_hdr.h similarity index 95% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rcpu_hdr.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rcpu_hdr.h index 8a231820982..861ba0386cc 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rcpu_hdr.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rcpu_hdr.h @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -63,8 +62,6 @@ #define BCMPKT_RCPU_F_MODHDR (1 << 2) /*! Do not pad runt TX packet. */ #define BCMPKT_RCPU_F_TX_NO_PAD (1 << 4) -/*! Valid CRC is included. */ -#define BCMPKT_RCPU_F_KEEP_CRC (1 << 5) /*! \} */ /*! RCPU default VLAN ID with pri and cfi. */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd.h similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd.h index ed8f3a17933..5a64cd9a2d4 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd.h @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_defs.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_defs.h similarity index 98% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_defs.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_defs.h index 25fa35796ee..01f29bdb8c8 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_defs.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_defs.h @@ -7,8 +7,7 @@ * Edits to this file will be lost when it is regenerated. * Tool: INTERNAL/regs/xgs/generate-pmd.pl * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -292,12 +291,8 @@ #define BCMPKT_RXPMD_IS_EGR_TS 97 /*! If set, then packet has been modified by the EP and CRC needs to be regenerated */ #define BCMPKT_RXPMD_MODIFIED_PKT 98 -/*! */ -#define BCMPKT_RXPMD_FLEX_HDR_MATCH_ID 99 -/*! */ -#define BCMPKT_RXPMD_HVE_RESULT 100 /*! RXPMD FIELD ID NUMBER */ -#define BCMPKT_RXPMD_FID_COUNT 101 +#define BCMPKT_RXPMD_FID_COUNT 99 /*! \} */ /*! RXPMD field name strings for debugging. */ @@ -401,8 +396,6 @@ {"MATCHED_RULE_EP", BCMPKT_RXPMD_MATCHED_RULE_EP},\ {"IS_EGR_TS", BCMPKT_RXPMD_IS_EGR_TS},\ {"MODIFIED_PKT", BCMPKT_RXPMD_MODIFIED_PKT},\ - {"FLEX_HDR_MATCH_ID", BCMPKT_RXPMD_FLEX_HDR_MATCH_ID},\ - {"HVE_RESULT", BCMPKT_RXPMD_HVE_RESULT},\ {"fid count", BCMPKT_RXPMD_FID_COUNT} /*! @@ -850,14 +843,8 @@ #define BCMPKT_RX_REASON_SRV6_CONTROL_PKT 142 /*! OUI Compression miss */ #define BCMPKT_RX_REASON_OUI_COMPRESSION_MISS 143 -/*! Epoch check fail */ -#define BCMPKT_RX_REASON_EPOCH_CHECK_FAIL 144 -/*! DLB ECMP DPG Resolution CTC */ -#define BCMPKT_RX_REASON_DLB_ECMP_DPG_RESOLUTION_CTC 145 -/*! SRV6 ALT FRR not supported */ -#define BCMPKT_RX_REASON_SRV6_ALT_FRR_ERROR 146 /*! BCMPKT_RX_REASON TYPE NUMBER */ -#define BCMPKT_RX_REASON_COUNT 147 +#define BCMPKT_RX_REASON_COUNT 144 /*! \} */ /*! RXPMD reason name strings for debugging. */ @@ -1006,9 +993,6 @@ {"PORT_DOWN", BCMPKT_RX_REASON_PORT_DOWN},\ {"SRV6_CONTROL_PKT", BCMPKT_RX_REASON_SRV6_CONTROL_PKT},\ {"OUI_COMPRESSION_MISS", BCMPKT_RX_REASON_OUI_COMPRESSION_MISS},\ - {"EPOCH_CHECK_FAIL", BCMPKT_RX_REASON_EPOCH_CHECK_FAIL},\ - {"DLB_ECMP_DPG_RESOLUTION_CTC", BCMPKT_RX_REASON_DLB_ECMP_DPG_RESOLUTION_CTC},\ - {"SRV6_ALT_FRR_ERROR", BCMPKT_RX_REASON_SRV6_ALT_FRR_ERROR},\ {"reason count", BCMPKT_RX_REASON_COUNT} #endif /*! BCMPKT_RXPMD_DEFS_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_fid.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_fid.h similarity index 97% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_fid.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_fid.h index 02f37112048..d707513f3c4 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_fid.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_fid.h @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_field.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_field.h similarity index 97% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_field.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_field.h index 1f105244d0b..d317e7fdd42 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_field.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_field.h @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_internal.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_internal.h similarity index 98% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_internal.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_internal.h index 4ebeca2e87e..67ab4e3d5a0 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_internal.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_internal.h @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_match_id.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_match_id.h similarity index 98% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_match_id.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_match_id.h index f3fb6c331ee..d17808075b6 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_match_id.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_match_id.h @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_match_id_defs.h similarity index 95% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_match_id_defs.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_match_id_defs.h index 1c20f02dc79..f879001eec1 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_match_id_defs.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/bcmpkt_rxpmd_match_id_defs.h @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd.h similarity index 98% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd.h index 3b1dd40b0f9..10a7f687993 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd.h @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd_defs.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd_defs.h similarity index 98% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd_defs.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd_defs.h index 8f8ea83722e..7658474bf62 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd_defs.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd_defs.h @@ -7,8 +7,7 @@ * Edits to this file will be lost when it is regenerated. * Tool: INTERNAL/regs/xgs/generate-pmd.pl * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -306,10 +305,8 @@ #define BCMPKT_TXPMD_AUX_SOBMH_HEADER_TYPE 127 /*! Start of frame indicator. */ #define BCMPKT_TXPMD_AUX_SOBMH_START 128 -/*! INCA uplink port. */ -#define BCMPKT_TXPMD_CPU_TX_INCA_UPLINK_PORT 129 /*! TXPMD FIELD ID NUMBER */ -#define BCMPKT_TXPMD_FID_COUNT 130 +#define BCMPKT_TXPMD_FID_COUNT 129 /*! \} */ /*! TXPMD field name strings for debugging. */ @@ -443,7 +440,6 @@ {"AUX_SOBMH::CELL_ERROR", BCMPKT_TXPMD_AUX_SOBMH_CELL_ERROR},\ {"AUX_SOBMH::HEADER_TYPE", BCMPKT_TXPMD_AUX_SOBMH_HEADER_TYPE},\ {"AUX_SOBMH::START", BCMPKT_TXPMD_AUX_SOBMH_START},\ - {"CPU_TX::INCA_UPLINK_PORT", BCMPKT_TXPMD_CPU_TX_INCA_UPLINK_PORT},\ {"fid count", BCMPKT_TXPMD_FID_COUNT} /*! @@ -567,12 +563,20 @@ /*! \{ */ /*! Egress Port */ #define BCMPKT_TXPMD_CPU_TX_DESTINATION_T_EGRESS_PORT 0 +/*! Destination is Invalid */ +#define BCMPKT_TXPMD_CPU_TX_DESTINATION_T_NULL 0 +/*! Egress Port */ +#define BCMPKT_TXPMD_CPU_TX_DESTINATION_T_DEST_PORT 1 /*! Next Hop Index */ #define BCMPKT_TXPMD_CPU_TX_DESTINATION_T_NHI 1 /*! ECMP Group */ #define BCMPKT_TXPMD_CPU_TX_DESTINATION_T_ECMP 2 +/*! Trunk ID */ +#define BCMPKT_TXPMD_CPU_TX_DESTINATION_T_TGID 2 /*! ECMP member id */ #define BCMPKT_TXPMD_CPU_TX_DESTINATION_T_ECMP_MEMBER 3 +/*! Next Hop Index */ +#define BCMPKT_TXPMD_CPU_TX_DESTINATION_T_NEXT_HOP 3 /*! IP Multicast Group */ #define BCMPKT_TXPMD_CPU_TX_DESTINATION_T_IPMC 4 /*! L2MC group */ @@ -583,14 +587,6 @@ #define BCMPKT_TXPMD_CPU_TX_DESTINATION_T_L2_PBM 7 /*! LAG ID */ #define BCMPKT_TXPMD_CPU_TX_DESTINATION_T_LAG_ID 8 -/*! Destination is Invalid */ -#define BCMPKT_TXPMD_CPU_TX_DESTINATION_T_NULL 9 -/*! Egress Port */ -#define BCMPKT_TXPMD_CPU_TX_DESTINATION_T_DEST_PORT 10 -/*! Trunk ID */ -#define BCMPKT_TXPMD_CPU_TX_DESTINATION_T_TGID 11 -/*! Next Hop Index */ -#define BCMPKT_TXPMD_CPU_TX_DESTINATION_T_NEXT_HOP 12 /*! Forward and derive destination normally */ #define BCMPKT_TXPMD_CPU_TX_DESTINATION_T_FORWARD 15 /*! Destination is Invalid */ @@ -600,18 +596,18 @@ /*! BCMPKT_TXPMD_CPU_TX_DESTINATION_TYPE encoding name strings for debugging. */ #define BCMPKT_TXPMD_CPU_TX_DESTINATION_TYPE_NAME_MAP_INIT \ {"EGRESS_PORT", BCMPKT_TXPMD_CPU_TX_DESTINATION_T_EGRESS_PORT},\ + {"NULL", BCMPKT_TXPMD_CPU_TX_DESTINATION_T_NULL},\ + {"DEST_PORT", BCMPKT_TXPMD_CPU_TX_DESTINATION_T_DEST_PORT},\ {"NHI", BCMPKT_TXPMD_CPU_TX_DESTINATION_T_NHI},\ {"ECMP", BCMPKT_TXPMD_CPU_TX_DESTINATION_T_ECMP},\ + {"TGID", BCMPKT_TXPMD_CPU_TX_DESTINATION_T_TGID},\ {"ECMP_MEMBER", BCMPKT_TXPMD_CPU_TX_DESTINATION_T_ECMP_MEMBER},\ + {"NEXT_HOP", BCMPKT_TXPMD_CPU_TX_DESTINATION_T_NEXT_HOP},\ {"IPMC", BCMPKT_TXPMD_CPU_TX_DESTINATION_T_IPMC},\ {"L2MC", BCMPKT_TXPMD_CPU_TX_DESTINATION_T_L2MC},\ {"VLAN_FLOOD", BCMPKT_TXPMD_CPU_TX_DESTINATION_T_VLAN_FLOOD},\ {"L2_PBM", BCMPKT_TXPMD_CPU_TX_DESTINATION_T_L2_PBM},\ {"LAG_ID", BCMPKT_TXPMD_CPU_TX_DESTINATION_T_LAG_ID},\ - {"NULL", BCMPKT_TXPMD_CPU_TX_DESTINATION_T_NULL},\ - {"DEST_PORT", BCMPKT_TXPMD_CPU_TX_DESTINATION_T_DEST_PORT},\ - {"TGID", BCMPKT_TXPMD_CPU_TX_DESTINATION_T_TGID},\ - {"NEXT_HOP", BCMPKT_TXPMD_CPU_TX_DESTINATION_T_NEXT_HOP},\ {"RESERVED_COUNTER", 13},\ {"RESERVED_COUNTER", 14},\ {"FORWARD", BCMPKT_TXPMD_CPU_TX_DESTINATION_T_FORWARD},\ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd_field.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd_field.h similarity index 96% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd_field.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd_field.h index 680e3826c7a..068875610ca 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd_field.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd_field.h @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd_internal.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd_internal.h similarity index 97% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd_internal.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd_internal.h index e3cebee3964..13c5710671e 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd_internal.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/bcmpkt_txpmd_internal.h @@ -5,8 +5,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_util.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/bcmpkt_util.h similarity index 97% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_util.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/bcmpkt_util.h index 867622a8cff..a9ad7bab3e4 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/bcmpkt_util.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/bcmpkt_util.h @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56080_a0/bcm56080_a0_pmd_field.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/chip/bcm56080_a0/bcm56080_a0_pmd_field.h similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56080_a0/bcm56080_a0_pmd_field.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/chip/bcm56080_a0/bcm56080_a0_pmd_field.h index 72e62356eef..2f83a4c9ba5 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56080_a0/bcm56080_a0_pmd_field.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/chip/bcm56080_a0/bcm56080_a0_pmd_field.h @@ -5,8 +5,7 @@ * Edits to this file will be lost when it is regenerated. * Tool: INTERNAL/regs/xgs/generate-pmd.pl * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pmd_field.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pmd_field.h similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pmd_field.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pmd_field.h index 4ac180b78bb..fd5116f6eb9 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pmd_field.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/chip/bcm56690_a0/bcm56690_a0_pmd_field.h @@ -5,8 +5,7 @@ * Edits to this file will be lost when it is regenerated. * Tool: INTERNAL/regs/xgs/generate-pmd.pl * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56690_a0/bcmpkt_bcm56690_a0_rxpmd.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/chip/bcm56690_a0/bcmpkt_bcm56690_a0_rxpmd.h similarity index 97% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56690_a0/bcmpkt_bcm56690_a0_rxpmd.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/chip/bcm56690_a0/bcmpkt_bcm56690_a0_rxpmd.h index ad8b96b13a0..ee023698311 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56690_a0/bcmpkt_bcm56690_a0_rxpmd.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/chip/bcm56690_a0/bcmpkt_bcm56690_a0_rxpmd.h @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pmd_field.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pmd_field.h similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pmd_field.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pmd_field.h index 700c66bd51b..2250f099ecf 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pmd_field.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/chip/bcm56780_a0/bcm56780_a0_pmd_field.h @@ -5,8 +5,7 @@ * Edits to this file will be lost when it is regenerated. * Tool: INTERNAL/regs/xgs/generate-pmd.pl * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56780_a0/bcmpkt_bcm56780_a0_rxpmd.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/chip/bcm56780_a0/bcmpkt_bcm56780_a0_rxpmd.h similarity index 97% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56780_a0/bcmpkt_bcm56780_a0_rxpmd.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/chip/bcm56780_a0/bcmpkt_bcm56780_a0_rxpmd.h index 7f75811edad..6793ea72cae 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56780_a0/bcmpkt_bcm56780_a0_rxpmd.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/chip/bcm56780_a0/bcmpkt_bcm56780_a0_rxpmd.h @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pmd_field.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pmd_field.h similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pmd_field.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pmd_field.h index bcfe4f33451..1f963fb4f4a 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pmd_field.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/chip/bcm56880_a0/bcm56880_a0_pmd_field.h @@ -5,8 +5,7 @@ * Edits to this file will be lost when it is regenerated. * Tool: INTERNAL/regs/xgs/generate-pmd.pl * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56880_a0/bcmpkt_bcm56880_a0_rxpmd.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/chip/bcm56880_a0/bcmpkt_bcm56880_a0_rxpmd.h similarity index 97% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56880_a0/bcmpkt_bcm56880_a0_rxpmd.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/chip/bcm56880_a0/bcmpkt_bcm56880_a0_rxpmd.h index c40a1dc506f..84df9dff6a9 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56880_a0/bcmpkt_bcm56880_a0_rxpmd.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/chip/bcm56880_a0/bcmpkt_bcm56880_a0_rxpmd.h @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pmd_field.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pmd_field.h similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pmd_field.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pmd_field.h index bf0a087481b..20e99923550 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pmd_field.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/chip/bcm56890_a0/bcm56890_a0_pmd_field.h @@ -5,8 +5,7 @@ * Edits to this file will be lost when it is regenerated. * Tool: INTERNAL/regs/xgs/generate-pmd.pl * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56890_a0/bcmpkt_bcm56890_a0_rxpmd.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/chip/bcm56890_a0/bcmpkt_bcm56890_a0_rxpmd.h similarity index 97% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56890_a0/bcmpkt_bcm56890_a0_rxpmd.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/chip/bcm56890_a0/bcmpkt_bcm56890_a0_rxpmd.h index 077f03ebbfd..c98ac201692 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56890_a0/bcmpkt_bcm56890_a0_rxpmd.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/chip/bcm56890_a0/bcmpkt_bcm56890_a0_rxpmd.h @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pmd_field.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pmd_field.h similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pmd_field.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pmd_field.h index 59f122cb59f..06d48e85b6b 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pmd_field.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/chip/bcm56990_a0/bcm56990_a0_pmd_field.h @@ -5,8 +5,7 @@ * Edits to this file will be lost when it is regenerated. * Tool: INTERNAL/regs/xgs/generate-pmd.pl * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pmd_field.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pmd_field.h similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pmd_field.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pmd_field.h index 4acbfbfd542..b58f6039d5e 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pmd_field.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/chip/bcm56990_b0/bcm56990_b0_pmd_field.h @@ -5,8 +5,7 @@ * Edits to this file will be lost when it is regenerated. * Tool: INTERNAL/regs/xgs/generate-pmd.pl * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pmd_field.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pmd_field.h similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pmd_field.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pmd_field.h index 12a5fc09813..d9a8cafcc3a 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pmd_field.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/chip/bcm56996_a0/bcm56996_a0_pmd_field.h @@ -5,8 +5,7 @@ * Edits to this file will be lost when it is regenerated. * Tool: INTERNAL/regs/xgs/generate-pmd.pl * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pmd_field.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pmd_field.h similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pmd_field.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pmd_field.h index aaef4ce98f9..e797b92a6c2 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pmd_field.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/chip/bcm56996_b0/bcm56996_b0_pmd_field.h @@ -5,8 +5,7 @@ * Edits to this file will be lost when it is regenerated. * Tool: INTERNAL/regs/xgs/generate-pmd.pl * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56998_a0/bcm56998_a0_pmd_field.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/chip/bcm56998_a0/bcm56998_a0_pmd_field.h similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56998_a0/bcm56998_a0_pmd_field.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/chip/bcm56998_a0/bcm56998_a0_pmd_field.h index ec1318921f5..e3043c93fc7 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56998_a0/bcm56998_a0_pmd_field.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/chip/bcm56998_a0/bcm56998_a0_pmd_field.h @@ -5,8 +5,7 @@ * Edits to this file will be lost when it is regenerated. * Tool: INTERNAL/regs/xgs/generate-pmd.pl * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pmd_field.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pmd_field.h similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pmd_field.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pmd_field.h index ea476866359..a1bbf33abe3 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pmd_field.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/chip/bcm56999_a0/bcm56999_a0_pmd_field.h @@ -5,8 +5,7 @@ * Edits to this file will be lost when it is regenerated. * Tool: INTERNAL/regs/xgs/generate-pmd.pl * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm78800_a0/bcm78800_a0_pmd_field.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/chip/bcm78800_a0/bcm78800_a0_pmd_field.h similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm78800_a0/bcm78800_a0_pmd_field.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/chip/bcm78800_a0/bcm78800_a0_pmd_field.h index 349c6999791..832558e88ee 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm78800_a0/bcm78800_a0_pmd_field.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/chip/bcm78800_a0/bcm78800_a0_pmd_field.h @@ -5,8 +5,7 @@ * Edits to this file will be lost when it is regenerated. * Tool: INTERNAL/regs/xgs/generate-pmd.pl * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm78800_a0/bcmpkt_bcm78800_a0_rxpmd.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/chip/bcm78800_a0/bcmpkt_bcm78800_a0_rxpmd.h similarity index 97% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm78800_a0/bcmpkt_bcm78800_a0_rxpmd.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/chip/bcm78800_a0/bcmpkt_bcm78800_a0_rxpmd.h index cd958361304..39fcad92ea6 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm78800_a0/bcmpkt_bcm78800_a0_rxpmd.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/chip/bcm78800_a0/bcmpkt_bcm78800_a0_rxpmd.h @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pmd_field.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pmd_field.h similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pmd_field.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pmd_field.h index 6355cadc3ba..ee456eb9277 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pmd_field.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/chip/bcm78900_b0/bcm78900_b0_pmd_field.h @@ -5,8 +5,7 @@ * Edits to this file will be lost when it is regenerated. * Tool: INTERNAL/regs/xgs/generate-pmd.pl * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pmd_field.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pmd_field.h similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pmd_field.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pmd_field.h index 5ee1645e974..4ccefae6e9e 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pmd_field.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/chip/bcm78905_a0/bcm78905_a0_pmd_field.h @@ -5,8 +5,7 @@ * Edits to this file will be lost when it is regenerated. * Tool: INTERNAL/regs/xgs/generate-pmd.pl * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm78907_a0/bcm78907_a0_pmd_field.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/chip/bcm78907_a0/bcm78907_a0_pmd_field.h similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm78907_a0/bcm78907_a0_pmd_field.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/chip/bcm78907_a0/bcm78907_a0_pmd_field.h index 37e8830395d..aa98c594749 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm78907_a0/bcm78907_a0_pmd_field.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/chip/bcm78907_a0/bcm78907_a0_pmd_field.h @@ -5,8 +5,7 @@ * Edits to this file will be lost when it is regenerated. * Tool: INTERNAL/regs/xgs/generate-pmd.pl * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_bcmpkt_flexhdr.h similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_bcmpkt_flexhdr.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_bcmpkt_flexhdr.h index 5e7cb85f99c..e0bef1a4dcf 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_bcmpkt_flexhdr.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_bcmpkt_flexhdr.h @@ -5,8 +5,8 @@ * from the NPL output file(s) header.yml. * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -20,6 +20,7 @@ * * A copy of the GNU General Public License version 2 (GPLv2) can * be found in the LICENSES folder. + * All Rights Reserved.$ * * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser * diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_bcmpkt_flexhdr_data.h similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_bcmpkt_flexhdr_data.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_bcmpkt_flexhdr_data.h index d614a3fafae..849390e0ac7 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_bcmpkt_flexhdr_data.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_bcmpkt_flexhdr_data.h @@ -5,8 +5,8 @@ * from the NPL output file(s) header.yml. * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -20,6 +20,7 @@ * * A copy of the GNU General Public License version 2 (GPLv2) can * be found in the LICENSES folder. + * All Rights Reserved.$ * * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser * diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_bcmpkt_rxpmd_flex_data.h similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_bcmpkt_rxpmd_flex_data.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_bcmpkt_rxpmd_flex_data.h index 99c10b5bd04..fe9ec6edd83 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_bcmpkt_rxpmd_flex_data.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_bcmpkt_rxpmd_flex_data.h @@ -5,8 +5,8 @@ * from the NPL output file(s) map.yml. * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -20,6 +20,7 @@ * * A copy of the GNU General Public License version 2 (GPLv2) can * be found in the LICENSES folder. + * All Rights Reserved.$ * * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser * diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_bcmpkt_rxpmd_match_id_defs.h similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_bcmpkt_rxpmd_match_id_defs.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_bcmpkt_rxpmd_match_id_defs.h index 61e7e13a128..308bbd7d7ca 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_bcmpkt_rxpmd_match_id_defs.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_bcmpkt_rxpmd_match_id_defs.h @@ -6,8 +6,8 @@ * for device bcm56690_a0 and variant dna_6_5_32_5_0. * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -21,6 +21,7 @@ * * A copy of the GNU General Public License version 2 (GPLv2) can * be found in the LICENSES folder. + * All Rights Reserved.$ * * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser * diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_32_3_0/bcm56780_a0_cna_6_5_32_3_0_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_32_3_0/bcm56780_a0_cna_6_5_32_3_0_bcmpkt_flexhdr.h new file mode 100644 index 00000000000..cdb6e8f105d --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_32_3_0/bcm56780_a0_cna_6_5_32_3_0_bcmpkt_flexhdr.h @@ -0,0 +1,96 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) header.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_FLEXHDR_H +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_FLEXHDR_H + +#include + +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T 0 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T 1 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T 2 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T 3 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T 4 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T 5 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ETHERTYPE_T 6 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T 7 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T 8 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T 9 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T 10 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T 11 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_L2_T 12 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_ERSPAN_SN_T 13 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_TRANSPORT_T 14 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T 15 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T 16 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T 17 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_SVTAG_T 18 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T 19 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T 20 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T 21 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T 22 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L4_T 23 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T 24 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T 25 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T 26 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_T 27 + +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_FLEXHDR_COUNT 28 + +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_FLEXHDR_NAME_MAP_INIT \ + {"arp_t", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T},\ + {"cpu_composites_0_t", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T},\ + {"cpu_composites_1_t", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T},\ + {"ep_nih_header_t", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T},\ + {"erspan3_fixed_hdr_t", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T},\ + {"erspan3_subhdr_5_t", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T},\ + {"ethertype_t", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ETHERTYPE_T},\ + {"generic_loopback_t", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T},\ + {"icmp_t", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T},\ + {"ipfix_t", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T},\ + {"ipv4_t", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T},\ + {"ipv6_t", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T},\ + {"l2_t", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_L2_T},\ + {"mirror_erspan_sn_t", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_ERSPAN_SN_T},\ + {"mirror_transport_t", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_TRANSPORT_T},\ + {"psamp_mirror_on_drop_0_t", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\ + {"psamp_mirror_on_drop_3_t", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T},\ + {"rarp_t", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T},\ + {"svtag_t", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_SVTAG_T},\ + {"tcp_first_4bytes_t", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T},\ + {"tcp_last_16bytes_t", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T},\ + {"udp_t", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T},\ + {"unknown_l3_t", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T},\ + {"unknown_l4_t", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L4_T},\ + {"unknown_l5_t", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T},\ + {"vlan_t", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T},\ + {"vxlan_t", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T},\ + {"RXPMD_FLEX_T", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_T},\ + {"flexhdr count", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_FLEXHDR_COUNT} + +#endif /* BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_FLEXHDR_H */ diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_32_3_0/bcm56780_a0_cna_6_5_32_3_0_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_32_3_0/bcm56780_a0_cna_6_5_32_3_0_bcmpkt_flexhdr_data.h new file mode 100644 index 00000000000..4a31e87fdf5 --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_32_3_0/bcm56780_a0_cna_6_5_32_3_0_bcmpkt_flexhdr_data.h @@ -0,0 +1,586 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) header.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_FLEXHDR_DATA_H +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_FLEXHDR_DATA_H + +/*! + * \name ARP_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_HARDWARE_LEN 0 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_HARDWARE_TYPE 1 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_OPERATION 2 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_PROT_ADDR_LEN 3 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_PROTOCOL_TYPE 4 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_SENDER_HA 5 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_SENDER_IP 6 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_TARGET_HA 7 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_TARGET_IP 8 + +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_FID_COUNT 9 + +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \ + {"HARDWARE_LEN", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_HARDWARE_LEN},\ + {"HARDWARE_TYPE", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_HARDWARE_TYPE},\ + {"OPERATION", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_OPERATION},\ + {"PROT_ADDR_LEN", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_PROT_ADDR_LEN},\ + {"PROTOCOL_TYPE", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_PROTOCOL_TYPE},\ + {"SENDER_HA", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_SENDER_HA},\ + {"SENDER_IP", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_SENDER_IP},\ + {"TARGET_HA", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_TARGET_HA},\ + {"TARGET_IP", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_TARGET_IP},\ + {"arp_t fid count", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_FID_COUNT} + +/*! + * \name CPU_COMPOSITES_0_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6 + +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT 7 + +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \ + {"DMA_CONT0", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\ + {"DMA_CONT1", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\ + {"DMA_CONT2", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\ + {"DMA_CONT3", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\ + {"DMA_CONT4", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\ + {"DMA_CONT5", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\ + {"DMA_CONT6", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\ + {"cpu_composites_0_t fid count", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT} + +/*! + * \name CPU_COMPOSITES_1_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7 8 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8 9 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9 10 + +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT 11 + +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \ + {"DMA_CONT10", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\ + {"DMA_CONT11", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\ + {"DMA_CONT12", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\ + {"DMA_CONT13", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\ + {"DMA_CONT14", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\ + {"DMA_CONT15", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\ + {"DMA_CONT16", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\ + {"DMA_CONT17", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\ + {"DMA_CONT7", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\ + {"DMA_CONT8", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\ + {"DMA_CONT9", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\ + {"cpu_composites_1_t fid count", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT} + +/*! + * \name EP_NIH_HEADER_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE 0 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE 1 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A 2 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B 3 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C 4 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A 5 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B 6 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C 7 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX 8 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0 9 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_START 10 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP 11 + +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT 12 + +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT \ + {"HEADER_SUBTYPE", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE},\ + {"HEADER_TYPE", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE},\ + {"OPAQUE_CTRL_A", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A},\ + {"OPAQUE_CTRL_B", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B},\ + {"OPAQUE_CTRL_C", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C},\ + {"OPAQUE_OBJECT_A", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A},\ + {"OPAQUE_OBJECT_B", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B},\ + {"OPAQUE_OBJECT_C", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C},\ + {"RECIRC_PROFILE_INDEX", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX},\ + {"RESERVED_0", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0},\ + {"START", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_START},\ + {"TIMESTAMP", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP},\ + {"ep_nih_header_t fid count", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT} + +/*! + * \name ERSPAN3_FIXED_HDR_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO 0 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS 1 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID 2 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID 4 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T 5 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP 6 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER 7 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN 8 + +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT 9 + +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \ + {"BSO", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\ + {"COS", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\ + {"GBP_SID", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\ + {"P_FT_HWID_D_GRA_O", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\ + {"SESSION_ID", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\ + {"T", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\ + {"TIMESTAMP", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\ + {"VER", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\ + {"VLAN", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\ + {"erspan3_fixed_hdr_t fid count", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT} + +/*! + * \name ERSPAN3_SUBHDR_5_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID 1 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID 2 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP 3 + +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT 4 + +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \ + {"PLATFORM_ID", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\ + {"PORT_ID", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\ + {"SWITCH_ID", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\ + {"TIMESTAMP", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\ + {"erspan3_subhdr_5_t fid count", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT} + +/*! + * \name ETHERTYPE_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ETHERTYPE_T_TYPE 0 + +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT 1 + +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \ + {"TYPE", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ETHERTYPE_T_TYPE},\ + {"ethertype_t fid count", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT} + +/*! + * \name GENERIC_LOOPBACK_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ 0 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE 1 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ 2 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS 3 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE 4 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY 5 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL 6 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ 7 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0 8 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1 9 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ 10 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1 11 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2 12 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 13 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE 14 + +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT 15 + +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \ + {"DESTINATION_OBJ", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\ + {"DESTINATION_TYPE", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\ + {"ENTROPY_OBJ", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\ + {"FLAGS", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\ + {"HEADER_TYPE", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\ + {"INPUT_PRIORITY", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\ + {"INTERFACE_CTRL", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\ + {"INTERFACE_OBJ", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\ + {"PROCESSING_CTRL_0", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\ + {"PROCESSING_CTRL_1", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\ + {"QOS_OBJ", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\ + {"RESERVED_1", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\ + {"RESERVED_2", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2},\ + {"SOURCE_SYSTEM_PORT", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\ + {"START_BYTE", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\ + {"generic_loopback_t fid count", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT} + +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP 0 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF 1 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED 2 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP 3 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP 4 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP 5 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP 6 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP 7 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1 8 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10 + +/*! + * \name ICMP_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T_CHECKSUM 0 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T_CODE 1 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T_ICMP_TYPE 2 + +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T_FID_COUNT 3 + +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T_CHECKSUM},\ + {"CODE", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T_CODE},\ + {"ICMP_TYPE", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T_ICMP_TYPE},\ + {"icmp_t fid count", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T_FID_COUNT} + +/*! + * \name IPFIX_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_EXPORT_TIME 0 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_LENGTH 1 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_SEQUENCE_NUM 3 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_VERSION 4 + +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_FID_COUNT 5 + +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \ + {"EXPORT_TIME", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_EXPORT_TIME},\ + {"LENGTH", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_LENGTH},\ + {"OBS_DOMAIN_ID", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\ + {"SEQUENCE_NUM", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_SEQUENCE_NUM},\ + {"VERSION", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_VERSION},\ + {"ipfix_t fid count", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_FID_COUNT} + +/*! + * \name IPV4_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_DA 0 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_HDR_CHECKSUM 2 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_ID 3 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_OPTION 4 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_PROTOCOL 5 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_SA 6 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_TOS 7 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_TOTAL_LENGTH 8 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_TTL 9 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_VERSION_HDR_LEN 10 + +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_FID_COUNT 11 + +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \ + {"DA", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_DA},\ + {"FLAGS_FRAG_OFFSET", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\ + {"HDR_CHECKSUM", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_HDR_CHECKSUM},\ + {"ID", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_ID},\ + {"OPTION", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_OPTION},\ + {"PROTOCOL", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_PROTOCOL},\ + {"SA", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_SA},\ + {"TOS", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_TOS},\ + {"TOTAL_LENGTH", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_TOTAL_LENGTH},\ + {"TTL", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_TTL},\ + {"VERSION_HDR_LEN", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_VERSION_HDR_LEN},\ + {"ipv4_t fid count", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_FID_COUNT} + +/*! + * \name IPV6_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_DA 0 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_FLOW_LABEL 1 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_HOP_LIMIT 2 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_NEXT_HEADER 3 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_SA 5 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_TRAFFIC_CLASS 6 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_VERSION 7 + +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_FID_COUNT 8 + +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \ + {"DA", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_DA},\ + {"FLOW_LABEL", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_FLOW_LABEL},\ + {"HOP_LIMIT", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_HOP_LIMIT},\ + {"NEXT_HEADER", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_NEXT_HEADER},\ + {"PAYLOAD_LENGTH", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\ + {"SA", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_SA},\ + {"TRAFFIC_CLASS", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_TRAFFIC_CLASS},\ + {"VERSION", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_VERSION},\ + {"ipv6_t fid count", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_FID_COUNT} + +/*! + * \name L2_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_L2_T_MACDA 0 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_L2_T_MACSA 1 + +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_L2_T_FID_COUNT 2 + +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \ + {"MACDA", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_L2_T_MACDA},\ + {"MACSA", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_L2_T_MACSA},\ + {"l2_t fid count", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_L2_T_FID_COUNT} + +/*! + * \name MIRROR_ERSPAN_SN_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0 + +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT 1 + +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \ + {"SEQ_NUM", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\ + {"mirror_erspan_sn_t fid count", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT} + +/*! + * \name MIRROR_TRANSPORT_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_TRANSPORT_T_DATA 0 + +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT 1 + +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_TRANSPORT_T_DATA},\ + {"mirror_transport_t fid count", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT} + +/*! + * \name PSAMP_MIRROR_ON_DROP_0_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT 1 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH 2 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS 3 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S 4 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID 5 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID 6 + +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT 7 + +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \ + {"EGRESS_MOD_PORT", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\ + {"INGRESS_PORT", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\ + {"LENGTH", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\ + {"OBS_TIME_NS", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\ + {"OBS_TIME_S", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\ + {"SWITCH_ID", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\ + {"TEMPLATE_ID", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\ + {"psamp_mirror_on_drop_0_t fid count", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT} + +/*! + * \name PSAMP_MIRROR_ON_DROP_3_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON 0 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0 1 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH 2 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE 3 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX 4 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA 5 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR 6 + +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT 7 + +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT \ + {"DROP_REASON", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON},\ + {"RESERVED_0", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0},\ + {"SAMPLED_LENGTH", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH},\ + {"SMOD_STATE", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE},\ + {"UC_COS__COLOR__PROB_IDX", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX},\ + {"USER_META_DATA", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA},\ + {"VAR_LEN_INDICATOR", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR},\ + {"psamp_mirror_on_drop_3_t fid count", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT} + +/*! + * \name RARP_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_HARDWARE_LEN 0 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_HARDWARE_TYPE 1 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_OPERATION 2 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_PROT_ADDR_LEN 3 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_PROTOCOL_TYPE 4 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_SENDER_HA 5 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_SENDER_IP 6 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_TARGET_HA 7 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_TARGET_IP 8 + +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_FID_COUNT 9 + +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \ + {"HARDWARE_LEN", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_HARDWARE_LEN},\ + {"HARDWARE_TYPE", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_HARDWARE_TYPE},\ + {"OPERATION", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_OPERATION},\ + {"PROT_ADDR_LEN", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_PROT_ADDR_LEN},\ + {"PROTOCOL_TYPE", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_PROTOCOL_TYPE},\ + {"SENDER_HA", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_SENDER_HA},\ + {"SENDER_IP", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_SENDER_IP},\ + {"TARGET_HA", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_TARGET_HA},\ + {"TARGET_IP", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_TARGET_IP},\ + {"rarp_t fid count", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_FID_COUNT} + +/*! + * \name SVTAG_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_SVTAG_T_DATA_LWR 0 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_SVTAG_T_DATA_UPR 1 + +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_SVTAG_T_FID_COUNT 2 + +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_SVTAG_T_FIELD_NAME_MAP_INIT \ + {"DATA_LWR", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_SVTAG_T_DATA_LWR},\ + {"DATA_UPR", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_SVTAG_T_DATA_UPR},\ + {"svtag_t fid count", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_SVTAG_T_FID_COUNT} + +/*! + * \name TCP_FIRST_4BYTES_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1 + +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT 2 + +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \ + {"DST_PORT", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\ + {"SRC_PORT", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\ + {"tcp_first_4bytes_t fid count", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT} + +/*! + * \name TCP_LAST_16BYTES_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM 0 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM 1 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM 3 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR 4 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE 5 + +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT 6 + +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \ + {"ACK_NUM", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\ + {"CHECKSUM", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\ + {"HDR_LEN_AND_FLAGS", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\ + {"SEQ_NUM", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\ + {"URGENT_PTR", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\ + {"WIN_SIZE", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\ + {"tcp_last_16bytes_t fid count", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT} + +/*! + * \name UDP_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_CHECKSUM 0 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_DST_PORT 1 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_SRC_PORT 2 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_UDP_LENGTH 3 + +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_FID_COUNT 4 + +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_CHECKSUM},\ + {"DST_PORT", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_DST_PORT},\ + {"SRC_PORT", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_SRC_PORT},\ + {"UDP_LENGTH", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_UDP_LENGTH},\ + {"udp_t fid count", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_FID_COUNT} + +/*! + * \name UNKNOWN_L3_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD 1 + +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT 2 + +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \ + {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\ + {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\ + {"unknown_l3_t fid count", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT} + +/*! + * \name UNKNOWN_L4_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0 + +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT 1 + +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \ + {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\ + {"unknown_l4_t fid count", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT} + +/*! + * \name UNKNOWN_L5_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2 + +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT 3 + +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \ + {"L5_BYTES_0_1", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\ + {"L5_BYTES_2_3", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\ + {"L5_BYTES_4_7", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\ + {"unknown_l5_t fid count", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT} + +/*! + * \name VLAN_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_CFI 0 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_PCP 1 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_TPID 2 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_VID 3 + +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_FID_COUNT 4 + +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \ + {"CFI", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_CFI},\ + {"PCP", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_PCP},\ + {"TPID", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_TPID},\ + {"VID", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_VID},\ + {"vlan_t fid count", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_FID_COUNT} + +/*! + * \name VXLAN_T field IDs. + */ +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T_RESERVED2 1 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T_VN_ID 2 + +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T_FID_COUNT 3 + +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \ + {"FLAGS_RESERVED_1", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\ + {"RESERVED2", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T_RESERVED2},\ + {"VN_ID", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T_VN_ID},\ + {"vxlan_t fid count", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T_FID_COUNT} + + +#endif /* BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_FLEXHDR_DATA_H */ diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_32_3_0/bcm56780_a0_cna_6_5_32_3_0_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_32_3_0/bcm56780_a0_cna_6_5_32_3_0_bcmpkt_rxpmd_flex_data.h new file mode 100644 index 00000000000..376e47ac673 --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_32_3_0/bcm56780_a0_cna_6_5_32_3_0_bcmpkt_rxpmd_flex_data.h @@ -0,0 +1,128 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) map.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_DATA_H +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_DATA_H + +/*! + * \name RX flex metadata field IDs. + */ +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0 0 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_DVP_15_0 1 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0 2 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0 3 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0 4 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_DROP_CODE_15_0 5 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0 6 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0 7 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16 8 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_ERSPAN3_GBP_SID_15_0 9 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0 10 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16 11 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32 12 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0 13 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_IFP_TO_EP_MACSEC_INFO_OR_IFP_OPAQUE_OBJ_15_0 14 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0 15 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0 16 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16 17 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0 18 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 19 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0 20 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0 21 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0 22 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0 23 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0 24 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0 25 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_14_0 26 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_14_0 27 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0 28 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0 29 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_SVP_15_0 30 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0 31 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0 32 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0 33 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0 34 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_TAG_ACTION_CTRL_1_0 35 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0 36 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_VFI_15_0 37 + +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_FID_COUNT 38 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_COUNT 22 + +/*! + * \name Packet Flex Reason Types. + */ +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS 0 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT 1 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP 2 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER 3 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT 4 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP 5 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS 6 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD 7 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE 8 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP 9 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS 10 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR 11 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR 12 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL 13 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST 14 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED 15 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU 16 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED 17 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT 18 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED 19 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP 20 +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_VFP 21 + +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \ + {"CML_FLAGS", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\ + {"EM_FT", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT},\ + {"IFP", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP},\ + {"IFP_METER", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\ + {"IVXLT", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\ + {"L2_DST_LOOKUP", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\ + {"L2_DST_LOOKUP_MISS", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\ + {"L2_SRC_DISCARD", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD},\ + {"L2_SRC_STATIC_MOVE", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\ + {"L3_DST_LOOKUP", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\ + {"L3_DST_LOOKUP_MISS", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\ + {"L3_HDR_ERROR", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\ + {"L3_TTL_ERROR", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\ + {"LEARN_CACHE_FULL", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\ + {"MACSA_MULTICAST", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST},\ + {"MEMBERSHIP_CHECK_FAILED", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED},\ + {"NO_COPY_TO_CPU", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\ + {"PKT_INTEGRITY_CHECK_FAILED", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\ + {"PROTOCOL_PKT", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\ + {"SPANNING_TREE_CHECK_FAILED", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED},\ + {"TRACE_DOP", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\ + {"VFP", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_VFP},\ + {"flex reason count", BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_COUNT} + +#endif /* BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_DATA_H */ diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_32_3_0/bcm56780_a0_cna_6_5_32_3_0_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_32_3_0/bcm56780_a0_cna_6_5_32_3_0_bcmpkt_rxpmd_match_id_defs.h new file mode 100644 index 00000000000..8d2be75ead8 --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_32_3_0/bcm56780_a0_cna_6_5_32_3_0_bcmpkt_rxpmd_match_id_defs.h @@ -0,0 +1,219 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) bcm56780_a0_cna_6_5_32_3_0_sf_match_id_info.yml + * for device bcm56780_a0 and variant cna_6_5_32_3_0. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H + +#include + +/*! + * \brief Get the Match ID DataBase information. + * + * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information. +*/ +extern bcmpkt_rxpmd_match_id_db_info_t * + bcm56780_a0_cna_6_5_32_3_0_rxpmd_match_id_db_info_get(void); + +/*! + * \brief Get the Match ID Mapping information. + * + * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information. +*/ +extern bcmpkt_rxpmd_match_id_map_info_t * + bcm56780_a0_cna_6_5_32_3_0_rxpmd_match_id_map_info_get(void); + +/*! + \name RXPMD Match IDs +*/ +#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG 0 +#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 1 +#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE 2 +#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG 3 +#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG 4 +#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP 5 +#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE 6 +#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP 7 +#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 8 +#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 9 +#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE 10 +#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP 11 +#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES 12 +#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES 13 +#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP 14 +#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 15 +#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 16 +#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 17 +#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN 18 +#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH 19 +#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK 20 +#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE 21 +#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG 22 +#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 23 +#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE 24 +#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG 25 +#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG 26 +#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP 27 +#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE 28 +#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP 29 +#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 30 +#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 31 +#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE 32 +#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP 33 +#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES 34 +#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES 35 +#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP 36 +#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 37 +#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 38 +#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 39 +#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN 40 +#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG 41 +#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 42 +#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE 43 +#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG 44 +#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP 45 +#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE 46 +#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP 47 +#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 48 +#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 49 +#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE 50 +#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP 51 +#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES 52 +#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES 53 +#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP 54 +#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 55 +#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 56 +#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 57 +#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG 58 +#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 59 +#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE 60 +#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG 61 +#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG 62 +#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP 63 +#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE 64 +#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP 65 +#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 66 +#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 67 +#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE 68 +#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP 69 +#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES 70 +#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES 71 +#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP 72 +#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 73 +#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 74 +#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 75 +#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN 76 +#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH 77 +#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK 78 +#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE 79 +#define BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_COUNT 80 + +#define BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \ + {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \ + {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \ + {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_SVTAG", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \ + {"EGRESS_PKT_SYS_HDR_EP_NIH", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH}, \ + {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \ + {"EGRESS_PKT_SYS_HDR_NONE", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_SVTAG", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \ + {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \ + {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \ + {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \ + {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \ + {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \ + {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_SVTAG", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \ + {"INGRESS_PKT_SYS_HDR_EP_NIH", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH}, \ + {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \ + {"INGRESS_PKT_SYS_HDR_NONE", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \ + {"rxpmd_match_id_count", BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_COUNT} + +#endif /*! BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_bcmpkt_flexhdr.h similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_bcmpkt_flexhdr.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_bcmpkt_flexhdr.h index 91f0e9fe232..5752e0528f8 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_bcmpkt_flexhdr.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_bcmpkt_flexhdr.h @@ -5,8 +5,8 @@ * from the NPL output file(s) header.yml. * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -20,6 +20,7 @@ * * A copy of the GNU General Public License version 2 (GPLv2) can * be found in the LICENSES folder. + * All Rights Reserved.$ * * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser * diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_bcmpkt_flexhdr_data.h similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_bcmpkt_flexhdr_data.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_bcmpkt_flexhdr_data.h index 08a71143ab4..cc84e22ed59 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_bcmpkt_flexhdr_data.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_bcmpkt_flexhdr_data.h @@ -5,8 +5,8 @@ * from the NPL output file(s) header.yml. * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -20,6 +20,7 @@ * * A copy of the GNU General Public License version 2 (GPLv2) can * be found in the LICENSES folder. + * All Rights Reserved.$ * * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser * diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_bcmpkt_rxpmd_flex_data.h similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_bcmpkt_rxpmd_flex_data.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_bcmpkt_rxpmd_flex_data.h index de18b3de7fe..f88da896c06 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_bcmpkt_rxpmd_flex_data.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_bcmpkt_rxpmd_flex_data.h @@ -5,8 +5,8 @@ * from the NPL output file(s) map.yml. * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -20,6 +20,7 @@ * * A copy of the GNU General Public License version 2 (GPLv2) can * be found in the LICENSES folder. + * All Rights Reserved.$ * * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser * diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_bcmpkt_rxpmd_match_id_defs.h similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_bcmpkt_rxpmd_match_id_defs.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_bcmpkt_rxpmd_match_id_defs.h index e5fa171497b..be31c26a21f 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_bcmpkt_rxpmd_match_id_defs.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_bcmpkt_rxpmd_match_id_defs.h @@ -6,8 +6,8 @@ * for device bcm56780_a0 and variant dna_6_5_31_7_0. * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -21,6 +21,7 @@ * * A copy of the GNU General Public License version 2 (GPLv2) can * be found in the LICENSES folder. + * All Rights Reserved.$ * * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser * diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_32_2_0/bcm56780_a0_hna_6_5_32_2_0_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_32_2_0/bcm56780_a0_hna_6_5_32_2_0_bcmpkt_flexhdr.h new file mode 100644 index 00000000000..8d1b304167c --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_32_2_0/bcm56780_a0_hna_6_5_32_2_0_bcmpkt_flexhdr.h @@ -0,0 +1,174 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) header.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_FLEXHDR_H +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_FLEXHDR_H + +#include + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T 0 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_AUTHEN_T 1 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T 2 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CNTAG_T 3 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T 4 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T 5 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_DEST_OPTION_T 6 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_EP_NIH_HEADER_T 7 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T 8 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T 9 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ESP_T 10 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ETAG_T 11 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ETHERTYPE_T 12 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_FRAG_T 13 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T 14 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GPE_T 15 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_CHKSUM_T 16 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_KEY_T 17 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_ROUT_T 18 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_SEQ_T 19 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_T 20 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_HOP_BY_HOP_T 21 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ICMP_T 22 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_A_T 23 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_B_T 24 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_1_T 25 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_2_T 26 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_3_T 27 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_HEADER_T 28 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_MD_BASE_T 29 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_METADATA_T 30 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IGMP_T 31 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPFIX_T 32 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T 33 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T 34 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_L2_T 35 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MIRROR_ERSPAN_SN_T 36 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MIRROR_TRANSPORT_T 37 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_ACH_T 38 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_BV_T 39 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_CW_T 40 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_T 41 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T 42 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PROG_EXT_HDR_T 43 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_0_T 44 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T 45 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T 46 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T 47 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T 48 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ROUTING_T 49 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RSPAN_T 50 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_0_T 51 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T 52 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_2_T 53 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SNAP_LLC_T 54 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SVTAG_T 55 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_TCP_FIRST_4BYTES_T 56 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_TCP_LAST_16BYTES_T 57 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UDP_T 58 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L3_T 59 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L4_T 60 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L5_T 61 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VLAN_T 62 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VNTAG_T 63 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VXLAN_T 64 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T 65 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_T 66 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_FLEXHDR_COUNT 67 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_FLEXHDR_NAME_MAP_INIT \ + {"arp_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T},\ + {"authen_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_AUTHEN_T},\ + {"bfd_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T},\ + {"cntag_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CNTAG_T},\ + {"cpu_composites_0_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T},\ + {"cpu_composites_1_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T},\ + {"dest_option_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_DEST_OPTION_T},\ + {"ep_nih_header_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_EP_NIH_HEADER_T},\ + {"erspan3_fixed_hdr_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T},\ + {"erspan3_subhdr_5_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T},\ + {"esp_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ESP_T},\ + {"etag_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ETAG_T},\ + {"ethertype_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ETHERTYPE_T},\ + {"frag_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_FRAG_T},\ + {"generic_loopback_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T},\ + {"gpe_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GPE_T},\ + {"gre_chksum_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_CHKSUM_T},\ + {"gre_key_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_KEY_T},\ + {"gre_rout_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_ROUT_T},\ + {"gre_seq_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_SEQ_T},\ + {"gre_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_T},\ + {"hop_by_hop_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_HOP_BY_HOP_T},\ + {"icmp_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ICMP_T},\ + {"ifa_flex_md_0_a_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_A_T},\ + {"ifa_flex_md_0_b_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_B_T},\ + {"ifa_flex_md_1_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_1_T},\ + {"ifa_flex_md_2_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_2_T},\ + {"ifa_flex_md_3_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_3_T},\ + {"ifa_header_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_HEADER_T},\ + {"ifa_md_base_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_MD_BASE_T},\ + {"ifa_metadata_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_METADATA_T},\ + {"igmp_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IGMP_T},\ + {"ipfix_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPFIX_T},\ + {"ipv4_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T},\ + {"ipv6_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T},\ + {"l2_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_L2_T},\ + {"mirror_erspan_sn_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MIRROR_ERSPAN_SN_T},\ + {"mirror_transport_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MIRROR_TRANSPORT_T},\ + {"mpls_ach_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_ACH_T},\ + {"mpls_bv_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_BV_T},\ + {"mpls_cw_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_CW_T},\ + {"mpls_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_T},\ + {"p_1588_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T},\ + {"prog_ext_hdr_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PROG_EXT_HDR_T},\ + {"psamp_0_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_0_T},\ + {"psamp_1_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T},\ + {"psamp_mirror_on_drop_0_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\ + {"psamp_mirror_on_drop_3_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T},\ + {"rarp_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T},\ + {"routing_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ROUTING_T},\ + {"rspan_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RSPAN_T},\ + {"sflow_shim_0_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_0_T},\ + {"sflow_shim_1_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T},\ + {"sflow_shim_2_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_2_T},\ + {"snap_llc_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SNAP_LLC_T},\ + {"svtag_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SVTAG_T},\ + {"tcp_first_4bytes_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_TCP_FIRST_4BYTES_T},\ + {"tcp_last_16bytes_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_TCP_LAST_16BYTES_T},\ + {"udp_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UDP_T},\ + {"unknown_l3_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L3_T},\ + {"unknown_l4_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L4_T},\ + {"unknown_l5_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L5_T},\ + {"vlan_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VLAN_T},\ + {"vntag_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VNTAG_T},\ + {"vxlan_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VXLAN_T},\ + {"wesp_t", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T},\ + {"RXPMD_FLEX_T", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_T},\ + {"flexhdr count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_FLEXHDR_COUNT} + +#endif /* BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_FLEXHDR_H */ diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_32_2_0/bcm56780_a0_hna_6_5_32_2_0_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_32_2_0/bcm56780_a0_hna_6_5_32_2_0_bcmpkt_flexhdr_data.h new file mode 100644 index 00000000000..3a0d3c3e4b4 --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_32_2_0/bcm56780_a0_hna_6_5_32_2_0_bcmpkt_flexhdr_data.h @@ -0,0 +1,1258 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) header.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_FLEXHDR_DATA_H +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_FLEXHDR_DATA_H + +/*! + * \name ARP_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_HARDWARE_LEN 0 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_HARDWARE_TYPE 1 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_OPERATION 2 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_PROT_ADDR_LEN 3 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_PROTOCOL_TYPE 4 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_SENDER_HA 5 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_SENDER_IP 6 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_TARGET_HA 7 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_TARGET_IP 8 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_FID_COUNT 9 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \ + {"HARDWARE_LEN", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_HARDWARE_LEN},\ + {"HARDWARE_TYPE", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_HARDWARE_TYPE},\ + {"OPERATION", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_OPERATION},\ + {"PROT_ADDR_LEN", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_PROT_ADDR_LEN},\ + {"PROTOCOL_TYPE", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_PROTOCOL_TYPE},\ + {"SENDER_HA", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_SENDER_HA},\ + {"SENDER_IP", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_SENDER_IP},\ + {"TARGET_HA", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_TARGET_HA},\ + {"TARGET_IP", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_TARGET_IP},\ + {"arp_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_FID_COUNT} + +/*! + * \name AUTHEN_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_AUTHEN_T_DATA 0 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_AUTHEN_T_NEXT_HEADER 1 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN 2 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_AUTHEN_T_RESERVED 3 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_AUTHEN_T_SEQ_NUM 4 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_AUTHEN_T_SPI 5 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_AUTHEN_T_FID_COUNT 6 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_AUTHEN_T_DATA},\ + {"NEXT_HEADER", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_AUTHEN_T_NEXT_HEADER},\ + {"PAYLOAD_LEN", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN},\ + {"RESERVED", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_AUTHEN_T_RESERVED},\ + {"SEQ_NUM", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_AUTHEN_T_SEQ_NUM},\ + {"SPI", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_AUTHEN_T_SPI},\ + {"authen_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_AUTHEN_T_FID_COUNT} + +/*! + * \name BFD_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_AP 0 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_BFD_LENGTH 1 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_CPI 2 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_DEM 3 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_DESMINTXINTV 4 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_DETECTMULT 5 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_DIAG 6 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_FIN 7 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_MINECHORXINTV 8 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_MPT 9 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_MYDISCRIM 10 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_POLL 11 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_REQMINRXINTV 12 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_STA 13 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_URDISCRIM 14 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_VERSION 15 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_FID_COUNT 16 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT \ + {"AP", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_AP},\ + {"BFD_LENGTH", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_BFD_LENGTH},\ + {"CPI", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_CPI},\ + {"DEM", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_DEM},\ + {"DESMINTXINTV", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_DESMINTXINTV},\ + {"DETECTMULT", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_DETECTMULT},\ + {"DIAG", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_DIAG},\ + {"FIN", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_FIN},\ + {"MINECHORXINTV", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_MINECHORXINTV},\ + {"MPT", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_MPT},\ + {"MYDISCRIM", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_MYDISCRIM},\ + {"POLL", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_POLL},\ + {"REQMINRXINTV", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_REQMINRXINTV},\ + {"STA", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_STA},\ + {"URDISCRIM", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_URDISCRIM},\ + {"VERSION", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_VERSION},\ + {"bfd_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_FID_COUNT} + +/*! + * \name CNTAG_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CNTAG_T_RPID 0 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CNTAG_T_TPID 1 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CNTAG_T_FID_COUNT 2 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT \ + {"RPID", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CNTAG_T_RPID},\ + {"TPID", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CNTAG_T_TPID},\ + {"cntag_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CNTAG_T_FID_COUNT} + +/*! + * \name CPU_COMPOSITES_0_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT 7 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \ + {"DMA_CONT0", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\ + {"DMA_CONT1", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\ + {"DMA_CONT2", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\ + {"DMA_CONT3", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\ + {"DMA_CONT4", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\ + {"DMA_CONT5", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\ + {"DMA_CONT6", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\ + {"cpu_composites_0_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT} + +/*! + * \name CPU_COMPOSITES_1_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7 8 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8 9 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9 10 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT 11 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \ + {"DMA_CONT10", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\ + {"DMA_CONT11", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\ + {"DMA_CONT12", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\ + {"DMA_CONT13", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\ + {"DMA_CONT14", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\ + {"DMA_CONT15", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\ + {"DMA_CONT16", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\ + {"DMA_CONT17", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\ + {"DMA_CONT7", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\ + {"DMA_CONT8", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\ + {"DMA_CONT9", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\ + {"cpu_composites_1_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT} + +/*! + * \name DEST_OPTION_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN 0 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER 1 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_DEST_OPTION_T_OPTION 2 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_DEST_OPTION_T_FID_COUNT 3 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER},\ + {"OPTION", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_DEST_OPTION_T_OPTION},\ + {"dest_option_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_DEST_OPTION_T_FID_COUNT} + +/*! + * \name EP_NIH_HEADER_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE 0 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE 1 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A 2 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B 3 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C 4 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A 5 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B 6 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C 7 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX 8 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0 9 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_EP_NIH_HEADER_T_START 10 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP 11 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT 12 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT \ + {"HEADER_SUBTYPE", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE},\ + {"HEADER_TYPE", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE},\ + {"OPAQUE_CTRL_A", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A},\ + {"OPAQUE_CTRL_B", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B},\ + {"OPAQUE_CTRL_C", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C},\ + {"OPAQUE_OBJECT_A", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A},\ + {"OPAQUE_OBJECT_B", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B},\ + {"OPAQUE_OBJECT_C", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C},\ + {"RECIRC_PROFILE_INDEX", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX},\ + {"RESERVED_0", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0},\ + {"START", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_EP_NIH_HEADER_T_START},\ + {"TIMESTAMP", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP},\ + {"ep_nih_header_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT} + +/*! + * \name ERSPAN3_FIXED_HDR_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO 0 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS 1 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID 2 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID 4 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T 5 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP 6 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER 7 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN 8 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT 9 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \ + {"BSO", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\ + {"COS", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\ + {"GBP_SID", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\ + {"P_FT_HWID_D_GRA_O", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\ + {"SESSION_ID", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\ + {"T", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\ + {"TIMESTAMP", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\ + {"VER", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\ + {"VLAN", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\ + {"erspan3_fixed_hdr_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT} + +/*! + * \name ERSPAN3_SUBHDR_5_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID 1 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID 2 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP 3 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT 4 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \ + {"PLATFORM_ID", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\ + {"PORT_ID", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\ + {"SWITCH_ID", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\ + {"TIMESTAMP", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\ + {"erspan3_subhdr_5_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT} + +/*! + * \name ESP_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ESP_T_NEXT_HEADER 0 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ESP_T_PAD 1 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ESP_T_PAD_LEN 2 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ESP_T_SEQ_NUM 3 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ESP_T_SPI 4 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ESP_T_FID_COUNT 5 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT \ + {"NEXT_HEADER", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ESP_T_NEXT_HEADER},\ + {"PAD", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ESP_T_PAD},\ + {"PAD_LEN", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ESP_T_PAD_LEN},\ + {"SEQ_NUM", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ESP_T_SEQ_NUM},\ + {"SPI", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ESP_T_SPI},\ + {"esp_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ESP_T_FID_COUNT} + +/*! + * \name ETAG_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ETAG_T_TAG 0 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ETAG_T_TPID 1 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ETAG_T_FID_COUNT 2 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT \ + {"TAG", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ETAG_T_TAG},\ + {"TPID", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ETAG_T_TPID},\ + {"etag_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ETAG_T_FID_COUNT} + +/*! + * \name ETHERTYPE_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ETHERTYPE_T_TYPE 0 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT 1 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \ + {"TYPE", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ETHERTYPE_T_TYPE},\ + {"ethertype_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT} + +/*! + * \name FRAG_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_FRAG_T_FRAG_INFO 0 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_FRAG_T_ID 1 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_FRAG_T_NEXT_HEADER 2 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_FRAG_T_RESERVED 3 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_FRAG_T_FID_COUNT 4 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT \ + {"FRAG_INFO", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_FRAG_T_FRAG_INFO},\ + {"ID", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_FRAG_T_ID},\ + {"NEXT_HEADER", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_FRAG_T_NEXT_HEADER},\ + {"RESERVED", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_FRAG_T_RESERVED},\ + {"frag_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_FRAG_T_FID_COUNT} + +/*! + * \name GENERIC_LOOPBACK_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ 0 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE 1 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ 2 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS 3 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE 4 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY 5 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL 6 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ 7 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0 8 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1 9 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ 10 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1 11 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 12 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE 13 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_SVP 14 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT 15 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \ + {"DESTINATION_OBJ", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\ + {"DESTINATION_TYPE", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\ + {"ENTROPY_OBJ", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\ + {"FLAGS", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\ + {"HEADER_TYPE", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\ + {"INPUT_PRIORITY", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\ + {"INTERFACE_CTRL", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\ + {"INTERFACE_OBJ", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\ + {"PROCESSING_CTRL_0", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\ + {"PROCESSING_CTRL_1", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\ + {"QOS_OBJ", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\ + {"RESERVED_1", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\ + {"SOURCE_SYSTEM_PORT", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\ + {"START_BYTE", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\ + {"SVP", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_SVP},\ + {"generic_loopback_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT} + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP 0 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF 1 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED 2 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP 3 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP 4 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP 5 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP 6 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP 7 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1 8 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__TUNNEL 0 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__GENERIC 1 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__NOOP 0 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__VFI 1 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__L3_IIF 2 + +/*! + * \name GPE_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GPE_T_FLAGS 0 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GPE_T_NEXT_PROTOCOL 1 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GPE_T_RESERVED0 2 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GPE_T_RESERVED1 3 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GPE_T_VNI 4 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GPE_T_FID_COUNT 5 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT \ + {"FLAGS", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GPE_T_FLAGS},\ + {"NEXT_PROTOCOL", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GPE_T_NEXT_PROTOCOL},\ + {"RESERVED0", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GPE_T_RESERVED0},\ + {"RESERVED1", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GPE_T_RESERVED1},\ + {"VNI", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GPE_T_VNI},\ + {"gpe_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GPE_T_FID_COUNT} + +/*! + * \name GRE_CHKSUM_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM 0 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_CHKSUM_T_OFFSET 1 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT 2 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM},\ + {"OFFSET", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_CHKSUM_T_OFFSET},\ + {"gre_chksum_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT} + +/*! + * \name GRE_KEY_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_KEY_T_KEY 0 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_KEY_T_FID_COUNT 1 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT \ + {"KEY", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_KEY_T_KEY},\ + {"gre_key_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_KEY_T_FID_COUNT} + +/*! + * \name GRE_ROUT_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_ROUT_T_ROUTING 0 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_ROUT_T_FID_COUNT 1 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT \ + {"ROUTING", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_ROUT_T_ROUTING},\ + {"gre_rout_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_ROUT_T_FID_COUNT} + +/*! + * \name GRE_SEQ_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_SEQ_T_SEQUENCE 0 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_SEQ_T_FID_COUNT 1 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT \ + {"SEQUENCE", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_SEQ_T_SEQUENCE},\ + {"gre_seq_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_SEQ_T_FID_COUNT} + +/*! + * \name GRE_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_T_C_R_K_S 0 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_T_PROTOCOL 1 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_T_RESERVED 2 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_T_VERSION 3 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_T_FID_COUNT 4 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT \ + {"C_R_K_S", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_T_C_R_K_S},\ + {"PROTOCOL", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_T_PROTOCOL},\ + {"RESERVED", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_T_RESERVED},\ + {"VERSION", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_T_VERSION},\ + {"gre_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_T_FID_COUNT} + +/*! + * \name HOP_BY_HOP_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN 0 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER 1 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_HOP_BY_HOP_T_OPTION 2 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT 3 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER},\ + {"OPTION", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_HOP_BY_HOP_T_OPTION},\ + {"hop_by_hop_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT} + +/*! + * \name ICMP_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ICMP_T_CHECKSUM 0 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ICMP_T_CODE 1 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ICMP_T_ICMP_TYPE 2 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ICMP_T_FID_COUNT 3 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ICMP_T_CHECKSUM},\ + {"CODE", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ICMP_T_CODE},\ + {"ICMP_TYPE", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ICMP_T_ICMP_TYPE},\ + {"icmp_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ICMP_T_FID_COUNT} + +/*! + * \name IFA_FLEX_MD_0_A_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_FWD_HDR_TTL 0 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_LNS_DEVICE_ID 1 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT 2 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_FIELD_NAME_MAP_INIT \ + {"FWD_HDR_TTL", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_FWD_HDR_TTL},\ + {"LNS_DEVICE_ID", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_LNS_DEVICE_ID},\ + {"ifa_flex_md_0_a_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT} + +/*! + * \name IFA_FLEX_MD_0_B_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_CN 0 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_PORT_SPEED 1 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_QUEUE_ID 2 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_RX_TIMESTAMP_SEC 3 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT 4 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_FIELD_NAME_MAP_INIT \ + {"CN", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_CN},\ + {"PORT_SPEED", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_PORT_SPEED},\ + {"QUEUE_ID", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_QUEUE_ID},\ + {"RX_TIMESTAMP_SEC", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_RX_TIMESTAMP_SEC},\ + {"ifa_flex_md_0_b_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT} + +/*! + * \name IFA_FLEX_MD_1_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_1_T_EGRESS_PORT_ID 0 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_1_T_INGRESS_PORT_ID 1 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_1_T_RX_TIMESTAMP_NANOSEC 2 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT 3 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_1_T_FIELD_NAME_MAP_INIT \ + {"EGRESS_PORT_ID", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_1_T_EGRESS_PORT_ID},\ + {"INGRESS_PORT_ID", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_1_T_INGRESS_PORT_ID},\ + {"RX_TIMESTAMP_NANOSEC", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_1_T_RX_TIMESTAMP_NANOSEC},\ + {"ifa_flex_md_1_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT} + +/*! + * \name IFA_FLEX_MD_2_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_2_T_RESIDENCE_TIME_NANOSEC 0 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_2_T_TX_QUEUE_BYTE_COUNT 1 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT 2 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_2_T_FIELD_NAME_MAP_INIT \ + {"RESIDENCE_TIME_NANOSEC", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_2_T_RESIDENCE_TIME_NANOSEC},\ + {"TX_QUEUE_BYTE_COUNT", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_2_T_TX_QUEUE_BYTE_COUNT},\ + {"ifa_flex_md_2_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT} + +/*! + * \name IFA_FLEX_MD_3_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_0 0 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_1 1 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT 2 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_3_T_FIELD_NAME_MAP_INIT \ + {"MMU_STAT_0", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_0},\ + {"MMU_STAT_1", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_1},\ + {"ifa_flex_md_3_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT} + +/*! + * \name IFA_HEADER_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_HEADER_T_FLAGS 0 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_HEADER_T_GNS 1 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH 2 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_HEADER_T_NEXT_HDR 3 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_HEADER_T_VER 4 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_HEADER_T_FID_COUNT 5 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT \ + {"FLAGS", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_HEADER_T_FLAGS},\ + {"GNS", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_HEADER_T_GNS},\ + {"MAX_LENGTH", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH},\ + {"NEXT_HDR", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_HEADER_T_NEXT_HDR},\ + {"VER", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_HEADER_T_VER},\ + {"ifa_header_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_HEADER_T_FID_COUNT} + +/*! + * \name IFA_MD_BASE_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_MD_BASE_T_ACTION_VECTOR 0 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_MD_BASE_T_HOP_LIMIT_CURRENT_LENGTH 1 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_MD_BASE_T_REQUEST_VECTOR 2 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT 3 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_MD_BASE_T_FIELD_NAME_MAP_INIT \ + {"ACTION_VECTOR", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_MD_BASE_T_ACTION_VECTOR},\ + {"HOP_LIMIT_CURRENT_LENGTH", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_MD_BASE_T_HOP_LIMIT_CURRENT_LENGTH},\ + {"REQUEST_VECTOR", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_MD_BASE_T_REQUEST_VECTOR},\ + {"ifa_md_base_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT} + +/*! + * \name IFA_METADATA_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_METADATA_T_ACTION_VECTOR 0 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_METADATA_T_HOP_LIMIT_CURRENT_LENGTH 1 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_METADATA_T_METADATA 2 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_METADATA_T_REQUEST_VECTOR 3 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_METADATA_T_FID_COUNT 4 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_METADATA_T_FIELD_NAME_MAP_INIT \ + {"ACTION_VECTOR", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_METADATA_T_ACTION_VECTOR},\ + {"HOP_LIMIT_CURRENT_LENGTH", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_METADATA_T_HOP_LIMIT_CURRENT_LENGTH},\ + {"METADATA", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_METADATA_T_METADATA},\ + {"REQUEST_VECTOR", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_METADATA_T_REQUEST_VECTOR},\ + {"ifa_metadata_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_METADATA_T_FID_COUNT} + +/*! + * \name IGMP_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IGMP_T_CHECKSUM 0 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IGMP_T_GROUP_ADDRESS 1 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IGMP_T_IGMP_TYPE 2 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IGMP_T_MAX_RESP_TIME 3 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IGMP_T_FID_COUNT 4 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IGMP_T_CHECKSUM},\ + {"GROUP_ADDRESS", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IGMP_T_GROUP_ADDRESS},\ + {"IGMP_TYPE", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IGMP_T_IGMP_TYPE},\ + {"MAX_RESP_TIME", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IGMP_T_MAX_RESP_TIME},\ + {"igmp_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IGMP_T_FID_COUNT} + +/*! + * \name IPFIX_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPFIX_T_EXPORT_TIME 0 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPFIX_T_LENGTH 1 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPFIX_T_SEQUENCE_NUM 3 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPFIX_T_VERSION 4 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPFIX_T_FID_COUNT 5 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \ + {"EXPORT_TIME", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPFIX_T_EXPORT_TIME},\ + {"LENGTH", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPFIX_T_LENGTH},\ + {"OBS_DOMAIN_ID", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\ + {"SEQUENCE_NUM", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPFIX_T_SEQUENCE_NUM},\ + {"VERSION", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPFIX_T_VERSION},\ + {"ipfix_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPFIX_T_FID_COUNT} + +/*! + * \name IPV4_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_DA 0 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_HDR_CHECKSUM 2 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_ID 3 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_OPTION 4 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_PROTOCOL 5 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_SA 6 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_TOS 7 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_TOTAL_LENGTH 8 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_TTL 9 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_VERSION_HDR_LEN 10 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_FID_COUNT 11 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \ + {"DA", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_DA},\ + {"FLAGS_FRAG_OFFSET", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\ + {"HDR_CHECKSUM", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_HDR_CHECKSUM},\ + {"ID", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_ID},\ + {"OPTION", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_OPTION},\ + {"PROTOCOL", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_PROTOCOL},\ + {"SA", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_SA},\ + {"TOS", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_TOS},\ + {"TOTAL_LENGTH", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_TOTAL_LENGTH},\ + {"TTL", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_TTL},\ + {"VERSION_HDR_LEN", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_VERSION_HDR_LEN},\ + {"ipv4_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_FID_COUNT} + +/*! + * \name IPV6_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_DA 0 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_FLOW_LABEL 1 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_HOP_LIMIT 2 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_NEXT_HEADER 3 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_SA 5 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_TRAFFIC_CLASS 6 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_VERSION 7 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_FID_COUNT 8 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \ + {"DA", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_DA},\ + {"FLOW_LABEL", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_FLOW_LABEL},\ + {"HOP_LIMIT", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_HOP_LIMIT},\ + {"NEXT_HEADER", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_NEXT_HEADER},\ + {"PAYLOAD_LENGTH", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\ + {"SA", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_SA},\ + {"TRAFFIC_CLASS", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_TRAFFIC_CLASS},\ + {"VERSION", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_VERSION},\ + {"ipv6_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_FID_COUNT} + +/*! + * \name L2_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_L2_T_MACDA 0 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_L2_T_MACSA 1 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_L2_T_FID_COUNT 2 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \ + {"MACDA", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_L2_T_MACDA},\ + {"MACSA", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_L2_T_MACSA},\ + {"l2_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_L2_T_FID_COUNT} + +/*! + * \name MIRROR_ERSPAN_SN_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT 1 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \ + {"SEQ_NUM", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\ + {"mirror_erspan_sn_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT} + +/*! + * \name MIRROR_TRANSPORT_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MIRROR_TRANSPORT_T_DATA 0 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT 1 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MIRROR_TRANSPORT_T_DATA},\ + {"mirror_transport_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT} + +/*! + * \name MPLS_ACH_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE 0 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_ACH_T_CW_TYPE 1 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_ACH_T_RESERVED 2 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_ACH_T_VERSION 3 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_ACH_T_FID_COUNT 4 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT \ + {"CHANNEL_TYPE", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE},\ + {"CW_TYPE", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_ACH_T_CW_TYPE},\ + {"RESERVED", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_ACH_T_RESERVED},\ + {"VERSION", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_ACH_T_VERSION},\ + {"mpls_ach_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_ACH_T_FID_COUNT} + +/*! + * \name MPLS_BV_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_BV_T_VALUE 0 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_BV_T_FID_COUNT 1 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT \ + {"VALUE", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_BV_T_VALUE},\ + {"mpls_bv_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_BV_T_FID_COUNT} + +/*! + * \name MPLS_CW_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_CW_T_CW_TYPE 0 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_CW_T_RESERVED 1 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER 2 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_CW_T_FID_COUNT 3 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT \ + {"CW_TYPE", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_CW_T_CW_TYPE},\ + {"RESERVED", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_CW_T_RESERVED},\ + {"SEQ_NUMBER", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER},\ + {"mpls_cw_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_CW_T_FID_COUNT} + +/*! + * \name MPLS_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_T_BOS 0 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_T_EXP 1 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_T_LABEL 2 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_T_TTL 3 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_T_FID_COUNT 4 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT \ + {"BOS", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_T_BOS},\ + {"EXP", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_T_EXP},\ + {"LABEL", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_T_LABEL},\ + {"TTL", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_T_TTL},\ + {"mpls_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_T_FID_COUNT} + +/*! + * \name P_1588_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_CNTRL 0 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_CORRECTION 1 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_DOMAIN_NB 2 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_FLAGS 3 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_LOGMSGINTERVAL 4 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_MSG_LENGTH 5 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_MSG_TYPE 6 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_RESERVED1 7 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_RESERVED2 8 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_RESERVED3 9 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_SEQ_ID 10 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_SRCPORTID 11 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_TRANSPORTSPEC 12 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_VERSION 13 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_FID_COUNT 14 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT \ + {"CNTRL", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_CNTRL},\ + {"CORRECTION", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_CORRECTION},\ + {"DOMAIN_NB", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_DOMAIN_NB},\ + {"FLAGS", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_FLAGS},\ + {"LOGMSGINTERVAL", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_LOGMSGINTERVAL},\ + {"MSG_LENGTH", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_MSG_LENGTH},\ + {"MSG_TYPE", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_MSG_TYPE},\ + {"RESERVED1", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_RESERVED1},\ + {"RESERVED2", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_RESERVED2},\ + {"RESERVED3", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_RESERVED3},\ + {"SEQ_ID", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_SEQ_ID},\ + {"SRCPORTID", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_SRCPORTID},\ + {"TRANSPORTSPEC", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_TRANSPORTSPEC},\ + {"VERSION", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_VERSION},\ + {"p_1588_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_FID_COUNT} + +/*! + * \name PROG_EXT_HDR_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN 0 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER 1 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PROG_EXT_HDR_T_OPTION 2 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT 3 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER},\ + {"OPTION", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PROG_EXT_HDR_T_OPTION},\ + {"prog_ext_hdr_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT} + +/*! + * \name PSAMP_0_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_0_T_FLOWSET 0 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_0_T_LENGTH 1 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX 2 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS 3 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_0_T_OBS_TIME_S 4 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID 5 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_0_T_FID_COUNT 6 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT \ + {"FLOWSET", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_0_T_FLOWSET},\ + {"LENGTH", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_0_T_LENGTH},\ + {"NEXT_HOP_INDEX", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX},\ + {"OBS_TIME_NS", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS},\ + {"OBS_TIME_S", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_0_T_OBS_TIME_S},\ + {"TEMPLATE_ID", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID},\ + {"psamp_0_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_0_T_FID_COUNT} + +/*! + * \name PSAMP_1_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T_DLB_ID 0 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T_EGRESS_PORT 1 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T_EPOCH 2 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T_INGRESS_PORT 3 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH 4 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T_USER_META_DATA 5 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG 6 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T_FID_COUNT 7 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT \ + {"DLB_ID", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T_DLB_ID},\ + {"EGRESS_PORT", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T_EGRESS_PORT},\ + {"EPOCH", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T_EPOCH},\ + {"INGRESS_PORT", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T_INGRESS_PORT},\ + {"SAMPLED_LENGTH", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH},\ + {"USER_META_DATA", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T_USER_META_DATA},\ + {"VARIABLE_FLAG", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG},\ + {"psamp_1_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T_FID_COUNT} + +/*! + * \name PSAMP_MIRROR_ON_DROP_0_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT 1 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH 2 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS 3 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S 4 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID 5 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID 6 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT 7 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \ + {"EGRESS_MOD_PORT", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\ + {"INGRESS_PORT", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\ + {"LENGTH", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\ + {"OBS_TIME_NS", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\ + {"OBS_TIME_S", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\ + {"SWITCH_ID", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\ + {"TEMPLATE_ID", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\ + {"psamp_mirror_on_drop_0_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT} + +/*! + * \name PSAMP_MIRROR_ON_DROP_3_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON 0 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0 1 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH 2 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE 3 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX 4 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA 5 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR 6 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT 7 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT \ + {"DROP_REASON", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON},\ + {"RESERVED_0", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0},\ + {"SAMPLED_LENGTH", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH},\ + {"SMOD_STATE", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE},\ + {"UC_COS__COLOR__PROB_IDX", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX},\ + {"USER_META_DATA", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA},\ + {"VAR_LEN_INDICATOR", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR},\ + {"psamp_mirror_on_drop_3_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT} + +/*! + * \name RARP_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_HARDWARE_LEN 0 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_HARDWARE_TYPE 1 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_OPERATION 2 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_PROT_ADDR_LEN 3 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_PROTOCOL_TYPE 4 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_SENDER_HA 5 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_SENDER_IP 6 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_TARGET_HA 7 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_TARGET_IP 8 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_FID_COUNT 9 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \ + {"HARDWARE_LEN", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_HARDWARE_LEN},\ + {"HARDWARE_TYPE", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_HARDWARE_TYPE},\ + {"OPERATION", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_OPERATION},\ + {"PROT_ADDR_LEN", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_PROT_ADDR_LEN},\ + {"PROTOCOL_TYPE", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_PROTOCOL_TYPE},\ + {"SENDER_HA", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_SENDER_HA},\ + {"SENDER_IP", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_SENDER_IP},\ + {"TARGET_HA", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_TARGET_HA},\ + {"TARGET_IP", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_TARGET_IP},\ + {"rarp_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_FID_COUNT} + +/*! + * \name ROUTING_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ROUTING_T_DATA 0 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ROUTING_T_HDR_EXT_LEN 1 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ROUTING_T_NEXT_HEADER 2 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ROUTING_T_ROUTING_TYPE 3 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT 4 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ROUTING_T_FID_COUNT 5 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ROUTING_T_DATA},\ + {"HDR_EXT_LEN", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ROUTING_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ROUTING_T_NEXT_HEADER},\ + {"ROUTING_TYPE", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ROUTING_T_ROUTING_TYPE},\ + {"SEGMENTS_LEFT", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT},\ + {"routing_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ROUTING_T_FID_COUNT} + +/*! + * \name RSPAN_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RSPAN_T_TAG 0 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RSPAN_T_TPID 1 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RSPAN_T_FID_COUNT 2 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT \ + {"TAG", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RSPAN_T_TAG},\ + {"TPID", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RSPAN_T_TPID},\ + {"rspan_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RSPAN_T_FID_COUNT} + +/*! + * \name SFLOW_SHIM_0_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION 0 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE 1 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_0_T_VERSION 2 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT 3 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT \ + {"SYS_DESTINATION", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION},\ + {"SYS_SOURCE", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE},\ + {"VERSION", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_0_T_VERSION},\ + {"sflow_shim_0_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT} + +/*! + * \name SFLOW_SHIM_1_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE 0 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED 1 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE 2 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST 3 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE 4 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED 5 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED 6 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE 7 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT 8 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT \ + {"FLAG_DEST_SAMPLE", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE},\ + {"FLAG_DISCARDED", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED},\ + {"FLAG_FLEX_SAMPLE", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE},\ + {"FLAG_MCAST", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST},\ + {"FLAG_SRC_SAMPLE", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE},\ + {"FLAG_TRUNCATED", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED},\ + {"RESERVED", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED},\ + {"SYS_OPCODE", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE},\ + {"sflow_shim_1_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT} + +/*! + * \name SFLOW_SHIM_2_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM 0 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA 1 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT 2 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT \ + {"SEQUENCE_NUM", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM},\ + {"USER_META_DATA", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA},\ + {"sflow_shim_2_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT} + +/*! + * \name SNAP_LLC_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SNAP_LLC_T_LENGTH 0 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SNAP_LLC_T_SNAP_LLC 1 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SNAP_LLC_T_FID_COUNT 2 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT \ + {"LENGTH", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SNAP_LLC_T_LENGTH},\ + {"SNAP_LLC", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SNAP_LLC_T_SNAP_LLC},\ + {"snap_llc_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SNAP_LLC_T_FID_COUNT} + +/*! + * \name SVTAG_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SVTAG_T_DATA_LWR 0 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SVTAG_T_DATA_UPR 1 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SVTAG_T_FID_COUNT 2 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SVTAG_T_FIELD_NAME_MAP_INIT \ + {"DATA_LWR", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SVTAG_T_DATA_LWR},\ + {"DATA_UPR", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SVTAG_T_DATA_UPR},\ + {"svtag_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SVTAG_T_FID_COUNT} + +/*! + * \name TCP_FIRST_4BYTES_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT 2 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \ + {"DST_PORT", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\ + {"SRC_PORT", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\ + {"tcp_first_4bytes_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT} + +/*! + * \name TCP_LAST_16BYTES_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM 0 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM 1 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM 3 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR 4 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE 5 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT 6 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \ + {"ACK_NUM", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\ + {"CHECKSUM", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\ + {"HDR_LEN_AND_FLAGS", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\ + {"SEQ_NUM", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\ + {"URGENT_PTR", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\ + {"WIN_SIZE", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\ + {"tcp_last_16bytes_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT} + +/*! + * \name UDP_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UDP_T_CHECKSUM 0 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UDP_T_DST_PORT 1 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UDP_T_SRC_PORT 2 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UDP_T_UDP_LENGTH 3 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UDP_T_FID_COUNT 4 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UDP_T_CHECKSUM},\ + {"DST_PORT", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UDP_T_DST_PORT},\ + {"SRC_PORT", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UDP_T_SRC_PORT},\ + {"UDP_LENGTH", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UDP_T_UDP_LENGTH},\ + {"udp_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UDP_T_FID_COUNT} + +/*! + * \name UNKNOWN_L3_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD 1 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT 2 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \ + {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\ + {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\ + {"unknown_l3_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT} + +/*! + * \name UNKNOWN_L4_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT 1 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \ + {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\ + {"unknown_l4_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT} + +/*! + * \name UNKNOWN_L5_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT 3 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \ + {"L5_BYTES_0_1", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\ + {"L5_BYTES_2_3", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\ + {"L5_BYTES_4_7", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\ + {"unknown_l5_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT} + +/*! + * \name VLAN_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VLAN_T_CFI 0 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VLAN_T_PCP 1 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VLAN_T_TPID 2 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VLAN_T_VID 3 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VLAN_T_FID_COUNT 4 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \ + {"CFI", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VLAN_T_CFI},\ + {"PCP", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VLAN_T_PCP},\ + {"TPID", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VLAN_T_TPID},\ + {"VID", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VLAN_T_VID},\ + {"vlan_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VLAN_T_FID_COUNT} + +/*! + * \name VNTAG_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VNTAG_T_TAG 0 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VNTAG_T_TPID 1 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VNTAG_T_FID_COUNT 2 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT \ + {"TAG", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VNTAG_T_TAG},\ + {"TPID", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VNTAG_T_TPID},\ + {"vntag_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VNTAG_T_FID_COUNT} + +/*! + * \name VXLAN_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VXLAN_T_RESERVED2 1 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VXLAN_T_VN_ID 2 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VXLAN_T_FID_COUNT 3 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \ + {"FLAGS_RESERVED_1", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\ + {"RESERVED2", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VXLAN_T_RESERVED2},\ + {"VN_ID", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VXLAN_T_VN_ID},\ + {"vxlan_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VXLAN_T_FID_COUNT} + +/*! + * \name WESP_T field IDs. + */ +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T_FLAGS 0 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T_HEADER_LEN 1 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T_NEXT_HEADER 2 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T_SEQ_NUM 3 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T_SPI 4 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T_TRAILER_LEN 5 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T_WESP_IV 6 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T_FID_COUNT 7 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT \ + {"FLAGS", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T_FLAGS},\ + {"HEADER_LEN", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T_HEADER_LEN},\ + {"NEXT_HEADER", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T_NEXT_HEADER},\ + {"SEQ_NUM", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T_SEQ_NUM},\ + {"SPI", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T_SPI},\ + {"TRAILER_LEN", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T_TRAILER_LEN},\ + {"WESP_IV", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T_WESP_IV},\ + {"wesp_t fid count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T_FID_COUNT} + + +#endif /* BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_FLEXHDR_DATA_H */ diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_32_2_0/bcm56780_a0_hna_6_5_32_2_0_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_32_2_0/bcm56780_a0_hna_6_5_32_2_0_bcmpkt_rxpmd_flex_data.h new file mode 100644 index 00000000000..af05fd7bac4 --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_32_2_0/bcm56780_a0_hna_6_5_32_2_0_bcmpkt_rxpmd_flex_data.h @@ -0,0 +1,181 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) map.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_DATA_H +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_DATA_H + +/*! + * \name RX flex metadata field IDs. + */ +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0 0 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0 1 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_DVP_15_0 2 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0 3 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_EGR_MTOP_INDEX_HI_3_0 4 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_EGR_MTOP_INDEX_LO_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0 5 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0 6 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0 7 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0 8 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0 9 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16 10 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0 11 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16 12 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32 13 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0 14 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0 15 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_IFP_TO_EP_MACSEC_INFO_OR_IFP_OPAQUE_OBJ_15_0 16 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0 17 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0 18 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16 19 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0 20 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 21 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0 22 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0 23 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0 24 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0 25 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0 26 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0 27 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0 28 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0 29 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0 30 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0 31 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_SVP_15_0 32 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0 33 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0 34 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0 35 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0 36 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0 37 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0 38 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_VFI_15_0 39 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0 40 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_FID_COUNT 41 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_COUNT 47 + +/*! + * \name Packet Flex Reason Types. + */ +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE 0 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS 1 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED 2 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED 3 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED 4 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED 5 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP 6 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT 7 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP 8 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER 9 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED 10 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT 11 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP 12 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS 13 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE 14 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP 15 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS 16 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR 17 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF 18 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR 19 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL 20 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD 21 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0 22 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1 23 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2 24 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3 25 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4 26 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5 27 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6 28 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7 29 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD 30 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED 31 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED 32 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU 33 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MTOP_IPV4_GATEWAY 34 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU 35 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED 36 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT 37 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT 38 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP 39 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD 40 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_SVP 41 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP 42 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU 43 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR 44 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED 45 +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_VFP 46 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \ + {"CB_STATION_MOVE", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE},\ + {"CML_FLAGS", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\ + {"DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED},\ + {"DLB_ECMP_PKT_SAMPLED", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED},\ + {"DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED},\ + {"DLB_LAG_PKT_SAMPLED", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED},\ + {"DST_FP", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP},\ + {"EM_FT", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT},\ + {"IFP", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP},\ + {"IFP_METER", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\ + {"IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED},\ + {"IVXLT", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\ + {"L2_DST_LOOKUP", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\ + {"L2_DST_LOOKUP_MISS", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\ + {"L2_SRC_STATIC_MOVE", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\ + {"L3_DST_LOOKUP", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\ + {"L3_DST_LOOKUP_MISS", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\ + {"L3_HDR_ERROR", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\ + {"L3_IIF_EQ_L3_OIF", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF},\ + {"L3_TTL_ERROR", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\ + {"LEARN_CACHE_FULL", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\ + {"MACSA_MULTICAST_RSVD", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD},\ + {"MATCHED_RULE_BIT_0", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0},\ + {"MATCHED_RULE_BIT_1", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1},\ + {"MATCHED_RULE_BIT_2", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2},\ + {"MATCHED_RULE_BIT_3", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3},\ + {"MATCHED_RULE_BIT_4", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4},\ + {"MATCHED_RULE_BIT_5", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5},\ + {"MATCHED_RULE_BIT_6", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6},\ + {"MATCHED_RULE_BIT_7", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7},\ + {"MEMBERSHIP_CHECK_FAILED_RSVD", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD},\ + {"MIRROR_SAMPLER_EGR_SAMPLED", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED},\ + {"MIRROR_SAMPLER_SAMPLED", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED},\ + {"MPLS_CTRL_PKT_TO_CPU", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU},\ + {"MTOP_IPV4_GATEWAY", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MTOP_IPV4_GATEWAY},\ + {"NO_COPY_TO_CPU", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\ + {"PKT_INTEGRITY_CHECK_FAILED", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\ + {"PROTOCOL_PKT", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\ + {"RESERVED_TRACE_BIT", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT},\ + {"SER_DROP", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP},\ + {"SPANNING_TREE_CHECK_FAILED_RSVD", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD},\ + {"SVP", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_SVP},\ + {"TRACE_DOP", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\ + {"TRACE_DO_NOT_COPY_TO_CPU", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU},\ + {"TRACE_DO_NOT_MIRROR", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR},\ + {"URPF_CHECK_FAILED", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED},\ + {"VFP", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_VFP},\ + {"flex reason count", BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_COUNT} + +#endif /* BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_DATA_H */ diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_32_2_0/bcm56780_a0_hna_6_5_32_2_0_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_32_2_0/bcm56780_a0_hna_6_5_32_2_0_bcmpkt_rxpmd_match_id_defs.h new file mode 100644 index 00000000000..98ae378e5f4 --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_32_2_0/bcm56780_a0_hna_6_5_32_2_0_bcmpkt_rxpmd_match_id_defs.h @@ -0,0 +1,405 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) bcm56780_a0_hna_6_5_32_2_0_sf_match_id_info.yml + * for device bcm56780_a0 and variant hna_6_5_32_2_0. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H + +#include + +/*! + * \brief Get the Match ID DataBase information. + * + * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information. +*/ +extern bcmpkt_rxpmd_match_id_db_info_t * + bcm56780_a0_hna_6_5_32_2_0_rxpmd_match_id_db_info_get(void); + +/*! + * \brief Get the Match ID Mapping information. + * + * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information. +*/ +extern bcmpkt_rxpmd_match_id_map_info_t * + bcm56780_a0_hna_6_5_32_2_0_rxpmd_match_id_map_info_get(void); + +/*! + \name RXPMD Match IDs +*/ +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG 0 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG 1 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 2 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE 3 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG 4 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC 5 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG 6 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG 7 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP 8 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 9 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 10 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD 11 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT 12 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE 13 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 14 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 15 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE 16 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE 17 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM 18 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY 19 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT 20 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ 21 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP 22 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA 23 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP 24 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 25 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 26 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 27 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 28 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 29 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 30 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 31 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 32 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 33 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH 34 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW 35 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE 36 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 37 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP 38 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES 39 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES 40 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP 41 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 42 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 43 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 44 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN 45 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH 46 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK 47 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE 48 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG 49 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG 50 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 51 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE 52 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG 53 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC 54 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG 55 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG 56 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP 57 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 58 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 59 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD 60 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT 61 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE 62 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 63 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 64 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE 65 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE 66 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM 67 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY 68 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT 69 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ 70 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP 71 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA 72 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP 73 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 74 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 75 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 76 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 77 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 78 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 79 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 80 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 81 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 82 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH 83 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW 84 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE 85 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 86 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP 87 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES 88 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES 89 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP 90 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 91 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 92 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 93 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN 94 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG 95 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG 96 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 97 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE 98 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG 99 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC 100 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG 101 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP 102 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 103 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 104 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD 105 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT 106 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE 107 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 108 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 109 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP 110 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA 111 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP 112 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 113 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 114 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE 115 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 116 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP 117 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES 118 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES 119 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP 120 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 121 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 122 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 123 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG 124 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG 125 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 126 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE 127 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG 128 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC 129 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG 130 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG 131 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP 132 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 133 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 134 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD 135 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT 136 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE 137 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 138 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 139 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE 140 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE 141 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM 142 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY 143 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT 144 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ 145 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP 146 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA 147 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP 148 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 149 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 150 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 151 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 152 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 153 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 154 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 155 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 156 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 157 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH 158 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW 159 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE 160 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 161 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP 162 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES 163 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES 164 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP 165 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 166 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 167 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 168 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN 169 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH 170 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK 171 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE 172 +#define BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_COUNT 173 + +#define BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \ + {"EGRESS_PKT_FWD_L2_HDR_ETAG", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \ + {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \ + {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC}, \ + {"EGRESS_PKT_FWD_L2_HDR_SVTAG", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_VNTAG", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_BFD", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GPE", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IGMP", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_P_1588", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \ + {"EGRESS_PKT_SYS_HDR_EP_NIH", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH}, \ + {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \ + {"EGRESS_PKT_SYS_HDR_NONE", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_ETAG", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_SVTAG", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_VNTAG", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \ + {"INGRESS_PKT_INNER_L2_HDR_ETAG", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \ + {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \ + {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC}, \ + {"INGRESS_PKT_INNER_L2_HDR_VNTAG", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_BFD", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IGMP", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_P_1588", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \ + {"INGRESS_PKT_OUTER_L2_HDR_ETAG", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \ + {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \ + {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC}, \ + {"INGRESS_PKT_OUTER_L2_HDR_SVTAG", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_VNTAG", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_BFD", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GPE", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \ + {"INGRESS_PKT_SYS_HDR_EP_NIH", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH}, \ + {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \ + {"INGRESS_PKT_SYS_HDR_NONE", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \ + {"rxpmd_match_id_count", BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_COUNT} + +#endif /*! BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_bcmpkt_flexhdr.h similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_bcmpkt_flexhdr.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_bcmpkt_flexhdr.h index ed424db059a..b76f75a3c38 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_bcmpkt_flexhdr.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_bcmpkt_flexhdr.h @@ -5,8 +5,8 @@ * from the NPL output file(s) header.yml. * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -20,6 +20,7 @@ * * A copy of the GNU General Public License version 2 (GPLv2) can * be found in the LICENSES folder. + * All Rights Reserved.$ * * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser * diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_bcmpkt_flexhdr_data.h similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_bcmpkt_flexhdr_data.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_bcmpkt_flexhdr_data.h index 6a01696ce6c..91a29b26cb3 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_bcmpkt_flexhdr_data.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_bcmpkt_flexhdr_data.h @@ -5,8 +5,8 @@ * from the NPL output file(s) header.yml. * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -20,6 +20,7 @@ * * A copy of the GNU General Public License version 2 (GPLv2) can * be found in the LICENSES folder. + * All Rights Reserved.$ * * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser * diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_bcmpkt_rxpmd_flex_data.h similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_bcmpkt_rxpmd_flex_data.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_bcmpkt_rxpmd_flex_data.h index 5d02eb5e285..be757a27bc8 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_bcmpkt_rxpmd_flex_data.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_bcmpkt_rxpmd_flex_data.h @@ -5,8 +5,8 @@ * from the NPL output file(s) map.yml. * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -20,6 +20,7 @@ * * A copy of the GNU General Public License version 2 (GPLv2) can * be found in the LICENSES folder. + * All Rights Reserved.$ * * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser * diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_bcmpkt_rxpmd_match_id_defs.h similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_bcmpkt_rxpmd_match_id_defs.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_bcmpkt_rxpmd_match_id_defs.h index 5d3bd231267..f1f6fffac54 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_bcmpkt_rxpmd_match_id_defs.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_bcmpkt_rxpmd_match_id_defs.h @@ -6,8 +6,8 @@ * for device bcm56880_a0 and variant dna_6_5_31_6_0. * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -21,6 +21,7 @@ * * A copy of the GNU General Public License version 2 (GPLv2) can * be found in the LICENSES folder. + * All Rights Reserved.$ * * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser * diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_32_2_0/bcm56880_a0_hna_6_5_32_2_0_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_32_2_0/bcm56880_a0_hna_6_5_32_2_0_bcmpkt_flexhdr.h new file mode 100644 index 00000000000..26c99f2beef --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_32_2_0/bcm56880_a0_hna_6_5_32_2_0_bcmpkt_flexhdr.h @@ -0,0 +1,170 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) header.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_FLEXHDR_H +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_FLEXHDR_H + +#include + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T 0 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_AUTHEN_T 1 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T 2 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CNTAG_T 3 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T 4 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T 5 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_DEST_OPTION_T 6 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T 7 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T 8 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ESP_T 9 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ETAG_T 10 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ETHERTYPE_T 11 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_FRAG_T 12 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T 13 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GPE_T 14 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_CHKSUM_T 15 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_KEY_T 16 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_ROUT_T 17 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_SEQ_T 18 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_T 19 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_HOP_BY_HOP_T 20 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ICMP_T 21 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_A_T 22 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_B_T 23 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_1_T 24 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_2_T 25 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_3_T 26 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_HEADER_T 27 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_MD_BASE_T 28 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_METADATA_T 29 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IGMP_T 30 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPFIX_T 31 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T 32 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T 33 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_L2_T 34 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MIRROR_ERSPAN_SN_T 35 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MIRROR_TRANSPORT_T 36 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_ACH_T 37 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_BV_T 38 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_CW_T 39 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_T 40 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T 41 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PROG_EXT_HDR_T 42 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_0_T 43 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T 44 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T 45 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T 46 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T 47 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ROUTING_T 48 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RSPAN_T 49 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_0_T 50 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T 51 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_2_T 52 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SNAP_LLC_T 53 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_TCP_FIRST_4BYTES_T 54 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_TCP_LAST_16BYTES_T 55 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UDP_T 56 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L3_T 57 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L4_T 58 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L5_T 59 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VLAN_T 60 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VNTAG_T 61 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VXLAN_T 62 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T 63 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_T 64 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_FLEXHDR_COUNT 65 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_FLEXHDR_NAME_MAP_INIT \ + {"arp_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T},\ + {"authen_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_AUTHEN_T},\ + {"bfd_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T},\ + {"cntag_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CNTAG_T},\ + {"cpu_composites_0_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T},\ + {"cpu_composites_1_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T},\ + {"dest_option_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_DEST_OPTION_T},\ + {"erspan3_fixed_hdr_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T},\ + {"erspan3_subhdr_5_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T},\ + {"esp_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ESP_T},\ + {"etag_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ETAG_T},\ + {"ethertype_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ETHERTYPE_T},\ + {"frag_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_FRAG_T},\ + {"generic_loopback_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T},\ + {"gpe_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GPE_T},\ + {"gre_chksum_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_CHKSUM_T},\ + {"gre_key_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_KEY_T},\ + {"gre_rout_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_ROUT_T},\ + {"gre_seq_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_SEQ_T},\ + {"gre_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_T},\ + {"hop_by_hop_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_HOP_BY_HOP_T},\ + {"icmp_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ICMP_T},\ + {"ifa_flex_md_0_a_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_A_T},\ + {"ifa_flex_md_0_b_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_B_T},\ + {"ifa_flex_md_1_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_1_T},\ + {"ifa_flex_md_2_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_2_T},\ + {"ifa_flex_md_3_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_3_T},\ + {"ifa_header_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_HEADER_T},\ + {"ifa_md_base_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_MD_BASE_T},\ + {"ifa_metadata_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_METADATA_T},\ + {"igmp_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IGMP_T},\ + {"ipfix_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPFIX_T},\ + {"ipv4_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T},\ + {"ipv6_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T},\ + {"l2_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_L2_T},\ + {"mirror_erspan_sn_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MIRROR_ERSPAN_SN_T},\ + {"mirror_transport_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MIRROR_TRANSPORT_T},\ + {"mpls_ach_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_ACH_T},\ + {"mpls_bv_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_BV_T},\ + {"mpls_cw_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_CW_T},\ + {"mpls_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_T},\ + {"p_1588_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T},\ + {"prog_ext_hdr_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PROG_EXT_HDR_T},\ + {"psamp_0_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_0_T},\ + {"psamp_1_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T},\ + {"psamp_mirror_on_drop_0_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\ + {"psamp_mirror_on_drop_3_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T},\ + {"rarp_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T},\ + {"routing_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ROUTING_T},\ + {"rspan_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RSPAN_T},\ + {"sflow_shim_0_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_0_T},\ + {"sflow_shim_1_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T},\ + {"sflow_shim_2_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_2_T},\ + {"snap_llc_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SNAP_LLC_T},\ + {"tcp_first_4bytes_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_TCP_FIRST_4BYTES_T},\ + {"tcp_last_16bytes_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_TCP_LAST_16BYTES_T},\ + {"udp_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UDP_T},\ + {"unknown_l3_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L3_T},\ + {"unknown_l4_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L4_T},\ + {"unknown_l5_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L5_T},\ + {"vlan_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VLAN_T},\ + {"vntag_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VNTAG_T},\ + {"vxlan_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VXLAN_T},\ + {"wesp_t", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T},\ + {"RXPMD_FLEX_T", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_T},\ + {"flexhdr count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_FLEXHDR_COUNT} + +#endif /* BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_FLEXHDR_H */ diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_32_2_0/bcm56880_a0_hna_6_5_32_2_0_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_32_2_0/bcm56880_a0_hna_6_5_32_2_0_bcmpkt_flexhdr_data.h new file mode 100644 index 00000000000..1885b8067fd --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_32_2_0/bcm56880_a0_hna_6_5_32_2_0_bcmpkt_flexhdr_data.h @@ -0,0 +1,1212 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) header.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_FLEXHDR_DATA_H +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_FLEXHDR_DATA_H + +/*! + * \name ARP_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_HARDWARE_LEN 0 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_HARDWARE_TYPE 1 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_OPERATION 2 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_PROT_ADDR_LEN 3 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_PROTOCOL_TYPE 4 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_SENDER_HA 5 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_SENDER_IP 6 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_TARGET_HA 7 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_TARGET_IP 8 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_FID_COUNT 9 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \ + {"HARDWARE_LEN", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_HARDWARE_LEN},\ + {"HARDWARE_TYPE", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_HARDWARE_TYPE},\ + {"OPERATION", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_OPERATION},\ + {"PROT_ADDR_LEN", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_PROT_ADDR_LEN},\ + {"PROTOCOL_TYPE", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_PROTOCOL_TYPE},\ + {"SENDER_HA", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_SENDER_HA},\ + {"SENDER_IP", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_SENDER_IP},\ + {"TARGET_HA", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_TARGET_HA},\ + {"TARGET_IP", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_TARGET_IP},\ + {"arp_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_FID_COUNT} + +/*! + * \name AUTHEN_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_AUTHEN_T_DATA 0 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_AUTHEN_T_NEXT_HEADER 1 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN 2 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_AUTHEN_T_RESERVED 3 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_AUTHEN_T_SEQ_NUM 4 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_AUTHEN_T_SPI 5 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_AUTHEN_T_FID_COUNT 6 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_AUTHEN_T_DATA},\ + {"NEXT_HEADER", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_AUTHEN_T_NEXT_HEADER},\ + {"PAYLOAD_LEN", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN},\ + {"RESERVED", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_AUTHEN_T_RESERVED},\ + {"SEQ_NUM", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_AUTHEN_T_SEQ_NUM},\ + {"SPI", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_AUTHEN_T_SPI},\ + {"authen_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_AUTHEN_T_FID_COUNT} + +/*! + * \name BFD_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_AP 0 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_BFD_LENGTH 1 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_CPI 2 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_DEM 3 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_DESMINTXINTV 4 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_DETECTMULT 5 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_DIAG 6 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_FIN 7 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_MINECHORXINTV 8 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_MPT 9 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_MYDISCRIM 10 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_POLL 11 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_REQMINRXINTV 12 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_STA 13 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_URDISCRIM 14 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_VERSION 15 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_FID_COUNT 16 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT \ + {"AP", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_AP},\ + {"BFD_LENGTH", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_BFD_LENGTH},\ + {"CPI", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_CPI},\ + {"DEM", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_DEM},\ + {"DESMINTXINTV", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_DESMINTXINTV},\ + {"DETECTMULT", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_DETECTMULT},\ + {"DIAG", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_DIAG},\ + {"FIN", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_FIN},\ + {"MINECHORXINTV", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_MINECHORXINTV},\ + {"MPT", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_MPT},\ + {"MYDISCRIM", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_MYDISCRIM},\ + {"POLL", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_POLL},\ + {"REQMINRXINTV", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_REQMINRXINTV},\ + {"STA", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_STA},\ + {"URDISCRIM", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_URDISCRIM},\ + {"VERSION", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_VERSION},\ + {"bfd_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_FID_COUNT} + +/*! + * \name CNTAG_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CNTAG_T_RPID 0 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CNTAG_T_TPID 1 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CNTAG_T_FID_COUNT 2 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT \ + {"RPID", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CNTAG_T_RPID},\ + {"TPID", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CNTAG_T_TPID},\ + {"cntag_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CNTAG_T_FID_COUNT} + +/*! + * \name CPU_COMPOSITES_0_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT 7 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \ + {"DMA_CONT0", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\ + {"DMA_CONT1", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\ + {"DMA_CONT2", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\ + {"DMA_CONT3", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\ + {"DMA_CONT4", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\ + {"DMA_CONT5", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\ + {"DMA_CONT6", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\ + {"cpu_composites_0_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT} + +/*! + * \name CPU_COMPOSITES_1_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7 8 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8 9 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9 10 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT 11 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \ + {"DMA_CONT10", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\ + {"DMA_CONT11", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\ + {"DMA_CONT12", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\ + {"DMA_CONT13", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\ + {"DMA_CONT14", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\ + {"DMA_CONT15", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\ + {"DMA_CONT16", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\ + {"DMA_CONT17", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\ + {"DMA_CONT7", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\ + {"DMA_CONT8", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\ + {"DMA_CONT9", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\ + {"cpu_composites_1_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT} + +/*! + * \name DEST_OPTION_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN 0 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER 1 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_DEST_OPTION_T_OPTION 2 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_DEST_OPTION_T_FID_COUNT 3 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER},\ + {"OPTION", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_DEST_OPTION_T_OPTION},\ + {"dest_option_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_DEST_OPTION_T_FID_COUNT} + +/*! + * \name ERSPAN3_FIXED_HDR_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO 0 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS 1 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID 2 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID 4 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T 5 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP 6 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER 7 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN 8 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT 9 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \ + {"BSO", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\ + {"COS", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\ + {"GBP_SID", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\ + {"P_FT_HWID_D_GRA_O", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\ + {"SESSION_ID", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\ + {"T", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\ + {"TIMESTAMP", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\ + {"VER", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\ + {"VLAN", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\ + {"erspan3_fixed_hdr_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT} + +/*! + * \name ERSPAN3_SUBHDR_5_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID 1 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID 2 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP 3 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT 4 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \ + {"PLATFORM_ID", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\ + {"PORT_ID", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\ + {"SWITCH_ID", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\ + {"TIMESTAMP", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\ + {"erspan3_subhdr_5_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT} + +/*! + * \name ESP_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ESP_T_NEXT_HEADER 0 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ESP_T_PAD 1 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ESP_T_PAD_LEN 2 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ESP_T_SEQ_NUM 3 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ESP_T_SPI 4 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ESP_T_FID_COUNT 5 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT \ + {"NEXT_HEADER", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ESP_T_NEXT_HEADER},\ + {"PAD", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ESP_T_PAD},\ + {"PAD_LEN", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ESP_T_PAD_LEN},\ + {"SEQ_NUM", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ESP_T_SEQ_NUM},\ + {"SPI", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ESP_T_SPI},\ + {"esp_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ESP_T_FID_COUNT} + +/*! + * \name ETAG_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ETAG_T_TAG 0 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ETAG_T_TPID 1 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ETAG_T_FID_COUNT 2 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT \ + {"TAG", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ETAG_T_TAG},\ + {"TPID", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ETAG_T_TPID},\ + {"etag_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ETAG_T_FID_COUNT} + +/*! + * \name ETHERTYPE_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ETHERTYPE_T_TYPE 0 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT 1 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \ + {"TYPE", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ETHERTYPE_T_TYPE},\ + {"ethertype_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT} + +/*! + * \name FRAG_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_FRAG_T_FRAG_INFO 0 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_FRAG_T_ID 1 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_FRAG_T_NEXT_HEADER 2 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_FRAG_T_RESERVED 3 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_FRAG_T_FID_COUNT 4 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT \ + {"FRAG_INFO", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_FRAG_T_FRAG_INFO},\ + {"ID", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_FRAG_T_ID},\ + {"NEXT_HEADER", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_FRAG_T_NEXT_HEADER},\ + {"RESERVED", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_FRAG_T_RESERVED},\ + {"frag_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_FRAG_T_FID_COUNT} + +/*! + * \name GENERIC_LOOPBACK_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ 0 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE 1 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ 2 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS 3 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE 4 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY 5 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL 6 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ 7 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0 8 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1 9 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ 10 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1 11 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 12 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE 13 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_SVP 14 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT 15 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \ + {"DESTINATION_OBJ", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\ + {"DESTINATION_TYPE", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\ + {"ENTROPY_OBJ", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\ + {"FLAGS", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\ + {"HEADER_TYPE", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\ + {"INPUT_PRIORITY", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\ + {"INTERFACE_CTRL", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\ + {"INTERFACE_OBJ", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\ + {"PROCESSING_CTRL_0", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\ + {"PROCESSING_CTRL_1", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\ + {"QOS_OBJ", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\ + {"RESERVED_1", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\ + {"SOURCE_SYSTEM_PORT", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\ + {"START_BYTE", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\ + {"SVP", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_SVP},\ + {"generic_loopback_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT} + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP 0 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF 1 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED 2 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP 3 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP 4 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP 5 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP 6 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP 7 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1 8 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__TUNNEL 0 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__GENERIC 1 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__NOOP 0 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__VFI 1 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__L3_IIF 2 + +/*! + * \name GPE_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GPE_T_FLAGS 0 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GPE_T_NEXT_PROTOCOL 1 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GPE_T_RESERVED0 2 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GPE_T_RESERVED1 3 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GPE_T_VNI 4 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GPE_T_FID_COUNT 5 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT \ + {"FLAGS", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GPE_T_FLAGS},\ + {"NEXT_PROTOCOL", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GPE_T_NEXT_PROTOCOL},\ + {"RESERVED0", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GPE_T_RESERVED0},\ + {"RESERVED1", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GPE_T_RESERVED1},\ + {"VNI", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GPE_T_VNI},\ + {"gpe_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GPE_T_FID_COUNT} + +/*! + * \name GRE_CHKSUM_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM 0 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_CHKSUM_T_OFFSET 1 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT 2 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM},\ + {"OFFSET", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_CHKSUM_T_OFFSET},\ + {"gre_chksum_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT} + +/*! + * \name GRE_KEY_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_KEY_T_KEY 0 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_KEY_T_FID_COUNT 1 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT \ + {"KEY", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_KEY_T_KEY},\ + {"gre_key_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_KEY_T_FID_COUNT} + +/*! + * \name GRE_ROUT_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_ROUT_T_ROUTING 0 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_ROUT_T_FID_COUNT 1 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT \ + {"ROUTING", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_ROUT_T_ROUTING},\ + {"gre_rout_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_ROUT_T_FID_COUNT} + +/*! + * \name GRE_SEQ_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_SEQ_T_SEQUENCE 0 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_SEQ_T_FID_COUNT 1 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT \ + {"SEQUENCE", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_SEQ_T_SEQUENCE},\ + {"gre_seq_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_SEQ_T_FID_COUNT} + +/*! + * \name GRE_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_T_C_R_K_S 0 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_T_PROTOCOL 1 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_T_RESERVED 2 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_T_VERSION 3 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_T_FID_COUNT 4 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT \ + {"C_R_K_S", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_T_C_R_K_S},\ + {"PROTOCOL", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_T_PROTOCOL},\ + {"RESERVED", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_T_RESERVED},\ + {"VERSION", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_T_VERSION},\ + {"gre_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_T_FID_COUNT} + +/*! + * \name HOP_BY_HOP_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN 0 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER 1 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_HOP_BY_HOP_T_OPTION 2 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT 3 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER},\ + {"OPTION", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_HOP_BY_HOP_T_OPTION},\ + {"hop_by_hop_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT} + +/*! + * \name ICMP_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ICMP_T_CHECKSUM 0 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ICMP_T_CODE 1 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ICMP_T_ICMP_TYPE 2 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ICMP_T_FID_COUNT 3 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ICMP_T_CHECKSUM},\ + {"CODE", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ICMP_T_CODE},\ + {"ICMP_TYPE", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ICMP_T_ICMP_TYPE},\ + {"icmp_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ICMP_T_FID_COUNT} + +/*! + * \name IFA_FLEX_MD_0_A_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_FWD_HDR_TTL 0 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_LNS_DEVICE_ID 1 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT 2 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_FIELD_NAME_MAP_INIT \ + {"FWD_HDR_TTL", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_FWD_HDR_TTL},\ + {"LNS_DEVICE_ID", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_LNS_DEVICE_ID},\ + {"ifa_flex_md_0_a_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT} + +/*! + * \name IFA_FLEX_MD_0_B_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_CN 0 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_PORT_SPEED 1 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_QUEUE_ID 2 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_RX_TIMESTAMP_SEC 3 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT 4 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_FIELD_NAME_MAP_INIT \ + {"CN", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_CN},\ + {"PORT_SPEED", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_PORT_SPEED},\ + {"QUEUE_ID", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_QUEUE_ID},\ + {"RX_TIMESTAMP_SEC", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_RX_TIMESTAMP_SEC},\ + {"ifa_flex_md_0_b_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT} + +/*! + * \name IFA_FLEX_MD_1_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_1_T_EGRESS_PORT_ID 0 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_1_T_INGRESS_PORT_ID 1 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_1_T_RX_TIMESTAMP_NANOSEC 2 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT 3 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_1_T_FIELD_NAME_MAP_INIT \ + {"EGRESS_PORT_ID", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_1_T_EGRESS_PORT_ID},\ + {"INGRESS_PORT_ID", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_1_T_INGRESS_PORT_ID},\ + {"RX_TIMESTAMP_NANOSEC", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_1_T_RX_TIMESTAMP_NANOSEC},\ + {"ifa_flex_md_1_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT} + +/*! + * \name IFA_FLEX_MD_2_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_2_T_RESIDENCE_TIME_NANOSEC 0 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_2_T_TX_QUEUE_BYTE_COUNT 1 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT 2 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_2_T_FIELD_NAME_MAP_INIT \ + {"RESIDENCE_TIME_NANOSEC", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_2_T_RESIDENCE_TIME_NANOSEC},\ + {"TX_QUEUE_BYTE_COUNT", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_2_T_TX_QUEUE_BYTE_COUNT},\ + {"ifa_flex_md_2_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT} + +/*! + * \name IFA_FLEX_MD_3_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_0 0 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_1 1 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT 2 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_3_T_FIELD_NAME_MAP_INIT \ + {"MMU_STAT_0", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_0},\ + {"MMU_STAT_1", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_1},\ + {"ifa_flex_md_3_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT} + +/*! + * \name IFA_HEADER_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_HEADER_T_FLAGS 0 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_HEADER_T_GNS 1 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH 2 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_HEADER_T_NEXT_HDR 3 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_HEADER_T_VER 4 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_HEADER_T_FID_COUNT 5 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT \ + {"FLAGS", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_HEADER_T_FLAGS},\ + {"GNS", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_HEADER_T_GNS},\ + {"MAX_LENGTH", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH},\ + {"NEXT_HDR", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_HEADER_T_NEXT_HDR},\ + {"VER", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_HEADER_T_VER},\ + {"ifa_header_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_HEADER_T_FID_COUNT} + +/*! + * \name IFA_MD_BASE_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_MD_BASE_T_ACTION_VECTOR 0 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_MD_BASE_T_HOP_LIMIT_CURRENT_LENGTH 1 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_MD_BASE_T_REQUEST_VECTOR 2 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT 3 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_MD_BASE_T_FIELD_NAME_MAP_INIT \ + {"ACTION_VECTOR", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_MD_BASE_T_ACTION_VECTOR},\ + {"HOP_LIMIT_CURRENT_LENGTH", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_MD_BASE_T_HOP_LIMIT_CURRENT_LENGTH},\ + {"REQUEST_VECTOR", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_MD_BASE_T_REQUEST_VECTOR},\ + {"ifa_md_base_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT} + +/*! + * \name IFA_METADATA_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_METADATA_T_ACTION_VECTOR 0 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_METADATA_T_HOP_LIMIT_CURRENT_LENGTH 1 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_METADATA_T_METADATA 2 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_METADATA_T_REQUEST_VECTOR 3 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_METADATA_T_FID_COUNT 4 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_METADATA_T_FIELD_NAME_MAP_INIT \ + {"ACTION_VECTOR", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_METADATA_T_ACTION_VECTOR},\ + {"HOP_LIMIT_CURRENT_LENGTH", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_METADATA_T_HOP_LIMIT_CURRENT_LENGTH},\ + {"METADATA", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_METADATA_T_METADATA},\ + {"REQUEST_VECTOR", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_METADATA_T_REQUEST_VECTOR},\ + {"ifa_metadata_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_METADATA_T_FID_COUNT} + +/*! + * \name IGMP_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IGMP_T_CHECKSUM 0 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IGMP_T_GROUP_ADDRESS 1 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IGMP_T_IGMP_TYPE 2 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IGMP_T_MAX_RESP_TIME 3 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IGMP_T_FID_COUNT 4 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IGMP_T_CHECKSUM},\ + {"GROUP_ADDRESS", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IGMP_T_GROUP_ADDRESS},\ + {"IGMP_TYPE", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IGMP_T_IGMP_TYPE},\ + {"MAX_RESP_TIME", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IGMP_T_MAX_RESP_TIME},\ + {"igmp_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IGMP_T_FID_COUNT} + +/*! + * \name IPFIX_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPFIX_T_EXPORT_TIME 0 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPFIX_T_LENGTH 1 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPFIX_T_SEQUENCE_NUM 3 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPFIX_T_VERSION 4 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPFIX_T_FID_COUNT 5 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \ + {"EXPORT_TIME", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPFIX_T_EXPORT_TIME},\ + {"LENGTH", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPFIX_T_LENGTH},\ + {"OBS_DOMAIN_ID", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\ + {"SEQUENCE_NUM", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPFIX_T_SEQUENCE_NUM},\ + {"VERSION", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPFIX_T_VERSION},\ + {"ipfix_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPFIX_T_FID_COUNT} + +/*! + * \name IPV4_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_DA 0 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_HDR_CHECKSUM 2 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_ID 3 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_OPTION 4 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_PROTOCOL 5 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_SA 6 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_TOS 7 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_TOTAL_LENGTH 8 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_TTL 9 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_VERSION_HDR_LEN 10 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_FID_COUNT 11 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \ + {"DA", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_DA},\ + {"FLAGS_FRAG_OFFSET", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\ + {"HDR_CHECKSUM", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_HDR_CHECKSUM},\ + {"ID", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_ID},\ + {"OPTION", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_OPTION},\ + {"PROTOCOL", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_PROTOCOL},\ + {"SA", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_SA},\ + {"TOS", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_TOS},\ + {"TOTAL_LENGTH", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_TOTAL_LENGTH},\ + {"TTL", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_TTL},\ + {"VERSION_HDR_LEN", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_VERSION_HDR_LEN},\ + {"ipv4_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_FID_COUNT} + +/*! + * \name IPV6_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_DA 0 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_FLOW_LABEL 1 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_HOP_LIMIT 2 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_NEXT_HEADER 3 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_SA 5 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_TRAFFIC_CLASS 6 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_VERSION 7 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_FID_COUNT 8 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \ + {"DA", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_DA},\ + {"FLOW_LABEL", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_FLOW_LABEL},\ + {"HOP_LIMIT", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_HOP_LIMIT},\ + {"NEXT_HEADER", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_NEXT_HEADER},\ + {"PAYLOAD_LENGTH", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\ + {"SA", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_SA},\ + {"TRAFFIC_CLASS", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_TRAFFIC_CLASS},\ + {"VERSION", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_VERSION},\ + {"ipv6_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_FID_COUNT} + +/*! + * \name L2_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_L2_T_MACDA 0 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_L2_T_MACSA 1 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_L2_T_FID_COUNT 2 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \ + {"MACDA", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_L2_T_MACDA},\ + {"MACSA", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_L2_T_MACSA},\ + {"l2_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_L2_T_FID_COUNT} + +/*! + * \name MIRROR_ERSPAN_SN_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT 1 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \ + {"SEQ_NUM", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\ + {"mirror_erspan_sn_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT} + +/*! + * \name MIRROR_TRANSPORT_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MIRROR_TRANSPORT_T_DATA 0 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT 1 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MIRROR_TRANSPORT_T_DATA},\ + {"mirror_transport_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT} + +/*! + * \name MPLS_ACH_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE 0 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_ACH_T_CW_TYPE 1 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_ACH_T_RESERVED 2 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_ACH_T_VERSION 3 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_ACH_T_FID_COUNT 4 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT \ + {"CHANNEL_TYPE", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE},\ + {"CW_TYPE", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_ACH_T_CW_TYPE},\ + {"RESERVED", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_ACH_T_RESERVED},\ + {"VERSION", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_ACH_T_VERSION},\ + {"mpls_ach_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_ACH_T_FID_COUNT} + +/*! + * \name MPLS_BV_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_BV_T_VALUE 0 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_BV_T_FID_COUNT 1 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT \ + {"VALUE", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_BV_T_VALUE},\ + {"mpls_bv_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_BV_T_FID_COUNT} + +/*! + * \name MPLS_CW_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_CW_T_CW_TYPE 0 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_CW_T_RESERVED 1 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER 2 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_CW_T_FID_COUNT 3 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT \ + {"CW_TYPE", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_CW_T_CW_TYPE},\ + {"RESERVED", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_CW_T_RESERVED},\ + {"SEQ_NUMBER", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER},\ + {"mpls_cw_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_CW_T_FID_COUNT} + +/*! + * \name MPLS_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_T_BOS 0 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_T_EXP 1 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_T_LABEL 2 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_T_TTL 3 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_T_FID_COUNT 4 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT \ + {"BOS", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_T_BOS},\ + {"EXP", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_T_EXP},\ + {"LABEL", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_T_LABEL},\ + {"TTL", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_T_TTL},\ + {"mpls_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_T_FID_COUNT} + +/*! + * \name P_1588_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_CNTRL 0 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_CORRECTION 1 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_DOMAIN_NB 2 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_FLAGS 3 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_LOGMSGINTERVAL 4 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_MSG_LENGTH 5 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_MSG_TYPE 6 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_RESERVED1 7 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_RESERVED2 8 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_RESERVED3 9 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_SEQ_ID 10 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_SRCPORTID 11 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_TRANSPORTSPEC 12 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_VERSION 13 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_FID_COUNT 14 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT \ + {"CNTRL", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_CNTRL},\ + {"CORRECTION", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_CORRECTION},\ + {"DOMAIN_NB", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_DOMAIN_NB},\ + {"FLAGS", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_FLAGS},\ + {"LOGMSGINTERVAL", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_LOGMSGINTERVAL},\ + {"MSG_LENGTH", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_MSG_LENGTH},\ + {"MSG_TYPE", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_MSG_TYPE},\ + {"RESERVED1", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_RESERVED1},\ + {"RESERVED2", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_RESERVED2},\ + {"RESERVED3", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_RESERVED3},\ + {"SEQ_ID", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_SEQ_ID},\ + {"SRCPORTID", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_SRCPORTID},\ + {"TRANSPORTSPEC", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_TRANSPORTSPEC},\ + {"VERSION", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_VERSION},\ + {"p_1588_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_FID_COUNT} + +/*! + * \name PROG_EXT_HDR_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN 0 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER 1 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PROG_EXT_HDR_T_OPTION 2 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT 3 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER},\ + {"OPTION", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PROG_EXT_HDR_T_OPTION},\ + {"prog_ext_hdr_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT} + +/*! + * \name PSAMP_0_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_0_T_FLOWSET 0 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_0_T_LENGTH 1 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX 2 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS 3 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_0_T_OBS_TIME_S 4 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID 5 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_0_T_FID_COUNT 6 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT \ + {"FLOWSET", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_0_T_FLOWSET},\ + {"LENGTH", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_0_T_LENGTH},\ + {"NEXT_HOP_INDEX", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX},\ + {"OBS_TIME_NS", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS},\ + {"OBS_TIME_S", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_0_T_OBS_TIME_S},\ + {"TEMPLATE_ID", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID},\ + {"psamp_0_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_0_T_FID_COUNT} + +/*! + * \name PSAMP_1_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T_DLB_ID 0 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T_EGRESS_PORT 1 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T_EPOCH 2 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T_INGRESS_PORT 3 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH 4 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T_USER_META_DATA 5 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG 6 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T_FID_COUNT 7 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT \ + {"DLB_ID", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T_DLB_ID},\ + {"EGRESS_PORT", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T_EGRESS_PORT},\ + {"EPOCH", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T_EPOCH},\ + {"INGRESS_PORT", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T_INGRESS_PORT},\ + {"SAMPLED_LENGTH", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH},\ + {"USER_META_DATA", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T_USER_META_DATA},\ + {"VARIABLE_FLAG", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG},\ + {"psamp_1_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T_FID_COUNT} + +/*! + * \name PSAMP_MIRROR_ON_DROP_0_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT 1 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH 2 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS 3 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S 4 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID 5 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID 6 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT 7 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \ + {"EGRESS_MOD_PORT", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\ + {"INGRESS_PORT", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\ + {"LENGTH", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\ + {"OBS_TIME_NS", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\ + {"OBS_TIME_S", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\ + {"SWITCH_ID", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\ + {"TEMPLATE_ID", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\ + {"psamp_mirror_on_drop_0_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT} + +/*! + * \name PSAMP_MIRROR_ON_DROP_3_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON 0 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_MOD_STATE 1 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0 2 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH 3 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX 4 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA 5 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR 6 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT 7 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT \ + {"DROP_REASON", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON},\ + {"MOD_STATE", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_MOD_STATE},\ + {"RESERVED_0", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0},\ + {"SAMPLED_LENGTH", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH},\ + {"UC_COS__COLOR__PROB_IDX", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX},\ + {"USER_META_DATA", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA},\ + {"VAR_LEN_INDICATOR", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR},\ + {"psamp_mirror_on_drop_3_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT} + +/*! + * \name RARP_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_HARDWARE_LEN 0 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_HARDWARE_TYPE 1 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_OPERATION 2 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_PROT_ADDR_LEN 3 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_PROTOCOL_TYPE 4 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_SENDER_HA 5 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_SENDER_IP 6 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_TARGET_HA 7 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_TARGET_IP 8 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_FID_COUNT 9 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \ + {"HARDWARE_LEN", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_HARDWARE_LEN},\ + {"HARDWARE_TYPE", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_HARDWARE_TYPE},\ + {"OPERATION", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_OPERATION},\ + {"PROT_ADDR_LEN", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_PROT_ADDR_LEN},\ + {"PROTOCOL_TYPE", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_PROTOCOL_TYPE},\ + {"SENDER_HA", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_SENDER_HA},\ + {"SENDER_IP", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_SENDER_IP},\ + {"TARGET_HA", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_TARGET_HA},\ + {"TARGET_IP", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_TARGET_IP},\ + {"rarp_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_FID_COUNT} + +/*! + * \name ROUTING_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ROUTING_T_DATA 0 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ROUTING_T_HDR_EXT_LEN 1 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ROUTING_T_NEXT_HEADER 2 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ROUTING_T_ROUTING_TYPE 3 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT 4 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ROUTING_T_FID_COUNT 5 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ROUTING_T_DATA},\ + {"HDR_EXT_LEN", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ROUTING_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ROUTING_T_NEXT_HEADER},\ + {"ROUTING_TYPE", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ROUTING_T_ROUTING_TYPE},\ + {"SEGMENTS_LEFT", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT},\ + {"routing_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ROUTING_T_FID_COUNT} + +/*! + * \name RSPAN_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RSPAN_T_TAG 0 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RSPAN_T_TPID 1 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RSPAN_T_FID_COUNT 2 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT \ + {"TAG", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RSPAN_T_TAG},\ + {"TPID", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RSPAN_T_TPID},\ + {"rspan_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RSPAN_T_FID_COUNT} + +/*! + * \name SFLOW_SHIM_0_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION 0 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE 1 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_0_T_VERSION 2 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT 3 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT \ + {"SYS_DESTINATION", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION},\ + {"SYS_SOURCE", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE},\ + {"VERSION", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_0_T_VERSION},\ + {"sflow_shim_0_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT} + +/*! + * \name SFLOW_SHIM_1_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE 0 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED 1 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE 2 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST 3 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE 4 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED 5 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED 6 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE 7 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT 8 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT \ + {"FLAG_DEST_SAMPLE", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE},\ + {"FLAG_DISCARDED", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED},\ + {"FLAG_FLEX_SAMPLE", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE},\ + {"FLAG_MCAST", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST},\ + {"FLAG_SRC_SAMPLE", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE},\ + {"FLAG_TRUNCATED", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED},\ + {"RESERVED", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED},\ + {"SYS_OPCODE", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE},\ + {"sflow_shim_1_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT} + +/*! + * \name SFLOW_SHIM_2_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM 0 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA 1 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT 2 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT \ + {"SEQUENCE_NUM", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM},\ + {"USER_META_DATA", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA},\ + {"sflow_shim_2_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT} + +/*! + * \name SNAP_LLC_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SNAP_LLC_T_LENGTH 0 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SNAP_LLC_T_SNAP_LLC 1 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SNAP_LLC_T_FID_COUNT 2 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT \ + {"LENGTH", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SNAP_LLC_T_LENGTH},\ + {"SNAP_LLC", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SNAP_LLC_T_SNAP_LLC},\ + {"snap_llc_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SNAP_LLC_T_FID_COUNT} + +/*! + * \name TCP_FIRST_4BYTES_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT 2 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \ + {"DST_PORT", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\ + {"SRC_PORT", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\ + {"tcp_first_4bytes_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT} + +/*! + * \name TCP_LAST_16BYTES_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM 0 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM 1 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM 3 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR 4 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE 5 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT 6 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \ + {"ACK_NUM", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\ + {"CHECKSUM", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\ + {"HDR_LEN_AND_FLAGS", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\ + {"SEQ_NUM", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\ + {"URGENT_PTR", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\ + {"WIN_SIZE", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\ + {"tcp_last_16bytes_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT} + +/*! + * \name UDP_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UDP_T_CHECKSUM 0 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UDP_T_DST_PORT 1 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UDP_T_SRC_PORT 2 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UDP_T_UDP_LENGTH 3 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UDP_T_FID_COUNT 4 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UDP_T_CHECKSUM},\ + {"DST_PORT", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UDP_T_DST_PORT},\ + {"SRC_PORT", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UDP_T_SRC_PORT},\ + {"UDP_LENGTH", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UDP_T_UDP_LENGTH},\ + {"udp_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UDP_T_FID_COUNT} + +/*! + * \name UNKNOWN_L3_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD 1 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT 2 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \ + {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\ + {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\ + {"unknown_l3_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT} + +/*! + * \name UNKNOWN_L4_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT 1 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \ + {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\ + {"unknown_l4_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT} + +/*! + * \name UNKNOWN_L5_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT 3 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \ + {"L5_BYTES_0_1", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\ + {"L5_BYTES_2_3", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\ + {"L5_BYTES_4_7", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\ + {"unknown_l5_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT} + +/*! + * \name VLAN_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VLAN_T_CFI 0 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VLAN_T_PCP 1 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VLAN_T_TPID 2 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VLAN_T_VID 3 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VLAN_T_FID_COUNT 4 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \ + {"CFI", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VLAN_T_CFI},\ + {"PCP", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VLAN_T_PCP},\ + {"TPID", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VLAN_T_TPID},\ + {"VID", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VLAN_T_VID},\ + {"vlan_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VLAN_T_FID_COUNT} + +/*! + * \name VNTAG_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VNTAG_T_TAG 0 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VNTAG_T_TPID 1 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VNTAG_T_FID_COUNT 2 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT \ + {"TAG", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VNTAG_T_TAG},\ + {"TPID", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VNTAG_T_TPID},\ + {"vntag_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VNTAG_T_FID_COUNT} + +/*! + * \name VXLAN_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VXLAN_T_RESERVED2 1 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VXLAN_T_VN_ID 2 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VXLAN_T_FID_COUNT 3 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \ + {"FLAGS_RESERVED_1", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\ + {"RESERVED2", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VXLAN_T_RESERVED2},\ + {"VN_ID", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VXLAN_T_VN_ID},\ + {"vxlan_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VXLAN_T_FID_COUNT} + +/*! + * \name WESP_T field IDs. + */ +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T_FLAGS 0 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T_HEADER_LEN 1 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T_NEXT_HEADER 2 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T_SEQ_NUM 3 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T_SPI 4 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T_TRAILER_LEN 5 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T_WESP_IV 6 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T_FID_COUNT 7 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT \ + {"FLAGS", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T_FLAGS},\ + {"HEADER_LEN", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T_HEADER_LEN},\ + {"NEXT_HEADER", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T_NEXT_HEADER},\ + {"SEQ_NUM", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T_SEQ_NUM},\ + {"SPI", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T_SPI},\ + {"TRAILER_LEN", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T_TRAILER_LEN},\ + {"WESP_IV", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T_WESP_IV},\ + {"wesp_t fid count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T_FID_COUNT} + + +#endif /* BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_FLEXHDR_DATA_H */ diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_32_2_0/bcm56880_a0_hna_6_5_32_2_0_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_32_2_0/bcm56880_a0_hna_6_5_32_2_0_bcmpkt_rxpmd_flex_data.h new file mode 100644 index 00000000000..388ef71c6a0 --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_32_2_0/bcm56880_a0_hna_6_5_32_2_0_bcmpkt_rxpmd_flex_data.h @@ -0,0 +1,165 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) map.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_DATA_H +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_DATA_H + +/*! + * \name RX flex metadata field IDs. + */ +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0 0 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0 1 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_DVP_15_0 2 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0 3 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0 4 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0 5 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0 6 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_0 7 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32 8 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0 9 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0 10 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0 11 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_ING_PORT_GROUP_ID_3_0_3_0 12 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_ING_PORT_GROUP_ID_7_4_3_0 13 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_0 14 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_ITAG_PRESERVE_15_0 15 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 16 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0 17 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0 18 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0 19 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0 20 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0 21 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0 22 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0 23 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0 24 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0 25 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0 26 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_SVP_15_0 27 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0 28 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0 29 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0 30 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0 31 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0 32 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0 33 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_VFI_15_0 34 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_FID_COUNT 35 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_COUNT 42 + +/*! + * \name Packet Flex Reason Types. + */ +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE 0 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS 1 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED 2 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED 3 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP 4 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT 5 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP 6 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER 7 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED 8 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT 9 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP 10 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS 11 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE 12 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP 13 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS 14 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR 15 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF 16 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR 17 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL 18 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD 19 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0 20 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1 21 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2 22 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3 23 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4 24 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5 25 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6 26 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7 27 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD 28 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED 29 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED 30 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU 31 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU 32 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED 33 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT 34 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT 35 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP 36 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD 37 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_SVP 38 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP 39 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED 40 +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_VFP 41 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \ + {"CB_STATION_MOVE", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE},\ + {"CML_FLAGS", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\ + {"DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED},\ + {"DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED},\ + {"DST_FP", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP},\ + {"EM_FT", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT},\ + {"IFP", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP},\ + {"IFP_METER", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\ + {"IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED},\ + {"IVXLT", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\ + {"L2_DST_LOOKUP", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\ + {"L2_DST_LOOKUP_MISS", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\ + {"L2_SRC_STATIC_MOVE", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\ + {"L3_DST_LOOKUP", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\ + {"L3_DST_LOOKUP_MISS", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\ + {"L3_HDR_ERROR", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\ + {"L3_IIF_EQ_L3_OIF", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF},\ + {"L3_TTL_ERROR", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\ + {"LEARN_CACHE_FULL", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\ + {"MACSA_MULTICAST_RSVD", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD},\ + {"MATCHED_RULE_BIT_0", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0},\ + {"MATCHED_RULE_BIT_1", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1},\ + {"MATCHED_RULE_BIT_2", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2},\ + {"MATCHED_RULE_BIT_3", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3},\ + {"MATCHED_RULE_BIT_4", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4},\ + {"MATCHED_RULE_BIT_5", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5},\ + {"MATCHED_RULE_BIT_6", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6},\ + {"MATCHED_RULE_BIT_7", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7},\ + {"MEMBERSHIP_CHECK_FAILED_RSVD", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD},\ + {"MIRROR_SAMPLER_EGR_SAMPLED", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED},\ + {"MIRROR_SAMPLER_SAMPLED", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED},\ + {"MPLS_CTRL_PKT_TO_CPU", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU},\ + {"NO_COPY_TO_CPU", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\ + {"PKT_INTEGRITY_CHECK_FAILED", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\ + {"PROTOCOL_PKT", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\ + {"RESERVED_TRACE_BIT", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT},\ + {"SER_DROP", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP},\ + {"SPANNING_TREE_CHECK_FAILED_RSVD", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD},\ + {"SVP", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_SVP},\ + {"TRACE_DOP", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\ + {"URPF_CHECK_FAILED", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED},\ + {"VFP", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_VFP},\ + {"flex reason count", BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_COUNT} + +#endif /* BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_DATA_H */ diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_32_2_0/bcm56880_a0_hna_6_5_32_2_0_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_32_2_0/bcm56880_a0_hna_6_5_32_2_0_bcmpkt_rxpmd_match_id_defs.h new file mode 100644 index 00000000000..70d02ff7e37 --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_32_2_0/bcm56880_a0_hna_6_5_32_2_0_bcmpkt_rxpmd_match_id_defs.h @@ -0,0 +1,395 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) bcm56880_a0_hna_6_5_32_2_0_sf_match_id_info.yml + * for device bcm56880_a0 and variant hna_6_5_32_2_0. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H + +#include + +/*! + * \brief Get the Match ID DataBase information. + * + * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information. +*/ +extern bcmpkt_rxpmd_match_id_db_info_t * + bcm56880_a0_hna_6_5_32_2_0_rxpmd_match_id_db_info_get(void); + +/*! + * \brief Get the Match ID Mapping information. + * + * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information. +*/ +extern bcmpkt_rxpmd_match_id_map_info_t * + bcm56880_a0_hna_6_5_32_2_0_rxpmd_match_id_map_info_get(void); + +/*! + \name RXPMD Match IDs +*/ +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG 0 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG 1 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 2 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE 3 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG 4 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC 5 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG 6 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP 7 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 8 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 9 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD 10 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT 11 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE 12 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 13 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 14 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE 15 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE 16 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM 17 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY 18 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT 19 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ 20 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP 21 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA 22 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP 23 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 24 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 25 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 26 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 27 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 28 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 29 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 30 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 31 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 32 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH 33 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW 34 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE 35 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 36 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP 37 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES 38 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES 39 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP 40 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 41 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 42 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 43 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN 44 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK 45 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE 46 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG 47 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG 48 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 49 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE 50 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG 51 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC 52 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG 53 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP 54 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 55 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 56 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD 57 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT 58 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE 59 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 60 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 61 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE 62 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE 63 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM 64 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY 65 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT 66 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ 67 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP 68 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA 69 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP 70 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 71 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 72 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 73 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 74 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 75 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 76 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 77 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 78 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 79 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH 80 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW 81 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE 82 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 83 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP 84 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES 85 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES 86 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP 87 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 88 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 89 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 90 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN 91 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG 92 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG 93 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 94 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE 95 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG 96 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC 97 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG 98 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP 99 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 100 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 101 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD 102 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT 103 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE 104 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 105 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 106 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP 107 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA 108 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP 109 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 110 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 111 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE 112 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 113 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP 114 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES 115 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES 116 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP 117 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 118 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 119 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 120 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG 121 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG 122 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 123 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE 124 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG 125 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC 126 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG 127 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP 128 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 129 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 130 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD 131 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT 132 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE 133 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 134 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 135 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE 136 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE 137 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM 138 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY 139 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT 140 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ 141 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP 142 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA 143 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP 144 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 145 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 146 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 147 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 148 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 149 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 150 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 151 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 152 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 153 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH 154 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW 155 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE 156 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 157 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP 158 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES 159 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES 160 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP 161 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 162 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 163 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 164 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN 165 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK 166 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE 167 +#define BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_COUNT 168 + +#define BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \ + {"EGRESS_PKT_FWD_L2_HDR_ETAG", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \ + {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \ + {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC}, \ + {"EGRESS_PKT_FWD_L2_HDR_VNTAG", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_BFD", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GPE", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IGMP", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_P_1588", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \ + {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \ + {"EGRESS_PKT_SYS_HDR_NONE", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_ETAG", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_VNTAG", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \ + {"INGRESS_PKT_INNER_L2_HDR_ETAG", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \ + {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \ + {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC}, \ + {"INGRESS_PKT_INNER_L2_HDR_VNTAG", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_BFD", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IGMP", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_P_1588", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \ + {"INGRESS_PKT_OUTER_L2_HDR_ETAG", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \ + {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \ + {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC}, \ + {"INGRESS_PKT_OUTER_L2_HDR_VNTAG", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_BFD", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GPE", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \ + {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \ + {"INGRESS_PKT_SYS_HDR_NONE", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \ + {"rxpmd_match_id_count", BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_COUNT} + +#endif /*! BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H */ diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_32_1_0/bcm56880_a0_nfa_6_5_32_1_0_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_32_1_0/bcm56880_a0_nfa_6_5_32_1_0_bcmpkt_flexhdr.h new file mode 100644 index 00000000000..3f9a197d565 --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_32_1_0/bcm56880_a0_nfa_6_5_32_1_0_bcmpkt_flexhdr.h @@ -0,0 +1,162 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) header.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_FLEXHDR_H +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_FLEXHDR_H + +#include + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ARP_T 0 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_AUTHEN_T 1 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_BFD_T 2 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_0_T 3 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_1_T 4 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_DEST_OPTION_T 5 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ERSPAN3_FIXED_HDR_T 6 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ERSPAN3_SUBHDR_5_T 7 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ESP_T 8 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ETAG_T 9 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ETHERTYPE_T 10 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_FRAG_T 11 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T 12 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GPE_T 13 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_CHKSUM_T 14 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_KEY_T 15 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_ROUT_T 16 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_SEQ_T 17 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_T 18 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_12BYTE_T 19 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_8BYTE_T 20 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_EXT_4BYTE_T 21 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_WITH_EXT_T 22 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_HOP_BY_HOP_T 23 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ICMP_T 24 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IGMP_T 25 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPFIX_T 26 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV4_T 27 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV6_T 28 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_L2_T 29 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MIRROR_ERSPAN_SN_T 30 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MIRROR_TRANSPORT_T 31 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_ACH_T 32 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_BV_T 33 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_CW_T 34 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_T 35 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_OPAQUETAG_T 36 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_P_1588_T 37 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PROG_EXT_HDR_T 38 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_0_T 39 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_1_T 40 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T 41 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T 42 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RARP_T 43 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ROUTING_T 44 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RSPAN_T 45 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_0_T 46 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_1_T 47 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_2_T 48 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SNAP_LLC_T 49 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_TCP_FIRST_4BYTES_T 50 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_TCP_LAST_16BYTES_T 51 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UDP_T 52 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UNKNOWN_L3_T 53 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UNKNOWN_L4_T 54 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UNKNOWN_L5_T 55 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VLAN_T 56 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VNTAG_T 57 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VXLAN_T 58 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_WESP_T 59 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_T 60 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_FLEXHDR_COUNT 61 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_FLEXHDR_NAME_MAP_INIT \ + {"arp_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ARP_T},\ + {"authen_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_AUTHEN_T},\ + {"bfd_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_BFD_T},\ + {"cpu_composites_0_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_0_T},\ + {"cpu_composites_1_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_1_T},\ + {"dest_option_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_DEST_OPTION_T},\ + {"erspan3_fixed_hdr_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ERSPAN3_FIXED_HDR_T},\ + {"erspan3_subhdr_5_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ERSPAN3_SUBHDR_5_T},\ + {"esp_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ESP_T},\ + {"etag_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ETAG_T},\ + {"ethertype_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ETHERTYPE_T},\ + {"frag_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_FRAG_T},\ + {"generic_loopback_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T},\ + {"gpe_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GPE_T},\ + {"gre_chksum_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_CHKSUM_T},\ + {"gre_key_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_KEY_T},\ + {"gre_rout_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_ROUT_T},\ + {"gre_seq_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_SEQ_T},\ + {"gre_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_T},\ + {"gtp_12byte_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_12BYTE_T},\ + {"gtp_8byte_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_8BYTE_T},\ + {"gtp_ext_4byte_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_EXT_4BYTE_T},\ + {"gtp_with_ext_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_WITH_EXT_T},\ + {"hop_by_hop_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_HOP_BY_HOP_T},\ + {"icmp_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ICMP_T},\ + {"igmp_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IGMP_T},\ + {"ipfix_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPFIX_T},\ + {"ipv4_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV4_T},\ + {"ipv6_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV6_T},\ + {"l2_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_L2_T},\ + {"mirror_erspan_sn_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MIRROR_ERSPAN_SN_T},\ + {"mirror_transport_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MIRROR_TRANSPORT_T},\ + {"mpls_ach_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_ACH_T},\ + {"mpls_bv_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_BV_T},\ + {"mpls_cw_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_CW_T},\ + {"mpls_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_T},\ + {"opaquetag_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_OPAQUETAG_T},\ + {"p_1588_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_P_1588_T},\ + {"prog_ext_hdr_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PROG_EXT_HDR_T},\ + {"psamp_0_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_0_T},\ + {"psamp_1_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_1_T},\ + {"psamp_mirror_on_drop_0_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\ + {"psamp_mirror_on_drop_1_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T},\ + {"rarp_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RARP_T},\ + {"routing_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ROUTING_T},\ + {"rspan_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RSPAN_T},\ + {"sflow_shim_0_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_0_T},\ + {"sflow_shim_1_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_1_T},\ + {"sflow_shim_2_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_2_T},\ + {"snap_llc_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SNAP_LLC_T},\ + {"tcp_first_4bytes_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_TCP_FIRST_4BYTES_T},\ + {"tcp_last_16bytes_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_TCP_LAST_16BYTES_T},\ + {"udp_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UDP_T},\ + {"unknown_l3_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UNKNOWN_L3_T},\ + {"unknown_l4_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UNKNOWN_L4_T},\ + {"unknown_l5_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UNKNOWN_L5_T},\ + {"vlan_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VLAN_T},\ + {"vntag_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VNTAG_T},\ + {"vxlan_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VXLAN_T},\ + {"wesp_t", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_WESP_T},\ + {"RXPMD_FLEX_T", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_T},\ + {"flexhdr count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_FLEXHDR_COUNT} + +#endif /* BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_FLEXHDR_H */ diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_32_1_0/bcm56880_a0_nfa_6_5_32_1_0_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_32_1_0/bcm56880_a0_nfa_6_5_32_1_0_bcmpkt_flexhdr_data.h new file mode 100644 index 00000000000..f23883e4d1f --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_32_1_0/bcm56880_a0_nfa_6_5_32_1_0_bcmpkt_flexhdr_data.h @@ -0,0 +1,1152 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) header.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_FLEXHDR_DATA_H +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_FLEXHDR_DATA_H + +/*! + * \name ARP_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ARP_T_HARDWARE_LEN 0 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ARP_T_HARDWARE_TYPE 1 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ARP_T_OPERATION 2 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ARP_T_PROT_ADDR_LEN 3 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ARP_T_PROTOCOL_TYPE 4 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ARP_T_SENDER_HA 5 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ARP_T_SENDER_IP 6 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ARP_T_TARGET_HA 7 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ARP_T_TARGET_IP 8 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ARP_T_FID_COUNT 9 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \ + {"HARDWARE_LEN", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ARP_T_HARDWARE_LEN},\ + {"HARDWARE_TYPE", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ARP_T_HARDWARE_TYPE},\ + {"OPERATION", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ARP_T_OPERATION},\ + {"PROT_ADDR_LEN", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ARP_T_PROT_ADDR_LEN},\ + {"PROTOCOL_TYPE", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ARP_T_PROTOCOL_TYPE},\ + {"SENDER_HA", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ARP_T_SENDER_HA},\ + {"SENDER_IP", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ARP_T_SENDER_IP},\ + {"TARGET_HA", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ARP_T_TARGET_HA},\ + {"TARGET_IP", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ARP_T_TARGET_IP},\ + {"arp_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ARP_T_FID_COUNT} + +/*! + * \name AUTHEN_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_AUTHEN_T_DATA 0 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_AUTHEN_T_NEXT_HEADER 1 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN 2 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_AUTHEN_T_RESERVED 3 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_AUTHEN_T_SEQ_NUM 4 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_AUTHEN_T_SPI 5 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_AUTHEN_T_FID_COUNT 6 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_AUTHEN_T_DATA},\ + {"NEXT_HEADER", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_AUTHEN_T_NEXT_HEADER},\ + {"PAYLOAD_LEN", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN},\ + {"RESERVED", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_AUTHEN_T_RESERVED},\ + {"SEQ_NUM", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_AUTHEN_T_SEQ_NUM},\ + {"SPI", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_AUTHEN_T_SPI},\ + {"authen_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_AUTHEN_T_FID_COUNT} + +/*! + * \name BFD_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_BFD_T_AP 0 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_BFD_T_BFD_LENGTH 1 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_BFD_T_CPI 2 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_BFD_T_DEM 3 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_BFD_T_DESMINTXINTV 4 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_BFD_T_DETECTMULT 5 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_BFD_T_DIAG 6 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_BFD_T_FIN 7 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_BFD_T_MINECHORXINTV 8 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_BFD_T_MPT 9 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_BFD_T_MYDISCRIM 10 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_BFD_T_POLL 11 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_BFD_T_REQMINRXINTV 12 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_BFD_T_STA 13 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_BFD_T_URDISCRIM 14 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_BFD_T_VERSION 15 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_BFD_T_FID_COUNT 16 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT \ + {"AP", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_BFD_T_AP},\ + {"BFD_LENGTH", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_BFD_T_BFD_LENGTH},\ + {"CPI", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_BFD_T_CPI},\ + {"DEM", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_BFD_T_DEM},\ + {"DESMINTXINTV", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_BFD_T_DESMINTXINTV},\ + {"DETECTMULT", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_BFD_T_DETECTMULT},\ + {"DIAG", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_BFD_T_DIAG},\ + {"FIN", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_BFD_T_FIN},\ + {"MINECHORXINTV", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_BFD_T_MINECHORXINTV},\ + {"MPT", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_BFD_T_MPT},\ + {"MYDISCRIM", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_BFD_T_MYDISCRIM},\ + {"POLL", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_BFD_T_POLL},\ + {"REQMINRXINTV", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_BFD_T_REQMINRXINTV},\ + {"STA", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_BFD_T_STA},\ + {"URDISCRIM", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_BFD_T_URDISCRIM},\ + {"VERSION", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_BFD_T_VERSION},\ + {"bfd_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_BFD_T_FID_COUNT} + +/*! + * \name CPU_COMPOSITES_0_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT 7 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \ + {"DMA_CONT0", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\ + {"DMA_CONT1", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\ + {"DMA_CONT2", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\ + {"DMA_CONT3", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\ + {"DMA_CONT4", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\ + {"DMA_CONT5", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\ + {"DMA_CONT6", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\ + {"cpu_composites_0_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT} + +/*! + * \name CPU_COMPOSITES_1_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7 8 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8 9 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9 10 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT 11 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \ + {"DMA_CONT10", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\ + {"DMA_CONT11", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\ + {"DMA_CONT12", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\ + {"DMA_CONT13", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\ + {"DMA_CONT14", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\ + {"DMA_CONT15", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\ + {"DMA_CONT16", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\ + {"DMA_CONT17", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\ + {"DMA_CONT7", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\ + {"DMA_CONT8", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\ + {"DMA_CONT9", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\ + {"cpu_composites_1_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT} + +/*! + * \name DEST_OPTION_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN 0 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER 1 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_DEST_OPTION_T_OPTION 2 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_DEST_OPTION_T_FID_COUNT 3 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER},\ + {"OPTION", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_DEST_OPTION_T_OPTION},\ + {"dest_option_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_DEST_OPTION_T_FID_COUNT} + +/*! + * \name ERSPAN3_FIXED_HDR_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO 0 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS 1 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID 2 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID 4 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T 5 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP 6 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER 7 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN 8 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT 9 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \ + {"BSO", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\ + {"COS", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\ + {"GBP_SID", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\ + {"P_FT_HWID_D_GRA_O", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\ + {"SESSION_ID", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\ + {"T", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\ + {"TIMESTAMP", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\ + {"VER", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\ + {"VLAN", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\ + {"erspan3_fixed_hdr_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT} + +/*! + * \name ERSPAN3_SUBHDR_5_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID 1 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID 2 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP 3 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT 4 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \ + {"PLATFORM_ID", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\ + {"PORT_ID", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\ + {"SWITCH_ID", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\ + {"TIMESTAMP", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\ + {"erspan3_subhdr_5_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT} + +/*! + * \name ESP_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ESP_T_NEXT_HEADER 0 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ESP_T_PAD 1 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ESP_T_PAD_LEN 2 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ESP_T_SEQ_NUM 3 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ESP_T_SPI 4 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ESP_T_FID_COUNT 5 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT \ + {"NEXT_HEADER", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ESP_T_NEXT_HEADER},\ + {"PAD", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ESP_T_PAD},\ + {"PAD_LEN", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ESP_T_PAD_LEN},\ + {"SEQ_NUM", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ESP_T_SEQ_NUM},\ + {"SPI", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ESP_T_SPI},\ + {"esp_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ESP_T_FID_COUNT} + +/*! + * \name ETAG_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ETAG_T_PCP_DEI 0 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ETAG_T_RSRVD0 1 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ETAG_T_RSRVD1 2 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ETAG_T_SVID 3 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ETAG_T_TPID 4 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ETAG_T_VID 5 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ETAG_T_FID_COUNT 6 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT \ + {"PCP_DEI", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ETAG_T_PCP_DEI},\ + {"RSRVD0", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ETAG_T_RSRVD0},\ + {"RSRVD1", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ETAG_T_RSRVD1},\ + {"SVID", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ETAG_T_SVID},\ + {"TPID", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ETAG_T_TPID},\ + {"VID", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ETAG_T_VID},\ + {"etag_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ETAG_T_FID_COUNT} + +/*! + * \name ETHERTYPE_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ETHERTYPE_T_TYPE 0 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ETHERTYPE_T_FID_COUNT 1 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \ + {"TYPE", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ETHERTYPE_T_TYPE},\ + {"ethertype_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ETHERTYPE_T_FID_COUNT} + +/*! + * \name FRAG_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_FRAG_T_FRAG_INFO 0 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_FRAG_T_ID 1 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_FRAG_T_NEXT_HEADER 2 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_FRAG_T_RESERVED 3 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_FRAG_T_FID_COUNT 4 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT \ + {"FRAG_INFO", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_FRAG_T_FRAG_INFO},\ + {"ID", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_FRAG_T_ID},\ + {"NEXT_HEADER", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_FRAG_T_NEXT_HEADER},\ + {"RESERVED", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_FRAG_T_RESERVED},\ + {"frag_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_FRAG_T_FID_COUNT} + +/*! + * \name GENERIC_LOOPBACK_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ 0 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE 1 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ 2 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS 3 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE 4 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY 5 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL 6 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ 7 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0 8 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1 9 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ 10 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1 11 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2 12 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 13 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE 14 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT 15 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \ + {"DESTINATION_OBJ", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\ + {"DESTINATION_TYPE", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\ + {"ENTROPY_OBJ", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\ + {"FLAGS", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\ + {"HEADER_TYPE", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\ + {"INPUT_PRIORITY", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\ + {"INTERFACE_CTRL", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\ + {"INTERFACE_OBJ", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\ + {"PROCESSING_CTRL_0", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\ + {"PROCESSING_CTRL_1", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\ + {"QOS_OBJ", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\ + {"RESERVED_1", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\ + {"RESERVED_2", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2},\ + {"SOURCE_SYSTEM_PORT", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\ + {"START_BYTE", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\ + {"generic_loopback_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT} + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP 0 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF 1 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED 2 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP 3 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP 4 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP 5 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP 6 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP 7 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1 8 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__TUNNEL 0 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__GENERIC 1 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__NOOP 0 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__VFI 1 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__L3_IIF 2 + +/*! + * \name GPE_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GPE_T_FLAGS 0 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GPE_T_NEXT_PROTOCOL 1 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GPE_T_RESERVED0 2 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GPE_T_RESERVED1 3 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GPE_T_VNI 4 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GPE_T_FID_COUNT 5 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT \ + {"FLAGS", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GPE_T_FLAGS},\ + {"NEXT_PROTOCOL", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GPE_T_NEXT_PROTOCOL},\ + {"RESERVED0", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GPE_T_RESERVED0},\ + {"RESERVED1", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GPE_T_RESERVED1},\ + {"VNI", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GPE_T_VNI},\ + {"gpe_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GPE_T_FID_COUNT} + +/*! + * \name GRE_CHKSUM_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM 0 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_CHKSUM_T_OFFSET 1 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT 2 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM},\ + {"OFFSET", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_CHKSUM_T_OFFSET},\ + {"gre_chksum_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT} + +/*! + * \name GRE_KEY_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_KEY_T_VN_ID_LOWER_ENTROPY 0 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_KEY_T_VN_ID_UPPER 1 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_KEY_T_FID_COUNT 2 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT \ + {"VN_ID_LOWER_ENTROPY", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_KEY_T_VN_ID_LOWER_ENTROPY},\ + {"VN_ID_UPPER", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_KEY_T_VN_ID_UPPER},\ + {"gre_key_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_KEY_T_FID_COUNT} + +/*! + * \name GRE_ROUT_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_ROUT_T_ROUTING 0 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_ROUT_T_FID_COUNT 1 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT \ + {"ROUTING", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_ROUT_T_ROUTING},\ + {"gre_rout_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_ROUT_T_FID_COUNT} + +/*! + * \name GRE_SEQ_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_SEQ_T_SEQUENCE 0 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_SEQ_T_FID_COUNT 1 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT \ + {"SEQUENCE", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_SEQ_T_SEQUENCE},\ + {"gre_seq_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_SEQ_T_FID_COUNT} + +/*! + * \name GRE_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_T_C_R_K_S 0 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_T_PROTOCOL 1 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_T_RESERVED 2 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_T_VERSION 3 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_T_FID_COUNT 4 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT \ + {"C_R_K_S", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_T_C_R_K_S},\ + {"PROTOCOL", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_T_PROTOCOL},\ + {"RESERVED", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_T_RESERVED},\ + {"VERSION", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_T_VERSION},\ + {"gre_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_T_FID_COUNT} + +/*! + * \name GTP_12BYTE_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_12BYTE_T_BYTES_11_8 0 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_12BYTE_T_BYTES_3_0 1 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_12BYTE_T_BYTES_7_4 2 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_12BYTE_T_FID_COUNT 3 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_12BYTE_T_FIELD_NAME_MAP_INIT \ + {"BYTES_11_8", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_12BYTE_T_BYTES_11_8},\ + {"BYTES_3_0", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_12BYTE_T_BYTES_3_0},\ + {"BYTES_7_4", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_12BYTE_T_BYTES_7_4},\ + {"gtp_12byte_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_12BYTE_T_FID_COUNT} + +/*! + * \name GTP_8BYTE_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_8BYTE_T_BYTES_3_0 0 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_8BYTE_T_BYTES_7_4 1 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_8BYTE_T_FID_COUNT 2 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_8BYTE_T_FIELD_NAME_MAP_INIT \ + {"BYTES_3_0", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_8BYTE_T_BYTES_3_0},\ + {"BYTES_7_4", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_8BYTE_T_BYTES_7_4},\ + {"gtp_8byte_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_8BYTE_T_FID_COUNT} + +/*! + * \name GTP_EXT_4BYTE_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_EXT_4BYTE_T_EXT_HDR 0 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_EXT_4BYTE_T_FID_COUNT 1 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_EXT_4BYTE_T_FIELD_NAME_MAP_INIT \ + {"EXT_HDR", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_EXT_4BYTE_T_EXT_HDR},\ + {"gtp_ext_4byte_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_EXT_4BYTE_T_FID_COUNT} + +/*! + * \name GTP_WITH_EXT_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_WITH_EXT_T_BYTES_11_8 0 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_WITH_EXT_T_BYTES_3_0 1 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_WITH_EXT_T_BYTES_7_4 2 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_WITH_EXT_T_FID_COUNT 3 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_WITH_EXT_T_FIELD_NAME_MAP_INIT \ + {"BYTES_11_8", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_WITH_EXT_T_BYTES_11_8},\ + {"BYTES_3_0", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_WITH_EXT_T_BYTES_3_0},\ + {"BYTES_7_4", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_WITH_EXT_T_BYTES_7_4},\ + {"gtp_with_ext_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_WITH_EXT_T_FID_COUNT} + +/*! + * \name HOP_BY_HOP_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN 0 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER 1 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_HOP_BY_HOP_T_OPTION 2 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT 3 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER},\ + {"OPTION", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_HOP_BY_HOP_T_OPTION},\ + {"hop_by_hop_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT} + +/*! + * \name ICMP_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ICMP_T_CHECKSUM 0 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ICMP_T_CODE 1 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ICMP_T_ICMP_TYPE 2 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ICMP_T_FID_COUNT 3 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ICMP_T_CHECKSUM},\ + {"CODE", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ICMP_T_CODE},\ + {"ICMP_TYPE", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ICMP_T_ICMP_TYPE},\ + {"icmp_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ICMP_T_FID_COUNT} + +/*! + * \name IGMP_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IGMP_T_CHECKSUM 0 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IGMP_T_GROUP_ADDRESS 1 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IGMP_T_IGMP_TYPE 2 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IGMP_T_MAX_RESP_TIME 3 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IGMP_T_FID_COUNT 4 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IGMP_T_CHECKSUM},\ + {"GROUP_ADDRESS", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IGMP_T_GROUP_ADDRESS},\ + {"IGMP_TYPE", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IGMP_T_IGMP_TYPE},\ + {"MAX_RESP_TIME", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IGMP_T_MAX_RESP_TIME},\ + {"igmp_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IGMP_T_FID_COUNT} + +/*! + * \name IPFIX_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPFIX_T_EXPORT_TIME 0 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPFIX_T_LENGTH 1 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPFIX_T_SEQUENCE_NUM 3 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPFIX_T_VERSION 4 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPFIX_T_FID_COUNT 5 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \ + {"EXPORT_TIME", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPFIX_T_EXPORT_TIME},\ + {"LENGTH", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPFIX_T_LENGTH},\ + {"OBS_DOMAIN_ID", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\ + {"SEQUENCE_NUM", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPFIX_T_SEQUENCE_NUM},\ + {"VERSION", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPFIX_T_VERSION},\ + {"ipfix_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPFIX_T_FID_COUNT} + +/*! + * \name IPV4_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV4_T_DA 0 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV4_T_HDR_CHECKSUM 2 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV4_T_ID 3 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV4_T_OPTION 4 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV4_T_PROTOCOL 5 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV4_T_SA 6 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV4_T_TOS 7 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV4_T_TOTAL_LENGTH 8 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV4_T_TTL 9 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV4_T_VERSION_HDR_LEN 10 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV4_T_FID_COUNT 11 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \ + {"DA", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV4_T_DA},\ + {"FLAGS_FRAG_OFFSET", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\ + {"HDR_CHECKSUM", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV4_T_HDR_CHECKSUM},\ + {"ID", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV4_T_ID},\ + {"OPTION", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV4_T_OPTION},\ + {"PROTOCOL", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV4_T_PROTOCOL},\ + {"SA", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV4_T_SA},\ + {"TOS", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV4_T_TOS},\ + {"TOTAL_LENGTH", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV4_T_TOTAL_LENGTH},\ + {"TTL", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV4_T_TTL},\ + {"VERSION_HDR_LEN", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV4_T_VERSION_HDR_LEN},\ + {"ipv4_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV4_T_FID_COUNT} + +/*! + * \name IPV6_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV6_T_DA 0 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV6_T_FLOW_LABEL 1 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV6_T_HOP_LIMIT 2 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV6_T_NEXT_HEADER 3 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV6_T_SA 5 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV6_T_TRAFFIC_CLASS 6 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV6_T_VERSION 7 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV6_T_FID_COUNT 8 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \ + {"DA", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV6_T_DA},\ + {"FLOW_LABEL", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV6_T_FLOW_LABEL},\ + {"HOP_LIMIT", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV6_T_HOP_LIMIT},\ + {"NEXT_HEADER", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV6_T_NEXT_HEADER},\ + {"PAYLOAD_LENGTH", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\ + {"SA", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV6_T_SA},\ + {"TRAFFIC_CLASS", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV6_T_TRAFFIC_CLASS},\ + {"VERSION", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV6_T_VERSION},\ + {"ipv6_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV6_T_FID_COUNT} + +/*! + * \name L2_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_L2_T_MACDA 0 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_L2_T_MACSA 1 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_L2_T_FID_COUNT 2 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \ + {"MACDA", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_L2_T_MACDA},\ + {"MACSA", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_L2_T_MACSA},\ + {"l2_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_L2_T_FID_COUNT} + +/*! + * \name MIRROR_ERSPAN_SN_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT 1 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \ + {"SEQ_NUM", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\ + {"mirror_erspan_sn_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT} + +/*! + * \name MIRROR_TRANSPORT_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MIRROR_TRANSPORT_T_DATA 0 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT 1 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MIRROR_TRANSPORT_T_DATA},\ + {"mirror_transport_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT} + +/*! + * \name MPLS_ACH_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE 0 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_ACH_T_CW_TYPE 1 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_ACH_T_RESERVED 2 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_ACH_T_VERSION 3 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_ACH_T_FID_COUNT 4 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT \ + {"CHANNEL_TYPE", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE},\ + {"CW_TYPE", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_ACH_T_CW_TYPE},\ + {"RESERVED", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_ACH_T_RESERVED},\ + {"VERSION", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_ACH_T_VERSION},\ + {"mpls_ach_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_ACH_T_FID_COUNT} + +/*! + * \name MPLS_BV_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_BV_T_VALUE 0 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_BV_T_FID_COUNT 1 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT \ + {"VALUE", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_BV_T_VALUE},\ + {"mpls_bv_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_BV_T_FID_COUNT} + +/*! + * \name MPLS_CW_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_CW_T_CW_TYPE 0 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_CW_T_RESERVED 1 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER 2 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_CW_T_FID_COUNT 3 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT \ + {"CW_TYPE", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_CW_T_CW_TYPE},\ + {"RESERVED", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_CW_T_RESERVED},\ + {"SEQ_NUMBER", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER},\ + {"mpls_cw_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_CW_T_FID_COUNT} + +/*! + * \name MPLS_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_T_BOS 0 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_T_EXP 1 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_T_LABEL 2 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_T_TTL 3 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_T_FID_COUNT 4 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT \ + {"BOS", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_T_BOS},\ + {"EXP", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_T_EXP},\ + {"LABEL", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_T_LABEL},\ + {"TTL", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_T_TTL},\ + {"mpls_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_T_FID_COUNT} + +/*! + * \name OPAQUETAG_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_OPAQUETAG_T_TPID 0 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_OPAQUETAG_T_VLAN_TAG 1 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_OPAQUETAG_T_FID_COUNT 2 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_OPAQUETAG_T_FIELD_NAME_MAP_INIT \ + {"TPID", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_OPAQUETAG_T_TPID},\ + {"VLAN_TAG", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_OPAQUETAG_T_VLAN_TAG},\ + {"opaquetag_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_OPAQUETAG_T_FID_COUNT} + +/*! + * \name P_1588_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_P_1588_T_CNTRL 0 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_P_1588_T_CORRECTION 1 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_P_1588_T_DOMAIN_NB 2 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_P_1588_T_FLAGS 3 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_P_1588_T_LOGMSGINTERVAL 4 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_P_1588_T_MSG_LENGTH 5 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_P_1588_T_MSG_TYPE 6 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_P_1588_T_RESERVED1 7 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_P_1588_T_RESERVED2 8 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_P_1588_T_RESERVED3 9 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_P_1588_T_SEQ_ID 10 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_P_1588_T_SRCPORTID 11 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_P_1588_T_TRANSPORTSPEC 12 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_P_1588_T_VERSION 13 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_P_1588_T_FID_COUNT 14 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT \ + {"CNTRL", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_P_1588_T_CNTRL},\ + {"CORRECTION", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_P_1588_T_CORRECTION},\ + {"DOMAIN_NB", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_P_1588_T_DOMAIN_NB},\ + {"FLAGS", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_P_1588_T_FLAGS},\ + {"LOGMSGINTERVAL", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_P_1588_T_LOGMSGINTERVAL},\ + {"MSG_LENGTH", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_P_1588_T_MSG_LENGTH},\ + {"MSG_TYPE", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_P_1588_T_MSG_TYPE},\ + {"RESERVED1", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_P_1588_T_RESERVED1},\ + {"RESERVED2", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_P_1588_T_RESERVED2},\ + {"RESERVED3", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_P_1588_T_RESERVED3},\ + {"SEQ_ID", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_P_1588_T_SEQ_ID},\ + {"SRCPORTID", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_P_1588_T_SRCPORTID},\ + {"TRANSPORTSPEC", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_P_1588_T_TRANSPORTSPEC},\ + {"VERSION", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_P_1588_T_VERSION},\ + {"p_1588_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_P_1588_T_FID_COUNT} + +/*! + * \name PROG_EXT_HDR_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN 0 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER 1 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PROG_EXT_HDR_T_OPTION 2 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT 3 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER},\ + {"OPTION", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PROG_EXT_HDR_T_OPTION},\ + {"prog_ext_hdr_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT} + +/*! + * \name PSAMP_0_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_0_T_FLOWSET 0 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_0_T_LENGTH 1 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX 2 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS 3 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_0_T_OBS_TIME_S 4 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID 5 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_0_T_FID_COUNT 6 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT \ + {"FLOWSET", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_0_T_FLOWSET},\ + {"LENGTH", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_0_T_LENGTH},\ + {"NEXT_HOP_INDEX", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX},\ + {"OBS_TIME_NS", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS},\ + {"OBS_TIME_S", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_0_T_OBS_TIME_S},\ + {"TEMPLATE_ID", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID},\ + {"psamp_0_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_0_T_FID_COUNT} + +/*! + * \name PSAMP_1_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_1_T_DLB_ID 0 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_1_T_EGRESS_PORT 1 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_1_T_EPOCH 2 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_1_T_INGRESS_PORT 3 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH 4 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_1_T_USER_META_DATA 5 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG 6 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_1_T_FID_COUNT 7 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT \ + {"DLB_ID", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_1_T_DLB_ID},\ + {"EGRESS_PORT", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_1_T_EGRESS_PORT},\ + {"EPOCH", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_1_T_EPOCH},\ + {"INGRESS_PORT", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_1_T_INGRESS_PORT},\ + {"SAMPLED_LENGTH", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH},\ + {"USER_META_DATA", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_1_T_USER_META_DATA},\ + {"VARIABLE_FLAG", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG},\ + {"psamp_1_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_1_T_FID_COUNT} + +/*! + * \name PSAMP_MIRROR_ON_DROP_0_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT 1 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH 2 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS 3 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S 4 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID 5 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID 6 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT 7 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \ + {"EGRESS_MOD_PORT", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\ + {"INGRESS_PORT", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\ + {"LENGTH", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\ + {"OBS_TIME_NS", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\ + {"OBS_TIME_S", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\ + {"SWITCH_ID", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\ + {"TEMPLATE_ID", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\ + {"psamp_mirror_on_drop_0_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT} + +/*! + * \name PSAMP_MIRROR_ON_DROP_1_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_ING_DROP_REASON 0 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MIRROR_ON_DROP_OBJ 1 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MMU_DROP_CTRL 2 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_SAMPLED_LENGTH 3 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_USER_META_DATA 4 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_VAR_LEN_INDICATOR 5 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT 6 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FIELD_NAME_MAP_INIT \ + {"ING_DROP_REASON", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_ING_DROP_REASON},\ + {"MIRROR_ON_DROP_OBJ", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MIRROR_ON_DROP_OBJ},\ + {"MMU_DROP_CTRL", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MMU_DROP_CTRL},\ + {"SAMPLED_LENGTH", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_SAMPLED_LENGTH},\ + {"USER_META_DATA", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_USER_META_DATA},\ + {"VAR_LEN_INDICATOR", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_VAR_LEN_INDICATOR},\ + {"psamp_mirror_on_drop_1_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT} + +/*! + * \name RARP_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RARP_T_HARDWARE_LEN 0 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RARP_T_HARDWARE_TYPE 1 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RARP_T_OPERATION 2 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RARP_T_PROT_ADDR_LEN 3 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RARP_T_PROTOCOL_TYPE 4 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RARP_T_SENDER_HA 5 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RARP_T_SENDER_IP 6 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RARP_T_TARGET_HA 7 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RARP_T_TARGET_IP 8 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RARP_T_FID_COUNT 9 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \ + {"HARDWARE_LEN", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RARP_T_HARDWARE_LEN},\ + {"HARDWARE_TYPE", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RARP_T_HARDWARE_TYPE},\ + {"OPERATION", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RARP_T_OPERATION},\ + {"PROT_ADDR_LEN", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RARP_T_PROT_ADDR_LEN},\ + {"PROTOCOL_TYPE", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RARP_T_PROTOCOL_TYPE},\ + {"SENDER_HA", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RARP_T_SENDER_HA},\ + {"SENDER_IP", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RARP_T_SENDER_IP},\ + {"TARGET_HA", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RARP_T_TARGET_HA},\ + {"TARGET_IP", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RARP_T_TARGET_IP},\ + {"rarp_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RARP_T_FID_COUNT} + +/*! + * \name ROUTING_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ROUTING_T_DATA 0 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ROUTING_T_HDR_EXT_LEN 1 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ROUTING_T_NEXT_HEADER 2 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ROUTING_T_ROUTING_TYPE 3 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT 4 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ROUTING_T_FID_COUNT 5 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ROUTING_T_DATA},\ + {"HDR_EXT_LEN", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ROUTING_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ROUTING_T_NEXT_HEADER},\ + {"ROUTING_TYPE", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ROUTING_T_ROUTING_TYPE},\ + {"SEGMENTS_LEFT", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT},\ + {"routing_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ROUTING_T_FID_COUNT} + +/*! + * \name RSPAN_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RSPAN_T_TAG 0 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RSPAN_T_TPID 1 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RSPAN_T_FID_COUNT 2 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT \ + {"TAG", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RSPAN_T_TAG},\ + {"TPID", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RSPAN_T_TPID},\ + {"rspan_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RSPAN_T_FID_COUNT} + +/*! + * \name SFLOW_SHIM_0_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION 0 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE 1 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_0_T_VERSION 2 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT 3 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT \ + {"SYS_DESTINATION", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION},\ + {"SYS_SOURCE", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE},\ + {"VERSION", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_0_T_VERSION},\ + {"sflow_shim_0_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT} + +/*! + * \name SFLOW_SHIM_1_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE 0 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED 1 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE 2 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST 3 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE 4 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED 5 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED 6 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE 7 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT 8 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT \ + {"FLAG_DEST_SAMPLE", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE},\ + {"FLAG_DISCARDED", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED},\ + {"FLAG_FLEX_SAMPLE", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE},\ + {"FLAG_MCAST", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST},\ + {"FLAG_SRC_SAMPLE", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE},\ + {"FLAG_TRUNCATED", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED},\ + {"RESERVED", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED},\ + {"SYS_OPCODE", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE},\ + {"sflow_shim_1_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT} + +/*! + * \name SFLOW_SHIM_2_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM 0 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA 1 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT 2 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT \ + {"SEQUENCE_NUM", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM},\ + {"USER_META_DATA", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA},\ + {"sflow_shim_2_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT} + +/*! + * \name SNAP_LLC_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SNAP_LLC_T_LENGTH 0 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SNAP_LLC_T_SNAP_LLC 1 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SNAP_LLC_T_FID_COUNT 2 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT \ + {"LENGTH", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SNAP_LLC_T_LENGTH},\ + {"SNAP_LLC", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SNAP_LLC_T_SNAP_LLC},\ + {"snap_llc_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SNAP_LLC_T_FID_COUNT} + +/*! + * \name TCP_FIRST_4BYTES_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT 2 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \ + {"DST_PORT", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\ + {"SRC_PORT", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\ + {"tcp_first_4bytes_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT} + +/*! + * \name TCP_LAST_16BYTES_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM 0 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM 1 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM 3 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR 4 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE 5 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT 6 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \ + {"ACK_NUM", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\ + {"CHECKSUM", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\ + {"HDR_LEN_AND_FLAGS", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\ + {"SEQ_NUM", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\ + {"URGENT_PTR", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\ + {"WIN_SIZE", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\ + {"tcp_last_16bytes_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT} + +/*! + * \name UDP_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UDP_T_CHECKSUM 0 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UDP_T_DST_PORT 1 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UDP_T_SRC_PORT 2 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UDP_T_UDP_LENGTH 3 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UDP_T_FID_COUNT 4 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UDP_T_CHECKSUM},\ + {"DST_PORT", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UDP_T_DST_PORT},\ + {"SRC_PORT", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UDP_T_SRC_PORT},\ + {"UDP_LENGTH", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UDP_T_UDP_LENGTH},\ + {"udp_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UDP_T_FID_COUNT} + +/*! + * \name UNKNOWN_L3_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD 1 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT 2 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \ + {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\ + {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\ + {"unknown_l3_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT} + +/*! + * \name UNKNOWN_L4_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT 1 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \ + {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\ + {"unknown_l4_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT} + +/*! + * \name UNKNOWN_L5_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT 3 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \ + {"L5_BYTES_0_1", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\ + {"L5_BYTES_2_3", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\ + {"L5_BYTES_4_7", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\ + {"unknown_l5_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT} + +/*! + * \name VLAN_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VLAN_T_CFI 0 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VLAN_T_PCP 1 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VLAN_T_TPID 2 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VLAN_T_VID 3 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VLAN_T_FID_COUNT 4 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \ + {"CFI", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VLAN_T_CFI},\ + {"PCP", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VLAN_T_PCP},\ + {"TPID", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VLAN_T_TPID},\ + {"VID", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VLAN_T_VID},\ + {"vlan_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VLAN_T_FID_COUNT} + +/*! + * \name VNTAG_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VNTAG_T_TAG 0 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VNTAG_T_TPID 1 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VNTAG_T_FID_COUNT 2 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT \ + {"TAG", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VNTAG_T_TAG},\ + {"TPID", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VNTAG_T_TPID},\ + {"vntag_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VNTAG_T_FID_COUNT} + +/*! + * \name VXLAN_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VXLAN_T_VN_ID_LOWER_RESERVED2 1 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VXLAN_T_VN_ID_UPPER 2 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VXLAN_T_FID_COUNT 3 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \ + {"FLAGS_RESERVED_1", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\ + {"VN_ID_LOWER_RESERVED2", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VXLAN_T_VN_ID_LOWER_RESERVED2},\ + {"VN_ID_UPPER", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VXLAN_T_VN_ID_UPPER},\ + {"vxlan_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VXLAN_T_FID_COUNT} + +/*! + * \name WESP_T field IDs. + */ +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_WESP_T_FLAGS 0 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_WESP_T_HEADER_LEN 1 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_WESP_T_NEXT_HEADER 2 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_WESP_T_SEQ_NUM 3 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_WESP_T_SPI 4 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_WESP_T_TRAILER_LEN 5 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_WESP_T_WESP_IV 6 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_WESP_T_FID_COUNT 7 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT \ + {"FLAGS", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_WESP_T_FLAGS},\ + {"HEADER_LEN", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_WESP_T_HEADER_LEN},\ + {"NEXT_HEADER", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_WESP_T_NEXT_HEADER},\ + {"SEQ_NUM", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_WESP_T_SEQ_NUM},\ + {"SPI", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_WESP_T_SPI},\ + {"TRAILER_LEN", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_WESP_T_TRAILER_LEN},\ + {"WESP_IV", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_WESP_T_WESP_IV},\ + {"wesp_t fid count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_WESP_T_FID_COUNT} + + +#endif /* BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_FLEXHDR_DATA_H */ diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_32_1_0/bcm56880_a0_nfa_6_5_32_1_0_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_32_1_0/bcm56880_a0_nfa_6_5_32_1_0_bcmpkt_rxpmd_flex_data.h new file mode 100644 index 00000000000..3721c3e4588 --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_32_1_0/bcm56880_a0_nfa_6_5_32_1_0_bcmpkt_rxpmd_flex_data.h @@ -0,0 +1,173 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) map.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_DATA_H +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_DATA_H + +/*! + * \name RX flex metadata field IDs. + */ +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0 0 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0 1 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_DVP_15_0 2 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0 3 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0 4 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_0 5 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32 6 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0 7 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0 8 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_ING_ETAG_ACTION_3_0 9 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_ING_ETAG_PCP_DEI_3_0 10 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_ING_ETAG_VID_16_15_0 11 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_0 12 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0 13 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 14 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0 15 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0 16 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0 17 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0 18 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0 19 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0 20 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_MPLS_LABEL_DECAP_COUNT_3_0 21 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0 22 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0 23 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0 24 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0 25 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_SVP_15_0 26 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0 27 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0 28 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0 29 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_T_VLAN_TAG_VALUE_15_0 30 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0 31 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0 32 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_VFI_15_0 33 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0 34 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_FID_COUNT 35 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_COUNT 46 + +/*! + * \name Packet Flex Reason Types. + */ +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS 0 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED 1 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED 2 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP 3 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT 4 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_IFP 5 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER 6 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED 7 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT 8 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP 9 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS 10 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD 11 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE 12 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP 13 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS 14 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR 15 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF 16 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR 17 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL 18 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD 19 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0 20 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1 21 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2 22 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3 23 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4 24 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5 25 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6 26 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7 27 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED 28 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED 29 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED 30 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU 31 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU 32 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_PE_RPF 33 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_PE_VID_FWD_MISS 34 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_PE_VID_RPF_MISS 35 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_PKT_ETAG_EXPECTED 36 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_PKT_ETAG_UNEXPECTED 37 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED 38 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT 39 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP 40 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD 41 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_SVP 42 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP 43 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED 44 +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_VFP 45 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \ + {"CML_FLAGS", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\ + {"DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED},\ + {"DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED},\ + {"DST_FP", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP},\ + {"EM_FT", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT},\ + {"IFP", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_IFP},\ + {"IFP_METER", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\ + {"IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED},\ + {"IVXLT", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\ + {"L2_DST_LOOKUP", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\ + {"L2_DST_LOOKUP_MISS", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\ + {"L2_SRC_DISCARD", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD},\ + {"L2_SRC_STATIC_MOVE", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\ + {"L3_DST_LOOKUP", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\ + {"L3_DST_LOOKUP_MISS", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\ + {"L3_HDR_ERROR", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\ + {"L3_IIF_EQ_L3_OIF", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF},\ + {"L3_TTL_ERROR", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\ + {"LEARN_CACHE_FULL", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\ + {"MACSA_MULTICAST_RSVD", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD},\ + {"MATCHED_RULE_BIT_0", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0},\ + {"MATCHED_RULE_BIT_1", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1},\ + {"MATCHED_RULE_BIT_2", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2},\ + {"MATCHED_RULE_BIT_3", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3},\ + {"MATCHED_RULE_BIT_4", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4},\ + {"MATCHED_RULE_BIT_5", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5},\ + {"MATCHED_RULE_BIT_6", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6},\ + {"MATCHED_RULE_BIT_7", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7},\ + {"MEMBERSHIP_CHECK_FAILED", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED},\ + {"MIRROR_SAMPLER_EGR_SAMPLED", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED},\ + {"MIRROR_SAMPLER_SAMPLED", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED},\ + {"MPLS_CTRL_PKT_TO_CPU", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU},\ + {"NO_COPY_TO_CPU", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\ + {"PE_RPF", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_PE_RPF},\ + {"PE_VID_FWD_MISS", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_PE_VID_FWD_MISS},\ + {"PE_VID_RPF_MISS", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_PE_VID_RPF_MISS},\ + {"PKT_ETAG_EXPECTED", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_PKT_ETAG_EXPECTED},\ + {"PKT_ETAG_UNEXPECTED", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_PKT_ETAG_UNEXPECTED},\ + {"PKT_INTEGRITY_CHECK_FAILED", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\ + {"PROTOCOL_PKT", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\ + {"SER_DROP", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP},\ + {"SPANNING_TREE_CHECK_FAILED_RSVD", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD},\ + {"SVP", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_SVP},\ + {"TRACE_DOP", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\ + {"URPF_CHECK_FAILED", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED},\ + {"VFP", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_VFP},\ + {"flex reason count", BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_COUNT} + +#endif /* BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_DATA_H */ diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_32_1_0/bcm56880_a0_nfa_6_5_32_1_0_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_32_1_0/bcm56880_a0_nfa_6_5_32_1_0_bcmpkt_rxpmd_match_id_defs.h new file mode 100644 index 00000000000..6916347483d --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_32_1_0/bcm56880_a0_nfa_6_5_32_1_0_bcmpkt_rxpmd_match_id_defs.h @@ -0,0 +1,427 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) bcm56880_a0_nfa_6_5_32_1_0_sf_match_id_info.yml + * for device bcm56880_a0 and variant nfa_6_5_32_1_0. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H + +#include + +/*! + * \brief Get the Match ID DataBase information. + * + * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information. +*/ +extern bcmpkt_rxpmd_match_id_db_info_t * + bcm56880_a0_nfa_6_5_32_1_0_rxpmd_match_id_db_info_get(void); + +/*! + * \brief Get the Match ID Mapping information. + * + * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information. +*/ +extern bcmpkt_rxpmd_match_id_map_info_t * + bcm56880_a0_nfa_6_5_32_1_0_rxpmd_match_id_map_info_get(void); + +/*! + \name RXPMD Match IDs +*/ +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG 0 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG 1 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 2 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE 3 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OPAQUETAG 4 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG 5 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_RSPAN 6 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC 7 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG 8 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP 9 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 10 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 11 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD 12 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT 13 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE 14 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 15 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 16 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE 17 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE 18 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM 19 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY 20 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT 21 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ 22 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_12BYTE 23 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_8BYTE 24 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_EXT_4BYTE 25 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_WITH_EXT 26 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP 27 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP 28 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 29 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 30 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 31 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 32 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 33 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 34 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 35 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 36 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 37 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH 38 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW 39 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE 40 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 41 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP 42 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES 43 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES 44 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP 45 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 46 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 47 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 48 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN 49 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK 50 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE 51 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG 52 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG 53 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 54 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE 55 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OPAQUETAG 56 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG 57 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_RSPAN 58 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC 59 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG 60 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP 61 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 62 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 63 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD 64 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT 65 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE 66 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 67 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 68 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE 69 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE 70 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM 71 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY 72 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT 73 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ 74 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_12BYTE 75 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_8BYTE 76 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_EXT_4BYTE 77 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_WITH_EXT 78 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP 79 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP 80 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 81 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 82 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 83 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 84 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 85 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 86 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 87 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 88 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 89 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH 90 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW 91 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE 92 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 93 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP 94 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES 95 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES 96 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP 97 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 98 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 99 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 100 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN 101 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG 102 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG 103 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 104 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE 105 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OPAQUETAG 106 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG 107 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_RSPAN 108 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC 109 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG 110 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP 111 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 112 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 113 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD 114 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT 115 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE 116 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 117 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 118 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP 119 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP 120 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 121 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 122 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE 123 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 124 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP 125 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES 126 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES 127 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP 128 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 129 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 130 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 131 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG 132 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG 133 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 134 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE 135 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OPAQUETAG 136 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG 137 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_RSPAN 138 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC 139 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG 140 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP 141 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 142 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 143 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD 144 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT 145 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE 146 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 147 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 148 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE 149 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE 150 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM 151 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY 152 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT 153 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ 154 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_12BYTE 155 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_8BYTE 156 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_EXT_4BYTE 157 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_WITH_EXT 158 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP 159 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP 160 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 161 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 162 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 163 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 164 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 165 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 166 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 167 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 168 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 169 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH 170 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW 171 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE 172 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 173 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP 174 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES 175 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES 176 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP 177 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 178 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 179 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 180 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN 181 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK 182 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE 183 +#define BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_COUNT 184 + +#define BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \ + {"EGRESS_PKT_FWD_L2_HDR_ETAG", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \ + {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \ + {"EGRESS_PKT_FWD_L2_HDR_OPAQUETAG", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OPAQUETAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_RSPAN", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_RSPAN}, \ + {"EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC}, \ + {"EGRESS_PKT_FWD_L2_HDR_VNTAG", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_BFD", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GPE", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GTP_12BYTE", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_12BYTE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GTP_8BYTE", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_8BYTE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GTP_EXT_4BYTE", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_EXT_4BYTE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GTP_WITH_EXT", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_WITH_EXT}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IGMP", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_P_1588", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \ + {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \ + {"EGRESS_PKT_SYS_HDR_NONE", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_ETAG", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_OPAQUETAG", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OPAQUETAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_RSPAN", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_RSPAN}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_VNTAG", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_12BYTE", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_12BYTE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_8BYTE", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_8BYTE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_EXT_4BYTE", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_EXT_4BYTE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_WITH_EXT", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_WITH_EXT}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \ + {"INGRESS_PKT_INNER_L2_HDR_ETAG", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \ + {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \ + {"INGRESS_PKT_INNER_L2_HDR_OPAQUETAG", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OPAQUETAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_RSPAN", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_RSPAN}, \ + {"INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC}, \ + {"INGRESS_PKT_INNER_L2_HDR_VNTAG", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_BFD", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IGMP", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_P_1588", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \ + {"INGRESS_PKT_OUTER_L2_HDR_ETAG", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \ + {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \ + {"INGRESS_PKT_OUTER_L2_HDR_OPAQUETAG", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OPAQUETAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_RSPAN", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_RSPAN}, \ + {"INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC}, \ + {"INGRESS_PKT_OUTER_L2_HDR_VNTAG", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_BFD", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GPE", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GTP_12BYTE", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_12BYTE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GTP_8BYTE", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_8BYTE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GTP_EXT_4BYTE", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_EXT_4BYTE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GTP_WITH_EXT", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_WITH_EXT}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \ + {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \ + {"INGRESS_PKT_SYS_HDR_NONE", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \ + {"rxpmd_match_id_count", BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_COUNT} + +#endif /*! BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H */ diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_32_3_0/bcm56890_a0_cna_6_5_32_3_0_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_32_3_0/bcm56890_a0_cna_6_5_32_3_0_bcmpkt_flexhdr.h new file mode 100644 index 00000000000..d9cbb66ff69 --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_32_3_0/bcm56890_a0_cna_6_5_32_3_0_bcmpkt_flexhdr.h @@ -0,0 +1,94 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) header.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_FLEXHDR_H +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_FLEXHDR_H + +#include + +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T 0 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T 1 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T 2 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T 3 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T 4 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T 5 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ETHERTYPE_T 6 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T 7 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T 8 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T 9 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T 10 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T 11 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_L2_T 12 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_ERSPAN_SN_T 13 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_TRANSPORT_T 14 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T 15 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T 16 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T 17 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T 18 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T 19 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T 20 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T 21 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L4_T 22 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T 23 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T 24 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T 25 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_T 26 + +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_FLEXHDR_COUNT 27 + +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_FLEXHDR_NAME_MAP_INIT \ + {"arp_t", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T},\ + {"cpu_composites_0_t", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T},\ + {"cpu_composites_1_t", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T},\ + {"ep_nih_header_t", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T},\ + {"erspan3_fixed_hdr_t", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T},\ + {"erspan3_subhdr_5_t", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T},\ + {"ethertype_t", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ETHERTYPE_T},\ + {"generic_loopback_t", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T},\ + {"icmp_t", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T},\ + {"ipfix_t", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T},\ + {"ipv4_t", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T},\ + {"ipv6_t", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T},\ + {"l2_t", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_L2_T},\ + {"mirror_erspan_sn_t", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_ERSPAN_SN_T},\ + {"mirror_transport_t", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_TRANSPORT_T},\ + {"psamp_mirror_on_drop_0_t", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\ + {"psamp_mirror_on_drop_3_t", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T},\ + {"rarp_t", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T},\ + {"tcp_first_4bytes_t", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T},\ + {"tcp_last_16bytes_t", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T},\ + {"udp_t", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T},\ + {"unknown_l3_t", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T},\ + {"unknown_l4_t", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L4_T},\ + {"unknown_l5_t", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T},\ + {"vlan_t", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T},\ + {"vxlan_t", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T},\ + {"RXPMD_FLEX_T", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_T},\ + {"flexhdr count", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_FLEXHDR_COUNT} + +#endif /* BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_FLEXHDR_H */ diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_32_3_0/bcm56890_a0_cna_6_5_32_3_0_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_32_3_0/bcm56890_a0_cna_6_5_32_3_0_bcmpkt_flexhdr_data.h new file mode 100644 index 00000000000..1643a163338 --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_32_3_0/bcm56890_a0_cna_6_5_32_3_0_bcmpkt_flexhdr_data.h @@ -0,0 +1,573 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) header.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_FLEXHDR_DATA_H +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_FLEXHDR_DATA_H + +/*! + * \name ARP_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_HARDWARE_LEN 0 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_HARDWARE_TYPE 1 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_OPERATION 2 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_PROT_ADDR_LEN 3 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_PROTOCOL_TYPE 4 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_SENDER_HA 5 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_SENDER_IP 6 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_TARGET_HA 7 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_TARGET_IP 8 + +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_FID_COUNT 9 + +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \ + {"HARDWARE_LEN", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_HARDWARE_LEN},\ + {"HARDWARE_TYPE", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_HARDWARE_TYPE},\ + {"OPERATION", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_OPERATION},\ + {"PROT_ADDR_LEN", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_PROT_ADDR_LEN},\ + {"PROTOCOL_TYPE", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_PROTOCOL_TYPE},\ + {"SENDER_HA", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_SENDER_HA},\ + {"SENDER_IP", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_SENDER_IP},\ + {"TARGET_HA", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_TARGET_HA},\ + {"TARGET_IP", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_TARGET_IP},\ + {"arp_t fid count", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_FID_COUNT} + +/*! + * \name CPU_COMPOSITES_0_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6 + +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT 7 + +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \ + {"DMA_CONT0", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\ + {"DMA_CONT1", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\ + {"DMA_CONT2", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\ + {"DMA_CONT3", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\ + {"DMA_CONT4", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\ + {"DMA_CONT5", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\ + {"DMA_CONT6", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\ + {"cpu_composites_0_t fid count", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT} + +/*! + * \name CPU_COMPOSITES_1_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7 8 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8 9 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9 10 + +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT 11 + +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \ + {"DMA_CONT10", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\ + {"DMA_CONT11", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\ + {"DMA_CONT12", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\ + {"DMA_CONT13", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\ + {"DMA_CONT14", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\ + {"DMA_CONT15", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\ + {"DMA_CONT16", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\ + {"DMA_CONT17", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\ + {"DMA_CONT7", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\ + {"DMA_CONT8", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\ + {"DMA_CONT9", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\ + {"cpu_composites_1_t fid count", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT} + +/*! + * \name EP_NIH_HEADER_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE 0 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE 1 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A 2 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B 3 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C 4 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A 5 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B 6 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C 7 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX 8 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0 9 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_START 10 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP 11 + +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT 12 + +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT \ + {"HEADER_SUBTYPE", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE},\ + {"HEADER_TYPE", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE},\ + {"OPAQUE_CTRL_A", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A},\ + {"OPAQUE_CTRL_B", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B},\ + {"OPAQUE_CTRL_C", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C},\ + {"OPAQUE_OBJECT_A", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A},\ + {"OPAQUE_OBJECT_B", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B},\ + {"OPAQUE_OBJECT_C", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C},\ + {"RECIRC_PROFILE_INDEX", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX},\ + {"RESERVED_0", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0},\ + {"START", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_START},\ + {"TIMESTAMP", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP},\ + {"ep_nih_header_t fid count", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT} + +/*! + * \name ERSPAN3_FIXED_HDR_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO 0 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS 1 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID 2 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID 4 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T 5 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP 6 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER 7 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN 8 + +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT 9 + +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \ + {"BSO", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\ + {"COS", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\ + {"GBP_SID", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\ + {"P_FT_HWID_D_GRA_O", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\ + {"SESSION_ID", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\ + {"T", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\ + {"TIMESTAMP", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\ + {"VER", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\ + {"VLAN", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\ + {"erspan3_fixed_hdr_t fid count", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT} + +/*! + * \name ERSPAN3_SUBHDR_5_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID 1 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID 2 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP 3 + +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT 4 + +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \ + {"PLATFORM_ID", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\ + {"PORT_ID", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\ + {"SWITCH_ID", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\ + {"TIMESTAMP", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\ + {"erspan3_subhdr_5_t fid count", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT} + +/*! + * \name ETHERTYPE_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ETHERTYPE_T_TYPE 0 + +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT 1 + +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \ + {"TYPE", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ETHERTYPE_T_TYPE},\ + {"ethertype_t fid count", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT} + +/*! + * \name GENERIC_LOOPBACK_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ 0 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE 1 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ 2 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS 3 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE 4 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY 5 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL 6 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ 7 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0 8 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1 9 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ 10 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1 11 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2 12 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 13 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE 14 + +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT 15 + +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \ + {"DESTINATION_OBJ", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\ + {"DESTINATION_TYPE", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\ + {"ENTROPY_OBJ", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\ + {"FLAGS", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\ + {"HEADER_TYPE", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\ + {"INPUT_PRIORITY", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\ + {"INTERFACE_CTRL", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\ + {"INTERFACE_OBJ", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\ + {"PROCESSING_CTRL_0", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\ + {"PROCESSING_CTRL_1", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\ + {"QOS_OBJ", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\ + {"RESERVED_1", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\ + {"RESERVED_2", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2},\ + {"SOURCE_SYSTEM_PORT", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\ + {"START_BYTE", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\ + {"generic_loopback_t fid count", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT} + +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP 0 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF 1 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED 2 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP 3 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP 4 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP 5 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP 6 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP 7 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1 8 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10 + +/*! + * \name ICMP_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T_CHECKSUM 0 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T_CODE 1 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T_ICMP_TYPE 2 + +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T_FID_COUNT 3 + +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T_CHECKSUM},\ + {"CODE", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T_CODE},\ + {"ICMP_TYPE", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T_ICMP_TYPE},\ + {"icmp_t fid count", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T_FID_COUNT} + +/*! + * \name IPFIX_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_EXPORT_TIME 0 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_LENGTH 1 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_SEQUENCE_NUM 3 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_VERSION 4 + +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_FID_COUNT 5 + +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \ + {"EXPORT_TIME", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_EXPORT_TIME},\ + {"LENGTH", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_LENGTH},\ + {"OBS_DOMAIN_ID", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\ + {"SEQUENCE_NUM", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_SEQUENCE_NUM},\ + {"VERSION", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_VERSION},\ + {"ipfix_t fid count", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_FID_COUNT} + +/*! + * \name IPV4_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_DA 0 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_HDR_CHECKSUM 2 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_ID 3 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_OPTION 4 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_PROTOCOL 5 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_SA 6 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_TOS 7 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_TOTAL_LENGTH 8 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_TTL 9 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_VERSION_HDR_LEN 10 + +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_FID_COUNT 11 + +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \ + {"DA", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_DA},\ + {"FLAGS_FRAG_OFFSET", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\ + {"HDR_CHECKSUM", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_HDR_CHECKSUM},\ + {"ID", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_ID},\ + {"OPTION", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_OPTION},\ + {"PROTOCOL", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_PROTOCOL},\ + {"SA", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_SA},\ + {"TOS", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_TOS},\ + {"TOTAL_LENGTH", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_TOTAL_LENGTH},\ + {"TTL", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_TTL},\ + {"VERSION_HDR_LEN", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_VERSION_HDR_LEN},\ + {"ipv4_t fid count", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_FID_COUNT} + +/*! + * \name IPV6_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_DA 0 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_FLOW_LABEL 1 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_HOP_LIMIT 2 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_NEXT_HEADER 3 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_SA 5 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_TRAFFIC_CLASS 6 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_VERSION 7 + +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_FID_COUNT 8 + +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \ + {"DA", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_DA},\ + {"FLOW_LABEL", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_FLOW_LABEL},\ + {"HOP_LIMIT", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_HOP_LIMIT},\ + {"NEXT_HEADER", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_NEXT_HEADER},\ + {"PAYLOAD_LENGTH", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\ + {"SA", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_SA},\ + {"TRAFFIC_CLASS", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_TRAFFIC_CLASS},\ + {"VERSION", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_VERSION},\ + {"ipv6_t fid count", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_FID_COUNT} + +/*! + * \name L2_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_L2_T_MACDA 0 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_L2_T_MACSA 1 + +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_L2_T_FID_COUNT 2 + +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \ + {"MACDA", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_L2_T_MACDA},\ + {"MACSA", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_L2_T_MACSA},\ + {"l2_t fid count", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_L2_T_FID_COUNT} + +/*! + * \name MIRROR_ERSPAN_SN_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0 + +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT 1 + +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \ + {"SEQ_NUM", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\ + {"mirror_erspan_sn_t fid count", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT} + +/*! + * \name MIRROR_TRANSPORT_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_TRANSPORT_T_DATA 0 + +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT 1 + +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_TRANSPORT_T_DATA},\ + {"mirror_transport_t fid count", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT} + +/*! + * \name PSAMP_MIRROR_ON_DROP_0_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT 1 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH 2 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS 3 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S 4 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID 5 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID 6 + +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT 7 + +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \ + {"EGRESS_MOD_PORT", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\ + {"INGRESS_PORT", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\ + {"LENGTH", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\ + {"OBS_TIME_NS", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\ + {"OBS_TIME_S", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\ + {"SWITCH_ID", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\ + {"TEMPLATE_ID", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\ + {"psamp_mirror_on_drop_0_t fid count", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT} + +/*! + * \name PSAMP_MIRROR_ON_DROP_3_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON 0 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0 1 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH 2 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE 3 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX 4 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA 5 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR 6 + +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT 7 + +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT \ + {"DROP_REASON", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON},\ + {"RESERVED_0", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0},\ + {"SAMPLED_LENGTH", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH},\ + {"SMOD_STATE", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE},\ + {"UC_COS__COLOR__PROB_IDX", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX},\ + {"USER_META_DATA", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA},\ + {"VAR_LEN_INDICATOR", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR},\ + {"psamp_mirror_on_drop_3_t fid count", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT} + +/*! + * \name RARP_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_HARDWARE_LEN 0 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_HARDWARE_TYPE 1 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_OPERATION 2 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_PROT_ADDR_LEN 3 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_PROTOCOL_TYPE 4 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_SENDER_HA 5 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_SENDER_IP 6 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_TARGET_HA 7 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_TARGET_IP 8 + +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_FID_COUNT 9 + +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \ + {"HARDWARE_LEN", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_HARDWARE_LEN},\ + {"HARDWARE_TYPE", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_HARDWARE_TYPE},\ + {"OPERATION", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_OPERATION},\ + {"PROT_ADDR_LEN", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_PROT_ADDR_LEN},\ + {"PROTOCOL_TYPE", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_PROTOCOL_TYPE},\ + {"SENDER_HA", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_SENDER_HA},\ + {"SENDER_IP", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_SENDER_IP},\ + {"TARGET_HA", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_TARGET_HA},\ + {"TARGET_IP", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_TARGET_IP},\ + {"rarp_t fid count", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_FID_COUNT} + +/*! + * \name TCP_FIRST_4BYTES_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1 + +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT 2 + +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \ + {"DST_PORT", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\ + {"SRC_PORT", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\ + {"tcp_first_4bytes_t fid count", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT} + +/*! + * \name TCP_LAST_16BYTES_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM 0 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM 1 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM 3 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR 4 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE 5 + +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT 6 + +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \ + {"ACK_NUM", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\ + {"CHECKSUM", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\ + {"HDR_LEN_AND_FLAGS", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\ + {"SEQ_NUM", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\ + {"URGENT_PTR", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\ + {"WIN_SIZE", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\ + {"tcp_last_16bytes_t fid count", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT} + +/*! + * \name UDP_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_CHECKSUM 0 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_DST_PORT 1 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_SRC_PORT 2 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_UDP_LENGTH 3 + +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_FID_COUNT 4 + +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_CHECKSUM},\ + {"DST_PORT", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_DST_PORT},\ + {"SRC_PORT", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_SRC_PORT},\ + {"UDP_LENGTH", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_UDP_LENGTH},\ + {"udp_t fid count", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_FID_COUNT} + +/*! + * \name UNKNOWN_L3_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD 1 + +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT 2 + +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \ + {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\ + {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\ + {"unknown_l3_t fid count", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT} + +/*! + * \name UNKNOWN_L4_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0 + +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT 1 + +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \ + {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\ + {"unknown_l4_t fid count", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT} + +/*! + * \name UNKNOWN_L5_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2 + +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT 3 + +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \ + {"L5_BYTES_0_1", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\ + {"L5_BYTES_2_3", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\ + {"L5_BYTES_4_7", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\ + {"unknown_l5_t fid count", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT} + +/*! + * \name VLAN_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_CFI 0 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_PCP 1 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_TPID 2 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_VID 3 + +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_FID_COUNT 4 + +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \ + {"CFI", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_CFI},\ + {"PCP", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_PCP},\ + {"TPID", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_TPID},\ + {"VID", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_VID},\ + {"vlan_t fid count", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_FID_COUNT} + +/*! + * \name VXLAN_T field IDs. + */ +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T_RESERVED2 1 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T_VN_ID 2 + +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T_FID_COUNT 3 + +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \ + {"FLAGS_RESERVED_1", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\ + {"RESERVED2", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T_RESERVED2},\ + {"VN_ID", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T_VN_ID},\ + {"vxlan_t fid count", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T_FID_COUNT} + + +#endif /* BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_FLEXHDR_DATA_H */ diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_32_3_0/bcm56890_a0_cna_6_5_32_3_0_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_32_3_0/bcm56890_a0_cna_6_5_32_3_0_bcmpkt_rxpmd_flex_data.h new file mode 100644 index 00000000000..38742f2b0e5 --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_32_3_0/bcm56890_a0_cna_6_5_32_3_0_bcmpkt_rxpmd_flex_data.h @@ -0,0 +1,127 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) map.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_DATA_H +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_DATA_H + +/*! + * \name RX flex metadata field IDs. + */ +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0 0 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_DVP_15_0 1 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0 2 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0 3 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0 4 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_DROP_CODE_15_0 5 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0 6 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0 7 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16 8 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_ERSPAN3_GBP_SID_15_0 9 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0 10 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16 11 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32 12 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0 13 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0 14 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0 15 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16 16 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_8_0 17 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 18 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0 19 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0 20 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0 21 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0 22 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0 23 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0 24 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_14_0 25 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_14_0 26 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0 27 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0 28 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_SVP_15_0 29 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0 30 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0 31 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0 32 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0 33 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_TAG_ACTION_CTRL_1_0 34 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0 35 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_VFI_15_0 36 + +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_FID_COUNT 37 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_COUNT 22 + +/*! + * \name Packet Flex Reason Types. + */ +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS 0 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT 1 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP 2 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER 3 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT 4 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP 5 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS 6 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD 7 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE 8 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP 9 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS 10 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR 11 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR 12 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL 13 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST 14 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED 15 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU 16 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED 17 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT 18 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED 19 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP 20 +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_VFP 21 + +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \ + {"CML_FLAGS", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\ + {"EM_FT", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT},\ + {"IFP", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP},\ + {"IFP_METER", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\ + {"IVXLT", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\ + {"L2_DST_LOOKUP", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\ + {"L2_DST_LOOKUP_MISS", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\ + {"L2_SRC_DISCARD", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD},\ + {"L2_SRC_STATIC_MOVE", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\ + {"L3_DST_LOOKUP", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\ + {"L3_DST_LOOKUP_MISS", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\ + {"L3_HDR_ERROR", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\ + {"L3_TTL_ERROR", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\ + {"LEARN_CACHE_FULL", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\ + {"MACSA_MULTICAST", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST},\ + {"MEMBERSHIP_CHECK_FAILED", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED},\ + {"NO_COPY_TO_CPU", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\ + {"PKT_INTEGRITY_CHECK_FAILED", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\ + {"PROTOCOL_PKT", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\ + {"SPANNING_TREE_CHECK_FAILED", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED},\ + {"TRACE_DOP", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\ + {"VFP", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_VFP},\ + {"flex reason count", BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_COUNT} + +#endif /* BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_DATA_H */ diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_32_3_0/bcm56890_a0_cna_6_5_32_3_0_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_32_3_0/bcm56890_a0_cna_6_5_32_3_0_bcmpkt_rxpmd_match_id_defs.h new file mode 100644 index 00000000000..ffb10fbc935 --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_32_3_0/bcm56890_a0_cna_6_5_32_3_0_bcmpkt_rxpmd_match_id_defs.h @@ -0,0 +1,213 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) bcm56890_a0_cna_6_5_32_3_0_sf_match_id_info.yml + * for device bcm56890_a0 and variant cna_6_5_32_3_0. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H + +#include + +/*! + * \brief Get the Match ID DataBase information. + * + * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information. +*/ +extern bcmpkt_rxpmd_match_id_db_info_t * + bcm56890_a0_cna_6_5_32_3_0_rxpmd_match_id_db_info_get(void); + +/*! + * \brief Get the Match ID Mapping information. + * + * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information. +*/ +extern bcmpkt_rxpmd_match_id_map_info_t * + bcm56890_a0_cna_6_5_32_3_0_rxpmd_match_id_map_info_get(void); + +/*! + \name RXPMD Match IDs +*/ +#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG 0 +#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 1 +#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE 2 +#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG 3 +#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP 4 +#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE 5 +#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP 6 +#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 7 +#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 8 +#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE 9 +#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP 10 +#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES 11 +#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES 12 +#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP 13 +#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 14 +#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 15 +#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 16 +#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN 17 +#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH 18 +#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK 19 +#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE 20 +#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG 21 +#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 22 +#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE 23 +#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG 24 +#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP 25 +#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE 26 +#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP 27 +#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 28 +#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 29 +#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE 30 +#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP 31 +#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES 32 +#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES 33 +#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP 34 +#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 35 +#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 36 +#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 37 +#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN 38 +#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG 39 +#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 40 +#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE 41 +#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG 42 +#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP 43 +#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE 44 +#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP 45 +#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 46 +#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 47 +#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE 48 +#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP 49 +#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES 50 +#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES 51 +#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP 52 +#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 53 +#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 54 +#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 55 +#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG 56 +#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 57 +#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE 58 +#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG 59 +#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP 60 +#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE 61 +#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP 62 +#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 63 +#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 64 +#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE 65 +#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP 66 +#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES 67 +#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES 68 +#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP 69 +#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 70 +#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 71 +#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 72 +#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN 73 +#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH 74 +#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK 75 +#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE 76 +#define BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_COUNT 77 + +#define BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \ + {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \ + {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \ + {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \ + {"EGRESS_PKT_SYS_HDR_EP_NIH", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH}, \ + {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \ + {"EGRESS_PKT_SYS_HDR_NONE", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \ + {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \ + {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \ + {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \ + {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \ + {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \ + {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \ + {"INGRESS_PKT_SYS_HDR_EP_NIH", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH}, \ + {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \ + {"INGRESS_PKT_SYS_HDR_NONE", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \ + {"rxpmd_match_id_count", BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_COUNT} + +#endif /*! BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H */ diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_32_4_0/bcm56890_a0_dna_6_5_32_4_0_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_32_4_0/bcm56890_a0_dna_6_5_32_4_0_bcmpkt_flexhdr.h new file mode 100644 index 00000000000..b6c99f40678 --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_32_4_0/bcm56890_a0_dna_6_5_32_4_0_bcmpkt_flexhdr.h @@ -0,0 +1,172 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) header.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_FLEXHDR_H +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_FLEXHDR_H + +#include + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ARP_T 0 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_AUTHEN_T 1 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_BFD_T 2 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CNTAG_T 3 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_0_T 4 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_1_T 5 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_DEST_OPTION_T 6 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_EP_NIH_HEADER_T 7 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T 8 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ERSPAN3_SUBHDR_5_T 9 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ESP_T 10 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ETHERTYPE_T 11 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_FRAG_T 12 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GBP_ETHERNET_SHIM_T 13 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T 14 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GPE_T 15 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_CHKSUM_T 16 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_KEY_T 17 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_ROUT_T 18 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_SEQ_T 19 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_T 20 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T 21 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_EXTENSION_0_T 22 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HOP_BY_HOP_T 23 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ICMP_T 24 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_HEADER_T 25 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_A_T 26 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_B_T 27 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_BASE_T 28 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IGMP_T 29 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IOAM_E2E_T 30 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPFIX_T 31 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV4_T 32 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV6_T 33 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_L2_T 34 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MIRROR_ERSPAN_SN_T 35 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MIRROR_TRANSPORT_T 36 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_ACH_T 37 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_BV_T 38 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_CW_T 39 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_T 40 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_P_1588_T 41 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PIM_T 42 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PROG_EXT_HDR_T 43 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_0_T 44 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_1_T 45 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T 46 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T 47 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RARP_T 48 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ROUTING_T 49 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RSPAN_T 50 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_0_T 51 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_1_T 52 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_2_T 53 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SNAP_LLC_T 54 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SVTAG_T 55 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_TCP_FIRST_4BYTES_T 56 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_TCP_LAST_16BYTES_T 57 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UDP_T 58 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UNKNOWN_L3_T 59 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UNKNOWN_L4_T 60 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UNKNOWN_L5_T 61 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_VLAN_T 62 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_VXLAN_T 63 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_WESP_T 64 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_T 65 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_FLEXHDR_COUNT 66 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_FLEXHDR_NAME_MAP_INIT \ + {"arp_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ARP_T},\ + {"authen_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_AUTHEN_T},\ + {"bfd_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_BFD_T},\ + {"cntag_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CNTAG_T},\ + {"cpu_composites_0_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_0_T},\ + {"cpu_composites_1_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_1_T},\ + {"dest_option_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_DEST_OPTION_T},\ + {"ep_nih_header_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_EP_NIH_HEADER_T},\ + {"erspan3_fixed_hdr_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T},\ + {"erspan3_subhdr_5_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ERSPAN3_SUBHDR_5_T},\ + {"esp_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ESP_T},\ + {"ethertype_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ETHERTYPE_T},\ + {"frag_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_FRAG_T},\ + {"gbp_ethernet_shim_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GBP_ETHERNET_SHIM_T},\ + {"generic_loopback_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T},\ + {"gpe_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GPE_T},\ + {"gre_chksum_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_CHKSUM_T},\ + {"gre_key_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_KEY_T},\ + {"gre_rout_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_ROUT_T},\ + {"gre_seq_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_SEQ_T},\ + {"gre_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_T},\ + {"hg3_base_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T},\ + {"hg3_extension_0_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_EXTENSION_0_T},\ + {"hop_by_hop_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HOP_BY_HOP_T},\ + {"icmp_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ICMP_T},\ + {"ifa_header_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_HEADER_T},\ + {"ifa_metadata_a_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_A_T},\ + {"ifa_metadata_b_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_B_T},\ + {"ifa_metadata_base_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_BASE_T},\ + {"igmp_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IGMP_T},\ + {"ioam_e2e_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IOAM_E2E_T},\ + {"ipfix_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPFIX_T},\ + {"ipv4_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV4_T},\ + {"ipv6_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV6_T},\ + {"l2_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_L2_T},\ + {"mirror_erspan_sn_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MIRROR_ERSPAN_SN_T},\ + {"mirror_transport_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MIRROR_TRANSPORT_T},\ + {"mpls_ach_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_ACH_T},\ + {"mpls_bv_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_BV_T},\ + {"mpls_cw_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_CW_T},\ + {"mpls_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_T},\ + {"p_1588_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_P_1588_T},\ + {"pim_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PIM_T},\ + {"prog_ext_hdr_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PROG_EXT_HDR_T},\ + {"psamp_0_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_0_T},\ + {"psamp_1_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_1_T},\ + {"psamp_mirror_on_drop_0_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\ + {"psamp_mirror_on_drop_3_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T},\ + {"rarp_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RARP_T},\ + {"routing_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ROUTING_T},\ + {"rspan_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RSPAN_T},\ + {"sflow_shim_0_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_0_T},\ + {"sflow_shim_1_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_1_T},\ + {"sflow_shim_2_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_2_T},\ + {"snap_llc_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SNAP_LLC_T},\ + {"svtag_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SVTAG_T},\ + {"tcp_first_4bytes_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_TCP_FIRST_4BYTES_T},\ + {"tcp_last_16bytes_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_TCP_LAST_16BYTES_T},\ + {"udp_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UDP_T},\ + {"unknown_l3_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UNKNOWN_L3_T},\ + {"unknown_l4_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UNKNOWN_L4_T},\ + {"unknown_l5_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UNKNOWN_L5_T},\ + {"vlan_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_VLAN_T},\ + {"vxlan_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_VXLAN_T},\ + {"wesp_t", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_WESP_T},\ + {"RXPMD_FLEX_T", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_T},\ + {"flexhdr count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_FLEXHDR_COUNT} + +#endif /* BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_FLEXHDR_H */ diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_32_4_0/bcm56890_a0_dna_6_5_32_4_0_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_32_4_0/bcm56890_a0_dna_6_5_32_4_0_bcmpkt_flexhdr_data.h new file mode 100644 index 00000000000..c6421da1baa --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_32_4_0/bcm56890_a0_dna_6_5_32_4_0_bcmpkt_flexhdr_data.h @@ -0,0 +1,1321 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) header.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_FLEXHDR_DATA_H +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_FLEXHDR_DATA_H + +/*! + * \name ARP_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ARP_T_HARDWARE_LEN 0 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ARP_T_HARDWARE_TYPE 1 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ARP_T_OPERATION 2 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ARP_T_PROT_ADDR_LEN 3 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ARP_T_PROTOCOL_TYPE 4 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ARP_T_SENDER_HA 5 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ARP_T_SENDER_IP 6 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ARP_T_TARGET_HA 7 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ARP_T_TARGET_IP 8 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ARP_T_FID_COUNT 9 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \ + {"HARDWARE_LEN", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ARP_T_HARDWARE_LEN},\ + {"HARDWARE_TYPE", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ARP_T_HARDWARE_TYPE},\ + {"OPERATION", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ARP_T_OPERATION},\ + {"PROT_ADDR_LEN", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ARP_T_PROT_ADDR_LEN},\ + {"PROTOCOL_TYPE", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ARP_T_PROTOCOL_TYPE},\ + {"SENDER_HA", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ARP_T_SENDER_HA},\ + {"SENDER_IP", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ARP_T_SENDER_IP},\ + {"TARGET_HA", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ARP_T_TARGET_HA},\ + {"TARGET_IP", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ARP_T_TARGET_IP},\ + {"arp_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ARP_T_FID_COUNT} + +/*! + * \name AUTHEN_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_AUTHEN_T_DATA 0 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_AUTHEN_T_NEXT_HEADER 1 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN 2 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_AUTHEN_T_RESERVED 3 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_AUTHEN_T_SEQ_NUM 4 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_AUTHEN_T_SPI 5 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_AUTHEN_T_FID_COUNT 6 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_AUTHEN_T_DATA},\ + {"NEXT_HEADER", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_AUTHEN_T_NEXT_HEADER},\ + {"PAYLOAD_LEN", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN},\ + {"RESERVED", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_AUTHEN_T_RESERVED},\ + {"SEQ_NUM", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_AUTHEN_T_SEQ_NUM},\ + {"SPI", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_AUTHEN_T_SPI},\ + {"authen_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_AUTHEN_T_FID_COUNT} + +/*! + * \name BFD_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_BFD_T_AP 0 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_BFD_T_BFD_LENGTH 1 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_BFD_T_CPI 2 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_BFD_T_DEM 3 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_BFD_T_DESMINTXINTV 4 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_BFD_T_DETECTMULT 5 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_BFD_T_DIAG 6 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_BFD_T_FIN 7 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_BFD_T_MINECHORXINTV 8 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_BFD_T_MPT 9 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_BFD_T_MYDISCRIM 10 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_BFD_T_POLL 11 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_BFD_T_REQMINRXINTV 12 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_BFD_T_STA 13 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_BFD_T_URDISCRIM 14 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_BFD_T_VERSION 15 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_BFD_T_FID_COUNT 16 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT \ + {"AP", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_BFD_T_AP},\ + {"BFD_LENGTH", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_BFD_T_BFD_LENGTH},\ + {"CPI", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_BFD_T_CPI},\ + {"DEM", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_BFD_T_DEM},\ + {"DESMINTXINTV", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_BFD_T_DESMINTXINTV},\ + {"DETECTMULT", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_BFD_T_DETECTMULT},\ + {"DIAG", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_BFD_T_DIAG},\ + {"FIN", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_BFD_T_FIN},\ + {"MINECHORXINTV", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_BFD_T_MINECHORXINTV},\ + {"MPT", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_BFD_T_MPT},\ + {"MYDISCRIM", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_BFD_T_MYDISCRIM},\ + {"POLL", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_BFD_T_POLL},\ + {"REQMINRXINTV", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_BFD_T_REQMINRXINTV},\ + {"STA", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_BFD_T_STA},\ + {"URDISCRIM", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_BFD_T_URDISCRIM},\ + {"VERSION", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_BFD_T_VERSION},\ + {"bfd_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_BFD_T_FID_COUNT} + +/*! + * \name CNTAG_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CNTAG_T_RPID 0 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CNTAG_T_TPID 1 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CNTAG_T_FID_COUNT 2 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT \ + {"RPID", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CNTAG_T_RPID},\ + {"TPID", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CNTAG_T_TPID},\ + {"cntag_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CNTAG_T_FID_COUNT} + +/*! + * \name CPU_COMPOSITES_0_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT 7 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \ + {"DMA_CONT0", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\ + {"DMA_CONT1", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\ + {"DMA_CONT2", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\ + {"DMA_CONT3", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\ + {"DMA_CONT4", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\ + {"DMA_CONT5", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\ + {"DMA_CONT6", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\ + {"cpu_composites_0_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT} + +/*! + * \name CPU_COMPOSITES_1_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7 8 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8 9 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9 10 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT 11 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \ + {"DMA_CONT10", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\ + {"DMA_CONT11", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\ + {"DMA_CONT12", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\ + {"DMA_CONT13", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\ + {"DMA_CONT14", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\ + {"DMA_CONT15", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\ + {"DMA_CONT16", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\ + {"DMA_CONT17", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\ + {"DMA_CONT7", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\ + {"DMA_CONT8", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\ + {"DMA_CONT9", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\ + {"cpu_composites_1_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT} + +/*! + * \name DEST_OPTION_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN 0 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER 1 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_DEST_OPTION_T_OPTION 2 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_DEST_OPTION_T_FID_COUNT 3 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER},\ + {"OPTION", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_DEST_OPTION_T_OPTION},\ + {"dest_option_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_DEST_OPTION_T_FID_COUNT} + +/*! + * \name EP_NIH_HEADER_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE 0 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE 1 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A 2 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B 3 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C 4 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A 5 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B 6 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C 7 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX 8 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0 9 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_EP_NIH_HEADER_T_START 10 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP 11 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT 12 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT \ + {"HEADER_SUBTYPE", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE},\ + {"HEADER_TYPE", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE},\ + {"OPAQUE_CTRL_A", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A},\ + {"OPAQUE_CTRL_B", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B},\ + {"OPAQUE_CTRL_C", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C},\ + {"OPAQUE_OBJECT_A", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A},\ + {"OPAQUE_OBJECT_B", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B},\ + {"OPAQUE_OBJECT_C", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C},\ + {"RECIRC_PROFILE_INDEX", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX},\ + {"RESERVED_0", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0},\ + {"START", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_EP_NIH_HEADER_T_START},\ + {"TIMESTAMP", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP},\ + {"ep_nih_header_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT} + +/*! + * \name ERSPAN3_FIXED_HDR_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO 0 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS 1 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID 2 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID 4 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T 5 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP 6 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER 7 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN 8 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT 9 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \ + {"BSO", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\ + {"COS", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\ + {"GBP_SID", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\ + {"P_FT_HWID_D_GRA_O", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\ + {"SESSION_ID", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\ + {"T", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\ + {"TIMESTAMP", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\ + {"VER", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\ + {"VLAN", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\ + {"erspan3_fixed_hdr_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT} + +/*! + * \name ERSPAN3_SUBHDR_5_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID 1 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID 2 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP 3 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT 4 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \ + {"PLATFORM_ID", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\ + {"PORT_ID", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\ + {"SWITCH_ID", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\ + {"TIMESTAMP", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\ + {"erspan3_subhdr_5_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT} + +/*! + * \name ESP_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ESP_T_NEXT_HEADER 0 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ESP_T_PAD 1 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ESP_T_PAD_LEN 2 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ESP_T_SEQ_NUM 3 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ESP_T_SPI 4 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ESP_T_FID_COUNT 5 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT \ + {"NEXT_HEADER", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ESP_T_NEXT_HEADER},\ + {"PAD", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ESP_T_PAD},\ + {"PAD_LEN", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ESP_T_PAD_LEN},\ + {"SEQ_NUM", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ESP_T_SEQ_NUM},\ + {"SPI", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ESP_T_SPI},\ + {"esp_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ESP_T_FID_COUNT} + +/*! + * \name ETHERTYPE_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ETHERTYPE_T_TYPE 0 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ETHERTYPE_T_FID_COUNT 1 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \ + {"TYPE", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ETHERTYPE_T_TYPE},\ + {"ethertype_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ETHERTYPE_T_FID_COUNT} + +/*! + * \name FRAG_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_FRAG_T_FRAG_INFO 0 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_FRAG_T_ID 1 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_FRAG_T_NEXT_HEADER 2 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_FRAG_T_RESERVED 3 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_FRAG_T_FID_COUNT 4 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT \ + {"FRAG_INFO", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_FRAG_T_FRAG_INFO},\ + {"ID", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_FRAG_T_ID},\ + {"NEXT_HEADER", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_FRAG_T_NEXT_HEADER},\ + {"RESERVED", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_FRAG_T_RESERVED},\ + {"frag_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_FRAG_T_FID_COUNT} + +/*! + * \name GBP_ETHERNET_SHIM_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GBP_ETHERNET_SHIM_T_ETHERTYPE 0 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GBP_ETHERNET_SHIM_T_FLAGS 1 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GBP_ETHERNET_SHIM_T_RESERVED 2 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GBP_ETHERNET_SHIM_T_SID 3 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GBP_ETHERNET_SHIM_T_SUBTYPE 4 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GBP_ETHERNET_SHIM_T_VER 5 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT 6 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GBP_ETHERNET_SHIM_T_FIELD_NAME_MAP_INIT \ + {"ETHERTYPE", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GBP_ETHERNET_SHIM_T_ETHERTYPE},\ + {"FLAGS", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GBP_ETHERNET_SHIM_T_FLAGS},\ + {"RESERVED", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GBP_ETHERNET_SHIM_T_RESERVED},\ + {"SID", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GBP_ETHERNET_SHIM_T_SID},\ + {"SUBTYPE", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GBP_ETHERNET_SHIM_T_SUBTYPE},\ + {"VER", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GBP_ETHERNET_SHIM_T_VER},\ + {"gbp_ethernet_shim_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT} + +/*! + * \name GENERIC_LOOPBACK_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ 0 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE 1 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ 2 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS 3 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE 4 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY 5 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL 6 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ 7 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0 8 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1 9 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ 10 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1 11 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 12 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_SRC_SUBPORT_NUM 13 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE 14 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT 15 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \ + {"DESTINATION_OBJ", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\ + {"DESTINATION_TYPE", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\ + {"ENTROPY_OBJ", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\ + {"FLAGS", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\ + {"HEADER_TYPE", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\ + {"INPUT_PRIORITY", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\ + {"INTERFACE_CTRL", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\ + {"INTERFACE_OBJ", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\ + {"PROCESSING_CTRL_0", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\ + {"PROCESSING_CTRL_1", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\ + {"QOS_OBJ", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\ + {"RESERVED_1", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\ + {"SOURCE_SYSTEM_PORT", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\ + {"SRC_SUBPORT_NUM", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_SRC_SUBPORT_NUM},\ + {"START_BYTE", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\ + {"generic_loopback_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT} + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP 0 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF 1 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED 2 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP 3 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP 4 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP 5 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP 6 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP 7 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1 8 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__UNDERLAY_ECMP 11 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__TUNNEL 0 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__GENERIC 1 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__NOOP 0 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__VFI 1 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__L3_IIF 2 + +/*! + * \name GPE_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GPE_T_FLAGS 0 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GPE_T_NEXT_PROTOCOL 1 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GPE_T_RESERVED0 2 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GPE_T_RESERVED1 3 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GPE_T_VNI 4 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GPE_T_FID_COUNT 5 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT \ + {"FLAGS", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GPE_T_FLAGS},\ + {"NEXT_PROTOCOL", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GPE_T_NEXT_PROTOCOL},\ + {"RESERVED0", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GPE_T_RESERVED0},\ + {"RESERVED1", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GPE_T_RESERVED1},\ + {"VNI", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GPE_T_VNI},\ + {"gpe_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GPE_T_FID_COUNT} + +/*! + * \name GRE_CHKSUM_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM 0 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_CHKSUM_T_OFFSET 1 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT 2 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM},\ + {"OFFSET", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_CHKSUM_T_OFFSET},\ + {"gre_chksum_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT} + +/*! + * \name GRE_KEY_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_KEY_T_KEY 0 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_KEY_T_FID_COUNT 1 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT \ + {"KEY", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_KEY_T_KEY},\ + {"gre_key_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_KEY_T_FID_COUNT} + +/*! + * \name GRE_ROUT_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_ROUT_T_ROUTING 0 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_ROUT_T_FID_COUNT 1 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT \ + {"ROUTING", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_ROUT_T_ROUTING},\ + {"gre_rout_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_ROUT_T_FID_COUNT} + +/*! + * \name GRE_SEQ_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_SEQ_T_SEQUENCE 0 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_SEQ_T_FID_COUNT 1 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT \ + {"SEQUENCE", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_SEQ_T_SEQUENCE},\ + {"gre_seq_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_SEQ_T_FID_COUNT} + +/*! + * \name GRE_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_T_C_R_K_S 0 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_T_PROTOCOL 1 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_T_RESERVED 2 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_T_VERSION 3 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_T_FID_COUNT 4 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT \ + {"C_R_K_S", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_T_C_R_K_S},\ + {"PROTOCOL", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_T_PROTOCOL},\ + {"RESERVED", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_T_RESERVED},\ + {"VERSION", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_T_VERSION},\ + {"gre_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_T_FID_COUNT} + +/*! + * \name HG3_BASE_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_CN 0 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_CNG 1 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_ENTROPY 2 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_EXT_HDR_PRESENT 3 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_HG3_RESERVED 4 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_L3_ROUTED 5 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_MIRROR_COPY 6 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_RESERVED_ETYPE 7 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION 8 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION_TYPE 9 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_SYSTEM_SOURCE 10 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_TC 11 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_VERSION 12 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_FID_COUNT 13 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_FIELD_NAME_MAP_INIT \ + {"CN", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_CN},\ + {"CNG", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_CNG},\ + {"ENTROPY", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_ENTROPY},\ + {"EXT_HDR_PRESENT", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_EXT_HDR_PRESENT},\ + {"HG3_RESERVED", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_HG3_RESERVED},\ + {"L3_ROUTED", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_L3_ROUTED},\ + {"MIRROR_COPY", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_MIRROR_COPY},\ + {"RESERVED_ETYPE", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_RESERVED_ETYPE},\ + {"SYSTEM_DESTINATION", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION},\ + {"SYSTEM_DESTINATION_TYPE", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION_TYPE},\ + {"SYSTEM_SOURCE", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_SYSTEM_SOURCE},\ + {"TC", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_TC},\ + {"VERSION", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_VERSION},\ + {"hg3_base_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_FID_COUNT} + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__NO_OP 0 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L2_OIF 1 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__RESERVED 2 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__VP 3 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__ECMP 4 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__NHOP 5 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L2MC_GROUP 6 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L3MC_GROUP 7 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__RESERVED_1 8 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__ECMP_MEMBER 9 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__DEVICE_PORT 10 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__UNDERLAY_ECMP 11 + +/*! + * \name HG3_EXTENSION_0_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_LSB 0 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_MSB 1 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_EXTENSION_0_T_DVP_OR_L3_IIF 2 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_EXTENSION_0_T_FLAGS 3 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_EXTENSION_0_T_FORWARDING_DOMAIN 4 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_EXTENSION_0_T_SVP 5 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT 6 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_EXTENSION_0_T_FIELD_NAME_MAP_INIT \ + {"CLASS_ID_LSB", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_LSB},\ + {"CLASS_ID_MSB", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_MSB},\ + {"DVP_OR_L3_IIF", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_EXTENSION_0_T_DVP_OR_L3_IIF},\ + {"FLAGS", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_EXTENSION_0_T_FLAGS},\ + {"FORWARDING_DOMAIN", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_EXTENSION_0_T_FORWARDING_DOMAIN},\ + {"SVP", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_EXTENSION_0_T_SVP},\ + {"hg3_extension_0_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT} + +/*! + * \name HOP_BY_HOP_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN 0 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER 1 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HOP_BY_HOP_T_OPTION 2 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT 3 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER},\ + {"OPTION", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HOP_BY_HOP_T_OPTION},\ + {"hop_by_hop_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT} + +/*! + * \name ICMP_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ICMP_T_CHECKSUM 0 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ICMP_T_CODE 1 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ICMP_T_ICMP_TYPE 2 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ICMP_T_FID_COUNT 3 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ICMP_T_CHECKSUM},\ + {"CODE", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ICMP_T_CODE},\ + {"ICMP_TYPE", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ICMP_T_ICMP_TYPE},\ + {"icmp_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ICMP_T_FID_COUNT} + +/*! + * \name IFA_HEADER_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_HEADER_T_FLAGS 0 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_HEADER_T_GNS 1 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH 2 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_HEADER_T_NEXT_HDR 3 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_HEADER_T_VER 4 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_HEADER_T_FID_COUNT 5 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT \ + {"FLAGS", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_HEADER_T_FLAGS},\ + {"GNS", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_HEADER_T_GNS},\ + {"MAX_LENGTH", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH},\ + {"NEXT_HDR", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_HEADER_T_NEXT_HDR},\ + {"VER", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_HEADER_T_VER},\ + {"ifa_header_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_HEADER_T_FID_COUNT} + +/*! + * \name IFA_METADATA_A_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_A_T_CN 0 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_A_T_FWD_HDR_TTL 1 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_A_T_LNS_DEVICE_ID 2 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_A_T_PORT_SPEED 3 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_A_T_QUEUE_ID 4 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_A_T_RX_TIMESTAMP_SEC 5 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT 6 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_A_T_FIELD_NAME_MAP_INIT \ + {"CN", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_A_T_CN},\ + {"FWD_HDR_TTL", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_A_T_FWD_HDR_TTL},\ + {"LNS_DEVICE_ID", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_A_T_LNS_DEVICE_ID},\ + {"PORT_SPEED", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_A_T_PORT_SPEED},\ + {"QUEUE_ID", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_A_T_QUEUE_ID},\ + {"RX_TIMESTAMP_SEC", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_A_T_RX_TIMESTAMP_SEC},\ + {"ifa_metadata_a_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT} + +/*! + * \name IFA_METADATA_B_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_B_T_EGRESS_PORT_ID 0 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_B_T_INGRESS_PORT_ID 1 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_B_T_MMU_STAT_0 2 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_B_T_MMU_STAT_1 3 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_B_T_RESIDENCE_TIME_NANOSEC 4 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_B_T_RX_TIMESTAMP_NANOSEC 5 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_B_T_TX_QUEUE_BYTE_COUNT 6 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT 7 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_B_T_FIELD_NAME_MAP_INIT \ + {"EGRESS_PORT_ID", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_B_T_EGRESS_PORT_ID},\ + {"INGRESS_PORT_ID", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_B_T_INGRESS_PORT_ID},\ + {"MMU_STAT_0", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_B_T_MMU_STAT_0},\ + {"MMU_STAT_1", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_B_T_MMU_STAT_1},\ + {"RESIDENCE_TIME_NANOSEC", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_B_T_RESIDENCE_TIME_NANOSEC},\ + {"RX_TIMESTAMP_NANOSEC", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_B_T_RX_TIMESTAMP_NANOSEC},\ + {"TX_QUEUE_BYTE_COUNT", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_B_T_TX_QUEUE_BYTE_COUNT},\ + {"ifa_metadata_b_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT} + +/*! + * \name IFA_METADATA_BASE_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_BASE_T_ACTION_VECTOR 0 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_BASE_T_HOP_LIMIT_CURRENT_LENGTH 1 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_BASE_T_REQUEST_VECTOR 2 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT 3 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_BASE_T_FIELD_NAME_MAP_INIT \ + {"ACTION_VECTOR", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_BASE_T_ACTION_VECTOR},\ + {"HOP_LIMIT_CURRENT_LENGTH", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_BASE_T_HOP_LIMIT_CURRENT_LENGTH},\ + {"REQUEST_VECTOR", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_BASE_T_REQUEST_VECTOR},\ + {"ifa_metadata_base_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT} + +/*! + * \name IGMP_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IGMP_T_CHECKSUM 0 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IGMP_T_GROUP_ADDRESS 1 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IGMP_T_IGMP_TYPE 2 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IGMP_T_MAX_RESP_TIME 3 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IGMP_T_FID_COUNT 4 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IGMP_T_CHECKSUM},\ + {"GROUP_ADDRESS", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IGMP_T_GROUP_ADDRESS},\ + {"IGMP_TYPE", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IGMP_T_IGMP_TYPE},\ + {"MAX_RESP_TIME", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IGMP_T_MAX_RESP_TIME},\ + {"igmp_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IGMP_T_FID_COUNT} + +/*! + * \name IOAM_E2E_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IOAM_E2E_T_IOAM_E2E_DATA 0 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IOAM_E2E_T_IOAM_E2E_TYPE 1 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IOAM_E2E_T_IOAM_HDR_LEN 2 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IOAM_E2E_T_NAMESPACE_ID 3 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IOAM_E2E_T_NEXT_PROTOCOL 4 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IOAM_E2E_T_RESERVED 5 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IOAM_E2E_T_TYPE 6 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IOAM_E2E_T_FID_COUNT 7 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IOAM_E2E_T_FIELD_NAME_MAP_INIT \ + {"IOAM_E2E_DATA", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IOAM_E2E_T_IOAM_E2E_DATA},\ + {"IOAM_E2E_TYPE", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IOAM_E2E_T_IOAM_E2E_TYPE},\ + {"IOAM_HDR_LEN", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IOAM_E2E_T_IOAM_HDR_LEN},\ + {"NAMESPACE_ID", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IOAM_E2E_T_NAMESPACE_ID},\ + {"NEXT_PROTOCOL", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IOAM_E2E_T_NEXT_PROTOCOL},\ + {"RESERVED", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IOAM_E2E_T_RESERVED},\ + {"TYPE", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IOAM_E2E_T_TYPE},\ + {"ioam_e2e_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IOAM_E2E_T_FID_COUNT} + +/*! + * \name IPFIX_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPFIX_T_EXPORT_TIME 0 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPFIX_T_LENGTH 1 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPFIX_T_SEQUENCE_NUM 3 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPFIX_T_VERSION 4 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPFIX_T_FID_COUNT 5 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \ + {"EXPORT_TIME", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPFIX_T_EXPORT_TIME},\ + {"LENGTH", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPFIX_T_LENGTH},\ + {"OBS_DOMAIN_ID", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\ + {"SEQUENCE_NUM", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPFIX_T_SEQUENCE_NUM},\ + {"VERSION", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPFIX_T_VERSION},\ + {"ipfix_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPFIX_T_FID_COUNT} + +/*! + * \name IPV4_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV4_T_DA 0 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV4_T_HDR_CHECKSUM 2 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV4_T_ID 3 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV4_T_OPTION 4 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV4_T_PROTOCOL 5 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV4_T_SA 6 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV4_T_TOS 7 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV4_T_TOTAL_LENGTH 8 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV4_T_TTL 9 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV4_T_VERSION_HDR_LEN 10 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV4_T_FID_COUNT 11 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \ + {"DA", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV4_T_DA},\ + {"FLAGS_FRAG_OFFSET", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\ + {"HDR_CHECKSUM", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV4_T_HDR_CHECKSUM},\ + {"ID", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV4_T_ID},\ + {"OPTION", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV4_T_OPTION},\ + {"PROTOCOL", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV4_T_PROTOCOL},\ + {"SA", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV4_T_SA},\ + {"TOS", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV4_T_TOS},\ + {"TOTAL_LENGTH", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV4_T_TOTAL_LENGTH},\ + {"TTL", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV4_T_TTL},\ + {"VERSION_HDR_LEN", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV4_T_VERSION_HDR_LEN},\ + {"ipv4_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV4_T_FID_COUNT} + +/*! + * \name IPV6_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV6_T_DA 0 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV6_T_FLOW_LABEL 1 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV6_T_HOP_LIMIT 2 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV6_T_NEXT_HEADER 3 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV6_T_SA 5 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV6_T_TRAFFIC_CLASS 6 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV6_T_VERSION 7 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV6_T_FID_COUNT 8 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \ + {"DA", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV6_T_DA},\ + {"FLOW_LABEL", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV6_T_FLOW_LABEL},\ + {"HOP_LIMIT", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV6_T_HOP_LIMIT},\ + {"NEXT_HEADER", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV6_T_NEXT_HEADER},\ + {"PAYLOAD_LENGTH", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\ + {"SA", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV6_T_SA},\ + {"TRAFFIC_CLASS", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV6_T_TRAFFIC_CLASS},\ + {"VERSION", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV6_T_VERSION},\ + {"ipv6_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV6_T_FID_COUNT} + +/*! + * \name L2_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_L2_T_MACDA 0 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_L2_T_MACSA 1 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_L2_T_FID_COUNT 2 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \ + {"MACDA", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_L2_T_MACDA},\ + {"MACSA", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_L2_T_MACSA},\ + {"l2_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_L2_T_FID_COUNT} + +/*! + * \name MIRROR_ERSPAN_SN_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT 1 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \ + {"SEQ_NUM", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\ + {"mirror_erspan_sn_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT} + +/*! + * \name MIRROR_TRANSPORT_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MIRROR_TRANSPORT_T_DATA 0 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT 1 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MIRROR_TRANSPORT_T_DATA},\ + {"mirror_transport_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT} + +/*! + * \name MPLS_ACH_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE 0 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_ACH_T_CW_TYPE 1 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_ACH_T_RESERVED 2 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_ACH_T_VERSION 3 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_ACH_T_FID_COUNT 4 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT \ + {"CHANNEL_TYPE", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE},\ + {"CW_TYPE", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_ACH_T_CW_TYPE},\ + {"RESERVED", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_ACH_T_RESERVED},\ + {"VERSION", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_ACH_T_VERSION},\ + {"mpls_ach_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_ACH_T_FID_COUNT} + +/*! + * \name MPLS_BV_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_BV_T_VALUE 0 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_BV_T_FID_COUNT 1 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT \ + {"VALUE", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_BV_T_VALUE},\ + {"mpls_bv_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_BV_T_FID_COUNT} + +/*! + * \name MPLS_CW_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_CW_T_CW_TYPE 0 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_CW_T_RESERVED 1 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER 2 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_CW_T_FID_COUNT 3 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT \ + {"CW_TYPE", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_CW_T_CW_TYPE},\ + {"RESERVED", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_CW_T_RESERVED},\ + {"SEQ_NUMBER", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER},\ + {"mpls_cw_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_CW_T_FID_COUNT} + +/*! + * \name MPLS_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_T_BOS 0 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_T_EXP 1 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_T_LABEL 2 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_T_TTL 3 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_T_FID_COUNT 4 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT \ + {"BOS", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_T_BOS},\ + {"EXP", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_T_EXP},\ + {"LABEL", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_T_LABEL},\ + {"TTL", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_T_TTL},\ + {"mpls_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_T_FID_COUNT} + +/*! + * \name P_1588_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_P_1588_T_CNTRL 0 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_P_1588_T_CORRECTION 1 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_P_1588_T_DOMAIN_NB 2 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_P_1588_T_FLAGS 3 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_P_1588_T_LOGMSGINTERVAL 4 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_P_1588_T_MSG_LENGTH 5 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_P_1588_T_MSG_TYPE 6 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_P_1588_T_RESERVED1 7 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_P_1588_T_RESERVED2 8 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_P_1588_T_RESERVED3 9 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_P_1588_T_SEQ_ID 10 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_P_1588_T_SRCPORTID 11 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_P_1588_T_TRANSPORTSPEC 12 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_P_1588_T_VERSION 13 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_P_1588_T_FID_COUNT 14 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT \ + {"CNTRL", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_P_1588_T_CNTRL},\ + {"CORRECTION", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_P_1588_T_CORRECTION},\ + {"DOMAIN_NB", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_P_1588_T_DOMAIN_NB},\ + {"FLAGS", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_P_1588_T_FLAGS},\ + {"LOGMSGINTERVAL", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_P_1588_T_LOGMSGINTERVAL},\ + {"MSG_LENGTH", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_P_1588_T_MSG_LENGTH},\ + {"MSG_TYPE", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_P_1588_T_MSG_TYPE},\ + {"RESERVED1", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_P_1588_T_RESERVED1},\ + {"RESERVED2", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_P_1588_T_RESERVED2},\ + {"RESERVED3", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_P_1588_T_RESERVED3},\ + {"SEQ_ID", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_P_1588_T_SEQ_ID},\ + {"SRCPORTID", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_P_1588_T_SRCPORTID},\ + {"TRANSPORTSPEC", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_P_1588_T_TRANSPORTSPEC},\ + {"VERSION", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_P_1588_T_VERSION},\ + {"p_1588_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_P_1588_T_FID_COUNT} + +/*! + * \name PIM_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PIM_T_HDR_BYTES_0_1 0 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PIM_T_HDR_BYTES_2_3 1 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PIM_T_HDR_BYTES_4_5 2 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PIM_T_HDR_BYTES_6_7 3 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PIM_T_FID_COUNT 4 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PIM_T_FIELD_NAME_MAP_INIT \ + {"HDR_BYTES_0_1", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PIM_T_HDR_BYTES_0_1},\ + {"HDR_BYTES_2_3", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PIM_T_HDR_BYTES_2_3},\ + {"HDR_BYTES_4_5", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PIM_T_HDR_BYTES_4_5},\ + {"HDR_BYTES_6_7", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PIM_T_HDR_BYTES_6_7},\ + {"pim_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PIM_T_FID_COUNT} + +/*! + * \name PROG_EXT_HDR_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN 0 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER 1 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PROG_EXT_HDR_T_OPTION 2 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT 3 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT \ + {"HDR_EXT_LEN", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER},\ + {"OPTION", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PROG_EXT_HDR_T_OPTION},\ + {"prog_ext_hdr_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT} + +/*! + * \name PSAMP_0_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_0_T_FLOWSET 0 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_0_T_LENGTH 1 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX 2 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS 3 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_0_T_OBS_TIME_S 4 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID 5 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_0_T_FID_COUNT 6 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT \ + {"FLOWSET", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_0_T_FLOWSET},\ + {"LENGTH", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_0_T_LENGTH},\ + {"NEXT_HOP_INDEX", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX},\ + {"OBS_TIME_NS", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS},\ + {"OBS_TIME_S", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_0_T_OBS_TIME_S},\ + {"TEMPLATE_ID", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID},\ + {"psamp_0_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_0_T_FID_COUNT} + +/*! + * \name PSAMP_1_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_1_T_DLB_ID 0 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_1_T_EGRESS_PORT 1 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_1_T_EPOCH 2 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_1_T_INGRESS_PORT 3 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH 4 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_1_T_USER_META_DATA 5 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG 6 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_1_T_FID_COUNT 7 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT \ + {"DLB_ID", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_1_T_DLB_ID},\ + {"EGRESS_PORT", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_1_T_EGRESS_PORT},\ + {"EPOCH", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_1_T_EPOCH},\ + {"INGRESS_PORT", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_1_T_INGRESS_PORT},\ + {"SAMPLED_LENGTH", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH},\ + {"USER_META_DATA", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_1_T_USER_META_DATA},\ + {"VARIABLE_FLAG", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG},\ + {"psamp_1_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_1_T_FID_COUNT} + +/*! + * \name PSAMP_MIRROR_ON_DROP_0_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT 1 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH 2 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS 3 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S 4 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID 5 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID 6 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT 7 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \ + {"EGRESS_MOD_PORT", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\ + {"INGRESS_PORT", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\ + {"LENGTH", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\ + {"OBS_TIME_NS", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\ + {"OBS_TIME_S", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\ + {"SWITCH_ID", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\ + {"TEMPLATE_ID", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\ + {"psamp_mirror_on_drop_0_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT} + +/*! + * \name PSAMP_MIRROR_ON_DROP_3_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON 0 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0 1 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH 2 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE 3 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX 4 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA 5 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR 6 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT 7 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT \ + {"DROP_REASON", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON},\ + {"RESERVED_0", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0},\ + {"SAMPLED_LENGTH", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH},\ + {"SMOD_STATE", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE},\ + {"UC_COS__COLOR__PROB_IDX", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX},\ + {"USER_META_DATA", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA},\ + {"VAR_LEN_INDICATOR", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR},\ + {"psamp_mirror_on_drop_3_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT} + +/*! + * \name RARP_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RARP_T_HARDWARE_LEN 0 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RARP_T_HARDWARE_TYPE 1 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RARP_T_OPERATION 2 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RARP_T_PROT_ADDR_LEN 3 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RARP_T_PROTOCOL_TYPE 4 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RARP_T_SENDER_HA 5 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RARP_T_SENDER_IP 6 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RARP_T_TARGET_HA 7 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RARP_T_TARGET_IP 8 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RARP_T_FID_COUNT 9 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \ + {"HARDWARE_LEN", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RARP_T_HARDWARE_LEN},\ + {"HARDWARE_TYPE", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RARP_T_HARDWARE_TYPE},\ + {"OPERATION", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RARP_T_OPERATION},\ + {"PROT_ADDR_LEN", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RARP_T_PROT_ADDR_LEN},\ + {"PROTOCOL_TYPE", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RARP_T_PROTOCOL_TYPE},\ + {"SENDER_HA", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RARP_T_SENDER_HA},\ + {"SENDER_IP", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RARP_T_SENDER_IP},\ + {"TARGET_HA", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RARP_T_TARGET_HA},\ + {"TARGET_IP", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RARP_T_TARGET_IP},\ + {"rarp_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RARP_T_FID_COUNT} + +/*! + * \name ROUTING_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ROUTING_T_DATA 0 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ROUTING_T_HDR_EXT_LEN 1 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ROUTING_T_NEXT_HEADER 2 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ROUTING_T_ROUTING_TYPE 3 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT 4 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ROUTING_T_FID_COUNT 5 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ROUTING_T_DATA},\ + {"HDR_EXT_LEN", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ROUTING_T_HDR_EXT_LEN},\ + {"NEXT_HEADER", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ROUTING_T_NEXT_HEADER},\ + {"ROUTING_TYPE", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ROUTING_T_ROUTING_TYPE},\ + {"SEGMENTS_LEFT", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT},\ + {"routing_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ROUTING_T_FID_COUNT} + +/*! + * \name RSPAN_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RSPAN_T_TAG 0 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RSPAN_T_TPID 1 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RSPAN_T_FID_COUNT 2 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT \ + {"TAG", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RSPAN_T_TAG},\ + {"TPID", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RSPAN_T_TPID},\ + {"rspan_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RSPAN_T_FID_COUNT} + +/*! + * \name SFLOW_SHIM_0_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION 0 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE 1 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_0_T_VERSION 2 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT 3 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT \ + {"SYS_DESTINATION", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION},\ + {"SYS_SOURCE", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE},\ + {"VERSION", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_0_T_VERSION},\ + {"sflow_shim_0_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT} + +/*! + * \name SFLOW_SHIM_1_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE 0 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED 1 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE 2 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST 3 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE 4 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED 5 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED 6 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE 7 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT 8 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT \ + {"FLAG_DEST_SAMPLE", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE},\ + {"FLAG_DISCARDED", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED},\ + {"FLAG_FLEX_SAMPLE", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE},\ + {"FLAG_MCAST", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST},\ + {"FLAG_SRC_SAMPLE", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE},\ + {"FLAG_TRUNCATED", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED},\ + {"RESERVED", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED},\ + {"SYS_OPCODE", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE},\ + {"sflow_shim_1_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT} + +/*! + * \name SFLOW_SHIM_2_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM 0 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA 1 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT 2 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT \ + {"SEQUENCE_NUM", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM},\ + {"USER_META_DATA", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA},\ + {"sflow_shim_2_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT} + +/*! + * \name SNAP_LLC_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SNAP_LLC_T_LENGTH 0 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SNAP_LLC_T_SNAP_LLC 1 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SNAP_LLC_T_FID_COUNT 2 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT \ + {"LENGTH", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SNAP_LLC_T_LENGTH},\ + {"SNAP_LLC", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SNAP_LLC_T_SNAP_LLC},\ + {"snap_llc_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SNAP_LLC_T_FID_COUNT} + +/*! + * \name SVTAG_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SVTAG_T_DATA_LWR 0 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SVTAG_T_DATA_UPR 1 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SVTAG_T_FID_COUNT 2 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SVTAG_T_FIELD_NAME_MAP_INIT \ + {"DATA_LWR", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SVTAG_T_DATA_LWR},\ + {"DATA_UPR", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SVTAG_T_DATA_UPR},\ + {"svtag_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SVTAG_T_FID_COUNT} + +/*! + * \name TCP_FIRST_4BYTES_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT 2 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \ + {"DST_PORT", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\ + {"SRC_PORT", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\ + {"tcp_first_4bytes_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT} + +/*! + * \name TCP_LAST_16BYTES_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM 0 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM 1 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM 3 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR 4 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE 5 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT 6 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \ + {"ACK_NUM", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\ + {"CHECKSUM", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\ + {"HDR_LEN_AND_FLAGS", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\ + {"SEQ_NUM", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\ + {"URGENT_PTR", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\ + {"WIN_SIZE", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\ + {"tcp_last_16bytes_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT} + +/*! + * \name UDP_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UDP_T_CHECKSUM 0 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UDP_T_DST_PORT 1 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UDP_T_SRC_PORT 2 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UDP_T_UDP_LENGTH 3 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UDP_T_FID_COUNT 4 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UDP_T_CHECKSUM},\ + {"DST_PORT", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UDP_T_DST_PORT},\ + {"SRC_PORT", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UDP_T_SRC_PORT},\ + {"UDP_LENGTH", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UDP_T_UDP_LENGTH},\ + {"udp_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UDP_T_FID_COUNT} + +/*! + * \name UNKNOWN_L3_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD 1 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT 2 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \ + {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\ + {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\ + {"unknown_l3_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT} + +/*! + * \name UNKNOWN_L4_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT 1 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \ + {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\ + {"unknown_l4_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT} + +/*! + * \name UNKNOWN_L5_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_8_9 3 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT 4 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \ + {"L5_BYTES_0_1", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\ + {"L5_BYTES_2_3", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\ + {"L5_BYTES_4_7", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\ + {"L5_BYTES_8_9", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_8_9},\ + {"unknown_l5_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT} + +/*! + * \name VLAN_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_VLAN_T_CFI 0 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_VLAN_T_PCP 1 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_VLAN_T_TPID 2 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_VLAN_T_VID 3 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_VLAN_T_FID_COUNT 4 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \ + {"CFI", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_VLAN_T_CFI},\ + {"PCP", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_VLAN_T_PCP},\ + {"TPID", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_VLAN_T_TPID},\ + {"VID", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_VLAN_T_VID},\ + {"vlan_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_VLAN_T_FID_COUNT} + +/*! + * \name VXLAN_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_VXLAN_T_RESERVED2 1 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_VXLAN_T_VN_ID 2 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_VXLAN_T_FID_COUNT 3 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \ + {"FLAGS_RESERVED_1", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\ + {"RESERVED2", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_VXLAN_T_RESERVED2},\ + {"VN_ID", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_VXLAN_T_VN_ID},\ + {"vxlan_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_VXLAN_T_FID_COUNT} + +/*! + * \name WESP_T field IDs. + */ +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_WESP_T_FLAGS 0 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_WESP_T_HEADER_LEN 1 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_WESP_T_NEXT_HEADER 2 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_WESP_T_SEQ_NUM 3 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_WESP_T_SPI 4 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_WESP_T_TRAILER_LEN 5 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_WESP_T_WESP_IV 6 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_WESP_T_FID_COUNT 7 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT \ + {"FLAGS", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_WESP_T_FLAGS},\ + {"HEADER_LEN", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_WESP_T_HEADER_LEN},\ + {"NEXT_HEADER", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_WESP_T_NEXT_HEADER},\ + {"SEQ_NUM", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_WESP_T_SEQ_NUM},\ + {"SPI", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_WESP_T_SPI},\ + {"TRAILER_LEN", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_WESP_T_TRAILER_LEN},\ + {"WESP_IV", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_WESP_T_WESP_IV},\ + {"wesp_t fid count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_WESP_T_FID_COUNT} + + +#endif /* BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_FLEXHDR_DATA_H */ diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_32_4_0/bcm56890_a0_dna_6_5_32_4_0_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_32_4_0/bcm56890_a0_dna_6_5_32_4_0_bcmpkt_rxpmd_flex_data.h new file mode 100644 index 00000000000..cab2684ae61 --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_32_4_0/bcm56890_a0_dna_6_5_32_4_0_bcmpkt_rxpmd_flex_data.h @@ -0,0 +1,194 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) map.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_DATA_H +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_DATA_H + +/*! + * \name RX flex metadata field IDs. + */ +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_BSCAN_CONTROL_DATA_15_0 0 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_BSCAN_CONTROL_FLAGS_3_0 1 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0 2 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_DNAT_CTRL_3_0 3 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0 4 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_DVP_15_0 5 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_AND_SNAT_CTRL_15_0 6 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0 7 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0 8 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0 9 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0 10 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0 11 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0 12 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16 13 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0 14 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16 15 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32 16 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_FLOW_ID_LSB_15_0 17 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_FLOW_ID_MSB_3_0 18 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0 19 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0 20 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0 21 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0 22 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16 23 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_INGRESS_DEVICE_PORT_8_0 24 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 25 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0 26 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0 27 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_L2_IIF_12_0 28 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_L2_OIF_12_0 29 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_L3_DNAT_INDEX_15_0 30 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0 31 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0 32 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_L3_SNAT_INDEX_15_0 33 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_MAC_DA_23_20_3_0 34 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_MPLS_LABEL_DECAP_COUNT_3_0 35 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0 36 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0 37 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0 38 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0 39 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_SVP_15_0 40 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0 41 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_SVTAG_CTRL_PKT_INFO_3_0 42 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_SVTAG_SC_INDEX_OR_IFP_OPAQUE_OBJ_15_0 43 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_SVTAG_SC_INDEX_STR_ALLOW_NAT_3_0 44 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0 45 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0 46 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0 47 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0 48 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0 49 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_VFI_15_0 50 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0 51 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_FID_COUNT 52 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_COUNT 48 + +/*! + * \name Packet Flex Reason Types. + */ +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE 0 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS 1 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_DEFAULT 2 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED 3 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED 4 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED 5 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED 6 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP 7 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT 8 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT_HPAE_MISS 9 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_IFP 10 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER 11 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED 12 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT 13 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP 14 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS 15 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE 16 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP 17 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS 18 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR 19 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF 20 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR 21 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL 22 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD 23 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0 24 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1 25 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2 26 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3 27 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4 28 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5 29 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6 30 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7 31 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD 32 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED 33 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED 34 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU 35 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU 36 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED 37 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT 38 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP 39 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD 40 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_SRV6 41 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_SVP 42 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP 43 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU 44 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR 45 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED 46 +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_VFP 47 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \ + {"CB_STATION_MOVE", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE},\ + {"CML_FLAGS", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\ + {"DEFAULT", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_DEFAULT},\ + {"DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED},\ + {"DLB_ECMP_PKT_SAMPLED", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED},\ + {"DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED},\ + {"DLB_LAG_PKT_SAMPLED", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED},\ + {"DST_FP", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP},\ + {"EM_FT", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT},\ + {"EM_FT_HPAE_MISS", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT_HPAE_MISS},\ + {"IFP", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_IFP},\ + {"IFP_METER", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\ + {"IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED},\ + {"IVXLT", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\ + {"L2_DST_LOOKUP", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\ + {"L2_DST_LOOKUP_MISS", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\ + {"L2_SRC_STATIC_MOVE", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\ + {"L3_DST_LOOKUP", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\ + {"L3_DST_LOOKUP_MISS", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\ + {"L3_HDR_ERROR", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\ + {"L3_IIF_EQ_L3_OIF", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF},\ + {"L3_TTL_ERROR", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\ + {"LEARN_CACHE_FULL", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\ + {"MACSA_MULTICAST_RSVD", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD},\ + {"MATCHED_RULE_BIT_0", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0},\ + {"MATCHED_RULE_BIT_1", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1},\ + {"MATCHED_RULE_BIT_2", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2},\ + {"MATCHED_RULE_BIT_3", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3},\ + {"MATCHED_RULE_BIT_4", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4},\ + {"MATCHED_RULE_BIT_5", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5},\ + {"MATCHED_RULE_BIT_6", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6},\ + {"MATCHED_RULE_BIT_7", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7},\ + {"MEMBERSHIP_CHECK_FAILED_RSVD", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD},\ + {"MIRROR_SAMPLER_EGR_SAMPLED", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED},\ + {"MIRROR_SAMPLER_SAMPLED", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED},\ + {"MPLS_CTRL_PKT_TO_CPU", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU},\ + {"NO_COPY_TO_CPU", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\ + {"PKT_INTEGRITY_CHECK_FAILED", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\ + {"PROTOCOL_PKT", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\ + {"SER_DROP", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP},\ + {"SPANNING_TREE_CHECK_FAILED_RSVD", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD},\ + {"SRV6", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_SRV6},\ + {"SVP", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_SVP},\ + {"TRACE_DOP", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\ + {"TRACE_DO_NOT_COPY_TO_CPU", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU},\ + {"TRACE_DO_NOT_MIRROR", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR},\ + {"URPF_CHECK_FAILED", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED},\ + {"VFP", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_VFP},\ + {"flex reason count", BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_COUNT} + +#endif /* BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_DATA_H */ diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_32_4_0/bcm56890_a0_dna_6_5_32_4_0_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_32_4_0/bcm56890_a0_dna_6_5_32_4_0_bcmpkt_rxpmd_match_id_defs.h new file mode 100644 index 00000000000..7216ecda1d9 --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_32_4_0/bcm56890_a0_dna_6_5_32_4_0_bcmpkt_rxpmd_match_id_defs.h @@ -0,0 +1,509 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) bcm56890_a0_dna_6_5_32_4_0_sf_match_id_info.yml + * for device bcm56890_a0 and variant dna_6_5_32_4_0. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H + +#include + +/*! + * \brief Get the Match ID DataBase information. + * + * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information. +*/ +extern bcmpkt_rxpmd_match_id_db_info_t * + bcm56890_a0_dna_6_5_32_4_0_rxpmd_match_id_db_info_get(void); + +/*! + * \brief Get the Match ID Mapping information. + * + * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information. +*/ +extern bcmpkt_rxpmd_match_id_map_info_t * + bcm56890_a0_dna_6_5_32_4_0_rxpmd_match_id_map_info_get(void); + +/*! + \name RXPMD Match IDs +*/ +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_CNTAG 0 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM 1 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE 2 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0 3 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG 4 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 5 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE 6 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG 7 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC 8 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG 9 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP 10 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 11 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 12 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD 13 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1 14 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2 15 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT 16 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE 17 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 18 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 19 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE 20 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE 21 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM 22 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY 23 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT 24 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ 25 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1 26 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2 27 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP 28 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER 29 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE 30 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP 31 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E 32 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 33 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 34 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 35 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 36 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 37 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 38 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 39 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 40 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 41 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH 42 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW 43 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE 44 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 45 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1 46 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2 47 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP 48 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1 49 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2 50 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES 51 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES 52 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP 53 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 54 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 55 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 56 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN 57 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1 58 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2 59 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH 60 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK 61 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE 62 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_CNTAG 63 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM 64 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE 65 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0 66 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG 67 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 68 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE 69 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG 70 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC 71 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG 72 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP 73 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 74 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 75 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD 76 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1 77 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2 78 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT 79 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE 80 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 81 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 82 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE 83 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE 84 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM 85 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY 86 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT 87 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ 88 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1 89 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2 90 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP 91 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER 92 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE 93 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP 94 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E 95 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 96 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 97 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 98 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 99 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 100 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 101 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 102 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 103 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 104 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH 105 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW 106 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE 107 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 108 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1 109 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2 110 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP 111 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1 112 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2 113 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES 114 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES 115 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP 116 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 117 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 118 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 119 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN 120 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1 121 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2 122 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_CNTAG 123 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG 124 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 125 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE 126 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG 127 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC 128 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP 129 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 130 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 131 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD 132 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1 133 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2 134 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT 135 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE 136 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 137 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 138 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1 139 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2 140 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP 141 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER 142 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE 143 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP 144 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 145 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 146 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE 147 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 148 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1 149 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2 150 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP 151 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1 152 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2 153 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES 154 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES 155 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP 156 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 157 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 158 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 159 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1 160 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2 161 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_CNTAG 162 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM 163 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE 164 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0 165 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG 166 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 167 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE 168 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG 169 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC 170 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG 171 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP 172 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 173 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 174 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD 175 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1 176 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2 177 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT 178 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE 179 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 180 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 181 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE 182 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE 183 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM 184 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY 185 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT 186 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ 187 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1 188 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2 189 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP 190 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER 191 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE 192 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP 193 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E 194 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 195 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 196 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 197 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 198 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 199 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 200 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 201 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 202 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 203 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH 204 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW 205 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE 206 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 207 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1 208 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2 209 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP 210 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1 211 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2 212 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES 213 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES 214 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP 215 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 216 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 217 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 218 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN 219 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1 220 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2 221 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH 222 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK 223 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE 224 +#define BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_COUNT 225 + +#define BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \ + {"EGRESS_PKT_FWD_L2_HDR_CNTAG", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_CNTAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM}, \ + {"EGRESS_PKT_FWD_L2_HDR_HG3_BASE", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE}, \ + {"EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0}, \ + {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \ + {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \ + {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC}, \ + {"EGRESS_PKT_FWD_L2_HDR_SVTAG", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_BFD", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GPE", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IGMP", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_P_1588", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2}, \ + {"EGRESS_PKT_SYS_HDR_EP_NIH", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH}, \ + {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \ + {"EGRESS_PKT_SYS_HDR_NONE", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_CNTAG", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_CNTAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_SVTAG", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2}, \ + {"INGRESS_PKT_INNER_L2_HDR_CNTAG", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_CNTAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \ + {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \ + {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_BFD", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IGMP", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_P_1588", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2}, \ + {"INGRESS_PKT_OUTER_L2_HDR_CNTAG", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_CNTAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM}, \ + {"INGRESS_PKT_OUTER_L2_HDR_HG3_BASE", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE}, \ + {"INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0}, \ + {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \ + {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \ + {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC}, \ + {"INGRESS_PKT_OUTER_L2_HDR_SVTAG", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_BFD", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GPE", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2}, \ + {"INGRESS_PKT_SYS_HDR_EP_NIH", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH}, \ + {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \ + {"INGRESS_PKT_SYS_HDR_NONE", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \ + {"rxpmd_match_id_count", BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_COUNT} + +#endif /*! BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H */ diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/cna_6_5_32_3_0/bcm78800_a0_cna_6_5_32_3_0_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/cna_6_5_32_3_0/bcm78800_a0_cna_6_5_32_3_0_bcmpkt_flexhdr.h new file mode 100644 index 00000000000..fa112f154b2 --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/cna_6_5_32_3_0/bcm78800_a0_cna_6_5_32_3_0_bcmpkt_flexhdr.h @@ -0,0 +1,94 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) header.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_FLEXHDR_H +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_FLEXHDR_H + +#include + +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T 0 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T 1 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T 2 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T 3 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T 4 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T 5 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ETHERTYPE_T 6 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T 7 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T 8 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T 9 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T 10 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T 11 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_L2_T 12 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_ERSPAN_SN_T 13 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_TRANSPORT_T 14 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T 15 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T 16 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T 17 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T 18 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T 19 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T 20 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T 21 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L4_T 22 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T 23 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T 24 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T 25 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_T 26 + +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_FLEXHDR_COUNT 27 + +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_FLEXHDR_NAME_MAP_INIT \ + {"arp_t", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T},\ + {"cpu_composites_0_t", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T},\ + {"cpu_composites_1_t", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T},\ + {"ep_nih_header_t", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T},\ + {"erspan3_fixed_hdr_t", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T},\ + {"erspan3_subhdr_5_t", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T},\ + {"ethertype_t", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ETHERTYPE_T},\ + {"generic_loopback_t", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T},\ + {"icmp_t", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T},\ + {"ipfix_t", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T},\ + {"ipv4_t", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T},\ + {"ipv6_t", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T},\ + {"l2_t", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_L2_T},\ + {"mirror_erspan_sn_t", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_ERSPAN_SN_T},\ + {"mirror_transport_t", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_TRANSPORT_T},\ + {"psamp_mirror_on_drop_0_t", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\ + {"psamp_mirror_on_drop_3_t", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T},\ + {"rarp_t", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T},\ + {"tcp_first_4bytes_t", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T},\ + {"tcp_last_16bytes_t", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T},\ + {"udp_t", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T},\ + {"unknown_l3_t", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T},\ + {"unknown_l4_t", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L4_T},\ + {"unknown_l5_t", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T},\ + {"vlan_t", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T},\ + {"vxlan_t", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T},\ + {"RXPMD_FLEX_T", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_T},\ + {"flexhdr count", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_FLEXHDR_COUNT} + +#endif /* BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_FLEXHDR_H */ diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/cna_6_5_32_3_0/bcm78800_a0_cna_6_5_32_3_0_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/cna_6_5_32_3_0/bcm78800_a0_cna_6_5_32_3_0_bcmpkt_flexhdr_data.h new file mode 100644 index 00000000000..5dfb1d73ff6 --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/cna_6_5_32_3_0/bcm78800_a0_cna_6_5_32_3_0_bcmpkt_flexhdr_data.h @@ -0,0 +1,573 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) header.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_FLEXHDR_DATA_H +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_FLEXHDR_DATA_H + +/*! + * \name ARP_T field IDs. + */ +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_HARDWARE_LEN 0 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_HARDWARE_TYPE 1 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_OPERATION 2 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_PROT_ADDR_LEN 3 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_PROTOCOL_TYPE 4 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_SENDER_HA 5 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_SENDER_IP 6 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_TARGET_HA 7 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_TARGET_IP 8 + +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_FID_COUNT 9 + +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \ + {"HARDWARE_LEN", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_HARDWARE_LEN},\ + {"HARDWARE_TYPE", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_HARDWARE_TYPE},\ + {"OPERATION", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_OPERATION},\ + {"PROT_ADDR_LEN", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_PROT_ADDR_LEN},\ + {"PROTOCOL_TYPE", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_PROTOCOL_TYPE},\ + {"SENDER_HA", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_SENDER_HA},\ + {"SENDER_IP", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_SENDER_IP},\ + {"TARGET_HA", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_TARGET_HA},\ + {"TARGET_IP", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_TARGET_IP},\ + {"arp_t fid count", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_FID_COUNT} + +/*! + * \name CPU_COMPOSITES_0_T field IDs. + */ +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6 + +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT 7 + +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \ + {"DMA_CONT0", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\ + {"DMA_CONT1", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\ + {"DMA_CONT2", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\ + {"DMA_CONT3", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\ + {"DMA_CONT4", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\ + {"DMA_CONT5", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\ + {"DMA_CONT6", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\ + {"cpu_composites_0_t fid count", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT} + +/*! + * \name CPU_COMPOSITES_1_T field IDs. + */ +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7 8 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8 9 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9 10 + +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT 11 + +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \ + {"DMA_CONT10", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\ + {"DMA_CONT11", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\ + {"DMA_CONT12", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\ + {"DMA_CONT13", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\ + {"DMA_CONT14", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\ + {"DMA_CONT15", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\ + {"DMA_CONT16", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\ + {"DMA_CONT17", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\ + {"DMA_CONT7", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\ + {"DMA_CONT8", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\ + {"DMA_CONT9", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\ + {"cpu_composites_1_t fid count", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT} + +/*! + * \name EP_NIH_HEADER_T field IDs. + */ +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE 0 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE 1 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A 2 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B 3 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C 4 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A 5 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B 6 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C 7 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX 8 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0 9 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_START 10 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP 11 + +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT 12 + +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT \ + {"HEADER_SUBTYPE", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE},\ + {"HEADER_TYPE", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE},\ + {"OPAQUE_CTRL_A", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A},\ + {"OPAQUE_CTRL_B", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B},\ + {"OPAQUE_CTRL_C", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C},\ + {"OPAQUE_OBJECT_A", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A},\ + {"OPAQUE_OBJECT_B", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B},\ + {"OPAQUE_OBJECT_C", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C},\ + {"RECIRC_PROFILE_INDEX", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX},\ + {"RESERVED_0", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0},\ + {"START", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_START},\ + {"TIMESTAMP", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP},\ + {"ep_nih_header_t fid count", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT} + +/*! + * \name ERSPAN3_FIXED_HDR_T field IDs. + */ +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO 0 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS 1 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID 2 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID 4 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T 5 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP 6 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER 7 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN 8 + +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT 9 + +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \ + {"BSO", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\ + {"COS", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\ + {"GBP_SID", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\ + {"P_FT_HWID_D_GRA_O", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\ + {"SESSION_ID", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\ + {"T", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\ + {"TIMESTAMP", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\ + {"VER", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\ + {"VLAN", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\ + {"erspan3_fixed_hdr_t fid count", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT} + +/*! + * \name ERSPAN3_SUBHDR_5_T field IDs. + */ +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID 1 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID 2 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP 3 + +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT 4 + +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \ + {"PLATFORM_ID", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\ + {"PORT_ID", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\ + {"SWITCH_ID", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\ + {"TIMESTAMP", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\ + {"erspan3_subhdr_5_t fid count", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT} + +/*! + * \name ETHERTYPE_T field IDs. + */ +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ETHERTYPE_T_TYPE 0 + +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT 1 + +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \ + {"TYPE", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ETHERTYPE_T_TYPE},\ + {"ethertype_t fid count", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT} + +/*! + * \name GENERIC_LOOPBACK_T field IDs. + */ +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ 0 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE 1 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ 2 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS 3 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE 4 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY 5 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL 6 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ 7 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0 8 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1 9 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ 10 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1 11 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2 12 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 13 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE 14 + +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT 15 + +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \ + {"DESTINATION_OBJ", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\ + {"DESTINATION_TYPE", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\ + {"ENTROPY_OBJ", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\ + {"FLAGS", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\ + {"HEADER_TYPE", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\ + {"INPUT_PRIORITY", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\ + {"INTERFACE_CTRL", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\ + {"INTERFACE_OBJ", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\ + {"PROCESSING_CTRL_0", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\ + {"PROCESSING_CTRL_1", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\ + {"QOS_OBJ", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\ + {"RESERVED_1", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\ + {"RESERVED_2", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2},\ + {"SOURCE_SYSTEM_PORT", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\ + {"START_BYTE", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\ + {"generic_loopback_t fid count", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT} + +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP 0 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF 1 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED 2 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP 3 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP 4 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP 5 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP 6 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP 7 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1 8 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10 + +/*! + * \name ICMP_T field IDs. + */ +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T_CHECKSUM 0 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T_CODE 1 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T_ICMP_TYPE 2 + +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T_FID_COUNT 3 + +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T_CHECKSUM},\ + {"CODE", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T_CODE},\ + {"ICMP_TYPE", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T_ICMP_TYPE},\ + {"icmp_t fid count", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T_FID_COUNT} + +/*! + * \name IPFIX_T field IDs. + */ +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_EXPORT_TIME 0 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_LENGTH 1 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_SEQUENCE_NUM 3 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_VERSION 4 + +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_FID_COUNT 5 + +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \ + {"EXPORT_TIME", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_EXPORT_TIME},\ + {"LENGTH", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_LENGTH},\ + {"OBS_DOMAIN_ID", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\ + {"SEQUENCE_NUM", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_SEQUENCE_NUM},\ + {"VERSION", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_VERSION},\ + {"ipfix_t fid count", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_FID_COUNT} + +/*! + * \name IPV4_T field IDs. + */ +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_DA 0 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_HDR_CHECKSUM 2 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_ID 3 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_OPTION 4 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_PROTOCOL 5 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_SA 6 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_TOS 7 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_TOTAL_LENGTH 8 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_TTL 9 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_VERSION_HDR_LEN 10 + +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_FID_COUNT 11 + +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \ + {"DA", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_DA},\ + {"FLAGS_FRAG_OFFSET", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\ + {"HDR_CHECKSUM", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_HDR_CHECKSUM},\ + {"ID", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_ID},\ + {"OPTION", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_OPTION},\ + {"PROTOCOL", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_PROTOCOL},\ + {"SA", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_SA},\ + {"TOS", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_TOS},\ + {"TOTAL_LENGTH", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_TOTAL_LENGTH},\ + {"TTL", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_TTL},\ + {"VERSION_HDR_LEN", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_VERSION_HDR_LEN},\ + {"ipv4_t fid count", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_FID_COUNT} + +/*! + * \name IPV6_T field IDs. + */ +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_DA 0 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_FLOW_LABEL 1 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_HOP_LIMIT 2 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_NEXT_HEADER 3 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_SA 5 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_TRAFFIC_CLASS 6 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_VERSION 7 + +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_FID_COUNT 8 + +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \ + {"DA", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_DA},\ + {"FLOW_LABEL", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_FLOW_LABEL},\ + {"HOP_LIMIT", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_HOP_LIMIT},\ + {"NEXT_HEADER", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_NEXT_HEADER},\ + {"PAYLOAD_LENGTH", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\ + {"SA", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_SA},\ + {"TRAFFIC_CLASS", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_TRAFFIC_CLASS},\ + {"VERSION", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_VERSION},\ + {"ipv6_t fid count", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_FID_COUNT} + +/*! + * \name L2_T field IDs. + */ +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_L2_T_MACDA 0 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_L2_T_MACSA 1 + +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_L2_T_FID_COUNT 2 + +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \ + {"MACDA", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_L2_T_MACDA},\ + {"MACSA", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_L2_T_MACSA},\ + {"l2_t fid count", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_L2_T_FID_COUNT} + +/*! + * \name MIRROR_ERSPAN_SN_T field IDs. + */ +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0 + +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT 1 + +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \ + {"SEQ_NUM", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\ + {"mirror_erspan_sn_t fid count", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT} + +/*! + * \name MIRROR_TRANSPORT_T field IDs. + */ +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_TRANSPORT_T_DATA 0 + +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT 1 + +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \ + {"DATA", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_TRANSPORT_T_DATA},\ + {"mirror_transport_t fid count", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT} + +/*! + * \name PSAMP_MIRROR_ON_DROP_0_T field IDs. + */ +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT 1 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH 2 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS 3 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S 4 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID 5 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID 6 + +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT 7 + +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \ + {"EGRESS_MOD_PORT", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\ + {"INGRESS_PORT", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\ + {"LENGTH", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\ + {"OBS_TIME_NS", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\ + {"OBS_TIME_S", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\ + {"SWITCH_ID", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\ + {"TEMPLATE_ID", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\ + {"psamp_mirror_on_drop_0_t fid count", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT} + +/*! + * \name PSAMP_MIRROR_ON_DROP_3_T field IDs. + */ +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON 0 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0 1 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH 2 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE 3 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX 4 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA 5 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR 6 + +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT 7 + +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT \ + {"DROP_REASON", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON},\ + {"RESERVED_0", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0},\ + {"SAMPLED_LENGTH", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH},\ + {"SMOD_STATE", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE},\ + {"UC_COS__COLOR__PROB_IDX", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX},\ + {"USER_META_DATA", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA},\ + {"VAR_LEN_INDICATOR", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR},\ + {"psamp_mirror_on_drop_3_t fid count", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT} + +/*! + * \name RARP_T field IDs. + */ +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_HARDWARE_LEN 0 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_HARDWARE_TYPE 1 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_OPERATION 2 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_PROT_ADDR_LEN 3 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_PROTOCOL_TYPE 4 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_SENDER_HA 5 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_SENDER_IP 6 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_TARGET_HA 7 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_TARGET_IP 8 + +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_FID_COUNT 9 + +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \ + {"HARDWARE_LEN", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_HARDWARE_LEN},\ + {"HARDWARE_TYPE", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_HARDWARE_TYPE},\ + {"OPERATION", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_OPERATION},\ + {"PROT_ADDR_LEN", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_PROT_ADDR_LEN},\ + {"PROTOCOL_TYPE", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_PROTOCOL_TYPE},\ + {"SENDER_HA", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_SENDER_HA},\ + {"SENDER_IP", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_SENDER_IP},\ + {"TARGET_HA", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_TARGET_HA},\ + {"TARGET_IP", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_TARGET_IP},\ + {"rarp_t fid count", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_FID_COUNT} + +/*! + * \name TCP_FIRST_4BYTES_T field IDs. + */ +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1 + +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT 2 + +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \ + {"DST_PORT", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\ + {"SRC_PORT", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\ + {"tcp_first_4bytes_t fid count", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT} + +/*! + * \name TCP_LAST_16BYTES_T field IDs. + */ +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM 0 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM 1 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM 3 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR 4 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE 5 + +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT 6 + +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \ + {"ACK_NUM", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\ + {"CHECKSUM", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\ + {"HDR_LEN_AND_FLAGS", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\ + {"SEQ_NUM", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\ + {"URGENT_PTR", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\ + {"WIN_SIZE", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\ + {"tcp_last_16bytes_t fid count", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT} + +/*! + * \name UDP_T field IDs. + */ +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_CHECKSUM 0 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_DST_PORT 1 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_SRC_PORT 2 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_UDP_LENGTH 3 + +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_FID_COUNT 4 + +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \ + {"CHECKSUM", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_CHECKSUM},\ + {"DST_PORT", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_DST_PORT},\ + {"SRC_PORT", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_SRC_PORT},\ + {"UDP_LENGTH", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_UDP_LENGTH},\ + {"udp_t fid count", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_FID_COUNT} + +/*! + * \name UNKNOWN_L3_T field IDs. + */ +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD 1 + +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT 2 + +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \ + {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\ + {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\ + {"unknown_l3_t fid count", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT} + +/*! + * \name UNKNOWN_L4_T field IDs. + */ +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0 + +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT 1 + +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \ + {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\ + {"unknown_l4_t fid count", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT} + +/*! + * \name UNKNOWN_L5_T field IDs. + */ +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2 + +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT 3 + +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \ + {"L5_BYTES_0_1", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\ + {"L5_BYTES_2_3", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\ + {"L5_BYTES_4_7", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\ + {"unknown_l5_t fid count", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT} + +/*! + * \name VLAN_T field IDs. + */ +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_CFI 0 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_PCP 1 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_TPID 2 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_VID 3 + +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_FID_COUNT 4 + +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \ + {"CFI", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_CFI},\ + {"PCP", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_PCP},\ + {"TPID", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_TPID},\ + {"VID", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_VID},\ + {"vlan_t fid count", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_FID_COUNT} + +/*! + * \name VXLAN_T field IDs. + */ +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T_RESERVED2 1 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T_VN_ID 2 + +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T_FID_COUNT 3 + +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \ + {"FLAGS_RESERVED_1", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\ + {"RESERVED2", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T_RESERVED2},\ + {"VN_ID", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T_VN_ID},\ + {"vxlan_t fid count", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T_FID_COUNT} + + +#endif /* BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_FLEXHDR_DATA_H */ diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/cna_6_5_32_3_0/bcm78800_a0_cna_6_5_32_3_0_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/cna_6_5_32_3_0/bcm78800_a0_cna_6_5_32_3_0_bcmpkt_rxpmd_flex_data.h new file mode 100644 index 00000000000..00c36abf368 --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/cna_6_5_32_3_0/bcm78800_a0_cna_6_5_32_3_0_bcmpkt_rxpmd_flex_data.h @@ -0,0 +1,127 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) map.yml. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_DATA_H +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_DATA_H + +/*! + * \name RX flex metadata field IDs. + */ +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0 0 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_DVP_15_0 1 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0 2 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0 3 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0 4 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_DROP_CODE_15_0 5 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0 6 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0 7 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16 8 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_ERSPAN3_GBP_SID_15_0 9 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0 10 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16 11 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32 12 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0 13 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0 14 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0 15 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16 16 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0 17 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 18 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0 19 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0 20 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_L2_IIF_11_0 21 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_L2_OIF_11_0 22 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0 23 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0 24 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_14_0 25 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_14_0 26 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0 27 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0 28 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_SVP_15_0 29 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0 30 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0 31 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0 32 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0 33 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_TAG_ACTION_CTRL_1_0 34 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0 35 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_VFI_15_0 36 + +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_FID_COUNT 37 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_COUNT 22 + +/*! + * \name Packet Flex Reason Types. + */ +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS 0 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT 1 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP 2 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER 3 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT 4 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP 5 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS 6 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD 7 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE 8 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP 9 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS 10 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR 11 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR 12 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL 13 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST 14 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED 15 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU 16 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED 17 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT 18 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED 19 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP 20 +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_VFP 21 + +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \ + {"CML_FLAGS", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\ + {"EM_FT", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT},\ + {"IFP", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP},\ + {"IFP_METER", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\ + {"IVXLT", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\ + {"L2_DST_LOOKUP", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\ + {"L2_DST_LOOKUP_MISS", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\ + {"L2_SRC_DISCARD", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD},\ + {"L2_SRC_STATIC_MOVE", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\ + {"L3_DST_LOOKUP", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\ + {"L3_DST_LOOKUP_MISS", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\ + {"L3_HDR_ERROR", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\ + {"L3_TTL_ERROR", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\ + {"LEARN_CACHE_FULL", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\ + {"MACSA_MULTICAST", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST},\ + {"MEMBERSHIP_CHECK_FAILED", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED},\ + {"NO_COPY_TO_CPU", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\ + {"PKT_INTEGRITY_CHECK_FAILED", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\ + {"PROTOCOL_PKT", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\ + {"SPANNING_TREE_CHECK_FAILED", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED},\ + {"TRACE_DOP", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\ + {"VFP", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_VFP},\ + {"flex reason count", BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_COUNT} + +#endif /* BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_DATA_H */ diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/cna_6_5_32_3_0/bcm78800_a0_cna_6_5_32_3_0_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/cna_6_5_32_3_0/bcm78800_a0_cna_6_5_32_3_0_bcmpkt_rxpmd_match_id_defs.h new file mode 100644 index 00000000000..db5d01fc302 --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/cna_6_5_32_3_0/bcm78800_a0_cna_6_5_32_3_0_bcmpkt_rxpmd_match_id_defs.h @@ -0,0 +1,213 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) bcm78800_a0_cna_6_5_32_3_0_sf_match_id_info.yml + * for device bcm78800_a0 and variant cna_6_5_32_3_0. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#ifndef BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H + +#include + +/*! + * \brief Get the Match ID DataBase information. + * + * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information. +*/ +extern bcmpkt_rxpmd_match_id_db_info_t * + bcm78800_a0_cna_6_5_32_3_0_rxpmd_match_id_db_info_get(void); + +/*! + * \brief Get the Match ID Mapping information. + * + * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information. +*/ +extern bcmpkt_rxpmd_match_id_map_info_t * + bcm78800_a0_cna_6_5_32_3_0_rxpmd_match_id_map_info_get(void); + +/*! + \name RXPMD Match IDs +*/ +#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG 0 +#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 1 +#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE 2 +#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG 3 +#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP 4 +#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE 5 +#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP 6 +#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 7 +#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 8 +#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE 9 +#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP 10 +#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES 11 +#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES 12 +#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP 13 +#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 14 +#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 15 +#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 16 +#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN 17 +#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH 18 +#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK 19 +#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE 20 +#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG 21 +#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 22 +#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE 23 +#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG 24 +#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP 25 +#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE 26 +#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP 27 +#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 28 +#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 29 +#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE 30 +#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP 31 +#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES 32 +#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES 33 +#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP 34 +#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 35 +#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 36 +#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 37 +#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN 38 +#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG 39 +#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 40 +#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE 41 +#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG 42 +#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP 43 +#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE 44 +#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP 45 +#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 46 +#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 47 +#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE 48 +#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP 49 +#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES 50 +#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES 51 +#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP 52 +#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 53 +#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 54 +#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 55 +#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG 56 +#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 57 +#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE 58 +#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG 59 +#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP 60 +#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE 61 +#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP 62 +#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 63 +#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 64 +#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE 65 +#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP 66 +#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES 67 +#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES 68 +#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP 69 +#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 70 +#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 71 +#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 72 +#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN 73 +#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH 74 +#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK 75 +#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE 76 +#define BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_COUNT 77 + +#define BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \ + {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \ + {"EGRESS_PKT_FWD_L2_HDR_L2", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \ + {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \ + {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \ + {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \ + {"EGRESS_PKT_SYS_HDR_EP_NIH", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH}, \ + {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \ + {"EGRESS_PKT_SYS_HDR_NONE", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \ + {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \ + {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \ + {"INGRESS_PKT_INNER_L2_HDR_L2", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \ + {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \ + {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \ + {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \ + {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \ + {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \ + {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \ + {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \ + {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \ + {"INGRESS_PKT_SYS_HDR_EP_NIH", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH}, \ + {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \ + {"INGRESS_PKT_SYS_HDR_NONE", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \ + {"rxpmd_match_id_count", BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_COUNT} + +#endif /*! BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_bcmpkt_flexhdr.h similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_bcmpkt_flexhdr.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_bcmpkt_flexhdr.h index e83461b206f..e843951594c 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_bcmpkt_flexhdr.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_bcmpkt_flexhdr.h @@ -5,8 +5,8 @@ * from the NPL output file(s) header.yml. * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -20,6 +20,7 @@ * * A copy of the GNU General Public License version 2 (GPLv2) can * be found in the LICENSES folder. + * All Rights Reserved.$ * * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser * diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_bcmpkt_flexhdr_data.h similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_bcmpkt_flexhdr_data.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_bcmpkt_flexhdr_data.h index 65be463028a..a9e24a3ea50 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_bcmpkt_flexhdr_data.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_bcmpkt_flexhdr_data.h @@ -5,8 +5,8 @@ * from the NPL output file(s) header.yml. * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -20,6 +20,7 @@ * * A copy of the GNU General Public License version 2 (GPLv2) can * be found in the LICENSES folder. + * All Rights Reserved.$ * * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser * diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_bcmpkt_rxpmd_flex_data.h similarity index 96% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_bcmpkt_rxpmd_flex_data.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_bcmpkt_rxpmd_flex_data.h index 7b265043419..bbfa0a86d87 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_bcmpkt_rxpmd_flex_data.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_bcmpkt_rxpmd_flex_data.h @@ -5,8 +5,8 @@ * from the NPL output file(s) map.yml. * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -20,6 +20,7 @@ * * A copy of the GNU General Public License version 2 (GPLv2) can * be found in the LICENSES folder. + * All Rights Reserved.$ * * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser * @@ -87,13 +88,13 @@ */ #define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE 0 #define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS 1 -#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_DEFAULT_OR_IDEV_CONFIG_TO_CPU 2 -#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED 3 -#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED 4 -#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED 5 -#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED 6 -#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP 7 -#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT 8 +#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED 2 +#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED 3 +#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED 4 +#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED 5 +#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP 6 +#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT 7 +#define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IDEV_CONFIG_TO_CPU 8 #define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP 9 #define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER 10 #define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED 11 @@ -136,13 +137,13 @@ #define BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \ {"CB_STATION_MOVE", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE},\ {"CML_FLAGS", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\ - {"DEFAULT_OR_IDEV_CONFIG_TO_CPU", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_DEFAULT_OR_IDEV_CONFIG_TO_CPU},\ {"DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED},\ {"DLB_ECMP_PKT_SAMPLED", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED},\ {"DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED},\ {"DLB_LAG_PKT_SAMPLED", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED},\ {"DST_FP", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP},\ {"EM_FT", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT},\ + {"IDEV_CONFIG_TO_CPU", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IDEV_CONFIG_TO_CPU},\ {"IFP", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP},\ {"IFP_METER", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\ {"IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED", BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED},\ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_bcmpkt_rxpmd_match_id_defs.h similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_bcmpkt_rxpmd_match_id_defs.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_bcmpkt_rxpmd_match_id_defs.h index c8a068c0493..7146b679d46 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_bcmpkt_rxpmd_match_id_defs.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_bcmpkt_rxpmd_match_id_defs.h @@ -6,8 +6,8 @@ * for device bcm78800_a0 and variant dna_6_5_32_3_0. * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -21,6 +21,7 @@ * * A copy of the GNU General Public License version 2 (GPLv2) can * be found in the LICENSES folder. + * All Rights Reserved.$ * * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser * diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/lbpmd/bcmpkt_lbhdr.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/lbpmd/bcmpkt_lbhdr.c similarity index 98% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/lbpmd/bcmpkt_lbhdr.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/lbpmd/bcmpkt_lbhdr.c index 23ed7c9c257..e1223a59fd5 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/lbpmd/bcmpkt_lbhdr.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/lbpmd/bcmpkt_lbhdr.c @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/rxpmd/bcmpkt_rxpmd.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/rxpmd/bcmpkt_rxpmd.c similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/rxpmd/bcmpkt_rxpmd.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/rxpmd/bcmpkt_rxpmd.c index 245d116b55a..10209b8db5b 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/rxpmd/bcmpkt_rxpmd.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/rxpmd/bcmpkt_rxpmd.c @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/rxpmd/bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/rxpmd/bcmpkt_rxpmd_match_id.c similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/rxpmd/bcmpkt_rxpmd_match_id.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/rxpmd/bcmpkt_rxpmd_match_id.c index b77dd37653e..50e036f2886 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/rxpmd/bcmpkt_rxpmd_match_id.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/rxpmd/bcmpkt_rxpmd_match_id.c @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/txpmd/bcmpkt_txpmd.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/txpmd/bcmpkt_txpmd.c similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/txpmd/bcmpkt_txpmd.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/txpmd/bcmpkt_txpmd.c index d698d6730cf..ea4f41ed999 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/txpmd/bcmpkt_txpmd.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/txpmd/bcmpkt_txpmd.c @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/util/bcmpkt_util.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/util/bcmpkt_util.c similarity index 98% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/util/bcmpkt_util.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/util/bcmpkt_util.c index e05e2c14020..0811bda80f2 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/util/bcmpkt_util.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/util/bcmpkt_util.c @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/xfcr/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_bcmpkt_rxpmd_match_id.c similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_bcmpkt_rxpmd_match_id.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/xfcr/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_bcmpkt_rxpmd_match_id.c index 9e9f6881415..da113538082 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_bcmpkt_rxpmd_match_id.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/xfcr/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_bcmpkt_rxpmd_match_id.c @@ -6,8 +6,8 @@ * for device bcm56690_a0 and variant dna_6_5_32_5_0. * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -21,6 +21,7 @@ * * A copy of the GNU General Public License version 2 (GPLv2) can * be found in the LICENSES folder. + * All Rights Reserved.$ * * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser * diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_pkt_flexhdr.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/xfcr/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_pkt_flexhdr.c similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_pkt_flexhdr.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/xfcr/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_pkt_flexhdr.c index a02071ac1fc..848134e208e 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_pkt_flexhdr.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/xfcr/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_pkt_flexhdr.c @@ -6,8 +6,8 @@ * for device bcm56690_a0 and variant dna_6_5_32_5_0. * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -21,6 +21,7 @@ * * A copy of the GNU General Public License version 2 (GPLv2) can * be found in the LICENSES folder. + * All Rights Reserved.$ * * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser * diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/xfcr/bcm56780_a0/cna_6_5_32_3_0/bcm56780_a0_cna_6_5_32_3_0_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/xfcr/bcm56780_a0/cna_6_5_32_3_0/bcm56780_a0_cna_6_5_32_3_0_bcmpkt_rxpmd_match_id.c new file mode 100644 index 00000000000..9bc67525023 --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/xfcr/bcm56780_a0/cna_6_5_32_3_0/bcm56780_a0_cna_6_5_32_3_0_bcmpkt_rxpmd_match_id.c @@ -0,0 +1,1178 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) bcm56780_a0_cna_6_5_32_3_0_sf_match_id_info.yml + * for device bcm56780_a0 and variant cna_6_5_32_3_0. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + + +#include +#include + + +static bcmpkt_rxpmd_match_id_db_t +bcm56780_a0_cna_6_5_32_3_0_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_COUNT] = { + { + /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_ITAG", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 16, + .match_minbit = 13, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 38, + .pminbit = 35, + + }, + { + /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */ + .name = "EGRESS_PKT_FWD_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 16, + .match_minbit = 13, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 38, + .pminbit = 35, + + }, + { + /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */ + .name = "EGRESS_PKT_FWD_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0xf, + .match_maxbit = 16, + .match_minbit = 13, + .maxbit = 3, + .minbit = 0, + .value = 0x0, + .pmaxbit = 38, + .pminbit = 35, + + }, + { + /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_OTAG", + .match = 0x8, + .match_mask = 0x8, + .match_maxbit = 16, + .match_minbit = 13, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 38, + .pminbit = 35, + + }, + { + /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_SVTAG", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 16, + .match_minbit = 13, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 38, + .pminbit = 35, + + }, + { + /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ARP", + .match = 0x20, + .match_mask = 0x66, + .match_maxbit = 23, + .match_minbit = 17, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 49, + + }, + { + /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 23, + .match_minbit = 17, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 49, + + }, + { + /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ICMP", + .match = 0x40, + .match_mask = 0x66, + .match_maxbit = 23, + .match_minbit = 17, + .maxbit = 6, + .minbit = 5, + .value = 0x2, + .pmaxbit = 55, + .pminbit = 49, + + }, + { + /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV4", + .match = 0x8, + .match_mask = 0x18, + .match_maxbit = 23, + .match_minbit = 17, + .maxbit = 4, + .minbit = 3, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 49, + + }, + { + /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV6", + .match = 0x10, + .match_mask = 0x18, + .match_maxbit = 23, + .match_minbit = 17, + .maxbit = 4, + .minbit = 3, + .value = 0x2, + .pmaxbit = 55, + .pminbit = 49, + + }, + { + /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x7f, + .match_maxbit = 23, + .match_minbit = 17, + .maxbit = 6, + .minbit = 0, + .value = 0x0, + .pmaxbit = 55, + .pminbit = 49, + + }, + { + /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_RARP", + .match = 0x2, + .match_mask = 0x6, + .match_maxbit = 23, + .match_minbit = 17, + .maxbit = 2, + .minbit = 1, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 49, + + }, + { + /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x4, + .match_mask = 0x6, + .match_maxbit = 23, + .match_minbit = 17, + .maxbit = 2, + .minbit = 1, + .value = 0x2, + .pmaxbit = 55, + .pminbit = 49, + + }, + { + /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x24, + .match_mask = 0x66, + .match_maxbit = 23, + .match_minbit = 17, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 49, + + }, + { + /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UDP", + .match = 0x6, + .match_mask = 0x6, + .match_maxbit = 23, + .match_minbit = 17, + .maxbit = 2, + .minbit = 1, + .value = 0x3, + .pmaxbit = 55, + .pminbit = 49, + + }, + { + /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", + .match = 0x18, + .match_mask = 0x18, + .match_maxbit = 23, + .match_minbit = 17, + .maxbit = 4, + .minbit = 3, + .value = 0x3, + .pmaxbit = 55, + .pminbit = 49, + + }, + { + /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", + .match = 0x60, + .match_mask = 0x60, + .match_maxbit = 23, + .match_minbit = 17, + .maxbit = 6, + .minbit = 5, + .value = 0x3, + .pmaxbit = 55, + .pminbit = 49, + + }, + { + /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", + .match = 0x46, + .match_mask = 0x66, + .match_maxbit = 23, + .match_minbit = 17, + .maxbit = 6, + .minbit = 5, + .value = 0x2, + .pmaxbit = 55, + .pminbit = 49, + + }, + { + /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", + .match = 0x26, + .match_mask = 0x66, + .match_maxbit = 23, + .match_minbit = 17, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 55, + .pminbit = 49, + + }, + { + /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH */ + .name = "EGRESS_PKT_SYS_HDR_EP_NIH", + .match = 0x2, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x2, + .pmaxbit = 1, + .pminbit = 0, + + }, + { + /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */ + .name = "EGRESS_PKT_SYS_HDR_LOOPBACK", + .match = 0x1, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x1, + .pmaxbit = 1, + .pminbit = 0, + + }, + { + /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */ + .name = "EGRESS_PKT_SYS_HDR_NONE", + .match = 0x0, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x0, + .pmaxbit = 1, + .pminbit = 0, + + }, + { + /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_ITAG", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 5, + .match_minbit = 2, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 10, + .pminbit = 7, + + }, + { + /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 5, + .match_minbit = 2, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 10, + .pminbit = 7, + + }, + { + /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0xf, + .match_maxbit = 5, + .match_minbit = 2, + .maxbit = 3, + .minbit = 0, + .value = 0x0, + .pmaxbit = 10, + .pminbit = 7, + + }, + { + /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_OTAG", + .match = 0x8, + .match_mask = 0x8, + .match_maxbit = 5, + .match_minbit = 2, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 10, + .pminbit = 7, + + }, + { + /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_SVTAG", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 5, + .match_minbit = 2, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 10, + .pminbit = 7, + + }, + { + /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", + .match = 0x20, + .match_mask = 0x66, + .match_maxbit = 12, + .match_minbit = 6, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 21, + + }, + { + /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 12, + .match_minbit = 6, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 21, + + }, + { + /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", + .match = 0x40, + .match_mask = 0x66, + .match_maxbit = 12, + .match_minbit = 6, + .maxbit = 6, + .minbit = 5, + .value = 0x2, + .pmaxbit = 27, + .pminbit = 21, + + }, + { + /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", + .match = 0x8, + .match_mask = 0x18, + .match_maxbit = 12, + .match_minbit = 6, + .maxbit = 4, + .minbit = 3, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 21, + + }, + { + /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", + .match = 0x10, + .match_mask = 0x18, + .match_maxbit = 12, + .match_minbit = 6, + .maxbit = 4, + .minbit = 3, + .value = 0x2, + .pmaxbit = 27, + .pminbit = 21, + + }, + { + /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x7f, + .match_maxbit = 12, + .match_minbit = 6, + .maxbit = 6, + .minbit = 0, + .value = 0x0, + .pmaxbit = 27, + .pminbit = 21, + + }, + { + /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", + .match = 0x2, + .match_mask = 0x6, + .match_maxbit = 12, + .match_minbit = 6, + .maxbit = 2, + .minbit = 1, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 21, + + }, + { + /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x4, + .match_mask = 0x6, + .match_maxbit = 12, + .match_minbit = 6, + .maxbit = 2, + .minbit = 1, + .value = 0x2, + .pmaxbit = 27, + .pminbit = 21, + + }, + { + /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x24, + .match_mask = 0x66, + .match_maxbit = 12, + .match_minbit = 6, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 21, + + }, + { + /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", + .match = 0x6, + .match_mask = 0x6, + .match_maxbit = 12, + .match_minbit = 6, + .maxbit = 2, + .minbit = 1, + .value = 0x3, + .pmaxbit = 27, + .pminbit = 21, + + }, + { + /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", + .match = 0x18, + .match_mask = 0x18, + .match_maxbit = 12, + .match_minbit = 6, + .maxbit = 4, + .minbit = 3, + .value = 0x3, + .pmaxbit = 27, + .pminbit = 21, + + }, + { + /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", + .match = 0x60, + .match_mask = 0x60, + .match_maxbit = 12, + .match_minbit = 6, + .maxbit = 6, + .minbit = 5, + .value = 0x3, + .pmaxbit = 27, + .pminbit = 21, + + }, + { + /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", + .match = 0x46, + .match_mask = 0x66, + .match_maxbit = 12, + .match_minbit = 6, + .maxbit = 6, + .minbit = 5, + .value = 0x2, + .pmaxbit = 27, + .pminbit = 21, + + }, + { + /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", + .match = 0x26, + .match_mask = 0x66, + .match_maxbit = 12, + .match_minbit = 6, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 27, + .pminbit = 21, + + }, + { + /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_ITAG", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 16, + .match_minbit = 13, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 16, + .pminbit = 13, + + }, + { + /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */ + .name = "INGRESS_PKT_INNER_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 16, + .match_minbit = 13, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 16, + .pminbit = 13, + + }, + { + /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */ + .name = "INGRESS_PKT_INNER_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0xf, + .match_maxbit = 16, + .match_minbit = 13, + .maxbit = 3, + .minbit = 0, + .value = 0x0, + .pmaxbit = 16, + .pminbit = 13, + + }, + { + /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_OTAG", + .match = 0x8, + .match_mask = 0x8, + .match_maxbit = 16, + .match_minbit = 13, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 16, + .pminbit = 13, + + }, + { + /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ARP", + .match = 0x20, + .match_mask = 0x66, + .match_maxbit = 23, + .match_minbit = 17, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 23, + .pminbit = 17, + + }, + { + /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 23, + .match_minbit = 17, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 23, + .pminbit = 17, + + }, + { + /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ICMP", + .match = 0x40, + .match_mask = 0x66, + .match_maxbit = 23, + .match_minbit = 17, + .maxbit = 6, + .minbit = 5, + .value = 0x2, + .pmaxbit = 23, + .pminbit = 17, + + }, + { + /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV4", + .match = 0x8, + .match_mask = 0x18, + .match_maxbit = 23, + .match_minbit = 17, + .maxbit = 4, + .minbit = 3, + .value = 0x1, + .pmaxbit = 23, + .pminbit = 17, + + }, + { + /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV6", + .match = 0x10, + .match_mask = 0x18, + .match_maxbit = 23, + .match_minbit = 17, + .maxbit = 4, + .minbit = 3, + .value = 0x2, + .pmaxbit = 23, + .pminbit = 17, + + }, + { + /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x7f, + .match_maxbit = 23, + .match_minbit = 17, + .maxbit = 6, + .minbit = 0, + .value = 0x0, + .pmaxbit = 23, + .pminbit = 17, + + }, + { + /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_RARP", + .match = 0x2, + .match_mask = 0x6, + .match_maxbit = 23, + .match_minbit = 17, + .maxbit = 2, + .minbit = 1, + .value = 0x1, + .pmaxbit = 23, + .pminbit = 17, + + }, + { + /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x4, + .match_mask = 0x6, + .match_maxbit = 23, + .match_minbit = 17, + .maxbit = 2, + .minbit = 1, + .value = 0x2, + .pmaxbit = 23, + .pminbit = 17, + + }, + { + /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x24, + .match_mask = 0x66, + .match_maxbit = 23, + .match_minbit = 17, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 23, + .pminbit = 17, + + }, + { + /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UDP", + .match = 0x6, + .match_mask = 0x6, + .match_maxbit = 23, + .match_minbit = 17, + .maxbit = 2, + .minbit = 1, + .value = 0x3, + .pmaxbit = 23, + .pminbit = 17, + + }, + { + /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", + .match = 0x18, + .match_mask = 0x18, + .match_maxbit = 23, + .match_minbit = 17, + .maxbit = 4, + .minbit = 3, + .value = 0x3, + .pmaxbit = 23, + .pminbit = 17, + + }, + { + /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", + .match = 0x60, + .match_mask = 0x60, + .match_maxbit = 23, + .match_minbit = 17, + .maxbit = 6, + .minbit = 5, + .value = 0x3, + .pmaxbit = 23, + .pminbit = 17, + + }, + { + /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", + .match = 0x46, + .match_mask = 0x66, + .match_maxbit = 23, + .match_minbit = 17, + .maxbit = 6, + .minbit = 5, + .value = 0x2, + .pmaxbit = 23, + .pminbit = 17, + + }, + { + /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_ITAG", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 5, + .match_minbit = 2, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 5, + .pminbit = 2, + + }, + { + /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */ + .name = "INGRESS_PKT_OUTER_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 5, + .match_minbit = 2, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 5, + .pminbit = 2, + + }, + { + /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */ + .name = "INGRESS_PKT_OUTER_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0xf, + .match_maxbit = 5, + .match_minbit = 2, + .maxbit = 3, + .minbit = 0, + .value = 0x0, + .pmaxbit = 5, + .pminbit = 2, + + }, + { + /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_OTAG", + .match = 0x8, + .match_mask = 0x8, + .match_maxbit = 5, + .match_minbit = 2, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 5, + .pminbit = 2, + + }, + { + /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_SVTAG", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 5, + .match_minbit = 2, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 5, + .pminbit = 2, + + }, + { + /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ARP", + .match = 0x20, + .match_mask = 0x66, + .match_maxbit = 12, + .match_minbit = 6, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 12, + .pminbit = 6, + + }, + { + /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 12, + .match_minbit = 6, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 12, + .pminbit = 6, + + }, + { + /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", + .match = 0x40, + .match_mask = 0x66, + .match_maxbit = 12, + .match_minbit = 6, + .maxbit = 6, + .minbit = 5, + .value = 0x2, + .pmaxbit = 12, + .pminbit = 6, + + }, + { + /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", + .match = 0x8, + .match_mask = 0x18, + .match_maxbit = 12, + .match_minbit = 6, + .maxbit = 4, + .minbit = 3, + .value = 0x1, + .pmaxbit = 12, + .pminbit = 6, + + }, + { + /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", + .match = 0x10, + .match_mask = 0x18, + .match_maxbit = 12, + .match_minbit = 6, + .maxbit = 4, + .minbit = 3, + .value = 0x2, + .pmaxbit = 12, + .pminbit = 6, + + }, + { + /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x7f, + .match_maxbit = 12, + .match_minbit = 6, + .maxbit = 6, + .minbit = 0, + .value = 0x0, + .pmaxbit = 12, + .pminbit = 6, + + }, + { + /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_RARP", + .match = 0x2, + .match_mask = 0x6, + .match_maxbit = 12, + .match_minbit = 6, + .maxbit = 2, + .minbit = 1, + .value = 0x1, + .pmaxbit = 12, + .pminbit = 6, + + }, + { + /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x4, + .match_mask = 0x6, + .match_maxbit = 12, + .match_minbit = 6, + .maxbit = 2, + .minbit = 1, + .value = 0x2, + .pmaxbit = 12, + .pminbit = 6, + + }, + { + /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x24, + .match_mask = 0x66, + .match_maxbit = 12, + .match_minbit = 6, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 12, + .pminbit = 6, + + }, + { + /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UDP", + .match = 0x6, + .match_mask = 0x6, + .match_maxbit = 12, + .match_minbit = 6, + .maxbit = 2, + .minbit = 1, + .value = 0x3, + .pmaxbit = 12, + .pminbit = 6, + + }, + { + /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", + .match = 0x18, + .match_mask = 0x18, + .match_maxbit = 12, + .match_minbit = 6, + .maxbit = 4, + .minbit = 3, + .value = 0x3, + .pmaxbit = 12, + .pminbit = 6, + + }, + { + /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", + .match = 0x60, + .match_mask = 0x60, + .match_maxbit = 12, + .match_minbit = 6, + .maxbit = 6, + .minbit = 5, + .value = 0x3, + .pmaxbit = 12, + .pminbit = 6, + + }, + { + /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", + .match = 0x46, + .match_mask = 0x66, + .match_maxbit = 12, + .match_minbit = 6, + .maxbit = 6, + .minbit = 5, + .value = 0x2, + .pmaxbit = 12, + .pminbit = 6, + + }, + { + /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", + .match = 0x26, + .match_mask = 0x66, + .match_maxbit = 12, + .match_minbit = 6, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 12, + .pminbit = 6, + + }, + { + /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH */ + .name = "INGRESS_PKT_SYS_HDR_EP_NIH", + .match = 0x2, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x2, + .pmaxbit = 1, + .pminbit = 0, + + }, + { + /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */ + .name = "INGRESS_PKT_SYS_HDR_LOOPBACK", + .match = 0x1, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x1, + .pmaxbit = 1, + .pminbit = 0, + + }, + { + /* BCM56780_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */ + .name = "INGRESS_PKT_SYS_HDR_NONE", + .match = 0x0, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x0, + .pmaxbit = 1, + .pminbit = 0, + + }, +}; + +static bcmpkt_rxpmd_match_id_db_info_t bcm56780_a0_cna_6_5_32_3_0_rxpmd_match_id_db_info = { + .num_entries = 80, + .db = bcm56780_a0_cna_6_5_32_3_0_rxpmd_match_id_db +}; +bcmpkt_rxpmd_match_id_db_info_t * bcm56780_a0_cna_6_5_32_3_0_rxpmd_match_id_db_info_get(void) { + return &bcm56780_a0_cna_6_5_32_3_0_rxpmd_match_id_db_info; +} + +static shr_enum_map_t bcm56780_a0_cna_6_5_32_3_0_rxpmd_match_id_map[] = { + BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_rxpmd_match_id_map_info_t bcm56780_a0_cna_6_5_32_3_0_rxpmd_match_id_map_info = { + .num_entries = 80, + .map = bcm56780_a0_cna_6_5_32_3_0_rxpmd_match_id_map +}; + +bcmpkt_rxpmd_match_id_map_info_t * bcm56780_a0_cna_6_5_32_3_0_rxpmd_match_id_map_info_get(void) { + return &bcm56780_a0_cna_6_5_32_3_0_rxpmd_match_id_map_info; +} diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/xfcr/bcm56780_a0/cna_6_5_32_3_0/bcm56780_a0_cna_6_5_32_3_0_pkt_flexhdr.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/xfcr/bcm56780_a0/cna_6_5_32_3_0/bcm56780_a0_cna_6_5_32_3_0_pkt_flexhdr.c new file mode 100644 index 00000000000..7edcb34ae0e --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/xfcr/bcm56780_a0/cna_6_5_32_3_0/bcm56780_a0_cna_6_5_32_3_0_pkt_flexhdr.c @@ -0,0 +1,3902 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) map.yml + * for device bcm56780_a0 and variant cna_6_5_32_3_0. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#include +#include +#include +#include +#include +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) + +static void bcm56780_a0_cna_6_5_32_3_0_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons) +{ + uint32_t *reason = data + 0; + + if (reason[13] & (0x1 << 0)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU); + } + if (reason[13] & (0x1 << 1)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS); + } + if (reason[13] & (0x1 << 2)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE); + } + if (reason[13] & (0x1 << 3)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD); + } + if (reason[13] & (0x1 << 4)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST); + } + if (reason[13] & (0x1 << 5)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED); + } + if (reason[13] & (0x1 << 6)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT); + } + if (reason[13] & (0x1 << 7)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED); + } + if (reason[13] & (0x1 << 8)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED); + } + if (reason[13] & (0x1 << 9)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS); + } + if (reason[13] & (0x1 << 10)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP); + } + if (reason[13] & (0x1 << 11)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS); + } + if (reason[13] & (0x1 << 12)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP); + } + if (reason[13] & (0x1 << 13)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR); + } + if (reason[13] & (0x1 << 14)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR); + } + if (reason[13] & (0x1 << 16)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL); + } + if (reason[13] & (0x1 << 17)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_VFP); + } + if (reason[13] & (0x1 << 18)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP); + } + if (reason[13] & (0x1 << 19)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER); + } + if (reason[13] & (0x1 << 22)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT); + } + if (reason[13] & (0x1 << 23)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT); + } + if (reason[12] & (0x1 << 15)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP); + } +} + +static void bcm56780_a0_cna_6_5_32_3_0_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data) +{ + uint32_t *reason = data + 0; + + reason[13] = 0; + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) { + reason[13] |= (0x1 << 0); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) { + reason[13] |= (0x1 << 1); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) { + reason[13] |= (0x1 << 2); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD)) { + reason[13] |= (0x1 << 3); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST)) { + reason[13] |= (0x1 << 4); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) { + reason[13] |= (0x1 << 5); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) { + reason[13] |= (0x1 << 6); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED)) { + reason[13] |= (0x1 << 7); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED)) { + reason[13] |= (0x1 << 8); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) { + reason[13] |= (0x1 << 9); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) { + reason[13] |= (0x1 << 10); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) { + reason[13] |= (0x1 << 11); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) { + reason[13] |= (0x1 << 12); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) { + reason[13] |= (0x1 << 13); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) { + reason[13] |= (0x1 << 14); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) { + reason[13] |= (0x1 << 16); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_VFP)) { + reason[13] |= (0x1 << 17); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP)) { + reason[13] |= (0x1 << 18); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) { + reason[13] |= (0x1 << 19); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT)) { + reason[13] |= (0x1 << 22); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) { + reason[13] |= (0x1 << 23); + } + reason[12] = 0; + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) { + reason[12] |= (0x1 << 15); + } +} + +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_32_3_0_rxpmd_flex_field_data[] = { + { + .name = "DROP_CODE_15_0", + .fid = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 48, 63 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { 48, 63 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "DVP_15_0", + .fid = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_DVP_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 352, 367 }, /* Profile 2. */ + { 352, 367 }, /* Profile 3. */ + { 352, 367 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "EFFECTIVE_TTL_7_0", + .fid = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 144, 151 }, /* Profile 2. */ + { 144, 151 }, /* Profile 3. */ + { 144, 151 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "ENTROPY_LABEL_HIGH_3_0", + .fid = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 436, 439 }, /* Profile 2. */ + { 436, 439 }, /* Profile 3. */ + { 436, 439 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "ENTROPY_LABEL_LOW_15_0", + .fid = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 176, 191 }, /* Profile 2. */ + { 176, 191 }, /* Profile 3. */ + { 176, 191 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "EP_NIH_HDR_DROP_CODE_15_0", + .fid = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_DROP_CODE_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { 48, 63 }, /* Profile 3. */ + }, + .profile_cnt = 4, + }, + { + .name = "EP_NIH_HDR_RECIRC_CODE_3_0", + .fid = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 416, 419 }, /* Profile 2. */ + { 416, 419 }, /* Profile 3. */ + { 416, 419 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "EP_NIH_HDR_TIMESTAMP_15_0", + .fid = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 288, 303 }, /* Profile 2. */ + { 288, 303 }, /* Profile 3. */ + }, + .profile_cnt = 4, + }, + { + .name = "EP_NIH_HDR_TIMESTAMP_31_16", + .fid = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 304, 319 }, /* Profile 2. */ + { 304, 319 }, /* Profile 3. */ + }, + .profile_cnt = 4, + }, + { + .name = "ERSPAN3_GBP_SID_15_0", + .fid = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_ERSPAN3_GBP_SID_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 160, 175 }, /* Profile 2. */ + { 160, 175 }, /* Profile 3. */ + { 160, 175 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "EVENT_TRACE_VECTOR_15_0", + .fid = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 0, 15 }, /* Profile 2. */ + { 0, 15 }, /* Profile 3. */ + { 0, 15 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "EVENT_TRACE_VECTOR_31_16", + .fid = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 16, 31 }, /* Profile 2. */ + { 16, 31 }, /* Profile 3. */ + { 16, 31 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "EVENT_TRACE_VECTOR_47_32", + .fid = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 32, 47 }, /* Profile 2. */ + { 32, 47 }, /* Profile 3. */ + { 32, 47 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "I2E_CLASS_ID_15_0", + .fid = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 336, 351 }, /* Profile 2. */ + { 336, 351 }, /* Profile 3. */ + { 336, 351 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "IFP_TO_EP_MACSEC_INFO_OR_IFP_OPAQUE_OBJ_15_0", + .fid = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_IFP_TO_EP_MACSEC_INFO_OR_IFP_OPAQUE_OBJ_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 384, 399 }, /* Profile 2. */ + { 384, 399 }, /* Profile 3. */ + { 384, 399 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "IFP_TS_CONTROL_ACTION_3_0", + .fid = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 404, 407 }, /* Profile 2. */ + { 404, 407 }, /* Profile 3. */ + { 404, 407 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "ING_TIMESTAMP_15_0", + .fid = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { 288, 303 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "ING_TIMESTAMP_31_16", + .fid = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { 304, 319 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "INGRESS_PP_PORT_7_0", + .fid = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 272, 279 }, /* Profile 2. */ + { 272, 279 }, /* Profile 3. */ + { 272, 279 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0", + .fid = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 192, 207 }, /* Profile 2. */ + { 192, 207 }, /* Profile 3. */ + { 192, 207 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "INGRESS_QOS_REMARK_CTRL_3_0", + .fid = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 424, 427 }, /* Profile 2. */ + { 424, 427 }, /* Profile 3. */ + { 424, 427 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "INT_PRI_3_0", + .fid = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 408, 411 }, /* Profile 2. */ + { 408, 411 }, /* Profile 3. */ + { 408, 411 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "L2_IIF_10_0", + .fid = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 320, 330 }, /* Profile 2. */ + { 320, 330 }, /* Profile 3. */ + { 320, 330 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "L2_OIF_10_0", + .fid = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 240, 250 }, /* Profile 2. */ + { 240, 250 }, /* Profile 3. */ + { 240, 250 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "L3_IIF_13_0", + .fid = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 368, 381 }, /* Profile 2. */ + { 368, 381 }, /* Profile 3. */ + { 368, 381 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "L3_OIF_1_13_0", + .fid = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 256, 269 }, /* Profile 2. */ + { 256, 269 }, /* Profile 3. */ + { 256, 269 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "NHOP_2_OR_ECMP_GROUP_INDEX_1_14_0", + .fid = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_14_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 80, 94 }, /* Profile 2. */ + { 80, 94 }, /* Profile 3. */ + { 80, 94 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "NHOP_INDEX_1_14_0", + .fid = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_14_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 96, 110 }, /* Profile 2. */ + { 96, 110 }, /* Profile 3. */ + { 96, 110 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "PARSER_VHLEN_0_15_0", + .fid = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 64, 79 }, /* Profile 2. */ + { 64, 79 }, /* Profile 3. */ + { 64, 79 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "PKT_MISC_CTRL_0_3_0", + .fid = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 420, 423 }, /* Profile 2. */ + { 420, 423 }, /* Profile 3. */ + { 420, 423 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "SVP_15_0", + .fid = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_SVP_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 208, 223 }, /* Profile 2. */ + { 208, 223 }, /* Profile 3. */ + { 208, 223 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "SVP_NETWORK_GROUP_BITMAP_3_0", + .fid = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 412, 415 }, /* Profile 2. */ + { 412, 415 }, /* Profile 3. */ + { 412, 415 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "SYSTEM_DESTINATION_15_0", + .fid = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 128, 143 }, /* Profile 2. */ + { 128, 143 }, /* Profile 3. */ + { 128, 143 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "SYSTEM_OPCODE_3_0", + .fid = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 432, 435 }, /* Profile 2. */ + { 432, 435 }, /* Profile 3. */ + { 432, 435 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "SYSTEM_SOURCE_15_0", + .fid = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 112, 127 }, /* Profile 2. */ + { 112, 127 }, /* Profile 3. */ + { 112, 127 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "TAG_ACTION_CTRL_1_0", + .fid = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_TAG_ACTION_CTRL_1_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 400, 401 }, /* Profile 2. */ + { 400, 401 }, /* Profile 3. */ + { 400, 401 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "TUNNEL_PROCESSING_RESULTS_1_3_0", + .fid = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 428, 431 }, /* Profile 2. */ + { 428, 431 }, /* Profile 3. */ + { 428, 431 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "VFI_15_0", + .fid = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_VFI_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 224, 239 }, /* Profile 2. */ + { 224, 239 }, /* Profile 3. */ + { 224, 239 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, +}; +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_32_3_0_rxpmd_flex_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_FID_COUNT, + .info = bcm56780_a0_cna_6_5_32_3_0_rxpmd_flex_field_data, + .profile_bmp_cnt = 1, + .profile_bmp[0] = 0x1c, + +}; + +static shr_enum_map_t bcm56780_a0_cna_6_5_32_3_0_rxpmd_flex_reason_names[] = { + BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT +}; + +static bcmpkt_flex_reasons_info_t bcm56780_a0_cna_6_5_32_3_0_rxpmd_flex_reasons_info = { + .num_reasons = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_COUNT, + .reason_names = bcm56780_a0_cna_6_5_32_3_0_rxpmd_flex_reason_names, + .reason_encode = bcm56780_a0_cna_6_5_32_3_0_rxpmd_flex_reason_encode, + .reason_decode = bcm56780_a0_cna_6_5_32_3_0_rxpmd_flex_reason_decode, +}; + + +static int32_t bcmpkt_arp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_arp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_arp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_arp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_arp_t_operation_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_arp_t_operation_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_arp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_arp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_arp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_arp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_32_3_0_arp_t_fget[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_FID_COUNT] = { + bcmpkt_arp_t_hardware_len_get, + bcmpkt_arp_t_hardware_type_get, + bcmpkt_arp_t_operation_get, + bcmpkt_arp_t_prot_addr_len_get, + bcmpkt_arp_t_protocol_type_get, + bcmpkt_arp_t_sender_ha_get, + bcmpkt_arp_t_sender_ip_get, + bcmpkt_arp_t_target_ha_get, + bcmpkt_arp_t_target_ip_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_32_3_0_arp_t_fset[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_FID_COUNT] = { + bcmpkt_arp_t_hardware_len_set, + bcmpkt_arp_t_hardware_type_set, + bcmpkt_arp_t_operation_set, + bcmpkt_arp_t_prot_addr_len_set, + bcmpkt_arp_t_protocol_type_set, + bcmpkt_arp_t_sender_ha_set, + bcmpkt_arp_t_sender_ip_set, + bcmpkt_arp_t_target_ha_set, + bcmpkt_arp_t_target_ip_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_32_3_0_arp_t_field_data[] = { + BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_32_3_0_arp_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_32_3_0_arp_t_field_data, +}; + + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_32_3_0_cpu_composites_0_t_fget[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { + bcmpkt_cpu_composites_0_t_dma_cont0_get, + bcmpkt_cpu_composites_0_t_dma_cont1_get, + bcmpkt_cpu_composites_0_t_dma_cont2_get, + bcmpkt_cpu_composites_0_t_dma_cont3_get, + bcmpkt_cpu_composites_0_t_dma_cont4_get, + bcmpkt_cpu_composites_0_t_dma_cont5_get, + bcmpkt_cpu_composites_0_t_dma_cont6_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_32_3_0_cpu_composites_0_t_fset[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { + bcmpkt_cpu_composites_0_t_dma_cont0_set, + bcmpkt_cpu_composites_0_t_dma_cont1_set, + bcmpkt_cpu_composites_0_t_dma_cont2_set, + bcmpkt_cpu_composites_0_t_dma_cont3_set, + bcmpkt_cpu_composites_0_t_dma_cont4_set, + bcmpkt_cpu_composites_0_t_dma_cont5_set, + bcmpkt_cpu_composites_0_t_dma_cont6_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_32_3_0_cpu_composites_0_t_field_data[] = { + BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_32_3_0_cpu_composites_0_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_32_3_0_cpu_composites_0_t_field_data, +}; + + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_32_3_0_cpu_composites_1_t_fget[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { + bcmpkt_cpu_composites_1_t_dma_cont10_get, + bcmpkt_cpu_composites_1_t_dma_cont11_get, + bcmpkt_cpu_composites_1_t_dma_cont12_get, + bcmpkt_cpu_composites_1_t_dma_cont13_get, + bcmpkt_cpu_composites_1_t_dma_cont14_get, + bcmpkt_cpu_composites_1_t_dma_cont15_get, + bcmpkt_cpu_composites_1_t_dma_cont16_get, + bcmpkt_cpu_composites_1_t_dma_cont17_get, + bcmpkt_cpu_composites_1_t_dma_cont7_get, + bcmpkt_cpu_composites_1_t_dma_cont8_get, + bcmpkt_cpu_composites_1_t_dma_cont9_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_32_3_0_cpu_composites_1_t_fset[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { + bcmpkt_cpu_composites_1_t_dma_cont10_set, + bcmpkt_cpu_composites_1_t_dma_cont11_set, + bcmpkt_cpu_composites_1_t_dma_cont12_set, + bcmpkt_cpu_composites_1_t_dma_cont13_set, + bcmpkt_cpu_composites_1_t_dma_cont14_set, + bcmpkt_cpu_composites_1_t_dma_cont15_set, + bcmpkt_cpu_composites_1_t_dma_cont16_set, + bcmpkt_cpu_composites_1_t_dma_cont17_set, + bcmpkt_cpu_composites_1_t_dma_cont7_set, + bcmpkt_cpu_composites_1_t_dma_cont8_set, + bcmpkt_cpu_composites_1_t_dma_cont9_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_32_3_0_cpu_composites_1_t_field_data[] = { + BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_32_3_0_cpu_composites_1_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_32_3_0_cpu_composites_1_t_field_data, +}; + + +static int32_t bcmpkt_ep_nih_header_t_header_subtype_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_header_subtype_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_header_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 6); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_header_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 6, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 20, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_start_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 30, 2); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_start_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 30, 2, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_32_3_0_ep_nih_header_t_fget[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = { + bcmpkt_ep_nih_header_t_header_subtype_get, + bcmpkt_ep_nih_header_t_header_type_get, + bcmpkt_ep_nih_header_t_opaque_ctrl_a_get, + bcmpkt_ep_nih_header_t_opaque_ctrl_b_get, + bcmpkt_ep_nih_header_t_opaque_ctrl_c_get, + bcmpkt_ep_nih_header_t_opaque_object_a_get, + bcmpkt_ep_nih_header_t_opaque_object_b_get, + bcmpkt_ep_nih_header_t_opaque_object_c_get, + bcmpkt_ep_nih_header_t_recirc_profile_index_get, + bcmpkt_ep_nih_header_t_reserved_0_get, + bcmpkt_ep_nih_header_t_start_get, + bcmpkt_ep_nih_header_t_timestamp_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_32_3_0_ep_nih_header_t_fset[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = { + bcmpkt_ep_nih_header_t_header_subtype_set, + bcmpkt_ep_nih_header_t_header_type_set, + bcmpkt_ep_nih_header_t_opaque_ctrl_a_set, + bcmpkt_ep_nih_header_t_opaque_ctrl_b_set, + bcmpkt_ep_nih_header_t_opaque_ctrl_c_set, + bcmpkt_ep_nih_header_t_opaque_object_a_set, + bcmpkt_ep_nih_header_t_opaque_object_b_set, + bcmpkt_ep_nih_header_t_opaque_object_c_set, + bcmpkt_ep_nih_header_t_recirc_profile_index_set, + bcmpkt_ep_nih_header_t_reserved_0_set, + bcmpkt_ep_nih_header_t_start_set, + bcmpkt_ep_nih_header_t_timestamp_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_32_3_0_ep_nih_header_t_field_data[] = { + BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_32_3_0_ep_nih_header_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_32_3_0_ep_nih_header_t_field_data, +}; + + +static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 11, 2); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 11, 2, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 13, 3); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 13, 3, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 10); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 10, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_t_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 10, 1); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_t_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 10, 1, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 12); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 12, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_32_3_0_erspan3_fixed_hdr_t_fget[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { + bcmpkt_erspan3_fixed_hdr_t_bso_get, + bcmpkt_erspan3_fixed_hdr_t_cos_get, + bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get, + bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get, + bcmpkt_erspan3_fixed_hdr_t_session_id_get, + bcmpkt_erspan3_fixed_hdr_t_t_get, + bcmpkt_erspan3_fixed_hdr_t_timestamp_get, + bcmpkt_erspan3_fixed_hdr_t_ver_get, + bcmpkt_erspan3_fixed_hdr_t_vlan_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_32_3_0_erspan3_fixed_hdr_t_fset[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { + bcmpkt_erspan3_fixed_hdr_t_bso_set, + bcmpkt_erspan3_fixed_hdr_t_cos_set, + bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set, + bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set, + bcmpkt_erspan3_fixed_hdr_t_session_id_set, + bcmpkt_erspan3_fixed_hdr_t_t_set, + bcmpkt_erspan3_fixed_hdr_t_timestamp_set, + bcmpkt_erspan3_fixed_hdr_t_ver_set, + bcmpkt_erspan3_fixed_hdr_t_vlan_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_32_3_0_erspan3_fixed_hdr_t_field_data[] = { + BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_32_3_0_erspan3_fixed_hdr_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_32_3_0_erspan3_fixed_hdr_t_field_data, +}; + + +static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 26, 6); + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 26, 6, val); + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 10); + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 10, val); + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_32_3_0_erspan3_subhdr_5_t_fget[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { + bcmpkt_erspan3_subhdr_5_t_platform_id_get, + bcmpkt_erspan3_subhdr_5_t_port_id_get, + bcmpkt_erspan3_subhdr_5_t_switch_id_get, + bcmpkt_erspan3_subhdr_5_t_timestamp_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_32_3_0_erspan3_subhdr_5_t_fset[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { + bcmpkt_erspan3_subhdr_5_t_platform_id_set, + bcmpkt_erspan3_subhdr_5_t_port_id_set, + bcmpkt_erspan3_subhdr_5_t_switch_id_set, + bcmpkt_erspan3_subhdr_5_t_timestamp_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_32_3_0_erspan3_subhdr_5_t_field_data[] = { + BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_32_3_0_erspan3_subhdr_5_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_32_3_0_erspan3_subhdr_5_t_field_data, +}; + + +static int32_t bcmpkt_ethertype_t_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ethertype_t_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_32_3_0_ethertype_t_fget[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = { + bcmpkt_ethertype_t_type_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_32_3_0_ethertype_t_fset[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = { + bcmpkt_ethertype_t_type_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_32_3_0_ethertype_t_field_data[] = { + BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_32_3_0_ethertype_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_32_3_0_ethertype_t_field_data, +}; + + +static int32_t bcmpkt_generic_loopback_t_destination_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_destination_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_destination_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_destination_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_entropy_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_entropy_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_header_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_header_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_input_priority_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_input_priority_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_ctrl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 4, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_ctrl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 4, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 28, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_qos_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_qos_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_source_system_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_source_system_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_start_byte_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_start_byte_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_32_3_0_generic_loopback_t_fget[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { + bcmpkt_generic_loopback_t_destination_obj_get, + bcmpkt_generic_loopback_t_destination_type_get, + bcmpkt_generic_loopback_t_entropy_obj_get, + bcmpkt_generic_loopback_t_flags_get, + bcmpkt_generic_loopback_t_header_type_get, + bcmpkt_generic_loopback_t_input_priority_get, + bcmpkt_generic_loopback_t_interface_ctrl_get, + bcmpkt_generic_loopback_t_interface_obj_get, + bcmpkt_generic_loopback_t_processing_ctrl_0_get, + bcmpkt_generic_loopback_t_processing_ctrl_1_get, + bcmpkt_generic_loopback_t_qos_obj_get, + bcmpkt_generic_loopback_t_reserved_1_get, + bcmpkt_generic_loopback_t_reserved_2_get, + bcmpkt_generic_loopback_t_source_system_port_get, + bcmpkt_generic_loopback_t_start_byte_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_32_3_0_generic_loopback_t_fset[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { + bcmpkt_generic_loopback_t_destination_obj_set, + bcmpkt_generic_loopback_t_destination_type_set, + bcmpkt_generic_loopback_t_entropy_obj_set, + bcmpkt_generic_loopback_t_flags_set, + bcmpkt_generic_loopback_t_header_type_set, + bcmpkt_generic_loopback_t_input_priority_set, + bcmpkt_generic_loopback_t_interface_ctrl_set, + bcmpkt_generic_loopback_t_interface_obj_set, + bcmpkt_generic_loopback_t_processing_ctrl_0_set, + bcmpkt_generic_loopback_t_processing_ctrl_1_set, + bcmpkt_generic_loopback_t_qos_obj_set, + bcmpkt_generic_loopback_t_reserved_1_set, + bcmpkt_generic_loopback_t_reserved_2_set, + bcmpkt_generic_loopback_t_source_system_port_set, + bcmpkt_generic_loopback_t_start_byte_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_32_3_0_generic_loopback_t_field_data[] = { + BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_32_3_0_generic_loopback_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_32_3_0_generic_loopback_t_field_data, +}; + + +static int32_t bcmpkt_icmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_icmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_icmp_t_code_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_icmp_t_code_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_icmp_t_icmp_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_icmp_t_icmp_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_32_3_0_icmp_t_fget[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T_FID_COUNT] = { + bcmpkt_icmp_t_checksum_get, + bcmpkt_icmp_t_code_get, + bcmpkt_icmp_t_icmp_type_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_32_3_0_icmp_t_fset[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T_FID_COUNT] = { + bcmpkt_icmp_t_checksum_set, + bcmpkt_icmp_t_code_set, + bcmpkt_icmp_t_icmp_type_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_32_3_0_icmp_t_field_data[] = { + BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_32_3_0_icmp_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_32_3_0_icmp_t_field_data, +}; + + +static int32_t bcmpkt_ipfix_t_export_time_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_export_time_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipfix_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipfix_t_obs_domain_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_obs_domain_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ipfix_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_32_3_0_ipfix_t_fget[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_FID_COUNT] = { + bcmpkt_ipfix_t_export_time_get, + bcmpkt_ipfix_t_length_get, + bcmpkt_ipfix_t_obs_domain_id_get, + bcmpkt_ipfix_t_sequence_num_get, + bcmpkt_ipfix_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_32_3_0_ipfix_t_fset[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_FID_COUNT] = { + bcmpkt_ipfix_t_export_time_set, + bcmpkt_ipfix_t_length_set, + bcmpkt_ipfix_t_obs_domain_id_set, + bcmpkt_ipfix_t_sequence_num_set, + bcmpkt_ipfix_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_32_3_0_ipfix_t_field_data[] = { + BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_32_3_0_ipfix_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_32_3_0_ipfix_t_field_data, +}; + + +static int32_t bcmpkt_ipv4_t_da_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_da_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_flags_frag_offset_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_flags_frag_offset_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_hdr_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_hdr_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_option_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_option_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_protocol_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_protocol_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_sa_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_sa_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_tos_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_tos_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_total_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_total_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_ttl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_ttl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_version_hdr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_version_hdr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_32_3_0_ipv4_t_fget[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_FID_COUNT] = { + bcmpkt_ipv4_t_da_get, + bcmpkt_ipv4_t_flags_frag_offset_get, + bcmpkt_ipv4_t_hdr_checksum_get, + bcmpkt_ipv4_t_id_get, + bcmpkt_ipv4_t_option_get, + bcmpkt_ipv4_t_protocol_get, + bcmpkt_ipv4_t_sa_get, + bcmpkt_ipv4_t_tos_get, + bcmpkt_ipv4_t_total_length_get, + bcmpkt_ipv4_t_ttl_get, + bcmpkt_ipv4_t_version_hdr_len_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_32_3_0_ipv4_t_fset[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_FID_COUNT] = { + bcmpkt_ipv4_t_da_set, + bcmpkt_ipv4_t_flags_frag_offset_set, + bcmpkt_ipv4_t_hdr_checksum_set, + bcmpkt_ipv4_t_id_set, + bcmpkt_ipv4_t_option_set, + bcmpkt_ipv4_t_protocol_set, + bcmpkt_ipv4_t_sa_set, + bcmpkt_ipv4_t_tos_set, + bcmpkt_ipv4_t_total_length_set, + bcmpkt_ipv4_t_ttl_set, + bcmpkt_ipv4_t_version_hdr_len_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_32_3_0_ipv4_t_field_data[] = { + BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_32_3_0_ipv4_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_32_3_0_ipv4_t_field_data, +}; + + +static int32_t bcmpkt_ipv6_t_da_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_da_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_flow_label_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 20); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_flow_label_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 20, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_hop_limit_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 8); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_hop_limit_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 8, 8); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_payload_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_payload_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_sa_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_sa_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_traffic_class_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 8); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_traffic_class_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_32_3_0_ipv6_t_fget[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_FID_COUNT] = { + bcmpkt_ipv6_t_da_get, + bcmpkt_ipv6_t_flow_label_get, + bcmpkt_ipv6_t_hop_limit_get, + bcmpkt_ipv6_t_next_header_get, + bcmpkt_ipv6_t_payload_length_get, + bcmpkt_ipv6_t_sa_get, + bcmpkt_ipv6_t_traffic_class_get, + bcmpkt_ipv6_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_32_3_0_ipv6_t_fset[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_FID_COUNT] = { + bcmpkt_ipv6_t_da_set, + bcmpkt_ipv6_t_flow_label_set, + bcmpkt_ipv6_t_hop_limit_set, + bcmpkt_ipv6_t_next_header_set, + bcmpkt_ipv6_t_payload_length_set, + bcmpkt_ipv6_t_sa_set, + bcmpkt_ipv6_t_traffic_class_set, + bcmpkt_ipv6_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_32_3_0_ipv6_t_field_data[] = { + BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_32_3_0_ipv6_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_32_3_0_ipv6_t_field_data, +}; + + +static int32_t bcmpkt_l2_t_macda_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_l2_t_macda_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_l2_t_macsa_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_l2_t_macsa_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_32_3_0_l2_t_fget[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_L2_T_FID_COUNT] = { + bcmpkt_l2_t_macda_get, + bcmpkt_l2_t_macsa_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_32_3_0_l2_t_fset[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_L2_T_FID_COUNT] = { + bcmpkt_l2_t_macda_set, + bcmpkt_l2_t_macsa_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_32_3_0_l2_t_field_data[] = { + BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_32_3_0_l2_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_L2_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_32_3_0_l2_t_field_data, +}; + + +static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_32_3_0_mirror_erspan_sn_t_fget[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { + bcmpkt_mirror_erspan_sn_t_seq_num_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_32_3_0_mirror_erspan_sn_t_fset[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { + bcmpkt_mirror_erspan_sn_t_seq_num_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_32_3_0_mirror_erspan_sn_t_field_data[] = { + BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_32_3_0_mirror_erspan_sn_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_32_3_0_mirror_erspan_sn_t_field_data, +}; + + +static int32_t bcmpkt_mirror_transport_t_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_mirror_transport_t_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_32_3_0_mirror_transport_t_fget[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { + bcmpkt_mirror_transport_t_data_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_32_3_0_mirror_transport_t_fset[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { + bcmpkt_mirror_transport_t_data_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_32_3_0_mirror_transport_t_field_data[] = { + BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_32_3_0_mirror_transport_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_32_3_0_mirror_transport_t_field_data, +}; + + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[4], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[4], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[4], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[4], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_0_t_fget[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get, + bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get, + bcmpkt_psamp_mirror_on_drop_0_t_length_get, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get, + bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get, + bcmpkt_psamp_mirror_on_drop_0_t_template_id_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_0_t_fset[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set, + bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set, + bcmpkt_psamp_mirror_on_drop_0_t_length_set, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set, + bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set, + bcmpkt_psamp_mirror_on_drop_0_t_template_id_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_0_t_field_data[] = { + BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_0_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_0_t_field_data, +}; + + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 6); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 6, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_smod_state_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 22, 2); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_smod_state_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 22, 2, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_3_t_fget[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get, + bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get, + bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get, + bcmpkt_psamp_mirror_on_drop_3_t_smod_state_get, + bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get, + bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get, + bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_3_t_fset[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set, + bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set, + bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set, + bcmpkt_psamp_mirror_on_drop_3_t_smod_state_set, + bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set, + bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set, + bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_3_t_field_data[] = { + BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_3_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_3_t_field_data, +}; + + +static int32_t bcmpkt_rarp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_rarp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_rarp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_operation_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_rarp_t_operation_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_rarp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_rarp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_32_3_0_rarp_t_fget[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_FID_COUNT] = { + bcmpkt_rarp_t_hardware_len_get, + bcmpkt_rarp_t_hardware_type_get, + bcmpkt_rarp_t_operation_get, + bcmpkt_rarp_t_prot_addr_len_get, + bcmpkt_rarp_t_protocol_type_get, + bcmpkt_rarp_t_sender_ha_get, + bcmpkt_rarp_t_sender_ip_get, + bcmpkt_rarp_t_target_ha_get, + bcmpkt_rarp_t_target_ip_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_32_3_0_rarp_t_fset[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_FID_COUNT] = { + bcmpkt_rarp_t_hardware_len_set, + bcmpkt_rarp_t_hardware_type_set, + bcmpkt_rarp_t_operation_set, + bcmpkt_rarp_t_prot_addr_len_set, + bcmpkt_rarp_t_protocol_type_set, + bcmpkt_rarp_t_sender_ha_set, + bcmpkt_rarp_t_sender_ip_set, + bcmpkt_rarp_t_target_ha_set, + bcmpkt_rarp_t_target_ip_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_32_3_0_rarp_t_field_data[] = { + BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_32_3_0_rarp_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_32_3_0_rarp_t_field_data, +}; + + +static int32_t bcmpkt_svtag_t_data_lwr_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_svtag_t_data_lwr_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_svtag_t_data_upr_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_svtag_t_data_upr_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_32_3_0_svtag_t_fget[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_SVTAG_T_FID_COUNT] = { + bcmpkt_svtag_t_data_lwr_get, + bcmpkt_svtag_t_data_upr_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_32_3_0_svtag_t_fset[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_SVTAG_T_FID_COUNT] = { + bcmpkt_svtag_t_data_lwr_set, + bcmpkt_svtag_t_data_upr_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_32_3_0_svtag_t_field_data[] = { + BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_SVTAG_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_32_3_0_svtag_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_SVTAG_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_32_3_0_svtag_t_field_data, +}; + + +static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_first_4bytes_t_src_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_first_4bytes_t_src_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_32_3_0_tcp_first_4bytes_t_fget[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { + bcmpkt_tcp_first_4bytes_t_dst_port_get, + bcmpkt_tcp_first_4bytes_t_src_port_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_32_3_0_tcp_first_4bytes_t_fset[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { + bcmpkt_tcp_first_4bytes_t_dst_port_set, + bcmpkt_tcp_first_4bytes_t_src_port_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_32_3_0_tcp_first_4bytes_t_field_data[] = { + BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_32_3_0_tcp_first_4bytes_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_32_3_0_tcp_first_4bytes_t_field_data, +}; + + +static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_win_size_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_win_size_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_32_3_0_tcp_last_16bytes_t_fget[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { + bcmpkt_tcp_last_16bytes_t_ack_num_get, + bcmpkt_tcp_last_16bytes_t_checksum_get, + bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get, + bcmpkt_tcp_last_16bytes_t_seq_num_get, + bcmpkt_tcp_last_16bytes_t_urgent_ptr_get, + bcmpkt_tcp_last_16bytes_t_win_size_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_32_3_0_tcp_last_16bytes_t_fset[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { + bcmpkt_tcp_last_16bytes_t_ack_num_set, + bcmpkt_tcp_last_16bytes_t_checksum_set, + bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set, + bcmpkt_tcp_last_16bytes_t_seq_num_set, + bcmpkt_tcp_last_16bytes_t_urgent_ptr_set, + bcmpkt_tcp_last_16bytes_t_win_size_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_32_3_0_tcp_last_16bytes_t_field_data[] = { + BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_32_3_0_tcp_last_16bytes_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_32_3_0_tcp_last_16bytes_t_field_data, +}; + + +static int32_t bcmpkt_udp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_udp_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_dst_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_udp_t_src_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_src_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_udp_t_udp_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_udp_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_32_3_0_udp_t_fget[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_FID_COUNT] = { + bcmpkt_udp_t_checksum_get, + bcmpkt_udp_t_dst_port_get, + bcmpkt_udp_t_src_port_get, + bcmpkt_udp_t_udp_length_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_32_3_0_udp_t_fset[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_FID_COUNT] = { + bcmpkt_udp_t_checksum_set, + bcmpkt_udp_t_dst_port_set, + bcmpkt_udp_t_src_port_set, + bcmpkt_udp_t_udp_length_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_32_3_0_udp_t_field_data[] = { + BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_32_3_0_udp_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_32_3_0_udp_t_field_data, +}; + + +static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_32_3_0_unknown_l3_t_fget[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { + bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get, + bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_32_3_0_unknown_l3_t_fset[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { + bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set, + bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_32_3_0_unknown_l3_t_field_data[] = { + BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_32_3_0_unknown_l3_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_32_3_0_unknown_l3_t_field_data, +}; + + +static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_32_3_0_unknown_l4_t_fget[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { + bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_32_3_0_unknown_l4_t_fset[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { + bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_32_3_0_unknown_l4_t_field_data[] = { + BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_32_3_0_unknown_l4_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_32_3_0_unknown_l4_t_field_data, +}; + + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_32_3_0_unknown_l5_t_fget[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { + bcmpkt_unknown_l5_t_l5_bytes_0_1_get, + bcmpkt_unknown_l5_t_l5_bytes_2_3_get, + bcmpkt_unknown_l5_t_l5_bytes_4_7_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_32_3_0_unknown_l5_t_fset[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { + bcmpkt_unknown_l5_t_l5_bytes_0_1_set, + bcmpkt_unknown_l5_t_l5_bytes_2_3_set, + bcmpkt_unknown_l5_t_l5_bytes_4_7_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_32_3_0_unknown_l5_t_field_data[] = { + BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_32_3_0_unknown_l5_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_32_3_0_unknown_l5_t_field_data, +}; + + +static int32_t bcmpkt_vlan_t_cfi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 1); + + return ret; +} + +static int32_t bcmpkt_vlan_t_cfi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 1, val); + return ret; +} + +static int32_t bcmpkt_vlan_t_pcp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 13, 3); + + return ret; +} + +static int32_t bcmpkt_vlan_t_pcp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 13, 3, val); + return ret; +} + +static int32_t bcmpkt_vlan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_vlan_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_vlan_t_vid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 12); + + return ret; +} + +static int32_t bcmpkt_vlan_t_vid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 12, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_32_3_0_vlan_t_fget[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_FID_COUNT] = { + bcmpkt_vlan_t_cfi_get, + bcmpkt_vlan_t_pcp_get, + bcmpkt_vlan_t_tpid_get, + bcmpkt_vlan_t_vid_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_32_3_0_vlan_t_fset[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_FID_COUNT] = { + bcmpkt_vlan_t_cfi_set, + bcmpkt_vlan_t_pcp_set, + bcmpkt_vlan_t_tpid_set, + bcmpkt_vlan_t_vid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_32_3_0_vlan_t_field_data[] = { + BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_32_3_0_vlan_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_32_3_0_vlan_t_field_data, +}; + + +static int32_t bcmpkt_vxlan_t_flags_reserved_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_vxlan_t_flags_reserved_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_vxlan_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 8); + + return ret; +} + +static int32_t bcmpkt_vxlan_t_reserved2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_vxlan_t_vn_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 8, 24); + + return ret; +} + +static int32_t bcmpkt_vxlan_t_vn_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 8, 24, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_32_3_0_vxlan_t_fget[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T_FID_COUNT] = { + bcmpkt_vxlan_t_flags_reserved_1_get, + bcmpkt_vxlan_t_reserved2_get, + bcmpkt_vxlan_t_vn_id_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_32_3_0_vxlan_t_fset[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T_FID_COUNT] = { + bcmpkt_vxlan_t_flags_reserved_1_set, + bcmpkt_vxlan_t_reserved2_set, + bcmpkt_vxlan_t_vn_id_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_32_3_0_vxlan_t_field_data[] = { + BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_32_3_0_vxlan_t_field_info = { + .num_fields = BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T_FID_COUNT, + .info = bcm56780_a0_cna_6_5_32_3_0_vxlan_t_field_data, +}; + +static bcmpkt_flex_pmd_info_t bcm56780_a0_cna_6_5_32_3_0_flexhdr_info_list[BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_FLEXHDR_COUNT] = { + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_cna_6_5_32_3_0_arp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_cna_6_5_32_3_0_arp_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_32_3_0_arp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_cna_6_5_32_3_0_cpu_composites_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_cna_6_5_32_3_0_cpu_composites_0_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_32_3_0_cpu_composites_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_cna_6_5_32_3_0_cpu_composites_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_cna_6_5_32_3_0_cpu_composites_1_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_32_3_0_cpu_composites_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_cna_6_5_32_3_0_ep_nih_header_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_cna_6_5_32_3_0_ep_nih_header_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_32_3_0_ep_nih_header_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_cna_6_5_32_3_0_erspan3_fixed_hdr_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_cna_6_5_32_3_0_erspan3_fixed_hdr_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_32_3_0_erspan3_fixed_hdr_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_cna_6_5_32_3_0_erspan3_subhdr_5_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_cna_6_5_32_3_0_erspan3_subhdr_5_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_32_3_0_erspan3_subhdr_5_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_cna_6_5_32_3_0_ethertype_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_cna_6_5_32_3_0_ethertype_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_32_3_0_ethertype_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_cna_6_5_32_3_0_generic_loopback_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_cna_6_5_32_3_0_generic_loopback_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_32_3_0_generic_loopback_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_cna_6_5_32_3_0_icmp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_cna_6_5_32_3_0_icmp_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_32_3_0_icmp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_cna_6_5_32_3_0_ipfix_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_cna_6_5_32_3_0_ipfix_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_32_3_0_ipfix_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_cna_6_5_32_3_0_ipv4_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_cna_6_5_32_3_0_ipv4_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_32_3_0_ipv4_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_cna_6_5_32_3_0_ipv6_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_cna_6_5_32_3_0_ipv6_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_32_3_0_ipv6_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_cna_6_5_32_3_0_l2_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_cna_6_5_32_3_0_l2_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_32_3_0_l2_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_cna_6_5_32_3_0_mirror_erspan_sn_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_cna_6_5_32_3_0_mirror_erspan_sn_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_32_3_0_mirror_erspan_sn_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_cna_6_5_32_3_0_mirror_transport_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_cna_6_5_32_3_0_mirror_transport_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_32_3_0_mirror_transport_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_0_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_3_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_3_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_3_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_cna_6_5_32_3_0_rarp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_cna_6_5_32_3_0_rarp_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_32_3_0_rarp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_cna_6_5_32_3_0_svtag_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_cna_6_5_32_3_0_svtag_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_32_3_0_svtag_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_cna_6_5_32_3_0_tcp_first_4bytes_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_cna_6_5_32_3_0_tcp_first_4bytes_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_32_3_0_tcp_first_4bytes_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_cna_6_5_32_3_0_tcp_last_16bytes_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_cna_6_5_32_3_0_tcp_last_16bytes_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_32_3_0_tcp_last_16bytes_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_cna_6_5_32_3_0_udp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_cna_6_5_32_3_0_udp_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_32_3_0_udp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_cna_6_5_32_3_0_unknown_l3_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_cna_6_5_32_3_0_unknown_l3_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_32_3_0_unknown_l3_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_cna_6_5_32_3_0_unknown_l4_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_cna_6_5_32_3_0_unknown_l4_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_32_3_0_unknown_l4_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_cna_6_5_32_3_0_unknown_l5_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_cna_6_5_32_3_0_unknown_l5_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_32_3_0_unknown_l5_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_cna_6_5_32_3_0_vlan_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_cna_6_5_32_3_0_vlan_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_32_3_0_vlan_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_cna_6_5_32_3_0_vxlan_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_cna_6_5_32_3_0_vxlan_t_fget, + .flex_fset = bcm56780_a0_cna_6_5_32_3_0_vxlan_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_cna_6_5_32_3_0_rxpmd_flex_field_info, + .reasons_info = &bcm56780_a0_cna_6_5_32_3_0_rxpmd_flex_reasons_info, + .flex_common_fget = bcm56780_a0_rxpmd_flex_fget, + .flex_common_fset = bcm56780_a0_rxpmd_flex_fset, + }, +}; + +static shr_enum_map_t bcm56780_a0_cna_6_5_32_3_0_flexhdr_id_map[] = { + BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_FLEXHDR_NAME_MAP_INIT +}; + +shr_enum_map_t * bcm56780_a0_cna_6_5_32_3_0_flexhdr_map_get(void) +{ + return bcm56780_a0_cna_6_5_32_3_0_flexhdr_id_map; +} + +bcmpkt_flex_pmd_info_t * bcm56780_a0_cna_6_5_32_3_0_flex_pmd_info_get(uint32_t hid) +{ + if (hid >= BCM56780_A0_CNA_6_5_32_3_0_BCMPKT_FLEXHDR_COUNT) { + return NULL; + } + + return &bcm56780_a0_cna_6_5_32_3_0_flexhdr_info_list[hid]; +} + +int bcm56780_a0_cna_6_5_32_3_0_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = { + 7, + -1, + -1, + 27, +}; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/xfcr/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_bcmpkt_rxpmd_match_id.c similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_bcmpkt_rxpmd_match_id.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/xfcr/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_bcmpkt_rxpmd_match_id.c index d729cbe3e85..3836608aac4 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_bcmpkt_rxpmd_match_id.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/xfcr/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_bcmpkt_rxpmd_match_id.c @@ -6,8 +6,8 @@ * for device bcm56780_a0 and variant dna_6_5_31_7_0. * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -21,6 +21,7 @@ * * A copy of the GNU General Public License version 2 (GPLv2) can * be found in the LICENSES folder. + * All Rights Reserved.$ * * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser * diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_pkt_flexhdr.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/xfcr/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_pkt_flexhdr.c similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_pkt_flexhdr.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/xfcr/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_pkt_flexhdr.c index a73e52d324a..d3da80cbbc3 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_pkt_flexhdr.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/xfcr/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_pkt_flexhdr.c @@ -6,8 +6,8 @@ * for device bcm56780_a0 and variant dna_6_5_31_7_0. * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -21,6 +21,7 @@ * * A copy of the GNU General Public License version 2 (GPLv2) can * be found in the LICENSES folder. + * All Rights Reserved.$ * * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser * diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/xfcr/bcm56780_a0/hna_6_5_32_2_0/bcm56780_a0_hna_6_5_32_2_0_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/xfcr/bcm56780_a0/hna_6_5_32_2_0/bcm56780_a0_hna_6_5_32_2_0_bcmpkt_rxpmd_match_id.c new file mode 100644 index 00000000000..cb3327e731a --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/xfcr/bcm56780_a0/hna_6_5_32_2_0/bcm56780_a0_hna_6_5_32_2_0_bcmpkt_rxpmd_match_id.c @@ -0,0 +1,2480 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) bcm56780_a0_hna_6_5_32_2_0_sf_match_id_info.yml + * for device bcm56780_a0 and variant hna_6_5_32_2_0. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + + +#include +#include + + +static bcmpkt_rxpmd_match_id_db_t +bcm56780_a0_hna_6_5_32_2_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_COUNT] = { + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_ETAG", + .match = 0x40, + .match_mask = 0x60, + .match_maxbit = 29, + .match_minbit = 23, + .maxbit = 6, + .minbit = 5, + .value = 0x2, + .pmaxbit = 41, + .pminbit = 35, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_ITAG", + .match = 0x10, + .match_mask = 0x10, + .match_maxbit = 29, + .match_minbit = 23, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 41, + .pminbit = 35, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */ + .name = "EGRESS_PKT_FWD_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 29, + .match_minbit = 23, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 41, + .pminbit = 35, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */ + .name = "EGRESS_PKT_FWD_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0x7f, + .match_maxbit = 29, + .match_minbit = 23, + .maxbit = 6, + .minbit = 0, + .value = 0x0, + .pmaxbit = 41, + .pminbit = 35, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_OTAG", + .match = 0x8, + .match_mask = 0x8, + .match_maxbit = 29, + .match_minbit = 23, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 41, + .pminbit = 35, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC */ + .name = "EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 29, + .match_minbit = 23, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 41, + .pminbit = 35, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_SVTAG", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 29, + .match_minbit = 23, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 41, + .pminbit = 35, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_VNTAG", + .match = 0x20, + .match_mask = 0x60, + .match_maxbit = 29, + .match_minbit = 23, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 41, + .pminbit = 35, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ARP", + .match = 0x1800, + .match_mask = 0x3830, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", + .match = 0x80, + .match_mask = 0x1c2, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", + .match = 0x408, + .match_mask = 0x64c, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_BFD", + .match = 0x3800, + .match_mask = 0x3800, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 13, + .minbit = 11, + .value = 0x7, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", + .match = 0x200, + .match_mask = 0x642, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", + .match = 0x100, + .match_mask = 0x1c0, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 8, + .minbit = 7, + .value = 0x2, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", + .match = 0x600, + .match_mask = 0x640, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 10, + .minbit = 9, + .value = 0x3, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GPE", + .match = 0x1830, + .match_mask = 0x3870, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE", + .match = 0x2, + .match_mask = 0x42, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", + .match = 0x202, + .match_mask = 0x642, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", + .match = 0x1000, + .match_mask = 0x3800, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 13, + .minbit = 11, + .value = 0x2, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", + .match = 0x82, + .match_mask = 0x1c2, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", + .match = 0x12, + .match_mask = 0x72, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 5, + .minbit = 4, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ICMP", + .match = 0x2000, + .match_mask = 0x3830, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA", + .match = 0x180, + .match_mask = 0x1c0, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 8, + .minbit = 7, + .value = 0x3, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IGMP", + .match = 0x404, + .match_mask = 0x64c, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV4", + .match = 0x4, + .match_mask = 0x4c, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 3, + .minbit = 2, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV6", + .match = 0x8, + .match_mask = 0x4c, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 3, + .minbit = 2, + .value = 0x2, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", + .match = 0x40, + .match_mask = 0x40, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 6, + .minbit = 6, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", + .match = 0x42, + .match_mask = 0x42, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", + .match = 0x44, + .match_mask = 0x44, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", + .match = 0x48, + .match_mask = 0x48, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", + .match = 0x50, + .match_mask = 0x50, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", + .match = 0x60, + .match_mask = 0x60, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", + .match = 0xc0, + .match_mask = 0xc0, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 7, + .minbit = 7, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", + .match = 0x140, + .match_mask = 0x140, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 8, + .minbit = 8, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", + .match = 0x240, + .match_mask = 0x240, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 9, + .minbit = 9, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x3fff, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 13, + .minbit = 0, + .value = 0x0, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_P_1588", + .match = 0x3000, + .match_mask = 0x3800, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 13, + .minbit = 11, + .value = 0x6, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_RARP", + .match = 0x800, + .match_mask = 0x3830, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x20, + .match_mask = 0x70, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 5, + .minbit = 4, + .value = 0x2, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x820, + .match_mask = 0x3870, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UDP", + .match = 0x30, + .match_mask = 0x70, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 5, + .minbit = 4, + .value = 0x3, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", + .match = 0x10, + .match_mask = 0x72, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 5, + .minbit = 4, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", + .match = 0x2800, + .match_mask = 0x3800, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 13, + .minbit = 11, + .value = 0x5, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", + .match = 0x2030, + .match_mask = 0x3870, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", + .match = 0x830, + .match_mask = 0x3870, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH */ + .name = "EGRESS_PKT_SYS_HDR_EP_NIH", + .match = 0x2, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x2, + .pmaxbit = 1, + .pminbit = 0, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */ + .name = "EGRESS_PKT_SYS_HDR_LOOPBACK", + .match = 0x1, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x1, + .pmaxbit = 1, + .pminbit = 0, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */ + .name = "EGRESS_PKT_SYS_HDR_NONE", + .match = 0x0, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x0, + .pmaxbit = 1, + .pminbit = 0, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_ETAG", + .match = 0x40, + .match_mask = 0x60, + .match_maxbit = 8, + .match_minbit = 2, + .maxbit = 6, + .minbit = 5, + .value = 0x2, + .pmaxbit = 13, + .pminbit = 7, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_ITAG", + .match = 0x10, + .match_mask = 0x10, + .match_maxbit = 8, + .match_minbit = 2, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 13, + .pminbit = 7, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 8, + .match_minbit = 2, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 13, + .pminbit = 7, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0x7f, + .match_maxbit = 8, + .match_minbit = 2, + .maxbit = 6, + .minbit = 0, + .value = 0x0, + .pmaxbit = 13, + .pminbit = 7, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_OTAG", + .match = 0x8, + .match_mask = 0x8, + .match_maxbit = 8, + .match_minbit = 2, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 13, + .pminbit = 7, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 8, + .match_minbit = 2, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 13, + .pminbit = 7, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_SVTAG", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 8, + .match_minbit = 2, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 13, + .pminbit = 7, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_VNTAG", + .match = 0x20, + .match_mask = 0x60, + .match_maxbit = 8, + .match_minbit = 2, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 13, + .pminbit = 7, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", + .match = 0x1800, + .match_mask = 0x3830, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", + .match = 0x80, + .match_mask = 0x1c2, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", + .match = 0x408, + .match_mask = 0x64c, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", + .match = 0x3800, + .match_mask = 0x3800, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x7, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", + .match = 0x200, + .match_mask = 0x642, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", + .match = 0x100, + .match_mask = 0x1c0, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 8, + .minbit = 7, + .value = 0x2, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", + .match = 0x600, + .match_mask = 0x640, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 10, + .minbit = 9, + .value = 0x3, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", + .match = 0x1830, + .match_mask = 0x3870, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", + .match = 0x2, + .match_mask = 0x42, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", + .match = 0x202, + .match_mask = 0x642, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", + .match = 0x1000, + .match_mask = 0x3800, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x2, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", + .match = 0x82, + .match_mask = 0x1c2, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", + .match = 0x12, + .match_mask = 0x72, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 5, + .minbit = 4, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", + .match = 0x2000, + .match_mask = 0x3830, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA", + .match = 0x180, + .match_mask = 0x1c0, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 8, + .minbit = 7, + .value = 0x3, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", + .match = 0x404, + .match_mask = 0x64c, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", + .match = 0x4, + .match_mask = 0x4c, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 3, + .minbit = 2, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", + .match = 0x8, + .match_mask = 0x4c, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 3, + .minbit = 2, + .value = 0x2, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", + .match = 0x40, + .match_mask = 0x40, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 6, + .minbit = 6, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", + .match = 0x42, + .match_mask = 0x42, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", + .match = 0x44, + .match_mask = 0x44, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", + .match = 0x48, + .match_mask = 0x48, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", + .match = 0x50, + .match_mask = 0x50, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", + .match = 0x60, + .match_mask = 0x60, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", + .match = 0xc0, + .match_mask = 0xc0, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 7, + .minbit = 7, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", + .match = 0x140, + .match_mask = 0x140, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 8, + .minbit = 8, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", + .match = 0x240, + .match_mask = 0x240, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 9, + .minbit = 9, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x3fff, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 0, + .value = 0x0, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", + .match = 0x3000, + .match_mask = 0x3800, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x6, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", + .match = 0x800, + .match_mask = 0x3830, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x20, + .match_mask = 0x70, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 5, + .minbit = 4, + .value = 0x2, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x820, + .match_mask = 0x3870, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", + .match = 0x30, + .match_mask = 0x70, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 5, + .minbit = 4, + .value = 0x3, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", + .match = 0x10, + .match_mask = 0x72, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 5, + .minbit = 4, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", + .match = 0x2800, + .match_mask = 0x3800, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x5, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", + .match = 0x2030, + .match_mask = 0x3870, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", + .match = 0x830, + .match_mask = 0x3870, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_ETAG", + .match = 0x40, + .match_mask = 0x60, + .match_maxbit = 29, + .match_minbit = 23, + .maxbit = 6, + .minbit = 5, + .value = 0x2, + .pmaxbit = 29, + .pminbit = 23, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_ITAG", + .match = 0x10, + .match_mask = 0x10, + .match_maxbit = 29, + .match_minbit = 23, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 29, + .pminbit = 23, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */ + .name = "INGRESS_PKT_INNER_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 29, + .match_minbit = 23, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 29, + .pminbit = 23, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */ + .name = "INGRESS_PKT_INNER_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0x7f, + .match_maxbit = 29, + .match_minbit = 23, + .maxbit = 6, + .minbit = 0, + .value = 0x0, + .pmaxbit = 29, + .pminbit = 23, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_OTAG", + .match = 0x8, + .match_mask = 0x8, + .match_maxbit = 29, + .match_minbit = 23, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 29, + .pminbit = 23, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC */ + .name = "INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 29, + .match_minbit = 23, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 29, + .pminbit = 23, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_VNTAG", + .match = 0x20, + .match_mask = 0x60, + .match_maxbit = 29, + .match_minbit = 23, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 29, + .pminbit = 23, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ARP", + .match = 0x1800, + .match_mask = 0x3830, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 43, + .pminbit = 30, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", + .match = 0x80, + .match_mask = 0x1c2, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 43, + .pminbit = 30, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", + .match = 0x408, + .match_mask = 0x64c, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 43, + .pminbit = 30, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_BFD", + .match = 0x3800, + .match_mask = 0x3800, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 13, + .minbit = 11, + .value = 0x7, + .pmaxbit = 43, + .pminbit = 30, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", + .match = 0x200, + .match_mask = 0x642, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 43, + .pminbit = 30, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 43, + .pminbit = 30, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", + .match = 0x100, + .match_mask = 0x1c0, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 8, + .minbit = 7, + .value = 0x2, + .pmaxbit = 43, + .pminbit = 30, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", + .match = 0x600, + .match_mask = 0x640, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 10, + .minbit = 9, + .value = 0x3, + .pmaxbit = 43, + .pminbit = 30, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ICMP", + .match = 0x2000, + .match_mask = 0x3830, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 43, + .pminbit = 30, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA", + .match = 0x180, + .match_mask = 0x1c0, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 8, + .minbit = 7, + .value = 0x3, + .pmaxbit = 43, + .pminbit = 30, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IGMP", + .match = 0x404, + .match_mask = 0x64c, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 43, + .pminbit = 30, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV4", + .match = 0x4, + .match_mask = 0x4c, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 3, + .minbit = 2, + .value = 0x1, + .pmaxbit = 43, + .pminbit = 30, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV6", + .match = 0x8, + .match_mask = 0x4c, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 3, + .minbit = 2, + .value = 0x2, + .pmaxbit = 43, + .pminbit = 30, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x3fff, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 13, + .minbit = 0, + .value = 0x0, + .pmaxbit = 43, + .pminbit = 30, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_P_1588", + .match = 0x3000, + .match_mask = 0x3800, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 13, + .minbit = 11, + .value = 0x6, + .pmaxbit = 43, + .pminbit = 30, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_RARP", + .match = 0x800, + .match_mask = 0x3830, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 43, + .pminbit = 30, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x20, + .match_mask = 0x70, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 5, + .minbit = 4, + .value = 0x2, + .pmaxbit = 43, + .pminbit = 30, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x820, + .match_mask = 0x3870, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 43, + .pminbit = 30, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UDP", + .match = 0x30, + .match_mask = 0x70, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 5, + .minbit = 4, + .value = 0x3, + .pmaxbit = 43, + .pminbit = 30, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", + .match = 0x10, + .match_mask = 0x72, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 5, + .minbit = 4, + .value = 0x1, + .pmaxbit = 43, + .pminbit = 30, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", + .match = 0x2800, + .match_mask = 0x3800, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 13, + .minbit = 11, + .value = 0x5, + .pmaxbit = 43, + .pminbit = 30, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", + .match = 0x2030, + .match_mask = 0x3870, + .match_maxbit = 43, + .match_minbit = 30, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 43, + .pminbit = 30, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_ETAG", + .match = 0x40, + .match_mask = 0x60, + .match_maxbit = 8, + .match_minbit = 2, + .maxbit = 6, + .minbit = 5, + .value = 0x2, + .pmaxbit = 8, + .pminbit = 2, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_ITAG", + .match = 0x10, + .match_mask = 0x10, + .match_maxbit = 8, + .match_minbit = 2, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 8, + .pminbit = 2, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */ + .name = "INGRESS_PKT_OUTER_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 8, + .match_minbit = 2, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 8, + .pminbit = 2, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */ + .name = "INGRESS_PKT_OUTER_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0x7f, + .match_maxbit = 8, + .match_minbit = 2, + .maxbit = 6, + .minbit = 0, + .value = 0x0, + .pmaxbit = 8, + .pminbit = 2, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_OTAG", + .match = 0x8, + .match_mask = 0x8, + .match_maxbit = 8, + .match_minbit = 2, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 8, + .pminbit = 2, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC */ + .name = "INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 8, + .match_minbit = 2, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 8, + .pminbit = 2, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_SVTAG", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 8, + .match_minbit = 2, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 8, + .pminbit = 2, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_VNTAG", + .match = 0x20, + .match_mask = 0x60, + .match_maxbit = 8, + .match_minbit = 2, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 8, + .pminbit = 2, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ARP", + .match = 0x1800, + .match_mask = 0x3830, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", + .match = 0x80, + .match_mask = 0x1c2, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", + .match = 0x408, + .match_mask = 0x64c, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_BFD", + .match = 0x3800, + .match_mask = 0x3800, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x7, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", + .match = 0x200, + .match_mask = 0x642, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", + .match = 0x100, + .match_mask = 0x1c0, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 8, + .minbit = 7, + .value = 0x2, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", + .match = 0x600, + .match_mask = 0x640, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 10, + .minbit = 9, + .value = 0x3, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GPE", + .match = 0x1830, + .match_mask = 0x3870, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE", + .match = 0x2, + .match_mask = 0x42, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", + .match = 0x202, + .match_mask = 0x642, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", + .match = 0x1000, + .match_mask = 0x3800, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x2, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", + .match = 0x82, + .match_mask = 0x1c2, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", + .match = 0x12, + .match_mask = 0x72, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 5, + .minbit = 4, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", + .match = 0x2000, + .match_mask = 0x3830, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA", + .match = 0x180, + .match_mask = 0x1c0, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 8, + .minbit = 7, + .value = 0x3, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", + .match = 0x404, + .match_mask = 0x64c, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", + .match = 0x4, + .match_mask = 0x4c, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 3, + .minbit = 2, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", + .match = 0x8, + .match_mask = 0x4c, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 3, + .minbit = 2, + .value = 0x2, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", + .match = 0x40, + .match_mask = 0x40, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 6, + .minbit = 6, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", + .match = 0x42, + .match_mask = 0x42, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", + .match = 0x44, + .match_mask = 0x44, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", + .match = 0x48, + .match_mask = 0x48, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", + .match = 0x50, + .match_mask = 0x50, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", + .match = 0x60, + .match_mask = 0x60, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", + .match = 0xc0, + .match_mask = 0xc0, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 7, + .minbit = 7, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", + .match = 0x140, + .match_mask = 0x140, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 8, + .minbit = 8, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", + .match = 0x240, + .match_mask = 0x240, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 9, + .minbit = 9, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x3fff, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 0, + .value = 0x0, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", + .match = 0x3000, + .match_mask = 0x3800, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x6, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_RARP", + .match = 0x800, + .match_mask = 0x3830, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x20, + .match_mask = 0x70, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 5, + .minbit = 4, + .value = 0x2, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x820, + .match_mask = 0x3870, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UDP", + .match = 0x30, + .match_mask = 0x70, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 5, + .minbit = 4, + .value = 0x3, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", + .match = 0x10, + .match_mask = 0x72, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 5, + .minbit = 4, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", + .match = 0x2800, + .match_mask = 0x3800, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x5, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", + .match = 0x2030, + .match_mask = 0x3870, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", + .match = 0x830, + .match_mask = 0x3870, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH */ + .name = "INGRESS_PKT_SYS_HDR_EP_NIH", + .match = 0x2, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x2, + .pmaxbit = 1, + .pminbit = 0, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */ + .name = "INGRESS_PKT_SYS_HDR_LOOPBACK", + .match = 0x1, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x1, + .pmaxbit = 1, + .pminbit = 0, + + }, + { + /* BCM56780_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */ + .name = "INGRESS_PKT_SYS_HDR_NONE", + .match = 0x0, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x0, + .pmaxbit = 1, + .pminbit = 0, + + }, +}; + +static bcmpkt_rxpmd_match_id_db_info_t bcm56780_a0_hna_6_5_32_2_0_rxpmd_match_id_db_info = { + .num_entries = 173, + .db = bcm56780_a0_hna_6_5_32_2_0_rxpmd_match_id_db +}; +bcmpkt_rxpmd_match_id_db_info_t * bcm56780_a0_hna_6_5_32_2_0_rxpmd_match_id_db_info_get(void) { + return &bcm56780_a0_hna_6_5_32_2_0_rxpmd_match_id_db_info; +} + +static shr_enum_map_t bcm56780_a0_hna_6_5_32_2_0_rxpmd_match_id_map[] = { + BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_rxpmd_match_id_map_info_t bcm56780_a0_hna_6_5_32_2_0_rxpmd_match_id_map_info = { + .num_entries = 173, + .map = bcm56780_a0_hna_6_5_32_2_0_rxpmd_match_id_map +}; + +bcmpkt_rxpmd_match_id_map_info_t * bcm56780_a0_hna_6_5_32_2_0_rxpmd_match_id_map_info_get(void) { + return &bcm56780_a0_hna_6_5_32_2_0_rxpmd_match_id_map_info; +} diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/xfcr/bcm56780_a0/hna_6_5_32_2_0/bcm56780_a0_hna_6_5_32_2_0_pkt_flexhdr.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/xfcr/bcm56780_a0/hna_6_5_32_2_0/bcm56780_a0_hna_6_5_32_2_0_pkt_flexhdr.c new file mode 100644 index 00000000000..21a7ece3ac1 --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/xfcr/bcm56780_a0/hna_6_5_32_2_0/bcm56780_a0_hna_6_5_32_2_0_pkt_flexhdr.c @@ -0,0 +1,9195 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) map.yml + * for device bcm56780_a0 and variant hna_6_5_32_2_0. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#include +#include +#include +#include +#include +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) + +static void bcm56780_a0_hna_6_5_32_2_0_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons) +{ + uint32_t *reason = data + 0; + + if (reason[13] & (0x1 << 0)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU); + } + if (reason[13] & (0x1 << 1)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS); + } + if (reason[13] & (0x1 << 2)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE); + } + if (reason[13] & (0x1 << 3)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT); + } + if (reason[13] & (0x1 << 4)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD); + } + if (reason[13] & (0x1 << 5)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED); + } + if (reason[13] & (0x1 << 6)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT); + } + if (reason[13] & (0x1 << 7)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD); + } + if (reason[13] & (0x1 << 8)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD); + } + if (reason[13] & (0x1 << 9)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS); + } + if (reason[13] & (0x1 << 10)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP); + } + if (reason[13] & (0x1 << 11)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS); + } + if (reason[13] & (0x1 << 12)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP); + } + if (reason[13] & (0x1 << 13)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR); + } + if (reason[13] & (0x1 << 14)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR); + } + if (reason[13] & (0x1 << 15)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED); + } + if (reason[13] & (0x1 << 16)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL); + } + if (reason[13] & (0x1 << 17)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_VFP); + } + if (reason[13] & (0x1 << 18)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP); + } + if (reason[13] & (0x1 << 19)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER); + } + if (reason[13] & (0x1 << 20)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP); + } + if (reason[13] & (0x1 << 21)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_SVP); + } + if (reason[13] & (0x1 << 22)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT); + } + if (reason[13] & (0x1 << 23)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT); + } + if (reason[13] & (0x1 << 24)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED); + } + if (reason[13] & (0x1 << 25)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED); + } + if (reason[13] & (0x1 << 26)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP); + } + if (reason[13] & (0x1 << 27)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED); + } + if (reason[13] & (0x1 << 28)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF); + } + if (reason[13] & (0x1 << 29)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED); + } + if (reason[13] & (0x1 << 30)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED); + } + if (reason[13] & (0x1 << 31)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU); + } + if (reason[12] & (0x1 << 0)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0); + } + if (reason[12] & (0x1 << 1)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1); + } + if (reason[12] & (0x1 << 2)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2); + } + if (reason[12] & (0x1 << 3)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3); + } + if (reason[12] & (0x1 << 4)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4); + } + if (reason[12] & (0x1 << 5)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5); + } + if (reason[12] & (0x1 << 6)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6); + } + if (reason[12] & (0x1 << 7)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7); + } + if (reason[12] & (0x1 << 8)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MTOP_IPV4_GATEWAY); + } + if (reason[12] & (0x1 << 9)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED); + } + if (reason[12] & (0x1 << 10)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED); + } + if (reason[12] & (0x1 << 11)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE); + } + if (reason[12] & (0x1 << 12)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR); + } + if (reason[12] & (0x1 << 13)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU); + } + if (reason[12] & (0x1 << 15)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP); + } +} + +static void bcm56780_a0_hna_6_5_32_2_0_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data) +{ + uint32_t *reason = data + 0; + + reason[13] = 0; + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) { + reason[13] |= (0x1 << 0); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) { + reason[13] |= (0x1 << 1); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) { + reason[13] |= (0x1 << 2); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT)) { + reason[13] |= (0x1 << 3); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD)) { + reason[13] |= (0x1 << 4); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) { + reason[13] |= (0x1 << 5); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) { + reason[13] |= (0x1 << 6); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD)) { + reason[13] |= (0x1 << 7); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD)) { + reason[13] |= (0x1 << 8); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) { + reason[13] |= (0x1 << 9); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) { + reason[13] |= (0x1 << 10); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) { + reason[13] |= (0x1 << 11); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) { + reason[13] |= (0x1 << 12); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) { + reason[13] |= (0x1 << 13); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) { + reason[13] |= (0x1 << 14); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED)) { + reason[13] |= (0x1 << 15); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) { + reason[13] |= (0x1 << 16); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_VFP)) { + reason[13] |= (0x1 << 17); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP)) { + reason[13] |= (0x1 << 18); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) { + reason[13] |= (0x1 << 19); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP)) { + reason[13] |= (0x1 << 20); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_SVP)) { + reason[13] |= (0x1 << 21); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT)) { + reason[13] |= (0x1 << 22); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) { + reason[13] |= (0x1 << 23); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED)) { + reason[13] |= (0x1 << 24); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED)) { + reason[13] |= (0x1 << 25); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP)) { + reason[13] |= (0x1 << 26); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED)) { + reason[13] |= (0x1 << 27); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF)) { + reason[13] |= (0x1 << 28); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED)) { + reason[13] |= (0x1 << 29); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED)) { + reason[13] |= (0x1 << 30); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU)) { + reason[13] |= (0x1 << 31); + } + reason[12] = 0; + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0)) { + reason[12] |= (0x1 << 0); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1)) { + reason[12] |= (0x1 << 1); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2)) { + reason[12] |= (0x1 << 2); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3)) { + reason[12] |= (0x1 << 3); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4)) { + reason[12] |= (0x1 << 4); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5)) { + reason[12] |= (0x1 << 5); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6)) { + reason[12] |= (0x1 << 6); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7)) { + reason[12] |= (0x1 << 7); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MTOP_IPV4_GATEWAY)) { + reason[12] |= (0x1 << 8); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED)) { + reason[12] |= (0x1 << 9); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED)) { + reason[12] |= (0x1 << 10); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE)) { + reason[12] |= (0x1 << 11); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR)) { + reason[12] |= (0x1 << 12); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU)) { + reason[12] |= (0x1 << 13); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) { + reason[12] |= (0x1 << 15); + } +} + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_rxpmd_flex_field_data[] = { + { + .name = "DLB_ECMP_DESTINATION_15_0", + .fid = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { -1, -1 }, /* Profile 7. */ + { -1, -1 }, /* Profile 8. */ + { -1, -1 }, /* Profile 9. */ + { -1, -1 }, /* Profile 10. */ + { -1, -1 }, /* Profile 11. */ + { 80, 95 }, /* Profile 12. */ + { 80, 95 }, /* Profile 13. */ + { 80, 95 }, /* Profile 14. */ + { 80, 95 }, /* Profile 15. */ + { 80, 95 }, /* Profile 16. */ + { 80, 95 }, /* Profile 17. */ + { 80, 95 }, /* Profile 18. */ + { 80, 95 }, /* Profile 19. */ + { 80, 95 }, /* Profile 20. */ + { 80, 95 }, /* Profile 21. */ + { -1, -1 }, /* Profile 22. */ + { -1, -1 }, /* Profile 23. */ + { -1, -1 }, /* Profile 24. */ + { -1, -1 }, /* Profile 25. */ + { -1, -1 }, /* Profile 26. */ + { -1, -1 }, /* Profile 27. */ + { -1, -1 }, /* Profile 28. */ + { -1, -1 }, /* Profile 29. */ + { -1, -1 }, /* Profile 30. */ + { -1, -1 }, /* Profile 31. */ + { 80, 95 }, /* Profile 32. */ + { 80, 95 }, /* Profile 33. */ + { 80, 95 }, /* Profile 34. */ + { 80, 95 }, /* Profile 35. */ + { 80, 95 }, /* Profile 36. */ + { 80, 95 }, /* Profile 37. */ + { 80, 95 }, /* Profile 38. */ + { 80, 95 }, /* Profile 39. */ + { 80, 95 }, /* Profile 40. */ + { 80, 95 }, /* Profile 41. */ + }, + .profile_cnt = 42, + }, + { + .name = "DROP_CODE_15_0", + .fid = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 48, 63 }, /* Profile 2. */ + { 48, 63 }, /* Profile 3. */ + { 48, 63 }, /* Profile 4. */ + { 48, 63 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { -1, -1 }, /* Profile 7. */ + { -1, -1 }, /* Profile 8. */ + { -1, -1 }, /* Profile 9. */ + { 48, 63 }, /* Profile 10. */ + { 48, 63 }, /* Profile 11. */ + { 48, 63 }, /* Profile 12. */ + { 48, 63 }, /* Profile 13. */ + { 48, 63 }, /* Profile 14. */ + { 48, 63 }, /* Profile 15. */ + { -1, -1 }, /* Profile 16. */ + { -1, -1 }, /* Profile 17. */ + { -1, -1 }, /* Profile 18. */ + { -1, -1 }, /* Profile 19. */ + { 48, 63 }, /* Profile 20. */ + { 48, 63 }, /* Profile 21. */ + { 48, 63 }, /* Profile 22. */ + { 48, 63 }, /* Profile 23. */ + { 48, 63 }, /* Profile 24. */ + { 48, 63 }, /* Profile 25. */ + { -1, -1 }, /* Profile 26. */ + { -1, -1 }, /* Profile 27. */ + { -1, -1 }, /* Profile 28. */ + { -1, -1 }, /* Profile 29. */ + { 48, 63 }, /* Profile 30. */ + { 48, 63 }, /* Profile 31. */ + { 48, 63 }, /* Profile 32. */ + { 48, 63 }, /* Profile 33. */ + { 48, 63 }, /* Profile 34. */ + { 48, 63 }, /* Profile 35. */ + { -1, -1 }, /* Profile 36. */ + { -1, -1 }, /* Profile 37. */ + { -1, -1 }, /* Profile 38. */ + { -1, -1 }, /* Profile 39. */ + { 48, 63 }, /* Profile 40. */ + { 48, 63 }, /* Profile 41. */ + }, + .profile_cnt = 42, + }, + { + .name = "DVP_15_0", + .fid = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_DVP_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 368, 383 }, /* Profile 2. */ + { 368, 383 }, /* Profile 3. */ + { 368, 383 }, /* Profile 4. */ + { 368, 383 }, /* Profile 5. */ + { 368, 383 }, /* Profile 6. */ + { 368, 383 }, /* Profile 7. */ + { 368, 383 }, /* Profile 8. */ + { 368, 383 }, /* Profile 9. */ + { 368, 383 }, /* Profile 10. */ + { 368, 383 }, /* Profile 11. */ + { 368, 383 }, /* Profile 12. */ + { 368, 383 }, /* Profile 13. */ + { 368, 383 }, /* Profile 14. */ + { 368, 383 }, /* Profile 15. */ + { 368, 383 }, /* Profile 16. */ + { 368, 383 }, /* Profile 17. */ + { 368, 383 }, /* Profile 18. */ + { 368, 383 }, /* Profile 19. */ + { 368, 383 }, /* Profile 20. */ + { 368, 383 }, /* Profile 21. */ + { 368, 383 }, /* Profile 22. */ + { 368, 383 }, /* Profile 23. */ + { 368, 383 }, /* Profile 24. */ + { 368, 383 }, /* Profile 25. */ + { 368, 383 }, /* Profile 26. */ + { 368, 383 }, /* Profile 27. */ + { 368, 383 }, /* Profile 28. */ + { 368, 383 }, /* Profile 29. */ + { 368, 383 }, /* Profile 30. */ + { 368, 383 }, /* Profile 31. */ + { 368, 383 }, /* Profile 32. */ + { 368, 383 }, /* Profile 33. */ + { 368, 383 }, /* Profile 34. */ + { 368, 383 }, /* Profile 35. */ + { 368, 383 }, /* Profile 36. */ + { 368, 383 }, /* Profile 37. */ + { 368, 383 }, /* Profile 38. */ + { 368, 383 }, /* Profile 39. */ + { 368, 383 }, /* Profile 40. */ + { 368, 383 }, /* Profile 41. */ + }, + .profile_cnt = 42, + }, + { + .name = "EFFECTIVE_TTL_7_0", + .fid = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 112, 119 }, /* Profile 2. */ + { 112, 119 }, /* Profile 3. */ + { 112, 119 }, /* Profile 4. */ + { 112, 119 }, /* Profile 5. */ + { 112, 119 }, /* Profile 6. */ + { 112, 119 }, /* Profile 7. */ + { 112, 119 }, /* Profile 8. */ + { 112, 119 }, /* Profile 9. */ + { 112, 119 }, /* Profile 10. */ + { 112, 119 }, /* Profile 11. */ + { 112, 119 }, /* Profile 12. */ + { 112, 119 }, /* Profile 13. */ + { 112, 119 }, /* Profile 14. */ + { 112, 119 }, /* Profile 15. */ + { 112, 119 }, /* Profile 16. */ + { 112, 119 }, /* Profile 17. */ + { 112, 119 }, /* Profile 18. */ + { 112, 119 }, /* Profile 19. */ + { 112, 119 }, /* Profile 20. */ + { 112, 119 }, /* Profile 21. */ + { 112, 119 }, /* Profile 22. */ + { 112, 119 }, /* Profile 23. */ + { 112, 119 }, /* Profile 24. */ + { 112, 119 }, /* Profile 25. */ + { 112, 119 }, /* Profile 26. */ + { 112, 119 }, /* Profile 27. */ + { 112, 119 }, /* Profile 28. */ + { 112, 119 }, /* Profile 29. */ + { 112, 119 }, /* Profile 30. */ + { 112, 119 }, /* Profile 31. */ + { 112, 119 }, /* Profile 32. */ + { 112, 119 }, /* Profile 33. */ + { 112, 119 }, /* Profile 34. */ + { 112, 119 }, /* Profile 35. */ + { 112, 119 }, /* Profile 36. */ + { 112, 119 }, /* Profile 37. */ + { 112, 119 }, /* Profile 38. */ + { 112, 119 }, /* Profile 39. */ + { 112, 119 }, /* Profile 40. */ + { 112, 119 }, /* Profile 41. */ + }, + .profile_cnt = 42, + }, + { + .name = "EGR_MTOP_INDEX_HI_3_0", + .fid = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_EGR_MTOP_INDEX_HI_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 384, 387 }, /* Profile 2. */ + { 384, 387 }, /* Profile 3. */ + { 384, 387 }, /* Profile 4. */ + { 384, 387 }, /* Profile 5. */ + { 384, 387 }, /* Profile 6. */ + { 384, 387 }, /* Profile 7. */ + { 384, 387 }, /* Profile 8. */ + { 384, 387 }, /* Profile 9. */ + { 384, 387 }, /* Profile 10. */ + { 384, 387 }, /* Profile 11. */ + { 384, 387 }, /* Profile 12. */ + { 384, 387 }, /* Profile 13. */ + { 384, 387 }, /* Profile 14. */ + { 384, 387 }, /* Profile 15. */ + { 384, 387 }, /* Profile 16. */ + { 384, 387 }, /* Profile 17. */ + { 384, 387 }, /* Profile 18. */ + { 384, 387 }, /* Profile 19. */ + { 384, 387 }, /* Profile 20. */ + { 384, 387 }, /* Profile 21. */ + { 384, 387 }, /* Profile 22. */ + { 384, 387 }, /* Profile 23. */ + { 384, 387 }, /* Profile 24. */ + { 384, 387 }, /* Profile 25. */ + { 384, 387 }, /* Profile 26. */ + { 384, 387 }, /* Profile 27. */ + { 384, 387 }, /* Profile 28. */ + { 384, 387 }, /* Profile 29. */ + { 384, 387 }, /* Profile 30. */ + { 384, 387 }, /* Profile 31. */ + { 384, 387 }, /* Profile 32. */ + { 384, 387 }, /* Profile 33. */ + { 384, 387 }, /* Profile 34. */ + { 384, 387 }, /* Profile 35. */ + { 384, 387 }, /* Profile 36. */ + { 384, 387 }, /* Profile 37. */ + { 384, 387 }, /* Profile 38. */ + { 384, 387 }, /* Profile 39. */ + { 384, 387 }, /* Profile 40. */ + { 384, 387 }, /* Profile 41. */ + }, + .profile_cnt = 42, + }, + { + .name = "EGR_MTOP_INDEX_LO_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0", + .fid = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_EGR_MTOP_INDEX_LO_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ + { 48, 63 }, /* Profile 6. */ + { 48, 63 }, /* Profile 7. */ + { 48, 63 }, /* Profile 8. */ + { 48, 63 }, /* Profile 9. */ + { -1, -1 }, /* Profile 10. */ + { -1, -1 }, /* Profile 11. */ + { -1, -1 }, /* Profile 12. */ + { -1, -1 }, /* Profile 13. */ + { -1, -1 }, /* Profile 14. */ + { -1, -1 }, /* Profile 15. */ + { 48, 63 }, /* Profile 16. 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{ 80, 95 }, /* Profile 2. */ + { 80, 95 }, /* Profile 3. */ + { 80, 95 }, /* Profile 4. */ + { 80, 95 }, /* Profile 5. */ + { 80, 95 }, /* Profile 6. */ + { 80, 95 }, /* Profile 7. */ + { 80, 95 }, /* Profile 8. */ + { 80, 95 }, /* Profile 9. */ + { 80, 95 }, /* Profile 10. */ + { 80, 95 }, /* Profile 11. */ + { -1, -1 }, /* Profile 12. */ + { -1, -1 }, /* Profile 13. */ + { -1, -1 }, /* Profile 14. */ + { -1, -1 }, /* Profile 15. */ + { -1, -1 }, /* Profile 16. */ + { -1, -1 }, /* Profile 17. */ + { -1, -1 }, /* Profile 18. */ + { -1, -1 }, /* Profile 19. */ + { -1, -1 }, /* Profile 20. */ + { -1, -1 }, /* Profile 21. */ + { 80, 95 }, /* Profile 22. */ + { 80, 95 }, /* Profile 23. */ + { 80, 95 }, /* Profile 24. */ + { 80, 95 }, /* Profile 25. */ + { 80, 95 }, /* Profile 26. */ + { 80, 95 }, /* Profile 27. */ + { 80, 95 }, /* Profile 28. */ + { 80, 95 }, /* Profile 29. */ + { 80, 95 }, /* Profile 30. */ + { 80, 95 }, /* Profile 31. */ + }, + .profile_cnt = 32, + }, + { + .name = "ENTROPY_LABEL_HIGH_3_0", + .fid = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 424, 427 }, /* Profile 2. */ + { 424, 427 }, /* Profile 3. */ + { 424, 427 }, /* Profile 4. */ + { 424, 427 }, /* Profile 5. */ + { 424, 427 }, /* Profile 6. */ + { 424, 427 }, /* Profile 7. */ + { 424, 427 }, /* Profile 8. */ + { 424, 427 }, /* Profile 9. */ + { 424, 427 }, /* Profile 10. */ + { 424, 427 }, /* Profile 11. */ + { 424, 427 }, /* Profile 12. */ + { 424, 427 }, /* Profile 13. */ + { 424, 427 }, /* Profile 14. */ + { 424, 427 }, /* Profile 15. */ + { 424, 427 }, /* Profile 16. */ + { 424, 427 }, /* Profile 17. */ + { 424, 427 }, /* Profile 18. */ + { 424, 427 }, /* Profile 19. */ + { 424, 427 }, /* Profile 20. */ + { 424, 427 }, /* Profile 21. */ + { 424, 427 }, /* Profile 22. */ + { 424, 427 }, /* Profile 23. */ + { 424, 427 }, /* Profile 24. */ + { 424, 427 }, /* Profile 25. */ + { 424, 427 }, /* Profile 26. */ + { 424, 427 }, /* Profile 27. */ + { 424, 427 }, /* Profile 28. */ + { 424, 427 }, /* Profile 29. */ + { 424, 427 }, /* Profile 30. */ + { 424, 427 }, /* Profile 31. */ + { 424, 427 }, /* Profile 32. */ + { 424, 427 }, /* Profile 33. */ + { 424, 427 }, /* Profile 34. */ + { 424, 427 }, /* Profile 35. */ + { 424, 427 }, /* Profile 36. */ + { 424, 427 }, /* Profile 37. */ + { 424, 427 }, /* Profile 38. */ + { 424, 427 }, /* Profile 39. */ + { 424, 427 }, /* Profile 40. */ + { 424, 427 }, /* Profile 41. */ + }, + .profile_cnt = 42, + }, + { + .name = "ENTROPY_LABEL_LOW_15_0", + .fid = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 128, 143 }, /* Profile 2. */ + { 128, 143 }, /* Profile 3. */ + { 128, 143 }, /* Profile 4. */ + { 128, 143 }, /* Profile 5. */ + { 128, 143 }, /* Profile 6. */ + { 128, 143 }, /* Profile 7. */ + { 128, 143 }, /* Profile 8. */ + { 128, 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Profile 38. */ + { 128, 143 }, /* Profile 39. */ + { 128, 143 }, /* Profile 40. */ + { 128, 143 }, /* Profile 41. */ + }, + .profile_cnt = 42, + }, + { + .name = "EP_NIH_HDR_TIMESTAMP_15_0", + .fid = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 256, 271 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { 240, 255 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ + { 256, 271 }, /* Profile 6. */ + { -1, -1 }, /* Profile 7. */ + { 240, 255 }, /* Profile 8. */ + { -1, -1 }, /* Profile 9. */ + { -1, -1 }, /* Profile 10. */ + { -1, -1 }, /* Profile 11. */ + { 256, 271 }, /* Profile 12. */ + { -1, -1 }, /* Profile 13. */ + { 240, 255 }, /* Profile 14. */ + { -1, -1 }, /* Profile 15. */ + { 256, 271 }, /* Profile 16. */ + { -1, -1 }, /* Profile 17. */ + { 240, 255 }, /* Profile 18. */ + { -1, -1 }, /* Profile 19. */ + { -1, -1 }, /* Profile 20. */ + { -1, -1 }, /* Profile 21. */ + { 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}, + .profile_cnt = 39, + }, + { + .name = "EVENT_TRACE_VECTOR_15_0", + .fid = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 0, 15 }, /* Profile 2. */ + { 0, 15 }, /* Profile 3. */ + { 0, 15 }, /* Profile 4. */ + { 0, 15 }, /* Profile 5. */ + { 0, 15 }, /* Profile 6. */ + { 0, 15 }, /* Profile 7. */ + { 0, 15 }, /* Profile 8. */ + { 0, 15 }, /* Profile 9. */ + { 0, 15 }, /* Profile 10. */ + { 0, 15 }, /* Profile 11. */ + { 0, 15 }, /* Profile 12. */ + { 0, 15 }, /* Profile 13. */ + { 0, 15 }, /* Profile 14. */ + { 0, 15 }, /* Profile 15. */ + { 0, 15 }, /* Profile 16. */ + { 0, 15 }, /* Profile 17. */ + { 0, 15 }, /* Profile 18. */ + { 0, 15 }, /* Profile 19. */ + { 0, 15 }, /* Profile 20. */ + { 0, 15 }, /* Profile 21. */ + { 0, 15 }, /* Profile 22. */ + { 0, 15 }, /* Profile 23. */ + { 0, 15 }, /* Profile 24. */ + { 0, 15 }, /* Profile 25. */ + { 0, 15 }, /* Profile 26. */ + { 0, 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Profile 39. */ + { 96, 111 }, /* Profile 40. */ + { 96, 111 }, /* Profile 41. */ + }, + .profile_cnt = 42, + }, + { + .name = "INGRESS_QOS_REMARK_CTRL_3_0", + .fid = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 428, 431 }, /* Profile 2. */ + { 428, 431 }, /* Profile 3. */ + { 428, 431 }, /* Profile 4. */ + { 428, 431 }, /* Profile 5. */ + { 428, 431 }, /* Profile 6. */ + { 428, 431 }, /* Profile 7. */ + { 428, 431 }, /* Profile 8. */ + { 428, 431 }, /* Profile 9. */ + { 428, 431 }, /* Profile 10. */ + { 428, 431 }, /* Profile 11. */ + { 428, 431 }, /* Profile 12. */ + { 428, 431 }, /* Profile 13. */ + { 428, 431 }, /* Profile 14. */ + { 428, 431 }, /* Profile 15. */ + { 428, 431 }, /* Profile 16. */ + { 428, 431 }, /* Profile 17. */ + { 428, 431 }, /* Profile 18. */ + { 428, 431 }, /* Profile 19. */ + { 428, 431 }, /* Profile 20. */ + { 428, 431 }, /* Profile 21. */ + { 428, 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79 }, /* Profile 10. */ + { 64, 79 }, /* Profile 11. */ + { 64, 79 }, /* Profile 12. */ + { 64, 79 }, /* Profile 13. */ + { 64, 79 }, /* Profile 14. */ + { 64, 79 }, /* Profile 15. */ + { 64, 79 }, /* Profile 16. */ + { 64, 79 }, /* Profile 17. */ + { 64, 79 }, /* Profile 18. */ + { 64, 79 }, /* Profile 19. */ + { 64, 79 }, /* Profile 20. */ + { 64, 79 }, /* Profile 21. */ + { 64, 79 }, /* Profile 22. */ + { 64, 79 }, /* Profile 23. */ + { 64, 79 }, /* Profile 24. */ + { 64, 79 }, /* Profile 25. */ + { 64, 79 }, /* Profile 26. */ + { 64, 79 }, /* Profile 27. */ + { 64, 79 }, /* Profile 28. */ + { 64, 79 }, /* Profile 29. */ + { 64, 79 }, /* Profile 30. */ + { 64, 79 }, /* Profile 31. */ + { 64, 79 }, /* Profile 32. */ + { 64, 79 }, /* Profile 33. */ + { 64, 79 }, /* Profile 34. */ + { 64, 79 }, /* Profile 35. */ + { 64, 79 }, /* Profile 36. */ + { 64, 79 }, /* Profile 37. */ + { 64, 79 }, /* Profile 38. */ + { 64, 79 }, /* Profile 39. */ + { 64, 79 }, /* Profile 40. */ + { 64, 79 }, /* Profile 41. */ + }, + .profile_cnt = 42, + }, + { + .name = "PKT_MISC_CTRL_0_3_0", + .fid = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 408, 411 }, /* Profile 2. */ + { 408, 411 }, /* Profile 3. */ + { 408, 411 }, /* Profile 4. */ + { 408, 411 }, /* Profile 5. */ + { 408, 411 }, /* Profile 6. */ + { 408, 411 }, /* Profile 7. */ + { 408, 411 }, /* Profile 8. */ + { 408, 411 }, /* Profile 9. */ + { 408, 411 }, /* Profile 10. */ + { 408, 411 }, /* Profile 11. */ + { 408, 411 }, /* Profile 12. */ + { 408, 411 }, /* Profile 13. */ + { 408, 411 }, /* Profile 14. */ + { 408, 411 }, /* Profile 15. */ + { 408, 411 }, /* Profile 16. */ + { 408, 411 }, /* Profile 17. */ + { 408, 411 }, /* Profile 18. */ + { 408, 411 }, /* Profile 19. */ + { 408, 411 }, /* Profile 20. */ + { 408, 411 }, /* Profile 21. */ + { 408, 411 }, /* Profile 22. */ + { 408, 411 }, /* Profile 23. */ + { 408, 411 }, /* Profile 24. */ + { 408, 411 }, /* Profile 25. */ + { 408, 411 }, /* Profile 26. */ + { 408, 411 }, /* Profile 27. */ + { 408, 411 }, /* Profile 28. */ + { 408, 411 }, /* Profile 29. */ + { 408, 411 }, /* Profile 30. */ + { 408, 411 }, /* Profile 31. */ + { 408, 411 }, /* Profile 32. */ + { 408, 411 }, /* Profile 33. */ + { 408, 411 }, /* Profile 34. */ + { 408, 411 }, /* Profile 35. */ + { 408, 411 }, /* Profile 36. */ + { 408, 411 }, /* Profile 37. */ + { 408, 411 }, /* Profile 38. */ + { 408, 411 }, /* Profile 39. */ + { 408, 411 }, /* Profile 40. */ + { 408, 411 }, /* Profile 41. */ + }, + .profile_cnt = 42, + }, + { + .name = "SVP_15_0", + .fid = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_SVP_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 288, 303 }, /* Profile 2. */ + { 288, 303 }, /* Profile 3. */ + { 272, 287 }, /* Profile 4. */ + { 272, 287 }, /* Profile 5. */ + { 288, 303 }, /* Profile 6. */ + { 288, 303 }, /* Profile 7. */ + { 272, 287 }, /* Profile 8. */ + { 272, 287 }, /* Profile 9. */ + { 288, 303 }, /* Profile 10. */ + { 272, 287 }, /* Profile 11. */ + { 288, 303 }, /* Profile 12. */ + { 288, 303 }, /* Profile 13. */ + { 272, 287 }, /* Profile 14. */ + { 272, 287 }, /* Profile 15. */ + { 288, 303 }, /* Profile 16. */ + { 288, 303 }, /* Profile 17. */ + { 272, 287 }, /* Profile 18. */ + { 272, 287 }, /* Profile 19. */ + { 288, 303 }, /* Profile 20. */ + { 272, 287 }, /* Profile 21. */ + { 288, 303 }, /* Profile 22. */ + { 288, 303 }, /* Profile 23. */ + { 272, 287 }, /* Profile 24. */ + { 272, 287 }, /* Profile 25. */ + { 288, 303 }, /* Profile 26. */ + { 288, 303 }, /* Profile 27. */ + { 272, 287 }, /* Profile 28. */ + { 272, 287 }, /* Profile 29. */ + { 288, 303 }, /* Profile 30. */ + { 272, 287 }, /* Profile 31. */ + { 288, 303 }, /* Profile 32. */ + { 288, 303 }, /* Profile 33. */ + { 272, 287 }, /* Profile 34. */ + { 272, 287 }, /* Profile 35. */ + { 288, 303 }, /* Profile 36. */ + { 288, 303 }, /* Profile 37. */ + { 272, 287 }, /* Profile 38. */ + { 272, 287 }, /* Profile 39. */ + { 288, 303 }, /* Profile 40. */ + { 272, 287 }, /* Profile 41. */ + }, + .profile_cnt = 42, + }, + { + .name = "SVP_NETWORK_GROUP_BITMAP_3_0", + .fid = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 400, 403 }, /* Profile 2. */ + { 400, 403 }, /* Profile 3. */ + { 400, 403 }, /* Profile 4. */ + { 400, 403 }, /* Profile 5. */ + { 400, 403 }, /* Profile 6. */ + { 400, 403 }, /* Profile 7. */ + { 400, 403 }, /* Profile 8. */ + { 400, 403 }, /* Profile 9. */ + { 400, 403 }, /* Profile 10. */ + { 400, 403 }, /* Profile 11. */ + { 400, 403 }, /* Profile 12. */ + { 400, 403 }, /* Profile 13. */ + { 400, 403 }, /* Profile 14. */ + { 400, 403 }, /* Profile 15. */ + { 400, 403 }, /* Profile 16. */ + { 400, 403 }, /* Profile 17. */ + { 400, 403 }, /* Profile 18. */ + { 400, 403 }, /* Profile 19. */ + { 400, 403 }, /* Profile 20. */ + { 400, 403 }, /* Profile 21. */ + { 400, 403 }, /* Profile 22. */ + { 400, 403 }, /* Profile 23. */ + { 400, 403 }, /* Profile 24. */ + { 400, 403 }, /* Profile 25. */ + { 400, 403 }, /* Profile 26. */ + { 400, 403 }, /* Profile 27. */ + { 400, 403 }, /* Profile 28. */ + { 400, 403 }, /* Profile 29. */ + { 400, 403 }, /* Profile 30. */ + { 400, 403 }, /* Profile 31. */ + { 400, 403 }, /* Profile 32. */ + { 400, 403 }, /* Profile 33. */ + { 400, 403 }, /* Profile 34. */ + { 400, 403 }, /* Profile 35. */ + { 400, 403 }, /* Profile 36. */ + { 400, 403 }, /* Profile 37. */ + { 400, 403 }, /* Profile 38. */ + { 400, 403 }, /* Profile 39. */ + { 400, 403 }, /* Profile 40. */ + { 400, 403 }, /* Profile 41. */ + }, + .profile_cnt = 42, + }, + { + .name = "SYSTEM_DESTINATION_15_0", + .fid = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 224, 239 }, /* Profile 2. */ + { 224, 239 }, /* Profile 3. */ + { 208, 223 }, /* Profile 4. */ + { 208, 223 }, /* Profile 5. */ + { 224, 239 }, /* Profile 6. */ + { 224, 239 }, /* Profile 7. */ + { 208, 223 }, /* Profile 8. */ + { 208, 223 }, /* Profile 9. */ + { 224, 239 }, /* Profile 10. */ + { 208, 223 }, /* Profile 11. */ + { 224, 239 }, /* Profile 12. */ + { 224, 239 }, /* Profile 13. */ + { 208, 223 }, /* Profile 14. */ + { 208, 223 }, /* Profile 15. */ + { 224, 239 }, /* Profile 16. */ + { 224, 239 }, /* Profile 17. */ + { 208, 223 }, /* Profile 18. */ + { 208, 223 }, /* Profile 19. */ + { 224, 239 }, /* Profile 20. */ + { 208, 223 }, /* Profile 21. */ + { 224, 239 }, /* Profile 22. */ + { 224, 239 }, /* Profile 23. */ + { 208, 223 }, /* Profile 24. */ + { 208, 223 }, /* Profile 25. */ + { 224, 239 }, /* Profile 26. */ + { 224, 239 }, /* Profile 27. */ + { 208, 223 }, /* Profile 28. */ + { 208, 223 }, /* Profile 29. */ + { 224, 239 }, /* Profile 30. */ + { 208, 223 }, /* Profile 31. */ + { 224, 239 }, /* Profile 32. */ + { 224, 239 }, /* Profile 33. */ + { 208, 223 }, /* Profile 34. */ + { 208, 223 }, /* Profile 35. */ + { 224, 239 }, /* Profile 36. */ + { 224, 239 }, /* Profile 37. */ + { 208, 223 }, /* Profile 38. */ + { 208, 223 }, /* Profile 39. */ + { 224, 239 }, /* Profile 40. */ + { 208, 223 }, /* Profile 41. */ + }, + .profile_cnt = 42, + }, + { + .name = "SYSTEM_OPCODE_3_0", + .fid = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 420, 423 }, /* Profile 2. */ + { 420, 423 }, /* Profile 3. */ + { 420, 423 }, /* Profile 4. */ + { 420, 423 }, /* Profile 5. */ + { 420, 423 }, /* Profile 6. */ + { 420, 423 }, /* Profile 7. */ + { 420, 423 }, /* Profile 8. */ + { 420, 423 }, /* Profile 9. */ + { 420, 423 }, /* Profile 10. */ + { 420, 423 }, /* Profile 11. */ + { 420, 423 }, /* Profile 12. */ + { 420, 423 }, /* Profile 13. */ + { 420, 423 }, /* Profile 14. */ + { 420, 423 }, /* Profile 15. */ + { 420, 423 }, /* Profile 16. */ + { 420, 423 }, /* Profile 17. */ + { 420, 423 }, /* Profile 18. */ + { 420, 423 }, /* Profile 19. */ + { 420, 423 }, /* Profile 20. */ + { 420, 423 }, /* Profile 21. */ + { 420, 423 }, /* Profile 22. */ + { 420, 423 }, /* Profile 23. */ + { 420, 423 }, /* Profile 24. */ + { 420, 423 }, /* Profile 25. */ + { 420, 423 }, /* Profile 26. */ + { 420, 423 }, /* Profile 27. */ + { 420, 423 }, /* Profile 28. */ + { 420, 423 }, /* Profile 29. */ + { 420, 423 }, /* Profile 30. */ + { 420, 423 }, /* Profile 31. */ + { 420, 423 }, /* Profile 32. */ + { 420, 423 }, /* Profile 33. */ + { 420, 423 }, /* Profile 34. */ + { 420, 423 }, /* Profile 35. */ + { 420, 423 }, /* Profile 36. */ + { 420, 423 }, /* Profile 37. */ + { 420, 423 }, /* Profile 38. */ + { 420, 423 }, /* Profile 39. */ + { 420, 423 }, /* Profile 40. */ + { 420, 423 }, /* Profile 41. */ + }, + .profile_cnt = 42, + }, + { + .name = "SYSTEM_SOURCE_15_0", + .fid = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { -1, -1 }, /* Profile 7. */ + { -1, -1 }, /* Profile 8. */ + { -1, -1 }, /* Profile 9. */ + { -1, -1 }, /* Profile 10. */ + { -1, -1 }, /* Profile 11. */ + { -1, -1 }, /* Profile 12. */ + { -1, -1 }, /* Profile 13. */ + { -1, -1 }, /* Profile 14. */ + { -1, -1 }, /* Profile 15. */ + { -1, -1 }, /* Profile 16. */ + { -1, -1 }, /* Profile 17. */ + { -1, -1 }, /* Profile 18. */ + { -1, -1 }, /* Profile 19. */ + { -1, -1 }, /* Profile 20. */ + { -1, -1 }, /* Profile 21. */ + { 208, 223 }, /* Profile 22. */ + { 208, 223 }, /* Profile 23. */ + { 192, 207 }, /* Profile 24. */ + { 192, 207 }, /* Profile 25. */ + { 208, 223 }, /* Profile 26. */ + { 208, 223 }, /* Profile 27. */ + { 192, 207 }, /* Profile 28. */ + { 192, 207 }, /* Profile 29. */ + { 208, 223 }, /* Profile 30. */ + { 192, 207 }, /* Profile 31. */ + { 208, 223 }, /* Profile 32. */ + { 208, 223 }, /* Profile 33. */ + { 192, 207 }, /* Profile 34. */ + { 192, 207 }, /* Profile 35. */ + { 208, 223 }, /* Profile 36. */ + { 208, 223 }, /* Profile 37. */ + { 192, 207 }, /* Profile 38. */ + { 192, 207 }, /* Profile 39. */ + { 208, 223 }, /* Profile 40. */ + { 192, 207 }, /* Profile 41. */ + }, + .profile_cnt = 42, + }, + { + .name = "TIMESTAMP_CTRL_3_0", + .fid = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 416, 419 }, /* Profile 2. */ + { 416, 419 }, /* Profile 3. */ + { 416, 419 }, /* Profile 4. */ + { 416, 419 }, /* Profile 5. */ + { 416, 419 }, /* Profile 6. */ + { 416, 419 }, /* Profile 7. */ + { 416, 419 }, /* Profile 8. */ + { 416, 419 }, /* Profile 9. */ + { 416, 419 }, /* Profile 10. */ + { 416, 419 }, /* Profile 11. */ + { 416, 419 }, /* Profile 12. */ + { 416, 419 }, /* Profile 13. */ + { 416, 419 }, /* Profile 14. */ + { 416, 419 }, /* Profile 15. */ + { 416, 419 }, /* Profile 16. */ + { 416, 419 }, /* Profile 17. */ + { 416, 419 }, /* Profile 18. */ + { 416, 419 }, /* Profile 19. */ + { 416, 419 }, /* Profile 20. */ + { 416, 419 }, /* Profile 21. */ + { 416, 419 }, /* Profile 22. */ + { 416, 419 }, /* Profile 23. */ + { 416, 419 }, /* Profile 24. */ + { 416, 419 }, /* Profile 25. */ + { 416, 419 }, /* Profile 26. */ + { 416, 419 }, /* Profile 27. */ + { 416, 419 }, /* Profile 28. */ + { 416, 419 }, /* Profile 29. */ + { 416, 419 }, /* Profile 30. */ + { 416, 419 }, /* Profile 31. */ + { 416, 419 }, /* Profile 32. */ + { 416, 419 }, /* Profile 33. */ + { 416, 419 }, /* Profile 34. */ + { 416, 419 }, /* Profile 35. */ + { 416, 419 }, /* Profile 36. */ + { 416, 419 }, /* Profile 37. */ + { 416, 419 }, /* Profile 38. */ + { 416, 419 }, /* Profile 39. */ + { 416, 419 }, /* Profile 40. */ + { 416, 419 }, /* Profile 41. */ + }, + .profile_cnt = 42, + }, + { + .name = "TUNNEL_PROCESSING_RESULTS_1_3_0", + .fid = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 412, 415 }, /* Profile 2. */ + { 412, 415 }, /* Profile 3. */ + { 412, 415 }, /* Profile 4. */ + { 412, 415 }, /* Profile 5. */ + { 412, 415 }, /* Profile 6. */ + { 412, 415 }, /* Profile 7. */ + { 412, 415 }, /* Profile 8. */ + { 412, 415 }, /* Profile 9. */ + { 412, 415 }, /* Profile 10. */ + { 412, 415 }, /* Profile 11. */ + { 412, 415 }, /* Profile 12. */ + { 412, 415 }, /* Profile 13. */ + { 412, 415 }, /* Profile 14. */ + { 412, 415 }, /* Profile 15. */ + { 412, 415 }, /* Profile 16. */ + { 412, 415 }, /* Profile 17. */ + { 412, 415 }, /* Profile 18. */ + { 412, 415 }, /* Profile 19. */ + { 412, 415 }, /* Profile 20. */ + { 412, 415 }, /* Profile 21. */ + { 412, 415 }, /* Profile 22. */ + { 412, 415 }, /* Profile 23. */ + { 412, 415 }, /* Profile 24. */ + { 412, 415 }, /* Profile 25. */ + { 412, 415 }, /* Profile 26. */ + { 412, 415 }, /* Profile 27. */ + { 412, 415 }, /* Profile 28. */ + { 412, 415 }, /* Profile 29. */ + { 412, 415 }, /* Profile 30. */ + { 412, 415 }, /* Profile 31. */ + { 412, 415 }, /* Profile 32. */ + { 412, 415 }, /* Profile 33. */ + { 412, 415 }, /* Profile 34. */ + { 412, 415 }, /* Profile 35. */ + { 412, 415 }, /* Profile 36. */ + { 412, 415 }, /* Profile 37. */ + { 412, 415 }, /* Profile 38. */ + { 412, 415 }, /* Profile 39. */ + { 412, 415 }, /* Profile 40. */ + { 412, 415 }, /* Profile 41. */ + }, + .profile_cnt = 42, + }, + { + .name = "VFI_15_0", + .fid = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_VFI_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 336, 351 }, /* Profile 2. */ + { 336, 351 }, /* Profile 3. */ + { 320, 335 }, /* Profile 4. */ + { 320, 335 }, /* Profile 5. */ + { 336, 351 }, /* Profile 6. */ + { 336, 351 }, /* Profile 7. */ + { 320, 335 }, /* Profile 8. */ + { 320, 335 }, /* Profile 9. */ + { 336, 351 }, /* Profile 10. */ + { 320, 335 }, /* Profile 11. */ + { 336, 351 }, /* Profile 12. */ + { 336, 351 }, /* Profile 13. */ + { 320, 335 }, /* Profile 14. */ + { 320, 335 }, /* Profile 15. */ + { 336, 351 }, /* Profile 16. */ + { 336, 351 }, /* Profile 17. */ + { 320, 335 }, /* Profile 18. */ + { 320, 335 }, /* Profile 19. */ + { 336, 351 }, /* Profile 20. */ + { 320, 335 }, /* Profile 21. */ + { 336, 351 }, /* Profile 22. */ + { 336, 351 }, /* Profile 23. */ + { 320, 335 }, /* Profile 24. */ + { 320, 335 }, /* Profile 25. */ + { 336, 351 }, /* Profile 26. */ + { 336, 351 }, /* Profile 27. */ + { 320, 335 }, /* Profile 28. */ + { 320, 335 }, /* Profile 29. */ + { 336, 351 }, /* Profile 30. */ + { 320, 335 }, /* Profile 31. */ + { 336, 351 }, /* Profile 32. */ + { 336, 351 }, /* Profile 33. */ + { 320, 335 }, /* Profile 34. */ + { 320, 335 }, /* Profile 35. */ + { 336, 351 }, /* Profile 36. */ + { 336, 351 }, /* Profile 37. */ + { 320, 335 }, /* Profile 38. */ + { 320, 335 }, /* Profile 39. */ + { 336, 351 }, /* Profile 40. */ + { 320, 335 }, /* Profile 41. */ + }, + .profile_cnt = 42, + }, + { + .name = "VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0", + .fid = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 392, 395 }, /* Profile 2. */ + { 392, 395 }, /* Profile 3. */ + { 392, 395 }, /* Profile 4. */ + { 392, 395 }, /* Profile 5. */ + { 392, 395 }, /* Profile 6. */ + { 392, 395 }, /* Profile 7. */ + { 392, 395 }, /* Profile 8. */ + { 392, 395 }, /* Profile 9. */ + { 392, 395 }, /* Profile 10. */ + { 392, 395 }, /* Profile 11. */ + { 392, 395 }, /* Profile 12. */ + { 392, 395 }, /* Profile 13. */ + { 392, 395 }, /* Profile 14. */ + { 392, 395 }, /* Profile 15. */ + { 392, 395 }, /* Profile 16. */ + { 392, 395 }, /* Profile 17. */ + { 392, 395 }, /* Profile 18. */ + { 392, 395 }, /* Profile 19. */ + { 392, 395 }, /* Profile 20. */ + { 392, 395 }, /* Profile 21. */ + { 392, 395 }, /* Profile 22. */ + { 392, 395 }, /* Profile 23. */ + { 392, 395 }, /* Profile 24. */ + { 392, 395 }, /* Profile 25. */ + { 392, 395 }, /* Profile 26. */ + { 392, 395 }, /* Profile 27. */ + { 392, 395 }, /* Profile 28. */ + { 392, 395 }, /* Profile 29. */ + { 392, 395 }, /* Profile 30. */ + { 392, 395 }, /* Profile 31. */ + { 392, 395 }, /* Profile 32. */ + { 392, 395 }, /* Profile 33. */ + { 392, 395 }, /* Profile 34. */ + { 392, 395 }, /* Profile 35. */ + { 392, 395 }, /* Profile 36. */ + { 392, 395 }, /* Profile 37. */ + { 392, 395 }, /* Profile 38. */ + { 392, 395 }, /* Profile 39. */ + { 392, 395 }, /* Profile 40. */ + { 392, 395 }, /* Profile 41. */ + }, + .profile_cnt = 42, + }, +}; +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_rxpmd_flex_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_FID_COUNT, + .info = bcm56780_a0_hna_6_5_32_2_0_rxpmd_flex_field_data, + .profile_bmp_cnt = 2, + .profile_bmp[0] = 0xfffffffc, + .profile_bmp[1] = 0x3ff, + +}; + +static shr_enum_map_t bcm56780_a0_hna_6_5_32_2_0_rxpmd_flex_reason_names[] = { + BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT +}; + +static bcmpkt_flex_reasons_info_t bcm56780_a0_hna_6_5_32_2_0_rxpmd_flex_reasons_info = { + .num_reasons = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_COUNT, + .reason_names = bcm56780_a0_hna_6_5_32_2_0_rxpmd_flex_reason_names, + .reason_encode = bcm56780_a0_hna_6_5_32_2_0_rxpmd_flex_reason_encode, + .reason_decode = bcm56780_a0_hna_6_5_32_2_0_rxpmd_flex_reason_decode, +}; + + +static int32_t bcmpkt_arp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_arp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_arp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_arp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_arp_t_operation_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_arp_t_operation_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_arp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_arp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_arp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_arp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_arp_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_FID_COUNT] = { + bcmpkt_arp_t_hardware_len_get, + bcmpkt_arp_t_hardware_type_get, + bcmpkt_arp_t_operation_get, + bcmpkt_arp_t_prot_addr_len_get, + bcmpkt_arp_t_protocol_type_get, + bcmpkt_arp_t_sender_ha_get, + bcmpkt_arp_t_sender_ip_get, + bcmpkt_arp_t_target_ha_get, + bcmpkt_arp_t_target_ip_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_arp_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_FID_COUNT] = { + bcmpkt_arp_t_hardware_len_set, + bcmpkt_arp_t_hardware_type_set, + bcmpkt_arp_t_operation_set, + bcmpkt_arp_t_prot_addr_len_set, + bcmpkt_arp_t_protocol_type_set, + bcmpkt_arp_t_sender_ha_set, + bcmpkt_arp_t_sender_ip_set, + bcmpkt_arp_t_target_ha_set, + bcmpkt_arp_t_target_ip_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_arp_t_field_data[] = { + BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_arp_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_32_2_0_arp_t_field_data, +}; + + +static int32_t bcmpkt_authen_t_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_authen_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_authen_t_payload_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_authen_t_payload_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_authen_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_authen_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_authen_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_spi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_spi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_authen_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_AUTHEN_T_FID_COUNT] = { + bcmpkt_authen_t_data_get, + bcmpkt_authen_t_next_header_get, + bcmpkt_authen_t_payload_len_get, + bcmpkt_authen_t_reserved_get, + bcmpkt_authen_t_seq_num_get, + bcmpkt_authen_t_spi_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_authen_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_AUTHEN_T_FID_COUNT] = { + bcmpkt_authen_t_data_set, + bcmpkt_authen_t_next_header_set, + bcmpkt_authen_t_payload_len_set, + bcmpkt_authen_t_reserved_set, + bcmpkt_authen_t_seq_num_set, + bcmpkt_authen_t_spi_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_authen_t_field_data[] = { + BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_authen_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_AUTHEN_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_32_2_0_authen_t_field_data, +}; + + +static int32_t bcmpkt_bfd_t_desmintxintv_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_desmintxintv_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_minechorxintv_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_minechorxintv_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_reqminrxintv_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_reqminrxintv_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_ap_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 18, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_ap_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 18, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_bfd_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_bfd_t_bfd_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_cpi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 19, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_cpi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 19, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_dem_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 17, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_dem_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 17, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_detectmult_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_bfd_t_detectmult_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_diag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 5); + + return ret; +} + +static int32_t bcmpkt_bfd_t_diag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 5, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_fin_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_fin_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_mpt_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_mpt_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_mydiscrim_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_mydiscrim_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_poll_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 21, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_poll_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 21, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_sta_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 22, 2); + + return ret; +} + +static int32_t bcmpkt_bfd_t_sta_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 22, 2, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_urdiscrim_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_urdiscrim_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 29, 3); + + return ret; +} + +static int32_t bcmpkt_bfd_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 29, 3, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_bfd_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_FID_COUNT] = { + bcmpkt_bfd_t_ap_get, + bcmpkt_bfd_t_bfd_length_get, + bcmpkt_bfd_t_cpi_get, + bcmpkt_bfd_t_dem_get, + bcmpkt_bfd_t_desmintxintv_get, + bcmpkt_bfd_t_detectmult_get, + bcmpkt_bfd_t_diag_get, + bcmpkt_bfd_t_fin_get, + bcmpkt_bfd_t_minechorxintv_get, + bcmpkt_bfd_t_mpt_get, + bcmpkt_bfd_t_mydiscrim_get, + bcmpkt_bfd_t_poll_get, + bcmpkt_bfd_t_reqminrxintv_get, + bcmpkt_bfd_t_sta_get, + bcmpkt_bfd_t_urdiscrim_get, + bcmpkt_bfd_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_bfd_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_FID_COUNT] = { + bcmpkt_bfd_t_ap_set, + bcmpkt_bfd_t_bfd_length_set, + bcmpkt_bfd_t_cpi_set, + bcmpkt_bfd_t_dem_set, + bcmpkt_bfd_t_desmintxintv_set, + bcmpkt_bfd_t_detectmult_set, + bcmpkt_bfd_t_diag_set, + bcmpkt_bfd_t_fin_set, + bcmpkt_bfd_t_minechorxintv_set, + bcmpkt_bfd_t_mpt_set, + bcmpkt_bfd_t_mydiscrim_set, + bcmpkt_bfd_t_poll_set, + bcmpkt_bfd_t_reqminrxintv_set, + bcmpkt_bfd_t_sta_set, + bcmpkt_bfd_t_urdiscrim_set, + bcmpkt_bfd_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_bfd_t_field_data[] = { + BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_bfd_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_32_2_0_bfd_t_field_data, +}; + + +static int32_t bcmpkt_cntag_t_rpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_cntag_t_rpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_cntag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_cntag_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_cntag_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CNTAG_T_FID_COUNT] = { + bcmpkt_cntag_t_rpid_get, + bcmpkt_cntag_t_tpid_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_cntag_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CNTAG_T_FID_COUNT] = { + bcmpkt_cntag_t_rpid_set, + bcmpkt_cntag_t_tpid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_cntag_t_field_data[] = { + BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_cntag_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CNTAG_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_32_2_0_cntag_t_field_data, +}; + + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_cpu_composites_0_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { + bcmpkt_cpu_composites_0_t_dma_cont0_get, + bcmpkt_cpu_composites_0_t_dma_cont1_get, + bcmpkt_cpu_composites_0_t_dma_cont2_get, + bcmpkt_cpu_composites_0_t_dma_cont3_get, + bcmpkt_cpu_composites_0_t_dma_cont4_get, + bcmpkt_cpu_composites_0_t_dma_cont5_get, + bcmpkt_cpu_composites_0_t_dma_cont6_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_cpu_composites_0_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { + bcmpkt_cpu_composites_0_t_dma_cont0_set, + bcmpkt_cpu_composites_0_t_dma_cont1_set, + bcmpkt_cpu_composites_0_t_dma_cont2_set, + bcmpkt_cpu_composites_0_t_dma_cont3_set, + bcmpkt_cpu_composites_0_t_dma_cont4_set, + bcmpkt_cpu_composites_0_t_dma_cont5_set, + bcmpkt_cpu_composites_0_t_dma_cont6_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_cpu_composites_0_t_field_data[] = { + BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_cpu_composites_0_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_32_2_0_cpu_composites_0_t_field_data, +}; + + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_cpu_composites_1_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { + bcmpkt_cpu_composites_1_t_dma_cont10_get, + bcmpkt_cpu_composites_1_t_dma_cont11_get, + bcmpkt_cpu_composites_1_t_dma_cont12_get, + bcmpkt_cpu_composites_1_t_dma_cont13_get, + bcmpkt_cpu_composites_1_t_dma_cont14_get, + bcmpkt_cpu_composites_1_t_dma_cont15_get, + bcmpkt_cpu_composites_1_t_dma_cont16_get, + bcmpkt_cpu_composites_1_t_dma_cont17_get, + bcmpkt_cpu_composites_1_t_dma_cont7_get, + bcmpkt_cpu_composites_1_t_dma_cont8_get, + bcmpkt_cpu_composites_1_t_dma_cont9_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_cpu_composites_1_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { + bcmpkt_cpu_composites_1_t_dma_cont10_set, + bcmpkt_cpu_composites_1_t_dma_cont11_set, + bcmpkt_cpu_composites_1_t_dma_cont12_set, + bcmpkt_cpu_composites_1_t_dma_cont13_set, + bcmpkt_cpu_composites_1_t_dma_cont14_set, + bcmpkt_cpu_composites_1_t_dma_cont15_set, + bcmpkt_cpu_composites_1_t_dma_cont16_set, + bcmpkt_cpu_composites_1_t_dma_cont17_set, + bcmpkt_cpu_composites_1_t_dma_cont7_set, + bcmpkt_cpu_composites_1_t_dma_cont8_set, + bcmpkt_cpu_composites_1_t_dma_cont9_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_cpu_composites_1_t_field_data[] = { + BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_cpu_composites_1_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_32_2_0_cpu_composites_1_t_field_data, +}; + + +static int32_t bcmpkt_dest_option_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_dest_option_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_dest_option_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_dest_option_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_dest_option_t_option_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_dest_option_t_option_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_dest_option_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = { + bcmpkt_dest_option_t_hdr_ext_len_get, + bcmpkt_dest_option_t_next_header_get, + bcmpkt_dest_option_t_option_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_dest_option_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = { + bcmpkt_dest_option_t_hdr_ext_len_set, + bcmpkt_dest_option_t_next_header_set, + bcmpkt_dest_option_t_option_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_dest_option_t_field_data[] = { + BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_dest_option_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_DEST_OPTION_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_32_2_0_dest_option_t_field_data, +}; + + +static int32_t bcmpkt_ep_nih_header_t_header_subtype_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_header_subtype_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_header_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 6); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_header_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 6, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 20, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_start_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 30, 2); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_start_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 30, 2, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_ep_nih_header_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = { + bcmpkt_ep_nih_header_t_header_subtype_get, + bcmpkt_ep_nih_header_t_header_type_get, + bcmpkt_ep_nih_header_t_opaque_ctrl_a_get, + bcmpkt_ep_nih_header_t_opaque_ctrl_b_get, + bcmpkt_ep_nih_header_t_opaque_ctrl_c_get, + bcmpkt_ep_nih_header_t_opaque_object_a_get, + bcmpkt_ep_nih_header_t_opaque_object_b_get, + bcmpkt_ep_nih_header_t_opaque_object_c_get, + bcmpkt_ep_nih_header_t_recirc_profile_index_get, + bcmpkt_ep_nih_header_t_reserved_0_get, + bcmpkt_ep_nih_header_t_start_get, + bcmpkt_ep_nih_header_t_timestamp_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_ep_nih_header_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = { + bcmpkt_ep_nih_header_t_header_subtype_set, + bcmpkt_ep_nih_header_t_header_type_set, + bcmpkt_ep_nih_header_t_opaque_ctrl_a_set, + bcmpkt_ep_nih_header_t_opaque_ctrl_b_set, + bcmpkt_ep_nih_header_t_opaque_ctrl_c_set, + bcmpkt_ep_nih_header_t_opaque_object_a_set, + bcmpkt_ep_nih_header_t_opaque_object_b_set, + bcmpkt_ep_nih_header_t_opaque_object_c_set, + bcmpkt_ep_nih_header_t_recirc_profile_index_set, + bcmpkt_ep_nih_header_t_reserved_0_set, + bcmpkt_ep_nih_header_t_start_set, + bcmpkt_ep_nih_header_t_timestamp_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_ep_nih_header_t_field_data[] = { + BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_ep_nih_header_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_32_2_0_ep_nih_header_t_field_data, +}; + + +static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 11, 2); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 11, 2, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 13, 3); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 13, 3, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 10); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 10, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_t_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 10, 1); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_t_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 10, 1, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 12); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 12, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_erspan3_fixed_hdr_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { + bcmpkt_erspan3_fixed_hdr_t_bso_get, + bcmpkt_erspan3_fixed_hdr_t_cos_get, + bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get, + bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get, + bcmpkt_erspan3_fixed_hdr_t_session_id_get, + bcmpkt_erspan3_fixed_hdr_t_t_get, + bcmpkt_erspan3_fixed_hdr_t_timestamp_get, + bcmpkt_erspan3_fixed_hdr_t_ver_get, + bcmpkt_erspan3_fixed_hdr_t_vlan_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_erspan3_fixed_hdr_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { + bcmpkt_erspan3_fixed_hdr_t_bso_set, + bcmpkt_erspan3_fixed_hdr_t_cos_set, + bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set, + bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set, + bcmpkt_erspan3_fixed_hdr_t_session_id_set, + bcmpkt_erspan3_fixed_hdr_t_t_set, + bcmpkt_erspan3_fixed_hdr_t_timestamp_set, + bcmpkt_erspan3_fixed_hdr_t_ver_set, + bcmpkt_erspan3_fixed_hdr_t_vlan_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_erspan3_fixed_hdr_t_field_data[] = { + BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_erspan3_fixed_hdr_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_32_2_0_erspan3_fixed_hdr_t_field_data, +}; + + +static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 26, 6); + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 26, 6, val); + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 10); + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 10, val); + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_erspan3_subhdr_5_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { + bcmpkt_erspan3_subhdr_5_t_platform_id_get, + bcmpkt_erspan3_subhdr_5_t_port_id_get, + bcmpkt_erspan3_subhdr_5_t_switch_id_get, + bcmpkt_erspan3_subhdr_5_t_timestamp_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_erspan3_subhdr_5_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { + bcmpkt_erspan3_subhdr_5_t_platform_id_set, + bcmpkt_erspan3_subhdr_5_t_port_id_set, + bcmpkt_erspan3_subhdr_5_t_switch_id_set, + bcmpkt_erspan3_subhdr_5_t_timestamp_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_erspan3_subhdr_5_t_field_data[] = { + BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_erspan3_subhdr_5_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_32_2_0_erspan3_subhdr_5_t_field_data, +}; + + +static int32_t bcmpkt_esp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 8); + + return ret; +} + +static int32_t bcmpkt_esp_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_esp_t_pad_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 8, 16); + + return ret; +} + +static int32_t bcmpkt_esp_t_pad_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 8, 16, val); + return ret; +} + +static int32_t bcmpkt_esp_t_pad_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 24, 8); + + return ret; +} + +static int32_t bcmpkt_esp_t_pad_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_esp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_esp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_esp_t_spi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_esp_t_spi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_esp_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ESP_T_FID_COUNT] = { + bcmpkt_esp_t_next_header_get, + bcmpkt_esp_t_pad_get, + bcmpkt_esp_t_pad_len_get, + bcmpkt_esp_t_seq_num_get, + bcmpkt_esp_t_spi_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_esp_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ESP_T_FID_COUNT] = { + bcmpkt_esp_t_next_header_set, + bcmpkt_esp_t_pad_set, + bcmpkt_esp_t_pad_len_set, + bcmpkt_esp_t_seq_num_set, + bcmpkt_esp_t_spi_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_esp_t_field_data[] = { + BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_esp_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ESP_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_32_2_0_esp_t_field_data, +}; + + +static int32_t bcmpkt_etag_t_tag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_etag_t_tag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_etag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_etag_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_etag_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ETAG_T_FID_COUNT] = { + bcmpkt_etag_t_tag_get, + bcmpkt_etag_t_tpid_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_etag_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ETAG_T_FID_COUNT] = { + bcmpkt_etag_t_tag_set, + bcmpkt_etag_t_tpid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_etag_t_field_data[] = { + BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_etag_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ETAG_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_32_2_0_etag_t_field_data, +}; + + +static int32_t bcmpkt_ethertype_t_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ethertype_t_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_ethertype_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = { + bcmpkt_ethertype_t_type_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_ethertype_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = { + bcmpkt_ethertype_t_type_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_ethertype_t_field_data[] = { + BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_ethertype_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_32_2_0_ethertype_t_field_data, +}; + + +static int32_t bcmpkt_frag_t_frag_info_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_frag_t_frag_info_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_frag_t_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_frag_t_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_frag_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_frag_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_frag_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_frag_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_frag_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_FRAG_T_FID_COUNT] = { + bcmpkt_frag_t_frag_info_get, + bcmpkt_frag_t_id_get, + bcmpkt_frag_t_next_header_get, + bcmpkt_frag_t_reserved_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_frag_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_FRAG_T_FID_COUNT] = { + bcmpkt_frag_t_frag_info_set, + bcmpkt_frag_t_id_set, + bcmpkt_frag_t_next_header_set, + bcmpkt_frag_t_reserved_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_frag_t_field_data[] = { + BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_frag_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_FRAG_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_32_2_0_frag_t_field_data, +}; + + +static int32_t bcmpkt_generic_loopback_t_destination_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_destination_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_destination_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_destination_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_entropy_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_entropy_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_header_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_header_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_input_priority_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_input_priority_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_ctrl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 4, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_ctrl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 4, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 28, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_qos_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_qos_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_source_system_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_source_system_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_start_byte_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_start_byte_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_svp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_svp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_generic_loopback_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { + bcmpkt_generic_loopback_t_destination_obj_get, + bcmpkt_generic_loopback_t_destination_type_get, + bcmpkt_generic_loopback_t_entropy_obj_get, + bcmpkt_generic_loopback_t_flags_get, + bcmpkt_generic_loopback_t_header_type_get, + bcmpkt_generic_loopback_t_input_priority_get, + bcmpkt_generic_loopback_t_interface_ctrl_get, + bcmpkt_generic_loopback_t_interface_obj_get, + bcmpkt_generic_loopback_t_processing_ctrl_0_get, + bcmpkt_generic_loopback_t_processing_ctrl_1_get, + bcmpkt_generic_loopback_t_qos_obj_get, + bcmpkt_generic_loopback_t_reserved_1_get, + bcmpkt_generic_loopback_t_source_system_port_get, + bcmpkt_generic_loopback_t_start_byte_get, + bcmpkt_generic_loopback_t_svp_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_generic_loopback_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { + bcmpkt_generic_loopback_t_destination_obj_set, + bcmpkt_generic_loopback_t_destination_type_set, + bcmpkt_generic_loopback_t_entropy_obj_set, + bcmpkt_generic_loopback_t_flags_set, + bcmpkt_generic_loopback_t_header_type_set, + bcmpkt_generic_loopback_t_input_priority_set, + bcmpkt_generic_loopback_t_interface_ctrl_set, + bcmpkt_generic_loopback_t_interface_obj_set, + bcmpkt_generic_loopback_t_processing_ctrl_0_set, + bcmpkt_generic_loopback_t_processing_ctrl_1_set, + bcmpkt_generic_loopback_t_qos_obj_set, + bcmpkt_generic_loopback_t_reserved_1_set, + bcmpkt_generic_loopback_t_source_system_port_set, + bcmpkt_generic_loopback_t_start_byte_set, + bcmpkt_generic_loopback_t_svp_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_generic_loopback_t_field_data[] = { + BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_generic_loopback_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_32_2_0_generic_loopback_t_field_data, +}; + + +static int32_t bcmpkt_gpe_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_gpe_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_gpe_t_next_protocol_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_gpe_t_next_protocol_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_gpe_t_reserved0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 16); + + return ret; +} + +static int32_t bcmpkt_gpe_t_reserved0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 16, val); + return ret; +} + +static int32_t bcmpkt_gpe_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 8); + + return ret; +} + +static int32_t bcmpkt_gpe_t_reserved1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_gpe_t_vni_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 8, 24); + + return ret; +} + +static int32_t bcmpkt_gpe_t_vni_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 8, 24, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_gpe_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GPE_T_FID_COUNT] = { + bcmpkt_gpe_t_flags_get, + bcmpkt_gpe_t_next_protocol_get, + bcmpkt_gpe_t_reserved0_get, + bcmpkt_gpe_t_reserved1_get, + bcmpkt_gpe_t_vni_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_gpe_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GPE_T_FID_COUNT] = { + bcmpkt_gpe_t_flags_set, + bcmpkt_gpe_t_next_protocol_set, + bcmpkt_gpe_t_reserved0_set, + bcmpkt_gpe_t_reserved1_set, + bcmpkt_gpe_t_vni_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_gpe_t_field_data[] = { + BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_gpe_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GPE_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_32_2_0_gpe_t_field_data, +}; + + +static int32_t bcmpkt_gre_chksum_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_gre_chksum_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_gre_chksum_t_offset_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_gre_chksum_t_offset_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_gre_chksum_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = { + bcmpkt_gre_chksum_t_checksum_get, + bcmpkt_gre_chksum_t_offset_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_gre_chksum_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = { + bcmpkt_gre_chksum_t_checksum_set, + bcmpkt_gre_chksum_t_offset_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_gre_chksum_t_field_data[] = { + BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_gre_chksum_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_32_2_0_gre_chksum_t_field_data, +}; + + +static int32_t bcmpkt_gre_key_t_key_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gre_key_t_key_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_gre_key_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_KEY_T_FID_COUNT] = { + bcmpkt_gre_key_t_key_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_gre_key_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_KEY_T_FID_COUNT] = { + bcmpkt_gre_key_t_key_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_gre_key_t_field_data[] = { + BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_gre_key_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_KEY_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_32_2_0_gre_key_t_field_data, +}; + + +static int32_t bcmpkt_gre_rout_t_routing_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gre_rout_t_routing_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_gre_rout_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = { + bcmpkt_gre_rout_t_routing_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_gre_rout_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = { + bcmpkt_gre_rout_t_routing_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_gre_rout_t_field_data[] = { + BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_gre_rout_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_ROUT_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_32_2_0_gre_rout_t_field_data, +}; + + +static int32_t bcmpkt_gre_seq_t_sequence_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gre_seq_t_sequence_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_gre_seq_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = { + bcmpkt_gre_seq_t_sequence_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_gre_seq_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = { + bcmpkt_gre_seq_t_sequence_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_gre_seq_t_field_data[] = { + BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_gre_seq_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_SEQ_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_32_2_0_gre_seq_t_field_data, +}; + + +static int32_t bcmpkt_gre_t_c_r_k_s_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_gre_t_c_r_k_s_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_gre_t_protocol_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_gre_t_protocol_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_gre_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 19, 9); + + return ret; +} + +static int32_t bcmpkt_gre_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 19, 9, val); + return ret; +} + +static int32_t bcmpkt_gre_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 3); + + return ret; +} + +static int32_t bcmpkt_gre_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 3, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_gre_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_T_FID_COUNT] = { + bcmpkt_gre_t_c_r_k_s_get, + bcmpkt_gre_t_protocol_get, + bcmpkt_gre_t_reserved_get, + bcmpkt_gre_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_gre_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_T_FID_COUNT] = { + bcmpkt_gre_t_c_r_k_s_set, + bcmpkt_gre_t_protocol_set, + bcmpkt_gre_t_reserved_set, + bcmpkt_gre_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_gre_t_field_data[] = { + BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_gre_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_GRE_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_32_2_0_gre_t_field_data, +}; + + +static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_option_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_option_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_hop_by_hop_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = { + bcmpkt_hop_by_hop_t_hdr_ext_len_get, + bcmpkt_hop_by_hop_t_next_header_get, + bcmpkt_hop_by_hop_t_option_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_hop_by_hop_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = { + bcmpkt_hop_by_hop_t_hdr_ext_len_set, + bcmpkt_hop_by_hop_t_next_header_set, + bcmpkt_hop_by_hop_t_option_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_hop_by_hop_t_field_data[] = { + BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_hop_by_hop_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_32_2_0_hop_by_hop_t_field_data, +}; + + +static int32_t bcmpkt_icmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_icmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_icmp_t_code_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_icmp_t_code_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_icmp_t_icmp_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_icmp_t_icmp_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_icmp_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ICMP_T_FID_COUNT] = { + bcmpkt_icmp_t_checksum_get, + bcmpkt_icmp_t_code_get, + bcmpkt_icmp_t_icmp_type_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_icmp_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ICMP_T_FID_COUNT] = { + bcmpkt_icmp_t_checksum_set, + bcmpkt_icmp_t_code_set, + bcmpkt_icmp_t_icmp_type_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_icmp_t_field_data[] = { + BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_icmp_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ICMP_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_32_2_0_icmp_t_field_data, +}; + + +static int32_t bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_a_t_lns_device_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 24); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_a_t_lns_device_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 24, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_ifa_flex_md_0_a_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_get, + bcmpkt_ifa_flex_md_0_a_t_lns_device_id_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_ifa_flex_md_0_a_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_set, + bcmpkt_ifa_flex_md_0_a_t_lns_device_id_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_ifa_flex_md_0_a_t_field_data[] = { + BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_ifa_flex_md_0_a_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_32_2_0_ifa_flex_md_0_a_t_field_data, +}; + + +static int32_t bcmpkt_ifa_flex_md_0_b_t_cn_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 26, 2); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_cn_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 26, 2, val); + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_port_speed_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_port_speed_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_queue_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 6); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_queue_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 6, val); + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 20); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 20, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_ifa_flex_md_0_b_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_0_b_t_cn_get, + bcmpkt_ifa_flex_md_0_b_t_port_speed_get, + bcmpkt_ifa_flex_md_0_b_t_queue_id_get, + bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_ifa_flex_md_0_b_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_0_b_t_cn_set, + bcmpkt_ifa_flex_md_0_b_t_port_speed_set, + bcmpkt_ifa_flex_md_0_b_t_queue_id_set, + bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_ifa_flex_md_0_b_t_field_data[] = { + BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_ifa_flex_md_0_b_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_32_2_0_ifa_flex_md_0_b_t_field_data, +}; + + +static int32_t bcmpkt_ifa_flex_md_1_t_egress_port_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_1_t_egress_port_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_1_t_ingress_port_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_1_t_ingress_port_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_ifa_flex_md_1_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_1_t_egress_port_id_get, + bcmpkt_ifa_flex_md_1_t_ingress_port_id_get, + bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_ifa_flex_md_1_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_1_t_egress_port_id_set, + bcmpkt_ifa_flex_md_1_t_ingress_port_id_set, + bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_ifa_flex_md_1_t_field_data[] = { + BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_ifa_flex_md_1_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_32_2_0_ifa_flex_md_1_t_field_data, +}; + + +static int32_t bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_ifa_flex_md_2_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_get, + bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_ifa_flex_md_2_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_set, + bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_ifa_flex_md_2_t_field_data[] = { + BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_2_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_ifa_flex_md_2_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_32_2_0_ifa_flex_md_2_t_field_data, +}; + + +static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_ifa_flex_md_3_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_3_t_mmu_stat_0_get, + bcmpkt_ifa_flex_md_3_t_mmu_stat_1_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_ifa_flex_md_3_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_3_t_mmu_stat_0_set, + bcmpkt_ifa_flex_md_3_t_mmu_stat_1_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_ifa_flex_md_3_t_field_data[] = { + BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_3_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_ifa_flex_md_3_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_32_2_0_ifa_flex_md_3_t_field_data, +}; + + +static int32_t bcmpkt_ifa_header_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_header_t_gns_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 4); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_gns_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 4, val); + return ret; +} + +static int32_t bcmpkt_ifa_header_t_max_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_max_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_header_t_next_hdr_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_next_hdr_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_header_t_ver_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_ver_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_ifa_header_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = { + bcmpkt_ifa_header_t_flags_get, + bcmpkt_ifa_header_t_gns_get, + bcmpkt_ifa_header_t_max_length_get, + bcmpkt_ifa_header_t_next_hdr_get, + bcmpkt_ifa_header_t_ver_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_ifa_header_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = { + bcmpkt_ifa_header_t_flags_set, + bcmpkt_ifa_header_t_gns_set, + bcmpkt_ifa_header_t_max_length_set, + bcmpkt_ifa_header_t_next_hdr_set, + bcmpkt_ifa_header_t_ver_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_ifa_header_t_field_data[] = { + BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_ifa_header_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_HEADER_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_32_2_0_ifa_header_t_field_data, +}; + + +static int32_t bcmpkt_ifa_md_base_t_action_vector_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_md_base_t_action_vector_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_md_base_t_hop_limit_current_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ifa_md_base_t_hop_limit_current_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ifa_md_base_t_request_vector_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_md_base_t_request_vector_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_ifa_md_base_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT] = { + bcmpkt_ifa_md_base_t_action_vector_get, + bcmpkt_ifa_md_base_t_hop_limit_current_length_get, + bcmpkt_ifa_md_base_t_request_vector_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_ifa_md_base_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT] = { + bcmpkt_ifa_md_base_t_action_vector_set, + bcmpkt_ifa_md_base_t_hop_limit_current_length_set, + bcmpkt_ifa_md_base_t_request_vector_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_ifa_md_base_t_field_data[] = { + BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_MD_BASE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_ifa_md_base_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_32_2_0_ifa_md_base_t_field_data, +}; + + +static int32_t bcmpkt_ifa_metadata_t_action_vector_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_action_vector_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_hop_limit_current_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_hop_limit_current_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_metadata_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_metadata_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_request_vector_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_request_vector_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_ifa_metadata_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_METADATA_T_FID_COUNT] = { + bcmpkt_ifa_metadata_t_action_vector_get, + bcmpkt_ifa_metadata_t_hop_limit_current_length_get, + bcmpkt_ifa_metadata_t_metadata_get, + bcmpkt_ifa_metadata_t_request_vector_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_ifa_metadata_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_METADATA_T_FID_COUNT] = { + bcmpkt_ifa_metadata_t_action_vector_set, + bcmpkt_ifa_metadata_t_hop_limit_current_length_set, + bcmpkt_ifa_metadata_t_metadata_set, + bcmpkt_ifa_metadata_t_request_vector_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_ifa_metadata_t_field_data[] = { + BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_METADATA_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_ifa_metadata_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IFA_METADATA_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_32_2_0_ifa_metadata_t_field_data, +}; + + +static int32_t bcmpkt_igmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_igmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_igmp_t_group_address_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_igmp_t_group_address_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_igmp_t_igmp_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_igmp_t_igmp_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_igmp_t_max_resp_time_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_igmp_t_max_resp_time_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_igmp_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IGMP_T_FID_COUNT] = { + bcmpkt_igmp_t_checksum_get, + bcmpkt_igmp_t_group_address_get, + bcmpkt_igmp_t_igmp_type_get, + bcmpkt_igmp_t_max_resp_time_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_igmp_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IGMP_T_FID_COUNT] = { + bcmpkt_igmp_t_checksum_set, + bcmpkt_igmp_t_group_address_set, + bcmpkt_igmp_t_igmp_type_set, + bcmpkt_igmp_t_max_resp_time_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_igmp_t_field_data[] = { + BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_igmp_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IGMP_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_32_2_0_igmp_t_field_data, +}; + + +static int32_t bcmpkt_ipfix_t_export_time_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_export_time_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipfix_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipfix_t_obs_domain_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_obs_domain_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ipfix_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_ipfix_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPFIX_T_FID_COUNT] = { + bcmpkt_ipfix_t_export_time_get, + bcmpkt_ipfix_t_length_get, + bcmpkt_ipfix_t_obs_domain_id_get, + bcmpkt_ipfix_t_sequence_num_get, + bcmpkt_ipfix_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_ipfix_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPFIX_T_FID_COUNT] = { + bcmpkt_ipfix_t_export_time_set, + bcmpkt_ipfix_t_length_set, + bcmpkt_ipfix_t_obs_domain_id_set, + bcmpkt_ipfix_t_sequence_num_set, + bcmpkt_ipfix_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_ipfix_t_field_data[] = { + BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_ipfix_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPFIX_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_32_2_0_ipfix_t_field_data, +}; + + +static int32_t bcmpkt_ipv4_t_da_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_da_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_flags_frag_offset_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_flags_frag_offset_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_hdr_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_hdr_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_option_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_option_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_protocol_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_protocol_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_sa_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_sa_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_tos_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_tos_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_total_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_total_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_ttl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_ttl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_version_hdr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_version_hdr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_ipv4_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_FID_COUNT] = { + bcmpkt_ipv4_t_da_get, + bcmpkt_ipv4_t_flags_frag_offset_get, + bcmpkt_ipv4_t_hdr_checksum_get, + bcmpkt_ipv4_t_id_get, + bcmpkt_ipv4_t_option_get, + bcmpkt_ipv4_t_protocol_get, + bcmpkt_ipv4_t_sa_get, + bcmpkt_ipv4_t_tos_get, + bcmpkt_ipv4_t_total_length_get, + bcmpkt_ipv4_t_ttl_get, + bcmpkt_ipv4_t_version_hdr_len_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_ipv4_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_FID_COUNT] = { + bcmpkt_ipv4_t_da_set, + bcmpkt_ipv4_t_flags_frag_offset_set, + bcmpkt_ipv4_t_hdr_checksum_set, + bcmpkt_ipv4_t_id_set, + bcmpkt_ipv4_t_option_set, + bcmpkt_ipv4_t_protocol_set, + bcmpkt_ipv4_t_sa_set, + bcmpkt_ipv4_t_tos_set, + bcmpkt_ipv4_t_total_length_set, + bcmpkt_ipv4_t_ttl_set, + bcmpkt_ipv4_t_version_hdr_len_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_ipv4_t_field_data[] = { + BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_ipv4_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_32_2_0_ipv4_t_field_data, +}; + + +static int32_t bcmpkt_ipv6_t_da_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_da_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_flow_label_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 20); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_flow_label_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 20, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_hop_limit_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 8); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_hop_limit_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 8, 8); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_payload_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_payload_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_sa_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_sa_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_traffic_class_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 8); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_traffic_class_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_ipv6_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_FID_COUNT] = { + bcmpkt_ipv6_t_da_get, + bcmpkt_ipv6_t_flow_label_get, + bcmpkt_ipv6_t_hop_limit_get, + bcmpkt_ipv6_t_next_header_get, + bcmpkt_ipv6_t_payload_length_get, + bcmpkt_ipv6_t_sa_get, + bcmpkt_ipv6_t_traffic_class_get, + bcmpkt_ipv6_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_ipv6_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_FID_COUNT] = { + bcmpkt_ipv6_t_da_set, + bcmpkt_ipv6_t_flow_label_set, + bcmpkt_ipv6_t_hop_limit_set, + bcmpkt_ipv6_t_next_header_set, + bcmpkt_ipv6_t_payload_length_set, + bcmpkt_ipv6_t_sa_set, + bcmpkt_ipv6_t_traffic_class_set, + bcmpkt_ipv6_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_ipv6_t_field_data[] = { + BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_ipv6_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_32_2_0_ipv6_t_field_data, +}; + + +static int32_t bcmpkt_l2_t_macda_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_l2_t_macda_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_l2_t_macsa_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_l2_t_macsa_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_l2_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_L2_T_FID_COUNT] = { + bcmpkt_l2_t_macda_get, + bcmpkt_l2_t_macsa_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_l2_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_L2_T_FID_COUNT] = { + bcmpkt_l2_t_macda_set, + bcmpkt_l2_t_macsa_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_l2_t_field_data[] = { + BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_l2_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_L2_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_32_2_0_l2_t_field_data, +}; + + +static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_mirror_erspan_sn_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { + bcmpkt_mirror_erspan_sn_t_seq_num_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_mirror_erspan_sn_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { + bcmpkt_mirror_erspan_sn_t_seq_num_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_mirror_erspan_sn_t_field_data[] = { + BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_mirror_erspan_sn_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_32_2_0_mirror_erspan_sn_t_field_data, +}; + + +static int32_t bcmpkt_mirror_transport_t_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_mirror_transport_t_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_mirror_transport_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { + bcmpkt_mirror_transport_t_data_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_mirror_transport_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { + bcmpkt_mirror_transport_t_data_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_mirror_transport_t_field_data[] = { + BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_mirror_transport_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_32_2_0_mirror_transport_t_field_data, +}; + + +static int32_t bcmpkt_mpls_ach_t_channel_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_channel_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_cw_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 4); + + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_mpls_ach_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = { + bcmpkt_mpls_ach_t_channel_type_get, + bcmpkt_mpls_ach_t_cw_type_get, + bcmpkt_mpls_ach_t_reserved_get, + bcmpkt_mpls_ach_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_mpls_ach_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = { + bcmpkt_mpls_ach_t_channel_type_set, + bcmpkt_mpls_ach_t_cw_type_set, + bcmpkt_mpls_ach_t_reserved_set, + bcmpkt_mpls_ach_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_mpls_ach_t_field_data[] = { + BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_mpls_ach_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_ACH_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_32_2_0_mpls_ach_t_field_data, +}; + + +static int32_t bcmpkt_mpls_bv_t_value_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_mpls_bv_t_value_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_mpls_bv_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_BV_T_FID_COUNT] = { + bcmpkt_mpls_bv_t_value_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_mpls_bv_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_BV_T_FID_COUNT] = { + bcmpkt_mpls_bv_t_value_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_mpls_bv_t_field_data[] = { + BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_mpls_bv_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_BV_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_32_2_0_mpls_bv_t_field_data, +}; + + +static int32_t bcmpkt_mpls_cw_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_cw_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 12); + + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 12, val); + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_seq_number_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_seq_number_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_mpls_cw_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_CW_T_FID_COUNT] = { + bcmpkt_mpls_cw_t_cw_type_get, + bcmpkt_mpls_cw_t_reserved_get, + bcmpkt_mpls_cw_t_seq_number_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_mpls_cw_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_CW_T_FID_COUNT] = { + bcmpkt_mpls_cw_t_cw_type_set, + bcmpkt_mpls_cw_t_reserved_set, + bcmpkt_mpls_cw_t_seq_number_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_mpls_cw_t_field_data[] = { + BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_mpls_cw_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_CW_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_32_2_0_mpls_cw_t_field_data, +}; + + +static int32_t bcmpkt_mpls_t_bos_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 1); + + return ret; +} + +static int32_t bcmpkt_mpls_t_bos_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 1, val); + return ret; +} + +static int32_t bcmpkt_mpls_t_exp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 9, 3); + + return ret; +} + +static int32_t bcmpkt_mpls_t_exp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 9, 3, val); + return ret; +} + +static int32_t bcmpkt_mpls_t_label_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 20); + + return ret; +} + +static int32_t bcmpkt_mpls_t_label_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 20, val); + return ret; +} + +static int32_t bcmpkt_mpls_t_ttl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_mpls_t_ttl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_mpls_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_T_FID_COUNT] = { + bcmpkt_mpls_t_bos_get, + bcmpkt_mpls_t_exp_get, + bcmpkt_mpls_t_label_get, + bcmpkt_mpls_t_ttl_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_mpls_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_T_FID_COUNT] = { + bcmpkt_mpls_t_bos_set, + bcmpkt_mpls_t_exp_set, + bcmpkt_mpls_t_label_set, + bcmpkt_mpls_t_ttl_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_mpls_t_field_data[] = { + BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_mpls_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_32_2_0_mpls_t_field_data, +}; + + +static int32_t bcmpkt_p_1588_t_cntrl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[8], 24, 8); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_cntrl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[8], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_correction_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_correction_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_domain_nb_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_domain_nb_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_logmsginterval_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[8], 16, 8); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_logmsginterval_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[8], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_msg_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_msg_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_msg_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 4); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_msg_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 4, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 4); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved3_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved3_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_seq_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[7], 0, 16); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_seq_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[7], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_srcportid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_srcportid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_transportspec_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_transportspec_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 4); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_p_1588_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_FID_COUNT] = { + bcmpkt_p_1588_t_cntrl_get, + bcmpkt_p_1588_t_correction_get, + bcmpkt_p_1588_t_domain_nb_get, + bcmpkt_p_1588_t_flags_get, + bcmpkt_p_1588_t_logmsginterval_get, + bcmpkt_p_1588_t_msg_length_get, + bcmpkt_p_1588_t_msg_type_get, + bcmpkt_p_1588_t_reserved1_get, + bcmpkt_p_1588_t_reserved2_get, + bcmpkt_p_1588_t_reserved3_get, + bcmpkt_p_1588_t_seq_id_get, + bcmpkt_p_1588_t_srcportid_get, + bcmpkt_p_1588_t_transportspec_get, + bcmpkt_p_1588_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_p_1588_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_FID_COUNT] = { + bcmpkt_p_1588_t_cntrl_set, + bcmpkt_p_1588_t_correction_set, + bcmpkt_p_1588_t_domain_nb_set, + bcmpkt_p_1588_t_flags_set, + bcmpkt_p_1588_t_logmsginterval_set, + bcmpkt_p_1588_t_msg_length_set, + bcmpkt_p_1588_t_msg_type_set, + bcmpkt_p_1588_t_reserved1_set, + bcmpkt_p_1588_t_reserved2_set, + bcmpkt_p_1588_t_reserved3_set, + bcmpkt_p_1588_t_seq_id_set, + bcmpkt_p_1588_t_srcportid_set, + bcmpkt_p_1588_t_transportspec_set, + bcmpkt_p_1588_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_p_1588_t_field_data[] = { + BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_p_1588_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_32_2_0_p_1588_t_field_data, +}; + + +static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_option_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_option_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_prog_ext_hdr_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = { + bcmpkt_prog_ext_hdr_t_hdr_ext_len_get, + bcmpkt_prog_ext_hdr_t_next_header_get, + bcmpkt_prog_ext_hdr_t_option_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_prog_ext_hdr_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = { + bcmpkt_prog_ext_hdr_t_hdr_ext_len_set, + bcmpkt_prog_ext_hdr_t_next_header_set, + bcmpkt_prog_ext_hdr_t_option_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_prog_ext_hdr_t_field_data[] = { + BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_prog_ext_hdr_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_32_2_0_prog_ext_hdr_t_field_data, +}; + + +static int32_t bcmpkt_psamp_0_t_flowset_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_flowset_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_0_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_0_t_next_hop_index_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_next_hop_index_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_psamp_0_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_0_T_FID_COUNT] = { + bcmpkt_psamp_0_t_flowset_get, + bcmpkt_psamp_0_t_length_get, + bcmpkt_psamp_0_t_next_hop_index_get, + bcmpkt_psamp_0_t_obs_time_ns_get, + bcmpkt_psamp_0_t_obs_time_s_get, + bcmpkt_psamp_0_t_template_id_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_psamp_0_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_0_T_FID_COUNT] = { + bcmpkt_psamp_0_t_flowset_set, + bcmpkt_psamp_0_t_length_set, + bcmpkt_psamp_0_t_next_hop_index_set, + bcmpkt_psamp_0_t_obs_time_ns_set, + bcmpkt_psamp_0_t_obs_time_s_set, + bcmpkt_psamp_0_t_template_id_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_psamp_0_t_field_data[] = { + BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_psamp_0_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_0_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_32_2_0_psamp_0_t_field_data, +}; + + +static int32_t bcmpkt_psamp_1_t_dlb_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 24, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_dlb_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_egress_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_egress_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_epoch_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_epoch_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_variable_flag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_variable_flag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_psamp_1_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T_FID_COUNT] = { + bcmpkt_psamp_1_t_dlb_id_get, + bcmpkt_psamp_1_t_egress_port_get, + bcmpkt_psamp_1_t_epoch_get, + bcmpkt_psamp_1_t_ingress_port_get, + bcmpkt_psamp_1_t_sampled_length_get, + bcmpkt_psamp_1_t_user_meta_data_get, + bcmpkt_psamp_1_t_variable_flag_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_psamp_1_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T_FID_COUNT] = { + bcmpkt_psamp_1_t_dlb_id_set, + bcmpkt_psamp_1_t_egress_port_set, + bcmpkt_psamp_1_t_epoch_set, + bcmpkt_psamp_1_t_ingress_port_set, + bcmpkt_psamp_1_t_sampled_length_set, + bcmpkt_psamp_1_t_user_meta_data_set, + bcmpkt_psamp_1_t_variable_flag_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_psamp_1_t_field_data[] = { + BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_psamp_1_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_32_2_0_psamp_1_t_field_data, +}; + + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[4], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[4], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[4], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[4], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_psamp_mirror_on_drop_0_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get, + bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get, + bcmpkt_psamp_mirror_on_drop_0_t_length_get, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get, + bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get, + bcmpkt_psamp_mirror_on_drop_0_t_template_id_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_psamp_mirror_on_drop_0_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set, + bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set, + bcmpkt_psamp_mirror_on_drop_0_t_length_set, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set, + bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set, + bcmpkt_psamp_mirror_on_drop_0_t_template_id_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_psamp_mirror_on_drop_0_t_field_data[] = { + BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_psamp_mirror_on_drop_0_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_32_2_0_psamp_mirror_on_drop_0_t_field_data, +}; + + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 6); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 6, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_smod_state_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 22, 2); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_smod_state_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 22, 2, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_psamp_mirror_on_drop_3_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get, + bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get, + bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get, + bcmpkt_psamp_mirror_on_drop_3_t_smod_state_get, + bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get, + bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get, + bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_psamp_mirror_on_drop_3_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set, + bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set, + bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set, + bcmpkt_psamp_mirror_on_drop_3_t_smod_state_set, + bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set, + bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set, + bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_psamp_mirror_on_drop_3_t_field_data[] = { + BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_psamp_mirror_on_drop_3_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_32_2_0_psamp_mirror_on_drop_3_t_field_data, +}; + + +static int32_t bcmpkt_rarp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_rarp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_rarp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_operation_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_rarp_t_operation_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_rarp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_rarp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_rarp_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_FID_COUNT] = { + bcmpkt_rarp_t_hardware_len_get, + bcmpkt_rarp_t_hardware_type_get, + bcmpkt_rarp_t_operation_get, + bcmpkt_rarp_t_prot_addr_len_get, + bcmpkt_rarp_t_protocol_type_get, + bcmpkt_rarp_t_sender_ha_get, + bcmpkt_rarp_t_sender_ip_get, + bcmpkt_rarp_t_target_ha_get, + bcmpkt_rarp_t_target_ip_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_rarp_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_FID_COUNT] = { + bcmpkt_rarp_t_hardware_len_set, + bcmpkt_rarp_t_hardware_type_set, + bcmpkt_rarp_t_operation_set, + bcmpkt_rarp_t_prot_addr_len_set, + bcmpkt_rarp_t_protocol_type_set, + bcmpkt_rarp_t_sender_ha_set, + bcmpkt_rarp_t_sender_ip_set, + bcmpkt_rarp_t_target_ha_set, + bcmpkt_rarp_t_target_ip_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_rarp_t_field_data[] = { + BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_rarp_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_32_2_0_rarp_t_field_data, +}; + + +static int32_t bcmpkt_routing_t_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_routing_t_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_routing_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_routing_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_routing_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_routing_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_routing_t_routing_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_routing_t_routing_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_routing_t_segments_left_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_routing_t_segments_left_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_routing_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ROUTING_T_FID_COUNT] = { + bcmpkt_routing_t_data_get, + bcmpkt_routing_t_hdr_ext_len_get, + bcmpkt_routing_t_next_header_get, + bcmpkt_routing_t_routing_type_get, + bcmpkt_routing_t_segments_left_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_routing_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ROUTING_T_FID_COUNT] = { + bcmpkt_routing_t_data_set, + bcmpkt_routing_t_hdr_ext_len_set, + bcmpkt_routing_t_next_header_set, + bcmpkt_routing_t_routing_type_set, + bcmpkt_routing_t_segments_left_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_routing_t_field_data[] = { + BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_routing_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_ROUTING_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_32_2_0_routing_t_field_data, +}; + + +static int32_t bcmpkt_rspan_t_tag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_rspan_t_tag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_rspan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_rspan_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_rspan_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RSPAN_T_FID_COUNT] = { + bcmpkt_rspan_t_tag_get, + bcmpkt_rspan_t_tpid_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_rspan_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RSPAN_T_FID_COUNT] = { + bcmpkt_rspan_t_tag_set, + bcmpkt_rspan_t_tpid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_rspan_t_field_data[] = { + BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_rspan_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_RSPAN_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_32_2_0_rspan_t_field_data, +}; + + +static int32_t bcmpkt_sflow_shim_0_t_sys_destination_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_sys_destination_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_sys_source_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_sys_source_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_sflow_shim_0_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { + bcmpkt_sflow_shim_0_t_sys_destination_get, + bcmpkt_sflow_shim_0_t_sys_source_get, + bcmpkt_sflow_shim_0_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_sflow_shim_0_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { + bcmpkt_sflow_shim_0_t_sys_destination_set, + bcmpkt_sflow_shim_0_t_sys_source_set, + bcmpkt_sflow_shim_0_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_sflow_shim_0_t_field_data[] = { + BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_sflow_shim_0_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_32_2_0_sflow_shim_0_t_field_data, +}; + + +static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 30, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 30, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 27, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 27, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 29, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 29, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 31, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 31, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 26, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 26, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 7); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 7, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 23, 3); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 23, 3, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_sflow_shim_1_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { + bcmpkt_sflow_shim_1_t_flag_dest_sample_get, + bcmpkt_sflow_shim_1_t_flag_discarded_get, + bcmpkt_sflow_shim_1_t_flag_flex_sample_get, + bcmpkt_sflow_shim_1_t_flag_mcast_get, + bcmpkt_sflow_shim_1_t_flag_src_sample_get, + bcmpkt_sflow_shim_1_t_flag_truncated_get, + bcmpkt_sflow_shim_1_t_reserved_get, + bcmpkt_sflow_shim_1_t_sys_opcode_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_sflow_shim_1_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { + bcmpkt_sflow_shim_1_t_flag_dest_sample_set, + bcmpkt_sflow_shim_1_t_flag_discarded_set, + bcmpkt_sflow_shim_1_t_flag_flex_sample_set, + bcmpkt_sflow_shim_1_t_flag_mcast_set, + bcmpkt_sflow_shim_1_t_flag_src_sample_set, + bcmpkt_sflow_shim_1_t_flag_truncated_set, + bcmpkt_sflow_shim_1_t_reserved_set, + bcmpkt_sflow_shim_1_t_sys_opcode_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_sflow_shim_1_t_field_data[] = { + BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_sflow_shim_1_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_32_2_0_sflow_shim_1_t_field_data, +}; + + +static int32_t bcmpkt_sflow_shim_2_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_sflow_shim_2_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_sflow_shim_2_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { + bcmpkt_sflow_shim_2_t_sequence_num_get, + bcmpkt_sflow_shim_2_t_user_meta_data_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_sflow_shim_2_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { + bcmpkt_sflow_shim_2_t_sequence_num_set, + bcmpkt_sflow_shim_2_t_user_meta_data_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_sflow_shim_2_t_field_data[] = { + BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_sflow_shim_2_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_32_2_0_sflow_shim_2_t_field_data, +}; + + +static int32_t bcmpkt_snap_llc_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_snap_llc_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_snap_llc_t_snap_llc_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_snap_llc_t_snap_llc_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_snap_llc_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = { + bcmpkt_snap_llc_t_length_get, + bcmpkt_snap_llc_t_snap_llc_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_snap_llc_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = { + bcmpkt_snap_llc_t_length_set, + bcmpkt_snap_llc_t_snap_llc_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_snap_llc_t_field_data[] = { + BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_snap_llc_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SNAP_LLC_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_32_2_0_snap_llc_t_field_data, +}; + + +static int32_t bcmpkt_svtag_t_data_lwr_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_svtag_t_data_lwr_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_svtag_t_data_upr_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_svtag_t_data_upr_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_svtag_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SVTAG_T_FID_COUNT] = { + bcmpkt_svtag_t_data_lwr_get, + bcmpkt_svtag_t_data_upr_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_svtag_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SVTAG_T_FID_COUNT] = { + bcmpkt_svtag_t_data_lwr_set, + bcmpkt_svtag_t_data_upr_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_svtag_t_field_data[] = { + BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SVTAG_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_svtag_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_SVTAG_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_32_2_0_svtag_t_field_data, +}; + + +static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_first_4bytes_t_src_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_first_4bytes_t_src_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_tcp_first_4bytes_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { + bcmpkt_tcp_first_4bytes_t_dst_port_get, + bcmpkt_tcp_first_4bytes_t_src_port_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_tcp_first_4bytes_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { + bcmpkt_tcp_first_4bytes_t_dst_port_set, + bcmpkt_tcp_first_4bytes_t_src_port_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_tcp_first_4bytes_t_field_data[] = { + BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_tcp_first_4bytes_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_32_2_0_tcp_first_4bytes_t_field_data, +}; + + +static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_win_size_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_win_size_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_tcp_last_16bytes_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { + bcmpkt_tcp_last_16bytes_t_ack_num_get, + bcmpkt_tcp_last_16bytes_t_checksum_get, + bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get, + bcmpkt_tcp_last_16bytes_t_seq_num_get, + bcmpkt_tcp_last_16bytes_t_urgent_ptr_get, + bcmpkt_tcp_last_16bytes_t_win_size_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_tcp_last_16bytes_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { + bcmpkt_tcp_last_16bytes_t_ack_num_set, + bcmpkt_tcp_last_16bytes_t_checksum_set, + bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set, + bcmpkt_tcp_last_16bytes_t_seq_num_set, + bcmpkt_tcp_last_16bytes_t_urgent_ptr_set, + bcmpkt_tcp_last_16bytes_t_win_size_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_tcp_last_16bytes_t_field_data[] = { + BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_tcp_last_16bytes_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_32_2_0_tcp_last_16bytes_t_field_data, +}; + + +static int32_t bcmpkt_udp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_udp_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_dst_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_udp_t_src_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_src_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_udp_t_udp_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_udp_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_udp_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UDP_T_FID_COUNT] = { + bcmpkt_udp_t_checksum_get, + bcmpkt_udp_t_dst_port_get, + bcmpkt_udp_t_src_port_get, + bcmpkt_udp_t_udp_length_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_udp_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UDP_T_FID_COUNT] = { + bcmpkt_udp_t_checksum_set, + bcmpkt_udp_t_dst_port_set, + bcmpkt_udp_t_src_port_set, + bcmpkt_udp_t_udp_length_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_udp_t_field_data[] = { + BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_udp_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UDP_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_32_2_0_udp_t_field_data, +}; + + +static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_unknown_l3_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { + bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get, + bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_unknown_l3_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { + bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set, + bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_unknown_l3_t_field_data[] = { + BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_unknown_l3_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_32_2_0_unknown_l3_t_field_data, +}; + + +static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_unknown_l4_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { + bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_unknown_l4_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { + bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_unknown_l4_t_field_data[] = { + BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_unknown_l4_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_32_2_0_unknown_l4_t_field_data, +}; + + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_unknown_l5_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { + bcmpkt_unknown_l5_t_l5_bytes_0_1_get, + bcmpkt_unknown_l5_t_l5_bytes_2_3_get, + bcmpkt_unknown_l5_t_l5_bytes_4_7_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_unknown_l5_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { + bcmpkt_unknown_l5_t_l5_bytes_0_1_set, + bcmpkt_unknown_l5_t_l5_bytes_2_3_set, + bcmpkt_unknown_l5_t_l5_bytes_4_7_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_unknown_l5_t_field_data[] = { + BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_unknown_l5_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_32_2_0_unknown_l5_t_field_data, +}; + + +static int32_t bcmpkt_vlan_t_cfi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 1); + + return ret; +} + +static int32_t bcmpkt_vlan_t_cfi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 1, val); + return ret; +} + +static int32_t bcmpkt_vlan_t_pcp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 13, 3); + + return ret; +} + +static int32_t bcmpkt_vlan_t_pcp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 13, 3, val); + return ret; +} + +static int32_t bcmpkt_vlan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_vlan_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_vlan_t_vid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 12); + + return ret; +} + +static int32_t bcmpkt_vlan_t_vid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 12, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_vlan_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VLAN_T_FID_COUNT] = { + bcmpkt_vlan_t_cfi_get, + bcmpkt_vlan_t_pcp_get, + bcmpkt_vlan_t_tpid_get, + bcmpkt_vlan_t_vid_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_vlan_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VLAN_T_FID_COUNT] = { + bcmpkt_vlan_t_cfi_set, + bcmpkt_vlan_t_pcp_set, + bcmpkt_vlan_t_tpid_set, + bcmpkt_vlan_t_vid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_vlan_t_field_data[] = { + BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_vlan_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VLAN_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_32_2_0_vlan_t_field_data, +}; + + +static int32_t bcmpkt_vntag_t_tag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_vntag_t_tag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_vntag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_vntag_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_vntag_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VNTAG_T_FID_COUNT] = { + bcmpkt_vntag_t_tag_get, + bcmpkt_vntag_t_tpid_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_vntag_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VNTAG_T_FID_COUNT] = { + bcmpkt_vntag_t_tag_set, + bcmpkt_vntag_t_tpid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_vntag_t_field_data[] = { + BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_vntag_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VNTAG_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_32_2_0_vntag_t_field_data, +}; + + +static int32_t bcmpkt_vxlan_t_flags_reserved_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_vxlan_t_flags_reserved_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_vxlan_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 8); + + return ret; +} + +static int32_t bcmpkt_vxlan_t_reserved2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_vxlan_t_vn_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 8, 24); + + return ret; +} + +static int32_t bcmpkt_vxlan_t_vn_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 8, 24, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_vxlan_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VXLAN_T_FID_COUNT] = { + bcmpkt_vxlan_t_flags_reserved_1_get, + bcmpkt_vxlan_t_reserved2_get, + bcmpkt_vxlan_t_vn_id_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_vxlan_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VXLAN_T_FID_COUNT] = { + bcmpkt_vxlan_t_flags_reserved_1_set, + bcmpkt_vxlan_t_reserved2_set, + bcmpkt_vxlan_t_vn_id_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_vxlan_t_field_data[] = { + BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_vxlan_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_VXLAN_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_32_2_0_vxlan_t_field_data, +}; + + +static int32_t bcmpkt_wesp_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_wesp_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_wesp_t_header_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_wesp_t_header_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_wesp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_wesp_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_wesp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_spi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_spi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_trailer_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_wesp_t_trailer_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_wesp_t_wesp_iv_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_wesp_iv_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_32_2_0_wesp_t_fget[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T_FID_COUNT] = { + bcmpkt_wesp_t_flags_get, + bcmpkt_wesp_t_header_len_get, + bcmpkt_wesp_t_next_header_get, + bcmpkt_wesp_t_seq_num_get, + bcmpkt_wesp_t_spi_get, + bcmpkt_wesp_t_trailer_len_get, + bcmpkt_wesp_t_wesp_iv_get, +}; + +bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_32_2_0_wesp_t_fset[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T_FID_COUNT] = { + bcmpkt_wesp_t_flags_set, + bcmpkt_wesp_t_header_len_set, + bcmpkt_wesp_t_next_header_set, + bcmpkt_wesp_t_seq_num_set, + bcmpkt_wesp_t_spi_set, + bcmpkt_wesp_t_trailer_len_set, + bcmpkt_wesp_t_wesp_iv_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_32_2_0_wesp_t_field_data[] = { + BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_32_2_0_wesp_t_field_info = { + .num_fields = BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T_FID_COUNT, + .info = bcm56780_a0_hna_6_5_32_2_0_wesp_t_field_data, +}; + +static bcmpkt_flex_pmd_info_t bcm56780_a0_hna_6_5_32_2_0_flexhdr_info_list[BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_FLEXHDR_COUNT] = { + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_32_2_0_arp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_32_2_0_arp_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_32_2_0_arp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_32_2_0_authen_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_32_2_0_authen_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_32_2_0_authen_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_32_2_0_bfd_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_32_2_0_bfd_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_32_2_0_bfd_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_32_2_0_cntag_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_32_2_0_cntag_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_32_2_0_cntag_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_32_2_0_cpu_composites_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_32_2_0_cpu_composites_0_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_32_2_0_cpu_composites_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_32_2_0_cpu_composites_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_32_2_0_cpu_composites_1_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_32_2_0_cpu_composites_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_32_2_0_dest_option_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_32_2_0_dest_option_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_32_2_0_dest_option_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_32_2_0_ep_nih_header_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_32_2_0_ep_nih_header_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_32_2_0_ep_nih_header_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_32_2_0_erspan3_fixed_hdr_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_32_2_0_erspan3_fixed_hdr_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_32_2_0_erspan3_fixed_hdr_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_32_2_0_erspan3_subhdr_5_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_32_2_0_erspan3_subhdr_5_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_32_2_0_erspan3_subhdr_5_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_32_2_0_esp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_32_2_0_esp_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_32_2_0_esp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_32_2_0_etag_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_32_2_0_etag_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_32_2_0_etag_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_32_2_0_ethertype_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_32_2_0_ethertype_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_32_2_0_ethertype_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_32_2_0_frag_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_32_2_0_frag_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_32_2_0_frag_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_32_2_0_generic_loopback_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_32_2_0_generic_loopback_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_32_2_0_generic_loopback_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_32_2_0_gpe_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_32_2_0_gpe_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_32_2_0_gpe_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_32_2_0_gre_chksum_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_32_2_0_gre_chksum_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_32_2_0_gre_chksum_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_32_2_0_gre_key_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_32_2_0_gre_key_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_32_2_0_gre_key_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_32_2_0_gre_rout_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_32_2_0_gre_rout_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_32_2_0_gre_rout_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_32_2_0_gre_seq_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_32_2_0_gre_seq_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_32_2_0_gre_seq_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_32_2_0_gre_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_32_2_0_gre_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_32_2_0_gre_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_32_2_0_hop_by_hop_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_32_2_0_hop_by_hop_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_32_2_0_hop_by_hop_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_32_2_0_icmp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_32_2_0_icmp_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_32_2_0_icmp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_32_2_0_ifa_flex_md_0_a_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_32_2_0_ifa_flex_md_0_a_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_32_2_0_ifa_flex_md_0_a_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_32_2_0_ifa_flex_md_0_b_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_32_2_0_ifa_flex_md_0_b_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_32_2_0_ifa_flex_md_0_b_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_32_2_0_ifa_flex_md_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_32_2_0_ifa_flex_md_1_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_32_2_0_ifa_flex_md_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_32_2_0_ifa_flex_md_2_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_32_2_0_ifa_flex_md_2_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_32_2_0_ifa_flex_md_2_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_32_2_0_ifa_flex_md_3_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_32_2_0_ifa_flex_md_3_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_32_2_0_ifa_flex_md_3_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_32_2_0_ifa_header_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_32_2_0_ifa_header_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_32_2_0_ifa_header_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_32_2_0_ifa_md_base_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_32_2_0_ifa_md_base_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_32_2_0_ifa_md_base_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_32_2_0_ifa_metadata_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_32_2_0_ifa_metadata_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_32_2_0_ifa_metadata_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_32_2_0_igmp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_32_2_0_igmp_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_32_2_0_igmp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_32_2_0_ipfix_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_32_2_0_ipfix_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_32_2_0_ipfix_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_32_2_0_ipv4_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_32_2_0_ipv4_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_32_2_0_ipv4_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_32_2_0_ipv6_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_32_2_0_ipv6_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_32_2_0_ipv6_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_32_2_0_l2_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_32_2_0_l2_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_32_2_0_l2_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_32_2_0_mirror_erspan_sn_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_32_2_0_mirror_erspan_sn_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_32_2_0_mirror_erspan_sn_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_32_2_0_mirror_transport_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_32_2_0_mirror_transport_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_32_2_0_mirror_transport_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_32_2_0_mpls_ach_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_32_2_0_mpls_ach_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_32_2_0_mpls_ach_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_32_2_0_mpls_bv_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_32_2_0_mpls_bv_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_32_2_0_mpls_bv_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_32_2_0_mpls_cw_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_32_2_0_mpls_cw_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_32_2_0_mpls_cw_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_32_2_0_mpls_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_32_2_0_mpls_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_32_2_0_mpls_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_32_2_0_p_1588_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_32_2_0_p_1588_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_32_2_0_p_1588_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_32_2_0_prog_ext_hdr_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_32_2_0_prog_ext_hdr_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_32_2_0_prog_ext_hdr_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_32_2_0_psamp_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_32_2_0_psamp_0_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_32_2_0_psamp_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_32_2_0_psamp_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_32_2_0_psamp_1_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_32_2_0_psamp_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_32_2_0_psamp_mirror_on_drop_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_32_2_0_psamp_mirror_on_drop_0_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_32_2_0_psamp_mirror_on_drop_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_32_2_0_psamp_mirror_on_drop_3_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_32_2_0_psamp_mirror_on_drop_3_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_32_2_0_psamp_mirror_on_drop_3_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_32_2_0_rarp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_32_2_0_rarp_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_32_2_0_rarp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_32_2_0_routing_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_32_2_0_routing_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_32_2_0_routing_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_32_2_0_rspan_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_32_2_0_rspan_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_32_2_0_rspan_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_32_2_0_sflow_shim_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_32_2_0_sflow_shim_0_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_32_2_0_sflow_shim_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_32_2_0_sflow_shim_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_32_2_0_sflow_shim_1_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_32_2_0_sflow_shim_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_32_2_0_sflow_shim_2_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_32_2_0_sflow_shim_2_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_32_2_0_sflow_shim_2_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_32_2_0_snap_llc_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_32_2_0_snap_llc_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_32_2_0_snap_llc_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_32_2_0_svtag_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_32_2_0_svtag_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_32_2_0_svtag_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_32_2_0_tcp_first_4bytes_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_32_2_0_tcp_first_4bytes_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_32_2_0_tcp_first_4bytes_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_32_2_0_tcp_last_16bytes_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_32_2_0_tcp_last_16bytes_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_32_2_0_tcp_last_16bytes_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_32_2_0_udp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_32_2_0_udp_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_32_2_0_udp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_32_2_0_unknown_l3_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_32_2_0_unknown_l3_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_32_2_0_unknown_l3_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_32_2_0_unknown_l4_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_32_2_0_unknown_l4_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_32_2_0_unknown_l4_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_32_2_0_unknown_l5_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_32_2_0_unknown_l5_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_32_2_0_unknown_l5_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_32_2_0_vlan_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_32_2_0_vlan_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_32_2_0_vlan_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_32_2_0_vntag_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_32_2_0_vntag_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_32_2_0_vntag_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_32_2_0_vxlan_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_32_2_0_vxlan_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_32_2_0_vxlan_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_32_2_0_wesp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56780_a0_hna_6_5_32_2_0_wesp_t_fget, + .flex_fset = bcm56780_a0_hna_6_5_32_2_0_wesp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56780_a0_hna_6_5_32_2_0_rxpmd_flex_field_info, + .reasons_info = &bcm56780_a0_hna_6_5_32_2_0_rxpmd_flex_reasons_info, + .flex_common_fget = bcm56780_a0_rxpmd_flex_fget, + .flex_common_fset = bcm56780_a0_rxpmd_flex_fset, + }, +}; + +static shr_enum_map_t bcm56780_a0_hna_6_5_32_2_0_flexhdr_id_map[] = { + BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_FLEXHDR_NAME_MAP_INIT +}; + +shr_enum_map_t * bcm56780_a0_hna_6_5_32_2_0_flexhdr_map_get(void) +{ + return bcm56780_a0_hna_6_5_32_2_0_flexhdr_id_map; +} + +bcmpkt_flex_pmd_info_t * bcm56780_a0_hna_6_5_32_2_0_flex_pmd_info_get(uint32_t hid) +{ + if (hid >= BCM56780_A0_HNA_6_5_32_2_0_BCMPKT_FLEXHDR_COUNT) { + return NULL; + } + + return &bcm56780_a0_hna_6_5_32_2_0_flexhdr_info_list[hid]; +} + +int bcm56780_a0_hna_6_5_32_2_0_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = { + 14, + -1, + -1, + 66, +}; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/xfcr/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_bcmpkt_rxpmd_match_id.c similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_bcmpkt_rxpmd_match_id.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/xfcr/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_bcmpkt_rxpmd_match_id.c index cd65baa6967..0c419122f5a 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_bcmpkt_rxpmd_match_id.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/xfcr/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_bcmpkt_rxpmd_match_id.c @@ -6,8 +6,8 @@ * for device bcm56880_a0 and variant dna_6_5_31_6_0. * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -21,6 +21,7 @@ * * A copy of the GNU General Public License version 2 (GPLv2) can * be found in the LICENSES folder. + * All Rights Reserved.$ * * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser * diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_pkt_flexhdr.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/xfcr/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_pkt_flexhdr.c similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_pkt_flexhdr.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/xfcr/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_pkt_flexhdr.c index 3ac89336ea2..c74f3da18a7 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_pkt_flexhdr.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/xfcr/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_pkt_flexhdr.c @@ -6,8 +6,8 @@ * for device bcm56880_a0 and variant dna_6_5_31_6_0. * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -21,6 +21,7 @@ * * A copy of the GNU General Public License version 2 (GPLv2) can * be found in the LICENSES folder. + * All Rights Reserved.$ * * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser * diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/xfcr/bcm56880_a0/hna_6_5_32_2_0/bcm56880_a0_hna_6_5_32_2_0_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/xfcr/bcm56880_a0/hna_6_5_32_2_0/bcm56880_a0_hna_6_5_32_2_0_bcmpkt_rxpmd_match_id.c new file mode 100644 index 00000000000..1247b4101d0 --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/xfcr/bcm56880_a0/hna_6_5_32_2_0/bcm56880_a0_hna_6_5_32_2_0_bcmpkt_rxpmd_match_id.c @@ -0,0 +1,2410 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) bcm56880_a0_hna_6_5_32_2_0_sf_match_id_info.yml + * for device bcm56880_a0 and variant hna_6_5_32_2_0. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + + +#include +#include + + +static bcmpkt_rxpmd_match_id_db_t +bcm56880_a0_hna_6_5_32_2_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_COUNT] = { + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_ETAG", + .match = 0x20, + .match_mask = 0x30, + .match_maxbit = 26, + .match_minbit = 21, + .maxbit = 5, + .minbit = 4, + .value = 0x2, + .pmaxbit = 40, + .pminbit = 35, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_ITAG", + .match = 0x8, + .match_mask = 0x8, + .match_maxbit = 26, + .match_minbit = 21, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 40, + .pminbit = 35, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */ + .name = "EGRESS_PKT_FWD_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 26, + .match_minbit = 21, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 40, + .pminbit = 35, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */ + .name = "EGRESS_PKT_FWD_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0x3f, + .match_maxbit = 26, + .match_minbit = 21, + .maxbit = 5, + .minbit = 0, + .value = 0x0, + .pmaxbit = 40, + .pminbit = 35, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_OTAG", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 26, + .match_minbit = 21, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 40, + .pminbit = 35, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC */ + .name = "EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 26, + .match_minbit = 21, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 40, + .pminbit = 35, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_VNTAG", + .match = 0x10, + .match_mask = 0x30, + .match_maxbit = 26, + .match_minbit = 21, + .maxbit = 5, + .minbit = 4, + .value = 0x1, + .pmaxbit = 40, + .pminbit = 35, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ARP", + .match = 0x1800, + .match_mask = 0x3830, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", + .match = 0x80, + .match_mask = 0x1c2, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", + .match = 0x408, + .match_mask = 0x64c, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_BFD", + .match = 0x3800, + .match_mask = 0x3800, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 13, + .minbit = 11, + .value = 0x7, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", + .match = 0x200, + .match_mask = 0x642, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", + .match = 0x100, + .match_mask = 0x1c0, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 8, + .minbit = 7, + .value = 0x2, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", + .match = 0x600, + .match_mask = 0x640, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 10, + .minbit = 9, + .value = 0x3, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GPE", + .match = 0x1830, + .match_mask = 0x3870, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE", + .match = 0x2, + .match_mask = 0x42, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", + .match = 0x202, + .match_mask = 0x642, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", + .match = 0x1000, + .match_mask = 0x3800, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 13, + .minbit = 11, + .value = 0x2, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", + .match = 0x82, + .match_mask = 0x1c2, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", + .match = 0x12, + .match_mask = 0x72, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 5, + .minbit = 4, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ICMP", + .match = 0x2000, + .match_mask = 0x3830, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA", + .match = 0x180, + .match_mask = 0x1c0, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 8, + .minbit = 7, + .value = 0x3, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IGMP", + .match = 0x404, + .match_mask = 0x64c, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV4", + .match = 0x4, + .match_mask = 0x4c, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 3, + .minbit = 2, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV6", + .match = 0x8, + .match_mask = 0x4c, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 3, + .minbit = 2, + .value = 0x2, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", + .match = 0x40, + .match_mask = 0x40, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 6, + .minbit = 6, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", + .match = 0x42, + .match_mask = 0x42, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", + .match = 0x44, + .match_mask = 0x44, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", + .match = 0x48, + .match_mask = 0x48, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", + .match = 0x50, + .match_mask = 0x50, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", + .match = 0x60, + .match_mask = 0x60, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", + .match = 0xc0, + .match_mask = 0xc0, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 7, + .minbit = 7, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", + .match = 0x140, + .match_mask = 0x140, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 8, + .minbit = 8, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", + .match = 0x240, + .match_mask = 0x240, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 9, + .minbit = 9, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x3fff, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 13, + .minbit = 0, + .value = 0x0, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_P_1588", + .match = 0x3000, + .match_mask = 0x3800, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 13, + .minbit = 11, + .value = 0x6, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_RARP", + .match = 0x800, + .match_mask = 0x3830, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x20, + .match_mask = 0x70, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 5, + .minbit = 4, + .value = 0x2, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x820, + .match_mask = 0x3870, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UDP", + .match = 0x30, + .match_mask = 0x70, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 5, + .minbit = 4, + .value = 0x3, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", + .match = 0x10, + .match_mask = 0x72, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 5, + .minbit = 4, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", + .match = 0x2800, + .match_mask = 0x3800, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 13, + .minbit = 11, + .value = 0x5, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", + .match = 0x2030, + .match_mask = 0x3870, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", + .match = 0x830, + .match_mask = 0x3870, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */ + .name = "EGRESS_PKT_SYS_HDR_LOOPBACK", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 0, + .match_minbit = 0, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 0, + .pminbit = 0, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */ + .name = "EGRESS_PKT_SYS_HDR_NONE", + .match = 0x0, + .match_mask = 0x1, + .match_maxbit = 0, + .match_minbit = 0, + .maxbit = 0, + .minbit = 0, + .value = 0x0, + .pmaxbit = 0, + .pminbit = 0, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_ETAG", + .match = 0x20, + .match_mask = 0x30, + .match_maxbit = 6, + .match_minbit = 1, + .maxbit = 5, + .minbit = 4, + .value = 0x2, + .pmaxbit = 12, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_ITAG", + .match = 0x8, + .match_mask = 0x8, + .match_maxbit = 6, + .match_minbit = 1, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 12, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 6, + .match_minbit = 1, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 12, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0x3f, + .match_maxbit = 6, + .match_minbit = 1, + .maxbit = 5, + .minbit = 0, + .value = 0x0, + .pmaxbit = 12, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_OTAG", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 6, + .match_minbit = 1, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 12, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 6, + .match_minbit = 1, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 12, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_VNTAG", + .match = 0x10, + .match_mask = 0x30, + .match_maxbit = 6, + .match_minbit = 1, + .maxbit = 5, + .minbit = 4, + .value = 0x1, + .pmaxbit = 12, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", + .match = 0x1800, + .match_mask = 0x3830, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", + .match = 0x80, + .match_mask = 0x1c2, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", + .match = 0x408, + .match_mask = 0x64c, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", + .match = 0x3800, + .match_mask = 0x3800, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 13, + .minbit = 11, + .value = 0x7, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", + .match = 0x200, + .match_mask = 0x642, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", + .match = 0x100, + .match_mask = 0x1c0, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 8, + .minbit = 7, + .value = 0x2, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", + .match = 0x600, + .match_mask = 0x640, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 10, + .minbit = 9, + .value = 0x3, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", + .match = 0x1830, + .match_mask = 0x3870, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", + .match = 0x2, + .match_mask = 0x42, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", + .match = 0x202, + .match_mask = 0x642, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", + .match = 0x1000, + .match_mask = 0x3800, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 13, + .minbit = 11, + .value = 0x2, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", + .match = 0x82, + .match_mask = 0x1c2, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", + .match = 0x12, + .match_mask = 0x72, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 5, + .minbit = 4, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", + .match = 0x2000, + .match_mask = 0x3830, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA", + .match = 0x180, + .match_mask = 0x1c0, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 8, + .minbit = 7, + .value = 0x3, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", + .match = 0x404, + .match_mask = 0x64c, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", + .match = 0x4, + .match_mask = 0x4c, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 3, + .minbit = 2, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", + .match = 0x8, + .match_mask = 0x4c, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 3, + .minbit = 2, + .value = 0x2, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", + .match = 0x40, + .match_mask = 0x40, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 6, + .minbit = 6, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", + .match = 0x42, + .match_mask = 0x42, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", + .match = 0x44, + .match_mask = 0x44, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", + .match = 0x48, + .match_mask = 0x48, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", + .match = 0x50, + .match_mask = 0x50, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", + .match = 0x60, + .match_mask = 0x60, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", + .match = 0xc0, + .match_mask = 0xc0, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 7, + .minbit = 7, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", + .match = 0x140, + .match_mask = 0x140, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 8, + .minbit = 8, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", + .match = 0x240, + .match_mask = 0x240, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 9, + .minbit = 9, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x3fff, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 13, + .minbit = 0, + .value = 0x0, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", + .match = 0x3000, + .match_mask = 0x3800, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 13, + .minbit = 11, + .value = 0x6, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", + .match = 0x800, + .match_mask = 0x3830, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x20, + .match_mask = 0x70, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 5, + .minbit = 4, + .value = 0x2, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x820, + .match_mask = 0x3870, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", + .match = 0x30, + .match_mask = 0x70, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 5, + .minbit = 4, + .value = 0x3, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", + .match = 0x10, + .match_mask = 0x72, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 5, + .minbit = 4, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", + .match = 0x2800, + .match_mask = 0x3800, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 13, + .minbit = 11, + .value = 0x5, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", + .match = 0x2030, + .match_mask = 0x3870, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", + .match = 0x830, + .match_mask = 0x3870, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_ETAG", + .match = 0x20, + .match_mask = 0x30, + .match_maxbit = 26, + .match_minbit = 21, + .maxbit = 5, + .minbit = 4, + .value = 0x2, + .pmaxbit = 26, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_ITAG", + .match = 0x8, + .match_mask = 0x8, + .match_maxbit = 26, + .match_minbit = 21, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 26, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */ + .name = "INGRESS_PKT_INNER_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 26, + .match_minbit = 21, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 26, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */ + .name = "INGRESS_PKT_INNER_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0x3f, + .match_maxbit = 26, + .match_minbit = 21, + .maxbit = 5, + .minbit = 0, + .value = 0x0, + .pmaxbit = 26, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_OTAG", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 26, + .match_minbit = 21, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 26, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC */ + .name = "INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 26, + .match_minbit = 21, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 26, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_VNTAG", + .match = 0x10, + .match_mask = 0x30, + .match_maxbit = 26, + .match_minbit = 21, + .maxbit = 5, + .minbit = 4, + .value = 0x1, + .pmaxbit = 26, + .pminbit = 21, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ARP", + .match = 0x1800, + .match_mask = 0x3830, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 40, + .pminbit = 27, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", + .match = 0x80, + .match_mask = 0x1c2, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 40, + .pminbit = 27, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", + .match = 0x408, + .match_mask = 0x64c, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 40, + .pminbit = 27, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_BFD", + .match = 0x3800, + .match_mask = 0x3800, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 13, + .minbit = 11, + .value = 0x7, + .pmaxbit = 40, + .pminbit = 27, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", + .match = 0x200, + .match_mask = 0x642, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 40, + .pminbit = 27, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 40, + .pminbit = 27, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", + .match = 0x100, + .match_mask = 0x1c0, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 8, + .minbit = 7, + .value = 0x2, + .pmaxbit = 40, + .pminbit = 27, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", + .match = 0x600, + .match_mask = 0x640, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 10, + .minbit = 9, + .value = 0x3, + .pmaxbit = 40, + .pminbit = 27, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ICMP", + .match = 0x2000, + .match_mask = 0x3830, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 40, + .pminbit = 27, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA", + .match = 0x180, + .match_mask = 0x1c0, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 8, + .minbit = 7, + .value = 0x3, + .pmaxbit = 40, + .pminbit = 27, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IGMP", + .match = 0x404, + .match_mask = 0x64c, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 40, + .pminbit = 27, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV4", + .match = 0x4, + .match_mask = 0x4c, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 3, + .minbit = 2, + .value = 0x1, + .pmaxbit = 40, + .pminbit = 27, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV6", + .match = 0x8, + .match_mask = 0x4c, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 3, + .minbit = 2, + .value = 0x2, + .pmaxbit = 40, + .pminbit = 27, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x3fff, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 13, + .minbit = 0, + .value = 0x0, + .pmaxbit = 40, + .pminbit = 27, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_P_1588", + .match = 0x3000, + .match_mask = 0x3800, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 13, + .minbit = 11, + .value = 0x6, + .pmaxbit = 40, + .pminbit = 27, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_RARP", + .match = 0x800, + .match_mask = 0x3830, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 40, + .pminbit = 27, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x20, + .match_mask = 0x70, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 5, + .minbit = 4, + .value = 0x2, + .pmaxbit = 40, + .pminbit = 27, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x820, + .match_mask = 0x3870, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 40, + .pminbit = 27, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UDP", + .match = 0x30, + .match_mask = 0x70, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 5, + .minbit = 4, + .value = 0x3, + .pmaxbit = 40, + .pminbit = 27, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", + .match = 0x10, + .match_mask = 0x72, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 5, + .minbit = 4, + .value = 0x1, + .pmaxbit = 40, + .pminbit = 27, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", + .match = 0x2800, + .match_mask = 0x3800, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 13, + .minbit = 11, + .value = 0x5, + .pmaxbit = 40, + .pminbit = 27, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", + .match = 0x2030, + .match_mask = 0x3870, + .match_maxbit = 40, + .match_minbit = 27, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 40, + .pminbit = 27, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_ETAG", + .match = 0x20, + .match_mask = 0x30, + .match_maxbit = 6, + .match_minbit = 1, + .maxbit = 5, + .minbit = 4, + .value = 0x2, + .pmaxbit = 6, + .pminbit = 1, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_ITAG", + .match = 0x8, + .match_mask = 0x8, + .match_maxbit = 6, + .match_minbit = 1, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 6, + .pminbit = 1, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */ + .name = "INGRESS_PKT_OUTER_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 6, + .match_minbit = 1, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 6, + .pminbit = 1, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */ + .name = "INGRESS_PKT_OUTER_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0x3f, + .match_maxbit = 6, + .match_minbit = 1, + .maxbit = 5, + .minbit = 0, + .value = 0x0, + .pmaxbit = 6, + .pminbit = 1, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_OTAG", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 6, + .match_minbit = 1, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 6, + .pminbit = 1, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC */ + .name = "INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 6, + .match_minbit = 1, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 6, + .pminbit = 1, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_VNTAG", + .match = 0x10, + .match_mask = 0x30, + .match_maxbit = 6, + .match_minbit = 1, + .maxbit = 5, + .minbit = 4, + .value = 0x1, + .pmaxbit = 6, + .pminbit = 1, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ARP", + .match = 0x1800, + .match_mask = 0x3830, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", + .match = 0x80, + .match_mask = 0x1c2, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", + .match = 0x408, + .match_mask = 0x64c, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_BFD", + .match = 0x3800, + .match_mask = 0x3800, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 13, + .minbit = 11, + .value = 0x7, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", + .match = 0x200, + .match_mask = 0x642, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", + .match = 0x100, + .match_mask = 0x1c0, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 8, + .minbit = 7, + .value = 0x2, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", + .match = 0x600, + .match_mask = 0x640, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 10, + .minbit = 9, + .value = 0x3, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GPE", + .match = 0x1830, + .match_mask = 0x3870, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE", + .match = 0x2, + .match_mask = 0x42, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", + .match = 0x202, + .match_mask = 0x642, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", + .match = 0x1000, + .match_mask = 0x3800, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 13, + .minbit = 11, + .value = 0x2, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", + .match = 0x82, + .match_mask = 0x1c2, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", + .match = 0x12, + .match_mask = 0x72, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 5, + .minbit = 4, + .value = 0x1, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", + .match = 0x2000, + .match_mask = 0x3830, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA", + .match = 0x180, + .match_mask = 0x1c0, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 8, + .minbit = 7, + .value = 0x3, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", + .match = 0x404, + .match_mask = 0x64c, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", + .match = 0x4, + .match_mask = 0x4c, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 3, + .minbit = 2, + .value = 0x1, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", + .match = 0x8, + .match_mask = 0x4c, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 3, + .minbit = 2, + .value = 0x2, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", + .match = 0x40, + .match_mask = 0x40, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 6, + .minbit = 6, + .value = 0x1, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", + .match = 0x42, + .match_mask = 0x42, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", + .match = 0x44, + .match_mask = 0x44, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", + .match = 0x48, + .match_mask = 0x48, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", + .match = 0x50, + .match_mask = 0x50, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", + .match = 0x60, + .match_mask = 0x60, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", + .match = 0xc0, + .match_mask = 0xc0, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 7, + .minbit = 7, + .value = 0x1, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", + .match = 0x140, + .match_mask = 0x140, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 8, + .minbit = 8, + .value = 0x1, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", + .match = 0x240, + .match_mask = 0x240, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 9, + .minbit = 9, + .value = 0x1, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x3fff, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 13, + .minbit = 0, + .value = 0x0, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", + .match = 0x3000, + .match_mask = 0x3800, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 13, + .minbit = 11, + .value = 0x6, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_RARP", + .match = 0x800, + .match_mask = 0x3830, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x20, + .match_mask = 0x70, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 5, + .minbit = 4, + .value = 0x2, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x820, + .match_mask = 0x3870, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UDP", + .match = 0x30, + .match_mask = 0x70, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 5, + .minbit = 4, + .value = 0x3, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", + .match = 0x10, + .match_mask = 0x72, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 5, + .minbit = 4, + .value = 0x1, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", + .match = 0x2800, + .match_mask = 0x3800, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 13, + .minbit = 11, + .value = 0x5, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", + .match = 0x2030, + .match_mask = 0x3870, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", + .match = 0x830, + .match_mask = 0x3870, + .match_maxbit = 20, + .match_minbit = 7, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 20, + .pminbit = 7, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */ + .name = "INGRESS_PKT_SYS_HDR_LOOPBACK", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 0, + .match_minbit = 0, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 0, + .pminbit = 0, + + }, + { + /* BCM56880_A0_HNA_6_5_32_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */ + .name = "INGRESS_PKT_SYS_HDR_NONE", + .match = 0x0, + .match_mask = 0x1, + .match_maxbit = 0, + .match_minbit = 0, + .maxbit = 0, + .minbit = 0, + .value = 0x0, + .pmaxbit = 0, + .pminbit = 0, + + }, +}; + +static bcmpkt_rxpmd_match_id_db_info_t bcm56880_a0_hna_6_5_32_2_0_rxpmd_match_id_db_info = { + .num_entries = 168, + .db = bcm56880_a0_hna_6_5_32_2_0_rxpmd_match_id_db +}; +bcmpkt_rxpmd_match_id_db_info_t * bcm56880_a0_hna_6_5_32_2_0_rxpmd_match_id_db_info_get(void) { + return &bcm56880_a0_hna_6_5_32_2_0_rxpmd_match_id_db_info; +} + +static shr_enum_map_t bcm56880_a0_hna_6_5_32_2_0_rxpmd_match_id_map[] = { + BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_rxpmd_match_id_map_info_t bcm56880_a0_hna_6_5_32_2_0_rxpmd_match_id_map_info = { + .num_entries = 168, + .map = bcm56880_a0_hna_6_5_32_2_0_rxpmd_match_id_map +}; + +bcmpkt_rxpmd_match_id_map_info_t * bcm56880_a0_hna_6_5_32_2_0_rxpmd_match_id_map_info_get(void) { + return &bcm56880_a0_hna_6_5_32_2_0_rxpmd_match_id_map_info; +} diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/xfcr/bcm56880_a0/hna_6_5_32_2_0/bcm56880_a0_hna_6_5_32_2_0_pkt_flexhdr.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/xfcr/bcm56880_a0/hna_6_5_32_2_0/bcm56880_a0_hna_6_5_32_2_0_pkt_flexhdr.c new file mode 100644 index 00000000000..df72bba45b3 --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/xfcr/bcm56880_a0/hna_6_5_32_2_0/bcm56880_a0_hna_6_5_32_2_0_pkt_flexhdr.c @@ -0,0 +1,7480 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) map.yml + * for device bcm56880_a0 and variant hna_6_5_32_2_0. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#include +#include +#include +#include +#include +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) + +static void bcm56880_a0_hna_6_5_32_2_0_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons) +{ + uint32_t *reason = data + 0; + + if (reason[12] & (0x1 << 0)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU); + } + if (reason[12] & (0x1 << 1)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS); + } + if (reason[12] & (0x1 << 2)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE); + } + if (reason[12] & (0x1 << 3)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT); + } + if (reason[12] & (0x1 << 4)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD); + } + if (reason[12] & (0x1 << 5)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED); + } + if (reason[12] & (0x1 << 6)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT); + } + if (reason[12] & (0x1 << 7)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD); + } + if (reason[12] & (0x1 << 8)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD); + } + if (reason[12] & (0x1 << 9)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS); + } + if (reason[12] & (0x1 << 10)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP); + } + if (reason[12] & (0x1 << 11)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS); + } + if (reason[12] & (0x1 << 12)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP); + } + if (reason[12] & (0x1 << 13)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR); + } + if (reason[12] & (0x1 << 14)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR); + } + if (reason[12] & (0x1 << 15)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED); + } + if (reason[12] & (0x1 << 16)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL); + } + if (reason[12] & (0x1 << 17)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_VFP); + } + if (reason[12] & (0x1 << 18)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP); + } + if (reason[12] & (0x1 << 19)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER); + } + if (reason[12] & (0x1 << 20)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP); + } + if (reason[12] & (0x1 << 21)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_SVP); + } + if (reason[12] & (0x1 << 22)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT); + } + if (reason[12] & (0x1 << 23)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT); + } + if (reason[12] & (0x1 << 24)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED); + } + if (reason[12] & (0x1 << 25)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED); + } + if (reason[12] & (0x1 << 26)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP); + } + if (reason[12] & (0x1 << 27)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED); + } + if (reason[12] & (0x1 << 28)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF); + } + if (reason[12] & (0x1 << 29)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED); + } + if (reason[12] & (0x1 << 30)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED); + } + if (reason[12] & (0x1 << 31)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU); + } + if (reason[11] & (0x1 << 0)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0); + } + if (reason[11] & (0x1 << 1)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1); + } + if (reason[11] & (0x1 << 2)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2); + } + if (reason[11] & (0x1 << 3)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3); + } + if (reason[11] & (0x1 << 4)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4); + } + if (reason[11] & (0x1 << 5)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5); + } + if (reason[11] & (0x1 << 6)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6); + } + if (reason[11] & (0x1 << 7)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7); + } + if (reason[11] & (0x1 << 8)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE); + } + if (reason[11] & (0x1 << 15)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP); + } +} + +static void bcm56880_a0_hna_6_5_32_2_0_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data) +{ + uint32_t *reason = data + 0; + + reason[12] = 0; + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) { + reason[12] |= (0x1 << 0); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) { + reason[12] |= (0x1 << 1); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) { + reason[12] |= (0x1 << 2); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT)) { + reason[12] |= (0x1 << 3); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD)) { + reason[12] |= (0x1 << 4); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) { + reason[12] |= (0x1 << 5); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) { + reason[12] |= (0x1 << 6); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD)) { + reason[12] |= (0x1 << 7); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD)) { + reason[12] |= (0x1 << 8); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) { + reason[12] |= (0x1 << 9); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) { + reason[12] |= (0x1 << 10); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) { + reason[12] |= (0x1 << 11); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) { + reason[12] |= (0x1 << 12); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) { + reason[12] |= (0x1 << 13); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) { + reason[12] |= (0x1 << 14); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED)) { + reason[12] |= (0x1 << 15); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) { + reason[12] |= (0x1 << 16); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_VFP)) { + reason[12] |= (0x1 << 17); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP)) { + reason[12] |= (0x1 << 18); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) { + reason[12] |= (0x1 << 19); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP)) { + reason[12] |= (0x1 << 20); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_SVP)) { + reason[12] |= (0x1 << 21); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT)) { + reason[12] |= (0x1 << 22); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) { + reason[12] |= (0x1 << 23); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED)) { + reason[12] |= (0x1 << 24); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED)) { + reason[12] |= (0x1 << 25); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP)) { + reason[12] |= (0x1 << 26); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED)) { + reason[12] |= (0x1 << 27); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF)) { + reason[12] |= (0x1 << 28); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED)) { + reason[12] |= (0x1 << 29); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED)) { + reason[12] |= (0x1 << 30); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU)) { + reason[12] |= (0x1 << 31); + } + reason[11] = 0; + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0)) { + reason[11] |= (0x1 << 0); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1)) { + reason[11] |= (0x1 << 1); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2)) { + reason[11] |= (0x1 << 2); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3)) { + reason[11] |= (0x1 << 3); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4)) { + reason[11] |= (0x1 << 4); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5)) { + reason[11] |= (0x1 << 5); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6)) { + reason[11] |= (0x1 << 6); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7)) { + reason[11] |= (0x1 << 7); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE)) { + reason[11] |= (0x1 << 8); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) { + reason[11] |= (0x1 << 15); + } +} + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_rxpmd_flex_field_data[] = { + { + .name = "DLB_ECMP_DESTINATION_15_0", + .fid = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { 256, 271 }, /* Profile 4. */ + { 240, 255 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { -1, -1 }, /* Profile 7. */ + { 256, 271 }, /* Profile 8. */ + { 240, 255 }, /* Profile 9. */ + }, + .profile_cnt = 10, + }, + { + .name = "DROP_CODE_15_0", + .fid = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 48, 63 }, /* Profile 2. */ + { 48, 63 }, /* Profile 3. */ + { 48, 63 }, /* Profile 4. */ + { 48, 63 }, /* Profile 5. */ + { 48, 63 }, /* Profile 6. */ + { 48, 63 }, /* Profile 7. */ + { 48, 63 }, /* Profile 8. */ + { 48, 63 }, /* Profile 9. */ + }, + .profile_cnt = 10, + }, + { + .name = "DVP_15_0", + .fid = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_DVP_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 352, 367 }, /* Profile 2. */ + { 352, 367 }, /* Profile 3. */ + { 352, 367 }, /* Profile 4. */ + { 352, 367 }, /* Profile 5. */ + { 352, 367 }, /* Profile 6. */ + { 352, 367 }, /* Profile 7. */ + { 352, 367 }, /* Profile 8. */ + { 352, 367 }, /* Profile 9. */ + }, + .profile_cnt = 10, + }, + { + .name = "EFFECTIVE_TTL_7_0", + .fid = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 176, 183 }, /* Profile 2. */ + { 160, 167 }, /* Profile 3. */ + { 176, 183 }, /* Profile 4. */ + { 160, 167 }, /* Profile 5. */ + { 176, 183 }, /* Profile 6. */ + { 160, 167 }, /* Profile 7. */ + { 176, 183 }, /* Profile 8. */ + { 160, 167 }, /* Profile 9. */ + }, + .profile_cnt = 10, + }, + { + .name = "EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0", + .fid = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 256, 271 }, /* Profile 2. */ + { 240, 255 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ + { 256, 271 }, /* Profile 6. */ + { 240, 255 }, /* Profile 7. */ + }, + .profile_cnt = 8, + }, + { + .name = "ENTROPY_LABEL_HIGH_3_0", + .fid = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 376, 379 }, /* Profile 2. */ + { 376, 379 }, /* Profile 3. */ + { 376, 379 }, /* Profile 4. */ + { 376, 379 }, /* Profile 5. */ + { 376, 379 }, /* Profile 6. */ + { 376, 379 }, /* Profile 7. */ + { 376, 379 }, /* Profile 8. */ + { 376, 379 }, /* Profile 9. */ + }, + .profile_cnt = 10, + }, + { + .name = "ENTROPY_LABEL_LOW_15_0", + .fid = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 192, 207 }, /* Profile 2. */ + { 176, 191 }, /* Profile 3. */ + { 192, 207 }, /* Profile 4. */ + { 176, 191 }, /* Profile 5. */ + { 192, 207 }, /* Profile 6. */ + { 176, 191 }, /* Profile 7. */ + { 192, 207 }, /* Profile 8. */ + { 176, 191 }, /* Profile 9. */ + }, + .profile_cnt = 10, + }, + { + .name = "EVENT_TRACE_VECTOR_31_0", + .fid = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 0, 31 }, /* Profile 2. */ + { 0, 31 }, /* Profile 3. */ + { 0, 31 }, /* Profile 4. */ + { 0, 31 }, /* Profile 5. */ + { 0, 31 }, /* Profile 6. */ + { 0, 31 }, /* Profile 7. */ + { 0, 31 }, /* Profile 8. */ + { 0, 31 }, /* Profile 9. */ + }, + .profile_cnt = 10, + }, + { + .name = "EVENT_TRACE_VECTOR_47_32", + .fid = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 32, 47 }, /* Profile 2. */ + { 32, 47 }, /* Profile 3. */ + { 32, 47 }, /* Profile 4. */ + { 32, 47 }, /* Profile 5. */ + { 32, 47 }, /* Profile 6. */ + { 32, 47 }, /* Profile 7. */ + { 32, 47 }, /* Profile 8. */ + { 32, 47 }, /* Profile 9. */ + }, + .profile_cnt = 10, + }, + { + .name = "I2E_CLASS_ID_15_0", + .fid = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 112, 127 }, /* Profile 2. */ + { 112, 127 }, /* Profile 3. */ + { 112, 127 }, /* Profile 4. */ + { 112, 127 }, /* Profile 5. */ + { 112, 127 }, /* Profile 6. */ + { 112, 127 }, /* Profile 7. */ + { 112, 127 }, /* Profile 8. */ + { 112, 127 }, /* Profile 9. */ + }, + .profile_cnt = 10, + }, + { + .name = "IFP_IOAM_GBP_ACTION_3_0", + .fid = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 400, 403 }, /* Profile 2. */ + { 400, 403 }, /* Profile 3. */ + { 400, 403 }, /* Profile 4. */ + { 400, 403 }, /* Profile 5. */ + { 400, 403 }, /* Profile 6. */ + { 400, 403 }, /* Profile 7. */ + { 400, 403 }, /* Profile 8. */ + { 400, 403 }, /* Profile 9. */ + }, + .profile_cnt = 10, + }, + { + .name = "IFP_TS_CONTROL_ACTION_3_0", + .fid = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 384, 387 }, /* Profile 2. */ + { 384, 387 }, /* Profile 3. */ + { 384, 387 }, /* Profile 4. */ + { 384, 387 }, /* Profile 5. */ + { 384, 387 }, /* Profile 6. */ + { 384, 387 }, /* Profile 7. */ + { 384, 387 }, /* Profile 8. */ + { 384, 387 }, /* Profile 9. */ + }, + .profile_cnt = 10, + }, + { + .name = "ING_PORT_GROUP_ID_3_0_3_0", + .fid = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_ING_PORT_GROUP_ID_3_0_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 408, 411 }, /* Profile 2. */ + { 408, 411 }, /* Profile 3. */ + { 408, 411 }, /* Profile 4. */ + { 408, 411 }, /* Profile 5. */ + { 408, 411 }, /* Profile 6. */ + { 408, 411 }, /* Profile 7. */ + { 408, 411 }, /* Profile 8. */ + { 408, 411 }, /* Profile 9. */ + }, + .profile_cnt = 10, + }, + { + .name = "ING_PORT_GROUP_ID_7_4_3_0", + .fid = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_ING_PORT_GROUP_ID_7_4_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 412, 415 }, /* Profile 2. */ + { 412, 415 }, /* Profile 3. */ + { 412, 415 }, /* Profile 4. */ + { 412, 415 }, /* Profile 5. */ + { 412, 415 }, /* Profile 6. */ + { 412, 415 }, /* Profile 7. */ + { 412, 415 }, /* Profile 8. */ + { 412, 415 }, /* Profile 9. */ + }, + .profile_cnt = 10, + }, + { + .name = "ING_TIMESTAMP_31_0", + .fid = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 64, 95 }, /* Profile 2. */ + { 64, 95 }, /* Profile 3. */ + { 64, 95 }, /* Profile 4. */ + { 64, 95 }, /* Profile 5. */ + { 64, 95 }, /* Profile 6. */ + { 64, 95 }, /* Profile 7. */ + { 64, 95 }, /* Profile 8. */ + { 64, 95 }, /* Profile 9. */ + }, + .profile_cnt = 10, + }, + { + .name = "INGRESS_PP_PORT_ITAG_PRESERVE_15_0", + .fid = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_ITAG_PRESERVE_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 320, 335 }, /* Profile 2. */ + { 304, 319 }, /* Profile 3. */ + { 320, 335 }, /* Profile 4. */ + { 304, 319 }, /* Profile 5. */ + { 320, 335 }, /* Profile 6. */ + { 304, 319 }, /* Profile 7. */ + { 320, 335 }, /* Profile 8. */ + { 304, 319 }, /* Profile 9. */ + }, + .profile_cnt = 10, + }, + { + .name = "INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0", + .fid = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 224, 239 }, /* Profile 2. */ + { 208, 223 }, /* Profile 3. */ + { 224, 239 }, /* Profile 4. */ + { 208, 223 }, /* Profile 5. */ + { 224, 239 }, /* Profile 6. */ + { 208, 223 }, /* Profile 7. */ + { 224, 239 }, /* Profile 8. */ + { 208, 223 }, /* Profile 9. */ + }, + .profile_cnt = 10, + }, + { + .name = "INGRESS_QOS_REMARK_CTRL_3_0", + .fid = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 392, 395 }, /* Profile 2. */ + { 392, 395 }, /* Profile 3. */ + { 392, 395 }, /* Profile 4. */ + { 392, 395 }, /* Profile 5. */ + { 392, 395 }, /* Profile 6. */ + { 392, 395 }, /* Profile 7. */ + { 392, 395 }, /* Profile 8. */ + { 392, 395 }, /* Profile 9. */ + }, + .profile_cnt = 10, + }, + { + .name = "INT_PRI_3_0", + .fid = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 380, 383 }, /* Profile 2. */ + { 380, 383 }, /* Profile 3. */ + { 380, 383 }, /* Profile 4. */ + { 380, 383 }, /* Profile 5. */ + { 380, 383 }, /* Profile 6. */ + { 380, 383 }, /* Profile 7. */ + { 380, 383 }, /* Profile 8. */ + { 380, 383 }, /* Profile 9. */ + }, + .profile_cnt = 10, + }, + { + .name = "L2_IIF_10_0", + .fid = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 128, 138 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { 128, 138 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ + { 128, 138 }, /* Profile 6. */ + { -1, -1 }, /* Profile 7. */ + { 128, 138 }, /* Profile 8. */ + }, + .profile_cnt = 9, + }, + { + .name = "L2_OIF_10_0", + .fid = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { 320, 330 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { 320, 330 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { 320, 330 }, /* Profile 7. */ + { -1, -1 }, /* Profile 8. */ + { 320, 330 }, /* Profile 9. */ + }, + .profile_cnt = 10, + }, + { + .name = "L3_IIF_13_0", + .fid = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 160, 173 }, /* Profile 2. */ + { 144, 157 }, /* Profile 3. */ + { 160, 173 }, /* Profile 4. */ + { 144, 157 }, /* Profile 5. */ + { 160, 173 }, /* Profile 6. */ + { 144, 157 }, /* Profile 7. */ + { 160, 173 }, /* Profile 8. */ + { 144, 157 }, /* Profile 9. */ + }, + .profile_cnt = 10, + }, + { + .name = "L3_OIF_1_13_0", + .fid = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 336, 349 }, /* Profile 2. */ + { 336, 349 }, /* Profile 3. */ + { 336, 349 }, /* Profile 4. */ + { 336, 349 }, /* Profile 5. */ + { 336, 349 }, /* Profile 6. */ + { 336, 349 }, /* Profile 7. */ + { 336, 349 }, /* Profile 8. */ + { 336, 349 }, /* Profile 9. */ + }, + .profile_cnt = 10, + }, + { + .name = "NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0", + .fid = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 144, 159 }, /* Profile 2. */ + { 128, 143 }, /* Profile 3. */ + { 144, 159 }, /* Profile 4. */ + { 128, 143 }, /* Profile 5. */ + { 144, 159 }, /* Profile 6. */ + { 128, 143 }, /* Profile 7. */ + { 144, 159 }, /* Profile 8. */ + { 128, 143 }, /* Profile 9. */ + }, + .profile_cnt = 10, + }, + { + .name = "NHOP_INDEX_1_15_0", + .fid = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 208, 223 }, /* Profile 2. */ + { 192, 207 }, /* Profile 3. */ + { 208, 223 }, /* Profile 4. */ + { 192, 207 }, /* Profile 5. */ + { 208, 223 }, /* Profile 6. */ + { 192, 207 }, /* Profile 7. */ + { 208, 223 }, /* Profile 8. */ + { 192, 207 }, /* Profile 9. */ + }, + .profile_cnt = 10, + }, + { + .name = "PARSER_VHLEN_0_15_0", + .fid = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 96, 111 }, /* Profile 2. */ + { 96, 111 }, /* Profile 3. */ + { 96, 111 }, /* Profile 4. */ + { 96, 111 }, /* Profile 5. */ + { 96, 111 }, /* Profile 6. */ + { 96, 111 }, /* Profile 7. */ + { 96, 111 }, /* Profile 8. */ + { 96, 111 }, /* Profile 9. */ + }, + .profile_cnt = 10, + }, + { + .name = "PKT_MISC_CTRL_0_3_0", + .fid = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 388, 391 }, /* Profile 2. */ + { 388, 391 }, /* Profile 3. */ + { 388, 391 }, /* Profile 4. */ + { 388, 391 }, /* Profile 5. */ + { 388, 391 }, /* Profile 6. */ + { 388, 391 }, /* Profile 7. */ + { 388, 391 }, /* Profile 8. */ + { 388, 391 }, /* Profile 9. */ + }, + .profile_cnt = 10, + }, + { + .name = "SVP_15_0", + .fid = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_SVP_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 304, 319 }, /* Profile 2. */ + { 288, 303 }, /* Profile 3. */ + { 304, 319 }, /* Profile 4. */ + { 288, 303 }, /* Profile 5. */ + { 304, 319 }, /* Profile 6. */ + { 288, 303 }, /* Profile 7. */ + { 304, 319 }, /* Profile 8. */ + { 288, 303 }, /* Profile 9. */ + }, + .profile_cnt = 10, + }, + { + .name = "SVP_NETWORK_GROUP_BITMAP_3_0", + .fid = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 404, 407 }, /* Profile 2. */ + { 404, 407 }, /* Profile 3. */ + { 404, 407 }, /* Profile 4. */ + { 404, 407 }, /* Profile 5. */ + { 404, 407 }, /* Profile 6. */ + { 404, 407 }, /* Profile 7. */ + { 404, 407 }, /* Profile 8. */ + { 404, 407 }, /* Profile 9. */ + }, + .profile_cnt = 10, + }, + { + .name = "SYSTEM_DESTINATION_15_0", + .fid = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 288, 303 }, /* Profile 2. */ + { 272, 287 }, /* Profile 3. */ + { 288, 303 }, /* Profile 4. */ + { 272, 287 }, /* Profile 5. */ + { 288, 303 }, /* Profile 6. */ + { 272, 287 }, /* Profile 7. */ + { 288, 303 }, /* Profile 8. */ + { 272, 287 }, /* Profile 9. */ + }, + .profile_cnt = 10, + }, + { + .name = "SYSTEM_OPCODE_3_0", + .fid = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 372, 375 }, /* Profile 2. */ + { 372, 375 }, /* Profile 3. */ + { 372, 375 }, /* Profile 4. */ + { 372, 375 }, /* Profile 5. */ + { 372, 375 }, /* Profile 6. */ + { 372, 375 }, /* Profile 7. */ + { 372, 375 }, /* Profile 8. */ + { 372, 375 }, /* Profile 9. */ + }, + .profile_cnt = 10, + }, + { + .name = "SYSTEM_SOURCE_15_0", + .fid = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ + { 272, 287 }, /* Profile 6. */ + { 256, 271 }, /* Profile 7. */ + { 272, 287 }, /* Profile 8. */ + { 256, 271 }, /* Profile 9. */ + }, + .profile_cnt = 10, + }, + { + .name = "TIMESTAMP_CTRL_3_0", + .fid = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 368, 371 }, /* Profile 2. */ + { 368, 371 }, /* Profile 3. */ + { 368, 371 }, /* Profile 4. */ + { 368, 371 }, /* Profile 5. */ + { 368, 371 }, /* Profile 6. */ + { 368, 371 }, /* Profile 7. */ + { 368, 371 }, /* Profile 8. */ + { 368, 371 }, /* Profile 9. */ + }, + .profile_cnt = 10, + }, + { + .name = "TUNNEL_PROCESSING_RESULTS_1_3_0", + .fid = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 396, 399 }, /* Profile 2. */ + { 396, 399 }, /* Profile 3. */ + { 396, 399 }, /* Profile 4. */ + { 396, 399 }, /* Profile 5. */ + { 396, 399 }, /* Profile 6. */ + { 396, 399 }, /* Profile 7. */ + { 396, 399 }, /* Profile 8. */ + { 396, 399 }, /* Profile 9. */ + }, + .profile_cnt = 10, + }, + { + .name = "VFI_15_0", + .fid = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_VFI_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 240, 255 }, /* Profile 2. */ + { 224, 239 }, /* Profile 3. */ + { 240, 255 }, /* Profile 4. */ + { 224, 239 }, /* Profile 5. */ + { 240, 255 }, /* Profile 6. */ + { 224, 239 }, /* Profile 7. */ + { 240, 255 }, /* Profile 8. */ + { 224, 239 }, /* Profile 9. */ + }, + .profile_cnt = 10, + }, +}; +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_rxpmd_flex_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_FID_COUNT, + .info = bcm56880_a0_hna_6_5_32_2_0_rxpmd_flex_field_data, + .profile_bmp_cnt = 1, + .profile_bmp[0] = 0x3fc, + +}; + +static shr_enum_map_t bcm56880_a0_hna_6_5_32_2_0_rxpmd_flex_reason_names[] = { + BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT +}; + +static bcmpkt_flex_reasons_info_t bcm56880_a0_hna_6_5_32_2_0_rxpmd_flex_reasons_info = { + .num_reasons = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RXPMD_FLEX_REASON_COUNT, + .reason_names = bcm56880_a0_hna_6_5_32_2_0_rxpmd_flex_reason_names, + .reason_encode = bcm56880_a0_hna_6_5_32_2_0_rxpmd_flex_reason_encode, + .reason_decode = bcm56880_a0_hna_6_5_32_2_0_rxpmd_flex_reason_decode, +}; + + +static int32_t bcmpkt_arp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_arp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_arp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_arp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_arp_t_operation_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_arp_t_operation_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_arp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_arp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_arp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_arp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_arp_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_FID_COUNT] = { + bcmpkt_arp_t_hardware_len_get, + bcmpkt_arp_t_hardware_type_get, + bcmpkt_arp_t_operation_get, + bcmpkt_arp_t_prot_addr_len_get, + bcmpkt_arp_t_protocol_type_get, + bcmpkt_arp_t_sender_ha_get, + bcmpkt_arp_t_sender_ip_get, + bcmpkt_arp_t_target_ha_get, + bcmpkt_arp_t_target_ip_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_arp_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_FID_COUNT] = { + bcmpkt_arp_t_hardware_len_set, + bcmpkt_arp_t_hardware_type_set, + bcmpkt_arp_t_operation_set, + bcmpkt_arp_t_prot_addr_len_set, + bcmpkt_arp_t_protocol_type_set, + bcmpkt_arp_t_sender_ha_set, + bcmpkt_arp_t_sender_ip_set, + bcmpkt_arp_t_target_ha_set, + bcmpkt_arp_t_target_ip_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_arp_t_field_data[] = { + BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_arp_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ARP_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_32_2_0_arp_t_field_data, +}; + + +static int32_t bcmpkt_authen_t_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_authen_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_authen_t_payload_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_authen_t_payload_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_authen_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_authen_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_authen_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_spi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_spi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_authen_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_AUTHEN_T_FID_COUNT] = { + bcmpkt_authen_t_data_get, + bcmpkt_authen_t_next_header_get, + bcmpkt_authen_t_payload_len_get, + bcmpkt_authen_t_reserved_get, + bcmpkt_authen_t_seq_num_get, + bcmpkt_authen_t_spi_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_authen_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_AUTHEN_T_FID_COUNT] = { + bcmpkt_authen_t_data_set, + bcmpkt_authen_t_next_header_set, + bcmpkt_authen_t_payload_len_set, + bcmpkt_authen_t_reserved_set, + bcmpkt_authen_t_seq_num_set, + bcmpkt_authen_t_spi_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_authen_t_field_data[] = { + BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_authen_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_AUTHEN_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_32_2_0_authen_t_field_data, +}; + + +static int32_t bcmpkt_bfd_t_desmintxintv_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_desmintxintv_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_minechorxintv_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_minechorxintv_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_reqminrxintv_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_reqminrxintv_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_ap_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 18, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_ap_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 18, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_bfd_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_bfd_t_bfd_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_cpi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 19, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_cpi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 19, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_dem_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 17, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_dem_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 17, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_detectmult_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_bfd_t_detectmult_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_diag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 5); + + return ret; +} + +static int32_t bcmpkt_bfd_t_diag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 5, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_fin_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_fin_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_mpt_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_mpt_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_mydiscrim_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_mydiscrim_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_poll_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 21, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_poll_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 21, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_sta_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 22, 2); + + return ret; +} + +static int32_t bcmpkt_bfd_t_sta_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 22, 2, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_urdiscrim_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_urdiscrim_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 29, 3); + + return ret; +} + +static int32_t bcmpkt_bfd_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 29, 3, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_bfd_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_FID_COUNT] = { + bcmpkt_bfd_t_ap_get, + bcmpkt_bfd_t_bfd_length_get, + bcmpkt_bfd_t_cpi_get, + bcmpkt_bfd_t_dem_get, + bcmpkt_bfd_t_desmintxintv_get, + bcmpkt_bfd_t_detectmult_get, + bcmpkt_bfd_t_diag_get, + bcmpkt_bfd_t_fin_get, + bcmpkt_bfd_t_minechorxintv_get, + bcmpkt_bfd_t_mpt_get, + bcmpkt_bfd_t_mydiscrim_get, + bcmpkt_bfd_t_poll_get, + bcmpkt_bfd_t_reqminrxintv_get, + bcmpkt_bfd_t_sta_get, + bcmpkt_bfd_t_urdiscrim_get, + bcmpkt_bfd_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_bfd_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_FID_COUNT] = { + bcmpkt_bfd_t_ap_set, + bcmpkt_bfd_t_bfd_length_set, + bcmpkt_bfd_t_cpi_set, + bcmpkt_bfd_t_dem_set, + bcmpkt_bfd_t_desmintxintv_set, + bcmpkt_bfd_t_detectmult_set, + bcmpkt_bfd_t_diag_set, + bcmpkt_bfd_t_fin_set, + bcmpkt_bfd_t_minechorxintv_set, + bcmpkt_bfd_t_mpt_set, + bcmpkt_bfd_t_mydiscrim_set, + bcmpkt_bfd_t_poll_set, + bcmpkt_bfd_t_reqminrxintv_set, + bcmpkt_bfd_t_sta_set, + bcmpkt_bfd_t_urdiscrim_set, + bcmpkt_bfd_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_bfd_t_field_data[] = { + BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_bfd_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_BFD_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_32_2_0_bfd_t_field_data, +}; + + +static int32_t bcmpkt_cntag_t_rpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_cntag_t_rpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_cntag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_cntag_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_cntag_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CNTAG_T_FID_COUNT] = { + bcmpkt_cntag_t_rpid_get, + bcmpkt_cntag_t_tpid_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_cntag_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CNTAG_T_FID_COUNT] = { + bcmpkt_cntag_t_rpid_set, + bcmpkt_cntag_t_tpid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_cntag_t_field_data[] = { + BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_cntag_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CNTAG_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_32_2_0_cntag_t_field_data, +}; + + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_cpu_composites_0_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { + bcmpkt_cpu_composites_0_t_dma_cont0_get, + bcmpkt_cpu_composites_0_t_dma_cont1_get, + bcmpkt_cpu_composites_0_t_dma_cont2_get, + bcmpkt_cpu_composites_0_t_dma_cont3_get, + bcmpkt_cpu_composites_0_t_dma_cont4_get, + bcmpkt_cpu_composites_0_t_dma_cont5_get, + bcmpkt_cpu_composites_0_t_dma_cont6_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_cpu_composites_0_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { + bcmpkt_cpu_composites_0_t_dma_cont0_set, + bcmpkt_cpu_composites_0_t_dma_cont1_set, + bcmpkt_cpu_composites_0_t_dma_cont2_set, + bcmpkt_cpu_composites_0_t_dma_cont3_set, + bcmpkt_cpu_composites_0_t_dma_cont4_set, + bcmpkt_cpu_composites_0_t_dma_cont5_set, + bcmpkt_cpu_composites_0_t_dma_cont6_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_cpu_composites_0_t_field_data[] = { + BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_cpu_composites_0_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_32_2_0_cpu_composites_0_t_field_data, +}; + + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_cpu_composites_1_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { + bcmpkt_cpu_composites_1_t_dma_cont10_get, + bcmpkt_cpu_composites_1_t_dma_cont11_get, + bcmpkt_cpu_composites_1_t_dma_cont12_get, + bcmpkt_cpu_composites_1_t_dma_cont13_get, + bcmpkt_cpu_composites_1_t_dma_cont14_get, + bcmpkt_cpu_composites_1_t_dma_cont15_get, + bcmpkt_cpu_composites_1_t_dma_cont16_get, + bcmpkt_cpu_composites_1_t_dma_cont17_get, + bcmpkt_cpu_composites_1_t_dma_cont7_get, + bcmpkt_cpu_composites_1_t_dma_cont8_get, + bcmpkt_cpu_composites_1_t_dma_cont9_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_cpu_composites_1_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { + bcmpkt_cpu_composites_1_t_dma_cont10_set, + bcmpkt_cpu_composites_1_t_dma_cont11_set, + bcmpkt_cpu_composites_1_t_dma_cont12_set, + bcmpkt_cpu_composites_1_t_dma_cont13_set, + bcmpkt_cpu_composites_1_t_dma_cont14_set, + bcmpkt_cpu_composites_1_t_dma_cont15_set, + bcmpkt_cpu_composites_1_t_dma_cont16_set, + bcmpkt_cpu_composites_1_t_dma_cont17_set, + bcmpkt_cpu_composites_1_t_dma_cont7_set, + bcmpkt_cpu_composites_1_t_dma_cont8_set, + bcmpkt_cpu_composites_1_t_dma_cont9_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_cpu_composites_1_t_field_data[] = { + BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_cpu_composites_1_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_32_2_0_cpu_composites_1_t_field_data, +}; + + +static int32_t bcmpkt_dest_option_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_dest_option_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_dest_option_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_dest_option_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_dest_option_t_option_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_dest_option_t_option_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_dest_option_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = { + bcmpkt_dest_option_t_hdr_ext_len_get, + bcmpkt_dest_option_t_next_header_get, + bcmpkt_dest_option_t_option_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_dest_option_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = { + bcmpkt_dest_option_t_hdr_ext_len_set, + bcmpkt_dest_option_t_next_header_set, + bcmpkt_dest_option_t_option_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_dest_option_t_field_data[] = { + BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_dest_option_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_DEST_OPTION_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_32_2_0_dest_option_t_field_data, +}; + + +static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 11, 2); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 11, 2, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 13, 3); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 13, 3, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 10); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 10, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_t_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 10, 1); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_t_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 10, 1, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 12); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 12, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_erspan3_fixed_hdr_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { + bcmpkt_erspan3_fixed_hdr_t_bso_get, + bcmpkt_erspan3_fixed_hdr_t_cos_get, + bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get, + bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get, + bcmpkt_erspan3_fixed_hdr_t_session_id_get, + bcmpkt_erspan3_fixed_hdr_t_t_get, + bcmpkt_erspan3_fixed_hdr_t_timestamp_get, + bcmpkt_erspan3_fixed_hdr_t_ver_get, + bcmpkt_erspan3_fixed_hdr_t_vlan_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_erspan3_fixed_hdr_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { + bcmpkt_erspan3_fixed_hdr_t_bso_set, + bcmpkt_erspan3_fixed_hdr_t_cos_set, + bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set, + bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set, + bcmpkt_erspan3_fixed_hdr_t_session_id_set, + bcmpkt_erspan3_fixed_hdr_t_t_set, + bcmpkt_erspan3_fixed_hdr_t_timestamp_set, + bcmpkt_erspan3_fixed_hdr_t_ver_set, + bcmpkt_erspan3_fixed_hdr_t_vlan_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_erspan3_fixed_hdr_t_field_data[] = { + BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_erspan3_fixed_hdr_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_32_2_0_erspan3_fixed_hdr_t_field_data, +}; + + +static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 26, 6); + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 26, 6, val); + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 10); + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 10, val); + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_erspan3_subhdr_5_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { + bcmpkt_erspan3_subhdr_5_t_platform_id_get, + bcmpkt_erspan3_subhdr_5_t_port_id_get, + bcmpkt_erspan3_subhdr_5_t_switch_id_get, + bcmpkt_erspan3_subhdr_5_t_timestamp_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_erspan3_subhdr_5_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { + bcmpkt_erspan3_subhdr_5_t_platform_id_set, + bcmpkt_erspan3_subhdr_5_t_port_id_set, + bcmpkt_erspan3_subhdr_5_t_switch_id_set, + bcmpkt_erspan3_subhdr_5_t_timestamp_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_erspan3_subhdr_5_t_field_data[] = { + BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_erspan3_subhdr_5_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_32_2_0_erspan3_subhdr_5_t_field_data, +}; + + +static int32_t bcmpkt_esp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 8); + + return ret; +} + +static int32_t bcmpkt_esp_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_esp_t_pad_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 8, 16); + + return ret; +} + +static int32_t bcmpkt_esp_t_pad_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 8, 16, val); + return ret; +} + +static int32_t bcmpkt_esp_t_pad_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 24, 8); + + return ret; +} + +static int32_t bcmpkt_esp_t_pad_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_esp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_esp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_esp_t_spi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_esp_t_spi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_esp_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ESP_T_FID_COUNT] = { + bcmpkt_esp_t_next_header_get, + bcmpkt_esp_t_pad_get, + bcmpkt_esp_t_pad_len_get, + bcmpkt_esp_t_seq_num_get, + bcmpkt_esp_t_spi_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_esp_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ESP_T_FID_COUNT] = { + bcmpkt_esp_t_next_header_set, + bcmpkt_esp_t_pad_set, + bcmpkt_esp_t_pad_len_set, + bcmpkt_esp_t_seq_num_set, + bcmpkt_esp_t_spi_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_esp_t_field_data[] = { + BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_esp_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ESP_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_32_2_0_esp_t_field_data, +}; + + +static int32_t bcmpkt_etag_t_tag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_etag_t_tag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_etag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_etag_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_etag_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ETAG_T_FID_COUNT] = { + bcmpkt_etag_t_tag_get, + bcmpkt_etag_t_tpid_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_etag_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ETAG_T_FID_COUNT] = { + bcmpkt_etag_t_tag_set, + bcmpkt_etag_t_tpid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_etag_t_field_data[] = { + BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_etag_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ETAG_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_32_2_0_etag_t_field_data, +}; + + +static int32_t bcmpkt_ethertype_t_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ethertype_t_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_ethertype_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = { + bcmpkt_ethertype_t_type_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_ethertype_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = { + bcmpkt_ethertype_t_type_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_ethertype_t_field_data[] = { + BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_ethertype_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_32_2_0_ethertype_t_field_data, +}; + + +static int32_t bcmpkt_frag_t_frag_info_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_frag_t_frag_info_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_frag_t_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_frag_t_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_frag_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_frag_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_frag_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_frag_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_frag_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_FRAG_T_FID_COUNT] = { + bcmpkt_frag_t_frag_info_get, + bcmpkt_frag_t_id_get, + bcmpkt_frag_t_next_header_get, + bcmpkt_frag_t_reserved_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_frag_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_FRAG_T_FID_COUNT] = { + bcmpkt_frag_t_frag_info_set, + bcmpkt_frag_t_id_set, + bcmpkt_frag_t_next_header_set, + bcmpkt_frag_t_reserved_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_frag_t_field_data[] = { + BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_frag_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_FRAG_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_32_2_0_frag_t_field_data, +}; + + +static int32_t bcmpkt_generic_loopback_t_destination_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_destination_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_destination_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_destination_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_entropy_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_entropy_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_header_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_header_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_input_priority_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_input_priority_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_ctrl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 4, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_ctrl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 4, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 28, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_qos_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_qos_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_source_system_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_source_system_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_start_byte_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_start_byte_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_svp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_svp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_generic_loopback_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { + bcmpkt_generic_loopback_t_destination_obj_get, + bcmpkt_generic_loopback_t_destination_type_get, + bcmpkt_generic_loopback_t_entropy_obj_get, + bcmpkt_generic_loopback_t_flags_get, + bcmpkt_generic_loopback_t_header_type_get, + bcmpkt_generic_loopback_t_input_priority_get, + bcmpkt_generic_loopback_t_interface_ctrl_get, + bcmpkt_generic_loopback_t_interface_obj_get, + bcmpkt_generic_loopback_t_processing_ctrl_0_get, + bcmpkt_generic_loopback_t_processing_ctrl_1_get, + bcmpkt_generic_loopback_t_qos_obj_get, + bcmpkt_generic_loopback_t_reserved_1_get, + bcmpkt_generic_loopback_t_source_system_port_get, + bcmpkt_generic_loopback_t_start_byte_get, + bcmpkt_generic_loopback_t_svp_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_generic_loopback_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { + bcmpkt_generic_loopback_t_destination_obj_set, + bcmpkt_generic_loopback_t_destination_type_set, + bcmpkt_generic_loopback_t_entropy_obj_set, + bcmpkt_generic_loopback_t_flags_set, + bcmpkt_generic_loopback_t_header_type_set, + bcmpkt_generic_loopback_t_input_priority_set, + bcmpkt_generic_loopback_t_interface_ctrl_set, + bcmpkt_generic_loopback_t_interface_obj_set, + bcmpkt_generic_loopback_t_processing_ctrl_0_set, + bcmpkt_generic_loopback_t_processing_ctrl_1_set, + bcmpkt_generic_loopback_t_qos_obj_set, + bcmpkt_generic_loopback_t_reserved_1_set, + bcmpkt_generic_loopback_t_source_system_port_set, + bcmpkt_generic_loopback_t_start_byte_set, + bcmpkt_generic_loopback_t_svp_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_generic_loopback_t_field_data[] = { + BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_generic_loopback_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_32_2_0_generic_loopback_t_field_data, +}; + + +static int32_t bcmpkt_gpe_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_gpe_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_gpe_t_next_protocol_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_gpe_t_next_protocol_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_gpe_t_reserved0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 16); + + return ret; +} + +static int32_t bcmpkt_gpe_t_reserved0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 16, val); + return ret; +} + +static int32_t bcmpkt_gpe_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 8); + + return ret; +} + +static int32_t bcmpkt_gpe_t_reserved1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_gpe_t_vni_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 8, 24); + + return ret; +} + +static int32_t bcmpkt_gpe_t_vni_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 8, 24, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_gpe_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GPE_T_FID_COUNT] = { + bcmpkt_gpe_t_flags_get, + bcmpkt_gpe_t_next_protocol_get, + bcmpkt_gpe_t_reserved0_get, + bcmpkt_gpe_t_reserved1_get, + bcmpkt_gpe_t_vni_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_gpe_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GPE_T_FID_COUNT] = { + bcmpkt_gpe_t_flags_set, + bcmpkt_gpe_t_next_protocol_set, + bcmpkt_gpe_t_reserved0_set, + bcmpkt_gpe_t_reserved1_set, + bcmpkt_gpe_t_vni_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_gpe_t_field_data[] = { + BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_gpe_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GPE_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_32_2_0_gpe_t_field_data, +}; + + +static int32_t bcmpkt_gre_chksum_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_gre_chksum_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_gre_chksum_t_offset_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_gre_chksum_t_offset_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_gre_chksum_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = { + bcmpkt_gre_chksum_t_checksum_get, + bcmpkt_gre_chksum_t_offset_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_gre_chksum_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = { + bcmpkt_gre_chksum_t_checksum_set, + bcmpkt_gre_chksum_t_offset_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_gre_chksum_t_field_data[] = { + BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_gre_chksum_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_32_2_0_gre_chksum_t_field_data, +}; + + +static int32_t bcmpkt_gre_key_t_key_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gre_key_t_key_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_gre_key_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_KEY_T_FID_COUNT] = { + bcmpkt_gre_key_t_key_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_gre_key_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_KEY_T_FID_COUNT] = { + bcmpkt_gre_key_t_key_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_gre_key_t_field_data[] = { + BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_gre_key_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_KEY_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_32_2_0_gre_key_t_field_data, +}; + + +static int32_t bcmpkt_gre_rout_t_routing_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gre_rout_t_routing_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_gre_rout_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = { + bcmpkt_gre_rout_t_routing_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_gre_rout_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = { + bcmpkt_gre_rout_t_routing_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_gre_rout_t_field_data[] = { + BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_gre_rout_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_ROUT_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_32_2_0_gre_rout_t_field_data, +}; + + +static int32_t bcmpkt_gre_seq_t_sequence_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gre_seq_t_sequence_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_gre_seq_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = { + bcmpkt_gre_seq_t_sequence_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_gre_seq_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = { + bcmpkt_gre_seq_t_sequence_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_gre_seq_t_field_data[] = { + BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_gre_seq_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_SEQ_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_32_2_0_gre_seq_t_field_data, +}; + + +static int32_t bcmpkt_gre_t_c_r_k_s_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_gre_t_c_r_k_s_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_gre_t_protocol_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_gre_t_protocol_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_gre_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 19, 9); + + return ret; +} + +static int32_t bcmpkt_gre_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 19, 9, val); + return ret; +} + +static int32_t bcmpkt_gre_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 3); + + return ret; +} + +static int32_t bcmpkt_gre_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 3, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_gre_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_T_FID_COUNT] = { + bcmpkt_gre_t_c_r_k_s_get, + bcmpkt_gre_t_protocol_get, + bcmpkt_gre_t_reserved_get, + bcmpkt_gre_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_gre_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_T_FID_COUNT] = { + bcmpkt_gre_t_c_r_k_s_set, + bcmpkt_gre_t_protocol_set, + bcmpkt_gre_t_reserved_set, + bcmpkt_gre_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_gre_t_field_data[] = { + BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_gre_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_GRE_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_32_2_0_gre_t_field_data, +}; + + +static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_option_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_option_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_hop_by_hop_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = { + bcmpkt_hop_by_hop_t_hdr_ext_len_get, + bcmpkt_hop_by_hop_t_next_header_get, + bcmpkt_hop_by_hop_t_option_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_hop_by_hop_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = { + bcmpkt_hop_by_hop_t_hdr_ext_len_set, + bcmpkt_hop_by_hop_t_next_header_set, + bcmpkt_hop_by_hop_t_option_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_hop_by_hop_t_field_data[] = { + BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_hop_by_hop_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_32_2_0_hop_by_hop_t_field_data, +}; + + +static int32_t bcmpkt_icmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_icmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_icmp_t_code_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_icmp_t_code_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_icmp_t_icmp_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_icmp_t_icmp_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_icmp_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ICMP_T_FID_COUNT] = { + bcmpkt_icmp_t_checksum_get, + bcmpkt_icmp_t_code_get, + bcmpkt_icmp_t_icmp_type_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_icmp_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ICMP_T_FID_COUNT] = { + bcmpkt_icmp_t_checksum_set, + bcmpkt_icmp_t_code_set, + bcmpkt_icmp_t_icmp_type_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_icmp_t_field_data[] = { + BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_icmp_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ICMP_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_32_2_0_icmp_t_field_data, +}; + + +static int32_t bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_a_t_lns_device_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 24); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_a_t_lns_device_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 24, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_ifa_flex_md_0_a_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_get, + bcmpkt_ifa_flex_md_0_a_t_lns_device_id_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_ifa_flex_md_0_a_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_set, + bcmpkt_ifa_flex_md_0_a_t_lns_device_id_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_ifa_flex_md_0_a_t_field_data[] = { + BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_ifa_flex_md_0_a_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_32_2_0_ifa_flex_md_0_a_t_field_data, +}; + + +static int32_t bcmpkt_ifa_flex_md_0_b_t_cn_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 26, 2); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_cn_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 26, 2, val); + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_port_speed_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_port_speed_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_queue_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 6); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_queue_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 6, val); + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 20); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 20, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_ifa_flex_md_0_b_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_0_b_t_cn_get, + bcmpkt_ifa_flex_md_0_b_t_port_speed_get, + bcmpkt_ifa_flex_md_0_b_t_queue_id_get, + bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_ifa_flex_md_0_b_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_0_b_t_cn_set, + bcmpkt_ifa_flex_md_0_b_t_port_speed_set, + bcmpkt_ifa_flex_md_0_b_t_queue_id_set, + bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_ifa_flex_md_0_b_t_field_data[] = { + BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_ifa_flex_md_0_b_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_32_2_0_ifa_flex_md_0_b_t_field_data, +}; + + +static int32_t bcmpkt_ifa_flex_md_1_t_egress_port_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_1_t_egress_port_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_1_t_ingress_port_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_1_t_ingress_port_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_ifa_flex_md_1_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_1_t_egress_port_id_get, + bcmpkt_ifa_flex_md_1_t_ingress_port_id_get, + bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_ifa_flex_md_1_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_1_t_egress_port_id_set, + bcmpkt_ifa_flex_md_1_t_ingress_port_id_set, + bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_ifa_flex_md_1_t_field_data[] = { + BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_ifa_flex_md_1_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_32_2_0_ifa_flex_md_1_t_field_data, +}; + + +static int32_t bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_ifa_flex_md_2_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_get, + bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_ifa_flex_md_2_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_set, + bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_ifa_flex_md_2_t_field_data[] = { + BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_2_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_ifa_flex_md_2_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_32_2_0_ifa_flex_md_2_t_field_data, +}; + + +static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_ifa_flex_md_3_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_3_t_mmu_stat_0_get, + bcmpkt_ifa_flex_md_3_t_mmu_stat_1_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_ifa_flex_md_3_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT] = { + bcmpkt_ifa_flex_md_3_t_mmu_stat_0_set, + bcmpkt_ifa_flex_md_3_t_mmu_stat_1_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_ifa_flex_md_3_t_field_data[] = { + BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_3_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_ifa_flex_md_3_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_32_2_0_ifa_flex_md_3_t_field_data, +}; + + +static int32_t bcmpkt_ifa_header_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_header_t_gns_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 4); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_gns_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 4, val); + return ret; +} + +static int32_t bcmpkt_ifa_header_t_max_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_max_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_header_t_next_hdr_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_next_hdr_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_header_t_ver_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_ver_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_ifa_header_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = { + bcmpkt_ifa_header_t_flags_get, + bcmpkt_ifa_header_t_gns_get, + bcmpkt_ifa_header_t_max_length_get, + bcmpkt_ifa_header_t_next_hdr_get, + bcmpkt_ifa_header_t_ver_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_ifa_header_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = { + bcmpkt_ifa_header_t_flags_set, + bcmpkt_ifa_header_t_gns_set, + bcmpkt_ifa_header_t_max_length_set, + bcmpkt_ifa_header_t_next_hdr_set, + bcmpkt_ifa_header_t_ver_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_ifa_header_t_field_data[] = { + BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_ifa_header_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_HEADER_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_32_2_0_ifa_header_t_field_data, +}; + + +static int32_t bcmpkt_ifa_md_base_t_action_vector_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_md_base_t_action_vector_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_md_base_t_hop_limit_current_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ifa_md_base_t_hop_limit_current_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ifa_md_base_t_request_vector_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_md_base_t_request_vector_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_ifa_md_base_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT] = { + bcmpkt_ifa_md_base_t_action_vector_get, + bcmpkt_ifa_md_base_t_hop_limit_current_length_get, + bcmpkt_ifa_md_base_t_request_vector_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_ifa_md_base_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT] = { + bcmpkt_ifa_md_base_t_action_vector_set, + bcmpkt_ifa_md_base_t_hop_limit_current_length_set, + bcmpkt_ifa_md_base_t_request_vector_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_ifa_md_base_t_field_data[] = { + BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_MD_BASE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_ifa_md_base_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_32_2_0_ifa_md_base_t_field_data, +}; + + +static int32_t bcmpkt_ifa_metadata_t_action_vector_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_action_vector_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_hop_limit_current_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_hop_limit_current_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_metadata_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_metadata_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_request_vector_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_t_request_vector_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_ifa_metadata_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_METADATA_T_FID_COUNT] = { + bcmpkt_ifa_metadata_t_action_vector_get, + bcmpkt_ifa_metadata_t_hop_limit_current_length_get, + bcmpkt_ifa_metadata_t_metadata_get, + bcmpkt_ifa_metadata_t_request_vector_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_ifa_metadata_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_METADATA_T_FID_COUNT] = { + bcmpkt_ifa_metadata_t_action_vector_set, + bcmpkt_ifa_metadata_t_hop_limit_current_length_set, + bcmpkt_ifa_metadata_t_metadata_set, + bcmpkt_ifa_metadata_t_request_vector_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_ifa_metadata_t_field_data[] = { + BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_METADATA_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_ifa_metadata_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IFA_METADATA_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_32_2_0_ifa_metadata_t_field_data, +}; + + +static int32_t bcmpkt_igmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_igmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_igmp_t_group_address_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_igmp_t_group_address_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_igmp_t_igmp_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_igmp_t_igmp_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_igmp_t_max_resp_time_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_igmp_t_max_resp_time_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_igmp_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IGMP_T_FID_COUNT] = { + bcmpkt_igmp_t_checksum_get, + bcmpkt_igmp_t_group_address_get, + bcmpkt_igmp_t_igmp_type_get, + bcmpkt_igmp_t_max_resp_time_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_igmp_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IGMP_T_FID_COUNT] = { + bcmpkt_igmp_t_checksum_set, + bcmpkt_igmp_t_group_address_set, + bcmpkt_igmp_t_igmp_type_set, + bcmpkt_igmp_t_max_resp_time_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_igmp_t_field_data[] = { + BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_igmp_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IGMP_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_32_2_0_igmp_t_field_data, +}; + + +static int32_t bcmpkt_ipfix_t_export_time_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_export_time_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipfix_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipfix_t_obs_domain_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_obs_domain_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ipfix_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_ipfix_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPFIX_T_FID_COUNT] = { + bcmpkt_ipfix_t_export_time_get, + bcmpkt_ipfix_t_length_get, + bcmpkt_ipfix_t_obs_domain_id_get, + bcmpkt_ipfix_t_sequence_num_get, + bcmpkt_ipfix_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_ipfix_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPFIX_T_FID_COUNT] = { + bcmpkt_ipfix_t_export_time_set, + bcmpkt_ipfix_t_length_set, + bcmpkt_ipfix_t_obs_domain_id_set, + bcmpkt_ipfix_t_sequence_num_set, + bcmpkt_ipfix_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_ipfix_t_field_data[] = { + BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_ipfix_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPFIX_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_32_2_0_ipfix_t_field_data, +}; + + +static int32_t bcmpkt_ipv4_t_da_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_da_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_flags_frag_offset_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_flags_frag_offset_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_hdr_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_hdr_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_option_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_option_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_protocol_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_protocol_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_sa_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_sa_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_tos_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_tos_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_total_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_total_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_ttl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_ttl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_version_hdr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_version_hdr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_ipv4_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_FID_COUNT] = { + bcmpkt_ipv4_t_da_get, + bcmpkt_ipv4_t_flags_frag_offset_get, + bcmpkt_ipv4_t_hdr_checksum_get, + bcmpkt_ipv4_t_id_get, + bcmpkt_ipv4_t_option_get, + bcmpkt_ipv4_t_protocol_get, + bcmpkt_ipv4_t_sa_get, + bcmpkt_ipv4_t_tos_get, + bcmpkt_ipv4_t_total_length_get, + bcmpkt_ipv4_t_ttl_get, + bcmpkt_ipv4_t_version_hdr_len_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_ipv4_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_FID_COUNT] = { + bcmpkt_ipv4_t_da_set, + bcmpkt_ipv4_t_flags_frag_offset_set, + bcmpkt_ipv4_t_hdr_checksum_set, + bcmpkt_ipv4_t_id_set, + bcmpkt_ipv4_t_option_set, + bcmpkt_ipv4_t_protocol_set, + bcmpkt_ipv4_t_sa_set, + bcmpkt_ipv4_t_tos_set, + bcmpkt_ipv4_t_total_length_set, + bcmpkt_ipv4_t_ttl_set, + bcmpkt_ipv4_t_version_hdr_len_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_ipv4_t_field_data[] = { + BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_ipv4_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV4_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_32_2_0_ipv4_t_field_data, +}; + + +static int32_t bcmpkt_ipv6_t_da_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_da_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_flow_label_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 20); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_flow_label_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 20, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_hop_limit_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 8); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_hop_limit_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 8, 8); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_payload_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_payload_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_sa_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_sa_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_traffic_class_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 8); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_traffic_class_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_ipv6_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_FID_COUNT] = { + bcmpkt_ipv6_t_da_get, + bcmpkt_ipv6_t_flow_label_get, + bcmpkt_ipv6_t_hop_limit_get, + bcmpkt_ipv6_t_next_header_get, + bcmpkt_ipv6_t_payload_length_get, + bcmpkt_ipv6_t_sa_get, + bcmpkt_ipv6_t_traffic_class_get, + bcmpkt_ipv6_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_ipv6_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_FID_COUNT] = { + bcmpkt_ipv6_t_da_set, + bcmpkt_ipv6_t_flow_label_set, + bcmpkt_ipv6_t_hop_limit_set, + bcmpkt_ipv6_t_next_header_set, + bcmpkt_ipv6_t_payload_length_set, + bcmpkt_ipv6_t_sa_set, + bcmpkt_ipv6_t_traffic_class_set, + bcmpkt_ipv6_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_ipv6_t_field_data[] = { + BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_ipv6_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_IPV6_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_32_2_0_ipv6_t_field_data, +}; + + +static int32_t bcmpkt_l2_t_macda_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_l2_t_macda_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_l2_t_macsa_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_l2_t_macsa_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_l2_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_L2_T_FID_COUNT] = { + bcmpkt_l2_t_macda_get, + bcmpkt_l2_t_macsa_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_l2_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_L2_T_FID_COUNT] = { + bcmpkt_l2_t_macda_set, + bcmpkt_l2_t_macsa_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_l2_t_field_data[] = { + BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_l2_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_L2_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_32_2_0_l2_t_field_data, +}; + + +static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_mirror_erspan_sn_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { + bcmpkt_mirror_erspan_sn_t_seq_num_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_mirror_erspan_sn_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { + bcmpkt_mirror_erspan_sn_t_seq_num_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_mirror_erspan_sn_t_field_data[] = { + BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_mirror_erspan_sn_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_32_2_0_mirror_erspan_sn_t_field_data, +}; + + +static int32_t bcmpkt_mirror_transport_t_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_mirror_transport_t_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_mirror_transport_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { + bcmpkt_mirror_transport_t_data_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_mirror_transport_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { + bcmpkt_mirror_transport_t_data_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_mirror_transport_t_field_data[] = { + BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_mirror_transport_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_32_2_0_mirror_transport_t_field_data, +}; + + +static int32_t bcmpkt_mpls_ach_t_channel_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_channel_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_cw_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 4); + + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_mpls_ach_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = { + bcmpkt_mpls_ach_t_channel_type_get, + bcmpkt_mpls_ach_t_cw_type_get, + bcmpkt_mpls_ach_t_reserved_get, + bcmpkt_mpls_ach_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_mpls_ach_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = { + bcmpkt_mpls_ach_t_channel_type_set, + bcmpkt_mpls_ach_t_cw_type_set, + bcmpkt_mpls_ach_t_reserved_set, + bcmpkt_mpls_ach_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_mpls_ach_t_field_data[] = { + BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_mpls_ach_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_ACH_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_32_2_0_mpls_ach_t_field_data, +}; + + +static int32_t bcmpkt_mpls_bv_t_value_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_mpls_bv_t_value_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_mpls_bv_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_BV_T_FID_COUNT] = { + bcmpkt_mpls_bv_t_value_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_mpls_bv_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_BV_T_FID_COUNT] = { + bcmpkt_mpls_bv_t_value_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_mpls_bv_t_field_data[] = { + BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_mpls_bv_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_BV_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_32_2_0_mpls_bv_t_field_data, +}; + + +static int32_t bcmpkt_mpls_cw_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_cw_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 12); + + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 12, val); + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_seq_number_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_seq_number_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_mpls_cw_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_CW_T_FID_COUNT] = { + bcmpkt_mpls_cw_t_cw_type_get, + bcmpkt_mpls_cw_t_reserved_get, + bcmpkt_mpls_cw_t_seq_number_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_mpls_cw_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_CW_T_FID_COUNT] = { + bcmpkt_mpls_cw_t_cw_type_set, + bcmpkt_mpls_cw_t_reserved_set, + bcmpkt_mpls_cw_t_seq_number_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_mpls_cw_t_field_data[] = { + BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_mpls_cw_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_CW_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_32_2_0_mpls_cw_t_field_data, +}; + + +static int32_t bcmpkt_mpls_t_bos_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 1); + + return ret; +} + +static int32_t bcmpkt_mpls_t_bos_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 1, val); + return ret; +} + +static int32_t bcmpkt_mpls_t_exp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 9, 3); + + return ret; +} + +static int32_t bcmpkt_mpls_t_exp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 9, 3, val); + return ret; +} + +static int32_t bcmpkt_mpls_t_label_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 20); + + return ret; +} + +static int32_t bcmpkt_mpls_t_label_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 20, val); + return ret; +} + +static int32_t bcmpkt_mpls_t_ttl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_mpls_t_ttl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_mpls_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_T_FID_COUNT] = { + bcmpkt_mpls_t_bos_get, + bcmpkt_mpls_t_exp_get, + bcmpkt_mpls_t_label_get, + bcmpkt_mpls_t_ttl_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_mpls_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_T_FID_COUNT] = { + bcmpkt_mpls_t_bos_set, + bcmpkt_mpls_t_exp_set, + bcmpkt_mpls_t_label_set, + bcmpkt_mpls_t_ttl_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_mpls_t_field_data[] = { + BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_mpls_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_MPLS_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_32_2_0_mpls_t_field_data, +}; + + +static int32_t bcmpkt_p_1588_t_cntrl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[8], 24, 8); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_cntrl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[8], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_correction_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_correction_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_domain_nb_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_domain_nb_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_logmsginterval_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[8], 16, 8); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_logmsginterval_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[8], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_msg_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_msg_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_msg_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 4); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_msg_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 4, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 4); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved3_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved3_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_seq_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[7], 0, 16); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_seq_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[7], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_srcportid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_srcportid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_transportspec_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_transportspec_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 4); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_p_1588_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_FID_COUNT] = { + bcmpkt_p_1588_t_cntrl_get, + bcmpkt_p_1588_t_correction_get, + bcmpkt_p_1588_t_domain_nb_get, + bcmpkt_p_1588_t_flags_get, + bcmpkt_p_1588_t_logmsginterval_get, + bcmpkt_p_1588_t_msg_length_get, + bcmpkt_p_1588_t_msg_type_get, + bcmpkt_p_1588_t_reserved1_get, + bcmpkt_p_1588_t_reserved2_get, + bcmpkt_p_1588_t_reserved3_get, + bcmpkt_p_1588_t_seq_id_get, + bcmpkt_p_1588_t_srcportid_get, + bcmpkt_p_1588_t_transportspec_get, + bcmpkt_p_1588_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_p_1588_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_FID_COUNT] = { + bcmpkt_p_1588_t_cntrl_set, + bcmpkt_p_1588_t_correction_set, + bcmpkt_p_1588_t_domain_nb_set, + bcmpkt_p_1588_t_flags_set, + bcmpkt_p_1588_t_logmsginterval_set, + bcmpkt_p_1588_t_msg_length_set, + bcmpkt_p_1588_t_msg_type_set, + bcmpkt_p_1588_t_reserved1_set, + bcmpkt_p_1588_t_reserved2_set, + bcmpkt_p_1588_t_reserved3_set, + bcmpkt_p_1588_t_seq_id_set, + bcmpkt_p_1588_t_srcportid_set, + bcmpkt_p_1588_t_transportspec_set, + bcmpkt_p_1588_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_p_1588_t_field_data[] = { + BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_p_1588_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_P_1588_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_32_2_0_p_1588_t_field_data, +}; + + +static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_option_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_option_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_prog_ext_hdr_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = { + bcmpkt_prog_ext_hdr_t_hdr_ext_len_get, + bcmpkt_prog_ext_hdr_t_next_header_get, + bcmpkt_prog_ext_hdr_t_option_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_prog_ext_hdr_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = { + bcmpkt_prog_ext_hdr_t_hdr_ext_len_set, + bcmpkt_prog_ext_hdr_t_next_header_set, + bcmpkt_prog_ext_hdr_t_option_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_prog_ext_hdr_t_field_data[] = { + BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_prog_ext_hdr_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_32_2_0_prog_ext_hdr_t_field_data, +}; + + +static int32_t bcmpkt_psamp_0_t_flowset_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_flowset_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_0_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_0_t_next_hop_index_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_next_hop_index_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_psamp_0_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_0_T_FID_COUNT] = { + bcmpkt_psamp_0_t_flowset_get, + bcmpkt_psamp_0_t_length_get, + bcmpkt_psamp_0_t_next_hop_index_get, + bcmpkt_psamp_0_t_obs_time_ns_get, + bcmpkt_psamp_0_t_obs_time_s_get, + bcmpkt_psamp_0_t_template_id_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_psamp_0_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_0_T_FID_COUNT] = { + bcmpkt_psamp_0_t_flowset_set, + bcmpkt_psamp_0_t_length_set, + bcmpkt_psamp_0_t_next_hop_index_set, + bcmpkt_psamp_0_t_obs_time_ns_set, + bcmpkt_psamp_0_t_obs_time_s_set, + bcmpkt_psamp_0_t_template_id_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_psamp_0_t_field_data[] = { + BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_psamp_0_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_0_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_32_2_0_psamp_0_t_field_data, +}; + + +static int32_t bcmpkt_psamp_1_t_dlb_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 24, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_dlb_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_egress_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_egress_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_epoch_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_epoch_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_variable_flag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_variable_flag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_psamp_1_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T_FID_COUNT] = { + bcmpkt_psamp_1_t_dlb_id_get, + bcmpkt_psamp_1_t_egress_port_get, + bcmpkt_psamp_1_t_epoch_get, + bcmpkt_psamp_1_t_ingress_port_get, + bcmpkt_psamp_1_t_sampled_length_get, + bcmpkt_psamp_1_t_user_meta_data_get, + bcmpkt_psamp_1_t_variable_flag_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_psamp_1_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T_FID_COUNT] = { + bcmpkt_psamp_1_t_dlb_id_set, + bcmpkt_psamp_1_t_egress_port_set, + bcmpkt_psamp_1_t_epoch_set, + bcmpkt_psamp_1_t_ingress_port_set, + bcmpkt_psamp_1_t_sampled_length_set, + bcmpkt_psamp_1_t_user_meta_data_set, + bcmpkt_psamp_1_t_variable_flag_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_psamp_1_t_field_data[] = { + BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_psamp_1_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_1_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_32_2_0_psamp_1_t_field_data, +}; + + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[4], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[4], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[4], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[4], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_psamp_mirror_on_drop_0_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get, + bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get, + bcmpkt_psamp_mirror_on_drop_0_t_length_get, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get, + bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get, + bcmpkt_psamp_mirror_on_drop_0_t_template_id_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_psamp_mirror_on_drop_0_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set, + bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set, + bcmpkt_psamp_mirror_on_drop_0_t_length_set, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set, + bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set, + bcmpkt_psamp_mirror_on_drop_0_t_template_id_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_psamp_mirror_on_drop_0_t_field_data[] = { + BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_psamp_mirror_on_drop_0_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_32_2_0_psamp_mirror_on_drop_0_t_field_data, +}; + + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_mod_state_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 22, 2); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_mod_state_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 22, 2, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 6); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 6, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_psamp_mirror_on_drop_3_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get, + bcmpkt_psamp_mirror_on_drop_3_t_mod_state_get, + bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get, + bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get, + bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get, + bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get, + bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_psamp_mirror_on_drop_3_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set, + bcmpkt_psamp_mirror_on_drop_3_t_mod_state_set, + bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set, + bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set, + bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set, + bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set, + bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_psamp_mirror_on_drop_3_t_field_data[] = { + BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_psamp_mirror_on_drop_3_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_32_2_0_psamp_mirror_on_drop_3_t_field_data, +}; + + +static int32_t bcmpkt_rarp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_rarp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_rarp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_operation_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_rarp_t_operation_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_rarp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_rarp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_rarp_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_FID_COUNT] = { + bcmpkt_rarp_t_hardware_len_get, + bcmpkt_rarp_t_hardware_type_get, + bcmpkt_rarp_t_operation_get, + bcmpkt_rarp_t_prot_addr_len_get, + bcmpkt_rarp_t_protocol_type_get, + bcmpkt_rarp_t_sender_ha_get, + bcmpkt_rarp_t_sender_ip_get, + bcmpkt_rarp_t_target_ha_get, + bcmpkt_rarp_t_target_ip_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_rarp_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_FID_COUNT] = { + bcmpkt_rarp_t_hardware_len_set, + bcmpkt_rarp_t_hardware_type_set, + bcmpkt_rarp_t_operation_set, + bcmpkt_rarp_t_prot_addr_len_set, + bcmpkt_rarp_t_protocol_type_set, + bcmpkt_rarp_t_sender_ha_set, + bcmpkt_rarp_t_sender_ip_set, + bcmpkt_rarp_t_target_ha_set, + bcmpkt_rarp_t_target_ip_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_rarp_t_field_data[] = { + BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_rarp_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RARP_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_32_2_0_rarp_t_field_data, +}; + + +static int32_t bcmpkt_routing_t_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_routing_t_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_routing_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_routing_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_routing_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_routing_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_routing_t_routing_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_routing_t_routing_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_routing_t_segments_left_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_routing_t_segments_left_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_routing_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ROUTING_T_FID_COUNT] = { + bcmpkt_routing_t_data_get, + bcmpkt_routing_t_hdr_ext_len_get, + bcmpkt_routing_t_next_header_get, + bcmpkt_routing_t_routing_type_get, + bcmpkt_routing_t_segments_left_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_routing_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ROUTING_T_FID_COUNT] = { + bcmpkt_routing_t_data_set, + bcmpkt_routing_t_hdr_ext_len_set, + bcmpkt_routing_t_next_header_set, + bcmpkt_routing_t_routing_type_set, + bcmpkt_routing_t_segments_left_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_routing_t_field_data[] = { + BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_routing_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_ROUTING_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_32_2_0_routing_t_field_data, +}; + + +static int32_t bcmpkt_rspan_t_tag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_rspan_t_tag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_rspan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_rspan_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_rspan_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RSPAN_T_FID_COUNT] = { + bcmpkt_rspan_t_tag_get, + bcmpkt_rspan_t_tpid_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_rspan_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RSPAN_T_FID_COUNT] = { + bcmpkt_rspan_t_tag_set, + bcmpkt_rspan_t_tpid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_rspan_t_field_data[] = { + BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_rspan_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_RSPAN_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_32_2_0_rspan_t_field_data, +}; + + +static int32_t bcmpkt_sflow_shim_0_t_sys_destination_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_sys_destination_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_sys_source_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_sys_source_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_sflow_shim_0_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { + bcmpkt_sflow_shim_0_t_sys_destination_get, + bcmpkt_sflow_shim_0_t_sys_source_get, + bcmpkt_sflow_shim_0_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_sflow_shim_0_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { + bcmpkt_sflow_shim_0_t_sys_destination_set, + bcmpkt_sflow_shim_0_t_sys_source_set, + bcmpkt_sflow_shim_0_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_sflow_shim_0_t_field_data[] = { + BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_sflow_shim_0_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_32_2_0_sflow_shim_0_t_field_data, +}; + + +static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 30, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 30, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 27, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 27, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 29, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 29, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 31, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 31, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 26, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 26, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 7); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 7, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 23, 3); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 23, 3, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_sflow_shim_1_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { + bcmpkt_sflow_shim_1_t_flag_dest_sample_get, + bcmpkt_sflow_shim_1_t_flag_discarded_get, + bcmpkt_sflow_shim_1_t_flag_flex_sample_get, + bcmpkt_sflow_shim_1_t_flag_mcast_get, + bcmpkt_sflow_shim_1_t_flag_src_sample_get, + bcmpkt_sflow_shim_1_t_flag_truncated_get, + bcmpkt_sflow_shim_1_t_reserved_get, + bcmpkt_sflow_shim_1_t_sys_opcode_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_sflow_shim_1_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { + bcmpkt_sflow_shim_1_t_flag_dest_sample_set, + bcmpkt_sflow_shim_1_t_flag_discarded_set, + bcmpkt_sflow_shim_1_t_flag_flex_sample_set, + bcmpkt_sflow_shim_1_t_flag_mcast_set, + bcmpkt_sflow_shim_1_t_flag_src_sample_set, + bcmpkt_sflow_shim_1_t_flag_truncated_set, + bcmpkt_sflow_shim_1_t_reserved_set, + bcmpkt_sflow_shim_1_t_sys_opcode_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_sflow_shim_1_t_field_data[] = { + BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_sflow_shim_1_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_32_2_0_sflow_shim_1_t_field_data, +}; + + +static int32_t bcmpkt_sflow_shim_2_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_sflow_shim_2_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_sflow_shim_2_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { + bcmpkt_sflow_shim_2_t_sequence_num_get, + bcmpkt_sflow_shim_2_t_user_meta_data_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_sflow_shim_2_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { + bcmpkt_sflow_shim_2_t_sequence_num_set, + bcmpkt_sflow_shim_2_t_user_meta_data_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_sflow_shim_2_t_field_data[] = { + BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_sflow_shim_2_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_32_2_0_sflow_shim_2_t_field_data, +}; + + +static int32_t bcmpkt_snap_llc_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_snap_llc_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_snap_llc_t_snap_llc_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_snap_llc_t_snap_llc_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_snap_llc_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = { + bcmpkt_snap_llc_t_length_get, + bcmpkt_snap_llc_t_snap_llc_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_snap_llc_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = { + bcmpkt_snap_llc_t_length_set, + bcmpkt_snap_llc_t_snap_llc_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_snap_llc_t_field_data[] = { + BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_snap_llc_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_SNAP_LLC_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_32_2_0_snap_llc_t_field_data, +}; + + +static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_first_4bytes_t_src_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_first_4bytes_t_src_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_tcp_first_4bytes_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { + bcmpkt_tcp_first_4bytes_t_dst_port_get, + bcmpkt_tcp_first_4bytes_t_src_port_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_tcp_first_4bytes_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { + bcmpkt_tcp_first_4bytes_t_dst_port_set, + bcmpkt_tcp_first_4bytes_t_src_port_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_tcp_first_4bytes_t_field_data[] = { + BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_tcp_first_4bytes_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_32_2_0_tcp_first_4bytes_t_field_data, +}; + + +static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_win_size_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_win_size_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_tcp_last_16bytes_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { + bcmpkt_tcp_last_16bytes_t_ack_num_get, + bcmpkt_tcp_last_16bytes_t_checksum_get, + bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get, + bcmpkt_tcp_last_16bytes_t_seq_num_get, + bcmpkt_tcp_last_16bytes_t_urgent_ptr_get, + bcmpkt_tcp_last_16bytes_t_win_size_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_tcp_last_16bytes_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { + bcmpkt_tcp_last_16bytes_t_ack_num_set, + bcmpkt_tcp_last_16bytes_t_checksum_set, + bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set, + bcmpkt_tcp_last_16bytes_t_seq_num_set, + bcmpkt_tcp_last_16bytes_t_urgent_ptr_set, + bcmpkt_tcp_last_16bytes_t_win_size_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_tcp_last_16bytes_t_field_data[] = { + BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_tcp_last_16bytes_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_32_2_0_tcp_last_16bytes_t_field_data, +}; + + +static int32_t bcmpkt_udp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_udp_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_dst_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_udp_t_src_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_src_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_udp_t_udp_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_udp_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_udp_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UDP_T_FID_COUNT] = { + bcmpkt_udp_t_checksum_get, + bcmpkt_udp_t_dst_port_get, + bcmpkt_udp_t_src_port_get, + bcmpkt_udp_t_udp_length_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_udp_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UDP_T_FID_COUNT] = { + bcmpkt_udp_t_checksum_set, + bcmpkt_udp_t_dst_port_set, + bcmpkt_udp_t_src_port_set, + bcmpkt_udp_t_udp_length_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_udp_t_field_data[] = { + BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_udp_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UDP_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_32_2_0_udp_t_field_data, +}; + + +static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_unknown_l3_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { + bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get, + bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_unknown_l3_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { + bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set, + bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_unknown_l3_t_field_data[] = { + BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_unknown_l3_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_32_2_0_unknown_l3_t_field_data, +}; + + +static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_unknown_l4_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { + bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_unknown_l4_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { + bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_unknown_l4_t_field_data[] = { + BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_unknown_l4_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_32_2_0_unknown_l4_t_field_data, +}; + + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_unknown_l5_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { + bcmpkt_unknown_l5_t_l5_bytes_0_1_get, + bcmpkt_unknown_l5_t_l5_bytes_2_3_get, + bcmpkt_unknown_l5_t_l5_bytes_4_7_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_unknown_l5_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { + bcmpkt_unknown_l5_t_l5_bytes_0_1_set, + bcmpkt_unknown_l5_t_l5_bytes_2_3_set, + bcmpkt_unknown_l5_t_l5_bytes_4_7_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_unknown_l5_t_field_data[] = { + BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_unknown_l5_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_32_2_0_unknown_l5_t_field_data, +}; + + +static int32_t bcmpkt_vlan_t_cfi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 1); + + return ret; +} + +static int32_t bcmpkt_vlan_t_cfi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 1, val); + return ret; +} + +static int32_t bcmpkt_vlan_t_pcp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 13, 3); + + return ret; +} + +static int32_t bcmpkt_vlan_t_pcp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 13, 3, val); + return ret; +} + +static int32_t bcmpkt_vlan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_vlan_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_vlan_t_vid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 12); + + return ret; +} + +static int32_t bcmpkt_vlan_t_vid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 12, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_vlan_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VLAN_T_FID_COUNT] = { + bcmpkt_vlan_t_cfi_get, + bcmpkt_vlan_t_pcp_get, + bcmpkt_vlan_t_tpid_get, + bcmpkt_vlan_t_vid_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_vlan_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VLAN_T_FID_COUNT] = { + bcmpkt_vlan_t_cfi_set, + bcmpkt_vlan_t_pcp_set, + bcmpkt_vlan_t_tpid_set, + bcmpkt_vlan_t_vid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_vlan_t_field_data[] = { + BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_vlan_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VLAN_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_32_2_0_vlan_t_field_data, +}; + + +static int32_t bcmpkt_vntag_t_tag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_vntag_t_tag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_vntag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_vntag_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_vntag_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VNTAG_T_FID_COUNT] = { + bcmpkt_vntag_t_tag_get, + bcmpkt_vntag_t_tpid_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_vntag_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VNTAG_T_FID_COUNT] = { + bcmpkt_vntag_t_tag_set, + bcmpkt_vntag_t_tpid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_vntag_t_field_data[] = { + BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_vntag_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VNTAG_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_32_2_0_vntag_t_field_data, +}; + + +static int32_t bcmpkt_vxlan_t_flags_reserved_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_vxlan_t_flags_reserved_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_vxlan_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 8); + + return ret; +} + +static int32_t bcmpkt_vxlan_t_reserved2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_vxlan_t_vn_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 8, 24); + + return ret; +} + +static int32_t bcmpkt_vxlan_t_vn_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 8, 24, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_vxlan_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VXLAN_T_FID_COUNT] = { + bcmpkt_vxlan_t_flags_reserved_1_get, + bcmpkt_vxlan_t_reserved2_get, + bcmpkt_vxlan_t_vn_id_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_vxlan_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VXLAN_T_FID_COUNT] = { + bcmpkt_vxlan_t_flags_reserved_1_set, + bcmpkt_vxlan_t_reserved2_set, + bcmpkt_vxlan_t_vn_id_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_vxlan_t_field_data[] = { + BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_vxlan_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_VXLAN_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_32_2_0_vxlan_t_field_data, +}; + + +static int32_t bcmpkt_wesp_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_wesp_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_wesp_t_header_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_wesp_t_header_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_wesp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_wesp_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_wesp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_spi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_spi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_trailer_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_wesp_t_trailer_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_wesp_t_wesp_iv_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_wesp_iv_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_32_2_0_wesp_t_fget[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T_FID_COUNT] = { + bcmpkt_wesp_t_flags_get, + bcmpkt_wesp_t_header_len_get, + bcmpkt_wesp_t_next_header_get, + bcmpkt_wesp_t_seq_num_get, + bcmpkt_wesp_t_spi_get, + bcmpkt_wesp_t_trailer_len_get, + bcmpkt_wesp_t_wesp_iv_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_32_2_0_wesp_t_fset[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T_FID_COUNT] = { + bcmpkt_wesp_t_flags_set, + bcmpkt_wesp_t_header_len_set, + bcmpkt_wesp_t_next_header_set, + bcmpkt_wesp_t_seq_num_set, + bcmpkt_wesp_t_spi_set, + bcmpkt_wesp_t_trailer_len_set, + bcmpkt_wesp_t_wesp_iv_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_32_2_0_wesp_t_field_data[] = { + BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_32_2_0_wesp_t_field_info = { + .num_fields = BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_WESP_T_FID_COUNT, + .info = bcm56880_a0_hna_6_5_32_2_0_wesp_t_field_data, +}; + +static bcmpkt_flex_pmd_info_t bcm56880_a0_hna_6_5_32_2_0_flexhdr_info_list[BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_FLEXHDR_COUNT] = { + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_32_2_0_arp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_32_2_0_arp_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_32_2_0_arp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_32_2_0_authen_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_32_2_0_authen_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_32_2_0_authen_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_32_2_0_bfd_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_32_2_0_bfd_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_32_2_0_bfd_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_32_2_0_cntag_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_32_2_0_cntag_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_32_2_0_cntag_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_32_2_0_cpu_composites_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_32_2_0_cpu_composites_0_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_32_2_0_cpu_composites_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_32_2_0_cpu_composites_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_32_2_0_cpu_composites_1_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_32_2_0_cpu_composites_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_32_2_0_dest_option_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_32_2_0_dest_option_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_32_2_0_dest_option_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_32_2_0_erspan3_fixed_hdr_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_32_2_0_erspan3_fixed_hdr_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_32_2_0_erspan3_fixed_hdr_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_32_2_0_erspan3_subhdr_5_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_32_2_0_erspan3_subhdr_5_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_32_2_0_erspan3_subhdr_5_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_32_2_0_esp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_32_2_0_esp_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_32_2_0_esp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_32_2_0_etag_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_32_2_0_etag_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_32_2_0_etag_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_32_2_0_ethertype_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_32_2_0_ethertype_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_32_2_0_ethertype_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_32_2_0_frag_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_32_2_0_frag_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_32_2_0_frag_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_32_2_0_generic_loopback_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_32_2_0_generic_loopback_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_32_2_0_generic_loopback_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_32_2_0_gpe_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_32_2_0_gpe_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_32_2_0_gpe_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_32_2_0_gre_chksum_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_32_2_0_gre_chksum_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_32_2_0_gre_chksum_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_32_2_0_gre_key_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_32_2_0_gre_key_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_32_2_0_gre_key_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_32_2_0_gre_rout_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_32_2_0_gre_rout_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_32_2_0_gre_rout_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_32_2_0_gre_seq_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_32_2_0_gre_seq_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_32_2_0_gre_seq_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_32_2_0_gre_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_32_2_0_gre_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_32_2_0_gre_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_32_2_0_hop_by_hop_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_32_2_0_hop_by_hop_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_32_2_0_hop_by_hop_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_32_2_0_icmp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_32_2_0_icmp_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_32_2_0_icmp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_32_2_0_ifa_flex_md_0_a_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_32_2_0_ifa_flex_md_0_a_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_32_2_0_ifa_flex_md_0_a_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_32_2_0_ifa_flex_md_0_b_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_32_2_0_ifa_flex_md_0_b_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_32_2_0_ifa_flex_md_0_b_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_32_2_0_ifa_flex_md_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_32_2_0_ifa_flex_md_1_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_32_2_0_ifa_flex_md_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_32_2_0_ifa_flex_md_2_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_32_2_0_ifa_flex_md_2_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_32_2_0_ifa_flex_md_2_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_32_2_0_ifa_flex_md_3_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_32_2_0_ifa_flex_md_3_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_32_2_0_ifa_flex_md_3_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_32_2_0_ifa_header_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_32_2_0_ifa_header_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_32_2_0_ifa_header_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_32_2_0_ifa_md_base_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_32_2_0_ifa_md_base_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_32_2_0_ifa_md_base_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_32_2_0_ifa_metadata_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_32_2_0_ifa_metadata_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_32_2_0_ifa_metadata_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_32_2_0_igmp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_32_2_0_igmp_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_32_2_0_igmp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_32_2_0_ipfix_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_32_2_0_ipfix_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_32_2_0_ipfix_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_32_2_0_ipv4_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_32_2_0_ipv4_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_32_2_0_ipv4_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_32_2_0_ipv6_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_32_2_0_ipv6_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_32_2_0_ipv6_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_32_2_0_l2_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_32_2_0_l2_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_32_2_0_l2_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_32_2_0_mirror_erspan_sn_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_32_2_0_mirror_erspan_sn_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_32_2_0_mirror_erspan_sn_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_32_2_0_mirror_transport_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_32_2_0_mirror_transport_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_32_2_0_mirror_transport_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_32_2_0_mpls_ach_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_32_2_0_mpls_ach_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_32_2_0_mpls_ach_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_32_2_0_mpls_bv_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_32_2_0_mpls_bv_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_32_2_0_mpls_bv_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_32_2_0_mpls_cw_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_32_2_0_mpls_cw_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_32_2_0_mpls_cw_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_32_2_0_mpls_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_32_2_0_mpls_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_32_2_0_mpls_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_32_2_0_p_1588_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_32_2_0_p_1588_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_32_2_0_p_1588_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_32_2_0_prog_ext_hdr_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_32_2_0_prog_ext_hdr_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_32_2_0_prog_ext_hdr_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_32_2_0_psamp_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_32_2_0_psamp_0_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_32_2_0_psamp_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_32_2_0_psamp_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_32_2_0_psamp_1_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_32_2_0_psamp_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_32_2_0_psamp_mirror_on_drop_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_32_2_0_psamp_mirror_on_drop_0_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_32_2_0_psamp_mirror_on_drop_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_32_2_0_psamp_mirror_on_drop_3_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_32_2_0_psamp_mirror_on_drop_3_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_32_2_0_psamp_mirror_on_drop_3_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_32_2_0_rarp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_32_2_0_rarp_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_32_2_0_rarp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_32_2_0_routing_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_32_2_0_routing_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_32_2_0_routing_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_32_2_0_rspan_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_32_2_0_rspan_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_32_2_0_rspan_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_32_2_0_sflow_shim_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_32_2_0_sflow_shim_0_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_32_2_0_sflow_shim_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_32_2_0_sflow_shim_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_32_2_0_sflow_shim_1_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_32_2_0_sflow_shim_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_32_2_0_sflow_shim_2_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_32_2_0_sflow_shim_2_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_32_2_0_sflow_shim_2_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_32_2_0_snap_llc_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_32_2_0_snap_llc_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_32_2_0_snap_llc_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_32_2_0_tcp_first_4bytes_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_32_2_0_tcp_first_4bytes_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_32_2_0_tcp_first_4bytes_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_32_2_0_tcp_last_16bytes_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_32_2_0_tcp_last_16bytes_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_32_2_0_tcp_last_16bytes_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_32_2_0_udp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_32_2_0_udp_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_32_2_0_udp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_32_2_0_unknown_l3_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_32_2_0_unknown_l3_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_32_2_0_unknown_l3_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_32_2_0_unknown_l4_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_32_2_0_unknown_l4_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_32_2_0_unknown_l4_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_32_2_0_unknown_l5_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_32_2_0_unknown_l5_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_32_2_0_unknown_l5_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_32_2_0_vlan_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_32_2_0_vlan_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_32_2_0_vlan_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_32_2_0_vntag_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_32_2_0_vntag_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_32_2_0_vntag_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_32_2_0_vxlan_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_32_2_0_vxlan_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_32_2_0_vxlan_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_32_2_0_wesp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_hna_6_5_32_2_0_wesp_t_fget, + .flex_fset = bcm56880_a0_hna_6_5_32_2_0_wesp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_hna_6_5_32_2_0_rxpmd_flex_field_info, + .reasons_info = &bcm56880_a0_hna_6_5_32_2_0_rxpmd_flex_reasons_info, + .flex_common_fget = bcm56880_a0_rxpmd_flex_fget, + .flex_common_fset = bcm56880_a0_rxpmd_flex_fset, + }, +}; + +static shr_enum_map_t bcm56880_a0_hna_6_5_32_2_0_flexhdr_id_map[] = { + BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_FLEXHDR_NAME_MAP_INIT +}; + +shr_enum_map_t * bcm56880_a0_hna_6_5_32_2_0_flexhdr_map_get(void) +{ + return bcm56880_a0_hna_6_5_32_2_0_flexhdr_id_map; +} + +bcmpkt_flex_pmd_info_t * bcm56880_a0_hna_6_5_32_2_0_flex_pmd_info_get(uint32_t hid) +{ + if (hid >= BCM56880_A0_HNA_6_5_32_2_0_BCMPKT_FLEXHDR_COUNT) { + return NULL; + } + + return &bcm56880_a0_hna_6_5_32_2_0_flexhdr_info_list[hid]; +} + +int bcm56880_a0_hna_6_5_32_2_0_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = { + 13, + -1, + -1, + 64, +}; diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_32_1_0/bcm56880_a0_nfa_6_5_32_1_0_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_32_1_0/bcm56880_a0_nfa_6_5_32_1_0_bcmpkt_rxpmd_match_id.c new file mode 100644 index 00000000000..d14f3c9e60a --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_32_1_0/bcm56880_a0_nfa_6_5_32_1_0_bcmpkt_rxpmd_match_id.c @@ -0,0 +1,2634 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) bcm56880_a0_nfa_6_5_32_1_0_sf_match_id_info.yml + * for device bcm56880_a0 and variant nfa_6_5_32_1_0. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + + +#include +#include + + +static bcmpkt_rxpmd_match_id_db_t +bcm56880_a0_nfa_6_5_32_1_0_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_COUNT] = { + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_ETAG", + .match = 0x80, + .match_mask = 0xc0, + .match_maxbit = 30, + .match_minbit = 23, + .maxbit = 7, + .minbit = 6, + .value = 0x2, + .pmaxbit = 42, + .pminbit = 35, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_ITAG", + .match = 0x10, + .match_mask = 0x10, + .match_maxbit = 30, + .match_minbit = 23, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 42, + .pminbit = 35, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */ + .name = "EGRESS_PKT_FWD_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 30, + .match_minbit = 23, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 42, + .pminbit = 35, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */ + .name = "EGRESS_PKT_FWD_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0xff, + .match_maxbit = 30, + .match_minbit = 23, + .maxbit = 7, + .minbit = 0, + .value = 0x0, + .pmaxbit = 42, + .pminbit = 35, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OPAQUETAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_OPAQUETAG", + .match = 0x20, + .match_mask = 0x20, + .match_maxbit = 30, + .match_minbit = 23, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 42, + .pminbit = 35, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_OTAG", + .match = 0x8, + .match_mask = 0x8, + .match_maxbit = 30, + .match_minbit = 23, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 42, + .pminbit = 35, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_RSPAN */ + .name = "EGRESS_PKT_FWD_L2_HDR_RSPAN", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 30, + .match_minbit = 23, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 42, + .pminbit = 35, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC */ + .name = "EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 30, + .match_minbit = 23, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 42, + .pminbit = 35, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_VNTAG", + .match = 0x40, + .match_mask = 0xc0, + .match_maxbit = 30, + .match_minbit = 23, + .maxbit = 7, + .minbit = 6, + .value = 0x1, + .pmaxbit = 42, + .pminbit = 35, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ARP", + .match = 0x8, + .match_mask = 0x58, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 4, + .minbit = 3, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", + .match = 0x180, + .match_mask = 0x1c0, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 8, + .minbit = 7, + .value = 0x3, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", + .match = 0x418, + .match_mask = 0x658, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_BFD", + .match = 0x3800, + .match_mask = 0x3800, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x7, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", + .match = 0x200, + .match_mask = 0x646, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", + .match = 0x98, + .match_mask = 0x1d8, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", + .match = 0x600, + .match_mask = 0x640, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 10, + .minbit = 9, + .value = 0x3, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GPE", + .match = 0x1006, + .match_mask = 0x3846, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x2, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE", + .match = 0x4, + .match_mask = 0x46, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 2, + .minbit = 1, + .value = 0x2, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", + .match = 0x204, + .match_mask = 0x646, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", + .match = 0x804, + .match_mask = 0x3846, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", + .match = 0x100, + .match_mask = 0x1c0, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 8, + .minbit = 7, + .value = 0x2, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", + .match = 0x24, + .match_mask = 0x66, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_12BYTE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GTP_12BYTE", + .match = 0x2800, + .match_mask = 0x3800, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x5, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_8BYTE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GTP_8BYTE", + .match = 0x2000, + .match_mask = 0x3800, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_EXT_4BYTE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GTP_EXT_4BYTE", + .match = 0x826, + .match_mask = 0x3866, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_WITH_EXT */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GTP_WITH_EXT", + .match = 0x26, + .match_mask = 0x66, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ICMP", + .match = 0x800, + .match_mask = 0x3826, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IGMP", + .match = 0x410, + .match_mask = 0x658, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV4", + .match = 0x10, + .match_mask = 0x58, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 4, + .minbit = 3, + .value = 0x2, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV6", + .match = 0x18, + .match_mask = 0x58, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 4, + .minbit = 3, + .value = 0x3, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", + .match = 0x40, + .match_mask = 0x40, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 6, + .minbit = 6, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", + .match = 0x42, + .match_mask = 0x42, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", + .match = 0x44, + .match_mask = 0x44, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", + .match = 0x48, + .match_mask = 0x48, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", + .match = 0x50, + .match_mask = 0x50, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", + .match = 0x60, + .match_mask = 0x60, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", + .match = 0xc0, + .match_mask = 0xc0, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 7, + .minbit = 7, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", + .match = 0x140, + .match_mask = 0x140, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 8, + .minbit = 8, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", + .match = 0x240, + .match_mask = 0x240, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 9, + .minbit = 9, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x3fff, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 0, + .value = 0x0, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_P_1588", + .match = 0x1800, + .match_mask = 0x3800, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_RARP", + .match = 0x2, + .match_mask = 0x46, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 2, + .minbit = 1, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x20, + .match_mask = 0x66, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x820, + .match_mask = 0x3866, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UDP", + .match = 0x6, + .match_mask = 0x46, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 2, + .minbit = 1, + .value = 0x3, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", + .match = 0x80, + .match_mask = 0x1d8, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", + .match = 0x1000, + .match_mask = 0x3806, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x2, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", + .match = 0x3000, + .match_mask = 0x3800, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x6, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", + .match = 0x806, + .match_mask = 0x3866, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 62, + .pminbit = 49, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */ + .name = "EGRESS_PKT_SYS_HDR_LOOPBACK", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 0, + .match_minbit = 0, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 0, + .pminbit = 0, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */ + .name = "EGRESS_PKT_SYS_HDR_NONE", + .match = 0x0, + .match_mask = 0x1, + .match_maxbit = 0, + .match_minbit = 0, + .maxbit = 0, + .minbit = 0, + .value = 0x0, + .pmaxbit = 0, + .pminbit = 0, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_ETAG", + .match = 0x80, + .match_mask = 0xc0, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 7, + .minbit = 6, + .value = 0x2, + .pmaxbit = 14, + .pminbit = 7, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_ITAG", + .match = 0x10, + .match_mask = 0x10, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 14, + .pminbit = 7, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 14, + .pminbit = 7, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0xff, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 7, + .minbit = 0, + .value = 0x0, + .pmaxbit = 14, + .pminbit = 7, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OPAQUETAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_OPAQUETAG", + .match = 0x20, + .match_mask = 0x20, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 14, + .pminbit = 7, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_OTAG", + .match = 0x8, + .match_mask = 0x8, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 14, + .pminbit = 7, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_RSPAN */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_RSPAN", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 14, + .pminbit = 7, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 14, + .pminbit = 7, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_VNTAG", + .match = 0x40, + .match_mask = 0xc0, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 7, + .minbit = 6, + .value = 0x1, + .pmaxbit = 14, + .pminbit = 7, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", + .match = 0x8, + .match_mask = 0x58, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 4, + .minbit = 3, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", + .match = 0x180, + .match_mask = 0x1c0, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 8, + .minbit = 7, + .value = 0x3, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", + .match = 0x418, + .match_mask = 0x658, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", + .match = 0x3800, + .match_mask = 0x3800, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x7, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", + .match = 0x200, + .match_mask = 0x646, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", + .match = 0x98, + .match_mask = 0x1d8, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", + .match = 0x600, + .match_mask = 0x640, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 10, + .minbit = 9, + .value = 0x3, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", + .match = 0x1006, + .match_mask = 0x3846, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x2, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", + .match = 0x4, + .match_mask = 0x46, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 2, + .minbit = 1, + .value = 0x2, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", + .match = 0x204, + .match_mask = 0x646, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", + .match = 0x804, + .match_mask = 0x3846, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", + .match = 0x100, + .match_mask = 0x1c0, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 8, + .minbit = 7, + .value = 0x2, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", + .match = 0x24, + .match_mask = 0x66, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_12BYTE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_12BYTE", + .match = 0x2800, + .match_mask = 0x3800, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x5, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_8BYTE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_8BYTE", + .match = 0x2000, + .match_mask = 0x3800, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_EXT_4BYTE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_EXT_4BYTE", + .match = 0x826, + .match_mask = 0x3866, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_WITH_EXT */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_WITH_EXT", + .match = 0x26, + .match_mask = 0x66, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", + .match = 0x800, + .match_mask = 0x3826, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", + .match = 0x410, + .match_mask = 0x658, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", + .match = 0x10, + .match_mask = 0x58, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 4, + .minbit = 3, + .value = 0x2, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", + .match = 0x18, + .match_mask = 0x58, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 4, + .minbit = 3, + .value = 0x3, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", + .match = 0x40, + .match_mask = 0x40, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 6, + .minbit = 6, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", + .match = 0x42, + .match_mask = 0x42, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", + .match = 0x44, + .match_mask = 0x44, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", + .match = 0x48, + .match_mask = 0x48, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", + .match = 0x50, + .match_mask = 0x50, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", + .match = 0x60, + .match_mask = 0x60, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", + .match = 0xc0, + .match_mask = 0xc0, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 7, + .minbit = 7, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", + .match = 0x140, + .match_mask = 0x140, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 8, + .minbit = 8, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", + .match = 0x240, + .match_mask = 0x240, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 9, + .minbit = 9, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x3fff, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 0, + .value = 0x0, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", + .match = 0x1800, + .match_mask = 0x3800, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", + .match = 0x2, + .match_mask = 0x46, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 2, + .minbit = 1, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x20, + .match_mask = 0x66, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x820, + .match_mask = 0x3866, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", + .match = 0x6, + .match_mask = 0x46, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 2, + .minbit = 1, + .value = 0x3, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", + .match = 0x80, + .match_mask = 0x1d8, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", + .match = 0x1000, + .match_mask = 0x3806, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x2, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", + .match = 0x3000, + .match_mask = 0x3800, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x6, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", + .match = 0x806, + .match_mask = 0x3866, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 34, + .pminbit = 21, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_ETAG", + .match = 0x80, + .match_mask = 0xc0, + .match_maxbit = 30, + .match_minbit = 23, + .maxbit = 7, + .minbit = 6, + .value = 0x2, + .pmaxbit = 30, + .pminbit = 23, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_ITAG", + .match = 0x10, + .match_mask = 0x10, + .match_maxbit = 30, + .match_minbit = 23, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 30, + .pminbit = 23, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */ + .name = "INGRESS_PKT_INNER_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 30, + .match_minbit = 23, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 30, + .pminbit = 23, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */ + .name = "INGRESS_PKT_INNER_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0xff, + .match_maxbit = 30, + .match_minbit = 23, + .maxbit = 7, + .minbit = 0, + .value = 0x0, + .pmaxbit = 30, + .pminbit = 23, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OPAQUETAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_OPAQUETAG", + .match = 0x20, + .match_mask = 0x20, + .match_maxbit = 30, + .match_minbit = 23, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 30, + .pminbit = 23, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_OTAG", + .match = 0x8, + .match_mask = 0x8, + .match_maxbit = 30, + .match_minbit = 23, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 30, + .pminbit = 23, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_RSPAN */ + .name = "INGRESS_PKT_INNER_L2_HDR_RSPAN", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 30, + .match_minbit = 23, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 30, + .pminbit = 23, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC */ + .name = "INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 30, + .match_minbit = 23, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 30, + .pminbit = 23, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_VNTAG", + .match = 0x40, + .match_mask = 0xc0, + .match_maxbit = 30, + .match_minbit = 23, + .maxbit = 7, + .minbit = 6, + .value = 0x1, + .pmaxbit = 30, + .pminbit = 23, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ARP", + .match = 0x8, + .match_mask = 0x58, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 4, + .minbit = 3, + .value = 0x1, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", + .match = 0x180, + .match_mask = 0x1c0, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 8, + .minbit = 7, + .value = 0x3, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", + .match = 0x418, + .match_mask = 0x658, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_BFD", + .match = 0x3800, + .match_mask = 0x3800, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x7, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", + .match = 0x200, + .match_mask = 0x646, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", + .match = 0x98, + .match_mask = 0x1d8, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", + .match = 0x600, + .match_mask = 0x640, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 10, + .minbit = 9, + .value = 0x3, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ICMP", + .match = 0x800, + .match_mask = 0x3826, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IGMP", + .match = 0x410, + .match_mask = 0x658, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV4", + .match = 0x10, + .match_mask = 0x58, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 4, + .minbit = 3, + .value = 0x2, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV6", + .match = 0x18, + .match_mask = 0x58, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 4, + .minbit = 3, + .value = 0x3, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x3fff, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 0, + .value = 0x0, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_P_1588", + .match = 0x1800, + .match_mask = 0x3800, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_RARP", + .match = 0x2, + .match_mask = 0x46, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 2, + .minbit = 1, + .value = 0x1, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x20, + .match_mask = 0x66, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x820, + .match_mask = 0x3866, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UDP", + .match = 0x6, + .match_mask = 0x46, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 2, + .minbit = 1, + .value = 0x3, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", + .match = 0x80, + .match_mask = 0x1d8, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", + .match = 0x1000, + .match_mask = 0x3806, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x2, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", + .match = 0x3000, + .match_mask = 0x3800, + .match_maxbit = 44, + .match_minbit = 31, + .maxbit = 13, + .minbit = 11, + .value = 0x6, + .pmaxbit = 44, + .pminbit = 31, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_ETAG", + .match = 0x80, + .match_mask = 0xc0, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 7, + .minbit = 6, + .value = 0x2, + .pmaxbit = 8, + .pminbit = 1, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_ITAG", + .match = 0x10, + .match_mask = 0x10, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 8, + .pminbit = 1, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */ + .name = "INGRESS_PKT_OUTER_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 8, + .pminbit = 1, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */ + .name = "INGRESS_PKT_OUTER_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0xff, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 7, + .minbit = 0, + .value = 0x0, + .pmaxbit = 8, + .pminbit = 1, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OPAQUETAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_OPAQUETAG", + .match = 0x20, + .match_mask = 0x20, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 8, + .pminbit = 1, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_OTAG", + .match = 0x8, + .match_mask = 0x8, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 8, + .pminbit = 1, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_RSPAN */ + .name = "INGRESS_PKT_OUTER_L2_HDR_RSPAN", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 8, + .pminbit = 1, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC */ + .name = "INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 8, + .pminbit = 1, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_VNTAG", + .match = 0x40, + .match_mask = 0xc0, + .match_maxbit = 8, + .match_minbit = 1, + .maxbit = 7, + .minbit = 6, + .value = 0x1, + .pmaxbit = 8, + .pminbit = 1, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ARP", + .match = 0x8, + .match_mask = 0x58, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 4, + .minbit = 3, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", + .match = 0x180, + .match_mask = 0x1c0, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 8, + .minbit = 7, + .value = 0x3, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", + .match = 0x418, + .match_mask = 0x658, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_BFD", + .match = 0x3800, + .match_mask = 0x3800, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x7, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", + .match = 0x200, + .match_mask = 0x646, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", + .match = 0x98, + .match_mask = 0x1d8, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", + .match = 0x600, + .match_mask = 0x640, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 10, + .minbit = 9, + .value = 0x3, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GPE", + .match = 0x1006, + .match_mask = 0x3846, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x2, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE", + .match = 0x4, + .match_mask = 0x46, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 2, + .minbit = 1, + .value = 0x2, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", + .match = 0x204, + .match_mask = 0x646, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 10, + .minbit = 9, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", + .match = 0x804, + .match_mask = 0x3846, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", + .match = 0x100, + .match_mask = 0x1c0, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 8, + .minbit = 7, + .value = 0x2, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", + .match = 0x24, + .match_mask = 0x66, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_12BYTE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GTP_12BYTE", + .match = 0x2800, + .match_mask = 0x3800, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x5, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_8BYTE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GTP_8BYTE", + .match = 0x2000, + .match_mask = 0x3800, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_EXT_4BYTE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GTP_EXT_4BYTE", + .match = 0x826, + .match_mask = 0x3866, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_WITH_EXT */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GTP_WITH_EXT", + .match = 0x26, + .match_mask = 0x66, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", + .match = 0x800, + .match_mask = 0x3826, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", + .match = 0x410, + .match_mask = 0x658, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 10, + .minbit = 9, + .value = 0x2, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", + .match = 0x10, + .match_mask = 0x58, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 4, + .minbit = 3, + .value = 0x2, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", + .match = 0x18, + .match_mask = 0x58, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 4, + .minbit = 3, + .value = 0x3, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", + .match = 0x40, + .match_mask = 0x40, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 6, + .minbit = 6, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", + .match = 0x42, + .match_mask = 0x42, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", + .match = 0x44, + .match_mask = 0x44, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", + .match = 0x48, + .match_mask = 0x48, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", + .match = 0x50, + .match_mask = 0x50, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", + .match = 0x60, + .match_mask = 0x60, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", + .match = 0xc0, + .match_mask = 0xc0, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 7, + .minbit = 7, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", + .match = 0x140, + .match_mask = 0x140, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 8, + .minbit = 8, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", + .match = 0x240, + .match_mask = 0x240, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 9, + .minbit = 9, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x3fff, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 0, + .value = 0x0, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", + .match = 0x1800, + .match_mask = 0x3800, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_RARP", + .match = 0x2, + .match_mask = 0x46, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 2, + .minbit = 1, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x20, + .match_mask = 0x66, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x820, + .match_mask = 0x3866, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UDP", + .match = 0x6, + .match_mask = 0x46, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 2, + .minbit = 1, + .value = 0x3, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", + .match = 0x80, + .match_mask = 0x1d8, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", + .match = 0x1000, + .match_mask = 0x3806, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x2, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", + .match = 0x3000, + .match_mask = 0x3800, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x6, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", + .match = 0x806, + .match_mask = 0x3866, + .match_maxbit = 22, + .match_minbit = 9, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 22, + .pminbit = 9, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */ + .name = "INGRESS_PKT_SYS_HDR_LOOPBACK", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 0, + .match_minbit = 0, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 0, + .pminbit = 0, + + }, + { + /* BCM56880_A0_NFA_6_5_32_1_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */ + .name = "INGRESS_PKT_SYS_HDR_NONE", + .match = 0x0, + .match_mask = 0x1, + .match_maxbit = 0, + .match_minbit = 0, + .maxbit = 0, + .minbit = 0, + .value = 0x0, + .pmaxbit = 0, + .pminbit = 0, + + }, +}; + +static bcmpkt_rxpmd_match_id_db_info_t bcm56880_a0_nfa_6_5_32_1_0_rxpmd_match_id_db_info = { + .num_entries = 184, + .db = bcm56880_a0_nfa_6_5_32_1_0_rxpmd_match_id_db +}; +bcmpkt_rxpmd_match_id_db_info_t * bcm56880_a0_nfa_6_5_32_1_0_rxpmd_match_id_db_info_get(void) { + return &bcm56880_a0_nfa_6_5_32_1_0_rxpmd_match_id_db_info; +} + +static shr_enum_map_t bcm56880_a0_nfa_6_5_32_1_0_rxpmd_match_id_map[] = { + BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_rxpmd_match_id_map_info_t bcm56880_a0_nfa_6_5_32_1_0_rxpmd_match_id_map_info = { + .num_entries = 184, + .map = bcm56880_a0_nfa_6_5_32_1_0_rxpmd_match_id_map +}; + +bcmpkt_rxpmd_match_id_map_info_t * bcm56880_a0_nfa_6_5_32_1_0_rxpmd_match_id_map_info_get(void) { + return &bcm56880_a0_nfa_6_5_32_1_0_rxpmd_match_id_map_info; +} diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_32_1_0/bcm56880_a0_nfa_6_5_32_1_0_pkt_flexhdr.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_32_1_0/bcm56880_a0_nfa_6_5_32_1_0_pkt_flexhdr.c new file mode 100644 index 00000000000..8e659033d18 --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_32_1_0/bcm56880_a0_nfa_6_5_32_1_0_pkt_flexhdr.c @@ -0,0 +1,7069 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) map.yml + * for device bcm56880_a0 and variant nfa_6_5_32_1_0. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#include +#include +#include +#include +#include +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) + +static void bcm56880_a0_nfa_6_5_32_1_0_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons) +{ + uint32_t *reason = data + 0; + + if (reason[12] & (0x1 << 0)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU); + } + if (reason[12] & (0x1 << 1)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS); + } + if (reason[12] & (0x1 << 2)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE); + } + if (reason[12] & (0x1 << 3)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD); + } + if (reason[12] & (0x1 << 4)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD); + } + if (reason[12] & (0x1 << 5)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED); + } + if (reason[12] & (0x1 << 6)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT); + } + if (reason[12] & (0x1 << 7)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED); + } + if (reason[12] & (0x1 << 8)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD); + } + if (reason[12] & (0x1 << 9)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS); + } + if (reason[12] & (0x1 << 10)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP); + } + if (reason[12] & (0x1 << 11)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS); + } + if (reason[12] & (0x1 << 12)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP); + } + if (reason[12] & (0x1 << 13)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR); + } + if (reason[12] & (0x1 << 14)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR); + } + if (reason[12] & (0x1 << 15)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED); + } + if (reason[12] & (0x1 << 16)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL); + } + if (reason[12] & (0x1 << 17)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_VFP); + } + if (reason[12] & (0x1 << 18)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_IFP); + } + if (reason[12] & (0x1 << 19)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER); + } + if (reason[12] & (0x1 << 20)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP); + } + if (reason[12] & (0x1 << 21)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_SVP); + } + if (reason[12] & (0x1 << 22)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT); + } + if (reason[12] & (0x1 << 23)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT); + } + if (reason[12] & (0x1 << 24)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED); + } + if (reason[12] & (0x1 << 25)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED); + } + if (reason[12] & (0x1 << 26)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP); + } + if (reason[12] & (0x1 << 27)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED); + } + if (reason[12] & (0x1 << 28)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF); + } + if (reason[12] & (0x1 << 29)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED); + } + if (reason[12] & (0x1 << 30)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED); + } + if (reason[12] & (0x1 << 31)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU); + } + if (reason[11] & (0x1 << 0)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0); + } + if (reason[11] & (0x1 << 1)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1); + } + if (reason[11] & (0x1 << 2)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2); + } + if (reason[11] & (0x1 << 3)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3); + } + if (reason[11] & (0x1 << 4)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4); + } + if (reason[11] & (0x1 << 5)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5); + } + if (reason[11] & (0x1 << 6)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6); + } + if (reason[11] & (0x1 << 7)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7); + } + if (reason[11] & (0x1 << 8)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_PE_VID_FWD_MISS); + } + if (reason[11] & (0x1 << 9)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_PE_VID_RPF_MISS); + } + if (reason[11] & (0x1 << 10)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_PE_RPF); + } + if (reason[11] & (0x1 << 11)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_PKT_ETAG_UNEXPECTED); + } + if (reason[11] & (0x1 << 12)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_PKT_ETAG_EXPECTED); + } + if (reason[11] & (0x1 << 15)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP); + } +} + +static void bcm56880_a0_nfa_6_5_32_1_0_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data) +{ + uint32_t *reason = data + 0; + + reason[12] = 0; + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) { + reason[12] |= (0x1 << 0); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) { + reason[12] |= (0x1 << 1); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) { + reason[12] |= (0x1 << 2); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD)) { + reason[12] |= (0x1 << 3); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD)) { + reason[12] |= (0x1 << 4); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) { + reason[12] |= (0x1 << 5); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) { + reason[12] |= (0x1 << 6); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED)) { + reason[12] |= (0x1 << 7); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD)) { + reason[12] |= (0x1 << 8); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) { + reason[12] |= (0x1 << 9); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) { + reason[12] |= (0x1 << 10); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) { + reason[12] |= (0x1 << 11); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) { + reason[12] |= (0x1 << 12); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) { + reason[12] |= (0x1 << 13); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) { + reason[12] |= (0x1 << 14); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED)) { + reason[12] |= (0x1 << 15); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) { + reason[12] |= (0x1 << 16); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_VFP)) { + reason[12] |= (0x1 << 17); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_IFP)) { + reason[12] |= (0x1 << 18); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) { + reason[12] |= (0x1 << 19); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP)) { + reason[12] |= (0x1 << 20); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_SVP)) { + reason[12] |= (0x1 << 21); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT)) { + reason[12] |= (0x1 << 22); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) { + reason[12] |= (0x1 << 23); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED)) { + reason[12] |= (0x1 << 24); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED)) { + reason[12] |= (0x1 << 25); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP)) { + reason[12] |= (0x1 << 26); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED)) { + reason[12] |= (0x1 << 27); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF)) { + reason[12] |= (0x1 << 28); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED)) { + reason[12] |= (0x1 << 29); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED)) { + reason[12] |= (0x1 << 30); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU)) { + reason[12] |= (0x1 << 31); + } + reason[11] = 0; + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0)) { + reason[11] |= (0x1 << 0); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1)) { + reason[11] |= (0x1 << 1); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2)) { + reason[11] |= (0x1 << 2); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3)) { + reason[11] |= (0x1 << 3); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4)) { + reason[11] |= (0x1 << 4); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5)) { + reason[11] |= (0x1 << 5); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6)) { + reason[11] |= (0x1 << 6); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7)) { + reason[11] |= (0x1 << 7); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_PE_VID_FWD_MISS)) { + reason[11] |= (0x1 << 8); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_PE_VID_RPF_MISS)) { + reason[11] |= (0x1 << 9); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_PE_RPF)) { + reason[11] |= (0x1 << 10); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_PKT_ETAG_UNEXPECTED)) { + reason[11] |= (0x1 << 11); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_PKT_ETAG_EXPECTED)) { + reason[11] |= (0x1 << 12); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) { + reason[11] |= (0x1 << 15); + } +} + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_rxpmd_flex_field_data[] = { + { + .name = "DLB_ECMP_DESTINATION_15_0", + .fid = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 144, 159 }, /* Profile 2. */ + { 128, 143 }, /* Profile 3. */ + }, + .profile_cnt = 4, + }, + { + .name = "DROP_CODE_15_0", + .fid = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 48, 63 }, /* Profile 2. */ + { 48, 63 }, /* Profile 3. */ + { 48, 63 }, /* Profile 4. */ + { 48, 63 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "DVP_15_0", + .fid = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_DVP_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 240, 255 }, /* Profile 2. */ + { 240, 255 }, /* Profile 3. */ + { 240, 255 }, /* Profile 4. */ + { 240, 255 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "EFFECTIVE_TTL_7_0", + .fid = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 160, 167 }, /* Profile 2. */ + { 144, 151 }, /* Profile 3. */ + { 160, 167 }, /* Profile 4. */ + { 144, 151 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "ENTROPY_LABEL_LOW_15_0", + .fid = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 304, 319 }, /* Profile 2. */ + { 304, 319 }, /* Profile 3. */ + { 304, 319 }, /* Profile 4. */ + { 304, 319 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "EVENT_TRACE_VECTOR_31_0", + .fid = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 0, 31 }, /* Profile 2. */ + { 0, 31 }, /* Profile 3. */ + { 0, 31 }, /* Profile 4. */ + { 0, 31 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "EVENT_TRACE_VECTOR_47_32", + .fid = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 32, 47 }, /* Profile 2. */ + { 32, 47 }, /* Profile 3. */ + { 32, 47 }, /* Profile 4. */ + { 32, 47 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "I2E_CLASS_ID_15_0", + .fid = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 288, 303 }, /* Profile 2. */ + { 288, 303 }, /* Profile 3. */ + { 288, 303 }, /* Profile 4. */ + { 288, 303 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "IFP_TS_CONTROL_ACTION_3_0", + .fid = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 376, 379 }, /* Profile 2. */ + { 376, 379 }, /* Profile 3. */ + { 376, 379 }, /* Profile 4. */ + { 376, 379 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "ING_ETAG_ACTION_3_0", + .fid = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_ING_ETAG_ACTION_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 372, 375 }, /* Profile 2. */ + { 372, 375 }, /* Profile 3. */ + { 372, 375 }, /* Profile 4. */ + { 372, 375 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "ING_ETAG_PCP_DEI_3_0", + .fid = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_ING_ETAG_PCP_DEI_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 368, 371 }, /* Profile 2. */ + { 368, 371 }, /* Profile 3. */ + { 368, 371 }, /* Profile 4. */ + { 368, 371 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "ING_ETAG_VID_16_15_0", + .fid = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_ING_ETAG_VID_16_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { 144, 159 }, /* Profile 4. */ + { 128, 143 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "ING_TIMESTAMP_31_0", + .fid = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 64, 95 }, /* Profile 2. */ + { 64, 95 }, /* Profile 3. */ + { 64, 95 }, /* Profile 4. */ + { 64, 95 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "INGRESS_PP_PORT_7_0", + .fid = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 256, 263 }, /* Profile 2. */ + { 256, 263 }, /* Profile 3. */ + { 256, 263 }, /* Profile 4. */ + { 256, 263 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0", + .fid = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 320, 335 }, /* Profile 2. */ + { 320, 335 }, /* Profile 3. */ + { 320, 335 }, /* Profile 4. */ + { 320, 335 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "INGRESS_QOS_REMARK_CTRL_3_0", + .fid = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 404, 407 }, /* Profile 2. */ + { 404, 407 }, /* Profile 3. */ + { 404, 407 }, /* Profile 4. */ + { 404, 407 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "INT_PRI_3_0", + .fid = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 384, 387 }, /* Profile 2. */ + { 384, 387 }, /* Profile 3. */ + { 384, 387 }, /* Profile 4. */ + { 384, 387 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "L2_IIF_10_0", + .fid = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 128, 138 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { 128, 138 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "L2_OIF_10_0", + .fid = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { 208, 218 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { 208, 218 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "L3_IIF_13_0", + .fid = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 352, 365 }, /* Profile 2. */ + { 352, 365 }, /* Profile 3. */ + { 352, 365 }, /* Profile 4. */ + { 352, 365 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "L3_OIF_1_13_0", + .fid = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 224, 237 }, /* Profile 2. */ + { 224, 237 }, /* Profile 3. */ + { 224, 237 }, /* Profile 4. */ + { 224, 237 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "MPLS_LABEL_DECAP_COUNT_3_0", + .fid = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_MPLS_LABEL_DECAP_COUNT_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 412, 415 }, /* Profile 2. */ + { 412, 415 }, /* Profile 3. */ + { 412, 415 }, /* Profile 4. */ + { 412, 415 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0", + .fid = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 336, 351 }, /* Profile 2. */ + { 336, 351 }, /* Profile 3. */ + { 336, 351 }, /* Profile 4. */ + { 336, 351 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "NHOP_INDEX_1_15_0", + .fid = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 176, 191 }, /* Profile 2. */ + { 160, 175 }, /* Profile 3. */ + { 176, 191 }, /* Profile 4. */ + { 160, 175 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "PARSER_VHLEN_0_15_0", + .fid = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 96, 111 }, /* Profile 2. */ + { 96, 111 }, /* Profile 3. */ + { 96, 111 }, /* Profile 4. */ + { 96, 111 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "PKT_MISC_CTRL_0_3_0", + .fid = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 408, 411 }, /* Profile 2. */ + { 408, 411 }, /* Profile 3. */ + { 408, 411 }, /* Profile 4. */ + { 408, 411 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "SVP_15_0", + .fid = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_SVP_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 192, 207 }, /* Profile 2. */ + { 176, 191 }, /* Profile 3. */ + { 192, 207 }, /* Profile 4. */ + { 176, 191 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "SVP_NETWORK_GROUP_BITMAP_3_0", + .fid = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 400, 403 }, /* Profile 2. */ + { 400, 403 }, /* Profile 3. */ + { 400, 403 }, /* Profile 4. */ + { 400, 403 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "SYSTEM_DESTINATION_15_0", + .fid = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 112, 127 }, /* Profile 2. */ + { 112, 127 }, /* Profile 3. */ + { 112, 127 }, /* Profile 4. */ + { 112, 127 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "SYSTEM_OPCODE_3_0", + .fid = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 396, 399 }, /* Profile 2. */ + { 396, 399 }, /* Profile 3. */ + { 396, 399 }, /* Profile 4. */ + { 396, 399 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "T_VLAN_TAG_VALUE_15_0", + .fid = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_T_VLAN_TAG_VALUE_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 272, 287 }, /* Profile 2. */ + { 272, 287 }, /* Profile 3. */ + { 272, 287 }, /* Profile 4. */ + { 272, 287 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "TIMESTAMP_CTRL_3_0", + .fid = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 380, 383 }, /* Profile 2. */ + { 380, 383 }, /* Profile 3. */ + { 380, 383 }, /* Profile 4. */ + { 380, 383 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "TUNNEL_PROCESSING_RESULTS_1_3_0", + .fid = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 392, 395 }, /* Profile 2. */ + { 392, 395 }, /* Profile 3. */ + { 392, 395 }, /* Profile 4. */ + { 392, 395 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "VFI_15_0", + .fid = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_VFI_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 208, 223 }, /* Profile 2. */ + { 192, 207 }, /* Profile 3. */ + { 208, 223 }, /* Profile 4. */ + { 192, 207 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, + { + .name = "VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0", + .fid = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 388, 391 }, /* Profile 2. */ + { 388, 391 }, /* Profile 3. */ + { 388, 391 }, /* Profile 4. */ + { 388, 391 }, /* Profile 5. */ + }, + .profile_cnt = 6, + }, +}; +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_rxpmd_flex_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_32_1_0_rxpmd_flex_field_data, + .profile_bmp_cnt = 1, + .profile_bmp[0] = 0x3c, + +}; + +static shr_enum_map_t bcm56880_a0_nfa_6_5_32_1_0_rxpmd_flex_reason_names[] = { + BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT +}; + +static bcmpkt_flex_reasons_info_t bcm56880_a0_nfa_6_5_32_1_0_rxpmd_flex_reasons_info = { + .num_reasons = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RXPMD_FLEX_REASON_COUNT, + .reason_names = bcm56880_a0_nfa_6_5_32_1_0_rxpmd_flex_reason_names, + .reason_encode = bcm56880_a0_nfa_6_5_32_1_0_rxpmd_flex_reason_encode, + .reason_decode = bcm56880_a0_nfa_6_5_32_1_0_rxpmd_flex_reason_decode, +}; + + +static int32_t bcmpkt_arp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_arp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_arp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_arp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_arp_t_operation_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_arp_t_operation_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_arp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_arp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_arp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_arp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_arp_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ARP_T_FID_COUNT] = { + bcmpkt_arp_t_hardware_len_get, + bcmpkt_arp_t_hardware_type_get, + bcmpkt_arp_t_operation_get, + bcmpkt_arp_t_prot_addr_len_get, + bcmpkt_arp_t_protocol_type_get, + bcmpkt_arp_t_sender_ha_get, + bcmpkt_arp_t_sender_ip_get, + bcmpkt_arp_t_target_ha_get, + bcmpkt_arp_t_target_ip_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_arp_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ARP_T_FID_COUNT] = { + bcmpkt_arp_t_hardware_len_set, + bcmpkt_arp_t_hardware_type_set, + bcmpkt_arp_t_operation_set, + bcmpkt_arp_t_prot_addr_len_set, + bcmpkt_arp_t_protocol_type_set, + bcmpkt_arp_t_sender_ha_set, + bcmpkt_arp_t_sender_ip_set, + bcmpkt_arp_t_target_ha_set, + bcmpkt_arp_t_target_ip_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_arp_t_field_data[] = { + BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_arp_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ARP_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_32_1_0_arp_t_field_data, +}; + + +static int32_t bcmpkt_authen_t_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_authen_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_authen_t_payload_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_authen_t_payload_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_authen_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_authen_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_authen_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_spi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_spi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_authen_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_AUTHEN_T_FID_COUNT] = { + bcmpkt_authen_t_data_get, + bcmpkt_authen_t_next_header_get, + bcmpkt_authen_t_payload_len_get, + bcmpkt_authen_t_reserved_get, + bcmpkt_authen_t_seq_num_get, + bcmpkt_authen_t_spi_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_authen_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_AUTHEN_T_FID_COUNT] = { + bcmpkt_authen_t_data_set, + bcmpkt_authen_t_next_header_set, + bcmpkt_authen_t_payload_len_set, + bcmpkt_authen_t_reserved_set, + bcmpkt_authen_t_seq_num_set, + bcmpkt_authen_t_spi_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_authen_t_field_data[] = { + BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_authen_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_AUTHEN_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_32_1_0_authen_t_field_data, +}; + + +static int32_t bcmpkt_bfd_t_desmintxintv_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_desmintxintv_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_minechorxintv_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_minechorxintv_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_reqminrxintv_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_reqminrxintv_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_ap_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 18, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_ap_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 18, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_bfd_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_bfd_t_bfd_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_cpi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 19, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_cpi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 19, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_dem_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 17, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_dem_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 17, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_detectmult_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_bfd_t_detectmult_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_diag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 5); + + return ret; +} + +static int32_t bcmpkt_bfd_t_diag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 5, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_fin_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_fin_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_mpt_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_mpt_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_mydiscrim_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_mydiscrim_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_poll_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 21, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_poll_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 21, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_sta_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 22, 2); + + return ret; +} + +static int32_t bcmpkt_bfd_t_sta_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 22, 2, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_urdiscrim_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_urdiscrim_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 29, 3); + + return ret; +} + +static int32_t bcmpkt_bfd_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 29, 3, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_bfd_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_BFD_T_FID_COUNT] = { + bcmpkt_bfd_t_ap_get, + bcmpkt_bfd_t_bfd_length_get, + bcmpkt_bfd_t_cpi_get, + bcmpkt_bfd_t_dem_get, + bcmpkt_bfd_t_desmintxintv_get, + bcmpkt_bfd_t_detectmult_get, + bcmpkt_bfd_t_diag_get, + bcmpkt_bfd_t_fin_get, + bcmpkt_bfd_t_minechorxintv_get, + bcmpkt_bfd_t_mpt_get, + bcmpkt_bfd_t_mydiscrim_get, + bcmpkt_bfd_t_poll_get, + bcmpkt_bfd_t_reqminrxintv_get, + bcmpkt_bfd_t_sta_get, + bcmpkt_bfd_t_urdiscrim_get, + bcmpkt_bfd_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_bfd_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_BFD_T_FID_COUNT] = { + bcmpkt_bfd_t_ap_set, + bcmpkt_bfd_t_bfd_length_set, + bcmpkt_bfd_t_cpi_set, + bcmpkt_bfd_t_dem_set, + bcmpkt_bfd_t_desmintxintv_set, + bcmpkt_bfd_t_detectmult_set, + bcmpkt_bfd_t_diag_set, + bcmpkt_bfd_t_fin_set, + bcmpkt_bfd_t_minechorxintv_set, + bcmpkt_bfd_t_mpt_set, + bcmpkt_bfd_t_mydiscrim_set, + bcmpkt_bfd_t_poll_set, + bcmpkt_bfd_t_reqminrxintv_set, + bcmpkt_bfd_t_sta_set, + bcmpkt_bfd_t_urdiscrim_set, + bcmpkt_bfd_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_bfd_t_field_data[] = { + BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_bfd_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_BFD_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_32_1_0_bfd_t_field_data, +}; + + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_cpu_composites_0_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { + bcmpkt_cpu_composites_0_t_dma_cont0_get, + bcmpkt_cpu_composites_0_t_dma_cont1_get, + bcmpkt_cpu_composites_0_t_dma_cont2_get, + bcmpkt_cpu_composites_0_t_dma_cont3_get, + bcmpkt_cpu_composites_0_t_dma_cont4_get, + bcmpkt_cpu_composites_0_t_dma_cont5_get, + bcmpkt_cpu_composites_0_t_dma_cont6_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_cpu_composites_0_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { + bcmpkt_cpu_composites_0_t_dma_cont0_set, + bcmpkt_cpu_composites_0_t_dma_cont1_set, + bcmpkt_cpu_composites_0_t_dma_cont2_set, + bcmpkt_cpu_composites_0_t_dma_cont3_set, + bcmpkt_cpu_composites_0_t_dma_cont4_set, + bcmpkt_cpu_composites_0_t_dma_cont5_set, + bcmpkt_cpu_composites_0_t_dma_cont6_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_cpu_composites_0_t_field_data[] = { + BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_cpu_composites_0_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_32_1_0_cpu_composites_0_t_field_data, +}; + + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_cpu_composites_1_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { + bcmpkt_cpu_composites_1_t_dma_cont10_get, + bcmpkt_cpu_composites_1_t_dma_cont11_get, + bcmpkt_cpu_composites_1_t_dma_cont12_get, + bcmpkt_cpu_composites_1_t_dma_cont13_get, + bcmpkt_cpu_composites_1_t_dma_cont14_get, + bcmpkt_cpu_composites_1_t_dma_cont15_get, + bcmpkt_cpu_composites_1_t_dma_cont16_get, + bcmpkt_cpu_composites_1_t_dma_cont17_get, + bcmpkt_cpu_composites_1_t_dma_cont7_get, + bcmpkt_cpu_composites_1_t_dma_cont8_get, + bcmpkt_cpu_composites_1_t_dma_cont9_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_cpu_composites_1_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { + bcmpkt_cpu_composites_1_t_dma_cont10_set, + bcmpkt_cpu_composites_1_t_dma_cont11_set, + bcmpkt_cpu_composites_1_t_dma_cont12_set, + bcmpkt_cpu_composites_1_t_dma_cont13_set, + bcmpkt_cpu_composites_1_t_dma_cont14_set, + bcmpkt_cpu_composites_1_t_dma_cont15_set, + bcmpkt_cpu_composites_1_t_dma_cont16_set, + bcmpkt_cpu_composites_1_t_dma_cont17_set, + bcmpkt_cpu_composites_1_t_dma_cont7_set, + bcmpkt_cpu_composites_1_t_dma_cont8_set, + bcmpkt_cpu_composites_1_t_dma_cont9_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_cpu_composites_1_t_field_data[] = { + BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_cpu_composites_1_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_32_1_0_cpu_composites_1_t_field_data, +}; + + +static int32_t bcmpkt_dest_option_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_dest_option_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_dest_option_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_dest_option_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_dest_option_t_option_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_dest_option_t_option_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_dest_option_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = { + bcmpkt_dest_option_t_hdr_ext_len_get, + bcmpkt_dest_option_t_next_header_get, + bcmpkt_dest_option_t_option_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_dest_option_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = { + bcmpkt_dest_option_t_hdr_ext_len_set, + bcmpkt_dest_option_t_next_header_set, + bcmpkt_dest_option_t_option_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_dest_option_t_field_data[] = { + BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_dest_option_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_DEST_OPTION_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_32_1_0_dest_option_t_field_data, +}; + + +static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 11, 2); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 11, 2, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 13, 3); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 13, 3, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 10); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 10, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_t_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 10, 1); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_t_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 10, 1, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 12); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 12, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_erspan3_fixed_hdr_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { + bcmpkt_erspan3_fixed_hdr_t_bso_get, + bcmpkt_erspan3_fixed_hdr_t_cos_get, + bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get, + bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get, + bcmpkt_erspan3_fixed_hdr_t_session_id_get, + bcmpkt_erspan3_fixed_hdr_t_t_get, + bcmpkt_erspan3_fixed_hdr_t_timestamp_get, + bcmpkt_erspan3_fixed_hdr_t_ver_get, + bcmpkt_erspan3_fixed_hdr_t_vlan_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_erspan3_fixed_hdr_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { + bcmpkt_erspan3_fixed_hdr_t_bso_set, + bcmpkt_erspan3_fixed_hdr_t_cos_set, + bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set, + bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set, + bcmpkt_erspan3_fixed_hdr_t_session_id_set, + bcmpkt_erspan3_fixed_hdr_t_t_set, + bcmpkt_erspan3_fixed_hdr_t_timestamp_set, + bcmpkt_erspan3_fixed_hdr_t_ver_set, + bcmpkt_erspan3_fixed_hdr_t_vlan_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_erspan3_fixed_hdr_t_field_data[] = { + BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_erspan3_fixed_hdr_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_32_1_0_erspan3_fixed_hdr_t_field_data, +}; + + +static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 26, 6); + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 26, 6, val); + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 10); + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 10, val); + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_erspan3_subhdr_5_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { + bcmpkt_erspan3_subhdr_5_t_platform_id_get, + bcmpkt_erspan3_subhdr_5_t_port_id_get, + bcmpkt_erspan3_subhdr_5_t_switch_id_get, + bcmpkt_erspan3_subhdr_5_t_timestamp_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_erspan3_subhdr_5_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { + bcmpkt_erspan3_subhdr_5_t_platform_id_set, + bcmpkt_erspan3_subhdr_5_t_port_id_set, + bcmpkt_erspan3_subhdr_5_t_switch_id_set, + bcmpkt_erspan3_subhdr_5_t_timestamp_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_erspan3_subhdr_5_t_field_data[] = { + BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_erspan3_subhdr_5_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_32_1_0_erspan3_subhdr_5_t_field_data, +}; + + +static int32_t bcmpkt_esp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 8); + + return ret; +} + +static int32_t bcmpkt_esp_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_esp_t_pad_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 8, 16); + + return ret; +} + +static int32_t bcmpkt_esp_t_pad_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 8, 16, val); + return ret; +} + +static int32_t bcmpkt_esp_t_pad_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 24, 8); + + return ret; +} + +static int32_t bcmpkt_esp_t_pad_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_esp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_esp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_esp_t_spi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_esp_t_spi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_esp_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ESP_T_FID_COUNT] = { + bcmpkt_esp_t_next_header_get, + bcmpkt_esp_t_pad_get, + bcmpkt_esp_t_pad_len_get, + bcmpkt_esp_t_seq_num_get, + bcmpkt_esp_t_spi_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_esp_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ESP_T_FID_COUNT] = { + bcmpkt_esp_t_next_header_set, + bcmpkt_esp_t_pad_set, + bcmpkt_esp_t_pad_len_set, + bcmpkt_esp_t_seq_num_set, + bcmpkt_esp_t_spi_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_esp_t_field_data[] = { + BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_esp_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ESP_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_32_1_0_esp_t_field_data, +}; + + +static int32_t bcmpkt_etag_t_pcp_dei_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 4); + + return ret; +} + +static int32_t bcmpkt_etag_t_pcp_dei_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 4, val); + return ret; +} + +static int32_t bcmpkt_etag_t_rsrvd0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 30, 2); + + return ret; +} + +static int32_t bcmpkt_etag_t_rsrvd0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 30, 2, val); + return ret; +} + +static int32_t bcmpkt_etag_t_rsrvd1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_etag_t_rsrvd1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_etag_t_svid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 12); + + return ret; +} + +static int32_t bcmpkt_etag_t_svid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 12, val); + return ret; +} + +static int32_t bcmpkt_etag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_etag_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_etag_t_vid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 14); + + return ret; +} + +static int32_t bcmpkt_etag_t_vid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 14, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_etag_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ETAG_T_FID_COUNT] = { + bcmpkt_etag_t_pcp_dei_get, + bcmpkt_etag_t_rsrvd0_get, + bcmpkt_etag_t_rsrvd1_get, + bcmpkt_etag_t_svid_get, + bcmpkt_etag_t_tpid_get, + bcmpkt_etag_t_vid_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_etag_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ETAG_T_FID_COUNT] = { + bcmpkt_etag_t_pcp_dei_set, + bcmpkt_etag_t_rsrvd0_set, + bcmpkt_etag_t_rsrvd1_set, + bcmpkt_etag_t_svid_set, + bcmpkt_etag_t_tpid_set, + bcmpkt_etag_t_vid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_etag_t_field_data[] = { + BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_etag_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ETAG_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_32_1_0_etag_t_field_data, +}; + + +static int32_t bcmpkt_ethertype_t_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ethertype_t_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_ethertype_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = { + bcmpkt_ethertype_t_type_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_ethertype_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = { + bcmpkt_ethertype_t_type_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_ethertype_t_field_data[] = { + BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_ethertype_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ETHERTYPE_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_32_1_0_ethertype_t_field_data, +}; + + +static int32_t bcmpkt_frag_t_frag_info_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_frag_t_frag_info_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_frag_t_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_frag_t_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_frag_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_frag_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_frag_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_frag_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_frag_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_FRAG_T_FID_COUNT] = { + bcmpkt_frag_t_frag_info_get, + bcmpkt_frag_t_id_get, + bcmpkt_frag_t_next_header_get, + bcmpkt_frag_t_reserved_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_frag_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_FRAG_T_FID_COUNT] = { + bcmpkt_frag_t_frag_info_set, + bcmpkt_frag_t_id_set, + bcmpkt_frag_t_next_header_set, + bcmpkt_frag_t_reserved_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_frag_t_field_data[] = { + BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_frag_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_FRAG_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_32_1_0_frag_t_field_data, +}; + + +static int32_t bcmpkt_generic_loopback_t_destination_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_destination_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_destination_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_destination_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_entropy_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_entropy_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_header_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_header_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_input_priority_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_input_priority_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_ctrl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 4, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_ctrl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 4, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 28, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_qos_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_qos_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_source_system_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_source_system_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_start_byte_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_start_byte_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_generic_loopback_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { + bcmpkt_generic_loopback_t_destination_obj_get, + bcmpkt_generic_loopback_t_destination_type_get, + bcmpkt_generic_loopback_t_entropy_obj_get, + bcmpkt_generic_loopback_t_flags_get, + bcmpkt_generic_loopback_t_header_type_get, + bcmpkt_generic_loopback_t_input_priority_get, + bcmpkt_generic_loopback_t_interface_ctrl_get, + bcmpkt_generic_loopback_t_interface_obj_get, + bcmpkt_generic_loopback_t_processing_ctrl_0_get, + bcmpkt_generic_loopback_t_processing_ctrl_1_get, + bcmpkt_generic_loopback_t_qos_obj_get, + bcmpkt_generic_loopback_t_reserved_1_get, + bcmpkt_generic_loopback_t_reserved_2_get, + bcmpkt_generic_loopback_t_source_system_port_get, + bcmpkt_generic_loopback_t_start_byte_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_generic_loopback_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { + bcmpkt_generic_loopback_t_destination_obj_set, + bcmpkt_generic_loopback_t_destination_type_set, + bcmpkt_generic_loopback_t_entropy_obj_set, + bcmpkt_generic_loopback_t_flags_set, + bcmpkt_generic_loopback_t_header_type_set, + bcmpkt_generic_loopback_t_input_priority_set, + bcmpkt_generic_loopback_t_interface_ctrl_set, + bcmpkt_generic_loopback_t_interface_obj_set, + bcmpkt_generic_loopback_t_processing_ctrl_0_set, + bcmpkt_generic_loopback_t_processing_ctrl_1_set, + bcmpkt_generic_loopback_t_qos_obj_set, + bcmpkt_generic_loopback_t_reserved_1_set, + bcmpkt_generic_loopback_t_reserved_2_set, + bcmpkt_generic_loopback_t_source_system_port_set, + bcmpkt_generic_loopback_t_start_byte_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_generic_loopback_t_field_data[] = { + BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_generic_loopback_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_32_1_0_generic_loopback_t_field_data, +}; + + +static int32_t bcmpkt_gpe_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_gpe_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_gpe_t_next_protocol_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_gpe_t_next_protocol_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_gpe_t_reserved0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 16); + + return ret; +} + +static int32_t bcmpkt_gpe_t_reserved0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 16, val); + return ret; +} + +static int32_t bcmpkt_gpe_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 8); + + return ret; +} + +static int32_t bcmpkt_gpe_t_reserved1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_gpe_t_vni_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 8, 24); + + return ret; +} + +static int32_t bcmpkt_gpe_t_vni_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 8, 24, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_gpe_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GPE_T_FID_COUNT] = { + bcmpkt_gpe_t_flags_get, + bcmpkt_gpe_t_next_protocol_get, + bcmpkt_gpe_t_reserved0_get, + bcmpkt_gpe_t_reserved1_get, + bcmpkt_gpe_t_vni_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_gpe_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GPE_T_FID_COUNT] = { + bcmpkt_gpe_t_flags_set, + bcmpkt_gpe_t_next_protocol_set, + bcmpkt_gpe_t_reserved0_set, + bcmpkt_gpe_t_reserved1_set, + bcmpkt_gpe_t_vni_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_gpe_t_field_data[] = { + BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_gpe_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GPE_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_32_1_0_gpe_t_field_data, +}; + + +static int32_t bcmpkt_gre_chksum_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_gre_chksum_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_gre_chksum_t_offset_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_gre_chksum_t_offset_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_gre_chksum_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = { + bcmpkt_gre_chksum_t_checksum_get, + bcmpkt_gre_chksum_t_offset_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_gre_chksum_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = { + bcmpkt_gre_chksum_t_checksum_set, + bcmpkt_gre_chksum_t_offset_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_gre_chksum_t_field_data[] = { + BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_gre_chksum_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_32_1_0_gre_chksum_t_field_data, +}; + + +static int32_t bcmpkt_gre_key_t_vn_id_lower_entropy_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_gre_key_t_vn_id_lower_entropy_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_gre_key_t_vn_id_upper_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_gre_key_t_vn_id_upper_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_gre_key_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_KEY_T_FID_COUNT] = { + bcmpkt_gre_key_t_vn_id_lower_entropy_get, + bcmpkt_gre_key_t_vn_id_upper_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_gre_key_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_KEY_T_FID_COUNT] = { + bcmpkt_gre_key_t_vn_id_lower_entropy_set, + bcmpkt_gre_key_t_vn_id_upper_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_gre_key_t_field_data[] = { + BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_gre_key_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_KEY_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_32_1_0_gre_key_t_field_data, +}; + + +static int32_t bcmpkt_gre_rout_t_routing_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gre_rout_t_routing_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_gre_rout_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = { + bcmpkt_gre_rout_t_routing_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_gre_rout_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = { + bcmpkt_gre_rout_t_routing_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_gre_rout_t_field_data[] = { + BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_gre_rout_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_ROUT_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_32_1_0_gre_rout_t_field_data, +}; + + +static int32_t bcmpkt_gre_seq_t_sequence_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gre_seq_t_sequence_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_gre_seq_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = { + bcmpkt_gre_seq_t_sequence_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_gre_seq_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = { + bcmpkt_gre_seq_t_sequence_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_gre_seq_t_field_data[] = { + BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_gre_seq_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_SEQ_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_32_1_0_gre_seq_t_field_data, +}; + + +static int32_t bcmpkt_gre_t_c_r_k_s_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_gre_t_c_r_k_s_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_gre_t_protocol_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_gre_t_protocol_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_gre_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 19, 9); + + return ret; +} + +static int32_t bcmpkt_gre_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 19, 9, val); + return ret; +} + +static int32_t bcmpkt_gre_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 3); + + return ret; +} + +static int32_t bcmpkt_gre_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 3, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_gre_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_T_FID_COUNT] = { + bcmpkt_gre_t_c_r_k_s_get, + bcmpkt_gre_t_protocol_get, + bcmpkt_gre_t_reserved_get, + bcmpkt_gre_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_gre_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_T_FID_COUNT] = { + bcmpkt_gre_t_c_r_k_s_set, + bcmpkt_gre_t_protocol_set, + bcmpkt_gre_t_reserved_set, + bcmpkt_gre_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_gre_t_field_data[] = { + BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_gre_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GRE_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_32_1_0_gre_t_field_data, +}; + + +static int32_t bcmpkt_gtp_12byte_t_bytes_11_8_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gtp_12byte_t_bytes_11_8_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gtp_12byte_t_bytes_3_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gtp_12byte_t_bytes_3_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gtp_12byte_t_bytes_7_4_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gtp_12byte_t_bytes_7_4_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_gtp_12byte_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_12BYTE_T_FID_COUNT] = { + bcmpkt_gtp_12byte_t_bytes_11_8_get, + bcmpkt_gtp_12byte_t_bytes_3_0_get, + bcmpkt_gtp_12byte_t_bytes_7_4_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_gtp_12byte_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_12BYTE_T_FID_COUNT] = { + bcmpkt_gtp_12byte_t_bytes_11_8_set, + bcmpkt_gtp_12byte_t_bytes_3_0_set, + bcmpkt_gtp_12byte_t_bytes_7_4_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_gtp_12byte_t_field_data[] = { + BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_12BYTE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_gtp_12byte_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_12BYTE_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_32_1_0_gtp_12byte_t_field_data, +}; + + +static int32_t bcmpkt_gtp_8byte_t_bytes_3_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gtp_8byte_t_bytes_3_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gtp_8byte_t_bytes_7_4_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gtp_8byte_t_bytes_7_4_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_gtp_8byte_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_8BYTE_T_FID_COUNT] = { + bcmpkt_gtp_8byte_t_bytes_3_0_get, + bcmpkt_gtp_8byte_t_bytes_7_4_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_gtp_8byte_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_8BYTE_T_FID_COUNT] = { + bcmpkt_gtp_8byte_t_bytes_3_0_set, + bcmpkt_gtp_8byte_t_bytes_7_4_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_gtp_8byte_t_field_data[] = { + BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_8BYTE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_gtp_8byte_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_8BYTE_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_32_1_0_gtp_8byte_t_field_data, +}; + + +static int32_t bcmpkt_gtp_ext_4byte_t_ext_hdr_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gtp_ext_4byte_t_ext_hdr_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_gtp_ext_4byte_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_EXT_4BYTE_T_FID_COUNT] = { + bcmpkt_gtp_ext_4byte_t_ext_hdr_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_gtp_ext_4byte_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_EXT_4BYTE_T_FID_COUNT] = { + bcmpkt_gtp_ext_4byte_t_ext_hdr_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_gtp_ext_4byte_t_field_data[] = { + BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_EXT_4BYTE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_gtp_ext_4byte_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_EXT_4BYTE_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_32_1_0_gtp_ext_4byte_t_field_data, +}; + + +static int32_t bcmpkt_gtp_with_ext_t_bytes_11_8_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gtp_with_ext_t_bytes_11_8_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gtp_with_ext_t_bytes_3_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gtp_with_ext_t_bytes_3_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gtp_with_ext_t_bytes_7_4_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gtp_with_ext_t_bytes_7_4_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_gtp_with_ext_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_WITH_EXT_T_FID_COUNT] = { + bcmpkt_gtp_with_ext_t_bytes_11_8_get, + bcmpkt_gtp_with_ext_t_bytes_3_0_get, + bcmpkt_gtp_with_ext_t_bytes_7_4_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_gtp_with_ext_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_WITH_EXT_T_FID_COUNT] = { + bcmpkt_gtp_with_ext_t_bytes_11_8_set, + bcmpkt_gtp_with_ext_t_bytes_3_0_set, + bcmpkt_gtp_with_ext_t_bytes_7_4_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_gtp_with_ext_t_field_data[] = { + BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_WITH_EXT_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_gtp_with_ext_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_GTP_WITH_EXT_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_32_1_0_gtp_with_ext_t_field_data, +}; + + +static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_option_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_option_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_hop_by_hop_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = { + bcmpkt_hop_by_hop_t_hdr_ext_len_get, + bcmpkt_hop_by_hop_t_next_header_get, + bcmpkt_hop_by_hop_t_option_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_hop_by_hop_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = { + bcmpkt_hop_by_hop_t_hdr_ext_len_set, + bcmpkt_hop_by_hop_t_next_header_set, + bcmpkt_hop_by_hop_t_option_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_hop_by_hop_t_field_data[] = { + BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_hop_by_hop_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_32_1_0_hop_by_hop_t_field_data, +}; + + +static int32_t bcmpkt_icmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_icmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_icmp_t_code_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_icmp_t_code_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_icmp_t_icmp_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_icmp_t_icmp_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_icmp_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ICMP_T_FID_COUNT] = { + bcmpkt_icmp_t_checksum_get, + bcmpkt_icmp_t_code_get, + bcmpkt_icmp_t_icmp_type_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_icmp_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ICMP_T_FID_COUNT] = { + bcmpkt_icmp_t_checksum_set, + bcmpkt_icmp_t_code_set, + bcmpkt_icmp_t_icmp_type_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_icmp_t_field_data[] = { + BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_icmp_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ICMP_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_32_1_0_icmp_t_field_data, +}; + + +static int32_t bcmpkt_igmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_igmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_igmp_t_group_address_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_igmp_t_group_address_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_igmp_t_igmp_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_igmp_t_igmp_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_igmp_t_max_resp_time_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_igmp_t_max_resp_time_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_igmp_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IGMP_T_FID_COUNT] = { + bcmpkt_igmp_t_checksum_get, + bcmpkt_igmp_t_group_address_get, + bcmpkt_igmp_t_igmp_type_get, + bcmpkt_igmp_t_max_resp_time_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_igmp_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IGMP_T_FID_COUNT] = { + bcmpkt_igmp_t_checksum_set, + bcmpkt_igmp_t_group_address_set, + bcmpkt_igmp_t_igmp_type_set, + bcmpkt_igmp_t_max_resp_time_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_igmp_t_field_data[] = { + BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_igmp_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IGMP_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_32_1_0_igmp_t_field_data, +}; + + +static int32_t bcmpkt_ipfix_t_export_time_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_export_time_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipfix_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipfix_t_obs_domain_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_obs_domain_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ipfix_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_ipfix_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPFIX_T_FID_COUNT] = { + bcmpkt_ipfix_t_export_time_get, + bcmpkt_ipfix_t_length_get, + bcmpkt_ipfix_t_obs_domain_id_get, + bcmpkt_ipfix_t_sequence_num_get, + bcmpkt_ipfix_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_ipfix_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPFIX_T_FID_COUNT] = { + bcmpkt_ipfix_t_export_time_set, + bcmpkt_ipfix_t_length_set, + bcmpkt_ipfix_t_obs_domain_id_set, + bcmpkt_ipfix_t_sequence_num_set, + bcmpkt_ipfix_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_ipfix_t_field_data[] = { + BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_ipfix_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPFIX_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_32_1_0_ipfix_t_field_data, +}; + + +static int32_t bcmpkt_ipv4_t_da_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_da_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_flags_frag_offset_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_flags_frag_offset_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_hdr_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_hdr_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_option_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_option_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_protocol_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_protocol_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_sa_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_sa_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_tos_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_tos_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_total_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_total_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_ttl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_ttl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_version_hdr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_version_hdr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_ipv4_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV4_T_FID_COUNT] = { + bcmpkt_ipv4_t_da_get, + bcmpkt_ipv4_t_flags_frag_offset_get, + bcmpkt_ipv4_t_hdr_checksum_get, + bcmpkt_ipv4_t_id_get, + bcmpkt_ipv4_t_option_get, + bcmpkt_ipv4_t_protocol_get, + bcmpkt_ipv4_t_sa_get, + bcmpkt_ipv4_t_tos_get, + bcmpkt_ipv4_t_total_length_get, + bcmpkt_ipv4_t_ttl_get, + bcmpkt_ipv4_t_version_hdr_len_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_ipv4_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV4_T_FID_COUNT] = { + bcmpkt_ipv4_t_da_set, + bcmpkt_ipv4_t_flags_frag_offset_set, + bcmpkt_ipv4_t_hdr_checksum_set, + bcmpkt_ipv4_t_id_set, + bcmpkt_ipv4_t_option_set, + bcmpkt_ipv4_t_protocol_set, + bcmpkt_ipv4_t_sa_set, + bcmpkt_ipv4_t_tos_set, + bcmpkt_ipv4_t_total_length_set, + bcmpkt_ipv4_t_ttl_set, + bcmpkt_ipv4_t_version_hdr_len_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_ipv4_t_field_data[] = { + BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_ipv4_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV4_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_32_1_0_ipv4_t_field_data, +}; + + +static int32_t bcmpkt_ipv6_t_da_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_da_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_flow_label_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 20); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_flow_label_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 20, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_hop_limit_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 8); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_hop_limit_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 8, 8); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_payload_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_payload_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_sa_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_sa_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_traffic_class_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 8); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_traffic_class_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_ipv6_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV6_T_FID_COUNT] = { + bcmpkt_ipv6_t_da_get, + bcmpkt_ipv6_t_flow_label_get, + bcmpkt_ipv6_t_hop_limit_get, + bcmpkt_ipv6_t_next_header_get, + bcmpkt_ipv6_t_payload_length_get, + bcmpkt_ipv6_t_sa_get, + bcmpkt_ipv6_t_traffic_class_get, + bcmpkt_ipv6_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_ipv6_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV6_T_FID_COUNT] = { + bcmpkt_ipv6_t_da_set, + bcmpkt_ipv6_t_flow_label_set, + bcmpkt_ipv6_t_hop_limit_set, + bcmpkt_ipv6_t_next_header_set, + bcmpkt_ipv6_t_payload_length_set, + bcmpkt_ipv6_t_sa_set, + bcmpkt_ipv6_t_traffic_class_set, + bcmpkt_ipv6_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_ipv6_t_field_data[] = { + BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_ipv6_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_IPV6_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_32_1_0_ipv6_t_field_data, +}; + + +static int32_t bcmpkt_l2_t_macda_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_l2_t_macda_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_l2_t_macsa_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_l2_t_macsa_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_l2_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_L2_T_FID_COUNT] = { + bcmpkt_l2_t_macda_get, + bcmpkt_l2_t_macsa_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_l2_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_L2_T_FID_COUNT] = { + bcmpkt_l2_t_macda_set, + bcmpkt_l2_t_macsa_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_l2_t_field_data[] = { + BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_l2_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_L2_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_32_1_0_l2_t_field_data, +}; + + +static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_mirror_erspan_sn_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { + bcmpkt_mirror_erspan_sn_t_seq_num_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_mirror_erspan_sn_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { + bcmpkt_mirror_erspan_sn_t_seq_num_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_mirror_erspan_sn_t_field_data[] = { + BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_mirror_erspan_sn_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_32_1_0_mirror_erspan_sn_t_field_data, +}; + + +static int32_t bcmpkt_mirror_transport_t_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_mirror_transport_t_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_mirror_transport_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { + bcmpkt_mirror_transport_t_data_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_mirror_transport_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { + bcmpkt_mirror_transport_t_data_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_mirror_transport_t_field_data[] = { + BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_mirror_transport_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_32_1_0_mirror_transport_t_field_data, +}; + + +static int32_t bcmpkt_mpls_ach_t_channel_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_channel_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_cw_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 4); + + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_mpls_ach_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = { + bcmpkt_mpls_ach_t_channel_type_get, + bcmpkt_mpls_ach_t_cw_type_get, + bcmpkt_mpls_ach_t_reserved_get, + bcmpkt_mpls_ach_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_mpls_ach_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = { + bcmpkt_mpls_ach_t_channel_type_set, + bcmpkt_mpls_ach_t_cw_type_set, + bcmpkt_mpls_ach_t_reserved_set, + bcmpkt_mpls_ach_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_mpls_ach_t_field_data[] = { + BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_mpls_ach_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_ACH_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_32_1_0_mpls_ach_t_field_data, +}; + + +static int32_t bcmpkt_mpls_bv_t_value_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_mpls_bv_t_value_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_mpls_bv_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_BV_T_FID_COUNT] = { + bcmpkt_mpls_bv_t_value_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_mpls_bv_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_BV_T_FID_COUNT] = { + bcmpkt_mpls_bv_t_value_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_mpls_bv_t_field_data[] = { + BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_mpls_bv_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_BV_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_32_1_0_mpls_bv_t_field_data, +}; + + +static int32_t bcmpkt_mpls_cw_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_cw_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 12); + + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 12, val); + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_seq_number_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_seq_number_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_mpls_cw_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_CW_T_FID_COUNT] = { + bcmpkt_mpls_cw_t_cw_type_get, + bcmpkt_mpls_cw_t_reserved_get, + bcmpkt_mpls_cw_t_seq_number_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_mpls_cw_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_CW_T_FID_COUNT] = { + bcmpkt_mpls_cw_t_cw_type_set, + bcmpkt_mpls_cw_t_reserved_set, + bcmpkt_mpls_cw_t_seq_number_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_mpls_cw_t_field_data[] = { + BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_mpls_cw_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_CW_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_32_1_0_mpls_cw_t_field_data, +}; + + +static int32_t bcmpkt_mpls_t_bos_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 1); + + return ret; +} + +static int32_t bcmpkt_mpls_t_bos_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 1, val); + return ret; +} + +static int32_t bcmpkt_mpls_t_exp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 9, 3); + + return ret; +} + +static int32_t bcmpkt_mpls_t_exp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 9, 3, val); + return ret; +} + +static int32_t bcmpkt_mpls_t_label_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 20); + + return ret; +} + +static int32_t bcmpkt_mpls_t_label_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 20, val); + return ret; +} + +static int32_t bcmpkt_mpls_t_ttl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_mpls_t_ttl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_mpls_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_T_FID_COUNT] = { + bcmpkt_mpls_t_bos_get, + bcmpkt_mpls_t_exp_get, + bcmpkt_mpls_t_label_get, + bcmpkt_mpls_t_ttl_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_mpls_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_T_FID_COUNT] = { + bcmpkt_mpls_t_bos_set, + bcmpkt_mpls_t_exp_set, + bcmpkt_mpls_t_label_set, + bcmpkt_mpls_t_ttl_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_mpls_t_field_data[] = { + BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_mpls_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_MPLS_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_32_1_0_mpls_t_field_data, +}; + + +static int32_t bcmpkt_opaquetag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_opaquetag_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_opaquetag_t_vlan_tag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_opaquetag_t_vlan_tag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_opaquetag_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_OPAQUETAG_T_FID_COUNT] = { + bcmpkt_opaquetag_t_tpid_get, + bcmpkt_opaquetag_t_vlan_tag_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_opaquetag_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_OPAQUETAG_T_FID_COUNT] = { + bcmpkt_opaquetag_t_tpid_set, + bcmpkt_opaquetag_t_vlan_tag_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_opaquetag_t_field_data[] = { + BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_OPAQUETAG_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_opaquetag_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_OPAQUETAG_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_32_1_0_opaquetag_t_field_data, +}; + + +static int32_t bcmpkt_p_1588_t_cntrl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[8], 24, 8); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_cntrl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[8], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_correction_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_correction_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_domain_nb_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_domain_nb_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_logmsginterval_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[8], 16, 8); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_logmsginterval_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[8], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_msg_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_msg_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_msg_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 4); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_msg_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 4, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 4); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved3_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved3_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_seq_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[7], 0, 16); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_seq_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[7], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_srcportid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_srcportid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_transportspec_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_transportspec_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 4); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_p_1588_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_P_1588_T_FID_COUNT] = { + bcmpkt_p_1588_t_cntrl_get, + bcmpkt_p_1588_t_correction_get, + bcmpkt_p_1588_t_domain_nb_get, + bcmpkt_p_1588_t_flags_get, + bcmpkt_p_1588_t_logmsginterval_get, + bcmpkt_p_1588_t_msg_length_get, + bcmpkt_p_1588_t_msg_type_get, + bcmpkt_p_1588_t_reserved1_get, + bcmpkt_p_1588_t_reserved2_get, + bcmpkt_p_1588_t_reserved3_get, + bcmpkt_p_1588_t_seq_id_get, + bcmpkt_p_1588_t_srcportid_get, + bcmpkt_p_1588_t_transportspec_get, + bcmpkt_p_1588_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_p_1588_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_P_1588_T_FID_COUNT] = { + bcmpkt_p_1588_t_cntrl_set, + bcmpkt_p_1588_t_correction_set, + bcmpkt_p_1588_t_domain_nb_set, + bcmpkt_p_1588_t_flags_set, + bcmpkt_p_1588_t_logmsginterval_set, + bcmpkt_p_1588_t_msg_length_set, + bcmpkt_p_1588_t_msg_type_set, + bcmpkt_p_1588_t_reserved1_set, + bcmpkt_p_1588_t_reserved2_set, + bcmpkt_p_1588_t_reserved3_set, + bcmpkt_p_1588_t_seq_id_set, + bcmpkt_p_1588_t_srcportid_set, + bcmpkt_p_1588_t_transportspec_set, + bcmpkt_p_1588_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_p_1588_t_field_data[] = { + BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_p_1588_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_P_1588_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_32_1_0_p_1588_t_field_data, +}; + + +static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_option_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_option_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_prog_ext_hdr_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = { + bcmpkt_prog_ext_hdr_t_hdr_ext_len_get, + bcmpkt_prog_ext_hdr_t_next_header_get, + bcmpkt_prog_ext_hdr_t_option_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_prog_ext_hdr_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = { + bcmpkt_prog_ext_hdr_t_hdr_ext_len_set, + bcmpkt_prog_ext_hdr_t_next_header_set, + bcmpkt_prog_ext_hdr_t_option_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_prog_ext_hdr_t_field_data[] = { + BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_prog_ext_hdr_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_32_1_0_prog_ext_hdr_t_field_data, +}; + + +static int32_t bcmpkt_psamp_0_t_flowset_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_flowset_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_0_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_0_t_next_hop_index_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_next_hop_index_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_psamp_0_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_0_T_FID_COUNT] = { + bcmpkt_psamp_0_t_flowset_get, + bcmpkt_psamp_0_t_length_get, + bcmpkt_psamp_0_t_next_hop_index_get, + bcmpkt_psamp_0_t_obs_time_ns_get, + bcmpkt_psamp_0_t_obs_time_s_get, + bcmpkt_psamp_0_t_template_id_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_psamp_0_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_0_T_FID_COUNT] = { + bcmpkt_psamp_0_t_flowset_set, + bcmpkt_psamp_0_t_length_set, + bcmpkt_psamp_0_t_next_hop_index_set, + bcmpkt_psamp_0_t_obs_time_ns_set, + bcmpkt_psamp_0_t_obs_time_s_set, + bcmpkt_psamp_0_t_template_id_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_psamp_0_t_field_data[] = { + BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_psamp_0_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_0_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_32_1_0_psamp_0_t_field_data, +}; + + +static int32_t bcmpkt_psamp_1_t_dlb_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 24, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_dlb_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_egress_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_egress_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_epoch_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_epoch_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_variable_flag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_variable_flag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_psamp_1_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_1_T_FID_COUNT] = { + bcmpkt_psamp_1_t_dlb_id_get, + bcmpkt_psamp_1_t_egress_port_get, + bcmpkt_psamp_1_t_epoch_get, + bcmpkt_psamp_1_t_ingress_port_get, + bcmpkt_psamp_1_t_sampled_length_get, + bcmpkt_psamp_1_t_user_meta_data_get, + bcmpkt_psamp_1_t_variable_flag_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_psamp_1_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_1_T_FID_COUNT] = { + bcmpkt_psamp_1_t_dlb_id_set, + bcmpkt_psamp_1_t_egress_port_set, + bcmpkt_psamp_1_t_epoch_set, + bcmpkt_psamp_1_t_ingress_port_set, + bcmpkt_psamp_1_t_sampled_length_set, + bcmpkt_psamp_1_t_user_meta_data_set, + bcmpkt_psamp_1_t_variable_flag_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_psamp_1_t_field_data[] = { + BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_psamp_1_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_1_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_32_1_0_psamp_1_t_field_data, +}; + + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[4], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[4], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[4], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[4], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_psamp_mirror_on_drop_0_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get, + bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get, + bcmpkt_psamp_mirror_on_drop_0_t_length_get, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get, + bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get, + bcmpkt_psamp_mirror_on_drop_0_t_template_id_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_psamp_mirror_on_drop_0_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set, + bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set, + bcmpkt_psamp_mirror_on_drop_0_t_length_set, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set, + bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set, + bcmpkt_psamp_mirror_on_drop_0_t_template_id_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_psamp_mirror_on_drop_0_t_field_data[] = { + BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_psamp_mirror_on_drop_0_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_32_1_0_psamp_mirror_on_drop_0_t_field_data, +}; + + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_psamp_mirror_on_drop_1_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_get, + bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_get, + bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_get, + bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_get, + bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_get, + bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_psamp_mirror_on_drop_1_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_set, + bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_set, + bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_set, + bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_set, + bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_set, + bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_psamp_mirror_on_drop_1_t_field_data[] = { + BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_psamp_mirror_on_drop_1_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_32_1_0_psamp_mirror_on_drop_1_t_field_data, +}; + + +static int32_t bcmpkt_rarp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_rarp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_rarp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_operation_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_rarp_t_operation_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_rarp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_rarp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_rarp_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RARP_T_FID_COUNT] = { + bcmpkt_rarp_t_hardware_len_get, + bcmpkt_rarp_t_hardware_type_get, + bcmpkt_rarp_t_operation_get, + bcmpkt_rarp_t_prot_addr_len_get, + bcmpkt_rarp_t_protocol_type_get, + bcmpkt_rarp_t_sender_ha_get, + bcmpkt_rarp_t_sender_ip_get, + bcmpkt_rarp_t_target_ha_get, + bcmpkt_rarp_t_target_ip_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_rarp_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RARP_T_FID_COUNT] = { + bcmpkt_rarp_t_hardware_len_set, + bcmpkt_rarp_t_hardware_type_set, + bcmpkt_rarp_t_operation_set, + bcmpkt_rarp_t_prot_addr_len_set, + bcmpkt_rarp_t_protocol_type_set, + bcmpkt_rarp_t_sender_ha_set, + bcmpkt_rarp_t_sender_ip_set, + bcmpkt_rarp_t_target_ha_set, + bcmpkt_rarp_t_target_ip_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_rarp_t_field_data[] = { + BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_rarp_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RARP_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_32_1_0_rarp_t_field_data, +}; + + +static int32_t bcmpkt_routing_t_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_routing_t_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_routing_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_routing_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_routing_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_routing_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_routing_t_routing_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_routing_t_routing_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_routing_t_segments_left_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_routing_t_segments_left_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_routing_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ROUTING_T_FID_COUNT] = { + bcmpkt_routing_t_data_get, + bcmpkt_routing_t_hdr_ext_len_get, + bcmpkt_routing_t_next_header_get, + bcmpkt_routing_t_routing_type_get, + bcmpkt_routing_t_segments_left_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_routing_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ROUTING_T_FID_COUNT] = { + bcmpkt_routing_t_data_set, + bcmpkt_routing_t_hdr_ext_len_set, + bcmpkt_routing_t_next_header_set, + bcmpkt_routing_t_routing_type_set, + bcmpkt_routing_t_segments_left_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_routing_t_field_data[] = { + BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_routing_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_ROUTING_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_32_1_0_routing_t_field_data, +}; + + +static int32_t bcmpkt_rspan_t_tag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_rspan_t_tag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_rspan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_rspan_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_rspan_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RSPAN_T_FID_COUNT] = { + bcmpkt_rspan_t_tag_get, + bcmpkt_rspan_t_tpid_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_rspan_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RSPAN_T_FID_COUNT] = { + bcmpkt_rspan_t_tag_set, + bcmpkt_rspan_t_tpid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_rspan_t_field_data[] = { + BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_rspan_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_RSPAN_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_32_1_0_rspan_t_field_data, +}; + + +static int32_t bcmpkt_sflow_shim_0_t_sys_destination_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_sys_destination_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_sys_source_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_sys_source_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_sflow_shim_0_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { + bcmpkt_sflow_shim_0_t_sys_destination_get, + bcmpkt_sflow_shim_0_t_sys_source_get, + bcmpkt_sflow_shim_0_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_sflow_shim_0_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { + bcmpkt_sflow_shim_0_t_sys_destination_set, + bcmpkt_sflow_shim_0_t_sys_source_set, + bcmpkt_sflow_shim_0_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_sflow_shim_0_t_field_data[] = { + BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_sflow_shim_0_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_32_1_0_sflow_shim_0_t_field_data, +}; + + +static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 30, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 30, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 27, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 27, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 29, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 29, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 31, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 31, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 26, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 26, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 7); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 7, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 23, 3); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 23, 3, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_sflow_shim_1_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { + bcmpkt_sflow_shim_1_t_flag_dest_sample_get, + bcmpkt_sflow_shim_1_t_flag_discarded_get, + bcmpkt_sflow_shim_1_t_flag_flex_sample_get, + bcmpkt_sflow_shim_1_t_flag_mcast_get, + bcmpkt_sflow_shim_1_t_flag_src_sample_get, + bcmpkt_sflow_shim_1_t_flag_truncated_get, + bcmpkt_sflow_shim_1_t_reserved_get, + bcmpkt_sflow_shim_1_t_sys_opcode_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_sflow_shim_1_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { + bcmpkt_sflow_shim_1_t_flag_dest_sample_set, + bcmpkt_sflow_shim_1_t_flag_discarded_set, + bcmpkt_sflow_shim_1_t_flag_flex_sample_set, + bcmpkt_sflow_shim_1_t_flag_mcast_set, + bcmpkt_sflow_shim_1_t_flag_src_sample_set, + bcmpkt_sflow_shim_1_t_flag_truncated_set, + bcmpkt_sflow_shim_1_t_reserved_set, + bcmpkt_sflow_shim_1_t_sys_opcode_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_sflow_shim_1_t_field_data[] = { + BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_sflow_shim_1_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_32_1_0_sflow_shim_1_t_field_data, +}; + + +static int32_t bcmpkt_sflow_shim_2_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_sflow_shim_2_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_sflow_shim_2_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { + bcmpkt_sflow_shim_2_t_sequence_num_get, + bcmpkt_sflow_shim_2_t_user_meta_data_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_sflow_shim_2_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { + bcmpkt_sflow_shim_2_t_sequence_num_set, + bcmpkt_sflow_shim_2_t_user_meta_data_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_sflow_shim_2_t_field_data[] = { + BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_sflow_shim_2_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_32_1_0_sflow_shim_2_t_field_data, +}; + + +static int32_t bcmpkt_snap_llc_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_snap_llc_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_snap_llc_t_snap_llc_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_snap_llc_t_snap_llc_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_snap_llc_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = { + bcmpkt_snap_llc_t_length_get, + bcmpkt_snap_llc_t_snap_llc_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_snap_llc_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = { + bcmpkt_snap_llc_t_length_set, + bcmpkt_snap_llc_t_snap_llc_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_snap_llc_t_field_data[] = { + BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_snap_llc_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_SNAP_LLC_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_32_1_0_snap_llc_t_field_data, +}; + + +static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_first_4bytes_t_src_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_first_4bytes_t_src_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_tcp_first_4bytes_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { + bcmpkt_tcp_first_4bytes_t_dst_port_get, + bcmpkt_tcp_first_4bytes_t_src_port_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_tcp_first_4bytes_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { + bcmpkt_tcp_first_4bytes_t_dst_port_set, + bcmpkt_tcp_first_4bytes_t_src_port_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_tcp_first_4bytes_t_field_data[] = { + BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_tcp_first_4bytes_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_32_1_0_tcp_first_4bytes_t_field_data, +}; + + +static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_win_size_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_win_size_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_tcp_last_16bytes_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { + bcmpkt_tcp_last_16bytes_t_ack_num_get, + bcmpkt_tcp_last_16bytes_t_checksum_get, + bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get, + bcmpkt_tcp_last_16bytes_t_seq_num_get, + bcmpkt_tcp_last_16bytes_t_urgent_ptr_get, + bcmpkt_tcp_last_16bytes_t_win_size_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_tcp_last_16bytes_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { + bcmpkt_tcp_last_16bytes_t_ack_num_set, + bcmpkt_tcp_last_16bytes_t_checksum_set, + bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set, + bcmpkt_tcp_last_16bytes_t_seq_num_set, + bcmpkt_tcp_last_16bytes_t_urgent_ptr_set, + bcmpkt_tcp_last_16bytes_t_win_size_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_tcp_last_16bytes_t_field_data[] = { + BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_tcp_last_16bytes_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_32_1_0_tcp_last_16bytes_t_field_data, +}; + + +static int32_t bcmpkt_udp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_udp_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_dst_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_udp_t_src_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_src_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_udp_t_udp_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_udp_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_udp_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UDP_T_FID_COUNT] = { + bcmpkt_udp_t_checksum_get, + bcmpkt_udp_t_dst_port_get, + bcmpkt_udp_t_src_port_get, + bcmpkt_udp_t_udp_length_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_udp_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UDP_T_FID_COUNT] = { + bcmpkt_udp_t_checksum_set, + bcmpkt_udp_t_dst_port_set, + bcmpkt_udp_t_src_port_set, + bcmpkt_udp_t_udp_length_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_udp_t_field_data[] = { + BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_udp_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UDP_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_32_1_0_udp_t_field_data, +}; + + +static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_unknown_l3_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { + bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get, + bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_unknown_l3_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { + bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set, + bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_unknown_l3_t_field_data[] = { + BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_unknown_l3_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_32_1_0_unknown_l3_t_field_data, +}; + + +static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_unknown_l4_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { + bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_unknown_l4_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { + bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_unknown_l4_t_field_data[] = { + BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_unknown_l4_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_32_1_0_unknown_l4_t_field_data, +}; + + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_unknown_l5_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { + bcmpkt_unknown_l5_t_l5_bytes_0_1_get, + bcmpkt_unknown_l5_t_l5_bytes_2_3_get, + bcmpkt_unknown_l5_t_l5_bytes_4_7_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_unknown_l5_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { + bcmpkt_unknown_l5_t_l5_bytes_0_1_set, + bcmpkt_unknown_l5_t_l5_bytes_2_3_set, + bcmpkt_unknown_l5_t_l5_bytes_4_7_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_unknown_l5_t_field_data[] = { + BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_unknown_l5_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_32_1_0_unknown_l5_t_field_data, +}; + + +static int32_t bcmpkt_vlan_t_cfi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 1); + + return ret; +} + +static int32_t bcmpkt_vlan_t_cfi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 1, val); + return ret; +} + +static int32_t bcmpkt_vlan_t_pcp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 13, 3); + + return ret; +} + +static int32_t bcmpkt_vlan_t_pcp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 13, 3, val); + return ret; +} + +static int32_t bcmpkt_vlan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_vlan_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_vlan_t_vid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 12); + + return ret; +} + +static int32_t bcmpkt_vlan_t_vid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 12, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_vlan_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VLAN_T_FID_COUNT] = { + bcmpkt_vlan_t_cfi_get, + bcmpkt_vlan_t_pcp_get, + bcmpkt_vlan_t_tpid_get, + bcmpkt_vlan_t_vid_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_vlan_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VLAN_T_FID_COUNT] = { + bcmpkt_vlan_t_cfi_set, + bcmpkt_vlan_t_pcp_set, + bcmpkt_vlan_t_tpid_set, + bcmpkt_vlan_t_vid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_vlan_t_field_data[] = { + BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_vlan_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VLAN_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_32_1_0_vlan_t_field_data, +}; + + +static int32_t bcmpkt_vntag_t_tag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_vntag_t_tag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_vntag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_vntag_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_vntag_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VNTAG_T_FID_COUNT] = { + bcmpkt_vntag_t_tag_get, + bcmpkt_vntag_t_tpid_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_vntag_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VNTAG_T_FID_COUNT] = { + bcmpkt_vntag_t_tag_set, + bcmpkt_vntag_t_tpid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_vntag_t_field_data[] = { + BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_vntag_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VNTAG_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_32_1_0_vntag_t_field_data, +}; + + +static int32_t bcmpkt_vxlan_t_flags_reserved_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_vxlan_t_flags_reserved_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_vxlan_t_vn_id_lower_reserved2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_vxlan_t_vn_id_lower_reserved2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_vxlan_t_vn_id_upper_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_vxlan_t_vn_id_upper_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_vxlan_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VXLAN_T_FID_COUNT] = { + bcmpkt_vxlan_t_flags_reserved_1_get, + bcmpkt_vxlan_t_vn_id_lower_reserved2_get, + bcmpkt_vxlan_t_vn_id_upper_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_vxlan_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VXLAN_T_FID_COUNT] = { + bcmpkt_vxlan_t_flags_reserved_1_set, + bcmpkt_vxlan_t_vn_id_lower_reserved2_set, + bcmpkt_vxlan_t_vn_id_upper_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_vxlan_t_field_data[] = { + BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_vxlan_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_VXLAN_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_32_1_0_vxlan_t_field_data, +}; + + +static int32_t bcmpkt_wesp_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_wesp_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_wesp_t_header_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_wesp_t_header_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_wesp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_wesp_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_wesp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_spi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_spi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_trailer_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_wesp_t_trailer_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_wesp_t_wesp_iv_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_wesp_iv_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_32_1_0_wesp_t_fget[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_WESP_T_FID_COUNT] = { + bcmpkt_wesp_t_flags_get, + bcmpkt_wesp_t_header_len_get, + bcmpkt_wesp_t_next_header_get, + bcmpkt_wesp_t_seq_num_get, + bcmpkt_wesp_t_spi_get, + bcmpkt_wesp_t_trailer_len_get, + bcmpkt_wesp_t_wesp_iv_get, +}; + +bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_32_1_0_wesp_t_fset[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_WESP_T_FID_COUNT] = { + bcmpkt_wesp_t_flags_set, + bcmpkt_wesp_t_header_len_set, + bcmpkt_wesp_t_next_header_set, + bcmpkt_wesp_t_seq_num_set, + bcmpkt_wesp_t_spi_set, + bcmpkt_wesp_t_trailer_len_set, + bcmpkt_wesp_t_wesp_iv_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_32_1_0_wesp_t_field_data[] = { + BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_32_1_0_wesp_t_field_info = { + .num_fields = BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_WESP_T_FID_COUNT, + .info = bcm56880_a0_nfa_6_5_32_1_0_wesp_t_field_data, +}; + +static bcmpkt_flex_pmd_info_t bcm56880_a0_nfa_6_5_32_1_0_flexhdr_info_list[BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_FLEXHDR_COUNT] = { + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_32_1_0_arp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_arp_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_arp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_32_1_0_authen_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_authen_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_authen_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_32_1_0_bfd_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_bfd_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_bfd_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_32_1_0_cpu_composites_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_cpu_composites_0_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_cpu_composites_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_32_1_0_cpu_composites_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_cpu_composites_1_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_cpu_composites_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_32_1_0_dest_option_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_dest_option_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_dest_option_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_32_1_0_erspan3_fixed_hdr_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_erspan3_fixed_hdr_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_erspan3_fixed_hdr_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_32_1_0_erspan3_subhdr_5_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_erspan3_subhdr_5_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_erspan3_subhdr_5_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_32_1_0_esp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_esp_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_esp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_32_1_0_etag_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_etag_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_etag_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_32_1_0_ethertype_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_ethertype_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_ethertype_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_32_1_0_frag_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_frag_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_frag_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_32_1_0_generic_loopback_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_generic_loopback_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_generic_loopback_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_32_1_0_gpe_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_gpe_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_gpe_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_32_1_0_gre_chksum_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_gre_chksum_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_gre_chksum_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_32_1_0_gre_key_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_gre_key_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_gre_key_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_32_1_0_gre_rout_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_gre_rout_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_gre_rout_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_32_1_0_gre_seq_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_gre_seq_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_gre_seq_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_32_1_0_gre_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_gre_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_gre_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_32_1_0_gtp_12byte_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_gtp_12byte_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_gtp_12byte_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_32_1_0_gtp_8byte_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_gtp_8byte_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_gtp_8byte_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_32_1_0_gtp_ext_4byte_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_gtp_ext_4byte_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_gtp_ext_4byte_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_32_1_0_gtp_with_ext_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_gtp_with_ext_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_gtp_with_ext_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_32_1_0_hop_by_hop_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_hop_by_hop_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_hop_by_hop_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_32_1_0_icmp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_icmp_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_icmp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_32_1_0_igmp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_igmp_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_igmp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_32_1_0_ipfix_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_ipfix_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_ipfix_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_32_1_0_ipv4_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_ipv4_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_ipv4_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_32_1_0_ipv6_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_ipv6_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_ipv6_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_32_1_0_l2_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_l2_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_l2_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_32_1_0_mirror_erspan_sn_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_mirror_erspan_sn_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_mirror_erspan_sn_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_32_1_0_mirror_transport_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_mirror_transport_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_mirror_transport_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_32_1_0_mpls_ach_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_mpls_ach_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_mpls_ach_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_32_1_0_mpls_bv_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_mpls_bv_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_mpls_bv_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_32_1_0_mpls_cw_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_mpls_cw_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_mpls_cw_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_32_1_0_mpls_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_mpls_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_mpls_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_32_1_0_opaquetag_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_opaquetag_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_opaquetag_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_32_1_0_p_1588_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_p_1588_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_p_1588_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_32_1_0_prog_ext_hdr_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_prog_ext_hdr_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_prog_ext_hdr_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_32_1_0_psamp_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_psamp_0_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_psamp_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_32_1_0_psamp_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_psamp_1_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_psamp_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_32_1_0_psamp_mirror_on_drop_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_psamp_mirror_on_drop_0_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_psamp_mirror_on_drop_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_32_1_0_psamp_mirror_on_drop_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_psamp_mirror_on_drop_1_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_psamp_mirror_on_drop_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_32_1_0_rarp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_rarp_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_rarp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_32_1_0_routing_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_routing_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_routing_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_32_1_0_rspan_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_rspan_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_rspan_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_32_1_0_sflow_shim_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_sflow_shim_0_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_sflow_shim_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_32_1_0_sflow_shim_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_sflow_shim_1_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_sflow_shim_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_32_1_0_sflow_shim_2_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_sflow_shim_2_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_sflow_shim_2_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_32_1_0_snap_llc_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_snap_llc_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_snap_llc_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_32_1_0_tcp_first_4bytes_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_tcp_first_4bytes_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_tcp_first_4bytes_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_32_1_0_tcp_last_16bytes_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_tcp_last_16bytes_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_tcp_last_16bytes_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_32_1_0_udp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_udp_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_udp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_32_1_0_unknown_l3_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_unknown_l3_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_unknown_l3_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_32_1_0_unknown_l4_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_unknown_l4_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_unknown_l4_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_32_1_0_unknown_l5_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_unknown_l5_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_unknown_l5_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_32_1_0_vlan_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_vlan_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_vlan_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_32_1_0_vntag_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_vntag_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_vntag_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_32_1_0_vxlan_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_vxlan_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_vxlan_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_32_1_0_wesp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56880_a0_nfa_6_5_32_1_0_wesp_t_fget, + .flex_fset = bcm56880_a0_nfa_6_5_32_1_0_wesp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56880_a0_nfa_6_5_32_1_0_rxpmd_flex_field_info, + .reasons_info = &bcm56880_a0_nfa_6_5_32_1_0_rxpmd_flex_reasons_info, + .flex_common_fget = bcm56880_a0_rxpmd_flex_fget, + .flex_common_fset = bcm56880_a0_rxpmd_flex_fset, + }, +}; + +static shr_enum_map_t bcm56880_a0_nfa_6_5_32_1_0_flexhdr_id_map[] = { + BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_FLEXHDR_NAME_MAP_INIT +}; + +shr_enum_map_t * bcm56880_a0_nfa_6_5_32_1_0_flexhdr_map_get(void) +{ + return bcm56880_a0_nfa_6_5_32_1_0_flexhdr_id_map; +} + +bcmpkt_flex_pmd_info_t * bcm56880_a0_nfa_6_5_32_1_0_flex_pmd_info_get(uint32_t hid) +{ + if (hid >= BCM56880_A0_NFA_6_5_32_1_0_BCMPKT_FLEXHDR_COUNT) { + return NULL; + } + + return &bcm56880_a0_nfa_6_5_32_1_0_flexhdr_info_list[hid]; +} + +int bcm56880_a0_nfa_6_5_32_1_0_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = { + 12, + -1, + -1, + 60, +}; diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/xfcr/bcm56890_a0/cna_6_5_32_3_0/bcm56890_a0_cna_6_5_32_3_0_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/xfcr/bcm56890_a0/cna_6_5_32_3_0/bcm56890_a0_cna_6_5_32_3_0_bcmpkt_rxpmd_match_id.c new file mode 100644 index 00000000000..2e253b1973c --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/xfcr/bcm56890_a0/cna_6_5_32_3_0/bcm56890_a0_cna_6_5_32_3_0_bcmpkt_rxpmd_match_id.c @@ -0,0 +1,1443 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) bcm56890_a0_cna_6_5_32_3_0_sf_match_id_info.yml + * for device bcm56890_a0 and variant cna_6_5_32_3_0. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + + +#include +#include + +static uint32_t bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_itag[1] = +{ + 0x14, +}; + +static uint32_t bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_l2[1] = +{ + 0x1e, +}; + +static uint32_t bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_otag[1] = +{ + 0x18, +}; + +static uint32_t bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_arp[1] = +{ + 0x4, +}; + +static uint32_t bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ethertype[1] = +{ + 0x7fffe, +}; + +static uint32_t bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_icmp[1] = +{ + 0x810, +}; + +static uint32_t bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv4[1] = +{ + 0x3f8, +}; + +static uint32_t bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv6[1] = +{ + 0x1fc00, +}; + +static uint32_t bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rarp[1] = +{ + 0x20000, +}; + +static uint32_t bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_first_4bytes[1] = +{ + 0x3060, +}; + +static uint32_t bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_last_16bytes[1] = +{ + 0x2040, +}; + +static uint32_t bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_udp[1] = +{ + 0xc180, +}; + +static uint32_t bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l3[1] = +{ + 0x40000, +}; + +static uint32_t bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l4[1] = +{ + 0x10200, +}; + +static uint32_t bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l5[1] = +{ + 0x8100, +}; + +static uint32_t bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_itag[1] = +{ + 0x28, +}; + +static uint32_t bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_l2[1] = +{ + 0x3e, +}; + +static uint32_t bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_otag[1] = +{ + 0x30, +}; + +static uint32_t bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_arp[1] = +{ + 0x4, +}; + +static uint32_t bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ethertype[1] = +{ + 0x1ffffe, +}; + +static uint32_t bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_icmp[1] = +{ + 0x1010, +}; + +static uint32_t bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv4[1] = +{ + 0x7f8, +}; + +static uint32_t bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv6[1] = +{ + 0x7f800, +}; + +static uint32_t bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rarp[1] = +{ + 0x80000, +}; + +static uint32_t bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_first_4bytes[1] = +{ + 0x6060, +}; + +static uint32_t bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_last_16bytes[1] = +{ + 0x4040, +}; + +static uint32_t bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_udp[1] = +{ + 0x38380, +}; + +static uint32_t bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l3[1] = +{ + 0x100000, +}; + +static uint32_t bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l4[1] = +{ + 0x40400, +}; + +static uint32_t bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l5[1] = +{ + 0x10100, +}; + +static uint32_t bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_vxlan[1] = +{ + 0x20200, +}; + +static uint32_t bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_sys_hdr_ep_nih[1] = +{ + 0x4, +}; + +static uint32_t bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_sys_hdr_loopback[1] = +{ + 0x8, +}; + + +static bcmpkt_rxpmd_match_id_db_t +bcm56890_a0_cna_6_5_32_3_0_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_COUNT] = { + { + /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_ITAG", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 14, + .match_minbit = 12, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 14, + .pminbit = 12, + + }, + { + /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */ + .name = "EGRESS_PKT_FWD_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 14, + .match_minbit = 12, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 14, + .pminbit = 12, + + }, + { + /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */ + .name = "EGRESS_PKT_FWD_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0x7, + .match_maxbit = 14, + .match_minbit = 12, + .maxbit = 2, + .minbit = 0, + .value = 0x0, + .pmaxbit = 14, + .pminbit = 12, + + }, + { + /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_OTAG", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 14, + .match_minbit = 12, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 14, + .pminbit = 12, + + }, + { + /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ARP", + .match = 0x20, + .match_mask = 0x66, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 21, + .pminbit = 15, + + }, + { + /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 21, + .pminbit = 15, + + }, + { + /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ICMP", + .match = 0x40, + .match_mask = 0x66, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 6, + .minbit = 5, + .value = 0x2, + .pmaxbit = 21, + .pminbit = 15, + + }, + { + /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV4", + .match = 0x8, + .match_mask = 0x18, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 4, + .minbit = 3, + .value = 0x1, + .pmaxbit = 21, + .pminbit = 15, + + }, + { + /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV6", + .match = 0x10, + .match_mask = 0x18, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 4, + .minbit = 3, + .value = 0x2, + .pmaxbit = 21, + .pminbit = 15, + + }, + { + /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x7f, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 6, + .minbit = 0, + .value = 0x0, + .pmaxbit = 21, + .pminbit = 15, + + }, + { + /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_RARP", + .match = 0x2, + .match_mask = 0x6, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 2, + .minbit = 1, + .value = 0x1, + .pmaxbit = 21, + .pminbit = 15, + + }, + { + /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x4, + .match_mask = 0x6, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 2, + .minbit = 1, + .value = 0x2, + .pmaxbit = 21, + .pminbit = 15, + + }, + { + /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x24, + .match_mask = 0x66, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 21, + .pminbit = 15, + + }, + { + /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UDP", + .match = 0x6, + .match_mask = 0x6, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 2, + .minbit = 1, + .value = 0x3, + .pmaxbit = 21, + .pminbit = 15, + + }, + { + /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", + .match = 0x18, + .match_mask = 0x18, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 4, + .minbit = 3, + .value = 0x3, + .pmaxbit = 21, + .pminbit = 15, + + }, + { + /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", + .match = 0x60, + .match_mask = 0x60, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 6, + .minbit = 5, + .value = 0x3, + .pmaxbit = 21, + .pminbit = 15, + + }, + { + /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", + .match = 0x46, + .match_mask = 0x66, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 6, + .minbit = 5, + .value = 0x2, + .pmaxbit = 21, + .pminbit = 15, + + }, + { + /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", + .match = 0x26, + .match_mask = 0x66, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 21, + .pminbit = 15, + + }, + { + /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH */ + .name = "EGRESS_PKT_SYS_HDR_EP_NIH", + .match = 0x2, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x2, + .pmaxbit = 1, + .pminbit = 0, + + }, + { + /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */ + .name = "EGRESS_PKT_SYS_HDR_LOOPBACK", + .match = 0x1, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x1, + .pmaxbit = 1, + .pminbit = 0, + + }, + { + /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */ + .name = "EGRESS_PKT_SYS_HDR_NONE", + .match = 0x0, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x0, + .pmaxbit = 1, + .pminbit = 0, + + }, + { + /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_ITAG", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 4, + .match_minbit = 2, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 4, + .pminbit = 2, + + }, + { + /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 4, + .match_minbit = 2, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 4, + .pminbit = 2, + + }, + { + /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0x7, + .match_maxbit = 4, + .match_minbit = 2, + .maxbit = 2, + .minbit = 0, + .value = 0x0, + .pmaxbit = 4, + .pminbit = 2, + + }, + { + /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_OTAG", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 4, + .match_minbit = 2, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 4, + .pminbit = 2, + + }, + { + /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", + .match = 0x20, + .match_mask = 0x66, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 11, + .pminbit = 5, + + }, + { + /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 11, + .pminbit = 5, + + }, + { + /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", + .match = 0x40, + .match_mask = 0x66, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 6, + .minbit = 5, + .value = 0x2, + .pmaxbit = 11, + .pminbit = 5, + + }, + { + /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", + .match = 0x8, + .match_mask = 0x18, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 4, + .minbit = 3, + .value = 0x1, + .pmaxbit = 11, + .pminbit = 5, + + }, + { + /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", + .match = 0x10, + .match_mask = 0x18, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 4, + .minbit = 3, + .value = 0x2, + .pmaxbit = 11, + .pminbit = 5, + + }, + { + /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x7f, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 6, + .minbit = 0, + .value = 0x0, + .pmaxbit = 11, + .pminbit = 5, + + }, + { + /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", + .match = 0x2, + .match_mask = 0x6, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 2, + .minbit = 1, + .value = 0x1, + .pmaxbit = 11, + .pminbit = 5, + + }, + { + /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x4, + .match_mask = 0x6, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 2, + .minbit = 1, + .value = 0x2, + .pmaxbit = 11, + .pminbit = 5, + + }, + { + /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x24, + .match_mask = 0x66, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 11, + .pminbit = 5, + + }, + { + /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", + .match = 0x6, + .match_mask = 0x6, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 2, + .minbit = 1, + .value = 0x3, + .pmaxbit = 11, + .pminbit = 5, + + }, + { + /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", + .match = 0x18, + .match_mask = 0x18, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 4, + .minbit = 3, + .value = 0x3, + .pmaxbit = 11, + .pminbit = 5, + + }, + { + /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", + .match = 0x60, + .match_mask = 0x60, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 6, + .minbit = 5, + .value = 0x3, + .pmaxbit = 11, + .pminbit = 5, + + }, + { + /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", + .match = 0x46, + .match_mask = 0x66, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 6, + .minbit = 5, + .value = 0x2, + .pmaxbit = 11, + .pminbit = 5, + + }, + { + /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", + .match = 0x26, + .match_mask = 0x66, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 11, + .pminbit = 5, + + }, + { + /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_ITAG", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 14, + .match_minbit = 12, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 14, + .pminbit = 12, + .zone_minbit = 10, + .arc_id_mask = 0x1c00, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_itag, + + }, + { + /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */ + .name = "INGRESS_PKT_INNER_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 14, + .match_minbit = 12, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 14, + .pminbit = 12, + .zone_minbit = 10, + .arc_id_mask = 0x1c00, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_l2, + + }, + { + /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */ + .name = "INGRESS_PKT_INNER_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0x7, + .match_maxbit = 14, + .match_minbit = 12, + .maxbit = 2, + .minbit = 0, + .value = 0x0, + .pmaxbit = 14, + .pminbit = 12, + .zone_minbit = 10, + .arc_id_mask = 0x1c00, + + }, + { + /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_OTAG", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 14, + .match_minbit = 12, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 14, + .pminbit = 12, + .zone_minbit = 10, + .arc_id_mask = 0x1c00, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_otag, + + }, + { + /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ARP", + .match = 0x20, + .match_mask = 0x66, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 21, + .pminbit = 15, + .zone_minbit = 13, + .arc_id_mask = 0x3e000, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_arp, + + }, + { + /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 21, + .pminbit = 15, + .zone_minbit = 13, + .arc_id_mask = 0x3e000, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ethertype, + + }, + { + /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ICMP", + .match = 0x40, + .match_mask = 0x66, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 6, + .minbit = 5, + .value = 0x2, + .pmaxbit = 21, + .pminbit = 15, + .zone_minbit = 13, + .arc_id_mask = 0x3e000, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_icmp, + + }, + { + /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV4", + .match = 0x8, + .match_mask = 0x18, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 4, + .minbit = 3, + .value = 0x1, + .pmaxbit = 21, + .pminbit = 15, + .zone_minbit = 13, + .arc_id_mask = 0x3e000, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv4, + + }, + { + /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV6", + .match = 0x10, + .match_mask = 0x18, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 4, + .minbit = 3, + .value = 0x2, + .pmaxbit = 21, + .pminbit = 15, + .zone_minbit = 13, + .arc_id_mask = 0x3e000, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv6, + + }, + { + /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x7f, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 6, + .minbit = 0, + .value = 0x0, + .pmaxbit = 21, + .pminbit = 15, + .zone_minbit = 13, + .arc_id_mask = 0x3e000, + + }, + { + /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_RARP", + .match = 0x2, + .match_mask = 0x6, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 2, + .minbit = 1, + .value = 0x1, + .pmaxbit = 21, + .pminbit = 15, + .zone_minbit = 13, + .arc_id_mask = 0x3e000, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rarp, + + }, + { + /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x4, + .match_mask = 0x6, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 2, + .minbit = 1, + .value = 0x2, + .pmaxbit = 21, + .pminbit = 15, + .zone_minbit = 13, + .arc_id_mask = 0x3e000, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_first_4bytes, + + }, + { + /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x24, + .match_mask = 0x66, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 21, + .pminbit = 15, + .zone_minbit = 13, + .arc_id_mask = 0x3e000, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_last_16bytes, + + }, + { + /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UDP", + .match = 0x6, + .match_mask = 0x6, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 2, + .minbit = 1, + .value = 0x3, + .pmaxbit = 21, + .pminbit = 15, + .zone_minbit = 13, + .arc_id_mask = 0x3e000, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_udp, + + }, + { + /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", + .match = 0x18, + .match_mask = 0x18, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 4, + .minbit = 3, + .value = 0x3, + .pmaxbit = 21, + .pminbit = 15, + .zone_minbit = 13, + .arc_id_mask = 0x3e000, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l3, + + }, + { + /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", + .match = 0x60, + .match_mask = 0x60, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 6, + .minbit = 5, + .value = 0x3, + .pmaxbit = 21, + .pminbit = 15, + .zone_minbit = 13, + .arc_id_mask = 0x3e000, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l4, + + }, + { + /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", + .match = 0x46, + .match_mask = 0x66, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 6, + .minbit = 5, + .value = 0x2, + .pmaxbit = 21, + .pminbit = 15, + .zone_minbit = 13, + .arc_id_mask = 0x3e000, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l5, + + }, + { + /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_ITAG", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 4, + .match_minbit = 2, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 4, + .pminbit = 2, + .zone_minbit = 2, + .arc_id_mask = 0x1c, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_itag, + + }, + { + /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */ + .name = "INGRESS_PKT_OUTER_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 4, + .match_minbit = 2, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 4, + .pminbit = 2, + .zone_minbit = 2, + .arc_id_mask = 0x1c, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_l2, + + }, + { + /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */ + .name = "INGRESS_PKT_OUTER_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0x7, + .match_maxbit = 4, + .match_minbit = 2, + .maxbit = 2, + .minbit = 0, + .value = 0x0, + .pmaxbit = 4, + .pminbit = 2, + .zone_minbit = 2, + .arc_id_mask = 0x1c, + + }, + { + /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_OTAG", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 4, + .match_minbit = 2, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 4, + .pminbit = 2, + .zone_minbit = 2, + .arc_id_mask = 0x1c, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_otag, + + }, + { + /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ARP", + .match = 0x20, + .match_mask = 0x66, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 11, + .pminbit = 5, + .zone_minbit = 5, + .arc_id_mask = 0x3e0, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_arp, + + }, + { + /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 11, + .pminbit = 5, + .zone_minbit = 5, + .arc_id_mask = 0x3e0, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ethertype, + + }, + { + /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", + .match = 0x40, + .match_mask = 0x66, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 6, + .minbit = 5, + .value = 0x2, + .pmaxbit = 11, + .pminbit = 5, + .zone_minbit = 5, + .arc_id_mask = 0x3e0, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_icmp, + + }, + { + /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", + .match = 0x8, + .match_mask = 0x18, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 4, + .minbit = 3, + .value = 0x1, + .pmaxbit = 11, + .pminbit = 5, + .zone_minbit = 5, + .arc_id_mask = 0x3e0, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv4, + + }, + { + /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", + .match = 0x10, + .match_mask = 0x18, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 4, + .minbit = 3, + .value = 0x2, + .pmaxbit = 11, + .pminbit = 5, + .zone_minbit = 5, + .arc_id_mask = 0x3e0, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv6, + + }, + { + /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x7f, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 6, + .minbit = 0, + .value = 0x0, + .pmaxbit = 11, + .pminbit = 5, + .zone_minbit = 5, + .arc_id_mask = 0x3e0, + + }, + { + /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_RARP", + .match = 0x2, + .match_mask = 0x6, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 2, + .minbit = 1, + .value = 0x1, + .pmaxbit = 11, + .pminbit = 5, + .zone_minbit = 5, + .arc_id_mask = 0x3e0, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rarp, + + }, + { + /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x4, + .match_mask = 0x6, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 2, + .minbit = 1, + .value = 0x2, + .pmaxbit = 11, + .pminbit = 5, + .zone_minbit = 5, + .arc_id_mask = 0x3e0, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_first_4bytes, + + }, + { + /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x24, + .match_mask = 0x66, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 11, + .pminbit = 5, + .zone_minbit = 5, + .arc_id_mask = 0x3e0, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_last_16bytes, + + }, + { + /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UDP", + .match = 0x6, + .match_mask = 0x6, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 2, + .minbit = 1, + .value = 0x3, + .pmaxbit = 11, + .pminbit = 5, + .zone_minbit = 5, + .arc_id_mask = 0x3e0, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_udp, + + }, + { + /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", + .match = 0x18, + .match_mask = 0x18, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 4, + .minbit = 3, + .value = 0x3, + .pmaxbit = 11, + .pminbit = 5, + .zone_minbit = 5, + .arc_id_mask = 0x3e0, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l3, + + }, + { + /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", + .match = 0x60, + .match_mask = 0x60, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 6, + .minbit = 5, + .value = 0x3, + .pmaxbit = 11, + .pminbit = 5, + .zone_minbit = 5, + .arc_id_mask = 0x3e0, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l4, + + }, + { + /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", + .match = 0x46, + .match_mask = 0x66, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 6, + .minbit = 5, + .value = 0x2, + .pmaxbit = 11, + .pminbit = 5, + .zone_minbit = 5, + .arc_id_mask = 0x3e0, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l5, + + }, + { + /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", + .match = 0x26, + .match_mask = 0x66, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 11, + .pminbit = 5, + .zone_minbit = 5, + .arc_id_mask = 0x3e0, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_vxlan, + + }, + { + /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH */ + .name = "INGRESS_PKT_SYS_HDR_EP_NIH", + .match = 0x2, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x2, + .pmaxbit = 1, + .pminbit = 0, + .zone_minbit = 0, + .arc_id_mask = 0x3, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_sys_hdr_ep_nih, + + }, + { + /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */ + .name = "INGRESS_PKT_SYS_HDR_LOOPBACK", + .match = 0x1, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x1, + .pmaxbit = 1, + .pminbit = 0, + .zone_minbit = 0, + .arc_id_mask = 0x3, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_sys_hdr_loopback, + + }, + { + /* BCM56890_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */ + .name = "INGRESS_PKT_SYS_HDR_NONE", + .match = 0x0, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x0, + .pmaxbit = 1, + .pminbit = 0, + .zone_minbit = 0, + .arc_id_mask = 0x3, + + }, +}; + +static bcmpkt_rxpmd_match_id_db_info_t bcm56890_a0_cna_6_5_32_3_0_rxpmd_match_id_db_info = { + .num_entries = 77, + .db = bcm56890_a0_cna_6_5_32_3_0_rxpmd_match_id_db +}; +bcmpkt_rxpmd_match_id_db_info_t * bcm56890_a0_cna_6_5_32_3_0_rxpmd_match_id_db_info_get(void) { + return &bcm56890_a0_cna_6_5_32_3_0_rxpmd_match_id_db_info; +} + +static shr_enum_map_t bcm56890_a0_cna_6_5_32_3_0_rxpmd_match_id_map[] = { + BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_rxpmd_match_id_map_info_t bcm56890_a0_cna_6_5_32_3_0_rxpmd_match_id_map_info = { + .num_entries = 77, + .map = bcm56890_a0_cna_6_5_32_3_0_rxpmd_match_id_map +}; + +bcmpkt_rxpmd_match_id_map_info_t * bcm56890_a0_cna_6_5_32_3_0_rxpmd_match_id_map_info_get(void) { + return &bcm56890_a0_cna_6_5_32_3_0_rxpmd_match_id_map_info; +} diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/xfcr/bcm56890_a0/cna_6_5_32_3_0/bcm56890_a0_cna_6_5_32_3_0_pkt_flexhdr.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/xfcr/bcm56890_a0/cna_6_5_32_3_0/bcm56890_a0_cna_6_5_32_3_0_pkt_flexhdr.c new file mode 100644 index 00000000000..76ce4bcc9b6 --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/xfcr/bcm56890_a0/cna_6_5_32_3_0/bcm56890_a0_cna_6_5_32_3_0_pkt_flexhdr.c @@ -0,0 +1,3833 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) map.yml + * for device bcm56890_a0 and variant cna_6_5_32_3_0. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#include +#include +#include +#include +#include +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) + +static void bcm56890_a0_cna_6_5_32_3_0_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons) +{ + uint32_t *reason = data + 0; + + if (reason[13] & (0x1 << 0)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU); + } + if (reason[13] & (0x1 << 1)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS); + } + if (reason[13] & (0x1 << 2)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE); + } + if (reason[13] & (0x1 << 3)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD); + } + if (reason[13] & (0x1 << 4)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST); + } + if (reason[13] & (0x1 << 5)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED); + } + if (reason[13] & (0x1 << 6)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT); + } + if (reason[13] & (0x1 << 7)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED); + } + if (reason[13] & (0x1 << 8)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED); + } + if (reason[13] & (0x1 << 9)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS); + } + if (reason[13] & (0x1 << 10)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP); + } + if (reason[13] & (0x1 << 11)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS); + } + if (reason[13] & (0x1 << 12)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP); + } + if (reason[13] & (0x1 << 13)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR); + } + if (reason[13] & (0x1 << 14)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR); + } + if (reason[13] & (0x1 << 16)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL); + } + if (reason[13] & (0x1 << 17)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_VFP); + } + if (reason[13] & (0x1 << 18)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP); + } + if (reason[13] & (0x1 << 19)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER); + } + if (reason[13] & (0x1 << 22)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT); + } + if (reason[13] & (0x1 << 23)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT); + } + if (reason[12] & (0x1 << 15)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP); + } +} + +static void bcm56890_a0_cna_6_5_32_3_0_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data) +{ + uint32_t *reason = data + 0; + + reason[13] = 0; + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) { + reason[13] |= (0x1 << 0); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) { + reason[13] |= (0x1 << 1); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) { + reason[13] |= (0x1 << 2); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD)) { + reason[13] |= (0x1 << 3); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST)) { + reason[13] |= (0x1 << 4); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) { + reason[13] |= (0x1 << 5); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) { + reason[13] |= (0x1 << 6); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED)) { + reason[13] |= (0x1 << 7); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED)) { + reason[13] |= (0x1 << 8); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) { + reason[13] |= (0x1 << 9); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) { + reason[13] |= (0x1 << 10); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) { + reason[13] |= (0x1 << 11); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) { + reason[13] |= (0x1 << 12); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) { + reason[13] |= (0x1 << 13); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) { + reason[13] |= (0x1 << 14); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) { + reason[13] |= (0x1 << 16); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_VFP)) { + reason[13] |= (0x1 << 17); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP)) { + reason[13] |= (0x1 << 18); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) { + reason[13] |= (0x1 << 19); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT)) { + reason[13] |= (0x1 << 22); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) { + reason[13] |= (0x1 << 23); + } + reason[12] = 0; + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) { + reason[12] |= (0x1 << 15); + } +} + +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_32_3_0_rxpmd_flex_field_data[] = { + { + .name = "DROP_CODE_15_0", + .fid = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 48, 63 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { 48, 63 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "DVP_15_0", + .fid = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_DVP_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 128, 143 }, /* Profile 2. */ + { 112, 127 }, /* Profile 3. */ + { 128, 143 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "EFFECTIVE_TTL_7_0", + .fid = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 336, 343 }, /* Profile 2. */ + { 336, 343 }, /* Profile 3. */ + { 336, 343 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "ENTROPY_LABEL_HIGH_3_0", + .fid = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 404, 407 }, /* Profile 2. */ + { 404, 407 }, /* Profile 3. */ + { 404, 407 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "ENTROPY_LABEL_LOW_15_0", + .fid = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 368, 383 }, /* Profile 2. */ + { 368, 383 }, /* Profile 3. */ + { 368, 383 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "EP_NIH_HDR_DROP_CODE_15_0", + .fid = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_DROP_CODE_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { 176, 191 }, /* Profile 3. */ + }, + .profile_cnt = 4, + }, + { + .name = "EP_NIH_HDR_RECIRC_CODE_3_0", + .fid = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 384, 387 }, /* Profile 2. */ + { 384, 387 }, /* Profile 3. */ + { 384, 387 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "EP_NIH_HDR_TIMESTAMP_15_0", + .fid = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 144, 159 }, /* Profile 2. */ + { 128, 143 }, /* Profile 3. */ + }, + .profile_cnt = 4, + }, + { + .name = "EP_NIH_HDR_TIMESTAMP_31_16", + .fid = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 160, 175 }, /* Profile 2. */ + { 144, 159 }, /* Profile 3. */ + }, + .profile_cnt = 4, + }, + { + .name = "ERSPAN3_GBP_SID_15_0", + .fid = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_ERSPAN3_GBP_SID_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 352, 367 }, /* Profile 2. */ + { 352, 367 }, /* Profile 3. */ + { 352, 367 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "EVENT_TRACE_VECTOR_15_0", + .fid = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 0, 15 }, /* Profile 2. */ + { 0, 15 }, /* Profile 3. */ + { 0, 15 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "EVENT_TRACE_VECTOR_31_16", + .fid = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 16, 31 }, /* Profile 2. */ + { 16, 31 }, /* Profile 3. */ + { 16, 31 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "EVENT_TRACE_VECTOR_47_32", + .fid = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 32, 47 }, /* Profile 2. */ + { 32, 47 }, /* Profile 3. */ + { 32, 47 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "I2E_CLASS_ID_15_0", + .fid = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 192, 207 }, /* Profile 2. */ + { 192, 207 }, /* Profile 3. */ + { 192, 207 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "IFP_TS_CONTROL_ACTION_3_0", + .fid = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 420, 423 }, /* Profile 2. */ + { 420, 423 }, /* Profile 3. */ + { 420, 423 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "ING_TIMESTAMP_15_0", + .fid = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { 144, 159 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "ING_TIMESTAMP_31_16", + .fid = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { 160, 175 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "INGRESS_PP_PORT_8_0", + .fid = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_8_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 272, 280 }, /* Profile 2. */ + { 272, 280 }, /* Profile 3. */ + { 272, 280 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0", + .fid = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 208, 223 }, /* Profile 2. */ + { 208, 223 }, /* Profile 3. */ + { 208, 223 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "INGRESS_QOS_REMARK_CTRL_3_0", + .fid = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 412, 415 }, /* Profile 2. */ + { 412, 415 }, /* Profile 3. */ + { 412, 415 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "INT_PRI_3_0", + .fid = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 392, 395 }, /* Profile 2. */ + { 392, 395 }, /* Profile 3. */ + { 392, 395 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "L2_IIF_10_0", + .fid = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 224, 234 }, /* Profile 2. */ + { 224, 234 }, /* Profile 3. */ + { 224, 234 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "L2_OIF_10_0", + .fid = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 96, 106 }, /* Profile 2. */ + { 80, 90 }, /* Profile 3. */ + { 96, 106 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "L3_IIF_13_0", + .fid = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 256, 269 }, /* Profile 2. */ + { 256, 269 }, /* Profile 3. */ + { 256, 269 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "L3_OIF_1_13_0", + .fid = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 112, 125 }, /* Profile 2. */ + { 96, 109 }, /* Profile 3. */ + { 112, 125 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "NHOP_2_OR_ECMP_GROUP_INDEX_1_14_0", + .fid = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_14_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 304, 318 }, /* Profile 2. */ + { 304, 318 }, /* Profile 3. */ + { 304, 318 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "NHOP_INDEX_1_14_0", + .fid = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_14_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 176, 190 }, /* Profile 2. */ + { 160, 174 }, /* Profile 3. */ + { 176, 190 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "PARSER_VHLEN_0_15_0", + .fid = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 64, 79 }, /* Profile 2. */ + { 48, 63 }, /* Profile 3. */ + { 64, 79 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "PKT_MISC_CTRL_0_3_0", + .fid = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 408, 411 }, /* Profile 2. */ + { 408, 411 }, /* Profile 3. */ + { 408, 411 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "SVP_15_0", + .fid = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_SVP_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 240, 255 }, /* Profile 2. */ + { 240, 255 }, /* Profile 3. */ + { 240, 255 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "SVP_NETWORK_GROUP_BITMAP_3_0", + .fid = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 396, 399 }, /* Profile 2. */ + { 396, 399 }, /* Profile 3. */ + { 396, 399 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "SYSTEM_DESTINATION_15_0", + .fid = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 320, 335 }, /* Profile 2. */ + { 320, 335 }, /* Profile 3. */ + { 320, 335 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "SYSTEM_OPCODE_3_0", + .fid = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 400, 403 }, /* Profile 2. */ + { 400, 403 }, /* Profile 3. */ + { 400, 403 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "SYSTEM_SOURCE_15_0", + .fid = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 288, 303 }, /* Profile 2. */ + { 288, 303 }, /* Profile 3. */ + { 288, 303 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "TAG_ACTION_CTRL_1_0", + .fid = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_TAG_ACTION_CTRL_1_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 416, 417 }, /* Profile 2. */ + { 416, 417 }, /* Profile 3. */ + { 416, 417 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "TUNNEL_PROCESSING_RESULTS_1_3_0", + .fid = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 388, 391 }, /* Profile 2. */ + { 388, 391 }, /* Profile 3. */ + { 388, 391 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "VFI_15_0", + .fid = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_VFI_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 80, 95 }, /* Profile 2. */ + { 64, 79 }, /* Profile 3. */ + { 80, 95 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, +}; +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_32_3_0_rxpmd_flex_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_FID_COUNT, + .info = bcm56890_a0_cna_6_5_32_3_0_rxpmd_flex_field_data, + .profile_bmp_cnt = 1, + .profile_bmp[0] = 0x1c, + +}; + +static shr_enum_map_t bcm56890_a0_cna_6_5_32_3_0_rxpmd_flex_reason_names[] = { + BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT +}; + +static bcmpkt_flex_reasons_info_t bcm56890_a0_cna_6_5_32_3_0_rxpmd_flex_reasons_info = { + .num_reasons = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_COUNT, + .reason_names = bcm56890_a0_cna_6_5_32_3_0_rxpmd_flex_reason_names, + .reason_encode = bcm56890_a0_cna_6_5_32_3_0_rxpmd_flex_reason_encode, + .reason_decode = bcm56890_a0_cna_6_5_32_3_0_rxpmd_flex_reason_decode, +}; + + +static int32_t bcmpkt_arp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_arp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_arp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_arp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_arp_t_operation_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_arp_t_operation_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_arp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_arp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_arp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_arp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_32_3_0_arp_t_fget[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_FID_COUNT] = { + bcmpkt_arp_t_hardware_len_get, + bcmpkt_arp_t_hardware_type_get, + bcmpkt_arp_t_operation_get, + bcmpkt_arp_t_prot_addr_len_get, + bcmpkt_arp_t_protocol_type_get, + bcmpkt_arp_t_sender_ha_get, + bcmpkt_arp_t_sender_ip_get, + bcmpkt_arp_t_target_ha_get, + bcmpkt_arp_t_target_ip_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_32_3_0_arp_t_fset[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_FID_COUNT] = { + bcmpkt_arp_t_hardware_len_set, + bcmpkt_arp_t_hardware_type_set, + bcmpkt_arp_t_operation_set, + bcmpkt_arp_t_prot_addr_len_set, + bcmpkt_arp_t_protocol_type_set, + bcmpkt_arp_t_sender_ha_set, + bcmpkt_arp_t_sender_ip_set, + bcmpkt_arp_t_target_ha_set, + bcmpkt_arp_t_target_ip_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_32_3_0_arp_t_field_data[] = { + BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_32_3_0_arp_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_32_3_0_arp_t_field_data, +}; + + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_32_3_0_cpu_composites_0_t_fget[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { + bcmpkt_cpu_composites_0_t_dma_cont0_get, + bcmpkt_cpu_composites_0_t_dma_cont1_get, + bcmpkt_cpu_composites_0_t_dma_cont2_get, + bcmpkt_cpu_composites_0_t_dma_cont3_get, + bcmpkt_cpu_composites_0_t_dma_cont4_get, + bcmpkt_cpu_composites_0_t_dma_cont5_get, + bcmpkt_cpu_composites_0_t_dma_cont6_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_32_3_0_cpu_composites_0_t_fset[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { + bcmpkt_cpu_composites_0_t_dma_cont0_set, + bcmpkt_cpu_composites_0_t_dma_cont1_set, + bcmpkt_cpu_composites_0_t_dma_cont2_set, + bcmpkt_cpu_composites_0_t_dma_cont3_set, + bcmpkt_cpu_composites_0_t_dma_cont4_set, + bcmpkt_cpu_composites_0_t_dma_cont5_set, + bcmpkt_cpu_composites_0_t_dma_cont6_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_32_3_0_cpu_composites_0_t_field_data[] = { + BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_32_3_0_cpu_composites_0_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_32_3_0_cpu_composites_0_t_field_data, +}; + + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_32_3_0_cpu_composites_1_t_fget[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { + bcmpkt_cpu_composites_1_t_dma_cont10_get, + bcmpkt_cpu_composites_1_t_dma_cont11_get, + bcmpkt_cpu_composites_1_t_dma_cont12_get, + bcmpkt_cpu_composites_1_t_dma_cont13_get, + bcmpkt_cpu_composites_1_t_dma_cont14_get, + bcmpkt_cpu_composites_1_t_dma_cont15_get, + bcmpkt_cpu_composites_1_t_dma_cont16_get, + bcmpkt_cpu_composites_1_t_dma_cont17_get, + bcmpkt_cpu_composites_1_t_dma_cont7_get, + bcmpkt_cpu_composites_1_t_dma_cont8_get, + bcmpkt_cpu_composites_1_t_dma_cont9_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_32_3_0_cpu_composites_1_t_fset[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { + bcmpkt_cpu_composites_1_t_dma_cont10_set, + bcmpkt_cpu_composites_1_t_dma_cont11_set, + bcmpkt_cpu_composites_1_t_dma_cont12_set, + bcmpkt_cpu_composites_1_t_dma_cont13_set, + bcmpkt_cpu_composites_1_t_dma_cont14_set, + bcmpkt_cpu_composites_1_t_dma_cont15_set, + bcmpkt_cpu_composites_1_t_dma_cont16_set, + bcmpkt_cpu_composites_1_t_dma_cont17_set, + bcmpkt_cpu_composites_1_t_dma_cont7_set, + bcmpkt_cpu_composites_1_t_dma_cont8_set, + bcmpkt_cpu_composites_1_t_dma_cont9_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_32_3_0_cpu_composites_1_t_field_data[] = { + BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_32_3_0_cpu_composites_1_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_32_3_0_cpu_composites_1_t_field_data, +}; + + +static int32_t bcmpkt_ep_nih_header_t_header_subtype_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_header_subtype_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_header_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 6); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_header_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 6, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 20, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_start_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 30, 2); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_start_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 30, 2, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_32_3_0_ep_nih_header_t_fget[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = { + bcmpkt_ep_nih_header_t_header_subtype_get, + bcmpkt_ep_nih_header_t_header_type_get, + bcmpkt_ep_nih_header_t_opaque_ctrl_a_get, + bcmpkt_ep_nih_header_t_opaque_ctrl_b_get, + bcmpkt_ep_nih_header_t_opaque_ctrl_c_get, + bcmpkt_ep_nih_header_t_opaque_object_a_get, + bcmpkt_ep_nih_header_t_opaque_object_b_get, + bcmpkt_ep_nih_header_t_opaque_object_c_get, + bcmpkt_ep_nih_header_t_recirc_profile_index_get, + bcmpkt_ep_nih_header_t_reserved_0_get, + bcmpkt_ep_nih_header_t_start_get, + bcmpkt_ep_nih_header_t_timestamp_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_32_3_0_ep_nih_header_t_fset[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = { + bcmpkt_ep_nih_header_t_header_subtype_set, + bcmpkt_ep_nih_header_t_header_type_set, + bcmpkt_ep_nih_header_t_opaque_ctrl_a_set, + bcmpkt_ep_nih_header_t_opaque_ctrl_b_set, + bcmpkt_ep_nih_header_t_opaque_ctrl_c_set, + bcmpkt_ep_nih_header_t_opaque_object_a_set, + bcmpkt_ep_nih_header_t_opaque_object_b_set, + bcmpkt_ep_nih_header_t_opaque_object_c_set, + bcmpkt_ep_nih_header_t_recirc_profile_index_set, + bcmpkt_ep_nih_header_t_reserved_0_set, + bcmpkt_ep_nih_header_t_start_set, + bcmpkt_ep_nih_header_t_timestamp_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_32_3_0_ep_nih_header_t_field_data[] = { + BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_32_3_0_ep_nih_header_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_32_3_0_ep_nih_header_t_field_data, +}; + + +static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 11, 2); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 11, 2, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 13, 3); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 13, 3, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 10); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 10, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_t_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 10, 1); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_t_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 10, 1, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 12); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 12, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_32_3_0_erspan3_fixed_hdr_t_fget[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { + bcmpkt_erspan3_fixed_hdr_t_bso_get, + bcmpkt_erspan3_fixed_hdr_t_cos_get, + bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get, + bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get, + bcmpkt_erspan3_fixed_hdr_t_session_id_get, + bcmpkt_erspan3_fixed_hdr_t_t_get, + bcmpkt_erspan3_fixed_hdr_t_timestamp_get, + bcmpkt_erspan3_fixed_hdr_t_ver_get, + bcmpkt_erspan3_fixed_hdr_t_vlan_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_32_3_0_erspan3_fixed_hdr_t_fset[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { + bcmpkt_erspan3_fixed_hdr_t_bso_set, + bcmpkt_erspan3_fixed_hdr_t_cos_set, + bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set, + bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set, + bcmpkt_erspan3_fixed_hdr_t_session_id_set, + bcmpkt_erspan3_fixed_hdr_t_t_set, + bcmpkt_erspan3_fixed_hdr_t_timestamp_set, + bcmpkt_erspan3_fixed_hdr_t_ver_set, + bcmpkt_erspan3_fixed_hdr_t_vlan_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_32_3_0_erspan3_fixed_hdr_t_field_data[] = { + BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_32_3_0_erspan3_fixed_hdr_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_32_3_0_erspan3_fixed_hdr_t_field_data, +}; + + +static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 26, 6); + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 26, 6, val); + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 10); + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 10, val); + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_32_3_0_erspan3_subhdr_5_t_fget[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { + bcmpkt_erspan3_subhdr_5_t_platform_id_get, + bcmpkt_erspan3_subhdr_5_t_port_id_get, + bcmpkt_erspan3_subhdr_5_t_switch_id_get, + bcmpkt_erspan3_subhdr_5_t_timestamp_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_32_3_0_erspan3_subhdr_5_t_fset[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { + bcmpkt_erspan3_subhdr_5_t_platform_id_set, + bcmpkt_erspan3_subhdr_5_t_port_id_set, + bcmpkt_erspan3_subhdr_5_t_switch_id_set, + bcmpkt_erspan3_subhdr_5_t_timestamp_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_32_3_0_erspan3_subhdr_5_t_field_data[] = { + BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_32_3_0_erspan3_subhdr_5_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_32_3_0_erspan3_subhdr_5_t_field_data, +}; + + +static int32_t bcmpkt_ethertype_t_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ethertype_t_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_32_3_0_ethertype_t_fget[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = { + bcmpkt_ethertype_t_type_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_32_3_0_ethertype_t_fset[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = { + bcmpkt_ethertype_t_type_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_32_3_0_ethertype_t_field_data[] = { + BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_32_3_0_ethertype_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_32_3_0_ethertype_t_field_data, +}; + + +static int32_t bcmpkt_generic_loopback_t_destination_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_destination_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_destination_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_destination_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_entropy_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_entropy_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_header_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_header_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_input_priority_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_input_priority_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_ctrl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 4, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_ctrl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 4, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 28, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_qos_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_qos_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_source_system_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_source_system_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_start_byte_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_start_byte_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_32_3_0_generic_loopback_t_fget[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { + bcmpkt_generic_loopback_t_destination_obj_get, + bcmpkt_generic_loopback_t_destination_type_get, + bcmpkt_generic_loopback_t_entropy_obj_get, + bcmpkt_generic_loopback_t_flags_get, + bcmpkt_generic_loopback_t_header_type_get, + bcmpkt_generic_loopback_t_input_priority_get, + bcmpkt_generic_loopback_t_interface_ctrl_get, + bcmpkt_generic_loopback_t_interface_obj_get, + bcmpkt_generic_loopback_t_processing_ctrl_0_get, + bcmpkt_generic_loopback_t_processing_ctrl_1_get, + bcmpkt_generic_loopback_t_qos_obj_get, + bcmpkt_generic_loopback_t_reserved_1_get, + bcmpkt_generic_loopback_t_reserved_2_get, + bcmpkt_generic_loopback_t_source_system_port_get, + bcmpkt_generic_loopback_t_start_byte_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_32_3_0_generic_loopback_t_fset[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { + bcmpkt_generic_loopback_t_destination_obj_set, + bcmpkt_generic_loopback_t_destination_type_set, + bcmpkt_generic_loopback_t_entropy_obj_set, + bcmpkt_generic_loopback_t_flags_set, + bcmpkt_generic_loopback_t_header_type_set, + bcmpkt_generic_loopback_t_input_priority_set, + bcmpkt_generic_loopback_t_interface_ctrl_set, + bcmpkt_generic_loopback_t_interface_obj_set, + bcmpkt_generic_loopback_t_processing_ctrl_0_set, + bcmpkt_generic_loopback_t_processing_ctrl_1_set, + bcmpkt_generic_loopback_t_qos_obj_set, + bcmpkt_generic_loopback_t_reserved_1_set, + bcmpkt_generic_loopback_t_reserved_2_set, + bcmpkt_generic_loopback_t_source_system_port_set, + bcmpkt_generic_loopback_t_start_byte_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_32_3_0_generic_loopback_t_field_data[] = { + BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_32_3_0_generic_loopback_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_32_3_0_generic_loopback_t_field_data, +}; + + +static int32_t bcmpkt_icmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_icmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_icmp_t_code_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_icmp_t_code_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_icmp_t_icmp_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_icmp_t_icmp_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_32_3_0_icmp_t_fget[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T_FID_COUNT] = { + bcmpkt_icmp_t_checksum_get, + bcmpkt_icmp_t_code_get, + bcmpkt_icmp_t_icmp_type_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_32_3_0_icmp_t_fset[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T_FID_COUNT] = { + bcmpkt_icmp_t_checksum_set, + bcmpkt_icmp_t_code_set, + bcmpkt_icmp_t_icmp_type_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_32_3_0_icmp_t_field_data[] = { + BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_32_3_0_icmp_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_32_3_0_icmp_t_field_data, +}; + + +static int32_t bcmpkt_ipfix_t_export_time_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_export_time_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipfix_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipfix_t_obs_domain_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_obs_domain_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ipfix_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_32_3_0_ipfix_t_fget[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_FID_COUNT] = { + bcmpkt_ipfix_t_export_time_get, + bcmpkt_ipfix_t_length_get, + bcmpkt_ipfix_t_obs_domain_id_get, + bcmpkt_ipfix_t_sequence_num_get, + bcmpkt_ipfix_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_32_3_0_ipfix_t_fset[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_FID_COUNT] = { + bcmpkt_ipfix_t_export_time_set, + bcmpkt_ipfix_t_length_set, + bcmpkt_ipfix_t_obs_domain_id_set, + bcmpkt_ipfix_t_sequence_num_set, + bcmpkt_ipfix_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_32_3_0_ipfix_t_field_data[] = { + BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_32_3_0_ipfix_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_32_3_0_ipfix_t_field_data, +}; + + +static int32_t bcmpkt_ipv4_t_da_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_da_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_flags_frag_offset_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_flags_frag_offset_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_hdr_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_hdr_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_option_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_option_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_protocol_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_protocol_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_sa_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_sa_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_tos_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_tos_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_total_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_total_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_ttl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_ttl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_version_hdr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_version_hdr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_32_3_0_ipv4_t_fget[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_FID_COUNT] = { + bcmpkt_ipv4_t_da_get, + bcmpkt_ipv4_t_flags_frag_offset_get, + bcmpkt_ipv4_t_hdr_checksum_get, + bcmpkt_ipv4_t_id_get, + bcmpkt_ipv4_t_option_get, + bcmpkt_ipv4_t_protocol_get, + bcmpkt_ipv4_t_sa_get, + bcmpkt_ipv4_t_tos_get, + bcmpkt_ipv4_t_total_length_get, + bcmpkt_ipv4_t_ttl_get, + bcmpkt_ipv4_t_version_hdr_len_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_32_3_0_ipv4_t_fset[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_FID_COUNT] = { + bcmpkt_ipv4_t_da_set, + bcmpkt_ipv4_t_flags_frag_offset_set, + bcmpkt_ipv4_t_hdr_checksum_set, + bcmpkt_ipv4_t_id_set, + bcmpkt_ipv4_t_option_set, + bcmpkt_ipv4_t_protocol_set, + bcmpkt_ipv4_t_sa_set, + bcmpkt_ipv4_t_tos_set, + bcmpkt_ipv4_t_total_length_set, + bcmpkt_ipv4_t_ttl_set, + bcmpkt_ipv4_t_version_hdr_len_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_32_3_0_ipv4_t_field_data[] = { + BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_32_3_0_ipv4_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_32_3_0_ipv4_t_field_data, +}; + + +static int32_t bcmpkt_ipv6_t_da_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_da_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_flow_label_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 20); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_flow_label_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 20, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_hop_limit_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 8); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_hop_limit_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 8, 8); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_payload_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_payload_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_sa_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_sa_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_traffic_class_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 8); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_traffic_class_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_32_3_0_ipv6_t_fget[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_FID_COUNT] = { + bcmpkt_ipv6_t_da_get, + bcmpkt_ipv6_t_flow_label_get, + bcmpkt_ipv6_t_hop_limit_get, + bcmpkt_ipv6_t_next_header_get, + bcmpkt_ipv6_t_payload_length_get, + bcmpkt_ipv6_t_sa_get, + bcmpkt_ipv6_t_traffic_class_get, + bcmpkt_ipv6_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_32_3_0_ipv6_t_fset[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_FID_COUNT] = { + bcmpkt_ipv6_t_da_set, + bcmpkt_ipv6_t_flow_label_set, + bcmpkt_ipv6_t_hop_limit_set, + bcmpkt_ipv6_t_next_header_set, + bcmpkt_ipv6_t_payload_length_set, + bcmpkt_ipv6_t_sa_set, + bcmpkt_ipv6_t_traffic_class_set, + bcmpkt_ipv6_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_32_3_0_ipv6_t_field_data[] = { + BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_32_3_0_ipv6_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_32_3_0_ipv6_t_field_data, +}; + + +static int32_t bcmpkt_l2_t_macda_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_l2_t_macda_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_l2_t_macsa_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_l2_t_macsa_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_32_3_0_l2_t_fget[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_L2_T_FID_COUNT] = { + bcmpkt_l2_t_macda_get, + bcmpkt_l2_t_macsa_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_32_3_0_l2_t_fset[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_L2_T_FID_COUNT] = { + bcmpkt_l2_t_macda_set, + bcmpkt_l2_t_macsa_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_32_3_0_l2_t_field_data[] = { + BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_32_3_0_l2_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_L2_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_32_3_0_l2_t_field_data, +}; + + +static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_32_3_0_mirror_erspan_sn_t_fget[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { + bcmpkt_mirror_erspan_sn_t_seq_num_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_32_3_0_mirror_erspan_sn_t_fset[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { + bcmpkt_mirror_erspan_sn_t_seq_num_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_32_3_0_mirror_erspan_sn_t_field_data[] = { + BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_32_3_0_mirror_erspan_sn_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_32_3_0_mirror_erspan_sn_t_field_data, +}; + + +static int32_t bcmpkt_mirror_transport_t_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_mirror_transport_t_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_32_3_0_mirror_transport_t_fget[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { + bcmpkt_mirror_transport_t_data_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_32_3_0_mirror_transport_t_fset[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { + bcmpkt_mirror_transport_t_data_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_32_3_0_mirror_transport_t_field_data[] = { + BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_32_3_0_mirror_transport_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_32_3_0_mirror_transport_t_field_data, +}; + + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[4], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[4], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[4], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[4], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_0_t_fget[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get, + bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get, + bcmpkt_psamp_mirror_on_drop_0_t_length_get, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get, + bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get, + bcmpkt_psamp_mirror_on_drop_0_t_template_id_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_0_t_fset[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set, + bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set, + bcmpkt_psamp_mirror_on_drop_0_t_length_set, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set, + bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set, + bcmpkt_psamp_mirror_on_drop_0_t_template_id_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_0_t_field_data[] = { + BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_0_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_0_t_field_data, +}; + + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 6); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 6, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_smod_state_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 22, 2); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_smod_state_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 22, 2, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_3_t_fget[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get, + bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get, + bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get, + bcmpkt_psamp_mirror_on_drop_3_t_smod_state_get, + bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get, + bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get, + bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_3_t_fset[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set, + bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set, + bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set, + bcmpkt_psamp_mirror_on_drop_3_t_smod_state_set, + bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set, + bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set, + bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_3_t_field_data[] = { + BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_3_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_3_t_field_data, +}; + + +static int32_t bcmpkt_rarp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_rarp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_rarp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_operation_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_rarp_t_operation_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_rarp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_rarp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_32_3_0_rarp_t_fget[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_FID_COUNT] = { + bcmpkt_rarp_t_hardware_len_get, + bcmpkt_rarp_t_hardware_type_get, + bcmpkt_rarp_t_operation_get, + bcmpkt_rarp_t_prot_addr_len_get, + bcmpkt_rarp_t_protocol_type_get, + bcmpkt_rarp_t_sender_ha_get, + bcmpkt_rarp_t_sender_ip_get, + bcmpkt_rarp_t_target_ha_get, + bcmpkt_rarp_t_target_ip_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_32_3_0_rarp_t_fset[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_FID_COUNT] = { + bcmpkt_rarp_t_hardware_len_set, + bcmpkt_rarp_t_hardware_type_set, + bcmpkt_rarp_t_operation_set, + bcmpkt_rarp_t_prot_addr_len_set, + bcmpkt_rarp_t_protocol_type_set, + bcmpkt_rarp_t_sender_ha_set, + bcmpkt_rarp_t_sender_ip_set, + bcmpkt_rarp_t_target_ha_set, + bcmpkt_rarp_t_target_ip_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_32_3_0_rarp_t_field_data[] = { + BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_32_3_0_rarp_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_32_3_0_rarp_t_field_data, +}; + + +static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_first_4bytes_t_src_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_first_4bytes_t_src_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_32_3_0_tcp_first_4bytes_t_fget[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { + bcmpkt_tcp_first_4bytes_t_dst_port_get, + bcmpkt_tcp_first_4bytes_t_src_port_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_32_3_0_tcp_first_4bytes_t_fset[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { + bcmpkt_tcp_first_4bytes_t_dst_port_set, + bcmpkt_tcp_first_4bytes_t_src_port_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_32_3_0_tcp_first_4bytes_t_field_data[] = { + BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_32_3_0_tcp_first_4bytes_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_32_3_0_tcp_first_4bytes_t_field_data, +}; + + +static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_win_size_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_win_size_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_32_3_0_tcp_last_16bytes_t_fget[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { + bcmpkt_tcp_last_16bytes_t_ack_num_get, + bcmpkt_tcp_last_16bytes_t_checksum_get, + bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get, + bcmpkt_tcp_last_16bytes_t_seq_num_get, + bcmpkt_tcp_last_16bytes_t_urgent_ptr_get, + bcmpkt_tcp_last_16bytes_t_win_size_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_32_3_0_tcp_last_16bytes_t_fset[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { + bcmpkt_tcp_last_16bytes_t_ack_num_set, + bcmpkt_tcp_last_16bytes_t_checksum_set, + bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set, + bcmpkt_tcp_last_16bytes_t_seq_num_set, + bcmpkt_tcp_last_16bytes_t_urgent_ptr_set, + bcmpkt_tcp_last_16bytes_t_win_size_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_32_3_0_tcp_last_16bytes_t_field_data[] = { + BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_32_3_0_tcp_last_16bytes_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_32_3_0_tcp_last_16bytes_t_field_data, +}; + + +static int32_t bcmpkt_udp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_udp_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_dst_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_udp_t_src_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_src_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_udp_t_udp_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_udp_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_32_3_0_udp_t_fget[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_FID_COUNT] = { + bcmpkt_udp_t_checksum_get, + bcmpkt_udp_t_dst_port_get, + bcmpkt_udp_t_src_port_get, + bcmpkt_udp_t_udp_length_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_32_3_0_udp_t_fset[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_FID_COUNT] = { + bcmpkt_udp_t_checksum_set, + bcmpkt_udp_t_dst_port_set, + bcmpkt_udp_t_src_port_set, + bcmpkt_udp_t_udp_length_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_32_3_0_udp_t_field_data[] = { + BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_32_3_0_udp_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_32_3_0_udp_t_field_data, +}; + + +static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_32_3_0_unknown_l3_t_fget[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { + bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get, + bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_32_3_0_unknown_l3_t_fset[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { + bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set, + bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_32_3_0_unknown_l3_t_field_data[] = { + BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_32_3_0_unknown_l3_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_32_3_0_unknown_l3_t_field_data, +}; + + +static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_32_3_0_unknown_l4_t_fget[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { + bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_32_3_0_unknown_l4_t_fset[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { + bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_32_3_0_unknown_l4_t_field_data[] = { + BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_32_3_0_unknown_l4_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_32_3_0_unknown_l4_t_field_data, +}; + + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_32_3_0_unknown_l5_t_fget[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { + bcmpkt_unknown_l5_t_l5_bytes_0_1_get, + bcmpkt_unknown_l5_t_l5_bytes_2_3_get, + bcmpkt_unknown_l5_t_l5_bytes_4_7_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_32_3_0_unknown_l5_t_fset[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { + bcmpkt_unknown_l5_t_l5_bytes_0_1_set, + bcmpkt_unknown_l5_t_l5_bytes_2_3_set, + bcmpkt_unknown_l5_t_l5_bytes_4_7_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_32_3_0_unknown_l5_t_field_data[] = { + BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_32_3_0_unknown_l5_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_32_3_0_unknown_l5_t_field_data, +}; + + +static int32_t bcmpkt_vlan_t_cfi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 1); + + return ret; +} + +static int32_t bcmpkt_vlan_t_cfi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 1, val); + return ret; +} + +static int32_t bcmpkt_vlan_t_pcp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 13, 3); + + return ret; +} + +static int32_t bcmpkt_vlan_t_pcp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 13, 3, val); + return ret; +} + +static int32_t bcmpkt_vlan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_vlan_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_vlan_t_vid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 12); + + return ret; +} + +static int32_t bcmpkt_vlan_t_vid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 12, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_32_3_0_vlan_t_fget[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_FID_COUNT] = { + bcmpkt_vlan_t_cfi_get, + bcmpkt_vlan_t_pcp_get, + bcmpkt_vlan_t_tpid_get, + bcmpkt_vlan_t_vid_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_32_3_0_vlan_t_fset[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_FID_COUNT] = { + bcmpkt_vlan_t_cfi_set, + bcmpkt_vlan_t_pcp_set, + bcmpkt_vlan_t_tpid_set, + bcmpkt_vlan_t_vid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_32_3_0_vlan_t_field_data[] = { + BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_32_3_0_vlan_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_32_3_0_vlan_t_field_data, +}; + + +static int32_t bcmpkt_vxlan_t_flags_reserved_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_vxlan_t_flags_reserved_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_vxlan_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 8); + + return ret; +} + +static int32_t bcmpkt_vxlan_t_reserved2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_vxlan_t_vn_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 8, 24); + + return ret; +} + +static int32_t bcmpkt_vxlan_t_vn_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 8, 24, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_32_3_0_vxlan_t_fget[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T_FID_COUNT] = { + bcmpkt_vxlan_t_flags_reserved_1_get, + bcmpkt_vxlan_t_reserved2_get, + bcmpkt_vxlan_t_vn_id_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_32_3_0_vxlan_t_fset[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T_FID_COUNT] = { + bcmpkt_vxlan_t_flags_reserved_1_set, + bcmpkt_vxlan_t_reserved2_set, + bcmpkt_vxlan_t_vn_id_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_32_3_0_vxlan_t_field_data[] = { + BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_32_3_0_vxlan_t_field_info = { + .num_fields = BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T_FID_COUNT, + .info = bcm56890_a0_cna_6_5_32_3_0_vxlan_t_field_data, +}; + +static bcmpkt_flex_pmd_info_t bcm56890_a0_cna_6_5_32_3_0_flexhdr_info_list[BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_FLEXHDR_COUNT] = { + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_cna_6_5_32_3_0_arp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_cna_6_5_32_3_0_arp_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_32_3_0_arp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_cna_6_5_32_3_0_cpu_composites_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_cna_6_5_32_3_0_cpu_composites_0_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_32_3_0_cpu_composites_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_cna_6_5_32_3_0_cpu_composites_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_cna_6_5_32_3_0_cpu_composites_1_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_32_3_0_cpu_composites_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_cna_6_5_32_3_0_ep_nih_header_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_cna_6_5_32_3_0_ep_nih_header_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_32_3_0_ep_nih_header_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_cna_6_5_32_3_0_erspan3_fixed_hdr_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_cna_6_5_32_3_0_erspan3_fixed_hdr_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_32_3_0_erspan3_fixed_hdr_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_cna_6_5_32_3_0_erspan3_subhdr_5_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_cna_6_5_32_3_0_erspan3_subhdr_5_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_32_3_0_erspan3_subhdr_5_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_cna_6_5_32_3_0_ethertype_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_cna_6_5_32_3_0_ethertype_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_32_3_0_ethertype_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_cna_6_5_32_3_0_generic_loopback_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_cna_6_5_32_3_0_generic_loopback_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_32_3_0_generic_loopback_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_cna_6_5_32_3_0_icmp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_cna_6_5_32_3_0_icmp_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_32_3_0_icmp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_cna_6_5_32_3_0_ipfix_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_cna_6_5_32_3_0_ipfix_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_32_3_0_ipfix_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_cna_6_5_32_3_0_ipv4_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_cna_6_5_32_3_0_ipv4_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_32_3_0_ipv4_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_cna_6_5_32_3_0_ipv6_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_cna_6_5_32_3_0_ipv6_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_32_3_0_ipv6_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_cna_6_5_32_3_0_l2_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_cna_6_5_32_3_0_l2_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_32_3_0_l2_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_cna_6_5_32_3_0_mirror_erspan_sn_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_cna_6_5_32_3_0_mirror_erspan_sn_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_32_3_0_mirror_erspan_sn_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_cna_6_5_32_3_0_mirror_transport_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_cna_6_5_32_3_0_mirror_transport_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_32_3_0_mirror_transport_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_0_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_3_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_3_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_3_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_cna_6_5_32_3_0_rarp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_cna_6_5_32_3_0_rarp_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_32_3_0_rarp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_cna_6_5_32_3_0_tcp_first_4bytes_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_cna_6_5_32_3_0_tcp_first_4bytes_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_32_3_0_tcp_first_4bytes_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_cna_6_5_32_3_0_tcp_last_16bytes_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_cna_6_5_32_3_0_tcp_last_16bytes_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_32_3_0_tcp_last_16bytes_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_cna_6_5_32_3_0_udp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_cna_6_5_32_3_0_udp_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_32_3_0_udp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_cna_6_5_32_3_0_unknown_l3_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_cna_6_5_32_3_0_unknown_l3_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_32_3_0_unknown_l3_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_cna_6_5_32_3_0_unknown_l4_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_cna_6_5_32_3_0_unknown_l4_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_32_3_0_unknown_l4_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_cna_6_5_32_3_0_unknown_l5_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_cna_6_5_32_3_0_unknown_l5_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_32_3_0_unknown_l5_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_cna_6_5_32_3_0_vlan_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_cna_6_5_32_3_0_vlan_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_32_3_0_vlan_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_cna_6_5_32_3_0_vxlan_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_cna_6_5_32_3_0_vxlan_t_fget, + .flex_fset = bcm56890_a0_cna_6_5_32_3_0_vxlan_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_cna_6_5_32_3_0_rxpmd_flex_field_info, + .reasons_info = &bcm56890_a0_cna_6_5_32_3_0_rxpmd_flex_reasons_info, + .flex_common_fget = bcm56890_a0_rxpmd_flex_fget, + .flex_common_fset = bcm56890_a0_rxpmd_flex_fset, + }, +}; + +static shr_enum_map_t bcm56890_a0_cna_6_5_32_3_0_flexhdr_id_map[] = { + BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_FLEXHDR_NAME_MAP_INIT +}; + +shr_enum_map_t * bcm56890_a0_cna_6_5_32_3_0_flexhdr_map_get(void) +{ + return bcm56890_a0_cna_6_5_32_3_0_flexhdr_id_map; +} + +bcmpkt_flex_pmd_info_t * bcm56890_a0_cna_6_5_32_3_0_flex_pmd_info_get(uint32_t hid) +{ + if (hid >= BCM56890_A0_CNA_6_5_32_3_0_BCMPKT_FLEXHDR_COUNT) { + return NULL; + } + + return &bcm56890_a0_cna_6_5_32_3_0_flexhdr_info_list[hid]; +} + +int bcm56890_a0_cna_6_5_32_3_0_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = { + 7, + -1, + -1, + 26, +}; diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/xfcr/bcm56890_a0/dna_6_5_32_4_0/bcm56890_a0_dna_6_5_32_4_0_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/xfcr/bcm56890_a0/dna_6_5_32_4_0/bcm56890_a0_dna_6_5_32_4_0_bcmpkt_rxpmd_match_id.c new file mode 100644 index 00000000000..061fc839c4c --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/xfcr/bcm56890_a0/dna_6_5_32_4_0/bcm56890_a0_dna_6_5_32_4_0_bcmpkt_rxpmd_match_id.c @@ -0,0 +1,7128 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) bcm56890_a0_dna_6_5_32_4_0_sf_match_id_info.yml + * for device bcm56890_a0 and variant dna_6_5_32_4_0. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + + +#include +#include + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_cntag[1] = +{ + 0x366c, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_itag[1] = +{ + 0x78f0, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_l2[1] = +{ + 0x1fffe, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_otag[1] = +{ + 0xff00, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_snap_or_llc[1] = +{ + 0x1e4c8, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_arp[1] = +{ + 0x4, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_1[39] = +{ + 0x10, + 0x400000, + 0x1dd8000, + 0x20, + 0x0, + 0x0, + 0x0, + 0xbfddfddf, + 0xf77fbbfb, + 0xddfddf77, + 0x1, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x400000, + 0x0, + 0x100, + 0x800776, + 0x0, + 0x0, + 0x0, + 0xf77c0000, + 0xefeeff77, + 0x7ddfddfe, + 0x777f7, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_2[55] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x1dde, + 0x0, + 0x0, + 0x7778, + 0x0, + 0x0, + 0x1dde0, + 0x0, + 0xbc000000, + 0x3b, + 0x0, + 0x0, + 0x3bbc0, + 0x0, + 0x0, + 0x77780, + 0x0, + 0x0, + 0x3bbc0000, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x77780000, + 0x0, + 0x0, + 0xdde00000, + 0x1, + 0x0, + 0x77800000, + 0x7, + 0x0, + 0xeef000, + 0x0, + 0x0, + 0xef000000, + 0xe, + 0x0, + 0xde000000, + 0x1d, + 0x0, + 0x0, + 0xeef0, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_bfd[57] = +{ + 0x0, + 0x0, + 0x100000, + 0x1000000, + 0x0, + 0x0, + 0x2000, + 0x100100, + 0x4002002, + 0x10010040, + 0x400400, + 0x10008008, + 0x40040100, + 0x1001000, + 0x40040020, + 0x100100, + 0x4002002, + 0x80080040, + 0x200200, + 0x2002000, + 0x80040040, + 0x200800, + 0x4004002, + 0x80080, + 0x401001, + 0x2001004, + 0x40040020, + 0x800800, + 0x2002, + 0x0, + 0x0, + 0x40, + 0x400, + 0x0, + 0x80000000, + 0x4000000, + 0x80080040, + 0x1001000, + 0x10004004, + 0x200100, + 0x4004002, + 0x40010010, + 0x800400, + 0x4010010, + 0x80080040, + 0x1001000, + 0x8020020, + 0x80000080, + 0x1000800, + 0x20020010, + 0x80080, + 0x2001001, + 0x40040020, + 0x40100100, + 0x800800, + 0x20010010, + 0x80080200, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_1[42] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xff77f77c, + 0xddfeefee, + 0x77f77ddf, + 0x7, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xddf00000, + 0xbfbbfddf, + 0xf77f77fb, + 0x1ddfdd, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_2[55] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x1dde000, + 0x0, + 0x0, + 0x7778000, + 0x0, + 0x0, + 0x1dde0000, + 0x0, + 0x0, + 0x3bbc0, + 0x0, + 0x0, + 0x3bbc0000, + 0x0, + 0x0, + 0x77780000, + 0x0, + 0x0, + 0xc0000000, + 0x3bb, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x80000000, + 0x777, + 0x0, + 0x0, + 0x1dde, + 0x0, + 0x0, + 0x7778, + 0x0, + 0xef000000, + 0xe, + 0x0, + 0x0, + 0xeef0, + 0x0, + 0x0, + 0x1dde0, + 0x0, + 0x0, + 0xeef0000, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_esp_ext[55] = +{ + 0x0, + 0x0, + 0x0, + 0x40, + 0x0, + 0x0, + 0x0, + 0x2000000, + 0x0, + 0x0, + 0x8000000, + 0x0, + 0x0, + 0x20000008, + 0x0, + 0x0, + 0x40000, + 0x0, + 0x0, + 0x40000000, + 0x0, + 0x0, + 0x80000000, + 0x0, + 0x0, + 0x0, + 0x400, + 0x0, + 0x0, + 0x0, + 0x0, + 0x1000000, + 0x0, + 0x0, + 0x0, + 0x0, + 0x800, + 0x0, + 0x0, + 0x2000, + 0x0, + 0x200000, + 0x8000, + 0x0, + 0x0, + 0x10, + 0x0, + 0x0, + 0x10000, + 0x0, + 0x0, + 0x20000, + 0x0, + 0x0, + 0x10000000, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ethertype[29] = +{ + 0x1e, + 0x400000, + 0x1dd8000, + 0x3ddcafe0, + 0x0, + 0x8000, + 0xc003bb00, + 0xbfddfddf, + 0xf77fbbfb, + 0xddfddf77, + 0xff77f77d, + 0xddfeefee, + 0x77f77ddf, + 0xfddfddff, + 0x77f77fbb, + 0xbfddfddf, + 0xf77fbbfb, + 0xefeeff77, + 0x7fbbfbbe, + 0xfbbfbbe5, + 0xeff77f77, + 0xbfbbeefe, + 0xf77f77fb, + 0xdfeefeef, + 0x7f77ddfd, + 0xfbbfddf7, + 0x77f77fbb, + 0xbeefeeff, + 0x1bbbfb, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_1[45] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xfddfddf0, + 0x77f77fbb, + 0x1ddfddf, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x77c00000, + 0xfeeff77f, + 0xf77ddfdd, + 0x777, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_2[56] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xbc000000, + 0x3b, + 0x0, + 0xf0000000, + 0xee, + 0x0, + 0x0, + 0x0, + 0x0, + 0x77780000, + 0x0, + 0x0, + 0x80000000, + 0x777, + 0x0, + 0x0, + 0xeef, + 0x0, + 0x0, + 0x777800, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xeef000, + 0x0, + 0x0, + 0x3bbc000, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x1dde0, + 0x0, + 0x0, + 0x1dde0000, + 0x0, + 0x0, + 0x3bbc0000, + 0x0, + 0x0, + 0xe0000000, + 0x1dd, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_1[48] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xbe000000, + 0xf77fbbfb, + 0xefeeff77, + 0x3bbfbbe, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xefeef800, + 0xfddfddfe, + 0xeefbbfbb, + 0xeef, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_2[56] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x3bbc0, + 0x0, + 0x0, + 0xeef00, + 0x0, + 0xc0000000, + 0x3bb, + 0x0, + 0x80000000, + 0x777, + 0x0, + 0x0, + 0x777800, + 0x0, + 0x0, + 0xeef000, + 0x0, + 0x0, + 0x77800000, + 0x7, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xef000000, + 0xe, + 0x0, + 0xbc000000, + 0x3b, + 0x0, + 0xeef0000, + 0x0, + 0x0, + 0x1dde0000, + 0x0, + 0x0, + 0xe0000000, + 0x1dd, + 0x0, + 0xc0000000, + 0x3bb, + 0x0, + 0x0, + 0x1dde00, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_icmp[57] = +{ + 0x0, + 0x400000, + 0x0, + 0x80, + 0x0, + 0x8000, + 0x0, + 0x8004004, + 0x140080, + 0x400001, + 0x20010010, + 0x500200, + 0x1000004, + 0x80040040, + 0x1001400, + 0x8004000, + 0x100080, + 0x2002801, + 0x4008000, + 0x80080, + 0x2801001, + 0x8000020, + 0x100100, + 0x5002002, + 0x10000040, + 0x80080000, + 0x1001000, + 0x20028, + 0x80, + 0x0, + 0x100, + 0x2000000, + 0x0, + 0x0, + 0x2, + 0x100000, + 0x2002001, + 0x40050, + 0x400100, + 0x8008004, + 0x100140, + 0x1000400, + 0x50020010, + 0x400, + 0x2002001, + 0xa0040040, + 0x800, + 0x2001002, + 0x40040020, + 0x800a00, + 0x4002000, + 0x80080040, + 0x1001400, + 0x4000, + 0x40020020, + 0xa00400, + 0x2000008, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_header[48] = +{ + 0x0, + 0x0, + 0x0, + 0xaf00, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x78000000, + 0x5, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xbc000000, + 0x2, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x15e000, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_metadata_base[48] = +{ + 0x0, + 0x0, + 0x0, + 0x8800, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x40000000, + 0x4, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x20000000, + 0x2, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x110000, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_igmp[36] = +{ + 0x0, + 0x0, + 0x0, + 0x40020, + 0x0, + 0x0, + 0x40000000, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x800000, + 0x10, + 0x0, + 0x0, + 0x10000, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv4[36] = +{ + 0x18, + 0x400000, + 0x1dd8000, + 0x3ddcafe0, + 0x0, + 0x8000, + 0x4003bb00, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x600000, + 0x0, + 0x100, + 0xbf800776, + 0xf772, + 0x0, + 0xec000002, + 0x1000e, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv6[58] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x80000000, + 0xbfddfddf, + 0xf77fbbfb, + 0xddfddf77, + 0xff77f77d, + 0xddfeefee, + 0x77f77ddf, + 0xfddfddff, + 0x77f77fbb, + 0xbfddfddf, + 0xf77fbbfb, + 0xefeeff77, + 0x7fbbfbbe, + 0xfbbfbbe5, + 0xeff77f77, + 0xbfbbeefe, + 0xf77f77fb, + 0xdfeefeef, + 0x7f77ddfd, + 0xfbbfddf7, + 0x77f77fbb, + 0xbeefeeff, + 0x3bbfb, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xf77e0000, + 0xefeeff77, + 0x7ddfddfe, + 0xddf777f7, + 0xbfbbfddf, + 0xf77f77fb, + 0x77fddfdd, + 0xfeeff77f, + 0xf77ddfdd, + 0xefeeff77, + 0xfddfddfe, + 0xeefbbfbb, + 0xef95feef, + 0xfddfeefe, + 0xbbfbbfdd, + 0xdfeefeef, + 0xfbbfddfd, + 0x77f77fbb, + 0x77ddfddf, + 0xfeefeeff, + 0xbbfddfdd, + 0xefeefbbf, + 0xe, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_p_1588[58] = +{ + 0x0, + 0x0, + 0x400000, + 0x4000000, + 0x0, + 0x0, + 0x8000, + 0x400400, + 0x10008008, + 0x40040100, + 0x1001000, + 0x40020020, + 0x100400, + 0x4004001, + 0x100080, + 0x400401, + 0x10008008, + 0x200100, + 0x800802, + 0x8008000, + 0x100100, + 0x802002, + 0x10010008, + 0x200200, + 0x1004004, + 0x8004010, + 0x100080, + 0x2002001, + 0x8008, + 0x0, + 0x0, + 0x100, + 0x1000, + 0x0, + 0x0, + 0x10000002, + 0x200100, + 0x4004002, + 0x40010010, + 0x800400, + 0x10010008, + 0x40040, + 0x2001001, + 0x10040040, + 0x200100, + 0x4004002, + 0x20080080, + 0x200, + 0x4002002, + 0x80080040, + 0x200200, + 0x8004004, + 0x100080, + 0x400401, + 0x2002001, + 0x80040040, + 0x200800, + 0x2, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_1[51] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xfbbfbbe0, + 0xeff77f77, + 0xbfbbeefe, + 0x3b, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xef800000, + 0xfddfeefe, + 0xbbfbbfdd, + 0xeefeef, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_2[57] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x77780000, + 0x0, + 0x0, + 0xdde00000, + 0x1, + 0x0, + 0x777800, + 0x0, + 0x0, + 0xeef000, + 0x0, + 0x0, + 0xef000000, + 0xe, + 0x0, + 0xde000000, + 0x1d, + 0x0, + 0x0, + 0xeef0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x1dde0, + 0x0, + 0x0, + 0x77780, + 0x0, + 0xe0000000, + 0x1dd, + 0x0, + 0xc0000000, + 0x3bb, + 0x0, + 0x0, + 0x3bbc00, + 0x0, + 0x0, + 0x777800, + 0x0, + 0x0, + 0xbbc00000, + 0x3, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rarp[29] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x80000, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_1[54] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xf77f77c0, + 0xdfeefeef, + 0x7f77ddfd, + 0x77, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xdf000000, + 0xfbbfddfd, + 0x77f77fbb, + 0x1ddfddf, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_2[57] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x80000000, + 0x777, + 0x0, + 0x0, + 0x1dde, + 0x0, + 0x77800000, + 0x7, + 0x0, + 0xef000000, + 0xe, + 0x0, + 0x0, + 0xeef0, + 0x0, + 0x0, + 0x1dde0, + 0x0, + 0x0, + 0xeef0000, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x1dde0000, + 0x0, + 0x0, + 0x77780000, + 0x0, + 0x0, + 0x1dde00, + 0x0, + 0x0, + 0x3bbc00, + 0x0, + 0x0, + 0xbbc00000, + 0x3, + 0x0, + 0x77800000, + 0x7, + 0x0, + 0x0, + 0x3bbc, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_first_4bytes[57] = +{ + 0x0, + 0x0, + 0x58000, + 0x580e00, + 0x0, + 0x0, + 0xb00, + 0xb0058058, + 0x1600b00, + 0x5805816, + 0xc0160160, + 0x5802c02, + 0x16016058, + 0x580580, + 0x1601600b, + 0xb0058058, + 0x1600b00, + 0x2c02c016, + 0x700b00b0, + 0xb00b00, + 0x2c016016, + 0xb00b02c0, + 0x1601600, + 0x5802c02c, + 0x60160580, + 0xb00581, + 0x1601600b, + 0xb02c02c0, + 0xb00, + 0x0, + 0x0, + 0x38000016, + 0x160, + 0x0, + 0x2c000000, + 0x1600000, + 0x2c02c016, + 0x60580580, + 0x5801601, + 0xb00b0058, + 0x81601600, + 0x16005805, + 0x802c0160, + 0x1605805, + 0x2c02c016, + 0x580580, + 0x2c0b00b, + 0x2c01c02c, + 0x805802c0, + 0xb00b005, + 0x5802c02c, + 0xb00580, + 0x1601600b, + 0x16058058, + 0x802c02c0, + 0xb005805, + 0x2c02c0b0, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_last_16bytes[57] = +{ + 0x0, + 0x0, + 0x50000, + 0x500c00, + 0x0, + 0x0, + 0xa00, + 0xa0050050, + 0x1400a00, + 0x5005014, + 0x80140140, + 0x5002802, + 0x14014050, + 0x500500, + 0x1401400a, + 0xa0050050, + 0x1400a00, + 0x28028014, + 0x600a00a0, + 0xa00a00, + 0x28014014, + 0xa00a0280, + 0x1401400, + 0x50028028, + 0x40140500, + 0xa00501, + 0x1401400a, + 0xa0280280, + 0xa00, + 0x0, + 0x0, + 0x30000014, + 0x140, + 0x0, + 0x28000000, + 0x1400000, + 0x28028014, + 0x40500500, + 0x5001401, + 0xa00a0050, + 0x1401400, + 0x14005005, + 0x280140, + 0x1405005, + 0x28028014, + 0x500500, + 0x280a00a, + 0x28018028, + 0x500280, + 0xa00a005, + 0x50028028, + 0xa00500, + 0x1401400a, + 0x14050050, + 0x280280, + 0xa005005, + 0x280280a0, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_udp[58] = +{ + 0x0, + 0x0, + 0xd80000, + 0xd80a000, + 0x0, + 0x0, + 0x1b000, + 0xd80d80, + 0x3601b01b, + 0xd80d8360, + 0x3603600, + 0xd806c06c, + 0x60360d80, + 0xd80d803, + 0x603601b0, + 0xd80d83, + 0x3601b01b, + 0xc06c0360, + 0x1b01b06, + 0x1b01b005, + 0xc0360360, + 0x1b06c06, + 0x3603601b, + 0x806c06c0, + 0x360d80d, + 0x1b00d836, + 0x603601b0, + 0x6c06c03, + 0x1b01b, + 0x0, + 0x0, + 0x80000360, + 0x3602, + 0x0, + 0xc0000000, + 0x36000006, + 0xc06c0360, + 0xd80d806, + 0xd8036036, + 0x1b00d80, + 0x3603601b, + 0x600d80d8, + 0x6c03603, + 0x360d80d8, + 0xc06c0360, + 0xd80d806, + 0x6c1b01b0, + 0xc01406c0, + 0xd806c06, + 0xb01b00d8, + 0x806c06c1, + 0x1b00d80d, + 0x603601b0, + 0x60d80d83, + 0x6c06c03, + 0xb00d80d8, + 0xc06c1b01, + 0x6, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l3[29] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x100000, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l4[58] = +{ + 0x0, + 0x0, + 0x1000000, + 0x10000000, + 0x0, + 0x0, + 0x20000, + 0x1001000, + 0x40020020, + 0x100400, + 0x4004001, + 0x80080, + 0x401001, + 0x10010004, + 0x400200, + 0x1001004, + 0x40020020, + 0x800400, + 0x2002008, + 0x20020000, + 0x400400, + 0x2008008, + 0x40040020, + 0x800800, + 0x4010010, + 0x20010040, + 0x400200, + 0x8008004, + 0x20020, + 0x0, + 0x0, + 0x400, + 0x4000, + 0x0, + 0x0, + 0x40000008, + 0x800400, + 0x10010008, + 0x40040, + 0x2001001, + 0x40040020, + 0x100100, + 0x8004004, + 0x40100100, + 0x800400, + 0x10010008, + 0x80200200, + 0x800, + 0x10008008, + 0x200100, + 0x800802, + 0x20010010, + 0x400200, + 0x1001004, + 0x8008004, + 0x100100, + 0x802002, + 0x8, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l5[58] = +{ + 0x0, + 0x0, + 0x840000, + 0x8400000, + 0x0, + 0x0, + 0x10800, + 0x80840840, + 0x21010810, + 0x84084210, + 0x2102100, + 0x84042042, + 0x10210840, + 0x8408402, + 0x10210108, + 0x80840842, + 0x21010810, + 0x20420210, + 0x1081084, + 0x10810800, + 0x20210210, + 0x81084204, + 0x21021010, + 0x40420420, + 0x2108408, + 0x10808421, + 0x10210108, + 0x84204202, + 0x10810, + 0x0, + 0x0, + 0x210, + 0x2100, + 0x0, + 0x20000000, + 0x21000004, + 0x20420210, + 0x8408404, + 0x84021021, + 0x81080840, + 0x21021010, + 0x10084084, + 0x4202102, + 0x21084084, + 0x20420210, + 0x8408404, + 0x42108108, + 0x20000420, + 0x8404204, + 0x8108084, + 0x40420421, + 0x10808408, + 0x10210108, + 0x10840842, + 0x4204202, + 0x8084084, + 0x20421081, + 0x4, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_1[58] = +{ + 0x0, + 0x0, + 0x0, + 0x20000000, + 0x0, + 0x8000, + 0x4003bb00, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xfbbe0000, + 0x77f77fbb, + 0xbeefeeff, + 0x3bbfb, + 0x0, + 0x0, + 0x0, + 0x8000, + 0x0, + 0xec000002, + 0x1000e, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xfeefeef8, + 0xbbfddfdd, + 0xefeefbbf, + 0xe, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_2[58] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xdde00000, + 0x1, + 0x0, + 0x77800000, + 0x7, + 0x0, + 0x1dde000, + 0x0, + 0x0, + 0x3bbc000, + 0x0, + 0x0, + 0xbc000000, + 0x3b, + 0x0, + 0x78000000, + 0x77, + 0x0, + 0x0, + 0x3bbc0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x77780, + 0x0, + 0x0, + 0x1dde00, + 0x0, + 0x80000000, + 0x777, + 0x0, + 0x0, + 0xeef, + 0x0, + 0x0, + 0xeef000, + 0x0, + 0x0, + 0x1dde000, + 0x0, + 0x0, + 0xef000000, + 0xe, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_cntag[4] = +{ + 0x33033198, + 0xcc66066, + 0x198198cc, + 0x6633033, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_gbp_ethernet_shim[4] = +{ + 0x44044220, + 0x11088088, + 0x22022110, + 0x8844044, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_base[4] = +{ + 0xffc00000, + 0xffffffff, + 0xffe00000, + 0x7fffffff, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_ext_0[4] = +{ + 0x0, + 0xfffff800, + 0x0, + 0x7ffffc00, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_itag[4] = +{ + 0xf80f87c0, + 0x3e1f01f0, + 0x7c07c3e0, + 0x1f0f80f8, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_l2[4] = +{ + 0xfffffffe, + 0xffffffff, + 0xffffffff, + 0x7fffffff, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_otag[4] = +{ + 0x1ff800, + 0x7fe003ff, + 0x800ffc00, + 0x3ff001ff, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_snap_or_llc[4] = +{ + 0xa23a2510, + 0xe8944744, + 0x511d1288, + 0x744a23a2, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_svtag[4] = +{ + 0x0, + 0x0, + 0xffffffff, + 0x7fffffff, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_arp[1] = +{ + 0x4, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_1[13] = +{ + 0x10, + 0x0, + 0x4, + 0x20003df6, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xf7fbef80, + 0xfbfdf7fd, + 0x7dfefbfe, + 0xf7dfefbf, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_2[34] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x7bef00, + 0x0, + 0x0, + 0x0, + 0x1efbc, + 0x0, + 0x0, + 0xf0000000, + 0x7be, + 0x0, + 0x0, + 0xfbc00000, + 0x1e, + 0x0, + 0x0, + 0xc0000000, + 0x1efb, + 0x0, + 0x0, + 0xf7800000, + 0x3d, + 0x0, + 0x0, + 0xe0000000, + 0xf7d, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_bfd[38] = +{ + 0x0, + 0x0, + 0x0, + 0x40, + 0x0, + 0x10, + 0x0, + 0x0, + 0x8000, + 0x40008000, + 0x20004000, + 0x10002000, + 0x1000200, + 0x1000200, + 0x800100, + 0x400080, + 0x40008, + 0x40008, + 0x40004, + 0x20004002, + 0x20000000, + 0x10001000, + 0x8000800, + 0x800400, + 0x40, + 0x100020, + 0x80010, + 0x80040008, + 0x40004000, + 0x20002000, + 0x10001000, + 0x1000800, + 0x100080, + 0x80010, + 0x40008, + 0x80040008, + 0x80004000, + 0x888888, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_1[17] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xf7dfefbe, + 0xfbeff7df, + 0xfdf7fbef, + 0x3df7fbe, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_2[34] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xf7800000, + 0x3d, + 0x0, + 0x0, + 0xf7de0000, + 0x0, + 0x0, + 0x0, + 0x3df7800, + 0x0, + 0x0, + 0x0, + 0xf7de0, + 0x0, + 0x0, + 0x0, + 0xf7de000, + 0x0, + 0x0, + 0x0, + 0x1efbc0, + 0x0, + 0x0, + 0x0, + 0x7bef000, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_esp_ext[34] = +{ + 0x0, + 0x0, + 0x0, + 0x40000000, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x40, + 0x0, + 0x0, + 0x0, + 0x1, + 0x0, + 0x4000000, + 0x4000000, + 0x0, + 0x0, + 0x0, + 0x100000, + 0x0, + 0x0, + 0x0, + 0x10000000, + 0x0, + 0x0, + 0x0, + 0x200000, + 0x0, + 0x0, + 0x0, + 0x8000000, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ethertype[38] = +{ + 0x1e, + 0x0, + 0x4, + 0xe0003df6, + 0xe22fffff, + 0x1f7d, + 0x0, + 0xc00, + 0x7bec00, + 0xf7fbefc0, + 0xfbfdf7fd, + 0x7dfefbfe, + 0xf7dfefbf, + 0xf7dfefbe, + 0xfbeff7df, + 0xfdf7fbef, + 0xffdf7fbe, + 0x7fdf7fbe, + 0xbfdf7fdf, + 0xfbfdf7ef, + 0xfbfffffe, + 0x7dff7dfe, + 0xbeffbeff, + 0xfbefdf7f, + 0xf117fdf7, + 0xff7dfefb, + 0xffbeff7d, + 0xefdf7fbe, + 0xf7fdf7fb, + 0xfbfefbfd, + 0x7dff7dfe, + 0xf7dfbeff, + 0xff7dfbef, + 0xffbeff7d, + 0xf7df7fbe, + 0xefdf7fbe, + 0xfffdf7fb, + 0xfffffff, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_1[21] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xf8000000, + 0x7fdf7fbe, + 0xbfdf7fdf, + 0xfbfdf7ef, + 0x1e, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_2[35] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x3df780, + 0x0, + 0x0, + 0x0, + 0xf7de, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x7de00000, + 0xf, + 0x0, + 0x0, + 0xe0000000, + 0xf7d, + 0x0, + 0x0, + 0xfbc00000, + 0x1e, + 0x0, + 0x0, + 0xf0000000, + 0x7be, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gpe[37] = +{ + 0x0, + 0x0, + 0x0, + 0x180, + 0x0, + 0x60, + 0x0, + 0x0, + 0x30000, + 0x80030000, + 0xc0018001, + 0x6000c000, + 0x6000c00, + 0x6000c00, + 0x3000600, + 0x1800300, + 0x180030, + 0x180030, + 0x180018, + 0xc001800c, + 0xc0000000, + 0x60006000, + 0x30003000, + 0x3001800, + 0x180, + 0x6000c0, + 0x300060, + 0x180030, + 0x80018003, + 0xc000c001, + 0x60006000, + 0x6003000, + 0x600300, + 0x300060, + 0x180030, + 0x180030, + 0x18003, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre[21] = +{ + 0x0, + 0x0, + 0x0, + 0x80000000, + 0x7fff, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x1fffe0, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_chksum[21] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x1fe, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x7f80, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_key[21] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x1e3c, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x78f00, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_rout[21] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x5568, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x155a00, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_seq[21] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x79b0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x1e6c00, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_1[25] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xfbe00000, + 0x7dff7dfe, + 0xbeffbeff, + 0xfbefdf7f, + 0x3df7, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_2[35] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xfbc00000, + 0x1e, + 0x0, + 0x0, + 0x7bef0000, + 0x0, + 0x0, + 0x78000000, + 0x3df, + 0x0, + 0x0, + 0x0, + 0x7bef0, + 0x0, + 0x0, + 0x0, + 0x7bef000, + 0x0, + 0x0, + 0x0, + 0xf7de0, + 0x0, + 0x0, + 0x0, + 0x3df7800, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_icmp[37] = +{ + 0x0, + 0x0, + 0x4, + 0x0, + 0x8000, + 0x0, + 0x0, + 0x400, + 0x0, + 0x1000200, + 0x800100, + 0x4000a0, + 0x40000, + 0x40008, + 0x80020004, + 0x10002, + 0x20001000, + 0x10001000, + 0x8001400, + 0x800000, + 0x800000, + 0x400040, + 0x280020, + 0x10, + 0x80004001, + 0x40004000, + 0x28002000, + 0x1000, + 0x1000100, + 0x800080, + 0x500040, + 0x20, + 0x40000002, + 0x20002000, + 0x24001000, + 0x1000, + 0x100, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_header[25] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x22f0000, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x1178000, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_metadata_base[25] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x2080000, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x1040000, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_igmp[8] = +{ + 0x0, + 0x0, + 0x0, + 0x20000000, + 0x20000000, + 0x0, + 0x0, + 0x800, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ioam_e2e[37] = +{ + 0x0, + 0x0, + 0x0, + 0x100, + 0x0, + 0x40, + 0x0, + 0x0, + 0x20000, + 0x20000, + 0x80010001, + 0x40008000, + 0x4000800, + 0x4000800, + 0x2000400, + 0x1000200, + 0x100020, + 0x100020, + 0x100010, + 0x80010008, + 0x80000000, + 0x40004000, + 0x20002000, + 0x2001000, + 0x100, + 0x400080, + 0x200040, + 0x100020, + 0x10002, + 0x80008001, + 0x40004000, + 0x4002000, + 0x400200, + 0x200040, + 0x100020, + 0x100020, + 0x10002, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv4[9] = +{ + 0x18, + 0x0, + 0x4, + 0xe0003df6, + 0xe22fffff, + 0x1f7d, + 0x0, + 0xc00, + 0x7bec00, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv6[37] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xf7fbefc0, + 0xfbfdf7fd, + 0x7dfefbfe, + 0xf7dfefbf, + 0xf7dfefbe, + 0xfbeff7df, + 0xfdf7fbef, + 0xffdf7fbe, + 0x7fdf7fbe, + 0xbfdf7fdf, + 0xfbfdf7ef, + 0xfbfffffe, + 0x7dff7dfe, + 0xbeffbeff, + 0xfbefdf7f, + 0xf117fdf7, + 0xff7dfefb, + 0xffbeff7d, + 0xefdf7fbe, + 0xf7fdf7fb, + 0xfbfefbfd, + 0x7dff7dfe, + 0xf7dfbeff, + 0xff7dfbef, + 0xffbeff7d, + 0xf7df7fbe, + 0xefdf7fbe, + 0x3df7fb, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls0[38] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xffc00000, + 0x1ffffff, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls1[38] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xff800000, + 0x1fffff, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls2[38] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xff000000, + 0x1ffff, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls3[38] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xfe000000, + 0x1fff, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls4[38] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xfc000000, + 0x1ff, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls5[38] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xf8000000, + 0x1f, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls6[38] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xf0000000, + 0x1, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_ach[38] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xc0000000, + 0xcccccc, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_cw[38] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x1111111, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_p_1588[38] = +{ + 0x0, + 0x0, + 0x0, + 0x400, + 0x0, + 0x100, + 0x0, + 0x0, + 0x80000, + 0x80000, + 0x40004, + 0x20002, + 0x10002001, + 0x10002000, + 0x8001000, + 0x4000800, + 0x400080, + 0x400080, + 0x400040, + 0x40020, + 0x2, + 0x10002, + 0x80008001, + 0x8004000, + 0x400, + 0x1000200, + 0x800100, + 0x400080, + 0x40008, + 0x20004, + 0x10002, + 0x10008001, + 0x1000800, + 0x800100, + 0x400080, + 0x400080, + 0x40008, + 0x2000000, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_1[29] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xe0000000, + 0xff7dfefb, + 0xffbeff7d, + 0xefdf7fbe, + 0x3df7fb, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_2[36] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x1efbc0, + 0x0, + 0x0, + 0x0, + 0x7bef, + 0x0, + 0x0, + 0x3df7800, + 0x0, + 0x0, + 0x0, + 0xbef00000, + 0x7, + 0x0, + 0x0, + 0xf0000000, + 0x7be, + 0x0, + 0x0, + 0x7de00000, + 0xf, + 0x0, + 0x0, + 0xf0000000, + 0x7be, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rarp[38] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x4000000, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_1[33] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xf7c00000, + 0xfbfefbfd, + 0x7dff7dfe, + 0xf7dfbeff, + 0x7bef, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_2[36] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x7de00000, + 0xf, + 0x0, + 0x0, + 0x3df78000, + 0x0, + 0x0, + 0xbc000000, + 0x1ef, + 0x0, + 0x0, + 0x0, + 0x3df78, + 0x0, + 0x0, + 0x0, + 0x3df7800, + 0x0, + 0x0, + 0x0, + 0x7bef0, + 0x0, + 0x0, + 0x0, + 0x3df7800, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_first_4bytes[37] = +{ + 0x0, + 0x0, + 0x0, + 0x16, + 0x800e0000, + 0x5, + 0x0, + 0x0, + 0x2c00, + 0x16002c00, + 0xb001600, + 0x5800b00, + 0x5800b0, + 0x5800b0, + 0x2c0058, + 0xc016002c, + 0xc0016002, + 0x60016002, + 0xb0016001, + 0xb001600, + 0xb000000, + 0x5800580, + 0x2c002c0, + 0x2c0160, + 0x70016, + 0x8005800b, + 0xc002c005, + 0x2c016002, + 0x16001600, + 0xb000b00, + 0x5800580, + 0x5802c0, + 0x8005802c, + 0xc002c005, + 0xc0016002, + 0x2c016002, + 0x1600, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_last_16bytes[37] = +{ + 0x0, + 0x0, + 0x0, + 0x14, + 0xc0000, + 0x5, + 0x0, + 0x0, + 0x2800, + 0x14002800, + 0xa001400, + 0x5000a00, + 0x5000a0, + 0x5000a0, + 0x280050, + 0x80140028, + 0x80014002, + 0x40014002, + 0xa0014001, + 0xa001400, + 0xa000000, + 0x5000500, + 0x2800280, + 0x280140, + 0x60014, + 0x5000a, + 0x80028005, + 0x28014002, + 0x14001400, + 0xa000a00, + 0x5000500, + 0x500280, + 0x50028, + 0x80028005, + 0x80014002, + 0x28014002, + 0x1400, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_udp[37] = +{ + 0x0, + 0x0, + 0x0, + 0x1de0, + 0x2200000, + 0x778, + 0x0, + 0x0, + 0x3bc000, + 0xe03bc000, + 0xf01de01d, + 0x780ef00e, + 0x7780ef07, + 0x7780ef00, + 0x3bc07780, + 0x1de03bc0, + 0x1de03bc, + 0x1de03bc, + 0x1de01de, + 0xf01de0ef, + 0xf000000e, + 0x7807780e, + 0xbc03bc07, + 0x3bc1de03, + 0x1101de0, + 0x7780ef0, + 0x3bc0778, + 0xc1de03bc, + 0xe01de03b, + 0xf00ef01d, + 0x7807780e, + 0x7783bc07, + 0x7783bc0, + 0x3bc0778, + 0x1de03bc, + 0xc1de03bc, + 0x1de03b, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l3[38] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x8000000, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l4[37] = +{ + 0x0, + 0x0, + 0x0, + 0x2000, + 0x0, + 0x800, + 0x0, + 0x0, + 0x400000, + 0x400000, + 0x200020, + 0x100010, + 0x80010008, + 0x80010000, + 0x40008000, + 0x20004000, + 0x2000400, + 0x2000400, + 0x2000200, + 0x200100, + 0x10, + 0x80010, + 0x40008, + 0x40020004, + 0x2000, + 0x8001000, + 0x4000800, + 0x2000400, + 0x200040, + 0x100020, + 0x80010, + 0x80040008, + 0x8004000, + 0x4000800, + 0x2000400, + 0x2000400, + 0x200040, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l5[37] = +{ + 0x0, + 0x0, + 0x0, + 0x810, + 0x0, + 0x204, + 0x0, + 0x0, + 0x102000, + 0x10102000, + 0x8081008, + 0x4040804, + 0x20404082, + 0x20404080, + 0x10202040, + 0x8101020, + 0x810102, + 0x810102, + 0x80810081, + 0x8081040, + 0x8000004, + 0x4020404, + 0x2010202, + 0x10208101, + 0x810, + 0x2040408, + 0x1020204, + 0x20810102, + 0x10081010, + 0x8040808, + 0x4020404, + 0x20410202, + 0x2041020, + 0x1020204, + 0x810102, + 0x20810102, + 0x81010, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_vxlan[37] = +{ + 0x0, + 0x0, + 0x0, + 0x1000, + 0x0, + 0x400, + 0x0, + 0x0, + 0x200000, + 0x200000, + 0x100010, + 0x80008, + 0x40008004, + 0x40008000, + 0x20004000, + 0x10002000, + 0x1000200, + 0x1000200, + 0x1000100, + 0x100080, + 0x8, + 0x40008, + 0x20004, + 0x20010002, + 0x1000, + 0x4000800, + 0x2000400, + 0x1000200, + 0x100020, + 0x80010, + 0x40008, + 0x40020004, + 0x4002000, + 0x2000400, + 0x1000200, + 0x1000200, + 0x100020, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_1[37] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x1000, + 0x0, + 0xc00, + 0x7bec00, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xf0000000, + 0xffbeff7d, + 0xf7df7fbe, + 0xefdf7fbe, + 0x3df7fb, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_2[37] = +{ + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0, + 0xf7de0000, + 0x0, + 0x0, + 0x0, + 0x3df7800, + 0x0, + 0x0, + 0xfbc00000, + 0x1e, + 0x0, + 0x0, + 0x80000000, + 0x3df7, + 0x0, + 0x0, + 0x0, + 0x3df780, + 0x0, + 0x0, + 0x0, + 0x7bef, + 0x0, + 0x0, + 0x0, + 0x3df780, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_sys_hdr_ep_nih[1] = +{ + 0x4, +}; + +static uint32_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_sys_hdr_loopback[1] = +{ + 0x8, +}; + + +static bcmpkt_rxpmd_match_id_db_t +bcm56890_a0_dna_6_5_32_4_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_COUNT] = { + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_CNTAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_CNTAG", + .match = 0x100, + .match_mask = 0x180, + .match_maxbit = 38, + .match_minbit = 30, + .maxbit = 8, + .minbit = 7, + .value = 0x2, + .pmaxbit = 38, + .pminbit = 30, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM */ + .name = "EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM", + .match = 0x80, + .match_mask = 0x180, + .match_maxbit = 38, + .match_minbit = 30, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 38, + .pminbit = 30, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE */ + .name = "EGRESS_PKT_FWD_L2_HDR_HG3_BASE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 38, + .match_minbit = 30, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 38, + .pminbit = 30, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0 */ + .name = "EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0", + .match = 0x10, + .match_mask = 0x10, + .match_maxbit = 38, + .match_minbit = 30, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 38, + .pminbit = 30, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_ITAG", + .match = 0x40, + .match_mask = 0x40, + .match_maxbit = 38, + .match_minbit = 30, + .maxbit = 6, + .minbit = 6, + .value = 0x1, + .pmaxbit = 38, + .pminbit = 30, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */ + .name = "EGRESS_PKT_FWD_L2_HDR_L2", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 38, + .match_minbit = 30, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 38, + .pminbit = 30, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */ + .name = "EGRESS_PKT_FWD_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0x1ff, + .match_maxbit = 38, + .match_minbit = 30, + .maxbit = 8, + .minbit = 0, + .value = 0x0, + .pmaxbit = 38, + .pminbit = 30, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_OTAG", + .match = 0x20, + .match_mask = 0x20, + .match_maxbit = 38, + .match_minbit = 30, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 38, + .pminbit = 30, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC */ + .name = "EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 38, + .match_minbit = 30, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 38, + .pminbit = 30, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_SVTAG", + .match = 0x8, + .match_mask = 0x8, + .match_maxbit = 38, + .match_minbit = 30, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 38, + .pminbit = 30, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ARP", + .match = 0x4000, + .match_mask = 0x7c006, + .match_maxbit = 57, + .match_minbit = 39, + .maxbit = 16, + .minbit = 14, + .value = 0x1, + .pmaxbit = 57, + .pminbit = 39, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", + .match = 0x10000, + .match_mask = 0x1c000, + .match_maxbit = 57, + .match_minbit = 39, + .maxbit = 16, + .minbit = 14, + .value = 0x4, + .pmaxbit = 57, + .pminbit = 39, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", + .match = 0x140, + .match_mask = 0x7c0, + .match_maxbit = 57, + .match_minbit = 39, + .maxbit = 9, + .minbit = 6, + .value = 0x5, + .pmaxbit = 57, + .pminbit = 39, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_BFD", + .match = 0x3000, + .match_mask = 0x3800, + .match_maxbit = 57, + .match_minbit = 39, + .maxbit = 13, + .minbit = 11, + .value = 0x6, + .pmaxbit = 57, + .pminbit = 39, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1", + .match = 0xc004, + .match_mask = 0x1c406, + .match_maxbit = 57, + .match_minbit = 39, + .maxbit = 16, + .minbit = 14, + .value = 0x3, + .pmaxbit = 57, + .pminbit = 39, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2", + .match = 0x200, + .match_mask = 0x7c0, + .match_maxbit = 57, + .match_minbit = 39, + .maxbit = 9, + .minbit = 6, + .value = 0x8, + .pmaxbit = 57, + .pminbit = 39, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", + .match = 0x40, + .match_mask = 0x7c0, + .match_maxbit = 57, + .match_minbit = 39, + .maxbit = 9, + .minbit = 6, + .value = 0x1, + .pmaxbit = 57, + .pminbit = 39, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 57, + .match_minbit = 39, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 57, + .pminbit = 39, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", + .match = 0x18000, + .match_mask = 0x1c000, + .match_maxbit = 57, + .match_minbit = 39, + .maxbit = 16, + .minbit = 14, + .value = 0x6, + .pmaxbit = 57, + .pminbit = 39, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", + .match = 0x240, + .match_mask = 0x7c0, + .match_maxbit = 57, + .match_minbit = 39, + .maxbit = 9, + .minbit = 6, + .value = 0x9, + .pmaxbit = 57, + .pminbit = 39, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GPE", + .match = 0x30, + .match_mask = 0x438, + .match_maxbit = 57, + .match_minbit = 39, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 57, + .pminbit = 39, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE", + .match = 0x40000, + .match_mask = 0x40000, + .match_maxbit = 57, + .match_minbit = 39, + .maxbit = 18, + .minbit = 18, + .value = 0x1, + .pmaxbit = 57, + .pminbit = 39, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", + .match = 0x80, + .match_mask = 0x7c0, + .match_maxbit = 57, + .match_minbit = 39, + .maxbit = 9, + .minbit = 6, + .value = 0x2, + .pmaxbit = 57, + .pminbit = 39, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", + .match = 0x1800, + .match_mask = 0x3800, + .match_maxbit = 57, + .match_minbit = 39, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 57, + .pminbit = 39, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", + .match = 0x44000, + .match_mask = 0x5c000, + .match_maxbit = 57, + .match_minbit = 39, + .maxbit = 16, + .minbit = 14, + .value = 0x1, + .pmaxbit = 57, + .pminbit = 39, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", + .match = 0x40020, + .match_mask = 0x40020, + .match_maxbit = 57, + .match_minbit = 39, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 57, + .pminbit = 39, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1", + .match = 0x4004, + .match_mask = 0x7c406, + .match_maxbit = 57, + .match_minbit = 39, + .maxbit = 16, + .minbit = 14, + .value = 0x1, + .pmaxbit = 57, + .pminbit = 39, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2", + .match = 0xc0, + .match_mask = 0x7c0, + .match_maxbit = 57, + .match_minbit = 39, + .maxbit = 9, + .minbit = 6, + .value = 0x3, + .pmaxbit = 57, + .pminbit = 39, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ICMP", + .match = 0x800, + .match_mask = 0x3818, + .match_maxbit = 57, + .match_minbit = 39, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 57, + .pminbit = 39, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER", + .match = 0x20000, + .match_mask = 0x20000, + .match_maxbit = 57, + .match_minbit = 39, + .maxbit = 17, + .minbit = 17, + .value = 0x1, + .pmaxbit = 57, + .pminbit = 39, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE", + .match = 0x24000, + .match_mask = 0x3c000, + .match_maxbit = 57, + .match_minbit = 39, + .maxbit = 16, + .minbit = 14, + .value = 0x1, + .pmaxbit = 57, + .pminbit = 39, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IGMP", + .match = 0x100, + .match_mask = 0x7c0, + .match_maxbit = 57, + .match_minbit = 39, + .maxbit = 9, + .minbit = 6, + .value = 0x4, + .pmaxbit = 57, + .pminbit = 39, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E", + .match = 0x1000, + .match_mask = 0x3800, + .match_maxbit = 57, + .match_minbit = 39, + .maxbit = 13, + .minbit = 11, + .value = 0x2, + .pmaxbit = 57, + .pminbit = 39, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV4", + .match = 0x2, + .match_mask = 0x406, + .match_maxbit = 57, + .match_minbit = 39, + .maxbit = 2, + .minbit = 1, + .value = 0x1, + .pmaxbit = 57, + .pminbit = 39, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV6", + .match = 0x4, + .match_mask = 0x406, + .match_maxbit = 57, + .match_minbit = 39, + .maxbit = 2, + .minbit = 1, + .value = 0x2, + .pmaxbit = 57, + .pminbit = 39, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", + .match = 0x400, + .match_mask = 0x400, + .match_maxbit = 57, + .match_minbit = 39, + .maxbit = 10, + .minbit = 10, + .value = 0x1, + .pmaxbit = 57, + .pminbit = 39, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", + .match = 0x402, + .match_mask = 0x402, + .match_maxbit = 57, + .match_minbit = 39, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 57, + .pminbit = 39, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", + .match = 0x404, + .match_mask = 0x404, + .match_maxbit = 57, + .match_minbit = 39, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 57, + .pminbit = 39, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", + .match = 0x408, + .match_mask = 0x408, + .match_maxbit = 57, + .match_minbit = 39, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 57, + .pminbit = 39, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", + .match = 0x410, + .match_mask = 0x410, + .match_maxbit = 57, + .match_minbit = 39, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 57, + .pminbit = 39, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", + .match = 0x420, + .match_mask = 0x420, + .match_maxbit = 57, + .match_minbit = 39, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 57, + .pminbit = 39, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", + .match = 0x440, + .match_mask = 0x440, + .match_maxbit = 57, + .match_minbit = 39, + .maxbit = 6, + .minbit = 6, + .value = 0x1, + .pmaxbit = 57, + .pminbit = 39, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", + .match = 0x480, + .match_mask = 0x480, + .match_maxbit = 57, + .match_minbit = 39, + .maxbit = 7, + .minbit = 7, + .value = 0x1, + .pmaxbit = 57, + .pminbit = 39, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", + .match = 0x500, + .match_mask = 0x500, + .match_maxbit = 57, + .match_minbit = 39, + .maxbit = 8, + .minbit = 8, + .value = 0x1, + .pmaxbit = 57, + .pminbit = 39, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x7ffff, + .match_maxbit = 57, + .match_minbit = 39, + .maxbit = 18, + .minbit = 0, + .value = 0x0, + .pmaxbit = 57, + .pminbit = 39, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_P_1588", + .match = 0x2800, + .match_mask = 0x3800, + .match_maxbit = 57, + .match_minbit = 39, + .maxbit = 13, + .minbit = 11, + .value = 0x5, + .pmaxbit = 57, + .pminbit = 39, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1", + .match = 0x1c000, + .match_mask = 0x1c000, + .match_maxbit = 57, + .match_minbit = 39, + .maxbit = 16, + .minbit = 14, + .value = 0x7, + .pmaxbit = 57, + .pminbit = 39, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2", + .match = 0x280, + .match_mask = 0x7c0, + .match_maxbit = 57, + .match_minbit = 39, + .maxbit = 9, + .minbit = 6, + .value = 0xa, + .pmaxbit = 57, + .pminbit = 39, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_RARP", + .match = 0x8000, + .match_mask = 0x1c006, + .match_maxbit = 57, + .match_minbit = 39, + .maxbit = 16, + .minbit = 14, + .value = 0x2, + .pmaxbit = 57, + .pminbit = 39, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1", + .match = 0x8004, + .match_mask = 0x1c406, + .match_maxbit = 57, + .match_minbit = 39, + .maxbit = 16, + .minbit = 14, + .value = 0x2, + .pmaxbit = 57, + .pminbit = 39, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2", + .match = 0x1c0, + .match_mask = 0x7c0, + .match_maxbit = 57, + .match_minbit = 39, + .maxbit = 9, + .minbit = 6, + .value = 0x7, + .pmaxbit = 57, + .pminbit = 39, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x8, + .match_mask = 0x418, + .match_maxbit = 57, + .match_minbit = 39, + .maxbit = 4, + .minbit = 3, + .value = 0x1, + .pmaxbit = 57, + .pminbit = 39, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x28, + .match_mask = 0x438, + .match_maxbit = 57, + .match_minbit = 39, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 57, + .pminbit = 39, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UDP", + .match = 0x10, + .match_mask = 0x418, + .match_maxbit = 57, + .match_minbit = 39, + .maxbit = 4, + .minbit = 3, + .value = 0x2, + .pmaxbit = 57, + .pminbit = 39, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", + .match = 0xc000, + .match_mask = 0x1c006, + .match_maxbit = 57, + .match_minbit = 39, + .maxbit = 16, + .minbit = 14, + .value = 0x3, + .pmaxbit = 57, + .pminbit = 39, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", + .match = 0x2000, + .match_mask = 0x3800, + .match_maxbit = 57, + .match_minbit = 39, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 57, + .pminbit = 39, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", + .match = 0x3800, + .match_mask = 0x3800, + .match_maxbit = 57, + .match_minbit = 39, + .maxbit = 13, + .minbit = 11, + .value = 0x7, + .pmaxbit = 57, + .pminbit = 39, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", + .match = 0x810, + .match_mask = 0x3c18, + .match_maxbit = 57, + .match_minbit = 39, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 57, + .pminbit = 39, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1", + .match = 0x14000, + .match_mask = 0x1c000, + .match_maxbit = 57, + .match_minbit = 39, + .maxbit = 16, + .minbit = 14, + .value = 0x5, + .pmaxbit = 57, + .pminbit = 39, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2", + .match = 0x180, + .match_mask = 0x7c0, + .match_maxbit = 57, + .match_minbit = 39, + .maxbit = 9, + .minbit = 6, + .value = 0x6, + .pmaxbit = 57, + .pminbit = 39, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH */ + .name = "EGRESS_PKT_SYS_HDR_EP_NIH", + .match = 0x2, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x2, + .pmaxbit = 1, + .pminbit = 0, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */ + .name = "EGRESS_PKT_SYS_HDR_LOOPBACK", + .match = 0x1, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x1, + .pmaxbit = 1, + .pminbit = 0, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */ + .name = "EGRESS_PKT_SYS_HDR_NONE", + .match = 0x0, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x0, + .pmaxbit = 1, + .pminbit = 0, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_CNTAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_CNTAG", + .match = 0x100, + .match_mask = 0x180, + .match_maxbit = 10, + .match_minbit = 2, + .maxbit = 8, + .minbit = 7, + .value = 0x2, + .pmaxbit = 10, + .pminbit = 2, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM", + .match = 0x80, + .match_mask = 0x180, + .match_maxbit = 10, + .match_minbit = 2, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 10, + .pminbit = 2, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 10, + .match_minbit = 2, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 10, + .pminbit = 2, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0 */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0", + .match = 0x10, + .match_mask = 0x10, + .match_maxbit = 10, + .match_minbit = 2, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 10, + .pminbit = 2, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_ITAG", + .match = 0x40, + .match_mask = 0x40, + .match_maxbit = 10, + .match_minbit = 2, + .maxbit = 6, + .minbit = 6, + .value = 0x1, + .pmaxbit = 10, + .pminbit = 2, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_L2", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 10, + .match_minbit = 2, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 10, + .pminbit = 2, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0x1ff, + .match_maxbit = 10, + .match_minbit = 2, + .maxbit = 8, + .minbit = 0, + .value = 0x0, + .pmaxbit = 10, + .pminbit = 2, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_OTAG", + .match = 0x20, + .match_mask = 0x20, + .match_maxbit = 10, + .match_minbit = 2, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 10, + .pminbit = 2, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 10, + .match_minbit = 2, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 10, + .pminbit = 2, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_SVTAG", + .match = 0x8, + .match_mask = 0x8, + .match_maxbit = 10, + .match_minbit = 2, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 10, + .pminbit = 2, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", + .match = 0x4000, + .match_mask = 0x7c006, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 16, + .minbit = 14, + .value = 0x1, + .pmaxbit = 29, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", + .match = 0x10000, + .match_mask = 0x1c000, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 16, + .minbit = 14, + .value = 0x4, + .pmaxbit = 29, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", + .match = 0x140, + .match_mask = 0x7c0, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 9, + .minbit = 6, + .value = 0x5, + .pmaxbit = 29, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", + .match = 0x3000, + .match_mask = 0x3800, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 13, + .minbit = 11, + .value = 0x6, + .pmaxbit = 29, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1", + .match = 0xc004, + .match_mask = 0x1c406, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 16, + .minbit = 14, + .value = 0x3, + .pmaxbit = 29, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2", + .match = 0x200, + .match_mask = 0x7c0, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 9, + .minbit = 6, + .value = 0x8, + .pmaxbit = 29, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", + .match = 0x40, + .match_mask = 0x7c0, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 9, + .minbit = 6, + .value = 0x1, + .pmaxbit = 29, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 29, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", + .match = 0x18000, + .match_mask = 0x1c000, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 16, + .minbit = 14, + .value = 0x6, + .pmaxbit = 29, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", + .match = 0x240, + .match_mask = 0x7c0, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 9, + .minbit = 6, + .value = 0x9, + .pmaxbit = 29, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", + .match = 0x30, + .match_mask = 0x438, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 29, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", + .match = 0x40000, + .match_mask = 0x40000, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 18, + .minbit = 18, + .value = 0x1, + .pmaxbit = 29, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", + .match = 0x80, + .match_mask = 0x7c0, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 9, + .minbit = 6, + .value = 0x2, + .pmaxbit = 29, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", + .match = 0x1800, + .match_mask = 0x3800, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 29, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", + .match = 0x44000, + .match_mask = 0x5c000, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 16, + .minbit = 14, + .value = 0x1, + .pmaxbit = 29, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", + .match = 0x40020, + .match_mask = 0x40020, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 29, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1", + .match = 0x4004, + .match_mask = 0x7c406, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 16, + .minbit = 14, + .value = 0x1, + .pmaxbit = 29, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2", + .match = 0xc0, + .match_mask = 0x7c0, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 9, + .minbit = 6, + .value = 0x3, + .pmaxbit = 29, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", + .match = 0x800, + .match_mask = 0x3818, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 29, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER", + .match = 0x20000, + .match_mask = 0x20000, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 17, + .minbit = 17, + .value = 0x1, + .pmaxbit = 29, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE", + .match = 0x24000, + .match_mask = 0x3c000, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 16, + .minbit = 14, + .value = 0x1, + .pmaxbit = 29, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", + .match = 0x100, + .match_mask = 0x7c0, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 9, + .minbit = 6, + .value = 0x4, + .pmaxbit = 29, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E", + .match = 0x1000, + .match_mask = 0x3800, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 13, + .minbit = 11, + .value = 0x2, + .pmaxbit = 29, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", + .match = 0x2, + .match_mask = 0x406, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 2, + .minbit = 1, + .value = 0x1, + .pmaxbit = 29, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", + .match = 0x4, + .match_mask = 0x406, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 2, + .minbit = 1, + .value = 0x2, + .pmaxbit = 29, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", + .match = 0x400, + .match_mask = 0x400, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 10, + .minbit = 10, + .value = 0x1, + .pmaxbit = 29, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", + .match = 0x402, + .match_mask = 0x402, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 29, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", + .match = 0x404, + .match_mask = 0x404, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 29, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", + .match = 0x408, + .match_mask = 0x408, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 29, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", + .match = 0x410, + .match_mask = 0x410, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 29, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", + .match = 0x420, + .match_mask = 0x420, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 29, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", + .match = 0x440, + .match_mask = 0x440, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 6, + .minbit = 6, + .value = 0x1, + .pmaxbit = 29, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", + .match = 0x480, + .match_mask = 0x480, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 7, + .minbit = 7, + .value = 0x1, + .pmaxbit = 29, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", + .match = 0x500, + .match_mask = 0x500, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 8, + .minbit = 8, + .value = 0x1, + .pmaxbit = 29, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x7ffff, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 18, + .minbit = 0, + .value = 0x0, + .pmaxbit = 29, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", + .match = 0x2800, + .match_mask = 0x3800, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 13, + .minbit = 11, + .value = 0x5, + .pmaxbit = 29, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1", + .match = 0x1c000, + .match_mask = 0x1c000, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 16, + .minbit = 14, + .value = 0x7, + .pmaxbit = 29, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2", + .match = 0x280, + .match_mask = 0x7c0, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 9, + .minbit = 6, + .value = 0xa, + .pmaxbit = 29, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", + .match = 0x8000, + .match_mask = 0x1c006, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 16, + .minbit = 14, + .value = 0x2, + .pmaxbit = 29, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1", + .match = 0x8004, + .match_mask = 0x1c406, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 16, + .minbit = 14, + .value = 0x2, + .pmaxbit = 29, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2", + .match = 0x1c0, + .match_mask = 0x7c0, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 9, + .minbit = 6, + .value = 0x7, + .pmaxbit = 29, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x8, + .match_mask = 0x418, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 4, + .minbit = 3, + .value = 0x1, + .pmaxbit = 29, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x28, + .match_mask = 0x438, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 29, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", + .match = 0x10, + .match_mask = 0x418, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 4, + .minbit = 3, + .value = 0x2, + .pmaxbit = 29, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", + .match = 0xc000, + .match_mask = 0x1c006, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 16, + .minbit = 14, + .value = 0x3, + .pmaxbit = 29, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", + .match = 0x2000, + .match_mask = 0x3800, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 29, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", + .match = 0x3800, + .match_mask = 0x3800, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 13, + .minbit = 11, + .value = 0x7, + .pmaxbit = 29, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", + .match = 0x810, + .match_mask = 0x3c18, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 29, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1", + .match = 0x14000, + .match_mask = 0x1c000, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 16, + .minbit = 14, + .value = 0x5, + .pmaxbit = 29, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2", + .match = 0x180, + .match_mask = 0x7c0, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 9, + .minbit = 6, + .value = 0x6, + .pmaxbit = 29, + .pminbit = 11, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_CNTAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_CNTAG", + .match = 0x100, + .match_mask = 0x180, + .match_maxbit = 38, + .match_minbit = 30, + .maxbit = 8, + .minbit = 7, + .value = 0x2, + .pmaxbit = 38, + .pminbit = 30, + .zone_minbit = 20, + .arc_id_mask = 0x1f00000, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_cntag, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_ITAG", + .match = 0x40, + .match_mask = 0x40, + .match_maxbit = 38, + .match_minbit = 30, + .maxbit = 6, + .minbit = 6, + .value = 0x1, + .pmaxbit = 38, + .pminbit = 30, + .zone_minbit = 20, + .arc_id_mask = 0x1f00000, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_itag, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */ + .name = "INGRESS_PKT_INNER_L2_HDR_L2", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 38, + .match_minbit = 30, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 38, + .pminbit = 30, + .zone_minbit = 20, + .arc_id_mask = 0x1f00000, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_l2, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */ + .name = "INGRESS_PKT_INNER_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0x1ff, + .match_maxbit = 38, + .match_minbit = 30, + .maxbit = 8, + .minbit = 0, + .value = 0x0, + .pmaxbit = 38, + .pminbit = 30, + .zone_minbit = 20, + .arc_id_mask = 0x1f00000, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_OTAG", + .match = 0x20, + .match_mask = 0x20, + .match_maxbit = 38, + .match_minbit = 30, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 38, + .pminbit = 30, + .zone_minbit = 20, + .arc_id_mask = 0x1f00000, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_otag, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC */ + .name = "INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 38, + .match_minbit = 30, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 38, + .pminbit = 30, + .zone_minbit = 20, + .arc_id_mask = 0x1f00000, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_snap_or_llc, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ARP", + .match = 0x4000, + .match_mask = 0x7c006, + .match_maxbit = 57, + .match_minbit = 39, + .maxbit = 16, + .minbit = 14, + .value = 0x1, + .pmaxbit = 57, + .pminbit = 39, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_arp, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", + .match = 0x10000, + .match_mask = 0x1c000, + .match_maxbit = 57, + .match_minbit = 39, + .maxbit = 16, + .minbit = 14, + .value = 0x4, + .pmaxbit = 57, + .pminbit = 39, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 39, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_1, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", + .match = 0x140, + .match_mask = 0x7c0, + .match_maxbit = 57, + .match_minbit = 39, + .maxbit = 9, + .minbit = 6, + .value = 0x5, + .pmaxbit = 57, + .pminbit = 39, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 55, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_2, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_BFD", + .match = 0x3000, + .match_mask = 0x3800, + .match_maxbit = 57, + .match_minbit = 39, + .maxbit = 13, + .minbit = 11, + .value = 0x6, + .pmaxbit = 57, + .pminbit = 39, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 57, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_bfd, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1", + .match = 0xc004, + .match_mask = 0x1c406, + .match_maxbit = 57, + .match_minbit = 39, + .maxbit = 16, + .minbit = 14, + .value = 0x3, + .pmaxbit = 57, + .pminbit = 39, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 42, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_1, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2", + .match = 0x200, + .match_mask = 0x7c0, + .match_maxbit = 57, + .match_minbit = 39, + .maxbit = 9, + .minbit = 6, + .value = 0x8, + .pmaxbit = 57, + .pminbit = 39, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 55, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_2, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", + .match = 0x40, + .match_mask = 0x7c0, + .match_maxbit = 57, + .match_minbit = 39, + .maxbit = 9, + .minbit = 6, + .value = 0x1, + .pmaxbit = 57, + .pminbit = 39, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 55, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_esp_ext, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 57, + .match_minbit = 39, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 57, + .pminbit = 39, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 29, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ethertype, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", + .match = 0x18000, + .match_mask = 0x1c000, + .match_maxbit = 57, + .match_minbit = 39, + .maxbit = 16, + .minbit = 14, + .value = 0x6, + .pmaxbit = 57, + .pminbit = 39, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 45, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_1, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", + .match = 0x240, + .match_mask = 0x7c0, + .match_maxbit = 57, + .match_minbit = 39, + .maxbit = 9, + .minbit = 6, + .value = 0x9, + .pmaxbit = 57, + .pminbit = 39, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 56, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_2, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1", + .match = 0x4004, + .match_mask = 0x7c406, + .match_maxbit = 57, + .match_minbit = 39, + .maxbit = 16, + .minbit = 14, + .value = 0x1, + .pmaxbit = 57, + .pminbit = 39, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 48, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_1, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2", + .match = 0xc0, + .match_mask = 0x7c0, + .match_maxbit = 57, + .match_minbit = 39, + .maxbit = 9, + .minbit = 6, + .value = 0x3, + .pmaxbit = 57, + .pminbit = 39, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 56, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_2, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ICMP", + .match = 0x800, + .match_mask = 0x3818, + .match_maxbit = 57, + .match_minbit = 39, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 57, + .pminbit = 39, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 57, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_icmp, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER", + .match = 0x20000, + .match_mask = 0x20000, + .match_maxbit = 57, + .match_minbit = 39, + .maxbit = 17, + .minbit = 17, + .value = 0x1, + .pmaxbit = 57, + .pminbit = 39, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 48, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_header, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE", + .match = 0x24000, + .match_mask = 0x3c000, + .match_maxbit = 57, + .match_minbit = 39, + .maxbit = 16, + .minbit = 14, + .value = 0x1, + .pmaxbit = 57, + .pminbit = 39, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 48, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_metadata_base, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IGMP", + .match = 0x100, + .match_mask = 0x7c0, + .match_maxbit = 57, + .match_minbit = 39, + .maxbit = 9, + .minbit = 6, + .value = 0x4, + .pmaxbit = 57, + .pminbit = 39, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 36, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_igmp, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV4", + .match = 0x2, + .match_mask = 0x406, + .match_maxbit = 57, + .match_minbit = 39, + .maxbit = 2, + .minbit = 1, + .value = 0x1, + .pmaxbit = 57, + .pminbit = 39, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 36, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv4, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV6", + .match = 0x4, + .match_mask = 0x406, + .match_maxbit = 57, + .match_minbit = 39, + .maxbit = 2, + .minbit = 1, + .value = 0x2, + .pmaxbit = 57, + .pminbit = 39, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 58, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv6, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x7ffff, + .match_maxbit = 57, + .match_minbit = 39, + .maxbit = 18, + .minbit = 0, + .value = 0x0, + .pmaxbit = 57, + .pminbit = 39, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_P_1588", + .match = 0x2800, + .match_mask = 0x3800, + .match_maxbit = 57, + .match_minbit = 39, + .maxbit = 13, + .minbit = 11, + .value = 0x5, + .pmaxbit = 57, + .pminbit = 39, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 58, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_p_1588, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1", + .match = 0x1c000, + .match_mask = 0x1c000, + .match_maxbit = 57, + .match_minbit = 39, + .maxbit = 16, + .minbit = 14, + .value = 0x7, + .pmaxbit = 57, + .pminbit = 39, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 51, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_1, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2", + .match = 0x280, + .match_mask = 0x7c0, + .match_maxbit = 57, + .match_minbit = 39, + .maxbit = 9, + .minbit = 6, + .value = 0xa, + .pmaxbit = 57, + .pminbit = 39, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 57, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_2, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_RARP", + .match = 0x8000, + .match_mask = 0x1c006, + .match_maxbit = 57, + .match_minbit = 39, + .maxbit = 16, + .minbit = 14, + .value = 0x2, + .pmaxbit = 57, + .pminbit = 39, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 29, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rarp, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1", + .match = 0x8004, + .match_mask = 0x1c406, + .match_maxbit = 57, + .match_minbit = 39, + .maxbit = 16, + .minbit = 14, + .value = 0x2, + .pmaxbit = 57, + .pminbit = 39, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 54, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_1, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2", + .match = 0x1c0, + .match_mask = 0x7c0, + .match_maxbit = 57, + .match_minbit = 39, + .maxbit = 9, + .minbit = 6, + .value = 0x7, + .pmaxbit = 57, + .pminbit = 39, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 57, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_2, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x8, + .match_mask = 0x418, + .match_maxbit = 57, + .match_minbit = 39, + .maxbit = 4, + .minbit = 3, + .value = 0x1, + .pmaxbit = 57, + .pminbit = 39, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 57, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_first_4bytes, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x28, + .match_mask = 0x438, + .match_maxbit = 57, + .match_minbit = 39, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 57, + .pminbit = 39, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 57, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_last_16bytes, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UDP", + .match = 0x10, + .match_mask = 0x418, + .match_maxbit = 57, + .match_minbit = 39, + .maxbit = 4, + .minbit = 3, + .value = 0x2, + .pmaxbit = 57, + .pminbit = 39, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 58, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_udp, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", + .match = 0xc000, + .match_mask = 0x1c006, + .match_maxbit = 57, + .match_minbit = 39, + .maxbit = 16, + .minbit = 14, + .value = 0x3, + .pmaxbit = 57, + .pminbit = 39, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 29, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l3, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", + .match = 0x2000, + .match_mask = 0x3800, + .match_maxbit = 57, + .match_minbit = 39, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 57, + .pminbit = 39, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 58, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l4, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", + .match = 0x3800, + .match_mask = 0x3800, + .match_maxbit = 57, + .match_minbit = 39, + .maxbit = 13, + .minbit = 11, + .value = 0x7, + .pmaxbit = 57, + .pminbit = 39, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 58, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l5, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1", + .match = 0x14000, + .match_mask = 0x1c000, + .match_maxbit = 57, + .match_minbit = 39, + .maxbit = 16, + .minbit = 14, + .value = 0x5, + .pmaxbit = 57, + .pminbit = 39, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 58, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_1, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2", + .match = 0x180, + .match_mask = 0x7c0, + .match_maxbit = 57, + .match_minbit = 39, + .maxbit = 9, + .minbit = 6, + .value = 0x6, + .pmaxbit = 57, + .pminbit = 39, + .zone_minbit = 25, + .arc_id_mask = 0xffe000000, + .num_zone_bmp_words = 58, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_2, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_CNTAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_CNTAG", + .match = 0x100, + .match_mask = 0x180, + .match_maxbit = 10, + .match_minbit = 2, + .maxbit = 8, + .minbit = 7, + .value = 0x2, + .pmaxbit = 10, + .pminbit = 2, + .zone_minbit = 2, + .arc_id_mask = 0x1fc, + .num_zone_bmp_words = 4, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_cntag, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM */ + .name = "INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM", + .match = 0x80, + .match_mask = 0x180, + .match_maxbit = 10, + .match_minbit = 2, + .maxbit = 8, + .minbit = 7, + .value = 0x1, + .pmaxbit = 10, + .pminbit = 2, + .zone_minbit = 2, + .arc_id_mask = 0x1fc, + .num_zone_bmp_words = 4, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_gbp_ethernet_shim, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE */ + .name = "INGRESS_PKT_OUTER_L2_HDR_HG3_BASE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 10, + .match_minbit = 2, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 10, + .pminbit = 2, + .zone_minbit = 2, + .arc_id_mask = 0x1fc, + .num_zone_bmp_words = 4, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_base, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0 */ + .name = "INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0", + .match = 0x10, + .match_mask = 0x10, + .match_maxbit = 10, + .match_minbit = 2, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 10, + .pminbit = 2, + .zone_minbit = 2, + .arc_id_mask = 0x1fc, + .num_zone_bmp_words = 4, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_ext_0, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_ITAG", + .match = 0x40, + .match_mask = 0x40, + .match_maxbit = 10, + .match_minbit = 2, + .maxbit = 6, + .minbit = 6, + .value = 0x1, + .pmaxbit = 10, + .pminbit = 2, + .zone_minbit = 2, + .arc_id_mask = 0x1fc, + .num_zone_bmp_words = 4, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_itag, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */ + .name = "INGRESS_PKT_OUTER_L2_HDR_L2", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 10, + .match_minbit = 2, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 10, + .pminbit = 2, + .zone_minbit = 2, + .arc_id_mask = 0x1fc, + .num_zone_bmp_words = 4, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_l2, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */ + .name = "INGRESS_PKT_OUTER_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0x1ff, + .match_maxbit = 10, + .match_minbit = 2, + .maxbit = 8, + .minbit = 0, + .value = 0x0, + .pmaxbit = 10, + .pminbit = 2, + .zone_minbit = 2, + .arc_id_mask = 0x1fc, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_OTAG", + .match = 0x20, + .match_mask = 0x20, + .match_maxbit = 10, + .match_minbit = 2, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 10, + .pminbit = 2, + .zone_minbit = 2, + .arc_id_mask = 0x1fc, + .num_zone_bmp_words = 4, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_otag, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC */ + .name = "INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 10, + .match_minbit = 2, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 10, + .pminbit = 2, + .zone_minbit = 2, + .arc_id_mask = 0x1fc, + .num_zone_bmp_words = 4, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_snap_or_llc, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_SVTAG", + .match = 0x8, + .match_mask = 0x8, + .match_maxbit = 10, + .match_minbit = 2, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 10, + .pminbit = 2, + .zone_minbit = 2, + .arc_id_mask = 0x1fc, + .num_zone_bmp_words = 4, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_svtag, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ARP", + .match = 0x4000, + .match_mask = 0x7c006, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 16, + .minbit = 14, + .value = 0x1, + .pmaxbit = 29, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_arp, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", + .match = 0x10000, + .match_mask = 0x1c000, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 16, + .minbit = 14, + .value = 0x4, + .pmaxbit = 29, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 13, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_1, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", + .match = 0x140, + .match_mask = 0x7c0, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 9, + .minbit = 6, + .value = 0x5, + .pmaxbit = 29, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 34, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_2, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_BFD", + .match = 0x3000, + .match_mask = 0x3800, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 13, + .minbit = 11, + .value = 0x6, + .pmaxbit = 29, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 38, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_bfd, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1", + .match = 0xc004, + .match_mask = 0x1c406, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 16, + .minbit = 14, + .value = 0x3, + .pmaxbit = 29, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 17, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_1, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2", + .match = 0x200, + .match_mask = 0x7c0, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 9, + .minbit = 6, + .value = 0x8, + .pmaxbit = 29, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 34, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_2, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", + .match = 0x40, + .match_mask = 0x7c0, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 9, + .minbit = 6, + .value = 0x1, + .pmaxbit = 29, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 34, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_esp_ext, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 29, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 38, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ethertype, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", + .match = 0x18000, + .match_mask = 0x1c000, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 16, + .minbit = 14, + .value = 0x6, + .pmaxbit = 29, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 21, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_1, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", + .match = 0x240, + .match_mask = 0x7c0, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 9, + .minbit = 6, + .value = 0x9, + .pmaxbit = 29, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 35, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_2, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GPE", + .match = 0x30, + .match_mask = 0x438, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 29, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 37, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gpe, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE", + .match = 0x40000, + .match_mask = 0x40000, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 18, + .minbit = 18, + .value = 0x1, + .pmaxbit = 29, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 21, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", + .match = 0x80, + .match_mask = 0x7c0, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 9, + .minbit = 6, + .value = 0x2, + .pmaxbit = 29, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 21, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_chksum, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", + .match = 0x1800, + .match_mask = 0x3800, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 13, + .minbit = 11, + .value = 0x3, + .pmaxbit = 29, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 21, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_key, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", + .match = 0x44000, + .match_mask = 0x5c000, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 16, + .minbit = 14, + .value = 0x1, + .pmaxbit = 29, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 21, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_rout, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", + .match = 0x40020, + .match_mask = 0x40020, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 29, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 21, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_seq, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1", + .match = 0x4004, + .match_mask = 0x7c406, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 16, + .minbit = 14, + .value = 0x1, + .pmaxbit = 29, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 25, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_1, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2", + .match = 0xc0, + .match_mask = 0x7c0, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 9, + .minbit = 6, + .value = 0x3, + .pmaxbit = 29, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 35, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_2, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", + .match = 0x800, + .match_mask = 0x3818, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 29, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 37, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_icmp, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER", + .match = 0x20000, + .match_mask = 0x20000, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 17, + .minbit = 17, + .value = 0x1, + .pmaxbit = 29, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 25, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_header, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE", + .match = 0x24000, + .match_mask = 0x3c000, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 16, + .minbit = 14, + .value = 0x1, + .pmaxbit = 29, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 25, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_metadata_base, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", + .match = 0x100, + .match_mask = 0x7c0, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 9, + .minbit = 6, + .value = 0x4, + .pmaxbit = 29, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 8, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_igmp, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E", + .match = 0x1000, + .match_mask = 0x3800, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 13, + .minbit = 11, + .value = 0x2, + .pmaxbit = 29, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 37, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ioam_e2e, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", + .match = 0x2, + .match_mask = 0x406, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 2, + .minbit = 1, + .value = 0x1, + .pmaxbit = 29, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 9, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv4, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", + .match = 0x4, + .match_mask = 0x406, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 2, + .minbit = 1, + .value = 0x2, + .pmaxbit = 29, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 37, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv6, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", + .match = 0x400, + .match_mask = 0x400, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 10, + .minbit = 10, + .value = 0x1, + .pmaxbit = 29, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 38, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls0, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", + .match = 0x402, + .match_mask = 0x402, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 29, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 38, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls1, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", + .match = 0x404, + .match_mask = 0x404, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 29, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 38, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls2, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", + .match = 0x408, + .match_mask = 0x408, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 3, + .minbit = 3, + .value = 0x1, + .pmaxbit = 29, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 38, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls3, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", + .match = 0x410, + .match_mask = 0x410, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 4, + .minbit = 4, + .value = 0x1, + .pmaxbit = 29, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 38, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls4, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", + .match = 0x420, + .match_mask = 0x420, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 29, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 38, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls5, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", + .match = 0x440, + .match_mask = 0x440, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 6, + .minbit = 6, + .value = 0x1, + .pmaxbit = 29, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 38, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls6, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", + .match = 0x480, + .match_mask = 0x480, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 7, + .minbit = 7, + .value = 0x1, + .pmaxbit = 29, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 38, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_ach, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", + .match = 0x500, + .match_mask = 0x500, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 8, + .minbit = 8, + .value = 0x1, + .pmaxbit = 29, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 38, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_cw, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x7ffff, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 18, + .minbit = 0, + .value = 0x0, + .pmaxbit = 29, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", + .match = 0x2800, + .match_mask = 0x3800, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 13, + .minbit = 11, + .value = 0x5, + .pmaxbit = 29, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 38, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_p_1588, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1", + .match = 0x1c000, + .match_mask = 0x1c000, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 16, + .minbit = 14, + .value = 0x7, + .pmaxbit = 29, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 29, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_1, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2", + .match = 0x280, + .match_mask = 0x7c0, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 9, + .minbit = 6, + .value = 0xa, + .pmaxbit = 29, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 36, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_2, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_RARP", + .match = 0x8000, + .match_mask = 0x1c006, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 16, + .minbit = 14, + .value = 0x2, + .pmaxbit = 29, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 38, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rarp, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1", + .match = 0x8004, + .match_mask = 0x1c406, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 16, + .minbit = 14, + .value = 0x2, + .pmaxbit = 29, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 33, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_1, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2", + .match = 0x1c0, + .match_mask = 0x7c0, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 9, + .minbit = 6, + .value = 0x7, + .pmaxbit = 29, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 36, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_2, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x8, + .match_mask = 0x418, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 4, + .minbit = 3, + .value = 0x1, + .pmaxbit = 29, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 37, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_first_4bytes, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x28, + .match_mask = 0x438, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 5, + .minbit = 5, + .value = 0x1, + .pmaxbit = 29, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 37, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_last_16bytes, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UDP", + .match = 0x10, + .match_mask = 0x418, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 4, + .minbit = 3, + .value = 0x2, + .pmaxbit = 29, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 37, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_udp, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", + .match = 0xc000, + .match_mask = 0x1c006, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 16, + .minbit = 14, + .value = 0x3, + .pmaxbit = 29, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 38, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l3, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", + .match = 0x2000, + .match_mask = 0x3800, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 13, + .minbit = 11, + .value = 0x4, + .pmaxbit = 29, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 37, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l4, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", + .match = 0x3800, + .match_mask = 0x3800, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 13, + .minbit = 11, + .value = 0x7, + .pmaxbit = 29, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 37, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l5, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", + .match = 0x810, + .match_mask = 0x3c18, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 13, + .minbit = 11, + .value = 0x1, + .pmaxbit = 29, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 37, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_vxlan, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1", + .match = 0x14000, + .match_mask = 0x1c000, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 16, + .minbit = 14, + .value = 0x5, + .pmaxbit = 29, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 37, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_1, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2", + .match = 0x180, + .match_mask = 0x7c0, + .match_maxbit = 29, + .match_minbit = 11, + .maxbit = 9, + .minbit = 6, + .value = 0x6, + .pmaxbit = 29, + .pminbit = 11, + .zone_minbit = 9, + .arc_id_mask = 0xffe00, + .num_zone_bmp_words = 37, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_2, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH */ + .name = "INGRESS_PKT_SYS_HDR_EP_NIH", + .match = 0x2, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x2, + .pmaxbit = 1, + .pminbit = 0, + .zone_minbit = 0, + .arc_id_mask = 0x3, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_sys_hdr_ep_nih, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */ + .name = "INGRESS_PKT_SYS_HDR_LOOPBACK", + .match = 0x1, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x1, + .pmaxbit = 1, + .pminbit = 0, + .zone_minbit = 0, + .arc_id_mask = 0x3, + .num_zone_bmp_words = 1, + .zone_bmp = bcm56890_a0_dna_6_5_32_4_0_rxpmd_arc_ingress_pkt_sys_hdr_loopback, + + }, + { + /* BCM56890_A0_DNA_6_5_32_4_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */ + .name = "INGRESS_PKT_SYS_HDR_NONE", + .match = 0x0, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x0, + .pmaxbit = 1, + .pminbit = 0, + .zone_minbit = 0, + .arc_id_mask = 0x3, + + }, +}; + +static bcmpkt_rxpmd_match_id_db_info_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_match_id_db_info = { + .num_entries = 225, + .db = bcm56890_a0_dna_6_5_32_4_0_rxpmd_match_id_db +}; +bcmpkt_rxpmd_match_id_db_info_t * bcm56890_a0_dna_6_5_32_4_0_rxpmd_match_id_db_info_get(void) { + return &bcm56890_a0_dna_6_5_32_4_0_rxpmd_match_id_db_info; +} + +static shr_enum_map_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_match_id_map[] = { + BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_rxpmd_match_id_map_info_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_match_id_map_info = { + .num_entries = 225, + .map = bcm56890_a0_dna_6_5_32_4_0_rxpmd_match_id_map +}; + +bcmpkt_rxpmd_match_id_map_info_t * bcm56890_a0_dna_6_5_32_4_0_rxpmd_match_id_map_info_get(void) { + return &bcm56890_a0_dna_6_5_32_4_0_rxpmd_match_id_map_info; +} diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/xfcr/bcm56890_a0/dna_6_5_32_4_0/bcm56890_a0_dna_6_5_32_4_0_pkt_flexhdr.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/xfcr/bcm56890_a0/dna_6_5_32_4_0/bcm56890_a0_dna_6_5_32_4_0_pkt_flexhdr.c new file mode 100644 index 00000000000..0811a14dc7f --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/xfcr/bcm56890_a0/dna_6_5_32_4_0/bcm56890_a0_dna_6_5_32_4_0_pkt_flexhdr.c @@ -0,0 +1,10383 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) map.yml + * for device bcm56890_a0 and variant dna_6_5_32_4_0. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#include +#include +#include +#include +#include +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) + +static void bcm56890_a0_dna_6_5_32_4_0_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons) +{ + uint32_t *reason = data + 0; + + if (reason[13] & (0x1 << 0)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU); + } + if (reason[13] & (0x1 << 1)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS); + } + if (reason[13] & (0x1 << 2)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE); + } + if (reason[13] & (0x1 << 3)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT_HPAE_MISS); + } + if (reason[13] & (0x1 << 4)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD); + } + if (reason[13] & (0x1 << 5)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED); + } + if (reason[13] & (0x1 << 6)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT); + } + if (reason[13] & (0x1 << 7)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD); + } + if (reason[13] & (0x1 << 8)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD); + } + if (reason[13] & (0x1 << 9)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS); + } + if (reason[13] & (0x1 << 10)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP); + } + if (reason[13] & (0x1 << 11)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS); + } + if (reason[13] & (0x1 << 12)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP); + } + if (reason[13] & (0x1 << 13)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR); + } + if (reason[13] & (0x1 << 14)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR); + } + if (reason[13] & (0x1 << 15)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED); + } + if (reason[13] & (0x1 << 16)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL); + } + if (reason[13] & (0x1 << 17)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_VFP); + } + if (reason[13] & (0x1 << 18)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_IFP); + } + if (reason[13] & (0x1 << 19)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER); + } + if (reason[13] & (0x1 << 20)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP); + } + if (reason[13] & (0x1 << 21)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_SVP); + } + if (reason[13] & (0x1 << 22)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT); + } + if (reason[13] & (0x1 << 23)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT); + } + if (reason[13] & (0x1 << 24)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED); + } + if (reason[13] & (0x1 << 25)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED); + } + if (reason[13] & (0x1 << 26)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP); + } + if (reason[13] & (0x1 << 27)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED); + } + if (reason[13] & (0x1 << 28)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF); + } + if (reason[13] & (0x1 << 29)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED); + } + if (reason[13] & (0x1 << 30)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED); + } + if (reason[13] & (0x1 << 31)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU); + } + if (reason[12] & (0x1 << 0)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0); + } + if (reason[12] & (0x1 << 1)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1); + } + if (reason[12] & (0x1 << 2)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2); + } + if (reason[12] & (0x1 << 3)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3); + } + if (reason[12] & (0x1 << 4)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4); + } + if (reason[12] & (0x1 << 5)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5); + } + if (reason[12] & (0x1 << 6)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6); + } + if (reason[12] & (0x1 << 7)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7); + } + if (reason[12] & (0x1 << 8)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_DEFAULT); + } + if (reason[12] & (0x1 << 9)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED); + } + if (reason[12] & (0x1 << 10)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED); + } + if (reason[12] & (0x1 << 11)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_SRV6); + } + if (reason[12] & (0x1 << 12)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR); + } + if (reason[12] & (0x1 << 13)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU); + } + if (reason[12] & (0x1 << 14)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE); + } + if (reason[12] & (0x1 << 15)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP); + } +} + +static void bcm56890_a0_dna_6_5_32_4_0_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data) +{ + uint32_t *reason = data + 0; + + reason[13] = 0; + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) { + reason[13] |= (0x1 << 0); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) { + reason[13] |= (0x1 << 1); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) { + reason[13] |= (0x1 << 2); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT_HPAE_MISS)) { + reason[13] |= (0x1 << 3); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD)) { + reason[13] |= (0x1 << 4); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) { + reason[13] |= (0x1 << 5); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) { + reason[13] |= (0x1 << 6); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD)) { + reason[13] |= (0x1 << 7); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD)) { + reason[13] |= (0x1 << 8); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) { + reason[13] |= (0x1 << 9); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) { + reason[13] |= (0x1 << 10); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) { + reason[13] |= (0x1 << 11); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) { + reason[13] |= (0x1 << 12); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) { + reason[13] |= (0x1 << 13); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) { + reason[13] |= (0x1 << 14); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED)) { + reason[13] |= (0x1 << 15); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) { + reason[13] |= (0x1 << 16); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_VFP)) { + reason[13] |= (0x1 << 17); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_IFP)) { + reason[13] |= (0x1 << 18); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) { + reason[13] |= (0x1 << 19); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP)) { + reason[13] |= (0x1 << 20); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_SVP)) { + reason[13] |= (0x1 << 21); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT)) { + reason[13] |= (0x1 << 22); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) { + reason[13] |= (0x1 << 23); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED)) { + reason[13] |= (0x1 << 24); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED)) { + reason[13] |= (0x1 << 25); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP)) { + reason[13] |= (0x1 << 26); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED)) { + reason[13] |= (0x1 << 27); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF)) { + reason[13] |= (0x1 << 28); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED)) { + reason[13] |= (0x1 << 29); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED)) { + reason[13] |= (0x1 << 30); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU)) { + reason[13] |= (0x1 << 31); + } + reason[12] = 0; + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0)) { + reason[12] |= (0x1 << 0); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1)) { + reason[12] |= (0x1 << 1); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2)) { + reason[12] |= (0x1 << 2); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3)) { + reason[12] |= (0x1 << 3); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4)) { + reason[12] |= (0x1 << 4); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5)) { + reason[12] |= (0x1 << 5); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6)) { + reason[12] |= (0x1 << 6); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7)) { + reason[12] |= (0x1 << 7); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_DEFAULT)) { + reason[12] |= (0x1 << 8); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED)) { + reason[12] |= (0x1 << 9); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED)) { + reason[12] |= (0x1 << 10); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_SRV6)) { + reason[12] |= (0x1 << 11); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR)) { + reason[12] |= (0x1 << 12); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU)) { + reason[12] |= (0x1 << 13); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE)) { + reason[12] |= (0x1 << 14); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) { + reason[12] |= (0x1 << 15); + } +} + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_flex_field_data[] = { + { + .name = "BSCAN_CONTROL_DATA_15_0", + .fid = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_BSCAN_CONTROL_DATA_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 400, 415 }, /* Profile 2. */ + { 400, 415 }, /* Profile 3. */ + { 400, 415 }, /* Profile 4. */ + { 400, 415 }, /* Profile 5. */ + { 400, 415 }, /* Profile 6. */ + { 400, 415 }, /* Profile 7. */ + { 400, 415 }, /* Profile 8. */ + { 400, 415 }, /* Profile 9. */ + { 400, 415 }, /* Profile 10. */ + { 400, 415 }, /* Profile 11. */ + { 400, 415 }, /* Profile 12. */ + { 400, 415 }, /* Profile 13. */ + { 400, 415 }, /* Profile 14. */ + { 400, 415 }, /* Profile 15. */ + { 400, 415 }, /* Profile 16. */ + { 400, 415 }, /* Profile 17. */ + { 400, 415 }, /* Profile 18. */ + { 400, 415 }, /* Profile 19. */ + { 400, 415 }, /* Profile 20. */ + { 400, 415 }, /* Profile 21. */ + { 400, 415 }, /* Profile 22. */ + { 400, 415 }, /* Profile 23. */ + { 400, 415 }, /* Profile 24. */ + { 400, 415 }, /* Profile 25. */ + { 400, 415 }, /* Profile 26. */ + { 400, 415 }, /* Profile 27. */ + { 400, 415 }, /* Profile 28. */ + { 400, 415 }, /* Profile 29. */ + { 400, 415 }, /* Profile 30. */ + { 400, 415 }, /* Profile 31. */ + { 400, 415 }, /* Profile 32. */ + { 400, 415 }, /* Profile 33. */ + { 400, 415 }, /* Profile 34. */ + { 400, 415 }, /* Profile 35. */ + { 400, 415 }, /* Profile 36. */ + { 400, 415 }, /* Profile 37. */ + { 400, 415 }, /* Profile 38. */ + { 400, 415 }, /* Profile 39. */ + { 400, 415 }, /* Profile 40. */ + { 400, 415 }, /* Profile 41. */ + { 400, 415 }, /* Profile 42. */ + { 400, 415 }, /* Profile 43. */ + { 400, 415 }, /* Profile 44. */ + { 400, 415 }, /* Profile 45. */ + }, + .profile_cnt = 46, + }, + { + .name = "BSCAN_CONTROL_FLAGS_3_0", + .fid = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_BSCAN_CONTROL_FLAGS_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 476, 479 }, /* Profile 2. */ + { 476, 479 }, /* Profile 3. */ + { 476, 479 }, /* Profile 4. */ + { 476, 479 }, /* Profile 5. */ + { 476, 479 }, /* Profile 6. */ + { 476, 479 }, /* Profile 7. */ + { 476, 479 }, /* Profile 8. */ + { 476, 479 }, /* Profile 9. */ + { 476, 479 }, /* Profile 10. */ + { 476, 479 }, /* Profile 11. */ + { 476, 479 }, /* Profile 12. */ + { 476, 479 }, /* Profile 13. */ + { 476, 479 }, /* Profile 14. */ + { 476, 479 }, /* Profile 15. */ + { 476, 479 }, /* Profile 16. */ + { 476, 479 }, /* Profile 17. */ + { 476, 479 }, /* Profile 18. */ + { 476, 479 }, /* Profile 19. */ + { 476, 479 }, /* Profile 20. */ + { 476, 479 }, /* Profile 21. */ + { 476, 479 }, /* Profile 22. */ + { 476, 479 }, /* Profile 23. */ + { 476, 479 }, /* Profile 24. */ + { 476, 479 }, /* Profile 25. */ + { 476, 479 }, /* Profile 26. */ + { 476, 479 }, /* Profile 27. */ + { 476, 479 }, /* Profile 28. */ + { 476, 479 }, /* Profile 29. */ + { 476, 479 }, /* Profile 30. */ + { 476, 479 }, /* Profile 31. */ + { 476, 479 }, /* Profile 32. */ + { 476, 479 }, /* Profile 33. */ + { 476, 479 }, /* Profile 34. */ + { 476, 479 }, /* Profile 35. */ + { 476, 479 }, /* Profile 36. */ + { 476, 479 }, /* Profile 37. */ + { 476, 479 }, /* Profile 38. */ + { 476, 479 }, /* Profile 39. */ + { 476, 479 }, /* Profile 40. */ + { 476, 479 }, /* Profile 41. */ + { 476, 479 }, /* Profile 42. */ + { 476, 479 }, /* Profile 43. */ + { 476, 479 }, /* Profile 44. */ + { 476, 479 }, /* Profile 45. */ + }, + .profile_cnt = 46, + }, + { + .name = "DLB_ECMP_DESTINATION_15_0", + .fid = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { -1, -1 }, /* Profile 7. */ + { -1, -1 }, /* Profile 8. */ + { -1, -1 }, /* Profile 9. */ + { -1, -1 }, /* Profile 10. */ + { -1, -1 }, /* Profile 11. */ + { -1, -1 }, /* Profile 12. */ + { 272, 287 }, /* Profile 13. */ + { 272, 287 }, /* Profile 14. */ + { 288, 303 }, /* Profile 15. */ + { 288, 303 }, /* Profile 16. */ + { 272, 287 }, /* Profile 17. */ + { 272, 287 }, /* Profile 18. */ + { 288, 303 }, /* Profile 19. */ + { 288, 303 }, /* Profile 20. */ + { 272, 287 }, /* Profile 21. */ + { 272, 287 }, /* Profile 22. */ + { 288, 303 }, /* Profile 23. */ + { -1, -1 }, /* Profile 24. */ + { -1, -1 }, /* Profile 25. */ + { -1, -1 }, /* Profile 26. */ + { -1, -1 }, /* Profile 27. */ + { -1, -1 }, /* Profile 28. */ + { -1, -1 }, /* Profile 29. */ + { -1, -1 }, /* Profile 30. */ + { -1, -1 }, /* Profile 31. */ + { -1, -1 }, /* Profile 32. */ + { -1, -1 }, /* Profile 33. */ + { -1, -1 }, /* Profile 34. */ + { 288, 303 }, /* Profile 35. */ + { 288, 303 }, /* Profile 36. */ + { 304, 319 }, /* Profile 37. */ + { 304, 319 }, /* Profile 38. */ + { 288, 303 }, /* Profile 39. */ + { 288, 303 }, /* Profile 40. */ + { 304, 319 }, /* Profile 41. */ + { 304, 319 }, /* Profile 42. */ + { 288, 303 }, /* Profile 43. */ + { 288, 303 }, /* Profile 44. */ + { 304, 319 }, /* Profile 45. */ + }, + .profile_cnt = 46, + }, + { + .name = "DNAT_CTRL_3_0", + .fid = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_DNAT_CTRL_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { 420, 423 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { 420, 423 }, /* Profile 7. */ + { -1, -1 }, /* Profile 8. */ + { -1, -1 }, /* Profile 9. */ + { -1, -1 }, /* Profile 10. */ + { 420, 423 }, /* Profile 11. */ + { -1, -1 }, /* Profile 12. */ + { -1, -1 }, /* Profile 13. */ + { 420, 423 }, /* Profile 14. */ + { -1, -1 }, /* Profile 15. */ + { -1, -1 }, /* Profile 16. */ + { -1, -1 }, /* Profile 17. */ + { 420, 423 }, /* Profile 18. */ + { -1, -1 }, /* Profile 19. */ + { -1, -1 }, /* Profile 20. */ + { -1, -1 }, /* Profile 21. */ + { 420, 423 }, /* Profile 22. */ + { -1, -1 }, /* Profile 23. */ + { -1, -1 }, /* Profile 24. */ + { 420, 423 }, /* Profile 25. */ + { -1, -1 }, /* Profile 26. */ + { -1, -1 }, /* Profile 27. */ + { -1, -1 }, /* Profile 28. */ + { 420, 423 }, /* Profile 29. */ + { -1, -1 }, /* Profile 30. */ + { -1, -1 }, /* Profile 31. */ + { -1, -1 }, /* Profile 32. */ + { 420, 423 }, /* Profile 33. */ + { -1, -1 }, /* Profile 34. */ + { -1, -1 }, /* Profile 35. */ + { 420, 423 }, /* Profile 36. */ + { -1, -1 }, /* Profile 37. */ + { -1, -1 }, /* Profile 38. */ + { -1, -1 }, /* Profile 39. */ + { 420, 423 }, /* Profile 40. */ + { -1, -1 }, /* Profile 41. */ + { -1, -1 }, /* Profile 42. */ + { -1, -1 }, /* Profile 43. */ + { 420, 423 }, /* Profile 44. */ + }, + .profile_cnt = 45, + }, + { + .name = "DROP_CODE_15_0", + .fid = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 48, 63 }, /* Profile 2. */ + { 48, 63 }, /* Profile 3. */ + { 48, 63 }, /* Profile 4. */ + { 48, 63 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { -1, -1 }, /* Profile 7. */ + { -1, -1 }, /* Profile 8. */ + { -1, -1 }, /* Profile 9. */ + { 48, 63 }, /* Profile 10. */ + { 48, 63 }, /* Profile 11. */ + { 48, 63 }, /* Profile 12. */ + { 48, 63 }, /* Profile 13. */ + { 48, 63 }, /* Profile 14. */ + { 48, 63 }, /* Profile 15. */ + { 48, 63 }, /* Profile 16. */ + { -1, -1 }, /* Profile 17. */ + { -1, -1 }, /* Profile 18. */ + { -1, -1 }, /* Profile 19. */ + { -1, -1 }, /* Profile 20. */ + { 48, 63 }, /* Profile 21. */ + { 48, 63 }, /* Profile 22. */ + { 48, 63 }, /* Profile 23. */ + { 48, 63 }, /* Profile 24. */ + { 48, 63 }, /* Profile 25. */ + { 48, 63 }, /* Profile 26. */ + { 48, 63 }, /* Profile 27. */ + { -1, -1 }, /* Profile 28. */ + { -1, -1 }, /* Profile 29. */ + { -1, -1 }, /* Profile 30. */ + { -1, -1 }, /* Profile 31. */ + { 48, 63 }, /* Profile 32. */ + { 48, 63 }, /* Profile 33. */ + { 48, 63 }, /* Profile 34. */ + { 48, 63 }, /* Profile 35. */ + { 48, 63 }, /* Profile 36. */ + { 48, 63 }, /* Profile 37. */ + { 48, 63 }, /* Profile 38. */ + { -1, -1 }, /* Profile 39. */ + { -1, -1 }, /* Profile 40. */ + { -1, -1 }, /* Profile 41. */ + { -1, -1 }, /* Profile 42. */ + { 48, 63 }, /* Profile 43. */ + { 48, 63 }, /* Profile 44. */ + { 48, 63 }, /* Profile 45. */ + }, + .profile_cnt = 46, + }, + { + .name = "DVP_15_0", + .fid = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_DVP_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 176, 191 }, /* Profile 2. */ + { 176, 191 }, /* Profile 3. */ + { 208, 223 }, /* Profile 4. */ + { 208, 223 }, /* Profile 5. */ + { 176, 191 }, /* Profile 6. */ + { 176, 191 }, /* Profile 7. */ + { 208, 223 }, /* Profile 8. */ + { 208, 223 }, /* Profile 9. */ + { 176, 191 }, /* Profile 10. */ + { 176, 191 }, /* Profile 11. */ + { 208, 223 }, /* Profile 12. */ + { 176, 191 }, /* Profile 13. */ + { 176, 191 }, /* Profile 14. */ + { 208, 223 }, /* Profile 15. */ + { 208, 223 }, /* Profile 16. */ + { 176, 191 }, /* Profile 17. */ + { 176, 191 }, /* Profile 18. */ + { 208, 223 }, /* Profile 19. */ + { 208, 223 }, /* Profile 20. */ + { 176, 191 }, /* Profile 21. */ + { 176, 191 }, /* Profile 22. */ + { 208, 223 }, /* Profile 23. */ + { 192, 207 }, /* Profile 24. */ + { 192, 207 }, /* Profile 25. */ + { 224, 239 }, /* Profile 26. */ + { 224, 239 }, /* Profile 27. */ + { 192, 207 }, /* Profile 28. */ + { 192, 207 }, /* Profile 29. */ + { 224, 239 }, /* Profile 30. */ + { 224, 239 }, /* Profile 31. */ + { 192, 207 }, /* Profile 32. */ + { 192, 207 }, /* Profile 33. */ + { 224, 239 }, /* Profile 34. */ + { 192, 207 }, /* Profile 35. */ + { 192, 207 }, /* Profile 36. */ + { 224, 239 }, /* Profile 37. */ + { 224, 239 }, /* Profile 38. */ + { 192, 207 }, /* Profile 39. */ + { 192, 207 }, /* Profile 40. */ + { 224, 239 }, /* Profile 41. */ + { 224, 239 }, /* Profile 42. */ + { 192, 207 }, /* Profile 43. */ + { 192, 207 }, /* Profile 44. */ + { 224, 239 }, /* Profile 45. */ + }, + .profile_cnt = 46, + }, + { + .name = "EFFECTIVE_TTL_AND_SNAT_CTRL_15_0", + .fid = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_AND_SNAT_CTRL_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 128, 143 }, /* Profile 2. */ + { 128, 143 }, /* Profile 3. */ + { 160, 175 }, /* Profile 4. */ + { 160, 175 }, /* Profile 5. */ + { 128, 143 }, /* Profile 6. */ + { 128, 143 }, /* Profile 7. */ + { 160, 175 }, /* Profile 8. */ + { 160, 175 }, /* Profile 9. */ + { 128, 143 }, /* Profile 10. */ + { 128, 143 }, /* Profile 11. */ + { 160, 175 }, /* Profile 12. */ + { 128, 143 }, /* Profile 13. */ + { 128, 143 }, /* Profile 14. */ + { 160, 175 }, /* Profile 15. */ + { 160, 175 }, /* Profile 16. */ + { 128, 143 }, /* Profile 17. */ + { 128, 143 }, /* Profile 18. */ + { 160, 175 }, /* Profile 19. */ + { 160, 175 }, /* Profile 20. */ + { 128, 143 }, /* Profile 21. */ + { 128, 143 }, /* Profile 22. */ + { 160, 175 }, /* Profile 23. */ + { 144, 159 }, /* Profile 24. */ + { 144, 159 }, /* Profile 25. */ + { 176, 191 }, /* Profile 26. */ + { 176, 191 }, /* Profile 27. */ + { 144, 159 }, /* Profile 28. */ + { 144, 159 }, /* Profile 29. */ + { 176, 191 }, /* Profile 30. */ + { 176, 191 }, /* Profile 31. */ + { 144, 159 }, /* Profile 32. */ + { 144, 159 }, /* Profile 33. */ + { 176, 191 }, /* Profile 34. */ + { 144, 159 }, /* Profile 35. */ + { 144, 159 }, /* Profile 36. */ + { 176, 191 }, /* Profile 37. */ + { 176, 191 }, /* Profile 38. */ + { 144, 159 }, /* Profile 39. */ + { 144, 159 }, /* Profile 40. */ + { 176, 191 }, /* Profile 41. */ + { 176, 191 }, /* Profile 42. */ + { 144, 159 }, /* Profile 43. */ + { 144, 159 }, /* Profile 44. */ + { 176, 191 }, /* Profile 45. */ + }, + .profile_cnt = 46, + }, + { + .name = "EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0", + .fid = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 272, 287 }, /* Profile 2. */ + { 272, 287 }, /* Profile 3. */ + { 288, 303 }, /* Profile 4. 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+ .profile_cnt = 35, + }, + { + .name = "ENTROPY_LABEL_HIGH_3_0", + .fid = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 436, 439 }, /* Profile 2. */ + { 440, 443 }, /* Profile 3. */ + { 436, 439 }, /* Profile 4. */ + { 436, 439 }, /* Profile 5. */ + { 436, 439 }, /* Profile 6. */ + { 440, 443 }, /* Profile 7. */ + { 436, 439 }, /* Profile 8. */ + { 436, 439 }, /* Profile 9. */ + { 436, 439 }, /* Profile 10. */ + { 440, 443 }, /* Profile 11. */ + { 436, 439 }, /* Profile 12. */ + { 436, 439 }, /* Profile 13. */ + { 440, 443 }, /* Profile 14. */ + { 436, 439 }, /* Profile 15. */ + { 436, 439 }, /* Profile 16. */ + { 436, 439 }, /* Profile 17. */ + { 440, 443 }, /* Profile 18. */ + { 436, 439 }, /* Profile 19. */ + { 436, 439 }, /* Profile 20. */ + { 436, 439 }, /* Profile 21. */ + { 440, 443 }, /* Profile 22. */ + { 436, 439 }, /* Profile 23. */ + { 436, 439 }, /* Profile 24. */ + { 440, 443 }, /* Profile 25. */ + { 436, 439 }, /* Profile 26. */ + { 436, 439 }, /* Profile 27. */ + { 436, 439 }, /* Profile 28. */ + { 440, 443 }, /* Profile 29. */ + { 436, 439 }, /* Profile 30. */ + { 436, 439 }, /* Profile 31. */ + { 436, 439 }, /* Profile 32. */ + { 440, 443 }, /* Profile 33. */ + { 436, 439 }, /* Profile 34. */ + { 436, 439 }, /* Profile 35. */ + { 440, 443 }, /* Profile 36. */ + { 436, 439 }, /* Profile 37. */ + { 436, 439 }, /* Profile 38. */ + { 436, 439 }, /* Profile 39. */ + { 440, 443 }, /* Profile 40. */ + { 436, 439 }, /* Profile 41. */ + { 436, 439 }, /* Profile 42. */ + { 436, 439 }, /* Profile 43. */ + { 440, 443 }, /* Profile 44. */ + { 436, 439 }, /* Profile 45. */ + }, + .profile_cnt = 46, + }, + { + .name = "ENTROPY_LABEL_LOW_15_0", + .fid = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 80, 95 }, /* Profile 2. */ + { 80, 95 }, /* Profile 3. */ + { 80, 95 }, /* Profile 4. */ + { 80, 95 }, /* Profile 5. */ + { 80, 95 }, /* Profile 6. */ + { 80, 95 }, /* Profile 7. */ + { 80, 95 }, /* Profile 8. */ + { 80, 95 }, /* Profile 9. */ + { 80, 95 }, /* Profile 10. */ + { 80, 95 }, /* Profile 11. */ + { 80, 95 }, /* Profile 12. */ + { 80, 95 }, /* Profile 13. */ + { 80, 95 }, /* Profile 14. */ + { 80, 95 }, /* Profile 15. */ + { 80, 95 }, /* Profile 16. */ + { 80, 95 }, /* Profile 17. */ + { 80, 95 }, /* Profile 18. */ + { 80, 95 }, /* Profile 19. */ + { 80, 95 }, /* Profile 20. */ + { 80, 95 }, /* Profile 21. */ + { 80, 95 }, /* Profile 22. */ + { 80, 95 }, /* Profile 23. */ + { 80, 95 }, /* Profile 24. */ + { 80, 95 }, /* Profile 25. */ + { 80, 95 }, /* Profile 26. */ + { 80, 95 }, /* Profile 27. */ + { 80, 95 }, /* Profile 28. */ + { 80, 95 }, /* Profile 29. */ + { 80, 95 }, /* Profile 30. */ + { 80, 95 }, /* Profile 31. */ + { 80, 95 }, /* Profile 32. */ + { 80, 95 }, /* Profile 33. */ + { 80, 95 }, /* Profile 34. */ + { 80, 95 }, /* Profile 35. */ + { 80, 95 }, /* Profile 36. */ + { 80, 95 }, /* Profile 37. */ + { 80, 95 }, /* Profile 38. */ + { 80, 95 }, /* Profile 39. */ + { 80, 95 }, /* Profile 40. */ + { 80, 95 }, /* Profile 41. */ + { 80, 95 }, /* Profile 42. */ + { 80, 95 }, /* Profile 43. */ + { 80, 95 }, /* Profile 44. */ + { 80, 95 }, /* Profile 45. */ + }, + .profile_cnt = 46, + }, + { + .name = "EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0", + .fid = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ + { 48, 63 }, /* Profile 6. */ + { 48, 63 }, /* Profile 7. */ + { 48, 63 }, /* Profile 8. */ + { 48, 63 }, /* Profile 9. */ + { -1, -1 }, /* Profile 10. */ + { -1, -1 }, /* Profile 11. */ + { -1, -1 }, /* Profile 12. */ + { -1, -1 }, /* Profile 13. */ + { -1, -1 }, /* Profile 14. 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BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 440, 443 }, /* Profile 2. */ + { 444, 447 }, /* Profile 3. */ + { 440, 443 }, /* Profile 4. */ + { 440, 443 }, /* Profile 5. */ + { 440, 443 }, /* Profile 6. */ + { 444, 447 }, /* Profile 7. */ + { 440, 443 }, /* Profile 8. */ + { 440, 443 }, /* Profile 9. */ + { -1, -1 }, /* Profile 10. */ + { -1, -1 }, /* Profile 11. */ + { -1, -1 }, /* Profile 12. */ + { 440, 443 }, /* Profile 13. */ + { 444, 447 }, /* Profile 14. */ + { 440, 443 }, /* Profile 15. */ + { 440, 443 }, /* Profile 16. */ + { 440, 443 }, /* Profile 17. */ + { 444, 447 }, /* Profile 18. */ + { 440, 443 }, /* Profile 19. */ + { 440, 443 }, /* Profile 20. */ + { -1, -1 }, /* Profile 21. */ + { -1, -1 }, /* Profile 22. */ + { -1, -1 }, /* Profile 23. */ + { 440, 443 }, /* Profile 24. */ + { 444, 447 }, /* Profile 25. */ + { 440, 443 }, /* Profile 26. */ + { 440, 443 }, /* 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40. */ + { 144, 159 }, /* Profile 41. */ + }, + .profile_cnt = 42, + }, + { + .name = "EP_NIH_HDR_TIMESTAMP_31_16", + .fid = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { 144, 159 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { -1, -1 }, /* Profile 7. */ + { 144, 159 }, /* Profile 8. */ + { -1, -1 }, /* Profile 9. */ + { -1, -1 }, /* Profile 10. */ + { -1, -1 }, /* Profile 11. */ + { -1, -1 }, /* Profile 12. */ + { -1, -1 }, /* Profile 13. */ + { -1, -1 }, /* Profile 14. */ + { 144, 159 }, /* Profile 15. */ + { -1, -1 }, /* Profile 16. */ + { -1, -1 }, /* Profile 17. */ + { -1, -1 }, /* Profile 18. */ + { 144, 159 }, /* Profile 19. */ + { -1, -1 }, /* Profile 20. */ + { -1, -1 }, /* Profile 21. */ + { -1, -1 }, /* Profile 22. */ + { -1, -1 }, /* Profile 23. */ + { -1, -1 }, /* Profile 24. */ + { -1, -1 }, /* Profile 25. */ + { 160, 175 }, /* Profile 26. */ + { -1, -1 }, /* Profile 27. */ + { -1, -1 }, /* Profile 28. */ + { -1, -1 }, /* Profile 29. */ + { 160, 175 }, /* Profile 30. */ + { -1, -1 }, /* Profile 31. */ + { -1, -1 }, /* Profile 32. */ + { -1, -1 }, /* Profile 33. */ + { -1, -1 }, /* Profile 34. */ + { -1, -1 }, /* Profile 35. */ + { -1, -1 }, /* Profile 36. */ + { 160, 175 }, /* Profile 37. */ + { -1, -1 }, /* Profile 38. */ + { -1, -1 }, /* Profile 39. */ + { -1, -1 }, /* Profile 40. */ + { 160, 175 }, /* Profile 41. */ + }, + .profile_cnt = 42, + }, + { + .name = "EVENT_TRACE_VECTOR_15_0", + .fid = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 0, 15 }, /* Profile 2. */ + { 0, 15 }, /* Profile 3. */ + { 0, 15 }, /* Profile 4. */ + { 0, 15 }, /* Profile 5. */ + { 0, 15 }, /* Profile 6. */ + { 0, 15 }, /* Profile 7. */ + { 0, 15 }, /* Profile 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0, 15 }, /* Profile 41. */ + { 0, 15 }, /* Profile 42. */ + { 0, 15 }, /* Profile 43. */ + { 0, 15 }, /* Profile 44. */ + { 0, 15 }, /* Profile 45. */ + }, + .profile_cnt = 46, + }, + { + .name = "EVENT_TRACE_VECTOR_31_16", + .fid = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 16, 31 }, /* Profile 2. */ + { 16, 31 }, /* Profile 3. */ + { 16, 31 }, /* Profile 4. */ + { 16, 31 }, /* Profile 5. */ + { 16, 31 }, /* Profile 6. */ + { 16, 31 }, /* Profile 7. */ + { 16, 31 }, /* Profile 8. */ + { 16, 31 }, /* Profile 9. */ + { 16, 31 }, /* Profile 10. */ + { 16, 31 }, /* Profile 11. */ + { 16, 31 }, /* Profile 12. */ + { 16, 31 }, /* Profile 13. */ + { 16, 31 }, /* Profile 14. */ + { 16, 31 }, /* Profile 15. */ + { 16, 31 }, /* Profile 16. */ + { 16, 31 }, /* Profile 17. */ + { 16, 31 }, /* Profile 18. */ + { 16, 31 }, /* Profile 19. */ + { 16, 31 }, /* Profile 20. */ + { 16, 31 }, /* Profile 21. */ + { 16, 31 }, /* Profile 22. */ + { 16, 31 }, /* Profile 23. */ + { 16, 31 }, /* Profile 24. */ + { 16, 31 }, /* Profile 25. */ + { 16, 31 }, /* Profile 26. */ + { 16, 31 }, /* Profile 27. */ + { 16, 31 }, /* Profile 28. */ + { 16, 31 }, /* Profile 29. */ + { 16, 31 }, /* Profile 30. */ + { 16, 31 }, /* Profile 31. */ + { 16, 31 }, /* Profile 32. */ + { 16, 31 }, /* Profile 33. */ + { 16, 31 }, /* Profile 34. */ + { 16, 31 }, /* Profile 35. */ + { 16, 31 }, /* Profile 36. */ + { 16, 31 }, /* Profile 37. */ + { 16, 31 }, /* Profile 38. */ + { 16, 31 }, /* Profile 39. */ + { 16, 31 }, /* Profile 40. */ + { 16, 31 }, /* Profile 41. */ + { 16, 31 }, /* Profile 42. */ + { 16, 31 }, /* Profile 43. */ + { 16, 31 }, /* Profile 44. */ + { 16, 31 }, /* Profile 45. */ + }, + .profile_cnt = 46, + }, + { + .name = "EVENT_TRACE_VECTOR_47_32", + .fid = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 32, 47 }, /* Profile 2. */ + { 32, 47 }, /* Profile 3. */ + { 32, 47 }, /* Profile 4. */ + { 32, 47 }, /* Profile 5. */ + { 32, 47 }, /* Profile 6. */ + { 32, 47 }, /* Profile 7. */ + { 32, 47 }, /* Profile 8. */ + { 32, 47 }, /* Profile 9. */ + { 32, 47 }, /* Profile 10. */ + { 32, 47 }, /* Profile 11. */ + { 32, 47 }, /* Profile 12. */ + { 32, 47 }, /* Profile 13. */ + { 32, 47 }, /* Profile 14. */ + { 32, 47 }, /* Profile 15. */ + { 32, 47 }, /* Profile 16. */ + { 32, 47 }, /* Profile 17. */ + { 32, 47 }, /* Profile 18. */ + { 32, 47 }, /* Profile 19. */ + { 32, 47 }, /* Profile 20. */ + { 32, 47 }, /* Profile 21. */ + { 32, 47 }, /* Profile 22. */ + { 32, 47 }, /* Profile 23. */ + { 32, 47 }, /* Profile 24. */ + { 32, 47 }, /* Profile 25. */ + { 32, 47 }, /* Profile 26. */ + { 32, 47 }, /* Profile 27. */ + { 32, 47 }, /* Profile 28. */ + { 32, 47 }, /* Profile 29. */ + { 32, 47 }, /* Profile 30. */ + { 32, 47 }, /* Profile 31. */ + { 32, 47 }, /* Profile 32. */ + { 32, 47 }, /* Profile 33. */ + { 32, 47 }, /* Profile 34. */ + { 32, 47 }, /* Profile 35. */ + { 32, 47 }, /* Profile 36. */ + { 32, 47 }, /* Profile 37. */ + { 32, 47 }, /* Profile 38. */ + { 32, 47 }, /* Profile 39. */ + { 32, 47 }, /* Profile 40. */ + { 32, 47 }, /* Profile 41. */ + { 32, 47 }, /* Profile 42. */ + { 32, 47 }, /* Profile 43. */ + { 32, 47 }, /* Profile 44. */ + { 32, 47 }, /* Profile 45. */ + }, + .profile_cnt = 46, + }, + { + .name = "FLOW_ID_LSB_15_0", + .fid = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_FLOW_ID_LSB_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 384, 399 }, /* Profile 2. */ + { 384, 399 }, /* Profile 3. */ + { 384, 399 }, /* Profile 4. */ + { 384, 399 }, /* Profile 5. */ + { 384, 399 }, /* Profile 6. */ + { 384, 399 }, /* Profile 7. */ + { 384, 399 }, /* Profile 8. */ + { 384, 399 }, /* Profile 9. */ + { 384, 399 }, /* Profile 10. */ + { 384, 399 }, /* Profile 11. */ + { 384, 399 }, /* Profile 12. */ + { 384, 399 }, /* Profile 13. */ + { 384, 399 }, /* Profile 14. */ + { 384, 399 }, /* Profile 15. */ + { 384, 399 }, /* Profile 16. */ + { 384, 399 }, /* Profile 17. */ + { 384, 399 }, /* Profile 18. */ + { 384, 399 }, /* Profile 19. */ + { 384, 399 }, /* Profile 20. */ + { 384, 399 }, /* Profile 21. */ + { 384, 399 }, /* Profile 22. */ + { 384, 399 }, /* Profile 23. */ + { 384, 399 }, /* Profile 24. */ + { 384, 399 }, /* Profile 25. */ + { 384, 399 }, /* Profile 26. */ + { 384, 399 }, /* Profile 27. */ + { 384, 399 }, /* Profile 28. */ + { 384, 399 }, /* Profile 29. */ + { 384, 399 }, /* Profile 30. */ + { 384, 399 }, /* Profile 31. */ + { 384, 399 }, /* Profile 32. */ + { 384, 399 }, /* Profile 33. */ + { 384, 399 }, /* Profile 34. */ + { 384, 399 }, /* Profile 35. */ + { 384, 399 }, /* Profile 36. */ + { 384, 399 }, /* Profile 37. */ + { 384, 399 }, /* Profile 38. */ + { 384, 399 }, /* Profile 39. */ + { 384, 399 }, /* Profile 40. */ + { 384, 399 }, /* Profile 41. */ + { 384, 399 }, /* Profile 42. */ + { 384, 399 }, /* Profile 43. */ + { 384, 399 }, /* Profile 44. */ + { 384, 399 }, /* Profile 45. */ + }, + .profile_cnt = 46, + }, + { + .name = "FLOW_ID_MSB_3_0", + .fid = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_FLOW_ID_MSB_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { -1, -1 }, /* Profile 7. */ + { -1, -1 }, /* Profile 8. */ + { -1, -1 }, /* Profile 9. */ + { 472, 475 }, /* Profile 10. */ + { 472, 475 }, /* Profile 11. */ + { 472, 475 }, /* Profile 12. */ + { -1, -1 }, /* Profile 13. */ + { -1, -1 }, /* Profile 14. */ + { -1, -1 }, /* Profile 15. */ + { -1, -1 }, /* Profile 16. */ + { -1, -1 }, /* Profile 17. */ + { -1, -1 }, /* Profile 18. */ + { -1, -1 }, /* Profile 19. */ + { -1, -1 }, /* Profile 20. */ + { 472, 475 }, /* Profile 21. */ + { 472, 475 }, /* Profile 22. */ + { 472, 475 }, /* Profile 23. */ + { -1, -1 }, /* Profile 24. */ + { -1, -1 }, /* Profile 25. */ + { -1, -1 }, /* Profile 26. */ + { -1, -1 }, /* Profile 27. */ + { -1, -1 }, /* Profile 28. */ + { -1, -1 }, /* Profile 29. */ + { -1, -1 }, /* Profile 30. */ + { -1, -1 }, /* Profile 31. */ + { 472, 475 }, /* Profile 32. */ + { 472, 475 }, /* Profile 33. */ + { 472, 475 }, /* Profile 34. */ + { -1, -1 }, /* Profile 35. */ + { -1, -1 }, /* Profile 36. */ + { -1, -1 }, /* Profile 37. */ + { -1, -1 }, /* Profile 38. */ + { -1, -1 }, /* Profile 39. */ + { -1, -1 }, /* Profile 40. */ + { -1, -1 }, /* Profile 41. */ + { -1, -1 }, /* Profile 42. */ + { 472, 475 }, /* Profile 43. */ + { 472, 475 }, /* Profile 44. */ + { 472, 475 }, /* Profile 45. */ + }, + .profile_cnt = 46, + }, + { + .name = "I2E_CLASS_ID_15_0", + .fid = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 208, 223 }, /* Profile 2. */ + { 208, 223 }, /* Profile 3. */ + { 240, 255 }, /* Profile 4. */ + { 240, 255 }, /* Profile 5. */ + { 208, 223 }, /* Profile 6. */ + { 208, 223 }, /* Profile 7. */ + { 240, 255 }, /* Profile 8. */ + { 240, 255 }, /* Profile 9. */ + { 208, 223 }, /* Profile 10. */ + { 208, 223 }, /* Profile 11. */ + { 240, 255 }, /* Profile 12. */ + { 208, 223 }, /* Profile 13. */ + { 208, 223 }, /* Profile 14. */ + { 240, 255 }, /* Profile 15. */ + { 240, 255 }, /* Profile 16. */ + { 208, 223 }, /* Profile 17. */ + { 208, 223 }, /* Profile 18. */ + { 240, 255 }, /* Profile 19. */ + { 240, 255 }, /* Profile 20. */ + { 208, 223 }, /* Profile 21. */ + { 208, 223 }, /* Profile 22. */ + { 240, 255 }, /* Profile 23. */ + { 224, 239 }, /* Profile 24. */ + { 224, 239 }, /* Profile 25. */ + { 256, 271 }, /* Profile 26. */ + { 256, 271 }, /* Profile 27. */ + { 224, 239 }, /* Profile 28. */ + { 224, 239 }, /* Profile 29. */ + { 256, 271 }, /* Profile 30. */ + { 256, 271 }, /* Profile 31. */ + { 224, 239 }, /* Profile 32. */ + { 224, 239 }, /* Profile 33. */ + { 256, 271 }, /* Profile 34. */ + { 224, 239 }, /* Profile 35. */ + { 224, 239 }, /* Profile 36. */ + { 256, 271 }, /* Profile 37. */ + { 256, 271 }, /* Profile 38. */ + { 224, 239 }, /* Profile 39. */ + { 224, 239 }, /* Profile 40. */ + { 256, 271 }, /* Profile 41. */ + { 256, 271 }, /* Profile 42. */ + { 224, 239 }, /* Profile 43. */ + { 224, 239 }, /* Profile 44. */ + { 256, 271 }, /* Profile 45. */ + }, + .profile_cnt = 46, + }, + { + .name = "IFP_IOAM_GBP_ACTION_3_0", + .fid = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 428, 431 }, /* Profile 2. */ + { 432, 435 }, /* Profile 3. */ + { 428, 431 }, /* Profile 4. */ + { 428, 431 }, /* Profile 5. */ + { 428, 431 }, /* Profile 6. */ + { 432, 435 }, /* Profile 7. */ + { 428, 431 }, /* Profile 8. */ + { 428, 431 }, /* Profile 9. */ + { 428, 431 }, /* Profile 10. */ + { 432, 435 }, /* Profile 11. */ + { 428, 431 }, /* Profile 12. */ + { 428, 431 }, /* Profile 13. */ + { 432, 435 }, /* Profile 14. */ + { 428, 431 }, /* Profile 15. */ + { 428, 431 }, /* Profile 16. */ + { 428, 431 }, /* Profile 17. */ + { 432, 435 }, /* Profile 18. */ + { 428, 431 }, /* Profile 19. */ + { 428, 431 }, /* Profile 20. */ + { 428, 431 }, /* Profile 21. */ + { 432, 435 }, /* Profile 22. */ + { 428, 431 }, /* Profile 23. */ + { 428, 431 }, /* Profile 24. */ + { 432, 435 }, /* Profile 25. */ + { 428, 431 }, /* Profile 26. */ + { 428, 431 }, /* Profile 27. */ + { 428, 431 }, /* Profile 28. */ + { 432, 435 }, /* Profile 29. */ + { 428, 431 }, /* Profile 30. */ + { 428, 431 }, /* Profile 31. */ + { 428, 431 }, /* Profile 32. */ + { 432, 435 }, /* Profile 33. */ + { 428, 431 }, /* Profile 34. */ + { 428, 431 }, /* Profile 35. */ + { 432, 435 }, /* Profile 36. */ + { 428, 431 }, /* Profile 37. */ + { 428, 431 }, /* Profile 38. */ + { 428, 431 }, /* Profile 39. */ + { 432, 435 }, /* Profile 40. */ + { 428, 431 }, /* Profile 41. */ + { 428, 431 }, /* Profile 42. */ + { 428, 431 }, /* Profile 43. */ + { 432, 435 }, /* Profile 44. */ + { 428, 431 }, /* Profile 45. */ + }, + .profile_cnt = 46, + }, + { + .name = "IFP_TS_CONTROL_ACTION_3_0", + .fid = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 452, 455 }, /* Profile 2. */ + { 452, 455 }, /* Profile 3. */ + { 452, 455 }, /* Profile 4. */ + { 452, 455 }, /* Profile 5. */ + { 452, 455 }, /* Profile 6. */ + { 452, 455 }, /* Profile 7. */ + { 452, 455 }, /* Profile 8. */ + { 452, 455 }, /* Profile 9. */ + { 448, 451 }, /* Profile 10. */ + { 448, 451 }, /* Profile 11. */ + { 448, 451 }, /* Profile 12. */ + { 452, 455 }, /* Profile 13. */ + { 452, 455 }, /* Profile 14. */ + { 452, 455 }, /* Profile 15. */ + { 452, 455 }, /* Profile 16. */ + { 452, 455 }, /* Profile 17. */ + { 452, 455 }, /* Profile 18. */ + { 452, 455 }, /* Profile 19. */ + { 452, 455 }, /* Profile 20. */ + { 448, 451 }, /* Profile 21. */ + { 448, 451 }, /* Profile 22. */ + { 448, 451 }, /* Profile 23. */ + { 452, 455 }, /* Profile 24. */ + { 452, 455 }, /* Profile 25. */ + { 452, 455 }, /* Profile 26. */ + { 452, 455 }, /* Profile 27. */ + { 452, 455 }, /* Profile 28. */ + { 452, 455 }, /* Profile 29. */ + { 452, 455 }, /* Profile 30. */ + { 452, 455 }, /* Profile 31. */ + { 448, 451 }, /* Profile 32. */ + { 448, 451 }, /* Profile 33. */ + { 448, 451 }, /* Profile 34. */ + { 452, 455 }, /* Profile 35. */ + { 452, 455 }, /* Profile 36. */ + { 452, 455 }, /* Profile 37. */ + { 452, 455 }, /* Profile 38. */ + { 452, 455 }, /* Profile 39. */ + { 452, 455 }, /* Profile 40. */ + { 452, 455 }, /* Profile 41. */ + { 452, 455 }, /* Profile 42. */ + { 448, 451 }, /* Profile 43. */ + { 448, 451 }, /* Profile 44. */ + { 448, 451 }, /* Profile 45. */ + }, + .profile_cnt = 46, + }, + { + .name = "ING_TIMESTAMP_15_0", + .fid = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { 128, 143 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { -1, -1 }, /* Profile 7. */ + { -1, -1 }, /* Profile 8. */ + { 128, 143 }, /* Profile 9. */ + { -1, -1 }, /* Profile 10. */ + { -1, -1 }, /* Profile 11. */ + { 128, 143 }, /* Profile 12. */ + { -1, -1 }, /* Profile 13. */ + { -1, -1 }, /* Profile 14. */ + { -1, -1 }, /* Profile 15. */ + { 128, 143 }, /* Profile 16. */ + { -1, -1 }, /* Profile 17. */ + { -1, -1 }, /* Profile 18. */ + { -1, -1 }, /* Profile 19. */ + { 128, 143 }, /* Profile 20. */ + { -1, -1 }, /* Profile 21. */ + { -1, -1 }, /* Profile 22. */ + { 128, 143 }, /* Profile 23. */ + { -1, -1 }, /* Profile 24. */ + { -1, -1 }, /* Profile 25. */ + { -1, -1 }, /* Profile 26. */ + { 144, 159 }, /* Profile 27. */ + { -1, -1 }, /* Profile 28. */ + { -1, -1 }, /* Profile 29. */ + { -1, -1 }, /* Profile 30. */ + { 144, 159 }, /* Profile 31. */ + { -1, -1 }, /* Profile 32. */ + { -1, -1 }, /* Profile 33. */ + { 144, 159 }, /* Profile 34. */ + { -1, -1 }, /* Profile 35. */ + { -1, -1 }, /* Profile 36. */ + { -1, -1 }, /* Profile 37. */ + { 144, 159 }, /* Profile 38. */ + { -1, -1 }, /* Profile 39. */ + { -1, -1 }, /* Profile 40. */ + { -1, -1 }, /* Profile 41. */ + { 144, 159 }, /* Profile 42. */ + { -1, -1 }, /* Profile 43. */ + { -1, -1 }, /* Profile 44. */ + { 144, 159 }, /* Profile 45. */ + }, + .profile_cnt = 46, + }, + { + .name = "ING_TIMESTAMP_31_16", + .fid = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { 144, 159 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { -1, -1 }, /* Profile 7. */ + { -1, -1 }, /* Profile 8. */ + { 144, 159 }, /* Profile 9. */ + { -1, -1 }, /* Profile 10. */ + { -1, -1 }, /* Profile 11. */ + { 144, 159 }, /* Profile 12. */ + { -1, -1 }, /* Profile 13. */ + { -1, -1 }, /* Profile 14. */ + { -1, -1 }, /* Profile 15. */ + { 144, 159 }, /* Profile 16. */ + { -1, -1 }, /* Profile 17. */ + { -1, -1 }, /* Profile 18. */ + { -1, -1 }, /* Profile 19. */ + { 144, 159 }, /* Profile 20. */ + { -1, -1 }, /* Profile 21. */ + { -1, -1 }, /* Profile 22. */ + { 144, 159 }, /* Profile 23. */ + { -1, -1 }, /* Profile 24. */ + { -1, -1 }, /* Profile 25. */ + { -1, -1 }, /* Profile 26. */ + { 160, 175 }, /* Profile 27. */ + { -1, -1 }, /* Profile 28. */ + { -1, -1 }, /* Profile 29. */ + { -1, -1 }, /* Profile 30. */ + { 160, 175 }, /* Profile 31. */ + { -1, -1 }, /* Profile 32. */ + { -1, -1 }, /* Profile 33. */ + { 160, 175 }, /* Profile 34. */ + { -1, -1 }, /* Profile 35. */ + { -1, -1 }, /* Profile 36. */ + { -1, -1 }, /* Profile 37. */ + { 160, 175 }, /* Profile 38. */ + { -1, -1 }, /* Profile 39. */ + { -1, -1 }, /* Profile 40. */ + { -1, -1 }, /* Profile 41. */ + { 160, 175 }, /* Profile 42. */ + { -1, -1 }, /* Profile 43. */ + { -1, -1 }, /* Profile 44. */ + { 160, 175 }, /* Profile 45. */ + }, + .profile_cnt = 46, + }, + { + .name = "INGRESS_DEVICE_PORT_8_0", + .fid = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_INGRESS_DEVICE_PORT_8_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 256, 264 }, /* Profile 2. */ + { 256, 264 }, /* Profile 3. */ + { 272, 280 }, /* Profile 4. */ + { 272, 280 }, /* Profile 5. */ + { 256, 264 }, /* Profile 6. */ + { 256, 264 }, /* Profile 7. */ + { 272, 280 }, /* Profile 8. */ + { 272, 280 }, /* Profile 9. */ + { 256, 264 }, /* Profile 10. */ + { 256, 264 }, /* Profile 11. */ + { 272, 280 }, /* Profile 12. */ + { 256, 264 }, /* Profile 13. */ + { 256, 264 }, /* Profile 14. */ + { 272, 280 }, /* Profile 15. */ + { 272, 280 }, /* Profile 16. */ + { 256, 264 }, /* Profile 17. */ + { 256, 264 }, /* Profile 18. */ + { 272, 280 }, /* Profile 19. */ + { 272, 280 }, /* Profile 20. */ + { 256, 264 }, /* Profile 21. */ + { 256, 264 }, /* Profile 22. */ + { 272, 280 }, /* Profile 23. */ + { 272, 280 }, /* Profile 24. */ + { 272, 280 }, /* Profile 25. */ + { 288, 296 }, /* Profile 26. */ + { 288, 296 }, /* Profile 27. */ + { 272, 280 }, /* Profile 28. */ + { 272, 280 }, /* Profile 29. */ + { 288, 296 }, /* Profile 30. */ + { 288, 296 }, /* Profile 31. */ + { 272, 280 }, /* Profile 32. */ + { 272, 280 }, /* Profile 33. */ + { 288, 296 }, /* Profile 34. */ + { 272, 280 }, /* Profile 35. */ + { 272, 280 }, /* Profile 36. */ + { 288, 296 }, /* Profile 37. */ + { 288, 296 }, /* Profile 38. */ + { 272, 280 }, /* Profile 39. */ + { 272, 280 }, /* Profile 40. */ + { 288, 296 }, /* Profile 41. */ + { 288, 296 }, /* Profile 42. */ + { 272, 280 }, /* Profile 43. */ + { 272, 280 }, /* Profile 44. */ + { 288, 296 }, /* Profile 45. */ + }, + .profile_cnt = 46, + }, + { + .name = "INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0", + .fid = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 192, 207 }, /* Profile 2. */ + { 192, 207 }, /* Profile 3. */ + { 224, 239 }, /* Profile 4. */ + { 224, 239 }, /* Profile 5. */ + { 192, 207 }, /* Profile 6. */ + { 192, 207 }, /* Profile 7. */ + { 224, 239 }, /* Profile 8. */ + { 224, 239 }, /* Profile 9. */ + { 192, 207 }, /* Profile 10. */ + { 192, 207 }, /* Profile 11. */ + { 224, 239 }, /* Profile 12. */ + { 192, 207 }, /* Profile 13. */ + { 192, 207 }, /* Profile 14. */ + { 224, 239 }, /* Profile 15. */ + { 224, 239 }, /* Profile 16. */ + { 192, 207 }, /* Profile 17. */ + { 192, 207 }, /* Profile 18. */ + { 224, 239 }, /* Profile 19. */ + { 224, 239 }, /* Profile 20. */ + { 192, 207 }, /* Profile 21. */ + { 192, 207 }, /* Profile 22. */ + { 224, 239 }, /* Profile 23. */ + { 208, 223 }, /* Profile 24. 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Profile 21. */ + { 336, 348 }, /* Profile 22. */ + { 336, 348 }, /* Profile 23. */ + }, + .profile_cnt = 24, + }, + { + .name = "L2_OIF_12_0", + .fid = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_L2_OIF_12_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { -1, -1 }, /* Profile 4. */ + { -1, -1 }, /* Profile 5. */ + { -1, -1 }, /* Profile 6. */ + { -1, -1 }, /* Profile 7. */ + { -1, -1 }, /* Profile 8. */ + { -1, -1 }, /* Profile 9. */ + { -1, -1 }, /* Profile 10. */ + { -1, -1 }, /* Profile 11. */ + { -1, -1 }, /* Profile 12. */ + { -1, -1 }, /* Profile 13. */ + { -1, -1 }, /* Profile 14. */ + { -1, -1 }, /* Profile 15. */ + { -1, -1 }, /* Profile 16. */ + { -1, -1 }, /* Profile 17. */ + { -1, -1 }, /* Profile 18. */ + { -1, -1 }, /* Profile 19. */ + { -1, -1 }, /* Profile 20. */ + { -1, -1 }, /* Profile 21. */ + { -1, -1 }, /* Profile 22. */ + { -1, -1 }, /* Profile 23. */ + { 128, 140 }, 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352, 365 }, /* Profile 44. */ + { 352, 365 }, /* Profile 45. */ + }, + .profile_cnt = 46, + }, + { + .name = "L3_OIF_1_13_0", + .fid = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 160, 173 }, /* Profile 2. */ + { 160, 173 }, /* Profile 3. */ + { 192, 205 }, /* Profile 4. */ + { 192, 205 }, /* Profile 5. */ + { 160, 173 }, /* Profile 6. */ + { 160, 173 }, /* Profile 7. */ + { 192, 205 }, /* Profile 8. */ + { 192, 205 }, /* Profile 9. */ + { 160, 173 }, /* Profile 10. */ + { 160, 173 }, /* Profile 11. */ + { 192, 205 }, /* Profile 12. */ + { 160, 173 }, /* Profile 13. */ + { 160, 173 }, /* Profile 14. */ + { 192, 205 }, /* Profile 15. */ + { 192, 205 }, /* Profile 16. */ + { 160, 173 }, /* Profile 17. */ + { 160, 173 }, /* Profile 18. */ + { 192, 205 }, /* Profile 19. */ + { 192, 205 }, /* Profile 20. */ + { 160, 173 }, /* Profile 21. */ + { 160, 173 }, /* Profile 22. */ + { 192, 205 }, /* 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}, + { + .name = "MPLS_LABEL_DECAP_COUNT_3_0", + .fid = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_MPLS_LABEL_DECAP_COUNT_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 460, 463 }, /* Profile 2. */ + { 460, 463 }, /* Profile 3. */ + { 460, 463 }, /* Profile 4. */ + { 460, 463 }, /* Profile 5. */ + { 460, 463 }, /* Profile 6. */ + { 460, 463 }, /* Profile 7. */ + { 460, 463 }, /* Profile 8. */ + { 460, 463 }, /* Profile 9. */ + { 456, 459 }, /* Profile 10. */ + { 456, 459 }, /* Profile 11. */ + { 456, 459 }, /* Profile 12. */ + { 460, 463 }, /* Profile 13. */ + { 460, 463 }, /* Profile 14. */ + { 460, 463 }, /* Profile 15. */ + { 460, 463 }, /* Profile 16. */ + { 460, 463 }, /* Profile 17. */ + { 460, 463 }, /* Profile 18. */ + { 460, 463 }, /* Profile 19. */ + { 460, 463 }, /* Profile 20. */ + { 456, 459 }, /* Profile 21. */ + { 456, 459 }, /* Profile 22. */ + { 456, 459 }, /* Profile 23. */ + { 460, 463 }, /* Profile 24. */ + { 460, 463 }, /* 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BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_SVTAG_CTRL_PKT_INFO_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 468, 471 }, /* Profile 2. */ + { 468, 471 }, /* Profile 3. */ + { 468, 471 }, /* Profile 4. */ + { 468, 471 }, /* Profile 5. */ + { 468, 471 }, /* Profile 6. */ + { 468, 471 }, /* Profile 7. */ + { 468, 471 }, /* Profile 8. */ + { 468, 471 }, /* Profile 9. */ + { 464, 467 }, /* Profile 10. */ + { 464, 467 }, /* Profile 11. */ + { 464, 467 }, /* Profile 12. */ + { 468, 471 }, /* Profile 13. */ + { 468, 471 }, /* Profile 14. */ + { 468, 471 }, /* Profile 15. */ + { 468, 471 }, /* Profile 16. */ + { 468, 471 }, /* Profile 17. */ + { 468, 471 }, /* Profile 18. */ + { 468, 471 }, /* Profile 19. */ + { 468, 471 }, /* Profile 20. */ + { 464, 467 }, /* Profile 21. */ + { 464, 467 }, /* Profile 22. */ + { 464, 467 }, /* Profile 23. */ + { 468, 471 }, /* Profile 24. */ + { 468, 471 }, /* Profile 25. */ + { 468, 471 }, /* Profile 26. */ + { 468, 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6. */ + { 112, 127 }, /* Profile 7. */ + { 112, 127 }, /* Profile 8. */ + { 112, 127 }, /* Profile 9. */ + { 112, 127 }, /* Profile 10. */ + { 112, 127 }, /* Profile 11. */ + { 112, 127 }, /* Profile 12. */ + { 112, 127 }, /* Profile 13. */ + { 112, 127 }, /* Profile 14. */ + { 112, 127 }, /* Profile 15. */ + { 112, 127 }, /* Profile 16. */ + { 112, 127 }, /* Profile 17. */ + { 112, 127 }, /* Profile 18. */ + { 112, 127 }, /* Profile 19. */ + { 112, 127 }, /* Profile 20. */ + { 112, 127 }, /* Profile 21. */ + { 112, 127 }, /* Profile 22. */ + { 112, 127 }, /* Profile 23. */ + { 112, 127 }, /* Profile 24. */ + { 112, 127 }, /* Profile 25. */ + { 112, 127 }, /* Profile 26. */ + { 112, 127 }, /* Profile 27. */ + { 112, 127 }, /* Profile 28. */ + { 112, 127 }, /* Profile 29. */ + { 112, 127 }, /* Profile 30. */ + { 112, 127 }, /* Profile 31. */ + { 112, 127 }, /* Profile 32. */ + { 112, 127 }, /* Profile 33. */ + { 112, 127 }, /* Profile 34. */ + { 112, 127 }, /* Profile 35. */ + { 112, 127 }, /* Profile 36. */ + { 112, 127 }, /* Profile 37. */ + { 112, 127 }, /* Profile 38. */ + { 112, 127 }, /* Profile 39. */ + { 112, 127 }, /* Profile 40. */ + { 112, 127 }, /* Profile 41. */ + { 112, 127 }, /* Profile 42. */ + { 112, 127 }, /* Profile 43. */ + { 112, 127 }, /* Profile 44. */ + { 112, 127 }, /* Profile 45. */ + }, + .profile_cnt = 46, + }, + { + .name = "VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0", + .fid = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 424, 427 }, /* Profile 2. */ + { 428, 431 }, /* Profile 3. */ + { 424, 427 }, /* Profile 4. */ + { 424, 427 }, /* Profile 5. */ + { 424, 427 }, /* Profile 6. */ + { 428, 431 }, /* Profile 7. */ + { 424, 427 }, /* Profile 8. */ + { 424, 427 }, /* Profile 9. */ + { 424, 427 }, /* Profile 10. */ + { 428, 431 }, /* Profile 11. */ + { 424, 427 }, /* Profile 12. */ + { 424, 427 }, /* Profile 13. */ + { 428, 431 }, /* Profile 14. */ + { 424, 427 }, /* Profile 15. */ + { 424, 427 }, /* Profile 16. */ + { 424, 427 }, /* Profile 17. */ + { 428, 431 }, /* Profile 18. */ + { 424, 427 }, /* Profile 19. */ + { 424, 427 }, /* Profile 20. */ + { 424, 427 }, /* Profile 21. */ + { 428, 431 }, /* Profile 22. */ + { 424, 427 }, /* Profile 23. */ + { 424, 427 }, /* Profile 24. */ + { 428, 431 }, /* Profile 25. */ + { 424, 427 }, /* Profile 26. */ + { 424, 427 }, /* Profile 27. */ + { 424, 427 }, /* Profile 28. */ + { 428, 431 }, /* Profile 29. */ + { 424, 427 }, /* Profile 30. */ + { 424, 427 }, /* Profile 31. */ + { 424, 427 }, /* Profile 32. */ + { 428, 431 }, /* Profile 33. */ + { 424, 427 }, /* Profile 34. */ + { 424, 427 }, /* Profile 35. */ + { 428, 431 }, /* Profile 36. */ + { 424, 427 }, /* Profile 37. */ + { 424, 427 }, /* Profile 38. */ + { 424, 427 }, /* Profile 39. */ + { 428, 431 }, /* Profile 40. */ + { 424, 427 }, /* Profile 41. */ + { 424, 427 }, /* Profile 42. */ + { 424, 427 }, /* Profile 43. */ + { 428, 431 }, /* Profile 44. */ + { 424, 427 }, /* Profile 45. */ + }, + .profile_cnt = 46, + }, +}; +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_flex_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_FID_COUNT, + .info = bcm56890_a0_dna_6_5_32_4_0_rxpmd_flex_field_data, + .profile_bmp_cnt = 2, + .profile_bmp[0] = 0xfffffffc, + .profile_bmp[1] = 0x3fff, + +}; + +static shr_enum_map_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_flex_reason_names[] = { + BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT +}; + +static bcmpkt_flex_reasons_info_t bcm56890_a0_dna_6_5_32_4_0_rxpmd_flex_reasons_info = { + .num_reasons = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RXPMD_FLEX_REASON_COUNT, + .reason_names = bcm56890_a0_dna_6_5_32_4_0_rxpmd_flex_reason_names, + .reason_encode = bcm56890_a0_dna_6_5_32_4_0_rxpmd_flex_reason_encode, + .reason_decode = bcm56890_a0_dna_6_5_32_4_0_rxpmd_flex_reason_decode, +}; + + +static int32_t bcmpkt_arp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_arp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_arp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_arp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_arp_t_operation_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_arp_t_operation_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_arp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_arp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_arp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_arp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_arp_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ARP_T_FID_COUNT] = { + bcmpkt_arp_t_hardware_len_get, + bcmpkt_arp_t_hardware_type_get, + bcmpkt_arp_t_operation_get, + bcmpkt_arp_t_prot_addr_len_get, + bcmpkt_arp_t_protocol_type_get, + bcmpkt_arp_t_sender_ha_get, + bcmpkt_arp_t_sender_ip_get, + bcmpkt_arp_t_target_ha_get, + bcmpkt_arp_t_target_ip_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_arp_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ARP_T_FID_COUNT] = { + bcmpkt_arp_t_hardware_len_set, + bcmpkt_arp_t_hardware_type_set, + bcmpkt_arp_t_operation_set, + bcmpkt_arp_t_prot_addr_len_set, + bcmpkt_arp_t_protocol_type_set, + bcmpkt_arp_t_sender_ha_set, + bcmpkt_arp_t_sender_ip_set, + bcmpkt_arp_t_target_ha_set, + bcmpkt_arp_t_target_ip_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_arp_t_field_data[] = { + BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_arp_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ARP_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_32_4_0_arp_t_field_data, +}; + + +static int32_t bcmpkt_authen_t_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_authen_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_authen_t_payload_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_authen_t_payload_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_authen_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_authen_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_authen_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_spi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_authen_t_spi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_authen_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_AUTHEN_T_FID_COUNT] = { + bcmpkt_authen_t_data_get, + bcmpkt_authen_t_next_header_get, + bcmpkt_authen_t_payload_len_get, + bcmpkt_authen_t_reserved_get, + bcmpkt_authen_t_seq_num_get, + bcmpkt_authen_t_spi_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_authen_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_AUTHEN_T_FID_COUNT] = { + bcmpkt_authen_t_data_set, + bcmpkt_authen_t_next_header_set, + bcmpkt_authen_t_payload_len_set, + bcmpkt_authen_t_reserved_set, + bcmpkt_authen_t_seq_num_set, + bcmpkt_authen_t_spi_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_authen_t_field_data[] = { + BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_authen_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_AUTHEN_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_32_4_0_authen_t_field_data, +}; + + +static int32_t bcmpkt_bfd_t_desmintxintv_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_desmintxintv_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_minechorxintv_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_minechorxintv_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_reqminrxintv_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_reqminrxintv_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_ap_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 18, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_ap_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 18, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_bfd_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_bfd_t_bfd_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_cpi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 19, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_cpi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 19, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_dem_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 17, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_dem_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 17, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_detectmult_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_bfd_t_detectmult_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_diag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 5); + + return ret; +} + +static int32_t bcmpkt_bfd_t_diag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 5, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_fin_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_fin_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_mpt_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_mpt_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_mydiscrim_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_mydiscrim_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_poll_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 21, 1); + + return ret; +} + +static int32_t bcmpkt_bfd_t_poll_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 21, 1, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_sta_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 22, 2); + + return ret; +} + +static int32_t bcmpkt_bfd_t_sta_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 22, 2, val); + return ret; +} + +static int32_t bcmpkt_bfd_t_urdiscrim_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_urdiscrim_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_bfd_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 29, 3); + + return ret; +} + +static int32_t bcmpkt_bfd_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 29, 3, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_bfd_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_BFD_T_FID_COUNT] = { + bcmpkt_bfd_t_ap_get, + bcmpkt_bfd_t_bfd_length_get, + bcmpkt_bfd_t_cpi_get, + bcmpkt_bfd_t_dem_get, + bcmpkt_bfd_t_desmintxintv_get, + bcmpkt_bfd_t_detectmult_get, + bcmpkt_bfd_t_diag_get, + bcmpkt_bfd_t_fin_get, + bcmpkt_bfd_t_minechorxintv_get, + bcmpkt_bfd_t_mpt_get, + bcmpkt_bfd_t_mydiscrim_get, + bcmpkt_bfd_t_poll_get, + bcmpkt_bfd_t_reqminrxintv_get, + bcmpkt_bfd_t_sta_get, + bcmpkt_bfd_t_urdiscrim_get, + bcmpkt_bfd_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_bfd_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_BFD_T_FID_COUNT] = { + bcmpkt_bfd_t_ap_set, + bcmpkt_bfd_t_bfd_length_set, + bcmpkt_bfd_t_cpi_set, + bcmpkt_bfd_t_dem_set, + bcmpkt_bfd_t_desmintxintv_set, + bcmpkt_bfd_t_detectmult_set, + bcmpkt_bfd_t_diag_set, + bcmpkt_bfd_t_fin_set, + bcmpkt_bfd_t_minechorxintv_set, + bcmpkt_bfd_t_mpt_set, + bcmpkt_bfd_t_mydiscrim_set, + bcmpkt_bfd_t_poll_set, + bcmpkt_bfd_t_reqminrxintv_set, + bcmpkt_bfd_t_sta_set, + bcmpkt_bfd_t_urdiscrim_set, + bcmpkt_bfd_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_bfd_t_field_data[] = { + BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_bfd_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_BFD_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_32_4_0_bfd_t_field_data, +}; + + +static int32_t bcmpkt_cntag_t_rpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_cntag_t_rpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_cntag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_cntag_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_cntag_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CNTAG_T_FID_COUNT] = { + bcmpkt_cntag_t_rpid_get, + bcmpkt_cntag_t_tpid_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_cntag_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CNTAG_T_FID_COUNT] = { + bcmpkt_cntag_t_rpid_set, + bcmpkt_cntag_t_tpid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_cntag_t_field_data[] = { + BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_cntag_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CNTAG_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_32_4_0_cntag_t_field_data, +}; + + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_cpu_composites_0_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { + bcmpkt_cpu_composites_0_t_dma_cont0_get, + bcmpkt_cpu_composites_0_t_dma_cont1_get, + bcmpkt_cpu_composites_0_t_dma_cont2_get, + bcmpkt_cpu_composites_0_t_dma_cont3_get, + bcmpkt_cpu_composites_0_t_dma_cont4_get, + bcmpkt_cpu_composites_0_t_dma_cont5_get, + bcmpkt_cpu_composites_0_t_dma_cont6_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_cpu_composites_0_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { + bcmpkt_cpu_composites_0_t_dma_cont0_set, + bcmpkt_cpu_composites_0_t_dma_cont1_set, + bcmpkt_cpu_composites_0_t_dma_cont2_set, + bcmpkt_cpu_composites_0_t_dma_cont3_set, + bcmpkt_cpu_composites_0_t_dma_cont4_set, + bcmpkt_cpu_composites_0_t_dma_cont5_set, + bcmpkt_cpu_composites_0_t_dma_cont6_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_cpu_composites_0_t_field_data[] = { + BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_cpu_composites_0_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_32_4_0_cpu_composites_0_t_field_data, +}; + + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_cpu_composites_1_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { + bcmpkt_cpu_composites_1_t_dma_cont10_get, + bcmpkt_cpu_composites_1_t_dma_cont11_get, + bcmpkt_cpu_composites_1_t_dma_cont12_get, + bcmpkt_cpu_composites_1_t_dma_cont13_get, + bcmpkt_cpu_composites_1_t_dma_cont14_get, + bcmpkt_cpu_composites_1_t_dma_cont15_get, + bcmpkt_cpu_composites_1_t_dma_cont16_get, + bcmpkt_cpu_composites_1_t_dma_cont17_get, + bcmpkt_cpu_composites_1_t_dma_cont7_get, + bcmpkt_cpu_composites_1_t_dma_cont8_get, + bcmpkt_cpu_composites_1_t_dma_cont9_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_cpu_composites_1_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { + bcmpkt_cpu_composites_1_t_dma_cont10_set, + bcmpkt_cpu_composites_1_t_dma_cont11_set, + bcmpkt_cpu_composites_1_t_dma_cont12_set, + bcmpkt_cpu_composites_1_t_dma_cont13_set, + bcmpkt_cpu_composites_1_t_dma_cont14_set, + bcmpkt_cpu_composites_1_t_dma_cont15_set, + bcmpkt_cpu_composites_1_t_dma_cont16_set, + bcmpkt_cpu_composites_1_t_dma_cont17_set, + bcmpkt_cpu_composites_1_t_dma_cont7_set, + bcmpkt_cpu_composites_1_t_dma_cont8_set, + bcmpkt_cpu_composites_1_t_dma_cont9_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_cpu_composites_1_t_field_data[] = { + BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_cpu_composites_1_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_32_4_0_cpu_composites_1_t_field_data, +}; + + +static int32_t bcmpkt_dest_option_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_dest_option_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_dest_option_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_dest_option_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_dest_option_t_option_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_dest_option_t_option_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_dest_option_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = { + bcmpkt_dest_option_t_hdr_ext_len_get, + bcmpkt_dest_option_t_next_header_get, + bcmpkt_dest_option_t_option_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_dest_option_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = { + bcmpkt_dest_option_t_hdr_ext_len_set, + bcmpkt_dest_option_t_next_header_set, + bcmpkt_dest_option_t_option_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_dest_option_t_field_data[] = { + BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_dest_option_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_DEST_OPTION_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_32_4_0_dest_option_t_field_data, +}; + + +static int32_t bcmpkt_ep_nih_header_t_header_subtype_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_header_subtype_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_header_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 6); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_header_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 6, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 20, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_start_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 30, 2); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_start_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 30, 2, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_ep_nih_header_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = { + bcmpkt_ep_nih_header_t_header_subtype_get, + bcmpkt_ep_nih_header_t_header_type_get, + bcmpkt_ep_nih_header_t_opaque_ctrl_a_get, + bcmpkt_ep_nih_header_t_opaque_ctrl_b_get, + bcmpkt_ep_nih_header_t_opaque_ctrl_c_get, + bcmpkt_ep_nih_header_t_opaque_object_a_get, + bcmpkt_ep_nih_header_t_opaque_object_b_get, + bcmpkt_ep_nih_header_t_opaque_object_c_get, + bcmpkt_ep_nih_header_t_recirc_profile_index_get, + bcmpkt_ep_nih_header_t_reserved_0_get, + bcmpkt_ep_nih_header_t_start_get, + bcmpkt_ep_nih_header_t_timestamp_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_ep_nih_header_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = { + bcmpkt_ep_nih_header_t_header_subtype_set, + bcmpkt_ep_nih_header_t_header_type_set, + bcmpkt_ep_nih_header_t_opaque_ctrl_a_set, + bcmpkt_ep_nih_header_t_opaque_ctrl_b_set, + bcmpkt_ep_nih_header_t_opaque_ctrl_c_set, + bcmpkt_ep_nih_header_t_opaque_object_a_set, + bcmpkt_ep_nih_header_t_opaque_object_b_set, + bcmpkt_ep_nih_header_t_opaque_object_c_set, + bcmpkt_ep_nih_header_t_recirc_profile_index_set, + bcmpkt_ep_nih_header_t_reserved_0_set, + bcmpkt_ep_nih_header_t_start_set, + bcmpkt_ep_nih_header_t_timestamp_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_ep_nih_header_t_field_data[] = { + BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_ep_nih_header_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_32_4_0_ep_nih_header_t_field_data, +}; + + +static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 11, 2); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 11, 2, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 13, 3); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 13, 3, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 10); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 10, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_t_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 10, 1); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_t_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 10, 1, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 12); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 12, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_erspan3_fixed_hdr_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { + bcmpkt_erspan3_fixed_hdr_t_bso_get, + bcmpkt_erspan3_fixed_hdr_t_cos_get, + bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get, + bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get, + bcmpkt_erspan3_fixed_hdr_t_session_id_get, + bcmpkt_erspan3_fixed_hdr_t_t_get, + bcmpkt_erspan3_fixed_hdr_t_timestamp_get, + bcmpkt_erspan3_fixed_hdr_t_ver_get, + bcmpkt_erspan3_fixed_hdr_t_vlan_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_erspan3_fixed_hdr_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { + bcmpkt_erspan3_fixed_hdr_t_bso_set, + bcmpkt_erspan3_fixed_hdr_t_cos_set, + bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set, + bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set, + bcmpkt_erspan3_fixed_hdr_t_session_id_set, + bcmpkt_erspan3_fixed_hdr_t_t_set, + bcmpkt_erspan3_fixed_hdr_t_timestamp_set, + bcmpkt_erspan3_fixed_hdr_t_ver_set, + bcmpkt_erspan3_fixed_hdr_t_vlan_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_erspan3_fixed_hdr_t_field_data[] = { + BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_erspan3_fixed_hdr_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_32_4_0_erspan3_fixed_hdr_t_field_data, +}; + + +static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 26, 6); + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 26, 6, val); + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 10); + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 10, val); + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_erspan3_subhdr_5_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { + bcmpkt_erspan3_subhdr_5_t_platform_id_get, + bcmpkt_erspan3_subhdr_5_t_port_id_get, + bcmpkt_erspan3_subhdr_5_t_switch_id_get, + bcmpkt_erspan3_subhdr_5_t_timestamp_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_erspan3_subhdr_5_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { + bcmpkt_erspan3_subhdr_5_t_platform_id_set, + bcmpkt_erspan3_subhdr_5_t_port_id_set, + bcmpkt_erspan3_subhdr_5_t_switch_id_set, + bcmpkt_erspan3_subhdr_5_t_timestamp_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_erspan3_subhdr_5_t_field_data[] = { + BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_erspan3_subhdr_5_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_32_4_0_erspan3_subhdr_5_t_field_data, +}; + + +static int32_t bcmpkt_esp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 8); + + return ret; +} + +static int32_t bcmpkt_esp_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_esp_t_pad_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 8, 16); + + return ret; +} + +static int32_t bcmpkt_esp_t_pad_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 8, 16, val); + return ret; +} + +static int32_t bcmpkt_esp_t_pad_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 24, 8); + + return ret; +} + +static int32_t bcmpkt_esp_t_pad_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_esp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_esp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_esp_t_spi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_esp_t_spi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_esp_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ESP_T_FID_COUNT] = { + bcmpkt_esp_t_next_header_get, + bcmpkt_esp_t_pad_get, + bcmpkt_esp_t_pad_len_get, + bcmpkt_esp_t_seq_num_get, + bcmpkt_esp_t_spi_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_esp_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ESP_T_FID_COUNT] = { + bcmpkt_esp_t_next_header_set, + bcmpkt_esp_t_pad_set, + bcmpkt_esp_t_pad_len_set, + bcmpkt_esp_t_seq_num_set, + bcmpkt_esp_t_spi_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_esp_t_field_data[] = { + BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_esp_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ESP_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_32_4_0_esp_t_field_data, +}; + + +static int32_t bcmpkt_ethertype_t_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ethertype_t_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_ethertype_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = { + bcmpkt_ethertype_t_type_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_ethertype_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = { + bcmpkt_ethertype_t_type_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_ethertype_t_field_data[] = { + BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_ethertype_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ETHERTYPE_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_32_4_0_ethertype_t_field_data, +}; + + +static int32_t bcmpkt_frag_t_frag_info_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_frag_t_frag_info_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_frag_t_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_frag_t_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_frag_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_frag_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_frag_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_frag_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_frag_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_FRAG_T_FID_COUNT] = { + bcmpkt_frag_t_frag_info_get, + bcmpkt_frag_t_id_get, + bcmpkt_frag_t_next_header_get, + bcmpkt_frag_t_reserved_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_frag_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_FRAG_T_FID_COUNT] = { + bcmpkt_frag_t_frag_info_set, + bcmpkt_frag_t_id_set, + bcmpkt_frag_t_next_header_set, + bcmpkt_frag_t_reserved_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_frag_t_field_data[] = { + BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_frag_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_FRAG_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_32_4_0_frag_t_field_data, +}; + + +static int32_t bcmpkt_gbp_ethernet_shim_t_ethertype_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_gbp_ethernet_shim_t_ethertype_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_gbp_ethernet_shim_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 20, 4); + + return ret; +} + +static int32_t bcmpkt_gbp_ethernet_shim_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_gbp_ethernet_shim_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_gbp_ethernet_shim_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_gbp_ethernet_shim_t_sid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_gbp_ethernet_shim_t_sid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_gbp_ethernet_shim_t_subtype_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_gbp_ethernet_shim_t_subtype_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_gbp_ethernet_shim_t_ver_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 4); + + return ret; +} + +static int32_t bcmpkt_gbp_ethernet_shim_t_ver_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_gbp_ethernet_shim_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT] = { + bcmpkt_gbp_ethernet_shim_t_ethertype_get, + bcmpkt_gbp_ethernet_shim_t_flags_get, + bcmpkt_gbp_ethernet_shim_t_reserved_get, + bcmpkt_gbp_ethernet_shim_t_sid_get, + bcmpkt_gbp_ethernet_shim_t_subtype_get, + bcmpkt_gbp_ethernet_shim_t_ver_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_gbp_ethernet_shim_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT] = { + bcmpkt_gbp_ethernet_shim_t_ethertype_set, + bcmpkt_gbp_ethernet_shim_t_flags_set, + bcmpkt_gbp_ethernet_shim_t_reserved_set, + bcmpkt_gbp_ethernet_shim_t_sid_set, + bcmpkt_gbp_ethernet_shim_t_subtype_set, + bcmpkt_gbp_ethernet_shim_t_ver_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_gbp_ethernet_shim_t_field_data[] = { + BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GBP_ETHERNET_SHIM_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_gbp_ethernet_shim_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_32_4_0_gbp_ethernet_shim_t_field_data, +}; + + +static int32_t bcmpkt_generic_loopback_t_destination_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_destination_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_destination_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_destination_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_entropy_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_entropy_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_header_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_header_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_input_priority_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_input_priority_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_ctrl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 4, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_ctrl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 4, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 28, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_qos_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_qos_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_source_system_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_source_system_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_src_subport_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_src_subport_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_start_byte_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_start_byte_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_generic_loopback_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { + bcmpkt_generic_loopback_t_destination_obj_get, + bcmpkt_generic_loopback_t_destination_type_get, + bcmpkt_generic_loopback_t_entropy_obj_get, + bcmpkt_generic_loopback_t_flags_get, + bcmpkt_generic_loopback_t_header_type_get, + bcmpkt_generic_loopback_t_input_priority_get, + bcmpkt_generic_loopback_t_interface_ctrl_get, + bcmpkt_generic_loopback_t_interface_obj_get, + bcmpkt_generic_loopback_t_processing_ctrl_0_get, + bcmpkt_generic_loopback_t_processing_ctrl_1_get, + bcmpkt_generic_loopback_t_qos_obj_get, + bcmpkt_generic_loopback_t_reserved_1_get, + bcmpkt_generic_loopback_t_source_system_port_get, + bcmpkt_generic_loopback_t_src_subport_num_get, + bcmpkt_generic_loopback_t_start_byte_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_generic_loopback_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { + bcmpkt_generic_loopback_t_destination_obj_set, + bcmpkt_generic_loopback_t_destination_type_set, + bcmpkt_generic_loopback_t_entropy_obj_set, + bcmpkt_generic_loopback_t_flags_set, + bcmpkt_generic_loopback_t_header_type_set, + bcmpkt_generic_loopback_t_input_priority_set, + bcmpkt_generic_loopback_t_interface_ctrl_set, + bcmpkt_generic_loopback_t_interface_obj_set, + bcmpkt_generic_loopback_t_processing_ctrl_0_set, + bcmpkt_generic_loopback_t_processing_ctrl_1_set, + bcmpkt_generic_loopback_t_qos_obj_set, + bcmpkt_generic_loopback_t_reserved_1_set, + bcmpkt_generic_loopback_t_source_system_port_set, + bcmpkt_generic_loopback_t_src_subport_num_set, + bcmpkt_generic_loopback_t_start_byte_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_generic_loopback_t_field_data[] = { + BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_generic_loopback_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_32_4_0_generic_loopback_t_field_data, +}; + + +static int32_t bcmpkt_gpe_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_gpe_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_gpe_t_next_protocol_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_gpe_t_next_protocol_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_gpe_t_reserved0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 16); + + return ret; +} + +static int32_t bcmpkt_gpe_t_reserved0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 16, val); + return ret; +} + +static int32_t bcmpkt_gpe_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 8); + + return ret; +} + +static int32_t bcmpkt_gpe_t_reserved1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_gpe_t_vni_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 8, 24); + + return ret; +} + +static int32_t bcmpkt_gpe_t_vni_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 8, 24, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_gpe_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GPE_T_FID_COUNT] = { + bcmpkt_gpe_t_flags_get, + bcmpkt_gpe_t_next_protocol_get, + bcmpkt_gpe_t_reserved0_get, + bcmpkt_gpe_t_reserved1_get, + bcmpkt_gpe_t_vni_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_gpe_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GPE_T_FID_COUNT] = { + bcmpkt_gpe_t_flags_set, + bcmpkt_gpe_t_next_protocol_set, + bcmpkt_gpe_t_reserved0_set, + bcmpkt_gpe_t_reserved1_set, + bcmpkt_gpe_t_vni_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_gpe_t_field_data[] = { + BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_gpe_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GPE_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_32_4_0_gpe_t_field_data, +}; + + +static int32_t bcmpkt_gre_chksum_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_gre_chksum_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_gre_chksum_t_offset_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_gre_chksum_t_offset_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_gre_chksum_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = { + bcmpkt_gre_chksum_t_checksum_get, + bcmpkt_gre_chksum_t_offset_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_gre_chksum_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = { + bcmpkt_gre_chksum_t_checksum_set, + bcmpkt_gre_chksum_t_offset_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_gre_chksum_t_field_data[] = { + BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_gre_chksum_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_32_4_0_gre_chksum_t_field_data, +}; + + +static int32_t bcmpkt_gre_key_t_key_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gre_key_t_key_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_gre_key_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_KEY_T_FID_COUNT] = { + bcmpkt_gre_key_t_key_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_gre_key_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_KEY_T_FID_COUNT] = { + bcmpkt_gre_key_t_key_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_gre_key_t_field_data[] = { + BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_gre_key_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_KEY_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_32_4_0_gre_key_t_field_data, +}; + + +static int32_t bcmpkt_gre_rout_t_routing_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gre_rout_t_routing_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_gre_rout_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = { + bcmpkt_gre_rout_t_routing_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_gre_rout_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = { + bcmpkt_gre_rout_t_routing_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_gre_rout_t_field_data[] = { + BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_gre_rout_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_ROUT_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_32_4_0_gre_rout_t_field_data, +}; + + +static int32_t bcmpkt_gre_seq_t_sequence_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_gre_seq_t_sequence_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_gre_seq_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = { + bcmpkt_gre_seq_t_sequence_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_gre_seq_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = { + bcmpkt_gre_seq_t_sequence_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_gre_seq_t_field_data[] = { + BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_gre_seq_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_SEQ_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_32_4_0_gre_seq_t_field_data, +}; + + +static int32_t bcmpkt_gre_t_c_r_k_s_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_gre_t_c_r_k_s_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_gre_t_protocol_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_gre_t_protocol_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_gre_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 19, 9); + + return ret; +} + +static int32_t bcmpkt_gre_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 19, 9, val); + return ret; +} + +static int32_t bcmpkt_gre_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 3); + + return ret; +} + +static int32_t bcmpkt_gre_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 3, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_gre_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_T_FID_COUNT] = { + bcmpkt_gre_t_c_r_k_s_get, + bcmpkt_gre_t_protocol_get, + bcmpkt_gre_t_reserved_get, + bcmpkt_gre_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_gre_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_T_FID_COUNT] = { + bcmpkt_gre_t_c_r_k_s_set, + bcmpkt_gre_t_protocol_set, + bcmpkt_gre_t_reserved_set, + bcmpkt_gre_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_gre_t_field_data[] = { + BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_gre_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_GRE_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_32_4_0_gre_t_field_data, +}; + + +static int32_t bcmpkt_hg3_base_t_cn_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 4, 2); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_cn_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 4, 2, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_cng_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 6, 2); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_cng_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 6, 2, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_entropy_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 8, 8); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_entropy_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_ext_hdr_present_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 18, 2); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_ext_hdr_present_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 18, 2, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_hg3_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 17, 1); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_hg3_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 17, 1, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_l3_routed_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 31, 1); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_l3_routed_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 31, 1, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_mirror_copy_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 1); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_mirror_copy_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 1, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_reserved_etype_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 22, 10); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_reserved_etype_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 22, 10, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_system_destination_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 15); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_system_destination_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 15, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_system_destination_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 15, 1); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_system_destination_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 15, 1, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_system_source_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 15); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_system_source_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 15, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_tc_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 4); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_tc_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 4, val); + return ret; +} + +static int32_t bcmpkt_hg3_base_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 2); + + return ret; +} + +static int32_t bcmpkt_hg3_base_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 2, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_hg3_base_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_FID_COUNT] = { + bcmpkt_hg3_base_t_cn_get, + bcmpkt_hg3_base_t_cng_get, + bcmpkt_hg3_base_t_entropy_get, + bcmpkt_hg3_base_t_ext_hdr_present_get, + bcmpkt_hg3_base_t_hg3_reserved_get, + bcmpkt_hg3_base_t_l3_routed_get, + bcmpkt_hg3_base_t_mirror_copy_get, + bcmpkt_hg3_base_t_reserved_etype_get, + bcmpkt_hg3_base_t_system_destination_get, + bcmpkt_hg3_base_t_system_destination_type_get, + bcmpkt_hg3_base_t_system_source_get, + bcmpkt_hg3_base_t_tc_get, + bcmpkt_hg3_base_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_hg3_base_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_FID_COUNT] = { + bcmpkt_hg3_base_t_cn_set, + bcmpkt_hg3_base_t_cng_set, + bcmpkt_hg3_base_t_entropy_set, + bcmpkt_hg3_base_t_ext_hdr_present_set, + bcmpkt_hg3_base_t_hg3_reserved_set, + bcmpkt_hg3_base_t_l3_routed_set, + bcmpkt_hg3_base_t_mirror_copy_set, + bcmpkt_hg3_base_t_reserved_etype_set, + bcmpkt_hg3_base_t_system_destination_set, + bcmpkt_hg3_base_t_system_destination_type_set, + bcmpkt_hg3_base_t_system_source_set, + bcmpkt_hg3_base_t_tc_set, + bcmpkt_hg3_base_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_hg3_base_t_field_data[] = { + BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_hg3_base_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_BASE_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_32_4_0_hg3_base_t_field_data, +}; + + +static int32_t bcmpkt_hg3_extension_0_t_class_id_lsb_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_class_id_lsb_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_class_id_msb_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 2); + + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_class_id_msb_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 2, val); + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 26, 6); + + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 26, 6, val); + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_forwarding_domain_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_forwarding_domain_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_svp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_hg3_extension_0_t_svp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_hg3_extension_0_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT] = { + bcmpkt_hg3_extension_0_t_class_id_lsb_get, + bcmpkt_hg3_extension_0_t_class_id_msb_get, + bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_get, + bcmpkt_hg3_extension_0_t_flags_get, + bcmpkt_hg3_extension_0_t_forwarding_domain_get, + bcmpkt_hg3_extension_0_t_svp_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_hg3_extension_0_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT] = { + bcmpkt_hg3_extension_0_t_class_id_lsb_set, + bcmpkt_hg3_extension_0_t_class_id_msb_set, + bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_set, + bcmpkt_hg3_extension_0_t_flags_set, + bcmpkt_hg3_extension_0_t_forwarding_domain_set, + bcmpkt_hg3_extension_0_t_svp_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_hg3_extension_0_t_field_data[] = { + BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_EXTENSION_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_hg3_extension_0_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_32_4_0_hg3_extension_0_t_field_data, +}; + + +static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_option_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_hop_by_hop_t_option_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_hop_by_hop_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = { + bcmpkt_hop_by_hop_t_hdr_ext_len_get, + bcmpkt_hop_by_hop_t_next_header_get, + bcmpkt_hop_by_hop_t_option_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_hop_by_hop_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = { + bcmpkt_hop_by_hop_t_hdr_ext_len_set, + bcmpkt_hop_by_hop_t_next_header_set, + bcmpkt_hop_by_hop_t_option_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_hop_by_hop_t_field_data[] = { + BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_hop_by_hop_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_32_4_0_hop_by_hop_t_field_data, +}; + + +static int32_t bcmpkt_icmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_icmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_icmp_t_code_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_icmp_t_code_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_icmp_t_icmp_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_icmp_t_icmp_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_icmp_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ICMP_T_FID_COUNT] = { + bcmpkt_icmp_t_checksum_get, + bcmpkt_icmp_t_code_get, + bcmpkt_icmp_t_icmp_type_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_icmp_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ICMP_T_FID_COUNT] = { + bcmpkt_icmp_t_checksum_set, + bcmpkt_icmp_t_code_set, + bcmpkt_icmp_t_icmp_type_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_icmp_t_field_data[] = { + BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_icmp_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ICMP_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_32_4_0_icmp_t_field_data, +}; + + +static int32_t bcmpkt_ifa_header_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_header_t_gns_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 4); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_gns_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 4, val); + return ret; +} + +static int32_t bcmpkt_ifa_header_t_max_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_max_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_header_t_next_hdr_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_next_hdr_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_header_t_ver_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_ifa_header_t_ver_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_ifa_header_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = { + bcmpkt_ifa_header_t_flags_get, + bcmpkt_ifa_header_t_gns_get, + bcmpkt_ifa_header_t_max_length_get, + bcmpkt_ifa_header_t_next_hdr_get, + bcmpkt_ifa_header_t_ver_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_ifa_header_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = { + bcmpkt_ifa_header_t_flags_set, + bcmpkt_ifa_header_t_gns_set, + bcmpkt_ifa_header_t_max_length_set, + bcmpkt_ifa_header_t_next_hdr_set, + bcmpkt_ifa_header_t_ver_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_ifa_header_t_field_data[] = { + BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_ifa_header_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_HEADER_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_32_4_0_ifa_header_t_field_data, +}; + + +static int32_t bcmpkt_ifa_metadata_a_t_cn_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 26, 2); + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_a_t_cn_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 26, 2, val); + return ret; +} + +static int32_t bcmpkt_ifa_metadata_a_t_fwd_hdr_ttl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_a_t_fwd_hdr_ttl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_metadata_a_t_lns_device_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 24); + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_a_t_lns_device_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 24, val); + return ret; +} + +static int32_t bcmpkt_ifa_metadata_a_t_port_speed_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 28, 4); + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_a_t_port_speed_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_ifa_metadata_a_t_queue_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 20, 6); + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_a_t_queue_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 20, 6, val); + return ret; +} + +static int32_t bcmpkt_ifa_metadata_a_t_rx_timestamp_sec_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 20); + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_a_t_rx_timestamp_sec_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 20, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_ifa_metadata_a_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT] = { + bcmpkt_ifa_metadata_a_t_cn_get, + bcmpkt_ifa_metadata_a_t_fwd_hdr_ttl_get, + bcmpkt_ifa_metadata_a_t_lns_device_id_get, + bcmpkt_ifa_metadata_a_t_port_speed_get, + bcmpkt_ifa_metadata_a_t_queue_id_get, + bcmpkt_ifa_metadata_a_t_rx_timestamp_sec_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_ifa_metadata_a_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT] = { + bcmpkt_ifa_metadata_a_t_cn_set, + bcmpkt_ifa_metadata_a_t_fwd_hdr_ttl_set, + bcmpkt_ifa_metadata_a_t_lns_device_id_set, + bcmpkt_ifa_metadata_a_t_port_speed_set, + bcmpkt_ifa_metadata_a_t_queue_id_set, + bcmpkt_ifa_metadata_a_t_rx_timestamp_sec_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_ifa_metadata_a_t_field_data[] = { + BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_A_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_ifa_metadata_a_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_32_4_0_ifa_metadata_a_t_field_data, +}; + + +static int32_t bcmpkt_ifa_metadata_b_t_egress_port_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_b_t_egress_port_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ifa_metadata_b_t_ingress_port_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_b_t_ingress_port_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ifa_metadata_b_t_mmu_stat_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_b_t_mmu_stat_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_b_t_mmu_stat_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_b_t_mmu_stat_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_b_t_residence_time_nanosec_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_b_t_residence_time_nanosec_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_b_t_rx_timestamp_nanosec_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_b_t_rx_timestamp_nanosec_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_b_t_tx_queue_byte_count_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_b_t_tx_queue_byte_count_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_ifa_metadata_b_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT] = { + bcmpkt_ifa_metadata_b_t_egress_port_id_get, + bcmpkt_ifa_metadata_b_t_ingress_port_id_get, + bcmpkt_ifa_metadata_b_t_mmu_stat_0_get, + bcmpkt_ifa_metadata_b_t_mmu_stat_1_get, + bcmpkt_ifa_metadata_b_t_residence_time_nanosec_get, + bcmpkt_ifa_metadata_b_t_rx_timestamp_nanosec_get, + bcmpkt_ifa_metadata_b_t_tx_queue_byte_count_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_ifa_metadata_b_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT] = { + bcmpkt_ifa_metadata_b_t_egress_port_id_set, + bcmpkt_ifa_metadata_b_t_ingress_port_id_set, + bcmpkt_ifa_metadata_b_t_mmu_stat_0_set, + bcmpkt_ifa_metadata_b_t_mmu_stat_1_set, + bcmpkt_ifa_metadata_b_t_residence_time_nanosec_set, + bcmpkt_ifa_metadata_b_t_rx_timestamp_nanosec_set, + bcmpkt_ifa_metadata_b_t_tx_queue_byte_count_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_ifa_metadata_b_t_field_data[] = { + BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_B_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_ifa_metadata_b_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_32_4_0_ifa_metadata_b_t_field_data, +}; + + +static int32_t bcmpkt_ifa_metadata_base_t_action_vector_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_base_t_action_vector_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ifa_metadata_base_t_hop_limit_current_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_base_t_hop_limit_current_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ifa_metadata_base_t_request_vector_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ifa_metadata_base_t_request_vector_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_ifa_metadata_base_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT] = { + bcmpkt_ifa_metadata_base_t_action_vector_get, + bcmpkt_ifa_metadata_base_t_hop_limit_current_length_get, + bcmpkt_ifa_metadata_base_t_request_vector_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_ifa_metadata_base_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT] = { + bcmpkt_ifa_metadata_base_t_action_vector_set, + bcmpkt_ifa_metadata_base_t_hop_limit_current_length_set, + bcmpkt_ifa_metadata_base_t_request_vector_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_ifa_metadata_base_t_field_data[] = { + BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_BASE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_ifa_metadata_base_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_32_4_0_ifa_metadata_base_t_field_data, +}; + + +static int32_t bcmpkt_igmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_igmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_igmp_t_group_address_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_igmp_t_group_address_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_igmp_t_igmp_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_igmp_t_igmp_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_igmp_t_max_resp_time_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_igmp_t_max_resp_time_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_igmp_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IGMP_T_FID_COUNT] = { + bcmpkt_igmp_t_checksum_get, + bcmpkt_igmp_t_group_address_get, + bcmpkt_igmp_t_igmp_type_get, + bcmpkt_igmp_t_max_resp_time_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_igmp_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IGMP_T_FID_COUNT] = { + bcmpkt_igmp_t_checksum_set, + bcmpkt_igmp_t_group_address_set, + bcmpkt_igmp_t_igmp_type_set, + bcmpkt_igmp_t_max_resp_time_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_igmp_t_field_data[] = { + BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_igmp_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IGMP_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_32_4_0_igmp_t_field_data, +}; + + +static int32_t bcmpkt_ioam_e2e_t_ioam_e2e_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ioam_e2e_t_ioam_e2e_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ioam_e2e_t_ioam_e2e_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ioam_e2e_t_ioam_e2e_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ioam_e2e_t_ioam_hdr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ioam_e2e_t_ioam_hdr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ioam_e2e_t_namespace_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ioam_e2e_t_namespace_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ioam_e2e_t_next_protocol_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_ioam_e2e_t_next_protocol_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_ioam_e2e_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_ioam_e2e_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_ioam_e2e_t_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ioam_e2e_t_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_ioam_e2e_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IOAM_E2E_T_FID_COUNT] = { + bcmpkt_ioam_e2e_t_ioam_e2e_data_get, + bcmpkt_ioam_e2e_t_ioam_e2e_type_get, + bcmpkt_ioam_e2e_t_ioam_hdr_len_get, + bcmpkt_ioam_e2e_t_namespace_id_get, + bcmpkt_ioam_e2e_t_next_protocol_get, + bcmpkt_ioam_e2e_t_reserved_get, + bcmpkt_ioam_e2e_t_type_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_ioam_e2e_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IOAM_E2E_T_FID_COUNT] = { + bcmpkt_ioam_e2e_t_ioam_e2e_data_set, + bcmpkt_ioam_e2e_t_ioam_e2e_type_set, + bcmpkt_ioam_e2e_t_ioam_hdr_len_set, + bcmpkt_ioam_e2e_t_namespace_id_set, + bcmpkt_ioam_e2e_t_next_protocol_set, + bcmpkt_ioam_e2e_t_reserved_set, + bcmpkt_ioam_e2e_t_type_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_ioam_e2e_t_field_data[] = { + BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IOAM_E2E_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_ioam_e2e_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IOAM_E2E_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_32_4_0_ioam_e2e_t_field_data, +}; + + +static int32_t bcmpkt_ipfix_t_export_time_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_export_time_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipfix_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipfix_t_obs_domain_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_obs_domain_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ipfix_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_ipfix_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPFIX_T_FID_COUNT] = { + bcmpkt_ipfix_t_export_time_get, + bcmpkt_ipfix_t_length_get, + bcmpkt_ipfix_t_obs_domain_id_get, + bcmpkt_ipfix_t_sequence_num_get, + bcmpkt_ipfix_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_ipfix_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPFIX_T_FID_COUNT] = { + bcmpkt_ipfix_t_export_time_set, + bcmpkt_ipfix_t_length_set, + bcmpkt_ipfix_t_obs_domain_id_set, + bcmpkt_ipfix_t_sequence_num_set, + bcmpkt_ipfix_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_ipfix_t_field_data[] = { + BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_ipfix_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPFIX_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_32_4_0_ipfix_t_field_data, +}; + + +static int32_t bcmpkt_ipv4_t_da_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_da_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_flags_frag_offset_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_flags_frag_offset_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_hdr_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_hdr_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_option_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_option_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_protocol_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_protocol_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_sa_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_sa_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_tos_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_tos_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_total_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_total_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_ttl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_ttl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_version_hdr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_version_hdr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_ipv4_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV4_T_FID_COUNT] = { + bcmpkt_ipv4_t_da_get, + bcmpkt_ipv4_t_flags_frag_offset_get, + bcmpkt_ipv4_t_hdr_checksum_get, + bcmpkt_ipv4_t_id_get, + bcmpkt_ipv4_t_option_get, + bcmpkt_ipv4_t_protocol_get, + bcmpkt_ipv4_t_sa_get, + bcmpkt_ipv4_t_tos_get, + bcmpkt_ipv4_t_total_length_get, + bcmpkt_ipv4_t_ttl_get, + bcmpkt_ipv4_t_version_hdr_len_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_ipv4_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV4_T_FID_COUNT] = { + bcmpkt_ipv4_t_da_set, + bcmpkt_ipv4_t_flags_frag_offset_set, + bcmpkt_ipv4_t_hdr_checksum_set, + bcmpkt_ipv4_t_id_set, + bcmpkt_ipv4_t_option_set, + bcmpkt_ipv4_t_protocol_set, + bcmpkt_ipv4_t_sa_set, + bcmpkt_ipv4_t_tos_set, + bcmpkt_ipv4_t_total_length_set, + bcmpkt_ipv4_t_ttl_set, + bcmpkt_ipv4_t_version_hdr_len_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_ipv4_t_field_data[] = { + BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_ipv4_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV4_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_32_4_0_ipv4_t_field_data, +}; + + +static int32_t bcmpkt_ipv6_t_da_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_da_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_flow_label_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 20); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_flow_label_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 20, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_hop_limit_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 8); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_hop_limit_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 8, 8); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_payload_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_payload_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_sa_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_sa_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_traffic_class_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 8); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_traffic_class_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_ipv6_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV6_T_FID_COUNT] = { + bcmpkt_ipv6_t_da_get, + bcmpkt_ipv6_t_flow_label_get, + bcmpkt_ipv6_t_hop_limit_get, + bcmpkt_ipv6_t_next_header_get, + bcmpkt_ipv6_t_payload_length_get, + bcmpkt_ipv6_t_sa_get, + bcmpkt_ipv6_t_traffic_class_get, + bcmpkt_ipv6_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_ipv6_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV6_T_FID_COUNT] = { + bcmpkt_ipv6_t_da_set, + bcmpkt_ipv6_t_flow_label_set, + bcmpkt_ipv6_t_hop_limit_set, + bcmpkt_ipv6_t_next_header_set, + bcmpkt_ipv6_t_payload_length_set, + bcmpkt_ipv6_t_sa_set, + bcmpkt_ipv6_t_traffic_class_set, + bcmpkt_ipv6_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_ipv6_t_field_data[] = { + BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_ipv6_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_IPV6_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_32_4_0_ipv6_t_field_data, +}; + + +static int32_t bcmpkt_l2_t_macda_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_l2_t_macda_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_l2_t_macsa_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_l2_t_macsa_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_l2_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_L2_T_FID_COUNT] = { + bcmpkt_l2_t_macda_get, + bcmpkt_l2_t_macsa_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_l2_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_L2_T_FID_COUNT] = { + bcmpkt_l2_t_macda_set, + bcmpkt_l2_t_macsa_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_l2_t_field_data[] = { + BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_l2_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_L2_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_32_4_0_l2_t_field_data, +}; + + +static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_mirror_erspan_sn_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { + bcmpkt_mirror_erspan_sn_t_seq_num_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_mirror_erspan_sn_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { + bcmpkt_mirror_erspan_sn_t_seq_num_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_mirror_erspan_sn_t_field_data[] = { + BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_mirror_erspan_sn_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_32_4_0_mirror_erspan_sn_t_field_data, +}; + + +static int32_t bcmpkt_mirror_transport_t_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_mirror_transport_t_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_mirror_transport_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { + bcmpkt_mirror_transport_t_data_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_mirror_transport_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { + bcmpkt_mirror_transport_t_data_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_mirror_transport_t_field_data[] = { + BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_mirror_transport_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_32_4_0_mirror_transport_t_field_data, +}; + + +static int32_t bcmpkt_mpls_ach_t_channel_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_channel_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_cw_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 4); + + return ret; +} + +static int32_t bcmpkt_mpls_ach_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_mpls_ach_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = { + bcmpkt_mpls_ach_t_channel_type_get, + bcmpkt_mpls_ach_t_cw_type_get, + bcmpkt_mpls_ach_t_reserved_get, + bcmpkt_mpls_ach_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_mpls_ach_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = { + bcmpkt_mpls_ach_t_channel_type_set, + bcmpkt_mpls_ach_t_cw_type_set, + bcmpkt_mpls_ach_t_reserved_set, + bcmpkt_mpls_ach_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_mpls_ach_t_field_data[] = { + BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_mpls_ach_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_ACH_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_32_4_0_mpls_ach_t_field_data, +}; + + +static int32_t bcmpkt_mpls_bv_t_value_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_mpls_bv_t_value_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_mpls_bv_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_BV_T_FID_COUNT] = { + bcmpkt_mpls_bv_t_value_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_mpls_bv_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_BV_T_FID_COUNT] = { + bcmpkt_mpls_bv_t_value_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_mpls_bv_t_field_data[] = { + BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_mpls_bv_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_BV_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_32_4_0_mpls_bv_t_field_data, +}; + + +static int32_t bcmpkt_mpls_cw_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_cw_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 12); + + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 12, val); + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_seq_number_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_mpls_cw_t_seq_number_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_mpls_cw_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_CW_T_FID_COUNT] = { + bcmpkt_mpls_cw_t_cw_type_get, + bcmpkt_mpls_cw_t_reserved_get, + bcmpkt_mpls_cw_t_seq_number_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_mpls_cw_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_CW_T_FID_COUNT] = { + bcmpkt_mpls_cw_t_cw_type_set, + bcmpkt_mpls_cw_t_reserved_set, + bcmpkt_mpls_cw_t_seq_number_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_mpls_cw_t_field_data[] = { + BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_mpls_cw_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_CW_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_32_4_0_mpls_cw_t_field_data, +}; + + +static int32_t bcmpkt_mpls_t_bos_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 1); + + return ret; +} + +static int32_t bcmpkt_mpls_t_bos_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 1, val); + return ret; +} + +static int32_t bcmpkt_mpls_t_exp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 9, 3); + + return ret; +} + +static int32_t bcmpkt_mpls_t_exp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 9, 3, val); + return ret; +} + +static int32_t bcmpkt_mpls_t_label_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 20); + + return ret; +} + +static int32_t bcmpkt_mpls_t_label_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 20, val); + return ret; +} + +static int32_t bcmpkt_mpls_t_ttl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_mpls_t_ttl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_mpls_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_T_FID_COUNT] = { + bcmpkt_mpls_t_bos_get, + bcmpkt_mpls_t_exp_get, + bcmpkt_mpls_t_label_get, + bcmpkt_mpls_t_ttl_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_mpls_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_T_FID_COUNT] = { + bcmpkt_mpls_t_bos_set, + bcmpkt_mpls_t_exp_set, + bcmpkt_mpls_t_label_set, + bcmpkt_mpls_t_ttl_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_mpls_t_field_data[] = { + BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_mpls_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_MPLS_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_32_4_0_mpls_t_field_data, +}; + + +static int32_t bcmpkt_p_1588_t_cntrl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[8], 24, 8); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_cntrl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[8], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_correction_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_correction_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_domain_nb_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_domain_nb_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_logmsginterval_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[8], 16, 8); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_logmsginterval_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[8], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_msg_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_msg_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_msg_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 4); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_msg_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 4, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 4); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved3_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_reserved3_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_seq_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[7], 0, 16); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_seq_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[7], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_srcportid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_srcportid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_p_1588_t_transportspec_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_transportspec_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_p_1588_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 4); + + return ret; +} + +static int32_t bcmpkt_p_1588_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_p_1588_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_P_1588_T_FID_COUNT] = { + bcmpkt_p_1588_t_cntrl_get, + bcmpkt_p_1588_t_correction_get, + bcmpkt_p_1588_t_domain_nb_get, + bcmpkt_p_1588_t_flags_get, + bcmpkt_p_1588_t_logmsginterval_get, + bcmpkt_p_1588_t_msg_length_get, + bcmpkt_p_1588_t_msg_type_get, + bcmpkt_p_1588_t_reserved1_get, + bcmpkt_p_1588_t_reserved2_get, + bcmpkt_p_1588_t_reserved3_get, + bcmpkt_p_1588_t_seq_id_get, + bcmpkt_p_1588_t_srcportid_get, + bcmpkt_p_1588_t_transportspec_get, + bcmpkt_p_1588_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_p_1588_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_P_1588_T_FID_COUNT] = { + bcmpkt_p_1588_t_cntrl_set, + bcmpkt_p_1588_t_correction_set, + bcmpkt_p_1588_t_domain_nb_set, + bcmpkt_p_1588_t_flags_set, + bcmpkt_p_1588_t_logmsginterval_set, + bcmpkt_p_1588_t_msg_length_set, + bcmpkt_p_1588_t_msg_type_set, + bcmpkt_p_1588_t_reserved1_set, + bcmpkt_p_1588_t_reserved2_set, + bcmpkt_p_1588_t_reserved3_set, + bcmpkt_p_1588_t_seq_id_set, + bcmpkt_p_1588_t_srcportid_set, + bcmpkt_p_1588_t_transportspec_set, + bcmpkt_p_1588_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_p_1588_t_field_data[] = { + BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_p_1588_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_P_1588_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_32_4_0_p_1588_t_field_data, +}; + + +static int32_t bcmpkt_pim_t_hdr_bytes_0_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_pim_t_hdr_bytes_0_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_pim_t_hdr_bytes_2_3_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_pim_t_hdr_bytes_2_3_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_pim_t_hdr_bytes_4_5_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_pim_t_hdr_bytes_4_5_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_pim_t_hdr_bytes_6_7_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_pim_t_hdr_bytes_6_7_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_pim_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PIM_T_FID_COUNT] = { + bcmpkt_pim_t_hdr_bytes_0_1_get, + bcmpkt_pim_t_hdr_bytes_2_3_get, + bcmpkt_pim_t_hdr_bytes_4_5_get, + bcmpkt_pim_t_hdr_bytes_6_7_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_pim_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PIM_T_FID_COUNT] = { + bcmpkt_pim_t_hdr_bytes_0_1_set, + bcmpkt_pim_t_hdr_bytes_2_3_set, + bcmpkt_pim_t_hdr_bytes_4_5_set, + bcmpkt_pim_t_hdr_bytes_6_7_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_pim_t_field_data[] = { + BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PIM_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_pim_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PIM_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_32_4_0_pim_t_field_data, +}; + + +static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_option_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_prog_ext_hdr_t_option_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_prog_ext_hdr_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = { + bcmpkt_prog_ext_hdr_t_hdr_ext_len_get, + bcmpkt_prog_ext_hdr_t_next_header_get, + bcmpkt_prog_ext_hdr_t_option_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_prog_ext_hdr_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = { + bcmpkt_prog_ext_hdr_t_hdr_ext_len_set, + bcmpkt_prog_ext_hdr_t_next_header_set, + bcmpkt_prog_ext_hdr_t_option_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_prog_ext_hdr_t_field_data[] = { + BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_prog_ext_hdr_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_32_4_0_prog_ext_hdr_t_field_data, +}; + + +static int32_t bcmpkt_psamp_0_t_flowset_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_flowset_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_0_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_0_t_next_hop_index_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_next_hop_index_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_psamp_0_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_0_T_FID_COUNT] = { + bcmpkt_psamp_0_t_flowset_get, + bcmpkt_psamp_0_t_length_get, + bcmpkt_psamp_0_t_next_hop_index_get, + bcmpkt_psamp_0_t_obs_time_ns_get, + bcmpkt_psamp_0_t_obs_time_s_get, + bcmpkt_psamp_0_t_template_id_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_psamp_0_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_0_T_FID_COUNT] = { + bcmpkt_psamp_0_t_flowset_set, + bcmpkt_psamp_0_t_length_set, + bcmpkt_psamp_0_t_next_hop_index_set, + bcmpkt_psamp_0_t_obs_time_ns_set, + bcmpkt_psamp_0_t_obs_time_s_set, + bcmpkt_psamp_0_t_template_id_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_psamp_0_t_field_data[] = { + BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_psamp_0_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_0_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_32_4_0_psamp_0_t_field_data, +}; + + +static int32_t bcmpkt_psamp_1_t_dlb_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 24, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_dlb_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_egress_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_egress_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_epoch_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_epoch_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_1_t_variable_flag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_1_t_variable_flag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_psamp_1_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_1_T_FID_COUNT] = { + bcmpkt_psamp_1_t_dlb_id_get, + bcmpkt_psamp_1_t_egress_port_get, + bcmpkt_psamp_1_t_epoch_get, + bcmpkt_psamp_1_t_ingress_port_get, + bcmpkt_psamp_1_t_sampled_length_get, + bcmpkt_psamp_1_t_user_meta_data_get, + bcmpkt_psamp_1_t_variable_flag_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_psamp_1_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_1_T_FID_COUNT] = { + bcmpkt_psamp_1_t_dlb_id_set, + bcmpkt_psamp_1_t_egress_port_set, + bcmpkt_psamp_1_t_epoch_set, + bcmpkt_psamp_1_t_ingress_port_set, + bcmpkt_psamp_1_t_sampled_length_set, + bcmpkt_psamp_1_t_user_meta_data_set, + bcmpkt_psamp_1_t_variable_flag_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_psamp_1_t_field_data[] = { + BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_psamp_1_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_1_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_32_4_0_psamp_1_t_field_data, +}; + + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[4], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[4], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[4], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[4], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_psamp_mirror_on_drop_0_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get, + bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get, + bcmpkt_psamp_mirror_on_drop_0_t_length_get, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get, + bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get, + bcmpkt_psamp_mirror_on_drop_0_t_template_id_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_psamp_mirror_on_drop_0_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set, + bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set, + bcmpkt_psamp_mirror_on_drop_0_t_length_set, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set, + bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set, + bcmpkt_psamp_mirror_on_drop_0_t_template_id_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_psamp_mirror_on_drop_0_t_field_data[] = { + BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_psamp_mirror_on_drop_0_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_32_4_0_psamp_mirror_on_drop_0_t_field_data, +}; + + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 6); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 6, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_smod_state_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 22, 2); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_smod_state_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 22, 2, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_psamp_mirror_on_drop_3_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get, + bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get, + bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get, + bcmpkt_psamp_mirror_on_drop_3_t_smod_state_get, + bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get, + bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get, + bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_psamp_mirror_on_drop_3_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set, + bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set, + bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set, + bcmpkt_psamp_mirror_on_drop_3_t_smod_state_set, + bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set, + bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set, + bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_psamp_mirror_on_drop_3_t_field_data[] = { + BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_psamp_mirror_on_drop_3_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_32_4_0_psamp_mirror_on_drop_3_t_field_data, +}; + + +static int32_t bcmpkt_rarp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_rarp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_rarp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_operation_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_rarp_t_operation_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_rarp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_rarp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_rarp_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RARP_T_FID_COUNT] = { + bcmpkt_rarp_t_hardware_len_get, + bcmpkt_rarp_t_hardware_type_get, + bcmpkt_rarp_t_operation_get, + bcmpkt_rarp_t_prot_addr_len_get, + bcmpkt_rarp_t_protocol_type_get, + bcmpkt_rarp_t_sender_ha_get, + bcmpkt_rarp_t_sender_ip_get, + bcmpkt_rarp_t_target_ha_get, + bcmpkt_rarp_t_target_ip_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_rarp_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RARP_T_FID_COUNT] = { + bcmpkt_rarp_t_hardware_len_set, + bcmpkt_rarp_t_hardware_type_set, + bcmpkt_rarp_t_operation_set, + bcmpkt_rarp_t_prot_addr_len_set, + bcmpkt_rarp_t_protocol_type_set, + bcmpkt_rarp_t_sender_ha_set, + bcmpkt_rarp_t_sender_ip_set, + bcmpkt_rarp_t_target_ha_set, + bcmpkt_rarp_t_target_ip_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_rarp_t_field_data[] = { + BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_rarp_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RARP_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_32_4_0_rarp_t_field_data, +}; + + +static int32_t bcmpkt_routing_t_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_routing_t_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_routing_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_routing_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_routing_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_routing_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_routing_t_routing_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_routing_t_routing_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_routing_t_segments_left_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_routing_t_segments_left_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_routing_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ROUTING_T_FID_COUNT] = { + bcmpkt_routing_t_data_get, + bcmpkt_routing_t_hdr_ext_len_get, + bcmpkt_routing_t_next_header_get, + bcmpkt_routing_t_routing_type_get, + bcmpkt_routing_t_segments_left_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_routing_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ROUTING_T_FID_COUNT] = { + bcmpkt_routing_t_data_set, + bcmpkt_routing_t_hdr_ext_len_set, + bcmpkt_routing_t_next_header_set, + bcmpkt_routing_t_routing_type_set, + bcmpkt_routing_t_segments_left_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_routing_t_field_data[] = { + BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_routing_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_ROUTING_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_32_4_0_routing_t_field_data, +}; + + +static int32_t bcmpkt_rspan_t_tag_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_rspan_t_tag_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_rspan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_rspan_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_rspan_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RSPAN_T_FID_COUNT] = { + bcmpkt_rspan_t_tag_get, + bcmpkt_rspan_t_tpid_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_rspan_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RSPAN_T_FID_COUNT] = { + bcmpkt_rspan_t_tag_set, + bcmpkt_rspan_t_tpid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_rspan_t_field_data[] = { + BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_rspan_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_RSPAN_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_32_4_0_rspan_t_field_data, +}; + + +static int32_t bcmpkt_sflow_shim_0_t_sys_destination_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_sys_destination_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_sys_source_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_sys_source_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_sflow_shim_0_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_sflow_shim_0_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { + bcmpkt_sflow_shim_0_t_sys_destination_get, + bcmpkt_sflow_shim_0_t_sys_source_get, + bcmpkt_sflow_shim_0_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_sflow_shim_0_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { + bcmpkt_sflow_shim_0_t_sys_destination_set, + bcmpkt_sflow_shim_0_t_sys_source_set, + bcmpkt_sflow_shim_0_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_sflow_shim_0_t_field_data[] = { + BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_sflow_shim_0_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_32_4_0_sflow_shim_0_t_field_data, +}; + + +static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 30, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 30, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 27, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 27, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 29, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 29, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 31, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 31, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 26, 1); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 26, 1, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 7); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_reserved_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 7, val); + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 23, 3); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 23, 3, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_sflow_shim_1_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { + bcmpkt_sflow_shim_1_t_flag_dest_sample_get, + bcmpkt_sflow_shim_1_t_flag_discarded_get, + bcmpkt_sflow_shim_1_t_flag_flex_sample_get, + bcmpkt_sflow_shim_1_t_flag_mcast_get, + bcmpkt_sflow_shim_1_t_flag_src_sample_get, + bcmpkt_sflow_shim_1_t_flag_truncated_get, + bcmpkt_sflow_shim_1_t_reserved_get, + bcmpkt_sflow_shim_1_t_sys_opcode_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_sflow_shim_1_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { + bcmpkt_sflow_shim_1_t_flag_dest_sample_set, + bcmpkt_sflow_shim_1_t_flag_discarded_set, + bcmpkt_sflow_shim_1_t_flag_flex_sample_set, + bcmpkt_sflow_shim_1_t_flag_mcast_set, + bcmpkt_sflow_shim_1_t_flag_src_sample_set, + bcmpkt_sflow_shim_1_t_flag_truncated_set, + bcmpkt_sflow_shim_1_t_reserved_set, + bcmpkt_sflow_shim_1_t_sys_opcode_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_sflow_shim_1_t_field_data[] = { + BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_sflow_shim_1_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_32_4_0_sflow_shim_1_t_field_data, +}; + + +static int32_t bcmpkt_sflow_shim_2_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_sflow_shim_2_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_sflow_shim_2_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { + bcmpkt_sflow_shim_2_t_sequence_num_get, + bcmpkt_sflow_shim_2_t_user_meta_data_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_sflow_shim_2_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { + bcmpkt_sflow_shim_2_t_sequence_num_set, + bcmpkt_sflow_shim_2_t_user_meta_data_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_sflow_shim_2_t_field_data[] = { + BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_sflow_shim_2_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_32_4_0_sflow_shim_2_t_field_data, +}; + + +static int32_t bcmpkt_snap_llc_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_snap_llc_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_snap_llc_t_snap_llc_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_snap_llc_t_snap_llc_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_snap_llc_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = { + bcmpkt_snap_llc_t_length_get, + bcmpkt_snap_llc_t_snap_llc_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_snap_llc_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = { + bcmpkt_snap_llc_t_length_set, + bcmpkt_snap_llc_t_snap_llc_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_snap_llc_t_field_data[] = { + BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_snap_llc_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SNAP_LLC_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_32_4_0_snap_llc_t_field_data, +}; + + +static int32_t bcmpkt_svtag_t_data_lwr_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_svtag_t_data_lwr_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_svtag_t_data_upr_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_svtag_t_data_upr_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_svtag_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SVTAG_T_FID_COUNT] = { + bcmpkt_svtag_t_data_lwr_get, + bcmpkt_svtag_t_data_upr_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_svtag_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SVTAG_T_FID_COUNT] = { + bcmpkt_svtag_t_data_lwr_set, + bcmpkt_svtag_t_data_upr_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_svtag_t_field_data[] = { + BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SVTAG_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_svtag_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_SVTAG_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_32_4_0_svtag_t_field_data, +}; + + +static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_first_4bytes_t_src_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_first_4bytes_t_src_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_tcp_first_4bytes_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { + bcmpkt_tcp_first_4bytes_t_dst_port_get, + bcmpkt_tcp_first_4bytes_t_src_port_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_tcp_first_4bytes_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { + bcmpkt_tcp_first_4bytes_t_dst_port_set, + bcmpkt_tcp_first_4bytes_t_src_port_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_tcp_first_4bytes_t_field_data[] = { + BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_tcp_first_4bytes_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_32_4_0_tcp_first_4bytes_t_field_data, +}; + + +static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_win_size_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_win_size_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_tcp_last_16bytes_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { + bcmpkt_tcp_last_16bytes_t_ack_num_get, + bcmpkt_tcp_last_16bytes_t_checksum_get, + bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get, + bcmpkt_tcp_last_16bytes_t_seq_num_get, + bcmpkt_tcp_last_16bytes_t_urgent_ptr_get, + bcmpkt_tcp_last_16bytes_t_win_size_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_tcp_last_16bytes_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { + bcmpkt_tcp_last_16bytes_t_ack_num_set, + bcmpkt_tcp_last_16bytes_t_checksum_set, + bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set, + bcmpkt_tcp_last_16bytes_t_seq_num_set, + bcmpkt_tcp_last_16bytes_t_urgent_ptr_set, + bcmpkt_tcp_last_16bytes_t_win_size_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_tcp_last_16bytes_t_field_data[] = { + BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_tcp_last_16bytes_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_32_4_0_tcp_last_16bytes_t_field_data, +}; + + +static int32_t bcmpkt_udp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_udp_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_dst_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_udp_t_src_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_src_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_udp_t_udp_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_udp_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_udp_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UDP_T_FID_COUNT] = { + bcmpkt_udp_t_checksum_get, + bcmpkt_udp_t_dst_port_get, + bcmpkt_udp_t_src_port_get, + bcmpkt_udp_t_udp_length_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_udp_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UDP_T_FID_COUNT] = { + bcmpkt_udp_t_checksum_set, + bcmpkt_udp_t_dst_port_set, + bcmpkt_udp_t_src_port_set, + bcmpkt_udp_t_udp_length_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_udp_t_field_data[] = { + BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_udp_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UDP_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_32_4_0_udp_t_field_data, +}; + + +static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_unknown_l3_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { + bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get, + bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_unknown_l3_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { + bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set, + bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_unknown_l3_t_field_data[] = { + BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_unknown_l3_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_32_4_0_unknown_l3_t_field_data, +}; + + +static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_unknown_l4_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { + bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_unknown_l4_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { + bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_unknown_l4_t_field_data[] = { + BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_unknown_l4_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_32_4_0_unknown_l4_t_field_data, +}; + + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_8_9_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_8_9_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_unknown_l5_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { + bcmpkt_unknown_l5_t_l5_bytes_0_1_get, + bcmpkt_unknown_l5_t_l5_bytes_2_3_get, + bcmpkt_unknown_l5_t_l5_bytes_4_7_get, + bcmpkt_unknown_l5_t_l5_bytes_8_9_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_unknown_l5_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { + bcmpkt_unknown_l5_t_l5_bytes_0_1_set, + bcmpkt_unknown_l5_t_l5_bytes_2_3_set, + bcmpkt_unknown_l5_t_l5_bytes_4_7_set, + bcmpkt_unknown_l5_t_l5_bytes_8_9_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_unknown_l5_t_field_data[] = { + BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_unknown_l5_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_32_4_0_unknown_l5_t_field_data, +}; + + +static int32_t bcmpkt_vlan_t_cfi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 1); + + return ret; +} + +static int32_t bcmpkt_vlan_t_cfi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 1, val); + return ret; +} + +static int32_t bcmpkt_vlan_t_pcp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 13, 3); + + return ret; +} + +static int32_t bcmpkt_vlan_t_pcp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 13, 3, val); + return ret; +} + +static int32_t bcmpkt_vlan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_vlan_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_vlan_t_vid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 12); + + return ret; +} + +static int32_t bcmpkt_vlan_t_vid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 12, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_vlan_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_VLAN_T_FID_COUNT] = { + bcmpkt_vlan_t_cfi_get, + bcmpkt_vlan_t_pcp_get, + bcmpkt_vlan_t_tpid_get, + bcmpkt_vlan_t_vid_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_vlan_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_VLAN_T_FID_COUNT] = { + bcmpkt_vlan_t_cfi_set, + bcmpkt_vlan_t_pcp_set, + bcmpkt_vlan_t_tpid_set, + bcmpkt_vlan_t_vid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_vlan_t_field_data[] = { + BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_vlan_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_VLAN_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_32_4_0_vlan_t_field_data, +}; + + +static int32_t bcmpkt_vxlan_t_flags_reserved_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_vxlan_t_flags_reserved_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_vxlan_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 8); + + return ret; +} + +static int32_t bcmpkt_vxlan_t_reserved2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_vxlan_t_vn_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 8, 24); + + return ret; +} + +static int32_t bcmpkt_vxlan_t_vn_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 8, 24, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_vxlan_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_VXLAN_T_FID_COUNT] = { + bcmpkt_vxlan_t_flags_reserved_1_get, + bcmpkt_vxlan_t_reserved2_get, + bcmpkt_vxlan_t_vn_id_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_vxlan_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_VXLAN_T_FID_COUNT] = { + bcmpkt_vxlan_t_flags_reserved_1_set, + bcmpkt_vxlan_t_reserved2_set, + bcmpkt_vxlan_t_vn_id_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_vxlan_t_field_data[] = { + BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_vxlan_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_VXLAN_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_32_4_0_vxlan_t_field_data, +}; + + +static int32_t bcmpkt_wesp_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 8); + + return ret; +} + +static int32_t bcmpkt_wesp_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_wesp_t_header_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_wesp_t_header_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_wesp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_wesp_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_wesp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_spi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_spi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_trailer_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 8); + + return ret; +} + +static int32_t bcmpkt_wesp_t_trailer_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_wesp_t_wesp_iv_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_wesp_t_wesp_iv_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_32_4_0_wesp_t_fget[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_WESP_T_FID_COUNT] = { + bcmpkt_wesp_t_flags_get, + bcmpkt_wesp_t_header_len_get, + bcmpkt_wesp_t_next_header_get, + bcmpkt_wesp_t_seq_num_get, + bcmpkt_wesp_t_spi_get, + bcmpkt_wesp_t_trailer_len_get, + bcmpkt_wesp_t_wesp_iv_get, +}; + +bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_32_4_0_wesp_t_fset[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_WESP_T_FID_COUNT] = { + bcmpkt_wesp_t_flags_set, + bcmpkt_wesp_t_header_len_set, + bcmpkt_wesp_t_next_header_set, + bcmpkt_wesp_t_seq_num_set, + bcmpkt_wesp_t_spi_set, + bcmpkt_wesp_t_trailer_len_set, + bcmpkt_wesp_t_wesp_iv_set, +}; + +static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_32_4_0_wesp_t_field_data[] = { + BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_32_4_0_wesp_t_field_info = { + .num_fields = BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_WESP_T_FID_COUNT, + .info = bcm56890_a0_dna_6_5_32_4_0_wesp_t_field_data, +}; + +static bcmpkt_flex_pmd_info_t bcm56890_a0_dna_6_5_32_4_0_flexhdr_info_list[BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_FLEXHDR_COUNT] = { + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_32_4_0_arp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_32_4_0_arp_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_32_4_0_arp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_32_4_0_authen_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_32_4_0_authen_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_32_4_0_authen_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_32_4_0_bfd_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_32_4_0_bfd_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_32_4_0_bfd_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_32_4_0_cntag_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_32_4_0_cntag_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_32_4_0_cntag_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_32_4_0_cpu_composites_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_32_4_0_cpu_composites_0_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_32_4_0_cpu_composites_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_32_4_0_cpu_composites_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_32_4_0_cpu_composites_1_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_32_4_0_cpu_composites_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_32_4_0_dest_option_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_32_4_0_dest_option_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_32_4_0_dest_option_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_32_4_0_ep_nih_header_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_32_4_0_ep_nih_header_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_32_4_0_ep_nih_header_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_32_4_0_erspan3_fixed_hdr_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_32_4_0_erspan3_fixed_hdr_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_32_4_0_erspan3_fixed_hdr_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_32_4_0_erspan3_subhdr_5_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_32_4_0_erspan3_subhdr_5_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_32_4_0_erspan3_subhdr_5_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_32_4_0_esp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_32_4_0_esp_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_32_4_0_esp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_32_4_0_ethertype_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_32_4_0_ethertype_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_32_4_0_ethertype_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_32_4_0_frag_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_32_4_0_frag_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_32_4_0_frag_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_32_4_0_gbp_ethernet_shim_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_32_4_0_gbp_ethernet_shim_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_32_4_0_gbp_ethernet_shim_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_32_4_0_generic_loopback_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_32_4_0_generic_loopback_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_32_4_0_generic_loopback_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_32_4_0_gpe_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_32_4_0_gpe_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_32_4_0_gpe_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_32_4_0_gre_chksum_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_32_4_0_gre_chksum_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_32_4_0_gre_chksum_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_32_4_0_gre_key_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_32_4_0_gre_key_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_32_4_0_gre_key_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_32_4_0_gre_rout_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_32_4_0_gre_rout_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_32_4_0_gre_rout_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_32_4_0_gre_seq_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_32_4_0_gre_seq_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_32_4_0_gre_seq_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_32_4_0_gre_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_32_4_0_gre_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_32_4_0_gre_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_32_4_0_hg3_base_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_32_4_0_hg3_base_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_32_4_0_hg3_base_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_32_4_0_hg3_extension_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_32_4_0_hg3_extension_0_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_32_4_0_hg3_extension_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_32_4_0_hop_by_hop_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_32_4_0_hop_by_hop_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_32_4_0_hop_by_hop_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_32_4_0_icmp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_32_4_0_icmp_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_32_4_0_icmp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_32_4_0_ifa_header_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_32_4_0_ifa_header_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_32_4_0_ifa_header_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_32_4_0_ifa_metadata_a_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_32_4_0_ifa_metadata_a_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_32_4_0_ifa_metadata_a_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_32_4_0_ifa_metadata_b_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_32_4_0_ifa_metadata_b_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_32_4_0_ifa_metadata_b_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_32_4_0_ifa_metadata_base_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_32_4_0_ifa_metadata_base_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_32_4_0_ifa_metadata_base_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_32_4_0_igmp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_32_4_0_igmp_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_32_4_0_igmp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_32_4_0_ioam_e2e_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_32_4_0_ioam_e2e_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_32_4_0_ioam_e2e_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_32_4_0_ipfix_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_32_4_0_ipfix_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_32_4_0_ipfix_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_32_4_0_ipv4_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_32_4_0_ipv4_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_32_4_0_ipv4_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_32_4_0_ipv6_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_32_4_0_ipv6_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_32_4_0_ipv6_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_32_4_0_l2_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_32_4_0_l2_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_32_4_0_l2_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_32_4_0_mirror_erspan_sn_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_32_4_0_mirror_erspan_sn_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_32_4_0_mirror_erspan_sn_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_32_4_0_mirror_transport_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_32_4_0_mirror_transport_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_32_4_0_mirror_transport_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_32_4_0_mpls_ach_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_32_4_0_mpls_ach_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_32_4_0_mpls_ach_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_32_4_0_mpls_bv_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_32_4_0_mpls_bv_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_32_4_0_mpls_bv_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_32_4_0_mpls_cw_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_32_4_0_mpls_cw_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_32_4_0_mpls_cw_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_32_4_0_mpls_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_32_4_0_mpls_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_32_4_0_mpls_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_32_4_0_p_1588_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_32_4_0_p_1588_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_32_4_0_p_1588_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_32_4_0_pim_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_32_4_0_pim_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_32_4_0_pim_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_32_4_0_prog_ext_hdr_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_32_4_0_prog_ext_hdr_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_32_4_0_prog_ext_hdr_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_32_4_0_psamp_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_32_4_0_psamp_0_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_32_4_0_psamp_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_32_4_0_psamp_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_32_4_0_psamp_1_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_32_4_0_psamp_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_32_4_0_psamp_mirror_on_drop_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_32_4_0_psamp_mirror_on_drop_0_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_32_4_0_psamp_mirror_on_drop_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_32_4_0_psamp_mirror_on_drop_3_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_32_4_0_psamp_mirror_on_drop_3_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_32_4_0_psamp_mirror_on_drop_3_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_32_4_0_rarp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_32_4_0_rarp_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_32_4_0_rarp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_32_4_0_routing_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_32_4_0_routing_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_32_4_0_routing_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_32_4_0_rspan_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_32_4_0_rspan_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_32_4_0_rspan_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_32_4_0_sflow_shim_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_32_4_0_sflow_shim_0_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_32_4_0_sflow_shim_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_32_4_0_sflow_shim_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_32_4_0_sflow_shim_1_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_32_4_0_sflow_shim_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_32_4_0_sflow_shim_2_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_32_4_0_sflow_shim_2_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_32_4_0_sflow_shim_2_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_32_4_0_snap_llc_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_32_4_0_snap_llc_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_32_4_0_snap_llc_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_32_4_0_svtag_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_32_4_0_svtag_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_32_4_0_svtag_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_32_4_0_tcp_first_4bytes_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_32_4_0_tcp_first_4bytes_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_32_4_0_tcp_first_4bytes_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_32_4_0_tcp_last_16bytes_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_32_4_0_tcp_last_16bytes_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_32_4_0_tcp_last_16bytes_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_32_4_0_udp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_32_4_0_udp_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_32_4_0_udp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_32_4_0_unknown_l3_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_32_4_0_unknown_l3_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_32_4_0_unknown_l3_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_32_4_0_unknown_l4_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_32_4_0_unknown_l4_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_32_4_0_unknown_l4_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_32_4_0_unknown_l5_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_32_4_0_unknown_l5_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_32_4_0_unknown_l5_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_32_4_0_vlan_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_32_4_0_vlan_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_32_4_0_vlan_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_32_4_0_vxlan_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_32_4_0_vxlan_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_32_4_0_vxlan_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_32_4_0_wesp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm56890_a0_dna_6_5_32_4_0_wesp_t_fget, + .flex_fset = bcm56890_a0_dna_6_5_32_4_0_wesp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm56890_a0_dna_6_5_32_4_0_rxpmd_flex_field_info, + .reasons_info = &bcm56890_a0_dna_6_5_32_4_0_rxpmd_flex_reasons_info, + .flex_common_fget = bcm56890_a0_rxpmd_flex_fget, + .flex_common_fset = bcm56890_a0_rxpmd_flex_fset, + }, +}; + +static shr_enum_map_t bcm56890_a0_dna_6_5_32_4_0_flexhdr_id_map[] = { + BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_FLEXHDR_NAME_MAP_INIT +}; + +shr_enum_map_t * bcm56890_a0_dna_6_5_32_4_0_flexhdr_map_get(void) +{ + return bcm56890_a0_dna_6_5_32_4_0_flexhdr_id_map; +} + +bcmpkt_flex_pmd_info_t * bcm56890_a0_dna_6_5_32_4_0_flex_pmd_info_get(uint32_t hid) +{ + if (hid >= BCM56890_A0_DNA_6_5_32_4_0_BCMPKT_FLEXHDR_COUNT) { + return NULL; + } + + return &bcm56890_a0_dna_6_5_32_4_0_flexhdr_info_list[hid]; +} + +int bcm56890_a0_dna_6_5_32_4_0_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = { + 14, + 21, + 22, + 65, +}; diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/xfcr/bcm78800_a0/cna_6_5_32_3_0/bcm78800_a0_cna_6_5_32_3_0_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/xfcr/bcm78800_a0/cna_6_5_32_3_0/bcm78800_a0_cna_6_5_32_3_0_bcmpkt_rxpmd_match_id.c new file mode 100644 index 00000000000..ba8dc9e45d5 --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/xfcr/bcm78800_a0/cna_6_5_32_3_0/bcm78800_a0_cna_6_5_32_3_0_bcmpkt_rxpmd_match_id.c @@ -0,0 +1,1443 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) bcm78800_a0_cna_6_5_32_3_0_sf_match_id_info.yml + * for device bcm78800_a0 and variant cna_6_5_32_3_0. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + + +#include +#include + +static uint32_t bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_itag[1] = +{ + 0x14, +}; + +static uint32_t bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_l2[1] = +{ + 0x1e, +}; + +static uint32_t bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_otag[1] = +{ + 0x18, +}; + +static uint32_t bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_arp[1] = +{ + 0x4, +}; + +static uint32_t bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ethertype[1] = +{ + 0x7fffe, +}; + +static uint32_t bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_icmp[1] = +{ + 0x810, +}; + +static uint32_t bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv4[1] = +{ + 0x3f8, +}; + +static uint32_t bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv6[1] = +{ + 0x1fc00, +}; + +static uint32_t bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rarp[1] = +{ + 0x20000, +}; + +static uint32_t bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_first_4bytes[1] = +{ + 0x3060, +}; + +static uint32_t bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_last_16bytes[1] = +{ + 0x2040, +}; + +static uint32_t bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_udp[1] = +{ + 0xc180, +}; + +static uint32_t bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l3[1] = +{ + 0x40000, +}; + +static uint32_t bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l4[1] = +{ + 0x10200, +}; + +static uint32_t bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l5[1] = +{ + 0x8100, +}; + +static uint32_t bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_itag[1] = +{ + 0x28, +}; + +static uint32_t bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_l2[1] = +{ + 0x3e, +}; + +static uint32_t bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_otag[1] = +{ + 0x30, +}; + +static uint32_t bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_arp[1] = +{ + 0x4, +}; + +static uint32_t bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ethertype[1] = +{ + 0x1ffffe, +}; + +static uint32_t bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_icmp[1] = +{ + 0x1010, +}; + +static uint32_t bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv4[1] = +{ + 0x7f8, +}; + +static uint32_t bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv6[1] = +{ + 0x7f800, +}; + +static uint32_t bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rarp[1] = +{ + 0x80000, +}; + +static uint32_t bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_first_4bytes[1] = +{ + 0x6060, +}; + +static uint32_t bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_last_16bytes[1] = +{ + 0x4040, +}; + +static uint32_t bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_udp[1] = +{ + 0x38380, +}; + +static uint32_t bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l3[1] = +{ + 0x100000, +}; + +static uint32_t bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l4[1] = +{ + 0x40400, +}; + +static uint32_t bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l5[1] = +{ + 0x10100, +}; + +static uint32_t bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_vxlan[1] = +{ + 0x20200, +}; + +static uint32_t bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_sys_hdr_ep_nih[1] = +{ + 0x4, +}; + +static uint32_t bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_sys_hdr_loopback[1] = +{ + 0x8, +}; + + +static bcmpkt_rxpmd_match_id_db_t +bcm78800_a0_cna_6_5_32_3_0_rxpmd_match_id_db[BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_COUNT] = { + { + /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_ITAG", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 14, + .match_minbit = 12, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 14, + .pminbit = 12, + + }, + { + /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */ + .name = "EGRESS_PKT_FWD_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 14, + .match_minbit = 12, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 14, + .pminbit = 12, + + }, + { + /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */ + .name = "EGRESS_PKT_FWD_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0x7, + .match_maxbit = 14, + .match_minbit = 12, + .maxbit = 2, + .minbit = 0, + .value = 0x0, + .pmaxbit = 14, + .pminbit = 12, + + }, + { + /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */ + .name = "EGRESS_PKT_FWD_L2_HDR_OTAG", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 14, + .match_minbit = 12, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 14, + .pminbit = 12, + + }, + { + /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ARP", + .match = 0x20, + .match_mask = 0x66, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 21, + .pminbit = 15, + + }, + { + /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 21, + .pminbit = 15, + + }, + { + /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_ICMP", + .match = 0x40, + .match_mask = 0x66, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 6, + .minbit = 5, + .value = 0x2, + .pmaxbit = 21, + .pminbit = 15, + + }, + { + /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV4", + .match = 0x8, + .match_mask = 0x18, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 4, + .minbit = 3, + .value = 0x1, + .pmaxbit = 21, + .pminbit = 15, + + }, + { + /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV6", + .match = 0x10, + .match_mask = 0x18, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 4, + .minbit = 3, + .value = 0x2, + .pmaxbit = 21, + .pminbit = 15, + + }, + { + /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x7f, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 6, + .minbit = 0, + .value = 0x0, + .pmaxbit = 21, + .pminbit = 15, + + }, + { + /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_RARP", + .match = 0x2, + .match_mask = 0x6, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 2, + .minbit = 1, + .value = 0x1, + .pmaxbit = 21, + .pminbit = 15, + + }, + { + /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x4, + .match_mask = 0x6, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 2, + .minbit = 1, + .value = 0x2, + .pmaxbit = 21, + .pminbit = 15, + + }, + { + /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x24, + .match_mask = 0x66, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 21, + .pminbit = 15, + + }, + { + /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UDP", + .match = 0x6, + .match_mask = 0x6, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 2, + .minbit = 1, + .value = 0x3, + .pmaxbit = 21, + .pminbit = 15, + + }, + { + /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", + .match = 0x18, + .match_mask = 0x18, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 4, + .minbit = 3, + .value = 0x3, + .pmaxbit = 21, + .pminbit = 15, + + }, + { + /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", + .match = 0x60, + .match_mask = 0x60, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 6, + .minbit = 5, + .value = 0x3, + .pmaxbit = 21, + .pminbit = 15, + + }, + { + /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", + .match = 0x46, + .match_mask = 0x66, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 6, + .minbit = 5, + .value = 0x2, + .pmaxbit = 21, + .pminbit = 15, + + }, + { + /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */ + .name = "EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", + .match = 0x26, + .match_mask = 0x66, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 21, + .pminbit = 15, + + }, + { + /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH */ + .name = "EGRESS_PKT_SYS_HDR_EP_NIH", + .match = 0x2, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x2, + .pmaxbit = 1, + .pminbit = 0, + + }, + { + /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */ + .name = "EGRESS_PKT_SYS_HDR_LOOPBACK", + .match = 0x1, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x1, + .pmaxbit = 1, + .pminbit = 0, + + }, + { + /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */ + .name = "EGRESS_PKT_SYS_HDR_NONE", + .match = 0x0, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x0, + .pmaxbit = 1, + .pminbit = 0, + + }, + { + /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_ITAG", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 4, + .match_minbit = 2, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 4, + .pminbit = 2, + + }, + { + /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 4, + .match_minbit = 2, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 4, + .pminbit = 2, + + }, + { + /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0x7, + .match_maxbit = 4, + .match_minbit = 2, + .maxbit = 2, + .minbit = 0, + .value = 0x0, + .pmaxbit = 4, + .pminbit = 2, + + }, + { + /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */ + .name = "EGRESS_PKT_TUNNEL_L2_HDR_OTAG", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 4, + .match_minbit = 2, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 4, + .pminbit = 2, + + }, + { + /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", + .match = 0x20, + .match_mask = 0x66, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 11, + .pminbit = 5, + + }, + { + /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 11, + .pminbit = 5, + + }, + { + /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", + .match = 0x40, + .match_mask = 0x66, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 6, + .minbit = 5, + .value = 0x2, + .pmaxbit = 11, + .pminbit = 5, + + }, + { + /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", + .match = 0x8, + .match_mask = 0x18, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 4, + .minbit = 3, + .value = 0x1, + .pmaxbit = 11, + .pminbit = 5, + + }, + { + /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", + .match = 0x10, + .match_mask = 0x18, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 4, + .minbit = 3, + .value = 0x2, + .pmaxbit = 11, + .pminbit = 5, + + }, + { + /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x7f, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 6, + .minbit = 0, + .value = 0x0, + .pmaxbit = 11, + .pminbit = 5, + + }, + { + /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", + .match = 0x2, + .match_mask = 0x6, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 2, + .minbit = 1, + .value = 0x1, + .pmaxbit = 11, + .pminbit = 5, + + }, + { + /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x4, + .match_mask = 0x6, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 2, + .minbit = 1, + .value = 0x2, + .pmaxbit = 11, + .pminbit = 5, + + }, + { + /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x24, + .match_mask = 0x66, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 11, + .pminbit = 5, + + }, + { + /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", + .match = 0x6, + .match_mask = 0x6, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 2, + .minbit = 1, + .value = 0x3, + .pmaxbit = 11, + .pminbit = 5, + + }, + { + /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", + .match = 0x18, + .match_mask = 0x18, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 4, + .minbit = 3, + .value = 0x3, + .pmaxbit = 11, + .pminbit = 5, + + }, + { + /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", + .match = 0x60, + .match_mask = 0x60, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 6, + .minbit = 5, + .value = 0x3, + .pmaxbit = 11, + .pminbit = 5, + + }, + { + /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", + .match = 0x46, + .match_mask = 0x66, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 6, + .minbit = 5, + .value = 0x2, + .pmaxbit = 11, + .pminbit = 5, + + }, + { + /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */ + .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", + .match = 0x26, + .match_mask = 0x66, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 11, + .pminbit = 5, + + }, + { + /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_ITAG", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 14, + .match_minbit = 12, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 14, + .pminbit = 12, + .zone_minbit = 10, + .arc_id_mask = 0x1c00, + .num_zone_bmp_words = 1, + .zone_bmp = bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_itag, + + }, + { + /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */ + .name = "INGRESS_PKT_INNER_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 14, + .match_minbit = 12, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 14, + .pminbit = 12, + .zone_minbit = 10, + .arc_id_mask = 0x1c00, + .num_zone_bmp_words = 1, + .zone_bmp = bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_l2, + + }, + { + /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */ + .name = "INGRESS_PKT_INNER_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0x7, + .match_maxbit = 14, + .match_minbit = 12, + .maxbit = 2, + .minbit = 0, + .value = 0x0, + .pmaxbit = 14, + .pminbit = 12, + .zone_minbit = 10, + .arc_id_mask = 0x1c00, + + }, + { + /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */ + .name = "INGRESS_PKT_INNER_L2_HDR_OTAG", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 14, + .match_minbit = 12, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 14, + .pminbit = 12, + .zone_minbit = 10, + .arc_id_mask = 0x1c00, + .num_zone_bmp_words = 1, + .zone_bmp = bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_otag, + + }, + { + /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ARP", + .match = 0x20, + .match_mask = 0x66, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 21, + .pminbit = 15, + .zone_minbit = 13, + .arc_id_mask = 0x3e000, + .num_zone_bmp_words = 1, + .zone_bmp = bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_arp, + + }, + { + /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 21, + .pminbit = 15, + .zone_minbit = 13, + .arc_id_mask = 0x3e000, + .num_zone_bmp_words = 1, + .zone_bmp = bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ethertype, + + }, + { + /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_ICMP", + .match = 0x40, + .match_mask = 0x66, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 6, + .minbit = 5, + .value = 0x2, + .pmaxbit = 21, + .pminbit = 15, + .zone_minbit = 13, + .arc_id_mask = 0x3e000, + .num_zone_bmp_words = 1, + .zone_bmp = bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_icmp, + + }, + { + /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV4", + .match = 0x8, + .match_mask = 0x18, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 4, + .minbit = 3, + .value = 0x1, + .pmaxbit = 21, + .pminbit = 15, + .zone_minbit = 13, + .arc_id_mask = 0x3e000, + .num_zone_bmp_words = 1, + .zone_bmp = bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv4, + + }, + { + /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV6", + .match = 0x10, + .match_mask = 0x18, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 4, + .minbit = 3, + .value = 0x2, + .pmaxbit = 21, + .pminbit = 15, + .zone_minbit = 13, + .arc_id_mask = 0x3e000, + .num_zone_bmp_words = 1, + .zone_bmp = bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv6, + + }, + { + /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x7f, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 6, + .minbit = 0, + .value = 0x0, + .pmaxbit = 21, + .pminbit = 15, + .zone_minbit = 13, + .arc_id_mask = 0x3e000, + + }, + { + /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_RARP", + .match = 0x2, + .match_mask = 0x6, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 2, + .minbit = 1, + .value = 0x1, + .pmaxbit = 21, + .pminbit = 15, + .zone_minbit = 13, + .arc_id_mask = 0x3e000, + .num_zone_bmp_words = 1, + .zone_bmp = bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rarp, + + }, + { + /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x4, + .match_mask = 0x6, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 2, + .minbit = 1, + .value = 0x2, + .pmaxbit = 21, + .pminbit = 15, + .zone_minbit = 13, + .arc_id_mask = 0x3e000, + .num_zone_bmp_words = 1, + .zone_bmp = bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_first_4bytes, + + }, + { + /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x24, + .match_mask = 0x66, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 21, + .pminbit = 15, + .zone_minbit = 13, + .arc_id_mask = 0x3e000, + .num_zone_bmp_words = 1, + .zone_bmp = bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_last_16bytes, + + }, + { + /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UDP", + .match = 0x6, + .match_mask = 0x6, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 2, + .minbit = 1, + .value = 0x3, + .pmaxbit = 21, + .pminbit = 15, + .zone_minbit = 13, + .arc_id_mask = 0x3e000, + .num_zone_bmp_words = 1, + .zone_bmp = bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_udp, + + }, + { + /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", + .match = 0x18, + .match_mask = 0x18, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 4, + .minbit = 3, + .value = 0x3, + .pmaxbit = 21, + .pminbit = 15, + .zone_minbit = 13, + .arc_id_mask = 0x3e000, + .num_zone_bmp_words = 1, + .zone_bmp = bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l3, + + }, + { + /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", + .match = 0x60, + .match_mask = 0x60, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 6, + .minbit = 5, + .value = 0x3, + .pmaxbit = 21, + .pminbit = 15, + .zone_minbit = 13, + .arc_id_mask = 0x3e000, + .num_zone_bmp_words = 1, + .zone_bmp = bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l4, + + }, + { + /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */ + .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", + .match = 0x46, + .match_mask = 0x66, + .match_maxbit = 21, + .match_minbit = 15, + .maxbit = 6, + .minbit = 5, + .value = 0x2, + .pmaxbit = 21, + .pminbit = 15, + .zone_minbit = 13, + .arc_id_mask = 0x3e000, + .num_zone_bmp_words = 1, + .zone_bmp = bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l5, + + }, + { + /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_ITAG", + .match = 0x2, + .match_mask = 0x2, + .match_maxbit = 4, + .match_minbit = 2, + .maxbit = 1, + .minbit = 1, + .value = 0x1, + .pmaxbit = 4, + .pminbit = 2, + .zone_minbit = 2, + .arc_id_mask = 0x1c, + .num_zone_bmp_words = 1, + .zone_bmp = bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_itag, + + }, + { + /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */ + .name = "INGRESS_PKT_OUTER_L2_HDR_L2", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 4, + .match_minbit = 2, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 4, + .pminbit = 2, + .zone_minbit = 2, + .arc_id_mask = 0x1c, + .num_zone_bmp_words = 1, + .zone_bmp = bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_l2, + + }, + { + /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */ + .name = "INGRESS_PKT_OUTER_L2_HDR_NONE", + .match = 0x0, + .match_mask = 0x7, + .match_maxbit = 4, + .match_minbit = 2, + .maxbit = 2, + .minbit = 0, + .value = 0x0, + .pmaxbit = 4, + .pminbit = 2, + .zone_minbit = 2, + .arc_id_mask = 0x1c, + + }, + { + /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */ + .name = "INGRESS_PKT_OUTER_L2_HDR_OTAG", + .match = 0x4, + .match_mask = 0x4, + .match_maxbit = 4, + .match_minbit = 2, + .maxbit = 2, + .minbit = 2, + .value = 0x1, + .pmaxbit = 4, + .pminbit = 2, + .zone_minbit = 2, + .arc_id_mask = 0x1c, + .num_zone_bmp_words = 1, + .zone_bmp = bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_otag, + + }, + { + /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ARP", + .match = 0x20, + .match_mask = 0x66, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 11, + .pminbit = 5, + .zone_minbit = 5, + .arc_id_mask = 0x3e0, + .num_zone_bmp_words = 1, + .zone_bmp = bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_arp, + + }, + { + /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", + .match = 0x1, + .match_mask = 0x1, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 0, + .minbit = 0, + .value = 0x1, + .pmaxbit = 11, + .pminbit = 5, + .zone_minbit = 5, + .arc_id_mask = 0x3e0, + .num_zone_bmp_words = 1, + .zone_bmp = bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ethertype, + + }, + { + /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", + .match = 0x40, + .match_mask = 0x66, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 6, + .minbit = 5, + .value = 0x2, + .pmaxbit = 11, + .pminbit = 5, + .zone_minbit = 5, + .arc_id_mask = 0x3e0, + .num_zone_bmp_words = 1, + .zone_bmp = bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_icmp, + + }, + { + /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", + .match = 0x8, + .match_mask = 0x18, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 4, + .minbit = 3, + .value = 0x1, + .pmaxbit = 11, + .pminbit = 5, + .zone_minbit = 5, + .arc_id_mask = 0x3e0, + .num_zone_bmp_words = 1, + .zone_bmp = bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv4, + + }, + { + /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", + .match = 0x10, + .match_mask = 0x18, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 4, + .minbit = 3, + .value = 0x2, + .pmaxbit = 11, + .pminbit = 5, + .zone_minbit = 5, + .arc_id_mask = 0x3e0, + .num_zone_bmp_words = 1, + .zone_bmp = bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv6, + + }, + { + /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_NONE", + .match = 0x0, + .match_mask = 0x7f, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 6, + .minbit = 0, + .value = 0x0, + .pmaxbit = 11, + .pminbit = 5, + .zone_minbit = 5, + .arc_id_mask = 0x3e0, + + }, + { + /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_RARP", + .match = 0x2, + .match_mask = 0x6, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 2, + .minbit = 1, + .value = 0x1, + .pmaxbit = 11, + .pminbit = 5, + .zone_minbit = 5, + .arc_id_mask = 0x3e0, + .num_zone_bmp_words = 1, + .zone_bmp = bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rarp, + + }, + { + /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", + .match = 0x4, + .match_mask = 0x6, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 2, + .minbit = 1, + .value = 0x2, + .pmaxbit = 11, + .pminbit = 5, + .zone_minbit = 5, + .arc_id_mask = 0x3e0, + .num_zone_bmp_words = 1, + .zone_bmp = bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_first_4bytes, + + }, + { + /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", + .match = 0x24, + .match_mask = 0x66, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 11, + .pminbit = 5, + .zone_minbit = 5, + .arc_id_mask = 0x3e0, + .num_zone_bmp_words = 1, + .zone_bmp = bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_last_16bytes, + + }, + { + /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UDP", + .match = 0x6, + .match_mask = 0x6, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 2, + .minbit = 1, + .value = 0x3, + .pmaxbit = 11, + .pminbit = 5, + .zone_minbit = 5, + .arc_id_mask = 0x3e0, + .num_zone_bmp_words = 1, + .zone_bmp = bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_udp, + + }, + { + /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", + .match = 0x18, + .match_mask = 0x18, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 4, + .minbit = 3, + .value = 0x3, + .pmaxbit = 11, + .pminbit = 5, + .zone_minbit = 5, + .arc_id_mask = 0x3e0, + .num_zone_bmp_words = 1, + .zone_bmp = bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l3, + + }, + { + /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", + .match = 0x60, + .match_mask = 0x60, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 6, + .minbit = 5, + .value = 0x3, + .pmaxbit = 11, + .pminbit = 5, + .zone_minbit = 5, + .arc_id_mask = 0x3e0, + .num_zone_bmp_words = 1, + .zone_bmp = bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l4, + + }, + { + /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", + .match = 0x46, + .match_mask = 0x66, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 6, + .minbit = 5, + .value = 0x2, + .pmaxbit = 11, + .pminbit = 5, + .zone_minbit = 5, + .arc_id_mask = 0x3e0, + .num_zone_bmp_words = 1, + .zone_bmp = bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l5, + + }, + { + /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */ + .name = "INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", + .match = 0x26, + .match_mask = 0x66, + .match_maxbit = 11, + .match_minbit = 5, + .maxbit = 6, + .minbit = 5, + .value = 0x1, + .pmaxbit = 11, + .pminbit = 5, + .zone_minbit = 5, + .arc_id_mask = 0x3e0, + .num_zone_bmp_words = 1, + .zone_bmp = bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_vxlan, + + }, + { + /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH */ + .name = "INGRESS_PKT_SYS_HDR_EP_NIH", + .match = 0x2, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x2, + .pmaxbit = 1, + .pminbit = 0, + .zone_minbit = 0, + .arc_id_mask = 0x3, + .num_zone_bmp_words = 1, + .zone_bmp = bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_sys_hdr_ep_nih, + + }, + { + /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */ + .name = "INGRESS_PKT_SYS_HDR_LOOPBACK", + .match = 0x1, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x1, + .pmaxbit = 1, + .pminbit = 0, + .zone_minbit = 0, + .arc_id_mask = 0x3, + .num_zone_bmp_words = 1, + .zone_bmp = bcm78800_a0_cna_6_5_32_3_0_rxpmd_arc_ingress_pkt_sys_hdr_loopback, + + }, + { + /* BCM78800_A0_CNA_6_5_32_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */ + .name = "INGRESS_PKT_SYS_HDR_NONE", + .match = 0x0, + .match_mask = 0x3, + .match_maxbit = 1, + .match_minbit = 0, + .maxbit = 1, + .minbit = 0, + .value = 0x0, + .pmaxbit = 1, + .pminbit = 0, + .zone_minbit = 0, + .arc_id_mask = 0x3, + + }, +}; + +static bcmpkt_rxpmd_match_id_db_info_t bcm78800_a0_cna_6_5_32_3_0_rxpmd_match_id_db_info = { + .num_entries = 77, + .db = bcm78800_a0_cna_6_5_32_3_0_rxpmd_match_id_db +}; +bcmpkt_rxpmd_match_id_db_info_t * bcm78800_a0_cna_6_5_32_3_0_rxpmd_match_id_db_info_get(void) { + return &bcm78800_a0_cna_6_5_32_3_0_rxpmd_match_id_db_info; +} + +static shr_enum_map_t bcm78800_a0_cna_6_5_32_3_0_rxpmd_match_id_map[] = { + BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_rxpmd_match_id_map_info_t bcm78800_a0_cna_6_5_32_3_0_rxpmd_match_id_map_info = { + .num_entries = 77, + .map = bcm78800_a0_cna_6_5_32_3_0_rxpmd_match_id_map +}; + +bcmpkt_rxpmd_match_id_map_info_t * bcm78800_a0_cna_6_5_32_3_0_rxpmd_match_id_map_info_get(void) { + return &bcm78800_a0_cna_6_5_32_3_0_rxpmd_match_id_map_info; +} diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/xfcr/bcm78800_a0/cna_6_5_32_3_0/bcm78800_a0_cna_6_5_32_3_0_pkt_flexhdr.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/xfcr/bcm78800_a0/cna_6_5_32_3_0/bcm78800_a0_cna_6_5_32_3_0_pkt_flexhdr.c new file mode 100644 index 00000000000..0e9b7575dec --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/xfcr/bcm78800_a0/cna_6_5_32_3_0/bcm78800_a0_cna_6_5_32_3_0_pkt_flexhdr.c @@ -0,0 +1,3833 @@ +/***************************************************************** + * + * DO NOT EDIT THIS FILE! + * This file is auto-generated by xfc_map_parser + * from the NPL output file(s) map.yml + * for device bcm78800_a0 and variant cna_6_5_32_3_0. + * Edits to this file will be lost when it is regenerated. + * + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + * All Rights Reserved.$ + * + * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser + * + ****************************************************************/ + +#include +#include +#include +#include +#include +#include +#include + +#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) +#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) +#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) +#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) + +static void bcm78800_a0_cna_6_5_32_3_0_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons) +{ + uint32_t *reason = data + 0; + + if (reason[13] & (0x1 << 0)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU); + } + if (reason[13] & (0x1 << 1)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS); + } + if (reason[13] & (0x1 << 2)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE); + } + if (reason[13] & (0x1 << 3)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD); + } + if (reason[13] & (0x1 << 4)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST); + } + if (reason[13] & (0x1 << 5)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED); + } + if (reason[13] & (0x1 << 6)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT); + } + if (reason[13] & (0x1 << 7)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED); + } + if (reason[13] & (0x1 << 8)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED); + } + if (reason[13] & (0x1 << 9)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS); + } + if (reason[13] & (0x1 << 10)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP); + } + if (reason[13] & (0x1 << 11)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS); + } + if (reason[13] & (0x1 << 12)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP); + } + if (reason[13] & (0x1 << 13)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR); + } + if (reason[13] & (0x1 << 14)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR); + } + if (reason[13] & (0x1 << 16)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL); + } + if (reason[13] & (0x1 << 17)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_VFP); + } + if (reason[13] & (0x1 << 18)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP); + } + if (reason[13] & (0x1 << 19)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER); + } + if (reason[13] & (0x1 << 22)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT); + } + if (reason[13] & (0x1 << 23)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT); + } + if (reason[12] & (0x1 << 15)) { + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP); + } +} + +static void bcm78800_a0_cna_6_5_32_3_0_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data) +{ + uint32_t *reason = data + 0; + + reason[13] = 0; + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) { + reason[13] |= (0x1 << 0); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) { + reason[13] |= (0x1 << 1); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) { + reason[13] |= (0x1 << 2); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD)) { + reason[13] |= (0x1 << 3); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST)) { + reason[13] |= (0x1 << 4); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) { + reason[13] |= (0x1 << 5); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) { + reason[13] |= (0x1 << 6); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED)) { + reason[13] |= (0x1 << 7); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED)) { + reason[13] |= (0x1 << 8); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) { + reason[13] |= (0x1 << 9); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) { + reason[13] |= (0x1 << 10); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) { + reason[13] |= (0x1 << 11); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) { + reason[13] |= (0x1 << 12); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) { + reason[13] |= (0x1 << 13); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) { + reason[13] |= (0x1 << 14); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) { + reason[13] |= (0x1 << 16); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_VFP)) { + reason[13] |= (0x1 << 17); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP)) { + reason[13] |= (0x1 << 18); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) { + reason[13] |= (0x1 << 19); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT)) { + reason[13] |= (0x1 << 22); + } + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) { + reason[13] |= (0x1 << 23); + } + reason[12] = 0; + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) { + reason[12] |= (0x1 << 15); + } +} + +static bcmpkt_flex_field_metadata_t bcm78800_a0_cna_6_5_32_3_0_rxpmd_flex_field_data[] = { + { + .name = "DROP_CODE_15_0", + .fid = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 48, 63 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { 48, 63 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "DVP_15_0", + .fid = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_DVP_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 128, 143 }, /* Profile 2. */ + { 112, 127 }, /* Profile 3. */ + { 128, 143 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "EFFECTIVE_TTL_7_0", + .fid = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 256, 263 }, /* Profile 2. */ + { 256, 263 }, /* Profile 3. */ + { 256, 263 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "ENTROPY_LABEL_HIGH_3_0", + .fid = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 400, 403 }, /* Profile 2. */ + { 400, 403 }, /* Profile 3. */ + { 400, 403 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "ENTROPY_LABEL_LOW_15_0", + .fid = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 288, 303 }, /* Profile 2. */ + { 288, 303 }, /* Profile 3. */ + { 288, 303 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "EP_NIH_HDR_DROP_CODE_15_0", + .fid = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_DROP_CODE_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { 128, 143 }, /* Profile 3. */ + }, + .profile_cnt = 4, + }, + { + .name = "EP_NIH_HDR_RECIRC_CODE_3_0", + .fid = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 384, 387 }, /* Profile 2. */ + { 384, 387 }, /* Profile 3. */ + { 384, 387 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "EP_NIH_HDR_TIMESTAMP_15_0", + .fid = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 160, 175 }, /* Profile 2. */ + { 160, 175 }, /* Profile 3. */ + }, + .profile_cnt = 4, + }, + { + .name = "EP_NIH_HDR_TIMESTAMP_31_16", + .fid = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 176, 191 }, /* Profile 2. */ + { 176, 191 }, /* Profile 3. */ + }, + .profile_cnt = 4, + }, + { + .name = "ERSPAN3_GBP_SID_15_0", + .fid = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_ERSPAN3_GBP_SID_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 272, 287 }, /* Profile 2. */ + { 272, 287 }, /* Profile 3. */ + { 272, 287 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "EVENT_TRACE_VECTOR_15_0", + .fid = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 0, 15 }, /* Profile 2. */ + { 0, 15 }, /* Profile 3. */ + { 0, 15 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "EVENT_TRACE_VECTOR_31_16", + .fid = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 16, 31 }, /* Profile 2. */ + { 16, 31 }, /* Profile 3. */ + { 16, 31 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "EVENT_TRACE_VECTOR_47_32", + .fid = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 32, 47 }, /* Profile 2. */ + { 32, 47 }, /* Profile 3. */ + { 32, 47 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "I2E_CLASS_ID_15_0", + .fid = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 144, 159 }, /* Profile 2. */ + { 144, 159 }, /* Profile 3. */ + { 144, 159 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "IFP_TS_CONTROL_ACTION_3_0", + .fid = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 416, 419 }, /* Profile 2. */ + { 416, 419 }, /* Profile 3. */ + { 416, 419 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "ING_TIMESTAMP_15_0", + .fid = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { 160, 175 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "ING_TIMESTAMP_31_16", + .fid = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { -1, -1 }, /* Profile 2. */ + { -1, -1 }, /* Profile 3. */ + { 176, 191 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "INGRESS_PP_PORT_7_0", + .fid = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 208, 215 }, /* Profile 2. */ + { 208, 215 }, /* Profile 3. */ + { 208, 215 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0", + .fid = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 304, 319 }, /* Profile 2. */ + { 304, 319 }, /* Profile 3. */ + { 304, 319 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "INGRESS_QOS_REMARK_CTRL_3_0", + .fid = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 408, 411 }, /* Profile 2. */ + { 408, 411 }, /* Profile 3. */ + { 408, 411 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "INT_PRI_3_0", + .fid = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 388, 391 }, /* Profile 2. */ + { 388, 391 }, /* Profile 3. */ + { 388, 391 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "L2_IIF_11_0", + .fid = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_L2_IIF_11_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 320, 331 }, /* Profile 2. */ + { 320, 331 }, /* Profile 3. */ + { 320, 331 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "L2_OIF_11_0", + .fid = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_L2_OIF_11_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 96, 107 }, /* Profile 2. */ + { 80, 91 }, /* Profile 3. */ + { 96, 107 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "L3_IIF_13_0", + .fid = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 352, 365 }, /* Profile 2. */ + { 352, 365 }, /* Profile 3. */ + { 352, 365 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "L3_OIF_1_13_0", + .fid = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 112, 125 }, /* Profile 2. */ + { 96, 109 }, /* Profile 3. */ + { 112, 125 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "NHOP_2_OR_ECMP_GROUP_INDEX_1_14_0", + .fid = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_14_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 368, 382 }, /* Profile 2. */ + { 368, 382 }, /* Profile 3. */ + { 368, 382 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "NHOP_INDEX_1_14_0", + .fid = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_14_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 192, 206 }, /* Profile 2. */ + { 192, 206 }, /* Profile 3. */ + { 192, 206 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "PARSER_VHLEN_0_15_0", + .fid = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 64, 79 }, /* Profile 2. */ + { 48, 63 }, /* Profile 3. */ + { 64, 79 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "PKT_MISC_CTRL_0_3_0", + .fid = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 404, 407 }, /* Profile 2. */ + { 404, 407 }, /* Profile 3. */ + { 404, 407 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "SVP_15_0", + .fid = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_SVP_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 336, 351 }, /* Profile 2. */ + { 336, 351 }, /* Profile 3. */ + { 336, 351 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "SVP_NETWORK_GROUP_BITMAP_3_0", + .fid = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 392, 395 }, /* Profile 2. */ + { 392, 395 }, /* Profile 3. */ + { 392, 395 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "SYSTEM_DESTINATION_15_0", + .fid = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 240, 255 }, /* Profile 2. */ + { 240, 255 }, /* Profile 3. */ + { 240, 255 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "SYSTEM_OPCODE_3_0", + .fid = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 396, 399 }, /* Profile 2. */ + { 396, 399 }, /* Profile 3. */ + { 396, 399 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "SYSTEM_SOURCE_15_0", + .fid = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 224, 239 }, /* Profile 2. */ + { 224, 239 }, /* Profile 3. */ + { 224, 239 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "TAG_ACTION_CTRL_1_0", + .fid = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_TAG_ACTION_CTRL_1_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 412, 413 }, /* Profile 2. */ + { 412, 413 }, /* Profile 3. */ + { 412, 413 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "TUNNEL_PROCESSING_RESULTS_1_3_0", + .fid = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 420, 423 }, /* Profile 2. */ + { 420, 423 }, /* Profile 3. */ + { 420, 423 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, + { + .name = "VFI_15_0", + .fid = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_VFI_15_0, + .profile = { + { -1, -1 }, /* Profile 0. */ + { -1, -1 }, /* Profile 1. */ + { 80, 95 }, /* Profile 2. */ + { 64, 79 }, /* Profile 3. */ + { 80, 95 }, /* Profile 4. */ + }, + .profile_cnt = 5, + }, +}; +static bcmpkt_flex_field_info_t bcm78800_a0_cna_6_5_32_3_0_rxpmd_flex_field_info = { + .num_fields = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_FID_COUNT, + .info = bcm78800_a0_cna_6_5_32_3_0_rxpmd_flex_field_data, + .profile_bmp_cnt = 1, + .profile_bmp[0] = 0x1c, + +}; + +static shr_enum_map_t bcm78800_a0_cna_6_5_32_3_0_rxpmd_flex_reason_names[] = { + BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT +}; + +static bcmpkt_flex_reasons_info_t bcm78800_a0_cna_6_5_32_3_0_rxpmd_flex_reasons_info = { + .num_reasons = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_COUNT, + .reason_names = bcm78800_a0_cna_6_5_32_3_0_rxpmd_flex_reason_names, + .reason_encode = bcm78800_a0_cna_6_5_32_3_0_rxpmd_flex_reason_encode, + .reason_decode = bcm78800_a0_cna_6_5_32_3_0_rxpmd_flex_reason_decode, +}; + + +static int32_t bcmpkt_arp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_arp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_arp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_arp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_arp_t_operation_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_arp_t_operation_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_arp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_arp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_arp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_arp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_arp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_cna_6_5_32_3_0_arp_t_fget[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_FID_COUNT] = { + bcmpkt_arp_t_hardware_len_get, + bcmpkt_arp_t_hardware_type_get, + bcmpkt_arp_t_operation_get, + bcmpkt_arp_t_prot_addr_len_get, + bcmpkt_arp_t_protocol_type_get, + bcmpkt_arp_t_sender_ha_get, + bcmpkt_arp_t_sender_ip_get, + bcmpkt_arp_t_target_ha_get, + bcmpkt_arp_t_target_ip_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_cna_6_5_32_3_0_arp_t_fset[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_FID_COUNT] = { + bcmpkt_arp_t_hardware_len_set, + bcmpkt_arp_t_hardware_type_set, + bcmpkt_arp_t_operation_set, + bcmpkt_arp_t_prot_addr_len_set, + bcmpkt_arp_t_protocol_type_set, + bcmpkt_arp_t_sender_ha_set, + bcmpkt_arp_t_sender_ip_set, + bcmpkt_arp_t_target_ha_set, + bcmpkt_arp_t_target_ip_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_cna_6_5_32_3_0_arp_t_field_data[] = { + BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_cna_6_5_32_3_0_arp_t_field_info = { + .num_fields = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ARP_T_FID_COUNT, + .info = bcm78800_a0_cna_6_5_32_3_0_arp_t_field_data, +}; + + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_cna_6_5_32_3_0_cpu_composites_0_t_fget[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { + bcmpkt_cpu_composites_0_t_dma_cont0_get, + bcmpkt_cpu_composites_0_t_dma_cont1_get, + bcmpkt_cpu_composites_0_t_dma_cont2_get, + bcmpkt_cpu_composites_0_t_dma_cont3_get, + bcmpkt_cpu_composites_0_t_dma_cont4_get, + bcmpkt_cpu_composites_0_t_dma_cont5_get, + bcmpkt_cpu_composites_0_t_dma_cont6_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_cna_6_5_32_3_0_cpu_composites_0_t_fset[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { + bcmpkt_cpu_composites_0_t_dma_cont0_set, + bcmpkt_cpu_composites_0_t_dma_cont1_set, + bcmpkt_cpu_composites_0_t_dma_cont2_set, + bcmpkt_cpu_composites_0_t_dma_cont3_set, + bcmpkt_cpu_composites_0_t_dma_cont4_set, + bcmpkt_cpu_composites_0_t_dma_cont5_set, + bcmpkt_cpu_composites_0_t_dma_cont6_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_cna_6_5_32_3_0_cpu_composites_0_t_field_data[] = { + BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_cna_6_5_32_3_0_cpu_composites_0_t_field_info = { + .num_fields = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT, + .info = bcm78800_a0_cna_6_5_32_3_0_cpu_composites_0_t_field_data, +}; + + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_cna_6_5_32_3_0_cpu_composites_1_t_fget[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { + bcmpkt_cpu_composites_1_t_dma_cont10_get, + bcmpkt_cpu_composites_1_t_dma_cont11_get, + bcmpkt_cpu_composites_1_t_dma_cont12_get, + bcmpkt_cpu_composites_1_t_dma_cont13_get, + bcmpkt_cpu_composites_1_t_dma_cont14_get, + bcmpkt_cpu_composites_1_t_dma_cont15_get, + bcmpkt_cpu_composites_1_t_dma_cont16_get, + bcmpkt_cpu_composites_1_t_dma_cont17_get, + bcmpkt_cpu_composites_1_t_dma_cont7_get, + bcmpkt_cpu_composites_1_t_dma_cont8_get, + bcmpkt_cpu_composites_1_t_dma_cont9_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_cna_6_5_32_3_0_cpu_composites_1_t_fset[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { + bcmpkt_cpu_composites_1_t_dma_cont10_set, + bcmpkt_cpu_composites_1_t_dma_cont11_set, + bcmpkt_cpu_composites_1_t_dma_cont12_set, + bcmpkt_cpu_composites_1_t_dma_cont13_set, + bcmpkt_cpu_composites_1_t_dma_cont14_set, + bcmpkt_cpu_composites_1_t_dma_cont15_set, + bcmpkt_cpu_composites_1_t_dma_cont16_set, + bcmpkt_cpu_composites_1_t_dma_cont17_set, + bcmpkt_cpu_composites_1_t_dma_cont7_set, + bcmpkt_cpu_composites_1_t_dma_cont8_set, + bcmpkt_cpu_composites_1_t_dma_cont9_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_cna_6_5_32_3_0_cpu_composites_1_t_field_data[] = { + BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_cna_6_5_32_3_0_cpu_composites_1_t_field_info = { + .num_fields = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT, + .info = bcm78800_a0_cna_6_5_32_3_0_cpu_composites_1_t_field_data, +}; + + +static int32_t bcmpkt_ep_nih_header_t_header_subtype_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_header_subtype_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_header_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 6); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_header_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 6, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 20, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 4); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 4, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_start_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 30, 2); + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_start_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 30, 2, val); + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ep_nih_header_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_cna_6_5_32_3_0_ep_nih_header_t_fget[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = { + bcmpkt_ep_nih_header_t_header_subtype_get, + bcmpkt_ep_nih_header_t_header_type_get, + bcmpkt_ep_nih_header_t_opaque_ctrl_a_get, + bcmpkt_ep_nih_header_t_opaque_ctrl_b_get, + bcmpkt_ep_nih_header_t_opaque_ctrl_c_get, + bcmpkt_ep_nih_header_t_opaque_object_a_get, + bcmpkt_ep_nih_header_t_opaque_object_b_get, + bcmpkt_ep_nih_header_t_opaque_object_c_get, + bcmpkt_ep_nih_header_t_recirc_profile_index_get, + bcmpkt_ep_nih_header_t_reserved_0_get, + bcmpkt_ep_nih_header_t_start_get, + bcmpkt_ep_nih_header_t_timestamp_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_cna_6_5_32_3_0_ep_nih_header_t_fset[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = { + bcmpkt_ep_nih_header_t_header_subtype_set, + bcmpkt_ep_nih_header_t_header_type_set, + bcmpkt_ep_nih_header_t_opaque_ctrl_a_set, + bcmpkt_ep_nih_header_t_opaque_ctrl_b_set, + bcmpkt_ep_nih_header_t_opaque_ctrl_c_set, + bcmpkt_ep_nih_header_t_opaque_object_a_set, + bcmpkt_ep_nih_header_t_opaque_object_b_set, + bcmpkt_ep_nih_header_t_opaque_object_c_set, + bcmpkt_ep_nih_header_t_recirc_profile_index_set, + bcmpkt_ep_nih_header_t_reserved_0_set, + bcmpkt_ep_nih_header_t_start_set, + bcmpkt_ep_nih_header_t_timestamp_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_cna_6_5_32_3_0_ep_nih_header_t_field_data[] = { + BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_cna_6_5_32_3_0_ep_nih_header_t_field_info = { + .num_fields = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT, + .info = bcm78800_a0_cna_6_5_32_3_0_ep_nih_header_t_field_data, +}; + + +static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 11, 2); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 11, 2, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 13, 3); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 13, 3, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 10); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 10, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_t_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 10, 1); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_t_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 10, 1, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 12); + + return ret; +} + +static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 12, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_cna_6_5_32_3_0_erspan3_fixed_hdr_t_fget[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { + bcmpkt_erspan3_fixed_hdr_t_bso_get, + bcmpkt_erspan3_fixed_hdr_t_cos_get, + bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get, + bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get, + bcmpkt_erspan3_fixed_hdr_t_session_id_get, + bcmpkt_erspan3_fixed_hdr_t_t_get, + bcmpkt_erspan3_fixed_hdr_t_timestamp_get, + bcmpkt_erspan3_fixed_hdr_t_ver_get, + bcmpkt_erspan3_fixed_hdr_t_vlan_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_cna_6_5_32_3_0_erspan3_fixed_hdr_t_fset[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { + bcmpkt_erspan3_fixed_hdr_t_bso_set, + bcmpkt_erspan3_fixed_hdr_t_cos_set, + bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set, + bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set, + bcmpkt_erspan3_fixed_hdr_t_session_id_set, + bcmpkt_erspan3_fixed_hdr_t_t_set, + bcmpkt_erspan3_fixed_hdr_t_timestamp_set, + bcmpkt_erspan3_fixed_hdr_t_ver_set, + bcmpkt_erspan3_fixed_hdr_t_vlan_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_cna_6_5_32_3_0_erspan3_fixed_hdr_t_field_data[] = { + BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_cna_6_5_32_3_0_erspan3_fixed_hdr_t_field_info = { + .num_fields = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT, + .info = bcm78800_a0_cna_6_5_32_3_0_erspan3_fixed_hdr_t_field_data, +}; + + +static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 26, 6); + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 26, 6, val); + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 10); + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 10, val); + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_cna_6_5_32_3_0_erspan3_subhdr_5_t_fget[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { + bcmpkt_erspan3_subhdr_5_t_platform_id_get, + bcmpkt_erspan3_subhdr_5_t_port_id_get, + bcmpkt_erspan3_subhdr_5_t_switch_id_get, + bcmpkt_erspan3_subhdr_5_t_timestamp_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_cna_6_5_32_3_0_erspan3_subhdr_5_t_fset[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { + bcmpkt_erspan3_subhdr_5_t_platform_id_set, + bcmpkt_erspan3_subhdr_5_t_port_id_set, + bcmpkt_erspan3_subhdr_5_t_switch_id_set, + bcmpkt_erspan3_subhdr_5_t_timestamp_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_cna_6_5_32_3_0_erspan3_subhdr_5_t_field_data[] = { + BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_cna_6_5_32_3_0_erspan3_subhdr_5_t_field_info = { + .num_fields = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT, + .info = bcm78800_a0_cna_6_5_32_3_0_erspan3_subhdr_5_t_field_data, +}; + + +static int32_t bcmpkt_ethertype_t_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ethertype_t_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_cna_6_5_32_3_0_ethertype_t_fget[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = { + bcmpkt_ethertype_t_type_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_cna_6_5_32_3_0_ethertype_t_fset[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = { + bcmpkt_ethertype_t_type_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_cna_6_5_32_3_0_ethertype_t_field_data[] = { + BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_cna_6_5_32_3_0_ethertype_t_field_info = { + .num_fields = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT, + .info = bcm78800_a0_cna_6_5_32_3_0_ethertype_t_field_data, +}; + + +static int32_t bcmpkt_generic_loopback_t_destination_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_destination_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_destination_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_destination_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_entropy_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_entropy_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_header_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_header_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_input_priority_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_input_priority_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_ctrl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 4, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_ctrl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 4, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_interface_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 28, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 28, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_qos_obj_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_qos_obj_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 8, 4); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 8, 4, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_reserved_2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_source_system_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_source_system_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_start_byte_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_generic_loopback_t_start_byte_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_cna_6_5_32_3_0_generic_loopback_t_fget[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { + bcmpkt_generic_loopback_t_destination_obj_get, + bcmpkt_generic_loopback_t_destination_type_get, + bcmpkt_generic_loopback_t_entropy_obj_get, + bcmpkt_generic_loopback_t_flags_get, + bcmpkt_generic_loopback_t_header_type_get, + bcmpkt_generic_loopback_t_input_priority_get, + bcmpkt_generic_loopback_t_interface_ctrl_get, + bcmpkt_generic_loopback_t_interface_obj_get, + bcmpkt_generic_loopback_t_processing_ctrl_0_get, + bcmpkt_generic_loopback_t_processing_ctrl_1_get, + bcmpkt_generic_loopback_t_qos_obj_get, + bcmpkt_generic_loopback_t_reserved_1_get, + bcmpkt_generic_loopback_t_reserved_2_get, + bcmpkt_generic_loopback_t_source_system_port_get, + bcmpkt_generic_loopback_t_start_byte_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_cna_6_5_32_3_0_generic_loopback_t_fset[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { + bcmpkt_generic_loopback_t_destination_obj_set, + bcmpkt_generic_loopback_t_destination_type_set, + bcmpkt_generic_loopback_t_entropy_obj_set, + bcmpkt_generic_loopback_t_flags_set, + bcmpkt_generic_loopback_t_header_type_set, + bcmpkt_generic_loopback_t_input_priority_set, + bcmpkt_generic_loopback_t_interface_ctrl_set, + bcmpkt_generic_loopback_t_interface_obj_set, + bcmpkt_generic_loopback_t_processing_ctrl_0_set, + bcmpkt_generic_loopback_t_processing_ctrl_1_set, + bcmpkt_generic_loopback_t_qos_obj_set, + bcmpkt_generic_loopback_t_reserved_1_set, + bcmpkt_generic_loopback_t_reserved_2_set, + bcmpkt_generic_loopback_t_source_system_port_set, + bcmpkt_generic_loopback_t_start_byte_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_cna_6_5_32_3_0_generic_loopback_t_field_data[] = { + BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_cna_6_5_32_3_0_generic_loopback_t_field_info = { + .num_fields = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT, + .info = bcm78800_a0_cna_6_5_32_3_0_generic_loopback_t_field_data, +}; + + +static int32_t bcmpkt_icmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_icmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_icmp_t_code_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_icmp_t_code_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_icmp_t_icmp_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_icmp_t_icmp_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_cna_6_5_32_3_0_icmp_t_fget[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T_FID_COUNT] = { + bcmpkt_icmp_t_checksum_get, + bcmpkt_icmp_t_code_get, + bcmpkt_icmp_t_icmp_type_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_cna_6_5_32_3_0_icmp_t_fset[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T_FID_COUNT] = { + bcmpkt_icmp_t_checksum_set, + bcmpkt_icmp_t_code_set, + bcmpkt_icmp_t_icmp_type_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_cna_6_5_32_3_0_icmp_t_field_data[] = { + BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_cna_6_5_32_3_0_icmp_t_field_info = { + .num_fields = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_ICMP_T_FID_COUNT, + .info = bcm78800_a0_cna_6_5_32_3_0_icmp_t_field_data, +}; + + +static int32_t bcmpkt_ipfix_t_export_time_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_export_time_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipfix_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipfix_t_obs_domain_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_obs_domain_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipfix_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ipfix_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_cna_6_5_32_3_0_ipfix_t_fget[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_FID_COUNT] = { + bcmpkt_ipfix_t_export_time_get, + bcmpkt_ipfix_t_length_get, + bcmpkt_ipfix_t_obs_domain_id_get, + bcmpkt_ipfix_t_sequence_num_get, + bcmpkt_ipfix_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_cna_6_5_32_3_0_ipfix_t_fset[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_FID_COUNT] = { + bcmpkt_ipfix_t_export_time_set, + bcmpkt_ipfix_t_length_set, + bcmpkt_ipfix_t_obs_domain_id_set, + bcmpkt_ipfix_t_sequence_num_set, + bcmpkt_ipfix_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_cna_6_5_32_3_0_ipfix_t_field_data[] = { + BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_cna_6_5_32_3_0_ipfix_t_field_info = { + .num_fields = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPFIX_T_FID_COUNT, + .info = bcm78800_a0_cna_6_5_32_3_0_ipfix_t_field_data, +}; + + +static int32_t bcmpkt_ipv4_t_da_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_da_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_flags_frag_offset_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_flags_frag_offset_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_hdr_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_hdr_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_option_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_option_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_protocol_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_protocol_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_sa_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_sa_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv4_t_tos_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_tos_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_total_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_total_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_ttl_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_ttl_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv4_t_version_hdr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_ipv4_t_version_hdr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_cna_6_5_32_3_0_ipv4_t_fget[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_FID_COUNT] = { + bcmpkt_ipv4_t_da_get, + bcmpkt_ipv4_t_flags_frag_offset_get, + bcmpkt_ipv4_t_hdr_checksum_get, + bcmpkt_ipv4_t_id_get, + bcmpkt_ipv4_t_option_get, + bcmpkt_ipv4_t_protocol_get, + bcmpkt_ipv4_t_sa_get, + bcmpkt_ipv4_t_tos_get, + bcmpkt_ipv4_t_total_length_get, + bcmpkt_ipv4_t_ttl_get, + bcmpkt_ipv4_t_version_hdr_len_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_cna_6_5_32_3_0_ipv4_t_fset[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_FID_COUNT] = { + bcmpkt_ipv4_t_da_set, + bcmpkt_ipv4_t_flags_frag_offset_set, + bcmpkt_ipv4_t_hdr_checksum_set, + bcmpkt_ipv4_t_id_set, + bcmpkt_ipv4_t_option_set, + bcmpkt_ipv4_t_protocol_set, + bcmpkt_ipv4_t_sa_set, + bcmpkt_ipv4_t_tos_set, + bcmpkt_ipv4_t_total_length_set, + bcmpkt_ipv4_t_ttl_set, + bcmpkt_ipv4_t_version_hdr_len_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_cna_6_5_32_3_0_ipv4_t_field_data[] = { + BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_cna_6_5_32_3_0_ipv4_t_field_info = { + .num_fields = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV4_T_FID_COUNT, + .info = bcm78800_a0_cna_6_5_32_3_0_ipv4_t_field_data, +}; + + +static int32_t bcmpkt_ipv6_t_da_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_da_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_flow_label_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 20); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_flow_label_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 20, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_hop_limit_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 8); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_hop_limit_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 8, 8); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_next_header_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 8, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_payload_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_payload_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_sa_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_sa_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_ipv6_t_traffic_class_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 20, 8); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_traffic_class_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 20, 8, val); + return ret; +} + +static int32_t bcmpkt_ipv6_t_version_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 28, 4); + + return ret; +} + +static int32_t bcmpkt_ipv6_t_version_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 28, 4, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_cna_6_5_32_3_0_ipv6_t_fget[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_FID_COUNT] = { + bcmpkt_ipv6_t_da_get, + bcmpkt_ipv6_t_flow_label_get, + bcmpkt_ipv6_t_hop_limit_get, + bcmpkt_ipv6_t_next_header_get, + bcmpkt_ipv6_t_payload_length_get, + bcmpkt_ipv6_t_sa_get, + bcmpkt_ipv6_t_traffic_class_get, + bcmpkt_ipv6_t_version_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_cna_6_5_32_3_0_ipv6_t_fset[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_FID_COUNT] = { + bcmpkt_ipv6_t_da_set, + bcmpkt_ipv6_t_flow_label_set, + bcmpkt_ipv6_t_hop_limit_set, + bcmpkt_ipv6_t_next_header_set, + bcmpkt_ipv6_t_payload_length_set, + bcmpkt_ipv6_t_sa_set, + bcmpkt_ipv6_t_traffic_class_set, + bcmpkt_ipv6_t_version_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_cna_6_5_32_3_0_ipv6_t_field_data[] = { + BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_cna_6_5_32_3_0_ipv6_t_field_info = { + .num_fields = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_IPV6_T_FID_COUNT, + .info = bcm78800_a0_cna_6_5_32_3_0_ipv6_t_field_data, +}; + + +static int32_t bcmpkt_l2_t_macda_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_l2_t_macda_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_l2_t_macsa_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_l2_t_macsa_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_cna_6_5_32_3_0_l2_t_fget[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_L2_T_FID_COUNT] = { + bcmpkt_l2_t_macda_get, + bcmpkt_l2_t_macsa_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_cna_6_5_32_3_0_l2_t_fset[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_L2_T_FID_COUNT] = { + bcmpkt_l2_t_macda_set, + bcmpkt_l2_t_macsa_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_cna_6_5_32_3_0_l2_t_field_data[] = { + BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_cna_6_5_32_3_0_l2_t_field_info = { + .num_fields = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_L2_T_FID_COUNT, + .info = bcm78800_a0_cna_6_5_32_3_0_l2_t_field_data, +}; + + +static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_cna_6_5_32_3_0_mirror_erspan_sn_t_fget[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { + bcmpkt_mirror_erspan_sn_t_seq_num_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_cna_6_5_32_3_0_mirror_erspan_sn_t_fset[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { + bcmpkt_mirror_erspan_sn_t_seq_num_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_cna_6_5_32_3_0_mirror_erspan_sn_t_field_data[] = { + BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_cna_6_5_32_3_0_mirror_erspan_sn_t_field_info = { + .num_fields = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT, + .info = bcm78800_a0_cna_6_5_32_3_0_mirror_erspan_sn_t_field_data, +}; + + +static int32_t bcmpkt_mirror_transport_t_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_mirror_transport_t_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_cna_6_5_32_3_0_mirror_transport_t_fget[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { + bcmpkt_mirror_transport_t_data_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_cna_6_5_32_3_0_mirror_transport_t_fset[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { + bcmpkt_mirror_transport_t_data_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_cna_6_5_32_3_0_mirror_transport_t_field_data[] = { + BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_cna_6_5_32_3_0_mirror_transport_t_field_info = { + .num_fields = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT, + .info = bcm78800_a0_cna_6_5_32_3_0_mirror_transport_t_field_data, +}; + + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[4], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[4], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[4], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[4], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_0_t_fget[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get, + bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get, + bcmpkt_psamp_mirror_on_drop_0_t_length_get, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get, + bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get, + bcmpkt_psamp_mirror_on_drop_0_t_template_id_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_0_t_fset[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set, + bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set, + bcmpkt_psamp_mirror_on_drop_0_t_length_set, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set, + bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set, + bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set, + bcmpkt_psamp_mirror_on_drop_0_t_template_id_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_0_t_field_data[] = { + BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_0_t_field_info = { + .num_fields = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT, + .info = bcm78800_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_0_t_field_data, +}; + + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 24, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 6); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 6, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_smod_state_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 22, 2); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_smod_state_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 22, 2, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_3_t_fget[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get, + bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get, + bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get, + bcmpkt_psamp_mirror_on_drop_3_t_smod_state_get, + bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get, + bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get, + bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_3_t_fset[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = { + bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set, + bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set, + bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set, + bcmpkt_psamp_mirror_on_drop_3_t_smod_state_set, + bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set, + bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set, + bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_3_t_field_data[] = { + BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_3_t_field_info = { + .num_fields = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT, + .info = bcm78800_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_3_t_field_data, +}; + + +static int32_t bcmpkt_rarp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 24, 8); + + return ret; +} + +static int32_t bcmpkt_rarp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 24, 8, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_rarp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_operation_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_rarp_t_operation_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 8); + + return ret; +} + +static int32_t bcmpkt_rarp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 8, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_rarp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_rarp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_cna_6_5_32_3_0_rarp_t_fget[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_FID_COUNT] = { + bcmpkt_rarp_t_hardware_len_get, + bcmpkt_rarp_t_hardware_type_get, + bcmpkt_rarp_t_operation_get, + bcmpkt_rarp_t_prot_addr_len_get, + bcmpkt_rarp_t_protocol_type_get, + bcmpkt_rarp_t_sender_ha_get, + bcmpkt_rarp_t_sender_ip_get, + bcmpkt_rarp_t_target_ha_get, + bcmpkt_rarp_t_target_ip_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_cna_6_5_32_3_0_rarp_t_fset[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_FID_COUNT] = { + bcmpkt_rarp_t_hardware_len_set, + bcmpkt_rarp_t_hardware_type_set, + bcmpkt_rarp_t_operation_set, + bcmpkt_rarp_t_prot_addr_len_set, + bcmpkt_rarp_t_protocol_type_set, + bcmpkt_rarp_t_sender_ha_set, + bcmpkt_rarp_t_sender_ip_set, + bcmpkt_rarp_t_target_ha_set, + bcmpkt_rarp_t_target_ip_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_cna_6_5_32_3_0_rarp_t_field_data[] = { + BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_cna_6_5_32_3_0_rarp_t_field_info = { + .num_fields = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_RARP_T_FID_COUNT, + .info = bcm78800_a0_cna_6_5_32_3_0_rarp_t_field_data, +}; + + +static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_first_4bytes_t_src_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_first_4bytes_t_src_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_cna_6_5_32_3_0_tcp_first_4bytes_t_fget[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { + bcmpkt_tcp_first_4bytes_t_dst_port_get, + bcmpkt_tcp_first_4bytes_t_src_port_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_cna_6_5_32_3_0_tcp_first_4bytes_t_fset[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { + bcmpkt_tcp_first_4bytes_t_dst_port_set, + bcmpkt_tcp_first_4bytes_t_src_port_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_cna_6_5_32_3_0_tcp_first_4bytes_t_field_data[] = { + BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_cna_6_5_32_3_0_tcp_first_4bytes_t_field_info = { + .num_fields = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT, + .info = bcm78800_a0_cna_6_5_32_3_0_tcp_first_4bytes_t_field_data, +}; + + +static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 16, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 16, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[3], 0, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[3], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_win_size_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[2], 0, 16); + + return ret; +} + +static int32_t bcmpkt_tcp_last_16bytes_t_win_size_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[2], 0, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_cna_6_5_32_3_0_tcp_last_16bytes_t_fget[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { + bcmpkt_tcp_last_16bytes_t_ack_num_get, + bcmpkt_tcp_last_16bytes_t_checksum_get, + bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get, + bcmpkt_tcp_last_16bytes_t_seq_num_get, + bcmpkt_tcp_last_16bytes_t_urgent_ptr_get, + bcmpkt_tcp_last_16bytes_t_win_size_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_cna_6_5_32_3_0_tcp_last_16bytes_t_fset[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { + bcmpkt_tcp_last_16bytes_t_ack_num_set, + bcmpkt_tcp_last_16bytes_t_checksum_set, + bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set, + bcmpkt_tcp_last_16bytes_t_seq_num_set, + bcmpkt_tcp_last_16bytes_t_urgent_ptr_set, + bcmpkt_tcp_last_16bytes_t_win_size_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_cna_6_5_32_3_0_tcp_last_16bytes_t_field_data[] = { + BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_cna_6_5_32_3_0_tcp_last_16bytes_t_field_info = { + .num_fields = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT, + .info = bcm78800_a0_cna_6_5_32_3_0_tcp_last_16bytes_t_field_data, +}; + + +static int32_t bcmpkt_udp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_udp_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_dst_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_udp_t_src_port_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_src_port_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_udp_t_udp_length_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 16, 16); + + return ret; +} + +static int32_t bcmpkt_udp_t_udp_length_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 16, 16, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_cna_6_5_32_3_0_udp_t_fget[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_FID_COUNT] = { + bcmpkt_udp_t_checksum_get, + bcmpkt_udp_t_dst_port_get, + bcmpkt_udp_t_src_port_get, + bcmpkt_udp_t_udp_length_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_cna_6_5_32_3_0_udp_t_fset[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_FID_COUNT] = { + bcmpkt_udp_t_checksum_set, + bcmpkt_udp_t_dst_port_set, + bcmpkt_udp_t_src_port_set, + bcmpkt_udp_t_udp_length_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_cna_6_5_32_3_0_udp_t_field_data[] = { + BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_cna_6_5_32_3_0_udp_t_field_info = { + .num_fields = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UDP_T_FID_COUNT, + .info = bcm78800_a0_cna_6_5_32_3_0_udp_t_field_data, +}; + + +static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_cna_6_5_32_3_0_unknown_l3_t_fget[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { + bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get, + bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_cna_6_5_32_3_0_unknown_l3_t_fset[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { + bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set, + bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_cna_6_5_32_3_0_unknown_l3_t_field_data[] = { + BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_cna_6_5_32_3_0_unknown_l3_t_field_info = { + .num_fields = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT, + .info = bcm78800_a0_cna_6_5_32_3_0_unknown_l3_t_field_data, +}; + + +static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_cna_6_5_32_3_0_unknown_l4_t_fget[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { + bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_cna_6_5_32_3_0_unknown_l4_t_fset[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { + bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_cna_6_5_32_3_0_unknown_l4_t_field_data[] = { + BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_cna_6_5_32_3_0_unknown_l4_t_field_info = { + .num_fields = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT, + .info = bcm78800_a0_cna_6_5_32_3_0_unknown_l4_t_field_data, +}; + + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 16); + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 16, val); + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_cna_6_5_32_3_0_unknown_l5_t_fget[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { + bcmpkt_unknown_l5_t_l5_bytes_0_1_get, + bcmpkt_unknown_l5_t_l5_bytes_2_3_get, + bcmpkt_unknown_l5_t_l5_bytes_4_7_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_cna_6_5_32_3_0_unknown_l5_t_fset[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { + bcmpkt_unknown_l5_t_l5_bytes_0_1_set, + bcmpkt_unknown_l5_t_l5_bytes_2_3_set, + bcmpkt_unknown_l5_t_l5_bytes_4_7_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_cna_6_5_32_3_0_unknown_l5_t_field_data[] = { + BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_cna_6_5_32_3_0_unknown_l5_t_field_info = { + .num_fields = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT, + .info = bcm78800_a0_cna_6_5_32_3_0_unknown_l5_t_field_data, +}; + + +static int32_t bcmpkt_vlan_t_cfi_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 12, 1); + + return ret; +} + +static int32_t bcmpkt_vlan_t_cfi_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 12, 1, val); + return ret; +} + +static int32_t bcmpkt_vlan_t_pcp_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 13, 3); + + return ret; +} + +static int32_t bcmpkt_vlan_t_pcp_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 13, 3, val); + return ret; +} + +static int32_t bcmpkt_vlan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 16, 16); + + return ret; +} + +static int32_t bcmpkt_vlan_t_tpid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 16, 16, val); + return ret; +} + +static int32_t bcmpkt_vlan_t_vid_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[0], 0, 12); + + return ret; +} + +static int32_t bcmpkt_vlan_t_vid_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[0], 0, 12, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_cna_6_5_32_3_0_vlan_t_fget[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_FID_COUNT] = { + bcmpkt_vlan_t_cfi_get, + bcmpkt_vlan_t_pcp_get, + bcmpkt_vlan_t_tpid_get, + bcmpkt_vlan_t_vid_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_cna_6_5_32_3_0_vlan_t_fset[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_FID_COUNT] = { + bcmpkt_vlan_t_cfi_set, + bcmpkt_vlan_t_pcp_set, + bcmpkt_vlan_t_tpid_set, + bcmpkt_vlan_t_vid_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_cna_6_5_32_3_0_vlan_t_field_data[] = { + BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_cna_6_5_32_3_0_vlan_t_field_info = { + .num_fields = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_VLAN_T_FID_COUNT, + .info = bcm78800_a0_cna_6_5_32_3_0_vlan_t_field_data, +}; + + +static int32_t bcmpkt_vxlan_t_flags_reserved_1_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_vxlan_t_flags_reserved_1_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + ret = SHR_E_PARAM; + + return ret; +} + +static int32_t bcmpkt_vxlan_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 0, 8); + + return ret; +} + +static int32_t bcmpkt_vxlan_t_reserved2_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 0, 8, val); + return ret; +} + +static int32_t bcmpkt_vxlan_t_vn_id_get(uint32_t *data, int profile, uint32_t *val) { + int32_t ret = SHR_E_NONE; + + *val = WORD_FIELD_GET(data[1], 8, 24); + + return ret; +} + +static int32_t bcmpkt_vxlan_t_vn_id_set(uint32_t *data, int profile, uint32_t val) { + int32_t ret = SHR_E_NONE; + + WORD_FIELD_SET(data[1], 8, 24, val); + return ret; +} + +bcmpkt_flex_field_get_f bcm78800_a0_cna_6_5_32_3_0_vxlan_t_fget[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T_FID_COUNT] = { + bcmpkt_vxlan_t_flags_reserved_1_get, + bcmpkt_vxlan_t_reserved2_get, + bcmpkt_vxlan_t_vn_id_get, +}; + +bcmpkt_flex_field_set_f bcm78800_a0_cna_6_5_32_3_0_vxlan_t_fset[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T_FID_COUNT] = { + bcmpkt_vxlan_t_flags_reserved_1_set, + bcmpkt_vxlan_t_reserved2_set, + bcmpkt_vxlan_t_vn_id_set, +}; + +static bcmpkt_flex_field_metadata_t bcm78800_a0_cna_6_5_32_3_0_vxlan_t_field_data[] = { + BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT +}; + +static bcmpkt_flex_field_info_t bcm78800_a0_cna_6_5_32_3_0_vxlan_t_field_info = { + .num_fields = BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_VXLAN_T_FID_COUNT, + .info = bcm78800_a0_cna_6_5_32_3_0_vxlan_t_field_data, +}; + +static bcmpkt_flex_pmd_info_t bcm78800_a0_cna_6_5_32_3_0_flexhdr_info_list[BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_FLEXHDR_COUNT] = { + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_cna_6_5_32_3_0_arp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_cna_6_5_32_3_0_arp_t_fget, + .flex_fset = bcm78800_a0_cna_6_5_32_3_0_arp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_cna_6_5_32_3_0_cpu_composites_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_cna_6_5_32_3_0_cpu_composites_0_t_fget, + .flex_fset = bcm78800_a0_cna_6_5_32_3_0_cpu_composites_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_cna_6_5_32_3_0_cpu_composites_1_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_cna_6_5_32_3_0_cpu_composites_1_t_fget, + .flex_fset = bcm78800_a0_cna_6_5_32_3_0_cpu_composites_1_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_cna_6_5_32_3_0_ep_nih_header_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_cna_6_5_32_3_0_ep_nih_header_t_fget, + .flex_fset = bcm78800_a0_cna_6_5_32_3_0_ep_nih_header_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_cna_6_5_32_3_0_erspan3_fixed_hdr_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_cna_6_5_32_3_0_erspan3_fixed_hdr_t_fget, + .flex_fset = bcm78800_a0_cna_6_5_32_3_0_erspan3_fixed_hdr_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_cna_6_5_32_3_0_erspan3_subhdr_5_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_cna_6_5_32_3_0_erspan3_subhdr_5_t_fget, + .flex_fset = bcm78800_a0_cna_6_5_32_3_0_erspan3_subhdr_5_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_cna_6_5_32_3_0_ethertype_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_cna_6_5_32_3_0_ethertype_t_fget, + .flex_fset = bcm78800_a0_cna_6_5_32_3_0_ethertype_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_cna_6_5_32_3_0_generic_loopback_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_cna_6_5_32_3_0_generic_loopback_t_fget, + .flex_fset = bcm78800_a0_cna_6_5_32_3_0_generic_loopback_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_cna_6_5_32_3_0_icmp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_cna_6_5_32_3_0_icmp_t_fget, + .flex_fset = bcm78800_a0_cna_6_5_32_3_0_icmp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_cna_6_5_32_3_0_ipfix_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_cna_6_5_32_3_0_ipfix_t_fget, + .flex_fset = bcm78800_a0_cna_6_5_32_3_0_ipfix_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_cna_6_5_32_3_0_ipv4_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_cna_6_5_32_3_0_ipv4_t_fget, + .flex_fset = bcm78800_a0_cna_6_5_32_3_0_ipv4_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_cna_6_5_32_3_0_ipv6_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_cna_6_5_32_3_0_ipv6_t_fget, + .flex_fset = bcm78800_a0_cna_6_5_32_3_0_ipv6_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_cna_6_5_32_3_0_l2_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_cna_6_5_32_3_0_l2_t_fget, + .flex_fset = bcm78800_a0_cna_6_5_32_3_0_l2_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_cna_6_5_32_3_0_mirror_erspan_sn_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_cna_6_5_32_3_0_mirror_erspan_sn_t_fget, + .flex_fset = bcm78800_a0_cna_6_5_32_3_0_mirror_erspan_sn_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_cna_6_5_32_3_0_mirror_transport_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_cna_6_5_32_3_0_mirror_transport_t_fget, + .flex_fset = bcm78800_a0_cna_6_5_32_3_0_mirror_transport_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_0_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_0_t_fget, + .flex_fset = bcm78800_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_0_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_3_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_3_t_fget, + .flex_fset = bcm78800_a0_cna_6_5_32_3_0_psamp_mirror_on_drop_3_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_cna_6_5_32_3_0_rarp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_cna_6_5_32_3_0_rarp_t_fget, + .flex_fset = bcm78800_a0_cna_6_5_32_3_0_rarp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_cna_6_5_32_3_0_tcp_first_4bytes_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_cna_6_5_32_3_0_tcp_first_4bytes_t_fget, + .flex_fset = bcm78800_a0_cna_6_5_32_3_0_tcp_first_4bytes_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_cna_6_5_32_3_0_tcp_last_16bytes_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_cna_6_5_32_3_0_tcp_last_16bytes_t_fget, + .flex_fset = bcm78800_a0_cna_6_5_32_3_0_tcp_last_16bytes_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_cna_6_5_32_3_0_udp_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_cna_6_5_32_3_0_udp_t_fget, + .flex_fset = bcm78800_a0_cna_6_5_32_3_0_udp_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_cna_6_5_32_3_0_unknown_l3_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_cna_6_5_32_3_0_unknown_l3_t_fget, + .flex_fset = bcm78800_a0_cna_6_5_32_3_0_unknown_l3_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_cna_6_5_32_3_0_unknown_l4_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_cna_6_5_32_3_0_unknown_l4_t_fget, + .flex_fset = bcm78800_a0_cna_6_5_32_3_0_unknown_l4_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_cna_6_5_32_3_0_unknown_l5_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_cna_6_5_32_3_0_unknown_l5_t_fget, + .flex_fset = bcm78800_a0_cna_6_5_32_3_0_unknown_l5_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_cna_6_5_32_3_0_vlan_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_cna_6_5_32_3_0_vlan_t_fget, + .flex_fset = bcm78800_a0_cna_6_5_32_3_0_vlan_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_cna_6_5_32_3_0_vxlan_t_field_info, + .reasons_info = NULL, + .flex_fget = bcm78800_a0_cna_6_5_32_3_0_vxlan_t_fget, + .flex_fset = bcm78800_a0_cna_6_5_32_3_0_vxlan_t_fset, + }, + { + .is_supported = TRUE, + .field_info = &bcm78800_a0_cna_6_5_32_3_0_rxpmd_flex_field_info, + .reasons_info = &bcm78800_a0_cna_6_5_32_3_0_rxpmd_flex_reasons_info, + .flex_common_fget = bcm78800_a0_rxpmd_flex_fget, + .flex_common_fset = bcm78800_a0_rxpmd_flex_fset, + }, +}; + +static shr_enum_map_t bcm78800_a0_cna_6_5_32_3_0_flexhdr_id_map[] = { + BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_FLEXHDR_NAME_MAP_INIT +}; + +shr_enum_map_t * bcm78800_a0_cna_6_5_32_3_0_flexhdr_map_get(void) +{ + return bcm78800_a0_cna_6_5_32_3_0_flexhdr_id_map; +} + +bcmpkt_flex_pmd_info_t * bcm78800_a0_cna_6_5_32_3_0_flex_pmd_info_get(uint32_t hid) +{ + if (hid >= BCM78800_A0_CNA_6_5_32_3_0_BCMPKT_FLEXHDR_COUNT) { + return NULL; + } + + return &bcm78800_a0_cna_6_5_32_3_0_flexhdr_info_list[hid]; +} + +int bcm78800_a0_cna_6_5_32_3_0_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = { + 7, + -1, + -1, + 26, +}; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/xfcr/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_bcmpkt_rxpmd_match_id.c similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_bcmpkt_rxpmd_match_id.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/xfcr/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_bcmpkt_rxpmd_match_id.c index 8b0c4df27fa..2449b44c5f8 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_bcmpkt_rxpmd_match_id.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/xfcr/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_bcmpkt_rxpmd_match_id.c @@ -6,8 +6,8 @@ * for device bcm78800_a0 and variant dna_6_5_32_3_0. * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -21,6 +21,7 @@ * * A copy of the GNU General Public License version 2 (GPLv2) can * be found in the LICENSES folder. + * All Rights Reserved.$ * * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser * diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_pkt_flexhdr.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/xfcr/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_pkt_flexhdr.c similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_pkt_flexhdr.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/xfcr/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_pkt_flexhdr.c index cfeb30066a4..8604e50cac4 100644 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_pkt_flexhdr.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/bcmpkt/xfcr/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_pkt_flexhdr.c @@ -6,8 +6,8 @@ * for device bcm78800_a0 and variant dna_6_5_32_3_0. * Edits to this file will be lost when it is regenerated. * - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * $Id: $ + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -21,6 +21,7 @@ * * A copy of the GNU General Public License version 2 (GPLv2) can * be found in the LICENSES folder. + * All Rights Reserved.$ * * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser * @@ -164,7 +165,7 @@ static void bcm78800_a0_dna_6_5_32_3_0_rxpmd_flex_reason_decode(uint32_t *data, BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7); } if (reason[12] & (0x1 << 8)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_DEFAULT_OR_IDEV_CONFIG_TO_CPU); + BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IDEV_CONFIG_TO_CPU); } if (reason[12] & (0x1 << 9)) { BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED); @@ -312,7 +313,7 @@ static void bcm78800_a0_dna_6_5_32_3_0_rxpmd_flex_reason_encode(bcmpkt_bitmap_t if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7)) { reason[12] |= (0x1 << 7); } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_DEFAULT_OR_IDEV_CONFIG_TO_CPU)) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_IDEV_CONFIG_TO_CPU)) { reason[12] |= (0x1 << 8); } if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_DNA_6_5_32_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED)) { diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/bcmgenl/Kbuild b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/bcmgenl/Kbuild new file mode 100644 index 00000000000..9f1edb67c0a --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/bcmgenl/Kbuild @@ -0,0 +1,39 @@ +# -*- Kbuild -*- +# +# Linux Generic Netlink module. +# +# Copyright 2018-2024 Broadcom. All rights reserved. +# The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License +# version 2 as published by the Free Software Foundation. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# A copy of the GNU General Public License version 2 (GPLv2) can +# be found in the LICENSES folder. +# +# Enable Kernel PMD +KNETCB_CPPFLAGS += -DKPMD + +obj-m := linux_bcmgenl.o + +ccflags-y := $(SDK_PMD_KFLAGS) $(LKM_CFLAGS) $(LKM_CPPFLAGS) \ + -I$(SDK)/shr/include \ + -I$(SDK)/bcmdrd/include \ + -I$(SDK)/bcmltd/include \ + -I$(SDK)/bcmlrd/include \ + -I$(SDK)/linux/include \ + -I$(SDK)/linux/include/kernel \ + -I$(SDK)/linux/knet/include \ + -I$(SDK)/linux/knet \ + -I$(SDK)/linux/bcmgenl + +linux_bcmgenl-y := $(SDK_PMD_KOBJS) \ + bcmgenl_packet.o \ + bcmgenl_psample.o \ + bcmgenl.o diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/bcmgenl/Makefile b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/bcmgenl/Makefile new file mode 100644 index 00000000000..f5f4740fc39 --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/bcmgenl/Makefile @@ -0,0 +1,54 @@ +# +# Copyright 2018-2024 Broadcom. All rights reserved. +# The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License +# version 2 as published by the Free Software Foundation. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# A copy of the GNU General Public License version 2 (GPLv2) can +# be found in the LICENSES folder. +# +# Linux KNET BCMGENL module. +# + +# Include PMD library by default +ifneq (0,$(KPMD)) + +# Kernel module source directory +KMODDIR = $(CURDIR) + +# Avoid creating links in original kernel module source directory +GENDIR = $(KMODDIR)/generated +ifneq ($(OUTPUT_DIR),) +GENDIR = $(OUTPUT_DIR)/knet/generated/bcmgenl +endif +bcmgenl: kpmd + $(MAKE) -C $(GENDIR) all + +# SDK make helper for stand-alone PMD kernel module +include $(SDK)/make/kpmd.mk + +distclean:: + rm -rf $(GENDIR) + +endif # KPMD + +include Kbuild + +ifeq ($(KERNELRELEASE),) + +MOD_NAME = linux_bcmgenl + +include $(SDK)/make/lkm.mk + +endif + +.PHONY: bcmgenl distclean + +distclean:: diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/bcmgenl/bcmgenl.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/bcmgenl/bcmgenl.c new file mode 100644 index 00000000000..38c81d13665 --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/bcmgenl/bcmgenl.c @@ -0,0 +1,810 @@ +/*! \file bcmgenl.c + * + * BCMGENL module entry. + * + */ +/* + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + */ + +#include +#include +#include +#include +#include +#include + +#ifdef KPMD +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#endif /* KPMD */ + +#include + +/*! \cond */ +MODULE_AUTHOR("Broadcom Corporation"); +MODULE_DESCRIPTION("BCMGENL Module"); +MODULE_LICENSE("GPL"); +/*! \endcond */ + +/*! driver proc entry root */ +static struct proc_dir_entry *bcmgenl_proc_root = NULL; + +#ifdef GENL_DEBUG +/*! \cond */ +static int debug = 0; +MODULE_PARAM(debug, int, 0); +MODULE_PARM_DESC(debug, "Debug level (default 0)"); +/*! \endcond */ +#endif /* GENL_DEBUG */ + +#ifndef KPMD +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ + BCMDRD_DEV_T_##_bd, +/*! Enumeration for all base device types. */ +typedef enum { + BCMDRD_DEV_T_NONE = 0, +/*! \cond */ +#include +/*! \endcond */ + BCMDRD_DEV_T_COUNT +} bcmdrd_dev_type_t; + +/*! Create enumeration values from list of supported variants. */ +#define BCMLRD_VARIANT_ENTRY(_bd,_bu,_va,_ve,_vu,_vv,_vo,_vd,_r0,_r1)\ + BCMLRD_VARIANT_T_##_bd##_##_ve, + +/*! Enumeration for all device variants. */ +typedef enum bcmlrd_variant_e { + BCMLRD_VARIANT_T_NONE = 0, +/*! \cond */ +#include +/*! \endcond */ + BCMLRD_VARIANT_T_COUNT +} bcmlrd_variant_t; +#endif /* !KPMD */ + +typedef struct ngknetcb_dev_s { + bool initialized; + bcmdrd_dev_type_t dev_type; + bcmlrd_variant_t var_type; +} ngknetcb_dev_t; + +static ngknetcb_dev_t cb_dev[NUM_PDMA_DEV_MAX]; + +#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ + {#_bd, BCMDRD_DEV_T_##_bd}, +static const struct { + char *name; + bcmdrd_dev_type_t dev; +} device_types[] = { + {"device_none", BCMDRD_DEV_T_NONE}, +#include + {"device_count", BCMDRD_DEV_T_COUNT} +}; + +#define BCMLRD_VARIANT_ENTRY(_bd,_bu,_va,_ve,_vu,_vv,_vo,_vd,_r0,_r1)\ + {#_bd, #_ve, BCMLRD_VARIANT_T_##_bd##_##_ve}, +static const struct { + char *dev_name; + char *var_name; + bcmlrd_variant_t var; +} variant_types[] = { + {"device_none", "variant_none", BCMLRD_VARIANT_T_NONE}, +#include + {"device_count", "variant_count", BCMLRD_VARIANT_T_COUNT} +}; + +#ifdef KPMD +/* + Change this structure to reflect the match_ids of interest. + This is an example of how it can be used. +*/ +typedef struct cb_match_id_s { + int egress_pkt_fwd_l2_hdr_etag; + int egress_pkt_fwd_l2_hdr_l2; + int ingress_pkt_inner_l2_hdr_l2; + int ingress_pkt_fwd_l2_hdr_etag; + int ingress_pkt_outer_l2_hdr_itag; + int ingress_pkt_outer_l2_hdr_otag; +} cb_match_id_t; + +static cb_match_id_t match_id; + +struct name_value_pair_s { + char *name; + int value; +}; + +static struct name_value_pair_s rxpmd_info[] = { + BCMPKT_RXPMD_FIELD_NAME_MAP_INIT +}; + +static const shr_enum_map_t reason_names[] = +{ + BCMPKT_REASON_NAME_MAP_INIT +}; + +static void +print_all_rxpmd_fields( + bcmdrd_dev_type_t dev_type, + const uint8_t *rxpmd) +{ + int rv, fid; + bcmpkt_rxpmd_fid_support_t support; + uint32_t val; + + printk("\n[RX metadata information]:\n"); + bcmpkt_rxpmd_fid_support_get(dev_type, &support); + + BCMPKT_RXPMD_FID_SUPPORT_ITER(support, fid) { + rv = bcmpkt_rxpmd_field_get + (dev_type, (uint32_t *)rxpmd, fid, &val); + if (rv == 0) { + printk(" %-26s = %10d [0x%X]\n", rxpmd_info[fid].name, val, val); + } + } +} + +static void +print_all_rxpmd_flex_fields( + bcmdrd_dev_type_t dev_type, + bcmlrd_variant_t var_type, + const uint8_t *rxpmd, + uint32_t *rxpmd_flex) +{ + int rv, fid; + int flex_profile = -1; + bcmpkt_flex_field_info_t rxpmd_flex_info; + uint32_t hid, val; + + rv = bcmpkt_rxpmd_field_get(dev_type, (uint32_t *)rxpmd, + BCMPKT_RXPMD_MPB_FLEX_DATA_TYPE, &val); + if (rv < 0) { + return; + } + flex_profile = (int)val; + + rv = bcmpkt_flexhdr_header_id_get(var_type, "RXPMD_FLEX_T", &hid); + if (rv < 0) { + return; + } + + rv = bcmpkt_flexhdr_field_info_get(var_type, hid, &rxpmd_flex_info); + if (rv < 0) { + return; + } + + printk("\n[RX metadata flex information]:\n"); + for (fid = BCMPKT_FID_INVALID + 1; fid < rxpmd_flex_info.num_fields; fid++) { + rv = bcmpkt_flexhdr_field_get(var_type, hid, rxpmd_flex, flex_profile, fid, &val); + if (rv == 0 && val != 0) { + printk(" %-34s = %10d [0x%X]\n", rxpmd_flex_info.info[fid].name, val, val); + } + } +} + +static void +print_all_rx_reason(bcmdrd_dev_type_t dev_type, uint32_t *rxpmd) +{ + int reason, rv; + bcmpkt_rx_reasons_t reasons; + + if (rxpmd) { + BCMPKT_RX_REASON_CLEAR_ALL(reasons); + rv = bcmpkt_rxpmd_reasons_get(dev_type, rxpmd, &reasons); + if (rv == 0) { + BCMPKT_RX_REASON_ITER(reasons, reason) { + printk(" %s\n", reason_names[reason].name); + } + } + } +} + +static void +print_all_rx_flex_reason(bcmlrd_variant_t variant, uint32_t *rxpmd_flex) +{ + int reason, reason_num = 0, rv; + bcmpkt_bitmap_t reasons; + char *name; + uint32_t val; + + if (rxpmd_flex == NULL) { + return; + } + + rv = bcmpkt_rxpmd_flex_reason_max_get(variant, &val); + if (rv < 0) { + return; + } + reason_num = (int)val; + + rv = bcmpkt_rxpmd_flex_reasons_get(variant, rxpmd_flex, &reasons); + if (rv == 0) { + for (reason = 0; reason < reason_num; reason++) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(reasons, reason)) { + rv = bcmpkt_rxpmd_flex_reason_name_get(variant, reason, &name); + if (!rv) { + printk(" %s\n", name); + } + } + } + } +} + +#endif /* KPMD */ + +#ifdef GENL_DEBUG +static void +dump_buffer(uint8_t *data, int size) +{ + const char *const to_hex = "0123456789ABCDEF"; + int i; + char buffer[128]; + char *buffer_ptr; + int addr = 0; + + buffer_ptr = buffer; + if (data && size != 0) { + for (i = 0; i < size; i++) { + *buffer_ptr++ = ' '; + *buffer_ptr++ = to_hex[(data[i] >> 4) & 0xF]; + *buffer_ptr++ = to_hex[data[i] & 0xF]; + if (((i % 16) == 15) || (i == size - 1)) { + *buffer_ptr = '\0'; + buffer_ptr = buffer; + printk(KERN_INFO "%04X %s\n", addr, buffer); + addr = i + 1; + } + } + } +} + +static void +dump_pmd(uint8_t *pmd, int len) +{ + if (debug & GENL_DBG_LVL_PDMP) { + printk(KERN_INFO "[PMD (%d bytes)]:\n", len); + dump_buffer(pmd, len); + } +} + +void dump_skb(struct sk_buff *skb) +{ + if (skb && (skb->len != 0)) { + printk(KERN_INFO "[SKB (%d bytes)]:\n", skb->len); + dump_buffer(skb->data, skb->len); + } +} + +void dump_bcmgenl_pkt(bcmgenl_pkt_t *bcmgenl_pkt) +{ + printk(KERN_INFO" %-20s = 0x%p\n", "Network namespace", bcmgenl_pkt->netns); + printk(KERN_INFO" %-20s = %d\n", "ing_pp_port", bcmgenl_pkt->meta.ing_pp_port); + printk(KERN_INFO" %-20s = %d\n", "src_port", bcmgenl_pkt->meta.src_port); + printk(KERN_INFO" %-20s = %d\n", "dst_port", bcmgenl_pkt->meta.dst_port); + printk(KERN_INFO" %-20s = %d\n", "dst_port_type", bcmgenl_pkt->meta.dst_port_type); + printk(KERN_INFO" %-20s = %d\n", "tag_status", bcmgenl_pkt->meta.tag_status); + printk(KERN_INFO" %-20s = 0x%x\n", "proto", bcmgenl_pkt->meta.proto); + printk(KERN_INFO" %-20s = %d\n", "vlan", bcmgenl_pkt->meta.vlan); + printk(KERN_INFO" %-20s = %s\n", "sample_type", + (bcmgenl_pkt->meta.sample_type == SAMPLE_TYPE_NONE ? "Not sampled" : + (bcmgenl_pkt->meta.sample_type == SAMPLE_TYPE_INGRESS ? + "Ingress sampled" : "Egress sampled"))); +} +#endif /* GENL_DEBUG */ + +/* + * The function get_tag_status() returns the tag status. + * 0 = Untagged + * 1 = Single inner-tag + * 2 = Single outer-tag + * 3 = Double tagged. + * -1 = Unsupported type + */ +static int +get_tag_status(uint32_t dev_type, uint32_t variant, void *rxpmd) +{ + int rv; + const char *tag_type[4] = { + "Untagged", + "Inner Tagged", + "Outer Tagged", + "Double Tagged" + }; + int tag_status = -1; + bcmpkt_rxpmd_fid_support_t support; + uint32_t val = 0; + + bcmpkt_rxpmd_fid_support_get(dev_type, &support); + + if (BCMPKT_RXPMD_FID_SUPPORT_GET(support, BCMPKT_RXPMD_ING_TAG_TYPE)) { + rv = bcmpkt_rxpmd_field_get(dev_type, (uint32_t *)rxpmd, + BCMPKT_RXPMD_ING_TAG_TYPE, &val); + /* Tomahawk4 family */ + + /* + * Indicates the incoming tag status (INCOMING_TAG_STATUS): + * For single tag device: + * 0: untagged, 1: tagged + * For double tag device: + * 0: untagged, 1: single inner-tag, 2: single outer-tag, 3: double tagged + */ + if (SHR_SUCCESS(rv)) { + tag_status = val; + } + } else if (BCMPKT_RXPMD_FID_SUPPORT_GET(support, BCMPKT_RXPMD_MATCH_ID_LO) && + BCMPKT_RXPMD_FID_SUPPORT_GET(support, BCMPKT_RXPMD_MATCH_ID_HI)) { + /* Trident4 family. */ + + uint32_t match_id_data[2]; + bool itag = false, otag = false; + + bcmpkt_rxpmd_field_get(dev_type, rxpmd, BCMPKT_RXPMD_MATCH_ID_LO, + &match_id_data[0]); + bcmpkt_rxpmd_field_get(dev_type, rxpmd, BCMPKT_RXPMD_MATCH_ID_HI, + &match_id_data[1]); + rv = bcmpkt_rxpmd_match_id_present(variant, match_id_data, 2, + match_id.ingress_pkt_outer_l2_hdr_itag); + if (SHR_SUCCESS(rv)) { + itag = true; + } + rv = bcmpkt_rxpmd_match_id_present(variant, match_id_data, 2, + match_id.ingress_pkt_outer_l2_hdr_otag); + if (SHR_SUCCESS(rv)) { + otag = true; + } + if (itag && otag) { + tag_status = 3; + } else if (itag) { + tag_status = 1; + } else if (otag) { + tag_status = 2; + } else { + tag_status = 0; + } + } +#ifdef GENL_DEBUG + if (debug & GENL_DBG_LVL_VERB) { + if (tag_status != -1) { + if (tag_status == 0) { + printk(" Incoming frame untagged\n"); + } else { + printk(" Incoming frame tagged: %s\n", tag_type[tag_status]); + } + } else { + printk(" Unsupported tag type\n"); + } + } +#endif /* GENL_DEBUG */ + return tag_status; +} + +static int +dstport_get(void *raw_hg_hdr) +{ + /* + * The bit positions of dest port field is fixed on TH4/TH5. + * directly use HIGIG2_DST_MODID_MGIDH & HIGIG2_DST_PORT_MGIDL to + * get dest port. + */ + int dstport = 0; + const HIGIG2_t *const higig2 = (HIGIG2_t *)raw_hg_hdr; + + if (HIGIG2_MCSTf_GET(*higig2)) { + dstport = 0; + } else { + dstport = (HIGIG2_DST_MODID_MGIDHf_GET(*higig2) << 8) | + HIGIG2_DST_PORT_MGIDLf_GET(*higig2); + } + return dstport; +} + +static int +dstport_type_get(void *raw_hg_hdr) +{ + /* + * The bit positions of multicast field is fixed on TH4/TH5. + * directly use HIGIG2_MCSTf_GET to get dest port. + */ + const HIGIG2_t *const higig2 = (HIGIG2_t *)raw_hg_hdr; + + if (HIGIG2_MCSTf_GET(*higig2)) { + return DSTPORT_TYPE_MC; + } + return DSTPORT_TYPE_NONE; +} + +static bool +is_cpu_port(uint32_t dev_id, uint32_t port) +{ + if (((dev_id == 0xb880) && (port == 160)) || + ((dev_id == 0xb780) && (port == 80)) || + ((dev_id == 0xb690) && (port == 80)) || + ((dev_id == 0xb890) && (port == 272)) || + ((dev_id == 0xf800) && (port == 176))) { + /* + * SYSTEM_DESTINATION_15_0 = 0 is reserved and not used for CPU port on + * Trident 4/5 families. + * e.g TD4X11 map system port of CPU to {modid : 160} + */ + return true; + } + return false; +} + +int +bcmgenl_pkt_package( + int dev, + struct sk_buff *skb, + bcmgenl_info_t *bcmgenl_info, + bcmgenl_pkt_t *bcmgenl_pkt) +{ + int unit, rv, rv2; + struct ngknet_callback_desc *cbd; + uint8_t *pkt; + uint32_t dev_type = 0; + bcmlrd_variant_t var_type; + uint32_t *rxpmd = NULL; + uint32_t *rxpmd_flex = NULL; + uint32_t rxpmd_flex_len = 0; + uint32_t hid, val = 0; + int flex_profile = -1; + int fid; + uint32_t *mh = NULL; + int reason, reason_num = 0; + bcmpkt_bitmap_t reasons; + bcmpkt_rx_reasons_t rx_reasons; + char *name; + + if (!skb || !bcmgenl_info || !bcmgenl_pkt) { + return SHR_E_PARAM; + } + cbd = NGKNET_SKB_CB(skb); + unit = cbd->dinfo->dev_no; + pkt = cbd->pmd + cbd->pmd_len; + rxpmd = (uint32_t *)cbd->pmd; + + memset(&bcmgenl_pkt->meta, 0, sizeof(bcmgenl_packet_meta_t)); + + bcmgenl_pkt->meta.proto = (uint16_t) ((pkt[12] << 8) | pkt[13]); + bcmgenl_pkt->meta.vlan = (uint16_t) ((pkt[14] << 8) | pkt[15]); + + bcmgenl_pkt->netns = bcmgenl_info->netns; + + if (cb_dev[unit].initialized) { +#ifdef KPMD + dev_type = cb_dev[unit].dev_type; + var_type = cb_dev[unit].var_type; + + /* Get tag status */ + bcmgenl_pkt->meta.tag_status = get_tag_status(dev_type, var_type, (void *)rxpmd); + + /* Get sampling reason */ + BCMPKT_RX_REASON_CLEAR_ALL(reasons); + rv = bcmpkt_rxpmd_reasons_get(dev_type, rxpmd, &rx_reasons); + bcmgenl_pkt->meta.sample_type = SAMPLE_TYPE_NONE; + if (SHR_SUCCESS(rv)) { + if ((BCMPKT_RX_REASON_GET(rx_reasons, BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_SRC)) || + (BCMPKT_RX_REASON_GET(rx_reasons, BCMPKT_RX_REASON_CPU_SFLOW_SRC))){ + bcmgenl_pkt->meta.sample_type = SAMPLE_TYPE_INGRESS; + } else if ((BCMPKT_RX_REASON_GET(rx_reasons, BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_DST)) || + (BCMPKT_RX_REASON_GET(rx_reasons, BCMPKT_RX_REASON_CPU_SFLOW_DST))) { + bcmgenl_pkt->meta.sample_type = SAMPLE_TYPE_EGRESS; + } + } + + /* Get Module header's pointer */ + rv = bcmpkt_rxpmd_mh_get(dev_type, rxpmd, &mh); + if (SHR_SUCCESS(rv)) { + /* Get dst_port and dst_port_type */ + bcmgenl_pkt->meta.dst_port = dstport_get((void *)mh); + bcmgenl_pkt->meta.dst_port_type = dstport_type_get((void *)mh); + } + + /* Get src port */ + rv = bcmpkt_rxpmd_field_get + (dev_type, rxpmd, BCMPKT_RXPMD_SRC_PORT_NUM, &val); + if (SHR_SUCCESS(rv)) { + bcmgenl_pkt->meta.src_port = val; + } + rv = bcmpkt_rxpmd_flexdata_get + (dev_type, rxpmd, &rxpmd_flex, &rxpmd_flex_len); + if (SHR_FAILURE(rv) && (rv != SHR_E_UNAVAIL)) { + GENL_DBG_VERB("Failed to detect RXPMD_FLEX.\n"); + } else { + if (rxpmd_flex_len) { + /* Get sampling reason from flex reasons */ + rv = bcmpkt_rxpmd_flex_reason_max_get(var_type, &val); + rv2 = bcmpkt_rxpmd_flex_reasons_get(var_type, rxpmd_flex, &reasons); + if (SHR_SUCCESS(rv) || SHR_SUCCESS(rv2)) { + bcmgenl_pkt->meta.sample_type = SAMPLE_TYPE_NONE; + reason_num = (int)val; + for (reason = 0; reason < reason_num; reason++) { + if (BCMPKT_RXPMD_FLEX_REASON_GET(reasons, reason)) { + rv = bcmpkt_rxpmd_flex_reason_name_get(var_type, reason, &name); + if (SHR_SUCCESS(rv)) { + if (strcmp(name, "MIRROR_SAMPLER_SAMPLED") == 0) { + bcmgenl_pkt->meta.sample_type = SAMPLE_TYPE_INGRESS; + break; + } else if (strcmp(name, "MIRROR_SAMPLER_EGR_SAMPLED") == 0) { + bcmgenl_pkt->meta.sample_type = SAMPLE_TYPE_EGRESS; + break; + } + } + } + } + } + + /* Get hid of RXPMD_FLEX_T */ + if (bcmpkt_flexhdr_header_id_get(var_type, + "RXPMD_FLEX_T", &hid)) { + rv = SHR_E_UNAVAIL; + } + + if (SHR_FAILURE(rv) || + bcmpkt_rxpmd_field_get(dev_type, (uint32_t *)rxpmd, + BCMPKT_RXPMD_MPB_FLEX_DATA_TYPE, &val)) { + rv = SHR_E_UNAVAIL; + } + flex_profile = (int)val; + + rv2 = SHR_E_NONE; + /* Get fid of INGRESS_PP_PORT_7_0 */ + if (SHR_FAILURE(rv) || + bcmpkt_flexhdr_field_id_get(var_type, hid, + "INGRESS_PP_PORT_7_0", + &fid) || + bcmpkt_flexhdr_field_get(var_type, hid, + rxpmd_flex, + flex_profile, + fid, &val)) { + rv2 = SHR_E_UNAVAIL; + } + if (SHR_SUCCESS(rv) || SHR_SUCCESS(rv2)) { + bcmgenl_pkt->meta.ing_pp_port = val; + } + + /* Get dst_port and dst_port_type */ + rv2 = bcmpkt_rxpmd_field_get + (dev_type, rxpmd, BCMPKT_RXPMD_MULTICAST, &val); + if (SHR_SUCCESS(rv2)) { + bcmgenl_pkt->meta.dst_port_type = + (val == 1 ? DSTPORT_TYPE_MC : DSTPORT_TYPE_NONE); + } + if (bcmgenl_pkt->meta.dst_port_type == DSTPORT_TYPE_MC) { + bcmgenl_pkt->meta.dst_port = 0; + } else { + rv2 = SHR_E_NONE; + /* Get fid of SYSTEM_DESTINATION_15_0 */ + if (SHR_FAILURE(rv) || + bcmpkt_flexhdr_field_id_get(var_type, hid, + "SYSTEM_DESTINATION_15_0", + &fid) || + bcmpkt_flexhdr_field_get(var_type, hid, + rxpmd_flex, + flex_profile, + fid, &val)) { + rv2 = SHR_E_UNAVAIL; + } + if (SHR_SUCCESS(rv) || SHR_SUCCESS(rv2)) { + if (is_cpu_port(cbd->dinfo->dev_id, val)) { + val = 0; + } + bcmgenl_pkt->meta.dst_port = val; + } + } + + rv2 = SHR_E_NONE; + /* Get fid of ING_TIMESTAMP_31_0 */ + if (SHR_FAILURE(rv) || + bcmpkt_flexhdr_field_id_get(var_type, hid, + "ING_TIMESTAMP_31_0", + &fid) || + bcmpkt_flexhdr_field_get(var_type, hid, + rxpmd_flex, + flex_profile, + fid, &val)) { + rv2 = SHR_E_UNAVAIL; + } + if (SHR_SUCCESS(rv) || SHR_SUCCESS(rv2)) { + bcmgenl_pkt->meta.timestamp = val; + } + } + } +#endif /* KPMD */ + } +#ifdef GENL_DEBUG + if (debug & GENL_DBG_LVL_PDMP) { + if (cb_dev[unit].initialized) { + printk("bcmgenl_pkt_package for dev %d:", cbd->dinfo->dev_no); + printk("type_str:%s dev_id: 0x%x variant: %s\n", + cbd->dinfo->type_str, cbd->dinfo->dev_id, variant_types[var_type].var_name); + printk("dev_type: %d\n", dev_type); + printk("variant: %d\n", var_type); + + print_all_rxpmd_fields(dev_type, (void *)rxpmd); + if (rxpmd_flex_len) { + print_all_rxpmd_flex_fields(dev_type, var_type, (void *)rxpmd, rxpmd_flex); + printk("\n[RX flex reasons]:\n"); + print_all_rx_flex_reason(var_type, rxpmd_flex); + } else { + printk("\n[RX reasons]:\n"); + print_all_rx_reason(dev_type, (void *)rxpmd); + } + + if (cbd->pmd_len != 0) { + dump_pmd(cbd->pmd, cbd->pmd_len); + } + printk("\n[Packet raw data (%d)]:\n", cbd->pkt_len); + dump_buffer(pkt, cbd->pkt_len); + } + dump_bcmgenl_pkt(bcmgenl_pkt); + } +#endif /* GENL_DEBUG */ + return SHR_E_NONE; +} + +#ifdef KPMD +/* + Initialize the desired match_ids for use later in the code. +*/ +static void +init_match_ids(int unit) +{ + uint32_t val; + + match_id.egress_pkt_fwd_l2_hdr_etag = -1; + match_id.egress_pkt_fwd_l2_hdr_l2 = -1; + match_id.ingress_pkt_inner_l2_hdr_l2 = -1; + match_id.ingress_pkt_fwd_l2_hdr_etag = -1; + match_id.ingress_pkt_outer_l2_hdr_itag = -1; + match_id.ingress_pkt_outer_l2_hdr_otag = -1; + if (bcmpkt_rxpmd_match_id_get(cb_dev[unit].var_type, + "EGRESS_PKT_FWD_L2_HDR_ETAG", &val) == 0) { + match_id.egress_pkt_fwd_l2_hdr_etag = val; + GENL_DBG_VERB("EGRESS_PKT_FWD_L2_HDR_ETAG: %d\n", val); + } + if (bcmpkt_rxpmd_match_id_get(cb_dev[unit].var_type, + "EGRESS_PKT_FWD_L2_HDR_L2", &val) == 0) { + match_id.egress_pkt_fwd_l2_hdr_l2 = val; + GENL_DBG_VERB("EGRESS_PKT_FWD_L2_HDR_L2: %d\n", val); + } + if (bcmpkt_rxpmd_match_id_get(cb_dev[unit].var_type, + "INGRESS_PKT_INNER_L2_HDR_L2", &val) == 0) { + match_id.ingress_pkt_inner_l2_hdr_l2 = val; + GENL_DBG_VERB("INGRESS_PKT_INNER_L2_HDR_L2: %d\n", val); + } + if (bcmpkt_rxpmd_match_id_get(cb_dev[unit].var_type, + "INGRESS_PKT_FWD_L2_HDR_ETAG", &val) == 0) { + match_id.ingress_pkt_fwd_l2_hdr_etag = val; + GENL_DBG_VERB("INGRESS_PKT_FWD_L2_HDR_ETAG: %d\n", val); + } + if (bcmpkt_rxpmd_match_id_get(cb_dev[unit].var_type, + "INGRESS_PKT_OUTER_L2_HDR_ITAG", &val) == 0) { + match_id.ingress_pkt_outer_l2_hdr_itag = val; + GENL_DBG_VERB("INGRESS_PKT_OUTER_L2_HDR_ITAG: %d\n", val); + } + if (bcmpkt_rxpmd_match_id_get(cb_dev[unit].var_type, + "INGRESS_PKT_OUTER_L2_HDR_OTAG", &val) == 0) { + match_id.ingress_pkt_outer_l2_hdr_otag = val; + GENL_DBG_VERB("INGRESS_PKT_OUTER_L2_HDR_OTAG: %d\n", val); + } +} +#endif /* KPMD */ + +/*! + * \brief Device Initialization Callback. + * + * The device initialization callback allows an external module to + * perform device-specific initialization in preparation for Tx and Rx + * packet processing. + * + * \param [in] dinfo Device information. + * + */ +static void +init_cb(ngknet_dev_info_t *dinfo) +{ + int unit; + bcmdrd_dev_type_t dt; + bcmlrd_variant_t var; + unit = dinfo->dev_no; + + if ((unsigned int)unit >= NUM_PDMA_DEV_MAX) { + return; + } + + for (dt = 0; dt < BCMDRD_DEV_T_COUNT; dt++) { + if (!strcasecmp(dinfo->type_str, device_types[dt].name)) { + cb_dev[unit].dev_type = dt; + break; + } + } + + for (var = 0; var < BCMLRD_VARIANT_T_COUNT; var++) { + if ((!strcasecmp(dinfo->type_str, variant_types[var].dev_name)) && + (!strcasecmp(dinfo->var_str, variant_types[var].var_name))) { + cb_dev[unit].var_type = var; + break; + } + } +#ifdef GENL_DEBUG + if (debug & GENL_DBG_LVL_VERB) { + printk("init_cb unit %d, dev %s dev_id: 0x%x variant %s\n", + dinfo->dev_no, dinfo->type_str, dinfo->dev_id, dinfo->var_str); + printk("dev_type: %d\n", cb_dev[unit].dev_type); + printk("variant: %d\n", cb_dev[unit].var_type); + } +#endif /* GENL_DEBUG */ + cb_dev[unit].initialized = true; +#ifdef KPMD + init_match_ids(unit); +#endif /* KPMD */ +} + +static int +bcmgenl_proc_cleanup(void) +{ + remove_proc_entry(BCMGENL_PROCFS_PATH, NULL); + remove_proc_entry(BCM_PROCFS_NAME, NULL); + return 0; +} + +static int +bcmgenl_proc_init(void) +{ + /* initialize proc files (for bcmgenl) */ + proc_mkdir(BCM_PROCFS_NAME, NULL); + bcmgenl_proc_root = proc_mkdir(BCMGENL_PROCFS_PATH, NULL); + return 0; +} + +static int __init +bcmgenl_init_module(void) +{ + ngknet_dev_init_cb_register(init_cb); + + bcmgenl_proc_init(); +#if 0 + bcmgenl_packet_init(); +#endif + bcmgenl_psample_init(); + + return 0; +} + +static void __exit +bcmgenl_exit_module(void) +{ + ngknet_dev_init_cb_unregister(init_cb); +#if 0 + bcmgenl_packet_cleanup(); +#endif + bcmgenl_psample_cleanup(); + bcmgenl_proc_cleanup(); +} + +module_init(bcmgenl_init_module); +module_exit(bcmgenl_exit_module); diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/bcmgenl/bcmgenl.h similarity index 97% rename from platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/bcmgenl/bcmgenl.h index 09da8a09f95..f91cdc6c250 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/bcmgenl/bcmgenl.h @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -34,9 +33,11 @@ /*! Module information */ #define BCMGENL_MODULE_NAME "linux_bcmgenl" +/*! Use similar path to SDK6 genl psample path */ #define BCM_PROCFS_NAME "bcm" #define BCMGENL_PROCFS_NAME "genl" #define BCMGENL_PROCFS_PATH (BCM_PROCFS_NAME "/" BCMGENL_PROCFS_NAME) + /*! set GENL_DEBUG for debug info */ #define GENL_DEBUG #define GENL_DBG_LVL_VERB 0x0001 @@ -89,12 +90,8 @@ typedef struct { /*! Sampling type */ #define SAMPLE_TYPE_NONE 0 -/*! Ingress */ #define SAMPLE_TYPE_INGRESS 1 -/*! Egress */ #define SAMPLE_TYPE_EGRESS 2 -/*! Ingress or Egress */ -#define SAMPLE_TYPE_INGEGR 3 /*! generic netlink packet metadata */ typedef struct bcmgenl_packet_meta_s { diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl_packet.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/bcmgenl/bcmgenl_packet.c similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl_packet.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/bcmgenl/bcmgenl_packet.c index 66cf15af5f3..9a1a03bc573 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl_packet.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/bcmgenl/bcmgenl_packet.c @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -810,13 +809,10 @@ int bcmgenl_packet_cleanup(void) int bcmgenl_packet_init(void) { - ngknet_filter_cb_attr_t fcb_attr; - ngknet_netif_create_cb_register(bcmgenl_packet_netif_create_cb); ngknet_netif_destroy_cb_register(bcmgenl_packet_netif_destroy_cb); - memset(&fcb_attr, 0, sizeof(fcb_attr)); - fcb_attr.name = BCMGENL_PACKET_NAME; - ngknet_filter_cb_attr_register(bcmgenl_packet_filter_cb, &fcb_attr); + ngknet_filter_cb_register_by_name + (bcmgenl_packet_filter_cb, BCMGENL_PACKET_NAME); genl_cb_proc_init(); return genl_cb_init(); diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl_packet.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/bcmgenl/bcmgenl_packet.h similarity index 93% rename from platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl_packet.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/bcmgenl/bcmgenl_packet.h index 70e159c4671..b403ca40c54 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl_packet.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/bcmgenl/bcmgenl_packet.h @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl_psample.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/bcmgenl/bcmgenl_psample.c similarity index 88% rename from platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl_psample.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/bcmgenl/bcmgenl_psample.c index db8a10cf49e..70a8a5897b5 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl_psample.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/bcmgenl/bcmgenl_psample.c @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -51,7 +50,7 @@ static int debug; #define FCS_SZ 4 #define PSAMPLE_PKT_HANDLED (1) - +/* These below need to match incoming enum values */ #define PSAMPLE_FILTER_TAG_STRIP 0 #define PSAMPLE_FILTER_TAG_KEEP 1 #define PSAMPLE_FILTER_TAG_ORIGINAL 2 @@ -68,15 +67,7 @@ static int bcmgenl_psample_qlen = BCMGENL_PSAMPLE_QLEN_DFLT; MODULE_PARAM(bcmgenl_psample_qlen, int, 0); MODULE_PARM_DESC(bcmgenl_psample_qlen, "psample queue length (default 1024 buffers)"); -#ifndef BCMGENL_PSAMPLE_METADATA #if (LINUX_VERSION_CODE >= KERNEL_VERSION(5,13,0)) -#define BCMGENL_PSAMPLE_METADATA 1 -#else -#define BCMGENL_PSAMPLE_METADATA 0 -#endif -#endif - -#if BCMGENL_PSAMPLE_METADATA static inline void bcmgenl_sample_packet(struct psample_group *group, struct sk_buff *skb, u32 trunc_size, int in_ifindex, int out_ifindex, @@ -91,7 +82,7 @@ bcmgenl_sample_packet(struct psample_group *group, struct sk_buff *skb, } #else #define bcmgenl_sample_packet psample_sample_packet -#endif /* BCMGENL_PSAMPLE_METADATA */ +#endif /* (LINUX_VERSION_CODE >= KERNEL_VERSION(5,13,0)) */ static bcmgenl_info_t g_bcmgenl_psample_info = {{0}}; @@ -144,18 +135,6 @@ typedef struct bcmgenl_psample_work_s { } bcmgenl_psample_work_t; static bcmgenl_psample_work_t g_bcmgenl_psample_work = {{0}}; -typedef struct bcmgenl_psample_filter_group_s { - struct list_head list; - int filter_id; - struct psample_group *group; -} bcmgenl_psample_filter_group_t; - -typedef struct bcmgenl_psample_filter_group_data_s { - struct list_head list; - spinlock_t lock; -} bcmgenl_psample_filter_group_data_t; -static bcmgenl_psample_filter_group_data_t g_bcmgenl_psample_fltgrp_data; - /* driver proc entry root */ static struct proc_dir_entry *psample_proc_root = NULL; @@ -201,78 +180,6 @@ psample_netif_lookup_by_port(int port) return (NULL); } -static int -psample_add_filter_group_to_list(int filter_id, struct psample_group *group) -{ - struct list_head *list_ptr; - bcmgenl_psample_filter_group_t *fltgrp; - unsigned long flags; - - /* Sanity check */ - spin_lock_irqsave(&g_bcmgenl_psample_fltgrp_data.lock, flags); - list_for_each(list_ptr, &g_bcmgenl_psample_fltgrp_data.list) { - fltgrp = list_entry(list_ptr, bcmgenl_psample_filter_group_t, list); - if (fltgrp->filter_id == filter_id) { - spin_unlock_irqrestore(&g_bcmgenl_psample_fltgrp_data.lock, flags); - return -1; - } - } - spin_unlock_irqrestore(&g_bcmgenl_psample_fltgrp_data.lock, flags); - - if ((fltgrp = kmalloc(sizeof(*fltgrp), GFP_ATOMIC)) == NULL) { - return -1; - } - memset(fltgrp, 0, sizeof(*fltgrp)); - fltgrp->filter_id = filter_id; - fltgrp->group = group; - spin_lock_irqsave(&g_bcmgenl_psample_fltgrp_data.lock, flags); - list_add_tail(&fltgrp->list, &g_bcmgenl_psample_fltgrp_data.list); - spin_unlock_irqrestore(&g_bcmgenl_psample_fltgrp_data.lock, flags); - - return 0; -} - -static struct psample_group * -psample_del_filter_group_from_list(int filter_id) -{ - struct list_head *list_ptr, *list_ptr2; - bcmgenl_psample_filter_group_t *fltgrp; - struct psample_group *group = NULL; - unsigned long flags; - - spin_lock_irqsave(&g_bcmgenl_psample_fltgrp_data.lock, flags); - list_for_each_safe(list_ptr, list_ptr2, &g_bcmgenl_psample_fltgrp_data.list) { - fltgrp = list_entry(list_ptr, bcmgenl_psample_filter_group_t, list); - if (fltgrp->filter_id == filter_id) { - list_del(&fltgrp->list); - group = fltgrp->group; - kfree(fltgrp); - break; - } - } - spin_unlock_irqrestore(&g_bcmgenl_psample_fltgrp_data.lock, flags); - return group; -} - -static struct psample_group * -psample_get_filter_group_from_list(int filter_id) -{ - struct list_head *list_ptr; - bcmgenl_psample_filter_group_t *fltgrp; - unsigned long flags; - - spin_lock_irqsave(&g_bcmgenl_psample_fltgrp_data.lock, flags); - list_for_each(list_ptr, &g_bcmgenl_psample_fltgrp_data.list) { - fltgrp = list_entry(list_ptr, bcmgenl_psample_filter_group_t, list); - if (fltgrp->filter_id == filter_id) { - spin_unlock_irqrestore(&g_bcmgenl_psample_fltgrp_data.lock, flags); - return fltgrp->group; - } - } - spin_unlock_irqrestore(&g_bcmgenl_psample_fltgrp_data.lock, flags); - return NULL; -} - static int bcmgenl_psample_meta_get(struct sk_buff *skb, bcmgenl_pkt_t *bcmgenl_pkt, psample_meta_t *sflow_meta) { @@ -337,9 +244,7 @@ bcmgenl_psample_meta_get(struct sk_buff *skb, bcmgenl_pkt_t *bcmgenl_pkt, psampl ("Sample type %s", (bcmgenl_pkt->meta.sample_type == SAMPLE_TYPE_NONE ? "Not sampled" : bcmgenl_pkt->meta.sample_type == SAMPLE_TYPE_INGRESS ? - "Ingress sampled" : - bcmgenl_pkt->meta.sample_type == SAMPLE_TYPE_EGRESS ? - "Egress sampled" : "Ingress or egress sampled")); + "Ingress sampled" : "Egress sampled")); GENL_DBG_VERB ("%s: srcport %d, dstport %d, src_ifindex %d, dst_ifindex %d\n", __func__, srcport, dstport, src_ifindex, dst_ifindex); @@ -353,35 +258,6 @@ bcmgenl_psample_meta_get(struct sk_buff *skb, bcmgenl_pkt_t *bcmgenl_pkt, psampl return (0); } -static int -bcmgenl_psample_filter_create_cb(ngknet_filter_t *filt) -{ - struct psample_group *group; - - /* get psample group info. psample genetlink group ID passed in match_filt->dest_id */ - group = psample_group_get(g_bcmgenl_psample_info.netns, filt->dest_id); - if (group == NULL) { - return -1; - } - return psample_add_filter_group_to_list(filt->id, group); -} - -static int -bcmgenl_psample_filter_destroy_cb(ngknet_filter_t *filt) -{ - struct psample_group *group; - - /* Ensure all packets in queue are sent. */ - flush_work(&g_bcmgenl_psample_work.wq); - - group = psample_del_filter_group_from_list(filt->id); - if (group == NULL) { - return -1; - } - psample_group_put(group); - return 0; -} - static struct sk_buff * bcmgenl_psample_filter_cb(struct sk_buff *skb, ngknet_filter_t **filt) { @@ -439,7 +315,7 @@ bcmgenl_psample_filter_cb(struct sk_buff *skb, ngknet_filter_t **filt) } /* get psample group info. psample genetlink group ID passed in match_filt->dest_id */ - group = psample_get_filter_group_from_list(match_filt->id); + group = psample_group_get(g_bcmgenl_psample_info.netns, match_filt->dest_id); if (!group) { printk("%s: Could not find psample genetlink group %d\n", __func__, match_filt->dest_id); g_bcmgenl_psample_stats.pkts_d_no_group++; @@ -1167,7 +1043,6 @@ static int psample_cb_cleanup(void) { psample_pkt_t *pkt; - bcmgenl_psample_filter_group_t *fltgrp; cancel_work_sync(&g_bcmgenl_psample_work.wq); @@ -1179,14 +1054,6 @@ psample_cb_cleanup(void) kfree(pkt); } - while (!list_empty(&g_bcmgenl_psample_fltgrp_data.list)) { - fltgrp = list_entry(g_bcmgenl_psample_fltgrp_data.list.next, - bcmgenl_psample_filter_group_t, list); - list_del(&fltgrp->list); - psample_group_put(fltgrp->group); - kfree(fltgrp); - } - return 0; } @@ -1207,10 +1074,6 @@ psample_cb_init(void) INIT_LIST_HEAD(&g_bcmgenl_psample_work.pkt_list); INIT_WORK(&g_bcmgenl_psample_work.wq, bcmgenl_psample_task); - /* setup psample filter group */ - INIT_LIST_HEAD(&g_bcmgenl_psample_fltgrp_data.list); - spin_lock_init(&g_bcmgenl_psample_fltgrp_data.lock); - /* get net namespace */ g_bcmgenl_psample_info.netns = get_net_ns_by_pid(current->pid); if (!g_bcmgenl_psample_info.netns) { @@ -1237,15 +1100,10 @@ int bcmgenl_psample_cleanup(void) int bcmgenl_psample_init(void) { - ngknet_filter_cb_attr_t fcb_attr; - ngknet_netif_create_cb_register(bcmgenl_psample_netif_create_cb); ngknet_netif_destroy_cb_register(bcmgenl_psample_netif_destroy_cb); - memset(&fcb_attr, 0, sizeof(fcb_attr)); - fcb_attr.name = BCMGENL_PSAMPLE_NAME; - fcb_attr.create_cb = bcmgenl_psample_filter_create_cb; - fcb_attr.destroy_cb = bcmgenl_psample_filter_destroy_cb; - ngknet_filter_cb_attr_register(bcmgenl_psample_filter_cb, &fcb_attr); + ngknet_filter_cb_register_by_name + (bcmgenl_psample_filter_cb, BCMGENL_PSAMPLE_NAME); psample_cb_proc_init(); return psample_cb_init(); } diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl_psample.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/bcmgenl/bcmgenl_psample.h similarity index 94% rename from platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl_psample.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/bcmgenl/bcmgenl_psample.h index 1aa62e34fe1..43f8ba9ae9a 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl_psample.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/bcmgenl/bcmgenl_psample.h @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/bde/Kbuild b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/bde/Kbuild new file mode 100644 index 00000000000..368cef2e776 --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/bde/Kbuild @@ -0,0 +1,45 @@ +# -*- Kbuild -*- +# +# Linux kernel BDE module. +# +# The BDE_CPPFLAGS variable is intended for configuring non-default +# builds of the NGBDE kernel module, for example, using a different +# default DMA pool size or turning off MSI interrupts. +# +# Copyright 2018-2024 Broadcom. All rights reserved. +# The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License +# version 2 as published by the Free Software Foundation. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# A copy of the GNU General Public License version 2 (GPLv2) can +# be found in the LICENSES folder. +# + +obj-m := linux_ngbde.o + +ccflags-y := $(BDE_CPPFLAGS) $(LKM_CFLAGS) $(LKM_CPPFLAGS) \ + $(LKM_BUILD_INFO) \ + -I$(SDK)/linux/include \ + -I$(SDK)/linux/bde \ + -I$(SDK)/bcmdrd/include + +linux_ngbde-y := ngbde_main.o \ + ngbde_kapi.o \ + ngbde_ioctl.o \ + ngbde_procfs.o \ + ngbde_pio.o \ + ngbde_iio.o \ + ngbde_paxb.o \ + ngbde_dma.o \ + ngbde_intr.o \ + ngbde_pgmem.o \ + ngbde_pci_probe.o \ + ngbde_iproc_probe.o \ + ngbde_swdev.o diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/bde/Makefile b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/bde/Makefile new file mode 100644 index 00000000000..8c60bc94caf --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/bde/Makefile @@ -0,0 +1,32 @@ +# +# Copyright 2018-2024 Broadcom. All rights reserved. +# The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License +# version 2 as published by the Free Software Foundation. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# A copy of the GNU General Public License version 2 (GPLv2) can +# be found in the LICENSES folder. +# +# Linux kernel BDE module. +# + +include Kbuild + +ifeq ($(KERNELRELEASE),) + +MOD_NAME = linux_ngbde + +include $(SDK)/make/lkm.mk + +endif + +.PHONY: distclean + +distclean:: diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/bde/ngbde.h similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/bde/ngbde.h index c41fb8c395b..b4f18f7c2e0 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/bde/ngbde.h @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -363,9 +362,6 @@ struct ngbde_dev_s { /*! Additional device identification when primary ID is not unique. */ uint16_t model; - /*! Domain number (typically PCI domain number). */ - int domain_no; - /*! Bus number (typically PCI bus number). */ int bus_no; diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_dma.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/bde/ngbde_dma.c similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_dma.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/bde/ngbde_dma.c index 66816aad609..839db3cb8e3 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_dma.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/bde/ngbde_dma.c @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_iio.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/bde/ngbde_iio.c similarity index 97% rename from platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_iio.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/bde/ngbde_iio.c index fb9a6707ad1..762c25f144f 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_iio.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/bde/ngbde_iio.c @@ -5,8 +5,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_intr.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/bde/ngbde_intr.c similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_intr.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/bde/ngbde_intr.c index c54f08611d2..afd0d974a97 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_intr.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/bde/ngbde_intr.c @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_ioctl.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/bde/ngbde_ioctl.c similarity index 91% rename from platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_ioctl.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/bde/ngbde_ioctl.c index e7aa906eb2d..0c8482c9d77 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_ioctl.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/bde/ngbde_ioctl.c @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -60,18 +59,6 @@ ngbde_ioctl(struct file *file, unsigned int cmd, unsigned long arg) ioc.rc = NGBDE_IOC_FAIL; break; } - ioc.op.dev_info.device_type = 0; - ioc.op.dev_info.bus_type = NGBDE_DEV_BT_AXI; - if (swdev->pci_dev) { - ioc.op.dev_info.bus_type = NGBDE_DEV_BT_PCI; - } - ioc.op.dev_info.flags = 0; - if (swdev->use_msi) { - ioc.op.dev_info.flags |= NGBDE_DEV_F_MSI; - } - if (swdev->inactive) { - ioc.op.dev_info.flags |= NGBDE_DEV_F_INACTIVE; - } ioc.op.dev_info.vendor_id = swdev->vendor_id; ioc.op.dev_info.device_id = swdev->device_id; ioc.op.dev_info.revision = swdev->revision; @@ -271,17 +258,6 @@ ngbde_ioctl(struct file *file, unsigned int cmd, unsigned long arg) ioc.rc = NGBDE_IOC_FAIL; } break; - case NGBDE_IOC_SLOT_INFO: - swdev = ngbde_swdev_get(ioc.devid); - if (!swdev) { - ioc.rc = NGBDE_IOC_FAIL; - break; - } - ioc.op.slot_info.domain_no = swdev->domain_no; - ioc.op.slot_info.bus_no = swdev->bus_no; - ioc.op.slot_info.slot_no = swdev->slot_no; - ioc.op.slot_info.func_no = 0; /* unused */ - break; default: printk(KERN_ERR "ngbde: invalid ioctl (%08x)\n", cmd); ioc.rc = NGBDE_IOC_FAIL; diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_iproc_probe.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/bde/ngbde_iproc_probe.c similarity index 98% rename from platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_iproc_probe.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/bde/ngbde_iproc_probe.c index 549923a583e..1f1a5fb1558 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_iproc_probe.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/bde/ngbde_iproc_probe.c @@ -8,8 +8,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_kapi.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/bde/ngbde_kapi.c similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_kapi.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/bde/ngbde_kapi.c index 84690f54350..fed0d9b2a3d 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_kapi.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/bde/ngbde_kapi.c @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_main.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/bde/ngbde_main.c similarity index 98% rename from platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_main.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/bde/ngbde_main.c index 4b13267429f..bc6895072cb 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_main.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/bde/ngbde_main.c @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -249,7 +248,7 @@ static struct file_operations fops = { * * \return Nothing. */ -static void __exit +void __exit ngbde_exit_module(void) { ngbde_intr_cleanup(); @@ -269,7 +268,7 @@ ngbde_exit_module(void) * * \return Nothing. */ -static int __init +int __init ngbde_init_module(void) { int rv; diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_paxb.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/bde/ngbde_paxb.c similarity index 97% rename from platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_paxb.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/bde/ngbde_paxb.c index e7ffb1a95dd..d3a557d2d63 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_paxb.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/bde/ngbde_paxb.c @@ -5,8 +5,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_pci_probe.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/bde/ngbde_pci_probe.c similarity index 91% rename from platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_pci_probe.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/bde/ngbde_pci_probe.c index a1cf4b133d5..5fdd71ba56a 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_pci_probe.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/bde/ngbde_pci_probe.c @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -63,7 +62,6 @@ pci_probe(struct pci_dev *pci_dev, const struct pci_device_id *ent) int cmic_bar = 0; uint8_t rev; struct ngbde_dev_s *nd = NULL; - int domain_no = pci_dev->bus ? pci_domain_nr(pci_dev->bus) : 0; int bus_no = pci_dev->bus ? pci_dev->bus->number : 0; int slot_no = PCI_SLOT(pci_dev->devfn); @@ -72,8 +70,8 @@ pci_probe(struct pci_dev *pci_dev, const struct pci_device_id *ent) } if (pci_debug) { - printk("PCI: pci_probe: slot=%04d:%02d:%02d dev=%04x:%04x\n", - domain_no, bus_no, slot_no, + printk("PCI: pci_probe: bus %d slot %d: %04x:%04x\n", + bus_no, slot_no, pci_dev->vendor, pci_dev->device); } @@ -86,11 +84,10 @@ pci_probe(struct pci_dev *pci_dev, const struct pci_device_id *ent) nd->dma_dev = &pci_dev->dev; nd->vendor_id = pci_dev->vendor; nd->device_id = pci_dev->device; - nd->domain_no = domain_no; nd->bus_no = bus_no; nd->slot_no = slot_no; - /* PCI revision must extracted "manually" */ + /* PCI revision must extracted "manually */ pci_read_config_byte(pci_dev, PCI_REVISION_ID, &rev); nd->revision = rev; @@ -161,13 +158,12 @@ pci_remove(struct pci_dev* pci_dev) { struct ngbde_dev_s *swdev; unsigned int num_swdev, idx; - int domain_no = pci_dev->bus ? pci_domain_nr(pci_dev->bus) : 0; int bus_no = pci_dev->bus ? pci_dev->bus->number : 0; int slot_no = PCI_SLOT(pci_dev->devfn); if (pci_debug) { - printk("PCI: pci_remove: slot=%04d:%02d:%02d dev=%04x:%04x\n", - domain_no, bus_no, slot_no, + printk("PCI: pci_remove: bus %d slot %d: %04x:%04x\n", + bus_no, slot_no, pci_dev->vendor, pci_dev->device); } @@ -183,7 +179,7 @@ pci_remove(struct pci_dev* pci_dev) printk(KERN_WARNING "%s: Device already removed\n", MOD_NAME); } - /* Mark device as inactive (not present) */ + /* Active device in this slot already? */ swdev[idx].inactive = 1; } } diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_pgmem.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/bde/ngbde_pgmem.c similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_pgmem.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/bde/ngbde_pgmem.c index ae666c89b1c..efbd1fc3244 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_pgmem.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/bde/ngbde_pgmem.c @@ -29,11 +29,9 @@ * well as the fragmentation level of the system memory, i.e. the * sooner after system boot these memory block are requested, the more * likely these requests are to succeed. - * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -51,6 +49,7 @@ #include + /******************************************************************************* * Local definitions ******************************************************************************/ diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_pio.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/bde/ngbde_pio.c similarity index 97% rename from platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_pio.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/bde/ngbde_pio.c index 1a825442366..578d6ddb097 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_pio.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/bde/ngbde_pio.c @@ -5,8 +5,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_procfs.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/bde/ngbde_procfs.c similarity index 98% rename from platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_procfs.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/bde/ngbde_procfs.c index d22b78952f2..a7cc964eb9f 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_procfs.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/bde/ngbde_procfs.c @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_swdev.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/bde/ngbde_swdev.c similarity index 97% rename from platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_swdev.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/bde/ngbde_swdev.c index b417e518945..ee0532db3da 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/bde/ngbde_swdev.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/bde/ngbde_swdev.c @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/edk/Kbuild b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/edk/Kbuild new file mode 100644 index 00000000000..76ce8846b3a --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/edk/Kbuild @@ -0,0 +1,30 @@ +# -*- Kbuild -*- +# +# Linux KNET Callback module. +# +# Copyright 2018-2024 Broadcom. All rights reserved. +# The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License +# version 2 as published by the Free Software Foundation. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# A copy of the GNU General Public License version 2 (GPLv2) can +# be found in the LICENSES folder. +# + +obj-m := linux_ngedk.o + +ccflags-y := $(LKM_CFLAGS) $(LKM_CPPFLAGS) \ + -I$(SDK)/shr/include \ + -I$(SDK)/bcmdrd/include \ + -I$(SDK)/linux/include \ + -I$(SDK)/linux/knet/include \ + -I$(SDK)/linux/knet + +linux_ngedk-y := ngedk_main.o diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/edk/Makefile b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/edk/Makefile new file mode 100644 index 00000000000..c9b19bd3dff --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/edk/Makefile @@ -0,0 +1,32 @@ +# +# Copyright 2018-2024 Broadcom. All rights reserved. +# The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License +# version 2 as published by the Free Software Foundation. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# A copy of the GNU General Public License version 2 (GPLv2) can +# be found in the LICENSES folder. +# +# Linux KNET Callback module. +# + +include Kbuild + +ifeq ($(KERNELRELEASE),) + +MOD_NAME = linux_ngedk + +include $(SDK)/make/lkm.mk + +endif + +.PHONY: distclean + +distclean:: diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/edk/ngedk_main.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/edk/ngedk_main.c similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/linux/edk/ngedk_main.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/edk/ngedk_main.c index 2d60b113958..36c832175ea 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/edk/ngedk_main.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/edk/ngedk_main.c @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -189,7 +188,7 @@ ngedk_dmamem_map_p2v(dma_addr_t paddr) } EXPORT_SYMBOL(ngedk_dmamem_map_p2v); -static int +int ngedk_intr_wait(int kdev, uint32_t *uc_bmp) { int32_t core; diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/genl-packet/Kbuild b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/genl-packet/Kbuild new file mode 100644 index 00000000000..52556ce879b --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/genl-packet/Kbuild @@ -0,0 +1,13 @@ +# -*- Kbuild -*- +# +# Linux Netlink channel for general packet I/O module. +# +# $Copyright: (c) 2024 Broadcom. +# Broadcom Proprietary and Confidential. All rights reserved.$ +# + +obj-m := genl-packet.o + +ccflags-y := $(LKM_CFLAGS) $(LKM_CPPFLAGS) \ + -I$(SDK)/linux/include/lkm \ + -I$(SDK)/linux/include/kernel diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/genl-packet/Makefile b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/genl-packet/Makefile new file mode 100644 index 00000000000..f4e3cfbb07f --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/genl-packet/Makefile @@ -0,0 +1,20 @@ +# +# $Copyright: (c) 2024 Broadcom. +# Broadcom Proprietary and Confidential. All rights reserved.$ +# +# Linux Netlink channel for general packet I/O module. +# + +include Kbuild + +ifeq ($(KERNELRELEASE),) + +MOD_NAME = genl-packet + +include $(SDK)/make/lkm.mk + +endif + +.PHONY: distclean + +distclean:: diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/genl-packet/genl-packet.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/genl-packet/genl-packet.c similarity index 100% rename from platform/broadcom/saibcm-modules/sdklt/linux/genl-packet/genl-packet.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/genl-packet/genl-packet.c diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/include/kernel/README b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/include/kernel/README similarity index 100% rename from platform/broadcom/saibcm-modules/sdklt/linux/include/kernel/README rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/include/kernel/README diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/include/kernel/net/genl-packet.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/include/kernel/net/genl-packet.h similarity index 100% rename from platform/broadcom/saibcm-modules/sdklt/linux/include/kernel/net/genl-packet.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/include/kernel/net/genl-packet.h diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/include/kernel/uapi/linux/genl-packet.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/include/kernel/uapi/linux/genl-packet.h similarity index 100% rename from platform/broadcom/saibcm-modules/sdklt/linux/include/kernel/uapi/linux/genl-packet.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/include/kernel/uapi/linux/genl-packet.h diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/include/lkm/lkm.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/include/lkm/lkm.h new file mode 100644 index 00000000000..ba908366f55 --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/include/lkm/lkm.h @@ -0,0 +1,205 @@ +/*! \file lkm.h + * + * Linux compatibility macros. + * + */ +/* + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + */ + +#ifndef LKM_H +#define LKM_H + +#include +#include +#if LINUX_VERSION_CODE < KERNEL_VERSION(3,1,0) +#error Kernel too old +#endif +#include +#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0) +#include +#endif +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#ifdef CONFIG_DEVFS_FS +#include +#endif + +/* Compatibility Macros */ + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,5,0) +#define PROC_OWNER(_m) +#else +#define PROC_OWNER(_m) .owner = _m, +#define proc_ops file_operations +#define proc_open open +#define proc_read read +#define proc_write write +#define proc_lseek llseek +#define proc_release release +#define proc_ioctl unlocked_ioctl +#define proc_compat_ioctl compat_ioctl +#define proc_mmap mmap +#endif + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0) +#define PROC_CREATE(_entry, _name, _acc, _path, _fops) \ + do { \ + _entry = proc_create(_name, _acc, _path, _fops); \ + } while (0) + +#define PROC_CREATE_DATA(_entry, _name, _acc, _path, _fops, _data) \ + do { \ + _entry = proc_create_data(_name, _acc, _path, _fops, _data); \ + } while (0) + +#define PROC_PDE_DATA(_node) PDE_DATA(_node) +#else +#define PROC_CREATE(_entry, _name, _acc, _path, _fops) \ + do { \ + _entry = create_proc_entry(_name, _acc, _path); \ + if (_entry) { \ + _entry->proc_fops = _fops; \ + } \ + } while (0) + +#define PROC_CREATE_DATA(_entry, _name, _acc, _path, _fops, _data) \ + do { \ + _entry = create_proc_entry(_name, _acc, _path); \ + if (_entry) { \ + _entry->proc_fops = _fops; \ + _entry->data=_data; \ + } \ + } while (0) + +#define PROC_PDE_DATA(_node) PROC_I(_node)->pde->data +#endif + +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,15,0) +#define timer_arg(var, context, timer_fieldname) \ + (typeof(var))(context) +#define timer_context_t unsigned long +#else +#define timer_context_t struct timer_list * +#define timer_arg(var, context, timer_fieldname) \ + from_timer(var, context, timer_fieldname) +#endif + +#ifndef setup_timer +#define setup_timer(timer, fn, data) \ + timer_setup(timer, fn, 0) +#endif + +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0) +static inline void page_ref_inc(struct page *page) +{ + atomic_inc(&page->_count); +} + +static inline void page_ref_dec(struct page *page) +{ + atomic_dec(&page->_count); +} +#endif + +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,8,0) +#define DMA_FORCE_CONTIGUOUS NULL +#else +#define DMA_FORCE_CONTIGUOUS DMA_ATTR_FORCE_CONTIGUOUS +#endif + +#ifndef PCI_IRQ_MSI +/* Emulate new IRQ API if not available */ +#define PCI_IRQ_INTX (1 << 0) +#define PCI_IRQ_MSI (1 << 1) +#define PCI_IRQ_MSIX (1 << 2) +static inline int +pci_alloc_irq_vectors(struct pci_dev *dev, unsigned int min_vecs, + unsigned int max_vecs, unsigned int flags) +{ + /* We do not attempt to support MSI-X via old API */ + if (flags & PCI_IRQ_MSI) { + if (pci_enable_msi(dev) == 0) { + return 1; + } + } + if (flags & PCI_IRQ_INTX) { + return 1; + } + return 0; +} +static inline void +pci_free_irq_vectors(struct pci_dev *dev) +{ + pci_disable_msi(dev); +} +static inline int +pci_irq_vector(struct pci_dev *dev, unsigned int nr) +{ + return dev->irq; +} +#endif + +/* Renamed in 6.8 */ +#ifndef PCI_IRQ_INTX +#define PCI_IRQ_INTX PCI_IRQ_LEGACY +#endif + +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,19,0) +/* nosemgrep: c.lang.security.insecure-use-string-copy-fn.insecure-use-string-copy-fn */ +#define strscpy strlcpy +#endif + +#ifndef MAX_PAGE_ORDER +#define MAX_PAGE_ORDER MAX_ORDER +#endif + +#if LINUX_VERSION_CODE < KERNEL_VERSION(6,11,0) +#define kernel_ethtool_ts_info ethtool_ts_info +#endif + +#if LINUX_VERSION_CODE < KERNEL_VERSION(6,11,0) +#define PLATFORM_DRIVER_REMOVE_RETURN_TYPE int +#define PLATFORM_DRIVER_REMOVE_RETURN_VALUE(_v) return (_v) +#endif + +#ifndef PLATFORM_DRIVER_REMOVE_RETURN_TYPE +#define PLATFORM_DRIVER_REMOVE_RETURN_TYPE void +#endif + +#ifndef PLATFORM_DRIVER_REMOVE_RETURN_VALUE +#define PLATFORM_DRIVER_REMOVE_RETURN_VALUE(_v) +#endif + +#endif /* LKM_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngbde_ioctl.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/include/lkm/ngbde_ioctl.h similarity index 92% rename from platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngbde_ioctl.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/include/lkm/ngbde_ioctl.h index 45f9eba13cc..e6f65b3af8e 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngbde_ioctl.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/include/lkm/ngbde_ioctl.h @@ -9,8 +9,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -86,9 +85,6 @@ /*! Initialize kernel interrupt driver. */ #define NGBDE_IOC_IRQ_INIT _IOW(NGBDE_IOC_MAGIC, 11, __u64) -/*! Initialize kernel interrupt driver. */ -#define NGBDE_IOC_SLOT_INFO _IOW(NGBDE_IOC_MAGIC, 12, __u64) - /*! \} */ /*! IOCTL command return code for success. */ @@ -145,21 +141,6 @@ struct ngbde_ioc_probe_info_s { /*! \} */ -/*! - * \name Device flags. - * \anchor NGBDE_DEV_F_xxx - */ - -/*! \{ */ - -/*! PCI interrupts are operating in MSI mode. */ -#define NGBDE_DEV_F_MSI (1 << 0) - -/*! Device is inactive (most likely removed). */ -#define NGBDE_DEV_F_INACTIVE (1 << 1) - -/*! \} */ - /*! Device information. */ struct ngbde_ioc_dev_info_s { @@ -400,22 +381,6 @@ struct ngbde_ioc_irq_mask_wr_s { __u32 val; }; -/*! Hardware slot information (typically PCI) */ -struct ngbde_ioc_slot_info_s { - - /*! Domain number. */ - __u32 domain_no; - - /*! Bus number. */ - __u32 bus_no; - - /*! Device number (a.k.a. PCI device number). */ - __u32 slot_no; - - /*! PCI function number (currently unused). */ - __u32 func_no; -}; - /*! IOCTL operation data. */ union ngbde_ioc_op_s { @@ -451,9 +416,6 @@ union ngbde_ioc_op_s { /*! Map device registers in kernel space. */ struct ngbde_ioc_pio_win_s pio_win; - - /*! Hardware slot information (typically PCI). */ - struct ngbde_ioc_slot_info_s slot_info; }; /*! IOCTL command message. */ diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngbde_kapi.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/include/lkm/ngbde_kapi.h similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngbde_kapi.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/include/lkm/ngbde_kapi.h index e1ffd3cdde1..d6cc403ab9d 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngbde_kapi.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/include/lkm/ngbde_kapi.h @@ -6,8 +6,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngedk_ioctl.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/include/lkm/ngedk_ioctl.h similarity index 98% rename from platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngedk_ioctl.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/include/lkm/ngedk_ioctl.h index 20ad630e015..9f6573c1a9c 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngedk_ioctl.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/include/lkm/ngedk_ioctl.h @@ -9,8 +9,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -34,7 +33,7 @@ /*! Module information */ #define NGEDK_MODULE_NAME "linux_ngedk" -#define NGEDK_MODULE_MAJOR 62 +#define NGEDK_MODULE_MAJOR 119 /*! Must be updated if backward compatibility is broken. */ #define NGEDK_IOC_VERSION 1 diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngedk_kapi.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/include/lkm/ngedk_kapi.h similarity index 94% rename from platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngedk_kapi.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/include/lkm/ngedk_kapi.h index 89dc681c93f..b850b7413ff 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngedk_kapi.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/include/lkm/ngedk_kapi.h @@ -6,8 +6,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngknet_dev.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/include/lkm/ngknet_dev.h similarity index 98% rename from platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngknet_dev.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/include/lkm/ngknet_dev.h index a9b657e9525..5618811648f 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngknet_dev.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/include/lkm/ngknet_dev.h @@ -9,8 +9,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -452,8 +451,6 @@ struct ngknet_rcpu_hdr { #define RCPU_FLAG_BIND_QUE (1 << 3) /*! RCPU no pad flag */ #define RCPU_FLAG_NO_PAD (1 << 4) -/*! RCPU keep FCS flag */ -#define RCPU_FLAG_KEEP_FCS (1 << 5) #endif /* NGKNET_DEV_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngknet_ioctl.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/include/lkm/ngknet_ioctl.h similarity index 97% rename from platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngknet_ioctl.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/include/lkm/ngknet_ioctl.h index ae3604bb514..52ec4ebac03 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngknet_ioctl.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/include/lkm/ngknet_ioctl.h @@ -9,8 +9,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -34,7 +33,7 @@ #define NGKNET_MODULE_MAJOR 121 /*! Must be updated if backward compatibility is broken */ -#define NGKNET_IOC_VERSION 5 +#define NGKNET_IOC_VERSION 4 /*! Max number of input arguments */ #define NGKNET_IOC_IARG_MAX 2 diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngknet_kapi.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/include/lkm/ngknet_kapi.h similarity index 79% rename from platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngknet_kapi.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/include/lkm/ngknet_kapi.h index f7c6f987038..fd6a7db90ae 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngknet_kapi.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/include/lkm/ngknet_kapi.h @@ -6,8 +6,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -30,34 +29,28 @@ #include /*! - * \brief NGKNET callback descriptor. - * - * The NGKNET module provides several callback functions registration for - * advanced features support. For callback function that carries packet - * data (normally with SKB as callback function paramenter), the NGKNET - * callback descriptor can be passed to callback function via SKB and - * be accessed via the macro \ref NGKNET_SKB_CB. + * \brief NGKNET callback description. */ struct ngknet_callback_desc { - /* Device information. */ + /* Device information */ ngknet_dev_info_t *dinfo; - /*! Network interface. */ + /*! Network interface */ ngknet_netif_t *netif; - /*! Matched filter. */ + /*! Matched filter */ ngknet_filter_t *filt; - /*! Packet meta data. */ + /*! Packet meta data */ uint8_t *pmd; - /*! Packet meta data length. */ + /*! Packet meta data length */ int pmd_len; - /*! Packet data length. */ + /*! Packet data length */ int pkt_len; - /*! Network device. */ + /*! Network device */ struct net_device *net_dev; }; @@ -65,65 +58,45 @@ struct ngknet_callback_desc { #define NGKNET_SKB_CB(_skb) ((struct ngknet_callback_desc *)_skb->cb) /*! - * PHC specific private data. + * PHC specific private data */ struct ngknet_ptp_data { - /*! Physical port. */ + /*! Physical port */ int phy_port; - /*! HW timestamp Tx type. */ + /*! HW timestamp Tx type */ int hwts_tx_type; }; -/*! TX/RX callback init. */ +/*! TX/RX callback init */ typedef void (*ngknet_dev_init_cb_f)(ngknet_dev_info_t *dinfo); -/*! Handle Rx packet. */ +/*! Handle Rx packet */ typedef struct sk_buff * (*ngknet_rx_cb_f)(struct sk_buff *skb); -/*! Handle Tx packet. */ +/*! Handle Tx packet */ typedef struct sk_buff * (*ngknet_tx_cb_f)(struct sk_buff *skb); -/*! Handle Netif callback. */ +/*! Handle Netif callback */ typedef int (*ngknet_netif_cb_f)(ngknet_dev_info_t *dinfo, ngknet_netif_t *netif); -/*! Handle Filter callback. */ +/*! Handle Filter callback */ typedef struct sk_buff * (*ngknet_filter_cb_f)(struct sk_buff *skb, ngknet_filter_t **filt); -/*! Handle Filter create callback. */ -typedef int -(*ngknet_filter_create_cb_f)(ngknet_filter_t *filt); - -/*! Handle Filter destroy callback. */ -typedef int -(*ngknet_filter_destroy_cb_f)(ngknet_filter_t *filt); - -/*! Additional attribute associated with the filter callback. */ -typedef struct { - /*! Filter description to be matched. */ - const char *name; - - /*! Callback when the matched filter is created. */ - ngknet_filter_create_cb_f create_cb; - - /*! Callback when the matched filter is destroyed. */ - ngknet_filter_destroy_cb_f destroy_cb; -} ngknet_filter_cb_attr_t; - -/*! PTP Rx/Tx config set. */ +/*! PTP Rx/Tx config set */ typedef int (*ngknet_ptp_config_set_cb_f)(ngknet_dev_info_t *dinfo, ngknet_netif_t *netif, int *value); -/*! PTP Rx/Tx HW timestamp get. */ +/*! PTP Rx/Tx HW timestamp get */ typedef int (*ngknet_ptp_hwts_get_cb_f)(struct sk_buff *skb, uint64_t *ts); -/*! PTP Tx meta set. */ +/*! PTP Tx meta set */ typedef int (*ngknet_ptp_meta_set_cb_f)(struct sk_buff *skb); @@ -135,7 +108,7 @@ typedef int typedef int (*ngknet_ptp_dev_ctrl_cb_f)(ngknet_dev_info_t *dinfo, int cmd, char *data, int len); -/*! PTP RX Preprocessing. */ +/*! PTP RX Preprocessing */ typedef int (*ngknet_ptp_rx_pre_process_cb_f)(struct sk_buff *skb, uint32_t *cust_hdr_len); @@ -276,30 +249,6 @@ ngknet_filter_cb_register(ngknet_filter_cb_f filter_cb); extern int ngknet_filter_cb_register_by_name(ngknet_filter_cb_f filter_cb, const char *desc); -/*! - * \brief Register filter callback with additional attribute description. - * - * If \c filter_cb_attr is not NULL, this function can register filter-specific - * callback for filter description matches \c name of \c filter_cb_attr. If - * \c create_cb or \c destroy_cb of \c filter_cb_attr is not NULL, - * corresponding callback will be performed when that matched filter is - * created or destoryed. - * - * This function is equivalent to \ref ngknet_filter_cb_register if - * \c filter_cb_attr is NULL or \c name of \c filter_cb_attr is NULL. - * This function is equivalent to \ref ngknet_filter_cb_register_by_name if - * \c name of \c filter_cb_attr is set with NULL values for \c create_cb and - * \c destroy_cb for \c filter_cb_attr. - * - * \param [in] filter_cb Filter callback function. - * \param [in] filter_cb_attr Additional attribute associated with \c filter_cb. - * - * \retval SHR_E_NONE No errors. - */ -extern int -ngknet_filter_cb_attr_register(ngknet_filter_cb_f filter_cb, - ngknet_filter_cb_attr_t *filter_cb_attr); - /*! * \brief Unregister filter callback. * diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngptpclock_ioctl.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/include/lkm/ngptpclock_ioctl.h similarity index 95% rename from platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngptpclock_ioctl.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/include/lkm/ngptpclock_ioctl.h index 28ecf078f9b..3ce5b6b15b3 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngptpclock_ioctl.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/include/lkm/ngptpclock_ioctl.h @@ -9,8 +9,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngst_ioctl.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/include/lkm/ngst_ioctl.h similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngst_ioctl.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/include/lkm/ngst_ioctl.h index cb7c8cf7203..c98abbfbef1 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngst_ioctl.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/include/lkm/ngst_ioctl.h @@ -9,7 +9,6 @@ * */ /* - * * Copyright 2018-2025 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngst_netlink.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/include/lkm/ngst_netlink.h similarity index 75% rename from platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngst_netlink.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/include/lkm/ngst_netlink.h index e1565665ee3..e7ec416fe6d 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/ngst_netlink.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/include/lkm/ngst_netlink.h @@ -4,9 +4,11 @@ * * This file is intended for use in both kernel mode and user mode. * + * IMPORTANT! + * All shared structures must be properly 64-bit aligned. + * */ /* - * * Copyright 2018-2025 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * @@ -28,17 +30,15 @@ #include -#define NGST_GENL_VERSION 1 -#define NGST_GENL_FAMILY_NAME "brcm_stel" -#define NGST_GENL_MCGRP_NAME "ipfix" +#define NGST_NETLINK_PROTOCOL 17 -enum ngst_genl_cmds { - NGST_CMD_UNSPEC, - NGST_CMD_DATA_RSP, - NGST_CMD_MAX, -}; +#define NGST_NL_MSG_TYPE_ST_DATA_REQ 1 +#define NGST_NL_MSG_TYPE_ST_DATA_NOT_READY 2 +#define NGST_NL_MSG_TYPE_ST_DATA_RSP 3 -#define NGST_IDLE_USLEEP_MIN 20 -#define NGST_IDLE_USLEEP_MAX 100 +struct ngst_nl_msg_hdr_s { + __u32 unit; + __u32 msg_type; +}; #endif /* NGST_NETLINK_H */ diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/knet/Kbuild b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/knet/Kbuild new file mode 100644 index 00000000000..89610dd2b44 --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/knet/Kbuild @@ -0,0 +1,52 @@ +# -*- Kbuild -*- +# +# Linux KNET module. +# +# Copyright 2018-2024 Broadcom. All rights reserved. +# The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License +# version 2 as published by the Free Software Foundation. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# A copy of the GNU General Public License version 2 (GPLv2) can +# be found in the LICENSES folder. +# + +obj-m := linux_ngknet.o + +ifneq ($(OUTPUT_DIR),) +INCLUDES := -I$(OUTPUT_DIR)/knet/generated/include -I$(OUTPUT_DIR)/knet/generated +endif + +ccflags-y := $(KNET_CPPFLAGS) $(LKM_CFLAGS) \ + -I$(SDK)/shr/include \ + -I$(SDK)/bcmdrd/include \ + -I$(SDK)/linux/include \ + -I$(SDK)/linux/knet/generated/include \ + -I$(SDK)/linux/knet/generated \ + $(INCLUDES) + +linux_ngknet-y := $(CHIP_OBJS) \ + bcmcnet_cmicd_pdma_hw.o \ + bcmcnet_cmicd_pdma_rxtx.o \ + bcmcnet_cmicx_pdma_hw.o \ + bcmcnet_cmicx_pdma_rxtx.o \ + bcmcnet_cmicr_pdma_hw.o \ + bcmcnet_cmicr_pdma_rxtx.o \ + bcmcnet_cmicr2_pdma_rxtx.o \ + bcmcnet_core.o \ + bcmcnet_dev.o \ + bcmcnet_rxtx.o \ + ngknet_buff.o \ + ngknet_callback.o \ + ngknet_extra.o \ + ngknet_linux.o \ + ngknet_main.o \ + ngknet_procfs.o \ + ngknet_ptp.o diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/knet/Makefile b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/knet/Makefile new file mode 100644 index 00000000000..638efaaf50a --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/knet/Makefile @@ -0,0 +1,114 @@ +# +# Copyright 2018-2024 Broadcom. All rights reserved. +# The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License +# version 2 as published by the Free Software Foundation. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# A copy of the GNU General Public License version 2 (GPLv2) can +# be found in the LICENSES folder. +# +# Linux KNET module. +# + +CNETDIR = $(SDK)/bcmcnet +KNETDIR = $(SDK)/linux/knet +GENDIR = $(KNETDIR)/generated +SRCIDIR = $(CNETDIR)/include/bcmcnet +ifneq ($(OUTPUT_DIR),) +GENDIR = $(OUTPUT_DIR)/knet/generated +endif +DSTIDIR = $(GENDIR)/include/bcmcnet + +# Change comma-separated list to space-separated list +comma = , +empty = +space = $(empty) $(empty) +spc_sep = $(subst $(comma),$(space),$1) + +# Convert chip name to uppercase +chip_uc = $(subst a,A,$(subst b,B,$(subst c,C,$(subst m,M,$1)))) + +# Convert chip name to lowercase +chip_lc = $(subst A,a,$(subst B,b,$(subst C,c,$(subst M,m,$1)))) + +# +# If SDK_CHIPS is defined, then exclude any chip directory which is +# not part of this list. +# +KNET_CHIPS := $(subst $(CNETDIR)/chip/,,$(wildcard $(CNETDIR)/chip/bcm*)) +ifdef SDK_CHIPS +# Create space-separated lowercase version of chip list +SDK_CHIPS_SPC := $(call spc_sep,$(SDK_CHIPS)) +SDK_CHIPS_LC := $(call chip_lc,$(SDK_CHIPS_SPC)) +# Configure build flags according to chip list +KNET_CHIPS := $(filter $(SDK_CHIPS_LC),$(KNET_CHIPS)) +KNET_CPPFLAGS := CHIP_DEFAULT=0 $(addsuffix =1,$(call chip_uc,$(KNET_CHIPS))) +KNET_CPPFLAGS := $(addprefix -DBCMDRD_CONFIG_INCLUDE_,$(KNET_CPPFLAGS)) +export KNET_CPPFLAGS +endif + +.PHONY: mklinks rmlinks + +knet: mklinks + $(MAKE) -C $(GENDIR) all + +# +# Suppress symlink error messages. +# +# Note that we do not use "ln -f" as this may cause failures if +# multiple builds are done in parallel on the same source tree. +# +R = 2>/dev/null + +mklinks: + mkdir -p $(DSTIDIR) + -ln -sr $(KNETDIR)/ngknet_dep.h $(DSTIDIR)/bcmcnet_dep.h $(R) + -ln -sr $(KNETDIR)/ngknet_buff.h $(DSTIDIR)/bcmcnet_buff.h $(R) + -ln -sr $(SRCIDIR)/bcmcnet_types.h $(DSTIDIR) $(R) + -ln -sr $(SRCIDIR)/bcmcnet_internal.h $(DSTIDIR) $(R) + -ln -sr $(SRCIDIR)/bcmcnet_core.h $(DSTIDIR) $(R) + -ln -sr $(SRCIDIR)/bcmcnet_dev.h $(DSTIDIR) $(R) + -ln -sr $(SRCIDIR)/bcmcnet_rxtx.h $(DSTIDIR) $(R) + -ln -sr $(SRCIDIR)/bcmcnet_cmicd.h $(DSTIDIR) $(R) + -ln -sr $(SRCIDIR)/bcmcnet_cmicx.h $(DSTIDIR) $(R) + -ln -sr $(SRCIDIR)/bcmcnet_cmicr_acc.h $(DSTIDIR) $(R) + -ln -sr $(SRCIDIR)/bcmcnet_cmicr.h $(DSTIDIR) $(R) + -ln -sr $(SRCIDIR)/bcmcnet_cmicr2.h $(DSTIDIR) $(R) + -ln -sr $(CNETDIR)/chip/*/*attach.c $(GENDIR) $(R) + -ln -sr $(CNETDIR)/hmi/cmicd/*.c $(GENDIR) $(R) + -ln -sr $(CNETDIR)/hmi/cmicx/*.c $(GENDIR) $(R) + -ln -sr $(CNETDIR)/hmi/cmicr/*.c $(GENDIR) $(R) + -ln -sr $(CNETDIR)/main/bcmcnet_core.c $(GENDIR) $(R) + -ln -sr $(CNETDIR)/main/bcmcnet_dev.c $(GENDIR) $(R) + -ln -sr $(CNETDIR)/main/bcmcnet_rxtx.c $(GENDIR) $(R) + -ln -sr $(KNETDIR)/*.[ch] $(GENDIR) $(R) + -ln -sr $(KNETDIR)/Makefile $(GENDIR) $(R) + -ln -sr $(KNETDIR)/Kbuild $(GENDIR) $(R) + +rmlinks: + -rm -rf $(GENDIR) + +CHIP_SRCS := $(addsuffix _pdma_attach.c,$(KNET_CHIPS)) +CHIP_OBJS ?= $(patsubst %.c, %.o, $(CHIP_SRCS)) +export CHIP_OBJS + +include Kbuild + +ifeq ($(KERNELRELEASE),) + +MOD_NAME = linux_ngknet + +include $(SDK)/make/lkm.mk + +endif + +.PHONY: distclean + +distclean:: rmlinks diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/knet/ngknet_buff.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/knet/ngknet_buff.c new file mode 100644 index 00000000000..5aac177bc9a --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/knet/ngknet_buff.c @@ -0,0 +1,351 @@ +/*! \file ngknet_buff.c + * + * Utility routines for NGKNET packet buffer management in Linux kernel mode. + * + */ +/* + * Copyright 2018-2024 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + */ + +#include +#include +#include +#include "ngknet_main.h" +#include "ngknet_buff.h" + +/*! + * Allocate coherent memory + */ +static void * +ngknet_ring_buf_alloc(struct pdma_dev *dev, uint32_t size, dma_addr_t *dma) +{ + struct ngknet_dev *kdev = (struct ngknet_dev *)dev->priv; + + return dma_alloc_coherent(kdev->dev, size, dma, GFP_KERNEL); +} + +/*! + * Free coherent memory + */ +static void +ngknet_ring_buf_free(struct pdma_dev *dev, uint32_t size, void *addr, dma_addr_t dma) +{ + struct ngknet_dev *kdev = (struct ngknet_dev *)dev->priv; + + dma_free_coherent(kdev->dev, size, addr, dma); +} + +/*! + * Allocate Rx buffer + */ +static int +ngknet_rx_buf_alloc(struct pdma_dev *dev, struct pdma_rx_queue *rxq, + struct pdma_rx_buf *pbuf) +{ + struct ngknet_dev *kdev = (struct ngknet_dev *)dev->priv; + dma_addr_t dma; + struct page *page; + struct sk_buff *skb; + + if (rxq->buf_mode == PDMA_BUF_MODE_PAGE) { + page = kal_dev_alloc_pages(rxq->page_order); + if (unlikely(!page)) { + return SHR_E_MEMORY; + } + dma = kal_dma_map_page_attrs(kdev->dev, page, 0, PAGE_SIZE * (1 << rxq->page_order), DMA_FROM_DEVICE, + DMA_ATTR_SKIP_CPU_SYNC | DMA_ATTR_WEAK_ORDERING); + if (unlikely(dma_mapping_error(kdev->dev, dma))) { + __free_pages(page, rxq->page_order); + return SHR_E_MEMORY; + } + pbuf->dma = dma; + pbuf->page = page; + pbuf->page_offset = 0; + } else { + skb = netdev_alloc_skb(kdev->net_dev, PDMA_RXB_RESV + pbuf->adj + rxq->buf_size); + if (unlikely(!skb)) { + return SHR_E_MEMORY; + } + skb_reserve(skb, PDMA_RXB_ALIGN - (((unsigned long)skb->data) & (PDMA_RXB_ALIGN - 1))); + pbuf->skb = skb; + pbuf->pkb = (struct pkt_buf *)skb->data; + dma = dma_map_single(kdev->dev, &pbuf->pkb->data + pbuf->adj, rxq->buf_size, DMA_FROM_DEVICE); + if (unlikely(dma_mapping_error(kdev->dev, dma))) { + dev_kfree_skb_any(skb); + return SHR_E_MEMORY; + } + pbuf->dma = dma; + } + + return SHR_E_NONE; +} + +/*! + * Get Rx buffer DMA address + */ +static void +ngknet_rx_buf_dma(struct pdma_dev *dev, struct pdma_rx_queue *rxq, + struct pdma_rx_buf *pbuf, dma_addr_t *addr) +{ + if (rxq->buf_mode == PDMA_BUF_MODE_PAGE) { + *addr = pbuf->dma + pbuf->page_offset + PDMA_RXB_RESV + pbuf->adj; + } else { + *addr = pbuf->dma; + } +} + +/*! + * Check Rx buffer + */ +static bool +ngknet_rx_buf_avail(struct pdma_dev *dev, struct pdma_rx_queue *rxq, + struct pdma_rx_buf *pbuf) +{ + if (rxq->buf_mode == PDMA_BUF_MODE_PAGE) { + pbuf->skb = NULL; + } + + return (pbuf->dma != 0); +} + +/*! + * Get Rx buffer + */ +static struct pkt_hdr * +ngknet_rx_buf_get(struct pdma_dev *dev, struct pdma_rx_queue *rxq, + struct pdma_rx_buf *pbuf, int len) +{ + struct ngknet_dev *kdev = (struct ngknet_dev *)dev->priv; + struct sk_buff *skb; + uint32_t pages_size; + + if (rxq->buf_mode == PDMA_BUF_MODE_PAGE) { + if (pbuf->skb) { + return &pbuf->pkb->pkh; + } + skb = kal_build_skb(page_address(pbuf->page) + pbuf->page_offset, + PDMA_RXB_SIZE(rxq->buf_size + pbuf->adj)); + if (unlikely(!skb)) { + return NULL; + } + skb_reserve(skb, PDMA_RXB_ALIGN); + pages_size = PAGE_SIZE * (1 << rxq->page_order); + dma_sync_single_range_for_cpu(kdev->dev, pbuf->dma, pbuf->page_offset, + pages_size >> 1, DMA_FROM_DEVICE); + pbuf->skb = skb; + pbuf->pkb = (struct pkt_buf *)skb->data; + + /* Try to reuse this page */ + if (unlikely(page_count(pbuf->page) != 1) || + kal_page_is_pfmemalloc(pbuf->page) || + page_to_nid(pbuf->page) != numa_mem_id()) { + kal_dma_unmap_page_attrs(kdev->dev, pbuf->dma, pages_size, DMA_FROM_DEVICE, + DMA_ATTR_SKIP_CPU_SYNC | DMA_ATTR_WEAK_ORDERING); + pbuf->dma = 0; + } else { + pbuf->page_offset ^= pages_size >> 1; + page_ref_inc(pbuf->page); + dma_sync_single_range_for_device(kdev->dev, pbuf->dma, pbuf->page_offset, + pages_size >> 1, DMA_FROM_DEVICE); + } + } else { + if (!pbuf->dma) { + return &pbuf->pkb->pkh; + } + skb = pbuf->skb; + dma_unmap_single(kdev->dev, pbuf->dma, rxq->buf_size, DMA_FROM_DEVICE); + pbuf->dma = 0; + } + + skb_put(skb, PKT_HDR_SIZE + pbuf->adj + len); + + return &pbuf->pkb->pkh; +} + +/*! + * Put Rx buffer + */ +static int +ngknet_rx_buf_put(struct pdma_dev *dev, struct pdma_rx_queue *rxq, + struct pdma_rx_buf *pbuf, int len) +{ + struct ngknet_dev *kdev = (struct ngknet_dev *)dev->priv; + dma_addr_t dma; + struct sk_buff *skb; + + if (rxq->buf_mode == PDMA_BUF_MODE_PAGE) { + dev_kfree_skb_any(pbuf->skb); + } else { + skb = pbuf->skb; + if (pbuf->pkb != (struct pkt_buf *)skb->data) { + dev_kfree_skb_any(skb); + pbuf->dma = 0; + return SHR_E_NONE; + } + dma = dma_map_single(kdev->dev, &pbuf->pkb->data + pbuf->adj, + rxq->buf_size, DMA_FROM_DEVICE); + if (unlikely(dma_mapping_error(kdev->dev, dma))) { + dev_kfree_skb_any(skb); + pbuf->dma = 0; + return SHR_E_MEMORY; + } + pbuf->dma = dma; + skb_trim(skb, 0); + } + + return SHR_E_NONE; +} + +/*! + * Free Rx buffer + */ +static void +ngknet_rx_buf_free(struct pdma_dev *dev, struct pdma_rx_queue *rxq, + struct pdma_rx_buf *pbuf) +{ + struct ngknet_dev *kdev = (struct ngknet_dev *)dev->priv; + uint32_t pages_size; + + if (rxq->buf_mode == PDMA_BUF_MODE_PAGE) { + if (!pbuf->page) { + return; + } + pages_size = PAGE_SIZE * (1 << rxq->page_order); + kal_dma_unmap_page_attrs(kdev->dev, pbuf->dma, pages_size, DMA_FROM_DEVICE, + DMA_ATTR_SKIP_CPU_SYNC | DMA_ATTR_WEAK_ORDERING); + __free_pages(pbuf->page, rxq->page_order); + } else { + if (!pbuf->skb) { + return; + } + dma_unmap_single(kdev->dev, pbuf->dma, rxq->buf_size, DMA_FROM_DEVICE); + dev_kfree_skb_any(pbuf->skb); + } + + pbuf->dma = 0; + pbuf->page = NULL; + pbuf->page_offset = 0; + pbuf->skb = NULL; + pbuf->pkb = NULL; + pbuf->adj = 0; +} + +/*! + * Get Rx buffer mode + */ +static enum buf_mode +ngknet_rx_buf_mode(struct pdma_dev *dev, struct pdma_rx_queue *rxq) +{ + uint32_t len, order; + + if (ngknet_page_buffer_mode_get() == 0) { + return PDMA_BUF_MODE_SKB; + } + + len = dev->rx_ph_size ? rxq->buf_size : rxq->buf_size + PDMA_RXB_META; + for (order = 0; order < 32; order++) { + if (PDMA_RXB_SIZE(len) * 2 <= PAGE_SIZE * (1 << order)) { + rxq->page_order = order; + break; + } + } + + return PDMA_BUF_MODE_PAGE; +} + +/*! + * Get Tx buffer + */ +static struct pkt_hdr * +ngknet_tx_buf_get(struct pdma_dev *dev, struct pdma_tx_queue *txq, + struct pdma_tx_buf *pbuf, void *buf) +{ + struct ngknet_dev *kdev = (struct ngknet_dev *)dev->priv; + struct sk_buff *skb = (struct sk_buff *)buf; + struct pkt_buf *pkb = (struct pkt_buf *)skb->data; + dma_addr_t dma; + + pbuf->len = pkb->pkh.data_len + (pbuf->adj ? pkb->pkh.meta_len : 0); + dma = dma_map_single(kdev->dev, &pkb->data + (pbuf->adj ? 0 : pkb->pkh.meta_len), + pbuf->len, DMA_TO_DEVICE); + if (unlikely(dma_mapping_error(kdev->dev, dma))) { + dev_kfree_skb_any(skb); + return NULL; + } + pbuf->dma = dma; + pbuf->skb = skb; + pbuf->pkb = pkb; + + return &pkb->pkh; +} + +/*! + * Get Tx buffer DMA address + */ +static void +ngknet_tx_buf_dma(struct pdma_dev *dev, struct pdma_tx_queue *txq, + struct pdma_tx_buf *pbuf, dma_addr_t *addr) +{ + *addr = pbuf->dma; +} + +/*! + * Free Tx buffer + */ +static void +ngknet_tx_buf_free(struct pdma_dev *dev, struct pdma_tx_queue *txq, + struct pdma_tx_buf *pbuf) +{ + struct ngknet_dev *kdev = (struct ngknet_dev *)dev->priv; + + if (!pbuf->skb) { + return; + } + + dma_unmap_single(kdev->dev, pbuf->dma, pbuf->len, DMA_TO_DEVICE); + dev_kfree_skb_any(pbuf->skb); + + pbuf->dma = 0; + pbuf->len = 0; + pbuf->skb = NULL; + pbuf->pkb = NULL; + pbuf->adj = 0; +} + +static const struct pdma_buf_mngr buf_mngr = { + .ring_buf_alloc = ngknet_ring_buf_alloc, + .ring_buf_free = ngknet_ring_buf_free, + .rx_buf_alloc = ngknet_rx_buf_alloc, + .rx_buf_dma = ngknet_rx_buf_dma, + .rx_buf_avail = ngknet_rx_buf_avail, + .rx_buf_get = ngknet_rx_buf_get, + .rx_buf_put = ngknet_rx_buf_put, + .rx_buf_free = ngknet_rx_buf_free, + .rx_buf_mode = ngknet_rx_buf_mode, + .tx_buf_get = ngknet_tx_buf_get, + .tx_buf_dma = ngknet_tx_buf_dma, + .tx_buf_free = ngknet_tx_buf_free, +}; + +/*! + * Open a device + */ +void +bcmcnet_buf_mngr_init(struct pdma_dev *dev) +{ + dev->ctrl.buf_mngr = (struct pdma_buf_mngr *)&buf_mngr; +} + diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_buff.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/knet/ngknet_buff.h similarity index 97% rename from platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_buff.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/knet/ngknet_buff.h index 2fca48cfd8d..6777b3cb558 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_buff.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/knet/ngknet_buff.h @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_callback.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/knet/ngknet_callback.c similarity index 92% rename from platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_callback.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/knet/ngknet_callback.c index 91d18426068..55a92a51627 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_callback.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/knet/ngknet_callback.c @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -280,22 +279,16 @@ ngknet_netif_destroy_cb_unregister(ngknet_netif_cb_f netif_cb) int ngknet_filter_cb_register(ngknet_filter_cb_f filter_cb) { - return ngknet_filter_cb_attr_register(filter_cb, NULL); -} - -int -ngknet_filter_cb_register_by_name(ngknet_filter_cb_f filter_cb, - const char *desc) -{ - ngknet_filter_cb_attr_t filter_cb_attr; + if (callback_ctrl.filter_cb != NULL) { + return -1; + } + callback_ctrl.filter_cb = filter_cb; - memset(&filter_cb_attr, 0, sizeof(filter_cb_attr)); - filter_cb_attr.name = desc; - return ngknet_filter_cb_attr_register(filter_cb, &filter_cb_attr); + return 0; } -int ngknet_filter_cb_attr_register(ngknet_filter_cb_f filter_cb, - ngknet_filter_cb_attr_t *filter_cb_attr) +int +ngknet_filter_cb_register_by_name(ngknet_filter_cb_f filter_cb, const char *desc) { struct ngknet_dev *dev; struct list_head *list; @@ -303,17 +296,10 @@ int ngknet_filter_cb_attr_register(ngknet_filter_cb_f filter_cb, filter_cb_t *fcb; unsigned long flags; int idx; - const char *desc; - if (filter_cb_attr == NULL || filter_cb_attr->name == NULL) { - if (callback_ctrl.filter_cb != NULL) { - return -1; - } - callback_ctrl.filter_cb = filter_cb; - return 0; + if (filter_cb == NULL || desc == NULL) { + return -1; } - - desc = filter_cb_attr->name; if (desc[0] == '\0' || strlen(desc) >= NGKNET_FILTER_DESC_MAX) { return -1; } @@ -329,8 +315,6 @@ int ngknet_filter_cb_attr_register(ngknet_filter_cb_f filter_cb, return -1; } fcb->cb = filter_cb; - fcb->create_cb = filter_cb_attr->create_cb; - fcb->destroy_cb = filter_cb_attr->destroy_cb; strscpy(fcb->desc, desc, sizeof(fcb->desc)); list_add_tail(&fcb->list, &callback_ctrl.filter_cb_list); @@ -348,9 +332,7 @@ int ngknet_filter_cb_attr_register(ngknet_filter_cb_f filter_cb, fc->filt.dest_type == NGKNET_FILTER_DEST_T_CB && fc->filt.desc[0] != '\0') { if (strcmp(fc->filt.desc, desc) == 0) { - fc->filter_cb = fcb->cb; - fc->create_cb = fcb->create_cb; - fc->destroy_cb = fcb->destroy_cb; + fc->filter_cb = filter_cb; } } } @@ -400,8 +382,6 @@ ngknet_filter_cb_unregister(ngknet_filter_cb_f filter_cb) fc->filt.dest_type == NGKNET_FILTER_DEST_T_CB && fc->filter_cb == filter_cb) { fc->filter_cb = NULL; - fc->create_cb = NULL; - fc->destroy_cb = NULL; } } spin_unlock_irqrestore(&dev->lock, flags); @@ -613,7 +593,6 @@ EXPORT_SYMBOL(ngknet_netif_destroy_cb_register); EXPORT_SYMBOL(ngknet_netif_destroy_cb_unregister); EXPORT_SYMBOL(ngknet_filter_cb_register); EXPORT_SYMBOL(ngknet_filter_cb_register_by_name); -EXPORT_SYMBOL(ngknet_filter_cb_attr_register); EXPORT_SYMBOL(ngknet_filter_cb_unregister); EXPORT_SYMBOL(ngknet_ptp_rx_config_set_cb_register); EXPORT_SYMBOL(ngknet_ptp_rx_config_set_cb_unregister); diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_callback.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/knet/ngknet_callback.h similarity index 92% rename from platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_callback.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/knet/ngknet_callback.h index 11c991f9caf..53eed443671 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_callback.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/knet/ngknet_callback.h @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -46,17 +45,10 @@ typedef struct filter_cb_s { /*! List head */ struct list_head list; - /*! Filter description */ char desc[NGKNET_FILTER_DESC_MAX]; /*! Handle Filter callback */ ngknet_filter_cb_f cb; - - /*! Handle Filter create callback */ - ngknet_filter_create_cb_f create_cb; - - /*! Handle Filter destroy callback */ - ngknet_filter_destroy_cb_f destroy_cb; } filter_cb_t; /*! diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_dep.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/knet/ngknet_dep.h similarity index 96% rename from platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_dep.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/knet/ngknet_dep.h index 6e309d3cee6..5d738cabc09 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_dep.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/knet/ngknet_dep.h @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_extra.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/knet/ngknet_extra.c similarity index 79% rename from platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_extra.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/knet/ngknet_extra.c index 89b64048d5c..1c8084d8b76 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_extra.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/knet/ngknet_extra.c @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -127,7 +126,6 @@ static inline int ngknet_filter_callback(struct ngknet_dev *dev, struct filt_ctrl *fc, struct sk_buff **skb, ngknet_filter_t **filt) { - struct pdma_dev *pdev = &dev->pdma_dev; struct ngknet_callback_desc *cbd = NGKNET_SKB_CB((*skb)); struct pkt_hdr *pkh = (struct pkt_hdr *)(*skb)->data; ngknet_filter_cb_f filter_cb; @@ -141,29 +139,21 @@ ngknet_filter_callback(struct ngknet_dev *dev, struct filt_ctrl *fc, cbd->pmd = (*skb)->data + PKT_HDR_SIZE; cbd->pmd_len = pkh->meta_len; cbd->pkt_len = pkh->data_len; - if (pdev->flags & PDMA_NO_FCS) { - /* - * Add dummy FCS size to packet length in callback descriptor - * when FCS is not included in packet. This can ensure callback - * functions always get packet length with FCS size included. - */ - cbd->pkt_len += ETH_FCS_LEN; - } cbd->filt = *filt; *skb = filter_cb(*skb, filt); return SHR_E_NONE; } static inline bool -ngknet_filter_match(struct ngknet_dev *dev, int chan_id, void *frame, - ngknet_filter_t *filt) +ngknet_filter_match(struct ngknet_dev *dev, int chan_id, + struct sk_buff *skb, ngknet_filter_t *filt) { struct pkt_buf *pkb; ngknet_filter_t scratch; uint8_t *oob; int idx, wsize; - if (!dev || !frame || !filt) { + if (!dev || !skb || !filt) { return false; } if (filt->flags & NGKNET_FILTER_F_ANY_DATA) { @@ -173,7 +163,7 @@ ngknet_filter_match(struct ngknet_dev *dev, int chan_id, void *frame, return false; } - pkb = (struct pkt_buf *)frame; + pkb = (struct pkt_buf *)skb->data; oob = &pkb->data; memcpy(&scratch.data.b[0], @@ -371,15 +361,10 @@ ngknet_filter_create(struct ngknet_dev *dev, ngknet_filter_t *filter) if (strncmp(filter->desc, filter_cb->desc, strlen(filter_cb->desc)) == 0) { fc->filter_cb = filter_cb->cb; - fc->create_cb = filter_cb->create_cb; - fc->destroy_cb = filter_cb->destroy_cb; break; } } } - if (fc->create_cb) { - fc->create_cb(&fc->filt); - } list_for_each(list, &dev->filt_list) { filt = &((struct filt_ctrl *)list)->filt; @@ -434,9 +419,6 @@ ngknet_filter_destroy(struct ngknet_dev *dev, int id) } list_del(&fc->list); - if (fc->destroy_cb) { - fc->destroy_cb(&fc->filt); - } kfree(fc); dev->fc[id] = NULL; @@ -565,7 +547,7 @@ ngknet_rx_pkt_filter(struct ngknet_dev *dev, struct sk_buff *skb) list_for_each(list, &dev->filt_list) { fc = (struct filt_ctrl *)list; filt = &fc->filt; - if (next_filter_match || ngknet_filter_match(dev, chan_id, skb->data, filt)) { + if (next_filter_match || ngknet_filter_match(dev, chan_id, skb, filt)) { if (next_filter_match && --next_filter_match > 0) { /* Same priority, but not matching */ continue; @@ -581,7 +563,7 @@ ngknet_rx_pkt_filter(struct ngknet_dev *dev, struct sk_buff *skb) break; } same_pri_idx++; - if (ngknet_filter_match(dev, chan_id, skb->data, next_filt)) { + if (ngknet_filter_match(dev, chan_id, skb, next_filt)) { /* Found another matching filter with same priority */ fskb = skb_replicate(skb, GFP_ATOMIC); next_filter_match = same_pri_idx; @@ -614,71 +596,6 @@ ngknet_rx_pkt_filter(struct ngknet_dev *dev, struct sk_buff *skb) return rv; } -int -ngknet_rx_xdp_filter(struct ngknet_dev *dev, void *frame, - struct net_device **ndev) -{ - struct net_device *dest_ndev = NULL; - struct ngknet_private *priv = NULL; - struct filt_ctrl *fc = NULL; - struct list_head *list = NULL; - ngknet_filter_t *filt = NULL; - struct pkt_buf *pkb = (struct pkt_buf *)frame; - unsigned long flags; - int rv, chan_id; - - rv = bcmcnet_pdma_dev_queue_to_chan(&dev->pdma_dev, pkb->pkh.queue_id, - PDMA_Q_RX, &chan_id); - if (SHR_FAILURE(rv)) { - return rv; - } - - spin_lock_irqsave(&dev->lock, flags); - - dest_ndev = dev->bdev[chan_id]; - if (dest_ndev) { - priv = netdev_priv(dest_ndev); - priv->users++; - spin_unlock_irqrestore(&dev->lock, flags); - *ndev = dest_ndev; - return SHR_E_NONE; - } - - if (list_empty(&dev->filt_list)) { - spin_unlock_irqrestore(&dev->lock, flags); - return SHR_E_NO_HANDLER; - } - - rv = SHR_E_NOT_FOUND; - list_for_each(list, &dev->filt_list) { - fc = (struct filt_ctrl *)list; - filt = &fc->filt; - if (!ngknet_filter_match(dev, chan_id, frame, filt)) { - continue; - } - if (filt->dest_type == NGKNET_FILTER_DEST_T_NETIF) { - if (filt->dest_id == 0) { - dest_ndev = dev->net_dev; - } else { - dest_ndev = dev->vdev[filt->dest_id]; - } - if (dest_ndev) { - priv = netdev_priv(dest_ndev); - priv->users++; - spin_unlock_irqrestore(&dev->lock, flags); - *ndev = dest_ndev; - return SHR_E_NONE; - } - } - rv = SHR_E_NO_HANDLER; - break; - } - - spin_unlock_irqrestore(&dev->lock, flags); - - return rv; -} - static void ngknet_rl_process(timer_context_t data) { @@ -777,84 +694,12 @@ ngknet_rx_rate_limit(struct ngknet_dev *dev, int limit) } void -ngknet_tx_queue_schedule(struct ngknet_dev *dev, struct pkt_buf *pkb, int *queue) +ngknet_tx_queue_schedule(struct ngknet_dev *dev, struct sk_buff *skb, int *queue) { + struct pkt_buf *pkb = (struct pkt_buf *)skb->data; + if (pkb->pkh.attrs & PDMA_TX_BIND_QUE) { *queue = pkb->pkh.queue_id; } } -void -ngknet_pkt_dump(uint8_t *data, int len) -{ - char str[128]; - int i; - - for (i = 0; i < len; i++) { - if ((i & 0x1f) == 0) { - sprintf(str, "%04x: ", i); - } - sprintf(&str[strlen(str)], "%02x", data[i]); - if ((i & 0x1f) == 0x1f) { - sprintf(&str[strlen(str)], "\n"); - printk(str); - continue; - } - if ((i & 0x3) == 0x3) { - sprintf(&str[strlen(str)], " "); - } - } - if ((i & 0x1f) != 0) { - sprintf(&str[strlen(str)], "\n"); - printk(str); - } - printk("\n"); -} - -void -ngknet_pkt_stats(struct pdma_dev *pdev, int dir) -{ - static s64 ts0[2], ts1[2]; - static uint32_t pkts[2] = {0}, prts[2] = {0}; - static uint64_t intrs = 0; - uint32_t iv_time; - uint32_t pps; - uint32_t boudary; - int rx_rate_limit = ngknet_rx_rate_limit_get(); - - if (rx_rate_limit == -1 || rx_rate_limit >= 100000) { - /* Dump every 100K packets */ - boudary = 100000; - } else if (rx_rate_limit >= 10000) { - /* Dump every 10K packets */ - boudary = 10000; - } else { - /* Dump every 1K packets */ - boudary = 1000; - } - - if (pkts[dir] == 0) { - ts0[dir] = kal_time_usecs(); - intrs = pdev->stats.intrs; - } - if (++pkts[dir] >= boudary) { - ts1[dir] = kal_time_usecs(); - iv_time = ts1[dir] - ts0[dir]; - pps = boudary * 1000 / (iv_time / 1000); - prts[dir]++; - /* pdev->stats.intrs is reset and re-count from 0. */ - if (intrs > pdev->stats.intrs) { - intrs = 0; - } - if (pps <= boudary || prts[dir] * boudary >= pps) { - printk(KERN_CRIT "%s - limit: %d pps, %dK pkts time: %d usec, " - "rate: %d pps, intrs: %llu\n", - dir == PDMA_Q_RX ? "Rx" : "Tx", - dir == PDMA_Q_RX ? rx_rate_limit : -1, (boudary / 1000), - iv_time, pps, pdev->stats.intrs - intrs); - prts[dir] = 0; - } - pkts[dir] = 0; - } -} - diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_extra.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/knet/ngknet_extra.h similarity index 83% rename from platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_extra.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/knet/ngknet_extra.h index 17f84da8d42..fd0dccf824f 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_extra.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/knet/ngknet_extra.h @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -44,12 +43,6 @@ struct filt_ctrl { /*! Filter callback */ ngknet_filter_cb_f filter_cb; - - /*! Filter create callback */ - ngknet_filter_create_cb_f create_cb; - - /*! Filter destroy callback */ - ngknet_filter_destroy_cb_f destroy_cb; }; /*! @@ -124,20 +117,6 @@ ngknet_filter_get_next(struct ngknet_dev *dev, ngknet_filter_t *filter); extern int ngknet_rx_pkt_filter(struct ngknet_dev *dev, struct sk_buff *skb); -/*! - * \brief Filter frame. - * - * \param [in] dev Device structure point. - * \param [in] frame Data frame. - * \param [out] ndev Network interface. - * - * \retval Matched network interface. - * \retval NULL No matched network interface. - */ -extern int -ngknet_rx_xdp_filter(struct ngknet_dev *dev, void *frame, - struct net_device **ndev); - /*! * \brief Rx rate limit control. * @@ -235,25 +214,7 @@ ngknet_rx_rate_limit(struct ngknet_dev *dev, int limit); * \param [in] queue Tx queue number. */ extern void -ngknet_tx_queue_schedule(struct ngknet_dev *dev, struct pkt_buf *pkb, int *queue); - -/*! - * \brief Dump packet content. - * - * \param [in] data Packet data. - * \param [in] len Data length. - */ -extern void -ngknet_pkt_dump(uint8_t *data, int len); - -/*! - * \brief Packet statistics. - * - * \param [in] pdev Packet device data structure. - * \param [in] dir Packet direction. - */ -extern void -ngknet_pkt_stats(struct pdma_dev *pdev, int dir); +ngknet_tx_queue_schedule(struct ngknet_dev *dev, struct sk_buff *skb, int *queue); #endif /* NGKNET_EXTRA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_linux.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/knet/ngknet_linux.c similarity index 98% rename from platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_linux.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/knet/ngknet_linux.c index cd7a7aa4aff..cd2cbe3a31f 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_linux.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/knet/ngknet_linux.c @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_linux.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/knet/ngknet_linux.h similarity index 92% rename from platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_linux.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/knet/ngknet_linux.h index 86322bde2c8..befdeb9d094 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_linux.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/knet/ngknet_linux.h @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -35,10 +34,6 @@ #define MODULE_PARAM(n, t, p) module_param(n, t, p) -#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5,10,0)) -#define NGKNET_XDP_NATIVE -#endif - #if (LINUX_VERSION_CODE < KERNEL_VERSION(5,19,0)) #define kal_netif_napi_add(_dev, _napi, _poll, _weight) \ netif_napi_add(_dev, _napi, _poll, _weight) @@ -230,34 +225,6 @@ kal_copy_to_user(void __user *to, const void *from, return copy_to_user(to, from, len); } -/*! - * Atomic bit operations - */ - -static inline void -at_set_bit(int nr, void *addr, void *lock) -{ - set_bit(nr, addr); -} - -static inline void -at_clear_bit(int nr, void *addr, void *lock) -{ - clear_bit(nr, addr); -} - -static inline int -at_test_set_bit(int nr, void *addr, void *lock) -{ - return test_and_set_bit(nr, addr); -} - -static inline int -at_test_clear_bit(int nr, void *addr, void *lock) -{ - return test_and_clear_bit(nr, addr); -} - /*! * System abstraction */ @@ -289,6 +256,7 @@ sal_memcpy(void *dest, const void *src, size_t cnt) static inline char * sal_strncpy(char *dest, const char *src, size_t cnt) { + /* nosemgrep: c.lang.security.insecure-use-string-copy-fn.insecure-use-string-copy-fn */ return strncpy(dest, src, cnt); } diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_main.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/knet/ngknet_main.c similarity index 95% rename from platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_main.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/knet/ngknet_main.c index 9b51efe1d50..437dd5ab896 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_main.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/knet/ngknet_main.c @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -93,23 +92,27 @@ #include "ngknet_procfs.h" #include "ngknet_callback.h" #include "ngknet_ptp.h" -#include "ngknet_xdp.h" -#include "ngknet_xsk.h" +/* FIXME: SAI_FIXUP */ #if SAI_FIXUP && KNET_SVTAG_HOTFIX /* SONIC-76482 */ #define NGKNET_IOC_SVTAG_SET (SIOCDEVPRIVATE + 0) #define NGKNET_IOC_SVTAG_MAGIC 0x53565447 /* "SVTG" */ #define NGKNET_NETIF_F_DEL_SVTAG (1U << 15) /* Remove SVTAG from the RX packets */ #define NGKNET_NETIF_F_ADD_SVTAG (1U << 14) /* Insert SVTAG into the TX packets */ + +/* Enum to define SVTAG packet type */ #define NGKNET_SVTAG_PKTYPE_NONMACSEC 0 /* Unsecure data packet (Untag Control Port packet) */ #define NGKNET_SVTAG_PKTYPE_MACSEC 1 /* Secure data packet (Tag Controlled Port packet) */ #define NGKNET_SVTAG_PKTYPE_KAY 2 /* KaY Frame (KaY Uncontrolled Port packet) */ + +/* Struct for SVTAG ioctl */ struct ifru_svtag { uint32_t magic; uint32_t flags; uint8_t svtag[4]; }; #endif + /*! \cond */ MODULE_AUTHOR("Broadcom Corporation"); MODULE_DESCRIPTION("Network Device Driver Module"); @@ -179,13 +182,6 @@ MODULE_PARM_DESC(page_buffer_mode, "Enable SKB page buffer mode (default 0 for legacy SKB mode)"); /*! \endcond */ -/*! \cond */ -int xsk_napi_tx = 0; -MODULE_PARAM(xsk_napi_tx, int, 0); -MODULE_PARM_DESC(xsk_napi_tx, -"Use NAPI to transmit XSK packet (default 0 to use kernel thread)"); -/*! \endcond */ - typedef int (*drv_ops_attach)(struct pdma_dev *dev); struct bcmcnet_drv_ops { @@ -226,13 +222,94 @@ struct ngknet_intr_handle { static struct ngknet_intr_handle priv_hdl[NUM_PDMA_DEV_MAX][NUM_Q_MAX]; +/*! + * Dump packet content for debug + */ +static void +ngknet_pkt_dump(uint8_t *data, int len) +{ + char str[128]; + int i; + + len = len > 256 ? 256 : len; + + for (i = 0; i < len; i++) { + if ((i & 0x1f) == 0) { + sprintf(str, "%04x: ", i); + } + sprintf(&str[strlen(str)], "%02x", data[i]); + if ((i & 0x1f) == 0x1f) { + sprintf(&str[strlen(str)], "\n"); + printk(str); + continue; + } + if ((i & 0x3) == 0x3) { + sprintf(&str[strlen(str)], " "); + } + } + if ((i & 0x1f) != 0) { + sprintf(&str[strlen(str)], "\n"); + printk(str); + } + printk("\n"); +} + +/*! + * Rx packets rate test for debug + */ +static void +ngknet_pkt_stats(struct pdma_dev *pdev, int dir) +{ + s64 ts0[2], ts1[2]; + static uint32_t pkts[2] = {0}, prts[2] = {0}; + static uint64_t intrs = 0; + uint32_t iv_time; + uint32_t pps; + uint32_t boudary; + + if (rx_rate_limit == -1 || rx_rate_limit >= 100000) { + /* Dump every 100K packets */ + boudary = 100000; + } else if (rx_rate_limit >= 10000) { + /* Dump every 10K packets */ + boudary = 10000; + } else { + /* Dump every 1K packets */ + boudary = 1000; + } + + if (pkts[dir] == 0) { + ts0[dir] = kal_time_usecs(); + intrs = pdev->stats.intrs; + } + if (++pkts[dir] >= boudary) { + ts1[dir] = kal_time_usecs(); + iv_time = ts1[dir] - ts0[dir]; + pps = boudary * 1000 / (iv_time / 1000); + prts[dir]++; + /* pdev->stats.intrs is reset and re-count from 0. */ + if (intrs > pdev->stats.intrs) { + intrs = 0; + } + if (pps <= boudary || prts[dir] * boudary >= pps) { + printk(KERN_CRIT "%s - limit: %d pps, %dK pkts time: %d usec, " + "rate: %d pps, intrs: %llu\n", + dir == PDMA_Q_RX ? "Rx" : "Tx", + dir == PDMA_Q_RX ? rx_rate_limit : -1, (boudary / 1000), + iv_time, pps, pdev->stats.intrs - intrs); + prts[dir] = 0; + } + pkts[dir] = 0; + } +} + /*! * Read 32-bit register callback */ static int -ngknet_dev_read32(struct pdma_dev *pdev, uint32_t addr, uint32_t *data) +ngknet_dev_read32(struct pdma_dev *dev, uint32_t addr, uint32_t *data) { - *data = ngbde_kapi_pio_read32(pdev->unit, addr); + *data = ngbde_kapi_pio_read32(dev->unit, addr); return 0; } @@ -241,9 +318,9 @@ ngknet_dev_read32(struct pdma_dev *pdev, uint32_t addr, uint32_t *data) * Write 32-bit register callback */ static int -ngknet_dev_write32(struct pdma_dev *pdev, uint32_t addr, uint32_t data) +ngknet_dev_write32(struct pdma_dev *dev, uint32_t addr, uint32_t data) { - ngbde_kapi_pio_write32(pdev->unit, addr, data); + ngbde_kapi_pio_write32(dev->unit, addr, data); return 0; } @@ -327,9 +404,13 @@ ngknet_rx_frame_process(struct net_device *ndev, struct sk_buff **oskb) if (priv->hwts_rx_filter) { ngknet_ptp_rx_hwts_set(ndev, skb); } + + /* Check to ensure ngknet_callback_desc struct fits in sk_buff->cb */ BUILD_BUG_ON(sizeof(struct ngknet_callback_desc) > sizeof(skb->cb)); #if SAI_FIXUP && KNET_SVTAG_HOTFIX /* SONIC-76482 */ + /* Strip SVTAG from the packets injected by the MACSEC block */ if (priv->netif.flags & NGKNET_NETIF_F_DEL_SVTAG) { + /* Strip SVTAG (4 bytes) */ if (priv->netif.flags & NGKNET_NETIF_F_RCPU_ENCAP) { offset = PKT_HDR_SIZE + meta_len + 2*ETH_ALEN; memmove(skb->data + offset, skb->data + offset + 4, skb->len - offset - 4); @@ -642,9 +723,6 @@ ngknet_tx_frame_process(struct net_device *ndev, struct sk_buff **oskb) /* Set up packet header */ if (priv->netif.flags & NGKNET_NETIF_F_RCPU_ENCAP) { - if (rch->flags & RCPU_FLAG_KEEP_FCS) { - fcs_len = 0; - } /* RCPU encapsulation packet */ data_len = pkh->attrs & PDMA_TX_HDR_COOKED ? pkh->data_len - fcs_len : ntohs(rch->data_len); @@ -763,6 +841,7 @@ ngknet_tx_frame_process(struct net_device *ndev, struct sk_buff **oskb) tag_len = VLAN_HLEN; } #if SAI_FIXUP && KNET_SVTAG_HOTFIX /* SONIC-76482 */ + /* XGS MACSEC: Add SVTAG (Secure Vlan TAG) */ if (priv->netif.flags & NGKNET_NETIF_F_ADD_SVTAG) { uint16_t ether_type = 0; static const uint16_t mgmt_et = 0x888e; @@ -844,7 +923,6 @@ static void ngknet_ndev_detach(struct pdma_dev *pdev) { struct ngknet_dev *dev = (struct ngknet_dev *)pdev->priv; - struct net_device *ndev; int vdi; netif_tx_lock(dev->net_dev); @@ -852,13 +930,12 @@ ngknet_ndev_detach(struct pdma_dev *pdev) netif_tx_unlock(dev->net_dev); for (vdi = 1; vdi <= NUM_VDEV_MAX; vdi++) { - ndev = dev->vdev[vdi]; - if (!ndev) { + if (!dev->vdev[vdi]) { continue; } - netif_tx_lock(ndev); - netif_device_detach(ndev); - netif_tx_unlock(ndev); + netif_tx_lock(dev->vdev[vdi]); + netif_device_detach(dev->vdev[vdi]); + netif_tx_unlock(dev->vdev[vdi]); } } @@ -869,7 +946,6 @@ static void ngknet_ndev_attach(struct pdma_dev *pdev) { struct ngknet_dev *dev = (struct ngknet_dev *)pdev->priv; - struct net_device *ndev; int vdi; netif_tx_lock(dev->net_dev); @@ -877,21 +953,12 @@ ngknet_ndev_attach(struct pdma_dev *pdev) netif_tx_unlock(dev->net_dev); for (vdi = 1; vdi <= NUM_VDEV_MAX; vdi++) { - ndev = dev->vdev[vdi]; - if (!ndev) { + if (!dev->vdev[vdi]) { continue; } - netif_tx_lock(ndev); - netif_device_attach(ndev); - netif_tx_unlock(ndev); -#ifdef NGKNET_XDP_NATIVE - if (((struct ngknet_private *)netdev_priv(ndev))->xsk_zc) { - int qi; - for (qi = 0; qi < pdev->ctrl.nb_txq; qi++) { - ngknet_xsk_wakeup(ndev, qi, XDP_WAKEUP_TX); - } - } -#endif + netif_tx_lock(dev->vdev[vdi]); + netif_device_attach(dev->vdev[vdi]); + netif_tx_unlock(dev->vdev[vdi]); } } @@ -902,7 +969,6 @@ static void ngknet_tx_suspend(struct pdma_dev *pdev, int queue) { struct ngknet_dev *dev = (struct ngknet_dev *)pdev->priv; - struct net_device *ndev; unsigned long flags; int vdi; @@ -910,11 +976,10 @@ ngknet_tx_suspend(struct pdma_dev *pdev, int queue) spin_lock_irqsave(&dev->lock, flags); for (vdi = 1; vdi <= NUM_VDEV_MAX; vdi++) { - ndev = dev->vdev[vdi]; - if (!ndev) { + if (!dev->vdev[vdi]) { continue; } - netif_stop_subqueue(ndev, queue); + netif_stop_subqueue(dev->vdev[vdi], queue); } spin_unlock_irqrestore(&dev->lock, flags); } @@ -926,42 +991,21 @@ static void ngknet_tx_resume(struct pdma_dev *pdev, int queue) { struct ngknet_dev *dev = (struct ngknet_dev *)pdev->priv; - struct net_device *ndev; unsigned long flags; - static int start_index[NUM_PDMA_DEV_MAX]; - int vdi = start_index[pdev->unit]; - int vdn = 0; + int vdi; if (__netif_subqueue_stopped(dev->net_dev, queue)) { netif_wake_subqueue(dev->net_dev, queue); } spin_lock_irqsave(&dev->lock, flags); - vdi = vdi > 0 ? vdi : NUM_VDEV_MAX; - while (1) { - ndev = dev->vdev[vdi]; - if (ndev) { - if (__netif_subqueue_stopped(ndev, queue)) { - netif_wake_subqueue(ndev, queue); - } -#ifdef NGKNET_XDP_NATIVE - if (((struct ngknet_private *)netdev_priv(ndev))->xsk_zc) { - ngknet_xsk_wakeup(ndev, queue, XDP_WAKEUP_TX); - } -#endif - start_index[pdev->unit] = vdi; + for (vdi = 1; vdi <= NUM_VDEV_MAX; vdi++) { + if (!dev->vdev[vdi]) { + continue; } - - /* - * Exits if all devices are done and vdi indexes the last resumed device. - * As such, every device has the same chance of being waken up first. - */ - if (++vdn == NUM_VDEV_MAX) { - break; + if (__netif_subqueue_stopped(dev->vdev[vdi], queue)) { + netif_wake_subqueue(dev->vdev[vdi], queue); } - - /* Increases vdi by 1 in a circular manner within the specified range */ - vdi = ++vdi > NUM_VDEV_MAX ? 1 : vdi; } spin_unlock_irqrestore(&dev->lock, flags); @@ -1025,12 +1069,6 @@ ngknet_poll(struct napi_struct *napi, int budget) work_done = bcmcnet_queue_poll(pdev, hdl, budget); } -#ifdef NGKNET_XDP_NATIVE - if (dev->xsk_pool && xsk_napi_tx) { - work_done = max(ngknet_xsk_napi_tx(dev, hdl, budget), work_done); - } -#endif - if (work_done < budget) { kih->napi_resched = 0; napi_complete(napi); @@ -1418,7 +1456,7 @@ ngknet_start_xmit(struct sk_buff *skb, struct net_device *ndev) } /* Schedule Tx queue */ - ngknet_tx_queue_schedule(dev, (struct pkt_buf *)skb->data, &queue); + ngknet_tx_queue_schedule(dev, skb, &queue); skb->queue_mapping = queue; DBG_VERB(("Tx packet (%d bytes).\n", skb->len)); @@ -1433,7 +1471,7 @@ ngknet_start_xmit(struct sk_buff *skb, struct net_device *ndev) skb_tx_timestamp(skb); - rv = pdev->pkt_xmit(pdev, queue, &skb->data); + rv = pdev->pkt_xmit(pdev, queue, skb); if (rv == SHR_E_BUSY) { DBG_WARN(("Tx suspend: DMA device is busy and temporarily " @@ -1531,6 +1569,7 @@ ngknet_do_ioctl(struct net_device *ndev, struct ifreq *ifr, int cmd) #if SAI_FIXUP && KNET_SVTAG_HOTFIX /* SONIC-76482 */ if (cmd == NGKNET_IOC_SVTAG_SET) { struct ifru_svtag req; + if (copy_from_user(&req, ifr->ifr_data, sizeof(req))) return -EFAULT; if (ntohl(req.magic) != NGKNET_IOC_SVTAG_MAGIC) @@ -1640,11 +1679,6 @@ static const struct net_device_ops ngknet_netdev_ops = { #ifdef CONFIG_NET_POLL_CONTROLLER .ndo_poll_controller = ngknet_poll_controller, #endif -#ifdef NGKNET_XDP_NATIVE - .ndo_bpf = ngknet_xdp_setup, - .ndo_xdp_xmit = ngknet_xdp_xmit, - .ndo_xsk_wakeup = ngknet_xsk_wakeup, -#endif }; static void @@ -1668,13 +1702,8 @@ ngknet_get_ts_info(struct net_device *ndev, struct kernel_ethtool_ts_info *info) SOF_TIMESTAMPING_RX_SOFTWARE | SOF_TIMESTAMPING_SOFTWARE | SOF_TIMESTAMPING_RAW_HARDWARE; - info->tx_types = - (1 << HWTSTAMP_TX_OFF) | - (1 << HWTSTAMP_TX_ON) | - (1 << HWTSTAMP_TX_ONESTEP_SYNC); - info->rx_filters = - (1 << HWTSTAMP_FILTER_NONE) | - (1 << HWTSTAMP_FILTER_ALL); + info->tx_types = 1 << HWTSTAMP_TX_OFF | 1 << HWTSTAMP_TX_ON | 1 << HWTSTAMP_TX_ONESTEP_SYNC; + info->rx_filters = 1 << HWTSTAMP_FILTER_NONE | 1 << HWTSTAMP_FILTER_ALL; rv = ngknet_ptp_phc_index_get(ndev, &info->phc_index); if (SHR_FAILURE(rv)) { info->phc_index = -1; @@ -1804,16 +1833,6 @@ ngknet_ndev_init(ngknet_netif_t *netif, struct net_device **nd) NETIF_F_HIGHDMA | NETIF_F_HW_VLAN_CTAG_RX; -#ifdef NGKNET_XDP_NATIVE -#if (LINUX_VERSION_CODE >= KERNEL_VERSION(6,3,0)) - ndev->xdp_features = NETDEV_XDP_ACT_BASIC | - NETDEV_XDP_ACT_REDIRECT | - NETDEV_XDP_ACT_NDO_XMIT | - NETDEV_XDP_ACT_XSK_ZEROCOPY; -#endif -#endif - - dev_net_set(ndev, current->nsproxy->net_ns); /* Register the kernel network device */ rv = register_netdev(ndev); if (rv < 0) { @@ -2500,14 +2519,6 @@ ngknet_ioctl(struct file *file, unsigned int cmd, unsigned long arg) ioc.rc = SHR_E_NONE; - if (ioc.unit >= NUM_PDMA_DEV_MAX) { - ioc.rc = SHR_E_PARAM; - if (copy_to_user((void *)arg, &ioc, sizeof(ioc))) { - return -EFAULT; - } - return 0; - } - dev = &ngknet_devices[ioc.unit]; pdev = &dev->pdma_dev; @@ -2559,16 +2570,13 @@ ngknet_ioctl(struct file *file, unsigned int cmd, unsigned long arg) sizeof(*dev_cfg), ioc.op.data.len)) { return -EFAULT; } - if (!dev_cfg->bm_grp || dev_cfg->bm_grp >= (1 << NUM_GRP_MAX)) { + if (!dev_cfg->name[0] || !dev_cfg->bm_grp || + dev_cfg->bm_grp >= (1 << NUM_GRP_MAX)) { DBG_WARN(("Invalid parameter: name=%s, bm_grp=0x%x\n", dev_cfg->name, dev_cfg->bm_grp)); ioc.rc = SHR_E_PARAM; break; } - if (dev_cfg->name[0] == '\0') { - snprintf(dev_cfg->name, sizeof(dev_cfg->name), "%s%d", - base_dev_name, ioc.unit); - } memset(pdev, 0, sizeof(*pdev)); strscpy(pdev->name, dev_cfg->name, sizeof(pdev->name)); pdev->dev_id = dev_cfg->dev_id; diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_main.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/knet/ngknet_main.h similarity index 91% rename from platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_main.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/knet/ngknet_main.h index 0e41475a032..852bac334b7 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_main.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/knet/ngknet_main.h @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -30,12 +29,6 @@ #include #include -#ifdef NGKNET_XDP_NATIVE -#include -#include -#include -#endif - /*! * Debug levels */ @@ -68,8 +61,11 @@ /* Take over the control of SKB and send packet to network interface. */ typedef void (*ngknet_pkt_recv_f)(struct net_device *ndev, struct sk_buff *skb); + +/* FIXME: SAI_FIXUP */ #define SAI_FIXUP 1 #define KNET_SVTAG_HOTFIX 1 + /*! * Device description */ @@ -143,23 +139,10 @@ struct ngknet_dev { /*! NGKNET work queue for link process */ struct workqueue_struct *link_wq; -#ifdef NGKNET_XDP_NATIVE - /*! XSK buffer pool */ - struct xsk_buff_pool *xsk_pool; - - /*! XSK Tx queue */ - int xsk_queue; - - /* XDP program number */ - int xprog_num; -#endif - /*! Flags */ int flags; /*! NGKNET device is active */ #define NGKNET_DEV_ACTIVE (1 << 0) - /*! NGKNET AF_XDP in Zero-copy mode */ -#define NGKNET_XSK_ZC (1 << 1) }; /*! @@ -178,17 +161,6 @@ struct ngknet_private { /*! Network interface */ ngknet_netif_t netif; -#ifdef NGKNET_XDP_NATIVE - /*! XDP program */ - struct bpf_prog *xdp_prog; - - /*! XDP Rx info */ - struct xdp_rxq_info xri; - - /*! XSK ZC mode */ - bool xsk_zc; -#endif - /*! Packet receive callback */ ngknet_pkt_recv_f pkt_recv; @@ -212,6 +184,7 @@ struct ngknet_private { struct ethtool_link_settings link_settings; #endif #if SAI_FIXUP && KNET_SVTAG_HOTFIX /* SONIC-76482 */ + /* ! MACSEC SVTAG */ uint8_t svtag[4]; #endif }; diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_procfs.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/knet/ngknet_procfs.c similarity index 91% rename from platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_procfs.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/knet/ngknet_procfs.c index 8c2f8be8751..8527fb6a236 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_procfs.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/knet/ngknet_procfs.c @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -25,7 +24,6 @@ #include #include "ngknet_main.h" #include "ngknet_extra.h" -#include "ngknet_procfs.h" extern struct ngknet_dev ngknet_devices[]; @@ -188,11 +186,9 @@ static int proc_filter_info_show(struct seq_file *m, void *v) { struct ngknet_dev *dev; - struct filt_ctrl *fc; - ngknet_filter_t filt; - uint64_t hits; - unsigned long flags; - int di, id, dn = 0, fn = 0; + ngknet_filter_t filt = {0}; + int di, dn = 0, fn = 0; + int rv; for (di = 0; di < NUM_PDMA_DEV_MAX; di++) { dev = &ngknet_devices[di]; @@ -201,17 +197,13 @@ proc_filter_info_show(struct seq_file *m, void *v) } dn++; - for (id = 1; id <= NUM_FILTER_MAX; id++) { - spin_lock_irqsave(&dev->lock, flags); - fc = (struct filt_ctrl *)dev->fc[id]; - if (!fc) { - spin_unlock_irqrestore(&dev->lock, flags); - continue; + do { + rv = ngknet_filter_get_next(dev, &filt); + if (SHR_FAILURE(rv)) { + printk("ngknet: get device%d filter failed\n", di); + break; } - memcpy(&filt, &fc->filt, sizeof(filt)); - hits = fc->hits; fn++; - spin_unlock_irqrestore(&dev->lock, flags); seq_printf(m, "\n"); seq_printf(m, "dev_no: %d\n", di); @@ -238,8 +230,8 @@ proc_filter_info_show(struct seq_file *m, void *v) proc_data_show(m, filt.mask.b, filt.oob_data_size + filt.pkt_data_size); seq_printf(m, "user_data: "); proc_data_show(m, filt.user_data, NGKNET_FILTER_USER_DATA); - seq_printf(m, "hits: %llu\n", hits); - } + seq_printf(m, "hits: %llu\n", ((struct filt_ctrl *)dev->fc[filt.id])->hits); + } while (filt.next); } if (!dn) { @@ -278,10 +270,9 @@ proc_netif_info_show(struct seq_file *m, void *v) struct ngknet_dev *dev; struct net_device *ndev; struct ngknet_private *priv; - ngknet_netif_t netif; - struct net_device_stats stats; - unsigned long flags; - int di, ma, id, dn = 0, nn = 0; + ngknet_netif_t netif = {0}; + int di, ma, dn = 0, nn = 0; + int rv; for (di = 0; di < NUM_PDMA_DEV_MAX; di++) { dev = &ngknet_devices[di]; @@ -290,18 +281,15 @@ proc_netif_info_show(struct seq_file *m, void *v) } dn++; - for (id = 0; id <= NUM_VDEV_MAX; id++) { - spin_lock_irqsave(&dev->lock, flags); - ndev = id == 0 ? dev->net_dev : dev->vdev[id]; - if (!ndev) { - spin_unlock_irqrestore(&dev->lock, flags); - continue; + do { + rv = ngknet_netif_get_next(dev, &netif); + if (SHR_FAILURE(rv)) { + printk("ngknet: get device%d netif failed\n", di); + break; } - priv = netdev_priv(ndev); - memcpy(&netif, &priv->netif, sizeof(netif)); - memcpy(&stats, &priv->stats, sizeof(stats)); nn++; - spin_unlock_irqrestore(&dev->lock, flags); + ndev = netif.id == 0 ? dev->net_dev : dev->vdev[netif.id]; + priv = netdev_priv(ndev); seq_printf(m, "\n"); seq_printf(m, "dev_no: %d\n", di); @@ -327,15 +315,15 @@ proc_netif_info_show(struct seq_file *m, void *v) proc_data_show(m, netif.meta_data, netif.meta_len); seq_printf(m, "user_data: "); proc_data_show(m, netif.user_data, NGKNET_NETIF_USER_DATA); - seq_printf(m, "rx_packets: %lu\n", stats.rx_packets); - seq_printf(m, "rx_bytes: %lu\n", stats.rx_bytes); - seq_printf(m, "rx_dropped: %lu\n", stats.rx_dropped); - seq_printf(m, "rx_errors: %lu\n", stats.rx_errors); - seq_printf(m, "tx_packets: %lu\n", stats.tx_packets); - seq_printf(m, "tx_bytes: %lu\n", stats.tx_bytes); - seq_printf(m, "tx_dropped: %lu\n", stats.tx_dropped); - seq_printf(m, "tx_errors: %lu\n", stats.tx_errors); - } + seq_printf(m, "rx_packets: %lu\n", priv->stats.rx_packets); + seq_printf(m, "rx_bytes: %lu\n", priv->stats.rx_bytes); + seq_printf(m, "rx_dropped: %lu\n", priv->stats.rx_dropped); + seq_printf(m, "rx_errors: %lu\n", priv->stats.rx_errors); + seq_printf(m, "tx_packets: %lu\n", priv->stats.tx_packets); + seq_printf(m, "tx_bytes: %lu\n", priv->stats.tx_bytes); + seq_printf(m, "tx_dropped: %lu\n", priv->stats.tx_dropped); + seq_printf(m, "tx_errors: %lu\n", priv->stats.tx_errors); + } while (netif.next); } if (!dn) { diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_procfs.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/knet/ngknet_procfs.h similarity index 95% rename from platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_procfs.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/knet/ngknet_procfs.h index a1168e55201..e1eb263909e 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_procfs.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/knet/ngknet_procfs.h @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_ptp.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/knet/ngknet_ptp.c similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_ptp.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/knet/ngknet_ptp.c index a77b54fa88c..37920eb9fac 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_ptp.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/knet/ngknet_ptp.c @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_ptp.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/knet/ngknet_ptp.h similarity index 98% rename from platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_ptp.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/knet/ngknet_ptp.h index 932497dd42a..77946aa2061 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_ptp.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/knet/ngknet_ptp.h @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/knetcb/Kbuild b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/knetcb/Kbuild new file mode 100644 index 00000000000..e9b4a476232 --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/knetcb/Kbuild @@ -0,0 +1,40 @@ +# -*- Kbuild -*- +# +# Linux KNET Callback module. +# +# Copyright 2018-2024 Broadcom. All rights reserved. +# The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License +# version 2 as published by the Free Software Foundation. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# A copy of the GNU General Public License version 2 (GPLv2) can +# be found in the LICENSES folder. +# + +ifneq ($(OUTPUT_DIR),) +INCLUDES := -I$(OUTPUT_DIR)/knet/generated/include -I$(OUTPUT_DIR)/knet/generated +endif +obj-m := linux_ngknetcb.o + +ccflags-y := $(SDK_PMD_KFLAGS) $(LKM_CFLAGS) $(LKM_CPPFLAGS) \ + -I$(SDK)/shr/include \ + -I$(SDK)/bcmdrd/include \ + -I$(SDK)/bcmltd/include \ + -I$(SDK)/bcmlrd/include \ + -I$(SDK)/bcmcnet/include \ + -I$(SDK)/linux/include \ + -I$(SDK)/linux/knetcb \ + -I$(SDK)/linux/knet \ + -I$(SDK)/linux/knet/generated/include \ + -I$(SDK)/linux/knet/generated \ + $(INCLUDES) + +linux_ngknetcb-y := $(SDK_PMD_KOBJS) \ + ngknetcb_main.o diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/knetcb/Makefile b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/knetcb/Makefile new file mode 100644 index 00000000000..89829f06b53 --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/knetcb/Makefile @@ -0,0 +1,54 @@ +# +# Copyright 2018-2024 Broadcom. All rights reserved. +# The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License +# version 2 as published by the Free Software Foundation. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# A copy of the GNU General Public License version 2 (GPLv2) can +# be found in the LICENSES folder. +# +# Linux KNET Callback module. +# + +# Include PMD library by default +ifneq (0,$(KPMD)) + +# Kernel module source directory +KMODDIR = $(CURDIR) + +# Avoid creating links in original kernel module source directory +GENDIR = $(KMODDIR)/generated +ifneq ($(OUTPUT_DIR),) +GENDIR = $(OUTPUT_DIR)/knet/generated/knetcb +endif +knetcb: kpmd + $(MAKE) -C $(GENDIR) all + +# SDK make helper for stand-alone PMD kernel module +include $(SDK)/make/kpmd.mk + +distclean:: + rm -rf $(GENDIR) + +endif # KPMD + +include Kbuild + +ifeq ($(KERNELRELEASE),) + +MOD_NAME = linux_ngknetcb + +include $(SDK)/make/lkm.mk + +endif + +.PHONY: distclean + +distclean:: diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knetcb/ngknetcb_main.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/knetcb/ngknetcb_main.c similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/linux/knetcb/ngknetcb_main.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/knetcb/ngknetcb_main.c index 8dcaa29342a..eab43fe6ab0 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/knetcb/ngknetcb_main.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/knetcb/ngknetcb_main.c @@ -4,7 +4,7 @@ * */ /* - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -129,7 +129,7 @@ static const struct { /* Change this structure to reflect the match_ids of interest. This is an example of how it can be used. - */ +*/ typedef struct cb_match_id_s { int egress_pkt_fwd_l2_hdr_etag; int egress_pkt_fwd_l2_hdr_l2; @@ -282,7 +282,7 @@ get_tag_status(uint32_t dev_type, uint32_t variant, void *rxpmd) /* Trident4 family. */ uint32_t match_id_data[2]; bool itag = false, otag = false; - + bcmpkt_rxpmd_field_get(dev_type, rxpmd, BCMPKT_RXPMD_MATCH_ID_LO, &match_id_data[0]); bcmpkt_rxpmd_field_get(dev_type, rxpmd, BCMPKT_RXPMD_MATCH_ID_HI, @@ -372,7 +372,7 @@ dump_buffer(uint8_t * data, int size) buffer_ptr = buffer; printk(KERN_INFO "%04X %s\n", addr, buffer); addr = i + 1; - } + } } } @@ -404,7 +404,7 @@ strip_tag_rx_cb(struct sk_buff *skb) uint32_t dev_type = 0; bcmlrd_variant_t var_type; uint32_t *rxpmd = NULL; - + unit = cbd->dinfo->dev_no; rxpmd = (uint32_t *)cbd->pmd; rcpu_mode = (cbd->netif->flags & NGKNET_NETIF_F_RCPU_ENCAP)? 1 : 0; @@ -594,7 +594,7 @@ static struct proc_ops ngknetcb_proc_ops = { #ifdef KPMD /* Initialize the desired match_ids for use later in the code. - */ +*/ static void init_match_ids(int unit) { diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/ptpclock/Kbuild b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/ptpclock/Kbuild new file mode 100644 index 00000000000..b219dbfb084 --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/ptpclock/Kbuild @@ -0,0 +1,30 @@ +# -*- Kbuild -*- +# +# Linux PTP Clock module. +# +# Copyright 2018-2024 Broadcom. All rights reserved. +# The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License +# version 2 as published by the Free Software Foundation. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# A copy of the GNU General Public License version 2 (GPLv2) can +# be found in the LICENSES folder. +# + +obj-m := linux_ngptpclock.o + +ccflags-y := $(LKM_CFLAGS) $(LKM_CPPFLAGS) \ + -I$(SDK)/shr/include \ + -I$(SDK)/bcmdrd/include \ + -I$(SDK)/linux/include \ + -I$(SDK)/linux/knet/include \ + -I$(SDK)/linux/knet + +linux_ngptpclock-y := ngptpclock_main.o diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/ptpclock/Makefile b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/ptpclock/Makefile new file mode 100644 index 00000000000..15b7b553fe6 --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/ptpclock/Makefile @@ -0,0 +1,32 @@ +# +# Copyright 2018-2024 Broadcom. All rights reserved. +# The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License +# version 2 as published by the Free Software Foundation. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# A copy of the GNU General Public License version 2 (GPLv2) can +# be found in the LICENSES folder. +# +# Linux PTP clock module. +# + +include Kbuild + +ifeq ($(KERNELRELEASE),) + +MOD_NAME = linux_ngptpclock + +include $(SDK)/make/lkm.mk + +endif + +.PHONY: distclean + +distclean:: diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/ptpclock/ngptpclock_main.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/ptpclock/ngptpclock_main.c similarity index 86% rename from platform/broadcom/saibcm-modules/sdklt/linux/ptpclock/ngptpclock_main.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/ptpclock/ngptpclock_main.c index 32142736a7f..95c76731b0e 100644 --- a/platform/broadcom/saibcm-modules/sdklt/linux/ptpclock/ngptpclock_main.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/ptpclock/ngptpclock_main.c @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -37,7 +36,8 @@ MODULE_AUTHOR("Broadcom Corporation"); MODULE_DESCRIPTION("PTP Clock Driver for Broadcom XGS Switch"); MODULE_LICENSE("GPL"); -#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4,4,0)) +#if ((LINUX_VERSION_CODE >= KERNEL_VERSION(4,4,0)) && \ + (LINUX_VERSION_CODE < KERNEL_VERSION(6,0,0))) #define NGPTPCLOCK_SUPPORT #endif @@ -169,12 +169,6 @@ static u32 hostcmd_regs[5] = { 0 }; #define NGPTPCLOCK_MAX_NUM_PORTS 256 /* Max ever NUM_PORTS in the system. */ #define NGPTPCLOCK_MAX_MTP_IDX 8 /* Max number of mtps in the system. */ -#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5,3,0)) -#define FREQ_CORR adjfine -#else -#define FREQ_CORR adjfreq -#endif - /* Service request commands to Firmware. */ enum { NGPTPCLOCK_DONE = 0x0, @@ -207,12 +201,10 @@ enum { }; enum { - NGPTPCLOCK_BROADSYNC_BS0_CONFIG = 0x1, - NGPTPCLOCK_BROADSYNC_BS1_CONFIG = 0x2, - NGPTPCLOCK_BROADSYNC_BS0_STATUS_GET = 0x3, - NGPTPCLOCK_BROADSYNC_BS1_STATUS_GET = 0x4, - NGPTPCLOCK_BROADSYNC_BS0_PHASE_OFFSET_SET = 0x5, - NGPTPCLOCK_BROADSYNC_BS1_PHASE_OFFSET_SET = 0x6, + NGPTPCLOCK_BROADSYNC_BS0_CONFIG = 0x1, + NGPTPCLOCK_BROADSYNC_BS1_CONFIG = 0x2, + NGPTPCLOCK_BROADSYNC_BS0_STATUS_GET = 0x3, + NGPTPCLOCK_BROADSYNC_BS1_STATUS_GET = 0x4, }; enum { @@ -356,24 +348,10 @@ typedef struct ngptpclock_extts_log_s { u32 overflow; } __attribute__ ((packed)) ngptpclock_fw_extts_log_t; -typedef struct ngptpclock_fw_comm_s { - u32 cmd; - u32 dw1[2]; - u32 dw2[2]; - u32 head; /* Read pointer - Updated by HOST */ - u32 tail; /* Write pointer - Updated by FW */ -} __attribute__ ((packed)) ngptpclock_fw_comm_t; - -typedef struct ngptpclock_extts_event_s { +struct ngptpclock_extts_event { int enable[NUM_EXT_TS]; int head; -} ngptpclock_extts_event_t; - -typedef struct ngptpclock_time_spec_s { - int sign; /* 0: positive, 1:negative */ - uint64_t sec; /* 47bit of secs */ - uint32_t nsec; /* 30bit of nsecs */ -} ngptpclock_time_spec_t; +}; typedef struct ngptpclock_port_stats_s { u32 pkt_rxctr; /* All ingress packets */ @@ -397,7 +375,6 @@ typedef struct ngptpclock_init_info_s { u32 host_cpu_port; u32 host_cpu_sysport; u32 udh_len; - u8 application_v2; } ngptpclock_init_info_t; typedef struct ngptpclock_bs_info_s { @@ -405,7 +382,6 @@ typedef struct ngptpclock_bs_info_s { u32 mode; u32 bc; u32 hb; - ngptpclock_time_spec_t offset; } ngptpclock_bs_info_t; typedef struct ngptpclock_gpio_info_s { @@ -443,10 +419,9 @@ struct ngptpclock_ptp_priv { ngptpclock_gpio_info_t ngptpclock_gpio_info[6]; ngptpclock_evlog_info_t ngptpclock_evlog_info[NUM_TS_EVENTS]; volatile ngptpclock_fw_extts_log_t *extts_log; - ngptpclock_extts_event_t extts_event; + struct ngptpclock_extts_event extts_event; struct delayed_work extts_logging; struct kobject *kobj; - volatile ngptpclock_fw_comm_t *fw_comm; }; static struct ngptpclock_ptp_priv *ptp_priv; @@ -511,45 +486,6 @@ ptp_sleep(int jiffies) wait_event_timeout(wq, 0, jiffies); } -/** - * ngptpclock_fw_core_valid - * - * @dev_info: device info from knet. - * @fw_core: core number to be validated. - * - * Description: This function is used to validate the - * firmware core number. - * Returns "1" if the core number is valid and "0" otherwise. - */ -static int ngptpclock_fw_core_valid(ngknet_dev_info_t *dev_info, int fw_core) -{ - int num_cores = 0; - uint32_t dev_id = ((dev_info->dev_id >> 4) << 4); - - switch (dev_id) { - case 0xf900: - num_cores = 6; - break; - - case 0xb990: - case 0xb780: - case 0xb880: - case 0xb890: - num_cores = 4; - break; - - default: - num_cores = 2; - break; - } - - if ((fw_core < 0) || (fw_core >= num_cores)) { - return 0; - } else { - return 1; - } -} - /** * ngptpclock_hostcmd_data_op * @@ -560,7 +496,8 @@ static int ngptpclock_fw_core_valid(ngknet_dev_info_t *dev_info, int fw_core) * Description: This function is used send and receive the * data from the FW. */ -static void ngptpclock_hostcmd_data_op(int setget, u64 *d1, u64 *d2) +static void +ngptpclock_hostcmd_data_op(int setget, u64 *d1, u64 *d2) { u32 w0, w1; u64 data; @@ -572,54 +509,32 @@ static void ngptpclock_hostcmd_data_op(int setget, u64 *d1, u64 *d2) if (setget) { if (d1) { data = *d1; - if (ptp_priv->fw_comm) { - ptp_priv->fw_comm->dw1[0] = (data & 0xFFFFFFFF); - ptp_priv->fw_comm->dw1[1] = (data >> 32); - } else { - w0 = (data & 0xFFFFFFFF); - w1 = (data >> 32); - DEV_WRITE32(ptp_priv, hostcmd_regs[1], w0); - DEV_WRITE32(ptp_priv, hostcmd_regs[2], w1); - } + w0 = (data & 0xFFFFFFFF); + w1 = (data >> 32); + DEV_WRITE32(ptp_priv, hostcmd_regs[1], w0); + DEV_WRITE32(ptp_priv, hostcmd_regs[2], w1); } if (d2) { data = *d2; - if (ptp_priv->fw_comm) { - ptp_priv->fw_comm->dw2[0] = (data & 0xFFFFFFFF); - ptp_priv->fw_comm->dw2[1] = (data >> 32); - } else { - w0 = (data & 0xFFFFFFFF); - w1 = (data >> 32); - DEV_WRITE32(ptp_priv, hostcmd_regs[3], w0); - DEV_WRITE32(ptp_priv, hostcmd_regs[4], w1); - } - } + w0 = (data & 0xFFFFFFFF); + w1 = (data >> 32); + DEV_WRITE32(ptp_priv, hostcmd_regs[3], w0); + DEV_WRITE32(ptp_priv, hostcmd_regs[4], w1); + } } else { if (d1) { - if (ptp_priv->fw_comm) { - w0 = ptp_priv->fw_comm->dw1[0]; - w1 = ptp_priv->fw_comm->dw1[1]; - data = (((u64)w1 << 32) | (w0)); - } else { - DEV_READ32(ptp_priv, hostcmd_regs[1], &w0); - DEV_READ32(ptp_priv, hostcmd_regs[2], &w1); - data = (((u64)w1 << 32) | (w0)); - } + DEV_READ32(ptp_priv, hostcmd_regs[1], &w0); + DEV_READ32(ptp_priv, hostcmd_regs[2], &w1); + data = (((u64)w1 << 32) | (w0)); *d1 = data; } if (d2) { - if (ptp_priv->fw_comm) { - w0 = ptp_priv->fw_comm->dw2[0]; - w1 = ptp_priv->fw_comm->dw2[1]; - data = (((u64)w1 << 32) | (w0)); - } else { - DEV_READ32(ptp_priv, hostcmd_regs[3], &w0); - DEV_READ32(ptp_priv, hostcmd_regs[4], &w1); - data = (((u64)w1 << 32) | (w0)); - } + DEV_READ32(ptp_priv, hostcmd_regs[3], &w0); + DEV_READ32(ptp_priv, hostcmd_regs[4], &w1); + data = (((u64)w1 << 32) | (w0)); *d2 = data; } } @@ -652,17 +567,10 @@ ngptpclock_cmd_go(u32 cmd, void *data0, void *data1) ptp_priv->shared_addr->ksyncinit = cmd; /* init data */ - if (ptp_priv->fw_comm) { - ptp_priv->fw_comm->dw1[0] = 0; - ptp_priv->fw_comm->dw1[1] = 0; - ptp_priv->fw_comm->dw2[0] = 0; - ptp_priv->fw_comm->dw2[1] = 0; - } else { - DEV_WRITE32(ptp_priv, hostcmd_regs[1], 0x0); - DEV_WRITE32(ptp_priv, hostcmd_regs[2], 0x0); - DEV_WRITE32(ptp_priv, hostcmd_regs[3], 0x0); - DEV_WRITE32(ptp_priv, hostcmd_regs[4], 0x0); - } + DEV_WRITE32(ptp_priv, hostcmd_regs[1], 0x0); + DEV_WRITE32(ptp_priv, hostcmd_regs[2], 0x0); + DEV_WRITE32(ptp_priv, hostcmd_regs[3], 0x0); + DEV_WRITE32(ptp_priv, hostcmd_regs[4], 0x0); switch (cmd) { case NGPTPCLOCK_INIT: @@ -756,19 +664,11 @@ ngptpclock_cmd_go(u32 cmd, void *data0, void *data1) break; } - if (ptp_priv->fw_comm) { - ptp_priv->fw_comm->cmd = cmd; - } else { - DEV_WRITE32(ptp_priv, hostcmd_regs[0], ptp_priv->shared_addr->ksyncinit); - } + DEV_WRITE32(ptp_priv, hostcmd_regs[0], ptp_priv->shared_addr->ksyncinit); do { - if (ptp_priv->fw_comm) { - cmd_status = ptp_priv->fw_comm->cmd; - } else { - DEV_READ32(ptp_priv, hostcmd_regs[0], &cmd_status); - ptp_priv->shared_addr->ksyncinit = cmd_status; - } + DEV_READ32(ptp_priv, hostcmd_regs[0], &cmd_status); + ptp_priv->shared_addr->ksyncinit = cmd_status; if (cmd_status == NGPTPCLOCK_DONE) { ret = 0; @@ -818,47 +718,24 @@ ngptpclock_cmd_go(u32 cmd, void *data0, void *data1) return ret; } -#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5,3,0)) -/** - * ngptpclock_ptp_freqcorr - * - * @ptp: pointer to ptp_clock_info structure - * @ppm: frequency correction value in ppm with 16bit binary - * fractional field. - * - * Description: this function will set the frequency correction - */ -static int ngptpclock_ptp_freqcorr(struct ptp_clock_info *ptp, long ppm) -{ - int ret = -1; - int64_t ppb = 0; - - ppb = scaled_ppm_to_ppb(ppm); - ret = ngptpclock_cmd_go(NGPTPCLOCK_FREQCOR, &ppb, NULL); - DBG_VERB(("ptp_freqcorr: applying freq correction: ppm:0x%llx ppb:0x%llx; rv:%d\n", (int64_t)ppm, ppb, ret)); - - return ret; -} -#else /** - * ngptpclock_ptp_freqcorr + * ngptpclock_ptp_adjfreq * * @ptp: pointer to ptp_clock_info structure - * @ppb: frequency correction value in ppb + * @ppb: frequency correction value * * Description: this function will set the frequency correction */ -static int ngptpclock_ptp_freqcorr(struct ptp_clock_info *ptp, s32 ppb) +static int ngptpclock_ptp_adjfreq(struct ptp_clock_info *ptp, s32 ppb) { int ret = -1; ret = ngptpclock_cmd_go(NGPTPCLOCK_FREQCOR, &ppb, NULL); - DBG_VERB(("ptp_freqcorr: applying freq correction: %x; rv:%d\n", ppb, ret)); + DBG_VERB(("ptp_adjfreq: applying freq correction: %x; rv:%d\n", ppb, ret)); return ret; } -#endif /** * ngptpclock_ptp_adjtime @@ -962,7 +839,7 @@ static int ngptpclock_exttslog_cmd(int event, int enable) subcmd_data:0x%llx\n", subcmd_data)); ptp_priv->extts_log = - (ngptpclock_fw_extts_log_t *)ngbde_kapi_dma_bus_to_virt(0, subcmd_data); + (ngptpclock_fw_extts_log_t *)ngedk_dmamem_map_p2v(subcmd_data); if (NULL == ptp_priv->extts_log) { DBG_ERR(("Failed to get virtual addr for the physical address\n")); } @@ -1077,7 +954,7 @@ static struct ptp_clock_info ngptpclock_ptp_caps = { .n_per_out = 0, /* will be overwritten in ngptpclock_ptp_register */ .n_pins = 0, .pps = 0, - .FREQ_CORR = ngptpclock_ptp_freqcorr, + .adjfreq = ngptpclock_ptp_adjfreq, .adjtime = ngptpclock_ptp_adjtime, .gettime64 = ngptpclock_ptp_gettime, .settime64 = ngptpclock_ptp_settime, @@ -1094,7 +971,7 @@ static struct ptp_clock_info ngptpclock_ptp_caps = { * Description: This is a callback function to enable/disable the TX timestamping port * based. */ -static int ngptpclock_ptp_hw_tx_tstamp_config(ngknet_dev_info_t *dinfo, +int ngptpclock_ptp_hw_tx_tstamp_config(ngknet_dev_info_t *dinfo, ngknet_netif_t *netif, int *hwts_tx_type) { @@ -1165,7 +1042,7 @@ static int ngptpclock_ptp_hw_tx_tstamp_config(ngknet_dev_info_t *dinfo, * Description: This is a callback function to enable/disable the RX timestamping port * based. */ -static int ngptpclock_ptp_hw_rx_tstamp_config(ngknet_dev_info_t *dinfo, ngknet_netif_t *netif, +int ngptpclock_ptp_hw_rx_tstamp_config(ngknet_dev_info_t *dinfo, ngknet_netif_t *netif, int *hwts_rx_filter) { #if defined(TWO_STEP_SUPPORT) @@ -1212,7 +1089,7 @@ static int ngptpclock_ptp_hw_rx_tstamp_config(ngknet_dev_info_t *dinfo, ngknet_n return SHR_E_NONE; } -static int ngptpclock_ptp_transport_get(uint8_t *pkt) +int ngptpclock_ptp_transport_get(uint8_t *pkt) { int transport = 0; uint16_t ethertype; @@ -1296,7 +1173,7 @@ ngptpclock_txpkt_tsts_tsamp_get(int port, uint32_t pkt_seq_id, uint32_t *ts_vali * NOTE: * Two-step related - fetching the timestamp from portmacro, not needed for one-step */ -static int ngptpclock_ptp_hw_tstamp_tx_time_get(struct sk_buff *skb, uint64_t *ts) +int ngptpclock_ptp_hw_tstamp_tx_time_get(struct sk_buff *skb, uint64_t *ts) { #if defined(TWO_STEP_SUPPORT) /* Get Timestamp from R5 or CLMAC */ @@ -1558,8 +1435,8 @@ ngptpclock_pkt_custom_encap_ptprx_get(uint8_t *pkt, uint64_t *ing_ptptime) DBG_RX_DUMP(("custom_encap_ptprx_get: Custom Encap header:\n")); if (debug & DBG_LVL_RX_DUMP) dbg_dump_pkt(pkt, tot_len); - DBG_RX(("custom_encap_ptprx_get: ver=%d opcode=%d tot_len=%d seq_id=0x%x u64_ptp_rx_time=%llu(0x%016llx)\n", - ver, opc, tot_len, seq_id, u64_ptp_rx_time,u64_ptp_rx_time)); + DBG_RX(("custom_encap_ptprx_get: ver=%d opcode=%d tot_len=%d seq_id=0x%x\n", + ver, opc, tot_len, seq_id)); return (tot_len); } @@ -1572,7 +1449,7 @@ ngptpclock_pkt_custom_encap_ptprx_get(uint8_t *pkt, uint64_t *ing_ptptime) * * Description: Parse the packet to check if customer is present and return the header length. */ -static int ngptpclock_ptp_hw_rx_pre_process(struct sk_buff *skb, uint32_t *cust_hdr_len) +int ngptpclock_ptp_hw_rx_pre_process(struct sk_buff *skb, uint32_t *cust_hdr_len) { uint64_t ts; int custom_encap_len = 0; @@ -1601,7 +1478,7 @@ static int ngptpclock_ptp_hw_rx_pre_process(struct sk_buff *skb, uint32_t *cust_ * Description: This is a callback function to retrieve 64b equivalent of * rx timestamp */ -static int ngptpclock_ptp_hw_tstamp_rx_time_upscale(struct sk_buff *skb, uint64_t *ts) +int ngptpclock_ptp_hw_tstamp_rx_time_upscale(struct sk_buff *skb, uint64_t *ts) { int ret = SHR_E_NONE; int custom_encap_len = 0; @@ -1666,9 +1543,9 @@ static int ngptpclock_ptp_hw_tstamp_rx_time_upscale(struct sk_buff *skb, uint64_ ptp_message_len = SKB_U16_GET(skb, (ptp_hdr_offset + 2)); DBG_RX(("rxtime_upscale: custom_encap_len %d tpid 0x%x transport %d skb->len %d " - "ptp message type %d, ptp_message_len %d ts:0x%016llx\n", + "ptp message type %d, ptp_message_len %d\n", custom_encap_len, tpid, transport, skb->len, - skb->data[ptp_hdr_offset] & 0x0F, ptp_message_len, *ts)); + skb->data[msgtype_offset] & 0x0F, ptp_message_len)); } if ((port > 0) && (port < NGPTPCLOCK_MAX_NUM_PORTS)) { @@ -1679,7 +1556,7 @@ static int ngptpclock_ptp_hw_tstamp_rx_time_upscale(struct sk_buff *skb, uint64_ return ret; } -static void ngptpclock_hton64(u8 *buf, const uint64_t *data) +void ngptpclock_hton64(u8 *buf, const uint64_t *data) { #ifdef __LITTLE_ENDIAN /* LITTLE ENDIAN */ @@ -1696,7 +1573,7 @@ static void ngptpclock_hton64(u8 *buf, const uint64_t *data) #endif } -static int ngptpclock_ptp_hw_tstamp_tx_meta_set(struct sk_buff *skb) +int ngptpclock_ptp_hw_tstamp_tx_meta_set(struct sk_buff *skb) { uint16_t tpid = 0; int md_offset = 0; @@ -1759,9 +1636,6 @@ static int ngptpclock_ptp_hw_tstamp_tx_meta_set(struct sk_buff *skb) } memcpy(md, cbd->pmd, sizeof(md)); - DBG_TX(("hw_tstamp_tx_meta_get: 1.md[0x%08x %08x %08x %08x] md_offset:%d transport:%d\n", - md[0], md[1], md[2], md[3], md_offset, transport)); - switch (transport) { case 2: /* IEEE 802.3 */ @@ -1806,11 +1680,6 @@ static int ngptpclock_ptp_hw_tstamp_tx_meta_set(struct sk_buff *skb) DBG_TX(("hw_tstamp_tx_meta_get: ptptime: 0x%llx ptpcounter: 0x%llx\n", ptptime, ptpcounter)); DBG_TX(("hw_tstamp_tx_meta_get: ptpmessage offset:%u type: 0x%x hwts_tx_type: %d\n", ptp_hdr_offset, skb->data[ptp_hdr_offset] & 0x0f, hwts_tx_type)); - DBG_TX(("hw_tstamp_tx_meta_get: l2pkt_md[0x%08x %08x %08x %08x] ptp_hdr_offset:%d\n", ieee1588_l2pkt_md[md_offset], - ieee1588_l2pkt_md[md_offset+1], ieee1588_l2pkt_md[md_offset+2], ieee1588_l2pkt_md[md_offset+3], ptp_hdr_offset)); - DBG_TX(("hw_tstamp_tx_meta_get: md[0x%08x %08x %08x %08x] md_offset:%d transport:%d\n", - md[0], md[1], md[2], md[3], md_offset, transport)); - if ((hwts_tx_type == HWTSTAMP_TX_ONESTEP_SYNC) && (NGPTPCLOCK_PTP_EVENT_MSG((skb->data[ptp_hdr_offset] & 0x0F)))) { @@ -1908,7 +1777,7 @@ static int ngptpclock_ptp_hw_tstamp_tx_meta_set(struct sk_buff *skb) return 0; } -static int ngptpclock_ptp_hw_tstamp_ptp_clock_index_get(ngknet_dev_info_t *dinfo, +int ngptpclock_ptp_hw_tstamp_ptp_clock_index_get(ngknet_dev_info_t *dinfo, ngknet_netif_t *netif, int *index) { if (!module_initialized || !ptp_priv) { @@ -2109,34 +1978,6 @@ ngptpclock_broadsync_status_cmd(int bs_id, u64 *status) return ret; } -static int -ngptpclock_broadsync_phase_offset_cmd(int bs_id, ngptpclock_time_spec_t offset) -{ - int ret = -1; - u64 data0, data1; - int64_t phase_offset = 0; - - /* Only in input mode */ - if (ptp_priv->ngptpclock_bs_info[bs_id].mode == 0) { - ptp_priv->ngptpclock_bs_info[bs_id].offset = offset; - } else { - memset(&ptp_priv->ngptpclock_bs_info[bs_id].offset, 0, sizeof(ngptpclock_time_spec_t)); - } - - data0 = (bs_id == 0) ? NGPTPCLOCK_BROADSYNC_BS0_PHASE_OFFSET_SET : NGPTPCLOCK_BROADSYNC_BS1_PHASE_OFFSET_SET; - - phase_offset = ptp_priv->ngptpclock_bs_info[bs_id].offset.sec * 1000000000 + - ptp_priv->ngptpclock_bs_info[bs_id].offset.nsec; - phase_offset *= (ptp_priv->ngptpclock_bs_info[bs_id].offset.sign) ? -1 : 1; - - data1 = (uint64_t)phase_offset; - - ret = ngptpclock_cmd_go(NGPTPCLOCK_BROADSYNC, &data0, &data1); - DBG_VERB(("ngptpclock_broadsync_phase_offset_cmd: subcmd: 0x%llx subcmd_data: 0x%llx; rv:%d\n", data0, data1, ret)); - - return ret; -} - static int ngptpclock_gpio_cmd(int gpio_num) { @@ -2465,36 +2306,29 @@ bs_attr_store(struct kobject *kobj, struct kobj_attribute *attr, ssize_t ret; u32 enable, mode; u32 bc, hb; - ngptpclock_time_spec_t offset = {0}; if (ATTRCMP(bs0)) { - ret = sscanf(buf, "enable:%d mode:%d bc:%u hb:%u sign:%d offset:%llu.%u", - &enable, &mode, &bc, &hb, - &offset.sign, &offset.sec, &offset.nsec); - DBG_VERB(("rd:%d bs0: enable:%d mode:%d bc:%d hb:%d sign:%d offset:%llu.%u\n", - rd_iter++, enable, mode, bc, hb, - offset.sign, offset.sec, offset.nsec)); + ret = sscanf(buf, "enable:%d mode:%d bc:%u hb:%u", + &enable, &mode, &bc, &hb); + DBG_VERB(("rd:%d bs0: enable:%d mode:%d bc:%d hb:%d\n", + rd_iter++, enable, mode, bc, hb)); ptp_priv->ngptpclock_bs_info[0].enable = enable; ptp_priv->ngptpclock_bs_info[0].mode = mode; ptp_priv->ngptpclock_bs_info[0].bc = bc; ptp_priv->ngptpclock_bs_info[0].hb = hb; (void)ngptpclock_broadsync_cmd(0); - (void)ngptpclock_broadsync_phase_offset_cmd(0, offset); } else if (ATTRCMP(bs1)) { - ret = sscanf(buf, "enable:%d mode:%d bc:%u hb:%u sign:%d offset:%llu.%u", - &enable, &mode, &bc, &hb, - &offset.sign, &offset.sec, &offset.nsec); - DBG_VERB(("rd:%d bs0: enable:%d mode:%d bc:%d hb:%d sign:%d offset:%llu.%u\n", - rd_iter++, enable, mode, bc, hb, - offset.sign, offset.sec, offset.nsec)); + ret = sscanf(buf, "enable:%d mode:%d bc:%u hb:%u", + &enable, &mode, &bc, &hb); + DBG_VERB(("rd:%d bs1: enable:%d mode:%d bc:%d hb:%d\n", + rd_iter++, enable, mode, bc, hb)); ptp_priv->ngptpclock_bs_info[1].enable = enable; ptp_priv->ngptpclock_bs_info[1].mode = mode; ptp_priv->ngptpclock_bs_info[1].bc = bc; ptp_priv->ngptpclock_bs_info[1].hb = hb; (void)ngptpclock_broadsync_cmd(1); - (void)ngptpclock_broadsync_phase_offset_cmd(1, offset); } else { ret = -ENOENT; } @@ -2518,25 +2352,19 @@ bs_attr_show(struct kobject *kobj, struct kobj_attribute *attr, variance = (status >> 32); status = (status & 0xFFFFFFFF); - bytes = sprintf(buf, "enable:%d mode:%d bc:%u hb:%u sign:%d offset:%llu.%u status:%u(%u)\n", + bytes = sprintf(buf, "enable:%d mode:%d bc:%u hb:%u status:%u(%u)\n", ptp_priv->ngptpclock_bs_info[0].enable, ptp_priv->ngptpclock_bs_info[0].mode, ptp_priv->ngptpclock_bs_info[0].bc, ptp_priv->ngptpclock_bs_info[0].hb, - ptp_priv->ngptpclock_bs_info[0].offset.sign, - ptp_priv->ngptpclock_bs_info[0].offset.sec, - ptp_priv->ngptpclock_bs_info[0].offset.nsec, (u32)status, variance); - DBG_VERB(("wr:%d bs0: enable:%d mode:%d bc:%u hb:%u sign:%d offset:%llu.%u status:%u(%u)\n", + DBG_VERB(("wr:%d bs0: enable:%d mode:%d bc:%u hb:%u status:%u(%u)\n", wr_iter++, ptp_priv->ngptpclock_bs_info[0].enable, ptp_priv->ngptpclock_bs_info[0].mode, ptp_priv->ngptpclock_bs_info[0].bc, ptp_priv->ngptpclock_bs_info[0].hb, - ptp_priv->ngptpclock_bs_info[0].offset.sign, - ptp_priv->ngptpclock_bs_info[0].offset.sec, - ptp_priv->ngptpclock_bs_info[0].offset.nsec, (u32)status, variance)); } else if (ATTRCMP(bs1)) { @@ -2547,25 +2375,19 @@ bs_attr_show(struct kobject *kobj, struct kobj_attribute *attr, variance = (status >> 32); status = (status & 0xFFFFFFFF); - bytes = sprintf(buf, "enable:%d mode:%d bc:%u hb:%u sign:%d offset:%llu.%u status:%u(%u)\n", + bytes = sprintf(buf, "enable:%d mode:%d bc:%u hb:%u status:%u(%u)\n", ptp_priv->ngptpclock_bs_info[1].enable, ptp_priv->ngptpclock_bs_info[1].mode, ptp_priv->ngptpclock_bs_info[1].bc, ptp_priv->ngptpclock_bs_info[1].hb, - ptp_priv->ngptpclock_bs_info[1].offset.sign, - ptp_priv->ngptpclock_bs_info[1].offset.sec, - ptp_priv->ngptpclock_bs_info[1].offset.nsec, (u32)status, variance); - DBG_VERB(("wr:%d bs1: enable:%d mode:%d bc:%u hb:%u sign:%d offset:%llu.%u status:%u(%u)\n", + DBG_VERB(("wr:%d bs1: enable:%d mode:%d bc:%u hb:%u status:%u(%u)\n", wr_iter++, ptp_priv->ngptpclock_bs_info[1].enable, ptp_priv->ngptpclock_bs_info[1].mode, ptp_priv->ngptpclock_bs_info[1].bc, ptp_priv->ngptpclock_bs_info[1].hb, - ptp_priv->ngptpclock_bs_info[1].offset.sign, - ptp_priv->ngptpclock_bs_info[1].offset.sec, - ptp_priv->ngptpclock_bs_info[1].offset.nsec, (u32)status, variance)); } else { @@ -2938,17 +2760,12 @@ ngptpclock_ptp_dma_init(int dcb_type, int dev_no) #else endianess = 1; #endif + DEV_WRITE32(ptp_priv, CMIC_CMC_SCHAN_MESSAGE_14r(CMIC_CMC_BASE), + ((pci_cos << 16) | endianess)); - if (ptp_priv->fw_comm) { - /* Do nothing */ - (void)endianess; - } else { - DEV_WRITE32(ptp_priv, CMIC_CMC_SCHAN_MESSAGE_14r(CMIC_CMC_BASE), - ((pci_cos << 16) | endianess)); + DEV_WRITE32(ptp_priv, CMIC_CMC_SCHAN_MESSAGE_15r(CMIC_CMC_BASE), 1); + DEV_WRITE32(ptp_priv, CMIC_CMC_SCHAN_MESSAGE_16r(CMIC_CMC_BASE), 1); - DEV_WRITE32(ptp_priv, CMIC_CMC_SCHAN_MESSAGE_15r(CMIC_CMC_BASE), 1); - DEV_WRITE32(ptp_priv, CMIC_CMC_SCHAN_MESSAGE_16r(CMIC_CMC_BASE), 1); - } } DBG_VERB(("%s %p:%p, dcb_type: %d\n", __FUNCTION__, ptp_priv->base_addr, @@ -2956,13 +2773,11 @@ ngptpclock_ptp_dma_init(int dcb_type, int dev_no) ptp_priv->mirror_encap_bmp = 0x0; - if (ptp_priv->fw_comm == NULL) { - hostcmd_regs[0] = CMIC_CMC_SCHAN_MESSAGE_21r(CMIC_CMC_BASE); - hostcmd_regs[1] = CMIC_CMC_SCHAN_MESSAGE_20r(CMIC_CMC_BASE); - hostcmd_regs[2] = CMIC_CMC_SCHAN_MESSAGE_19r(CMIC_CMC_BASE); - hostcmd_regs[3] = CMIC_CMC_SCHAN_MESSAGE_18r(CMIC_CMC_BASE); - hostcmd_regs[4] = CMIC_CMC_SCHAN_MESSAGE_17r(CMIC_CMC_BASE); - } + hostcmd_regs[0] = CMIC_CMC_SCHAN_MESSAGE_21r(CMIC_CMC_BASE); + hostcmd_regs[1] = CMIC_CMC_SCHAN_MESSAGE_20r(CMIC_CMC_BASE); + hostcmd_regs[2] = CMIC_CMC_SCHAN_MESSAGE_19r(CMIC_CMC_BASE); + hostcmd_regs[3] = CMIC_CMC_SCHAN_MESSAGE_18r(CMIC_CMC_BASE); + hostcmd_regs[4] = CMIC_CMC_SCHAN_MESSAGE_17r(CMIC_CMC_BASE); return; } @@ -2981,7 +2796,6 @@ ngptpclock_ioctl_cmd_handler(ngknet_dev_info_t *dev_info, int cmd, char *data, i { u32 fw_status; int32_t *cfg_data = (int32_t *)data; - uint64_t paddr = 0ULL; if (!module_initialized && cmd != NGPTPCLOCK_HW_INIT) { return SHR_E_CONFIG; @@ -2990,81 +2804,56 @@ ngptpclock_ioctl_cmd_handler(ngknet_dev_info_t *dev_info, int cmd, char *data, i switch (cmd) { case NGPTPCLOCK_HW_INIT: pci_cos = cfg_data[0]; - - if (!ngptpclock_fw_core_valid(dev_info, cfg_data[1])) { - DBG_ERR(("Invalid param: fw_core(%d) \n", cfg_data[1])); - return SHR_E_PARAM; - } - fw_core = cfg_data[1]; - paddr = ((((long long unsigned)cfg_data[7]) << 32) | (unsigned)cfg_data[8]); + DBG_VERB(("Configuring pci_cosq:%d dev_no:%d fw_core:%d\n", + pci_cos, dev_info->dev_no, fw_core)); + if ((CMICX_DEV_TYPE && (fw_core >= 0 && fw_core <= 3)) || + (fw_core == 0 || fw_core == 1)) { + memcpy(ieee1588_l2pkt_md, &cfg_data[12], sizeof(ieee1588_l2pkt_md)); + memcpy(ieee1588_ipv4pkt_md, &cfg_data[36], sizeof(ieee1588_ipv4pkt_md)); + memcpy(ieee1588_ipv6pkt_md, &cfg_data[60], sizeof(ieee1588_ipv6pkt_md)); - DBG_VERB(("hw_init: pci_cosq:%d dev_no:%d fw_core:%d paddr:0x%016llx\n", - pci_cos, dev_info->dev_no, fw_core, paddr)); - - if (paddr) { - ptp_priv->fw_comm = ngbde_kapi_dma_bus_to_virt(dev_info->dev_no, paddr); - if (ptp_priv->fw_comm == NULL) { - DBG_ERR(("Hostram address conversion to get virtual address failed\n")); - return SHR_E_RESOURCE; - } else { - DBG_VERB(("laddr:0x%016llx", (long long unsigned int)ptp_priv->fw_comm)); - } - } - memcpy(ieee1588_l2pkt_md, &cfg_data[12], sizeof(ieee1588_l2pkt_md)); - memcpy(ieee1588_ipv4pkt_md, &cfg_data[36], sizeof(ieee1588_ipv4pkt_md)); - memcpy(ieee1588_ipv6pkt_md, &cfg_data[60], sizeof(ieee1588_ipv6pkt_md)); + ngptpclock_ptp_dma_init(1, dev_info->dev_no); - - ngptpclock_ptp_dma_init(1, dev_info->dev_no); - - fw_status = 0; - if (ptp_priv->fw_comm) { - fw_status = ptp_priv->fw_comm->cmd; - } else { + fw_status = 0; DEV_READ32(ptp_priv, CMIC_CMC_SCHAN_MESSAGE_21r(CMIC_CMC_BASE), &fw_status); - } - /* Return success if the app is already initialized. */ - if (module_initialized) { - return SHR_E_NONE; - } + /* Return success if the app is already initialized. */ + if (module_initialized) { + return SHR_E_NONE; + } - /* Return error if the app is not ready yet. */ - if (fw_status != 0xBADC0DE1) { - DBG_VERB(("fw_status:0x%08x", fw_status)); - return SHR_E_RESOURCE; - } + /* Return error if the app is not ready yet. */ + if (fw_status != 0xBADC0DE1) { + return SHR_E_RESOURCE; + } - (ptp_priv->ngptpclock_init_info).uc_port_num = cfg_data[2]; - (ptp_priv->ngptpclock_init_info).uc_port_sysport = cfg_data[3]; - (ptp_priv->ngptpclock_init_info).host_cpu_port = cfg_data[4]; - (ptp_priv->ngptpclock_init_info).host_cpu_sysport = cfg_data[5]; - (ptp_priv->ngptpclock_init_info).udh_len = cfg_data[6]; + (ptp_priv->ngptpclock_init_info).uc_port_num = cfg_data[2]; + (ptp_priv->ngptpclock_init_info).uc_port_sysport = cfg_data[3]; + (ptp_priv->ngptpclock_init_info).host_cpu_port = cfg_data[4]; + (ptp_priv->ngptpclock_init_info).host_cpu_sysport = cfg_data[5]; + (ptp_priv->ngptpclock_init_info).udh_len = cfg_data[6]; - DBG_VERB(("fw_core:%d uc_port:%d uc_sysport:%d pci_port:%d pci_sysport:%d\n", + DBG_VERB(("fw_core:%d uc_port:%d uc_sysport:%d pci_port:%d pci_sysport:%d\n", fw_core, (ptp_priv->ngptpclock_init_info).uc_port_num, (ptp_priv->ngptpclock_init_info).uc_port_sysport, (ptp_priv->ngptpclock_init_info).host_cpu_port, (ptp_priv->ngptpclock_init_info).host_cpu_sysport)); - if (ngptpclock_ptp_init(&(ptp_priv->ptp_caps)) >= 0) { - module_initialized = 1; + if (ngptpclock_ptp_init(&(ptp_priv->ptp_caps)) >= 0) { + module_initialized = 1; + } } break; case NGPTPCLOCK_HW_CLEANUP: module_initialized = 0; - if (ptp_priv->fw_comm) { - /* Do nothing */ - } else { - DEV_WRITE32(ptp_priv, CMIC_CMC_SCHAN_MESSAGE_15r(CMIC_CMC_BASE), 0); - DEV_WRITE32(ptp_priv, CMIC_CMC_SCHAN_MESSAGE_16r(CMIC_CMC_BASE), 0); - } + DEV_WRITE32(ptp_priv, CMIC_CMC_SCHAN_MESSAGE_15r(CMIC_CMC_BASE), 0); + DEV_WRITE32(ptp_priv, CMIC_CMC_SCHAN_MESSAGE_16r(CMIC_CMC_BASE), 0); ngptpclock_ptp_cleanup(&(ptp_priv->ptp_caps)); break; @@ -3099,6 +2888,15 @@ ngptpclock_ptp_register(void) { int err = -ENODEV; + if (CMICX_DEV_TYPE) { + if (fw_core < 0 || fw_core > 3) { + goto exit; + } + } else if (fw_core < 0 || fw_core > 1) { + /* Support on core-0 or core-1 */ + goto exit; + } + /* default transport is raw, ieee 802.3 */ switch (network_transport) { case 2: /* IEEE 802.3 */ @@ -3149,7 +2947,6 @@ ngptpclock_ptp_register(void) ngptpclock_sysfs_init(); ptp_priv->shared_addr = NULL; ptp_priv->port_stats = NULL; - ptp_priv->fw_comm = NULL; ngptpclock_ptp_extts_logging_init(); exit: @@ -3197,10 +2994,6 @@ ngptpclock_ptp_remove(void) DBG_ERR(("Free R5 memory\n")); } - /* This is just a reference to host-ram memory. - Do not attempt to free.*/ - ptp_priv->fw_comm = NULL; - /* Unregister the bcm ptp clock driver */ ptp_clock_unregister(ptp_priv->ptp_clock); diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/st/Kbuild b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/st/Kbuild similarity index 100% rename from platform/broadcom/saibcm-modules/sdklt/linux/st/Kbuild rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/st/Kbuild diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/st/Makefile b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/st/Makefile similarity index 100% rename from platform/broadcom/saibcm-modules/sdklt/linux/st/Makefile rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/st/Makefile diff --git a/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/st/ngst_main.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/st/ngst_main.c new file mode 100644 index 00000000000..c908b53d354 --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/linux/st/ngst_main.c @@ -0,0 +1,320 @@ +/*! \file ngst_main.c + * + * Streaming Telemetry support module entry. + * + */ +/* + * Copyright 2018-2025 Broadcom. All rights reserved. + * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * A copy of the GNU General Public License version 2 (GPLv2) can + * be found in the LICENSES folder. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/*! \cond */ +MODULE_AUTHOR("Broadcom"); +MODULE_DESCRIPTION("Streaming Telemetry Support Module"); +MODULE_LICENSE("GPL"); +/*! \endcond */ + +/*! Maximum number of switch devices supported. */ +#ifndef NGST_NUM_SWDEV_MAX +#define NGST_NUM_SWDEV_MAX NGBDE_NUM_SWDEV_MAX +#endif + +/*! Switch device descriptor. */ +typedef struct st_dev_s { + + /*! Logical address of DMA pool. */ + void *dma_vaddr; + + /*! Logical address of buffer pool. */ + void *dma_buff_addr_va; + + /*! Physical address of DMA pool. */ + dma_addr_t dma_handle; + + /*! Size of DMA memory (in bytes). */ + size_t dma_size; + + /*! Buffer chunk size (in bytes). */ + uint32_t buff_chunk_size; + + /*! Buffer chunk count. */ + uint32_t buff_chunk_cnt; + + /*! Buffer read pointer. */ + uint32_t buff_rd_ptr; + + /*! Buffer write pointer. */ + uint32_t buff_wr_ptr; + + /*! Linux DMA device associated with DMA pool. */ + struct device *dma_dev; + +} st_dev_t; + +static st_dev_t stdevs[NGST_NUM_SWDEV_MAX]; + +/*! Netlink socket. */ +static struct sock *nl_sk; + +/*! Send netlink message to user-space. */ +static void +ngst_nl_msg_send(int unit, int pid, int msg_type, const char *payload) +{ + struct nlmsghdr *nlh; + struct sk_buff *skb_out; + int res; + int msg_size; + uint32_t payload_size; + st_dev_t *stdev; + + struct ngst_nl_msg_hdr_s rsp = { + .unit = unit, + .msg_type = msg_type, + }; + + stdev = &stdevs[unit]; + switch (msg_type) { + case NGST_NL_MSG_TYPE_ST_DATA_NOT_READY: + msg_size = sizeof(struct ngst_nl_msg_hdr_s); + skb_out = nlmsg_new(msg_size, 0); + if (!skb_out) { + printk(KERN_ERR "Failed to allocate new skb for reply\n"); + return; + } + + nlh = nlmsg_put(skb_out, 0, 0, NLMSG_DONE, msg_size, 0); + NETLINK_CB(skb_out).dst_group = 0; + memcpy(nlmsg_data(nlh), &rsp, msg_size); + + break; + case NGST_NL_MSG_TYPE_ST_DATA_RSP: + payload_size = stdev->buff_chunk_size; + msg_size = sizeof(struct ngst_nl_msg_hdr_s) + payload_size; + skb_out = nlmsg_new(msg_size, 0); + if (!skb_out) { + printk(KERN_ERR "Failed to allocate new skb for reply\n"); + return; + } + + nlh = nlmsg_put(skb_out, 0, 0, NLMSG_DONE, msg_size, 0); + NETLINK_CB(skb_out).dst_group = 0; + memcpy(nlmsg_data(nlh), &rsp, sizeof(struct ngst_nl_msg_hdr_s)); + memcpy(nlmsg_data(nlh) + sizeof(struct ngst_nl_msg_hdr_s), + payload, payload_size); + break; + default: + return; + } + + res = nlmsg_unicast(nl_sk, skb_out, pid); + if (res < 0) { + printk(KERN_INFO "Error while sending back to user: %d\n", res); + } + + return; +} + + +/*! Receive netlink message from user-space. */ +static void +ngst_nl_msg_recv(struct sk_buff *skb) +{ + struct nlmsghdr *nlh; + struct ngst_nl_msg_hdr_s *rcv_nlmsg; + struct ngst_nl_msg_hdr_s *st_data_req_msg; + void *cur_dma_vaddr = NULL; + int user_pid, unit; + st_dev_t *stdev; + + nlh = (struct nlmsghdr *)skb->data; + user_pid = nlh->nlmsg_pid; + rcv_nlmsg = (struct ngst_nl_msg_hdr_s *)nlmsg_data(nlh); + + unit = rcv_nlmsg->unit; + if (unit < 0 || unit > NGST_NUM_SWDEV_MAX) { + return; + } + stdev = &stdevs[rcv_nlmsg->unit]; + + if (rcv_nlmsg->msg_type == NGST_NL_MSG_TYPE_ST_DATA_REQ) { + if (!stdev->dma_vaddr) { + ngst_nl_msg_send(unit, user_pid, + NGST_NL_MSG_TYPE_ST_DATA_NOT_READY, NULL); + return; + } + stdev->buff_wr_ptr = *((uint32_t *)(stdev->dma_vaddr)); + st_data_req_msg = (struct ngst_nl_msg_hdr_s *)nlmsg_data(nlh); + + stdev->buff_rd_ptr = + stdev->buff_rd_ptr == stdev->buff_chunk_cnt ? 0 : stdev->buff_rd_ptr; + if (stdev->buff_wr_ptr != stdev->buff_rd_ptr) { + cur_dma_vaddr = stdev->dma_buff_addr_va + + (stdev->buff_rd_ptr * stdev->buff_chunk_size); + ngst_nl_msg_send(unit, user_pid, + NGST_NL_MSG_TYPE_ST_DATA_RSP, cur_dma_vaddr); + stdev->buff_rd_ptr = stdev->buff_wr_ptr; + } else { + ngst_nl_msg_send(unit, user_pid, + NGST_NL_MSG_TYPE_ST_DATA_NOT_READY, NULL); + } + } + + return; +} + +/*! + * Generic module functions + */ + +static int +ngst_open(struct inode *inode, struct file *filp) +{ + return 0; +} + +static int +ngst_release(struct inode *inode, struct file *filp) +{ + return 0; +} + +static long +ngst_ioctl(struct file *file, unsigned int cmd, unsigned long arg) +{ + struct ngst_ioc_dma_info_s ioc; + st_dev_t *stdev; + + switch (cmd) { + case NGST_IOC_DMA_INFO: + if (copy_from_user(&ioc, + (struct ngst_ioc_dma_info_s __user *)arg, + sizeof(ioc))) + return ~EFAULT; + + if (ioc.chunk_cnt == 0 || ioc.size == 0) { + return 0; + } + stdev = &stdevs[ioc.unit]; + stdev->dma_dev = ngbde_kapi_dma_dev_get(ioc.unit); + if (!stdev->dma_dev) { + printk(KERN_INFO "Not Found ST dev %d\n", ioc.unit); + return ~EFAULT; + } + + if (!stdev->dma_vaddr) { + /* Including write pointer size */ + stdev->dma_size = ioc.size + sizeof(uint32_t); + stdev->dma_vaddr = dma_alloc_coherent(stdev->dma_dev, + stdev->dma_size, + &stdev->dma_handle, + GFP_KERNEL); + if (!stdev->dma_vaddr) { + printk(KERN_ERR "Error allocating DMA buffer\n"); + return ~ENOMEM; + } else { + printk(KERN_INFO "DMA buffer allocated successfully\n"); + } + memset((void *)stdev->dma_vaddr, 0, stdev->dma_size); + stdev->dma_buff_addr_va = stdev->dma_vaddr + sizeof(uint32_t); + + stdev->buff_chunk_cnt = ioc.chunk_cnt; + stdev->buff_chunk_size = ioc.size / ioc.chunk_cnt; + } else { + if ((stdev->buff_chunk_cnt != ioc.chunk_cnt) || + (stdev->buff_chunk_size != ioc.size / ioc.chunk_cnt)) { + printk(KERN_ERR "DMA buffer is already allocated.n"); + return ~EFAULT; + } + } + + ioc.paddr = (uint64_t)stdev->dma_handle; + if (copy_to_user((struct ngst_ioc_dma_info_s __user *)arg, + &ioc, sizeof(ioc))) + return ~EFAULT; + break; + + default: + return -EINVAL; + } + return 0; +} + +static struct file_operations ngst_fops = { + .open = ngst_open, + .release = ngst_release, + .unlocked_ioctl = ngst_ioctl, + .compat_ioctl = ngst_ioctl, +}; + +static void __exit +ngst_exit_module(void) +{ + int unit; + st_dev_t *stdev; + + unregister_chrdev(NGST_MODULE_MAJOR, NGST_MODULE_NAME); + + if (nl_sk) { + netlink_kernel_release(nl_sk); + } + + for (unit = 0; unit < NGST_NUM_SWDEV_MAX; unit++) { + stdev = &stdevs[unit]; + + if (stdev->dma_vaddr) { + dma_free_coherent(stdev->dma_dev, stdev->dma_size, + stdev->dma_vaddr, stdev->dma_handle); + } + } + printk(KERN_INFO "Broadcom NGST unloaded successfully.\n"); +} + +static int __init +ngst_init_module(void) +{ + int rv; + struct netlink_kernel_cfg cfg = { + .input = ngst_nl_msg_recv, + }; + + rv = register_chrdev(NGST_MODULE_MAJOR, NGST_MODULE_NAME, &ngst_fops); + if (rv < 0) { + printk(KERN_WARNING "%s: can't get major %d\n", + NGST_MODULE_NAME, NGST_MODULE_MAJOR); + return rv; + } + + nl_sk = netlink_kernel_create(&init_net, NGST_NETLINK_PROTOCOL, &cfg); + if (!nl_sk) { + printk(KERN_WARNING "%s: Unable to create netlink socket\n", + NGST_MODULE_NAME); + return -EFAULT; + } + printk(KERN_INFO "Broadcom NGST loaded successfully\n"); + return 0; +} + +module_exit(ngst_exit_module); +module_init(ngst_init_module); diff --git a/platform/broadcom/saibcm-modules/sdklt/make/kpmd.mk b/platform/broadcom/saibcm-modules-legacy-th/sdklt/make/kpmd.mk similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/make/kpmd.mk rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/make/kpmd.mk index 00aa39073c3..b7bb1da60cd 100644 --- a/platform/broadcom/saibcm-modules/sdklt/make/kpmd.mk +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/make/kpmd.mk @@ -1,5 +1,5 @@ # -# Copyright 2018-2025 Broadcom. All rights reserved. +# Copyright 2018-2024 Broadcom. All rights reserved. # The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. # # This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/make/lkm.mk b/platform/broadcom/saibcm-modules-legacy-th/sdklt/make/lkm.mk similarity index 97% rename from platform/broadcom/saibcm-modules/sdklt/make/lkm.mk rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/make/lkm.mk index d2300cc2f9e..2e892414637 100644 --- a/platform/broadcom/saibcm-modules/sdklt/make/lkm.mk +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/make/lkm.mk @@ -1,5 +1,5 @@ # -# Copyright 2018-2025 Broadcom. All rights reserved. +# Copyright 2018-2024 Broadcom. All rights reserved. # The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. # # This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/make/makeutils.mk b/platform/broadcom/saibcm-modules-legacy-th/sdklt/make/makeutils.mk similarity index 95% rename from platform/broadcom/saibcm-modules/sdklt/make/makeutils.mk rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/make/makeutils.mk index 81b51c4aa66..303b831080d 100644 --- a/platform/broadcom/saibcm-modules/sdklt/make/makeutils.mk +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/make/makeutils.mk @@ -1,5 +1,5 @@ # -# Copyright 2018-2025 Broadcom. All rights reserved. +# Copyright 2018-2024 Broadcom. All rights reserved. # The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. # # This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/make/partial.mk b/platform/broadcom/saibcm-modules-legacy-th/sdklt/make/partial.mk similarity index 97% rename from platform/broadcom/saibcm-modules/sdklt/make/partial.mk rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/make/partial.mk index 47f4565fc5f..5291f705b56 100644 --- a/platform/broadcom/saibcm-modules/sdklt/make/partial.mk +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/make/partial.mk @@ -1,5 +1,5 @@ # -# Copyright 2018-2025 Broadcom. All rights reserved. +# Copyright 2018-2024 Broadcom. All rights reserved. # The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. # # This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/sal/include/sal/sal_libc.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/sal/include/sal/sal_libc.h similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/sal/include/sal/sal_libc.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/sal/include/sal/sal_libc.h index f83b5edd723..f892de4364d 100644 --- a/platform/broadcom/saibcm-modules/sdklt/sal/include/sal/sal_libc.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/sal/include/sal/sal_libc.h @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/sal/include/sal/sal_linux.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/sal/include/sal/sal_linux.h similarity index 98% rename from platform/broadcom/saibcm-modules/sdklt/sal/include/sal/sal_linux.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/sal/include/sal/sal_linux.h index b747f6beb9a..83c3c3df6a3 100644 --- a/platform/broadcom/saibcm-modules/sdklt/sal/include/sal/sal_linux.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/sal/include/sal/sal_linux.h @@ -7,8 +7,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/sal/include/sal/sal_types.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/sal/include/sal/sal_types.h similarity index 98% rename from platform/broadcom/saibcm-modules/sdklt/sal/include/sal/sal_types.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/sal/include/sal/sal_types.h index 6d9a4433afe..40ef6a27b26 100644 --- a/platform/broadcom/saibcm-modules/sdklt/sal/include/sal/sal_types.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/sal/include/sal/sal_types.h @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/sal/include/sal_config.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/sal/include/sal_config.h similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/sal/include/sal_config.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/sal/include/sal_config.h index 234e87ff06a..fc7bd1bb87d 100644 --- a/platform/broadcom/saibcm-modules/sdklt/sal/include/sal_config.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/sal/include/sal_config.h @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/shr/bitop/shr_bitop_range_clear.c b/platform/broadcom/saibcm-modules-legacy-th/sdklt/shr/bitop/shr_bitop_range_clear.c similarity index 96% rename from platform/broadcom/saibcm-modules/sdklt/shr/bitop/shr_bitop_range_clear.c rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/shr/bitop/shr_bitop_range_clear.c index 3edce6ac245..8a6d345941c 100644 --- a/platform/broadcom/saibcm-modules/sdklt/shr/bitop/shr_bitop_range_clear.c +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/shr/bitop/shr_bitop_range_clear.c @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/shr/include/shr/shr_bitop.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/shr/include/shr/shr_bitop.h similarity index 99% rename from platform/broadcom/saibcm-modules/sdklt/shr/include/shr/shr_bitop.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/shr/include/shr/shr_bitop.h index 3c78abb99c1..f62a6f3b8a7 100644 --- a/platform/broadcom/saibcm-modules/sdklt/shr/include/shr/shr_bitop.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/shr/include/shr/shr_bitop.h @@ -11,8 +11,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or @@ -123,7 +122,7 @@ shr_bitop_str_decode(const char *str, SHR_BITDCL *dest, int max_bitdcl); * This size is useful when calling malloc, memcpy, etc. */ #define SHR_BITALLOCSIZE(_max) \ - (SHRi_BITDCLSIZE(_max) * sizeof(SHR_BITDCL)) + (SHRi_BITDCLSIZE(_max) * sizeof (SHR_BITDCL)) /*! * Declare bit array _name of size _max bits. diff --git a/platform/broadcom/saibcm-modules/sdklt/shr/include/shr/shr_error.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/shr/include/shr/shr_error.h similarity index 98% rename from platform/broadcom/saibcm-modules/sdklt/shr/include/shr/shr_error.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/shr/include/shr/shr_error.h index 022560b79aa..70b015a5cd0 100644 --- a/platform/broadcom/saibcm-modules/sdklt/shr/include/shr/shr_error.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/shr/include/shr/shr_error.h @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/sdklt/shr/include/shr/shr_types.h b/platform/broadcom/saibcm-modules-legacy-th/sdklt/shr/include/shr/shr_types.h similarity index 98% rename from platform/broadcom/saibcm-modules/sdklt/shr/include/shr/shr_types.h rename to platform/broadcom/saibcm-modules-legacy-th/sdklt/shr/include/shr/shr_types.h index bd82348b90e..eef71e1a67b 100644 --- a/platform/broadcom/saibcm-modules/sdklt/shr/include/shr/shr_types.h +++ b/platform/broadcom/saibcm-modules-legacy-th/sdklt/shr/include/shr/shr_types.h @@ -4,8 +4,7 @@ * */ /* - * - * Copyright 2018-2025 Broadcom. All rights reserved. + * Copyright 2018-2024 Broadcom. All rights reserved. * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. * * This program is free software; you can redistribute it and/or diff --git a/platform/broadcom/saibcm-modules/systemd/opennsl-modules.service b/platform/broadcom/saibcm-modules-legacy-th/systemd/opennsl-modules.service similarity index 100% rename from platform/broadcom/saibcm-modules/systemd/opennsl-modules.service rename to platform/broadcom/saibcm-modules-legacy-th/systemd/opennsl-modules.service diff --git a/platform/broadcom/saibcm-modules/systems/bde/linux/include/linux-bde.h b/platform/broadcom/saibcm-modules-legacy-th/systems/bde/linux/include/linux-bde.h similarity index 97% rename from platform/broadcom/saibcm-modules/systems/bde/linux/include/linux-bde.h rename to platform/broadcom/saibcm-modules-legacy-th/systems/bde/linux/include/linux-bde.h index d2257eb8bba..36bbc2b0c36 100644 --- a/platform/broadcom/saibcm-modules/systems/bde/linux/include/linux-bde.h +++ b/platform/broadcom/saibcm-modules-legacy-th/systems/bde/linux/include/linux-bde.h @@ -1,8 +1,7 @@ /*********************************************************************** * * $Id: linux-bde.h,v 1.24 Broadcom SDK $ - * - * $Copyright: 2017-2025 Broadcom Inc. All rights reserved. + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. @@ -204,9 +203,8 @@ extern uint32 lkbde_get_dev_phys_hi(int d); #ifdef BDE_EDK_SUPPORT extern int lkbde_edk_get_dma_info(int dev_id, phys_addr_t* cpu_pbase, phys_addr_t* dma_pbase, ssize_t* size); -extern void * lkbde_edk_dmamem_map_p2v(int dev_no, phys_addr_t paddr); +extern void * lkbde_edk_dmamem_map_p2v(phys_addr_t paddr); #endif -extern int lkbde_get_phys_to_virt(int d, phys_addr_t paddr, sal_vaddr_t *vaddr); /* * Virtual device address needed by kernel space diff --git a/platform/broadcom/saibcm-modules/systems/bde/linux/include/linux_dma.h b/platform/broadcom/saibcm-modules-legacy-th/systems/bde/linux/include/linux_dma.h similarity index 97% rename from platform/broadcom/saibcm-modules/systems/bde/linux/include/linux_dma.h rename to platform/broadcom/saibcm-modules-legacy-th/systems/bde/linux/include/linux_dma.h index f408b621346..d69ad43207c 100644 --- a/platform/broadcom/saibcm-modules/systems/bde/linux/include/linux_dma.h +++ b/platform/broadcom/saibcm-modules-legacy-th/systems/bde/linux/include/linux_dma.h @@ -1,8 +1,7 @@ /*********************************************************************** * * $Id: linux_dma.h,v 1.24 Broadcom SDK $ - * - * $Copyright: 2017-2025 Broadcom Inc. All rights reserved. + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. diff --git a/platform/broadcom/saibcm-modules/systems/bde/linux/include/mpool.h b/platform/broadcom/saibcm-modules-legacy-th/systems/bde/linux/include/mpool.h similarity index 95% rename from platform/broadcom/saibcm-modules/systems/bde/linux/include/mpool.h rename to platform/broadcom/saibcm-modules-legacy-th/systems/bde/linux/include/mpool.h index 1823bbdf8e8..232bbfa83e7 100644 --- a/platform/broadcom/saibcm-modules/systems/bde/linux/include/mpool.h +++ b/platform/broadcom/saibcm-modules-legacy-th/systems/bde/linux/include/mpool.h @@ -1,7 +1,6 @@ /* * $Id: mpool.h,v 1.2 Broadcom SDK $ - * - * $Copyright: 2017-2025 Broadcom Inc. All rights reserved. + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. diff --git a/platform/broadcom/saibcm-modules-legacy-th/systems/bde/linux/kernel/Makefile b/platform/broadcom/saibcm-modules-legacy-th/systems/bde/linux/kernel/Makefile new file mode 100644 index 00000000000..72f390e10a4 --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/systems/bde/linux/kernel/Makefile @@ -0,0 +1,146 @@ +# -*- Makefile -*- +# $Id: Makefile,v 1.18 Broadcom SDK $ +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# +# +# +# Makefile for Linux kernel BDE +# +LOCALDIR = systems/bde/linux/kernel + +# Make sure we build for the kernel if this is a user-mode build +ifneq ($(platform), ) +override-target=linux-$(platform) +endif + +include $(SDK)/make/Make.config + +LIBS = $(LIBDIR)/libkern.a + +# need to add vpath sources +VPATH = ../shared + +# Add the srcs to be found by vpath +LSRCS += mpool.c + +# Add shared BDE sources +VPATH += ../../shared +LSRCS += shbde_pci.c shbde_iproc.c shbde_mdio.c +CFLAGS += -I../../shared/include + +LHDRS += mpool.h +LOBJS = $(addsuffix .o, $(basename $(LSRCS))) +BOBJS = $(addprefix $(BLDDIR)/,$(LOBJS)) +# +# For 'NO_PRECOMPILED_MODULE', the first kernel compilation is done +# in systems/bde/linux/kernel (and not in systems/bde/linux/kernel/kernel_module, +# which is not even created). +# All the definitions above are for the first cycle of module compilation +# +PWD := $(shell pwd) + +KERNEL_MODULE_DIR = kernel_module + +THIS_MOD_NAME := linux-kernel-bde +MODULE = $(LIBDIR)/$(THIS_MOD_NAME).o +KMODULE = $(LIBDIR)/$(THIS_MOD_NAME).ko + +build: $(KMODULE) + +ifeq (1,$(NO_PRECOMPILED_MODULE)) +# { +# +# These are the objects which need to be compiled, in the kernel, to +# created the module object file. +# +SRCS_COMPOSING = linux_shbde.c linux_dma.c ../shared/mpool.o $(THIS_MOD_NAME).c ../../shared/shbde_pci.o ../../shared/shbde_iproc.o ../../shared/shbde_mdio.o ../../../linux/kernel/modules/shared/gmodule.o +OBJECTS_COMPOSING = "linux_shbde.o linux_dma.o mpool.o $(THIS_MOD_NAME)-file.o shbde_pci.o shbde_iproc.o shbde_mdio.o gmodule.o" + +module: $(KMODULE) + +# +# Note that for NO_PRECOMPILED_MODULE, the subdirectory 'systems/bde/linux/kernel/kernel_module' +# is not created and all action is done in systems/bde/linux/kernel +# +$(KMODULE): $(SRCS_COMPOSING) + mkdir -p $(BLDDIR) + rm -fr $(BLDDIR)/$(KERNEL_MODULE_DIR) + rm -f $(BLDDIR)/*.c + rm -f $(BLDDIR)/*.o + rm -f $(BLDDIR)/*.ko + cp ${SDK}/make/Makefile.linux-kmodule $(BLDDIR)/Makefile + # + # Here we copy all source files, which are required for the + # compilation of the module, into one directory. It seems that + # specifying path for 'remote' files is not acceptable for + # the module-creation mechanism in the kernel. + # + cp ./*.c $(BLDDIR)/ + cp ./*.h $(BLDDIR)/ + cp ../shared/*.c $(BLDDIR)/ + cp ../../shared/*.c $(BLDDIR)/ + cp ../../../linux/kernel/modules/shared/*.c $(BLDDIR)/ + # + # We change here the name of the 'base' file since, it seems, the module-creation + # mechanism does not add symbols when the name of one of the files is the same as + # the name of the module itself. + # + mv $(BLDDIR)/$(THIS_MOD_NAME).c $(BLDDIR)/$(THIS_MOD_NAME)-file.c + MOD_OBJS=$(OBJECTS_COMPOSING) MOD_NAME=$(THIS_MOD_NAME) $(MAKE) -C $(BLDDIR) $(THIS_MOD_NAME).ko LOC_BLDDIR=$(BLDDIR) LOC_SRCDIR=$(PWD) +# } +else +# { +module: $(MODULE) +# +# This is for the compilation of the 'precompiled' object. We keep it +# here for compatibility. +# +$(MODULE): $(BLDDIR)/.tree $(BOBJS) kernel_libs + mkdir -p $(@D) + $(LD) $(MODULE_LDFLAGS) -r -d $(BOBJS) $(LIBS) -o $@ +$(KMODULE): $(MODULE) + rm -fr $(BLDDIR)/$(KERNEL_MODULE_DIR) + mkdir $(BLDDIR)/$(KERNEL_MODULE_DIR) + cp ${SDK}/make/Makefile.linux-kmodule $(BLDDIR)/$(KERNEL_MODULE_DIR)/Makefile + MOD_NAME=$(THIS_MOD_NAME) $(MAKE) -C $(BLDDIR)/$(KERNEL_MODULE_DIR) $(THIS_MOD_NAME).ko + +include $(SDK)/make/Make.depend +# } +endif + +kernel_libs: + $(MAKE) -C $(SDK)/systems/linux/kernel/modules/shared + +# Make.depend is before clean:: so that Make.depend's clean:: runs first. + +clean:: + $(MAKE) -C $(SDK)/systems/linux/kernel/modules/shared $@ + $(RM) $(BOBJS) $(MODULE) + $(RM) $(BLDDIR)/$(KERNEL_MODULE_DIR) + +distclean:: + +.PHONY: build kernel_libs diff --git a/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux-kernel-bde.c b/platform/broadcom/saibcm-modules-legacy-th/systems/bde/linux/kernel/linux-kernel-bde.c similarity index 95% rename from platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux-kernel-bde.c rename to platform/broadcom/saibcm-modules-legacy-th/systems/bde/linux/kernel/linux-kernel-bde.c index 89e1020a8ad..562ce21e3b8 100644 --- a/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux-kernel-bde.c +++ b/platform/broadcom/saibcm-modules-legacy-th/systems/bde/linux/kernel/linux-kernel-bde.c @@ -1,6 +1,5 @@ /* - * - * $Copyright: 2017-2025 Broadcom Inc. All rights reserved. + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. @@ -144,12 +143,6 @@ int msixcnt = 1; #define IRQF_SHARED SA_SHIRQ #endif -/* Set irq affinity for PCIe interrupt handler */ -int pci_irq_affinity = -1; -LKM_MOD_PARAM(pci_irq_affinity, "i", int, 0); -MODULE_PARM_DESC(pci_irq_affinity, -"Manually enforce IRQ affinity for the PCIe interrupt handler"); - #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,18) typedef unsigned long resource_size_t; #endif /* LINUX_VERSION_CODE < KERNEL_VERSION(2,6,18) */ @@ -235,13 +228,9 @@ MODULE_PARM_DESC(pci_bridge_setup, #define _ISR_PARAMS(_i,_d,_r) int _i, void *_d, struct pt_regs *_r typedef irqreturn_t (*irq_handler_t)(int _i, void *_d, struct pt_regs *_r); #endif -#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,15,0)) -#define SYNC_IRQ(_i) synchronize_hardirq(_i) -#else #define SYNC_IRQ(_i) synchronize_irq(_i) -#endif -static char * ___strtok; -static char * strtok(char * s,const char * ct) +char * ___strtok; +char * strtok(char * s,const char * ct) { char *sbegin, *send; sbegin = s ? s : ___strtok; @@ -259,6 +248,8 @@ static char * strtok(char * s,const char * ct) ___strtok = send; return (sbegin); } +LKM_EXPORT_SYM(___strtok); +LKM_EXPORT_SYM(strtok); /* PCIe capabilities */ #ifndef PCI_CAP_ID_EXP @@ -392,15 +383,8 @@ typedef struct bde_ctrl_s { uint32 inst_id; /* The instance ID of the instance controlling the device */ /* - * Callback function to determine whether there are any pending - * interrupts. This function is called periodically from a timer - * tick function when the interrupt handler is idle. - * - * The timer tick function is disabled temporarily when a second - * interrupt handler is installed. - * - * The timer tick function is disabled permanently if the PCI link - * is lost or reset or if the callback function is removed. + * Callback function from user BDE to determine if there are pending interrupts + * currently. */ int (*intr_pending)(void *); void *intr_pending_data; @@ -409,8 +393,6 @@ typedef struct bde_ctrl_s { uint32 stuck_interrupts; /* Number of stuck interrupts detected */ uint32 no_intr_isr_ticks; /* Number of ISR ticks without interrupt occurred */ struct timer_list isr_tick; /* Timer tick to prevent stuck interrupt */ - uint32 timer_active; /* Timer was added for handling pending interrupt */ - #ifdef INCLUDE_SRAM_DMA uint32 dev_sram_dma_start; /* start address of device SRAM used for DMA */ uint32 dev_sram_dma_size; /* size in bytes of device SRAM used for DMA */ @@ -1280,8 +1262,22 @@ static const struct pci_device_id _id_table[] = { { BROADCOM_VENDOR_ID, BCM56801_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, { BROADCOM_VENDOR_ID, BCM56802_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, { BROADCOM_VENDOR_ID, BCM56803_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56630_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56634_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56636_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56638_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56639_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56538_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56520_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56521_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56522_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56524_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56526_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, { BROADCOM_VENDOR_ID, BCM56534_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56331_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56333_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, { BROADCOM_VENDOR_ID, BCM56334_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56338_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, { BROADCOM_VENDOR_ID, BCM56320_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, { BROADCOM_VENDOR_ID, BCM56321_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, { BROADCOM_VENDOR_ID, BCM56132_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, @@ -1380,6 +1376,15 @@ static const struct pci_device_id _id_table[] = { { BROADCOM_VENDOR_ID, BCM56467_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, { BROADCOM_VENDOR_ID, BCM56468_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, { BROADCOM_VENDOR_ID, BCM56246_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56850_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56851_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56852_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56853_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56854_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56855_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56834_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56750_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, BCM56830_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, { BROADCOM_VENDOR_ID, BCM55440_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, { BROADCOM_VENDOR_ID, BCM55441_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, { BROADCOM_VENDOR_ID, BCM56060_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, @@ -1699,7 +1704,7 @@ static const struct pci_device_id _id_table[] = { { BROADCOM_VENDOR_ID, JERICHO3_DEVICE_ID + 4, PCI_ANY_ID, PCI_ANY_ID }, { BROADCOM_VENDOR_ID, JERICHO3_DEVICE_ID + 5, PCI_ANY_ID, PCI_ANY_ID }, { BROADCOM_VENDOR_ID, JERICHO3_DEVICE_ID + 6, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, J3_PLUS_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, JERICHO3_DEVICE_ID + 7, PCI_ANY_ID, PCI_ANY_ID }, { BROADCOM_VENDOR_ID, JERICHO3_DEVICE_ID + 8, PCI_ANY_ID, PCI_ANY_ID }, { BROADCOM_VENDOR_ID, JERICHO3_DEVICE_ID + 9, PCI_ANY_ID, PCI_ANY_ID }, { BROADCOM_VENDOR_ID, Q3_DEVICE_ID_START, PCI_ANY_ID, PCI_ANY_ID }, @@ -1715,15 +1720,9 @@ static const struct pci_device_id _id_table[] = { { BROADCOM_VENDOR_ID, J3AI_DEVICE_ID + 4, PCI_ANY_ID, PCI_ANY_ID }, { BROADCOM_VENDOR_ID, J3AI_DEVICE_ID + 5, PCI_ANY_ID, PCI_ANY_ID }, { BROADCOM_VENDOR_ID, J3AI_DEVICE_ID + 6, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, J3AI_PLUS_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, J3AI_PLUS_DEVICE_ID + 1, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, J3AI_PLUS_DEVICE_ID + 2, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, J3AI_PLUS_DEVICE_ID + 3, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, J3AI_PLUS_DEVICE_ID + 4, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, J3AI_PLUS_DEVICE_ID + 5, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, J3AI_PLUS_DEVICE_ID + 6, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, J3AI_PLUS_DEVICE_ID + 7, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, J3AI_PLUS_DEVICE_ID + 8, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, J3AI_DEVICE_ID + 7, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, J3AI_DEVICE_ID + 8, PCI_ANY_ID, PCI_ANY_ID }, + { BROADCOM_VENDOR_ID, J3AI_DEVICE_ID + 9, PCI_ANY_ID, PCI_ANY_ID }, { BROADCOM_VENDOR_ID, Q3D_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, { BROADCOM_VENDOR_ID, Q3D_DEVICE_ID + 1, PCI_ANY_ID, PCI_ANY_ID }, { BROADCOM_VENDOR_ID, Q3D_DEVICE_ID + 2, PCI_ANY_ID, PCI_ANY_ID }, @@ -1756,57 +1755,6 @@ static const struct pci_device_id _id_table[] = { { BROADCOM_VENDOR_ID, Q3N_ORIG_DEVICE_ID + 3, PCI_ANY_ID, PCI_ANY_ID }, { BROADCOM_VENDOR_ID, Q3N_ORIG_DEVICE_ID + 4, PCI_ANY_ID, PCI_ANY_ID }, #endif -#ifdef BCM_JERICHO_4_SUPPORT - { BROADCOM_VENDOR_ID, JERICHO4_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, JERICHO4_DEVICE_ID + 1, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, JERICHO4_DEVICE_ID + 2, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, JERICHO4_DEVICE_ID + 3, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, JERICHO4_DEVICE_ID + 4, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, JERICHO4_DEVICE_ID + 5, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, JERICHO4_DEVICE_ID + 6, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, JERICHO4_DEVICE_ID + 7, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, JERICHO4_DEVICE_ID + 8, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, JERICHO4_DEVICE_ID + 9, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, Q4_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, Q4_DEVICE_ID + 1, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, Q4_DEVICE_ID + 2, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, Q4_DEVICE_ID + 3, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, Q4_DEVICE_ID + 4, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, Q4_DEVICE_ID + 5, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, Q4_DEVICE_ID + 6, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, Q4_DEVICE_ID + 7, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, Q4_DEVICE_ID + 8, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, Q4_DEVICE_ID + 9, PCI_ANY_ID, PCI_ANY_ID }, -#endif - -#ifdef BCM_Q4D_SUPPORT - { BROADCOM_VENDOR_ID, Q4D_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, Q4D_DEVICE_ID + 1, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, Q4D_DEVICE_ID + 2, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, Q4D_DEVICE_ID + 3, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, Q4D_DEVICE_ID + 4, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, Q4D_DEVICE_ID + 5, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, Q4D_DEVICE_ID + 6, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, Q4D_DEVICE_ID + 7, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, Q4D_DEVICE_ID + 8, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, Q4D_DEVICE_ID + 9, PCI_ANY_ID, PCI_ANY_ID }, -#endif - - -#ifdef BCM_J4L_SUPPORT - { BROADCOM_VENDOR_ID, J4L_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, J4L_DEVICE_ID + 1, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, J4L_DEVICE_ID + 2, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, J4L_DEVICE_ID + 3, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, J4L_DEVICE_ID + 4, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, J4L_DEVICE_ID + 5, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, J4L_DEVICE_ID + 6, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, J4L_DEVICE_ID + 7, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, J4L_DEVICE_ID + 8, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, J4L_DEVICE_ID + 9, PCI_ANY_ID, PCI_ANY_ID }, -#endif - - #endif #endif /* BCM_DNX_SUPPORT */ #ifdef BCM_DFE_SUPPORT @@ -1864,20 +1812,6 @@ static const struct pci_device_id _id_table[] = { { BROADCOM_VENDOR_ID, RAMON3_DEVICE_ID + 8, PCI_ANY_ID, PCI_ANY_ID }, { BROADCOM_VENDOR_ID, RAMON3_DEVICE_ID + 9, PCI_ANY_ID, PCI_ANY_ID }, #endif -#endif -#ifdef BCM_DNXFE_SUPPORT -#ifdef BCM_RAMON_4_SUPPORT - { BROADCOM_VENDOR_ID, RAMON4_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, RAMON4_DEVICE_ID + 1, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, RAMON4_DEVICE_ID + 2, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, RAMON4_DEVICE_ID + 3, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, RAMON4_DEVICE_ID + 4, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, RAMON4_DEVICE_ID + 5, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, RAMON4_DEVICE_ID + 6, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, RAMON4_DEVICE_ID + 7, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, RAMON4_DEVICE_ID + 8, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, RAMON4_DEVICE_ID + 9, PCI_ANY_ID, PCI_ANY_ID }, -#endif #endif { BROADCOM_VENDOR_ID, BCM56860_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, { BROADCOM_VENDOR_ID, BCM56861_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, @@ -1929,9 +1863,6 @@ static const struct pci_device_id _id_table[] = { { BROADCOM_VENDOR_ID, BCM56472_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, { BROADCOM_VENDOR_ID, BCM56475_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, { BROADCOM_VENDOR_ID, BCM56474_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, BCM56390_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, BCM56391_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, - { BROADCOM_VENDOR_ID, BCM56392_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID }, { 0, 0, 0, 0 } };; @@ -2953,9 +2884,9 @@ _pci_probe(struct pci_dev *dev, const struct pci_device_id *ent) &icfg->cmic_ver, &icfg->cmic_rev); #ifdef BCM_Q3A_SUPPORT - if (((ctrl->bde_dev.device & DNXC_DEVID_FAMILY_MASK) == Q3U_ORIG_DEVICE_ID) && (icfg->iproc_ver == 20)) { + if (((ctrl->bde_dev.device & 0xfff0) == 0x8400) && (icfg->iproc_ver == 20)) { /* Workaround for conflicting between Q3u,n devices and Greyhound */ - ctrl->bde_dev.device |= Q3U_DEVICE_ID ^ Q3U_ORIG_DEVICE_ID; /* 0x840x -> 0x84ax */ + ctrl->bde_dev.device |= 0xA0; /* 0x840x -> 0x84ax */ if (debug >= 2) { gprintk("new dev ID = 0x%x\n", ctrl->bde_dev.device); @@ -3048,8 +2979,6 @@ _pci_probe(struct pci_dev *dev, const struct pci_device_id *ent) gprintk("PCI device 0x%x:0x%x using SRAM DMA at 0x%x size 0x%x dev_type=0x%x dev=%u\n", dev->vendor, dev->device, ctrl->dev_sram_dma_start, ctrl->dev_sram_dma_size, ctrl->dev_type, (unsigned)(ctrl - _devices)); } - /** Device no PCIe connect, the BARs must be accessed by the BDE, permit sub window remapping */ - ctrl->shbde.icfg.no_subwin_remap = 0; break; default: break; @@ -3127,15 +3056,8 @@ _pci_remove(struct pci_dev* dev) } } #ifdef CONFIG_PCI_MSI - if (ctrl->intr_pending && ctrl->use_msi >= PCI_USE_INT_MSI && ctrl->timer_active) { - ctrl->timer_active = 0; - del_timer_sync(&ctrl->isr_tick); - } - _msi_disconnect(ctrl); #endif - - ctrl->isr = NULL; ctrl->isr_data = NULL; ctrl->isr2 = NULL; @@ -3441,8 +3363,6 @@ _init(void) for (i = 0; i < LINUX_BDE_MAX_DEVICES; ++i) { _devices[i].inst_id = BDE_DEV_INST_ID_INVALID; - _devices[i].timer_active = 0; - _devices[i].intr_pending = NULL; } return 0; @@ -3972,18 +3892,12 @@ _isr(_ISR_PARAMS(irq, dev_id, iregs)) return IRQ_HANDLED; } -#ifdef CONFIG_PCI_MSI static void lkbde_isrtick_func(bde_ctrl_t *ctrl) { unsigned long flags; spin_lock_irqsave(&ctrl->lock, flags); - if (!ctrl->timer_active) { - /* Timer is not active, do nothing */ - spin_unlock_irqrestore(&ctrl->lock, flags); - return; - } if (ctrl->prev_interrupts == ctrl->interrupts) { if (ctrl->intr_pending(ctrl->intr_pending_data)) { @@ -4003,9 +3917,7 @@ lkbde_isrtick_func(bde_ctrl_t *ctrl) ctrl->isr_tick.expires = jiffies + msecs_to_jiffies(isrtickms); spin_unlock_irqrestore(&ctrl->lock, flags); - if (ctrl->timer_active) { - add_timer(&ctrl->isr_tick); - } + add_timer(&ctrl->isr_tick); } #if (LINUX_VERSION_CODE < KERNEL_VERSION(4,15,0)) @@ -4024,33 +3936,6 @@ lkbde_isrtick(struct timer_list *t) } #endif -static void -lkbde_isrtick_add(bde_ctrl_t *ctrl) -{ - if (debug >= 1) { - gprintk("Add isr tick, msi %d, intr pending %p, timer active %d\n", - ctrl->use_msi, ctrl->intr_pending, ctrl->timer_active); - } - - if (ctrl->use_msi >= PCI_USE_INT_MSI && ctrl->intr_pending - && !ctrl->timer_active) { -#if (LINUX_VERSION_CODE < KERNEL_VERSION(4,15,0)) - init_timer(&ctrl->isr_tick); - ctrl->isr_tick.data = (unsigned long)ctrl; - ctrl->isr_tick.function = lkbde_isrtick; -#else - timer_setup(&ctrl->isr_tick, lkbde_isrtick, 0); -#endif - ctrl->isr_tick.expires = jiffies + msecs_to_jiffies(isrtickms); - ctrl->timer_active = 1; - add_timer(&ctrl->isr_tick); - if (debug > 1) { - gprintk("isr tick added\n"); - } - } -} -#endif - static int _interrupt_connect(int d, void (*isr)(void *), @@ -4102,16 +3987,6 @@ _interrupt_connect(int d, ctrl->isr = isr; ctrl->isr_data = isr_data; if (isr_active) { - if (debug >= 1) { - gprintk("add isrtick added? %d\n", ctrl->timer_active); - } - -#ifdef CONFIG_PCI_MSI - /* add isr tick for pending interrupt if ISR tick timer was not added */ - if (!ctrl->timer_active) { - lkbde_isrtick_add(ctrl); - } -#endif /* Main handler (_isr) already installed */ return 0; } @@ -4184,21 +4059,6 @@ _interrupt_connect(int d, if (ret < 0) goto err_disable_msi; - if (pci_irq_affinity >= 0) { - struct cpumask cmask; - - /* Clear the cpumask and pin IRQ to pci_irq_affinity */ - cpumask_clear(&cmask); - cpumask_set_cpu(pci_irq_affinity, &cmask); - - ret = irq_set_affinity_hint(ctrl->iLine, &cmask); - if (ret) { - gprintk("Set IRQ(%d) affinity to core %d failed\n", - ctrl->iLine, pci_irq_affinity); - pci_irq_affinity = -1; - } - } - if (unlikely(debug >= 1)) gprintk("%s(%d):device# = %d, irq_flags = %lu, irq = %d\n", __func__, __LINE__, d, @@ -4207,10 +4067,19 @@ _interrupt_connect(int d, } } -#ifdef CONFIG_PCI_MSI - /* add isr tick */ - lkbde_isrtick_add(ctrl); + if ((ctrl->use_msi >= PCI_USE_INT_MSI) && ctrl->intr_pending) { +#if (LINUX_VERSION_CODE < KERNEL_VERSION(4,15,0)) + init_timer(&ctrl->isr_tick); + ctrl->isr_tick.data = (unsigned long)ctrl; + ctrl->isr_tick.function = lkbde_isrtick; +#else + timer_setup(&ctrl->isr_tick, lkbde_isrtick, 0); #endif + + ctrl->isr_tick.expires = jiffies + msecs_to_jiffies(isrtickms); + add_timer(&ctrl->isr_tick); + } + return 0; err_disable_msi: @@ -4260,8 +4129,7 @@ _interrupt_disconnect(int d) #ifdef CONFIG_PCI_MSI if (isr_active) { - if (ctrl->intr_pending && (ctrl->use_msi >= PCI_USE_INT_MSI) && ctrl->timer_active) { - ctrl->timer_active = 0; + if (ctrl->intr_pending && (ctrl->use_msi >= PCI_USE_INT_MSI)) { del_timer_sync(&ctrl->isr_tick); } } @@ -4275,16 +4143,14 @@ _interrupt_disconnect(int d) ctrl->isr2_data = NULL; ctrl->fmask = 0; if (ctrl->isr) { - -#ifdef CONFIG_PCI_MSI - /* restart timer to handling pending interrupts */ - if (ctrl->intr_pending && ctrl->use_msi >= PCI_USE_INT_MSI) { - lkbde_isrtick_add(ctrl); - } -#endif /* Primary handler still active */ SYNC_IRQ(ctrl->iLine); + /* restart timer to handling pending interrupts */ + if (ctrl->intr_pending && (ctrl->use_msi >= PCI_USE_INT_MSI)) { + ctrl->isr_tick.expires = jiffies + msecs_to_jiffies(isrtickms); + add_timer(&ctrl->isr_tick); + } return 0; } } else { @@ -4294,15 +4160,14 @@ _interrupt_disconnect(int d) ctrl->isr = NULL; ctrl->isr_data = NULL; if (ctrl->isr2) { + /* Secondary handler still active */ + SYNC_IRQ(ctrl->iLine); -#ifdef CONFIG_PCI_MSI /* restart timer to handling pending interrupts */ - if (ctrl->intr_pending && ctrl->use_msi >= PCI_USE_INT_MSI) { - lkbde_isrtick_add(ctrl); + if (ctrl->intr_pending && (ctrl->use_msi >= PCI_USE_INT_MSI)) { + ctrl->isr_tick.expires = jiffies + msecs_to_jiffies(isrtickms); + add_timer(&ctrl->isr_tick); } -#endif - /* Secondary handler still active */ - SYNC_IRQ(ctrl->iLine); return 0; } } @@ -4340,9 +4205,6 @@ _interrupt_disconnect(int d) } else #endif { - if (pci_irq_affinity >= 0) { - irq_set_affinity_hint(ctrl->iLine, NULL); - } free_irq(ctrl->iLine, ctrl); } #ifdef CONFIG_PCI_MSI @@ -4656,17 +4518,6 @@ lkbde_cpu_pci_register(int d) case Q3U_DEVICE_ID: #endif #endif -#ifdef BCM_JERICHO_4_SUPPORT - case JERICHO4_DEVICE_ID: - case Q4_DEVICE_ID: -#endif -#ifdef BCM_Q4D_SUPPORT - case Q4D_DEVICE_ID: -#endif -#ifdef BCM_J4L_SUPPORT - case J4L_DEVICE_ID: -#endif - #endif #ifdef BCM_DNXF_SUPPORT case BCM88790_DEVICE_ID: @@ -4674,11 +4525,6 @@ lkbde_cpu_pci_register(int d) case RAMON2_DEVICE_ID: case RAMON3_DEVICE_ID: #endif -#endif -#ifdef BCM_DNXFE_SUPPORT -#ifdef BCM_RAMON_4_SUPPORT - case RAMON4_DEVICE_ID: -#endif #endif /* * For DMA transactions - set Max_Payload_Size and @@ -4830,23 +4676,8 @@ linux_bde_create(linux_bde_bus_t *bus, ibde_t **ibde) int linux_bde_destroy(ibde_t *ibde) { - - /* timer was added in user_bde context, must delete it */ -#ifdef CONFIG_PCI_MSI - int i; - for (i = 0; i < _ndevices; i++) { - bde_ctrl_t *ctrl = _devices + i; - - /* free allocated kernel space memory */ - if (ctrl->intr_pending && (ctrl->use_msi >= PCI_USE_INT_MSI) && ctrl->timer_active) { - ctrl->timer_active = 0; - del_timer_sync(&ctrl->isr_tick); - } - } -#endif - /* nothing */ - return 0; + return 0; } /* diff --git a/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux_dma.c b/platform/broadcom/saibcm-modules-legacy-th/systems/bde/linux/kernel/linux_dma.c similarity index 97% rename from platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux_dma.c rename to platform/broadcom/saibcm-modules-legacy-th/systems/bde/linux/kernel/linux_dma.c index c52e0900480..eb0d067fbeb 100644 --- a/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux_dma.c +++ b/platform/broadcom/saibcm-modules-legacy-th/systems/bde/linux/kernel/linux_dma.c @@ -1,7 +1,6 @@ /* * $Id: linux_dma.c,v 1.414 Broadcom SDK $ - * - * $Copyright: 2017-2025 Broadcom Inc. All rights reserved. + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. @@ -750,11 +749,11 @@ lkbde_edk_get_dma_info(int dev_id, phys_addr_t* cpu_pbase, phys_addr_t* dma_pbas } void * -lkbde_edk_dmamem_map_p2v(int dev_no, dma_addr_t paddr) +lkbde_edk_dmamem_map_p2v(dma_addr_t paddr) { - if ((paddr >= _edk_dma_pool[dev_no].dma_pbase) && - (paddr < (_edk_dma_pool[dev_no].dma_pbase + _edk_dma_pool[dev_no].size))) { - return (_edk_dma_pool[dev_no].dma_vbase + (paddr - _edk_dma_pool[dev_no].dma_pbase)); + if ((paddr >= _edk_dma_pool[0].dma_pbase) && + (paddr < (_edk_dma_pool[0].dma_pbase + _edk_dma_pool[0].size))) { + return (_edk_dma_pool[0].dma_vbase + (paddr - _edk_dma_pool[0].dma_pbase)); } else { return NULL; } @@ -1246,6 +1245,29 @@ _p2l(int d, sal_paddr_t paddr) return bus_to_virt(paddr); } +/* + * Some of the driver malloc's are too large for + * kmalloc(), so 'sal_alloc' and 'sal_free' in the + * linux kernel sal cannot be implemented with kmalloc(). + * + * Instead, they expect someone to provide an allocator + * that can handle the gimongous size of some of the + * allocations, and we provide it here, by allocating + * this memory out of the boot-time dma pool. + * + * These are the functions in question: + */ + +void* kmalloc_giant(int sz) +{ + return mpool_alloc(_dma_pool, sz); +} + +void kfree_giant(void* ptr) +{ + return mpool_free(_dma_pool, ptr); +} + uint32_t * _salloc(int d, int size, const char *name) { @@ -1320,27 +1342,6 @@ _dma_pprint(struct seq_file *m) USE_LINUX_BDE_MMAP ? ", local mmap" : ""); } -int -lkbde_get_phys_to_virt(int d, phys_addr_t paddr, sal_vaddr_t *vaddr) -{ - sal_vaddr_t vaddr_base = (sal_vaddr_t)_dma_vbase; - sal_vaddr_t vaddr_new; - - if (_dma_mem_size) { - /* DMA memory is a contiguous block */ - if (paddr == 0) { - return -1; - } - - vaddr_new = (vaddr_base + (paddr - _dma_pbase)); - *vaddr = vaddr_new; - return 0; - } - - *vaddr = 0; - return -1; -} - /* * Export functions */ @@ -1349,5 +1350,6 @@ lkbde_get_phys_to_virt(int d, phys_addr_t paddr, sal_vaddr_t *vaddr) LKM_EXPORT_SYM(lkbde_edk_get_dma_info); LKM_EXPORT_SYM(lkbde_edk_dmamem_map_p2v); #endif +LKM_EXPORT_SYM(kmalloc_giant); +LKM_EXPORT_SYM(kfree_giant); LKM_EXPORT_SYM(lkbde_get_dma_info); -LKM_EXPORT_SYM(lkbde_get_phys_to_virt); diff --git a/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux_shbde.c b/platform/broadcom/saibcm-modules-legacy-th/systems/bde/linux/kernel/linux_shbde.c similarity index 98% rename from platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux_shbde.c rename to platform/broadcom/saibcm-modules-legacy-th/systems/bde/linux/kernel/linux_shbde.c index 64fcd389722..5d0f6a1a752 100644 --- a/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux_shbde.c +++ b/platform/broadcom/saibcm-modules-legacy-th/systems/bde/linux/kernel/linux_shbde.c @@ -1,7 +1,6 @@ /* * $Id: $ - * - * $Copyright: 2017-2025 Broadcom Inc. All rights reserved. + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. diff --git a/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux_shbde.h b/platform/broadcom/saibcm-modules-legacy-th/systems/bde/linux/kernel/linux_shbde.h similarity index 95% rename from platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux_shbde.h rename to platform/broadcom/saibcm-modules-legacy-th/systems/bde/linux/kernel/linux_shbde.h index 1b9cb4ea2f4..68b9669c966 100644 --- a/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/linux_shbde.h +++ b/platform/broadcom/saibcm-modules-legacy-th/systems/bde/linux/kernel/linux_shbde.h @@ -1,7 +1,6 @@ /* * $Id: $ - * - * $Copyright: 2017-2025 Broadcom Inc. All rights reserved. + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. diff --git a/platform/broadcom/saibcm-modules/systems/bde/linux/shared/mpool.c b/platform/broadcom/saibcm-modules-legacy-th/systems/bde/linux/shared/mpool.c similarity index 99% rename from platform/broadcom/saibcm-modules/systems/bde/linux/shared/mpool.c rename to platform/broadcom/saibcm-modules-legacy-th/systems/bde/linux/shared/mpool.c index 4363b2e97bb..0cdad662f99 100644 --- a/platform/broadcom/saibcm-modules/systems/bde/linux/shared/mpool.c +++ b/platform/broadcom/saibcm-modules-legacy-th/systems/bde/linux/shared/mpool.c @@ -1,7 +1,6 @@ /* * $Id: mpool.c,v 1.18 Broadcom SDK $ - * - * $Copyright: 2017-2025 Broadcom Inc. All rights reserved. + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. diff --git a/platform/broadcom/saibcm-modules-legacy-th/systems/bde/linux/user/kernel/Makefile b/platform/broadcom/saibcm-modules-legacy-th/systems/bde/linux/user/kernel/Makefile new file mode 100644 index 00000000000..1ea23533c3d --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/systems/bde/linux/user/kernel/Makefile @@ -0,0 +1,130 @@ +# -*- Makefile -*- +# $Id: Makefile,v 1.13 Broadcom SDK $ +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# +# +# +LOCALDIR = systems/bde/linux/user/kernel + +# Make sure we build for the kernel if this is a user-mode build +ifneq ($(platform), ) +override-target=linux-$(platform) +endif + +include $(SDK)/make/Make.config + +LIBS = $(LIBDIR)/libkern.a + +KERNEL_MODULE_DIR = kernel_module +THIS_MOD_NAME := linux-user-bde +MODULE = $(LIBDIR)/$(THIS_MOD_NAME).o +KMODULE = $(LIBDIR)/$(THIS_MOD_NAME).ko +build: module $(KMODULE) + +ifeq (1,$(NO_PRECOMPILED_MODULE)) +# { +# +# For 'NO_PRECOMPILED_MODULE', the first kernel compilation is done +# in systems/bde/linux/user/kernel (and not in systems/bde/linux/user/kernel/kernel_module, +# which is not even created). +# KBUILD_EXTRA_SYMBOLS exports the symbols created on the first module compilation to +# all other module compilations. +# +KBUILD_EXTRA_SYMBOLS := ${BLDDIR}/../../kernel/Module.symvers +export KBUILD_EXTRA_SYMBOLS +# +# These are the objects which need to be compiled, in the kernel, to +# created the module object file. +# +SRCS_COMPOSING = $(THIS_MOD_NAME).c ../../../../linux/kernel/modules/shared/gmodule.c +OBJECTS_COMPOSING = "$(THIS_MOD_NAME)-file.o gmodule.o" +# +# Note that for NO_PRECOMPILED_MODULE, the subdirectory 'systems/bde/linux/user/kernel/kernel_module' +# is not created and all action is done in systems/bde/linux/user/kernel +# +module: $(KMODULE) + +# +# Note that for NO_PRECOMPILED_MODULE, the subdirectory 'systems/bde/linux/kernel/kernel_module' +# is not created and all action is done in systems/bde/linux/kernel +# +$(KMODULE): $(SRCS_COMPOSING) + mkdir -p $(BLDDIR) + rm -fr $(BLDDIR)/$(KERNEL_MODULE_DIR) + rm -f $(BLDDIR)/*.c + rm -f $(BLDDIR)/*.o + rm -f $(BLDDIR)/*.ko + cp ${SDK}/make/Makefile.linux-kmodule $(BLDDIR)/Makefile + cp ./*.c $(BLDDIR)/ + cp ./*.h $(BLDDIR)/ + cp ../../../../linux/kernel/modules/shared/*.c $(BLDDIR)/ + cat ${KBUILD_EXTRA_SYMBOLS} > $(BLDDIR)/Module.symvers + # + # We change here the name of the 'base' file since, it seems, the module-creation + # mechanism does not add symbols when the name of one of the files is the same as + # the name of the module itself. + # + mv $(BLDDIR)/$(THIS_MOD_NAME).c $(BLDDIR)/$(THIS_MOD_NAME)-file.c + MOD_OBJS=$(OBJECTS_COMPOSING) MOD_NAME=$(THIS_MOD_NAME) $(MAKE) -C $(BLDDIR) $(THIS_MOD_NAME).ko LOC_BLDDIR=$(BLDDIR) LOC_SRCDIR=$(PWD) +# } +else +# { +KBUILD_EXTRA_SYMBOLS := ${BLDDIR}/../../kernel/kernel_module/Module.symvers +export KBUILD_EXTRA_SYMBOLS + +module: $(MODULE) + +# +# This is for the compilation of the 'precompiled' object. We keep it +# here for compatibility. +# +$(MODULE): $(BLDDIR)/.tree $(BOBJS) kernel_libs + $(LD) $(MODULE_LDFLAGS) -r -d $(BOBJS) $(LIBS) -o $@ + +$(KMODULE): $(MODULE) + rm -fr $(BLDDIR)/$(KERNEL_MODULE_DIR) + mkdir $(BLDDIR)/$(KERNEL_MODULE_DIR) + cp ${SDK}/make/Makefile.linux-kmodule $(BLDDIR)/$(KERNEL_MODULE_DIR)/Makefile + cat ${KBUILD_EXTRA_SYMBOLS} > $(BLDDIR)/$(KERNEL_MODULE_DIR)/Module.symvers + MOD_NAME=$(THIS_MOD_NAME) KBUILD_EXTRA_SYMBOLS="${KBUILD_EXTRA_SYMBOLS}" $(MAKE) -C $(BLDDIR)/$(KERNEL_MODULE_DIR) $(THIS_MOD_NAME).ko + +include $(SDK)/make/Make.depend +# } +endif + +kernel_libs: + $(MAKE) -C $(SDK)/systems/linux/kernel/modules/shared + +# Make.depend is before clean:: so that Make.depend's clean:: runs first. + +clean:: + $(MAKE) -C $(SDK)/systems/linux/kernel/modules/shared $@ + $(RM) $(BOBJS) $(MODULE) + $(RM) $(BLDDIR)/$(KERNEL_MODULE_DIR) + +distclean:: + +.PHONY: build kernel_libs diff --git a/platform/broadcom/saibcm-modules/systems/bde/linux/user/kernel/linux-user-bde.c b/platform/broadcom/saibcm-modules-legacy-th/systems/bde/linux/user/kernel/linux-user-bde.c similarity index 96% rename from platform/broadcom/saibcm-modules/systems/bde/linux/user/kernel/linux-user-bde.c rename to platform/broadcom/saibcm-modules-legacy-th/systems/bde/linux/user/kernel/linux-user-bde.c index 54af6516b30..da21588191c 100644 --- a/platform/broadcom/saibcm-modules/systems/bde/linux/user/kernel/linux-user-bde.c +++ b/platform/broadcom/saibcm-modules-legacy-th/systems/bde/linux/user/kernel/linux-user-bde.c @@ -1,6 +1,5 @@ /* - * - * $Copyright: 2017-2025 Broadcom Inc. All rights reserved. + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. @@ -251,13 +250,6 @@ LKM_MOD_PARAM(force_mask_irq, "i", int, (S_IRUGO | S_IWUSR)); MODULE_PARM_DESC(force_mask_irq, "Force mask interrupts when pcie remove (default 0)"); #endif -/* Periodically check for pending interrupts when interrupt handler is idle */ -static int intr_pending_check = 1; -LKM_MOD_PARAM(intr_pending_check, "i", int, (S_IRUGO | S_IWUSR)); -MODULE_PARM_DESC(intr_pending_check, -"Check for pending interrupts periodically (default 1)."); - - static ibde_t *user_bde = NULL; typedef void (*isr_f)(void *); @@ -283,7 +275,7 @@ typedef struct _intr_regs_s { typedef struct bde_ctrl_s { uint32 dev_type; int irq; - atomic_t enabled; + int enabled; int devid; isr_f isr; uint32 *ba; @@ -379,9 +371,8 @@ static _dma_pool_t _dma_pool; * Nothing */ static void -_cmic_interrupt(void *arg) +_cmic_interrupt(bde_ctrl_t *ctrl) { - bde_ctrl_t *ctrl = (bde_ctrl_t *)arg; int d; uint32_t mask = 0, stat, imask = 0, fmask = 0; bde_inst_resource_t *res; @@ -416,7 +407,7 @@ _cmic_interrupt(void *arg) #endif } -static void +void dump_interrupt_regs(bde_ctrl_t *ctrl , int dev) { int ind; @@ -652,9 +643,8 @@ _cmicx_interrupt_pending(void *data) } static void -_cmicx_interrupt(void *arg) +_cmicx_interrupt(bde_ctrl_t *ctrl) { - bde_ctrl_t *ctrl = (bde_ctrl_t *)arg; bde_inst_resource_t *res; int ret; @@ -685,9 +675,8 @@ _cmicx_interrupt(void *arg) #ifdef NEED_CMICX_GEN2_INTERRUPT static void -_cmicx_gen2_interrupt(void *arg) +_cmicx_gen2_interrupt(bde_ctrl_t *ctrl) { - bde_ctrl_t *ctrl = (bde_ctrl_t *)arg; int d, ind ; uint32 stat, iena, mask, fmask; int active_interrupts = 0; @@ -794,9 +783,8 @@ _cmicx_gen2_interrupt(void *arg) #endif /* NEED_CMICX_GEN2_INTERRUPT */ static void -_cmicm_interrupt(void *arg) +_cmicm_interrupt(bde_ctrl_t *ctrl) { - bde_ctrl_t *ctrl = (bde_ctrl_t *)arg; int d; int cmc = BDE_CMICM_PCIE_CMC; uint32 stat, mask = 0, fmask = 0, imask = 0; @@ -880,9 +868,8 @@ _cmicm_interrupt(void *arg) /* some device has cmc0 only */ static void -_cmicd_cmc0_interrupt(void *arg) +_cmicd_cmc0_interrupt(bde_ctrl_t *ctrl) { - bde_ctrl_t *ctrl = (bde_ctrl_t *)arg; int d; int cmc = 0; uint32 stat, mask = 0, fmask = 0, imask = 0; @@ -981,9 +968,8 @@ _cmicd_cmc0_interrupt(void *arg) } static void -_cmicd_interrupt(void *arg) +_cmicd_interrupt(bde_ctrl_t *ctrl) { - bde_ctrl_t *ctrl = (bde_ctrl_t *)arg; int d; int cmc = BDE_CMICD_PCIE_CMC; uint32 stat, mask = 0, fmask = 0, imask = 0; @@ -1100,10 +1086,8 @@ _cmicd_interrupt(void *arg) /* The actual interrupt handler of ethernet devices */ static void -_ether_interrupt(void *arg) +_ether_interrupt(bde_ctrl_t *ctrl) { - bde_ctrl_t *ctrl = (bde_ctrl_t *)arg; - SSOC_WRITEL(0, ctrl->ba + 0x024/4); atomic_set(&_ether_interrupt_has_taken_place, 1); @@ -1119,13 +1103,13 @@ static struct _intr_mode_s { isr_f isr; const char *name; } _intr_mode[] = { - { _cmic_interrupt, "CMIC/CMICe" }, - { _cmicm_interrupt, "CMICm" }, - { _cmicd_interrupt, "CMICd" }, - { _cmicd_cmc0_interrupt, "CMICd CMC0" }, - { _cmicx_interrupt, "CMICx" }, + { (isr_f)_cmic_interrupt, "CMIC/CMICe" }, + { (isr_f)_cmicm_interrupt, "CMICm" }, + { (isr_f)_cmicd_interrupt, "CMICd" }, + { (isr_f)_cmicd_cmc0_interrupt, "CMICd CMC0" }, + { (isr_f)_cmicx_interrupt, "CMICx" }, #ifdef NEED_CMICX_GEN2_INTERRUPT - { _cmicx_gen2_interrupt, "CMICx Gen2" }, + { (isr_f)_cmicx_gen2_interrupt, "CMICx Gen2" }, #endif { NULL, NULL } }; @@ -1169,9 +1153,6 @@ _intr_regs_init(bde_ctrl_t *ctrl, int flag) case BCM53652_DEVICE_ID: case BCM53653_DEVICE_ID: case BCM53654_DEVICE_ID: - case BCM56390_DEVICE_ID: - case BCM56391_DEVICE_ID: - case BCM56392_DEVICE_ID: ihost_sw_prog_intr_num = P19_SW_PROG_INTR_IRQ; break; default: @@ -1232,7 +1213,7 @@ _devices_init(int d) ctrl->inst = 0; if (BDE_DEV_MEM_MAPPED(ctrl->dev_type)) { - atomic_set(&ctrl->enabled, 0); + ctrl->enabled = 0; ctrl->ba = lkbde_get_dev_virt(d); } if (ctrl->dev_type & BDE_SWITCH_DEV_TYPE) { @@ -1241,7 +1222,7 @@ _devices_init(int d) case BCM53547_DEVICE_ID: case BCM53548_DEVICE_ID: case BCM53549_DEVICE_ID: - ctrl->isr = _cmicd_cmc0_interrupt; + ctrl->isr = (isr_f)_cmicd_cmc0_interrupt; break; case BCM88670_DEVICE_ID: case BCM88671_DEVICE_ID: @@ -1302,7 +1283,7 @@ _devices_init(int d) case BCM88956_DEVICE_ID: case BCM88772_DEVICE_ID: case BCM88952_DEVICE_ID: - ctrl->isr = _cmicd_interrupt; + ctrl->isr = (isr_f)_cmicd_interrupt; break; case BCM56370_DEVICE_ID: case BCM56371_DEVICE_ID: @@ -1330,10 +1311,7 @@ _devices_init(int d) case BCM53652_DEVICE_ID: case BCM53653_DEVICE_ID: case BCM53654_DEVICE_ID: - case BCM56390_DEVICE_ID: - case BCM56391_DEVICE_ID: - case BCM56392_DEVICE_ID: - ctrl->isr = _cmicx_interrupt; + ctrl->isr = (isr_f)_cmicx_interrupt; if (ctrl->dev_type & BDE_AXI_DEV_TYPE) { if (!ihost_intr_enable_base) { ihost_intr_enable_base = (uint32_t *)ioremap(HX5_IHOST_GICD_ISENABLERN_1, @@ -1356,20 +1334,20 @@ _devices_init(int d) if (BCM56960_DEVICE_ID == device_id || BCM56930_DEVICE_ID == device_id || BCM56970_DEVICE_ID == device_id) { - ctrl->isr = _cmicd_interrupt; + ctrl->isr = (isr_f)_cmicd_interrupt; } /* check if version is CMICX */ else if (ver == 0x04) { - ctrl->isr = _cmicx_interrupt; + ctrl->isr = (isr_f)_cmicx_interrupt; _intr_regs_init(ctrl, 0); } else { - ctrl->isr = _cmic_interrupt; + ctrl->isr = (isr_f)_cmic_interrupt; if ((ctrl->dev_type & BDE_256K_REG_SPACE) && #ifdef BCM_PETRA_SUPPORT ctrl->devid != 0x1234 && #endif readl(ctrl->ba + CMICE_DEV_REV_ID) == 0) { - ctrl->isr = _cmicm_interrupt; + ctrl->isr = (isr_f)_cmicm_interrupt; } } break; @@ -1391,7 +1369,7 @@ _devices_init(int d) #ifdef BCM_DNXF_SUPPORT case BCM88790_DEVICE_ID: #endif - ctrl->isr = _cmicx_interrupt; + ctrl->isr = (isr_f)_cmicx_interrupt; _intr_regs_init(ctrl, 0); break; @@ -1404,28 +1382,13 @@ _devices_init(int d) case Q3A_DEVICE_ID: case Q3U_DEVICE_ID: #endif -#ifdef BCM_JERICHO_4_SUPPORT - case JERICHO4_DEVICE_ID: - case Q4_DEVICE_ID: -#endif -#ifdef BCM_Q4D_SUPPORT - case Q4D_DEVICE_ID: -#endif -#ifdef BCM_J4L_SUPPORT - case J4L_DEVICE_ID: -#endif #endif #ifdef BCM_DNXF3_SUPPORT case RAMON2_DEVICE_ID: case RAMON3_DEVICE_ID: #endif -#ifdef BCM_DNXFE_SUPPORT -#ifdef BCM_RAMON_4_SUPPORT - case RAMON4_DEVICE_ID: -#endif -#endif #if defined(BCM_DNX3_SUPPORT) || defined(BCM_DNXF3_SUPPORT) - ctrl->isr = _cmicx_gen2_interrupt; + ctrl->isr = (isr_f)_cmicx_gen2_interrupt; _intr_regs_init(ctrl, 2); break; #endif @@ -1524,7 +1487,7 @@ _cleanup(void) if (user_bde) { for (i = 0; i < user_bde->num_devices(BDE_ALL_DEVICES); i++) { - if (atomic_read(&_devices[i].enabled) && + if (_devices[i].enabled && BDE_DEV_MEM_MAPPED(_devices[i].dev_type)) { #if defined(BCM_DNX3_SUPPORT) || defined(BCM_DNXF3_SUPPORT) @@ -1961,9 +1924,8 @@ _ioctl(unsigned int cmd, unsigned long arg) /* Get the total DMA size */ lkbde_get_dma_info(&cpu_pbase, &dma_pbase, &total_size); /* Decrease the total size for each allocated SDK instance */ - for (inst_i = user_bde->num_devices(BDE_ALL_DEVICES); inst_i > 0;) + for (inst_i = 0; inst_i < LINUX_BDE_MAX_DEVICES; inst_i++) { - --inst_i; if (_bde_inst_resource[inst_i].is_active && (_dma_resource_get(inst_i, &cpu_pbase, &dma_pbase, &size) == 0)) { total_size -= size; } @@ -2020,19 +1982,18 @@ _ioctl(unsigned int cmd, unsigned long arg) * This is to handle the use case where userspace * application gets killed abruptly. */ - if (atomic_read(&_devices[io.dev].enabled)) { + if (_devices[io.dev].enabled) { if (debug >= 1) { gprintk("Interrupts already enabled, disable to cleanup\n"); } user_bde->interrupt_disconnect(io.dev); - atomic_set(&_devices[io.dev].enabled, 0); + _devices[io.dev].enabled = 0; } if (_devices[io.dev].dev_type & BDE_SWITCH_DEV_TYPE) { - if (_devices[io.dev].isr && !atomic_read(&_devices[io.dev].enabled)) { + if (_devices[io.dev].isr && !_devices[io.dev].enabled) { /* PCI/CMICX Devices */ if ((_devices[io.dev].dev_type & BDE_PCI_DEV_TYPE) && - (_devices[io.dev].isr == _cmicx_interrupt) && - intr_pending_check) { + (_devices[io.dev].isr == (isr_f)_cmicx_interrupt)) { lkbde_intr_cb_register(io.dev, _cmicx_interrupt_pending, _devices+io.dev); @@ -2041,16 +2002,16 @@ _ioctl(unsigned int cmd, unsigned long arg) user_bde->interrupt_connect(io.dev, _devices[io.dev].isr, _devices+io.dev); - atomic_set(&_devices[io.dev].enabled, 1); + _devices[io.dev].enabled = 1; } } else { /* Process ethernet device interrupt */ - if (!atomic_read(&_devices[io.dev].enabled)) { + if (!_devices[io.dev].enabled) { user_bde->interrupt_connect(io.dev, - _ether_interrupt, + (void(*)(void *))_ether_interrupt, _devices+io.dev); - atomic_set(&_devices[io.dev].enabled, 1); + _devices[io.dev].enabled = 1; } } break; @@ -2058,9 +2019,9 @@ _ioctl(unsigned int cmd, unsigned long arg) if (!VALID_DEVICE(io.dev)) { return -EINVAL; } - if (atomic_read(&_devices[io.dev].enabled)) { + if (_devices[io.dev].enabled) { user_bde->interrupt_disconnect(io.dev); - atomic_set(&_devices[io.dev].enabled, 0); + _devices[io.dev].enabled = 0; } break; case LUBDE_SET_EDK_INTERRUPTS: @@ -2102,7 +2063,7 @@ _ioctl(unsigned int cmd, unsigned long arg) #else /* CMICX Devices */ if ((_devices[io.dev].dev_type & BDE_PCI_DEV_TYPE) && - (_devices[io.dev].isr == _cmicx_interrupt) && + (_devices[io.dev].isr == (isr_f)_cmicx_interrupt) && (intr_timeout > 0)) { unsigned long t_jiffies; int err=0; @@ -2163,7 +2124,7 @@ _ioctl(unsigned int cmd, unsigned long arg) #else /* CMICX Devices */ if ((_devices[io.dev].dev_type & BDE_PCI_DEV_TYPE) && - (_devices[io.dev].isr == _cmicx_interrupt) && + (_devices[io.dev].isr == (isr_f)_cmicx_interrupt) && (intr_timeout > 0)) { unsigned long t_jiffies; int err = 0; @@ -2198,11 +2159,11 @@ _ioctl(unsigned int cmd, unsigned long arg) return -EINVAL; case LUBDE_WRITE_IRQ_MASK: /* CMICx device */ - if (_devices[io.dev].isr == _cmicx_interrupt) { + if (_devices[io.dev].isr == (isr_f)_cmicx_interrupt) { io.rc = lkbde_irq_mask_set(io.dev + LKBDE_IPROC_REG, io.d0, io.d1, 0); } #ifdef NEED_CMICX_GEN2_INTERRUPT - else if (_devices[io.dev].isr == _cmicx_gen2_interrupt) + else if (_devices[io.dev].isr == (isr_f)_cmicx_gen2_interrupt) { io.rc = lkbde_irq_mask_set(io.dev | LKBDE_IPROC_REG, io.d0, io.d1, 0); } diff --git a/platform/broadcom/saibcm-modules/systems/bde/linux/user/kernel/linux-user-bde.h b/platform/broadcom/saibcm-modules-legacy-th/systems/bde/linux/user/kernel/linux-user-bde.h similarity index 98% rename from platform/broadcom/saibcm-modules/systems/bde/linux/user/kernel/linux-user-bde.h rename to platform/broadcom/saibcm-modules-legacy-th/systems/bde/linux/user/kernel/linux-user-bde.h index 7d1a04795f2..ebc2e6b5e6c 100644 --- a/platform/broadcom/saibcm-modules/systems/bde/linux/user/kernel/linux-user-bde.h +++ b/platform/broadcom/saibcm-modules-legacy-th/systems/bde/linux/user/kernel/linux-user-bde.h @@ -1,7 +1,6 @@ /* * $Id: linux-user-bde.h,v 1.23 Broadcom SDK $ - * - * $Copyright: 2017-2025 Broadcom Inc. All rights reserved. + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. diff --git a/platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde.h b/platform/broadcom/saibcm-modules-legacy-th/systems/bde/shared/include/shbde.h similarity index 97% rename from platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde.h rename to platform/broadcom/saibcm-modules-legacy-th/systems/bde/shared/include/shbde.h index 8d408915033..1e6c4c6e209 100644 --- a/platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde.h +++ b/platform/broadcom/saibcm-modules-legacy-th/systems/bde/shared/include/shbde.h @@ -1,7 +1,6 @@ /* * $Id: $ - * - * $Copyright: 2017-2025 Broadcom Inc. All rights reserved. + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. diff --git a/platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde_iproc.h b/platform/broadcom/saibcm-modules-legacy-th/systems/bde/shared/include/shbde_iproc.h similarity index 96% rename from platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde_iproc.h rename to platform/broadcom/saibcm-modules-legacy-th/systems/bde/shared/include/shbde_iproc.h index 6fff1e28a13..47520de407b 100644 --- a/platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde_iproc.h +++ b/platform/broadcom/saibcm-modules-legacy-th/systems/bde/shared/include/shbde_iproc.h @@ -1,7 +1,6 @@ /* * $Id: $ - * - * $Copyright: 2017-2025 Broadcom Inc. All rights reserved. + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. diff --git a/platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde_mdio.h b/platform/broadcom/saibcm-modules-legacy-th/systems/bde/shared/include/shbde_mdio.h similarity index 96% rename from platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde_mdio.h rename to platform/broadcom/saibcm-modules-legacy-th/systems/bde/shared/include/shbde_mdio.h index 992753f300f..170d6ef4298 100644 --- a/platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde_mdio.h +++ b/platform/broadcom/saibcm-modules-legacy-th/systems/bde/shared/include/shbde_mdio.h @@ -1,7 +1,6 @@ /* * $Id: $ - * - * $Copyright: 2017-2025 Broadcom Inc. All rights reserved. + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. diff --git a/platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde_pci.h b/platform/broadcom/saibcm-modules-legacy-th/systems/bde/shared/include/shbde_pci.h similarity index 96% rename from platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde_pci.h rename to platform/broadcom/saibcm-modules-legacy-th/systems/bde/shared/include/shbde_pci.h index adf4b487649..738de9b503f 100644 --- a/platform/broadcom/saibcm-modules/systems/bde/shared/include/shbde_pci.h +++ b/platform/broadcom/saibcm-modules-legacy-th/systems/bde/shared/include/shbde_pci.h @@ -1,7 +1,6 @@ /* * $Id: $ - * - * $Copyright: 2017-2025 Broadcom Inc. All rights reserved. + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. diff --git a/platform/broadcom/saibcm-modules/systems/bde/shared/shbde_iproc.c b/platform/broadcom/saibcm-modules-legacy-th/systems/bde/shared/shbde_iproc.c similarity index 94% rename from platform/broadcom/saibcm-modules/systems/bde/shared/shbde_iproc.c rename to platform/broadcom/saibcm-modules-legacy-th/systems/bde/shared/shbde_iproc.c index bf5afabc16d..ef7a8f98af2 100644 --- a/platform/broadcom/saibcm-modules/systems/bde/shared/shbde_iproc.c +++ b/platform/broadcom/saibcm-modules-legacy-th/systems/bde/shared/shbde_iproc.c @@ -1,7 +1,6 @@ /* * $Id: $ - * - * $Copyright: 2017-2025 Broadcom Inc. All rights reserved. + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. @@ -389,16 +388,6 @@ shbde_iproc_pci_read(shbde_hal_t *shbde, void *iproc_regs, /* Look for matching sub-window */ for (idx = 0; idx < SHBDE_NUM_IPROC_SUBWIN; idx++) { - if (idx == 7 && icfg->no_subwin_remap) { - /* - * If sub-window remapping is not permitted, issue a - * warning if none of the fixed sub-windows are - * matching. We still allow the remapping to take place in - * order to avoid breaking existing (unsafe) code. - */ - LOG_WARN(shbde, "No matching PCI sub-window for", addr); - break; - } if (icfg->subwin_base[idx] == subwin_base) { reg = ROFFS(iproc_regs, idx * 0x1000 + (addr & 0xfff)); break; @@ -407,14 +396,16 @@ shbde_iproc_pci_read(shbde_hal_t *shbde, void *iproc_regs, /* No matching sub-window, reuse the sub-window 7 */ if (reg == 0) { + if (icfg->no_subwin_remap) { + LOG_WARN(shbde, "Attempt to remap PCI sub-window for", addr); + return 0; + } /* Update base address for sub-window 7 */ subwin_base |= 1; /* Valid bit */ reg = ROFFS(iproc_regs, BAR0_PAXB_IMAP0_7); iproc32_write(shbde, reg, subwin_base); /* Read it to make sure the write actually goes through */ subwin_base = iproc32_read(shbde, reg); - /* Update cache */ - icfg->subwin_base[7] = subwin_base; /* Read register through sub-window 7 */ reg = ROFFS(iproc_regs, 0x7000 + (addr & 0xfff)); @@ -460,16 +451,6 @@ shbde_iproc_pci_write(shbde_hal_t *shbde, void *iproc_regs, /* Look for matching sub-window */ for (idx = 0; idx < SHBDE_NUM_IPROC_SUBWIN; idx++) { - if (idx == 7 && icfg->no_subwin_remap) { - /* - * If sub-window remapping is not permitted, issue a - * warning if none of the fixed sub-windows are - * matching. We still allow the remapping to take place in - * order to avoid breaking existing (unsafe) code. - */ - LOG_WARN(shbde, "No matching PCI sub-window for", addr); - break; - } if (icfg->subwin_base[idx] == subwin_base) { reg = ROFFS(iproc_regs, idx * 0x1000 + (addr & 0xfff)); break; @@ -478,14 +459,16 @@ shbde_iproc_pci_write(shbde_hal_t *shbde, void *iproc_regs, /* No matching sub-window, reuse the sub-window 7 */ if (reg == 0) { + if (icfg->no_subwin_remap) { + LOG_WARN(shbde, "Attempt to remap PCI sub-window for", addr); + return; + } /* Update base address for sub-window 7 */ subwin_base |= 1; /* Valid bit */ reg = ROFFS(iproc_regs, BAR0_PAXB_IMAP0_7); iproc32_write(shbde, reg, subwin_base); /* Read it to make sure the write actually goes through */ subwin_base = iproc32_read(shbde, reg); - /* Update cache */ - icfg->subwin_base[7] = subwin_base; /* Read register through sub-window 7 */ reg = ROFFS(iproc_regs, 0x7000 + (addr & 0xfff)); diff --git a/platform/broadcom/saibcm-modules/systems/bde/shared/shbde_mdio.c b/platform/broadcom/saibcm-modules-legacy-th/systems/bde/shared/shbde_mdio.c similarity index 98% rename from platform/broadcom/saibcm-modules/systems/bde/shared/shbde_mdio.c rename to platform/broadcom/saibcm-modules-legacy-th/systems/bde/shared/shbde_mdio.c index d8139da62f0..1684a1965b5 100644 --- a/platform/broadcom/saibcm-modules/systems/bde/shared/shbde_mdio.c +++ b/platform/broadcom/saibcm-modules-legacy-th/systems/bde/shared/shbde_mdio.c @@ -1,7 +1,6 @@ /* * $Id: $ - * - * $Copyright: 2017-2025 Broadcom Inc. All rights reserved. + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. diff --git a/platform/broadcom/saibcm-modules/systems/bde/shared/shbde_pci.c b/platform/broadcom/saibcm-modules-legacy-th/systems/bde/shared/shbde_pci.c similarity index 99% rename from platform/broadcom/saibcm-modules/systems/bde/shared/shbde_pci.c rename to platform/broadcom/saibcm-modules-legacy-th/systems/bde/shared/shbde_pci.c index 7c68c6b8adf..6fa9f43bfee 100644 --- a/platform/broadcom/saibcm-modules/systems/bde/shared/shbde_pci.c +++ b/platform/broadcom/saibcm-modules-legacy-th/systems/bde/shared/shbde_pci.c @@ -1,7 +1,6 @@ /* * $Id: $ - * - * $Copyright: 2017-2025 Broadcom Inc. All rights reserved. + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. diff --git a/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/Makefile b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/Makefile new file mode 100644 index 00000000000..769935066a8 --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/Makefile @@ -0,0 +1,40 @@ +# -*- Makefile -*- +# $Id: Makefile,v 1.10 Broadcom SDK $ +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# +# +# +# Makefile for SOC SAL support +# +LOCALDIR = systems/linux/kernel/modules + +include ${SDK}/make/Make.config + +subdirs= + +include ${SDK}/make/Make.subdirs + +include ${SDK}/make/Make.depend diff --git a/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/bcm-genl/Makefile b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/bcm-genl/Makefile new file mode 100644 index 00000000000..b491fd1db5d --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/bcm-genl/Makefile @@ -0,0 +1,93 @@ +# -*- Makefile -*- +# $Id: Makefile,v 1.3 Broadcom SDK $ +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# +# +# +LOCALDIR = systems/linux/kernel/modules/bcm-genl + +include ${SDK}/make/Make.config + +LIBS = $(LIBDIR)/libkern.a + +ifndef DCBDIR +DCBDIR = $(SDK)/systems/linux/kernel/modules/dcb +# $(error 'The $$DCBDIR variable is not set') +endif +ifeq (1,$(NO_PRECOMPILED_MODULE)) +$(error 'DCB_LIB build is not supported if NO_PRECOMPILED_MODULE=1') +endif +LIBS += $(LIBDIR)/libdcb.a +CFLAGS += -DDCBLIB_SUPPORT -I$(DCBDIR)/include +ifeq (1,$(BUILD_GENL_PACKET)) +CFLAGS += -I${SDK}/systems/linux/kernel/modules/include/kernel +endif + +KERNEL_MODULE_DIR = kernel_module + +THIS_MOD_NAME := linux-bcm-genl +MODULE = $(LIBDIR)/$(THIS_MOD_NAME).o +KMODULE = $(LIBDIR)/$(THIS_MOD_NAME).ko + +# BCM Network Device +# { +KBUILD_EXTRA_SYMBOLS := ${BLDDIR}/../bcm-knet/kernel_module/Module.symvers +ifeq (1,$(BUILD_GENL_PACKET)) +KBUILD_EXTRA_SYMBOLS += ${BLDDIR}/../genl-packet/kernel_module/Module.symvers +endif +export KBUILD_EXTRA_SYMBOLS + +build: $(MODULE) $(KMODULE) +# +# This is for the compilation of the 'precompiled' object. We keep it +# here for compatibility. +# +$(LIBDIR)/libdcb.a: + $(MAKE) -C $(DCBDIR)/make BLDDIR=$(LIBDIR) \ + KADD_CFLAGS="-I${SDK}/systems/linux/kernel/modules/include $(KFLAGS) -D$(ENDIAN)" \ + CROSS_COMPILE=$(CROSS_COMPILE) + +$(MODULE): $(BLDDIR)/.tree $(BOBJS) $(LIBS) + $(LD) $(MODULE_LDFLAGS) -r -d $(BOBJS) $(LIBS) -o $@ + +$(KMODULE): $(MODULE) + rm -fr $(BLDDIR)/$(KERNEL_MODULE_DIR) + mkdir $(BLDDIR)/$(KERNEL_MODULE_DIR) + cp ${SDK}/make/Makefile.linux-kmodule $(BLDDIR)/$(KERNEL_MODULE_DIR)/Makefile + cat ${KBUILD_EXTRA_SYMBOLS} > $(BLDDIR)/$(KERNEL_MODULE_DIR)/Module.symvers + MOD_NAME=$(THIS_MOD_NAME) $(MAKE) -C $(BLDDIR)/$(KERNEL_MODULE_DIR) $(THIS_MOD_NAME).ko +# } + +# Make.depend is before clean:: so that Make.depend's clean:: runs first. + +include ${SDK}/make/Make.depend + +clean:: + $(RM) $(BLDDIR)/version.c $(BLDDIR)/version.o + $(RM) $(BOBJS) $(MODULE) + $(MAKE) -C $(DCBDIR)/make BLDDIR=$(LIBDIR) clean + +.PHONY: build diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-dev.c b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/bcm-genl/bcm-genl-dev.c similarity index 99% rename from platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-dev.c rename to platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/bcm-genl/bcm-genl-dev.c index d4923088854..3e8c61cc590 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-dev.c +++ b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/bcm-genl/bcm-genl-dev.c @@ -1,6 +1,5 @@ /* - * - * $Copyright: 2017-2025 Broadcom Inc. All rights reserved. + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-dev.h b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/bcm-genl/bcm-genl-dev.h similarity index 96% rename from platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-dev.h rename to platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/bcm-genl/bcm-genl-dev.h index 5f656a323dd..bc82d9a9af7 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-dev.h +++ b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/bcm-genl/bcm-genl-dev.h @@ -1,6 +1,5 @@ /* - * - * $Copyright: 2017-2025 Broadcom Inc. All rights reserved. + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-netif.c b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/bcm-genl/bcm-genl-netif.c similarity index 99% rename from platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-netif.c rename to platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/bcm-genl/bcm-genl-netif.c index 2fb9e86fe6c..18a967ee148 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-netif.c +++ b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/bcm-genl/bcm-genl-netif.c @@ -1,6 +1,5 @@ /* - * - * $Copyright: 2017-2025 Broadcom Inc. All rights reserved. + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-netif.h b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/bcm-genl/bcm-genl-netif.h similarity index 96% rename from platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-netif.h rename to platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/bcm-genl/bcm-genl-netif.h index 84b93d93c07..75bdeada637 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-netif.h +++ b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/bcm-genl/bcm-genl-netif.h @@ -1,6 +1,5 @@ /* - * - * $Copyright: 2017-2025 Broadcom Inc. All rights reserved. + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-packet.c b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/bcm-genl/bcm-genl-packet.c similarity index 98% rename from platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-packet.c rename to platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/bcm-genl/bcm-genl-packet.c index 1a755f1dba5..92554d6399b 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-packet.c +++ b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/bcm-genl/bcm-genl-packet.c @@ -1,6 +1,5 @@ /* - * - * $Copyright: 2017-2025 Broadcom Inc. All rights reserved. + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. @@ -657,12 +656,7 @@ int bcmgenl_packet_cleanup(void) int bcmgenl_packet_init(char *procfs_path) { - bkn_filter_cb_attr_t fcb_attr; - - memset(&fcb_attr, 0, sizeof(fcb_attr)); - fcb_attr.name = GENL_PACKET_NAME; - - bkn_filter_cb_attr_register(genl_filter_cb, &fcb_attr); + bkn_filter_cb_register_by_name(genl_filter_cb, GENL_PACKET_NAME); genl_cb_proc_init(procfs_path); return genl_cb_init(); } diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-packet.h b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/bcm-genl/bcm-genl-packet.h similarity index 95% rename from platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-packet.h rename to platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/bcm-genl/bcm-genl-packet.h index d4298e2eb16..62478284508 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-packet.h +++ b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/bcm-genl/bcm-genl-packet.h @@ -1,6 +1,5 @@ /* - * - * $Copyright: 2017-2025 Broadcom Inc. All rights reserved. + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-psample.c b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/bcm-genl/bcm-genl-psample.c similarity index 87% rename from platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-psample.c rename to platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/bcm-genl/bcm-genl-psample.c index c34d0b3871d..07fda66ffaf 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-psample.c +++ b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/bcm-genl/bcm-genl-psample.c @@ -1,6 +1,5 @@ /* - * - * $Copyright: 2017-2025 Broadcom Inc. All rights reserved. + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. @@ -87,15 +86,7 @@ LKM_MOD_PARAM(psample_qlen, "i", int, 0); MODULE_PARM_DESC(psample_qlen, "psample queue length (default 1024 buffers)"); -#ifndef BCMGENL_PSAMPLE_METADATA #if (LINUX_VERSION_CODE >= KERNEL_VERSION(5,13,0)) -#define BCMGENL_PSAMPLE_METADATA 1 -#else -#define BCMGENL_PSAMPLE_METADATA 0 -#endif -#endif - -#if BCMGENL_PSAMPLE_METADATA static inline void bcmgenl_sample_packet(struct psample_group *group, struct sk_buff *skb, u32 trunc_size, int in_ifindex, int out_ifindex, @@ -110,7 +101,7 @@ bcmgenl_sample_packet(struct psample_group *group, struct sk_buff *skb, } #else #define bcmgenl_sample_packet psample_sample_packet -#endif /* BCMGENL_PSAMPLE_METADATA */ +#endif /* (LINUX_VERSION_CODE >= KERNEL_VERSION(5,13,0)) */ /* driver proc entry root */ static struct proc_dir_entry *psample_proc_root = NULL; @@ -119,8 +110,7 @@ static char psample_procfs_path[80]; /* psample general info */ typedef struct psample_info_s { struct net *netns; - struct list_head filter_group_list; - spinlock_t fltgrp_lock; + struct list_head group_list; uint64_t rx_reason_sample_source[LINUX_BDE_MAX_DEVICES]; uint64_t rx_reason_sample_source_mask[LINUX_BDE_MAX_DEVICES]; uint64_t rx_reason_sample_dest[LINUX_BDE_MAX_DEVICES]; @@ -128,11 +118,11 @@ typedef struct psample_info_s { } psample_info_t; static psample_info_t g_psample_info; -typedef struct psample_filter_group_s { +typedef struct psample_group_data_s { struct list_head list; - int filter_id; struct psample_group *group; -} psample_filter_group_t; + uint32_t group_num; +} psample_group_data_t; /* Maintain sampled pkt statistics */ typedef struct psample_stats_s { @@ -186,76 +176,31 @@ typedef struct psample_work_s { } psample_work_t; static psample_work_t g_psample_work; -static int -psample_add_filter_group_to_list(int filter_id, struct psample_group *group) +static struct psample_group * +psample_group_get_from_list(uint32_t grp_num) { struct list_head *list_ptr; - psample_filter_group_t *fltgrp; - unsigned long flags; + psample_group_data_t *grp; - /* Sanity check */ - spin_lock_irqsave(&g_psample_info.fltgrp_lock, flags); - list_for_each(list_ptr, &g_psample_info.filter_group_list) { - fltgrp = list_entry(list_ptr, psample_filter_group_t, list); - if (fltgrp->filter_id == filter_id) { - spin_unlock_irqrestore(&g_psample_info.fltgrp_lock, flags); - return -1; + list_for_each(list_ptr, &g_psample_info.group_list) { + grp = list_entry(list_ptr, psample_group_data_t, list); + if (grp->group_num == grp_num) { + return grp->group; } } - spin_unlock_irqrestore(&g_psample_info.fltgrp_lock, flags); - if ((fltgrp = kmalloc(sizeof(*fltgrp), GFP_ATOMIC)) == NULL) { - return -1; + if ((grp = kmalloc(sizeof(psample_group_data_t), GFP_ATOMIC)) == NULL) { + return NULL; } - memset(fltgrp, 0, sizeof(*fltgrp)); - fltgrp->filter_id = filter_id; - fltgrp->group = group; - spin_lock_irqsave(&g_psample_info.fltgrp_lock, flags); - list_add_tail(&fltgrp->list, &g_psample_info.filter_group_list); - spin_unlock_irqrestore(&g_psample_info.fltgrp_lock, flags); - - return 0; -} - -static struct psample_group * -psample_del_filter_group_from_list(int filter_id) -{ - struct list_head *list_ptr, *list_ptr2; - psample_filter_group_t *fltgrp; - struct psample_group *group = NULL; - unsigned long flags; - - spin_lock_irqsave(&g_psample_info.fltgrp_lock, flags); - list_for_each_safe(list_ptr, list_ptr2, &g_psample_info.filter_group_list) { - fltgrp = list_entry(list_ptr, psample_filter_group_t, list); - if (fltgrp->filter_id == filter_id) { - list_del(&fltgrp->list); - group = fltgrp->group; - kfree(fltgrp); - break; - } + grp->group = psample_group_get(g_psample_info.netns, grp_num); + if (grp->group == NULL) { + kfree(grp); + return NULL; } - spin_unlock_irqrestore(&g_psample_info.fltgrp_lock, flags); - return group; -} + grp->group_num = grp_num; + list_add_tail(&grp->list, &g_psample_info.group_list); -static struct psample_group * -psample_get_filter_group_from_list(int filter_id) -{ - struct list_head *list_ptr; - psample_filter_group_t *fltgrp; - unsigned long flags; - - spin_lock_irqsave(&g_psample_info.fltgrp_lock, flags); - list_for_each(list_ptr, &g_psample_info.filter_group_list) { - fltgrp = list_entry(list_ptr, psample_filter_group_t, list); - if (fltgrp->filter_id == filter_id) { - spin_unlock_irqrestore(&g_psample_info.fltgrp_lock, flags); - return fltgrp->group; - } - } - spin_unlock_irqrestore(&g_psample_info.fltgrp_lock, flags); - return NULL; + return grp->group; } static int @@ -437,35 +382,6 @@ psample_task(struct work_struct *work) spin_unlock_irqrestore(&psample_work->lock, flags); } -static int -psample_filter_create_cb(kcom_filter_t *kf) -{ - struct psample_group *group; - - /* get psample group info. psample genetlink group ID passed in kf->dest_id */ - group = psample_group_get(g_psample_info.netns, kf->dest_id); - if (group == NULL) { - return -1; - } - return psample_add_filter_group_to_list(kf->id, group); -} - -static int -psample_filter_destroy_cb(kcom_filter_t *kf) -{ - struct psample_group *group; - - /* Ensure all packets in queue are sent. */ - flush_work(&g_psample_work.wq); - - group = psample_del_filter_group_from_list(kf->id); - if (group == NULL) { - return -1; - } - psample_group_put(group); - return 0; -} - static int psample_filter_cb(uint8_t *pkt, int size, int dev_no, void *pkt_meta, int chan, kcom_filter_t *kf) @@ -481,8 +397,8 @@ psample_filter_cb(uint8_t *pkt, int size, int dev_no, void *pkt_meta, __func__, size, kf->dest_id, kf->cb_user_data); g_psample_stats.pkts_f_psample_cb++; - /* get psample group info. */ - group = psample_get_filter_group_from_list(kf->id); + /* get psample group info. psample genetlink group ID passed in kf->dest_id */ + group = psample_group_get_from_list(kf->dest_id); if (!group) { gprintk("%s: Could not find psample genetlink group %d\n", __func__, kf->cb_user_data); g_psample_stats.pkts_d_no_group++; @@ -960,7 +876,7 @@ static int psample_cleanup(void) { psample_pkt_t *pkt; - psample_filter_group_t *fltgrp; + psample_group_data_t *grp; cancel_work_sync(&g_psample_work.wq); @@ -971,12 +887,12 @@ psample_cleanup(void) kfree(pkt); } - while (!list_empty(&g_psample_info.filter_group_list)) { - fltgrp = list_entry(g_psample_info.filter_group_list.next, - psample_filter_group_t, list); - list_del(&fltgrp->list); - psample_group_put(fltgrp->group); - kfree(fltgrp); + while (!list_empty(&g_psample_info.group_list)) { + grp = list_entry(g_psample_info.group_list.next, + psample_group_data_t, list); + list_del(&grp->list); + psample_group_put(grp->group); + kfree(grp); } return 0; @@ -991,8 +907,7 @@ psample_init(void) memset(&g_psample_work, 0, sizeof(psample_work_t)); /* setup psample_info struct */ - INIT_LIST_HEAD(&g_psample_info.filter_group_list); - spin_lock_init(&g_psample_info.fltgrp_lock); + INIT_LIST_HEAD(&g_psample_info.group_list); /* setup psample work queue */ spin_lock_init(&g_psample_work.lock); @@ -1015,23 +930,16 @@ psample_init(void) int bcmgenl_psample_cleanup(void) { - bkn_filter_cb_unregister(psample_filter_cb); psample_cleanup(); psample_proc_cleanup(); + bkn_filter_cb_unregister(psample_filter_cb); return 0; } int bcmgenl_psample_init(char *procfs_path) { - bkn_filter_cb_attr_t fcb_attr; - - memset(&fcb_attr, 0, sizeof(fcb_attr)); - fcb_attr.name = PSAMPLE_GENL_NAME; - fcb_attr.create_cb = psample_filter_create_cb; - fcb_attr.destroy_cb = psample_filter_destroy_cb; - - bkn_filter_cb_attr_register(psample_filter_cb, &fcb_attr); + bkn_filter_cb_register_by_name(psample_filter_cb, PSAMPLE_GENL_NAME); bcmgenl_netif_default_sample_set(PSAMPLE_RATE_DFLT, PSAMPLE_SIZE_DFLT); psample_proc_init(procfs_path); return psample_init(); diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-psample.h b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/bcm-genl/bcm-genl-psample.h similarity index 95% rename from platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-psample.h rename to platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/bcm-genl/bcm-genl-psample.h index b2b39432fec..93fae98c479 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl-psample.h +++ b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/bcm-genl/bcm-genl-psample.h @@ -1,6 +1,5 @@ /* - * - * $Copyright: 2017-2025 Broadcom Inc. All rights reserved. + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl.c b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/bcm-genl/bcm-genl.c similarity index 99% rename from platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl.c rename to platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/bcm-genl/bcm-genl.c index 160603f04fb..e5e9b324de4 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/bcm-genl.c +++ b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/bcm-genl/bcm-genl.c @@ -1,6 +1,5 @@ /* - * - * $Copyright: 2017-2025 Broadcom Inc. All rights reserved. + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. diff --git a/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/bcm-knet/Makefile b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/bcm-knet/Makefile new file mode 100644 index 00000000000..95abb3e994b --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/bcm-knet/Makefile @@ -0,0 +1,110 @@ +# -*- Makefile -*- +# $Id: Makefile,v 1.3 Broadcom SDK $ +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# +# +# +LOCALDIR = systems/linux/kernel/modules/bcm-knet + +include ${SDK}/make/Make.config + +LIBS = $(LIBDIR)/libkern.a + +KERNEL_MODULE_DIR = kernel_module + +THIS_MOD_NAME := linux-bcm-knet +MODULE = $(LIBDIR)/$(THIS_MOD_NAME).o +KMODULE = $(LIBDIR)/$(THIS_MOD_NAME).ko + +# BCM Network Device + +ifeq (1,$(NO_PRECOMPILED_MODULE)) +# { +# +# For 'NO_PRECOMPILED_MODULE', the first kernel compilation is done +# in systems/linux/kernel/modules/bcm-knet (and not in systems/linux/kernel/modules/bcm-knet/kernel_module, +# which is not even created). +# KBUILD_EXTRA_SYMBOLS exports the symbols created on the first module compilation to +# all other module compilations. +# +KBUILD_EXTRA_SYMBOLS := ${BLDDIR}/../../../../bde/linux/kernel/Module.symvers +export KBUILD_EXTRA_SYMBOLS +# +# These are the objects which need to be compiled, in the kernel, to +# created the module object file. +# +SRCS_COMPOSING = bcm-knet.c ../shared/gmodule.c +OBJECTS_COMPOSING = "bcm-knet.o gmodule.o" +# +# Note that for NO_PRECOMPILED_MODULE, the subdirectory 'systems/linux/kernel/modules/bcm-knet/kernel_module' +# is not created and all action is done in systems/linux/kernel/modules/bcm-knet +# + +build: $(KMODULE) + +$(KMODULE): $(SRCS_COMPOSING) + mkdir -p $(BLDDIR) + rm -fr $(BLDDIR)/$(KERNEL_MODULE_DIR) + rm -f $(BLDDIR)/*.c + rm -f $(BLDDIR)/*.o + rm -f $(BLDDIR)/*.ko + cp ${SDK}/make/Makefile.linux-kmodule $(BLDDIR)/Makefile + cp ./*.c $(BLDDIR)/ + cp ../shared/*.c $(BLDDIR)/ + cat ${KBUILD_EXTRA_SYMBOLS} > $(BLDDIR)/Module.symvers + MOD_OBJS=$(OBJECTS_COMPOSING) MOD_NAME=$(THIS_MOD_NAME) $(MAKE) -C $(BLDDIR) $(THIS_MOD_NAME).ko LOC_BLDDIR=$(BLDDIR) LOC_SRCDIR=$(PWD) +# } +else +# { +KBUILD_EXTRA_SYMBOLS := ${BLDDIR}/../../../../bde/linux/kernel/kernel_module/Module.symvers +export KBUILD_EXTRA_SYMBOLS + +build: $(MODULE) $(KMODULE) +# +# This is for the compilation of the 'precompiled' object. We keep it +# here for compatibility. +# +$(MODULE): $(BLDDIR)/.tree $(BOBJS) $(LIBS) + $(LD) $(MODULE_LDFLAGS) -r -d $(BOBJS) $(LIBS) -o $@ + +$(KMODULE): $(MODULE) + rm -fr $(BLDDIR)/$(KERNEL_MODULE_DIR) + mkdir $(BLDDIR)/$(KERNEL_MODULE_DIR) + cp ${SDK}/make/Makefile.linux-kmodule $(BLDDIR)/$(KERNEL_MODULE_DIR)/Makefile + cat ${KBUILD_EXTRA_SYMBOLS} > $(BLDDIR)/$(KERNEL_MODULE_DIR)/Module.symvers + MOD_NAME=$(THIS_MOD_NAME) KBUILD_EXTRA_SYMBOLS="${KBUILD_EXTRA_SYMBOLS}" $(MAKE) -C $(BLDDIR)/$(KERNEL_MODULE_DIR) $(THIS_MOD_NAME).ko + +# Make.depend is before clean:: so that Make.depend's clean:: runs first. +include ${SDK}/make/Make.depend +# } +endif + +clean:: + $(RM) $(BLDDIR)/version.c $(BLDDIR)/version.o + $(RM) $(BOBJS) $(MODULE) + +.PHONY: build + diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-knet/bcm-knet.c b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/bcm-knet/bcm-knet.c similarity index 87% rename from platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-knet/bcm-knet.c rename to platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/bcm-knet/bcm-knet.c index 1cf0b52dc29..b28a75fb3dc 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-knet/bcm-knet.c +++ b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/bcm-knet/bcm-knet.c @@ -1,6 +1,5 @@ /* - * - * $Copyright: 2017-2025 Broadcom Inc. All rights reserved. + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. @@ -450,18 +449,6 @@ static inline struct sk_buff *skb_padto(struct sk_buff *skb, unsigned int len) } #endif /* KERNEL_VERSION(2,4,21) */ -#if LINUX_VERSION_CODE < KERNEL_VERSION(3,9,0) -static inline int skb_unclone(struct sk_buff *skb, gfp_t pri) -{ - might_sleep_if(pri & __GFP_WAIT); - - if (skb_cloned(skb)) - return pskb_expand_head(skb, 0, 0, pri); - - return 0; -} -#endif /* KERNEL_VERSION(3,9,0) */ - #if LINUX_VERSION_CODE < KERNEL_VERSION(3,10,0) #define bkn_vlan_hwaccel_put_tag(_skb, _proto, _tci) \ __vlan_hwaccel_put_tag(_skb, _tci) @@ -689,8 +676,6 @@ typedef struct bkn_switch_info_s { uint32_t udh_length_type[4]; /* Size of UDH header per type */ uint32_t udh_size; /* Size of UDH header on legacy devices */ uint32_t oamp_punt; /* OAMP port if nonzero */ - uint32_t jr_mode_udh_size_compensation; /* UDH size compnesation mode in JR mode */ - uint32_t jr_mode_add_udh_base; /* Indicates presence of UDH base in JR mode */ uint32_t enet_channels; /* Ethernet channels, No header observed.*/ uint8_t no_skip_udh_check; /* Indicates UDH won't be skipped */ uint8_t oam_dm_tod_exist; /* Indicates presence of OAM TOD MSB */ @@ -698,9 +683,6 @@ typedef struct bkn_switch_info_s { uint8_t udh_enable; /* Indicates UDH existence */ uint8_t oamp_port_number; /* Indicates number of OAMP system port number */ uint32_t oamp_ports[KCOM_HW_INFO_OAMP_PORT_MAX]; /* OAMP system port array */ - uint16_t up_mep_ingress_cpu_trap_id1; /* UPMEP ingress cpu trap id 1 */ - uint16_t up_mep_ingress_cpu_trap_id2; /* UPMEP ingress cpu trap id 2 */ - uint8_t spa_mode; /* System Port Aggregate mode: 0-16bits, 1-17bits, 2-18bits. */ int rx_chans; /* Number of Rx channels */ uint32_t dma_hi; /* DMA higher address */ uint32_t cmic_type; /* CMIC type (CMICe or CMICm) */ @@ -727,7 +709,6 @@ typedef struct bkn_switch_info_s { int evt_idx; /* Event queue index for this device*/ int basedev_suspended; /* Base device suspended */ int pcie_link_status; /* This flag is used to indicate PCIE Link status, 0 for up and 1 for down */ - int inband_meta; /* This flag is used to indicate that meta data is in-band */ struct sk_buff_head tx_ptp_queue; /* Tx PTP skb queue */ struct work_struct tx_ptp_work; /* Tx PTP work */ struct { @@ -909,13 +890,6 @@ typedef struct bkn_switch_info_s { #define BKN_DNX_PPH_FWD_DOMAIN_IS_VSI(_fwd_domain) (BKN_DNX_PPH_FWD_DOMAIN_TYPE_GET(_fwd_domain) == BKN_DNX_PPH_FWD_DOMAIN_TYPE_VSI) #define BKN_DNX_PPH_FWD_DOMAIN_IS_VRF(_fwd_domain) (BKN_DNX_PPH_FWD_DOMAIN_TYPE_GET(_fwd_domain) == BKN_DNX_PPH_FWD_DOMAIN_TYPE_VRF) -#define BKN_DNX_INGRESS_TRAP_ID_TRAP_OAM_LEVEL (162) -#define BKN_DNX_INGRESS_TRAP_ID_TRAP_OAM_PASSIVE (172) - -#define BKN_DNX_SPA_MODE_16_BITS (0) -#define BKN_DNX_SPA_MODE_17_BITS (1) -#define BKN_DNX_SPA_MODE_18_BITS (2) - #define BKN_DPP_HDR_MAX_SIZE 40 /* PTCH_2 */ #define BKN_DPP_PTCH_2_SIZE 2 @@ -1111,8 +1085,6 @@ typedef struct bkn_filter_s { unsigned long hits; kcom_filter_t kf; knet_filter_cb_f cb; - knet_filter_create_cb_f create_cb; - knet_filter_destroy_cb_f destroy_cb; } bkn_filter_t; @@ -1167,8 +1139,6 @@ typedef struct bkn_filter_cb_s { struct list_head list; char desc[KCOM_FILTER_DESC_MAX]; knet_filter_cb_f cb; - knet_filter_create_cb_f create_cb; - knet_filter_destroy_cb_f destroy_cb; } bkn_filter_cb_t; LIST_HEAD(filter_cb_list); @@ -2385,12 +2355,6 @@ dev_irq_mask_disable(bkn_switch_info_t *sinfo, int chan, int update_hw) } } -static inline int -inband_meta(bkn_switch_info_t *sinfo) -{ - return sinfo->inband_meta; -} - static int bkn_alloc_dcbs(bkn_switch_info_t *sinfo) { @@ -2515,13 +2479,13 @@ bkn_init_dcbs(bkn_switch_info_t *sinfo) for (idx = 0; idx < (MAX_TX_DCBS + 1); idx++) { if (CDMA_CH(sinfo, XGS_DMA_TX_CHAN)) { - if (inband_meta(sinfo)) { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { dcb_mem[2] |= 1 << 24 | 1 << 16; } else { dcb_mem[1] |= 1 << 24 | 1 << 16; } if (idx == MAX_TX_DCBS) { - if (inband_meta(sinfo)) { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { dcb_mem[0] = sinfo->tx.desc[0].dcb_dma; dcb_mem[1] = DMA_TO_BUS_HI(sinfo->tx.desc[0].dcb_dma >> 32); dcb_mem[2] |= 1 << 18; @@ -2548,13 +2512,13 @@ bkn_init_dcbs(bkn_switch_info_t *sinfo) for (chan = 0; chan < sinfo->rx_chans; chan++) { for (idx = 0; idx < (MAX_RX_DCBS + 1); idx++) { if (CDMA_CH(sinfo, XGS_DMA_RX_CHAN + chan)) { - if (inband_meta(sinfo)) { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { dcb_mem[2] |= 1 << 24 | 1 << 16; } else { dcb_mem[1] |= 1 << 24 | 1 << 16; } if (idx == MAX_RX_DCBS) { - if (inband_meta(sinfo)) { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { dcb_mem[0] = sinfo->rx[chan].desc[0].dcb_dma; dcb_mem[1] = DMA_TO_BUS_HI(sinfo->rx[chan].desc[0].dcb_dma >> 32); dcb_mem[2] |= 1 << 18; @@ -2749,12 +2713,12 @@ bkn_api_rx_copy_from_skb(bkn_switch_info_t *sinfo, return -1; } dcb = &dcb_chain->dcb_mem[dcb_chain->dcb_cur * sinfo->dcb_wsize]; - if ((inband_meta(sinfo) && (dcb[2] & 0xffff) < pktlen) || - (!inband_meta(sinfo) && (dcb[1] & 0xffff) < pktlen)) { + if ((((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) && (dcb[2] & 0xffff) < pktlen) || + (((sinfo->cmic_type != 'x') && (sinfo->cmic_type != 'r')) && (dcb[1] & 0xffff) < pktlen)) { DBG_WARN(("Rx API buffer too small\n")); return -1; } - if (inband_meta(sinfo)) { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { pkt_dma = BUS_TO_DMA_HI(dcb[1]); pkt_dma = pkt_dma << 32 | dcb[0]; } else { @@ -2780,7 +2744,7 @@ bkn_api_rx_copy_from_skb(bkn_switch_info_t *sinfo, memcpy(pkt, skb_pkt, pktlen); /* Copy packet metadata and mark as done */ - if (!inband_meta(sinfo)) { + if ((sinfo->cmic_type != 'x') && (sinfo->cmic_type != 'r')) { for (i = SOC_DCB_META_OFFSET; i < sinfo->dcb_wsize; i++) { dcb[i] = desc->dcb_mem[i]; } @@ -2792,8 +2756,8 @@ bkn_api_rx_copy_from_skb(bkn_switch_info_t *sinfo, if (CDMA_CH(sinfo, XGS_DMA_RX_CHAN + chan)) { dcb = &dcb_chain->dcb_mem[dcb_chain->dcb_cur * sinfo->dcb_wsize]; - if ((inband_meta(sinfo) && (dcb[2] & (1 << 18))) || - (!inband_meta(sinfo) && (dcb[1] & (1 << 18)))) { + if ((((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) && dcb[2] & (1 << 18)) || + (((sinfo->cmic_type != 'x') && (sinfo->cmic_type != 'r')) && dcb[1] & (1 << 18))) { /* Get the next chain if reload done */ dcb[sinfo->dcb_wsize-1] |= 1 << 31 | SOC_DCB_KNET_DONE; MEMORY_BARRIER; @@ -2804,8 +2768,8 @@ bkn_api_rx_copy_from_skb(bkn_switch_info_t *sinfo, } } } else { - if ((inband_meta(sinfo) && (dcb[2] & (1 << 16)) == 0) || - (!inband_meta(sinfo) && (dcb[1] & (1 << 16)) == 0)) { + if ((((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) && (dcb[2] & (1 << 16)) == 0) || + (((sinfo->cmic_type != 'x') && (sinfo->cmic_type != 'r')) && (dcb[1] & (1 << 16)) == 0)) { bkn_api_rx_chain_done(sinfo, chan); } } @@ -2825,9 +2789,8 @@ bkn_rx_refill(bkn_switch_info_t *sinfo, int chan) struct sk_buff *skb; bkn_desc_info_t *desc; uint32_t *dcb; - uint32_t resv_size = inband_meta(sinfo) ? RCPU_HDR_SIZE : RCPU_RX_ENCAP_SIZE; - uint32_t meta_size = inband_meta(sinfo) ? RCPU_RX_META_SIZE : 0; - uint32_t dma_size = rx_buffer_size + meta_size; + uint32_t resv_size = ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) ? RCPU_HDR_SIZE : RCPU_RX_ENCAP_SIZE; + uint32_t meta_size = ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) ? RCPU_RX_META_SIZE : 0; int prev; if (sinfo->rx[chan].use_rx_skb == 0) { @@ -2847,7 +2810,7 @@ bkn_rx_refill(bkn_switch_info_t *sinfo, int chan) while (sinfo->rx[chan].free < MAX_RX_DCBS) { desc = &sinfo->rx[chan].desc[sinfo->rx[chan].cur]; if (desc->skb == NULL) { - skb = dev_alloc_skb(dma_size + SKB_DATA_ALIGN(resv_size)); + skb = dev_alloc_skb(rx_buffer_size + SKB_DATA_ALIGN(resv_size)); if (skb == NULL) { break; } @@ -2859,7 +2822,7 @@ bkn_rx_refill(bkn_switch_info_t *sinfo, int chan) chan, sinfo->rx[chan].cur)); } skb = desc->skb; - desc->dma_size = dma_size; + desc->dma_size = rx_buffer_size + meta_size; #ifdef KNET_NO_AXI_DMA_INVAL @@ -2887,7 +2850,7 @@ bkn_rx_refill(bkn_switch_info_t *sinfo, int chan) dcb = desc->dcb_mem; dcb[0] = desc->skb_dma; if (CDMA_CH(sinfo, XGS_DMA_RX_CHAN + chan)) { - if (inband_meta(sinfo)) { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { dcb[2] |= 1 << 24 | 1 << 16; } else { dcb[1] |= 1 << 24 | 1 << 16; @@ -2895,18 +2858,18 @@ bkn_rx_refill(bkn_switch_info_t *sinfo, int chan) } else { prev = PREV_IDX(sinfo->rx[chan].cur, MAX_RX_DCBS); if (prev < (MAX_RX_DCBS - 1)) { - if (inband_meta(sinfo)) { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { sinfo->rx[chan].desc[prev].dcb_mem[2] |= 1 << 16; } else { sinfo->rx[chan].desc[prev].dcb_mem[1] |= 1 << 16; } } } - if (inband_meta(sinfo)) { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { dcb[1] = DMA_TO_BUS_HI(desc->skb_dma >> 32); - dcb[2] |= dma_size; + dcb[2] |= rx_buffer_size + meta_size; } else { - dcb[1] |= dma_size; + dcb[1] |= rx_buffer_size; } if (CDMA_CH(sinfo, XGS_DMA_RX_CHAN + chan) && @@ -3090,120 +3053,122 @@ device_is_dnx(bkn_switch_info_t *sinfo) if (sinfo) { - if (sinfo->dcb_type == 39) - { - if ((sinfo->dev_id & 0xffff) != 0x8920) - { - is_dnx = 1; - } - } + is_dnx = (sinfo->dcb_type == 39) ? 1 : 0; } return is_dnx; } -static inline int -device_is_dnxf(bkn_switch_info_t *sinfo) -{ - int is_dnxf = 0; - - if (sinfo) - { - if (sinfo->dcb_type == 39) - { - if ((sinfo->dev_id & 0xffff) == 0x8920) - { - is_dnxf = 1; - } - } - } - return is_dnxf; -} - /* is DPP or is DNX*/ static inline int device_is_sand(bkn_switch_info_t *sinfo) { - int is_dcb28 = 0; - int is_dcb39 = 0; + int is_dpp = 0; + int is_dnx = 0; if (sinfo) { - is_dcb28 = (sinfo->dcb_type == 28) ? 1 : 0; - is_dcb39 = (sinfo->dcb_type == 39) ? 1 : 0; + is_dpp = (sinfo->dcb_type == 28) ? 1 : 0; + is_dnx = (sinfo->dcb_type == 39) ? 1 : 0; } - return (is_dcb28 | is_dcb39); + return (is_dpp | is_dnx); } -static int +static bkn_filter_t * bkn_match_rx_pkt(bkn_switch_info_t *sinfo, uint8_t *pkt, int pktlen, - void *meta, int chan, int is_err, uint32_t err_woff, - bkn_filter_t *filter) + void *meta, int chan, bkn_filter_t *cbf) { + struct list_head *list; + bkn_filter_t *filter; kcom_filter_t scratch, *kf; uint8_t *oob = (uint8_t *)meta; int size, wsize; - int idx; - - kf = &filter->kf; - if (kf->pkt_data_offset + kf->pkt_data_size > pktlen) { - return 0; - } - memcpy(&scratch.data.b[0], - &oob[kf->oob_data_offset], kf->oob_data_size); - memcpy(&scratch.data.b[kf->oob_data_size], - &pkt[kf->pkt_data_offset], kf->pkt_data_size); - size = kf->oob_data_size + kf->pkt_data_size; - wsize = BYTES2WORDS(size); - DBG_VERB(("Filter: size = %d (%d), data = 0x%08x, mask = 0x%08x\n", - size, wsize, kf->data.w[0], kf->mask.w[0])); + int idx, match; + knet_filter_cb_f filter_cb; - if (device_is_sand(sinfo)) { - DBG_DUNE(("Filter: size = %d (wsize %d)\n", size, wsize)); - for (idx = 0; idx < wsize; idx++) { - DBG_DUNE(("OOB[%d]: 0x%08x [0x%08x]\n", idx, kf->data.w[idx], kf->mask.w[idx])); - } - DBG_DUNE(("Meta Data [+ Selected Raw packet data]\n")); - for (idx = 0; idx < wsize; idx++) { - DBG_DUNE(("Scratch[%d]: 0x%08x\n", idx, scratch.data.w[idx])); + list_for_each(list, &sinfo->rxpf_list) { + filter = (bkn_filter_t *)list; + kf = &filter->kf; + if (kf->pkt_data_offset + kf->pkt_data_size > pktlen) { + continue; } - } + memcpy(&scratch.data.b[0], + &oob[kf->oob_data_offset], kf->oob_data_size); + memcpy(&scratch.data.b[kf->oob_data_size], + &pkt[kf->pkt_data_offset], kf->pkt_data_size); + size = kf->oob_data_size + kf->pkt_data_size; + wsize = BYTES2WORDS(size); + DBG_VERB(("Filter: size = %d (%d), data = 0x%08x, mask = 0x%08x\n", + size, wsize, kf->data.w[0], kf->mask.w[0])); - if (is_err) { - /* Fragment or error */ - if (kf->mask.w[err_woff] == 0) { - /* Drop unless DCB status is part of filter */ - return 0; + if (device_is_sand(sinfo)) { + DBG_DUNE(("Filter: size = %d (wsize %d)\n", size, wsize)); + for (idx = 0; idx < wsize; idx++) + { + DBG_DUNE(("OOB[%d]: 0x%08x [0x%08x]\n", idx, kf->data.w[idx], kf->mask.w[idx])); + } + DBG_DUNE(("Meta Data [+ Selected Raw packet data]\n")); + for (idx = 0; idx < wsize; idx++) + { + DBG_DUNE(("Scratch[%d]: 0x%08x\n", idx, scratch.data.w[idx])); + } } - } - if (sinfo->dcb_type == 39) { - /* - * Mutliple RX channels are enabled on JR2 and above devices - * Bind between priority 0 and RX channel 0 is not checked, - * then all enabled RX channels can receive packets. - */ - if (kf->priority && (kf->priority < (num_rx_prio * sinfo->rx_chans))) { - if (kf->priority < (num_rx_prio * chan) || - kf->priority >= (num_rx_prio * (chan + 1))) { - return 0; + match = 1; + if (match) { + if (device_is_dnx(sinfo)) + { + /* + * Mutliple RX channels are enabled on JR2 and above devices + * Bind between priority 0 and RX channel 0 is not checked, then all enabled RX channels can receive packets. + */ + if (kf->priority && (kf->priority < (num_rx_prio * sinfo->rx_chans))) { + if (kf->priority < (num_rx_prio * chan) || + kf->priority >= (num_rx_prio * (chan + 1))) { + match = 0; + } + } + } + else { + if (kf->priority < (num_rx_prio * sinfo->rx_chans)) { + if (kf->priority < (num_rx_prio * chan) || + kf->priority >= (num_rx_prio * (chan + 1))) { + match = 0; + } + } } } - } else { - if (kf->priority < (num_rx_prio * sinfo->rx_chans)) { - if (kf->priority < (num_rx_prio * chan) || - kf->priority >= (num_rx_prio * (chan + 1))) { - return 0; + if (match) { + for (idx = 0; idx < wsize; idx++) { + scratch.data.w[idx] &= kf->mask.w[idx]; + if (scratch.data.w[idx] != kf->data.w[idx]) { + match = 0; + break; + } } } - } - for (idx = 0; idx < wsize; idx++) { - scratch.data.w[idx] &= kf->mask.w[idx]; - if (scratch.data.w[idx] != kf->data.w[idx]) { - return 0; + if (match) { + if (kf->dest_type == KCOM_DEST_T_CB) { + /* Check for custom filters */ + filter_cb = filter->cb ? filter->cb : knet_filter_cb; + if (filter_cb != NULL && cbf != NULL) { + memset(cbf, 0, sizeof(*cbf)); + memcpy(&cbf->kf, kf, sizeof(cbf->kf)); + if (filter_cb(pkt, pktlen, sinfo->dev_no, + meta, chan, &cbf->kf)) { + filter->hits++; + return cbf; + } + } else { + DBG_FLTR(("Match, but not filter callback\n")); + } + } else { + filter->hits++; + return filter; + } } } - return 1; + return NULL; } static bool @@ -3278,7 +3243,7 @@ bkn_add_rcpu_encap(bkn_switch_info_t *sinfo, struct sk_buff *skb, void *meta, in psize = RCPU_HDR_SIZE + len; skb_push(skb, psize); memset(skb->data, 0, RCPU_HDR_SIZE); - } else if (inband_meta(sinfo)) { + } else if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { psize = RCPU_HDR_SIZE + sinfo->pkt_hdr_size; skb_push(skb, psize); memset(skb->data, 0, RCPU_HDR_SIZE); @@ -3319,8 +3284,8 @@ bkn_add_rcpu_encap(bkn_switch_info_t *sinfo, struct sk_buff *skb, void *meta, in /* Copy at most 256 bytes system headers */ memcpy(&skb->data[RCPU_HDR_SIZE], (uint8_t *)meta, len); } else { - smeta = inband_meta(sinfo) ? (uint32_t *)meta : (uint32_t *)meta + 2; - wsize = inband_meta(sinfo) ? sinfo->pkt_hdr_size / 4 : sinfo->dcb_wsize - 3; + smeta = ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) ? (uint32_t *)meta : (uint32_t *)meta + 2; + wsize = ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) ? sinfo->pkt_hdr_size / 4 : sinfo->dcb_wsize - 3; for (idx = 0; idx < wsize; idx++) { dmeta[idx] = htonl(smeta[idx]); } @@ -3731,33 +3696,9 @@ bkn_dpp_packet_header_parse( is_skip_udh = TRUE; } /* UDH */ - if (device_is_dnx(sinfo)) - { - if (sinfo->udh_enable && !is_skip_udh) - { - if (sinfo->jr_mode_add_udh_base && !sinfo->jr_mode_udh_size_compensation) - { - /* - * Qumran/J+ compatible mode is not configurable currently - */ - } - else if (!sinfo->jr_mode_add_udh_base && sinfo->jr_mode_udh_size_compensation) - { - /* - * Jericho compatible mode - */ - packet_info->system_header_size += sinfo->udh_size; - } - } - } - else if (device_is_dpp(sinfo)) - { - if (sinfo->udh_size && !is_skip_udh) - { - packet_info->system_header_size += sinfo->udh_size; - } + if (sinfo->udh_size && !is_skip_udh) { + packet_info->system_header_size += sinfo->udh_size; } - /* OAM DM TOD header */ if (packet_info->flags & BKN_RX_HEADER_F_HAS_OAM_DM_TOD_SECOND) { packet_info->system_header_size += BKN_DPP_OAM_DM_TOD_SIZE_BYTE; @@ -3815,27 +3756,13 @@ bkn_dnx_packet_parse_ftmh( return -1; } - if (device_is_dnxf(sinfo)) - { - /* FTMH: PP_DSP */ - bkn_bitstream_get_field( - &buf[pkt_offset], - BKN_DNX_FTMH_PP_DSP_MSB, - BKN_DNX_FTMH_PP_DSP_NOF_BITS, - &fld_val); - packet_info->ftmh.source_sys_port_aggregate = fld_val; - } - else - { - /* FTMH: Source-System-Port-Aggregate */ - bkn_bitstream_get_field( - &buf[pkt_offset], - BKN_DNX_FTMH_SRC_SYS_PORT_AGGREGATE_MSB, - BKN_DNX_FTMH_SRC_SYS_PORT_AGGREGATE_NOF_BITS, - &fld_val); - packet_info->ftmh.source_sys_port_aggregate = fld_val; - } - + /* FTMH: Source-System-Port-Aggregate */ + bkn_bitstream_get_field( + &buf[pkt_offset], + BKN_DNX_FTMH_SRC_SYS_PORT_AGGREGATE_MSB, + BKN_DNX_FTMH_SRC_SYS_PORT_AGGREGATE_NOF_BITS, + &fld_val); + packet_info->ftmh.source_sys_port_aggregate = fld_val; /* FTMH: Action-Type */ bkn_bitstream_get_field( &buf[pkt_offset], @@ -3904,29 +3831,17 @@ bkn_dnx_packet_parse_ftmh( pkt_offset += sinfo->ftmh_stacking_ext_size; DBG_DUNE(("FTMH Stacking Extension(%u-%u) is present\n", sinfo->ftmh_stacking_ext_size, pkt_offset)); } - if (sinfo->spa_mode == BKN_DNX_SPA_MODE_16_BITS) - { - /* FTMH BIER BFR Extension */ - if (bier_bfr_ext_size > 0) - { - pkt_offset += BKN_DNX_FTMH_BIER_BFR_EXT_SIZE; - DBG_DUNE(("FTMH BIER BFR Extension(2-%u) is present\n", pkt_offset)); - } - } - if (sinfo->spa_mode == BKN_DNX_SPA_MODE_16_BITS) + /* FTMH BIER BFR Extension */ + if (bier_bfr_ext_size > 0) { - /* FTMH TM Destination Extension */ - if (tm_dst_ext_present > 0) - { - pkt_offset += BKN_DNX_FTMH_TM_DST_EXT_SIZE; - DBG_DUNE(("FTMH TM Destination Extension(3-%u) is present\n", pkt_offset)); - } + pkt_offset += BKN_DNX_FTMH_BIER_BFR_EXT_SIZE; + DBG_DUNE(("FTMH BIER BFR Extension(2-%u) is present\n", pkt_offset)); } - if (sinfo->spa_mode == BKN_DNX_SPA_MODE_18_BITS) + /* FTMH TM Destination Extension */ + if (tm_dst_ext_present > 0) { - packet_info->ftmh.source_sys_port_aggregate |= (tm_dst_ext_present ? 1:0) << 16; - packet_info->ftmh.source_sys_port_aggregate |= (bier_bfr_ext_size ? 1:0) << 17; - DBG_VERB(("FTMH(10): source-system-port(18b) 0x%x\n", packet_info->ftmh.source_sys_port_aggregate)); + pkt_offset += BKN_DNX_FTMH_TM_DST_EXT_SIZE; + DBG_DUNE(("FTMH TM Destination Extension(3-%u) is present\n", pkt_offset)); } /* FTMH Application Specific Extension */ if (app_specific_ext_size > 0) @@ -4047,10 +3962,7 @@ bkn_dnx_packet_parse_internal( /* FHEI-Size == 5B, FHEI-Type == Trap/Sniff */ if (fld_val == 0x5) { - /* Action_Type: 0-Forward, 1-Snoop, 2-Mirror, 3-StatisticalSampling */ - if (!packet_info->ftmh.action_type) { - *is_trapped = TRUE; - } + *is_trapped = TRUE; /* FHEI: Qualifier */ bkn_bitstream_get_field( &buf[pkt_offset], @@ -4070,7 +3982,7 @@ bkn_dnx_packet_parse_internal( DBG_DUNE(("FHEI(5-%u): code 0x%x qualifier 0x%x\n", pkt_offset, packet_info->internal.trap_id, packet_info->internal.trap_qualifier)); break; case BKN_DNX_INTERNAL_FHEI_TYPE_SZ2: - pkt_offset += BKN_DNX_INTERNAL_FHEI_SZ2_SIZE; + pkt_offset += BKN_DNX_INTERNAL_FHEI_SZ1_SIZE; DBG_DUNE(("FHEI(8-%u) is present\n", pkt_offset)); break; } @@ -4096,12 +4008,9 @@ bkn_dnx_packet_parse_internal( } /* OAM DMM/DMR TOD second header: PPH+TOD+UDH */ - if (packet_info->flags & BKN_RX_HEADER_F_HAS_ONE_SYSTEM_HEADER) { + if (sinfo->cmic_type == 'x') { if (packet_info->flags & BKN_RX_HEADER_F_HAS_OAM_DM_TOD_SECOND) { pkt_offset += BKN_DNX_TOD_SECOND_SIZE; - if (packet_info->internal.parsing_start_offset >= BKN_DNX_TOD_SECOND_SIZE) { - packet_info->internal.parsing_start_offset -= BKN_DNX_TOD_SECOND_SIZE; - } DBG_DUNE(("TOD second Header(4-%u) is present\n", pkt_offset)); } } @@ -4114,7 +4023,7 @@ bkn_dnx_packet_parse_internal( uint8_t data_type_2; uint8_t data_type_3; - if (DEV_IS_CMICR(sinfo)) + if (sinfo->cmic_type == 'r') { /* UDH: UDH-Data-Type[3] */ bkn_bitstream_get_field( @@ -4203,6 +4112,14 @@ bkn_dnx_packet_parse_internal( DBG_DUNE(("UDH base(1-%u) is present\n", pkt_offset)); } + /* OAM DMM/DMR TOD second header: PPH+UDH+TOD */ + if (sinfo->cmic_type == 'r') { + if (packet_info->flags & BKN_RX_HEADER_F_HAS_OAM_DM_TOD_SECOND) { + pkt_offset += BKN_DNX_TOD_SECOND_SIZE; + DBG_DUNE(("TOD second Header(4-%u) is present\n", pkt_offset)); + } + } + packet_info->system_header_size = pkt_offset; return 0; @@ -4218,8 +4135,6 @@ bkn_dnx_packet_header_parse( uint8_t is_oamp_punted = FALSE; uint8_t is_trapped = FALSE; uint8_t idx = 0; - uint8_t is_2_system_header_from_trap = FALSE; - uint32_t cpu_trap_qualifier; if ((sinfo == NULL) || (buff == NULL) || (packet_info == NULL)) { return -1; @@ -4252,58 +4167,23 @@ bkn_dnx_packet_header_parse( bkn_dnx_packet_parse_internal(sinfo, buff, buff_len, packet_info, is_oamp_punted, &is_trapped); } - cpu_trap_qualifier = packet_info->internal.trap_qualifier & 0xffff; - - if (is_trapped && cpu_trap_qualifier == 0) - { - /* - * For egress trap such as oam up mep destination 1, oam level error - * and down mep passive, the trapped packet might have 2 sets of system header - */ - switch (packet_info->internal.trap_id) - { - case BKN_DNX_INGRESS_TRAP_ID_TRAP_OAM_LEVEL: - case BKN_DNX_INGRESS_TRAP_ID_TRAP_OAM_PASSIVE: - is_2_system_header_from_trap = TRUE; - break; - default: - /** Get ingress cpu trap id of oam up mep destination 1. */ - if (sinfo->up_mep_ingress_cpu_trap_id1 == packet_info->internal.trap_id) - { - is_2_system_header_from_trap = TRUE; - break; - } - if (sinfo->system_headers_mode == BKN_DNX_JR2_MODE) - { - /** Get ingress cpu trap id of oam up mep destination 2. */ - if (sinfo->up_mep_ingress_cpu_trap_id2 == packet_info->internal.trap_id) - { - is_2_system_header_from_trap = TRUE; - break; - } - } - } - } - - if ((is_oamp_punted && is_trapped) || is_2_system_header_from_trap) + if (is_oamp_punted) { uint32_t oibih_oam_pdu_offset = 0; + is_oamp_punted = FALSE; is_trapped = FALSE; packet_info->flags = BKN_RX_HEADER_F_HAS_TWO_SYSTEM_HEADER; - if (DEV_IS_CMICR(sinfo)) + if (sinfo->cmic_type == 'r') { - if (is_oamp_punted) - { - /* OIBIH: OAM_PDU_Offset */ - bkn_bitstream_get_field( - &buff[packet_info->system_header_size], - BKN_DNX_OIBIH_OAM_PDU_OFFSET_MSB, - BKN_DNX_OIBIH_OAM_PDU_OFFSET_NOF_BITS, - &oibih_oam_pdu_offset); - packet_info->system_header_size += BKN_DNX_OIBIH_SIZE; - DBG_DUNE(("OIBIH Header(14-%u) is present\n", packet_info->system_header_size)); - } + /* OIBIH: OAM_PDU_Offset */ + bkn_bitstream_get_field( + &buff[packet_info->system_header_size], + BKN_DNX_OIBIH_OAM_PDU_OFFSET_MSB, + BKN_DNX_OIBIH_OAM_PDU_OFFSET_NOF_BITS, + &oibih_oam_pdu_offset); + packet_info->system_header_size += BKN_DNX_OIBIH_SIZE; + DBG_DUNE(("OIBIH Header(14-%u) is present\n", packet_info->system_header_size)); } /* FTMH */ bkn_dnx_packet_parse_ftmh(sinfo, buff, buff_len, packet_info); @@ -4316,7 +4196,7 @@ bkn_dnx_packet_header_parse( /* Internal */ if (packet_info->flags & BKN_RX_HEADER_F_HAS_INTERNAL_HEADER) { - bkn_dnx_packet_parse_internal(sinfo, buff, buff_len, packet_info, FALSE, &is_trapped); + bkn_dnx_packet_parse_internal(sinfo, buff, buff_len, packet_info, is_oamp_punted, &is_trapped); } if (oibih_oam_pdu_offset) { @@ -4333,50 +4213,13 @@ bkn_dnx_packet_header_parse( } else { - /* - * J2,J3 devices does not have PTCH header. NO need to calculate parsing_start_offset. - * The future devices will have PTCH header. Should consider how to calculate the Eth - * header position. - */ - if (packet_info->internal.parsing_start_offset && DEV_IS_CMICR(sinfo)) + if (packet_info->internal.parsing_start_offset && (sinfo->cmic_type == 'r')) { packet_info->system_header_size += packet_info->internal.parsing_start_offset; DBG_DUNE(("Offset after system headers %u\n", packet_info->internal.parsing_start_offset)); } - - } - - DBG_DUNE(("Total length of headers is %u\n", packet_info->system_header_size)); - - return 0; -} - -static int -bkn_dnxf_packet_header_parse( - bkn_switch_info_t *sinfo, - uint8_t *buff, - uint32_t buff_len, - bkn_dune_system_header_info_t *packet_info) -{ - if ((sinfo == NULL) || (buff == NULL) || (packet_info == NULL)) { - return -1; } - packet_info->flags = BKN_RX_HEADER_F_HAS_ONE_SYSTEM_HEADER; - packet_info->system_header_size = 0; - /* EP STATIC HEADER BYTES */ - packet_info->system_header_size += 56; - /* CFRH header BYTES */ - packet_info->system_header_size += 8; - /* FTMH */ - bkn_dnx_packet_parse_ftmh(sinfo, buff, buff_len, packet_info); - /* FTMH LB EXT BYTES*/ - packet_info->system_header_size += 3; - /* PPH BASE HEADER BYTES */ - packet_info->system_header_size += 12; - /* UDH BASE HEADER BYTES */ - packet_info->system_header_size += 1; - DBG_DUNE(("Total length of headers is %u\n", packet_info->system_header_size)); return 0; @@ -4402,522 +4245,72 @@ bkn_packet_header_parse(bkn_switch_info_t *sinfo, uint8_t *buf, uint32_t buf_len bkn_dpp_packet_header_parse(sinfo, buf, buf_len, packet_info); } } - else if (device_is_dnxf(sinfo)) - { - bkn_dnxf_packet_header_parse(sinfo, buf, buf_len, packet_info); - } - return 0; } -typedef struct bkn_match_rx_pkt_params_s { - uint8_t *pkt; - int pktlen; - void *meta; - int is_err; +static int +bkn_do_api_rx(bkn_switch_info_t *sinfo, int chan, int budget) +{ + bkn_priv_t *priv; + bkn_dcb_chain_t *dcb_chain; + struct sk_buff *skb; + bkn_filter_t cbf; + bkn_filter_t *filter = NULL; uint32_t err_woff; -} bkn_match_rx_pkt_params_t; - -typedef struct bkn_api_rx_params_s { + uint32_t *dcb, *meta, *match_data; uint8_t *pkt; - int pktlen; - int pkt_hdr_size; - uint32_t *meta; - uint32_t *sand_scratch_data; + uint64_t pkt_dma; int drop_api; -} bkn_api_rx_params_t; + int ethertype; + int pktlen, pkt_hdr_size = 0; + int idx; + int dcbs_done = 0; + bkn_dune_system_header_info_t packet_info; + uint32_t sand_scratch_data[BKN_SAND_SCRATCH_DATA_SIZE] = {0}; -typedef struct bkn_skb_rx_params_s { - uint8_t *pkt; - int pktlen; - int pkt_hdr_size; - uint8_t skip_hdrlen; - uint32_t *meta; - uint32_t *sand_scratch_data; - bkn_desc_info_t *desc; -} bkn_skb_rx_params_t; - -typedef int -(*rx_filter_process_f)(bkn_switch_info_t *sinfo, int chan, struct sk_buff *skb, - kcom_filter_t *kf, void *process_params); - -typedef struct bkn_rx_filter_info_s { - bkn_match_rx_pkt_params_t *match_params; - void *process_params; - rx_filter_process_f process_fn; -} bkn_rx_filter_info_t; - -/*! - * The destination type KCOM_DEST_T_CB allows the user to - * perform advanced filtering and packet processing via a - * user-supplied filter callback function. - * - * The filter callback function is implemented in a separate Linux - * kernel module which is loaded on top of the KNET module, and the - * following APIs can be used to register the callback function with - * the KNET driver: - * - * bkn_filter_cb_register - * (legacy API - only one callback possible per device) - * - * bkn_filter_cb_register_by_name - * bkn_filter_cb_attr_register - * (supports multiple named callbacks per device) - * - * bkn_filter_cb_unregister - * (unregisters a callback function) - * - * Notes: - * - * 1) The callbacks are done from interrupt context, so the user - * should defer any advanced processing to a work queue. - * - * 2) The named callbacks take priority over unnamed (legacy) - * callbacks if the filter priorities are the same. - * - * 3) Packet filters are processed in order of priority, and further - * processing is stopped once a matching filter is encountered. If - * additional filters have the same priority as the first matching - * filter, then all these filters will be processed as well, - * i.e. if such a filter matches, the associated filter action will - * be executed. - * - * 4) When multiple filters are matched, the KNET driver will ensure - * that each filter gets its own copy of the packet (skb), - * i.e. from the filters' perspective, no special processing is - * required. - * - * 5) When Rx buffers are provied by BCM Rx API (use_rx_skb = 0) and - * filter matched for destination type KCOM_DEST_T_API, the bkn_do_rx_filter - * will return and not further check for other matched filters. - */ -static int -bkn_do_rx_filter(bkn_switch_info_t *sinfo, int chan, bkn_desc_info_t *desc, - bkn_rx_filter_info_t *rfi) -{ - bkn_match_rx_pkt_params_t *mp = rfi->match_params; - struct list_head *list = NULL, *next_list = NULL; - bkn_filter_t *filter = NULL, *next_filter = NULL; - struct sk_buff *skb = desc ? desc->skb : NULL; - struct sk_buff *fskb = NULL; - knet_filter_cb_f filter_cb; - kcom_filter_t cb_kf, *kf; - uint32_t next_filter_match = 0, same_pri_idx; - int num_filters_match = 0; + dcb_chain = sinfo->rx[chan].api_dcb_chain; + if (dcb_chain == NULL) { + /* No active chains */ + return 0; + } - list_for_each(list, &sinfo->rxpf_list) { - filter = (bkn_filter_t *)list; - if (next_filter_match || - bkn_match_rx_pkt(sinfo, mp->pkt, mp->pktlen, mp->meta, chan, - mp->is_err, mp->err_woff, filter)) { - if (next_filter_match && --next_filter_match > 0) { - /* Same priority, but not matching */ - continue; - } - if (skb) { - fskb = skb; + while (dcb_chain->dcb_cur < dcb_chain->dcb_cnt) { + dcb = &dcb_chain->dcb_mem[dcb_chain->dcb_cur * sinfo->dcb_wsize]; + DBG_VERB(("DCB %2d: 0x%08x\n", + dcb_chain->dcb_cur, dcb[sinfo->dcb_wsize-1])); + if ((dcb[sinfo->dcb_wsize-1] & (1 << 31)) == 0) { + break; + } + if (CDMA_CH(sinfo, XGS_DMA_RX_CHAN + chan)) { + /* Handle for Continuous DMA mode */ + if (dcbs_done >= budget) { + break; } - next_list = list->next; - same_pri_idx = 0; - /* Look for matching filters with same priority */ - while (next_list != &sinfo->rxpf_list) { - next_filter = (bkn_filter_t *)next_list; - if (next_filter->kf.priority != filter->kf.priority) { - break; - } - same_pri_idx++; - if (bkn_match_rx_pkt(sinfo, mp->pkt, mp->pktlen, mp->meta, chan, - mp->is_err, mp->err_woff, next_filter)) { - /* Found another matching filter with same priority */ - if (skb) { - fskb = skb_clone(skb, GFP_ATOMIC); - } - next_filter_match = same_pri_idx; + if (((sinfo->cmic_type == 'x' || sinfo->cmic_type == 'r') && dcb[2] & (1 << 18)) || + ((sinfo->cmic_type != 'x' && sinfo->cmic_type != 'r') && dcb[1] & (1 << 18))) { + dcb[sinfo->dcb_wsize-1] |= SOC_DCB_KNET_DONE; + bkn_api_rx_chain_done(sinfo, chan); + dcb_chain = sinfo->rx[chan].api_dcb_chain; + if (dcb_chain == NULL) { break; } - next_list = next_list->next; - } - - if (desc) { - desc->skb = fskb; + continue; } - - kf = NULL; - if (filter->kf.dest_type == KCOM_DEST_T_CB) { - /* Check for custom filters */ - filter_cb = filter->cb ? filter->cb : knet_filter_cb; - if (filter_cb) { - memcpy(&cb_kf, &filter->kf, sizeof(cb_kf)); - if (filter_cb(mp->pkt, mp->pktlen, sinfo->dev_no, - mp->meta, chan, &cb_kf)) { - filter->hits++; - num_filters_match++; - kf = &cb_kf; - } - } else { - DBG_FLTR(("Match, but not filter callback\n")); - } - } else { - filter->hits++; - num_filters_match++; - kf = &filter->kf; - } - - if (kf) { - if (rfi->process_fn(sinfo, chan, fskb, kf, - rfi->process_params) < 0) { - if (skb && skb != fskb) { - /* Free any next unhandled skb */ - dev_kfree_skb_any(skb); - } - /* Exit loop */ - next_filter_match = 0; - } - } - - /* - * Free the cloned skb only. - * The original skb can be reused if skb data is not set. - */ - if (desc && desc->skb && skb_cloned(desc->skb)) { - dev_kfree_skb_any(desc->skb); - desc->skb = NULL; - } - - if (!next_filter_match) { - break; - } - } - } - - return num_filters_match; -} - -static inline void -bkn_do_rx_match_pre_process(bkn_switch_info_t *sinfo, uint32_t *dcb, - uint8_t *pkt, int *pktlen, int pkt_hdr_size, - uint8_t skip_hdrlen, uint8_t eth_offset, - bkn_dune_system_header_info_t *packet_info, - uint32_t *sand_scratch_data) -{ - int idx; - - if (device_is_sand(sinfo)) { - bkn_bitstream_set_field(sand_scratch_data, 0, 16, - packet_info->internal.trap_id); - bkn_bitstream_set_field(sand_scratch_data, 16, 16, - packet_info->internal.trap_qualifier); - bkn_bitstream_set_field(sand_scratch_data, 32, 18, - packet_info->ftmh.source_sys_port_aggregate); - bkn_bitstream_set_field(sand_scratch_data, 64, 2, - packet_info->ftmh.action_type); - bkn_bitstream_set_field(sand_scratch_data, 66, 18, - packet_info->internal.forward_domain); - - if (force_tagged && !device_is_dnxf(sinfo)) { - uint8_t *eth_hdr = pkt + pkt_hdr_size; - uint16_t tpid = 0; - - if (skip_hdrlen > 0) { - eth_hdr += eth_offset; - } - tpid = PKT_U16_GET(eth_hdr, 12); - if (packet_is_untagged(tpid)) { - int raw_packet_len = *pktlen - pkt_hdr_size; - uint32_t vid = 0; - uint32_t is_vsi = BKN_DNX_PPH_FWD_DOMAIN_IS_VSI( - packet_info->internal.forward_domain); - uint32_t fwd_domain = BKN_DNX_PPH_FWD_DOMAIN_ID_GET( - packet_info->internal.forward_domain); - - if ((*pktlen + 4) < rx_buffer_size) { - for (idx = (raw_packet_len - 1); idx >= 12; idx--) { - eth_hdr[idx + 4] = eth_hdr[idx]; - } - if (ft_vid) { - vid = ft_vid; - } - else if (is_vsi && fwd_domain) { - vid = fwd_domain & 0xfff; - } - else { - vid = 1; - } - DBG_DUNE(("add vlan tag (%d) to untagged packets\n", - vid)); - - eth_hdr[12] = (ft_tpid >> 8) & 0xff; - eth_hdr[13] = ft_tpid & 0xff; - eth_hdr[14] = (((ft_pri & 0x7) << 5) | - ((ft_cfi & 0x1) << 4) | - ((vid >> 8) & 0xf)) & 0xff; - eth_hdr[15] = vid & 0xff; - /* Reset packet length in DCB */ - *pktlen += 4; - bkn_dump_pkt(pkt, *pktlen, XGS_DMA_RX_CHAN); - dcb[sinfo->dcb_wsize-1] &= ~SOC_DCB_KNET_COUNT_MASK; - dcb[sinfo->dcb_wsize-1] |= *pktlen & - SOC_DCB_KNET_COUNT_MASK; - } - } - } - } -} - -static inline int -bkn_rx_strip_skb_vlan_tag(struct sk_buff *skb, uint16_t tpid) -{ - if (tpid == ETH_P_8021Q || tpid == ETH_P_8021AD) { - DBG_FLTR(("Strip VLAN tag\n")); - ((u32*)skb->data)[3] = ((u32*)skb->data)[2]; - ((u32*)skb->data)[2] = ((u32*)skb->data)[1]; - ((u32*)skb->data)[1] = ((u32*)skb->data)[0]; - skb_pull(skb, 4); - return 1; - } - return 0; -} - -static inline void -bkn_rx_mark_skb_vlan_tagged(struct sk_buff *skb, uint16_t tpid, uint16_t tci, - int rcpu_encap) -{ - if (rcpu_encap) { - bkn_vlan_hwaccel_put_tag(skb, ETH_P_8021Q, tci); - } else { - if (tpid == ETH_P_8021AD) { - bkn_vlan_hwaccel_put_tag(skb, ETH_P_8021AD, tci); - } else { - bkn_vlan_hwaccel_put_tag(skb, ETH_P_8021Q, tci); - } - } -} - -static int -bkn_api_rx_filter_process(bkn_switch_info_t *sinfo, int chan, - struct sk_buff *skb, kcom_filter_t *kf, void *params) -{ - bkn_api_rx_params_t *ap = (bkn_api_rx_params_t *)params; - uint8_t *pkt = ap->pkt; - int pktlen = ap->pktlen; - int pkt_hdr_size = ap->pkt_hdr_size; - uint32_t *meta = ap->meta; - uint32_t *sand_scratch_data = ap->sand_scratch_data; - bkn_priv_t *priv; - int ethertype; - - DBG_FLTR(("Match filter ID %d\n", kf->id)); - switch (kf->dest_type) { - case KCOM_DEST_T_API: - DBG_FLTR(("Send to Rx API\n")); - sinfo->rx[chan].pkts_f_api++; - ap->drop_api = 0; - break; - case KCOM_DEST_T_NETIF: - priv = bkn_netif_lookup(sinfo, kf->dest_id); - if (priv) { - /* Check that software link is up */ - if (!bkn_netif_ok(priv->dev)) { - sinfo->rx[chan].pkts_d_no_link++; - break; - } - - pkt += pkt_hdr_size; - pktlen -= pkt_hdr_size; - - /* Add 2 bytes for IP header alignment (see below) */ - if (device_is_sand(sinfo)) { - skb = dev_alloc_skb(pktlen + RCPU_HDR_SIZE + pkt_hdr_size + 2); - if (skb == NULL) { - sinfo->rx[chan].pkts_d_no_skb++; - break; - } - skb_reserve(skb, RCPU_HDR_SIZE + pkt_hdr_size); - } else { - skb = dev_alloc_skb(pktlen + RCPU_RX_ENCAP_SIZE + 2); - if (skb == NULL) { - sinfo->rx[chan].pkts_d_no_skb++; - break; - } - skb_reserve(skb, RCPU_RX_ENCAP_SIZE); - } - - DBG_FLTR(("Send to netif %d (%s)\n", - priv->id, priv->dev->name)); - sinfo->rx[chan].pkts_f_netif++; - skb->dev = priv->dev; - skb_reserve(skb, 2); /* 16 byte align the IP fields. */ - - /* Save for RCPU before stripping tag */ - ethertype = PKT_U16_GET(pkt, 16); - - skb_copy_to_linear_data(skb, pkt, pktlen); - if (device_is_sand(sinfo)) { - /* CRC has been stripped */ - skb_put(skb, pktlen); - } else { - skb_put(skb, pktlen - 4); /* Strip CRC */ - } - - if ((priv->flags & KCOM_NETIF_F_KEEP_RX_TAG) == 0) { - uint16_t vlan_proto = PKT_U16_GET(pkt, 12); - - if (kf->flags & KCOM_FILTER_F_STRIP_TAG) { - /* Strip VLAN tag */ - (void)bkn_rx_strip_skb_vlan_tag(skb, vlan_proto); - } else { - /* - * Mark packet as VLAN-tagged, otherwise newer - * kernels will strip the tag. - */ - uint16_t tci = PKT_U16_GET(pkt, 14); - int renc = (priv->flags & KCOM_NETIF_F_RCPU_ENCAP) ? 1 : 0; - - bkn_rx_mark_skb_vlan_tagged(skb, vlan_proto, tci, renc); - } - } - - priv->stats.rx_packets++; - priv->stats.rx_bytes += skb->len; - - /* Optional SKB updates */ - KNET_SKB_CB(skb)->dcb_type = sinfo->dcb_type & 0xFFFF; - if (knet_rx_cb != NULL) { - KNET_SKB_CB(skb)->netif_user_data = priv->cb_user_data; - KNET_SKB_CB(skb)->filter_user_data = kf->cb_user_data; - KNET_SKB_CB(skb)->meta_len = pkt_hdr_size; - KNET_SKB_CB(skb)->port = priv->port; - if (device_is_sand(sinfo)) { - skb = knet_rx_cb(skb, sinfo->dev_no, - sand_scratch_data); - } - else { - skb = knet_rx_cb(skb, sinfo->dev_no, meta); - } - if (skb == NULL) { - /* Consumed by call-back */ - sinfo->rx[chan].pkts_d_callback++; - break; - } - } - - /* Do Rx timestamping */ - if (priv->rx_hwts) { - bkn_hw_tstamp_rx_set(sinfo, priv->phys_port, skb, meta); - } - - if (priv->flags & KCOM_NETIF_F_RCPU_ENCAP) { - bkn_add_rcpu_encap(sinfo, skb, meta, pkt_hdr_size); - DBG_PDMP(("After add RCPU ENCAP\n")); - bkn_dump_pkt(skb->data, pktlen + RCPU_RX_ENCAP_SIZE, - XGS_DMA_RX_CHAN); - } - skb->protocol = eth_type_trans(skb, skb->dev); - if (kf->dest_proto) { - skb->protocol = kf->dest_proto; - } - if (priv->flags & KCOM_NETIF_F_RCPU_ENCAP) { - bkn_eth_type_update(skb, ethertype); - } - DBG_DUNE(("skb protocol 0x%04x\n", skb->protocol)); - - /* - * Disable configuration API while the spinlock is released. - */ - sinfo->cfg_api_locked = 1; - /* Unlock while calling up network stack */ - spin_unlock(&sinfo->lock); - if (use_napi) { - netif_receive_skb(skb); - } else { - netif_rx(skb); - } - spin_lock(&sinfo->lock); - /* Re-enable configuration API once spinlock is regained. */ - sinfo->cfg_api_locked = 0; - - if (kf->mirror_type == KCOM_DEST_T_API || dbg_pkt_enable) { - DBG_FLTR(("Mirror to Rx API\n")); - sinfo->rx[chan].pkts_m_api++; - ap->drop_api = 0; - } - } else { - DBG_FLTR(("Unknown netif %d\n", kf->dest_id)); - sinfo->rx[chan].pkts_d_unkn_netif++; - } - break; - default: - /* Drop packet */ - DBG_FLTR(("Unknown dest type %d\n", kf->dest_type)); - sinfo->rx[chan].pkts_d_unkn_dest++; - break; - } - - if (ap->drop_api == 0) { - /* Stop processing the next matched filter */ - return -1; - } - return 0; -} - -static int -bkn_do_api_rx(bkn_switch_info_t *sinfo, int chan, int budget) -{ - bkn_dcb_chain_t *dcb_chain; - uint32_t err_woff; - uint32_t *dcb, *meta; - uint8_t *pkt; - uint64_t pkt_dma; - int drop_api = 1; - int pktlen, pkt_hdr_size = 0; - int dcbs_done = 0; - bkn_dune_system_header_info_t packet_info; - uint32_t sand_scratch_data[BKN_SAND_SCRATCH_DATA_SIZE] = {0}; - int is_err; - - dcb_chain = sinfo->rx[chan].api_dcb_chain; - if (dcb_chain == NULL) { - /* No active chains */ - return 0; - } - - while (dcb_chain->dcb_cur < dcb_chain->dcb_cnt) { - dcb = &dcb_chain->dcb_mem[dcb_chain->dcb_cur * sinfo->dcb_wsize]; - DBG_VERB(("DCB %2d: 0x%08x\n", - dcb_chain->dcb_cur, dcb[sinfo->dcb_wsize-1])); - if ((dcb[sinfo->dcb_wsize-1] & (1 << 31)) == 0) { - break; - } - if (CDMA_CH(sinfo, XGS_DMA_RX_CHAN + chan)) { - /* Handle for Continuous DMA mode */ - if (dcbs_done >= budget) { - break; - } - if ((inband_meta(sinfo) && (dcb[2] & (1 << 18))) || - (!inband_meta(sinfo) && (dcb[1] & (1 << 18)))) { - dcb[sinfo->dcb_wsize-1] |= SOC_DCB_KNET_DONE; - bkn_api_rx_chain_done(sinfo, chan); - dcb_chain = sinfo->rx[chan].api_dcb_chain; - if (dcb_chain == NULL) { - break; - } - continue; - } - } - if ((inband_meta(sinfo) && (dcb[2] & (1 << 16)) == 0) || - (!inband_meta(sinfo) && (dcb[1] & (1 << 16)) == 0)) { - sinfo->rx[chan].chain_complete = 1; - } - sinfo->rx[chan].pkts++; - if (inband_meta(sinfo)) { - pkt_dma = BUS_TO_DMA_HI(dcb[1]); - pkt_dma = pkt_dma << 32 | dcb[0]; - } else { - pkt_dma = dcb[0]; - } - pkt = (uint8_t *)kernel_bde->p2l(sinfo->dev_no, (sal_paddr_t)pkt_dma); - pktlen = dcb[sinfo->dcb_wsize-1] & SOC_DCB_KNET_COUNT_MASK; - bkn_dump_pkt(pkt, pktlen, XGS_DMA_RX_CHAN); + } + if (((sinfo->cmic_type == 'x' || sinfo->cmic_type == 'r') && (dcb[2] & (1 << 16)) == 0) || + ((sinfo->cmic_type != 'x' && sinfo->cmic_type != 'r') && (dcb[1] & (1 << 16)) == 0)) { + sinfo->rx[chan].chain_complete = 1; + } + sinfo->rx[chan].pkts++; + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { + pkt_dma = BUS_TO_DMA_HI(dcb[1]); + pkt_dma = pkt_dma << 32 | dcb[0]; + } else { + pkt_dma = dcb[0]; + } + pkt = (uint8_t *)kernel_bde->p2l(sinfo->dev_no, (sal_paddr_t)pkt_dma); + pktlen = dcb[sinfo->dcb_wsize-1] & SOC_DCB_KNET_COUNT_MASK; + bkn_dump_pkt(pkt, pktlen, XGS_DMA_RX_CHAN); if (device_is_sand(sinfo)) { err_woff = BKN_SAND_SCRATCH_DATA_SIZE - 1; @@ -4932,7 +4325,7 @@ bkn_do_api_rx(bkn_switch_info_t *sinfo, int chan, int budget) pkt_hdr_size = packet_info.system_header_size; } } else { - if (inband_meta(sinfo)) { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { meta = (uint32_t *)pkt; err_woff = sinfo->pkt_hdr_size / sizeof(uint32_t) - 1; meta[err_woff] = dcb[sinfo->dcb_wsize-1]; @@ -4945,38 +4338,247 @@ bkn_do_api_rx(bkn_switch_info_t *sinfo, int chan, int budget) /* Minimun size: header_size + MACs + VLAN + ETH_TYPE */ if (pktlen > pkt_hdr_size + 18) { - bkn_rx_filter_info_t rfi; - bkn_match_rx_pkt_params_t match_params, *mp = &match_params; - bkn_api_rx_params_t api_params, *ap = &api_params; + if (device_is_sand(sinfo)) { + bkn_bitstream_set_field(sand_scratch_data, 0, 16, + packet_info.internal.trap_id); + bkn_bitstream_set_field(sand_scratch_data, 16, 16, + packet_info.internal.trap_qualifier); + bkn_bitstream_set_field(sand_scratch_data, 32, 17, + packet_info.ftmh.source_sys_port_aggregate); + bkn_bitstream_set_field(sand_scratch_data, 64, 2, + packet_info.ftmh.action_type); + bkn_bitstream_set_field(sand_scratch_data, 66, 18, + packet_info.internal.forward_domain); + + if (force_tagged) { + uint8_t *eth_hdr = pkt + pkt_hdr_size; + uint16_t tpid = 0; + + tpid = PKT_U16_GET(eth_hdr, 12); + if (packet_is_untagged(tpid)) { + int raw_packet_len = pktlen - pkt_hdr_size; + uint32_t vid = 0; + uint32_t is_vsi = BKN_DNX_PPH_FWD_DOMAIN_IS_VSI(packet_info.internal.forward_domain); + uint32_t fwd_domain = BKN_DNX_PPH_FWD_DOMAIN_ID_GET(packet_info.internal.forward_domain); + + if ((pktlen + 4) < rx_buffer_size) { + for (idx = (raw_packet_len - 1); idx >= 12; idx--) { + eth_hdr[idx+4] = eth_hdr[idx]; + } + if (ft_vid) { + vid = ft_vid; + } + else if (is_vsi && fwd_domain) { + vid = fwd_domain & 0xfff; + } + else { + vid = 1; + } + DBG_DUNE(("add vlan tag (%d) to untagged packets\n", + vid)); + + eth_hdr[12] = (ft_tpid >> 8) & 0xff; + eth_hdr[13] = ft_tpid & 0xff; + eth_hdr[14] = (((ft_pri & 0x7) << 5) | + ((ft_cfi & 0x1) << 4) | + ((vid >> 8) & 0xf)) & 0xff; + eth_hdr[15] = vid & 0xff; + /* Reset packet length in DCB */ + pktlen += 4; + bkn_dump_pkt(pkt, pktlen, XGS_DMA_RX_CHAN); + dcb[sinfo->dcb_wsize-1] &= ~SOC_DCB_KNET_COUNT_MASK; + dcb[sinfo->dcb_wsize-1] |= pktlen & + SOC_DCB_KNET_COUNT_MASK; + } + } + } + } + + if (device_is_sand(sinfo)) { + match_data = sand_scratch_data; + } else { + match_data = meta; + } + filter = bkn_match_rx_pkt(sinfo, pkt + pkt_hdr_size, + pktlen - pkt_hdr_size, match_data, + chan, &cbf); + + if ((dcb[sinfo->dcb_wsize-1] & 0xf0000) != 0x30000) { + /* Fragment or error */ + if (filter && filter->kf.mask.w[err_woff] == 0) { + /* Drop unless DCB status is part of filter */ + filter = NULL; + } + } + } + drop_api = 1; + if (filter) { + DBG_FLTR(("Match filter ID %d\n", filter->kf.id)); + switch (filter->kf.dest_type) { + case KCOM_DEST_T_API: + DBG_FLTR(("Send to Rx API\n")); + sinfo->rx[chan].pkts_f_api++; + drop_api = 0; + break; + case KCOM_DEST_T_NETIF: + priv = bkn_netif_lookup(sinfo, filter->kf.dest_id); + if (priv) { + /* Check that software link is up */ + if (!bkn_netif_ok(priv->dev)) { + sinfo->rx[chan].pkts_d_no_link++; + break; + } + + pkt += pkt_hdr_size; + pktlen -= pkt_hdr_size; + + /* Add 2 bytes for IP header alignment (see below) */ + if (device_is_sand(sinfo)) { + skb = dev_alloc_skb(pktlen + RCPU_HDR_SIZE + pkt_hdr_size + 2); + if (skb == NULL) { + sinfo->rx[chan].pkts_d_no_skb++; + break; + } + skb_reserve(skb, RCPU_HDR_SIZE + pkt_hdr_size); + } else { + skb = dev_alloc_skb(pktlen + RCPU_RX_ENCAP_SIZE + 2); + if (skb == NULL) { + sinfo->rx[chan].pkts_d_no_skb++; + break; + } + skb_reserve(skb, RCPU_RX_ENCAP_SIZE); + } + + DBG_FLTR(("Send to netif %d (%s)\n", + priv->id, priv->dev->name)); + sinfo->rx[chan].pkts_f_netif++; + skb->dev = priv->dev; + skb_reserve(skb, 2); /* 16 byte align the IP fields. */ + + /* Save for RCPU before stripping tag */ + ethertype = PKT_U16_GET(pkt, 16); - bkn_do_rx_match_pre_process(sinfo, dcb, pkt, &pktlen, pkt_hdr_size, - 0, 0, &packet_info, sand_scratch_data); + skb_copy_to_linear_data(skb, pkt, pktlen); + if (device_is_sand(sinfo)) { + /* CRC has been stripped */ + skb_put(skb, pktlen); + } else { + skb_put(skb, pktlen - 4); /* Strip CRC */ + } + + if ((priv->flags & KCOM_NETIF_F_KEEP_RX_TAG) == 0) { + uint16_t vlan_proto = PKT_U16_GET(pkt, 12); + + if (filter->kf.flags & KCOM_FILTER_F_STRIP_TAG) { + /* Strip VLAN tag */ + if (vlan_proto == ETH_P_8021Q || + vlan_proto == ETH_P_8021AD) { + DBG_FLTR(("Strip VLAN tag\n")); + ((u32*)skb->data)[3] = ((u32*)skb->data)[2]; + ((u32*)skb->data)[2] = ((u32*)skb->data)[1]; + ((u32*)skb->data)[1] = ((u32*)skb->data)[0]; + skb_pull(skb, 4); + } + } else { + /* + * Mark packet as VLAN-tagged, otherwise newer + * kernels will strip the tag. + */ + uint16_t tci = PKT_U16_GET(pkt, 14); + + if (priv->flags & KCOM_NETIF_F_RCPU_ENCAP) { + bkn_vlan_hwaccel_put_tag(skb, ETH_P_8021Q, tci); + } else { + if (vlan_proto == ETH_P_8021AD) { + bkn_vlan_hwaccel_put_tag + (skb, ETH_P_8021AD, tci); + } else { + bkn_vlan_hwaccel_put_tag + (skb, ETH_P_8021Q, tci); + } + } + } + } - /* Fragment or error */ - is_err = ((dcb[sinfo->dcb_wsize-1] & 0xf0000) != 0x30000) ? 1 : 0; + priv->stats.rx_packets++; + priv->stats.rx_bytes += skb->len; - mp->pkt = pkt + pkt_hdr_size; - mp->pktlen = pktlen - pkt_hdr_size; - mp->meta = device_is_sand(sinfo) ? sand_scratch_data : meta; - mp->is_err = is_err; - mp->err_woff = err_woff; + /* Optional SKB updates */ + KNET_SKB_CB(skb)->dcb_type = sinfo->dcb_type & 0xFFFF; + if (knet_rx_cb != NULL) { + KNET_SKB_CB(skb)->netif_user_data = priv->cb_user_data; + KNET_SKB_CB(skb)->filter_user_data = filter->kf.cb_user_data; + if (device_is_sand(sinfo)) { + skb = knet_rx_cb(skb, sinfo->dev_no, + sand_scratch_data); + } + else { + skb = knet_rx_cb(skb, sinfo->dev_no, meta); + } + if (skb == NULL) { + /* Consumed by call-back */ + sinfo->rx[chan].pkts_d_callback++; + break; + } + } - ap->pkt = pkt; - ap->pktlen = pktlen; - ap->pkt_hdr_size = pkt_hdr_size; - ap->meta = meta; - ap->sand_scratch_data = sand_scratch_data; - ap->drop_api = 1; + /* Do Rx timestamping */ + if (priv->rx_hwts) { + bkn_hw_tstamp_rx_set(sinfo, priv->phys_port, skb, meta); + } - rfi.match_params = mp; - rfi.process_params = (void *)ap; - rfi.process_fn = bkn_api_rx_filter_process; + if (priv->flags & KCOM_NETIF_F_RCPU_ENCAP) { + bkn_add_rcpu_encap(sinfo, skb, meta, pkt_hdr_size); + DBG_PDMP(("After add RCPU ENCAP\n")); + bkn_dump_pkt(skb->data, pktlen + RCPU_RX_ENCAP_SIZE, + XGS_DMA_RX_CHAN); + } + skb->protocol = eth_type_trans(skb, skb->dev); + if (filter->kf.dest_proto) { + skb->protocol = filter->kf.dest_proto; + } + if (priv->flags & KCOM_NETIF_F_RCPU_ENCAP) { + bkn_eth_type_update(skb, ethertype); + } + DBG_DUNE(("skb protocol 0x%04x\n", skb->protocol)); - if (!bkn_do_rx_filter(sinfo, chan, NULL, &rfi)) { - DBG_PKT(("Rx packet dropped.\n")); - sinfo->rx[chan].pkts_d_no_match++; + /* + * Disable configuration API while the spinlock is released. + */ + sinfo->cfg_api_locked = 1; + /* Unlock while calling up network stack */ + spin_unlock(&sinfo->lock); + if (use_napi) { + netif_receive_skb(skb); + } else { + netif_rx(skb); + } + spin_lock(&sinfo->lock); + /* Re-enable configuration API once spinlock is regained. */ + sinfo->cfg_api_locked = 0; + + if (filter->kf.mirror_type == KCOM_DEST_T_API || + dbg_pkt_enable) { + DBG_FLTR(("Mirror to Rx API\n")); + sinfo->rx[chan].pkts_m_api++; + drop_api = 0; + } + } else { + DBG_FLTR(("Unknown netif %d\n", + filter->kf.dest_id)); + sinfo->rx[chan].pkts_d_unkn_netif++; + } + break; + default: + /* Drop packet */ + DBG_FLTR(("Unknown dest type %d\n", + filter->kf.dest_type)); + sinfo->rx[chan].pkts_d_unkn_dest++; + break; } - drop_api = ap->drop_api; + } else { + DBG_PKT(("Rx packet dropped.\n")); + sinfo->rx[chan].pkts_d_no_match++; } if (drop_api) { /* If count is zero, the DCB will just be recycled */ @@ -4996,7 +4598,7 @@ bkn_do_api_rx(bkn_switch_info_t *sinfo, int chan, int budget) */ static int bkn_skb_rx_netif_process(bkn_switch_info_t *sinfo, int dest_id, int chan, - struct sk_buff *skb, kcom_filter_t *kf, + struct sk_buff *skb, bkn_filter_t *filter, uint32 *rx_cb_meta, uint32 *meta, int pkt_hdr_size, int pktlen, int ethertype) { @@ -5014,304 +4616,61 @@ bkn_skb_rx_netif_process(bkn_switch_info_t *sinfo, int dest_id, int chan, if ((priv->flags & KCOM_NETIF_F_KEEP_RX_TAG) == 0) { uint16_t vlan_proto; - vlan_proto = PKT_U16_GET(skb->data, 12); - if ((kf->flags & KCOM_FILTER_F_STRIP_TAG) == 0) { - /* - * Mark packet as VLAN-tagged, otherwise newer - * kernels will strip the tag. - */ - uint16_t tci = PKT_U16_GET(skb->data, 14); - int renc = (priv->flags & KCOM_NETIF_F_RCPU_ENCAP) ? 1 : 0; - - bkn_rx_mark_skb_vlan_tagged(skb, vlan_proto, tci, renc); - } - } - - priv->stats.rx_packets++; - priv->stats.rx_bytes += skb->len; - skb->dev = priv->dev; - - if (knet_rx_cb != NULL) { - KNET_SKB_CB(skb)->netif_user_data = priv->cb_user_data; - KNET_SKB_CB(skb)->filter_user_data = kf->cb_user_data; - KNET_SKB_CB(skb)->meta_len = pkt_hdr_size; - KNET_SKB_CB(skb)->port = priv->port; - skb = knet_rx_cb(skb, sinfo->dev_no, rx_cb_meta); - if (skb == NULL) { - /* Consumed by call-back */ - sinfo->rx[chan].pkts_d_callback++; - priv->stats.rx_dropped++; - return -1; - } - } - - if (priv->flags & KCOM_NETIF_F_RCPU_ENCAP) { - bkn_add_rcpu_encap(sinfo, skb, meta, pkt_hdr_size); - DBG_PDMP(("After add RCPU ENCAP\n")); - bkn_dump_pkt(skb->data, pktlen + RCPU_RX_ENCAP_SIZE, - XGS_DMA_RX_CHAN); - } - skb->protocol = eth_type_trans(skb, skb->dev); - if (kf->dest_proto) { - skb->protocol = kf->dest_proto; - } - if (priv->flags & KCOM_NETIF_F_RCPU_ENCAP) { - bkn_eth_type_update(skb, ethertype); - } - DBG_DUNE(("skb protocol 0x%04x\n",skb->protocol)); - if (kf->mirror_type == KCOM_DEST_T_NETIF && kf->mirror_proto) { - skb->protocol = kf->mirror_proto; - } - - return 0; -} - -static int -bkn_skb_rx_filter_process(bkn_switch_info_t *sinfo, int chan, - struct sk_buff *skb, kcom_filter_t *kf, void *params) -{ - bkn_skb_rx_params_t *sp = (bkn_skb_rx_params_t *)params; - uint8_t *pkt = sp->pkt; - int pktlen = sp->pktlen; - int pkt_hdr_size = sp->pkt_hdr_size; - uint8_t skip_hdrlen = sp->skip_hdrlen; - uint32_t *meta = sp->meta; - uint32_t *sand_scratch_data = sp->sand_scratch_data; - bkn_desc_info_t *desc = sp->desc; - bkn_priv_t *priv; - int idx; - uint32_t *rx_cb_meta; - bkn_priv_t *mpriv; - struct sk_buff *mskb = NULL; - uint32_t *mirror_meta, *mirror_rx_cb_meta; - - DBG_FLTR(("Match filter ID %d\n", kf->id)); - switch (kf->dest_type) { - case KCOM_DEST_T_API: - DBG_FLTR(("Send to Rx API\n")); - sinfo->rx[chan].pkts_f_api++; - bkn_api_rx_copy_from_skb(sinfo, chan, desc, 0); - break; - case KCOM_DEST_T_NETIF: - priv = bkn_netif_lookup(sinfo, kf->dest_id); - if (priv) { - int ethertype; - - /* Check that software link is up */ - if (!bkn_netif_ok(priv->dev)) { - sinfo->rx[chan].pkts_d_no_link++; - break; - } - DBG_FLTR(("Send to netif %d (%s)\n", - priv->id, priv->dev->name)); - sinfo->rx[chan].pkts_f_netif++; - - if (kf->mirror_type == KCOM_DEST_T_API || dbg_pkt_enable) { - sinfo->rx[chan].pkts_m_api++; - bkn_api_rx_copy_from_skb(sinfo, chan, desc, - priv->rx_hwts); - } - - if (device_is_sand(sinfo)) { - /* CRC has been stripped on Dune */ - skb_put(skb, pktlen); - } else { - skb_put(skb, pktlen - 4); /* Strip CRC */ - } - - /* - * Unclone skb to support any skb data modification based on - * NETIF and fiter configuration - */ - if (skb_unclone(skb, GFP_ATOMIC)) { - dev_kfree_skb_any(skb); - desc->skb = NULL; - break; - } - /* Update parameters after skb is uncloned */ - if (device_is_sand(sinfo)) { - pkt = skb->data + skip_hdrlen; - meta = (uint32_t *)(skb->data + skip_hdrlen); - } else if (inband_meta(sinfo)) { - meta = (uint32_t *)(skb->data + skip_hdrlen); - } - - skb_pull(skb, (pkt_hdr_size + skip_hdrlen)); - - /* Optional SKB updates */ - KNET_SKB_CB(skb)->dcb_type = sinfo->dcb_type & 0xFFFF; - /* Do Rx timestamping */ - if (priv->rx_hwts) { - if ((bkn_hw_tstamp_rx_set(sinfo, priv->phys_port, skb, - meta)) >= 0) { - - /* Increment ptp rx counters. */ - priv->ptp_stats_rx++; - } - } - - /* Save for RCPU before stripping tag */ - ethertype = PKT_U16_GET(skb->data, 16); - if ((priv->flags & KCOM_NETIF_F_KEEP_RX_TAG) == 0) { - uint16_t vlan_proto; - - vlan_proto = PKT_U16_GET(skb->data, 12); - if (kf->flags & KCOM_FILTER_F_STRIP_TAG) { - /* Strip VLAN tag */ - if (bkn_rx_strip_skb_vlan_tag(skb, vlan_proto)) { - if (device_is_sand(sinfo)) { - /* Headers shifted left 4 bytes*/ - for (idx = pkt_hdr_size; idx >= 0; idx--) { - pkt[idx + 4] = pkt[idx]; - } - pkt += 4; - meta++; - } else if (inband_meta(sinfo)) { - for (idx = pkt_hdr_size / sizeof(uint32_t); - idx; idx--) { - meta[idx] = meta[idx - 1]; - } - meta++; - } - } - } - } - if (device_is_sand(sinfo)) { - rx_cb_meta = sand_scratch_data; - } else { - rx_cb_meta = meta; - } - - mirror_meta = meta; - mirror_rx_cb_meta = rx_cb_meta; - if (mirror_local) { - /* Clone skb before processing netif specific config. */ - if (kf->mirror_type == KCOM_DEST_T_NETIF) { - mpriv = bkn_netif_lookup(sinfo, kf->mirror_id); - /* Clone skb for mirror_to netif */ - if (mpriv && bkn_netif_ok(mpriv->dev)) { - /* Ensure metadata is copied in pskb_copy */ - skb_push(skb, pkt_hdr_size); - mskb = pskb_copy(skb, GFP_ATOMIC); - skb_pull(skb, pkt_hdr_size); - if (mskb) { - if (device_is_sand(sinfo)) { - mirror_meta = (uint32_t *)mskb->data; - } else if (inband_meta(sinfo)) { - mirror_meta = (uint32_t *)mskb->data; - mirror_rx_cb_meta = mirror_meta; - } - skb_pull(mskb, pkt_hdr_size); - } else { - sinfo->rx[chan].pkts_d_no_skb++; - } - } - } - } - - /* Process original netif specific config. */ - if (bkn_skb_rx_netif_process(sinfo, kf->dest_id, - chan, skb, kf, rx_cb_meta, - meta, pkt_hdr_size, pktlen, - ethertype)) { - desc->skb = NULL; - if (mskb) { - dev_kfree_skb_any(mskb); - } - break; - } - - if (mirror_local) { - if (mskb) { - /* Process mirror_to netif specific config. */ - if (bkn_skb_rx_netif_process(sinfo, kf->mirror_id, - chan, mskb, kf, - mirror_rx_cb_meta, mirror_meta, - pkt_hdr_size, - pktlen, ethertype)){ - dev_kfree_skb_any(skb); - desc->skb = NULL; - break; - } - } - } else { - /* - * Clone skb processed with original netif specific - * config. - */ - /* Clone skb for mirror_to netinf */ - if (kf->mirror_type == KCOM_DEST_T_NETIF) { - mpriv = bkn_netif_lookup(sinfo, kf->mirror_id); - if (mpriv && bkn_netif_ok(mpriv->dev)) { - mskb = skb_clone(skb, GFP_ATOMIC); - if (mskb == NULL) { - sinfo->rx[chan].pkts_d_no_skb++; - } else { - mpriv->stats.rx_packets++; - mpriv->stats.rx_bytes += mskb->len; - mskb->dev = mpriv->dev; - if (kf->mirror_proto) { - mskb->protocol = kf->mirror_proto; - } - } - } - } - } - if (mskb) { - /* Send up to mirror_to netif */ - sinfo->rx[chan].pkts_m_netif++; - /* - * Disable configuration API while the spinlock - * is released. - */ - sinfo->cfg_api_locked = 1; - - /* Unlock while calling up network stack */ - spin_unlock(&sinfo->lock); - if (use_napi) { - netif_receive_skb(mskb); - } else { - netif_rx(mskb); - } - spin_lock(&sinfo->lock); - /* - * Re-enable configuration API once the spinlock - * is regained. - */ - sinfo->cfg_api_locked = 0; - } - - /* Ensure that we reallocate SKB for this DCB */ - desc->skb = NULL; + vlan_proto = PKT_U16_GET(skb->data, 12); + if ((filter->kf.flags & KCOM_FILTER_F_STRIP_TAG) == 0) { /* - * Disable configuration API while the spinlock - * is released. + * Mark packet as VLAN-tagged, otherwise newer + * kernels will strip the tag. */ - sinfo->cfg_api_locked = 1; + uint16_t tci = PKT_U16_GET(skb->data, 14); - /* Unlock while calling up network stack */ - spin_unlock(&sinfo->lock); - if (use_napi) { - netif_receive_skb(skb); + if (priv->flags & KCOM_NETIF_F_RCPU_ENCAP) { + bkn_vlan_hwaccel_put_tag(skb, ETH_P_8021Q, tci); } else { - netif_rx(skb); + if (vlan_proto == ETH_P_8021AD) { + bkn_vlan_hwaccel_put_tag + (skb, ETH_P_8021AD, tci); + } else { + bkn_vlan_hwaccel_put_tag + (skb, ETH_P_8021Q, tci); + } } - spin_lock(&sinfo->lock); - /* - * Re-enable configuration API once the spinlock - * is regained. - */ - sinfo->cfg_api_locked = 0; - } else { - DBG_FLTR(("Unknown netif %d\n", kf->dest_id)); - sinfo->rx[chan].pkts_d_unkn_netif++; } - break; - default: - /* Drop packet */ - DBG_FLTR(("Unknown dest type %d\n", kf->dest_type)); - sinfo->rx[chan].pkts_d_unkn_dest++; - break; + } + + priv->stats.rx_packets++; + priv->stats.rx_bytes += skb->len; + skb->dev = priv->dev; + + if (knet_rx_cb != NULL) { + KNET_SKB_CB(skb)->netif_user_data = priv->cb_user_data; + KNET_SKB_CB(skb)->filter_user_data = filter->kf.cb_user_data; + skb = knet_rx_cb(skb, sinfo->dev_no, rx_cb_meta); + if (skb == NULL) { + /* Consumed by call-back */ + sinfo->rx[chan].pkts_d_callback++; + priv->stats.rx_dropped++; + return -1; + } + } + + if (priv->flags & KCOM_NETIF_F_RCPU_ENCAP) { + bkn_add_rcpu_encap(sinfo, skb, meta, pkt_hdr_size); + DBG_PDMP(("After add RCPU ENCAP\n")); + bkn_dump_pkt(skb->data, pktlen + RCPU_RX_ENCAP_SIZE, + XGS_DMA_RX_CHAN); + } + skb->protocol = eth_type_trans(skb, skb->dev); + if (filter->kf.dest_proto) { + skb->protocol = filter->kf.dest_proto; + } + if (priv->flags & KCOM_NETIF_F_RCPU_ENCAP) { + bkn_eth_type_update(skb, ethertype); + } + DBG_DUNE(("skb protocol 0x%04x\n",skb->protocol)); + if (filter->kf.mirror_type == KCOM_DEST_T_NETIF && + filter->kf.mirror_proto) { + skb->protocol = filter->kf.mirror_proto; } return 0; @@ -5323,8 +4682,10 @@ bkn_do_skb_rx(bkn_switch_info_t *sinfo, int chan, int budget) bkn_priv_t *priv; bkn_desc_info_t *desc; struct sk_buff *skb; + bkn_filter_t cbf; + bkn_filter_t *filter = NULL; uint32_t err_woff; - uint32_t *dcb, *meta; + uint32_t *dcb, *meta, *match_data; int pktlen, pkt_hdr_size = 0; uint8_t skip_hdrlen = 0; uint8_t eth_offset = 0; @@ -5333,8 +4694,10 @@ bkn_do_skb_rx(bkn_switch_info_t *sinfo, int chan, int budget) bkn_dune_system_header_info_t packet_info = {0}; uint32_t sand_scratch_data[BKN_SAND_SCRATCH_DATA_SIZE] = {0}; uint8_t *pkt = NULL; + bkn_priv_t *mpriv; + struct sk_buff *mskb = NULL; + uint32_t *rx_cb_meta; int metalen; - int is_err; if (!sinfo->rx[chan].running) { /* Rx not ready */ @@ -5355,8 +4718,8 @@ bkn_do_skb_rx(bkn_switch_info_t *sinfo, int chan, int budget) if ((dcb[sinfo->dcb_wsize-1] & (1 << 31)) == 0) { break; } - if ((inband_meta(sinfo) && (dcb[2] & (1 << 16)) == 0) || - (!inband_meta(sinfo) && (dcb[1] & (1 << 16)) == 0)) { + if ((((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) && (dcb[2] & (1 << 16)) == 0) || + (((sinfo->cmic_type != 'x') && (sinfo->cmic_type != 'r')) && (dcb[1] & (1 << 16)) == 0)) { sinfo->rx[chan].chain_complete = 1; /* Request one extra poll to check for chain done interrupt */ if (sinfo->napi_poll_mode) { @@ -5408,11 +4771,11 @@ bkn_do_skb_rx(bkn_switch_info_t *sinfo, int chan, int budget) pkt_hdr_size = packet_info.system_header_size; } knet_hw_tstamp_rx_pre_process_cb(sinfo->dev_no, pkt + pkt_hdr_size, - packet_info.ftmh.source_sys_port_aggregate, ð_offset); + packet_info.ftmh.source_sys_port_aggregate, (int *)ð_offset); } } } else { - if (inband_meta(sinfo)) { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { meta = (uint32_t *)skb->data; err_woff = sinfo->pkt_hdr_size / sizeof(uint32_t) - 1; meta[err_woff] = dcb[sinfo->dcb_wsize-1]; @@ -5441,43 +4804,290 @@ bkn_do_skb_rx(bkn_switch_info_t *sinfo, int chan, int budget) /* Minimun size: header_size + MACs + VLAN + ETH_TYPE */ if (pktlen > pkt_hdr_size + 18) { - bkn_rx_filter_info_t rfi; - bkn_match_rx_pkt_params_t match_params, *mp = &match_params; - bkn_skb_rx_params_t skb_params, *sp = &skb_params; - - bkn_do_rx_match_pre_process(sinfo, dcb, pkt, &pktlen, pkt_hdr_size, - skip_hdrlen, eth_offset, - &packet_info, sand_scratch_data); + if (device_is_sand(sinfo)) { + bkn_bitstream_set_field(sand_scratch_data, 0, 16, + packet_info.internal.trap_id); + bkn_bitstream_set_field(sand_scratch_data, 16, 16, + packet_info.internal.trap_qualifier); + bkn_bitstream_set_field(sand_scratch_data, 32, 17, + packet_info.ftmh.source_sys_port_aggregate); + bkn_bitstream_set_field(sand_scratch_data, 64, 2, + packet_info.ftmh.action_type); + bkn_bitstream_set_field(sand_scratch_data, 66, 18, + packet_info.internal.forward_domain); + if (force_tagged) { + uint8_t *eth_hdr = pkt + pkt_hdr_size; + uint16_t tpid = 0; + + if (skip_hdrlen > 0) { + eth_hdr += eth_offset; + } + tpid = PKT_U16_GET(eth_hdr, 12); + if (packet_is_untagged(tpid)) { + int raw_packet_len = pktlen - pkt_hdr_size; + uint32_t vid = 0; + uint32_t is_vsi = BKN_DNX_PPH_FWD_DOMAIN_IS_VSI(packet_info.internal.forward_domain); + uint32_t fwd_domain = BKN_DNX_PPH_FWD_DOMAIN_ID_GET(packet_info.internal.forward_domain); + + if ((pktlen + 4) < rx_buffer_size) { + for (idx = (raw_packet_len - 1); idx >= 12; idx--) { + eth_hdr[idx+4] = eth_hdr[idx]; + } + if (ft_vid) { + vid = ft_vid; + } + else if (is_vsi && fwd_domain) { + vid = fwd_domain & 0xfff; + } + else { + vid = 1; + } + DBG_DUNE(("add vlan tag (%d) to untagged packets\n", + vid)); + eth_hdr[12] = (ft_tpid >> 8) & 0xff; + eth_hdr[13] = ft_tpid & 0xff; + eth_hdr[14] = (((ft_pri & 0x7) << 5) | + ((ft_cfi & 0x1) << 4) | + ((vid >> 8) & 0xf)) & 0xff; + eth_hdr[15] = vid & 0xff; + /* reset packet length in DCB */ + pktlen += 4; + bkn_dump_pkt(pkt, pktlen, XGS_DMA_RX_CHAN); + dcb[sinfo->dcb_wsize-1] &= ~SOC_DCB_KNET_COUNT_MASK; + dcb[sinfo->dcb_wsize-1] |= pktlen & + SOC_DCB_KNET_COUNT_MASK; + } + } + } + } + if (device_is_sand(sinfo)) { + match_data = sand_scratch_data; + } else { + match_data = meta; + } + filter = bkn_match_rx_pkt(sinfo, skb->data + pkt_hdr_size + skip_hdrlen, + pktlen - pkt_hdr_size, match_data, + chan, &cbf); - /* Fragment or error */ - is_err = ((dcb[sinfo->dcb_wsize-1] & 0xf0000) != 0x30000) ? 1 : 0; - if (is_err) { + if ((dcb[sinfo->dcb_wsize-1] & 0xf0000) != 0x30000) { + /* Fragment or error */ priv->stats.rx_errors++; + if (filter && filter->kf.mask.w[err_woff] == 0) { + /* Drop unless DCB status is part of filter */ + filter = NULL; + } } + } + DBG_PKT(("Rx packet (%d bytes).\n", pktlen)); + if (filter) { + DBG_FLTR(("Match filter ID %d\n", filter->kf.id)); + switch (filter->kf.dest_type) { + case KCOM_DEST_T_API: + DBG_FLTR(("Send to Rx API\n")); + sinfo->rx[chan].pkts_f_api++; + bkn_api_rx_copy_from_skb(sinfo, chan, desc, 0); + break; + case KCOM_DEST_T_NETIF: + priv = bkn_netif_lookup(sinfo, filter->kf.dest_id); + if (priv) { + int ethertype; + + /* Check that software link is up */ + if (!bkn_netif_ok(priv->dev)) { + sinfo->rx[chan].pkts_d_no_link++; + break; + } + DBG_FLTR(("Send to netif %d (%s)\n", + priv->id, priv->dev->name)); + sinfo->rx[chan].pkts_f_netif++; + + if ((filter->kf.mirror_type == KCOM_DEST_T_API) || + dbg_pkt_enable) { + sinfo->rx[chan].pkts_m_api++; + bkn_api_rx_copy_from_skb(sinfo, chan, desc, + priv->rx_hwts); + } + + if (device_is_sand(sinfo)) { + /* CRC has been stripped on Dune*/ + skb_put(skb, pktlen); + } else { + skb_put(skb, pktlen - 4); /* Strip CRC */ + } + + skb_pull(skb, (pkt_hdr_size + skip_hdrlen)); + + /* Optional SKB updates */ + KNET_SKB_CB(skb)->dcb_type = sinfo->dcb_type & 0xFFFF; + /* Do Rx timestamping */ + if (priv->rx_hwts) { + if ((bkn_hw_tstamp_rx_set(sinfo, priv->phys_port, skb, + meta)) >= 0) { + + /* Increment ptp rx counters. */ + priv->ptp_stats_rx++; + } + } + + /* Save for RCPU before stripping tag */ + ethertype = PKT_U16_GET(skb->data, 16); + if ((priv->flags & KCOM_NETIF_F_KEEP_RX_TAG) == 0) { + uint16_t vlan_proto; + + vlan_proto = PKT_U16_GET(skb->data, 12); + if (filter->kf.flags & KCOM_FILTER_F_STRIP_TAG) { + /* Strip VLAN tag */ + if (vlan_proto == ETH_P_8021Q || + vlan_proto == ETH_P_8021AD) { + DBG_FLTR(("Strip VLAN tag\n")); + ((u32*)skb->data)[3] = ((u32*)skb->data)[2]; + ((u32*)skb->data)[2] = ((u32*)skb->data)[1]; + ((u32*)skb->data)[1] = ((u32*)skb->data)[0]; + skb_pull(skb, 4); + if (device_is_sand(sinfo)) { + /* Headers shifted left 4 bytes*/ + for (idx = pkt_hdr_size; idx >= 0; idx--) { + pkt[idx + 4] = pkt[idx]; + } + pkt += 4; + meta++; + } else if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { + for (idx = pkt_hdr_size / sizeof(uint32_t); + idx; idx--) { + meta[idx] = meta[idx - 1]; + } + meta++; + } + } + } + } + if (device_is_sand(sinfo)) { + rx_cb_meta = sand_scratch_data; + } else { + rx_cb_meta = meta; + } + + if (mirror_local) { + /* Clone skb before processing netif specific config. */ + if (filter->kf.mirror_type == KCOM_DEST_T_NETIF) { + mpriv = bkn_netif_lookup(sinfo, filter->kf.mirror_id); + /* Clone skb for mirror_to netinf */ + if (mpriv && bkn_netif_ok(mpriv->dev)) { + mskb = skb_clone(skb, GFP_ATOMIC); + if (mskb == NULL) { + sinfo->rx[chan].pkts_d_no_skb++; + } + } + } + } - mp->pkt = skb->data + pkt_hdr_size + skip_hdrlen; - mp->pktlen = pktlen - pkt_hdr_size; - mp->meta = device_is_sand(sinfo) ? sand_scratch_data : meta; - mp->is_err = is_err; - mp->err_woff = err_woff; + /* Process original netif specific config. */ + if (bkn_skb_rx_netif_process(sinfo, filter->kf.dest_id, + chan, skb, filter, rx_cb_meta, + meta, pkt_hdr_size, pktlen, + ethertype)) { + desc->skb = NULL; + break; + } - sp->pkt = pkt; - sp->pktlen = pktlen; - sp->pkt_hdr_size = pkt_hdr_size; - sp->skip_hdrlen = skip_hdrlen; - sp->meta = meta; - sp->sand_scratch_data = sand_scratch_data; - sp->desc = desc; + if (mirror_local) { + if (mskb) { + /* Process mirorr_to netif specific config. */ + if (bkn_skb_rx_netif_process(sinfo, + filter->kf.mirror_id, + chan, mskb, filter, + rx_cb_meta, meta, + pkt_hdr_size, + pktlen, ethertype)){ + desc->skb = NULL; + break; + } + } + } else { + /* + * Clone skb processed with original netif specific + * config. + */ + /* Clone skb for mirror_to netinf */ + if (filter->kf.mirror_type == KCOM_DEST_T_NETIF) { + mpriv = bkn_netif_lookup(sinfo, filter->kf.mirror_id); + if (mpriv && bkn_netif_ok(mpriv->dev)) { + mskb = skb_clone(skb, GFP_ATOMIC); + if (mskb == NULL) { + sinfo->rx[chan].pkts_d_no_skb++; + } else { + mpriv->stats.rx_packets++; + mpriv->stats.rx_bytes += mskb->len; + mskb->dev = mpriv->dev; + if (filter->kf.mirror_proto) { + mskb->protocol = filter->kf.mirror_proto; + } + } + } + } + } + if (mskb) { + /* Send up to mirror_to netif */ + sinfo->rx[chan].pkts_m_netif++; + /* + * Disable configuration API while the spinlock + * is released. + */ + sinfo->cfg_api_locked = 1; + + /* Unlock while calling up network stack */ + spin_unlock(&sinfo->lock); + if (use_napi) { + netif_receive_skb(mskb); + } else { + netif_rx(mskb); + } + spin_lock(&sinfo->lock); + /* + * Re-enable configuration API once the spinlock + * is regained. + */ + sinfo->cfg_api_locked = 0; + } - rfi.match_params = mp; - rfi.process_params = (void *)sp; - rfi.process_fn = bkn_skb_rx_filter_process; + /* Ensure that we reallocate SKB for this DCB */ + desc->skb = NULL; + /* + * Disable configuration API while the spinlock + * is released. + */ + sinfo->cfg_api_locked = 1; - if (!bkn_do_rx_filter(sinfo, chan, desc, &rfi)) { - DBG_PKT(("Rx packet dropped.\n")); - sinfo->rx[chan].pkts_d_no_match++; - priv->stats.rx_dropped++; + /* Unlock while calling up network stack */ + spin_unlock(&sinfo->lock); + if (use_napi) { + netif_receive_skb(skb); + } else { + netif_rx(skb); + } + spin_lock(&sinfo->lock); + /* + * Re-enable configuration API once the spinlock + * is regained. + */ + sinfo->cfg_api_locked = 0; + } else { + DBG_FLTR(("Unknown netif %d\n", + filter->kf.dest_id)); + sinfo->rx[chan].pkts_d_unkn_netif++; + } + break; + default: + /* Drop packet */ + DBG_FLTR(("Unknown dest type %d\n", + filter->kf.dest_type)); + sinfo->rx[chan].pkts_d_unkn_dest++; + break; } + } else { + DBG_PKT(("Rx packet dropped.\n")); + sinfo->rx[chan].pkts_d_no_match++; + priv->stats.rx_dropped++; } dcb[sinfo->dcb_wsize-1] &= ~(1 << 31); if (++sinfo->rx[chan].dirty >= MAX_RX_DCBS) { @@ -5532,7 +5142,7 @@ bkn_rx_debug_dump(bkn_switch_info_t *sinfo, int chan) (unsigned long)sinfo->rx[chan].desc[0].dcb_dma); for (cnt = 0; cnt < MAX_RX_DCBS; cnt++) { dcb = sinfo->rx[chan].desc[cnt].dcb_mem; - if (inband_meta(sinfo)) { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { gprintk(" DCB %2d: 0x%08x 0x%08x 0x%08x 0x%08x\n", cnt, dcb[0], dcb[1], dcb[2], dcb[sinfo->dcb_wsize-1]); } else { @@ -5547,7 +5157,7 @@ bkn_rx_debug_dump(bkn_switch_info_t *sinfo, int chan) gprintk(" [0x%08lx]--->\n", (unsigned long)dcb_chain->dcb_dma); for (cnt = 0; cnt < dcb_chain->dcb_cnt; cnt++) { dcb = &dcb_chain->dcb_mem[sinfo->dcb_wsize * cnt]; - if (inband_meta(sinfo)) { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { gprintk(" DCB %2d: 0x%08x 0x%08x 0x%08x 0x%08x\n", cnt, dcb[0], dcb[1], dcb[2], dcb[sinfo->dcb_wsize-1]); } else { @@ -5730,7 +5340,7 @@ bkn_hw_tstamp_tx_set(bkn_switch_info_t *sinfo, struct sk_buff *skb) int hwts; int port; uint64_t ts = 0; - uint32_t hdrlen = inband_meta(sinfo) ? PKT_TX_HDR_SIZE : 0; + uint32_t hdrlen = ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) ? PKT_TX_HDR_SIZE : 0; struct skb_shared_hwtstamps shhwtstamps; if (!knet_hw_tstamp_tx_time_get_cb) { @@ -5741,7 +5351,8 @@ bkn_hw_tstamp_tx_set(bkn_switch_info_t *sinfo, struct sk_buff *skb) hwts = KNET_SKB_CB(skb)->hwts; ts = KNET_SKB_CB(skb)->ts; - if (sinfo->dcb_type == 39) { + if (device_is_dnx(sinfo)) { + port = port + 1; if (knet_hw_tstamp_tx_time_get_cb(sinfo->dev_no, port, skb->data + hdrlen, &ts, hwts) < 0) { DBG_VERB(("Error in setting tx tstsamp \n")); return -1; @@ -5895,7 +5506,7 @@ bkn_tx_cdma_chain_switch(bkn_switch_info_t *sinfo) dcb_mem = sinfo->tx.desc[sinfo->tx.cur].dcb_mem; memset(dcb_mem, 0, sinfo->dcb_wsize * sizeof(uint32_t)); dcb_mem[0] = dcb_chain->dcb_dma; - if (inband_meta(sinfo)) { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { dcb_mem[1] = DMA_TO_BUS_HI(dcb_chain->dcb_dma >> 32); dcb_mem[2] |= 1 << 24 | 1 << 18 | 1 << 16; } else { @@ -5915,7 +5526,7 @@ bkn_tx_cdma_chain_switch(bkn_switch_info_t *sinfo) woffset = (dcb_chain->dcb_cnt - 1) * sinfo->dcb_wsize; dcb_mem = &dcb_chain->dcb_mem[woffset]; dcb_mem[0] = sinfo->tx.desc[sinfo->tx.dirty].dcb_dma; - if (inband_meta(sinfo)) { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { dcb_mem[1] = DMA_TO_BUS_HI(sinfo->tx.desc[sinfo->tx.dirty].dcb_dma >> 32); } dcb_dma = sinfo->tx.desc[sinfo->tx.cur].dcb_dma; @@ -5955,14 +5566,14 @@ bkn_api_tx(bkn_switch_info_t *sinfo) if (CDMA_CH(sinfo, XGS_DMA_TX_CHAN) && i == dcb_chain->dcb_cnt - 1) { break; } - if (inband_meta(sinfo)) { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { pkt_dma = BUS_TO_DMA_HI(dcb_chain->dcb_mem[sinfo->dcb_wsize * i + 1]); pkt_dma = pkt_dma << 32 | dcb_chain->dcb_mem[sinfo->dcb_wsize * i]; } else { pkt_dma = dcb_chain->dcb_mem[sinfo->dcb_wsize * i]; } pktdata = kernel_bde->p2l(sinfo->dev_no, pkt_dma); - if (inband_meta(sinfo)) { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { pktlen = dcb_chain->dcb_mem[sinfo->dcb_wsize * i + 2] & 0xffff; } else { pktlen = dcb_chain->dcb_mem[sinfo->dcb_wsize * i + 1] & 0xffff; @@ -6094,7 +5705,7 @@ bkn_tx_chain_done(bkn_switch_info_t *sinfo, int done) pending = MAX_TX_DCBS - sinfo->tx.free; idx = sinfo->tx.dirty; while (--pending && idx < (MAX_TX_DCBS - 1)) { - if (inband_meta(sinfo)) { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { sinfo->tx.desc[idx++].dcb_mem[2] |= 1 << 16; } else { sinfo->tx.desc[idx++].dcb_mem[1] |= 1 << 16; @@ -6612,7 +6223,7 @@ xgsr_isr(bkn_switch_info_t *sinfo) } /* Bypass chain_done from Abort */ - if (sinfo->dcb_type == 39) { + if (device_is_dnx(sinfo)) { uint32_t ctrl = 0; uint32_t intr_stat = 0; int chan = 0; @@ -7033,7 +6644,7 @@ bkn_hw_tstamp_tx_config(bkn_switch_info_t *sinfo, return 0; } - if (!md && (sinfo->dcb_type != 39)) { + if (!md && !device_is_dnx(sinfo)) { return -1; } @@ -7090,7 +6701,7 @@ bkn_tx(struct sk_buff *skb, struct net_device *dev) return 0; } - if ((sinfo->dcb_type == 39) && (skb->len == 0)) { + if (device_is_dnx(sinfo) && (skb->len == 0)) { priv->stats.tx_dropped++; dev_kfree_skb_any(skb); return 0; @@ -7119,7 +6730,7 @@ bkn_tx(struct sk_buff *skb, struct net_device *dev) /* Account for extra OAM-TS header. */ if ((bkn_skb_tx_flags(skb) & SKBTX_HW_TSTAMP) && (hdrlen > (BKN_DNX_PTCH_2_SIZE))) { - if (sinfo->dcb_type == 39) { + if (device_is_dnx(sinfo)) { if (knet_hw_tstamp_ptp_transport_get_cb != NULL) { ptp_transport = knet_hw_tstamp_ptp_transport_get_cb(skb->data); switch(ptp_transport) { @@ -7127,15 +6738,8 @@ bkn_tx(struct sk_buff *skb, struct net_device *dev) /* T_LOCAL_PORT intf will use Module Hdr + PTCH + ITMH + ASE1588 + TSH + INTERNAL_HDR + UDH base */ - - if (hdrlen > 23) { - /* Module Hdr + PTCH + ITMH + PPH + UDH */ - hdrlen += (BKN_DNX_FTMH_APP_SPECIFIC_EXT_SIZE + BKN_DNX_TSH_SIZE); - } else { - /* Module Hdr + PTCH + ITMH */ - hdrlen += (BKN_DNX_FTMH_APP_SPECIFIC_EXT_SIZE + BKN_DNX_TSH_SIZE + - BKN_DNX_INTERNAL_BASE_TYPE_12 + BKN_DNX_UDH_BASE_SIZE); - } + hdrlen += (BKN_DNX_FTMH_APP_SPECIFIC_EXT_SIZE + BKN_DNX_TSH_SIZE + + BKN_DNX_INTERNAL_BASE_TYPE_12 + BKN_DNX_UDH_BASE_SIZE); break; case 4: /* UDP IPv4 */ case 2: /* IEEE 802.3 */ @@ -7152,9 +6756,8 @@ bkn_tx(struct sk_buff *skb, struct net_device *dev) } else { - hdrlen = inband_meta(sinfo) ? PKT_TX_HDR_SIZE : 0; + hdrlen = ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) ? PKT_TX_HDR_SIZE : 0; } - rcpulen = 0; sop = 0; @@ -7183,8 +6786,8 @@ bkn_tx(struct sk_buff *skb, struct net_device *dev) sop = 0; /* Get CPU channel from RCPU.cpu_channel */ cpu_channel = skb->data[29]; - /* System headers are supposed to be set by users in RCPU mode. RCPU.meta_len */ - hdrlen = skb->data[28]; + /* System headers are supposed to be set by users in RCPU mode. */ + hdrlen = 0; } else if (skb->data[21] & RCPU_F_MODHDR) { sop = skb->data[RCPU_HDR_SIZE]; switch (sop) { @@ -7201,7 +6804,7 @@ bkn_tx(struct sk_buff *skb, struct net_device *dev) spin_unlock_irqrestore(&sinfo->lock, flags); return 0; } - if (!DEV_IS_CMICX(sinfo)) { + if (sinfo->cmic_type != 'x') { if (skb->len < (rcpulen + RCPU_TX_META_SIZE + 14)) { DBG_WARN(("Tx drop: Invalid RCPU encapsulation\n")); priv->stats.tx_dropped++; @@ -7224,11 +6827,6 @@ bkn_tx(struct sk_buff *skb, struct net_device *dev) * There should be Module Header + PTCH_2 + [ITMH] on JR2, * PTCH_2 +[ITMH] on JR1 */ - /* Remove rcpulen from buffer. */ - skb_pull(skb, rcpulen); - pktdata = skb->data; - pktlen = skb->len; - rcpulen = 0; } else { hdrlen = 0; tpid = PKT_U16_GET(pktdata, 12); @@ -7283,8 +6881,8 @@ bkn_tx(struct sk_buff *skb, struct net_device *dev) } } } else { - if ((inband_meta(sinfo) && priv->port >= 0) || - device_is_sand(sinfo)) { + if ((((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) && (priv->port >= 0)) + || device_is_sand(sinfo)) { if (skb_header_cloned(skb) || skb_headroom(skb) < hdrlen + 4) { /* Current SKB cannot be modified */ DBG_SKB(("Realloc Tx SKB\n")); @@ -7397,11 +6995,11 @@ bkn_tx(struct sk_buff *skb, struct net_device *dev) } dcb = desc->dcb_mem; - meta = inband_meta(sinfo) ? (uint32_t *)pktdata : dcb; + meta = ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) ? (uint32_t *)pktdata : dcb; memset(dcb, 0, sinfo->dcb_wsize * sizeof(uint32_t)); if (priv->flags & KCOM_NETIF_F_RCPU_ENCAP) { if (device_is_sand(sinfo)) { - if (inband_meta(sinfo)) { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { dcb[2] |= 1 << 19; /* Given Module Header exists and set first byte to be CPU channel */ pktdata[0] = cpu_channel; @@ -7413,7 +7011,7 @@ bkn_tx(struct sk_buff *skb, struct net_device *dev) } else if (sop != 0) { /* If module header SOP is non-zero, use RCPU meta data */ - if (inband_meta(sinfo)) { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { dcb[2] |= 1 << 19; } else { metalen = (sinfo->dcb_wsize - 3) * sizeof(uint32_t); @@ -7429,11 +7027,8 @@ bkn_tx(struct sk_buff *skb, struct net_device *dev) } } else if (priv->port >= 0) { /* Send to physical port */ - if (inband_meta(sinfo)) { - if (!device_is_dnxf(sinfo)) - { - dcb[2] |= 1 << 19; - } + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { + dcb[2] |= 1 << 19; } else { dcb[1] |= 1 << 19; } @@ -7451,7 +7046,7 @@ bkn_tx(struct sk_buff *skb, struct net_device *dev) case 34: case 37: case 40: - if (inband_meta(sinfo)) { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { meta[0] = htonl(0x81000000); meta[1] = htonl(priv->port); meta[2] = htonl(0x00040000 | (priv->qnum & 0x7) << 24); @@ -7505,7 +7100,7 @@ bkn_tx(struct sk_buff *skb, struct net_device *dev) dcb[4] |= (priv->qnum & 0x3fff) << 8; break; case 36: - if (inband_meta(sinfo)) { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { meta[0] = htonl(0x81000000); meta[1] = htonl(priv->port); meta[2] = htonl(0x00008000 | (priv->qnum & 0x3f) << 9); @@ -7517,7 +7112,7 @@ bkn_tx(struct sk_buff *skb, struct net_device *dev) } break; case 38: - if (inband_meta(sinfo)) { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { meta[0] = htonl(0x81000000); meta[1] = htonl(priv->port); meta[2] = htonl(0x00004000 | (priv->qnum & 0x3f) << 8); @@ -7541,7 +7136,7 @@ bkn_tx(struct sk_buff *skb, struct net_device *dev) } break; case 41: - if (inband_meta(sinfo)) { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { meta[0] = htonl(0x81000000); meta[1] = htonl((priv->port) << 4); meta[2] = htonl(0x00400000 | (priv->qnum & 0x3fff) << 8); @@ -7564,8 +7159,6 @@ bkn_tx(struct sk_buff *skb, struct net_device *dev) if (knet_tx_cb != NULL) { KNET_SKB_CB(skb)->netif_user_data = priv->cb_user_data; KNET_SKB_CB(skb)->dcb_type = sinfo->dcb_type & 0xFFFF; - KNET_SKB_CB(skb)->meta_len = hdrlen & 0xFF; - KNET_SKB_CB(skb)->port = priv->port; skb = knet_tx_cb(skb, sinfo->dev_no, meta); if (skb == NULL) { /* Consumed by call-back */ @@ -7593,7 +7186,7 @@ bkn_tx(struct sk_buff *skb, struct net_device *dev) DBG_SKB(("Packet padded to %d bytes after tx callback\n", pktlen)); } pktdata = skb->data; - if (inband_meta(sinfo)) { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { meta = (uint32_t *)pktdata; } } else { @@ -7658,7 +7251,7 @@ bkn_tx(struct sk_buff *skb, struct net_device *dev) return 0; } dcb[0] = desc->skb_dma; - if (inband_meta(sinfo)) { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { dcb[1] = DMA_TO_BUS_HI(desc->skb_dma >> 32); dcb[2] &= ~SOC_DCB_KNET_COUNT_MASK; dcb[2] |= pktlen; @@ -7674,7 +7267,7 @@ bkn_tx(struct sk_buff *skb, struct net_device *dev) bkn_dump_pkt(pktdata, pktlen, XGS_DMA_TX_CHAN); if (CDMA_CH(sinfo, XGS_DMA_TX_CHAN)) { - if (inband_meta(sinfo)) { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { dcb[2] |= 1 << 24 | 1 << 16; } else { dcb[1] |= 1 << 24 | 1 << 16; @@ -7833,9 +7426,9 @@ bkn_rxtick_func(bkn_switch_info_t *sinfo) } } - add_timer(&sinfo->rxtick); - spin_unlock_irqrestore(&sinfo->lock, flags); + + add_timer(&sinfo->rxtick); } #if (LINUX_VERSION_CODE < KERNEL_VERSION(4,15,0)) @@ -8546,7 +8139,7 @@ bkn_seq_dma_next(struct seq_file *s, void *v, loff_t *pos) void *rv = iter; if (bkn_seq_dma_next_pos(iter, 1) < 0) { - rv = NULL; + return NULL; } (*pos)++; return rv; @@ -8590,7 +8183,7 @@ bkn_seq_dma_show(struct seq_file *s, void *v) seq_printf(s, " [0x%08lx]--->\n", (unsigned long)dcb_chain->dcb_dma); for (cnt = 0; cnt < dcb_chain->dcb_cnt; cnt++) { dcb = &dcb_chain->dcb_mem[sinfo->dcb_wsize * cnt]; - if (inband_meta(sinfo)) { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { seq_printf(s, " DCB %2d: 0x%08x 0x%08x 0x%08x 0x%08x\n", cnt, dcb[0], dcb[1], dcb[2], dcb[sinfo->dcb_wsize-1]); } else { @@ -8670,7 +8263,7 @@ bkn_seq_dma_show(struct seq_file *s, void *v) seq_printf(s, " [0x%08lx]--->\n", (unsigned long)dcb_chain->dcb_dma); for (cnt = 0; cnt < dcb_chain->dcb_cnt; cnt++) { dcb = &dcb_chain->dcb_mem[sinfo->dcb_wsize * cnt]; - if (inband_meta(sinfo)) { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { seq_printf(s, " DCB %2d: 0x%08x 0x%08x 0x%08x 0x%08x\n", cnt, dcb[0], dcb[1], dcb[2], dcb[sinfo->dcb_wsize-1]); } else { @@ -8691,7 +8284,7 @@ bkn_seq_dma_show(struct seq_file *s, void *v) } } if (dcb) { - if (inband_meta(sinfo)) { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { seq_printf(s, " DCB %2d: 0x%08x 0x%08x 0x%08x 0x%08x\n", iter->idx, dcb[0], dcb[1], dcb[2], dcb[sinfo->dcb_wsize-1]); } else { @@ -8835,23 +8428,14 @@ bkn_proc_debug_show(struct seq_file *m, void *v) seq_printf(m, " napi_poll_mode: %d\n", sinfo->napi_poll_mode); seq_printf(m, " inst_id: 0x%x\n", sinfo->inst_id); seq_printf(m, " evt_queue: %d\n", sinfo->evt_idx); - seq_printf(m, " device_id: 0x%x\n", sinfo->base_id); - seq_printf(m, " pcie_status: %d\n", sinfo->pcie_link_status); - seq_printf(m, " oamp_port_num: %d {%d, %d, %d, %d}\n", sinfo->oamp_port_number, sinfo->oamp_ports[0], sinfo->oamp_ports[1], sinfo->oamp_ports[2], sinfo->oamp_ports[3]); - seq_printf(m, " udh_enable: %d\n", sinfo->udh_enable); - seq_printf(m, " udh_size: %d\n", sinfo->udh_size); - seq_printf(m, " oamp_punt: %d\n", sinfo->oamp_punt); - seq_printf(m, " tod_exist: %d\n", sinfo->oam_dm_tod_exist); - seq_printf(m, " sys_hdr_mode: %d\n", sinfo->system_headers_mode); - seq_printf(m, " upmep_trap_id1: %d\n", sinfo->up_mep_ingress_cpu_trap_id1); - seq_printf(m, " upmep_trap_id2: %d\n", sinfo->up_mep_ingress_cpu_trap_id2); - seq_printf(m, " spa_mode: %d\n", sinfo->spa_mode); + seq_printf(m, " device_id: 0x%x\n", sinfo->base_id); + seq_printf(m, " pcie_status: %d\n", sinfo->pcie_link_status); unit++; } @@ -9334,7 +8918,6 @@ bkn_proc_ndev_show(struct seq_file *m, void *v) seq_printf(m, " flags = 0x%x %s\n", priv->flags, priv->flags & KCOM_NETIF_F_USE_SHARED_NDEV ? "(shared)" : ""); seq_printf(m, " ref_count = %d\n", priv->ref_count); - seq_printf(m, " cb_user_data = 0x%x\n", priv->cb_user_data); seq_printf(m, " System Header (%dB): 0x", priv->system_headers_size); for (idx = 0; idx < priv->system_headers_size; idx++) { seq_printf(m, "%02x", priv->system_headers[idx]); @@ -9484,7 +9067,7 @@ bkn_knet_dma_info(kcom_msg_dma_info_t *kmsg, int len) /* Handle for Continuous DMA mode */ if (CDMA_CH(sinfo, XGS_DMA_TX_CHAN)) { woffset = (dcb_chain->dcb_cnt - 1) * sinfo->dcb_wsize + 1; - if (inband_meta(sinfo)) { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { woffset += 1; } if ((dcb_chain->dcb_mem[woffset] & ((1 << 18) | (1 << 16))) != 0x50000) { @@ -9500,7 +9083,7 @@ bkn_knet_dma_info(kcom_msg_dma_info_t *kmsg, int len) /* Stitch this chain */ woffset = (dcb_chain_end->dcb_cnt - 1) * sinfo->dcb_wsize; dcb_chain_end->dcb_mem[woffset] = dcb_chain->dcb_dma; - if (inband_meta(sinfo)) { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { dcb_chain_end->dcb_mem[woffset + 1] = DMA_TO_BUS_HI(dcb_chain->dcb_dma >> 32); } MEMORY_BARRIER; @@ -9539,7 +9122,7 @@ bkn_knet_dma_info(kcom_msg_dma_info_t *kmsg, int len) /* Handle for Continuous DMA mode */ if (CDMA_CH(sinfo, XGS_DMA_RX_CHAN + chan)) { woffset = (dcb_chain->dcb_cnt - 1) * sinfo->dcb_wsize + 1; - if (inband_meta(sinfo)) { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { woffset += 1; } if ((dcb_chain->dcb_mem[woffset] & ((1 << 18) | (1 << 16))) != 0x50000) { @@ -9555,7 +9138,7 @@ bkn_knet_dma_info(kcom_msg_dma_info_t *kmsg, int len) /* Stitch this chain */ woffset = (dcb_chain_end->dcb_cnt - 1) * sinfo->dcb_wsize; dcb_chain_end->dcb_mem[woffset] = dcb_chain->dcb_dma; - if (inband_meta(sinfo)) { + if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { dcb_chain_end->dcb_mem[woffset + 1] = DMA_TO_BUS_HI(dcb_chain->dcb_dma >> 32); } MEMORY_BARRIER; @@ -9822,25 +9405,12 @@ bkn_knet_hw_init(kcom_msg_hw_init_t *kmsg, int len) return sizeof(kcom_msg_hdr_t); } - if (kmsg->cmic_type == 'x') { - if (kmsg->dcb_size < CMICX_DCB_SIZE_MIN) { - kmsg->hdr.status = KCOM_E_PARAM; - return sizeof(kcom_msg_hdr_t); - } else if (kmsg->dcb_type != 39 && - kmsg->pkt_hdr_size < CMICX_PKT_HDR_SIZE_MIN) { - kmsg->hdr.status = KCOM_E_PARAM; - return sizeof(kcom_msg_hdr_t); - } - } else if (kmsg->cmic_type == 'r') { - if (kmsg->dcb_size < CMICR_DCB_SIZE_MIN) { - kmsg->hdr.status = KCOM_E_PARAM; - return sizeof(kcom_msg_hdr_t); - } - } else { - if (kmsg->dcb_size < DCB_SIZE_MIN) { - kmsg->hdr.status = KCOM_E_PARAM; - return sizeof(kcom_msg_hdr_t); - } + if ((kmsg->cmic_type == 'r' && kmsg->dcb_size < CMICR_DCB_SIZE_MIN) || + (kmsg->cmic_type == 'x' && kmsg->dcb_size < CMICX_DCB_SIZE_MIN) || + ((kmsg->cmic_type != 'x' && kmsg->cmic_type != 'r') && kmsg->dcb_size < DCB_SIZE_MIN) || + (kmsg->dcb_type != 39 && kmsg->cmic_type == 'x' && kmsg->pkt_hdr_size < CMICX_PKT_HDR_SIZE_MIN)) { + kmsg->hdr.status = KCOM_E_PARAM; + return sizeof(kcom_msg_hdr_t); } cfg_api_lock(sinfo, &flags); @@ -9850,15 +9420,7 @@ bkn_knet_hw_init(kcom_msg_hw_init_t *kmsg, int len) sinfo->dcb_wsize = BYTES2WORDS(kmsg->dcb_size); sinfo->pkt_hdr_size = kmsg->pkt_hdr_size; sinfo->dma_hi = kmsg->dma_hi; - sinfo->rx_chans = NUM_CMICM_RX_CHAN; - sinfo->inband_meta = 0; - if (DEV_IS_CMICX(sinfo)) { - sinfo->rx_chans = NUM_CMICX_RX_CHAN; - sinfo->inband_meta = 1; - } else if (DEV_IS_CMICR(sinfo)) { - sinfo->rx_chans = NUM_CMICR_RX_CHAN; - sinfo->inband_meta = 1; - } + sinfo->rx_chans = sinfo->cmic_type == 'r' ? NUM_CMICR_RX_CHAN : (sinfo->cmic_type == 'x' ? NUM_CMICX_RX_CHAN : NUM_CMICM_RX_CHAN); if (sinfo->rx_chans > NUM_RX_CHAN) { sinfo->rx_chans = NUM_RX_CHAN; } @@ -9876,7 +9438,7 @@ bkn_knet_hw_init(kcom_msg_hw_init_t *kmsg, int len) /* Ensure 32-bit PCI DMA is mapped properly on 64-bit platforms */ dev_type = kernel_bde->get_dev_type(sinfo->dev_no); - if ((dev_type & BDE_PCI_DEV_TYPE) && !inband_meta(sinfo)) { + if (dev_type & BDE_PCI_DEV_TYPE && (sinfo->cmic_type != 'x' && sinfo->cmic_type != 'r')) { if (dma_set_mask(&sinfo->pdev->dev, DMA_BIT_MASK(32))) { cfg_api_unlock(sinfo, &flags); gprintk("No suitable DMA available for SKBs\n"); @@ -9974,16 +9536,11 @@ bkn_knet_hw_info(kcom_msg_hw_info_t *kmsg, int len) } sinfo->udh_size = kmsg->udh_size; sinfo->oamp_punt = kmsg->oamp_punted; - sinfo->jr_mode_udh_size_compensation = kmsg->jr_mode_udh_size_compensation; - sinfo->jr_mode_add_udh_base = kmsg->jr_mode_add_udh_base; sinfo->enet_channels = kmsg->enet_channels; sinfo->no_skip_udh_check = kmsg->no_skip_udh_check; sinfo->oam_dm_tod_exist = kmsg->oam_dm_tod_exist; sinfo->system_headers_mode = kmsg->system_headers_mode; sinfo->udh_enable = kmsg->udh_enable; - sinfo->up_mep_ingress_cpu_trap_id1 = kmsg->up_mep_ingress_cpu_trap_id1; - sinfo->up_mep_ingress_cpu_trap_id2 = kmsg->up_mep_ingress_cpu_trap_id2; - sinfo->spa_mode = kmsg->spa_mode; if (kmsg->oamp_info.oamp_port_number > KCOM_HW_INFO_OAMP_PORT_MAX) { @@ -10439,109 +9996,6 @@ bkn_knet_netif_get(kcom_msg_netif_get_t *kmsg, int len) return sizeof(*kmsg); } -static int -bkn_knet_netif_replace(kcom_msg_netif_create_t *kmsg, int len) -{ - bkn_switch_info_t *sinfo; - struct net_device *dev; - struct list_head *list; - bkn_priv_t *priv; - unsigned long flags; - uint8_t *ma; - bkn_netif_cb_t *netif_create_cb; - - kmsg->hdr.type = KCOM_MSG_TYPE_RSP; - - switch (kmsg->netif.type) { - case KCOM_NETIF_T_VLAN: - case KCOM_NETIF_T_PORT: - case KCOM_NETIF_T_META: - break; - default: - kmsg->hdr.status = KCOM_E_PARAM; - return sizeof(kcom_msg_hdr_t); - } - sinfo = bkn_sinfo_from_unit(kmsg->hdr.unit); - if (sinfo == NULL) { - kmsg->hdr.status = KCOM_E_PARAM; - return sizeof(kcom_msg_hdr_t); - } - if (device_is_sand(sinfo) && - kmsg->netif.system_headers_size > KCOM_NETIF_SYSTEM_HEADERS_SIZE_MAX) { - DBG_WARN(("The system_headers_size %d is beyond the maximum size %d. \n", - kmsg->netif.system_headers_size, - KCOM_NETIF_SYSTEM_HEADERS_SIZE_MAX)); - kmsg->hdr.status = KCOM_E_PARAM; - return sizeof(kcom_msg_hdr_t); - } - - ma = kmsg->netif.macaddr; - if ((ma[0] | ma[1] | ma[2] | ma[3] | ma[4] | ma[5]) == 0) { - bkn_dev_mac[5]++; - ma = bkn_dev_mac; - } - - spin_lock_irqsave(&sinfo->lock, flags); - priv = bkn_netif_lookup(sinfo, kmsg->netif.id); - if (priv == NULL) { - spin_unlock_irqrestore(&sinfo->lock, flags); - kmsg->hdr.status = KCOM_E_NOT_FOUND; - return sizeof(kcom_msg_hdr_t); - } - spin_unlock_irqrestore(&sinfo->lock, flags); - - /* Update netif */ - if ((kmsg->netif.flags & KCOM_NETIF_F_USE_SHARED_NDEV)!= KCOM_NETIF_F_USE_SHARED_NDEV) { - /* Verify that the name, mac address and id are consistent */ - if ((dev = bkn_lookup_ndev(ma, kmsg->netif.name)) == NULL) { - kmsg->hdr.status = KCOM_E_NOT_FOUND; - return sizeof(kcom_msg_hdr_t); - } - - priv->type = kmsg->netif.type; - priv->vlan = kmsg->netif.vlan; - /* System headers are prepared at BCM API for Dune headers */ - if (device_is_sand(sinfo)) { - int idx = 0; - priv->system_headers_size = kmsg->netif.system_headers_size; - for (idx = 0; idx < KCOM_NETIF_SYSTEM_HEADERS_SIZE_MAX; idx++) - { - priv->system_headers[idx] = kmsg->netif.system_headers[idx]; - } - } - if (priv->type == KCOM_NETIF_T_PORT) { - priv->port = kmsg->netif.port; - priv->phys_port = kmsg->netif.phys_port; - priv->qnum = kmsg->netif.qnum; - } else { - if (device_is_sand(sinfo) && (priv->type == KCOM_NETIF_T_VLAN)) { - /* PTCH.SSPA */ - priv->port = kmsg->netif.port; - priv->qnum = kmsg->netif.qnum; - } else { - priv->port = -1; - } - } - priv->flags = kmsg->netif.flags; - priv->cb_user_data = kmsg->netif.cb_user_data; - - DBG_VERB(("Replace Ethernet device %s ID %d\n", - dev->name, priv->id)); - - list_for_each(list, &netif_create_cb_list) { - netif_create_cb = list_entry(list, bkn_netif_cb_t, list); - if (netif_create_cb->cb(dev, sinfo->dev_no, &kmsg->netif) != 0) { - DBG_WARN(("Network interface create callback failed for '%s'\n", - dev->name)); - } - } - /* netdev_get_by_name() increases the device reference count, netdev_put() is called to avoid a reference leak. */ - netdev_put(dev, NULL); - } - - return sizeof(*kmsg); -} - static int bkn_knet_filter_create(kcom_msg_filter_create_t *kmsg, int len) { @@ -10571,7 +10025,7 @@ bkn_knet_filter_create(kcom_msg_filter_create_t *kmsg, int len) if (device_is_sand(sinfo)) { oob_offset_max = BKN_SAND_SCRATCH_DATA_SIZE * 4; - } else if (inband_meta(sinfo)) { + } else if ((sinfo->cmic_type == 'x') || (sinfo->cmic_type == 'r')) { oob_offset_max = sinfo->pkt_hdr_size; } else { oob_offset_max = sinfo->dcb_wsize * 4; @@ -10625,18 +10079,12 @@ bkn_knet_filter_create(kcom_msg_filter_create_t *kmsg, int len) if (filter->kf.dest_type == KCOM_DEST_T_CB && filter->kf.desc[0] != '\0') { list_for_each(list, &filter_cb_list) { filter_cb = list_entry(list, bkn_filter_cb_t, list); - if (strncmp(filter->kf.desc, filter_cb->desc, - strlen(filter_cb->desc)) == 0) { + if (strcmp(filter->kf.desc, filter_cb->desc) == 0) { filter->cb = filter_cb->cb; - filter->create_cb = filter_cb->create_cb; - filter->destroy_cb = filter_cb->destroy_cb; break; } } } - if (filter->create_cb) { - filter->create_cb(&filter->kf); - } spin_lock_irqsave(&sinfo->lock, flags); @@ -10719,10 +10167,6 @@ bkn_knet_filter_destroy(kcom_msg_filter_destroy_t *kmsg, int len) cfg_api_unlock(sinfo, &flags); - if (filter->destroy_cb) { - filter->destroy_cb(&filter->kf); - } - DBG_VERB(("Removing filter ID %d.\n", filter->kf.id)); kfree(filter); @@ -10951,11 +10395,6 @@ bkn_handle_cmd_req(kcom_msg_t *kmsg, int len) /* Return network interface info */ len = bkn_knet_netif_get(&kmsg->netif_get, len); break; - case KCOM_M_NETIF_REPLACE: - DBG_CMD(("KCOM_M_NETIF_REPLACE\n")); - /* Return network interface info */ - len = bkn_knet_netif_replace(&kmsg->netif_create, len); - break; case KCOM_M_FILTER_CREATE: DBG_CMD(("KCOM_M_FILTER_CREATE\n")); /* Create packet filter */ @@ -11001,7 +10440,7 @@ bkn_handle_cmd_req(kcom_msg_t *kmsg, int len) return 0; } DBG_CMD(("KCOM_M_CLOCK_CMD\n")); - len = knet_hw_tstamp_ioctl_cmd_cb(&kmsg->clock_cmd, len, sinfo->dcb_type, sinfo->dev_no); + len = knet_hw_tstamp_ioctl_cmd_cb(&kmsg->clock_cmd, len, sinfo->dcb_type); } else { DBG_WARN(("Unsupported command (type=%d, opcode=%d)\n", kmsg->hdr.type, kmsg->hdr.opcode)); @@ -11626,39 +11065,25 @@ bkn_netif_destroy_cb_unregister(knet_netif_cb_f netif_cb) int bkn_filter_cb_register(knet_filter_cb_f filter_cb) { - return bkn_filter_cb_attr_register(filter_cb, NULL); + if (knet_filter_cb != NULL) { + return -1; + } + knet_filter_cb = filter_cb; + return 0; } int bkn_filter_cb_register_by_name(knet_filter_cb_f filter_cb, char *filter_name) -{ - bkn_filter_cb_attr_t filter_cb_attr; - - memset(&filter_cb_attr, 0, sizeof(filter_cb_attr)); - filter_cb_attr.name = filter_name; - return bkn_filter_cb_attr_register(filter_cb, &filter_cb_attr); -} - -int -bkn_filter_cb_attr_register(knet_filter_cb_f filter_cb, - bkn_filter_cb_attr_t *filter_cb_attr) { struct list_head *list, *list2; bkn_switch_info_t *sinfo; bkn_filter_t *filter; bkn_filter_cb_t *fcb; unsigned long flags; - const char *filter_name; - if (filter_cb_attr == NULL || filter_cb_attr->name == NULL) { - if (knet_filter_cb != NULL) { - return -1; - } - knet_filter_cb = filter_cb; - return 0; + if (filter_cb == NULL || filter_name == NULL) { + return -1; } - - filter_name = filter_cb_attr->name; if (filter_name[0] == '\0' || strlen(filter_name) >= KCOM_FILTER_DESC_MAX) { return -1; } @@ -11674,8 +11099,6 @@ bkn_filter_cb_attr_register(knet_filter_cb_f filter_cb, return -1; } fcb->cb = filter_cb; - fcb->create_cb = filter_cb_attr->create_cb; - fcb->destroy_cb = filter_cb_attr->destroy_cb; strscpy(fcb->desc, filter_name, sizeof(fcb->desc)); list_add_tail(&fcb->list, &filter_cb_list); @@ -11691,9 +11114,7 @@ bkn_filter_cb_attr_register(knet_filter_cb_f filter_cb, } if (filter->kf.desc[0] != '\0') { if (strcmp(filter->kf.desc, filter_name) == 0) { - filter->cb = fcb->cb; - filter->create_cb = fcb->create_cb; - filter->destroy_cb = fcb->destroy_cb; + filter->cb = filter_cb; } } } @@ -11738,8 +11159,6 @@ bkn_filter_cb_unregister(knet_filter_cb_f filter_cb) } if (filter->cb == filter_cb) { filter->cb = NULL; - filter->create_cb = NULL; - filter->destroy_cb = NULL; } } @@ -11981,7 +11400,6 @@ LKM_EXPORT_SYM(bkn_netif_destroy_cb_register); LKM_EXPORT_SYM(bkn_netif_destroy_cb_unregister); LKM_EXPORT_SYM(bkn_filter_cb_register); LKM_EXPORT_SYM(bkn_filter_cb_register_by_name); -LKM_EXPORT_SYM(bkn_filter_cb_attr_register); LKM_EXPORT_SYM(bkn_filter_cb_unregister); LKM_EXPORT_SYM(bkn_hw_tstamp_enable_cb_register); LKM_EXPORT_SYM(bkn_hw_tstamp_enable_cb_unregister); diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-ptp-clock/Makefile b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/bcm-ptp-clock/Makefile similarity index 100% rename from platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-ptp-clock/Makefile rename to platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/bcm-ptp-clock/Makefile diff --git a/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/bcm-ptp-clock/bcm-ptp-clock.c b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/bcm-ptp-clock/bcm-ptp-clock.c new file mode 100644 index 00000000000..6d5d27eadc7 --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/bcm-ptp-clock/bcm-ptp-clock.c @@ -0,0 +1,4129 @@ +/* + * Copyright 2017 Broadcom + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + */ + +/* + * This module implements a Linux PTP Clock driver for Broadcom + * XGS switch devices. + * + * For a list of supported module parameters, please see below. + * debug: Debug level (default 0) + * network_transport : Transport Type (default 0 - Raw) + * base_dev_name: Base device name (default ptp0, ptp1, etc.) + * + * - All the data structures and functions work on the physical port. + * For array indexing purposes, we use (phy_port - 1). + */ + +#include /* Must be included first */ +/* Module Information */ +#define MODULE_MAJOR 125 +#define MODULE_NAME "linux-bcm-ptp-clock" + +MODULE_AUTHOR("Broadcom Corporation"); +MODULE_DESCRIPTION("PTP Clock Driver for Broadcom XGS/DNX Switch"); +MODULE_LICENSE("GPL"); + +#if ((LINUX_VERSION_CODE > KERNEL_VERSION(3,17,0)) && (LINUX_VERSION_CODE < KERNEL_VERSION(6,0,0))) +#define PTPCLOCK_SUPPORTED +#endif + +#ifdef PTPCLOCK_SUPPORTED +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +/* Configuration Parameters */ +static int debug; +LKM_MOD_PARAM(debug, "i", int, 0); +MODULE_PARM_DESC(debug, + "Debug level (default 0)"); + +static int pci_cos; + +static int network_transport; +LKM_MOD_PARAM(network_transport, "i", int, 0); +MODULE_PARM_DESC(network_transport, + "Transport Type (default - Detect from packet)"); + +static char *base_dev_name = "ptp0"; +LKM_MOD_PARAM(base_dev_name, "s", charp, 0); +MODULE_PARM_DESC(base_dev_name, + "Base device name (default ptp0, ptp1, etc.)"); + +static int fw_core; +LKM_MOD_PARAM(fw_core, "i", int, 0); +MODULE_PARM_DESC(fw_core, + "Firmware core (default 0)"); + +static int vnptp_l2hdr_vlan_prio; +LKM_MOD_PARAM(vnptp_l2hdr_vlan_prio, "i", int, 0); +MODULE_PARM_DESC(vnptp_l2hdr_vlan_prio, + "L2 Hdr Vlan priority"); + +static int phc_update_intv_msec = 1000; +LKM_MOD_PARAM(phc_update_intv_msec, "i", int, 0); +MODULE_PARM_DESC(phc_update_intv_msec, + "PHC update interval in msec (default 1000)"); + +/* Debug levels */ +#define DBG_LVL_VERB 0x1 +#define DBG_LVL_WARN 0x2 +#define DBG_LVL_TXTS 0x4 +#define DBG_LVL_CMDS 0x8 +#define DBG_LVL_TX 0x10 +#define DBG_LVL_RX 0x20 +#define DBG_LVL_TX_DUMP 0x40 +#define DBG_LVL_RX_DUMP 0x80 + +#define DBG_VERB(_s) do { if (debug & DBG_LVL_VERB) gprintk _s; } while (0) +#define DBG_WARN(_s) do { if (debug & DBG_LVL_WARN) gprintk _s; } while (0) +#define DBG_TXTS(_s) do { if (debug & DBG_LVL_TXTS) gprintk _s; } while (0) +#define DBG_CMDS(_s) do { if (debug & DBG_LVL_CMDS) gprintk _s; } while (0) +#define DBG_TX(_s) do { if (debug & DBG_LVL_TX) gprintk _s; } while (0) +#define DBG_RX(_s) do { if (debug & DBG_LVL_RX) gprintk _s; } while (0) +#define DBG_TX_DUMP(_s) do { if (debug & DBG_LVL_TX_DUMP) gprintk _s; } while (0) +#define DBG_RX_DUMP(_s) do { if (debug & DBG_LVL_RX_DUMP) gprintk _s; } while (0) +#define DBG_ERR(_s) do { if (1) gprintk _s; } while (0) + + +#ifdef LINUX_BDE_DMA_DEVICE_SUPPORT +#define DMA_DEV device +#define DMA_ALLOC_COHERENT(d,s,h) dma_alloc_coherent(d,s,h,GFP_ATOMIC|GFP_DMA32) +#define DMA_FREE_COHERENT(d,s,a,h) dma_free_coherent(d,s,a,h) +#else +#define DMA_DEV pci_dev +#define DMA_ALLOC_COHERENT(d,s,h) pci_alloc_consistent(d,s,h) +#define DMA_FREE_COHERENT(d,s,a,h) pci_free_consistent(d,s,a,h) +#endif + +/* Type length in bytes */ +#define BKSYNC_PACKLEN_U8 1 +#define BKSYNC_PACKLEN_U16 2 +#define BKSYNC_PACKLEN_U24 3 +#define BKSYNC_PACKLEN_U32 4 + +#define BKSYNC_UNPACK_U8(_buf, _var) \ + _var = *_buf++ + +#define BKSYNC_UNPACK_U16(_buf, _var) \ + do { \ + (_var) = (((_buf)[0] << 8) | \ + (_buf)[1]); \ + (_buf) += BKSYNC_PACKLEN_U16; \ + } while (0) + +#define BKSYNC_UNPACK_U24(_buf, _var) \ + do { \ + (_var) = (((_buf)[0] << 16) | \ + ((_buf)[1] << 8) | \ + (_buf)[2]); \ + (_buf) += BKSYNC_PACKLEN_U24; \ + } while (0) + +#define BKSYNC_UNPACK_U32(_buf, _var) \ + do { \ + (_var) = (((_buf)[0] << 24) | \ + ((_buf)[1] << 16) | \ + ((_buf)[2] << 8) | \ + (_buf)[3]); \ + (_buf) += BKSYNC_PACKLEN_U32; \ + } while (0) + + +#define CMICX_DEV_TYPE ((ptp_priv->dcb_type == 38) || \ + (ptp_priv->dcb_type == 36) || \ + (ptp_priv->dcb_type == 39)) + +/* Arad Series of DNX Devices */ +#define DEVICE_IS_DPP (ptp_priv->dcb_type == 28) + +/* JR2 Series of DNX Devices */ +#define DEVICE_IS_DNX (ptp_priv->dcb_type == 39) + +/* CMIC MCS-0 SCHAN Messaging registers */ +/* Core0:CMC1 Core1:CMC2 */ +#define CMIC_CMC_BASE \ + (CMICX_DEV_TYPE ? (fw_core ? 0x10400 : 0x10300) : \ + (fw_core ? 0x33000 : 0x32000)) + +#define CMIC_CMC_SCHAN_MESSAGE_10r(BASE) (BASE + 0x00000034) +#define CMIC_CMC_SCHAN_MESSAGE_11r(BASE) (BASE + 0x00000038) +#define CMIC_CMC_SCHAN_MESSAGE_12r(BASE) (BASE + 0x0000003c) +#define CMIC_CMC_SCHAN_MESSAGE_13r(BASE) (BASE + 0x00000040) +#define CMIC_CMC_SCHAN_MESSAGE_14r(BASE) (BASE + 0x00000044) +#define CMIC_CMC_SCHAN_MESSAGE_15r(BASE) (BASE + 0x00000048) +#define CMIC_CMC_SCHAN_MESSAGE_16r(BASE) (BASE + 0x0000004c) +#define CMIC_CMC_SCHAN_MESSAGE_17r(BASE) (BASE + 0x00000050) +#define CMIC_CMC_SCHAN_MESSAGE_18r(BASE) (BASE + 0x00000054) +#define CMIC_CMC_SCHAN_MESSAGE_19r(BASE) (BASE + 0x00000058) +#define CMIC_CMC_SCHAN_MESSAGE_20r(BASE) (BASE + 0x0000005c) +#define CMIC_CMC_SCHAN_MESSAGE_21r(BASE) (BASE + 0x00000060) + +u32 hostcmd_regs[5] = { 0 }; + +#define BCMKSYNC_NUM_PORTS 128 /* NUM_PORTS where 2-step is supported. */ +#define BCMKSYNC_MAX_NUM_PORTS 256 /* Max ever NUM_PORTS in the system */ +#define BCMKSYNC_MAX_MTP_IDX 8 /* Max number of mtps in the system */ + +#define BKN_DNX_PTCH_2_SIZE 2 /* PTCH_2 */ +#define BKN_DNX_ITMH_SIZE 5 /* ITMH */ + +/* Service request commands to Firmware. */ +enum { +#ifdef BDE_EDK_SUPPORT + BKSYNC_DONE = (0x0), + BKSYNC_INIT = (0x1), + BKSYNC_DEINIT = (0x2), + BKSYNC_GETTIME = (0x3), + BKSYNC_SETTIME = (0x4), + BKSYNC_FREQCOR = (0x5), + BKSYNC_PBM_UPDATE = (0x6), + BKSYNC_ADJTIME = (0x7), + BKSYNC_GET_TSTIME = (0x8), + BKSYNC_MTP_TS_UPDATE_ENABLE = (0x9), + BKSYNC_MTP_TS_UPDATE_DISABLE = (0xa), + BKSYNC_ACK_TSTIME = (0xb), + BKSYNC_SYSINFO = (0xc), + BKSYNC_BROADSYNC = (0xd), + BKSYNC_GPIO = (0xe), + BKSYNC_EVLOG = (0xf), + BKSYNC_EXTTSLOG = (0x10), + BKSYNC_GET_EXTTS_BUFF = (0x11), + BKSYNC_GPIO_PHASEOFFSET = (0x12), +#else + BKSYNC_DONE = (0x1), + BKSYNC_INIT = (0x2), + BKSYNC_DEINIT = (0x3), + BKSYNC_GETTIME = (0x4), + BKSYNC_SETTIME = (0x5), + BKSYNC_FREQCOR = (0x6), + BKSYNC_PBM_UPDATE = (0x7), + BKSYNC_ADJTIME = (0x8), + BKSYNC_GET_TSTIME = (0x9), + BKSYNC_MTP_TS_UPDATE_ENABLE = (0xa), + BKSYNC_MTP_TS_UPDATE_DISABLE = (0xb), + BKSYNC_ACK_TSTIME = (0xc), + BKSYNC_SYSINFO = (0xd), + BKSYNC_BROADSYNC = (0xe), + BKSYNC_GPIO = (0xf), + BKSYNC_EVLOG = (0x10), + BKSYNC_EXTTSLOG = (0x11), + BKSYNC_GPIO_PHASEOFFSET = (0x12), +#endif +}; + +enum { + KSYNC_SYSINFO_UC_PORT_NUM = (0x1), + KSYNC_SYSINFO_UC_PORT_SYSPORT = (0x2), + KSYNC_SYSINFO_HOST_CPU_PORT = (0x3), + KSYNC_SYSINFO_HOST_CPU_SYSPORT = (0x4), + KSYNC_SYSINFO_UDH_LEN = (0x5), +}; + +enum { + KSYNC_BROADSYNC_BS0_CONFIG = (0x1), + KSYNC_BROADSYNC_BS1_CONFIG = (0x2), + KSYNC_BROADSYNC_BS0_STATUS_GET = (0x3), + KSYNC_BROADSYNC_BS1_STATUS_GET = (0x4), +}; + +enum { + KSYNC_GPIO_0 = (0x1), + KSYNC_GPIO_1 = (0x2), + KSYNC_GPIO_2 = (0x3), + KSYNC_GPIO_3 = (0x4), + KSYNC_GPIO_4 = (0x5), + KSYNC_GPIO_5 = (0x6), +}; + + + +/* 1588 message types. */ +enum +{ + IEEE1588_MSGTYPE_SYNC = (0x0), + IEEE1588_MSGTYPE_DELREQ = (0x1), + IEEE1588_MSGTYPE_PDELREQ = (0x2), + IEEE1588_MSGTYPE_PDELRESP = (0x3), + /* reserved (0x4) */ + /* reserved (0x5) */ + /* reserved (0x6) */ + /* reserved (0x7) */ + IEEE1588_MSGTYPE_GENERALMASK = (0x8), /* all non-event messages have this bit set */ + IEEE1588_MSGTYPE_FLWUP = (0x8), + IEEE1588_MSGTYPE_DELRESP = (0x9), + IEEE1588_MSGTYPE_PDELRES_FLWUP = (0xA), + IEEE1588_MSGTYPE_ANNOUNCE = (0xB), + IEEE1588_MSGTYPE_SGNLNG = (0xC), + IEEE1588_MSGTYPE_MNGMNT = (0xD) + /* reserved (0xE) */ + /* reserved (0xF) */ +}; + +/* Usage macros */ +#define ONE_BILLION (1000000000) + +#define SKB_U16_GET(_skb, _pkt_offset) \ + ((_skb->data[_pkt_offset] << 8) | _skb->data[_pkt_offset + 1]) + +#define BKSYNC_PTP_EVENT_MSG(_ptp_msg_type) \ + ((_ptp_msg_type == IEEE1588_MSGTYPE_DELREQ) || \ + (_ptp_msg_type == IEEE1588_MSGTYPE_SYNC)) + + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,30) +#define HWTSTAMP_TX_ONESTEP_SYNC 2 +#else +#include +#endif + + +/* + * Hardware specific information. + * 4 words of information used from this data set. + * 0 - 3: 2-step untagged. + * 4 - 7: 2-step tagged. + * 8 - 11: 1-step untagged. + * 12 - 15: 1-step tagged. + * 16 - 19: 1-step untagged with ITS-set. + * 20 - 23: 1-step tagged with ITS-set. + * + * Refer to device specific reg file for SOBMH header information. + * Below fields are considered: + * SOBMH => { + * IEEE1588_ONE_STEP_ENABLE - OneStep + * IEEE1588_REGEN_UDP_CHECKSUM - Regen UDP Checksum + * IEEE1588_INGRESS_TIMESTAMP_SIGN - ITS sign + * TX_TS - TwoStep + * IEEE1588_TIMESTAMP_HDR_OFFSET - 1588 header offset + * } + * + */ +uint32_t sobmhrawpkts_dcb26[24] = {0x00000000, 0x00020E00, 0x00000000, 0x00000000, 0x00000000, 0x00021200, 0x00000000, 0x00000000, + 0x00000000, 0x00100E00, 0x00000000, 0x00000000, 0x00000000, 0x00101200, 0x00000000, 0x00000000, + 0x00000000, 0x00140E00, 0x00000000, 0x00000000, 0x00000000, 0x00141200, 0x00000000, 0x00000000}; + +uint32_t sobmhudpipv4_dcb26[24] = {0x00000000, 0x00022A00, 0x00000000, 0x00000000, 0x00000000, 0x00022E00, 0x00000000, 0x00000000, + 0x00000000, 0x00182A00, 0x00000000, 0x00000000, 0x00000000, 0x00182E00, 0x00000000, 0x00000000, + 0x00000000, 0x001C2A00, 0x00000000, 0x00000000, 0x00000000, 0x001C2E00, 0x00000000, 0x00000000}; + +uint32_t sobmhudpipv6_dcb26[24] = {0x00000000, 0x00023E00, 0x00000000, 0x00000000, 0x00000000, 0x00024200, 0x00000000, 0x00000000, + 0x00000000, 0x00183E00, 0x00000000, 0x00000000, 0x00000000, 0x00184200, 0x00000000, 0x00000000, + 0x00000000, 0x001C3E00, 0x00000000, 0x00000000, 0x00000000, 0x001C4200, 0x00000000, 0x00000000}; + +uint32_t sobmhrawpkts_dcb32[24] = {0x00000000, 0x00010E00, 0x00000000, 0x00000000, 0x00000000, 0x00011200, 0x00000000, 0x00000000, + 0x00000000, 0x00080E00, 0x00000000, 0x00000000, 0x00000000, 0x00081200, 0x00000000, 0x00000000, + 0x00000000, 0x00080E00, 0x00000000, 0x00000000, 0x00000000, 0x00081200, 0x00000000, 0x00000000}; + +uint32_t sobmhudpipv4_dcb32[24] = {0x00000000, 0x00012A00, 0x00000000, 0x00000000, 0x00000000, 0x00012E00, 0x00000000, 0x00000000, + 0x00000000, 0x000C2A00, 0x00000000, 0x00000000, 0x00000000, 0x000C2E00, 0x00000000, 0x00000000, + 0x00000000, 0x000C2A00, 0x00000000, 0x00000000, 0x00000000, 0x000C2E00, 0x00000000, 0x00000000}; + +uint32_t sobmhudpipv6_dcb32[24] = {0x00000000, 0x00013E00, 0x00000000, 0x00000000, 0x00000000, 0x00014200, 0x00000000, 0x00000000, + 0x00000000, 0x000C3E00, 0x00000000, 0x00000000, 0x00000000, 0x000C4200, 0x00000000, 0x00000000, + 0x00000000, 0x000C3E00, 0x00000000, 0x00000000, 0x00000000, 0x000C4200, 0x00000000, 0x00000000}; + +uint32_t sobmhrawpkts_dcb35[24] = {0x00000000, 0x0020E000, 0x00000000, 0x00000000, 0x00000000, 0x00212000, 0x00000000, 0x00000000, + 0x00000000, 0x0100E000, 0x00000000, 0x00000000, 0x00000000, 0x01012000, 0x00000000, 0x00000000, + 0x00000000, 0x0140E000, 0x00000000, 0x00000000, 0x00000000, 0x01412000, 0x00000000, 0x00000000}; + +uint32_t sobmhudpipv4_dcb35[24] = {0x00000000, 0x0022A000, 0x00000000, 0x00000000, 0x00000000, 0x0022E000, 0x00000000, 0x00000000, + 0x00000000, 0x0182A000, 0x00000000, 0x00000000, 0x00000000, 0x0182E000, 0x00000000, 0x00000000, + 0x00000000, 0x01C2A000, 0x00000000, 0x00000000, 0x00000000, 0x01C2E000, 0x00000000, 0x00000000}; + +uint32_t sobmhudpipv6_dcb35[24] = {0x00000000, 0x0023E000, 0x00000000, 0x00000000, 0x00000000, 0x00242000, 0x00000000, 0x00000000, + 0x00000000, 0x0183E000, 0x00000000, 0x00000000, 0x00000000, 0x01842000, 0x00000000, 0x00000000, + 0x00000000, 0x01C3E000, 0x00000000, 0x00000000, 0x00000000, 0x01C42000, 0x00000000, 0x00000000}; + + +uint32_t sobmhrawpkts_dcb36[24] = {0x00000000, 0x00010E00, 0x00000000, 0x00000000, 0x00000000, 0x00011200, 0x00000000, 0x00000000, + 0x00000000, 0x00080E00, 0x00000000, 0x00000000, 0x00000000, 0x00081200, 0x00000000, 0x00000000, + 0x00000000, 0x00080E00, 0x00000000, 0x00000000, 0x00000000, 0x00081200, 0x00000000, 0x00000000}; + +uint32_t sobmhudpipv4_dcb36[24] = {0x00000000, 0x00012A00, 0x00000000, 0x00000000, 0x00000000, 0x00012E00, 0x00000000, 0x00000000, + 0x00000000, 0x000C2A00, 0x00000000, 0x00000000, 0x00000000, 0x000C2E00, 0x00000000, 0x00000000, + 0x00000000, 0x000C2A00, 0x00000000, 0x00000000, 0x00000000, 0x000C2E00, 0x00000000, 0x00000000}; + +uint32_t sobmhudpipv6_dcb36[24] = {0x00000000, 0x00013E00, 0x00000000, 0x00000000, 0x00000000, 0x00014200, 0x00000000, 0x00000000, + 0x00000000, 0x000C3E00, 0x00000000, 0x00000000, 0x00000000, 0x000C4200, 0x00000000, 0x00000000, + 0x00000000, 0x000C3E00, 0x00000000, 0x00000000, 0x00000000, 0x000C4200, 0x00000000, 0x00000000}; +/* th3: onestep only */ +uint32_t sobmhrawpkts_dcb38[24] = {0x00000000, 0x00080E00, 0x00000000, 0x00000000, 0x00000000, 0x00081200, 0x00000000, 0x00000000, + 0x00000000, 0x00080E00, 0x00000000, 0x00000000, 0x00000000, 0x00081200, 0x00000000, 0x00000000, + 0x00000000, 0x00080E00, 0x00000000, 0x00000000, 0x00000000, 0x00081200, 0x00000000, 0x00000000}; + +uint32_t sobmhudpipv4_dcb38[24] = {0x00000000, 0x00082A00, 0x00000000, 0x00000000, 0x00000000, 0x00082E00, 0x00000000, 0x00000000, + 0x00000000, 0x000C2A00, 0x00000000, 0x00000000, 0x00000000, 0x000C2E00, 0x00000000, 0x00000000, + 0x00000000, 0x000C2A00, 0x00000000, 0x00000000, 0x00000000, 0x000C2E00, 0x00000000, 0x00000000}; + +uint32_t sobmhudpipv6_dcb38[24] = {0x00000000, 0x00083E00, 0x00000000, 0x00000000, 0x00000000, 0x00084200, 0x00000000, 0x00000000, + 0x00000000, 0x000C3E00, 0x00000000, 0x00000000, 0x00000000, 0x000C4200, 0x00000000, 0x00000000, + 0x00000000, 0x000C3E00, 0x00000000, 0x00000000, 0x00000000, 0x000C4200, 0x00000000, 0x00000000}; + +/* HR3-MG/GH2 metadata */ +uint32_t sobmhrawpkts_dcb37[24] = {0x00000000, 0x00020E00, 0x00000000, 0x00000000, 0x00000000, 0x00021200, 0x00000000, 0x00000000, + 0x00000000, 0x00100E00, 0x00000000, 0x00000000, 0x00000000, 0x00101200, 0x00000000, 0x00000000, + 0x00000000, 0x00140E00, 0x00000000, 0x00000000, 0x00000000, 0x00141200, 0x00000000, 0x00000000}; + +uint32_t sobmhudpipv4_dcb37[24] = {0x00000000, 0x00022A00, 0x00000000, 0x00000000, 0x00000000, 0x00022E00, 0x00000000, 0x00000000, + 0x00000000, 0x00182A00, 0x00000000, 0x00000000, 0x00000000, 0x00182E00, 0x00000000, 0x00000000, + 0x00000000, 0x001C2A00, 0x00000000, 0x00000000, 0x00000000, 0x001C2E00, 0x00000000, 0x00000000}; + +uint32_t sobmhudpipv6_dcb37[24] = {0x00000000, 0x00023E00, 0x00000000, 0x00000000, 0x00000000, 0x00024200, 0x00000000, 0x00000000, + 0x00000000, 0x00183E00, 0x00000000, 0x00000000, 0x00000000, 0x00184200, 0x00000000, 0x00000000, + 0x00000000, 0x001C3E00, 0x00000000, 0x00000000, 0x00000000, 0x001C4200, 0x00000000, 0x00000000}; + +/* Driver Proc Entry root */ +static struct proc_dir_entry *bksync_proc_root = NULL; + +/* Shared data structures with R5 */ +typedef struct _bksync_tx_ts_data_s { + u32 ts_valid; /* Timestamp valid indication */ + u32 port_id; /* Port number */ + u32 ts_seq_id; /* Sequency Id */ + u32 ts_cnt; + u64 timestamp; /* Timestamp */ +} bksync_tx_ts_data_t; + +typedef struct bksync_info_s { + u32 ksyncinit; + u32 dev_id; + s64 freqcorr; + u64 portmap[BCMKSYNC_MAX_NUM_PORTS/64]; /* Two-step enabled ports */ + u64 ptptime; + u64 reftime; + u64 ptptime_alt; + u64 reftime_alt; + s64 phase_offset; + bksync_tx_ts_data_t port_ts_data[BCMKSYNC_MAX_NUM_PORTS]; +} bksync_info_t; + + +enum { + TS_EVENT_CPU = 0, + TS_EVENT_BSHB_0 = 1, + TS_EVENT_BSHB_1 = 2, + TS_EVENT_GPIO_1 = 3, + TS_EVENT_GPIO_2 = 4, + TS_EVENT_GPIO_3 = 5, + TS_EVENT_GPIO_4 = 6, + TS_EVENT_GPIO_5 = 7, + TS_EVENT_GPIO_6 = 8, +}; + +#define NUM_TS_EVENTS 14 + +#define __ATTRIBUTE_PACKED__ __attribute__ ((packed)) + +/* FW timestamps. + * This declaration has to match with HFT_t_TmStmp + * defined in the firmware. Otherwise, dma will fail. + */ +typedef struct fw_tstamp_s { + u64 sec; + u32 nsec; +} __ATTRIBUTE_PACKED__ fw_tstamp_t; + +typedef struct bksync_fw_debug_event_tstamps_s { + fw_tstamp_t prv_tstamp; + fw_tstamp_t cur_tstamp; +} __ATTRIBUTE_PACKED__ bksync_fw_debug_event_tstamps_t; + +typedef struct bksync_evlog_s { + bksync_fw_debug_event_tstamps_t event_timestamps[NUM_TS_EVENTS]; +} __ATTRIBUTE_PACKED__ bksync_evlog_t; + + +/* Timestamps for EXTTS from Firmware */ +#define NUM_EXT_TS 6 /* gpio0 = event0 ..... gpio5 = event5 */ +#define NUM_EVENT_TS 128 /* Directly mapped to PTP_MAX_TIMESTAMPS from ptp_private.h */ +typedef struct bksync_fw_extts_event_s { + u32 ts_event_id; + fw_tstamp_t tstamp; +} __ATTRIBUTE_PACKED__ bksync_fw_extts_event_t; + +typedef struct bksync_extts_log_s { + u32 head; /* Read pointer - Updated by HOST */ + u32 tail; /* Write pointer - Updated by FW */ + bksync_fw_extts_event_t event_ts[NUM_EVENT_TS]; + u32 overflow; +} __ATTRIBUTE_PACKED__ bksync_fw_extts_log_t; + +typedef struct bksync_fw_comm_s { + u32 cmd; + u32 dw1[2]; + u32 dw2[2]; + u32 head; /* Read pointer - Updated by HOST */ + u32 tail; /* Write pointer - Updated by FW */ +} __ATTRIBUTE_PACKED__ bksync_fw_comm_t; + +struct bksync_extts_event { + int enable[NUM_EXT_TS]; + int head; +}; + +typedef struct bksync_port_stats_s { + u32 pkt_rxctr; /* All ingress packets */ + u32 pkt_txctr; /* All egress packets */ + u32 pkt_txonestep; /* 1-step Tx packet counter */ + u32 tsts_match; /* 2-Step tstamp req match */ + u32 tsts_timeout; /* 2-Step tstamp req timeouts */ + u32 tsts_discard; /* 2-Step tstamp req discards */ + u32 osts_event_pkts; /* 1-step event packet counter */ + u32 osts_tstamp_reqs; /* 1-step events with tstamp request */ + u32 fifo_rxctr; /* 2-Step tstamp req match */ + u64 tsts_best_fetch_time; /* 1-step events with tstamp request */ + u64 tsts_worst_fetch_time; /* 1-step events with tstamp request */ + u32 tsts_avg_fetch_time; /* 1-step events with tstamp request */ +} bksync_port_stats_t; + +typedef struct bksync_init_info_s { + u32 pci_knetsync_cos; + u32 uc_port_num; + u32 uc_port_sysport; + u32 host_cpu_port; + u32 host_cpu_sysport; + u32 udh_len; + u8 application_v2; +} bksync_init_info_t; + +typedef struct bksync_bs_info_s { + u32 enable; + u32 mode; + u32 bc; + u32 hb; +} bksync_bs_info_t; + +typedef struct bksync_gpio_info_s { + u32 enable; + u32 mode; + u32 period; + int64_t phaseoffset; +} bksync_gpio_info_t; + +typedef struct bksync_evlog_info_s { + u32 enable; +} bksync_evlog_info_t; + +/* Contains information about parsed fields of RX packet header information */ +typedef struct bksync_dnx_rx_pkt_parse_info_s { + uint16_t src_sys_port; + uint64_t rx_hw_timestamp; + uint64_t pph_header_vlan; + uint8_t dnx_header_offset; + int rx_frame_len; +} bksync_dnx_rx_pkt_parse_info_t; + + +/* DNX UDH DATA TYPE MAX */ +#define BKSYNC_DNXJER2_UDH_DATA_TYPE_MAX (4) + +/* PPH LIF Ext. 3 bit type */ +#define BKSYNC_DNXJER2_PPH_LIF_EXT_TYPE_MAX (8) + + +typedef struct bksync_dnx_jr2_devices_system_info_s { + /* dnx JR2 system header info */ + uint32_t ftmh_lb_key_ext_size; + uint32_t ftmh_stacking_ext_size; + uint32_t pph_base_size; + uint32_t pph_lif_ext_size[BKSYNC_DNXJER2_PPH_LIF_EXT_TYPE_MAX]; + uint32_t system_headers_mode; + uint32_t udh_enable; + uint32_t udh_data_lenght_per_type[BKSYNC_DNXJER2_UDH_DATA_TYPE_MAX]; + + /* CPU port information */ + uint32_t cosq_port_cpu_channel; + uint32_t cosq_port_pp_port; +} bksync_dnx_jr2_devices_system_info_t; + +typedef enum bksync_dnxjr2_system_headers_mode_e { + bksync_dnxjr2_sys_hdr_mode_jericho = 0, + bksync_dnxjr2_sys_hdr_mode_jericho2 = 1 +} bksync_dnxjr2_system_headers_mode_t; + +/* DNX JR2 FTMH Header information */ +#define BKSYNC_DNXJR2_FTMH_HDR_LEN (10) +#define BKSYNC_DNXJR2_FTMH_TM_DEST_EXT_LEN (3) +#define BKSYNC_DNXJR2_FTMH_FLOWID_EXT_LEN (3) +#define BKSYNC_DNXJR2_FTMH_BEIR_BFR_EXT_LEN (3) +#define BKSYNC_DNXJR2_FTMH_APP_SPECIFIC_EXT_LEN (6) + +/* DNX FTMH PPH type */ +#define BKSYNC_DNXJR2_PPH_TYPE_NO_PPH (0) +#define BKSYNC_DNXJR2_PPH_TYPE_PPH_BASE (1) +#define BKSYNC_DNXJR2_PPH_TYPE_TSH_ONLY (2) +#define BKSYNC_DNXJR2_PPH_TYPE_PPH_BASE_TSH (3) + +typedef enum bksync_dnxjr2_ftmh_tm_action_type_e { + bksync_dnxjr2_ftmh_tm_action_type_forward = 0, /* TM action is forward */ + bksync_dnxjr2_ftmh_tm_action_type_snoop = 1, /* TM action is snoop */ + bksync_dnxjr2_ftmh_tm_action_type_inbound_mirror = 2, /* TM action is inbound mirror. */ + bksync_dnxjr2_ftmh_tm_action_type_outbound_mirror = 3, /* TM action is outbound mirror. */ + bksync_dnxjr2_ftmh_tm_action_type_mirror = 4, /* TM action is mirror. */ + bksync_dnxjr2_ftmh_tm_action_type_statistical_sampling = 5 /* TM action is statistical sampling. */ +} bksync_dnxjr2_ftmh_tm_action_type_t; + +typedef enum bksync_dnxjr2_ftmh_app_spec_ext_type_e { + bksync_dnxjr2_ftmh_app_spec_ext_type_none = 0, /* FTMH ASE type is None or OAM */ + bksync_dnxjr2_ftmh_app_spec_ext_type_1588v2 = 1, /* FTMH ASE type is 1588v2 */ + bksync_dnxjr2_ftmh_app_spec_ext_type_mirror = 3, /* FTMH ASE type is Mirror */ + bksync_dnxjr2_ftmh_app_spec_ext_type_trajectory_trace = 4, /* FTMH ASE type is trajectory trace */ + bksync_dnxjr2_ftmh_app_spec_ext_type_inband_telemetry = 5, /* FTMH ASE type is Inband telemetry */ +} bksync_dnxjr2_ftmh_app_spec_ext_type_t; + + +typedef union bksync_dnxjr2_ftmh_base_header_s { + struct { + uint32_t words[2]; + uint8_t bytes[2]; + }; + struct { + uint32_t + src_sys_port_aggr_1:8, + src_sys_port_aggr_0:7, + traffic_class_1:1, + traffic_class_0:2, + packet_size_1:6, + packet_size_0:8; + uint32_t + unused_0:31, + src_sys_port_aggr_2:1; + uint8_t + unused_1:8; + uint8_t + reserved:1, + bier_bfr_ext_size:1, + flow_id_ext_size:1, + app_specific_ext_size:1, + tm_dest_ext_repsent:1, + pph_type:2, + visibility:1; + }; +} bksync_dnxjr2_ftmh_base_header_t; + +typedef union bksync_dnxjr2_ftmh_app_spec_ext_1588v2_s { + struct { + uint32_t word; + uint8_t bytes[2]; + }; + struct { + uint32_t + use_ingress_time_stamp:1, + use_ingress_time_compensation:1, + ingress_time_compensation:28, + time_stamp_lsbs:2; + uint8_t + offset_0:4, + ts_command:3, + ts_encapsulation:1; + uint8_t + offset_1:4, + type:4; + }; +} bksync_dnxjr2_ftmh_app_spec_ext_1588v2_t; + +/* DNX TSH Header size */ +#define BKSYNC_DNXJR2_TSH_HDR_SIZE (4) + +typedef union bksync_dnxjr2_timestamp_header_s { + struct { + uint32_t word; + }; + struct { + uint32_t timestamp; + }; +} bksync_dnxjr2_timestamp_header_t; + +/* DNX PPH FHEI_TYPE */ +#define BKSYNC_DNXJR2_PPH_FHEI_TYPE_NONE (0) /* NO FHE1 */ +#define BKSYNC_DNXJR2_PPH_FHEI_TYPE_SZ0 (1) /* 3 byte */ +#define BKSYNC_DNXJR2_PPH_FHEI_TYPE_SZ1 (2) /* 5 byte */ +#define BKSYNC_DNXJR2_PPH_FHEI_TYPE_SZ2 (3) /* 8 byte */ + +#define BKSYNC_DNXJR2_PPH_FHEI_SZ0_SIZE (3) /* 3 byte */ +#define BKSYNC_DNXJR2_PPH_FHEI_SZ1_SIZE (5) /* 5 byte */ +#define BKSYNC_DNXJR2_PPH_FHEI_SZ2_SIZE (8) /* 8 byte */ + +/* PPH Learn Extension - PPH EXT3 */ +#define BKSYNC_DNXJR2_PPH_LEARN_EXT_SIZE (19) + +/* PPH LIF Ext. 3 bit type */ +#define BKSYNC_DNXJR2_PPH_LIF_EXT_TYPE_MAX (8) + +typedef enum bksync_dnxjr2_pph_fheiext_type_e { + bksync_dnxjr2_pph_fheiext_type_vlanedit = 0, + bksync_dnxjr2_pph_fheiext_type_pop = 1, + bksync_dnxjr2_pph_fheiext_type_swap = 3, + bksync_dnxjr2_pph_fheiext_type_trap_snoop_mirror = 5, +} bksync_dnxjr2_pph_fheiext_type_t; + +typedef union bksync_dnxjr2_pph_base_12b_header_s { + struct { + uint32_t word[3]; + }; + struct { + uint32_t unused_1; + uint32_t unused_2; + uint32_t + forwarding_strenght:1, + parsing_start_type:5, + parsing_start_offset_1:2, + parsing_start_offset_0:5, + lif_ext_type:3, + fhei_size:2, + learn_ext_present:1, + ttl_1:5, + ttl_0:3, + netwrok_qos_0:5; + }; +} bksync_dnxjr2_pph_base_12b_header_t; + +typedef union bksync_dnxjr2_pph_fheiext_vlanedit_3b_header_s { + struct { + uint8_t byte[3]; + }; + struct { + uint8_t + edit_pcp1_0:1, + ingress_vlan_edit_cmd:7; + uint8_t + edit_vid1_0:5, + edit_dei1:1, + edit_pcp1_1:2; + uint8_t + type:1, + edit_vid1_1:7; + }; +} bksync_dnxjr2_pph_fheiext_vlanedit_3b_header_t; + +typedef union bksync_dnxjr2_pph_fheiext_vlanedit_5b_header_s { + struct { + uint8_t byte[5]; + }; + struct { + uint8_t + edit_vid2_0:4, + edit_dei2:1, + edit_pcp2:3; + uint8_t + edit_vid2_1; + uint8_t + edit_pcp1_0:1, + ingress_vlan_edit_cmd:7; + uint8_t + edit_vid1_0:5, + edit_dei1:1, + edit_pcp1_1:2; + uint8_t + type:1, + edit_vid1_1:7; + }; +} bksync_dnxjr2_pph_fheiext_vlanedit_5b_header_t; + +typedef union bksync_dnxjr2_pph_fheiext_trap_header_s { + struct { + uint8_t byte[5]; + }; + struct { + uint32_t + code_0:5, + qualifier:27; + uint8_t + type:4, + code_1:4; + }; +} bksync_dnxjr2_pph_fheiext_trap_header_t; + +#define BKSYNC_DNXJR2_UDH_BASE_HEADER_LEN (1) +#define BKSYNC_DNXJR2_UDH_DATA_TYPE_MAX (4) + +typedef union bksync_dnxjr2_udh_base_header_s { + struct { + uint8_t byte; + }; + struct { + uint8_t + udh_data_type_3:2, + udh_data_type_2:2, + udh_data_type_1:2, + udh_data_type_0:2; + }; +} bksync_dnxjr2_udh_base_header_t; + +#define DNX_PTCH_TYPE2_HEADER_LEN 2 +typedef union bksync_dnxjr2_ptch_type2_header_s { + struct { + uint8_t bytes[DNX_PTCH_TYPE2_HEADER_LEN]; + }; + struct { + uint8_t + in_pp_port_0:2, + reserved:2, + opaque_pt_attributes:3, + parser_program_control:1; + uint8_t + in_pp_port_1:8; + }; +} bksync_dnxjr2_ptch_type2_header_t; + +#define DNX_DNXJR2_MODULE_HEADER_LEN 16 +#define DNX_DNXJR2_ITMH_HEADER_LEN 5 + + +/* Clock Private Data */ +struct bksync_ptp_priv { + struct device dev; + int dcb_type; + struct ptp_clock *ptp_clock; + struct ptp_clock_info ptp_caps; + struct mutex ptp_lock; + int ptp_pair_lock; + volatile void *base_addr; /* address for PCI register access */ + volatile bksync_info_t *shared_addr; /* address for shared memory access */ + volatile bksync_evlog_t *evlog; /* dma-able address for fw updates */ + dma_addr_t dma_mem; + int dma_mem_size; + struct DMA_DEV *dma_dev; /* Required for DMA memory control */ + int num_pports; + int timekeep_status; + u32 mirror_encap_bmp; + struct delayed_work time_keep; + bksync_port_stats_t *port_stats; + bksync_init_info_t bksync_init_info; + bksync_bs_info_t bksync_bs_info[2]; + bksync_gpio_info_t bksync_gpio_info[6]; + bksync_evlog_info_t bksync_evlog_info[NUM_TS_EVENTS]; + bksync_dnx_jr2_devices_system_info_t bksync_jr2devs_sys_info; + volatile bksync_fw_extts_log_t *extts_log; /* dma-able/virtual address for fw updates */ + struct bksync_extts_event extts_event; + struct delayed_work extts_logging; + + struct kobject *kobj; +#ifdef BDE_EDK_SUPPORT + volatile bksync_fw_comm_t *fw_comm; +#else + int extts_dma_mem_size; + dma_addr_t extts_dma_mem_addr; +#endif +}; + +static struct bksync_ptp_priv *ptp_priv; +volatile bksync_info_t *linuxPTPMemory = (bksync_info_t*)(0); +static volatile int module_initialized; +static int num_retries = 5; /* Retry count */ + +static void bksync_ptp_time_keep_init(void); +static void bksync_ptp_time_keep_deinit(void); +void bksync_dnxjr2_parse_rxpkt_system_header(uint8_t *raw_frame, bksync_dnx_rx_pkt_parse_info_t *rx_pkt_parse_info, int isfirsthdr); +static int bksync_ptp_gettime(struct ptp_clock_info *ptp, struct timespec64 *ts); + +static void bksync_ptp_extts_logging_init(void); +static void bksync_ptp_extts_logging_deinit(void); + +#if defined(CMIC_SOFT_BYTE_SWAP) + +#define CMIC_SWAP32(_x) ((((_x) & 0xff000000) >> 24) \ + | (((_x) & 0x00ff0000) >> 8) \ + | (((_x) & 0x0000ff00) << 8) \ + | (((_x) & 0x000000ff) << 24)) + +#define DEV_READ32(_d, _a, _p) \ + do { \ + uint32_t _data; \ + _data = (((volatile uint32_t *)(_d)->base_addr)[(_a)/4]); \ + *(_p) = CMIC_SWAP32(_data); \ + } while(0) + +#define DEV_WRITE32(_d, _a, _v) \ + do { \ + uint32_t _data = CMIC_SWAP32(_v); \ + ((volatile uint32_t *)(_d)->base_addr)[(_a)/4] = (_data); \ + } while(0) + +#else + +#define DEV_READ32(_d, _a, _p) \ + do { \ + *(_p) = (((volatile uint32_t *)(_d)->base_addr)[(_a)/4]); \ + } while(0) + +#define DEV_WRITE32(_d, _a, _v) \ + do { \ + ((volatile uint32_t *)(_d)->base_addr)[(_a)/4] = (_v); \ + } while(0) +#endif /* defined(CMIC_SOFT_BYTE_SWAP) */ + +static void +ptp_usleep(int usec) +{ + if (DEVICE_IS_DNX) { + udelay(usec); + } else { + usleep_range(usec,usec+1); + } +} + +static void +ptp_sleep(int jiffies) +{ + wait_queue_head_t wq; + init_waitqueue_head(&wq); + + wait_event_timeout(wq, 0, jiffies); + +} + +#ifdef BDE_EDK_SUPPORT +static void bksync_hostcmd_data_op(int setget, u64 *d1, u64 *d2) +{ + u32 w0, w1; + u64 data; + + if (!d1) { + return; + } + + if (setget) { + if (d1) { + data = *d1; + ptp_priv->fw_comm->dw1[0] = (data & 0xFFFFFFFF); + ptp_priv->fw_comm->dw1[1] = (data >> 32); + } + + if (d2) { + data = *d2; + ptp_priv->fw_comm->dw2[0] = (data & 0xFFFFFFFF); + ptp_priv->fw_comm->dw2[1] = (data >> 32); + } + + } else { + if (d1) { + w0 = ptp_priv->fw_comm->dw1[0]; + w1 = ptp_priv->fw_comm->dw1[1]; + data = (((u64)w1 << 32) | (w0)); + *d1 = data; + } + + if (d2) { + w0 = ptp_priv->fw_comm->dw2[0]; + w1 = ptp_priv->fw_comm->dw2[1]; + data = (((u64)w1 << 32) | (w0)); + *d2 = data; + } + } +} +#else +static void bksync_hostcmd_data_op(int setget, u64 *d1, u64 *d2) +{ + u32 w0, w1; + u64 data; + + if (!d1) { + return; + } + + if (setget) { + if (d1) { + data = *d1; + w0 = (data & 0xFFFFFFFF); + w1 = (data >> 32); + DEV_WRITE32(ptp_priv, hostcmd_regs[1], w0); + DEV_WRITE32(ptp_priv, hostcmd_regs[2], w1); + } + + if (d2) { + data = *d2; + + w0 = (data & 0xFFFFFFFF); + w1 = (data >> 32); + DEV_WRITE32(ptp_priv, hostcmd_regs[3], w0); + DEV_WRITE32(ptp_priv, hostcmd_regs[4], w1); + } + } else { + if (d1) { + DEV_READ32(ptp_priv, hostcmd_regs[1], &w0); + DEV_READ32(ptp_priv, hostcmd_regs[2], &w1); + data = (((u64)w1 << 32) | (w0)); + *d1 = data; + } + + if (d2) { + DEV_READ32(ptp_priv, hostcmd_regs[3], &w0); + DEV_READ32(ptp_priv, hostcmd_regs[4], &w1); + data = (((u64)w1 << 32) | (w0)); + *d2 = data; + } + } +} +#endif + +static int bksync_cmd_go(u32 cmd, void *data0, void *data1) +{ + int ret = -1; + int retry_cnt = (1000); /* 1ms default timeout for hostcmd response */ + u32 cmd_status; + char cmd_str[30]; + int port = 0; + uint32_t seq_id = 0; + ktime_t start, now; + u32 subcmd = 0; + + if (ptp_priv == NULL || ptp_priv->shared_addr == NULL) { + return ret; + } + + mutex_lock(&ptp_priv->ptp_lock); + + if (cmd == BKSYNC_GET_TSTIME || cmd == BKSYNC_ACK_TSTIME) { + port = *((uint64_t *)data0) & 0xFFF; + seq_id = *((uint64_t*)data0) >> 16; + } + start = ktime_get(); + + ptp_priv->shared_addr->ksyncinit = cmd; + + /* init data */ +#ifdef BDE_EDK_SUPPORT + ptp_priv->fw_comm->dw1[0] = 0; + ptp_priv->fw_comm->dw1[1] = 0; + ptp_priv->fw_comm->dw2[0] = 0; + ptp_priv->fw_comm->dw2[1] = 0; +#else + DEV_WRITE32(ptp_priv, hostcmd_regs[1], 0x0); + DEV_WRITE32(ptp_priv, hostcmd_regs[2], 0x0); + DEV_WRITE32(ptp_priv, hostcmd_regs[3], 0x0); + DEV_WRITE32(ptp_priv, hostcmd_regs[4], 0x0); +#endif + + switch (cmd) { + case BKSYNC_INIT: + retry_cnt = (retry_cnt * 4); + snprintf(cmd_str, sizeof(cmd_str), "KSYNC_INIT"); + ptp_priv->shared_addr->phase_offset = 0; + bksync_hostcmd_data_op(1, (u64 *)&(ptp_priv->shared_addr->phase_offset), 0); + break; + case BKSYNC_FREQCOR: + snprintf(cmd_str, sizeof(cmd_str), "KSYNC_FREQCORR"); + ptp_priv->shared_addr->freqcorr = *((s32 *)data0); + bksync_hostcmd_data_op(1, (u64 *)&(ptp_priv->shared_addr->freqcorr), 0); + break; + case BKSYNC_ADJTIME: + snprintf(cmd_str, sizeof(cmd_str), "KSYNC_ADJTIME"); + ptp_priv->shared_addr->phase_offset = *((s64 *)data0); + bksync_hostcmd_data_op(1, (u64 *)&(ptp_priv->shared_addr->phase_offset), 0); + break; + case BKSYNC_GETTIME: + retry_cnt = (retry_cnt * 2); + snprintf(cmd_str, sizeof(cmd_str), "KSYNC_GETTIME"); + break; + case BKSYNC_GET_TSTIME: + snprintf(cmd_str, sizeof(cmd_str), "KSYNC_GET_TSTIME"); + bksync_hostcmd_data_op(1, data0, data1); + break; + case BKSYNC_ACK_TSTIME: + retry_cnt = (retry_cnt * 2); + snprintf(cmd_str, sizeof(cmd_str), "KSYNC_ACK_TSTIME"); + bksync_hostcmd_data_op(1, data0, data1); + break; + case BKSYNC_SETTIME: + snprintf(cmd_str, sizeof(cmd_str), "KSYNC_SETTIME"); + ptp_priv->shared_addr->ptptime = *((s64 *)data0); + ptp_priv->shared_addr->phase_offset = 0; + bksync_hostcmd_data_op(1, (u64 *)&(ptp_priv->shared_addr->ptptime), (u64 *)&(ptp_priv->shared_addr->phase_offset)); + break; + case BKSYNC_MTP_TS_UPDATE_ENABLE: + retry_cnt = (retry_cnt * 6); + snprintf(cmd_str, sizeof(cmd_str), "KSYNC_MTP_TS_UPDATE_ENABLE"); + bksync_hostcmd_data_op(1, (u64 *)data0, 0); + break; + case BKSYNC_MTP_TS_UPDATE_DISABLE: + retry_cnt = (retry_cnt * 6); + snprintf(cmd_str, sizeof(cmd_str), "KSYNC_MTP_TS_UPDATE_DISABLE"); + bksync_hostcmd_data_op(1, (u64 *)data0, 0); + break; + case BKSYNC_DEINIT: + retry_cnt = (retry_cnt * 4); + snprintf(cmd_str, sizeof(cmd_str), "KSYNC_DEINIT"); + break; + case BKSYNC_SYSINFO: + snprintf(cmd_str, sizeof(cmd_str), "KSYNC_SYSINFO"); + bksync_hostcmd_data_op(1, (u64 *)data0, (u64 *)data1); + break; + case BKSYNC_BROADSYNC: + subcmd = *((u32 *)data0); + snprintf(cmd_str, sizeof(cmd_str), "KSYNC_BROADSYNC"); + bksync_hostcmd_data_op(1, (u64 *)data0, (u64 *)data1); + break; + case BKSYNC_GPIO: + snprintf(cmd_str, sizeof(cmd_str), "KSYNC_GPIO"); + bksync_hostcmd_data_op(1, (u64 *)data0, (u64 *)data1); + break; + case BKSYNC_EVLOG: + snprintf(cmd_str, sizeof(cmd_str), "KSYNC_EVLOG"); + bksync_hostcmd_data_op(1, (u64 *)data0, (u64 *)data1); + break; + case BKSYNC_EXTTSLOG: + snprintf(cmd_str, sizeof(cmd_str), "KSYNC_EXTTSLOG"); + bksync_hostcmd_data_op(1, (u64 *)data0, (u64 *)data1); + break; +#ifdef BDE_EDK_SUPPORT + case BKSYNC_GET_EXTTS_BUFF: + snprintf(cmd_str, sizeof(cmd_str), "BKSYNC_GET_EXTTS_BUFF"); + bksync_hostcmd_data_op(1, (u64 *)data0, (u64 *)data1); + break; +#endif + case BKSYNC_GPIO_PHASEOFFSET: + snprintf(cmd_str, sizeof(cmd_str), "BKSYNC_GPIO_PHASEOFFSET"); + bksync_hostcmd_data_op(1, (u64 *)data0, (u64 *)data1); + break; + default: + snprintf(cmd_str, sizeof(cmd_str), "KSYNC_XXX"); + break; + } + +#ifdef BDE_EDK_SUPPORT + ptp_priv->fw_comm->cmd = cmd; +#else + DEV_WRITE32(ptp_priv, hostcmd_regs[0], ptp_priv->shared_addr->ksyncinit); +#endif + + do { +#ifdef BDE_EDK_SUPPORT + cmd_status = ptp_priv->fw_comm->cmd; +#else + DEV_READ32(ptp_priv, hostcmd_regs[0], &cmd_status); + ptp_priv->shared_addr->ksyncinit = cmd_status; +#endif + + if (cmd_status == BKSYNC_DONE) { + ret = 0; + switch (cmd) { + case BKSYNC_GET_TSTIME: + case BKSYNC_GETTIME: +#ifndef BDE_EDK_SUPPORT + { + u64 d0 = 0ULL; + u64 d1 = 0ULL; + int retry2_cnt = 3; + *(u64 *)data0 = 0ULL; + *(u64 *)data1 = 0ULL; + do { + bksync_hostcmd_data_op(0, &d0, &d1); + *(u64 *)data0 |= d0; + *(u64 *)data1 |= d1; + if (((*(u64 *)data0) & 0xFFFFFFFF) && ((*(u64 *)data0)>>32) && + ((*(u64 *)data1) & 0xFFFFFFFF) && ((*(u64 *)data1)>>32)) { + break; + } + retry2_cnt--; + ptp_usleep(1); + } while (retry2_cnt); + if (retry2_cnt == 0) + ret = -1; + } + break; +#else + bksync_hostcmd_data_op(0, (u64 *)data0, (u64 *)data1); + break; +#endif + case BKSYNC_BROADSYNC: + if ((subcmd == KSYNC_BROADSYNC_BS0_STATUS_GET) || + (subcmd == KSYNC_BROADSYNC_BS1_STATUS_GET)) { + bksync_hostcmd_data_op(0, (u64 *)data0, (u64 *)data1); + } + break; +#ifdef BDE_EDK_SUPPORT + /* Get the host ram address from fw.*/ + case BKSYNC_GET_EXTTS_BUFF: + bksync_hostcmd_data_op(0, (u64 *)data0, (u64 *)data1); + break; +#endif + default: + break; + } + break; + } + ptp_usleep(100); + retry_cnt--; + } while (retry_cnt); + + now = ktime_get(); + mutex_unlock(&ptp_priv->ptp_lock); + + if (retry_cnt == 0) { + DBG_ERR(("Timeout on response from R5 to cmd %s time taken %lld us\n", cmd_str, ktime_us_delta(now, start))); + if (cmd == BKSYNC_GET_TSTIME) { + DBG_ERR(("2step timestamp get timeout for port:%d seq_id:%d\n", port, seq_id)); + } + } + + if (debug & DBG_LVL_CMDS) { + if (ktime_us_delta(now, start) > 5000) + DBG_CMDS(("R5 Command %s exceeded time expected (%lld us)\n", cmd_str, ktime_us_delta(now, start))); + } + + DBG_CMDS(("bksync_cmd_go: cmd:%s rv:%d\n", cmd_str, ret)); + + return ret; +} + +/** + * bksync_ptp_adjfreq + * + * @ptp: pointer to ptp_clock_info structure + * @ppb: frequency correction value + * + * Description: this function will set the frequency correction + */ +static int bksync_ptp_adjfreq(struct ptp_clock_info *ptp, s32 ppb) +{ + int ret = -1; + + ret = bksync_cmd_go(BKSYNC_FREQCOR, &ppb, NULL); + DBG_VERB(("ptp_adjfreq: applying freq correction: %x; rv:%d\n", ppb, ret)); + + return ret; +} + +/** + * bksync_ptp_adjtime + * + * @ptp: pointer to ptp_clock_info structure + * @delta: desired change in nanoseconds + * + * Description: this function will shift/adjust the hardware clock time. + */ +static int bksync_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta) +{ + int ret = -1; + + ret = bksync_cmd_go(BKSYNC_ADJTIME, (void *)&delta, NULL); + DBG_VERB(("ptp_adjtime: adjtime: 0x%llx; rv:%d\n", delta, ret)); + + return ret; +} + +/** + * bksync_ptp_gettime + * + * @ptp: pointer to ptp_clock_info structure + * @ts: pointer to hold time/result + * + * Description: this function will read the current time from the + * hardware clock and store it in @ts. + */ +static int bksync_ptp_gettime(struct ptp_clock_info *ptp, struct timespec64 *ts) +{ + int ret = -1; + s64 reftime = 0; + s64 refctr = 0; + static u64 prv_reftime = 0, prv_refctr = 0; + u64 diff_reftime = 0, diff_refctr = 0; + + ret = bksync_cmd_go(BKSYNC_GETTIME, (void *)&reftime, (void *)&refctr); + if (ret == 0) { + DBG_VERB(("ptp_gettime: gettime: 0x%llx refctr:0x%llx\n", reftime, refctr)); + + ptp_priv->shared_addr->ptptime_alt = ptp_priv->shared_addr->ptptime; + ptp_priv->shared_addr->reftime_alt = ptp_priv->shared_addr->reftime; + + ptp_priv->ptp_pair_lock = 1; + ptp_priv->shared_addr->ptptime = reftime; + ptp_priv->shared_addr->reftime = refctr; + ptp_priv->ptp_pair_lock = 0; + + diff_reftime = reftime - prv_reftime; + diff_refctr = refctr - prv_refctr; + + if (diff_reftime != diff_refctr) { + DBG_WARN(("PTP-GETTIME ptptime: 0x%llx reftime: 0x%llx prv_ptptime: 0x%llx prv_reftime: 0x%llx \n", + ptp_priv->shared_addr->ptptime, ptp_priv->shared_addr->reftime, diff_reftime, diff_refctr)); + } + prv_reftime = reftime; + prv_refctr = refctr; + + *ts = ns_to_timespec64(reftime); + } + return ret; +} + + +/** + * bksync_ptp_settime + * + * @ptp: pointer to ptp_clock_info structure + * @ts: time value to set + * + * Description: this function will set the current time on the + * hardware clock. + */ +static int bksync_ptp_settime(struct ptp_clock_info *ptp, + const struct timespec64 *ts) +{ + s64 reftime, phaseadj; + int ret = -1; + + phaseadj = 0; + reftime = timespec64_to_ns(ts); + + ret = bksync_cmd_go(BKSYNC_SETTIME, (void *)&reftime, (void *)&phaseadj); + DBG_VERB(("ptp_settime: settime: 0x%llx; rv:%d\n", reftime, ret)); + + return ret; +} + +static int bksync_exttslog_cmd(int event, int enable) +{ + int ret; + u64 subcmd = 0, subcmd_data = 0; + +#ifdef BDE_EDK_SUPPORT + if (NULL == ptp_priv->extts_log) { + ret = bksync_cmd_go(BKSYNC_GET_EXTTS_BUFF, + &subcmd, &subcmd_data); + DBG_VERB(("bksync_exttslog_cmd: Get EXTTS buff: \ + subcmd_data:0x%llx\n", subcmd_data)); + + ptp_priv->extts_log = + (bksync_fw_extts_log_t *)lkbde_edk_dmamem_map_p2v(subcmd_data); + if (NULL == ptp_priv->extts_log) { + DBG_ERR(("EXTTS failed to get virtual addr for the physical address\n")); + } + } +#else + subcmd_data = ptp_priv->extts_dma_mem_addr; +#endif + + /* upper 32b -> event + * lower 32b -> enable/disable */ + subcmd = (u64)event << 32 | enable; + + ret = bksync_cmd_go(BKSYNC_EXTTSLOG, &subcmd, &subcmd_data); + DBG_VERB(("bksync_evlog_cmd: subcmd: 0x%llx subcmd_data: 0x%llx rv:%d\n", subcmd, subcmd_data, ret)); + + return ret; +} + +static int bksync_ptp_enable(struct ptp_clock_info *ptp, + struct ptp_clock_request *rq, int on) +{ + int mapped_event = -1; + int enable = on ? 1 : 0; + + switch (rq->type) { + case PTP_CLK_REQ_EXTTS: + if (rq->extts.index < NUM_EXT_TS) { + switch (rq->extts.index) { + /* Map EXTTS event_id to FW event_id */ + case 0: + mapped_event = TS_EVENT_GPIO_1; + break; + case 1: + mapped_event = TS_EVENT_GPIO_2; + break; + case 2: + mapped_event = TS_EVENT_GPIO_3; + break; + case 3: + mapped_event = TS_EVENT_GPIO_4; + break; + case 4: + mapped_event = TS_EVENT_GPIO_5; + break; + case 5: + mapped_event = TS_EVENT_GPIO_6; + break; + default: + return -EINVAL; + } + + /* Reject request for unsupported flags */ + if (rq->extts.flags & ~(PTP_ENABLE_FEATURE | PTP_RISING_EDGE)) { + return -EOPNOTSUPP; + } + + ptp_priv->extts_event.enable[rq->extts.index] = enable; + + bksync_exttslog_cmd(mapped_event, enable); + + DBG_VERB(("Event state change req_index:%u state:%d\n", + rq->extts.index, enable)); + } else { + return -EINVAL; + } + break; + default: + return -EOPNOTSUPP; + } + + return 0; +} + + +static int bksync_ptp_mirror_encap_update(struct ptp_clock_info *ptp, + int mtp_idx, int start) +{ + int ret = -1; + u64 mirror_encap_idx; + u32 cmd_status; + + if (mtp_idx > BCMKSYNC_MAX_MTP_IDX) { + return ret; + } + + mirror_encap_idx = mtp_idx; + if (start) { + cmd_status = BKSYNC_MTP_TS_UPDATE_ENABLE; + ptp_priv->mirror_encap_bmp |= (1 << mtp_idx); + } else { + if (!(ptp_priv->mirror_encap_bmp & mtp_idx)) { + /* Not running */ + return ret; + } + cmd_status = BKSYNC_MTP_TS_UPDATE_DISABLE; + ptp_priv->mirror_encap_bmp &= ~mtp_idx; + } + + ret = bksync_cmd_go(cmd_status, &mirror_encap_idx, NULL); + DBG_VERB(("mirror_encap_update: %d, mpt_index: %d, ret:%d\n", start, mtp_idx, ret)); + + return ret; + +} + +/* structure describing a PTP hardware clock */ +static struct ptp_clock_info bksync_ptp_caps = { + .owner = THIS_MODULE, + .name = "bksync_ptp_clock", + .max_adj = 200000, + .n_alarm = 0, + .n_ext_ts = NUM_EXT_TS, + .n_per_out = 0, /* will be overwritten in bksync_ptp_register */ + .n_pins = 0, + .pps = 0, + .adjfreq = bksync_ptp_adjfreq, + .adjtime = bksync_ptp_adjtime, + .gettime64 = bksync_ptp_gettime, + .settime64 = bksync_ptp_settime, + .enable = bksync_ptp_enable, +}; + +/** + * bksync_ptp_hw_tstamp_enable + * + * @dev_no: device number + * @port: port number + * + * Description: this is a callback function to enable the timestamping on + * a given port + */ +int bksync_ptp_hw_tstamp_enable(int dev_no, int port, int tx_type) +{ + uint64_t portmap = 0; + int map = 0; + int ret = 0; + + if (!module_initialized) { + ret = -1; + goto exit; + } + + if (tx_type == HWTSTAMP_TX_ONESTEP_SYNC) { + DBG_VERB(("hw_tstamp_enable: Enabling 1-step(type:%d) TS on port:%d\n", tx_type, port)); + bksync_ptp_time_keep_init(); + goto exit; + } + + DBG_VERB(("hw_tstamp_enable: Enabling 2-step(type:%d) TS on port:%d\n", tx_type, port)); + if (port <= 0) { + DBG_ERR(("hw_tstamp_enable: Error enabling 2-step timestamp on port:%d\n", port)); + ret = -1; + goto exit; + } + + /* Update the shared structure member */ + if (ptp_priv->shared_addr) { + if ((port > 0) && (port < BCMKSYNC_MAX_NUM_PORTS)) { + port -= 1; + map = (port / 64); + port = (port % 64); + + portmap = ptp_priv->shared_addr->portmap[map]; + portmap |= (uint64_t)0x1 << port; + ptp_priv->shared_addr->portmap[map] = portmap; + + /* Command to R5 for the update */ + ptp_priv->shared_addr->ksyncinit=BKSYNC_PBM_UPDATE; + + } + } + +exit: + return ret; +} + +/** + * bksync_ptp_hw_tstamp_disable + * + * @dev_no: device number + * @port: port number + * + * Description: this is a callback function to disable the timestamping on + * a given port + */ +int bksync_ptp_hw_tstamp_disable(int dev_no, int port, int tx_type) +{ + uint64_t portmap = 0; + int map = 0; + int ret = 0; + + if (!module_initialized) { + ret = -1; + goto exit; + } + + if (tx_type == HWTSTAMP_TX_ONESTEP_SYNC) { + DBG_VERB(("hw_tstamp_disable: Disable 1Step TS(type:%d) port = %d\n", tx_type, port)); + goto exit; + } + + DBG_VERB(("hw_tstamp_disable: Disable 2Step TS(type:%d) port = %d\n", tx_type, port)); + if (port <= 0) { + DBG_ERR(("hw_tstamp_disable: Error disabling timestamp on port:%d\n", port)); + ret = -1; + goto exit; + } + + /* Update the shared structure member */ + if (ptp_priv->shared_addr) { + if ((port > 0) && (port < BCMKSYNC_MAX_NUM_PORTS)) { + port -= 1; + map = (port / 64); + port = (port % 64); + + portmap = ptp_priv->shared_addr->portmap[map]; + portmap &= ~((uint64_t)0x1 << port); + ptp_priv->shared_addr->portmap[map]= portmap; + + /* Command to R5 for the update */ + ptp_priv->shared_addr->ksyncinit = BKSYNC_PBM_UPDATE; + } + } + +exit: + return ret; +} + +int bksync_ptp_transport_get(uint8_t *pkt) +{ + int transport = 0; + uint16_t ethertype; + uint16_t tpid; + int tpid_offset, ethype_offset; + + /* Need to check VLAN tag if packet is tagged */ + tpid_offset = 12; + tpid = pkt[tpid_offset] << 8 | pkt[tpid_offset + 1]; + if (tpid == 0x8100) { + ethype_offset = tpid_offset + 4; + } else { + ethype_offset = tpid_offset; + } + + ethertype = pkt[ethype_offset] << 8 | pkt[ethype_offset+1]; + + switch (ethertype) { + case 0x88f7: /* ETHERTYPE_PTPV2 */ + transport = 2; + break; + + case 0x0800: /* ETHERTYPE_IPV4 */ + transport = 4; + break; + + case 0x86DD: /* ETHERTYPE_IPV6 */ + transport = 6; + break; + + default: + transport = 0; + } + + return transport; +} + +static int +bksync_txpkt_tsts_tsamp_get(int port, uint32_t pkt_seq_id, uint32_t *ts_valid, uint32_t *seq_id, uint64_t *timestamp) +{ + int ret = 0; + uint64_t data=0ULL; + u32 fifo_rxctr = 0; + + *ts_valid = 0; + *timestamp = 0ULL; + *seq_id = 0; + + data = (port & 0xFFFF) | ((pkt_seq_id & 0xFFFF) << 16); + + ret = bksync_cmd_go(BKSYNC_GET_TSTIME, &data, timestamp); + if (ret >= 0) { + *ts_valid = data & 0x1ULL; + *seq_id = (data >> 16) & 0xFFFF; + fifo_rxctr = (data >> 32) & 0xFFFFFFFF; + if (*ts_valid) { + data = (port & 0xFFFF) | ((pkt_seq_id & 0xFFFF) << 16); + ret = bksync_cmd_go(BKSYNC_ACK_TSTIME, &data, 0ULL); + if (ret >= 0) { + if (fifo_rxctr != 0) { + if (fifo_rxctr != (ptp_priv->port_stats[port].fifo_rxctr + 1)) { + DBG_ERR(("FW reset or lost timestamp FIFO_RxCtr:" + "(Prev %u : Current %u) port:%d pkt_sn:%u hw_sn:%u \n", + ptp_priv->port_stats[port].fifo_rxctr, + fifo_rxctr, port, pkt_seq_id, *seq_id)); + } + ptp_priv->port_stats[port].fifo_rxctr = fifo_rxctr; + } + } else { + DBG_ERR(("BKSYNC_ACK_TSTIME failed on port:%d sn:%d\n", port, pkt_seq_id)); + } + } else { + DBG_ERR(("BKSYNC_GET_TSTIME invalid on port:%d pkt_sn:%d fw_sn:%d fifo:%d prev_fifo:%d\n", + port, pkt_seq_id, *seq_id, fifo_rxctr, + ptp_priv->port_stats[port].fifo_rxctr)); + } + } else { + DBG_ERR(("BKSYNC_GET_TSTIME failed on port:%d sn:%d\n", port, pkt_seq_id)); + } + return ret; +} + +/** + * bksync_ptp_hw_tstamp_tx_time_get + * + * @dev_no: device number + * @port: port number + * @pkt: packet address + * @ts: timestamp to be retrieved + * + * Description: this is a callback function to retrieve the timestamp on + * a given port + * NOTE: + * Two-step related - fetching the timestamp from portmacro, not needed for one-step + */ +int bksync_ptp_hw_tstamp_tx_time_get(int dev_no, int port, uint8_t *pkt, uint64_t *ts, int tx_type) +{ + /* Get Timestamp from R5 or CLMAC */ + uint32_t ts_valid = 0; + uint32_t seq_id = 0; + uint32_t pktseq_id = 0; + uint64_t timestamp = 0; + uint16_t tpid = 0; + ktime_t start; + u64 delta; + int retry_cnt = num_retries; + int seq_id_offset, tpid_offset; + int transport = network_transport; + + start = ktime_get(); + + if (!ptp_priv || !pkt || !ts || port < 1 || port > 255 || ptp_priv->shared_addr == NULL) { + return -1; + } + + *ts = 0; + + /* Linux 5.10.67 kernel complains about missing delay request timestamp for even if + * configuration is for one-step ptp, hence provided ptp time in skb timestamp + */ + if (tx_type == HWTSTAMP_TX_ONESTEP_SYNC) { + if (ptp_priv->ptp_pair_lock == 1) { + /* use alternate pair when main dataset is being updated */ + *ts = ptp_priv->shared_addr->ptptime_alt; + } else { + *ts = ptp_priv->shared_addr->ptptime; + } + ptp_priv->port_stats[port].pkt_txctr += 1; + goto exit; + } + + + tpid_offset = 12; + + /* Parse for nw transport */ + if (transport == 0) { + transport = bksync_ptp_transport_get(pkt); + } + + switch(transport) + { + case 2: + seq_id_offset = 0x2c; + break; + case 4: + seq_id_offset = 0x48; + break; + case 6: + seq_id_offset = 0x5c; + break; + default: + seq_id_offset = 0x2c; + break; + } + + /* Need to check VLAN tag if packet is tagged */ + tpid = pkt[tpid_offset] << 8 | pkt[tpid_offset + 1]; + if (tpid == 0x8100) { + seq_id_offset += 4; + } + + pktseq_id = pkt[seq_id_offset] << 8 | pkt[seq_id_offset + 1]; + + port -= 1; + + DBG_TXTS(("hw_tstamp_tx_time_get: port %d pktseq_id %u\n", port, pktseq_id)); + + /* Fetch the TX timestamp from shadow memory */ + do { + bksync_txpkt_tsts_tsamp_get(port, pktseq_id, &ts_valid, &seq_id, ×tamp); + if (ts_valid) { + + /* Clear the shadow memory to get next entry */ + ptp_priv->shared_addr->port_ts_data[port].timestamp = 0; + ptp_priv->shared_addr->port_ts_data[port].port_id = 0; + ptp_priv->shared_addr->port_ts_data[port].ts_seq_id = 0; + ptp_priv->shared_addr->port_ts_data[port].ts_valid = 0; + + if (seq_id == pktseq_id) { + *ts = timestamp; + ptp_priv->port_stats[port].tsts_match += 1; + + delta = ktime_us_delta(ktime_get(), start); + DBG_TXTS(("Port: %d Skb_SeqID %d FW_SeqId %d and TS:%llx FetchTime %lld retries:%d\n", + port, pktseq_id, seq_id, timestamp, delta, + (num_retries-retry_cnt))); + + if (delta < ptp_priv->port_stats[port].tsts_best_fetch_time || ptp_priv->port_stats[port].tsts_best_fetch_time == 0) { + ptp_priv->port_stats[port].tsts_best_fetch_time = delta; + } + if (delta > ptp_priv->port_stats[port].tsts_worst_fetch_time || ptp_priv->port_stats[port].tsts_worst_fetch_time == 0) { + ptp_priv->port_stats[port].tsts_worst_fetch_time = delta; + } + /* Calculate Moving Average*/ + ptp_priv->port_stats[port].tsts_avg_fetch_time = ((u32)delta + ((ptp_priv->port_stats[port].tsts_match - 1) * ptp_priv->port_stats[port].tsts_avg_fetch_time)) / ptp_priv->port_stats[port].tsts_match; + break; + } else { + DBG_TXTS(("Discard timestamp on port %d Skb_SeqID %d FW_SeqId %d RetryCnt %d TimeLapsed (%lld us)\n", + port, pktseq_id, seq_id, (num_retries - retry_cnt), ktime_us_delta(ktime_get(),start))); + + ptp_priv->port_stats[port].tsts_discard += 1; + continue; + } + } + ptp_usleep(1000); + retry_cnt--; + } while(retry_cnt); + + + ptp_priv->port_stats[port].pkt_txctr += 1; + + if (retry_cnt == 0) { + ptp_priv->port_stats[port].tsts_timeout += 1; + DBG_ERR(("FW Response timeout: Tx TS on phy port:%d Skb_SeqID: %d TimeLapsed (%lld us)\n", + port, pktseq_id, ktime_us_delta(ktime_get(), start))); + } + +exit: + return 0; +} + + +enum { + bxconCustomEncapVersionInvalid = 0, + bxconCustomEncapVersionOne = 1, + + bxconCustomEncapVersionCurrent = bxconCustomEncapVersionOne, + bxconCustomEncapVersionReserved = 255 /* last */ +} bxconCustomEncapVersion; + +enum { + bxconCustomEncapOpcodeInvalid = 0, + bxconCustomEncapOpcodePtpRx = 1, + bxconCustomEncapOpcodeReserved = 255 /* last */ +} bxconCustomEncapOpcode; + +enum { + bxconCustomEncapPtpRxTlvInvalid = 0, + bxconCustomEncapPtpRxTlvPtpRxTime = 1, + bxconCustomEncapPtpRxTlvReserved = 255 /* last */ +} bxconCustomEncapPtpRxTlvType; + +static void +dbg_dump_pkt(uint8_t *data, int size) +{ + int idx; + char str[128]; + + for (idx = 0; idx < size; idx++) { + if ((idx & 0xf) == 0) { + sprintf(str, "%04x: ", idx); + } + sprintf(&str[strlen(str)], "%02x ", data[idx]); + if ((idx & 0xf) == 0xf) { + sprintf(&str[strlen(str)], "\n"); + gprintk("%s", str); + } + } + if ((idx & 0xf) != 0) { + sprintf(&str[strlen(str)], "\n"); + gprintk("%s", str); + } +} + +/* onesync_dnx_jr2_parse_rxpkt_system_header : This function parses DNX system headers based + * on JR2 system headers format + */ +void bksync_dnxjr2_parse_rxpkt_system_header(uint8_t *raw_pkt_frame, bksync_dnx_rx_pkt_parse_info_t *rx_pkt_parse_info, int isfirsthdr) +{ + bksync_dnxjr2_ftmh_base_header_t *ftmh_base_hdr = NULL; + bksync_dnxjr2_timestamp_header_t *timestamp_hdr = NULL; + bksync_dnxjr2_udh_base_header_t *udh_base_header = NULL; + bksync_dnxjr2_ftmh_app_spec_ext_1588v2_t *ftmp_app_spec_ext_1588v2_hdr = NULL; + bksync_dnxjr2_pph_fheiext_vlanedit_3b_header_t *fheiext_vlanedit_3b_hdr = NULL; + bksync_dnxjr2_pph_fheiext_vlanedit_5b_header_t *fheiext_vlanedit_5b_hdr = NULL; + bksync_dnxjr2_pph_base_12b_header_t *pph_base_12b_hdr = NULL; + uint8_t raw_frame[64]; + int tmp = 0; + + + rx_pkt_parse_info->rx_frame_len = 0; + rx_pkt_parse_info->dnx_header_offset = 0; + rx_pkt_parse_info->pph_header_vlan = 0; + rx_pkt_parse_info->rx_hw_timestamp = 0; + rx_pkt_parse_info->src_sys_port = 0; + + for (tmp = 0; tmp < 64; tmp++) { + raw_frame[tmp] = raw_pkt_frame[tmp]; + } + + /* FTMH */ + ftmh_base_hdr = (bksync_dnxjr2_ftmh_base_header_t *)(&raw_frame[rx_pkt_parse_info->dnx_header_offset]); + ftmh_base_hdr->words[0] = ntohl(ftmh_base_hdr->words[0]); + ftmh_base_hdr->words[1] = ntohl(ftmh_base_hdr->words[1]); + + rx_pkt_parse_info->src_sys_port = (uint16_t)(ftmh_base_hdr->src_sys_port_aggr_0 << 9 | ftmh_base_hdr->src_sys_port_aggr_1 << 1 | ftmh_base_hdr->src_sys_port_aggr_2); + rx_pkt_parse_info->rx_frame_len = (uint16_t)(ftmh_base_hdr->packet_size_0 << 6 | ftmh_base_hdr->packet_size_1); + + rx_pkt_parse_info->dnx_header_offset += BKSYNC_DNXJR2_FTMH_HDR_LEN; + + /* FTMH LB-Key Extension */ + if ((ptp_priv->bksync_jr2devs_sys_info).ftmh_lb_key_ext_size > 0) { + rx_pkt_parse_info->dnx_header_offset += (ptp_priv->bksync_jr2devs_sys_info).ftmh_lb_key_ext_size; + } + + /* FTMH Stacking Extension */ + if ((ptp_priv->bksync_jr2devs_sys_info).ftmh_stacking_ext_size > 0) { + rx_pkt_parse_info->dnx_header_offset += (ptp_priv->bksync_jr2devs_sys_info).ftmh_stacking_ext_size; + } + + /* FTMH BIER BFR Extension */ + if (ftmh_base_hdr->bier_bfr_ext_size > 0) { + rx_pkt_parse_info->dnx_header_offset += BKSYNC_DNXJR2_FTMH_BEIR_BFR_EXT_LEN; + + } + + /* FTMH TM Destination Extension */ + if (ftmh_base_hdr->tm_dest_ext_repsent > 0) { + rx_pkt_parse_info->dnx_header_offset += BKSYNC_DNXJR2_FTMH_TM_DEST_EXT_LEN; + + } + + /* FTMH Application Specific Extension */ + if (ftmh_base_hdr->app_specific_ext_size > 0) { + ftmp_app_spec_ext_1588v2_hdr = (bksync_dnxjr2_ftmh_app_spec_ext_1588v2_t*)(&raw_frame[rx_pkt_parse_info->dnx_header_offset]); + ftmp_app_spec_ext_1588v2_hdr->word = ntohl(ftmp_app_spec_ext_1588v2_hdr->word); + + if (ftmp_app_spec_ext_1588v2_hdr->type == bksync_dnxjr2_ftmh_app_spec_ext_type_1588v2) { + } + + rx_pkt_parse_info->dnx_header_offset += BKSYNC_DNXJR2_FTMH_APP_SPECIFIC_EXT_LEN; + + } + + /* FTMH Latency-Flow-ID Extension */ + if (ftmh_base_hdr->flow_id_ext_size > 0) { + rx_pkt_parse_info->dnx_header_offset += BKSYNC_DNXJR2_FTMH_FLOWID_EXT_LEN ; + + } + + /* Time-stamp Header */ + if ((ftmh_base_hdr->pph_type == BKSYNC_DNXJR2_PPH_TYPE_TSH_ONLY) || + (ftmh_base_hdr->pph_type == BKSYNC_DNXJR2_PPH_TYPE_PPH_BASE_TSH) ) { + + timestamp_hdr = (bksync_dnxjr2_timestamp_header_t* )(&raw_frame[rx_pkt_parse_info->dnx_header_offset]); + timestamp_hdr->word = ntohl(timestamp_hdr->word); + + rx_pkt_parse_info->rx_hw_timestamp = timestamp_hdr->timestamp; + rx_pkt_parse_info->dnx_header_offset += BKSYNC_DNXJR2_TSH_HDR_SIZE; + + } + + /* PPH - internal header */ + if ((ftmh_base_hdr->pph_type == BKSYNC_DNXJR2_PPH_TYPE_PPH_BASE) || + (ftmh_base_hdr->pph_type == BKSYNC_DNXJR2_PPH_TYPE_PPH_BASE_TSH)) { + + pph_base_12b_hdr = (bksync_dnxjr2_pph_base_12b_header_t*)(&raw_frame[rx_pkt_parse_info->dnx_header_offset]); + + pph_base_12b_hdr->word[0] = ntohl(pph_base_12b_hdr->word[0]); + pph_base_12b_hdr->word[1] = ntohl(pph_base_12b_hdr->word[1]); + pph_base_12b_hdr->word[2] = ntohl(pph_base_12b_hdr->word[2]); + + rx_pkt_parse_info->dnx_header_offset += (ptp_priv->bksync_jr2devs_sys_info).pph_base_size; + + + /* PPH fhei_size handling */ + if (pph_base_12b_hdr->fhei_size > BKSYNC_DNXJR2_PPH_FHEI_TYPE_NONE) { + + switch(pph_base_12b_hdr->fhei_size) { + case BKSYNC_DNXJR2_PPH_FHEI_TYPE_SZ0: /* 3byte */ + fheiext_vlanedit_3b_hdr = (bksync_dnxjr2_pph_fheiext_vlanedit_3b_header_t*)(&raw_frame[rx_pkt_parse_info->dnx_header_offset]); + + if(fheiext_vlanedit_3b_hdr->type == bksync_dnxjr2_pph_fheiext_type_vlanedit) { + rx_pkt_parse_info->pph_header_vlan = fheiext_vlanedit_3b_hdr->edit_vid1_0 << 7 | fheiext_vlanedit_3b_hdr->edit_vid1_1; + } + rx_pkt_parse_info->dnx_header_offset += BKSYNC_DNXJR2_PPH_FHEI_SZ0_SIZE; + break; + case BKSYNC_DNXJR2_PPH_FHEI_TYPE_SZ1: /* 5byte */ + fheiext_vlanedit_5b_hdr = (bksync_dnxjr2_pph_fheiext_vlanedit_5b_header_t*)(&raw_frame[rx_pkt_parse_info->dnx_header_offset]); + + if (fheiext_vlanedit_5b_hdr->type == bksync_dnxjr2_pph_fheiext_type_vlanedit) { + rx_pkt_parse_info->pph_header_vlan = fheiext_vlanedit_5b_hdr->edit_vid1_0 << 7 | fheiext_vlanedit_5b_hdr->edit_vid1_1; + } else if (fheiext_vlanedit_5b_hdr->type == bksync_dnxjr2_pph_fheiext_type_trap_snoop_mirror) { + } + rx_pkt_parse_info->dnx_header_offset += BKSYNC_DNXJR2_PPH_FHEI_SZ1_SIZE; + break; + case BKSYNC_DNXJR2_PPH_FHEI_TYPE_SZ2: /* 8byte */ + rx_pkt_parse_info->dnx_header_offset += BKSYNC_DNXJR2_PPH_FHEI_SZ2_SIZE; + break; + default: + break; + } + } + + /* PPH LIF Extension */ + if ((pph_base_12b_hdr->lif_ext_type > 0) && (pph_base_12b_hdr->lif_ext_type < BKSYNC_DNXJER2_PPH_LIF_EXT_TYPE_MAX)) { + rx_pkt_parse_info->dnx_header_offset += (ptp_priv->bksync_jr2devs_sys_info).pph_lif_ext_size[pph_base_12b_hdr->lif_ext_type]; + } + + /* PPH Learn Extension */ + if (pph_base_12b_hdr->learn_ext_present) { + rx_pkt_parse_info->dnx_header_offset += BKSYNC_DNXJR2_PPH_LEARN_EXT_SIZE; + } + } + + /* UDH header */ + if (!isfirsthdr) { + if ((ptp_priv->bksync_jr2devs_sys_info).udh_enable) { + udh_base_header = (bksync_dnxjr2_udh_base_header_t* )(&raw_frame[rx_pkt_parse_info->dnx_header_offset]); + + rx_pkt_parse_info->dnx_header_offset += BKSYNC_DNXJR2_UDH_BASE_HEADER_LEN; + /* Need to understand more */ + rx_pkt_parse_info->dnx_header_offset += (ptp_priv->bksync_jr2devs_sys_info).udh_data_lenght_per_type[udh_base_header->udh_data_type_0]; + rx_pkt_parse_info->dnx_header_offset += (ptp_priv->bksync_jr2devs_sys_info).udh_data_lenght_per_type[udh_base_header->udh_data_type_1]; + rx_pkt_parse_info->dnx_header_offset += (ptp_priv->bksync_jr2devs_sys_info).udh_data_lenght_per_type[udh_base_header->udh_data_type_2]; + rx_pkt_parse_info->dnx_header_offset += (ptp_priv->bksync_jr2devs_sys_info).udh_data_lenght_per_type[udh_base_header->udh_data_type_3]; + } + } + + DBG_RX(("DNX PKT PARSE: src_sys_port %u rx_hw_timestamp %llx pph_header_vlan %llx dnx_header_offset %u rx_frame_len %d\n", + rx_pkt_parse_info->src_sys_port, rx_pkt_parse_info->rx_hw_timestamp, rx_pkt_parse_info->pph_header_vlan, + rx_pkt_parse_info->dnx_header_offset, rx_pkt_parse_info->rx_frame_len)); + +} + + +static inline int +bksync_pkt_custom_encap_ptprx_get(uint8_t *pkt, uint64_t *ing_ptptime) +{ + uint8_t *custom_hdr; + uint8_t id[4]; + uint8_t ver, opc; + uint8_t nh_type, nh_rsvd; + uint16_t len, tot_len; + uint16_t nh_len; + uint32_t seq_id = 0; + uint32_t ptp_rx_time[2]; + uint64_t u64_ptp_rx_time = 0; + + custom_hdr = pkt; + + BKSYNC_UNPACK_U8(custom_hdr, id[0]); + BKSYNC_UNPACK_U8(custom_hdr, id[1]); + BKSYNC_UNPACK_U8(custom_hdr, id[2]); + BKSYNC_UNPACK_U8(custom_hdr, id[3]); + if (!((id[0] == 'B') && (id[1] == 'C') && (id[2] == 'M') && (id[3] == 'C'))) { + /* invalid signature */ + return -1; + } + + BKSYNC_UNPACK_U8(custom_hdr, ver); + switch (ver) { + case bxconCustomEncapVersionCurrent: + break; + default: + DBG_ERR(("custom_encap_ptprx_get: Invalid ver\n")); + return -1; + } + + BKSYNC_UNPACK_U8(custom_hdr, opc); + switch (opc) { + case bxconCustomEncapOpcodePtpRx: + break; + default: + DBG_ERR(("custom_encap_ptprx_get: Invalid opcode\n")); + return -1; + } + + + BKSYNC_UNPACK_U16(custom_hdr, len); + BKSYNC_UNPACK_U32(custom_hdr, seq_id); + tot_len = len; + + /* remaining length of custom encap */ + len = len - (custom_hdr - pkt); + + + /* process tlv */ + while (len > 0) { + BKSYNC_UNPACK_U8(custom_hdr, nh_type); + BKSYNC_UNPACK_U8(custom_hdr, nh_rsvd); + BKSYNC_UNPACK_U16(custom_hdr, nh_len); + len = len - (nh_len); + if (nh_rsvd != 0x0) { + continue; /* invalid tlv */ + } + + switch (nh_type) { + case bxconCustomEncapPtpRxTlvPtpRxTime: + BKSYNC_UNPACK_U32(custom_hdr, ptp_rx_time[0]); + BKSYNC_UNPACK_U32(custom_hdr, ptp_rx_time[1]); + u64_ptp_rx_time = ((uint64_t)ptp_rx_time[1] << 32) | (uint64_t)ptp_rx_time[0]; + *ing_ptptime = u64_ptp_rx_time; + break; + default: + custom_hdr += nh_len; + break; + } + } + + DBG_RX_DUMP(("custom_encap_ptprx_get: Custom Encap header:\n")); + if (debug & DBG_LVL_RX_DUMP) dbg_dump_pkt(pkt, tot_len); + + DBG_RX(("custom_encap_ptprx_get: ver=%d opcode=%d tot_len=%d seq_id=0x%x\n", ver, opc, tot_len, seq_id)); + + return (tot_len); +} + +/** + * bksync_ptp_hw_tstamp_rx_pre_process + * + * @dev_no: device number + * + * Description: + */ +int bksync_ptp_hw_tstamp_rx_pre_process(int dev_no, uint8_t *pkt, uint32_t sspa, int *pkt_offset) +{ + int ret = -1; + uint64_t ts; + int custom_encap_len = 0; + + bksync_dnx_rx_pkt_parse_info_t rx_pkt_parse_info_1 = {0}, rx_pkt_parse_info_2 = {0}; + + if (sspa == (ptp_priv->bksync_init_info).uc_port_num && pkt_offset == NULL) { + ret = 0; + } + + + if (DEVICE_IS_DNX && pkt_offset == NULL) { + bksync_dnxjr2_parse_rxpkt_system_header(pkt, &rx_pkt_parse_info_1, 1); + bksync_dnxjr2_parse_rxpkt_system_header(pkt + rx_pkt_parse_info_1.dnx_header_offset, &rx_pkt_parse_info_2, 0); + } + + + /* parse custom encap header in pkt for ptp rxtime */ + if (DEVICE_IS_DNX) { + custom_encap_len = bksync_pkt_custom_encap_ptprx_get(pkt + rx_pkt_parse_info_1.dnx_header_offset + + rx_pkt_parse_info_2.dnx_header_offset, &ts); + } else { + custom_encap_len = bksync_pkt_custom_encap_ptprx_get(pkt, &ts); + } + DBG_RX(("hw_tstamp_rx_pre_process: sspa:0x%x cust_encap_len=0x%x\n", sspa, custom_encap_len)); + + if ((pkt_offset) && (custom_encap_len >= 0)) { + *pkt_offset = custom_encap_len; + ret = 0; + } + + return ret; +} + + + +/** + * bksync_ptp_hw_tstamp_rx_time_upscale + * + * @dev_no: device number + * @ts: timestamp to be retrieved + * + * Description: this is a callback function to retrieve 64b equivalent of + * rx timestamp + */ +int bksync_ptp_hw_tstamp_rx_time_upscale(int dev_no, int port, struct sk_buff *skb, uint32_t *meta, uint64_t *ts) +{ + int ret = 0; + int custom_encap_len = 0; + uint16_t tpid = 0; + uint16_t msgtype_offset = 0; + int transport = network_transport; + int ptp_hdr_offset = 0, ptp_message_len = 0; + + if (!module_initialized || !ptp_priv || (ptp_priv->shared_addr == NULL)) { + return -1; + } + + DBG_RX_DUMP(("rxtime_upscale: Incoming packet: \n")); + if (debug & DBG_LVL_RX_DUMP) dbg_dump_pkt(skb->data, skb->len); + + switch (KNET_SKB_CB(skb)->dcb_type) { + case 28: /* dpp */ + case 39: /* DNX - Q2A, J2C */ + break; + case 26: + case 32: + case 35: + case 37: + if (pci_cos != (meta[4] & 0x3F)) { + return -1; + } + break; + case 38: + if (pci_cos != ((meta[12] >> 22) & 0x2F)) { + return -1; + } + break; + case 36: + if (pci_cos != ((meta[6] >> 22) & 0x2F)) { + return -1; + } + break; + default: + DBG_ERR(("rxtime_upscale: Invalid dcb type\n")); + return -1; + } + + /* parse custom encap header in pkt for ptp rxtime */ + custom_encap_len = bksync_pkt_custom_encap_ptprx_get((skb->data), ts); + + /* Remove the custom encap header from pkt */ + if (custom_encap_len > 0) { + + skb_pull(skb, custom_encap_len); + + DBG_RX_DUMP(("rxtime_upscale: After removing custom encap: \n")); + if (debug & DBG_LVL_RX_DUMP) dbg_dump_pkt(skb->data, skb->len); + + msgtype_offset = ptp_hdr_offset = 0; + tpid = SKB_U16_GET(skb, (12)); + if (tpid == 0x8100) { + msgtype_offset += 4; + ptp_hdr_offset += 4; + } + + /* Parse for nw transport */ + transport = bksync_ptp_transport_get(skb->data); + + switch(transport) + { + case 2: /* IEEE 802.3 */ + ptp_hdr_offset += 14; + break; + case 4: /* UDP IPv4 */ + ptp_hdr_offset += 42; + break; + case 6: /* UDP IPv6 */ + ptp_hdr_offset += 62; + break; + default: + ptp_hdr_offset += 42; + break; + } + + ptp_message_len = SKB_U16_GET(skb, (ptp_hdr_offset + 2)); + + DBG_RX(("rxtime_upscale: custom_encap_len %d tpid 0x%x transport %d skb->len %d ptp message type %d, ptp_message_len %d\n", + custom_encap_len, tpid, transport, skb->len, skb->data[msgtype_offset] & 0x0F, ptp_message_len)); + + /* Remove padding ,CRC from from L2 packet from returning to Linux Stack */ + if (DEVICE_IS_DNX && (transport == 2) ) { + skb_trim(skb, ptp_hdr_offset + ptp_message_len); + } + } + + if ((port > 0) && (port < BCMKSYNC_MAX_NUM_PORTS)) { + port -= 1; + ptp_priv->port_stats[port].pkt_rxctr += 1; + } + + return ret; +} + + +void bksync_hton64(u8 *buf, const uint64_t *data) +{ +#ifdef __LITTLE_ENDIAN + /* LITTLE ENDIAN */ + buf[0] = (*(((uint8_t*)(data)) + 7u)); + buf[1] = (*(((uint8_t*)(data)) + 6u)); + buf[2] = (*(((uint8_t*)(data)) + 5u)); + buf[3] = (*(((uint8_t*)(data)) + 4u)); + buf[4] = (*(((uint8_t*)(data)) + 3u)); + buf[5] = (*(((uint8_t*)(data)) + 2u)); + buf[6] = (*(((uint8_t*)(data)) + 1u)); + buf[7] = (*(((uint8_t*)(data)) + 0u)); +#else + memcpy(buf, data, 8); +#endif +} + +static void +bksync_dpp_otsh_update(struct sk_buff *skb, int hwts, int encap_type, int ptp_hdr_offset) +{ + + /* + * Type [47:46] type of OAM-TS extension. + * 0x0: OAM + * 0x1: 1588v2 + * 0x2: Latency-measurement + * 0x3: Reserved + * + * TP-Command [45:43] 1588v2 command + * 0x0: None + * 0x1: Stamp + * 0x2: Record (2 step, record Tx-TS in a FIFO) + * 0x3-0x7: Reserved + * + * TS-Encapsulation [42] 1588v2 Encapsulation + * 0x0: UDP + * 0x1: Non UDP + * + * OAM-TS-Data [33:32] OAM-TS-Data + * 0x1: In-PP-Port.External-BRCM-MAC + * + * OAM-TS-Data [31:0] + * Transparent or trapped 1588 events + * + * Rx-Time-Stamp + * Injected 1588v2 event from ARM/CPU: 0x0 + * + * Offset [7:0] ptp_hdr_offset + * Offset from end of System Headers to the start of the 1588v2 frame + * + */ + + /* PPH_TYPE = OAM-TS */ + skb->data[2] |= 0x80; + + /* OTSH.type = 1588v2 */ + skb->data[6] = 0x40; + + /* OTSH.tp_command = 1-step */ + switch (hwts) { + case HWTSTAMP_TX_ONESTEP_SYNC: + skb->data[6] |= ((0x1) << 3); + break; + default: + skb->data[6] |= ((0x2) << 3); + break; + } + + /* OTSH.encap_type = udp vs non-udp */ + skb->data[6] |= (((encap_type == 2) ? 1 : 0) << 2); + + /* In-PP-Port.External-BRCM-MAC = 1 */ + skb->data[6] |= (0x1 << 0); + + /* Timestamp: 0x0 */ + skb->data[7] = skb->data[8] = skb->data[9] = skb->data[10] = 0x0; + + skb->data[11] = ptp_hdr_offset; + + return; +} +/* IPv6 WAR to avoid H/W limitation of JR2x series devices */ +static void +bksync_dnx_ase1588_tsh_hdr_update_ipv6(struct sk_buff *skb, int hwts, int encap_type, int ptp_hdr_offset) +{ + /* Module Hdr [16] + PTCH [2] + ITMH [5] + ASE1588 [6] + TSH [4] + Internal Hdr [12] + UDH base [1] */ + + /* For JR3 for CF update 1588v2_Offset should also have system_header length of + * PTCH [2] + ITMH [5] + ASE1588 [6] + TSH [4] + Internal Hdr [12] + UDH base [1] = 30. */ + if ((ptp_priv->bksync_init_info).application_v2) { + ptp_hdr_offset = 30; + } else { + ptp_hdr_offset = 29; + } + + switch(encap_type) + { + case 2: /* IEEE 802.3 */ + ptp_hdr_offset += 18; + break; + case 4: /* UDP IPv4 */ + ptp_hdr_offset += 46; + break; + case 6: /* UDP IPv6 */ + ptp_hdr_offset += 66; + break; + default: + ptp_hdr_offset += 46; + break; + } + + /* ITMH */ + /* App Specific Ext Present ASE 1588*/ + skb->data [18] |= (0x1 << 3); + + /* PPH_TYPE - TSH + Internal Hdr */ + skb->data [18] |= (0x3 << 1); /* TSH + PPH Only */ + + /* ASE 1588 ext */ + skb->data [23] = skb->data [24] = skb->data [25] = skb->data [26] = 0x00; + + skb->data[27] = skb->data[28] = 0; + + /* OTSH.encap_type = udp vs non-udp - 1bit (15:15) */ + /* encap type - 2 L2, 4 & 6 UDP */ + skb->data[27] |= (((encap_type == 2) ? 1 : 0) << 7); + + /* ASE1588 1588v2 command - one step or two step 3bit (14:12) */ + /* ASE1588 1588v2 command should be zero for CF update */ + + /* offset to start of 1588v2 frame - 8 bit (11:4) */ + skb->data [27] = skb->data [27] | ((ptp_hdr_offset) & 0xf0) >> 4; + skb->data [28] = ((ptp_hdr_offset) & 0xf) << 4; + + /* ASE1588 type = 1588v2 - 4 bit (0:3) */ + skb->data [28] = skb->data [28] | 0x01; + + skb->data [29] = skb->data [30] = skb->data [31] = skb->data [32] = 0x00; + + /* Internal Header */ + skb->data [33] = skb->data [34] = skb->data [35] = skb->data [36] = 0x00; + skb->data [37] = skb->data [38] = skb->data [39] = skb->data [40] = 0x00; + skb->data [41] = skb->data [42] = skb->data [43] = skb->data [44] = 0x00; + + skb->data [44] = 0x42; + skb->data [43] = 0x07; + skb->data [42] = 0x10; + + /* UDH Base Hdr */ + skb->data [45] = 0; + + return; +} + +static void +bksync_dnx_ase1588_tsh_hdr_update(struct sk_buff *skb, int hwts, int encap_type, int ptp_hdr_offset) +{ + /* Module Hdr [16] + PTCH [2] + ITMH [5] + ASE1588 [6] + TSH [4] */ + + /* For JR3 for CF update 1588v2_Offset should also have system_header length of + * PTCH [2] + ITMH [5] + ASE1588 [6] + TSH [4] = 17. */ + if ((ptp_priv->bksync_init_info).application_v2) { + ptp_hdr_offset = ptp_hdr_offset + 17; + } + + /* ITMH */ + /* App Specific Ext Present */ + skb->data [18] |= (1 << 3); + + /* PPH_TYPE - TSH */ + skb->data [18] |= (0x2 << 1); + + /* ASE 1588 ext */ + skb->data [23] = skb->data [24] = skb->data [25] = skb->data [26] = 0x00; + + skb->data[27] = skb->data[28] = 0; + + /* OTSH.encap_type = udp vs non-udp - 1bit (15:15) */ + /* encap type - 2 L2, 4 & 6 UDP */ + skb->data[27] |= (((encap_type == 2) ? 1 : 0) << 7); + + /* ASE1588 1588v2 command - one step or two step 3bit (14:12) */ + switch (hwts) { + case HWTSTAMP_TX_ONESTEP_SYNC: + skb->data[27] |= ((0x1) << 4); + break; + default: + skb->data[27] |= ((0x2) << 4); + break; + } + + /* offset to start of 1588v2 frame - 8 bit (11:4) */ + skb->data [27] = skb->data [27] | ((ptp_hdr_offset) & 0xf0) >> 4; + skb->data [28] = ((ptp_hdr_offset) & 0xf) << 4; + + /* ASE1588 type = 1588v2 - 4 bit (0:3) */ + skb->data [28] = skb->data [28] | 0x01; + + /* TSH Timestamp: 0x0 */ + skb->data [29] = skb->data [30] = skb->data [31] = skb->data [32] = 0x00; + + return; +} + + + +int bksync_ptp_hw_tstamp_tx_meta_get(int dev_no, + int hwts, int hdrlen, + struct sk_buff *skb, + uint64_t *tstamp, + u32 **md) +{ + uint16_t tpid = 0, ethertype; + int md_offset = 0; + int pkt_offset = 0; + int ptp_hdr_offset = 0; + int transport = network_transport; + s64 ptptime = 0; + s64 ptpcounter = 0; + int64_t corrField; + int32_t negCurTS32; + int64_t negCurTS64; + + if (!module_initialized || !ptp_priv || (ptp_priv->shared_addr == NULL)) { + return 0; + } + + + if (ptp_priv->ptp_pair_lock == 1) { + /* use alternate pair when main dataset is being updated */ + ptptime = ptp_priv->shared_addr->ptptime_alt; + ptpcounter = ptp_priv->shared_addr->reftime_alt; + } else { + ptptime = ptp_priv->shared_addr->ptptime; + ptpcounter = ptp_priv->shared_addr->reftime; + } + + negCurTS32 = - (int32_t) ptpcounter; + negCurTS64 = - (int64_t)(ptpcounter); + + if (CMICX_DEV_TYPE || DEVICE_IS_DPP) { + pkt_offset = ptp_hdr_offset = hdrlen; + } + + /* Need to check VLAN tag if packet is tagged */ + tpid = SKB_U16_GET(skb, (pkt_offset + 12)); + if (tpid == 0x8100) { + md_offset = 4; + ptp_hdr_offset += 4; + + if (DEVICE_IS_DNX && vnptp_l2hdr_vlan_prio != 0) { + ethertype = SKB_U16_GET(skb, hdrlen + 12 + 4); + if (ethertype == 0x88F7 || ethertype == 0x0800 || ethertype == 0x86DD) { + if (skb->data[hdrlen + 14] == 0x00) { + skb->data[hdrlen + 14] |= (vnptp_l2hdr_vlan_prio << 5); + } + } + } + } + + /* One Step Meta Data */ + if (hwts == HWTSTAMP_TX_ONESTEP_SYNC) { + md_offset += 8; + switch (KNET_SKB_CB(skb)->dcb_type) { + case 26: + corrField = (((int64_t)negCurTS32) << 16); + if (negCurTS32 >= 0) { + md_offset += 8; + } + break; + default: + corrField = (((int64_t)negCurTS64) << 16); + break; + } + } + + + /* Parse for nw transport */ + if (transport == 0) { + transport = bksync_ptp_transport_get(skb->data + pkt_offset); + } + + switch(transport) + { + case 2: /* IEEE 802.3 */ + ptp_hdr_offset += 14; + if (KNET_SKB_CB(skb)->dcb_type == 32) { + if (md) *md = &sobmhrawpkts_dcb32[md_offset]; + } else if(KNET_SKB_CB(skb)->dcb_type == 26) { + if (md) *md = &sobmhrawpkts_dcb26[md_offset]; + } else if(KNET_SKB_CB(skb)->dcb_type == 35) { + if (md) *md = &sobmhrawpkts_dcb35[md_offset]; + } else if(KNET_SKB_CB(skb)->dcb_type == 36) { + if (md) *md = &sobmhrawpkts_dcb36[md_offset]; + } else if(KNET_SKB_CB(skb)->dcb_type == 38) { + if (md) *md = &sobmhrawpkts_dcb38[md_offset]; + } else if(KNET_SKB_CB(skb)->dcb_type == 37) { + if (md) *md = &sobmhrawpkts_dcb37[md_offset]; + } + break; + case 4: /* UDP IPv4 */ + ptp_hdr_offset += 42; + if (KNET_SKB_CB(skb)->dcb_type == 32) { + if (md) *md = &sobmhudpipv4_dcb32[md_offset]; + } else if(KNET_SKB_CB(skb)->dcb_type == 26) { + if (md) *md = &sobmhudpipv4_dcb26[md_offset]; + } else if(KNET_SKB_CB(skb)->dcb_type == 35) { + if (md) *md = &sobmhudpipv4_dcb35[md_offset]; + } else if(KNET_SKB_CB(skb)->dcb_type == 36) { + if (md) *md = &sobmhudpipv4_dcb36[md_offset]; + } else if(KNET_SKB_CB(skb)->dcb_type == 38) { + if (md) *md = &sobmhudpipv4_dcb38[md_offset]; + } else if(KNET_SKB_CB(skb)->dcb_type == 37) { + if (md) *md = &sobmhudpipv4_dcb37[md_offset]; + } + break; + case 6: /* UDP IPv6 */ + ptp_hdr_offset += 62; + if (KNET_SKB_CB(skb)->dcb_type == 32) { + if (md) *md = &sobmhudpipv6_dcb32[md_offset]; + } else if(KNET_SKB_CB(skb)->dcb_type == 26) { + if (md) *md = &sobmhudpipv6_dcb26[md_offset]; + } else if(KNET_SKB_CB(skb)->dcb_type == 35) { + if (md) *md = &sobmhudpipv6_dcb35[md_offset]; + } else if(KNET_SKB_CB(skb)->dcb_type == 36) { + if (md) *md = &sobmhudpipv6_dcb36[md_offset]; + } else if(KNET_SKB_CB(skb)->dcb_type == 38) { + if (md) *md = &sobmhudpipv6_dcb38[md_offset]; + } else if(KNET_SKB_CB(skb)->dcb_type == 37) { + if (md) *md = &sobmhudpipv6_dcb37[md_offset]; + } + break; + default: + ptp_hdr_offset += 42; + if (KNET_SKB_CB(skb)->dcb_type == 32) { + if (md) *md = &sobmhudpipv4_dcb32[md_offset]; + } else if(KNET_SKB_CB(skb)->dcb_type == 26) { + if (md) *md = &sobmhudpipv4_dcb26[md_offset]; + } else if(KNET_SKB_CB(skb)->dcb_type == 35) { + if (md) *md = &sobmhudpipv4_dcb35[md_offset]; + } else if(KNET_SKB_CB(skb)->dcb_type == 36) { + if (md) *md = &sobmhudpipv4_dcb36[md_offset]; + } else if(KNET_SKB_CB(skb)->dcb_type == 38) { + if (md) *md = &sobmhudpipv4_dcb38[md_offset]; + } else if(KNET_SKB_CB(skb)->dcb_type == 37) { + if (md) *md = &sobmhudpipv4_dcb37[md_offset]; + } + break; + } + + if (DEVICE_IS_DPP && (hdrlen > (BKN_DNX_PTCH_2_SIZE))) { + DBG_TX_DUMP(("hw_tstamp_tx_meta_get: Before OTSH updates\n")); + if (debug & DBG_LVL_TX_DUMP) dbg_dump_pkt(skb->data, skb->len); + + DBG_TX(("hw_tstamp_tx_meta_get: Before: ptch[0]: 0x%x ptch[1]: 0x%x itmh[0]: 0x%x " + "oam-ts[0]: 0x%x pkt[0]:0x%x\n", skb->data[0], skb->data[1], skb->data[2], + skb->data[6], skb->data[12])); + + bksync_dpp_otsh_update(skb, hwts, transport, (ptp_hdr_offset - pkt_offset)); + + DBG_TX(("hw_tstamp_tx_meta_get: After : ptch[0]: 0x%x itmh[0]: 0x%x oam-ts[0]: 0x%x " + "pkt[0]:0x%x\n", skb->data[0], skb->data[2], skb->data[6], skb->data[12])); + + DBG_TX_DUMP(("hw_tstamp_tx_meta_get: After OTSH updates\n")); + if (debug & DBG_LVL_TX_DUMP) dbg_dump_pkt(skb->data, skb->len); + } else if (DEVICE_IS_DNX && (hdrlen > (BKN_DNX_PTCH_2_SIZE))) { + + switch(transport) + { + case 6: /* UDP IPv6 */ + bksync_dnx_ase1588_tsh_hdr_update_ipv6(skb, hwts, transport, (ptp_hdr_offset - pkt_offset)); + break; + case 4: /* UDP IPv4 */ + case 2: /* IEEE 802.3 */ + default: + bksync_dnx_ase1588_tsh_hdr_update(skb, hwts, transport, (ptp_hdr_offset - pkt_offset)); + break; + } + } + + DBG_TX(("hw_tstamp_tx_meta_get: ptptime: 0x%llx ptpcounter: 0x%llx\n", ptptime, ptpcounter)); + + DBG_TX(("hw_tstamp_tx_meta_get: ptpmessage type: 0x%x hwts: %d\n", skb->data[ptp_hdr_offset] & 0x0f, hwts)); + + + if ((hwts == HWTSTAMP_TX_ONESTEP_SYNC) && + (BKSYNC_PTP_EVENT_MSG((skb->data[ptp_hdr_offset] & 0x0F)))) { + /* One Step Timestamp Field updation */ + int port; + int corr_offset = ptp_hdr_offset + 8; + int origin_ts_offset = ptp_hdr_offset + 34; + u32 tmp; + struct timespec64 ts = {0}; + int udp_csum_regen; + u32 udp_csum20; + u16 udp_csum; + + udp_csum = SKB_U16_GET(skb, (ptp_hdr_offset - 2)); + + switch (transport) { + case 2: + udp_csum_regen = 0; + break; + case 6: + udp_csum_regen = 1; + break; + default: + udp_csum_regen = (udp_csum != 0x0); + break; + } + + /* Fill the correction field */ + bksync_hton64(&(skb->data[corr_offset]), (const u64 *)&corrField); + + /* Fill the Origin Timestamp Field */ + ts = ns_to_timespec64(ptptime); + + tmp = (ts.tv_sec >> 32); + skb->data[origin_ts_offset + 0] = ((tmp >> 8) & 0xFF); + skb->data[origin_ts_offset + 1] = ((tmp ) & 0xFF); + + tmp = (ts.tv_sec & 0xFFFFFFFFLL); + skb->data[origin_ts_offset + 2] = ((tmp >> 24) & 0xFF); + skb->data[origin_ts_offset + 3] = ((tmp >> 16) & 0xFF); + skb->data[origin_ts_offset + 4] = ((tmp >> 8) & 0xFF); + skb->data[origin_ts_offset + 5] = ((tmp ) & 0xFF); + + tmp = (ts.tv_nsec & 0xFFFFFFFFLL); + skb->data[origin_ts_offset + 6] = ((tmp >> 24) & 0xFF); + skb->data[origin_ts_offset + 7] = ((tmp >> 16) & 0xFF); + skb->data[origin_ts_offset + 8] = ((tmp >> 8) & 0xFF); + skb->data[origin_ts_offset + 9] = ((tmp ) & 0xFF); + + if (udp_csum_regen) { + udp_csum20 = (~udp_csum) & 0xFFFF; + + udp_csum20 += SKB_U16_GET(skb, (corr_offset + 0)); + udp_csum20 += SKB_U16_GET(skb, (corr_offset + 2)); + udp_csum20 += SKB_U16_GET(skb, (corr_offset + 4)); + udp_csum20 += SKB_U16_GET(skb, (corr_offset + 6)); + + udp_csum20 += SKB_U16_GET(skb, (origin_ts_offset + 0)); + udp_csum20 += SKB_U16_GET(skb, (origin_ts_offset + 2)); + udp_csum20 += SKB_U16_GET(skb, (origin_ts_offset + 4)); + udp_csum20 += SKB_U16_GET(skb, (origin_ts_offset + 6)); + udp_csum20 += SKB_U16_GET(skb, (origin_ts_offset + 8)); + + /* Fold 20bit checksum into 16bit udp checksum */ + udp_csum20 = ((udp_csum20 & 0xFFFF) + (udp_csum20 >> 16)); + udp_csum = ((udp_csum20 & 0xFFFF) + (udp_csum20 >> 16)); + + /* invert again to get final checksum. */ + udp_csum = ~udp_csum; + if (udp_csum == 0) { + udp_csum = 0xFFFF; + } + + skb->data[ptp_hdr_offset - 2] = ((udp_csum >> 8) & 0xFF); + skb->data[ptp_hdr_offset - 1] = ((udp_csum ) & 0xFF); + } + + if ((skb->data[ptp_hdr_offset] & 0x0F) == IEEE1588_MSGTYPE_DELREQ) { + *tstamp = ptptime; + } + + DBG_TX(("hw_tstamp_tx_meta_get: ptp msg type %d packet tstamp : 0x%llx corrField: 0x%llx\n", + (skb->data[ptp_hdr_offset] & 0x0F), ptptime, corrField)); + + port = KNET_SKB_CB(skb)->port; + if ((port > 0) && (port < BCMKSYNC_MAX_NUM_PORTS)) { + port -= 1; + ptp_priv->port_stats[port].pkt_txonestep += 1; + } + } + + DBG_TX_DUMP(("hw_tstamp_tx_meta_get: PTP Packet\n")); + if (debug & DBG_LVL_TX_DUMP) dbg_dump_pkt(skb->data, skb->len); + + return 0; +} + + +int bksync_ptp_hw_tstamp_ptp_clock_index_get(int dev_no) +{ + int phc_index = -1; + + if (!module_initialized || !ptp_priv) { + return phc_index; + } + + if (ptp_priv && ptp_priv->ptp_clock) + phc_index = ptp_clock_index(ptp_priv->ptp_clock); + + return phc_index; +} + + +/** +* bcm_ptp_time_keep - call timecounter_read every second to avoid timer overrun +* because a 32bit counter, will timeout in 4s +*/ +static void bksync_ptp_time_keep(struct work_struct *work) +{ + struct delayed_work *dwork = to_delayed_work(work); + struct bksync_ptp_priv *priv = + container_of(dwork, struct bksync_ptp_priv, time_keep); + struct timespec64 ts; + + /* Call bcm_ptp_gettime function to keep the ref_time_64 and ref_counter_48 in sync */ + bksync_ptp_gettime(&(priv->ptp_caps), &ts); + schedule_delayed_work(&priv->time_keep, __msecs_to_jiffies(phc_update_intv_msec)); +} + +static void bksync_ptp_time_keep_init(void) +{ + if (!ptp_priv->timekeep_status) { + INIT_DELAYED_WORK(&(ptp_priv->time_keep), bksync_ptp_time_keep); + schedule_delayed_work(&ptp_priv->time_keep, __msecs_to_jiffies(phc_update_intv_msec)); + + ptp_priv->timekeep_status = 1; + } + + return; +} + +static void bksync_ptp_time_keep_deinit(void) +{ + if (ptp_priv->timekeep_status) { + /* Cancel delayed work */ + cancel_delayed_work_sync(&(ptp_priv->time_keep)); + + ptp_priv->timekeep_status = 0; + } + + return; +} + +/* PTP_EXTTS logging */ +static void bksync_ptp_extts_logging(struct work_struct *work) +{ + struct delayed_work *dwork = to_delayed_work(work); + struct bksync_ptp_priv *priv = container_of(dwork, struct bksync_ptp_priv, extts_logging); + struct ptp_clock_event event; + int event_id = -1; + int head = -1, tail = -1; + + if (!module_initialized || ptp_priv->extts_log == NULL) + goto exit; + + if (ptp_priv->extts_log->overflow) { + DBG_VERB(("EXTTS queue overflow\n")); + } + + tail = (int)ptp_priv->extts_log->tail; + head = ptp_priv->extts_event.head; + + head = (head + 1) % NUM_EVENT_TS; + while (tail != head) { + switch (ptp_priv->extts_log->event_ts[head].ts_event_id) { + /* Map FW event_id to EXTTS event_id */ + case TS_EVENT_GPIO_1: + event_id = 0; + break; + case TS_EVENT_GPIO_2: + event_id = 1; + break; + case TS_EVENT_GPIO_3: + event_id = 2; + break; + case TS_EVENT_GPIO_4: + event_id = 3; + break; + case TS_EVENT_GPIO_5: + event_id = 4; + break; + case TS_EVENT_GPIO_6: + event_id = 5; + break; + } + + if (event_id < 0 || ptp_priv->extts_event.enable[event_id] != 1) { + memset((void *)&(ptp_priv->extts_log->event_ts[head]), 0, sizeof(ptp_priv->extts_log->event_ts[head])); + + ptp_priv->extts_event.head = head; + ptp_priv->extts_log->head = head; + + head = (head + 1) % NUM_EVENT_TS; + continue; + } + + event.type = PTP_CLOCK_EXTTS; + event.index = event_id; + event.timestamp = ((s64)ptp_priv->extts_log->event_ts[head].tstamp.sec * 1000000000) + ptp_priv->extts_log->event_ts[head].tstamp.nsec; + ptp_clock_event(ptp_priv->ptp_clock, &event); + + ptp_priv->extts_event.head = head; + ptp_priv->extts_log->head = head; + + head = (head + 1) % NUM_EVENT_TS; + } +exit: + schedule_delayed_work(&priv->extts_logging, __msecs_to_jiffies(100)); +} + +static void bksync_ptp_extts_logging_init(void) +{ + INIT_DELAYED_WORK(&(ptp_priv->extts_logging), bksync_ptp_extts_logging); + schedule_delayed_work(&ptp_priv->extts_logging, __msecs_to_jiffies(100)); +} + +static void bksync_ptp_extts_logging_deinit(void) +{ + cancel_delayed_work_sync(&(ptp_priv->extts_logging)); +} + +static int bksync_ptp_init(struct ptp_clock_info *ptp) +{ + int ret = -1; + u64 subcmd, subcmd_data; + + ret = bksync_cmd_go(BKSYNC_INIT, NULL, NULL); + DBG_VERB(("bksync_ptp_init: BKSYNC_INIT; rv:%d\n", ret)); + if (ret < 0) goto err_exit; + ptp_sleep(1); + + if (!DEVICE_IS_DPP && !DEVICE_IS_DNX) { + return 0; + } + + subcmd = KSYNC_SYSINFO_UC_PORT_NUM; + subcmd_data = (ptp_priv->bksync_init_info).uc_port_num; + ret = bksync_cmd_go(BKSYNC_SYSINFO, &subcmd, &subcmd_data); + DBG_VERB(("bksync_ptp_init: subcmd: 0x%llx subcmd_data: 0x%llx; rv:%d\n", subcmd, subcmd_data, ret)); + if (ret < 0) goto err_exit; + + subcmd = KSYNC_SYSINFO_UC_PORT_SYSPORT; + subcmd_data = (ptp_priv->bksync_init_info).uc_port_sysport; + ret = bksync_cmd_go(BKSYNC_SYSINFO, &subcmd, &subcmd_data); + DBG_VERB(("bksync_ptp_init: subcmd: 0x%llx subcmd_data: 0x%llx; rv:%d\n", subcmd, subcmd_data, ret)); + if (ret < 0) goto err_exit; + + subcmd = KSYNC_SYSINFO_HOST_CPU_PORT; + subcmd_data = (ptp_priv->bksync_init_info).host_cpu_port; + ret = bksync_cmd_go(BKSYNC_SYSINFO, &subcmd, &subcmd_data); + DBG_VERB(("bksync_ptp_init: subcmd: 0x%llx subcmd_data: 0x%llx; rv:%d\n", subcmd, subcmd_data, ret)); + if (ret < 0) goto err_exit; + + subcmd = KSYNC_SYSINFO_HOST_CPU_SYSPORT; + subcmd_data = (ptp_priv->bksync_init_info).host_cpu_sysport; + ret = bksync_cmd_go(BKSYNC_SYSINFO, &subcmd, &subcmd_data); + DBG_VERB(("bksync_ptp_init: subcmd: 0x%llx subcmd_data: 0x%llx; rv:%d\n", subcmd, subcmd_data, ret)); + if (ret < 0) goto err_exit; + + subcmd = KSYNC_SYSINFO_UDH_LEN; + subcmd_data = (ptp_priv->bksync_init_info).udh_len; + ret = bksync_cmd_go(BKSYNC_SYSINFO, &subcmd, &subcmd_data); + DBG_VERB(("bksync_ptp_init: subcmd: 0x%llx subcmd_data: 0x%llx; rv:%d\n", subcmd, subcmd_data, ret)); + if (ret < 0) goto err_exit; + + +err_exit: + return ret; +} + +static int bksync_ptp_deinit(struct ptp_clock_info *ptp) +{ + int ret = -1; + + bksync_ptp_time_keep_deinit(); + + ret = bksync_cmd_go(BKSYNC_DEINIT, NULL, NULL); + DBG_VERB(("bksync_ptp_deinit: rv:%d\n", ret)); + + return ret; +} + +static int bksync_broadsync_cmd(int bs_id) +{ + int ret = -1; + u64 subcmd, subcmd_data; + + subcmd = (bs_id == 0) ? KSYNC_BROADSYNC_BS0_CONFIG : KSYNC_BROADSYNC_BS1_CONFIG; + + subcmd_data = ((ptp_priv->bksync_bs_info[bs_id]).enable & 0x1); + subcmd_data |= (((ptp_priv->bksync_bs_info[bs_id]).mode & 0x1) << 8); + subcmd_data |= ((ptp_priv->bksync_bs_info[bs_id]).hb << 16); + subcmd_data |= (((u64)(ptp_priv->bksync_bs_info[bs_id]).bc) << 32); + + ret = bksync_cmd_go(BKSYNC_BROADSYNC, &subcmd, &subcmd_data); + DBG_VERB(("bksync_broadsync_cmd: subcmd: 0x%llx subcmd_data: 0x%llx; rv:%d\n", subcmd, subcmd_data, ret)); + + return ret; +} + +static int bksync_broadsync_status_cmd(int bs_id, u64 *status) +{ + int ret = -1; + u64 subcmd; + + subcmd = (bs_id == 0) ? KSYNC_BROADSYNC_BS0_STATUS_GET : KSYNC_BROADSYNC_BS1_STATUS_GET; + + ret = bksync_cmd_go(BKSYNC_BROADSYNC, &subcmd, status); + DBG_VERB(("bksync_broadsync_status_cmd: subcmd: 0x%llx subcmd_data: 0x%llx; rv:%d\n", subcmd, *status, ret)); + + return ret; +} + +static int bksync_gpio_cmd(int gpio_num) +{ + int ret = -1; + u64 subcmd, subcmd_data; + + switch (gpio_num) { + case 0: + subcmd = KSYNC_GPIO_0; + break; + case 1: + subcmd = KSYNC_GPIO_1; + break; + case 2: + subcmd = KSYNC_GPIO_2; + break; + case 3: + subcmd = KSYNC_GPIO_3; + break; + case 4: + subcmd = KSYNC_GPIO_4; + break; + case 5: + subcmd = KSYNC_GPIO_5; + break; + default: + return ret; + } + + subcmd_data = ((ptp_priv->bksync_gpio_info[gpio_num]).enable & 0x1); + subcmd_data |= (((ptp_priv->bksync_gpio_info[gpio_num]).mode & 0x1) << 8); + subcmd_data |= ((u64)((ptp_priv->bksync_gpio_info[gpio_num]).period) << 16); + + ret = bksync_cmd_go(BKSYNC_GPIO, &subcmd, &subcmd_data); + DBG_VERB(("bksync_gpio_cmd: subcmd: 0x%llx subcmd_data: 0x%llx; rv:%d\n", subcmd, subcmd_data, ret)); + + return ret; +} + +static int bksync_gpio_phaseoffset_cmd(int gpio_num) +{ + int ret = -1; + u64 subcmd, subcmd_data; + + switch (gpio_num) { + case 0: + subcmd = KSYNC_GPIO_0; + break; + case 1: + subcmd = KSYNC_GPIO_1; + break; + case 2: + subcmd = KSYNC_GPIO_2; + break; + case 3: + subcmd = KSYNC_GPIO_3; + break; + case 4: + subcmd = KSYNC_GPIO_4; + break; + case 5: + subcmd = KSYNC_GPIO_5; + break; + default: + return ret; + } + + subcmd_data = (ptp_priv->bksync_gpio_info[gpio_num]).phaseoffset; + ret = bksync_cmd_go(BKSYNC_GPIO_PHASEOFFSET, &subcmd, &subcmd_data); + DBG_VERB(("bksync_gpio_phaseoffset_cmd: subcmd: 0x%llx " + "subcmd_data: 0x%llx; rv:%d\n", subcmd, subcmd_data, ret)); + + return ret; +} + + + +static int bksync_evlog_cmd(int event, int enable) +{ + int ret; + int addr_offset; + u64 subcmd = 0, subcmd_data = 0; + bksync_evlog_t tmp; + + subcmd = event; + addr_offset = ((u8 *)&(tmp.event_timestamps[event]) - (u8 *)&(tmp.event_timestamps[0])); + + if (enable) { + subcmd_data = (ptp_priv->dma_mem + addr_offset); + } else { + subcmd_data = 0; + } + + ret = bksync_cmd_go(BKSYNC_EVLOG, &subcmd, &subcmd_data); + DBG_VERB(("bksync_evlog_cmd: subcmd: 0x%llx subcmd_data: 0x%llx rv:%d\n", subcmd, subcmd_data, ret)); + + return ret; +} + + +/* + * Device Debug Statistics Proc Entry + */ +/** +* This function is called at the beginning of a sequence. +* ie, when: +* - the /proc/bcm/ksync/stats file is read (first time) +* - after the function stop (end of sequence) +* +*/ +static void *bksync_proc_seq_start(struct seq_file *s, loff_t *pos) +{ + /* beginning a new sequence ? */ + if ( (int)*pos == 0 && ptp_priv->shared_addr != NULL) + { + seq_printf(s, "TwoStep Port Bitmap : %08llx%08llx\n", + (uint64_t)(ptp_priv->shared_addr->portmap[1]), + (uint64_t)(ptp_priv->shared_addr->portmap[0])); + seq_printf(s,"%4s| %9s| %9s| %9s| %9s| %9s| %9s| %9s| %9s| %9s| %9s| %9s\n", + "Port", "RxCounter", "TxCounter", "TxOneStep", "TSTimeout", "TSRead", "TSMatch", "TSDiscard", + "TimeHi" , "TimeLo", "TimeAvg", "FIFORx"); + } + + if ((int)*pos < (ptp_priv->num_pports)) + return (void *)(unsigned long)(*pos + 1); + /* End of the sequence, return NULL */ + return NULL; + } + +/** +* This function is called after the beginning of a sequence. +* It's called untill the return is NULL (this ends the sequence). +* +*/ +static void *bksync_proc_seq_next(struct seq_file *s, void *v, loff_t *pos) +{ + (*pos)++; + return bksync_proc_seq_start(s, pos); +} +/** +* This function is called at the end of a sequence +* +*/ +static void bksync_proc_seq_stop(struct seq_file *s, void *v) +{ + /* nothing to do, we use a static value in bksync_proc_seq_start() */ +} + +/** +* This function is called for each "step" of a sequence +* +*/ +static int bksync_proc_seq_show(struct seq_file *s, void *v) +{ + unsigned long port = (unsigned long)v; + + if ((port > 0) && (port < BCMKSYNC_MAX_NUM_PORTS)) { + + port = port - 1; + if (ptp_priv->port_stats[port].pkt_rxctr || ptp_priv->port_stats[port].pkt_txctr || + ptp_priv->port_stats[port].pkt_txonestep|| + ptp_priv->port_stats[port].tsts_discard || ptp_priv->port_stats[port].tsts_timeout || + ptp_priv->shared_addr->port_ts_data[port].ts_cnt || ptp_priv->port_stats[port].tsts_match) { + seq_printf(s, "%4lu | %9d| %9d| %9d| %9d| %9d| %9d| %9d| %9lld| %9lld | %9d|%9d | %s\n", (port + 1), + ptp_priv->port_stats[port].pkt_rxctr, + ptp_priv->port_stats[port].pkt_txctr, + ptp_priv->port_stats[port].pkt_txonestep, + ptp_priv->port_stats[port].tsts_timeout, + ptp_priv->shared_addr->port_ts_data[port].ts_cnt, + ptp_priv->port_stats[port].tsts_match, + ptp_priv->port_stats[port].tsts_discard, + ptp_priv->port_stats[port].tsts_worst_fetch_time, + ptp_priv->port_stats[port].tsts_best_fetch_time, + ptp_priv->port_stats[port].tsts_avg_fetch_time, + ptp_priv->port_stats[port].fifo_rxctr, + ptp_priv->port_stats[port].pkt_txctr != ptp_priv->port_stats[port].tsts_match ? "***":""); + } + } + return 0; +} + +/** +* seq_operations for bsync_proc_*** entries +* +*/ +static struct seq_operations bksync_proc_seq_ops = { + .start = bksync_proc_seq_start, + .next = bksync_proc_seq_next, + .stop = bksync_proc_seq_stop, + .show = bksync_proc_seq_show +}; + +static int bksync_proc_txts_open(struct inode * inode, struct file * file) +{ + return seq_open(file, &bksync_proc_seq_ops); +} + +static ssize_t +bksync_proc_txts_write(struct file *file, const char *buf, + size_t count, loff_t *loff) +{ + char debug_str[40]; + char *ptr; + int port; + + if (copy_from_user(debug_str, buf, count)) { + return -EFAULT; + } + + if ((ptr = strstr(debug_str, "clear")) != NULL) { + for (port = 0; port < ptp_priv->num_pports; port++) { + ptp_priv->port_stats[port].pkt_rxctr = 0; + ptp_priv->port_stats[port].pkt_txctr = 0; + ptp_priv->port_stats[port].pkt_txonestep = 0; + ptp_priv->port_stats[port].tsts_timeout = 0; + ptp_priv->port_stats[port].tsts_match = 0; + ptp_priv->port_stats[port].tsts_discard = 0; + if (ptp_priv->shared_addr) + ptp_priv->shared_addr->port_ts_data[port].ts_cnt = 0; + } + } else { + DBG_ERR(("Warning: unknown input\n")); + } + + return count; +} + +struct proc_ops bksync_proc_txts_file_ops = { + PROC_OWNER(THIS_MODULE) + .proc_open = bksync_proc_txts_open, + .proc_read = seq_read, + .proc_lseek = seq_lseek, + .proc_write = bksync_proc_txts_write, + .proc_release = seq_release, +}; + +/* + * Driver Debug Proc Entry + */ +static int +bksync_proc_debug_show(struct seq_file *m, void *v) +{ + seq_printf(m, "Configuration:\n"); + seq_printf(m, " debug: 0x%x\n", debug); + return 0; +} + +static ssize_t +bksync_proc_debug_write(struct file *file, const char *buf, + size_t count, loff_t *loff) +{ + char debug_str[40]; + char *ptr; + + if (copy_from_user(debug_str, buf, count)) { + return -EFAULT; + } + + if ((ptr = strstr(debug_str, "debug=")) != NULL) { + ptr += 6; + debug = simple_strtol(ptr, NULL, 0); + } else { + DBG_ERR(("Warning: unknown configuration\n")); + } + + return count; +} + +static int bksync_proc_debug_open(struct inode * inode, struct file * file) +{ + return single_open(file, bksync_proc_debug_show, NULL); +} + +struct proc_ops bksync_proc_debug_file_ops = { + PROC_OWNER(THIS_MODULE) + .proc_open = bksync_proc_debug_open, + .proc_read = seq_read, + .proc_lseek = seq_lseek, + .proc_write = bksync_proc_debug_write, + .proc_release = single_release, +}; + +static int +bksync_proc_init(void) +{ + struct proc_dir_entry *entry; + + PROC_CREATE(entry, "stats", 0666, bksync_proc_root, &bksync_proc_txts_file_ops); + if (entry == NULL) { + return -1; + } + PROC_CREATE(entry, "debug", 0666, bksync_proc_root, &bksync_proc_debug_file_ops); + if (entry == NULL) { + return -1; + } + return 0; +} + +static int +bksync_proc_cleanup(void) +{ + remove_proc_entry("stats", bksync_proc_root); + remove_proc_entry("debug", bksync_proc_root); + return 0; +} + + +#define ATTRCMP(x) (0 == strcmp(attr->attr.name, #x)) + +static int rd_iter=0, wr_iter=0; +static ssize_t bs_attr_store(struct kobject *kobj, + struct kobj_attribute *attr, + const char *buf, + size_t bytes) +{ + ssize_t ret; + u32 enable, mode; + u32 bc, hb; + + if (ATTRCMP(bs0)) { + ret = sscanf(buf, "enable:%d mode:%d bc:%u hb:%u", &enable, &mode, &bc, &hb); + DBG_VERB(("rd:%d bs0: enable:%d mode:%d bc:%d hb:%d\n", rd_iter++, enable, mode, bc, hb)); + ptp_priv->bksync_bs_info[0].enable = enable; + ptp_priv->bksync_bs_info[0].mode = mode; + ptp_priv->bksync_bs_info[0].bc = bc; + ptp_priv->bksync_bs_info[0].hb = hb; + + (void)bksync_broadsync_cmd(0); + } else if (ATTRCMP(bs1)) { + ret = sscanf(buf, "enable:%d mode:%d bc:%u hb:%u", &enable, &mode, &bc, &hb); + DBG_VERB(("rd:%d bs1: enable:%d mode:%d bc:%d hb:%d\n", rd_iter++, enable, mode, bc, hb)); + ptp_priv->bksync_bs_info[1].enable = enable; + ptp_priv->bksync_bs_info[1].mode = mode; + ptp_priv->bksync_bs_info[1].bc = bc; + ptp_priv->bksync_bs_info[1].hb = hb; + + (void)bksync_broadsync_cmd(1); + } else { + ret = -ENOENT; + } + + return (ret == -ENOENT) ? ret : bytes; +} + +static ssize_t bs_attr_show(struct kobject *kobj, + struct kobj_attribute *attr, + char *buf) +{ + ssize_t bytes; + u64 status = 0; + u32 variance = 0; + + if (ATTRCMP(bs0)) { + + if(ptp_priv->bksync_bs_info[0].enable) { + (void)bksync_broadsync_status_cmd(0, &status); + } + + variance = (status >> 32); + status = (status & 0xFFFFFFFF); + bytes = sprintf(buf, "enable:%d mode:%d bc:%u hb:%u status:%u(%u)\n", + ptp_priv->bksync_bs_info[0].enable, + ptp_priv->bksync_bs_info[0].mode, + ptp_priv->bksync_bs_info[0].bc, + ptp_priv->bksync_bs_info[0].hb, + (u32)status, + variance); + DBG_VERB(("wr:%d bs0: enable:%d mode:%d bc:%u hb:%u status:%u(%u)\n", + wr_iter++, + ptp_priv->bksync_bs_info[0].enable, + ptp_priv->bksync_bs_info[0].mode, + ptp_priv->bksync_bs_info[0].bc, + ptp_priv->bksync_bs_info[0].hb, + (u32)status, + variance)); + } else if (ATTRCMP(bs1)) { + + if(ptp_priv->bksync_bs_info[1].enable) { + (void)bksync_broadsync_status_cmd(1, &status); + } + + variance = (status >> 32); + status = (status & 0xFFFFFFFF); + bytes = sprintf(buf, "enable:%d mode:%d bc:%u hb:%u status:%u(%u)\n", + ptp_priv->bksync_bs_info[1].enable, + ptp_priv->bksync_bs_info[1].mode, + ptp_priv->bksync_bs_info[1].bc, + ptp_priv->bksync_bs_info[1].hb, + (u32)status, + variance); + DBG_VERB(("wr:%d bs1: enable:%d mode:%d bc:%u hb:%u status:%u(%u)\n", + wr_iter++, + ptp_priv->bksync_bs_info[1].enable, + ptp_priv->bksync_bs_info[1].mode, + ptp_priv->bksync_bs_info[1].bc, + ptp_priv->bksync_bs_info[1].hb, + (u32)status, + variance)); + } else { + bytes = -ENOENT; + } + + return bytes; +} + +#define BS_ATTR(x) \ + static struct kobj_attribute x##_attribute = \ + __ATTR(x, 0664, bs_attr_show, bs_attr_store); + +BS_ATTR(bs0) +BS_ATTR(bs1) + +#define BS_ATTR_LIST(x) & x ## _attribute.attr +static struct attribute *bs_attrs[] = { + BS_ATTR_LIST(bs0), + BS_ATTR_LIST(bs1), + NULL, /* terminator */ +}; + +static struct attribute_group bs_attr_group = { + .name = "broadsync", + .attrs = bs_attrs, +}; + + +static int gpio_rd_iter=0, gpio_wr_iter=0; +static ssize_t gpio_attr_store(struct kobject *kobj, + struct kobj_attribute *attr, + const char *buf, + size_t bytes) +{ + ssize_t ret; + int gpio; + u32 enable, mode; + u32 period; + int64_t phaseoffset; + + if (ATTRCMP(gpio0)) { + gpio = 0; + } else if (ATTRCMP(gpio1)) { + gpio = 1; + } else if (ATTRCMP(gpio2)) { + gpio = 2; + } else if (ATTRCMP(gpio3)) { + gpio = 3; + } else if (ATTRCMP(gpio4)) { + gpio = 4; + } else if (ATTRCMP(gpio5)) { + gpio = 5; + } else { + return -ENOENT; + } + + + ret = sscanf(buf, "enable:%d mode:%d period:%u phaseoffset:%lld", &enable, &mode, &period, &phaseoffset); + DBG_VERB(("rd:%d gpio%d: enable:%d mode:%d period:%d phaseoffset:%lld\n", gpio_rd_iter++, gpio, enable, mode, period, phaseoffset)); + ptp_priv->bksync_gpio_info[gpio].enable = enable; + ptp_priv->bksync_gpio_info[gpio].mode = mode; + ptp_priv->bksync_gpio_info[gpio].period = period; + + (void)bksync_gpio_cmd(gpio); + + if (ptp_priv->bksync_gpio_info[gpio].phaseoffset != phaseoffset) { + ptp_priv->bksync_gpio_info[gpio].phaseoffset = phaseoffset; + (void)bksync_gpio_phaseoffset_cmd(gpio); + } + + return (ret == -ENOENT) ? ret : bytes; +} + +static ssize_t gpio_attr_show(struct kobject *kobj, + struct kobj_attribute *attr, + char *buf) +{ + ssize_t bytes; + int gpio; + + if (ATTRCMP(gpio0)) { + gpio = 0; + } else if (ATTRCMP(gpio1)) { + gpio = 1; + } else if (ATTRCMP(gpio2)) { + gpio = 2; + } else if (ATTRCMP(gpio3)) { + gpio = 3; + } else if (ATTRCMP(gpio4)) { + gpio = 4; + } else if (ATTRCMP(gpio5)) { + gpio = 5; + } else { + return -ENOENT; + } + + bytes = sprintf(buf, "enable:%d mode:%d period:%u phaseoffset:%lld\n", + ptp_priv->bksync_gpio_info[gpio].enable, + ptp_priv->bksync_gpio_info[gpio].mode, + ptp_priv->bksync_gpio_info[gpio].period, + ptp_priv->bksync_gpio_info[gpio].phaseoffset); + DBG_VERB(("wr:%d gpio%d: enable:%d mode:%d period:%u phaseoffset:%lld\n", + gpio_wr_iter++, gpio, + ptp_priv->bksync_gpio_info[gpio].enable, + ptp_priv->bksync_gpio_info[gpio].mode, + ptp_priv->bksync_gpio_info[gpio].period, + ptp_priv->bksync_gpio_info[gpio].phaseoffset)); + + return bytes; +} + +#define GPIO_ATTR(x) \ + static struct kobj_attribute x##_attribute = \ + __ATTR(x, 0664, gpio_attr_show, gpio_attr_store); + +GPIO_ATTR(gpio0) +GPIO_ATTR(gpio1) +GPIO_ATTR(gpio2) +GPIO_ATTR(gpio3) +GPIO_ATTR(gpio4) +GPIO_ATTR(gpio5) + +#define GPIO_ATTR_LIST(x) & x ## _attribute.attr +static struct attribute *gpio_attrs[] = { + GPIO_ATTR_LIST(gpio0), + GPIO_ATTR_LIST(gpio1), + GPIO_ATTR_LIST(gpio2), + GPIO_ATTR_LIST(gpio3), + GPIO_ATTR_LIST(gpio4), + GPIO_ATTR_LIST(gpio5), + NULL, /* terminator */ +}; + +static struct attribute_group gpio_attr_group = { + .name = "gpio", + .attrs = gpio_attrs, +}; + + + +static ssize_t evlog_attr_store(struct kobject *kobj, + struct kobj_attribute *attr, + const char *buf, + size_t bytes) +{ + ssize_t ret; + int event, enable; + + if (ATTRCMP(cpu)) { + event = 0; + } else if (ATTRCMP(bs0)) { + event = 1; + } else if (ATTRCMP(bs1)) { + event = 2; + } else if (ATTRCMP(gpio0)) { + event = 3; + } else if (ATTRCMP(gpio1)) { + event = 4; + } else if (ATTRCMP(gpio2)) { + event = 5; + } else if (ATTRCMP(gpio3)) { + event = 6; + } else if (ATTRCMP(gpio4)) { + event = 7; + } else if (ATTRCMP(gpio5)) { + event = 8; + } else { + return -ENOENT; + } + + + ret = sscanf(buf, "enable:%d", &enable); + DBG_VERB(("event:%d: enable:%d\n", event, enable)); + + (void)bksync_evlog_cmd(event, enable); + ptp_priv->bksync_evlog_info[event].enable = enable; + + return (ret == -ENOENT) ? ret : bytes; +} + +static ssize_t evlog_attr_show(struct kobject *kobj, + struct kobj_attribute *attr, + char *buf) +{ + ssize_t bytes; + int event; + + + if (!module_initialized || !ptp_priv || (ptp_priv->evlog == NULL)) { + return -ENOENT; + } + + if (ATTRCMP(cpu)) { + event = 0; + } else if (ATTRCMP(bs0)) { + event = 1; + } else if (ATTRCMP(bs1)) { + event = 2; + } else if (ATTRCMP(gpio0)) { + event = 3; + } else if (ATTRCMP(gpio1)) { + event = 4; + } else if (ATTRCMP(gpio2)) { + event = 5; + } else if (ATTRCMP(gpio3)) { + event = 6; + } else if (ATTRCMP(gpio4)) { + event = 7; + } else if (ATTRCMP(gpio5)) { + event = 8; + } else { + return -ENOENT; + } + + + bytes = sprintf(buf, "enable:%d Previous Time:%llu.%09u Latest Time:%llu.%09u\n", + ptp_priv->bksync_evlog_info[event].enable, + ptp_priv->evlog->event_timestamps[event].prv_tstamp.sec, + ptp_priv->evlog->event_timestamps[event].prv_tstamp.nsec, + ptp_priv->evlog->event_timestamps[event].cur_tstamp.sec, + ptp_priv->evlog->event_timestamps[event].cur_tstamp.nsec); + DBG_VERB(("event%d: enable:%d Previous Time:%llu.%09u Latest Time:%llu.%09u\n", + event, + ptp_priv->bksync_evlog_info[event].enable, + ptp_priv->evlog->event_timestamps[event].prv_tstamp.sec, + ptp_priv->evlog->event_timestamps[event].prv_tstamp.nsec, + ptp_priv->evlog->event_timestamps[event].cur_tstamp.sec, + ptp_priv->evlog->event_timestamps[event].cur_tstamp.nsec)); + + memset((void *)&(ptp_priv->evlog->event_timestamps[event]), 0, sizeof(ptp_priv->evlog->event_timestamps[event])); + + return bytes; +} + +#define EVLOG_ATTR(x) \ + static struct kobj_attribute evlog_ ## x ##_attribute = \ + __ATTR(x, 0664, evlog_attr_show, evlog_attr_store); + +EVLOG_ATTR(bs0) +EVLOG_ATTR(bs1) +EVLOG_ATTR(gpio0) +EVLOG_ATTR(gpio1) +EVLOG_ATTR(gpio2) +EVLOG_ATTR(gpio3) +EVLOG_ATTR(gpio4) +EVLOG_ATTR(gpio5) + +#define EVLOG_ATTR_LIST(x) & evlog_ ## x ## _attribute.attr +static struct attribute *evlog_attrs[] = { + EVLOG_ATTR_LIST(bs0), + EVLOG_ATTR_LIST(bs1), + EVLOG_ATTR_LIST(gpio0), + EVLOG_ATTR_LIST(gpio1), + EVLOG_ATTR_LIST(gpio2), + EVLOG_ATTR_LIST(gpio3), + EVLOG_ATTR_LIST(gpio4), + EVLOG_ATTR_LIST(gpio5), + NULL, /* terminator */ +}; + +static struct attribute_group evlog_attr_group = { + .name = "evlog", + .attrs = evlog_attrs, +}; + + + + +static int +bksync_sysfs_init(void) +{ + int ret = 0; + struct kobject *parent; + struct kobject *root = &((((struct module *)(THIS_MODULE))->mkobj).kobj); + + parent = root; + ptp_priv->kobj = kobject_create_and_add("io", parent); + + ret = sysfs_create_group(ptp_priv->kobj, &bs_attr_group); + + ret = sysfs_create_group(ptp_priv->kobj, &gpio_attr_group); + + ret = sysfs_create_group(ptp_priv->kobj, &evlog_attr_group); + + return ret; +} + +static int +bksync_sysfs_cleanup(void) +{ + int ret = 0; + struct kobject *parent; + + parent = ptp_priv->kobj; + + sysfs_remove_group(parent, &bs_attr_group); + sysfs_remove_group(parent, &gpio_attr_group); + sysfs_remove_group(parent, &evlog_attr_group); + + kobject_put(ptp_priv->kobj); + + + return ret; +} + + +static void bksync_ptp_fw_data_alloc(void) +{ + dma_addr_t dma_mem = 0; + + /* Initialize the Base address for CMIC and shared Memory access */ + ptp_priv->base_addr = lkbde_get_dev_virt(0); + ptp_priv->dma_dev = lkbde_get_dma_dev(0); + + ptp_priv->dma_mem_size = sizeof(bksync_evlog_t); /*sizeof(bksync_evlog_t);*/ + + if (ptp_priv->evlog == NULL) { + DBG_ERR(("Allocate memory for event log\n")); + ptp_priv->evlog = DMA_ALLOC_COHERENT(ptp_priv->dma_dev, + ptp_priv->dma_mem_size, + &dma_mem); + if (ptp_priv->evlog != NULL) { + ptp_priv->dma_mem = dma_mem; + } + } + + if (ptp_priv->evlog != NULL) { + /* Reset memory */ + memset((void *)ptp_priv->evlog, 0, ptp_priv->dma_mem_size); + + DBG_ERR(("Shared memory allocation (%d bytes) for event log successful at 0x%016lx.\n", + ptp_priv->dma_mem_size, (long unsigned int)ptp_priv->dma_mem)); + } + +#ifdef BDE_EDK_SUPPORT + /* Do nothing */ +#else + /* Allocate dma for timestmap logging for extts */ + dma_mem = 0; + ptp_priv->extts_dma_mem_size = sizeof(bksync_fw_extts_log_t); + if (ptp_priv->extts_log == NULL) { + DBG_ERR(("Allocate memory for extts log\n")); + ptp_priv->extts_log = DMA_ALLOC_COHERENT(ptp_priv->dma_dev, + ptp_priv->extts_dma_mem_size, + &dma_mem); + if (ptp_priv->extts_log != NULL) { + ptp_priv->extts_dma_mem_addr = dma_mem; + } + } + + if (ptp_priv->extts_log != NULL) { + /* Reset memory */ + memset((void *)ptp_priv->extts_log, 0, ptp_priv->extts_dma_mem_size); + ptp_priv->extts_log->tail = 0; + ptp_priv->extts_event.head = -1; + ptp_priv->extts_log->head = -1; + + DBG_ERR(("Shared memory allocation (%d bytes) for extts log successful at 0x%016lx.\n", + ptp_priv->extts_dma_mem_size, (long unsigned int)ptp_priv->extts_dma_mem_addr)); + } +#endif + return; +} + +static void bksync_ptp_fw_data_free(void) +{ + if (ptp_priv->evlog != NULL) { + DMA_FREE_COHERENT(ptp_priv->dma_dev, ptp_priv->dma_mem_size, + (void *)ptp_priv->evlog, ptp_priv->dma_mem); + ptp_priv->evlog = NULL; + } + +#ifdef BDE_EDK_SUPPORT + /* Do nothing */ +#else + if (ptp_priv->extts_log != NULL) { + DBG_ERR(("Free shared memory : extts log of %d bytes\n", ptp_priv->extts_dma_mem_size)); + DMA_FREE_COHERENT(ptp_priv->dma_dev, ptp_priv->extts_dma_mem_size, + (void *)ptp_priv->extts_log, ptp_priv->extts_dma_mem_addr); + ptp_priv->extts_log = NULL; + } +#endif + return; +} + + + +static void bksync_ptp_dma_init(int dcb_type) +{ + int endianess; + int num_pports = 256; + int mem_size = 16384; /*sizeof(bksync_info_t);*/ + + + ptp_priv->num_pports = num_pports; + ptp_priv->dcb_type = dcb_type; + + if (ptp_priv->shared_addr == NULL) { + ptp_priv->shared_addr = kzalloc(16384, GFP_KERNEL); + ptp_priv->port_stats = kzalloc((sizeof(bksync_port_stats_t) * num_pports), GFP_KERNEL); + } + + if (ptp_priv->shared_addr != NULL) { + /* Reset memory. */ + memset((void *)ptp_priv->shared_addr, 0, mem_size); + +#ifdef __LITTLE_ENDIAN + endianess = 0; +#else + endianess = 1; +#endif + +#ifdef BDE_EDK_SUPPORT + /* Do nothing */ + (void)endianess; +#else + DEV_WRITE32(ptp_priv, CMIC_CMC_SCHAN_MESSAGE_14r(CMIC_CMC_BASE), ((pci_cos << 16) | endianess)); + + DEV_WRITE32(ptp_priv, CMIC_CMC_SCHAN_MESSAGE_15r(CMIC_CMC_BASE), 1); + DEV_WRITE32(ptp_priv, CMIC_CMC_SCHAN_MESSAGE_16r(CMIC_CMC_BASE), 1); +#endif + } + + bksync_ptp_fw_data_alloc(); + + DBG_VERB(("%s %p:%p, dcb_type: %d\n", __FUNCTION__, ptp_priv->base_addr,(void *)ptp_priv->shared_addr, dcb_type)); + + ptp_priv->mirror_encap_bmp = 0x0; + +#ifdef BDE_EDK_SUPPORT + /* Do Nothing */ +#else + hostcmd_regs[0] = CMIC_CMC_SCHAN_MESSAGE_21r(CMIC_CMC_BASE); + hostcmd_regs[1] = CMIC_CMC_SCHAN_MESSAGE_20r(CMIC_CMC_BASE); + hostcmd_regs[2] = CMIC_CMC_SCHAN_MESSAGE_19r(CMIC_CMC_BASE); + hostcmd_regs[3] = CMIC_CMC_SCHAN_MESSAGE_18r(CMIC_CMC_BASE); + hostcmd_regs[4] = CMIC_CMC_SCHAN_MESSAGE_17r(CMIC_CMC_BASE); +#endif + + return; +} + + +/** + * bksync_ioctl_cmd_handler + * @kmsg: kcom message - ptp clock ioctl command. + * Description: This function will handle ioctl commands + * from user mode. + */ +static int +bksync_ioctl_cmd_handler(kcom_msg_clock_cmd_t *kmsg, int len, int dcb_type) +{ + u32 fw_status; + bksync_dnx_jr2_devices_system_info_t *tmp_jr2devs_sys_info = NULL; + int tmp = 0; +#ifdef BDE_EDK_SUPPORT + uint64_t paddr; +#endif + kmsg->hdr.type = KCOM_MSG_TYPE_RSP; + + if (!module_initialized && kmsg->clock_info.cmd != KSYNC_M_HW_INIT) { + kmsg->hdr.status = KCOM_E_NOT_FOUND; + return sizeof(kcom_msg_hdr_t); + } + + switch(kmsg->clock_info.cmd) { + case KSYNC_M_HW_INIT: + pci_cos = kmsg->clock_info.data[0]; + DBG_VERB(("Configuring pci_cosq:%d\n", pci_cos)); + if (kmsg->clock_info.data[1] == 0 || kmsg->clock_info.data[1] == 1) { + /* Return success if the app is already initialized. */ + if (module_initialized) { + kmsg->hdr.status = KCOM_E_NONE; + return sizeof(kcom_msg_hdr_t); + } + + fw_core = kmsg->clock_info.data[1]; +#ifdef BDE_EDK_SUPPORT + paddr = kmsg->clock_info.data[7] << 32; + paddr |= kmsg->clock_info.data[8]; + ptp_priv->fw_comm = (bksync_fw_comm_t *)lkbde_edk_dmamem_map_p2v(paddr); + if (ptp_priv->fw_comm == NULL) { + DBG_ERR(("Hostram address conversion to get virtual address failed\n")); + kmsg->hdr.status = KCOM_E_RESOURCE; + return sizeof(kcom_msg_hdr_t); + } +#endif + + bksync_ptp_dma_init(dcb_type); + +#ifdef BDE_EDK_SUPPORT + /* Data from FW, hence don't memset fw_comm after address converstion */ + fw_status = ptp_priv->fw_comm->cmd; +#else + DEV_READ32(ptp_priv, CMIC_CMC_SCHAN_MESSAGE_21r(CMIC_CMC_BASE), &fw_status); +#endif + /* Return error if the app is not ready yet. */ + if (fw_status != 0xBADC0DE1) { + kmsg->hdr.status = KCOM_E_RESOURCE; + return sizeof(kcom_msg_hdr_t); + } + + (ptp_priv->bksync_init_info).uc_port_num = kmsg->clock_info.data[2]; + (ptp_priv->bksync_init_info).uc_port_sysport = kmsg->clock_info.data[3]; + (ptp_priv->bksync_init_info).host_cpu_port = kmsg->clock_info.data[4]; + (ptp_priv->bksync_init_info).host_cpu_sysport = kmsg->clock_info.data[5]; + (ptp_priv->bksync_init_info).udh_len = kmsg->clock_info.data[6]; + (ptp_priv->bksync_init_info).application_v2 = kmsg->clock_info.data[9]; + + DBG_VERB(("fw_core:%d uc_port:%d uc_sysport:%d pci_port:%d pci_sysport:%d application_v2:%d\n", + kmsg->clock_info.data[1], kmsg->clock_info.data[2], kmsg->clock_info.data[3], + kmsg->clock_info.data[4], kmsg->clock_info.data[5], kmsg->clock_info.data[9])); + + DBG_VERB(("uc_port:%d uc_sysport:%d pci_port:%d pci_sysport:%d application_v2:%d\n", + (ptp_priv->bksync_init_info).uc_port_num, + (ptp_priv->bksync_init_info).uc_port_sysport, + (ptp_priv->bksync_init_info).host_cpu_port, + (ptp_priv->bksync_init_info).host_cpu_sysport, + (ptp_priv->bksync_init_info).application_v2)); + + if (bksync_ptp_init(&(ptp_priv->ptp_caps)) >= 0) { + module_initialized = 1; + } + + } + break; + case KSYNC_M_HW_DEINIT: +#ifdef BDE_EDK_SUPPORT + /* Do nothing */ +#else + DEV_WRITE32(ptp_priv, CMIC_CMC_SCHAN_MESSAGE_15r(CMIC_CMC_BASE), 0); + DEV_WRITE32(ptp_priv, CMIC_CMC_SCHAN_MESSAGE_16r(CMIC_CMC_BASE), 0); +#endif + bksync_ptp_deinit(&(ptp_priv->ptp_caps)); + module_initialized = 0; + break; + case KSYNC_M_HW_TS_DISABLE: + bksync_ptp_hw_tstamp_disable(0, kmsg->clock_info.data[0], 0); + break; + case KSYNC_M_MTP_TS_UPDATE_ENABLE: + bksync_ptp_mirror_encap_update(0, kmsg->clock_info.data[0], TRUE); + break; + case KSYNC_M_MTP_TS_UPDATE_DISABLE: + bksync_ptp_mirror_encap_update(0, kmsg->clock_info.data[0], FALSE); + break; + case KSYNC_M_VERSION: + break; + case KSYNC_M_DNX_JR2DEVS_SYS_CONFIG: + DBG_VERB(("bksync_ioctl_cmd_handler: KSYNC_M_DNX_JR2DEVS_SYS_CONFIG Rcvd.\n")); + + tmp_jr2devs_sys_info = (bksync_dnx_jr2_devices_system_info_t *)((char *)kmsg + sizeof(kcom_msg_clock_cmd_t)); + + (ptp_priv->bksync_jr2devs_sys_info).ftmh_lb_key_ext_size = tmp_jr2devs_sys_info->ftmh_lb_key_ext_size; + (ptp_priv->bksync_jr2devs_sys_info).ftmh_stacking_ext_size = tmp_jr2devs_sys_info->ftmh_stacking_ext_size; + (ptp_priv->bksync_jr2devs_sys_info).pph_base_size = tmp_jr2devs_sys_info->pph_base_size; + + for (tmp = 0; tmp < BKSYNC_DNXJER2_PPH_LIF_EXT_TYPE_MAX; tmp++) { + (ptp_priv->bksync_jr2devs_sys_info).pph_lif_ext_size[tmp] = tmp_jr2devs_sys_info->pph_lif_ext_size[tmp]; + } + + (ptp_priv->bksync_jr2devs_sys_info).system_headers_mode = tmp_jr2devs_sys_info->system_headers_mode; + (ptp_priv->bksync_jr2devs_sys_info).udh_enable = tmp_jr2devs_sys_info->udh_enable; + for (tmp = 0; tmp < BKSYNC_DNXJER2_UDH_DATA_TYPE_MAX; tmp++) { + (ptp_priv->bksync_jr2devs_sys_info).udh_data_lenght_per_type[tmp] = tmp_jr2devs_sys_info->udh_data_lenght_per_type[tmp]; + } + + (ptp_priv->bksync_jr2devs_sys_info).cosq_port_cpu_channel = tmp_jr2devs_sys_info->cosq_port_cpu_channel; + (ptp_priv->bksync_jr2devs_sys_info).cosq_port_pp_port = tmp_jr2devs_sys_info->cosq_port_pp_port; + + tmp_jr2devs_sys_info = &(ptp_priv->bksync_jr2devs_sys_info); + +#if 0 + DBG_VERB(("ftmh_lb_key_ext_size %u ftmh_stacking_ext_size %u pph_base_size %u\n", + tmp_jr2devs_sys_info->ftmh_lb_key_ext_size, tmp_jr2devs_sys_info->ftmh_stacking_ext_size, + tmp_jr2devs_sys_info->pph_base_size)); + + for (tmp = 0; tmp < BKSYNC_DNXJER2_PPH_LIF_EXT_TYPE_MAX ; tmp++) { + DBG_VERB(("pph_lif_ext_size[%u] %u\n", + tmp, tmp_jr2devs_sys_info->pph_lif_ext_size[tmp])); + } + + DBG_VERB(("system_headers_mode %u udh_enable %u\n", + tmp_jr2devs_sys_info->system_headers_mode, tmp_jr2devs_sys_info->udh_enable)); + + for (tmp = 0; tmp < BKSYNC_DNXJER2_UDH_DATA_TYPE_MAX; tmp++) { + DBG_VERB(("udh_data_lenght_per_type [%d] %u\n", + tmp, tmp_jr2devs_sys_info->udh_data_lenght_per_type[tmp])); + } + + DBG_VERB(("cosq_port_cpu_channel :%u cosq_port_pp_port:%u\n", + tmp_jr2devs_sys_info->cosq_port_cpu_channel, tmp_jr2devs_sys_info->cosq_port_cpu_channel)); +#endif + break; + default: + kmsg->hdr.status = KCOM_E_NOT_FOUND; + return sizeof(kcom_msg_hdr_t); + } + + return sizeof(*kmsg); +} + + + +/** + * bksync_ptp_register + * @priv: driver private structure + * Description: this function will register the ptp clock driver + * to kernel. It also does some house keeping work. + */ +static int bksync_ptp_register(void) +{ + int err = -ENODEV; + + /* Support on core-0 or core-1 */ + if (fw_core < 0 || fw_core > 1) { + goto exit; + } + + /* default transport is raw, ieee 802.3 */ + switch (network_transport) { + case 2: /* IEEE 802.3 */ + case 4: /* UDP IPv4 */ + case 6: /* UDP IPv6 */ + break; + default: + network_transport = 0; + } + + ptp_priv = kzalloc(sizeof(*ptp_priv), GFP_KERNEL); + if (!ptp_priv) { + err = -ENOMEM; + goto exit; + } + + /* Reset memory */ + memset(ptp_priv, 0, sizeof(*ptp_priv)); + + err = -ENODEV; + + ptp_priv->ptp_caps = bksync_ptp_caps; + + mutex_init(&(ptp_priv->ptp_lock)); + + /* Register ptp clock driver with bksync_ptp_caps */ + ptp_priv->ptp_clock = ptp_clock_register(&ptp_priv->ptp_caps, NULL); + + /* Initialize the Base address for CMIC and shared Memory access */ + ptp_priv->base_addr = lkbde_get_dev_virt(0); + ptp_priv->dma_dev = lkbde_get_dma_dev(0); + + if (IS_ERR(ptp_priv->ptp_clock)) { + ptp_priv->ptp_clock = NULL; + } else if (ptp_priv->ptp_clock) { + err = 0; + + /* Register BCM-KNET HW Timestamp Callback Functions */ + bkn_hw_tstamp_enable_cb_register(bksync_ptp_hw_tstamp_enable); + bkn_hw_tstamp_disable_cb_register(bksync_ptp_hw_tstamp_disable); + bkn_hw_tstamp_tx_time_get_cb_register(bksync_ptp_hw_tstamp_tx_time_get); + bkn_hw_tstamp_tx_meta_get_cb_register(bksync_ptp_hw_tstamp_tx_meta_get); + bkn_hw_tstamp_rx_pre_process_cb_register(bksync_ptp_hw_tstamp_rx_pre_process); + bkn_hw_tstamp_rx_time_upscale_cb_register(bksync_ptp_hw_tstamp_rx_time_upscale); + bkn_hw_tstamp_ptp_clock_index_cb_register(bksync_ptp_hw_tstamp_ptp_clock_index_get); + bkn_hw_tstamp_ioctl_cmd_cb_register(bksync_ioctl_cmd_handler); + bkn_hw_tstamp_ptp_transport_get_cb_register(bksync_ptp_transport_get); + + } + + /* Initialize proc files */ + bksync_proc_root = proc_mkdir("bcm/ksync", NULL); + bksync_proc_init(); + bksync_sysfs_init(); + ptp_priv->shared_addr = NULL; + ptp_priv->port_stats = NULL; + + bksync_ptp_extts_logging_init(); +exit: + return err; +} + +static int bksync_ptp_remove(void) +{ + if (!ptp_priv) + return 0; + + module_initialized = 0; + + bksync_ptp_extts_logging_deinit(); + + bksync_ptp_time_keep_deinit(); + + bksync_proc_cleanup(); + bksync_sysfs_cleanup(); + remove_proc_entry("bcm/ksync", NULL); + + /* UnRegister BCM-KNET HW Timestamp Callback Functions */ + bkn_hw_tstamp_enable_cb_unregister(bksync_ptp_hw_tstamp_enable); + bkn_hw_tstamp_disable_cb_unregister(bksync_ptp_hw_tstamp_disable); + bkn_hw_tstamp_tx_time_get_cb_unregister(bksync_ptp_hw_tstamp_tx_time_get); + bkn_hw_tstamp_tx_meta_get_cb_unregister(bksync_ptp_hw_tstamp_tx_meta_get); + bkn_hw_tstamp_rx_pre_process_cb_unregister(bksync_ptp_hw_tstamp_rx_pre_process); + bkn_hw_tstamp_rx_time_upscale_cb_unregister(bksync_ptp_hw_tstamp_rx_time_upscale); + bkn_hw_tstamp_ptp_clock_index_cb_unregister(bksync_ptp_hw_tstamp_ptp_clock_index_get); + bkn_hw_tstamp_ioctl_cmd_cb_unregister(bksync_ioctl_cmd_handler); + bkn_hw_tstamp_ptp_transport_get_cb_unregister(bksync_ptp_transport_get); + + /* reset handshaking info */ + DEV_WRITE32(ptp_priv, CMIC_CMC_SCHAN_MESSAGE_15r(CMIC_CMC_BASE), 0); + DEV_WRITE32(ptp_priv, CMIC_CMC_SCHAN_MESSAGE_16r(CMIC_CMC_BASE), 0); + + /* Deinitialize the PTP */ + bksync_ptp_deinit(&(ptp_priv->ptp_caps)); + + bksync_ptp_fw_data_free(); + + if (ptp_priv->port_stats != NULL) { + kfree((void *)ptp_priv->port_stats); + ptp_priv->port_stats = NULL; + } + if (ptp_priv->shared_addr != NULL) { + kfree((void *)ptp_priv->shared_addr); + ptp_priv->shared_addr = NULL; + DBG_ERR(("Free R5 memory\n")); + } + + /* Unregister the bcm ptp clock driver */ + ptp_clock_unregister(ptp_priv->ptp_clock); + + /* Free Memory */ + kfree(ptp_priv); + + return 0; +} +#endif + + +/* + * Generic module functions + */ + +/* + * Function: _pprint + * + * Purpose: + * Print proc filesystem information. + * Parameters: + * None + * Returns: + * Always 0 + */ + static int +_pprint(struct seq_file *m) +{ +#ifdef PTPCLOCK_SUPPORTED + /* put some goodies here */ + pprintf(m, "Broadcom BCM PTP Hardware Clock Module\n"); +#else + pprintf(m, "Broadcom BCM PTP Hardware Clock Module not supported\n"); +#endif + return 0; +} + +/* + * Function: _init + * + * Purpose: + * Module initialization. + * Attached SOC all devices and optionally initializes these. + * Parameters: + * None + * Returns: + * 0 on success, otherwise -1 + */ + static int +_init(void) +{ +#ifdef PTPCLOCK_SUPPORTED + bksync_ptp_register(); + return 0; +#else + return -1; +#endif +} + +/* + * Function: _cleanup + * + * Purpose: + * Module cleanup function + * Parameters: + * None + * Returns: + * Always 0 + */ + static int +_cleanup(void) +{ +#ifdef PTPCLOCK_SUPPORTED + bksync_ptp_remove(); + return 0; +#else + return -1; +#endif +} + +static gmodule_t _gmodule = { + .name = MODULE_NAME, + .major = MODULE_MAJOR, + .init = _init, + .cleanup = _cleanup, + .pprint = _pprint, + .ioctl = NULL, + .open = NULL, + .close = NULL, +}; + + gmodule_t* +gmodule_get(void) +{ + EXPORT_NO_SYMBOLS; + return &_gmodule; +} diff --git a/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/README b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/README new file mode 100644 index 00000000000..e2e3c1ac296 --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/README @@ -0,0 +1,114 @@ +$Id:$ +$Copyright: 2007-2024 Broadcom Inc. All rights reserved. + +Permission is granted to use, copy, modify and/or distribute this +software under either one of the licenses below. + +License Option 1: GPL + +This program is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License, version 2, as +published by the Free Software Foundation (the "GPL"). + +This program is distributed in the hope that it will be useful, but +WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +General Public License version 2 (GPLv2) for more details. + +You should have received a copy of the GNU General Public License +version 2 (GPLv2) along with this source code. + + +License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + +This software is governed by the Broadcom Open Network Switch APIs license: +https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + + +DCB Library + +The DCB Library is a stand-alone library that allows access to +DCB fields easily without bringing all the complexity of the +SDK source tree. + + +DCB Initialization + +The following routine initializes a DCB handle. A unique DCB handle +needs to be initialized for a given device ID and revision ID. + +This initialization function needs to be called before accessing +any DCB field. + +Function: +#include + + int dcb_handle_init(dcb_handle_t *handle, uint16 dev_id, uint8 rev_id); + +Parameters: + handle - (IN/OUT) Pointer to DCB library handle + device_id - (IN) Device ID + rev_id - (IN) Revision ID + +Returns: + DCB_OK Success + DCB_ERROR Failure + + +DCB Field GET + +Set of macros that return the value from a DCB field. + +The correct DCB structure needs to be allocated and +initialized prior to calling any of the get/set macros. + +Macro: + DCB__GET(handle, dcb) + +Parameters: + handle - (IN) Pointer to the handle for a given device; + type is dcb_handle_t * + dcb - (IN) Pointer to the DCB structure to get the field value from; + type is dcb_t * +Returns: + Value of DCB field + + +DCB Field SET + +Set of macros to set the value for a DCB field. + +The correct DCB structure needs to be allocated and +initialized prior to calling any of the get/set macros. + +Macro: + DCB__SET(handle, dcb, value) + +Parameters: + handle - (IN) Pointer to the handle for a given device; + type is dcb_handle_t * + dcb - (IN/OUT) Pointer to the DCB structure to set the field value to; + type is dcb_t * + value - (IN) Value to set for the DCB field; + type varies + +Returns: + None + + +Compiling the DCB Library + +To compile the DCB library, the DCBDIR environment variable needs +to be set to point to the location where the DCB library resides +and run make. If DCBDIR is not set, the default value of DCBDIR is the parent +directory of this README file. + +The DCB library output will be generated in $DCBDIR/build/ by default. +The output directory can be specified by setting the BLDDIR environment +variable. + +Example: + cd + export DCBDIR=`pwd` + cd make + make diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/RELEASE b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/RELEASE similarity index 100% rename from platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/RELEASE rename to platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/RELEASE diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/appl/dcb/dcb_handler.h b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/include/appl/dcb/dcb_handler.h similarity index 99% rename from platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/appl/dcb/dcb_handler.h rename to platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/include/appl/dcb/dcb_handler.h index 9475b302325..7a3498f756e 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/appl/dcb/dcb_handler.h +++ b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/include/appl/dcb/dcb_handler.h @@ -1,7 +1,6 @@ /* * $Id:$ - * - * $Copyright: 2017-2025 Broadcom Inc. All rights reserved. + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/appl/dcb/dcb_int.h b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/include/appl/dcb/dcb_int.h similarity index 98% rename from platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/appl/dcb/dcb_int.h rename to platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/include/appl/dcb/dcb_int.h index fecdbbad2ea..5349e77ee9b 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/appl/dcb/dcb_int.h +++ b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/include/appl/dcb/dcb_int.h @@ -1,7 +1,6 @@ /* * $Id:$ - * - * $Copyright: 2017-2025 Broadcom Inc. All rights reserved. + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. diff --git a/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/include/sal/types.h b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/include/sal/types.h new file mode 100644 index 00000000000..17d60c34ebd --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/include/sal/types.h @@ -0,0 +1,86 @@ +/* + * $Id: types.h,v 1.1 Broadcom SDK $ + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * + * + * File: types.h + * Purpose: SAL Definitions + */ + +#ifndef _SAL_TYPES_H_ +#define _SAL_TYPES_H_ + +#ifdef DCB_CUSTOM_CONFIG +/* Allow application to override sal_sprintf, sal_memset, sal_memcpy */ +#include +#else +#ifdef __KERNEL__ +#include +#else +/* Needed for sprintf, memset */ +#include +#include +#endif +#endif + + +/* Booleans */ +#ifndef TRUE +#define TRUE 1 +#endif + +#ifndef FALSE +#define FALSE 0 +#endif + +/* Data types */ +typedef unsigned char uint8; /* 8-bit quantity */ +typedef unsigned short uint16; /* 16-bit quantity */ +typedef unsigned int uint32; /* 32-bit quantity */ +typedef uint64_t uint64; /* 64-bit quantity */ + +typedef signed char int8; /* 8-bit quantity */ +typedef signed short int16; /* 16-bit quantity */ +typedef signed int int32; /* 32-bit quantity */ + +typedef uint32 sal_paddr_t; /* Physical address (PCI address) */ +typedef uintptr_t sal_vaddr_t; /* Virtual address (Host address) */ + +#define PTR_TO_INT(x) ((uint32)(((uint64)(x))&0xFFFFFFFF)) +#define PTR_HI_TO_INT(x) ((uint32)((((uint64)(x))>>32)&0xFFFFFFFF)) + +typedef uint8 sal_mac_addr_t[6]; /* MAC address */ + +/* Macros */ +#define COMPILER_REFERENCE(_a) ((void)(_a)) + +/* Functions */ +#define sal_memset memset +#define sal_sprintf sprintf +#define sal_memcpy memcpy + +#endif /* _SAL_TYPES_H_ */ diff --git a/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/include/sdk_config.h b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/include/sdk_config.h new file mode 100644 index 00000000000..849c7e7f80e --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/include/sdk_config.h @@ -0,0 +1,31 @@ +/* + * $Id:$ + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * + * + * Stub header file + */ diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/shared/bsl.h b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/include/shared/bsl.h similarity index 96% rename from platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/shared/bsl.h rename to platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/include/shared/bsl.h index 587a0753f85..996679fe520 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/shared/bsl.h +++ b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/include/shared/bsl.h @@ -1,7 +1,6 @@ /* * $Id: $ - * - * $Copyright: 2017-2025 Broadcom Inc. All rights reserved. + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. diff --git a/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/include/shared/rx.h b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/include/shared/rx.h new file mode 100644 index 00000000000..4ba3d99660a --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/include/shared/rx.h @@ -0,0 +1,622 @@ +/* + * $Id: rx.h,v 1.35 Broadcom SDK $ + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * + * + * File: rx.h + * Purpose: Packet Receive Reason Types shared between BCM and SOC layers + */ + +#ifndef _SHR_RX_H_ +#define _SHR_RX_H_ + +/* + * PKT RX Packet Reasons; reason CPU received the packet. + * Notes: It is possible no reasons are set (directed to CPU from ARL + * for example), or multiple reasons may be set. + */ + +typedef enum _shr_rx_reason_e { + _SHR_RX_INVALID = 0, + _SHR_RX_ARP = 1, /* ARP Packet */ + _SHR_RX_BPDU = 2, /* BPDU Packet */ + _SHR_RX_BROADCAST = 3, /* Broadcast packet */ + _SHR_RX_CLASS_BASED_MOVE = 4, /* Class-based move prevented */ + _SHR_RX_CLASS_TAG_PACKETS = 5, /* Higig Header with PPD=1 */ + _SHR_RX_CONTROL = 6, /* Control frame or reserved addr */ + _SHR_RX_CPU_LEARN = 7, /* CPU Learned (or VLAN not found */ + /* on Strata devices) */ + _SHR_RX_DEST_LOOKUP_FAIL = 8, /* Destination lookup fail (or L3 */ + /* station move on Strata devices) */ + _SHR_RX_DHCP = 9, /* DHCP packets */ + _SHR_RX_DOS_ATTACK = 10, /* DOS Attack Packet */ + _SHR_RX_E2E_HOL_IBP = 11, /* E2E HOL or IBP Packet */ + _SHR_RX_ENCAP_HIGIG_ERROR = 12, /* Non-HG packets received on an */ + /* E-HG port */ + _SHR_RX_FILTER_MATCH = 13, /* Filter Match */ + _SHR_RX_GRE_CHECKSUM = 14, /* GRE checksum */ + _SHR_RX_GRE_SOURCE_ROUTE = 15, /* GRE source routing */ + _SHR_RX_HIGIG_CONTROL = 16, /* Higig Packet with Control Opcode */ + _SHR_RX_HIGIG_HDR_ERROR = 17, /* Higig+ header errors */ + _SHR_RX_ICMP_REDIRECT = 18, /* ICMP Recirect */ + _SHR_RX_IGMP = 19, /* IGMP packet */ + _SHR_RX_INGRESS_FILTER = 20, /* Ingress Filter (VLAN membership) */ + _SHR_RX_IP = 21, /* IP packet */ + _SHR_RX_IPFIX_RATE_VIOLATION = 22, /* IPFIX flows exceed metering */ + _SHR_RX_IP_MCAST_MISS = 23, /* IPMC miss */ + _SHR_RX_IP_OPTION_VERSION = 24, /* IP options present or IP ver != 4 */ + _SHR_RX_IPMC = 25, /* Class D IP multicast packet */ + _SHR_RX_IPMC_RSVD = 26, /* IPMC Reserved Packet */ + _SHR_RX_L2_CPU = 27, /* L2_TABLE - copy to CPU (on 5690) */ + _SHR_RX_L2_DEST_MISS = 28, /* L2 destination lookup failure */ + _SHR_RX_L2_LEARN_LIMIT = 29, /* L2 Learn Limit */ + _SHR_RX_L2_MOVE = 30, /* L2 Station Movement */ + _SHR_RX_L2_MTU_FAIL = 31, /* L2 MTU check fail */ + _SHR_RX_L2_NON_UNICAST_MISS = 32, /* L2 Non-Unicast lookup miss */ + _SHR_RX_L2_SOURCE_MISS = 33, /* L2 source lookup failure */ + _SHR_RX_L3_ADDR_BIND_FAIL = 34, /* MAC to IP bind check failure */ + _SHR_RX_L3_DEST_MISS = 35, /* L3 DIP Miss */ + _SHR_RX_L3_HEADER_ERROR = 36, /* L3 header - IP options, */ + _SHR_RX_L3_MTU_FAIL = 37, /* L3 MTU check fail */ + _SHR_RX_L3_SLOW_PATH = 38, /* L3 slow path processed pkt. */ + _SHR_RX_L3_SOURCE_MISS = 39, /* L3 SIP Miss */ + _SHR_RX_L3_SOUCE_MOVE = 40, /* L3 Station Movement */ + _SHR_RX_MARTIAN_ADDR = 41, /* Pkt. with Martian address */ + _SHR_RX_MCAST_IDX_ERROR = 42, /* Multicast index error */ + _SHR_RX_MCAST_MISS = 43, /* MC miss */ + _SHR_RX_MIM_SERVICE_ERROR = 44, /* MiM terminated unicast packets */ + /* that do not have a valid I-SID */ + _SHR_RX_MPLS_CTRL_WORD_ERROR = 45, /* MPLS Control Word type is not 0 */ + _SHR_RX_MPLS_ERROR = 46, /* MPLS error */ + _SHR_RX_MPLS_INVALID_ACTION = 47, /* MPLS Invalid Action */ + _SHR_RX_MPLS_INVALID_PAYLOAD = 48, /* MPLS Invalid Payload */ + _SHR_RX_MPLS_LABEL_MISS = 49, /* MPLS table miss */ + _SHR_RX_MPLS_SEQUENCE_NUMBER = 50, /* MPLS Sequence number */ + _SHR_RX_MPLS_TTL = 51, /* MPLS TTL */ + _SHR_RX_MULTICAST = 52, /* Multicast packet */ + _SHR_RX_NHOP = 53, /* Copy to CPU from NH Idx Tbl */ + _SHR_RX_OAM_ERROR = 54, /* OAM packets to CPU for error cases */ + _SHR_RX_OAM_SLOW_PATH = 55, /* OAM packets to CPU - slowpath */ + /* process */ + _SHR_RX_OAM_LMDM = 56, /* OAM LMM/LMR, DMM/DMR packets to CPU */ + _SHR_RX_PARITY_ERROR = 57, /* Parity error on IP tables */ + _SHR_RX_PROTOCOL = 58, /* Protocol Packet */ + _SHR_RX_SAMPLE_DEST = 59, /* Egress sFlow sampled */ + _SHR_RX_SAMPLE_SOURCE = 60, /* Ingress sFlow sampled */ + _SHR_RX_SHARED_VLAN_MISMATCH = 61, /* Private VLAN Mismatch */ + _SHR_RX_SOURCE_ROUTE = 62, /* Source routing bit set */ + _SHR_RX_TIME_STAMP = 63, /* Network time sync packet */ + _SHR_RX_TTL = 64, /* TTL <= 0 or TTL < IPMC threshold */ + _SHR_RX_TTL1 = 65, /* L3UC or IPMC packet with TTL */ + /* equal to 1 */ + _SHR_RX_TUNNEL_ERROR = 66, /* Tunnel error trap */ + _SHR_RX_UDP_CHECKSUM = 67, /* UDP checksum */ + _SHR_RX_UNKNOWN_VLAN = 68, /* Unknown VLAN; VID = 0xfff; */ + /* CPU Learn bit (on 5690 devices) */ + _SHR_RX_URPF_FAIL = 69, /* URPF Check Failed */ + _SHR_RX_VC_LABEL_MISS = 70, /* VPLS table miss */ + _SHR_RX_VLAN_FILTER_MATCH = 71, /* VLAN Filter Match */ + _SHR_RX_WLAN_CLIENT_ERROR = 72, /* ROC error packets to the CPU */ + _SHR_RX_WLAN_SLOW_PATH = 73, /* WLAN packets slowpath to the CPU */ + _SHR_RX_WLAN_DOT1X_DROP = 74, /* WLAN client is unauthenticated */ + _SHR_RX_EXCEPTION_FLOOD = 75, /* Exception processing or flooding */ + _SHR_RX_TIMESYNC = 76, /* Time Sync protocol packet */ + _SHR_RX_EAV_DATA = 77, /* Ethernet AV data packet */ + _SHR_RX_SAME_PORT_BRIDGE = 78, /* Hairpin or Same port */ + /* switching/bridging */ + _SHR_RX_SPLIT_HORIZON = 79, /* Basic bridging or VPLS Split */ + /* horizon */ + _SHR_RX_L4_ERROR = 80, /* TCP/UDP header or port number */ + /* errors */ + _SHR_RX_STP = 81, /* STP Ingress or Egress checks */ + _SHR_RX_EGRESS_FILTER_REDIRECT = 82, /* Vlan egress filter redirect */ + _SHR_RX_FILTER_REDIRECT = 83, /* Field processor redirect */ + _SHR_RX_LOOPBACK = 84, /* Loopbacked */ + _SHR_RX_VLAN_TRANSLATE = 85, /* VLAN translation table missed when */ + /* it is expected to hit */ + _SHR_RX_MMRP = 86, /* Packet of type MMRP */ + _SHR_RX_SRP = 87, /* Packet of type SRP */ + _SHR_RX_TUNNEL_CONTROL = 88, /* Tunnel control packet */ + _SHR_RX_L2_MARKED = 89, /* L2 table marked */ + _SHR_RX_WLAN_SLOWPATH_KEEPALIVE = 90, /* WLAN slowpath to the CPU, */ + /* otherwise dropped */ + _SHR_RX_STATION = 91, /* My Station packet to CPU */ + _SHR_RX_NIV = 92, /* NIV packet */ + _SHR_RX_NIV_PRIO_DROP = 93, /* NIV packet, priority drop */ + _SHR_RX_NIV_INTERFACE_MISS = 94, /* NIV packet, interface miss */ + _SHR_RX_NIV_RPF_FAIL = 95, /* NIV packet, RPF failed */ + _SHR_RX_NIV_TAG_INVALID = 96, /* NIV packet, invalid tag */ + _SHR_RX_NIV_TAG_DROP = 97, /* NIV packet, tag drop */ + _SHR_RX_NIV_UNTAG_DROP = 98, /* NIV packet, untagged drop */ + _SHR_RX_TRILL = 99, /* TRILL packet */ + _SHR_RX_TRILL_INVALID = 100, /* TRILL packet, header error */ + _SHR_RX_TRILL_MISS = 101, /* TRILL packet, lookup miss */ + _SHR_RX_TRILL_RPF_FAIL = 102, /* TRILL packet, RPF check failed */ + _SHR_RX_TRILL_SLOWPATH = 103, /* TRILL packet, slowpath to CPU */ + _SHR_RX_TRILL_CORE_IS_IS = 104, /* TRILL packet, Core IS-IS */ + _SHR_RX_TRILL_TTL = 105, /* TRILL packet, TTL check failed */ + _SHR_RX_BFD_SLOWPATH = 106, /* The BFD packet is being fwd to the */ + /* local uC for processing */ + _SHR_RX_BFD = 107, /* BFD Error */ + _SHR_RX_MIRROR = 108, /* Mirror packet */ + _SHR_RX_REGEX_ACTION = 109, /* Flow tracker */ + _SHR_RX_REGEX_MATCH = 110, /* Signature Match */ + _SHR_RX_FAILOVER_DROP = 111, /* Protection drop data */ + _SHR_RX_WLAN_TUNNEL_ERROR = 112, /* WLAN shim header error to CPU */ + _SHR_RX_CONGESTION_CNM_PROXY = 113, /* Congestion CNM Proxy */ + _SHR_RX_CONGESTION_CNM_PROXY_ERROR = 114, /* Congestion CNM Proxy Error */ + _SHR_RX_CONGESTION_CNM = 115, /* Congestion CNM Internal Packet */ + _SHR_RX_MPLS_UNKNOWN_ACH = 116, /* MPLS Unknown ACH */ + _SHR_RX_MPLS_LOOKUPS_EXCEEDED = 117, /* MPLS out of lookups */ + _SHR_RX_MPLS_RESERVED_ENTROPY_LABEL = 118, /* MPLS Entropy label in unallowed */ + /* range */ + _SHR_RX_MPLS_ILLEGAL_RESERVED_LABEL = 119, /* MPLS illegal reserved label */ + _SHR_RX_MPLS_ROUTER_ALERT_LABEL = 120, /* MPLS alert label */ + _SHR_RX_NIV_PRUNE = 121, /* NIV access port pruning (dst = src) */ + _SHR_RX_VIRTUAL_PORT_PRUNE = 122, /* SVP == DVP */ + _SHR_RX_NON_UNICAST_DROP = 123, /* Explicit multicast packet drop */ + _SHR_RX_TRILL_PACKET_PORT_MISMATCH = 124, /* TRILL packet vs Rbridge port */ + /* conflict */ + _SHR_RX_WLAN_CLIENT_MOVE = 125, /* WLAN client moved */ + _SHR_RX_WLAN_SOURCE_PORT_MISS = 126, /* WLAN SVP miss */ + _SHR_RX_WLAN_CLIENT_SOURCE_MISS = 127, /* WLAN client database SA miss */ + _SHR_RX_WLAN_CLIENT_DEST_MISS = 128, /* WLAN client database DA miss */ + _SHR_RX_WLAN_MTU = 129, /* WLAN MTU error */ + _SHR_RX_TRILL_NAME = 130, /* TRILL packet, Name check failed */ + _SHR_RX_L2GRE_SIP_MISS = 131, /* L2 GRE SIP miss */ + _SHR_RX_L2GRE_VPN_ID_MISS = 132, /* L2 GRE VPN id miss */ + _SHR_RX_TIMESYNC_UNKNOWN_VERSION = 133, /* Unknown version of IEEE1588 */ + _SHR_RX_BFD_ERROR = 134, /* BFD ERROR */ + _SHR_RX_BFD_UNKNOWN_VERSION = 135, /* BFD UNKNOWN VERSION */ + _SHR_RX_BFD_INVALID_VERSION = 136, /* BFD INVALID VERSION */ + _SHR_RX_BFD_LOOKUP_FAILURE = 137, /* BFD LOOKUP FAILURE */ + _SHR_RX_BFD_INVALID_PACKET = 138, /* BFD INVALID PACKET */ + _SHR_RX_VXLAN_SIP_MISS = 139, /* Vxlan SIP miss */ + _SHR_RX_VXLAN_VPN_ID_MISS = 140, /* Vxlan VPN id miss */ + _SHR_RX_FCOE_ZONE_CHECK_FAIL = 141, /* Fcoe zone check failed */ + _SHR_RX_IPMC_INTERFACE_MISMATCH = 142, /* IPMC input interface check failed */ + _SHR_RX_NAT = 143, /* NAT */ + _SHR_RX_TCP_UDP_NAT_MISS = 144, /* TCP/UDP packet NAT lookup miss */ + _SHR_RX_ICMP_NAT_MISS = 145, /* ICMP packet NAT lookup miss */ + _SHR_RX_NAT_FRAGMENT = 146, /* NAT lookup on fragmented packet */ + _SHR_RX_NAT_MISS = 147, /* Non TCP/UDP/ICMP packet NAT lookup */ + /* miss */ + _SHR_RX_UNKNOWN_SUBTENTING_PORT = 148, /* UNKNOWN_SUBTENTING_PORT */ + _SHR_RX_LLTAG_ABSENT_DROP = 149, /* LLTAG_ABSENT */ + _SHR_RX_LLTAG_PRESENT_DROP = 150, /* LLTAG_PRESENT */ + _SHR_RX_OAM_CCM_SLOWPATH = 151, /* OAM CCM packet copied to CPU */ + _SHR_RX_OAM_INCOMPLETE_OPCODE = 152, /* OAM INCOMPLETE_OPCODE */ + _SHR_RX_BHH_OAM_PACKET = 153, /* BHH OAM Packet */ + _SHR_RX_RESERVED_0 = 154, /* Broadcom Reserved */ + _SHR_RX_OAM_MPLS_LMDM = 155, /* MPLS LM/DM (RFC 6374) packet */ + _SHR_RX_SAT = 156, /* OAM SAT pkt */ + _SHR_RX_SAMPLE_SOURCE_FLEX = 157, /* Flexible sampled packets to CPU */ + _SHR_RX_FLEX_SFLOW = 158, /* Flex Sflow? */ + _SHR_RX_VXLT_MISS = 159, /* VLAN Translation miss packet */ + _SHR_RX_TUNNEL_DECAP_ECN_ERROR = 160, /* Tunnel decap ECN error */ + _SHR_RX_TUNNEL_OBJECT_VALIDATION_FAIL = 161, /* Tunnel Object Validation Fail */ + _SHR_RX_L3_CPU = 162, /* L3 Copy to CPU */ + _SHR_RX_TUNNEL_ADAPT_LOOKUP_MISS = 163, /* Tunnel Adapt Lookup Miss Drop */ + _SHR_RX_PACKET_FLOW_SELECT_MISS = 164, /* Packet Flow Select Miss */ + _SHR_RX_PROTECTION_DATA_DROP = 165, /* Protection Data Drop */ + _SHR_RX_PACKET_FLOW_SELECT = 166, /* Packet Flow Select */ + _SHR_RX_OTHER_LOOKUP_MISS = 167, /* Neither Source or Dest type of */ + /* Lookup Miss */ + _SHR_RX_INVALID_TPID = 168, /* Invalid TPID */ + _SHR_RX_MPLS_CONTROL_PACKET = 169, /* MPLS Control Packet */ + _SHR_RX_TUNNEL_TTL_ERROR = 170, /* Tunnel TTL Error */ + _SHR_RX_L2_HEADER_ERROR = 171, /* L2 header */ + _SHR_RX_OTHER_LOOKUP_HIT = 172, /* Neither Source or Dest type of */ + /* Lookup Hit */ + _SHR_RX_L2_SRC_LOOKUP_MISS = 173, /* L2 Source Lookup Miss */ + _SHR_RX_L2_SRC_LOOKUP_HIT = 174, /* L2 Source Lookup Hit */ + _SHR_RX_L2_DST_LOOKUP_MISS = 175, /* L2 Dest Lookup Miss */ + _SHR_RX_L2_DST_LOOKUP_HIT = 176, /* L2 Dest Lookup Hit */ + _SHR_RX_L3_SRC_ROUTE_LOOKUP_MISS = 177, /* L3 Source Route Lookup Miss */ + _SHR_RX_L3_SRC_HOST_LOOKUP_MISS = 178, /* L3 Source Host Lookup Miss */ + _SHR_RX_L3_SRC_ROUTE_LOOKUP_HIT = 179, /* L3 Source Route Lookup Hit */ + _SHR_RX_L3_SRC_HOST_LOOKUP_HIT = 180, /* L3 Source Host Lookup Hit */ + _SHR_RX_L3_DST_ROUTE_LOOKUP_MISS = 181, /* L3 Dest Route Lookup Miss */ + _SHR_RX_L3_DST_HOST_LOOKUP_MISS = 182, /* L3 Dest Host Lookup Miss */ + _SHR_RX_L3_DST_ROUTE_LOOKUP_HIT = 183, /* L3 Dest Route Lookup Hit */ + _SHR_RX_L3_DST_HOST_LOOKUP_HIT = 184, /* L3 Dest Host Lookup Hit */ + _SHR_RX_VLAN_TRANSLATE1_LOOKUP1_MISS = 185, /* VLAN Translate1 Lookup1 Miss */ + _SHR_RX_VLAN_TRANSLATE1_LOOKUP2_MISS = 186, /* VLAN Translate1 Lookup2 Miss */ + _SHR_RX_MPLS_LOOKUP1_MISS = 187, /* MPLS Lookup1 Miss */ + _SHR_RX_MPLS_LOOKUP2_MISS = 188, /* MPLS Lookup2 Miss */ + _SHR_RX_L3_TUNNEL_LOOKUP_MISS = 189, /* L3 Tunnel Lookup Miss */ + _SHR_RX_VLAN_TRANSLATE2_LOOKUP1_MISS = 190, /* VLAN Translate2 Lookup1 Miss */ + _SHR_RX_VLAN_TRANSLATE2_LOOKUP2_MISS = 191, /* VLAN Translate2 Lookup2 Miss */ + _SHR_RX_L2_STU_FAIL = 192, /* L2 STU check fail */ + _SHR_RX_SR_COUNTER_EXCEEDED = 193, /* Seamless Redundancy(SR) - */ + /* Counter Threshold Exceeded */ + _SHR_RX_SR_COPY_TO_CPU_BIT0 = 194, /* Seamless Redundancy(SR) copy to CPU */ + /* SR custom reason code bit 0 */ + _SHR_RX_SR_COPY_TO_CPU_BIT1 = 195, /* SR custom reason code bit 1 */ + _SHR_RX_SR_COPY_TO_CPU_BIT2 = 196, /* SR custom reason code bit 2 */ + _SHR_RX_SR_COPY_TO_CPU_BIT3 = 197, /* SR custom reason code bit 3 */ + _SHR_RX_SR_COPY_TO_CPU_BIT4 = 198, /* SR custom reason code bit 4 */ + _SHR_RX_SR_COPY_TO_CPU_BIT5 = 199, /* SR custom reason code bit 5 */ + _SHR_RX_L3_HEADER_MISMATCH = 200, /* L3 Header Mismatch */ + _SHR_RX_DLB_MONITOR = 201, /* DLB Monitor */ + _SHR_RX_ETRAP_MONITOR = 202, /* ETRAP Monitor */ + _SHR_RX_INT_TURNAROUND = 203, /* INT TurnAround */ + _SHR_RX_INT_HOP_LIMIT = 204, /* INT Hop Limit */ + _SHR_RX_PROTECTION_STATUS_DOWN = 205, /* Protection Status Down */ + _SHR_RX_SVTAG = 206, /* SVtag */ + _SHR_RX_SVTAG_LOOKUP_MISS = 207, /* SVtag Lookup Miss */ + _SHR_RX_PKT_DROP_ON_PORT_HIGIG3_CHECK = 208, /* Port HIGIG3 check fail */ + _SHR_RX_SRV6_PROCESS_ERROR = 209, /* SRV6 process error */ + _SHR_RX_SRV6_VALIDATION_ERROR = 210, /* SRV6 validation error */ + _SHR_RX_SRV6_UNKNOWN_RT_WITH_NONZERO_SL = 211, /* unknown routing type in SRV6 */ + /* packets with nonzero segment */ + /* left field */ + _SHR_RX_RCPU_TO_CPU = 212, /* RCPU copied to CPU */ + _SHR_RX_REASON_COUNT = 213 /* MUST BE LAST */ +} _shr_rx_reason_t; + +#define _SHR_RX_REASON_NAMES_INITIALIZER { \ + "Invalid", \ + "Arp", \ + "Bpdu", \ + "Broadcast", \ + "ClassBasedMove", \ + "ClassTagPackets", \ + "Control", \ + "CpuLearn", \ + "DestLookupFail", \ + "Dhcp", \ + "DosAttack", \ + "E2eHolIbp", \ + "EncapHiGigError", \ + "FilterMatch", \ + "GreChecksum", \ + "GreSourceRoute", \ + "HigigControl", \ + "HigigHdrError", \ + "IcmpRedirect", \ + "Igmp", \ + "IngressFilter", \ + "Ip", \ + "IpfixRateViolation", \ + "IpMcastMiss", \ + "IpOptionVersion", \ + "Ipmc", \ + "IpmcRsvd", \ + "L2Cpu", \ + "L2DestMiss", \ + "L2LearnLimit", \ + "L2Move", \ + "L2MtuFail", \ + "L2NonUnicastMiss", \ + "L2SourceMiss", \ + "L3AddrBindFail", \ + "L3DestMiss", \ + "L3HeaderError", \ + "L3MtuFail", \ + "L3Slowpath", \ + "L3SourceMiss", \ + "L3SourceMove", \ + "MartianAddr", \ + "McastIdxError", \ + "McastMiss", \ + "MimServiceError", \ + "MplsCtrlWordError", \ + "MplsError", \ + "MplsInvalidAction", \ + "MplsInvalidPayload", \ + "MplsLabelMiss", \ + "MplsSequenceNumber", \ + "MplsTtl", \ + "Multicast", \ + "Nhop", \ + "OamError", \ + "OamSlowPath", \ + "OamLMDM", \ + "ParityError", \ + "Protocol", \ + "SampleDest", \ + "SampleSource", \ + "SharedVlanMismatch", \ + "SourceRoute", \ + "TimeStamp", \ + "Ttl", \ + "Ttl1", \ + "TunnelError", \ + "UdpChecksum", \ + "UnknownVlan", \ + "UrpfFail", \ + "VcLabelMiss", \ + "VlanFilterMatch", \ + "WlanClientError", \ + "WlanSlowPath", \ + "WlanDot1xDrop", \ + "ExceptionFlood", \ + "Timesync", \ + "EavData", \ + "SamePortBridge", \ + "SplitHorizon", \ + "L4Error", \ + "Stp", \ + "EgressFilterRedirect", \ + "FilterRedirect", \ + "Loopback", \ + "VlanTranslate", \ + "Mmrp", \ + "Srp", \ + "TunnelControl", \ + "L2Marked", \ + "WlanSlowpathKeepalive", \ + "Station", \ + "Niv", \ + "NivPrioDrop", \ + "NivInterfaceMiss", \ + "NivRpfFail", \ + "NivTagInvalid", \ + "NivTagDrop", \ + "NivUntagDrop", \ + "Trill", \ + "TrillInvalid", \ + "TrillMiss", \ + "TrillRpfFail", \ + "TrillSlowpath", \ + "TrillCoreIsIs", \ + "TrillTtl", \ + "BfdSlowpath", \ + "Bfd", \ + "Mirror", \ + "RegexAction", \ + "RegexMatch", \ + "FailoverDrop", \ + "WlanTunnelError", \ + "CongestionCnmProxy", \ + "CongestionCnmProxyError", \ + "CongestionCnm", \ + "MplsUnknownAch", \ + "MplsLookupsExceeded", \ + "MplsReservedEntropyLabel", \ + "MplsIllegalReservedLabel", \ + "MplsRouterAlertLabel", \ + "NivPrune", \ + "VirtualPortPrune", \ + "NonUnicastDrop", \ + "TrillPacketPortMismatch", \ + "WlanClientMove", \ + "WlanSourcePortMiss", \ + "WlanClientSourceMiss", \ + "WlanClientDestMiss", \ + "WlanMtu", \ + "TrillName", \ + "L2GreSipMiss", \ + "L2GreVpnIdMiss", \ + "TimesyncUnknownVersion", \ + "BfdError", \ + "BfdUnknownVersion", \ + "BfdInvalidVersion", \ + "BfdLookupFailure", \ + "BfdInvalidPacket", \ + "VxlanSipMiss", \ + "VxlanVpnIdMiss", \ + "FcoeZoneCheckFail", \ + "IpmcInterfaceMismatch", \ + "Nat", \ + "TcpUdpNatMiss", \ + "IcmpNatMiss", \ + "NatFragment", \ + "NatMiss", \ + "UnknownSubtentingPort", \ + "LLTagAbsentDrop", \ + "LLTagpresenDrop", \ + "OAMCCMslowpath", \ + "OAMIncompleteOpcode", \ + "OAMCCMpacket", \ + "Reserved0", \ + "OAMMplsLmDM", \ + "SAT", \ + "SampleSourceFlex", \ + "FlexSflow", \ + "VxltMiss", \ + "TunnelDecapEcnError", \ + "TunnelObjectValidationFail", \ + "L3Cpu", \ + "TunnelAdaptLookupMiss", \ + "PacketFlowSelectMiss", \ + "ProtectionDataDrop", \ + "PacketFlowSelect", \ + "OtherLookupMiss", \ + "InvalidTpid", \ + "MplsControlPacket", \ + "TunnelTtlError", \ + "L2HeaderError", \ + "OtherLookupHit", \ + "L2SrcLookupMiss", \ + "L2SrcLookupHit", \ + "L2DstLookupMiss", \ + "L2DstLookupHit", \ + "L3SrcRouteLookupMiss", \ + "L3SrcHostLookupMiss", \ + "L3SrcRouteLookupHit", \ + "L3SrcHostLookupHit", \ + "L3DstRouteLookupMiss", \ + "L3DstHostLookupMiss", \ + "L3DstRouteLookupHit", \ + "L3DstHostLookupHit", \ + "MplsLookup1Miss", \ + "MplsLookup2Miss", \ + "L3TunnelLookupMiss", \ + "VlanTranslate1Lookup1Miss",\ + "VlanTranslate1Lookup2Miss",\ + "VlanTranslate2Lookup1Miss",\ + "VlanTranslate2Lookup2Miss",\ + "L2StuFail", \ + "SrCounterExceeded", \ + "SrCopyToCpuBit0", \ + "SrCopyToCpuBit1", \ + "SrCopyToCpuBit2", \ + "SrCopyToCpuBit3", \ + "SrCopyToCpuBit4", \ + "SrCopyToCpuBit5", \ + "L3HeaderMismatch", \ + "DlbMonitor", \ + "EtrapMonitor", \ + "IntTurnAround", \ + "IntHopLimit", \ + "ProtectionStatusDown", \ + "Svtag", \ + "SvtagLookupMiss", \ + "PktDropOnPortHigig3Check", \ + "Srv6ProcessError", \ + "Srv6ValidationError", \ + "Srv6UnknownRoutingTypeWithNonZeroSl", \ + "RcpuToCpu", \ +} + +/* Base type for declarations */ +#define SHR_BITDCL uint32 +#define SHR_BITWID 32 + +/* (internal) Number of SHR_BITDCLs needed to contain _max bits */ +#define _SHR_BITDCLSIZE(_max) (((_max) + SHR_BITWID - 1) / SHR_BITWID) + +/* + * Set of "reasons" (see _SHR_RX_*) why a packet came to the CPU. + */ +typedef struct _shr_rx_reasons_s { + SHR_BITDCL pbits[_SHR_BITDCLSIZE(_SHR_RX_REASON_COUNT)]; +} _shr_rx_reasons_t; + +/* + * Macro to add a reason (_SHR_RX_*) to a set of + * reasons (_shr_rx_reasons_t) + */ +#define _SHR_RX_REASON_SET(_reasons, _reason) \ + ((((_reasons).pbits)[(_reason) / SHR_BITWID]) |= (1U << ((_reason) % SHR_BITWID))) + +/* + * Macro to clear a set of reasons (_shr_rx_reasons_t). + */ +#define _SHR_RX_REASON_CLEAR_ALL(_reasons) \ +{ \ + SHR_BITDCL *_ptr; \ + int _c = _SHR_RX_REASON_COUNT; \ + \ + if (_c <= 0) { \ + return; \ + } \ + \ + _ptr = (((_reasons).pbits)); \ + \ + while (_c >= SHR_BITWID) { \ + *(_ptr++) = 0; \ + _c -= SHR_BITWID; \ + } \ + \ + if(_c > 0) { \ + SHR_BITDCL _mask = ~0; \ + _mask >>= (SHR_BITWID - _c); \ + *(_ptr) &= ~_mask; \ + } \ +} + +/* + * Macro to check if a reason (_SHR_RX_*) is included in a + * set of reasons (_shr_rx_reasons_t). Returns: + * zero => reason is not included in the set + * non-zero => reason is included in the set + */ +#define _SHR_RX_REASON_GET(_reasons, _reason) \ + ((((_reasons).pbits)[(_reason) / SHR_BITWID]) & (1U << ((_reason) % SHR_BITWID))) + +#define _SHR_RX_REASON_ITER(_reasons, reason) \ + for(reason = _SHR_RX_INVALID; reason < (int)_SHR_RX_REASON_COUNT; reason++) \ + if(_SHR_RX_REASON_GET(_reasons, reason)) + +typedef enum _shr_rx_redirect_e { + _SHR_RX_REDIRECT_NORMAL = 0, + _SHR_RX_REDIRECT_HIGIG = 1, + _SHR_RX_REDIRECT_TRUNCATED = 2, + _SHR_RX_REDIRECT_MAX = _SHR_RX_REDIRECT_TRUNCATED +} _shr_rx_redirect_e; + + +typedef enum _shr_rx_decap_tunnel_e { + _SHR_RX_DECAP_NONE = 0, /* No tunnel Decap */ + _SHR_RX_DECAP_ACCESS_SVP = 1, /* Packet ingress on Access SVP (No decap) */ + _SHR_RX_DECAP_MIM = 2, /* Decap Mac-in-Mac tunnel */ + _SHR_RX_DECAP_L2GRE = 3, /* Decap L2GRE tunnel */ + _SHR_RX_DECAP_VXLAN = 4, /* Decap VXLAN tunnel */ + _SHR_RX_DECAP_AMT = 5, /* Decap AMT tunnel */ + _SHR_RX_DECAP_IP = 6, /* Decap IP tunnel */ + _SHR_RX_DECAP_TRILL = 7, /* Decap TRILL tunnel */ + _SHR_RX_DECAP_L2MPLS_1LABEL = 8, /* Decap MPLS 1 Label, L2 payload, no + Control Word */ + _SHR_RX_DECAP_L2MPLS_2LABEL = 9, /* Decap MPLS 2 Label, L2 payload, no + Control Word */ + _SHR_RX_DECAP_L2MPLS_1LABELCW = 10, /* Decap MPLS 1 Label, L2 payload, Control + Word present */ + _SHR_RX_DECAP_L2MPLS_2LABELCW = 11, /* Decap MPLS 2 Label, L2 payload, Control + Word present */ + _SHR_RX_DECAP_L3MPLS_1LABEL = 12, /* Decap MPLS 1 Label, L3 payload, no + Control Word present */ + _SHR_RX_DECAP_L3MPLS_2LABEL = 13, /* Decap MPLS 2 Label, L3 payload, no + Control Word present */ + _SHR_RX_DECAP_L3MPLS_1LABELCW = 14, /* Decap MPLS 1 Label, L3 payload, Control + Word present */ + _SHR_RX_DECAP_L3MPLS_2LABELCW = 15, /* Decap MPLS 2 Label, L3 payload, Control + Word present */ + _SHR_RX_DECAP_WTP2AC = 16, /* Decap WTP2AC Tunnel */ + _SHR_RX_DECAP_AC2AC = 17, /* Decap AC2AC Tunnel */ + _SHR_RX_DECAP_MPLS_1LABELCW = 18, /* Decap MPLS 1 Label, Control + Word present */ + _SHR_RX_DECAP_MPLS_2LABELCW = 19, /* Decap MPLS 2 Label, Control + Word present */ + _SHR_RX_DECAP_MPLS_1LABEL = 20, /* Decap MPLS 1 Label, no + Control Word */ + _SHR_RX_DECAP_MPLS_2LABEL = 21, /* Decap MPLS 2 Label, no + Control Word */ + _SHR_RX_DECAP_MPLS_3LABEL = 22, /* Decap MPLS 3 Label, no Control + Word */ + _SHR_RX_DECAP_MPLS_3LABELCW = 23, /* Decap MPLS 3 Label, Control + Word present */ + _SHR_RX_DECAP_MPLS_3LABEL_ENTROPY = 25, /* Decap MPLS 3 Label + entropy, + no Control Word */ + _SHR_RX_DECAP_MPLS_3LABEL_ENTROPYCW = 26, /* Decap MPLS 3 Label + entropy, + Control Word present */ + _SHR_RX_DECAP_COUNT = 27 /* Decap Tunnel Max */ +} _shr_rx_decap_tunnel_t; + +typedef enum _shr_rx_decap_hdr_e { + _SHR_RX_DECAP_HDR_NONE = 0, /* No headers Decapped */ + _SHR_RX_DECAP_SYSTEM_HDR = 1, /* Decap System Header */ + _SHR_RX_DECAP_OUTER_L2_HDR = 2, /* Decap Outer L2 Header */ + _SHR_RX_DECAP_L3_L4_TUNNEL_HDR = 4, /* Decap Outer L3/L4/TUNNEL Header */ + _SHR_RX_DECAP_INNER_L2_HDR = 8, /* Decap Inner L2 Header */ + _SHR_RX_DECAP_INNER_L3_L4_HDR = 16, /* Decap Inner L3 and L4 Header */ + _SHR_RX_DECAP_HDR_MAX = _SHR_RX_DECAP_INNER_L3_L4_HDR /* Max Value */ +} _shr_rx_decap_hdr_t; + +#endif /* _SHR_RX_H_ */ diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/dcb.h b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/include/soc/dcb.h similarity index 99% rename from platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/dcb.h rename to platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/include/soc/dcb.h index 440eebd6917..a3f0c2888ed 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/dcb.h +++ b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/include/soc/dcb.h @@ -1,7 +1,6 @@ /* * $Id: dcb.h,v 1.32 Broadcom SDK $ - * - * $Copyright: 2017-2025 Broadcom Inc. All rights reserved. + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/dcbformats.h b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/include/soc/dcbformats.h similarity index 99% rename from platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/dcbformats.h rename to platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/include/soc/dcbformats.h index c24e39af3c7..7a064bd82d7 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/dcbformats.h +++ b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/include/soc/dcbformats.h @@ -1,7 +1,6 @@ /* * $Id$ - * - * $Copyright: 2017-2025 Broadcom Inc. All rights reserved. + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/defs.h b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/include/soc/defs.h similarity index 93% rename from platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/defs.h rename to platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/include/soc/defs.h index 71837bfcc1b..26c283c23ee 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/defs.h +++ b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/include/soc/defs.h @@ -1,7 +1,6 @@ /* * $Id: defs.h,v 1.271 Broadcom SDK $ - * - * $Copyright: 2017-2025 Broadcom Inc. All rights reserved. + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. @@ -190,8 +189,24 @@ #define BCM_TIMESYNC_SUPPORT #endif +#if defined(BCM_56634_A0) || defined(BCM_56634_B0) +#define BCM_56634 +#define BCM_56624 +#define BCM_56304 +#define BCM_56800 +#define BCM_FIREBOLT_SUPPORT +#define BCM_BRADLEY_SUPPORT +#define BCM_TRIUMPH_SUPPORT +#define BCM_TRIUMPH2_SUPPORT +#define BCM_TRX_SUPPORT +#define BCM_MPLS_SUPPORT +#define BCM_IPFIX_SUPPORT +#define BCM_TIMESYNC_SUPPORT +#endif + #if defined(BCM_56524_A0) || defined(BCM_56524_B0) #define BCM_56524 +#define BCM_56634 #define BCM_56624 #define BCM_56304 #define BCM_56800 @@ -225,6 +240,7 @@ #if defined(BCM_56840_A0) || defined(BCM_56840_B0) #define BCM_56840 +#define BCM_56634 #define BCM_56624 #define BCM_56304 #define BCM_56800 @@ -244,6 +260,7 @@ #if defined(BCM_56640_A0) || defined(BCM_56640_B0) #define BCM_56640 #define BCM_56840 +#define BCM_56634 #define BCM_56624 #define BCM_56304 #define BCM_56800 @@ -266,6 +283,7 @@ #if defined(BCM_56340_A0) #define BCM_56340 #define BCM_56840 +#define BCM_56634 #define BCM_56624 #define BCM_56304 #define BCM_56800 @@ -292,6 +310,7 @@ #if defined(BCM_56440_A0) || defined(BCM_56440_B0) #define BCM_56440 #define BCM_56840 +#define BCM_56634 #define BCM_56334 #define BCM_56624 #define BCM_56304 @@ -317,6 +336,7 @@ #define BCM_56260 #define BCM_56440 #define BCM_56840 +#define BCM_56634 #define BCM_56640 #define BCM_56334 #define BCM_56624 @@ -350,6 +370,7 @@ #define BCM_56260 #define BCM_56440 #define BCM_56840 +#define BCM_56634 #define BCM_56640 #define BCM_56334 #define BCM_56624 @@ -382,6 +403,7 @@ #if defined(BCM_56850_A0) #define BCM_56850 #define BCM_56840 +#define BCM_56634 #define BCM_56624 #define BCM_56304 #define BCM_56800 @@ -409,6 +431,7 @@ #define BCM_56860 #define BCM_56850 #define BCM_56840 +#define BCM_56634 #define BCM_56624 #define BCM_56304 #define BCM_56800 @@ -452,6 +475,7 @@ #define BCM_56860 #define BCM_56850 #define BCM_56840 +#define BCM_56634 #define BCM_56624 #define BCM_56304 #define BCM_56800 @@ -501,6 +525,7 @@ #define BCM_56860 #define BCM_56850 #define BCM_56840 +#define BCM_56634 #define BCM_56624 #define BCM_56304 #define BCM_56800 @@ -539,6 +564,7 @@ #define BCM_56960 #define BCM_56850 #define BCM_56840 +#define BCM_56634 #define BCM_56624 #define BCM_56304 #define BCM_56800 @@ -579,6 +605,7 @@ #define BCM_56960 #define BCM_56850 #define BCM_56840 +#define BCM_56634 #define BCM_56624 #define BCM_56304 #define BCM_56800 @@ -636,6 +663,7 @@ #define BCM_56960 #define BCM_56850 #define BCM_56840 +#define BCM_56634 #define BCM_56624 #define BCM_56304 #define BCM_56800 @@ -681,6 +709,7 @@ #define BCM_56960 #define BCM_56850 #define BCM_56840 +#define BCM_56634 #define BCM_56624 #define BCM_56304 #define BCM_56800 @@ -734,67 +763,6 @@ #define BCM_UC_MHOST_SUPPORT #endif -#if defined(BCM_56390_A0) -#define BCM_56390 -#define BCM_56470 -#define BCM_56275 -#define BCM_56370 -#define BCM_56870 -#define BCM_56960 -#define BCM_56850 -#define BCM_56840 -#define BCM_56634 -#define BCM_56624 -#define BCM_56304 -#define BCM_56800 -#define BCM_FIREBOLT_SUPPORT -#define BCM_BRADLEY_SUPPORT -#define BCM_HUMV_SUPPORT -#define BCM_SCORPION_SUPPORT -#define BCM_TRIUMPH_SUPPORT -#define BCM_TRIUMPH2_SUPPORT -#define BCM_TRX_SUPPORT -#define BCM_TRIDENT_SUPPORT -#define BCM_TRIUMPH3_SUPPORT -#define BCM_TRIDENT2_SUPPORT -#define BCM_TRIDENT2PLUS_SUPPORT -#define BCM_TRIDENT3_SUPPORT -#define BCM_TRIDENT3X3PLUS_SUPPORT -#define BCM_HELIX5_SUPPORT -#define BCM_HURRICANE4_SUPPORT -#define BCM_FIREBOLT6_SUPPORT -#define BCM_TOMAHAWK_SUPPORT -#define BCM_MPLS_SUPPORT -#define BCM_EXTND_SBUS_SUPPORT -#define BCM_SBUSDMA_SUPPORT -#define BCM_TIMESYNC_SUPPORT -#define BCM_TIMESYNC_V3_SUPPORT -#define BCM_TIMESYNC_LIVE_WIRE_TOD_SUPPORT -#define BCM_TIME_V3_SUPPORT -#define BCM_IPROC_SUPPORT -#define BCM_IPROC_DDR_SUPPORT -#define BCM_DDR3_SUPPORT -#define SOC_ROBUST_HASH -#define BCM_CMICX_SUPPORT -#define BCM_FIFODMA_SUPPORT -#define BCM_CCMDMA_SUPPORT -#define BCM_SOC_ASYNC_SUPPORT -#define PORTMOD_PMNULL_SUPPORT -#define PORTMOD_PM4X25_SUPPORT -#define PORTMOD_PM4X25U_SUPPORT -#define PHYMOD_FALCON_SUPPORT -#define BCM_OLP_SUPPORT -#define BCM_HGPROXY_COE_SUPPORT -#define BCM_CHANNELIZED_SWITCHING_SUPPORT -#define BCM_FLOWTRACKER_SUPPORT -#define BCM_FLOWTRACKER_V2_SUPPORT -#define BCM_FLOWTRACKER_V3_SUPPORT -#define BCM_FLOWTRACKER_EXPORT_FIFO_SUPPORT -#define BCM_UTT_SUPPORT -#define BCM_HLA_SUPPORT -#define BCM_APPL_SIGNATURE_SUPPORT -#endif - #if defined(BCM_56275_A0) #define BCM_56275 #define BCM_56370 @@ -802,6 +770,7 @@ #define BCM_56960 #define BCM_56850 #define BCM_56840 +#define BCM_56634 #define BCM_56624 #define BCM_56304 #define BCM_56800 @@ -856,6 +825,7 @@ #define BCM_56960 #define BCM_56850 #define BCM_56840 +#define BCM_56634 #define BCM_56624 #define BCM_56304 #define BCM_56800 @@ -905,6 +875,7 @@ #define BCM_56960 #define BCM_56850 #define BCM_56840 +#define BCM_56634 #define BCM_56624 #define BCM_56304 #define BCM_56800 @@ -947,6 +918,7 @@ #define BCM_56960 #define BCM_56850 #define BCM_56840 +#define BCM_56634 #define BCM_56624 #define BCM_56304 #define BCM_56800 @@ -984,6 +956,7 @@ #define BCM_56960 #define BCM_56850 #define BCM_56840 +#define BCM_56634 #define BCM_56624 #define BCM_56304 #define BCM_56800 @@ -1187,47 +1160,6 @@ #endif #endif -#ifdef BCM_JERICHO_4_SUPPORT -#if defined(BCM_99450_A0) -#define BCM_99450 -#define BCM_IPROC_SUPPORT -#define BCM_UC_MHOST_SUPPORT -/* Compilation features */ -#define BCM_LINKSCAN_LOCK_PER_UNIT -#define PORTMOD_PM4X25_SUPPORT -#define PORTMOD_PM4X25D_SUPPORT -#define PORTMOD_PM8X100_FABRIC_SUPPORT -#define PORTMOD_PM8X100_GEN2_SUPPORT -#define BCM_CMICX_SUPPORT -#define BCM_CMICX_GEN2_SUPPORT -#define BCM_CMICX_GEN3_SUPPORT -#define BCM_SBUSDMA_SUPPORT -#endif /* BCM_99450_A0*/ -#endif /* BCM_JERICHO_4_SUPPORT */ - - -#ifdef BCM_DNXFE_SUPPORT -#ifdef BCM_RAMON_4_SUPPORT -#if defined(BCM_99470_A0) -#define BCM_99470 -#define BCM_IPROC_SUPPORT -#define BCM_UC_MHOST_SUPPORT -/* Compilation features */ -#define BCM_LINKSCAN_LOCK_PER_UNIT -#define PORTMOD_PM4X25_SUPPORT -#define PORTMOD_PM4X25D_SUPPORT -#define PORTMOD_PM8X100_FABRIC_SUPPORT -#define PORTMOD_PM8X100_GEN2_SUPPORT -#define BCM_CMICX_SUPPORT -#define BCM_CMICX_GEN2_SUPPORT -#define BCM_CMICX_GEN3_SUPPORT -#define BCM_SBUSDMA_SUPPORT -#endif /* BCM_99470_A0 */ -#endif /* BCM_RAMON_4_SUPPORT */ -#endif /* BCM_DNXFE_SUPPORT */ - - - #if defined(BCM_88480_A0) || defined(BCM_88480_B0) /* Defined via mcmrelease: genallchips.pl... ??? */ @@ -1545,7 +1477,7 @@ defined(BCM_56580) || defined(BCM_56700) || defined(BCM_56800) || \ defined(BCM_56624) || defined(BCM_56224) || \ defined(BCM_53314) || defined(BCM_56680) || \ - defined(BCM_56524) || \ + defined(BCM_56634) || defined(BCM_56524) || \ defined(BCM_56334) || defined(BCM_56840) || defined(BCM_56150) || \ defined(BCM_56640) || defined(BCM_56440) || \ defined(BCM_56850) || defined(BCM_56340) || \ @@ -1554,8 +1486,7 @@ defined(BCM_56870) || defined(BCM_56965) || defined(BCM_56970) || \ defined(BCM_56980) || defined(BCM_53570) || defined(BCM_53540) || \ defined(BCM_56370) || defined(BCM_56770) || defined(BCM_56275) || \ - defined(BCM_56470) || defined(BCM_56070) || defined(BCM_53650) || \ - defined(BCM_56390) + defined(BCM_56470) || defined(BCM_56070) || defined(BCM_53650) #define BCM_XGS3_SWITCH_SUPPORT #endif @@ -1600,7 +1531,7 @@ #if defined(BCM_56260) || defined(BCM_56270) || defined(BCM_56670) || defined(BCM_53650) || defined(BCM_56860) || \ defined(BCM_56870) || defined(BCM_56970) || defined(BCM_56370) || \ defined(BCM_56770) || defined(BCM_56980) || defined(BCM_56275) || \ - defined(BCM_56470) || defined(BCM_56390) + defined(BCM_56470) #define BCM_XGS5_SWITCH_PORT_SUPPORT #endif @@ -1610,7 +1541,7 @@ #if defined(INCLUDE_L3) #if defined(BCM_56860_A0) || defined(BCM_56670) || defined(BCM_53650) || defined(BCM_56870_A0) || \ defined(BCM_56370) || defined(BCM_56770) || defined(BCM_56275) || \ - defined(BCM_56470) || defined(BCM_53650) || defined(BCM_56390) + defined(BCM_56470) || defined(BCM_53650) #define BCM_RIOT_SUPPORT #endif #endif @@ -1619,7 +1550,7 @@ */ #if defined(INCLUDE_L3) #if defined(BCM_56670) || defined(BCM_53650) || defined (BCM_56970_A0) || defined(BCM_56870_A0) || \ - defined(BCM_56370) || defined(BCM_56770) || defined(BCM_56470) || defined(BCM_56390) + defined(BCM_56370) || defined(BCM_56770) || defined(BCM_56470) #define BCM_SWAP_TO_SELF_SUPPORT #endif #endif @@ -1629,8 +1560,7 @@ #if defined(INCLUDE_L3) #if defined(BCM_56860_A0) || defined(BCM_56670) || defined(BCM_53650) || defined(BCM_56870) || \ defined(BCM_56370) || defined(BCM_56770) || defined(BCM_56980) || \ - defined(BCM_56275) || defined(BCM_56470) || defined(BCM_53650) || \ - defined(BCM_56390) + defined(BCM_56275) || defined(BCM_56470) || defined(BCM_53650) #define BCM_MULTI_LEVEL_ECMP_SUPPORT #endif #endif @@ -1649,7 +1579,7 @@ */ #if defined(INCLUDE_L3) #if defined(BCM_56870) || defined(BCM_56370) || defined(BCM_56770) || \ - defined(BCM_56470) || defined(BCM_56390) + defined(BCM_56470) #define BCM_SPECIAL_LABEL_SUPPORT #endif #endif @@ -1708,8 +1638,7 @@ * TimeSync nanosync support. */ #if defined(BCM_56275) || defined(BCM_56980) || defined(BCM_56670) || \ - defined(BCM_56070) || defined(BCM_56470) || defined(BCM_53650) || \ - defined(BCM_56390) + defined(BCM_56070) || defined(BCM_56470) || defined(BCM_53650) #define BCM_TIME_NANOSYNC_SUPPORT #endif @@ -1724,7 +1653,7 @@ /* * PCS 1588 TS for TSC Falcon Gen 3. */ -#if defined(BCM_56070) || defined(BCM_56470) || defined(BCM_56390) +#if defined(BCM_56070) || defined(BCM_56470) #define BCM_TSCF_GEN3_PCS_TIMESTAMP #endif @@ -1761,7 +1690,7 @@ #if defined(BCM_56580) || defined(BCM_56700) || defined(BCM_56800) || \ defined(BCM_56218) || defined(BCM_56624) || defined(BCM_56224) || \ defined(BCM_56680) || \ - defined(BCM_53314) || defined(BCM_56524) || \ + defined(BCM_53314) || defined(BCM_56634) || defined(BCM_56524) || \ defined(BCM_56334) || \ defined(BCM_56840) || defined(BCM_56150) || \ defined(BCM_56640) || defined(BCM_56440) || defined(BCM_56850) || \ @@ -1772,7 +1701,7 @@ defined(BCM_56870) || defined(BCM_53570) || defined(BCM_56370) || \ defined(BCM_56770) || defined(BCM_53540) || defined(BCM_56980) || \ defined(BCM_56275) || defined(BCM_56470) || defined(BCM_56070) || \ - defined(BCM_53650) || defined(BCM_56390) + defined(BCM_53650) #define BCM_HIGIG2_SUPPORT #endif @@ -1781,7 +1710,7 @@ */ #if defined(BCM_56580) || defined(BCM_56700) || defined(BCM_56800) || \ defined(BCM_56624) || defined(BCM_56680) || \ - defined(BCM_56524) || \ + defined(BCM_56634) || defined(BCM_56524) || \ defined(BCM_56334) || \ defined(BCM_56840) || defined(BCM_56150) || \ defined(BCM_56640) || defined(BCM_56440) || defined(BCM_56850) || \ @@ -1846,7 +1775,7 @@ */ #if defined(BCM_56224) || defined(BCM_56624) || \ defined(BCM_53314) || defined(BCM_56680) || \ - defined(BCM_56524) || \ + defined(BCM_56634) || defined(BCM_56524) || \ defined(BCM_56334) || \ defined(BCM_56840) || defined(BCM_56150) || \ defined(BCM_56440) || defined(BCM_56150) || \ @@ -1895,8 +1824,7 @@ */ #if defined(BCM_56960) || defined(BCM_56965) || \ defined(BCM_56870) || defined(BCM_56970) || defined(BCM_56980) || \ - defined(BCM_56770) || defined(BCM_56370) || defined(BCM_56470) || \ - defined(BCM_56390) + defined(BCM_56770) || defined(BCM_56370) || defined(BCM_56470) #define BCM_INSTRUMENTATION_SUPPORT #endif @@ -1912,6 +1840,7 @@ defined(BCM_56514) || defined(BCM_56624) || \ defined(BCM_56224) || \ defined(BCM_53314) || defined(BCM_56680) || \ + defined(BCM_56634) || \ defined(BCM_56524) || defined(BCM_56334) || \ defined(BCM_56840) || defined(BCM_56150) || \ defined(BCM_56640) || \ @@ -1926,7 +1855,7 @@ defined(BCM_56980) || defined(BCM_53540) || \ defined(BCM_56370) || defined(BCM_56770) || \ defined(BCM_56275) || defined(BCM_56470) || \ - defined(BCM_56070) || defined(BCM_56390) + defined(BCM_56070) #define BCM_LEDPROC_SUPPORT #endif @@ -2037,6 +1966,8 @@ typedef enum soc_chip_types_e { SOC_CHIP_BCM56224_B0, SOC_CHIP_BCM53314_A0, SOC_CHIP_BCM53324_A0, + SOC_CHIP_BCM56634_A0, + SOC_CHIP_BCM56634_B0, SOC_CHIP_BCM56524_A0, SOC_CHIP_BCM56524_B0, SOC_CHIP_BCM56334_A0, @@ -2052,7 +1983,6 @@ typedef enum soc_chip_types_e { SOC_CHIP_BCM56275_A0, SOC_CHIP_BCM56370_A0, SOC_CHIP_BCM56470_A0, - SOC_CHIP_BCM56390_A0, SOC_CHIP_BCM56770_A0, SOC_CHIP_BCM56771_A0, SOC_CHIP_BCM56970_A0, @@ -2076,12 +2006,6 @@ typedef enum soc_chip_types_e { #ifdef BCM_Q3A_SUPPORT SOC_CHIP_BCM88490_A0, #endif -#endif -#ifdef BCM_JERICHO_4_SUPPORT - SOC_CHIP_BCM99450_A0, -#endif -#ifdef BCM_RAMON_4_SUPPORT - SOC_CHIP_BCM99470_A0, #endif SOC_CHIP_BCM88480_A0, SOC_CHIP_BCM88480_B0, @@ -2153,22 +2077,8 @@ typedef enum soc_chip_types_e { #else #define SOC_CHIP_TYPE_MAP_INIT_ADDITIONAL #endif - -#ifdef BCM_JERICHO_4_SUPPORT -#define SOC_CHIP_DNX_TYPE_MAP_INIT_ADDITIONAL_BASE /* SOC_CHIP_BCM99450_A0 */ SOC_CHIP_BCM9945X, -#else -#define SOC_CHIP_DNX_TYPE_MAP_INIT_ADDITIONAL_BASE -#endif - -#define SOC_CHIP_DNX_TYPE_MAP_INIT_ADDITIONAL_AI - -#define SOC_CHIP_DNXE_TYPE_MAP_INIT_ADDITIONAL - -#ifdef BCM_RAMON_4_SUPPORT -#define SOC_CHIP_TYPE_DNXF_MAP_INIT_ADDITIONAL /* SOC_CHIP_BCM99470_A0 */ SOC_CHIP_BCM9947X, -#else +#define SOC_CHIP_DNX_TYPE_MAP_INIT_ADDITIONAL #define SOC_CHIP_TYPE_DNXF_MAP_INIT_ADDITIONAL -#endif #ifdef BCM_DNXF3_SUPPORT #define SOC_CHIP_DNXF_TYPE_MAP_INIT_ADDITIONAL /* SOC_CHIP_BCM88920_A0 */ SOC_CHIP_BCM8892X, #else @@ -2207,6 +2117,8 @@ typedef enum soc_chip_types_e { /* SOC_CHIP_BCM56224_B0, */ SOC_CHIP_BCM56224, \ /* SOC_CHIP_BCM53314_A0, */ SOC_CHIP_BCM53314, \ /* SOC_CHIP_BCM53324_A0, */ SOC_CHIP_BCM53314, \ + /* SOC_CHIP_BCM56634_A0, */ SOC_CHIP_BCM56634, \ + /* SOC_CHIP_BCM56634_B0, */ SOC_CHIP_BCM56634, \ /* SOC_CHIP_BCM56524_A0, */ SOC_CHIP_BCM56524, \ /* SOC_CHIP_BCM56524_B0, */ SOC_CHIP_BCM56524, \ /* SOC_CHIP_BCM56334_A0, */ SOC_CHIP_BCM56334, \ @@ -2222,7 +2134,6 @@ typedef enum soc_chip_types_e { /* SOC_CHIP_BCM56275_A0, */ SOC_CHIP_BCM56275, \ /* SOC_CHIP_BCM56370_A0, */ SOC_CHIP_BCM56370, \ /* SOC_CHIP_BCM56470_A0, */ SOC_CHIP_BCM56470, \ - /* SOC_CHIP_BCM56390_A0, */ SOC_CHIP_BCM56390, \ /* SOC_CHIP_BCM56770_A0, */ SOC_CHIP_BCM56770, \ /* SOC_CHIP_BCM56771_A0, */ SOC_CHIP_BCM56770, \ /* SOC_CHIP_BCM56970_A0, */ SOC_CHIP_BCM56970, \ @@ -2241,10 +2152,8 @@ typedef enum soc_chip_types_e { /* SOC_CHIP_BCM88830_A0 */ SOC_CHIP_BCM8883X, \ /* SOC_CHIP_BCM8216_A0 */ SOC_CHIP_BCM8216, \ SOC_CHIP_TYPE_MAP_INIT_ADDITIONAL \ - SOC_CHIP_DNX_TYPE_MAP_INIT_ADDITIONAL_BASE \ - SOC_CHIP_DNX_TYPE_MAP_INIT_ADDITIONAL_AI \ + SOC_CHIP_DNX_TYPE_MAP_INIT_ADDITIONAL \ SOC_CHIP_TYPE_DNXF_MAP_INIT_ADDITIONAL \ - SOC_CHIP_DNXE_TYPE_MAP_INIT_ADDITIONAL \ /* SOC_CHIP_BCM88480_A0 */ SOC_CHIP_BCM8848X, \ /* SOC_CHIP_BCM88480_B0 */ SOC_CHIP_BCM8848X, \ /* SOC_CHIP_BCM88480_B1 */ SOC_CHIP_BCM8848X, \ @@ -2310,21 +2219,8 @@ typedef enum soc_chip_types_e { #else #define SOC_CHIP_TYPE_NAMES_INIT_ADDITIONAL #endif - -#ifdef BCM_JERICHO_4_SUPPORT -#define SOC_CHIP_DNX_TYPE_NAMES_INIT_ADDITIONAL_BASE "BCM99450_A0", -#else -#define SOC_CHIP_DNX_TYPE_NAMES_INIT_ADDITIONAL_BASE -#endif - -#define SOC_CHIP_DNX_TYPE_NAMES_INIT_ADDITIONAL_AI - -#define SOC_CHIP_DNXE_TYPE_NAMES_INIT_ADDITIONAL -#ifdef BCM_RAMON_4_SUPPORT -#define SOC_CHIP_TYPE_DNXF_NAMES_INIT_ADDITIONAL "BCM99470_A0", -#else +#define SOC_CHIP_DNX_TYPE_NAMES_INIT_ADDITIONAL #define SOC_CHIP_TYPE_DNXF_NAMES_INIT_ADDITIONAL -#endif #ifdef BCM_DNXF3_SUPPORT #define SOC_CHIP_DNXF_TYPE_NAMES_INIT_ADDITIONAL "BCM88920_A0", #else @@ -2363,6 +2259,8 @@ typedef enum soc_chip_types_e { "BCM56224_B0", \ "BCM53314_A0", \ "BCM53324_A0", \ + "BCM56634_A0", \ + "BCM56634_B0", \ "BCM56524_A0", \ "BCM56524_B0", \ "BCM56334_A0", \ @@ -2378,7 +2276,6 @@ typedef enum soc_chip_types_e { "BCM56275_A0", \ "BCM56370_A0", \ "BCM56470_A0", \ - "BCM56390_A0", \ "BCM56770_A0", \ "BCM56771_A0", \ "BCM56970_A0", \ @@ -2397,10 +2294,8 @@ typedef enum soc_chip_types_e { "BCM88830_A0", \ "BCM8216_A0", \ SOC_CHIP_TYPE_NAMES_INIT_ADDITIONAL \ - SOC_CHIP_DNX_TYPE_NAMES_INIT_ADDITIONAL_BASE \ - SOC_CHIP_DNX_TYPE_NAMES_INIT_ADDITIONAL_AI \ + SOC_CHIP_DNX_TYPE_NAMES_INIT_ADDITIONAL \ SOC_CHIP_TYPE_DNXF_NAMES_INIT_ADDITIONAL \ - SOC_CHIP_DNXE_TYPE_NAMES_INIT_ADDITIONAL \ "BCM88480_A0", \ "BCM88480_B0", \ "BCM88480_B1", \ @@ -2479,6 +2374,7 @@ typedef enum soc_chip_groups_e { SOC_CHIP_BCM56680, SOC_CHIP_BCM56224, SOC_CHIP_BCM53314, + SOC_CHIP_BCM56634, SOC_CHIP_BCM56524, SOC_CHIP_BCM56334, SOC_CHIP_BCM56840, @@ -2489,7 +2385,6 @@ typedef enum soc_chip_groups_e { SOC_CHIP_BCM56275, SOC_CHIP_BCM56370, SOC_CHIP_BCM56470, - SOC_CHIP_BCM56390, SOC_CHIP_BCM56770, SOC_CHIP_BCM56970, SOC_CHIP_BCM56150, @@ -2507,14 +2402,6 @@ typedef enum soc_chip_groups_e { #ifdef BCM_Q3A_SUPPORT SOC_CHIP_BCM8849X, #endif -#endif -#ifdef BCM_JERICHO_4_SUPPORT - SOC_CHIP_BCM9945X, -#endif - - -#ifdef BCM_RAMON_4_SUPPORT - SOC_CHIP_BCM9947X, #endif SOC_CHIP_BCM8848X, SOC_CHIP_BCM88375, @@ -2569,20 +2456,8 @@ typedef enum soc_chip_groups_e { #else #define SOC_CHIP_GROUP_NAMES_INIT_ADDITIONAL #endif -#ifdef BCM_JERICHO_4_SUPPORT -#define SOC_CHIP_DNX_GROUP_NAMES_INIT_ADDITIONAL_BASE "BCM9945X", -#else -#define SOC_CHIP_DNX_GROUP_NAMES_INIT_ADDITIONAL_BASE -#endif - -#define SOC_CHIP_DNX_GROUP_NAMES_INIT_ADDITIONAL_AI - -#define SOC_CHIP_GROUP_DNXE_NAMES_INIT_ADDITIONAL -#ifdef BCM_RAMON_4_SUPPORT -#define SOC_CHIP_GROUP_DNXF_NAMES_INIT_ADDITIONAL "BCM9947X", -#else +#define SOC_CHIP_DNX_GROUP_NAMES_INIT_ADDITIONAL #define SOC_CHIP_GROUP_DNXF_NAMES_INIT_ADDITIONAL -#endif #ifdef BCM_DNXF3_SUPPORT #define SOC_CHIP_DNXF_GROUP_NAMES_INIT_ADDITIONAL "BCM8892X", #else @@ -2611,6 +2486,7 @@ typedef enum soc_chip_groups_e { "BCM56680", \ "BCM56224", \ "BCM53314", \ + "BCM56634", \ "BCM56524", \ "BCM56334", \ "BCM56840", \ @@ -2621,7 +2497,6 @@ typedef enum soc_chip_groups_e { "BCM56275", \ "BCM56370", \ "BCM56470", \ - "BCM56390", \ "BCM56770", \ "BCM56970", \ "BCM56150", \ @@ -2634,10 +2509,8 @@ typedef enum soc_chip_groups_e { "BCM8883X", \ "BCM8216", \ SOC_CHIP_GROUP_NAMES_INIT_ADDITIONAL \ - SOC_CHIP_DNX_GROUP_NAMES_INIT_ADDITIONAL_BASE \ - SOC_CHIP_DNX_GROUP_NAMES_INIT_ADDITIONAL_AI \ + SOC_CHIP_DNX_GROUP_NAMES_INIT_ADDITIONAL \ SOC_CHIP_GROUP_DNXF_NAMES_INIT_ADDITIONAL \ - SOC_CHIP_GROUP_DNXE_NAMES_INIT_ADDITIONAL \ "BCM8848X", \ "BCM88375", \ "BCM88470", \ diff --git a/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/include/soc/devids.h b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/include/soc/devids.h new file mode 100644 index 00000000000..d4b48be6fbf --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/include/soc/devids.h @@ -0,0 +1,2199 @@ +/* + * $Id:$ + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * + */ + +#ifndef _SOC_DEVIDS_H +#define _SOC_DEVIDS_H + + +#define BROADCOM_VENDOR_ID 0x14e4 + +#define BCM5690_DEVICE_ID 0x5690 +#define BCM5690_A0_REV_ID 1 +#define BCM5690_A1_REV_ID 2 +#define BCM5690_A2_REV_ID 3 + +#define BCM5691_DEVICE_ID 0x5691 +#define BCM5691_A0_REV_ID 1 +#define BCM5691_A1_REV_ID 2 +#define BCM5691_A2_REV_ID 3 + +#define BCM5692_DEVICE_ID 0x5692 +#define BCM5692_A0_REV_ID 1 +#define BCM5692_A1_REV_ID 2 +#define BCM5692_A2_REV_ID 3 + +#define BCM5693_DEVICE_ID 0x5693 +#define BCM5693_A0_REV_ID 1 +#define BCM5693_A1_REV_ID 2 +#define BCM5693_A2_REV_ID 3 + +#define BCM5695_DEVICE_ID 0x5695 +#define BCM5695_A0_REV_ID 1 +#define BCM5695_A1_REV_ID 2 +#define BCM5695_B0_REV_ID 0x11 + +#define BCM5696_DEVICE_ID 0x5696 +#define BCM5696_A0_REV_ID 1 +#define BCM5696_A1_REV_ID 2 +#define BCM5696_B0_REV_ID 0x11 + +#define BCM5697_DEVICE_ID 0x5697 +#define BCM5697_A0_REV_ID 1 +#define BCM5697_A1_REV_ID 2 +#define BCM5697_B0_REV_ID 0x11 + +#define BCM5698_DEVICE_ID 0x5698 +#define BCM5698_A0_REV_ID 1 +#define BCM5698_A1_REV_ID 2 +#define BCM5698_B0_REV_ID 0x11 + +#define BCM5670_DEVICE_ID 0x5670 +#define BCM5670_A0_REV_ID 1 +#define BCM5670_A1_REV_ID 2 + +#define BCM5671_DEVICE_ID 0x5671 +#define BCM5671_A0_REV_ID 1 +#define BCM5671_A1_REV_ID 2 +#define BCM5671_A2_REV_ID 3 + +#define BCM5675_DEVICE_ID 0x5675 +#define BCM5675_A0_REV_ID 1 +#define BCM5675_A1_REV_ID 2 + +#define BCM5676_DEVICE_ID 0x5676 +#define BCM5676_A0_REV_ID 1 +#define BCM5676_A1_REV_ID 2 + +#define BCM5673_DEVICE_ID 0x5673 +#define BCM5673_A0_REV_ID 1 +#define BCM5673_A1_REV_ID 2 +#define BCM5673_A2_REV_ID 3 + +#define BCM5674_DEVICE_ID 0x5674 +#define BCM5674_A0_REV_ID 1 + +#define BCM56100_DEVICE_ID 0xb100 +#define BCM56100_A0_REV_ID 1 +#define BCM56100_A1_REV_ID 2 +#define BCM56101_DEVICE_ID 0xb101 +#define BCM56101_A0_REV_ID 1 +#define BCM56101_A1_REV_ID 2 +#define BCM56102_DEVICE_ID 0xb102 +#define BCM56102_A0_REV_ID 1 +#define BCM56102_A1_REV_ID 2 +#define BCM56105_DEVICE_ID 0xb105 +#define BCM56105_A0_REV_ID 1 +#define BCM56105_A1_REV_ID 2 +#define BCM56106_DEVICE_ID 0xb106 +#define BCM56106_A0_REV_ID 1 +#define BCM56106_A1_REV_ID 2 +#define BCM56107_DEVICE_ID 0xb107 +#define BCM56107_A0_REV_ID 1 +#define BCM56107_A1_REV_ID 2 + +#define BCM56110_DEVICE_ID 0xb110 +#define BCM56110_A0_REV_ID 1 +#define BCM56111_DEVICE_ID 0xb111 +#define BCM56111_A0_REV_ID 1 +#define BCM56112_DEVICE_ID 0xb112 +#define BCM56112_A0_REV_ID 1 +#define BCM56115_DEVICE_ID 0xb115 +#define BCM56115_A0_REV_ID 1 +#define BCM56116_DEVICE_ID 0xb116 +#define BCM56116_A0_REV_ID 1 +#define BCM56117_DEVICE_ID 0xb117 +#define BCM56117_A0_REV_ID 1 + +#define BCM56300_DEVICE_ID 0xb300 +#define BCM56300_A0_REV_ID 1 +#define BCM56300_A1_REV_ID 2 +#define BCM56300_B0_REV_ID 0x11 +#define BCM56300_B1_REV_ID 0x12 +#define BCM56301_DEVICE_ID 0xb301 +#define BCM56301_A0_REV_ID 1 +#define BCM56301_A1_REV_ID 2 +#define BCM56301_B0_REV_ID 0x11 +#define BCM56301_B1_REV_ID 0x12 +#define BCM56302_DEVICE_ID 0xb302 +#define BCM56302_A0_REV_ID 1 +#define BCM56302_A1_REV_ID 2 +#define BCM56302_B0_REV_ID 0x11 +#define BCM56302_B1_REV_ID 0x12 +#define BCM56303_DEVICE_ID 0xb303 +#define BCM56303_A1_REV_ID 2 +#define BCM56303_A0_REV_ID 1 +#define BCM56303_B0_REV_ID 0x11 +#define BCM56303_B1_REV_ID 0x12 +#define BCM56304_DEVICE_ID 0xb304 +#define BCM56304_A0_REV_ID 1 +#define BCM56304_A1_REV_ID 2 +#define BCM56304_B0_REV_ID 0x11 +#define BCM56304_B1_REV_ID 0x12 +#define BCM56404_DEVICE_ID 0xb404 +#define BCM56404_A0_REV_ID 1 +#define BCM56404_A1_REV_ID 2 +#define BCM56305_DEVICE_ID 0xb305 +#define BCM56305_A0_REV_ID 1 +#define BCM56305_A1_REV_ID 2 +#define BCM56305_B0_REV_ID 0x11 +#define BCM56305_B1_REV_ID 0x12 +#define BCM56306_DEVICE_ID 0xb306 +#define BCM56306_A0_REV_ID 1 +#define BCM56306_A1_REV_ID 2 +#define BCM56306_B0_REV_ID 0x11 +#define BCM56306_B1_REV_ID 0x12 +#define BCM56307_DEVICE_ID 0xb307 +#define BCM56307_A0_REV_ID 1 +#define BCM56307_A1_REV_ID 2 +#define BCM56307_B0_REV_ID 0x11 +#define BCM56307_B1_REV_ID 0x12 +#define BCM56308_DEVICE_ID 0xb308 +#define BCM56308_A0_REV_ID 1 +#define BCM56308_A1_REV_ID 2 +#define BCM56308_B0_REV_ID 0x11 +#define BCM56308_B1_REV_ID 0x12 +#define BCM56309_DEVICE_ID 0xb309 +#define BCM56309_A0_REV_ID 1 +#define BCM56309_A1_REV_ID 2 +#define BCM56309_B0_REV_ID 0x11 +#define BCM56309_B1_REV_ID 0x12 + +#define BCM56310_DEVICE_ID 0xb310 +#define BCM56310_A0_REV_ID 1 +#define BCM56311_DEVICE_ID 0xb311 +#define BCM56311_A0_REV_ID 1 +#define BCM56312_DEVICE_ID 0xb312 +#define BCM56312_A0_REV_ID 1 +#define BCM56313_DEVICE_ID 0xb313 +#define BCM56313_A0_REV_ID 1 +#define BCM56314_DEVICE_ID 0xb314 +#define BCM56314_A0_REV_ID 1 +#define BCM56315_DEVICE_ID 0xb315 +#define BCM56315_A0_REV_ID 1 +#define BCM56316_DEVICE_ID 0xb316 +#define BCM56316_A0_REV_ID 1 +#define BCM56317_DEVICE_ID 0xb317 +#define BCM56317_A0_REV_ID 1 +#define BCM56318_DEVICE_ID 0xb318 +#define BCM56318_A0_REV_ID 1 +#define BCM56319_DEVICE_ID 0xb319 +#define BCM56319_A0_REV_ID 1 + +#ifndef EXCLUDE_BCM56324 +#define BCM56322_DEVICE_ID 0xb322 +#define BCM56322_A0_REV_ID 1 +#define BCM56324_DEVICE_ID 0xb324 +#define BCM56324_A0_REV_ID 1 +#endif + +#define BCM53300_DEVICE_ID 0xb006 +#define BCM53300_A0_REV_ID 0x11 +#define BCM53300_A1_REV_ID 0x12 +#define BCM53301_DEVICE_ID 0xb206 +#define BCM53301_A0_REV_ID 0x11 +#define BCM53301_A1_REV_ID 0x12 +#define BCM53302_DEVICE_ID 0xb008 +#define BCM53302_A0_REV_ID 0x11 +#define BCM53302_A1_REV_ID 0x12 + +#define BCM56500_DEVICE_ID 0xb500 +#define BCM56500_A0_REV_ID 1 +#define BCM56500_A1_REV_ID 2 +#define BCM56500_B0_REV_ID 0x11 +#define BCM56500_B1_REV_ID 0x12 +#define BCM56500_B2_REV_ID 0x13 +#define BCM56501_DEVICE_ID 0xb501 +#define BCM56501_A0_REV_ID 1 +#define BCM56501_A1_REV_ID 2 +#define BCM56501_B0_REV_ID 0x11 +#define BCM56501_B1_REV_ID 0x12 +#define BCM56501_B2_REV_ID 0x13 +#define BCM56502_DEVICE_ID 0xb502 +#define BCM56502_A0_REV_ID 1 +#define BCM56502_A1_REV_ID 2 +#define BCM56502_B0_REV_ID 0x11 +#define BCM56502_B1_REV_ID 0x12 +#define BCM56502_B2_REV_ID 0x13 +#define BCM56503_DEVICE_ID 0xb503 +#define BCM56503_A0_REV_ID 1 +#define BCM56503_A1_REV_ID 2 +#define BCM56503_B0_REV_ID 0x11 +#define BCM56503_B1_REV_ID 0x12 +#define BCM56503_B2_REV_ID 0x13 +#define BCM56504_DEVICE_ID 0xb504 +#define BCM56504_A0_REV_ID 1 +#define BCM56504_A1_REV_ID 2 +#define BCM56504_B0_REV_ID 0x11 +#define BCM56504_B1_REV_ID 0x12 +#define BCM56504_B2_REV_ID 0x13 +#define BCM56505_DEVICE_ID 0xb505 +#define BCM56505_A0_REV_ID 1 +#define BCM56505_A1_REV_ID 2 +#define BCM56505_B0_REV_ID 0x11 +#define BCM56505_B1_REV_ID 0x12 +#define BCM56505_B2_REV_ID 0x13 +#define BCM56506_DEVICE_ID 0xb506 +#define BCM56506_A0_REV_ID 1 +#define BCM56506_A1_REV_ID 2 +#define BCM56506_B0_REV_ID 0x11 +#define BCM56506_B1_REV_ID 0x12 +#define BCM56506_B2_REV_ID 0x13 +#define BCM56507_DEVICE_ID 0xb507 +#define BCM56507_A0_REV_ID 1 +#define BCM56507_A1_REV_ID 2 +#define BCM56507_B0_REV_ID 0x11 +#define BCM56507_B1_REV_ID 0x12 +#define BCM56507_B2_REV_ID 0x13 +#define BCM56508_DEVICE_ID 0xb508 +#define BCM56508_A0_REV_ID 1 +#define BCM56508_A1_REV_ID 2 +#define BCM56508_B0_REV_ID 0x11 +#define BCM56508_B1_REV_ID 0x12 +#define BCM56508_B2_REV_ID 0x13 +#define BCM56509_DEVICE_ID 0xb509 +#define BCM56509_A0_REV_ID 1 +#define BCM56509_A1_REV_ID 2 +#define BCM56509_B0_REV_ID 0x11 +#define BCM56509_B1_REV_ID 0x12 +#define BCM56509_B2_REV_ID 0x13 + +#define BCM56600_DEVICE_ID 0xb600 +#define BCM56600_A0_REV_ID 1 +#define BCM56600_B0_REV_ID 0x11 +#define BCM56600_C0_REV_ID 0x21 +#define BCM56601_DEVICE_ID 0xb601 +#define BCM56601_A0_REV_ID 1 +#define BCM56601_B0_REV_ID 0x11 +#define BCM56601_C0_REV_ID 0x21 +#define BCM56602_DEVICE_ID 0xb602 +#define BCM56602_A0_REV_ID 1 +#define BCM56602_B0_REV_ID 0x11 +#define BCM56602_C0_REV_ID 0x21 +#define BCM56603_DEVICE_ID 0xb603 +#define BCM56603_A0_REV_ID 1 +#define BCM56603_B0_REV_ID 0x11 +#define BCM56603_C0_REV_ID 0x21 +#define BCM56605_DEVICE_ID 0xb605 +#define BCM56605_A0_REV_ID 1 +#define BCM56605_B0_REV_ID 0x11 +#define BCM56605_C0_REV_ID 0x21 +#define BCM56606_DEVICE_ID 0xb606 +#define BCM56606_A0_REV_ID 1 +#define BCM56606_B0_REV_ID 0x11 +#define BCM56606_C0_REV_ID 0x21 +#define BCM56607_DEVICE_ID 0xb607 +#define BCM56607_A0_REV_ID 1 +#define BCM56607_B0_REV_ID 0x11 +#define BCM56607_C0_REV_ID 0x21 +#define BCM56608_DEVICE_ID 0xb608 +#define BCM56608_A0_REV_ID 1 +#define BCM56608_B0_REV_ID 0x11 +#define BCM56608_C0_REV_ID 0x21 + +#define BCM56580_DEVICE_ID 0xb580 +#define BCM56580_A0_REV_ID 1 + +#define BCM56700_DEVICE_ID 0xb700 +#define BCM56700_A0_REV_ID 1 +#define BCM56701_DEVICE_ID 0xb701 +#define BCM56701_A0_REV_ID 1 + +#define BCM56800_DEVICE_ID 0xb800 +#define BCM56800_A0_REV_ID 1 +#define BCM56801_DEVICE_ID 0xb801 +#define BCM56801_A0_REV_ID 1 +#define BCM56802_DEVICE_ID 0xb802 +#define BCM56802_A0_REV_ID 1 +#define BCM56803_DEVICE_ID 0xb803 +#define BCM56803_A0_REV_ID 1 + +#define BCM56224_DEVICE_ID 0xb224 +#define BCM56224_A0_REV_ID 1 +#define BCM56224_B0_REV_ID 0x11 +#define BCM56225_DEVICE_ID 0xb225 +#define BCM56225_A0_REV_ID 1 +#define BCM56225_B0_REV_ID 0x11 +#define BCM56226_DEVICE_ID 0xb226 +#define BCM56226_A0_REV_ID 1 +#define BCM56226_B0_REV_ID 0x11 +#define BCM56227_DEVICE_ID 0xb227 +#define BCM56227_A0_REV_ID 1 +#define BCM56227_B0_REV_ID 0x11 +#define BCM56228_DEVICE_ID 0xb228 +#define BCM56228_A0_REV_ID 1 +#define BCM56228_B0_REV_ID 0x11 +#define BCM56229_DEVICE_ID 0xb229 +#define BCM56229_A0_REV_ID 1 +#define BCM56229_B0_REV_ID 0x11 +#define BCM56024_DEVICE_ID 0xb024 +#define BCM56024_A0_REV_ID 1 +#define BCM56024_B0_REV_ID 0x11 +#define BCM56025_DEVICE_ID 0xb025 +#define BCM56025_A0_REV_ID 1 +#define BCM56025_B0_REV_ID 0x11 +#define BCM53724_DEVICE_ID 0xc724 +#define BCM53724_A0_REV_ID 1 +#define BCM53724_B0_REV_ID 0x11 +#define BCM53726_DEVICE_ID 0xc726 +#define BCM53726_A0_REV_ID 1 +#define BCM53726_B0_REV_ID 0x11 + +#define BCM53312_DEVICE_ID 0xc312 +#define BCM53312_A0_REV_ID 1 +#define BCM53312_B0_REV_ID 0x11 +#define BCM53313_DEVICE_ID 0xc313 +#define BCM53313_A0_REV_ID 1 +#define BCM53313_B0_REV_ID 0x11 +#define BCM53314_DEVICE_ID 0xc314 +#define BCM53314_A0_REV_ID 1 +#define BCM53314_B0_REV_ID 0x11 + +#define BCM53322_DEVICE_ID 0xc322 +#define BCM53322_A0_REV_ID 1 +#define BCM53323_DEVICE_ID 0xc323 +#define BCM53323_A0_REV_ID 1 +#define BCM53324_DEVICE_ID 0xc324 +#define BCM53324_A0_REV_ID 1 + + +#define BCM56218_DEVICE_ID 0xB218 +#define BCM56218_A0_REV_ID 1 +#define BCM56218_A1_REV_ID 2 +#define BCM56218_A2_REV_ID 3 +#define BCM56218X_DEVICE_ID 0xc710 +#define BCM56218X_A0_REV_ID 1 +#define BCM56218X_A1_REV_ID 2 +#define BCM56218X_A2_REV_ID 3 +#define BCM56219_DEVICE_ID 0xB219 +#define BCM56219_A0_REV_ID 1 +#define BCM56219_A1_REV_ID 2 +#define BCM56219_A2_REV_ID 3 +#define BCM56218R_DEVICE_ID 0xB21A +#define BCM56218R_A0_REV_ID 1 +#define BCM56218R_A1_REV_ID 2 +#define BCM56218R_A2_REV_ID 3 +#define BCM56219R_DEVICE_ID 0xB21B +#define BCM56219R_A0_REV_ID 1 +#define BCM56219R_A1_REV_ID 2 +#define BCM56219R_A2_REV_ID 3 +#define BCM56214_DEVICE_ID 0xB214 +#define BCM56214_A0_REV_ID 1 +#define BCM56214_A1_REV_ID 2 +#define BCM56214_A2_REV_ID 3 +#define BCM56215_DEVICE_ID 0xB215 +#define BCM56215_A0_REV_ID 1 +#define BCM56215_A1_REV_ID 2 +#define BCM56215_A2_REV_ID 3 +#define BCM56214R_DEVICE_ID 0xB21C +#define BCM56214R_A0_REV_ID 1 +#define BCM56214R_A1_REV_ID 2 +#define BCM56214R_A2_REV_ID 3 +#define BCM56215R_DEVICE_ID 0xB21D +#define BCM56215R_A0_REV_ID 1 +#define BCM56215R_A1_REV_ID 2 +#define BCM56215R_A2_REV_ID 3 +#define BCM56216_DEVICE_ID 0xB216 +#define BCM56216_A0_REV_ID 1 +#define BCM56216_A1_REV_ID 2 +#define BCM56216_A2_REV_ID 3 +#define BCM56217_DEVICE_ID 0xB217 +#define BCM56217_A0_REV_ID 1 +#define BCM56217_A1_REV_ID 2 +#define BCM56217_A2_REV_ID 3 +#define BCM56212_DEVICE_ID 0xB212 +#define BCM56212_A0_REV_ID 1 +#define BCM56212_A1_REV_ID 2 +#define BCM56212_A2_REV_ID 3 +#define BCM56213_DEVICE_ID 0xB213 +#define BCM56213_A0_REV_ID 1 +#define BCM56213_A1_REV_ID 2 +#define BCM56213_A2_REV_ID 3 +#define BCM53718_DEVICE_ID 0xC71A +#define BCM53718_A0_REV_ID 1 +#define BCM53718_A1_REV_ID 2 +#define BCM53718_A2_REV_ID 3 +#define BCM53714_DEVICE_ID 0xC71B +#define BCM53714_A0_REV_ID 1 +#define BCM53714_A1_REV_ID 2 +#define BCM53714_A2_REV_ID 3 +#define BCM53716_DEVICE_ID 0xC716 +#define BCM53716_A0_REV_ID 1 +#define BCM53716_A1_REV_ID 2 +#define BCM53716_A2_REV_ID 3 +#define BCM56018_DEVICE_ID 0xB018 +#define BCM56018_A0_REV_ID 1 +#define BCM56018_A1_REV_ID 2 +#define BCM56018_A2_REV_ID 3 +#define BCM56014_DEVICE_ID 0xB014 +#define BCM56014_A0_REV_ID 1 +#define BCM56014_A1_REV_ID 2 +#define BCM56014_A2_REV_ID 3 + +#define BCM56510_DEVICE_ID 0xb510 +#define BCM56510_A0_REV_ID 1 +#define BCM56511_DEVICE_ID 0xb511 +#define BCM56511_A0_REV_ID 1 +#define BCM56512_DEVICE_ID 0xb512 +#define BCM56512_A0_REV_ID 1 +#define BCM56513_DEVICE_ID 0xb513 +#define BCM56513_A0_REV_ID 1 +#define BCM56514_DEVICE_ID 0xb514 +#define BCM56514_A0_REV_ID 1 +#define BCM56516_DEVICE_ID 0xb516 +#define BCM56516_A0_REV_ID 1 +#define BCM56517_DEVICE_ID 0xb517 +#define BCM56517_A0_REV_ID 1 +#define BCM56518_DEVICE_ID 0xb518 +#define BCM56518_A0_REV_ID 1 +#define BCM56519_DEVICE_ID 0xb519 +#define BCM56519_A0_REV_ID 1 + +#define BCM56620_DEVICE_ID 0xb620 +#define BCM56620_A0_REV_ID 1 +#define BCM56620_A1_REV_ID 2 +#define BCM56620_B0_REV_ID 0x11 +#define BCM56620_B1_REV_ID 0x12 +#define BCM56620_B2_REV_ID 0x13 +#define BCM56624_DEVICE_ID 0xb624 +#define BCM56624_A0_REV_ID 1 +#define BCM56624_A1_REV_ID 2 +#define BCM56624_B0_REV_ID 0x11 +#define BCM56624_B1_REV_ID 0x12 +#define BCM56624_B2_REV_ID 0x13 +#define BCM56626_DEVICE_ID 0xb626 +#define BCM56626_A0_REV_ID 1 +#define BCM56626_A1_REV_ID 2 +#define BCM56626_B0_REV_ID 0x11 +#define BCM56626_B1_REV_ID 0x12 +#define BCM56626_B2_REV_ID 0x13 +#define BCM56628_DEVICE_ID 0xb628 +#define BCM56628_A0_REV_ID 1 +#define BCM56628_A1_REV_ID 2 +#define BCM56628_B0_REV_ID 0x11 +#define BCM56628_B1_REV_ID 0x12 +#define BCM56628_B2_REV_ID 0x13 +#define BCM56629_DEVICE_ID 0xb629 +#define BCM56629_A0_REV_ID 1 +#define BCM56629_A1_REV_ID 2 +#define BCM56629_B0_REV_ID 0x11 +#define BCM56629_B1_REV_ID 0x12 +#define BCM56629_B2_REV_ID 0x13 + +#define BCM56680_DEVICE_ID 0xb680 +#define BCM56680_A0_REV_ID 1 +#define BCM56680_A1_REV_ID 2 +#define BCM56680_B0_REV_ID 0x11 +#define BCM56680_B1_REV_ID 0x12 +#define BCM56680_B2_REV_ID 0x13 +#define BCM56684_DEVICE_ID 0xb684 +#define BCM56684_A0_REV_ID 1 +#define BCM56684_A1_REV_ID 2 +#define BCM56684_B0_REV_ID 0x11 +#define BCM56684_B1_REV_ID 0x12 +#define BCM56684_B2_REV_ID 0x13 +#define BCM56686_DEVICE_ID 0xb686 +#define BCM56686_B0_REV_ID 0x11 +#define BCM56686_B1_REV_ID 0x12 +#define BCM56686_B2_REV_ID 0x13 + +#define BCM56820_DEVICE_ID 0xb820 +#define BCM56820_A0_REV_ID 1 +#define BCM56820_B0_REV_ID 0x11 +#define BCM56821_DEVICE_ID 0xb821 +#define BCM56821_A0_REV_ID 1 +#define BCM56821_B0_REV_ID 0x11 +#define BCM56822_DEVICE_ID 0xb822 +#define BCM56822_A0_REV_ID 1 +#define BCM56822_B0_REV_ID 0x11 +#define BCM56823_DEVICE_ID 0xb823 +#define BCM56823_A0_REV_ID 1 +#define BCM56823_B0_REV_ID 0x11 +#define BCM56825_DEVICE_ID 0xb825 +#define BCM56825_B0_REV_ID 0x11 + +#define BCM56720_DEVICE_ID 0xb720 +#define BCM56720_A0_REV_ID 1 +#define BCM56720_B0_REV_ID 0x11 +#define BCM56721_DEVICE_ID 0xb721 +#define BCM56721_A0_REV_ID 1 +#define BCM56721_B0_REV_ID 0x11 + +#define BCM56725_DEVICE_ID 0xb725 +#define BCM56725_A0_REV_ID 1 +#define BCM56725_B0_REV_ID 0x11 + +#define BCM56630_DEVICE_ID 0xb630 +#define BCM56630_A0_REV_ID 1 +#define BCM56630_B0_REV_ID 0x11 +#define BCM56634_DEVICE_ID 0xb634 +#define BCM56634_A0_REV_ID 1 +#define BCM56634_B0_REV_ID 0x11 +#define BCM56636_DEVICE_ID 0xb636 +#define BCM56636_A0_REV_ID 1 +#define BCM56636_B0_REV_ID 0x11 +#define BCM56638_DEVICE_ID 0xb638 +#define BCM56638_A0_REV_ID 1 +#define BCM56638_B0_REV_ID 0x11 +#define BCM56639_DEVICE_ID 0xb639 +#define BCM56639_A0_REV_ID 1 +#define BCM56639_B0_REV_ID 0x11 + +#define BCM56685_DEVICE_ID 0xb685 +#define BCM56685_A0_REV_ID 1 +#define BCM56685_B0_REV_ID 0x11 +#define BCM56689_DEVICE_ID 0xb689 +#define BCM56689_A0_REV_ID 1 +#define BCM56689_B0_REV_ID 0x11 + +#define BCM56520_DEVICE_ID 0xb520 +#define BCM56520_A0_REV_ID 1 +#define BCM56520_B0_REV_ID 0x11 +#define BCM56521_DEVICE_ID 0xb521 +#define BCM56521_A0_REV_ID 1 +#define BCM56521_B0_REV_ID 0x11 +#define BCM56522_DEVICE_ID 0xb522 +#define BCM56522_A0_REV_ID 1 +#define BCM56522_B0_REV_ID 0x11 +#define BCM56524_DEVICE_ID 0xb524 +#define BCM56524_A0_REV_ID 1 +#define BCM56524_B0_REV_ID 0x11 +#define BCM56526_DEVICE_ID 0xb526 +#define BCM56526_A0_REV_ID 1 +#define BCM56526_B0_REV_ID 0x11 + +#define BCM56534_DEVICE_ID 0xb534 +#define BCM56534_B0_REV_ID 0x11 +#define BCM56538_DEVICE_ID 0xb538 +#define BCM56538_B0_REV_ID 0x11 + +#define BCM56331_DEVICE_ID 0xb331 +#define BCM56331_A0_REV_ID 1 +#define BCM56331_B0_REV_ID 0x11 +#define BCM56331_B1_REV_ID 0x12 +#define BCM56333_DEVICE_ID 0xb333 +#define BCM56333_A0_REV_ID 1 +#define BCM56333_B0_REV_ID 0x11 +#define BCM56333_B1_REV_ID 0x12 +#define BCM56334_DEVICE_ID 0xb334 +#define BCM56334_A0_REV_ID 1 +#define BCM56334_B0_REV_ID 0x11 +#define BCM56334_B1_REV_ID 0x12 +#define BCM56338_DEVICE_ID 0xb338 +#define BCM56338_A0_REV_ID 1 +#define BCM56338_B0_REV_ID 0x11 +#define BCM56338_B1_REV_ID 0x12 + +#define BCM56320_DEVICE_ID 0xb320 +#define BCM56320_A0_REV_ID 1 +#define BCM56320_B0_REV_ID 0x11 +#define BCM56320_B1_REV_ID 0x12 +#define BCM56321_DEVICE_ID 0xb321 +#define BCM56321_A0_REV_ID 1 +#define BCM56321_B0_REV_ID 0x11 +#define BCM56321_B1_REV_ID 0x12 + + +#define BCM56548H_DEVICE_ID 0xB54A +#define BCM56548H_A0_REV_ID 1 +#define BCM56548_DEVICE_ID 0xb548 +#define BCM56548_A0_REV_ID 1 +#define BCM56547_DEVICE_ID 0xb547 +#define BCM56547_A0_REV_ID 1 + +#define BCM56346_DEVICE_ID 0xb346 +#define BCM56346_A0_REV_ID 1 +#define BCM56345_DEVICE_ID 0xb345 +#define BCM56345_A0_REV_ID 1 +#define BCM56344_DEVICE_ID 0xb344 +#define BCM56344_A0_REV_ID 1 +#define BCM56342_DEVICE_ID 0xb342 +#define BCM56342_A0_REV_ID 1 +#define BCM56340_DEVICE_ID 0xb340 +#define BCM56340_A0_REV_ID 1 + +#define BCM56049_DEVICE_ID 0xb049 +#define BCM56049_A0_REV_ID 1 +#define BCM56048_DEVICE_ID 0xb048 +#define BCM56048_A0_REV_ID 1 +#define BCM56047_DEVICE_ID 0xb047 +#define BCM56047_A0_REV_ID 1 + +#define BCM56042_DEVICE_ID 0xb042 +#define BCM56042_A0_REV_ID 1 +#define BCM56041_DEVICE_ID 0xb041 +#define BCM56041_A0_REV_ID 1 +#define BCM56040_DEVICE_ID 0xb040 +#define BCM56040_A0_REV_ID 1 + +#define BCM56132_DEVICE_ID 0xb132 +#define BCM56132_A0_REV_ID 1 +#define BCM56132_B0_REV_ID 0x11 +#define BCM56132_B1_REV_ID 0x12 +#define BCM56134_DEVICE_ID 0xb134 +#define BCM56134_A0_REV_ID 1 +#define BCM56134_B0_REV_ID 0x11 +#define BCM56134_B1_REV_ID 0x12 + +#define BCM56230_DEVICE_ID 0xb230 +#define BCM56230_B1_REV_ID 0x12 +#define BCM56231_DEVICE_ID 0xb231 +#define BCM56231_B1_REV_ID 0x12 + +#define BCM56140_DEVICE_ID 0xb140 +#define BCM56140_A0_REV_ID 1 +#define BCM56142_DEVICE_ID 0xb142 +#define BCM56142_A0_REV_ID 1 +#define BCM56143_DEVICE_ID 0xb143 +#define BCM56143_A0_REV_ID 1 +#define BCM56144_DEVICE_ID 0xb144 +#define BCM56144_A0_REV_ID 1 +#define BCM56146_DEVICE_ID 0xb146 +#define BCM56146_A0_REV_ID 1 +#define BCM56147_DEVICE_ID 0xb147 +#define BCM56147_A0_REV_ID 1 +#define BCM56149_DEVICE_ID 0xb149 +#define BCM56149_A0_REV_ID 1 + +#define BCM56840_DEVICE_ID 0xb840 +#define BCM56840_A0_REV_ID 1 +#define BCM56840_A1_REV_ID 2 +#define BCM56840_A2_REV_ID 3 +#define BCM56840_A3_REV_ID 4 +#define BCM56840_A4_REV_ID 5 +#define BCM56840_B0_REV_ID 0x11 +#define BCM56840_B1_REV_ID 0x12 +#define BCM56841_DEVICE_ID 0xb841 +#define BCM56841_A0_REV_ID 1 +#define BCM56841_A1_REV_ID 2 +#define BCM56841_A2_REV_ID 3 +#define BCM56841_A3_REV_ID 4 +#define BCM56841_A4_REV_ID 5 +#define BCM56841_B0_REV_ID 0x11 +#define BCM56841_B1_REV_ID 0x12 +#define BCM56843_DEVICE_ID 0xb843 +#define BCM56843_A0_REV_ID 1 +#define BCM56843_A1_REV_ID 2 +#define BCM56843_A2_REV_ID 3 +#define BCM56843_A3_REV_ID 4 +#define BCM56843_A4_REV_ID 5 +#define BCM56843_B0_REV_ID 0x11 +#define BCM56843_B1_REV_ID 0x12 +#define BCM56845_DEVICE_ID 0xb845 +#define BCM56845_A0_REV_ID 1 +#define BCM56845_A1_REV_ID 2 +#define BCM56845_A2_REV_ID 3 +#define BCM56845_A3_REV_ID 4 +#define BCM56845_A4_REV_ID 5 +#define BCM56845_B0_REV_ID 0x11 +#define BCM56845_B1_REV_ID 0x12 + +#define BCM56743_DEVICE_ID 0xb743 +#define BCM56743_A0_REV_ID 1 +#define BCM56743_A1_REV_ID 2 +#define BCM56743_A2_REV_ID 3 +#define BCM56743_A3_REV_ID 4 +#define BCM56743_A4_REV_ID 5 +#define BCM56743_B0_REV_ID 0x11 +#define BCM56743_B1_REV_ID 0x12 +#define BCM56745_DEVICE_ID 0xb745 +#define BCM56745_A0_REV_ID 1 +#define BCM56745_A1_REV_ID 2 +#define BCM56745_A2_REV_ID 3 +#define BCM56745_A3_REV_ID 4 +#define BCM56745_A4_REV_ID 5 +#define BCM56745_B0_REV_ID 0x11 +#define BCM56745_B1_REV_ID 0x12 + +#define BCM56260_DEVICE_ID 0xb260 +#define BCM56260_A0_REV_ID 1 +#define BCM56260_B0_REV_ID 0x11 +#define BCM56261_DEVICE_ID 0xb261 +#define BCM56261_A0_REV_ID 1 +#define BCM56261_B0_REV_ID 0x11 +#define BCM56262_DEVICE_ID 0xb262 +#define BCM56262_A0_REV_ID 1 +#define BCM56262_B0_REV_ID 0x11 +#define BCM56263_DEVICE_ID 0xb263 +#define BCM56263_A0_REV_ID 1 +#define BCM56263_B0_REV_ID 0x11 + +#define BCM56265_DEVICE_ID 0xb265 +#define BCM56265_A0_REV_ID 1 +#define BCM56265_B0_REV_ID 0x11 +#define BCM56266_DEVICE_ID 0xb266 +#define BCM56266_A0_REV_ID 1 +#define BCM56266_B0_REV_ID 0x11 +#define BCM56267_DEVICE_ID 0xb267 +#define BCM56267_A0_REV_ID 1 +#define BCM56267_B0_REV_ID 0x11 +#define BCM56268_DEVICE_ID 0xb268 +#define BCM56268_A0_REV_ID 1 +#define BCM56268_B0_REV_ID 0x11 + +#define BCM56233_DEVICE_ID 0xb233 +#define BCM56233_B0_REV_ID 0x11 + +#define BCM56460_DEVICE_ID 0xb460 +#define BCM56460_A0_REV_ID 1 +#define BCM56460_B0_REV_ID 0x11 +#define BCM56461_DEVICE_ID 0xb461 +#define BCM56461_A0_REV_ID 1 +#define BCM56461_B0_REV_ID 0x11 +#define BCM56462_DEVICE_ID 0xb462 +#define BCM56462_A0_REV_ID 1 +#define BCM56462_B0_REV_ID 0x11 +#define BCM56463_DEVICE_ID 0xb463 +#define BCM56463_A0_REV_ID 1 +#define BCM56463_B0_REV_ID 0x11 + +#define BCM56465_DEVICE_ID 0xb465 +#define BCM56465_A0_REV_ID 1 +#define BCM56465_B0_REV_ID 0x11 +#define BCM56466_DEVICE_ID 0xb466 +#define BCM56466_A0_REV_ID 1 +#define BCM56466_B0_REV_ID 0x11 +#define BCM56467_DEVICE_ID 0xb467 +#define BCM56467_A0_REV_ID 1 +#define BCM56467_B0_REV_ID 0x11 +#define BCM56468_DEVICE_ID 0xb468 +#define BCM56468_A0_REV_ID 1 +#define BCM56468_B0_REV_ID 0x11 + +#define BCM56270_DEVICE_ID 0xb270 +#define BCM56270_A0_REV_ID 1 +#define BCM56271_DEVICE_ID 0xb271 +#define BCM56271_A0_REV_ID 1 +#define BCM56272_DEVICE_ID 0xb272 +#define BCM56272_A0_REV_ID 1 + +#define BCM53460_DEVICE_ID 0x8460 +#define BCM53460_A0_REV_ID 1 +#define BCM53461_DEVICE_ID 0x8461 +#define BCM53461_A0_REV_ID 1 + +#define BCM56842_DEVICE_ID 0xb842 +#define BCM56842_A0_REV_ID 1 +#define BCM56842_A1_REV_ID 2 +#define BCM56844_DEVICE_ID 0xb844 +#define BCM56844_A0_REV_ID 1 +#define BCM56844_A1_REV_ID 2 +#define BCM56846_DEVICE_ID 0xb846 +#define BCM56846_A0_REV_ID 1 +#define BCM56846_A1_REV_ID 2 +#define BCM56549_DEVICE_ID 0xb549 +#define BCM56549_A0_REV_ID 1 +#define BCM56549_A1_REV_ID 2 +#define BCM56053_DEVICE_ID 0xb053 +#define BCM56053_A0_REV_ID 1 +#define BCM56053_A1_REV_ID 2 +#define BCM56831_DEVICE_ID 0xb831 +#define BCM56831_A0_REV_ID 1 +#define BCM56831_A1_REV_ID 2 +#define BCM56835_DEVICE_ID 0xb835 +#define BCM56835_A0_REV_ID 1 +#define BCM56835_A1_REV_ID 2 +#define BCM56838_DEVICE_ID 0xb838 +#define BCM56838_A0_REV_ID 1 +#define BCM56838_A1_REV_ID 2 +#define BCM56847_DEVICE_ID 0xb847 +#define BCM56847_A0_REV_ID 1 +#define BCM56847_A1_REV_ID 2 +#define BCM56847_A2_REV_ID 3 +#define BCM56847_A3_REV_ID 4 +#define BCM56847_A4_REV_ID 5 +#define BCM56847_B0_REV_ID 0x11 +#define BCM56847_B1_REV_ID 0x12 +#define BCM56849_DEVICE_ID 0xb849 +#define BCM56849_A0_REV_ID 1 +#define BCM56849_A1_REV_ID 2 + +#define BCM56742_DEVICE_ID 0xb742 +#define BCM56742_A0_REV_ID 1 +#define BCM56742_A1_REV_ID 2 +#define BCM56742_A2_REV_ID 3 +#define BCM56744_DEVICE_ID 0xb744 +#define BCM56744_A0_REV_ID 1 +#define BCM56744_A1_REV_ID 2 +#define BCM56746_DEVICE_ID 0xb746 +#define BCM56746_A0_REV_ID 1 +#define BCM56746_A1_REV_ID 2 + + +#define BCM56640_DEVICE_ID 0xb640 +#define BCM56640_A0_REV_ID 1 +#define BCM56640_A1_REV_ID 2 +#define BCM56640_B0_REV_ID 0x11 +#define BCM56643_DEVICE_ID 0xb643 +#define BCM56643_A0_REV_ID 1 +#define BCM56643_A1_REV_ID 2 +#define BCM56643_B0_REV_ID 0x11 +#define BCM56644_DEVICE_ID 0xb644 +#define BCM56644_A0_REV_ID 1 +#define BCM56644_A1_REV_ID 2 +#define BCM56644_B0_REV_ID 0x11 +#define BCM56648_DEVICE_ID 0xb648 +#define BCM56648_A0_REV_ID 1 +#define BCM56648_A1_REV_ID 2 +#define BCM56648_B0_REV_ID 0x11 +#define BCM56649_DEVICE_ID 0xb649 +#define BCM56649_A0_REV_ID 1 +#define BCM56649_A1_REV_ID 2 +#define BCM56649_B0_REV_ID 0x11 + +#define BCM56540_DEVICE_ID 0xb540 +#define BCM56540_A0_REV_ID 1 +#define BCM56540_A1_REV_ID 2 +#define BCM56540_B0_REV_ID 0x11 +#define BCM56541_DEVICE_ID 0xb541 +#define BCM56541_A0_REV_ID 1 +#define BCM56541_A1_REV_ID 2 +#define BCM56541_B0_REV_ID 0x11 +#define BCM56542_DEVICE_ID 0xb542 +#define BCM56542_A0_REV_ID 1 +#define BCM56542_A1_REV_ID 2 +#define BCM56542_B0_REV_ID 0x11 +#define BCM56543_DEVICE_ID 0xb543 +#define BCM56543_A0_REV_ID 1 +#define BCM56543_A1_REV_ID 2 +#define BCM56543_B0_REV_ID 0x11 +#define BCM56544_DEVICE_ID 0xb544 +#define BCM56544_A0_REV_ID 1 +#define BCM56544_A1_REV_ID 2 +#define BCM56544_B0_REV_ID 0x11 + +#define BCM56545_DEVICE_ID 0xb545 +#define BCM56545_A0_REV_ID 1 +#define BCM56545_A1_REV_ID 2 +#define BCM56545_B0_REV_ID 0x11 +#define BCM56546_DEVICE_ID 0xb546 +#define BCM56546_A0_REV_ID 1 +#define BCM56546_A1_REV_ID 2 +#define BCM56546_B0_REV_ID 0x11 + +#define BCM56044_DEVICE_ID 0xb044 +#define BCM56044_B0_REV_ID 0x11 +#define BCM56045_DEVICE_ID 0xb045 +#define BCM56045_A0_REV_ID 1 +#define BCM56045_A1_REV_ID 2 +#define BCM56045_B0_REV_ID 0x11 +#define BCM56046_DEVICE_ID 0xb046 +#define BCM56046_A0_REV_ID 1 +#define BCM56046_A1_REV_ID 2 +#define BCM56046_B0_REV_ID 0x11 + + +#define BCM56440_DEVICE_ID 0xb440 +#define BCM56440_A0_REV_ID 1 +#define BCM56440_B0_REV_ID 0x11 +#define BCM56441_DEVICE_ID 0xb441 +#define BCM56441_A0_REV_ID 1 +#define BCM56441_B0_REV_ID 0x11 +#define BCM56442_DEVICE_ID 0xb442 +#define BCM56442_A0_REV_ID 1 +#define BCM56442_B0_REV_ID 0x11 +#define BCM56443_DEVICE_ID 0xb443 +#define BCM56443_A0_REV_ID 1 +#define BCM56443_B0_REV_ID 0x11 +#define BCM56445_DEVICE_ID 0xb445 +#define BCM56445_A0_REV_ID 1 +#define BCM56445_B0_REV_ID 0x11 +#define BCM56446_DEVICE_ID 0xb446 +#define BCM56446_A0_REV_ID 1 +#define BCM56446_B0_REV_ID 0x11 +#define BCM56447_DEVICE_ID 0xb447 +#define BCM56447_A0_REV_ID 1 +#define BCM56447_B0_REV_ID 0x11 +#define BCM56448_DEVICE_ID 0xb448 +#define BCM56448_A0_REV_ID 1 +#define BCM56448_B0_REV_ID 0x11 +#define BCM56449_DEVICE_ID 0xb449 +#define BCM56449_A0_REV_ID 1 +#define BCM56449_B0_REV_ID 0x11 +#define BCM56240_DEVICE_ID 0xb240 +#define BCM56240_A0_REV_ID 1 +#define BCM56240_B0_REV_ID 0x11 +#define BCM56241_DEVICE_ID 0xb241 +#define BCM56241_A0_REV_ID 1 +#define BCM56241_B0_REV_ID 0x11 +#define BCM56242_DEVICE_ID 0xb242 +#define BCM56242_A0_REV_ID 1 +#define BCM56242_B0_REV_ID 0x11 +#define BCM56243_DEVICE_ID 0xb243 +#define BCM56243_A0_REV_ID 1 +#define BCM56243_B0_REV_ID 0x11 +#define BCM56245_DEVICE_ID 0xb245 +#define BCM56245_A0_REV_ID 1 +#define BCM56245_B0_REV_ID 0x11 +#define BCM56246_DEVICE_ID 0xb246 +#define BCM56246_A0_REV_ID 1 +#define BCM56246_B0_REV_ID 0x11 +#define BCM55440_DEVICE_ID 0xa440 +#define BCM55440_A0_REV_ID 1 +#define BCM55440_B0_REV_ID 0x11 +#define BCM55441_DEVICE_ID 0xa441 +#define BCM55441_A0_REV_ID 1 +#define BCM55441_B0_REV_ID 0x11 + +#define BCM55450_DEVICE_ID 0xa450 +#define BCM55450_A0_REV_ID 1 +#define BCM55450_B0_REV_ID 0x11 +#define BCM55450_B1_REV_ID 0x12 + +#define BCM55455_DEVICE_ID 0xa455 +#define BCM55455_A0_REV_ID 1 +#define BCM55455_B0_REV_ID 0x11 +#define BCM55455_B1_REV_ID 0x12 + +#define BCM56248_DEVICE_ID 0xb248 +#define BCM56248_A0_REV_ID 1 +#define BCM56248_B0_REV_ID 0x11 +#define BCM56248_B1_REV_ID 0x12 + +#define BCM56450_DEVICE_ID 0xb450 +#define BCM56450_A0_REV_ID 1 +#define BCM56450_B0_REV_ID 0x11 +#define BCM56450_B1_REV_ID 0x12 + +#define BCM56452_DEVICE_ID 0xb452 +#define BCM56452_A0_REV_ID 1 +#define BCM56452_B0_REV_ID 0x11 +#define BCM56452_B1_REV_ID 0x12 + +#define BCM56454_DEVICE_ID 0xb454 +#define BCM56454_A0_REV_ID 1 +#define BCM56454_B0_REV_ID 0x11 +#define BCM56454_B1_REV_ID 0x12 + +#define BCM56455_DEVICE_ID 0xb455 +#define BCM56455_A0_REV_ID 1 +#define BCM56455_B0_REV_ID 0x11 +#define BCM56455_B1_REV_ID 0x12 + +#define BCM56456_DEVICE_ID 0xb456 +#define BCM56456_A0_REV_ID 1 +#define BCM56456_B0_REV_ID 0x11 +#define BCM56456_B1_REV_ID 0x12 + +#define BCM56457_DEVICE_ID 0xb457 +#define BCM56457_A0_REV_ID 1 +#define BCM56457_B0_REV_ID 0x11 +#define BCM56457_B1_REV_ID 0x12 + +#define BCM56458_DEVICE_ID 0xb458 +#define BCM56458_A0_REV_ID 1 +#define BCM56458_B0_REV_ID 0x11 +#define BCM56458_B1_REV_ID 0x12 + +#define BCM56850_DEVICE_ID 0xb850 +#define BCM56850_A0_REV_ID 1 +#define BCM56850_A1_REV_ID 2 +#define BCM56850_A2_REV_ID 3 +#define BCM56851_DEVICE_ID 0xb851 +#define BCM56851_A0_REV_ID 1 +#define BCM56851_A1_REV_ID 2 +#define BCM56851_A2_REV_ID 3 +#define BCM56852_DEVICE_ID 0xb852 +#define BCM56852_A0_REV_ID 1 +#define BCM56852_A1_REV_ID 2 +#define BCM56852_A2_REV_ID 3 +#define BCM56853_DEVICE_ID 0xb853 +#define BCM56853_A0_REV_ID 1 +#define BCM56853_A1_REV_ID 2 +#define BCM56853_A2_REV_ID 3 +#define BCM56854_DEVICE_ID 0xb854 +#define BCM56854_A0_REV_ID 1 +#define BCM56854_A1_REV_ID 2 +#define BCM56854_A2_REV_ID 3 +#define BCM56855_DEVICE_ID 0xb855 +#define BCM56855_A0_REV_ID 1 +#define BCM56855_A1_REV_ID 2 +#define BCM56855_A2_REV_ID 3 +#define BCM56834_DEVICE_ID 0xb834 +#define BCM56834_A0_REV_ID 1 +#define BCM56834_A1_REV_ID 2 +#define BCM56834_A2_REV_ID 3 + +#define BCM56860_DEVICE_ID 0xb860 +#define BCM56860_A0_REV_ID 1 +#define BCM56860_A1_REV_ID 2 +#define BCM56861_DEVICE_ID 0xb861 +#define BCM56861_A0_REV_ID 1 +#define BCM56861_A1_REV_ID 2 +#define BCM56862_DEVICE_ID 0xb862 +#define BCM56862_A0_REV_ID 1 +#define BCM56862_A1_REV_ID 2 +#define BCM56864_DEVICE_ID 0xb864 +#define BCM56864_A0_REV_ID 1 +#define BCM56864_A1_REV_ID 2 +#define BCM56865_DEVICE_ID 0xb865 +#define BCM56865_A0_REV_ID 1 +#define BCM56865_A1_REV_ID 2 +#define BCM56866_DEVICE_ID 0xb866 +#define BCM56866_A0_REV_ID 1 +#define BCM56866_A1_REV_ID 2 +#define BCM56867_DEVICE_ID 0xb867 +#define BCM56867_A0_REV_ID 1 +#define BCM56867_A1_REV_ID 2 +#define BCM56868_DEVICE_ID 0xb868 +#define BCM56868_A0_REV_ID 1 +#define BCM56868_A1_REV_ID 2 +#define BCM56832_DEVICE_ID 0xb832 +#define BCM56832_A0_REV_ID 1 +#define BCM56832_A1_REV_ID 2 +#define BCM56833_DEVICE_ID 0xb833 +#define BCM56833_A0_REV_ID 1 +#define BCM56833_A1_REV_ID 2 +#define BCM56836_DEVICE_ID 0xb836 +#define BCM56836_A0_REV_ID 1 +#define BCM56836_A1_REV_ID 2 + + +#define BCM56750_DEVICE_ID 0xb750 +#define BCM56750_A0_REV_ID 1 +#define BCM56750_A1_REV_ID 2 +#define BCM56750_A2_REV_ID 3 + +#define BCM56830_DEVICE_ID 0xb830 +#define BCM56830_A0_REV_ID 1 +#define BCM56830_A1_REV_ID 2 +#define BCM56830_A2_REV_ID 3 + +#define BCM56150_DEVICE_ID 0xb150 +#define BCM56150_A0_REV_ID 1 +#define BCM56151_DEVICE_ID 0xb151 +#define BCM56151_A0_REV_ID 1 +#define BCM56152_DEVICE_ID 0xb152 +#define BCM56152_A0_REV_ID 1 + +#define BCM53342_DEVICE_ID 0x8342 +#define BCM53342_A0_REV_ID 1 +#define BCM53343_DEVICE_ID 0x8343 +#define BCM53343_A0_REV_ID 1 +#define BCM53344_DEVICE_ID 0x8344 +#define BCM53344_A0_REV_ID 1 +#define BCM53346_DEVICE_ID 0x8346 +#define BCM53346_A0_REV_ID 1 +#define BCM53347_DEVICE_ID 0x8347 +#define BCM53347_A0_REV_ID 1 + +#define BCM53333_DEVICE_ID 0x8333 +#define BCM53333_A0_REV_ID 1 +#define BCM53334_DEVICE_ID 0x8334 +#define BCM53334_A0_REV_ID 1 + +#define BCM53393_DEVICE_ID 0x8393 +#define BCM53393_A0_REV_ID 1 +#define BCM53394_DEVICE_ID 0x8394 +#define BCM53394_A0_REV_ID 1 + +#define BCM53400_DEVICE_ID 0x8400 +#define BCM53400_A0_REV_ID 1 +#define BCM56060_DEVICE_ID 0xb060 +#define BCM56060_A0_REV_ID 1 +#define BCM56062_DEVICE_ID 0xb062 +#define BCM56062_A0_REV_ID 1 +#define BCM56063_DEVICE_ID 0xb063 +#define BCM56063_A0_REV_ID 1 +#define BCM56064_DEVICE_ID 0xb064 +#define BCM56064_A0_REV_ID 1 +#define BCM56065_DEVICE_ID 0xb065 +#define BCM56065_A0_REV_ID 1 +#define BCM56066_DEVICE_ID 0xb066 +#define BCM56066_A0_REV_ID 1 +#define BCM53401_DEVICE_ID 0x8401 +#define BCM53411_DEVICE_ID 0x8411 +#define BCM53401_A0_REV_ID 1 +#define BCM53402_DEVICE_ID 0x8402 +#define BCM53412_DEVICE_ID 0x8412 +#define BCM53402_A0_REV_ID 1 +#define BCM53403_DEVICE_ID 0x8403 +#define BCM53413_DEVICE_ID 0x8413 +#define BCM53403_A0_REV_ID 1 +#define BCM53404_DEVICE_ID 0x8404 +#define BCM53414_DEVICE_ID 0x8414 +#define BCM53404_A0_REV_ID 1 +#define BCM53405_DEVICE_ID 0x8405 +#define BCM53415_DEVICE_ID 0x8415 +#define BCM53405_A0_REV_ID 1 +#define BCM53406_DEVICE_ID 0x8406 +#define BCM53416_DEVICE_ID 0x8416 +#define BCM53406_A0_REV_ID 1 +#define BCM53408_DEVICE_ID 0x8408 +#define BCM53418_DEVICE_ID 0x8418 +#define BCM53408_A0_REV_ID 1 +#define BCM53365_DEVICE_ID 0x8365 +#define BCM53365_A0_REV_ID 1 +#define BCM53369_DEVICE_ID 0x8369 +#define BCM53369_A0_REV_ID 1 + +#define BCM53454_DEVICE_ID 0x8454 +#define BCM53455_DEVICE_ID 0x8455 +#define BCM53454_A0_REV_ID 1 +#define BCM53456_DEVICE_ID 0x8456 +#define BCM53457_DEVICE_ID 0x8457 +#define BCM53456_A0_REV_ID 1 + +#define BCM53422_DEVICE_ID 0x8422 +#define BCM53422_A0_REV_ID 1 +#define BCM53424_DEVICE_ID 0x8424 +#define BCM53424_A0_REV_ID 1 +#define BCM53426_DEVICE_ID 0x8426 +#define BCM53426_A0_REV_ID 1 + +#define BCM56960_DEVICE_ID 0xb960 +#define BCM56960_A0_REV_ID 1 +#define BCM56960_B0_REV_ID 0x11 +#define BCM56960_B1_REV_ID 0x12 +#define BCM56961_DEVICE_ID 0xb961 +#define BCM56961_A0_REV_ID 1 +#define BCM56961_B0_REV_ID 0x11 +#define BCM56961_B1_REV_ID 0x12 +#define BCM56962_DEVICE_ID 0xb962 +#define BCM56962_A0_REV_ID 1 +#define BCM56962_B0_REV_ID 0x11 +#define BCM56962_B1_REV_ID 0x12 +#define BCM56963_DEVICE_ID 0xb963 +#define BCM56963_A0_REV_ID 1 +#define BCM56963_B0_REV_ID 0x11 +#define BCM56963_B1_REV_ID 0x12 +#define BCM56930_DEVICE_ID 0xb930 +#define BCM56930_A0_REV_ID 1 +#define BCM56930_B0_REV_ID 0x11 +#define BCM56930_B1_REV_ID 0x12 +#define BCM56930_C0_REV_ID 0x21 +#define BCM56931_DEVICE_ID 0xb931 +#define BCM56931_A0_REV_ID 1 +#define BCM56931_B0_REV_ID 0x11 +#define BCM56931_C0_REV_ID 0x21 +#define BCM56935_DEVICE_ID 0xb935 +#define BCM56935_A0_REV_ID 1 +#define BCM56935_B0_REV_ID 0x11 +#define BCM56935_C0_REV_ID 0x21 +#define BCM56936_DEVICE_ID 0xb936 +#define BCM56936_A0_REV_ID 1 +#define BCM56936_B0_REV_ID 0x11 +#define BCM56936_C0_REV_ID 0x21 +#define BCM56939_DEVICE_ID 0xb939 +#define BCM56939_A0_REV_ID 1 +#define BCM56939_B0_REV_ID 0x11 +#define BCM56939_C0_REV_ID 0x21 + +#define BCM56168_DEVICE_ID 0xb168 +#define BCM56168_A0_REV_ID 1 +#define BCM56168_B0_REV_ID 0x11 +#define BCM56168_B1_REV_ID 0x12 +#define BCM56169_DEVICE_ID 0xb169 +#define BCM56169_A0_REV_ID 1 +#define BCM56169_B0_REV_ID 0x11 +#define BCM56169_B1_REV_ID 0x12 + +#define BCM56980_DEVICE_ID_MASK 0xFFF0 +#define BCM56980_DEVICE_ID 0xb980 +#define BCM56980_A0_REV_ID 1 +#define BCM56980_B0_REV_ID 0x11 +#define BCM56981_DEVICE_ID 0xb981 +#define BCM56981_A0_REV_ID 1 +#define BCM56981_B0_REV_ID 0x11 +#define BCM56982_DEVICE_ID 0xb982 +#define BCM56982_A0_REV_ID 1 +#define BCM56982_B0_REV_ID 0x11 +#define BCM56983_DEVICE_ID 0xb983 +#define BCM56983_A0_REV_ID 1 +#define BCM56983_B0_REV_ID 0x11 +#define BCM56984_DEVICE_ID 0xb984 +#define BCM56984_A0_REV_ID 1 +#define BCM56984_B0_REV_ID 0x11 + +#define BCM56968_DEVICE_ID 0xb968 +#define BCM56968_A0_REV_ID 1 +#define BCM56968_B0_REV_ID 0x11 +#define BCM56968_B1_REV_ID 0x12 + +#define BCM56160_DEVICE_ID 0xb160 +#define BCM56160_A0_REV_ID 1 +#define BCM56160_B0_REV_ID 0x11 +#define BCM56162_DEVICE_ID 0xb162 +#define BCM56162_A0_REV_ID 1 +#define BCM56162_B0_REV_ID 0x11 + +#define BCM56163_DEVICE_ID 0xb163 +#define BCM56163_A0_REV_ID 1 +#define BCM56163_B0_REV_ID 0x11 +#define BCM56164_DEVICE_ID 0xb164 +#define BCM56164_A0_REV_ID 1 +#define BCM56164_B0_REV_ID 0x11 +#define BCM56166_DEVICE_ID 0xb166 +#define BCM56166_A0_REV_ID 1 +#define BCM56166_B0_REV_ID 0x11 + +#define BCM56273_DEVICE_ID 0xb273 +#define BCM56273_A0_REV_ID 1 +#define BCM56273_A1_REV_ID 2 + +#define BCM56274_DEVICE_ID 0xb274 +#define BCM56274_A0_REV_ID 1 +#define BCM56274_A1_REV_ID 2 + +#define BCM56275_DEVICE_ID 0xb275 +#define BCM56275_A0_REV_ID 1 +#define BCM56275_A1_REV_ID 2 + +#define BCM56276_DEVICE_ID 0xb276 +#define BCM56276_A0_REV_ID 1 +#define BCM56276_A1_REV_ID 2 + +#define BCM56277_DEVICE_ID 0xb277 +#define BCM56277_A0_REV_ID 1 +#define BCM56277_A1_REV_ID 2 + +#define BCM56278_DEVICE_ID 0xb278 +#define BCM56278_A0_REV_ID 1 +#define BCM56278_A1_REV_ID 2 + +#define BCM56279_DEVICE_ID 0xb279 +#define BCM56279_A1_REV_ID 2 + +#define BCM56575_DEVICE_ID 0xb575 +#define BCM56575_A1_REV_ID 2 + +#define BCM56175_DEVICE_ID 0xb175 +#define BCM56175_A1_REV_ID 2 + +#define BCM56176_DEVICE_ID 0xb176 +#define BCM56176_A1_REV_ID 2 + +#define BCM53440_DEVICE_ID 0x8440 +#define BCM53440_A0_REV_ID 1 +#define BCM53440_B0_REV_ID 0x11 +#define BCM53442_DEVICE_ID 0x8442 +#define BCM53442_A0_REV_ID 1 +#define BCM53442_B0_REV_ID 0x11 +#define BCM53443_DEVICE_ID 0x8443 +#define BCM53443_A0_REV_ID 1 +#define BCM53443_B0_REV_ID 0x11 + +#define BCM53434_DEVICE_ID 0x8434 +#define BCM53434_A0_REV_ID 1 +#define BCM53434_B0_REV_ID 0x11 + +#define BCM56560_DEVICE_ID 0xb560 +#define BCM56560_A0_REV_ID 1 +#define BCM56560_B0_REV_ID 0x11 + +#define BCM56561_DEVICE_ID 0xb561 +#define BCM56561_A0_REV_ID 1 +#define BCM56561_B0_REV_ID 0x11 + +#define BCM56562_DEVICE_ID 0xb562 +#define BCM56562_A0_REV_ID 1 +#define BCM56562_B0_REV_ID 0x11 + +#define BCM56670_DEVICE_ID 0xb670 +#define BCM56670_A0_REV_ID 1 +#define BCM56670_B0_REV_ID 0x11 +#define BCM56670_C0_REV_ID 0x21 + + +#define BCM56671_DEVICE_ID 0xb671 +#define BCM56671_A0_REV_ID 1 +#define BCM56671_B0_REV_ID 0x11 +#define BCM56671_C0_REV_ID 0x21 + +#define BCM56672_DEVICE_ID 0xb672 +#define BCM56672_A0_REV_ID 1 +#define BCM56672_B0_REV_ID 0x11 +#define BCM56672_C0_REV_ID 0x21 + +#define BCM56675_DEVICE_ID 0xb675 +#define BCM56675_A0_REV_ID 1 +#define BCM56675_B0_REV_ID 0x11 +#define BCM56675_C0_REV_ID 0x21 + +#define BCM53650_DEVICE_ID 0x8650 +#define BCM53650_A0_REV_ID 1 +#define BCM53650_B0_REV_ID 0x11 +#define BCM53650_C0_REV_ID 0x21 + +#define BCM53651_DEVICE_ID 0x8651 +#define BCM53651_A0_REV_ID 1 +#define BCM53651_B0_REV_ID 0x11 +#define BCM53651_C0_REV_ID 0x21 + +#define BCM53652_DEVICE_ID 0x8652 +#define BCM53652_A0_REV_ID 1 +#define BCM53652_B0_REV_ID 0x11 +#define BCM53652_C0_REV_ID 0x21 + +#define BCM53653_DEVICE_ID 0x8653 +#define BCM53653_A0_REV_ID 1 +#define BCM53653_B0_REV_ID 0x11 +#define BCM53653_C0_REV_ID 0x21 + +#define BCM53654_DEVICE_ID 0x8654 +#define BCM53654_A0_REV_ID 1 +#define BCM53654_B0_REV_ID 0x11 +#define BCM53654_C0_REV_ID 0x21 + +#define BCM56565_DEVICE_ID 0xb565 +#define BCM56565_A0_REV_ID 1 +#define BCM56565_B0_REV_ID 0x11 + +#define BCM56566_DEVICE_ID 0xb566 +#define BCM56566_A0_REV_ID 1 +#define BCM56566_B0_REV_ID 0x11 + +#define BCM56567_DEVICE_ID 0xb567 +#define BCM56567_A0_REV_ID 1 +#define BCM56567_B0_REV_ID 0x11 + +#define BCM56568_DEVICE_ID 0xb568 +#define BCM56568_A0_REV_ID 1 +#define BCM56568_B0_REV_ID 0x11 + +#define BCM56760_DEVICE_ID 0xb760 +#define BCM56760_A0_REV_ID 1 +#define BCM56760_A1_REV_ID 2 +#define BCM56760_B0_REV_ID 0x11 + + +#define BCM56761_DEVICE_ID 0xb761 +#define BCM56761_A0_REV_ID 1 +#define BCM56761_A1_REV_ID 2 +#define BCM56761_B0_REV_ID 0x11 +#define BCM56761_B1_REV_ID 0x12 + +#define BCM56762_DEVICE_ID 0xb762 +#define BCM56762_A0_REV_ID 1 +#define BCM56762_B0_REV_ID 0x11 + +#define BCM56764_DEVICE_ID 0xb764 +#define BCM56764_A0_REV_ID 1 +#define BCM56764_B0_REV_ID 0x11 + +#define BCM56765_DEVICE_ID 0xb765 +#define BCM56765_A0_REV_ID 1 +#define BCM56765_B0_REV_ID 0x11 + +#define BCM56766_DEVICE_ID 0xb766 +#define BCM56766_A0_REV_ID 1 +#define BCM56766_B0_REV_ID 0x11 + +#define BCM56768_DEVICE_ID 0xb768 +#define BCM56768_A0_REV_ID 1 +#define BCM56768_B0_REV_ID 0x11 + +#define BCM56068_DEVICE_ID 0xb068 +#define BCM56068_A0_REV_ID 1 +#define BCM56068_B0_REV_ID 0x11 +#define BCM56068_B1_REV_ID 0x12 + +#define BCM56069_DEVICE_ID 0xb069 +#define BCM56069_A0_REV_ID 1 +#define BCM56069_B0_REV_ID 0x11 + +#define BCM56170_DEVICE_ID 0xb170 +#define BCM56170_A0_REV_ID 1 +#define BCM56170_B0_REV_ID 0x11 +#define BCM56172_DEVICE_ID 0xb172 +#define BCM56172_A0_REV_ID 1 +#define BCM56172_B0_REV_ID 0x11 +#define BCM56174_DEVICE_ID 0xb174 +#define BCM56174_A0_REV_ID 1 +#define BCM56174_B0_REV_ID 0x11 + +#define BCM53570_DEVICE_ID 0x8570 +#define BCM53570_A0_REV_ID 1 +#define BCM53570_B0_REV_ID 0x11 +#define BCM53575_DEVICE_ID 0x8575 +#define BCM53575_A0_REV_ID 1 +#define BCM53575_B0_REV_ID 0x11 + +#define BCM56070_DEVICE_ID 0xb070 +#define BCM56070_A0_REV_ID 1 +#define BCM56071_DEVICE_ID 0xb071 +#define BCM56071_A0_REV_ID 1 +#define BCM56072_DEVICE_ID 0xb072 +#define BCM56072_A0_REV_ID 1 + + +#define BCM56965_DEVICE_ID 0xb965 +#define BCM56965_A0_REV_ID 1 +#define BCM56965_A1_REV_ID 2 +#define BCM56969_DEVICE_ID 0xb969 +#define BCM56969_A0_REV_ID 1 +#define BCM56966_DEVICE_ID 0xb966 +#define BCM56966_A0_REV_ID 1 +#define BCM56967_DEVICE_ID 0xb967 +#define BCM56967_A0_REV_ID 1 + +#define BCM56970_DEVICE_ID 0xb970 +#define BCM56970_A0_REV_ID 1 +#define BCM56970_B0_REV_ID 0x11 +#define BCM56971_DEVICE_ID 0xb971 +#define BCM56971_A0_REV_ID 1 +#define BCM56971_B0_REV_ID 0x11 +#define BCM56972_DEVICE_ID 0xb972 +#define BCM56972_A0_REV_ID 1 +#define BCM56972_B0_REV_ID 0x11 +#define BCM56974_DEVICE_ID 0xb974 +#define BCM56974_A0_REV_ID 1 +#define BCM56974_B0_REV_ID 0x11 +#define BCM56975_DEVICE_ID 0xb975 +#define BCM56975_A0_REV_ID 1 +#define BCM56975_B0_REV_ID 0x11 + +#define BCM56870_DEVICE_ID 0xb870 +#define BCM56870_A0_REV_ID 1 +#define BCM56873_DEVICE_ID 0xb873 +#define BCM56873_A0_REV_ID 1 + +#define BCM56370_DEVICE_ID 0xb370 +#define BCM56370_A0_REV_ID 1 +#define BCM56370_A1_REV_ID 0x02 +#define BCM56370_A2_REV_ID 0x03 + +#define BCM56371_DEVICE_ID 0xb371 +#define BCM56371_A0_REV_ID 1 +#define BCM56371_A1_REV_ID 0x02 +#define BCM56371_A2_REV_ID 0x03 + +#define BCM56372_DEVICE_ID 0xb372 +#define BCM56372_A0_REV_ID 1 +#define BCM56372_A1_REV_ID 0x02 +#define BCM56372_A2_REV_ID 0x03 + +#define BCM56374_DEVICE_ID 0xb374 +#define BCM56374_A0_REV_ID 1 +#define BCM56374_A1_REV_ID 0x02 +#define BCM56374_A2_REV_ID 0x03 + +#define BCM56375_DEVICE_ID 0xb375 +#define BCM56375_A0_REV_ID 1 +#define BCM56375_A1_REV_ID 0x02 +#define BCM56375_A2_REV_ID 0x03 + +#define BCM56376_DEVICE_ID 0xb376 +#define BCM56376_A0_REV_ID 1 +#define BCM56376_A1_REV_ID 0x02 +#define BCM56376_A2_REV_ID 0x03 + +#define BCM56377_DEVICE_ID 0xb377 +#define BCM56377_A0_REV_ID 1 +#define BCM56377_A1_REV_ID 0x02 +#define BCM56377_A2_REV_ID 0x03 + +#define BCM56577_DEVICE_ID 0xb577 +#define BCM56577_A0_REV_ID 1 +#define BCM56577_A1_REV_ID 0x02 +#define BCM56577_A2_REV_ID 0x03 + +#define BCM56578_DEVICE_ID 0xb578 +#define BCM56578_A0_REV_ID 1 +#define BCM56578_A1_REV_ID 0x02 +#define BCM56578_A2_REV_ID 0x03 + +#define BCM56579_DEVICE_ID 0xb579 +#define BCM56579_A0_REV_ID 1 +#define BCM56579_A1_REV_ID 0x02 +#define BCM56579_A2_REV_ID 0x03 + +#define BCM56770_DEVICE_ID 0xb770 +#define BCM56770_A0_REV_ID 1 + +#define BCM56771_DEVICE_ID 0xb771 +#define BCM56771_A0_REV_ID 1 + +#define BCM56470_DEVICE_ID 0xb470 +#define BCM56470_A0_REV_ID 1 +#define BCM56471_DEVICE_ID 0xb471 +#define BCM56471_A0_REV_ID 1 +#define BCM56472_DEVICE_ID 0xb472 +#define BCM56472_A0_REV_ID 1 +#define BCM56475_DEVICE_ID 0xb475 +#define BCM56475_A0_REV_ID 1 +#define BCM56474_DEVICE_ID 0xb474 +#define BCM56474_A0_REV_ID 1 + + +#define BCM53540_DEVICE_ID 0x8540 +#define BCM53540_A0_REV_ID 1 +#define BCM53547_DEVICE_ID 0x8547 +#define BCM53547_A0_REV_ID 1 +#define BCM53548_DEVICE_ID 0x8548 +#define BCM53548_A0_REV_ID 1 +#define BCM53549_DEVICE_ID 0x8549 +#define BCM53549_A0_REV_ID 1 + +#define BCM53642_DEVICE_ID 0x8642 +#define BCM53642_A0_REV_ID 1 + +#define BCM5665_DEVICE_ID 0x5665 +#define BCM5665_A0_REV_ID 1 +#define BCM5665_B0_REV_ID 0x11 + + +#define BCM5655_DEVICE_ID 0x5655 +#define BCM5655_A0_REV_ID 1 +#define BCM5655_B0_REV_ID 0x11 + + +#define BCM5650_DEVICE_ID 0x5650 +#define BCM5650_A0_REV_ID 1 +#define BCM5650_B0_REV_ID 0x11 +#define BCM5650_C0_REV_ID 0x21 + +#define BROADCOM_PHYID_HIGH 0x0040 + +#define ARAD_DEVICE_ID 0x8650 +#define ARAD_A0_REV_ID 0x0000 +#define ARAD_B0_REV_ID 0x0011 +#define ARAD_B1_REV_ID 0x0012 +#define BCM88770_DEVICE_ID 0x8770 +#define BCM88770_A1_REV_ID 0x0002 +#define BCM88773_DEVICE_ID 0x8773 +#define BCM88773_A1_REV_ID 0x0002 +#define BCM88774_DEVICE_ID 0x8774 +#define BCM88774_A1_REV_ID 0x0002 +#define BCM88775_DEVICE_ID 0x8775 +#define BCM88775_A1_REV_ID 0x0002 +#define BCM88776_DEVICE_ID 0x8776 +#define BCM88776_A1_REV_ID 0x0002 +#define BCM88777_DEVICE_ID 0x8777 +#define BCM88777_A1_REV_ID 0x0002 +#define BCM88950_DEVICE_ID 0x8950 +#define BCM88950_A0_REV_ID 0x0001 +#define BCM88950_A1_REV_ID 0x0002 +#define BCM88953_DEVICE_ID 0x8953 +#define BCM88953_A1_REV_ID 0x0002 +#define BCM88954_DEVICE_ID 0x8954 +#define BCM88954_A1_REV_ID 0x0002 +#define BCM88955_DEVICE_ID 0x8955 +#define BCM88955_A1_REV_ID 0x0002 +#define BCM88956_DEVICE_ID 0x8956 +#define BCM88956_A1_REV_ID 0x0002 +#define DNXC_A0_REV_ID 0x0001 +#define DNXC_A1_REV_ID 0x0002 +#define DNXC_A2_REV_ID 0x0003 +#define DNXC_B0_REV_ID 0x0011 +#define DNXC_B1_REV_ID 0x0012 +#define DNXC_B2_REV_ID 0x0013 +#define DNXC_C0_REV_ID 0x0021 +#define DNXC_C1_REV_ID 0x0022 +#define DNXC_C2_REV_ID 0x0023 +#define DNXC_D0_REV_ID 0x0031 +#define DNXC_D1_REV_ID 0x0032 +#define DNXC_DEVID_FAMILY_MASK 0xfff0 +#define BCM88790_DEVICE_ID 0x8790 +#define BCM88790_A0_REV_ID DNXC_A0_REV_ID +#define BCM88790_B0_REV_ID DNXC_B0_REV_ID +#define BCM88791_DEVICE_ID 0x8791 +#define BCM88792_DEVICE_ID 0x8792 +#define BCM88793_DEVICE_ID 0x8793 +#define BCM88794_DEVICE_ID 0x8794 +#define BCM88795_DEVICE_ID 0x8795 +#define BCM88796_DEVICE_ID 0x8796 +#define BCM88797_DEVICE_ID 0x8797 +#define BCM88798_DEVICE_ID 0x8798 +#define BCM88799_DEVICE_ID 0x8799 +#define BCM8879A_DEVICE_ID 0x879A +#define BCM8879B_DEVICE_ID 0x879B +#define BCM8879C_DEVICE_ID 0x879C +#define BCM8879D_DEVICE_ID 0x879D +#define BCM8879E_DEVICE_ID 0x879E +#define BCM8879F_DEVICE_ID 0x879F +#ifdef BCM_DNXF3_SUPPORT +#define RAMON2_DEVICE_ID 0x8910 +#define BCM8891F_DEVICE_ID 0x891F +#define RAMON3_DEVICE_ID 0x8920 +#endif +#define ARADPLUS_DEVICE_ID 0x8660 +#define ARADPLUS_A0_REV_ID 0x0001 +#define BCM88660_DEVICE_ID ARADPLUS_DEVICE_ID +#define BCM88660_A0_REV_ID ARADPLUS_A0_REV_ID +#define JERICHO_DEVICE_ID 0x8675 +#define JERICHO_A0_REV_ID 0x0001 +#define JERICHO_B0_REV_ID 0x0011 +#define JERICHO_A1_REV_ID 0x0002 +#define BCM88670_DEVICE_ID 0x8670 +#define BCM88670_A0_REV_ID JERICHO_A0_REV_ID +#define BCM88670_A1_REV_ID JERICHO_A1_REV_ID +#define BCM88671_DEVICE_ID 0x8671 +#define BCM88671_A0_REV_ID JERICHO_A0_REV_ID +#define BCM88671_A1_REV_ID JERICHO_A1_REV_ID +#define BCM88671M_DEVICE_ID 0x867A +#define BCM88671M_A0_REV_ID JERICHO_A0_REV_ID +#define BCM88671M_A1_REV_ID JERICHO_A1_REV_ID + +#define BCM88670_B0_REV_ID JERICHO_B0_REV_ID +#define BCM88671_B0_REV_ID JERICHO_B0_REV_ID +#define BCM88671M_B0_REV_ID JERICHO_B0_REV_ID + +#define BCM88672_DEVICE_ID 0x8672 +#define BCM88672_A0_REV_ID JERICHO_A0_REV_ID +#define BCM88672_A1_REV_ID JERICHO_A1_REV_ID + +#define BCM88672_B0_REV_ID JERICHO_B0_REV_ID + +#define BCM88673_DEVICE_ID 0x8673 +#define BCM88673_A0_REV_ID JERICHO_A0_REV_ID +#define BCM88673_A1_REV_ID JERICHO_A1_REV_ID +#define BCM88674_DEVICE_ID 0x8674 +#define BCM88674_A0_REV_ID JERICHO_A0_REV_ID +#define BCM88674_A1_REV_ID JERICHO_A1_REV_ID +#define BCM88675_DEVICE_ID JERICHO_DEVICE_ID +#define BCM88675_A0_REV_ID JERICHO_A0_REV_ID +#define BCM88675_A1_REV_ID JERICHO_A1_REV_ID +#define BCM88675M_DEVICE_ID 0x867B +#define BCM88675M_A0_REV_ID JERICHO_A0_REV_ID +#define BCM88675M_A1_REV_ID JERICHO_A1_REV_ID +#define BCM88676_DEVICE_ID 0x8676 +#define BCM88676_A0_REV_ID JERICHO_A0_REV_ID +#define BCM88676_A1_REV_ID JERICHO_A1_REV_ID +#define BCM88676M_DEVICE_ID 0x867C +#define BCM88676M_A0_REV_ID JERICHO_A0_REV_ID +#define BCM88676M_A1_REV_ID JERICHO_A1_REV_ID +#define BCM88677_DEVICE_ID 0x8677 +#define BCM88677_A0_REV_ID JERICHO_A0_REV_ID +#define BCM88677_A1_REV_ID JERICHO_A1_REV_ID +#define BCM88678_DEVICE_ID 0x8678 +#define BCM88678_A0_REV_ID JERICHO_A0_REV_ID +#define BCM88678_A1_REV_ID JERICHO_A1_REV_ID +#define BCM88679_DEVICE_ID 0x8679 +#define BCM88679_A0_REV_ID JERICHO_A0_REV_ID +#define BCM88679_A1_REV_ID JERICHO_A1_REV_ID + +#define BCM88673_B0_REV_ID JERICHO_B0_REV_ID +#define BCM88674_B0_REV_ID JERICHO_B0_REV_ID +#define BCM88675_B0_REV_ID JERICHO_B0_REV_ID +#define BCM88675M_B0_REV_ID JERICHO_B0_REV_ID +#define BCM88676_B0_REV_ID JERICHO_B0_REV_ID +#define BCM88676M_B0_REV_ID JERICHO_B0_REV_ID +#define BCM88677_B0_REV_ID JERICHO_B0_REV_ID +#define BCM88678_B0_REV_ID JERICHO_B0_REV_ID +#define BCM88679_B0_REV_ID JERICHO_B0_REV_ID +#define QMX_DEVICE_ID 0x8375 +#define QMX_A0_REV_ID 0x0001 +#define QMX_B0_REV_ID 0x0011 +#define QMX_A1_REV_ID 0x0002 +#define BCM88370_DEVICE_ID 0x8370 +#define BCM88370_A0_REV_ID QMX_A0_REV_ID +#define BCM88370_A1_REV_ID QMX_A1_REV_ID +#define BCM88371_DEVICE_ID 0x8371 +#define BCM88371_A0_REV_ID QMX_A0_REV_ID +#define BCM88371_A1_REV_ID QMX_A1_REV_ID +#define BCM88371M_DEVICE_ID 0x837A +#define BCM88371M_A0_REV_ID QMX_A0_REV_ID +#define BCM88371M_A1_REV_ID QMX_A1_REV_ID +#define BCM88375_DEVICE_ID QMX_DEVICE_ID +#define BCM88375_A0_REV_ID QMX_A0_REV_ID +#define BCM88375_A1_REV_ID QMX_A1_REV_ID +#define BCM88376_DEVICE_ID 0x8376 +#define BCM88376_A0_REV_ID QMX_A0_REV_ID +#define BCM88376_A1_REV_ID QMX_A1_REV_ID +#define BCM88376M_DEVICE_ID 0x837B +#define BCM88376M_A0_REV_ID QMX_A0_REV_ID +#define BCM88376M_A1_REV_ID QMX_A1_REV_ID +#define BCM88377_DEVICE_ID 0x8377 +#define BCM88377_A0_REV_ID QMX_A0_REV_ID +#define BCM88377_A1_REV_ID QMX_A1_REV_ID +#define BCM88378_DEVICE_ID 0x8378 +#define BCM88378_A0_REV_ID QMX_A0_REV_ID +#define BCM88378_A1_REV_ID QMX_A1_REV_ID +#define BCM88379_DEVICE_ID 0x8379 +#define BCM88379_A0_REV_ID QMX_A0_REV_ID +#define BCM88379_A1_REV_ID QMX_A1_REV_ID + +#define BCM88370_B0_REV_ID QMX_B0_REV_ID +#define BCM88371_B0_REV_ID QMX_B0_REV_ID +#define BCM88371M_B0_REV_ID QMX_B0_REV_ID +#define BCM88375_B0_REV_ID QMX_B0_REV_ID +#define BCM88376_B0_REV_ID QMX_B0_REV_ID +#define BCM88376M_B0_REV_ID QMX_B0_REV_ID +#define BCM88377_B0_REV_ID QMX_B0_REV_ID +#define BCM88378_B0_REV_ID QMX_B0_REV_ID +#define BCM88379_B0_REV_ID QMX_B0_REV_ID + + +#define JERICHO_PLUS_DEVICE_ID 0x8680 +#define JERICHO_PLUS_A0_REV_ID 0x0001 +#define BCM88680_DEVICE_ID JERICHO_PLUS_DEVICE_ID +#define BCM88680_A0_REV_ID JERICHO_PLUS_A0_REV_ID +#define BCM88680_A1_REV_ID 0x0002 + + +#define BCM88681_DEVICE_ID 0x8681 +#define BCM88681_A0_REV_ID JERICHO_PLUS_A0_REV_ID + +#define BCM88682_DEVICE_ID 0x8682 +#define BCM88682_A0_REV_ID JERICHO_PLUS_A0_REV_ID + +#define BCM88683_DEVICE_ID 0x8683 +#define BCM88683_A0_REV_ID JERICHO_PLUS_A0_REV_ID + +#define BCM88684_DEVICE_ID 0x8684 +#define BCM88684_A0_REV_ID JERICHO_PLUS_A0_REV_ID + +#define BCM88685_DEVICE_ID 0x8685 +#define BCM88685_A0_REV_ID JERICHO_PLUS_A0_REV_ID + +#define BCM88687_DEVICE_ID 0x8687 +#define BCM88687_A0_REV_ID JERICHO_PLUS_A0_REV_ID + +#define BCM88380_DEVICE_ID 0x8380 +#define BCM88380_A0_REV_ID JERICHO_PLUS_A0_REV_ID +#define BCM88381_DEVICE_ID 0x8381 +#define BCM88381_A0_REV_ID JERICHO_PLUS_A0_REV_ID + +#define JERICHO2_DEVICE_ID 0x8690 +#define JERICHO2_A0_REV_ID DNXC_A0_REV_ID +#define JERICHO2_B0_REV_ID DNXC_B0_REV_ID +#define JERICHO2_B1_REV_ID DNXC_B1_REV_ID +#define BCM88690_DEVICE_ID JERICHO2_DEVICE_ID +#define BCM88690_A0_REV_ID JERICHO2_A0_REV_ID +#define BCM88690_B0_REV_ID JERICHO2_B0_REV_ID +#define BCM88690_B1_REV_ID JERICHO2_B1_REV_ID +#define BCM88691_DEVICE_ID 0x8691 +#define BCM88692_DEVICE_ID 0x8692 +#define BCM88693_DEVICE_ID 0x8693 +#define BCM88694_DEVICE_ID 0x8694 +#define BCM88695_DEVICE_ID 0x8695 +#define BCM88696_DEVICE_ID 0x8696 +#define BCM88697_DEVICE_ID 0x8697 +#define BCM88698_DEVICE_ID 0x8698 +#define BCM88699_DEVICE_ID 0x8699 +#define BCM8869A_DEVICE_ID 0x869A +#define BCM8869B_DEVICE_ID 0x869B +#define BCM8869C_DEVICE_ID 0x869C +#define BCM8869D_DEVICE_ID 0x869D +#define BCM8869E_DEVICE_ID 0x869E +#define BCM8869F_DEVICE_ID 0x869F + +#define J2C_DEVICE_ID 0x8800 +#define J2C_2ND_DEVICE_ID 0x8820 +#define J2C_DEVID_FAMILY_MASK 0xffd0 +#define J2C_A0_REV_ID DNXC_A0_REV_ID +#define J2C_A1_REV_ID DNXC_A1_REV_ID +#define BCM88800_DEVICE_ID J2C_DEVICE_ID +#define BCM88820_DEVICE_ID J2C_2ND_DEVICE_ID +#define BCM88800_A0_REV_ID J2C_A0_REV_ID +#define BCM88800_A1_REV_ID J2C_A1_REV_ID +#define BCM88801_DEVICE_ID 0x8801 +#define BCM88802_DEVICE_ID 0x8802 +#define BCM88803_DEVICE_ID 0x8803 +#define BCM88804_DEVICE_ID 0x8804 +#define BCM88805_DEVICE_ID 0x8805 +#define BCM88806_DEVICE_ID 0x8806 +#define BCM88807_DEVICE_ID 0x8807 +#define BCM88808_DEVICE_ID 0x8808 +#define BCM88809_DEVICE_ID 0x8809 +#define BCM8880A_DEVICE_ID 0x880A +#define BCM8880B_DEVICE_ID 0x880B +#define BCM8880C_DEVICE_ID 0x880C +#define BCM8880D_DEVICE_ID 0x880D +#define BCM8880E_DEVICE_ID 0x880E +#define BCM8880F_DEVICE_ID 0x880F +#define BCM88821_DEVICE_ID 0x8821 +#define BCM88822_DEVICE_ID 0x8822 +#define BCM88823_DEVICE_ID 0x8823 +#define BCM88824_DEVICE_ID 0x8824 +#define BCM88825_DEVICE_ID 0x8825 +#define BCM88826_DEVICE_ID 0x8826 +#define BCM88827_DEVICE_ID 0x8827 +#define BCM88828_DEVICE_ID 0x8828 +#define BCM88829_DEVICE_ID 0x8829 +#define BCM8882A_DEVICE_ID 0x882A +#define BCM8882B_DEVICE_ID 0x882B +#define BCM8882C_DEVICE_ID 0x882C +#define BCM8882D_DEVICE_ID 0x882D +#define BCM8882E_DEVICE_ID 0x882E +#define BCM8882F_DEVICE_ID 0x882F + +#define J2P_DEVICE_ID 0x8850 +#define J2P_A0_REV_ID DNXC_A0_REV_ID +#define J2P_A1_REV_ID DNXC_A1_REV_ID +#define J2P_A2_REV_ID DNXC_A2_REV_ID +#define BCM88850_DEVICE_ID J2P_DEVICE_ID +#define BCM88850_A0_REV_ID J2P_A0_REV_ID +#define BCM88850_A1_REV_ID J2P_A1_REV_ID +#define BCM88850_A2_REV_ID J2P_A2_REV_ID +#define BCM88851_DEVICE_ID 0x8851 +#define BCM88852_DEVICE_ID 0x8852 +#define BCM88853_DEVICE_ID 0x8853 +#define BCM88854_DEVICE_ID 0x8854 +#define BCM88855_DEVICE_ID 0x8855 +#define BCM88856_DEVICE_ID 0x8856 +#define BCM88857_DEVICE_ID 0x8857 +#define BCM88858_DEVICE_ID 0x8858 +#define BCM88859_DEVICE_ID 0x8859 +#define BCM8885A_DEVICE_ID 0x885A +#define BCM8885B_DEVICE_ID 0x885B +#define BCM8885C_DEVICE_ID 0x885C +#define BCM8885D_DEVICE_ID 0x885D +#define BCM8885E_DEVICE_ID 0x885E +#define BCM8885F_DEVICE_ID 0x885F + +#define BCM88840_DEVICE_ID 0x8840 +#define BCM88841_DEVICE_ID 0x8841 +#define BCM88842_DEVICE_ID 0x8842 +#define BCM88843_DEVICE_ID 0x8843 +#define BCM88844_DEVICE_ID 0x8844 +#define BCM88845_DEVICE_ID 0x8845 +#define BCM88846_DEVICE_ID 0x8846 +#define BCM88847_DEVICE_ID 0x8847 +#define BCM88848_DEVICE_ID 0x8848 +#define BCM88849_DEVICE_ID 0x8849 +#define BCM8884A_DEVICE_ID 0x884A +#define BCM8884B_DEVICE_ID 0x884B +#define BCM8884C_DEVICE_ID 0x884C +#define BCM8884D_DEVICE_ID 0x884D +#define BCM8884E_DEVICE_ID 0x884E +#define BCM8884F_DEVICE_ID 0x884F + +#define BCM88810_DEVICE_ID 0x8810 +#define BCM88811_DEVICE_ID 0x8811 +#define BCM88812_DEVICE_ID 0x8812 +#define BCM88813_DEVICE_ID 0x8813 +#define BCM88814_DEVICE_ID 0x8814 +#define BCM88815_DEVICE_ID 0x8815 +#define BCM88816_DEVICE_ID 0x8816 +#define BCM88817_DEVICE_ID 0x8817 +#define BCM88818_DEVICE_ID 0x8818 +#define BCM88819_DEVICE_ID 0x8819 +#define BCM8881A_DEVICE_ID 0x881A +#define BCM8881B_DEVICE_ID 0x881B +#define BCM8881C_DEVICE_ID 0x881C +#define BCM8881D_DEVICE_ID 0x881D +#define BCM8881E_DEVICE_ID 0x881E +#define BCM8881F_DEVICE_ID 0x881F + +#define J2X_DEVICE_ID 0x8830 +#define J2X_A0_REV_ID DNXC_A0_REV_ID +#define BCM88830_DEVICE_ID J2X_DEVICE_ID +#define BCM88830_A0_REV_ID J2X_A0_REV_ID +#define BCM88831_DEVICE_ID 0x8831 +#define BCM88832_DEVICE_ID 0x8832 +#define BCM88833_DEVICE_ID 0x8833 +#define BCM88834_DEVICE_ID 0x8834 +#define BCM88835_DEVICE_ID 0x8835 +#define BCM88836_DEVICE_ID 0x8836 +#define BCM88837_DEVICE_ID 0x8837 +#define BCM88838_DEVICE_ID 0x8838 +#define BCM88839_DEVICE_ID 0x8839 +#define BCM8883A_DEVICE_ID 0x883A +#define BCM8883B_DEVICE_ID 0x883B +#define BCM8883C_DEVICE_ID 0x883C +#define BCM8883D_DEVICE_ID 0x883D +#define BCM8883E_DEVICE_ID 0x883E +#define BCM8883F_DEVICE_ID 0x883F + +#define J2Z_DEVICE_ID 0x216 +#define J2Z_A0_REV_ID DNXC_A0_REV_ID +#define BCM8216_DEVICE_ID J2Z_DEVICE_ID +#define BCM8216_A0_REV_ID J2Z_A0_REV_ID + +#ifdef BCM_DNX3_SUPPORT +#define JERICHO3_DEVICE_ID 0x8860 +#define Q3_DEVICE_ID_START 0x886a +#define Q3_DEVICE_ID_END 0x886f +#define J3AI_DEVICE_ID 0x8890 +#define Q3D_DEVICE_ID 0x8870 +#ifdef BCM_Q3A_SUPPORT +#define Q3A_DEVICE_ID 0x8490 +#define Q3U_DEVICE_ID 0x84A0 +#define Q3N_DEVICE_ID 0x84A5 +#define Q3U_ORIG_DEVICE_ID 0x8400 +#define Q3N_ORIG_DEVICE_ID 0x8405 +#endif +#endif +#define Q2A_DEVICE_ID 0x8480 +#define Q2A_A0_REV_ID DNXC_A0_REV_ID +#define Q2A_B0_REV_ID DNXC_B0_REV_ID +#define Q2A_B1_REV_ID DNXC_B1_REV_ID +#define BCM88480_DEVICE_ID Q2A_DEVICE_ID +#define BCM88480_A0_REV_ID Q2A_A0_REV_ID +#define BCM88480_B0_REV_ID Q2A_B0_REV_ID +#define BCM88480_B1_REV_ID Q2A_B1_REV_ID +#define BCM88481_DEVICE_ID 0x8481 +#define BCM88482_DEVICE_ID 0x8482 +#define BCM88483_DEVICE_ID 0x8483 +#define BCM88484_DEVICE_ID 0x8484 +#define BCM88485_DEVICE_ID 0x8485 +#define BCM88486_DEVICE_ID 0x8486 +#define BCM88487_DEVICE_ID 0x8487 +#define BCM88488_DEVICE_ID 0x8488 +#define BCM88489_DEVICE_ID 0x8489 +#define BCM8848A_DEVICE_ID 0x848A +#define BCM8848B_DEVICE_ID 0x848B +#define BCM8848C_DEVICE_ID 0x848C +#define BCM8848D_DEVICE_ID 0x848D +#define BCM8848E_DEVICE_ID 0x848E +#define BCM8848F_DEVICE_ID 0x848F + +#define Q2U_DEVICE_ID 0x8280 +#define BCM88280_DEVICE_ID Q2U_DEVICE_ID +#define BCM88281_DEVICE_ID 0x8281 +#define BCM88282_DEVICE_ID 0x8282 +#define BCM88283_DEVICE_ID 0x8283 +#define BCM88284_DEVICE_ID 0x8284 +#define BCM88285_DEVICE_ID 0x8285 +#define BCM88286_DEVICE_ID 0x8286 +#define BCM88287_DEVICE_ID 0x8287 +#define BCM88288_DEVICE_ID 0x8288 +#define BCM88289_DEVICE_ID 0x8289 +#define BCM8828A_DEVICE_ID 0x828A +#define BCM8828B_DEVICE_ID 0x828B +#define BCM8828C_DEVICE_ID 0x828C +#define BCM8828D_DEVICE_ID 0x828D +#define BCM8828E_DEVICE_ID 0x828E +#define BCM8828F_DEVICE_ID 0x828F + +#define Q2N_DEVICE_ID 0x8290 +#define BCM88290_DEVICE_ID Q2N_DEVICE_ID +#define BCM88291_DEVICE_ID 0x8291 +#define BCM88292_DEVICE_ID 0x8292 +#define BCM88293_DEVICE_ID 0x8293 +#define BCM88294_DEVICE_ID 0x8294 +#define BCM88295_DEVICE_ID 0x8295 +#define BCM88296_DEVICE_ID 0x8296 +#define BCM88297_DEVICE_ID 0x8297 +#define BCM88298_DEVICE_ID 0x8298 +#define BCM88299_DEVICE_ID 0x8299 +#define BCM8829A_DEVICE_ID 0x829A +#define BCM8829B_DEVICE_ID 0x829B +#define BCM8829C_DEVICE_ID 0x829C +#define BCM8829D_DEVICE_ID 0x829D +#define BCM8829E_DEVICE_ID 0x829E +#define BCM8829F_DEVICE_ID 0x829F + +#define QAX_DEVICE_ID 0x8470 +#define QAX_A0_REV_ID 0x0001 +#define QAX_B0_REV_ID 0x0011 +#define BCM88470_DEVICE_ID QAX_DEVICE_ID +#define BCM88470_B0_REV_ID QAX_B0_REV_ID +#define BCM88470P_DEVICE_ID 0x847C +#define BCM88471_DEVICE_ID 0x8471 +#define BCM88473_DEVICE_ID 0x8473 +#define BCM88474_DEVICE_ID 0x8474 +#define BCM88474H_DEVICE_ID 0x847B +#define BCM88476_DEVICE_ID 0x8476 +#define BCM88477_DEVICE_ID 0x8477 + +#define BCM88479_DEVICE_ID 0x8479 + + + +#define BCM88470_A0_REV_ID QAX_A0_REV_ID + +#define QUX_DEVICE_ID 0x8270 +#define QUX_A0_REV_ID 0x0001 +#define QUX_A1_REV_ID 0x0002 +#define QUX_B0_REV_ID 0x0011 +#define BCM88270_DEVICE_ID QUX_DEVICE_ID +#define BCM88270_A0_REV_ID QUX_A0_REV_ID +#define BCM88270_A1_REV_ID QUX_A1_REV_ID +#define BCM88271_DEVICE_ID 0x8271 +#define BCM88272_DEVICE_ID 0x8272 +#define BCM88273_DEVICE_ID 0x8273 +#define BCM88274_DEVICE_ID 0x8274 +#define BCM88276_DEVICE_ID 0x8276 +#define BCM88278_DEVICE_ID 0x8278 +#define BCM88279_DEVICE_ID 0x8279 + +#define BCM88360_DEVICE_ID 0x8360 +#define BCM88360_A0_REV_ID ARADPLUS_A0_REV_ID +#define BCM88361_DEVICE_ID 0x8361 +#define BCM88361_A0_REV_ID ARADPLUS_A0_REV_ID +#define BCM88363_DEVICE_ID 0x8363 +#define BCM88363_A0_REV_ID ARADPLUS_A0_REV_ID +#define BCM88460_DEVICE_ID 0x8460 +#define BCM88460_A0_REV_ID ARADPLUS_A0_REV_ID +#define BCM88461_DEVICE_ID 0x8461 +#define BCM88461_A0_REV_ID ARADPLUS_A0_REV_ID +#define BCM88560_DEVICE_ID 0x8560 +#define BCM88560_A0_REV_ID ARADPLUS_A0_REV_ID +#define BCM88561_DEVICE_ID 0x8561 +#define BCM88561_A0_REV_ID ARADPLUS_A0_REV_ID +#define BCM88562_DEVICE_ID 0x8562 +#define BCM88562_A0_REV_ID ARADPLUS_A0_REV_ID +#define BCM88661_DEVICE_ID 0x8661 +#define BCM88661_A0_REV_ID ARADPLUS_A0_REV_ID +#define BCM88664_DEVICE_ID 0x8664 +#define BCM88664_A0_REV_ID ARADPLUS_A0_REV_ID + + +#define BCM88350_DEVICE_ID 0x8350 +#define BCM88350_B1_REV_ID ARAD_B1_REV_ID +#define BCM88351_DEVICE_ID 0x8351 +#define BCM88351_B1_REV_ID ARAD_B1_REV_ID +#define BCM88450_DEVICE_ID 0x8450 +#define BCM88450_B1_REV_ID ARAD_B1_REV_ID +#define BCM88451_DEVICE_ID 0x8451 +#define BCM88451_B1_REV_ID ARAD_B1_REV_ID +#define BCM88550_DEVICE_ID 0x8550 +#define BCM88550_B1_REV_ID ARAD_B0_REV_ID +#define BCM88551_DEVICE_ID 0x8551 +#define BCM88551_B1_REV_ID ARAD_B1_REV_ID +#define BCM88552_DEVICE_ID 0x8552 +#define BCM88552_B1_REV_ID ARAD_B1_REV_ID + +#define BCM88772_DEVICE_ID 0x8772 +#define BCM88952_DEVICE_ID 0x8952 +#define BCM88772_A1_REV_ID 0x0002 +#define BCM88952_A0_REV_ID 0x0001 +#define BCM88952_A1_REV_ID 0x0002 + +#define PLX9056_DEVICE_ID 0x9056 + +#define BCM56890_DEVICE_ID 0xb890 +#define BCM56890_A0_REV_ID 0x0001 +#define BCM56891_DEVICE_ID 0xb891 +#define BCM56891_A0_REV_ID 0x0001 +#define BCM56892_DEVICE_ID 0xb892 +#define BCM56892_A0_REV_ID 0x0001 +#define BCM56895_DEVICE_ID 0xb895 +#define BCM56895_A0_REV_ID 0x0001 +#define BCM56896_DEVICE_ID 0xb896 +#define BCM56896_A0_REV_ID 0x0001 + +#define BCM56690_DEVICE_ID 0xb690 +#define BCM56690_A0_REV_ID 0x0001 +#define BCM56692_DEVICE_ID 0xb692 +#define BCM56692_A0_REV_ID 0x0001 + +#define BCM78800_DEVICE_ID 0xf800 +#define BCM78800_A0_REV_ID 0x0001 +#define BCM78808_DEVICE_ID 0xf808 +#define BCM78808_A0_REV_ID 0x0001 + +#define BCM56880_DEVICE_ID 0xb880 +#define BCM56880_A0_REV_ID 0x0001 +#define BCM56880_B0_REV_ID 0x0011 +#define BCM56881_DEVICE_ID 0xb881 +#define BCM56881_A0_REV_ID 0x0001 +#define BCM56881_B0_REV_ID 0x0011 +#define BCM56883_DEVICE_ID 0xb883 +#define BCM56883_A0_REV_ID 0x0001 +#define BCM56883_B0_REV_ID 0x0011 + +#define BCM56780_DEVICE_ID 0xb780 +#define BCM56780_A0_REV_ID 0x0001 +#define BCM56782_DEVICE_ID 0xb782 +#define BCM56782_A0_REV_ID 0x0001 +#define BCM56782_A1_REV_ID 0x0002 +#define BCM56784_DEVICE_ID 0xb784 +#define BCM56784_A0_REV_ID 0x0001 +#define BCM56785_DEVICE_ID 0xb785 +#define BCM56785_A0_REV_ID 0x0001 +#define BCM56786_DEVICE_ID 0xb786 +#define BCM56786_A0_REV_ID 0x0001 +#define BCM56786_A1_REV_ID 0x0002 +#define BCM56787_DEVICE_ID 0xb787 +#define BCM56787_A0_REV_ID 0x0001 +#define BCM56787_A1_REV_ID 0x0002 +#define BCM56788_DEVICE_ID 0xb788 +#define BCM56788_A0_REV_ID 0x0001 +#define BCM56788_A1_REV_ID 0x0002 +#define BCM56789_DEVICE_ID 0xb789 +#define BCM56789_A0_REV_ID 0x0001 +#define BCM56089_DEVICE_ID 0xb089 +#define BCM56089_A0_REV_ID 0x0001 +#define BCM56089_A1_REV_ID 0x0002 + +#define BCM56990_DEVICE_ID 0xb990 +#define BCM56990_A0_REV_ID 0x0001 + +#ifndef BCM56990_DEVICE_ID +#define BCM56990_DEVICE_ID 0xb990 +#define BCM56990_A0_REV_ID 0x0001 +#endif +#define BCM56990_B0_REV_ID 0x0011 +#define BCM56991_DEVICE_ID 0xb991 +#define BCM56991_B0_REV_ID 0x0011 +#define BCM56992_DEVICE_ID 0xb992 +#define BCM56992_B0_REV_ID 0x0011 +#define BCM56993_DEVICE_ID 0xb993 +#define BCM56993_B0_REV_ID 0x0011 + +#define BCM56996_DEVICE_ID 0xb996 +#define BCM56996_A0_REV_ID 0x0001 +#define BCM56997_DEVICE_ID 0xb997 +#define BCM56997_A0_REV_ID 0x0001 + +#ifndef BCM56996_DEVICE_ID +#define BCM56996_DEVICE_ID 0xb996 +#define BCM56996_A0_REV_ID 0x0001 +#define BCM56997_DEVICE_ID 0xb997 +#endif +#define BCM56996_B0_REV_ID 0x0011 +#define BCM56997_B0_REV_ID 0x0011 + +#define BCM56998_DEVICE_ID 0xb998 +#define BCM56998_A0_REV_ID 0x0001 + +#define BCM56999_DEVICE_ID 0xb999 +#define BCM56999_A0_REV_ID 0x0001 +#define BCM56999_B0_REV_ID 0x0011 +#define BCM56995_DEVICE_ID 0xb995 +#define BCM56995_A0_REV_ID 0x0001 +#define BCM56995_B0_REV_ID 0x0011 + +#define BCM78900_DEVICE_ID 0xf900 +#define BCM78900_B0_REV_ID 0x0011 +#define BCM78902_DEVICE_ID 0xf902 +#define BCM78902_B0_REV_ID 0x0011 +#define BCM78903_DEVICE_ID 0xf903 +#define BCM78903_B0_REV_ID 0x0011 + +#define BCM78905_DEVICE_ID 0xf905 +#define BCM78905_A0_REV_ID 0x0001 + +#define BCM78907_DEVICE_ID 0xf907 +#define BCM78907_A0_REV_ID 0x0001 + +#define BCM56080_DEVICE_ID 0xb080 +#define BCM56080_A0_REV_ID 0x0001 +#define BCM56080_A1_REV_ID 0x0002 +#define BCM56081_DEVICE_ID 0xb081 +#define BCM56081_A0_REV_ID 0x0001 +#define BCM56081_A1_REV_ID 0x0002 +#define BCM56082_DEVICE_ID 0xb082 +#define BCM56082_A0_REV_ID 0x0001 +#define BCM56082_A1_REV_ID 0x0002 +#define BCM56083_DEVICE_ID 0xb083 +#define BCM56083_A0_REV_ID 0x0001 +#define BCM56083_A1_REV_ID 0x0002 +#define BCM56084_DEVICE_ID 0xb084 +#define BCM56084_A0_REV_ID 0x0001 +#define BCM56084_A1_REV_ID 0x0002 +#define BCM56085_DEVICE_ID 0xb085 +#define BCM56085_A0_REV_ID 0x0001 +#define BCM56085_A1_REV_ID 0x0002 + +#endif diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/drv.h b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/include/soc/drv.h similarity index 95% rename from platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/drv.h rename to platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/include/soc/drv.h index 239db604779..4971666577e 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/drv.h +++ b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/include/soc/drv.h @@ -1,7 +1,6 @@ /* * $Id:$ - * - * $Copyright: 2017-2025 Broadcom Inc. All rights reserved. + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/enet.h b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/include/soc/enet.h similarity index 94% rename from platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/enet.h rename to platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/include/soc/enet.h index c74d115d5b5..849c7e7f80e 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/enet.h +++ b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/include/soc/enet.h @@ -1,7 +1,6 @@ /* * $Id:$ - * - * $Copyright: 2017-2025 Broadcom Inc. All rights reserved. + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/higig.h b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/include/soc/higig.h similarity index 99% rename from platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/higig.h rename to platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/include/soc/higig.h index 6d3cceac6ed..d9c096c3bd1 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/higig.h +++ b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/include/soc/higig.h @@ -1,7 +1,6 @@ /* * $Id: higig.h,v 1.29 Broadcom SDK $ - * - * $Copyright: 2017-2025 Broadcom Inc. All rights reserved. + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/maxdef.h b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/include/soc/maxdef.h similarity index 94% rename from platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/maxdef.h rename to platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/include/soc/maxdef.h index c74d115d5b5..849c7e7f80e 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/maxdef.h +++ b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/include/soc/maxdef.h @@ -1,7 +1,6 @@ /* * $Id:$ - * - * $Copyright: 2017-2025 Broadcom Inc. All rights reserved. + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. diff --git a/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/include/soc/rx.h b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/include/soc/rx.h new file mode 100644 index 00000000000..fa11ab3c5ee --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/include/soc/rx.h @@ -0,0 +1,270 @@ +/* + * $Id: rx.h,v 1.16 Broadcom SDK $ + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * + */ + +#ifndef _SOC_RX_H +#define _SOC_RX_H + +#include + +#include + +/* + * PKT RX Packet Reasons; reason CPU received the packet. + * Notes: + * It is possible no reasons are set (directed to CPU from ARL + * for example), or multiple reasons may be set. + * + * See "include/shared/rx.h" for full description. + */ + +typedef enum soc_rx_reason_e { + socRxReasonInvalid = _SHR_RX_INVALID, + socRxReasonArp = _SHR_RX_ARP, + socRxReasonBpdu = _SHR_RX_BPDU, + socRxReasonBroadcast = _SHR_RX_BROADCAST, + socRxReasonClassBasedMove = _SHR_RX_CLASS_BASED_MOVE, + socRxReasonClassTagPackets = _SHR_RX_CLASS_TAG_PACKETS, + socRxReasonControl = _SHR_RX_CONTROL, + socRxReasonCpuLearn = _SHR_RX_CPU_LEARN, + socRxReasonDestLookupFail = _SHR_RX_DEST_LOOKUP_FAIL, + socRxReasonDhcp = _SHR_RX_DHCP, + socRxReasonDosAttack = _SHR_RX_DOS_ATTACK, + socRxReasonE2eHolIbp = _SHR_RX_E2E_HOL_IBP, + socRxReasonEncapHigigError = _SHR_RX_ENCAP_HIGIG_ERROR, + socRxReasonFilterMatch = _SHR_RX_FILTER_MATCH, + socRxReasonGreChecksum = _SHR_RX_GRE_CHECKSUM, + socRxReasonGreSourceRoute = _SHR_RX_GRE_SOURCE_ROUTE, + socRxReasonHigigControl = _SHR_RX_HIGIG_CONTROL, + socRxReasonHigigHdrError = _SHR_RX_HIGIG_HDR_ERROR, + socRxReasonIcmpRedirect = _SHR_RX_ICMP_REDIRECT, + socRxReasonIgmp = _SHR_RX_IGMP, + socRxReasonIngressFilter = _SHR_RX_INGRESS_FILTER, + socRxReasonIp = _SHR_RX_IP, + socRxReasonIpfixRateViolation = _SHR_RX_IPFIX_RATE_VIOLATION, + socRxReasonIpMcastMiss = _SHR_RX_IP_MCAST_MISS, + socRxReasonIpmcReserved = _SHR_RX_IPMC_RSVD, + socRxReasonIpOptionVersion = _SHR_RX_IP_OPTION_VERSION, + socRxReasonIpmc = _SHR_RX_IPMC, + socRxReasonL2Cpu = _SHR_RX_L2_CPU, + socRxReasonL2DestMiss = _SHR_RX_L2_DEST_MISS, + socRxReasonL2LearnLimit = _SHR_RX_L2_LEARN_LIMIT, + socRxReasonL2Move = _SHR_RX_L2_MOVE, + socRxReasonL2MtuFail = _SHR_RX_L2_MTU_FAIL, + socRxReasonL2NonUnicastMiss = _SHR_RX_L2_NON_UNICAST_MISS, + socRxReasonL2SourceMiss = _SHR_RX_L2_SOURCE_MISS, + socRxReasonL3AddrBindFail = _SHR_RX_L3_ADDR_BIND_FAIL, + socRxReasonL3DestMiss = _SHR_RX_L3_DEST_MISS, + socRxReasonL3HeaderError = _SHR_RX_L3_HEADER_ERROR, + socRxReasonL3MtuFail = _SHR_RX_L3_MTU_FAIL, + socRxReasonL3Slowpath = _SHR_RX_L3_SLOW_PATH, + socRxReasonL3SourceMiss = _SHR_RX_L3_SOURCE_MISS, + socRxReasonL3SourceMove = _SHR_RX_L3_SOUCE_MOVE, + socRxReasonMartianAddr = _SHR_RX_MARTIAN_ADDR, + socRxReasonMcastIdxError = _SHR_RX_MCAST_IDX_ERROR, + socRxReasonMcastMiss = _SHR_RX_MCAST_MISS, + socRxReasonMimServiceError = _SHR_RX_MIM_SERVICE_ERROR, + socRxReasonMplsCtrlWordError = _SHR_RX_MPLS_CTRL_WORD_ERROR, + socRxReasonMplsError = _SHR_RX_MPLS_ERROR, + socRxReasonMplsInvalidAction = _SHR_RX_MPLS_INVALID_ACTION, + socRxReasonMplsInvalidPayload = _SHR_RX_MPLS_INVALID_PAYLOAD, + socRxReasonMplsLabelMiss = _SHR_RX_MPLS_LABEL_MISS, + socRxReasonMplsSequenceNumber = _SHR_RX_MPLS_SEQUENCE_NUMBER, + socRxReasonMplsTtl = _SHR_RX_MPLS_TTL, + socRxReasonMulticast = _SHR_RX_MULTICAST, + socRxReasonNhop = _SHR_RX_NHOP, + socRxReasonOAMError = _SHR_RX_OAM_ERROR, + socRxReasonOAMSlowpath = _SHR_RX_OAM_SLOW_PATH, + socRxReasonOAMLMDM = _SHR_RX_OAM_LMDM, + socRxReasonParityError = _SHR_RX_PARITY_ERROR, + socRxReasonProtocol = _SHR_RX_PROTOCOL, + socRxReasonSampleDest = _SHR_RX_SAMPLE_DEST, + socRxReasonSampleSource = _SHR_RX_SAMPLE_SOURCE, + socRxReasonSharedVlanMismatch = _SHR_RX_SHARED_VLAN_MISMATCH, + socRxReasonSourceRoute = _SHR_RX_SOURCE_ROUTE, + socRxReasonTimeStamp = _SHR_RX_TIME_STAMP, + socRxReasonTtl = _SHR_RX_TTL, + socRxReasonTtl1 = _SHR_RX_TTL1, + socRxReasonTunnelError = _SHR_RX_TUNNEL_ERROR, + socRxReasonUdpChecksum = _SHR_RX_UDP_CHECKSUM, + socRxReasonUnknownVlan = _SHR_RX_UNKNOWN_VLAN, + socRxReasonUrpfFail = _SHR_RX_URPF_FAIL, + socRxReasonVcLabelMiss = _SHR_RX_VC_LABEL_MISS, + socRxReasonVlanFilterMatch = _SHR_RX_VLAN_FILTER_MATCH, + socRxReasonWlanClientError = _SHR_RX_WLAN_CLIENT_ERROR, + socRxReasonWlanSlowpath = _SHR_RX_WLAN_SLOW_PATH, + socRxReasonWlanDot1xDrop = _SHR_RX_WLAN_DOT1X_DROP, + socRxReasonExceptionFlood = _SHR_RX_EXCEPTION_FLOOD, + socRxReasonTimeSync = _SHR_RX_TIMESYNC, + socRxReasonEAVData = _SHR_RX_EAV_DATA, + socRxReasonSamePortBridge = _SHR_RX_SAME_PORT_BRIDGE, + socRxReasonSplitHorizon = _SHR_RX_SPLIT_HORIZON, + socRxReasonL4Error = _SHR_RX_L4_ERROR, + socRxReasonStp = _SHR_RX_STP, + socRxReasonEgressFilterRedirect = _SHR_RX_EGRESS_FILTER_REDIRECT, + socRxReasonFilterRedirect = _SHR_RX_FILTER_REDIRECT, + socRxReasonLoopback = _SHR_RX_LOOPBACK, + socRxReasonVlanTranslate = _SHR_RX_VLAN_TRANSLATE, + socRxReasonMmrp = _SHR_RX_MMRP, + socRxReasonSrp = _SHR_RX_SRP, + socRxReasonTunnelControl = _SHR_RX_TUNNEL_CONTROL, + socRxReasonL2Marked = _SHR_RX_L2_MARKED, + socRxReasonWlanSlowpathKeepalive = _SHR_RX_WLAN_SLOWPATH_KEEPALIVE, + socRxReasonStation = _SHR_RX_STATION, + socRxReasonNiv = _SHR_RX_NIV, + socRxReasonNivPrioDrop = _SHR_RX_NIV_PRIO_DROP, + socRxReasonNivInterfaceMiss = _SHR_RX_NIV_INTERFACE_MISS, + socRxReasonNivRpfFail = _SHR_RX_NIV_RPF_FAIL, + socRxReasonNivTagInvalid = _SHR_RX_NIV_TAG_INVALID, + socRxReasonNivTagDrop = _SHR_RX_NIV_TAG_DROP, + socRxReasonNivUntagDrop = _SHR_RX_NIV_UNTAG_DROP, + socRxReasonTrill = _SHR_RX_TRILL, + socRxReasonTrillInvalid = _SHR_RX_TRILL_INVALID, + socRxReasonTrillMiss = _SHR_RX_TRILL_MISS, + socRxReasonTrillRpfFail = _SHR_RX_TRILL_RPF_FAIL, + socRxReasonTrillSlowpath = _SHR_RX_TRILL_SLOWPATH, + socRxReasonTrillCoreIsIs = _SHR_RX_TRILL_CORE_IS_IS, + socRxReasonTrillTtl = _SHR_RX_TRILL_TTL, + socRxReasonTrillName = _SHR_RX_TRILL_NAME, + socRxReasonBfdSlowpath = _SHR_RX_BFD_SLOWPATH, + socRxReasonBfd = _SHR_RX_BFD, + socRxReasonMirror = _SHR_RX_MIRROR, + socRxReasonRegexAction = _SHR_RX_REGEX_ACTION, + socRxReasonFailoverDrop = _SHR_RX_FAILOVER_DROP, + socRxReasonWlanTunnelError = _SHR_RX_WLAN_TUNNEL_ERROR, + socRxReasonMplsReservedEntropyLabel = \ + _SHR_RX_MPLS_RESERVED_ENTROPY_LABEL, + socRxReasonCongestionCnmProxy = _SHR_RX_CONGESTION_CNM_PROXY, + socRxReasonCongestionCnmProxyError = _SHR_RX_CONGESTION_CNM_PROXY_ERROR, + socRxReasonCongestionCnm = _SHR_RX_CONGESTION_CNM, + socRxReasonMplsUnknownAch = _SHR_RX_MPLS_UNKNOWN_ACH, + socRxReasonMplsLookupsExceeded = _SHR_RX_MPLS_LOOKUPS_EXCEEDED, + socRxReasonMplsIllegalReservedLabel = \ + _SHR_RX_MPLS_ILLEGAL_RESERVED_LABEL, + socRxReasonMplsRouterAlertLabel = _SHR_RX_MPLS_ROUTER_ALERT_LABEL, + socRxReasonNivPrune = _SHR_RX_NIV_PRUNE, + socRxReasonVirtualPortPrune = _SHR_RX_VIRTUAL_PORT_PRUNE, + socRxReasonNonUnicastDrop = _SHR_RX_NON_UNICAST_DROP, + socRxReasonTrillPacketPortMismatch = _SHR_RX_TRILL_PACKET_PORT_MISMATCH, + socRxReasonRegexMatch = _SHR_RX_REGEX_MATCH, + socRxReasonWlanClientMove = _SHR_RX_WLAN_CLIENT_MOVE, + socRxReasonWlanSourcePortMiss = _SHR_RX_WLAN_SOURCE_PORT_MISS, + socRxReasonWlanClientSourceMiss = _SHR_RX_WLAN_CLIENT_SOURCE_MISS, + socRxReasonWlanClientDestMiss = _SHR_RX_WLAN_CLIENT_DEST_MISS, + socRxReasonWlanMtu = _SHR_RX_WLAN_MTU, + socRxReasonL2GreSipMiss = _SHR_RX_L2GRE_SIP_MISS, + socRxReasonL2GreVpnIdMiss = _SHR_RX_L2GRE_VPN_ID_MISS, + socRxReasonTimesyncUnknownVersion = _SHR_RX_TIMESYNC_UNKNOWN_VERSION, + socRxReasonVxlanSipMiss = _SHR_RX_VXLAN_SIP_MISS, + socRxReasonVxlanVpnIdMiss = _SHR_RX_VXLAN_VPN_ID_MISS, + socRxReasonFcoeZoneCheckFail = _SHR_RX_FCOE_ZONE_CHECK_FAIL, + socRxReasonIpmcInterfaceMismatch = _SHR_RX_IPMC_INTERFACE_MISMATCH, + socRxReasonNat = _SHR_RX_NAT, + socRxReasonTcpUdpNatMiss = _SHR_RX_TCP_UDP_NAT_MISS, + socRxReasonIcmpNatMiss = _SHR_RX_ICMP_NAT_MISS, + socRxReasonNatFragment = _SHR_RX_NAT_FRAGMENT, + socRxReasonNatMiss = _SHR_RX_NAT_MISS, + socRxReasonUnknownSubtendingPort = _SHR_RX_UNKNOWN_SUBTENTING_PORT, + socRxReasonLLTagAbsentDrop = _SHR_RX_LLTAG_ABSENT_DROP, + socRxReasonLLTagPresentDrop = _SHR_RX_LLTAG_PRESENT_DROP, + socRxReasonOAMCCMSlowPath = _SHR_RX_OAM_CCM_SLOWPATH, + socRxReasonOAMIncompleteOpcode = _SHR_RX_OAM_INCOMPLETE_OPCODE, + socRxReasonReserved0 = _SHR_RX_RESERVED_0, + socRxReasonOAMMplsLmDm = _SHR_RX_OAM_MPLS_LMDM, + socRxReasonSat = _SHR_RX_SAT, + socRxReasonSampleSourceFlex = _SHR_RX_SAMPLE_SOURCE_FLEX, + socRxReasonFlexSflow = _SHR_RX_FLEX_SFLOW, + socRxReasonVxltMiss = _SHR_RX_VXLT_MISS, + socRxReasonTunnelDecapEcnError = _SHR_RX_TUNNEL_DECAP_ECN_ERROR, + socRxReasonTunnelObjectValidationFail = _SHR_RX_TUNNEL_OBJECT_VALIDATION_FAIL, + socRxReasonL3Cpu = _SHR_RX_L3_CPU, + socRxReasonTunnelAdaptLookupMiss = _SHR_RX_TUNNEL_ADAPT_LOOKUP_MISS, + socRxReasonPacketFlowSelectMiss = _SHR_RX_PACKET_FLOW_SELECT_MISS, + socRxReasonProtectionDataDrop = _SHR_RX_PROTECTION_DATA_DROP, + socRxReasonPacketFlowSelect = _SHR_RX_PACKET_FLOW_SELECT, + socRxReasonOtherLookupMiss = _SHR_RX_OTHER_LOOKUP_MISS, + socRxReasonInvalidTpid = _SHR_RX_INVALID_TPID, + socRxReasonMplsControlPacket = _SHR_RX_MPLS_CONTROL_PACKET, + socRxReasonTunnelTtlError = _SHR_RX_TUNNEL_TTL_ERROR, + socRxReasonL2HeaderError = _SHR_RX_L2_HEADER_ERROR, + socRxReasonOtherLookupHit = _SHR_RX_OTHER_LOOKUP_HIT, + socRxReasonL2SrcLookupMiss = _SHR_RX_L2_SRC_LOOKUP_MISS, + socRxReasonL2SrcLookupHit = _SHR_RX_L2_SRC_LOOKUP_HIT, + socRxReasonL2DstLookupMiss = _SHR_RX_L2_DST_LOOKUP_MISS, + socRxReasonL2DstLookupHit = _SHR_RX_L2_DST_LOOKUP_HIT, + socRxReasonL3SrcRouteLookupMiss = _SHR_RX_L3_SRC_ROUTE_LOOKUP_MISS, + socRxReasonL3SrcHostLookupMiss = _SHR_RX_L3_SRC_HOST_LOOKUP_MISS, + socRxReasonL3SrcRouteLookupHit = _SHR_RX_L3_SRC_ROUTE_LOOKUP_HIT, + socRxReasonL3SrcHostLookupHit = _SHR_RX_L3_SRC_HOST_LOOKUP_HIT, + socRxReasonL3DstRouteLookupMiss = _SHR_RX_L3_DST_ROUTE_LOOKUP_MISS, + socRxReasonL3DstHostLookupMiss = _SHR_RX_L3_DST_HOST_LOOKUP_MISS, + socRxReasonL3DstRouteLookupHit = _SHR_RX_L3_DST_ROUTE_LOOKUP_HIT, + socRxReasonL3DstHostLookupHit = _SHR_RX_L3_DST_HOST_LOOKUP_HIT, + socRxReasonVlanTranslate1Lookup1Miss = _SHR_RX_VLAN_TRANSLATE1_LOOKUP1_MISS, + socRxReasonVlanTranslate1Lookup2Miss = _SHR_RX_VLAN_TRANSLATE1_LOOKUP2_MISS, + socRxReasonMplsLookup1Miss = _SHR_RX_MPLS_LOOKUP1_MISS, + socRxReasonMplsLookup2Miss = _SHR_RX_MPLS_LOOKUP2_MISS, + socRxReasonL3TunnelLookupMiss = _SHR_RX_L3_TUNNEL_LOOKUP_MISS, + socRxReasonVlanTranslate2Lookup1Miss = _SHR_RX_VLAN_TRANSLATE2_LOOKUP1_MISS, + socRxReasonVlanTranslate2Lookup2Miss = _SHR_RX_VLAN_TRANSLATE2_LOOKUP2_MISS, + socRxReasonL2StuFail = _SHR_RX_L2_STU_FAIL, + socReasonSrCounterExceeded = _SHR_RX_SR_COUNTER_EXCEEDED, + socRxReasonSrCopyToCpuBit0 = _SHR_RX_SR_COPY_TO_CPU_BIT0, + socRxReasonSrCopyToCpuBit1 = _SHR_RX_SR_COPY_TO_CPU_BIT1, + socRxReasonSrCopyToCpuBit2 = _SHR_RX_SR_COPY_TO_CPU_BIT2, + socRxReasonSrCopyToCpuBit3 = _SHR_RX_SR_COPY_TO_CPU_BIT3, + socRxReasonSrCopyToCpuBit4 = _SHR_RX_SR_COPY_TO_CPU_BIT4, + socRxReasonSrCopyToCpuBit5 = _SHR_RX_SR_COPY_TO_CPU_BIT5, + socRxReasonL3HeaderMismatch = _SHR_RX_L3_HEADER_MISMATCH, + socRxReasonEtrapMonitor = _SHR_RX_ETRAP_MONITOR, + socRxReasonDlbMonitor = _SHR_RX_DLB_MONITOR, + socRxReasonIntTurnAround = _SHR_RX_INT_TURNAROUND, + socRxReasonCount = _SHR_RX_REASON_COUNT /* MUST BE LAST */ +} soc_rx_reason_t; + + +/* + * Set of "reasons" (see socRxReason*) why a packet came to the CPU. + */ +typedef _shr_rx_reasons_t soc_rx_reasons_t; + +/* + * Macro to add a reason (socRxReason*) to a set of + * reasons (soc_rx_reasons_t) + */ +#define SOC_RX_REASON_SET(_reasons, _reason) \ + _SHR_RX_REASON_SET(_reasons, _reason) + +/* + * Macro to clear a set of reasons (soc_rx_reasons_t). + */ +#define SOC_RX_REASON_CLEAR_ALL(_reasons) \ + _SHR_RX_REASON_CLEAR_ALL(_reasons) + +#endif /* !_SOC_RX_H */ diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type19.h b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type19.h similarity index 99% rename from platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type19.h rename to platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type19.h index 9d1fd33cca0..4836613fccc 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type19.h +++ b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type19.h @@ -1,7 +1,6 @@ /* * $Id: type19.h,v 1.4 Broadcom SDK $ - * - * $Copyright: 2017-2025 Broadcom Inc. All rights reserved. + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type23.h b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type23.h similarity index 99% rename from platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type23.h rename to platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type23.h index a1f39f7c072..d1ed8b4a947 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type23.h +++ b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type23.h @@ -1,7 +1,6 @@ /* * $Id: type23.h,v 1.6 Broadcom SDK $ - * - * $Copyright: 2017-2025 Broadcom Inc. All rights reserved. + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type24.h b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type24.h similarity index 99% rename from platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type24.h rename to platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type24.h index 36121f84364..08e6be7f778 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type24.h +++ b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type24.h @@ -1,7 +1,6 @@ /* * $Id: type24.h,v 1.3 Broadcom SDK $ - * - * $Copyright: 2017-2025 Broadcom Inc. All rights reserved. + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type26.h b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type26.h similarity index 99% rename from platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type26.h rename to platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type26.h index 8b75e11ec7d..5f26aa7cb97 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type26.h +++ b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type26.h @@ -1,7 +1,6 @@ /* * $Id: type26.h,v 1.5 Broadcom SDK $ - * - * $Copyright: 2017-2025 Broadcom Inc. All rights reserved. + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type29.h b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type29.h similarity index 99% rename from platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type29.h rename to platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type29.h index 29221f85885..c06a7704e5c 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type29.h +++ b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type29.h @@ -1,7 +1,6 @@ /* * $Id: type29.h,v 1.2 Broadcom SDK $ - * - * $Copyright: 2017-2025 Broadcom Inc. All rights reserved. + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type31.h b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type31.h similarity index 99% rename from platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type31.h rename to platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type31.h index b5363ee6b26..faf428c8ff1 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type31.h +++ b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type31.h @@ -1,7 +1,6 @@ /* * $Id: type31.h,v 1.1.6.2 Broadcom SDK $ - * - * $Copyright: 2017-2025 Broadcom Inc. All rights reserved. + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type32.h b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type32.h similarity index 99% rename from platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type32.h rename to platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type32.h index 107c3bc9f62..c2bc9d2db05 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type32.h +++ b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type32.h @@ -1,7 +1,6 @@ /* * $Id: $ - * - * $Copyright: 2017-2025 Broadcom Inc. All rights reserved. + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type33.h b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type33.h similarity index 99% rename from platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type33.h rename to platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type33.h index 370a6dec9e3..68cb1faf58c 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type33.h +++ b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type33.h @@ -1,7 +1,6 @@ /* * $Id$ - * - * $Copyright: 2017-2025 Broadcom Inc. All rights reserved. + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type34.h b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type34.h similarity index 99% rename from platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type34.h rename to platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type34.h index 97494c1552c..893696fae9a 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type34.h +++ b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type34.h @@ -1,7 +1,6 @@ /* * $Id: $ - * - * $Copyright: 2017-2025 Broadcom Inc. All rights reserved. + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type35.h b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type35.h similarity index 99% rename from platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type35.h rename to platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type35.h index 07b1f6f66b0..debc1d96154 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type35.h +++ b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type35.h @@ -1,7 +1,6 @@ /* * $Id$ - * - * $Copyright: 2017-2025 Broadcom Inc. All rights reserved. + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type36.h b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type36.h similarity index 99% rename from platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type36.h rename to platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type36.h index eaa6ba6cdcf..daa98ea802f 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type36.h +++ b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type36.h @@ -1,7 +1,6 @@ /* * $Id: $ - * - * $Copyright: 2017-2025 Broadcom Inc. All rights reserved. + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type37.h b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type37.h similarity index 99% rename from platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type37.h rename to platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type37.h index 7df9037f047..294998d3d39 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type37.h +++ b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type37.h @@ -1,7 +1,6 @@ /* * $Id: $ - * - * $Copyright: 2017-2025 Broadcom Inc. All rights reserved. + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type38.h b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type38.h similarity index 99% rename from platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type38.h rename to platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type38.h index 420563df6a5..141b4c150a8 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type38.h +++ b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/include/soc/shared/dcbformats/type38.h @@ -1,7 +1,6 @@ /* * $Id: $ - * - * $Copyright: 2017-2025 Broadcom Inc. All rights reserved. + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. diff --git a/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/include/soc/types.h b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/include/soc/types.h new file mode 100644 index 00000000000..0f204e52acd --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/include/soc/types.h @@ -0,0 +1,42 @@ +/* + * $Id:$ + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * + * + * File: types.h + * Purpose: System-on-a-Chip data types + */ + +#ifndef _SOC_TYPES_H_ +#define _SOC_TYPES_H_ + +#include + +typedef uint32 soc_pbmp_t; +#define pbmp_t soc_pbmp_t + +#endif /* _SOC_TYPES_H_ */ diff --git a/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/make/Makefile b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/make/Makefile new file mode 100644 index 00000000000..ecc3dc0b391 --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/make/Makefile @@ -0,0 +1,152 @@ +# $Id: Makefile,v 1.2 Broadcom SDK $ +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# +# +# +# Makefile for DCB Library +# + +# General Compilation Flags +CC = $(CROSS_COMPILE)gcc +AR = $(CROSS_COMPILE)ar +CFLAGS = -c -Wall -Werror +ARFLAGS = cru + +# DCB Directory +ifndef DCBDIR +DCBDIR = $(SDK)/systems/linux/kernel/modules/dcb +endif + +# Build Directory +ifndef BLDDIR +BLDDIR = $(DCBDIR)/build +endif + +# Kernel Build +ifdef KADD_CFLAGS +CFLAGS += $(KADD_CFLAGS) +# Prevent false GCC warnings when compiling dcb.c +CFLAGS += -Wno-error=array-bounds +endif + +# Include Directories +INCDIR = -I$(DCBDIR)/include + +# Sources +SOURCES = \ + $(DCBDIR)/src/soc/common/dcb.c \ + $(DCBDIR)/src/appl/dcb/dcb_handler.c + +# Objects +OBJECTS=$(subst .c,.o,$(subst $(DCBDIR),$(BLDDIR),$(SOURCES))) +OBJECTSDIR = $(dir $(OBJECTS)) + +# Library +LIB = $(BLDDIR)/libdcb.a + + +# Compilation Flags +CFLAGS += $(INCDIR) + +DFLAGS = +DFLAGS += -DBCM_53400_A0 # GREYHOUND +DFLAGS += -DBCM_53570_A0 # GREYHOUND2 +DFLAGS += -DBCM_56150_A0 # HURRICANE2 +DFLAGS += -DBCM_56160_A0 # HURRICANE3 +DFLAGS += -DBCM_56340_A0 # HELIX4 +DFLAGS += -DBCM_56450_A0 # KATANA2 +DFLAGS += -DBCM_56560_A0 # APACHE +DFLAGS += -DBCM_56850_A0 # TRIDENT2 +DFLAGS += -DBCM_56860_A0 # TRIDENT2+ +DFLAGS += -DBCM_56870_A0 # TRIDENT3 +DFLAGS += -DBCM_56770_A0 # MAVERICK2 +DFLAGS += -DBCM_56370_A0 # HELIX5 +DFLAGS += -DBCM_56960_A0 # TOMAHAWK +DFLAGS += -DBCM_56970_A0 # TOMAHAWK2 +DFLAGS += -DBCM_56980_A0 # TOMAHAWK3 +DFLAGS += -DBCM_56470_A0 # FIREBOLT6 +DFLAGS += -DBCM_56275_A0 # HURRICANE4 +DFLAGS += -DBCM_56175_A0 # TRIDENT3-X1 + +# +# Compiler Related Options +# + +# Define if pointers are 64 bits on your compiler; +# this is typically true ONLY for 64-bit processors. +# NOTE: This support works ONLY under conditions where the +# upper 32 bits for ALL pointers are ZERO. +#CFGFLAGS += -DPTRS_ARE_64BITS + +# Disable inlining of functions +#CFGFLAGS += -DCOMPILER_OVERRIDE_NO_INLINE + +# Disable use of const +#CFGFLAGS += -DCOMPILER_OVERRIDE_NO_CONST + +# Disable use of static functions +#CFGFLAGS += -DCOMPILER_OVERRIDE_NO_STATIC + + +# +# Rules +# +all: build_dir + $(MAKE) $(LIB) + +$(LIB): $(OBJECTS) + $(AR) $(ARFLAGS) $@ $^ + +define compile_rules +$(1): $(subst .o,.c,$(subst $(BLDDIR),$(DCBDIR),$(1))) + $(CC) $(CFLAGS) $(DFLAGS) $$< -o $$@ +endef + +$(foreach object,$(OBJECTS),$(eval $(call compile_rules,$(object)))) + +.PHONY: clean +clean: + rm -f $(OBJECTS) $(LIB) + +.PHONY: build_dir +build_dir: + mkdir -p $(BLDDIR) + mkdir -p $(OBJECTSDIR) + +.PHONY: print_vars +print_vars: + echo $(SOURCES) + echo $(OBJECTS) + +# +# +# Example +# +test: all $(DCBDIR)/src/appl/test/dcb_test.c + $(CC) -Wall -I$(DCBDIR)/include \ + $(DCBDIR)/src/appl/test/dcb_test.c $(LIB) \ + -o $(BLDDIR)/test.exe + diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/src/appl/dcb/dcb_handler.c b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/src/appl/dcb/dcb_handler.c similarity index 99% rename from platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/src/appl/dcb/dcb_handler.c rename to platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/src/appl/dcb/dcb_handler.c index a6fbae6cf67..0655203c34d 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/src/appl/dcb/dcb_handler.c +++ b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/src/appl/dcb/dcb_handler.c @@ -1,7 +1,6 @@ /* * $Id:$ - * - * $Copyright: 2017-2025 Broadcom Inc. All rights reserved. + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/src/appl/test/dcb_test.c b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/src/appl/test/dcb_test.c similarity index 99% rename from platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/src/appl/test/dcb_test.c rename to platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/src/appl/test/dcb_test.c index fe6572b007d..dd66020fa96 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/src/appl/test/dcb_test.c +++ b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/src/appl/test/dcb_test.c @@ -1,7 +1,6 @@ /* * $Id:$ - * - * $Copyright: 2017-2025 Broadcom Inc. All rights reserved. + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/src/soc/common/dcb.c b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/src/soc/common/dcb.c similarity index 99% rename from platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/src/soc/common/dcb.c rename to platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/src/soc/common/dcb.c index 47b9cc1765e..a8dee2f8708 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/src/soc/common/dcb.c +++ b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/dcb/src/soc/common/dcb.c @@ -1,7 +1,6 @@ /* * $Id$ - * - * $Copyright: 2017-2025 Broadcom Inc. All rights reserved. + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. diff --git a/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/genl-packet/Makefile b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/genl-packet/Makefile new file mode 100644 index 00000000000..3d153b4994a --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/genl-packet/Makefile @@ -0,0 +1,97 @@ +# -*- Makefile -*- +# $Id: Makefile,v 1.3 Broadcom SDK $ +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# +# +# +LOCALDIR = systems/linux/kernel/modules/genl-packet + +include ${SDK}/make/Make.config + +LIBS = + +CFLAGS += -I${SDK}/systems/linux/kernel/modules/include/kernel + +KERNEL_MODULE_DIR = kernel_module + +THIS_MOD_NAME := genl-packet +MODULE = $(LIBDIR)/$(THIS_MOD_NAME).o +KMODULE = $(LIBDIR)/$(THIS_MOD_NAME).ko + +# BCM Network Device + +ifeq (1,$(NO_PRECOMPILED_MODULE)) +# { +# +# These are the objects which need to be compiled, in the kernel, to +# created the module object file. +# +SRCS_COMPOSING = genl-packet.c +OBJECTS_COMPOSING = genl-packet.o +# +# Note that for NO_PRECOMPILED_MODULE, the subdirectory 'systems/linux/kernel/modules/genl-packet/kernel_module' +# is not created and all action is done in systems/linux/kernel/modules/genl-packet +# + +build: $(KMODULE) + +$(KMODULE): $(SRCS_COMPOSING) + rm -fr $(BLDDIR)/$(KERNEL_MODULE_DIR) + rm -f $(BLDDIR)/*.c + rm -f $(BLDDIR)/*.o + rm -f $(BLDDIR)/*.ko + cp ${SDK}/make/Makefile.linux-kmodule $(BLDDIR)/Makefile + cp ./*.c $(BLDDIR)/ + MOD_OBJS=$(OBJECTS_COMPOSING) MOD_NAME=$(THIS_MOD_NAME) $(MAKE) -C $(BLDDIR) $(THIS_MOD_NAME).ko LOC_BLDDIR=$(BLDDIR) LOC_SRCDIR=$(PWD) +# } +else +# { +build: $(MODULE) $(KMODULE) +# +# This is for the compilation of the 'precompiled' object. We keep it +# here for compatibility. +# +$(MODULE): $(BLDDIR)/.tree $(BOBJS) $(LIBS) + $(LD) $(MODULE_LDFLAGS) -r -d $(BOBJS) $(LIBS) -o $@ + +$(KMODULE): $(MODULE) + rm -fr $(BLDDIR)/$(KERNEL_MODULE_DIR) + mkdir $(BLDDIR)/$(KERNEL_MODULE_DIR) + cp ${SDK}/make/Makefile.linux-kmodule $(BLDDIR)/$(KERNEL_MODULE_DIR)/Makefile + MOD_NAME=$(THIS_MOD_NAME) $(MAKE) -C $(BLDDIR)/$(KERNEL_MODULE_DIR) $(THIS_MOD_NAME).ko +# } +endif + +# Make.depend is before clean:: so that Make.depend's clean:: runs first. + +include ${SDK}/make/Make.depend + +clean:: + $(RM) $(BLDDIR)/version.c $(BLDDIR)/version.o + $(RM) $(BOBJS) $(MODULE) + +.PHONY: build + diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/genl-packet/genl-packet.c b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/genl-packet/genl-packet.c similarity index 100% rename from platform/broadcom/saibcm-modules/systems/linux/kernel/modules/genl-packet/genl-packet.c rename to platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/genl-packet/genl-packet.c diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/bcm-knet.h b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/include/bcm-knet.h similarity index 88% rename from platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/bcm-knet.h rename to platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/include/bcm-knet.h index 8d4907b3e2c..10763a50c62 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/bcm-knet.h +++ b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/include/bcm-knet.h @@ -1,7 +1,6 @@ /* * $Id: bcm-knet.h,v 1.4 Broadcom SDK $ - * - * $Copyright: 2017-2025 Broadcom Inc. All rights reserved. + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. @@ -51,14 +50,12 @@ typedef struct { #include typedef struct { - uint32_t netif_user_data; - uint32_t filter_user_data; - uint16_t dcb_type; - uint8_t meta_len; - uint8_t reserved; + uint32 netif_user_data; + uint32 filter_user_data; + uint16 dcb_type; int port; uint64_t ts; - uint32_t hwts; + uint32 hwts; } knet_skb_cb_t; #define KNET_SKB_CB(_skb) ((knet_skb_cb_t *)_skb->cb) @@ -73,18 +70,6 @@ typedef int (*knet_filter_cb_f)(uint8_t *pkt, int size, int dev_no, void *meta, int chan, kcom_filter_t *filter); -typedef int -(*knet_filter_create_cb_f)(kcom_filter_t *filter); - -typedef int -(*knet_filter_destroy_cb_f)(kcom_filter_t *filter); - -typedef struct { - const char *name; - knet_filter_create_cb_f create_cb; - knet_filter_destroy_cb_f destroy_cb; -} bkn_filter_cb_attr_t; - typedef int (*knet_hw_tstamp_enable_cb_f)(int dev_no, int phys_port, int tx_type); @@ -98,13 +83,13 @@ typedef int (*knet_hw_tstamp_ptp_clock_index_cb_f)(int dev_no); typedef int -(*knet_hw_tstamp_rx_pre_process_cb_f)(int dev_no, uint8_t *pkt, uint32_t sspa, uint8_t *pkt_offset); +(*knet_hw_tstamp_rx_pre_process_cb_f)(int dev_no, uint8_t *pkt, uint32_t sspa, int *pkt_offset); typedef int (*knet_hw_tstamp_rx_time_upscale_cb_f)(int dev_no, int phys_port, struct sk_buff *skb, uint32_t *meta, uint64_t *ts); typedef int -(*knet_hw_tstamp_ioctl_cmd_cb_f)(kcom_msg_clock_cmd_t *kmsg, int len, int dcb_type, int dev_no); +(*knet_hw_tstamp_ioctl_cmd_cb_f)(kcom_msg_clock_cmd_t *kmsg, int len, int dcb_type); typedef int (*knet_hw_tstamp_ptp_transport_get_cb_f)(uint8_t *pkt); @@ -139,10 +124,6 @@ bkn_filter_cb_register(knet_filter_cb_f filter_cb); extern int bkn_filter_cb_register_by_name(knet_filter_cb_f filter_cb, char *filter_name); -extern int -bkn_filter_cb_attr_register(knet_filter_cb_f filter_cb, - bkn_filter_cb_attr_t *filter_cb_attr); - extern int bkn_filter_cb_unregister(knet_filter_cb_f filter_cb); diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/gmodule.h b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/include/gmodule.h similarity index 97% rename from platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/gmodule.h rename to platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/include/gmodule.h index 1c1c7a633f8..07cc9c55e70 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/gmodule.h +++ b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/include/gmodule.h @@ -1,7 +1,6 @@ /* * $Id: gmodule.h,v 1.9 Broadcom SDK $ - * - * $Copyright: 2017-2025 Broadcom Inc. All rights reserved. + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/kernel/README b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/include/kernel/README similarity index 100% rename from platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/kernel/README rename to platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/include/kernel/README diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/kernel/net/genl-packet.h b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/include/kernel/net/genl-packet.h similarity index 100% rename from platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/kernel/net/genl-packet.h rename to platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/include/kernel/net/genl-packet.h diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/kernel/uapi/linux/genl-packet.h b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/include/kernel/uapi/linux/genl-packet.h similarity index 100% rename from platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/kernel/uapi/linux/genl-packet.h rename to platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/include/kernel/uapi/linux/genl-packet.h diff --git a/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/include/lkm.h b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/include/lkm.h new file mode 100644 index 00000000000..d4309e47990 --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/include/lkm.h @@ -0,0 +1,202 @@ +/* + * $Id: lkm.h,v 1.22 Broadcom SDK $ + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. + * + * Permission is granted to use, copy, modify and/or distribute this + * software under either one of the licenses below. + * + * License Option 1: GPL + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, version 2, as + * published by the Free Software Foundation (the "GPL"). + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License version 2 (GPLv2) for more details. + * + * You should have received a copy of the GNU General Public License + * version 2 (GPLv2) along with this source code. + * + * + * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license + * + * This software is governed by the Broadcom Open Network Switch APIs license: + * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ + * + * + */ + +#ifndef __COMMON_LINUX_KRN_LKM_H__ +#define __COMMON_LINUX_KRN_LKM_H__ + +#ifndef __KERNEL__ +# define __KERNEL__ +#endif +#ifndef MODULE +# define MODULE +#endif + +#include +#include +#if LINUX_VERSION_CODE < KERNEL_VERSION(3,1,0) +#error Kernel too old +#endif +#include +#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0) +#if defined(INCLUDE_KNET) && LINUX_VERSION_CODE >= KERNEL_VERSION(4,0,0) +#ifdef CONFIG_NF_CONNTRACK_MODULE +#include +#endif +#endif +#include +#endif +#include + +/* Helper defines for multi-version kernel support */ +#define LKM_2_6 + +#include /* printk() */ +#include /* everything... */ +#include /* error codes */ +#include /* size_t */ +#include +#include /* O_ACCMODE */ +#include +#include +#include +#include +#include +#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,11,0) +#include +#endif +#include + +#include +#include +#include + +#ifdef CONFIG_DEVFS_FS +#include +#endif + +#define PROC_INTERFACE_KERN_VER_3_10 (LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0)) + +/* Compatibility Macros */ + +#define LKM_MOD_PARAM(n,ot,nt,d) module_param(n,nt,d) +#define LKM_MOD_PARAM_ARRAY(n,ot,nt,c,d) module_param_array(n,nt,c,d) +#define LKM_EXPORT_SYM(s) EXPORT_SYMBOL(s) +#define _free_netdev free_netdev + +#ifndef list_for_each_safe +#define list_for_each_safe(l,t,i) t = 0; list_for_each((l),(i)) +#endif + +#ifndef reparent_to_init +#define reparent_to_init() +#endif + +#ifndef MODULE_LICENSE +#define MODULE_LICENSE(str) +#endif + +#ifndef EXPORT_NO_SYMBOLS +#define EXPORT_NO_SYMBOLS +#endif + +#ifndef DEFINE_SPINLOCK +#define DEFINE_SPINLOCK(_lock) spinlock_t _lock = SPIN_LOCK_UNLOCKED +#endif + +#ifndef __SPIN_LOCK_UNLOCKED +#define __SPIN_LOCK_UNLOCKED(_lock) SPIN_LOCK_UNLOCKED +#endif + +#ifndef lock_kernel +#ifdef preempt_disable +#define lock_kernel() preempt_disable() +#else +#define lock_kernel() +#endif +#endif + +#ifndef unlock_kernel +#ifdef preempt_enable +#define unlock_kernel() preempt_enable() +#else +#define unlock_kernel() +#endif +#endif + +#ifndef init_MUTEX_LOCKED +#define init_MUTEX_LOCKED(_sem) sema_init(_sem, 0) +#endif + +#ifdef CONFIG_BCM98245 +#define CONFIG_BMW +#endif + +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,8,0) +#define DMA_FORCE_CONTIGUOUS NULL +#else +#define DMA_FORCE_CONTIGUOUS DMA_ATTR_FORCE_CONTIGUOUS +#endif + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,5,0) +#define PROC_OWNER(_m) +#else +#define PROC_OWNER(_m) .owner = _m, +#define proc_ops file_operations +#define proc_open open +#define proc_read read +#define proc_write write +#define proc_lseek llseek +#define proc_release release +#endif + +#if PROC_INTERFACE_KERN_VER_3_10 +#define PROC_CREATE(_entry, _name, _acc, _path, _fops) \ + do { \ + _entry = proc_create(_name, _acc, _path, _fops); \ + } while (0) + +#define PROC_CREATE_DATA(_entry, _name, _acc, _path, _fops, _data) \ + do { \ + _entry = proc_create_data(_name, _acc, _path, _fops, _data); \ + } while (0) + +#define PROC_PDE_DATA(_node) PDE_DATA(_node) + +#else +#define PROC_CREATE(_entry, _name, _acc, _path, _fops) \ + do { \ + _entry = create_proc_entry(_name, _acc, _path); \ + if (_entry) { \ + _entry->proc_fops = _fops; \ + } \ + } while (0) + +#define PROC_CREATE_DATA(_entry, _name, _acc, _path, _fops, _data) \ + do { \ + _entry = create_proc_entry(_name, _acc, _path); \ + if (_entry) { \ + _entry->proc_fops = _fops; \ + _entry->data=_data; \ + } \ + } while (0) + +#define PROC_PDE_DATA(_node) PROC_I(_node)->pde->data +#endif + +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,19,0) +/* nosemgrep: c.lang.security.insecure-use-string-copy-fn.insecure-use-string-copy-fn */ +#define strscpy strlcpy +#endif + +#if LINUX_VERSION_CODE < KERNEL_VERSION(6,11,0) +#define kernel_ethtool_ts_info ethtool_ts_info +#endif + +#endif /* __COMMON_LINUX_KRN_LKM_H__ */ diff --git a/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/knet-cb/Makefile b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/knet-cb/Makefile new file mode 100644 index 00000000000..e7bee1890c6 --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/knet-cb/Makefile @@ -0,0 +1,126 @@ +# -*- Makefile -*- +# $Id: Makefile,v 1.3 Broadcom SDK $ +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# +# +# +LOCALDIR = systems/linux/kernel/modules/knet-cb + +include ${SDK}/make/Make.config + +LIBS = $(LIBDIR)/libkern.a + +ifeq (1,$(BUILD_DCBLIB)) +ifndef DCBDIR +DCBDIR = $(SDK)/systems/linux/kernel/modules/dcb +# $(error 'The $$DCBDIR variable is not set') +endif +ifeq (1,$(NO_PRECOMPILED_MODULE)) +$(error 'DCB_LIB build is not supported if NO_PRECOMPILED_MODULE=1') +endif +LIBS += $(LIBDIR)/libdcb.a +CFLAGS += -DDCBLIB_SUPPORT -I$(DCBDIR)/include +endif + +KERNEL_MODULE_DIR = kernel_module + +THIS_MOD_NAME := linux-knet-cb +MODULE = $(LIBDIR)/$(THIS_MOD_NAME).o +KMODULE = $(LIBDIR)/$(THIS_MOD_NAME).ko + +# BCM Network Device + +ifeq (1,$(NO_PRECOMPILED_MODULE)) +# { +KBUILD_EXTRA_SYMBOLS := ${BLDDIR}/../bcm-knet/Module.symvers +export KBUILD_EXTRA_SYMBOLS +# +# These are the objects which need to be compiled, in the kernel, to +# created the module object file. +# +SRCS_COMPOSING = knet-cb.c ../shared/gmodule.c +OBJECTS_COMPOSING = "knet-cb.o gmodule.o" + +build: $(KMODULE) +# +# Note that for NO_PRECOMPILED_MODULE, the subdirectory 'systems/linux/kernel/modules/knet-cb/kernel_module' +# is not created and all action is done in systems/linux/kernel/modules/knet-cb +# +$(KMODULE): $(SRCS_COMPOSING) + mkdir -p $(BLDDIR) + rm -fr $(BLDDIR)/$(KERNEL_MODULE_DIR) + rm -f $(BLDDIR)/*.c + rm -f $(BLDDIR)/*.o + rm -f $(BLDDIR)/*.ko + cp ${SDK}/make/Makefile.linux-kmodule $(BLDDIR)/Makefile + cp ./*.c $(BLDDIR)/ + cp ../shared/*.c $(BLDDIR)/ + # + # Wait until bcm-knet compilation is over so that we can copy its resultant + # Module.symvers + # + if [ ! -f ${KBUILD_EXTRA_SYMBOLS} ]; then sleep 5; fi + cat ${KBUILD_EXTRA_SYMBOLS} > $(BLDDIR)/Module.symvers + MOD_OBJS=$(OBJECTS_COMPOSING) MOD_NAME=$(THIS_MOD_NAME) $(MAKE) -C $(BLDDIR) $(THIS_MOD_NAME).ko LOC_BLDDIR=$(BLDDIR) LOC_SRCDIR=$(PWD) +# } +else +# { +KBUILD_EXTRA_SYMBOLS := ${BLDDIR}/../bcm-knet/kernel_module/Module.symvers +export KBUILD_EXTRA_SYMBOLS + +build: $(MODULE) $(KMODULE) +# +# This is for the compilation of the 'precompiled' object. We keep it +# here for compatibility. +# +$(LIBDIR)/libdcb.a: + $(MAKE) -C $(DCBDIR)/make BLDDIR=$(LIBDIR) \ + KADD_CFLAGS="-I${SDK}/systems/linux/kernel/modules/include $(KFLAGS) -D$(ENDIAN)" \ + CROSS_COMPILE=$(CROSS_COMPILE) + +$(MODULE): $(BLDDIR)/.tree $(BOBJS) $(LIBS) + $(LD) $(MODULE_LDFLAGS) -r -d $(BOBJS) $(LIBS) -o $@ + +$(KMODULE): $(MODULE) + rm -fr $(BLDDIR)/$(KERNEL_MODULE_DIR) + mkdir $(BLDDIR)/$(KERNEL_MODULE_DIR) + cp ${SDK}/make/Makefile.linux-kmodule $(BLDDIR)/$(KERNEL_MODULE_DIR)/Makefile + cat ${KBUILD_EXTRA_SYMBOLS} > $(BLDDIR)/$(KERNEL_MODULE_DIR)/Module.symvers + MOD_NAME=$(THIS_MOD_NAME) $(MAKE) -C $(BLDDIR)/$(KERNEL_MODULE_DIR) $(THIS_MOD_NAME).ko + +# Make.depend is before clean:: so that Make.depend's clean:: runs first. +include ${SDK}/make/Make.depend +# } +endif + +clean:: + $(RM) $(BLDDIR)/version.c $(BLDDIR)/version.o + $(RM) $(BOBJS) $(MODULE) +ifeq (1,$(BUILD_DCBLIB)) + $(MAKE) -C $(DCBDIR)/make BLDDIR=$(LIBDIR) clean +endif + +.PHONY: build diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/knet-cb/knet-cb.c b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/knet-cb/knet-cb.c similarity index 99% rename from platform/broadcom/saibcm-modules/systems/linux/kernel/modules/knet-cb/knet-cb.c rename to platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/knet-cb/knet-cb.c index 4dca7d1b226..0cc6260e01d 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/knet-cb/knet-cb.c +++ b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/knet-cb/knet-cb.c @@ -1,5 +1,5 @@ /* - * $Copyright: 2017-2025 Broadcom Inc. All rights reserved. + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. @@ -331,6 +331,7 @@ strip_tag_filter_cb(uint8_t * pkt, int size, int dev_no, void *meta, return 0; } +#ifdef BCM_DNX_SUPPORT static int knet_filter_cb(uint8_t * pkt, int size, int dev_no, void *meta, int chan, kcom_filter_t *kf) @@ -365,6 +366,7 @@ knet_netif_destroy_cb(struct net_device *dev, int unit, kcom_netif_t *netif) #endif return retv; } +#endif /* * Get statistics. diff --git a/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/shared/Makefile b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/shared/Makefile new file mode 100644 index 00000000000..67089f94b5e --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/shared/Makefile @@ -0,0 +1,38 @@ +# -*- Makefile -*- +# $Id: Makefile,v 1.2 Broadcom SDK $ +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# +# +# +LOCALDIR = systems/linux/kernel/modules/shared + +include ${SDK}/make/Make.config + +lib = libkern + +include ${SDK}/make/Make.kernlib + +include ${SDK}/make/Make.depend diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/shared/gmodule.c b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/shared/gmodule.c similarity index 97% rename from platform/broadcom/saibcm-modules/systems/linux/kernel/modules/shared/gmodule.c rename to platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/shared/gmodule.c index 225caf7ee59..0ddb1251e5f 100644 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/shared/gmodule.c +++ b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/kernel/modules/shared/gmodule.c @@ -1,7 +1,6 @@ /* * $Id: gmodule.c,v 1.20 Broadcom SDK $ - * - * $Copyright: 2017-2025 Broadcom Inc. All rights reserved. + * $Copyright: 2017-2024 Broadcom Inc. All rights reserved. * * Permission is granted to use, copy, modify and/or distribute this * software under either one of the licenses below. @@ -308,7 +307,6 @@ _gmodule_mmap(struct file *filp, struct vm_area_struct *vma) /* FILE OPERATIONS */ struct file_operations _gmodule_fops = { - .owner = THIS_MODULE, .unlocked_ioctl = _gmodule_unlocked_ioctl, .open = _gmodule_open, .release = _gmodule_release, @@ -322,18 +320,18 @@ cleanup_module(void) { if(!_gmodule) return; - /* Remove ourselves from user-mode access */ - unregister_chrdev(_gmodule->major, _gmodule->name); + /* Specific Cleanup */ + if(_gmodule->cleanup) { + _gmodule->cleanup(); + } /* Remove any proc entries */ if(_gmodule->pprint) { _gmodule_remove_proc(); } - /* Module-specific cleanup */ - if(_gmodule->cleanup) { - _gmodule->cleanup(); - } + /* Finally, remove ourselves from the universe */ + unregister_chrdev(_gmodule->major, _gmodule->name); } int __init diff --git a/platform/broadcom/saibcm-modules-legacy-th/systems/linux/user/common/Makefile b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/user/common/Makefile new file mode 100644 index 00000000000..38dde639ec6 --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/user/common/Makefile @@ -0,0 +1,324 @@ +# -*- Makefile -*- +# $Id: Makefile,v 1.4 Broadcom SDK $ +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# +# +# + +SDK :=$(shell if [ -n "$$SDK" ] ; then\ + echo $$SDK;\ + else\ + cd $(dir $(lastword $(MAKEFILE_LIST))); while /usr/bin/test ! -e RELEASE ; do \ + dir=`cd ../;pwd`; \ + if [ "$$dir" = "/" ] ; then \ + echo Cannot find SDK in $(lastword $(MAKEFILE_LIST)) 1>&2; \ + exit 1; \ + fi ; \ + cd $$dir; \ + done ; \ + pwd; \ + fi) + +ifeq ($(SDK),) +$(error Please run this in a tree) +endif + +export SDK + +override-target=linux-$(platform) + +ifeq ($(LINUX_MAKE_SHARED_LIB),1) +libext = so.$(SHAREDLIBVER) +else +libext = a +endif + +ifeq (,$(platform)) +$(error Internal error: platform variable is not set) +endif + +include $(SDK)/make/Make.config +LOCALDIR=systems/linux/user/common +include $(SDK)/make/Make.depend +kernel-override=linux-$(platform) +ifdef BLDCONFIG +KERN_BLDROOT=${SDK}/${SDKBUILD}/${BLDCONFIG}/$(kernel-override)$(bldroot_suffix) +else +ifdef SDK_OUTDIR +KERN_BLDROOT=${SDK_OUTDIR}/${SDKBUILD}/$(kernel-override)$(bldroot_suffix) +else +KERN_BLDROOT=${SDK}/${SDKBUILD}/$(kernel-override)$(bldroot_suffix) +endif +endif + +ifeq (,$(kernel_version)) +kernel_version=2_4 +endif + +ifneq ($(kernel_version),2_4) +KOBJ=ko +else +KOBJ=o +endif + +ifneq (,$(TOOLS_DIR)) +override PATH := $(TOOLS_DIR):$(PATH) +endif + +ifeq ($(DEST_DIR),) +DEST_DIR=${BLDDIR} +endif + +KERNEL_BDE_LOCAL := linux-kernel-bde.$(KOBJ) +KERNEL_BDE := $(DEST_DIR)/$(KERNEL_BDE_LOCAL) + +USER_BDE_LOCAL := linux-user-bde.$(KOBJ) +USER_BDE := $(DEST_DIR)/$(USER_BDE_LOCAL) + +KNET_CB_LOCAL := linux-knet-cb.$(KOBJ) +KNET_CB := $(DEST_DIR)/$(KNET_CB_LOCAL) + +export BUILD_BCM_GENL=1 +export BUILD_GENL_PACKET=0 +GENL_PACKET_LOCAL := genl-packet.$(KOBJ) +GENL_PACKET := $(DEST_DIR)/$(GENL_PACKET_LOCAL) +ifndef BUILD_GENL_PACKET +export BUILD_GENL_PACKET = 1 +endif + +BCM_GENL_LOCAL := linux-bcm-genl.$(KOBJ) +BCM_GENL := $(DEST_DIR)/$(BCM_GENL_LOCAL) + +BCM_KNET_LOCAL := linux-bcm-knet.$(KOBJ) +BCM_KNET := $(DEST_DIR)/$(BCM_KNET_LOCAL) + +BCM_PTP_LOCAL := linux-bcm-ptp-clock.$(KOBJ) +BCM_PTP := $(DEST_DIR)/$(BCM_PTP_LOCAL) + +ifeq (,$(findstring DELIVER,$(MAKECMDGOALS))) +.DEFAULT_GOAL := all +all_targets := kernel_modules $(KERNEL_BDE) $(USER_BDE) + +LOCAL_TARGETS := + +ifeq ($(NO_LOCAL_TARGETS),) +LOCAL_TARGETS +=$(patsubst %,$(realpath ..)/$(platform)/%,$(KERNEL_BDE_LOCAL) $(USER_BDE_LOCAL)) + +all_targets +=$(LOCAL_TARGETS) +endif + +# Build all by default +ifndef BUILD_KNET +BUILD_KNET = 1 +endif + +ifndef BUILD_PTP +BUILD_PTP = 1 +endif + +ifeq ($(BUILD_KNET),1) +# Kernel network support +all_targets += $(BCM_KNET) +knet_subdirs = bcm-knet + +ifeq ($(NO_LOCAL_TARGETS),) +LOCAL_TARGETS +=$(patsubst %,../$(platform)/%,$(BCM_KNET_LOCAL)) +all_targets +=$(LOCAL_TARGETS) +endif + +ifdef BUILD_KNET_CB +all_targets += $(KNET_CB) +knet_subdirs += knet-cb + +ifdef BUILD_PTP +all_targets += $(BCM_PTP) +knet_subdirs += bcm-ptp-clock +endif + +ifeq ($(NO_LOCAL_TARGETS),) +LOCAL_TARGETS +=$(patsubst %,../$(platform)/%,$(KNET_CB_LOCAL)) +all_targets +=$(LOCAL_TARGETS) +endif +endif + +ifeq ($(BUILD_BCM_GENL),1) +ifeq ($(BUILD_GENL_PACKET),1) +all_targets += $(GENL_PACKET) +knet_subdirs += genl-packet + +ifeq ($(NO_LOCAL_TARGETS),) +LOCAL_TARGETS +=$(patsubst %,../$(platform)/%,$(GENL_PACKET_LOCAL)) +all_targets +=$(LOCAL_TARGETS) +endif +endif +all_targets += $(BCM_GENL) +knet_subdirs += bcm-genl + +ifeq ($(NO_LOCAL_TARGETS),) +LOCAL_TARGETS +=$(patsubst %,../$(platform)/%,$(BCM_GENL_LOCAL)) +all_targets +=$(LOCAL_TARGETS) +endif +endif + + +ADD_TO_CFLAGS += -I$(SDK)/systems/linux/kernel/modules/include +COND_KNET_LIBS = libuser.$(libext) +endif + +all: $(BLDDIR)/.tree $(all_targets) + +ifeq ($(NO_LOCAL_TARGETS),) +define LOCAL_TARGET_DEF +$(1) : $(DEST_DIR)/$(notdir $(1)) + cp $$? $$@ +endef +endif + +ifeq (1,$(USE_CLANG)) +OPT_KERNEL_TOOLCHAIN = CC=clang LD=ld.lld AR=llvm-ar +include $(SDK)/make/Make.clang +ADD_TO_KCFLAGS += $(CLANG_ADD_CFLAGS) +endif + +# User BDE libraries +ADD_TO_CFLAGS += -I$(SDK)/systems/bde/linux/include + +CFLAGS += $(ADD_TO_CFLAGS) + +#SAI_FIXUP +CFLAGS:=$(filter-out -fPIC, $(CFLAGS)) + +kernel_modules: + $(MAKE) -C $(SDK)/systems/bde/linux/kernel $(OPT_KERNEL_TOOLCHAIN) kernel_version=$(kernel_version) \ + OPT_CFLAGS="$(ADD_TO_KCFLAGS)" + $(MAKE) -C $(SDK)/systems/bde/linux/user/kernel $(OPT_KERNEL_TOOLCHAIN) kernel_version=$(kernel_version) \ + OPT_CFLAGS="$(ADD_TO_KCFLAGS)" +ifeq ($(BUILD_KNET),1) + $(MAKE) -C $(SDK)/systems/linux/kernel/modules/shared $(OPT_KERNEL_TOOLCHAIN) kernel_version=$(kernel_version) \ + OPT_CFLAGS="$(ADD_TO_KCFLAGS)" override-target=linux-$(platform) + $(MAKE) -C $(SDK)/systems/linux/kernel/modules/bcm-knet $(OPT_KERNEL_TOOLCHAIN) kernel_version=$(kernel_version) \ + OPT_CFLAGS="$(ADD_TO_KCFLAGS)" override-target=linux-$(platform) +ifneq (,$(filter knet-cb,$(knet_subdirs))) + $(MAKE) -C $(SDK)/systems/linux/kernel/modules/knet-cb $(OPT_KERNEL_TOOLCHAIN) kernel_version=$(kernel_version) \ + OPT_CFLAGS="$(ADD_TO_KCFLAGS)" override-target=linux-$(platform) +endif +ifneq (,$(filter bcm-ptp-clock,$(knet_subdirs))) + $(MAKE) -C $(SDK)/systems/linux/kernel/modules/bcm-ptp-clock $(OPT_KERNEL_TOOLCHAIN) kernel_version=$(kernel_version) \ + OPT_CFLAGS="$(ADD_TO_KCFLAGS)" override-target=linux-$(platform) +endif +ifneq (,$(filter bcm-genl,$(knet_subdirs))) +ifneq (,$(filter genl-packet,$(knet_subdirs))) + $(MAKE) -C $(SDK)/systems/linux/kernel/modules/genl-packet $(OPT_KERNEL_TOOLCHAIN) kernel_version=$(kernel_version) \ + OPT_CFLAGS="$(ADD_TO_KCFLAGS)" override-target=linux-$(platform) +endif + $(MAKE) -C $(SDK)/systems/linux/kernel/modules/bcm-genl $(OPT_KERNEL_TOOLCHAIN) kernel_version=$(kernel_version) \ + OPT_CFLAGS="$(ADD_TO_KCFLAGS)" override-target=linux-$(platform) +endif +endif + +$(KERNEL_BDE): $(KERN_BLDROOT)/$(KERNEL_BDE_LOCAL) + mkdir -p $(@D) + $(OBJCOPY) --strip-debug $< $@ + +$(USER_BDE): $(KERN_BLDROOT)/$(USER_BDE_LOCAL) + $(OBJCOPY) --strip-debug $< $@ + +$(BCM_KNET): $(KERN_BLDROOT)/$(BCM_KNET_LOCAL) + $(OBJCOPY) --strip-debug $< $@ + +$(KNET_CB): $(KERN_BLDROOT)/$(KNET_CB_LOCAL) + $(OBJCOPY) --strip-debug $< $@ + +$(BCM_PTP): $(KERN_BLDROOT)/$(BCM_PTP_LOCAL) + $(OBJCOPY) --strip-debug $< $@ + +$(GENL_PACKET): $(KERN_BLDROOT)/$(GENL_PACKET_LOCAL) + $(OBJCOPY) --strip-debug $< $@ + +$(BCM_GENL): $(KERN_BLDROOT)/$(BCM_GENL_LOCAL) + $(OBJCOPY) --strip-debug $< $@ + +$(KERN_BLDROOT)/%.$(KOBJ): kernel_modules + @echo Force execution of kernel_modules target > /dev/null + +ifeq ($(NO_LOCAL_TARGETS),) +$(foreach targ,$(LOCAL_TARGETS),$(eval $(call LOCAL_TARGET_DEF,$(targ)))) +endif + +clean:: + $(MAKE) -C $(SDK)/systems/bde/linux/kernel $@ + $(MAKE) -C $(SDK)/systems/bde/linux/user/kernel $@ + $(MAKE) -C $(SDK)/systems/linux/kernel/modules \ + subdirs="shared $(knet_subdirs)" \ + override-target=linux-$(platform) $@ + $(RM) $(KERNEL_BDE) $(USER_BDE) + $(RM) $(BCM_KNET) $(KNET_CB) $(GENL_PACKET) $(BCM_GENL) + $(RM) $(KERN_BLDROOT)/$(KERNEL_BDE_LOCAL) + $(RM) $(KERN_BLDROOT)/$(USER_BDE_LOCAL) + $(RM) $(KERN_BLDROOT)/$(BCM_KNET_LOCAL) + $(RM) $(KERN_BLDROOT)/$(KNET_CB_LOCAL) + $(RM) $(KERN_BLDROOT)/$(GENL_PACKET_LOCAL) + $(RM) $(KERN_BLDROOT)/$(BCM_GENL_LOCAL) + $(RM) $(KERN_BLDROOT)/$(BCM_PTP_LOCAL) + $(RM) $(LOCAL_TARGETS) + +distclean:: clean + +.PHONY: variable + +# +# Echo variable values used for configuration +# usage: make VAR=CC variable +# +variable:: + @echo $($(VAR)) + +else +ifndef DELIVERY +$(error DELIVERY required) +endif + +DELIVERABLES := $(KERNEL_BDE) $(USER_BDE) +# 1= source +define DELIVERY_RULE +_DEL_TARG += $(DELIVERY)/$(notdir $(1)) +$(DELIVERY)/$(notdir $(1)) : $(1) + @mkdir -p $(DELIVERY) +ifeq ($(filter $(notdir $(BCM)) $(notdir $(BCM).dbg),$(notdir $1)),) + $(OBJCOPY) --strip-debug $$< $$@ +else + $(CP) -p $$< $$@ +endif +endef + +$(foreach f,$(DELIVERABLES),$(eval $(call DELIVERY_RULE,$(f)))) + +DELIVER: $(_DEL_TARG) +endif + +# Make.config defines remaining phony targets +.PHONY: build kernel_modules DELIVER + diff --git a/platform/broadcom/saibcm-modules-legacy-th/systems/linux/user/gts/Makefile b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/user/gts/Makefile new file mode 100644 index 00000000000..6b0d0e07c33 --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/user/gts/Makefile @@ -0,0 +1,71 @@ +# -*- Makefile -*- +# $Id: Makefile,v 0.1 Broadcom SDK $ +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# +# + +# +# This make job requires the following environment variables to be set: +# +# SDK - path to StrataXGS SDK root directory +# +# Optionally the following environment variables can be set to +# override the default build server configuration: +# +# TOOLS_DIR - path to build tools (if not in PATH already) +# CROSS_COMPILE - cross compile tools prefix +# LINUX_INCLUDE - path to Linux kernel include directory +# + +SDK :=$(shell if [ -n "$$SDK" ] ; then\ + echo $$SDK;\ + else\ + cd $(dir $(lastword $(MAKEFILE_LIST))); while /usr/bin/test ! -e RELEASE ; do \ + dir=`cd ../;pwd`; \ + if [ "$$dir" = "/" ] ; then \ + echo Cannot find SDK in $(lastword $(MAKEFILE_LIST)) 1>&2; \ + exit 1; \ + fi ; \ + cd $$dir; \ + done ; \ + pwd; \ + fi) + +ifeq ($(SDK),) +$(error Please run this in a tree) +endif + +export SDK + +override kernel_version=6_6 +platform=gts + +export LINKER_RELAX = 1 +export ADD_TO_CFLAGS +export BR_NO_CCACHE + +include ${SDK}/make/Make.linux + diff --git a/platform/broadcom/saibcm-modules-legacy-th/systems/linux/user/iproc-3_14/Makefile b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/user/iproc-3_14/Makefile new file mode 100644 index 00000000000..67ba097a653 --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/user/iproc-3_14/Makefile @@ -0,0 +1,73 @@ +# -*- Makefile -*- +# $Id: Makefile,v 1.7 Broadcom SDK $ +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# +# + +# +# This make job requires the following environment variables to be set: +# +# SDK - path to StrataXGS SDK root directory +# +# Optionally the following environment variables can be set to +# override the default build server configuration: +# +# MIPS_TOOLS_DIR - path to build tools (if not in PATH already) +# MIPS_CROSS_COMPILE - cross compile tools prefix +# LINUX_INCLUDE - path to Linux kernel include directory +# + +SDK :=$(shell if [ -n "$$SDK" ] ; then\ + echo $$SDK;\ + else\ + cd $(dir $(lastword $(MAKEFILE_LIST))); while /usr/bin/test ! -e RELEASE ; do \ + dir=`cd ../;pwd`; \ + if [ "$$dir" = "/" ] ; then \ + echo Cannot find SDK in $(lastword $(MAKEFILE_LIST)) 1>&2; \ + exit 1; \ + fi ; \ + cd $$dir; \ + done ; \ + pwd; \ + fi) + +ifeq ($(SDK),) +$(error Please run this in a tree) +endif + +export SDK + +override kernel_version=3_14 +platform=iproc-$(kernel_version) + +IPROC_BUILD=1 +export IPROC_BUILD +export BUILD_PLATFORM +export ARM_LINUX_VERSION + +export ADD_TO_CFLAGS + +include ${SDK}/make/Make.linux diff --git a/platform/broadcom/saibcm-modules-legacy-th/systems/linux/user/iproc-4_4/Makefile b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/user/iproc-4_4/Makefile new file mode 100644 index 00000000000..a27707ef07e --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/user/iproc-4_4/Makefile @@ -0,0 +1,67 @@ +# -*- Makefile -*- +# $Id: Makefile,v 1.7 Broadcom SDK $ +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# +# + +# +# This make job requires the following environment variables to be set: +# +# SDK - path to StrataXGS SDK root directory +# + +SDK :=$(shell if [ -n "$$SDK" ] ; then\ + echo $$SDK;\ + else\ + cd $(dir $(lastword $(MAKEFILE_LIST))); while /usr/bin/test ! -e RELEASE ; do \ + dir=`cd ../;pwd`; \ + if [ "$$dir" = "/" ] ; then \ + echo Cannot find SDK in $(lastword $(MAKEFILE_LIST)) 1>&2; \ + exit 1; \ + fi ; \ + cd $$dir; \ + done ; \ + pwd; \ + fi) + +ifeq ($(SDK),) +$(error Please run this in a tree) +endif + +export SDK + +override kernel_version=4_4 +platform=iproc-$(kernel_version) + +IPROC_BUILD=1 +export IPROC_BUILD +export BUILD_PLATFORM +export ARM_LINUX_VERSION + +export ADD_TO_CFLAGS +export BR_NO_CCACHE + +include ${SDK}/make/Make.linux diff --git a/platform/broadcom/saibcm-modules-legacy-th/systems/linux/user/iproc/Makefile b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/user/iproc/Makefile new file mode 100644 index 00000000000..caf769f958f --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/user/iproc/Makefile @@ -0,0 +1,67 @@ +# -*- Makefile -*- +# $Id: Makefile,v 1.7 Broadcom SDK $ +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# +# + +# +# This make job requires the following environment variables to be set: +# +# SDK - path to StrataXGS SDK root directory +# + +SDK :=$(shell if [ -n "$$SDK" ] ; then\ + echo $$SDK;\ + else\ + cd $(dir $(lastword $(MAKEFILE_LIST))); while /usr/bin/test ! -e RELEASE ; do \ + dir=`cd ../;pwd`; \ + if [ "$$dir" = "/" ] ; then \ + echo Cannot find SDK in $(lastword $(MAKEFILE_LIST)) 1>&2; \ + exit 1; \ + fi ; \ + cd $$dir; \ + done ; \ + pwd; \ + fi) + +ifeq ($(SDK),) +$(error Please run this in a tree) +endif + +export SDK + +override kernel_version=6_6 +platform=iproc + +IPROC_BUILD=1 +export IPROC_BUILD +export BUILD_PLATFORM +export ARM_LINUX_VERSION + +export ADD_TO_CFLAGS +export BR_NO_CCACHE + +include ${SDK}/make/Make.linux diff --git a/platform/broadcom/saibcm-modules-legacy-th/systems/linux/user/iproc_64/Makefile b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/user/iproc_64/Makefile new file mode 100644 index 00000000000..e08d57cee87 --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/user/iproc_64/Makefile @@ -0,0 +1,67 @@ +# -*- Makefile -*- +# $Id: Makefile,v 1.7 Broadcom SDK $ +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# +# + +# +# This make job requires the following environment variables to be set: +# +# SDK - path to StrataXGS SDK root directory +# + +SDK :=$(shell if [ -n "$$SDK" ] ; then\ + echo $$SDK;\ + else\ + cd $(dir $(lastword $(MAKEFILE_LIST))); while /usr/bin/test ! -e RELEASE ; do \ + dir=`cd ../;pwd`; \ + if [ "$$dir" = "/" ] ; then \ + echo Cannot find SDK in $(lastword $(MAKEFILE_LIST)) 1>&2; \ + exit 1; \ + fi ; \ + cd $$dir; \ + done ; \ + pwd; \ + fi) + +ifeq ($(SDK),) +$(error Please run this in a tree) +endif + +export SDK + +override kernel_version=6_6 +platform=iproc_64 + +IPROC_BUILD=1 +export IPROC_BUILD +export BUILD_PLATFORM +export ARM_LINUX_VERSION + +export ADD_TO_CFLAGS +export BR_NO_CCACHE + +include ${SDK}/make/Make.linux diff --git a/platform/broadcom/saibcm-modules-legacy-th/systems/linux/user/slk/Makefile b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/user/slk/Makefile new file mode 100644 index 00000000000..617db79980a --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/user/slk/Makefile @@ -0,0 +1,68 @@ +# -*- Makefile -*- +# $Id: Makefile,v 0.1 Broadcom SDK $ +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# +# + +# +# This make job requires the following environment variables to be set: +# +# SDK - path to StrataXGS SDK root directory +# +# Optionally the following environment variables can be set to +# override the default build server configuration: +# +# TOOLS_DIR - path to build tools (if not in PATH already) +# CROSS_COMPILE - cross compile tools prefix +# LINUX_INCLUDE - path to Linux kernel include directory +# + +SDK :=$(shell if [ -n "$$SDK" ] ; then\ + echo $$SDK;\ + else\ + cd $(dir $(lastword $(MAKEFILE_LIST))); while /usr/bin/test ! -e RELEASE ; do \ + dir=`cd ../;pwd`; \ + if [ "$$dir" = "/" ] ; then \ + echo Cannot find SDK in $(lastword $(MAKEFILE_LIST)) 1>&2; \ + exit 1; \ + fi ; \ + cd $$dir; \ + done ; \ + pwd; \ + fi) + +ifeq ($(SDK),) +$(error Please run this in a tree) +endif + +export SDK + +override kernel_version=3_14 +platform=slk +export LINKER_RELAX = 1 + +include ${SDK}/make/Make.linux + diff --git a/platform/broadcom/saibcm-modules-legacy-th/systems/linux/user/x86-5_10/Makefile b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/user/x86-5_10/Makefile new file mode 100644 index 00000000000..9daefdf2166 --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/user/x86-5_10/Makefile @@ -0,0 +1,81 @@ +# -*- Makefile -*- +# $Id: Makefile,v 0.1 Broadcom SDK $ +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# +# + +# +# This make job requires the following environment variables to be set: +# +# SDK - path to StrataXGS SDK root directory +# +# Optionally the following environment variables can be set to +# override the default build server configuration: +# +# TOOLS_DIR - path to build tools (if not in PATH already) +# CROSS_COMPILE - cross compile tools prefix +# LINUX_INCLUDE - path to Linux kernel include directory +# + +# SHARED_LIBRARY_SUPPORT will enable the shared library creation - update the BINUTILSVER version. +ifneq ($(filter $(SHARED_LIBRARY_SUPPORT) $(COMPILE_OPENNSA_SUPPORT),1),) +# Newer GNU BINUTILS are neeed in order to avoid a known internal bug +# in GCC that results in a linker error when creating a .so library +export BINUTILSVER = 2.27 +endif + +SDK :=$(shell if [ -n "$$SDK" ] ; then\ + echo $$SDK;\ + else\ + cd $(dir $(lastword $(MAKEFILE_LIST))); while /usr/bin/test ! -e RELEASE ; do \ + dir=`cd ../;pwd`; \ + if [ "$$dir" = "/" ] ; then \ + echo Cannot find SDK in $(lastword $(MAKEFILE_LIST)) 1>&2; \ + exit 1; \ + fi ; \ + cd $$dir; \ + done ; \ + pwd; \ + fi) + +ifeq ($(SDK),) +$(error Please run this in a tree) +endif + +export SDK + +override kernel_version=5_10 +platform=x86-5_10 + +export LINKER_RELAX = 1 + +# SHARED_LIBRARY_SUPPORT will enable the shared library creation - add a PIC to the compilation flags. +ifneq ($(filter $(SHARED_LIBRARY_SUPPORT) $(COMPILE_OPENNSA_SUPPORT),1),) +ADD_TO_CFLAGS = -frecord-gcc-switches -DSAL_THREAD_STACK_MIN=8388608 +export ADD_TO_CFLAGS +endif + +include ${SDK}/make/Make.linux diff --git a/platform/broadcom/saibcm-modules-legacy-th/systems/linux/user/x86-64-fc28/Makefile b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/user/x86-64-fc28/Makefile new file mode 100644 index 00000000000..25888af33bb --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/user/x86-64-fc28/Makefile @@ -0,0 +1,85 @@ +# -*- Makefile -*- +# $Id: Makefile,v 0.1 Broadcom SDK $ +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# +# + +# +# This make job requires the following environment variables to be set: +# +# SDK - path to StrataXGS SDK root directory +# +# Optionally the following environment variables can be set to +# override the default build server configuration: +# +# TOOLS_DIR - path to build tools (if not in PATH already) +# CROSS_COMPILE - cross compile tools prefix +# LINUX_INCLUDE - path to Linux kernel include directory +# + +# SHARED_LIBRARY_SUPPORT will enable the shared library creation - update the BINUTILSVER version. +ifneq ($(filter $(SHARED_LIBRARY_SUPPORT) $(COMPILE_OPENNSA_SUPPORT),1),) +# Newer GNU BINUTILS are neeed in order to avoid a known internal bug +# in GCC that results in a linker error when creating a .so library +export BINUTILSVER = 2.27 +endif + +SDK :=$(shell if [ -n "$$SDK" ] ; then\ + echo $$SDK;\ + else\ + cd $(dir $(lastword $(MAKEFILE_LIST))); while /usr/bin/test ! -e RELEASE ; do \ + dir=`cd ../;pwd`; \ + if [ "$$dir" = "/" ] ; then \ + echo Cannot find SDK in $(lastword $(MAKEFILE_LIST)) 1>&2; \ + exit 1; \ + fi ; \ + cd $$dir; \ + done ; \ + pwd; \ + fi) + +ifeq ($(SDK),) +$(error Please run this in a tree) +endif + +export SDK + +ifeq (1,$(KERNEL_5_10)) +override kernel_version=5_10 +else +override kernel_version=4_18 +endif +platform=x86-64-fc28 + +export LINKER_RELAX = 1 + +# SHARED_LIBRARY_SUPPORT will enable the shared library creation - add a PIC to the compilation flags. +ifneq ($(filter $(SHARED_LIBRARY_SUPPORT) $(COMPILE_OPENNSA_SUPPORT),1),) +ADD_TO_CFLAGS = -frecord-gcc-switches -DSAL_THREAD_STACK_MIN=8388608 +export ADD_TO_CFLAGS +endif + +include ${SDK}/make/Make.linux diff --git a/platform/broadcom/saibcm-modules-legacy-th/systems/linux/user/x86-smp_generic_64-2_6/Makefile b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/user/x86-smp_generic_64-2_6/Makefile new file mode 100644 index 00000000000..e08224dc209 --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/user/x86-smp_generic_64-2_6/Makefile @@ -0,0 +1,53 @@ +# -*- Makefile -*- +# $Id: Makefile,v 1.2 Broadcom SDK $ +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# +# + +SDK :=$(shell if [ -n "$$SDK" ] ; then\ + echo $$SDK;\ + else\ + cd $(dir $(lastword $(MAKEFILE_LIST))); while /usr/bin/test ! -e RELEASE ; do \ + dir=`cd ../;pwd`; \ + if [ "$$dir" = "/" ] ; then \ + echo Cannot find SDK in $(lastword $(MAKEFILE_LIST)) 1>&2; \ + exit 1; \ + fi ; \ + cd $$dir; \ + done ; \ + pwd; \ + fi) + +ifeq ($(SDK),) +$(error Please run this in a tree) +endif + +export SDK + +override kernel_version=2_6 +platform=x86-smp_generic_64-$(kernel_version) + +include ${SDK}/make/Make.linux diff --git a/platform/broadcom/saibcm-modules-legacy-th/systems/linux/user/xlr/Makefile b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/user/xlr/Makefile new file mode 100644 index 00000000000..e0a1ac66ce9 --- /dev/null +++ b/platform/broadcom/saibcm-modules-legacy-th/systems/linux/user/xlr/Makefile @@ -0,0 +1,71 @@ +# -*- Makefile -*- +# $Id: Makefile,v 0.1 Broadcom SDK $ +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. +# +# Permission is granted to use, copy, modify and/or distribute this +# software under either one of the licenses below. +# +# License Option 1: GPL +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License, version 2, as +# published by the Free Software Foundation (the "GPL"). +# +# This program is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License version 2 (GPLv2) for more details. +# +# You should have received a copy of the GNU General Public License +# version 2 (GPLv2) along with this source code. +# +# +# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license +# +# This software is governed by the Broadcom Open Network Switch APIs license: +# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ +# +# + +# +# This make job requires the following environment variables to be set: +# +# SDK - path to StrataXGS SDK root directory +# +# Optionally the following environment variables can be set to +# override the default build server configuration: +# +# TOOLS_DIR - path to build tools (if not in PATH already) +# CROSS_COMPILE - cross compile tools prefix +# LINUX_INCLUDE - path to Linux kernel include directory +# + +SDK :=$(shell if [ -n "$$SDK" ] ; then\ + echo $$SDK;\ + else\ + cd $(dir $(lastword $(MAKEFILE_LIST))); while /usr/bin/test ! -e RELEASE ; do \ + dir=`cd ../;pwd`; \ + if [ "$$dir" = "/" ] ; then \ + echo Cannot find SDK in $(lastword $(MAKEFILE_LIST)) 1>&2; \ + exit 1; \ + fi ; \ + cd $$dir; \ + done ; \ + pwd; \ + fi) + +ifeq ($(SDK),) +$(error Please run this in a tree) +endif + +export SDK + +override kernel_version=6_6 +platform=xlr + +export LINKER_RELAX = 1 +export ADD_TO_CFLAGS +export BR_NO_CCACHE + +include ${SDK}/make/Make.linux + diff --git a/platform/broadcom/saibcm-modules/tools/mktool.pl b/platform/broadcom/saibcm-modules-legacy-th/tools/mktool.pl similarity index 98% rename from platform/broadcom/saibcm-modules/tools/mktool.pl rename to platform/broadcom/saibcm-modules-legacy-th/tools/mktool.pl index 0589a48b9ee..5173e0ced5f 100644 --- a/platform/broadcom/saibcm-modules/tools/mktool.pl +++ b/platform/broadcom/saibcm-modules-legacy-th/tools/mktool.pl @@ -3,8 +3,7 @@ # # $Id: mktool.pl,v 1.5 Broadcom SDK $ # -# -# $Copyright: 2017-2025 Broadcom Inc. All rights reserved. +# $Copyright: 2017-2024 Broadcom Inc. All rights reserved. # # Permission is granted to use, copy, modify and/or distribute this # software under either one of the licenses below. diff --git a/platform/broadcom/saibcm-modules/debian/changelog b/platform/broadcom/saibcm-modules/debian/changelog deleted file mode 100644 index 2134f4f2aa5..00000000000 --- a/platform/broadcom/saibcm-modules/debian/changelog +++ /dev/null @@ -1,160 +0,0 @@ -opennsl (14.1.0.1) unstable; urgency=medium - - * Update to Broadcom SAI 14.1.0.1 - - -- Ziting Guo Tue, 2 Dec 2025 06:24:27 +0000 - -opennsl (13.2.1.0) unstable; urgency=medium - - * Update to Broadcom SAI 13.2.1.0 - - -- Ziting Guo Wed, 25 Jun 2025 05:46:10 +0000 - -opennsl (13.2.0.0) unstable; urgency=medium - - * Update to Broadcom SAI 13.2.0.0 - - -- Ziting Guo Wed, 21 May 2025 01:43:59 +0000 - -opennsl (12.1.0.2) unstable; urgency=medium - - * Update to Broadcom SAI 12.1.0.2 - - -- Ziting Guo Wed, 18 Dec 2024 02:33:59 +0000 - -opennsl (11.2.4.1) unstable; urgency=medium - - * Update to Broadcom SAI 11.2.4.1 - - -- Ziting Guo Mon, 2 Sep 2024 02:53:09 +0000 - -opennsl (10.1.0.0) unstable; urgency=medium - - * Update to Broadcom SAI 10.1.0.0 - - -- Ziting Guo Mon Jun 17 05:18:47 2024 +0000 - -opennsl (8.4.0.2) unstable; urgency=medium - - * Update to Broadcom SAI 8.4.0.2 - - -- Ziting Guo Tue, Sep 5 02:25:03 2023 +0000 - -opennsl (7.1.0.0) unstable; urgency=medium - - * Update to Broadcom SAI 7.1.0.0. - - -- Vineet Mittal Tue, 19 APR 2022 12:30:00 +0000 - -opennsl (6.1.0.3) unstable; urgency=medium - - * Update to Broadcom SAI 6.1.0.3 - - -- Tejaswini Chadaga Fri, 24 MAR 2022 12:30:00 +0000 - -opennsl (6.0.0.13) unstable; urgency=medium - - * Update to Broadcom SAI 6.0.0.13 - - -- Judy Joseph Fri, 14 Jan 2022 18:36:38 +0000 - -opennsl (6.0.0.10) unstable; urgency=medium - - * Update to Broadcom SAI 6.0.0.10 - - -- Vineet Mittal Fri, 21 Oct 2021 18:36:38 +0000 - -opennsl (5.0.0.4) unstable; urgency=medium - - * Update to Broadcom SAI 5.0.0.4 - - -- Judy Joseph Fri, 12 July 2021 18:36:38 +0000 - -opennsl (5.0.0.1) unstable; urgency=medium - - * Update to Broadcom SAI 5.0.0.1 - - -- Abhishek Dosi Fri, 11 June 2021 18:36:38 +0000 - -opennsl (4.3.0.10-2) unstable; urgency=medium - - * Update to Broadcom SAI 4.3.0.10 - * Added SDKLT modules 4.3.0.10-2 - - -- Mahesh Maddikayala Thu, 21 Jan 2021 18:36:38 +0000 - -opennsl (4.2.1.3-1) unstable; urgency=medium - - * Update to Broadcom SAI 4.2.1.3 - - -- Mahesh Maddikayala Fri, 18 Sep 2029 10:57:47 +0000 - -opennsl (3.7.3.3-1) unstable; urgency=medium - - * Port Broadcom SAI 3.7.3.3 - * Cherry-pick change from master branch, 3.7.3.3-1 - - -- Judy Joseph Fri, 2 Dec 2019 15:32:47 +0000 - -opennsl (3.7.3.2-1) unstable; urgency=medium - - * Port Broadcom SAI 3.7.3.2 - * Cherry-pick change from master branch, 3.7.3.2-1 - - -- Judy Joseph Fri, 12 Nov 2019 15:22:47 +0000 - -opennsl (3.7.3.1-1) unstable; urgency=medium - - * Port Broadcom SAI 3.7.3.1 - * Cherry-pick change from master branch, 3.7.3.1-1 - - -- Judy Joseph Fri, 19 Sep 2019 13:11:47 +0000 - -opennsl (3.4.1.11-1) unstable; urgency=medium - - * Port Broadcom SAI 3.4.1.11 - * Cherry-pick change from master branch, 3.4.1.11-1 - - -- Ying Xie Fri, 05 Jan 2018 23:21:47 +0000 - -opennsl (3.4.1.10-1) unstable; urgency=medium - - * Upgrade to 3.4.1.10-1 - - -- Ying Xie Tue, 19 Dec 2017 21:33:48 +0000 - -opennsl (3.4.1.9-1) unstable; urgency=medium - - * Upgrade to 3.4.1.9-1 - - -- Ying Xie Thu, 14 Dec 2017 22:04:11 +0000 - -opennsl (3.4.1.7-2) unstable; urgency=medium - - * Add Arista 7260cx3 Rev2 hardware support - - -- Ying Xie Mon, 27 Nov 2017 18:13:50 +0000 - -opennsl (3.4.1.7-1) unstable; urgency=medium - - * Importing opennsl 3.4.1.7 - - -- Ying Xie Mon, 23 Oct 2017 23:47:25 +0000 - -opennsl (3.4.1.5-2) unstable; urgency=medium - - * Importing TD2 changes from opennsl 3.2.2.2 - - -- Ying Xie Tue, 26 Sep 2017 01:28:44 +0000 - -opennsl (3.4.1.5-1) unstable; urgency=medium - - * Importing opennsl 3.4.1.5 - - -- Ying Xie Wed, 20 Sep 2017 16:42:12 +0000 - -opennsl (3.4.1.3-1) unstable; urgency=low - - * Initial release - - -- Guohan Lu Fri, 17 Jul 2015 04:46:01 -0700 diff --git a/platform/broadcom/saibcm-modules/debian/opennsl-modules.dirs b/platform/broadcom/saibcm-modules/debian/opennsl-modules.dirs deleted file mode 100644 index 74d9ddccdda..00000000000 --- a/platform/broadcom/saibcm-modules/debian/opennsl-modules.dirs +++ /dev/null @@ -1 +0,0 @@ -lib/modules/6.12.30-sonic-amd64/extra diff --git a/platform/broadcom/saibcm-modules/debian/rules b/platform/broadcom/saibcm-modules/debian/rules deleted file mode 100755 index 14eb3c7e275..00000000000 --- a/platform/broadcom/saibcm-modules/debian/rules +++ /dev/null @@ -1,219 +0,0 @@ -#!/usr/bin/make -f -# -*- makefile -*- -# Sample debian/rules that uses debhelper. -# This file was originally written by Joey Hess and Craig Small. -# As a special exception, when this file is copied by dh-make into a -# dh-make output file, you may use that output file without restriction. -# This special exception was added by Craig Small in version 0.37 of dh-make. -# -# This version is for a hypothetical package that can build a kernel modules -# architecture-dependant package via make-kpkg, as well as an -# architecture-independent module source package, and other packages -# either dep/indep for things like common files or userspace components -# needed for the kernel modules. - -# Uncomment this to turn on verbose mode. -#export DH_VERBOSE=1 - - - - -# some default definitions, important! -# -# Name of the source package -psource:=opennsl-source - -# The short upstream name, used for the module source directory -sname:=opennsl - -### KERNEL SETUP -### Setup the stuff needed for making kernel module packages -### taken from /usr/share/kernel-package/sample.module.rules - -# prefix of the target package name -PACKAGE=opennsl-modules -# modifieable for experiments or debugging m-a -MA_DIR ?= /usr/share/modass -KVER := $(word 1,$(subst -, ,$(KVERSION))) -KVER_ARCH := $(KVER)-sonic-amd64 -KVER_COMMON := $(KVER)-common-sonic - -# load generic variable handling --include $(MA_DIR)/include/generic.make -# load default rules, including kdist, kdist_image, ... --include $(MA_DIR)/include/common-rules.make - - - -# module assistant calculates all needed things for us and sets -# following variables: -# KSRC (kernel source directory), KVERS (kernel version string), KDREV -# (revision of the Debian kernel-image package), CC (the correct -# compiler), VERSION (the final package version string), PKGNAME (full -# package name with KVERS included), DEB_DESTDIR (path to store DEBs) - -# The kdist_config target is called by make-kpkg modules_config and -# by kdist* rules by dependency. It should configure the module so it is -# ready for compilation (mostly useful for calling configure). -# prep-deb-files from module-assistant creates the neccessary debian/ files -kdist_config: prep-deb-files - -# the kdist_clean target is called by make-kpkg modules_clean and from -# kdist* rules. It is responsible for cleaning up any changes that have -# been made by the other kdist_commands (except for the .deb files created) -kdist_clean: clean - dh_testdir - dh_clean - SDK=$(realpath .) LINUX_UAPI_SPLIT=1 DEBIAN_LINUX_HEADER=1 BUILD_KNET_CB=1 \ - KERNDIR=/usr/src/linux-headers-$(KVER_COMMON) \ - KERNEL_SRC=/usr/src/linux-headers-$(KVER_ARCH) \ - $(MAKE) -C systems/linux/user/x86-smp_generic_64-2_6 clean - SDK=$(realpath .) BUILD_KNET_CB=1 \ - KDIR=/usr/src/linux-headers-$(KVER_COMMON) \ - $(MAKE) -C sdklt/ clean -# rm -f driver/*.o driver/*.ko -# -### end KERNEL SETUP - -configure: configure-stamp -configure-stamp: - dh_testdir - # Add here commands to configure the package. - - touch configure-stamp - - -build-arch: configure-stamp build-arch-stamp -build-arch-stamp: - dh_testdir - - # create links - cd /; sudo mkdir -p /lib/modules/$(KVER_ARCH) - cd /; sudo rm /lib/modules/$(KVER_ARCH)/build - cd /; sudo rm /lib/modules/$(KVER_ARCH)/source - cd /; sudo ln -s /usr/src/linux-headers-$(KVER_COMMON)/ /lib/modules/$(KVER_ARCH)/source - cd /; sudo ln -s /usr/src/linux-headers-$(KVER_ARCH)/ /lib/modules/$(KVER_ARCH)/build - cd /; sudo ln -s /usr/src/linux-headers-$(KVER_ARCH)/include/generated/ /usr/src/linux-headers-$(KVER_COMMON)/include/generated - cd /; sudo ln -s /usr/src/linux-headers-$(KVER_ARCH)/arch/x86/include/generated/ /usr/src/linux-headers-$(KVER_COMMON)/arch/x86/include/generated - cd /; sudo ln -s /usr/src/linux-headers-$(KVER_ARCH)/arch/x86/module.lds /usr/src/linux-headers-$(KVER_COMMON)/arch/x86/module.lds - cd /; sudo ln -s /usr/src/linux-headers-$(KVER_ARCH)/include/config/ /usr/src/linux-headers-$(KVER_COMMON)/include/config - cd /; sudo cp /usr/src/linux-headers-$(KVER_ARCH)/Module.symvers /usr/src/linux-headers-$(KVER_COMMON)/Module.symvers - - # Add here command to compile/build the package. - SDK=$(realpath .) LINUX_UAPI_SPLIT=1 DEBIAN_LINUX_HEADER=1 BUILD_KNET_CB=1 \ - KERNDIR=/usr/src/linux-headers-$(KVER_COMMON) \ - KERNEL_SRC=/usr/src/linux-headers-$(KVER_ARCH) \ - $(MAKE) -C systems/linux/user/x86-smp_generic_64-2_6 - - SDK=$(realpath .) BUILD_KNET_CB=1 \ - KDIR=/usr/src/linux-headers-$(KVER_COMMON) \ - $(MAKE) -C sdklt/ kmod - - touch $@ - -#k = $(shell echo $(KVERS) | grep -q ^2.6 && echo k) - -build-indep: configure-stamp build-indep-stamp -build-indep-stamp: - dh_testdir - - # Add here command to compile/build the arch indep package. - # It's ok not to do anything here, if you don't need to build - # anything for this package. - #docbook-to-man debian/opennsl.sgml > opennsl.1 - - touch $@ - -build: build-arch - -clean: - dh_testdir - #dh_testroot - rm -f build-arch-stamp build-indep-stamp configure-stamp - - # Add here commands to clean up after the build process. - SDK=$(realpath .) LINUX_UAPI_SPLIT=1 DEBIAN_LINUX_HEADER=1 BUILD_KNET_CB=1 \ - KERNDIR=/usr/src/linux-headers-$(KVER_COMMON) \ - KERNEL_SRC=/usr/src/linux-headers-$(KVER_ARCH) \ - $(MAKE) -C systems/linux/user/x86-smp_generic_64-2_6 clean - - SDK=$(realpath .) BUILD_KNET_CB=1 \ - KDIR=/usr/src/linux-headers-$(KVER_COMMON) \ - $(MAKE) -C sdklt/ clean - - dh_clean - -install: DH_OPTIONS= -install: build - dh_testdir - dh_testroot - dh_prep - dh_installdirs - dh_install - -# Build architecture-independent files here. -# Pass -i to all debhelper commands in this target to reduce clutter. -binary-indep: build install - dh_testdir -i - dh_testroot -i - dh_installchangelogs -i - dh_installdocs -i - dh_installexamples -i -# dh_install -i -# dh_installmenu -i -# dh_installdebconf -i -# dh_installlogrotate -i -# dh_installemacsen -i -# dh_installpam -i -# dh_installmime -i -# dh_installinit -i -# dh_installcron -i -# dh_installinfo -i - dh_installman -i - dh_link -i - dh_compress -i - dh_fixperms -i - dh_installdeb -i -# dh_perl -i -# dh_makeshlibs -i - dh_installdeb -i - dh_shlibdeps -i - dh_gencontrol -i - dh_md5sums -i - dh_builddeb -i --filename $(PKG_NAME) - -# Build architecture-dependent files here. -binary-arch: build install - dh_testdir -s - dh_testroot -s -# dh_installdebconf -s - - dh_installdocs -s - dh_installexamples -s - dh_installmenu -s -# dh_installlogrotate -s -# dh_installemacsen -s -# dh_installpam -s -# dh_installmime -s - dh_installmodules -s - dh_systemd_enable -s - dh_installinit -s - dh_systemd_start -s - dh_installcron -s -# dh_installman -s - dh_installinfo -s - dh_installchangelogs -s - dh_strip -s - dh_link -s - dh_compress -s - dh_fixperms -s - dh_makeshlibs -s - dh_installdeb -s -# dh_perl -s - dh_shlibdeps -s - dh_gencontrol -s -- -n"$(PKG_NAME)" - dh_md5sums -s - dh_builddeb -s --filename $(PKG_NAME) - -binary: binary-indep binary-arch -.PHONY: build clean binary-indep binary-arch binary install configure binary-modules kdist kdist_configure kdist_image kdist_clean diff --git a/platform/broadcom/saibcm-modules/include/sal/types.h b/platform/broadcom/saibcm-modules/include/sal/types.h deleted file mode 100644 index e4f17a2e4e8..00000000000 --- a/platform/broadcom/saibcm-modules/include/sal/types.h +++ /dev/null @@ -1,176 +0,0 @@ -/* - * $Id: types.h,v 1.3 Broadcom SDK $ - * - * $Copyright: 2017-2025 Broadcom Inc. All rights reserved. - * - * Permission is granted to use, copy, modify and/or distribute this - * software under either one of the licenses below. - * - * License Option 1: GPL - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License, version 2, as - * published by the Free Software Foundation (the "GPL"). - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License version 2 (GPLv2) for more details. - * - * You should have received a copy of the GNU General Public License - * version 2 (GPLv2) along with this source code. - * - * - * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license - * - * This software is governed by the Broadcom Open Network Switch APIs license: - * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ - * - * - * - * File: types.h - * Purpose: SAL type definitions - */ - -#ifndef _SAL_TYPES_H -#define _SAL_TYPES_H - -/* - * Define platform-independent types - */ - -#ifndef TRUE -#define TRUE 1 -#endif - -#ifndef FALSE -#define FALSE 0 -#endif - -#ifndef NULL -#define NULL 0 -#endif - -#ifndef DONT_CARE -#define DONT_CARE 0 -#endif - -#define VOL volatile - -/* - * 64-bit type - */ - -#ifdef LONGS_ARE_64BITS - -#define COMPILER_64BIT -#define COMPILER_UINT64 unsigned long -#define u64_H(v) (((uint32 *) &(v))[u64_MSW]) -#define u64_L(v) (((uint32 *) &(v))[u64_LSW]) - -#else /* !LONGS_ARE_64BITS */ - -#define COMPILER_64BIT -#define COMPILER_UINT64 unsigned long long -#define u64_H(v) (((uint32 *) &(v))[u64_MSW]) -#define u64_L(v) (((uint32 *) &(v))[u64_LSW]) - -#endif /* LONGS_ARE_64BITS */ - -/* - * Define unsigned and signed integers with guaranteed sizes. - * Adjust if your compiler uses different sizes for short or int. - */ - -typedef unsigned char uint8; /* 8-bit quantity */ -typedef unsigned short uint16; /* 16-bit quantity */ -typedef unsigned int uint32; /* 32-bit quantity */ -typedef COMPILER_UINT64 uint64; /* 64-bit quantity */ - -typedef signed char int8; /* 8-bit quantity */ -typedef signed short int16; /* 16-bit quantity */ -typedef signed int int32; /* 32-bit quantity */ - -#define BITS2BYTES(x) (((x) + 7) / 8) -#define BITS2WORDS(x) (((x) + 31) / 32) - -#define BYTES2BITS(x) ((x) * 8) -#define BYTES2WORDS(x) (((x) + 3) / 4) - -#define WORDS2BITS(x) ((x) * 32) -#define WORDS2BYTES(x) ((x) * 4) - -#define COUNTOF(ary) ((int) (sizeof (ary) / sizeof ((ary)[0]))) - -#ifdef PTRS_ARE_64BITS -typedef uint64 sal_vaddr_t; /* Virtual address (Host address) */ -typedef uint64 sal_paddr_t; /* Physical address (PCI address) */ -#define PTR_TO_INT(x) ((uint32)(((sal_vaddr_t)(x))&0xFFFFFFFF)) -#define PTR_HI_TO_INT(x) ((uint32)((((sal_vaddr_t)(x))>>32)&0xFFFFFFFF)) -#else -typedef uint32 sal_vaddr_t; /* Virtual address (Host address) */ -/* Physical address (PCI address) */ -#ifdef PHYS_ADDRS_ARE_64BITS -typedef uint64 sal_paddr_t; -#define PTR_HI_TO_INT(x) ((uint32)((((uint64)(x))>>32)&0xFFFFFFFF)) -#else -typedef uint32 sal_paddr_t; -#define PTR_HI_TO_INT(x) (0) -#endif -#define PTR_TO_INT(x) ((uint32)(x)) -#endif - -#define INT_TO_PTR(x) ((void *)((sal_vaddr_t)(x))) - -#define PTR_TO_UINTPTR(x) ((sal_vaddr_t)(x)) -#define UINTPTR_TO_PTR(x) ((void *)(x)) - -typedef union -{ - uint8 u8; - uint16 u16; - uint32 u32; - uint64 u64; - sal_paddr_t paddr; - sal_vaddr_t vaddr; - void *ptr; -} any_t; - -/* Device bus types */ -#define SAL_PCI_DEV_TYPE 0x00001 /* PCI device */ -#define SAL_SPI_DEV_TYPE 0x00002 /* SPI device */ -#define SAL_EB_DEV_TYPE 0x00004 /* EB device */ -#define SAL_ICS_DEV_TYPE 0x00008 /* ICS device */ -#define SAL_MII_DEV_TYPE 0x00010 /* MII device */ -#define SAL_RCPU_DEV_TYPE 0x00020 /* RCPU device */ -#define SAL_I2C_DEV_TYPE 0x00040 /* I2C device */ -#define SAL_AXI_DEV_TYPE 0x00080 /* AXI device */ -#define SAL_EMMI_DEV_TYPE 0x10000 /* EMMI device */ -#define SAL_COMPOSITE_DEV_TYPE 0x20000 /* Composite device, composed of sub-devices with buses */ -#define SAL_USER_DEV_TYPE 0x40000 /* User implemented method of access to the device */ -#define SAL_SUB_DEV_TYPE 0x80000 /* A sub-device (with a bus) of a composite device */ -#define SAL_DEV_BUS_TYPE_MASK 0xf00ff /* Odd for historical reasons */ - -/* Device types */ -#define SAL_SWITCH_DEV_TYPE 0x00100 /* Switch device */ -#define SAL_ETHER_DEV_TYPE 0x00200 /* Ethernet device */ -#define SAL_CPU_DEV_TYPE 0x00400 /* CPU device */ -#define SAL_DEV_TYPE_MASK 0x00f00 - -/* Access types */ -#define SAL_DEV_BUS_RD_16BIT 0x01000 /* 16 bit reads on bus */ -#define SAL_DEV_BUS_WR_16BIT 0x02000 /* 16 bit writes on bus */ -#define SAL_DEV_BUS_ALT 0x04000 /* Alternate access */ -#define SAL_DEV_BUS_MSI 0x08000 /* Message-signaled interrupts */ -#define SAL_DEV_FLAG_MASK 0x0f000 - -/* BDE reserved mask (cannot be used by SAL) */ -#define SAL_DEV_BDE_MASK 0xff000000 - -/* Backward compatibility */ -#define SAL_ET_DEV_TYPE SAL_MII_DEV_TYPE - -/* Special access addresses */ -#define SAL_DEV_OP_EMMI_INIT 0x0fff1000 - -#endif /* !_SAL_TYPES_H */ diff --git a/platform/broadcom/saibcm-modules/include/sdk_config.h b/platform/broadcom/saibcm-modules/include/sdk_config.h deleted file mode 100644 index 6cb0ce18964..00000000000 --- a/platform/broadcom/saibcm-modules/include/sdk_config.h +++ /dev/null @@ -1,55 +0,0 @@ -/* - * $Id: sdk_config.h,v 1.5 Broadcom SDK $ - * - * $Copyright: 2017-2025 Broadcom Inc. All rights reserved. - * - * Permission is granted to use, copy, modify and/or distribute this - * software under either one of the licenses below. - * - * License Option 1: GPL - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License, version 2, as - * published by the Free Software Foundation (the "GPL"). - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License version 2 (GPLv2) for more details. - * - * You should have received a copy of the GNU General Public License - * version 2 (GPLv2) along with this source code. - * - * - * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license - * - * This software is governed by the Broadcom Open Network Switch APIs license: - * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ - * - * - * - * - */ - -#ifndef __SDK_CONFIG_H__ -#define __SDK_CONFIG_H__ - -/* - * Include custom overrides - */ -#ifdef SDK_INCLUDE_CUSTOM_CONFIG -#include -#endif - - -/* - * Memory Barrier operation if required. - * Defaults to nothing. - */ -#ifndef SDK_CONFIG_MEMORY_BARRIER -#define SDK_CONFIG_MEMORY_BARRIER -#endif - - - -#endif /* __SDK_CONFIG_H__ */ diff --git a/platform/broadcom/saibcm-modules/include/soc/devids.h b/platform/broadcom/saibcm-modules/include/soc/devids.h deleted file mode 100644 index 00c38269565..00000000000 --- a/platform/broadcom/saibcm-modules/include/soc/devids.h +++ /dev/null @@ -1,2412 +0,0 @@ -/* - * $Id: devids.h,v 1.309 Broadcom SDK $ - * - * $Copyright: 2017-2025 Broadcom Inc. All rights reserved. - * - * Permission is granted to use, copy, modify and/or distribute this - * software under either one of the licenses below. - * - * License Option 1: GPL - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License, version 2, as - * published by the Free Software Foundation (the "GPL"). - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License version 2 (GPLv2) for more details. - * - * You should have received a copy of the GNU General Public License - * version 2 (GPLv2) along with this source code. - * - * - * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license - * - * This software is governed by the Broadcom Open Network Switch APIs license: - * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ - * - * - * - */ - -#ifndef _SOC_DEVIDS_H -#define _SOC_DEVIDS_H - -/* - * Defines PCI device and revision ID for every recognized device. - * All driver routines refer to this ID only. - */ - -#define BROADCOM_VENDOR_ID 0x14e4 - -/* Draco */ -#define BCM5690_DEVICE_ID 0x5690 -#define BCM5690_A0_REV_ID 1 -#define BCM5690_A1_REV_ID 2 -#define BCM5690_A2_REV_ID 3 - -/* Draco without HG (Medusa) */ -#define BCM5691_DEVICE_ID 0x5691 -#define BCM5691_A0_REV_ID 1 -#define BCM5691_A1_REV_ID 2 -#define BCM5691_A2_REV_ID 3 - -/* Draco without L3 */ -#define BCM5692_DEVICE_ID 0x5692 -#define BCM5692_A0_REV_ID 1 -#define BCM5692_A1_REV_ID 2 -#define BCM5692_A2_REV_ID 3 - -/* Draco without HG or L3 */ -#define BCM5693_DEVICE_ID 0x5693 -#define BCM5693_A0_REV_ID 1 -#define BCM5693_A1_REV_ID 2 -#define BCM5693_A2_REV_ID 3 - -/* Draco 1.5 */ -#define BCM5695_DEVICE_ID 0x5695 -#define BCM5695_A0_REV_ID 1 -#define BCM5695_A1_REV_ID 2 -#define BCM5695_B0_REV_ID 0x11 - -/* Draco 1.5 without HG */ -#define BCM5696_DEVICE_ID 0x5696 -#define BCM5696_A0_REV_ID 1 -#define BCM5696_A1_REV_ID 2 -#define BCM5696_B0_REV_ID 0x11 - -/* Draco 1.5 without L3 */ -#define BCM5697_DEVICE_ID 0x5697 -#define BCM5697_A0_REV_ID 1 -#define BCM5697_A1_REV_ID 2 -#define BCM5697_B0_REV_ID 0x11 - -/* Draco 1.5 without HG or L3 */ -#define BCM5698_DEVICE_ID 0x5698 -#define BCM5698_A0_REV_ID 1 -#define BCM5698_A1_REV_ID 2 -#define BCM5698_B0_REV_ID 0x11 - -/* Hercules with 8 ports */ -#define BCM5670_DEVICE_ID 0x5670 -#define BCM5670_A0_REV_ID 1 -#define BCM5670_A1_REV_ID 2 - -/* Hercules with 4 ports */ -#define BCM5671_DEVICE_ID 0x5671 -#define BCM5671_A0_REV_ID 1 -#define BCM5671_A1_REV_ID 2 -#define BCM5671_A2_REV_ID 3 /* Maxxus */ - -/* Hercules 1.5 with 8 ports */ -#define BCM5675_DEVICE_ID 0x5675 -#define BCM5675_A0_REV_ID 1 -#define BCM5675_A1_REV_ID 2 - -/* Hercules 1.5 with 4 ports */ -#define BCM5676_DEVICE_ID 0x5676 -#define BCM5676_A0_REV_ID 1 -#define BCM5676_A1_REV_ID 2 - -/* Lynx */ -#define BCM5673_DEVICE_ID 0x5673 -#define BCM5673_A0_REV_ID 1 -#define BCM5673_A1_REV_ID 2 -#define BCM5673_A2_REV_ID 3 - -/* Lynx 1.5 */ -#define BCM5674_DEVICE_ID 0x5674 -#define BCM5674_A0_REV_ID 1 - -/* Felix */ -#define BCM56100_DEVICE_ID 0xb100 -#define BCM56100_A0_REV_ID 1 -#define BCM56100_A1_REV_ID 2 -#define BCM56101_DEVICE_ID 0xb101 -#define BCM56101_A0_REV_ID 1 -#define BCM56101_A1_REV_ID 2 -#define BCM56102_DEVICE_ID 0xb102 -#define BCM56102_A0_REV_ID 1 -#define BCM56102_A1_REV_ID 2 -#define BCM56105_DEVICE_ID 0xb105 -#define BCM56105_A0_REV_ID 1 -#define BCM56105_A1_REV_ID 2 -#define BCM56106_DEVICE_ID 0xb106 -#define BCM56106_A0_REV_ID 1 -#define BCM56106_A1_REV_ID 2 -#define BCM56107_DEVICE_ID 0xb107 -#define BCM56107_A0_REV_ID 1 -#define BCM56107_A1_REV_ID 2 - -/* Felix 1.5 */ -#define BCM56110_DEVICE_ID 0xb110 -#define BCM56110_A0_REV_ID 1 -#define BCM56111_DEVICE_ID 0xb111 -#define BCM56111_A0_REV_ID 1 -#define BCM56112_DEVICE_ID 0xb112 -#define BCM56112_A0_REV_ID 1 -#define BCM56115_DEVICE_ID 0xb115 -#define BCM56115_A0_REV_ID 1 -#define BCM56116_DEVICE_ID 0xb116 -#define BCM56116_A0_REV_ID 1 -#define BCM56117_DEVICE_ID 0xb117 -#define BCM56117_A0_REV_ID 1 - -/* Helix */ -#define BCM56300_DEVICE_ID 0xb300 -#define BCM56300_A0_REV_ID 1 -#define BCM56300_A1_REV_ID 2 -#define BCM56300_B0_REV_ID 0x11 -#define BCM56300_B1_REV_ID 0x12 -#define BCM56301_DEVICE_ID 0xb301 -#define BCM56301_A0_REV_ID 1 -#define BCM56301_A1_REV_ID 2 -#define BCM56301_B0_REV_ID 0x11 -#define BCM56301_B1_REV_ID 0x12 -#define BCM56302_DEVICE_ID 0xb302 -#define BCM56302_A0_REV_ID 1 -#define BCM56302_A1_REV_ID 2 -#define BCM56302_B0_REV_ID 0x11 -#define BCM56302_B1_REV_ID 0x12 -#define BCM56303_DEVICE_ID 0xb303 -#define BCM56303_A1_REV_ID 2 -#define BCM56303_A0_REV_ID 1 -#define BCM56303_B0_REV_ID 0x11 -#define BCM56303_B1_REV_ID 0x12 -#define BCM56304_DEVICE_ID 0xb304 -#define BCM56304_A0_REV_ID 1 -#define BCM56304_A1_REV_ID 2 -#define BCM56304_B0_REV_ID 0x11 -#define BCM56304_B1_REV_ID 0x12 -#define BCM56404_DEVICE_ID 0xb404 -#define BCM56404_A0_REV_ID 1 -#define BCM56404_A1_REV_ID 2 -#define BCM56305_DEVICE_ID 0xb305 -#define BCM56305_A0_REV_ID 1 -#define BCM56305_A1_REV_ID 2 -#define BCM56305_B0_REV_ID 0x11 -#define BCM56305_B1_REV_ID 0x12 -#define BCM56306_DEVICE_ID 0xb306 -#define BCM56306_A0_REV_ID 1 -#define BCM56306_A1_REV_ID 2 -#define BCM56306_B0_REV_ID 0x11 -#define BCM56306_B1_REV_ID 0x12 -#define BCM56307_DEVICE_ID 0xb307 -#define BCM56307_A0_REV_ID 1 -#define BCM56307_A1_REV_ID 2 -#define BCM56307_B0_REV_ID 0x11 -#define BCM56307_B1_REV_ID 0x12 -#define BCM56308_DEVICE_ID 0xb308 -#define BCM56308_A0_REV_ID 1 -#define BCM56308_A1_REV_ID 2 -#define BCM56308_B0_REV_ID 0x11 -#define BCM56308_B1_REV_ID 0x12 -#define BCM56309_DEVICE_ID 0xb309 -#define BCM56309_A0_REV_ID 1 -#define BCM56309_A1_REV_ID 2 -#define BCM56309_B0_REV_ID 0x11 -#define BCM56309_B1_REV_ID 0x12 - -/* Helix 1.5 */ -#define BCM56310_DEVICE_ID 0xb310 -#define BCM56310_A0_REV_ID 1 -#define BCM56311_DEVICE_ID 0xb311 -#define BCM56311_A0_REV_ID 1 -#define BCM56312_DEVICE_ID 0xb312 -#define BCM56312_A0_REV_ID 1 -#define BCM56313_DEVICE_ID 0xb313 -#define BCM56313_A0_REV_ID 1 -#define BCM56314_DEVICE_ID 0xb314 -#define BCM56314_A0_REV_ID 1 -#define BCM56315_DEVICE_ID 0xb315 -#define BCM56315_A0_REV_ID 1 -#define BCM56316_DEVICE_ID 0xb316 -#define BCM56316_A0_REV_ID 1 -#define BCM56317_DEVICE_ID 0xb317 -#define BCM56317_A0_REV_ID 1 -#define BCM56318_DEVICE_ID 0xb318 -#define BCM56318_A0_REV_ID 1 -#define BCM56319_DEVICE_ID 0xb319 -#define BCM56319_A0_REV_ID 1 - -#ifndef EXCLUDE_BCM56324 -/* Helix 2 */ -#define BCM56322_DEVICE_ID 0xb322 -#define BCM56322_A0_REV_ID 1 -#define BCM56324_DEVICE_ID 0xb324 -#define BCM56324_A0_REV_ID 1 -#endif /* EXCLUDE_BCM56324 */ - -#define BCM53300_DEVICE_ID 0xb006 -#define BCM53300_A0_REV_ID 0x11 -#define BCM53300_A1_REV_ID 0x12 -#define BCM53301_DEVICE_ID 0xb206 -#define BCM53301_A0_REV_ID 0x11 -#define BCM53301_A1_REV_ID 0x12 -#define BCM53302_DEVICE_ID 0xb008 -#define BCM53302_A0_REV_ID 0x11 -#define BCM53302_A1_REV_ID 0x12 - -/* Firebolt */ -#define BCM56500_DEVICE_ID 0xb500 -#define BCM56500_A0_REV_ID 1 -#define BCM56500_A1_REV_ID 2 -#define BCM56500_B0_REV_ID 0x11 -#define BCM56500_B1_REV_ID 0x12 -#define BCM56500_B2_REV_ID 0x13 -#define BCM56501_DEVICE_ID 0xb501 -#define BCM56501_A0_REV_ID 1 -#define BCM56501_A1_REV_ID 2 -#define BCM56501_B0_REV_ID 0x11 -#define BCM56501_B1_REV_ID 0x12 -#define BCM56501_B2_REV_ID 0x13 -#define BCM56502_DEVICE_ID 0xb502 -#define BCM56502_A0_REV_ID 1 -#define BCM56502_A1_REV_ID 2 -#define BCM56502_B0_REV_ID 0x11 -#define BCM56502_B1_REV_ID 0x12 -#define BCM56502_B2_REV_ID 0x13 -#define BCM56503_DEVICE_ID 0xb503 -#define BCM56503_A0_REV_ID 1 -#define BCM56503_A1_REV_ID 2 -#define BCM56503_B0_REV_ID 0x11 -#define BCM56503_B1_REV_ID 0x12 -#define BCM56503_B2_REV_ID 0x13 -#define BCM56504_DEVICE_ID 0xb504 -#define BCM56504_A0_REV_ID 1 -#define BCM56504_A1_REV_ID 2 -#define BCM56504_B0_REV_ID 0x11 -#define BCM56504_B1_REV_ID 0x12 -#define BCM56504_B2_REV_ID 0x13 -#define BCM56505_DEVICE_ID 0xb505 -#define BCM56505_A0_REV_ID 1 -#define BCM56505_A1_REV_ID 2 -#define BCM56505_B0_REV_ID 0x11 -#define BCM56505_B1_REV_ID 0x12 -#define BCM56505_B2_REV_ID 0x13 -#define BCM56506_DEVICE_ID 0xb506 -#define BCM56506_A0_REV_ID 1 -#define BCM56506_A1_REV_ID 2 -#define BCM56506_B0_REV_ID 0x11 -#define BCM56506_B1_REV_ID 0x12 -#define BCM56506_B2_REV_ID 0x13 -#define BCM56507_DEVICE_ID 0xb507 -#define BCM56507_A0_REV_ID 1 -#define BCM56507_A1_REV_ID 2 -#define BCM56507_B0_REV_ID 0x11 -#define BCM56507_B1_REV_ID 0x12 -#define BCM56507_B2_REV_ID 0x13 -#define BCM56508_DEVICE_ID 0xb508 -#define BCM56508_A0_REV_ID 1 -#define BCM56508_A1_REV_ID 2 -#define BCM56508_B0_REV_ID 0x11 -#define BCM56508_B1_REV_ID 0x12 -#define BCM56508_B2_REV_ID 0x13 -#define BCM56509_DEVICE_ID 0xb509 -#define BCM56509_A0_REV_ID 1 -#define BCM56509_A1_REV_ID 2 -#define BCM56509_B0_REV_ID 0x11 -#define BCM56509_B1_REV_ID 0x12 -#define BCM56509_B2_REV_ID 0x13 - -/* Easyrider */ -#define BCM56600_DEVICE_ID 0xb600 -#define BCM56600_A0_REV_ID 1 -#define BCM56600_B0_REV_ID 0x11 -#define BCM56600_C0_REV_ID 0x21 -#define BCM56601_DEVICE_ID 0xb601 -#define BCM56601_A0_REV_ID 1 -#define BCM56601_B0_REV_ID 0x11 -#define BCM56601_C0_REV_ID 0x21 -#define BCM56602_DEVICE_ID 0xb602 -#define BCM56602_A0_REV_ID 1 -#define BCM56602_B0_REV_ID 0x11 -#define BCM56602_C0_REV_ID 0x21 -#define BCM56603_DEVICE_ID 0xb603 -#define BCM56603_A0_REV_ID 1 -#define BCM56603_B0_REV_ID 0x11 -#define BCM56603_C0_REV_ID 0x21 -#define BCM56605_DEVICE_ID 0xb605 -#define BCM56605_A0_REV_ID 1 -#define BCM56605_B0_REV_ID 0x11 -#define BCM56605_C0_REV_ID 0x21 -#define BCM56606_DEVICE_ID 0xb606 -#define BCM56606_A0_REV_ID 1 -#define BCM56606_B0_REV_ID 0x11 -#define BCM56606_C0_REV_ID 0x21 -#define BCM56607_DEVICE_ID 0xb607 -#define BCM56607_A0_REV_ID 1 -#define BCM56607_B0_REV_ID 0x11 -#define BCM56607_C0_REV_ID 0x21 -#define BCM56608_DEVICE_ID 0xb608 -#define BCM56608_A0_REV_ID 1 -#define BCM56608_B0_REV_ID 0x11 -#define BCM56608_C0_REV_ID 0x21 - -/* Goldwing */ -#define BCM56580_DEVICE_ID 0xb580 -#define BCM56580_A0_REV_ID 1 - -/* HUMV */ -#define BCM56700_DEVICE_ID 0xb700 -#define BCM56700_A0_REV_ID 1 -#define BCM56701_DEVICE_ID 0xb701 -#define BCM56701_A0_REV_ID 1 - -/* Bradley */ -#define BCM56800_DEVICE_ID 0xb800 -#define BCM56800_A0_REV_ID 1 -#define BCM56801_DEVICE_ID 0xb801 -#define BCM56801_A0_REV_ID 1 -#define BCM56802_DEVICE_ID 0xb802 -#define BCM56802_A0_REV_ID 1 -#define BCM56803_DEVICE_ID 0xb803 -#define BCM56803_A0_REV_ID 1 - -/* Raven */ -#define BCM56224_DEVICE_ID 0xb224 -#define BCM56224_A0_REV_ID 1 -#define BCM56224_B0_REV_ID 0x11 -#define BCM56225_DEVICE_ID 0xb225 -#define BCM56225_A0_REV_ID 1 -#define BCM56225_B0_REV_ID 0x11 -#define BCM56226_DEVICE_ID 0xb226 -#define BCM56226_A0_REV_ID 1 -#define BCM56226_B0_REV_ID 0x11 -#define BCM56227_DEVICE_ID 0xb227 -#define BCM56227_A0_REV_ID 1 -#define BCM56227_B0_REV_ID 0x11 -#define BCM56228_DEVICE_ID 0xb228 -#define BCM56228_A0_REV_ID 1 -#define BCM56228_B0_REV_ID 0x11 -#define BCM56229_DEVICE_ID 0xb229 -#define BCM56229_A0_REV_ID 1 -#define BCM56229_B0_REV_ID 0x11 -#define BCM56024_DEVICE_ID 0xb024 -#define BCM56024_A0_REV_ID 1 -#define BCM56024_B0_REV_ID 0x11 -#define BCM56025_DEVICE_ID 0xb025 -#define BCM56025_A0_REV_ID 1 -#define BCM56025_B0_REV_ID 0x11 -#define BCM53724_DEVICE_ID 0xc724 -#define BCM53724_A0_REV_ID 1 -#define BCM53724_B0_REV_ID 0x11 -#define BCM53726_DEVICE_ID 0xc726 -#define BCM53726_A0_REV_ID 1 -#define BCM53726_B0_REV_ID 0x11 - -/* Hawkeye */ -#define BCM53312_DEVICE_ID 0xc312 -#define BCM53312_A0_REV_ID 1 -#define BCM53312_B0_REV_ID 0x11 -#define BCM53313_DEVICE_ID 0xc313 -#define BCM53313_A0_REV_ID 1 -#define BCM53313_B0_REV_ID 0x11 -#define BCM53314_DEVICE_ID 0xc314 -#define BCM53314_A0_REV_ID 1 -#define BCM53314_B0_REV_ID 0x11 - -/* Hawkeye EEE */ -#define BCM53322_DEVICE_ID 0xc322 -#define BCM53322_A0_REV_ID 1 -#define BCM53323_DEVICE_ID 0xc323 -#define BCM53323_A0_REV_ID 1 -#define BCM53324_DEVICE_ID 0xc324 -#define BCM53324_A0_REV_ID 1 - - -/* Raptor */ -#define BCM56218_DEVICE_ID 0xB218 -#define BCM56218_A0_REV_ID 1 -#define BCM56218_A1_REV_ID 2 -#define BCM56218_A2_REV_ID 3 -#define BCM56218X_DEVICE_ID 0xc710 -#define BCM56218X_A0_REV_ID 1 -#define BCM56218X_A1_REV_ID 2 -#define BCM56218X_A2_REV_ID 3 -#define BCM56219_DEVICE_ID 0xB219 -#define BCM56219_A0_REV_ID 1 -#define BCM56219_A1_REV_ID 2 -#define BCM56219_A2_REV_ID 3 -#define BCM56218R_DEVICE_ID 0xB21A -#define BCM56218R_A0_REV_ID 1 -#define BCM56218R_A1_REV_ID 2 -#define BCM56218R_A2_REV_ID 3 -#define BCM56219R_DEVICE_ID 0xB21B -#define BCM56219R_A0_REV_ID 1 -#define BCM56219R_A1_REV_ID 2 -#define BCM56219R_A2_REV_ID 3 -#define BCM56214_DEVICE_ID 0xB214 -#define BCM56214_A0_REV_ID 1 -#define BCM56214_A1_REV_ID 2 -#define BCM56214_A2_REV_ID 3 -#define BCM56215_DEVICE_ID 0xB215 -#define BCM56215_A0_REV_ID 1 -#define BCM56215_A1_REV_ID 2 -#define BCM56215_A2_REV_ID 3 -#define BCM56214R_DEVICE_ID 0xB21C -#define BCM56214R_A0_REV_ID 1 -#define BCM56214R_A1_REV_ID 2 -#define BCM56214R_A2_REV_ID 3 -#define BCM56215R_DEVICE_ID 0xB21D -#define BCM56215R_A0_REV_ID 1 -#define BCM56215R_A1_REV_ID 2 -#define BCM56215R_A2_REV_ID 3 -#define BCM56216_DEVICE_ID 0xB216 -#define BCM56216_A0_REV_ID 1 -#define BCM56216_A1_REV_ID 2 -#define BCM56216_A2_REV_ID 3 -#define BCM56217_DEVICE_ID 0xB217 -#define BCM56217_A0_REV_ID 1 -#define BCM56217_A1_REV_ID 2 -#define BCM56217_A2_REV_ID 3 -#define BCM56212_DEVICE_ID 0xB212 -#define BCM56212_A0_REV_ID 1 -#define BCM56212_A1_REV_ID 2 -#define BCM56212_A2_REV_ID 3 -#define BCM56213_DEVICE_ID 0xB213 -#define BCM56213_A0_REV_ID 1 -#define BCM56213_A1_REV_ID 2 -#define BCM56213_A2_REV_ID 3 -#define BCM53718_DEVICE_ID 0xC71A -#define BCM53718_A0_REV_ID 1 -#define BCM53718_A1_REV_ID 2 -#define BCM53718_A2_REV_ID 3 -#define BCM53714_DEVICE_ID 0xC71B -#define BCM53714_A0_REV_ID 1 -#define BCM53714_A1_REV_ID 2 -#define BCM53714_A2_REV_ID 3 -#define BCM53716_DEVICE_ID 0xC716 -#define BCM53716_A0_REV_ID 1 -#define BCM53716_A1_REV_ID 2 -#define BCM53716_A2_REV_ID 3 -#define BCM56018_DEVICE_ID 0xB018 -#define BCM56018_A0_REV_ID 1 -#define BCM56018_A1_REV_ID 2 -#define BCM56018_A2_REV_ID 3 -#define BCM56014_DEVICE_ID 0xB014 -#define BCM56014_A0_REV_ID 1 -#define BCM56014_A1_REV_ID 2 -#define BCM56014_A2_REV_ID 3 - -/* Firebolt2 */ -#define BCM56510_DEVICE_ID 0xb510 -#define BCM56510_A0_REV_ID 1 -#define BCM56511_DEVICE_ID 0xb511 -#define BCM56511_A0_REV_ID 1 -#define BCM56512_DEVICE_ID 0xb512 -#define BCM56512_A0_REV_ID 1 -#define BCM56513_DEVICE_ID 0xb513 -#define BCM56513_A0_REV_ID 1 -#define BCM56514_DEVICE_ID 0xb514 -#define BCM56514_A0_REV_ID 1 -#define BCM56516_DEVICE_ID 0xb516 -#define BCM56516_A0_REV_ID 1 -#define BCM56517_DEVICE_ID 0xb517 -#define BCM56517_A0_REV_ID 1 -#define BCM56518_DEVICE_ID 0xb518 -#define BCM56518_A0_REV_ID 1 -#define BCM56519_DEVICE_ID 0xb519 -#define BCM56519_A0_REV_ID 1 - -/* Triumph */ -#define BCM56620_DEVICE_ID 0xb620 -#define BCM56620_A0_REV_ID 1 -#define BCM56620_A1_REV_ID 2 -#define BCM56620_B0_REV_ID 0x11 -#define BCM56620_B1_REV_ID 0x12 -#define BCM56620_B2_REV_ID 0x13 -#define BCM56624_DEVICE_ID 0xb624 -#define BCM56624_A0_REV_ID 1 -#define BCM56624_A1_REV_ID 2 -#define BCM56624_B0_REV_ID 0x11 -#define BCM56624_B1_REV_ID 0x12 -#define BCM56624_B2_REV_ID 0x13 -#define BCM56626_DEVICE_ID 0xb626 -#define BCM56626_A0_REV_ID 1 -#define BCM56626_A1_REV_ID 2 -#define BCM56626_B0_REV_ID 0x11 -#define BCM56626_B1_REV_ID 0x12 -#define BCM56626_B2_REV_ID 0x13 -#define BCM56628_DEVICE_ID 0xb628 -#define BCM56628_A0_REV_ID 1 -#define BCM56628_A1_REV_ID 2 -#define BCM56628_B0_REV_ID 0x11 -#define BCM56628_B1_REV_ID 0x12 -#define BCM56628_B2_REV_ID 0x13 -#define BCM56629_DEVICE_ID 0xb629 -#define BCM56629_A0_REV_ID 1 -#define BCM56629_A1_REV_ID 2 -#define BCM56629_B0_REV_ID 0x11 -#define BCM56629_B1_REV_ID 0x12 -#define BCM56629_B2_REV_ID 0x13 - -/* Valkyrie */ -#define BCM56680_DEVICE_ID 0xb680 -#define BCM56680_A0_REV_ID 1 -#define BCM56680_A1_REV_ID 2 -#define BCM56680_B0_REV_ID 0x11 -#define BCM56680_B1_REV_ID 0x12 -#define BCM56680_B2_REV_ID 0x13 -#define BCM56684_DEVICE_ID 0xb684 -#define BCM56684_A0_REV_ID 1 -#define BCM56684_A1_REV_ID 2 -#define BCM56684_B0_REV_ID 0x11 -#define BCM56684_B1_REV_ID 0x12 -#define BCM56684_B2_REV_ID 0x13 -#define BCM56686_DEVICE_ID 0xb686 -#define BCM56686_B0_REV_ID 0x11 -#define BCM56686_B1_REV_ID 0x12 -#define BCM56686_B2_REV_ID 0x13 - -/* Scorpion */ -#define BCM56820_DEVICE_ID 0xb820 -#define BCM56820_A0_REV_ID 1 -#define BCM56820_B0_REV_ID 0x11 -#define BCM56821_DEVICE_ID 0xb821 -#define BCM56821_A0_REV_ID 1 -#define BCM56821_B0_REV_ID 0x11 -#define BCM56822_DEVICE_ID 0xb822 -#define BCM56822_A0_REV_ID 1 -#define BCM56822_B0_REV_ID 0x11 -#define BCM56823_DEVICE_ID 0xb823 -#define BCM56823_A0_REV_ID 1 -#define BCM56823_B0_REV_ID 0x11 -#define BCM56825_DEVICE_ID 0xb825 -#define BCM56825_B0_REV_ID 0x11 - -/* HUMV Plus */ -#define BCM56720_DEVICE_ID 0xb720 -#define BCM56720_A0_REV_ID 1 -#define BCM56720_B0_REV_ID 0x11 -#define BCM56721_DEVICE_ID 0xb721 -#define BCM56721_A0_REV_ID 1 -#define BCM56721_B0_REV_ID 0x11 - -/* Conqueror */ -#define BCM56725_DEVICE_ID 0xb725 -#define BCM56725_A0_REV_ID 1 -#define BCM56725_B0_REV_ID 0x11 - -/* Triumph2 */ -#define BCM56630_DEVICE_ID 0xb630 -#define BCM56630_A0_REV_ID 1 -#define BCM56630_B0_REV_ID 0x11 -#define BCM56634_DEVICE_ID 0xb634 -#define BCM56634_A0_REV_ID 1 -#define BCM56634_B0_REV_ID 0x11 -#define BCM56636_DEVICE_ID 0xb636 -#define BCM56636_A0_REV_ID 1 -#define BCM56636_B0_REV_ID 0x11 -#define BCM56638_DEVICE_ID 0xb638 -#define BCM56638_A0_REV_ID 1 -#define BCM56638_B0_REV_ID 0x11 -#define BCM56639_DEVICE_ID 0xb639 -#define BCM56639_A0_REV_ID 1 -#define BCM56639_B0_REV_ID 0x11 - -/* Valkyrie2 */ -#define BCM56685_DEVICE_ID 0xb685 -#define BCM56685_A0_REV_ID 1 -#define BCM56685_B0_REV_ID 0x11 -#define BCM56689_DEVICE_ID 0xb689 -#define BCM56689_A0_REV_ID 1 -#define BCM56689_B0_REV_ID 0x11 - -/* Apollo */ -#define BCM56520_DEVICE_ID 0xb520 -#define BCM56520_A0_REV_ID 1 -#define BCM56520_B0_REV_ID 0x11 -#define BCM56521_DEVICE_ID 0xb521 -#define BCM56521_A0_REV_ID 1 -#define BCM56521_B0_REV_ID 0x11 -#define BCM56522_DEVICE_ID 0xb522 -#define BCM56522_A0_REV_ID 1 -#define BCM56522_B0_REV_ID 0x11 -#define BCM56524_DEVICE_ID 0xb524 -#define BCM56524_A0_REV_ID 1 -#define BCM56524_B0_REV_ID 0x11 -#define BCM56526_DEVICE_ID 0xb526 -#define BCM56526_A0_REV_ID 1 -#define BCM56526_B0_REV_ID 0x11 - -/* Firebolt 3 */ -#define BCM56534_DEVICE_ID 0xb534 -#define BCM56534_B0_REV_ID 0x11 -#define BCM56538_DEVICE_ID 0xb538 -#define BCM56538_B0_REV_ID 0x11 - -/* Enduro */ -#define BCM56331_DEVICE_ID 0xb331 -#define BCM56331_A0_REV_ID 1 -#define BCM56331_B0_REV_ID 0x11 -#define BCM56331_B1_REV_ID 0x12 -#define BCM56333_DEVICE_ID 0xb333 -#define BCM56333_A0_REV_ID 1 -#define BCM56333_B0_REV_ID 0x11 -#define BCM56333_B1_REV_ID 0x12 -#define BCM56334_DEVICE_ID 0xb334 -#define BCM56334_A0_REV_ID 1 -#define BCM56334_B0_REV_ID 0x11 -#define BCM56334_B1_REV_ID 0x12 -#define BCM56338_DEVICE_ID 0xb338 -#define BCM56338_A0_REV_ID 1 -#define BCM56338_B0_REV_ID 0x11 -#define BCM56338_B1_REV_ID 0x12 - -/* Helix 3 */ -#define BCM56320_DEVICE_ID 0xb320 -#define BCM56320_A0_REV_ID 1 -#define BCM56320_B0_REV_ID 0x11 -#define BCM56320_B1_REV_ID 0x12 -#define BCM56321_DEVICE_ID 0xb321 -#define BCM56321_A0_REV_ID 1 -#define BCM56321_B0_REV_ID 0x11 -#define BCM56321_B1_REV_ID 0x12 - - -/* FireScout */ -#define BCM56548H_DEVICE_ID 0xB54A -#define BCM56548H_A0_REV_ID 1 -#define BCM56548_DEVICE_ID 0xb548 -#define BCM56548_A0_REV_ID 1 -#define BCM56547_DEVICE_ID 0xb547 -#define BCM56547_A0_REV_ID 1 - -/* Helix 4 */ -#define BCM56346_DEVICE_ID 0xb346 -#define BCM56346_A0_REV_ID 1 -#define BCM56345_DEVICE_ID 0xb345 -#define BCM56345_A0_REV_ID 1 -#define BCM56344_DEVICE_ID 0xb344 -#define BCM56344_A0_REV_ID 1 -#define BCM56342_DEVICE_ID 0xb342 -#define BCM56342_A0_REV_ID 1 -#define BCM56340_DEVICE_ID 0xb340 -#define BCM56340_A0_REV_ID 1 - -/* Spiral */ -#define BCM56049_DEVICE_ID 0xb049 -#define BCM56049_A0_REV_ID 1 -#define BCM56048_DEVICE_ID 0xb048 -#define BCM56048_A0_REV_ID 1 -#define BCM56047_DEVICE_ID 0xb047 -#define BCM56047_A0_REV_ID 1 - -/* Ranger */ -#define BCM56042_DEVICE_ID 0xb042 -#define BCM56042_A0_REV_ID 1 -#define BCM56041_DEVICE_ID 0xb041 -#define BCM56041_A0_REV_ID 1 -#define BCM56040_DEVICE_ID 0xb040 -#define BCM56040_A0_REV_ID 1 - -/* Stardust */ -#define BCM56132_DEVICE_ID 0xb132 -#define BCM56132_A0_REV_ID 1 -#define BCM56132_B0_REV_ID 0x11 -#define BCM56132_B1_REV_ID 0x12 -#define BCM56134_DEVICE_ID 0xb134 -#define BCM56134_A0_REV_ID 1 -#define BCM56134_B0_REV_ID 0x11 -#define BCM56134_B1_REV_ID 0x12 - -/* Dagger */ -#define BCM56230_DEVICE_ID 0xb230 -#define BCM56230_B1_REV_ID 0x12 -#define BCM56231_DEVICE_ID 0xb231 -#define BCM56231_B1_REV_ID 0x12 - -/* Hurricane */ -#define BCM56140_DEVICE_ID 0xb140 -#define BCM56140_A0_REV_ID 1 -#define BCM56142_DEVICE_ID 0xb142 -#define BCM56142_A0_REV_ID 1 -#define BCM56143_DEVICE_ID 0xb143 -#define BCM56143_A0_REV_ID 1 -#define BCM56144_DEVICE_ID 0xb144 -#define BCM56144_A0_REV_ID 1 -#define BCM56146_DEVICE_ID 0xb146 -#define BCM56146_A0_REV_ID 1 -#define BCM56147_DEVICE_ID 0xb147 -#define BCM56147_A0_REV_ID 1 -#define BCM56149_DEVICE_ID 0xb149 -#define BCM56149_A0_REV_ID 1 - -/* Trident */ -#define BCM56840_DEVICE_ID 0xb840 -#define BCM56840_A0_REV_ID 1 -#define BCM56840_A1_REV_ID 2 -#define BCM56840_A2_REV_ID 3 -#define BCM56840_A3_REV_ID 4 -#define BCM56840_A4_REV_ID 5 -#define BCM56840_B0_REV_ID 0x11 -#define BCM56840_B1_REV_ID 0x12 -#define BCM56841_DEVICE_ID 0xb841 -#define BCM56841_A0_REV_ID 1 -#define BCM56841_A1_REV_ID 2 -#define BCM56841_A2_REV_ID 3 -#define BCM56841_A3_REV_ID 4 -#define BCM56841_A4_REV_ID 5 -#define BCM56841_B0_REV_ID 0x11 -#define BCM56841_B1_REV_ID 0x12 -#define BCM56843_DEVICE_ID 0xb843 -#define BCM56843_A0_REV_ID 1 -#define BCM56843_A1_REV_ID 2 -#define BCM56843_A2_REV_ID 3 -#define BCM56843_A3_REV_ID 4 -#define BCM56843_A4_REV_ID 5 -#define BCM56843_B0_REV_ID 0x11 -#define BCM56843_B1_REV_ID 0x12 -#define BCM56845_DEVICE_ID 0xb845 -#define BCM56845_A0_REV_ID 1 -#define BCM56845_A1_REV_ID 2 -#define BCM56845_A2_REV_ID 3 -#define BCM56845_A3_REV_ID 4 -#define BCM56845_A4_REV_ID 5 -#define BCM56845_B0_REV_ID 0x11 -#define BCM56845_B1_REV_ID 0x12 - -/* Titan */ -#define BCM56743_DEVICE_ID 0xb743 -#define BCM56743_A0_REV_ID 1 -#define BCM56743_A1_REV_ID 2 -#define BCM56743_A2_REV_ID 3 -#define BCM56743_A3_REV_ID 4 -#define BCM56743_A4_REV_ID 5 -#define BCM56743_B0_REV_ID 0x11 -#define BCM56743_B1_REV_ID 0x12 -#define BCM56745_DEVICE_ID 0xb745 -#define BCM56745_A0_REV_ID 1 -#define BCM56745_A1_REV_ID 2 -#define BCM56745_A2_REV_ID 3 -#define BCM56745_A3_REV_ID 4 -#define BCM56745_A4_REV_ID 5 -#define BCM56745_B0_REV_ID 0x11 -#define BCM56745_B1_REV_ID 0x12 - -/* Saber 2 */ -#define BCM56260_DEVICE_ID 0xb260 -#define BCM56260_A0_REV_ID 1 -#define BCM56260_B0_REV_ID 0x11 -#define BCM56261_DEVICE_ID 0xb261 -#define BCM56261_A0_REV_ID 1 -#define BCM56261_B0_REV_ID 0x11 -#define BCM56262_DEVICE_ID 0xb262 -#define BCM56262_A0_REV_ID 1 -#define BCM56262_B0_REV_ID 0x11 -#define BCM56263_DEVICE_ID 0xb263 -#define BCM56263_A0_REV_ID 1 -#define BCM56263_B0_REV_ID 0x11 - -#define BCM56265_DEVICE_ID 0xb265 -#define BCM56265_A0_REV_ID 1 -#define BCM56265_B0_REV_ID 0x11 -#define BCM56266_DEVICE_ID 0xb266 -#define BCM56266_A0_REV_ID 1 -#define BCM56266_B0_REV_ID 0x11 -#define BCM56267_DEVICE_ID 0xb267 -#define BCM56267_A0_REV_ID 1 -#define BCM56267_B0_REV_ID 0x11 -#define BCM56268_DEVICE_ID 0xb268 -#define BCM56268_A0_REV_ID 1 -#define BCM56268_B0_REV_ID 0x11 - -/*Dagger 2*/ -#define BCM56233_DEVICE_ID 0xb233 -#define BCM56233_B0_REV_ID 0x11 - -#define BCM56460_DEVICE_ID 0xb460 -#define BCM56460_A0_REV_ID 1 -#define BCM56460_B0_REV_ID 0x11 -#define BCM56461_DEVICE_ID 0xb461 -#define BCM56461_A0_REV_ID 1 -#define BCM56461_B0_REV_ID 0x11 -#define BCM56462_DEVICE_ID 0xb462 -#define BCM56462_A0_REV_ID 1 -#define BCM56462_B0_REV_ID 0x11 -#define BCM56463_DEVICE_ID 0xb463 -#define BCM56463_A0_REV_ID 1 -#define BCM56463_B0_REV_ID 0x11 - -#define BCM56465_DEVICE_ID 0xb465 -#define BCM56465_A0_REV_ID 1 -#define BCM56465_B0_REV_ID 0x11 -#define BCM56466_DEVICE_ID 0xb466 -#define BCM56466_A0_REV_ID 1 -#define BCM56466_B0_REV_ID 0x11 -#define BCM56467_DEVICE_ID 0xb467 -#define BCM56467_A0_REV_ID 1 -#define BCM56467_B0_REV_ID 0x11 -#define BCM56468_DEVICE_ID 0xb468 -#define BCM56468_A0_REV_ID 1 -#define BCM56468_B0_REV_ID 0x11 - -/* Metrolite */ -#define BCM56270_DEVICE_ID 0xb270 -#define BCM56270_A0_REV_ID 1 -#define BCM56271_DEVICE_ID 0xb271 -#define BCM56271_A0_REV_ID 1 -#define BCM56272_DEVICE_ID 0xb272 -#define BCM56272_A0_REV_ID 1 - -/* Beagle */ -#define BCM53460_DEVICE_ID 0x8460 -#define BCM53460_A0_REV_ID 1 -#define BCM53461_DEVICE_ID 0x8461 -#define BCM53461_A0_REV_ID 1 - -/* Trident Plus */ -#define BCM56842_DEVICE_ID 0xb842 -#define BCM56842_A0_REV_ID 1 -#define BCM56842_A1_REV_ID 2 -#define BCM56844_DEVICE_ID 0xb844 -#define BCM56844_A0_REV_ID 1 -#define BCM56844_A1_REV_ID 2 -#define BCM56846_DEVICE_ID 0xb846 -#define BCM56846_A0_REV_ID 1 -#define BCM56846_A1_REV_ID 2 -#define BCM56549_DEVICE_ID 0xb549 -#define BCM56549_A0_REV_ID 1 -#define BCM56549_A1_REV_ID 2 -#define BCM56053_DEVICE_ID 0xb053 -#define BCM56053_A0_REV_ID 1 -#define BCM56053_A1_REV_ID 2 -#define BCM56831_DEVICE_ID 0xb831 -#define BCM56831_A0_REV_ID 1 -#define BCM56831_A1_REV_ID 2 -#define BCM56835_DEVICE_ID 0xb835 -#define BCM56835_A0_REV_ID 1 -#define BCM56835_A1_REV_ID 2 -#define BCM56838_DEVICE_ID 0xb838 -#define BCM56838_A0_REV_ID 1 -#define BCM56838_A1_REV_ID 2 -#define BCM56847_DEVICE_ID 0xb847 -#define BCM56847_A0_REV_ID 1 -#define BCM56847_A1_REV_ID 2 -#define BCM56847_A2_REV_ID 3 -#define BCM56847_A3_REV_ID 4 -#define BCM56847_A4_REV_ID 5 -#define BCM56847_B0_REV_ID 0x11 -#define BCM56847_B1_REV_ID 0x12 -#define BCM56849_DEVICE_ID 0xb849 -#define BCM56849_A0_REV_ID 1 -#define BCM56849_A1_REV_ID 2 - -/* Titan Plus */ -#define BCM56742_DEVICE_ID 0xb742 -#define BCM56742_A0_REV_ID 1 -#define BCM56742_A1_REV_ID 2 -#define BCM56742_A2_REV_ID 3 -#define BCM56744_DEVICE_ID 0xb744 -#define BCM56744_A0_REV_ID 1 -#define BCM56744_A1_REV_ID 2 -#define BCM56746_DEVICE_ID 0xb746 -#define BCM56746_A0_REV_ID 1 -#define BCM56746_A1_REV_ID 2 - - -/* Triumph 3 */ -#define BCM56640_DEVICE_ID 0xb640 -#define BCM56640_A0_REV_ID 1 -#define BCM56640_A1_REV_ID 2 -#define BCM56640_B0_REV_ID 0x11 -#define BCM56643_DEVICE_ID 0xb643 -#define BCM56643_A0_REV_ID 1 -#define BCM56643_A1_REV_ID 2 -#define BCM56643_B0_REV_ID 0x11 -#define BCM56644_DEVICE_ID 0xb644 -#define BCM56644_A0_REV_ID 1 -#define BCM56644_A1_REV_ID 2 -#define BCM56644_B0_REV_ID 0x11 -#define BCM56648_DEVICE_ID 0xb648 -#define BCM56648_A0_REV_ID 1 -#define BCM56648_A1_REV_ID 2 -#define BCM56648_B0_REV_ID 0x11 -#define BCM56649_DEVICE_ID 0xb649 -#define BCM56649_A0_REV_ID 1 -#define BCM56649_A1_REV_ID 2 -#define BCM56649_B0_REV_ID 0x11 - -/* Apollo 2 */ -#define BCM56540_DEVICE_ID 0xb540 -#define BCM56540_A0_REV_ID 1 -#define BCM56540_A1_REV_ID 2 -#define BCM56540_B0_REV_ID 0x11 -#define BCM56541_DEVICE_ID 0xb541 -#define BCM56541_A0_REV_ID 1 -#define BCM56541_A1_REV_ID 2 -#define BCM56541_B0_REV_ID 0x11 -#define BCM56542_DEVICE_ID 0xb542 -#define BCM56542_A0_REV_ID 1 -#define BCM56542_A1_REV_ID 2 -#define BCM56542_B0_REV_ID 0x11 -#define BCM56543_DEVICE_ID 0xb543 -#define BCM56543_A0_REV_ID 1 -#define BCM56543_A1_REV_ID 2 -#define BCM56543_B0_REV_ID 0x11 -#define BCM56544_DEVICE_ID 0xb544 -#define BCM56544_A0_REV_ID 1 -#define BCM56544_A1_REV_ID 2 -#define BCM56544_B0_REV_ID 0x11 - -/* Firebolt 4 */ -#define BCM56545_DEVICE_ID 0xb545 -#define BCM56545_A0_REV_ID 1 -#define BCM56545_A1_REV_ID 2 -#define BCM56545_B0_REV_ID 0x11 -#define BCM56546_DEVICE_ID 0xb546 -#define BCM56546_A0_REV_ID 1 -#define BCM56546_A1_REV_ID 2 -#define BCM56546_B0_REV_ID 0x11 - -/* Ranger plus */ -#define BCM56044_DEVICE_ID 0xb044 -#define BCM56044_B0_REV_ID 0x11 -#define BCM56045_DEVICE_ID 0xb045 -#define BCM56045_A0_REV_ID 1 -#define BCM56045_A1_REV_ID 2 -#define BCM56045_B0_REV_ID 0x11 -#define BCM56046_DEVICE_ID 0xb046 -#define BCM56046_A0_REV_ID 1 -#define BCM56046_A1_REV_ID 2 -#define BCM56046_B0_REV_ID 0x11 - - -/* Katana */ -#define BCM56440_DEVICE_ID 0xb440 -#define BCM56440_A0_REV_ID 1 -#define BCM56440_B0_REV_ID 0x11 -#define BCM56441_DEVICE_ID 0xb441 -#define BCM56441_A0_REV_ID 1 -#define BCM56441_B0_REV_ID 0x11 -#define BCM56442_DEVICE_ID 0xb442 -#define BCM56442_A0_REV_ID 1 -#define BCM56442_B0_REV_ID 0x11 -#define BCM56443_DEVICE_ID 0xb443 -#define BCM56443_A0_REV_ID 1 -#define BCM56443_B0_REV_ID 0x11 -#define BCM56445_DEVICE_ID 0xb445 -#define BCM56445_A0_REV_ID 1 -#define BCM56445_B0_REV_ID 0x11 -#define BCM56446_DEVICE_ID 0xb446 -#define BCM56446_A0_REV_ID 1 -#define BCM56446_B0_REV_ID 0x11 -#define BCM56447_DEVICE_ID 0xb447 -#define BCM56447_A0_REV_ID 1 -#define BCM56447_B0_REV_ID 0x11 -#define BCM56448_DEVICE_ID 0xb448 -#define BCM56448_A0_REV_ID 1 -#define BCM56448_B0_REV_ID 0x11 -#define BCM56449_DEVICE_ID 0xb449 -#define BCM56449_A0_REV_ID 1 -#define BCM56449_B0_REV_ID 0x11 -#define BCM56240_DEVICE_ID 0xb240 -#define BCM56240_A0_REV_ID 1 -#define BCM56240_B0_REV_ID 0x11 -#define BCM56241_DEVICE_ID 0xb241 -#define BCM56241_A0_REV_ID 1 -#define BCM56241_B0_REV_ID 0x11 -#define BCM56242_DEVICE_ID 0xb242 -#define BCM56242_A0_REV_ID 1 -#define BCM56242_B0_REV_ID 0x11 -#define BCM56243_DEVICE_ID 0xb243 -#define BCM56243_A0_REV_ID 1 -#define BCM56243_B0_REV_ID 0x11 -#define BCM56245_DEVICE_ID 0xb245 -#define BCM56245_A0_REV_ID 1 -#define BCM56245_B0_REV_ID 0x11 -#define BCM56246_DEVICE_ID 0xb246 -#define BCM56246_A0_REV_ID 1 -#define BCM56246_B0_REV_ID 0x11 -#define BCM55440_DEVICE_ID 0xa440 -#define BCM55440_A0_REV_ID 1 -#define BCM55440_B0_REV_ID 0x11 -#define BCM55441_DEVICE_ID 0xa441 -#define BCM55441_A0_REV_ID 1 -#define BCM55441_B0_REV_ID 0x11 - -/* Katana 2 */ -#define BCM55450_DEVICE_ID 0xa450 -#define BCM55450_A0_REV_ID 1 -#define BCM55450_B0_REV_ID 0x11 -#define BCM55450_B1_REV_ID 0x12 - -#define BCM55455_DEVICE_ID 0xa455 -#define BCM55455_A0_REV_ID 1 -#define BCM55455_B0_REV_ID 0x11 -#define BCM55455_B1_REV_ID 0x12 - -#define BCM56248_DEVICE_ID 0xb248 -#define BCM56248_A0_REV_ID 1 -#define BCM56248_B0_REV_ID 0x11 -#define BCM56248_B1_REV_ID 0x12 - -#define BCM56450_DEVICE_ID 0xb450 -#define BCM56450_A0_REV_ID 1 -#define BCM56450_B0_REV_ID 0x11 -#define BCM56450_B1_REV_ID 0x12 - -#define BCM56452_DEVICE_ID 0xb452 -#define BCM56452_A0_REV_ID 1 -#define BCM56452_B0_REV_ID 0x11 -#define BCM56452_B1_REV_ID 0x12 - -#define BCM56454_DEVICE_ID 0xb454 -#define BCM56454_A0_REV_ID 1 -#define BCM56454_B0_REV_ID 0x11 -#define BCM56454_B1_REV_ID 0x12 - -#define BCM56455_DEVICE_ID 0xb455 -#define BCM56455_A0_REV_ID 1 -#define BCM56455_B0_REV_ID 0x11 -#define BCM56455_B1_REV_ID 0x12 - -#define BCM56456_DEVICE_ID 0xb456 -#define BCM56456_A0_REV_ID 1 -#define BCM56456_B0_REV_ID 0x11 -#define BCM56456_B1_REV_ID 0x12 - -#define BCM56457_DEVICE_ID 0xb457 -#define BCM56457_A0_REV_ID 1 -#define BCM56457_B0_REV_ID 0x11 -#define BCM56457_B1_REV_ID 0x12 - -#define BCM56458_DEVICE_ID 0xb458 -#define BCM56458_A0_REV_ID 1 -#define BCM56458_B0_REV_ID 0x11 -#define BCM56458_B1_REV_ID 0x12 - -/* Trident 2 */ -#define BCM56850_DEVICE_ID 0xb850 -#define BCM56850_A0_REV_ID 1 -#define BCM56850_A1_REV_ID 2 -#define BCM56850_A2_REV_ID 3 -#define BCM56851_DEVICE_ID 0xb851 -#define BCM56851_A0_REV_ID 1 -#define BCM56851_A1_REV_ID 2 -#define BCM56851_A2_REV_ID 3 -#define BCM56852_DEVICE_ID 0xb852 -#define BCM56852_A0_REV_ID 1 -#define BCM56852_A1_REV_ID 2 -#define BCM56852_A2_REV_ID 3 -#define BCM56853_DEVICE_ID 0xb853 -#define BCM56853_A0_REV_ID 1 -#define BCM56853_A1_REV_ID 2 -#define BCM56853_A2_REV_ID 3 -#define BCM56854_DEVICE_ID 0xb854 -#define BCM56854_A0_REV_ID 1 -#define BCM56854_A1_REV_ID 2 -#define BCM56854_A2_REV_ID 3 -#define BCM56855_DEVICE_ID 0xb855 -#define BCM56855_A0_REV_ID 1 -#define BCM56855_A1_REV_ID 2 -#define BCM56855_A2_REV_ID 3 -#define BCM56834_DEVICE_ID 0xb834 -#define BCM56834_A0_REV_ID 1 -#define BCM56834_A1_REV_ID 2 -#define BCM56834_A2_REV_ID 3 - -/* Trident 2+ */ -#define BCM56860_DEVICE_ID 0xb860 -#define BCM56860_A0_REV_ID 1 -#define BCM56860_A1_REV_ID 2 -#define BCM56861_DEVICE_ID 0xb861 -#define BCM56861_A0_REV_ID 1 -#define BCM56861_A1_REV_ID 2 -#define BCM56862_DEVICE_ID 0xb862 -#define BCM56862_A0_REV_ID 1 -#define BCM56862_A1_REV_ID 2 -#define BCM56864_DEVICE_ID 0xb864 -#define BCM56864_A0_REV_ID 1 -#define BCM56864_A1_REV_ID 2 -#define BCM56865_DEVICE_ID 0xb865 -#define BCM56865_A0_REV_ID 1 -#define BCM56865_A1_REV_ID 2 -#define BCM56866_DEVICE_ID 0xb866 -#define BCM56866_A0_REV_ID 1 -#define BCM56866_A1_REV_ID 2 -#define BCM56867_DEVICE_ID 0xb867 -#define BCM56867_A0_REV_ID 1 -#define BCM56867_A1_REV_ID 2 -#define BCM56868_DEVICE_ID 0xb868 -#define BCM56868_A0_REV_ID 1 -#define BCM56868_A1_REV_ID 2 -#define BCM56832_DEVICE_ID 0xb832 -#define BCM56832_A0_REV_ID 1 -#define BCM56832_A1_REV_ID 2 -#define BCM56833_DEVICE_ID 0xb833 -#define BCM56833_A0_REV_ID 1 -#define BCM56833_A1_REV_ID 2 -#define BCM56836_DEVICE_ID 0xb836 -#define BCM56836_A0_REV_ID 1 -#define BCM56836_A1_REV_ID 2 - - -/* Titan 2 */ -#define BCM56750_DEVICE_ID 0xb750 -#define BCM56750_A0_REV_ID 1 -#define BCM56750_A1_REV_ID 2 -#define BCM56750_A2_REV_ID 3 - -/* Scorpion 960 */ -#define BCM56830_DEVICE_ID 0xb830 -#define BCM56830_A0_REV_ID 1 -#define BCM56830_A1_REV_ID 2 -#define BCM56830_A2_REV_ID 3 - -/* Hurricane 2*/ -#define BCM56150_DEVICE_ID 0xb150 -#define BCM56150_A0_REV_ID 1 -#define BCM56151_DEVICE_ID 0xb151 -#define BCM56151_A0_REV_ID 1 -#define BCM56152_DEVICE_ID 0xb152 -#define BCM56152_A0_REV_ID 1 - -/* Wolfhound*/ -#define BCM53342_DEVICE_ID 0x8342 -#define BCM53342_A0_REV_ID 1 -#define BCM53343_DEVICE_ID 0x8343 -#define BCM53343_A0_REV_ID 1 -#define BCM53344_DEVICE_ID 0x8344 -#define BCM53344_A0_REV_ID 1 -#define BCM53346_DEVICE_ID 0x8346 -#define BCM53346_A0_REV_ID 1 -#define BCM53347_DEVICE_ID 0x8347 -#define BCM53347_A0_REV_ID 1 - -/* Foxhound*/ -#define BCM53333_DEVICE_ID 0x8333 -#define BCM53333_A0_REV_ID 1 -#define BCM53334_DEVICE_ID 0x8334 -#define BCM53334_A0_REV_ID 1 - -/* Deerhound*/ -#define BCM53393_DEVICE_ID 0x8393 -#define BCM53393_A0_REV_ID 1 -#define BCM53394_DEVICE_ID 0x8394 -#define BCM53394_A0_REV_ID 1 - -/* Greyhound , Ranger 2 */ -#define BCM53400_DEVICE_ID 0x8400 -#define BCM53400_A0_REV_ID 1 -#define BCM56060_DEVICE_ID 0xb060 -#define BCM56060_A0_REV_ID 1 -#define BCM56062_DEVICE_ID 0xb062 -#define BCM56062_A0_REV_ID 1 -#define BCM56063_DEVICE_ID 0xb063 -#define BCM56063_A0_REV_ID 1 -#define BCM56064_DEVICE_ID 0xb064 -#define BCM56064_A0_REV_ID 1 -#define BCM56065_DEVICE_ID 0xb065 -#define BCM56065_A0_REV_ID 1 -#define BCM56066_DEVICE_ID 0xb066 -#define BCM56066_A0_REV_ID 1 -#define BCM53401_DEVICE_ID 0x8401 -#define BCM53411_DEVICE_ID 0x8411 -#define BCM53401_A0_REV_ID 1 -#define BCM53402_DEVICE_ID 0x8402 -#define BCM53412_DEVICE_ID 0x8412 -#define BCM53402_A0_REV_ID 1 -#define BCM53403_DEVICE_ID 0x8403 -#define BCM53413_DEVICE_ID 0x8413 -#define BCM53403_A0_REV_ID 1 -#define BCM53404_DEVICE_ID 0x8404 -#define BCM53414_DEVICE_ID 0x8414 -#define BCM53404_A0_REV_ID 1 -#define BCM53405_DEVICE_ID 0x8405 -#define BCM53415_DEVICE_ID 0x8415 -#define BCM53405_A0_REV_ID 1 -#define BCM53406_DEVICE_ID 0x8406 -#define BCM53416_DEVICE_ID 0x8416 -#define BCM53406_A0_REV_ID 1 -#define BCM53408_DEVICE_ID 0x8408 -#define BCM53418_DEVICE_ID 0x8418 -#define BCM53408_A0_REV_ID 1 -#define BCM53365_DEVICE_ID 0x8365 -#define BCM53365_A0_REV_ID 1 -#define BCM53369_DEVICE_ID 0x8369 -#define BCM53369_A0_REV_ID 1 - -/* Elkhound */ -#define BCM53454_DEVICE_ID 0x8454 -#define BCM53455_DEVICE_ID 0x8455 -#define BCM53454_A0_REV_ID 1 -#define BCM53456_DEVICE_ID 0x8456 -#define BCM53457_DEVICE_ID 0x8457 -#define BCM53456_A0_REV_ID 1 - -/* Bloodhound */ -#define BCM53422_DEVICE_ID 0x8422 -#define BCM53422_A0_REV_ID 1 -#define BCM53424_DEVICE_ID 0x8424 -#define BCM53424_A0_REV_ID 1 -#define BCM53426_DEVICE_ID 0x8426 -#define BCM53426_A0_REV_ID 1 - -/* Tomahawk */ -#define BCM56960_DEVICE_ID 0xb960 -#define BCM56960_A0_REV_ID 1 -#define BCM56960_B0_REV_ID 0x11 -#define BCM56960_B1_REV_ID 0x12 -#define BCM56961_DEVICE_ID 0xb961 -#define BCM56961_A0_REV_ID 1 -#define BCM56961_B0_REV_ID 0x11 -#define BCM56961_B1_REV_ID 0x12 -#define BCM56962_DEVICE_ID 0xb962 -#define BCM56962_A0_REV_ID 1 -#define BCM56962_B0_REV_ID 0x11 -#define BCM56962_B1_REV_ID 0x12 -#define BCM56963_DEVICE_ID 0xb963 -#define BCM56963_A0_REV_ID 1 -#define BCM56963_B0_REV_ID 0x11 -#define BCM56963_B1_REV_ID 0x12 -#define BCM56930_DEVICE_ID 0xb930 -#define BCM56930_A0_REV_ID 1 -#define BCM56930_B0_REV_ID 0x11 -#define BCM56930_B1_REV_ID 0x12 -#define BCM56930_C0_REV_ID 0x21 -#define BCM56931_DEVICE_ID 0xb931 -#define BCM56931_A0_REV_ID 1 -#define BCM56931_B0_REV_ID 0x11 -#define BCM56931_C0_REV_ID 0x21 -#define BCM56935_DEVICE_ID 0xb935 -#define BCM56935_A0_REV_ID 1 -#define BCM56935_B0_REV_ID 0x11 -#define BCM56935_C0_REV_ID 0x21 -#define BCM56936_DEVICE_ID 0xb936 -#define BCM56936_A0_REV_ID 1 -#define BCM56936_B0_REV_ID 0x11 -#define BCM56936_C0_REV_ID 0x21 -#define BCM56939_DEVICE_ID 0xb939 -#define BCM56939_A0_REV_ID 1 -#define BCM56939_B0_REV_ID 0x11 -#define BCM56939_C0_REV_ID 0x21 - -/* Ranger3+ */ -#define BCM56168_DEVICE_ID 0xb168 -#define BCM56168_A0_REV_ID 1 -#define BCM56168_B0_REV_ID 0x11 -#define BCM56168_B1_REV_ID 0x12 -#define BCM56169_DEVICE_ID 0xb169 -#define BCM56169_A0_REV_ID 1 -#define BCM56169_B0_REV_ID 0x11 -#define BCM56169_B1_REV_ID 0x12 - -/* Tomahawk 3 */ -#define BCM56980_DEVICE_ID_MASK 0xFFF0 -#define BCM56980_DEVICE_ID 0xb980 -#define BCM56980_A0_REV_ID 1 -#define BCM56980_B0_REV_ID 0x11 -#define BCM56981_DEVICE_ID 0xb981 -#define BCM56981_A0_REV_ID 1 -#define BCM56981_B0_REV_ID 0x11 -#define BCM56982_DEVICE_ID 0xb982 -#define BCM56982_A0_REV_ID 1 -#define BCM56982_B0_REV_ID 0x11 -#define BCM56983_DEVICE_ID 0xb983 -#define BCM56983_A0_REV_ID 1 -#define BCM56983_B0_REV_ID 0x11 -#define BCM56984_DEVICE_ID 0xb984 -#define BCM56984_A0_REV_ID 1 -#define BCM56984_B0_REV_ID 0x11 - -/* Titanhawk */ -#define BCM56968_DEVICE_ID 0xb968 -#define BCM56968_A0_REV_ID 1 -#define BCM56968_B0_REV_ID 0x11 -#define BCM56968_B1_REV_ID 0x12 - -/* Hurricane 3 */ -#define BCM56160_DEVICE_ID 0xb160 -#define BCM56160_A0_REV_ID 1 -#define BCM56160_B0_REV_ID 0x11 -#define BCM56162_DEVICE_ID 0xb162 -#define BCM56162_A0_REV_ID 1 -#define BCM56162_B0_REV_ID 0x11 - -/* Hurricane3 Lite */ -#define BCM56163_DEVICE_ID 0xb163 -#define BCM56163_A0_REV_ID 1 -#define BCM56163_B0_REV_ID 0x11 -#define BCM56164_DEVICE_ID 0xb164 -#define BCM56164_A0_REV_ID 1 -#define BCM56164_B0_REV_ID 0x11 -#define BCM56166_DEVICE_ID 0xb166 -#define BCM56166_A0_REV_ID 1 -#define BCM56166_B0_REV_ID 0x11 - -/* Hurricane4 */ -#define BCM56273_DEVICE_ID 0xb273 -#define BCM56273_A0_REV_ID 1 -#define BCM56273_A1_REV_ID 2 - -#define BCM56274_DEVICE_ID 0xb274 -#define BCM56274_A0_REV_ID 1 -#define BCM56274_A1_REV_ID 2 - -#define BCM56275_DEVICE_ID 0xb275 -#define BCM56275_A0_REV_ID 1 -#define BCM56275_A1_REV_ID 2 - -#define BCM56276_DEVICE_ID 0xb276 -#define BCM56276_A0_REV_ID 1 -#define BCM56276_A1_REV_ID 2 - -#define BCM56277_DEVICE_ID 0xb277 -#define BCM56277_A0_REV_ID 1 -#define BCM56277_A1_REV_ID 2 - -#define BCM56278_DEVICE_ID 0xb278 -#define BCM56278_A0_REV_ID 1 -#define BCM56278_A1_REV_ID 2 - -#define BCM56279_DEVICE_ID 0xb279 -#define BCM56279_A1_REV_ID 2 - -#define BCM56575_DEVICE_ID 0xb575 -#define BCM56575_A1_REV_ID 2 - -#define BCM56175_DEVICE_ID 0xb175 -#define BCM56175_A1_REV_ID 2 - -#define BCM56176_DEVICE_ID 0xb176 -#define BCM56176_A1_REV_ID 2 - -/* Buckhound */ -#define BCM53440_DEVICE_ID 0x8440 -#define BCM53440_A0_REV_ID 1 -#define BCM53440_B0_REV_ID 0x11 -#define BCM53442_DEVICE_ID 0x8442 -#define BCM53442_A0_REV_ID 1 -#define BCM53442_B0_REV_ID 0x11 -#define BCM53443_DEVICE_ID 0x8443 -#define BCM53443_A0_REV_ID 1 -#define BCM53443_B0_REV_ID 0x11 - -/* Foxhound2 */ -#define BCM53434_DEVICE_ID 0x8434 -#define BCM53434_A0_REV_ID 1 -#define BCM53434_B0_REV_ID 0x11 - -/* Apache */ -#define BCM56560_DEVICE_ID 0xb560 -#define BCM56560_A0_REV_ID 1 -#define BCM56560_B0_REV_ID 0x11 - -#define BCM56561_DEVICE_ID 0xb561 -#define BCM56561_A0_REV_ID 1 -#define BCM56561_B0_REV_ID 0x11 - -#define BCM56562_DEVICE_ID 0xb562 -#define BCM56562_A0_REV_ID 1 -#define BCM56562_B0_REV_ID 0x11 - -/* MONTEREY */ -#define BCM56670_DEVICE_ID 0xb670 -#define BCM56670_A0_REV_ID 1 -#define BCM56670_B0_REV_ID 0x11 -#define BCM56670_C0_REV_ID 0x21 - - -#define BCM56671_DEVICE_ID 0xb671 -#define BCM56671_A0_REV_ID 1 -#define BCM56671_B0_REV_ID 0x11 -#define BCM56671_C0_REV_ID 0x21 - -#define BCM56672_DEVICE_ID 0xb672 -#define BCM56672_A0_REV_ID 1 -#define BCM56672_B0_REV_ID 0x11 -#define BCM56672_C0_REV_ID 0x21 - -#define BCM56675_DEVICE_ID 0xb675 -#define BCM56675_A0_REV_ID 1 -#define BCM56675_B0_REV_ID 0x11 -#define BCM56675_C0_REV_ID 0x21 - -/* WOLFHOUND3 PLUS */ -#define BCM53650_DEVICE_ID 0x8650 -#define BCM53650_A0_REV_ID 1 -#define BCM53650_B0_REV_ID 0x11 -#define BCM53650_C0_REV_ID 0x21 - -#define BCM53651_DEVICE_ID 0x8651 -#define BCM53651_A0_REV_ID 1 -#define BCM53651_B0_REV_ID 0x11 -#define BCM53651_C0_REV_ID 0x21 - -#define BCM53652_DEVICE_ID 0x8652 -#define BCM53652_A0_REV_ID 1 -#define BCM53652_B0_REV_ID 0x11 -#define BCM53652_C0_REV_ID 0x21 - -#define BCM53653_DEVICE_ID 0x8653 -#define BCM53653_A0_REV_ID 1 -#define BCM53653_B0_REV_ID 0x11 -#define BCM53653_C0_REV_ID 0x21 - -#define BCM53654_DEVICE_ID 0x8654 -#define BCM53654_A0_REV_ID 1 -#define BCM53654_B0_REV_ID 0x11 -#define BCM53654_C0_REV_ID 0x21 - -/* Firebolt-5 */ -#define BCM56565_DEVICE_ID 0xb565 -#define BCM56565_A0_REV_ID 1 -#define BCM56565_B0_REV_ID 0x11 - -#define BCM56566_DEVICE_ID 0xb566 -#define BCM56566_A0_REV_ID 1 -#define BCM56566_B0_REV_ID 0x11 - -#define BCM56567_DEVICE_ID 0xb567 -#define BCM56567_A0_REV_ID 1 -#define BCM56567_B0_REV_ID 0x11 - -#define BCM56568_DEVICE_ID 0xb568 -#define BCM56568_A0_REV_ID 1 -#define BCM56568_B0_REV_ID 0x11 - -/* Maverick */ -#define BCM56760_DEVICE_ID 0xb760 -#define BCM56760_A0_REV_ID 1 -#define BCM56760_A1_REV_ID 2 -#define BCM56760_B0_REV_ID 0x11 - - -#define BCM56761_DEVICE_ID 0xb761 -#define BCM56761_A0_REV_ID 1 -#define BCM56761_A1_REV_ID 2 -#define BCM56761_B0_REV_ID 0x11 -#define BCM56761_B1_REV_ID 0x12 - -#define BCM56762_DEVICE_ID 0xb762 -#define BCM56762_A0_REV_ID 1 -#define BCM56762_B0_REV_ID 0x11 - -#define BCM56764_DEVICE_ID 0xb764 -#define BCM56764_A0_REV_ID 1 -#define BCM56764_B0_REV_ID 0x11 - -#define BCM56765_DEVICE_ID 0xb765 -#define BCM56765_A0_REV_ID 1 -#define BCM56765_B0_REV_ID 0x11 - -#define BCM56766_DEVICE_ID 0xb766 -#define BCM56766_A0_REV_ID 1 -#define BCM56766_B0_REV_ID 0x11 - -#define BCM56768_DEVICE_ID 0xb768 -#define BCM56768_A0_REV_ID 1 -#define BCM56768_B0_REV_ID 0x11 - -/* Ranger 2+ */ -#define BCM56068_DEVICE_ID 0xb068 -#define BCM56068_A0_REV_ID 1 -#define BCM56068_B0_REV_ID 0x11 -#define BCM56068_B1_REV_ID 0x12 - -#define BCM56069_DEVICE_ID 0xb069 -#define BCM56069_A0_REV_ID 1 -#define BCM56069_B0_REV_ID 0x11 - -/* Hurricane3-MG */ -#define BCM56170_DEVICE_ID 0xb170 -#define BCM56170_A0_REV_ID 1 -#define BCM56170_B0_REV_ID 0x11 -#define BCM56172_DEVICE_ID 0xb172 -#define BCM56172_A0_REV_ID 1 -#define BCM56172_B0_REV_ID 0x11 -#define BCM56174_DEVICE_ID 0xb174 -#define BCM56174_A0_REV_ID 1 -#define BCM56174_B0_REV_ID 0x11 - -/* Quartz, Greyhound 2 */ -#define BCM53570_DEVICE_ID 0x8570 -#define BCM53570_A0_REV_ID 1 -#define BCM53570_B0_REV_ID 0x11 -#define BCM53575_DEVICE_ID 0x8575 -#define BCM53575_A0_REV_ID 1 -#define BCM53575_B0_REV_ID 0x11 - -/* FireLight */ -#define BCM56070_DEVICE_ID 0xb070 -#define BCM56070_A0_REV_ID 1 -#define BCM56071_DEVICE_ID 0xb071 -#define BCM56071_A0_REV_ID 1 -#define BCM56072_DEVICE_ID 0xb072 -#define BCM56072_A0_REV_ID 1 - - -/* Tomahawk+ */ -#define BCM56965_DEVICE_ID 0xb965 -#define BCM56965_A0_REV_ID 1 -#define BCM56965_A1_REV_ID 2 -#define BCM56969_DEVICE_ID 0xb969 /* Corresponds to TH 56961 */ -#define BCM56969_A0_REV_ID 1 -#define BCM56966_DEVICE_ID 0xb966 /* Corresponds to TH 56962 */ -#define BCM56966_A0_REV_ID 1 -#define BCM56967_DEVICE_ID 0xb967 /* Corresponds to TH 56963 */ -#define BCM56967_A0_REV_ID 1 - -/* Tomahawk 2 */ -#define BCM56970_DEVICE_ID 0xb970 -#define BCM56970_A0_REV_ID 1 -#define BCM56970_B0_REV_ID 0x11 -#define BCM56971_DEVICE_ID 0xb971 -#define BCM56971_A0_REV_ID 1 -#define BCM56971_B0_REV_ID 0x11 -#define BCM56972_DEVICE_ID 0xb972 -#define BCM56972_A0_REV_ID 1 -#define BCM56972_B0_REV_ID 0x11 -#define BCM56974_DEVICE_ID 0xb974 -#define BCM56974_A0_REV_ID 1 -#define BCM56974_B0_REV_ID 0x11 -#define BCM56975_DEVICE_ID 0xb975 -#define BCM56975_A0_REV_ID 1 -#define BCM56975_B0_REV_ID 0x11 - -/* Trident3 */ -#define BCM56870_DEVICE_ID 0xb870 -#define BCM56870_A0_REV_ID 1 -#define BCM56873_DEVICE_ID 0xb873 -#define BCM56873_A0_REV_ID 1 - -/* Helix5 */ -#define BCM56370_DEVICE_ID 0xb370 -#define BCM56370_A0_REV_ID 1 -#define BCM56370_A1_REV_ID 0x02 -#define BCM56370_A2_REV_ID 0x03 - -#define BCM56371_DEVICE_ID 0xb371 -#define BCM56371_A0_REV_ID 1 -#define BCM56371_A1_REV_ID 0x02 -#define BCM56371_A2_REV_ID 0x03 - -#define BCM56372_DEVICE_ID 0xb372 -#define BCM56372_A0_REV_ID 1 -#define BCM56372_A1_REV_ID 0x02 -#define BCM56372_A2_REV_ID 0x03 - -#define BCM56374_DEVICE_ID 0xb374 -#define BCM56374_A0_REV_ID 1 -#define BCM56374_A1_REV_ID 0x02 -#define BCM56374_A2_REV_ID 0x03 - -#define BCM56375_DEVICE_ID 0xb375 -#define BCM56375_A0_REV_ID 1 -#define BCM56375_A1_REV_ID 0x02 -#define BCM56375_A2_REV_ID 0x03 - -#define BCM56376_DEVICE_ID 0xb376 -#define BCM56376_A0_REV_ID 1 -#define BCM56376_A1_REV_ID 0x02 -#define BCM56376_A2_REV_ID 0x03 - -#define BCM56377_DEVICE_ID 0xb377 -#define BCM56377_A0_REV_ID 1 -#define BCM56377_A1_REV_ID 0x02 -#define BCM56377_A2_REV_ID 0x03 - -#define BCM56577_DEVICE_ID 0xb577 -#define BCM56577_A0_REV_ID 1 -#define BCM56577_A1_REV_ID 0x02 -#define BCM56577_A2_REV_ID 0x03 - -#define BCM56578_DEVICE_ID 0xb578 -#define BCM56578_A0_REV_ID 1 -#define BCM56578_A1_REV_ID 0x02 -#define BCM56578_A2_REV_ID 0x03 - -#define BCM56579_DEVICE_ID 0xb579 -#define BCM56579_A0_REV_ID 1 -#define BCM56579_A1_REV_ID 0x02 -#define BCM56579_A2_REV_ID 0x03 - -/* Maverick2 */ -#define BCM56770_DEVICE_ID 0xb770 -#define BCM56770_A0_REV_ID 1 - -#define BCM56771_DEVICE_ID 0xb771 -#define BCM56771_A0_REV_ID 1 - -/* Firebolt6 */ -#define BCM56470_DEVICE_ID 0xb470 -#define BCM56470_A0_REV_ID 1 -#define BCM56471_DEVICE_ID 0xb471 -#define BCM56471_A0_REV_ID 1 -#define BCM56472_DEVICE_ID 0xb472 -#define BCM56472_A0_REV_ID 1 -#define BCM56475_DEVICE_ID 0xb475 -#define BCM56475_A0_REV_ID 1 -#define BCM56474_DEVICE_ID 0xb474 -#define BCM56474_A0_REV_ID 1 - -/* Trident3 X3Plus */ -#define BCM56390_DEVICE_ID 0xb390 -#define BCM56390_A0_REV_ID 1 -#define BCM56391_DEVICE_ID 0xb391 -#define BCM56391_A0_REV_ID 1 -#define BCM56392_DEVICE_ID 0xb392 -#define BCM56392_A0_REV_ID 1 - -/* Wolfhound2 (Hurricane3-CR)*/ -#define BCM53540_DEVICE_ID 0x8540 -#define BCM53540_A0_REV_ID 1 -#define BCM53547_DEVICE_ID 0x8547 -#define BCM53547_A0_REV_ID 1 -#define BCM53548_DEVICE_ID 0x8548 -#define BCM53548_A0_REV_ID 1 -#define BCM53549_DEVICE_ID 0x8549 -#define BCM53549_A0_REV_ID 1 - -/* Wolfhound3 */ -#define BCM53642_DEVICE_ID 0x8642 -#define BCM53642_A0_REV_ID 1 - -/* - * BCM5665: Tucana48 (48+4+1) - * BCM5665L: Tucana24 (24+4+1) - * BCM5666: Tucana48 (48+4+1) without L3 - * BCM5666L: Tucana24 (24+4+1) without L3 - * - * The device ID is 0x5665 for all of these parts. For BCM5665L and - * BCM5666L, the pbmp_valid property must be set to invalidate fe24-fe47 - * (see $SDK/rc/config.bcm). - */ -#define BCM5665_DEVICE_ID 0x5665 -#define BCM5665_A0_REV_ID 1 -#define BCM5665_B0_REV_ID 0x11 - - -/* - * BCM5655: Titanium48 (48+4) - * BCM5656: Titanium48 (48+4) without L3 - * - * The device ID is 0x5655 for both parts. - */ -#define BCM5655_DEVICE_ID 0x5655 -#define BCM5655_A0_REV_ID 1 -#define BCM5655_B0_REV_ID 0x11 - - -/* - * BCM5650: Titanium-II (24+4) - * BCM5651: Titanium-II (24+4) without L3 - * - * The device ID is 0x5650 for both parts. - * BCM5650C0 is the first spin of a real 24+4 cost-reduced chip. - */ -#define BCM5650_DEVICE_ID 0x5650 -#define BCM5650_A0_REV_ID 1 -#define BCM5650_B0_REV_ID 0x11 -#define BCM5650_C0_REV_ID 0x21 - -#define BROADCOM_PHYID_HIGH 0x0040 - -/* Define Dune device IDs */ -#define ARAD_DEVICE_ID 0x8650 -#define ARAD_A0_REV_ID 0x0000 -#define ARAD_B0_REV_ID 0x0011 -#define ARAD_B1_REV_ID 0x0012 -#define BCM88770_DEVICE_ID 0x8770 -#define BCM88770_A1_REV_ID 0x0002 -#define BCM88773_DEVICE_ID 0x8773 -#define BCM88773_A1_REV_ID 0x0002 -#define BCM88774_DEVICE_ID 0x8774 -#define BCM88774_A1_REV_ID 0x0002 -#define BCM88775_DEVICE_ID 0x8775 -#define BCM88775_A1_REV_ID 0x0002 -#define BCM88776_DEVICE_ID 0x8776 -#define BCM88776_A1_REV_ID 0x0002 -#define BCM88777_DEVICE_ID 0x8777 -#define BCM88777_A1_REV_ID 0x0002 -#define BCM88950_DEVICE_ID 0x8950 -#define BCM88950_A0_REV_ID 0x0001 -#define BCM88950_A1_REV_ID 0x0002 -#define BCM88953_DEVICE_ID 0x8953 -#define BCM88953_A1_REV_ID 0x0002 -#define BCM88954_DEVICE_ID 0x8954 -#define BCM88954_A1_REV_ID 0x0002 -#define BCM88955_DEVICE_ID 0x8955 -#define BCM88955_A1_REV_ID 0x0002 -#define BCM88956_DEVICE_ID 0x8956 -#define BCM88956_A1_REV_ID 0x0002 -#define DNXC_REV_A_FAMILY 0 -#define DNXC_REV_B_FAMILY 0x10 -#define DNXC_REV_C_FAMILY 0x20 -#define DNXC_REV_D_FAMILY 0x30 -#define DNXC_REV_FAMILY_MASK 0xf0 -#define DNXC_A0_REV_ID 0x0001 -#define DNXC_A1_REV_ID 0x0002 -#define DNXC_A2_REV_ID 0x0003 -#define DNXC_B0_REV_ID 0x0011 -#define DNXC_B1_REV_ID 0x0012 -#define DNXC_B2_REV_ID 0x0013 -#define DNXC_C0_REV_ID 0x0021 -#define DNXC_C1_REV_ID 0x0022 -#define DNXC_C2_REV_ID 0x0023 -#define DNXC_D0_REV_ID 0x0031 -#define DNXC_D1_REV_ID 0x0032 -#define DNXC_DEVID_FAMILY_MASK 0xfff0 -#define BCM88790_DEVICE_ID 0x8790 -#define BCM88790_A0_REV_ID DNXC_A0_REV_ID -#define BCM88790_B0_REV_ID DNXC_B0_REV_ID -#define BCM88791_DEVICE_ID 0x8791 -#define BCM88792_DEVICE_ID 0x8792 -#define BCM88793_DEVICE_ID 0x8793 -#define BCM88794_DEVICE_ID 0x8794 -#define BCM88795_DEVICE_ID 0x8795 -#define BCM88796_DEVICE_ID 0x8796 -#define BCM88797_DEVICE_ID 0x8797 -#define BCM88798_DEVICE_ID 0x8798 -#define BCM88799_DEVICE_ID 0x8799 -#define BCM8879A_DEVICE_ID 0x879A -#define BCM8879B_DEVICE_ID 0x879B -#define BCM8879C_DEVICE_ID 0x879C -#define BCM8879D_DEVICE_ID 0x879D -#define BCM8879E_DEVICE_ID 0x879E -#define BCM8879F_DEVICE_ID 0x879F -#ifdef BCM_DNXF3_SUPPORT -#define RAMON2_DEVICE_ID 0x8910 -#define BCM8891F_DEVICE_ID 0x891F -#define RAMON3_DEVICE_ID 0x8920 -#endif -#ifdef BCM_DNXFE_SUPPORT -#ifdef BCM_RAMON_4_SUPPORT -#define RAMON4_DEVICE_ID 0x9470 -#endif -#endif -#define ARADPLUS_DEVICE_ID 0x8660 -#define ARADPLUS_A0_REV_ID 0x0001 -#define BCM88660_DEVICE_ID ARADPLUS_DEVICE_ID -#define BCM88660_A0_REV_ID ARADPLUS_A0_REV_ID -/* Jericho */ -#define JERICHO_DEVICE_ID 0x8675 -#define JERICHO_A0_REV_ID 0x0001 -#define JERICHO_B0_REV_ID 0x0011 -#define JERICHO_A1_REV_ID 0x0002 -/* Jericho SKUs */ -#define BCM88670_DEVICE_ID 0x8670 -#define BCM88670_A0_REV_ID JERICHO_A0_REV_ID -#define BCM88670_A1_REV_ID JERICHO_A1_REV_ID -#define BCM88671_DEVICE_ID 0x8671 -#define BCM88671_A0_REV_ID JERICHO_A0_REV_ID -#define BCM88671_A1_REV_ID JERICHO_A1_REV_ID -#define BCM88671M_DEVICE_ID 0x867A -#define BCM88671M_A0_REV_ID JERICHO_A0_REV_ID -#define BCM88671M_A1_REV_ID JERICHO_A1_REV_ID - -#define BCM88670_B0_REV_ID JERICHO_B0_REV_ID -#define BCM88671_B0_REV_ID JERICHO_B0_REV_ID -#define BCM88671M_B0_REV_ID JERICHO_B0_REV_ID - -#define BCM88672_DEVICE_ID 0x8672 -#define BCM88672_A0_REV_ID JERICHO_A0_REV_ID -#define BCM88672_A1_REV_ID JERICHO_A1_REV_ID - -#define BCM88672_B0_REV_ID JERICHO_B0_REV_ID - -#define BCM88673_DEVICE_ID 0x8673 -#define BCM88673_A0_REV_ID JERICHO_A0_REV_ID -#define BCM88673_A1_REV_ID JERICHO_A1_REV_ID -#define BCM88674_DEVICE_ID 0x8674 -#define BCM88674_A0_REV_ID JERICHO_A0_REV_ID -#define BCM88674_A1_REV_ID JERICHO_A1_REV_ID -#define BCM88675_DEVICE_ID JERICHO_DEVICE_ID -#define BCM88675_A0_REV_ID JERICHO_A0_REV_ID -#define BCM88675_A1_REV_ID JERICHO_A1_REV_ID -#define BCM88675M_DEVICE_ID 0x867B -#define BCM88675M_A0_REV_ID JERICHO_A0_REV_ID -#define BCM88675M_A1_REV_ID JERICHO_A1_REV_ID -#define BCM88676_DEVICE_ID 0x8676 -#define BCM88676_A0_REV_ID JERICHO_A0_REV_ID -#define BCM88676_A1_REV_ID JERICHO_A1_REV_ID -#define BCM88676M_DEVICE_ID 0x867C -#define BCM88676M_A0_REV_ID JERICHO_A0_REV_ID -#define BCM88676M_A1_REV_ID JERICHO_A1_REV_ID -#define BCM88677_DEVICE_ID 0x8677 -#define BCM88677_A0_REV_ID JERICHO_A0_REV_ID -#define BCM88677_A1_REV_ID JERICHO_A1_REV_ID -#define BCM88678_DEVICE_ID 0x8678 -#define BCM88678_A0_REV_ID JERICHO_A0_REV_ID -#define BCM88678_A1_REV_ID JERICHO_A1_REV_ID -#define BCM88679_DEVICE_ID 0x8679 -#define BCM88679_A0_REV_ID JERICHO_A0_REV_ID -#define BCM88679_A1_REV_ID JERICHO_A1_REV_ID - -#define BCM88673_B0_REV_ID JERICHO_B0_REV_ID -#define BCM88674_B0_REV_ID JERICHO_B0_REV_ID -#define BCM88675_B0_REV_ID JERICHO_B0_REV_ID -#define BCM88675M_B0_REV_ID JERICHO_B0_REV_ID -#define BCM88676_B0_REV_ID JERICHO_B0_REV_ID -#define BCM88676M_B0_REV_ID JERICHO_B0_REV_ID -#define BCM88677_B0_REV_ID JERICHO_B0_REV_ID -#define BCM88678_B0_REV_ID JERICHO_B0_REV_ID -#define BCM88679_B0_REV_ID JERICHO_B0_REV_ID -/* Qumran MX */ -#define QMX_DEVICE_ID 0x8375 -#define QMX_A0_REV_ID 0x0001 -#define QMX_B0_REV_ID 0x0011 -#define QMX_A1_REV_ID 0x0002 -/* Qumran MX SKUs*/ -#define BCM88370_DEVICE_ID 0x8370 -#define BCM88370_A0_REV_ID QMX_A0_REV_ID -#define BCM88370_A1_REV_ID QMX_A1_REV_ID -#define BCM88371_DEVICE_ID 0x8371 -#define BCM88371_A0_REV_ID QMX_A0_REV_ID -#define BCM88371_A1_REV_ID QMX_A1_REV_ID -#define BCM88371M_DEVICE_ID 0x837A -#define BCM88371M_A0_REV_ID QMX_A0_REV_ID -#define BCM88371M_A1_REV_ID QMX_A1_REV_ID -#define BCM88375_DEVICE_ID QMX_DEVICE_ID -#define BCM88375_A0_REV_ID QMX_A0_REV_ID -#define BCM88375_A1_REV_ID QMX_A1_REV_ID -#define BCM88376_DEVICE_ID 0x8376 -#define BCM88376_A0_REV_ID QMX_A0_REV_ID -#define BCM88376_A1_REV_ID QMX_A1_REV_ID -#define BCM88376M_DEVICE_ID 0x837B -#define BCM88376M_A0_REV_ID QMX_A0_REV_ID -#define BCM88376M_A1_REV_ID QMX_A1_REV_ID -#define BCM88377_DEVICE_ID 0x8377 -#define BCM88377_A0_REV_ID QMX_A0_REV_ID -#define BCM88377_A1_REV_ID QMX_A1_REV_ID -#define BCM88378_DEVICE_ID 0x8378 -#define BCM88378_A0_REV_ID QMX_A0_REV_ID -#define BCM88378_A1_REV_ID QMX_A1_REV_ID -#define BCM88379_DEVICE_ID 0x8379 -#define BCM88379_A0_REV_ID QMX_A0_REV_ID -#define BCM88379_A1_REV_ID QMX_A1_REV_ID - -#define BCM88370_B0_REV_ID QMX_B0_REV_ID -#define BCM88371_B0_REV_ID QMX_B0_REV_ID -#define BCM88371M_B0_REV_ID QMX_B0_REV_ID -#define BCM88375_B0_REV_ID QMX_B0_REV_ID -#define BCM88376_B0_REV_ID QMX_B0_REV_ID -#define BCM88376M_B0_REV_ID QMX_B0_REV_ID -#define BCM88377_B0_REV_ID QMX_B0_REV_ID -#define BCM88378_B0_REV_ID QMX_B0_REV_ID -#define BCM88379_B0_REV_ID QMX_B0_REV_ID - - -#define JERICHO_PLUS_DEVICE_ID 0x8680 -#define JERICHO_PLUS_A0_REV_ID 0x0001 -#define BCM88680_DEVICE_ID JERICHO_PLUS_DEVICE_ID -#define BCM88680_A0_REV_ID JERICHO_PLUS_A0_REV_ID -#define BCM88680_A1_REV_ID 0x0002 - - -#define BCM88681_DEVICE_ID 0x8681 -#define BCM88681_A0_REV_ID JERICHO_PLUS_A0_REV_ID - -#define BCM88682_DEVICE_ID 0x8682 -#define BCM88682_A0_REV_ID JERICHO_PLUS_A0_REV_ID - -#define BCM88683_DEVICE_ID 0x8683 -#define BCM88683_A0_REV_ID JERICHO_PLUS_A0_REV_ID - -#define BCM88684_DEVICE_ID 0x8684 -#define BCM88684_A0_REV_ID JERICHO_PLUS_A0_REV_ID - -#define BCM88685_DEVICE_ID 0x8685 -#define BCM88685_A0_REV_ID JERICHO_PLUS_A0_REV_ID - -#define BCM88687_DEVICE_ID 0x8687 -#define BCM88687_A0_REV_ID JERICHO_PLUS_A0_REV_ID - -#define BCM88380_DEVICE_ID 0x8380 -#define BCM88380_A0_REV_ID JERICHO_PLUS_A0_REV_ID -#define BCM88381_DEVICE_ID 0x8381 -#define BCM88381_A0_REV_ID JERICHO_PLUS_A0_REV_ID - -#define JERICHO2_DEVICE_ID 0x8690 -#define JERICHO2_A0_REV_ID DNXC_A0_REV_ID -#define JERICHO2_B0_REV_ID DNXC_B0_REV_ID -#define JERICHO2_B1_REV_ID DNXC_B1_REV_ID -#define BCM88690_DEVICE_ID JERICHO2_DEVICE_ID -#define BCM88690_A0_REV_ID JERICHO2_A0_REV_ID -#define BCM88690_B0_REV_ID JERICHO2_B0_REV_ID -#define BCM88690_B1_REV_ID JERICHO2_B1_REV_ID -#define BCM88691_DEVICE_ID 0x8691 -#define BCM88692_DEVICE_ID 0x8692 -#define BCM88693_DEVICE_ID 0x8693 -#define BCM88694_DEVICE_ID 0x8694 -#define BCM88695_DEVICE_ID 0x8695 -#define BCM88696_DEVICE_ID 0x8696 -#define BCM88697_DEVICE_ID 0x8697 -#define BCM88698_DEVICE_ID 0x8698 -#define BCM88699_DEVICE_ID 0x8699 -#define BCM8869A_DEVICE_ID 0x869A -#define BCM8869B_DEVICE_ID 0x869B -#define BCM8869C_DEVICE_ID 0x869C -#define BCM8869D_DEVICE_ID 0x869D -#define BCM8869E_DEVICE_ID 0x869E -#define BCM8869F_DEVICE_ID 0x869F - -#define J2C_DEVICE_ID 0x8800 -#define J2C_2ND_DEVICE_ID 0x8820 -#define J2C_DEVID_FAMILY_MASK 0xffd0 -#define J2C_A0_REV_ID DNXC_A0_REV_ID -#define J2C_A1_REV_ID DNXC_A1_REV_ID -#define BCM88800_DEVICE_ID J2C_DEVICE_ID -#define BCM88820_DEVICE_ID J2C_2ND_DEVICE_ID -#define BCM88800_A0_REV_ID J2C_A0_REV_ID -#define BCM88800_A1_REV_ID J2C_A1_REV_ID -#define BCM88801_DEVICE_ID 0x8801 -#define BCM88802_DEVICE_ID 0x8802 -#define BCM88803_DEVICE_ID 0x8803 -#define BCM88804_DEVICE_ID 0x8804 -#define BCM88805_DEVICE_ID 0x8805 -#define BCM88806_DEVICE_ID 0x8806 -#define BCM88807_DEVICE_ID 0x8807 -#define BCM88808_DEVICE_ID 0x8808 -#define BCM88809_DEVICE_ID 0x8809 -#define BCM8880A_DEVICE_ID 0x880A -#define BCM8880B_DEVICE_ID 0x880B -#define BCM8880C_DEVICE_ID 0x880C -#define BCM8880D_DEVICE_ID 0x880D -#define BCM8880E_DEVICE_ID 0x880E -#define BCM8880F_DEVICE_ID 0x880F -#define BCM88821_DEVICE_ID 0x8821 -#define BCM88822_DEVICE_ID 0x8822 -#define BCM88823_DEVICE_ID 0x8823 -#define BCM88824_DEVICE_ID 0x8824 -#define BCM88825_DEVICE_ID 0x8825 -#define BCM88826_DEVICE_ID 0x8826 -#define BCM88827_DEVICE_ID 0x8827 -#define BCM88828_DEVICE_ID 0x8828 -#define BCM88829_DEVICE_ID 0x8829 -#define BCM8882A_DEVICE_ID 0x882A -#define BCM8882B_DEVICE_ID 0x882B -#define BCM8882C_DEVICE_ID 0x882C -#define BCM8882D_DEVICE_ID 0x882D -#define BCM8882E_DEVICE_ID 0x882E -#define BCM8882F_DEVICE_ID 0x882F - -#define J2P_DEVICE_ID 0x8850 -#define J2P_A0_REV_ID DNXC_A0_REV_ID -#define J2P_A1_REV_ID DNXC_A1_REV_ID -#define J2P_A2_REV_ID DNXC_A2_REV_ID -#define BCM88850_DEVICE_ID J2P_DEVICE_ID -#define BCM88850_A0_REV_ID J2P_A0_REV_ID -#define BCM88850_A1_REV_ID J2P_A1_REV_ID -#define BCM88850_A2_REV_ID J2P_A2_REV_ID -#define BCM88851_DEVICE_ID 0x8851 -#define BCM88852_DEVICE_ID 0x8852 -#define BCM88853_DEVICE_ID 0x8853 -#define BCM88854_DEVICE_ID 0x8854 -#define BCM88855_DEVICE_ID 0x8855 -#define BCM88856_DEVICE_ID 0x8856 -#define BCM88857_DEVICE_ID 0x8857 -#define BCM88858_DEVICE_ID 0x8858 -#define BCM88859_DEVICE_ID 0x8859 -#define BCM8885A_DEVICE_ID 0x885A -#define BCM8885B_DEVICE_ID 0x885B -#define BCM8885C_DEVICE_ID 0x885C -#define BCM8885D_DEVICE_ID 0x885D -#define BCM8885E_DEVICE_ID 0x885E -#define BCM8885F_DEVICE_ID 0x885F - -#define BCM88840_DEVICE_ID 0x8840 -#define BCM88841_DEVICE_ID 0x8841 -#define BCM88842_DEVICE_ID 0x8842 -#define BCM88843_DEVICE_ID 0x8843 -#define BCM88844_DEVICE_ID 0x8844 -#define BCM88845_DEVICE_ID 0x8845 -#define BCM88846_DEVICE_ID 0x8846 -#define BCM88847_DEVICE_ID 0x8847 -#define BCM88848_DEVICE_ID 0x8848 -#define BCM88849_DEVICE_ID 0x8849 -#define BCM8884A_DEVICE_ID 0x884A -#define BCM8884B_DEVICE_ID 0x884B -#define BCM8884C_DEVICE_ID 0x884C -#define BCM8884D_DEVICE_ID 0x884D -#define BCM8884E_DEVICE_ID 0x884E -#define BCM8884F_DEVICE_ID 0x884F - -#define BCM88810_DEVICE_ID 0x8810 -#define BCM88811_DEVICE_ID 0x8811 -#define BCM88812_DEVICE_ID 0x8812 -#define BCM88813_DEVICE_ID 0x8813 -#define BCM88814_DEVICE_ID 0x8814 -#define BCM88815_DEVICE_ID 0x8815 -#define BCM88816_DEVICE_ID 0x8816 -#define BCM88817_DEVICE_ID 0x8817 -#define BCM88818_DEVICE_ID 0x8818 -#define BCM88819_DEVICE_ID 0x8819 -#define BCM8881A_DEVICE_ID 0x881A -#define BCM8881B_DEVICE_ID 0x881B -#define BCM8881C_DEVICE_ID 0x881C -#define BCM8881D_DEVICE_ID 0x881D -#define BCM8881E_DEVICE_ID 0x881E -#define BCM8881F_DEVICE_ID 0x881F - -#define J2X_DEVICE_ID 0x8830 -#define J2X_A0_REV_ID DNXC_A0_REV_ID -#define BCM88830_DEVICE_ID J2X_DEVICE_ID -#define BCM88830_A0_REV_ID J2X_A0_REV_ID -#define BCM88831_DEVICE_ID 0x8831 -#define BCM88832_DEVICE_ID 0x8832 -#define BCM88833_DEVICE_ID 0x8833 -#define BCM88834_DEVICE_ID 0x8834 -#define BCM88835_DEVICE_ID 0x8835 -#define BCM88836_DEVICE_ID 0x8836 -#define BCM88837_DEVICE_ID 0x8837 -#define BCM88838_DEVICE_ID 0x8838 -#define BCM88839_DEVICE_ID 0x8839 -#define BCM8883A_DEVICE_ID 0x883A -#define BCM8883B_DEVICE_ID 0x883B -#define BCM8883C_DEVICE_ID 0x883C -#define BCM8883D_DEVICE_ID 0x883D -#define BCM8883E_DEVICE_ID 0x883E -#define BCM8883F_DEVICE_ID 0x883F - -#define J2Z_DEVICE_ID 0x216 -#define J2Z_A0_REV_ID DNXC_A0_REV_ID -#define BCM8216_DEVICE_ID J2Z_DEVICE_ID -#define BCM8216_A0_REV_ID J2Z_A0_REV_ID - -#ifdef BCM_DNX3_SUPPORT -#define JERICHO3_DEVICE_ID 0x8860 -#define J3_PLUS_DEVICE_ID 0x8867 -#define J3_PLUS_DEVICE_ID_START J3_PLUS_DEVICE_ID -#define J3_PLUS_DEVICE_ID_END 0x8869 -#define Q3_DEVICE_ID_START 0x886a -#define Q3_DEVICE_ID_END 0x886f -#define J3AI_DEVICE_ID 0x8890 -#define J3AI_PLUS_DEVICE_ID 0x8897 -#define J3AI_PLUS_DEVICE_ID_START J3AI_PLUS_DEVICE_ID -#define J3AI_PLUS_DEVICE_ID_END 0x889f -#define Q3D_DEVICE_ID 0x8870 -#ifdef BCM_Q3A_SUPPORT -#define Q3A_DEVICE_ID 0x8490 -#define Q3U_DEVICE_ID 0x84A0 -#define Q3N_DEVICE_ID 0x84A5 -#define Q3U_ORIG_DEVICE_ID 0x8400 -#define Q3N_ORIG_DEVICE_ID 0x8405 -#endif -#ifdef BCM_JERICHO_4_SUPPORT -#define JERICHO4_DEVICE_ID 0x9450 -#define Q4_DEVICE_ID 0x9420 -#endif - -#ifdef BCM_Q4D_SUPPORT -#define Q4D_DEVICE_ID 0x9430 -#define Q4D_PT200_START_DEVICE_ID 0x9436 -#define Q4D_PT200_END_DEVICE_ID 0x9439 -#endif - - -#ifdef BCM_J4L_SUPPORT -#define J4L_DEVICE_ID 0x9410 -#endif - - -#endif -#define Q2A_DEVICE_ID 0x8480 -#define Q2A_A0_REV_ID DNXC_A0_REV_ID -#define Q2A_B0_REV_ID DNXC_B0_REV_ID -#define Q2A_B1_REV_ID DNXC_B1_REV_ID -#define BCM88480_DEVICE_ID Q2A_DEVICE_ID -#define BCM88480_A0_REV_ID Q2A_A0_REV_ID -#define BCM88480_B0_REV_ID Q2A_B0_REV_ID -#define BCM88480_B1_REV_ID Q2A_B1_REV_ID -#define BCM88481_DEVICE_ID 0x8481 -#define BCM88482_DEVICE_ID 0x8482 -#define BCM88483_DEVICE_ID 0x8483 -#define BCM88484_DEVICE_ID 0x8484 -#define BCM88485_DEVICE_ID 0x8485 -#define BCM88486_DEVICE_ID 0x8486 -#define BCM88487_DEVICE_ID 0x8487 -#define BCM88488_DEVICE_ID 0x8488 -#define BCM88489_DEVICE_ID 0x8489 -#define BCM8848A_DEVICE_ID 0x848A -#define BCM8848B_DEVICE_ID 0x848B -#define BCM8848C_DEVICE_ID 0x848C -#define BCM8848D_DEVICE_ID 0x848D -#define BCM8848E_DEVICE_ID 0x848E -#define BCM8848F_DEVICE_ID 0x848F - -#define Q2U_DEVICE_ID 0x8280 -#define BCM88280_DEVICE_ID Q2U_DEVICE_ID -#define BCM88281_DEVICE_ID 0x8281 -#define BCM88282_DEVICE_ID 0x8282 -#define BCM88283_DEVICE_ID 0x8283 -#define BCM88284_DEVICE_ID 0x8284 -#define BCM88285_DEVICE_ID 0x8285 -#define BCM88286_DEVICE_ID 0x8286 -#define BCM88287_DEVICE_ID 0x8287 -#define BCM88288_DEVICE_ID 0x8288 -#define BCM88289_DEVICE_ID 0x8289 -#define BCM8828A_DEVICE_ID 0x828A -#define BCM8828B_DEVICE_ID 0x828B -#define BCM8828C_DEVICE_ID 0x828C -#define BCM8828D_DEVICE_ID 0x828D -#define BCM8828E_DEVICE_ID 0x828E -#define BCM8828F_DEVICE_ID 0x828F - -#define Q2N_DEVICE_ID 0x8290 -#define BCM88290_DEVICE_ID Q2N_DEVICE_ID -#define BCM88291_DEVICE_ID 0x8291 -#define BCM88292_DEVICE_ID 0x8292 -#define BCM88293_DEVICE_ID 0x8293 -#define BCM88294_DEVICE_ID 0x8294 -#define BCM88295_DEVICE_ID 0x8295 -#define BCM88296_DEVICE_ID 0x8296 -#define BCM88297_DEVICE_ID 0x8297 -#define BCM88298_DEVICE_ID 0x8298 -#define BCM88299_DEVICE_ID 0x8299 -#define BCM8829A_DEVICE_ID 0x829A -#define BCM8829B_DEVICE_ID 0x829B -#define BCM8829C_DEVICE_ID 0x829C -#define BCM8829D_DEVICE_ID 0x829D -#define BCM8829E_DEVICE_ID 0x829E -#define BCM8829F_DEVICE_ID 0x829F - -#define QAX_DEVICE_ID 0x8470 -#define QAX_A0_REV_ID 0x0001 -#define QAX_B0_REV_ID 0x0011 -#define BCM88470_DEVICE_ID QAX_DEVICE_ID -#define BCM88470_B0_REV_ID QAX_B0_REV_ID -#define BCM88470P_DEVICE_ID 0x847C -#define BCM88471_DEVICE_ID 0x8471 -#define BCM88473_DEVICE_ID 0x8473 -#define BCM88474_DEVICE_ID 0x8474 -#define BCM88474H_DEVICE_ID 0x847B -#define BCM88476_DEVICE_ID 0x8476 -#define BCM88477_DEVICE_ID 0x8477 - -#define BCM88479_DEVICE_ID 0x8479 - - - -#define BCM88470_A0_REV_ID QAX_A0_REV_ID - -#define QUX_DEVICE_ID 0x8270 -#define QUX_A0_REV_ID 0x0001 -#define QUX_A1_REV_ID 0x0002 -#define QUX_B0_REV_ID 0x0011 -#define BCM88270_DEVICE_ID QUX_DEVICE_ID -#define BCM88270_A0_REV_ID QUX_A0_REV_ID -#define BCM88270_A1_REV_ID QUX_A1_REV_ID -#define BCM88271_DEVICE_ID 0x8271 -#define BCM88272_DEVICE_ID 0x8272 -#define BCM88273_DEVICE_ID 0x8273 -#define BCM88274_DEVICE_ID 0x8274 -#define BCM88276_DEVICE_ID 0x8276 -#define BCM88278_DEVICE_ID 0x8278 -#define BCM88279_DEVICE_ID 0x8279 - -#define BCM88360_DEVICE_ID 0x8360 -#define BCM88360_A0_REV_ID ARADPLUS_A0_REV_ID -#define BCM88361_DEVICE_ID 0x8361 -#define BCM88361_A0_REV_ID ARADPLUS_A0_REV_ID -#define BCM88363_DEVICE_ID 0x8363 -#define BCM88363_A0_REV_ID ARADPLUS_A0_REV_ID -#define BCM88460_DEVICE_ID 0x8460 -#define BCM88460_A0_REV_ID ARADPLUS_A0_REV_ID -#define BCM88461_DEVICE_ID 0x8461 -#define BCM88461_A0_REV_ID ARADPLUS_A0_REV_ID -#define BCM88560_DEVICE_ID 0x8560 -#define BCM88560_A0_REV_ID ARADPLUS_A0_REV_ID -#define BCM88561_DEVICE_ID 0x8561 -#define BCM88561_A0_REV_ID ARADPLUS_A0_REV_ID -#define BCM88562_DEVICE_ID 0x8562 -#define BCM88562_A0_REV_ID ARADPLUS_A0_REV_ID -#define BCM88661_DEVICE_ID 0x8661 -#define BCM88661_A0_REV_ID ARADPLUS_A0_REV_ID -#define BCM88664_DEVICE_ID 0x8664 -#define BCM88664_A0_REV_ID ARADPLUS_A0_REV_ID - - -#define BCM88350_DEVICE_ID 0x8350 -#define BCM88350_B1_REV_ID ARAD_B1_REV_ID -#define BCM88351_DEVICE_ID 0x8351 -#define BCM88351_B1_REV_ID ARAD_B1_REV_ID -#define BCM88450_DEVICE_ID 0x8450 -#define BCM88450_B1_REV_ID ARAD_B1_REV_ID -#define BCM88451_DEVICE_ID 0x8451 -#define BCM88451_B1_REV_ID ARAD_B1_REV_ID -#define BCM88550_DEVICE_ID 0x8550 -#define BCM88550_B1_REV_ID ARAD_B0_REV_ID -#define BCM88551_DEVICE_ID 0x8551 -#define BCM88551_B1_REV_ID ARAD_B1_REV_ID -#define BCM88552_DEVICE_ID 0x8552 -#define BCM88552_B1_REV_ID ARAD_B1_REV_ID - -#define BCM88772_DEVICE_ID 0x8772 -#define BCM88952_DEVICE_ID 0x8952 -#define BCM88772_A1_REV_ID 0x0002 -#define BCM88952_A0_REV_ID 0x0001 -#define BCM88952_A1_REV_ID 0x0002 - -#define PLX9056_DEVICE_ID 0x9056 /* needed for DNX_TEST_BOARD */ - -/* Tomahawk F1 */ -#define BCM78920_DEVICE_ID 0xf920 -#define BCM78920_A0_REV_ID 0x0001 -#define BCM78923_DEVICE_ID 0xf923 -#define BCM78923_A0_REV_ID 0x0001 -#define BCM78924_DEVICE_ID 0xf924 -#define BCM78924_A0_REV_ID 0x0001 -#define BCM78928_DEVICE_ID 0xf928 -#define BCM78928_A0_REV_ID 0x0001 - -/* Trident4 X11c */ -#define BCM56890_DEVICE_ID 0xb890 -#define BCM56890_A0_REV_ID 0x0001 -#define BCM56891_DEVICE_ID 0xb891 -#define BCM56891_A0_REV_ID 0x0001 -#define BCM56892_DEVICE_ID 0xb892 -#define BCM56892_A0_REV_ID 0x0001 -#define BCM56895_DEVICE_ID 0xb895 -#define BCM56895_A0_REV_ID 0x0001 -#define BCM56896_DEVICE_ID 0xb896 -#define BCM56896_A0_REV_ID 0x0001 - -/* Trident4 X7 */ -#define BCM56690_DEVICE_ID 0xb690 -#define BCM56690_A0_REV_ID 0x0001 -#define BCM56692_DEVICE_ID 0xb692 -#define BCM56692_A0_REV_ID 0x0001 - -/* Trident5 X12 */ -#define BCM78800_DEVICE_ID 0xf800 -#define BCM78800_A0_REV_ID 0x0001 -/* Trident5 X12 8Tbps */ -#define BCM78808_DEVICE_ID 0xf808 -#define BCM78808_A0_REV_ID 0x0001 - -/* Trident4 */ -#define BCM56880_DEVICE_ID 0xb880 -#define BCM56880_A0_REV_ID 0x0001 -#define BCM56880_B0_REV_ID 0x0011 -#define BCM56881_DEVICE_ID 0xb881 -#define BCM56881_A0_REV_ID 0x0001 -#define BCM56881_B0_REV_ID 0x0011 -#define BCM56883_DEVICE_ID 0xb883 -#define BCM56883_A0_REV_ID 0x0001 -#define BCM56883_B0_REV_ID 0x0011 - -/* Trident4 X9 */ -#define BCM56780_DEVICE_ID 0xb780 -#define BCM56780_A0_REV_ID 0x0001 -#define BCM56782_DEVICE_ID 0xb782 -#define BCM56782_A0_REV_ID 0x0001 -#define BCM56782_A1_REV_ID 0x0002 -#define BCM56784_DEVICE_ID 0xb784 -#define BCM56784_A0_REV_ID 0x0001 -#define BCM56785_DEVICE_ID 0xb785 -#define BCM56785_A0_REV_ID 0x0001 -#define BCM56786_DEVICE_ID 0xb786 -#define BCM56786_A0_REV_ID 0x0001 -#define BCM56786_A1_REV_ID 0x0002 -#define BCM56787_DEVICE_ID 0xb787 -#define BCM56787_A0_REV_ID 0x0001 -#define BCM56787_A1_REV_ID 0x0002 -#define BCM56788_DEVICE_ID 0xb788 -#define BCM56788_A0_REV_ID 0x0001 -#define BCM56788_A1_REV_ID 0x0002 -#define BCM56789_DEVICE_ID 0xb789 -#define BCM56789_A0_REV_ID 0x0001 -/* Firelight3 */ -#define BCM56089_DEVICE_ID 0xb089 -#define BCM56089_A0_REV_ID 0x0001 -#define BCM56089_A1_REV_ID 0x0002 - -/* Tomahawk4 */ -#define BCM56990_DEVICE_ID 0xb990 -#define BCM56990_A0_REV_ID 0x0001 - -/* Tomahawk4 */ -#ifndef BCM56990_DEVICE_ID -#define BCM56990_DEVICE_ID 0xb990 -#define BCM56990_A0_REV_ID 0x0001 -#endif -#define BCM56990_B0_REV_ID 0x0011 -#define BCM56991_DEVICE_ID 0xb991 -#define BCM56991_B0_REV_ID 0x0011 -#define BCM56992_DEVICE_ID 0xb992 -#define BCM56992_B0_REV_ID 0x0011 -#define BCM56993_DEVICE_ID 0xb993 -#define BCM56993_B0_REV_ID 0x0011 - -/* Tomahawk4G */ -#define BCM56996_DEVICE_ID 0xb996 -#define BCM56996_A0_REV_ID 0x0001 -#define BCM56997_DEVICE_ID 0xb997 -#define BCM56997_A0_REV_ID 0x0001 - -/* Tomahawk4G */ -#ifndef BCM56996_DEVICE_ID -#define BCM56996_DEVICE_ID 0xb996 -#define BCM56996_A0_REV_ID 0x0001 -#define BCM56997_DEVICE_ID 0xb997 -#endif -#define BCM56996_B0_REV_ID 0x0011 -#define BCM56997_B0_REV_ID 0x0011 - -/* Tomahawk4GT */ -#define BCM56998_DEVICE_ID 0xb998 -#define BCM56998_A0_REV_ID 0x0001 - -/* Tomahawk4D */ -#define BCM56999_DEVICE_ID 0xb999 -#define BCM56999_A0_REV_ID 0x0001 -#define BCM56999_B0_REV_ID 0x0011 -#define BCM56995_DEVICE_ID 0xb995 -#define BCM56995_A0_REV_ID 0x0001 -#define BCM56995_B0_REV_ID 0x0011 - -/* Tomahawk5 */ -#define BCM78900_DEVICE_ID 0xf900 -#define BCM78900_B0_REV_ID 0x0011 -#define BCM78902_DEVICE_ID 0xf902 -#define BCM78902_B0_REV_ID 0x0011 -#define BCM78903_DEVICE_ID 0xf903 -#define BCM78903_B0_REV_ID 0x0011 - -/* Tomahawk5+ */ -#define BCM78905_DEVICE_ID 0xf905 -#define BCM78905_A0_REV_ID 0x0001 - -/* Tomahawk5-512 */ -#define BCM78907_DEVICE_ID 0xf907 -#define BCM78907_A0_REV_ID 0x0001 - -/* Tomahawk6P */ -#define BCM78910_DEVICE_ID 0xf910 -#define BCM78910_A0_REV_ID 0x0001 - -/* Tomahawk6C */ -#define BCM78914_DEVICE_ID 0xf914 -#define BCM78914_B0_REV_ID 0x0011 - -/* Tomahawk6C */ -#ifndef BCM78914_DEVICE_ID -#define BCM78914_DEVICE_ID 0xf914 -#endif -#define BCM78914_B1_REV_ID 0x0012 - -/* Firelight2 */ -#define BCM56080_DEVICE_ID 0xb080 -#define BCM56080_A0_REV_ID 0x0001 -#define BCM56080_A1_REV_ID 0x0002 -#define BCM56081_DEVICE_ID 0xb081 -#define BCM56081_A0_REV_ID 0x0001 -#define BCM56081_A1_REV_ID 0x0002 -#define BCM56082_DEVICE_ID 0xb082 -#define BCM56082_A0_REV_ID 0x0001 -#define BCM56082_A1_REV_ID 0x0002 -#define BCM56083_DEVICE_ID 0xb083 -#define BCM56083_A0_REV_ID 0x0001 -#define BCM56083_A1_REV_ID 0x0002 -#define BCM56084_DEVICE_ID 0xb084 -#define BCM56084_A0_REV_ID 0x0001 -#define BCM56084_A1_REV_ID 0x0002 -#define BCM56085_DEVICE_ID 0xb085 -#define BCM56085_A0_REV_ID 0x0001 -#define BCM56085_A1_REV_ID 0x0002 - -#endif /* !_SOC_DEVIDS_H */ diff --git a/platform/broadcom/saibcm-modules/make/Make.depend b/platform/broadcom/saibcm-modules/make/Make.depend deleted file mode 100644 index 5c3aabef6ec..00000000000 --- a/platform/broadcom/saibcm-modules/make/Make.depend +++ /dev/null @@ -1,145 +0,0 @@ -# $Id: Make.depend,v 1.14 Broadcom SDK $ -# -# $Copyright: 2017-2025 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ -# -# -# -# Default rule to build dependencies. This builds a x.d file for each -# x.c file that describes the dependencies. We then conditionally include -# the generated .d files. -# - -# -# If making 'clean', do not include any .d files. If they are included, -# gmake intrinsically tries to remake them all. -# -# We add this 'UNIQUE' section here to remove repeated compiler/linker flags and, -# thus, make the command line shorter. Some compilers are sensitive to the length of -# the command line. -# Note that this changes the order of options. For example, if we have '-DDISPLAY_MEM_USAGE=1', -# followed by '-DDISPLAY_MEM_USAGE=0' followed by '-DDISPLAY_MEM_USAGE=1' then, without UNIQUE, -# the 'winner' is '-DDISPLAY_MEM_USAGE=1' while, with UNIQUE, the winner is '-DDISPLAY_MEM_USAGE=0'. -# Also note that, for UNIQE to work properly, we need to attach compilation flags, which are expected -# to appear a few time, to their argument. So, for example, we should use -# KFLAGS += -include$(LINUX_INCLUDE_BUILD)/generated/uapi/linux/version.h -# rather than -# KFLAGS += -include $(LINUX_INCLUDE_BUILD)/generated/uapi/linux/version.h -# -# Note that, to be on the safe side, we only 'clean' duplicates of -# either -D or -I type. The original 'cleanup' was for all options: -# UNIQE = $(if $1,$(firstword $1) $(call UNIQE,$(filter-out $(firstword $1),$1))) -# -# We add this section here since 'Make.depend' is, virtually, included by each compiling make file. -# -ifeq ($(ARCH),arm64) - XUNIQE = $(if $1,$(firstword $1)$(if $(filter -D% -I%,$(firstword $1)), $(call XUNIQE,$(filter-out $(firstword $1),$1)), $(call XUNIQE,$(wordlist 2,$(words $1),$1)) ) ) - CFLAGS := $(call XUNIQE,$(CFLAGS)) - CFGFLAGS := $(call XUNIQE,$(CFGFLAGS)) - PHYMOD_CPPFLAGS := $(call XUNIQE,$(PHYMOD_CPPFLAGS)) - SDK_CPPFLAGS := $(call XUNIQE,$(SDK_CPPFLAGS)) - CXXFLAGS := $(call XUNIQE,$(CXXFLAGS)) -endif - -ifeq (,$(findstring clean,$(MAKECMDGOALS))) - -ZFS :=$(wildcard *.zf) -ZFC := $(ZFS:.zf=.c) - -ifdef GENERATE_C_FILES -ifndef GEN_INCS -$(error "GEN_INCS was not defined") -endif - -ZF_GEN = ${SDK}/tools/zFrameCodeGen.pl - -# 1=.zf -define ZFS_RULE -$(1:.zf=Console.c) : $(1:.zf=.c) - @echo updated $$@ from $$? - -$(1:.zf=.c) : $(1) $(ZF_GEN) - @$(PERL) $(ZF_GEN) -s -z . -p . -g $1 -t c - @echo generated ${LOCALDIR}/$$@ from $(1) - @mv $$(*F).cx $$@ - @if [ -e $$(*F)Console.cx ] ; then \ - mv $$(*F)Console.cx $$(*F)Console.c; \ - echo Created $$(*F)Console.c ;\ - fi - @if [ -e $$(*F)Console.hx ] ; then \ - echo Created $(GEN_INCS)/$$(*F)Console.hx ;\ - mv $$(*F)Console.hx $(GEN_INCS)/ ; \ - fi - @mv $$(*F).hx $(GEN_INCS)/ -endef - -$(foreach zf,$(ZFS),$(eval $(call ZFS_RULE,$(zf)))) - -${BLDDIR}/%.P : ${BLDDIR}/.tree %.c - -.PHONY: GENFILES -GENFILES: $(ZFC) - -$(BOBJS) : $(ZFC) - -else -# -# Attempt to build the depend files. If it fails, the depend file is -# removed so that it is not included in later builds. -# -${BLDDIR}/%.P : %.c ${BLDDIR}/.tree - @$(ECHO) Dependencies for ${LOCALDIR}/$< - -${BLDDIR}/%.P : %.cc ${BLDDIR}/.tree - @$(ECHO) Dependencies for ${LOCALDIR}/$< - -endif - -# -# If there are C or C++ files in this directory, include the -# depend files for them. -# - -ifeq ($(findstring _COMPILER,$(MAKECMDGOALS))$(findstring variable,$(MAKECMDGOALS)),) -ifneq ($(strip ${LSRCS}),) -ifneq (,$(findstring .o,$(MAKECMDGOALS))) --include $(addprefix ${BLDDIR}/,$(MAKECMDGOALS:.o=.P)) $(addprefix ${BLDDIR}/,$(MAKECMDGOALS:.o=.sig)) -else --include $(addprefix ${BLDDIR}/,$(addsuffix .P,$(basename $(LSRCS)))) $(addprefix ${BLDDIR}/,$(addsuffix .sig,$(basename $(LSRCS)))) -endif -endif -endif - -endif # !CLEANING - -clean_d:: -ifdef QUIET - @$(ECHO) Cleaning dependencies for ${LOCALDIR} -endif -ifdef GENERATE_C_FILES - $Q$(RM) $(ZFC:%=$(SDK)/$(LOCALDIR)/%) $(ZFC:%.c=$(SDK)/$(LOCALDIR)/%Console.c) -endif - -clean:: clean_d diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-gts b/platform/broadcom/saibcm-modules/make/Makefile.linux-gts deleted file mode 100644 index 6d2adc3c462..00000000000 --- a/platform/broadcom/saibcm-modules/make/Makefile.linux-gts +++ /dev/null @@ -1,175 +0,0 @@ -# $Id: Makefile.linux-xlr-4_19,v 0.1 Broadcom SDK $ -# -# $Copyright: 2017-2025 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ -# -# - -# -# XLR system make file. -# -# Most of this was taken from target x86-smp_generic_64-2_6. -# - -############################################################################# -# this segment is custom and not sourced from any existing makefile # -# (base thanks to http:confluence.broadcom.com/display/NTSWSW/X86+System) # -############################################################################# - -# set up a basic feature list. tcl, etc. # -#ifeq (,$(FEATURE_LIST)) -#FEATURE_LIST = TCL BFD PTP CINT L3 I2C MEM_SCAN EDITLINE BCM_SAL_PROFILE CUSTOMER TEST CHASSIS MSTP RCPU -#endif - -# some basic path variables for tools and kernel source, etc # -XLR_TOOLS_BASE ?= /projects/ntsw-tools/linux/xlr-612 -TOOLCHAIN_DIR = $(XLR_TOOLS_BASE)/buildroot/host/usr -ifeq (1,$(USE_CLANG)) -KERNDIR = $(XLR_TOOLS_BASE)/kernel/linux-clang -endif -KERNDIR ?= $(XLR_TOOLS_BASE)/kernel/linux - -# Target machine for EDK-Host defconfig -TARGET_MACHINE ?= x86_64 - -# set up cross compile prefix, tools dir variables. # -export CROSS_COMPILE := x86_64-linux- -export TOOLS_DIR := $(TOOLCHAIN_DIR)/bin - -# architecture. # -ARCH = x86_64 -TARGET_ARCHITECTURE = x86_64-broadcom-linux-gnu - -# Noisy kernel build -KBUILD_VERBOSE = 1 - -export ARCH KBUILD_VERBOSE - -# set up paths. # -export LIBRARY_PATH := $(TOOLCHAIN_DIR)/lib:$(TOOLCHAIN_DIR)/lib64:$(LIBRARY_PATH) -export PATH := $(TOOLCHAIN_DIR)/bin:$(KERNDIR):$(PATH) - -# set up SYSINC path # -CROSS_GCC_VER ?= $(shell $(TOOLCHAIN_DIR)/bin/$(CROSS_COMPILE)gcc -dumpversion) -CROSS_GCC_VER_MAJOR := $(shell echo $(CROSS_GCC_VER) | cut -f1 -d.) -export SYSINC := $(TOOLCHAIN_DIR)/lib/gcc/$(TARGET_ARCHITECTURE)/$(CROSS_GCC_VER)/include - -# Upgrade TCL version from default 8.3 to 8.4 -# Because the incompatible-pointer-types warnings will be treated as errors in new toolchain. -export TCL840 := 1 - -# Common CFLAGS -CFGFLAGS += -DUSE_LINUX_BDE_MMAP=1 -#CFGFLAGS += -DBDE_LINUX_USE_MSI_INTERRUPT -ifneq (1,$(USE_CLANG)) -CFLAGS += -L$(TOOLCHAIN_DIR)/lib -CFLAGS += -L$(TOOLCHAIN_DIR)/lib64 -endif -#OPT_CFLAGS += -Wl,--rpath=/lib64 # may need to set rpath and dynamic-linker path here (and possibly in KLFAGS below) in the future, # -#OPT_CFLAGS += -Wl,--dynamic-linker=/lib64/ld-linux-x86-64.so.2 # if we want to build the target executable to be used with shared libs # - -# Needed for a warning in src/soc/phy/fcmap/src/bfcmap88060_a0.c that can't be -# fixed because of a Montreal2 FW dependency -ifeq ($(LOCALDIR),src/soc/phy/fcmap/src) -OPT_CFLAGS += -Wno-address-of-packed-member -endif - -# Compiler-specific CFLAGS -ifeq (1,$(USE_CLANG)) # CLANG-specific CFLAGS -ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 12)" "1" - export LIBNSL_DEPRECATED := 1 -endif -else # GCC-specific CFLAGS -ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 8)" "1" -endif -ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 9)" "1" -endif -ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 10)" "1" - CFLAGS += -fcommon -endif -ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 12)" "1" - CFLAGS += -flarge-source-files - export LIBNSL_DEPRECATED := 1 -endif -ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 13)" "1" - CFLAGS += -fcf-protection -endif -endif # Compiler-specific CFLAGS - -#XLDK-568 fix inline references -CFGFLAGS += -fgnu89-inline - -# set up KFLAGS appropriately. # -ifeq (,$(KFLAGS)) -KFLAGS := -I$(KERNDIR) -nostdinc -isystem $(SYSINC) -Iinclude -I$(KERNDIR)/arch/x86/include -I$(KERNDIR)/arch/x86/include/generated -I$(KERNDIR)/arch/x86/include/generated/uapi -I$(KERNDIR)/arch/x86/include/uapi -I$(KERNDIR)/include -I$(KERNDIR)/include/generated -I$(KERNDIR)/include/generated/uapi -I$(KERNDIR)/include/uapi -include $(KERNDIR)/include/generated/autoconf.h -ifeq (1,$(USE_CLANG)) -KFLAGS += -D__KERNEL__ --target=x86_64-linux-gnu -fintegrated-as -Werror=unknown-warning-option -Werror=ignored-optimization-argument -Werror=option-ignored -Werror=unused-command-line-argument -fmacro-prefix-map=./= -std=gnu11 -fshort-wchar -funsigned-char -fno-common -fno-PIE -fno-strict-aliasing -mno-sse -mno-mmx -mno-sse2 -mno-3dnow -mno-avx -fcf-protection=none -m64 -falign-loops=1 -mno-80387 -mno-fp-ret-in-387 -mstack-alignment=8 -mskip-rax-setup -mtune=generic -mno-red-zone -mcmodel=kernel -Wno-sign-compare -fno-asynchronous-unwind-tables -mretpoline-external-thunk -mindirect-branch-cs-prefix -mfunction-return=thunk-extern -fpatchable-function-entry=16,16 -fno-delete-null-pointer-checks -O2 -fstack-protector-strong -fomit-frame-pointer -fno-stack-clash-protection -falign-functions=16 -fstrict-flex-arrays=3 -fno-strict-overflow -fno-stack-check -Wall -Wundef -Werror=implicit-function-declaration -Werror=implicit-int -Werror=return-type -Werror=strict-prototypes -Wno-format-security -Wno-trigraphs -Wno-frame-address -Wno-address-of-packed-member -Wframe-larger-than=2048 -Wno-gnu -Wno-unused-but-set-variable -Wno-unused-const-variable -Wvla -Wno-pointer-sign -Wcast-function-type -Wimplicit-fallthrough -Werror=date-time -Werror=incompatible-pointer-types -Wenum-conversion -Wno-unused-but-set-variable -Wno-unused-const-variable -Wno-pointer-to-enum-cast -Wno-tautological-constant-out-of-range-compare -Wno-unaligned-access -Wno-cast-function-type-strict -Wno-missing-field-initializers -Wno-type-limits -Wno-shift-negative-value -Wno-initializer-overrides -Wno-sign-compare -KFLAGS += -fno-pie -else -KFLAGS += -D__KERNEL__ -fmacro-prefix-map=./= -std=gnu11 -fshort-wchar -funsigned-char -fno-common -fno-PIE -fno-strict-aliasing -mno-sse -mno-mmx -mno-sse2 -mno-3dnow -mno-avx -fcf-protection=none -m64 -falign-jumps=1 -falign-loops=1 -mno-80387 -mno-fp-ret-in-387 -mpreferred-stack-boundary=3 -mskip-rax-setup -mtune=generic -mno-red-zone -mcmodel=kernel -Wno-sign-compare -fno-asynchronous-unwind-tables -mindirect-branch=thunk-extern -mindirect-branch-register -mindirect-branch-cs-prefix -mfunction-return=thunk-extern -fno-jump-tables -fpatchable-function-entry=16,16 -fno-delete-null-pointer-checks -O2 -fno-allow-store-data-races -fstack-protector-strong -fomit-frame-pointer -fno-stack-clash-protection -falign-functions=16 -fstrict-flex-arrays=3 -fno-strict-overflow -fno-stack-check -fconserve-stack -Wall -Wundef -Werror=implicit-function-declaration -Werror=implicit-int -Werror=return-type -Werror=strict-prototypes -Wno-format-security -Wno-trigraphs -Wno-frame-address -Wno-address-of-packed-member -Wframe-larger-than=2048 -Wno-main -Wno-unused-but-set-variable -Wno-unused-const-variable -Wno-dangling-pointer -Wvla -Wno-pointer-sign -Wcast-function-type -Wno-array-bounds -Wno-alloc-size-larger-than -Wimplicit-fallthrough=5 -Werror=date-time -Werror=incompatible-pointer-types -Werror=designated-init -Wenum-conversion -Wno-unused-but-set-variable -Wno-unused-const-variable -Wno-restrict -Wno-packed-not-aligned -Wno-format-overflow -Wno-format-truncation -Wno-stringop-overflow -Wno-stringop-truncation -Wno-missing-field-initializers -Wno-type-limits -Wno-shift-negative-value -Wno-maybe-uninitialized -Wno-sign-compare -KFLAGS += -L$(TOOLCHAIN_DIR)/lib -L$(TOOLCHAIN_DIR)/lib64 -lc -funit-at-a-time -maccumulate-outgoing-args -fconserve-stack -endif -endif - - -###################################################################### -# this segment comes from make/Makefile.linux-x86-smp_generic_64-2_6 # -###################################################################### -CFGFLAGS += -DLONGS_ARE_64BITS -CFGFLAGS += -DPTRS_ARE_64BITS -CFGFLAGS += -DPHYS_ADDRS_ARE_64BITS -CFGFLAGS += -DSAL_SPL_LOCK_ON_IRQ - - -############################################################## -# This segment comes from make/Makefile.linux-x86-common-2_6 # -############################################################## -CFGFLAGS += -DSYS_BE_PIO=0 -DSYS_BE_PACKET=0 -DSYS_BE_OTHER=0 -ENDIAN = LE_HOST=1 -CFGFLAGS += -D$(ENDIAN) -CFGFLAGS += -DBCM_PLATFORM_STRING=\"X86\" -CFGFLAGS += -DSAL_BDE_DMA_MEM_DEFAULT=32 - -HASH := \# -# Extra variables. -EXTRA_CFLAGS = -D"KBUILD_STR(s)=$(HASH)s" $(basename_flags) $(modname_flags) - -comma = , -basetarget = $(basename $(notdir $@)) -modname = $(basetarget) - -name-fix = $(subst $(comma),_,$(subst -,_,$1)) -basename_flags = -D"KBUILD_BASENAME=KBUILD_STR($(call name-fix,$(basetarget)))" -modname_flags = $(if $(filter 1,$(words $(modname))),\ --D"KBUILD_MODNAME=KBUILD_STR($(call name-fix,$(modname)))") - -# Default open source target build -OPENSRC_BUILD ?= fed21-x86_64 - -ifneq ($(targetplat),user) -# By default we exclude -Werror from x86 kernel builds -BCM_CFLAGS = -Wall -include ${SDK}/make/Makefile.linux-kernel-2_6 -endif diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-slk b/platform/broadcom/saibcm-modules/make/Makefile.linux-slk deleted file mode 100644 index 2badfe3b9f0..00000000000 --- a/platform/broadcom/saibcm-modules/make/Makefile.linux-slk +++ /dev/null @@ -1,171 +0,0 @@ -# $Id: Makefile.linux-slk Exp $ -# -# $Copyright: 2017-2025 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ -# -# -# Makefile for SLK - -# User must select one platform from below.By default ARM_LINUX is selected. . -ifeq (,$(BUILD_PLATFORM)) -BUILD_PLATFORM=ARM_LINUX -endif - -# Upgrade TCL version from default 8.3 to 8.4 -ifneq ($(ESW_CHIPS)$(LTSW_CHIPS),) -export TCL840 := 1 -endif - -# TOOLCHAIN_BASE_DIR Toolchain base directory for SLK devices -# TARGET_ARCHITECTURE Compiler for target architecture -# KERNDIR Kernel directory for SLK devices -TOOLCHAIN_BASE_DIR ?= /projects/ntsw-tools/linux/slk-gcc13 -TARGET_ARCHITECTURE ?= aarch64-broadcom-linux-gnu -KERNDIR ?= /projects/ntsw-tools/linux/slk66/kernel/linux - -# Tools prefix -CROSS_COMPILE ?= aarch64-linux- - -# Target machine for EDK-Host defconfig -TARGET_MACHINE ?= slk_le - -# A72 tools -TOOLCHAIN_BIN_DIR=$(TOOLCHAIN_BASE_DIR)/buildroot/host/usr/bin -override PATH:=$(TOOLCHAIN_BASE_DIR)/buildroot/host/usr/$(TARGET_ARCHITECTURE)/bin:$(TOOLCHAIN_BIN_DIR):$(PATH) -LD_LIBRARY_PATH=$(TOOLCHAIN_BASE_DIR)/buildroot/host/usr/lib -export TOOLCHAIN_BIN_DIR LD_LIBRARY_PATH - -CROSS_GCC_VER ?= $(shell $(TOOLCHAIN_BIN_DIR)/$(CROSS_COMPILE)gcc -dumpversion) -CROSS_GCC_VER_MAJOR := $(shell echo $(CROSS_GCC_VER) | cut -f1 -d.) - -# Default Linux include directory -ifeq (,$(LINUX_INCLUDE)) -LINUX_INCLUDE := $(KERNDIR)/include -endif - -CFGFLAGS += -DSYS_BE_PIO=0 -DSYS_BE_PACKET=0 -DSYS_BE_OTHER=0 -ENDIAN = LE_HOST=1 - -ifeq (1,$(SLK_32BIT)) -CFGFLAGS += -DSAL_BDE_32BIT_USER_64BIT_KERNEL -else -CFGFLAGS += -DPTRS_ARE_64BITS -DLONGS_ARE_64BITS -endif -CFGFLAGS += -DPHYS_ADDRS_ARE_64BITS - -ifeq (1,$(USE_CLANG)) -CLANG_ADD_CFLAGS += --target=$(TARGET_ARCHITECTURE) \ - --gcc-toolchain=$(TOOLCHAIN_BASE_DIR)/buildroot/host/usr \ - --sysroot=$(TOOLCHAIN_BASE_DIR)/buildroot/host/$(TARGET_ARCHITECTURE)/sysroot -OPT_KERNEL_TOOLCHAIN = CC=$(CROSS_COMPILE)gcc LD=$(CROSS_COMPILE)ld AR=$(CROSS_COMPILE)ar -export KERNEL_LLVM = 0 -export NO_PRECOMPILED_MODULE = 1 -export LIBNSL_DEPRECATED = 1 -else -# Needed for a warning in src/soc/phy/fcmap/src/bfcmap88060_a0.c that can't be -# fixed because of a Montreal2 FW dependency -ifeq ($(LOCALDIR),src/soc/phy/fcmap/src) -OPT_CFLAGS += -Wno-address-of-packed-member -endif - -CFLAGS += -fno-aggressive-loop-optimizations -fno-strict-overflow -CFLAGS += -fgnu89-inline -ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 8)" "1" -endif -ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 9)" "1" -endif -ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 10)" "1" - CFLAGS += -fcommon -endif -ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 12)" "1" - CFLAGS += -flarge-source-files - export LIBNSL_DEPRECATED := 1 -endif -ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 13)" "1" -endif -endif - -CFGFLAGS += -D$(ENDIAN) -DBCM958525 -CFGFLAGS += -DBCM_PLATFORM_STRING=\"SLK_BCM957812\" -CFGFLAGS += -DSAL_BDE_DMA_MEM_DEFAULT=32 -CFGFLAGS += -D_SIMPLE_MEMORY_ALLOCATION_=1 - -ifdef DPP_CHIPS -CFGFLAGS += -DDUNE_BCM -D__DUNE_LINUX_BCM_CPU_PCP_DMA__ -CFGFLAGS += -DSOC_CM_FUNCTION -endif - -ifdef DFE_CHIPS -CFGFLAGS += -DDUNE_BCM -CFGFLAGS += -DSOC_CM_FUNCTION -endif - -ifdef SAND_CHIPS -CFGFLAGS += -D__DUNE_SLK_BCM_CPU__ -D__DUNE_LINUX_BCM_CPU_PCIE__ -endif - -# Enable cached DMA memory by default -ifeq (,$(SAL_BDE_USE_CACHED_DMA_MEM)) -SAL_BDE_USE_CACHED_DMA_MEM = 1 -endif -ifeq ($(SAL_BDE_USE_CACHED_DMA_MEM),1) -CFGFLAGS += -DSAL_BDE_CACHE_DMA_MEM -endif - -ifeq (1,$(SLK_32BIT)) -ARCH = arm -else -ARCH = arm64 -endif - -KBUILD_VERBOSE = 1 - -export ARCH KBUILD_VERBOSE - -comma = , -basetarget = $(basename $(notdir $@)) -modname = $(basetarget) - -HASH := \# -# Extra variables. -EXTRA_CFLAGS = -D"KBUILD_STR(s)=$(HASH)s" $(basename_flags) $(modname_flags) - -name-fix = $(subst $(comma),_,$(subst -,_,$1)) -basename_flags = -D"KBUILD_BASENAME=KBUILD_STR($(call name-fix,$(basetarget)))" -modname_flags = $(if $(filter 1,$(words $(modname))),\ - -D"KBUILD_MODNAME=KBUILD_STR($(call name-fix,$(modname)))") - -KFLAG_INCLD ?= $(LD_LIBRARY_PATH)/gcc/$(TARGET_ARCHITECTURE)/$(CROSS_GCC_VER)/include - -ifeq (,$(KFLAGS)) -KFLAGS := -D__LINUX_ARM_ARCH__=8 -D__KERNEL__ -DPTRS_ARE_64BITS -DLONGS_ARE_64BITS -nostdinc -isystem $(KFLAG_INCLD) -I$(LINUX_INCLUDE) -include $(LINUX_INCLUDE)/generated/autoconf.h -I$(KERNDIR)/arch/arm64/include -I$(KERNDIR)/arch/arm64/include/generated -I$(KERNDIR)/arch/arm64/include/generated/uapi -I$(KERNDIR)/arch/arm64/include/generated/asm -I$(KERNDIR)/include/uapi -I$(KERNDIR)/include/generated/uapi -I$(KERNDIR)/arch/arm64/include/uapi -Wall -Wstrict-prototypes -Wno-trigraphs -O2 -fno-strict-aliasing -fno-common -fno-pic -pipe -ffreestanding -fomit-frame-pointer -g -fno-stack-protector -Wdeclaration-after-statement -Wno-pointer-sign -mcmodel=large -endif - -# Default open source target build -OPENSRC_BUILD ?= linaro_arm64_le - -ifneq ($(targetplat),user) -include ${SDK}/make/Makefile.linux-kernel-3_6 -endif diff --git a/platform/broadcom/saibcm-modules/make/Makefile.linux-xlr b/platform/broadcom/saibcm-modules/make/Makefile.linux-xlr deleted file mode 100644 index 6d2adc3c462..00000000000 --- a/platform/broadcom/saibcm-modules/make/Makefile.linux-xlr +++ /dev/null @@ -1,175 +0,0 @@ -# $Id: Makefile.linux-xlr-4_19,v 0.1 Broadcom SDK $ -# -# $Copyright: 2017-2025 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ -# -# - -# -# XLR system make file. -# -# Most of this was taken from target x86-smp_generic_64-2_6. -# - -############################################################################# -# this segment is custom and not sourced from any existing makefile # -# (base thanks to http:confluence.broadcom.com/display/NTSWSW/X86+System) # -############################################################################# - -# set up a basic feature list. tcl, etc. # -#ifeq (,$(FEATURE_LIST)) -#FEATURE_LIST = TCL BFD PTP CINT L3 I2C MEM_SCAN EDITLINE BCM_SAL_PROFILE CUSTOMER TEST CHASSIS MSTP RCPU -#endif - -# some basic path variables for tools and kernel source, etc # -XLR_TOOLS_BASE ?= /projects/ntsw-tools/linux/xlr-612 -TOOLCHAIN_DIR = $(XLR_TOOLS_BASE)/buildroot/host/usr -ifeq (1,$(USE_CLANG)) -KERNDIR = $(XLR_TOOLS_BASE)/kernel/linux-clang -endif -KERNDIR ?= $(XLR_TOOLS_BASE)/kernel/linux - -# Target machine for EDK-Host defconfig -TARGET_MACHINE ?= x86_64 - -# set up cross compile prefix, tools dir variables. # -export CROSS_COMPILE := x86_64-linux- -export TOOLS_DIR := $(TOOLCHAIN_DIR)/bin - -# architecture. # -ARCH = x86_64 -TARGET_ARCHITECTURE = x86_64-broadcom-linux-gnu - -# Noisy kernel build -KBUILD_VERBOSE = 1 - -export ARCH KBUILD_VERBOSE - -# set up paths. # -export LIBRARY_PATH := $(TOOLCHAIN_DIR)/lib:$(TOOLCHAIN_DIR)/lib64:$(LIBRARY_PATH) -export PATH := $(TOOLCHAIN_DIR)/bin:$(KERNDIR):$(PATH) - -# set up SYSINC path # -CROSS_GCC_VER ?= $(shell $(TOOLCHAIN_DIR)/bin/$(CROSS_COMPILE)gcc -dumpversion) -CROSS_GCC_VER_MAJOR := $(shell echo $(CROSS_GCC_VER) | cut -f1 -d.) -export SYSINC := $(TOOLCHAIN_DIR)/lib/gcc/$(TARGET_ARCHITECTURE)/$(CROSS_GCC_VER)/include - -# Upgrade TCL version from default 8.3 to 8.4 -# Because the incompatible-pointer-types warnings will be treated as errors in new toolchain. -export TCL840 := 1 - -# Common CFLAGS -CFGFLAGS += -DUSE_LINUX_BDE_MMAP=1 -#CFGFLAGS += -DBDE_LINUX_USE_MSI_INTERRUPT -ifneq (1,$(USE_CLANG)) -CFLAGS += -L$(TOOLCHAIN_DIR)/lib -CFLAGS += -L$(TOOLCHAIN_DIR)/lib64 -endif -#OPT_CFLAGS += -Wl,--rpath=/lib64 # may need to set rpath and dynamic-linker path here (and possibly in KLFAGS below) in the future, # -#OPT_CFLAGS += -Wl,--dynamic-linker=/lib64/ld-linux-x86-64.so.2 # if we want to build the target executable to be used with shared libs # - -# Needed for a warning in src/soc/phy/fcmap/src/bfcmap88060_a0.c that can't be -# fixed because of a Montreal2 FW dependency -ifeq ($(LOCALDIR),src/soc/phy/fcmap/src) -OPT_CFLAGS += -Wno-address-of-packed-member -endif - -# Compiler-specific CFLAGS -ifeq (1,$(USE_CLANG)) # CLANG-specific CFLAGS -ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 12)" "1" - export LIBNSL_DEPRECATED := 1 -endif -else # GCC-specific CFLAGS -ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 8)" "1" -endif -ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 9)" "1" -endif -ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 10)" "1" - CFLAGS += -fcommon -endif -ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 12)" "1" - CFLAGS += -flarge-source-files - export LIBNSL_DEPRECATED := 1 -endif -ifeq "$(shell expr $(CROSS_GCC_VER_MAJOR) \>= 13)" "1" - CFLAGS += -fcf-protection -endif -endif # Compiler-specific CFLAGS - -#XLDK-568 fix inline references -CFGFLAGS += -fgnu89-inline - -# set up KFLAGS appropriately. # -ifeq (,$(KFLAGS)) -KFLAGS := -I$(KERNDIR) -nostdinc -isystem $(SYSINC) -Iinclude -I$(KERNDIR)/arch/x86/include -I$(KERNDIR)/arch/x86/include/generated -I$(KERNDIR)/arch/x86/include/generated/uapi -I$(KERNDIR)/arch/x86/include/uapi -I$(KERNDIR)/include -I$(KERNDIR)/include/generated -I$(KERNDIR)/include/generated/uapi -I$(KERNDIR)/include/uapi -include $(KERNDIR)/include/generated/autoconf.h -ifeq (1,$(USE_CLANG)) -KFLAGS += -D__KERNEL__ --target=x86_64-linux-gnu -fintegrated-as -Werror=unknown-warning-option -Werror=ignored-optimization-argument -Werror=option-ignored -Werror=unused-command-line-argument -fmacro-prefix-map=./= -std=gnu11 -fshort-wchar -funsigned-char -fno-common -fno-PIE -fno-strict-aliasing -mno-sse -mno-mmx -mno-sse2 -mno-3dnow -mno-avx -fcf-protection=none -m64 -falign-loops=1 -mno-80387 -mno-fp-ret-in-387 -mstack-alignment=8 -mskip-rax-setup -mtune=generic -mno-red-zone -mcmodel=kernel -Wno-sign-compare -fno-asynchronous-unwind-tables -mretpoline-external-thunk -mindirect-branch-cs-prefix -mfunction-return=thunk-extern -fpatchable-function-entry=16,16 -fno-delete-null-pointer-checks -O2 -fstack-protector-strong -fomit-frame-pointer -fno-stack-clash-protection -falign-functions=16 -fstrict-flex-arrays=3 -fno-strict-overflow -fno-stack-check -Wall -Wundef -Werror=implicit-function-declaration -Werror=implicit-int -Werror=return-type -Werror=strict-prototypes -Wno-format-security -Wno-trigraphs -Wno-frame-address -Wno-address-of-packed-member -Wframe-larger-than=2048 -Wno-gnu -Wno-unused-but-set-variable -Wno-unused-const-variable -Wvla -Wno-pointer-sign -Wcast-function-type -Wimplicit-fallthrough -Werror=date-time -Werror=incompatible-pointer-types -Wenum-conversion -Wno-unused-but-set-variable -Wno-unused-const-variable -Wno-pointer-to-enum-cast -Wno-tautological-constant-out-of-range-compare -Wno-unaligned-access -Wno-cast-function-type-strict -Wno-missing-field-initializers -Wno-type-limits -Wno-shift-negative-value -Wno-initializer-overrides -Wno-sign-compare -KFLAGS += -fno-pie -else -KFLAGS += -D__KERNEL__ -fmacro-prefix-map=./= -std=gnu11 -fshort-wchar -funsigned-char -fno-common -fno-PIE -fno-strict-aliasing -mno-sse -mno-mmx -mno-sse2 -mno-3dnow -mno-avx -fcf-protection=none -m64 -falign-jumps=1 -falign-loops=1 -mno-80387 -mno-fp-ret-in-387 -mpreferred-stack-boundary=3 -mskip-rax-setup -mtune=generic -mno-red-zone -mcmodel=kernel -Wno-sign-compare -fno-asynchronous-unwind-tables -mindirect-branch=thunk-extern -mindirect-branch-register -mindirect-branch-cs-prefix -mfunction-return=thunk-extern -fno-jump-tables -fpatchable-function-entry=16,16 -fno-delete-null-pointer-checks -O2 -fno-allow-store-data-races -fstack-protector-strong -fomit-frame-pointer -fno-stack-clash-protection -falign-functions=16 -fstrict-flex-arrays=3 -fno-strict-overflow -fno-stack-check -fconserve-stack -Wall -Wundef -Werror=implicit-function-declaration -Werror=implicit-int -Werror=return-type -Werror=strict-prototypes -Wno-format-security -Wno-trigraphs -Wno-frame-address -Wno-address-of-packed-member -Wframe-larger-than=2048 -Wno-main -Wno-unused-but-set-variable -Wno-unused-const-variable -Wno-dangling-pointer -Wvla -Wno-pointer-sign -Wcast-function-type -Wno-array-bounds -Wno-alloc-size-larger-than -Wimplicit-fallthrough=5 -Werror=date-time -Werror=incompatible-pointer-types -Werror=designated-init -Wenum-conversion -Wno-unused-but-set-variable -Wno-unused-const-variable -Wno-restrict -Wno-packed-not-aligned -Wno-format-overflow -Wno-format-truncation -Wno-stringop-overflow -Wno-stringop-truncation -Wno-missing-field-initializers -Wno-type-limits -Wno-shift-negative-value -Wno-maybe-uninitialized -Wno-sign-compare -KFLAGS += -L$(TOOLCHAIN_DIR)/lib -L$(TOOLCHAIN_DIR)/lib64 -lc -funit-at-a-time -maccumulate-outgoing-args -fconserve-stack -endif -endif - - -###################################################################### -# this segment comes from make/Makefile.linux-x86-smp_generic_64-2_6 # -###################################################################### -CFGFLAGS += -DLONGS_ARE_64BITS -CFGFLAGS += -DPTRS_ARE_64BITS -CFGFLAGS += -DPHYS_ADDRS_ARE_64BITS -CFGFLAGS += -DSAL_SPL_LOCK_ON_IRQ - - -############################################################## -# This segment comes from make/Makefile.linux-x86-common-2_6 # -############################################################## -CFGFLAGS += -DSYS_BE_PIO=0 -DSYS_BE_PACKET=0 -DSYS_BE_OTHER=0 -ENDIAN = LE_HOST=1 -CFGFLAGS += -D$(ENDIAN) -CFGFLAGS += -DBCM_PLATFORM_STRING=\"X86\" -CFGFLAGS += -DSAL_BDE_DMA_MEM_DEFAULT=32 - -HASH := \# -# Extra variables. -EXTRA_CFLAGS = -D"KBUILD_STR(s)=$(HASH)s" $(basename_flags) $(modname_flags) - -comma = , -basetarget = $(basename $(notdir $@)) -modname = $(basetarget) - -name-fix = $(subst $(comma),_,$(subst -,_,$1)) -basename_flags = -D"KBUILD_BASENAME=KBUILD_STR($(call name-fix,$(basetarget)))" -modname_flags = $(if $(filter 1,$(words $(modname))),\ --D"KBUILD_MODNAME=KBUILD_STR($(call name-fix,$(modname)))") - -# Default open source target build -OPENSRC_BUILD ?= fed21-x86_64 - -ifneq ($(targetplat),user) -# By default we exclude -Werror from x86 kernel builds -BCM_CFLAGS = -Wall -include ${SDK}/make/Makefile.linux-kernel-2_6 -endif diff --git a/platform/broadcom/saibcm-modules/sdklt/Makefile b/platform/broadcom/saibcm-modules/sdklt/Makefile deleted file mode 100644 index 6f5fac3f6cd..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/Makefile +++ /dev/null @@ -1,126 +0,0 @@ -# -# Copyright 2018-2025 Broadcom. All rights reserved. -# The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License -# version 2 as published by the Free Software Foundation. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# A copy of the GNU General Public License version 2 (GPLv2) can -# be found in the LICENSES folder. -# -# Makefile for building Linux GPL kernel modules for SDKLT. -# - -help: - @echo '' - @echo 'Build Linux GPL kernel modules for SDKLT.' - @echo '' - @echo 'Available make targets:' - @echo 'kmod - Build kernel modules' - @echo 'clean - Remove object files' - @echo '' - @echo 'Supported make variables:' - @echo 'KDIR - Linux kernel source directory (mandatory)' - @echo 'CROSS_COPILE - Cross-compiler prefix (optional)' - @echo 'OUTPUT_DIR - Output directory (build/ by default)' - @echo '' - @echo 'Examples:' - @echo 'make -s KDIR=$$KERNEL/linux kmod' - @echo 'make -s clean' - @echo '' - -ifndef KDIR -nokdir: - @echo 'Error: The $$KDIR environment variable is not set.' - @echo '$$KDIR must point to a configured Linux kernel source tree.' - exit 1 -endif - -export KDIR -export CROSS_COMPILE - -override SDK := $(CURDIR) - -ifeq (,$(OUTPUT_DIR)) -OUTPUT_DIR := $(CURDIR)/build -endif - -BDE_BLDDIR := $(OUTPUT_DIR)/bde -KNET_BLDDIR := $(OUTPUT_DIR)/knet -KNETCB_BLDDIR := $(OUTPUT_DIR)/knetcb -BCMGENL_BLDDIR := $(OUTPUT_DIR)/bcmgenl -GENL_PACKET_BLDDIR := $(OUTPUT_DIR)/genl-packet -EDK_BLDDIR := $(OUTPUT_DIR)/edk -PTPCLOCK_BLDDIR := $(OUTPUT_DIR)/ptpclock -ST_BLDDIR := $(OUTPUT_DIR)/st - -LKM_CFLAGS += -UNGKNET_NETIF_MAX -DNGKNET_NETIF_MAX=1056 -UNGKNET_FILTER_MAX -DNGKNET_FILTER_MAX=1025 -export LKM_CFLAGS - -KMODS := bde knet knetcb genl-packet bcmgenl edk ptpclock st - -kmod: $(KMODS) - -bde: - $(MAKE) -C $(SDK)/linux/bde SDK=$(SDK) \ - LKM_BLDDIR=$(BDE_BLDDIR) $(TARGET) - ln -sf $(BDE_BLDDIR)/*.ko $(OUTPUT_DIR) - -knet: bde - $(MAKE) -C $(SDK)/linux/knet SDK=$(SDK) \ - KBUILD_EXTRA_SYMBOLS=$(BDE_BLDDIR)/Module.symvers \ - LKM_BLDDIR=$(KNET_BLDDIR) $(TARGET) - ln -sf $(KNET_BLDDIR)/*.ko $(OUTPUT_DIR) - -knetcb: knet - $(MAKE) -C $(SDK)/linux/knetcb SDK=$(SDK) \ - KBUILD_EXTRA_SYMBOLS=$(KNET_BLDDIR)/Module.symvers \ - LKM_BLDDIR=$(KNETCB_BLDDIR) $(TARGET) - ln -sf $(KNETCB_BLDDIR)/*.ko $(OUTPUT_DIR) - -bcmgenl: knet genl-packet - $(MAKE) -C $(SDK)/linux/bcmgenl SDK=$(SDK) \ - KBUILD_EXTRA_SYMBOLS=$(KNET_BLDDIR)/Module.symvers \ - LKM_BLDDIR=$(BCMGENL_BLDDIR) $(TARGET) - ln -sf $(BCMGENL_BLDDIR)/*.ko $(OUTPUT_DIR) - -genl-packet: - $(MAKE) -C $(SDK)/linux/genl-packet SDK=$(SDK) \ - LKM_BLDDIR=$(GENL_PACKET_BLDDIR) $(TARGET) - ln -sf $(GENL_PACKET_BLDDIR)/*.ko $(OUTPUT_DIR) - -edk: bde - $(MAKE) -C $(SDK)/linux/edk SDK=$(SDK) \ - KBUILD_EXTRA_SYMBOLS=$(BDE_BLDDIR)/Module.symvers \ - LKM_BLDDIR=$(EDK_BLDDIR) $(TARGET) - ln -sf $(EDK_BLDDIR)/*.ko $(OUTPUT_DIR) - -ptpclock: bde knet edk - $(MAKE) -C $(SDK)/linux/ptpclock SDK=$(SDK) \ - KBUILD_EXTRA_SYMBOLS=$(BDE_BLDDIR)/Module.symvers \ - KBUILD_EXTRA_SYMBOLS+=$(KNET_BLDDIR)/Module.symvers \ - KBUILD_EXTRA_SYMBOLS+=$(EDK_BLDDIR)/Module.symvers \ - LKM_BLDDIR=$(PTPCLOCK_BLDDIR) $(TARGET) - ln -sf $(PTPCLOCK_BLDDIR)/*.ko $(OUTPUT_DIR) - -st: bde - $(MAKE) -C $(SDK)/linux/st SDK=$(SDK) \ - KBUILD_EXTRA_SYMBOLS=$(BDE_BLDDIR)/Module.symvers \ - LKM_BLDDIR=$(ST_BLDDIR) $(TARGET) - ln -sf $(ST_BLDDIR)/*.ko $(OUTPUT_DIR) - -clean: - $(MAKE) kmod TARGET=$@ - rm -f $(OUTPUT_DIR)/*.ko - -distclean: - $(MAKE) kmod TARGET=$@ - rm -rf $(OUTPUT_DIR) - -.PHONY: help kmod clean distclean $(KMODS) diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm78910_a0/bcm78910_a0_pdma_attach.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm78910_a0/bcm78910_a0_pdma_attach.c deleted file mode 100644 index 3da6d404847..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm78910_a0/bcm78910_a0_pdma_attach.c +++ /dev/null @@ -1,38 +0,0 @@ -/*! \file bcm78910_a0_pdma_attach.c - * - * Initialize PDMA driver resources. - * - */ -/* - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - */ - -#include -#include -#include - -int -bcm78910_a0_cnet_pdma_attach(struct pdma_dev *dev) -{ - return bcmcnet_cmicr2_pdma_driver_attach(dev); -} - -int -bcm78910_a0_cnet_pdma_detach(struct pdma_dev *dev) -{ - return bcmcnet_cmicr2_pdma_driver_detach(dev); -} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm78914_b0/bcm78914_b0_pdma_attach.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm78914_b0/bcm78914_b0_pdma_attach.c deleted file mode 100644 index bf9e96255cd..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm78914_b0/bcm78914_b0_pdma_attach.c +++ /dev/null @@ -1,38 +0,0 @@ -/*! \file bcm78914_b0_pdma_attach.c - * - * Initialize PDMA driver resources. - * - */ -/* - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - */ - -#include -#include -#include - -int -bcm78914_b0_cnet_pdma_attach(struct pdma_dev *dev) -{ - return bcmcnet_cmicr2_pdma_driver_attach(dev); -} - -int -bcm78914_b0_cnet_pdma_detach(struct pdma_dev *dev) -{ - return bcmcnet_cmicr2_pdma_driver_detach(dev); -} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm78914_b1/bcm78914_b1_pdma_attach.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm78914_b1/bcm78914_b1_pdma_attach.c deleted file mode 100644 index 536097781e6..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm78914_b1/bcm78914_b1_pdma_attach.c +++ /dev/null @@ -1,38 +0,0 @@ -/*! \file bcm78914_b1_pdma_attach.c - * - * Initialize PDMA driver resources. - * - */ -/* - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - */ - -#include -#include -#include - -int -bcm78914_b1_cnet_pdma_attach(struct pdma_dev *dev) -{ - return bcmcnet_cmicr2_pdma_driver_attach(dev); -} - -int -bcm78914_b1_cnet_pdma_detach(struct pdma_dev *dev) -{ - return bcmcnet_cmicr2_pdma_driver_detach(dev); -} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm78920_a0/bcm78920_a0_pdma_attach.c b/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm78920_a0/bcm78920_a0_pdma_attach.c deleted file mode 100644 index 7028467031b..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmcnet/chip/bcm78920_a0/bcm78920_a0_pdma_attach.c +++ /dev/null @@ -1,43 +0,0 @@ -/*! \file bcm78920_a0_pdma_attach.c - * - * Chip stub for packet DMA driver. - * - */ -/* - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - */ - -#ifdef UNFINISHED_DRIVER_CHECK -#error DRIVER UNFINISHED -#endif - -#include -#include -#include - -int -bcm78920_a0_cnet_pdma_attach(struct pdma_dev *dev) -{ - return bcmcnet_cmicr_pdma_driver_attach(dev); -} - -int -bcm78920_a0_cnet_pdma_detach(struct pdma_dev *dev) -{ - return bcmcnet_cmicr_pdma_driver_detach(dev); -} - diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/chip/generated/bcmlrd_variant_defs_internal.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/chip/generated/bcmlrd_variant_defs_internal.h deleted file mode 100644 index a5f95fbb5f8..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/chip/generated/bcmlrd_variant_defs_internal.h +++ /dev/null @@ -1,65 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table definition files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - ******************************************************************************/ -#ifndef BCMLRD_VARIANT_DEFS_INTERNAL_H -#define BCMLRD_VARIANT_DEFS_INTERNAL_H -#ifndef DOXYGEN_IGNORE_AUTOGEN -/*+replace reverse */ -#include "../../defs/generated/bcm78920_a0/vna_4_6_1_0/bcm78920_a0_vna_4_6_1_0_lrd_variant_def.h" -#include "../../defs/generated/bcm78920_a0/bcm78920_a0_lrd_variant_def.h" -#include "../../defs/generated/bcm78914_b1/bcm78914_b1_lrd_variant_def.h" -#include "../../defs/generated/bcm78914_b0/bcm78914_b0_lrd_variant_def.h" -#include "../../defs/generated/bcm78910_a0/bcm78910_a0_lrd_variant_def.h" -#include "../../defs/generated/bcm78907_a0/bcm78907_a0_lrd_variant_def.h" -#include "../../defs/generated/bcm78905_a0/bcm78905_a0_lrd_variant_def.h" -#include "../../defs/generated/bcm78900_b0/bcm78900_b0_lrd_variant_def.h" -#include "../../defs/generated/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_lrd_variant_def.h" -#include "../../defs/generated/bcm78800_a0/cna_6_5_34_2_0/bcm78800_a0_cna_6_5_34_2_0_lrd_variant_def.h" -#include "../../defs/generated/bcm78800_a0/bcm78800_a0_lrd_variant_def.h" -#include "../../defs/generated/bcm56999_a0/bcm56999_a0_lrd_variant_def.h" -#include "../../defs/generated/bcm56998_a0/bcm56998_a0_lrd_variant_def.h" -#include "../../defs/generated/bcm56996_b0/bcm56996_b0_lrd_variant_def.h" -#include "../../defs/generated/bcm56996_a0/bcm56996_a0_lrd_variant_def.h" -#include "../../defs/generated/bcm56990_b0/bcm56990_b0_lrd_variant_def.h" -#include "../../defs/generated/bcm56990_a0/bcm56990_a0_lrd_variant_def.h" -#include "../../defs/generated/bcm56890_a0/dna_6_5_34_8_0/bcm56890_a0_dna_6_5_34_8_0_lrd_variant_def.h" -#include "../../defs/generated/bcm56890_a0/cna_6_5_34_2_0/bcm56890_a0_cna_6_5_34_2_0_lrd_variant_def.h" -#include "../../defs/generated/bcm56890_a0/bcm56890_a0_lrd_variant_def.h" -#include "../../defs/generated/bcm56880_a0/nfa_6_5_34_3_0/bcm56880_a0_nfa_6_5_34_3_0_lrd_variant_def.h" -#include "../../defs/generated/bcm56880_a0/hna_6_5_34_2_0/bcm56880_a0_hna_6_5_34_2_0_lrd_variant_def.h" -#include "../../defs/generated/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_lrd_variant_def.h" -#include "../../defs/generated/bcm56880_a0/bcm56880_a0_lrd_variant_def.h" -#include "../../defs/generated/bcm56780_a0/hna_6_5_34_2_0/bcm56780_a0_hna_6_5_34_2_0_lrd_variant_def.h" -#include "../../defs/generated/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_lrd_variant_def.h" -#include "../../defs/generated/bcm56780_a0/cna_6_5_34_2_0/bcm56780_a0_cna_6_5_34_2_0_lrd_variant_def.h" -#include "../../defs/generated/bcm56780_a0/bcm56780_a0_lrd_variant_def.h" -#include "../../defs/generated/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_lrd_variant_def.h" -#include "../../defs/generated/bcm56690_a0/cna_6_5_34_2_0/bcm56690_a0_cna_6_5_34_2_0_lrd_variant_def.h" -#include "../../defs/generated/bcm56690_a0/bcm56690_a0_lrd_variant_def.h" -#include "../../defs/generated/bcm56080_a0/bcm56080_a0_lrd_variant_def.h" -/*-replace*/ -#endif /* DOXYGEN_IGNORE_AUTOGEN */ -#endif /* BCMLRD_VARIANT_DEFS_INTERNAL_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56690_a0/cna_6_5_34_2_0/bcm56690_a0_cna_6_5_34_2_0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56690_a0/cna_6_5_34_2_0/bcm56690_a0_cna_6_5_34_2_0_lrd_variant_def.h deleted file mode 100644 index ec5d90e7e7d..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56690_a0/cna_6_5_34_2_0/bcm56690_a0_cna_6_5_34_2_0_lrd_variant_def.h +++ /dev/null @@ -1,37 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table mapping files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - ******************************************************************************/ - -#ifndef GEN_BCM56690_A0_CNA_6_5_34_2_0_LRD_VARIANT_DEF_H -#define GEN_BCM56690_A0_CNA_6_5_34_2_0_LRD_VARIANT_DEF_H - -#ifndef DOXYGEN_IGNORE_AUTOGEN - -#define BCMLRD_VARIANT_BCM56690_A0_CNA_6_5_34_2_0 BCMLTD_VARIANT_BCM56690_A0_CNA_6_5_34_2_0 -#endif /* DOXYGEN_IGNORE_AUTOGEN */ - -#endif /* GEN_BCM56690_A0_CNA_6_5_34_2_0_LRD_VARIANT_DEF_H */ - diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/cna_6_5_34_2_0/bcm56780_a0_cna_6_5_34_2_0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/cna_6_5_34_2_0/bcm56780_a0_cna_6_5_34_2_0_lrd_variant_def.h deleted file mode 100644 index 4303c422027..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/cna_6_5_34_2_0/bcm56780_a0_cna_6_5_34_2_0_lrd_variant_def.h +++ /dev/null @@ -1,37 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table mapping files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - ******************************************************************************/ - -#ifndef GEN_BCM56780_A0_CNA_6_5_34_2_0_LRD_VARIANT_DEF_H -#define GEN_BCM56780_A0_CNA_6_5_34_2_0_LRD_VARIANT_DEF_H - -#ifndef DOXYGEN_IGNORE_AUTOGEN - -#define BCMLRD_VARIANT_BCM56780_A0_CNA_6_5_34_2_0 BCMLTD_VARIANT_BCM56780_A0_CNA_6_5_34_2_0 -#endif /* DOXYGEN_IGNORE_AUTOGEN */ - -#endif /* GEN_BCM56780_A0_CNA_6_5_34_2_0_LRD_VARIANT_DEF_H */ - diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/hna_6_5_34_2_0/bcm56780_a0_hna_6_5_34_2_0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/hna_6_5_34_2_0/bcm56780_a0_hna_6_5_34_2_0_lrd_variant_def.h deleted file mode 100644 index e355f5f7deb..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56780_a0/hna_6_5_34_2_0/bcm56780_a0_hna_6_5_34_2_0_lrd_variant_def.h +++ /dev/null @@ -1,37 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table mapping files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - ******************************************************************************/ - -#ifndef GEN_BCM56780_A0_HNA_6_5_34_2_0_LRD_VARIANT_DEF_H -#define GEN_BCM56780_A0_HNA_6_5_34_2_0_LRD_VARIANT_DEF_H - -#ifndef DOXYGEN_IGNORE_AUTOGEN - -#define BCMLRD_VARIANT_BCM56780_A0_HNA_6_5_34_2_0 BCMLTD_VARIANT_BCM56780_A0_HNA_6_5_34_2_0 -#endif /* DOXYGEN_IGNORE_AUTOGEN */ - -#endif /* GEN_BCM56780_A0_HNA_6_5_34_2_0_LRD_VARIANT_DEF_H */ - diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/hna_6_5_34_2_0/bcm56880_a0_hna_6_5_34_2_0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/hna_6_5_34_2_0/bcm56880_a0_hna_6_5_34_2_0_lrd_variant_def.h deleted file mode 100644 index 986f9ea77e7..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/hna_6_5_34_2_0/bcm56880_a0_hna_6_5_34_2_0_lrd_variant_def.h +++ /dev/null @@ -1,37 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table mapping files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - ******************************************************************************/ - -#ifndef GEN_BCM56880_A0_HNA_6_5_34_2_0_LRD_VARIANT_DEF_H -#define GEN_BCM56880_A0_HNA_6_5_34_2_0_LRD_VARIANT_DEF_H - -#ifndef DOXYGEN_IGNORE_AUTOGEN - -#define BCMLRD_VARIANT_BCM56880_A0_HNA_6_5_34_2_0 BCMLTD_VARIANT_BCM56880_A0_HNA_6_5_34_2_0 -#endif /* DOXYGEN_IGNORE_AUTOGEN */ - -#endif /* GEN_BCM56880_A0_HNA_6_5_34_2_0_LRD_VARIANT_DEF_H */ - diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/nfa_6_5_34_3_0/bcm56880_a0_nfa_6_5_34_3_0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/nfa_6_5_34_3_0/bcm56880_a0_nfa_6_5_34_3_0_lrd_variant_def.h deleted file mode 100644 index c5f5a25fff9..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56880_a0/nfa_6_5_34_3_0/bcm56880_a0_nfa_6_5_34_3_0_lrd_variant_def.h +++ /dev/null @@ -1,37 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table mapping files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - ******************************************************************************/ - -#ifndef GEN_BCM56880_A0_NFA_6_5_34_3_0_LRD_VARIANT_DEF_H -#define GEN_BCM56880_A0_NFA_6_5_34_3_0_LRD_VARIANT_DEF_H - -#ifndef DOXYGEN_IGNORE_AUTOGEN - -#define BCMLRD_VARIANT_BCM56880_A0_NFA_6_5_34_3_0 BCMLTD_VARIANT_BCM56880_A0_NFA_6_5_34_3_0 -#endif /* DOXYGEN_IGNORE_AUTOGEN */ - -#endif /* GEN_BCM56880_A0_NFA_6_5_34_3_0_LRD_VARIANT_DEF_H */ - diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/cna_6_5_34_2_0/bcm56890_a0_cna_6_5_34_2_0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/cna_6_5_34_2_0/bcm56890_a0_cna_6_5_34_2_0_lrd_variant_def.h deleted file mode 100644 index a813957cb67..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/cna_6_5_34_2_0/bcm56890_a0_cna_6_5_34_2_0_lrd_variant_def.h +++ /dev/null @@ -1,37 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table mapping files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - ******************************************************************************/ - -#ifndef GEN_BCM56890_A0_CNA_6_5_34_2_0_LRD_VARIANT_DEF_H -#define GEN_BCM56890_A0_CNA_6_5_34_2_0_LRD_VARIANT_DEF_H - -#ifndef DOXYGEN_IGNORE_AUTOGEN - -#define BCMLRD_VARIANT_BCM56890_A0_CNA_6_5_34_2_0 BCMLTD_VARIANT_BCM56890_A0_CNA_6_5_34_2_0 -#endif /* DOXYGEN_IGNORE_AUTOGEN */ - -#endif /* GEN_BCM56890_A0_CNA_6_5_34_2_0_LRD_VARIANT_DEF_H */ - diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/dna_6_5_34_8_0/bcm56890_a0_dna_6_5_34_8_0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/dna_6_5_34_8_0/bcm56890_a0_dna_6_5_34_8_0_lrd_variant_def.h deleted file mode 100644 index 0e67670f1ca..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm56890_a0/dna_6_5_34_8_0/bcm56890_a0_dna_6_5_34_8_0_lrd_variant_def.h +++ /dev/null @@ -1,37 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table mapping files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - ******************************************************************************/ - -#ifndef GEN_BCM56890_A0_DNA_6_5_34_8_0_LRD_VARIANT_DEF_H -#define GEN_BCM56890_A0_DNA_6_5_34_8_0_LRD_VARIANT_DEF_H - -#ifndef DOXYGEN_IGNORE_AUTOGEN - -#define BCMLRD_VARIANT_BCM56890_A0_DNA_6_5_34_8_0 BCMLTD_VARIANT_BCM56890_A0_DNA_6_5_34_8_0 -#endif /* DOXYGEN_IGNORE_AUTOGEN */ - -#endif /* GEN_BCM56890_A0_DNA_6_5_34_8_0_LRD_VARIANT_DEF_H */ - diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78800_a0/cna_6_5_34_2_0/bcm78800_a0_cna_6_5_34_2_0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78800_a0/cna_6_5_34_2_0/bcm78800_a0_cna_6_5_34_2_0_lrd_variant_def.h deleted file mode 100644 index 97edec8f9b6..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78800_a0/cna_6_5_34_2_0/bcm78800_a0_cna_6_5_34_2_0_lrd_variant_def.h +++ /dev/null @@ -1,37 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table mapping files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - ******************************************************************************/ - -#ifndef GEN_BCM78800_A0_CNA_6_5_34_2_0_LRD_VARIANT_DEF_H -#define GEN_BCM78800_A0_CNA_6_5_34_2_0_LRD_VARIANT_DEF_H - -#ifndef DOXYGEN_IGNORE_AUTOGEN - -#define BCMLRD_VARIANT_BCM78800_A0_CNA_6_5_34_2_0 BCMLTD_VARIANT_BCM78800_A0_CNA_6_5_34_2_0 -#endif /* DOXYGEN_IGNORE_AUTOGEN */ - -#endif /* GEN_BCM78800_A0_CNA_6_5_34_2_0_LRD_VARIANT_DEF_H */ - diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78910_a0/bcm78910_a0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78910_a0/bcm78910_a0_lrd_variant_def.h deleted file mode 100644 index 6d9eced9736..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78910_a0/bcm78910_a0_lrd_variant_def.h +++ /dev/null @@ -1,37 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table mapping files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - ******************************************************************************/ - -#ifndef GEN_BCM78910_A0_LRD_VARIANT_DEF_H -#define GEN_BCM78910_A0_LRD_VARIANT_DEF_H - -#ifndef DOXYGEN_IGNORE_AUTOGEN - -#define BCMLRD_VARIANT_BCM78910_A0_BASE BCMLTD_VARIANT_BCM78910_A0_BASE -#endif /* DOXYGEN_IGNORE_AUTOGEN */ - -#endif /* GEN_BCM78910_A0_LRD_VARIANT_DEF_H */ - diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78914_b0/bcm78914_b0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78914_b0/bcm78914_b0_lrd_variant_def.h deleted file mode 100644 index 4ed3febb9e0..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78914_b0/bcm78914_b0_lrd_variant_def.h +++ /dev/null @@ -1,37 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table mapping files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - ******************************************************************************/ - -#ifndef GEN_BCM78914_B0_LRD_VARIANT_DEF_H -#define GEN_BCM78914_B0_LRD_VARIANT_DEF_H - -#ifndef DOXYGEN_IGNORE_AUTOGEN - -#define BCMLRD_VARIANT_BCM78914_B0_BASE BCMLTD_VARIANT_BCM78914_B0_BASE -#endif /* DOXYGEN_IGNORE_AUTOGEN */ - -#endif /* GEN_BCM78914_B0_LRD_VARIANT_DEF_H */ - diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78914_b1/bcm78914_b1_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78914_b1/bcm78914_b1_lrd_variant_def.h deleted file mode 100644 index f07b4a00e1b..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78914_b1/bcm78914_b1_lrd_variant_def.h +++ /dev/null @@ -1,37 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table mapping files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - ******************************************************************************/ - -#ifndef GEN_BCM78914_B1_LRD_VARIANT_DEF_H -#define GEN_BCM78914_B1_LRD_VARIANT_DEF_H - -#ifndef DOXYGEN_IGNORE_AUTOGEN - -#define BCMLRD_VARIANT_BCM78914_B1_BASE BCMLTD_VARIANT_BCM78914_B1_BASE -#endif /* DOXYGEN_IGNORE_AUTOGEN */ - -#endif /* GEN_BCM78914_B1_LRD_VARIANT_DEF_H */ - diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78920_a0/bcm78920_a0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78920_a0/bcm78920_a0_lrd_variant_def.h deleted file mode 100644 index 120e7587a37..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78920_a0/bcm78920_a0_lrd_variant_def.h +++ /dev/null @@ -1,37 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table mapping files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - ******************************************************************************/ - -#ifndef GEN_BCM78920_A0_LRD_VARIANT_DEF_H -#define GEN_BCM78920_A0_LRD_VARIANT_DEF_H - -#ifndef DOXYGEN_IGNORE_AUTOGEN - -#define BCMLRD_VARIANT_BCM78920_A0_BASE BCMLTD_VARIANT_BCM78920_A0_BASE -#endif /* DOXYGEN_IGNORE_AUTOGEN */ - -#endif /* GEN_BCM78920_A0_LRD_VARIANT_DEF_H */ - diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78920_a0/vna_4_6_1_0/bcm78920_a0_vna_4_6_1_0_lrd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78920_a0/vna_4_6_1_0/bcm78920_a0_vna_4_6_1_0_lrd_variant_def.h deleted file mode 100644 index 29aa440c256..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmlrd/include/bcmlrd/defs/generated/bcm78920_a0/vna_4_6_1_0/bcm78920_a0_vna_4_6_1_0_lrd_variant_def.h +++ /dev/null @@ -1,37 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table mapping files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - ******************************************************************************/ - -#ifndef GEN_BCM78920_A0_VNA_4_6_1_0_LRD_VARIANT_DEF_H -#define GEN_BCM78920_A0_VNA_4_6_1_0_LRD_VARIANT_DEF_H - -#ifndef DOXYGEN_IGNORE_AUTOGEN - -#define BCMLRD_VARIANT_BCM78920_A0_VNA_4_6_1_0 BCMLTD_VARIANT_BCM78920_A0_VNA_4_6_1_0 -#endif /* DOXYGEN_IGNORE_AUTOGEN */ - -#endif /* GEN_BCM78920_A0_VNA_4_6_1_0_LRD_VARIANT_DEF_H */ - diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/bcmltd_variant_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/bcmltd_variant_defs.h deleted file mode 100644 index 3286d6f7d46..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/bcmltd_variant_defs.h +++ /dev/null @@ -1,29 +0,0 @@ -/*! \file bcmltd_variant_defs.h - * - * \brief BCMLTD variant definitions - * - */ -/* - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - */ - -#ifndef BCMLTD_VARIANT_DEFS_H -#define BCMLTD_VARIANT_DEFS_H -#ifndef DOXYGEN_IGNORE_AUTOGEN -#include -#endif /* DOXYGEN_IGNORE_AUTOGEN */ -#endif /* BCMLTD_VARIANT_DEFS_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_config_variant_internal.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_config_variant_internal.h deleted file mode 100644 index c1f68da18a6..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_config_variant_internal.h +++ /dev/null @@ -1,65 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table definition files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - ******************************************************************************/ -#ifndef GEN_BCMLTD_CONFIG_VARIANT_INTERNAL_H -#define GEN_BCMLTD_CONFIG_VARIANT_INTERNAL_H -#ifndef DOXYGEN_IGNORE_AUTOGEN -/*+replace reverse */ -#include "../../conf/generated/bcm78920_a0/vna_4_6_1_0/bcm78920_a0_vna_4_6_1_0_ltd_config_variant.h" -#include "../../conf/generated/bcm78920_a0/bcm78920_a0_ltd_config_variant.h" -#include "../../conf/generated/bcm78914_b1/bcm78914_b1_ltd_config_variant.h" -#include "../../conf/generated/bcm78914_b0/bcm78914_b0_ltd_config_variant.h" -#include "../../conf/generated/bcm78910_a0/bcm78910_a0_ltd_config_variant.h" -#include "../../conf/generated/bcm78907_a0/bcm78907_a0_ltd_config_variant.h" -#include "../../conf/generated/bcm78905_a0/bcm78905_a0_ltd_config_variant.h" -#include "../../conf/generated/bcm78900_b0/bcm78900_b0_ltd_config_variant.h" -#include "../../conf/generated/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_ltd_config_variant.h" -#include "../../conf/generated/bcm78800_a0/cna_6_5_34_2_0/bcm78800_a0_cna_6_5_34_2_0_ltd_config_variant.h" -#include "../../conf/generated/bcm78800_a0/bcm78800_a0_ltd_config_variant.h" -#include "../../conf/generated/bcm56999_a0/bcm56999_a0_ltd_config_variant.h" -#include "../../conf/generated/bcm56998_a0/bcm56998_a0_ltd_config_variant.h" -#include "../../conf/generated/bcm56996_b0/bcm56996_b0_ltd_config_variant.h" -#include "../../conf/generated/bcm56996_a0/bcm56996_a0_ltd_config_variant.h" -#include "../../conf/generated/bcm56990_b0/bcm56990_b0_ltd_config_variant.h" -#include "../../conf/generated/bcm56990_a0/bcm56990_a0_ltd_config_variant.h" -#include "../../conf/generated/bcm56890_a0/dna_6_5_34_8_0/bcm56890_a0_dna_6_5_34_8_0_ltd_config_variant.h" -#include "../../conf/generated/bcm56890_a0/cna_6_5_34_2_0/bcm56890_a0_cna_6_5_34_2_0_ltd_config_variant.h" -#include "../../conf/generated/bcm56890_a0/bcm56890_a0_ltd_config_variant.h" -#include "../../conf/generated/bcm56880_a0/nfa_6_5_34_3_0/bcm56880_a0_nfa_6_5_34_3_0_ltd_config_variant.h" -#include "../../conf/generated/bcm56880_a0/hna_6_5_34_2_0/bcm56880_a0_hna_6_5_34_2_0_ltd_config_variant.h" -#include "../../conf/generated/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_ltd_config_variant.h" -#include "../../conf/generated/bcm56880_a0/bcm56880_a0_ltd_config_variant.h" -#include "../../conf/generated/bcm56780_a0/hna_6_5_34_2_0/bcm56780_a0_hna_6_5_34_2_0_ltd_config_variant.h" -#include "../../conf/generated/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_ltd_config_variant.h" -#include "../../conf/generated/bcm56780_a0/cna_6_5_34_2_0/bcm56780_a0_cna_6_5_34_2_0_ltd_config_variant.h" -#include "../../conf/generated/bcm56780_a0/bcm56780_a0_ltd_config_variant.h" -#include "../../conf/generated/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_ltd_config_variant.h" -#include "../../conf/generated/bcm56690_a0/cna_6_5_34_2_0/bcm56690_a0_cna_6_5_34_2_0_ltd_config_variant.h" -#include "../../conf/generated/bcm56690_a0/bcm56690_a0_ltd_config_variant.h" -#include "../../conf/generated/bcm56080_a0/bcm56080_a0_ltd_config_variant.h" -/*-replace*/ -#endif /* DOXYGEN_IGNORE_AUTOGEN */ -#endif /* GEN_BCMLTD_CONFIG_VARIANT_INTERNAL_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_defs.h deleted file mode 100644 index 93d5339df2d..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_defs.h +++ /dev/null @@ -1,39 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table mapping files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - ******************************************************************************/ - -#ifndef GEN_BCMLTD_VARIANT_DEFS_H -#define GEN_BCMLTD_VARIANT_DEFS_H - -#ifndef DOXYGEN_IGNORE_AUTOGEN - -#include -#include - -#endif /* DOXYGEN_IGNORE_AUTOGEN */ - -#endif /* GEN_BCMLTD_VARIANT_DEFS_H */ - diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_defs_internal.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_defs_internal.h deleted file mode 100644 index 154fef11a5b..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_defs_internal.h +++ /dev/null @@ -1,65 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table definition files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - ******************************************************************************/ -#ifndef GEN_BCMLTD_VARIANT_DEFS_INTERNAL_H -#define GEN_BCMLTD_VARIANT_DEFS_INTERNAL_H -#ifndef DOXYGEN_IGNORE_AUTOGEN -/*+replace reverse */ -#include "../../defs/generated/bcm78920_a0/vna_4_6_1_0/bcm78920_a0_vna_4_6_1_0_ltd_variant_def.h" -#include "../../defs/generated/bcm78920_a0/bcm78920_a0_ltd_variant_def.h" -#include "../../defs/generated/bcm78914_b1/bcm78914_b1_ltd_variant_def.h" -#include "../../defs/generated/bcm78914_b0/bcm78914_b0_ltd_variant_def.h" -#include "../../defs/generated/bcm78910_a0/bcm78910_a0_ltd_variant_def.h" -#include "../../defs/generated/bcm78907_a0/bcm78907_a0_ltd_variant_def.h" -#include "../../defs/generated/bcm78905_a0/bcm78905_a0_ltd_variant_def.h" -#include "../../defs/generated/bcm78900_b0/bcm78900_b0_ltd_variant_def.h" -#include "../../defs/generated/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_ltd_variant_def.h" -#include "../../defs/generated/bcm78800_a0/cna_6_5_34_2_0/bcm78800_a0_cna_6_5_34_2_0_ltd_variant_def.h" -#include "../../defs/generated/bcm78800_a0/bcm78800_a0_ltd_variant_def.h" -#include "../../defs/generated/bcm56999_a0/bcm56999_a0_ltd_variant_def.h" -#include "../../defs/generated/bcm56998_a0/bcm56998_a0_ltd_variant_def.h" -#include "../../defs/generated/bcm56996_b0/bcm56996_b0_ltd_variant_def.h" -#include "../../defs/generated/bcm56996_a0/bcm56996_a0_ltd_variant_def.h" -#include "../../defs/generated/bcm56990_b0/bcm56990_b0_ltd_variant_def.h" -#include "../../defs/generated/bcm56990_a0/bcm56990_a0_ltd_variant_def.h" -#include "../../defs/generated/bcm56890_a0/dna_6_5_34_8_0/bcm56890_a0_dna_6_5_34_8_0_ltd_variant_def.h" -#include "../../defs/generated/bcm56890_a0/cna_6_5_34_2_0/bcm56890_a0_cna_6_5_34_2_0_ltd_variant_def.h" -#include "../../defs/generated/bcm56890_a0/bcm56890_a0_ltd_variant_def.h" -#include "../../defs/generated/bcm56880_a0/nfa_6_5_34_3_0/bcm56880_a0_nfa_6_5_34_3_0_ltd_variant_def.h" -#include "../../defs/generated/bcm56880_a0/hna_6_5_34_2_0/bcm56880_a0_hna_6_5_34_2_0_ltd_variant_def.h" -#include "../../defs/generated/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_ltd_variant_def.h" -#include "../../defs/generated/bcm56880_a0/bcm56880_a0_ltd_variant_def.h" -#include "../../defs/generated/bcm56780_a0/hna_6_5_34_2_0/bcm56780_a0_hna_6_5_34_2_0_ltd_variant_def.h" -#include "../../defs/generated/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_ltd_variant_def.h" -#include "../../defs/generated/bcm56780_a0/cna_6_5_34_2_0/bcm56780_a0_cna_6_5_34_2_0_ltd_variant_def.h" -#include "../../defs/generated/bcm56780_a0/bcm56780_a0_ltd_variant_def.h" -#include "../../defs/generated/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_ltd_variant_def.h" -#include "../../defs/generated/bcm56690_a0/cna_6_5_34_2_0/bcm56690_a0_cna_6_5_34_2_0_ltd_variant_def.h" -#include "../../defs/generated/bcm56690_a0/bcm56690_a0_ltd_variant_def.h" -#include "../../defs/generated/bcm56080_a0/bcm56080_a0_ltd_variant_def.h" -/*-replace*/ -#endif /* DOXYGEN_IGNORE_AUTOGEN */ -#endif /* GEN_BCMLTD_VARIANT_DEFS_INTERNAL_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_entry.h deleted file mode 100644 index 1cbd3ed554b..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/chip/generated/bcmltd_variant_entry.h +++ /dev/null @@ -1,66 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table definition files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - ******************************************************************************/ -#ifndef GEN_BCMLTD_VARIANT_ENTRY_H -#define GEN_BCMLTD_VARIANT_ENTRY_H -/* guard deliberately empty */ -#endif /* GEN_BCMLTD_VARIANT_ENTRY_H */ -#ifndef DOXYGEN_IGNORE_AUTOGEN -/*+replace variant */ -#include "../../entry/generated/bcm56080_a0/bcm56080_a0_ltd_variant_entry.h" -#include "../../entry/generated/bcm56690_a0/bcm56690_a0_ltd_variant_entry.h" -#include "../../entry/generated/bcm56780_a0/bcm56780_a0_ltd_variant_entry.h" -#include "../../entry/generated/bcm56880_a0/bcm56880_a0_ltd_variant_entry.h" -#include "../../entry/generated/bcm56890_a0/bcm56890_a0_ltd_variant_entry.h" -#include "../../entry/generated/bcm56990_a0/bcm56990_a0_ltd_variant_entry.h" -#include "../../entry/generated/bcm56990_b0/bcm56990_b0_ltd_variant_entry.h" -#include "../../entry/generated/bcm56996_a0/bcm56996_a0_ltd_variant_entry.h" -#include "../../entry/generated/bcm56996_b0/bcm56996_b0_ltd_variant_entry.h" -#include "../../entry/generated/bcm56998_a0/bcm56998_a0_ltd_variant_entry.h" -#include "../../entry/generated/bcm56999_a0/bcm56999_a0_ltd_variant_entry.h" -#include "../../entry/generated/bcm78800_a0/bcm78800_a0_ltd_variant_entry.h" -#include "../../entry/generated/bcm78900_b0/bcm78900_b0_ltd_variant_entry.h" -#include "../../entry/generated/bcm78905_a0/bcm78905_a0_ltd_variant_entry.h" -#include "../../entry/generated/bcm78907_a0/bcm78907_a0_ltd_variant_entry.h" -#include "../../entry/generated/bcm78910_a0/bcm78910_a0_ltd_variant_entry.h" -#include "../../entry/generated/bcm78914_b0/bcm78914_b0_ltd_variant_entry.h" -#include "../../entry/generated/bcm78914_b1/bcm78914_b1_ltd_variant_entry.h" -#include "../../entry/generated/bcm78920_a0/bcm78920_a0_ltd_variant_entry.h" -#include "../../entry/generated/bcm56690_a0/cna_6_5_34_2_0/bcm56690_a0_cna_6_5_34_2_0_ltd_variant_entry.h" -#include "../../entry/generated/bcm56690_a0/dna_6_5_32_5_0/bcm56690_a0_dna_6_5_32_5_0_ltd_variant_entry.h" -#include "../../entry/generated/bcm56780_a0/cna_6_5_34_2_0/bcm56780_a0_cna_6_5_34_2_0_ltd_variant_entry.h" -#include "../../entry/generated/bcm56780_a0/dna_6_5_31_7_0/bcm56780_a0_dna_6_5_31_7_0_ltd_variant_entry.h" -#include "../../entry/generated/bcm56780_a0/hna_6_5_34_2_0/bcm56780_a0_hna_6_5_34_2_0_ltd_variant_entry.h" -#include "../../entry/generated/bcm56880_a0/dna_6_5_31_6_0/bcm56880_a0_dna_6_5_31_6_0_ltd_variant_entry.h" -#include "../../entry/generated/bcm56880_a0/hna_6_5_34_2_0/bcm56880_a0_hna_6_5_34_2_0_ltd_variant_entry.h" -#include "../../entry/generated/bcm56880_a0/nfa_6_5_34_3_0/bcm56880_a0_nfa_6_5_34_3_0_ltd_variant_entry.h" -#include "../../entry/generated/bcm56890_a0/cna_6_5_34_2_0/bcm56890_a0_cna_6_5_34_2_0_ltd_variant_entry.h" -#include "../../entry/generated/bcm56890_a0/dna_6_5_34_8_0/bcm56890_a0_dna_6_5_34_8_0_ltd_variant_entry.h" -#include "../../entry/generated/bcm78800_a0/cna_6_5_34_2_0/bcm78800_a0_cna_6_5_34_2_0_ltd_variant_entry.h" -#include "../../entry/generated/bcm78800_a0/dna_6_5_32_3_0/bcm78800_a0_dna_6_5_32_3_0_ltd_variant_entry.h" -#include "../../entry/generated/bcm78920_a0/vna_4_6_1_0/bcm78920_a0_vna_4_6_1_0_ltd_variant_entry.h" -/*-replace*/ -#endif /* DOXYGEN_IGNORE_AUTOGEN */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56690_a0/cna_6_5_34_2_0/bcm56690_a0_cna_6_5_34_2_0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56690_a0/cna_6_5_34_2_0/bcm56690_a0_cna_6_5_34_2_0_ltd_config_variant.h deleted file mode 100644 index e0956042344..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56690_a0/cna_6_5_34_2_0/bcm56690_a0_cna_6_5_34_2_0_ltd_config_variant.h +++ /dev/null @@ -1,50 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table mapping files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - ******************************************************************************/ - -#ifndef GEN_BCM56690_A0_CNA_6_5_34_2_0_LTD_CONFIG_VARIANT_H -#define GEN_BCM56690_A0_CNA_6_5_34_2_0_LTD_CONFIG_VARIANT_H - -#ifndef DOXYGEN_IGNORE_AUTOGEN - -#if BCMDRD_CONFIG_INCLUDE_BCM56690_A0 -#ifndef BCMLTD_CONFIG_INCLUDE_BCM56690_A0_CNA_6_5_34_2_0 -#define BCMLTD_CONFIG_INCLUDE_BCM56690_A0_CNA_6_5_34_2_0 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT -#endif -#if BCMLTD_CONFIG_INCLUDE_BCM56690_A0_CNA_6_5_34_2_0 == 1 -#ifndef BCMLTD_CONFIG_INCLUDE_BCM56690_A0_BASE -#define BCMLTD_CONFIG_INCLUDE_BCM56690_A0_BASE 1 -#endif -#if BCMLTD_CONFIG_INCLUDE_BCM56690_A0_BASE == 0 -#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56690_A0_CNA_6_5_34_2_0=1, BCMLTD_CONFIG_INCLUDE_BCM56690_A0_BASE=0. -#endif -#endif -#else -#define BCMLTD_CONFIG_INCLUDE_BCM56690_A0_CNA_6_5_34_2_0 0 -#endif -#endif /* DOXYGEN_IGNORE_AUTOGEN */ - -#endif /* GEN_BCM56690_A0_CNA_6_5_34_2_0_LTD_CONFIG_VARIANT_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/cna_6_5_34_2_0/bcm56780_a0_cna_6_5_34_2_0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/cna_6_5_34_2_0/bcm56780_a0_cna_6_5_34_2_0_ltd_config_variant.h deleted file mode 100644 index 4b43e1d0b61..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/cna_6_5_34_2_0/bcm56780_a0_cna_6_5_34_2_0_ltd_config_variant.h +++ /dev/null @@ -1,50 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table mapping files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - ******************************************************************************/ - -#ifndef GEN_BCM56780_A0_CNA_6_5_34_2_0_LTD_CONFIG_VARIANT_H -#define GEN_BCM56780_A0_CNA_6_5_34_2_0_LTD_CONFIG_VARIANT_H - -#ifndef DOXYGEN_IGNORE_AUTOGEN - -#if BCMDRD_CONFIG_INCLUDE_BCM56780_A0 -#ifndef BCMLTD_CONFIG_INCLUDE_BCM56780_A0_CNA_6_5_34_2_0 -#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_CNA_6_5_34_2_0 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT -#endif -#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_CNA_6_5_34_2_0 == 1 -#ifndef BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE -#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE 1 -#endif -#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE == 0 -#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56780_A0_CNA_6_5_34_2_0=1, BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE=0. -#endif -#endif -#else -#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_CNA_6_5_34_2_0 0 -#endif -#endif /* DOXYGEN_IGNORE_AUTOGEN */ - -#endif /* GEN_BCM56780_A0_CNA_6_5_34_2_0_LTD_CONFIG_VARIANT_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/hna_6_5_34_2_0/bcm56780_a0_hna_6_5_34_2_0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/hna_6_5_34_2_0/bcm56780_a0_hna_6_5_34_2_0_ltd_config_variant.h deleted file mode 100644 index 2c05ce59ed8..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56780_a0/hna_6_5_34_2_0/bcm56780_a0_hna_6_5_34_2_0_ltd_config_variant.h +++ /dev/null @@ -1,50 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table mapping files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - ******************************************************************************/ - -#ifndef GEN_BCM56780_A0_HNA_6_5_34_2_0_LTD_CONFIG_VARIANT_H -#define GEN_BCM56780_A0_HNA_6_5_34_2_0_LTD_CONFIG_VARIANT_H - -#ifndef DOXYGEN_IGNORE_AUTOGEN - -#if BCMDRD_CONFIG_INCLUDE_BCM56780_A0 -#ifndef BCMLTD_CONFIG_INCLUDE_BCM56780_A0_HNA_6_5_34_2_0 -#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_HNA_6_5_34_2_0 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT -#endif -#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_HNA_6_5_34_2_0 == 1 -#ifndef BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE -#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE 1 -#endif -#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE == 0 -#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56780_A0_HNA_6_5_34_2_0=1, BCMLTD_CONFIG_INCLUDE_BCM56780_A0_BASE=0. -#endif -#endif -#else -#define BCMLTD_CONFIG_INCLUDE_BCM56780_A0_HNA_6_5_34_2_0 0 -#endif -#endif /* DOXYGEN_IGNORE_AUTOGEN */ - -#endif /* GEN_BCM56780_A0_HNA_6_5_34_2_0_LTD_CONFIG_VARIANT_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/hna_6_5_34_2_0/bcm56880_a0_hna_6_5_34_2_0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/hna_6_5_34_2_0/bcm56880_a0_hna_6_5_34_2_0_ltd_config_variant.h deleted file mode 100644 index 7e9fab44744..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/hna_6_5_34_2_0/bcm56880_a0_hna_6_5_34_2_0_ltd_config_variant.h +++ /dev/null @@ -1,50 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table mapping files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - ******************************************************************************/ - -#ifndef GEN_BCM56880_A0_HNA_6_5_34_2_0_LTD_CONFIG_VARIANT_H -#define GEN_BCM56880_A0_HNA_6_5_34_2_0_LTD_CONFIG_VARIANT_H - -#ifndef DOXYGEN_IGNORE_AUTOGEN - -#if BCMDRD_CONFIG_INCLUDE_BCM56880_A0 -#ifndef BCMLTD_CONFIG_INCLUDE_BCM56880_A0_HNA_6_5_34_2_0 -#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_HNA_6_5_34_2_0 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT -#endif -#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_HNA_6_5_34_2_0 == 1 -#ifndef BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE -#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE 1 -#endif -#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE == 0 -#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56880_A0_HNA_6_5_34_2_0=1, BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE=0. -#endif -#endif -#else -#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_HNA_6_5_34_2_0 0 -#endif -#endif /* DOXYGEN_IGNORE_AUTOGEN */ - -#endif /* GEN_BCM56880_A0_HNA_6_5_34_2_0_LTD_CONFIG_VARIANT_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/nfa_6_5_34_3_0/bcm56880_a0_nfa_6_5_34_3_0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/nfa_6_5_34_3_0/bcm56880_a0_nfa_6_5_34_3_0_ltd_config_variant.h deleted file mode 100644 index f6c5f0268e0..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56880_a0/nfa_6_5_34_3_0/bcm56880_a0_nfa_6_5_34_3_0_ltd_config_variant.h +++ /dev/null @@ -1,50 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table mapping files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - ******************************************************************************/ - -#ifndef GEN_BCM56880_A0_NFA_6_5_34_3_0_LTD_CONFIG_VARIANT_H -#define GEN_BCM56880_A0_NFA_6_5_34_3_0_LTD_CONFIG_VARIANT_H - -#ifndef DOXYGEN_IGNORE_AUTOGEN - -#if BCMDRD_CONFIG_INCLUDE_BCM56880_A0 -#ifndef BCMLTD_CONFIG_INCLUDE_BCM56880_A0_NFA_6_5_34_3_0 -#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_NFA_6_5_34_3_0 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT -#endif -#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_NFA_6_5_34_3_0 == 1 -#ifndef BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE -#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE 1 -#endif -#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE == 0 -#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56880_A0_NFA_6_5_34_3_0=1, BCMLTD_CONFIG_INCLUDE_BCM56880_A0_BASE=0. -#endif -#endif -#else -#define BCMLTD_CONFIG_INCLUDE_BCM56880_A0_NFA_6_5_34_3_0 0 -#endif -#endif /* DOXYGEN_IGNORE_AUTOGEN */ - -#endif /* GEN_BCM56880_A0_NFA_6_5_34_3_0_LTD_CONFIG_VARIANT_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/cna_6_5_34_2_0/bcm56890_a0_cna_6_5_34_2_0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/cna_6_5_34_2_0/bcm56890_a0_cna_6_5_34_2_0_ltd_config_variant.h deleted file mode 100644 index 3d8b9484359..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/cna_6_5_34_2_0/bcm56890_a0_cna_6_5_34_2_0_ltd_config_variant.h +++ /dev/null @@ -1,50 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table mapping files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - ******************************************************************************/ - -#ifndef GEN_BCM56890_A0_CNA_6_5_34_2_0_LTD_CONFIG_VARIANT_H -#define GEN_BCM56890_A0_CNA_6_5_34_2_0_LTD_CONFIG_VARIANT_H - -#ifndef DOXYGEN_IGNORE_AUTOGEN - -#if BCMDRD_CONFIG_INCLUDE_BCM56890_A0 -#ifndef BCMLTD_CONFIG_INCLUDE_BCM56890_A0_CNA_6_5_34_2_0 -#define BCMLTD_CONFIG_INCLUDE_BCM56890_A0_CNA_6_5_34_2_0 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT -#endif -#if BCMLTD_CONFIG_INCLUDE_BCM56890_A0_CNA_6_5_34_2_0 == 1 -#ifndef BCMLTD_CONFIG_INCLUDE_BCM56890_A0_BASE -#define BCMLTD_CONFIG_INCLUDE_BCM56890_A0_BASE 1 -#endif -#if BCMLTD_CONFIG_INCLUDE_BCM56890_A0_BASE == 0 -#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56890_A0_CNA_6_5_34_2_0=1, BCMLTD_CONFIG_INCLUDE_BCM56890_A0_BASE=0. -#endif -#endif -#else -#define BCMLTD_CONFIG_INCLUDE_BCM56890_A0_CNA_6_5_34_2_0 0 -#endif -#endif /* DOXYGEN_IGNORE_AUTOGEN */ - -#endif /* GEN_BCM56890_A0_CNA_6_5_34_2_0_LTD_CONFIG_VARIANT_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/dna_6_5_34_8_0/bcm56890_a0_dna_6_5_34_8_0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/dna_6_5_34_8_0/bcm56890_a0_dna_6_5_34_8_0_ltd_config_variant.h deleted file mode 100644 index 9eb5f39ca0d..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm56890_a0/dna_6_5_34_8_0/bcm56890_a0_dna_6_5_34_8_0_ltd_config_variant.h +++ /dev/null @@ -1,50 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table mapping files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - ******************************************************************************/ - -#ifndef GEN_BCM56890_A0_DNA_6_5_34_8_0_LTD_CONFIG_VARIANT_H -#define GEN_BCM56890_A0_DNA_6_5_34_8_0_LTD_CONFIG_VARIANT_H - -#ifndef DOXYGEN_IGNORE_AUTOGEN - -#if BCMDRD_CONFIG_INCLUDE_BCM56890_A0 -#ifndef BCMLTD_CONFIG_INCLUDE_BCM56890_A0_DNA_6_5_34_8_0 -#define BCMLTD_CONFIG_INCLUDE_BCM56890_A0_DNA_6_5_34_8_0 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT -#endif -#if BCMLTD_CONFIG_INCLUDE_BCM56890_A0_DNA_6_5_34_8_0 == 1 -#ifndef BCMLTD_CONFIG_INCLUDE_BCM56890_A0_BASE -#define BCMLTD_CONFIG_INCLUDE_BCM56890_A0_BASE 1 -#endif -#if BCMLTD_CONFIG_INCLUDE_BCM56890_A0_BASE == 0 -#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM56890_A0_DNA_6_5_34_8_0=1, BCMLTD_CONFIG_INCLUDE_BCM56890_A0_BASE=0. -#endif -#endif -#else -#define BCMLTD_CONFIG_INCLUDE_BCM56890_A0_DNA_6_5_34_8_0 0 -#endif -#endif /* DOXYGEN_IGNORE_AUTOGEN */ - -#endif /* GEN_BCM56890_A0_DNA_6_5_34_8_0_LTD_CONFIG_VARIANT_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78800_a0/cna_6_5_34_2_0/bcm78800_a0_cna_6_5_34_2_0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78800_a0/cna_6_5_34_2_0/bcm78800_a0_cna_6_5_34_2_0_ltd_config_variant.h deleted file mode 100644 index 40ae28ce532..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78800_a0/cna_6_5_34_2_0/bcm78800_a0_cna_6_5_34_2_0_ltd_config_variant.h +++ /dev/null @@ -1,50 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table mapping files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - ******************************************************************************/ - -#ifndef GEN_BCM78800_A0_CNA_6_5_34_2_0_LTD_CONFIG_VARIANT_H -#define GEN_BCM78800_A0_CNA_6_5_34_2_0_LTD_CONFIG_VARIANT_H - -#ifndef DOXYGEN_IGNORE_AUTOGEN - -#if BCMDRD_CONFIG_INCLUDE_BCM78800_A0 -#ifndef BCMLTD_CONFIG_INCLUDE_BCM78800_A0_CNA_6_5_34_2_0 -#define BCMLTD_CONFIG_INCLUDE_BCM78800_A0_CNA_6_5_34_2_0 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT -#endif -#if BCMLTD_CONFIG_INCLUDE_BCM78800_A0_CNA_6_5_34_2_0 == 1 -#ifndef BCMLTD_CONFIG_INCLUDE_BCM78800_A0_BASE -#define BCMLTD_CONFIG_INCLUDE_BCM78800_A0_BASE 1 -#endif -#if BCMLTD_CONFIG_INCLUDE_BCM78800_A0_BASE == 0 -#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM78800_A0_CNA_6_5_34_2_0=1, BCMLTD_CONFIG_INCLUDE_BCM78800_A0_BASE=0. -#endif -#endif -#else -#define BCMLTD_CONFIG_INCLUDE_BCM78800_A0_CNA_6_5_34_2_0 0 -#endif -#endif /* DOXYGEN_IGNORE_AUTOGEN */ - -#endif /* GEN_BCM78800_A0_CNA_6_5_34_2_0_LTD_CONFIG_VARIANT_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78910_a0/bcm78910_a0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78910_a0/bcm78910_a0_ltd_config_variant.h deleted file mode 100644 index 17494807248..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78910_a0/bcm78910_a0_ltd_config_variant.h +++ /dev/null @@ -1,46 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table mapping files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - ******************************************************************************/ - -#ifndef GEN_BCM78910_A0_LTD_CONFIG_VARIANT_H -#define GEN_BCM78910_A0_LTD_CONFIG_VARIANT_H - -#ifndef DOXYGEN_IGNORE_AUTOGEN - -#if BCMDRD_CONFIG_INCLUDE_BCM78910_A0 -#ifndef BCMLTD_CONFIG_INCLUDE_BCM78910_A0_BASE -#define BCMLTD_CONFIG_INCLUDE_BCM78910_A0_BASE BCMLTD_CONFIG_INCLUDE_BASE_DEFAULT -#endif -#else -#define BCMLTD_CONFIG_INCLUDE_BCM78910_A0_BASE 0 -#endif - -#define BCMLTD_VARIANT_BCM78910_A0_BASE 16 -#define BCMLTD_VARIANT_LOCAL_BCM78910_A0_BASE 0 - -#endif /* DOXYGEN_IGNORE_AUTOGEN */ - -#endif /* GEN_BCM78910_A0_LTD_CONFIG_VARIANT_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78914_b0/bcm78914_b0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78914_b0/bcm78914_b0_ltd_config_variant.h deleted file mode 100644 index 93a66db0de7..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78914_b0/bcm78914_b0_ltd_config_variant.h +++ /dev/null @@ -1,46 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table mapping files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - ******************************************************************************/ - -#ifndef GEN_BCM78914_B0_LTD_CONFIG_VARIANT_H -#define GEN_BCM78914_B0_LTD_CONFIG_VARIANT_H - -#ifndef DOXYGEN_IGNORE_AUTOGEN - -#if BCMDRD_CONFIG_INCLUDE_BCM78914_B0 -#ifndef BCMLTD_CONFIG_INCLUDE_BCM78914_B0_BASE -#define BCMLTD_CONFIG_INCLUDE_BCM78914_B0_BASE BCMLTD_CONFIG_INCLUDE_BASE_DEFAULT -#endif -#else -#define BCMLTD_CONFIG_INCLUDE_BCM78914_B0_BASE 0 -#endif - -#define BCMLTD_VARIANT_BCM78914_B0_BASE 17 -#define BCMLTD_VARIANT_LOCAL_BCM78914_B0_BASE 0 - -#endif /* DOXYGEN_IGNORE_AUTOGEN */ - -#endif /* GEN_BCM78914_B0_LTD_CONFIG_VARIANT_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78914_b1/bcm78914_b1_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78914_b1/bcm78914_b1_ltd_config_variant.h deleted file mode 100644 index d05416b5c5b..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78914_b1/bcm78914_b1_ltd_config_variant.h +++ /dev/null @@ -1,46 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table mapping files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - ******************************************************************************/ - -#ifndef GEN_BCM78914_B1_LTD_CONFIG_VARIANT_H -#define GEN_BCM78914_B1_LTD_CONFIG_VARIANT_H - -#ifndef DOXYGEN_IGNORE_AUTOGEN - -#if BCMDRD_CONFIG_INCLUDE_BCM78914_B1 -#ifndef BCMLTD_CONFIG_INCLUDE_BCM78914_B1_BASE -#define BCMLTD_CONFIG_INCLUDE_BCM78914_B1_BASE BCMLTD_CONFIG_INCLUDE_BASE_DEFAULT -#endif -#else -#define BCMLTD_CONFIG_INCLUDE_BCM78914_B1_BASE 0 -#endif - -#define BCMLTD_VARIANT_BCM78914_B1_BASE 18 -#define BCMLTD_VARIANT_LOCAL_BCM78914_B1_BASE 0 - -#endif /* DOXYGEN_IGNORE_AUTOGEN */ - -#endif /* GEN_BCM78914_B1_LTD_CONFIG_VARIANT_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78920_a0/bcm78920_a0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78920_a0/bcm78920_a0_ltd_config_variant.h deleted file mode 100644 index d638b08670e..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78920_a0/bcm78920_a0_ltd_config_variant.h +++ /dev/null @@ -1,46 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table mapping files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - ******************************************************************************/ - -#ifndef GEN_BCM78920_A0_LTD_CONFIG_VARIANT_H -#define GEN_BCM78920_A0_LTD_CONFIG_VARIANT_H - -#ifndef DOXYGEN_IGNORE_AUTOGEN - -#if BCMDRD_CONFIG_INCLUDE_BCM78920_A0 -#ifndef BCMLTD_CONFIG_INCLUDE_BCM78920_A0_BASE -#define BCMLTD_CONFIG_INCLUDE_BCM78920_A0_BASE BCMLTD_CONFIG_INCLUDE_BASE_DEFAULT -#endif -#else -#define BCMLTD_CONFIG_INCLUDE_BCM78920_A0_BASE 0 -#endif - -#define BCMLTD_VARIANT_BCM78920_A0_BASE 19 -#define BCMLTD_VARIANT_LOCAL_BCM78920_A0_BASE 0 - -#endif /* DOXYGEN_IGNORE_AUTOGEN */ - -#endif /* GEN_BCM78920_A0_LTD_CONFIG_VARIANT_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78920_a0/vna_4_6_1_0/bcm78920_a0_vna_4_6_1_0_ltd_config_variant.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78920_a0/vna_4_6_1_0/bcm78920_a0_vna_4_6_1_0_ltd_config_variant.h deleted file mode 100644 index a232a98a6da..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/conf/generated/bcm78920_a0/vna_4_6_1_0/bcm78920_a0_vna_4_6_1_0_ltd_config_variant.h +++ /dev/null @@ -1,50 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table mapping files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - ******************************************************************************/ - -#ifndef GEN_BCM78920_A0_VNA_4_6_1_0_LTD_CONFIG_VARIANT_H -#define GEN_BCM78920_A0_VNA_4_6_1_0_LTD_CONFIG_VARIANT_H - -#ifndef DOXYGEN_IGNORE_AUTOGEN - -#if BCMDRD_CONFIG_INCLUDE_BCM78920_A0 -#ifndef BCMLTD_CONFIG_INCLUDE_BCM78920_A0_VNA_4_6_1_0 -#define BCMLTD_CONFIG_INCLUDE_BCM78920_A0_VNA_4_6_1_0 BCMLTD_CONFIG_INCLUDE_VARIANT_DEFAULT -#endif -#if BCMLTD_CONFIG_INCLUDE_BCM78920_A0_VNA_4_6_1_0 == 1 -#ifndef BCMLTD_CONFIG_INCLUDE_BCM78920_A0_BASE -#define BCMLTD_CONFIG_INCLUDE_BCM78920_A0_BASE 1 -#endif -#if BCMLTD_CONFIG_INCLUDE_BCM78920_A0_BASE == 0 -#error Inconsistent variant flags BCMLTD_CONFIG_INCLUDE_BCM78920_A0_VNA_4_6_1_0=1, BCMLTD_CONFIG_INCLUDE_BCM78920_A0_BASE=0. -#endif -#endif -#else -#define BCMLTD_CONFIG_INCLUDE_BCM78920_A0_VNA_4_6_1_0 0 -#endif -#endif /* DOXYGEN_IGNORE_AUTOGEN */ - -#endif /* GEN_BCM78920_A0_VNA_4_6_1_0_LTD_CONFIG_VARIANT_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56690_a0/cna_6_5_34_2_0/bcm56690_a0_cna_6_5_34_2_0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56690_a0/cna_6_5_34_2_0/bcm56690_a0_cna_6_5_34_2_0_ltd_variant_def.h deleted file mode 100644 index 48c2ec0b97d..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56690_a0/cna_6_5_34_2_0/bcm56690_a0_cna_6_5_34_2_0_ltd_variant_def.h +++ /dev/null @@ -1,38 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table mapping files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - ******************************************************************************/ - -#ifndef GEN_BCM56690_A0_CNA_6_5_34_2_0_LTD_VARIANT_DEF_H -#define GEN_BCM56690_A0_CNA_6_5_34_2_0_LTD_VARIANT_DEF_H - -#ifndef DOXYGEN_IGNORE_AUTOGEN - -#define BCMLTD_VARIANT_BCM56690_A0_CNA_6_5_34_2_0 20 -#define BCMLTD_VARIANT_LOCAL_BCM56690_A0_CNA_6_5_34_2_0 1 -#endif /* DOXYGEN_IGNORE_AUTOGEN */ - -#endif /* GEN_BCM56690_A0_CNA_6_5_34_2_0_LTD_VARIANT_DEF_H */ - diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/cna_6_5_34_2_0/bcm56780_a0_cna_6_5_34_2_0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/cna_6_5_34_2_0/bcm56780_a0_cna_6_5_34_2_0_ltd_variant_def.h deleted file mode 100644 index 8a6a5f2190d..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/cna_6_5_34_2_0/bcm56780_a0_cna_6_5_34_2_0_ltd_variant_def.h +++ /dev/null @@ -1,38 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table mapping files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - ******************************************************************************/ - -#ifndef GEN_BCM56780_A0_CNA_6_5_34_2_0_LTD_VARIANT_DEF_H -#define GEN_BCM56780_A0_CNA_6_5_34_2_0_LTD_VARIANT_DEF_H - -#ifndef DOXYGEN_IGNORE_AUTOGEN - -#define BCMLTD_VARIANT_BCM56780_A0_CNA_6_5_34_2_0 22 -#define BCMLTD_VARIANT_LOCAL_BCM56780_A0_CNA_6_5_34_2_0 1 -#endif /* DOXYGEN_IGNORE_AUTOGEN */ - -#endif /* GEN_BCM56780_A0_CNA_6_5_34_2_0_LTD_VARIANT_DEF_H */ - diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/hna_6_5_34_2_0/bcm56780_a0_hna_6_5_34_2_0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/hna_6_5_34_2_0/bcm56780_a0_hna_6_5_34_2_0_ltd_variant_def.h deleted file mode 100644 index 19e0dd3be74..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56780_a0/hna_6_5_34_2_0/bcm56780_a0_hna_6_5_34_2_0_ltd_variant_def.h +++ /dev/null @@ -1,38 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table mapping files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - ******************************************************************************/ - -#ifndef GEN_BCM56780_A0_HNA_6_5_34_2_0_LTD_VARIANT_DEF_H -#define GEN_BCM56780_A0_HNA_6_5_34_2_0_LTD_VARIANT_DEF_H - -#ifndef DOXYGEN_IGNORE_AUTOGEN - -#define BCMLTD_VARIANT_BCM56780_A0_HNA_6_5_34_2_0 24 -#define BCMLTD_VARIANT_LOCAL_BCM56780_A0_HNA_6_5_34_2_0 3 -#endif /* DOXYGEN_IGNORE_AUTOGEN */ - -#endif /* GEN_BCM56780_A0_HNA_6_5_34_2_0_LTD_VARIANT_DEF_H */ - diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/hna_6_5_34_2_0/bcm56880_a0_hna_6_5_34_2_0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/hna_6_5_34_2_0/bcm56880_a0_hna_6_5_34_2_0_ltd_variant_def.h deleted file mode 100644 index 8d32ebcbec1..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/hna_6_5_34_2_0/bcm56880_a0_hna_6_5_34_2_0_ltd_variant_def.h +++ /dev/null @@ -1,38 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table mapping files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - ******************************************************************************/ - -#ifndef GEN_BCM56880_A0_HNA_6_5_34_2_0_LTD_VARIANT_DEF_H -#define GEN_BCM56880_A0_HNA_6_5_34_2_0_LTD_VARIANT_DEF_H - -#ifndef DOXYGEN_IGNORE_AUTOGEN - -#define BCMLTD_VARIANT_BCM56880_A0_HNA_6_5_34_2_0 26 -#define BCMLTD_VARIANT_LOCAL_BCM56880_A0_HNA_6_5_34_2_0 2 -#endif /* DOXYGEN_IGNORE_AUTOGEN */ - -#endif /* GEN_BCM56880_A0_HNA_6_5_34_2_0_LTD_VARIANT_DEF_H */ - diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/nfa_6_5_34_3_0/bcm56880_a0_nfa_6_5_34_3_0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/nfa_6_5_34_3_0/bcm56880_a0_nfa_6_5_34_3_0_ltd_variant_def.h deleted file mode 100644 index 3ae6b61d97a..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56880_a0/nfa_6_5_34_3_0/bcm56880_a0_nfa_6_5_34_3_0_ltd_variant_def.h +++ /dev/null @@ -1,38 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table mapping files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - ******************************************************************************/ - -#ifndef GEN_BCM56880_A0_NFA_6_5_34_3_0_LTD_VARIANT_DEF_H -#define GEN_BCM56880_A0_NFA_6_5_34_3_0_LTD_VARIANT_DEF_H - -#ifndef DOXYGEN_IGNORE_AUTOGEN - -#define BCMLTD_VARIANT_BCM56880_A0_NFA_6_5_34_3_0 27 -#define BCMLTD_VARIANT_LOCAL_BCM56880_A0_NFA_6_5_34_3_0 3 -#endif /* DOXYGEN_IGNORE_AUTOGEN */ - -#endif /* GEN_BCM56880_A0_NFA_6_5_34_3_0_LTD_VARIANT_DEF_H */ - diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/cna_6_5_34_2_0/bcm56890_a0_cna_6_5_34_2_0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/cna_6_5_34_2_0/bcm56890_a0_cna_6_5_34_2_0_ltd_variant_def.h deleted file mode 100644 index 54e04f3c0ff..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/cna_6_5_34_2_0/bcm56890_a0_cna_6_5_34_2_0_ltd_variant_def.h +++ /dev/null @@ -1,38 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table mapping files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - ******************************************************************************/ - -#ifndef GEN_BCM56890_A0_CNA_6_5_34_2_0_LTD_VARIANT_DEF_H -#define GEN_BCM56890_A0_CNA_6_5_34_2_0_LTD_VARIANT_DEF_H - -#ifndef DOXYGEN_IGNORE_AUTOGEN - -#define BCMLTD_VARIANT_BCM56890_A0_CNA_6_5_34_2_0 28 -#define BCMLTD_VARIANT_LOCAL_BCM56890_A0_CNA_6_5_34_2_0 1 -#endif /* DOXYGEN_IGNORE_AUTOGEN */ - -#endif /* GEN_BCM56890_A0_CNA_6_5_34_2_0_LTD_VARIANT_DEF_H */ - diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/dna_6_5_34_8_0/bcm56890_a0_dna_6_5_34_8_0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/dna_6_5_34_8_0/bcm56890_a0_dna_6_5_34_8_0_ltd_variant_def.h deleted file mode 100644 index ce7bc62a50c..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm56890_a0/dna_6_5_34_8_0/bcm56890_a0_dna_6_5_34_8_0_ltd_variant_def.h +++ /dev/null @@ -1,38 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table mapping files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - ******************************************************************************/ - -#ifndef GEN_BCM56890_A0_DNA_6_5_34_8_0_LTD_VARIANT_DEF_H -#define GEN_BCM56890_A0_DNA_6_5_34_8_0_LTD_VARIANT_DEF_H - -#ifndef DOXYGEN_IGNORE_AUTOGEN - -#define BCMLTD_VARIANT_BCM56890_A0_DNA_6_5_34_8_0 29 -#define BCMLTD_VARIANT_LOCAL_BCM56890_A0_DNA_6_5_34_8_0 2 -#endif /* DOXYGEN_IGNORE_AUTOGEN */ - -#endif /* GEN_BCM56890_A0_DNA_6_5_34_8_0_LTD_VARIANT_DEF_H */ - diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78800_a0/cna_6_5_34_2_0/bcm78800_a0_cna_6_5_34_2_0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78800_a0/cna_6_5_34_2_0/bcm78800_a0_cna_6_5_34_2_0_ltd_variant_def.h deleted file mode 100644 index f9a75d6ad67..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78800_a0/cna_6_5_34_2_0/bcm78800_a0_cna_6_5_34_2_0_ltd_variant_def.h +++ /dev/null @@ -1,38 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table mapping files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - ******************************************************************************/ - -#ifndef GEN_BCM78800_A0_CNA_6_5_34_2_0_LTD_VARIANT_DEF_H -#define GEN_BCM78800_A0_CNA_6_5_34_2_0_LTD_VARIANT_DEF_H - -#ifndef DOXYGEN_IGNORE_AUTOGEN - -#define BCMLTD_VARIANT_BCM78800_A0_CNA_6_5_34_2_0 30 -#define BCMLTD_VARIANT_LOCAL_BCM78800_A0_CNA_6_5_34_2_0 1 -#endif /* DOXYGEN_IGNORE_AUTOGEN */ - -#endif /* GEN_BCM78800_A0_CNA_6_5_34_2_0_LTD_VARIANT_DEF_H */ - diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78910_a0/bcm78910_a0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78910_a0/bcm78910_a0_ltd_variant_def.h deleted file mode 100644 index fe51a97e29f..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78910_a0/bcm78910_a0_ltd_variant_def.h +++ /dev/null @@ -1,38 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table mapping files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - ******************************************************************************/ - -#ifndef GEN_BCM78910_A0_LTD_VARIANT_DEF_H -#define GEN_BCM78910_A0_LTD_VARIANT_DEF_H - -#ifndef DOXYGEN_IGNORE_AUTOGEN - -#define BCMLTD_VARIANT_BCM78910_A0_BASE 16 -#define BCMLTD_VARIANT_LOCAL_BCM78910_A0_BASE 0 -#endif /* DOXYGEN_IGNORE_AUTOGEN */ - -#endif /* GEN_BCM78910_A0_LTD_VARIANT_DEF_H */ - diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78914_b0/bcm78914_b0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78914_b0/bcm78914_b0_ltd_variant_def.h deleted file mode 100644 index 353346706e1..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78914_b0/bcm78914_b0_ltd_variant_def.h +++ /dev/null @@ -1,38 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table mapping files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - ******************************************************************************/ - -#ifndef GEN_BCM78914_B0_LTD_VARIANT_DEF_H -#define GEN_BCM78914_B0_LTD_VARIANT_DEF_H - -#ifndef DOXYGEN_IGNORE_AUTOGEN - -#define BCMLTD_VARIANT_BCM78914_B0_BASE 17 -#define BCMLTD_VARIANT_LOCAL_BCM78914_B0_BASE 0 -#endif /* DOXYGEN_IGNORE_AUTOGEN */ - -#endif /* GEN_BCM78914_B0_LTD_VARIANT_DEF_H */ - diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78914_b1/bcm78914_b1_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78914_b1/bcm78914_b1_ltd_variant_def.h deleted file mode 100644 index a2534342798..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78914_b1/bcm78914_b1_ltd_variant_def.h +++ /dev/null @@ -1,38 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table mapping files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - ******************************************************************************/ - -#ifndef GEN_BCM78914_B1_LTD_VARIANT_DEF_H -#define GEN_BCM78914_B1_LTD_VARIANT_DEF_H - -#ifndef DOXYGEN_IGNORE_AUTOGEN - -#define BCMLTD_VARIANT_BCM78914_B1_BASE 18 -#define BCMLTD_VARIANT_LOCAL_BCM78914_B1_BASE 0 -#endif /* DOXYGEN_IGNORE_AUTOGEN */ - -#endif /* GEN_BCM78914_B1_LTD_VARIANT_DEF_H */ - diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78920_a0/bcm78920_a0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78920_a0/bcm78920_a0_ltd_variant_def.h deleted file mode 100644 index 5e424ea077f..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78920_a0/bcm78920_a0_ltd_variant_def.h +++ /dev/null @@ -1,38 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table mapping files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - ******************************************************************************/ - -#ifndef GEN_BCM78920_A0_LTD_VARIANT_DEF_H -#define GEN_BCM78920_A0_LTD_VARIANT_DEF_H - -#ifndef DOXYGEN_IGNORE_AUTOGEN - -#define BCMLTD_VARIANT_BCM78920_A0_BASE 19 -#define BCMLTD_VARIANT_LOCAL_BCM78920_A0_BASE 0 -#endif /* DOXYGEN_IGNORE_AUTOGEN */ - -#endif /* GEN_BCM78920_A0_LTD_VARIANT_DEF_H */ - diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78920_a0/vna_4_6_1_0/bcm78920_a0_vna_4_6_1_0_ltd_variant_def.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78920_a0/vna_4_6_1_0/bcm78920_a0_vna_4_6_1_0_ltd_variant_def.h deleted file mode 100644 index c4c7df44329..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/defs/generated/bcm78920_a0/vna_4_6_1_0/bcm78920_a0_vna_4_6_1_0_ltd_variant_def.h +++ /dev/null @@ -1,38 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table mapping files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - ******************************************************************************/ - -#ifndef GEN_BCM78920_A0_VNA_4_6_1_0_LTD_VARIANT_DEF_H -#define GEN_BCM78920_A0_VNA_4_6_1_0_LTD_VARIANT_DEF_H - -#ifndef DOXYGEN_IGNORE_AUTOGEN - -#define BCMLTD_VARIANT_BCM78920_A0_VNA_4_6_1_0 32 -#define BCMLTD_VARIANT_LOCAL_BCM78920_A0_VNA_4_6_1_0 1 -#endif /* DOXYGEN_IGNORE_AUTOGEN */ - -#endif /* GEN_BCM78920_A0_VNA_4_6_1_0_LTD_VARIANT_DEF_H */ - diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56690_a0/cna_6_5_34_2_0/bcm56690_a0_cna_6_5_34_2_0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56690_a0/cna_6_5_34_2_0/bcm56690_a0_cna_6_5_34_2_0_ltd_variant_entry.h deleted file mode 100644 index 2fad18a42b5..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56690_a0/cna_6_5_34_2_0/bcm56690_a0_cna_6_5_34_2_0_ltd_variant_entry.h +++ /dev/null @@ -1,41 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table mapping files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - ******************************************************************************/ - -#ifndef GEN_BCM56690_A0_CNA_6_5_34_2_0_LTD_VARIANT_ENTRY_H -#define GEN_BCM56690_A0_CNA_6_5_34_2_0_LTD_VARIANT_ENTRY_H -#include -#endif /* GEN_BCM56690_A0_CNA_6_5_34_2_0_LTD_VARIANT_ENTRY_H */ - -#ifndef DOXYGEN_IGNORE_AUTOGEN - -#if BCMLTD_CONFIG_INCLUDE_BCM56690_A0_CNA_6_5_34_2_0 == 1 || defined(BCMLTD_VARIANT_OVERRIDE) -BCMLTD_VARIANT_ENTRY(bcm56690_a0,BCM56690_A0,cna_6_5_34_2_0,CNA_6_5_34_2_0,_,BCMLTD_VARIANT_BCM56690_A0_CNA_6_5_34_2_0,BCMLTD_VARIANT_LOCAL_BCM56690_A0_CNA_6_5_34_2_0,NULL,0,0) -#endif - -#endif /* DOXYGEN_IGNORE_AUTOGEN */ - - diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/cna_6_5_34_2_0/bcm56780_a0_cna_6_5_34_2_0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/cna_6_5_34_2_0/bcm56780_a0_cna_6_5_34_2_0_ltd_variant_entry.h deleted file mode 100644 index b5fbf52b36e..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/cna_6_5_34_2_0/bcm56780_a0_cna_6_5_34_2_0_ltd_variant_entry.h +++ /dev/null @@ -1,41 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table mapping files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - ******************************************************************************/ - -#ifndef GEN_BCM56780_A0_CNA_6_5_34_2_0_LTD_VARIANT_ENTRY_H -#define GEN_BCM56780_A0_CNA_6_5_34_2_0_LTD_VARIANT_ENTRY_H -#include -#endif /* GEN_BCM56780_A0_CNA_6_5_34_2_0_LTD_VARIANT_ENTRY_H */ - -#ifndef DOXYGEN_IGNORE_AUTOGEN - -#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_CNA_6_5_34_2_0 == 1 || defined(BCMLTD_VARIANT_OVERRIDE) -BCMLTD_VARIANT_ENTRY(bcm56780_a0,BCM56780_A0,cna_6_5_34_2_0,CNA_6_5_34_2_0,_,BCMLTD_VARIANT_BCM56780_A0_CNA_6_5_34_2_0,BCMLTD_VARIANT_LOCAL_BCM56780_A0_CNA_6_5_34_2_0,NULL,0,0) -#endif - -#endif /* DOXYGEN_IGNORE_AUTOGEN */ - - diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/hna_6_5_34_2_0/bcm56780_a0_hna_6_5_34_2_0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/hna_6_5_34_2_0/bcm56780_a0_hna_6_5_34_2_0_ltd_variant_entry.h deleted file mode 100644 index 4075cd5849c..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56780_a0/hna_6_5_34_2_0/bcm56780_a0_hna_6_5_34_2_0_ltd_variant_entry.h +++ /dev/null @@ -1,41 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table mapping files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - ******************************************************************************/ - -#ifndef GEN_BCM56780_A0_HNA_6_5_34_2_0_LTD_VARIANT_ENTRY_H -#define GEN_BCM56780_A0_HNA_6_5_34_2_0_LTD_VARIANT_ENTRY_H -#include -#endif /* GEN_BCM56780_A0_HNA_6_5_34_2_0_LTD_VARIANT_ENTRY_H */ - -#ifndef DOXYGEN_IGNORE_AUTOGEN - -#if BCMLTD_CONFIG_INCLUDE_BCM56780_A0_HNA_6_5_34_2_0 == 1 || defined(BCMLTD_VARIANT_OVERRIDE) -BCMLTD_VARIANT_ENTRY(bcm56780_a0,BCM56780_A0,hna_6_5_34_2_0,HNA_6_5_34_2_0,_,BCMLTD_VARIANT_BCM56780_A0_HNA_6_5_34_2_0,BCMLTD_VARIANT_LOCAL_BCM56780_A0_HNA_6_5_34_2_0,NULL,0,0) -#endif - -#endif /* DOXYGEN_IGNORE_AUTOGEN */ - - diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/hna_6_5_34_2_0/bcm56880_a0_hna_6_5_34_2_0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/hna_6_5_34_2_0/bcm56880_a0_hna_6_5_34_2_0_ltd_variant_entry.h deleted file mode 100644 index bc8ee4f580a..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/hna_6_5_34_2_0/bcm56880_a0_hna_6_5_34_2_0_ltd_variant_entry.h +++ /dev/null @@ -1,41 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table mapping files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - ******************************************************************************/ - -#ifndef GEN_BCM56880_A0_HNA_6_5_34_2_0_LTD_VARIANT_ENTRY_H -#define GEN_BCM56880_A0_HNA_6_5_34_2_0_LTD_VARIANT_ENTRY_H -#include -#endif /* GEN_BCM56880_A0_HNA_6_5_34_2_0_LTD_VARIANT_ENTRY_H */ - -#ifndef DOXYGEN_IGNORE_AUTOGEN - -#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_HNA_6_5_34_2_0 == 1 || defined(BCMLTD_VARIANT_OVERRIDE) -BCMLTD_VARIANT_ENTRY(bcm56880_a0,BCM56880_A0,hna_6_5_34_2_0,HNA_6_5_34_2_0,_,BCMLTD_VARIANT_BCM56880_A0_HNA_6_5_34_2_0,BCMLTD_VARIANT_LOCAL_BCM56880_A0_HNA_6_5_34_2_0,NULL,0,0) -#endif - -#endif /* DOXYGEN_IGNORE_AUTOGEN */ - - diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/nfa_6_5_34_3_0/bcm56880_a0_nfa_6_5_34_3_0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/nfa_6_5_34_3_0/bcm56880_a0_nfa_6_5_34_3_0_ltd_variant_entry.h deleted file mode 100644 index b46f54e2a1f..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56880_a0/nfa_6_5_34_3_0/bcm56880_a0_nfa_6_5_34_3_0_ltd_variant_entry.h +++ /dev/null @@ -1,41 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table mapping files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - ******************************************************************************/ - -#ifndef GEN_BCM56880_A0_NFA_6_5_34_3_0_LTD_VARIANT_ENTRY_H -#define GEN_BCM56880_A0_NFA_6_5_34_3_0_LTD_VARIANT_ENTRY_H -#include -#endif /* GEN_BCM56880_A0_NFA_6_5_34_3_0_LTD_VARIANT_ENTRY_H */ - -#ifndef DOXYGEN_IGNORE_AUTOGEN - -#if BCMLTD_CONFIG_INCLUDE_BCM56880_A0_NFA_6_5_34_3_0 == 1 || defined(BCMLTD_VARIANT_OVERRIDE) -BCMLTD_VARIANT_ENTRY(bcm56880_a0,BCM56880_A0,nfa_6_5_34_3_0,NFA_6_5_34_3_0,_,BCMLTD_VARIANT_BCM56880_A0_NFA_6_5_34_3_0,BCMLTD_VARIANT_LOCAL_BCM56880_A0_NFA_6_5_34_3_0,NULL,0,0) -#endif - -#endif /* DOXYGEN_IGNORE_AUTOGEN */ - - diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/cna_6_5_34_2_0/bcm56890_a0_cna_6_5_34_2_0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/cna_6_5_34_2_0/bcm56890_a0_cna_6_5_34_2_0_ltd_variant_entry.h deleted file mode 100644 index 579b3d421d2..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/cna_6_5_34_2_0/bcm56890_a0_cna_6_5_34_2_0_ltd_variant_entry.h +++ /dev/null @@ -1,41 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table mapping files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - ******************************************************************************/ - -#ifndef GEN_BCM56890_A0_CNA_6_5_34_2_0_LTD_VARIANT_ENTRY_H -#define GEN_BCM56890_A0_CNA_6_5_34_2_0_LTD_VARIANT_ENTRY_H -#include -#endif /* GEN_BCM56890_A0_CNA_6_5_34_2_0_LTD_VARIANT_ENTRY_H */ - -#ifndef DOXYGEN_IGNORE_AUTOGEN - -#if BCMLTD_CONFIG_INCLUDE_BCM56890_A0_CNA_6_5_34_2_0 == 1 || defined(BCMLTD_VARIANT_OVERRIDE) -BCMLTD_VARIANT_ENTRY(bcm56890_a0,BCM56890_A0,cna_6_5_34_2_0,CNA_6_5_34_2_0,_,BCMLTD_VARIANT_BCM56890_A0_CNA_6_5_34_2_0,BCMLTD_VARIANT_LOCAL_BCM56890_A0_CNA_6_5_34_2_0,NULL,0,0) -#endif - -#endif /* DOXYGEN_IGNORE_AUTOGEN */ - - diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/dna_6_5_34_8_0/bcm56890_a0_dna_6_5_34_8_0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/dna_6_5_34_8_0/bcm56890_a0_dna_6_5_34_8_0_ltd_variant_entry.h deleted file mode 100644 index 02c05aad2eb..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm56890_a0/dna_6_5_34_8_0/bcm56890_a0_dna_6_5_34_8_0_ltd_variant_entry.h +++ /dev/null @@ -1,41 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table mapping files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - ******************************************************************************/ - -#ifndef GEN_BCM56890_A0_DNA_6_5_34_8_0_LTD_VARIANT_ENTRY_H -#define GEN_BCM56890_A0_DNA_6_5_34_8_0_LTD_VARIANT_ENTRY_H -#include -#endif /* GEN_BCM56890_A0_DNA_6_5_34_8_0_LTD_VARIANT_ENTRY_H */ - -#ifndef DOXYGEN_IGNORE_AUTOGEN - -#if BCMLTD_CONFIG_INCLUDE_BCM56890_A0_DNA_6_5_34_8_0 == 1 || defined(BCMLTD_VARIANT_OVERRIDE) -BCMLTD_VARIANT_ENTRY(bcm56890_a0,BCM56890_A0,dna_6_5_34_8_0,DNA_6_5_34_8_0,_,BCMLTD_VARIANT_BCM56890_A0_DNA_6_5_34_8_0,BCMLTD_VARIANT_LOCAL_BCM56890_A0_DNA_6_5_34_8_0,NULL,0,0) -#endif - -#endif /* DOXYGEN_IGNORE_AUTOGEN */ - - diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78800_a0/cna_6_5_34_2_0/bcm78800_a0_cna_6_5_34_2_0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78800_a0/cna_6_5_34_2_0/bcm78800_a0_cna_6_5_34_2_0_ltd_variant_entry.h deleted file mode 100644 index d0c834d3e23..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78800_a0/cna_6_5_34_2_0/bcm78800_a0_cna_6_5_34_2_0_ltd_variant_entry.h +++ /dev/null @@ -1,41 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table mapping files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - ******************************************************************************/ - -#ifndef GEN_BCM78800_A0_CNA_6_5_34_2_0_LTD_VARIANT_ENTRY_H -#define GEN_BCM78800_A0_CNA_6_5_34_2_0_LTD_VARIANT_ENTRY_H -#include -#endif /* GEN_BCM78800_A0_CNA_6_5_34_2_0_LTD_VARIANT_ENTRY_H */ - -#ifndef DOXYGEN_IGNORE_AUTOGEN - -#if BCMLTD_CONFIG_INCLUDE_BCM78800_A0_CNA_6_5_34_2_0 == 1 || defined(BCMLTD_VARIANT_OVERRIDE) -BCMLTD_VARIANT_ENTRY(bcm78800_a0,BCM78800_A0,cna_6_5_34_2_0,CNA_6_5_34_2_0,_,BCMLTD_VARIANT_BCM78800_A0_CNA_6_5_34_2_0,BCMLTD_VARIANT_LOCAL_BCM78800_A0_CNA_6_5_34_2_0,NULL,0,0) -#endif - -#endif /* DOXYGEN_IGNORE_AUTOGEN */ - - diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78910_a0/bcm78910_a0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78910_a0/bcm78910_a0_ltd_variant_entry.h deleted file mode 100644 index 4d7a4e03430..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78910_a0/bcm78910_a0_ltd_variant_entry.h +++ /dev/null @@ -1,41 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table mapping files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - ******************************************************************************/ - -#ifndef GEN_BCM78910_A0_LTD_VARIANT_ENTRY_H -#define GEN_BCM78910_A0_LTD_VARIANT_ENTRY_H -#include -#endif /* GEN_BCM78910_A0_LTD_VARIANT_ENTRY_H */ - -#ifndef DOXYGEN_IGNORE_AUTOGEN - -#if BCMLTD_CONFIG_INCLUDE_BCM78910_A0_BASE == 1 || defined(BCMLTD_VARIANT_OVERRIDE) -BCMLTD_VARIANT_ENTRY(bcm78910_a0,BCM78910_A0,,BASE,,BCMLTD_VARIANT_BCM78910_A0_BASE,BCMLTD_VARIANT_LOCAL_BCM78910_A0_BASE,NULL,0,0) -#endif - -#endif /* DOXYGEN_IGNORE_AUTOGEN */ - - diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78914_b0/bcm78914_b0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78914_b0/bcm78914_b0_ltd_variant_entry.h deleted file mode 100644 index 4cb6307894e..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78914_b0/bcm78914_b0_ltd_variant_entry.h +++ /dev/null @@ -1,41 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table mapping files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - ******************************************************************************/ - -#ifndef GEN_BCM78914_B0_LTD_VARIANT_ENTRY_H -#define GEN_BCM78914_B0_LTD_VARIANT_ENTRY_H -#include -#endif /* GEN_BCM78914_B0_LTD_VARIANT_ENTRY_H */ - -#ifndef DOXYGEN_IGNORE_AUTOGEN - -#if BCMLTD_CONFIG_INCLUDE_BCM78914_B0_BASE == 1 || defined(BCMLTD_VARIANT_OVERRIDE) -BCMLTD_VARIANT_ENTRY(bcm78914_b0,BCM78914_B0,,BASE,,BCMLTD_VARIANT_BCM78914_B0_BASE,BCMLTD_VARIANT_LOCAL_BCM78914_B0_BASE,NULL,0,0) -#endif - -#endif /* DOXYGEN_IGNORE_AUTOGEN */ - - diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78914_b1/bcm78914_b1_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78914_b1/bcm78914_b1_ltd_variant_entry.h deleted file mode 100644 index 6fed119869a..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78914_b1/bcm78914_b1_ltd_variant_entry.h +++ /dev/null @@ -1,41 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table mapping files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - ******************************************************************************/ - -#ifndef GEN_BCM78914_B1_LTD_VARIANT_ENTRY_H -#define GEN_BCM78914_B1_LTD_VARIANT_ENTRY_H -#include -#endif /* GEN_BCM78914_B1_LTD_VARIANT_ENTRY_H */ - -#ifndef DOXYGEN_IGNORE_AUTOGEN - -#if BCMLTD_CONFIG_INCLUDE_BCM78914_B1_BASE == 1 || defined(BCMLTD_VARIANT_OVERRIDE) -BCMLTD_VARIANT_ENTRY(bcm78914_b1,BCM78914_B1,,BASE,,BCMLTD_VARIANT_BCM78914_B1_BASE,BCMLTD_VARIANT_LOCAL_BCM78914_B1_BASE,NULL,0,0) -#endif - -#endif /* DOXYGEN_IGNORE_AUTOGEN */ - - diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78920_a0/bcm78920_a0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78920_a0/bcm78920_a0_ltd_variant_entry.h deleted file mode 100644 index 6d3fff66f2b..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78920_a0/bcm78920_a0_ltd_variant_entry.h +++ /dev/null @@ -1,41 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table mapping files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - ******************************************************************************/ - -#ifndef GEN_BCM78920_A0_LTD_VARIANT_ENTRY_H -#define GEN_BCM78920_A0_LTD_VARIANT_ENTRY_H -#include -#endif /* GEN_BCM78920_A0_LTD_VARIANT_ENTRY_H */ - -#ifndef DOXYGEN_IGNORE_AUTOGEN - -#if BCMLTD_CONFIG_INCLUDE_BCM78920_A0_BASE == 1 || defined(BCMLTD_VARIANT_OVERRIDE) -BCMLTD_VARIANT_ENTRY(bcm78920_a0,BCM78920_A0,,BASE,,BCMLTD_VARIANT_BCM78920_A0_BASE,BCMLTD_VARIANT_LOCAL_BCM78920_A0_BASE,NULL,0,0) -#endif - -#endif /* DOXYGEN_IGNORE_AUTOGEN */ - - diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78920_a0/vna_4_6_1_0/bcm78920_a0_vna_4_6_1_0_ltd_variant_entry.h b/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78920_a0/vna_4_6_1_0/bcm78920_a0_vna_4_6_1_0_ltd_variant_entry.h deleted file mode 100644 index 0779607a6c1..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmltd/include/bcmltd/entry/generated/bcm78920_a0/vna_4_6_1_0/bcm78920_a0_vna_4_6_1_0_ltd_variant_entry.h +++ /dev/null @@ -1,41 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by fltg from Logical Table mapping files. - * - * Tool: $SDK/tools/fltg/bin/fltg - * - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - ******************************************************************************/ - -#ifndef GEN_BCM78920_A0_VNA_4_6_1_0_LTD_VARIANT_ENTRY_H -#define GEN_BCM78920_A0_VNA_4_6_1_0_LTD_VARIANT_ENTRY_H -#include -#endif /* GEN_BCM78920_A0_VNA_4_6_1_0_LTD_VARIANT_ENTRY_H */ - -#ifndef DOXYGEN_IGNORE_AUTOGEN - -#if BCMLTD_CONFIG_INCLUDE_BCM78920_A0_VNA_4_6_1_0 == 1 || defined(BCMLTD_VARIANT_OVERRIDE) -BCMLTD_VARIANT_ENTRY(bcm78920_a0,BCM78920_A0,vna_4_6_1_0,VNA_4_6_1_0,_,BCMLTD_VARIANT_BCM78920_A0_VNA_4_6_1_0,BCMLTD_VARIANT_LOCAL_BCM78920_A0_VNA_4_6_1_0,NULL,0,0) -#endif - -#endif /* DOXYGEN_IGNORE_AUTOGEN */ - - diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78910_a0/bcm78910_a0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78910_a0/bcm78910_a0_pkt_lbhdr.c deleted file mode 100644 index 38ab40d80a5..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78910_a0/bcm78910_a0_pkt_lbhdr.c +++ /dev/null @@ -1,367 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated from the registers file. - * Edits to this file will be lost when it is regenerated. - * Tool: INTERNAL/regs/xgs/generate-pmd.pl - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - * This file provides LBHDR access functions for BCM78910_A0. - * - ******************************************************************************/ - -#include -#include - -#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) -#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) -#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) -#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) -/******************************************************************************* - * SWFORMAT: LBHDR - * BLOCKS: - * SIZE: 128 - ******************************************************************************/ -static void bcmpkt_lbhdr_start_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[0], 30, 2, val); -} - -static uint32_t bcmpkt_lbhdr_start_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[0], 30, 2); - return val; -} - -static void bcmpkt_lbhdr_header_type_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[0], 24, 6, val); -} - -static uint32_t bcmpkt_lbhdr_header_type_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[0], 24, 6); - return val; -} - -static void bcmpkt_lbhdr_pkt_profile_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[3], 16, 3, val); -} - -static uint32_t bcmpkt_lbhdr_pkt_profile_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[3], 16, 3); - return val; -} - -static void bcmpkt_lbhdr_visibility_pkt_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[2], 15, 1, val); -} - -static uint32_t bcmpkt_lbhdr_visibility_pkt_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[2], 15, 1); - return val; -} - -static void bcmpkt_lbhdr_pp_port_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[2], 5, 10, val); -} - -static uint32_t bcmpkt_lbhdr_pp_port_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[2], 5, 10); - return val; -} - -static void bcmpkt_lbhdr_routed_pkt_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[2], 16, 1, val); -} - -static uint32_t bcmpkt_lbhdr_routed_pkt_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[2], 16, 1); - return val; -} - -static void bcmpkt_lbhdr_vrf_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[3], 24, 8, val & MASK(8)); - WORD_FIELD_SET(data[2], 0, 5, (val >> 8) & MASK(5)); -} - -static uint32_t bcmpkt_lbhdr_vrf_get(uint32_t *data) -{ - uint32_t val; - val = (WORD_FIELD_GET(data[3], 24, 8) | (WORD_FIELD_GET(data[2], 0, 5) << 8)) ; - return val; -} - -static void bcmpkt_lbhdr_vrf_valid_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[3], 22, 1, val); -} - -static uint32_t bcmpkt_lbhdr_vrf_valid_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[3], 22, 1); - return val; -} - -static void bcmpkt_lbhdr_qos_field_valid_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[3], 19, 1, val); -} - -static uint32_t bcmpkt_lbhdr_qos_field_valid_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[3], 19, 1); - return val; -} - -static void bcmpkt_lbhdr_opaque_object_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[1], 17, 4, val); -} - -static uint32_t bcmpkt_lbhdr_opaque_object_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[1], 17, 4); - return val; -} - -static void bcmpkt_lbhdr_qos_field_eth_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[1], 21, 8, val); -} - -static uint32_t bcmpkt_lbhdr_qos_field_eth_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[1], 21, 8); - return val; -} - -static void bcmpkt_lbhdr_int_pri_eth_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[1], 21, 4, val); -} - -static uint32_t bcmpkt_lbhdr_int_pri_eth_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[1], 21, 4); - return val; -} - -static void bcmpkt_lbhdr_int_cn_eth_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[1], 25, 2, val); -} - -static uint32_t bcmpkt_lbhdr_int_cn_eth_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[1], 25, 2); - return val; -} - -static void bcmpkt_lbhdr_cng_eth_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[1], 27, 2, val); -} - -static uint32_t bcmpkt_lbhdr_cng_eth_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[1], 27, 2); - return val; -} - -static void bcmpkt_lbhdr_input_priority_md_eth_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[0], 20, 4, val); -} - -static uint32_t bcmpkt_lbhdr_input_priority_md_eth_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[0], 20, 4); - return val; -} - -static void bcmpkt_lbhdr_vfi_valid_md_eth_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[3], 21, 1, val); -} - -static uint32_t bcmpkt_lbhdr_vfi_valid_md_eth_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[3], 21, 1); - return val; -} - -static void bcmpkt_lbhdr_vfi_md_eth_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[3], 24, 8, val & MASK(8)); - WORD_FIELD_SET(data[2], 0, 5, (val >> 8) & MASK(5)); -} - -static uint32_t bcmpkt_lbhdr_vfi_md_eth_get(uint32_t *data) -{ - uint32_t val; - val = (WORD_FIELD_GET(data[3], 24, 8) | (WORD_FIELD_GET(data[2], 0, 5) << 8)) ; - return val; -} - -static uint32_t bcmpkt_lbhdr_i_size_get(uint32_t *data, uint32_t **addr) -{ - return 4; -} - - -const bcmpkt_lbhdr_fget_t bcm78910_a0_lbhdr_fget = { - { - bcmpkt_lbhdr_start_get, - bcmpkt_lbhdr_header_type_get, - NULL, - bcmpkt_lbhdr_pkt_profile_get, - bcmpkt_lbhdr_visibility_pkt_get, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - bcmpkt_lbhdr_pp_port_get, - bcmpkt_lbhdr_routed_pkt_get, - bcmpkt_lbhdr_vrf_get, - bcmpkt_lbhdr_vrf_valid_get, - bcmpkt_lbhdr_qos_field_valid_get, - bcmpkt_lbhdr_opaque_object_get, - bcmpkt_lbhdr_qos_field_eth_get, - bcmpkt_lbhdr_int_pri_eth_get, - bcmpkt_lbhdr_int_cn_eth_get, - bcmpkt_lbhdr_cng_eth_get, - bcmpkt_lbhdr_input_priority_md_eth_get, - bcmpkt_lbhdr_vfi_valid_md_eth_get, - bcmpkt_lbhdr_vfi_md_eth_get - } -}; - - -const bcmpkt_lbhdr_fset_t bcm78910_a0_lbhdr_fset = { - { - bcmpkt_lbhdr_start_set, - bcmpkt_lbhdr_header_type_set, - NULL, - bcmpkt_lbhdr_pkt_profile_set, - bcmpkt_lbhdr_visibility_pkt_set, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - bcmpkt_lbhdr_pp_port_set, - bcmpkt_lbhdr_routed_pkt_set, - bcmpkt_lbhdr_vrf_set, - bcmpkt_lbhdr_vrf_valid_set, - bcmpkt_lbhdr_qos_field_valid_set, - bcmpkt_lbhdr_opaque_object_set, - bcmpkt_lbhdr_qos_field_eth_set, - bcmpkt_lbhdr_int_pri_eth_set, - bcmpkt_lbhdr_int_cn_eth_set, - bcmpkt_lbhdr_cng_eth_set, - bcmpkt_lbhdr_input_priority_md_eth_set, - bcmpkt_lbhdr_vfi_valid_md_eth_set, - bcmpkt_lbhdr_vfi_md_eth_set - } -}; - - -const bcmpkt_lbhdr_figet_t bcm78910_a0_lbhdr_figet = { - { - bcmpkt_lbhdr_i_size_get - } -}; - -static shr_enum_map_t bcm78910_a0_lbhdr_view_types[] = { - {NULL, -1}, -}; - -/* -2: unsupported, -1: global, others: view's value */ -static int bcm78910_a0_lbhdr_view_infos[BCMPKT_LBHDR_FID_COUNT] = { - -1, -1, -2, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, - -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1, -}; - - -void bcm78910_a0_lbhdr_view_info_get(bcmpkt_pmd_view_info_t *info) -{ - info->view_infos = bcm78910_a0_lbhdr_view_infos; - info->view_types = bcm78910_a0_lbhdr_view_types; - info->view_type_get = NULL; -} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78910_a0/bcm78910_a0_pkt_rxpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78910_a0/bcm78910_a0_pkt_rxpmd.c deleted file mode 100644 index 5ed55ad5d38..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78910_a0/bcm78910_a0_pkt_rxpmd.c +++ /dev/null @@ -1,1187 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated from the registers file. - * Edits to this file will be lost when it is regenerated. - * Tool: INTERNAL/regs/xgs/generate-pmd.pl - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - * This file provides RXPMD access functions for BCM78910_A0. - * - ******************************************************************************/ - -#include -#include -#include - -#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) -#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) -#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) -#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) -/******************************************************************************* - * SWFORMAT: RXPMD - * BLOCKS: - * SIZE: 448 - ******************************************************************************/ -static void bcmpkt_rxpmd_unicast_queue_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[4], 21, 1, val); -} - -static uint32_t bcmpkt_rxpmd_unicast_queue_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[4], 21, 1); - return val; -} - -static void bcmpkt_rxpmd_queue_num_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[11], 26, 6, val); -} - -static uint32_t bcmpkt_rxpmd_queue_num_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[11], 26, 6); - return val; -} - -static void bcmpkt_rxpmd_cpu_cos_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[11], 26, 6, val); -} - -static uint32_t bcmpkt_rxpmd_cpu_cos_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[11], 26, 6); - return val; -} - -static void bcmpkt_rxpmd_matched_rule_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[8], 16, 12, val); -} - -static uint32_t bcmpkt_rxpmd_matched_rule_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[8], 16, 12); - return val; -} - -static void bcmpkt_rxpmd_pkt_length_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[9], 3, 14, val); -} - -static uint32_t bcmpkt_rxpmd_pkt_length_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[9], 3, 14); - return val; -} - -static void bcmpkt_rxpmd_src_port_num_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[6], 20, 10, val); -} - -static uint32_t bcmpkt_rxpmd_src_port_num_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[6], 20, 10); - return val; -} - -static void bcmpkt_rxpmd_outer_vid_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[7], 3, 12, val); -} - -static uint32_t bcmpkt_rxpmd_outer_vid_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[7], 3, 12); - return val; -} - -static void bcmpkt_rxpmd_outer_cfi_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[8], 31, 1, val); -} - -static uint32_t bcmpkt_rxpmd_outer_cfi_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[8], 31, 1); - return val; -} - -static void bcmpkt_rxpmd_outer_pri_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[7], 0, 3, val); -} - -static uint32_t bcmpkt_rxpmd_outer_pri_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[7], 0, 3); - return val; -} - -static void bcmpkt_rxpmd_special_packet_indicator_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[6], 19, 1, val); -} - -static uint32_t bcmpkt_rxpmd_special_packet_indicator_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[6], 19, 1); - return val; -} - -static void bcmpkt_rxpmd_special_packet_type_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[8], 6, 3, val); -} - -static uint32_t bcmpkt_rxpmd_special_packet_type_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[8], 6, 3); - return val; -} - -static void bcmpkt_rxpmd_change_dscp_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[8], 2, 1, val); -} - -static uint32_t bcmpkt_rxpmd_change_dscp_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[8], 2, 1); - return val; -} - -static void bcmpkt_rxpmd_dscp_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[8], 6, 6, val); -} - -static uint32_t bcmpkt_rxpmd_dscp_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[8], 6, 6); - return val; -} - -static void bcmpkt_rxpmd_change_ecn_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[8], 3, 1, val); -} - -static uint32_t bcmpkt_rxpmd_change_ecn_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[8], 3, 1); - return val; -} - -static void bcmpkt_rxpmd_ecn_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[8], 12, 2, val); -} - -static uint32_t bcmpkt_rxpmd_ecn_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[8], 12, 2); - return val; -} - -static void bcmpkt_rxpmd_timestamp_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[6], 31, 1, val & MASK(1)); - WORD_FIELD_SET(data[5], 0, 31, (val >> 1) & MASK(31)); -} - -static uint32_t bcmpkt_rxpmd_timestamp_get(uint32_t *data) -{ - uint32_t val; - val = (WORD_FIELD_GET(data[6], 31, 1) | (WORD_FIELD_GET(data[5], 0, 31) << 1)) ; - return val; -} - -static void bcmpkt_rxpmd_timestamp_hi_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[5], 31, 1, val & MASK(1)); - WORD_FIELD_SET(data[4], 0, 15, (val >> 1) & MASK(15)); -} - -static uint32_t bcmpkt_rxpmd_timestamp_hi_get(uint32_t *data) -{ - uint32_t val; - val = (WORD_FIELD_GET(data[5], 31, 1) | (WORD_FIELD_GET(data[4], 0, 15) << 1)) ; - return val; -} - -static void bcmpkt_rxpmd_mtp_index_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[8], 28, 3, val); -} - -static uint32_t bcmpkt_rxpmd_mtp_index_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[8], 28, 3); - return val; -} - -static void bcmpkt_rxpmd_bpdu_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[8], 1, 1, val); -} - -static uint32_t bcmpkt_rxpmd_bpdu_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[8], 1, 1); - return val; -} - -static void bcmpkt_rxpmd_l3only_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[8], 15, 1, val); -} - -static uint32_t bcmpkt_rxpmd_l3only_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[8], 15, 1); - return val; -} - -static void bcmpkt_rxpmd_ip_routed_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[8], 14, 1, val); -} - -static uint32_t bcmpkt_rxpmd_ip_routed_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[8], 14, 1); - return val; -} - -static void bcmpkt_rxpmd_uc_sw_copy_dropped_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[4], 20, 1, val); -} - -static uint32_t bcmpkt_rxpmd_uc_sw_copy_dropped_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[4], 20, 1); - return val; -} - -static void bcmpkt_rxpmd_switch_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[6], 30, 1, val); -} - -static uint32_t bcmpkt_rxpmd_switch_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[6], 30, 1); - return val; -} - -static void bcmpkt_rxpmd_ing_otag_action_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[9], 1, 2, val); -} - -static uint32_t bcmpkt_rxpmd_ing_otag_action_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[9], 1, 2); - return val; -} - -static void bcmpkt_rxpmd_ing_tag_type_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[9], 0, 1, val); -} - -static uint32_t bcmpkt_rxpmd_ing_tag_type_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[9], 0, 1); - return val; -} - -static void bcmpkt_rxpmd_rx_bfd_start_offset_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[11], 18, 8, val); -} - -static uint32_t bcmpkt_rxpmd_rx_bfd_start_offset_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[11], 18, 8); - return val; -} - -static void bcmpkt_rxpmd_rx_bfd_start_offset_type_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[11], 16, 2, val); -} - -static uint32_t bcmpkt_rxpmd_rx_bfd_start_offset_type_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[11], 16, 2); - return val; -} - -static void bcmpkt_rxpmd_rx_bfd_session_index_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[11], 4, 12, val); -} - -static uint32_t bcmpkt_rxpmd_rx_bfd_session_index_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[11], 4, 12); - return val; -} - -static void bcmpkt_rxpmd_reason_type_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[11], 0, 4, val); -} - -static uint32_t bcmpkt_rxpmd_reason_type_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[11], 0, 4); - return val; -} - -static void bcmpkt_rxpmd_do_not_change_ttl_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[8], 5, 1, val); -} - -static uint32_t bcmpkt_rxpmd_do_not_change_ttl_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[8], 5, 1); - return val; -} - -static void bcmpkt_rxpmd_i2e_classid_type_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[11], 16, 4, val); -} - -static uint32_t bcmpkt_rxpmd_i2e_classid_type_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[11], 16, 4); - return val; -} - -static void bcmpkt_rxpmd_i2e_classid_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[11], 4, 12, val); -} - -static uint32_t bcmpkt_rxpmd_i2e_classid_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[11], 4, 12); - return val; -} - -static void bcmpkt_rxpmd_ing_l3_intf_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[10], 19, 13, val); -} - -static uint32_t bcmpkt_rxpmd_ing_l3_intf_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[10], 19, 13); - return val; -} - -static void bcmpkt_rxpmd_entropy_label_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[7], 31, 1, val & MASK(1)); - WORD_FIELD_SET(data[6], 0, 19, (val >> 1) & MASK(19)); -} - -static uint32_t bcmpkt_rxpmd_entropy_label_get(uint32_t *data) -{ - uint32_t val; - val = (WORD_FIELD_GET(data[7], 31, 1) | (WORD_FIELD_GET(data[6], 0, 19) << 1)) ; - return val; -} - -static void bcmpkt_rxpmd_tunnel_decap_type_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[4], 16, 4, val); -} - -static uint32_t bcmpkt_rxpmd_tunnel_decap_type_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[4], 16, 4); - return val; -} - -static void bcmpkt_rxpmd_dlb_id_valid_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[8], 4, 1, val); -} - -static uint32_t bcmpkt_rxpmd_dlb_id_valid_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[8], 4, 1); - return val; -} - -static void bcmpkt_rxpmd_dlb_id_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[4], 24, 7, val); -} - -static uint32_t bcmpkt_rxpmd_dlb_id_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[4], 24, 7); - return val; -} - -static void bcmpkt_rxpmd_replication_or_nhop_index_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[7], 15, 15, val); -} - -static uint32_t bcmpkt_rxpmd_replication_or_nhop_index_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[7], 15, 15); - return val; -} - -static void bcmpkt_rxpmd_incoming_int_hdr_type_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[4], 22, 2, val); -} - -static uint32_t bcmpkt_rxpmd_incoming_int_hdr_type_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[4], 22, 2); - return val; -} - -static void bcmpkt_rxpmd_o_nhi_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[9], 17, 15, val); -} - -static uint32_t bcmpkt_rxpmd_o_nhi_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[9], 17, 15); - return val; -} - -static void bcmpkt_rxpmd_incoming_opaque_tag_status_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[8], 0, 1, val); -} - -static uint32_t bcmpkt_rxpmd_incoming_opaque_tag_status_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[8], 0, 1); - return val; -} - -static void bcmpkt_rxpmd_ieee_802_1as_timestamp_enabled_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[4], 15, 1, val); -} - -static uint32_t bcmpkt_rxpmd_ieee_802_1as_timestamp_enabled_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[4], 15, 1); - return val; -} - -static void bcmpkt_rxpmd_matched_rule_ep_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[8], 16, 9, val); -} - -static uint32_t bcmpkt_rxpmd_matched_rule_ep_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[8], 16, 9); - return val; -} - -static void bcmpkt_rxpmd_is_egr_ts_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[8], 25, 1, val); -} - -static uint32_t bcmpkt_rxpmd_is_egr_ts_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[8], 25, 1); - return val; -} - -static void bcmpkt_rxpmd_modified_pkt_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[7], 30, 1, val); -} - -static uint32_t bcmpkt_rxpmd_modified_pkt_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[7], 30, 1); - return val; -} - -static uint32_t bcmpkt_rxpmd_i_size_get(uint32_t *data, uint32_t **addr) -{ - return 14; -} - -static uint32_t bcmpkt_rxpmd_i_reason_get(uint32_t *data, uint32_t **addr) -{ - *addr = data + 12; - return 2; -} - -static uint32_t bcmpkt_rxpmd_i_module_hdr_get(uint32_t *data, uint32_t **addr) -{ - *addr = data + 0; - return 4; -} - -/******************************************************************************* - * SWFORMAT: RX_REASON - * BLOCKS: - * SIZE: 51 - ******************************************************************************/ -void bcm78910_a0_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data) -{ - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_INVALID_REASON)) { - data[1] |= (0x1 << 0); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SLF)) { - data[1] |= (0x1 << 1); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_DLF)) { - data[1] |= (0x1 << 2); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L2MOVE)) { - data[1] |= (0x1 << 3); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L2CPU)) { - data[1] |= (0x1 << 4); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MISS)) { - data[1] |= (0x1 << 5); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3DST_MISS)) { - data[1] |= (0x1 << 6); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MOVE)) { - data[1] |= (0x1 << 7); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_MC_MISS)) { - data[1] |= (0x1 << 8); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_MISS)) { - data[1] |= (0x1 << 9); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_FFP)) { - data[1] |= (0x1 << 10); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3HDR_ERR)) { - data[1] |= (0x1 << 11); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_PROTOCOL_PKT)) { - data[1] |= (0x1 << 12); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_DOS_ATTACK)) { - data[1] |= (0x1 << 13); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_MARTIAN_ADDR)) { - data[1] |= (0x1 << 14); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_TUNNEL_ERR)) { - data[1] |= (0x1 << 15); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_SRC)) { - data[1] |= (0x1 << 16); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_DST)) { - data[1] |= (0x1 << 17); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_ICMP_REDIRECT)) { - data[1] |= (0x1 << 18); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_SLOWPATH)) { - data[1] |= (0x1 << 19); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PARITY_ERROR)) { - data[1] |= (0x1 << 20); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_MTU_CHECK_FAIL)) { - data[1] |= (0x1 << 21); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_TTL_CHECK)) { - data[1] |= (0x1 << 22); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_LABEL_MISS)) { - data[1] |= (0x1 << 23); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_INVALID_ACTION)) { - data[1] |= (0x1 << 24); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_INVALID_PAYLOAD)) { - data[1] |= (0x1 << 25); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_VFP)) { - data[1] |= (0x1 << 26); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PBT_NONUC_PKT)) { - data[1] |= (0x1 << 27); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_NEXT_HOP)) { - data[1] |= (0x1 << 28); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MY_STATION)) { - data[1] |= (0x1 << 29); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_TIME_SYNC)) { - data[1] |= (0x1 << 30); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_TUNNEL_DECAP_ECN_ERROR)) { - data[1] |= (0x1 << 31); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_BFD_SLOWPATH)) { - data[0] |= (0x1 << 0); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_BFD_ERROR)) { - data[0] |= (0x1 << 1); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PACKET_TRACE_TO_CPU)) { - data[0] |= (0x1 << 2); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT)) { - data[0] |= (0x1 << 3); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_ALERT_LABEL)) { - data[0] |= (0x1 << 4); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH)) { - data[0] |= (0x1 << 5); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_DLB_MONITOR)) { - data[0] |= (0x1 << 6); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_FLEX)) { - data[0] |= (0x1 << 7); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_UVLAN)) { - data[0] |= (0x1 << 8); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_SRV6_ERROR)) { - data[0] |= (0x1 << 9); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_VXLAN_VN_ID_MISS)) { - data[0] |= (0x1 << 10); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_VXLAN_SIP_MISS)) { - data[0] |= (0x1 << 11); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_ADAPT_MISS)) { - data[0] |= (0x1 << 12); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_INVALID_GSH_NON_GSH)) { - data[0] |= (0x1 << 13); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_APU_POLICY_CTC)) { - data[0] |= (0x1 << 14); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_DELAYED_CTC)) { - data[0] |= (0x1 << 15); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PORT_DOWN)) { - data[0] |= (0x1 << 16); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_SRV6_CONTROL_PKT)) { - data[0] |= (0x1 << 17); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_OUI_COMPRESSION_MISS)) { - data[0] |= (0x1 << 18); - } -} - -void bcm78910_a0_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons) -{ - uint32_t val; - COMPILER_REFERENCE(val); - if (data[1] & (0x1 << 0)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_INVALID_REASON); - } - if (data[1] & (0x1 << 1)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SLF); - } - if (data[1] & (0x1 << 2)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_DLF); - } - if (data[1] & (0x1 << 3)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L2MOVE); - } - if (data[1] & (0x1 << 4)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L2CPU); - } - if (data[1] & (0x1 << 5)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MISS); - } - if (data[1] & (0x1 << 6)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3DST_MISS); - } - if (data[1] & (0x1 << 7)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MOVE); - } - if (data[1] & (0x1 << 8)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_MC_MISS); - } - if (data[1] & (0x1 << 9)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_MISS); - } - if (data[1] & (0x1 << 10)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_FFP); - } - if (data[1] & (0x1 << 11)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3HDR_ERR); - } - if (data[1] & (0x1 << 12)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_PROTOCOL_PKT); - } - if (data[1] & (0x1 << 13)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_DOS_ATTACK); - } - if (data[1] & (0x1 << 14)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_MARTIAN_ADDR); - } - if (data[1] & (0x1 << 15)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_TUNNEL_ERR); - } - if (data[1] & (0x1 << 16)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_SRC); - } - if (data[1] & (0x1 << 17)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_DST); - } - if (data[1] & (0x1 << 18)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_ICMP_REDIRECT); - } - if (data[1] & (0x1 << 19)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_SLOWPATH); - } - if (data[1] & (0x1 << 20)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PARITY_ERROR); - } - if (data[1] & (0x1 << 21)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_MTU_CHECK_FAIL); - } - if (data[1] & (0x1 << 22)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_TTL_CHECK); - } - if (data[1] & (0x1 << 23)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_LABEL_MISS); - } - if (data[1] & (0x1 << 24)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_INVALID_ACTION); - } - if (data[1] & (0x1 << 25)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_INVALID_PAYLOAD); - } - if (data[1] & (0x1 << 26)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_VFP); - } - if (data[1] & (0x1 << 27)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PBT_NONUC_PKT); - } - if (data[1] & (0x1 << 28)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_NEXT_HOP); - } - if (data[1] & (0x1 << 29)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MY_STATION); - } - if (data[1] & (0x1 << 30)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_TIME_SYNC); - } - if (data[1] & (0x1 << 31)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_TUNNEL_DECAP_ECN_ERROR); - } - if (data[0] & (0x1 << 0)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_BFD_SLOWPATH); - } - if (data[0] & (0x1 << 1)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_BFD_ERROR); - } - if (data[0] & (0x1 << 2)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PACKET_TRACE_TO_CPU); - } - if (data[0] & (0x1 << 3)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT); - } - if (data[0] & (0x1 << 4)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_ALERT_LABEL); - } - if (data[0] & (0x1 << 5)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH); - } - if (data[0] & (0x1 << 6)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_DLB_MONITOR); - } - if (data[0] & (0x1 << 7)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_FLEX); - } - if (data[0] & (0x1 << 8)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_UVLAN); - } - if (data[0] & (0x1 << 9)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_SRV6_ERROR); - } - if (data[0] & (0x1 << 10)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_VXLAN_VN_ID_MISS); - } - if (data[0] & (0x1 << 11)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_VXLAN_SIP_MISS); - } - if (data[0] & (0x1 << 12)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_ADAPT_MISS); - } - if (data[0] & (0x1 << 13)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_INVALID_GSH_NON_GSH); - } - if (data[0] & (0x1 << 14)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_APU_POLICY_CTC); - } - if (data[0] & (0x1 << 15)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_DELAYED_CTC); - } - if (data[0] & (0x1 << 16)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PORT_DOWN); - } - if (data[0] & (0x1 << 17)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_SRV6_CONTROL_PKT); - } - if (data[0] & (0x1 << 18)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_OUI_COMPRESSION_MISS); - } -} - -/******************************************************************************* - * SWFORMAT: EP_RX_REASON - * BLOCKS: - * SIZE: 64 - ******************************************************************************/ -void bcm78910_a0_ep_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data) -{ - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_EP_CTC)) { - data[1] |= (0x1 << 0); - } -} - -void bcm78910_a0_ep_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons) -{ - uint32_t val; - COMPILER_REFERENCE(val); - if (data[1] & (0x1 << 0)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_EP_CTC); - } -} - -const bcmpkt_rxpmd_fget_t bcm78910_a0_rxpmd_fget = { - { - bcmpkt_rxpmd_unicast_queue_get, - bcmpkt_rxpmd_queue_num_get, - bcmpkt_rxpmd_cpu_cos_get, - NULL, - bcmpkt_rxpmd_matched_rule_get, - bcmpkt_rxpmd_pkt_length_get, - bcmpkt_rxpmd_src_port_num_get, - NULL, - NULL, - NULL, - bcmpkt_rxpmd_outer_vid_get, - bcmpkt_rxpmd_outer_cfi_get, - bcmpkt_rxpmd_outer_pri_get, - bcmpkt_rxpmd_special_packet_indicator_get, - bcmpkt_rxpmd_special_packet_type_get, - bcmpkt_rxpmd_change_dscp_get, - bcmpkt_rxpmd_dscp_get, - bcmpkt_rxpmd_change_ecn_get, - bcmpkt_rxpmd_ecn_get, - NULL, - bcmpkt_rxpmd_timestamp_get, - bcmpkt_rxpmd_timestamp_hi_get, - bcmpkt_rxpmd_mtp_index_get, - bcmpkt_rxpmd_bpdu_get, - NULL, - bcmpkt_rxpmd_l3only_get, - bcmpkt_rxpmd_ip_routed_get, - NULL, - NULL, - bcmpkt_rxpmd_uc_sw_copy_dropped_get, - bcmpkt_rxpmd_switch_get, - NULL, - NULL, - bcmpkt_rxpmd_ing_otag_action_get, - bcmpkt_rxpmd_ing_tag_type_get, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - bcmpkt_rxpmd_rx_bfd_start_offset_get, - bcmpkt_rxpmd_rx_bfd_start_offset_type_get, - bcmpkt_rxpmd_rx_bfd_session_index_get, - bcmpkt_rxpmd_reason_type_get, - bcmpkt_rxpmd_do_not_change_ttl_get, - bcmpkt_rxpmd_i2e_classid_type_get, - bcmpkt_rxpmd_i2e_classid_get, - bcmpkt_rxpmd_ing_l3_intf_get, - NULL, - NULL, - bcmpkt_rxpmd_entropy_label_get, - bcmpkt_rxpmd_tunnel_decap_type_get, - bcmpkt_rxpmd_dlb_id_valid_get, - bcmpkt_rxpmd_dlb_id_get, - NULL, - NULL, - NULL, - NULL, - bcmpkt_rxpmd_replication_or_nhop_index_get, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - bcmpkt_rxpmd_incoming_int_hdr_type_get, - NULL, - NULL, - NULL, - NULL, - bcmpkt_rxpmd_o_nhi_get, - NULL, - NULL, - bcmpkt_rxpmd_incoming_opaque_tag_status_get, - NULL, - NULL, - NULL, - NULL, - bcmpkt_rxpmd_ieee_802_1as_timestamp_enabled_get, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - bcmpkt_rxpmd_matched_rule_ep_get, - bcmpkt_rxpmd_is_egr_ts_get, - bcmpkt_rxpmd_modified_pkt_get, - NULL, - NULL - } -}; - - -const bcmpkt_rxpmd_fset_t bcm78910_a0_rxpmd_fset = { - { - bcmpkt_rxpmd_unicast_queue_set, - bcmpkt_rxpmd_queue_num_set, - bcmpkt_rxpmd_cpu_cos_set, - NULL, - bcmpkt_rxpmd_matched_rule_set, - bcmpkt_rxpmd_pkt_length_set, - bcmpkt_rxpmd_src_port_num_set, - NULL, - NULL, - NULL, - bcmpkt_rxpmd_outer_vid_set, - bcmpkt_rxpmd_outer_cfi_set, - bcmpkt_rxpmd_outer_pri_set, - bcmpkt_rxpmd_special_packet_indicator_set, - bcmpkt_rxpmd_special_packet_type_set, - bcmpkt_rxpmd_change_dscp_set, - bcmpkt_rxpmd_dscp_set, - bcmpkt_rxpmd_change_ecn_set, - bcmpkt_rxpmd_ecn_set, - NULL, - bcmpkt_rxpmd_timestamp_set, - bcmpkt_rxpmd_timestamp_hi_set, - bcmpkt_rxpmd_mtp_index_set, - bcmpkt_rxpmd_bpdu_set, - NULL, - bcmpkt_rxpmd_l3only_set, - bcmpkt_rxpmd_ip_routed_set, - NULL, - NULL, - bcmpkt_rxpmd_uc_sw_copy_dropped_set, - bcmpkt_rxpmd_switch_set, - NULL, - NULL, - bcmpkt_rxpmd_ing_otag_action_set, - bcmpkt_rxpmd_ing_tag_type_set, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - bcmpkt_rxpmd_rx_bfd_start_offset_set, - bcmpkt_rxpmd_rx_bfd_start_offset_type_set, - bcmpkt_rxpmd_rx_bfd_session_index_set, - bcmpkt_rxpmd_reason_type_set, - bcmpkt_rxpmd_do_not_change_ttl_set, - bcmpkt_rxpmd_i2e_classid_type_set, - bcmpkt_rxpmd_i2e_classid_set, - bcmpkt_rxpmd_ing_l3_intf_set, - NULL, - NULL, - bcmpkt_rxpmd_entropy_label_set, - bcmpkt_rxpmd_tunnel_decap_type_set, - bcmpkt_rxpmd_dlb_id_valid_set, - bcmpkt_rxpmd_dlb_id_set, - NULL, - NULL, - NULL, - NULL, - bcmpkt_rxpmd_replication_or_nhop_index_set, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - bcmpkt_rxpmd_incoming_int_hdr_type_set, - NULL, - NULL, - NULL, - NULL, - bcmpkt_rxpmd_o_nhi_set, - NULL, - NULL, - bcmpkt_rxpmd_incoming_opaque_tag_status_set, - NULL, - NULL, - NULL, - NULL, - bcmpkt_rxpmd_ieee_802_1as_timestamp_enabled_set, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - bcmpkt_rxpmd_matched_rule_ep_set, - bcmpkt_rxpmd_is_egr_ts_set, - bcmpkt_rxpmd_modified_pkt_set, - NULL, - NULL - } -}; - - -const bcmpkt_rxpmd_figet_t bcm78910_a0_rxpmd_figet = { - { - bcmpkt_rxpmd_i_size_get, - bcmpkt_rxpmd_i_reason_get, - bcmpkt_rxpmd_i_module_hdr_get, - NULL - } -}; - -static shr_enum_map_t bcm78910_a0_rxpmd_view_types[] = { - {NULL, -1}, -}; - -/* -2: unsupported, -1: global, others: view's value */ -static int bcm78910_a0_rxpmd_view_infos[BCMPKT_RXPMD_FID_COUNT] = { - -1, -1, -1, -2, -1, -1, -1, -2, -2, -2, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -2, -1, -1, -1, -1, -2, -1, -1, -2, -2, -1, -1, -2, - -2, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, - -1, -1, -1, -1, -1, -1, -1, -2, -2, -1, -1, -1, -1, -2, -2, -2, - -2, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -2, -2, -2, - -2, -1, -2, -2, -1, -2, -2, -2, -2, -1, -2, -2, -2, -2, -2, -2, - -1, -1, -1, -2, -2, -}; - - -void bcm78910_a0_rxpmd_view_info_get(bcmpkt_pmd_view_info_t *info) -{ - info->view_infos = bcm78910_a0_rxpmd_view_infos; - info->view_types = bcm78910_a0_rxpmd_view_types; - info->view_type_get = NULL; -} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78910_a0/bcm78910_a0_pkt_txpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78910_a0/bcm78910_a0_pkt_txpmd.c deleted file mode 100644 index c40d80562bb..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78910_a0/bcm78910_a0_pkt_txpmd.c +++ /dev/null @@ -1,1059 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated from the registers file. - * Edits to this file will be lost when it is regenerated. - * Tool: INTERNAL/regs/xgs/generate-pmd.pl - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - * This file provides TXPMD access functions for BCM78910_A0. - * - ******************************************************************************/ - -#include -#include - -#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) -#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) -#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) -#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) -/******************************************************************************* - * SWFORMAT: TXPMD - * BLOCKS: - * SIZE: 128 - ******************************************************************************/ -static void bcmpkt_txpmd_start_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[0], 30, 2, val); -} - -static uint32_t bcmpkt_txpmd_start_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[0], 30, 2); - return val; -} - -static void bcmpkt_txpmd_header_type_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[0], 24, 6, val); -} - -static uint32_t bcmpkt_txpmd_header_type_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[0], 24, 6); - return val; -} - -static void bcmpkt_txpmd_cell_error_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return; - } - WORD_FIELD_SET(data[3], 9, 1, val); -} - -static uint32_t bcmpkt_txpmd_cell_error_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return 0; - } - val = WORD_FIELD_GET(data[3], 9, 1); - return val; -} - -static void bcmpkt_txpmd_src_modid_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return; - } - WORD_FIELD_SET(data[2], 20, 8, val); -} - -static uint32_t bcmpkt_txpmd_src_modid_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return 0; - } - val = WORD_FIELD_GET(data[2], 20, 8); - return val; -} - -static void bcmpkt_txpmd_cos_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return; - } - WORD_FIELD_SET(data[3], 12, 6, val); -} - -static uint32_t bcmpkt_txpmd_cos_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return 0; - } - val = WORD_FIELD_GET(data[3], 12, 6); - return val; -} - -static void bcmpkt_txpmd_input_pri_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return; - } - WORD_FIELD_SET(data[2], 8, 4, val); -} - -static uint32_t bcmpkt_txpmd_input_pri_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return 0; - } - val = WORD_FIELD_GET(data[2], 8, 4); - return val; -} - -static void bcmpkt_txpmd_unicast_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return; - } - WORD_FIELD_SET(data[2], 29, 1, val); -} - -static uint32_t bcmpkt_txpmd_unicast_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return 0; - } - val = WORD_FIELD_GET(data[2], 29, 1); - return val; -} - -static void bcmpkt_txpmd_rqe_q_num_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return; - } - WORD_FIELD_SET(data[2], 12, 3, val); -} - -static uint32_t bcmpkt_txpmd_rqe_q_num_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return 0; - } - val = WORD_FIELD_GET(data[2], 12, 3); - return val; -} - -static void bcmpkt_txpmd_ieee1588_one_step_enable_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return; - } - WORD_FIELD_SET(data[2], 7, 1, val); -} - -static uint32_t bcmpkt_txpmd_ieee1588_one_step_enable_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return 0; - } - val = WORD_FIELD_GET(data[2], 7, 1); - return val; -} - -static void bcmpkt_txpmd_ieee1588_regen_udp_checksum_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return; - } - WORD_FIELD_SET(data[3], 8, 1, val); -} - -static uint32_t bcmpkt_txpmd_ieee1588_regen_udp_checksum_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return 0; - } - val = WORD_FIELD_GET(data[3], 8, 1); - return val; -} - -static void bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return; - } - WORD_FIELD_SET(data[2], 6, 1, val); -} - -static uint32_t bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return 0; - } - val = WORD_FIELD_GET(data[2], 6, 1); - return val; -} - -static void bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return; - } - WORD_FIELD_SET(data[3], 0, 8, val); -} - -static uint32_t bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return 0; - } - val = WORD_FIELD_GET(data[3], 0, 8); - return val; -} - -static void bcmpkt_txpmd_tx_ts_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return; - } - WORD_FIELD_SET(data[2], 28, 1, val); -} - -static uint32_t bcmpkt_txpmd_tx_ts_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return 0; - } - val = WORD_FIELD_GET(data[2], 28, 1); - return val; -} - -static void bcmpkt_txpmd_spid_override_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return; - } - WORD_FIELD_SET(data[2], 19, 1, val); -} - -static uint32_t bcmpkt_txpmd_spid_override_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return 0; - } - val = WORD_FIELD_GET(data[2], 19, 1); - return val; -} - -static void bcmpkt_txpmd_spid_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return; - } - WORD_FIELD_SET(data[2], 17, 2, val); -} - -static uint32_t bcmpkt_txpmd_spid_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return 0; - } - val = WORD_FIELD_GET(data[2], 17, 2); - return val; -} - -static void bcmpkt_txpmd_spap_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return; - } - WORD_FIELD_SET(data[2], 15, 2, val); -} - -static uint32_t bcmpkt_txpmd_spap_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return 0; - } - val = WORD_FIELD_GET(data[2], 15, 2); - return val; -} - -static void bcmpkt_txpmd_cng_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return; - } - WORD_FIELD_SET(data[3], 10, 2, val); -} - -static uint32_t bcmpkt_txpmd_cng_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return 0; - } - val = WORD_FIELD_GET(data[3], 10, 2); - return val; -} - -static void bcmpkt_txpmd_destination_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return; - } - WORD_FIELD_SET(data[3], 18, 14, val & MASK(14)); - WORD_FIELD_SET(data[2], 0, 2, (val >> 14) & MASK(2)); -} - -static uint32_t bcmpkt_txpmd_destination_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return 0; - } - val = (WORD_FIELD_GET(data[3], 18, 14) | (WORD_FIELD_GET(data[2], 0, 2) << 14)) ; - return val; -} - -static void bcmpkt_txpmd_destination_type_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return; - } - WORD_FIELD_SET(data[2], 2, 4, val); -} - -static uint32_t bcmpkt_txpmd_destination_type_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return 0; - } - val = WORD_FIELD_GET(data[2], 2, 4); - return val; -} - -static void bcmpkt_txpmd_wred_mark_eligible_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return; - } - WORD_FIELD_SET(data[2], 30, 1, val); -} - -static uint32_t bcmpkt_txpmd_wred_mark_eligible_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return 0; - } - val = WORD_FIELD_GET(data[2], 30, 1); - return val; -} - -static void bcmpkt_txpmd_wred_response_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return; - } - WORD_FIELD_SET(data[2], 31, 1, val); -} - -static uint32_t bcmpkt_txpmd_wred_response_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return 0; - } - val = WORD_FIELD_GET(data[2], 31, 1); - return val; -} - -static void bcmpkt_txpmd_cpu_tx_mcast_lb_index_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return; - } - WORD_FIELD_SET(data[3], 0, 8, val); -} - -static uint32_t bcmpkt_txpmd_cpu_tx_mcast_lb_index_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return 0; - } - val = WORD_FIELD_GET(data[3], 0, 8); - return val; -} - -static void bcmpkt_txpmd_cpu_tx_ecmp_member_id_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return; - } - WORD_FIELD_SET(data[3], 0, 17, val); -} - -static uint32_t bcmpkt_txpmd_cpu_tx_ecmp_member_id_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return 0; - } - val = WORD_FIELD_GET(data[3], 0, 17); - return val; -} - -static void bcmpkt_txpmd_cpu_tx_destination_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return; - } - WORD_FIELD_SET(data[3], 27, 5, val & MASK(5)); - WORD_FIELD_SET(data[2], 0, 11, (val >> 5) & MASK(11)); -} - -static uint32_t bcmpkt_txpmd_cpu_tx_destination_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return 0; - } - val = (WORD_FIELD_GET(data[3], 27, 5) | (WORD_FIELD_GET(data[2], 0, 11) << 5)) ; - return val; -} - -static void bcmpkt_txpmd_cpu_tx_destination_type_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return; - } - WORD_FIELD_SET(data[2], 11, 4, val); -} - -static uint32_t bcmpkt_txpmd_cpu_tx_destination_type_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return 0; - } - val = WORD_FIELD_GET(data[2], 11, 4); - return val; -} - -static void bcmpkt_txpmd_cpu_tx_dp_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return; - } - WORD_FIELD_SET(data[2], 15, 2, val); -} - -static uint32_t bcmpkt_txpmd_cpu_tx_dp_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return 0; - } - val = WORD_FIELD_GET(data[2], 15, 2); - return val; -} - -static void bcmpkt_txpmd_cpu_tx_input_pri_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return; - } - WORD_FIELD_SET(data[2], 17, 4, val); -} - -static uint32_t bcmpkt_txpmd_cpu_tx_input_pri_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return 0; - } - val = WORD_FIELD_GET(data[2], 17, 4); - return val; -} - -static void bcmpkt_txpmd_cpu_tx_int_cn_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return; - } - WORD_FIELD_SET(data[2], 21, 2, val); -} - -static uint32_t bcmpkt_txpmd_cpu_tx_int_cn_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return 0; - } - val = WORD_FIELD_GET(data[2], 21, 2); - return val; -} - -static void bcmpkt_txpmd_cpu_tx_int_pri_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return; - } - WORD_FIELD_SET(data[2], 23, 4, val); -} - -static uint32_t bcmpkt_txpmd_cpu_tx_int_pri_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return 0; - } - val = WORD_FIELD_GET(data[2], 23, 4); - return val; -} - -static void bcmpkt_txpmd_cpu_tx_mcast_lb_index_vld_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return; - } - WORD_FIELD_SET(data[2], 27, 1, val); -} - -static uint32_t bcmpkt_txpmd_cpu_tx_mcast_lb_index_vld_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return 0; - } - val = WORD_FIELD_GET(data[2], 27, 1); - return val; -} - -static void bcmpkt_txpmd_cpu_tx_pkt_profile_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return; - } - WORD_FIELD_SET(data[2], 28, 3, val); -} - -static uint32_t bcmpkt_txpmd_cpu_tx_pkt_profile_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return 0; - } - val = WORD_FIELD_GET(data[2], 28, 3); - return val; -} - -static void bcmpkt_txpmd_cpu_tx_qos_fields_vld_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return; - } - WORD_FIELD_SET(data[2], 31, 1, val); -} - -static uint32_t bcmpkt_txpmd_cpu_tx_qos_fields_vld_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return 0; - } - val = WORD_FIELD_GET(data[2], 31, 1); - return val; -} - -static void bcmpkt_txpmd_cpu_tx_routed_pkt_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return; - } - WORD_FIELD_SET(data[1], 0, 1, val); -} - -static uint32_t bcmpkt_txpmd_cpu_tx_routed_pkt_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return 0; - } - val = WORD_FIELD_GET(data[1], 0, 1); - return val; -} - -static void bcmpkt_txpmd_cpu_tx_vrf_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return; - } - WORD_FIELD_SET(data[1], 14, 13, val); -} - -static uint32_t bcmpkt_txpmd_cpu_tx_vrf_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return 0; - } - val = WORD_FIELD_GET(data[1], 14, 13); - return val; -} - -static void bcmpkt_txpmd_cpu_tx_vrf_valid_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return; - } - WORD_FIELD_SET(data[1], 27, 1, val); -} - -static uint32_t bcmpkt_txpmd_cpu_tx_vrf_valid_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return 0; - } - val = WORD_FIELD_GET(data[1], 27, 1); - return val; -} - -static void bcmpkt_txpmd_cpu_tx_cookie_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return; - } - WORD_FIELD_SET(data[3], 17, 9, val); -} - -static uint32_t bcmpkt_txpmd_cpu_tx_cookie_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return 0; - } - val = WORD_FIELD_GET(data[3], 17, 9); - return val; -} - -static void bcmpkt_txpmd_cpu_tx_cookie_valid_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return; - } - WORD_FIELD_SET(data[3], 26, 1, val); -} - -static uint32_t bcmpkt_txpmd_cpu_tx_cookie_valid_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return 0; - } - val = WORD_FIELD_GET(data[3], 26, 1); - return val; -} - -static void bcmpkt_txpmd_cookie_7_0_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return; - } - WORD_FIELD_SET(data[3], 0, 8, val); -} - -static uint32_t bcmpkt_txpmd_cookie_7_0_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return 0; - } - val = WORD_FIELD_GET(data[3], 0, 8); - return val; -} - -static void bcmpkt_txpmd_cookie_8_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return; - } - WORD_FIELD_SET(data[3], 8, 1, val); -} - -static uint32_t bcmpkt_txpmd_cookie_8_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return 0; - } - val = WORD_FIELD_GET(data[3], 8, 1); - return val; -} - -static void bcmpkt_txpmd_cpu_tx_svp_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return; - } - WORD_FIELD_SET(data[1], 1, 13, val); -} - -static uint32_t bcmpkt_txpmd_cpu_tx_svp_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return 0; - } - val = WORD_FIELD_GET(data[1], 1, 13); - return val; -} - -static uint32_t bcmpkt_txpmd_i_size_get(uint32_t *data, uint32_t **addr) -{ - return 4; -} - - -const bcmpkt_txpmd_fget_t bcm78910_a0_txpmd_fget = { - { - bcmpkt_txpmd_start_get, - bcmpkt_txpmd_header_type_get, - NULL, - NULL, - NULL, - NULL, - NULL, - bcmpkt_txpmd_cell_error_get, - NULL, - bcmpkt_txpmd_src_modid_get, - bcmpkt_txpmd_cos_get, - bcmpkt_txpmd_input_pri_get, - bcmpkt_txpmd_unicast_get, - bcmpkt_txpmd_rqe_q_num_get, - NULL, - bcmpkt_txpmd_ieee1588_one_step_enable_get, - bcmpkt_txpmd_ieee1588_regen_udp_checksum_get, - bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get, - bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get, - bcmpkt_txpmd_tx_ts_get, - bcmpkt_txpmd_spid_override_get, - bcmpkt_txpmd_spid_get, - bcmpkt_txpmd_spap_get, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - bcmpkt_txpmd_cng_get, - bcmpkt_txpmd_destination_get, - bcmpkt_txpmd_destination_type_get, - bcmpkt_txpmd_wred_mark_eligible_get, - bcmpkt_txpmd_wred_response_get, - bcmpkt_txpmd_cpu_tx_mcast_lb_index_get, - bcmpkt_txpmd_cpu_tx_ecmp_member_id_get, - bcmpkt_txpmd_cpu_tx_destination_get, - bcmpkt_txpmd_cpu_tx_destination_type_get, - bcmpkt_txpmd_cpu_tx_dp_get, - bcmpkt_txpmd_cpu_tx_input_pri_get, - bcmpkt_txpmd_cpu_tx_int_cn_get, - bcmpkt_txpmd_cpu_tx_int_pri_get, - bcmpkt_txpmd_cpu_tx_mcast_lb_index_vld_get, - bcmpkt_txpmd_cpu_tx_pkt_profile_get, - bcmpkt_txpmd_cpu_tx_qos_fields_vld_get, - bcmpkt_txpmd_cpu_tx_routed_pkt_get, - NULL, - NULL, - bcmpkt_txpmd_cpu_tx_vrf_get, - bcmpkt_txpmd_cpu_tx_vrf_valid_get, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - bcmpkt_txpmd_cpu_tx_cookie_get, - bcmpkt_txpmd_cpu_tx_cookie_valid_get, - bcmpkt_txpmd_cookie_7_0_get, - bcmpkt_txpmd_cookie_8_get, - NULL, - NULL, - NULL, - NULL, - bcmpkt_txpmd_cpu_tx_svp_get, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL - } -}; - - -const bcmpkt_txpmd_fset_t bcm78910_a0_txpmd_fset = { - { - bcmpkt_txpmd_start_set, - bcmpkt_txpmd_header_type_set, - NULL, - NULL, - NULL, - NULL, - NULL, - bcmpkt_txpmd_cell_error_set, - NULL, - bcmpkt_txpmd_src_modid_set, - bcmpkt_txpmd_cos_set, - bcmpkt_txpmd_input_pri_set, - bcmpkt_txpmd_unicast_set, - bcmpkt_txpmd_rqe_q_num_set, - NULL, - bcmpkt_txpmd_ieee1588_one_step_enable_set, - bcmpkt_txpmd_ieee1588_regen_udp_checksum_set, - bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set, - bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set, - bcmpkt_txpmd_tx_ts_set, - bcmpkt_txpmd_spid_override_set, - bcmpkt_txpmd_spid_set, - bcmpkt_txpmd_spap_set, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - bcmpkt_txpmd_cng_set, - bcmpkt_txpmd_destination_set, - bcmpkt_txpmd_destination_type_set, - bcmpkt_txpmd_wred_mark_eligible_set, - bcmpkt_txpmd_wred_response_set, - bcmpkt_txpmd_cpu_tx_mcast_lb_index_set, - bcmpkt_txpmd_cpu_tx_ecmp_member_id_set, - bcmpkt_txpmd_cpu_tx_destination_set, - bcmpkt_txpmd_cpu_tx_destination_type_set, - bcmpkt_txpmd_cpu_tx_dp_set, - bcmpkt_txpmd_cpu_tx_input_pri_set, - bcmpkt_txpmd_cpu_tx_int_cn_set, - bcmpkt_txpmd_cpu_tx_int_pri_set, - bcmpkt_txpmd_cpu_tx_mcast_lb_index_vld_set, - bcmpkt_txpmd_cpu_tx_pkt_profile_set, - bcmpkt_txpmd_cpu_tx_qos_fields_vld_set, - bcmpkt_txpmd_cpu_tx_routed_pkt_set, - NULL, - NULL, - bcmpkt_txpmd_cpu_tx_vrf_set, - bcmpkt_txpmd_cpu_tx_vrf_valid_set, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - bcmpkt_txpmd_cpu_tx_cookie_set, - bcmpkt_txpmd_cpu_tx_cookie_valid_set, - bcmpkt_txpmd_cookie_7_0_set, - bcmpkt_txpmd_cookie_8_set, - NULL, - NULL, - NULL, - NULL, - bcmpkt_txpmd_cpu_tx_svp_set, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL - } -}; - - -const bcmpkt_txpmd_figet_t bcm78910_a0_txpmd_figet = { - { - bcmpkt_txpmd_i_size_get - } -}; - -static shr_enum_map_t bcm78910_a0_txpmd_view_types[] = { - {"sobmh_from_cpu", 1}, - {"cpu_tx", 2}, - {NULL, -1}, -}; - -/* -2: unsupported, -1: global, others: view's value */ -static int bcm78910_a0_txpmd_view_infos[BCMPKT_TXPMD_FID_COUNT] = { - -1, -1, -2, -2, -2, -2, -2, 1, -2, 1, 1, 1, 1, 1, -2, 1, - 1, 1, 1, 1, 1, 1, 1, -2, -2, -2, -2, -2, -2, -2, 1, 1, - 1, 1, 1, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, -2, - -2, 2, 2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, - -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, 2, 2, 1, 1, -2, -2, - -2, -2, 2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, - -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, - -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, - -2, -2, -}; - - -void bcm78910_a0_txpmd_view_info_get(bcmpkt_pmd_view_info_t *info) -{ - info->view_infos = bcm78910_a0_txpmd_view_infos; - info->view_types = bcm78910_a0_txpmd_view_types; - info->view_type_get = bcmpkt_txpmd_header_type_get; -} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78910_a0/bcm78910_a0_pmd_field.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78910_a0/bcm78910_a0_pmd_field.c deleted file mode 100644 index ba1f123ac28..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78910_a0/bcm78910_a0_pmd_field.c +++ /dev/null @@ -1,3359 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated from the registers file. - * Edits to this file will be lost when it is regenerated. - * Tool: INTERNAL/regs/xgs/generate-pmd.pl - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - * This file provides PMD field info for BCM78910_A0. - * - ******************************************************************************/ - -#include -#include - -static bcmpkt_field_info_t -field_fmt_0_0_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 0; - info.maxbit = 0; - return info; -} - -static void -field_fmt_0_0_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xfffffffe) | (*val & 0x1); -} - -static void -field_fmt_0_0_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = pmd[13] & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_0_16_3_3_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 0; - info.maxbit = 16; - return info; -} - -static void -field_fmt_0_16_3_3_set(uint32_t *pmd, uint32_t *val) -{ - pmd[3] = (pmd[3] & 0xfffe0000) | (*val & 0x1ffff); -} - -static void -field_fmt_0_16_3_3_get(uint32_t *pmd, uint32_t *val) -{ - *val = pmd[3] & 0x1ffff; -} - -static bcmpkt_field_info_t -field_fmt_0_63_13_12_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 0; - info.maxbit = 63; - return info; -} - -static void -field_fmt_0_63_13_12_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = val[0]; - pmd[12] = val[1]; -} - -static void -field_fmt_0_63_13_12_get(uint32_t *pmd, uint32_t *val) -{ - val[0] = pmd[13]; - val[1] = pmd[12]; -} - -static bcmpkt_field_info_t -field_fmt_0_7_3_3_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 0; - info.maxbit = 7; - return info; -} - -static void -field_fmt_0_7_3_3_set(uint32_t *pmd, uint32_t *val) -{ - pmd[3] = (pmd[3] & 0xffffff00) | (*val & 0xff); -} - -static void -field_fmt_0_7_3_3_get(uint32_t *pmd, uint32_t *val) -{ - *val = pmd[3] & 0xff; -} - -static bcmpkt_field_info_t -field_fmt_10_10_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 10; - info.maxbit = 10; - return info; -} - -static void -field_fmt_10_10_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xfffffbff) | ((*val & 0x1) << 10); -} - -static void -field_fmt_10_10_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 10) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_10_11_3_3_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 10; - info.maxbit = 11; - return info; -} - -static void -field_fmt_10_11_3_3_set(uint32_t *pmd, uint32_t *val) -{ - pmd[3] = (pmd[3] & 0xfffff3ff) | ((*val & 0x3) << 10); -} - -static void -field_fmt_10_11_3_3_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[3] >> 10) & 0x3; -} - -static bcmpkt_field_info_t -field_fmt_115_127_10_10_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 115; - info.maxbit = 127; - return info; -} - -static void -field_fmt_115_127_10_10_set(uint32_t *pmd, uint32_t *val) -{ - pmd[10] = (pmd[10] & 0x7ffff) | (*val << 19); -} - -static void -field_fmt_115_127_10_10_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[10] >> 19) & 0x1fff; -} - -static bcmpkt_field_info_t -field_fmt_116_119_0_0_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 116; - info.maxbit = 119; - return info; -} - -static void -field_fmt_116_119_0_0_set(uint32_t *pmd, uint32_t *val) -{ - pmd[0] = (pmd[0] & 0xff0fffff) | ((*val & 0xf) << 20); -} - -static void -field_fmt_116_119_0_0_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[0] >> 20) & 0xf; -} - -static bcmpkt_field_info_t -field_fmt_11_11_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 11; - info.maxbit = 11; - return info; -} - -static void -field_fmt_11_11_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xfffff7ff) | ((*val & 0x1) << 11); -} - -static void -field_fmt_11_11_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 11) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_120_125_0_0_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 120; - info.maxbit = 125; - return info; -} - -static void -field_fmt_120_125_0_0_set(uint32_t *pmd, uint32_t *val) -{ - pmd[0] = (pmd[0] & 0xc0ffffff) | ((*val & 0x3f) << 24); -} - -static void -field_fmt_120_125_0_0_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[0] >> 24) & 0x3f; -} - -static bcmpkt_field_info_t -field_fmt_126_127_0_0_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 126; - info.maxbit = 127; - return info; -} - -static void -field_fmt_126_127_0_0_set(uint32_t *pmd, uint32_t *val) -{ - pmd[0] = (pmd[0] & 0x3fffffff) | (*val << 30); -} - -static void -field_fmt_126_127_0_0_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[0] >> 30) & 0x3; -} - -static bcmpkt_field_info_t -field_fmt_128_128_9_9_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 128; - info.maxbit = 128; - return info; -} - -static void -field_fmt_128_128_9_9_set(uint32_t *pmd, uint32_t *val) -{ - pmd[9] = (pmd[9] & 0xfffffffe) | (*val & 0x1); -} - -static void -field_fmt_128_128_9_9_get(uint32_t *pmd, uint32_t *val) -{ - *val = pmd[9] & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_129_130_9_9_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 129; - info.maxbit = 130; - return info; -} - -static void -field_fmt_129_130_9_9_set(uint32_t *pmd, uint32_t *val) -{ - pmd[9] = (pmd[9] & 0xfffffff9) | ((*val & 0x3) << 1); -} - -static void -field_fmt_129_130_9_9_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[9] >> 1) & 0x3; -} - -static bcmpkt_field_info_t -field_fmt_12_12_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 12; - info.maxbit = 12; - return info; -} - -static void -field_fmt_12_12_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xffffefff) | ((*val & 0x1) << 12); -} - -static void -field_fmt_12_12_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 12) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_12_17_3_3_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 12; - info.maxbit = 17; - return info; -} - -static void -field_fmt_12_17_3_3_set(uint32_t *pmd, uint32_t *val) -{ - pmd[3] = (pmd[3] & 0xfffc0fff) | ((*val & 0x3f) << 12); -} - -static void -field_fmt_12_17_3_3_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[3] >> 12) & 0x3f; -} - -static bcmpkt_field_info_t -field_fmt_131_144_9_9_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 131; - info.maxbit = 144; - return info; -} - -static void -field_fmt_131_144_9_9_set(uint32_t *pmd, uint32_t *val) -{ - pmd[9] = (pmd[9] & 0xfffe0007) | ((*val & 0x3fff) << 3); -} - -static void -field_fmt_131_144_9_9_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[9] >> 3) & 0x3fff; -} - -static bcmpkt_field_info_t -field_fmt_13_13_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 13; - info.maxbit = 13; - return info; -} - -static void -field_fmt_13_13_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xffffdfff) | ((*val & 0x1) << 13); -} - -static void -field_fmt_13_13_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 13) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_145_159_9_9_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 145; - info.maxbit = 159; - return info; -} - -static void -field_fmt_145_159_9_9_set(uint32_t *pmd, uint32_t *val) -{ - pmd[9] = (pmd[9] & 0x1ffff) | (*val << 17); -} - -static void -field_fmt_145_159_9_9_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[9] >> 17) & 0x7fff; -} - -static bcmpkt_field_info_t -field_fmt_14_14_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 14; - info.maxbit = 14; - return info; -} - -static void -field_fmt_14_14_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xffffbfff) | ((*val & 0x1) << 14); -} - -static void -field_fmt_14_14_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 14) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_15_15_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 15; - info.maxbit = 15; - return info; -} - -static void -field_fmt_15_15_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xffff7fff) | ((*val & 0x1) << 15); -} - -static void -field_fmt_15_15_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 15) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_160_160_8_8_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 160; - info.maxbit = 160; - return info; -} - -static void -field_fmt_160_160_8_8_set(uint32_t *pmd, uint32_t *val) -{ - pmd[8] = (pmd[8] & 0xfffffffe) | (*val & 0x1); -} - -static void -field_fmt_160_160_8_8_get(uint32_t *pmd, uint32_t *val) -{ - *val = pmd[8] & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_161_161_8_8_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 161; - info.maxbit = 161; - return info; -} - -static void -field_fmt_161_161_8_8_set(uint32_t *pmd, uint32_t *val) -{ - pmd[8] = (pmd[8] & 0xfffffffd) | ((*val & 0x1) << 1); -} - -static void -field_fmt_161_161_8_8_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[8] >> 1) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_162_162_8_8_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 162; - info.maxbit = 162; - return info; -} - -static void -field_fmt_162_162_8_8_set(uint32_t *pmd, uint32_t *val) -{ - pmd[8] = (pmd[8] & 0xfffffffb) | ((*val & 0x1) << 2); -} - -static void -field_fmt_162_162_8_8_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[8] >> 2) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_163_163_8_8_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 163; - info.maxbit = 163; - return info; -} - -static void -field_fmt_163_163_8_8_set(uint32_t *pmd, uint32_t *val) -{ - pmd[8] = (pmd[8] & 0xfffffff7) | ((*val & 0x1) << 3); -} - -static void -field_fmt_163_163_8_8_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[8] >> 3) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_164_164_8_8_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 164; - info.maxbit = 164; - return info; -} - -static void -field_fmt_164_164_8_8_set(uint32_t *pmd, uint32_t *val) -{ - pmd[8] = (pmd[8] & 0xffffffef) | ((*val & 0x1) << 4); -} - -static void -field_fmt_164_164_8_8_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[8] >> 4) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_165_165_8_8_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 165; - info.maxbit = 165; - return info; -} - -static void -field_fmt_165_165_8_8_set(uint32_t *pmd, uint32_t *val) -{ - pmd[8] = (pmd[8] & 0xffffffdf) | ((*val & 0x1) << 5); -} - -static void -field_fmt_165_165_8_8_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[8] >> 5) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_166_168_8_8_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 166; - info.maxbit = 168; - return info; -} - -static void -field_fmt_166_168_8_8_set(uint32_t *pmd, uint32_t *val) -{ - pmd[8] = (pmd[8] & 0xfffffe3f) | ((*val & 0x7) << 6); -} - -static void -field_fmt_166_168_8_8_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[8] >> 6) & 0x7; -} - -static bcmpkt_field_info_t -field_fmt_166_171_8_8_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 166; - info.maxbit = 171; - return info; -} - -static void -field_fmt_166_171_8_8_set(uint32_t *pmd, uint32_t *val) -{ - pmd[8] = (pmd[8] & 0xfffff03f) | ((*val & 0x3f) << 6); -} - -static void -field_fmt_166_171_8_8_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[8] >> 6) & 0x3f; -} - -static bcmpkt_field_info_t -field_fmt_16_16_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 16; - info.maxbit = 16; - return info; -} - -static void -field_fmt_16_16_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xfffeffff) | ((*val & 0x1) << 16); -} - -static void -field_fmt_16_16_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 16) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_16_18_3_3_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 16; - info.maxbit = 18; - return info; -} - -static void -field_fmt_16_18_3_3_set(uint32_t *pmd, uint32_t *val) -{ - pmd[3] = (pmd[3] & 0xfff8ffff) | ((*val & 0x7) << 16); -} - -static void -field_fmt_16_18_3_3_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[3] >> 16) & 0x7; -} - -static bcmpkt_field_info_t -field_fmt_172_173_8_8_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 172; - info.maxbit = 173; - return info; -} - -static void -field_fmt_172_173_8_8_set(uint32_t *pmd, uint32_t *val) -{ - pmd[8] = (pmd[8] & 0xffffcfff) | ((*val & 0x3) << 12); -} - -static void -field_fmt_172_173_8_8_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[8] >> 12) & 0x3; -} - -static bcmpkt_field_info_t -field_fmt_174_174_8_8_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 174; - info.maxbit = 174; - return info; -} - -static void -field_fmt_174_174_8_8_set(uint32_t *pmd, uint32_t *val) -{ - pmd[8] = (pmd[8] & 0xffffbfff) | ((*val & 0x1) << 14); -} - -static void -field_fmt_174_174_8_8_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[8] >> 14) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_175_175_8_8_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 175; - info.maxbit = 175; - return info; -} - -static void -field_fmt_175_175_8_8_set(uint32_t *pmd, uint32_t *val) -{ - pmd[8] = (pmd[8] & 0xffff7fff) | ((*val & 0x1) << 15); -} - -static void -field_fmt_175_175_8_8_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[8] >> 15) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_176_184_8_8_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 176; - info.maxbit = 184; - return info; -} - -static void -field_fmt_176_184_8_8_set(uint32_t *pmd, uint32_t *val) -{ - pmd[8] = (pmd[8] & 0xfe00ffff) | ((*val & 0x1ff) << 16); -} - -static void -field_fmt_176_184_8_8_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[8] >> 16) & 0x1ff; -} - -static bcmpkt_field_info_t -field_fmt_176_187_8_8_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 176; - info.maxbit = 187; - return info; -} - -static void -field_fmt_176_187_8_8_set(uint32_t *pmd, uint32_t *val) -{ - pmd[8] = (pmd[8] & 0xf000ffff) | ((*val & 0xfff) << 16); -} - -static void -field_fmt_176_187_8_8_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[8] >> 16) & 0xfff; -} - -static bcmpkt_field_info_t -field_fmt_17_17_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 17; - info.maxbit = 17; - return info; -} - -static void -field_fmt_17_17_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xfffdffff) | ((*val & 0x1) << 17); -} - -static void -field_fmt_17_17_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 17) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_17_25_3_3_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 17; - info.maxbit = 25; - return info; -} - -static void -field_fmt_17_25_3_3_set(uint32_t *pmd, uint32_t *val) -{ - pmd[3] = (pmd[3] & 0xfc01ffff) | ((*val & 0x1ff) << 17); -} - -static void -field_fmt_17_25_3_3_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[3] >> 17) & 0x1ff; -} - -static bcmpkt_field_info_t -field_fmt_185_185_8_8_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 185; - info.maxbit = 185; - return info; -} - -static void -field_fmt_185_185_8_8_set(uint32_t *pmd, uint32_t *val) -{ - pmd[8] = (pmd[8] & 0xfdffffff) | ((*val & 0x1) << 25); -} - -static void -field_fmt_185_185_8_8_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[8] >> 25) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_188_190_8_8_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 188; - info.maxbit = 190; - return info; -} - -static void -field_fmt_188_190_8_8_set(uint32_t *pmd, uint32_t *val) -{ - pmd[8] = (pmd[8] & 0x8fffffff) | ((*val & 0x7) << 28); -} - -static void -field_fmt_188_190_8_8_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[8] >> 28) & 0x7; -} - -static bcmpkt_field_info_t -field_fmt_18_18_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 18; - info.maxbit = 18; - return info; -} - -static void -field_fmt_18_18_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xfffbffff) | ((*val & 0x1) << 18); -} - -static void -field_fmt_18_18_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 18) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_18_33_3_2_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 18; - info.maxbit = 33; - return info; -} - -static void -field_fmt_18_33_3_2_set(uint32_t *pmd, uint32_t *val) -{ - pmd[3] = (pmd[3] & 0x3ffff) | (*val << 18); - pmd[2] = (pmd[2] & 0xfffffffc) | ((*val >> 14) & 0x3); -} - -static void -field_fmt_18_33_3_2_get(uint32_t *pmd, uint32_t *val) -{ - *val = ((pmd[3] >> 18) | (pmd[2] << 14)) & 0xffff; -} - -static bcmpkt_field_info_t -field_fmt_191_191_8_8_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 191; - info.maxbit = 191; - return info; -} - -static void -field_fmt_191_191_8_8_set(uint32_t *pmd, uint32_t *val) -{ - pmd[8] = (pmd[8] & 0x7fffffff) | (*val << 31); -} - -static void -field_fmt_191_191_8_8_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[8] >> 31) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_192_194_7_7_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 192; - info.maxbit = 194; - return info; -} - -static void -field_fmt_192_194_7_7_set(uint32_t *pmd, uint32_t *val) -{ - pmd[7] = (pmd[7] & 0xfffffff8) | (*val & 0x7); -} - -static void -field_fmt_192_194_7_7_get(uint32_t *pmd, uint32_t *val) -{ - *val = pmd[7] & 0x7; -} - -static bcmpkt_field_info_t -field_fmt_195_206_7_7_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 195; - info.maxbit = 206; - return info; -} - -static void -field_fmt_195_206_7_7_set(uint32_t *pmd, uint32_t *val) -{ - pmd[7] = (pmd[7] & 0xffff8007) | ((*val & 0xfff) << 3); -} - -static void -field_fmt_195_206_7_7_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[7] >> 3) & 0xfff; -} - -static bcmpkt_field_info_t -field_fmt_19_19_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 19; - info.maxbit = 19; - return info; -} - -static void -field_fmt_19_19_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xfff7ffff) | ((*val & 0x1) << 19); -} - -static void -field_fmt_19_19_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 19) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_19_19_3_3_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 19; - info.maxbit = 19; - return info; -} - -static void -field_fmt_19_19_3_3_set(uint32_t *pmd, uint32_t *val) -{ - pmd[3] = (pmd[3] & 0xfff7ffff) | ((*val & 0x1) << 19); -} - -static void -field_fmt_19_19_3_3_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[3] >> 19) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_1_1_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 1; - info.maxbit = 1; - return info; -} - -static void -field_fmt_1_1_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xfffffffd) | ((*val & 0x1) << 1); -} - -static void -field_fmt_1_1_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 1) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_207_221_7_7_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 207; - info.maxbit = 221; - return info; -} - -static void -field_fmt_207_221_7_7_set(uint32_t *pmd, uint32_t *val) -{ - pmd[7] = (pmd[7] & 0xc0007fff) | ((*val & 0x7fff) << 15); -} - -static void -field_fmt_207_221_7_7_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[7] >> 15) & 0x7fff; -} - -static bcmpkt_field_info_t -field_fmt_20_20_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 20; - info.maxbit = 20; - return info; -} - -static void -field_fmt_20_20_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xffefffff) | ((*val & 0x1) << 20); -} - -static void -field_fmt_20_20_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 20) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_21_21_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 21; - info.maxbit = 21; - return info; -} - -static void -field_fmt_21_21_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xffdfffff) | ((*val & 0x1) << 21); -} - -static void -field_fmt_21_21_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 21) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_21_21_3_3_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 21; - info.maxbit = 21; - return info; -} - -static void -field_fmt_21_21_3_3_set(uint32_t *pmd, uint32_t *val) -{ - pmd[3] = (pmd[3] & 0xffdfffff) | ((*val & 0x1) << 21); -} - -static void -field_fmt_21_21_3_3_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[3] >> 21) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_222_222_7_7_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 222; - info.maxbit = 222; - return info; -} - -static void -field_fmt_222_222_7_7_set(uint32_t *pmd, uint32_t *val) -{ - pmd[7] = (pmd[7] & 0xbfffffff) | ((*val & 0x1) << 30); -} - -static void -field_fmt_222_222_7_7_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[7] >> 30) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_223_242_7_6_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 223; - info.maxbit = 242; - return info; -} - -static void -field_fmt_223_242_7_6_set(uint32_t *pmd, uint32_t *val) -{ - pmd[7] = (pmd[7] & 0x7fffffff) | (*val << 31); - pmd[6] = (pmd[6] & 0xfff80000) | ((*val >> 1) & 0x7ffff); -} - -static void -field_fmt_223_242_7_6_get(uint32_t *pmd, uint32_t *val) -{ - *val = ((pmd[7] >> 31) | (pmd[6] << 1)) & 0xfffff; -} - -static bcmpkt_field_info_t -field_fmt_22_22_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 22; - info.maxbit = 22; - return info; -} - -static void -field_fmt_22_22_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xffbfffff) | ((*val & 0x1) << 22); -} - -static void -field_fmt_22_22_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 22) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_22_22_3_3_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 22; - info.maxbit = 22; - return info; -} - -static void -field_fmt_22_22_3_3_set(uint32_t *pmd, uint32_t *val) -{ - pmd[3] = (pmd[3] & 0xffbfffff) | ((*val & 0x1) << 22); -} - -static void -field_fmt_22_22_3_3_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[3] >> 22) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_23_23_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 23; - info.maxbit = 23; - return info; -} - -static void -field_fmt_23_23_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xff7fffff) | ((*val & 0x1) << 23); -} - -static void -field_fmt_23_23_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 23) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_243_243_6_6_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 243; - info.maxbit = 243; - return info; -} - -static void -field_fmt_243_243_6_6_set(uint32_t *pmd, uint32_t *val) -{ - pmd[6] = (pmd[6] & 0xfff7ffff) | ((*val & 0x1) << 19); -} - -static void -field_fmt_243_243_6_6_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[6] >> 19) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_244_253_6_6_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 244; - info.maxbit = 253; - return info; -} - -static void -field_fmt_244_253_6_6_set(uint32_t *pmd, uint32_t *val) -{ - pmd[6] = (pmd[6] & 0xc00fffff) | ((*val & 0x3ff) << 20); -} - -static void -field_fmt_244_253_6_6_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[6] >> 20) & 0x3ff; -} - -static bcmpkt_field_info_t -field_fmt_24_24_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 24; - info.maxbit = 24; - return info; -} - -static void -field_fmt_24_24_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xfeffffff) | ((*val & 0x1) << 24); -} - -static void -field_fmt_24_24_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 24) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_24_36_3_2_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 24; - info.maxbit = 36; - return info; -} - -static void -field_fmt_24_36_3_2_set(uint32_t *pmd, uint32_t *val) -{ - pmd[3] = (pmd[3] & 0xffffff) | (*val << 24); - pmd[2] = (pmd[2] & 0xffffffe0) | ((*val >> 8) & 0x1f); -} - -static void -field_fmt_24_36_3_2_get(uint32_t *pmd, uint32_t *val) -{ - *val = ((pmd[3] >> 24) | (pmd[2] << 8)) & 0x1fff; -} - -static bcmpkt_field_info_t -field_fmt_254_254_6_6_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 254; - info.maxbit = 254; - return info; -} - -static void -field_fmt_254_254_6_6_set(uint32_t *pmd, uint32_t *val) -{ - pmd[6] = (pmd[6] & 0xbfffffff) | ((*val & 0x1) << 30); -} - -static void -field_fmt_254_254_6_6_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[6] >> 30) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_255_286_6_5_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 255; - info.maxbit = 286; - return info; -} - -static void -field_fmt_255_286_6_5_set(uint32_t *pmd, uint32_t *val) -{ - pmd[6] = (pmd[6] & 0x7fffffff) | (*val << 31); - pmd[5] = (pmd[5] & 0x80000000) | ((*val >> 1) & 0x7fffffff); -} - -static void -field_fmt_255_286_6_5_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[6] >> 31) | (pmd[5] << 1); -} - -static bcmpkt_field_info_t -field_fmt_25_25_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 25; - info.maxbit = 25; - return info; -} - -static void -field_fmt_25_25_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xfdffffff) | ((*val & 0x1) << 25); -} - -static void -field_fmt_25_25_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 25) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_26_26_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 26; - info.maxbit = 26; - return info; -} - -static void -field_fmt_26_26_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xfbffffff) | ((*val & 0x1) << 26); -} - -static void -field_fmt_26_26_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 26) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_26_26_3_3_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 26; - info.maxbit = 26; - return info; -} - -static void -field_fmt_26_26_3_3_set(uint32_t *pmd, uint32_t *val) -{ - pmd[3] = (pmd[3] & 0xfbffffff) | ((*val & 0x1) << 26); -} - -static void -field_fmt_26_26_3_3_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[3] >> 26) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_27_27_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 27; - info.maxbit = 27; - return info; -} - -static void -field_fmt_27_27_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xf7ffffff) | ((*val & 0x1) << 27); -} - -static void -field_fmt_27_27_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 27) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_27_42_3_2_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 27; - info.maxbit = 42; - return info; -} - -static void -field_fmt_27_42_3_2_set(uint32_t *pmd, uint32_t *val) -{ - pmd[3] = (pmd[3] & 0x7ffffff) | (*val << 27); - pmd[2] = (pmd[2] & 0xfffff800) | ((*val >> 5) & 0x7ff); -} - -static void -field_fmt_27_42_3_2_get(uint32_t *pmd, uint32_t *val) -{ - *val = ((pmd[3] >> 27) | (pmd[2] << 5)) & 0xffff; -} - -static bcmpkt_field_info_t -field_fmt_287_302_5_4_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 287; - info.maxbit = 302; - return info; -} - -static void -field_fmt_287_302_5_4_set(uint32_t *pmd, uint32_t *val) -{ - pmd[5] = (pmd[5] & 0x7fffffff) | (*val << 31); - pmd[4] = (pmd[4] & 0xffff8000) | ((*val >> 1) & 0x7fff); -} - -static void -field_fmt_287_302_5_4_get(uint32_t *pmd, uint32_t *val) -{ - *val = ((pmd[5] >> 31) | (pmd[4] << 1)) & 0xffff; -} - -static bcmpkt_field_info_t -field_fmt_28_28_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 28; - info.maxbit = 28; - return info; -} - -static void -field_fmt_28_28_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xefffffff) | ((*val & 0x1) << 28); -} - -static void -field_fmt_28_28_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 28) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_29_29_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 29; - info.maxbit = 29; - return info; -} - -static void -field_fmt_29_29_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xdfffffff) | ((*val & 0x1) << 29); -} - -static void -field_fmt_29_29_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 29) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_2_2_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 2; - info.maxbit = 2; - return info; -} - -static void -field_fmt_2_2_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xfffffffb) | ((*val & 0x1) << 2); -} - -static void -field_fmt_2_2_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 2) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_303_303_4_4_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 303; - info.maxbit = 303; - return info; -} - -static void -field_fmt_303_303_4_4_set(uint32_t *pmd, uint32_t *val) -{ - pmd[4] = (pmd[4] & 0xffff7fff) | ((*val & 0x1) << 15); -} - -static void -field_fmt_303_303_4_4_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[4] >> 15) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_304_307_4_4_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 304; - info.maxbit = 307; - return info; -} - -static void -field_fmt_304_307_4_4_set(uint32_t *pmd, uint32_t *val) -{ - pmd[4] = (pmd[4] & 0xfff0ffff) | ((*val & 0xf) << 16); -} - -static void -field_fmt_304_307_4_4_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[4] >> 16) & 0xf; -} - -static bcmpkt_field_info_t -field_fmt_308_308_4_4_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 308; - info.maxbit = 308; - return info; -} - -static void -field_fmt_308_308_4_4_set(uint32_t *pmd, uint32_t *val) -{ - pmd[4] = (pmd[4] & 0xffefffff) | ((*val & 0x1) << 20); -} - -static void -field_fmt_308_308_4_4_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[4] >> 20) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_309_309_4_4_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 309; - info.maxbit = 309; - return info; -} - -static void -field_fmt_309_309_4_4_set(uint32_t *pmd, uint32_t *val) -{ - pmd[4] = (pmd[4] & 0xffdfffff) | ((*val & 0x1) << 21); -} - -static void -field_fmt_309_309_4_4_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[4] >> 21) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_30_30_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 30; - info.maxbit = 30; - return info; -} - -static void -field_fmt_30_30_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xbfffffff) | ((*val & 0x1) << 30); -} - -static void -field_fmt_30_30_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 30) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_310_311_4_4_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 310; - info.maxbit = 311; - return info; -} - -static void -field_fmt_310_311_4_4_set(uint32_t *pmd, uint32_t *val) -{ - pmd[4] = (pmd[4] & 0xff3fffff) | ((*val & 0x3) << 22); -} - -static void -field_fmt_310_311_4_4_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[4] >> 22) & 0x3; -} - -static bcmpkt_field_info_t -field_fmt_312_318_4_4_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 312; - info.maxbit = 318; - return info; -} - -static void -field_fmt_312_318_4_4_set(uint32_t *pmd, uint32_t *val) -{ - pmd[4] = (pmd[4] & 0x80ffffff) | ((*val & 0x7f) << 24); -} - -static void -field_fmt_312_318_4_4_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[4] >> 24) & 0x7f; -} - -static bcmpkt_field_info_t -field_fmt_31_31_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 31; - info.maxbit = 31; - return info; -} - -static void -field_fmt_31_31_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0x7fffffff) | (*val << 31); -} - -static void -field_fmt_31_31_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 31) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_320_447_3_0_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 320; - info.maxbit = 447; - return info; -} - -static void -field_fmt_320_447_3_0_set(uint32_t *pmd, uint32_t *val) -{ - pmd[3] = val[0]; - pmd[2] = val[1]; - pmd[1] = val[2]; - pmd[0] = val[3]; -} - -static void -field_fmt_320_447_3_0_get(uint32_t *pmd, uint32_t *val) -{ - val[0] = pmd[3]; - val[1] = pmd[2]; - val[2] = pmd[1]; - val[3] = pmd[0]; -} - -static bcmpkt_field_info_t -field_fmt_32_32_12_12_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 32; - info.maxbit = 32; - return info; -} - -static void -field_fmt_32_32_12_12_set(uint32_t *pmd, uint32_t *val) -{ - pmd[12] = (pmd[12] & 0xfffffffe) | (*val & 0x1); -} - -static void -field_fmt_32_32_12_12_get(uint32_t *pmd, uint32_t *val) -{ - *val = pmd[12] & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_33_33_12_12_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 33; - info.maxbit = 33; - return info; -} - -static void -field_fmt_33_33_12_12_set(uint32_t *pmd, uint32_t *val) -{ - pmd[12] = (pmd[12] & 0xfffffffd) | ((*val & 0x1) << 1); -} - -static void -field_fmt_33_33_12_12_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[12] >> 1) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_34_34_12_12_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 34; - info.maxbit = 34; - return info; -} - -static void -field_fmt_34_34_12_12_set(uint32_t *pmd, uint32_t *val) -{ - pmd[12] = (pmd[12] & 0xfffffffb) | ((*val & 0x1) << 2); -} - -static void -field_fmt_34_34_12_12_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[12] >> 2) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_34_37_2_2_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 34; - info.maxbit = 37; - return info; -} - -static void -field_fmt_34_37_2_2_set(uint32_t *pmd, uint32_t *val) -{ - pmd[2] = (pmd[2] & 0xffffffc3) | ((*val & 0xf) << 2); -} - -static void -field_fmt_34_37_2_2_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[2] >> 2) & 0xf; -} - -static bcmpkt_field_info_t -field_fmt_35_35_12_12_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 35; - info.maxbit = 35; - return info; -} - -static void -field_fmt_35_35_12_12_set(uint32_t *pmd, uint32_t *val) -{ - pmd[12] = (pmd[12] & 0xfffffff7) | ((*val & 0x1) << 3); -} - -static void -field_fmt_35_35_12_12_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[12] >> 3) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_36_36_12_12_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 36; - info.maxbit = 36; - return info; -} - -static void -field_fmt_36_36_12_12_set(uint32_t *pmd, uint32_t *val) -{ - pmd[12] = (pmd[12] & 0xffffffef) | ((*val & 0x1) << 4); -} - -static void -field_fmt_36_36_12_12_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[12] >> 4) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_37_37_12_12_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 37; - info.maxbit = 37; - return info; -} - -static void -field_fmt_37_37_12_12_set(uint32_t *pmd, uint32_t *val) -{ - pmd[12] = (pmd[12] & 0xffffffdf) | ((*val & 0x1) << 5); -} - -static void -field_fmt_37_37_12_12_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[12] >> 5) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_37_46_2_2_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 37; - info.maxbit = 46; - return info; -} - -static void -field_fmt_37_46_2_2_set(uint32_t *pmd, uint32_t *val) -{ - pmd[2] = (pmd[2] & 0xffff801f) | ((*val & 0x3ff) << 5); -} - -static void -field_fmt_37_46_2_2_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[2] >> 5) & 0x3ff; -} - -static bcmpkt_field_info_t -field_fmt_38_38_12_12_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 38; - info.maxbit = 38; - return info; -} - -static void -field_fmt_38_38_12_12_set(uint32_t *pmd, uint32_t *val) -{ - pmd[12] = (pmd[12] & 0xffffffbf) | ((*val & 0x1) << 6); -} - -static void -field_fmt_38_38_12_12_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[12] >> 6) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_38_38_2_2_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 38; - info.maxbit = 38; - return info; -} - -static void -field_fmt_38_38_2_2_set(uint32_t *pmd, uint32_t *val) -{ - pmd[2] = (pmd[2] & 0xffffffbf) | ((*val & 0x1) << 6); -} - -static void -field_fmt_38_38_2_2_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[2] >> 6) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_39_39_12_12_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 39; - info.maxbit = 39; - return info; -} - -static void -field_fmt_39_39_12_12_set(uint32_t *pmd, uint32_t *val) -{ - pmd[12] = (pmd[12] & 0xffffff7f) | ((*val & 0x1) << 7); -} - -static void -field_fmt_39_39_12_12_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[12] >> 7) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_39_39_2_2_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 39; - info.maxbit = 39; - return info; -} - -static void -field_fmt_39_39_2_2_set(uint32_t *pmd, uint32_t *val) -{ - pmd[2] = (pmd[2] & 0xffffff7f) | ((*val & 0x1) << 7); -} - -static void -field_fmt_39_39_2_2_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[2] >> 7) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_3_3_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 3; - info.maxbit = 3; - return info; -} - -static void -field_fmt_3_3_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xfffffff7) | ((*val & 0x1) << 3); -} - -static void -field_fmt_3_3_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 3) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_40_40_12_12_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 40; - info.maxbit = 40; - return info; -} - -static void -field_fmt_40_40_12_12_set(uint32_t *pmd, uint32_t *val) -{ - pmd[12] = (pmd[12] & 0xfffffeff) | ((*val & 0x1) << 8); -} - -static void -field_fmt_40_40_12_12_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[12] >> 8) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_40_43_2_2_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 40; - info.maxbit = 43; - return info; -} - -static void -field_fmt_40_43_2_2_set(uint32_t *pmd, uint32_t *val) -{ - pmd[2] = (pmd[2] & 0xfffff0ff) | ((*val & 0xf) << 8); -} - -static void -field_fmt_40_43_2_2_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[2] >> 8) & 0xf; -} - -static bcmpkt_field_info_t -field_fmt_41_41_12_12_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 41; - info.maxbit = 41; - return info; -} - -static void -field_fmt_41_41_12_12_set(uint32_t *pmd, uint32_t *val) -{ - pmd[12] = (pmd[12] & 0xfffffdff) | ((*val & 0x1) << 9); -} - -static void -field_fmt_41_41_12_12_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[12] >> 9) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_42_42_12_12_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 42; - info.maxbit = 42; - return info; -} - -static void -field_fmt_42_42_12_12_set(uint32_t *pmd, uint32_t *val) -{ - pmd[12] = (pmd[12] & 0xfffffbff) | ((*val & 0x1) << 10); -} - -static void -field_fmt_42_42_12_12_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[12] >> 10) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_43_43_12_12_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 43; - info.maxbit = 43; - return info; -} - -static void -field_fmt_43_43_12_12_set(uint32_t *pmd, uint32_t *val) -{ - pmd[12] = (pmd[12] & 0xfffff7ff) | ((*val & 0x1) << 11); -} - -static void -field_fmt_43_43_12_12_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[12] >> 11) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_43_46_2_2_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 43; - info.maxbit = 46; - return info; -} - -static void -field_fmt_43_46_2_2_set(uint32_t *pmd, uint32_t *val) -{ - pmd[2] = (pmd[2] & 0xffff87ff) | ((*val & 0xf) << 11); -} - -static void -field_fmt_43_46_2_2_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[2] >> 11) & 0xf; -} - -static bcmpkt_field_info_t -field_fmt_44_44_12_12_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 44; - info.maxbit = 44; - return info; -} - -static void -field_fmt_44_44_12_12_set(uint32_t *pmd, uint32_t *val) -{ - pmd[12] = (pmd[12] & 0xffffefff) | ((*val & 0x1) << 12); -} - -static void -field_fmt_44_44_12_12_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[12] >> 12) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_44_46_2_2_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 44; - info.maxbit = 46; - return info; -} - -static void -field_fmt_44_46_2_2_set(uint32_t *pmd, uint32_t *val) -{ - pmd[2] = (pmd[2] & 0xffff8fff) | ((*val & 0x7) << 12); -} - -static void -field_fmt_44_46_2_2_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[2] >> 12) & 0x7; -} - -static bcmpkt_field_info_t -field_fmt_45_45_12_12_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 45; - info.maxbit = 45; - return info; -} - -static void -field_fmt_45_45_12_12_set(uint32_t *pmd, uint32_t *val) -{ - pmd[12] = (pmd[12] & 0xffffdfff) | ((*val & 0x1) << 13); -} - -static void -field_fmt_45_45_12_12_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[12] >> 13) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_46_46_12_12_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 46; - info.maxbit = 46; - return info; -} - -static void -field_fmt_46_46_12_12_set(uint32_t *pmd, uint32_t *val) -{ - pmd[12] = (pmd[12] & 0xffffbfff) | ((*val & 0x1) << 14); -} - -static void -field_fmt_46_46_12_12_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[12] >> 14) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_47_47_12_12_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 47; - info.maxbit = 47; - return info; -} - -static void -field_fmt_47_47_12_12_set(uint32_t *pmd, uint32_t *val) -{ - pmd[12] = (pmd[12] & 0xffff7fff) | ((*val & 0x1) << 15); -} - -static void -field_fmt_47_47_12_12_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[12] >> 15) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_47_47_2_2_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 47; - info.maxbit = 47; - return info; -} - -static void -field_fmt_47_47_2_2_set(uint32_t *pmd, uint32_t *val) -{ - pmd[2] = (pmd[2] & 0xffff7fff) | ((*val & 0x1) << 15); -} - -static void -field_fmt_47_47_2_2_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[2] >> 15) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_47_48_2_2_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 47; - info.maxbit = 48; - return info; -} - -static void -field_fmt_47_48_2_2_set(uint32_t *pmd, uint32_t *val) -{ - pmd[2] = (pmd[2] & 0xfffe7fff) | ((*val & 0x3) << 15); -} - -static void -field_fmt_47_48_2_2_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[2] >> 15) & 0x3; -} - -static bcmpkt_field_info_t -field_fmt_48_48_12_12_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 48; - info.maxbit = 48; - return info; -} - -static void -field_fmt_48_48_12_12_set(uint32_t *pmd, uint32_t *val) -{ - pmd[12] = (pmd[12] & 0xfffeffff) | ((*val & 0x1) << 16); -} - -static void -field_fmt_48_48_12_12_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[12] >> 16) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_48_48_2_2_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 48; - info.maxbit = 48; - return info; -} - -static void -field_fmt_48_48_2_2_set(uint32_t *pmd, uint32_t *val) -{ - pmd[2] = (pmd[2] & 0xfffeffff) | ((*val & 0x1) << 16); -} - -static void -field_fmt_48_48_2_2_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[2] >> 16) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_49_49_12_12_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 49; - info.maxbit = 49; - return info; -} - -static void -field_fmt_49_49_12_12_set(uint32_t *pmd, uint32_t *val) -{ - pmd[12] = (pmd[12] & 0xfffdffff) | ((*val & 0x1) << 17); -} - -static void -field_fmt_49_49_12_12_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[12] >> 17) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_49_50_2_2_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 49; - info.maxbit = 50; - return info; -} - -static void -field_fmt_49_50_2_2_set(uint32_t *pmd, uint32_t *val) -{ - pmd[2] = (pmd[2] & 0xfff9ffff) | ((*val & 0x3) << 17); -} - -static void -field_fmt_49_50_2_2_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[2] >> 17) & 0x3; -} - -static bcmpkt_field_info_t -field_fmt_49_52_2_2_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 49; - info.maxbit = 52; - return info; -} - -static void -field_fmt_49_52_2_2_set(uint32_t *pmd, uint32_t *val) -{ - pmd[2] = (pmd[2] & 0xffe1ffff) | ((*val & 0xf) << 17); -} - -static void -field_fmt_49_52_2_2_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[2] >> 17) & 0xf; -} - -static bcmpkt_field_info_t -field_fmt_4_4_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 4; - info.maxbit = 4; - return info; -} - -static void -field_fmt_4_4_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xffffffef) | ((*val & 0x1) << 4); -} - -static void -field_fmt_4_4_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 4) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_50_50_12_12_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 50; - info.maxbit = 50; - return info; -} - -static void -field_fmt_50_50_12_12_set(uint32_t *pmd, uint32_t *val) -{ - pmd[12] = (pmd[12] & 0xfffbffff) | ((*val & 0x1) << 18); -} - -static void -field_fmt_50_50_12_12_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[12] >> 18) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_51_51_2_2_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 51; - info.maxbit = 51; - return info; -} - -static void -field_fmt_51_51_2_2_set(uint32_t *pmd, uint32_t *val) -{ - pmd[2] = (pmd[2] & 0xfff7ffff) | ((*val & 0x1) << 19); -} - -static void -field_fmt_51_51_2_2_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[2] >> 19) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_52_59_2_2_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 52; - info.maxbit = 59; - return info; -} - -static void -field_fmt_52_59_2_2_set(uint32_t *pmd, uint32_t *val) -{ - pmd[2] = (pmd[2] & 0xf00fffff) | ((*val & 0xff) << 20); -} - -static void -field_fmt_52_59_2_2_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[2] >> 20) & 0xff; -} - -static bcmpkt_field_info_t -field_fmt_53_54_2_2_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 53; - info.maxbit = 54; - return info; -} - -static void -field_fmt_53_54_2_2_set(uint32_t *pmd, uint32_t *val) -{ - pmd[2] = (pmd[2] & 0xff9fffff) | ((*val & 0x3) << 21); -} - -static void -field_fmt_53_54_2_2_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[2] >> 21) & 0x3; -} - -static bcmpkt_field_info_t -field_fmt_55_58_2_2_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 55; - info.maxbit = 58; - return info; -} - -static void -field_fmt_55_58_2_2_set(uint32_t *pmd, uint32_t *val) -{ - pmd[2] = (pmd[2] & 0xf87fffff) | ((*val & 0xf) << 23); -} - -static void -field_fmt_55_58_2_2_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[2] >> 23) & 0xf; -} - -static bcmpkt_field_info_t -field_fmt_59_59_2_2_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 59; - info.maxbit = 59; - return info; -} - -static void -field_fmt_59_59_2_2_set(uint32_t *pmd, uint32_t *val) -{ - pmd[2] = (pmd[2] & 0xf7ffffff) | ((*val & 0x1) << 27); -} - -static void -field_fmt_59_59_2_2_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[2] >> 27) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_5_5_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 5; - info.maxbit = 5; - return info; -} - -static void -field_fmt_5_5_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xffffffdf) | ((*val & 0x1) << 5); -} - -static void -field_fmt_5_5_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 5) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_60_60_2_2_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 60; - info.maxbit = 60; - return info; -} - -static void -field_fmt_60_60_2_2_set(uint32_t *pmd, uint32_t *val) -{ - pmd[2] = (pmd[2] & 0xefffffff) | ((*val & 0x1) << 28); -} - -static void -field_fmt_60_60_2_2_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[2] >> 28) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_60_62_2_2_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 60; - info.maxbit = 62; - return info; -} - -static void -field_fmt_60_62_2_2_set(uint32_t *pmd, uint32_t *val) -{ - pmd[2] = (pmd[2] & 0x8fffffff) | ((*val & 0x7) << 28); -} - -static void -field_fmt_60_62_2_2_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[2] >> 28) & 0x7; -} - -static bcmpkt_field_info_t -field_fmt_61_61_2_2_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 61; - info.maxbit = 61; - return info; -} - -static void -field_fmt_61_61_2_2_set(uint32_t *pmd, uint32_t *val) -{ - pmd[2] = (pmd[2] & 0xdfffffff) | ((*val & 0x1) << 29); -} - -static void -field_fmt_61_61_2_2_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[2] >> 29) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_62_62_2_2_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 62; - info.maxbit = 62; - return info; -} - -static void -field_fmt_62_62_2_2_set(uint32_t *pmd, uint32_t *val) -{ - pmd[2] = (pmd[2] & 0xbfffffff) | ((*val & 0x1) << 30); -} - -static void -field_fmt_62_62_2_2_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[2] >> 30) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_63_63_2_2_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 63; - info.maxbit = 63; - return info; -} - -static void -field_fmt_63_63_2_2_set(uint32_t *pmd, uint32_t *val) -{ - pmd[2] = (pmd[2] & 0x7fffffff) | (*val << 31); -} - -static void -field_fmt_63_63_2_2_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[2] >> 31) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_64_64_1_1_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 64; - info.maxbit = 64; - return info; -} - -static void -field_fmt_64_64_1_1_set(uint32_t *pmd, uint32_t *val) -{ - pmd[1] = (pmd[1] & 0xfffffffe) | (*val & 0x1); -} - -static void -field_fmt_64_64_1_1_get(uint32_t *pmd, uint32_t *val) -{ - *val = pmd[1] & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_64_67_11_11_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 64; - info.maxbit = 67; - return info; -} - -static void -field_fmt_64_67_11_11_set(uint32_t *pmd, uint32_t *val) -{ - pmd[11] = (pmd[11] & 0xfffffff0) | (*val & 0xf); -} - -static void -field_fmt_64_67_11_11_get(uint32_t *pmd, uint32_t *val) -{ - *val = pmd[11] & 0xf; -} - -static bcmpkt_field_info_t -field_fmt_65_77_1_1_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 65; - info.maxbit = 77; - return info; -} - -static void -field_fmt_65_77_1_1_set(uint32_t *pmd, uint32_t *val) -{ - pmd[1] = (pmd[1] & 0xffffc001) | ((*val & 0x1fff) << 1); -} - -static void -field_fmt_65_77_1_1_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[1] >> 1) & 0x1fff; -} - -static bcmpkt_field_info_t -field_fmt_68_79_11_11_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 68; - info.maxbit = 79; - return info; -} - -static void -field_fmt_68_79_11_11_set(uint32_t *pmd, uint32_t *val) -{ - pmd[11] = (pmd[11] & 0xffff000f) | ((*val & 0xfff) << 4); -} - -static void -field_fmt_68_79_11_11_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[11] >> 4) & 0xfff; -} - -static bcmpkt_field_info_t -field_fmt_6_6_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 6; - info.maxbit = 6; - return info; -} - -static void -field_fmt_6_6_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xffffffbf) | ((*val & 0x1) << 6); -} - -static void -field_fmt_6_6_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 6) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_78_90_1_1_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 78; - info.maxbit = 90; - return info; -} - -static void -field_fmt_78_90_1_1_set(uint32_t *pmd, uint32_t *val) -{ - pmd[1] = (pmd[1] & 0xf8003fff) | ((*val & 0x1fff) << 14); -} - -static void -field_fmt_78_90_1_1_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[1] >> 14) & 0x1fff; -} - -static bcmpkt_field_info_t -field_fmt_7_7_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 7; - info.maxbit = 7; - return info; -} - -static void -field_fmt_7_7_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xffffff7f) | ((*val & 0x1) << 7); -} - -static void -field_fmt_7_7_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 7) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_80_81_11_11_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 80; - info.maxbit = 81; - return info; -} - -static void -field_fmt_80_81_11_11_set(uint32_t *pmd, uint32_t *val) -{ - pmd[11] = (pmd[11] & 0xfffcffff) | ((*val & 0x3) << 16); -} - -static void -field_fmt_80_81_11_11_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[11] >> 16) & 0x3; -} - -static bcmpkt_field_info_t -field_fmt_80_83_11_11_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 80; - info.maxbit = 83; - return info; -} - -static void -field_fmt_80_83_11_11_set(uint32_t *pmd, uint32_t *val) -{ - pmd[11] = (pmd[11] & 0xfff0ffff) | ((*val & 0xf) << 16); -} - -static void -field_fmt_80_83_11_11_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[11] >> 16) & 0xf; -} - -static bcmpkt_field_info_t -field_fmt_81_84_1_1_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 81; - info.maxbit = 84; - return info; -} - -static void -field_fmt_81_84_1_1_set(uint32_t *pmd, uint32_t *val) -{ - pmd[1] = (pmd[1] & 0xffe1ffff) | ((*val & 0xf) << 17); -} - -static void -field_fmt_81_84_1_1_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[1] >> 17) & 0xf; -} - -static bcmpkt_field_info_t -field_fmt_82_89_11_11_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 82; - info.maxbit = 89; - return info; -} - -static void -field_fmt_82_89_11_11_set(uint32_t *pmd, uint32_t *val) -{ - pmd[11] = (pmd[11] & 0xfc03ffff) | ((*val & 0xff) << 18); -} - -static void -field_fmt_82_89_11_11_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[11] >> 18) & 0xff; -} - -static bcmpkt_field_info_t -field_fmt_85_88_1_1_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 85; - info.maxbit = 88; - return info; -} - -static void -field_fmt_85_88_1_1_set(uint32_t *pmd, uint32_t *val) -{ - pmd[1] = (pmd[1] & 0xfe1fffff) | ((*val & 0xf) << 21); -} - -static void -field_fmt_85_88_1_1_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[1] >> 21) & 0xf; -} - -static bcmpkt_field_info_t -field_fmt_85_92_1_1_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 85; - info.maxbit = 92; - return info; -} - -static void -field_fmt_85_92_1_1_set(uint32_t *pmd, uint32_t *val) -{ - pmd[1] = (pmd[1] & 0xe01fffff) | ((*val & 0xff) << 21); -} - -static void -field_fmt_85_92_1_1_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[1] >> 21) & 0xff; -} - -static bcmpkt_field_info_t -field_fmt_89_90_1_1_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 89; - info.maxbit = 90; - return info; -} - -static void -field_fmt_89_90_1_1_set(uint32_t *pmd, uint32_t *val) -{ - pmd[1] = (pmd[1] & 0xf9ffffff) | ((*val & 0x3) << 25); -} - -static void -field_fmt_89_90_1_1_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[1] >> 25) & 0x3; -} - -static bcmpkt_field_info_t -field_fmt_8_8_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 8; - info.maxbit = 8; - return info; -} - -static void -field_fmt_8_8_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xfffffeff) | ((*val & 0x1) << 8); -} - -static void -field_fmt_8_8_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 8) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_8_8_3_3_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 8; - info.maxbit = 8; - return info; -} - -static void -field_fmt_8_8_3_3_set(uint32_t *pmd, uint32_t *val) -{ - pmd[3] = (pmd[3] & 0xfffffeff) | ((*val & 0x1) << 8); -} - -static void -field_fmt_8_8_3_3_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[3] >> 8) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_90_95_11_11_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 90; - info.maxbit = 95; - return info; -} - -static void -field_fmt_90_95_11_11_set(uint32_t *pmd, uint32_t *val) -{ - pmd[11] = (pmd[11] & 0x3ffffff) | (*val << 26); -} - -static void -field_fmt_90_95_11_11_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[11] >> 26) & 0x3f; -} - -static bcmpkt_field_info_t -field_fmt_91_91_1_1_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 91; - info.maxbit = 91; - return info; -} - -static void -field_fmt_91_91_1_1_set(uint32_t *pmd, uint32_t *val) -{ - pmd[1] = (pmd[1] & 0xf7ffffff) | ((*val & 0x1) << 27); -} - -static void -field_fmt_91_91_1_1_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[1] >> 27) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_91_92_1_1_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 91; - info.maxbit = 92; - return info; -} - -static void -field_fmt_91_92_1_1_set(uint32_t *pmd, uint32_t *val) -{ - pmd[1] = (pmd[1] & 0xe7ffffff) | ((*val & 0x3) << 27); -} - -static void -field_fmt_91_92_1_1_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[1] >> 27) & 0x3; -} - -static bcmpkt_field_info_t -field_fmt_9_9_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 9; - info.maxbit = 9; - return info; -} - -static void -field_fmt_9_9_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xfffffdff) | ((*val & 0x1) << 9); -} - -static void -field_fmt_9_9_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 9) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_9_9_3_3_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 9; - info.maxbit = 9; - return info; -} - -static void -field_fmt_9_9_3_3_set(uint32_t *pmd, uint32_t *val) -{ - pmd[3] = (pmd[3] & 0xfffffdff) | ((*val & 0x1) << 9); -} - -static void -field_fmt_9_9_3_3_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[3] >> 9) & 0x1; -} - -static const shr_enum_map_t bcm78910_a0_rxpmd_reason_type_names[] = -{ - BCM78910_A0_RXPMD_REASON_TYPE_NAME_MAP_INIT -}; - -static bcmpkt_pmd_field_t bcm78910_a0_rxpmd_fields[BCM78910_A0_RXPMD_COUNT] = { - {"REASON",2, field_fmt_0_63_13_12_info, field_fmt_0_63_13_12_set, field_fmt_0_63_13_12_get, NULL, 0}, - {"REASON_TYPE",1, field_fmt_64_67_11_11_info, field_fmt_64_67_11_11_set, field_fmt_64_67_11_11_get, bcm78910_a0_rxpmd_reason_type_names, 0}, - {"I2E_CLASSID",1, field_fmt_68_79_11_11_info, field_fmt_68_79_11_11_set, field_fmt_68_79_11_11_get, NULL, 0}, - {"RX_BFD_SESSION_INDEX",1, field_fmt_68_79_11_11_info, field_fmt_68_79_11_11_set, field_fmt_68_79_11_11_get, NULL, 0}, - {"I2E_CLASSID_TYPE",1, field_fmt_80_83_11_11_info, field_fmt_80_83_11_11_set, field_fmt_80_83_11_11_get, NULL, 0}, - {"RX_BFD_START_OFFSET_TYPE",1, field_fmt_80_81_11_11_info, field_fmt_80_81_11_11_set, field_fmt_80_81_11_11_get, NULL, 0}, - {"RX_BFD_START_OFFSET",1, field_fmt_82_89_11_11_info, field_fmt_82_89_11_11_set, field_fmt_82_89_11_11_get, NULL, 0}, - {"CPU_COS",1, field_fmt_90_95_11_11_info, field_fmt_90_95_11_11_set, field_fmt_90_95_11_11_get, NULL, 0}, - {"QUEUE_NUM",1, field_fmt_90_95_11_11_info, field_fmt_90_95_11_11_set, field_fmt_90_95_11_11_get, NULL, 0}, - {"ING_L3_INTF",1, field_fmt_115_127_10_10_info, field_fmt_115_127_10_10_set, field_fmt_115_127_10_10_get, NULL, 0}, - {"INCOMING_TAG_STATUS",1, field_fmt_128_128_9_9_info, field_fmt_128_128_9_9_set, field_fmt_128_128_9_9_get, NULL, 0}, - {"ING_OTAG_ACTION",1, field_fmt_129_130_9_9_info, field_fmt_129_130_9_9_set, field_fmt_129_130_9_9_get, NULL, 0}, - {"PKT_LENGTH",1, field_fmt_131_144_9_9_info, field_fmt_131_144_9_9_set, field_fmt_131_144_9_9_get, NULL, 0}, - {"O_NHI",1, field_fmt_145_159_9_9_info, field_fmt_145_159_9_9_set, field_fmt_145_159_9_9_get, NULL, 0}, - {"INCOMING_OPAQUE_TAG_STATUS",1, field_fmt_160_160_8_8_info, field_fmt_160_160_8_8_set, field_fmt_160_160_8_8_get, NULL, 0}, - {"BPDU",1, field_fmt_161_161_8_8_info, field_fmt_161_161_8_8_set, field_fmt_161_161_8_8_get, NULL, 0}, - {"CHANGE_DSCP",1, field_fmt_162_162_8_8_info, field_fmt_162_162_8_8_set, field_fmt_162_162_8_8_get, NULL, 0}, - {"CHANGE_ECN",1, field_fmt_163_163_8_8_info, field_fmt_163_163_8_8_set, field_fmt_163_163_8_8_get, NULL, 0}, - {"DLB_ID_VALID",1, field_fmt_164_164_8_8_info, field_fmt_164_164_8_8_set, field_fmt_164_164_8_8_get, NULL, 0}, - {"DO_NOT_CHANGE_TTL",1, field_fmt_165_165_8_8_info, field_fmt_165_165_8_8_set, field_fmt_165_165_8_8_get, NULL, 0}, - {"DSCP",1, field_fmt_166_171_8_8_info, field_fmt_166_171_8_8_set, field_fmt_166_171_8_8_get, NULL, 0}, - {"SPECIAL_PACKET_TYPE",1, field_fmt_166_168_8_8_info, field_fmt_166_168_8_8_set, field_fmt_166_168_8_8_get, NULL, 0}, - {"ECN",1, field_fmt_172_173_8_8_info, field_fmt_172_173_8_8_set, field_fmt_172_173_8_8_get, NULL, 0}, - {"IP_ROUTED",1, field_fmt_174_174_8_8_info, field_fmt_174_174_8_8_set, field_fmt_174_174_8_8_get, NULL, 0}, - {"L3ONLY",1, field_fmt_175_175_8_8_info, field_fmt_175_175_8_8_set, field_fmt_175_175_8_8_get, NULL, 0}, - {"MATCHED_RULE",1, field_fmt_176_187_8_8_info, field_fmt_176_187_8_8_set, field_fmt_176_187_8_8_get, NULL, 0}, - {"MATCHED_RULE_EP",1, field_fmt_176_184_8_8_info, field_fmt_176_184_8_8_set, field_fmt_176_184_8_8_get, NULL, 0}, - {"IS_EGR_TS",1, field_fmt_185_185_8_8_info, field_fmt_185_185_8_8_set, field_fmt_185_185_8_8_get, NULL, 0}, - {"MTP_INDEX",1, field_fmt_188_190_8_8_info, field_fmt_188_190_8_8_set, field_fmt_188_190_8_8_get, NULL, 0}, - {"OUTER_CFI",1, field_fmt_191_191_8_8_info, field_fmt_191_191_8_8_set, field_fmt_191_191_8_8_get, NULL, 0}, - {"OUTER_PRI",1, field_fmt_192_194_7_7_info, field_fmt_192_194_7_7_set, field_fmt_192_194_7_7_get, NULL, 0}, - {"OUTER_VID",1, field_fmt_195_206_7_7_info, field_fmt_195_206_7_7_set, field_fmt_195_206_7_7_get, NULL, 0}, - {"REPLICATION_OR_NHOP_INDEX",1, field_fmt_207_221_7_7_info, field_fmt_207_221_7_7_set, field_fmt_207_221_7_7_get, NULL, 0}, - {"MODIFIED_PKT",1, field_fmt_222_222_7_7_info, field_fmt_222_222_7_7_set, field_fmt_222_222_7_7_get, NULL, 0}, - {"ENTROPY_LABEL",1, field_fmt_223_242_7_6_info, field_fmt_223_242_7_6_set, field_fmt_223_242_7_6_get, NULL, 0}, - {"SPECIAL_PACKET_INDICATOR",1, field_fmt_243_243_6_6_info, field_fmt_243_243_6_6_set, field_fmt_243_243_6_6_get, NULL, 0}, - {"SRC_PORT_NUM",1, field_fmt_244_253_6_6_info, field_fmt_244_253_6_6_set, field_fmt_244_253_6_6_get, NULL, 0}, - {"SWITCH",1, field_fmt_254_254_6_6_info, field_fmt_254_254_6_6_set, field_fmt_254_254_6_6_get, NULL, 0}, - {"TIMESTAMP",1, field_fmt_255_286_6_5_info, field_fmt_255_286_6_5_set, field_fmt_255_286_6_5_get, NULL, 0}, - {"TIMESTAMP_HI",1, field_fmt_287_302_5_4_info, field_fmt_287_302_5_4_set, field_fmt_287_302_5_4_get, NULL, 0}, - {"IEEE_802_1AS_TIMESTAMP_ENABLED",1, field_fmt_303_303_4_4_info, field_fmt_303_303_4_4_set, field_fmt_303_303_4_4_get, NULL, 0}, - {"TUNNEL_DECAP_TYPE",1, field_fmt_304_307_4_4_info, field_fmt_304_307_4_4_set, field_fmt_304_307_4_4_get, NULL, 0}, - {"UC_SW_COPY_DROPPED",1, field_fmt_308_308_4_4_info, field_fmt_308_308_4_4_set, field_fmt_308_308_4_4_get, NULL, 0}, - {"UNICAST_QUEUE",1, field_fmt_309_309_4_4_info, field_fmt_309_309_4_4_set, field_fmt_309_309_4_4_get, NULL, 0}, - {"INCOMING_INT_HDR_TYPE",1, field_fmt_310_311_4_4_info, field_fmt_310_311_4_4_set, field_fmt_310_311_4_4_get, NULL, 0}, - {"DLB_ID",1, field_fmt_312_318_4_4_info, field_fmt_312_318_4_4_set, field_fmt_312_318_4_4_get, NULL, 0}, - {"MODULE_HDR",4, field_fmt_320_447_3_0_info, field_fmt_320_447_3_0_set, field_fmt_320_447_3_0_get, NULL, 0}, - -}; - -static const shr_enum_map_t bcm78910_a0_rxpmd_names[] = -{ - BCM78910_A0_RXPMD_NAME_MAP_INIT -}; - -bcmpkt_pmd_info_t bcm78910_a0_rxpmd_info_get(void) -{ - bcmpkt_pmd_info_t bcm78910_a0_rxpmd_info = {14, BCM78910_A0_RXPMD_COUNT, bcm78910_a0_rxpmd_names, bcm78910_a0_rxpmd_fields}; - return bcm78910_a0_rxpmd_info; -} - -static bcmpkt_pmd_field_t bcm78910_a0_rx_reason_fields[BCM78910_A0_RX_REASON_COUNT] = { - {"CPU_INVALID_REASON",1, field_fmt_0_0_13_13_info, field_fmt_0_0_13_13_set, field_fmt_0_0_13_13_get, NULL, 0}, - {"CPU_SLF",1, field_fmt_1_1_13_13_info, field_fmt_1_1_13_13_set, field_fmt_1_1_13_13_get, NULL, 0}, - {"CPU_DLF",1, field_fmt_2_2_13_13_info, field_fmt_2_2_13_13_set, field_fmt_2_2_13_13_get, NULL, 0}, - {"CPU_L2MOVE",1, field_fmt_3_3_13_13_info, field_fmt_3_3_13_13_set, field_fmt_3_3_13_13_get, NULL, 0}, - {"CPU_L2CPU",1, field_fmt_4_4_13_13_info, field_fmt_4_4_13_13_set, field_fmt_4_4_13_13_get, NULL, 0}, - {"CPU_L3SRC_MISS",1, field_fmt_5_5_13_13_info, field_fmt_5_5_13_13_set, field_fmt_5_5_13_13_get, NULL, 0}, - {"CPU_L3DST_MISS",1, field_fmt_6_6_13_13_info, field_fmt_6_6_13_13_set, field_fmt_6_6_13_13_get, NULL, 0}, - {"CPU_L3SRC_MOVE",1, field_fmt_7_7_13_13_info, field_fmt_7_7_13_13_set, field_fmt_7_7_13_13_get, NULL, 0}, - {"CPU_MC_MISS",1, field_fmt_8_8_13_13_info, field_fmt_8_8_13_13_set, field_fmt_8_8_13_13_get, NULL, 0}, - {"CPU_IPMC_MISS",1, field_fmt_9_9_13_13_info, field_fmt_9_9_13_13_set, field_fmt_9_9_13_13_get, NULL, 0}, - {"CPU_FFP",1, field_fmt_10_10_13_13_info, field_fmt_10_10_13_13_set, field_fmt_10_10_13_13_get, NULL, 0}, - {"CPU_L3HDR_ERR",1, field_fmt_11_11_13_13_info, field_fmt_11_11_13_13_set, field_fmt_11_11_13_13_get, NULL, 0}, - {"CPU_PROTOCOL_PKT",1, field_fmt_12_12_13_13_info, field_fmt_12_12_13_13_set, field_fmt_12_12_13_13_get, NULL, 0}, - {"CPU_DOS_ATTACK",1, field_fmt_13_13_13_13_info, field_fmt_13_13_13_13_set, field_fmt_13_13_13_13_get, NULL, 0}, - {"CPU_MARTIAN_ADDR",1, field_fmt_14_14_13_13_info, field_fmt_14_14_13_13_set, field_fmt_14_14_13_13_get, NULL, 0}, - {"CPU_TUNNEL_ERR",1, field_fmt_15_15_13_13_info, field_fmt_15_15_13_13_set, field_fmt_15_15_13_13_get, NULL, 0}, - {"CPU_SFLOW_SRC",1, field_fmt_16_16_13_13_info, field_fmt_16_16_13_13_set, field_fmt_16_16_13_13_get, NULL, 0}, - {"CPU_SFLOW_DST",1, field_fmt_17_17_13_13_info, field_fmt_17_17_13_13_set, field_fmt_17_17_13_13_get, NULL, 0}, - {"ICMP_REDIRECT",1, field_fmt_18_18_13_13_info, field_fmt_18_18_13_13_set, field_fmt_18_18_13_13_get, NULL, 0}, - {"L3_SLOWPATH",1, field_fmt_19_19_13_13_info, field_fmt_19_19_13_13_set, field_fmt_19_19_13_13_get, NULL, 0}, - {"PARITY_ERROR",1, field_fmt_20_20_13_13_info, field_fmt_20_20_13_13_set, field_fmt_20_20_13_13_get, NULL, 0}, - {"L3_MTU_CHECK_FAIL",1, field_fmt_21_21_13_13_info, field_fmt_21_21_13_13_set, field_fmt_21_21_13_13_get, NULL, 0}, - {"MPLS_TTL_CHECK",1, field_fmt_22_22_13_13_info, field_fmt_22_22_13_13_set, field_fmt_22_22_13_13_get, NULL, 0}, - {"MPLS_LABEL_MISS",1, field_fmt_23_23_13_13_info, field_fmt_23_23_13_13_set, field_fmt_23_23_13_13_get, NULL, 0}, - {"MPLS_INVALID_ACTION",1, field_fmt_24_24_13_13_info, field_fmt_24_24_13_13_set, field_fmt_24_24_13_13_get, NULL, 0}, - {"MPLS_INVALID_PAYLOAD",1, field_fmt_25_25_13_13_info, field_fmt_25_25_13_13_set, field_fmt_25_25_13_13_get, NULL, 0}, - {"CPU_VFP",1, field_fmt_26_26_13_13_info, field_fmt_26_26_13_13_set, field_fmt_26_26_13_13_get, NULL, 0}, - {"PBT_NONUC_PKT",1, field_fmt_27_27_13_13_info, field_fmt_27_27_13_13_set, field_fmt_27_27_13_13_get, NULL, 0}, - {"L3_NEXT_HOP",1, field_fmt_28_28_13_13_info, field_fmt_28_28_13_13_set, field_fmt_28_28_13_13_get, NULL, 0}, - {"MY_STATION",1, field_fmt_29_29_13_13_info, field_fmt_29_29_13_13_set, field_fmt_29_29_13_13_get, NULL, 0}, - {"TIME_SYNC",1, field_fmt_30_30_13_13_info, field_fmt_30_30_13_13_set, field_fmt_30_30_13_13_get, NULL, 0}, - {"TUNNEL_DECAP_ECN_ERROR",1, field_fmt_31_31_13_13_info, field_fmt_31_31_13_13_set, field_fmt_31_31_13_13_get, NULL, 0}, - {"BFD_SLOWPATH",1, field_fmt_32_32_12_12_info, field_fmt_32_32_12_12_set, field_fmt_32_32_12_12_get, NULL, 0}, - {"BFD_ERROR",1, field_fmt_33_33_12_12_info, field_fmt_33_33_12_12_set, field_fmt_33_33_12_12_get, NULL, 0}, - {"PACKET_TRACE_TO_CPU",1, field_fmt_34_34_12_12_info, field_fmt_34_34_12_12_set, field_fmt_34_34_12_12_get, NULL, 0}, - {"MPLS_UNKNOWN_CONTROL_PKT",1, field_fmt_35_35_12_12_info, field_fmt_35_35_12_12_set, field_fmt_35_35_12_12_get, NULL, 0}, - {"MPLS_ALERT_LABEL",1, field_fmt_36_36_12_12_info, field_fmt_36_36_12_12_set, field_fmt_36_36_12_12_get, NULL, 0}, - {"CPU_IPMC_INTERFACE_MISMATCH",1, field_fmt_37_37_12_12_info, field_fmt_37_37_12_12_set, field_fmt_37_37_12_12_get, NULL, 0}, - {"DLB_MONITOR",1, field_fmt_38_38_12_12_info, field_fmt_38_38_12_12_set, field_fmt_38_38_12_12_get, NULL, 0}, - {"CPU_SFLOW_FLEX",1, field_fmt_39_39_12_12_info, field_fmt_39_39_12_12_set, field_fmt_39_39_12_12_get, NULL, 0}, - {"CPU_UVLAN",1, field_fmt_40_40_12_12_info, field_fmt_40_40_12_12_set, field_fmt_40_40_12_12_get, NULL, 0}, - {"SRV6_ERROR",1, field_fmt_41_41_12_12_info, field_fmt_41_41_12_12_set, field_fmt_41_41_12_12_get, NULL, 0}, - {"VXLAN_VN_ID_MISS",1, field_fmt_42_42_12_12_info, field_fmt_42_42_12_12_set, field_fmt_42_42_12_12_get, NULL, 0}, - {"VXLAN_SIP_MISS",1, field_fmt_43_43_12_12_info, field_fmt_43_43_12_12_set, field_fmt_43_43_12_12_get, NULL, 0}, - {"ADAPT_MISS",1, field_fmt_44_44_12_12_info, field_fmt_44_44_12_12_set, field_fmt_44_44_12_12_get, NULL, 0}, - {"INVALID_GSH_NON_GSH",1, field_fmt_45_45_12_12_info, field_fmt_45_45_12_12_set, field_fmt_45_45_12_12_get, NULL, 0}, - {"APU_POLICY_CTC",1, field_fmt_46_46_12_12_info, field_fmt_46_46_12_12_set, field_fmt_46_46_12_12_get, NULL, 0}, - {"DELAYED_CTC",1, field_fmt_47_47_12_12_info, field_fmt_47_47_12_12_set, field_fmt_47_47_12_12_get, NULL, 0}, - {"PORT_DOWN",1, field_fmt_48_48_12_12_info, field_fmt_48_48_12_12_set, field_fmt_48_48_12_12_get, NULL, 0}, - {"SRV6_CONTROL_PKT",1, field_fmt_49_49_12_12_info, field_fmt_49_49_12_12_set, field_fmt_49_49_12_12_get, NULL, 0}, - {"OUI_COMPRESSION_MISS",1, field_fmt_50_50_12_12_info, field_fmt_50_50_12_12_set, field_fmt_50_50_12_12_get, NULL, 0}, - -}; - -static const shr_enum_map_t bcm78910_a0_rx_reason_names[] = -{ - BCM78910_A0_RX_REASON_NAME_MAP_INIT -}; - -bcmpkt_pmd_info_t bcm78910_a0_rx_reason_info_get(void) -{ - bcmpkt_pmd_info_t bcm78910_a0_rx_reason_info = {14, BCM78910_A0_RX_REASON_COUNT, bcm78910_a0_rx_reason_names, bcm78910_a0_rx_reason_fields}; - return bcm78910_a0_rx_reason_info; -} - -static bcmpkt_pmd_field_t bcm78910_a0_ep_rx_reason_fields[BCM78910_A0_EP_RX_REASON_COUNT] = { - {"EP_CTC",1, field_fmt_0_0_13_13_info, field_fmt_0_0_13_13_set, field_fmt_0_0_13_13_get, NULL, 0}, - -}; - -static const shr_enum_map_t bcm78910_a0_ep_rx_reason_names[] = -{ - BCM78910_A0_EP_RX_REASON_NAME_MAP_INIT -}; - -bcmpkt_pmd_info_t bcm78910_a0_ep_rx_reason_info_get(void) -{ - bcmpkt_pmd_info_t bcm78910_a0_ep_rx_reason_info = {14, BCM78910_A0_EP_RX_REASON_COUNT, bcm78910_a0_ep_rx_reason_names, bcm78910_a0_ep_rx_reason_fields}; - return bcm78910_a0_ep_rx_reason_info; -} - -static const shr_enum_map_t bcm78910_a0_txpmd_cpu_tx_destination_type_names[] = -{ - BCM78910_A0_TXPMD_CPU_TX_DESTINATION_TYPE_NAME_MAP_INIT -}; - -static const shr_enum_map_t bcm78910_a0_txpmd_cpu_tx_dp_names[] = -{ - BCM78910_A0_TXPMD_CPU_TX_DP_NAME_MAP_INIT -}; - -static const shr_enum_map_t bcm78910_a0_txpmd_sobmh_from_cpu_destination_type_names[] = -{ - BCM78910_A0_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE_NAME_MAP_INIT -}; - -static const shr_enum_map_t bcm78910_a0_txpmd_header_type_names[] = -{ - BCM78910_A0_TXPMD_HEADER_TYPE_NAME_MAP_INIT -}; - -static const shr_enum_map_t bcm78910_a0_txpmd_start_names[] = -{ - BCM78910_A0_TXPMD_START_NAME_MAP_INIT -}; - -static bcmpkt_pmd_field_t bcm78910_a0_txpmd_fields[BCM78910_A0_TXPMD_COUNT] = { - {"CPU_TX::ECMP_MEMBER_ID",1, field_fmt_0_16_3_3_info, field_fmt_0_16_3_3_set, field_fmt_0_16_3_3_get, NULL, 2}, - {"CPU_TX::MCAST_LB_INDEX",1, field_fmt_0_7_3_3_info, field_fmt_0_7_3_3_set, field_fmt_0_7_3_3_get, NULL, 2}, - {"CPU_TX::COOKIE",1, field_fmt_17_25_3_3_info, field_fmt_17_25_3_3_set, field_fmt_17_25_3_3_get, NULL, 2}, - {"CPU_TX::COOKIE_VALID",1, field_fmt_26_26_3_3_info, field_fmt_26_26_3_3_set, field_fmt_26_26_3_3_get, NULL, 2}, - {"CPU_TX::DESTINATION",1, field_fmt_27_42_3_2_info, field_fmt_27_42_3_2_set, field_fmt_27_42_3_2_get, NULL, 2}, - {"CPU_TX::DESTINATION_TYPE",1, field_fmt_43_46_2_2_info, field_fmt_43_46_2_2_set, field_fmt_43_46_2_2_get, bcm78910_a0_txpmd_cpu_tx_destination_type_names, 2}, - {"CPU_TX::DP",1, field_fmt_47_48_2_2_info, field_fmt_47_48_2_2_set, field_fmt_47_48_2_2_get, bcm78910_a0_txpmd_cpu_tx_dp_names, 2}, - {"CPU_TX::INPUT_PRI",1, field_fmt_49_52_2_2_info, field_fmt_49_52_2_2_set, field_fmt_49_52_2_2_get, NULL, 2}, - {"CPU_TX::INT_CN",1, field_fmt_53_54_2_2_info, field_fmt_53_54_2_2_set, field_fmt_53_54_2_2_get, NULL, 2}, - {"CPU_TX::INT_PRI",1, field_fmt_55_58_2_2_info, field_fmt_55_58_2_2_set, field_fmt_55_58_2_2_get, NULL, 2}, - {"CPU_TX::MCAST_LB_INDEX_VLD",1, field_fmt_59_59_2_2_info, field_fmt_59_59_2_2_set, field_fmt_59_59_2_2_get, NULL, 2}, - {"CPU_TX::PKT_PROFILE",1, field_fmt_60_62_2_2_info, field_fmt_60_62_2_2_set, field_fmt_60_62_2_2_get, NULL, 2}, - {"CPU_TX::QOS_FIELDS_VLD",1, field_fmt_63_63_2_2_info, field_fmt_63_63_2_2_set, field_fmt_63_63_2_2_get, NULL, 2}, - {"CPU_TX::ROUTED_PKT",1, field_fmt_64_64_1_1_info, field_fmt_64_64_1_1_set, field_fmt_64_64_1_1_get, NULL, 2}, - {"CPU_TX::SVP",1, field_fmt_65_77_1_1_info, field_fmt_65_77_1_1_set, field_fmt_65_77_1_1_get, NULL, 2}, - {"CPU_TX::VRF",1, field_fmt_78_90_1_1_info, field_fmt_78_90_1_1_set, field_fmt_78_90_1_1_get, NULL, 2}, - {"CPU_TX::VRF_VALID",1, field_fmt_91_91_1_1_info, field_fmt_91_91_1_1_set, field_fmt_91_91_1_1_get, NULL, 2}, - {"SOBMH_FROM_CPU::COOKIE_7_0",1, field_fmt_0_7_3_3_info, field_fmt_0_7_3_3_set, field_fmt_0_7_3_3_get, NULL, 1}, - {"SOBMH_FROM_CPU::IEEE1588_TIMESTAMP_HDR_OFFSET",1, field_fmt_0_7_3_3_info, field_fmt_0_7_3_3_set, field_fmt_0_7_3_3_get, NULL, 1}, - {"SOBMH_FROM_CPU::COOKIE_8",1, field_fmt_8_8_3_3_info, field_fmt_8_8_3_3_set, field_fmt_8_8_3_3_get, NULL, 1}, - {"SOBMH_FROM_CPU::IEEE1588_REGEN_UDP_CHECKSUM",1, field_fmt_8_8_3_3_info, field_fmt_8_8_3_3_set, field_fmt_8_8_3_3_get, NULL, 1}, - {"SOBMH_FROM_CPU::CELL_ERROR",1, field_fmt_9_9_3_3_info, field_fmt_9_9_3_3_set, field_fmt_9_9_3_3_get, NULL, 1}, - {"SOBMH_FROM_CPU::CNG",1, field_fmt_10_11_3_3_info, field_fmt_10_11_3_3_set, field_fmt_10_11_3_3_get, NULL, 1}, - {"SOBMH_FROM_CPU::COS",1, field_fmt_12_17_3_3_info, field_fmt_12_17_3_3_set, field_fmt_12_17_3_3_get, NULL, 1}, - {"SOBMH_FROM_CPU::DESTINATION",1, field_fmt_18_33_3_2_info, field_fmt_18_33_3_2_set, field_fmt_18_33_3_2_get, NULL, 1}, - {"SOBMH_FROM_CPU::DESTINATION_TYPE",1, field_fmt_34_37_2_2_info, field_fmt_34_37_2_2_set, field_fmt_34_37_2_2_get, bcm78910_a0_txpmd_sobmh_from_cpu_destination_type_names, 1}, - {"SOBMH_FROM_CPU::IEEE1588_INGRESS_TIMESTAMP_SIGN",1, field_fmt_38_38_2_2_info, field_fmt_38_38_2_2_set, field_fmt_38_38_2_2_get, NULL, 1}, - {"SOBMH_FROM_CPU::IEEE1588_ONE_STEP_ENABLE",1, field_fmt_39_39_2_2_info, field_fmt_39_39_2_2_set, field_fmt_39_39_2_2_get, NULL, 1}, - {"SOBMH_FROM_CPU::INPUT_PRI",1, field_fmt_40_43_2_2_info, field_fmt_40_43_2_2_set, field_fmt_40_43_2_2_get, NULL, 1}, - {"SOBMH_FROM_CPU::RQE_Q_NUM",1, field_fmt_44_46_2_2_info, field_fmt_44_46_2_2_set, field_fmt_44_46_2_2_get, NULL, 1}, - {"SOBMH_FROM_CPU::SPAP",1, field_fmt_47_48_2_2_info, field_fmt_47_48_2_2_set, field_fmt_47_48_2_2_get, NULL, 1}, - {"SOBMH_FROM_CPU::SPID",1, field_fmt_49_50_2_2_info, field_fmt_49_50_2_2_set, field_fmt_49_50_2_2_get, NULL, 1}, - {"SOBMH_FROM_CPU::SPID_OVERRIDE",1, field_fmt_51_51_2_2_info, field_fmt_51_51_2_2_set, field_fmt_51_51_2_2_get, NULL, 1}, - {"SOBMH_FROM_CPU::SRC_MODID",1, field_fmt_52_59_2_2_info, field_fmt_52_59_2_2_set, field_fmt_52_59_2_2_get, NULL, 1}, - {"SOBMH_FROM_CPU::TX_TS",1, field_fmt_60_60_2_2_info, field_fmt_60_60_2_2_set, field_fmt_60_60_2_2_get, NULL, 1}, - {"SOBMH_FROM_CPU::UNICAST",1, field_fmt_61_61_2_2_info, field_fmt_61_61_2_2_set, field_fmt_61_61_2_2_get, NULL, 1}, - {"SOBMH_FROM_CPU::WRED_MARK_ELIGIBLE",1, field_fmt_62_62_2_2_info, field_fmt_62_62_2_2_set, field_fmt_62_62_2_2_get, NULL, 1}, - {"SOBMH_FROM_CPU::WRED_RESPONSE",1, field_fmt_63_63_2_2_info, field_fmt_63_63_2_2_set, field_fmt_63_63_2_2_get, NULL, 1}, - {"HEADER_TYPE",1, field_fmt_120_125_0_0_info, field_fmt_120_125_0_0_set, field_fmt_120_125_0_0_get, bcm78910_a0_txpmd_header_type_names, 0}, - {"START",1, field_fmt_126_127_0_0_info, field_fmt_126_127_0_0_set, field_fmt_126_127_0_0_get, bcm78910_a0_txpmd_start_names, 0}, - -}; - -static const shr_enum_map_t bcm78910_a0_txpmd_names[] = -{ - BCM78910_A0_TXPMD_NAME_MAP_INIT -}; - -bcmpkt_pmd_info_t bcm78910_a0_txpmd_info_get(void) -{ - bcmpkt_pmd_info_t bcm78910_a0_txpmd_info = {4, BCM78910_A0_TXPMD_COUNT, bcm78910_a0_txpmd_names, bcm78910_a0_txpmd_fields}; - return bcm78910_a0_txpmd_info; -} - -static const shr_enum_map_t bcm78910_a0_lbhdr_header_type_names[] = -{ - BCM78910_A0_LBHDR_HEADER_TYPE_NAME_MAP_INIT -}; - -static const shr_enum_map_t bcm78910_a0_lbhdr_start_names[] = -{ - BCM78910_A0_LBHDR_START_NAME_MAP_INIT -}; - -static bcmpkt_pmd_field_t bcm78910_a0_lbhdr_fields[BCM78910_A0_LBHDR_COUNT] = { - {"PKT_PROFILE",1, field_fmt_16_18_3_3_info, field_fmt_16_18_3_3_set, field_fmt_16_18_3_3_get, NULL, 0}, - {"QOS_FIELD_VALID",1, field_fmt_19_19_3_3_info, field_fmt_19_19_3_3_set, field_fmt_19_19_3_3_get, NULL, 0}, - {"VFI_VALID_MD_ETH",1, field_fmt_21_21_3_3_info, field_fmt_21_21_3_3_set, field_fmt_21_21_3_3_get, NULL, 0}, - {"VRF_VALID",1, field_fmt_22_22_3_3_info, field_fmt_22_22_3_3_set, field_fmt_22_22_3_3_get, NULL, 0}, - {"VFI_MD_ETH",1, field_fmt_24_36_3_2_info, field_fmt_24_36_3_2_set, field_fmt_24_36_3_2_get, NULL, 0}, - {"VRF",1, field_fmt_24_36_3_2_info, field_fmt_24_36_3_2_set, field_fmt_24_36_3_2_get, NULL, 0}, - {"PP_PORT",1, field_fmt_37_46_2_2_info, field_fmt_37_46_2_2_set, field_fmt_37_46_2_2_get, NULL, 0}, - {"VISIBILITY_PKT",1, field_fmt_47_47_2_2_info, field_fmt_47_47_2_2_set, field_fmt_47_47_2_2_get, NULL, 0}, - {"ROUTED_PKT",1, field_fmt_48_48_2_2_info, field_fmt_48_48_2_2_set, field_fmt_48_48_2_2_get, NULL, 0}, - {"OPAQUE_OBJECT",1, field_fmt_81_84_1_1_info, field_fmt_81_84_1_1_set, field_fmt_81_84_1_1_get, NULL, 0}, - {"QOS_FIELD_ETH",1, field_fmt_85_92_1_1_info, field_fmt_85_92_1_1_set, field_fmt_85_92_1_1_get, NULL, 0}, - {"INT_PRI_ETH",1, field_fmt_85_88_1_1_info, field_fmt_85_88_1_1_set, field_fmt_85_88_1_1_get, NULL, 0}, - {"INT_CN_ETH",1, field_fmt_89_90_1_1_info, field_fmt_89_90_1_1_set, field_fmt_89_90_1_1_get, NULL, 0}, - {"CNG_ETH",1, field_fmt_91_92_1_1_info, field_fmt_91_92_1_1_set, field_fmt_91_92_1_1_get, NULL, 0}, - {"INPUT_PRIORITY_MD_ETH",1, field_fmt_116_119_0_0_info, field_fmt_116_119_0_0_set, field_fmt_116_119_0_0_get, NULL, 0}, - {"HEADER_TYPE",1, field_fmt_120_125_0_0_info, field_fmt_120_125_0_0_set, field_fmt_120_125_0_0_get, bcm78910_a0_lbhdr_header_type_names, 0}, - {"START",1, field_fmt_126_127_0_0_info, field_fmt_126_127_0_0_set, field_fmt_126_127_0_0_get, bcm78910_a0_lbhdr_start_names, 0}, - -}; - -static const shr_enum_map_t bcm78910_a0_lbhdr_names[] = -{ - BCM78910_A0_LBHDR_NAME_MAP_INIT -}; - -bcmpkt_pmd_info_t bcm78910_a0_lbhdr_info_get(void) -{ - bcmpkt_pmd_info_t bcm78910_a0_lbhdr_info = {4, BCM78910_A0_LBHDR_COUNT, bcm78910_a0_lbhdr_names, bcm78910_a0_lbhdr_fields}; - return bcm78910_a0_lbhdr_info; -} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78914_b0/bcm78914_b0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78914_b0/bcm78914_b0_pkt_lbhdr.c deleted file mode 100644 index fbfe93c79a4..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78914_b0/bcm78914_b0_pkt_lbhdr.c +++ /dev/null @@ -1,367 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated from the registers file. - * Edits to this file will be lost when it is regenerated. - * Tool: INTERNAL/regs/xgs/generate-pmd.pl - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - * This file provides LBHDR access functions for BCM78914_B0. - * - ******************************************************************************/ - -#include -#include - -#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) -#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) -#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) -#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) -/******************************************************************************* - * SWFORMAT: LBHDR - * BLOCKS: - * SIZE: 128 - ******************************************************************************/ -static void bcmpkt_lbhdr_start_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[0], 30, 2, val); -} - -static uint32_t bcmpkt_lbhdr_start_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[0], 30, 2); - return val; -} - -static void bcmpkt_lbhdr_header_type_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[0], 24, 6, val); -} - -static uint32_t bcmpkt_lbhdr_header_type_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[0], 24, 6); - return val; -} - -static void bcmpkt_lbhdr_pkt_profile_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[3], 16, 3, val); -} - -static uint32_t bcmpkt_lbhdr_pkt_profile_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[3], 16, 3); - return val; -} - -static void bcmpkt_lbhdr_visibility_pkt_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[2], 15, 1, val); -} - -static uint32_t bcmpkt_lbhdr_visibility_pkt_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[2], 15, 1); - return val; -} - -static void bcmpkt_lbhdr_pp_port_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[2], 5, 10, val); -} - -static uint32_t bcmpkt_lbhdr_pp_port_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[2], 5, 10); - return val; -} - -static void bcmpkt_lbhdr_routed_pkt_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[2], 16, 1, val); -} - -static uint32_t bcmpkt_lbhdr_routed_pkt_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[2], 16, 1); - return val; -} - -static void bcmpkt_lbhdr_vrf_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[3], 24, 8, val & MASK(8)); - WORD_FIELD_SET(data[2], 0, 5, (val >> 8) & MASK(5)); -} - -static uint32_t bcmpkt_lbhdr_vrf_get(uint32_t *data) -{ - uint32_t val; - val = (WORD_FIELD_GET(data[3], 24, 8) | (WORD_FIELD_GET(data[2], 0, 5) << 8)) ; - return val; -} - -static void bcmpkt_lbhdr_vrf_valid_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[3], 22, 1, val); -} - -static uint32_t bcmpkt_lbhdr_vrf_valid_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[3], 22, 1); - return val; -} - -static void bcmpkt_lbhdr_qos_field_valid_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[3], 19, 1, val); -} - -static uint32_t bcmpkt_lbhdr_qos_field_valid_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[3], 19, 1); - return val; -} - -static void bcmpkt_lbhdr_opaque_object_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[1], 17, 4, val); -} - -static uint32_t bcmpkt_lbhdr_opaque_object_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[1], 17, 4); - return val; -} - -static void bcmpkt_lbhdr_qos_field_eth_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[1], 21, 8, val); -} - -static uint32_t bcmpkt_lbhdr_qos_field_eth_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[1], 21, 8); - return val; -} - -static void bcmpkt_lbhdr_int_pri_eth_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[1], 21, 4, val); -} - -static uint32_t bcmpkt_lbhdr_int_pri_eth_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[1], 21, 4); - return val; -} - -static void bcmpkt_lbhdr_int_cn_eth_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[1], 25, 2, val); -} - -static uint32_t bcmpkt_lbhdr_int_cn_eth_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[1], 25, 2); - return val; -} - -static void bcmpkt_lbhdr_cng_eth_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[1], 27, 2, val); -} - -static uint32_t bcmpkt_lbhdr_cng_eth_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[1], 27, 2); - return val; -} - -static void bcmpkt_lbhdr_input_priority_md_eth_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[0], 20, 4, val); -} - -static uint32_t bcmpkt_lbhdr_input_priority_md_eth_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[0], 20, 4); - return val; -} - -static void bcmpkt_lbhdr_vfi_valid_md_eth_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[3], 21, 1, val); -} - -static uint32_t bcmpkt_lbhdr_vfi_valid_md_eth_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[3], 21, 1); - return val; -} - -static void bcmpkt_lbhdr_vfi_md_eth_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[3], 24, 8, val & MASK(8)); - WORD_FIELD_SET(data[2], 0, 5, (val >> 8) & MASK(5)); -} - -static uint32_t bcmpkt_lbhdr_vfi_md_eth_get(uint32_t *data) -{ - uint32_t val; - val = (WORD_FIELD_GET(data[3], 24, 8) | (WORD_FIELD_GET(data[2], 0, 5) << 8)) ; - return val; -} - -static uint32_t bcmpkt_lbhdr_i_size_get(uint32_t *data, uint32_t **addr) -{ - return 4; -} - - -const bcmpkt_lbhdr_fget_t bcm78914_b0_lbhdr_fget = { - { - bcmpkt_lbhdr_start_get, - bcmpkt_lbhdr_header_type_get, - NULL, - bcmpkt_lbhdr_pkt_profile_get, - bcmpkt_lbhdr_visibility_pkt_get, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - bcmpkt_lbhdr_pp_port_get, - bcmpkt_lbhdr_routed_pkt_get, - bcmpkt_lbhdr_vrf_get, - bcmpkt_lbhdr_vrf_valid_get, - bcmpkt_lbhdr_qos_field_valid_get, - bcmpkt_lbhdr_opaque_object_get, - bcmpkt_lbhdr_qos_field_eth_get, - bcmpkt_lbhdr_int_pri_eth_get, - bcmpkt_lbhdr_int_cn_eth_get, - bcmpkt_lbhdr_cng_eth_get, - bcmpkt_lbhdr_input_priority_md_eth_get, - bcmpkt_lbhdr_vfi_valid_md_eth_get, - bcmpkt_lbhdr_vfi_md_eth_get - } -}; - - -const bcmpkt_lbhdr_fset_t bcm78914_b0_lbhdr_fset = { - { - bcmpkt_lbhdr_start_set, - bcmpkt_lbhdr_header_type_set, - NULL, - bcmpkt_lbhdr_pkt_profile_set, - bcmpkt_lbhdr_visibility_pkt_set, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - bcmpkt_lbhdr_pp_port_set, - bcmpkt_lbhdr_routed_pkt_set, - bcmpkt_lbhdr_vrf_set, - bcmpkt_lbhdr_vrf_valid_set, - bcmpkt_lbhdr_qos_field_valid_set, - bcmpkt_lbhdr_opaque_object_set, - bcmpkt_lbhdr_qos_field_eth_set, - bcmpkt_lbhdr_int_pri_eth_set, - bcmpkt_lbhdr_int_cn_eth_set, - bcmpkt_lbhdr_cng_eth_set, - bcmpkt_lbhdr_input_priority_md_eth_set, - bcmpkt_lbhdr_vfi_valid_md_eth_set, - bcmpkt_lbhdr_vfi_md_eth_set - } -}; - - -const bcmpkt_lbhdr_figet_t bcm78914_b0_lbhdr_figet = { - { - bcmpkt_lbhdr_i_size_get - } -}; - -static shr_enum_map_t bcm78914_b0_lbhdr_view_types[] = { - {NULL, -1}, -}; - -/* -2: unsupported, -1: global, others: view's value */ -static int bcm78914_b0_lbhdr_view_infos[BCMPKT_LBHDR_FID_COUNT] = { - -1, -1, -2, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, - -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1, -}; - - -void bcm78914_b0_lbhdr_view_info_get(bcmpkt_pmd_view_info_t *info) -{ - info->view_infos = bcm78914_b0_lbhdr_view_infos; - info->view_types = bcm78914_b0_lbhdr_view_types; - info->view_type_get = NULL; -} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78914_b0/bcm78914_b0_pkt_rxpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78914_b0/bcm78914_b0_pkt_rxpmd.c deleted file mode 100644 index 40a3416a303..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78914_b0/bcm78914_b0_pkt_rxpmd.c +++ /dev/null @@ -1,1187 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated from the registers file. - * Edits to this file will be lost when it is regenerated. - * Tool: INTERNAL/regs/xgs/generate-pmd.pl - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - * This file provides RXPMD access functions for BCM78914_B0. - * - ******************************************************************************/ - -#include -#include -#include - -#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) -#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) -#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) -#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) -/******************************************************************************* - * SWFORMAT: RXPMD - * BLOCKS: - * SIZE: 448 - ******************************************************************************/ -static void bcmpkt_rxpmd_unicast_queue_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[4], 21, 1, val); -} - -static uint32_t bcmpkt_rxpmd_unicast_queue_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[4], 21, 1); - return val; -} - -static void bcmpkt_rxpmd_queue_num_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[11], 26, 6, val); -} - -static uint32_t bcmpkt_rxpmd_queue_num_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[11], 26, 6); - return val; -} - -static void bcmpkt_rxpmd_cpu_cos_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[11], 26, 6, val); -} - -static uint32_t bcmpkt_rxpmd_cpu_cos_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[11], 26, 6); - return val; -} - -static void bcmpkt_rxpmd_matched_rule_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[8], 16, 12, val); -} - -static uint32_t bcmpkt_rxpmd_matched_rule_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[8], 16, 12); - return val; -} - -static void bcmpkt_rxpmd_pkt_length_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[9], 3, 14, val); -} - -static uint32_t bcmpkt_rxpmd_pkt_length_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[9], 3, 14); - return val; -} - -static void bcmpkt_rxpmd_src_port_num_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[6], 20, 10, val); -} - -static uint32_t bcmpkt_rxpmd_src_port_num_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[6], 20, 10); - return val; -} - -static void bcmpkt_rxpmd_outer_vid_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[7], 3, 12, val); -} - -static uint32_t bcmpkt_rxpmd_outer_vid_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[7], 3, 12); - return val; -} - -static void bcmpkt_rxpmd_outer_cfi_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[8], 31, 1, val); -} - -static uint32_t bcmpkt_rxpmd_outer_cfi_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[8], 31, 1); - return val; -} - -static void bcmpkt_rxpmd_outer_pri_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[7], 0, 3, val); -} - -static uint32_t bcmpkt_rxpmd_outer_pri_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[7], 0, 3); - return val; -} - -static void bcmpkt_rxpmd_special_packet_indicator_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[6], 19, 1, val); -} - -static uint32_t bcmpkt_rxpmd_special_packet_indicator_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[6], 19, 1); - return val; -} - -static void bcmpkt_rxpmd_special_packet_type_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[8], 6, 3, val); -} - -static uint32_t bcmpkt_rxpmd_special_packet_type_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[8], 6, 3); - return val; -} - -static void bcmpkt_rxpmd_change_dscp_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[8], 2, 1, val); -} - -static uint32_t bcmpkt_rxpmd_change_dscp_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[8], 2, 1); - return val; -} - -static void bcmpkt_rxpmd_dscp_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[8], 6, 6, val); -} - -static uint32_t bcmpkt_rxpmd_dscp_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[8], 6, 6); - return val; -} - -static void bcmpkt_rxpmd_change_ecn_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[8], 3, 1, val); -} - -static uint32_t bcmpkt_rxpmd_change_ecn_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[8], 3, 1); - return val; -} - -static void bcmpkt_rxpmd_ecn_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[8], 12, 2, val); -} - -static uint32_t bcmpkt_rxpmd_ecn_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[8], 12, 2); - return val; -} - -static void bcmpkt_rxpmd_timestamp_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[6], 31, 1, val & MASK(1)); - WORD_FIELD_SET(data[5], 0, 31, (val >> 1) & MASK(31)); -} - -static uint32_t bcmpkt_rxpmd_timestamp_get(uint32_t *data) -{ - uint32_t val; - val = (WORD_FIELD_GET(data[6], 31, 1) | (WORD_FIELD_GET(data[5], 0, 31) << 1)) ; - return val; -} - -static void bcmpkt_rxpmd_timestamp_hi_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[5], 31, 1, val & MASK(1)); - WORD_FIELD_SET(data[4], 0, 15, (val >> 1) & MASK(15)); -} - -static uint32_t bcmpkt_rxpmd_timestamp_hi_get(uint32_t *data) -{ - uint32_t val; - val = (WORD_FIELD_GET(data[5], 31, 1) | (WORD_FIELD_GET(data[4], 0, 15) << 1)) ; - return val; -} - -static void bcmpkt_rxpmd_mtp_index_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[8], 28, 3, val); -} - -static uint32_t bcmpkt_rxpmd_mtp_index_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[8], 28, 3); - return val; -} - -static void bcmpkt_rxpmd_bpdu_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[8], 1, 1, val); -} - -static uint32_t bcmpkt_rxpmd_bpdu_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[8], 1, 1); - return val; -} - -static void bcmpkt_rxpmd_l3only_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[8], 15, 1, val); -} - -static uint32_t bcmpkt_rxpmd_l3only_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[8], 15, 1); - return val; -} - -static void bcmpkt_rxpmd_ip_routed_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[8], 14, 1, val); -} - -static uint32_t bcmpkt_rxpmd_ip_routed_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[8], 14, 1); - return val; -} - -static void bcmpkt_rxpmd_uc_sw_copy_dropped_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[4], 20, 1, val); -} - -static uint32_t bcmpkt_rxpmd_uc_sw_copy_dropped_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[4], 20, 1); - return val; -} - -static void bcmpkt_rxpmd_switch_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[6], 30, 1, val); -} - -static uint32_t bcmpkt_rxpmd_switch_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[6], 30, 1); - return val; -} - -static void bcmpkt_rxpmd_ing_otag_action_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[9], 1, 2, val); -} - -static uint32_t bcmpkt_rxpmd_ing_otag_action_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[9], 1, 2); - return val; -} - -static void bcmpkt_rxpmd_ing_tag_type_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[9], 0, 1, val); -} - -static uint32_t bcmpkt_rxpmd_ing_tag_type_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[9], 0, 1); - return val; -} - -static void bcmpkt_rxpmd_rx_bfd_start_offset_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[11], 18, 8, val); -} - -static uint32_t bcmpkt_rxpmd_rx_bfd_start_offset_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[11], 18, 8); - return val; -} - -static void bcmpkt_rxpmd_rx_bfd_start_offset_type_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[11], 16, 2, val); -} - -static uint32_t bcmpkt_rxpmd_rx_bfd_start_offset_type_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[11], 16, 2); - return val; -} - -static void bcmpkt_rxpmd_rx_bfd_session_index_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[11], 4, 12, val); -} - -static uint32_t bcmpkt_rxpmd_rx_bfd_session_index_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[11], 4, 12); - return val; -} - -static void bcmpkt_rxpmd_reason_type_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[11], 0, 4, val); -} - -static uint32_t bcmpkt_rxpmd_reason_type_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[11], 0, 4); - return val; -} - -static void bcmpkt_rxpmd_do_not_change_ttl_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[8], 5, 1, val); -} - -static uint32_t bcmpkt_rxpmd_do_not_change_ttl_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[8], 5, 1); - return val; -} - -static void bcmpkt_rxpmd_i2e_classid_type_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[11], 16, 4, val); -} - -static uint32_t bcmpkt_rxpmd_i2e_classid_type_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[11], 16, 4); - return val; -} - -static void bcmpkt_rxpmd_i2e_classid_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[11], 4, 12, val); -} - -static uint32_t bcmpkt_rxpmd_i2e_classid_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[11], 4, 12); - return val; -} - -static void bcmpkt_rxpmd_ing_l3_intf_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[10], 19, 13, val); -} - -static uint32_t bcmpkt_rxpmd_ing_l3_intf_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[10], 19, 13); - return val; -} - -static void bcmpkt_rxpmd_entropy_label_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[7], 31, 1, val & MASK(1)); - WORD_FIELD_SET(data[6], 0, 19, (val >> 1) & MASK(19)); -} - -static uint32_t bcmpkt_rxpmd_entropy_label_get(uint32_t *data) -{ - uint32_t val; - val = (WORD_FIELD_GET(data[7], 31, 1) | (WORD_FIELD_GET(data[6], 0, 19) << 1)) ; - return val; -} - -static void bcmpkt_rxpmd_tunnel_decap_type_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[4], 16, 4, val); -} - -static uint32_t bcmpkt_rxpmd_tunnel_decap_type_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[4], 16, 4); - return val; -} - -static void bcmpkt_rxpmd_dlb_id_valid_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[8], 4, 1, val); -} - -static uint32_t bcmpkt_rxpmd_dlb_id_valid_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[8], 4, 1); - return val; -} - -static void bcmpkt_rxpmd_dlb_id_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[4], 24, 7, val); -} - -static uint32_t bcmpkt_rxpmd_dlb_id_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[4], 24, 7); - return val; -} - -static void bcmpkt_rxpmd_replication_or_nhop_index_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[7], 15, 15, val); -} - -static uint32_t bcmpkt_rxpmd_replication_or_nhop_index_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[7], 15, 15); - return val; -} - -static void bcmpkt_rxpmd_incoming_int_hdr_type_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[4], 22, 2, val); -} - -static uint32_t bcmpkt_rxpmd_incoming_int_hdr_type_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[4], 22, 2); - return val; -} - -static void bcmpkt_rxpmd_o_nhi_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[9], 17, 15, val); -} - -static uint32_t bcmpkt_rxpmd_o_nhi_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[9], 17, 15); - return val; -} - -static void bcmpkt_rxpmd_incoming_opaque_tag_status_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[8], 0, 1, val); -} - -static uint32_t bcmpkt_rxpmd_incoming_opaque_tag_status_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[8], 0, 1); - return val; -} - -static void bcmpkt_rxpmd_ieee_802_1as_timestamp_enabled_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[4], 15, 1, val); -} - -static uint32_t bcmpkt_rxpmd_ieee_802_1as_timestamp_enabled_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[4], 15, 1); - return val; -} - -static void bcmpkt_rxpmd_matched_rule_ep_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[8], 16, 9, val); -} - -static uint32_t bcmpkt_rxpmd_matched_rule_ep_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[8], 16, 9); - return val; -} - -static void bcmpkt_rxpmd_is_egr_ts_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[8], 25, 1, val); -} - -static uint32_t bcmpkt_rxpmd_is_egr_ts_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[8], 25, 1); - return val; -} - -static void bcmpkt_rxpmd_modified_pkt_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[7], 30, 1, val); -} - -static uint32_t bcmpkt_rxpmd_modified_pkt_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[7], 30, 1); - return val; -} - -static uint32_t bcmpkt_rxpmd_i_size_get(uint32_t *data, uint32_t **addr) -{ - return 14; -} - -static uint32_t bcmpkt_rxpmd_i_reason_get(uint32_t *data, uint32_t **addr) -{ - *addr = data + 12; - return 2; -} - -static uint32_t bcmpkt_rxpmd_i_module_hdr_get(uint32_t *data, uint32_t **addr) -{ - *addr = data + 0; - return 4; -} - -/******************************************************************************* - * SWFORMAT: RX_REASON - * BLOCKS: - * SIZE: 51 - ******************************************************************************/ -void bcm78914_b0_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data) -{ - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_INVALID_REASON)) { - data[1] |= (0x1 << 0); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SLF)) { - data[1] |= (0x1 << 1); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_DLF)) { - data[1] |= (0x1 << 2); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L2MOVE)) { - data[1] |= (0x1 << 3); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L2CPU)) { - data[1] |= (0x1 << 4); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MISS)) { - data[1] |= (0x1 << 5); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3DST_MISS)) { - data[1] |= (0x1 << 6); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MOVE)) { - data[1] |= (0x1 << 7); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_MC_MISS)) { - data[1] |= (0x1 << 8); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_MISS)) { - data[1] |= (0x1 << 9); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_FFP)) { - data[1] |= (0x1 << 10); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3HDR_ERR)) { - data[1] |= (0x1 << 11); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_PROTOCOL_PKT)) { - data[1] |= (0x1 << 12); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_DOS_ATTACK)) { - data[1] |= (0x1 << 13); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_MARTIAN_ADDR)) { - data[1] |= (0x1 << 14); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_TUNNEL_ERR)) { - data[1] |= (0x1 << 15); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_SRC)) { - data[1] |= (0x1 << 16); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_DST)) { - data[1] |= (0x1 << 17); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_ICMP_REDIRECT)) { - data[1] |= (0x1 << 18); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_SLOWPATH)) { - data[1] |= (0x1 << 19); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PARITY_ERROR)) { - data[1] |= (0x1 << 20); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_MTU_CHECK_FAIL)) { - data[1] |= (0x1 << 21); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_TTL_CHECK)) { - data[1] |= (0x1 << 22); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_LABEL_MISS)) { - data[1] |= (0x1 << 23); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_INVALID_ACTION)) { - data[1] |= (0x1 << 24); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_INVALID_PAYLOAD)) { - data[1] |= (0x1 << 25); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_VFP)) { - data[1] |= (0x1 << 26); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PBT_NONUC_PKT)) { - data[1] |= (0x1 << 27); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_NEXT_HOP)) { - data[1] |= (0x1 << 28); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MY_STATION)) { - data[1] |= (0x1 << 29); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_TIME_SYNC)) { - data[1] |= (0x1 << 30); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_TUNNEL_DECAP_ECN_ERROR)) { - data[1] |= (0x1 << 31); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_BFD_SLOWPATH)) { - data[0] |= (0x1 << 0); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_BFD_ERROR)) { - data[0] |= (0x1 << 1); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PACKET_TRACE_TO_CPU)) { - data[0] |= (0x1 << 2); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT)) { - data[0] |= (0x1 << 3); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_ALERT_LABEL)) { - data[0] |= (0x1 << 4); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH)) { - data[0] |= (0x1 << 5); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_DLB_MONITOR)) { - data[0] |= (0x1 << 6); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_FLEX)) { - data[0] |= (0x1 << 7); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_UVLAN)) { - data[0] |= (0x1 << 8); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_SRV6_ERROR)) { - data[0] |= (0x1 << 9); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_VXLAN_VN_ID_MISS)) { - data[0] |= (0x1 << 10); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_VXLAN_SIP_MISS)) { - data[0] |= (0x1 << 11); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_ADAPT_MISS)) { - data[0] |= (0x1 << 12); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_INVALID_GSH_NON_GSH)) { - data[0] |= (0x1 << 13); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_APU_POLICY_CTC)) { - data[0] |= (0x1 << 14); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_DELAYED_CTC)) { - data[0] |= (0x1 << 15); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PORT_DOWN)) { - data[0] |= (0x1 << 16); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_SRV6_CONTROL_PKT)) { - data[0] |= (0x1 << 17); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_OUI_COMPRESSION_MISS)) { - data[0] |= (0x1 << 18); - } -} - -void bcm78914_b0_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons) -{ - uint32_t val; - COMPILER_REFERENCE(val); - if (data[1] & (0x1 << 0)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_INVALID_REASON); - } - if (data[1] & (0x1 << 1)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SLF); - } - if (data[1] & (0x1 << 2)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_DLF); - } - if (data[1] & (0x1 << 3)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L2MOVE); - } - if (data[1] & (0x1 << 4)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L2CPU); - } - if (data[1] & (0x1 << 5)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MISS); - } - if (data[1] & (0x1 << 6)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3DST_MISS); - } - if (data[1] & (0x1 << 7)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MOVE); - } - if (data[1] & (0x1 << 8)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_MC_MISS); - } - if (data[1] & (0x1 << 9)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_MISS); - } - if (data[1] & (0x1 << 10)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_FFP); - } - if (data[1] & (0x1 << 11)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3HDR_ERR); - } - if (data[1] & (0x1 << 12)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_PROTOCOL_PKT); - } - if (data[1] & (0x1 << 13)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_DOS_ATTACK); - } - if (data[1] & (0x1 << 14)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_MARTIAN_ADDR); - } - if (data[1] & (0x1 << 15)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_TUNNEL_ERR); - } - if (data[1] & (0x1 << 16)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_SRC); - } - if (data[1] & (0x1 << 17)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_DST); - } - if (data[1] & (0x1 << 18)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_ICMP_REDIRECT); - } - if (data[1] & (0x1 << 19)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_SLOWPATH); - } - if (data[1] & (0x1 << 20)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PARITY_ERROR); - } - if (data[1] & (0x1 << 21)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_MTU_CHECK_FAIL); - } - if (data[1] & (0x1 << 22)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_TTL_CHECK); - } - if (data[1] & (0x1 << 23)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_LABEL_MISS); - } - if (data[1] & (0x1 << 24)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_INVALID_ACTION); - } - if (data[1] & (0x1 << 25)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_INVALID_PAYLOAD); - } - if (data[1] & (0x1 << 26)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_VFP); - } - if (data[1] & (0x1 << 27)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PBT_NONUC_PKT); - } - if (data[1] & (0x1 << 28)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_NEXT_HOP); - } - if (data[1] & (0x1 << 29)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MY_STATION); - } - if (data[1] & (0x1 << 30)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_TIME_SYNC); - } - if (data[1] & (0x1 << 31)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_TUNNEL_DECAP_ECN_ERROR); - } - if (data[0] & (0x1 << 0)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_BFD_SLOWPATH); - } - if (data[0] & (0x1 << 1)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_BFD_ERROR); - } - if (data[0] & (0x1 << 2)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PACKET_TRACE_TO_CPU); - } - if (data[0] & (0x1 << 3)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT); - } - if (data[0] & (0x1 << 4)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_ALERT_LABEL); - } - if (data[0] & (0x1 << 5)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH); - } - if (data[0] & (0x1 << 6)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_DLB_MONITOR); - } - if (data[0] & (0x1 << 7)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_FLEX); - } - if (data[0] & (0x1 << 8)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_UVLAN); - } - if (data[0] & (0x1 << 9)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_SRV6_ERROR); - } - if (data[0] & (0x1 << 10)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_VXLAN_VN_ID_MISS); - } - if (data[0] & (0x1 << 11)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_VXLAN_SIP_MISS); - } - if (data[0] & (0x1 << 12)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_ADAPT_MISS); - } - if (data[0] & (0x1 << 13)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_INVALID_GSH_NON_GSH); - } - if (data[0] & (0x1 << 14)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_APU_POLICY_CTC); - } - if (data[0] & (0x1 << 15)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_DELAYED_CTC); - } - if (data[0] & (0x1 << 16)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PORT_DOWN); - } - if (data[0] & (0x1 << 17)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_SRV6_CONTROL_PKT); - } - if (data[0] & (0x1 << 18)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_OUI_COMPRESSION_MISS); - } -} - -/******************************************************************************* - * SWFORMAT: EP_RX_REASON - * BLOCKS: - * SIZE: 64 - ******************************************************************************/ -void bcm78914_b0_ep_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data) -{ - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_EP_CTC)) { - data[1] |= (0x1 << 0); - } -} - -void bcm78914_b0_ep_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons) -{ - uint32_t val; - COMPILER_REFERENCE(val); - if (data[1] & (0x1 << 0)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_EP_CTC); - } -} - -const bcmpkt_rxpmd_fget_t bcm78914_b0_rxpmd_fget = { - { - bcmpkt_rxpmd_unicast_queue_get, - bcmpkt_rxpmd_queue_num_get, - bcmpkt_rxpmd_cpu_cos_get, - NULL, - bcmpkt_rxpmd_matched_rule_get, - bcmpkt_rxpmd_pkt_length_get, - bcmpkt_rxpmd_src_port_num_get, - NULL, - NULL, - NULL, - bcmpkt_rxpmd_outer_vid_get, - bcmpkt_rxpmd_outer_cfi_get, - bcmpkt_rxpmd_outer_pri_get, - bcmpkt_rxpmd_special_packet_indicator_get, - bcmpkt_rxpmd_special_packet_type_get, - bcmpkt_rxpmd_change_dscp_get, - bcmpkt_rxpmd_dscp_get, - bcmpkt_rxpmd_change_ecn_get, - bcmpkt_rxpmd_ecn_get, - NULL, - bcmpkt_rxpmd_timestamp_get, - bcmpkt_rxpmd_timestamp_hi_get, - bcmpkt_rxpmd_mtp_index_get, - bcmpkt_rxpmd_bpdu_get, - NULL, - bcmpkt_rxpmd_l3only_get, - bcmpkt_rxpmd_ip_routed_get, - NULL, - NULL, - bcmpkt_rxpmd_uc_sw_copy_dropped_get, - bcmpkt_rxpmd_switch_get, - NULL, - NULL, - bcmpkt_rxpmd_ing_otag_action_get, - bcmpkt_rxpmd_ing_tag_type_get, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - bcmpkt_rxpmd_rx_bfd_start_offset_get, - bcmpkt_rxpmd_rx_bfd_start_offset_type_get, - bcmpkt_rxpmd_rx_bfd_session_index_get, - bcmpkt_rxpmd_reason_type_get, - bcmpkt_rxpmd_do_not_change_ttl_get, - bcmpkt_rxpmd_i2e_classid_type_get, - bcmpkt_rxpmd_i2e_classid_get, - bcmpkt_rxpmd_ing_l3_intf_get, - NULL, - NULL, - bcmpkt_rxpmd_entropy_label_get, - bcmpkt_rxpmd_tunnel_decap_type_get, - bcmpkt_rxpmd_dlb_id_valid_get, - bcmpkt_rxpmd_dlb_id_get, - NULL, - NULL, - NULL, - NULL, - bcmpkt_rxpmd_replication_or_nhop_index_get, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - bcmpkt_rxpmd_incoming_int_hdr_type_get, - NULL, - NULL, - NULL, - NULL, - bcmpkt_rxpmd_o_nhi_get, - NULL, - NULL, - bcmpkt_rxpmd_incoming_opaque_tag_status_get, - NULL, - NULL, - NULL, - NULL, - bcmpkt_rxpmd_ieee_802_1as_timestamp_enabled_get, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - bcmpkt_rxpmd_matched_rule_ep_get, - bcmpkt_rxpmd_is_egr_ts_get, - bcmpkt_rxpmd_modified_pkt_get, - NULL, - NULL - } -}; - - -const bcmpkt_rxpmd_fset_t bcm78914_b0_rxpmd_fset = { - { - bcmpkt_rxpmd_unicast_queue_set, - bcmpkt_rxpmd_queue_num_set, - bcmpkt_rxpmd_cpu_cos_set, - NULL, - bcmpkt_rxpmd_matched_rule_set, - bcmpkt_rxpmd_pkt_length_set, - bcmpkt_rxpmd_src_port_num_set, - NULL, - NULL, - NULL, - bcmpkt_rxpmd_outer_vid_set, - bcmpkt_rxpmd_outer_cfi_set, - bcmpkt_rxpmd_outer_pri_set, - bcmpkt_rxpmd_special_packet_indicator_set, - bcmpkt_rxpmd_special_packet_type_set, - bcmpkt_rxpmd_change_dscp_set, - bcmpkt_rxpmd_dscp_set, - bcmpkt_rxpmd_change_ecn_set, - bcmpkt_rxpmd_ecn_set, - NULL, - bcmpkt_rxpmd_timestamp_set, - bcmpkt_rxpmd_timestamp_hi_set, - bcmpkt_rxpmd_mtp_index_set, - bcmpkt_rxpmd_bpdu_set, - NULL, - bcmpkt_rxpmd_l3only_set, - bcmpkt_rxpmd_ip_routed_set, - NULL, - NULL, - bcmpkt_rxpmd_uc_sw_copy_dropped_set, - bcmpkt_rxpmd_switch_set, - NULL, - NULL, - bcmpkt_rxpmd_ing_otag_action_set, - bcmpkt_rxpmd_ing_tag_type_set, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - bcmpkt_rxpmd_rx_bfd_start_offset_set, - bcmpkt_rxpmd_rx_bfd_start_offset_type_set, - bcmpkt_rxpmd_rx_bfd_session_index_set, - bcmpkt_rxpmd_reason_type_set, - bcmpkt_rxpmd_do_not_change_ttl_set, - bcmpkt_rxpmd_i2e_classid_type_set, - bcmpkt_rxpmd_i2e_classid_set, - bcmpkt_rxpmd_ing_l3_intf_set, - NULL, - NULL, - bcmpkt_rxpmd_entropy_label_set, - bcmpkt_rxpmd_tunnel_decap_type_set, - bcmpkt_rxpmd_dlb_id_valid_set, - bcmpkt_rxpmd_dlb_id_set, - NULL, - NULL, - NULL, - NULL, - bcmpkt_rxpmd_replication_or_nhop_index_set, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - bcmpkt_rxpmd_incoming_int_hdr_type_set, - NULL, - NULL, - NULL, - NULL, - bcmpkt_rxpmd_o_nhi_set, - NULL, - NULL, - bcmpkt_rxpmd_incoming_opaque_tag_status_set, - NULL, - NULL, - NULL, - NULL, - bcmpkt_rxpmd_ieee_802_1as_timestamp_enabled_set, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - bcmpkt_rxpmd_matched_rule_ep_set, - bcmpkt_rxpmd_is_egr_ts_set, - bcmpkt_rxpmd_modified_pkt_set, - NULL, - NULL - } -}; - - -const bcmpkt_rxpmd_figet_t bcm78914_b0_rxpmd_figet = { - { - bcmpkt_rxpmd_i_size_get, - bcmpkt_rxpmd_i_reason_get, - bcmpkt_rxpmd_i_module_hdr_get, - NULL - } -}; - -static shr_enum_map_t bcm78914_b0_rxpmd_view_types[] = { - {NULL, -1}, -}; - -/* -2: unsupported, -1: global, others: view's value */ -static int bcm78914_b0_rxpmd_view_infos[BCMPKT_RXPMD_FID_COUNT] = { - -1, -1, -1, -2, -1, -1, -1, -2, -2, -2, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -2, -1, -1, -1, -1, -2, -1, -1, -2, -2, -1, -1, -2, - -2, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, - -1, -1, -1, -1, -1, -1, -1, -2, -2, -1, -1, -1, -1, -2, -2, -2, - -2, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -2, -2, -2, - -2, -1, -2, -2, -1, -2, -2, -2, -2, -1, -2, -2, -2, -2, -2, -2, - -1, -1, -1, -2, -2, -}; - - -void bcm78914_b0_rxpmd_view_info_get(bcmpkt_pmd_view_info_t *info) -{ - info->view_infos = bcm78914_b0_rxpmd_view_infos; - info->view_types = bcm78914_b0_rxpmd_view_types; - info->view_type_get = NULL; -} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78914_b0/bcm78914_b0_pkt_txpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78914_b0/bcm78914_b0_pkt_txpmd.c deleted file mode 100644 index b709c932b80..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78914_b0/bcm78914_b0_pkt_txpmd.c +++ /dev/null @@ -1,1059 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated from the registers file. - * Edits to this file will be lost when it is regenerated. - * Tool: INTERNAL/regs/xgs/generate-pmd.pl - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - * This file provides TXPMD access functions for BCM78914_B0. - * - ******************************************************************************/ - -#include -#include - -#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) -#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) -#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) -#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) -/******************************************************************************* - * SWFORMAT: TXPMD - * BLOCKS: - * SIZE: 128 - ******************************************************************************/ -static void bcmpkt_txpmd_start_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[0], 30, 2, val); -} - -static uint32_t bcmpkt_txpmd_start_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[0], 30, 2); - return val; -} - -static void bcmpkt_txpmd_header_type_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[0], 24, 6, val); -} - -static uint32_t bcmpkt_txpmd_header_type_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[0], 24, 6); - return val; -} - -static void bcmpkt_txpmd_cell_error_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return; - } - WORD_FIELD_SET(data[3], 9, 1, val); -} - -static uint32_t bcmpkt_txpmd_cell_error_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return 0; - } - val = WORD_FIELD_GET(data[3], 9, 1); - return val; -} - -static void bcmpkt_txpmd_src_modid_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return; - } - WORD_FIELD_SET(data[2], 20, 8, val); -} - -static uint32_t bcmpkt_txpmd_src_modid_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return 0; - } - val = WORD_FIELD_GET(data[2], 20, 8); - return val; -} - -static void bcmpkt_txpmd_cos_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return; - } - WORD_FIELD_SET(data[3], 12, 6, val); -} - -static uint32_t bcmpkt_txpmd_cos_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return 0; - } - val = WORD_FIELD_GET(data[3], 12, 6); - return val; -} - -static void bcmpkt_txpmd_input_pri_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return; - } - WORD_FIELD_SET(data[2], 8, 4, val); -} - -static uint32_t bcmpkt_txpmd_input_pri_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return 0; - } - val = WORD_FIELD_GET(data[2], 8, 4); - return val; -} - -static void bcmpkt_txpmd_unicast_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return; - } - WORD_FIELD_SET(data[2], 29, 1, val); -} - -static uint32_t bcmpkt_txpmd_unicast_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return 0; - } - val = WORD_FIELD_GET(data[2], 29, 1); - return val; -} - -static void bcmpkt_txpmd_rqe_q_num_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return; - } - WORD_FIELD_SET(data[2], 12, 3, val); -} - -static uint32_t bcmpkt_txpmd_rqe_q_num_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return 0; - } - val = WORD_FIELD_GET(data[2], 12, 3); - return val; -} - -static void bcmpkt_txpmd_ieee1588_one_step_enable_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return; - } - WORD_FIELD_SET(data[2], 7, 1, val); -} - -static uint32_t bcmpkt_txpmd_ieee1588_one_step_enable_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return 0; - } - val = WORD_FIELD_GET(data[2], 7, 1); - return val; -} - -static void bcmpkt_txpmd_ieee1588_regen_udp_checksum_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return; - } - WORD_FIELD_SET(data[3], 8, 1, val); -} - -static uint32_t bcmpkt_txpmd_ieee1588_regen_udp_checksum_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return 0; - } - val = WORD_FIELD_GET(data[3], 8, 1); - return val; -} - -static void bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return; - } - WORD_FIELD_SET(data[2], 6, 1, val); -} - -static uint32_t bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return 0; - } - val = WORD_FIELD_GET(data[2], 6, 1); - return val; -} - -static void bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return; - } - WORD_FIELD_SET(data[3], 0, 8, val); -} - -static uint32_t bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return 0; - } - val = WORD_FIELD_GET(data[3], 0, 8); - return val; -} - -static void bcmpkt_txpmd_tx_ts_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return; - } - WORD_FIELD_SET(data[2], 28, 1, val); -} - -static uint32_t bcmpkt_txpmd_tx_ts_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return 0; - } - val = WORD_FIELD_GET(data[2], 28, 1); - return val; -} - -static void bcmpkt_txpmd_spid_override_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return; - } - WORD_FIELD_SET(data[2], 19, 1, val); -} - -static uint32_t bcmpkt_txpmd_spid_override_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return 0; - } - val = WORD_FIELD_GET(data[2], 19, 1); - return val; -} - -static void bcmpkt_txpmd_spid_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return; - } - WORD_FIELD_SET(data[2], 17, 2, val); -} - -static uint32_t bcmpkt_txpmd_spid_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return 0; - } - val = WORD_FIELD_GET(data[2], 17, 2); - return val; -} - -static void bcmpkt_txpmd_spap_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return; - } - WORD_FIELD_SET(data[2], 15, 2, val); -} - -static uint32_t bcmpkt_txpmd_spap_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return 0; - } - val = WORD_FIELD_GET(data[2], 15, 2); - return val; -} - -static void bcmpkt_txpmd_cng_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return; - } - WORD_FIELD_SET(data[3], 10, 2, val); -} - -static uint32_t bcmpkt_txpmd_cng_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return 0; - } - val = WORD_FIELD_GET(data[3], 10, 2); - return val; -} - -static void bcmpkt_txpmd_destination_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return; - } - WORD_FIELD_SET(data[3], 18, 14, val & MASK(14)); - WORD_FIELD_SET(data[2], 0, 2, (val >> 14) & MASK(2)); -} - -static uint32_t bcmpkt_txpmd_destination_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return 0; - } - val = (WORD_FIELD_GET(data[3], 18, 14) | (WORD_FIELD_GET(data[2], 0, 2) << 14)) ; - return val; -} - -static void bcmpkt_txpmd_destination_type_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return; - } - WORD_FIELD_SET(data[2], 2, 4, val); -} - -static uint32_t bcmpkt_txpmd_destination_type_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return 0; - } - val = WORD_FIELD_GET(data[2], 2, 4); - return val; -} - -static void bcmpkt_txpmd_wred_mark_eligible_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return; - } - WORD_FIELD_SET(data[2], 30, 1, val); -} - -static uint32_t bcmpkt_txpmd_wred_mark_eligible_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return 0; - } - val = WORD_FIELD_GET(data[2], 30, 1); - return val; -} - -static void bcmpkt_txpmd_wred_response_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return; - } - WORD_FIELD_SET(data[2], 31, 1, val); -} - -static uint32_t bcmpkt_txpmd_wred_response_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return 0; - } - val = WORD_FIELD_GET(data[2], 31, 1); - return val; -} - -static void bcmpkt_txpmd_cpu_tx_mcast_lb_index_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return; - } - WORD_FIELD_SET(data[3], 0, 8, val); -} - -static uint32_t bcmpkt_txpmd_cpu_tx_mcast_lb_index_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return 0; - } - val = WORD_FIELD_GET(data[3], 0, 8); - return val; -} - -static void bcmpkt_txpmd_cpu_tx_ecmp_member_id_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return; - } - WORD_FIELD_SET(data[3], 0, 17, val); -} - -static uint32_t bcmpkt_txpmd_cpu_tx_ecmp_member_id_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return 0; - } - val = WORD_FIELD_GET(data[3], 0, 17); - return val; -} - -static void bcmpkt_txpmd_cpu_tx_destination_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return; - } - WORD_FIELD_SET(data[3], 27, 5, val & MASK(5)); - WORD_FIELD_SET(data[2], 0, 11, (val >> 5) & MASK(11)); -} - -static uint32_t bcmpkt_txpmd_cpu_tx_destination_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return 0; - } - val = (WORD_FIELD_GET(data[3], 27, 5) | (WORD_FIELD_GET(data[2], 0, 11) << 5)) ; - return val; -} - -static void bcmpkt_txpmd_cpu_tx_destination_type_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return; - } - WORD_FIELD_SET(data[2], 11, 4, val); -} - -static uint32_t bcmpkt_txpmd_cpu_tx_destination_type_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return 0; - } - val = WORD_FIELD_GET(data[2], 11, 4); - return val; -} - -static void bcmpkt_txpmd_cpu_tx_dp_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return; - } - WORD_FIELD_SET(data[2], 15, 2, val); -} - -static uint32_t bcmpkt_txpmd_cpu_tx_dp_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return 0; - } - val = WORD_FIELD_GET(data[2], 15, 2); - return val; -} - -static void bcmpkt_txpmd_cpu_tx_input_pri_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return; - } - WORD_FIELD_SET(data[2], 17, 4, val); -} - -static uint32_t bcmpkt_txpmd_cpu_tx_input_pri_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return 0; - } - val = WORD_FIELD_GET(data[2], 17, 4); - return val; -} - -static void bcmpkt_txpmd_cpu_tx_int_cn_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return; - } - WORD_FIELD_SET(data[2], 21, 2, val); -} - -static uint32_t bcmpkt_txpmd_cpu_tx_int_cn_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return 0; - } - val = WORD_FIELD_GET(data[2], 21, 2); - return val; -} - -static void bcmpkt_txpmd_cpu_tx_int_pri_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return; - } - WORD_FIELD_SET(data[2], 23, 4, val); -} - -static uint32_t bcmpkt_txpmd_cpu_tx_int_pri_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return 0; - } - val = WORD_FIELD_GET(data[2], 23, 4); - return val; -} - -static void bcmpkt_txpmd_cpu_tx_mcast_lb_index_vld_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return; - } - WORD_FIELD_SET(data[2], 27, 1, val); -} - -static uint32_t bcmpkt_txpmd_cpu_tx_mcast_lb_index_vld_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return 0; - } - val = WORD_FIELD_GET(data[2], 27, 1); - return val; -} - -static void bcmpkt_txpmd_cpu_tx_pkt_profile_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return; - } - WORD_FIELD_SET(data[2], 28, 3, val); -} - -static uint32_t bcmpkt_txpmd_cpu_tx_pkt_profile_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return 0; - } - val = WORD_FIELD_GET(data[2], 28, 3); - return val; -} - -static void bcmpkt_txpmd_cpu_tx_qos_fields_vld_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return; - } - WORD_FIELD_SET(data[2], 31, 1, val); -} - -static uint32_t bcmpkt_txpmd_cpu_tx_qos_fields_vld_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return 0; - } - val = WORD_FIELD_GET(data[2], 31, 1); - return val; -} - -static void bcmpkt_txpmd_cpu_tx_routed_pkt_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return; - } - WORD_FIELD_SET(data[1], 0, 1, val); -} - -static uint32_t bcmpkt_txpmd_cpu_tx_routed_pkt_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return 0; - } - val = WORD_FIELD_GET(data[1], 0, 1); - return val; -} - -static void bcmpkt_txpmd_cpu_tx_vrf_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return; - } - WORD_FIELD_SET(data[1], 14, 13, val); -} - -static uint32_t bcmpkt_txpmd_cpu_tx_vrf_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return 0; - } - val = WORD_FIELD_GET(data[1], 14, 13); - return val; -} - -static void bcmpkt_txpmd_cpu_tx_vrf_valid_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return; - } - WORD_FIELD_SET(data[1], 27, 1, val); -} - -static uint32_t bcmpkt_txpmd_cpu_tx_vrf_valid_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return 0; - } - val = WORD_FIELD_GET(data[1], 27, 1); - return val; -} - -static void bcmpkt_txpmd_cpu_tx_cookie_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return; - } - WORD_FIELD_SET(data[3], 17, 9, val); -} - -static uint32_t bcmpkt_txpmd_cpu_tx_cookie_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return 0; - } - val = WORD_FIELD_GET(data[3], 17, 9); - return val; -} - -static void bcmpkt_txpmd_cpu_tx_cookie_valid_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return; - } - WORD_FIELD_SET(data[3], 26, 1, val); -} - -static uint32_t bcmpkt_txpmd_cpu_tx_cookie_valid_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return 0; - } - val = WORD_FIELD_GET(data[3], 26, 1); - return val; -} - -static void bcmpkt_txpmd_cookie_7_0_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return; - } - WORD_FIELD_SET(data[3], 0, 8, val); -} - -static uint32_t bcmpkt_txpmd_cookie_7_0_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return 0; - } - val = WORD_FIELD_GET(data[3], 0, 8); - return val; -} - -static void bcmpkt_txpmd_cookie_8_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return; - } - WORD_FIELD_SET(data[3], 8, 1, val); -} - -static uint32_t bcmpkt_txpmd_cookie_8_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return 0; - } - val = WORD_FIELD_GET(data[3], 8, 1); - return val; -} - -static void bcmpkt_txpmd_cpu_tx_svp_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return; - } - WORD_FIELD_SET(data[1], 1, 13, val); -} - -static uint32_t bcmpkt_txpmd_cpu_tx_svp_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return 0; - } - val = WORD_FIELD_GET(data[1], 1, 13); - return val; -} - -static uint32_t bcmpkt_txpmd_i_size_get(uint32_t *data, uint32_t **addr) -{ - return 4; -} - - -const bcmpkt_txpmd_fget_t bcm78914_b0_txpmd_fget = { - { - bcmpkt_txpmd_start_get, - bcmpkt_txpmd_header_type_get, - NULL, - NULL, - NULL, - NULL, - NULL, - bcmpkt_txpmd_cell_error_get, - NULL, - bcmpkt_txpmd_src_modid_get, - bcmpkt_txpmd_cos_get, - bcmpkt_txpmd_input_pri_get, - bcmpkt_txpmd_unicast_get, - bcmpkt_txpmd_rqe_q_num_get, - NULL, - bcmpkt_txpmd_ieee1588_one_step_enable_get, - bcmpkt_txpmd_ieee1588_regen_udp_checksum_get, - bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get, - bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get, - bcmpkt_txpmd_tx_ts_get, - bcmpkt_txpmd_spid_override_get, - bcmpkt_txpmd_spid_get, - bcmpkt_txpmd_spap_get, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - bcmpkt_txpmd_cng_get, - bcmpkt_txpmd_destination_get, - bcmpkt_txpmd_destination_type_get, - bcmpkt_txpmd_wred_mark_eligible_get, - bcmpkt_txpmd_wred_response_get, - bcmpkt_txpmd_cpu_tx_mcast_lb_index_get, - bcmpkt_txpmd_cpu_tx_ecmp_member_id_get, - bcmpkt_txpmd_cpu_tx_destination_get, - bcmpkt_txpmd_cpu_tx_destination_type_get, - bcmpkt_txpmd_cpu_tx_dp_get, - bcmpkt_txpmd_cpu_tx_input_pri_get, - bcmpkt_txpmd_cpu_tx_int_cn_get, - bcmpkt_txpmd_cpu_tx_int_pri_get, - bcmpkt_txpmd_cpu_tx_mcast_lb_index_vld_get, - bcmpkt_txpmd_cpu_tx_pkt_profile_get, - bcmpkt_txpmd_cpu_tx_qos_fields_vld_get, - bcmpkt_txpmd_cpu_tx_routed_pkt_get, - NULL, - NULL, - bcmpkt_txpmd_cpu_tx_vrf_get, - bcmpkt_txpmd_cpu_tx_vrf_valid_get, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - bcmpkt_txpmd_cpu_tx_cookie_get, - bcmpkt_txpmd_cpu_tx_cookie_valid_get, - bcmpkt_txpmd_cookie_7_0_get, - bcmpkt_txpmd_cookie_8_get, - NULL, - NULL, - NULL, - NULL, - bcmpkt_txpmd_cpu_tx_svp_get, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL - } -}; - - -const bcmpkt_txpmd_fset_t bcm78914_b0_txpmd_fset = { - { - bcmpkt_txpmd_start_set, - bcmpkt_txpmd_header_type_set, - NULL, - NULL, - NULL, - NULL, - NULL, - bcmpkt_txpmd_cell_error_set, - NULL, - bcmpkt_txpmd_src_modid_set, - bcmpkt_txpmd_cos_set, - bcmpkt_txpmd_input_pri_set, - bcmpkt_txpmd_unicast_set, - bcmpkt_txpmd_rqe_q_num_set, - NULL, - bcmpkt_txpmd_ieee1588_one_step_enable_set, - bcmpkt_txpmd_ieee1588_regen_udp_checksum_set, - bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set, - bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set, - bcmpkt_txpmd_tx_ts_set, - bcmpkt_txpmd_spid_override_set, - bcmpkt_txpmd_spid_set, - bcmpkt_txpmd_spap_set, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - bcmpkt_txpmd_cng_set, - bcmpkt_txpmd_destination_set, - bcmpkt_txpmd_destination_type_set, - bcmpkt_txpmd_wred_mark_eligible_set, - bcmpkt_txpmd_wred_response_set, - bcmpkt_txpmd_cpu_tx_mcast_lb_index_set, - bcmpkt_txpmd_cpu_tx_ecmp_member_id_set, - bcmpkt_txpmd_cpu_tx_destination_set, - bcmpkt_txpmd_cpu_tx_destination_type_set, - bcmpkt_txpmd_cpu_tx_dp_set, - bcmpkt_txpmd_cpu_tx_input_pri_set, - bcmpkt_txpmd_cpu_tx_int_cn_set, - bcmpkt_txpmd_cpu_tx_int_pri_set, - bcmpkt_txpmd_cpu_tx_mcast_lb_index_vld_set, - bcmpkt_txpmd_cpu_tx_pkt_profile_set, - bcmpkt_txpmd_cpu_tx_qos_fields_vld_set, - bcmpkt_txpmd_cpu_tx_routed_pkt_set, - NULL, - NULL, - bcmpkt_txpmd_cpu_tx_vrf_set, - bcmpkt_txpmd_cpu_tx_vrf_valid_set, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - bcmpkt_txpmd_cpu_tx_cookie_set, - bcmpkt_txpmd_cpu_tx_cookie_valid_set, - bcmpkt_txpmd_cookie_7_0_set, - bcmpkt_txpmd_cookie_8_set, - NULL, - NULL, - NULL, - NULL, - bcmpkt_txpmd_cpu_tx_svp_set, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL - } -}; - - -const bcmpkt_txpmd_figet_t bcm78914_b0_txpmd_figet = { - { - bcmpkt_txpmd_i_size_get - } -}; - -static shr_enum_map_t bcm78914_b0_txpmd_view_types[] = { - {"sobmh_from_cpu", 1}, - {"cpu_tx", 2}, - {NULL, -1}, -}; - -/* -2: unsupported, -1: global, others: view's value */ -static int bcm78914_b0_txpmd_view_infos[BCMPKT_TXPMD_FID_COUNT] = { - -1, -1, -2, -2, -2, -2, -2, 1, -2, 1, 1, 1, 1, 1, -2, 1, - 1, 1, 1, 1, 1, 1, 1, -2, -2, -2, -2, -2, -2, -2, 1, 1, - 1, 1, 1, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, -2, - -2, 2, 2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, - -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, 2, 2, 1, 1, -2, -2, - -2, -2, 2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, - -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, - -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, - -2, -2, -}; - - -void bcm78914_b0_txpmd_view_info_get(bcmpkt_pmd_view_info_t *info) -{ - info->view_infos = bcm78914_b0_txpmd_view_infos; - info->view_types = bcm78914_b0_txpmd_view_types; - info->view_type_get = bcmpkt_txpmd_header_type_get; -} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78914_b0/bcm78914_b0_pmd_field.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78914_b0/bcm78914_b0_pmd_field.c deleted file mode 100644 index e5b55ee9e25..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78914_b0/bcm78914_b0_pmd_field.c +++ /dev/null @@ -1,3359 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated from the registers file. - * Edits to this file will be lost when it is regenerated. - * Tool: INTERNAL/regs/xgs/generate-pmd.pl - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - * This file provides PMD field info for BCM78914_B0. - * - ******************************************************************************/ - -#include -#include - -static bcmpkt_field_info_t -field_fmt_0_0_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 0; - info.maxbit = 0; - return info; -} - -static void -field_fmt_0_0_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xfffffffe) | (*val & 0x1); -} - -static void -field_fmt_0_0_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = pmd[13] & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_0_16_3_3_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 0; - info.maxbit = 16; - return info; -} - -static void -field_fmt_0_16_3_3_set(uint32_t *pmd, uint32_t *val) -{ - pmd[3] = (pmd[3] & 0xfffe0000) | (*val & 0x1ffff); -} - -static void -field_fmt_0_16_3_3_get(uint32_t *pmd, uint32_t *val) -{ - *val = pmd[3] & 0x1ffff; -} - -static bcmpkt_field_info_t -field_fmt_0_63_13_12_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 0; - info.maxbit = 63; - return info; -} - -static void -field_fmt_0_63_13_12_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = val[0]; - pmd[12] = val[1]; -} - -static void -field_fmt_0_63_13_12_get(uint32_t *pmd, uint32_t *val) -{ - val[0] = pmd[13]; - val[1] = pmd[12]; -} - -static bcmpkt_field_info_t -field_fmt_0_7_3_3_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 0; - info.maxbit = 7; - return info; -} - -static void -field_fmt_0_7_3_3_set(uint32_t *pmd, uint32_t *val) -{ - pmd[3] = (pmd[3] & 0xffffff00) | (*val & 0xff); -} - -static void -field_fmt_0_7_3_3_get(uint32_t *pmd, uint32_t *val) -{ - *val = pmd[3] & 0xff; -} - -static bcmpkt_field_info_t -field_fmt_10_10_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 10; - info.maxbit = 10; - return info; -} - -static void -field_fmt_10_10_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xfffffbff) | ((*val & 0x1) << 10); -} - -static void -field_fmt_10_10_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 10) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_10_11_3_3_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 10; - info.maxbit = 11; - return info; -} - -static void -field_fmt_10_11_3_3_set(uint32_t *pmd, uint32_t *val) -{ - pmd[3] = (pmd[3] & 0xfffff3ff) | ((*val & 0x3) << 10); -} - -static void -field_fmt_10_11_3_3_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[3] >> 10) & 0x3; -} - -static bcmpkt_field_info_t -field_fmt_115_127_10_10_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 115; - info.maxbit = 127; - return info; -} - -static void -field_fmt_115_127_10_10_set(uint32_t *pmd, uint32_t *val) -{ - pmd[10] = (pmd[10] & 0x7ffff) | (*val << 19); -} - -static void -field_fmt_115_127_10_10_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[10] >> 19) & 0x1fff; -} - -static bcmpkt_field_info_t -field_fmt_116_119_0_0_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 116; - info.maxbit = 119; - return info; -} - -static void -field_fmt_116_119_0_0_set(uint32_t *pmd, uint32_t *val) -{ - pmd[0] = (pmd[0] & 0xff0fffff) | ((*val & 0xf) << 20); -} - -static void -field_fmt_116_119_0_0_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[0] >> 20) & 0xf; -} - -static bcmpkt_field_info_t -field_fmt_11_11_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 11; - info.maxbit = 11; - return info; -} - -static void -field_fmt_11_11_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xfffff7ff) | ((*val & 0x1) << 11); -} - -static void -field_fmt_11_11_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 11) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_120_125_0_0_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 120; - info.maxbit = 125; - return info; -} - -static void -field_fmt_120_125_0_0_set(uint32_t *pmd, uint32_t *val) -{ - pmd[0] = (pmd[0] & 0xc0ffffff) | ((*val & 0x3f) << 24); -} - -static void -field_fmt_120_125_0_0_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[0] >> 24) & 0x3f; -} - -static bcmpkt_field_info_t -field_fmt_126_127_0_0_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 126; - info.maxbit = 127; - return info; -} - -static void -field_fmt_126_127_0_0_set(uint32_t *pmd, uint32_t *val) -{ - pmd[0] = (pmd[0] & 0x3fffffff) | (*val << 30); -} - -static void -field_fmt_126_127_0_0_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[0] >> 30) & 0x3; -} - -static bcmpkt_field_info_t -field_fmt_128_128_9_9_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 128; - info.maxbit = 128; - return info; -} - -static void -field_fmt_128_128_9_9_set(uint32_t *pmd, uint32_t *val) -{ - pmd[9] = (pmd[9] & 0xfffffffe) | (*val & 0x1); -} - -static void -field_fmt_128_128_9_9_get(uint32_t *pmd, uint32_t *val) -{ - *val = pmd[9] & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_129_130_9_9_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 129; - info.maxbit = 130; - return info; -} - -static void -field_fmt_129_130_9_9_set(uint32_t *pmd, uint32_t *val) -{ - pmd[9] = (pmd[9] & 0xfffffff9) | ((*val & 0x3) << 1); -} - -static void -field_fmt_129_130_9_9_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[9] >> 1) & 0x3; -} - -static bcmpkt_field_info_t -field_fmt_12_12_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 12; - info.maxbit = 12; - return info; -} - -static void -field_fmt_12_12_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xffffefff) | ((*val & 0x1) << 12); -} - -static void -field_fmt_12_12_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 12) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_12_17_3_3_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 12; - info.maxbit = 17; - return info; -} - -static void -field_fmt_12_17_3_3_set(uint32_t *pmd, uint32_t *val) -{ - pmd[3] = (pmd[3] & 0xfffc0fff) | ((*val & 0x3f) << 12); -} - -static void -field_fmt_12_17_3_3_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[3] >> 12) & 0x3f; -} - -static bcmpkt_field_info_t -field_fmt_131_144_9_9_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 131; - info.maxbit = 144; - return info; -} - -static void -field_fmt_131_144_9_9_set(uint32_t *pmd, uint32_t *val) -{ - pmd[9] = (pmd[9] & 0xfffe0007) | ((*val & 0x3fff) << 3); -} - -static void -field_fmt_131_144_9_9_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[9] >> 3) & 0x3fff; -} - -static bcmpkt_field_info_t -field_fmt_13_13_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 13; - info.maxbit = 13; - return info; -} - -static void -field_fmt_13_13_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xffffdfff) | ((*val & 0x1) << 13); -} - -static void -field_fmt_13_13_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 13) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_145_159_9_9_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 145; - info.maxbit = 159; - return info; -} - -static void -field_fmt_145_159_9_9_set(uint32_t *pmd, uint32_t *val) -{ - pmd[9] = (pmd[9] & 0x1ffff) | (*val << 17); -} - -static void -field_fmt_145_159_9_9_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[9] >> 17) & 0x7fff; -} - -static bcmpkt_field_info_t -field_fmt_14_14_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 14; - info.maxbit = 14; - return info; -} - -static void -field_fmt_14_14_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xffffbfff) | ((*val & 0x1) << 14); -} - -static void -field_fmt_14_14_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 14) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_15_15_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 15; - info.maxbit = 15; - return info; -} - -static void -field_fmt_15_15_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xffff7fff) | ((*val & 0x1) << 15); -} - -static void -field_fmt_15_15_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 15) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_160_160_8_8_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 160; - info.maxbit = 160; - return info; -} - -static void -field_fmt_160_160_8_8_set(uint32_t *pmd, uint32_t *val) -{ - pmd[8] = (pmd[8] & 0xfffffffe) | (*val & 0x1); -} - -static void -field_fmt_160_160_8_8_get(uint32_t *pmd, uint32_t *val) -{ - *val = pmd[8] & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_161_161_8_8_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 161; - info.maxbit = 161; - return info; -} - -static void -field_fmt_161_161_8_8_set(uint32_t *pmd, uint32_t *val) -{ - pmd[8] = (pmd[8] & 0xfffffffd) | ((*val & 0x1) << 1); -} - -static void -field_fmt_161_161_8_8_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[8] >> 1) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_162_162_8_8_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 162; - info.maxbit = 162; - return info; -} - -static void -field_fmt_162_162_8_8_set(uint32_t *pmd, uint32_t *val) -{ - pmd[8] = (pmd[8] & 0xfffffffb) | ((*val & 0x1) << 2); -} - -static void -field_fmt_162_162_8_8_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[8] >> 2) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_163_163_8_8_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 163; - info.maxbit = 163; - return info; -} - -static void -field_fmt_163_163_8_8_set(uint32_t *pmd, uint32_t *val) -{ - pmd[8] = (pmd[8] & 0xfffffff7) | ((*val & 0x1) << 3); -} - -static void -field_fmt_163_163_8_8_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[8] >> 3) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_164_164_8_8_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 164; - info.maxbit = 164; - return info; -} - -static void -field_fmt_164_164_8_8_set(uint32_t *pmd, uint32_t *val) -{ - pmd[8] = (pmd[8] & 0xffffffef) | ((*val & 0x1) << 4); -} - -static void -field_fmt_164_164_8_8_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[8] >> 4) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_165_165_8_8_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 165; - info.maxbit = 165; - return info; -} - -static void -field_fmt_165_165_8_8_set(uint32_t *pmd, uint32_t *val) -{ - pmd[8] = (pmd[8] & 0xffffffdf) | ((*val & 0x1) << 5); -} - -static void -field_fmt_165_165_8_8_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[8] >> 5) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_166_168_8_8_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 166; - info.maxbit = 168; - return info; -} - -static void -field_fmt_166_168_8_8_set(uint32_t *pmd, uint32_t *val) -{ - pmd[8] = (pmd[8] & 0xfffffe3f) | ((*val & 0x7) << 6); -} - -static void -field_fmt_166_168_8_8_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[8] >> 6) & 0x7; -} - -static bcmpkt_field_info_t -field_fmt_166_171_8_8_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 166; - info.maxbit = 171; - return info; -} - -static void -field_fmt_166_171_8_8_set(uint32_t *pmd, uint32_t *val) -{ - pmd[8] = (pmd[8] & 0xfffff03f) | ((*val & 0x3f) << 6); -} - -static void -field_fmt_166_171_8_8_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[8] >> 6) & 0x3f; -} - -static bcmpkt_field_info_t -field_fmt_16_16_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 16; - info.maxbit = 16; - return info; -} - -static void -field_fmt_16_16_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xfffeffff) | ((*val & 0x1) << 16); -} - -static void -field_fmt_16_16_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 16) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_16_18_3_3_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 16; - info.maxbit = 18; - return info; -} - -static void -field_fmt_16_18_3_3_set(uint32_t *pmd, uint32_t *val) -{ - pmd[3] = (pmd[3] & 0xfff8ffff) | ((*val & 0x7) << 16); -} - -static void -field_fmt_16_18_3_3_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[3] >> 16) & 0x7; -} - -static bcmpkt_field_info_t -field_fmt_172_173_8_8_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 172; - info.maxbit = 173; - return info; -} - -static void -field_fmt_172_173_8_8_set(uint32_t *pmd, uint32_t *val) -{ - pmd[8] = (pmd[8] & 0xffffcfff) | ((*val & 0x3) << 12); -} - -static void -field_fmt_172_173_8_8_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[8] >> 12) & 0x3; -} - -static bcmpkt_field_info_t -field_fmt_174_174_8_8_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 174; - info.maxbit = 174; - return info; -} - -static void -field_fmt_174_174_8_8_set(uint32_t *pmd, uint32_t *val) -{ - pmd[8] = (pmd[8] & 0xffffbfff) | ((*val & 0x1) << 14); -} - -static void -field_fmt_174_174_8_8_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[8] >> 14) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_175_175_8_8_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 175; - info.maxbit = 175; - return info; -} - -static void -field_fmt_175_175_8_8_set(uint32_t *pmd, uint32_t *val) -{ - pmd[8] = (pmd[8] & 0xffff7fff) | ((*val & 0x1) << 15); -} - -static void -field_fmt_175_175_8_8_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[8] >> 15) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_176_184_8_8_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 176; - info.maxbit = 184; - return info; -} - -static void -field_fmt_176_184_8_8_set(uint32_t *pmd, uint32_t *val) -{ - pmd[8] = (pmd[8] & 0xfe00ffff) | ((*val & 0x1ff) << 16); -} - -static void -field_fmt_176_184_8_8_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[8] >> 16) & 0x1ff; -} - -static bcmpkt_field_info_t -field_fmt_176_187_8_8_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 176; - info.maxbit = 187; - return info; -} - -static void -field_fmt_176_187_8_8_set(uint32_t *pmd, uint32_t *val) -{ - pmd[8] = (pmd[8] & 0xf000ffff) | ((*val & 0xfff) << 16); -} - -static void -field_fmt_176_187_8_8_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[8] >> 16) & 0xfff; -} - -static bcmpkt_field_info_t -field_fmt_17_17_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 17; - info.maxbit = 17; - return info; -} - -static void -field_fmt_17_17_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xfffdffff) | ((*val & 0x1) << 17); -} - -static void -field_fmt_17_17_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 17) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_17_25_3_3_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 17; - info.maxbit = 25; - return info; -} - -static void -field_fmt_17_25_3_3_set(uint32_t *pmd, uint32_t *val) -{ - pmd[3] = (pmd[3] & 0xfc01ffff) | ((*val & 0x1ff) << 17); -} - -static void -field_fmt_17_25_3_3_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[3] >> 17) & 0x1ff; -} - -static bcmpkt_field_info_t -field_fmt_185_185_8_8_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 185; - info.maxbit = 185; - return info; -} - -static void -field_fmt_185_185_8_8_set(uint32_t *pmd, uint32_t *val) -{ - pmd[8] = (pmd[8] & 0xfdffffff) | ((*val & 0x1) << 25); -} - -static void -field_fmt_185_185_8_8_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[8] >> 25) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_188_190_8_8_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 188; - info.maxbit = 190; - return info; -} - -static void -field_fmt_188_190_8_8_set(uint32_t *pmd, uint32_t *val) -{ - pmd[8] = (pmd[8] & 0x8fffffff) | ((*val & 0x7) << 28); -} - -static void -field_fmt_188_190_8_8_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[8] >> 28) & 0x7; -} - -static bcmpkt_field_info_t -field_fmt_18_18_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 18; - info.maxbit = 18; - return info; -} - -static void -field_fmt_18_18_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xfffbffff) | ((*val & 0x1) << 18); -} - -static void -field_fmt_18_18_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 18) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_18_33_3_2_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 18; - info.maxbit = 33; - return info; -} - -static void -field_fmt_18_33_3_2_set(uint32_t *pmd, uint32_t *val) -{ - pmd[3] = (pmd[3] & 0x3ffff) | (*val << 18); - pmd[2] = (pmd[2] & 0xfffffffc) | ((*val >> 14) & 0x3); -} - -static void -field_fmt_18_33_3_2_get(uint32_t *pmd, uint32_t *val) -{ - *val = ((pmd[3] >> 18) | (pmd[2] << 14)) & 0xffff; -} - -static bcmpkt_field_info_t -field_fmt_191_191_8_8_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 191; - info.maxbit = 191; - return info; -} - -static void -field_fmt_191_191_8_8_set(uint32_t *pmd, uint32_t *val) -{ - pmd[8] = (pmd[8] & 0x7fffffff) | (*val << 31); -} - -static void -field_fmt_191_191_8_8_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[8] >> 31) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_192_194_7_7_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 192; - info.maxbit = 194; - return info; -} - -static void -field_fmt_192_194_7_7_set(uint32_t *pmd, uint32_t *val) -{ - pmd[7] = (pmd[7] & 0xfffffff8) | (*val & 0x7); -} - -static void -field_fmt_192_194_7_7_get(uint32_t *pmd, uint32_t *val) -{ - *val = pmd[7] & 0x7; -} - -static bcmpkt_field_info_t -field_fmt_195_206_7_7_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 195; - info.maxbit = 206; - return info; -} - -static void -field_fmt_195_206_7_7_set(uint32_t *pmd, uint32_t *val) -{ - pmd[7] = (pmd[7] & 0xffff8007) | ((*val & 0xfff) << 3); -} - -static void -field_fmt_195_206_7_7_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[7] >> 3) & 0xfff; -} - -static bcmpkt_field_info_t -field_fmt_19_19_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 19; - info.maxbit = 19; - return info; -} - -static void -field_fmt_19_19_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xfff7ffff) | ((*val & 0x1) << 19); -} - -static void -field_fmt_19_19_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 19) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_19_19_3_3_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 19; - info.maxbit = 19; - return info; -} - -static void -field_fmt_19_19_3_3_set(uint32_t *pmd, uint32_t *val) -{ - pmd[3] = (pmd[3] & 0xfff7ffff) | ((*val & 0x1) << 19); -} - -static void -field_fmt_19_19_3_3_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[3] >> 19) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_1_1_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 1; - info.maxbit = 1; - return info; -} - -static void -field_fmt_1_1_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xfffffffd) | ((*val & 0x1) << 1); -} - -static void -field_fmt_1_1_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 1) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_207_221_7_7_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 207; - info.maxbit = 221; - return info; -} - -static void -field_fmt_207_221_7_7_set(uint32_t *pmd, uint32_t *val) -{ - pmd[7] = (pmd[7] & 0xc0007fff) | ((*val & 0x7fff) << 15); -} - -static void -field_fmt_207_221_7_7_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[7] >> 15) & 0x7fff; -} - -static bcmpkt_field_info_t -field_fmt_20_20_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 20; - info.maxbit = 20; - return info; -} - -static void -field_fmt_20_20_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xffefffff) | ((*val & 0x1) << 20); -} - -static void -field_fmt_20_20_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 20) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_21_21_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 21; - info.maxbit = 21; - return info; -} - -static void -field_fmt_21_21_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xffdfffff) | ((*val & 0x1) << 21); -} - -static void -field_fmt_21_21_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 21) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_21_21_3_3_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 21; - info.maxbit = 21; - return info; -} - -static void -field_fmt_21_21_3_3_set(uint32_t *pmd, uint32_t *val) -{ - pmd[3] = (pmd[3] & 0xffdfffff) | ((*val & 0x1) << 21); -} - -static void -field_fmt_21_21_3_3_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[3] >> 21) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_222_222_7_7_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 222; - info.maxbit = 222; - return info; -} - -static void -field_fmt_222_222_7_7_set(uint32_t *pmd, uint32_t *val) -{ - pmd[7] = (pmd[7] & 0xbfffffff) | ((*val & 0x1) << 30); -} - -static void -field_fmt_222_222_7_7_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[7] >> 30) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_223_242_7_6_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 223; - info.maxbit = 242; - return info; -} - -static void -field_fmt_223_242_7_6_set(uint32_t *pmd, uint32_t *val) -{ - pmd[7] = (pmd[7] & 0x7fffffff) | (*val << 31); - pmd[6] = (pmd[6] & 0xfff80000) | ((*val >> 1) & 0x7ffff); -} - -static void -field_fmt_223_242_7_6_get(uint32_t *pmd, uint32_t *val) -{ - *val = ((pmd[7] >> 31) | (pmd[6] << 1)) & 0xfffff; -} - -static bcmpkt_field_info_t -field_fmt_22_22_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 22; - info.maxbit = 22; - return info; -} - -static void -field_fmt_22_22_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xffbfffff) | ((*val & 0x1) << 22); -} - -static void -field_fmt_22_22_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 22) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_22_22_3_3_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 22; - info.maxbit = 22; - return info; -} - -static void -field_fmt_22_22_3_3_set(uint32_t *pmd, uint32_t *val) -{ - pmd[3] = (pmd[3] & 0xffbfffff) | ((*val & 0x1) << 22); -} - -static void -field_fmt_22_22_3_3_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[3] >> 22) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_23_23_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 23; - info.maxbit = 23; - return info; -} - -static void -field_fmt_23_23_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xff7fffff) | ((*val & 0x1) << 23); -} - -static void -field_fmt_23_23_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 23) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_243_243_6_6_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 243; - info.maxbit = 243; - return info; -} - -static void -field_fmt_243_243_6_6_set(uint32_t *pmd, uint32_t *val) -{ - pmd[6] = (pmd[6] & 0xfff7ffff) | ((*val & 0x1) << 19); -} - -static void -field_fmt_243_243_6_6_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[6] >> 19) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_244_253_6_6_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 244; - info.maxbit = 253; - return info; -} - -static void -field_fmt_244_253_6_6_set(uint32_t *pmd, uint32_t *val) -{ - pmd[6] = (pmd[6] & 0xc00fffff) | ((*val & 0x3ff) << 20); -} - -static void -field_fmt_244_253_6_6_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[6] >> 20) & 0x3ff; -} - -static bcmpkt_field_info_t -field_fmt_24_24_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 24; - info.maxbit = 24; - return info; -} - -static void -field_fmt_24_24_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xfeffffff) | ((*val & 0x1) << 24); -} - -static void -field_fmt_24_24_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 24) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_24_36_3_2_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 24; - info.maxbit = 36; - return info; -} - -static void -field_fmt_24_36_3_2_set(uint32_t *pmd, uint32_t *val) -{ - pmd[3] = (pmd[3] & 0xffffff) | (*val << 24); - pmd[2] = (pmd[2] & 0xffffffe0) | ((*val >> 8) & 0x1f); -} - -static void -field_fmt_24_36_3_2_get(uint32_t *pmd, uint32_t *val) -{ - *val = ((pmd[3] >> 24) | (pmd[2] << 8)) & 0x1fff; -} - -static bcmpkt_field_info_t -field_fmt_254_254_6_6_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 254; - info.maxbit = 254; - return info; -} - -static void -field_fmt_254_254_6_6_set(uint32_t *pmd, uint32_t *val) -{ - pmd[6] = (pmd[6] & 0xbfffffff) | ((*val & 0x1) << 30); -} - -static void -field_fmt_254_254_6_6_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[6] >> 30) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_255_286_6_5_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 255; - info.maxbit = 286; - return info; -} - -static void -field_fmt_255_286_6_5_set(uint32_t *pmd, uint32_t *val) -{ - pmd[6] = (pmd[6] & 0x7fffffff) | (*val << 31); - pmd[5] = (pmd[5] & 0x80000000) | ((*val >> 1) & 0x7fffffff); -} - -static void -field_fmt_255_286_6_5_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[6] >> 31) | (pmd[5] << 1); -} - -static bcmpkt_field_info_t -field_fmt_25_25_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 25; - info.maxbit = 25; - return info; -} - -static void -field_fmt_25_25_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xfdffffff) | ((*val & 0x1) << 25); -} - -static void -field_fmt_25_25_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 25) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_26_26_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 26; - info.maxbit = 26; - return info; -} - -static void -field_fmt_26_26_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xfbffffff) | ((*val & 0x1) << 26); -} - -static void -field_fmt_26_26_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 26) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_26_26_3_3_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 26; - info.maxbit = 26; - return info; -} - -static void -field_fmt_26_26_3_3_set(uint32_t *pmd, uint32_t *val) -{ - pmd[3] = (pmd[3] & 0xfbffffff) | ((*val & 0x1) << 26); -} - -static void -field_fmt_26_26_3_3_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[3] >> 26) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_27_27_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 27; - info.maxbit = 27; - return info; -} - -static void -field_fmt_27_27_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xf7ffffff) | ((*val & 0x1) << 27); -} - -static void -field_fmt_27_27_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 27) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_27_42_3_2_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 27; - info.maxbit = 42; - return info; -} - -static void -field_fmt_27_42_3_2_set(uint32_t *pmd, uint32_t *val) -{ - pmd[3] = (pmd[3] & 0x7ffffff) | (*val << 27); - pmd[2] = (pmd[2] & 0xfffff800) | ((*val >> 5) & 0x7ff); -} - -static void -field_fmt_27_42_3_2_get(uint32_t *pmd, uint32_t *val) -{ - *val = ((pmd[3] >> 27) | (pmd[2] << 5)) & 0xffff; -} - -static bcmpkt_field_info_t -field_fmt_287_302_5_4_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 287; - info.maxbit = 302; - return info; -} - -static void -field_fmt_287_302_5_4_set(uint32_t *pmd, uint32_t *val) -{ - pmd[5] = (pmd[5] & 0x7fffffff) | (*val << 31); - pmd[4] = (pmd[4] & 0xffff8000) | ((*val >> 1) & 0x7fff); -} - -static void -field_fmt_287_302_5_4_get(uint32_t *pmd, uint32_t *val) -{ - *val = ((pmd[5] >> 31) | (pmd[4] << 1)) & 0xffff; -} - -static bcmpkt_field_info_t -field_fmt_28_28_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 28; - info.maxbit = 28; - return info; -} - -static void -field_fmt_28_28_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xefffffff) | ((*val & 0x1) << 28); -} - -static void -field_fmt_28_28_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 28) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_29_29_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 29; - info.maxbit = 29; - return info; -} - -static void -field_fmt_29_29_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xdfffffff) | ((*val & 0x1) << 29); -} - -static void -field_fmt_29_29_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 29) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_2_2_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 2; - info.maxbit = 2; - return info; -} - -static void -field_fmt_2_2_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xfffffffb) | ((*val & 0x1) << 2); -} - -static void -field_fmt_2_2_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 2) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_303_303_4_4_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 303; - info.maxbit = 303; - return info; -} - -static void -field_fmt_303_303_4_4_set(uint32_t *pmd, uint32_t *val) -{ - pmd[4] = (pmd[4] & 0xffff7fff) | ((*val & 0x1) << 15); -} - -static void -field_fmt_303_303_4_4_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[4] >> 15) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_304_307_4_4_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 304; - info.maxbit = 307; - return info; -} - -static void -field_fmt_304_307_4_4_set(uint32_t *pmd, uint32_t *val) -{ - pmd[4] = (pmd[4] & 0xfff0ffff) | ((*val & 0xf) << 16); -} - -static void -field_fmt_304_307_4_4_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[4] >> 16) & 0xf; -} - -static bcmpkt_field_info_t -field_fmt_308_308_4_4_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 308; - info.maxbit = 308; - return info; -} - -static void -field_fmt_308_308_4_4_set(uint32_t *pmd, uint32_t *val) -{ - pmd[4] = (pmd[4] & 0xffefffff) | ((*val & 0x1) << 20); -} - -static void -field_fmt_308_308_4_4_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[4] >> 20) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_309_309_4_4_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 309; - info.maxbit = 309; - return info; -} - -static void -field_fmt_309_309_4_4_set(uint32_t *pmd, uint32_t *val) -{ - pmd[4] = (pmd[4] & 0xffdfffff) | ((*val & 0x1) << 21); -} - -static void -field_fmt_309_309_4_4_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[4] >> 21) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_30_30_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 30; - info.maxbit = 30; - return info; -} - -static void -field_fmt_30_30_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xbfffffff) | ((*val & 0x1) << 30); -} - -static void -field_fmt_30_30_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 30) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_310_311_4_4_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 310; - info.maxbit = 311; - return info; -} - -static void -field_fmt_310_311_4_4_set(uint32_t *pmd, uint32_t *val) -{ - pmd[4] = (pmd[4] & 0xff3fffff) | ((*val & 0x3) << 22); -} - -static void -field_fmt_310_311_4_4_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[4] >> 22) & 0x3; -} - -static bcmpkt_field_info_t -field_fmt_312_318_4_4_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 312; - info.maxbit = 318; - return info; -} - -static void -field_fmt_312_318_4_4_set(uint32_t *pmd, uint32_t *val) -{ - pmd[4] = (pmd[4] & 0x80ffffff) | ((*val & 0x7f) << 24); -} - -static void -field_fmt_312_318_4_4_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[4] >> 24) & 0x7f; -} - -static bcmpkt_field_info_t -field_fmt_31_31_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 31; - info.maxbit = 31; - return info; -} - -static void -field_fmt_31_31_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0x7fffffff) | (*val << 31); -} - -static void -field_fmt_31_31_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 31) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_320_447_3_0_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 320; - info.maxbit = 447; - return info; -} - -static void -field_fmt_320_447_3_0_set(uint32_t *pmd, uint32_t *val) -{ - pmd[3] = val[0]; - pmd[2] = val[1]; - pmd[1] = val[2]; - pmd[0] = val[3]; -} - -static void -field_fmt_320_447_3_0_get(uint32_t *pmd, uint32_t *val) -{ - val[0] = pmd[3]; - val[1] = pmd[2]; - val[2] = pmd[1]; - val[3] = pmd[0]; -} - -static bcmpkt_field_info_t -field_fmt_32_32_12_12_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 32; - info.maxbit = 32; - return info; -} - -static void -field_fmt_32_32_12_12_set(uint32_t *pmd, uint32_t *val) -{ - pmd[12] = (pmd[12] & 0xfffffffe) | (*val & 0x1); -} - -static void -field_fmt_32_32_12_12_get(uint32_t *pmd, uint32_t *val) -{ - *val = pmd[12] & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_33_33_12_12_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 33; - info.maxbit = 33; - return info; -} - -static void -field_fmt_33_33_12_12_set(uint32_t *pmd, uint32_t *val) -{ - pmd[12] = (pmd[12] & 0xfffffffd) | ((*val & 0x1) << 1); -} - -static void -field_fmt_33_33_12_12_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[12] >> 1) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_34_34_12_12_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 34; - info.maxbit = 34; - return info; -} - -static void -field_fmt_34_34_12_12_set(uint32_t *pmd, uint32_t *val) -{ - pmd[12] = (pmd[12] & 0xfffffffb) | ((*val & 0x1) << 2); -} - -static void -field_fmt_34_34_12_12_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[12] >> 2) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_34_37_2_2_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 34; - info.maxbit = 37; - return info; -} - -static void -field_fmt_34_37_2_2_set(uint32_t *pmd, uint32_t *val) -{ - pmd[2] = (pmd[2] & 0xffffffc3) | ((*val & 0xf) << 2); -} - -static void -field_fmt_34_37_2_2_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[2] >> 2) & 0xf; -} - -static bcmpkt_field_info_t -field_fmt_35_35_12_12_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 35; - info.maxbit = 35; - return info; -} - -static void -field_fmt_35_35_12_12_set(uint32_t *pmd, uint32_t *val) -{ - pmd[12] = (pmd[12] & 0xfffffff7) | ((*val & 0x1) << 3); -} - -static void -field_fmt_35_35_12_12_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[12] >> 3) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_36_36_12_12_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 36; - info.maxbit = 36; - return info; -} - -static void -field_fmt_36_36_12_12_set(uint32_t *pmd, uint32_t *val) -{ - pmd[12] = (pmd[12] & 0xffffffef) | ((*val & 0x1) << 4); -} - -static void -field_fmt_36_36_12_12_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[12] >> 4) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_37_37_12_12_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 37; - info.maxbit = 37; - return info; -} - -static void -field_fmt_37_37_12_12_set(uint32_t *pmd, uint32_t *val) -{ - pmd[12] = (pmd[12] & 0xffffffdf) | ((*val & 0x1) << 5); -} - -static void -field_fmt_37_37_12_12_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[12] >> 5) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_37_46_2_2_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 37; - info.maxbit = 46; - return info; -} - -static void -field_fmt_37_46_2_2_set(uint32_t *pmd, uint32_t *val) -{ - pmd[2] = (pmd[2] & 0xffff801f) | ((*val & 0x3ff) << 5); -} - -static void -field_fmt_37_46_2_2_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[2] >> 5) & 0x3ff; -} - -static bcmpkt_field_info_t -field_fmt_38_38_12_12_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 38; - info.maxbit = 38; - return info; -} - -static void -field_fmt_38_38_12_12_set(uint32_t *pmd, uint32_t *val) -{ - pmd[12] = (pmd[12] & 0xffffffbf) | ((*val & 0x1) << 6); -} - -static void -field_fmt_38_38_12_12_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[12] >> 6) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_38_38_2_2_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 38; - info.maxbit = 38; - return info; -} - -static void -field_fmt_38_38_2_2_set(uint32_t *pmd, uint32_t *val) -{ - pmd[2] = (pmd[2] & 0xffffffbf) | ((*val & 0x1) << 6); -} - -static void -field_fmt_38_38_2_2_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[2] >> 6) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_39_39_12_12_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 39; - info.maxbit = 39; - return info; -} - -static void -field_fmt_39_39_12_12_set(uint32_t *pmd, uint32_t *val) -{ - pmd[12] = (pmd[12] & 0xffffff7f) | ((*val & 0x1) << 7); -} - -static void -field_fmt_39_39_12_12_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[12] >> 7) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_39_39_2_2_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 39; - info.maxbit = 39; - return info; -} - -static void -field_fmt_39_39_2_2_set(uint32_t *pmd, uint32_t *val) -{ - pmd[2] = (pmd[2] & 0xffffff7f) | ((*val & 0x1) << 7); -} - -static void -field_fmt_39_39_2_2_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[2] >> 7) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_3_3_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 3; - info.maxbit = 3; - return info; -} - -static void -field_fmt_3_3_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xfffffff7) | ((*val & 0x1) << 3); -} - -static void -field_fmt_3_3_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 3) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_40_40_12_12_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 40; - info.maxbit = 40; - return info; -} - -static void -field_fmt_40_40_12_12_set(uint32_t *pmd, uint32_t *val) -{ - pmd[12] = (pmd[12] & 0xfffffeff) | ((*val & 0x1) << 8); -} - -static void -field_fmt_40_40_12_12_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[12] >> 8) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_40_43_2_2_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 40; - info.maxbit = 43; - return info; -} - -static void -field_fmt_40_43_2_2_set(uint32_t *pmd, uint32_t *val) -{ - pmd[2] = (pmd[2] & 0xfffff0ff) | ((*val & 0xf) << 8); -} - -static void -field_fmt_40_43_2_2_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[2] >> 8) & 0xf; -} - -static bcmpkt_field_info_t -field_fmt_41_41_12_12_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 41; - info.maxbit = 41; - return info; -} - -static void -field_fmt_41_41_12_12_set(uint32_t *pmd, uint32_t *val) -{ - pmd[12] = (pmd[12] & 0xfffffdff) | ((*val & 0x1) << 9); -} - -static void -field_fmt_41_41_12_12_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[12] >> 9) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_42_42_12_12_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 42; - info.maxbit = 42; - return info; -} - -static void -field_fmt_42_42_12_12_set(uint32_t *pmd, uint32_t *val) -{ - pmd[12] = (pmd[12] & 0xfffffbff) | ((*val & 0x1) << 10); -} - -static void -field_fmt_42_42_12_12_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[12] >> 10) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_43_43_12_12_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 43; - info.maxbit = 43; - return info; -} - -static void -field_fmt_43_43_12_12_set(uint32_t *pmd, uint32_t *val) -{ - pmd[12] = (pmd[12] & 0xfffff7ff) | ((*val & 0x1) << 11); -} - -static void -field_fmt_43_43_12_12_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[12] >> 11) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_43_46_2_2_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 43; - info.maxbit = 46; - return info; -} - -static void -field_fmt_43_46_2_2_set(uint32_t *pmd, uint32_t *val) -{ - pmd[2] = (pmd[2] & 0xffff87ff) | ((*val & 0xf) << 11); -} - -static void -field_fmt_43_46_2_2_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[2] >> 11) & 0xf; -} - -static bcmpkt_field_info_t -field_fmt_44_44_12_12_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 44; - info.maxbit = 44; - return info; -} - -static void -field_fmt_44_44_12_12_set(uint32_t *pmd, uint32_t *val) -{ - pmd[12] = (pmd[12] & 0xffffefff) | ((*val & 0x1) << 12); -} - -static void -field_fmt_44_44_12_12_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[12] >> 12) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_44_46_2_2_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 44; - info.maxbit = 46; - return info; -} - -static void -field_fmt_44_46_2_2_set(uint32_t *pmd, uint32_t *val) -{ - pmd[2] = (pmd[2] & 0xffff8fff) | ((*val & 0x7) << 12); -} - -static void -field_fmt_44_46_2_2_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[2] >> 12) & 0x7; -} - -static bcmpkt_field_info_t -field_fmt_45_45_12_12_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 45; - info.maxbit = 45; - return info; -} - -static void -field_fmt_45_45_12_12_set(uint32_t *pmd, uint32_t *val) -{ - pmd[12] = (pmd[12] & 0xffffdfff) | ((*val & 0x1) << 13); -} - -static void -field_fmt_45_45_12_12_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[12] >> 13) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_46_46_12_12_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 46; - info.maxbit = 46; - return info; -} - -static void -field_fmt_46_46_12_12_set(uint32_t *pmd, uint32_t *val) -{ - pmd[12] = (pmd[12] & 0xffffbfff) | ((*val & 0x1) << 14); -} - -static void -field_fmt_46_46_12_12_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[12] >> 14) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_47_47_12_12_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 47; - info.maxbit = 47; - return info; -} - -static void -field_fmt_47_47_12_12_set(uint32_t *pmd, uint32_t *val) -{ - pmd[12] = (pmd[12] & 0xffff7fff) | ((*val & 0x1) << 15); -} - -static void -field_fmt_47_47_12_12_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[12] >> 15) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_47_47_2_2_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 47; - info.maxbit = 47; - return info; -} - -static void -field_fmt_47_47_2_2_set(uint32_t *pmd, uint32_t *val) -{ - pmd[2] = (pmd[2] & 0xffff7fff) | ((*val & 0x1) << 15); -} - -static void -field_fmt_47_47_2_2_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[2] >> 15) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_47_48_2_2_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 47; - info.maxbit = 48; - return info; -} - -static void -field_fmt_47_48_2_2_set(uint32_t *pmd, uint32_t *val) -{ - pmd[2] = (pmd[2] & 0xfffe7fff) | ((*val & 0x3) << 15); -} - -static void -field_fmt_47_48_2_2_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[2] >> 15) & 0x3; -} - -static bcmpkt_field_info_t -field_fmt_48_48_12_12_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 48; - info.maxbit = 48; - return info; -} - -static void -field_fmt_48_48_12_12_set(uint32_t *pmd, uint32_t *val) -{ - pmd[12] = (pmd[12] & 0xfffeffff) | ((*val & 0x1) << 16); -} - -static void -field_fmt_48_48_12_12_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[12] >> 16) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_48_48_2_2_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 48; - info.maxbit = 48; - return info; -} - -static void -field_fmt_48_48_2_2_set(uint32_t *pmd, uint32_t *val) -{ - pmd[2] = (pmd[2] & 0xfffeffff) | ((*val & 0x1) << 16); -} - -static void -field_fmt_48_48_2_2_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[2] >> 16) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_49_49_12_12_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 49; - info.maxbit = 49; - return info; -} - -static void -field_fmt_49_49_12_12_set(uint32_t *pmd, uint32_t *val) -{ - pmd[12] = (pmd[12] & 0xfffdffff) | ((*val & 0x1) << 17); -} - -static void -field_fmt_49_49_12_12_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[12] >> 17) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_49_50_2_2_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 49; - info.maxbit = 50; - return info; -} - -static void -field_fmt_49_50_2_2_set(uint32_t *pmd, uint32_t *val) -{ - pmd[2] = (pmd[2] & 0xfff9ffff) | ((*val & 0x3) << 17); -} - -static void -field_fmt_49_50_2_2_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[2] >> 17) & 0x3; -} - -static bcmpkt_field_info_t -field_fmt_49_52_2_2_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 49; - info.maxbit = 52; - return info; -} - -static void -field_fmt_49_52_2_2_set(uint32_t *pmd, uint32_t *val) -{ - pmd[2] = (pmd[2] & 0xffe1ffff) | ((*val & 0xf) << 17); -} - -static void -field_fmt_49_52_2_2_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[2] >> 17) & 0xf; -} - -static bcmpkt_field_info_t -field_fmt_4_4_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 4; - info.maxbit = 4; - return info; -} - -static void -field_fmt_4_4_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xffffffef) | ((*val & 0x1) << 4); -} - -static void -field_fmt_4_4_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 4) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_50_50_12_12_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 50; - info.maxbit = 50; - return info; -} - -static void -field_fmt_50_50_12_12_set(uint32_t *pmd, uint32_t *val) -{ - pmd[12] = (pmd[12] & 0xfffbffff) | ((*val & 0x1) << 18); -} - -static void -field_fmt_50_50_12_12_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[12] >> 18) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_51_51_2_2_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 51; - info.maxbit = 51; - return info; -} - -static void -field_fmt_51_51_2_2_set(uint32_t *pmd, uint32_t *val) -{ - pmd[2] = (pmd[2] & 0xfff7ffff) | ((*val & 0x1) << 19); -} - -static void -field_fmt_51_51_2_2_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[2] >> 19) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_52_59_2_2_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 52; - info.maxbit = 59; - return info; -} - -static void -field_fmt_52_59_2_2_set(uint32_t *pmd, uint32_t *val) -{ - pmd[2] = (pmd[2] & 0xf00fffff) | ((*val & 0xff) << 20); -} - -static void -field_fmt_52_59_2_2_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[2] >> 20) & 0xff; -} - -static bcmpkt_field_info_t -field_fmt_53_54_2_2_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 53; - info.maxbit = 54; - return info; -} - -static void -field_fmt_53_54_2_2_set(uint32_t *pmd, uint32_t *val) -{ - pmd[2] = (pmd[2] & 0xff9fffff) | ((*val & 0x3) << 21); -} - -static void -field_fmt_53_54_2_2_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[2] >> 21) & 0x3; -} - -static bcmpkt_field_info_t -field_fmt_55_58_2_2_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 55; - info.maxbit = 58; - return info; -} - -static void -field_fmt_55_58_2_2_set(uint32_t *pmd, uint32_t *val) -{ - pmd[2] = (pmd[2] & 0xf87fffff) | ((*val & 0xf) << 23); -} - -static void -field_fmt_55_58_2_2_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[2] >> 23) & 0xf; -} - -static bcmpkt_field_info_t -field_fmt_59_59_2_2_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 59; - info.maxbit = 59; - return info; -} - -static void -field_fmt_59_59_2_2_set(uint32_t *pmd, uint32_t *val) -{ - pmd[2] = (pmd[2] & 0xf7ffffff) | ((*val & 0x1) << 27); -} - -static void -field_fmt_59_59_2_2_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[2] >> 27) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_5_5_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 5; - info.maxbit = 5; - return info; -} - -static void -field_fmt_5_5_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xffffffdf) | ((*val & 0x1) << 5); -} - -static void -field_fmt_5_5_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 5) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_60_60_2_2_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 60; - info.maxbit = 60; - return info; -} - -static void -field_fmt_60_60_2_2_set(uint32_t *pmd, uint32_t *val) -{ - pmd[2] = (pmd[2] & 0xefffffff) | ((*val & 0x1) << 28); -} - -static void -field_fmt_60_60_2_2_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[2] >> 28) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_60_62_2_2_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 60; - info.maxbit = 62; - return info; -} - -static void -field_fmt_60_62_2_2_set(uint32_t *pmd, uint32_t *val) -{ - pmd[2] = (pmd[2] & 0x8fffffff) | ((*val & 0x7) << 28); -} - -static void -field_fmt_60_62_2_2_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[2] >> 28) & 0x7; -} - -static bcmpkt_field_info_t -field_fmt_61_61_2_2_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 61; - info.maxbit = 61; - return info; -} - -static void -field_fmt_61_61_2_2_set(uint32_t *pmd, uint32_t *val) -{ - pmd[2] = (pmd[2] & 0xdfffffff) | ((*val & 0x1) << 29); -} - -static void -field_fmt_61_61_2_2_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[2] >> 29) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_62_62_2_2_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 62; - info.maxbit = 62; - return info; -} - -static void -field_fmt_62_62_2_2_set(uint32_t *pmd, uint32_t *val) -{ - pmd[2] = (pmd[2] & 0xbfffffff) | ((*val & 0x1) << 30); -} - -static void -field_fmt_62_62_2_2_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[2] >> 30) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_63_63_2_2_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 63; - info.maxbit = 63; - return info; -} - -static void -field_fmt_63_63_2_2_set(uint32_t *pmd, uint32_t *val) -{ - pmd[2] = (pmd[2] & 0x7fffffff) | (*val << 31); -} - -static void -field_fmt_63_63_2_2_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[2] >> 31) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_64_64_1_1_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 64; - info.maxbit = 64; - return info; -} - -static void -field_fmt_64_64_1_1_set(uint32_t *pmd, uint32_t *val) -{ - pmd[1] = (pmd[1] & 0xfffffffe) | (*val & 0x1); -} - -static void -field_fmt_64_64_1_1_get(uint32_t *pmd, uint32_t *val) -{ - *val = pmd[1] & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_64_67_11_11_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 64; - info.maxbit = 67; - return info; -} - -static void -field_fmt_64_67_11_11_set(uint32_t *pmd, uint32_t *val) -{ - pmd[11] = (pmd[11] & 0xfffffff0) | (*val & 0xf); -} - -static void -field_fmt_64_67_11_11_get(uint32_t *pmd, uint32_t *val) -{ - *val = pmd[11] & 0xf; -} - -static bcmpkt_field_info_t -field_fmt_65_77_1_1_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 65; - info.maxbit = 77; - return info; -} - -static void -field_fmt_65_77_1_1_set(uint32_t *pmd, uint32_t *val) -{ - pmd[1] = (pmd[1] & 0xffffc001) | ((*val & 0x1fff) << 1); -} - -static void -field_fmt_65_77_1_1_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[1] >> 1) & 0x1fff; -} - -static bcmpkt_field_info_t -field_fmt_68_79_11_11_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 68; - info.maxbit = 79; - return info; -} - -static void -field_fmt_68_79_11_11_set(uint32_t *pmd, uint32_t *val) -{ - pmd[11] = (pmd[11] & 0xffff000f) | ((*val & 0xfff) << 4); -} - -static void -field_fmt_68_79_11_11_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[11] >> 4) & 0xfff; -} - -static bcmpkt_field_info_t -field_fmt_6_6_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 6; - info.maxbit = 6; - return info; -} - -static void -field_fmt_6_6_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xffffffbf) | ((*val & 0x1) << 6); -} - -static void -field_fmt_6_6_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 6) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_78_90_1_1_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 78; - info.maxbit = 90; - return info; -} - -static void -field_fmt_78_90_1_1_set(uint32_t *pmd, uint32_t *val) -{ - pmd[1] = (pmd[1] & 0xf8003fff) | ((*val & 0x1fff) << 14); -} - -static void -field_fmt_78_90_1_1_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[1] >> 14) & 0x1fff; -} - -static bcmpkt_field_info_t -field_fmt_7_7_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 7; - info.maxbit = 7; - return info; -} - -static void -field_fmt_7_7_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xffffff7f) | ((*val & 0x1) << 7); -} - -static void -field_fmt_7_7_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 7) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_80_81_11_11_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 80; - info.maxbit = 81; - return info; -} - -static void -field_fmt_80_81_11_11_set(uint32_t *pmd, uint32_t *val) -{ - pmd[11] = (pmd[11] & 0xfffcffff) | ((*val & 0x3) << 16); -} - -static void -field_fmt_80_81_11_11_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[11] >> 16) & 0x3; -} - -static bcmpkt_field_info_t -field_fmt_80_83_11_11_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 80; - info.maxbit = 83; - return info; -} - -static void -field_fmt_80_83_11_11_set(uint32_t *pmd, uint32_t *val) -{ - pmd[11] = (pmd[11] & 0xfff0ffff) | ((*val & 0xf) << 16); -} - -static void -field_fmt_80_83_11_11_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[11] >> 16) & 0xf; -} - -static bcmpkt_field_info_t -field_fmt_81_84_1_1_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 81; - info.maxbit = 84; - return info; -} - -static void -field_fmt_81_84_1_1_set(uint32_t *pmd, uint32_t *val) -{ - pmd[1] = (pmd[1] & 0xffe1ffff) | ((*val & 0xf) << 17); -} - -static void -field_fmt_81_84_1_1_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[1] >> 17) & 0xf; -} - -static bcmpkt_field_info_t -field_fmt_82_89_11_11_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 82; - info.maxbit = 89; - return info; -} - -static void -field_fmt_82_89_11_11_set(uint32_t *pmd, uint32_t *val) -{ - pmd[11] = (pmd[11] & 0xfc03ffff) | ((*val & 0xff) << 18); -} - -static void -field_fmt_82_89_11_11_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[11] >> 18) & 0xff; -} - -static bcmpkt_field_info_t -field_fmt_85_88_1_1_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 85; - info.maxbit = 88; - return info; -} - -static void -field_fmt_85_88_1_1_set(uint32_t *pmd, uint32_t *val) -{ - pmd[1] = (pmd[1] & 0xfe1fffff) | ((*val & 0xf) << 21); -} - -static void -field_fmt_85_88_1_1_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[1] >> 21) & 0xf; -} - -static bcmpkt_field_info_t -field_fmt_85_92_1_1_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 85; - info.maxbit = 92; - return info; -} - -static void -field_fmt_85_92_1_1_set(uint32_t *pmd, uint32_t *val) -{ - pmd[1] = (pmd[1] & 0xe01fffff) | ((*val & 0xff) << 21); -} - -static void -field_fmt_85_92_1_1_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[1] >> 21) & 0xff; -} - -static bcmpkt_field_info_t -field_fmt_89_90_1_1_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 89; - info.maxbit = 90; - return info; -} - -static void -field_fmt_89_90_1_1_set(uint32_t *pmd, uint32_t *val) -{ - pmd[1] = (pmd[1] & 0xf9ffffff) | ((*val & 0x3) << 25); -} - -static void -field_fmt_89_90_1_1_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[1] >> 25) & 0x3; -} - -static bcmpkt_field_info_t -field_fmt_8_8_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 8; - info.maxbit = 8; - return info; -} - -static void -field_fmt_8_8_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xfffffeff) | ((*val & 0x1) << 8); -} - -static void -field_fmt_8_8_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 8) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_8_8_3_3_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 8; - info.maxbit = 8; - return info; -} - -static void -field_fmt_8_8_3_3_set(uint32_t *pmd, uint32_t *val) -{ - pmd[3] = (pmd[3] & 0xfffffeff) | ((*val & 0x1) << 8); -} - -static void -field_fmt_8_8_3_3_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[3] >> 8) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_90_95_11_11_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 90; - info.maxbit = 95; - return info; -} - -static void -field_fmt_90_95_11_11_set(uint32_t *pmd, uint32_t *val) -{ - pmd[11] = (pmd[11] & 0x3ffffff) | (*val << 26); -} - -static void -field_fmt_90_95_11_11_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[11] >> 26) & 0x3f; -} - -static bcmpkt_field_info_t -field_fmt_91_91_1_1_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 91; - info.maxbit = 91; - return info; -} - -static void -field_fmt_91_91_1_1_set(uint32_t *pmd, uint32_t *val) -{ - pmd[1] = (pmd[1] & 0xf7ffffff) | ((*val & 0x1) << 27); -} - -static void -field_fmt_91_91_1_1_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[1] >> 27) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_91_92_1_1_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 91; - info.maxbit = 92; - return info; -} - -static void -field_fmt_91_92_1_1_set(uint32_t *pmd, uint32_t *val) -{ - pmd[1] = (pmd[1] & 0xe7ffffff) | ((*val & 0x3) << 27); -} - -static void -field_fmt_91_92_1_1_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[1] >> 27) & 0x3; -} - -static bcmpkt_field_info_t -field_fmt_9_9_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 9; - info.maxbit = 9; - return info; -} - -static void -field_fmt_9_9_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xfffffdff) | ((*val & 0x1) << 9); -} - -static void -field_fmt_9_9_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 9) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_9_9_3_3_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 9; - info.maxbit = 9; - return info; -} - -static void -field_fmt_9_9_3_3_set(uint32_t *pmd, uint32_t *val) -{ - pmd[3] = (pmd[3] & 0xfffffdff) | ((*val & 0x1) << 9); -} - -static void -field_fmt_9_9_3_3_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[3] >> 9) & 0x1; -} - -static const shr_enum_map_t bcm78914_b0_rxpmd_reason_type_names[] = -{ - BCM78914_B0_RXPMD_REASON_TYPE_NAME_MAP_INIT -}; - -static bcmpkt_pmd_field_t bcm78914_b0_rxpmd_fields[BCM78914_B0_RXPMD_COUNT] = { - {"REASON",2, field_fmt_0_63_13_12_info, field_fmt_0_63_13_12_set, field_fmt_0_63_13_12_get, NULL, 0}, - {"REASON_TYPE",1, field_fmt_64_67_11_11_info, field_fmt_64_67_11_11_set, field_fmt_64_67_11_11_get, bcm78914_b0_rxpmd_reason_type_names, 0}, - {"I2E_CLASSID",1, field_fmt_68_79_11_11_info, field_fmt_68_79_11_11_set, field_fmt_68_79_11_11_get, NULL, 0}, - {"RX_BFD_SESSION_INDEX",1, field_fmt_68_79_11_11_info, field_fmt_68_79_11_11_set, field_fmt_68_79_11_11_get, NULL, 0}, - {"I2E_CLASSID_TYPE",1, field_fmt_80_83_11_11_info, field_fmt_80_83_11_11_set, field_fmt_80_83_11_11_get, NULL, 0}, - {"RX_BFD_START_OFFSET_TYPE",1, field_fmt_80_81_11_11_info, field_fmt_80_81_11_11_set, field_fmt_80_81_11_11_get, NULL, 0}, - {"RX_BFD_START_OFFSET",1, field_fmt_82_89_11_11_info, field_fmt_82_89_11_11_set, field_fmt_82_89_11_11_get, NULL, 0}, - {"CPU_COS",1, field_fmt_90_95_11_11_info, field_fmt_90_95_11_11_set, field_fmt_90_95_11_11_get, NULL, 0}, - {"QUEUE_NUM",1, field_fmt_90_95_11_11_info, field_fmt_90_95_11_11_set, field_fmt_90_95_11_11_get, NULL, 0}, - {"ING_L3_INTF",1, field_fmt_115_127_10_10_info, field_fmt_115_127_10_10_set, field_fmt_115_127_10_10_get, NULL, 0}, - {"INCOMING_TAG_STATUS",1, field_fmt_128_128_9_9_info, field_fmt_128_128_9_9_set, field_fmt_128_128_9_9_get, NULL, 0}, - {"ING_OTAG_ACTION",1, field_fmt_129_130_9_9_info, field_fmt_129_130_9_9_set, field_fmt_129_130_9_9_get, NULL, 0}, - {"PKT_LENGTH",1, field_fmt_131_144_9_9_info, field_fmt_131_144_9_9_set, field_fmt_131_144_9_9_get, NULL, 0}, - {"O_NHI",1, field_fmt_145_159_9_9_info, field_fmt_145_159_9_9_set, field_fmt_145_159_9_9_get, NULL, 0}, - {"INCOMING_OPAQUE_TAG_STATUS",1, field_fmt_160_160_8_8_info, field_fmt_160_160_8_8_set, field_fmt_160_160_8_8_get, NULL, 0}, - {"BPDU",1, field_fmt_161_161_8_8_info, field_fmt_161_161_8_8_set, field_fmt_161_161_8_8_get, NULL, 0}, - {"CHANGE_DSCP",1, field_fmt_162_162_8_8_info, field_fmt_162_162_8_8_set, field_fmt_162_162_8_8_get, NULL, 0}, - {"CHANGE_ECN",1, field_fmt_163_163_8_8_info, field_fmt_163_163_8_8_set, field_fmt_163_163_8_8_get, NULL, 0}, - {"DLB_ID_VALID",1, field_fmt_164_164_8_8_info, field_fmt_164_164_8_8_set, field_fmt_164_164_8_8_get, NULL, 0}, - {"DO_NOT_CHANGE_TTL",1, field_fmt_165_165_8_8_info, field_fmt_165_165_8_8_set, field_fmt_165_165_8_8_get, NULL, 0}, - {"DSCP",1, field_fmt_166_171_8_8_info, field_fmt_166_171_8_8_set, field_fmt_166_171_8_8_get, NULL, 0}, - {"SPECIAL_PACKET_TYPE",1, field_fmt_166_168_8_8_info, field_fmt_166_168_8_8_set, field_fmt_166_168_8_8_get, NULL, 0}, - {"ECN",1, field_fmt_172_173_8_8_info, field_fmt_172_173_8_8_set, field_fmt_172_173_8_8_get, NULL, 0}, - {"IP_ROUTED",1, field_fmt_174_174_8_8_info, field_fmt_174_174_8_8_set, field_fmt_174_174_8_8_get, NULL, 0}, - {"L3ONLY",1, field_fmt_175_175_8_8_info, field_fmt_175_175_8_8_set, field_fmt_175_175_8_8_get, NULL, 0}, - {"MATCHED_RULE",1, field_fmt_176_187_8_8_info, field_fmt_176_187_8_8_set, field_fmt_176_187_8_8_get, NULL, 0}, - {"MATCHED_RULE_EP",1, field_fmt_176_184_8_8_info, field_fmt_176_184_8_8_set, field_fmt_176_184_8_8_get, NULL, 0}, - {"IS_EGR_TS",1, field_fmt_185_185_8_8_info, field_fmt_185_185_8_8_set, field_fmt_185_185_8_8_get, NULL, 0}, - {"MTP_INDEX",1, field_fmt_188_190_8_8_info, field_fmt_188_190_8_8_set, field_fmt_188_190_8_8_get, NULL, 0}, - {"OUTER_CFI",1, field_fmt_191_191_8_8_info, field_fmt_191_191_8_8_set, field_fmt_191_191_8_8_get, NULL, 0}, - {"OUTER_PRI",1, field_fmt_192_194_7_7_info, field_fmt_192_194_7_7_set, field_fmt_192_194_7_7_get, NULL, 0}, - {"OUTER_VID",1, field_fmt_195_206_7_7_info, field_fmt_195_206_7_7_set, field_fmt_195_206_7_7_get, NULL, 0}, - {"REPLICATION_OR_NHOP_INDEX",1, field_fmt_207_221_7_7_info, field_fmt_207_221_7_7_set, field_fmt_207_221_7_7_get, NULL, 0}, - {"MODIFIED_PKT",1, field_fmt_222_222_7_7_info, field_fmt_222_222_7_7_set, field_fmt_222_222_7_7_get, NULL, 0}, - {"ENTROPY_LABEL",1, field_fmt_223_242_7_6_info, field_fmt_223_242_7_6_set, field_fmt_223_242_7_6_get, NULL, 0}, - {"SPECIAL_PACKET_INDICATOR",1, field_fmt_243_243_6_6_info, field_fmt_243_243_6_6_set, field_fmt_243_243_6_6_get, NULL, 0}, - {"SRC_PORT_NUM",1, field_fmt_244_253_6_6_info, field_fmt_244_253_6_6_set, field_fmt_244_253_6_6_get, NULL, 0}, - {"SWITCH",1, field_fmt_254_254_6_6_info, field_fmt_254_254_6_6_set, field_fmt_254_254_6_6_get, NULL, 0}, - {"TIMESTAMP",1, field_fmt_255_286_6_5_info, field_fmt_255_286_6_5_set, field_fmt_255_286_6_5_get, NULL, 0}, - {"TIMESTAMP_HI",1, field_fmt_287_302_5_4_info, field_fmt_287_302_5_4_set, field_fmt_287_302_5_4_get, NULL, 0}, - {"IEEE_802_1AS_TIMESTAMP_ENABLED",1, field_fmt_303_303_4_4_info, field_fmt_303_303_4_4_set, field_fmt_303_303_4_4_get, NULL, 0}, - {"TUNNEL_DECAP_TYPE",1, field_fmt_304_307_4_4_info, field_fmt_304_307_4_4_set, field_fmt_304_307_4_4_get, NULL, 0}, - {"UC_SW_COPY_DROPPED",1, field_fmt_308_308_4_4_info, field_fmt_308_308_4_4_set, field_fmt_308_308_4_4_get, NULL, 0}, - {"UNICAST_QUEUE",1, field_fmt_309_309_4_4_info, field_fmt_309_309_4_4_set, field_fmt_309_309_4_4_get, NULL, 0}, - {"INCOMING_INT_HDR_TYPE",1, field_fmt_310_311_4_4_info, field_fmt_310_311_4_4_set, field_fmt_310_311_4_4_get, NULL, 0}, - {"DLB_ID",1, field_fmt_312_318_4_4_info, field_fmt_312_318_4_4_set, field_fmt_312_318_4_4_get, NULL, 0}, - {"MODULE_HDR",4, field_fmt_320_447_3_0_info, field_fmt_320_447_3_0_set, field_fmt_320_447_3_0_get, NULL, 0}, - -}; - -static const shr_enum_map_t bcm78914_b0_rxpmd_names[] = -{ - BCM78914_B0_RXPMD_NAME_MAP_INIT -}; - -bcmpkt_pmd_info_t bcm78914_b0_rxpmd_info_get(void) -{ - bcmpkt_pmd_info_t bcm78914_b0_rxpmd_info = {14, BCM78914_B0_RXPMD_COUNT, bcm78914_b0_rxpmd_names, bcm78914_b0_rxpmd_fields}; - return bcm78914_b0_rxpmd_info; -} - -static bcmpkt_pmd_field_t bcm78914_b0_rx_reason_fields[BCM78914_B0_RX_REASON_COUNT] = { - {"CPU_INVALID_REASON",1, field_fmt_0_0_13_13_info, field_fmt_0_0_13_13_set, field_fmt_0_0_13_13_get, NULL, 0}, - {"CPU_SLF",1, field_fmt_1_1_13_13_info, field_fmt_1_1_13_13_set, field_fmt_1_1_13_13_get, NULL, 0}, - {"CPU_DLF",1, field_fmt_2_2_13_13_info, field_fmt_2_2_13_13_set, field_fmt_2_2_13_13_get, NULL, 0}, - {"CPU_L2MOVE",1, field_fmt_3_3_13_13_info, field_fmt_3_3_13_13_set, field_fmt_3_3_13_13_get, NULL, 0}, - {"CPU_L2CPU",1, field_fmt_4_4_13_13_info, field_fmt_4_4_13_13_set, field_fmt_4_4_13_13_get, NULL, 0}, - {"CPU_L3SRC_MISS",1, field_fmt_5_5_13_13_info, field_fmt_5_5_13_13_set, field_fmt_5_5_13_13_get, NULL, 0}, - {"CPU_L3DST_MISS",1, field_fmt_6_6_13_13_info, field_fmt_6_6_13_13_set, field_fmt_6_6_13_13_get, NULL, 0}, - {"CPU_L3SRC_MOVE",1, field_fmt_7_7_13_13_info, field_fmt_7_7_13_13_set, field_fmt_7_7_13_13_get, NULL, 0}, - {"CPU_MC_MISS",1, field_fmt_8_8_13_13_info, field_fmt_8_8_13_13_set, field_fmt_8_8_13_13_get, NULL, 0}, - {"CPU_IPMC_MISS",1, field_fmt_9_9_13_13_info, field_fmt_9_9_13_13_set, field_fmt_9_9_13_13_get, NULL, 0}, - {"CPU_FFP",1, field_fmt_10_10_13_13_info, field_fmt_10_10_13_13_set, field_fmt_10_10_13_13_get, NULL, 0}, - {"CPU_L3HDR_ERR",1, field_fmt_11_11_13_13_info, field_fmt_11_11_13_13_set, field_fmt_11_11_13_13_get, NULL, 0}, - {"CPU_PROTOCOL_PKT",1, field_fmt_12_12_13_13_info, field_fmt_12_12_13_13_set, field_fmt_12_12_13_13_get, NULL, 0}, - {"CPU_DOS_ATTACK",1, field_fmt_13_13_13_13_info, field_fmt_13_13_13_13_set, field_fmt_13_13_13_13_get, NULL, 0}, - {"CPU_MARTIAN_ADDR",1, field_fmt_14_14_13_13_info, field_fmt_14_14_13_13_set, field_fmt_14_14_13_13_get, NULL, 0}, - {"CPU_TUNNEL_ERR",1, field_fmt_15_15_13_13_info, field_fmt_15_15_13_13_set, field_fmt_15_15_13_13_get, NULL, 0}, - {"CPU_SFLOW_SRC",1, field_fmt_16_16_13_13_info, field_fmt_16_16_13_13_set, field_fmt_16_16_13_13_get, NULL, 0}, - {"CPU_SFLOW_DST",1, field_fmt_17_17_13_13_info, field_fmt_17_17_13_13_set, field_fmt_17_17_13_13_get, NULL, 0}, - {"ICMP_REDIRECT",1, field_fmt_18_18_13_13_info, field_fmt_18_18_13_13_set, field_fmt_18_18_13_13_get, NULL, 0}, - {"L3_SLOWPATH",1, field_fmt_19_19_13_13_info, field_fmt_19_19_13_13_set, field_fmt_19_19_13_13_get, NULL, 0}, - {"PARITY_ERROR",1, field_fmt_20_20_13_13_info, field_fmt_20_20_13_13_set, field_fmt_20_20_13_13_get, NULL, 0}, - {"L3_MTU_CHECK_FAIL",1, field_fmt_21_21_13_13_info, field_fmt_21_21_13_13_set, field_fmt_21_21_13_13_get, NULL, 0}, - {"MPLS_TTL_CHECK",1, field_fmt_22_22_13_13_info, field_fmt_22_22_13_13_set, field_fmt_22_22_13_13_get, NULL, 0}, - {"MPLS_LABEL_MISS",1, field_fmt_23_23_13_13_info, field_fmt_23_23_13_13_set, field_fmt_23_23_13_13_get, NULL, 0}, - {"MPLS_INVALID_ACTION",1, field_fmt_24_24_13_13_info, field_fmt_24_24_13_13_set, field_fmt_24_24_13_13_get, NULL, 0}, - {"MPLS_INVALID_PAYLOAD",1, field_fmt_25_25_13_13_info, field_fmt_25_25_13_13_set, field_fmt_25_25_13_13_get, NULL, 0}, - {"CPU_VFP",1, field_fmt_26_26_13_13_info, field_fmt_26_26_13_13_set, field_fmt_26_26_13_13_get, NULL, 0}, - {"PBT_NONUC_PKT",1, field_fmt_27_27_13_13_info, field_fmt_27_27_13_13_set, field_fmt_27_27_13_13_get, NULL, 0}, - {"L3_NEXT_HOP",1, field_fmt_28_28_13_13_info, field_fmt_28_28_13_13_set, field_fmt_28_28_13_13_get, NULL, 0}, - {"MY_STATION",1, field_fmt_29_29_13_13_info, field_fmt_29_29_13_13_set, field_fmt_29_29_13_13_get, NULL, 0}, - {"TIME_SYNC",1, field_fmt_30_30_13_13_info, field_fmt_30_30_13_13_set, field_fmt_30_30_13_13_get, NULL, 0}, - {"TUNNEL_DECAP_ECN_ERROR",1, field_fmt_31_31_13_13_info, field_fmt_31_31_13_13_set, field_fmt_31_31_13_13_get, NULL, 0}, - {"BFD_SLOWPATH",1, field_fmt_32_32_12_12_info, field_fmt_32_32_12_12_set, field_fmt_32_32_12_12_get, NULL, 0}, - {"BFD_ERROR",1, field_fmt_33_33_12_12_info, field_fmt_33_33_12_12_set, field_fmt_33_33_12_12_get, NULL, 0}, - {"PACKET_TRACE_TO_CPU",1, field_fmt_34_34_12_12_info, field_fmt_34_34_12_12_set, field_fmt_34_34_12_12_get, NULL, 0}, - {"MPLS_UNKNOWN_CONTROL_PKT",1, field_fmt_35_35_12_12_info, field_fmt_35_35_12_12_set, field_fmt_35_35_12_12_get, NULL, 0}, - {"MPLS_ALERT_LABEL",1, field_fmt_36_36_12_12_info, field_fmt_36_36_12_12_set, field_fmt_36_36_12_12_get, NULL, 0}, - {"CPU_IPMC_INTERFACE_MISMATCH",1, field_fmt_37_37_12_12_info, field_fmt_37_37_12_12_set, field_fmt_37_37_12_12_get, NULL, 0}, - {"DLB_MONITOR",1, field_fmt_38_38_12_12_info, field_fmt_38_38_12_12_set, field_fmt_38_38_12_12_get, NULL, 0}, - {"CPU_SFLOW_FLEX",1, field_fmt_39_39_12_12_info, field_fmt_39_39_12_12_set, field_fmt_39_39_12_12_get, NULL, 0}, - {"CPU_UVLAN",1, field_fmt_40_40_12_12_info, field_fmt_40_40_12_12_set, field_fmt_40_40_12_12_get, NULL, 0}, - {"SRV6_ERROR",1, field_fmt_41_41_12_12_info, field_fmt_41_41_12_12_set, field_fmt_41_41_12_12_get, NULL, 0}, - {"VXLAN_VN_ID_MISS",1, field_fmt_42_42_12_12_info, field_fmt_42_42_12_12_set, field_fmt_42_42_12_12_get, NULL, 0}, - {"VXLAN_SIP_MISS",1, field_fmt_43_43_12_12_info, field_fmt_43_43_12_12_set, field_fmt_43_43_12_12_get, NULL, 0}, - {"ADAPT_MISS",1, field_fmt_44_44_12_12_info, field_fmt_44_44_12_12_set, field_fmt_44_44_12_12_get, NULL, 0}, - {"INVALID_GSH_NON_GSH",1, field_fmt_45_45_12_12_info, field_fmt_45_45_12_12_set, field_fmt_45_45_12_12_get, NULL, 0}, - {"APU_POLICY_CTC",1, field_fmt_46_46_12_12_info, field_fmt_46_46_12_12_set, field_fmt_46_46_12_12_get, NULL, 0}, - {"DELAYED_CTC",1, field_fmt_47_47_12_12_info, field_fmt_47_47_12_12_set, field_fmt_47_47_12_12_get, NULL, 0}, - {"PORT_DOWN",1, field_fmt_48_48_12_12_info, field_fmt_48_48_12_12_set, field_fmt_48_48_12_12_get, NULL, 0}, - {"SRV6_CONTROL_PKT",1, field_fmt_49_49_12_12_info, field_fmt_49_49_12_12_set, field_fmt_49_49_12_12_get, NULL, 0}, - {"OUI_COMPRESSION_MISS",1, field_fmt_50_50_12_12_info, field_fmt_50_50_12_12_set, field_fmt_50_50_12_12_get, NULL, 0}, - -}; - -static const shr_enum_map_t bcm78914_b0_rx_reason_names[] = -{ - BCM78914_B0_RX_REASON_NAME_MAP_INIT -}; - -bcmpkt_pmd_info_t bcm78914_b0_rx_reason_info_get(void) -{ - bcmpkt_pmd_info_t bcm78914_b0_rx_reason_info = {14, BCM78914_B0_RX_REASON_COUNT, bcm78914_b0_rx_reason_names, bcm78914_b0_rx_reason_fields}; - return bcm78914_b0_rx_reason_info; -} - -static bcmpkt_pmd_field_t bcm78914_b0_ep_rx_reason_fields[BCM78914_B0_EP_RX_REASON_COUNT] = { - {"EP_CTC",1, field_fmt_0_0_13_13_info, field_fmt_0_0_13_13_set, field_fmt_0_0_13_13_get, NULL, 0}, - -}; - -static const shr_enum_map_t bcm78914_b0_ep_rx_reason_names[] = -{ - BCM78914_B0_EP_RX_REASON_NAME_MAP_INIT -}; - -bcmpkt_pmd_info_t bcm78914_b0_ep_rx_reason_info_get(void) -{ - bcmpkt_pmd_info_t bcm78914_b0_ep_rx_reason_info = {14, BCM78914_B0_EP_RX_REASON_COUNT, bcm78914_b0_ep_rx_reason_names, bcm78914_b0_ep_rx_reason_fields}; - return bcm78914_b0_ep_rx_reason_info; -} - -static const shr_enum_map_t bcm78914_b0_txpmd_cpu_tx_destination_type_names[] = -{ - BCM78914_B0_TXPMD_CPU_TX_DESTINATION_TYPE_NAME_MAP_INIT -}; - -static const shr_enum_map_t bcm78914_b0_txpmd_cpu_tx_dp_names[] = -{ - BCM78914_B0_TXPMD_CPU_TX_DP_NAME_MAP_INIT -}; - -static const shr_enum_map_t bcm78914_b0_txpmd_sobmh_from_cpu_destination_type_names[] = -{ - BCM78914_B0_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE_NAME_MAP_INIT -}; - -static const shr_enum_map_t bcm78914_b0_txpmd_header_type_names[] = -{ - BCM78914_B0_TXPMD_HEADER_TYPE_NAME_MAP_INIT -}; - -static const shr_enum_map_t bcm78914_b0_txpmd_start_names[] = -{ - BCM78914_B0_TXPMD_START_NAME_MAP_INIT -}; - -static bcmpkt_pmd_field_t bcm78914_b0_txpmd_fields[BCM78914_B0_TXPMD_COUNT] = { - {"CPU_TX::ECMP_MEMBER_ID",1, field_fmt_0_16_3_3_info, field_fmt_0_16_3_3_set, field_fmt_0_16_3_3_get, NULL, 2}, - {"CPU_TX::MCAST_LB_INDEX",1, field_fmt_0_7_3_3_info, field_fmt_0_7_3_3_set, field_fmt_0_7_3_3_get, NULL, 2}, - {"CPU_TX::COOKIE",1, field_fmt_17_25_3_3_info, field_fmt_17_25_3_3_set, field_fmt_17_25_3_3_get, NULL, 2}, - {"CPU_TX::COOKIE_VALID",1, field_fmt_26_26_3_3_info, field_fmt_26_26_3_3_set, field_fmt_26_26_3_3_get, NULL, 2}, - {"CPU_TX::DESTINATION",1, field_fmt_27_42_3_2_info, field_fmt_27_42_3_2_set, field_fmt_27_42_3_2_get, NULL, 2}, - {"CPU_TX::DESTINATION_TYPE",1, field_fmt_43_46_2_2_info, field_fmt_43_46_2_2_set, field_fmt_43_46_2_2_get, bcm78914_b0_txpmd_cpu_tx_destination_type_names, 2}, - {"CPU_TX::DP",1, field_fmt_47_48_2_2_info, field_fmt_47_48_2_2_set, field_fmt_47_48_2_2_get, bcm78914_b0_txpmd_cpu_tx_dp_names, 2}, - {"CPU_TX::INPUT_PRI",1, field_fmt_49_52_2_2_info, field_fmt_49_52_2_2_set, field_fmt_49_52_2_2_get, NULL, 2}, - {"CPU_TX::INT_CN",1, field_fmt_53_54_2_2_info, field_fmt_53_54_2_2_set, field_fmt_53_54_2_2_get, NULL, 2}, - {"CPU_TX::INT_PRI",1, field_fmt_55_58_2_2_info, field_fmt_55_58_2_2_set, field_fmt_55_58_2_2_get, NULL, 2}, - {"CPU_TX::MCAST_LB_INDEX_VLD",1, field_fmt_59_59_2_2_info, field_fmt_59_59_2_2_set, field_fmt_59_59_2_2_get, NULL, 2}, - {"CPU_TX::PKT_PROFILE",1, field_fmt_60_62_2_2_info, field_fmt_60_62_2_2_set, field_fmt_60_62_2_2_get, NULL, 2}, - {"CPU_TX::QOS_FIELDS_VLD",1, field_fmt_63_63_2_2_info, field_fmt_63_63_2_2_set, field_fmt_63_63_2_2_get, NULL, 2}, - {"CPU_TX::ROUTED_PKT",1, field_fmt_64_64_1_1_info, field_fmt_64_64_1_1_set, field_fmt_64_64_1_1_get, NULL, 2}, - {"CPU_TX::SVP",1, field_fmt_65_77_1_1_info, field_fmt_65_77_1_1_set, field_fmt_65_77_1_1_get, NULL, 2}, - {"CPU_TX::VRF",1, field_fmt_78_90_1_1_info, field_fmt_78_90_1_1_set, field_fmt_78_90_1_1_get, NULL, 2}, - {"CPU_TX::VRF_VALID",1, field_fmt_91_91_1_1_info, field_fmt_91_91_1_1_set, field_fmt_91_91_1_1_get, NULL, 2}, - {"SOBMH_FROM_CPU::COOKIE_7_0",1, field_fmt_0_7_3_3_info, field_fmt_0_7_3_3_set, field_fmt_0_7_3_3_get, NULL, 1}, - {"SOBMH_FROM_CPU::IEEE1588_TIMESTAMP_HDR_OFFSET",1, field_fmt_0_7_3_3_info, field_fmt_0_7_3_3_set, field_fmt_0_7_3_3_get, NULL, 1}, - {"SOBMH_FROM_CPU::COOKIE_8",1, field_fmt_8_8_3_3_info, field_fmt_8_8_3_3_set, field_fmt_8_8_3_3_get, NULL, 1}, - {"SOBMH_FROM_CPU::IEEE1588_REGEN_UDP_CHECKSUM",1, field_fmt_8_8_3_3_info, field_fmt_8_8_3_3_set, field_fmt_8_8_3_3_get, NULL, 1}, - {"SOBMH_FROM_CPU::CELL_ERROR",1, field_fmt_9_9_3_3_info, field_fmt_9_9_3_3_set, field_fmt_9_9_3_3_get, NULL, 1}, - {"SOBMH_FROM_CPU::CNG",1, field_fmt_10_11_3_3_info, field_fmt_10_11_3_3_set, field_fmt_10_11_3_3_get, NULL, 1}, - {"SOBMH_FROM_CPU::COS",1, field_fmt_12_17_3_3_info, field_fmt_12_17_3_3_set, field_fmt_12_17_3_3_get, NULL, 1}, - {"SOBMH_FROM_CPU::DESTINATION",1, field_fmt_18_33_3_2_info, field_fmt_18_33_3_2_set, field_fmt_18_33_3_2_get, NULL, 1}, - {"SOBMH_FROM_CPU::DESTINATION_TYPE",1, field_fmt_34_37_2_2_info, field_fmt_34_37_2_2_set, field_fmt_34_37_2_2_get, bcm78914_b0_txpmd_sobmh_from_cpu_destination_type_names, 1}, - {"SOBMH_FROM_CPU::IEEE1588_INGRESS_TIMESTAMP_SIGN",1, field_fmt_38_38_2_2_info, field_fmt_38_38_2_2_set, field_fmt_38_38_2_2_get, NULL, 1}, - {"SOBMH_FROM_CPU::IEEE1588_ONE_STEP_ENABLE",1, field_fmt_39_39_2_2_info, field_fmt_39_39_2_2_set, field_fmt_39_39_2_2_get, NULL, 1}, - {"SOBMH_FROM_CPU::INPUT_PRI",1, field_fmt_40_43_2_2_info, field_fmt_40_43_2_2_set, field_fmt_40_43_2_2_get, NULL, 1}, - {"SOBMH_FROM_CPU::RQE_Q_NUM",1, field_fmt_44_46_2_2_info, field_fmt_44_46_2_2_set, field_fmt_44_46_2_2_get, NULL, 1}, - {"SOBMH_FROM_CPU::SPAP",1, field_fmt_47_48_2_2_info, field_fmt_47_48_2_2_set, field_fmt_47_48_2_2_get, NULL, 1}, - {"SOBMH_FROM_CPU::SPID",1, field_fmt_49_50_2_2_info, field_fmt_49_50_2_2_set, field_fmt_49_50_2_2_get, NULL, 1}, - {"SOBMH_FROM_CPU::SPID_OVERRIDE",1, field_fmt_51_51_2_2_info, field_fmt_51_51_2_2_set, field_fmt_51_51_2_2_get, NULL, 1}, - {"SOBMH_FROM_CPU::SRC_MODID",1, field_fmt_52_59_2_2_info, field_fmt_52_59_2_2_set, field_fmt_52_59_2_2_get, NULL, 1}, - {"SOBMH_FROM_CPU::TX_TS",1, field_fmt_60_60_2_2_info, field_fmt_60_60_2_2_set, field_fmt_60_60_2_2_get, NULL, 1}, - {"SOBMH_FROM_CPU::UNICAST",1, field_fmt_61_61_2_2_info, field_fmt_61_61_2_2_set, field_fmt_61_61_2_2_get, NULL, 1}, - {"SOBMH_FROM_CPU::WRED_MARK_ELIGIBLE",1, field_fmt_62_62_2_2_info, field_fmt_62_62_2_2_set, field_fmt_62_62_2_2_get, NULL, 1}, - {"SOBMH_FROM_CPU::WRED_RESPONSE",1, field_fmt_63_63_2_2_info, field_fmt_63_63_2_2_set, field_fmt_63_63_2_2_get, NULL, 1}, - {"HEADER_TYPE",1, field_fmt_120_125_0_0_info, field_fmt_120_125_0_0_set, field_fmt_120_125_0_0_get, bcm78914_b0_txpmd_header_type_names, 0}, - {"START",1, field_fmt_126_127_0_0_info, field_fmt_126_127_0_0_set, field_fmt_126_127_0_0_get, bcm78914_b0_txpmd_start_names, 0}, - -}; - -static const shr_enum_map_t bcm78914_b0_txpmd_names[] = -{ - BCM78914_B0_TXPMD_NAME_MAP_INIT -}; - -bcmpkt_pmd_info_t bcm78914_b0_txpmd_info_get(void) -{ - bcmpkt_pmd_info_t bcm78914_b0_txpmd_info = {4, BCM78914_B0_TXPMD_COUNT, bcm78914_b0_txpmd_names, bcm78914_b0_txpmd_fields}; - return bcm78914_b0_txpmd_info; -} - -static const shr_enum_map_t bcm78914_b0_lbhdr_header_type_names[] = -{ - BCM78914_B0_LBHDR_HEADER_TYPE_NAME_MAP_INIT -}; - -static const shr_enum_map_t bcm78914_b0_lbhdr_start_names[] = -{ - BCM78914_B0_LBHDR_START_NAME_MAP_INIT -}; - -static bcmpkt_pmd_field_t bcm78914_b0_lbhdr_fields[BCM78914_B0_LBHDR_COUNT] = { - {"PKT_PROFILE",1, field_fmt_16_18_3_3_info, field_fmt_16_18_3_3_set, field_fmt_16_18_3_3_get, NULL, 0}, - {"QOS_FIELD_VALID",1, field_fmt_19_19_3_3_info, field_fmt_19_19_3_3_set, field_fmt_19_19_3_3_get, NULL, 0}, - {"VFI_VALID_MD_ETH",1, field_fmt_21_21_3_3_info, field_fmt_21_21_3_3_set, field_fmt_21_21_3_3_get, NULL, 0}, - {"VRF_VALID",1, field_fmt_22_22_3_3_info, field_fmt_22_22_3_3_set, field_fmt_22_22_3_3_get, NULL, 0}, - {"VFI_MD_ETH",1, field_fmt_24_36_3_2_info, field_fmt_24_36_3_2_set, field_fmt_24_36_3_2_get, NULL, 0}, - {"VRF",1, field_fmt_24_36_3_2_info, field_fmt_24_36_3_2_set, field_fmt_24_36_3_2_get, NULL, 0}, - {"PP_PORT",1, field_fmt_37_46_2_2_info, field_fmt_37_46_2_2_set, field_fmt_37_46_2_2_get, NULL, 0}, - {"VISIBILITY_PKT",1, field_fmt_47_47_2_2_info, field_fmt_47_47_2_2_set, field_fmt_47_47_2_2_get, NULL, 0}, - {"ROUTED_PKT",1, field_fmt_48_48_2_2_info, field_fmt_48_48_2_2_set, field_fmt_48_48_2_2_get, NULL, 0}, - {"OPAQUE_OBJECT",1, field_fmt_81_84_1_1_info, field_fmt_81_84_1_1_set, field_fmt_81_84_1_1_get, NULL, 0}, - {"QOS_FIELD_ETH",1, field_fmt_85_92_1_1_info, field_fmt_85_92_1_1_set, field_fmt_85_92_1_1_get, NULL, 0}, - {"INT_PRI_ETH",1, field_fmt_85_88_1_1_info, field_fmt_85_88_1_1_set, field_fmt_85_88_1_1_get, NULL, 0}, - {"INT_CN_ETH",1, field_fmt_89_90_1_1_info, field_fmt_89_90_1_1_set, field_fmt_89_90_1_1_get, NULL, 0}, - {"CNG_ETH",1, field_fmt_91_92_1_1_info, field_fmt_91_92_1_1_set, field_fmt_91_92_1_1_get, NULL, 0}, - {"INPUT_PRIORITY_MD_ETH",1, field_fmt_116_119_0_0_info, field_fmt_116_119_0_0_set, field_fmt_116_119_0_0_get, NULL, 0}, - {"HEADER_TYPE",1, field_fmt_120_125_0_0_info, field_fmt_120_125_0_0_set, field_fmt_120_125_0_0_get, bcm78914_b0_lbhdr_header_type_names, 0}, - {"START",1, field_fmt_126_127_0_0_info, field_fmt_126_127_0_0_set, field_fmt_126_127_0_0_get, bcm78914_b0_lbhdr_start_names, 0}, - -}; - -static const shr_enum_map_t bcm78914_b0_lbhdr_names[] = -{ - BCM78914_B0_LBHDR_NAME_MAP_INIT -}; - -bcmpkt_pmd_info_t bcm78914_b0_lbhdr_info_get(void) -{ - bcmpkt_pmd_info_t bcm78914_b0_lbhdr_info = {4, BCM78914_B0_LBHDR_COUNT, bcm78914_b0_lbhdr_names, bcm78914_b0_lbhdr_fields}; - return bcm78914_b0_lbhdr_info; -} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78914_b1/bcm78914_b1_pkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78914_b1/bcm78914_b1_pkt_lbhdr.c deleted file mode 100644 index 5f9c69a982a..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78914_b1/bcm78914_b1_pkt_lbhdr.c +++ /dev/null @@ -1,367 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated from the registers file. - * Edits to this file will be lost when it is regenerated. - * Tool: INTERNAL/regs/xgs/generate-pmd.pl - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - * This file provides LBHDR access functions for BCM78914_B1. - * - ******************************************************************************/ - -#include -#include - -#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) -#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) -#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) -#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) -/******************************************************************************* - * SWFORMAT: LBHDR - * BLOCKS: - * SIZE: 128 - ******************************************************************************/ -static void bcmpkt_lbhdr_start_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[0], 30, 2, val); -} - -static uint32_t bcmpkt_lbhdr_start_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[0], 30, 2); - return val; -} - -static void bcmpkt_lbhdr_header_type_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[0], 24, 6, val); -} - -static uint32_t bcmpkt_lbhdr_header_type_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[0], 24, 6); - return val; -} - -static void bcmpkt_lbhdr_pkt_profile_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[3], 16, 3, val); -} - -static uint32_t bcmpkt_lbhdr_pkt_profile_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[3], 16, 3); - return val; -} - -static void bcmpkt_lbhdr_visibility_pkt_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[2], 15, 1, val); -} - -static uint32_t bcmpkt_lbhdr_visibility_pkt_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[2], 15, 1); - return val; -} - -static void bcmpkt_lbhdr_pp_port_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[2], 5, 10, val); -} - -static uint32_t bcmpkt_lbhdr_pp_port_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[2], 5, 10); - return val; -} - -static void bcmpkt_lbhdr_routed_pkt_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[2], 16, 1, val); -} - -static uint32_t bcmpkt_lbhdr_routed_pkt_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[2], 16, 1); - return val; -} - -static void bcmpkt_lbhdr_vrf_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[3], 24, 8, val & MASK(8)); - WORD_FIELD_SET(data[2], 0, 5, (val >> 8) & MASK(5)); -} - -static uint32_t bcmpkt_lbhdr_vrf_get(uint32_t *data) -{ - uint32_t val; - val = (WORD_FIELD_GET(data[3], 24, 8) | (WORD_FIELD_GET(data[2], 0, 5) << 8)) ; - return val; -} - -static void bcmpkt_lbhdr_vrf_valid_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[3], 22, 1, val); -} - -static uint32_t bcmpkt_lbhdr_vrf_valid_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[3], 22, 1); - return val; -} - -static void bcmpkt_lbhdr_qos_field_valid_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[3], 19, 1, val); -} - -static uint32_t bcmpkt_lbhdr_qos_field_valid_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[3], 19, 1); - return val; -} - -static void bcmpkt_lbhdr_opaque_object_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[1], 17, 4, val); -} - -static uint32_t bcmpkt_lbhdr_opaque_object_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[1], 17, 4); - return val; -} - -static void bcmpkt_lbhdr_qos_field_eth_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[1], 21, 8, val); -} - -static uint32_t bcmpkt_lbhdr_qos_field_eth_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[1], 21, 8); - return val; -} - -static void bcmpkt_lbhdr_int_pri_eth_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[1], 21, 4, val); -} - -static uint32_t bcmpkt_lbhdr_int_pri_eth_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[1], 21, 4); - return val; -} - -static void bcmpkt_lbhdr_int_cn_eth_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[1], 25, 2, val); -} - -static uint32_t bcmpkt_lbhdr_int_cn_eth_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[1], 25, 2); - return val; -} - -static void bcmpkt_lbhdr_cng_eth_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[1], 27, 2, val); -} - -static uint32_t bcmpkt_lbhdr_cng_eth_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[1], 27, 2); - return val; -} - -static void bcmpkt_lbhdr_input_priority_md_eth_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[0], 20, 4, val); -} - -static uint32_t bcmpkt_lbhdr_input_priority_md_eth_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[0], 20, 4); - return val; -} - -static void bcmpkt_lbhdr_vfi_valid_md_eth_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[3], 21, 1, val); -} - -static uint32_t bcmpkt_lbhdr_vfi_valid_md_eth_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[3], 21, 1); - return val; -} - -static void bcmpkt_lbhdr_vfi_md_eth_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[3], 24, 8, val & MASK(8)); - WORD_FIELD_SET(data[2], 0, 5, (val >> 8) & MASK(5)); -} - -static uint32_t bcmpkt_lbhdr_vfi_md_eth_get(uint32_t *data) -{ - uint32_t val; - val = (WORD_FIELD_GET(data[3], 24, 8) | (WORD_FIELD_GET(data[2], 0, 5) << 8)) ; - return val; -} - -static uint32_t bcmpkt_lbhdr_i_size_get(uint32_t *data, uint32_t **addr) -{ - return 4; -} - - -const bcmpkt_lbhdr_fget_t bcm78914_b1_lbhdr_fget = { - { - bcmpkt_lbhdr_start_get, - bcmpkt_lbhdr_header_type_get, - NULL, - bcmpkt_lbhdr_pkt_profile_get, - bcmpkt_lbhdr_visibility_pkt_get, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - bcmpkt_lbhdr_pp_port_get, - bcmpkt_lbhdr_routed_pkt_get, - bcmpkt_lbhdr_vrf_get, - bcmpkt_lbhdr_vrf_valid_get, - bcmpkt_lbhdr_qos_field_valid_get, - bcmpkt_lbhdr_opaque_object_get, - bcmpkt_lbhdr_qos_field_eth_get, - bcmpkt_lbhdr_int_pri_eth_get, - bcmpkt_lbhdr_int_cn_eth_get, - bcmpkt_lbhdr_cng_eth_get, - bcmpkt_lbhdr_input_priority_md_eth_get, - bcmpkt_lbhdr_vfi_valid_md_eth_get, - bcmpkt_lbhdr_vfi_md_eth_get - } -}; - - -const bcmpkt_lbhdr_fset_t bcm78914_b1_lbhdr_fset = { - { - bcmpkt_lbhdr_start_set, - bcmpkt_lbhdr_header_type_set, - NULL, - bcmpkt_lbhdr_pkt_profile_set, - bcmpkt_lbhdr_visibility_pkt_set, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - bcmpkt_lbhdr_pp_port_set, - bcmpkt_lbhdr_routed_pkt_set, - bcmpkt_lbhdr_vrf_set, - bcmpkt_lbhdr_vrf_valid_set, - bcmpkt_lbhdr_qos_field_valid_set, - bcmpkt_lbhdr_opaque_object_set, - bcmpkt_lbhdr_qos_field_eth_set, - bcmpkt_lbhdr_int_pri_eth_set, - bcmpkt_lbhdr_int_cn_eth_set, - bcmpkt_lbhdr_cng_eth_set, - bcmpkt_lbhdr_input_priority_md_eth_set, - bcmpkt_lbhdr_vfi_valid_md_eth_set, - bcmpkt_lbhdr_vfi_md_eth_set - } -}; - - -const bcmpkt_lbhdr_figet_t bcm78914_b1_lbhdr_figet = { - { - bcmpkt_lbhdr_i_size_get - } -}; - -static shr_enum_map_t bcm78914_b1_lbhdr_view_types[] = { - {NULL, -1}, -}; - -/* -2: unsupported, -1: global, others: view's value */ -static int bcm78914_b1_lbhdr_view_infos[BCMPKT_LBHDR_FID_COUNT] = { - -1, -1, -2, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, - -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1, -}; - - -void bcm78914_b1_lbhdr_view_info_get(bcmpkt_pmd_view_info_t *info) -{ - info->view_infos = bcm78914_b1_lbhdr_view_infos; - info->view_types = bcm78914_b1_lbhdr_view_types; - info->view_type_get = NULL; -} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78914_b1/bcm78914_b1_pkt_rxpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78914_b1/bcm78914_b1_pkt_rxpmd.c deleted file mode 100644 index d13d385552d..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78914_b1/bcm78914_b1_pkt_rxpmd.c +++ /dev/null @@ -1,1187 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated from the registers file. - * Edits to this file will be lost when it is regenerated. - * Tool: INTERNAL/regs/xgs/generate-pmd.pl - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - * This file provides RXPMD access functions for BCM78914_B1. - * - ******************************************************************************/ - -#include -#include -#include - -#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) -#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) -#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) -#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) -/******************************************************************************* - * SWFORMAT: RXPMD - * BLOCKS: - * SIZE: 448 - ******************************************************************************/ -static void bcmpkt_rxpmd_unicast_queue_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[4], 21, 1, val); -} - -static uint32_t bcmpkt_rxpmd_unicast_queue_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[4], 21, 1); - return val; -} - -static void bcmpkt_rxpmd_queue_num_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[11], 26, 6, val); -} - -static uint32_t bcmpkt_rxpmd_queue_num_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[11], 26, 6); - return val; -} - -static void bcmpkt_rxpmd_cpu_cos_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[11], 26, 6, val); -} - -static uint32_t bcmpkt_rxpmd_cpu_cos_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[11], 26, 6); - return val; -} - -static void bcmpkt_rxpmd_matched_rule_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[8], 16, 12, val); -} - -static uint32_t bcmpkt_rxpmd_matched_rule_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[8], 16, 12); - return val; -} - -static void bcmpkt_rxpmd_pkt_length_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[9], 3, 14, val); -} - -static uint32_t bcmpkt_rxpmd_pkt_length_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[9], 3, 14); - return val; -} - -static void bcmpkt_rxpmd_src_port_num_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[6], 20, 10, val); -} - -static uint32_t bcmpkt_rxpmd_src_port_num_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[6], 20, 10); - return val; -} - -static void bcmpkt_rxpmd_outer_vid_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[7], 3, 12, val); -} - -static uint32_t bcmpkt_rxpmd_outer_vid_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[7], 3, 12); - return val; -} - -static void bcmpkt_rxpmd_outer_cfi_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[8], 31, 1, val); -} - -static uint32_t bcmpkt_rxpmd_outer_cfi_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[8], 31, 1); - return val; -} - -static void bcmpkt_rxpmd_outer_pri_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[7], 0, 3, val); -} - -static uint32_t bcmpkt_rxpmd_outer_pri_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[7], 0, 3); - return val; -} - -static void bcmpkt_rxpmd_special_packet_indicator_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[6], 19, 1, val); -} - -static uint32_t bcmpkt_rxpmd_special_packet_indicator_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[6], 19, 1); - return val; -} - -static void bcmpkt_rxpmd_special_packet_type_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[8], 6, 3, val); -} - -static uint32_t bcmpkt_rxpmd_special_packet_type_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[8], 6, 3); - return val; -} - -static void bcmpkt_rxpmd_change_dscp_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[8], 2, 1, val); -} - -static uint32_t bcmpkt_rxpmd_change_dscp_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[8], 2, 1); - return val; -} - -static void bcmpkt_rxpmd_dscp_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[8], 6, 6, val); -} - -static uint32_t bcmpkt_rxpmd_dscp_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[8], 6, 6); - return val; -} - -static void bcmpkt_rxpmd_change_ecn_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[8], 3, 1, val); -} - -static uint32_t bcmpkt_rxpmd_change_ecn_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[8], 3, 1); - return val; -} - -static void bcmpkt_rxpmd_ecn_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[8], 12, 2, val); -} - -static uint32_t bcmpkt_rxpmd_ecn_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[8], 12, 2); - return val; -} - -static void bcmpkt_rxpmd_timestamp_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[6], 31, 1, val & MASK(1)); - WORD_FIELD_SET(data[5], 0, 31, (val >> 1) & MASK(31)); -} - -static uint32_t bcmpkt_rxpmd_timestamp_get(uint32_t *data) -{ - uint32_t val; - val = (WORD_FIELD_GET(data[6], 31, 1) | (WORD_FIELD_GET(data[5], 0, 31) << 1)) ; - return val; -} - -static void bcmpkt_rxpmd_timestamp_hi_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[5], 31, 1, val & MASK(1)); - WORD_FIELD_SET(data[4], 0, 15, (val >> 1) & MASK(15)); -} - -static uint32_t bcmpkt_rxpmd_timestamp_hi_get(uint32_t *data) -{ - uint32_t val; - val = (WORD_FIELD_GET(data[5], 31, 1) | (WORD_FIELD_GET(data[4], 0, 15) << 1)) ; - return val; -} - -static void bcmpkt_rxpmd_mtp_index_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[8], 28, 3, val); -} - -static uint32_t bcmpkt_rxpmd_mtp_index_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[8], 28, 3); - return val; -} - -static void bcmpkt_rxpmd_bpdu_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[8], 1, 1, val); -} - -static uint32_t bcmpkt_rxpmd_bpdu_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[8], 1, 1); - return val; -} - -static void bcmpkt_rxpmd_l3only_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[8], 15, 1, val); -} - -static uint32_t bcmpkt_rxpmd_l3only_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[8], 15, 1); - return val; -} - -static void bcmpkt_rxpmd_ip_routed_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[8], 14, 1, val); -} - -static uint32_t bcmpkt_rxpmd_ip_routed_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[8], 14, 1); - return val; -} - -static void bcmpkt_rxpmd_uc_sw_copy_dropped_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[4], 20, 1, val); -} - -static uint32_t bcmpkt_rxpmd_uc_sw_copy_dropped_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[4], 20, 1); - return val; -} - -static void bcmpkt_rxpmd_switch_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[6], 30, 1, val); -} - -static uint32_t bcmpkt_rxpmd_switch_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[6], 30, 1); - return val; -} - -static void bcmpkt_rxpmd_ing_otag_action_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[9], 1, 2, val); -} - -static uint32_t bcmpkt_rxpmd_ing_otag_action_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[9], 1, 2); - return val; -} - -static void bcmpkt_rxpmd_ing_tag_type_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[9], 0, 1, val); -} - -static uint32_t bcmpkt_rxpmd_ing_tag_type_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[9], 0, 1); - return val; -} - -static void bcmpkt_rxpmd_rx_bfd_start_offset_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[11], 18, 8, val); -} - -static uint32_t bcmpkt_rxpmd_rx_bfd_start_offset_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[11], 18, 8); - return val; -} - -static void bcmpkt_rxpmd_rx_bfd_start_offset_type_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[11], 16, 2, val); -} - -static uint32_t bcmpkt_rxpmd_rx_bfd_start_offset_type_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[11], 16, 2); - return val; -} - -static void bcmpkt_rxpmd_rx_bfd_session_index_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[11], 4, 12, val); -} - -static uint32_t bcmpkt_rxpmd_rx_bfd_session_index_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[11], 4, 12); - return val; -} - -static void bcmpkt_rxpmd_reason_type_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[11], 0, 4, val); -} - -static uint32_t bcmpkt_rxpmd_reason_type_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[11], 0, 4); - return val; -} - -static void bcmpkt_rxpmd_do_not_change_ttl_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[8], 5, 1, val); -} - -static uint32_t bcmpkt_rxpmd_do_not_change_ttl_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[8], 5, 1); - return val; -} - -static void bcmpkt_rxpmd_i2e_classid_type_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[11], 16, 4, val); -} - -static uint32_t bcmpkt_rxpmd_i2e_classid_type_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[11], 16, 4); - return val; -} - -static void bcmpkt_rxpmd_i2e_classid_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[11], 4, 12, val); -} - -static uint32_t bcmpkt_rxpmd_i2e_classid_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[11], 4, 12); - return val; -} - -static void bcmpkt_rxpmd_ing_l3_intf_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[10], 19, 13, val); -} - -static uint32_t bcmpkt_rxpmd_ing_l3_intf_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[10], 19, 13); - return val; -} - -static void bcmpkt_rxpmd_entropy_label_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[7], 31, 1, val & MASK(1)); - WORD_FIELD_SET(data[6], 0, 19, (val >> 1) & MASK(19)); -} - -static uint32_t bcmpkt_rxpmd_entropy_label_get(uint32_t *data) -{ - uint32_t val; - val = (WORD_FIELD_GET(data[7], 31, 1) | (WORD_FIELD_GET(data[6], 0, 19) << 1)) ; - return val; -} - -static void bcmpkt_rxpmd_tunnel_decap_type_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[4], 16, 4, val); -} - -static uint32_t bcmpkt_rxpmd_tunnel_decap_type_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[4], 16, 4); - return val; -} - -static void bcmpkt_rxpmd_dlb_id_valid_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[8], 4, 1, val); -} - -static uint32_t bcmpkt_rxpmd_dlb_id_valid_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[8], 4, 1); - return val; -} - -static void bcmpkt_rxpmd_dlb_id_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[4], 24, 7, val); -} - -static uint32_t bcmpkt_rxpmd_dlb_id_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[4], 24, 7); - return val; -} - -static void bcmpkt_rxpmd_replication_or_nhop_index_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[7], 15, 15, val); -} - -static uint32_t bcmpkt_rxpmd_replication_or_nhop_index_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[7], 15, 15); - return val; -} - -static void bcmpkt_rxpmd_incoming_int_hdr_type_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[4], 22, 2, val); -} - -static uint32_t bcmpkt_rxpmd_incoming_int_hdr_type_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[4], 22, 2); - return val; -} - -static void bcmpkt_rxpmd_o_nhi_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[9], 17, 15, val); -} - -static uint32_t bcmpkt_rxpmd_o_nhi_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[9], 17, 15); - return val; -} - -static void bcmpkt_rxpmd_incoming_opaque_tag_status_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[8], 0, 1, val); -} - -static uint32_t bcmpkt_rxpmd_incoming_opaque_tag_status_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[8], 0, 1); - return val; -} - -static void bcmpkt_rxpmd_ieee_802_1as_timestamp_enabled_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[4], 15, 1, val); -} - -static uint32_t bcmpkt_rxpmd_ieee_802_1as_timestamp_enabled_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[4], 15, 1); - return val; -} - -static void bcmpkt_rxpmd_matched_rule_ep_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[8], 16, 9, val); -} - -static uint32_t bcmpkt_rxpmd_matched_rule_ep_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[8], 16, 9); - return val; -} - -static void bcmpkt_rxpmd_is_egr_ts_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[8], 25, 1, val); -} - -static uint32_t bcmpkt_rxpmd_is_egr_ts_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[8], 25, 1); - return val; -} - -static void bcmpkt_rxpmd_modified_pkt_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[7], 30, 1, val); -} - -static uint32_t bcmpkt_rxpmd_modified_pkt_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[7], 30, 1); - return val; -} - -static uint32_t bcmpkt_rxpmd_i_size_get(uint32_t *data, uint32_t **addr) -{ - return 14; -} - -static uint32_t bcmpkt_rxpmd_i_reason_get(uint32_t *data, uint32_t **addr) -{ - *addr = data + 12; - return 2; -} - -static uint32_t bcmpkt_rxpmd_i_module_hdr_get(uint32_t *data, uint32_t **addr) -{ - *addr = data + 0; - return 4; -} - -/******************************************************************************* - * SWFORMAT: RX_REASON - * BLOCKS: - * SIZE: 51 - ******************************************************************************/ -void bcm78914_b1_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data) -{ - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_INVALID_REASON)) { - data[1] |= (0x1 << 0); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SLF)) { - data[1] |= (0x1 << 1); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_DLF)) { - data[1] |= (0x1 << 2); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L2MOVE)) { - data[1] |= (0x1 << 3); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L2CPU)) { - data[1] |= (0x1 << 4); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MISS)) { - data[1] |= (0x1 << 5); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3DST_MISS)) { - data[1] |= (0x1 << 6); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MOVE)) { - data[1] |= (0x1 << 7); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_MC_MISS)) { - data[1] |= (0x1 << 8); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_MISS)) { - data[1] |= (0x1 << 9); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_FFP)) { - data[1] |= (0x1 << 10); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_L3HDR_ERR)) { - data[1] |= (0x1 << 11); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_PROTOCOL_PKT)) { - data[1] |= (0x1 << 12); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_DOS_ATTACK)) { - data[1] |= (0x1 << 13); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_MARTIAN_ADDR)) { - data[1] |= (0x1 << 14); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_TUNNEL_ERR)) { - data[1] |= (0x1 << 15); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_SRC)) { - data[1] |= (0x1 << 16); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_DST)) { - data[1] |= (0x1 << 17); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_ICMP_REDIRECT)) { - data[1] |= (0x1 << 18); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_SLOWPATH)) { - data[1] |= (0x1 << 19); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PARITY_ERROR)) { - data[1] |= (0x1 << 20); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_MTU_CHECK_FAIL)) { - data[1] |= (0x1 << 21); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_TTL_CHECK)) { - data[1] |= (0x1 << 22); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_LABEL_MISS)) { - data[1] |= (0x1 << 23); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_INVALID_ACTION)) { - data[1] |= (0x1 << 24); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_INVALID_PAYLOAD)) { - data[1] |= (0x1 << 25); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_VFP)) { - data[1] |= (0x1 << 26); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PBT_NONUC_PKT)) { - data[1] |= (0x1 << 27); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_L3_NEXT_HOP)) { - data[1] |= (0x1 << 28); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MY_STATION)) { - data[1] |= (0x1 << 29); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_TIME_SYNC)) { - data[1] |= (0x1 << 30); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_TUNNEL_DECAP_ECN_ERROR)) { - data[1] |= (0x1 << 31); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_BFD_SLOWPATH)) { - data[0] |= (0x1 << 0); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_BFD_ERROR)) { - data[0] |= (0x1 << 1); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PACKET_TRACE_TO_CPU)) { - data[0] |= (0x1 << 2); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT)) { - data[0] |= (0x1 << 3); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_MPLS_ALERT_LABEL)) { - data[0] |= (0x1 << 4); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH)) { - data[0] |= (0x1 << 5); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_DLB_MONITOR)) { - data[0] |= (0x1 << 6); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_FLEX)) { - data[0] |= (0x1 << 7); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_CPU_UVLAN)) { - data[0] |= (0x1 << 8); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_SRV6_ERROR)) { - data[0] |= (0x1 << 9); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_VXLAN_VN_ID_MISS)) { - data[0] |= (0x1 << 10); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_VXLAN_SIP_MISS)) { - data[0] |= (0x1 << 11); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_ADAPT_MISS)) { - data[0] |= (0x1 << 12); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_INVALID_GSH_NON_GSH)) { - data[0] |= (0x1 << 13); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_APU_POLICY_CTC)) { - data[0] |= (0x1 << 14); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_DELAYED_CTC)) { - data[0] |= (0x1 << 15); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_PORT_DOWN)) { - data[0] |= (0x1 << 16); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_SRV6_CONTROL_PKT)) { - data[0] |= (0x1 << 17); - } - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_OUI_COMPRESSION_MISS)) { - data[0] |= (0x1 << 18); - } -} - -void bcm78914_b1_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons) -{ - uint32_t val; - COMPILER_REFERENCE(val); - if (data[1] & (0x1 << 0)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_INVALID_REASON); - } - if (data[1] & (0x1 << 1)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SLF); - } - if (data[1] & (0x1 << 2)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_DLF); - } - if (data[1] & (0x1 << 3)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L2MOVE); - } - if (data[1] & (0x1 << 4)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L2CPU); - } - if (data[1] & (0x1 << 5)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MISS); - } - if (data[1] & (0x1 << 6)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3DST_MISS); - } - if (data[1] & (0x1 << 7)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3SRC_MOVE); - } - if (data[1] & (0x1 << 8)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_MC_MISS); - } - if (data[1] & (0x1 << 9)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_MISS); - } - if (data[1] & (0x1 << 10)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_FFP); - } - if (data[1] & (0x1 << 11)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_L3HDR_ERR); - } - if (data[1] & (0x1 << 12)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_PROTOCOL_PKT); - } - if (data[1] & (0x1 << 13)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_DOS_ATTACK); - } - if (data[1] & (0x1 << 14)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_MARTIAN_ADDR); - } - if (data[1] & (0x1 << 15)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_TUNNEL_ERR); - } - if (data[1] & (0x1 << 16)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_SRC); - } - if (data[1] & (0x1 << 17)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_DST); - } - if (data[1] & (0x1 << 18)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_ICMP_REDIRECT); - } - if (data[1] & (0x1 << 19)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_SLOWPATH); - } - if (data[1] & (0x1 << 20)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PARITY_ERROR); - } - if (data[1] & (0x1 << 21)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_MTU_CHECK_FAIL); - } - if (data[1] & (0x1 << 22)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_TTL_CHECK); - } - if (data[1] & (0x1 << 23)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_LABEL_MISS); - } - if (data[1] & (0x1 << 24)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_INVALID_ACTION); - } - if (data[1] & (0x1 << 25)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_INVALID_PAYLOAD); - } - if (data[1] & (0x1 << 26)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_VFP); - } - if (data[1] & (0x1 << 27)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PBT_NONUC_PKT); - } - if (data[1] & (0x1 << 28)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_L3_NEXT_HOP); - } - if (data[1] & (0x1 << 29)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MY_STATION); - } - if (data[1] & (0x1 << 30)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_TIME_SYNC); - } - if (data[1] & (0x1 << 31)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_TUNNEL_DECAP_ECN_ERROR); - } - if (data[0] & (0x1 << 0)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_BFD_SLOWPATH); - } - if (data[0] & (0x1 << 1)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_BFD_ERROR); - } - if (data[0] & (0x1 << 2)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PACKET_TRACE_TO_CPU); - } - if (data[0] & (0x1 << 3)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT); - } - if (data[0] & (0x1 << 4)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_MPLS_ALERT_LABEL); - } - if (data[0] & (0x1 << 5)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH); - } - if (data[0] & (0x1 << 6)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_DLB_MONITOR); - } - if (data[0] & (0x1 << 7)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_SFLOW_FLEX); - } - if (data[0] & (0x1 << 8)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_CPU_UVLAN); - } - if (data[0] & (0x1 << 9)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_SRV6_ERROR); - } - if (data[0] & (0x1 << 10)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_VXLAN_VN_ID_MISS); - } - if (data[0] & (0x1 << 11)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_VXLAN_SIP_MISS); - } - if (data[0] & (0x1 << 12)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_ADAPT_MISS); - } - if (data[0] & (0x1 << 13)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_INVALID_GSH_NON_GSH); - } - if (data[0] & (0x1 << 14)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_APU_POLICY_CTC); - } - if (data[0] & (0x1 << 15)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_DELAYED_CTC); - } - if (data[0] & (0x1 << 16)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_PORT_DOWN); - } - if (data[0] & (0x1 << 17)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_SRV6_CONTROL_PKT); - } - if (data[0] & (0x1 << 18)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_OUI_COMPRESSION_MISS); - } -} - -/******************************************************************************* - * SWFORMAT: EP_RX_REASON - * BLOCKS: - * SIZE: 64 - ******************************************************************************/ -void bcm78914_b1_ep_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data) -{ - if (BCMPKT_RX_REASON_GET(*reasons, BCMPKT_RX_REASON_EP_CTC)) { - data[1] |= (0x1 << 0); - } -} - -void bcm78914_b1_ep_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons) -{ - uint32_t val; - COMPILER_REFERENCE(val); - if (data[1] & (0x1 << 0)) { - BCMPKT_RX_REASON_SET(*reasons, BCMPKT_RX_REASON_EP_CTC); - } -} - -const bcmpkt_rxpmd_fget_t bcm78914_b1_rxpmd_fget = { - { - bcmpkt_rxpmd_unicast_queue_get, - bcmpkt_rxpmd_queue_num_get, - bcmpkt_rxpmd_cpu_cos_get, - NULL, - bcmpkt_rxpmd_matched_rule_get, - bcmpkt_rxpmd_pkt_length_get, - bcmpkt_rxpmd_src_port_num_get, - NULL, - NULL, - NULL, - bcmpkt_rxpmd_outer_vid_get, - bcmpkt_rxpmd_outer_cfi_get, - bcmpkt_rxpmd_outer_pri_get, - bcmpkt_rxpmd_special_packet_indicator_get, - bcmpkt_rxpmd_special_packet_type_get, - bcmpkt_rxpmd_change_dscp_get, - bcmpkt_rxpmd_dscp_get, - bcmpkt_rxpmd_change_ecn_get, - bcmpkt_rxpmd_ecn_get, - NULL, - bcmpkt_rxpmd_timestamp_get, - bcmpkt_rxpmd_timestamp_hi_get, - bcmpkt_rxpmd_mtp_index_get, - bcmpkt_rxpmd_bpdu_get, - NULL, - bcmpkt_rxpmd_l3only_get, - bcmpkt_rxpmd_ip_routed_get, - NULL, - NULL, - bcmpkt_rxpmd_uc_sw_copy_dropped_get, - bcmpkt_rxpmd_switch_get, - NULL, - NULL, - bcmpkt_rxpmd_ing_otag_action_get, - bcmpkt_rxpmd_ing_tag_type_get, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - bcmpkt_rxpmd_rx_bfd_start_offset_get, - bcmpkt_rxpmd_rx_bfd_start_offset_type_get, - bcmpkt_rxpmd_rx_bfd_session_index_get, - bcmpkt_rxpmd_reason_type_get, - bcmpkt_rxpmd_do_not_change_ttl_get, - bcmpkt_rxpmd_i2e_classid_type_get, - bcmpkt_rxpmd_i2e_classid_get, - bcmpkt_rxpmd_ing_l3_intf_get, - NULL, - NULL, - bcmpkt_rxpmd_entropy_label_get, - bcmpkt_rxpmd_tunnel_decap_type_get, - bcmpkt_rxpmd_dlb_id_valid_get, - bcmpkt_rxpmd_dlb_id_get, - NULL, - NULL, - NULL, - NULL, - bcmpkt_rxpmd_replication_or_nhop_index_get, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - bcmpkt_rxpmd_incoming_int_hdr_type_get, - NULL, - NULL, - NULL, - NULL, - bcmpkt_rxpmd_o_nhi_get, - NULL, - NULL, - bcmpkt_rxpmd_incoming_opaque_tag_status_get, - NULL, - NULL, - NULL, - NULL, - bcmpkt_rxpmd_ieee_802_1as_timestamp_enabled_get, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - bcmpkt_rxpmd_matched_rule_ep_get, - bcmpkt_rxpmd_is_egr_ts_get, - bcmpkt_rxpmd_modified_pkt_get, - NULL, - NULL - } -}; - - -const bcmpkt_rxpmd_fset_t bcm78914_b1_rxpmd_fset = { - { - bcmpkt_rxpmd_unicast_queue_set, - bcmpkt_rxpmd_queue_num_set, - bcmpkt_rxpmd_cpu_cos_set, - NULL, - bcmpkt_rxpmd_matched_rule_set, - bcmpkt_rxpmd_pkt_length_set, - bcmpkt_rxpmd_src_port_num_set, - NULL, - NULL, - NULL, - bcmpkt_rxpmd_outer_vid_set, - bcmpkt_rxpmd_outer_cfi_set, - bcmpkt_rxpmd_outer_pri_set, - bcmpkt_rxpmd_special_packet_indicator_set, - bcmpkt_rxpmd_special_packet_type_set, - bcmpkt_rxpmd_change_dscp_set, - bcmpkt_rxpmd_dscp_set, - bcmpkt_rxpmd_change_ecn_set, - bcmpkt_rxpmd_ecn_set, - NULL, - bcmpkt_rxpmd_timestamp_set, - bcmpkt_rxpmd_timestamp_hi_set, - bcmpkt_rxpmd_mtp_index_set, - bcmpkt_rxpmd_bpdu_set, - NULL, - bcmpkt_rxpmd_l3only_set, - bcmpkt_rxpmd_ip_routed_set, - NULL, - NULL, - bcmpkt_rxpmd_uc_sw_copy_dropped_set, - bcmpkt_rxpmd_switch_set, - NULL, - NULL, - bcmpkt_rxpmd_ing_otag_action_set, - bcmpkt_rxpmd_ing_tag_type_set, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - bcmpkt_rxpmd_rx_bfd_start_offset_set, - bcmpkt_rxpmd_rx_bfd_start_offset_type_set, - bcmpkt_rxpmd_rx_bfd_session_index_set, - bcmpkt_rxpmd_reason_type_set, - bcmpkt_rxpmd_do_not_change_ttl_set, - bcmpkt_rxpmd_i2e_classid_type_set, - bcmpkt_rxpmd_i2e_classid_set, - bcmpkt_rxpmd_ing_l3_intf_set, - NULL, - NULL, - bcmpkt_rxpmd_entropy_label_set, - bcmpkt_rxpmd_tunnel_decap_type_set, - bcmpkt_rxpmd_dlb_id_valid_set, - bcmpkt_rxpmd_dlb_id_set, - NULL, - NULL, - NULL, - NULL, - bcmpkt_rxpmd_replication_or_nhop_index_set, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - bcmpkt_rxpmd_incoming_int_hdr_type_set, - NULL, - NULL, - NULL, - NULL, - bcmpkt_rxpmd_o_nhi_set, - NULL, - NULL, - bcmpkt_rxpmd_incoming_opaque_tag_status_set, - NULL, - NULL, - NULL, - NULL, - bcmpkt_rxpmd_ieee_802_1as_timestamp_enabled_set, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - bcmpkt_rxpmd_matched_rule_ep_set, - bcmpkt_rxpmd_is_egr_ts_set, - bcmpkt_rxpmd_modified_pkt_set, - NULL, - NULL - } -}; - - -const bcmpkt_rxpmd_figet_t bcm78914_b1_rxpmd_figet = { - { - bcmpkt_rxpmd_i_size_get, - bcmpkt_rxpmd_i_reason_get, - bcmpkt_rxpmd_i_module_hdr_get, - NULL - } -}; - -static shr_enum_map_t bcm78914_b1_rxpmd_view_types[] = { - {NULL, -1}, -}; - -/* -2: unsupported, -1: global, others: view's value */ -static int bcm78914_b1_rxpmd_view_infos[BCMPKT_RXPMD_FID_COUNT] = { - -1, -1, -1, -2, -1, -1, -1, -2, -2, -2, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -2, -1, -1, -1, -1, -2, -1, -1, -2, -2, -1, -1, -2, - -2, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, - -1, -1, -1, -1, -1, -1, -1, -2, -2, -1, -1, -1, -1, -2, -2, -2, - -2, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -2, -2, -2, - -2, -1, -2, -2, -1, -2, -2, -2, -2, -1, -2, -2, -2, -2, -2, -2, - -1, -1, -1, -2, -2, -}; - - -void bcm78914_b1_rxpmd_view_info_get(bcmpkt_pmd_view_info_t *info) -{ - info->view_infos = bcm78914_b1_rxpmd_view_infos; - info->view_types = bcm78914_b1_rxpmd_view_types; - info->view_type_get = NULL; -} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78914_b1/bcm78914_b1_pkt_txpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78914_b1/bcm78914_b1_pkt_txpmd.c deleted file mode 100644 index 5fff77fedbf..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78914_b1/bcm78914_b1_pkt_txpmd.c +++ /dev/null @@ -1,1059 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated from the registers file. - * Edits to this file will be lost when it is regenerated. - * Tool: INTERNAL/regs/xgs/generate-pmd.pl - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - * This file provides TXPMD access functions for BCM78914_B1. - * - ******************************************************************************/ - -#include -#include - -#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) -#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) -#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) -#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) -/******************************************************************************* - * SWFORMAT: TXPMD - * BLOCKS: - * SIZE: 128 - ******************************************************************************/ -static void bcmpkt_txpmd_start_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[0], 30, 2, val); -} - -static uint32_t bcmpkt_txpmd_start_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[0], 30, 2); - return val; -} - -static void bcmpkt_txpmd_header_type_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[0], 24, 6, val); -} - -static uint32_t bcmpkt_txpmd_header_type_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[0], 24, 6); - return val; -} - -static void bcmpkt_txpmd_cell_error_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return; - } - WORD_FIELD_SET(data[3], 9, 1, val); -} - -static uint32_t bcmpkt_txpmd_cell_error_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return 0; - } - val = WORD_FIELD_GET(data[3], 9, 1); - return val; -} - -static void bcmpkt_txpmd_src_modid_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return; - } - WORD_FIELD_SET(data[2], 20, 8, val); -} - -static uint32_t bcmpkt_txpmd_src_modid_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return 0; - } - val = WORD_FIELD_GET(data[2], 20, 8); - return val; -} - -static void bcmpkt_txpmd_cos_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return; - } - WORD_FIELD_SET(data[3], 12, 6, val); -} - -static uint32_t bcmpkt_txpmd_cos_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return 0; - } - val = WORD_FIELD_GET(data[3], 12, 6); - return val; -} - -static void bcmpkt_txpmd_input_pri_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return; - } - WORD_FIELD_SET(data[2], 8, 4, val); -} - -static uint32_t bcmpkt_txpmd_input_pri_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return 0; - } - val = WORD_FIELD_GET(data[2], 8, 4); - return val; -} - -static void bcmpkt_txpmd_unicast_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return; - } - WORD_FIELD_SET(data[2], 29, 1, val); -} - -static uint32_t bcmpkt_txpmd_unicast_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return 0; - } - val = WORD_FIELD_GET(data[2], 29, 1); - return val; -} - -static void bcmpkt_txpmd_rqe_q_num_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return; - } - WORD_FIELD_SET(data[2], 12, 3, val); -} - -static uint32_t bcmpkt_txpmd_rqe_q_num_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return 0; - } - val = WORD_FIELD_GET(data[2], 12, 3); - return val; -} - -static void bcmpkt_txpmd_ieee1588_one_step_enable_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return; - } - WORD_FIELD_SET(data[2], 7, 1, val); -} - -static uint32_t bcmpkt_txpmd_ieee1588_one_step_enable_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return 0; - } - val = WORD_FIELD_GET(data[2], 7, 1); - return val; -} - -static void bcmpkt_txpmd_ieee1588_regen_udp_checksum_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return; - } - WORD_FIELD_SET(data[3], 8, 1, val); -} - -static uint32_t bcmpkt_txpmd_ieee1588_regen_udp_checksum_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return 0; - } - val = WORD_FIELD_GET(data[3], 8, 1); - return val; -} - -static void bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return; - } - WORD_FIELD_SET(data[2], 6, 1, val); -} - -static uint32_t bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return 0; - } - val = WORD_FIELD_GET(data[2], 6, 1); - return val; -} - -static void bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return; - } - WORD_FIELD_SET(data[3], 0, 8, val); -} - -static uint32_t bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return 0; - } - val = WORD_FIELD_GET(data[3], 0, 8); - return val; -} - -static void bcmpkt_txpmd_tx_ts_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return; - } - WORD_FIELD_SET(data[2], 28, 1, val); -} - -static uint32_t bcmpkt_txpmd_tx_ts_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return 0; - } - val = WORD_FIELD_GET(data[2], 28, 1); - return val; -} - -static void bcmpkt_txpmd_spid_override_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return; - } - WORD_FIELD_SET(data[2], 19, 1, val); -} - -static uint32_t bcmpkt_txpmd_spid_override_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return 0; - } - val = WORD_FIELD_GET(data[2], 19, 1); - return val; -} - -static void bcmpkt_txpmd_spid_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return; - } - WORD_FIELD_SET(data[2], 17, 2, val); -} - -static uint32_t bcmpkt_txpmd_spid_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return 0; - } - val = WORD_FIELD_GET(data[2], 17, 2); - return val; -} - -static void bcmpkt_txpmd_spap_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return; - } - WORD_FIELD_SET(data[2], 15, 2, val); -} - -static uint32_t bcmpkt_txpmd_spap_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return 0; - } - val = WORD_FIELD_GET(data[2], 15, 2); - return val; -} - -static void bcmpkt_txpmd_cng_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return; - } - WORD_FIELD_SET(data[3], 10, 2, val); -} - -static uint32_t bcmpkt_txpmd_cng_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return 0; - } - val = WORD_FIELD_GET(data[3], 10, 2); - return val; -} - -static void bcmpkt_txpmd_destination_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return; - } - WORD_FIELD_SET(data[3], 18, 14, val & MASK(14)); - WORD_FIELD_SET(data[2], 0, 2, (val >> 14) & MASK(2)); -} - -static uint32_t bcmpkt_txpmd_destination_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return 0; - } - val = (WORD_FIELD_GET(data[3], 18, 14) | (WORD_FIELD_GET(data[2], 0, 2) << 14)) ; - return val; -} - -static void bcmpkt_txpmd_destination_type_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return; - } - WORD_FIELD_SET(data[2], 2, 4, val); -} - -static uint32_t bcmpkt_txpmd_destination_type_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return 0; - } - val = WORD_FIELD_GET(data[2], 2, 4); - return val; -} - -static void bcmpkt_txpmd_wred_mark_eligible_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return; - } - WORD_FIELD_SET(data[2], 30, 1, val); -} - -static uint32_t bcmpkt_txpmd_wred_mark_eligible_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return 0; - } - val = WORD_FIELD_GET(data[2], 30, 1); - return val; -} - -static void bcmpkt_txpmd_wred_response_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return; - } - WORD_FIELD_SET(data[2], 31, 1, val); -} - -static uint32_t bcmpkt_txpmd_wred_response_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return 0; - } - val = WORD_FIELD_GET(data[2], 31, 1); - return val; -} - -static void bcmpkt_txpmd_cpu_tx_mcast_lb_index_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return; - } - WORD_FIELD_SET(data[3], 0, 8, val); -} - -static uint32_t bcmpkt_txpmd_cpu_tx_mcast_lb_index_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return 0; - } - val = WORD_FIELD_GET(data[3], 0, 8); - return val; -} - -static void bcmpkt_txpmd_cpu_tx_ecmp_member_id_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return; - } - WORD_FIELD_SET(data[3], 0, 17, val); -} - -static uint32_t bcmpkt_txpmd_cpu_tx_ecmp_member_id_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return 0; - } - val = WORD_FIELD_GET(data[3], 0, 17); - return val; -} - -static void bcmpkt_txpmd_cpu_tx_destination_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return; - } - WORD_FIELD_SET(data[3], 27, 5, val & MASK(5)); - WORD_FIELD_SET(data[2], 0, 11, (val >> 5) & MASK(11)); -} - -static uint32_t bcmpkt_txpmd_cpu_tx_destination_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return 0; - } - val = (WORD_FIELD_GET(data[3], 27, 5) | (WORD_FIELD_GET(data[2], 0, 11) << 5)) ; - return val; -} - -static void bcmpkt_txpmd_cpu_tx_destination_type_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return; - } - WORD_FIELD_SET(data[2], 11, 4, val); -} - -static uint32_t bcmpkt_txpmd_cpu_tx_destination_type_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return 0; - } - val = WORD_FIELD_GET(data[2], 11, 4); - return val; -} - -static void bcmpkt_txpmd_cpu_tx_dp_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return; - } - WORD_FIELD_SET(data[2], 15, 2, val); -} - -static uint32_t bcmpkt_txpmd_cpu_tx_dp_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return 0; - } - val = WORD_FIELD_GET(data[2], 15, 2); - return val; -} - -static void bcmpkt_txpmd_cpu_tx_input_pri_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return; - } - WORD_FIELD_SET(data[2], 17, 4, val); -} - -static uint32_t bcmpkt_txpmd_cpu_tx_input_pri_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return 0; - } - val = WORD_FIELD_GET(data[2], 17, 4); - return val; -} - -static void bcmpkt_txpmd_cpu_tx_int_cn_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return; - } - WORD_FIELD_SET(data[2], 21, 2, val); -} - -static uint32_t bcmpkt_txpmd_cpu_tx_int_cn_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return 0; - } - val = WORD_FIELD_GET(data[2], 21, 2); - return val; -} - -static void bcmpkt_txpmd_cpu_tx_int_pri_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return; - } - WORD_FIELD_SET(data[2], 23, 4, val); -} - -static uint32_t bcmpkt_txpmd_cpu_tx_int_pri_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return 0; - } - val = WORD_FIELD_GET(data[2], 23, 4); - return val; -} - -static void bcmpkt_txpmd_cpu_tx_mcast_lb_index_vld_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return; - } - WORD_FIELD_SET(data[2], 27, 1, val); -} - -static uint32_t bcmpkt_txpmd_cpu_tx_mcast_lb_index_vld_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return 0; - } - val = WORD_FIELD_GET(data[2], 27, 1); - return val; -} - -static void bcmpkt_txpmd_cpu_tx_pkt_profile_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return; - } - WORD_FIELD_SET(data[2], 28, 3, val); -} - -static uint32_t bcmpkt_txpmd_cpu_tx_pkt_profile_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return 0; - } - val = WORD_FIELD_GET(data[2], 28, 3); - return val; -} - -static void bcmpkt_txpmd_cpu_tx_qos_fields_vld_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return; - } - WORD_FIELD_SET(data[2], 31, 1, val); -} - -static uint32_t bcmpkt_txpmd_cpu_tx_qos_fields_vld_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return 0; - } - val = WORD_FIELD_GET(data[2], 31, 1); - return val; -} - -static void bcmpkt_txpmd_cpu_tx_routed_pkt_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return; - } - WORD_FIELD_SET(data[1], 0, 1, val); -} - -static uint32_t bcmpkt_txpmd_cpu_tx_routed_pkt_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return 0; - } - val = WORD_FIELD_GET(data[1], 0, 1); - return val; -} - -static void bcmpkt_txpmd_cpu_tx_vrf_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return; - } - WORD_FIELD_SET(data[1], 14, 13, val); -} - -static uint32_t bcmpkt_txpmd_cpu_tx_vrf_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return 0; - } - val = WORD_FIELD_GET(data[1], 14, 13); - return val; -} - -static void bcmpkt_txpmd_cpu_tx_vrf_valid_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return; - } - WORD_FIELD_SET(data[1], 27, 1, val); -} - -static uint32_t bcmpkt_txpmd_cpu_tx_vrf_valid_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return 0; - } - val = WORD_FIELD_GET(data[1], 27, 1); - return val; -} - -static void bcmpkt_txpmd_cpu_tx_cookie_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return; - } - WORD_FIELD_SET(data[3], 17, 9, val); -} - -static uint32_t bcmpkt_txpmd_cpu_tx_cookie_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return 0; - } - val = WORD_FIELD_GET(data[3], 17, 9); - return val; -} - -static void bcmpkt_txpmd_cpu_tx_cookie_valid_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return; - } - WORD_FIELD_SET(data[3], 26, 1, val); -} - -static uint32_t bcmpkt_txpmd_cpu_tx_cookie_valid_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return 0; - } - val = WORD_FIELD_GET(data[3], 26, 1); - return val; -} - -static void bcmpkt_txpmd_cookie_7_0_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return; - } - WORD_FIELD_SET(data[3], 0, 8, val); -} - -static uint32_t bcmpkt_txpmd_cookie_7_0_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return 0; - } - val = WORD_FIELD_GET(data[3], 0, 8); - return val; -} - -static void bcmpkt_txpmd_cookie_8_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return; - } - WORD_FIELD_SET(data[3], 8, 1, val); -} - -static uint32_t bcmpkt_txpmd_cookie_8_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_FROM_CPU) { - return 0; - } - val = WORD_FIELD_GET(data[3], 8, 1); - return val; -} - -static void bcmpkt_txpmd_cpu_tx_svp_set(uint32_t *data, uint32_t val) -{ - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return; - } - WORD_FIELD_SET(data[1], 1, 13, val); -} - -static uint32_t bcmpkt_txpmd_cpu_tx_svp_get(uint32_t *data) -{ - uint32_t val; - if (bcmpkt_txpmd_header_type_get(data) != BCMPKT_TXPMD_HEADER_T_CPU_TX) { - return 0; - } - val = WORD_FIELD_GET(data[1], 1, 13); - return val; -} - -static uint32_t bcmpkt_txpmd_i_size_get(uint32_t *data, uint32_t **addr) -{ - return 4; -} - - -const bcmpkt_txpmd_fget_t bcm78914_b1_txpmd_fget = { - { - bcmpkt_txpmd_start_get, - bcmpkt_txpmd_header_type_get, - NULL, - NULL, - NULL, - NULL, - NULL, - bcmpkt_txpmd_cell_error_get, - NULL, - bcmpkt_txpmd_src_modid_get, - bcmpkt_txpmd_cos_get, - bcmpkt_txpmd_input_pri_get, - bcmpkt_txpmd_unicast_get, - bcmpkt_txpmd_rqe_q_num_get, - NULL, - bcmpkt_txpmd_ieee1588_one_step_enable_get, - bcmpkt_txpmd_ieee1588_regen_udp_checksum_get, - bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get, - bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get, - bcmpkt_txpmd_tx_ts_get, - bcmpkt_txpmd_spid_override_get, - bcmpkt_txpmd_spid_get, - bcmpkt_txpmd_spap_get, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - bcmpkt_txpmd_cng_get, - bcmpkt_txpmd_destination_get, - bcmpkt_txpmd_destination_type_get, - bcmpkt_txpmd_wred_mark_eligible_get, - bcmpkt_txpmd_wred_response_get, - bcmpkt_txpmd_cpu_tx_mcast_lb_index_get, - bcmpkt_txpmd_cpu_tx_ecmp_member_id_get, - bcmpkt_txpmd_cpu_tx_destination_get, - bcmpkt_txpmd_cpu_tx_destination_type_get, - bcmpkt_txpmd_cpu_tx_dp_get, - bcmpkt_txpmd_cpu_tx_input_pri_get, - bcmpkt_txpmd_cpu_tx_int_cn_get, - bcmpkt_txpmd_cpu_tx_int_pri_get, - bcmpkt_txpmd_cpu_tx_mcast_lb_index_vld_get, - bcmpkt_txpmd_cpu_tx_pkt_profile_get, - bcmpkt_txpmd_cpu_tx_qos_fields_vld_get, - bcmpkt_txpmd_cpu_tx_routed_pkt_get, - NULL, - NULL, - bcmpkt_txpmd_cpu_tx_vrf_get, - bcmpkt_txpmd_cpu_tx_vrf_valid_get, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - bcmpkt_txpmd_cpu_tx_cookie_get, - bcmpkt_txpmd_cpu_tx_cookie_valid_get, - bcmpkt_txpmd_cookie_7_0_get, - bcmpkt_txpmd_cookie_8_get, - NULL, - NULL, - NULL, - NULL, - bcmpkt_txpmd_cpu_tx_svp_get, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL - } -}; - - -const bcmpkt_txpmd_fset_t bcm78914_b1_txpmd_fset = { - { - bcmpkt_txpmd_start_set, - bcmpkt_txpmd_header_type_set, - NULL, - NULL, - NULL, - NULL, - NULL, - bcmpkt_txpmd_cell_error_set, - NULL, - bcmpkt_txpmd_src_modid_set, - bcmpkt_txpmd_cos_set, - bcmpkt_txpmd_input_pri_set, - bcmpkt_txpmd_unicast_set, - bcmpkt_txpmd_rqe_q_num_set, - NULL, - bcmpkt_txpmd_ieee1588_one_step_enable_set, - bcmpkt_txpmd_ieee1588_regen_udp_checksum_set, - bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set, - bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set, - bcmpkt_txpmd_tx_ts_set, - bcmpkt_txpmd_spid_override_set, - bcmpkt_txpmd_spid_set, - bcmpkt_txpmd_spap_set, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - bcmpkt_txpmd_cng_set, - bcmpkt_txpmd_destination_set, - bcmpkt_txpmd_destination_type_set, - bcmpkt_txpmd_wred_mark_eligible_set, - bcmpkt_txpmd_wred_response_set, - bcmpkt_txpmd_cpu_tx_mcast_lb_index_set, - bcmpkt_txpmd_cpu_tx_ecmp_member_id_set, - bcmpkt_txpmd_cpu_tx_destination_set, - bcmpkt_txpmd_cpu_tx_destination_type_set, - bcmpkt_txpmd_cpu_tx_dp_set, - bcmpkt_txpmd_cpu_tx_input_pri_set, - bcmpkt_txpmd_cpu_tx_int_cn_set, - bcmpkt_txpmd_cpu_tx_int_pri_set, - bcmpkt_txpmd_cpu_tx_mcast_lb_index_vld_set, - bcmpkt_txpmd_cpu_tx_pkt_profile_set, - bcmpkt_txpmd_cpu_tx_qos_fields_vld_set, - bcmpkt_txpmd_cpu_tx_routed_pkt_set, - NULL, - NULL, - bcmpkt_txpmd_cpu_tx_vrf_set, - bcmpkt_txpmd_cpu_tx_vrf_valid_set, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - bcmpkt_txpmd_cpu_tx_cookie_set, - bcmpkt_txpmd_cpu_tx_cookie_valid_set, - bcmpkt_txpmd_cookie_7_0_set, - bcmpkt_txpmd_cookie_8_set, - NULL, - NULL, - NULL, - NULL, - bcmpkt_txpmd_cpu_tx_svp_set, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL - } -}; - - -const bcmpkt_txpmd_figet_t bcm78914_b1_txpmd_figet = { - { - bcmpkt_txpmd_i_size_get - } -}; - -static shr_enum_map_t bcm78914_b1_txpmd_view_types[] = { - {"sobmh_from_cpu", 1}, - {"cpu_tx", 2}, - {NULL, -1}, -}; - -/* -2: unsupported, -1: global, others: view's value */ -static int bcm78914_b1_txpmd_view_infos[BCMPKT_TXPMD_FID_COUNT] = { - -1, -1, -2, -2, -2, -2, -2, 1, -2, 1, 1, 1, 1, 1, -2, 1, - 1, 1, 1, 1, 1, 1, 1, -2, -2, -2, -2, -2, -2, -2, 1, 1, - 1, 1, 1, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, -2, - -2, 2, 2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, - -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, 2, 2, 1, 1, -2, -2, - -2, -2, 2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, - -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, - -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, - -2, -2, -}; - - -void bcm78914_b1_txpmd_view_info_get(bcmpkt_pmd_view_info_t *info) -{ - info->view_infos = bcm78914_b1_txpmd_view_infos; - info->view_types = bcm78914_b1_txpmd_view_types; - info->view_type_get = bcmpkt_txpmd_header_type_get; -} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78914_b1/bcm78914_b1_pmd_field.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78914_b1/bcm78914_b1_pmd_field.c deleted file mode 100644 index 206dedced25..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78914_b1/bcm78914_b1_pmd_field.c +++ /dev/null @@ -1,3359 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated from the registers file. - * Edits to this file will be lost when it is regenerated. - * Tool: INTERNAL/regs/xgs/generate-pmd.pl - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - * This file provides PMD field info for BCM78914_B1. - * - ******************************************************************************/ - -#include -#include - -static bcmpkt_field_info_t -field_fmt_0_0_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 0; - info.maxbit = 0; - return info; -} - -static void -field_fmt_0_0_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xfffffffe) | (*val & 0x1); -} - -static void -field_fmt_0_0_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = pmd[13] & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_0_16_3_3_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 0; - info.maxbit = 16; - return info; -} - -static void -field_fmt_0_16_3_3_set(uint32_t *pmd, uint32_t *val) -{ - pmd[3] = (pmd[3] & 0xfffe0000) | (*val & 0x1ffff); -} - -static void -field_fmt_0_16_3_3_get(uint32_t *pmd, uint32_t *val) -{ - *val = pmd[3] & 0x1ffff; -} - -static bcmpkt_field_info_t -field_fmt_0_63_13_12_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 0; - info.maxbit = 63; - return info; -} - -static void -field_fmt_0_63_13_12_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = val[0]; - pmd[12] = val[1]; -} - -static void -field_fmt_0_63_13_12_get(uint32_t *pmd, uint32_t *val) -{ - val[0] = pmd[13]; - val[1] = pmd[12]; -} - -static bcmpkt_field_info_t -field_fmt_0_7_3_3_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 0; - info.maxbit = 7; - return info; -} - -static void -field_fmt_0_7_3_3_set(uint32_t *pmd, uint32_t *val) -{ - pmd[3] = (pmd[3] & 0xffffff00) | (*val & 0xff); -} - -static void -field_fmt_0_7_3_3_get(uint32_t *pmd, uint32_t *val) -{ - *val = pmd[3] & 0xff; -} - -static bcmpkt_field_info_t -field_fmt_10_10_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 10; - info.maxbit = 10; - return info; -} - -static void -field_fmt_10_10_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xfffffbff) | ((*val & 0x1) << 10); -} - -static void -field_fmt_10_10_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 10) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_10_11_3_3_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 10; - info.maxbit = 11; - return info; -} - -static void -field_fmt_10_11_3_3_set(uint32_t *pmd, uint32_t *val) -{ - pmd[3] = (pmd[3] & 0xfffff3ff) | ((*val & 0x3) << 10); -} - -static void -field_fmt_10_11_3_3_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[3] >> 10) & 0x3; -} - -static bcmpkt_field_info_t -field_fmt_115_127_10_10_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 115; - info.maxbit = 127; - return info; -} - -static void -field_fmt_115_127_10_10_set(uint32_t *pmd, uint32_t *val) -{ - pmd[10] = (pmd[10] & 0x7ffff) | (*val << 19); -} - -static void -field_fmt_115_127_10_10_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[10] >> 19) & 0x1fff; -} - -static bcmpkt_field_info_t -field_fmt_116_119_0_0_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 116; - info.maxbit = 119; - return info; -} - -static void -field_fmt_116_119_0_0_set(uint32_t *pmd, uint32_t *val) -{ - pmd[0] = (pmd[0] & 0xff0fffff) | ((*val & 0xf) << 20); -} - -static void -field_fmt_116_119_0_0_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[0] >> 20) & 0xf; -} - -static bcmpkt_field_info_t -field_fmt_11_11_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 11; - info.maxbit = 11; - return info; -} - -static void -field_fmt_11_11_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xfffff7ff) | ((*val & 0x1) << 11); -} - -static void -field_fmt_11_11_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 11) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_120_125_0_0_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 120; - info.maxbit = 125; - return info; -} - -static void -field_fmt_120_125_0_0_set(uint32_t *pmd, uint32_t *val) -{ - pmd[0] = (pmd[0] & 0xc0ffffff) | ((*val & 0x3f) << 24); -} - -static void -field_fmt_120_125_0_0_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[0] >> 24) & 0x3f; -} - -static bcmpkt_field_info_t -field_fmt_126_127_0_0_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 126; - info.maxbit = 127; - return info; -} - -static void -field_fmt_126_127_0_0_set(uint32_t *pmd, uint32_t *val) -{ - pmd[0] = (pmd[0] & 0x3fffffff) | (*val << 30); -} - -static void -field_fmt_126_127_0_0_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[0] >> 30) & 0x3; -} - -static bcmpkt_field_info_t -field_fmt_128_128_9_9_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 128; - info.maxbit = 128; - return info; -} - -static void -field_fmt_128_128_9_9_set(uint32_t *pmd, uint32_t *val) -{ - pmd[9] = (pmd[9] & 0xfffffffe) | (*val & 0x1); -} - -static void -field_fmt_128_128_9_9_get(uint32_t *pmd, uint32_t *val) -{ - *val = pmd[9] & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_129_130_9_9_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 129; - info.maxbit = 130; - return info; -} - -static void -field_fmt_129_130_9_9_set(uint32_t *pmd, uint32_t *val) -{ - pmd[9] = (pmd[9] & 0xfffffff9) | ((*val & 0x3) << 1); -} - -static void -field_fmt_129_130_9_9_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[9] >> 1) & 0x3; -} - -static bcmpkt_field_info_t -field_fmt_12_12_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 12; - info.maxbit = 12; - return info; -} - -static void -field_fmt_12_12_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xffffefff) | ((*val & 0x1) << 12); -} - -static void -field_fmt_12_12_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 12) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_12_17_3_3_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 12; - info.maxbit = 17; - return info; -} - -static void -field_fmt_12_17_3_3_set(uint32_t *pmd, uint32_t *val) -{ - pmd[3] = (pmd[3] & 0xfffc0fff) | ((*val & 0x3f) << 12); -} - -static void -field_fmt_12_17_3_3_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[3] >> 12) & 0x3f; -} - -static bcmpkt_field_info_t -field_fmt_131_144_9_9_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 131; - info.maxbit = 144; - return info; -} - -static void -field_fmt_131_144_9_9_set(uint32_t *pmd, uint32_t *val) -{ - pmd[9] = (pmd[9] & 0xfffe0007) | ((*val & 0x3fff) << 3); -} - -static void -field_fmt_131_144_9_9_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[9] >> 3) & 0x3fff; -} - -static bcmpkt_field_info_t -field_fmt_13_13_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 13; - info.maxbit = 13; - return info; -} - -static void -field_fmt_13_13_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xffffdfff) | ((*val & 0x1) << 13); -} - -static void -field_fmt_13_13_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 13) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_145_159_9_9_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 145; - info.maxbit = 159; - return info; -} - -static void -field_fmt_145_159_9_9_set(uint32_t *pmd, uint32_t *val) -{ - pmd[9] = (pmd[9] & 0x1ffff) | (*val << 17); -} - -static void -field_fmt_145_159_9_9_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[9] >> 17) & 0x7fff; -} - -static bcmpkt_field_info_t -field_fmt_14_14_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 14; - info.maxbit = 14; - return info; -} - -static void -field_fmt_14_14_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xffffbfff) | ((*val & 0x1) << 14); -} - -static void -field_fmt_14_14_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 14) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_15_15_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 15; - info.maxbit = 15; - return info; -} - -static void -field_fmt_15_15_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xffff7fff) | ((*val & 0x1) << 15); -} - -static void -field_fmt_15_15_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 15) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_160_160_8_8_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 160; - info.maxbit = 160; - return info; -} - -static void -field_fmt_160_160_8_8_set(uint32_t *pmd, uint32_t *val) -{ - pmd[8] = (pmd[8] & 0xfffffffe) | (*val & 0x1); -} - -static void -field_fmt_160_160_8_8_get(uint32_t *pmd, uint32_t *val) -{ - *val = pmd[8] & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_161_161_8_8_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 161; - info.maxbit = 161; - return info; -} - -static void -field_fmt_161_161_8_8_set(uint32_t *pmd, uint32_t *val) -{ - pmd[8] = (pmd[8] & 0xfffffffd) | ((*val & 0x1) << 1); -} - -static void -field_fmt_161_161_8_8_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[8] >> 1) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_162_162_8_8_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 162; - info.maxbit = 162; - return info; -} - -static void -field_fmt_162_162_8_8_set(uint32_t *pmd, uint32_t *val) -{ - pmd[8] = (pmd[8] & 0xfffffffb) | ((*val & 0x1) << 2); -} - -static void -field_fmt_162_162_8_8_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[8] >> 2) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_163_163_8_8_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 163; - info.maxbit = 163; - return info; -} - -static void -field_fmt_163_163_8_8_set(uint32_t *pmd, uint32_t *val) -{ - pmd[8] = (pmd[8] & 0xfffffff7) | ((*val & 0x1) << 3); -} - -static void -field_fmt_163_163_8_8_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[8] >> 3) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_164_164_8_8_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 164; - info.maxbit = 164; - return info; -} - -static void -field_fmt_164_164_8_8_set(uint32_t *pmd, uint32_t *val) -{ - pmd[8] = (pmd[8] & 0xffffffef) | ((*val & 0x1) << 4); -} - -static void -field_fmt_164_164_8_8_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[8] >> 4) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_165_165_8_8_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 165; - info.maxbit = 165; - return info; -} - -static void -field_fmt_165_165_8_8_set(uint32_t *pmd, uint32_t *val) -{ - pmd[8] = (pmd[8] & 0xffffffdf) | ((*val & 0x1) << 5); -} - -static void -field_fmt_165_165_8_8_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[8] >> 5) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_166_168_8_8_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 166; - info.maxbit = 168; - return info; -} - -static void -field_fmt_166_168_8_8_set(uint32_t *pmd, uint32_t *val) -{ - pmd[8] = (pmd[8] & 0xfffffe3f) | ((*val & 0x7) << 6); -} - -static void -field_fmt_166_168_8_8_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[8] >> 6) & 0x7; -} - -static bcmpkt_field_info_t -field_fmt_166_171_8_8_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 166; - info.maxbit = 171; - return info; -} - -static void -field_fmt_166_171_8_8_set(uint32_t *pmd, uint32_t *val) -{ - pmd[8] = (pmd[8] & 0xfffff03f) | ((*val & 0x3f) << 6); -} - -static void -field_fmt_166_171_8_8_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[8] >> 6) & 0x3f; -} - -static bcmpkt_field_info_t -field_fmt_16_16_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 16; - info.maxbit = 16; - return info; -} - -static void -field_fmt_16_16_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xfffeffff) | ((*val & 0x1) << 16); -} - -static void -field_fmt_16_16_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 16) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_16_18_3_3_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 16; - info.maxbit = 18; - return info; -} - -static void -field_fmt_16_18_3_3_set(uint32_t *pmd, uint32_t *val) -{ - pmd[3] = (pmd[3] & 0xfff8ffff) | ((*val & 0x7) << 16); -} - -static void -field_fmt_16_18_3_3_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[3] >> 16) & 0x7; -} - -static bcmpkt_field_info_t -field_fmt_172_173_8_8_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 172; - info.maxbit = 173; - return info; -} - -static void -field_fmt_172_173_8_8_set(uint32_t *pmd, uint32_t *val) -{ - pmd[8] = (pmd[8] & 0xffffcfff) | ((*val & 0x3) << 12); -} - -static void -field_fmt_172_173_8_8_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[8] >> 12) & 0x3; -} - -static bcmpkt_field_info_t -field_fmt_174_174_8_8_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 174; - info.maxbit = 174; - return info; -} - -static void -field_fmt_174_174_8_8_set(uint32_t *pmd, uint32_t *val) -{ - pmd[8] = (pmd[8] & 0xffffbfff) | ((*val & 0x1) << 14); -} - -static void -field_fmt_174_174_8_8_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[8] >> 14) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_175_175_8_8_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 175; - info.maxbit = 175; - return info; -} - -static void -field_fmt_175_175_8_8_set(uint32_t *pmd, uint32_t *val) -{ - pmd[8] = (pmd[8] & 0xffff7fff) | ((*val & 0x1) << 15); -} - -static void -field_fmt_175_175_8_8_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[8] >> 15) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_176_184_8_8_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 176; - info.maxbit = 184; - return info; -} - -static void -field_fmt_176_184_8_8_set(uint32_t *pmd, uint32_t *val) -{ - pmd[8] = (pmd[8] & 0xfe00ffff) | ((*val & 0x1ff) << 16); -} - -static void -field_fmt_176_184_8_8_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[8] >> 16) & 0x1ff; -} - -static bcmpkt_field_info_t -field_fmt_176_187_8_8_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 176; - info.maxbit = 187; - return info; -} - -static void -field_fmt_176_187_8_8_set(uint32_t *pmd, uint32_t *val) -{ - pmd[8] = (pmd[8] & 0xf000ffff) | ((*val & 0xfff) << 16); -} - -static void -field_fmt_176_187_8_8_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[8] >> 16) & 0xfff; -} - -static bcmpkt_field_info_t -field_fmt_17_17_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 17; - info.maxbit = 17; - return info; -} - -static void -field_fmt_17_17_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xfffdffff) | ((*val & 0x1) << 17); -} - -static void -field_fmt_17_17_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 17) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_17_25_3_3_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 17; - info.maxbit = 25; - return info; -} - -static void -field_fmt_17_25_3_3_set(uint32_t *pmd, uint32_t *val) -{ - pmd[3] = (pmd[3] & 0xfc01ffff) | ((*val & 0x1ff) << 17); -} - -static void -field_fmt_17_25_3_3_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[3] >> 17) & 0x1ff; -} - -static bcmpkt_field_info_t -field_fmt_185_185_8_8_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 185; - info.maxbit = 185; - return info; -} - -static void -field_fmt_185_185_8_8_set(uint32_t *pmd, uint32_t *val) -{ - pmd[8] = (pmd[8] & 0xfdffffff) | ((*val & 0x1) << 25); -} - -static void -field_fmt_185_185_8_8_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[8] >> 25) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_188_190_8_8_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 188; - info.maxbit = 190; - return info; -} - -static void -field_fmt_188_190_8_8_set(uint32_t *pmd, uint32_t *val) -{ - pmd[8] = (pmd[8] & 0x8fffffff) | ((*val & 0x7) << 28); -} - -static void -field_fmt_188_190_8_8_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[8] >> 28) & 0x7; -} - -static bcmpkt_field_info_t -field_fmt_18_18_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 18; - info.maxbit = 18; - return info; -} - -static void -field_fmt_18_18_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xfffbffff) | ((*val & 0x1) << 18); -} - -static void -field_fmt_18_18_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 18) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_18_33_3_2_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 18; - info.maxbit = 33; - return info; -} - -static void -field_fmt_18_33_3_2_set(uint32_t *pmd, uint32_t *val) -{ - pmd[3] = (pmd[3] & 0x3ffff) | (*val << 18); - pmd[2] = (pmd[2] & 0xfffffffc) | ((*val >> 14) & 0x3); -} - -static void -field_fmt_18_33_3_2_get(uint32_t *pmd, uint32_t *val) -{ - *val = ((pmd[3] >> 18) | (pmd[2] << 14)) & 0xffff; -} - -static bcmpkt_field_info_t -field_fmt_191_191_8_8_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 191; - info.maxbit = 191; - return info; -} - -static void -field_fmt_191_191_8_8_set(uint32_t *pmd, uint32_t *val) -{ - pmd[8] = (pmd[8] & 0x7fffffff) | (*val << 31); -} - -static void -field_fmt_191_191_8_8_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[8] >> 31) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_192_194_7_7_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 192; - info.maxbit = 194; - return info; -} - -static void -field_fmt_192_194_7_7_set(uint32_t *pmd, uint32_t *val) -{ - pmd[7] = (pmd[7] & 0xfffffff8) | (*val & 0x7); -} - -static void -field_fmt_192_194_7_7_get(uint32_t *pmd, uint32_t *val) -{ - *val = pmd[7] & 0x7; -} - -static bcmpkt_field_info_t -field_fmt_195_206_7_7_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 195; - info.maxbit = 206; - return info; -} - -static void -field_fmt_195_206_7_7_set(uint32_t *pmd, uint32_t *val) -{ - pmd[7] = (pmd[7] & 0xffff8007) | ((*val & 0xfff) << 3); -} - -static void -field_fmt_195_206_7_7_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[7] >> 3) & 0xfff; -} - -static bcmpkt_field_info_t -field_fmt_19_19_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 19; - info.maxbit = 19; - return info; -} - -static void -field_fmt_19_19_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xfff7ffff) | ((*val & 0x1) << 19); -} - -static void -field_fmt_19_19_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 19) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_19_19_3_3_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 19; - info.maxbit = 19; - return info; -} - -static void -field_fmt_19_19_3_3_set(uint32_t *pmd, uint32_t *val) -{ - pmd[3] = (pmd[3] & 0xfff7ffff) | ((*val & 0x1) << 19); -} - -static void -field_fmt_19_19_3_3_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[3] >> 19) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_1_1_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 1; - info.maxbit = 1; - return info; -} - -static void -field_fmt_1_1_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xfffffffd) | ((*val & 0x1) << 1); -} - -static void -field_fmt_1_1_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 1) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_207_221_7_7_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 207; - info.maxbit = 221; - return info; -} - -static void -field_fmt_207_221_7_7_set(uint32_t *pmd, uint32_t *val) -{ - pmd[7] = (pmd[7] & 0xc0007fff) | ((*val & 0x7fff) << 15); -} - -static void -field_fmt_207_221_7_7_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[7] >> 15) & 0x7fff; -} - -static bcmpkt_field_info_t -field_fmt_20_20_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 20; - info.maxbit = 20; - return info; -} - -static void -field_fmt_20_20_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xffefffff) | ((*val & 0x1) << 20); -} - -static void -field_fmt_20_20_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 20) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_21_21_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 21; - info.maxbit = 21; - return info; -} - -static void -field_fmt_21_21_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xffdfffff) | ((*val & 0x1) << 21); -} - -static void -field_fmt_21_21_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 21) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_21_21_3_3_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 21; - info.maxbit = 21; - return info; -} - -static void -field_fmt_21_21_3_3_set(uint32_t *pmd, uint32_t *val) -{ - pmd[3] = (pmd[3] & 0xffdfffff) | ((*val & 0x1) << 21); -} - -static void -field_fmt_21_21_3_3_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[3] >> 21) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_222_222_7_7_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 222; - info.maxbit = 222; - return info; -} - -static void -field_fmt_222_222_7_7_set(uint32_t *pmd, uint32_t *val) -{ - pmd[7] = (pmd[7] & 0xbfffffff) | ((*val & 0x1) << 30); -} - -static void -field_fmt_222_222_7_7_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[7] >> 30) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_223_242_7_6_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 223; - info.maxbit = 242; - return info; -} - -static void -field_fmt_223_242_7_6_set(uint32_t *pmd, uint32_t *val) -{ - pmd[7] = (pmd[7] & 0x7fffffff) | (*val << 31); - pmd[6] = (pmd[6] & 0xfff80000) | ((*val >> 1) & 0x7ffff); -} - -static void -field_fmt_223_242_7_6_get(uint32_t *pmd, uint32_t *val) -{ - *val = ((pmd[7] >> 31) | (pmd[6] << 1)) & 0xfffff; -} - -static bcmpkt_field_info_t -field_fmt_22_22_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 22; - info.maxbit = 22; - return info; -} - -static void -field_fmt_22_22_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xffbfffff) | ((*val & 0x1) << 22); -} - -static void -field_fmt_22_22_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 22) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_22_22_3_3_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 22; - info.maxbit = 22; - return info; -} - -static void -field_fmt_22_22_3_3_set(uint32_t *pmd, uint32_t *val) -{ - pmd[3] = (pmd[3] & 0xffbfffff) | ((*val & 0x1) << 22); -} - -static void -field_fmt_22_22_3_3_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[3] >> 22) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_23_23_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 23; - info.maxbit = 23; - return info; -} - -static void -field_fmt_23_23_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xff7fffff) | ((*val & 0x1) << 23); -} - -static void -field_fmt_23_23_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 23) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_243_243_6_6_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 243; - info.maxbit = 243; - return info; -} - -static void -field_fmt_243_243_6_6_set(uint32_t *pmd, uint32_t *val) -{ - pmd[6] = (pmd[6] & 0xfff7ffff) | ((*val & 0x1) << 19); -} - -static void -field_fmt_243_243_6_6_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[6] >> 19) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_244_253_6_6_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 244; - info.maxbit = 253; - return info; -} - -static void -field_fmt_244_253_6_6_set(uint32_t *pmd, uint32_t *val) -{ - pmd[6] = (pmd[6] & 0xc00fffff) | ((*val & 0x3ff) << 20); -} - -static void -field_fmt_244_253_6_6_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[6] >> 20) & 0x3ff; -} - -static bcmpkt_field_info_t -field_fmt_24_24_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 24; - info.maxbit = 24; - return info; -} - -static void -field_fmt_24_24_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xfeffffff) | ((*val & 0x1) << 24); -} - -static void -field_fmt_24_24_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 24) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_24_36_3_2_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 24; - info.maxbit = 36; - return info; -} - -static void -field_fmt_24_36_3_2_set(uint32_t *pmd, uint32_t *val) -{ - pmd[3] = (pmd[3] & 0xffffff) | (*val << 24); - pmd[2] = (pmd[2] & 0xffffffe0) | ((*val >> 8) & 0x1f); -} - -static void -field_fmt_24_36_3_2_get(uint32_t *pmd, uint32_t *val) -{ - *val = ((pmd[3] >> 24) | (pmd[2] << 8)) & 0x1fff; -} - -static bcmpkt_field_info_t -field_fmt_254_254_6_6_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 254; - info.maxbit = 254; - return info; -} - -static void -field_fmt_254_254_6_6_set(uint32_t *pmd, uint32_t *val) -{ - pmd[6] = (pmd[6] & 0xbfffffff) | ((*val & 0x1) << 30); -} - -static void -field_fmt_254_254_6_6_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[6] >> 30) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_255_286_6_5_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 255; - info.maxbit = 286; - return info; -} - -static void -field_fmt_255_286_6_5_set(uint32_t *pmd, uint32_t *val) -{ - pmd[6] = (pmd[6] & 0x7fffffff) | (*val << 31); - pmd[5] = (pmd[5] & 0x80000000) | ((*val >> 1) & 0x7fffffff); -} - -static void -field_fmt_255_286_6_5_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[6] >> 31) | (pmd[5] << 1); -} - -static bcmpkt_field_info_t -field_fmt_25_25_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 25; - info.maxbit = 25; - return info; -} - -static void -field_fmt_25_25_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xfdffffff) | ((*val & 0x1) << 25); -} - -static void -field_fmt_25_25_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 25) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_26_26_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 26; - info.maxbit = 26; - return info; -} - -static void -field_fmt_26_26_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xfbffffff) | ((*val & 0x1) << 26); -} - -static void -field_fmt_26_26_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 26) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_26_26_3_3_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 26; - info.maxbit = 26; - return info; -} - -static void -field_fmt_26_26_3_3_set(uint32_t *pmd, uint32_t *val) -{ - pmd[3] = (pmd[3] & 0xfbffffff) | ((*val & 0x1) << 26); -} - -static void -field_fmt_26_26_3_3_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[3] >> 26) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_27_27_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 27; - info.maxbit = 27; - return info; -} - -static void -field_fmt_27_27_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xf7ffffff) | ((*val & 0x1) << 27); -} - -static void -field_fmt_27_27_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 27) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_27_42_3_2_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 27; - info.maxbit = 42; - return info; -} - -static void -field_fmt_27_42_3_2_set(uint32_t *pmd, uint32_t *val) -{ - pmd[3] = (pmd[3] & 0x7ffffff) | (*val << 27); - pmd[2] = (pmd[2] & 0xfffff800) | ((*val >> 5) & 0x7ff); -} - -static void -field_fmt_27_42_3_2_get(uint32_t *pmd, uint32_t *val) -{ - *val = ((pmd[3] >> 27) | (pmd[2] << 5)) & 0xffff; -} - -static bcmpkt_field_info_t -field_fmt_287_302_5_4_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 287; - info.maxbit = 302; - return info; -} - -static void -field_fmt_287_302_5_4_set(uint32_t *pmd, uint32_t *val) -{ - pmd[5] = (pmd[5] & 0x7fffffff) | (*val << 31); - pmd[4] = (pmd[4] & 0xffff8000) | ((*val >> 1) & 0x7fff); -} - -static void -field_fmt_287_302_5_4_get(uint32_t *pmd, uint32_t *val) -{ - *val = ((pmd[5] >> 31) | (pmd[4] << 1)) & 0xffff; -} - -static bcmpkt_field_info_t -field_fmt_28_28_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 28; - info.maxbit = 28; - return info; -} - -static void -field_fmt_28_28_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xefffffff) | ((*val & 0x1) << 28); -} - -static void -field_fmt_28_28_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 28) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_29_29_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 29; - info.maxbit = 29; - return info; -} - -static void -field_fmt_29_29_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xdfffffff) | ((*val & 0x1) << 29); -} - -static void -field_fmt_29_29_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 29) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_2_2_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 2; - info.maxbit = 2; - return info; -} - -static void -field_fmt_2_2_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xfffffffb) | ((*val & 0x1) << 2); -} - -static void -field_fmt_2_2_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 2) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_303_303_4_4_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 303; - info.maxbit = 303; - return info; -} - -static void -field_fmt_303_303_4_4_set(uint32_t *pmd, uint32_t *val) -{ - pmd[4] = (pmd[4] & 0xffff7fff) | ((*val & 0x1) << 15); -} - -static void -field_fmt_303_303_4_4_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[4] >> 15) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_304_307_4_4_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 304; - info.maxbit = 307; - return info; -} - -static void -field_fmt_304_307_4_4_set(uint32_t *pmd, uint32_t *val) -{ - pmd[4] = (pmd[4] & 0xfff0ffff) | ((*val & 0xf) << 16); -} - -static void -field_fmt_304_307_4_4_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[4] >> 16) & 0xf; -} - -static bcmpkt_field_info_t -field_fmt_308_308_4_4_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 308; - info.maxbit = 308; - return info; -} - -static void -field_fmt_308_308_4_4_set(uint32_t *pmd, uint32_t *val) -{ - pmd[4] = (pmd[4] & 0xffefffff) | ((*val & 0x1) << 20); -} - -static void -field_fmt_308_308_4_4_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[4] >> 20) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_309_309_4_4_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 309; - info.maxbit = 309; - return info; -} - -static void -field_fmt_309_309_4_4_set(uint32_t *pmd, uint32_t *val) -{ - pmd[4] = (pmd[4] & 0xffdfffff) | ((*val & 0x1) << 21); -} - -static void -field_fmt_309_309_4_4_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[4] >> 21) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_30_30_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 30; - info.maxbit = 30; - return info; -} - -static void -field_fmt_30_30_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xbfffffff) | ((*val & 0x1) << 30); -} - -static void -field_fmt_30_30_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 30) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_310_311_4_4_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 310; - info.maxbit = 311; - return info; -} - -static void -field_fmt_310_311_4_4_set(uint32_t *pmd, uint32_t *val) -{ - pmd[4] = (pmd[4] & 0xff3fffff) | ((*val & 0x3) << 22); -} - -static void -field_fmt_310_311_4_4_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[4] >> 22) & 0x3; -} - -static bcmpkt_field_info_t -field_fmt_312_318_4_4_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 312; - info.maxbit = 318; - return info; -} - -static void -field_fmt_312_318_4_4_set(uint32_t *pmd, uint32_t *val) -{ - pmd[4] = (pmd[4] & 0x80ffffff) | ((*val & 0x7f) << 24); -} - -static void -field_fmt_312_318_4_4_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[4] >> 24) & 0x7f; -} - -static bcmpkt_field_info_t -field_fmt_31_31_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 31; - info.maxbit = 31; - return info; -} - -static void -field_fmt_31_31_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0x7fffffff) | (*val << 31); -} - -static void -field_fmt_31_31_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 31) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_320_447_3_0_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 320; - info.maxbit = 447; - return info; -} - -static void -field_fmt_320_447_3_0_set(uint32_t *pmd, uint32_t *val) -{ - pmd[3] = val[0]; - pmd[2] = val[1]; - pmd[1] = val[2]; - pmd[0] = val[3]; -} - -static void -field_fmt_320_447_3_0_get(uint32_t *pmd, uint32_t *val) -{ - val[0] = pmd[3]; - val[1] = pmd[2]; - val[2] = pmd[1]; - val[3] = pmd[0]; -} - -static bcmpkt_field_info_t -field_fmt_32_32_12_12_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 32; - info.maxbit = 32; - return info; -} - -static void -field_fmt_32_32_12_12_set(uint32_t *pmd, uint32_t *val) -{ - pmd[12] = (pmd[12] & 0xfffffffe) | (*val & 0x1); -} - -static void -field_fmt_32_32_12_12_get(uint32_t *pmd, uint32_t *val) -{ - *val = pmd[12] & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_33_33_12_12_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 33; - info.maxbit = 33; - return info; -} - -static void -field_fmt_33_33_12_12_set(uint32_t *pmd, uint32_t *val) -{ - pmd[12] = (pmd[12] & 0xfffffffd) | ((*val & 0x1) << 1); -} - -static void -field_fmt_33_33_12_12_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[12] >> 1) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_34_34_12_12_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 34; - info.maxbit = 34; - return info; -} - -static void -field_fmt_34_34_12_12_set(uint32_t *pmd, uint32_t *val) -{ - pmd[12] = (pmd[12] & 0xfffffffb) | ((*val & 0x1) << 2); -} - -static void -field_fmt_34_34_12_12_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[12] >> 2) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_34_37_2_2_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 34; - info.maxbit = 37; - return info; -} - -static void -field_fmt_34_37_2_2_set(uint32_t *pmd, uint32_t *val) -{ - pmd[2] = (pmd[2] & 0xffffffc3) | ((*val & 0xf) << 2); -} - -static void -field_fmt_34_37_2_2_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[2] >> 2) & 0xf; -} - -static bcmpkt_field_info_t -field_fmt_35_35_12_12_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 35; - info.maxbit = 35; - return info; -} - -static void -field_fmt_35_35_12_12_set(uint32_t *pmd, uint32_t *val) -{ - pmd[12] = (pmd[12] & 0xfffffff7) | ((*val & 0x1) << 3); -} - -static void -field_fmt_35_35_12_12_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[12] >> 3) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_36_36_12_12_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 36; - info.maxbit = 36; - return info; -} - -static void -field_fmt_36_36_12_12_set(uint32_t *pmd, uint32_t *val) -{ - pmd[12] = (pmd[12] & 0xffffffef) | ((*val & 0x1) << 4); -} - -static void -field_fmt_36_36_12_12_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[12] >> 4) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_37_37_12_12_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 37; - info.maxbit = 37; - return info; -} - -static void -field_fmt_37_37_12_12_set(uint32_t *pmd, uint32_t *val) -{ - pmd[12] = (pmd[12] & 0xffffffdf) | ((*val & 0x1) << 5); -} - -static void -field_fmt_37_37_12_12_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[12] >> 5) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_37_46_2_2_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 37; - info.maxbit = 46; - return info; -} - -static void -field_fmt_37_46_2_2_set(uint32_t *pmd, uint32_t *val) -{ - pmd[2] = (pmd[2] & 0xffff801f) | ((*val & 0x3ff) << 5); -} - -static void -field_fmt_37_46_2_2_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[2] >> 5) & 0x3ff; -} - -static bcmpkt_field_info_t -field_fmt_38_38_12_12_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 38; - info.maxbit = 38; - return info; -} - -static void -field_fmt_38_38_12_12_set(uint32_t *pmd, uint32_t *val) -{ - pmd[12] = (pmd[12] & 0xffffffbf) | ((*val & 0x1) << 6); -} - -static void -field_fmt_38_38_12_12_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[12] >> 6) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_38_38_2_2_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 38; - info.maxbit = 38; - return info; -} - -static void -field_fmt_38_38_2_2_set(uint32_t *pmd, uint32_t *val) -{ - pmd[2] = (pmd[2] & 0xffffffbf) | ((*val & 0x1) << 6); -} - -static void -field_fmt_38_38_2_2_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[2] >> 6) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_39_39_12_12_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 39; - info.maxbit = 39; - return info; -} - -static void -field_fmt_39_39_12_12_set(uint32_t *pmd, uint32_t *val) -{ - pmd[12] = (pmd[12] & 0xffffff7f) | ((*val & 0x1) << 7); -} - -static void -field_fmt_39_39_12_12_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[12] >> 7) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_39_39_2_2_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 39; - info.maxbit = 39; - return info; -} - -static void -field_fmt_39_39_2_2_set(uint32_t *pmd, uint32_t *val) -{ - pmd[2] = (pmd[2] & 0xffffff7f) | ((*val & 0x1) << 7); -} - -static void -field_fmt_39_39_2_2_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[2] >> 7) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_3_3_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 3; - info.maxbit = 3; - return info; -} - -static void -field_fmt_3_3_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xfffffff7) | ((*val & 0x1) << 3); -} - -static void -field_fmt_3_3_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 3) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_40_40_12_12_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 40; - info.maxbit = 40; - return info; -} - -static void -field_fmt_40_40_12_12_set(uint32_t *pmd, uint32_t *val) -{ - pmd[12] = (pmd[12] & 0xfffffeff) | ((*val & 0x1) << 8); -} - -static void -field_fmt_40_40_12_12_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[12] >> 8) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_40_43_2_2_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 40; - info.maxbit = 43; - return info; -} - -static void -field_fmt_40_43_2_2_set(uint32_t *pmd, uint32_t *val) -{ - pmd[2] = (pmd[2] & 0xfffff0ff) | ((*val & 0xf) << 8); -} - -static void -field_fmt_40_43_2_2_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[2] >> 8) & 0xf; -} - -static bcmpkt_field_info_t -field_fmt_41_41_12_12_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 41; - info.maxbit = 41; - return info; -} - -static void -field_fmt_41_41_12_12_set(uint32_t *pmd, uint32_t *val) -{ - pmd[12] = (pmd[12] & 0xfffffdff) | ((*val & 0x1) << 9); -} - -static void -field_fmt_41_41_12_12_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[12] >> 9) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_42_42_12_12_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 42; - info.maxbit = 42; - return info; -} - -static void -field_fmt_42_42_12_12_set(uint32_t *pmd, uint32_t *val) -{ - pmd[12] = (pmd[12] & 0xfffffbff) | ((*val & 0x1) << 10); -} - -static void -field_fmt_42_42_12_12_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[12] >> 10) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_43_43_12_12_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 43; - info.maxbit = 43; - return info; -} - -static void -field_fmt_43_43_12_12_set(uint32_t *pmd, uint32_t *val) -{ - pmd[12] = (pmd[12] & 0xfffff7ff) | ((*val & 0x1) << 11); -} - -static void -field_fmt_43_43_12_12_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[12] >> 11) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_43_46_2_2_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 43; - info.maxbit = 46; - return info; -} - -static void -field_fmt_43_46_2_2_set(uint32_t *pmd, uint32_t *val) -{ - pmd[2] = (pmd[2] & 0xffff87ff) | ((*val & 0xf) << 11); -} - -static void -field_fmt_43_46_2_2_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[2] >> 11) & 0xf; -} - -static bcmpkt_field_info_t -field_fmt_44_44_12_12_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 44; - info.maxbit = 44; - return info; -} - -static void -field_fmt_44_44_12_12_set(uint32_t *pmd, uint32_t *val) -{ - pmd[12] = (pmd[12] & 0xffffefff) | ((*val & 0x1) << 12); -} - -static void -field_fmt_44_44_12_12_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[12] >> 12) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_44_46_2_2_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 44; - info.maxbit = 46; - return info; -} - -static void -field_fmt_44_46_2_2_set(uint32_t *pmd, uint32_t *val) -{ - pmd[2] = (pmd[2] & 0xffff8fff) | ((*val & 0x7) << 12); -} - -static void -field_fmt_44_46_2_2_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[2] >> 12) & 0x7; -} - -static bcmpkt_field_info_t -field_fmt_45_45_12_12_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 45; - info.maxbit = 45; - return info; -} - -static void -field_fmt_45_45_12_12_set(uint32_t *pmd, uint32_t *val) -{ - pmd[12] = (pmd[12] & 0xffffdfff) | ((*val & 0x1) << 13); -} - -static void -field_fmt_45_45_12_12_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[12] >> 13) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_46_46_12_12_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 46; - info.maxbit = 46; - return info; -} - -static void -field_fmt_46_46_12_12_set(uint32_t *pmd, uint32_t *val) -{ - pmd[12] = (pmd[12] & 0xffffbfff) | ((*val & 0x1) << 14); -} - -static void -field_fmt_46_46_12_12_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[12] >> 14) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_47_47_12_12_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 47; - info.maxbit = 47; - return info; -} - -static void -field_fmt_47_47_12_12_set(uint32_t *pmd, uint32_t *val) -{ - pmd[12] = (pmd[12] & 0xffff7fff) | ((*val & 0x1) << 15); -} - -static void -field_fmt_47_47_12_12_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[12] >> 15) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_47_47_2_2_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 47; - info.maxbit = 47; - return info; -} - -static void -field_fmt_47_47_2_2_set(uint32_t *pmd, uint32_t *val) -{ - pmd[2] = (pmd[2] & 0xffff7fff) | ((*val & 0x1) << 15); -} - -static void -field_fmt_47_47_2_2_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[2] >> 15) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_47_48_2_2_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 47; - info.maxbit = 48; - return info; -} - -static void -field_fmt_47_48_2_2_set(uint32_t *pmd, uint32_t *val) -{ - pmd[2] = (pmd[2] & 0xfffe7fff) | ((*val & 0x3) << 15); -} - -static void -field_fmt_47_48_2_2_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[2] >> 15) & 0x3; -} - -static bcmpkt_field_info_t -field_fmt_48_48_12_12_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 48; - info.maxbit = 48; - return info; -} - -static void -field_fmt_48_48_12_12_set(uint32_t *pmd, uint32_t *val) -{ - pmd[12] = (pmd[12] & 0xfffeffff) | ((*val & 0x1) << 16); -} - -static void -field_fmt_48_48_12_12_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[12] >> 16) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_48_48_2_2_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 48; - info.maxbit = 48; - return info; -} - -static void -field_fmt_48_48_2_2_set(uint32_t *pmd, uint32_t *val) -{ - pmd[2] = (pmd[2] & 0xfffeffff) | ((*val & 0x1) << 16); -} - -static void -field_fmt_48_48_2_2_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[2] >> 16) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_49_49_12_12_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 49; - info.maxbit = 49; - return info; -} - -static void -field_fmt_49_49_12_12_set(uint32_t *pmd, uint32_t *val) -{ - pmd[12] = (pmd[12] & 0xfffdffff) | ((*val & 0x1) << 17); -} - -static void -field_fmt_49_49_12_12_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[12] >> 17) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_49_50_2_2_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 49; - info.maxbit = 50; - return info; -} - -static void -field_fmt_49_50_2_2_set(uint32_t *pmd, uint32_t *val) -{ - pmd[2] = (pmd[2] & 0xfff9ffff) | ((*val & 0x3) << 17); -} - -static void -field_fmt_49_50_2_2_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[2] >> 17) & 0x3; -} - -static bcmpkt_field_info_t -field_fmt_49_52_2_2_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 49; - info.maxbit = 52; - return info; -} - -static void -field_fmt_49_52_2_2_set(uint32_t *pmd, uint32_t *val) -{ - pmd[2] = (pmd[2] & 0xffe1ffff) | ((*val & 0xf) << 17); -} - -static void -field_fmt_49_52_2_2_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[2] >> 17) & 0xf; -} - -static bcmpkt_field_info_t -field_fmt_4_4_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 4; - info.maxbit = 4; - return info; -} - -static void -field_fmt_4_4_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xffffffef) | ((*val & 0x1) << 4); -} - -static void -field_fmt_4_4_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 4) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_50_50_12_12_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 50; - info.maxbit = 50; - return info; -} - -static void -field_fmt_50_50_12_12_set(uint32_t *pmd, uint32_t *val) -{ - pmd[12] = (pmd[12] & 0xfffbffff) | ((*val & 0x1) << 18); -} - -static void -field_fmt_50_50_12_12_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[12] >> 18) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_51_51_2_2_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 51; - info.maxbit = 51; - return info; -} - -static void -field_fmt_51_51_2_2_set(uint32_t *pmd, uint32_t *val) -{ - pmd[2] = (pmd[2] & 0xfff7ffff) | ((*val & 0x1) << 19); -} - -static void -field_fmt_51_51_2_2_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[2] >> 19) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_52_59_2_2_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 52; - info.maxbit = 59; - return info; -} - -static void -field_fmt_52_59_2_2_set(uint32_t *pmd, uint32_t *val) -{ - pmd[2] = (pmd[2] & 0xf00fffff) | ((*val & 0xff) << 20); -} - -static void -field_fmt_52_59_2_2_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[2] >> 20) & 0xff; -} - -static bcmpkt_field_info_t -field_fmt_53_54_2_2_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 53; - info.maxbit = 54; - return info; -} - -static void -field_fmt_53_54_2_2_set(uint32_t *pmd, uint32_t *val) -{ - pmd[2] = (pmd[2] & 0xff9fffff) | ((*val & 0x3) << 21); -} - -static void -field_fmt_53_54_2_2_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[2] >> 21) & 0x3; -} - -static bcmpkt_field_info_t -field_fmt_55_58_2_2_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 55; - info.maxbit = 58; - return info; -} - -static void -field_fmt_55_58_2_2_set(uint32_t *pmd, uint32_t *val) -{ - pmd[2] = (pmd[2] & 0xf87fffff) | ((*val & 0xf) << 23); -} - -static void -field_fmt_55_58_2_2_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[2] >> 23) & 0xf; -} - -static bcmpkt_field_info_t -field_fmt_59_59_2_2_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 59; - info.maxbit = 59; - return info; -} - -static void -field_fmt_59_59_2_2_set(uint32_t *pmd, uint32_t *val) -{ - pmd[2] = (pmd[2] & 0xf7ffffff) | ((*val & 0x1) << 27); -} - -static void -field_fmt_59_59_2_2_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[2] >> 27) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_5_5_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 5; - info.maxbit = 5; - return info; -} - -static void -field_fmt_5_5_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xffffffdf) | ((*val & 0x1) << 5); -} - -static void -field_fmt_5_5_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 5) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_60_60_2_2_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 60; - info.maxbit = 60; - return info; -} - -static void -field_fmt_60_60_2_2_set(uint32_t *pmd, uint32_t *val) -{ - pmd[2] = (pmd[2] & 0xefffffff) | ((*val & 0x1) << 28); -} - -static void -field_fmt_60_60_2_2_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[2] >> 28) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_60_62_2_2_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 60; - info.maxbit = 62; - return info; -} - -static void -field_fmt_60_62_2_2_set(uint32_t *pmd, uint32_t *val) -{ - pmd[2] = (pmd[2] & 0x8fffffff) | ((*val & 0x7) << 28); -} - -static void -field_fmt_60_62_2_2_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[2] >> 28) & 0x7; -} - -static bcmpkt_field_info_t -field_fmt_61_61_2_2_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 61; - info.maxbit = 61; - return info; -} - -static void -field_fmt_61_61_2_2_set(uint32_t *pmd, uint32_t *val) -{ - pmd[2] = (pmd[2] & 0xdfffffff) | ((*val & 0x1) << 29); -} - -static void -field_fmt_61_61_2_2_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[2] >> 29) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_62_62_2_2_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 62; - info.maxbit = 62; - return info; -} - -static void -field_fmt_62_62_2_2_set(uint32_t *pmd, uint32_t *val) -{ - pmd[2] = (pmd[2] & 0xbfffffff) | ((*val & 0x1) << 30); -} - -static void -field_fmt_62_62_2_2_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[2] >> 30) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_63_63_2_2_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 63; - info.maxbit = 63; - return info; -} - -static void -field_fmt_63_63_2_2_set(uint32_t *pmd, uint32_t *val) -{ - pmd[2] = (pmd[2] & 0x7fffffff) | (*val << 31); -} - -static void -field_fmt_63_63_2_2_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[2] >> 31) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_64_64_1_1_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 64; - info.maxbit = 64; - return info; -} - -static void -field_fmt_64_64_1_1_set(uint32_t *pmd, uint32_t *val) -{ - pmd[1] = (pmd[1] & 0xfffffffe) | (*val & 0x1); -} - -static void -field_fmt_64_64_1_1_get(uint32_t *pmd, uint32_t *val) -{ - *val = pmd[1] & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_64_67_11_11_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 64; - info.maxbit = 67; - return info; -} - -static void -field_fmt_64_67_11_11_set(uint32_t *pmd, uint32_t *val) -{ - pmd[11] = (pmd[11] & 0xfffffff0) | (*val & 0xf); -} - -static void -field_fmt_64_67_11_11_get(uint32_t *pmd, uint32_t *val) -{ - *val = pmd[11] & 0xf; -} - -static bcmpkt_field_info_t -field_fmt_65_77_1_1_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 65; - info.maxbit = 77; - return info; -} - -static void -field_fmt_65_77_1_1_set(uint32_t *pmd, uint32_t *val) -{ - pmd[1] = (pmd[1] & 0xffffc001) | ((*val & 0x1fff) << 1); -} - -static void -field_fmt_65_77_1_1_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[1] >> 1) & 0x1fff; -} - -static bcmpkt_field_info_t -field_fmt_68_79_11_11_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 68; - info.maxbit = 79; - return info; -} - -static void -field_fmt_68_79_11_11_set(uint32_t *pmd, uint32_t *val) -{ - pmd[11] = (pmd[11] & 0xffff000f) | ((*val & 0xfff) << 4); -} - -static void -field_fmt_68_79_11_11_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[11] >> 4) & 0xfff; -} - -static bcmpkt_field_info_t -field_fmt_6_6_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 6; - info.maxbit = 6; - return info; -} - -static void -field_fmt_6_6_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xffffffbf) | ((*val & 0x1) << 6); -} - -static void -field_fmt_6_6_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 6) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_78_90_1_1_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 78; - info.maxbit = 90; - return info; -} - -static void -field_fmt_78_90_1_1_set(uint32_t *pmd, uint32_t *val) -{ - pmd[1] = (pmd[1] & 0xf8003fff) | ((*val & 0x1fff) << 14); -} - -static void -field_fmt_78_90_1_1_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[1] >> 14) & 0x1fff; -} - -static bcmpkt_field_info_t -field_fmt_7_7_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 7; - info.maxbit = 7; - return info; -} - -static void -field_fmt_7_7_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xffffff7f) | ((*val & 0x1) << 7); -} - -static void -field_fmt_7_7_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 7) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_80_81_11_11_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 80; - info.maxbit = 81; - return info; -} - -static void -field_fmt_80_81_11_11_set(uint32_t *pmd, uint32_t *val) -{ - pmd[11] = (pmd[11] & 0xfffcffff) | ((*val & 0x3) << 16); -} - -static void -field_fmt_80_81_11_11_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[11] >> 16) & 0x3; -} - -static bcmpkt_field_info_t -field_fmt_80_83_11_11_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 80; - info.maxbit = 83; - return info; -} - -static void -field_fmt_80_83_11_11_set(uint32_t *pmd, uint32_t *val) -{ - pmd[11] = (pmd[11] & 0xfff0ffff) | ((*val & 0xf) << 16); -} - -static void -field_fmt_80_83_11_11_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[11] >> 16) & 0xf; -} - -static bcmpkt_field_info_t -field_fmt_81_84_1_1_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 81; - info.maxbit = 84; - return info; -} - -static void -field_fmt_81_84_1_1_set(uint32_t *pmd, uint32_t *val) -{ - pmd[1] = (pmd[1] & 0xffe1ffff) | ((*val & 0xf) << 17); -} - -static void -field_fmt_81_84_1_1_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[1] >> 17) & 0xf; -} - -static bcmpkt_field_info_t -field_fmt_82_89_11_11_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 82; - info.maxbit = 89; - return info; -} - -static void -field_fmt_82_89_11_11_set(uint32_t *pmd, uint32_t *val) -{ - pmd[11] = (pmd[11] & 0xfc03ffff) | ((*val & 0xff) << 18); -} - -static void -field_fmt_82_89_11_11_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[11] >> 18) & 0xff; -} - -static bcmpkt_field_info_t -field_fmt_85_88_1_1_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 85; - info.maxbit = 88; - return info; -} - -static void -field_fmt_85_88_1_1_set(uint32_t *pmd, uint32_t *val) -{ - pmd[1] = (pmd[1] & 0xfe1fffff) | ((*val & 0xf) << 21); -} - -static void -field_fmt_85_88_1_1_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[1] >> 21) & 0xf; -} - -static bcmpkt_field_info_t -field_fmt_85_92_1_1_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 85; - info.maxbit = 92; - return info; -} - -static void -field_fmt_85_92_1_1_set(uint32_t *pmd, uint32_t *val) -{ - pmd[1] = (pmd[1] & 0xe01fffff) | ((*val & 0xff) << 21); -} - -static void -field_fmt_85_92_1_1_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[1] >> 21) & 0xff; -} - -static bcmpkt_field_info_t -field_fmt_89_90_1_1_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 89; - info.maxbit = 90; - return info; -} - -static void -field_fmt_89_90_1_1_set(uint32_t *pmd, uint32_t *val) -{ - pmd[1] = (pmd[1] & 0xf9ffffff) | ((*val & 0x3) << 25); -} - -static void -field_fmt_89_90_1_1_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[1] >> 25) & 0x3; -} - -static bcmpkt_field_info_t -field_fmt_8_8_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 8; - info.maxbit = 8; - return info; -} - -static void -field_fmt_8_8_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xfffffeff) | ((*val & 0x1) << 8); -} - -static void -field_fmt_8_8_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 8) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_8_8_3_3_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 8; - info.maxbit = 8; - return info; -} - -static void -field_fmt_8_8_3_3_set(uint32_t *pmd, uint32_t *val) -{ - pmd[3] = (pmd[3] & 0xfffffeff) | ((*val & 0x1) << 8); -} - -static void -field_fmt_8_8_3_3_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[3] >> 8) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_90_95_11_11_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 90; - info.maxbit = 95; - return info; -} - -static void -field_fmt_90_95_11_11_set(uint32_t *pmd, uint32_t *val) -{ - pmd[11] = (pmd[11] & 0x3ffffff) | (*val << 26); -} - -static void -field_fmt_90_95_11_11_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[11] >> 26) & 0x3f; -} - -static bcmpkt_field_info_t -field_fmt_91_91_1_1_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 91; - info.maxbit = 91; - return info; -} - -static void -field_fmt_91_91_1_1_set(uint32_t *pmd, uint32_t *val) -{ - pmd[1] = (pmd[1] & 0xf7ffffff) | ((*val & 0x1) << 27); -} - -static void -field_fmt_91_91_1_1_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[1] >> 27) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_91_92_1_1_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 91; - info.maxbit = 92; - return info; -} - -static void -field_fmt_91_92_1_1_set(uint32_t *pmd, uint32_t *val) -{ - pmd[1] = (pmd[1] & 0xe7ffffff) | ((*val & 0x3) << 27); -} - -static void -field_fmt_91_92_1_1_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[1] >> 27) & 0x3; -} - -static bcmpkt_field_info_t -field_fmt_9_9_13_13_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 9; - info.maxbit = 9; - return info; -} - -static void -field_fmt_9_9_13_13_set(uint32_t *pmd, uint32_t *val) -{ - pmd[13] = (pmd[13] & 0xfffffdff) | ((*val & 0x1) << 9); -} - -static void -field_fmt_9_9_13_13_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[13] >> 9) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_9_9_3_3_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 9; - info.maxbit = 9; - return info; -} - -static void -field_fmt_9_9_3_3_set(uint32_t *pmd, uint32_t *val) -{ - pmd[3] = (pmd[3] & 0xfffffdff) | ((*val & 0x1) << 9); -} - -static void -field_fmt_9_9_3_3_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[3] >> 9) & 0x1; -} - -static const shr_enum_map_t bcm78914_b1_rxpmd_reason_type_names[] = -{ - BCM78914_B1_RXPMD_REASON_TYPE_NAME_MAP_INIT -}; - -static bcmpkt_pmd_field_t bcm78914_b1_rxpmd_fields[BCM78914_B1_RXPMD_COUNT] = { - {"REASON",2, field_fmt_0_63_13_12_info, field_fmt_0_63_13_12_set, field_fmt_0_63_13_12_get, NULL, 0}, - {"REASON_TYPE",1, field_fmt_64_67_11_11_info, field_fmt_64_67_11_11_set, field_fmt_64_67_11_11_get, bcm78914_b1_rxpmd_reason_type_names, 0}, - {"I2E_CLASSID",1, field_fmt_68_79_11_11_info, field_fmt_68_79_11_11_set, field_fmt_68_79_11_11_get, NULL, 0}, - {"RX_BFD_SESSION_INDEX",1, field_fmt_68_79_11_11_info, field_fmt_68_79_11_11_set, field_fmt_68_79_11_11_get, NULL, 0}, - {"I2E_CLASSID_TYPE",1, field_fmt_80_83_11_11_info, field_fmt_80_83_11_11_set, field_fmt_80_83_11_11_get, NULL, 0}, - {"RX_BFD_START_OFFSET_TYPE",1, field_fmt_80_81_11_11_info, field_fmt_80_81_11_11_set, field_fmt_80_81_11_11_get, NULL, 0}, - {"RX_BFD_START_OFFSET",1, field_fmt_82_89_11_11_info, field_fmt_82_89_11_11_set, field_fmt_82_89_11_11_get, NULL, 0}, - {"CPU_COS",1, field_fmt_90_95_11_11_info, field_fmt_90_95_11_11_set, field_fmt_90_95_11_11_get, NULL, 0}, - {"QUEUE_NUM",1, field_fmt_90_95_11_11_info, field_fmt_90_95_11_11_set, field_fmt_90_95_11_11_get, NULL, 0}, - {"ING_L3_INTF",1, field_fmt_115_127_10_10_info, field_fmt_115_127_10_10_set, field_fmt_115_127_10_10_get, NULL, 0}, - {"INCOMING_TAG_STATUS",1, field_fmt_128_128_9_9_info, field_fmt_128_128_9_9_set, field_fmt_128_128_9_9_get, NULL, 0}, - {"ING_OTAG_ACTION",1, field_fmt_129_130_9_9_info, field_fmt_129_130_9_9_set, field_fmt_129_130_9_9_get, NULL, 0}, - {"PKT_LENGTH",1, field_fmt_131_144_9_9_info, field_fmt_131_144_9_9_set, field_fmt_131_144_9_9_get, NULL, 0}, - {"O_NHI",1, field_fmt_145_159_9_9_info, field_fmt_145_159_9_9_set, field_fmt_145_159_9_9_get, NULL, 0}, - {"INCOMING_OPAQUE_TAG_STATUS",1, field_fmt_160_160_8_8_info, field_fmt_160_160_8_8_set, field_fmt_160_160_8_8_get, NULL, 0}, - {"BPDU",1, field_fmt_161_161_8_8_info, field_fmt_161_161_8_8_set, field_fmt_161_161_8_8_get, NULL, 0}, - {"CHANGE_DSCP",1, field_fmt_162_162_8_8_info, field_fmt_162_162_8_8_set, field_fmt_162_162_8_8_get, NULL, 0}, - {"CHANGE_ECN",1, field_fmt_163_163_8_8_info, field_fmt_163_163_8_8_set, field_fmt_163_163_8_8_get, NULL, 0}, - {"DLB_ID_VALID",1, field_fmt_164_164_8_8_info, field_fmt_164_164_8_8_set, field_fmt_164_164_8_8_get, NULL, 0}, - {"DO_NOT_CHANGE_TTL",1, field_fmt_165_165_8_8_info, field_fmt_165_165_8_8_set, field_fmt_165_165_8_8_get, NULL, 0}, - {"DSCP",1, field_fmt_166_171_8_8_info, field_fmt_166_171_8_8_set, field_fmt_166_171_8_8_get, NULL, 0}, - {"SPECIAL_PACKET_TYPE",1, field_fmt_166_168_8_8_info, field_fmt_166_168_8_8_set, field_fmt_166_168_8_8_get, NULL, 0}, - {"ECN",1, field_fmt_172_173_8_8_info, field_fmt_172_173_8_8_set, field_fmt_172_173_8_8_get, NULL, 0}, - {"IP_ROUTED",1, field_fmt_174_174_8_8_info, field_fmt_174_174_8_8_set, field_fmt_174_174_8_8_get, NULL, 0}, - {"L3ONLY",1, field_fmt_175_175_8_8_info, field_fmt_175_175_8_8_set, field_fmt_175_175_8_8_get, NULL, 0}, - {"MATCHED_RULE",1, field_fmt_176_187_8_8_info, field_fmt_176_187_8_8_set, field_fmt_176_187_8_8_get, NULL, 0}, - {"MATCHED_RULE_EP",1, field_fmt_176_184_8_8_info, field_fmt_176_184_8_8_set, field_fmt_176_184_8_8_get, NULL, 0}, - {"IS_EGR_TS",1, field_fmt_185_185_8_8_info, field_fmt_185_185_8_8_set, field_fmt_185_185_8_8_get, NULL, 0}, - {"MTP_INDEX",1, field_fmt_188_190_8_8_info, field_fmt_188_190_8_8_set, field_fmt_188_190_8_8_get, NULL, 0}, - {"OUTER_CFI",1, field_fmt_191_191_8_8_info, field_fmt_191_191_8_8_set, field_fmt_191_191_8_8_get, NULL, 0}, - {"OUTER_PRI",1, field_fmt_192_194_7_7_info, field_fmt_192_194_7_7_set, field_fmt_192_194_7_7_get, NULL, 0}, - {"OUTER_VID",1, field_fmt_195_206_7_7_info, field_fmt_195_206_7_7_set, field_fmt_195_206_7_7_get, NULL, 0}, - {"REPLICATION_OR_NHOP_INDEX",1, field_fmt_207_221_7_7_info, field_fmt_207_221_7_7_set, field_fmt_207_221_7_7_get, NULL, 0}, - {"MODIFIED_PKT",1, field_fmt_222_222_7_7_info, field_fmt_222_222_7_7_set, field_fmt_222_222_7_7_get, NULL, 0}, - {"ENTROPY_LABEL",1, field_fmt_223_242_7_6_info, field_fmt_223_242_7_6_set, field_fmt_223_242_7_6_get, NULL, 0}, - {"SPECIAL_PACKET_INDICATOR",1, field_fmt_243_243_6_6_info, field_fmt_243_243_6_6_set, field_fmt_243_243_6_6_get, NULL, 0}, - {"SRC_PORT_NUM",1, field_fmt_244_253_6_6_info, field_fmt_244_253_6_6_set, field_fmt_244_253_6_6_get, NULL, 0}, - {"SWITCH",1, field_fmt_254_254_6_6_info, field_fmt_254_254_6_6_set, field_fmt_254_254_6_6_get, NULL, 0}, - {"TIMESTAMP",1, field_fmt_255_286_6_5_info, field_fmt_255_286_6_5_set, field_fmt_255_286_6_5_get, NULL, 0}, - {"TIMESTAMP_HI",1, field_fmt_287_302_5_4_info, field_fmt_287_302_5_4_set, field_fmt_287_302_5_4_get, NULL, 0}, - {"IEEE_802_1AS_TIMESTAMP_ENABLED",1, field_fmt_303_303_4_4_info, field_fmt_303_303_4_4_set, field_fmt_303_303_4_4_get, NULL, 0}, - {"TUNNEL_DECAP_TYPE",1, field_fmt_304_307_4_4_info, field_fmt_304_307_4_4_set, field_fmt_304_307_4_4_get, NULL, 0}, - {"UC_SW_COPY_DROPPED",1, field_fmt_308_308_4_4_info, field_fmt_308_308_4_4_set, field_fmt_308_308_4_4_get, NULL, 0}, - {"UNICAST_QUEUE",1, field_fmt_309_309_4_4_info, field_fmt_309_309_4_4_set, field_fmt_309_309_4_4_get, NULL, 0}, - {"INCOMING_INT_HDR_TYPE",1, field_fmt_310_311_4_4_info, field_fmt_310_311_4_4_set, field_fmt_310_311_4_4_get, NULL, 0}, - {"DLB_ID",1, field_fmt_312_318_4_4_info, field_fmt_312_318_4_4_set, field_fmt_312_318_4_4_get, NULL, 0}, - {"MODULE_HDR",4, field_fmt_320_447_3_0_info, field_fmt_320_447_3_0_set, field_fmt_320_447_3_0_get, NULL, 0}, - -}; - -static const shr_enum_map_t bcm78914_b1_rxpmd_names[] = -{ - BCM78914_B1_RXPMD_NAME_MAP_INIT -}; - -bcmpkt_pmd_info_t bcm78914_b1_rxpmd_info_get(void) -{ - bcmpkt_pmd_info_t bcm78914_b1_rxpmd_info = {14, BCM78914_B1_RXPMD_COUNT, bcm78914_b1_rxpmd_names, bcm78914_b1_rxpmd_fields}; - return bcm78914_b1_rxpmd_info; -} - -static bcmpkt_pmd_field_t bcm78914_b1_rx_reason_fields[BCM78914_B1_RX_REASON_COUNT] = { - {"CPU_INVALID_REASON",1, field_fmt_0_0_13_13_info, field_fmt_0_0_13_13_set, field_fmt_0_0_13_13_get, NULL, 0}, - {"CPU_SLF",1, field_fmt_1_1_13_13_info, field_fmt_1_1_13_13_set, field_fmt_1_1_13_13_get, NULL, 0}, - {"CPU_DLF",1, field_fmt_2_2_13_13_info, field_fmt_2_2_13_13_set, field_fmt_2_2_13_13_get, NULL, 0}, - {"CPU_L2MOVE",1, field_fmt_3_3_13_13_info, field_fmt_3_3_13_13_set, field_fmt_3_3_13_13_get, NULL, 0}, - {"CPU_L2CPU",1, field_fmt_4_4_13_13_info, field_fmt_4_4_13_13_set, field_fmt_4_4_13_13_get, NULL, 0}, - {"CPU_L3SRC_MISS",1, field_fmt_5_5_13_13_info, field_fmt_5_5_13_13_set, field_fmt_5_5_13_13_get, NULL, 0}, - {"CPU_L3DST_MISS",1, field_fmt_6_6_13_13_info, field_fmt_6_6_13_13_set, field_fmt_6_6_13_13_get, NULL, 0}, - {"CPU_L3SRC_MOVE",1, field_fmt_7_7_13_13_info, field_fmt_7_7_13_13_set, field_fmt_7_7_13_13_get, NULL, 0}, - {"CPU_MC_MISS",1, field_fmt_8_8_13_13_info, field_fmt_8_8_13_13_set, field_fmt_8_8_13_13_get, NULL, 0}, - {"CPU_IPMC_MISS",1, field_fmt_9_9_13_13_info, field_fmt_9_9_13_13_set, field_fmt_9_9_13_13_get, NULL, 0}, - {"CPU_FFP",1, field_fmt_10_10_13_13_info, field_fmt_10_10_13_13_set, field_fmt_10_10_13_13_get, NULL, 0}, - {"CPU_L3HDR_ERR",1, field_fmt_11_11_13_13_info, field_fmt_11_11_13_13_set, field_fmt_11_11_13_13_get, NULL, 0}, - {"CPU_PROTOCOL_PKT",1, field_fmt_12_12_13_13_info, field_fmt_12_12_13_13_set, field_fmt_12_12_13_13_get, NULL, 0}, - {"CPU_DOS_ATTACK",1, field_fmt_13_13_13_13_info, field_fmt_13_13_13_13_set, field_fmt_13_13_13_13_get, NULL, 0}, - {"CPU_MARTIAN_ADDR",1, field_fmt_14_14_13_13_info, field_fmt_14_14_13_13_set, field_fmt_14_14_13_13_get, NULL, 0}, - {"CPU_TUNNEL_ERR",1, field_fmt_15_15_13_13_info, field_fmt_15_15_13_13_set, field_fmt_15_15_13_13_get, NULL, 0}, - {"CPU_SFLOW_SRC",1, field_fmt_16_16_13_13_info, field_fmt_16_16_13_13_set, field_fmt_16_16_13_13_get, NULL, 0}, - {"CPU_SFLOW_DST",1, field_fmt_17_17_13_13_info, field_fmt_17_17_13_13_set, field_fmt_17_17_13_13_get, NULL, 0}, - {"ICMP_REDIRECT",1, field_fmt_18_18_13_13_info, field_fmt_18_18_13_13_set, field_fmt_18_18_13_13_get, NULL, 0}, - {"L3_SLOWPATH",1, field_fmt_19_19_13_13_info, field_fmt_19_19_13_13_set, field_fmt_19_19_13_13_get, NULL, 0}, - {"PARITY_ERROR",1, field_fmt_20_20_13_13_info, field_fmt_20_20_13_13_set, field_fmt_20_20_13_13_get, NULL, 0}, - {"L3_MTU_CHECK_FAIL",1, field_fmt_21_21_13_13_info, field_fmt_21_21_13_13_set, field_fmt_21_21_13_13_get, NULL, 0}, - {"MPLS_TTL_CHECK",1, field_fmt_22_22_13_13_info, field_fmt_22_22_13_13_set, field_fmt_22_22_13_13_get, NULL, 0}, - {"MPLS_LABEL_MISS",1, field_fmt_23_23_13_13_info, field_fmt_23_23_13_13_set, field_fmt_23_23_13_13_get, NULL, 0}, - {"MPLS_INVALID_ACTION",1, field_fmt_24_24_13_13_info, field_fmt_24_24_13_13_set, field_fmt_24_24_13_13_get, NULL, 0}, - {"MPLS_INVALID_PAYLOAD",1, field_fmt_25_25_13_13_info, field_fmt_25_25_13_13_set, field_fmt_25_25_13_13_get, NULL, 0}, - {"CPU_VFP",1, field_fmt_26_26_13_13_info, field_fmt_26_26_13_13_set, field_fmt_26_26_13_13_get, NULL, 0}, - {"PBT_NONUC_PKT",1, field_fmt_27_27_13_13_info, field_fmt_27_27_13_13_set, field_fmt_27_27_13_13_get, NULL, 0}, - {"L3_NEXT_HOP",1, field_fmt_28_28_13_13_info, field_fmt_28_28_13_13_set, field_fmt_28_28_13_13_get, NULL, 0}, - {"MY_STATION",1, field_fmt_29_29_13_13_info, field_fmt_29_29_13_13_set, field_fmt_29_29_13_13_get, NULL, 0}, - {"TIME_SYNC",1, field_fmt_30_30_13_13_info, field_fmt_30_30_13_13_set, field_fmt_30_30_13_13_get, NULL, 0}, - {"TUNNEL_DECAP_ECN_ERROR",1, field_fmt_31_31_13_13_info, field_fmt_31_31_13_13_set, field_fmt_31_31_13_13_get, NULL, 0}, - {"BFD_SLOWPATH",1, field_fmt_32_32_12_12_info, field_fmt_32_32_12_12_set, field_fmt_32_32_12_12_get, NULL, 0}, - {"BFD_ERROR",1, field_fmt_33_33_12_12_info, field_fmt_33_33_12_12_set, field_fmt_33_33_12_12_get, NULL, 0}, - {"PACKET_TRACE_TO_CPU",1, field_fmt_34_34_12_12_info, field_fmt_34_34_12_12_set, field_fmt_34_34_12_12_get, NULL, 0}, - {"MPLS_UNKNOWN_CONTROL_PKT",1, field_fmt_35_35_12_12_info, field_fmt_35_35_12_12_set, field_fmt_35_35_12_12_get, NULL, 0}, - {"MPLS_ALERT_LABEL",1, field_fmt_36_36_12_12_info, field_fmt_36_36_12_12_set, field_fmt_36_36_12_12_get, NULL, 0}, - {"CPU_IPMC_INTERFACE_MISMATCH",1, field_fmt_37_37_12_12_info, field_fmt_37_37_12_12_set, field_fmt_37_37_12_12_get, NULL, 0}, - {"DLB_MONITOR",1, field_fmt_38_38_12_12_info, field_fmt_38_38_12_12_set, field_fmt_38_38_12_12_get, NULL, 0}, - {"CPU_SFLOW_FLEX",1, field_fmt_39_39_12_12_info, field_fmt_39_39_12_12_set, field_fmt_39_39_12_12_get, NULL, 0}, - {"CPU_UVLAN",1, field_fmt_40_40_12_12_info, field_fmt_40_40_12_12_set, field_fmt_40_40_12_12_get, NULL, 0}, - {"SRV6_ERROR",1, field_fmt_41_41_12_12_info, field_fmt_41_41_12_12_set, field_fmt_41_41_12_12_get, NULL, 0}, - {"VXLAN_VN_ID_MISS",1, field_fmt_42_42_12_12_info, field_fmt_42_42_12_12_set, field_fmt_42_42_12_12_get, NULL, 0}, - {"VXLAN_SIP_MISS",1, field_fmt_43_43_12_12_info, field_fmt_43_43_12_12_set, field_fmt_43_43_12_12_get, NULL, 0}, - {"ADAPT_MISS",1, field_fmt_44_44_12_12_info, field_fmt_44_44_12_12_set, field_fmt_44_44_12_12_get, NULL, 0}, - {"INVALID_GSH_NON_GSH",1, field_fmt_45_45_12_12_info, field_fmt_45_45_12_12_set, field_fmt_45_45_12_12_get, NULL, 0}, - {"APU_POLICY_CTC",1, field_fmt_46_46_12_12_info, field_fmt_46_46_12_12_set, field_fmt_46_46_12_12_get, NULL, 0}, - {"DELAYED_CTC",1, field_fmt_47_47_12_12_info, field_fmt_47_47_12_12_set, field_fmt_47_47_12_12_get, NULL, 0}, - {"PORT_DOWN",1, field_fmt_48_48_12_12_info, field_fmt_48_48_12_12_set, field_fmt_48_48_12_12_get, NULL, 0}, - {"SRV6_CONTROL_PKT",1, field_fmt_49_49_12_12_info, field_fmt_49_49_12_12_set, field_fmt_49_49_12_12_get, NULL, 0}, - {"OUI_COMPRESSION_MISS",1, field_fmt_50_50_12_12_info, field_fmt_50_50_12_12_set, field_fmt_50_50_12_12_get, NULL, 0}, - -}; - -static const shr_enum_map_t bcm78914_b1_rx_reason_names[] = -{ - BCM78914_B1_RX_REASON_NAME_MAP_INIT -}; - -bcmpkt_pmd_info_t bcm78914_b1_rx_reason_info_get(void) -{ - bcmpkt_pmd_info_t bcm78914_b1_rx_reason_info = {14, BCM78914_B1_RX_REASON_COUNT, bcm78914_b1_rx_reason_names, bcm78914_b1_rx_reason_fields}; - return bcm78914_b1_rx_reason_info; -} - -static bcmpkt_pmd_field_t bcm78914_b1_ep_rx_reason_fields[BCM78914_B1_EP_RX_REASON_COUNT] = { - {"EP_CTC",1, field_fmt_0_0_13_13_info, field_fmt_0_0_13_13_set, field_fmt_0_0_13_13_get, NULL, 0}, - -}; - -static const shr_enum_map_t bcm78914_b1_ep_rx_reason_names[] = -{ - BCM78914_B1_EP_RX_REASON_NAME_MAP_INIT -}; - -bcmpkt_pmd_info_t bcm78914_b1_ep_rx_reason_info_get(void) -{ - bcmpkt_pmd_info_t bcm78914_b1_ep_rx_reason_info = {14, BCM78914_B1_EP_RX_REASON_COUNT, bcm78914_b1_ep_rx_reason_names, bcm78914_b1_ep_rx_reason_fields}; - return bcm78914_b1_ep_rx_reason_info; -} - -static const shr_enum_map_t bcm78914_b1_txpmd_cpu_tx_destination_type_names[] = -{ - BCM78914_B1_TXPMD_CPU_TX_DESTINATION_TYPE_NAME_MAP_INIT -}; - -static const shr_enum_map_t bcm78914_b1_txpmd_cpu_tx_dp_names[] = -{ - BCM78914_B1_TXPMD_CPU_TX_DP_NAME_MAP_INIT -}; - -static const shr_enum_map_t bcm78914_b1_txpmd_sobmh_from_cpu_destination_type_names[] = -{ - BCM78914_B1_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE_NAME_MAP_INIT -}; - -static const shr_enum_map_t bcm78914_b1_txpmd_header_type_names[] = -{ - BCM78914_B1_TXPMD_HEADER_TYPE_NAME_MAP_INIT -}; - -static const shr_enum_map_t bcm78914_b1_txpmd_start_names[] = -{ - BCM78914_B1_TXPMD_START_NAME_MAP_INIT -}; - -static bcmpkt_pmd_field_t bcm78914_b1_txpmd_fields[BCM78914_B1_TXPMD_COUNT] = { - {"CPU_TX::ECMP_MEMBER_ID",1, field_fmt_0_16_3_3_info, field_fmt_0_16_3_3_set, field_fmt_0_16_3_3_get, NULL, 2}, - {"CPU_TX::MCAST_LB_INDEX",1, field_fmt_0_7_3_3_info, field_fmt_0_7_3_3_set, field_fmt_0_7_3_3_get, NULL, 2}, - {"CPU_TX::COOKIE",1, field_fmt_17_25_3_3_info, field_fmt_17_25_3_3_set, field_fmt_17_25_3_3_get, NULL, 2}, - {"CPU_TX::COOKIE_VALID",1, field_fmt_26_26_3_3_info, field_fmt_26_26_3_3_set, field_fmt_26_26_3_3_get, NULL, 2}, - {"CPU_TX::DESTINATION",1, field_fmt_27_42_3_2_info, field_fmt_27_42_3_2_set, field_fmt_27_42_3_2_get, NULL, 2}, - {"CPU_TX::DESTINATION_TYPE",1, field_fmt_43_46_2_2_info, field_fmt_43_46_2_2_set, field_fmt_43_46_2_2_get, bcm78914_b1_txpmd_cpu_tx_destination_type_names, 2}, - {"CPU_TX::DP",1, field_fmt_47_48_2_2_info, field_fmt_47_48_2_2_set, field_fmt_47_48_2_2_get, bcm78914_b1_txpmd_cpu_tx_dp_names, 2}, - {"CPU_TX::INPUT_PRI",1, field_fmt_49_52_2_2_info, field_fmt_49_52_2_2_set, field_fmt_49_52_2_2_get, NULL, 2}, - {"CPU_TX::INT_CN",1, field_fmt_53_54_2_2_info, field_fmt_53_54_2_2_set, field_fmt_53_54_2_2_get, NULL, 2}, - {"CPU_TX::INT_PRI",1, field_fmt_55_58_2_2_info, field_fmt_55_58_2_2_set, field_fmt_55_58_2_2_get, NULL, 2}, - {"CPU_TX::MCAST_LB_INDEX_VLD",1, field_fmt_59_59_2_2_info, field_fmt_59_59_2_2_set, field_fmt_59_59_2_2_get, NULL, 2}, - {"CPU_TX::PKT_PROFILE",1, field_fmt_60_62_2_2_info, field_fmt_60_62_2_2_set, field_fmt_60_62_2_2_get, NULL, 2}, - {"CPU_TX::QOS_FIELDS_VLD",1, field_fmt_63_63_2_2_info, field_fmt_63_63_2_2_set, field_fmt_63_63_2_2_get, NULL, 2}, - {"CPU_TX::ROUTED_PKT",1, field_fmt_64_64_1_1_info, field_fmt_64_64_1_1_set, field_fmt_64_64_1_1_get, NULL, 2}, - {"CPU_TX::SVP",1, field_fmt_65_77_1_1_info, field_fmt_65_77_1_1_set, field_fmt_65_77_1_1_get, NULL, 2}, - {"CPU_TX::VRF",1, field_fmt_78_90_1_1_info, field_fmt_78_90_1_1_set, field_fmt_78_90_1_1_get, NULL, 2}, - {"CPU_TX::VRF_VALID",1, field_fmt_91_91_1_1_info, field_fmt_91_91_1_1_set, field_fmt_91_91_1_1_get, NULL, 2}, - {"SOBMH_FROM_CPU::COOKIE_7_0",1, field_fmt_0_7_3_3_info, field_fmt_0_7_3_3_set, field_fmt_0_7_3_3_get, NULL, 1}, - {"SOBMH_FROM_CPU::IEEE1588_TIMESTAMP_HDR_OFFSET",1, field_fmt_0_7_3_3_info, field_fmt_0_7_3_3_set, field_fmt_0_7_3_3_get, NULL, 1}, - {"SOBMH_FROM_CPU::COOKIE_8",1, field_fmt_8_8_3_3_info, field_fmt_8_8_3_3_set, field_fmt_8_8_3_3_get, NULL, 1}, - {"SOBMH_FROM_CPU::IEEE1588_REGEN_UDP_CHECKSUM",1, field_fmt_8_8_3_3_info, field_fmt_8_8_3_3_set, field_fmt_8_8_3_3_get, NULL, 1}, - {"SOBMH_FROM_CPU::CELL_ERROR",1, field_fmt_9_9_3_3_info, field_fmt_9_9_3_3_set, field_fmt_9_9_3_3_get, NULL, 1}, - {"SOBMH_FROM_CPU::CNG",1, field_fmt_10_11_3_3_info, field_fmt_10_11_3_3_set, field_fmt_10_11_3_3_get, NULL, 1}, - {"SOBMH_FROM_CPU::COS",1, field_fmt_12_17_3_3_info, field_fmt_12_17_3_3_set, field_fmt_12_17_3_3_get, NULL, 1}, - {"SOBMH_FROM_CPU::DESTINATION",1, field_fmt_18_33_3_2_info, field_fmt_18_33_3_2_set, field_fmt_18_33_3_2_get, NULL, 1}, - {"SOBMH_FROM_CPU::DESTINATION_TYPE",1, field_fmt_34_37_2_2_info, field_fmt_34_37_2_2_set, field_fmt_34_37_2_2_get, bcm78914_b1_txpmd_sobmh_from_cpu_destination_type_names, 1}, - {"SOBMH_FROM_CPU::IEEE1588_INGRESS_TIMESTAMP_SIGN",1, field_fmt_38_38_2_2_info, field_fmt_38_38_2_2_set, field_fmt_38_38_2_2_get, NULL, 1}, - {"SOBMH_FROM_CPU::IEEE1588_ONE_STEP_ENABLE",1, field_fmt_39_39_2_2_info, field_fmt_39_39_2_2_set, field_fmt_39_39_2_2_get, NULL, 1}, - {"SOBMH_FROM_CPU::INPUT_PRI",1, field_fmt_40_43_2_2_info, field_fmt_40_43_2_2_set, field_fmt_40_43_2_2_get, NULL, 1}, - {"SOBMH_FROM_CPU::RQE_Q_NUM",1, field_fmt_44_46_2_2_info, field_fmt_44_46_2_2_set, field_fmt_44_46_2_2_get, NULL, 1}, - {"SOBMH_FROM_CPU::SPAP",1, field_fmt_47_48_2_2_info, field_fmt_47_48_2_2_set, field_fmt_47_48_2_2_get, NULL, 1}, - {"SOBMH_FROM_CPU::SPID",1, field_fmt_49_50_2_2_info, field_fmt_49_50_2_2_set, field_fmt_49_50_2_2_get, NULL, 1}, - {"SOBMH_FROM_CPU::SPID_OVERRIDE",1, field_fmt_51_51_2_2_info, field_fmt_51_51_2_2_set, field_fmt_51_51_2_2_get, NULL, 1}, - {"SOBMH_FROM_CPU::SRC_MODID",1, field_fmt_52_59_2_2_info, field_fmt_52_59_2_2_set, field_fmt_52_59_2_2_get, NULL, 1}, - {"SOBMH_FROM_CPU::TX_TS",1, field_fmt_60_60_2_2_info, field_fmt_60_60_2_2_set, field_fmt_60_60_2_2_get, NULL, 1}, - {"SOBMH_FROM_CPU::UNICAST",1, field_fmt_61_61_2_2_info, field_fmt_61_61_2_2_set, field_fmt_61_61_2_2_get, NULL, 1}, - {"SOBMH_FROM_CPU::WRED_MARK_ELIGIBLE",1, field_fmt_62_62_2_2_info, field_fmt_62_62_2_2_set, field_fmt_62_62_2_2_get, NULL, 1}, - {"SOBMH_FROM_CPU::WRED_RESPONSE",1, field_fmt_63_63_2_2_info, field_fmt_63_63_2_2_set, field_fmt_63_63_2_2_get, NULL, 1}, - {"HEADER_TYPE",1, field_fmt_120_125_0_0_info, field_fmt_120_125_0_0_set, field_fmt_120_125_0_0_get, bcm78914_b1_txpmd_header_type_names, 0}, - {"START",1, field_fmt_126_127_0_0_info, field_fmt_126_127_0_0_set, field_fmt_126_127_0_0_get, bcm78914_b1_txpmd_start_names, 0}, - -}; - -static const shr_enum_map_t bcm78914_b1_txpmd_names[] = -{ - BCM78914_B1_TXPMD_NAME_MAP_INIT -}; - -bcmpkt_pmd_info_t bcm78914_b1_txpmd_info_get(void) -{ - bcmpkt_pmd_info_t bcm78914_b1_txpmd_info = {4, BCM78914_B1_TXPMD_COUNT, bcm78914_b1_txpmd_names, bcm78914_b1_txpmd_fields}; - return bcm78914_b1_txpmd_info; -} - -static const shr_enum_map_t bcm78914_b1_lbhdr_header_type_names[] = -{ - BCM78914_B1_LBHDR_HEADER_TYPE_NAME_MAP_INIT -}; - -static const shr_enum_map_t bcm78914_b1_lbhdr_start_names[] = -{ - BCM78914_B1_LBHDR_START_NAME_MAP_INIT -}; - -static bcmpkt_pmd_field_t bcm78914_b1_lbhdr_fields[BCM78914_B1_LBHDR_COUNT] = { - {"PKT_PROFILE",1, field_fmt_16_18_3_3_info, field_fmt_16_18_3_3_set, field_fmt_16_18_3_3_get, NULL, 0}, - {"QOS_FIELD_VALID",1, field_fmt_19_19_3_3_info, field_fmt_19_19_3_3_set, field_fmt_19_19_3_3_get, NULL, 0}, - {"VFI_VALID_MD_ETH",1, field_fmt_21_21_3_3_info, field_fmt_21_21_3_3_set, field_fmt_21_21_3_3_get, NULL, 0}, - {"VRF_VALID",1, field_fmt_22_22_3_3_info, field_fmt_22_22_3_3_set, field_fmt_22_22_3_3_get, NULL, 0}, - {"VFI_MD_ETH",1, field_fmt_24_36_3_2_info, field_fmt_24_36_3_2_set, field_fmt_24_36_3_2_get, NULL, 0}, - {"VRF",1, field_fmt_24_36_3_2_info, field_fmt_24_36_3_2_set, field_fmt_24_36_3_2_get, NULL, 0}, - {"PP_PORT",1, field_fmt_37_46_2_2_info, field_fmt_37_46_2_2_set, field_fmt_37_46_2_2_get, NULL, 0}, - {"VISIBILITY_PKT",1, field_fmt_47_47_2_2_info, field_fmt_47_47_2_2_set, field_fmt_47_47_2_2_get, NULL, 0}, - {"ROUTED_PKT",1, field_fmt_48_48_2_2_info, field_fmt_48_48_2_2_set, field_fmt_48_48_2_2_get, NULL, 0}, - {"OPAQUE_OBJECT",1, field_fmt_81_84_1_1_info, field_fmt_81_84_1_1_set, field_fmt_81_84_1_1_get, NULL, 0}, - {"QOS_FIELD_ETH",1, field_fmt_85_92_1_1_info, field_fmt_85_92_1_1_set, field_fmt_85_92_1_1_get, NULL, 0}, - {"INT_PRI_ETH",1, field_fmt_85_88_1_1_info, field_fmt_85_88_1_1_set, field_fmt_85_88_1_1_get, NULL, 0}, - {"INT_CN_ETH",1, field_fmt_89_90_1_1_info, field_fmt_89_90_1_1_set, field_fmt_89_90_1_1_get, NULL, 0}, - {"CNG_ETH",1, field_fmt_91_92_1_1_info, field_fmt_91_92_1_1_set, field_fmt_91_92_1_1_get, NULL, 0}, - {"INPUT_PRIORITY_MD_ETH",1, field_fmt_116_119_0_0_info, field_fmt_116_119_0_0_set, field_fmt_116_119_0_0_get, NULL, 0}, - {"HEADER_TYPE",1, field_fmt_120_125_0_0_info, field_fmt_120_125_0_0_set, field_fmt_120_125_0_0_get, bcm78914_b1_lbhdr_header_type_names, 0}, - {"START",1, field_fmt_126_127_0_0_info, field_fmt_126_127_0_0_set, field_fmt_126_127_0_0_get, bcm78914_b1_lbhdr_start_names, 0}, - -}; - -static const shr_enum_map_t bcm78914_b1_lbhdr_names[] = -{ - BCM78914_B1_LBHDR_NAME_MAP_INIT -}; - -bcmpkt_pmd_info_t bcm78914_b1_lbhdr_info_get(void) -{ - bcmpkt_pmd_info_t bcm78914_b1_lbhdr_info = {4, BCM78914_B1_LBHDR_COUNT, bcm78914_b1_lbhdr_names, bcm78914_b1_lbhdr_fields}; - return bcm78914_b1_lbhdr_info; -} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78920_a0/bcm78920_a0_pkt_lbhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78920_a0/bcm78920_a0_pkt_lbhdr.c deleted file mode 100644 index ef37d2c7ef2..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78920_a0/bcm78920_a0_pkt_lbhdr.c +++ /dev/null @@ -1,151 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated from the registers file. - * Edits to this file will be lost when it is regenerated. - * Tool: INTERNAL/regs/xgs/generate-pmd.pl - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - * This file provides LBHDR access functions for BCM78920_A0. - * - ******************************************************************************/ - -#include -#include - -#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) -#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) -#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) -#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) - -const bcmpkt_lbhdr_fget_t bcm78920_a0_lbhdr_fget = { - { - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL - } -}; - - -const bcmpkt_lbhdr_fset_t bcm78920_a0_lbhdr_fset = { - { - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL - } -}; - - -const bcmpkt_lbhdr_figet_t bcm78920_a0_lbhdr_figet = { - { - NULL - } -}; - -static shr_enum_map_t bcm78920_a0_lbhdr_view_types[] = { - {NULL, -1}, -}; - -/* -2: unsupported, -1: global, others: view's value */ -static int bcm78920_a0_lbhdr_view_infos[BCMPKT_LBHDR_FID_COUNT] = { - -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, - -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, - -2, -2, -2, -2, -2, -2, -2, -2, -}; - - -void bcm78920_a0_lbhdr_view_info_get(bcmpkt_pmd_view_info_t *info) -{ - info->view_infos = bcm78920_a0_lbhdr_view_infos; - info->view_types = bcm78920_a0_lbhdr_view_types; - info->view_type_get = NULL; -} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78920_a0/bcm78920_a0_pkt_rxpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78920_a0/bcm78920_a0_pkt_rxpmd.c deleted file mode 100644 index a3bb515df75..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78920_a0/bcm78920_a0_pkt_rxpmd.c +++ /dev/null @@ -1,564 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated from the registers file. - * Edits to this file will be lost when it is regenerated. - * Tool: INTERNAL/regs/xgs/generate-pmd.pl - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - * This file provides RXPMD access functions for BCM78920_A0. - * - ******************************************************************************/ - -#include -#include -#include - -#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) -#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) -#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) -#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) -/******************************************************************************* - * SWFORMAT: RXPMD - * BLOCKS: - * SIZE: 576 - ******************************************************************************/ -static void bcmpkt_rxpmd_queue_num_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[0], 2, 6, val); -} - -static uint32_t bcmpkt_rxpmd_queue_num_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[0], 2, 6); - return val; -} - -static void bcmpkt_rxpmd_pkt_length_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[0], 16, 16, val); -} - -static uint32_t bcmpkt_rxpmd_pkt_length_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[0], 16, 16); - return val; -} - -static void bcmpkt_rxpmd_l3only_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[0], 14, 1, val); -} - -static uint32_t bcmpkt_rxpmd_l3only_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[0], 14, 1); - return val; -} - -static void bcmpkt_rxpmd_ip_routed_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[3], 21, 1, val); -} - -static uint32_t bcmpkt_rxpmd_ip_routed_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[3], 21, 1); - return val; -} - -static void bcmpkt_rxpmd_switch_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[0], 13, 1, val == 0); -} - -static uint32_t bcmpkt_rxpmd_switch_get(uint32_t *data) -{ - uint32_t val; - val = (WORD_FIELD_GET(data[0], 13, 1) == 0); - return val; -} - -static void bcmpkt_rxpmd_replication_or_nhop_index_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[1], 16, 16, val); -} - -static uint32_t bcmpkt_rxpmd_replication_or_nhop_index_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[1], 16, 16); - return val; -} - -static void bcmpkt_rxpmd_mpb_flex_data_type_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[3], 0, 7, val); -} - -static uint32_t bcmpkt_rxpmd_mpb_flex_data_type_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[3], 0, 7); - return val; -} - -static void bcmpkt_rxpmd_int_cn_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[3], 16, 2, val); -} - -static uint32_t bcmpkt_rxpmd_int_cn_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[3], 16, 2); - return val; -} - -static void bcmpkt_rxpmd_cng_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[3], 18, 2, val); -} - -static uint32_t bcmpkt_rxpmd_cng_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[3], 18, 2); - return val; -} - -static void bcmpkt_rxpmd_egr_zone_remap_ctrl_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[0], 9, 4, val); -} - -static uint32_t bcmpkt_rxpmd_egr_zone_remap_ctrl_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[0], 9, 4); - return val; -} - -static void bcmpkt_rxpmd_dma_header_version_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[0], 0, 2, val); -} - -static uint32_t bcmpkt_rxpmd_dma_header_version_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[0], 0, 2); - return val; -} - -static void bcmpkt_rxpmd_multicast_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[3], 20, 1, val); -} - -static uint32_t bcmpkt_rxpmd_multicast_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[3], 20, 1); - return val; -} - -static void bcmpkt_rxpmd_copy_to_cpu_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[3], 22, 1, val); -} - -static uint32_t bcmpkt_rxpmd_copy_to_cpu_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[3], 22, 1); - return val; -} - -static void bcmpkt_rxpmd_truncate_cpu_copy_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[0], 8, 1, val); -} - -static uint32_t bcmpkt_rxpmd_truncate_cpu_copy_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[0], 8, 1); - return val; -} - -static void bcmpkt_rxpmd_dop_trigger_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[3], 7, 1, val); -} - -static uint32_t bcmpkt_rxpmd_dop_trigger_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[3], 7, 1); - return val; -} - -static void bcmpkt_rxpmd_eparse_extract_offsets_3_0_or_mirror_encap_index_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[3], 8, 4, val); -} - -static uint32_t bcmpkt_rxpmd_eparse_extract_offsets_3_0_or_mirror_encap_index_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[3], 8, 4); - return val; -} - -static void bcmpkt_rxpmd_arc_id_lo_set(uint32_t *data, uint32_t val) -{ - data[2] = val; -} - -static uint32_t bcmpkt_rxpmd_arc_id_lo_get(uint32_t *data) -{ - uint32_t val; - val = data[2]; - return val; -} - -static void bcmpkt_rxpmd_arc_id_hi_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[1], 0, 16, val); -} - -static uint32_t bcmpkt_rxpmd_arc_id_hi_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[1], 0, 16); - return val; -} - -static void bcmpkt_rxpmd_rx_chip_port_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[3], 23, 9, val); -} - -static uint32_t bcmpkt_rxpmd_rx_chip_port_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[3], 23, 9); - return val; -} - -static void bcmpkt_rxpmd_rx_vpp_port_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[3], 12, 3, val); -} - -static uint32_t bcmpkt_rxpmd_rx_vpp_port_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[3], 12, 3); - return val; -} - -static void bcmpkt_rxpmd_nonsw_copy_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[0], 15, 1, val); -} - -static uint32_t bcmpkt_rxpmd_nonsw_copy_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[0], 15, 1); - return val; -} - -static uint32_t bcmpkt_rxpmd_i_size_get(uint32_t *data, uint32_t **addr) -{ - return 18; -} - -static uint32_t bcmpkt_rxpmd_i_flex_data_get(uint32_t *data, uint32_t **addr) -{ - *addr = data + 4; - return 14; -} - -void bcm78920_a0_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data) -{ -} - -void bcm78920_a0_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons) -{ -} - -void bcm78920_a0_ep_rx_reason_encode(const bcmpkt_rx_reasons_t *reasons, uint32_t *data) -{ -} - -void bcm78920_a0_ep_rx_reason_decode(const uint32_t *data, bcmpkt_rx_reasons_t *reasons) -{ -} - -const bcmpkt_rxpmd_fget_t bcm78920_a0_rxpmd_fget = { - { - NULL, - bcmpkt_rxpmd_queue_num_get, - NULL, - NULL, - NULL, - bcmpkt_rxpmd_pkt_length_get, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - bcmpkt_rxpmd_l3only_get, - bcmpkt_rxpmd_ip_routed_get, - NULL, - NULL, - NULL, - bcmpkt_rxpmd_switch_get, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - bcmpkt_rxpmd_replication_or_nhop_index_get, - NULL, - NULL, - bcmpkt_rxpmd_mpb_flex_data_type_get, - bcmpkt_rxpmd_int_cn_get, - bcmpkt_rxpmd_cng_get, - bcmpkt_rxpmd_egr_zone_remap_ctrl_get, - bcmpkt_rxpmd_dma_header_version_get, - bcmpkt_rxpmd_multicast_get, - bcmpkt_rxpmd_copy_to_cpu_get, - bcmpkt_rxpmd_truncate_cpu_copy_get, - NULL, - bcmpkt_rxpmd_dop_trigger_get, - bcmpkt_rxpmd_eparse_extract_offsets_3_0_or_mirror_encap_index_get, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - bcmpkt_rxpmd_arc_id_lo_get, - bcmpkt_rxpmd_arc_id_hi_get, - NULL, - NULL, - bcmpkt_rxpmd_rx_chip_port_get, - NULL, - NULL, - bcmpkt_rxpmd_rx_vpp_port_get, - bcmpkt_rxpmd_nonsw_copy_get, - NULL, - NULL, - NULL, - NULL, - NULL - } -}; - - -const bcmpkt_rxpmd_fset_t bcm78920_a0_rxpmd_fset = { - { - NULL, - bcmpkt_rxpmd_queue_num_set, - NULL, - NULL, - NULL, - bcmpkt_rxpmd_pkt_length_set, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - bcmpkt_rxpmd_l3only_set, - bcmpkt_rxpmd_ip_routed_set, - NULL, - NULL, - NULL, - bcmpkt_rxpmd_switch_set, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - bcmpkt_rxpmd_replication_or_nhop_index_set, - NULL, - NULL, - bcmpkt_rxpmd_mpb_flex_data_type_set, - bcmpkt_rxpmd_int_cn_set, - bcmpkt_rxpmd_cng_set, - bcmpkt_rxpmd_egr_zone_remap_ctrl_set, - bcmpkt_rxpmd_dma_header_version_set, - bcmpkt_rxpmd_multicast_set, - bcmpkt_rxpmd_copy_to_cpu_set, - bcmpkt_rxpmd_truncate_cpu_copy_set, - NULL, - bcmpkt_rxpmd_dop_trigger_set, - bcmpkt_rxpmd_eparse_extract_offsets_3_0_or_mirror_encap_index_set, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - bcmpkt_rxpmd_arc_id_lo_set, - bcmpkt_rxpmd_arc_id_hi_set, - NULL, - NULL, - bcmpkt_rxpmd_rx_chip_port_set, - NULL, - NULL, - bcmpkt_rxpmd_rx_vpp_port_set, - bcmpkt_rxpmd_nonsw_copy_set, - NULL, - NULL, - NULL, - NULL, - NULL - } -}; - - -const bcmpkt_rxpmd_figet_t bcm78920_a0_rxpmd_figet = { - { - bcmpkt_rxpmd_i_size_get, - NULL, - NULL, - bcmpkt_rxpmd_i_flex_data_get - } -}; - -static shr_enum_map_t bcm78920_a0_rxpmd_view_types[] = { - {NULL, -1}, -}; - -/* -2: unsupported, -1: global, others: view's value */ -static int bcm78920_a0_rxpmd_view_infos[BCMPKT_RXPMD_FID_COUNT] = { - -2, -1, -2, -2, -2, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, - -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -1, -2, -2, -2, -1, -2, - -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, - -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, - -2, -1, -2, -2, -1, -1, -1, -1, -1, -1, -1, -1, -2, -1, -1, -2, - -2, -2, -2, -2, -2, -2, -2, -1, -1, -2, -2, -1, -2, -2, -1, -1, - -2, -2, -2, -2, -2, -}; - - -void bcm78920_a0_rxpmd_view_info_get(bcmpkt_pmd_view_info_t *info) -{ - info->view_infos = bcm78920_a0_rxpmd_view_infos; - info->view_types = bcm78920_a0_rxpmd_view_types; - info->view_type_get = NULL; -} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78920_a0/bcm78920_a0_pkt_rxpmd_field.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78920_a0/bcm78920_a0_pkt_rxpmd_field.c deleted file mode 100644 index e1b1184e268..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78920_a0/bcm78920_a0_pkt_rxpmd_field.c +++ /dev/null @@ -1,109 +0,0 @@ -/*! \file bcm78920_a0_pkt_rxpmd_field.c - * - * This file provides RXPMD access functions for BCM78920_A0. - * - */ -/* - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - */ - -#include -#include -#include -#include -#include -#include - -#define BSL_LOG_MODULE BSL_LS_BCMPKT_FLEX_HDR - -#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) -#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) -#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) -#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) - -int bcm78920_a0_rxpmd_flex_fget(uint32_t *data, - bcmpkt_flex_field_metadata_t *fld_info, - int prof, - uint32_t *val) -{ - uint32_t hdr_words = 14; /* MPB_FLEX_DATA size in words. */ - uint32_t minbit = fld_info->profile[prof].minbit; - uint32_t maxbit = fld_info->profile[prof].maxbit; - uint32_t minword = minbit / 32; - uint32_t low_bit = minbit - (minword * 32); - uint32_t high_bit = maxbit - (minword * 32); - uint32_t diff = high_bit - low_bit; - uint32_t index = hdr_words - minword - 1; - - /* Profile not valid for this field. */ - if ((minbit == 0xFFFFFFFF) || - (prof >= fld_info->profile_cnt)) { - return SHR_E_PARAM; - } - - /* Skip fields with minbit >= 448.*/ - if (minbit >= 448) { - *val = 0; - return SHR_E_NONE; - } - - if (diff == 31) { - *val = data[index]; - } else if (diff < 31) { - *val = WORD_FIELD_GET(data[index], low_bit, diff+1); - } else { - return SHR_E_PARAM; - } - - return SHR_E_NONE; -} - -int bcm78920_a0_rxpmd_flex_fset(uint32_t *data, - bcmpkt_flex_field_metadata_t *fld_info, - int prof, - uint32_t val) -{ - uint32_t hdr_words = 14; /* MPB_FLEX_DATA size in words. */ - uint32_t minbit = fld_info->profile[prof].minbit; - uint32_t maxbit = fld_info->profile[prof].maxbit; - uint32_t minword = minbit / 32; - uint32_t low_bit = minbit - (minword * 32); - uint32_t high_bit = maxbit - (minword * 32); - uint32_t diff = high_bit - low_bit; - uint32_t index = hdr_words - minword - 1; - - /* Profile not valid for this field. */ - if ((minbit == 0xFFFFFFFF) || - (prof >= fld_info->profile_cnt)) { - return SHR_E_PARAM; - } - - /* Skip fields with minbit >= 448.*/ - if (minbit >= 448) { - return SHR_E_PARAM; - } - - if (diff == 31) { - data[index] = val; - } else if (diff < 31) { - WORD_FIELD_SET(data[index], low_bit, diff+1, val); - } else { - return SHR_E_PARAM; - } - - return SHR_E_NONE; -} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78920_a0/bcm78920_a0_pkt_txpmd.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78920_a0/bcm78920_a0_pkt_txpmd.c deleted file mode 100644 index 0ff8d61abc9..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78920_a0/bcm78920_a0_pkt_txpmd.c +++ /dev/null @@ -1,1266 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated from the registers file. - * Edits to this file will be lost when it is regenerated. - * Tool: INTERNAL/regs/xgs/generate-pmd.pl - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - * This file provides TXPMD access functions for BCM78920_A0. - * - ******************************************************************************/ - -#include -#include - -#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) -#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) -#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) -#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) -/******************************************************************************* - * SWFORMAT: TXPMD - * BLOCKS: - * SIZE: 256 - ******************************************************************************/ -static void bcmpkt_txpmd_start_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[4], 30, 2, val); -} - -static uint32_t bcmpkt_txpmd_start_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[4], 30, 2); - return val; -} - -static void bcmpkt_txpmd_header_type_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[4], 24, 6, val); -} - -static uint32_t bcmpkt_txpmd_header_type_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[4], 24, 6); - return val; -} - -static void bcmpkt_txpmd_cell_error_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[4], 23, 1, val); -} - -static uint32_t bcmpkt_txpmd_cell_error_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[4], 23, 1); - return val; -} - -static void bcmpkt_txpmd_input_pri_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[4], 3, 4, val); -} - -static uint32_t bcmpkt_txpmd_input_pri_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[4], 3, 4); - return val; -} - -static void bcmpkt_txpmd_ieee1588_one_step_enable_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[7], 0, 1, val); -} - -static uint32_t bcmpkt_txpmd_ieee1588_one_step_enable_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[7], 0, 1); - return val; -} - -static void bcmpkt_txpmd_ieee1588_regen_udp_checksum_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[7], 0, 1, val); -} - -static uint32_t bcmpkt_txpmd_ieee1588_regen_udp_checksum_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[7], 0, 1); - return val; -} - -static void bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[7], 0, 1, val); -} - -static uint32_t bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[7], 0, 1); - return val; -} - -static void bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[7], 0, 1, val); -} - -static uint32_t bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[7], 0, 1); - return val; -} - -static void bcmpkt_txpmd_spid_override_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[4], 0, 1, val); -} - -static uint32_t bcmpkt_txpmd_spid_override_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[4], 0, 1); - return val; -} - -static void bcmpkt_txpmd_spid_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[4], 1, 2, val); -} - -static uint32_t bcmpkt_txpmd_spid_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[4], 1, 2); - return val; -} - -static void bcmpkt_txpmd_cng_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[4], 22, 1, val); -} - -static uint32_t bcmpkt_txpmd_cng_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[4], 22, 1); - return val; -} - -static void bcmpkt_txpmd_wred_mark_eligible_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[5], 31, 1, val); -} - -static uint32_t bcmpkt_txpmd_wred_mark_eligible_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[5], 31, 1); - return val; -} - -static void bcmpkt_txpmd_cpu_tx_destination_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[6], 16, 12, val); -} - -static uint32_t bcmpkt_txpmd_cpu_tx_destination_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[6], 16, 12); - return val; -} - -static void bcmpkt_txpmd_cpu_tx_destination_type_set(uint32_t *data, uint32_t val) -{ - if (val == BCMPKT_TXPMD_CPU_TX_DESTINATION_T_DEST_PORT) { - val = 1; - } - else if (val == BCMPKT_TXPMD_CPU_TX_DESTINATION_T_ECMP) { - val = 4; - } - else if (val == BCMPKT_TXPMD_CPU_TX_DESTINATION_T_NEXT_HOP) { - val = 3; - } - else if (val == BCMPKT_TXPMD_CPU_TX_DESTINATION_T_NULL) { - val = 0; - } - else if (val == BCMPKT_TXPMD_CPU_TX_DESTINATION_T_TGID) { - val = 2; - } - WORD_FIELD_SET(data[6], 28, 4, val); -} - -static uint32_t bcmpkt_txpmd_cpu_tx_destination_type_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[6], 28, 4); - if (val == 1) { - val = BCMPKT_TXPMD_CPU_TX_DESTINATION_T_DEST_PORT; - } - else if (val == 4) { - val = BCMPKT_TXPMD_CPU_TX_DESTINATION_T_ECMP; - } - else if (val == 3) { - val = BCMPKT_TXPMD_CPU_TX_DESTINATION_T_NEXT_HOP; - } - else if (val == 0) { - val = BCMPKT_TXPMD_CPU_TX_DESTINATION_T_NULL; - } - else if (val == 2) { - val = BCMPKT_TXPMD_CPU_TX_DESTINATION_T_TGID; - } - return val; -} - -static void bcmpkt_txpmd_cpu_tx_input_pri_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[4], 8, 4, val); -} - -static uint32_t bcmpkt_txpmd_cpu_tx_input_pri_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[4], 8, 4); - return val; -} - -static void bcmpkt_txpmd_cpu_tx_int_cn_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[5], 6, 2, val); -} - -static uint32_t bcmpkt_txpmd_cpu_tx_int_cn_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[5], 6, 2); - return val; -} - -static void bcmpkt_txpmd_cpu_tx_int_pri_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[5], 0, 4, val); -} - -static uint32_t bcmpkt_txpmd_cpu_tx_int_pri_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[5], 0, 4); - return val; -} - -static void bcmpkt_txpmd_cpu_tx_routed_pkt_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[4], 18, 1, val); -} - -static uint32_t bcmpkt_txpmd_cpu_tx_routed_pkt_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[4], 18, 1); - return val; -} - -static void bcmpkt_txpmd_cpu_tx_vrf_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[7], 8, 8, val); -} - -static uint32_t bcmpkt_txpmd_cpu_tx_vrf_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[7], 8, 8); - return val; -} - -static void bcmpkt_txpmd_cpu_tx_vrf_valid_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[4], 17, 1, val); -} - -static uint32_t bcmpkt_txpmd_cpu_tx_vrf_valid_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[4], 17, 1); - return val; -} - -static void bcmpkt_txpmd_wred_responsive_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[5], 30, 1, val); -} - -static uint32_t bcmpkt_txpmd_wred_responsive_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[5], 30, 1); - return val; -} - -static void bcmpkt_txpmd_cpu_tx_cookie_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[7], 23, 9, val); -} - -static uint32_t bcmpkt_txpmd_cpu_tx_cookie_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[7], 23, 9); - return val; -} - -static void bcmpkt_txpmd_cookie_7_0_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[5], 9, 8, val); -} - -static uint32_t bcmpkt_txpmd_cookie_7_0_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[5], 9, 8); - return val; -} - -static void bcmpkt_txpmd_cookie_8_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[5], 17, 1, val); -} - -static uint32_t bcmpkt_txpmd_cookie_8_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[5], 17, 1); - return val; -} - -static void bcmpkt_txpmd_aux_sobmh_unicast_pkt_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[2], 23, 1, val); -} - -static uint32_t bcmpkt_txpmd_aux_sobmh_unicast_pkt_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[2], 23, 1); - return val; -} - -static void bcmpkt_txpmd_aux_sobmh_tx_vpp_port_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[1], 2, 3, val); -} - -static uint32_t bcmpkt_txpmd_aux_sobmh_tx_vpp_port_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[1], 2, 3); - return val; -} - -static void bcmpkt_txpmd_aux_sobmh_tx_chip_port_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[1], 6, 9, val); -} - -static uint32_t bcmpkt_txpmd_aux_sobmh_tx_chip_port_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[1], 6, 9); - return val; -} - -static void bcmpkt_txpmd_aux_sobmh_rx_chip_port_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[1], 15, 9, val); -} - -static uint32_t bcmpkt_txpmd_aux_sobmh_rx_chip_port_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[1], 15, 9); - return val; -} - -static void bcmpkt_txpmd_switch_copy_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[4], 7, 1, val); -} - -static uint32_t bcmpkt_txpmd_switch_copy_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[4], 7, 1); - return val; -} - -static void bcmpkt_txpmd_switch_copy_type_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[4], 8, 1, val); -} - -static uint32_t bcmpkt_txpmd_switch_copy_type_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[4], 8, 1); - return val; -} - -static void bcmpkt_txpmd_switch_copy_dest_port_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[4], 9, 9, val); -} - -static uint32_t bcmpkt_txpmd_switch_copy_dest_port_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[4], 9, 9); - return val; -} - -static void bcmpkt_txpmd_switch_copy_cos_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[4], 18, 4, val); -} - -static uint32_t bcmpkt_txpmd_switch_copy_cos_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[4], 18, 4); - return val; -} - -static void bcmpkt_txpmd_cpu_tx_ar_group_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[7], 0, 7, val); -} - -static uint32_t bcmpkt_txpmd_cpu_tx_ar_group_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[7], 0, 7); - return val; -} - -static void bcmpkt_txpmd_cpu_tx_inca_group_id_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[7], 0, 5, val); -} - -static uint32_t bcmpkt_txpmd_cpu_tx_inca_group_id_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[7], 0, 5); - return val; -} - -static void bcmpkt_txpmd_cpu_tx_inca_collective_id_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[7], 5, 1, val); -} - -static uint32_t bcmpkt_txpmd_cpu_tx_inca_collective_id_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[7], 5, 1); - return val; -} - -static void bcmpkt_txpmd_cpu_tx_inca_internal_qp_id_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[7], 6, 2, val); -} - -static uint32_t bcmpkt_txpmd_cpu_tx_inca_internal_qp_id_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[7], 6, 2); - return val; -} - -static void bcmpkt_txpmd_cpu_tx_inca_src_host_profile_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[7], 8, 7, val); -} - -static uint32_t bcmpkt_txpmd_cpu_tx_inca_src_host_profile_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[7], 8, 7); - return val; -} - -static void bcmpkt_txpmd_cpu_tx_inca_flow_type_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[7], 16, 2, val); -} - -static uint32_t bcmpkt_txpmd_cpu_tx_inca_flow_type_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[7], 16, 2); - return val; -} - -static void bcmpkt_txpmd_cpu_tx_inca_redn_reqd_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[7], 19, 1, val); -} - -static uint32_t bcmpkt_txpmd_cpu_tx_inca_redn_reqd_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[7], 19, 1); - return val; -} - -static void bcmpkt_txpmd_cpu_tx_inca_repl_reqd_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[7], 18, 1, val); -} - -static uint32_t bcmpkt_txpmd_cpu_tx_inca_repl_reqd_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[7], 18, 1); - return val; -} - -static void bcmpkt_txpmd_cpu_tx_inca_second_pass_dest_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[7], 20, 9, val); -} - -static uint32_t bcmpkt_txpmd_cpu_tx_inca_second_pass_dest_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[7], 20, 9); - return val; -} - -static void bcmpkt_txpmd_cpu_tx_inca_ice_oper_type_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[6], 2, 4, val); -} - -static uint32_t bcmpkt_txpmd_cpu_tx_inca_ice_oper_type_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[6], 2, 4); - return val; -} - -static void bcmpkt_txpmd_cpu_tx_vlan_profile_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[6], 4, 4, val); -} - -static uint32_t bcmpkt_txpmd_cpu_tx_vlan_profile_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[6], 4, 4); - return val; -} - -static void bcmpkt_txpmd_cpu_tx_fwd_profile_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[6], 8, 4, val); -} - -static uint32_t bcmpkt_txpmd_cpu_tx_fwd_profile_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[6], 8, 4); - return val; -} - -static void bcmpkt_txpmd_cpu_tx_inca_ice_data_format_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[6], 6, 4, val); -} - -static uint32_t bcmpkt_txpmd_cpu_tx_inca_ice_data_format_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[6], 6, 4); - return val; -} - -static void bcmpkt_txpmd_cpu_tx_inca_ice_data_offset_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[6], 10, 6, val); -} - -static uint32_t bcmpkt_txpmd_cpu_tx_inca_ice_data_offset_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[6], 10, 6); - return val; -} - -static void bcmpkt_txpmd_cpu_tx_cng_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[5], 4, 2, val); -} - -static uint32_t bcmpkt_txpmd_cpu_tx_cng_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[5], 4, 2); - return val; -} - -static void bcmpkt_txpmd_cpu_tx_packet_entropy_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[5], 8, 8, val); -} - -static uint32_t bcmpkt_txpmd_cpu_tx_packet_entropy_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[5], 8, 8); - return val; -} - -static void bcmpkt_txpmd_cpu_tx_src_port_num_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[5], 16, 9, val); -} - -static uint32_t bcmpkt_txpmd_cpu_tx_src_port_num_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[5], 16, 9); - return val; -} - -static void bcmpkt_txpmd_cpu_tx_pkt_ctrl_profile_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[5], 28, 4, val); -} - -static uint32_t bcmpkt_txpmd_cpu_tx_pkt_ctrl_profile_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[5], 28, 4); - return val; -} - -static void bcmpkt_txpmd_cpu_tx_cos_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[4], 0, 4, val); -} - -static uint32_t bcmpkt_txpmd_cpu_tx_cos_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[4], 0, 4); - return val; -} - -static void bcmpkt_txpmd_cpu_tx_int_pri_valid_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[4], 12, 1, val); -} - -static uint32_t bcmpkt_txpmd_cpu_tx_int_pri_valid_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[4], 12, 1); - return val; -} - -static void bcmpkt_txpmd_cpu_tx_cng_valid_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[4], 13, 1, val); -} - -static uint32_t bcmpkt_txpmd_cpu_tx_cng_valid_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[4], 13, 1); - return val; -} - -static void bcmpkt_txpmd_cpu_tx_int_cn_valid_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[4], 14, 1, val); -} - -static uint32_t bcmpkt_txpmd_cpu_tx_int_cn_valid_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[4], 14, 1); - return val; -} - -static void bcmpkt_txpmd_cpu_tx_input_pri_valid_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[4], 15, 1, val); -} - -static uint32_t bcmpkt_txpmd_cpu_tx_input_pri_valid_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[4], 15, 1); - return val; -} - -static void bcmpkt_txpmd_cpu_tx_cos_valid_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[4], 16, 1, val); -} - -static uint32_t bcmpkt_txpmd_cpu_tx_cos_valid_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[4], 16, 1); - return val; -} - -static void bcmpkt_txpmd_cpu_tx_cpu_tx_type_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[4], 20, 3, val); -} - -static uint32_t bcmpkt_txpmd_cpu_tx_cpu_tx_type_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[4], 20, 3); - return val; -} - -static void bcmpkt_txpmd_cpu_tx_dop_trigger_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[4], 23, 1, val); -} - -static uint32_t bcmpkt_txpmd_cpu_tx_dop_trigger_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[4], 23, 1); - return val; -} - -static void bcmpkt_txpmd_cpu_tx_vpp_to_lpp_class_id_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[6], 12, 4, val); -} - -static uint32_t bcmpkt_txpmd_cpu_tx_vpp_to_lpp_class_id_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[6], 12, 4); - return val; -} - -static void bcmpkt_txpmd_aux_sobmh_cell_length_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[3], 0, 9, val); -} - -static uint32_t bcmpkt_txpmd_aux_sobmh_cell_length_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[3], 0, 9); - return val; -} - -static void bcmpkt_txpmd_aux_sobmh_eop_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[3], 9, 1, val); -} - -static uint32_t bcmpkt_txpmd_aux_sobmh_eop_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[3], 9, 1); - return val; -} - -static void bcmpkt_txpmd_aux_sobmh_sop_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[3], 10, 1, val); -} - -static uint32_t bcmpkt_txpmd_aux_sobmh_sop_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[3], 10, 1); - return val; -} - -static void bcmpkt_txpmd_aux_sobmh_pkt_length_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[3], 11, 14, val); -} - -static uint32_t bcmpkt_txpmd_aux_sobmh_pkt_length_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[3], 11, 14); - return val; -} - -static void bcmpkt_txpmd_aux_sobmh_copy_to_cpu_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[3], 25, 1, val); -} - -static uint32_t bcmpkt_txpmd_aux_sobmh_copy_to_cpu_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[3], 25, 1); - return val; -} - -static void bcmpkt_txpmd_aux_sobmh_copy_to_debug_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[3], 26, 1, val); -} - -static uint32_t bcmpkt_txpmd_aux_sobmh_copy_to_debug_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[3], 26, 1); - return val; -} - -static void bcmpkt_txpmd_aux_sobmh_cng_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[2], 15, 2, val); -} - -static uint32_t bcmpkt_txpmd_aux_sobmh_cng_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[2], 15, 2); - return val; -} - -static void bcmpkt_txpmd_aux_sobmh_cos_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[2], 17, 6, val); -} - -static uint32_t bcmpkt_txpmd_aux_sobmh_cos_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[2], 17, 6); - return val; -} - -static void bcmpkt_txpmd_aux_sobmh_unicast_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[2], 24, 1, val); -} - -static uint32_t bcmpkt_txpmd_aux_sobmh_unicast_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[2], 24, 1); - return val; -} - -static void bcmpkt_txpmd_aux_sobmh_set_l2bm_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[2], 25, 1, val); -} - -static uint32_t bcmpkt_txpmd_aux_sobmh_set_l2bm_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[2], 25, 1); - return val; -} - -static void bcmpkt_txpmd_aux_sobmh_rqe_q_num_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[2], 26, 4, val); -} - -static uint32_t bcmpkt_txpmd_aux_sobmh_rqe_q_num_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[2], 26, 4); - return val; -} - -static void bcmpkt_txpmd_aux_sobmh_input_pri_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[2], 30, 2, val & MASK(2)); - WORD_FIELD_SET(data[1], 0, 2, (val >> 2) & MASK(2)); -} - -static uint32_t bcmpkt_txpmd_aux_sobmh_input_pri_get(uint32_t *data) -{ - uint32_t val; - val = (WORD_FIELD_GET(data[2], 30, 2) | (WORD_FIELD_GET(data[1], 0, 2) << 2)) ; - return val; -} - -static void bcmpkt_txpmd_aux_sobmh_cell_error_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[1], 5, 1, val); -} - -static uint32_t bcmpkt_txpmd_aux_sobmh_cell_error_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[1], 5, 1); - return val; -} - -static void bcmpkt_txpmd_aux_sobmh_header_type_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[0], 24, 6, val); -} - -static uint32_t bcmpkt_txpmd_aux_sobmh_header_type_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[0], 24, 6); - return val; -} - -static void bcmpkt_txpmd_aux_sobmh_start_set(uint32_t *data, uint32_t val) -{ - WORD_FIELD_SET(data[0], 30, 2, val); -} - -static uint32_t bcmpkt_txpmd_aux_sobmh_start_get(uint32_t *data) -{ - uint32_t val; - val = WORD_FIELD_GET(data[0], 30, 2); - return val; -} - -static uint32_t bcmpkt_txpmd_i_size_get(uint32_t *data, uint32_t **addr) -{ - return 8; -} - - -const bcmpkt_txpmd_fget_t bcm78920_a0_txpmd_fget = { - { - bcmpkt_txpmd_start_get, - bcmpkt_txpmd_header_type_get, - NULL, - NULL, - NULL, - NULL, - NULL, - bcmpkt_txpmd_cell_error_get, - NULL, - NULL, - NULL, - bcmpkt_txpmd_input_pri_get, - NULL, - NULL, - NULL, - bcmpkt_txpmd_ieee1588_one_step_enable_get, - bcmpkt_txpmd_ieee1588_regen_udp_checksum_get, - bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_get, - bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_get, - NULL, - bcmpkt_txpmd_spid_override_get, - bcmpkt_txpmd_spid_get, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - bcmpkt_txpmd_cng_get, - NULL, - NULL, - bcmpkt_txpmd_wred_mark_eligible_get, - NULL, - NULL, - NULL, - bcmpkt_txpmd_cpu_tx_destination_get, - bcmpkt_txpmd_cpu_tx_destination_type_get, - NULL, - bcmpkt_txpmd_cpu_tx_input_pri_get, - bcmpkt_txpmd_cpu_tx_int_cn_get, - bcmpkt_txpmd_cpu_tx_int_pri_get, - NULL, - NULL, - NULL, - bcmpkt_txpmd_cpu_tx_routed_pkt_get, - NULL, - NULL, - bcmpkt_txpmd_cpu_tx_vrf_get, - bcmpkt_txpmd_cpu_tx_vrf_valid_get, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - bcmpkt_txpmd_wred_responsive_get, - bcmpkt_txpmd_cpu_tx_cookie_get, - NULL, - bcmpkt_txpmd_cookie_7_0_get, - bcmpkt_txpmd_cookie_8_get, - bcmpkt_txpmd_aux_sobmh_unicast_pkt_get, - bcmpkt_txpmd_aux_sobmh_tx_vpp_port_get, - bcmpkt_txpmd_aux_sobmh_tx_chip_port_get, - bcmpkt_txpmd_aux_sobmh_rx_chip_port_get, - NULL, - bcmpkt_txpmd_switch_copy_get, - bcmpkt_txpmd_switch_copy_type_get, - bcmpkt_txpmd_switch_copy_dest_port_get, - bcmpkt_txpmd_switch_copy_cos_get, - bcmpkt_txpmd_cpu_tx_ar_group_get, - bcmpkt_txpmd_cpu_tx_inca_group_id_get, - bcmpkt_txpmd_cpu_tx_inca_collective_id_get, - bcmpkt_txpmd_cpu_tx_inca_internal_qp_id_get, - bcmpkt_txpmd_cpu_tx_inca_src_host_profile_get, - bcmpkt_txpmd_cpu_tx_inca_flow_type_get, - bcmpkt_txpmd_cpu_tx_inca_redn_reqd_get, - bcmpkt_txpmd_cpu_tx_inca_repl_reqd_get, - bcmpkt_txpmd_cpu_tx_inca_second_pass_dest_get, - bcmpkt_txpmd_cpu_tx_inca_ice_oper_type_get, - bcmpkt_txpmd_cpu_tx_vlan_profile_get, - bcmpkt_txpmd_cpu_tx_fwd_profile_get, - bcmpkt_txpmd_cpu_tx_inca_ice_data_format_get, - bcmpkt_txpmd_cpu_tx_inca_ice_data_offset_get, - bcmpkt_txpmd_cpu_tx_cng_get, - bcmpkt_txpmd_cpu_tx_packet_entropy_get, - bcmpkt_txpmd_cpu_tx_src_port_num_get, - bcmpkt_txpmd_cpu_tx_pkt_ctrl_profile_get, - bcmpkt_txpmd_cpu_tx_cos_get, - bcmpkt_txpmd_cpu_tx_int_pri_valid_get, - bcmpkt_txpmd_cpu_tx_cng_valid_get, - bcmpkt_txpmd_cpu_tx_int_cn_valid_get, - bcmpkt_txpmd_cpu_tx_input_pri_valid_get, - bcmpkt_txpmd_cpu_tx_cos_valid_get, - bcmpkt_txpmd_cpu_tx_cpu_tx_type_get, - bcmpkt_txpmd_cpu_tx_dop_trigger_get, - bcmpkt_txpmd_cpu_tx_vpp_to_lpp_class_id_get, - bcmpkt_txpmd_aux_sobmh_cell_length_get, - bcmpkt_txpmd_aux_sobmh_eop_get, - bcmpkt_txpmd_aux_sobmh_sop_get, - bcmpkt_txpmd_aux_sobmh_pkt_length_get, - bcmpkt_txpmd_aux_sobmh_copy_to_cpu_get, - bcmpkt_txpmd_aux_sobmh_copy_to_debug_get, - bcmpkt_txpmd_aux_sobmh_cng_get, - bcmpkt_txpmd_aux_sobmh_cos_get, - bcmpkt_txpmd_aux_sobmh_unicast_get, - bcmpkt_txpmd_aux_sobmh_set_l2bm_get, - bcmpkt_txpmd_aux_sobmh_rqe_q_num_get, - bcmpkt_txpmd_aux_sobmh_input_pri_get, - bcmpkt_txpmd_aux_sobmh_cell_error_get, - bcmpkt_txpmd_aux_sobmh_header_type_get, - bcmpkt_txpmd_aux_sobmh_start_get, - NULL - } -}; - - -const bcmpkt_txpmd_fset_t bcm78920_a0_txpmd_fset = { - { - bcmpkt_txpmd_start_set, - bcmpkt_txpmd_header_type_set, - NULL, - NULL, - NULL, - NULL, - NULL, - bcmpkt_txpmd_cell_error_set, - NULL, - NULL, - NULL, - bcmpkt_txpmd_input_pri_set, - NULL, - NULL, - NULL, - bcmpkt_txpmd_ieee1588_one_step_enable_set, - bcmpkt_txpmd_ieee1588_regen_udp_checksum_set, - bcmpkt_txpmd_ieee1588_ingress_timestamp_sign_set, - bcmpkt_txpmd_ieee1588_timestamp_hdr_offset_set, - NULL, - bcmpkt_txpmd_spid_override_set, - bcmpkt_txpmd_spid_set, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - bcmpkt_txpmd_cng_set, - NULL, - NULL, - bcmpkt_txpmd_wred_mark_eligible_set, - NULL, - NULL, - NULL, - bcmpkt_txpmd_cpu_tx_destination_set, - bcmpkt_txpmd_cpu_tx_destination_type_set, - NULL, - bcmpkt_txpmd_cpu_tx_input_pri_set, - bcmpkt_txpmd_cpu_tx_int_cn_set, - bcmpkt_txpmd_cpu_tx_int_pri_set, - NULL, - NULL, - NULL, - bcmpkt_txpmd_cpu_tx_routed_pkt_set, - NULL, - NULL, - bcmpkt_txpmd_cpu_tx_vrf_set, - bcmpkt_txpmd_cpu_tx_vrf_valid_set, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - bcmpkt_txpmd_wred_responsive_set, - bcmpkt_txpmd_cpu_tx_cookie_set, - NULL, - bcmpkt_txpmd_cookie_7_0_set, - bcmpkt_txpmd_cookie_8_set, - bcmpkt_txpmd_aux_sobmh_unicast_pkt_set, - bcmpkt_txpmd_aux_sobmh_tx_vpp_port_set, - bcmpkt_txpmd_aux_sobmh_tx_chip_port_set, - bcmpkt_txpmd_aux_sobmh_rx_chip_port_set, - NULL, - bcmpkt_txpmd_switch_copy_set, - bcmpkt_txpmd_switch_copy_type_set, - bcmpkt_txpmd_switch_copy_dest_port_set, - bcmpkt_txpmd_switch_copy_cos_set, - bcmpkt_txpmd_cpu_tx_ar_group_set, - bcmpkt_txpmd_cpu_tx_inca_group_id_set, - bcmpkt_txpmd_cpu_tx_inca_collective_id_set, - bcmpkt_txpmd_cpu_tx_inca_internal_qp_id_set, - bcmpkt_txpmd_cpu_tx_inca_src_host_profile_set, - bcmpkt_txpmd_cpu_tx_inca_flow_type_set, - bcmpkt_txpmd_cpu_tx_inca_redn_reqd_set, - bcmpkt_txpmd_cpu_tx_inca_repl_reqd_set, - bcmpkt_txpmd_cpu_tx_inca_second_pass_dest_set, - bcmpkt_txpmd_cpu_tx_inca_ice_oper_type_set, - bcmpkt_txpmd_cpu_tx_vlan_profile_set, - bcmpkt_txpmd_cpu_tx_fwd_profile_set, - bcmpkt_txpmd_cpu_tx_inca_ice_data_format_set, - bcmpkt_txpmd_cpu_tx_inca_ice_data_offset_set, - bcmpkt_txpmd_cpu_tx_cng_set, - bcmpkt_txpmd_cpu_tx_packet_entropy_set, - bcmpkt_txpmd_cpu_tx_src_port_num_set, - bcmpkt_txpmd_cpu_tx_pkt_ctrl_profile_set, - bcmpkt_txpmd_cpu_tx_cos_set, - bcmpkt_txpmd_cpu_tx_int_pri_valid_set, - bcmpkt_txpmd_cpu_tx_cng_valid_set, - bcmpkt_txpmd_cpu_tx_int_cn_valid_set, - bcmpkt_txpmd_cpu_tx_input_pri_valid_set, - bcmpkt_txpmd_cpu_tx_cos_valid_set, - bcmpkt_txpmd_cpu_tx_cpu_tx_type_set, - bcmpkt_txpmd_cpu_tx_dop_trigger_set, - bcmpkt_txpmd_cpu_tx_vpp_to_lpp_class_id_set, - bcmpkt_txpmd_aux_sobmh_cell_length_set, - bcmpkt_txpmd_aux_sobmh_eop_set, - bcmpkt_txpmd_aux_sobmh_sop_set, - bcmpkt_txpmd_aux_sobmh_pkt_length_set, - bcmpkt_txpmd_aux_sobmh_copy_to_cpu_set, - bcmpkt_txpmd_aux_sobmh_copy_to_debug_set, - bcmpkt_txpmd_aux_sobmh_cng_set, - bcmpkt_txpmd_aux_sobmh_cos_set, - bcmpkt_txpmd_aux_sobmh_unicast_set, - bcmpkt_txpmd_aux_sobmh_set_l2bm_set, - bcmpkt_txpmd_aux_sobmh_rqe_q_num_set, - bcmpkt_txpmd_aux_sobmh_input_pri_set, - bcmpkt_txpmd_aux_sobmh_cell_error_set, - bcmpkt_txpmd_aux_sobmh_header_type_set, - bcmpkt_txpmd_aux_sobmh_start_set, - NULL - } -}; - - -const bcmpkt_txpmd_figet_t bcm78920_a0_txpmd_figet = { - { - bcmpkt_txpmd_i_size_get - } -}; - -static shr_enum_map_t bcm78920_a0_txpmd_view_types[] = { - {NULL, -1}, -}; - -/* -2: unsupported, -1: global, others: view's value */ -static int bcm78920_a0_txpmd_view_infos[BCMPKT_TXPMD_FID_COUNT] = { - -1, -1, -2, -2, -2, -2, -2, -1, -2, -2, -2, -1, -2, -2, -2, -1, - -1, -1, -1, -2, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -1, -2, - -2, -1, -2, -2, -2, -1, -1, -2, -1, -1, -1, -2, -2, -2, -1, -2, - -2, -1, -1, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, -2, - -2, -2, -2, -2, -2, -2, -2, -2, -2, -1, -1, -2, -1, -1, -1, -1, - -1, -1, -2, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, - -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, - -1, -2, -}; - - -void bcm78920_a0_txpmd_view_info_get(bcmpkt_pmd_view_info_t *info) -{ - info->view_infos = bcm78920_a0_txpmd_view_infos; - info->view_types = bcm78920_a0_txpmd_view_types; - info->view_type_get = NULL; -} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78920_a0/bcm78920_a0_pmd_field.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78920_a0/bcm78920_a0_pmd_field.c deleted file mode 100644 index 9904a24cae6..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/chip/bcm78920_a0/bcm78920_a0_pmd_field.c +++ /dev/null @@ -1,2157 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated from the registers file. - * Edits to this file will be lost when it is regenerated. - * Tool: INTERNAL/regs/xgs/generate-pmd.pl - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - * This file provides PMD field info for BCM78920_A0. - * - ******************************************************************************/ - -#include -#include - -static bcmpkt_field_info_t -field_fmt_0_0_7_7_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 0; - info.maxbit = 0; - return info; -} - -static void -field_fmt_0_0_7_7_set(uint32_t *pmd, uint32_t *val) -{ - pmd[7] = (pmd[7] & 0xfffffffe) | (*val & 0x1); -} - -static void -field_fmt_0_0_7_7_get(uint32_t *pmd, uint32_t *val) -{ - *val = pmd[7] & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_0_447_17_4_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 0; - info.maxbit = 447; - return info; -} - -static void -field_fmt_0_447_17_4_set(uint32_t *pmd, uint32_t *val) -{ - pmd[17] = val[0]; - pmd[16] = val[1]; - pmd[15] = val[2]; - pmd[14] = val[3]; - pmd[13] = val[4]; - pmd[12] = val[5]; - pmd[11] = val[6]; - pmd[10] = val[7]; - pmd[9] = val[8]; - pmd[8] = val[9]; - pmd[7] = val[10]; - pmd[6] = val[11]; - pmd[5] = val[12]; - pmd[4] = val[13]; -} - -static void -field_fmt_0_447_17_4_get(uint32_t *pmd, uint32_t *val) -{ - val[0] = pmd[17]; - val[1] = pmd[16]; - val[2] = pmd[15]; - val[3] = pmd[14]; - val[4] = pmd[13]; - val[5] = pmd[12]; - val[6] = pmd[11]; - val[7] = pmd[10]; - val[8] = pmd[9]; - val[9] = pmd[8]; - val[10] = pmd[7]; - val[11] = pmd[6]; - val[12] = pmd[5]; - val[13] = pmd[4]; -} - -static bcmpkt_field_info_t -field_fmt_0_4_7_7_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 0; - info.maxbit = 4; - return info; -} - -static void -field_fmt_0_4_7_7_set(uint32_t *pmd, uint32_t *val) -{ - pmd[7] = (pmd[7] & 0xffffffe0) | (*val & 0x1f); -} - -static void -field_fmt_0_4_7_7_get(uint32_t *pmd, uint32_t *val) -{ - *val = pmd[7] & 0x1f; -} - -static bcmpkt_field_info_t -field_fmt_0_6_7_7_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 0; - info.maxbit = 6; - return info; -} - -static void -field_fmt_0_6_7_7_set(uint32_t *pmd, uint32_t *val) -{ - pmd[7] = (pmd[7] & 0xffffff80) | (*val & 0x7f); -} - -static void -field_fmt_0_6_7_7_get(uint32_t *pmd, uint32_t *val) -{ - *val = pmd[7] & 0x7f; -} - -static bcmpkt_field_info_t -field_fmt_103_103_4_4_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 103; - info.maxbit = 103; - return info; -} - -static void -field_fmt_103_103_4_4_set(uint32_t *pmd, uint32_t *val) -{ - pmd[4] = (pmd[4] & 0xffffff7f) | ((*val & 0x1) << 7); -} - -static void -field_fmt_103_103_4_4_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[4] >> 7) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_104_104_4_4_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 104; - info.maxbit = 104; - return info; -} - -static void -field_fmt_104_104_4_4_set(uint32_t *pmd, uint32_t *val) -{ - pmd[4] = (pmd[4] & 0xfffffeff) | ((*val & 0x1) << 8); -} - -static void -field_fmt_104_104_4_4_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[4] >> 8) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_104_107_4_4_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 104; - info.maxbit = 107; - return info; -} - -static void -field_fmt_104_107_4_4_set(uint32_t *pmd, uint32_t *val) -{ - pmd[4] = (pmd[4] & 0xfffff0ff) | ((*val & 0xf) << 8); -} - -static void -field_fmt_104_107_4_4_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[4] >> 8) & 0xf; -} - -static bcmpkt_field_info_t -field_fmt_105_113_4_4_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 105; - info.maxbit = 113; - return info; -} - -static void -field_fmt_105_113_4_4_set(uint32_t *pmd, uint32_t *val) -{ - pmd[4] = (pmd[4] & 0xfffc01ff) | ((*val & 0x1ff) << 9); -} - -static void -field_fmt_105_113_4_4_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[4] >> 9) & 0x1ff; -} - -static bcmpkt_field_info_t -field_fmt_108_108_4_4_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 108; - info.maxbit = 108; - return info; -} - -static void -field_fmt_108_108_4_4_set(uint32_t *pmd, uint32_t *val) -{ - pmd[4] = (pmd[4] & 0xffffefff) | ((*val & 0x1) << 12); -} - -static void -field_fmt_108_108_4_4_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[4] >> 12) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_109_109_4_4_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 109; - info.maxbit = 109; - return info; -} - -static void -field_fmt_109_109_4_4_set(uint32_t *pmd, uint32_t *val) -{ - pmd[4] = (pmd[4] & 0xffffdfff) | ((*val & 0x1) << 13); -} - -static void -field_fmt_109_109_4_4_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[4] >> 13) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_110_110_4_4_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 110; - info.maxbit = 110; - return info; -} - -static void -field_fmt_110_110_4_4_set(uint32_t *pmd, uint32_t *val) -{ - pmd[4] = (pmd[4] & 0xffffbfff) | ((*val & 0x1) << 14); -} - -static void -field_fmt_110_110_4_4_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[4] >> 14) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_111_111_4_4_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 111; - info.maxbit = 111; - return info; -} - -static void -field_fmt_111_111_4_4_set(uint32_t *pmd, uint32_t *val) -{ - pmd[4] = (pmd[4] & 0xffff7fff) | ((*val & 0x1) << 15); -} - -static void -field_fmt_111_111_4_4_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[4] >> 15) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_112_112_4_4_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 112; - info.maxbit = 112; - return info; -} - -static void -field_fmt_112_112_4_4_set(uint32_t *pmd, uint32_t *val) -{ - pmd[4] = (pmd[4] & 0xfffeffff) | ((*val & 0x1) << 16); -} - -static void -field_fmt_112_112_4_4_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[4] >> 16) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_113_113_4_4_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 113; - info.maxbit = 113; - return info; -} - -static void -field_fmt_113_113_4_4_set(uint32_t *pmd, uint32_t *val) -{ - pmd[4] = (pmd[4] & 0xfffdffff) | ((*val & 0x1) << 17); -} - -static void -field_fmt_113_113_4_4_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[4] >> 17) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_114_114_4_4_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 114; - info.maxbit = 114; - return info; -} - -static void -field_fmt_114_114_4_4_set(uint32_t *pmd, uint32_t *val) -{ - pmd[4] = (pmd[4] & 0xfffbffff) | ((*val & 0x1) << 18); -} - -static void -field_fmt_114_114_4_4_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[4] >> 18) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_114_117_4_4_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 114; - info.maxbit = 117; - return info; -} - -static void -field_fmt_114_117_4_4_set(uint32_t *pmd, uint32_t *val) -{ - pmd[4] = (pmd[4] & 0xffc3ffff) | ((*val & 0xf) << 18); -} - -static void -field_fmt_114_117_4_4_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[4] >> 18) & 0xf; -} - -static bcmpkt_field_info_t -field_fmt_116_118_4_4_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 116; - info.maxbit = 118; - return info; -} - -static void -field_fmt_116_118_4_4_set(uint32_t *pmd, uint32_t *val) -{ - pmd[4] = (pmd[4] & 0xff8fffff) | ((*val & 0x7) << 20); -} - -static void -field_fmt_116_118_4_4_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[4] >> 20) & 0x7; -} - -static bcmpkt_field_info_t -field_fmt_118_118_4_4_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 118; - info.maxbit = 118; - return info; -} - -static void -field_fmt_118_118_4_4_set(uint32_t *pmd, uint32_t *val) -{ - pmd[4] = (pmd[4] & 0xffbfffff) | ((*val & 0x1) << 22); -} - -static void -field_fmt_118_118_4_4_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[4] >> 22) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_119_119_4_4_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 119; - info.maxbit = 119; - return info; -} - -static void -field_fmt_119_119_4_4_set(uint32_t *pmd, uint32_t *val) -{ - pmd[4] = (pmd[4] & 0xff7fffff) | ((*val & 0x1) << 23); -} - -static void -field_fmt_119_119_4_4_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[4] >> 23) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_120_125_4_4_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 120; - info.maxbit = 125; - return info; -} - -static void -field_fmt_120_125_4_4_set(uint32_t *pmd, uint32_t *val) -{ - pmd[4] = (pmd[4] & 0xc0ffffff) | ((*val & 0x3f) << 24); -} - -static void -field_fmt_120_125_4_4_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[4] >> 24) & 0x3f; -} - -static bcmpkt_field_info_t -field_fmt_126_127_4_4_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 126; - info.maxbit = 127; - return info; -} - -static void -field_fmt_126_127_4_4_set(uint32_t *pmd, uint32_t *val) -{ - pmd[4] = (pmd[4] & 0x3fffffff) | (*val << 30); -} - -static void -field_fmt_126_127_4_4_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[4] >> 30) & 0x3; -} - -static bcmpkt_field_info_t -field_fmt_128_136_3_3_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 128; - info.maxbit = 136; - return info; -} - -static void -field_fmt_128_136_3_3_set(uint32_t *pmd, uint32_t *val) -{ - pmd[3] = (pmd[3] & 0xfffffe00) | (*val & 0x1ff); -} - -static void -field_fmt_128_136_3_3_get(uint32_t *pmd, uint32_t *val) -{ - *val = pmd[3] & 0x1ff; -} - -static bcmpkt_field_info_t -field_fmt_137_137_3_3_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 137; - info.maxbit = 137; - return info; -} - -static void -field_fmt_137_137_3_3_set(uint32_t *pmd, uint32_t *val) -{ - pmd[3] = (pmd[3] & 0xfffffdff) | ((*val & 0x1) << 9); -} - -static void -field_fmt_137_137_3_3_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[3] >> 9) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_138_138_3_3_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 138; - info.maxbit = 138; - return info; -} - -static void -field_fmt_138_138_3_3_set(uint32_t *pmd, uint32_t *val) -{ - pmd[3] = (pmd[3] & 0xfffffbff) | ((*val & 0x1) << 10); -} - -static void -field_fmt_138_138_3_3_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[3] >> 10) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_139_152_3_3_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 139; - info.maxbit = 152; - return info; -} - -static void -field_fmt_139_152_3_3_set(uint32_t *pmd, uint32_t *val) -{ - pmd[3] = (pmd[3] & 0xfe0007ff) | ((*val & 0x3fff) << 11); -} - -static void -field_fmt_139_152_3_3_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[3] >> 11) & 0x3fff; -} - -static bcmpkt_field_info_t -field_fmt_153_153_3_3_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 153; - info.maxbit = 153; - return info; -} - -static void -field_fmt_153_153_3_3_set(uint32_t *pmd, uint32_t *val) -{ - pmd[3] = (pmd[3] & 0xfdffffff) | ((*val & 0x1) << 25); -} - -static void -field_fmt_153_153_3_3_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[3] >> 25) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_154_154_3_3_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 154; - info.maxbit = 154; - return info; -} - -static void -field_fmt_154_154_3_3_set(uint32_t *pmd, uint32_t *val) -{ - pmd[3] = (pmd[3] & 0xfbffffff) | ((*val & 0x1) << 26); -} - -static void -field_fmt_154_154_3_3_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[3] >> 26) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_16_17_7_7_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 16; - info.maxbit = 17; - return info; -} - -static void -field_fmt_16_17_7_7_set(uint32_t *pmd, uint32_t *val) -{ - pmd[7] = (pmd[7] & 0xfffcffff) | ((*val & 0x3) << 16); -} - -static void -field_fmt_16_17_7_7_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[7] >> 16) & 0x3; -} - -static bcmpkt_field_info_t -field_fmt_175_176_2_2_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 175; - info.maxbit = 176; - return info; -} - -static void -field_fmt_175_176_2_2_set(uint32_t *pmd, uint32_t *val) -{ - pmd[2] = (pmd[2] & 0xfffe7fff) | ((*val & 0x3) << 15); -} - -static void -field_fmt_175_176_2_2_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[2] >> 15) & 0x3; -} - -static bcmpkt_field_info_t -field_fmt_177_182_2_2_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 177; - info.maxbit = 182; - return info; -} - -static void -field_fmt_177_182_2_2_set(uint32_t *pmd, uint32_t *val) -{ - pmd[2] = (pmd[2] & 0xff81ffff) | ((*val & 0x3f) << 17); -} - -static void -field_fmt_177_182_2_2_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[2] >> 17) & 0x3f; -} - -static bcmpkt_field_info_t -field_fmt_183_183_2_2_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 183; - info.maxbit = 183; - return info; -} - -static void -field_fmt_183_183_2_2_set(uint32_t *pmd, uint32_t *val) -{ - pmd[2] = (pmd[2] & 0xff7fffff) | ((*val & 0x1) << 23); -} - -static void -field_fmt_183_183_2_2_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[2] >> 23) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_184_184_2_2_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 184; - info.maxbit = 184; - return info; -} - -static void -field_fmt_184_184_2_2_set(uint32_t *pmd, uint32_t *val) -{ - pmd[2] = (pmd[2] & 0xfeffffff) | ((*val & 0x1) << 24); -} - -static void -field_fmt_184_184_2_2_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[2] >> 24) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_185_185_2_2_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 185; - info.maxbit = 185; - return info; -} - -static void -field_fmt_185_185_2_2_set(uint32_t *pmd, uint32_t *val) -{ - pmd[2] = (pmd[2] & 0xfdffffff) | ((*val & 0x1) << 25); -} - -static void -field_fmt_185_185_2_2_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[2] >> 25) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_186_189_2_2_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 186; - info.maxbit = 189; - return info; -} - -static void -field_fmt_186_189_2_2_set(uint32_t *pmd, uint32_t *val) -{ - pmd[2] = (pmd[2] & 0xc3ffffff) | ((*val & 0xf) << 26); -} - -static void -field_fmt_186_189_2_2_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[2] >> 26) & 0xf; -} - -static bcmpkt_field_info_t -field_fmt_18_18_7_7_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 18; - info.maxbit = 18; - return info; -} - -static void -field_fmt_18_18_7_7_set(uint32_t *pmd, uint32_t *val) -{ - pmd[7] = (pmd[7] & 0xfffbffff) | ((*val & 0x1) << 18); -} - -static void -field_fmt_18_18_7_7_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[7] >> 18) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_190_193_2_1_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 190; - info.maxbit = 193; - return info; -} - -static void -field_fmt_190_193_2_1_set(uint32_t *pmd, uint32_t *val) -{ - pmd[2] = (pmd[2] & 0x3fffffff) | (*val << 30); - pmd[1] = (pmd[1] & 0xfffffffc) | ((*val >> 2) & 0x3); -} - -static void -field_fmt_190_193_2_1_get(uint32_t *pmd, uint32_t *val) -{ - *val = ((pmd[2] >> 30) | (pmd[1] << 2)) & 0xf; -} - -static bcmpkt_field_info_t -field_fmt_194_196_1_1_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 194; - info.maxbit = 196; - return info; -} - -static void -field_fmt_194_196_1_1_set(uint32_t *pmd, uint32_t *val) -{ - pmd[1] = (pmd[1] & 0xffffffe3) | ((*val & 0x7) << 2); -} - -static void -field_fmt_194_196_1_1_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[1] >> 2) & 0x7; -} - -static bcmpkt_field_info_t -field_fmt_197_197_1_1_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 197; - info.maxbit = 197; - return info; -} - -static void -field_fmt_197_197_1_1_set(uint32_t *pmd, uint32_t *val) -{ - pmd[1] = (pmd[1] & 0xffffffdf) | ((*val & 0x1) << 5); -} - -static void -field_fmt_197_197_1_1_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[1] >> 5) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_198_206_1_1_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 198; - info.maxbit = 206; - return info; -} - -static void -field_fmt_198_206_1_1_set(uint32_t *pmd, uint32_t *val) -{ - pmd[1] = (pmd[1] & 0xffff803f) | ((*val & 0x1ff) << 6); -} - -static void -field_fmt_198_206_1_1_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[1] >> 6) & 0x1ff; -} - -static bcmpkt_field_info_t -field_fmt_19_19_7_7_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 19; - info.maxbit = 19; - return info; -} - -static void -field_fmt_19_19_7_7_set(uint32_t *pmd, uint32_t *val) -{ - pmd[7] = (pmd[7] & 0xfff7ffff) | ((*val & 0x1) << 19); -} - -static void -field_fmt_19_19_7_7_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[7] >> 19) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_207_215_1_1_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 207; - info.maxbit = 215; - return info; -} - -static void -field_fmt_207_215_1_1_set(uint32_t *pmd, uint32_t *val) -{ - pmd[1] = (pmd[1] & 0xff007fff) | ((*val & 0x1ff) << 15); -} - -static void -field_fmt_207_215_1_1_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[1] >> 15) & 0x1ff; -} - -static bcmpkt_field_info_t -field_fmt_20_28_7_7_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 20; - info.maxbit = 28; - return info; -} - -static void -field_fmt_20_28_7_7_set(uint32_t *pmd, uint32_t *val) -{ - pmd[7] = (pmd[7] & 0xe00fffff) | ((*val & 0x1ff) << 20); -} - -static void -field_fmt_20_28_7_7_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[7] >> 20) & 0x1ff; -} - -static bcmpkt_field_info_t -field_fmt_23_31_7_7_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 23; - info.maxbit = 31; - return info; -} - -static void -field_fmt_23_31_7_7_set(uint32_t *pmd, uint32_t *val) -{ - pmd[7] = (pmd[7] & 0x7fffff) | (*val << 23); -} - -static void -field_fmt_23_31_7_7_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[7] >> 23) & 0x1ff; -} - -static bcmpkt_field_info_t -field_fmt_248_253_0_0_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 248; - info.maxbit = 253; - return info; -} - -static void -field_fmt_248_253_0_0_set(uint32_t *pmd, uint32_t *val) -{ - pmd[0] = (pmd[0] & 0xc0ffffff) | ((*val & 0x3f) << 24); -} - -static void -field_fmt_248_253_0_0_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[0] >> 24) & 0x3f; -} - -static bcmpkt_field_info_t -field_fmt_254_255_0_0_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 254; - info.maxbit = 255; - return info; -} - -static void -field_fmt_254_255_0_0_set(uint32_t *pmd, uint32_t *val) -{ - pmd[0] = (pmd[0] & 0x3fffffff) | (*val << 30); -} - -static void -field_fmt_254_255_0_0_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[0] >> 30) & 0x3; -} - -static bcmpkt_field_info_t -field_fmt_34_37_6_6_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 34; - info.maxbit = 37; - return info; -} - -static void -field_fmt_34_37_6_6_set(uint32_t *pmd, uint32_t *val) -{ - pmd[6] = (pmd[6] & 0xffffffc3) | ((*val & 0xf) << 2); -} - -static void -field_fmt_34_37_6_6_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[6] >> 2) & 0xf; -} - -static bcmpkt_field_info_t -field_fmt_36_39_6_6_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 36; - info.maxbit = 39; - return info; -} - -static void -field_fmt_36_39_6_6_set(uint32_t *pmd, uint32_t *val) -{ - pmd[6] = (pmd[6] & 0xffffff0f) | ((*val & 0xf) << 4); -} - -static void -field_fmt_36_39_6_6_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[6] >> 4) & 0xf; -} - -static bcmpkt_field_info_t -field_fmt_38_41_6_6_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 38; - info.maxbit = 41; - return info; -} - -static void -field_fmt_38_41_6_6_set(uint32_t *pmd, uint32_t *val) -{ - pmd[6] = (pmd[6] & 0xfffffc3f) | ((*val & 0xf) << 6); -} - -static void -field_fmt_38_41_6_6_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[6] >> 6) & 0xf; -} - -static bcmpkt_field_info_t -field_fmt_40_43_6_6_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 40; - info.maxbit = 43; - return info; -} - -static void -field_fmt_40_43_6_6_set(uint32_t *pmd, uint32_t *val) -{ - pmd[6] = (pmd[6] & 0xfffff0ff) | ((*val & 0xf) << 8); -} - -static void -field_fmt_40_43_6_6_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[6] >> 8) & 0xf; -} - -static bcmpkt_field_info_t -field_fmt_42_47_6_6_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 42; - info.maxbit = 47; - return info; -} - -static void -field_fmt_42_47_6_6_set(uint32_t *pmd, uint32_t *val) -{ - pmd[6] = (pmd[6] & 0xffff03ff) | ((*val & 0x3f) << 10); -} - -static void -field_fmt_42_47_6_6_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[6] >> 10) & 0x3f; -} - -static bcmpkt_field_info_t -field_fmt_448_454_3_3_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 448; - info.maxbit = 454; - return info; -} - -static void -field_fmt_448_454_3_3_set(uint32_t *pmd, uint32_t *val) -{ - pmd[3] = (pmd[3] & 0xffffff80) | (*val & 0x7f); -} - -static void -field_fmt_448_454_3_3_get(uint32_t *pmd, uint32_t *val) -{ - *val = pmd[3] & 0x7f; -} - -static bcmpkt_field_info_t -field_fmt_44_47_6_6_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 44; - info.maxbit = 47; - return info; -} - -static void -field_fmt_44_47_6_6_set(uint32_t *pmd, uint32_t *val) -{ - pmd[6] = (pmd[6] & 0xffff0fff) | ((*val & 0xf) << 12); -} - -static void -field_fmt_44_47_6_6_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[6] >> 12) & 0xf; -} - -static bcmpkt_field_info_t -field_fmt_455_455_3_3_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 455; - info.maxbit = 455; - return info; -} - -static void -field_fmt_455_455_3_3_set(uint32_t *pmd, uint32_t *val) -{ - pmd[3] = (pmd[3] & 0xffffff7f) | ((*val & 0x1) << 7); -} - -static void -field_fmt_455_455_3_3_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[3] >> 7) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_456_459_3_3_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 456; - info.maxbit = 459; - return info; -} - -static void -field_fmt_456_459_3_3_set(uint32_t *pmd, uint32_t *val) -{ - pmd[3] = (pmd[3] & 0xfffff0ff) | ((*val & 0xf) << 8); -} - -static void -field_fmt_456_459_3_3_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[3] >> 8) & 0xf; -} - -static bcmpkt_field_info_t -field_fmt_460_462_3_3_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 460; - info.maxbit = 462; - return info; -} - -static void -field_fmt_460_462_3_3_set(uint32_t *pmd, uint32_t *val) -{ - pmd[3] = (pmd[3] & 0xffff8fff) | ((*val & 0x7) << 12); -} - -static void -field_fmt_460_462_3_3_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[3] >> 12) & 0x7; -} - -static bcmpkt_field_info_t -field_fmt_464_465_3_3_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 464; - info.maxbit = 465; - return info; -} - -static void -field_fmt_464_465_3_3_set(uint32_t *pmd, uint32_t *val) -{ - pmd[3] = (pmd[3] & 0xfffcffff) | ((*val & 0x3) << 16); -} - -static void -field_fmt_464_465_3_3_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[3] >> 16) & 0x3; -} - -static bcmpkt_field_info_t -field_fmt_466_467_3_3_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 466; - info.maxbit = 467; - return info; -} - -static void -field_fmt_466_467_3_3_set(uint32_t *pmd, uint32_t *val) -{ - pmd[3] = (pmd[3] & 0xfff3ffff) | ((*val & 0x3) << 18); -} - -static void -field_fmt_466_467_3_3_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[3] >> 18) & 0x3; -} - -static bcmpkt_field_info_t -field_fmt_468_468_3_3_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 468; - info.maxbit = 468; - return info; -} - -static void -field_fmt_468_468_3_3_set(uint32_t *pmd, uint32_t *val) -{ - pmd[3] = (pmd[3] & 0xffefffff) | ((*val & 0x1) << 20); -} - -static void -field_fmt_468_468_3_3_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[3] >> 20) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_469_469_3_3_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 469; - info.maxbit = 469; - return info; -} - -static void -field_fmt_469_469_3_3_set(uint32_t *pmd, uint32_t *val) -{ - pmd[3] = (pmd[3] & 0xffdfffff) | ((*val & 0x1) << 21); -} - -static void -field_fmt_469_469_3_3_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[3] >> 21) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_470_470_3_3_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 470; - info.maxbit = 470; - return info; -} - -static void -field_fmt_470_470_3_3_set(uint32_t *pmd, uint32_t *val) -{ - pmd[3] = (pmd[3] & 0xffbfffff) | ((*val & 0x1) << 22); -} - -static void -field_fmt_470_470_3_3_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[3] >> 22) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_471_479_3_3_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 471; - info.maxbit = 479; - return info; -} - -static void -field_fmt_471_479_3_3_set(uint32_t *pmd, uint32_t *val) -{ - pmd[3] = (pmd[3] & 0x7fffff) | (*val << 23); -} - -static void -field_fmt_471_479_3_3_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[3] >> 23) & 0x1ff; -} - -static bcmpkt_field_info_t -field_fmt_480_511_2_2_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 480; - info.maxbit = 511; - return info; -} - -static void -field_fmt_480_511_2_2_set(uint32_t *pmd, uint32_t *val) -{ - pmd[2] = *val; -} - -static void -field_fmt_480_511_2_2_get(uint32_t *pmd, uint32_t *val) -{ - *val = pmd[2]; -} - -static bcmpkt_field_info_t -field_fmt_48_59_6_6_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 48; - info.maxbit = 59; - return info; -} - -static void -field_fmt_48_59_6_6_set(uint32_t *pmd, uint32_t *val) -{ - pmd[6] = (pmd[6] & 0xf000ffff) | ((*val & 0xfff) << 16); -} - -static void -field_fmt_48_59_6_6_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[6] >> 16) & 0xfff; -} - -static bcmpkt_field_info_t -field_fmt_512_527_1_1_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 512; - info.maxbit = 527; - return info; -} - -static void -field_fmt_512_527_1_1_set(uint32_t *pmd, uint32_t *val) -{ - pmd[1] = (pmd[1] & 0xffff0000) | (*val & 0xffff); -} - -static void -field_fmt_512_527_1_1_get(uint32_t *pmd, uint32_t *val) -{ - *val = pmd[1] & 0xffff; -} - -static bcmpkt_field_info_t -field_fmt_528_543_1_1_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 528; - info.maxbit = 543; - return info; -} - -static void -field_fmt_528_543_1_1_set(uint32_t *pmd, uint32_t *val) -{ - pmd[1] = (pmd[1] & 0xffff) | (*val << 16); -} - -static void -field_fmt_528_543_1_1_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[1] >> 16) & 0xffff; -} - -static bcmpkt_field_info_t -field_fmt_544_545_0_0_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 544; - info.maxbit = 545; - return info; -} - -static void -field_fmt_544_545_0_0_set(uint32_t *pmd, uint32_t *val) -{ - pmd[0] = (pmd[0] & 0xfffffffc) | (*val & 0x3); -} - -static void -field_fmt_544_545_0_0_get(uint32_t *pmd, uint32_t *val) -{ - *val = pmd[0] & 0x3; -} - -static bcmpkt_field_info_t -field_fmt_546_551_0_0_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 546; - info.maxbit = 551; - return info; -} - -static void -field_fmt_546_551_0_0_set(uint32_t *pmd, uint32_t *val) -{ - pmd[0] = (pmd[0] & 0xffffff03) | ((*val & 0x3f) << 2); -} - -static void -field_fmt_546_551_0_0_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[0] >> 2) & 0x3f; -} - -static bcmpkt_field_info_t -field_fmt_552_552_0_0_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 552; - info.maxbit = 552; - return info; -} - -static void -field_fmt_552_552_0_0_set(uint32_t *pmd, uint32_t *val) -{ - pmd[0] = (pmd[0] & 0xfffffeff) | ((*val & 0x1) << 8); -} - -static void -field_fmt_552_552_0_0_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[0] >> 8) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_553_556_0_0_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 553; - info.maxbit = 556; - return info; -} - -static void -field_fmt_553_556_0_0_set(uint32_t *pmd, uint32_t *val) -{ - pmd[0] = (pmd[0] & 0xffffe1ff) | ((*val & 0xf) << 9); -} - -static void -field_fmt_553_556_0_0_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[0] >> 9) & 0xf; -} - -static bcmpkt_field_info_t -field_fmt_557_557_0_0_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 557; - info.maxbit = 557; - return info; -} - -static void -field_fmt_557_557_0_0_set(uint32_t *pmd, uint32_t *val) -{ - pmd[0] = (pmd[0] & 0xffffdfff) | ((*val & 0x1) << 13); -} - -static void -field_fmt_557_557_0_0_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[0] >> 13) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_558_558_0_0_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 558; - info.maxbit = 558; - return info; -} - -static void -field_fmt_558_558_0_0_set(uint32_t *pmd, uint32_t *val) -{ - pmd[0] = (pmd[0] & 0xffffbfff) | ((*val & 0x1) << 14); -} - -static void -field_fmt_558_558_0_0_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[0] >> 14) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_559_559_0_0_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 559; - info.maxbit = 559; - return info; -} - -static void -field_fmt_559_559_0_0_set(uint32_t *pmd, uint32_t *val) -{ - pmd[0] = (pmd[0] & 0xffff7fff) | ((*val & 0x1) << 15); -} - -static void -field_fmt_559_559_0_0_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[0] >> 15) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_560_575_0_0_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 560; - info.maxbit = 575; - return info; -} - -static void -field_fmt_560_575_0_0_set(uint32_t *pmd, uint32_t *val) -{ - pmd[0] = (pmd[0] & 0xffff) | (*val << 16); -} - -static void -field_fmt_560_575_0_0_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[0] >> 16) & 0xffff; -} - -static bcmpkt_field_info_t -field_fmt_5_5_7_7_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 5; - info.maxbit = 5; - return info; -} - -static void -field_fmt_5_5_7_7_set(uint32_t *pmd, uint32_t *val) -{ - pmd[7] = (pmd[7] & 0xffffffdf) | ((*val & 0x1) << 5); -} - -static void -field_fmt_5_5_7_7_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[7] >> 5) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_60_63_6_6_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 60; - info.maxbit = 63; - return info; -} - -static void -field_fmt_60_63_6_6_set(uint32_t *pmd, uint32_t *val) -{ - pmd[6] = (pmd[6] & 0xfffffff) | (*val << 28); -} - -static void -field_fmt_60_63_6_6_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[6] >> 28) & 0xf; -} - -static bcmpkt_field_info_t -field_fmt_64_67_5_5_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 64; - info.maxbit = 67; - return info; -} - -static void -field_fmt_64_67_5_5_set(uint32_t *pmd, uint32_t *val) -{ - pmd[5] = (pmd[5] & 0xfffffff0) | (*val & 0xf); -} - -static void -field_fmt_64_67_5_5_get(uint32_t *pmd, uint32_t *val) -{ - *val = pmd[5] & 0xf; -} - -static bcmpkt_field_info_t -field_fmt_68_69_5_5_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 68; - info.maxbit = 69; - return info; -} - -static void -field_fmt_68_69_5_5_set(uint32_t *pmd, uint32_t *val) -{ - pmd[5] = (pmd[5] & 0xffffffcf) | ((*val & 0x3) << 4); -} - -static void -field_fmt_68_69_5_5_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[5] >> 4) & 0x3; -} - -static bcmpkt_field_info_t -field_fmt_6_7_7_7_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 6; - info.maxbit = 7; - return info; -} - -static void -field_fmt_6_7_7_7_set(uint32_t *pmd, uint32_t *val) -{ - pmd[7] = (pmd[7] & 0xffffff3f) | ((*val & 0x3) << 6); -} - -static void -field_fmt_6_7_7_7_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[7] >> 6) & 0x3; -} - -static bcmpkt_field_info_t -field_fmt_70_71_5_5_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 70; - info.maxbit = 71; - return info; -} - -static void -field_fmt_70_71_5_5_set(uint32_t *pmd, uint32_t *val) -{ - pmd[5] = (pmd[5] & 0xffffff3f) | ((*val & 0x3) << 6); -} - -static void -field_fmt_70_71_5_5_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[5] >> 6) & 0x3; -} - -static bcmpkt_field_info_t -field_fmt_72_79_5_5_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 72; - info.maxbit = 79; - return info; -} - -static void -field_fmt_72_79_5_5_set(uint32_t *pmd, uint32_t *val) -{ - pmd[5] = (pmd[5] & 0xffff00ff) | ((*val & 0xff) << 8); -} - -static void -field_fmt_72_79_5_5_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[5] >> 8) & 0xff; -} - -static bcmpkt_field_info_t -field_fmt_73_80_5_5_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 73; - info.maxbit = 80; - return info; -} - -static void -field_fmt_73_80_5_5_set(uint32_t *pmd, uint32_t *val) -{ - pmd[5] = (pmd[5] & 0xfffe01ff) | ((*val & 0xff) << 9); -} - -static void -field_fmt_73_80_5_5_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[5] >> 9) & 0xff; -} - -static bcmpkt_field_info_t -field_fmt_80_88_5_5_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 80; - info.maxbit = 88; - return info; -} - -static void -field_fmt_80_88_5_5_set(uint32_t *pmd, uint32_t *val) -{ - pmd[5] = (pmd[5] & 0xfe00ffff) | ((*val & 0x1ff) << 16); -} - -static void -field_fmt_80_88_5_5_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[5] >> 16) & 0x1ff; -} - -static bcmpkt_field_info_t -field_fmt_81_81_5_5_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 81; - info.maxbit = 81; - return info; -} - -static void -field_fmt_81_81_5_5_set(uint32_t *pmd, uint32_t *val) -{ - pmd[5] = (pmd[5] & 0xfffdffff) | ((*val & 0x1) << 17); -} - -static void -field_fmt_81_81_5_5_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[5] >> 17) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_8_14_7_7_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 8; - info.maxbit = 14; - return info; -} - -static void -field_fmt_8_14_7_7_set(uint32_t *pmd, uint32_t *val) -{ - pmd[7] = (pmd[7] & 0xffff80ff) | ((*val & 0x7f) << 8); -} - -static void -field_fmt_8_14_7_7_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[7] >> 8) & 0x7f; -} - -static bcmpkt_field_info_t -field_fmt_8_15_7_7_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 8; - info.maxbit = 15; - return info; -} - -static void -field_fmt_8_15_7_7_set(uint32_t *pmd, uint32_t *val) -{ - pmd[7] = (pmd[7] & 0xffff00ff) | ((*val & 0xff) << 8); -} - -static void -field_fmt_8_15_7_7_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[7] >> 8) & 0xff; -} - -static bcmpkt_field_info_t -field_fmt_92_95_5_5_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 92; - info.maxbit = 95; - return info; -} - -static void -field_fmt_92_95_5_5_set(uint32_t *pmd, uint32_t *val) -{ - pmd[5] = (pmd[5] & 0xfffffff) | (*val << 28); -} - -static void -field_fmt_92_95_5_5_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[5] >> 28) & 0xf; -} - -static bcmpkt_field_info_t -field_fmt_94_94_5_5_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 94; - info.maxbit = 94; - return info; -} - -static void -field_fmt_94_94_5_5_set(uint32_t *pmd, uint32_t *val) -{ - pmd[5] = (pmd[5] & 0xbfffffff) | ((*val & 0x1) << 30); -} - -static void -field_fmt_94_94_5_5_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[5] >> 30) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_95_95_5_5_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 95; - info.maxbit = 95; - return info; -} - -static void -field_fmt_95_95_5_5_set(uint32_t *pmd, uint32_t *val) -{ - pmd[5] = (pmd[5] & 0x7fffffff) | (*val << 31); -} - -static void -field_fmt_95_95_5_5_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[5] >> 31) & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_96_96_4_4_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 96; - info.maxbit = 96; - return info; -} - -static void -field_fmt_96_96_4_4_set(uint32_t *pmd, uint32_t *val) -{ - pmd[4] = (pmd[4] & 0xfffffffe) | (*val & 0x1); -} - -static void -field_fmt_96_96_4_4_get(uint32_t *pmd, uint32_t *val) -{ - *val = pmd[4] & 0x1; -} - -static bcmpkt_field_info_t -field_fmt_96_99_4_4_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 96; - info.maxbit = 99; - return info; -} - -static void -field_fmt_96_99_4_4_set(uint32_t *pmd, uint32_t *val) -{ - pmd[4] = (pmd[4] & 0xfffffff0) | (*val & 0xf); -} - -static void -field_fmt_96_99_4_4_get(uint32_t *pmd, uint32_t *val) -{ - *val = pmd[4] & 0xf; -} - -static bcmpkt_field_info_t -field_fmt_97_98_4_4_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 97; - info.maxbit = 98; - return info; -} - -static void -field_fmt_97_98_4_4_set(uint32_t *pmd, uint32_t *val) -{ - pmd[4] = (pmd[4] & 0xfffffff9) | ((*val & 0x3) << 1); -} - -static void -field_fmt_97_98_4_4_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[4] >> 1) & 0x3; -} - -static bcmpkt_field_info_t -field_fmt_99_102_4_4_info(void) -{ - bcmpkt_field_info_t info; - info.minbit = 99; - info.maxbit = 102; - return info; -} - -static void -field_fmt_99_102_4_4_set(uint32_t *pmd, uint32_t *val) -{ - pmd[4] = (pmd[4] & 0xffffff87) | ((*val & 0xf) << 3); -} - -static void -field_fmt_99_102_4_4_get(uint32_t *pmd, uint32_t *val) -{ - *val = (pmd[4] >> 3) & 0xf; -} - -static bcmpkt_pmd_field_t bcm78920_a0_rxpmd_fields[BCM78920_A0_RXPMD_COUNT] = { - {"FLEX_DATA",14, field_fmt_0_447_17_4_info, field_fmt_0_447_17_4_set, field_fmt_0_447_17_4_get, NULL, 0}, - {"MPB_FLEX_DATA_TYPE",1, field_fmt_448_454_3_3_info, field_fmt_448_454_3_3_set, field_fmt_448_454_3_3_get, NULL, 0}, - {"DOP_TRIGGER",1, field_fmt_455_455_3_3_info, field_fmt_455_455_3_3_set, field_fmt_455_455_3_3_get, NULL, 0}, - {"EPARSE_EXTRACT_OFFSETS_3_0_OR_MIRROR_ENCAP_INDEX",1, field_fmt_456_459_3_3_info, field_fmt_456_459_3_3_set, field_fmt_456_459_3_3_get, NULL, 0}, - {"RX_VPP_PORT",1, field_fmt_460_462_3_3_info, field_fmt_460_462_3_3_set, field_fmt_460_462_3_3_get, NULL, 0}, - {"INT_CN",1, field_fmt_464_465_3_3_info, field_fmt_464_465_3_3_set, field_fmt_464_465_3_3_get, NULL, 0}, - {"CNG",1, field_fmt_466_467_3_3_info, field_fmt_466_467_3_3_set, field_fmt_466_467_3_3_get, NULL, 0}, - {"MULTICAST",1, field_fmt_468_468_3_3_info, field_fmt_468_468_3_3_set, field_fmt_468_468_3_3_get, NULL, 0}, - {"IP_ROUTED",1, field_fmt_469_469_3_3_info, field_fmt_469_469_3_3_set, field_fmt_469_469_3_3_get, NULL, 0}, - {"COPY_TO_CPU",1, field_fmt_470_470_3_3_info, field_fmt_470_470_3_3_set, field_fmt_470_470_3_3_get, NULL, 0}, - {"RX_CHIP_PORT",1, field_fmt_471_479_3_3_info, field_fmt_471_479_3_3_set, field_fmt_471_479_3_3_get, NULL, 0}, - {"ARC_ID_LO",1, field_fmt_480_511_2_2_info, field_fmt_480_511_2_2_set, field_fmt_480_511_2_2_get, NULL, 0}, - {"ARC_ID_HI",1, field_fmt_512_527_1_1_info, field_fmt_512_527_1_1_set, field_fmt_512_527_1_1_get, NULL, 0}, - {"REPLICATION_OR_NHOP_INDEX",1, field_fmt_528_543_1_1_info, field_fmt_528_543_1_1_set, field_fmt_528_543_1_1_get, NULL, 0}, - {"DMA_HEADER_VERSION",1, field_fmt_544_545_0_0_info, field_fmt_544_545_0_0_set, field_fmt_544_545_0_0_get, NULL, 0}, - {"QUEUE_NUM",1, field_fmt_546_551_0_0_info, field_fmt_546_551_0_0_set, field_fmt_546_551_0_0_get, NULL, 0}, - {"TRUNCATE_CPU_COPY",1, field_fmt_552_552_0_0_info, field_fmt_552_552_0_0_set, field_fmt_552_552_0_0_get, NULL, 0}, - {"EGR_ZONE_REMAP_CTRL",1, field_fmt_553_556_0_0_info, field_fmt_553_556_0_0_set, field_fmt_553_556_0_0_get, NULL, 0}, - {"SWITCH",1, field_fmt_557_557_0_0_info, field_fmt_557_557_0_0_set, field_fmt_557_557_0_0_get, NULL, 0}, - {"L3ONLY",1, field_fmt_558_558_0_0_info, field_fmt_558_558_0_0_set, field_fmt_558_558_0_0_get, NULL, 0}, - {"NONSW_COPY",1, field_fmt_559_559_0_0_info, field_fmt_559_559_0_0_set, field_fmt_559_559_0_0_get, NULL, 0}, - {"PKT_LENGTH",1, field_fmt_560_575_0_0_info, field_fmt_560_575_0_0_set, field_fmt_560_575_0_0_get, NULL, 0}, - -}; - -static const shr_enum_map_t bcm78920_a0_rxpmd_names[] = -{ - BCM78920_A0_RXPMD_NAME_MAP_INIT -}; - -bcmpkt_pmd_info_t bcm78920_a0_rxpmd_info_get(void) -{ - bcmpkt_pmd_info_t bcm78920_a0_rxpmd_info = {18, BCM78920_A0_RXPMD_COUNT, bcm78920_a0_rxpmd_names, bcm78920_a0_rxpmd_fields}; - return bcm78920_a0_rxpmd_info; -} - -bcmpkt_pmd_info_t bcm78920_a0_rx_reason_info_get(void) -{ - bcmpkt_pmd_info_t bcm78920_a0_rx_reason_info = {0, 0, NULL, NULL}; - return bcm78920_a0_rx_reason_info; -} - -bcmpkt_pmd_info_t bcm78920_a0_ep_rx_reason_info_get(void) -{ - bcmpkt_pmd_info_t bcm78920_a0_ep_rx_reason_info = {0, 0, NULL, NULL}; - return bcm78920_a0_ep_rx_reason_info; -} - -static const shr_enum_map_t bcm78920_a0_txpmd_aux_sobmh_header_type_names[] = -{ - BCM78920_A0_TXPMD_AUX_SOBMH_HEADER_TYPE_NAME_MAP_INIT -}; - -static const shr_enum_map_t bcm78920_a0_txpmd_aux_sobmh_start_names[] = -{ - BCM78920_A0_TXPMD_AUX_SOBMH_START_NAME_MAP_INIT -}; - -static const shr_enum_map_t bcm78920_a0_txpmd_cpu_tx_inca_ice_data_format_names[] = -{ - BCM78920_A0_TXPMD_CPU_TX_INCA_ICE_DATA_FORMAT_NAME_MAP_INIT -}; - -static const shr_enum_map_t bcm78920_a0_txpmd_cpu_tx_destination_type_names[] = -{ - BCM78920_A0_TXPMD_CPU_TX_DESTINATION_TYPE_NAME_MAP_INIT -}; - -static const shr_enum_map_t bcm78920_a0_txpmd_cpu_tx_inca_ice_oper_type_names[] = -{ - BCM78920_A0_TXPMD_CPU_TX_INCA_ICE_OPER_TYPE_NAME_MAP_INIT -}; - -static bcmpkt_pmd_field_t bcm78920_a0_txpmd_fields[BCM78920_A0_TXPMD_COUNT] = { - {"CPU_TX::INCA_GROUP_ID",1, field_fmt_0_4_7_7_info, field_fmt_0_4_7_7_set, field_fmt_0_4_7_7_get, NULL, 0}, - {"IEEE1588_INGRESS_TIMESTAMP_SIGN",1, field_fmt_0_0_7_7_info, field_fmt_0_0_7_7_set, field_fmt_0_0_7_7_get, NULL, 0}, - {"IEEE1588_ONE_STEP_ENABLE",1, field_fmt_0_0_7_7_info, field_fmt_0_0_7_7_set, field_fmt_0_0_7_7_get, NULL, 0}, - {"IEEE1588_REGEN_UDP_CHECKSUM",1, field_fmt_0_0_7_7_info, field_fmt_0_0_7_7_set, field_fmt_0_0_7_7_get, NULL, 0}, - {"IEEE1588_TIMESTAMP_HDR_OFFSET",1, field_fmt_0_0_7_7_info, field_fmt_0_0_7_7_set, field_fmt_0_0_7_7_get, NULL, 0}, - {"AUX_SOBMH::UNICAST",1, field_fmt_184_184_2_2_info, field_fmt_184_184_2_2_set, field_fmt_184_184_2_2_get, NULL, 0}, - {"AUX_SOBMH::RQE_Q_NUM",1, field_fmt_186_189_2_2_info, field_fmt_186_189_2_2_set, field_fmt_186_189_2_2_get, NULL, 0}, - {"AUX_SOBMH::TX_CHIP_PORT",1, field_fmt_198_206_1_1_info, field_fmt_198_206_1_1_set, field_fmt_198_206_1_1_get, NULL, 0}, - {"AUX_SOBMH::RX_CHIP_PORT",1, field_fmt_207_215_1_1_info, field_fmt_207_215_1_1_set, field_fmt_207_215_1_1_get, NULL, 0}, - {"AUX_SOBMH::HEADER_TYPE",1, field_fmt_248_253_0_0_info, field_fmt_248_253_0_0_set, field_fmt_248_253_0_0_get, bcm78920_a0_txpmd_aux_sobmh_header_type_names, 0}, - {"AUX_SOBMH::START",1, field_fmt_254_255_0_0_info, field_fmt_254_255_0_0_set, field_fmt_254_255_0_0_get, bcm78920_a0_txpmd_aux_sobmh_start_names, 0}, - {"CPU_TX::AR_GROUP",1, field_fmt_0_6_7_7_info, field_fmt_0_6_7_7_set, field_fmt_0_6_7_7_get, NULL, 0}, - {"CPU_TX::INCA_INTERNAL_QP_ID",1, field_fmt_6_7_7_7_info, field_fmt_6_7_7_7_set, field_fmt_6_7_7_7_get, NULL, 0}, - {"CPU_TX::VRF",1, field_fmt_8_15_7_7_info, field_fmt_8_15_7_7_set, field_fmt_8_15_7_7_get, NULL, 0}, - {"CPU_TX::INCA_SRC_HOST_PROFILE",1, field_fmt_8_14_7_7_info, field_fmt_8_14_7_7_set, field_fmt_8_14_7_7_get, NULL, 0}, - {"CPU_TX::INCA_FLOW_TYPE",1, field_fmt_16_17_7_7_info, field_fmt_16_17_7_7_set, field_fmt_16_17_7_7_get, NULL, 0}, - {"CPU_TX::INCA_REPL_REQD",1, field_fmt_18_18_7_7_info, field_fmt_18_18_7_7_set, field_fmt_18_18_7_7_get, NULL, 0}, - {"CPU_TX::INCA_SECOND_PASS_DEST",1, field_fmt_20_28_7_7_info, field_fmt_20_28_7_7_set, field_fmt_20_28_7_7_get, NULL, 0}, - {"CPU_TX::VLAN_PROFILE",1, field_fmt_36_39_6_6_info, field_fmt_36_39_6_6_set, field_fmt_36_39_6_6_get, NULL, 0}, - {"CPU_TX::INCA_ICE_DATA_FORMAT",1, field_fmt_38_41_6_6_info, field_fmt_38_41_6_6_set, field_fmt_38_41_6_6_get, bcm78920_a0_txpmd_cpu_tx_inca_ice_data_format_names, 0}, - {"CPU_TX::FWD_PROFILE",1, field_fmt_40_43_6_6_info, field_fmt_40_43_6_6_set, field_fmt_40_43_6_6_get, NULL, 0}, - {"CPU_TX::INCA_ICE_DATA_OFFSET",1, field_fmt_42_47_6_6_info, field_fmt_42_47_6_6_set, field_fmt_42_47_6_6_get, NULL, 0}, - {"CPU_TX::VPP_TO_LPP_CLASS_ID",1, field_fmt_44_47_6_6_info, field_fmt_44_47_6_6_set, field_fmt_44_47_6_6_get, NULL, 0}, - {"CPU_TX::DESTINATION_TYPE",1, field_fmt_60_63_6_6_info, field_fmt_60_63_6_6_set, field_fmt_60_63_6_6_get, bcm78920_a0_txpmd_cpu_tx_destination_type_names, 0}, - {"CPU_TX::CNG",1, field_fmt_68_69_5_5_info, field_fmt_68_69_5_5_set, field_fmt_68_69_5_5_get, NULL, 0}, - {"CPU_TX::INT_CN",1, field_fmt_70_71_5_5_info, field_fmt_70_71_5_5_set, field_fmt_70_71_5_5_get, NULL, 0}, - {"COOKIE_7_0",1, field_fmt_73_80_5_5_info, field_fmt_73_80_5_5_set, field_fmt_73_80_5_5_get, NULL, 0}, - {"CPU_TX::SRC_PORT_NUM",1, field_fmt_80_88_5_5_info, field_fmt_80_88_5_5_set, field_fmt_80_88_5_5_get, NULL, 0}, - {"COOKIE_8",1, field_fmt_81_81_5_5_info, field_fmt_81_81_5_5_set, field_fmt_81_81_5_5_get, NULL, 0}, - {"WRED_RESPONSIVE",1, field_fmt_94_94_5_5_info, field_fmt_94_94_5_5_set, field_fmt_94_94_5_5_get, NULL, 0}, - {"WRED_MARK_ELIGIBLE",1, field_fmt_95_95_5_5_info, field_fmt_95_95_5_5_set, field_fmt_95_95_5_5_get, NULL, 0}, - {"SPID_OVERRIDE",1, field_fmt_96_96_4_4_info, field_fmt_96_96_4_4_set, field_fmt_96_96_4_4_get, NULL, 0}, - {"INPUT_PRI",1, field_fmt_99_102_4_4_info, field_fmt_99_102_4_4_set, field_fmt_99_102_4_4_get, NULL, 0}, - {"SWITCH_COPY",1, field_fmt_103_103_4_4_info, field_fmt_103_103_4_4_set, field_fmt_103_103_4_4_get, NULL, 0}, - {"SWITCH_COPY_TYPE",1, field_fmt_104_104_4_4_info, field_fmt_104_104_4_4_set, field_fmt_104_104_4_4_get, NULL, 0}, - {"AUX_SOBMH::SOP",1, field_fmt_138_138_3_3_info, field_fmt_138_138_3_3_set, field_fmt_138_138_3_3_get, NULL, 0}, - {"AUX_SOBMH::PKT_LENGTH",1, field_fmt_139_152_3_3_info, field_fmt_139_152_3_3_set, field_fmt_139_152_3_3_get, NULL, 0}, - {"AUX_SOBMH::COPY_TO_CPU",1, field_fmt_153_153_3_3_info, field_fmt_153_153_3_3_set, field_fmt_153_153_3_3_get, NULL, 0}, - {"AUX_SOBMH::COPY_TO_DEBUG",1, field_fmt_154_154_3_3_info, field_fmt_154_154_3_3_set, field_fmt_154_154_3_3_get, NULL, 0}, - {"AUX_SOBMH::UNICAST_PKT",1, field_fmt_183_183_2_2_info, field_fmt_183_183_2_2_set, field_fmt_183_183_2_2_get, NULL, 0}, - {"AUX_SOBMH::CELL_ERROR",1, field_fmt_197_197_1_1_info, field_fmt_197_197_1_1_set, field_fmt_197_197_1_1_get, NULL, 0}, - {"CPU_TX::INCA_COLLECTIVE_ID",1, field_fmt_5_5_7_7_info, field_fmt_5_5_7_7_set, field_fmt_5_5_7_7_get, NULL, 0}, - {"CPU_TX::COOKIE",1, field_fmt_23_31_7_7_info, field_fmt_23_31_7_7_set, field_fmt_23_31_7_7_get, NULL, 0}, - {"CPU_TX::DESTINATION",1, field_fmt_48_59_6_6_info, field_fmt_48_59_6_6_set, field_fmt_48_59_6_6_get, NULL, 0}, - {"CPU_TX::INT_PRI",1, field_fmt_64_67_5_5_info, field_fmt_64_67_5_5_set, field_fmt_64_67_5_5_get, NULL, 0}, - {"CPU_TX::PKT_CTRL_PROFILE",1, field_fmt_92_95_5_5_info, field_fmt_92_95_5_5_set, field_fmt_92_95_5_5_get, NULL, 0}, - {"CPU_TX::INPUT_PRI",1, field_fmt_104_107_4_4_info, field_fmt_104_107_4_4_set, field_fmt_104_107_4_4_get, NULL, 0}, - {"SWITCH_COPY_DEST_PORT",1, field_fmt_105_113_4_4_info, field_fmt_105_113_4_4_set, field_fmt_105_113_4_4_get, NULL, 0}, - {"CPU_TX::COS_VALID",1, field_fmt_112_112_4_4_info, field_fmt_112_112_4_4_set, field_fmt_112_112_4_4_get, NULL, 0}, - {"CPU_TX::VRF_VALID",1, field_fmt_113_113_4_4_info, field_fmt_113_113_4_4_set, field_fmt_113_113_4_4_get, NULL, 0}, - {"CPU_TX::ROUTED_PKT",1, field_fmt_114_114_4_4_info, field_fmt_114_114_4_4_set, field_fmt_114_114_4_4_get, NULL, 0}, - {"CPU_TX::DOP_TRIGGER",1, field_fmt_119_119_4_4_info, field_fmt_119_119_4_4_set, field_fmt_119_119_4_4_get, NULL, 0}, - {"HEADER_TYPE",1, field_fmt_120_125_4_4_info, field_fmt_120_125_4_4_set, field_fmt_120_125_4_4_get, NULL, 0}, - {"START",1, field_fmt_126_127_4_4_info, field_fmt_126_127_4_4_set, field_fmt_126_127_4_4_get, NULL, 0}, - {"AUX_SOBMH::CELL_LENGTH",1, field_fmt_128_136_3_3_info, field_fmt_128_136_3_3_set, field_fmt_128_136_3_3_get, NULL, 0}, - {"AUX_SOBMH::COS",1, field_fmt_177_182_2_2_info, field_fmt_177_182_2_2_set, field_fmt_177_182_2_2_get, NULL, 0}, - {"AUX_SOBMH::TX_VPP_PORT",1, field_fmt_194_196_1_1_info, field_fmt_194_196_1_1_set, field_fmt_194_196_1_1_get, NULL, 0}, - {"CPU_TX::INCA_REDN_REQD",1, field_fmt_19_19_7_7_info, field_fmt_19_19_7_7_set, field_fmt_19_19_7_7_get, NULL, 0}, - {"CPU_TX::INCA_ICE_OPER_TYPE",1, field_fmt_34_37_6_6_info, field_fmt_34_37_6_6_set, field_fmt_34_37_6_6_get, bcm78920_a0_txpmd_cpu_tx_inca_ice_oper_type_names, 0}, - {"SPID",1, field_fmt_97_98_4_4_info, field_fmt_97_98_4_4_set, field_fmt_97_98_4_4_get, NULL, 0}, - {"CPU_TX::INT_PRI_VALID",1, field_fmt_108_108_4_4_info, field_fmt_108_108_4_4_set, field_fmt_108_108_4_4_get, NULL, 0}, - {"CPU_TX::CNG_VALID",1, field_fmt_109_109_4_4_info, field_fmt_109_109_4_4_set, field_fmt_109_109_4_4_get, NULL, 0}, - {"CPU_TX::INT_CN_VALID",1, field_fmt_110_110_4_4_info, field_fmt_110_110_4_4_set, field_fmt_110_110_4_4_get, NULL, 0}, - {"CPU_TX::INPUT_PRI_VALID",1, field_fmt_111_111_4_4_info, field_fmt_111_111_4_4_set, field_fmt_111_111_4_4_get, NULL, 0}, - {"SWITCH_COPY_COS",1, field_fmt_114_117_4_4_info, field_fmt_114_117_4_4_set, field_fmt_114_117_4_4_get, NULL, 0}, - {"CPU_TX::CPU_TX_TYPE",1, field_fmt_116_118_4_4_info, field_fmt_116_118_4_4_set, field_fmt_116_118_4_4_get, NULL, 0}, - {"CNG",1, field_fmt_118_118_4_4_info, field_fmt_118_118_4_4_set, field_fmt_118_118_4_4_get, NULL, 0}, - {"CELL_ERROR",1, field_fmt_119_119_4_4_info, field_fmt_119_119_4_4_set, field_fmt_119_119_4_4_get, NULL, 0}, - {"AUX_SOBMH::EOP",1, field_fmt_137_137_3_3_info, field_fmt_137_137_3_3_set, field_fmt_137_137_3_3_get, NULL, 0}, - {"AUX_SOBMH::CNG",1, field_fmt_175_176_2_2_info, field_fmt_175_176_2_2_set, field_fmt_175_176_2_2_get, NULL, 0}, - {"AUX_SOBMH::SET_L2BM",1, field_fmt_185_185_2_2_info, field_fmt_185_185_2_2_set, field_fmt_185_185_2_2_get, NULL, 0}, - {"AUX_SOBMH::INPUT_PRI",1, field_fmt_190_193_2_1_info, field_fmt_190_193_2_1_set, field_fmt_190_193_2_1_get, NULL, 0}, - {"CPU_TX::PACKET_ENTROPY",1, field_fmt_72_79_5_5_info, field_fmt_72_79_5_5_set, field_fmt_72_79_5_5_get, NULL, 0}, - {"CPU_TX::COS",1, field_fmt_96_99_4_4_info, field_fmt_96_99_4_4_set, field_fmt_96_99_4_4_get, NULL, 0}, - -}; - -static const shr_enum_map_t bcm78920_a0_txpmd_names[] = -{ - BCM78920_A0_TXPMD_NAME_MAP_INIT -}; - -bcmpkt_pmd_info_t bcm78920_a0_txpmd_info_get(void) -{ - bcmpkt_pmd_info_t bcm78920_a0_txpmd_info = {8, BCM78920_A0_TXPMD_COUNT, bcm78920_a0_txpmd_names, bcm78920_a0_txpmd_fields}; - return bcm78920_a0_txpmd_info; -} - -bcmpkt_pmd_info_t bcm78920_a0_lbhdr_info_get(void) -{ - bcmpkt_pmd_info_t bcm78920_a0_lbhdr_info = {0, 0, NULL, NULL}; - return bcm78920_a0_lbhdr_info; -} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm78910_a0/bcm78910_a0_pmd_field.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm78910_a0/bcm78910_a0_pmd_field.h deleted file mode 100644 index 3d07321e56b..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm78910_a0/bcm78910_a0_pmd_field.h +++ /dev/null @@ -1,538 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated from the registers file. - * Edits to this file will be lost when it is regenerated. - * Tool: INTERNAL/regs/xgs/generate-pmd.pl - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - * This file provides PMD field defines for BCM78910_A0. - * - ******************************************************************************/ - -#ifndef BCM78910_A0_PMD_FIELD_H -#define BCM78910_A0_PMD_FIELD_H - -/* RXPMD defines */ -#define BCM78910_A0_RXPMD_REASON 0 -#define BCM78910_A0_RXPMD_REASON_TYPE 1 -#define BCM78910_A0_RXPMD_I2E_CLASSID 2 -#define BCM78910_A0_RXPMD_RX_BFD_SESSION_INDEX 3 -#define BCM78910_A0_RXPMD_I2E_CLASSID_TYPE 4 -#define BCM78910_A0_RXPMD_RX_BFD_START_OFFSET_TYPE 5 -#define BCM78910_A0_RXPMD_RX_BFD_START_OFFSET 6 -#define BCM78910_A0_RXPMD_CPU_COS 7 -#define BCM78910_A0_RXPMD_QUEUE_NUM 8 -#define BCM78910_A0_RXPMD_ING_L3_INTF 9 -#define BCM78910_A0_RXPMD_INCOMING_TAG_STATUS 10 -#define BCM78910_A0_RXPMD_ING_OTAG_ACTION 11 -#define BCM78910_A0_RXPMD_PKT_LENGTH 12 -#define BCM78910_A0_RXPMD_O_NHI 13 -#define BCM78910_A0_RXPMD_INCOMING_OPAQUE_TAG_STATUS 14 -#define BCM78910_A0_RXPMD_BPDU 15 -#define BCM78910_A0_RXPMD_CHANGE_DSCP 16 -#define BCM78910_A0_RXPMD_CHANGE_ECN 17 -#define BCM78910_A0_RXPMD_DLB_ID_VALID 18 -#define BCM78910_A0_RXPMD_DO_NOT_CHANGE_TTL 19 -#define BCM78910_A0_RXPMD_DSCP 20 -#define BCM78910_A0_RXPMD_SPECIAL_PACKET_TYPE 21 -#define BCM78910_A0_RXPMD_ECN 22 -#define BCM78910_A0_RXPMD_IP_ROUTED 23 -#define BCM78910_A0_RXPMD_L3ONLY 24 -#define BCM78910_A0_RXPMD_MATCHED_RULE 25 -#define BCM78910_A0_RXPMD_MATCHED_RULE_EP 26 -#define BCM78910_A0_RXPMD_IS_EGR_TS 27 -#define BCM78910_A0_RXPMD_MTP_INDEX 28 -#define BCM78910_A0_RXPMD_OUTER_CFI 29 -#define BCM78910_A0_RXPMD_OUTER_PRI 30 -#define BCM78910_A0_RXPMD_OUTER_VID 31 -#define BCM78910_A0_RXPMD_REPLICATION_OR_NHOP_INDEX 32 -#define BCM78910_A0_RXPMD_MODIFIED_PKT 33 -#define BCM78910_A0_RXPMD_ENTROPY_LABEL 34 -#define BCM78910_A0_RXPMD_SPECIAL_PACKET_INDICATOR 35 -#define BCM78910_A0_RXPMD_SRC_PORT_NUM 36 -#define BCM78910_A0_RXPMD_SWITCH 37 -#define BCM78910_A0_RXPMD_TIMESTAMP 38 -#define BCM78910_A0_RXPMD_TIMESTAMP_HI 39 -#define BCM78910_A0_RXPMD_IEEE_802_1AS_TIMESTAMP_ENABLED 40 -#define BCM78910_A0_RXPMD_TUNNEL_DECAP_TYPE 41 -#define BCM78910_A0_RXPMD_UC_SW_COPY_DROPPED 42 -#define BCM78910_A0_RXPMD_UNICAST_QUEUE 43 -#define BCM78910_A0_RXPMD_INCOMING_INT_HDR_TYPE 44 -#define BCM78910_A0_RXPMD_DLB_ID 45 -#define BCM78910_A0_RXPMD_MODULE_HDR 46 -#define BCM78910_A0_RXPMD_COUNT 47 - -/* RXPMD name map */ -#define BCM78910_A0_RXPMD_NAME_MAP_INIT \ - {"REASON", BCM78910_A0_RXPMD_REASON}, \ - {"REASON_TYPE", BCM78910_A0_RXPMD_REASON_TYPE}, \ - {"I2E_CLASSID", BCM78910_A0_RXPMD_I2E_CLASSID}, \ - {"RX_BFD_SESSION_INDEX", BCM78910_A0_RXPMD_RX_BFD_SESSION_INDEX}, \ - {"I2E_CLASSID_TYPE", BCM78910_A0_RXPMD_I2E_CLASSID_TYPE}, \ - {"RX_BFD_START_OFFSET_TYPE", BCM78910_A0_RXPMD_RX_BFD_START_OFFSET_TYPE}, \ - {"RX_BFD_START_OFFSET", BCM78910_A0_RXPMD_RX_BFD_START_OFFSET}, \ - {"CPU_COS", BCM78910_A0_RXPMD_CPU_COS}, \ - {"QUEUE_NUM", BCM78910_A0_RXPMD_QUEUE_NUM}, \ - {"ING_L3_INTF", BCM78910_A0_RXPMD_ING_L3_INTF}, \ - {"INCOMING_TAG_STATUS", BCM78910_A0_RXPMD_INCOMING_TAG_STATUS}, \ - {"ING_OTAG_ACTION", BCM78910_A0_RXPMD_ING_OTAG_ACTION}, \ - {"PKT_LENGTH", BCM78910_A0_RXPMD_PKT_LENGTH}, \ - {"O_NHI", BCM78910_A0_RXPMD_O_NHI}, \ - {"INCOMING_OPAQUE_TAG_STATUS", BCM78910_A0_RXPMD_INCOMING_OPAQUE_TAG_STATUS}, \ - {"BPDU", BCM78910_A0_RXPMD_BPDU}, \ - {"CHANGE_DSCP", BCM78910_A0_RXPMD_CHANGE_DSCP}, \ - {"CHANGE_ECN", BCM78910_A0_RXPMD_CHANGE_ECN}, \ - {"DLB_ID_VALID", BCM78910_A0_RXPMD_DLB_ID_VALID}, \ - {"DO_NOT_CHANGE_TTL", BCM78910_A0_RXPMD_DO_NOT_CHANGE_TTL}, \ - {"DSCP", BCM78910_A0_RXPMD_DSCP}, \ - {"SPECIAL_PACKET_TYPE", BCM78910_A0_RXPMD_SPECIAL_PACKET_TYPE}, \ - {"ECN", BCM78910_A0_RXPMD_ECN}, \ - {"IP_ROUTED", BCM78910_A0_RXPMD_IP_ROUTED}, \ - {"L3ONLY", BCM78910_A0_RXPMD_L3ONLY}, \ - {"MATCHED_RULE", BCM78910_A0_RXPMD_MATCHED_RULE}, \ - {"MATCHED_RULE_EP", BCM78910_A0_RXPMD_MATCHED_RULE_EP}, \ - {"IS_EGR_TS", BCM78910_A0_RXPMD_IS_EGR_TS}, \ - {"MTP_INDEX", BCM78910_A0_RXPMD_MTP_INDEX}, \ - {"OUTER_CFI", BCM78910_A0_RXPMD_OUTER_CFI}, \ - {"OUTER_PRI", BCM78910_A0_RXPMD_OUTER_PRI}, \ - {"OUTER_VID", BCM78910_A0_RXPMD_OUTER_VID}, \ - {"REPLICATION_OR_NHOP_INDEX", BCM78910_A0_RXPMD_REPLICATION_OR_NHOP_INDEX}, \ - {"MODIFIED_PKT", BCM78910_A0_RXPMD_MODIFIED_PKT}, \ - {"ENTROPY_LABEL", BCM78910_A0_RXPMD_ENTROPY_LABEL}, \ - {"SPECIAL_PACKET_INDICATOR", BCM78910_A0_RXPMD_SPECIAL_PACKET_INDICATOR}, \ - {"SRC_PORT_NUM", BCM78910_A0_RXPMD_SRC_PORT_NUM}, \ - {"SWITCH", BCM78910_A0_RXPMD_SWITCH}, \ - {"TIMESTAMP", BCM78910_A0_RXPMD_TIMESTAMP}, \ - {"TIMESTAMP_HI", BCM78910_A0_RXPMD_TIMESTAMP_HI}, \ - {"IEEE_802_1AS_TIMESTAMP_ENABLED", BCM78910_A0_RXPMD_IEEE_802_1AS_TIMESTAMP_ENABLED}, \ - {"TUNNEL_DECAP_TYPE", BCM78910_A0_RXPMD_TUNNEL_DECAP_TYPE}, \ - {"UC_SW_COPY_DROPPED", BCM78910_A0_RXPMD_UC_SW_COPY_DROPPED}, \ - {"UNICAST_QUEUE", BCM78910_A0_RXPMD_UNICAST_QUEUE}, \ - {"INCOMING_INT_HDR_TYPE", BCM78910_A0_RXPMD_INCOMING_INT_HDR_TYPE}, \ - {"DLB_ID", BCM78910_A0_RXPMD_DLB_ID}, \ - {"MODULE_HDR", BCM78910_A0_RXPMD_MODULE_HDR}, \ - {"COUNT", BCM78910_A0_RXPMD_COUNT} - -/*! - * \name BCM78910_A0_RXPMD_REASON_TYPE encodings. - * \anchor BCM78910_A0_RXPMD_REASON_TYPE_XXX - */ -/*! \{ */ -#define BCM78910_A0_RXPMD_REASON_TYPE_CTC_INITIATED_FROM_IP 0 -#define BCM78910_A0_RXPMD_REASON_TYPE_CTC_INITIATED_FROM_EP 1 -/*! \} */ - -/*! BCM78910_A0_RXPMD_REASON_TYPE encoding name strings maps. */ -#define BCM78910_A0_RXPMD_REASON_TYPE_NAME_MAP_INIT \ - {"CTC_INITIATED_FROM_IP", BCM78910_A0_RXPMD_REASON_TYPE_CTC_INITIATED_FROM_IP},\ - {"CTC_INITIATED_FROM_EP", BCM78910_A0_RXPMD_REASON_TYPE_CTC_INITIATED_FROM_EP},\ - {NULL, 0} - -/* RX_REASON defines */ -#define BCM78910_A0_RX_REASON_CPU_INVALID_REASON 0 -#define BCM78910_A0_RX_REASON_CPU_SLF 1 -#define BCM78910_A0_RX_REASON_CPU_DLF 2 -#define BCM78910_A0_RX_REASON_CPU_L2MOVE 3 -#define BCM78910_A0_RX_REASON_CPU_L2CPU 4 -#define BCM78910_A0_RX_REASON_CPU_L3SRC_MISS 5 -#define BCM78910_A0_RX_REASON_CPU_L3DST_MISS 6 -#define BCM78910_A0_RX_REASON_CPU_L3SRC_MOVE 7 -#define BCM78910_A0_RX_REASON_CPU_MC_MISS 8 -#define BCM78910_A0_RX_REASON_CPU_IPMC_MISS 9 -#define BCM78910_A0_RX_REASON_CPU_FFP 10 -#define BCM78910_A0_RX_REASON_CPU_L3HDR_ERR 11 -#define BCM78910_A0_RX_REASON_CPU_PROTOCOL_PKT 12 -#define BCM78910_A0_RX_REASON_CPU_DOS_ATTACK 13 -#define BCM78910_A0_RX_REASON_CPU_MARTIAN_ADDR 14 -#define BCM78910_A0_RX_REASON_CPU_TUNNEL_ERR 15 -#define BCM78910_A0_RX_REASON_CPU_SFLOW_SRC 16 -#define BCM78910_A0_RX_REASON_CPU_SFLOW_DST 17 -#define BCM78910_A0_RX_REASON_ICMP_REDIRECT 18 -#define BCM78910_A0_RX_REASON_L3_SLOWPATH 19 -#define BCM78910_A0_RX_REASON_PARITY_ERROR 20 -#define BCM78910_A0_RX_REASON_L3_MTU_CHECK_FAIL 21 -#define BCM78910_A0_RX_REASON_MPLS_TTL_CHECK 22 -#define BCM78910_A0_RX_REASON_MPLS_LABEL_MISS 23 -#define BCM78910_A0_RX_REASON_MPLS_INVALID_ACTION 24 -#define BCM78910_A0_RX_REASON_MPLS_INVALID_PAYLOAD 25 -#define BCM78910_A0_RX_REASON_CPU_VFP 26 -#define BCM78910_A0_RX_REASON_PBT_NONUC_PKT 27 -#define BCM78910_A0_RX_REASON_L3_NEXT_HOP 28 -#define BCM78910_A0_RX_REASON_MY_STATION 29 -#define BCM78910_A0_RX_REASON_TIME_SYNC 30 -#define BCM78910_A0_RX_REASON_TUNNEL_DECAP_ECN_ERROR 31 -#define BCM78910_A0_RX_REASON_BFD_SLOWPATH 32 -#define BCM78910_A0_RX_REASON_BFD_ERROR 33 -#define BCM78910_A0_RX_REASON_PACKET_TRACE_TO_CPU 34 -#define BCM78910_A0_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT 35 -#define BCM78910_A0_RX_REASON_MPLS_ALERT_LABEL 36 -#define BCM78910_A0_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH 37 -#define BCM78910_A0_RX_REASON_DLB_MONITOR 38 -#define BCM78910_A0_RX_REASON_CPU_SFLOW_FLEX 39 -#define BCM78910_A0_RX_REASON_CPU_UVLAN 40 -#define BCM78910_A0_RX_REASON_SRV6_ERROR 41 -#define BCM78910_A0_RX_REASON_VXLAN_VN_ID_MISS 42 -#define BCM78910_A0_RX_REASON_VXLAN_SIP_MISS 43 -#define BCM78910_A0_RX_REASON_ADAPT_MISS 44 -#define BCM78910_A0_RX_REASON_INVALID_GSH_NON_GSH 45 -#define BCM78910_A0_RX_REASON_APU_POLICY_CTC 46 -#define BCM78910_A0_RX_REASON_DELAYED_CTC 47 -#define BCM78910_A0_RX_REASON_PORT_DOWN 48 -#define BCM78910_A0_RX_REASON_SRV6_CONTROL_PKT 49 -#define BCM78910_A0_RX_REASON_OUI_COMPRESSION_MISS 50 -#define BCM78910_A0_RX_REASON_COUNT 51 - -/* RX_REASON name map */ -#define BCM78910_A0_RX_REASON_NAME_MAP_INIT \ - {"CPU_INVALID_REASON", BCM78910_A0_RX_REASON_CPU_INVALID_REASON}, \ - {"CPU_SLF", BCM78910_A0_RX_REASON_CPU_SLF}, \ - {"CPU_DLF", BCM78910_A0_RX_REASON_CPU_DLF}, \ - {"CPU_L2MOVE", BCM78910_A0_RX_REASON_CPU_L2MOVE}, \ - {"CPU_L2CPU", BCM78910_A0_RX_REASON_CPU_L2CPU}, \ - {"CPU_L3SRC_MISS", BCM78910_A0_RX_REASON_CPU_L3SRC_MISS}, \ - {"CPU_L3DST_MISS", BCM78910_A0_RX_REASON_CPU_L3DST_MISS}, \ - {"CPU_L3SRC_MOVE", BCM78910_A0_RX_REASON_CPU_L3SRC_MOVE}, \ - {"CPU_MC_MISS", BCM78910_A0_RX_REASON_CPU_MC_MISS}, \ - {"CPU_IPMC_MISS", BCM78910_A0_RX_REASON_CPU_IPMC_MISS}, \ - {"CPU_FFP", BCM78910_A0_RX_REASON_CPU_FFP}, \ - {"CPU_L3HDR_ERR", BCM78910_A0_RX_REASON_CPU_L3HDR_ERR}, \ - {"CPU_PROTOCOL_PKT", BCM78910_A0_RX_REASON_CPU_PROTOCOL_PKT}, \ - {"CPU_DOS_ATTACK", BCM78910_A0_RX_REASON_CPU_DOS_ATTACK}, \ - {"CPU_MARTIAN_ADDR", BCM78910_A0_RX_REASON_CPU_MARTIAN_ADDR}, \ - {"CPU_TUNNEL_ERR", BCM78910_A0_RX_REASON_CPU_TUNNEL_ERR}, \ - {"CPU_SFLOW_SRC", BCM78910_A0_RX_REASON_CPU_SFLOW_SRC}, \ - {"CPU_SFLOW_DST", BCM78910_A0_RX_REASON_CPU_SFLOW_DST}, \ - {"ICMP_REDIRECT", BCM78910_A0_RX_REASON_ICMP_REDIRECT}, \ - {"L3_SLOWPATH", BCM78910_A0_RX_REASON_L3_SLOWPATH}, \ - {"PARITY_ERROR", BCM78910_A0_RX_REASON_PARITY_ERROR}, \ - {"L3_MTU_CHECK_FAIL", BCM78910_A0_RX_REASON_L3_MTU_CHECK_FAIL}, \ - {"MPLS_TTL_CHECK", BCM78910_A0_RX_REASON_MPLS_TTL_CHECK}, \ - {"MPLS_LABEL_MISS", BCM78910_A0_RX_REASON_MPLS_LABEL_MISS}, \ - {"MPLS_INVALID_ACTION", BCM78910_A0_RX_REASON_MPLS_INVALID_ACTION}, \ - {"MPLS_INVALID_PAYLOAD", BCM78910_A0_RX_REASON_MPLS_INVALID_PAYLOAD}, \ - {"CPU_VFP", BCM78910_A0_RX_REASON_CPU_VFP}, \ - {"PBT_NONUC_PKT", BCM78910_A0_RX_REASON_PBT_NONUC_PKT}, \ - {"L3_NEXT_HOP", BCM78910_A0_RX_REASON_L3_NEXT_HOP}, \ - {"MY_STATION", BCM78910_A0_RX_REASON_MY_STATION}, \ - {"TIME_SYNC", BCM78910_A0_RX_REASON_TIME_SYNC}, \ - {"TUNNEL_DECAP_ECN_ERROR", BCM78910_A0_RX_REASON_TUNNEL_DECAP_ECN_ERROR}, \ - {"BFD_SLOWPATH", BCM78910_A0_RX_REASON_BFD_SLOWPATH}, \ - {"BFD_ERROR", BCM78910_A0_RX_REASON_BFD_ERROR}, \ - {"PACKET_TRACE_TO_CPU", BCM78910_A0_RX_REASON_PACKET_TRACE_TO_CPU}, \ - {"MPLS_UNKNOWN_CONTROL_PKT", BCM78910_A0_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT}, \ - {"MPLS_ALERT_LABEL", BCM78910_A0_RX_REASON_MPLS_ALERT_LABEL}, \ - {"CPU_IPMC_INTERFACE_MISMATCH", BCM78910_A0_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH}, \ - {"DLB_MONITOR", BCM78910_A0_RX_REASON_DLB_MONITOR}, \ - {"CPU_SFLOW_FLEX", BCM78910_A0_RX_REASON_CPU_SFLOW_FLEX}, \ - {"CPU_UVLAN", BCM78910_A0_RX_REASON_CPU_UVLAN}, \ - {"SRV6_ERROR", BCM78910_A0_RX_REASON_SRV6_ERROR}, \ - {"VXLAN_VN_ID_MISS", BCM78910_A0_RX_REASON_VXLAN_VN_ID_MISS}, \ - {"VXLAN_SIP_MISS", BCM78910_A0_RX_REASON_VXLAN_SIP_MISS}, \ - {"ADAPT_MISS", BCM78910_A0_RX_REASON_ADAPT_MISS}, \ - {"INVALID_GSH_NON_GSH", BCM78910_A0_RX_REASON_INVALID_GSH_NON_GSH}, \ - {"APU_POLICY_CTC", BCM78910_A0_RX_REASON_APU_POLICY_CTC}, \ - {"DELAYED_CTC", BCM78910_A0_RX_REASON_DELAYED_CTC}, \ - {"PORT_DOWN", BCM78910_A0_RX_REASON_PORT_DOWN}, \ - {"SRV6_CONTROL_PKT", BCM78910_A0_RX_REASON_SRV6_CONTROL_PKT}, \ - {"OUI_COMPRESSION_MISS", BCM78910_A0_RX_REASON_OUI_COMPRESSION_MISS}, \ - {"COUNT", BCM78910_A0_RX_REASON_COUNT} - -/* EP_RX_REASON defines */ -#define BCM78910_A0_EP_RX_REASON_EP_CTC 0 -#define BCM78910_A0_EP_RX_REASON_COUNT 1 - -/* EP_RX_REASON name map */ -#define BCM78910_A0_EP_RX_REASON_NAME_MAP_INIT \ - {"EP_CTC", BCM78910_A0_EP_RX_REASON_EP_CTC}, \ - {"COUNT", BCM78910_A0_EP_RX_REASON_COUNT} - -/* TXPMD defines */ -#define BCM78910_A0_TXPMD_CPU_TX_ECMP_MEMBER_ID 0 -#define BCM78910_A0_TXPMD_CPU_TX_MCAST_LB_INDEX 1 -#define BCM78910_A0_TXPMD_CPU_TX_COOKIE 2 -#define BCM78910_A0_TXPMD_CPU_TX_COOKIE_VALID 3 -#define BCM78910_A0_TXPMD_CPU_TX_DESTINATION 4 -#define BCM78910_A0_TXPMD_CPU_TX_DESTINATION_TYPE 5 -#define BCM78910_A0_TXPMD_CPU_TX_DP 6 -#define BCM78910_A0_TXPMD_CPU_TX_INPUT_PRI 7 -#define BCM78910_A0_TXPMD_CPU_TX_INT_CN 8 -#define BCM78910_A0_TXPMD_CPU_TX_INT_PRI 9 -#define BCM78910_A0_TXPMD_CPU_TX_MCAST_LB_INDEX_VLD 10 -#define BCM78910_A0_TXPMD_CPU_TX_PKT_PROFILE 11 -#define BCM78910_A0_TXPMD_CPU_TX_QOS_FIELDS_VLD 12 -#define BCM78910_A0_TXPMD_CPU_TX_ROUTED_PKT 13 -#define BCM78910_A0_TXPMD_CPU_TX_SVP 14 -#define BCM78910_A0_TXPMD_CPU_TX_VRF 15 -#define BCM78910_A0_TXPMD_CPU_TX_VRF_VALID 16 -#define BCM78910_A0_TXPMD_SOBMH_FROM_CPU_COOKIE_7_0 17 -#define BCM78910_A0_TXPMD_SOBMH_FROM_CPU_IEEE1588_TIMESTAMP_HDR_OFFSET 18 -#define BCM78910_A0_TXPMD_SOBMH_FROM_CPU_COOKIE_8 19 -#define BCM78910_A0_TXPMD_SOBMH_FROM_CPU_IEEE1588_REGEN_UDP_CHECKSUM 20 -#define BCM78910_A0_TXPMD_SOBMH_FROM_CPU_CELL_ERROR 21 -#define BCM78910_A0_TXPMD_SOBMH_FROM_CPU_CNG 22 -#define BCM78910_A0_TXPMD_SOBMH_FROM_CPU_COS 23 -#define BCM78910_A0_TXPMD_SOBMH_FROM_CPU_DESTINATION 24 -#define BCM78910_A0_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE 25 -#define BCM78910_A0_TXPMD_SOBMH_FROM_CPU_IEEE1588_INGRESS_TIMESTAMP_SIGN 26 -#define BCM78910_A0_TXPMD_SOBMH_FROM_CPU_IEEE1588_ONE_STEP_ENABLE 27 -#define BCM78910_A0_TXPMD_SOBMH_FROM_CPU_INPUT_PRI 28 -#define BCM78910_A0_TXPMD_SOBMH_FROM_CPU_RQE_Q_NUM 29 -#define BCM78910_A0_TXPMD_SOBMH_FROM_CPU_SPAP 30 -#define BCM78910_A0_TXPMD_SOBMH_FROM_CPU_SPID 31 -#define BCM78910_A0_TXPMD_SOBMH_FROM_CPU_SPID_OVERRIDE 32 -#define BCM78910_A0_TXPMD_SOBMH_FROM_CPU_SRC_MODID 33 -#define BCM78910_A0_TXPMD_SOBMH_FROM_CPU_TX_TS 34 -#define BCM78910_A0_TXPMD_SOBMH_FROM_CPU_UNICAST 35 -#define BCM78910_A0_TXPMD_SOBMH_FROM_CPU_WRED_MARK_ELIGIBLE 36 -#define BCM78910_A0_TXPMD_SOBMH_FROM_CPU_WRED_RESPONSE 37 -#define BCM78910_A0_TXPMD_HEADER_TYPE 38 -#define BCM78910_A0_TXPMD_START 39 -#define BCM78910_A0_TXPMD_COUNT 40 - -/* TXPMD name map */ -#define BCM78910_A0_TXPMD_NAME_MAP_INIT \ - {"CPU_TX::ECMP_MEMBER_ID", BCM78910_A0_TXPMD_CPU_TX_ECMP_MEMBER_ID}, \ - {"CPU_TX::MCAST_LB_INDEX", BCM78910_A0_TXPMD_CPU_TX_MCAST_LB_INDEX}, \ - {"CPU_TX::COOKIE", BCM78910_A0_TXPMD_CPU_TX_COOKIE}, \ - {"CPU_TX::COOKIE_VALID", BCM78910_A0_TXPMD_CPU_TX_COOKIE_VALID}, \ - {"CPU_TX::DESTINATION", BCM78910_A0_TXPMD_CPU_TX_DESTINATION}, \ - {"CPU_TX::DESTINATION_TYPE", BCM78910_A0_TXPMD_CPU_TX_DESTINATION_TYPE}, \ - {"CPU_TX::DP", BCM78910_A0_TXPMD_CPU_TX_DP}, \ - {"CPU_TX::INPUT_PRI", BCM78910_A0_TXPMD_CPU_TX_INPUT_PRI}, \ - {"CPU_TX::INT_CN", BCM78910_A0_TXPMD_CPU_TX_INT_CN}, \ - {"CPU_TX::INT_PRI", BCM78910_A0_TXPMD_CPU_TX_INT_PRI}, \ - {"CPU_TX::MCAST_LB_INDEX_VLD", BCM78910_A0_TXPMD_CPU_TX_MCAST_LB_INDEX_VLD}, \ - {"CPU_TX::PKT_PROFILE", BCM78910_A0_TXPMD_CPU_TX_PKT_PROFILE}, \ - {"CPU_TX::QOS_FIELDS_VLD", BCM78910_A0_TXPMD_CPU_TX_QOS_FIELDS_VLD}, \ - {"CPU_TX::ROUTED_PKT", BCM78910_A0_TXPMD_CPU_TX_ROUTED_PKT}, \ - {"CPU_TX::SVP", BCM78910_A0_TXPMD_CPU_TX_SVP}, \ - {"CPU_TX::VRF", BCM78910_A0_TXPMD_CPU_TX_VRF}, \ - {"CPU_TX::VRF_VALID", BCM78910_A0_TXPMD_CPU_TX_VRF_VALID}, \ - {"SOBMH_FROM_CPU::COOKIE_7_0", BCM78910_A0_TXPMD_SOBMH_FROM_CPU_COOKIE_7_0}, \ - {"SOBMH_FROM_CPU::IEEE1588_TIMESTAMP_HDR_OFFSET", BCM78910_A0_TXPMD_SOBMH_FROM_CPU_IEEE1588_TIMESTAMP_HDR_OFFSET}, \ - {"SOBMH_FROM_CPU::COOKIE_8", BCM78910_A0_TXPMD_SOBMH_FROM_CPU_COOKIE_8}, \ - {"SOBMH_FROM_CPU::IEEE1588_REGEN_UDP_CHECKSUM", BCM78910_A0_TXPMD_SOBMH_FROM_CPU_IEEE1588_REGEN_UDP_CHECKSUM}, \ - {"SOBMH_FROM_CPU::CELL_ERROR", BCM78910_A0_TXPMD_SOBMH_FROM_CPU_CELL_ERROR}, \ - {"SOBMH_FROM_CPU::CNG", BCM78910_A0_TXPMD_SOBMH_FROM_CPU_CNG}, \ - {"SOBMH_FROM_CPU::COS", BCM78910_A0_TXPMD_SOBMH_FROM_CPU_COS}, \ - {"SOBMH_FROM_CPU::DESTINATION", BCM78910_A0_TXPMD_SOBMH_FROM_CPU_DESTINATION}, \ - {"SOBMH_FROM_CPU::DESTINATION_TYPE", BCM78910_A0_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE}, \ - {"SOBMH_FROM_CPU::IEEE1588_INGRESS_TIMESTAMP_SIGN", BCM78910_A0_TXPMD_SOBMH_FROM_CPU_IEEE1588_INGRESS_TIMESTAMP_SIGN}, \ - {"SOBMH_FROM_CPU::IEEE1588_ONE_STEP_ENABLE", BCM78910_A0_TXPMD_SOBMH_FROM_CPU_IEEE1588_ONE_STEP_ENABLE}, \ - {"SOBMH_FROM_CPU::INPUT_PRI", BCM78910_A0_TXPMD_SOBMH_FROM_CPU_INPUT_PRI}, \ - {"SOBMH_FROM_CPU::RQE_Q_NUM", BCM78910_A0_TXPMD_SOBMH_FROM_CPU_RQE_Q_NUM}, \ - {"SOBMH_FROM_CPU::SPAP", BCM78910_A0_TXPMD_SOBMH_FROM_CPU_SPAP}, \ - {"SOBMH_FROM_CPU::SPID", BCM78910_A0_TXPMD_SOBMH_FROM_CPU_SPID}, \ - {"SOBMH_FROM_CPU::SPID_OVERRIDE", BCM78910_A0_TXPMD_SOBMH_FROM_CPU_SPID_OVERRIDE}, \ - {"SOBMH_FROM_CPU::SRC_MODID", BCM78910_A0_TXPMD_SOBMH_FROM_CPU_SRC_MODID}, \ - {"SOBMH_FROM_CPU::TX_TS", BCM78910_A0_TXPMD_SOBMH_FROM_CPU_TX_TS}, \ - {"SOBMH_FROM_CPU::UNICAST", BCM78910_A0_TXPMD_SOBMH_FROM_CPU_UNICAST}, \ - {"SOBMH_FROM_CPU::WRED_MARK_ELIGIBLE", BCM78910_A0_TXPMD_SOBMH_FROM_CPU_WRED_MARK_ELIGIBLE}, \ - {"SOBMH_FROM_CPU::WRED_RESPONSE", BCM78910_A0_TXPMD_SOBMH_FROM_CPU_WRED_RESPONSE}, \ - {"HEADER_TYPE", BCM78910_A0_TXPMD_HEADER_TYPE}, \ - {"START", BCM78910_A0_TXPMD_START}, \ - {"COUNT", BCM78910_A0_TXPMD_COUNT} - -/*! - * \name BCM78910_A0_TXPMD_CPU_TX_DESTINATION_TYPE encodings. - * \anchor BCM78910_A0_TXPMD_CPU_TX_DESTINATION_TYPE_XXX - */ -/*! \{ */ -#define BCM78910_A0_TXPMD_CPU_TX_DESTINATION_TYPE_EGRESS_PORT 0 -#define BCM78910_A0_TXPMD_CPU_TX_DESTINATION_TYPE_NHI 1 -#define BCM78910_A0_TXPMD_CPU_TX_DESTINATION_TYPE_ECMP 2 -#define BCM78910_A0_TXPMD_CPU_TX_DESTINATION_TYPE_ECMP_MEMBER 3 -#define BCM78910_A0_TXPMD_CPU_TX_DESTINATION_TYPE_IPMC 4 -#define BCM78910_A0_TXPMD_CPU_TX_DESTINATION_TYPE_L2MC 5 -#define BCM78910_A0_TXPMD_CPU_TX_DESTINATION_TYPE_VLAN_FLOOD 6 -#define BCM78910_A0_TXPMD_CPU_TX_DESTINATION_TYPE_LAG_ID 8 -#define BCM78910_A0_TXPMD_CPU_TX_DESTINATION_TYPE_FORWARD 15 -/*! \} */ - -/*! BCM78910_A0_TXPMD_CPU_TX_DESTINATION_TYPE encoding name strings maps. */ -#define BCM78910_A0_TXPMD_CPU_TX_DESTINATION_TYPE_NAME_MAP_INIT \ - {"EGRESS_PORT", BCM78910_A0_TXPMD_CPU_TX_DESTINATION_TYPE_EGRESS_PORT},\ - {"NHI", BCM78910_A0_TXPMD_CPU_TX_DESTINATION_TYPE_NHI},\ - {"ECMP", BCM78910_A0_TXPMD_CPU_TX_DESTINATION_TYPE_ECMP},\ - {"ECMP_MEMBER", BCM78910_A0_TXPMD_CPU_TX_DESTINATION_TYPE_ECMP_MEMBER},\ - {"IPMC", BCM78910_A0_TXPMD_CPU_TX_DESTINATION_TYPE_IPMC},\ - {"L2MC", BCM78910_A0_TXPMD_CPU_TX_DESTINATION_TYPE_L2MC},\ - {"VLAN_FLOOD", BCM78910_A0_TXPMD_CPU_TX_DESTINATION_TYPE_VLAN_FLOOD},\ - {"LAG_ID", BCM78910_A0_TXPMD_CPU_TX_DESTINATION_TYPE_LAG_ID},\ - {"FORWARD", BCM78910_A0_TXPMD_CPU_TX_DESTINATION_TYPE_FORWARD},\ - {NULL, 0} - -/*! - * \name BCM78910_A0_TXPMD_CPU_TX_DP encodings. - * \anchor BCM78910_A0_TXPMD_CPU_TX_DP_XXX - */ -/*! \{ */ -#define BCM78910_A0_TXPMD_CPU_TX_DP_GREEN 0 -#define BCM78910_A0_TXPMD_CPU_TX_DP_RED 1 -#define BCM78910_A0_TXPMD_CPU_TX_DP_YELLOW 3 -/*! \} */ - -/*! BCM78910_A0_TXPMD_CPU_TX_DP encoding name strings maps. */ -#define BCM78910_A0_TXPMD_CPU_TX_DP_NAME_MAP_INIT \ - {"GREEN", BCM78910_A0_TXPMD_CPU_TX_DP_GREEN},\ - {"RED", BCM78910_A0_TXPMD_CPU_TX_DP_RED},\ - {"YELLOW", BCM78910_A0_TXPMD_CPU_TX_DP_YELLOW},\ - {NULL, 0} - -/*! - * \name BCM78910_A0_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE encodings. - * \anchor BCM78910_A0_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE_XXX - */ -/*! \{ */ -#define BCM78910_A0_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE_EGRESS_PORT 0 -#define BCM78910_A0_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE_L2_PBM 7 -#define BCM78910_A0_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE_INVALID 15 -/*! \} */ - -/*! BCM78910_A0_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE encoding name strings maps. */ -#define BCM78910_A0_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE_NAME_MAP_INIT \ - {"EGRESS_PORT", BCM78910_A0_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE_EGRESS_PORT},\ - {"L2_PBM", BCM78910_A0_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE_L2_PBM},\ - {"INVALID", BCM78910_A0_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE_INVALID},\ - {NULL, 0} - -/*! - * \name BCM78910_A0_TXPMD_HEADER_TYPE encodings. - * \anchor BCM78910_A0_TXPMD_HEADER_TYPE_XXX - */ -/*! \{ */ -#define BCM78910_A0_TXPMD_HEADER_TYPE_RESERVED 0 -#define BCM78910_A0_TXPMD_HEADER_TYPE_SOBMH 1 -#define BCM78910_A0_TXPMD_HEADER_TYPE_CPU_TX 2 -#define BCM78910_A0_TXPMD_HEADER_TYPE_CTC 3 -#define BCM78910_A0_TXPMD_HEADER_TYPE_MIRROR 4 -#define BCM78910_A0_TXPMD_HEADER_TYPE_RESERVED_1 5 -#define BCM78910_A0_TXPMD_HEADER_TYPE_ETH_TYPE_NONE 6 -#define BCM78910_A0_TXPMD_HEADER_TYPE_ETH_TYPE_IP_ETH_CLASSIC 7 -#define BCM78910_A0_TXPMD_HEADER_TYPE_ETH_TYPE_EP_ETH_CLASSIC 8 -#define BCM78910_A0_TXPMD_HEADER_TYPE_ETH_TYPE_IP_S_MOD 9 -#define BCM78910_A0_TXPMD_HEADER_TYPE_ETH_TYPE_EP_S_MOD 10 -#define BCM78910_A0_TXPMD_HEADER_TYPE_ETH_TYPE_EP_REDIRECT_IFA_PROBE_INIT 11 -#define BCM78910_A0_TXPMD_HEADER_TYPE_ETH_TYPE_EP_REDIRECT_OTHER 12 -#define BCM78910_A0_TXPMD_HEADER_TYPE_MIRROR_TO_CPU 13 -#define BCM78910_A0_TXPMD_HEADER_TYPE_IFA_EP_REDIRECT_IFA_PROBE_INIT 14 -#define BCM78910_A0_TXPMD_HEADER_TYPE_DOP 15 -/*! \} */ - -/*! BCM78910_A0_TXPMD_HEADER_TYPE encoding name strings maps. */ -#define BCM78910_A0_TXPMD_HEADER_TYPE_NAME_MAP_INIT \ - {"RESERVED", BCM78910_A0_TXPMD_HEADER_TYPE_RESERVED},\ - {"SOBMH", BCM78910_A0_TXPMD_HEADER_TYPE_SOBMH},\ - {"CPU_TX", BCM78910_A0_TXPMD_HEADER_TYPE_CPU_TX},\ - {"CTC", BCM78910_A0_TXPMD_HEADER_TYPE_CTC},\ - {"MIRROR", BCM78910_A0_TXPMD_HEADER_TYPE_MIRROR},\ - {"RESERVED_1", BCM78910_A0_TXPMD_HEADER_TYPE_RESERVED_1},\ - {"ETH_TYPE_NONE", BCM78910_A0_TXPMD_HEADER_TYPE_ETH_TYPE_NONE},\ - {"ETH_TYPE_IP_ETH_CLASSIC", BCM78910_A0_TXPMD_HEADER_TYPE_ETH_TYPE_IP_ETH_CLASSIC},\ - {"ETH_TYPE_EP_ETH_CLASSIC", BCM78910_A0_TXPMD_HEADER_TYPE_ETH_TYPE_EP_ETH_CLASSIC},\ - {"ETH_TYPE_IP_S_MOD", BCM78910_A0_TXPMD_HEADER_TYPE_ETH_TYPE_IP_S_MOD},\ - {"ETH_TYPE_EP_S_MOD", BCM78910_A0_TXPMD_HEADER_TYPE_ETH_TYPE_EP_S_MOD},\ - {"ETH_TYPE_EP_REDIRECT_IFA_PROBE_INIT", BCM78910_A0_TXPMD_HEADER_TYPE_ETH_TYPE_EP_REDIRECT_IFA_PROBE_INIT},\ - {"ETH_TYPE_EP_REDIRECT_OTHER", BCM78910_A0_TXPMD_HEADER_TYPE_ETH_TYPE_EP_REDIRECT_OTHER},\ - {"MIRROR_TO_CPU", BCM78910_A0_TXPMD_HEADER_TYPE_MIRROR_TO_CPU},\ - {"IFA_EP_REDIRECT_IFA_PROBE_INIT", BCM78910_A0_TXPMD_HEADER_TYPE_IFA_EP_REDIRECT_IFA_PROBE_INIT},\ - {"DOP", BCM78910_A0_TXPMD_HEADER_TYPE_DOP},\ - {NULL, 0} - -/*! - * \name BCM78910_A0_TXPMD_START encodings. - * \anchor BCM78910_A0_TXPMD_START_XXX - */ -/*! \{ */ -#define BCM78910_A0_TXPMD_START_INTERNAL 2 -/*! \} */ - -/*! BCM78910_A0_TXPMD_START encoding name strings maps. */ -#define BCM78910_A0_TXPMD_START_NAME_MAP_INIT \ - {"INTERNAL", BCM78910_A0_TXPMD_START_INTERNAL},\ - {NULL, 0} - -/* LBHDR defines */ -#define BCM78910_A0_LBHDR_PKT_PROFILE 0 -#define BCM78910_A0_LBHDR_QOS_FIELD_VALID 1 -#define BCM78910_A0_LBHDR_VFI_VALID_MD_ETH 2 -#define BCM78910_A0_LBHDR_VRF_VALID 3 -#define BCM78910_A0_LBHDR_VFI_MD_ETH 4 -#define BCM78910_A0_LBHDR_VRF 5 -#define BCM78910_A0_LBHDR_PP_PORT 6 -#define BCM78910_A0_LBHDR_VISIBILITY_PKT 7 -#define BCM78910_A0_LBHDR_ROUTED_PKT 8 -#define BCM78910_A0_LBHDR_OPAQUE_OBJECT 9 -#define BCM78910_A0_LBHDR_QOS_FIELD_ETH 10 -#define BCM78910_A0_LBHDR_INT_PRI_ETH 11 -#define BCM78910_A0_LBHDR_INT_CN_ETH 12 -#define BCM78910_A0_LBHDR_CNG_ETH 13 -#define BCM78910_A0_LBHDR_INPUT_PRIORITY_MD_ETH 14 -#define BCM78910_A0_LBHDR_HEADER_TYPE 15 -#define BCM78910_A0_LBHDR_START 16 -#define BCM78910_A0_LBHDR_COUNT 17 - -/* LBHDR name map */ -#define BCM78910_A0_LBHDR_NAME_MAP_INIT \ - {"PKT_PROFILE", BCM78910_A0_LBHDR_PKT_PROFILE}, \ - {"QOS_FIELD_VALID", BCM78910_A0_LBHDR_QOS_FIELD_VALID}, \ - {"VFI_VALID_MD_ETH", BCM78910_A0_LBHDR_VFI_VALID_MD_ETH}, \ - {"VRF_VALID", BCM78910_A0_LBHDR_VRF_VALID}, \ - {"VFI_MD_ETH", BCM78910_A0_LBHDR_VFI_MD_ETH}, \ - {"VRF", BCM78910_A0_LBHDR_VRF}, \ - {"PP_PORT", BCM78910_A0_LBHDR_PP_PORT}, \ - {"VISIBILITY_PKT", BCM78910_A0_LBHDR_VISIBILITY_PKT}, \ - {"ROUTED_PKT", BCM78910_A0_LBHDR_ROUTED_PKT}, \ - {"OPAQUE_OBJECT", BCM78910_A0_LBHDR_OPAQUE_OBJECT}, \ - {"QOS_FIELD_ETH", BCM78910_A0_LBHDR_QOS_FIELD_ETH}, \ - {"INT_PRI_ETH", BCM78910_A0_LBHDR_INT_PRI_ETH}, \ - {"INT_CN_ETH", BCM78910_A0_LBHDR_INT_CN_ETH}, \ - {"CNG_ETH", BCM78910_A0_LBHDR_CNG_ETH}, \ - {"INPUT_PRIORITY_MD_ETH", BCM78910_A0_LBHDR_INPUT_PRIORITY_MD_ETH}, \ - {"HEADER_TYPE", BCM78910_A0_LBHDR_HEADER_TYPE}, \ - {"START", BCM78910_A0_LBHDR_START}, \ - {"COUNT", BCM78910_A0_LBHDR_COUNT} - -/*! - * \name BCM78910_A0_LBHDR_HEADER_TYPE encodings. - * \anchor BCM78910_A0_LBHDR_HEADER_TYPE_XXX - */ -/*! \{ */ -#define BCM78910_A0_LBHDR_HEADER_TYPE_LOOPBACK_MH 7 -/*! \} */ - -/*! BCM78910_A0_LBHDR_HEADER_TYPE encoding name strings maps. */ -#define BCM78910_A0_LBHDR_HEADER_TYPE_NAME_MAP_INIT \ - {"LOOPBACK_MH", BCM78910_A0_LBHDR_HEADER_TYPE_LOOPBACK_MH},\ - {NULL, 0} - -/*! - * \name BCM78910_A0_LBHDR_START encodings. - * \anchor BCM78910_A0_LBHDR_START_XXX - */ -/*! \{ */ -#define BCM78910_A0_LBHDR_START_INTERNAL 2 -/*! \} */ - -/*! BCM78910_A0_LBHDR_START encoding name strings maps. */ -#define BCM78910_A0_LBHDR_START_NAME_MAP_INIT \ - {"INTERNAL", BCM78910_A0_LBHDR_START_INTERNAL},\ - {NULL, 0} - -#endif /* BCM78910_A0_PMD_FIELD_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm78914_b0/bcm78914_b0_pmd_field.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm78914_b0/bcm78914_b0_pmd_field.h deleted file mode 100644 index ab8f627ce7b..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm78914_b0/bcm78914_b0_pmd_field.h +++ /dev/null @@ -1,538 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated from the registers file. - * Edits to this file will be lost when it is regenerated. - * Tool: INTERNAL/regs/xgs/generate-pmd.pl - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - * This file provides PMD field defines for BCM78914_B0. - * - ******************************************************************************/ - -#ifndef BCM78914_B0_PMD_FIELD_H -#define BCM78914_B0_PMD_FIELD_H - -/* RXPMD defines */ -#define BCM78914_B0_RXPMD_REASON 0 -#define BCM78914_B0_RXPMD_REASON_TYPE 1 -#define BCM78914_B0_RXPMD_I2E_CLASSID 2 -#define BCM78914_B0_RXPMD_RX_BFD_SESSION_INDEX 3 -#define BCM78914_B0_RXPMD_I2E_CLASSID_TYPE 4 -#define BCM78914_B0_RXPMD_RX_BFD_START_OFFSET_TYPE 5 -#define BCM78914_B0_RXPMD_RX_BFD_START_OFFSET 6 -#define BCM78914_B0_RXPMD_CPU_COS 7 -#define BCM78914_B0_RXPMD_QUEUE_NUM 8 -#define BCM78914_B0_RXPMD_ING_L3_INTF 9 -#define BCM78914_B0_RXPMD_INCOMING_TAG_STATUS 10 -#define BCM78914_B0_RXPMD_ING_OTAG_ACTION 11 -#define BCM78914_B0_RXPMD_PKT_LENGTH 12 -#define BCM78914_B0_RXPMD_O_NHI 13 -#define BCM78914_B0_RXPMD_INCOMING_OPAQUE_TAG_STATUS 14 -#define BCM78914_B0_RXPMD_BPDU 15 -#define BCM78914_B0_RXPMD_CHANGE_DSCP 16 -#define BCM78914_B0_RXPMD_CHANGE_ECN 17 -#define BCM78914_B0_RXPMD_DLB_ID_VALID 18 -#define BCM78914_B0_RXPMD_DO_NOT_CHANGE_TTL 19 -#define BCM78914_B0_RXPMD_DSCP 20 -#define BCM78914_B0_RXPMD_SPECIAL_PACKET_TYPE 21 -#define BCM78914_B0_RXPMD_ECN 22 -#define BCM78914_B0_RXPMD_IP_ROUTED 23 -#define BCM78914_B0_RXPMD_L3ONLY 24 -#define BCM78914_B0_RXPMD_MATCHED_RULE 25 -#define BCM78914_B0_RXPMD_MATCHED_RULE_EP 26 -#define BCM78914_B0_RXPMD_IS_EGR_TS 27 -#define BCM78914_B0_RXPMD_MTP_INDEX 28 -#define BCM78914_B0_RXPMD_OUTER_CFI 29 -#define BCM78914_B0_RXPMD_OUTER_PRI 30 -#define BCM78914_B0_RXPMD_OUTER_VID 31 -#define BCM78914_B0_RXPMD_REPLICATION_OR_NHOP_INDEX 32 -#define BCM78914_B0_RXPMD_MODIFIED_PKT 33 -#define BCM78914_B0_RXPMD_ENTROPY_LABEL 34 -#define BCM78914_B0_RXPMD_SPECIAL_PACKET_INDICATOR 35 -#define BCM78914_B0_RXPMD_SRC_PORT_NUM 36 -#define BCM78914_B0_RXPMD_SWITCH 37 -#define BCM78914_B0_RXPMD_TIMESTAMP 38 -#define BCM78914_B0_RXPMD_TIMESTAMP_HI 39 -#define BCM78914_B0_RXPMD_IEEE_802_1AS_TIMESTAMP_ENABLED 40 -#define BCM78914_B0_RXPMD_TUNNEL_DECAP_TYPE 41 -#define BCM78914_B0_RXPMD_UC_SW_COPY_DROPPED 42 -#define BCM78914_B0_RXPMD_UNICAST_QUEUE 43 -#define BCM78914_B0_RXPMD_INCOMING_INT_HDR_TYPE 44 -#define BCM78914_B0_RXPMD_DLB_ID 45 -#define BCM78914_B0_RXPMD_MODULE_HDR 46 -#define BCM78914_B0_RXPMD_COUNT 47 - -/* RXPMD name map */ -#define BCM78914_B0_RXPMD_NAME_MAP_INIT \ - {"REASON", BCM78914_B0_RXPMD_REASON}, \ - {"REASON_TYPE", BCM78914_B0_RXPMD_REASON_TYPE}, \ - {"I2E_CLASSID", BCM78914_B0_RXPMD_I2E_CLASSID}, \ - {"RX_BFD_SESSION_INDEX", BCM78914_B0_RXPMD_RX_BFD_SESSION_INDEX}, \ - {"I2E_CLASSID_TYPE", BCM78914_B0_RXPMD_I2E_CLASSID_TYPE}, \ - {"RX_BFD_START_OFFSET_TYPE", BCM78914_B0_RXPMD_RX_BFD_START_OFFSET_TYPE}, \ - {"RX_BFD_START_OFFSET", BCM78914_B0_RXPMD_RX_BFD_START_OFFSET}, \ - {"CPU_COS", BCM78914_B0_RXPMD_CPU_COS}, \ - {"QUEUE_NUM", BCM78914_B0_RXPMD_QUEUE_NUM}, \ - {"ING_L3_INTF", BCM78914_B0_RXPMD_ING_L3_INTF}, \ - {"INCOMING_TAG_STATUS", BCM78914_B0_RXPMD_INCOMING_TAG_STATUS}, \ - {"ING_OTAG_ACTION", BCM78914_B0_RXPMD_ING_OTAG_ACTION}, \ - {"PKT_LENGTH", BCM78914_B0_RXPMD_PKT_LENGTH}, \ - {"O_NHI", BCM78914_B0_RXPMD_O_NHI}, \ - {"INCOMING_OPAQUE_TAG_STATUS", BCM78914_B0_RXPMD_INCOMING_OPAQUE_TAG_STATUS}, \ - {"BPDU", BCM78914_B0_RXPMD_BPDU}, \ - {"CHANGE_DSCP", BCM78914_B0_RXPMD_CHANGE_DSCP}, \ - {"CHANGE_ECN", BCM78914_B0_RXPMD_CHANGE_ECN}, \ - {"DLB_ID_VALID", BCM78914_B0_RXPMD_DLB_ID_VALID}, \ - {"DO_NOT_CHANGE_TTL", BCM78914_B0_RXPMD_DO_NOT_CHANGE_TTL}, \ - {"DSCP", BCM78914_B0_RXPMD_DSCP}, \ - {"SPECIAL_PACKET_TYPE", BCM78914_B0_RXPMD_SPECIAL_PACKET_TYPE}, \ - {"ECN", BCM78914_B0_RXPMD_ECN}, \ - {"IP_ROUTED", BCM78914_B0_RXPMD_IP_ROUTED}, \ - {"L3ONLY", BCM78914_B0_RXPMD_L3ONLY}, \ - {"MATCHED_RULE", BCM78914_B0_RXPMD_MATCHED_RULE}, \ - {"MATCHED_RULE_EP", BCM78914_B0_RXPMD_MATCHED_RULE_EP}, \ - {"IS_EGR_TS", BCM78914_B0_RXPMD_IS_EGR_TS}, \ - {"MTP_INDEX", BCM78914_B0_RXPMD_MTP_INDEX}, \ - {"OUTER_CFI", BCM78914_B0_RXPMD_OUTER_CFI}, \ - {"OUTER_PRI", BCM78914_B0_RXPMD_OUTER_PRI}, \ - {"OUTER_VID", BCM78914_B0_RXPMD_OUTER_VID}, \ - {"REPLICATION_OR_NHOP_INDEX", BCM78914_B0_RXPMD_REPLICATION_OR_NHOP_INDEX}, \ - {"MODIFIED_PKT", BCM78914_B0_RXPMD_MODIFIED_PKT}, \ - {"ENTROPY_LABEL", BCM78914_B0_RXPMD_ENTROPY_LABEL}, \ - {"SPECIAL_PACKET_INDICATOR", BCM78914_B0_RXPMD_SPECIAL_PACKET_INDICATOR}, \ - {"SRC_PORT_NUM", BCM78914_B0_RXPMD_SRC_PORT_NUM}, \ - {"SWITCH", BCM78914_B0_RXPMD_SWITCH}, \ - {"TIMESTAMP", BCM78914_B0_RXPMD_TIMESTAMP}, \ - {"TIMESTAMP_HI", BCM78914_B0_RXPMD_TIMESTAMP_HI}, \ - {"IEEE_802_1AS_TIMESTAMP_ENABLED", BCM78914_B0_RXPMD_IEEE_802_1AS_TIMESTAMP_ENABLED}, \ - {"TUNNEL_DECAP_TYPE", BCM78914_B0_RXPMD_TUNNEL_DECAP_TYPE}, \ - {"UC_SW_COPY_DROPPED", BCM78914_B0_RXPMD_UC_SW_COPY_DROPPED}, \ - {"UNICAST_QUEUE", BCM78914_B0_RXPMD_UNICAST_QUEUE}, \ - {"INCOMING_INT_HDR_TYPE", BCM78914_B0_RXPMD_INCOMING_INT_HDR_TYPE}, \ - {"DLB_ID", BCM78914_B0_RXPMD_DLB_ID}, \ - {"MODULE_HDR", BCM78914_B0_RXPMD_MODULE_HDR}, \ - {"COUNT", BCM78914_B0_RXPMD_COUNT} - -/*! - * \name BCM78914_B0_RXPMD_REASON_TYPE encodings. - * \anchor BCM78914_B0_RXPMD_REASON_TYPE_XXX - */ -/*! \{ */ -#define BCM78914_B0_RXPMD_REASON_TYPE_CTC_INITIATED_FROM_IP 0 -#define BCM78914_B0_RXPMD_REASON_TYPE_CTC_INITIATED_FROM_EP 1 -/*! \} */ - -/*! BCM78914_B0_RXPMD_REASON_TYPE encoding name strings maps. */ -#define BCM78914_B0_RXPMD_REASON_TYPE_NAME_MAP_INIT \ - {"CTC_INITIATED_FROM_IP", BCM78914_B0_RXPMD_REASON_TYPE_CTC_INITIATED_FROM_IP},\ - {"CTC_INITIATED_FROM_EP", BCM78914_B0_RXPMD_REASON_TYPE_CTC_INITIATED_FROM_EP},\ - {NULL, 0} - -/* RX_REASON defines */ -#define BCM78914_B0_RX_REASON_CPU_INVALID_REASON 0 -#define BCM78914_B0_RX_REASON_CPU_SLF 1 -#define BCM78914_B0_RX_REASON_CPU_DLF 2 -#define BCM78914_B0_RX_REASON_CPU_L2MOVE 3 -#define BCM78914_B0_RX_REASON_CPU_L2CPU 4 -#define BCM78914_B0_RX_REASON_CPU_L3SRC_MISS 5 -#define BCM78914_B0_RX_REASON_CPU_L3DST_MISS 6 -#define BCM78914_B0_RX_REASON_CPU_L3SRC_MOVE 7 -#define BCM78914_B0_RX_REASON_CPU_MC_MISS 8 -#define BCM78914_B0_RX_REASON_CPU_IPMC_MISS 9 -#define BCM78914_B0_RX_REASON_CPU_FFP 10 -#define BCM78914_B0_RX_REASON_CPU_L3HDR_ERR 11 -#define BCM78914_B0_RX_REASON_CPU_PROTOCOL_PKT 12 -#define BCM78914_B0_RX_REASON_CPU_DOS_ATTACK 13 -#define BCM78914_B0_RX_REASON_CPU_MARTIAN_ADDR 14 -#define BCM78914_B0_RX_REASON_CPU_TUNNEL_ERR 15 -#define BCM78914_B0_RX_REASON_CPU_SFLOW_SRC 16 -#define BCM78914_B0_RX_REASON_CPU_SFLOW_DST 17 -#define BCM78914_B0_RX_REASON_ICMP_REDIRECT 18 -#define BCM78914_B0_RX_REASON_L3_SLOWPATH 19 -#define BCM78914_B0_RX_REASON_PARITY_ERROR 20 -#define BCM78914_B0_RX_REASON_L3_MTU_CHECK_FAIL 21 -#define BCM78914_B0_RX_REASON_MPLS_TTL_CHECK 22 -#define BCM78914_B0_RX_REASON_MPLS_LABEL_MISS 23 -#define BCM78914_B0_RX_REASON_MPLS_INVALID_ACTION 24 -#define BCM78914_B0_RX_REASON_MPLS_INVALID_PAYLOAD 25 -#define BCM78914_B0_RX_REASON_CPU_VFP 26 -#define BCM78914_B0_RX_REASON_PBT_NONUC_PKT 27 -#define BCM78914_B0_RX_REASON_L3_NEXT_HOP 28 -#define BCM78914_B0_RX_REASON_MY_STATION 29 -#define BCM78914_B0_RX_REASON_TIME_SYNC 30 -#define BCM78914_B0_RX_REASON_TUNNEL_DECAP_ECN_ERROR 31 -#define BCM78914_B0_RX_REASON_BFD_SLOWPATH 32 -#define BCM78914_B0_RX_REASON_BFD_ERROR 33 -#define BCM78914_B0_RX_REASON_PACKET_TRACE_TO_CPU 34 -#define BCM78914_B0_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT 35 -#define BCM78914_B0_RX_REASON_MPLS_ALERT_LABEL 36 -#define BCM78914_B0_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH 37 -#define BCM78914_B0_RX_REASON_DLB_MONITOR 38 -#define BCM78914_B0_RX_REASON_CPU_SFLOW_FLEX 39 -#define BCM78914_B0_RX_REASON_CPU_UVLAN 40 -#define BCM78914_B0_RX_REASON_SRV6_ERROR 41 -#define BCM78914_B0_RX_REASON_VXLAN_VN_ID_MISS 42 -#define BCM78914_B0_RX_REASON_VXLAN_SIP_MISS 43 -#define BCM78914_B0_RX_REASON_ADAPT_MISS 44 -#define BCM78914_B0_RX_REASON_INVALID_GSH_NON_GSH 45 -#define BCM78914_B0_RX_REASON_APU_POLICY_CTC 46 -#define BCM78914_B0_RX_REASON_DELAYED_CTC 47 -#define BCM78914_B0_RX_REASON_PORT_DOWN 48 -#define BCM78914_B0_RX_REASON_SRV6_CONTROL_PKT 49 -#define BCM78914_B0_RX_REASON_OUI_COMPRESSION_MISS 50 -#define BCM78914_B0_RX_REASON_COUNT 51 - -/* RX_REASON name map */ -#define BCM78914_B0_RX_REASON_NAME_MAP_INIT \ - {"CPU_INVALID_REASON", BCM78914_B0_RX_REASON_CPU_INVALID_REASON}, \ - {"CPU_SLF", BCM78914_B0_RX_REASON_CPU_SLF}, \ - {"CPU_DLF", BCM78914_B0_RX_REASON_CPU_DLF}, \ - {"CPU_L2MOVE", BCM78914_B0_RX_REASON_CPU_L2MOVE}, \ - {"CPU_L2CPU", BCM78914_B0_RX_REASON_CPU_L2CPU}, \ - {"CPU_L3SRC_MISS", BCM78914_B0_RX_REASON_CPU_L3SRC_MISS}, \ - {"CPU_L3DST_MISS", BCM78914_B0_RX_REASON_CPU_L3DST_MISS}, \ - {"CPU_L3SRC_MOVE", BCM78914_B0_RX_REASON_CPU_L3SRC_MOVE}, \ - {"CPU_MC_MISS", BCM78914_B0_RX_REASON_CPU_MC_MISS}, \ - {"CPU_IPMC_MISS", BCM78914_B0_RX_REASON_CPU_IPMC_MISS}, \ - {"CPU_FFP", BCM78914_B0_RX_REASON_CPU_FFP}, \ - {"CPU_L3HDR_ERR", BCM78914_B0_RX_REASON_CPU_L3HDR_ERR}, \ - {"CPU_PROTOCOL_PKT", BCM78914_B0_RX_REASON_CPU_PROTOCOL_PKT}, \ - {"CPU_DOS_ATTACK", BCM78914_B0_RX_REASON_CPU_DOS_ATTACK}, \ - {"CPU_MARTIAN_ADDR", BCM78914_B0_RX_REASON_CPU_MARTIAN_ADDR}, \ - {"CPU_TUNNEL_ERR", BCM78914_B0_RX_REASON_CPU_TUNNEL_ERR}, \ - {"CPU_SFLOW_SRC", BCM78914_B0_RX_REASON_CPU_SFLOW_SRC}, \ - {"CPU_SFLOW_DST", BCM78914_B0_RX_REASON_CPU_SFLOW_DST}, \ - {"ICMP_REDIRECT", BCM78914_B0_RX_REASON_ICMP_REDIRECT}, \ - {"L3_SLOWPATH", BCM78914_B0_RX_REASON_L3_SLOWPATH}, \ - {"PARITY_ERROR", BCM78914_B0_RX_REASON_PARITY_ERROR}, \ - {"L3_MTU_CHECK_FAIL", BCM78914_B0_RX_REASON_L3_MTU_CHECK_FAIL}, \ - {"MPLS_TTL_CHECK", BCM78914_B0_RX_REASON_MPLS_TTL_CHECK}, \ - {"MPLS_LABEL_MISS", BCM78914_B0_RX_REASON_MPLS_LABEL_MISS}, \ - {"MPLS_INVALID_ACTION", BCM78914_B0_RX_REASON_MPLS_INVALID_ACTION}, \ - {"MPLS_INVALID_PAYLOAD", BCM78914_B0_RX_REASON_MPLS_INVALID_PAYLOAD}, \ - {"CPU_VFP", BCM78914_B0_RX_REASON_CPU_VFP}, \ - {"PBT_NONUC_PKT", BCM78914_B0_RX_REASON_PBT_NONUC_PKT}, \ - {"L3_NEXT_HOP", BCM78914_B0_RX_REASON_L3_NEXT_HOP}, \ - {"MY_STATION", BCM78914_B0_RX_REASON_MY_STATION}, \ - {"TIME_SYNC", BCM78914_B0_RX_REASON_TIME_SYNC}, \ - {"TUNNEL_DECAP_ECN_ERROR", BCM78914_B0_RX_REASON_TUNNEL_DECAP_ECN_ERROR}, \ - {"BFD_SLOWPATH", BCM78914_B0_RX_REASON_BFD_SLOWPATH}, \ - {"BFD_ERROR", BCM78914_B0_RX_REASON_BFD_ERROR}, \ - {"PACKET_TRACE_TO_CPU", BCM78914_B0_RX_REASON_PACKET_TRACE_TO_CPU}, \ - {"MPLS_UNKNOWN_CONTROL_PKT", BCM78914_B0_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT}, \ - {"MPLS_ALERT_LABEL", BCM78914_B0_RX_REASON_MPLS_ALERT_LABEL}, \ - {"CPU_IPMC_INTERFACE_MISMATCH", BCM78914_B0_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH}, \ - {"DLB_MONITOR", BCM78914_B0_RX_REASON_DLB_MONITOR}, \ - {"CPU_SFLOW_FLEX", BCM78914_B0_RX_REASON_CPU_SFLOW_FLEX}, \ - {"CPU_UVLAN", BCM78914_B0_RX_REASON_CPU_UVLAN}, \ - {"SRV6_ERROR", BCM78914_B0_RX_REASON_SRV6_ERROR}, \ - {"VXLAN_VN_ID_MISS", BCM78914_B0_RX_REASON_VXLAN_VN_ID_MISS}, \ - {"VXLAN_SIP_MISS", BCM78914_B0_RX_REASON_VXLAN_SIP_MISS}, \ - {"ADAPT_MISS", BCM78914_B0_RX_REASON_ADAPT_MISS}, \ - {"INVALID_GSH_NON_GSH", BCM78914_B0_RX_REASON_INVALID_GSH_NON_GSH}, \ - {"APU_POLICY_CTC", BCM78914_B0_RX_REASON_APU_POLICY_CTC}, \ - {"DELAYED_CTC", BCM78914_B0_RX_REASON_DELAYED_CTC}, \ - {"PORT_DOWN", BCM78914_B0_RX_REASON_PORT_DOWN}, \ - {"SRV6_CONTROL_PKT", BCM78914_B0_RX_REASON_SRV6_CONTROL_PKT}, \ - {"OUI_COMPRESSION_MISS", BCM78914_B0_RX_REASON_OUI_COMPRESSION_MISS}, \ - {"COUNT", BCM78914_B0_RX_REASON_COUNT} - -/* EP_RX_REASON defines */ -#define BCM78914_B0_EP_RX_REASON_EP_CTC 0 -#define BCM78914_B0_EP_RX_REASON_COUNT 1 - -/* EP_RX_REASON name map */ -#define BCM78914_B0_EP_RX_REASON_NAME_MAP_INIT \ - {"EP_CTC", BCM78914_B0_EP_RX_REASON_EP_CTC}, \ - {"COUNT", BCM78914_B0_EP_RX_REASON_COUNT} - -/* TXPMD defines */ -#define BCM78914_B0_TXPMD_CPU_TX_ECMP_MEMBER_ID 0 -#define BCM78914_B0_TXPMD_CPU_TX_MCAST_LB_INDEX 1 -#define BCM78914_B0_TXPMD_CPU_TX_COOKIE 2 -#define BCM78914_B0_TXPMD_CPU_TX_COOKIE_VALID 3 -#define BCM78914_B0_TXPMD_CPU_TX_DESTINATION 4 -#define BCM78914_B0_TXPMD_CPU_TX_DESTINATION_TYPE 5 -#define BCM78914_B0_TXPMD_CPU_TX_DP 6 -#define BCM78914_B0_TXPMD_CPU_TX_INPUT_PRI 7 -#define BCM78914_B0_TXPMD_CPU_TX_INT_CN 8 -#define BCM78914_B0_TXPMD_CPU_TX_INT_PRI 9 -#define BCM78914_B0_TXPMD_CPU_TX_MCAST_LB_INDEX_VLD 10 -#define BCM78914_B0_TXPMD_CPU_TX_PKT_PROFILE 11 -#define BCM78914_B0_TXPMD_CPU_TX_QOS_FIELDS_VLD 12 -#define BCM78914_B0_TXPMD_CPU_TX_ROUTED_PKT 13 -#define BCM78914_B0_TXPMD_CPU_TX_SVP 14 -#define BCM78914_B0_TXPMD_CPU_TX_VRF 15 -#define BCM78914_B0_TXPMD_CPU_TX_VRF_VALID 16 -#define BCM78914_B0_TXPMD_SOBMH_FROM_CPU_COOKIE_7_0 17 -#define BCM78914_B0_TXPMD_SOBMH_FROM_CPU_IEEE1588_TIMESTAMP_HDR_OFFSET 18 -#define BCM78914_B0_TXPMD_SOBMH_FROM_CPU_COOKIE_8 19 -#define BCM78914_B0_TXPMD_SOBMH_FROM_CPU_IEEE1588_REGEN_UDP_CHECKSUM 20 -#define BCM78914_B0_TXPMD_SOBMH_FROM_CPU_CELL_ERROR 21 -#define BCM78914_B0_TXPMD_SOBMH_FROM_CPU_CNG 22 -#define BCM78914_B0_TXPMD_SOBMH_FROM_CPU_COS 23 -#define BCM78914_B0_TXPMD_SOBMH_FROM_CPU_DESTINATION 24 -#define BCM78914_B0_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE 25 -#define BCM78914_B0_TXPMD_SOBMH_FROM_CPU_IEEE1588_INGRESS_TIMESTAMP_SIGN 26 -#define BCM78914_B0_TXPMD_SOBMH_FROM_CPU_IEEE1588_ONE_STEP_ENABLE 27 -#define BCM78914_B0_TXPMD_SOBMH_FROM_CPU_INPUT_PRI 28 -#define BCM78914_B0_TXPMD_SOBMH_FROM_CPU_RQE_Q_NUM 29 -#define BCM78914_B0_TXPMD_SOBMH_FROM_CPU_SPAP 30 -#define BCM78914_B0_TXPMD_SOBMH_FROM_CPU_SPID 31 -#define BCM78914_B0_TXPMD_SOBMH_FROM_CPU_SPID_OVERRIDE 32 -#define BCM78914_B0_TXPMD_SOBMH_FROM_CPU_SRC_MODID 33 -#define BCM78914_B0_TXPMD_SOBMH_FROM_CPU_TX_TS 34 -#define BCM78914_B0_TXPMD_SOBMH_FROM_CPU_UNICAST 35 -#define BCM78914_B0_TXPMD_SOBMH_FROM_CPU_WRED_MARK_ELIGIBLE 36 -#define BCM78914_B0_TXPMD_SOBMH_FROM_CPU_WRED_RESPONSE 37 -#define BCM78914_B0_TXPMD_HEADER_TYPE 38 -#define BCM78914_B0_TXPMD_START 39 -#define BCM78914_B0_TXPMD_COUNT 40 - -/* TXPMD name map */ -#define BCM78914_B0_TXPMD_NAME_MAP_INIT \ - {"CPU_TX::ECMP_MEMBER_ID", BCM78914_B0_TXPMD_CPU_TX_ECMP_MEMBER_ID}, \ - {"CPU_TX::MCAST_LB_INDEX", BCM78914_B0_TXPMD_CPU_TX_MCAST_LB_INDEX}, \ - {"CPU_TX::COOKIE", BCM78914_B0_TXPMD_CPU_TX_COOKIE}, \ - {"CPU_TX::COOKIE_VALID", BCM78914_B0_TXPMD_CPU_TX_COOKIE_VALID}, \ - {"CPU_TX::DESTINATION", BCM78914_B0_TXPMD_CPU_TX_DESTINATION}, \ - {"CPU_TX::DESTINATION_TYPE", BCM78914_B0_TXPMD_CPU_TX_DESTINATION_TYPE}, \ - {"CPU_TX::DP", BCM78914_B0_TXPMD_CPU_TX_DP}, \ - {"CPU_TX::INPUT_PRI", BCM78914_B0_TXPMD_CPU_TX_INPUT_PRI}, \ - {"CPU_TX::INT_CN", BCM78914_B0_TXPMD_CPU_TX_INT_CN}, \ - {"CPU_TX::INT_PRI", BCM78914_B0_TXPMD_CPU_TX_INT_PRI}, \ - {"CPU_TX::MCAST_LB_INDEX_VLD", BCM78914_B0_TXPMD_CPU_TX_MCAST_LB_INDEX_VLD}, \ - {"CPU_TX::PKT_PROFILE", BCM78914_B0_TXPMD_CPU_TX_PKT_PROFILE}, \ - {"CPU_TX::QOS_FIELDS_VLD", BCM78914_B0_TXPMD_CPU_TX_QOS_FIELDS_VLD}, \ - {"CPU_TX::ROUTED_PKT", BCM78914_B0_TXPMD_CPU_TX_ROUTED_PKT}, \ - {"CPU_TX::SVP", BCM78914_B0_TXPMD_CPU_TX_SVP}, \ - {"CPU_TX::VRF", BCM78914_B0_TXPMD_CPU_TX_VRF}, \ - {"CPU_TX::VRF_VALID", BCM78914_B0_TXPMD_CPU_TX_VRF_VALID}, \ - {"SOBMH_FROM_CPU::COOKIE_7_0", BCM78914_B0_TXPMD_SOBMH_FROM_CPU_COOKIE_7_0}, \ - {"SOBMH_FROM_CPU::IEEE1588_TIMESTAMP_HDR_OFFSET", BCM78914_B0_TXPMD_SOBMH_FROM_CPU_IEEE1588_TIMESTAMP_HDR_OFFSET}, \ - {"SOBMH_FROM_CPU::COOKIE_8", BCM78914_B0_TXPMD_SOBMH_FROM_CPU_COOKIE_8}, \ - {"SOBMH_FROM_CPU::IEEE1588_REGEN_UDP_CHECKSUM", BCM78914_B0_TXPMD_SOBMH_FROM_CPU_IEEE1588_REGEN_UDP_CHECKSUM}, \ - {"SOBMH_FROM_CPU::CELL_ERROR", BCM78914_B0_TXPMD_SOBMH_FROM_CPU_CELL_ERROR}, \ - {"SOBMH_FROM_CPU::CNG", BCM78914_B0_TXPMD_SOBMH_FROM_CPU_CNG}, \ - {"SOBMH_FROM_CPU::COS", BCM78914_B0_TXPMD_SOBMH_FROM_CPU_COS}, \ - {"SOBMH_FROM_CPU::DESTINATION", BCM78914_B0_TXPMD_SOBMH_FROM_CPU_DESTINATION}, \ - {"SOBMH_FROM_CPU::DESTINATION_TYPE", BCM78914_B0_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE}, \ - {"SOBMH_FROM_CPU::IEEE1588_INGRESS_TIMESTAMP_SIGN", BCM78914_B0_TXPMD_SOBMH_FROM_CPU_IEEE1588_INGRESS_TIMESTAMP_SIGN}, \ - {"SOBMH_FROM_CPU::IEEE1588_ONE_STEP_ENABLE", BCM78914_B0_TXPMD_SOBMH_FROM_CPU_IEEE1588_ONE_STEP_ENABLE}, \ - {"SOBMH_FROM_CPU::INPUT_PRI", BCM78914_B0_TXPMD_SOBMH_FROM_CPU_INPUT_PRI}, \ - {"SOBMH_FROM_CPU::RQE_Q_NUM", BCM78914_B0_TXPMD_SOBMH_FROM_CPU_RQE_Q_NUM}, \ - {"SOBMH_FROM_CPU::SPAP", BCM78914_B0_TXPMD_SOBMH_FROM_CPU_SPAP}, \ - {"SOBMH_FROM_CPU::SPID", BCM78914_B0_TXPMD_SOBMH_FROM_CPU_SPID}, \ - {"SOBMH_FROM_CPU::SPID_OVERRIDE", BCM78914_B0_TXPMD_SOBMH_FROM_CPU_SPID_OVERRIDE}, \ - {"SOBMH_FROM_CPU::SRC_MODID", BCM78914_B0_TXPMD_SOBMH_FROM_CPU_SRC_MODID}, \ - {"SOBMH_FROM_CPU::TX_TS", BCM78914_B0_TXPMD_SOBMH_FROM_CPU_TX_TS}, \ - {"SOBMH_FROM_CPU::UNICAST", BCM78914_B0_TXPMD_SOBMH_FROM_CPU_UNICAST}, \ - {"SOBMH_FROM_CPU::WRED_MARK_ELIGIBLE", BCM78914_B0_TXPMD_SOBMH_FROM_CPU_WRED_MARK_ELIGIBLE}, \ - {"SOBMH_FROM_CPU::WRED_RESPONSE", BCM78914_B0_TXPMD_SOBMH_FROM_CPU_WRED_RESPONSE}, \ - {"HEADER_TYPE", BCM78914_B0_TXPMD_HEADER_TYPE}, \ - {"START", BCM78914_B0_TXPMD_START}, \ - {"COUNT", BCM78914_B0_TXPMD_COUNT} - -/*! - * \name BCM78914_B0_TXPMD_CPU_TX_DESTINATION_TYPE encodings. - * \anchor BCM78914_B0_TXPMD_CPU_TX_DESTINATION_TYPE_XXX - */ -/*! \{ */ -#define BCM78914_B0_TXPMD_CPU_TX_DESTINATION_TYPE_EGRESS_PORT 0 -#define BCM78914_B0_TXPMD_CPU_TX_DESTINATION_TYPE_NHI 1 -#define BCM78914_B0_TXPMD_CPU_TX_DESTINATION_TYPE_ECMP 2 -#define BCM78914_B0_TXPMD_CPU_TX_DESTINATION_TYPE_ECMP_MEMBER 3 -#define BCM78914_B0_TXPMD_CPU_TX_DESTINATION_TYPE_IPMC 4 -#define BCM78914_B0_TXPMD_CPU_TX_DESTINATION_TYPE_L2MC 5 -#define BCM78914_B0_TXPMD_CPU_TX_DESTINATION_TYPE_VLAN_FLOOD 6 -#define BCM78914_B0_TXPMD_CPU_TX_DESTINATION_TYPE_LAG_ID 8 -#define BCM78914_B0_TXPMD_CPU_TX_DESTINATION_TYPE_FORWARD 15 -/*! \} */ - -/*! BCM78914_B0_TXPMD_CPU_TX_DESTINATION_TYPE encoding name strings maps. */ -#define BCM78914_B0_TXPMD_CPU_TX_DESTINATION_TYPE_NAME_MAP_INIT \ - {"EGRESS_PORT", BCM78914_B0_TXPMD_CPU_TX_DESTINATION_TYPE_EGRESS_PORT},\ - {"NHI", BCM78914_B0_TXPMD_CPU_TX_DESTINATION_TYPE_NHI},\ - {"ECMP", BCM78914_B0_TXPMD_CPU_TX_DESTINATION_TYPE_ECMP},\ - {"ECMP_MEMBER", BCM78914_B0_TXPMD_CPU_TX_DESTINATION_TYPE_ECMP_MEMBER},\ - {"IPMC", BCM78914_B0_TXPMD_CPU_TX_DESTINATION_TYPE_IPMC},\ - {"L2MC", BCM78914_B0_TXPMD_CPU_TX_DESTINATION_TYPE_L2MC},\ - {"VLAN_FLOOD", BCM78914_B0_TXPMD_CPU_TX_DESTINATION_TYPE_VLAN_FLOOD},\ - {"LAG_ID", BCM78914_B0_TXPMD_CPU_TX_DESTINATION_TYPE_LAG_ID},\ - {"FORWARD", BCM78914_B0_TXPMD_CPU_TX_DESTINATION_TYPE_FORWARD},\ - {NULL, 0} - -/*! - * \name BCM78914_B0_TXPMD_CPU_TX_DP encodings. - * \anchor BCM78914_B0_TXPMD_CPU_TX_DP_XXX - */ -/*! \{ */ -#define BCM78914_B0_TXPMD_CPU_TX_DP_GREEN 0 -#define BCM78914_B0_TXPMD_CPU_TX_DP_RED 1 -#define BCM78914_B0_TXPMD_CPU_TX_DP_YELLOW 3 -/*! \} */ - -/*! BCM78914_B0_TXPMD_CPU_TX_DP encoding name strings maps. */ -#define BCM78914_B0_TXPMD_CPU_TX_DP_NAME_MAP_INIT \ - {"GREEN", BCM78914_B0_TXPMD_CPU_TX_DP_GREEN},\ - {"RED", BCM78914_B0_TXPMD_CPU_TX_DP_RED},\ - {"YELLOW", BCM78914_B0_TXPMD_CPU_TX_DP_YELLOW},\ - {NULL, 0} - -/*! - * \name BCM78914_B0_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE encodings. - * \anchor BCM78914_B0_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE_XXX - */ -/*! \{ */ -#define BCM78914_B0_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE_EGRESS_PORT 0 -#define BCM78914_B0_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE_L2_PBM 7 -#define BCM78914_B0_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE_INVALID 15 -/*! \} */ - -/*! BCM78914_B0_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE encoding name strings maps. */ -#define BCM78914_B0_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE_NAME_MAP_INIT \ - {"EGRESS_PORT", BCM78914_B0_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE_EGRESS_PORT},\ - {"L2_PBM", BCM78914_B0_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE_L2_PBM},\ - {"INVALID", BCM78914_B0_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE_INVALID},\ - {NULL, 0} - -/*! - * \name BCM78914_B0_TXPMD_HEADER_TYPE encodings. - * \anchor BCM78914_B0_TXPMD_HEADER_TYPE_XXX - */ -/*! \{ */ -#define BCM78914_B0_TXPMD_HEADER_TYPE_RESERVED 0 -#define BCM78914_B0_TXPMD_HEADER_TYPE_SOBMH 1 -#define BCM78914_B0_TXPMD_HEADER_TYPE_CPU_TX 2 -#define BCM78914_B0_TXPMD_HEADER_TYPE_CTC 3 -#define BCM78914_B0_TXPMD_HEADER_TYPE_MIRROR 4 -#define BCM78914_B0_TXPMD_HEADER_TYPE_RESERVED_1 5 -#define BCM78914_B0_TXPMD_HEADER_TYPE_ETH_TYPE_NONE 6 -#define BCM78914_B0_TXPMD_HEADER_TYPE_ETH_TYPE_IP_ETH_CLASSIC 7 -#define BCM78914_B0_TXPMD_HEADER_TYPE_ETH_TYPE_EP_ETH_CLASSIC 8 -#define BCM78914_B0_TXPMD_HEADER_TYPE_ETH_TYPE_IP_S_MOD 9 -#define BCM78914_B0_TXPMD_HEADER_TYPE_ETH_TYPE_EP_S_MOD 10 -#define BCM78914_B0_TXPMD_HEADER_TYPE_ETH_TYPE_EP_REDIRECT_IFA_PROBE_INIT 11 -#define BCM78914_B0_TXPMD_HEADER_TYPE_ETH_TYPE_EP_REDIRECT_OTHER 12 -#define BCM78914_B0_TXPMD_HEADER_TYPE_MIRROR_TO_CPU 13 -#define BCM78914_B0_TXPMD_HEADER_TYPE_IFA_EP_REDIRECT_IFA_PROBE_INIT 14 -#define BCM78914_B0_TXPMD_HEADER_TYPE_DOP 15 -/*! \} */ - -/*! BCM78914_B0_TXPMD_HEADER_TYPE encoding name strings maps. */ -#define BCM78914_B0_TXPMD_HEADER_TYPE_NAME_MAP_INIT \ - {"RESERVED", BCM78914_B0_TXPMD_HEADER_TYPE_RESERVED},\ - {"SOBMH", BCM78914_B0_TXPMD_HEADER_TYPE_SOBMH},\ - {"CPU_TX", BCM78914_B0_TXPMD_HEADER_TYPE_CPU_TX},\ - {"CTC", BCM78914_B0_TXPMD_HEADER_TYPE_CTC},\ - {"MIRROR", BCM78914_B0_TXPMD_HEADER_TYPE_MIRROR},\ - {"RESERVED_1", BCM78914_B0_TXPMD_HEADER_TYPE_RESERVED_1},\ - {"ETH_TYPE_NONE", BCM78914_B0_TXPMD_HEADER_TYPE_ETH_TYPE_NONE},\ - {"ETH_TYPE_IP_ETH_CLASSIC", BCM78914_B0_TXPMD_HEADER_TYPE_ETH_TYPE_IP_ETH_CLASSIC},\ - {"ETH_TYPE_EP_ETH_CLASSIC", BCM78914_B0_TXPMD_HEADER_TYPE_ETH_TYPE_EP_ETH_CLASSIC},\ - {"ETH_TYPE_IP_S_MOD", BCM78914_B0_TXPMD_HEADER_TYPE_ETH_TYPE_IP_S_MOD},\ - {"ETH_TYPE_EP_S_MOD", BCM78914_B0_TXPMD_HEADER_TYPE_ETH_TYPE_EP_S_MOD},\ - {"ETH_TYPE_EP_REDIRECT_IFA_PROBE_INIT", BCM78914_B0_TXPMD_HEADER_TYPE_ETH_TYPE_EP_REDIRECT_IFA_PROBE_INIT},\ - {"ETH_TYPE_EP_REDIRECT_OTHER", BCM78914_B0_TXPMD_HEADER_TYPE_ETH_TYPE_EP_REDIRECT_OTHER},\ - {"MIRROR_TO_CPU", BCM78914_B0_TXPMD_HEADER_TYPE_MIRROR_TO_CPU},\ - {"IFA_EP_REDIRECT_IFA_PROBE_INIT", BCM78914_B0_TXPMD_HEADER_TYPE_IFA_EP_REDIRECT_IFA_PROBE_INIT},\ - {"DOP", BCM78914_B0_TXPMD_HEADER_TYPE_DOP},\ - {NULL, 0} - -/*! - * \name BCM78914_B0_TXPMD_START encodings. - * \anchor BCM78914_B0_TXPMD_START_XXX - */ -/*! \{ */ -#define BCM78914_B0_TXPMD_START_INTERNAL 2 -/*! \} */ - -/*! BCM78914_B0_TXPMD_START encoding name strings maps. */ -#define BCM78914_B0_TXPMD_START_NAME_MAP_INIT \ - {"INTERNAL", BCM78914_B0_TXPMD_START_INTERNAL},\ - {NULL, 0} - -/* LBHDR defines */ -#define BCM78914_B0_LBHDR_PKT_PROFILE 0 -#define BCM78914_B0_LBHDR_QOS_FIELD_VALID 1 -#define BCM78914_B0_LBHDR_VFI_VALID_MD_ETH 2 -#define BCM78914_B0_LBHDR_VRF_VALID 3 -#define BCM78914_B0_LBHDR_VFI_MD_ETH 4 -#define BCM78914_B0_LBHDR_VRF 5 -#define BCM78914_B0_LBHDR_PP_PORT 6 -#define BCM78914_B0_LBHDR_VISIBILITY_PKT 7 -#define BCM78914_B0_LBHDR_ROUTED_PKT 8 -#define BCM78914_B0_LBHDR_OPAQUE_OBJECT 9 -#define BCM78914_B0_LBHDR_QOS_FIELD_ETH 10 -#define BCM78914_B0_LBHDR_INT_PRI_ETH 11 -#define BCM78914_B0_LBHDR_INT_CN_ETH 12 -#define BCM78914_B0_LBHDR_CNG_ETH 13 -#define BCM78914_B0_LBHDR_INPUT_PRIORITY_MD_ETH 14 -#define BCM78914_B0_LBHDR_HEADER_TYPE 15 -#define BCM78914_B0_LBHDR_START 16 -#define BCM78914_B0_LBHDR_COUNT 17 - -/* LBHDR name map */ -#define BCM78914_B0_LBHDR_NAME_MAP_INIT \ - {"PKT_PROFILE", BCM78914_B0_LBHDR_PKT_PROFILE}, \ - {"QOS_FIELD_VALID", BCM78914_B0_LBHDR_QOS_FIELD_VALID}, \ - {"VFI_VALID_MD_ETH", BCM78914_B0_LBHDR_VFI_VALID_MD_ETH}, \ - {"VRF_VALID", BCM78914_B0_LBHDR_VRF_VALID}, \ - {"VFI_MD_ETH", BCM78914_B0_LBHDR_VFI_MD_ETH}, \ - {"VRF", BCM78914_B0_LBHDR_VRF}, \ - {"PP_PORT", BCM78914_B0_LBHDR_PP_PORT}, \ - {"VISIBILITY_PKT", BCM78914_B0_LBHDR_VISIBILITY_PKT}, \ - {"ROUTED_PKT", BCM78914_B0_LBHDR_ROUTED_PKT}, \ - {"OPAQUE_OBJECT", BCM78914_B0_LBHDR_OPAQUE_OBJECT}, \ - {"QOS_FIELD_ETH", BCM78914_B0_LBHDR_QOS_FIELD_ETH}, \ - {"INT_PRI_ETH", BCM78914_B0_LBHDR_INT_PRI_ETH}, \ - {"INT_CN_ETH", BCM78914_B0_LBHDR_INT_CN_ETH}, \ - {"CNG_ETH", BCM78914_B0_LBHDR_CNG_ETH}, \ - {"INPUT_PRIORITY_MD_ETH", BCM78914_B0_LBHDR_INPUT_PRIORITY_MD_ETH}, \ - {"HEADER_TYPE", BCM78914_B0_LBHDR_HEADER_TYPE}, \ - {"START", BCM78914_B0_LBHDR_START}, \ - {"COUNT", BCM78914_B0_LBHDR_COUNT} - -/*! - * \name BCM78914_B0_LBHDR_HEADER_TYPE encodings. - * \anchor BCM78914_B0_LBHDR_HEADER_TYPE_XXX - */ -/*! \{ */ -#define BCM78914_B0_LBHDR_HEADER_TYPE_LOOPBACK_MH 7 -/*! \} */ - -/*! BCM78914_B0_LBHDR_HEADER_TYPE encoding name strings maps. */ -#define BCM78914_B0_LBHDR_HEADER_TYPE_NAME_MAP_INIT \ - {"LOOPBACK_MH", BCM78914_B0_LBHDR_HEADER_TYPE_LOOPBACK_MH},\ - {NULL, 0} - -/*! - * \name BCM78914_B0_LBHDR_START encodings. - * \anchor BCM78914_B0_LBHDR_START_XXX - */ -/*! \{ */ -#define BCM78914_B0_LBHDR_START_INTERNAL 2 -/*! \} */ - -/*! BCM78914_B0_LBHDR_START encoding name strings maps. */ -#define BCM78914_B0_LBHDR_START_NAME_MAP_INIT \ - {"INTERNAL", BCM78914_B0_LBHDR_START_INTERNAL},\ - {NULL, 0} - -#endif /* BCM78914_B0_PMD_FIELD_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm78914_b1/bcm78914_b1_pmd_field.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm78914_b1/bcm78914_b1_pmd_field.h deleted file mode 100644 index 530b12ae98a..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm78914_b1/bcm78914_b1_pmd_field.h +++ /dev/null @@ -1,538 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated from the registers file. - * Edits to this file will be lost when it is regenerated. - * Tool: INTERNAL/regs/xgs/generate-pmd.pl - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - * This file provides PMD field defines for BCM78914_B1. - * - ******************************************************************************/ - -#ifndef BCM78914_B1_PMD_FIELD_H -#define BCM78914_B1_PMD_FIELD_H - -/* RXPMD defines */ -#define BCM78914_B1_RXPMD_REASON 0 -#define BCM78914_B1_RXPMD_REASON_TYPE 1 -#define BCM78914_B1_RXPMD_I2E_CLASSID 2 -#define BCM78914_B1_RXPMD_RX_BFD_SESSION_INDEX 3 -#define BCM78914_B1_RXPMD_I2E_CLASSID_TYPE 4 -#define BCM78914_B1_RXPMD_RX_BFD_START_OFFSET_TYPE 5 -#define BCM78914_B1_RXPMD_RX_BFD_START_OFFSET 6 -#define BCM78914_B1_RXPMD_CPU_COS 7 -#define BCM78914_B1_RXPMD_QUEUE_NUM 8 -#define BCM78914_B1_RXPMD_ING_L3_INTF 9 -#define BCM78914_B1_RXPMD_INCOMING_TAG_STATUS 10 -#define BCM78914_B1_RXPMD_ING_OTAG_ACTION 11 -#define BCM78914_B1_RXPMD_PKT_LENGTH 12 -#define BCM78914_B1_RXPMD_O_NHI 13 -#define BCM78914_B1_RXPMD_INCOMING_OPAQUE_TAG_STATUS 14 -#define BCM78914_B1_RXPMD_BPDU 15 -#define BCM78914_B1_RXPMD_CHANGE_DSCP 16 -#define BCM78914_B1_RXPMD_CHANGE_ECN 17 -#define BCM78914_B1_RXPMD_DLB_ID_VALID 18 -#define BCM78914_B1_RXPMD_DO_NOT_CHANGE_TTL 19 -#define BCM78914_B1_RXPMD_DSCP 20 -#define BCM78914_B1_RXPMD_SPECIAL_PACKET_TYPE 21 -#define BCM78914_B1_RXPMD_ECN 22 -#define BCM78914_B1_RXPMD_IP_ROUTED 23 -#define BCM78914_B1_RXPMD_L3ONLY 24 -#define BCM78914_B1_RXPMD_MATCHED_RULE 25 -#define BCM78914_B1_RXPMD_MATCHED_RULE_EP 26 -#define BCM78914_B1_RXPMD_IS_EGR_TS 27 -#define BCM78914_B1_RXPMD_MTP_INDEX 28 -#define BCM78914_B1_RXPMD_OUTER_CFI 29 -#define BCM78914_B1_RXPMD_OUTER_PRI 30 -#define BCM78914_B1_RXPMD_OUTER_VID 31 -#define BCM78914_B1_RXPMD_REPLICATION_OR_NHOP_INDEX 32 -#define BCM78914_B1_RXPMD_MODIFIED_PKT 33 -#define BCM78914_B1_RXPMD_ENTROPY_LABEL 34 -#define BCM78914_B1_RXPMD_SPECIAL_PACKET_INDICATOR 35 -#define BCM78914_B1_RXPMD_SRC_PORT_NUM 36 -#define BCM78914_B1_RXPMD_SWITCH 37 -#define BCM78914_B1_RXPMD_TIMESTAMP 38 -#define BCM78914_B1_RXPMD_TIMESTAMP_HI 39 -#define BCM78914_B1_RXPMD_IEEE_802_1AS_TIMESTAMP_ENABLED 40 -#define BCM78914_B1_RXPMD_TUNNEL_DECAP_TYPE 41 -#define BCM78914_B1_RXPMD_UC_SW_COPY_DROPPED 42 -#define BCM78914_B1_RXPMD_UNICAST_QUEUE 43 -#define BCM78914_B1_RXPMD_INCOMING_INT_HDR_TYPE 44 -#define BCM78914_B1_RXPMD_DLB_ID 45 -#define BCM78914_B1_RXPMD_MODULE_HDR 46 -#define BCM78914_B1_RXPMD_COUNT 47 - -/* RXPMD name map */ -#define BCM78914_B1_RXPMD_NAME_MAP_INIT \ - {"REASON", BCM78914_B1_RXPMD_REASON}, \ - {"REASON_TYPE", BCM78914_B1_RXPMD_REASON_TYPE}, \ - {"I2E_CLASSID", BCM78914_B1_RXPMD_I2E_CLASSID}, \ - {"RX_BFD_SESSION_INDEX", BCM78914_B1_RXPMD_RX_BFD_SESSION_INDEX}, \ - {"I2E_CLASSID_TYPE", BCM78914_B1_RXPMD_I2E_CLASSID_TYPE}, \ - {"RX_BFD_START_OFFSET_TYPE", BCM78914_B1_RXPMD_RX_BFD_START_OFFSET_TYPE}, \ - {"RX_BFD_START_OFFSET", BCM78914_B1_RXPMD_RX_BFD_START_OFFSET}, \ - {"CPU_COS", BCM78914_B1_RXPMD_CPU_COS}, \ - {"QUEUE_NUM", BCM78914_B1_RXPMD_QUEUE_NUM}, \ - {"ING_L3_INTF", BCM78914_B1_RXPMD_ING_L3_INTF}, \ - {"INCOMING_TAG_STATUS", BCM78914_B1_RXPMD_INCOMING_TAG_STATUS}, \ - {"ING_OTAG_ACTION", BCM78914_B1_RXPMD_ING_OTAG_ACTION}, \ - {"PKT_LENGTH", BCM78914_B1_RXPMD_PKT_LENGTH}, \ - {"O_NHI", BCM78914_B1_RXPMD_O_NHI}, \ - {"INCOMING_OPAQUE_TAG_STATUS", BCM78914_B1_RXPMD_INCOMING_OPAQUE_TAG_STATUS}, \ - {"BPDU", BCM78914_B1_RXPMD_BPDU}, \ - {"CHANGE_DSCP", BCM78914_B1_RXPMD_CHANGE_DSCP}, \ - {"CHANGE_ECN", BCM78914_B1_RXPMD_CHANGE_ECN}, \ - {"DLB_ID_VALID", BCM78914_B1_RXPMD_DLB_ID_VALID}, \ - {"DO_NOT_CHANGE_TTL", BCM78914_B1_RXPMD_DO_NOT_CHANGE_TTL}, \ - {"DSCP", BCM78914_B1_RXPMD_DSCP}, \ - {"SPECIAL_PACKET_TYPE", BCM78914_B1_RXPMD_SPECIAL_PACKET_TYPE}, \ - {"ECN", BCM78914_B1_RXPMD_ECN}, \ - {"IP_ROUTED", BCM78914_B1_RXPMD_IP_ROUTED}, \ - {"L3ONLY", BCM78914_B1_RXPMD_L3ONLY}, \ - {"MATCHED_RULE", BCM78914_B1_RXPMD_MATCHED_RULE}, \ - {"MATCHED_RULE_EP", BCM78914_B1_RXPMD_MATCHED_RULE_EP}, \ - {"IS_EGR_TS", BCM78914_B1_RXPMD_IS_EGR_TS}, \ - {"MTP_INDEX", BCM78914_B1_RXPMD_MTP_INDEX}, \ - {"OUTER_CFI", BCM78914_B1_RXPMD_OUTER_CFI}, \ - {"OUTER_PRI", BCM78914_B1_RXPMD_OUTER_PRI}, \ - {"OUTER_VID", BCM78914_B1_RXPMD_OUTER_VID}, \ - {"REPLICATION_OR_NHOP_INDEX", BCM78914_B1_RXPMD_REPLICATION_OR_NHOP_INDEX}, \ - {"MODIFIED_PKT", BCM78914_B1_RXPMD_MODIFIED_PKT}, \ - {"ENTROPY_LABEL", BCM78914_B1_RXPMD_ENTROPY_LABEL}, \ - {"SPECIAL_PACKET_INDICATOR", BCM78914_B1_RXPMD_SPECIAL_PACKET_INDICATOR}, \ - {"SRC_PORT_NUM", BCM78914_B1_RXPMD_SRC_PORT_NUM}, \ - {"SWITCH", BCM78914_B1_RXPMD_SWITCH}, \ - {"TIMESTAMP", BCM78914_B1_RXPMD_TIMESTAMP}, \ - {"TIMESTAMP_HI", BCM78914_B1_RXPMD_TIMESTAMP_HI}, \ - {"IEEE_802_1AS_TIMESTAMP_ENABLED", BCM78914_B1_RXPMD_IEEE_802_1AS_TIMESTAMP_ENABLED}, \ - {"TUNNEL_DECAP_TYPE", BCM78914_B1_RXPMD_TUNNEL_DECAP_TYPE}, \ - {"UC_SW_COPY_DROPPED", BCM78914_B1_RXPMD_UC_SW_COPY_DROPPED}, \ - {"UNICAST_QUEUE", BCM78914_B1_RXPMD_UNICAST_QUEUE}, \ - {"INCOMING_INT_HDR_TYPE", BCM78914_B1_RXPMD_INCOMING_INT_HDR_TYPE}, \ - {"DLB_ID", BCM78914_B1_RXPMD_DLB_ID}, \ - {"MODULE_HDR", BCM78914_B1_RXPMD_MODULE_HDR}, \ - {"COUNT", BCM78914_B1_RXPMD_COUNT} - -/*! - * \name BCM78914_B1_RXPMD_REASON_TYPE encodings. - * \anchor BCM78914_B1_RXPMD_REASON_TYPE_XXX - */ -/*! \{ */ -#define BCM78914_B1_RXPMD_REASON_TYPE_CTC_INITIATED_FROM_IP 0 -#define BCM78914_B1_RXPMD_REASON_TYPE_CTC_INITIATED_FROM_EP 1 -/*! \} */ - -/*! BCM78914_B1_RXPMD_REASON_TYPE encoding name strings maps. */ -#define BCM78914_B1_RXPMD_REASON_TYPE_NAME_MAP_INIT \ - {"CTC_INITIATED_FROM_IP", BCM78914_B1_RXPMD_REASON_TYPE_CTC_INITIATED_FROM_IP},\ - {"CTC_INITIATED_FROM_EP", BCM78914_B1_RXPMD_REASON_TYPE_CTC_INITIATED_FROM_EP},\ - {NULL, 0} - -/* RX_REASON defines */ -#define BCM78914_B1_RX_REASON_CPU_INVALID_REASON 0 -#define BCM78914_B1_RX_REASON_CPU_SLF 1 -#define BCM78914_B1_RX_REASON_CPU_DLF 2 -#define BCM78914_B1_RX_REASON_CPU_L2MOVE 3 -#define BCM78914_B1_RX_REASON_CPU_L2CPU 4 -#define BCM78914_B1_RX_REASON_CPU_L3SRC_MISS 5 -#define BCM78914_B1_RX_REASON_CPU_L3DST_MISS 6 -#define BCM78914_B1_RX_REASON_CPU_L3SRC_MOVE 7 -#define BCM78914_B1_RX_REASON_CPU_MC_MISS 8 -#define BCM78914_B1_RX_REASON_CPU_IPMC_MISS 9 -#define BCM78914_B1_RX_REASON_CPU_FFP 10 -#define BCM78914_B1_RX_REASON_CPU_L3HDR_ERR 11 -#define BCM78914_B1_RX_REASON_CPU_PROTOCOL_PKT 12 -#define BCM78914_B1_RX_REASON_CPU_DOS_ATTACK 13 -#define BCM78914_B1_RX_REASON_CPU_MARTIAN_ADDR 14 -#define BCM78914_B1_RX_REASON_CPU_TUNNEL_ERR 15 -#define BCM78914_B1_RX_REASON_CPU_SFLOW_SRC 16 -#define BCM78914_B1_RX_REASON_CPU_SFLOW_DST 17 -#define BCM78914_B1_RX_REASON_ICMP_REDIRECT 18 -#define BCM78914_B1_RX_REASON_L3_SLOWPATH 19 -#define BCM78914_B1_RX_REASON_PARITY_ERROR 20 -#define BCM78914_B1_RX_REASON_L3_MTU_CHECK_FAIL 21 -#define BCM78914_B1_RX_REASON_MPLS_TTL_CHECK 22 -#define BCM78914_B1_RX_REASON_MPLS_LABEL_MISS 23 -#define BCM78914_B1_RX_REASON_MPLS_INVALID_ACTION 24 -#define BCM78914_B1_RX_REASON_MPLS_INVALID_PAYLOAD 25 -#define BCM78914_B1_RX_REASON_CPU_VFP 26 -#define BCM78914_B1_RX_REASON_PBT_NONUC_PKT 27 -#define BCM78914_B1_RX_REASON_L3_NEXT_HOP 28 -#define BCM78914_B1_RX_REASON_MY_STATION 29 -#define BCM78914_B1_RX_REASON_TIME_SYNC 30 -#define BCM78914_B1_RX_REASON_TUNNEL_DECAP_ECN_ERROR 31 -#define BCM78914_B1_RX_REASON_BFD_SLOWPATH 32 -#define BCM78914_B1_RX_REASON_BFD_ERROR 33 -#define BCM78914_B1_RX_REASON_PACKET_TRACE_TO_CPU 34 -#define BCM78914_B1_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT 35 -#define BCM78914_B1_RX_REASON_MPLS_ALERT_LABEL 36 -#define BCM78914_B1_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH 37 -#define BCM78914_B1_RX_REASON_DLB_MONITOR 38 -#define BCM78914_B1_RX_REASON_CPU_SFLOW_FLEX 39 -#define BCM78914_B1_RX_REASON_CPU_UVLAN 40 -#define BCM78914_B1_RX_REASON_SRV6_ERROR 41 -#define BCM78914_B1_RX_REASON_VXLAN_VN_ID_MISS 42 -#define BCM78914_B1_RX_REASON_VXLAN_SIP_MISS 43 -#define BCM78914_B1_RX_REASON_ADAPT_MISS 44 -#define BCM78914_B1_RX_REASON_INVALID_GSH_NON_GSH 45 -#define BCM78914_B1_RX_REASON_APU_POLICY_CTC 46 -#define BCM78914_B1_RX_REASON_DELAYED_CTC 47 -#define BCM78914_B1_RX_REASON_PORT_DOWN 48 -#define BCM78914_B1_RX_REASON_SRV6_CONTROL_PKT 49 -#define BCM78914_B1_RX_REASON_OUI_COMPRESSION_MISS 50 -#define BCM78914_B1_RX_REASON_COUNT 51 - -/* RX_REASON name map */ -#define BCM78914_B1_RX_REASON_NAME_MAP_INIT \ - {"CPU_INVALID_REASON", BCM78914_B1_RX_REASON_CPU_INVALID_REASON}, \ - {"CPU_SLF", BCM78914_B1_RX_REASON_CPU_SLF}, \ - {"CPU_DLF", BCM78914_B1_RX_REASON_CPU_DLF}, \ - {"CPU_L2MOVE", BCM78914_B1_RX_REASON_CPU_L2MOVE}, \ - {"CPU_L2CPU", BCM78914_B1_RX_REASON_CPU_L2CPU}, \ - {"CPU_L3SRC_MISS", BCM78914_B1_RX_REASON_CPU_L3SRC_MISS}, \ - {"CPU_L3DST_MISS", BCM78914_B1_RX_REASON_CPU_L3DST_MISS}, \ - {"CPU_L3SRC_MOVE", BCM78914_B1_RX_REASON_CPU_L3SRC_MOVE}, \ - {"CPU_MC_MISS", BCM78914_B1_RX_REASON_CPU_MC_MISS}, \ - {"CPU_IPMC_MISS", BCM78914_B1_RX_REASON_CPU_IPMC_MISS}, \ - {"CPU_FFP", BCM78914_B1_RX_REASON_CPU_FFP}, \ - {"CPU_L3HDR_ERR", BCM78914_B1_RX_REASON_CPU_L3HDR_ERR}, \ - {"CPU_PROTOCOL_PKT", BCM78914_B1_RX_REASON_CPU_PROTOCOL_PKT}, \ - {"CPU_DOS_ATTACK", BCM78914_B1_RX_REASON_CPU_DOS_ATTACK}, \ - {"CPU_MARTIAN_ADDR", BCM78914_B1_RX_REASON_CPU_MARTIAN_ADDR}, \ - {"CPU_TUNNEL_ERR", BCM78914_B1_RX_REASON_CPU_TUNNEL_ERR}, \ - {"CPU_SFLOW_SRC", BCM78914_B1_RX_REASON_CPU_SFLOW_SRC}, \ - {"CPU_SFLOW_DST", BCM78914_B1_RX_REASON_CPU_SFLOW_DST}, \ - {"ICMP_REDIRECT", BCM78914_B1_RX_REASON_ICMP_REDIRECT}, \ - {"L3_SLOWPATH", BCM78914_B1_RX_REASON_L3_SLOWPATH}, \ - {"PARITY_ERROR", BCM78914_B1_RX_REASON_PARITY_ERROR}, \ - {"L3_MTU_CHECK_FAIL", BCM78914_B1_RX_REASON_L3_MTU_CHECK_FAIL}, \ - {"MPLS_TTL_CHECK", BCM78914_B1_RX_REASON_MPLS_TTL_CHECK}, \ - {"MPLS_LABEL_MISS", BCM78914_B1_RX_REASON_MPLS_LABEL_MISS}, \ - {"MPLS_INVALID_ACTION", BCM78914_B1_RX_REASON_MPLS_INVALID_ACTION}, \ - {"MPLS_INVALID_PAYLOAD", BCM78914_B1_RX_REASON_MPLS_INVALID_PAYLOAD}, \ - {"CPU_VFP", BCM78914_B1_RX_REASON_CPU_VFP}, \ - {"PBT_NONUC_PKT", BCM78914_B1_RX_REASON_PBT_NONUC_PKT}, \ - {"L3_NEXT_HOP", BCM78914_B1_RX_REASON_L3_NEXT_HOP}, \ - {"MY_STATION", BCM78914_B1_RX_REASON_MY_STATION}, \ - {"TIME_SYNC", BCM78914_B1_RX_REASON_TIME_SYNC}, \ - {"TUNNEL_DECAP_ECN_ERROR", BCM78914_B1_RX_REASON_TUNNEL_DECAP_ECN_ERROR}, \ - {"BFD_SLOWPATH", BCM78914_B1_RX_REASON_BFD_SLOWPATH}, \ - {"BFD_ERROR", BCM78914_B1_RX_REASON_BFD_ERROR}, \ - {"PACKET_TRACE_TO_CPU", BCM78914_B1_RX_REASON_PACKET_TRACE_TO_CPU}, \ - {"MPLS_UNKNOWN_CONTROL_PKT", BCM78914_B1_RX_REASON_MPLS_UNKNOWN_CONTROL_PKT}, \ - {"MPLS_ALERT_LABEL", BCM78914_B1_RX_REASON_MPLS_ALERT_LABEL}, \ - {"CPU_IPMC_INTERFACE_MISMATCH", BCM78914_B1_RX_REASON_CPU_IPMC_INTERFACE_MISMATCH}, \ - {"DLB_MONITOR", BCM78914_B1_RX_REASON_DLB_MONITOR}, \ - {"CPU_SFLOW_FLEX", BCM78914_B1_RX_REASON_CPU_SFLOW_FLEX}, \ - {"CPU_UVLAN", BCM78914_B1_RX_REASON_CPU_UVLAN}, \ - {"SRV6_ERROR", BCM78914_B1_RX_REASON_SRV6_ERROR}, \ - {"VXLAN_VN_ID_MISS", BCM78914_B1_RX_REASON_VXLAN_VN_ID_MISS}, \ - {"VXLAN_SIP_MISS", BCM78914_B1_RX_REASON_VXLAN_SIP_MISS}, \ - {"ADAPT_MISS", BCM78914_B1_RX_REASON_ADAPT_MISS}, \ - {"INVALID_GSH_NON_GSH", BCM78914_B1_RX_REASON_INVALID_GSH_NON_GSH}, \ - {"APU_POLICY_CTC", BCM78914_B1_RX_REASON_APU_POLICY_CTC}, \ - {"DELAYED_CTC", BCM78914_B1_RX_REASON_DELAYED_CTC}, \ - {"PORT_DOWN", BCM78914_B1_RX_REASON_PORT_DOWN}, \ - {"SRV6_CONTROL_PKT", BCM78914_B1_RX_REASON_SRV6_CONTROL_PKT}, \ - {"OUI_COMPRESSION_MISS", BCM78914_B1_RX_REASON_OUI_COMPRESSION_MISS}, \ - {"COUNT", BCM78914_B1_RX_REASON_COUNT} - -/* EP_RX_REASON defines */ -#define BCM78914_B1_EP_RX_REASON_EP_CTC 0 -#define BCM78914_B1_EP_RX_REASON_COUNT 1 - -/* EP_RX_REASON name map */ -#define BCM78914_B1_EP_RX_REASON_NAME_MAP_INIT \ - {"EP_CTC", BCM78914_B1_EP_RX_REASON_EP_CTC}, \ - {"COUNT", BCM78914_B1_EP_RX_REASON_COUNT} - -/* TXPMD defines */ -#define BCM78914_B1_TXPMD_CPU_TX_ECMP_MEMBER_ID 0 -#define BCM78914_B1_TXPMD_CPU_TX_MCAST_LB_INDEX 1 -#define BCM78914_B1_TXPMD_CPU_TX_COOKIE 2 -#define BCM78914_B1_TXPMD_CPU_TX_COOKIE_VALID 3 -#define BCM78914_B1_TXPMD_CPU_TX_DESTINATION 4 -#define BCM78914_B1_TXPMD_CPU_TX_DESTINATION_TYPE 5 -#define BCM78914_B1_TXPMD_CPU_TX_DP 6 -#define BCM78914_B1_TXPMD_CPU_TX_INPUT_PRI 7 -#define BCM78914_B1_TXPMD_CPU_TX_INT_CN 8 -#define BCM78914_B1_TXPMD_CPU_TX_INT_PRI 9 -#define BCM78914_B1_TXPMD_CPU_TX_MCAST_LB_INDEX_VLD 10 -#define BCM78914_B1_TXPMD_CPU_TX_PKT_PROFILE 11 -#define BCM78914_B1_TXPMD_CPU_TX_QOS_FIELDS_VLD 12 -#define BCM78914_B1_TXPMD_CPU_TX_ROUTED_PKT 13 -#define BCM78914_B1_TXPMD_CPU_TX_SVP 14 -#define BCM78914_B1_TXPMD_CPU_TX_VRF 15 -#define BCM78914_B1_TXPMD_CPU_TX_VRF_VALID 16 -#define BCM78914_B1_TXPMD_SOBMH_FROM_CPU_COOKIE_7_0 17 -#define BCM78914_B1_TXPMD_SOBMH_FROM_CPU_IEEE1588_TIMESTAMP_HDR_OFFSET 18 -#define BCM78914_B1_TXPMD_SOBMH_FROM_CPU_COOKIE_8 19 -#define BCM78914_B1_TXPMD_SOBMH_FROM_CPU_IEEE1588_REGEN_UDP_CHECKSUM 20 -#define BCM78914_B1_TXPMD_SOBMH_FROM_CPU_CELL_ERROR 21 -#define BCM78914_B1_TXPMD_SOBMH_FROM_CPU_CNG 22 -#define BCM78914_B1_TXPMD_SOBMH_FROM_CPU_COS 23 -#define BCM78914_B1_TXPMD_SOBMH_FROM_CPU_DESTINATION 24 -#define BCM78914_B1_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE 25 -#define BCM78914_B1_TXPMD_SOBMH_FROM_CPU_IEEE1588_INGRESS_TIMESTAMP_SIGN 26 -#define BCM78914_B1_TXPMD_SOBMH_FROM_CPU_IEEE1588_ONE_STEP_ENABLE 27 -#define BCM78914_B1_TXPMD_SOBMH_FROM_CPU_INPUT_PRI 28 -#define BCM78914_B1_TXPMD_SOBMH_FROM_CPU_RQE_Q_NUM 29 -#define BCM78914_B1_TXPMD_SOBMH_FROM_CPU_SPAP 30 -#define BCM78914_B1_TXPMD_SOBMH_FROM_CPU_SPID 31 -#define BCM78914_B1_TXPMD_SOBMH_FROM_CPU_SPID_OVERRIDE 32 -#define BCM78914_B1_TXPMD_SOBMH_FROM_CPU_SRC_MODID 33 -#define BCM78914_B1_TXPMD_SOBMH_FROM_CPU_TX_TS 34 -#define BCM78914_B1_TXPMD_SOBMH_FROM_CPU_UNICAST 35 -#define BCM78914_B1_TXPMD_SOBMH_FROM_CPU_WRED_MARK_ELIGIBLE 36 -#define BCM78914_B1_TXPMD_SOBMH_FROM_CPU_WRED_RESPONSE 37 -#define BCM78914_B1_TXPMD_HEADER_TYPE 38 -#define BCM78914_B1_TXPMD_START 39 -#define BCM78914_B1_TXPMD_COUNT 40 - -/* TXPMD name map */ -#define BCM78914_B1_TXPMD_NAME_MAP_INIT \ - {"CPU_TX::ECMP_MEMBER_ID", BCM78914_B1_TXPMD_CPU_TX_ECMP_MEMBER_ID}, \ - {"CPU_TX::MCAST_LB_INDEX", BCM78914_B1_TXPMD_CPU_TX_MCAST_LB_INDEX}, \ - {"CPU_TX::COOKIE", BCM78914_B1_TXPMD_CPU_TX_COOKIE}, \ - {"CPU_TX::COOKIE_VALID", BCM78914_B1_TXPMD_CPU_TX_COOKIE_VALID}, \ - {"CPU_TX::DESTINATION", BCM78914_B1_TXPMD_CPU_TX_DESTINATION}, \ - {"CPU_TX::DESTINATION_TYPE", BCM78914_B1_TXPMD_CPU_TX_DESTINATION_TYPE}, \ - {"CPU_TX::DP", BCM78914_B1_TXPMD_CPU_TX_DP}, \ - {"CPU_TX::INPUT_PRI", BCM78914_B1_TXPMD_CPU_TX_INPUT_PRI}, \ - {"CPU_TX::INT_CN", BCM78914_B1_TXPMD_CPU_TX_INT_CN}, \ - {"CPU_TX::INT_PRI", BCM78914_B1_TXPMD_CPU_TX_INT_PRI}, \ - {"CPU_TX::MCAST_LB_INDEX_VLD", BCM78914_B1_TXPMD_CPU_TX_MCAST_LB_INDEX_VLD}, \ - {"CPU_TX::PKT_PROFILE", BCM78914_B1_TXPMD_CPU_TX_PKT_PROFILE}, \ - {"CPU_TX::QOS_FIELDS_VLD", BCM78914_B1_TXPMD_CPU_TX_QOS_FIELDS_VLD}, \ - {"CPU_TX::ROUTED_PKT", BCM78914_B1_TXPMD_CPU_TX_ROUTED_PKT}, \ - {"CPU_TX::SVP", BCM78914_B1_TXPMD_CPU_TX_SVP}, \ - {"CPU_TX::VRF", BCM78914_B1_TXPMD_CPU_TX_VRF}, \ - {"CPU_TX::VRF_VALID", BCM78914_B1_TXPMD_CPU_TX_VRF_VALID}, \ - {"SOBMH_FROM_CPU::COOKIE_7_0", BCM78914_B1_TXPMD_SOBMH_FROM_CPU_COOKIE_7_0}, \ - {"SOBMH_FROM_CPU::IEEE1588_TIMESTAMP_HDR_OFFSET", BCM78914_B1_TXPMD_SOBMH_FROM_CPU_IEEE1588_TIMESTAMP_HDR_OFFSET}, \ - {"SOBMH_FROM_CPU::COOKIE_8", BCM78914_B1_TXPMD_SOBMH_FROM_CPU_COOKIE_8}, \ - {"SOBMH_FROM_CPU::IEEE1588_REGEN_UDP_CHECKSUM", BCM78914_B1_TXPMD_SOBMH_FROM_CPU_IEEE1588_REGEN_UDP_CHECKSUM}, \ - {"SOBMH_FROM_CPU::CELL_ERROR", BCM78914_B1_TXPMD_SOBMH_FROM_CPU_CELL_ERROR}, \ - {"SOBMH_FROM_CPU::CNG", BCM78914_B1_TXPMD_SOBMH_FROM_CPU_CNG}, \ - {"SOBMH_FROM_CPU::COS", BCM78914_B1_TXPMD_SOBMH_FROM_CPU_COS}, \ - {"SOBMH_FROM_CPU::DESTINATION", BCM78914_B1_TXPMD_SOBMH_FROM_CPU_DESTINATION}, \ - {"SOBMH_FROM_CPU::DESTINATION_TYPE", BCM78914_B1_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE}, \ - {"SOBMH_FROM_CPU::IEEE1588_INGRESS_TIMESTAMP_SIGN", BCM78914_B1_TXPMD_SOBMH_FROM_CPU_IEEE1588_INGRESS_TIMESTAMP_SIGN}, \ - {"SOBMH_FROM_CPU::IEEE1588_ONE_STEP_ENABLE", BCM78914_B1_TXPMD_SOBMH_FROM_CPU_IEEE1588_ONE_STEP_ENABLE}, \ - {"SOBMH_FROM_CPU::INPUT_PRI", BCM78914_B1_TXPMD_SOBMH_FROM_CPU_INPUT_PRI}, \ - {"SOBMH_FROM_CPU::RQE_Q_NUM", BCM78914_B1_TXPMD_SOBMH_FROM_CPU_RQE_Q_NUM}, \ - {"SOBMH_FROM_CPU::SPAP", BCM78914_B1_TXPMD_SOBMH_FROM_CPU_SPAP}, \ - {"SOBMH_FROM_CPU::SPID", BCM78914_B1_TXPMD_SOBMH_FROM_CPU_SPID}, \ - {"SOBMH_FROM_CPU::SPID_OVERRIDE", BCM78914_B1_TXPMD_SOBMH_FROM_CPU_SPID_OVERRIDE}, \ - {"SOBMH_FROM_CPU::SRC_MODID", BCM78914_B1_TXPMD_SOBMH_FROM_CPU_SRC_MODID}, \ - {"SOBMH_FROM_CPU::TX_TS", BCM78914_B1_TXPMD_SOBMH_FROM_CPU_TX_TS}, \ - {"SOBMH_FROM_CPU::UNICAST", BCM78914_B1_TXPMD_SOBMH_FROM_CPU_UNICAST}, \ - {"SOBMH_FROM_CPU::WRED_MARK_ELIGIBLE", BCM78914_B1_TXPMD_SOBMH_FROM_CPU_WRED_MARK_ELIGIBLE}, \ - {"SOBMH_FROM_CPU::WRED_RESPONSE", BCM78914_B1_TXPMD_SOBMH_FROM_CPU_WRED_RESPONSE}, \ - {"HEADER_TYPE", BCM78914_B1_TXPMD_HEADER_TYPE}, \ - {"START", BCM78914_B1_TXPMD_START}, \ - {"COUNT", BCM78914_B1_TXPMD_COUNT} - -/*! - * \name BCM78914_B1_TXPMD_CPU_TX_DESTINATION_TYPE encodings. - * \anchor BCM78914_B1_TXPMD_CPU_TX_DESTINATION_TYPE_XXX - */ -/*! \{ */ -#define BCM78914_B1_TXPMD_CPU_TX_DESTINATION_TYPE_EGRESS_PORT 0 -#define BCM78914_B1_TXPMD_CPU_TX_DESTINATION_TYPE_NHI 1 -#define BCM78914_B1_TXPMD_CPU_TX_DESTINATION_TYPE_ECMP 2 -#define BCM78914_B1_TXPMD_CPU_TX_DESTINATION_TYPE_ECMP_MEMBER 3 -#define BCM78914_B1_TXPMD_CPU_TX_DESTINATION_TYPE_IPMC 4 -#define BCM78914_B1_TXPMD_CPU_TX_DESTINATION_TYPE_L2MC 5 -#define BCM78914_B1_TXPMD_CPU_TX_DESTINATION_TYPE_VLAN_FLOOD 6 -#define BCM78914_B1_TXPMD_CPU_TX_DESTINATION_TYPE_LAG_ID 8 -#define BCM78914_B1_TXPMD_CPU_TX_DESTINATION_TYPE_FORWARD 15 -/*! \} */ - -/*! BCM78914_B1_TXPMD_CPU_TX_DESTINATION_TYPE encoding name strings maps. */ -#define BCM78914_B1_TXPMD_CPU_TX_DESTINATION_TYPE_NAME_MAP_INIT \ - {"EGRESS_PORT", BCM78914_B1_TXPMD_CPU_TX_DESTINATION_TYPE_EGRESS_PORT},\ - {"NHI", BCM78914_B1_TXPMD_CPU_TX_DESTINATION_TYPE_NHI},\ - {"ECMP", BCM78914_B1_TXPMD_CPU_TX_DESTINATION_TYPE_ECMP},\ - {"ECMP_MEMBER", BCM78914_B1_TXPMD_CPU_TX_DESTINATION_TYPE_ECMP_MEMBER},\ - {"IPMC", BCM78914_B1_TXPMD_CPU_TX_DESTINATION_TYPE_IPMC},\ - {"L2MC", BCM78914_B1_TXPMD_CPU_TX_DESTINATION_TYPE_L2MC},\ - {"VLAN_FLOOD", BCM78914_B1_TXPMD_CPU_TX_DESTINATION_TYPE_VLAN_FLOOD},\ - {"LAG_ID", BCM78914_B1_TXPMD_CPU_TX_DESTINATION_TYPE_LAG_ID},\ - {"FORWARD", BCM78914_B1_TXPMD_CPU_TX_DESTINATION_TYPE_FORWARD},\ - {NULL, 0} - -/*! - * \name BCM78914_B1_TXPMD_CPU_TX_DP encodings. - * \anchor BCM78914_B1_TXPMD_CPU_TX_DP_XXX - */ -/*! \{ */ -#define BCM78914_B1_TXPMD_CPU_TX_DP_GREEN 0 -#define BCM78914_B1_TXPMD_CPU_TX_DP_RED 1 -#define BCM78914_B1_TXPMD_CPU_TX_DP_YELLOW 3 -/*! \} */ - -/*! BCM78914_B1_TXPMD_CPU_TX_DP encoding name strings maps. */ -#define BCM78914_B1_TXPMD_CPU_TX_DP_NAME_MAP_INIT \ - {"GREEN", BCM78914_B1_TXPMD_CPU_TX_DP_GREEN},\ - {"RED", BCM78914_B1_TXPMD_CPU_TX_DP_RED},\ - {"YELLOW", BCM78914_B1_TXPMD_CPU_TX_DP_YELLOW},\ - {NULL, 0} - -/*! - * \name BCM78914_B1_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE encodings. - * \anchor BCM78914_B1_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE_XXX - */ -/*! \{ */ -#define BCM78914_B1_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE_EGRESS_PORT 0 -#define BCM78914_B1_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE_L2_PBM 7 -#define BCM78914_B1_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE_INVALID 15 -/*! \} */ - -/*! BCM78914_B1_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE encoding name strings maps. */ -#define BCM78914_B1_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE_NAME_MAP_INIT \ - {"EGRESS_PORT", BCM78914_B1_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE_EGRESS_PORT},\ - {"L2_PBM", BCM78914_B1_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE_L2_PBM},\ - {"INVALID", BCM78914_B1_TXPMD_SOBMH_FROM_CPU_DESTINATION_TYPE_INVALID},\ - {NULL, 0} - -/*! - * \name BCM78914_B1_TXPMD_HEADER_TYPE encodings. - * \anchor BCM78914_B1_TXPMD_HEADER_TYPE_XXX - */ -/*! \{ */ -#define BCM78914_B1_TXPMD_HEADER_TYPE_RESERVED 0 -#define BCM78914_B1_TXPMD_HEADER_TYPE_SOBMH 1 -#define BCM78914_B1_TXPMD_HEADER_TYPE_CPU_TX 2 -#define BCM78914_B1_TXPMD_HEADER_TYPE_CTC 3 -#define BCM78914_B1_TXPMD_HEADER_TYPE_MIRROR 4 -#define BCM78914_B1_TXPMD_HEADER_TYPE_RESERVED_1 5 -#define BCM78914_B1_TXPMD_HEADER_TYPE_ETH_TYPE_NONE 6 -#define BCM78914_B1_TXPMD_HEADER_TYPE_ETH_TYPE_IP_ETH_CLASSIC 7 -#define BCM78914_B1_TXPMD_HEADER_TYPE_ETH_TYPE_EP_ETH_CLASSIC 8 -#define BCM78914_B1_TXPMD_HEADER_TYPE_ETH_TYPE_IP_S_MOD 9 -#define BCM78914_B1_TXPMD_HEADER_TYPE_ETH_TYPE_EP_S_MOD 10 -#define BCM78914_B1_TXPMD_HEADER_TYPE_ETH_TYPE_EP_REDIRECT_IFA_PROBE_INIT 11 -#define BCM78914_B1_TXPMD_HEADER_TYPE_ETH_TYPE_EP_REDIRECT_OTHER 12 -#define BCM78914_B1_TXPMD_HEADER_TYPE_MIRROR_TO_CPU 13 -#define BCM78914_B1_TXPMD_HEADER_TYPE_IFA_EP_REDIRECT_IFA_PROBE_INIT 14 -#define BCM78914_B1_TXPMD_HEADER_TYPE_DOP 15 -/*! \} */ - -/*! BCM78914_B1_TXPMD_HEADER_TYPE encoding name strings maps. */ -#define BCM78914_B1_TXPMD_HEADER_TYPE_NAME_MAP_INIT \ - {"RESERVED", BCM78914_B1_TXPMD_HEADER_TYPE_RESERVED},\ - {"SOBMH", BCM78914_B1_TXPMD_HEADER_TYPE_SOBMH},\ - {"CPU_TX", BCM78914_B1_TXPMD_HEADER_TYPE_CPU_TX},\ - {"CTC", BCM78914_B1_TXPMD_HEADER_TYPE_CTC},\ - {"MIRROR", BCM78914_B1_TXPMD_HEADER_TYPE_MIRROR},\ - {"RESERVED_1", BCM78914_B1_TXPMD_HEADER_TYPE_RESERVED_1},\ - {"ETH_TYPE_NONE", BCM78914_B1_TXPMD_HEADER_TYPE_ETH_TYPE_NONE},\ - {"ETH_TYPE_IP_ETH_CLASSIC", BCM78914_B1_TXPMD_HEADER_TYPE_ETH_TYPE_IP_ETH_CLASSIC},\ - {"ETH_TYPE_EP_ETH_CLASSIC", BCM78914_B1_TXPMD_HEADER_TYPE_ETH_TYPE_EP_ETH_CLASSIC},\ - {"ETH_TYPE_IP_S_MOD", BCM78914_B1_TXPMD_HEADER_TYPE_ETH_TYPE_IP_S_MOD},\ - {"ETH_TYPE_EP_S_MOD", BCM78914_B1_TXPMD_HEADER_TYPE_ETH_TYPE_EP_S_MOD},\ - {"ETH_TYPE_EP_REDIRECT_IFA_PROBE_INIT", BCM78914_B1_TXPMD_HEADER_TYPE_ETH_TYPE_EP_REDIRECT_IFA_PROBE_INIT},\ - {"ETH_TYPE_EP_REDIRECT_OTHER", BCM78914_B1_TXPMD_HEADER_TYPE_ETH_TYPE_EP_REDIRECT_OTHER},\ - {"MIRROR_TO_CPU", BCM78914_B1_TXPMD_HEADER_TYPE_MIRROR_TO_CPU},\ - {"IFA_EP_REDIRECT_IFA_PROBE_INIT", BCM78914_B1_TXPMD_HEADER_TYPE_IFA_EP_REDIRECT_IFA_PROBE_INIT},\ - {"DOP", BCM78914_B1_TXPMD_HEADER_TYPE_DOP},\ - {NULL, 0} - -/*! - * \name BCM78914_B1_TXPMD_START encodings. - * \anchor BCM78914_B1_TXPMD_START_XXX - */ -/*! \{ */ -#define BCM78914_B1_TXPMD_START_INTERNAL 2 -/*! \} */ - -/*! BCM78914_B1_TXPMD_START encoding name strings maps. */ -#define BCM78914_B1_TXPMD_START_NAME_MAP_INIT \ - {"INTERNAL", BCM78914_B1_TXPMD_START_INTERNAL},\ - {NULL, 0} - -/* LBHDR defines */ -#define BCM78914_B1_LBHDR_PKT_PROFILE 0 -#define BCM78914_B1_LBHDR_QOS_FIELD_VALID 1 -#define BCM78914_B1_LBHDR_VFI_VALID_MD_ETH 2 -#define BCM78914_B1_LBHDR_VRF_VALID 3 -#define BCM78914_B1_LBHDR_VFI_MD_ETH 4 -#define BCM78914_B1_LBHDR_VRF 5 -#define BCM78914_B1_LBHDR_PP_PORT 6 -#define BCM78914_B1_LBHDR_VISIBILITY_PKT 7 -#define BCM78914_B1_LBHDR_ROUTED_PKT 8 -#define BCM78914_B1_LBHDR_OPAQUE_OBJECT 9 -#define BCM78914_B1_LBHDR_QOS_FIELD_ETH 10 -#define BCM78914_B1_LBHDR_INT_PRI_ETH 11 -#define BCM78914_B1_LBHDR_INT_CN_ETH 12 -#define BCM78914_B1_LBHDR_CNG_ETH 13 -#define BCM78914_B1_LBHDR_INPUT_PRIORITY_MD_ETH 14 -#define BCM78914_B1_LBHDR_HEADER_TYPE 15 -#define BCM78914_B1_LBHDR_START 16 -#define BCM78914_B1_LBHDR_COUNT 17 - -/* LBHDR name map */ -#define BCM78914_B1_LBHDR_NAME_MAP_INIT \ - {"PKT_PROFILE", BCM78914_B1_LBHDR_PKT_PROFILE}, \ - {"QOS_FIELD_VALID", BCM78914_B1_LBHDR_QOS_FIELD_VALID}, \ - {"VFI_VALID_MD_ETH", BCM78914_B1_LBHDR_VFI_VALID_MD_ETH}, \ - {"VRF_VALID", BCM78914_B1_LBHDR_VRF_VALID}, \ - {"VFI_MD_ETH", BCM78914_B1_LBHDR_VFI_MD_ETH}, \ - {"VRF", BCM78914_B1_LBHDR_VRF}, \ - {"PP_PORT", BCM78914_B1_LBHDR_PP_PORT}, \ - {"VISIBILITY_PKT", BCM78914_B1_LBHDR_VISIBILITY_PKT}, \ - {"ROUTED_PKT", BCM78914_B1_LBHDR_ROUTED_PKT}, \ - {"OPAQUE_OBJECT", BCM78914_B1_LBHDR_OPAQUE_OBJECT}, \ - {"QOS_FIELD_ETH", BCM78914_B1_LBHDR_QOS_FIELD_ETH}, \ - {"INT_PRI_ETH", BCM78914_B1_LBHDR_INT_PRI_ETH}, \ - {"INT_CN_ETH", BCM78914_B1_LBHDR_INT_CN_ETH}, \ - {"CNG_ETH", BCM78914_B1_LBHDR_CNG_ETH}, \ - {"INPUT_PRIORITY_MD_ETH", BCM78914_B1_LBHDR_INPUT_PRIORITY_MD_ETH}, \ - {"HEADER_TYPE", BCM78914_B1_LBHDR_HEADER_TYPE}, \ - {"START", BCM78914_B1_LBHDR_START}, \ - {"COUNT", BCM78914_B1_LBHDR_COUNT} - -/*! - * \name BCM78914_B1_LBHDR_HEADER_TYPE encodings. - * \anchor BCM78914_B1_LBHDR_HEADER_TYPE_XXX - */ -/*! \{ */ -#define BCM78914_B1_LBHDR_HEADER_TYPE_LOOPBACK_MH 7 -/*! \} */ - -/*! BCM78914_B1_LBHDR_HEADER_TYPE encoding name strings maps. */ -#define BCM78914_B1_LBHDR_HEADER_TYPE_NAME_MAP_INIT \ - {"LOOPBACK_MH", BCM78914_B1_LBHDR_HEADER_TYPE_LOOPBACK_MH},\ - {NULL, 0} - -/*! - * \name BCM78914_B1_LBHDR_START encodings. - * \anchor BCM78914_B1_LBHDR_START_XXX - */ -/*! \{ */ -#define BCM78914_B1_LBHDR_START_INTERNAL 2 -/*! \} */ - -/*! BCM78914_B1_LBHDR_START encoding name strings maps. */ -#define BCM78914_B1_LBHDR_START_NAME_MAP_INIT \ - {"INTERNAL", BCM78914_B1_LBHDR_START_INTERNAL},\ - {NULL, 0} - -#endif /* BCM78914_B1_PMD_FIELD_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm78920_a0/bcm78920_a0_pmd_field.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm78920_a0/bcm78920_a0_pmd_field.h deleted file mode 100644 index eb0ccd30153..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm78920_a0/bcm78920_a0_pmd_field.h +++ /dev/null @@ -1,328 +0,0 @@ -/******************************************************************************* - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated from the registers file. - * Edits to this file will be lost when it is regenerated. - * Tool: INTERNAL/regs/xgs/generate-pmd.pl - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - * This file provides PMD field defines for BCM78920_A0. - * - ******************************************************************************/ - -#ifndef BCM78920_A0_PMD_FIELD_H -#define BCM78920_A0_PMD_FIELD_H - -/* RXPMD defines */ -#define BCM78920_A0_RXPMD_FLEX_DATA 0 -#define BCM78920_A0_RXPMD_MPB_FLEX_DATA_TYPE 1 -#define BCM78920_A0_RXPMD_DOP_TRIGGER 2 -#define BCM78920_A0_RXPMD_EPARSE_EXTRACT_OFFSETS_3_0_OR_MIRROR_ENCAP_INDEX 3 -#define BCM78920_A0_RXPMD_RX_VPP_PORT 4 -#define BCM78920_A0_RXPMD_INT_CN 5 -#define BCM78920_A0_RXPMD_CNG 6 -#define BCM78920_A0_RXPMD_MULTICAST 7 -#define BCM78920_A0_RXPMD_IP_ROUTED 8 -#define BCM78920_A0_RXPMD_COPY_TO_CPU 9 -#define BCM78920_A0_RXPMD_RX_CHIP_PORT 10 -#define BCM78920_A0_RXPMD_ARC_ID_LO 11 -#define BCM78920_A0_RXPMD_ARC_ID_HI 12 -#define BCM78920_A0_RXPMD_REPLICATION_OR_NHOP_INDEX 13 -#define BCM78920_A0_RXPMD_DMA_HEADER_VERSION 14 -#define BCM78920_A0_RXPMD_QUEUE_NUM 15 -#define BCM78920_A0_RXPMD_TRUNCATE_CPU_COPY 16 -#define BCM78920_A0_RXPMD_EGR_ZONE_REMAP_CTRL 17 -#define BCM78920_A0_RXPMD_SWITCH 18 -#define BCM78920_A0_RXPMD_L3ONLY 19 -#define BCM78920_A0_RXPMD_NONSW_COPY 20 -#define BCM78920_A0_RXPMD_PKT_LENGTH 21 -#define BCM78920_A0_RXPMD_COUNT 22 - -/* RXPMD name map */ -#define BCM78920_A0_RXPMD_NAME_MAP_INIT \ - {"FLEX_DATA", BCM78920_A0_RXPMD_FLEX_DATA}, \ - {"MPB_FLEX_DATA_TYPE", BCM78920_A0_RXPMD_MPB_FLEX_DATA_TYPE}, \ - {"DOP_TRIGGER", BCM78920_A0_RXPMD_DOP_TRIGGER}, \ - {"EPARSE_EXTRACT_OFFSETS_3_0_OR_MIRROR_ENCAP_INDEX", BCM78920_A0_RXPMD_EPARSE_EXTRACT_OFFSETS_3_0_OR_MIRROR_ENCAP_INDEX}, \ - {"RX_VPP_PORT", BCM78920_A0_RXPMD_RX_VPP_PORT}, \ - {"INT_CN", BCM78920_A0_RXPMD_INT_CN}, \ - {"CNG", BCM78920_A0_RXPMD_CNG}, \ - {"MULTICAST", BCM78920_A0_RXPMD_MULTICAST}, \ - {"IP_ROUTED", BCM78920_A0_RXPMD_IP_ROUTED}, \ - {"COPY_TO_CPU", BCM78920_A0_RXPMD_COPY_TO_CPU}, \ - {"RX_CHIP_PORT", BCM78920_A0_RXPMD_RX_CHIP_PORT}, \ - {"ARC_ID_LO", BCM78920_A0_RXPMD_ARC_ID_LO}, \ - {"ARC_ID_HI", BCM78920_A0_RXPMD_ARC_ID_HI}, \ - {"REPLICATION_OR_NHOP_INDEX", BCM78920_A0_RXPMD_REPLICATION_OR_NHOP_INDEX}, \ - {"DMA_HEADER_VERSION", BCM78920_A0_RXPMD_DMA_HEADER_VERSION}, \ - {"QUEUE_NUM", BCM78920_A0_RXPMD_QUEUE_NUM}, \ - {"TRUNCATE_CPU_COPY", BCM78920_A0_RXPMD_TRUNCATE_CPU_COPY}, \ - {"EGR_ZONE_REMAP_CTRL", BCM78920_A0_RXPMD_EGR_ZONE_REMAP_CTRL}, \ - {"SWITCH", BCM78920_A0_RXPMD_SWITCH}, \ - {"L3ONLY", BCM78920_A0_RXPMD_L3ONLY}, \ - {"NONSW_COPY", BCM78920_A0_RXPMD_NONSW_COPY}, \ - {"PKT_LENGTH", BCM78920_A0_RXPMD_PKT_LENGTH}, \ - {"COUNT", BCM78920_A0_RXPMD_COUNT} - -/* TXPMD defines */ -#define BCM78920_A0_TXPMD_CPU_TX_INCA_GROUP_ID 0 -#define BCM78920_A0_TXPMD_IEEE1588_INGRESS_TIMESTAMP_SIGN 1 -#define BCM78920_A0_TXPMD_IEEE1588_ONE_STEP_ENABLE 2 -#define BCM78920_A0_TXPMD_IEEE1588_REGEN_UDP_CHECKSUM 3 -#define BCM78920_A0_TXPMD_IEEE1588_TIMESTAMP_HDR_OFFSET 4 -#define BCM78920_A0_TXPMD_AUX_SOBMH_UNICAST 5 -#define BCM78920_A0_TXPMD_AUX_SOBMH_RQE_Q_NUM 6 -#define BCM78920_A0_TXPMD_AUX_SOBMH_TX_CHIP_PORT 7 -#define BCM78920_A0_TXPMD_AUX_SOBMH_RX_CHIP_PORT 8 -#define BCM78920_A0_TXPMD_AUX_SOBMH_HEADER_TYPE 9 -#define BCM78920_A0_TXPMD_AUX_SOBMH_START 10 -#define BCM78920_A0_TXPMD_CPU_TX_AR_GROUP 11 -#define BCM78920_A0_TXPMD_CPU_TX_INCA_INTERNAL_QP_ID 12 -#define BCM78920_A0_TXPMD_CPU_TX_VRF 13 -#define BCM78920_A0_TXPMD_CPU_TX_INCA_SRC_HOST_PROFILE 14 -#define BCM78920_A0_TXPMD_CPU_TX_INCA_FLOW_TYPE 15 -#define BCM78920_A0_TXPMD_CPU_TX_INCA_REPL_REQD 16 -#define BCM78920_A0_TXPMD_CPU_TX_INCA_SECOND_PASS_DEST 17 -#define BCM78920_A0_TXPMD_CPU_TX_VLAN_PROFILE 18 -#define BCM78920_A0_TXPMD_CPU_TX_INCA_ICE_DATA_FORMAT 19 -#define BCM78920_A0_TXPMD_CPU_TX_FWD_PROFILE 20 -#define BCM78920_A0_TXPMD_CPU_TX_INCA_ICE_DATA_OFFSET 21 -#define BCM78920_A0_TXPMD_CPU_TX_VPP_TO_LPP_CLASS_ID 22 -#define BCM78920_A0_TXPMD_CPU_TX_DESTINATION_TYPE 23 -#define BCM78920_A0_TXPMD_CPU_TX_CNG 24 -#define BCM78920_A0_TXPMD_CPU_TX_INT_CN 25 -#define BCM78920_A0_TXPMD_COOKIE_7_0 26 -#define BCM78920_A0_TXPMD_CPU_TX_SRC_PORT_NUM 27 -#define BCM78920_A0_TXPMD_COOKIE_8 28 -#define BCM78920_A0_TXPMD_WRED_RESPONSIVE 29 -#define BCM78920_A0_TXPMD_WRED_MARK_ELIGIBLE 30 -#define BCM78920_A0_TXPMD_SPID_OVERRIDE 31 -#define BCM78920_A0_TXPMD_INPUT_PRI 32 -#define BCM78920_A0_TXPMD_SWITCH_COPY 33 -#define BCM78920_A0_TXPMD_SWITCH_COPY_TYPE 34 -#define BCM78920_A0_TXPMD_AUX_SOBMH_SOP 35 -#define BCM78920_A0_TXPMD_AUX_SOBMH_PKT_LENGTH 36 -#define BCM78920_A0_TXPMD_AUX_SOBMH_COPY_TO_CPU 37 -#define BCM78920_A0_TXPMD_AUX_SOBMH_COPY_TO_DEBUG 38 -#define BCM78920_A0_TXPMD_AUX_SOBMH_UNICAST_PKT 39 -#define BCM78920_A0_TXPMD_AUX_SOBMH_CELL_ERROR 40 -#define BCM78920_A0_TXPMD_CPU_TX_INCA_COLLECTIVE_ID 41 -#define BCM78920_A0_TXPMD_CPU_TX_COOKIE 42 -#define BCM78920_A0_TXPMD_CPU_TX_DESTINATION 43 -#define BCM78920_A0_TXPMD_CPU_TX_INT_PRI 44 -#define BCM78920_A0_TXPMD_CPU_TX_PKT_CTRL_PROFILE 45 -#define BCM78920_A0_TXPMD_CPU_TX_INPUT_PRI 46 -#define BCM78920_A0_TXPMD_SWITCH_COPY_DEST_PORT 47 -#define BCM78920_A0_TXPMD_CPU_TX_COS_VALID 48 -#define BCM78920_A0_TXPMD_CPU_TX_VRF_VALID 49 -#define BCM78920_A0_TXPMD_CPU_TX_ROUTED_PKT 50 -#define BCM78920_A0_TXPMD_CPU_TX_DOP_TRIGGER 51 -#define BCM78920_A0_TXPMD_HEADER_TYPE 52 -#define BCM78920_A0_TXPMD_START 53 -#define BCM78920_A0_TXPMD_AUX_SOBMH_CELL_LENGTH 54 -#define BCM78920_A0_TXPMD_AUX_SOBMH_COS 55 -#define BCM78920_A0_TXPMD_AUX_SOBMH_TX_VPP_PORT 56 -#define BCM78920_A0_TXPMD_CPU_TX_INCA_REDN_REQD 57 -#define BCM78920_A0_TXPMD_CPU_TX_INCA_ICE_OPER_TYPE 58 -#define BCM78920_A0_TXPMD_SPID 59 -#define BCM78920_A0_TXPMD_CPU_TX_INT_PRI_VALID 60 -#define BCM78920_A0_TXPMD_CPU_TX_CNG_VALID 61 -#define BCM78920_A0_TXPMD_CPU_TX_INT_CN_VALID 62 -#define BCM78920_A0_TXPMD_CPU_TX_INPUT_PRI_VALID 63 -#define BCM78920_A0_TXPMD_SWITCH_COPY_COS 64 -#define BCM78920_A0_TXPMD_CPU_TX_CPU_TX_TYPE 65 -#define BCM78920_A0_TXPMD_CNG 66 -#define BCM78920_A0_TXPMD_CELL_ERROR 67 -#define BCM78920_A0_TXPMD_AUX_SOBMH_EOP 68 -#define BCM78920_A0_TXPMD_AUX_SOBMH_CNG 69 -#define BCM78920_A0_TXPMD_AUX_SOBMH_SET_L2BM 70 -#define BCM78920_A0_TXPMD_AUX_SOBMH_INPUT_PRI 71 -#define BCM78920_A0_TXPMD_CPU_TX_PACKET_ENTROPY 72 -#define BCM78920_A0_TXPMD_CPU_TX_COS 73 -#define BCM78920_A0_TXPMD_COUNT 74 - -/* TXPMD name map */ -#define BCM78920_A0_TXPMD_NAME_MAP_INIT \ - {"CPU_TX::INCA_GROUP_ID", BCM78920_A0_TXPMD_CPU_TX_INCA_GROUP_ID}, \ - {"IEEE1588_INGRESS_TIMESTAMP_SIGN", BCM78920_A0_TXPMD_IEEE1588_INGRESS_TIMESTAMP_SIGN}, \ - {"IEEE1588_ONE_STEP_ENABLE", BCM78920_A0_TXPMD_IEEE1588_ONE_STEP_ENABLE}, \ - {"IEEE1588_REGEN_UDP_CHECKSUM", BCM78920_A0_TXPMD_IEEE1588_REGEN_UDP_CHECKSUM}, \ - {"IEEE1588_TIMESTAMP_HDR_OFFSET", BCM78920_A0_TXPMD_IEEE1588_TIMESTAMP_HDR_OFFSET}, \ - {"AUX_SOBMH::UNICAST", BCM78920_A0_TXPMD_AUX_SOBMH_UNICAST}, \ - {"AUX_SOBMH::RQE_Q_NUM", BCM78920_A0_TXPMD_AUX_SOBMH_RQE_Q_NUM}, \ - {"AUX_SOBMH::TX_CHIP_PORT", BCM78920_A0_TXPMD_AUX_SOBMH_TX_CHIP_PORT}, \ - {"AUX_SOBMH::RX_CHIP_PORT", BCM78920_A0_TXPMD_AUX_SOBMH_RX_CHIP_PORT}, \ - {"AUX_SOBMH::HEADER_TYPE", BCM78920_A0_TXPMD_AUX_SOBMH_HEADER_TYPE}, \ - {"AUX_SOBMH::START", BCM78920_A0_TXPMD_AUX_SOBMH_START}, \ - {"CPU_TX::AR_GROUP", BCM78920_A0_TXPMD_CPU_TX_AR_GROUP}, \ - {"CPU_TX::INCA_INTERNAL_QP_ID", BCM78920_A0_TXPMD_CPU_TX_INCA_INTERNAL_QP_ID}, \ - {"CPU_TX::VRF", BCM78920_A0_TXPMD_CPU_TX_VRF}, \ - {"CPU_TX::INCA_SRC_HOST_PROFILE", BCM78920_A0_TXPMD_CPU_TX_INCA_SRC_HOST_PROFILE}, \ - {"CPU_TX::INCA_FLOW_TYPE", BCM78920_A0_TXPMD_CPU_TX_INCA_FLOW_TYPE}, \ - {"CPU_TX::INCA_REPL_REQD", BCM78920_A0_TXPMD_CPU_TX_INCA_REPL_REQD}, \ - {"CPU_TX::INCA_SECOND_PASS_DEST", BCM78920_A0_TXPMD_CPU_TX_INCA_SECOND_PASS_DEST}, \ - {"CPU_TX::VLAN_PROFILE", BCM78920_A0_TXPMD_CPU_TX_VLAN_PROFILE}, \ - {"CPU_TX::INCA_ICE_DATA_FORMAT", BCM78920_A0_TXPMD_CPU_TX_INCA_ICE_DATA_FORMAT}, \ - {"CPU_TX::FWD_PROFILE", BCM78920_A0_TXPMD_CPU_TX_FWD_PROFILE}, \ - {"CPU_TX::INCA_ICE_DATA_OFFSET", BCM78920_A0_TXPMD_CPU_TX_INCA_ICE_DATA_OFFSET}, \ - {"CPU_TX::VPP_TO_LPP_CLASS_ID", BCM78920_A0_TXPMD_CPU_TX_VPP_TO_LPP_CLASS_ID}, \ - {"CPU_TX::DESTINATION_TYPE", BCM78920_A0_TXPMD_CPU_TX_DESTINATION_TYPE}, \ - {"CPU_TX::CNG", BCM78920_A0_TXPMD_CPU_TX_CNG}, \ - {"CPU_TX::INT_CN", BCM78920_A0_TXPMD_CPU_TX_INT_CN}, \ - {"COOKIE_7_0", BCM78920_A0_TXPMD_COOKIE_7_0}, \ - {"CPU_TX::SRC_PORT_NUM", BCM78920_A0_TXPMD_CPU_TX_SRC_PORT_NUM}, \ - {"COOKIE_8", BCM78920_A0_TXPMD_COOKIE_8}, \ - {"WRED_RESPONSIVE", BCM78920_A0_TXPMD_WRED_RESPONSIVE}, \ - {"WRED_MARK_ELIGIBLE", BCM78920_A0_TXPMD_WRED_MARK_ELIGIBLE}, \ - {"SPID_OVERRIDE", BCM78920_A0_TXPMD_SPID_OVERRIDE}, \ - {"INPUT_PRI", BCM78920_A0_TXPMD_INPUT_PRI}, \ - {"SWITCH_COPY", BCM78920_A0_TXPMD_SWITCH_COPY}, \ - {"SWITCH_COPY_TYPE", BCM78920_A0_TXPMD_SWITCH_COPY_TYPE}, \ - {"AUX_SOBMH::SOP", BCM78920_A0_TXPMD_AUX_SOBMH_SOP}, \ - {"AUX_SOBMH::PKT_LENGTH", BCM78920_A0_TXPMD_AUX_SOBMH_PKT_LENGTH}, \ - {"AUX_SOBMH::COPY_TO_CPU", BCM78920_A0_TXPMD_AUX_SOBMH_COPY_TO_CPU}, \ - {"AUX_SOBMH::COPY_TO_DEBUG", BCM78920_A0_TXPMD_AUX_SOBMH_COPY_TO_DEBUG}, \ - {"AUX_SOBMH::UNICAST_PKT", BCM78920_A0_TXPMD_AUX_SOBMH_UNICAST_PKT}, \ - {"AUX_SOBMH::CELL_ERROR", BCM78920_A0_TXPMD_AUX_SOBMH_CELL_ERROR}, \ - {"CPU_TX::INCA_COLLECTIVE_ID", BCM78920_A0_TXPMD_CPU_TX_INCA_COLLECTIVE_ID}, \ - {"CPU_TX::COOKIE", BCM78920_A0_TXPMD_CPU_TX_COOKIE}, \ - {"CPU_TX::DESTINATION", BCM78920_A0_TXPMD_CPU_TX_DESTINATION}, \ - {"CPU_TX::INT_PRI", BCM78920_A0_TXPMD_CPU_TX_INT_PRI}, \ - {"CPU_TX::PKT_CTRL_PROFILE", BCM78920_A0_TXPMD_CPU_TX_PKT_CTRL_PROFILE}, \ - {"CPU_TX::INPUT_PRI", BCM78920_A0_TXPMD_CPU_TX_INPUT_PRI}, \ - {"SWITCH_COPY_DEST_PORT", BCM78920_A0_TXPMD_SWITCH_COPY_DEST_PORT}, \ - {"CPU_TX::COS_VALID", BCM78920_A0_TXPMD_CPU_TX_COS_VALID}, \ - {"CPU_TX::VRF_VALID", BCM78920_A0_TXPMD_CPU_TX_VRF_VALID}, \ - {"CPU_TX::ROUTED_PKT", BCM78920_A0_TXPMD_CPU_TX_ROUTED_PKT}, \ - {"CPU_TX::DOP_TRIGGER", BCM78920_A0_TXPMD_CPU_TX_DOP_TRIGGER}, \ - {"HEADER_TYPE", BCM78920_A0_TXPMD_HEADER_TYPE}, \ - {"START", BCM78920_A0_TXPMD_START}, \ - {"AUX_SOBMH::CELL_LENGTH", BCM78920_A0_TXPMD_AUX_SOBMH_CELL_LENGTH}, \ - {"AUX_SOBMH::COS", BCM78920_A0_TXPMD_AUX_SOBMH_COS}, \ - {"AUX_SOBMH::TX_VPP_PORT", BCM78920_A0_TXPMD_AUX_SOBMH_TX_VPP_PORT}, \ - {"CPU_TX::INCA_REDN_REQD", BCM78920_A0_TXPMD_CPU_TX_INCA_REDN_REQD}, \ - {"CPU_TX::INCA_ICE_OPER_TYPE", BCM78920_A0_TXPMD_CPU_TX_INCA_ICE_OPER_TYPE}, \ - {"SPID", BCM78920_A0_TXPMD_SPID}, \ - {"CPU_TX::INT_PRI_VALID", BCM78920_A0_TXPMD_CPU_TX_INT_PRI_VALID}, \ - {"CPU_TX::CNG_VALID", BCM78920_A0_TXPMD_CPU_TX_CNG_VALID}, \ - {"CPU_TX::INT_CN_VALID", BCM78920_A0_TXPMD_CPU_TX_INT_CN_VALID}, \ - {"CPU_TX::INPUT_PRI_VALID", BCM78920_A0_TXPMD_CPU_TX_INPUT_PRI_VALID}, \ - {"SWITCH_COPY_COS", BCM78920_A0_TXPMD_SWITCH_COPY_COS}, \ - {"CPU_TX::CPU_TX_TYPE", BCM78920_A0_TXPMD_CPU_TX_CPU_TX_TYPE}, \ - {"CNG", BCM78920_A0_TXPMD_CNG}, \ - {"CELL_ERROR", BCM78920_A0_TXPMD_CELL_ERROR}, \ - {"AUX_SOBMH::EOP", BCM78920_A0_TXPMD_AUX_SOBMH_EOP}, \ - {"AUX_SOBMH::CNG", BCM78920_A0_TXPMD_AUX_SOBMH_CNG}, \ - {"AUX_SOBMH::SET_L2BM", BCM78920_A0_TXPMD_AUX_SOBMH_SET_L2BM}, \ - {"AUX_SOBMH::INPUT_PRI", BCM78920_A0_TXPMD_AUX_SOBMH_INPUT_PRI}, \ - {"CPU_TX::PACKET_ENTROPY", BCM78920_A0_TXPMD_CPU_TX_PACKET_ENTROPY}, \ - {"CPU_TX::COS", BCM78920_A0_TXPMD_CPU_TX_COS}, \ - {"COUNT", BCM78920_A0_TXPMD_COUNT} - -/*! - * \name BCM78920_A0_TXPMD_AUX_SOBMH_HEADER_TYPE encodings. - * \anchor BCM78920_A0_TXPMD_AUX_SOBMH_HEADER_TYPE_XXX - */ -/*! \{ */ -#define BCM78920_A0_TXPMD_AUX_SOBMH_HEADER_TYPE_RESERVED_0 0 -#define BCM78920_A0_TXPMD_AUX_SOBMH_HEADER_TYPE_SOBMH_FROM_INTERNAL_PORT 1 -/*! \} */ - -/*! BCM78920_A0_TXPMD_AUX_SOBMH_HEADER_TYPE encoding name strings maps. */ -#define BCM78920_A0_TXPMD_AUX_SOBMH_HEADER_TYPE_NAME_MAP_INIT \ - {"RESERVED_0", BCM78920_A0_TXPMD_AUX_SOBMH_HEADER_TYPE_RESERVED_0},\ - {"SOBMH_FROM_INTERNAL_PORT", BCM78920_A0_TXPMD_AUX_SOBMH_HEADER_TYPE_SOBMH_FROM_INTERNAL_PORT},\ - {NULL, 0} - -/*! - * \name BCM78920_A0_TXPMD_AUX_SOBMH_START encodings. - * \anchor BCM78920_A0_TXPMD_AUX_SOBMH_START_XXX - */ -/*! \{ */ -#define BCM78920_A0_TXPMD_AUX_SOBMH_START_RESERVED_0 0 -#define BCM78920_A0_TXPMD_AUX_SOBMH_START_RESERVED_1 1 -#define BCM78920_A0_TXPMD_AUX_SOBMH_START_INTERNAL_HEADER 2 -#define BCM78920_A0_TXPMD_AUX_SOBMH_START_HIGIG 3 -/*! \} */ - -/*! BCM78920_A0_TXPMD_AUX_SOBMH_START encoding name strings maps. */ -#define BCM78920_A0_TXPMD_AUX_SOBMH_START_NAME_MAP_INIT \ - {"RESERVED_0", BCM78920_A0_TXPMD_AUX_SOBMH_START_RESERVED_0},\ - {"RESERVED_1", BCM78920_A0_TXPMD_AUX_SOBMH_START_RESERVED_1},\ - {"INTERNAL_HEADER", BCM78920_A0_TXPMD_AUX_SOBMH_START_INTERNAL_HEADER},\ - {"HIGIG", BCM78920_A0_TXPMD_AUX_SOBMH_START_HIGIG},\ - {NULL, 0} - -/*! - * \name BCM78920_A0_TXPMD_CPU_TX_INCA_ICE_DATA_FORMAT encodings. - * \anchor BCM78920_A0_TXPMD_CPU_TX_INCA_ICE_DATA_FORMAT_XXX - */ -/*! \{ */ -#define BCM78920_A0_TXPMD_CPU_TX_INCA_ICE_DATA_FORMAT_FP32 0 -#define BCM78920_A0_TXPMD_CPU_TX_INCA_ICE_DATA_FORMAT_FP16 1 -#define BCM78920_A0_TXPMD_CPU_TX_INCA_ICE_DATA_FORMAT_BF16 2 -#define BCM78920_A0_TXPMD_CPU_TX_INCA_ICE_DATA_FORMAT_INT32 3 -#define BCM78920_A0_TXPMD_CPU_TX_INCA_ICE_DATA_FORMAT_FP8 4 -/*! \} */ - -/*! BCM78920_A0_TXPMD_CPU_TX_INCA_ICE_DATA_FORMAT encoding name strings maps. */ -#define BCM78920_A0_TXPMD_CPU_TX_INCA_ICE_DATA_FORMAT_NAME_MAP_INIT \ - {"FP32", BCM78920_A0_TXPMD_CPU_TX_INCA_ICE_DATA_FORMAT_FP32},\ - {"FP16", BCM78920_A0_TXPMD_CPU_TX_INCA_ICE_DATA_FORMAT_FP16},\ - {"BF16", BCM78920_A0_TXPMD_CPU_TX_INCA_ICE_DATA_FORMAT_BF16},\ - {"INT32", BCM78920_A0_TXPMD_CPU_TX_INCA_ICE_DATA_FORMAT_INT32},\ - {"FP8", BCM78920_A0_TXPMD_CPU_TX_INCA_ICE_DATA_FORMAT_FP8},\ - {NULL, 0} - -/*! - * \name BCM78920_A0_TXPMD_CPU_TX_DESTINATION_TYPE encodings. - * \anchor BCM78920_A0_TXPMD_CPU_TX_DESTINATION_TYPE_XXX - */ -/*! \{ */ -#define BCM78920_A0_TXPMD_CPU_TX_DESTINATION_TYPE_NULL 0 -#define BCM78920_A0_TXPMD_CPU_TX_DESTINATION_TYPE_DEST_PORT 1 -#define BCM78920_A0_TXPMD_CPU_TX_DESTINATION_TYPE_TGID 2 -#define BCM78920_A0_TXPMD_CPU_TX_DESTINATION_TYPE_NEXT_HOP 3 -#define BCM78920_A0_TXPMD_CPU_TX_DESTINATION_TYPE_ECMP 4 -/*! \} */ - -/*! BCM78920_A0_TXPMD_CPU_TX_DESTINATION_TYPE encoding name strings maps. */ -#define BCM78920_A0_TXPMD_CPU_TX_DESTINATION_TYPE_NAME_MAP_INIT \ - {"NULL", BCM78920_A0_TXPMD_CPU_TX_DESTINATION_TYPE_NULL},\ - {"DEST_PORT", BCM78920_A0_TXPMD_CPU_TX_DESTINATION_TYPE_DEST_PORT},\ - {"TGID", BCM78920_A0_TXPMD_CPU_TX_DESTINATION_TYPE_TGID},\ - {"NEXT_HOP", BCM78920_A0_TXPMD_CPU_TX_DESTINATION_TYPE_NEXT_HOP},\ - {"ECMP", BCM78920_A0_TXPMD_CPU_TX_DESTINATION_TYPE_ECMP},\ - {NULL, 0} - -/*! - * \name BCM78920_A0_TXPMD_CPU_TX_INCA_ICE_OPER_TYPE encodings. - * \anchor BCM78920_A0_TXPMD_CPU_TX_INCA_ICE_OPER_TYPE_XXX - */ -/*! \{ */ -#define BCM78920_A0_TXPMD_CPU_TX_INCA_ICE_OPER_TYPE_SUM 0 -#define BCM78920_A0_TXPMD_CPU_TX_INCA_ICE_OPER_TYPE_SUM_AND_SCALE 1 -/*! \} */ - -/*! BCM78920_A0_TXPMD_CPU_TX_INCA_ICE_OPER_TYPE encoding name strings maps. */ -#define BCM78920_A0_TXPMD_CPU_TX_INCA_ICE_OPER_TYPE_NAME_MAP_INIT \ - {"SUM", BCM78920_A0_TXPMD_CPU_TX_INCA_ICE_OPER_TYPE_SUM},\ - {"SUM_AND_SCALE", BCM78920_A0_TXPMD_CPU_TX_INCA_ICE_OPER_TYPE_SUM_AND_SCALE},\ - {NULL, 0} - -#endif /* BCM78920_A0_PMD_FIELD_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm78920_a0/bcmpkt_bcm78920_a0_rxpmd.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm78920_a0/bcmpkt_bcm78920_a0_rxpmd.h deleted file mode 100644 index 4a1a787ca6f..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/chip/bcm78920_a0/bcmpkt_bcm78920_a0_rxpmd.h +++ /dev/null @@ -1,61 +0,0 @@ -/*! \file bcmpkt_bcm78920_a0_rxpmd.h - * - * RX Packet Meta Data (RXPMD, called EP_TO_CPU in hardware) access interfaces. - * - */ -/* - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - */ - -#ifndef BCMPKT_BCM78920_A0_RXPMD_H -#define BCMPKT_BCM78920_A0_RXPMD_H - -#include - -/*! - * \brief Get flex field value from packet header data stream. - * - * \param [in] data Packet header data stream. - * \param [in] fld_info Information of field within data stream. - * \param [in] profile Profile - * \param [out] val Field value. - * - * \retval SHR_E_NONE success. - */ -extern int -bcm78920_a0_rxpmd_flex_fget(uint32_t *data, - bcmpkt_flex_field_metadata_t *fld_info, - int profile, - uint32_t *val); - -/*! - * \brief Set flex field value from packet header data stream. - * - * \param [in] data Packet header data stream. - * \param [in] fld_info Information of field within data stream. - * \param [in] profile Profile - * \param [in] val Field value. - * - * \retval SHR_E_NONE success. - */ -extern int -bcm78920_a0_rxpmd_flex_fset(uint32_t *data, - bcmpkt_flex_field_metadata_t *fld_info, - int profile, - uint32_t val); - -#endif /* BCMPKT_BCM78920_A0_RXPMD_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/cna_6_5_34_2_0/bcm56690_a0_cna_6_5_34_2_0_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/cna_6_5_34_2_0/bcm56690_a0_cna_6_5_34_2_0_bcmpkt_flexhdr.h deleted file mode 100644 index fd11d3323e2..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/cna_6_5_34_2_0/bcm56690_a0_cna_6_5_34_2_0_bcmpkt_flexhdr.h +++ /dev/null @@ -1,107 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) header.yml. - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - -#ifndef BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_FLEXHDR_H -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_FLEXHDR_H - -#include - -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T 0 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T 1 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T 2 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T 3 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T 4 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T 5 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ETHERTYPE_T 6 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T 7 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ICMP_T 8 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T 9 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_A_T 10 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_B_T 11 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_BASE_T 12 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IPFIX_T 13 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T 14 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T 15 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_L2_T 16 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_MIRROR_ERSPAN_SN_T 17 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_MIRROR_TRANSPORT_T 18 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T 19 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T 20 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T 21 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T 22 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T 23 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_2_T 24 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_TCP_FIRST_4BYTES_T 25 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T 26 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_UDP_T 27 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L3_T 28 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L4_T 29 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T 30 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_VLAN_T 31 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_VXLAN_T 32 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_T 33 - -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_FLEXHDR_COUNT 34 - -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_FLEXHDR_NAME_MAP_INIT \ - {"arp_t", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T},\ - {"cpu_composites_0_t", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T},\ - {"cpu_composites_1_t", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T},\ - {"ep_nih_header_t", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T},\ - {"erspan3_fixed_hdr_t", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T},\ - {"erspan3_subhdr_5_t", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T},\ - {"ethertype_t", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ETHERTYPE_T},\ - {"generic_loopback_t", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T},\ - {"icmp_t", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ICMP_T},\ - {"ifa_header_t", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T},\ - {"ifa_metadata_a_t", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_A_T},\ - {"ifa_metadata_b_t", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_B_T},\ - {"ifa_metadata_base_t", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_BASE_T},\ - {"ipfix_t", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IPFIX_T},\ - {"ipv4_t", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T},\ - {"ipv6_t", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T},\ - {"l2_t", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_L2_T},\ - {"mirror_erspan_sn_t", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_MIRROR_ERSPAN_SN_T},\ - {"mirror_transport_t", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_MIRROR_TRANSPORT_T},\ - {"psamp_mirror_on_drop_0_t", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\ - {"psamp_mirror_on_drop_3_t", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T},\ - {"rarp_t", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T},\ - {"sflow_shim_0_t", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T},\ - {"sflow_shim_1_t", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T},\ - {"sflow_shim_2_t", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_2_T},\ - {"tcp_first_4bytes_t", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_TCP_FIRST_4BYTES_T},\ - {"tcp_last_16bytes_t", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T},\ - {"udp_t", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_UDP_T},\ - {"unknown_l3_t", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L3_T},\ - {"unknown_l4_t", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L4_T},\ - {"unknown_l5_t", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T},\ - {"vlan_t", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_VLAN_T},\ - {"vxlan_t", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_VXLAN_T},\ - {"RXPMD_FLEX_T", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_T},\ - {"flexhdr count", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_FLEXHDR_COUNT} - -#endif /* BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_FLEXHDR_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/cna_6_5_34_2_0/bcm56690_a0_cna_6_5_34_2_0_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/cna_6_5_34_2_0/bcm56690_a0_cna_6_5_34_2_0_bcmpkt_flexhdr_data.h deleted file mode 100644 index 64a95277d8f..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/cna_6_5_34_2_0/bcm56690_a0_cna_6_5_34_2_0_bcmpkt_flexhdr_data.h +++ /dev/null @@ -1,703 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) header.yml. - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - -#ifndef BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_FLEXHDR_DATA_H -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_FLEXHDR_DATA_H - -/*! - * \name ARP_T field IDs. - */ -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_HARDWARE_LEN 0 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_HARDWARE_TYPE 1 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_OPERATION 2 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_PROT_ADDR_LEN 3 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_PROTOCOL_TYPE 4 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_SENDER_HA 5 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_SENDER_IP 6 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_TARGET_HA 7 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_TARGET_IP 8 - -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_FID_COUNT 9 - -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \ - {"HARDWARE_LEN", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_HARDWARE_LEN},\ - {"HARDWARE_TYPE", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_HARDWARE_TYPE},\ - {"OPERATION", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_OPERATION},\ - {"PROT_ADDR_LEN", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_PROT_ADDR_LEN},\ - {"PROTOCOL_TYPE", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_PROTOCOL_TYPE},\ - {"SENDER_HA", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_SENDER_HA},\ - {"SENDER_IP", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_SENDER_IP},\ - {"TARGET_HA", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_TARGET_HA},\ - {"TARGET_IP", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_TARGET_IP},\ - {"arp_t fid count", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_FID_COUNT} - -/*! - * \name CPU_COMPOSITES_0_T field IDs. - */ -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6 - -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT 7 - -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \ - {"DMA_CONT0", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\ - {"DMA_CONT1", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\ - {"DMA_CONT2", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\ - {"DMA_CONT3", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\ - {"DMA_CONT4", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\ - {"DMA_CONT5", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\ - {"DMA_CONT6", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\ - {"cpu_composites_0_t fid count", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT} - -/*! - * \name CPU_COMPOSITES_1_T field IDs. - */ -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7 8 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8 9 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9 10 - -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT 11 - -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \ - {"DMA_CONT10", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\ - {"DMA_CONT11", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\ - {"DMA_CONT12", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\ - {"DMA_CONT13", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\ - {"DMA_CONT14", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\ - {"DMA_CONT15", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\ - {"DMA_CONT16", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\ - {"DMA_CONT17", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\ - {"DMA_CONT7", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\ - {"DMA_CONT8", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\ - {"DMA_CONT9", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\ - {"cpu_composites_1_t fid count", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT} - -/*! - * \name EP_NIH_HEADER_T field IDs. - */ -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE 0 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE 1 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A 2 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B 3 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C 4 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A 5 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B 6 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C 7 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX 8 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0 9 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_START 10 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP 11 - -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT 12 - -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT \ - {"HEADER_SUBTYPE", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE},\ - {"HEADER_TYPE", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE},\ - {"OPAQUE_CTRL_A", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A},\ - {"OPAQUE_CTRL_B", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B},\ - {"OPAQUE_CTRL_C", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C},\ - {"OPAQUE_OBJECT_A", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A},\ - {"OPAQUE_OBJECT_B", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B},\ - {"OPAQUE_OBJECT_C", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C},\ - {"RECIRC_PROFILE_INDEX", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX},\ - {"RESERVED_0", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0},\ - {"START", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_START},\ - {"TIMESTAMP", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP},\ - {"ep_nih_header_t fid count", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT} - -/*! - * \name ERSPAN3_FIXED_HDR_T field IDs. - */ -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO 0 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS 1 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID 2 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID 4 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T 5 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP 6 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER 7 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN 8 - -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT 9 - -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \ - {"BSO", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\ - {"COS", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\ - {"GBP_SID", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\ - {"P_FT_HWID_D_GRA_O", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\ - {"SESSION_ID", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\ - {"T", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\ - {"TIMESTAMP", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\ - {"VER", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\ - {"VLAN", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\ - {"erspan3_fixed_hdr_t fid count", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT} - -/*! - * \name ERSPAN3_SUBHDR_5_T field IDs. - */ -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID 1 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID 2 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP 3 - -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT 4 - -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \ - {"PLATFORM_ID", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\ - {"PORT_ID", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\ - {"SWITCH_ID", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\ - {"TIMESTAMP", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\ - {"erspan3_subhdr_5_t fid count", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT} - -/*! - * \name ETHERTYPE_T field IDs. - */ -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ETHERTYPE_T_TYPE 0 - -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT 1 - -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \ - {"TYPE", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ETHERTYPE_T_TYPE},\ - {"ethertype_t fid count", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT} - -/*! - * \name GENERIC_LOOPBACK_T field IDs. - */ -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ 0 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE 1 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ 2 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS 3 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE 4 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY 5 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL 6 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ 7 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0 8 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1 9 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ 10 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1 11 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2 12 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 13 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE 14 - -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT 15 - -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \ - {"DESTINATION_OBJ", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\ - {"DESTINATION_TYPE", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\ - {"ENTROPY_OBJ", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\ - {"FLAGS", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\ - {"HEADER_TYPE", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\ - {"INPUT_PRIORITY", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\ - {"INTERFACE_CTRL", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\ - {"INTERFACE_OBJ", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\ - {"PROCESSING_CTRL_0", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\ - {"PROCESSING_CTRL_1", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\ - {"QOS_OBJ", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\ - {"RESERVED_1", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\ - {"RESERVED_2", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2},\ - {"SOURCE_SYSTEM_PORT", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\ - {"START_BYTE", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\ - {"generic_loopback_t fid count", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT} - -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP 0 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF 1 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED 2 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP 3 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP 4 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP 5 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP 6 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP 7 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1 8 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10 - -/*! - * \name ICMP_T field IDs. - */ -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ICMP_T_CHECKSUM 0 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ICMP_T_CODE 1 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ICMP_T_ICMP_TYPE 2 - -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ICMP_T_FID_COUNT 3 - -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \ - {"CHECKSUM", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ICMP_T_CHECKSUM},\ - {"CODE", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ICMP_T_CODE},\ - {"ICMP_TYPE", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ICMP_T_ICMP_TYPE},\ - {"icmp_t fid count", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ICMP_T_FID_COUNT} - -/*! - * \name IFA_HEADER_T field IDs. - */ -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_FLAGS 0 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_GNS 1 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH 2 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_NEXT_HDR 3 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_VER 4 - -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_FID_COUNT 5 - -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT \ - {"FLAGS", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_FLAGS},\ - {"GNS", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_GNS},\ - {"MAX_LENGTH", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH},\ - {"NEXT_HDR", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_NEXT_HDR},\ - {"VER", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_VER},\ - {"ifa_header_t fid count", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_FID_COUNT} - -/*! - * \name IFA_METADATA_A_T field IDs. - */ -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_A_T_CN 0 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_A_T_FWD_HDR_TTL 1 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_A_T_LNS_DEVICE_ID 2 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_A_T_PORT_SPEED 3 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_A_T_QUEUE_ID 4 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_A_T_RX_TIMESTAMP_SEC 5 - -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT 6 - -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_A_T_FIELD_NAME_MAP_INIT \ - {"CN", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_A_T_CN},\ - {"FWD_HDR_TTL", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_A_T_FWD_HDR_TTL},\ - {"LNS_DEVICE_ID", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_A_T_LNS_DEVICE_ID},\ - {"PORT_SPEED", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_A_T_PORT_SPEED},\ - {"QUEUE_ID", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_A_T_QUEUE_ID},\ - {"RX_TIMESTAMP_SEC", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_A_T_RX_TIMESTAMP_SEC},\ - {"ifa_metadata_a_t fid count", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT} - -/*! - * \name IFA_METADATA_B_T field IDs. - */ -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_B_T_EGRESS_PORT_ID 0 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_B_T_INGRESS_PORT_ID 1 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_B_T_MMU_STAT_0 2 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_B_T_MMU_STAT_1 3 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_B_T_RESIDENCE_TIME_NANOSEC 4 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_B_T_RX_TIMESTAMP_NANOSEC 5 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_B_T_TX_QUEUE_BYTE_COUNT 6 - -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT 7 - -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_B_T_FIELD_NAME_MAP_INIT \ - {"EGRESS_PORT_ID", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_B_T_EGRESS_PORT_ID},\ - {"INGRESS_PORT_ID", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_B_T_INGRESS_PORT_ID},\ - {"MMU_STAT_0", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_B_T_MMU_STAT_0},\ - {"MMU_STAT_1", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_B_T_MMU_STAT_1},\ - {"RESIDENCE_TIME_NANOSEC", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_B_T_RESIDENCE_TIME_NANOSEC},\ - {"RX_TIMESTAMP_NANOSEC", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_B_T_RX_TIMESTAMP_NANOSEC},\ - {"TX_QUEUE_BYTE_COUNT", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_B_T_TX_QUEUE_BYTE_COUNT},\ - {"ifa_metadata_b_t fid count", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT} - -/*! - * \name IFA_METADATA_BASE_T field IDs. - */ -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_BASE_T_ACTION_VECTOR 0 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_BASE_T_HOP_LIMIT_CURRENT_LENGTH 1 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_BASE_T_REQUEST_VECTOR 2 - -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT 3 - -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_BASE_T_FIELD_NAME_MAP_INIT \ - {"ACTION_VECTOR", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_BASE_T_ACTION_VECTOR},\ - {"HOP_LIMIT_CURRENT_LENGTH", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_BASE_T_HOP_LIMIT_CURRENT_LENGTH},\ - {"REQUEST_VECTOR", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_BASE_T_REQUEST_VECTOR},\ - {"ifa_metadata_base_t fid count", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT} - -/*! - * \name IPFIX_T field IDs. - */ -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IPFIX_T_EXPORT_TIME 0 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IPFIX_T_LENGTH 1 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IPFIX_T_SEQUENCE_NUM 3 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IPFIX_T_VERSION 4 - -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IPFIX_T_FID_COUNT 5 - -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \ - {"EXPORT_TIME", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IPFIX_T_EXPORT_TIME},\ - {"LENGTH", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IPFIX_T_LENGTH},\ - {"OBS_DOMAIN_ID", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\ - {"SEQUENCE_NUM", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IPFIX_T_SEQUENCE_NUM},\ - {"VERSION", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IPFIX_T_VERSION},\ - {"ipfix_t fid count", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IPFIX_T_FID_COUNT} - -/*! - * \name IPV4_T field IDs. - */ -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_DA 0 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_HDR_CHECKSUM 2 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_ID 3 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_OPTION 4 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_PROTOCOL 5 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_SA 6 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_TOS 7 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_TOTAL_LENGTH 8 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_TTL 9 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_VERSION_HDR_LEN 10 - -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_FID_COUNT 11 - -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \ - {"DA", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_DA},\ - {"FLAGS_FRAG_OFFSET", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\ - {"HDR_CHECKSUM", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_HDR_CHECKSUM},\ - {"ID", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_ID},\ - {"OPTION", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_OPTION},\ - {"PROTOCOL", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_PROTOCOL},\ - {"SA", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_SA},\ - {"TOS", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_TOS},\ - {"TOTAL_LENGTH", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_TOTAL_LENGTH},\ - {"TTL", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_TTL},\ - {"VERSION_HDR_LEN", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_VERSION_HDR_LEN},\ - {"ipv4_t fid count", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_FID_COUNT} - -/*! - * \name IPV6_T field IDs. - */ -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_DA 0 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_FLOW_LABEL 1 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_HOP_LIMIT 2 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_NEXT_HEADER 3 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_SA 5 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_TRAFFIC_CLASS 6 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_VERSION 7 - -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_FID_COUNT 8 - -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \ - {"DA", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_DA},\ - {"FLOW_LABEL", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_FLOW_LABEL},\ - {"HOP_LIMIT", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_HOP_LIMIT},\ - {"NEXT_HEADER", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_NEXT_HEADER},\ - {"PAYLOAD_LENGTH", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\ - {"SA", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_SA},\ - {"TRAFFIC_CLASS", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_TRAFFIC_CLASS},\ - {"VERSION", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_VERSION},\ - {"ipv6_t fid count", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_FID_COUNT} - -/*! - * \name L2_T field IDs. - */ -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_L2_T_MACDA 0 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_L2_T_MACSA 1 - -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_L2_T_FID_COUNT 2 - -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \ - {"MACDA", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_L2_T_MACDA},\ - {"MACSA", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_L2_T_MACSA},\ - {"l2_t fid count", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_L2_T_FID_COUNT} - -/*! - * \name MIRROR_ERSPAN_SN_T field IDs. - */ -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0 - -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT 1 - -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \ - {"SEQ_NUM", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\ - {"mirror_erspan_sn_t fid count", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT} - -/*! - * \name MIRROR_TRANSPORT_T field IDs. - */ -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_MIRROR_TRANSPORT_T_DATA 0 - -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT 1 - -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \ - {"DATA", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_MIRROR_TRANSPORT_T_DATA},\ - {"mirror_transport_t fid count", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT} - -/*! - * \name PSAMP_MIRROR_ON_DROP_0_T field IDs. - */ -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT 1 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH 2 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS 3 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S 4 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID 5 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID 6 - -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT 7 - -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \ - {"EGRESS_MOD_PORT", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\ - {"INGRESS_PORT", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\ - {"LENGTH", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\ - {"OBS_TIME_NS", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\ - {"OBS_TIME_S", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\ - {"SWITCH_ID", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\ - {"TEMPLATE_ID", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\ - {"psamp_mirror_on_drop_0_t fid count", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT} - -/*! - * \name PSAMP_MIRROR_ON_DROP_3_T field IDs. - */ -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON 0 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0 1 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH 2 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE 3 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX 4 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA 5 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR 6 - -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT 7 - -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT \ - {"DROP_REASON", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON},\ - {"RESERVED_0", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0},\ - {"SAMPLED_LENGTH", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH},\ - {"SMOD_STATE", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE},\ - {"UC_COS__COLOR__PROB_IDX", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX},\ - {"USER_META_DATA", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA},\ - {"VAR_LEN_INDICATOR", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR},\ - {"psamp_mirror_on_drop_3_t fid count", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT} - -/*! - * \name RARP_T field IDs. - */ -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_HARDWARE_LEN 0 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_HARDWARE_TYPE 1 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_OPERATION 2 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_PROT_ADDR_LEN 3 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_PROTOCOL_TYPE 4 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_SENDER_HA 5 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_SENDER_IP 6 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_TARGET_HA 7 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_TARGET_IP 8 - -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_FID_COUNT 9 - -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \ - {"HARDWARE_LEN", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_HARDWARE_LEN},\ - {"HARDWARE_TYPE", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_HARDWARE_TYPE},\ - {"OPERATION", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_OPERATION},\ - {"PROT_ADDR_LEN", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_PROT_ADDR_LEN},\ - {"PROTOCOL_TYPE", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_PROTOCOL_TYPE},\ - {"SENDER_HA", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_SENDER_HA},\ - {"SENDER_IP", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_SENDER_IP},\ - {"TARGET_HA", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_TARGET_HA},\ - {"TARGET_IP", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_TARGET_IP},\ - {"rarp_t fid count", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_FID_COUNT} - -/*! - * \name SFLOW_SHIM_0_T field IDs. - */ -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION 0 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE 1 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T_VERSION 2 - -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT 3 - -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT \ - {"SYS_DESTINATION", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION},\ - {"SYS_SOURCE", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE},\ - {"VERSION", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T_VERSION},\ - {"sflow_shim_0_t fid count", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT} - -/*! - * \name SFLOW_SHIM_1_T field IDs. - */ -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE 0 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED 1 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE 2 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST 3 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE 4 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED 5 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED 6 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE 7 - -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT 8 - -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT \ - {"FLAG_DEST_SAMPLE", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE},\ - {"FLAG_DISCARDED", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED},\ - {"FLAG_FLEX_SAMPLE", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE},\ - {"FLAG_MCAST", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST},\ - {"FLAG_SRC_SAMPLE", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE},\ - {"FLAG_TRUNCATED", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED},\ - {"RESERVED", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED},\ - {"SYS_OPCODE", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE},\ - {"sflow_shim_1_t fid count", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT} - -/*! - * \name SFLOW_SHIM_2_T field IDs. - */ -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM 0 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA 1 - -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT 2 - -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT \ - {"SEQUENCE_NUM", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM},\ - {"USER_META_DATA", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA},\ - {"sflow_shim_2_t fid count", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT} - -/*! - * \name TCP_FIRST_4BYTES_T field IDs. - */ -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1 - -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT 2 - -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \ - {"DST_PORT", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\ - {"SRC_PORT", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\ - {"tcp_first_4bytes_t fid count", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT} - -/*! - * \name TCP_LAST_16BYTES_T field IDs. - */ -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM 0 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM 1 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM 3 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR 4 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE 5 - -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT 6 - -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \ - {"ACK_NUM", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\ - {"CHECKSUM", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\ - {"HDR_LEN_AND_FLAGS", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\ - {"SEQ_NUM", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\ - {"URGENT_PTR", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\ - {"WIN_SIZE", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\ - {"tcp_last_16bytes_t fid count", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT} - -/*! - * \name UDP_T field IDs. - */ -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_UDP_T_CHECKSUM 0 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_UDP_T_DST_PORT 1 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_UDP_T_SRC_PORT 2 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_UDP_T_UDP_LENGTH 3 - -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_UDP_T_FID_COUNT 4 - -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \ - {"CHECKSUM", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_UDP_T_CHECKSUM},\ - {"DST_PORT", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_UDP_T_DST_PORT},\ - {"SRC_PORT", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_UDP_T_SRC_PORT},\ - {"UDP_LENGTH", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_UDP_T_UDP_LENGTH},\ - {"udp_t fid count", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_UDP_T_FID_COUNT} - -/*! - * \name UNKNOWN_L3_T field IDs. - */ -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD 1 - -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT 2 - -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \ - {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\ - {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\ - {"unknown_l3_t fid count", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT} - -/*! - * \name UNKNOWN_L4_T field IDs. - */ -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0 - -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT 1 - -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \ - {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\ - {"unknown_l4_t fid count", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT} - -/*! - * \name UNKNOWN_L5_T field IDs. - */ -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2 - -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT 3 - -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \ - {"L5_BYTES_0_1", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\ - {"L5_BYTES_2_3", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\ - {"L5_BYTES_4_7", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\ - {"unknown_l5_t fid count", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT} - -/*! - * \name VLAN_T field IDs. - */ -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_VLAN_T_CFI 0 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_VLAN_T_PCP 1 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_VLAN_T_TPID 2 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_VLAN_T_VID 3 - -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_VLAN_T_FID_COUNT 4 - -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \ - {"CFI", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_VLAN_T_CFI},\ - {"PCP", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_VLAN_T_PCP},\ - {"TPID", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_VLAN_T_TPID},\ - {"VID", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_VLAN_T_VID},\ - {"vlan_t fid count", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_VLAN_T_FID_COUNT} - -/*! - * \name VXLAN_T field IDs. - */ -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_VXLAN_T_RESERVED2 1 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_VXLAN_T_VN_ID 2 - -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_VXLAN_T_FID_COUNT 3 - -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \ - {"FLAGS_RESERVED_1", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\ - {"RESERVED2", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_VXLAN_T_RESERVED2},\ - {"VN_ID", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_VXLAN_T_VN_ID},\ - {"vxlan_t fid count", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_VXLAN_T_FID_COUNT} - - -#endif /* BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_FLEXHDR_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/cna_6_5_34_2_0/bcm56690_a0_cna_6_5_34_2_0_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/cna_6_5_34_2_0/bcm56690_a0_cna_6_5_34_2_0_bcmpkt_rxpmd_flex_data.h deleted file mode 100644 index d71f0c0076b..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/cna_6_5_34_2_0/bcm56690_a0_cna_6_5_34_2_0_bcmpkt_rxpmd_flex_data.h +++ /dev/null @@ -1,134 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) map.yml. - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - -#ifndef BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_DATA_H -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_DATA_H - -/*! - * \name RX flex metadata field IDs. - */ -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0 0 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_DVP_15_0 1 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0 2 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0 3 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0 4 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_DROP_CODE_15_0 5 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0 6 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0 7 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16 8 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_ERSPAN3_GBP_SID_15_0 9 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0 10 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16 11 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32 12 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0 13 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0 14 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0 15 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0 16 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16 17 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_6_0 18 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 19 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0 20 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0 21 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0 22 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0 23 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0 24 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0 25 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_14_0 26 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_14_0 27 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0 28 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0 29 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_SVP_15_0 30 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0 31 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0 32 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0 33 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0 34 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_TAG_ACTION_CTRL_1_0 35 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0 36 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0 37 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_VFI_15_0 38 - -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_FID_COUNT 39 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_COUNT 25 - -/*! - * \name Packet Flex Reason Types. - */ -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS 0 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT 1 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP 2 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER 3 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT 4 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP 5 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS 6 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD 7 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE 8 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP 9 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS 10 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR 11 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR 12 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL 13 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST 14 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED 15 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED 16 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED 17 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU 18 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED 19 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT 20 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP 21 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED 22 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP 23 -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_VFP 24 - -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \ - {"CML_FLAGS", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\ - {"EM_FT", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT},\ - {"IFP", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP},\ - {"IFP_METER", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\ - {"IVXLT", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\ - {"L2_DST_LOOKUP", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\ - {"L2_DST_LOOKUP_MISS", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\ - {"L2_SRC_DISCARD", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD},\ - {"L2_SRC_STATIC_MOVE", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\ - {"L3_DST_LOOKUP", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\ - {"L3_DST_LOOKUP_MISS", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\ - {"L3_HDR_ERROR", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\ - {"L3_TTL_ERROR", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\ - {"LEARN_CACHE_FULL", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\ - {"MACSA_MULTICAST", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST},\ - {"MEMBERSHIP_CHECK_FAILED", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED},\ - {"MIRROR_SAMPLER_EGR_SAMPLED", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED},\ - {"MIRROR_SAMPLER_SAMPLED", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED},\ - {"NO_COPY_TO_CPU", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\ - {"PKT_INTEGRITY_CHECK_FAILED", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\ - {"PROTOCOL_PKT", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\ - {"SER_DROP", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP},\ - {"SPANNING_TREE_CHECK_FAILED", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED},\ - {"TRACE_DOP", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\ - {"VFP", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_VFP},\ - {"flex reason count", BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_COUNT} - -#endif /* BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/cna_6_5_34_2_0/bcm56690_a0_cna_6_5_34_2_0_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/cna_6_5_34_2_0/bcm56690_a0_cna_6_5_34_2_0_bcmpkt_rxpmd_match_id_defs.h deleted file mode 100644 index 8811c79e587..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56690_a0/cna_6_5_34_2_0/bcm56690_a0_cna_6_5_34_2_0_bcmpkt_rxpmd_match_id_defs.h +++ /dev/null @@ -1,228 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) bcm56690_a0_cna_6_5_34_2_0_sf_match_id_info.yml - * for device bcm56690_a0 and variant cna_6_5_34_2_0. - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - -#ifndef BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H - -#include - -/*! - * \brief Get the Match ID DataBase information. - * - * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information. -*/ -extern bcmpkt_rxpmd_match_id_db_info_t * - bcm56690_a0_cna_6_5_34_2_0_rxpmd_match_id_db_info_get(void); - -/*! - * \brief Get the Match ID Mapping information. - * - * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information. -*/ -extern bcmpkt_rxpmd_match_id_map_info_t * - bcm56690_a0_cna_6_5_34_2_0_rxpmd_match_id_map_info_get(void); - -/*! - \name RXPMD Match IDs -*/ -#define BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG 0 -#define BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 1 -#define BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE 2 -#define BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG 3 -#define BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP 4 -#define BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE 5 -#define BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP 6 -#define BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER 7 -#define BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE 8 -#define BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 9 -#define BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 10 -#define BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE 11 -#define BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP 12 -#define BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES 13 -#define BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES 14 -#define BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP 15 -#define BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 16 -#define BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 17 -#define BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 18 -#define BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN 19 -#define BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH 20 -#define BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK 21 -#define BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE 22 -#define BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG 23 -#define BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 24 -#define BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE 25 -#define BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG 26 -#define BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP 27 -#define BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE 28 -#define BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP 29 -#define BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER 30 -#define BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE 31 -#define BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 32 -#define BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 33 -#define BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE 34 -#define BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP 35 -#define BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES 36 -#define BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES 37 -#define BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP 38 -#define BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 39 -#define BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 40 -#define BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 41 -#define BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN 42 -#define BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG 43 -#define BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 44 -#define BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE 45 -#define BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG 46 -#define BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP 47 -#define BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE 48 -#define BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP 49 -#define BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER 50 -#define BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE 51 -#define BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 52 -#define BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 53 -#define BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE 54 -#define BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP 55 -#define BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES 56 -#define BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES 57 -#define BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP 58 -#define BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 59 -#define BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 60 -#define BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 61 -#define BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG 62 -#define BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 63 -#define BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE 64 -#define BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG 65 -#define BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP 66 -#define BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE 67 -#define BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP 68 -#define BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER 69 -#define BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE 70 -#define BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 71 -#define BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 72 -#define BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE 73 -#define BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP 74 -#define BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES 75 -#define BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES 76 -#define BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP 77 -#define BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 78 -#define BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 79 -#define BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 80 -#define BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN 81 -#define BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH 82 -#define BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK 83 -#define BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE 84 -#define BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_COUNT 85 - -#define BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \ - {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \ - {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \ - {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \ - {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER", BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE", BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \ - {"EGRESS_PKT_SYS_HDR_EP_NIH", BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH}, \ - {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \ - {"EGRESS_PKT_SYS_HDR_NONE", BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER", BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE", BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \ - {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \ - {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \ - {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \ - {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER", BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE", BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \ - {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \ - {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \ - {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \ - {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER", BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE", BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \ - {"INGRESS_PKT_SYS_HDR_EP_NIH", BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH}, \ - {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \ - {"INGRESS_PKT_SYS_HDR_NONE", BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \ - {"rxpmd_match_id_count", BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_COUNT} - -#endif /*! BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_34_2_0/bcm56780_a0_cna_6_5_34_2_0_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_34_2_0/bcm56780_a0_cna_6_5_34_2_0_bcmpkt_flexhdr.h deleted file mode 100644 index 0017d820e6c..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_34_2_0/bcm56780_a0_cna_6_5_34_2_0_bcmpkt_flexhdr.h +++ /dev/null @@ -1,105 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) header.yml. - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - -#ifndef BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_FLEXHDR_H -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_FLEXHDR_H - -#include - -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T 0 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T 1 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T 2 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T 3 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T 4 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T 5 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ETHERTYPE_T 6 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T 7 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ICMP_T 8 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T 9 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_T 10 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IPFIX_T 11 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T 12 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T 13 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_L2_T 14 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_MIRROR_ERSPAN_SN_T 15 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_MIRROR_TRANSPORT_T 16 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T 17 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T 18 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T 19 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T 20 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T 21 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_2_T 22 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_SVTAG_T 23 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_TCP_FIRST_4BYTES_T 24 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T 25 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_UDP_T 26 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L3_T 27 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L4_T 28 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T 29 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_VLAN_T 30 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_VXLAN_T 31 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_T 32 - -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_FLEXHDR_COUNT 33 - -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_FLEXHDR_NAME_MAP_INIT \ - {"arp_t", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T},\ - {"cpu_composites_0_t", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T},\ - {"cpu_composites_1_t", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T},\ - {"ep_nih_header_t", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T},\ - {"erspan3_fixed_hdr_t", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T},\ - {"erspan3_subhdr_5_t", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T},\ - {"ethertype_t", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ETHERTYPE_T},\ - {"generic_loopback_t", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T},\ - {"icmp_t", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ICMP_T},\ - {"ifa_header_t", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T},\ - {"ifa_metadata_t", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_T},\ - {"ipfix_t", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IPFIX_T},\ - {"ipv4_t", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T},\ - {"ipv6_t", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T},\ - {"l2_t", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_L2_T},\ - {"mirror_erspan_sn_t", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_MIRROR_ERSPAN_SN_T},\ - {"mirror_transport_t", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_MIRROR_TRANSPORT_T},\ - {"psamp_mirror_on_drop_0_t", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\ - {"psamp_mirror_on_drop_3_t", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T},\ - {"rarp_t", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T},\ - {"sflow_shim_0_t", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T},\ - {"sflow_shim_1_t", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T},\ - {"sflow_shim_2_t", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_2_T},\ - {"svtag_t", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_SVTAG_T},\ - {"tcp_first_4bytes_t", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_TCP_FIRST_4BYTES_T},\ - {"tcp_last_16bytes_t", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T},\ - {"udp_t", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_UDP_T},\ - {"unknown_l3_t", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L3_T},\ - {"unknown_l4_t", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L4_T},\ - {"unknown_l5_t", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T},\ - {"vlan_t", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_VLAN_T},\ - {"vxlan_t", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_VXLAN_T},\ - {"RXPMD_FLEX_T", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_T},\ - {"flexhdr count", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_FLEXHDR_COUNT} - -#endif /* BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_FLEXHDR_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_34_2_0/bcm56780_a0_cna_6_5_34_2_0_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_34_2_0/bcm56780_a0_cna_6_5_34_2_0_bcmpkt_flexhdr_data.h deleted file mode 100644 index ffa276baa32..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_34_2_0/bcm56780_a0_cna_6_5_34_2_0_bcmpkt_flexhdr_data.h +++ /dev/null @@ -1,674 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) header.yml. - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - -#ifndef BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_FLEXHDR_DATA_H -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_FLEXHDR_DATA_H - -/*! - * \name ARP_T field IDs. - */ -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_HARDWARE_LEN 0 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_HARDWARE_TYPE 1 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_OPERATION 2 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_PROT_ADDR_LEN 3 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_PROTOCOL_TYPE 4 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_SENDER_HA 5 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_SENDER_IP 6 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_TARGET_HA 7 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_TARGET_IP 8 - -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_FID_COUNT 9 - -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \ - {"HARDWARE_LEN", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_HARDWARE_LEN},\ - {"HARDWARE_TYPE", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_HARDWARE_TYPE},\ - {"OPERATION", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_OPERATION},\ - {"PROT_ADDR_LEN", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_PROT_ADDR_LEN},\ - {"PROTOCOL_TYPE", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_PROTOCOL_TYPE},\ - {"SENDER_HA", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_SENDER_HA},\ - {"SENDER_IP", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_SENDER_IP},\ - {"TARGET_HA", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_TARGET_HA},\ - {"TARGET_IP", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_TARGET_IP},\ - {"arp_t fid count", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_FID_COUNT} - -/*! - * \name CPU_COMPOSITES_0_T field IDs. - */ -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6 - -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT 7 - -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \ - {"DMA_CONT0", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\ - {"DMA_CONT1", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\ - {"DMA_CONT2", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\ - {"DMA_CONT3", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\ - {"DMA_CONT4", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\ - {"DMA_CONT5", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\ - {"DMA_CONT6", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\ - {"cpu_composites_0_t fid count", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT} - -/*! - * \name CPU_COMPOSITES_1_T field IDs. - */ -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7 8 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8 9 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9 10 - -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT 11 - -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \ - {"DMA_CONT10", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\ - {"DMA_CONT11", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\ - {"DMA_CONT12", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\ - {"DMA_CONT13", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\ - {"DMA_CONT14", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\ - {"DMA_CONT15", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\ - {"DMA_CONT16", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\ - {"DMA_CONT17", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\ - {"DMA_CONT7", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\ - {"DMA_CONT8", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\ - {"DMA_CONT9", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\ - {"cpu_composites_1_t fid count", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT} - -/*! - * \name EP_NIH_HEADER_T field IDs. - */ -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE 0 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE 1 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A 2 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B 3 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C 4 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A 5 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B 6 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C 7 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX 8 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0 9 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_START 10 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP 11 - -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT 12 - -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT \ - {"HEADER_SUBTYPE", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE},\ - {"HEADER_TYPE", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE},\ - {"OPAQUE_CTRL_A", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A},\ - {"OPAQUE_CTRL_B", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B},\ - {"OPAQUE_CTRL_C", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C},\ - {"OPAQUE_OBJECT_A", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A},\ - {"OPAQUE_OBJECT_B", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B},\ - {"OPAQUE_OBJECT_C", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C},\ - {"RECIRC_PROFILE_INDEX", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX},\ - {"RESERVED_0", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0},\ - {"START", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_START},\ - {"TIMESTAMP", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP},\ - {"ep_nih_header_t fid count", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT} - -/*! - * \name ERSPAN3_FIXED_HDR_T field IDs. - */ -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO 0 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS 1 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID 2 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID 4 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T 5 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP 6 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER 7 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN 8 - -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT 9 - -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \ - {"BSO", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\ - {"COS", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\ - {"GBP_SID", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\ - {"P_FT_HWID_D_GRA_O", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\ - {"SESSION_ID", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\ - {"T", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\ - {"TIMESTAMP", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\ - {"VER", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\ - {"VLAN", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\ - {"erspan3_fixed_hdr_t fid count", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT} - -/*! - * \name ERSPAN3_SUBHDR_5_T field IDs. - */ -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID 1 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID 2 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP 3 - -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT 4 - -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \ - {"PLATFORM_ID", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\ - {"PORT_ID", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\ - {"SWITCH_ID", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\ - {"TIMESTAMP", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\ - {"erspan3_subhdr_5_t fid count", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT} - -/*! - * \name ETHERTYPE_T field IDs. - */ -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ETHERTYPE_T_TYPE 0 - -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT 1 - -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \ - {"TYPE", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ETHERTYPE_T_TYPE},\ - {"ethertype_t fid count", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT} - -/*! - * \name GENERIC_LOOPBACK_T field IDs. - */ -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ 0 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE 1 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ 2 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS 3 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE 4 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY 5 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL 6 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ 7 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0 8 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1 9 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ 10 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1 11 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2 12 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 13 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE 14 - -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT 15 - -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \ - {"DESTINATION_OBJ", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\ - {"DESTINATION_TYPE", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\ - {"ENTROPY_OBJ", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\ - {"FLAGS", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\ - {"HEADER_TYPE", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\ - {"INPUT_PRIORITY", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\ - {"INTERFACE_CTRL", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\ - {"INTERFACE_OBJ", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\ - {"PROCESSING_CTRL_0", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\ - {"PROCESSING_CTRL_1", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\ - {"QOS_OBJ", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\ - {"RESERVED_1", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\ - {"RESERVED_2", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2},\ - {"SOURCE_SYSTEM_PORT", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\ - {"START_BYTE", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\ - {"generic_loopback_t fid count", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT} - -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP 0 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF 1 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED 2 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP 3 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP 4 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP 5 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP 6 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP 7 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1 8 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10 - -/*! - * \name ICMP_T field IDs. - */ -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ICMP_T_CHECKSUM 0 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ICMP_T_CODE 1 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ICMP_T_ICMP_TYPE 2 - -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ICMP_T_FID_COUNT 3 - -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \ - {"CHECKSUM", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ICMP_T_CHECKSUM},\ - {"CODE", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ICMP_T_CODE},\ - {"ICMP_TYPE", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ICMP_T_ICMP_TYPE},\ - {"icmp_t fid count", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ICMP_T_FID_COUNT} - -/*! - * \name IFA_HEADER_T field IDs. - */ -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_FLAGS 0 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_GNS 1 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH 2 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_NEXT_HDR 3 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_VER 4 - -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_FID_COUNT 5 - -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT \ - {"FLAGS", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_FLAGS},\ - {"GNS", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_GNS},\ - {"MAX_LENGTH", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH},\ - {"NEXT_HDR", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_NEXT_HDR},\ - {"VER", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_VER},\ - {"ifa_header_t fid count", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_FID_COUNT} - -/*! - * \name IFA_METADATA_T field IDs. - */ -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_T_ACTION_VECTOR 0 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_T_HOP_LIMIT_CURRENT_LENGTH 1 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_T_METADATA 2 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_T_REQUEST_VECTOR 3 - -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_T_FID_COUNT 4 - -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_T_FIELD_NAME_MAP_INIT \ - {"ACTION_VECTOR", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_T_ACTION_VECTOR},\ - {"HOP_LIMIT_CURRENT_LENGTH", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_T_HOP_LIMIT_CURRENT_LENGTH},\ - {"METADATA", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_T_METADATA},\ - {"REQUEST_VECTOR", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_T_REQUEST_VECTOR},\ - {"ifa_metadata_t fid count", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_T_FID_COUNT} - -/*! - * \name IPFIX_T field IDs. - */ -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IPFIX_T_EXPORT_TIME 0 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IPFIX_T_LENGTH 1 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IPFIX_T_SEQUENCE_NUM 3 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IPFIX_T_VERSION 4 - -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IPFIX_T_FID_COUNT 5 - -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \ - {"EXPORT_TIME", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IPFIX_T_EXPORT_TIME},\ - {"LENGTH", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IPFIX_T_LENGTH},\ - {"OBS_DOMAIN_ID", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\ - {"SEQUENCE_NUM", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IPFIX_T_SEQUENCE_NUM},\ - {"VERSION", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IPFIX_T_VERSION},\ - {"ipfix_t fid count", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IPFIX_T_FID_COUNT} - -/*! - * \name IPV4_T field IDs. - */ -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_DA 0 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_HDR_CHECKSUM 2 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_ID 3 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_OPTION 4 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_PROTOCOL 5 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_SA 6 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_TOS 7 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_TOTAL_LENGTH 8 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_TTL 9 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_VERSION_HDR_LEN 10 - -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_FID_COUNT 11 - -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \ - {"DA", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_DA},\ - {"FLAGS_FRAG_OFFSET", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\ - {"HDR_CHECKSUM", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_HDR_CHECKSUM},\ - {"ID", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_ID},\ - {"OPTION", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_OPTION},\ - {"PROTOCOL", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_PROTOCOL},\ - {"SA", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_SA},\ - {"TOS", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_TOS},\ - {"TOTAL_LENGTH", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_TOTAL_LENGTH},\ - {"TTL", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_TTL},\ - {"VERSION_HDR_LEN", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_VERSION_HDR_LEN},\ - {"ipv4_t fid count", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_FID_COUNT} - -/*! - * \name IPV6_T field IDs. - */ -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_DA 0 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_FLOW_LABEL 1 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_HOP_LIMIT 2 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_NEXT_HEADER 3 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_SA 5 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_TRAFFIC_CLASS 6 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_VERSION 7 - -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_FID_COUNT 8 - -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \ - {"DA", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_DA},\ - {"FLOW_LABEL", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_FLOW_LABEL},\ - {"HOP_LIMIT", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_HOP_LIMIT},\ - {"NEXT_HEADER", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_NEXT_HEADER},\ - {"PAYLOAD_LENGTH", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\ - {"SA", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_SA},\ - {"TRAFFIC_CLASS", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_TRAFFIC_CLASS},\ - {"VERSION", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_VERSION},\ - {"ipv6_t fid count", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_FID_COUNT} - -/*! - * \name L2_T field IDs. - */ -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_L2_T_MACDA 0 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_L2_T_MACSA 1 - -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_L2_T_FID_COUNT 2 - -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \ - {"MACDA", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_L2_T_MACDA},\ - {"MACSA", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_L2_T_MACSA},\ - {"l2_t fid count", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_L2_T_FID_COUNT} - -/*! - * \name MIRROR_ERSPAN_SN_T field IDs. - */ -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0 - -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT 1 - -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \ - {"SEQ_NUM", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\ - {"mirror_erspan_sn_t fid count", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT} - -/*! - * \name MIRROR_TRANSPORT_T field IDs. - */ -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_MIRROR_TRANSPORT_T_DATA 0 - -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT 1 - -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \ - {"DATA", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_MIRROR_TRANSPORT_T_DATA},\ - {"mirror_transport_t fid count", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT} - -/*! - * \name PSAMP_MIRROR_ON_DROP_0_T field IDs. - */ -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT 1 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH 2 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS 3 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S 4 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID 5 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID 6 - -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT 7 - -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \ - {"EGRESS_MOD_PORT", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\ - {"INGRESS_PORT", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\ - {"LENGTH", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\ - {"OBS_TIME_NS", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\ - {"OBS_TIME_S", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\ - {"SWITCH_ID", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\ - {"TEMPLATE_ID", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\ - {"psamp_mirror_on_drop_0_t fid count", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT} - -/*! - * \name PSAMP_MIRROR_ON_DROP_3_T field IDs. - */ -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON 0 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0 1 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH 2 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE 3 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX 4 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA 5 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR 6 - -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT 7 - -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT \ - {"DROP_REASON", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON},\ - {"RESERVED_0", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0},\ - {"SAMPLED_LENGTH", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH},\ - {"SMOD_STATE", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE},\ - {"UC_COS__COLOR__PROB_IDX", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX},\ - {"USER_META_DATA", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA},\ - {"VAR_LEN_INDICATOR", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR},\ - {"psamp_mirror_on_drop_3_t fid count", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT} - -/*! - * \name RARP_T field IDs. - */ -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_HARDWARE_LEN 0 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_HARDWARE_TYPE 1 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_OPERATION 2 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_PROT_ADDR_LEN 3 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_PROTOCOL_TYPE 4 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_SENDER_HA 5 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_SENDER_IP 6 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_TARGET_HA 7 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_TARGET_IP 8 - -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_FID_COUNT 9 - -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \ - {"HARDWARE_LEN", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_HARDWARE_LEN},\ - {"HARDWARE_TYPE", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_HARDWARE_TYPE},\ - {"OPERATION", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_OPERATION},\ - {"PROT_ADDR_LEN", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_PROT_ADDR_LEN},\ - {"PROTOCOL_TYPE", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_PROTOCOL_TYPE},\ - {"SENDER_HA", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_SENDER_HA},\ - {"SENDER_IP", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_SENDER_IP},\ - {"TARGET_HA", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_TARGET_HA},\ - {"TARGET_IP", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_TARGET_IP},\ - {"rarp_t fid count", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_FID_COUNT} - -/*! - * \name SFLOW_SHIM_0_T field IDs. - */ -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION 0 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE 1 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T_VERSION 2 - -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT 3 - -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT \ - {"SYS_DESTINATION", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION},\ - {"SYS_SOURCE", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE},\ - {"VERSION", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T_VERSION},\ - {"sflow_shim_0_t fid count", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT} - -/*! - * \name SFLOW_SHIM_1_T field IDs. - */ -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE 0 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED 1 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE 2 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST 3 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE 4 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED 5 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED 6 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE 7 - -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT 8 - -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT \ - {"FLAG_DEST_SAMPLE", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE},\ - {"FLAG_DISCARDED", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED},\ - {"FLAG_FLEX_SAMPLE", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE},\ - {"FLAG_MCAST", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST},\ - {"FLAG_SRC_SAMPLE", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE},\ - {"FLAG_TRUNCATED", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED},\ - {"RESERVED", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED},\ - {"SYS_OPCODE", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE},\ - {"sflow_shim_1_t fid count", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT} - -/*! - * \name SFLOW_SHIM_2_T field IDs. - */ -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM 0 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA 1 - -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT 2 - -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT \ - {"SEQUENCE_NUM", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM},\ - {"USER_META_DATA", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA},\ - {"sflow_shim_2_t fid count", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT} - -/*! - * \name SVTAG_T field IDs. - */ -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_SVTAG_T_DATA_LWR 0 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_SVTAG_T_DATA_UPR 1 - -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_SVTAG_T_FID_COUNT 2 - -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_SVTAG_T_FIELD_NAME_MAP_INIT \ - {"DATA_LWR", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_SVTAG_T_DATA_LWR},\ - {"DATA_UPR", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_SVTAG_T_DATA_UPR},\ - {"svtag_t fid count", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_SVTAG_T_FID_COUNT} - -/*! - * \name TCP_FIRST_4BYTES_T field IDs. - */ -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1 - -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT 2 - -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \ - {"DST_PORT", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\ - {"SRC_PORT", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\ - {"tcp_first_4bytes_t fid count", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT} - -/*! - * \name TCP_LAST_16BYTES_T field IDs. - */ -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM 0 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM 1 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM 3 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR 4 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE 5 - -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT 6 - -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \ - {"ACK_NUM", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\ - {"CHECKSUM", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\ - {"HDR_LEN_AND_FLAGS", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\ - {"SEQ_NUM", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\ - {"URGENT_PTR", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\ - {"WIN_SIZE", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\ - {"tcp_last_16bytes_t fid count", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT} - -/*! - * \name UDP_T field IDs. - */ -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_UDP_T_CHECKSUM 0 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_UDP_T_DST_PORT 1 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_UDP_T_SRC_PORT 2 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_UDP_T_UDP_LENGTH 3 - -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_UDP_T_FID_COUNT 4 - -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \ - {"CHECKSUM", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_UDP_T_CHECKSUM},\ - {"DST_PORT", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_UDP_T_DST_PORT},\ - {"SRC_PORT", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_UDP_T_SRC_PORT},\ - {"UDP_LENGTH", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_UDP_T_UDP_LENGTH},\ - {"udp_t fid count", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_UDP_T_FID_COUNT} - -/*! - * \name UNKNOWN_L3_T field IDs. - */ -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD 1 - -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT 2 - -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \ - {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\ - {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\ - {"unknown_l3_t fid count", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT} - -/*! - * \name UNKNOWN_L4_T field IDs. - */ -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0 - -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT 1 - -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \ - {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\ - {"unknown_l4_t fid count", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT} - -/*! - * \name UNKNOWN_L5_T field IDs. - */ -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2 - -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT 3 - -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \ - {"L5_BYTES_0_1", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\ - {"L5_BYTES_2_3", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\ - {"L5_BYTES_4_7", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\ - {"unknown_l5_t fid count", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT} - -/*! - * \name VLAN_T field IDs. - */ -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_VLAN_T_CFI 0 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_VLAN_T_PCP 1 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_VLAN_T_TPID 2 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_VLAN_T_VID 3 - -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_VLAN_T_FID_COUNT 4 - -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \ - {"CFI", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_VLAN_T_CFI},\ - {"PCP", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_VLAN_T_PCP},\ - {"TPID", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_VLAN_T_TPID},\ - {"VID", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_VLAN_T_VID},\ - {"vlan_t fid count", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_VLAN_T_FID_COUNT} - -/*! - * \name VXLAN_T field IDs. - */ -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_VXLAN_T_RESERVED2 1 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_VXLAN_T_VN_ID 2 - -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_VXLAN_T_FID_COUNT 3 - -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \ - {"FLAGS_RESERVED_1", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\ - {"RESERVED2", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_VXLAN_T_RESERVED2},\ - {"VN_ID", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_VXLAN_T_VN_ID},\ - {"vxlan_t fid count", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_VXLAN_T_FID_COUNT} - - -#endif /* BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_FLEXHDR_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_34_2_0/bcm56780_a0_cna_6_5_34_2_0_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_34_2_0/bcm56780_a0_cna_6_5_34_2_0_bcmpkt_rxpmd_flex_data.h deleted file mode 100644 index c0ae53e6b00..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_34_2_0/bcm56780_a0_cna_6_5_34_2_0_bcmpkt_rxpmd_flex_data.h +++ /dev/null @@ -1,135 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) map.yml. - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - -#ifndef BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_DATA_H -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_DATA_H - -/*! - * \name RX flex metadata field IDs. - */ -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0 0 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_DVP_15_0 1 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0 2 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0 3 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0 4 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_DROP_CODE_15_0 5 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0 6 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0 7 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16 8 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_ERSPAN3_GBP_SID_15_0 9 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0 10 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16 11 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32 12 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0 13 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0 14 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_IFP_TO_EP_MACSEC_INFO_OR_IFP_OPAQUE_OBJ_15_0 15 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0 16 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0 17 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16 18 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0 19 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 20 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0 21 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0 22 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0 23 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0 24 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0 25 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0 26 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_14_0 27 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_14_0 28 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0 29 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0 30 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_SVP_15_0 31 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0 32 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0 33 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0 34 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0 35 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_TAG_ACTION_CTRL_1_0 36 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0 37 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0 38 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_VFI_15_0 39 - -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_FID_COUNT 40 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_COUNT 25 - -/*! - * \name Packet Flex Reason Types. - */ -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS 0 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT 1 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP 2 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER 3 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT 4 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP 5 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS 6 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD 7 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE 8 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP 9 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS 10 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR 11 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR 12 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL 13 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST 14 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED 15 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED 16 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED 17 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU 18 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED 19 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT 20 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP 21 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED 22 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP 23 -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_VFP 24 - -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \ - {"CML_FLAGS", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\ - {"EM_FT", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT},\ - {"IFP", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP},\ - {"IFP_METER", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\ - {"IVXLT", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\ - {"L2_DST_LOOKUP", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\ - {"L2_DST_LOOKUP_MISS", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\ - {"L2_SRC_DISCARD", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD},\ - {"L2_SRC_STATIC_MOVE", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\ - {"L3_DST_LOOKUP", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\ - {"L3_DST_LOOKUP_MISS", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\ - {"L3_HDR_ERROR", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\ - {"L3_TTL_ERROR", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\ - {"LEARN_CACHE_FULL", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\ - {"MACSA_MULTICAST", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST},\ - {"MEMBERSHIP_CHECK_FAILED", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED},\ - {"MIRROR_SAMPLER_EGR_SAMPLED", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED},\ - {"MIRROR_SAMPLER_SAMPLED", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED},\ - {"NO_COPY_TO_CPU", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\ - {"PKT_INTEGRITY_CHECK_FAILED", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\ - {"PROTOCOL_PKT", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\ - {"SER_DROP", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP},\ - {"SPANNING_TREE_CHECK_FAILED", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED},\ - {"TRACE_DOP", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\ - {"VFP", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_VFP},\ - {"flex reason count", BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_COUNT} - -#endif /* BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_34_2_0/bcm56780_a0_cna_6_5_34_2_0_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_34_2_0/bcm56780_a0_cna_6_5_34_2_0_bcmpkt_rxpmd_match_id_defs.h deleted file mode 100644 index e57c95cc255..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/cna_6_5_34_2_0/bcm56780_a0_cna_6_5_34_2_0_bcmpkt_rxpmd_match_id_defs.h +++ /dev/null @@ -1,234 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) bcm56780_a0_cna_6_5_34_2_0_sf_match_id_info.yml - * for device bcm56780_a0 and variant cna_6_5_34_2_0. - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - -#ifndef BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H - -#include - -/*! - * \brief Get the Match ID DataBase information. - * - * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information. -*/ -extern bcmpkt_rxpmd_match_id_db_info_t * - bcm56780_a0_cna_6_5_34_2_0_rxpmd_match_id_db_info_get(void); - -/*! - * \brief Get the Match ID Mapping information. - * - * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information. -*/ -extern bcmpkt_rxpmd_match_id_map_info_t * - bcm56780_a0_cna_6_5_34_2_0_rxpmd_match_id_map_info_get(void); - -/*! - \name RXPMD Match IDs -*/ -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG 0 -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 1 -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE 2 -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG 3 -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG 4 -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP 5 -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE 6 -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP 7 -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER 8 -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA 9 -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 10 -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 11 -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE 12 -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP 13 -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES 14 -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES 15 -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP 16 -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 17 -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 18 -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 19 -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN 20 -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH 21 -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK 22 -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE 23 -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG 24 -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 25 -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE 26 -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG 27 -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG 28 -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP 29 -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE 30 -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP 31 -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER 32 -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA 33 -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 34 -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 35 -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE 36 -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP 37 -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES 38 -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES 39 -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP 40 -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 41 -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 42 -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 43 -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN 44 -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG 45 -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 46 -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE 47 -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG 48 -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP 49 -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE 50 -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP 51 -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER 52 -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA 53 -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 54 -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 55 -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE 56 -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP 57 -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES 58 -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES 59 -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP 60 -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 61 -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 62 -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 63 -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG 64 -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 65 -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE 66 -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG 67 -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG 68 -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP 69 -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE 70 -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP 71 -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER 72 -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA 73 -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 74 -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 75 -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE 76 -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP 77 -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES 78 -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES 79 -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP 80 -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 81 -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 82 -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 83 -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN 84 -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH 85 -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK 86 -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE 87 -#define BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_COUNT 88 - -#define BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \ - {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \ - {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \ - {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \ - {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \ - {"EGRESS_PKT_FWD_L2_HDR_SVTAG", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \ - {"EGRESS_PKT_SYS_HDR_EP_NIH", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH}, \ - {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \ - {"EGRESS_PKT_SYS_HDR_NONE", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_SVTAG", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \ - {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \ - {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \ - {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \ - {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \ - {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \ - {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \ - {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \ - {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \ - {"INGRESS_PKT_OUTER_L2_HDR_SVTAG", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \ - {"INGRESS_PKT_SYS_HDR_EP_NIH", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH}, \ - {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \ - {"INGRESS_PKT_SYS_HDR_NONE", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \ - {"rxpmd_match_id_count", BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_COUNT} - -#endif /*! BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_34_2_0/bcm56780_a0_hna_6_5_34_2_0_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_34_2_0/bcm56780_a0_hna_6_5_34_2_0_bcmpkt_flexhdr.h deleted file mode 100644 index 679eafccf38..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_34_2_0/bcm56780_a0_hna_6_5_34_2_0_bcmpkt_flexhdr.h +++ /dev/null @@ -1,173 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) header.yml. - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - -#ifndef BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_FLEXHDR_H -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_FLEXHDR_H - -#include - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ARP_T 0 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_AUTHEN_T 1 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_BFD_T 2 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_CNTAG_T 3 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T 4 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T 5 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_DEST_OPTION_T 6 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T 7 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T 8 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T 9 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ESP_T 10 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ETAG_T 11 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ETHERTYPE_T 12 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_FRAG_T 13 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T 14 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GPE_T 15 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GRE_CHKSUM_T 16 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GRE_KEY_T 17 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GRE_ROUT_T 18 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GRE_SEQ_T 19 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GRE_T 20 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_HOP_BY_HOP_T 21 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ICMP_T 22 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_0_A_T 23 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_0_B_T 24 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_1_T 25 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_2_T 26 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_3_T 27 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T 28 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_MD_BASE_T 29 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_METADATA_T 30 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IGMP_T 31 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IPFIX_T 32 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IPV4_T 33 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IPV6_T 34 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_L2_T 35 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_MIRROR_ERSPAN_SN_T 36 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_MIRROR_TRANSPORT_T 37 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_ACH_T 38 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_BV_T 39 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_CW_T 40 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_T 41 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_P_1588_T 42 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PROG_EXT_HDR_T 43 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_0_T 44 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_1_T 45 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T 46 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T 47 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RARP_T 48 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ROUTING_T 49 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RSPAN_T 50 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T 51 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T 52 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_2_T 53 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_SNAP_LLC_T 54 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_SVTAG_T 55 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_TCP_FIRST_4BYTES_T 56 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T 57 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_UDP_T 58 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_UNKNOWN_L3_T 59 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_UNKNOWN_L4_T 60 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T 61 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_VLAN_T 62 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_VNTAG_T 63 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_VXLAN_T 64 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_WESP_T 65 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_T 66 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_FLEXHDR_COUNT 67 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_FLEXHDR_NAME_MAP_INIT \ - {"arp_t", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ARP_T},\ - {"authen_t", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_AUTHEN_T},\ - {"bfd_t", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_BFD_T},\ - {"cntag_t", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_CNTAG_T},\ - {"cpu_composites_0_t", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T},\ - {"cpu_composites_1_t", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T},\ - {"dest_option_t", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_DEST_OPTION_T},\ - {"ep_nih_header_t", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T},\ - {"erspan3_fixed_hdr_t", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T},\ - {"erspan3_subhdr_5_t", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T},\ - {"esp_t", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ESP_T},\ - {"etag_t", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ETAG_T},\ - {"ethertype_t", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ETHERTYPE_T},\ - {"frag_t", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_FRAG_T},\ - {"generic_loopback_t", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T},\ - {"gpe_t", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GPE_T},\ - {"gre_chksum_t", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GRE_CHKSUM_T},\ - {"gre_key_t", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GRE_KEY_T},\ - {"gre_rout_t", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GRE_ROUT_T},\ - {"gre_seq_t", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GRE_SEQ_T},\ - {"gre_t", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GRE_T},\ - {"hop_by_hop_t", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_HOP_BY_HOP_T},\ - {"icmp_t", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ICMP_T},\ - {"ifa_flex_md_0_a_t", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_0_A_T},\ - {"ifa_flex_md_0_b_t", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_0_B_T},\ - {"ifa_flex_md_1_t", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_1_T},\ - {"ifa_flex_md_2_t", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_2_T},\ - {"ifa_flex_md_3_t", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_3_T},\ - {"ifa_header_t", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T},\ - {"ifa_md_base_t", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_MD_BASE_T},\ - {"ifa_metadata_t", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_METADATA_T},\ - {"igmp_t", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IGMP_T},\ - {"ipfix_t", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IPFIX_T},\ - {"ipv4_t", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IPV4_T},\ - {"ipv6_t", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IPV6_T},\ - {"l2_t", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_L2_T},\ - {"mirror_erspan_sn_t", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_MIRROR_ERSPAN_SN_T},\ - {"mirror_transport_t", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_MIRROR_TRANSPORT_T},\ - {"mpls_ach_t", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_ACH_T},\ - {"mpls_bv_t", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_BV_T},\ - {"mpls_cw_t", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_CW_T},\ - {"mpls_t", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_T},\ - {"p_1588_t", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_P_1588_T},\ - {"prog_ext_hdr_t", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PROG_EXT_HDR_T},\ - {"psamp_0_t", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_0_T},\ - {"psamp_1_t", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_1_T},\ - {"psamp_mirror_on_drop_0_t", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\ - {"psamp_mirror_on_drop_3_t", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T},\ - {"rarp_t", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RARP_T},\ - {"routing_t", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ROUTING_T},\ - {"rspan_t", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RSPAN_T},\ - {"sflow_shim_0_t", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T},\ - {"sflow_shim_1_t", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T},\ - {"sflow_shim_2_t", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_2_T},\ - {"snap_llc_t", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_SNAP_LLC_T},\ - {"svtag_t", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_SVTAG_T},\ - {"tcp_first_4bytes_t", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_TCP_FIRST_4BYTES_T},\ - {"tcp_last_16bytes_t", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T},\ - {"udp_t", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_UDP_T},\ - {"unknown_l3_t", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_UNKNOWN_L3_T},\ - {"unknown_l4_t", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_UNKNOWN_L4_T},\ - {"unknown_l5_t", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T},\ - {"vlan_t", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_VLAN_T},\ - {"vntag_t", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_VNTAG_T},\ - {"vxlan_t", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_VXLAN_T},\ - {"wesp_t", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_WESP_T},\ - {"RXPMD_FLEX_T", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_T},\ - {"flexhdr count", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_FLEXHDR_COUNT} - -#endif /* BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_FLEXHDR_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_34_2_0/bcm56780_a0_hna_6_5_34_2_0_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_34_2_0/bcm56780_a0_hna_6_5_34_2_0_bcmpkt_flexhdr_data.h deleted file mode 100644 index 8c940577a28..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_34_2_0/bcm56780_a0_hna_6_5_34_2_0_bcmpkt_flexhdr_data.h +++ /dev/null @@ -1,1257 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) header.yml. - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - -#ifndef BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_FLEXHDR_DATA_H -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_FLEXHDR_DATA_H - -/*! - * \name ARP_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ARP_T_HARDWARE_LEN 0 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ARP_T_HARDWARE_TYPE 1 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ARP_T_OPERATION 2 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ARP_T_PROT_ADDR_LEN 3 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ARP_T_PROTOCOL_TYPE 4 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ARP_T_SENDER_HA 5 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ARP_T_SENDER_IP 6 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ARP_T_TARGET_HA 7 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ARP_T_TARGET_IP 8 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ARP_T_FID_COUNT 9 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \ - {"HARDWARE_LEN", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ARP_T_HARDWARE_LEN},\ - {"HARDWARE_TYPE", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ARP_T_HARDWARE_TYPE},\ - {"OPERATION", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ARP_T_OPERATION},\ - {"PROT_ADDR_LEN", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ARP_T_PROT_ADDR_LEN},\ - {"PROTOCOL_TYPE", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ARP_T_PROTOCOL_TYPE},\ - {"SENDER_HA", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ARP_T_SENDER_HA},\ - {"SENDER_IP", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ARP_T_SENDER_IP},\ - {"TARGET_HA", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ARP_T_TARGET_HA},\ - {"TARGET_IP", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ARP_T_TARGET_IP},\ - {"arp_t fid count", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ARP_T_FID_COUNT} - -/*! - * \name AUTHEN_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_AUTHEN_T_DATA 0 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_AUTHEN_T_NEXT_HEADER 1 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN 2 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_AUTHEN_T_RESERVED 3 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_AUTHEN_T_SEQ_NUM 4 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_AUTHEN_T_SPI 5 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_AUTHEN_T_FID_COUNT 6 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT \ - {"DATA", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_AUTHEN_T_DATA},\ - {"NEXT_HEADER", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_AUTHEN_T_NEXT_HEADER},\ - {"PAYLOAD_LEN", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN},\ - {"RESERVED", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_AUTHEN_T_RESERVED},\ - {"SEQ_NUM", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_AUTHEN_T_SEQ_NUM},\ - {"SPI", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_AUTHEN_T_SPI},\ - {"authen_t fid count", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_AUTHEN_T_FID_COUNT} - -/*! - * \name BFD_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_BFD_T_AP 0 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_BFD_T_BFD_LENGTH 1 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_BFD_T_CPI 2 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_BFD_T_DEM 3 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_BFD_T_DESMINTXINTV 4 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_BFD_T_DETECTMULT 5 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_BFD_T_DIAG 6 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_BFD_T_FIN 7 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_BFD_T_MINECHORXINTV 8 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_BFD_T_MPT 9 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_BFD_T_MYDISCRIM 10 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_BFD_T_POLL 11 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_BFD_T_REQMINRXINTV 12 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_BFD_T_STA 13 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_BFD_T_URDISCRIM 14 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_BFD_T_VERSION 15 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_BFD_T_FID_COUNT 16 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT \ - {"AP", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_BFD_T_AP},\ - {"BFD_LENGTH", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_BFD_T_BFD_LENGTH},\ - {"CPI", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_BFD_T_CPI},\ - {"DEM", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_BFD_T_DEM},\ - {"DESMINTXINTV", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_BFD_T_DESMINTXINTV},\ - {"DETECTMULT", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_BFD_T_DETECTMULT},\ - {"DIAG", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_BFD_T_DIAG},\ - {"FIN", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_BFD_T_FIN},\ - {"MINECHORXINTV", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_BFD_T_MINECHORXINTV},\ - {"MPT", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_BFD_T_MPT},\ - {"MYDISCRIM", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_BFD_T_MYDISCRIM},\ - {"POLL", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_BFD_T_POLL},\ - {"REQMINRXINTV", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_BFD_T_REQMINRXINTV},\ - {"STA", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_BFD_T_STA},\ - {"URDISCRIM", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_BFD_T_URDISCRIM},\ - {"VERSION", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_BFD_T_VERSION},\ - {"bfd_t fid count", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_BFD_T_FID_COUNT} - -/*! - * \name CNTAG_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_CNTAG_T_RPID 0 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_CNTAG_T_TPID 1 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_CNTAG_T_FID_COUNT 2 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT \ - {"RPID", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_CNTAG_T_RPID},\ - {"TPID", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_CNTAG_T_TPID},\ - {"cntag_t fid count", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_CNTAG_T_FID_COUNT} - -/*! - * \name CPU_COMPOSITES_0_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT 7 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \ - {"DMA_CONT0", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\ - {"DMA_CONT1", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\ - {"DMA_CONT2", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\ - {"DMA_CONT3", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\ - {"DMA_CONT4", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\ - {"DMA_CONT5", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\ - {"DMA_CONT6", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\ - {"cpu_composites_0_t fid count", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT} - -/*! - * \name CPU_COMPOSITES_1_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7 8 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8 9 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9 10 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT 11 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \ - {"DMA_CONT10", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\ - {"DMA_CONT11", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\ - {"DMA_CONT12", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\ - {"DMA_CONT13", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\ - {"DMA_CONT14", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\ - {"DMA_CONT15", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\ - {"DMA_CONT16", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\ - {"DMA_CONT17", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\ - {"DMA_CONT7", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\ - {"DMA_CONT8", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\ - {"DMA_CONT9", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\ - {"cpu_composites_1_t fid count", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT} - -/*! - * \name DEST_OPTION_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN 0 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER 1 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_DEST_OPTION_T_OPTION 2 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_DEST_OPTION_T_FID_COUNT 3 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT \ - {"HDR_EXT_LEN", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN},\ - {"NEXT_HEADER", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER},\ - {"OPTION", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_DEST_OPTION_T_OPTION},\ - {"dest_option_t fid count", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_DEST_OPTION_T_FID_COUNT} - -/*! - * \name EP_NIH_HEADER_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE 0 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE 1 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A 2 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B 3 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C 4 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A 5 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B 6 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C 7 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX 8 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0 9 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_START 10 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP 11 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT 12 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT \ - {"HEADER_SUBTYPE", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE},\ - {"HEADER_TYPE", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE},\ - {"OPAQUE_CTRL_A", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A},\ - {"OPAQUE_CTRL_B", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B},\ - {"OPAQUE_CTRL_C", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C},\ - {"OPAQUE_OBJECT_A", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A},\ - {"OPAQUE_OBJECT_B", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B},\ - {"OPAQUE_OBJECT_C", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C},\ - {"RECIRC_PROFILE_INDEX", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX},\ - {"RESERVED_0", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0},\ - {"START", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_START},\ - {"TIMESTAMP", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP},\ - {"ep_nih_header_t fid count", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT} - -/*! - * \name ERSPAN3_FIXED_HDR_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO 0 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS 1 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID 2 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID 4 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T 5 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP 6 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER 7 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN 8 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT 9 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \ - {"BSO", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\ - {"COS", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\ - {"GBP_SID", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\ - {"P_FT_HWID_D_GRA_O", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\ - {"SESSION_ID", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\ - {"T", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\ - {"TIMESTAMP", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\ - {"VER", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\ - {"VLAN", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\ - {"erspan3_fixed_hdr_t fid count", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT} - -/*! - * \name ERSPAN3_SUBHDR_5_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID 1 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID 2 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP 3 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT 4 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \ - {"PLATFORM_ID", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\ - {"PORT_ID", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\ - {"SWITCH_ID", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\ - {"TIMESTAMP", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\ - {"erspan3_subhdr_5_t fid count", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT} - -/*! - * \name ESP_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ESP_T_NEXT_HEADER 0 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ESP_T_PAD 1 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ESP_T_PAD_LEN 2 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ESP_T_SEQ_NUM 3 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ESP_T_SPI 4 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ESP_T_FID_COUNT 5 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT \ - {"NEXT_HEADER", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ESP_T_NEXT_HEADER},\ - {"PAD", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ESP_T_PAD},\ - {"PAD_LEN", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ESP_T_PAD_LEN},\ - {"SEQ_NUM", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ESP_T_SEQ_NUM},\ - {"SPI", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ESP_T_SPI},\ - {"esp_t fid count", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ESP_T_FID_COUNT} - -/*! - * \name ETAG_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ETAG_T_TAG 0 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ETAG_T_TPID 1 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ETAG_T_FID_COUNT 2 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT \ - {"TAG", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ETAG_T_TAG},\ - {"TPID", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ETAG_T_TPID},\ - {"etag_t fid count", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ETAG_T_FID_COUNT} - -/*! - * \name ETHERTYPE_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ETHERTYPE_T_TYPE 0 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT 1 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \ - {"TYPE", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ETHERTYPE_T_TYPE},\ - {"ethertype_t fid count", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT} - -/*! - * \name FRAG_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_FRAG_T_FRAG_INFO 0 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_FRAG_T_ID 1 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_FRAG_T_NEXT_HEADER 2 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_FRAG_T_RESERVED 3 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_FRAG_T_FID_COUNT 4 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT \ - {"FRAG_INFO", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_FRAG_T_FRAG_INFO},\ - {"ID", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_FRAG_T_ID},\ - {"NEXT_HEADER", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_FRAG_T_NEXT_HEADER},\ - {"RESERVED", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_FRAG_T_RESERVED},\ - {"frag_t fid count", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_FRAG_T_FID_COUNT} - -/*! - * \name GENERIC_LOOPBACK_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ 0 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE 1 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ 2 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS 3 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE 4 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY 5 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL 6 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ 7 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0 8 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1 9 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ 10 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1 11 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 12 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE 13 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_SVP 14 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT 15 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \ - {"DESTINATION_OBJ", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\ - {"DESTINATION_TYPE", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\ - {"ENTROPY_OBJ", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\ - {"FLAGS", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\ - {"HEADER_TYPE", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\ - {"INPUT_PRIORITY", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\ - {"INTERFACE_CTRL", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\ - {"INTERFACE_OBJ", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\ - {"PROCESSING_CTRL_0", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\ - {"PROCESSING_CTRL_1", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\ - {"QOS_OBJ", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\ - {"RESERVED_1", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\ - {"SOURCE_SYSTEM_PORT", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\ - {"START_BYTE", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\ - {"SVP", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_SVP},\ - {"generic_loopback_t fid count", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT} - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP 0 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF 1 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED 2 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP 3 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP 4 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP 5 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP 6 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP 7 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1 8 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__TUNNEL 0 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__GENERIC 1 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__NOOP 0 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__VFI 1 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__L3_IIF 2 - -/*! - * \name GPE_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GPE_T_FLAGS 0 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GPE_T_NEXT_PROTOCOL 1 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GPE_T_RESERVED0 2 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GPE_T_RESERVED1 3 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GPE_T_VNI 4 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GPE_T_FID_COUNT 5 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT \ - {"FLAGS", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GPE_T_FLAGS},\ - {"NEXT_PROTOCOL", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GPE_T_NEXT_PROTOCOL},\ - {"RESERVED0", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GPE_T_RESERVED0},\ - {"RESERVED1", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GPE_T_RESERVED1},\ - {"VNI", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GPE_T_VNI},\ - {"gpe_t fid count", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GPE_T_FID_COUNT} - -/*! - * \name GRE_CHKSUM_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM 0 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GRE_CHKSUM_T_OFFSET 1 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT 2 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT \ - {"CHECKSUM", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM},\ - {"OFFSET", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GRE_CHKSUM_T_OFFSET},\ - {"gre_chksum_t fid count", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT} - -/*! - * \name GRE_KEY_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GRE_KEY_T_KEY 0 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GRE_KEY_T_FID_COUNT 1 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT \ - {"KEY", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GRE_KEY_T_KEY},\ - {"gre_key_t fid count", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GRE_KEY_T_FID_COUNT} - -/*! - * \name GRE_ROUT_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GRE_ROUT_T_ROUTING 0 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GRE_ROUT_T_FID_COUNT 1 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT \ - {"ROUTING", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GRE_ROUT_T_ROUTING},\ - {"gre_rout_t fid count", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GRE_ROUT_T_FID_COUNT} - -/*! - * \name GRE_SEQ_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GRE_SEQ_T_SEQUENCE 0 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GRE_SEQ_T_FID_COUNT 1 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT \ - {"SEQUENCE", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GRE_SEQ_T_SEQUENCE},\ - {"gre_seq_t fid count", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GRE_SEQ_T_FID_COUNT} - -/*! - * \name GRE_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GRE_T_C_R_K_S 0 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GRE_T_PROTOCOL 1 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GRE_T_RESERVED 2 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GRE_T_VERSION 3 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GRE_T_FID_COUNT 4 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT \ - {"C_R_K_S", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GRE_T_C_R_K_S},\ - {"PROTOCOL", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GRE_T_PROTOCOL},\ - {"RESERVED", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GRE_T_RESERVED},\ - {"VERSION", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GRE_T_VERSION},\ - {"gre_t fid count", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GRE_T_FID_COUNT} - -/*! - * \name HOP_BY_HOP_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN 0 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER 1 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_HOP_BY_HOP_T_OPTION 2 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT 3 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT \ - {"HDR_EXT_LEN", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN},\ - {"NEXT_HEADER", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER},\ - {"OPTION", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_HOP_BY_HOP_T_OPTION},\ - {"hop_by_hop_t fid count", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT} - -/*! - * \name ICMP_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ICMP_T_CHECKSUM 0 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ICMP_T_CODE 1 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ICMP_T_ICMP_TYPE 2 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ICMP_T_FID_COUNT 3 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \ - {"CHECKSUM", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ICMP_T_CHECKSUM},\ - {"CODE", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ICMP_T_CODE},\ - {"ICMP_TYPE", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ICMP_T_ICMP_TYPE},\ - {"icmp_t fid count", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ICMP_T_FID_COUNT} - -/*! - * \name IFA_FLEX_MD_0_A_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_FWD_HDR_TTL 0 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_LNS_DEVICE_ID 1 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT 2 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_FIELD_NAME_MAP_INIT \ - {"FWD_HDR_TTL", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_FWD_HDR_TTL},\ - {"LNS_DEVICE_ID", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_LNS_DEVICE_ID},\ - {"ifa_flex_md_0_a_t fid count", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT} - -/*! - * \name IFA_FLEX_MD_0_B_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_CN 0 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_PORT_SPEED 1 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_QUEUE_ID 2 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_RX_TIMESTAMP_SEC 3 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT 4 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_FIELD_NAME_MAP_INIT \ - {"CN", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_CN},\ - {"PORT_SPEED", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_PORT_SPEED},\ - {"QUEUE_ID", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_QUEUE_ID},\ - {"RX_TIMESTAMP_SEC", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_RX_TIMESTAMP_SEC},\ - {"ifa_flex_md_0_b_t fid count", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT} - -/*! - * \name IFA_FLEX_MD_1_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_1_T_EGRESS_PORT_ID 0 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_1_T_INGRESS_PORT_ID 1 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_1_T_RX_TIMESTAMP_NANOSEC 2 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT 3 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_1_T_FIELD_NAME_MAP_INIT \ - {"EGRESS_PORT_ID", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_1_T_EGRESS_PORT_ID},\ - {"INGRESS_PORT_ID", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_1_T_INGRESS_PORT_ID},\ - {"RX_TIMESTAMP_NANOSEC", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_1_T_RX_TIMESTAMP_NANOSEC},\ - {"ifa_flex_md_1_t fid count", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT} - -/*! - * \name IFA_FLEX_MD_2_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_2_T_RESIDENCE_TIME_NANOSEC 0 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_2_T_TX_QUEUE_BYTE_COUNT 1 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT 2 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_2_T_FIELD_NAME_MAP_INIT \ - {"RESIDENCE_TIME_NANOSEC", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_2_T_RESIDENCE_TIME_NANOSEC},\ - {"TX_QUEUE_BYTE_COUNT", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_2_T_TX_QUEUE_BYTE_COUNT},\ - {"ifa_flex_md_2_t fid count", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT} - -/*! - * \name IFA_FLEX_MD_3_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_0 0 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_1 1 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT 2 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_3_T_FIELD_NAME_MAP_INIT \ - {"MMU_STAT_0", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_0},\ - {"MMU_STAT_1", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_1},\ - {"ifa_flex_md_3_t fid count", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT} - -/*! - * \name IFA_HEADER_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_FLAGS 0 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_GNS 1 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH 2 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_NEXT_HDR 3 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_VER 4 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_FID_COUNT 5 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT \ - {"FLAGS", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_FLAGS},\ - {"GNS", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_GNS},\ - {"MAX_LENGTH", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH},\ - {"NEXT_HDR", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_NEXT_HDR},\ - {"VER", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_VER},\ - {"ifa_header_t fid count", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_FID_COUNT} - -/*! - * \name IFA_MD_BASE_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_MD_BASE_T_ACTION_VECTOR 0 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_MD_BASE_T_HOP_LIMIT_CURRENT_LENGTH 1 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_MD_BASE_T_REQUEST_VECTOR 2 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT 3 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_MD_BASE_T_FIELD_NAME_MAP_INIT \ - {"ACTION_VECTOR", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_MD_BASE_T_ACTION_VECTOR},\ - {"HOP_LIMIT_CURRENT_LENGTH", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_MD_BASE_T_HOP_LIMIT_CURRENT_LENGTH},\ - {"REQUEST_VECTOR", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_MD_BASE_T_REQUEST_VECTOR},\ - {"ifa_md_base_t fid count", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT} - -/*! - * \name IFA_METADATA_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_METADATA_T_ACTION_VECTOR 0 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_METADATA_T_HOP_LIMIT_CURRENT_LENGTH 1 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_METADATA_T_METADATA 2 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_METADATA_T_REQUEST_VECTOR 3 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_METADATA_T_FID_COUNT 4 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_METADATA_T_FIELD_NAME_MAP_INIT \ - {"ACTION_VECTOR", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_METADATA_T_ACTION_VECTOR},\ - {"HOP_LIMIT_CURRENT_LENGTH", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_METADATA_T_HOP_LIMIT_CURRENT_LENGTH},\ - {"METADATA", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_METADATA_T_METADATA},\ - {"REQUEST_VECTOR", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_METADATA_T_REQUEST_VECTOR},\ - {"ifa_metadata_t fid count", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_METADATA_T_FID_COUNT} - -/*! - * \name IGMP_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IGMP_T_CHECKSUM 0 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IGMP_T_GROUP_ADDRESS 1 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IGMP_T_IGMP_TYPE 2 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IGMP_T_MAX_RESP_TIME 3 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IGMP_T_FID_COUNT 4 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT \ - {"CHECKSUM", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IGMP_T_CHECKSUM},\ - {"GROUP_ADDRESS", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IGMP_T_GROUP_ADDRESS},\ - {"IGMP_TYPE", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IGMP_T_IGMP_TYPE},\ - {"MAX_RESP_TIME", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IGMP_T_MAX_RESP_TIME},\ - {"igmp_t fid count", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IGMP_T_FID_COUNT} - -/*! - * \name IPFIX_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IPFIX_T_EXPORT_TIME 0 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IPFIX_T_LENGTH 1 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IPFIX_T_SEQUENCE_NUM 3 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IPFIX_T_VERSION 4 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IPFIX_T_FID_COUNT 5 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \ - {"EXPORT_TIME", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IPFIX_T_EXPORT_TIME},\ - {"LENGTH", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IPFIX_T_LENGTH},\ - {"OBS_DOMAIN_ID", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\ - {"SEQUENCE_NUM", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IPFIX_T_SEQUENCE_NUM},\ - {"VERSION", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IPFIX_T_VERSION},\ - {"ipfix_t fid count", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IPFIX_T_FID_COUNT} - -/*! - * \name IPV4_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IPV4_T_DA 0 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IPV4_T_HDR_CHECKSUM 2 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IPV4_T_ID 3 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IPV4_T_OPTION 4 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IPV4_T_PROTOCOL 5 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IPV4_T_SA 6 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IPV4_T_TOS 7 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IPV4_T_TOTAL_LENGTH 8 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IPV4_T_TTL 9 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IPV4_T_VERSION_HDR_LEN 10 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IPV4_T_FID_COUNT 11 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \ - {"DA", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IPV4_T_DA},\ - {"FLAGS_FRAG_OFFSET", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\ - {"HDR_CHECKSUM", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IPV4_T_HDR_CHECKSUM},\ - {"ID", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IPV4_T_ID},\ - {"OPTION", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IPV4_T_OPTION},\ - {"PROTOCOL", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IPV4_T_PROTOCOL},\ - {"SA", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IPV4_T_SA},\ - {"TOS", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IPV4_T_TOS},\ - {"TOTAL_LENGTH", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IPV4_T_TOTAL_LENGTH},\ - {"TTL", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IPV4_T_TTL},\ - {"VERSION_HDR_LEN", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IPV4_T_VERSION_HDR_LEN},\ - {"ipv4_t fid count", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IPV4_T_FID_COUNT} - -/*! - * \name IPV6_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IPV6_T_DA 0 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IPV6_T_FLOW_LABEL 1 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IPV6_T_HOP_LIMIT 2 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IPV6_T_NEXT_HEADER 3 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IPV6_T_SA 5 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IPV6_T_TRAFFIC_CLASS 6 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IPV6_T_VERSION 7 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IPV6_T_FID_COUNT 8 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \ - {"DA", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IPV6_T_DA},\ - {"FLOW_LABEL", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IPV6_T_FLOW_LABEL},\ - {"HOP_LIMIT", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IPV6_T_HOP_LIMIT},\ - {"NEXT_HEADER", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IPV6_T_NEXT_HEADER},\ - {"PAYLOAD_LENGTH", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\ - {"SA", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IPV6_T_SA},\ - {"TRAFFIC_CLASS", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IPV6_T_TRAFFIC_CLASS},\ - {"VERSION", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IPV6_T_VERSION},\ - {"ipv6_t fid count", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IPV6_T_FID_COUNT} - -/*! - * \name L2_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_L2_T_MACDA 0 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_L2_T_MACSA 1 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_L2_T_FID_COUNT 2 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \ - {"MACDA", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_L2_T_MACDA},\ - {"MACSA", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_L2_T_MACSA},\ - {"l2_t fid count", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_L2_T_FID_COUNT} - -/*! - * \name MIRROR_ERSPAN_SN_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT 1 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \ - {"SEQ_NUM", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\ - {"mirror_erspan_sn_t fid count", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT} - -/*! - * \name MIRROR_TRANSPORT_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_MIRROR_TRANSPORT_T_DATA 0 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT 1 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \ - {"DATA", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_MIRROR_TRANSPORT_T_DATA},\ - {"mirror_transport_t fid count", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT} - -/*! - * \name MPLS_ACH_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE 0 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_ACH_T_CW_TYPE 1 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_ACH_T_RESERVED 2 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_ACH_T_VERSION 3 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_ACH_T_FID_COUNT 4 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT \ - {"CHANNEL_TYPE", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE},\ - {"CW_TYPE", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_ACH_T_CW_TYPE},\ - {"RESERVED", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_ACH_T_RESERVED},\ - {"VERSION", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_ACH_T_VERSION},\ - {"mpls_ach_t fid count", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_ACH_T_FID_COUNT} - -/*! - * \name MPLS_BV_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_BV_T_VALUE 0 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_BV_T_FID_COUNT 1 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT \ - {"VALUE", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_BV_T_VALUE},\ - {"mpls_bv_t fid count", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_BV_T_FID_COUNT} - -/*! - * \name MPLS_CW_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_CW_T_CW_TYPE 0 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_CW_T_RESERVED 1 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER 2 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_CW_T_FID_COUNT 3 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT \ - {"CW_TYPE", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_CW_T_CW_TYPE},\ - {"RESERVED", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_CW_T_RESERVED},\ - {"SEQ_NUMBER", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER},\ - {"mpls_cw_t fid count", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_CW_T_FID_COUNT} - -/*! - * \name MPLS_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_T_BOS 0 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_T_EXP 1 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_T_LABEL 2 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_T_TTL 3 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_T_FID_COUNT 4 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT \ - {"BOS", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_T_BOS},\ - {"EXP", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_T_EXP},\ - {"LABEL", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_T_LABEL},\ - {"TTL", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_T_TTL},\ - {"mpls_t fid count", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_T_FID_COUNT} - -/*! - * \name P_1588_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_P_1588_T_CNTRL 0 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_P_1588_T_CORRECTION 1 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_P_1588_T_DOMAIN_NB 2 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_P_1588_T_FLAGS 3 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_P_1588_T_LOGMSGINTERVAL 4 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_P_1588_T_MSG_LENGTH 5 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_P_1588_T_MSG_TYPE 6 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_P_1588_T_RESERVED1 7 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_P_1588_T_RESERVED2 8 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_P_1588_T_RESERVED3 9 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_P_1588_T_SEQ_ID 10 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_P_1588_T_SRCPORTID 11 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_P_1588_T_TRANSPORTSPEC 12 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_P_1588_T_VERSION 13 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_P_1588_T_FID_COUNT 14 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT \ - {"CNTRL", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_P_1588_T_CNTRL},\ - {"CORRECTION", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_P_1588_T_CORRECTION},\ - {"DOMAIN_NB", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_P_1588_T_DOMAIN_NB},\ - {"FLAGS", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_P_1588_T_FLAGS},\ - {"LOGMSGINTERVAL", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_P_1588_T_LOGMSGINTERVAL},\ - {"MSG_LENGTH", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_P_1588_T_MSG_LENGTH},\ - {"MSG_TYPE", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_P_1588_T_MSG_TYPE},\ - {"RESERVED1", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_P_1588_T_RESERVED1},\ - {"RESERVED2", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_P_1588_T_RESERVED2},\ - {"RESERVED3", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_P_1588_T_RESERVED3},\ - {"SEQ_ID", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_P_1588_T_SEQ_ID},\ - {"SRCPORTID", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_P_1588_T_SRCPORTID},\ - {"TRANSPORTSPEC", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_P_1588_T_TRANSPORTSPEC},\ - {"VERSION", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_P_1588_T_VERSION},\ - {"p_1588_t fid count", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_P_1588_T_FID_COUNT} - -/*! - * \name PROG_EXT_HDR_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN 0 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER 1 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PROG_EXT_HDR_T_OPTION 2 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT 3 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT \ - {"HDR_EXT_LEN", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN},\ - {"NEXT_HEADER", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER},\ - {"OPTION", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PROG_EXT_HDR_T_OPTION},\ - {"prog_ext_hdr_t fid count", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT} - -/*! - * \name PSAMP_0_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_0_T_FLOWSET 0 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_0_T_LENGTH 1 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX 2 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS 3 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_0_T_OBS_TIME_S 4 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID 5 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_0_T_FID_COUNT 6 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT \ - {"FLOWSET", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_0_T_FLOWSET},\ - {"LENGTH", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_0_T_LENGTH},\ - {"NEXT_HOP_INDEX", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX},\ - {"OBS_TIME_NS", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS},\ - {"OBS_TIME_S", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_0_T_OBS_TIME_S},\ - {"TEMPLATE_ID", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID},\ - {"psamp_0_t fid count", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_0_T_FID_COUNT} - -/*! - * \name PSAMP_1_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_1_T_DLB_ID 0 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_1_T_EGRESS_PORT 1 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_1_T_EPOCH 2 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_1_T_INGRESS_PORT 3 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH 4 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_1_T_USER_META_DATA 5 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG 6 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_1_T_FID_COUNT 7 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT \ - {"DLB_ID", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_1_T_DLB_ID},\ - {"EGRESS_PORT", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_1_T_EGRESS_PORT},\ - {"EPOCH", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_1_T_EPOCH},\ - {"INGRESS_PORT", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_1_T_INGRESS_PORT},\ - {"SAMPLED_LENGTH", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH},\ - {"USER_META_DATA", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_1_T_USER_META_DATA},\ - {"VARIABLE_FLAG", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG},\ - {"psamp_1_t fid count", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_1_T_FID_COUNT} - -/*! - * \name PSAMP_MIRROR_ON_DROP_0_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT 1 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH 2 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS 3 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S 4 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID 5 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID 6 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT 7 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \ - {"EGRESS_MOD_PORT", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\ - {"INGRESS_PORT", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\ - {"LENGTH", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\ - {"OBS_TIME_NS", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\ - {"OBS_TIME_S", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\ - {"SWITCH_ID", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\ - {"TEMPLATE_ID", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\ - {"psamp_mirror_on_drop_0_t fid count", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT} - -/*! - * \name PSAMP_MIRROR_ON_DROP_3_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON 0 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0 1 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH 2 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE 3 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX 4 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA 5 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR 6 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT 7 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT \ - {"DROP_REASON", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON},\ - {"RESERVED_0", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0},\ - {"SAMPLED_LENGTH", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH},\ - {"SMOD_STATE", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE},\ - {"UC_COS__COLOR__PROB_IDX", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX},\ - {"USER_META_DATA", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA},\ - {"VAR_LEN_INDICATOR", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR},\ - {"psamp_mirror_on_drop_3_t fid count", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT} - -/*! - * \name RARP_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RARP_T_HARDWARE_LEN 0 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RARP_T_HARDWARE_TYPE 1 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RARP_T_OPERATION 2 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RARP_T_PROT_ADDR_LEN 3 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RARP_T_PROTOCOL_TYPE 4 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RARP_T_SENDER_HA 5 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RARP_T_SENDER_IP 6 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RARP_T_TARGET_HA 7 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RARP_T_TARGET_IP 8 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RARP_T_FID_COUNT 9 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \ - {"HARDWARE_LEN", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RARP_T_HARDWARE_LEN},\ - {"HARDWARE_TYPE", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RARP_T_HARDWARE_TYPE},\ - {"OPERATION", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RARP_T_OPERATION},\ - {"PROT_ADDR_LEN", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RARP_T_PROT_ADDR_LEN},\ - {"PROTOCOL_TYPE", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RARP_T_PROTOCOL_TYPE},\ - {"SENDER_HA", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RARP_T_SENDER_HA},\ - {"SENDER_IP", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RARP_T_SENDER_IP},\ - {"TARGET_HA", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RARP_T_TARGET_HA},\ - {"TARGET_IP", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RARP_T_TARGET_IP},\ - {"rarp_t fid count", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RARP_T_FID_COUNT} - -/*! - * \name ROUTING_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ROUTING_T_DATA 0 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ROUTING_T_HDR_EXT_LEN 1 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ROUTING_T_NEXT_HEADER 2 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ROUTING_T_ROUTING_TYPE 3 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT 4 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ROUTING_T_FID_COUNT 5 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT \ - {"DATA", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ROUTING_T_DATA},\ - {"HDR_EXT_LEN", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ROUTING_T_HDR_EXT_LEN},\ - {"NEXT_HEADER", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ROUTING_T_NEXT_HEADER},\ - {"ROUTING_TYPE", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ROUTING_T_ROUTING_TYPE},\ - {"SEGMENTS_LEFT", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT},\ - {"routing_t fid count", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ROUTING_T_FID_COUNT} - -/*! - * \name RSPAN_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RSPAN_T_TAG 0 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RSPAN_T_TPID 1 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RSPAN_T_FID_COUNT 2 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT \ - {"TAG", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RSPAN_T_TAG},\ - {"TPID", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RSPAN_T_TPID},\ - {"rspan_t fid count", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RSPAN_T_FID_COUNT} - -/*! - * \name SFLOW_SHIM_0_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION 0 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE 1 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T_VERSION 2 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT 3 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT \ - {"SYS_DESTINATION", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION},\ - {"SYS_SOURCE", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE},\ - {"VERSION", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T_VERSION},\ - {"sflow_shim_0_t fid count", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT} - -/*! - * \name SFLOW_SHIM_1_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE 0 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED 1 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE 2 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST 3 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE 4 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED 5 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED 6 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE 7 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT 8 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT \ - {"FLAG_DEST_SAMPLE", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE},\ - {"FLAG_DISCARDED", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED},\ - {"FLAG_FLEX_SAMPLE", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE},\ - {"FLAG_MCAST", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST},\ - {"FLAG_SRC_SAMPLE", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE},\ - {"FLAG_TRUNCATED", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED},\ - {"RESERVED", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED},\ - {"SYS_OPCODE", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE},\ - {"sflow_shim_1_t fid count", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT} - -/*! - * \name SFLOW_SHIM_2_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM 0 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA 1 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT 2 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT \ - {"SEQUENCE_NUM", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM},\ - {"USER_META_DATA", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA},\ - {"sflow_shim_2_t fid count", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT} - -/*! - * \name SNAP_LLC_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_SNAP_LLC_T_LENGTH 0 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_SNAP_LLC_T_SNAP_LLC 1 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_SNAP_LLC_T_FID_COUNT 2 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT \ - {"LENGTH", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_SNAP_LLC_T_LENGTH},\ - {"SNAP_LLC", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_SNAP_LLC_T_SNAP_LLC},\ - {"snap_llc_t fid count", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_SNAP_LLC_T_FID_COUNT} - -/*! - * \name SVTAG_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_SVTAG_T_DATA_LWR 0 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_SVTAG_T_DATA_UPR 1 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_SVTAG_T_FID_COUNT 2 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_SVTAG_T_FIELD_NAME_MAP_INIT \ - {"DATA_LWR", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_SVTAG_T_DATA_LWR},\ - {"DATA_UPR", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_SVTAG_T_DATA_UPR},\ - {"svtag_t fid count", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_SVTAG_T_FID_COUNT} - -/*! - * \name TCP_FIRST_4BYTES_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT 2 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \ - {"DST_PORT", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\ - {"SRC_PORT", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\ - {"tcp_first_4bytes_t fid count", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT} - -/*! - * \name TCP_LAST_16BYTES_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM 0 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM 1 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM 3 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR 4 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE 5 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT 6 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \ - {"ACK_NUM", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\ - {"CHECKSUM", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\ - {"HDR_LEN_AND_FLAGS", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\ - {"SEQ_NUM", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\ - {"URGENT_PTR", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\ - {"WIN_SIZE", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\ - {"tcp_last_16bytes_t fid count", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT} - -/*! - * \name UDP_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_UDP_T_CHECKSUM 0 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_UDP_T_DST_PORT 1 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_UDP_T_SRC_PORT 2 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_UDP_T_UDP_LENGTH 3 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_UDP_T_FID_COUNT 4 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \ - {"CHECKSUM", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_UDP_T_CHECKSUM},\ - {"DST_PORT", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_UDP_T_DST_PORT},\ - {"SRC_PORT", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_UDP_T_SRC_PORT},\ - {"UDP_LENGTH", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_UDP_T_UDP_LENGTH},\ - {"udp_t fid count", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_UDP_T_FID_COUNT} - -/*! - * \name UNKNOWN_L3_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD 1 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT 2 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \ - {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\ - {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\ - {"unknown_l3_t fid count", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT} - -/*! - * \name UNKNOWN_L4_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT 1 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \ - {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\ - {"unknown_l4_t fid count", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT} - -/*! - * \name UNKNOWN_L5_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT 3 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \ - {"L5_BYTES_0_1", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\ - {"L5_BYTES_2_3", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\ - {"L5_BYTES_4_7", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\ - {"unknown_l5_t fid count", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT} - -/*! - * \name VLAN_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_VLAN_T_CFI 0 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_VLAN_T_PCP 1 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_VLAN_T_TPID 2 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_VLAN_T_VID 3 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_VLAN_T_FID_COUNT 4 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \ - {"CFI", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_VLAN_T_CFI},\ - {"PCP", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_VLAN_T_PCP},\ - {"TPID", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_VLAN_T_TPID},\ - {"VID", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_VLAN_T_VID},\ - {"vlan_t fid count", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_VLAN_T_FID_COUNT} - -/*! - * \name VNTAG_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_VNTAG_T_TAG 0 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_VNTAG_T_TPID 1 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_VNTAG_T_FID_COUNT 2 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT \ - {"TAG", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_VNTAG_T_TAG},\ - {"TPID", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_VNTAG_T_TPID},\ - {"vntag_t fid count", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_VNTAG_T_FID_COUNT} - -/*! - * \name VXLAN_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_VXLAN_T_RESERVED2 1 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_VXLAN_T_VN_ID 2 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_VXLAN_T_FID_COUNT 3 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \ - {"FLAGS_RESERVED_1", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\ - {"RESERVED2", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_VXLAN_T_RESERVED2},\ - {"VN_ID", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_VXLAN_T_VN_ID},\ - {"vxlan_t fid count", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_VXLAN_T_FID_COUNT} - -/*! - * \name WESP_T field IDs. - */ -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_WESP_T_FLAGS 0 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_WESP_T_HEADER_LEN 1 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_WESP_T_NEXT_HEADER 2 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_WESP_T_SEQ_NUM 3 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_WESP_T_SPI 4 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_WESP_T_TRAILER_LEN 5 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_WESP_T_WESP_IV 6 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_WESP_T_FID_COUNT 7 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT \ - {"FLAGS", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_WESP_T_FLAGS},\ - {"HEADER_LEN", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_WESP_T_HEADER_LEN},\ - {"NEXT_HEADER", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_WESP_T_NEXT_HEADER},\ - {"SEQ_NUM", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_WESP_T_SEQ_NUM},\ - {"SPI", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_WESP_T_SPI},\ - {"TRAILER_LEN", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_WESP_T_TRAILER_LEN},\ - {"WESP_IV", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_WESP_T_WESP_IV},\ - {"wesp_t fid count", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_WESP_T_FID_COUNT} - - -#endif /* BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_FLEXHDR_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_34_2_0/bcm56780_a0_hna_6_5_34_2_0_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_34_2_0/bcm56780_a0_hna_6_5_34_2_0_bcmpkt_rxpmd_flex_data.h deleted file mode 100644 index 4a28e9c4ede..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_34_2_0/bcm56780_a0_hna_6_5_34_2_0_bcmpkt_rxpmd_flex_data.h +++ /dev/null @@ -1,180 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) map.yml. - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - -#ifndef BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_DATA_H -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_DATA_H - -/*! - * \name RX flex metadata field IDs. - */ -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0 0 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0 1 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_DVP_15_0 2 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0 3 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_EGR_MTOP_INDEX_HI_3_0 4 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_EGR_MTOP_INDEX_LO_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0 5 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0 6 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0 7 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0 8 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0 9 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16 10 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0 11 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16 12 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32 13 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0 14 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0 15 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_IFP_TO_EP_MACSEC_INFO_OR_IFP_OPAQUE_OBJ_15_0 16 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0 17 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0 18 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16 19 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0 20 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 21 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0 22 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0 23 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0 24 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0 25 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0 26 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0 27 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_MPB_TUNNEL_DECAP_EXT_HDR_INFO_3_0 28 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0 29 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0 30 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0 31 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0 32 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_SVP_15_0 33 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0 34 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0 35 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0 36 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0 37 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0 38 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_VFI_15_0 39 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0 40 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_FID_COUNT 41 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_COUNT 47 - -/*! - * \name Packet Flex Reason Types. - */ -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE 0 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS 1 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED 2 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED 3 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED 4 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED 5 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP 6 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT 7 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP 8 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER 9 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED 10 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT 11 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP 12 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS 13 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE 14 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP 15 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS 16 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR 17 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF 18 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR 19 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL 20 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD 21 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0 22 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1 23 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2 24 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3 25 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4 26 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5 27 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6 28 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7 29 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD 30 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED 31 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED 32 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU 33 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MTOP_IPV4_GATEWAY 34 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU 35 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED 36 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT 37 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT 38 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP 39 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD 40 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_SVP 41 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP 42 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU 43 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR 44 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED 45 -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_VFP 46 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \ - {"CB_STATION_MOVE", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE},\ - {"CML_FLAGS", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\ - {"DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED},\ - {"DLB_ECMP_PKT_SAMPLED", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED},\ - {"DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED},\ - {"DLB_LAG_PKT_SAMPLED", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED},\ - {"DST_FP", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP},\ - {"EM_FT", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT},\ - {"IFP", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP},\ - {"IFP_METER", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\ - {"IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED},\ - {"IVXLT", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\ - {"L2_DST_LOOKUP", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\ - {"L2_DST_LOOKUP_MISS", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\ - {"L2_SRC_STATIC_MOVE", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\ - {"L3_DST_LOOKUP", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\ - {"L3_DST_LOOKUP_MISS", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\ - {"L3_HDR_ERROR", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\ - {"L3_IIF_EQ_L3_OIF", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF},\ - {"L3_TTL_ERROR", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\ - {"LEARN_CACHE_FULL", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\ - {"MACSA_MULTICAST_RSVD", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD},\ - {"MATCHED_RULE_BIT_0", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0},\ - {"MATCHED_RULE_BIT_1", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1},\ - {"MATCHED_RULE_BIT_2", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2},\ - {"MATCHED_RULE_BIT_3", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3},\ - {"MATCHED_RULE_BIT_4", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4},\ - {"MATCHED_RULE_BIT_5", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5},\ - {"MATCHED_RULE_BIT_6", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6},\ - {"MATCHED_RULE_BIT_7", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7},\ - {"MEMBERSHIP_CHECK_FAILED_RSVD", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD},\ - {"MIRROR_SAMPLER_EGR_SAMPLED", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED},\ - {"MIRROR_SAMPLER_SAMPLED", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED},\ - {"MPLS_CTRL_PKT_TO_CPU", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU},\ - {"MTOP_IPV4_GATEWAY", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MTOP_IPV4_GATEWAY},\ - {"NO_COPY_TO_CPU", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\ - {"PKT_INTEGRITY_CHECK_FAILED", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\ - {"PROTOCOL_PKT", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\ - {"RESERVED_TRACE_BIT", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT},\ - {"SER_DROP", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP},\ - {"SPANNING_TREE_CHECK_FAILED_RSVD", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD},\ - {"SVP", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_SVP},\ - {"TRACE_DOP", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\ - {"TRACE_DO_NOT_COPY_TO_CPU", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU},\ - {"TRACE_DO_NOT_MIRROR", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR},\ - {"URPF_CHECK_FAILED", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED},\ - {"VFP", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_VFP},\ - {"flex reason count", BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_COUNT} - -#endif /* BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_34_2_0/bcm56780_a0_hna_6_5_34_2_0_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_34_2_0/bcm56780_a0_hna_6_5_34_2_0_bcmpkt_rxpmd_match_id_defs.h deleted file mode 100644 index 170a532f3ed..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56780_a0/hna_6_5_34_2_0/bcm56780_a0_hna_6_5_34_2_0_bcmpkt_rxpmd_match_id_defs.h +++ /dev/null @@ -1,394 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) bcm56780_a0_hna_6_5_34_2_0_sf_match_id_info.yml - * for device bcm56780_a0 and variant hna_6_5_34_2_0. - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - -#ifndef BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H - -#include - -/*! - * \brief Get the Match ID DataBase information. - * - * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information. -*/ -extern bcmpkt_rxpmd_match_id_db_info_t * - bcm56780_a0_hna_6_5_34_2_0_rxpmd_match_id_db_info_get(void); - -/*! - * \brief Get the Match ID Mapping information. - * - * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information. -*/ -extern bcmpkt_rxpmd_match_id_map_info_t * - bcm56780_a0_hna_6_5_34_2_0_rxpmd_match_id_map_info_get(void); - -/*! - \name RXPMD Match IDs -*/ -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG 0 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG 1 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 2 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE 3 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG 4 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC 5 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG 6 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG 7 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP 8 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD 9 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT 10 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE 11 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 12 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 13 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE 14 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE 15 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM 16 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY 17 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT 18 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ 19 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP 20 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA 21 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP 22 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 23 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 24 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 25 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 26 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 27 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 28 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 29 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 30 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 31 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH 32 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW 33 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE 34 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 35 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP 36 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES 37 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES 38 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP 39 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDPIPSEC 40 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 41 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 42 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 43 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN 44 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH 45 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK 46 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE 47 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG 48 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG 49 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 50 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE 51 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG 52 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC 53 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG 54 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG 55 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP 56 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD 57 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT 58 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE 59 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 60 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 61 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE 62 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE 63 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM 64 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY 65 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT 66 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ 67 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP 68 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA 69 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP 70 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 71 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 72 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 73 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 74 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 75 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 76 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 77 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 78 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 79 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH 80 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW 81 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE 82 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 83 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP 84 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES 85 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES 86 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP 87 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDPIPSEC 88 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 89 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 90 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 91 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN 92 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG 93 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG 94 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 95 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE 96 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG 97 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC 98 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG 99 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP 100 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD 101 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT 102 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE 103 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 104 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 105 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP 106 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA 107 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP 108 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 109 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 110 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE 111 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 112 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP 113 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES 114 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES 115 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP 116 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 117 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 118 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 119 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG 120 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG 121 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 122 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE 123 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG 124 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC 125 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG 126 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG 127 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP 128 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD 129 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT 130 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE 131 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 132 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 133 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE 134 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE 135 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM 136 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY 137 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT 138 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ 139 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP 140 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA 141 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP 142 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 143 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 144 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 145 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 146 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 147 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 148 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 149 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 150 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 151 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH 152 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW 153 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE 154 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 155 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP 156 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES 157 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES 158 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP 159 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDPIPSEC 160 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 161 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 162 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 163 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN 164 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH 165 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK 166 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE 167 -#define BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_COUNT 168 - -#define BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \ - {"EGRESS_PKT_FWD_L2_HDR_ETAG", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG}, \ - {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \ - {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \ - {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \ - {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \ - {"EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC}, \ - {"EGRESS_PKT_FWD_L2_HDR_SVTAG", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG}, \ - {"EGRESS_PKT_FWD_L2_HDR_VNTAG", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_BFD", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_GPE", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_GRE", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_IGMP", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_P_1588", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_UDPIPSEC", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDPIPSEC}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \ - {"EGRESS_PKT_SYS_HDR_EP_NIH", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH}, \ - {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \ - {"EGRESS_PKT_SYS_HDR_NONE", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_ETAG", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_SVTAG", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_VNTAG", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDPIPSEC", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDPIPSEC}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \ - {"INGRESS_PKT_INNER_L2_HDR_ETAG", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG}, \ - {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \ - {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \ - {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \ - {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \ - {"INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC}, \ - {"INGRESS_PKT_INNER_L2_HDR_VNTAG", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_BFD", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_IGMP", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_P_1588", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \ - {"INGRESS_PKT_OUTER_L2_HDR_ETAG", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG}, \ - {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \ - {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \ - {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \ - {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \ - {"INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC}, \ - {"INGRESS_PKT_OUTER_L2_HDR_SVTAG", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG}, \ - {"INGRESS_PKT_OUTER_L2_HDR_VNTAG", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_BFD", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_GPE", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_UDPIPSEC", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDPIPSEC}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \ - {"INGRESS_PKT_SYS_HDR_EP_NIH", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH}, \ - {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \ - {"INGRESS_PKT_SYS_HDR_NONE", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \ - {"rxpmd_match_id_count", BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_COUNT} - -#endif /*! BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_34_2_0/bcm56880_a0_hna_6_5_34_2_0_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_34_2_0/bcm56880_a0_hna_6_5_34_2_0_bcmpkt_flexhdr.h deleted file mode 100644 index c23dc2f7a48..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_34_2_0/bcm56880_a0_hna_6_5_34_2_0_bcmpkt_flexhdr.h +++ /dev/null @@ -1,169 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) header.yml. - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - -#ifndef BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_FLEXHDR_H -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_FLEXHDR_H - -#include - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ARP_T 0 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_AUTHEN_T 1 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_BFD_T 2 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_CNTAG_T 3 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T 4 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T 5 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_DEST_OPTION_T 6 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T 7 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T 8 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ESP_T 9 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ETAG_T 10 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ETHERTYPE_T 11 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_FRAG_T 12 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T 13 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GPE_T 14 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GRE_CHKSUM_T 15 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GRE_KEY_T 16 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GRE_ROUT_T 17 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GRE_SEQ_T 18 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GRE_T 19 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_HOP_BY_HOP_T 20 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ICMP_T 21 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_0_A_T 22 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_0_B_T 23 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_1_T 24 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_2_T 25 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_3_T 26 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T 27 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_MD_BASE_T 28 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_METADATA_T 29 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IGMP_T 30 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IPFIX_T 31 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IPV4_T 32 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IPV6_T 33 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_L2_T 34 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_MIRROR_ERSPAN_SN_T 35 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_MIRROR_TRANSPORT_T 36 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_ACH_T 37 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_BV_T 38 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_CW_T 39 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_T 40 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_P_1588_T 41 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PROG_EXT_HDR_T 42 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_0_T 43 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_1_T 44 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T 45 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T 46 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RARP_T 47 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ROUTING_T 48 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RSPAN_T 49 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T 50 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T 51 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_2_T 52 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_SNAP_LLC_T 53 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_TCP_FIRST_4BYTES_T 54 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T 55 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_UDP_T 56 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_UNKNOWN_L3_T 57 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_UNKNOWN_L4_T 58 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T 59 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_VLAN_T 60 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_VNTAG_T 61 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_VXLAN_T 62 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_WESP_T 63 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_T 64 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_FLEXHDR_COUNT 65 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_FLEXHDR_NAME_MAP_INIT \ - {"arp_t", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ARP_T},\ - {"authen_t", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_AUTHEN_T},\ - {"bfd_t", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_BFD_T},\ - {"cntag_t", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_CNTAG_T},\ - {"cpu_composites_0_t", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T},\ - {"cpu_composites_1_t", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T},\ - {"dest_option_t", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_DEST_OPTION_T},\ - {"erspan3_fixed_hdr_t", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T},\ - {"erspan3_subhdr_5_t", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T},\ - {"esp_t", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ESP_T},\ - {"etag_t", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ETAG_T},\ - {"ethertype_t", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ETHERTYPE_T},\ - {"frag_t", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_FRAG_T},\ - {"generic_loopback_t", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T},\ - {"gpe_t", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GPE_T},\ - {"gre_chksum_t", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GRE_CHKSUM_T},\ - {"gre_key_t", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GRE_KEY_T},\ - {"gre_rout_t", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GRE_ROUT_T},\ - {"gre_seq_t", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GRE_SEQ_T},\ - {"gre_t", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GRE_T},\ - {"hop_by_hop_t", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_HOP_BY_HOP_T},\ - {"icmp_t", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ICMP_T},\ - {"ifa_flex_md_0_a_t", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_0_A_T},\ - {"ifa_flex_md_0_b_t", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_0_B_T},\ - {"ifa_flex_md_1_t", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_1_T},\ - {"ifa_flex_md_2_t", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_2_T},\ - {"ifa_flex_md_3_t", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_3_T},\ - {"ifa_header_t", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T},\ - {"ifa_md_base_t", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_MD_BASE_T},\ - {"ifa_metadata_t", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_METADATA_T},\ - {"igmp_t", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IGMP_T},\ - {"ipfix_t", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IPFIX_T},\ - {"ipv4_t", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IPV4_T},\ - {"ipv6_t", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IPV6_T},\ - {"l2_t", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_L2_T},\ - {"mirror_erspan_sn_t", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_MIRROR_ERSPAN_SN_T},\ - {"mirror_transport_t", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_MIRROR_TRANSPORT_T},\ - {"mpls_ach_t", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_ACH_T},\ - {"mpls_bv_t", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_BV_T},\ - {"mpls_cw_t", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_CW_T},\ - {"mpls_t", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_T},\ - {"p_1588_t", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_P_1588_T},\ - {"prog_ext_hdr_t", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PROG_EXT_HDR_T},\ - {"psamp_0_t", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_0_T},\ - {"psamp_1_t", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_1_T},\ - {"psamp_mirror_on_drop_0_t", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\ - {"psamp_mirror_on_drop_3_t", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T},\ - {"rarp_t", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RARP_T},\ - {"routing_t", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ROUTING_T},\ - {"rspan_t", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RSPAN_T},\ - {"sflow_shim_0_t", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T},\ - {"sflow_shim_1_t", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T},\ - {"sflow_shim_2_t", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_2_T},\ - {"snap_llc_t", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_SNAP_LLC_T},\ - {"tcp_first_4bytes_t", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_TCP_FIRST_4BYTES_T},\ - {"tcp_last_16bytes_t", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T},\ - {"udp_t", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_UDP_T},\ - {"unknown_l3_t", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_UNKNOWN_L3_T},\ - {"unknown_l4_t", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_UNKNOWN_L4_T},\ - {"unknown_l5_t", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T},\ - {"vlan_t", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_VLAN_T},\ - {"vntag_t", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_VNTAG_T},\ - {"vxlan_t", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_VXLAN_T},\ - {"wesp_t", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_WESP_T},\ - {"RXPMD_FLEX_T", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_T},\ - {"flexhdr count", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_FLEXHDR_COUNT} - -#endif /* BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_FLEXHDR_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_34_2_0/bcm56880_a0_hna_6_5_34_2_0_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_34_2_0/bcm56880_a0_hna_6_5_34_2_0_bcmpkt_flexhdr_data.h deleted file mode 100644 index 1c8992bee28..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_34_2_0/bcm56880_a0_hna_6_5_34_2_0_bcmpkt_flexhdr_data.h +++ /dev/null @@ -1,1211 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) header.yml. - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - -#ifndef BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_FLEXHDR_DATA_H -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_FLEXHDR_DATA_H - -/*! - * \name ARP_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ARP_T_HARDWARE_LEN 0 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ARP_T_HARDWARE_TYPE 1 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ARP_T_OPERATION 2 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ARP_T_PROT_ADDR_LEN 3 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ARP_T_PROTOCOL_TYPE 4 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ARP_T_SENDER_HA 5 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ARP_T_SENDER_IP 6 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ARP_T_TARGET_HA 7 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ARP_T_TARGET_IP 8 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ARP_T_FID_COUNT 9 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \ - {"HARDWARE_LEN", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ARP_T_HARDWARE_LEN},\ - {"HARDWARE_TYPE", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ARP_T_HARDWARE_TYPE},\ - {"OPERATION", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ARP_T_OPERATION},\ - {"PROT_ADDR_LEN", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ARP_T_PROT_ADDR_LEN},\ - {"PROTOCOL_TYPE", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ARP_T_PROTOCOL_TYPE},\ - {"SENDER_HA", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ARP_T_SENDER_HA},\ - {"SENDER_IP", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ARP_T_SENDER_IP},\ - {"TARGET_HA", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ARP_T_TARGET_HA},\ - {"TARGET_IP", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ARP_T_TARGET_IP},\ - {"arp_t fid count", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ARP_T_FID_COUNT} - -/*! - * \name AUTHEN_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_AUTHEN_T_DATA 0 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_AUTHEN_T_NEXT_HEADER 1 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN 2 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_AUTHEN_T_RESERVED 3 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_AUTHEN_T_SEQ_NUM 4 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_AUTHEN_T_SPI 5 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_AUTHEN_T_FID_COUNT 6 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT \ - {"DATA", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_AUTHEN_T_DATA},\ - {"NEXT_HEADER", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_AUTHEN_T_NEXT_HEADER},\ - {"PAYLOAD_LEN", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN},\ - {"RESERVED", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_AUTHEN_T_RESERVED},\ - {"SEQ_NUM", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_AUTHEN_T_SEQ_NUM},\ - {"SPI", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_AUTHEN_T_SPI},\ - {"authen_t fid count", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_AUTHEN_T_FID_COUNT} - -/*! - * \name BFD_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_BFD_T_AP 0 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_BFD_T_BFD_LENGTH 1 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_BFD_T_CPI 2 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_BFD_T_DEM 3 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_BFD_T_DESMINTXINTV 4 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_BFD_T_DETECTMULT 5 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_BFD_T_DIAG 6 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_BFD_T_FIN 7 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_BFD_T_MINECHORXINTV 8 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_BFD_T_MPT 9 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_BFD_T_MYDISCRIM 10 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_BFD_T_POLL 11 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_BFD_T_REQMINRXINTV 12 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_BFD_T_STA 13 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_BFD_T_URDISCRIM 14 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_BFD_T_VERSION 15 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_BFD_T_FID_COUNT 16 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT \ - {"AP", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_BFD_T_AP},\ - {"BFD_LENGTH", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_BFD_T_BFD_LENGTH},\ - {"CPI", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_BFD_T_CPI},\ - {"DEM", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_BFD_T_DEM},\ - {"DESMINTXINTV", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_BFD_T_DESMINTXINTV},\ - {"DETECTMULT", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_BFD_T_DETECTMULT},\ - {"DIAG", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_BFD_T_DIAG},\ - {"FIN", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_BFD_T_FIN},\ - {"MINECHORXINTV", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_BFD_T_MINECHORXINTV},\ - {"MPT", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_BFD_T_MPT},\ - {"MYDISCRIM", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_BFD_T_MYDISCRIM},\ - {"POLL", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_BFD_T_POLL},\ - {"REQMINRXINTV", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_BFD_T_REQMINRXINTV},\ - {"STA", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_BFD_T_STA},\ - {"URDISCRIM", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_BFD_T_URDISCRIM},\ - {"VERSION", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_BFD_T_VERSION},\ - {"bfd_t fid count", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_BFD_T_FID_COUNT} - -/*! - * \name CNTAG_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_CNTAG_T_RPID 0 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_CNTAG_T_TPID 1 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_CNTAG_T_FID_COUNT 2 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT \ - {"RPID", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_CNTAG_T_RPID},\ - {"TPID", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_CNTAG_T_TPID},\ - {"cntag_t fid count", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_CNTAG_T_FID_COUNT} - -/*! - * \name CPU_COMPOSITES_0_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT 7 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \ - {"DMA_CONT0", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\ - {"DMA_CONT1", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\ - {"DMA_CONT2", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\ - {"DMA_CONT3", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\ - {"DMA_CONT4", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\ - {"DMA_CONT5", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\ - {"DMA_CONT6", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\ - {"cpu_composites_0_t fid count", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT} - -/*! - * \name CPU_COMPOSITES_1_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7 8 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8 9 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9 10 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT 11 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \ - {"DMA_CONT10", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\ - {"DMA_CONT11", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\ - {"DMA_CONT12", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\ - {"DMA_CONT13", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\ - {"DMA_CONT14", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\ - {"DMA_CONT15", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\ - {"DMA_CONT16", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\ - {"DMA_CONT17", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\ - {"DMA_CONT7", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\ - {"DMA_CONT8", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\ - {"DMA_CONT9", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\ - {"cpu_composites_1_t fid count", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT} - -/*! - * \name DEST_OPTION_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN 0 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER 1 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_DEST_OPTION_T_OPTION 2 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_DEST_OPTION_T_FID_COUNT 3 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT \ - {"HDR_EXT_LEN", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN},\ - {"NEXT_HEADER", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER},\ - {"OPTION", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_DEST_OPTION_T_OPTION},\ - {"dest_option_t fid count", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_DEST_OPTION_T_FID_COUNT} - -/*! - * \name ERSPAN3_FIXED_HDR_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO 0 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS 1 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID 2 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID 4 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T 5 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP 6 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER 7 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN 8 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT 9 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \ - {"BSO", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\ - {"COS", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\ - {"GBP_SID", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\ - {"P_FT_HWID_D_GRA_O", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\ - {"SESSION_ID", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\ - {"T", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\ - {"TIMESTAMP", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\ - {"VER", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\ - {"VLAN", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\ - {"erspan3_fixed_hdr_t fid count", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT} - -/*! - * \name ERSPAN3_SUBHDR_5_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID 1 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID 2 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP 3 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT 4 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \ - {"PLATFORM_ID", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\ - {"PORT_ID", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\ - {"SWITCH_ID", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\ - {"TIMESTAMP", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\ - {"erspan3_subhdr_5_t fid count", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT} - -/*! - * \name ESP_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ESP_T_NEXT_HEADER 0 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ESP_T_PAD 1 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ESP_T_PAD_LEN 2 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ESP_T_SEQ_NUM 3 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ESP_T_SPI 4 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ESP_T_FID_COUNT 5 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT \ - {"NEXT_HEADER", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ESP_T_NEXT_HEADER},\ - {"PAD", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ESP_T_PAD},\ - {"PAD_LEN", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ESP_T_PAD_LEN},\ - {"SEQ_NUM", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ESP_T_SEQ_NUM},\ - {"SPI", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ESP_T_SPI},\ - {"esp_t fid count", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ESP_T_FID_COUNT} - -/*! - * \name ETAG_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ETAG_T_TAG 0 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ETAG_T_TPID 1 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ETAG_T_FID_COUNT 2 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT \ - {"TAG", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ETAG_T_TAG},\ - {"TPID", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ETAG_T_TPID},\ - {"etag_t fid count", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ETAG_T_FID_COUNT} - -/*! - * \name ETHERTYPE_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ETHERTYPE_T_TYPE 0 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT 1 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \ - {"TYPE", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ETHERTYPE_T_TYPE},\ - {"ethertype_t fid count", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT} - -/*! - * \name FRAG_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_FRAG_T_FRAG_INFO 0 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_FRAG_T_ID 1 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_FRAG_T_NEXT_HEADER 2 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_FRAG_T_RESERVED 3 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_FRAG_T_FID_COUNT 4 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT \ - {"FRAG_INFO", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_FRAG_T_FRAG_INFO},\ - {"ID", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_FRAG_T_ID},\ - {"NEXT_HEADER", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_FRAG_T_NEXT_HEADER},\ - {"RESERVED", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_FRAG_T_RESERVED},\ - {"frag_t fid count", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_FRAG_T_FID_COUNT} - -/*! - * \name GENERIC_LOOPBACK_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ 0 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE 1 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ 2 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS 3 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE 4 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY 5 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL 6 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ 7 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0 8 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1 9 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ 10 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1 11 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 12 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE 13 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_SVP 14 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT 15 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \ - {"DESTINATION_OBJ", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\ - {"DESTINATION_TYPE", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\ - {"ENTROPY_OBJ", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\ - {"FLAGS", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\ - {"HEADER_TYPE", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\ - {"INPUT_PRIORITY", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\ - {"INTERFACE_CTRL", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\ - {"INTERFACE_OBJ", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\ - {"PROCESSING_CTRL_0", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\ - {"PROCESSING_CTRL_1", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\ - {"QOS_OBJ", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\ - {"RESERVED_1", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\ - {"SOURCE_SYSTEM_PORT", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\ - {"START_BYTE", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\ - {"SVP", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_SVP},\ - {"generic_loopback_t fid count", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT} - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP 0 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF 1 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED 2 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP 3 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP 4 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP 5 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP 6 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP 7 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1 8 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__TUNNEL 0 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__GENERIC 1 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__NOOP 0 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__VFI 1 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__L3_IIF 2 - -/*! - * \name GPE_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GPE_T_FLAGS 0 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GPE_T_NEXT_PROTOCOL 1 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GPE_T_RESERVED0 2 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GPE_T_RESERVED1 3 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GPE_T_VNI 4 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GPE_T_FID_COUNT 5 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT \ - {"FLAGS", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GPE_T_FLAGS},\ - {"NEXT_PROTOCOL", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GPE_T_NEXT_PROTOCOL},\ - {"RESERVED0", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GPE_T_RESERVED0},\ - {"RESERVED1", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GPE_T_RESERVED1},\ - {"VNI", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GPE_T_VNI},\ - {"gpe_t fid count", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GPE_T_FID_COUNT} - -/*! - * \name GRE_CHKSUM_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM 0 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GRE_CHKSUM_T_OFFSET 1 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT 2 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT \ - {"CHECKSUM", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM},\ - {"OFFSET", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GRE_CHKSUM_T_OFFSET},\ - {"gre_chksum_t fid count", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT} - -/*! - * \name GRE_KEY_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GRE_KEY_T_KEY 0 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GRE_KEY_T_FID_COUNT 1 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT \ - {"KEY", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GRE_KEY_T_KEY},\ - {"gre_key_t fid count", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GRE_KEY_T_FID_COUNT} - -/*! - * \name GRE_ROUT_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GRE_ROUT_T_ROUTING 0 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GRE_ROUT_T_FID_COUNT 1 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT \ - {"ROUTING", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GRE_ROUT_T_ROUTING},\ - {"gre_rout_t fid count", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GRE_ROUT_T_FID_COUNT} - -/*! - * \name GRE_SEQ_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GRE_SEQ_T_SEQUENCE 0 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GRE_SEQ_T_FID_COUNT 1 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT \ - {"SEQUENCE", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GRE_SEQ_T_SEQUENCE},\ - {"gre_seq_t fid count", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GRE_SEQ_T_FID_COUNT} - -/*! - * \name GRE_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GRE_T_C_R_K_S 0 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GRE_T_PROTOCOL 1 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GRE_T_RESERVED 2 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GRE_T_VERSION 3 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GRE_T_FID_COUNT 4 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT \ - {"C_R_K_S", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GRE_T_C_R_K_S},\ - {"PROTOCOL", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GRE_T_PROTOCOL},\ - {"RESERVED", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GRE_T_RESERVED},\ - {"VERSION", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GRE_T_VERSION},\ - {"gre_t fid count", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GRE_T_FID_COUNT} - -/*! - * \name HOP_BY_HOP_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN 0 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER 1 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_HOP_BY_HOP_T_OPTION 2 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT 3 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT \ - {"HDR_EXT_LEN", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN},\ - {"NEXT_HEADER", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER},\ - {"OPTION", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_HOP_BY_HOP_T_OPTION},\ - {"hop_by_hop_t fid count", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT} - -/*! - * \name ICMP_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ICMP_T_CHECKSUM 0 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ICMP_T_CODE 1 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ICMP_T_ICMP_TYPE 2 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ICMP_T_FID_COUNT 3 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \ - {"CHECKSUM", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ICMP_T_CHECKSUM},\ - {"CODE", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ICMP_T_CODE},\ - {"ICMP_TYPE", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ICMP_T_ICMP_TYPE},\ - {"icmp_t fid count", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ICMP_T_FID_COUNT} - -/*! - * \name IFA_FLEX_MD_0_A_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_FWD_HDR_TTL 0 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_LNS_DEVICE_ID 1 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT 2 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_FIELD_NAME_MAP_INIT \ - {"FWD_HDR_TTL", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_FWD_HDR_TTL},\ - {"LNS_DEVICE_ID", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_LNS_DEVICE_ID},\ - {"ifa_flex_md_0_a_t fid count", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT} - -/*! - * \name IFA_FLEX_MD_0_B_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_CN 0 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_PORT_SPEED 1 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_QUEUE_ID 2 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_RX_TIMESTAMP_SEC 3 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT 4 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_FIELD_NAME_MAP_INIT \ - {"CN", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_CN},\ - {"PORT_SPEED", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_PORT_SPEED},\ - {"QUEUE_ID", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_QUEUE_ID},\ - {"RX_TIMESTAMP_SEC", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_RX_TIMESTAMP_SEC},\ - {"ifa_flex_md_0_b_t fid count", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT} - -/*! - * \name IFA_FLEX_MD_1_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_1_T_EGRESS_PORT_ID 0 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_1_T_INGRESS_PORT_ID 1 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_1_T_RX_TIMESTAMP_NANOSEC 2 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT 3 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_1_T_FIELD_NAME_MAP_INIT \ - {"EGRESS_PORT_ID", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_1_T_EGRESS_PORT_ID},\ - {"INGRESS_PORT_ID", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_1_T_INGRESS_PORT_ID},\ - {"RX_TIMESTAMP_NANOSEC", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_1_T_RX_TIMESTAMP_NANOSEC},\ - {"ifa_flex_md_1_t fid count", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT} - -/*! - * \name IFA_FLEX_MD_2_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_2_T_RESIDENCE_TIME_NANOSEC 0 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_2_T_TX_QUEUE_BYTE_COUNT 1 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT 2 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_2_T_FIELD_NAME_MAP_INIT \ - {"RESIDENCE_TIME_NANOSEC", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_2_T_RESIDENCE_TIME_NANOSEC},\ - {"TX_QUEUE_BYTE_COUNT", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_2_T_TX_QUEUE_BYTE_COUNT},\ - {"ifa_flex_md_2_t fid count", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT} - -/*! - * \name IFA_FLEX_MD_3_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_0 0 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_1 1 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT 2 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_3_T_FIELD_NAME_MAP_INIT \ - {"MMU_STAT_0", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_0},\ - {"MMU_STAT_1", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_3_T_MMU_STAT_1},\ - {"ifa_flex_md_3_t fid count", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT} - -/*! - * \name IFA_HEADER_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_FLAGS 0 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_GNS 1 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH 2 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_NEXT_HDR 3 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_VER 4 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_FID_COUNT 5 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT \ - {"FLAGS", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_FLAGS},\ - {"GNS", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_GNS},\ - {"MAX_LENGTH", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH},\ - {"NEXT_HDR", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_NEXT_HDR},\ - {"VER", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_VER},\ - {"ifa_header_t fid count", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_FID_COUNT} - -/*! - * \name IFA_MD_BASE_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_MD_BASE_T_ACTION_VECTOR 0 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_MD_BASE_T_HOP_LIMIT_CURRENT_LENGTH 1 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_MD_BASE_T_REQUEST_VECTOR 2 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT 3 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_MD_BASE_T_FIELD_NAME_MAP_INIT \ - {"ACTION_VECTOR", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_MD_BASE_T_ACTION_VECTOR},\ - {"HOP_LIMIT_CURRENT_LENGTH", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_MD_BASE_T_HOP_LIMIT_CURRENT_LENGTH},\ - {"REQUEST_VECTOR", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_MD_BASE_T_REQUEST_VECTOR},\ - {"ifa_md_base_t fid count", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT} - -/*! - * \name IFA_METADATA_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_METADATA_T_ACTION_VECTOR 0 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_METADATA_T_HOP_LIMIT_CURRENT_LENGTH 1 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_METADATA_T_METADATA 2 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_METADATA_T_REQUEST_VECTOR 3 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_METADATA_T_FID_COUNT 4 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_METADATA_T_FIELD_NAME_MAP_INIT \ - {"ACTION_VECTOR", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_METADATA_T_ACTION_VECTOR},\ - {"HOP_LIMIT_CURRENT_LENGTH", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_METADATA_T_HOP_LIMIT_CURRENT_LENGTH},\ - {"METADATA", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_METADATA_T_METADATA},\ - {"REQUEST_VECTOR", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_METADATA_T_REQUEST_VECTOR},\ - {"ifa_metadata_t fid count", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_METADATA_T_FID_COUNT} - -/*! - * \name IGMP_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IGMP_T_CHECKSUM 0 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IGMP_T_GROUP_ADDRESS 1 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IGMP_T_IGMP_TYPE 2 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IGMP_T_MAX_RESP_TIME 3 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IGMP_T_FID_COUNT 4 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT \ - {"CHECKSUM", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IGMP_T_CHECKSUM},\ - {"GROUP_ADDRESS", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IGMP_T_GROUP_ADDRESS},\ - {"IGMP_TYPE", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IGMP_T_IGMP_TYPE},\ - {"MAX_RESP_TIME", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IGMP_T_MAX_RESP_TIME},\ - {"igmp_t fid count", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IGMP_T_FID_COUNT} - -/*! - * \name IPFIX_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IPFIX_T_EXPORT_TIME 0 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IPFIX_T_LENGTH 1 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IPFIX_T_SEQUENCE_NUM 3 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IPFIX_T_VERSION 4 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IPFIX_T_FID_COUNT 5 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \ - {"EXPORT_TIME", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IPFIX_T_EXPORT_TIME},\ - {"LENGTH", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IPFIX_T_LENGTH},\ - {"OBS_DOMAIN_ID", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\ - {"SEQUENCE_NUM", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IPFIX_T_SEQUENCE_NUM},\ - {"VERSION", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IPFIX_T_VERSION},\ - {"ipfix_t fid count", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IPFIX_T_FID_COUNT} - -/*! - * \name IPV4_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IPV4_T_DA 0 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IPV4_T_HDR_CHECKSUM 2 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IPV4_T_ID 3 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IPV4_T_OPTION 4 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IPV4_T_PROTOCOL 5 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IPV4_T_SA 6 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IPV4_T_TOS 7 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IPV4_T_TOTAL_LENGTH 8 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IPV4_T_TTL 9 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IPV4_T_VERSION_HDR_LEN 10 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IPV4_T_FID_COUNT 11 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \ - {"DA", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IPV4_T_DA},\ - {"FLAGS_FRAG_OFFSET", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\ - {"HDR_CHECKSUM", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IPV4_T_HDR_CHECKSUM},\ - {"ID", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IPV4_T_ID},\ - {"OPTION", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IPV4_T_OPTION},\ - {"PROTOCOL", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IPV4_T_PROTOCOL},\ - {"SA", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IPV4_T_SA},\ - {"TOS", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IPV4_T_TOS},\ - {"TOTAL_LENGTH", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IPV4_T_TOTAL_LENGTH},\ - {"TTL", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IPV4_T_TTL},\ - {"VERSION_HDR_LEN", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IPV4_T_VERSION_HDR_LEN},\ - {"ipv4_t fid count", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IPV4_T_FID_COUNT} - -/*! - * \name IPV6_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IPV6_T_DA 0 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IPV6_T_FLOW_LABEL 1 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IPV6_T_HOP_LIMIT 2 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IPV6_T_NEXT_HEADER 3 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IPV6_T_SA 5 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IPV6_T_TRAFFIC_CLASS 6 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IPV6_T_VERSION 7 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IPV6_T_FID_COUNT 8 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \ - {"DA", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IPV6_T_DA},\ - {"FLOW_LABEL", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IPV6_T_FLOW_LABEL},\ - {"HOP_LIMIT", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IPV6_T_HOP_LIMIT},\ - {"NEXT_HEADER", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IPV6_T_NEXT_HEADER},\ - {"PAYLOAD_LENGTH", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\ - {"SA", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IPV6_T_SA},\ - {"TRAFFIC_CLASS", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IPV6_T_TRAFFIC_CLASS},\ - {"VERSION", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IPV6_T_VERSION},\ - {"ipv6_t fid count", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IPV6_T_FID_COUNT} - -/*! - * \name L2_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_L2_T_MACDA 0 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_L2_T_MACSA 1 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_L2_T_FID_COUNT 2 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \ - {"MACDA", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_L2_T_MACDA},\ - {"MACSA", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_L2_T_MACSA},\ - {"l2_t fid count", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_L2_T_FID_COUNT} - -/*! - * \name MIRROR_ERSPAN_SN_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT 1 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \ - {"SEQ_NUM", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\ - {"mirror_erspan_sn_t fid count", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT} - -/*! - * \name MIRROR_TRANSPORT_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_MIRROR_TRANSPORT_T_DATA 0 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT 1 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \ - {"DATA", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_MIRROR_TRANSPORT_T_DATA},\ - {"mirror_transport_t fid count", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT} - -/*! - * \name MPLS_ACH_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE 0 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_ACH_T_CW_TYPE 1 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_ACH_T_RESERVED 2 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_ACH_T_VERSION 3 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_ACH_T_FID_COUNT 4 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT \ - {"CHANNEL_TYPE", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE},\ - {"CW_TYPE", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_ACH_T_CW_TYPE},\ - {"RESERVED", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_ACH_T_RESERVED},\ - {"VERSION", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_ACH_T_VERSION},\ - {"mpls_ach_t fid count", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_ACH_T_FID_COUNT} - -/*! - * \name MPLS_BV_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_BV_T_VALUE 0 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_BV_T_FID_COUNT 1 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT \ - {"VALUE", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_BV_T_VALUE},\ - {"mpls_bv_t fid count", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_BV_T_FID_COUNT} - -/*! - * \name MPLS_CW_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_CW_T_CW_TYPE 0 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_CW_T_RESERVED 1 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER 2 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_CW_T_FID_COUNT 3 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT \ - {"CW_TYPE", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_CW_T_CW_TYPE},\ - {"RESERVED", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_CW_T_RESERVED},\ - {"SEQ_NUMBER", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER},\ - {"mpls_cw_t fid count", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_CW_T_FID_COUNT} - -/*! - * \name MPLS_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_T_BOS 0 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_T_EXP 1 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_T_LABEL 2 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_T_TTL 3 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_T_FID_COUNT 4 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT \ - {"BOS", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_T_BOS},\ - {"EXP", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_T_EXP},\ - {"LABEL", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_T_LABEL},\ - {"TTL", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_T_TTL},\ - {"mpls_t fid count", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_T_FID_COUNT} - -/*! - * \name P_1588_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_P_1588_T_CNTRL 0 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_P_1588_T_CORRECTION 1 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_P_1588_T_DOMAIN_NB 2 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_P_1588_T_FLAGS 3 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_P_1588_T_LOGMSGINTERVAL 4 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_P_1588_T_MSG_LENGTH 5 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_P_1588_T_MSG_TYPE 6 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_P_1588_T_RESERVED1 7 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_P_1588_T_RESERVED2 8 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_P_1588_T_RESERVED3 9 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_P_1588_T_SEQ_ID 10 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_P_1588_T_SRCPORTID 11 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_P_1588_T_TRANSPORTSPEC 12 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_P_1588_T_VERSION 13 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_P_1588_T_FID_COUNT 14 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT \ - {"CNTRL", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_P_1588_T_CNTRL},\ - {"CORRECTION", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_P_1588_T_CORRECTION},\ - {"DOMAIN_NB", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_P_1588_T_DOMAIN_NB},\ - {"FLAGS", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_P_1588_T_FLAGS},\ - {"LOGMSGINTERVAL", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_P_1588_T_LOGMSGINTERVAL},\ - {"MSG_LENGTH", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_P_1588_T_MSG_LENGTH},\ - {"MSG_TYPE", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_P_1588_T_MSG_TYPE},\ - {"RESERVED1", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_P_1588_T_RESERVED1},\ - {"RESERVED2", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_P_1588_T_RESERVED2},\ - {"RESERVED3", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_P_1588_T_RESERVED3},\ - {"SEQ_ID", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_P_1588_T_SEQ_ID},\ - {"SRCPORTID", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_P_1588_T_SRCPORTID},\ - {"TRANSPORTSPEC", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_P_1588_T_TRANSPORTSPEC},\ - {"VERSION", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_P_1588_T_VERSION},\ - {"p_1588_t fid count", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_P_1588_T_FID_COUNT} - -/*! - * \name PROG_EXT_HDR_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN 0 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER 1 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PROG_EXT_HDR_T_OPTION 2 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT 3 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT \ - {"HDR_EXT_LEN", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN},\ - {"NEXT_HEADER", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER},\ - {"OPTION", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PROG_EXT_HDR_T_OPTION},\ - {"prog_ext_hdr_t fid count", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT} - -/*! - * \name PSAMP_0_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_0_T_FLOWSET 0 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_0_T_LENGTH 1 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX 2 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS 3 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_0_T_OBS_TIME_S 4 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID 5 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_0_T_FID_COUNT 6 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT \ - {"FLOWSET", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_0_T_FLOWSET},\ - {"LENGTH", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_0_T_LENGTH},\ - {"NEXT_HOP_INDEX", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX},\ - {"OBS_TIME_NS", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS},\ - {"OBS_TIME_S", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_0_T_OBS_TIME_S},\ - {"TEMPLATE_ID", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID},\ - {"psamp_0_t fid count", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_0_T_FID_COUNT} - -/*! - * \name PSAMP_1_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_1_T_DLB_ID 0 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_1_T_EGRESS_PORT 1 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_1_T_EPOCH 2 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_1_T_INGRESS_PORT 3 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH 4 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_1_T_USER_META_DATA 5 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG 6 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_1_T_FID_COUNT 7 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT \ - {"DLB_ID", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_1_T_DLB_ID},\ - {"EGRESS_PORT", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_1_T_EGRESS_PORT},\ - {"EPOCH", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_1_T_EPOCH},\ - {"INGRESS_PORT", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_1_T_INGRESS_PORT},\ - {"SAMPLED_LENGTH", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH},\ - {"USER_META_DATA", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_1_T_USER_META_DATA},\ - {"VARIABLE_FLAG", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG},\ - {"psamp_1_t fid count", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_1_T_FID_COUNT} - -/*! - * \name PSAMP_MIRROR_ON_DROP_0_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT 1 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH 2 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS 3 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S 4 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID 5 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID 6 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT 7 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \ - {"EGRESS_MOD_PORT", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\ - {"INGRESS_PORT", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\ - {"LENGTH", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\ - {"OBS_TIME_NS", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\ - {"OBS_TIME_S", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\ - {"SWITCH_ID", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\ - {"TEMPLATE_ID", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\ - {"psamp_mirror_on_drop_0_t fid count", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT} - -/*! - * \name PSAMP_MIRROR_ON_DROP_3_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON 0 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_MOD_STATE 1 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0 2 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH 3 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX 4 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA 5 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR 6 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT 7 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT \ - {"DROP_REASON", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON},\ - {"MOD_STATE", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_MOD_STATE},\ - {"RESERVED_0", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0},\ - {"SAMPLED_LENGTH", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH},\ - {"UC_COS__COLOR__PROB_IDX", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX},\ - {"USER_META_DATA", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA},\ - {"VAR_LEN_INDICATOR", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR},\ - {"psamp_mirror_on_drop_3_t fid count", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT} - -/*! - * \name RARP_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RARP_T_HARDWARE_LEN 0 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RARP_T_HARDWARE_TYPE 1 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RARP_T_OPERATION 2 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RARP_T_PROT_ADDR_LEN 3 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RARP_T_PROTOCOL_TYPE 4 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RARP_T_SENDER_HA 5 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RARP_T_SENDER_IP 6 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RARP_T_TARGET_HA 7 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RARP_T_TARGET_IP 8 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RARP_T_FID_COUNT 9 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \ - {"HARDWARE_LEN", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RARP_T_HARDWARE_LEN},\ - {"HARDWARE_TYPE", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RARP_T_HARDWARE_TYPE},\ - {"OPERATION", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RARP_T_OPERATION},\ - {"PROT_ADDR_LEN", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RARP_T_PROT_ADDR_LEN},\ - {"PROTOCOL_TYPE", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RARP_T_PROTOCOL_TYPE},\ - {"SENDER_HA", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RARP_T_SENDER_HA},\ - {"SENDER_IP", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RARP_T_SENDER_IP},\ - {"TARGET_HA", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RARP_T_TARGET_HA},\ - {"TARGET_IP", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RARP_T_TARGET_IP},\ - {"rarp_t fid count", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RARP_T_FID_COUNT} - -/*! - * \name ROUTING_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ROUTING_T_DATA 0 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ROUTING_T_HDR_EXT_LEN 1 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ROUTING_T_NEXT_HEADER 2 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ROUTING_T_ROUTING_TYPE 3 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT 4 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ROUTING_T_FID_COUNT 5 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT \ - {"DATA", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ROUTING_T_DATA},\ - {"HDR_EXT_LEN", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ROUTING_T_HDR_EXT_LEN},\ - {"NEXT_HEADER", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ROUTING_T_NEXT_HEADER},\ - {"ROUTING_TYPE", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ROUTING_T_ROUTING_TYPE},\ - {"SEGMENTS_LEFT", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT},\ - {"routing_t fid count", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ROUTING_T_FID_COUNT} - -/*! - * \name RSPAN_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RSPAN_T_TAG 0 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RSPAN_T_TPID 1 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RSPAN_T_FID_COUNT 2 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT \ - {"TAG", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RSPAN_T_TAG},\ - {"TPID", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RSPAN_T_TPID},\ - {"rspan_t fid count", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RSPAN_T_FID_COUNT} - -/*! - * \name SFLOW_SHIM_0_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION 0 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE 1 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T_VERSION 2 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT 3 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT \ - {"SYS_DESTINATION", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION},\ - {"SYS_SOURCE", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE},\ - {"VERSION", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T_VERSION},\ - {"sflow_shim_0_t fid count", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT} - -/*! - * \name SFLOW_SHIM_1_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE 0 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED 1 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE 2 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST 3 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE 4 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED 5 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED 6 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE 7 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT 8 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT \ - {"FLAG_DEST_SAMPLE", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE},\ - {"FLAG_DISCARDED", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED},\ - {"FLAG_FLEX_SAMPLE", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE},\ - {"FLAG_MCAST", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST},\ - {"FLAG_SRC_SAMPLE", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE},\ - {"FLAG_TRUNCATED", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED},\ - {"RESERVED", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED},\ - {"SYS_OPCODE", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE},\ - {"sflow_shim_1_t fid count", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT} - -/*! - * \name SFLOW_SHIM_2_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM 0 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA 1 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT 2 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT \ - {"SEQUENCE_NUM", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM},\ - {"USER_META_DATA", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA},\ - {"sflow_shim_2_t fid count", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT} - -/*! - * \name SNAP_LLC_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_SNAP_LLC_T_LENGTH 0 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_SNAP_LLC_T_SNAP_LLC 1 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_SNAP_LLC_T_FID_COUNT 2 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT \ - {"LENGTH", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_SNAP_LLC_T_LENGTH},\ - {"SNAP_LLC", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_SNAP_LLC_T_SNAP_LLC},\ - {"snap_llc_t fid count", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_SNAP_LLC_T_FID_COUNT} - -/*! - * \name TCP_FIRST_4BYTES_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT 2 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \ - {"DST_PORT", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\ - {"SRC_PORT", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\ - {"tcp_first_4bytes_t fid count", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT} - -/*! - * \name TCP_LAST_16BYTES_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM 0 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM 1 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM 3 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR 4 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE 5 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT 6 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \ - {"ACK_NUM", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\ - {"CHECKSUM", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\ - {"HDR_LEN_AND_FLAGS", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\ - {"SEQ_NUM", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\ - {"URGENT_PTR", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\ - {"WIN_SIZE", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\ - {"tcp_last_16bytes_t fid count", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT} - -/*! - * \name UDP_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_UDP_T_CHECKSUM 0 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_UDP_T_DST_PORT 1 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_UDP_T_SRC_PORT 2 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_UDP_T_UDP_LENGTH 3 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_UDP_T_FID_COUNT 4 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \ - {"CHECKSUM", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_UDP_T_CHECKSUM},\ - {"DST_PORT", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_UDP_T_DST_PORT},\ - {"SRC_PORT", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_UDP_T_SRC_PORT},\ - {"UDP_LENGTH", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_UDP_T_UDP_LENGTH},\ - {"udp_t fid count", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_UDP_T_FID_COUNT} - -/*! - * \name UNKNOWN_L3_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD 1 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT 2 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \ - {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\ - {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\ - {"unknown_l3_t fid count", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT} - -/*! - * \name UNKNOWN_L4_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT 1 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \ - {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\ - {"unknown_l4_t fid count", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT} - -/*! - * \name UNKNOWN_L5_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT 3 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \ - {"L5_BYTES_0_1", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\ - {"L5_BYTES_2_3", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\ - {"L5_BYTES_4_7", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\ - {"unknown_l5_t fid count", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT} - -/*! - * \name VLAN_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_VLAN_T_CFI 0 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_VLAN_T_PCP 1 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_VLAN_T_TPID 2 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_VLAN_T_VID 3 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_VLAN_T_FID_COUNT 4 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \ - {"CFI", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_VLAN_T_CFI},\ - {"PCP", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_VLAN_T_PCP},\ - {"TPID", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_VLAN_T_TPID},\ - {"VID", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_VLAN_T_VID},\ - {"vlan_t fid count", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_VLAN_T_FID_COUNT} - -/*! - * \name VNTAG_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_VNTAG_T_TAG 0 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_VNTAG_T_TPID 1 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_VNTAG_T_FID_COUNT 2 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT \ - {"TAG", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_VNTAG_T_TAG},\ - {"TPID", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_VNTAG_T_TPID},\ - {"vntag_t fid count", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_VNTAG_T_FID_COUNT} - -/*! - * \name VXLAN_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_VXLAN_T_RESERVED2 1 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_VXLAN_T_VN_ID 2 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_VXLAN_T_FID_COUNT 3 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \ - {"FLAGS_RESERVED_1", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\ - {"RESERVED2", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_VXLAN_T_RESERVED2},\ - {"VN_ID", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_VXLAN_T_VN_ID},\ - {"vxlan_t fid count", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_VXLAN_T_FID_COUNT} - -/*! - * \name WESP_T field IDs. - */ -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_WESP_T_FLAGS 0 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_WESP_T_HEADER_LEN 1 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_WESP_T_NEXT_HEADER 2 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_WESP_T_SEQ_NUM 3 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_WESP_T_SPI 4 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_WESP_T_TRAILER_LEN 5 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_WESP_T_WESP_IV 6 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_WESP_T_FID_COUNT 7 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT \ - {"FLAGS", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_WESP_T_FLAGS},\ - {"HEADER_LEN", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_WESP_T_HEADER_LEN},\ - {"NEXT_HEADER", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_WESP_T_NEXT_HEADER},\ - {"SEQ_NUM", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_WESP_T_SEQ_NUM},\ - {"SPI", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_WESP_T_SPI},\ - {"TRAILER_LEN", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_WESP_T_TRAILER_LEN},\ - {"WESP_IV", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_WESP_T_WESP_IV},\ - {"wesp_t fid count", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_WESP_T_FID_COUNT} - - -#endif /* BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_FLEXHDR_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_34_2_0/bcm56880_a0_hna_6_5_34_2_0_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_34_2_0/bcm56880_a0_hna_6_5_34_2_0_bcmpkt_rxpmd_flex_data.h deleted file mode 100644 index 18cad82383f..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_34_2_0/bcm56880_a0_hna_6_5_34_2_0_bcmpkt_rxpmd_flex_data.h +++ /dev/null @@ -1,164 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) map.yml. - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - -#ifndef BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_DATA_H -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_DATA_H - -/*! - * \name RX flex metadata field IDs. - */ -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0 0 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0 1 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_DVP_15_0 2 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0 3 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0 4 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0 5 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0 6 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_0 7 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32 8 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0 9 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0 10 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0 11 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_ING_PORT_GROUP_ID_3_0_3_0 12 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_ING_PORT_GROUP_ID_7_4_3_0 13 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_0 14 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_ITAG_PRESERVE_15_0 15 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 16 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0 17 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0 18 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0 19 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0 20 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0 21 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0 22 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0 23 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0 24 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0 25 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0 26 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_SVP_15_0 27 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0 28 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0 29 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0 30 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0 31 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0 32 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0 33 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_VFI_15_0 34 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_FID_COUNT 35 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_COUNT 42 - -/*! - * \name Packet Flex Reason Types. - */ -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE 0 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS 1 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED 2 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED 3 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP 4 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT 5 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP 6 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER 7 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED 8 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT 9 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP 10 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS 11 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE 12 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP 13 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS 14 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR 15 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF 16 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR 17 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL 18 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD 19 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0 20 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1 21 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2 22 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3 23 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4 24 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5 25 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6 26 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7 27 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD 28 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED 29 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED 30 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU 31 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU 32 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED 33 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT 34 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT 35 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP 36 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD 37 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_SVP 38 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP 39 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED 40 -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_VFP 41 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \ - {"CB_STATION_MOVE", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE},\ - {"CML_FLAGS", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\ - {"DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED},\ - {"DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED},\ - {"DST_FP", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP},\ - {"EM_FT", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT},\ - {"IFP", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP},\ - {"IFP_METER", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\ - {"IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED},\ - {"IVXLT", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\ - {"L2_DST_LOOKUP", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\ - {"L2_DST_LOOKUP_MISS", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\ - {"L2_SRC_STATIC_MOVE", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\ - {"L3_DST_LOOKUP", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\ - {"L3_DST_LOOKUP_MISS", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\ - {"L3_HDR_ERROR", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\ - {"L3_IIF_EQ_L3_OIF", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF},\ - {"L3_TTL_ERROR", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\ - {"LEARN_CACHE_FULL", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\ - {"MACSA_MULTICAST_RSVD", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD},\ - {"MATCHED_RULE_BIT_0", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0},\ - {"MATCHED_RULE_BIT_1", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1},\ - {"MATCHED_RULE_BIT_2", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2},\ - {"MATCHED_RULE_BIT_3", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3},\ - {"MATCHED_RULE_BIT_4", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4},\ - {"MATCHED_RULE_BIT_5", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5},\ - {"MATCHED_RULE_BIT_6", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6},\ - {"MATCHED_RULE_BIT_7", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7},\ - {"MEMBERSHIP_CHECK_FAILED_RSVD", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD},\ - {"MIRROR_SAMPLER_EGR_SAMPLED", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED},\ - {"MIRROR_SAMPLER_SAMPLED", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED},\ - {"MPLS_CTRL_PKT_TO_CPU", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU},\ - {"NO_COPY_TO_CPU", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\ - {"PKT_INTEGRITY_CHECK_FAILED", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\ - {"PROTOCOL_PKT", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\ - {"RESERVED_TRACE_BIT", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT},\ - {"SER_DROP", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP},\ - {"SPANNING_TREE_CHECK_FAILED_RSVD", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD},\ - {"SVP", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_SVP},\ - {"TRACE_DOP", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\ - {"URPF_CHECK_FAILED", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED},\ - {"VFP", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_VFP},\ - {"flex reason count", BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_COUNT} - -#endif /* BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_34_2_0/bcm56880_a0_hna_6_5_34_2_0_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_34_2_0/bcm56880_a0_hna_6_5_34_2_0_bcmpkt_rxpmd_match_id_defs.h deleted file mode 100644 index 99f8bbca9d8..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/hna_6_5_34_2_0/bcm56880_a0_hna_6_5_34_2_0_bcmpkt_rxpmd_match_id_defs.h +++ /dev/null @@ -1,394 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) bcm56880_a0_hna_6_5_34_2_0_sf_match_id_info.yml - * for device bcm56880_a0 and variant hna_6_5_34_2_0. - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - -#ifndef BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H - -#include - -/*! - * \brief Get the Match ID DataBase information. - * - * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information. -*/ -extern bcmpkt_rxpmd_match_id_db_info_t * - bcm56880_a0_hna_6_5_34_2_0_rxpmd_match_id_db_info_get(void); - -/*! - * \brief Get the Match ID Mapping information. - * - * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information. -*/ -extern bcmpkt_rxpmd_match_id_map_info_t * - bcm56880_a0_hna_6_5_34_2_0_rxpmd_match_id_map_info_get(void); - -/*! - \name RXPMD Match IDs -*/ -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG 0 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG 1 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 2 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE 3 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG 4 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC 5 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG 6 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP 7 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 8 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 9 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD 10 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT 11 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE 12 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 13 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 14 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE 15 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE 16 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM 17 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY 18 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT 19 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ 20 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP 21 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA 22 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP 23 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 24 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 25 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 26 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 27 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 28 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 29 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 30 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 31 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 32 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH 33 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW 34 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE 35 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 36 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP 37 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES 38 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES 39 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP 40 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 41 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 42 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 43 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN 44 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK 45 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE 46 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG 47 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG 48 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 49 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE 50 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG 51 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC 52 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG 53 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP 54 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 55 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 56 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD 57 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT 58 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE 59 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 60 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 61 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE 62 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE 63 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM 64 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY 65 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT 66 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ 67 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP 68 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA 69 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP 70 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 71 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 72 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 73 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 74 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 75 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 76 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 77 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 78 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 79 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH 80 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW 81 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE 82 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 83 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP 84 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES 85 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES 86 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP 87 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 88 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 89 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 90 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN 91 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG 92 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG 93 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 94 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE 95 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG 96 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC 97 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG 98 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP 99 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 100 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 101 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD 102 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT 103 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE 104 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 105 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 106 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP 107 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA 108 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP 109 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 110 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 111 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE 112 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 113 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP 114 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES 115 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES 116 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP 117 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 118 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 119 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 120 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG 121 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG 122 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 123 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE 124 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG 125 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC 126 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG 127 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP 128 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 129 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 130 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD 131 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT 132 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE 133 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 134 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 135 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE 136 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE 137 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM 138 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY 139 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT 140 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ 141 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP 142 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA 143 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP 144 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 145 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 146 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 147 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 148 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 149 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 150 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 151 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 152 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 153 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH 154 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW 155 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE 156 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 157 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP 158 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES 159 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES 160 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP 161 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 162 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 163 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 164 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN 165 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK 166 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE 167 -#define BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_COUNT 168 - -#define BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \ - {"EGRESS_PKT_FWD_L2_HDR_ETAG", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG}, \ - {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \ - {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \ - {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \ - {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \ - {"EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC}, \ - {"EGRESS_PKT_FWD_L2_HDR_VNTAG", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_BFD", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_GPE", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_GRE", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_IGMP", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_P_1588", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \ - {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \ - {"EGRESS_PKT_SYS_HDR_NONE", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_ETAG", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_VNTAG", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \ - {"INGRESS_PKT_INNER_L2_HDR_ETAG", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG}, \ - {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \ - {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \ - {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \ - {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \ - {"INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC}, \ - {"INGRESS_PKT_INNER_L2_HDR_VNTAG", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_BFD", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_IGMP", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_P_1588", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \ - {"INGRESS_PKT_OUTER_L2_HDR_ETAG", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG}, \ - {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \ - {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \ - {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \ - {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \ - {"INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC}, \ - {"INGRESS_PKT_OUTER_L2_HDR_VNTAG", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_BFD", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_GPE", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \ - {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \ - {"INGRESS_PKT_SYS_HDR_NONE", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \ - {"rxpmd_match_id_count", BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_COUNT} - -#endif /*! BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_34_3_0/bcm56880_a0_nfa_6_5_34_3_0_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_34_3_0/bcm56880_a0_nfa_6_5_34_3_0_bcmpkt_flexhdr.h deleted file mode 100644 index 2d30e5180bc..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_34_3_0/bcm56880_a0_nfa_6_5_34_3_0_bcmpkt_flexhdr.h +++ /dev/null @@ -1,161 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) header.yml. - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - -#ifndef BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_FLEXHDR_H -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_FLEXHDR_H - -#include - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ARP_T 0 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_AUTHEN_T 1 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_BFD_T 2 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_CPU_COMPOSITES_0_T 3 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_CPU_COMPOSITES_1_T 4 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_DEST_OPTION_T 5 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T 6 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T 7 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ESP_T 8 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ETAG_T 9 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ETHERTYPE_T 10 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_FRAG_T 11 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GENERIC_LOOPBACK_T 12 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GPE_T 13 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GRE_CHKSUM_T 14 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GRE_KEY_T 15 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GRE_ROUT_T 16 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GRE_SEQ_T 17 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GRE_T 18 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GTP_12BYTE_T 19 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GTP_8BYTE_T 20 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GTP_EXT_4BYTE_T 21 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GTP_WITH_EXT_T 22 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_HOP_BY_HOP_T 23 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ICMP_T 24 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IGMP_T 25 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IPFIX_T 26 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IPV4_T 27 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IPV6_T 28 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_L2_T 29 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_MIRROR_ERSPAN_SN_T 30 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_MIRROR_TRANSPORT_T 31 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_MPLS_ACH_T 32 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_MPLS_BV_T 33 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_MPLS_CW_T 34 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_MPLS_T 35 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_OPAQUETAG_T 36 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_P_1588_T 37 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PROG_EXT_HDR_T 38 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PSAMP_0_T 39 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PSAMP_1_T 40 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T 41 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T 42 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RARP_T 43 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ROUTING_T 44 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RSPAN_T 45 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_SFLOW_SHIM_0_T 46 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_SFLOW_SHIM_1_T 47 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_SFLOW_SHIM_2_T 48 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_SNAP_LLC_T 49 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_TCP_FIRST_4BYTES_T 50 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_TCP_LAST_16BYTES_T 51 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_UDP_T 52 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_UNKNOWN_L3_T 53 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_UNKNOWN_L4_T 54 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_UNKNOWN_L5_T 55 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_VLAN_T 56 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_VNTAG_T 57 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_VXLAN_T 58 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_WESP_T 59 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_T 60 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_FLEXHDR_COUNT 61 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_FLEXHDR_NAME_MAP_INIT \ - {"arp_t", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ARP_T},\ - {"authen_t", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_AUTHEN_T},\ - {"bfd_t", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_BFD_T},\ - {"cpu_composites_0_t", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_CPU_COMPOSITES_0_T},\ - {"cpu_composites_1_t", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_CPU_COMPOSITES_1_T},\ - {"dest_option_t", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_DEST_OPTION_T},\ - {"erspan3_fixed_hdr_t", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T},\ - {"erspan3_subhdr_5_t", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T},\ - {"esp_t", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ESP_T},\ - {"etag_t", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ETAG_T},\ - {"ethertype_t", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ETHERTYPE_T},\ - {"frag_t", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_FRAG_T},\ - {"generic_loopback_t", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GENERIC_LOOPBACK_T},\ - {"gpe_t", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GPE_T},\ - {"gre_chksum_t", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GRE_CHKSUM_T},\ - {"gre_key_t", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GRE_KEY_T},\ - {"gre_rout_t", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GRE_ROUT_T},\ - {"gre_seq_t", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GRE_SEQ_T},\ - {"gre_t", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GRE_T},\ - {"gtp_12byte_t", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GTP_12BYTE_T},\ - {"gtp_8byte_t", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GTP_8BYTE_T},\ - {"gtp_ext_4byte_t", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GTP_EXT_4BYTE_T},\ - {"gtp_with_ext_t", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GTP_WITH_EXT_T},\ - {"hop_by_hop_t", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_HOP_BY_HOP_T},\ - {"icmp_t", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ICMP_T},\ - {"igmp_t", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IGMP_T},\ - {"ipfix_t", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IPFIX_T},\ - {"ipv4_t", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IPV4_T},\ - {"ipv6_t", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IPV6_T},\ - {"l2_t", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_L2_T},\ - {"mirror_erspan_sn_t", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_MIRROR_ERSPAN_SN_T},\ - {"mirror_transport_t", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_MIRROR_TRANSPORT_T},\ - {"mpls_ach_t", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_MPLS_ACH_T},\ - {"mpls_bv_t", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_MPLS_BV_T},\ - {"mpls_cw_t", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_MPLS_CW_T},\ - {"mpls_t", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_MPLS_T},\ - {"opaquetag_t", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_OPAQUETAG_T},\ - {"p_1588_t", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_P_1588_T},\ - {"prog_ext_hdr_t", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PROG_EXT_HDR_T},\ - {"psamp_0_t", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PSAMP_0_T},\ - {"psamp_1_t", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PSAMP_1_T},\ - {"psamp_mirror_on_drop_0_t", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\ - {"psamp_mirror_on_drop_1_t", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T},\ - {"rarp_t", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RARP_T},\ - {"routing_t", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ROUTING_T},\ - {"rspan_t", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RSPAN_T},\ - {"sflow_shim_0_t", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_SFLOW_SHIM_0_T},\ - {"sflow_shim_1_t", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_SFLOW_SHIM_1_T},\ - {"sflow_shim_2_t", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_SFLOW_SHIM_2_T},\ - {"snap_llc_t", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_SNAP_LLC_T},\ - {"tcp_first_4bytes_t", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_TCP_FIRST_4BYTES_T},\ - {"tcp_last_16bytes_t", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_TCP_LAST_16BYTES_T},\ - {"udp_t", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_UDP_T},\ - {"unknown_l3_t", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_UNKNOWN_L3_T},\ - {"unknown_l4_t", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_UNKNOWN_L4_T},\ - {"unknown_l5_t", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_UNKNOWN_L5_T},\ - {"vlan_t", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_VLAN_T},\ - {"vntag_t", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_VNTAG_T},\ - {"vxlan_t", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_VXLAN_T},\ - {"wesp_t", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_WESP_T},\ - {"RXPMD_FLEX_T", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_T},\ - {"flexhdr count", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_FLEXHDR_COUNT} - -#endif /* BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_FLEXHDR_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_34_3_0/bcm56880_a0_nfa_6_5_34_3_0_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_34_3_0/bcm56880_a0_nfa_6_5_34_3_0_bcmpkt_flexhdr_data.h deleted file mode 100644 index ff943906bd3..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_34_3_0/bcm56880_a0_nfa_6_5_34_3_0_bcmpkt_flexhdr_data.h +++ /dev/null @@ -1,1151 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) header.yml. - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - -#ifndef BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_FLEXHDR_DATA_H -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_FLEXHDR_DATA_H - -/*! - * \name ARP_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ARP_T_HARDWARE_LEN 0 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ARP_T_HARDWARE_TYPE 1 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ARP_T_OPERATION 2 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ARP_T_PROT_ADDR_LEN 3 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ARP_T_PROTOCOL_TYPE 4 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ARP_T_SENDER_HA 5 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ARP_T_SENDER_IP 6 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ARP_T_TARGET_HA 7 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ARP_T_TARGET_IP 8 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ARP_T_FID_COUNT 9 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \ - {"HARDWARE_LEN", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ARP_T_HARDWARE_LEN},\ - {"HARDWARE_TYPE", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ARP_T_HARDWARE_TYPE},\ - {"OPERATION", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ARP_T_OPERATION},\ - {"PROT_ADDR_LEN", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ARP_T_PROT_ADDR_LEN},\ - {"PROTOCOL_TYPE", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ARP_T_PROTOCOL_TYPE},\ - {"SENDER_HA", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ARP_T_SENDER_HA},\ - {"SENDER_IP", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ARP_T_SENDER_IP},\ - {"TARGET_HA", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ARP_T_TARGET_HA},\ - {"TARGET_IP", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ARP_T_TARGET_IP},\ - {"arp_t fid count", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ARP_T_FID_COUNT} - -/*! - * \name AUTHEN_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_AUTHEN_T_DATA 0 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_AUTHEN_T_NEXT_HEADER 1 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN 2 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_AUTHEN_T_RESERVED 3 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_AUTHEN_T_SEQ_NUM 4 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_AUTHEN_T_SPI 5 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_AUTHEN_T_FID_COUNT 6 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT \ - {"DATA", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_AUTHEN_T_DATA},\ - {"NEXT_HEADER", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_AUTHEN_T_NEXT_HEADER},\ - {"PAYLOAD_LEN", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN},\ - {"RESERVED", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_AUTHEN_T_RESERVED},\ - {"SEQ_NUM", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_AUTHEN_T_SEQ_NUM},\ - {"SPI", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_AUTHEN_T_SPI},\ - {"authen_t fid count", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_AUTHEN_T_FID_COUNT} - -/*! - * \name BFD_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_BFD_T_AP 0 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_BFD_T_BFD_LENGTH 1 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_BFD_T_CPI 2 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_BFD_T_DEM 3 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_BFD_T_DESMINTXINTV 4 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_BFD_T_DETECTMULT 5 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_BFD_T_DIAG 6 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_BFD_T_FIN 7 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_BFD_T_MINECHORXINTV 8 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_BFD_T_MPT 9 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_BFD_T_MYDISCRIM 10 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_BFD_T_POLL 11 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_BFD_T_REQMINRXINTV 12 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_BFD_T_STA 13 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_BFD_T_URDISCRIM 14 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_BFD_T_VERSION 15 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_BFD_T_FID_COUNT 16 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT \ - {"AP", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_BFD_T_AP},\ - {"BFD_LENGTH", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_BFD_T_BFD_LENGTH},\ - {"CPI", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_BFD_T_CPI},\ - {"DEM", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_BFD_T_DEM},\ - {"DESMINTXINTV", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_BFD_T_DESMINTXINTV},\ - {"DETECTMULT", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_BFD_T_DETECTMULT},\ - {"DIAG", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_BFD_T_DIAG},\ - {"FIN", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_BFD_T_FIN},\ - {"MINECHORXINTV", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_BFD_T_MINECHORXINTV},\ - {"MPT", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_BFD_T_MPT},\ - {"MYDISCRIM", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_BFD_T_MYDISCRIM},\ - {"POLL", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_BFD_T_POLL},\ - {"REQMINRXINTV", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_BFD_T_REQMINRXINTV},\ - {"STA", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_BFD_T_STA},\ - {"URDISCRIM", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_BFD_T_URDISCRIM},\ - {"VERSION", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_BFD_T_VERSION},\ - {"bfd_t fid count", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_BFD_T_FID_COUNT} - -/*! - * \name CPU_COMPOSITES_0_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT 7 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \ - {"DMA_CONT0", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\ - {"DMA_CONT1", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\ - {"DMA_CONT2", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\ - {"DMA_CONT3", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\ - {"DMA_CONT4", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\ - {"DMA_CONT5", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\ - {"DMA_CONT6", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\ - {"cpu_composites_0_t fid count", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT} - -/*! - * \name CPU_COMPOSITES_1_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7 8 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8 9 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9 10 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT 11 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \ - {"DMA_CONT10", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\ - {"DMA_CONT11", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\ - {"DMA_CONT12", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\ - {"DMA_CONT13", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\ - {"DMA_CONT14", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\ - {"DMA_CONT15", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\ - {"DMA_CONT16", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\ - {"DMA_CONT17", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\ - {"DMA_CONT7", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\ - {"DMA_CONT8", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\ - {"DMA_CONT9", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\ - {"cpu_composites_1_t fid count", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT} - -/*! - * \name DEST_OPTION_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN 0 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER 1 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_DEST_OPTION_T_OPTION 2 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_DEST_OPTION_T_FID_COUNT 3 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT \ - {"HDR_EXT_LEN", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN},\ - {"NEXT_HEADER", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER},\ - {"OPTION", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_DEST_OPTION_T_OPTION},\ - {"dest_option_t fid count", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_DEST_OPTION_T_FID_COUNT} - -/*! - * \name ERSPAN3_FIXED_HDR_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO 0 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS 1 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID 2 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID 4 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T 5 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP 6 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER 7 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN 8 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT 9 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \ - {"BSO", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\ - {"COS", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\ - {"GBP_SID", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\ - {"P_FT_HWID_D_GRA_O", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\ - {"SESSION_ID", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\ - {"T", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\ - {"TIMESTAMP", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\ - {"VER", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\ - {"VLAN", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\ - {"erspan3_fixed_hdr_t fid count", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT} - -/*! - * \name ERSPAN3_SUBHDR_5_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID 1 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID 2 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP 3 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT 4 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \ - {"PLATFORM_ID", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\ - {"PORT_ID", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\ - {"SWITCH_ID", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\ - {"TIMESTAMP", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\ - {"erspan3_subhdr_5_t fid count", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT} - -/*! - * \name ESP_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ESP_T_NEXT_HEADER 0 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ESP_T_PAD 1 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ESP_T_PAD_LEN 2 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ESP_T_SEQ_NUM 3 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ESP_T_SPI 4 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ESP_T_FID_COUNT 5 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT \ - {"NEXT_HEADER", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ESP_T_NEXT_HEADER},\ - {"PAD", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ESP_T_PAD},\ - {"PAD_LEN", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ESP_T_PAD_LEN},\ - {"SEQ_NUM", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ESP_T_SEQ_NUM},\ - {"SPI", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ESP_T_SPI},\ - {"esp_t fid count", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ESP_T_FID_COUNT} - -/*! - * \name ETAG_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ETAG_T_PCP_DEI 0 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ETAG_T_RSRVD0 1 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ETAG_T_RSRVD1 2 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ETAG_T_SVID 3 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ETAG_T_TPID 4 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ETAG_T_VID 5 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ETAG_T_FID_COUNT 6 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT \ - {"PCP_DEI", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ETAG_T_PCP_DEI},\ - {"RSRVD0", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ETAG_T_RSRVD0},\ - {"RSRVD1", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ETAG_T_RSRVD1},\ - {"SVID", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ETAG_T_SVID},\ - {"TPID", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ETAG_T_TPID},\ - {"VID", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ETAG_T_VID},\ - {"etag_t fid count", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ETAG_T_FID_COUNT} - -/*! - * \name ETHERTYPE_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ETHERTYPE_T_TYPE 0 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT 1 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \ - {"TYPE", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ETHERTYPE_T_TYPE},\ - {"ethertype_t fid count", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT} - -/*! - * \name FRAG_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_FRAG_T_FRAG_INFO 0 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_FRAG_T_ID 1 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_FRAG_T_NEXT_HEADER 2 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_FRAG_T_RESERVED 3 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_FRAG_T_FID_COUNT 4 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT \ - {"FRAG_INFO", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_FRAG_T_FRAG_INFO},\ - {"ID", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_FRAG_T_ID},\ - {"NEXT_HEADER", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_FRAG_T_NEXT_HEADER},\ - {"RESERVED", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_FRAG_T_RESERVED},\ - {"frag_t fid count", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_FRAG_T_FID_COUNT} - -/*! - * \name GENERIC_LOOPBACK_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ 0 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE 1 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ 2 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS 3 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE 4 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY 5 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL 6 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ 7 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0 8 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1 9 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ 10 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1 11 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2 12 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 13 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE 14 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT 15 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \ - {"DESTINATION_OBJ", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\ - {"DESTINATION_TYPE", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\ - {"ENTROPY_OBJ", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\ - {"FLAGS", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\ - {"HEADER_TYPE", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\ - {"INPUT_PRIORITY", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\ - {"INTERFACE_CTRL", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\ - {"INTERFACE_OBJ", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\ - {"PROCESSING_CTRL_0", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\ - {"PROCESSING_CTRL_1", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\ - {"QOS_OBJ", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\ - {"RESERVED_1", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\ - {"RESERVED_2", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2},\ - {"SOURCE_SYSTEM_PORT", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\ - {"START_BYTE", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\ - {"generic_loopback_t fid count", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT} - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP 0 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF 1 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED 2 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP 3 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP 4 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP 5 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP 6 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP 7 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1 8 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__TUNNEL 0 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__GENERIC 1 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__NOOP 0 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__VFI 1 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__L3_IIF 2 - -/*! - * \name GPE_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GPE_T_FLAGS 0 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GPE_T_NEXT_PROTOCOL 1 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GPE_T_RESERVED0 2 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GPE_T_RESERVED1 3 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GPE_T_VNI 4 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GPE_T_FID_COUNT 5 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT \ - {"FLAGS", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GPE_T_FLAGS},\ - {"NEXT_PROTOCOL", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GPE_T_NEXT_PROTOCOL},\ - {"RESERVED0", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GPE_T_RESERVED0},\ - {"RESERVED1", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GPE_T_RESERVED1},\ - {"VNI", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GPE_T_VNI},\ - {"gpe_t fid count", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GPE_T_FID_COUNT} - -/*! - * \name GRE_CHKSUM_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM 0 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GRE_CHKSUM_T_OFFSET 1 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT 2 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT \ - {"CHECKSUM", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM},\ - {"OFFSET", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GRE_CHKSUM_T_OFFSET},\ - {"gre_chksum_t fid count", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT} - -/*! - * \name GRE_KEY_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GRE_KEY_T_VN_ID_LOWER_ENTROPY 0 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GRE_KEY_T_VN_ID_UPPER 1 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GRE_KEY_T_FID_COUNT 2 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT \ - {"VN_ID_LOWER_ENTROPY", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GRE_KEY_T_VN_ID_LOWER_ENTROPY},\ - {"VN_ID_UPPER", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GRE_KEY_T_VN_ID_UPPER},\ - {"gre_key_t fid count", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GRE_KEY_T_FID_COUNT} - -/*! - * \name GRE_ROUT_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GRE_ROUT_T_ROUTING 0 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GRE_ROUT_T_FID_COUNT 1 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT \ - {"ROUTING", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GRE_ROUT_T_ROUTING},\ - {"gre_rout_t fid count", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GRE_ROUT_T_FID_COUNT} - -/*! - * \name GRE_SEQ_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GRE_SEQ_T_SEQUENCE 0 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GRE_SEQ_T_FID_COUNT 1 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT \ - {"SEQUENCE", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GRE_SEQ_T_SEQUENCE},\ - {"gre_seq_t fid count", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GRE_SEQ_T_FID_COUNT} - -/*! - * \name GRE_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GRE_T_C_R_K_S 0 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GRE_T_PROTOCOL 1 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GRE_T_RESERVED 2 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GRE_T_VERSION 3 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GRE_T_FID_COUNT 4 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT \ - {"C_R_K_S", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GRE_T_C_R_K_S},\ - {"PROTOCOL", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GRE_T_PROTOCOL},\ - {"RESERVED", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GRE_T_RESERVED},\ - {"VERSION", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GRE_T_VERSION},\ - {"gre_t fid count", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GRE_T_FID_COUNT} - -/*! - * \name GTP_12BYTE_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GTP_12BYTE_T_BYTES_11_8 0 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GTP_12BYTE_T_BYTES_3_0 1 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GTP_12BYTE_T_BYTES_7_4 2 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GTP_12BYTE_T_FID_COUNT 3 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GTP_12BYTE_T_FIELD_NAME_MAP_INIT \ - {"BYTES_11_8", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GTP_12BYTE_T_BYTES_11_8},\ - {"BYTES_3_0", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GTP_12BYTE_T_BYTES_3_0},\ - {"BYTES_7_4", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GTP_12BYTE_T_BYTES_7_4},\ - {"gtp_12byte_t fid count", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GTP_12BYTE_T_FID_COUNT} - -/*! - * \name GTP_8BYTE_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GTP_8BYTE_T_BYTES_3_0 0 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GTP_8BYTE_T_BYTES_7_4 1 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GTP_8BYTE_T_FID_COUNT 2 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GTP_8BYTE_T_FIELD_NAME_MAP_INIT \ - {"BYTES_3_0", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GTP_8BYTE_T_BYTES_3_0},\ - {"BYTES_7_4", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GTP_8BYTE_T_BYTES_7_4},\ - {"gtp_8byte_t fid count", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GTP_8BYTE_T_FID_COUNT} - -/*! - * \name GTP_EXT_4BYTE_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GTP_EXT_4BYTE_T_EXT_HDR 0 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GTP_EXT_4BYTE_T_FID_COUNT 1 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GTP_EXT_4BYTE_T_FIELD_NAME_MAP_INIT \ - {"EXT_HDR", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GTP_EXT_4BYTE_T_EXT_HDR},\ - {"gtp_ext_4byte_t fid count", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GTP_EXT_4BYTE_T_FID_COUNT} - -/*! - * \name GTP_WITH_EXT_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GTP_WITH_EXT_T_BYTES_11_8 0 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GTP_WITH_EXT_T_BYTES_3_0 1 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GTP_WITH_EXT_T_BYTES_7_4 2 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GTP_WITH_EXT_T_FID_COUNT 3 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GTP_WITH_EXT_T_FIELD_NAME_MAP_INIT \ - {"BYTES_11_8", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GTP_WITH_EXT_T_BYTES_11_8},\ - {"BYTES_3_0", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GTP_WITH_EXT_T_BYTES_3_0},\ - {"BYTES_7_4", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GTP_WITH_EXT_T_BYTES_7_4},\ - {"gtp_with_ext_t fid count", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GTP_WITH_EXT_T_FID_COUNT} - -/*! - * \name HOP_BY_HOP_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN 0 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER 1 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_HOP_BY_HOP_T_OPTION 2 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT 3 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT \ - {"HDR_EXT_LEN", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN},\ - {"NEXT_HEADER", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER},\ - {"OPTION", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_HOP_BY_HOP_T_OPTION},\ - {"hop_by_hop_t fid count", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT} - -/*! - * \name ICMP_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ICMP_T_CHECKSUM 0 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ICMP_T_CODE 1 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ICMP_T_ICMP_TYPE 2 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ICMP_T_FID_COUNT 3 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \ - {"CHECKSUM", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ICMP_T_CHECKSUM},\ - {"CODE", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ICMP_T_CODE},\ - {"ICMP_TYPE", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ICMP_T_ICMP_TYPE},\ - {"icmp_t fid count", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ICMP_T_FID_COUNT} - -/*! - * \name IGMP_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IGMP_T_CHECKSUM 0 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IGMP_T_GROUP_ADDRESS 1 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IGMP_T_IGMP_TYPE 2 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IGMP_T_MAX_RESP_TIME 3 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IGMP_T_FID_COUNT 4 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT \ - {"CHECKSUM", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IGMP_T_CHECKSUM},\ - {"GROUP_ADDRESS", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IGMP_T_GROUP_ADDRESS},\ - {"IGMP_TYPE", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IGMP_T_IGMP_TYPE},\ - {"MAX_RESP_TIME", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IGMP_T_MAX_RESP_TIME},\ - {"igmp_t fid count", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IGMP_T_FID_COUNT} - -/*! - * \name IPFIX_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IPFIX_T_EXPORT_TIME 0 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IPFIX_T_LENGTH 1 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IPFIX_T_SEQUENCE_NUM 3 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IPFIX_T_VERSION 4 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IPFIX_T_FID_COUNT 5 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \ - {"EXPORT_TIME", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IPFIX_T_EXPORT_TIME},\ - {"LENGTH", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IPFIX_T_LENGTH},\ - {"OBS_DOMAIN_ID", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\ - {"SEQUENCE_NUM", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IPFIX_T_SEQUENCE_NUM},\ - {"VERSION", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IPFIX_T_VERSION},\ - {"ipfix_t fid count", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IPFIX_T_FID_COUNT} - -/*! - * \name IPV4_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IPV4_T_DA 0 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IPV4_T_HDR_CHECKSUM 2 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IPV4_T_ID 3 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IPV4_T_OPTION 4 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IPV4_T_PROTOCOL 5 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IPV4_T_SA 6 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IPV4_T_TOS 7 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IPV4_T_TOTAL_LENGTH 8 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IPV4_T_TTL 9 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IPV4_T_VERSION_HDR_LEN 10 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IPV4_T_FID_COUNT 11 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \ - {"DA", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IPV4_T_DA},\ - {"FLAGS_FRAG_OFFSET", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\ - {"HDR_CHECKSUM", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IPV4_T_HDR_CHECKSUM},\ - {"ID", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IPV4_T_ID},\ - {"OPTION", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IPV4_T_OPTION},\ - {"PROTOCOL", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IPV4_T_PROTOCOL},\ - {"SA", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IPV4_T_SA},\ - {"TOS", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IPV4_T_TOS},\ - {"TOTAL_LENGTH", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IPV4_T_TOTAL_LENGTH},\ - {"TTL", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IPV4_T_TTL},\ - {"VERSION_HDR_LEN", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IPV4_T_VERSION_HDR_LEN},\ - {"ipv4_t fid count", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IPV4_T_FID_COUNT} - -/*! - * \name IPV6_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IPV6_T_DA 0 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IPV6_T_FLOW_LABEL 1 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IPV6_T_HOP_LIMIT 2 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IPV6_T_NEXT_HEADER 3 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IPV6_T_SA 5 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IPV6_T_TRAFFIC_CLASS 6 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IPV6_T_VERSION 7 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IPV6_T_FID_COUNT 8 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \ - {"DA", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IPV6_T_DA},\ - {"FLOW_LABEL", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IPV6_T_FLOW_LABEL},\ - {"HOP_LIMIT", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IPV6_T_HOP_LIMIT},\ - {"NEXT_HEADER", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IPV6_T_NEXT_HEADER},\ - {"PAYLOAD_LENGTH", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\ - {"SA", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IPV6_T_SA},\ - {"TRAFFIC_CLASS", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IPV6_T_TRAFFIC_CLASS},\ - {"VERSION", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IPV6_T_VERSION},\ - {"ipv6_t fid count", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IPV6_T_FID_COUNT} - -/*! - * \name L2_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_L2_T_MACDA 0 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_L2_T_MACSA 1 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_L2_T_FID_COUNT 2 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \ - {"MACDA", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_L2_T_MACDA},\ - {"MACSA", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_L2_T_MACSA},\ - {"l2_t fid count", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_L2_T_FID_COUNT} - -/*! - * \name MIRROR_ERSPAN_SN_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT 1 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \ - {"SEQ_NUM", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\ - {"mirror_erspan_sn_t fid count", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT} - -/*! - * \name MIRROR_TRANSPORT_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_MIRROR_TRANSPORT_T_DATA 0 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT 1 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \ - {"DATA", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_MIRROR_TRANSPORT_T_DATA},\ - {"mirror_transport_t fid count", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT} - -/*! - * \name MPLS_ACH_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE 0 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_MPLS_ACH_T_CW_TYPE 1 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_MPLS_ACH_T_RESERVED 2 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_MPLS_ACH_T_VERSION 3 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_MPLS_ACH_T_FID_COUNT 4 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT \ - {"CHANNEL_TYPE", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE},\ - {"CW_TYPE", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_MPLS_ACH_T_CW_TYPE},\ - {"RESERVED", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_MPLS_ACH_T_RESERVED},\ - {"VERSION", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_MPLS_ACH_T_VERSION},\ - {"mpls_ach_t fid count", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_MPLS_ACH_T_FID_COUNT} - -/*! - * \name MPLS_BV_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_MPLS_BV_T_VALUE 0 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_MPLS_BV_T_FID_COUNT 1 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT \ - {"VALUE", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_MPLS_BV_T_VALUE},\ - {"mpls_bv_t fid count", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_MPLS_BV_T_FID_COUNT} - -/*! - * \name MPLS_CW_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_MPLS_CW_T_CW_TYPE 0 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_MPLS_CW_T_RESERVED 1 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER 2 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_MPLS_CW_T_FID_COUNT 3 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT \ - {"CW_TYPE", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_MPLS_CW_T_CW_TYPE},\ - {"RESERVED", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_MPLS_CW_T_RESERVED},\ - {"SEQ_NUMBER", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER},\ - {"mpls_cw_t fid count", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_MPLS_CW_T_FID_COUNT} - -/*! - * \name MPLS_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_MPLS_T_BOS 0 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_MPLS_T_EXP 1 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_MPLS_T_LABEL 2 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_MPLS_T_TTL 3 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_MPLS_T_FID_COUNT 4 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT \ - {"BOS", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_MPLS_T_BOS},\ - {"EXP", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_MPLS_T_EXP},\ - {"LABEL", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_MPLS_T_LABEL},\ - {"TTL", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_MPLS_T_TTL},\ - {"mpls_t fid count", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_MPLS_T_FID_COUNT} - -/*! - * \name OPAQUETAG_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_OPAQUETAG_T_TPID 0 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_OPAQUETAG_T_VLAN_TAG 1 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_OPAQUETAG_T_FID_COUNT 2 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_OPAQUETAG_T_FIELD_NAME_MAP_INIT \ - {"TPID", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_OPAQUETAG_T_TPID},\ - {"VLAN_TAG", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_OPAQUETAG_T_VLAN_TAG},\ - {"opaquetag_t fid count", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_OPAQUETAG_T_FID_COUNT} - -/*! - * \name P_1588_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_P_1588_T_CNTRL 0 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_P_1588_T_CORRECTION 1 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_P_1588_T_DOMAIN_NB 2 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_P_1588_T_FLAGS 3 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_P_1588_T_LOGMSGINTERVAL 4 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_P_1588_T_MSG_LENGTH 5 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_P_1588_T_MSG_TYPE 6 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_P_1588_T_RESERVED1 7 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_P_1588_T_RESERVED2 8 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_P_1588_T_RESERVED3 9 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_P_1588_T_SEQ_ID 10 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_P_1588_T_SRCPORTID 11 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_P_1588_T_TRANSPORTSPEC 12 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_P_1588_T_VERSION 13 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_P_1588_T_FID_COUNT 14 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT \ - {"CNTRL", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_P_1588_T_CNTRL},\ - {"CORRECTION", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_P_1588_T_CORRECTION},\ - {"DOMAIN_NB", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_P_1588_T_DOMAIN_NB},\ - {"FLAGS", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_P_1588_T_FLAGS},\ - {"LOGMSGINTERVAL", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_P_1588_T_LOGMSGINTERVAL},\ - {"MSG_LENGTH", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_P_1588_T_MSG_LENGTH},\ - {"MSG_TYPE", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_P_1588_T_MSG_TYPE},\ - {"RESERVED1", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_P_1588_T_RESERVED1},\ - {"RESERVED2", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_P_1588_T_RESERVED2},\ - {"RESERVED3", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_P_1588_T_RESERVED3},\ - {"SEQ_ID", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_P_1588_T_SEQ_ID},\ - {"SRCPORTID", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_P_1588_T_SRCPORTID},\ - {"TRANSPORTSPEC", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_P_1588_T_TRANSPORTSPEC},\ - {"VERSION", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_P_1588_T_VERSION},\ - {"p_1588_t fid count", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_P_1588_T_FID_COUNT} - -/*! - * \name PROG_EXT_HDR_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN 0 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER 1 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PROG_EXT_HDR_T_OPTION 2 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT 3 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT \ - {"HDR_EXT_LEN", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN},\ - {"NEXT_HEADER", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER},\ - {"OPTION", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PROG_EXT_HDR_T_OPTION},\ - {"prog_ext_hdr_t fid count", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT} - -/*! - * \name PSAMP_0_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PSAMP_0_T_FLOWSET 0 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PSAMP_0_T_LENGTH 1 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX 2 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS 3 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PSAMP_0_T_OBS_TIME_S 4 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID 5 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PSAMP_0_T_FID_COUNT 6 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT \ - {"FLOWSET", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PSAMP_0_T_FLOWSET},\ - {"LENGTH", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PSAMP_0_T_LENGTH},\ - {"NEXT_HOP_INDEX", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX},\ - {"OBS_TIME_NS", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS},\ - {"OBS_TIME_S", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PSAMP_0_T_OBS_TIME_S},\ - {"TEMPLATE_ID", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID},\ - {"psamp_0_t fid count", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PSAMP_0_T_FID_COUNT} - -/*! - * \name PSAMP_1_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PSAMP_1_T_DLB_ID 0 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PSAMP_1_T_EGRESS_PORT 1 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PSAMP_1_T_EPOCH 2 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PSAMP_1_T_INGRESS_PORT 3 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH 4 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PSAMP_1_T_USER_META_DATA 5 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG 6 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PSAMP_1_T_FID_COUNT 7 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT \ - {"DLB_ID", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PSAMP_1_T_DLB_ID},\ - {"EGRESS_PORT", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PSAMP_1_T_EGRESS_PORT},\ - {"EPOCH", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PSAMP_1_T_EPOCH},\ - {"INGRESS_PORT", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PSAMP_1_T_INGRESS_PORT},\ - {"SAMPLED_LENGTH", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH},\ - {"USER_META_DATA", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PSAMP_1_T_USER_META_DATA},\ - {"VARIABLE_FLAG", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG},\ - {"psamp_1_t fid count", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PSAMP_1_T_FID_COUNT} - -/*! - * \name PSAMP_MIRROR_ON_DROP_0_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT 1 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH 2 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS 3 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S 4 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID 5 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID 6 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT 7 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \ - {"EGRESS_MOD_PORT", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\ - {"INGRESS_PORT", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\ - {"LENGTH", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\ - {"OBS_TIME_NS", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\ - {"OBS_TIME_S", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\ - {"SWITCH_ID", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\ - {"TEMPLATE_ID", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\ - {"psamp_mirror_on_drop_0_t fid count", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT} - -/*! - * \name PSAMP_MIRROR_ON_DROP_1_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_ING_DROP_REASON 0 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MIRROR_ON_DROP_OBJ 1 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MMU_DROP_CTRL 2 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_SAMPLED_LENGTH 3 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_USER_META_DATA 4 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_VAR_LEN_INDICATOR 5 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT 6 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FIELD_NAME_MAP_INIT \ - {"ING_DROP_REASON", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_ING_DROP_REASON},\ - {"MIRROR_ON_DROP_OBJ", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MIRROR_ON_DROP_OBJ},\ - {"MMU_DROP_CTRL", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_MMU_DROP_CTRL},\ - {"SAMPLED_LENGTH", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_SAMPLED_LENGTH},\ - {"USER_META_DATA", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_USER_META_DATA},\ - {"VAR_LEN_INDICATOR", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_VAR_LEN_INDICATOR},\ - {"psamp_mirror_on_drop_1_t fid count", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT} - -/*! - * \name RARP_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RARP_T_HARDWARE_LEN 0 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RARP_T_HARDWARE_TYPE 1 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RARP_T_OPERATION 2 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RARP_T_PROT_ADDR_LEN 3 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RARP_T_PROTOCOL_TYPE 4 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RARP_T_SENDER_HA 5 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RARP_T_SENDER_IP 6 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RARP_T_TARGET_HA 7 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RARP_T_TARGET_IP 8 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RARP_T_FID_COUNT 9 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \ - {"HARDWARE_LEN", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RARP_T_HARDWARE_LEN},\ - {"HARDWARE_TYPE", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RARP_T_HARDWARE_TYPE},\ - {"OPERATION", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RARP_T_OPERATION},\ - {"PROT_ADDR_LEN", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RARP_T_PROT_ADDR_LEN},\ - {"PROTOCOL_TYPE", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RARP_T_PROTOCOL_TYPE},\ - {"SENDER_HA", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RARP_T_SENDER_HA},\ - {"SENDER_IP", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RARP_T_SENDER_IP},\ - {"TARGET_HA", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RARP_T_TARGET_HA},\ - {"TARGET_IP", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RARP_T_TARGET_IP},\ - {"rarp_t fid count", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RARP_T_FID_COUNT} - -/*! - * \name ROUTING_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ROUTING_T_DATA 0 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ROUTING_T_HDR_EXT_LEN 1 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ROUTING_T_NEXT_HEADER 2 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ROUTING_T_ROUTING_TYPE 3 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT 4 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ROUTING_T_FID_COUNT 5 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT \ - {"DATA", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ROUTING_T_DATA},\ - {"HDR_EXT_LEN", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ROUTING_T_HDR_EXT_LEN},\ - {"NEXT_HEADER", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ROUTING_T_NEXT_HEADER},\ - {"ROUTING_TYPE", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ROUTING_T_ROUTING_TYPE},\ - {"SEGMENTS_LEFT", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT},\ - {"routing_t fid count", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ROUTING_T_FID_COUNT} - -/*! - * \name RSPAN_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RSPAN_T_TAG 0 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RSPAN_T_TPID 1 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RSPAN_T_FID_COUNT 2 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT \ - {"TAG", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RSPAN_T_TAG},\ - {"TPID", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RSPAN_T_TPID},\ - {"rspan_t fid count", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RSPAN_T_FID_COUNT} - -/*! - * \name SFLOW_SHIM_0_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION 0 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE 1 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_SFLOW_SHIM_0_T_VERSION 2 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT 3 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT \ - {"SYS_DESTINATION", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION},\ - {"SYS_SOURCE", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE},\ - {"VERSION", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_SFLOW_SHIM_0_T_VERSION},\ - {"sflow_shim_0_t fid count", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT} - -/*! - * \name SFLOW_SHIM_1_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE 0 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED 1 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE 2 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST 3 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE 4 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED 5 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED 6 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE 7 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT 8 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT \ - {"FLAG_DEST_SAMPLE", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE},\ - {"FLAG_DISCARDED", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED},\ - {"FLAG_FLEX_SAMPLE", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE},\ - {"FLAG_MCAST", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST},\ - {"FLAG_SRC_SAMPLE", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE},\ - {"FLAG_TRUNCATED", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED},\ - {"RESERVED", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED},\ - {"SYS_OPCODE", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE},\ - {"sflow_shim_1_t fid count", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT} - -/*! - * \name SFLOW_SHIM_2_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM 0 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA 1 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT 2 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT \ - {"SEQUENCE_NUM", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM},\ - {"USER_META_DATA", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA},\ - {"sflow_shim_2_t fid count", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT} - -/*! - * \name SNAP_LLC_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_SNAP_LLC_T_LENGTH 0 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_SNAP_LLC_T_SNAP_LLC 1 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_SNAP_LLC_T_FID_COUNT 2 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT \ - {"LENGTH", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_SNAP_LLC_T_LENGTH},\ - {"SNAP_LLC", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_SNAP_LLC_T_SNAP_LLC},\ - {"snap_llc_t fid count", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_SNAP_LLC_T_FID_COUNT} - -/*! - * \name TCP_FIRST_4BYTES_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT 2 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \ - {"DST_PORT", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\ - {"SRC_PORT", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\ - {"tcp_first_4bytes_t fid count", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT} - -/*! - * \name TCP_LAST_16BYTES_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM 0 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM 1 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM 3 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR 4 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE 5 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT 6 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \ - {"ACK_NUM", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\ - {"CHECKSUM", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\ - {"HDR_LEN_AND_FLAGS", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\ - {"SEQ_NUM", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\ - {"URGENT_PTR", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\ - {"WIN_SIZE", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\ - {"tcp_last_16bytes_t fid count", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT} - -/*! - * \name UDP_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_UDP_T_CHECKSUM 0 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_UDP_T_DST_PORT 1 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_UDP_T_SRC_PORT 2 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_UDP_T_UDP_LENGTH 3 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_UDP_T_FID_COUNT 4 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \ - {"CHECKSUM", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_UDP_T_CHECKSUM},\ - {"DST_PORT", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_UDP_T_DST_PORT},\ - {"SRC_PORT", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_UDP_T_SRC_PORT},\ - {"UDP_LENGTH", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_UDP_T_UDP_LENGTH},\ - {"udp_t fid count", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_UDP_T_FID_COUNT} - -/*! - * \name UNKNOWN_L3_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD 1 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT 2 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \ - {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\ - {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\ - {"unknown_l3_t fid count", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT} - -/*! - * \name UNKNOWN_L4_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT 1 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \ - {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\ - {"unknown_l4_t fid count", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT} - -/*! - * \name UNKNOWN_L5_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT 3 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \ - {"L5_BYTES_0_1", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\ - {"L5_BYTES_2_3", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\ - {"L5_BYTES_4_7", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\ - {"unknown_l5_t fid count", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT} - -/*! - * \name VLAN_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_VLAN_T_CFI 0 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_VLAN_T_PCP 1 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_VLAN_T_TPID 2 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_VLAN_T_VID 3 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_VLAN_T_FID_COUNT 4 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \ - {"CFI", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_VLAN_T_CFI},\ - {"PCP", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_VLAN_T_PCP},\ - {"TPID", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_VLAN_T_TPID},\ - {"VID", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_VLAN_T_VID},\ - {"vlan_t fid count", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_VLAN_T_FID_COUNT} - -/*! - * \name VNTAG_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_VNTAG_T_TAG 0 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_VNTAG_T_TPID 1 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_VNTAG_T_FID_COUNT 2 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT \ - {"TAG", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_VNTAG_T_TAG},\ - {"TPID", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_VNTAG_T_TPID},\ - {"vntag_t fid count", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_VNTAG_T_FID_COUNT} - -/*! - * \name VXLAN_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_VXLAN_T_VN_ID_LOWER_RESERVED2 1 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_VXLAN_T_VN_ID_UPPER 2 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_VXLAN_T_FID_COUNT 3 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \ - {"FLAGS_RESERVED_1", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\ - {"VN_ID_LOWER_RESERVED2", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_VXLAN_T_VN_ID_LOWER_RESERVED2},\ - {"VN_ID_UPPER", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_VXLAN_T_VN_ID_UPPER},\ - {"vxlan_t fid count", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_VXLAN_T_FID_COUNT} - -/*! - * \name WESP_T field IDs. - */ -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_WESP_T_FLAGS 0 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_WESP_T_HEADER_LEN 1 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_WESP_T_NEXT_HEADER 2 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_WESP_T_SEQ_NUM 3 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_WESP_T_SPI 4 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_WESP_T_TRAILER_LEN 5 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_WESP_T_WESP_IV 6 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_WESP_T_FID_COUNT 7 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT \ - {"FLAGS", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_WESP_T_FLAGS},\ - {"HEADER_LEN", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_WESP_T_HEADER_LEN},\ - {"NEXT_HEADER", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_WESP_T_NEXT_HEADER},\ - {"SEQ_NUM", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_WESP_T_SEQ_NUM},\ - {"SPI", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_WESP_T_SPI},\ - {"TRAILER_LEN", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_WESP_T_TRAILER_LEN},\ - {"WESP_IV", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_WESP_T_WESP_IV},\ - {"wesp_t fid count", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_WESP_T_FID_COUNT} - - -#endif /* BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_FLEXHDR_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_34_3_0/bcm56880_a0_nfa_6_5_34_3_0_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_34_3_0/bcm56880_a0_nfa_6_5_34_3_0_bcmpkt_rxpmd_flex_data.h deleted file mode 100644 index 31252c071dd..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_34_3_0/bcm56880_a0_nfa_6_5_34_3_0_bcmpkt_rxpmd_flex_data.h +++ /dev/null @@ -1,172 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) map.yml. - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - -#ifndef BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_DATA_H -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_DATA_H - -/*! - * \name RX flex metadata field IDs. - */ -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0 0 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0 1 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_DVP_15_0 2 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0 3 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0 4 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_0 5 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32 6 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0 7 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0 8 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_ING_ETAG_ACTION_3_0 9 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_ING_ETAG_PCP_DEI_3_0 10 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_ING_ETAG_VID_16_15_0 11 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_0 12 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0 13 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 14 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0 15 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0 16 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0 17 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0 18 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0 19 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0 20 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_MPLS_LABEL_DECAP_COUNT_3_0 21 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0 22 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0 23 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0 24 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0 25 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_SVP_15_0 26 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0 27 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0 28 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0 29 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_T_VLAN_TAG_VALUE_15_0 30 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0 31 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0 32 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_VFI_15_0 33 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0 34 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_FID_COUNT 35 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_COUNT 46 - -/*! - * \name Packet Flex Reason Types. - */ -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS 0 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED 1 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED 2 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP 3 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT 4 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP 5 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER 6 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED 7 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT 8 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP 9 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS 10 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE 11 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP 12 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS 13 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR 14 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF 15 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR 16 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL 17 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD 18 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0 19 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1 20 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2 21 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3 22 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4 23 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5 24 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6 25 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7 26 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD 27 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED 28 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED 29 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU 30 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU 31 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_PE_RPF 32 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_PE_VID_FWD_MISS 33 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_PE_VID_RPF_MISS 34 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_PKT_ETAG_EXPECTED 35 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_PKT_ETAG_UNEXPECTED 36 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED 37 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT 38 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT 39 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP 40 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD 41 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_SVP 42 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP 43 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED 44 -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_VFP 45 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \ - {"CML_FLAGS", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\ - {"DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED},\ - {"DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED},\ - {"DST_FP", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP},\ - {"EM_FT", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT},\ - {"IFP", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP},\ - {"IFP_METER", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\ - {"IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED},\ - {"IVXLT", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\ - {"L2_DST_LOOKUP", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\ - {"L2_DST_LOOKUP_MISS", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\ - {"L2_SRC_STATIC_MOVE", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\ - {"L3_DST_LOOKUP", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\ - {"L3_DST_LOOKUP_MISS", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\ - {"L3_HDR_ERROR", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\ - {"L3_IIF_EQ_L3_OIF", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF},\ - {"L3_TTL_ERROR", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\ - {"LEARN_CACHE_FULL", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\ - {"MACSA_MULTICAST_RSVD", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD},\ - {"MATCHED_RULE_BIT_0", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0},\ - {"MATCHED_RULE_BIT_1", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1},\ - {"MATCHED_RULE_BIT_2", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2},\ - {"MATCHED_RULE_BIT_3", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3},\ - {"MATCHED_RULE_BIT_4", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4},\ - {"MATCHED_RULE_BIT_5", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5},\ - {"MATCHED_RULE_BIT_6", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6},\ - {"MATCHED_RULE_BIT_7", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7},\ - {"MEMBERSHIP_CHECK_FAILED_RSVD", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD},\ - {"MIRROR_SAMPLER_EGR_SAMPLED", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED},\ - {"MIRROR_SAMPLER_SAMPLED", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED},\ - {"MPLS_CTRL_PKT_TO_CPU", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU},\ - {"NO_COPY_TO_CPU", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\ - {"PE_RPF", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_PE_RPF},\ - {"PE_VID_FWD_MISS", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_PE_VID_FWD_MISS},\ - {"PE_VID_RPF_MISS", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_PE_VID_RPF_MISS},\ - {"PKT_ETAG_EXPECTED", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_PKT_ETAG_EXPECTED},\ - {"PKT_ETAG_UNEXPECTED", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_PKT_ETAG_UNEXPECTED},\ - {"PKT_INTEGRITY_CHECK_FAILED", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\ - {"PROTOCOL_PKT", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\ - {"RESERVED_TRACE_BIT", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT},\ - {"SER_DROP", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP},\ - {"SPANNING_TREE_CHECK_FAILED_RSVD", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD},\ - {"SVP", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_SVP},\ - {"TRACE_DOP", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\ - {"URPF_CHECK_FAILED", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED},\ - {"VFP", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_VFP},\ - {"flex reason count", BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_COUNT} - -#endif /* BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_34_3_0/bcm56880_a0_nfa_6_5_34_3_0_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_34_3_0/bcm56880_a0_nfa_6_5_34_3_0_bcmpkt_rxpmd_match_id_defs.h deleted file mode 100644 index b78f3f6f52e..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_34_3_0/bcm56880_a0_nfa_6_5_34_3_0_bcmpkt_rxpmd_match_id_defs.h +++ /dev/null @@ -1,426 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) bcm56880_a0_nfa_6_5_34_3_0_sf_match_id_info.yml - * for device bcm56880_a0 and variant nfa_6_5_34_3_0. - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - -#ifndef BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H - -#include - -/*! - * \brief Get the Match ID DataBase information. - * - * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information. -*/ -extern bcmpkt_rxpmd_match_id_db_info_t * - bcm56880_a0_nfa_6_5_34_3_0_rxpmd_match_id_db_info_get(void); - -/*! - * \brief Get the Match ID Mapping information. - * - * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information. -*/ -extern bcmpkt_rxpmd_match_id_map_info_t * - bcm56880_a0_nfa_6_5_34_3_0_rxpmd_match_id_map_info_get(void); - -/*! - \name RXPMD Match IDs -*/ -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG 0 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG 1 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 2 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE 3 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OPAQUETAG 4 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG 5 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_RSPAN 6 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC 7 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG 8 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP 9 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 10 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 11 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD 12 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT 13 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE 14 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 15 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 16 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE 17 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE 18 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM 19 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY 20 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT 21 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ 22 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_12BYTE 23 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_8BYTE 24 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_EXT_4BYTE 25 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_WITH_EXT 26 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP 27 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP 28 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 29 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 30 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 31 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 32 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 33 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 34 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 35 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 36 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 37 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH 38 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW 39 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE 40 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 41 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP 42 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES 43 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES 44 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP 45 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 46 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 47 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 48 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN 49 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK 50 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE 51 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG 52 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG 53 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 54 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE 55 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OPAQUETAG 56 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG 57 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_RSPAN 58 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC 59 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG 60 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP 61 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 62 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 63 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD 64 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT 65 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE 66 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 67 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 68 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE 69 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE 70 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM 71 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY 72 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT 73 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ 74 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_12BYTE 75 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_8BYTE 76 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_EXT_4BYTE 77 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_WITH_EXT 78 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP 79 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP 80 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 81 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 82 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 83 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 84 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 85 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 86 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 87 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 88 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 89 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH 90 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW 91 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE 92 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 93 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP 94 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES 95 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES 96 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP 97 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 98 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 99 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 100 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN 101 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG 102 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG 103 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 104 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE 105 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OPAQUETAG 106 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG 107 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_RSPAN 108 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC 109 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG 110 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP 111 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 112 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 113 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD 114 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT 115 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE 116 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 117 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 118 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP 119 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP 120 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 121 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 122 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE 123 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 124 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP 125 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES 126 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES 127 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP 128 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 129 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 130 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 131 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG 132 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG 133 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 134 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE 135 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OPAQUETAG 136 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG 137 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_RSPAN 138 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC 139 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG 140 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP 141 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 142 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 143 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD 144 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT 145 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE 146 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 147 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 148 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE 149 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE 150 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM 151 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY 152 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT 153 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ 154 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_12BYTE 155 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_8BYTE 156 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_EXT_4BYTE 157 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_WITH_EXT 158 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP 159 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP 160 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 161 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 162 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 163 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 164 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 165 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 166 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 167 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 168 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 169 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH 170 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW 171 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE 172 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 173 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP 174 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES 175 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES 176 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP 177 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 178 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 179 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 180 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN 181 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK 182 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE 183 -#define BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_COUNT 184 - -#define BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \ - {"EGRESS_PKT_FWD_L2_HDR_ETAG", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG}, \ - {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \ - {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \ - {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \ - {"EGRESS_PKT_FWD_L2_HDR_OPAQUETAG", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OPAQUETAG}, \ - {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \ - {"EGRESS_PKT_FWD_L2_HDR_RSPAN", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_RSPAN}, \ - {"EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC}, \ - {"EGRESS_PKT_FWD_L2_HDR_VNTAG", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_BFD", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_GPE", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_GRE", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_GTP_12BYTE", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_12BYTE}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_GTP_8BYTE", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_8BYTE}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_GTP_EXT_4BYTE", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_EXT_4BYTE}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_GTP_WITH_EXT", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_WITH_EXT}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_IGMP", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_P_1588", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \ - {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \ - {"EGRESS_PKT_SYS_HDR_NONE", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_ETAG", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_OPAQUETAG", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OPAQUETAG}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_RSPAN", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_RSPAN}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_VNTAG", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_12BYTE", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_12BYTE}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_8BYTE", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_8BYTE}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_EXT_4BYTE", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_EXT_4BYTE}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_WITH_EXT", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_WITH_EXT}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \ - {"INGRESS_PKT_INNER_L2_HDR_ETAG", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG}, \ - {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \ - {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \ - {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \ - {"INGRESS_PKT_INNER_L2_HDR_OPAQUETAG", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OPAQUETAG}, \ - {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \ - {"INGRESS_PKT_INNER_L2_HDR_RSPAN", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_RSPAN}, \ - {"INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC}, \ - {"INGRESS_PKT_INNER_L2_HDR_VNTAG", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_BFD", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_IGMP", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_P_1588", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \ - {"INGRESS_PKT_OUTER_L2_HDR_ETAG", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG}, \ - {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \ - {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \ - {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \ - {"INGRESS_PKT_OUTER_L2_HDR_OPAQUETAG", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OPAQUETAG}, \ - {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \ - {"INGRESS_PKT_OUTER_L2_HDR_RSPAN", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_RSPAN}, \ - {"INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC}, \ - {"INGRESS_PKT_OUTER_L2_HDR_VNTAG", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_BFD", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_GPE", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_GTP_12BYTE", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_12BYTE}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_GTP_8BYTE", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_8BYTE}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_GTP_EXT_4BYTE", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_EXT_4BYTE}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_GTP_WITH_EXT", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_WITH_EXT}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \ - {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \ - {"INGRESS_PKT_SYS_HDR_NONE", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \ - {"rxpmd_match_id_count", BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_COUNT} - -#endif /*! BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_34_2_0/bcm56890_a0_cna_6_5_34_2_0_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_34_2_0/bcm56890_a0_cna_6_5_34_2_0_bcmpkt_flexhdr.h deleted file mode 100644 index 5c71f1d133d..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_34_2_0/bcm56890_a0_cna_6_5_34_2_0_bcmpkt_flexhdr.h +++ /dev/null @@ -1,107 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) header.yml. - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - -#ifndef BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_FLEXHDR_H -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_FLEXHDR_H - -#include - -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T 0 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T 1 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T 2 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T 3 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T 4 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T 5 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ETHERTYPE_T 6 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T 7 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ICMP_T 8 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T 9 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_A_T 10 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_B_T 11 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_BASE_T 12 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IPFIX_T 13 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T 14 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T 15 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_L2_T 16 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_MIRROR_ERSPAN_SN_T 17 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_MIRROR_TRANSPORT_T 18 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T 19 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T 20 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T 21 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T 22 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T 23 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_2_T 24 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_TCP_FIRST_4BYTES_T 25 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T 26 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_UDP_T 27 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L3_T 28 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L4_T 29 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T 30 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_VLAN_T 31 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_VXLAN_T 32 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_T 33 - -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_FLEXHDR_COUNT 34 - -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_FLEXHDR_NAME_MAP_INIT \ - {"arp_t", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T},\ - {"cpu_composites_0_t", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T},\ - {"cpu_composites_1_t", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T},\ - {"ep_nih_header_t", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T},\ - {"erspan3_fixed_hdr_t", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T},\ - {"erspan3_subhdr_5_t", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T},\ - {"ethertype_t", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ETHERTYPE_T},\ - {"generic_loopback_t", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T},\ - {"icmp_t", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ICMP_T},\ - {"ifa_header_t", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T},\ - {"ifa_metadata_a_t", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_A_T},\ - {"ifa_metadata_b_t", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_B_T},\ - {"ifa_metadata_base_t", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_BASE_T},\ - {"ipfix_t", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IPFIX_T},\ - {"ipv4_t", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T},\ - {"ipv6_t", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T},\ - {"l2_t", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_L2_T},\ - {"mirror_erspan_sn_t", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_MIRROR_ERSPAN_SN_T},\ - {"mirror_transport_t", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_MIRROR_TRANSPORT_T},\ - {"psamp_mirror_on_drop_0_t", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\ - {"psamp_mirror_on_drop_3_t", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T},\ - {"rarp_t", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T},\ - {"sflow_shim_0_t", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T},\ - {"sflow_shim_1_t", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T},\ - {"sflow_shim_2_t", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_2_T},\ - {"tcp_first_4bytes_t", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_TCP_FIRST_4BYTES_T},\ - {"tcp_last_16bytes_t", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T},\ - {"udp_t", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_UDP_T},\ - {"unknown_l3_t", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L3_T},\ - {"unknown_l4_t", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L4_T},\ - {"unknown_l5_t", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T},\ - {"vlan_t", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_VLAN_T},\ - {"vxlan_t", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_VXLAN_T},\ - {"RXPMD_FLEX_T", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_T},\ - {"flexhdr count", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_FLEXHDR_COUNT} - -#endif /* BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_FLEXHDR_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_34_2_0/bcm56890_a0_cna_6_5_34_2_0_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_34_2_0/bcm56890_a0_cna_6_5_34_2_0_bcmpkt_flexhdr_data.h deleted file mode 100644 index a67b9d49d65..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_34_2_0/bcm56890_a0_cna_6_5_34_2_0_bcmpkt_flexhdr_data.h +++ /dev/null @@ -1,703 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) header.yml. - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - -#ifndef BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_FLEXHDR_DATA_H -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_FLEXHDR_DATA_H - -/*! - * \name ARP_T field IDs. - */ -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_HARDWARE_LEN 0 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_HARDWARE_TYPE 1 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_OPERATION 2 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_PROT_ADDR_LEN 3 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_PROTOCOL_TYPE 4 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_SENDER_HA 5 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_SENDER_IP 6 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_TARGET_HA 7 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_TARGET_IP 8 - -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_FID_COUNT 9 - -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \ - {"HARDWARE_LEN", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_HARDWARE_LEN},\ - {"HARDWARE_TYPE", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_HARDWARE_TYPE},\ - {"OPERATION", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_OPERATION},\ - {"PROT_ADDR_LEN", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_PROT_ADDR_LEN},\ - {"PROTOCOL_TYPE", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_PROTOCOL_TYPE},\ - {"SENDER_HA", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_SENDER_HA},\ - {"SENDER_IP", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_SENDER_IP},\ - {"TARGET_HA", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_TARGET_HA},\ - {"TARGET_IP", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_TARGET_IP},\ - {"arp_t fid count", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_FID_COUNT} - -/*! - * \name CPU_COMPOSITES_0_T field IDs. - */ -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6 - -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT 7 - -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \ - {"DMA_CONT0", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\ - {"DMA_CONT1", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\ - {"DMA_CONT2", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\ - {"DMA_CONT3", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\ - {"DMA_CONT4", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\ - {"DMA_CONT5", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\ - {"DMA_CONT6", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\ - {"cpu_composites_0_t fid count", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT} - -/*! - * \name CPU_COMPOSITES_1_T field IDs. - */ -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7 8 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8 9 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9 10 - -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT 11 - -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \ - {"DMA_CONT10", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\ - {"DMA_CONT11", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\ - {"DMA_CONT12", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\ - {"DMA_CONT13", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\ - {"DMA_CONT14", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\ - {"DMA_CONT15", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\ - {"DMA_CONT16", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\ - {"DMA_CONT17", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\ - {"DMA_CONT7", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\ - {"DMA_CONT8", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\ - {"DMA_CONT9", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\ - {"cpu_composites_1_t fid count", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT} - -/*! - * \name EP_NIH_HEADER_T field IDs. - */ -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE 0 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE 1 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A 2 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B 3 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C 4 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A 5 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B 6 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C 7 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX 8 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0 9 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_START 10 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP 11 - -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT 12 - -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT \ - {"HEADER_SUBTYPE", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE},\ - {"HEADER_TYPE", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE},\ - {"OPAQUE_CTRL_A", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A},\ - {"OPAQUE_CTRL_B", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B},\ - {"OPAQUE_CTRL_C", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C},\ - {"OPAQUE_OBJECT_A", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A},\ - {"OPAQUE_OBJECT_B", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B},\ - {"OPAQUE_OBJECT_C", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C},\ - {"RECIRC_PROFILE_INDEX", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX},\ - {"RESERVED_0", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0},\ - {"START", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_START},\ - {"TIMESTAMP", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP},\ - {"ep_nih_header_t fid count", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT} - -/*! - * \name ERSPAN3_FIXED_HDR_T field IDs. - */ -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO 0 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS 1 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID 2 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID 4 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T 5 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP 6 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER 7 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN 8 - -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT 9 - -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \ - {"BSO", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\ - {"COS", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\ - {"GBP_SID", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\ - {"P_FT_HWID_D_GRA_O", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\ - {"SESSION_ID", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\ - {"T", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\ - {"TIMESTAMP", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\ - {"VER", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\ - {"VLAN", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\ - {"erspan3_fixed_hdr_t fid count", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT} - -/*! - * \name ERSPAN3_SUBHDR_5_T field IDs. - */ -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID 1 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID 2 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP 3 - -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT 4 - -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \ - {"PLATFORM_ID", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\ - {"PORT_ID", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\ - {"SWITCH_ID", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\ - {"TIMESTAMP", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\ - {"erspan3_subhdr_5_t fid count", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT} - -/*! - * \name ETHERTYPE_T field IDs. - */ -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ETHERTYPE_T_TYPE 0 - -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT 1 - -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \ - {"TYPE", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ETHERTYPE_T_TYPE},\ - {"ethertype_t fid count", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT} - -/*! - * \name GENERIC_LOOPBACK_T field IDs. - */ -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ 0 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE 1 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ 2 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS 3 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE 4 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY 5 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL 6 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ 7 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0 8 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1 9 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ 10 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1 11 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2 12 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 13 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE 14 - -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT 15 - -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \ - {"DESTINATION_OBJ", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\ - {"DESTINATION_TYPE", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\ - {"ENTROPY_OBJ", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\ - {"FLAGS", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\ - {"HEADER_TYPE", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\ - {"INPUT_PRIORITY", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\ - {"INTERFACE_CTRL", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\ - {"INTERFACE_OBJ", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\ - {"PROCESSING_CTRL_0", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\ - {"PROCESSING_CTRL_1", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\ - {"QOS_OBJ", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\ - {"RESERVED_1", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\ - {"RESERVED_2", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2},\ - {"SOURCE_SYSTEM_PORT", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\ - {"START_BYTE", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\ - {"generic_loopback_t fid count", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT} - -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP 0 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF 1 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED 2 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP 3 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP 4 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP 5 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP 6 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP 7 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1 8 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10 - -/*! - * \name ICMP_T field IDs. - */ -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ICMP_T_CHECKSUM 0 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ICMP_T_CODE 1 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ICMP_T_ICMP_TYPE 2 - -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ICMP_T_FID_COUNT 3 - -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \ - {"CHECKSUM", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ICMP_T_CHECKSUM},\ - {"CODE", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ICMP_T_CODE},\ - {"ICMP_TYPE", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ICMP_T_ICMP_TYPE},\ - {"icmp_t fid count", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ICMP_T_FID_COUNT} - -/*! - * \name IFA_HEADER_T field IDs. - */ -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_FLAGS 0 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_GNS 1 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH 2 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_NEXT_HDR 3 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_VER 4 - -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_FID_COUNT 5 - -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT \ - {"FLAGS", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_FLAGS},\ - {"GNS", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_GNS},\ - {"MAX_LENGTH", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH},\ - {"NEXT_HDR", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_NEXT_HDR},\ - {"VER", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_VER},\ - {"ifa_header_t fid count", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_FID_COUNT} - -/*! - * \name IFA_METADATA_A_T field IDs. - */ -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_A_T_CN 0 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_A_T_FWD_HDR_TTL 1 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_A_T_LNS_DEVICE_ID 2 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_A_T_PORT_SPEED 3 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_A_T_QUEUE_ID 4 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_A_T_RX_TIMESTAMP_SEC 5 - -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT 6 - -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_A_T_FIELD_NAME_MAP_INIT \ - {"CN", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_A_T_CN},\ - {"FWD_HDR_TTL", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_A_T_FWD_HDR_TTL},\ - {"LNS_DEVICE_ID", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_A_T_LNS_DEVICE_ID},\ - {"PORT_SPEED", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_A_T_PORT_SPEED},\ - {"QUEUE_ID", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_A_T_QUEUE_ID},\ - {"RX_TIMESTAMP_SEC", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_A_T_RX_TIMESTAMP_SEC},\ - {"ifa_metadata_a_t fid count", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT} - -/*! - * \name IFA_METADATA_B_T field IDs. - */ -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_B_T_EGRESS_PORT_ID 0 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_B_T_INGRESS_PORT_ID 1 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_B_T_MMU_STAT_0 2 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_B_T_MMU_STAT_1 3 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_B_T_RESIDENCE_TIME_NANOSEC 4 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_B_T_RX_TIMESTAMP_NANOSEC 5 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_B_T_TX_QUEUE_BYTE_COUNT 6 - -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT 7 - -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_B_T_FIELD_NAME_MAP_INIT \ - {"EGRESS_PORT_ID", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_B_T_EGRESS_PORT_ID},\ - {"INGRESS_PORT_ID", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_B_T_INGRESS_PORT_ID},\ - {"MMU_STAT_0", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_B_T_MMU_STAT_0},\ - {"MMU_STAT_1", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_B_T_MMU_STAT_1},\ - {"RESIDENCE_TIME_NANOSEC", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_B_T_RESIDENCE_TIME_NANOSEC},\ - {"RX_TIMESTAMP_NANOSEC", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_B_T_RX_TIMESTAMP_NANOSEC},\ - {"TX_QUEUE_BYTE_COUNT", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_B_T_TX_QUEUE_BYTE_COUNT},\ - {"ifa_metadata_b_t fid count", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT} - -/*! - * \name IFA_METADATA_BASE_T field IDs. - */ -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_BASE_T_ACTION_VECTOR 0 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_BASE_T_HOP_LIMIT_CURRENT_LENGTH 1 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_BASE_T_REQUEST_VECTOR 2 - -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT 3 - -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_BASE_T_FIELD_NAME_MAP_INIT \ - {"ACTION_VECTOR", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_BASE_T_ACTION_VECTOR},\ - {"HOP_LIMIT_CURRENT_LENGTH", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_BASE_T_HOP_LIMIT_CURRENT_LENGTH},\ - {"REQUEST_VECTOR", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_BASE_T_REQUEST_VECTOR},\ - {"ifa_metadata_base_t fid count", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT} - -/*! - * \name IPFIX_T field IDs. - */ -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IPFIX_T_EXPORT_TIME 0 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IPFIX_T_LENGTH 1 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IPFIX_T_SEQUENCE_NUM 3 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IPFIX_T_VERSION 4 - -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IPFIX_T_FID_COUNT 5 - -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \ - {"EXPORT_TIME", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IPFIX_T_EXPORT_TIME},\ - {"LENGTH", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IPFIX_T_LENGTH},\ - {"OBS_DOMAIN_ID", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\ - {"SEQUENCE_NUM", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IPFIX_T_SEQUENCE_NUM},\ - {"VERSION", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IPFIX_T_VERSION},\ - {"ipfix_t fid count", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IPFIX_T_FID_COUNT} - -/*! - * \name IPV4_T field IDs. - */ -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_DA 0 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_HDR_CHECKSUM 2 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_ID 3 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_OPTION 4 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_PROTOCOL 5 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_SA 6 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_TOS 7 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_TOTAL_LENGTH 8 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_TTL 9 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_VERSION_HDR_LEN 10 - -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_FID_COUNT 11 - -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \ - {"DA", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_DA},\ - {"FLAGS_FRAG_OFFSET", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\ - {"HDR_CHECKSUM", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_HDR_CHECKSUM},\ - {"ID", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_ID},\ - {"OPTION", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_OPTION},\ - {"PROTOCOL", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_PROTOCOL},\ - {"SA", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_SA},\ - {"TOS", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_TOS},\ - {"TOTAL_LENGTH", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_TOTAL_LENGTH},\ - {"TTL", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_TTL},\ - {"VERSION_HDR_LEN", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_VERSION_HDR_LEN},\ - {"ipv4_t fid count", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_FID_COUNT} - -/*! - * \name IPV6_T field IDs. - */ -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_DA 0 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_FLOW_LABEL 1 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_HOP_LIMIT 2 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_NEXT_HEADER 3 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_SA 5 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_TRAFFIC_CLASS 6 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_VERSION 7 - -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_FID_COUNT 8 - -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \ - {"DA", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_DA},\ - {"FLOW_LABEL", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_FLOW_LABEL},\ - {"HOP_LIMIT", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_HOP_LIMIT},\ - {"NEXT_HEADER", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_NEXT_HEADER},\ - {"PAYLOAD_LENGTH", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\ - {"SA", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_SA},\ - {"TRAFFIC_CLASS", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_TRAFFIC_CLASS},\ - {"VERSION", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_VERSION},\ - {"ipv6_t fid count", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_FID_COUNT} - -/*! - * \name L2_T field IDs. - */ -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_L2_T_MACDA 0 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_L2_T_MACSA 1 - -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_L2_T_FID_COUNT 2 - -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \ - {"MACDA", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_L2_T_MACDA},\ - {"MACSA", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_L2_T_MACSA},\ - {"l2_t fid count", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_L2_T_FID_COUNT} - -/*! - * \name MIRROR_ERSPAN_SN_T field IDs. - */ -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0 - -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT 1 - -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \ - {"SEQ_NUM", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\ - {"mirror_erspan_sn_t fid count", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT} - -/*! - * \name MIRROR_TRANSPORT_T field IDs. - */ -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_MIRROR_TRANSPORT_T_DATA 0 - -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT 1 - -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \ - {"DATA", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_MIRROR_TRANSPORT_T_DATA},\ - {"mirror_transport_t fid count", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT} - -/*! - * \name PSAMP_MIRROR_ON_DROP_0_T field IDs. - */ -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT 1 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH 2 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS 3 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S 4 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID 5 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID 6 - -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT 7 - -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \ - {"EGRESS_MOD_PORT", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\ - {"INGRESS_PORT", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\ - {"LENGTH", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\ - {"OBS_TIME_NS", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\ - {"OBS_TIME_S", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\ - {"SWITCH_ID", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\ - {"TEMPLATE_ID", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\ - {"psamp_mirror_on_drop_0_t fid count", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT} - -/*! - * \name PSAMP_MIRROR_ON_DROP_3_T field IDs. - */ -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON 0 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0 1 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH 2 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE 3 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX 4 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA 5 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR 6 - -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT 7 - -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT \ - {"DROP_REASON", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON},\ - {"RESERVED_0", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0},\ - {"SAMPLED_LENGTH", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH},\ - {"SMOD_STATE", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE},\ - {"UC_COS__COLOR__PROB_IDX", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX},\ - {"USER_META_DATA", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA},\ - {"VAR_LEN_INDICATOR", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR},\ - {"psamp_mirror_on_drop_3_t fid count", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT} - -/*! - * \name RARP_T field IDs. - */ -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_HARDWARE_LEN 0 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_HARDWARE_TYPE 1 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_OPERATION 2 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_PROT_ADDR_LEN 3 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_PROTOCOL_TYPE 4 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_SENDER_HA 5 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_SENDER_IP 6 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_TARGET_HA 7 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_TARGET_IP 8 - -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_FID_COUNT 9 - -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \ - {"HARDWARE_LEN", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_HARDWARE_LEN},\ - {"HARDWARE_TYPE", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_HARDWARE_TYPE},\ - {"OPERATION", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_OPERATION},\ - {"PROT_ADDR_LEN", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_PROT_ADDR_LEN},\ - {"PROTOCOL_TYPE", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_PROTOCOL_TYPE},\ - {"SENDER_HA", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_SENDER_HA},\ - {"SENDER_IP", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_SENDER_IP},\ - {"TARGET_HA", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_TARGET_HA},\ - {"TARGET_IP", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_TARGET_IP},\ - {"rarp_t fid count", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_FID_COUNT} - -/*! - * \name SFLOW_SHIM_0_T field IDs. - */ -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION 0 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE 1 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T_VERSION 2 - -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT 3 - -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT \ - {"SYS_DESTINATION", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION},\ - {"SYS_SOURCE", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE},\ - {"VERSION", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T_VERSION},\ - {"sflow_shim_0_t fid count", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT} - -/*! - * \name SFLOW_SHIM_1_T field IDs. - */ -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE 0 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED 1 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE 2 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST 3 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE 4 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED 5 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED 6 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE 7 - -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT 8 - -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT \ - {"FLAG_DEST_SAMPLE", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE},\ - {"FLAG_DISCARDED", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED},\ - {"FLAG_FLEX_SAMPLE", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE},\ - {"FLAG_MCAST", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST},\ - {"FLAG_SRC_SAMPLE", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE},\ - {"FLAG_TRUNCATED", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED},\ - {"RESERVED", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED},\ - {"SYS_OPCODE", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE},\ - {"sflow_shim_1_t fid count", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT} - -/*! - * \name SFLOW_SHIM_2_T field IDs. - */ -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM 0 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA 1 - -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT 2 - -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT \ - {"SEQUENCE_NUM", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM},\ - {"USER_META_DATA", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA},\ - {"sflow_shim_2_t fid count", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT} - -/*! - * \name TCP_FIRST_4BYTES_T field IDs. - */ -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1 - -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT 2 - -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \ - {"DST_PORT", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\ - {"SRC_PORT", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\ - {"tcp_first_4bytes_t fid count", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT} - -/*! - * \name TCP_LAST_16BYTES_T field IDs. - */ -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM 0 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM 1 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM 3 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR 4 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE 5 - -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT 6 - -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \ - {"ACK_NUM", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\ - {"CHECKSUM", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\ - {"HDR_LEN_AND_FLAGS", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\ - {"SEQ_NUM", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\ - {"URGENT_PTR", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\ - {"WIN_SIZE", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\ - {"tcp_last_16bytes_t fid count", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT} - -/*! - * \name UDP_T field IDs. - */ -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_UDP_T_CHECKSUM 0 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_UDP_T_DST_PORT 1 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_UDP_T_SRC_PORT 2 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_UDP_T_UDP_LENGTH 3 - -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_UDP_T_FID_COUNT 4 - -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \ - {"CHECKSUM", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_UDP_T_CHECKSUM},\ - {"DST_PORT", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_UDP_T_DST_PORT},\ - {"SRC_PORT", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_UDP_T_SRC_PORT},\ - {"UDP_LENGTH", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_UDP_T_UDP_LENGTH},\ - {"udp_t fid count", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_UDP_T_FID_COUNT} - -/*! - * \name UNKNOWN_L3_T field IDs. - */ -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD 1 - -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT 2 - -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \ - {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\ - {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\ - {"unknown_l3_t fid count", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT} - -/*! - * \name UNKNOWN_L4_T field IDs. - */ -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0 - -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT 1 - -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \ - {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\ - {"unknown_l4_t fid count", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT} - -/*! - * \name UNKNOWN_L5_T field IDs. - */ -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2 - -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT 3 - -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \ - {"L5_BYTES_0_1", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\ - {"L5_BYTES_2_3", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\ - {"L5_BYTES_4_7", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\ - {"unknown_l5_t fid count", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT} - -/*! - * \name VLAN_T field IDs. - */ -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_VLAN_T_CFI 0 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_VLAN_T_PCP 1 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_VLAN_T_TPID 2 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_VLAN_T_VID 3 - -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_VLAN_T_FID_COUNT 4 - -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \ - {"CFI", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_VLAN_T_CFI},\ - {"PCP", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_VLAN_T_PCP},\ - {"TPID", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_VLAN_T_TPID},\ - {"VID", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_VLAN_T_VID},\ - {"vlan_t fid count", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_VLAN_T_FID_COUNT} - -/*! - * \name VXLAN_T field IDs. - */ -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_VXLAN_T_RESERVED2 1 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_VXLAN_T_VN_ID 2 - -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_VXLAN_T_FID_COUNT 3 - -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \ - {"FLAGS_RESERVED_1", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\ - {"RESERVED2", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_VXLAN_T_RESERVED2},\ - {"VN_ID", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_VXLAN_T_VN_ID},\ - {"vxlan_t fid count", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_VXLAN_T_FID_COUNT} - - -#endif /* BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_FLEXHDR_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_34_2_0/bcm56890_a0_cna_6_5_34_2_0_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_34_2_0/bcm56890_a0_cna_6_5_34_2_0_bcmpkt_rxpmd_flex_data.h deleted file mode 100644 index b37292dec12..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_34_2_0/bcm56890_a0_cna_6_5_34_2_0_bcmpkt_rxpmd_flex_data.h +++ /dev/null @@ -1,134 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) map.yml. - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - -#ifndef BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_DATA_H -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_DATA_H - -/*! - * \name RX flex metadata field IDs. - */ -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0 0 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_DVP_15_0 1 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0 2 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0 3 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0 4 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_DROP_CODE_15_0 5 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0 6 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0 7 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16 8 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_ERSPAN3_GBP_SID_15_0 9 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0 10 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16 11 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32 12 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0 13 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0 14 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0 15 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0 16 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16 17 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_8_0 18 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 19 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0 20 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0 21 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0 22 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0 23 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0 24 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0 25 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_14_0 26 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_14_0 27 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0 28 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0 29 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_SVP_15_0 30 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0 31 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0 32 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0 33 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0 34 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_TAG_ACTION_CTRL_1_0 35 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0 36 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0 37 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_VFI_15_0 38 - -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_FID_COUNT 39 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_COUNT 25 - -/*! - * \name Packet Flex Reason Types. - */ -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS 0 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT 1 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP 2 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER 3 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT 4 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP 5 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS 6 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD 7 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE 8 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP 9 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS 10 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR 11 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR 12 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL 13 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST 14 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED 15 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED 16 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED 17 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU 18 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED 19 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT 20 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP 21 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED 22 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP 23 -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_VFP 24 - -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \ - {"CML_FLAGS", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\ - {"EM_FT", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT},\ - {"IFP", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP},\ - {"IFP_METER", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\ - {"IVXLT", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\ - {"L2_DST_LOOKUP", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\ - {"L2_DST_LOOKUP_MISS", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\ - {"L2_SRC_DISCARD", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD},\ - {"L2_SRC_STATIC_MOVE", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\ - {"L3_DST_LOOKUP", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\ - {"L3_DST_LOOKUP_MISS", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\ - {"L3_HDR_ERROR", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\ - {"L3_TTL_ERROR", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\ - {"LEARN_CACHE_FULL", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\ - {"MACSA_MULTICAST", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST},\ - {"MEMBERSHIP_CHECK_FAILED", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED},\ - {"MIRROR_SAMPLER_EGR_SAMPLED", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED},\ - {"MIRROR_SAMPLER_SAMPLED", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED},\ - {"NO_COPY_TO_CPU", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\ - {"PKT_INTEGRITY_CHECK_FAILED", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\ - {"PROTOCOL_PKT", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\ - {"SER_DROP", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP},\ - {"SPANNING_TREE_CHECK_FAILED", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED},\ - {"TRACE_DOP", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\ - {"VFP", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_VFP},\ - {"flex reason count", BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_COUNT} - -#endif /* BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_34_2_0/bcm56890_a0_cna_6_5_34_2_0_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_34_2_0/bcm56890_a0_cna_6_5_34_2_0_bcmpkt_rxpmd_match_id_defs.h deleted file mode 100644 index 8e9f81ce639..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/cna_6_5_34_2_0/bcm56890_a0_cna_6_5_34_2_0_bcmpkt_rxpmd_match_id_defs.h +++ /dev/null @@ -1,228 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) bcm56890_a0_cna_6_5_34_2_0_sf_match_id_info.yml - * for device bcm56890_a0 and variant cna_6_5_34_2_0. - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - -#ifndef BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H - -#include - -/*! - * \brief Get the Match ID DataBase information. - * - * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information. -*/ -extern bcmpkt_rxpmd_match_id_db_info_t * - bcm56890_a0_cna_6_5_34_2_0_rxpmd_match_id_db_info_get(void); - -/*! - * \brief Get the Match ID Mapping information. - * - * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information. -*/ -extern bcmpkt_rxpmd_match_id_map_info_t * - bcm56890_a0_cna_6_5_34_2_0_rxpmd_match_id_map_info_get(void); - -/*! - \name RXPMD Match IDs -*/ -#define BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG 0 -#define BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 1 -#define BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE 2 -#define BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG 3 -#define BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP 4 -#define BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE 5 -#define BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP 6 -#define BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER 7 -#define BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE 8 -#define BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 9 -#define BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 10 -#define BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE 11 -#define BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP 12 -#define BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES 13 -#define BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES 14 -#define BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP 15 -#define BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 16 -#define BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 17 -#define BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 18 -#define BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN 19 -#define BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH 20 -#define BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK 21 -#define BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE 22 -#define BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG 23 -#define BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 24 -#define BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE 25 -#define BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG 26 -#define BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP 27 -#define BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE 28 -#define BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP 29 -#define BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER 30 -#define BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE 31 -#define BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 32 -#define BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 33 -#define BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE 34 -#define BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP 35 -#define BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES 36 -#define BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES 37 -#define BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP 38 -#define BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 39 -#define BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 40 -#define BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 41 -#define BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN 42 -#define BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG 43 -#define BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 44 -#define BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE 45 -#define BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG 46 -#define BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP 47 -#define BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE 48 -#define BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP 49 -#define BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER 50 -#define BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE 51 -#define BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 52 -#define BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 53 -#define BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE 54 -#define BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP 55 -#define BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES 56 -#define BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES 57 -#define BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP 58 -#define BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 59 -#define BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 60 -#define BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 61 -#define BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG 62 -#define BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 63 -#define BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE 64 -#define BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG 65 -#define BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP 66 -#define BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE 67 -#define BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP 68 -#define BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER 69 -#define BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE 70 -#define BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 71 -#define BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 72 -#define BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE 73 -#define BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP 74 -#define BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES 75 -#define BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES 76 -#define BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP 77 -#define BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 78 -#define BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 79 -#define BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 80 -#define BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN 81 -#define BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH 82 -#define BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK 83 -#define BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE 84 -#define BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_COUNT 85 - -#define BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \ - {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \ - {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \ - {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \ - {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER", BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE", BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \ - {"EGRESS_PKT_SYS_HDR_EP_NIH", BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH}, \ - {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \ - {"EGRESS_PKT_SYS_HDR_NONE", BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER", BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE", BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \ - {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \ - {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \ - {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \ - {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER", BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE", BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \ - {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \ - {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \ - {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \ - {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER", BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE", BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \ - {"INGRESS_PKT_SYS_HDR_EP_NIH", BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH}, \ - {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \ - {"INGRESS_PKT_SYS_HDR_NONE", BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \ - {"rxpmd_match_id_count", BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_COUNT} - -#endif /*! BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_34_8_0/bcm56890_a0_dna_6_5_34_8_0_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_34_8_0/bcm56890_a0_dna_6_5_34_8_0_bcmpkt_flexhdr.h deleted file mode 100644 index 4cdf686c8f4..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_34_8_0/bcm56890_a0_dna_6_5_34_8_0_bcmpkt_flexhdr.h +++ /dev/null @@ -1,173 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) header.yml. - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - -#ifndef BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_FLEXHDR_H -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_FLEXHDR_H - -#include - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ARP_T 0 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_AUTHEN_T 1 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_BFD_T 2 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_CNTAG_T 3 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_CPU_COMPOSITES_0_T 4 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_CPU_COMPOSITES_1_T 5 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_DEST_OPTION_T 6 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_EP_NIH_HEADER_T 7 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T 8 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ERSPAN3_SUBHDR_5_T 9 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ESP_T 10 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ETHERTYPE_T 11 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_FRAG_T 12 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GBP_ETHERNET_SHIM_T 13 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GENERIC_LOOPBACK_T 14 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GPE_T 15 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GRE_CHKSUM_T 16 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GRE_KEY_T 17 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GRE_ROUT_T 18 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GRE_SEQ_T 19 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GRE_T 20 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_HG3_BASE_T 21 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_HG3_EXTENSION_0_T 22 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_HOP_BY_HOP_T 23 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ICMP_T 24 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IFA_HEADER_T 25 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IFA_METADATA_A_T 26 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IFA_METADATA_B_T 27 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IFA_METADATA_BASE_T 28 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IGMP_T 29 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IOAM_E2E_T 30 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IPFIX_T 31 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IPV4_T 32 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IPV6_T 33 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_L2_T 34 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MAC_IN_MAC_T 35 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MIM_GBP_T 36 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MIRROR_ERSPAN_SN_T 37 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MIRROR_TRANSPORT_T 38 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MPLS_ACH_T 39 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MPLS_BV_T 40 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MPLS_CW_T 41 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MPLS_T 42 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_P_1588_T 43 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PIM_T 44 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PROG_EXT_HDR_T 45 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_0_T 46 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_1_T 47 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T 48 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T 49 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RARP_T 50 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ROUTING_T 51 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_SFLOW_SHIM_0_T 52 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_SFLOW_SHIM_1_T 53 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_SFLOW_SHIM_2_T 54 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_SNAP_LLC_T 55 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_SVTAG_T 56 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_TCP_FIRST_4BYTES_T 57 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_TCP_LAST_16BYTES_T 58 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_UDP_T 59 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_UNKNOWN_L3_T 60 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_UNKNOWN_L4_T 61 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_UNKNOWN_L5_T 62 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_VLAN_T 63 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_VXLAN_T 64 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_WESP_T 65 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_T 66 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_FLEXHDR_COUNT 67 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_FLEXHDR_NAME_MAP_INIT \ - {"arp_t", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ARP_T},\ - {"authen_t", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_AUTHEN_T},\ - {"bfd_t", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_BFD_T},\ - {"cntag_t", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_CNTAG_T},\ - {"cpu_composites_0_t", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_CPU_COMPOSITES_0_T},\ - {"cpu_composites_1_t", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_CPU_COMPOSITES_1_T},\ - {"dest_option_t", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_DEST_OPTION_T},\ - {"ep_nih_header_t", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_EP_NIH_HEADER_T},\ - {"erspan3_fixed_hdr_t", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T},\ - {"erspan3_subhdr_5_t", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ERSPAN3_SUBHDR_5_T},\ - {"esp_t", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ESP_T},\ - {"ethertype_t", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ETHERTYPE_T},\ - {"frag_t", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_FRAG_T},\ - {"gbp_ethernet_shim_t", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GBP_ETHERNET_SHIM_T},\ - {"generic_loopback_t", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GENERIC_LOOPBACK_T},\ - {"gpe_t", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GPE_T},\ - {"gre_chksum_t", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GRE_CHKSUM_T},\ - {"gre_key_t", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GRE_KEY_T},\ - {"gre_rout_t", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GRE_ROUT_T},\ - {"gre_seq_t", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GRE_SEQ_T},\ - {"gre_t", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GRE_T},\ - {"hg3_base_t", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_HG3_BASE_T},\ - {"hg3_extension_0_t", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_HG3_EXTENSION_0_T},\ - {"hop_by_hop_t", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_HOP_BY_HOP_T},\ - {"icmp_t", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ICMP_T},\ - {"ifa_header_t", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IFA_HEADER_T},\ - {"ifa_metadata_a_t", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IFA_METADATA_A_T},\ - {"ifa_metadata_b_t", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IFA_METADATA_B_T},\ - {"ifa_metadata_base_t", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IFA_METADATA_BASE_T},\ - {"igmp_t", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IGMP_T},\ - {"ioam_e2e_t", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IOAM_E2E_T},\ - {"ipfix_t", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IPFIX_T},\ - {"ipv4_t", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IPV4_T},\ - {"ipv6_t", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IPV6_T},\ - {"l2_t", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_L2_T},\ - {"mac_in_mac_t", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MAC_IN_MAC_T},\ - {"mim_gbp_t", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MIM_GBP_T},\ - {"mirror_erspan_sn_t", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MIRROR_ERSPAN_SN_T},\ - {"mirror_transport_t", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MIRROR_TRANSPORT_T},\ - {"mpls_ach_t", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MPLS_ACH_T},\ - {"mpls_bv_t", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MPLS_BV_T},\ - {"mpls_cw_t", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MPLS_CW_T},\ - {"mpls_t", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MPLS_T},\ - {"p_1588_t", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_P_1588_T},\ - {"pim_t", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PIM_T},\ - {"prog_ext_hdr_t", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PROG_EXT_HDR_T},\ - {"psamp_0_t", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_0_T},\ - {"psamp_1_t", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_1_T},\ - {"psamp_mirror_on_drop_0_t", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\ - {"psamp_mirror_on_drop_3_t", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T},\ - {"rarp_t", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RARP_T},\ - {"routing_t", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ROUTING_T},\ - {"sflow_shim_0_t", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_SFLOW_SHIM_0_T},\ - {"sflow_shim_1_t", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_SFLOW_SHIM_1_T},\ - {"sflow_shim_2_t", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_SFLOW_SHIM_2_T},\ - {"snap_llc_t", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_SNAP_LLC_T},\ - {"svtag_t", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_SVTAG_T},\ - {"tcp_first_4bytes_t", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_TCP_FIRST_4BYTES_T},\ - {"tcp_last_16bytes_t", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_TCP_LAST_16BYTES_T},\ - {"udp_t", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_UDP_T},\ - {"unknown_l3_t", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_UNKNOWN_L3_T},\ - {"unknown_l4_t", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_UNKNOWN_L4_T},\ - {"unknown_l5_t", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_UNKNOWN_L5_T},\ - {"vlan_t", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_VLAN_T},\ - {"vxlan_t", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_VXLAN_T},\ - {"wesp_t", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_WESP_T},\ - {"RXPMD_FLEX_T", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_T},\ - {"flexhdr count", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_FLEXHDR_COUNT} - -#endif /* BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_FLEXHDR_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_34_8_0/bcm56890_a0_dna_6_5_34_8_0_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_34_8_0/bcm56890_a0_dna_6_5_34_8_0_bcmpkt_flexhdr_data.h deleted file mode 100644 index 4fdcfa7992d..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_34_8_0/bcm56890_a0_dna_6_5_34_8_0_bcmpkt_flexhdr_data.h +++ /dev/null @@ -1,1339 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) header.yml. - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - -#ifndef BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_FLEXHDR_DATA_H -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_FLEXHDR_DATA_H - -/*! - * \name ARP_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ARP_T_HARDWARE_LEN 0 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ARP_T_HARDWARE_TYPE 1 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ARP_T_OPERATION 2 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ARP_T_PROT_ADDR_LEN 3 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ARP_T_PROTOCOL_TYPE 4 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ARP_T_SENDER_HA 5 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ARP_T_SENDER_IP 6 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ARP_T_TARGET_HA 7 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ARP_T_TARGET_IP 8 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ARP_T_FID_COUNT 9 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \ - {"HARDWARE_LEN", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ARP_T_HARDWARE_LEN},\ - {"HARDWARE_TYPE", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ARP_T_HARDWARE_TYPE},\ - {"OPERATION", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ARP_T_OPERATION},\ - {"PROT_ADDR_LEN", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ARP_T_PROT_ADDR_LEN},\ - {"PROTOCOL_TYPE", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ARP_T_PROTOCOL_TYPE},\ - {"SENDER_HA", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ARP_T_SENDER_HA},\ - {"SENDER_IP", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ARP_T_SENDER_IP},\ - {"TARGET_HA", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ARP_T_TARGET_HA},\ - {"TARGET_IP", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ARP_T_TARGET_IP},\ - {"arp_t fid count", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ARP_T_FID_COUNT} - -/*! - * \name AUTHEN_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_AUTHEN_T_DATA 0 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_AUTHEN_T_NEXT_HEADER 1 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN 2 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_AUTHEN_T_RESERVED 3 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_AUTHEN_T_SEQ_NUM 4 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_AUTHEN_T_SPI 5 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_AUTHEN_T_FID_COUNT 6 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT \ - {"DATA", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_AUTHEN_T_DATA},\ - {"NEXT_HEADER", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_AUTHEN_T_NEXT_HEADER},\ - {"PAYLOAD_LEN", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN},\ - {"RESERVED", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_AUTHEN_T_RESERVED},\ - {"SEQ_NUM", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_AUTHEN_T_SEQ_NUM},\ - {"SPI", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_AUTHEN_T_SPI},\ - {"authen_t fid count", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_AUTHEN_T_FID_COUNT} - -/*! - * \name BFD_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_BFD_T_AP 0 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_BFD_T_BFD_LENGTH 1 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_BFD_T_CPI 2 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_BFD_T_DEM 3 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_BFD_T_DESMINTXINTV 4 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_BFD_T_DETECTMULT 5 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_BFD_T_DIAG 6 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_BFD_T_FIN 7 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_BFD_T_MINECHORXINTV 8 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_BFD_T_MPT 9 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_BFD_T_MYDISCRIM 10 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_BFD_T_POLL 11 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_BFD_T_REQMINRXINTV 12 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_BFD_T_STA 13 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_BFD_T_URDISCRIM 14 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_BFD_T_VERSION 15 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_BFD_T_FID_COUNT 16 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT \ - {"AP", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_BFD_T_AP},\ - {"BFD_LENGTH", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_BFD_T_BFD_LENGTH},\ - {"CPI", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_BFD_T_CPI},\ - {"DEM", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_BFD_T_DEM},\ - {"DESMINTXINTV", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_BFD_T_DESMINTXINTV},\ - {"DETECTMULT", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_BFD_T_DETECTMULT},\ - {"DIAG", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_BFD_T_DIAG},\ - {"FIN", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_BFD_T_FIN},\ - {"MINECHORXINTV", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_BFD_T_MINECHORXINTV},\ - {"MPT", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_BFD_T_MPT},\ - {"MYDISCRIM", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_BFD_T_MYDISCRIM},\ - {"POLL", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_BFD_T_POLL},\ - {"REQMINRXINTV", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_BFD_T_REQMINRXINTV},\ - {"STA", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_BFD_T_STA},\ - {"URDISCRIM", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_BFD_T_URDISCRIM},\ - {"VERSION", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_BFD_T_VERSION},\ - {"bfd_t fid count", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_BFD_T_FID_COUNT} - -/*! - * \name CNTAG_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_CNTAG_T_RPID 0 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_CNTAG_T_TPID 1 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_CNTAG_T_FID_COUNT 2 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT \ - {"RPID", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_CNTAG_T_RPID},\ - {"TPID", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_CNTAG_T_TPID},\ - {"cntag_t fid count", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_CNTAG_T_FID_COUNT} - -/*! - * \name CPU_COMPOSITES_0_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT 7 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \ - {"DMA_CONT0", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\ - {"DMA_CONT1", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\ - {"DMA_CONT2", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\ - {"DMA_CONT3", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\ - {"DMA_CONT4", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\ - {"DMA_CONT5", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\ - {"DMA_CONT6", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\ - {"cpu_composites_0_t fid count", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT} - -/*! - * \name CPU_COMPOSITES_1_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7 8 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8 9 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9 10 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT 11 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \ - {"DMA_CONT10", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\ - {"DMA_CONT11", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\ - {"DMA_CONT12", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\ - {"DMA_CONT13", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\ - {"DMA_CONT14", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\ - {"DMA_CONT15", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\ - {"DMA_CONT16", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\ - {"DMA_CONT17", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\ - {"DMA_CONT7", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\ - {"DMA_CONT8", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\ - {"DMA_CONT9", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\ - {"cpu_composites_1_t fid count", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT} - -/*! - * \name DEST_OPTION_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN 0 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER 1 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_DEST_OPTION_T_OPTION 2 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_DEST_OPTION_T_FID_COUNT 3 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT \ - {"HDR_EXT_LEN", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN},\ - {"NEXT_HEADER", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER},\ - {"OPTION", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_DEST_OPTION_T_OPTION},\ - {"dest_option_t fid count", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_DEST_OPTION_T_FID_COUNT} - -/*! - * \name EP_NIH_HEADER_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE 0 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE 1 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A 2 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B 3 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C 4 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A 5 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B 6 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C 7 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX 8 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0 9 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_EP_NIH_HEADER_T_START 10 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP 11 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT 12 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT \ - {"HEADER_SUBTYPE", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE},\ - {"HEADER_TYPE", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE},\ - {"OPAQUE_CTRL_A", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A},\ - {"OPAQUE_CTRL_B", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B},\ - {"OPAQUE_CTRL_C", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C},\ - {"OPAQUE_OBJECT_A", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A},\ - {"OPAQUE_OBJECT_B", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B},\ - {"OPAQUE_OBJECT_C", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C},\ - {"RECIRC_PROFILE_INDEX", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX},\ - {"RESERVED_0", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0},\ - {"START", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_EP_NIH_HEADER_T_START},\ - {"TIMESTAMP", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP},\ - {"ep_nih_header_t fid count", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT} - -/*! - * \name ERSPAN3_FIXED_HDR_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO 0 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS 1 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID 2 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID 4 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T 5 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP 6 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER 7 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN 8 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT 9 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \ - {"BSO", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\ - {"COS", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\ - {"GBP_SID", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\ - {"P_FT_HWID_D_GRA_O", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\ - {"SESSION_ID", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\ - {"T", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\ - {"TIMESTAMP", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\ - {"VER", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\ - {"VLAN", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\ - {"erspan3_fixed_hdr_t fid count", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT} - -/*! - * \name ERSPAN3_SUBHDR_5_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID 1 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID 2 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP 3 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT 4 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \ - {"PLATFORM_ID", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\ - {"PORT_ID", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\ - {"SWITCH_ID", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\ - {"TIMESTAMP", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\ - {"erspan3_subhdr_5_t fid count", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT} - -/*! - * \name ESP_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ESP_T_NEXT_HEADER 0 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ESP_T_PAD 1 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ESP_T_PAD_LEN 2 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ESP_T_SEQ_NUM 3 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ESP_T_SPI 4 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ESP_T_FID_COUNT 5 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT \ - {"NEXT_HEADER", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ESP_T_NEXT_HEADER},\ - {"PAD", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ESP_T_PAD},\ - {"PAD_LEN", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ESP_T_PAD_LEN},\ - {"SEQ_NUM", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ESP_T_SEQ_NUM},\ - {"SPI", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ESP_T_SPI},\ - {"esp_t fid count", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ESP_T_FID_COUNT} - -/*! - * \name ETHERTYPE_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ETHERTYPE_T_TYPE 0 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ETHERTYPE_T_FID_COUNT 1 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \ - {"TYPE", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ETHERTYPE_T_TYPE},\ - {"ethertype_t fid count", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ETHERTYPE_T_FID_COUNT} - -/*! - * \name FRAG_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_FRAG_T_FRAG_INFO 0 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_FRAG_T_ID 1 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_FRAG_T_NEXT_HEADER 2 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_FRAG_T_RESERVED 3 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_FRAG_T_FID_COUNT 4 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT \ - {"FRAG_INFO", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_FRAG_T_FRAG_INFO},\ - {"ID", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_FRAG_T_ID},\ - {"NEXT_HEADER", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_FRAG_T_NEXT_HEADER},\ - {"RESERVED", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_FRAG_T_RESERVED},\ - {"frag_t fid count", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_FRAG_T_FID_COUNT} - -/*! - * \name GBP_ETHERNET_SHIM_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GBP_ETHERNET_SHIM_T_ETHERTYPE 0 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GBP_ETHERNET_SHIM_T_FLAGS 1 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GBP_ETHERNET_SHIM_T_RESERVED 2 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GBP_ETHERNET_SHIM_T_SID 3 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GBP_ETHERNET_SHIM_T_SUBTYPE 4 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GBP_ETHERNET_SHIM_T_VER 5 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT 6 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GBP_ETHERNET_SHIM_T_FIELD_NAME_MAP_INIT \ - {"ETHERTYPE", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GBP_ETHERNET_SHIM_T_ETHERTYPE},\ - {"FLAGS", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GBP_ETHERNET_SHIM_T_FLAGS},\ - {"RESERVED", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GBP_ETHERNET_SHIM_T_RESERVED},\ - {"SID", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GBP_ETHERNET_SHIM_T_SID},\ - {"SUBTYPE", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GBP_ETHERNET_SHIM_T_SUBTYPE},\ - {"VER", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GBP_ETHERNET_SHIM_T_VER},\ - {"gbp_ethernet_shim_t fid count", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT} - -/*! - * \name GENERIC_LOOPBACK_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ 0 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE 1 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ 2 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS 3 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE 4 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY 5 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL 6 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ 7 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0 8 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1 9 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ 10 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1 11 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 12 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GENERIC_LOOPBACK_T_SRC_SUBPORT_NUM 13 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE 14 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT 15 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \ - {"DESTINATION_OBJ", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\ - {"DESTINATION_TYPE", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\ - {"ENTROPY_OBJ", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\ - {"FLAGS", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\ - {"HEADER_TYPE", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\ - {"INPUT_PRIORITY", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\ - {"INTERFACE_CTRL", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\ - {"INTERFACE_OBJ", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\ - {"PROCESSING_CTRL_0", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\ - {"PROCESSING_CTRL_1", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\ - {"QOS_OBJ", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\ - {"RESERVED_1", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\ - {"SOURCE_SYSTEM_PORT", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\ - {"SRC_SUBPORT_NUM", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GENERIC_LOOPBACK_T_SRC_SUBPORT_NUM},\ - {"START_BYTE", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\ - {"generic_loopback_t fid count", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT} - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP 0 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF 1 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED 2 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP 3 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP 4 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP 5 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP 6 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP 7 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__SINGLE_PTR 8 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__UNDERLAY_ECMP 11 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__OL_ECMP_MEMBER_EXT 12 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__TUNNEL 0 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__GENERIC 1 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__NOOP 0 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__VFI 1 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__L3_IIF 2 - -/*! - * \name GPE_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GPE_T_FLAGS 0 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GPE_T_NEXT_PROTOCOL 1 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GPE_T_RESERVED0 2 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GPE_T_RESERVED1 3 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GPE_T_VNI 4 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GPE_T_FID_COUNT 5 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT \ - {"FLAGS", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GPE_T_FLAGS},\ - {"NEXT_PROTOCOL", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GPE_T_NEXT_PROTOCOL},\ - {"RESERVED0", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GPE_T_RESERVED0},\ - {"RESERVED1", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GPE_T_RESERVED1},\ - {"VNI", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GPE_T_VNI},\ - {"gpe_t fid count", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GPE_T_FID_COUNT} - -/*! - * \name GRE_CHKSUM_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM 0 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GRE_CHKSUM_T_OFFSET 1 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT 2 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT \ - {"CHECKSUM", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM},\ - {"OFFSET", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GRE_CHKSUM_T_OFFSET},\ - {"gre_chksum_t fid count", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT} - -/*! - * \name GRE_KEY_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GRE_KEY_T_VN_ID_LOWER_ENTROPY 0 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GRE_KEY_T_VN_ID_UPPER 1 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GRE_KEY_T_FID_COUNT 2 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT \ - {"VN_ID_LOWER_ENTROPY", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GRE_KEY_T_VN_ID_LOWER_ENTROPY},\ - {"VN_ID_UPPER", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GRE_KEY_T_VN_ID_UPPER},\ - {"gre_key_t fid count", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GRE_KEY_T_FID_COUNT} - -/*! - * \name GRE_ROUT_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GRE_ROUT_T_ROUTING 0 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GRE_ROUT_T_FID_COUNT 1 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT \ - {"ROUTING", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GRE_ROUT_T_ROUTING},\ - {"gre_rout_t fid count", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GRE_ROUT_T_FID_COUNT} - -/*! - * \name GRE_SEQ_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GRE_SEQ_T_SEQUENCE 0 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GRE_SEQ_T_FID_COUNT 1 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT \ - {"SEQUENCE", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GRE_SEQ_T_SEQUENCE},\ - {"gre_seq_t fid count", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GRE_SEQ_T_FID_COUNT} - -/*! - * \name GRE_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GRE_T_C_R_K_S 0 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GRE_T_PROTOCOL 1 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GRE_T_RESERVED 2 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GRE_T_VERSION 3 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GRE_T_FID_COUNT 4 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT \ - {"C_R_K_S", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GRE_T_C_R_K_S},\ - {"PROTOCOL", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GRE_T_PROTOCOL},\ - {"RESERVED", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GRE_T_RESERVED},\ - {"VERSION", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GRE_T_VERSION},\ - {"gre_t fid count", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GRE_T_FID_COUNT} - -/*! - * \name HG3_BASE_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_HG3_BASE_T_CN 0 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_HG3_BASE_T_CNG 1 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_HG3_BASE_T_ENTROPY 2 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_HG3_BASE_T_EXT_HDR_PRESENT 3 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_HG3_BASE_T_HG3_RESERVED 4 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_HG3_BASE_T_L3_ROUTED 5 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_HG3_BASE_T_MIRROR_COPY 6 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_HG3_BASE_T_RESERVED_ETYPE 7 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION 8 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION_TYPE 9 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_HG3_BASE_T_SYSTEM_SOURCE 10 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_HG3_BASE_T_TC 11 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_HG3_BASE_T_VERSION 12 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_HG3_BASE_T_FID_COUNT 13 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_HG3_BASE_T_FIELD_NAME_MAP_INIT \ - {"CN", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_HG3_BASE_T_CN},\ - {"CNG", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_HG3_BASE_T_CNG},\ - {"ENTROPY", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_HG3_BASE_T_ENTROPY},\ - {"EXT_HDR_PRESENT", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_HG3_BASE_T_EXT_HDR_PRESENT},\ - {"HG3_RESERVED", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_HG3_BASE_T_HG3_RESERVED},\ - {"L3_ROUTED", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_HG3_BASE_T_L3_ROUTED},\ - {"MIRROR_COPY", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_HG3_BASE_T_MIRROR_COPY},\ - {"RESERVED_ETYPE", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_HG3_BASE_T_RESERVED_ETYPE},\ - {"SYSTEM_DESTINATION", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION},\ - {"SYSTEM_DESTINATION_TYPE", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_HG3_BASE_T_SYSTEM_DESTINATION_TYPE},\ - {"SYSTEM_SOURCE", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_HG3_BASE_T_SYSTEM_SOURCE},\ - {"TC", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_HG3_BASE_T_TC},\ - {"VERSION", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_HG3_BASE_T_VERSION},\ - {"hg3_base_t fid count", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_HG3_BASE_T_FID_COUNT} - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__NO_OP 0 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L2_OIF 1 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__RESERVED 2 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__VP 3 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__ECMP 4 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__NHOP 5 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L2MC_GROUP 6 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__L3MC_GROUP 7 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__SINGLE_PTR 8 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__ECMP_MEMBER 9 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__DEVICE_PORT 10 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__UNDERLAY_ECMP 11 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_HG3_BASE_T_DESTINATION_TYPE__OL_ECMP_MEMBER_EXT 12 - -/*! - * \name HG3_EXTENSION_0_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_LSB 0 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_MSB 1 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_HG3_EXTENSION_0_T_DVP_OR_L3_IIF 2 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_HG3_EXTENSION_0_T_FLAGS 3 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_HG3_EXTENSION_0_T_FORWARDING_DOMAIN 4 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_HG3_EXTENSION_0_T_SVP 5 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT 6 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_HG3_EXTENSION_0_T_FIELD_NAME_MAP_INIT \ - {"CLASS_ID_LSB", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_LSB},\ - {"CLASS_ID_MSB", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_HG3_EXTENSION_0_T_CLASS_ID_MSB},\ - {"DVP_OR_L3_IIF", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_HG3_EXTENSION_0_T_DVP_OR_L3_IIF},\ - {"FLAGS", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_HG3_EXTENSION_0_T_FLAGS},\ - {"FORWARDING_DOMAIN", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_HG3_EXTENSION_0_T_FORWARDING_DOMAIN},\ - {"SVP", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_HG3_EXTENSION_0_T_SVP},\ - {"hg3_extension_0_t fid count", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT} - -/*! - * \name HOP_BY_HOP_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN 0 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER 1 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_HOP_BY_HOP_T_OPTION 2 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT 3 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT \ - {"HDR_EXT_LEN", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN},\ - {"NEXT_HEADER", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER},\ - {"OPTION", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_HOP_BY_HOP_T_OPTION},\ - {"hop_by_hop_t fid count", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT} - -/*! - * \name ICMP_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ICMP_T_CHECKSUM 0 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ICMP_T_CODE 1 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ICMP_T_ICMP_TYPE 2 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ICMP_T_FID_COUNT 3 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \ - {"CHECKSUM", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ICMP_T_CHECKSUM},\ - {"CODE", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ICMP_T_CODE},\ - {"ICMP_TYPE", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ICMP_T_ICMP_TYPE},\ - {"icmp_t fid count", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ICMP_T_FID_COUNT} - -/*! - * \name IFA_HEADER_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IFA_HEADER_T_FLAGS 0 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IFA_HEADER_T_GNS 1 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH 2 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IFA_HEADER_T_NEXT_HDR 3 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IFA_HEADER_T_VER 4 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IFA_HEADER_T_FID_COUNT 5 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT \ - {"FLAGS", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IFA_HEADER_T_FLAGS},\ - {"GNS", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IFA_HEADER_T_GNS},\ - {"MAX_LENGTH", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH},\ - {"NEXT_HDR", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IFA_HEADER_T_NEXT_HDR},\ - {"VER", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IFA_HEADER_T_VER},\ - {"ifa_header_t fid count", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IFA_HEADER_T_FID_COUNT} - -/*! - * \name IFA_METADATA_A_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IFA_METADATA_A_T_CN 0 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IFA_METADATA_A_T_FWD_HDR_TTL 1 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IFA_METADATA_A_T_LNS_DEVICE_ID 2 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IFA_METADATA_A_T_PORT_SPEED 3 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IFA_METADATA_A_T_QUEUE_ID 4 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IFA_METADATA_A_T_RX_TIMESTAMP_SEC 5 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT 6 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IFA_METADATA_A_T_FIELD_NAME_MAP_INIT \ - {"CN", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IFA_METADATA_A_T_CN},\ - {"FWD_HDR_TTL", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IFA_METADATA_A_T_FWD_HDR_TTL},\ - {"LNS_DEVICE_ID", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IFA_METADATA_A_T_LNS_DEVICE_ID},\ - {"PORT_SPEED", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IFA_METADATA_A_T_PORT_SPEED},\ - {"QUEUE_ID", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IFA_METADATA_A_T_QUEUE_ID},\ - {"RX_TIMESTAMP_SEC", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IFA_METADATA_A_T_RX_TIMESTAMP_SEC},\ - {"ifa_metadata_a_t fid count", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT} - -/*! - * \name IFA_METADATA_B_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IFA_METADATA_B_T_EGRESS_PORT_ID 0 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IFA_METADATA_B_T_INGRESS_PORT_ID 1 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IFA_METADATA_B_T_MMU_STAT_0 2 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IFA_METADATA_B_T_MMU_STAT_1 3 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IFA_METADATA_B_T_RESIDENCE_TIME_NANOSEC 4 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IFA_METADATA_B_T_RX_TIMESTAMP_NANOSEC 5 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IFA_METADATA_B_T_TX_QUEUE_BYTE_COUNT 6 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT 7 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IFA_METADATA_B_T_FIELD_NAME_MAP_INIT \ - {"EGRESS_PORT_ID", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IFA_METADATA_B_T_EGRESS_PORT_ID},\ - {"INGRESS_PORT_ID", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IFA_METADATA_B_T_INGRESS_PORT_ID},\ - {"MMU_STAT_0", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IFA_METADATA_B_T_MMU_STAT_0},\ - {"MMU_STAT_1", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IFA_METADATA_B_T_MMU_STAT_1},\ - {"RESIDENCE_TIME_NANOSEC", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IFA_METADATA_B_T_RESIDENCE_TIME_NANOSEC},\ - {"RX_TIMESTAMP_NANOSEC", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IFA_METADATA_B_T_RX_TIMESTAMP_NANOSEC},\ - {"TX_QUEUE_BYTE_COUNT", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IFA_METADATA_B_T_TX_QUEUE_BYTE_COUNT},\ - {"ifa_metadata_b_t fid count", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT} - -/*! - * \name IFA_METADATA_BASE_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IFA_METADATA_BASE_T_ACTION_VECTOR 0 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IFA_METADATA_BASE_T_HOP_LIMIT_CURRENT_LENGTH 1 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IFA_METADATA_BASE_T_REQUEST_VECTOR 2 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT 3 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IFA_METADATA_BASE_T_FIELD_NAME_MAP_INIT \ - {"ACTION_VECTOR", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IFA_METADATA_BASE_T_ACTION_VECTOR},\ - {"HOP_LIMIT_CURRENT_LENGTH", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IFA_METADATA_BASE_T_HOP_LIMIT_CURRENT_LENGTH},\ - {"REQUEST_VECTOR", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IFA_METADATA_BASE_T_REQUEST_VECTOR},\ - {"ifa_metadata_base_t fid count", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT} - -/*! - * \name IGMP_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IGMP_T_CHECKSUM 0 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IGMP_T_GROUP_ADDRESS 1 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IGMP_T_IGMP_TYPE 2 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IGMP_T_MAX_RESP_TIME 3 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IGMP_T_FID_COUNT 4 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT \ - {"CHECKSUM", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IGMP_T_CHECKSUM},\ - {"GROUP_ADDRESS", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IGMP_T_GROUP_ADDRESS},\ - {"IGMP_TYPE", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IGMP_T_IGMP_TYPE},\ - {"MAX_RESP_TIME", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IGMP_T_MAX_RESP_TIME},\ - {"igmp_t fid count", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IGMP_T_FID_COUNT} - -/*! - * \name IOAM_E2E_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IOAM_E2E_T_IOAM_E2E_DATA 0 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IOAM_E2E_T_IOAM_E2E_TYPE 1 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IOAM_E2E_T_IOAM_HDR_LEN 2 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IOAM_E2E_T_NAMESPACE_ID 3 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IOAM_E2E_T_NEXT_PROTOCOL 4 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IOAM_E2E_T_RESERVED 5 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IOAM_E2E_T_TYPE 6 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IOAM_E2E_T_FID_COUNT 7 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IOAM_E2E_T_FIELD_NAME_MAP_INIT \ - {"IOAM_E2E_DATA", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IOAM_E2E_T_IOAM_E2E_DATA},\ - {"IOAM_E2E_TYPE", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IOAM_E2E_T_IOAM_E2E_TYPE},\ - {"IOAM_HDR_LEN", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IOAM_E2E_T_IOAM_HDR_LEN},\ - {"NAMESPACE_ID", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IOAM_E2E_T_NAMESPACE_ID},\ - {"NEXT_PROTOCOL", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IOAM_E2E_T_NEXT_PROTOCOL},\ - {"RESERVED", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IOAM_E2E_T_RESERVED},\ - {"TYPE", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IOAM_E2E_T_TYPE},\ - {"ioam_e2e_t fid count", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IOAM_E2E_T_FID_COUNT} - -/*! - * \name IPFIX_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IPFIX_T_EXPORT_TIME 0 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IPFIX_T_LENGTH 1 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IPFIX_T_SEQUENCE_NUM 3 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IPFIX_T_VERSION 4 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IPFIX_T_FID_COUNT 5 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \ - {"EXPORT_TIME", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IPFIX_T_EXPORT_TIME},\ - {"LENGTH", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IPFIX_T_LENGTH},\ - {"OBS_DOMAIN_ID", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\ - {"SEQUENCE_NUM", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IPFIX_T_SEQUENCE_NUM},\ - {"VERSION", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IPFIX_T_VERSION},\ - {"ipfix_t fid count", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IPFIX_T_FID_COUNT} - -/*! - * \name IPV4_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IPV4_T_DA 0 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IPV4_T_HDR_CHECKSUM 2 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IPV4_T_ID 3 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IPV4_T_OPTION 4 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IPV4_T_PROTOCOL 5 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IPV4_T_SA 6 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IPV4_T_TOS 7 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IPV4_T_TOTAL_LENGTH 8 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IPV4_T_TTL 9 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IPV4_T_VERSION_HDR_LEN 10 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IPV4_T_FID_COUNT 11 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \ - {"DA", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IPV4_T_DA},\ - {"FLAGS_FRAG_OFFSET", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\ - {"HDR_CHECKSUM", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IPV4_T_HDR_CHECKSUM},\ - {"ID", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IPV4_T_ID},\ - {"OPTION", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IPV4_T_OPTION},\ - {"PROTOCOL", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IPV4_T_PROTOCOL},\ - {"SA", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IPV4_T_SA},\ - {"TOS", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IPV4_T_TOS},\ - {"TOTAL_LENGTH", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IPV4_T_TOTAL_LENGTH},\ - {"TTL", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IPV4_T_TTL},\ - {"VERSION_HDR_LEN", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IPV4_T_VERSION_HDR_LEN},\ - {"ipv4_t fid count", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IPV4_T_FID_COUNT} - -/*! - * \name IPV6_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IPV6_T_DA 0 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IPV6_T_FLOW_LABEL 1 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IPV6_T_HOP_LIMIT 2 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IPV6_T_NEXT_HEADER 3 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IPV6_T_SA 5 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IPV6_T_TRAFFIC_CLASS 6 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IPV6_T_VERSION 7 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IPV6_T_FID_COUNT 8 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \ - {"DA", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IPV6_T_DA},\ - {"FLOW_LABEL", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IPV6_T_FLOW_LABEL},\ - {"HOP_LIMIT", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IPV6_T_HOP_LIMIT},\ - {"NEXT_HEADER", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IPV6_T_NEXT_HEADER},\ - {"PAYLOAD_LENGTH", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\ - {"SA", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IPV6_T_SA},\ - {"TRAFFIC_CLASS", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IPV6_T_TRAFFIC_CLASS},\ - {"VERSION", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IPV6_T_VERSION},\ - {"ipv6_t fid count", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IPV6_T_FID_COUNT} - -/*! - * \name L2_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_L2_T_MACDA 0 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_L2_T_MACSA 1 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_L2_T_FID_COUNT 2 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \ - {"MACDA", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_L2_T_MACDA},\ - {"MACSA", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_L2_T_MACSA},\ - {"l2_t fid count", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_L2_T_FID_COUNT} - -/*! - * \name MAC_IN_MAC_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MAC_IN_MAC_T_FLAGS 0 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MAC_IN_MAC_T_ISID 1 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MAC_IN_MAC_T_PCP_DE 2 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MAC_IN_MAC_T_FID_COUNT 3 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MAC_IN_MAC_T_FIELD_NAME_MAP_INIT \ - {"FLAGS", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MAC_IN_MAC_T_FLAGS},\ - {"ISID", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MAC_IN_MAC_T_ISID},\ - {"PCP_DE", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MAC_IN_MAC_T_PCP_DE},\ - {"mac_in_mac_t fid count", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MAC_IN_MAC_T_FID_COUNT} - -/*! - * \name MIM_GBP_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MIM_GBP_T_GBP_SID 0 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MIM_GBP_T_TPID 1 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MIM_GBP_T_FID_COUNT 2 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MIM_GBP_T_FIELD_NAME_MAP_INIT \ - {"GBP_SID", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MIM_GBP_T_GBP_SID},\ - {"TPID", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MIM_GBP_T_TPID},\ - {"mim_gbp_t fid count", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MIM_GBP_T_FID_COUNT} - -/*! - * \name MIRROR_ERSPAN_SN_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT 1 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \ - {"SEQ_NUM", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\ - {"mirror_erspan_sn_t fid count", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT} - -/*! - * \name MIRROR_TRANSPORT_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MIRROR_TRANSPORT_T_DATA 0 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT 1 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \ - {"DATA", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MIRROR_TRANSPORT_T_DATA},\ - {"mirror_transport_t fid count", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT} - -/*! - * \name MPLS_ACH_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE 0 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MPLS_ACH_T_CW_TYPE 1 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MPLS_ACH_T_RESERVED 2 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MPLS_ACH_T_VERSION 3 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MPLS_ACH_T_FID_COUNT 4 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT \ - {"CHANNEL_TYPE", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE},\ - {"CW_TYPE", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MPLS_ACH_T_CW_TYPE},\ - {"RESERVED", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MPLS_ACH_T_RESERVED},\ - {"VERSION", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MPLS_ACH_T_VERSION},\ - {"mpls_ach_t fid count", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MPLS_ACH_T_FID_COUNT} - -/*! - * \name MPLS_BV_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MPLS_BV_T_VALUE 0 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MPLS_BV_T_FID_COUNT 1 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT \ - {"VALUE", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MPLS_BV_T_VALUE},\ - {"mpls_bv_t fid count", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MPLS_BV_T_FID_COUNT} - -/*! - * \name MPLS_CW_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MPLS_CW_T_CW_TYPE 0 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MPLS_CW_T_RESERVED 1 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER 2 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MPLS_CW_T_FID_COUNT 3 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT \ - {"CW_TYPE", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MPLS_CW_T_CW_TYPE},\ - {"RESERVED", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MPLS_CW_T_RESERVED},\ - {"SEQ_NUMBER", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER},\ - {"mpls_cw_t fid count", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MPLS_CW_T_FID_COUNT} - -/*! - * \name MPLS_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MPLS_T_BOS 0 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MPLS_T_EXP 1 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MPLS_T_LABEL 2 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MPLS_T_TTL 3 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MPLS_T_FID_COUNT 4 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT \ - {"BOS", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MPLS_T_BOS},\ - {"EXP", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MPLS_T_EXP},\ - {"LABEL", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MPLS_T_LABEL},\ - {"TTL", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MPLS_T_TTL},\ - {"mpls_t fid count", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MPLS_T_FID_COUNT} - -/*! - * \name P_1588_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_P_1588_T_CNTRL 0 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_P_1588_T_CORRECTION 1 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_P_1588_T_DOMAIN_NB 2 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_P_1588_T_FLAGS 3 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_P_1588_T_LOGMSGINTERVAL 4 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_P_1588_T_MSG_LENGTH 5 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_P_1588_T_MSG_TYPE 6 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_P_1588_T_RESERVED1 7 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_P_1588_T_RESERVED2 8 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_P_1588_T_RESERVED3 9 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_P_1588_T_SEQ_ID 10 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_P_1588_T_SRCPORTID 11 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_P_1588_T_TRANSPORTSPEC 12 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_P_1588_T_VERSION 13 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_P_1588_T_FID_COUNT 14 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT \ - {"CNTRL", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_P_1588_T_CNTRL},\ - {"CORRECTION", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_P_1588_T_CORRECTION},\ - {"DOMAIN_NB", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_P_1588_T_DOMAIN_NB},\ - {"FLAGS", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_P_1588_T_FLAGS},\ - {"LOGMSGINTERVAL", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_P_1588_T_LOGMSGINTERVAL},\ - {"MSG_LENGTH", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_P_1588_T_MSG_LENGTH},\ - {"MSG_TYPE", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_P_1588_T_MSG_TYPE},\ - {"RESERVED1", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_P_1588_T_RESERVED1},\ - {"RESERVED2", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_P_1588_T_RESERVED2},\ - {"RESERVED3", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_P_1588_T_RESERVED3},\ - {"SEQ_ID", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_P_1588_T_SEQ_ID},\ - {"SRCPORTID", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_P_1588_T_SRCPORTID},\ - {"TRANSPORTSPEC", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_P_1588_T_TRANSPORTSPEC},\ - {"VERSION", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_P_1588_T_VERSION},\ - {"p_1588_t fid count", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_P_1588_T_FID_COUNT} - -/*! - * \name PIM_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PIM_T_HDR_BYTES_0_1 0 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PIM_T_HDR_BYTES_2_3 1 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PIM_T_HDR_BYTES_4_5 2 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PIM_T_HDR_BYTES_6_7 3 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PIM_T_FID_COUNT 4 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PIM_T_FIELD_NAME_MAP_INIT \ - {"HDR_BYTES_0_1", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PIM_T_HDR_BYTES_0_1},\ - {"HDR_BYTES_2_3", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PIM_T_HDR_BYTES_2_3},\ - {"HDR_BYTES_4_5", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PIM_T_HDR_BYTES_4_5},\ - {"HDR_BYTES_6_7", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PIM_T_HDR_BYTES_6_7},\ - {"pim_t fid count", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PIM_T_FID_COUNT} - -/*! - * \name PROG_EXT_HDR_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN 0 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER 1 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PROG_EXT_HDR_T_OPTION 2 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT 3 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT \ - {"HDR_EXT_LEN", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PROG_EXT_HDR_T_HDR_EXT_LEN},\ - {"NEXT_HEADER", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PROG_EXT_HDR_T_NEXT_HEADER},\ - {"OPTION", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PROG_EXT_HDR_T_OPTION},\ - {"prog_ext_hdr_t fid count", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT} - -/*! - * \name PSAMP_0_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_0_T_FLOWSET 0 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_0_T_LENGTH 1 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX 2 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS 3 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_0_T_OBS_TIME_S 4 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID 5 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_0_T_FID_COUNT 6 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT \ - {"FLOWSET", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_0_T_FLOWSET},\ - {"LENGTH", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_0_T_LENGTH},\ - {"NEXT_HOP_INDEX", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX},\ - {"OBS_TIME_NS", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS},\ - {"OBS_TIME_S", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_0_T_OBS_TIME_S},\ - {"TEMPLATE_ID", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID},\ - {"psamp_0_t fid count", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_0_T_FID_COUNT} - -/*! - * \name PSAMP_1_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_1_T_DLB_ID 0 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_1_T_EGRESS_PORT 1 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_1_T_EPOCH 2 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_1_T_INGRESS_PORT 3 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH 4 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_1_T_USER_META_DATA 5 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG 6 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_1_T_FID_COUNT 7 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT \ - {"DLB_ID", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_1_T_DLB_ID},\ - {"EGRESS_PORT", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_1_T_EGRESS_PORT},\ - {"EPOCH", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_1_T_EPOCH},\ - {"INGRESS_PORT", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_1_T_INGRESS_PORT},\ - {"SAMPLED_LENGTH", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH},\ - {"USER_META_DATA", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_1_T_USER_META_DATA},\ - {"VARIABLE_FLAG", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG},\ - {"psamp_1_t fid count", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_1_T_FID_COUNT} - -/*! - * \name PSAMP_MIRROR_ON_DROP_0_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT 1 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH 2 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS 3 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S 4 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID 5 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID 6 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT 7 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \ - {"EGRESS_MOD_PORT", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\ - {"INGRESS_PORT", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\ - {"LENGTH", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\ - {"OBS_TIME_NS", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\ - {"OBS_TIME_S", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\ - {"SWITCH_ID", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\ - {"TEMPLATE_ID", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\ - {"psamp_mirror_on_drop_0_t fid count", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT} - -/*! - * \name PSAMP_MIRROR_ON_DROP_3_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON 0 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0 1 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH 2 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE 3 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX 4 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA 5 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR 6 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT 7 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT \ - {"DROP_REASON", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON},\ - {"RESERVED_0", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0},\ - {"SAMPLED_LENGTH", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH},\ - {"SMOD_STATE", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE},\ - {"UC_COS__COLOR__PROB_IDX", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX},\ - {"USER_META_DATA", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA},\ - {"VAR_LEN_INDICATOR", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR},\ - {"psamp_mirror_on_drop_3_t fid count", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT} - -/*! - * \name RARP_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RARP_T_HARDWARE_LEN 0 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RARP_T_HARDWARE_TYPE 1 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RARP_T_OPERATION 2 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RARP_T_PROT_ADDR_LEN 3 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RARP_T_PROTOCOL_TYPE 4 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RARP_T_SENDER_HA 5 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RARP_T_SENDER_IP 6 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RARP_T_TARGET_HA 7 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RARP_T_TARGET_IP 8 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RARP_T_FID_COUNT 9 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \ - {"HARDWARE_LEN", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RARP_T_HARDWARE_LEN},\ - {"HARDWARE_TYPE", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RARP_T_HARDWARE_TYPE},\ - {"OPERATION", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RARP_T_OPERATION},\ - {"PROT_ADDR_LEN", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RARP_T_PROT_ADDR_LEN},\ - {"PROTOCOL_TYPE", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RARP_T_PROTOCOL_TYPE},\ - {"SENDER_HA", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RARP_T_SENDER_HA},\ - {"SENDER_IP", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RARP_T_SENDER_IP},\ - {"TARGET_HA", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RARP_T_TARGET_HA},\ - {"TARGET_IP", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RARP_T_TARGET_IP},\ - {"rarp_t fid count", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RARP_T_FID_COUNT} - -/*! - * \name ROUTING_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ROUTING_T_DATA 0 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ROUTING_T_HDR_EXT_LEN 1 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ROUTING_T_NEXT_HEADER 2 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ROUTING_T_ROUTING_TYPE 3 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT 4 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ROUTING_T_FID_COUNT 5 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT \ - {"DATA", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ROUTING_T_DATA},\ - {"HDR_EXT_LEN", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ROUTING_T_HDR_EXT_LEN},\ - {"NEXT_HEADER", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ROUTING_T_NEXT_HEADER},\ - {"ROUTING_TYPE", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ROUTING_T_ROUTING_TYPE},\ - {"SEGMENTS_LEFT", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT},\ - {"routing_t fid count", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ROUTING_T_FID_COUNT} - -/*! - * \name SFLOW_SHIM_0_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION 0 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE 1 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_SFLOW_SHIM_0_T_VERSION 2 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT 3 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT \ - {"SYS_DESTINATION", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION},\ - {"SYS_SOURCE", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE},\ - {"VERSION", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_SFLOW_SHIM_0_T_VERSION},\ - {"sflow_shim_0_t fid count", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT} - -/*! - * \name SFLOW_SHIM_1_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE 0 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED 1 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE 2 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST 3 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE 4 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED 5 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED 6 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE 7 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT 8 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT \ - {"FLAG_DEST_SAMPLE", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE},\ - {"FLAG_DISCARDED", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED},\ - {"FLAG_FLEX_SAMPLE", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE},\ - {"FLAG_MCAST", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST},\ - {"FLAG_SRC_SAMPLE", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE},\ - {"FLAG_TRUNCATED", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED},\ - {"RESERVED", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED},\ - {"SYS_OPCODE", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE},\ - {"sflow_shim_1_t fid count", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT} - -/*! - * \name SFLOW_SHIM_2_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM 0 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA 1 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT 2 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT \ - {"SEQUENCE_NUM", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM},\ - {"USER_META_DATA", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA},\ - {"sflow_shim_2_t fid count", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT} - -/*! - * \name SNAP_LLC_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_SNAP_LLC_T_LENGTH 0 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_SNAP_LLC_T_SNAP_LLC 1 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_SNAP_LLC_T_FID_COUNT 2 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT \ - {"LENGTH", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_SNAP_LLC_T_LENGTH},\ - {"SNAP_LLC", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_SNAP_LLC_T_SNAP_LLC},\ - {"snap_llc_t fid count", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_SNAP_LLC_T_FID_COUNT} - -/*! - * \name SVTAG_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_SVTAG_T_DATA_LWR 0 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_SVTAG_T_DATA_UPR 1 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_SVTAG_T_FID_COUNT 2 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_SVTAG_T_FIELD_NAME_MAP_INIT \ - {"DATA_LWR", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_SVTAG_T_DATA_LWR},\ - {"DATA_UPR", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_SVTAG_T_DATA_UPR},\ - {"svtag_t fid count", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_SVTAG_T_FID_COUNT} - -/*! - * \name TCP_FIRST_4BYTES_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT 2 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \ - {"DST_PORT", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\ - {"SRC_PORT", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\ - {"tcp_first_4bytes_t fid count", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT} - -/*! - * \name TCP_LAST_16BYTES_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM 0 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM 1 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM 3 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR 4 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE 5 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT 6 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \ - {"ACK_NUM", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\ - {"CHECKSUM", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\ - {"HDR_LEN_AND_FLAGS", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\ - {"SEQ_NUM", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\ - {"URGENT_PTR", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\ - {"WIN_SIZE", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\ - {"tcp_last_16bytes_t fid count", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT} - -/*! - * \name UDP_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_UDP_T_CHECKSUM 0 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_UDP_T_DST_PORT 1 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_UDP_T_SRC_PORT 2 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_UDP_T_UDP_LENGTH 3 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_UDP_T_FID_COUNT 4 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \ - {"CHECKSUM", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_UDP_T_CHECKSUM},\ - {"DST_PORT", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_UDP_T_DST_PORT},\ - {"SRC_PORT", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_UDP_T_SRC_PORT},\ - {"UDP_LENGTH", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_UDP_T_UDP_LENGTH},\ - {"udp_t fid count", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_UDP_T_FID_COUNT} - -/*! - * \name UNKNOWN_L3_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD 1 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT 2 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \ - {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\ - {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\ - {"unknown_l3_t fid count", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT} - -/*! - * \name UNKNOWN_L4_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT 1 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \ - {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\ - {"unknown_l4_t fid count", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT} - -/*! - * \name UNKNOWN_L5_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_8_9 3 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT 4 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \ - {"L5_BYTES_0_1", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\ - {"L5_BYTES_2_3", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\ - {"L5_BYTES_4_7", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\ - {"L5_BYTES_8_9", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_8_9},\ - {"unknown_l5_t fid count", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT} - -/*! - * \name VLAN_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_VLAN_T_CFI 0 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_VLAN_T_PCP 1 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_VLAN_T_TPID 2 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_VLAN_T_VID 3 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_VLAN_T_FID_COUNT 4 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \ - {"CFI", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_VLAN_T_CFI},\ - {"PCP", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_VLAN_T_PCP},\ - {"TPID", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_VLAN_T_TPID},\ - {"VID", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_VLAN_T_VID},\ - {"vlan_t fid count", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_VLAN_T_FID_COUNT} - -/*! - * \name VXLAN_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_VXLAN_T_RESERVED2 1 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_VXLAN_T_VN_ID 2 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_VXLAN_T_FID_COUNT 3 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \ - {"FLAGS_RESERVED_1", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\ - {"RESERVED2", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_VXLAN_T_RESERVED2},\ - {"VN_ID", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_VXLAN_T_VN_ID},\ - {"vxlan_t fid count", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_VXLAN_T_FID_COUNT} - -/*! - * \name WESP_T field IDs. - */ -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_WESP_T_FLAGS 0 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_WESP_T_HEADER_LEN 1 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_WESP_T_NEXT_HEADER 2 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_WESP_T_SEQ_NUM 3 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_WESP_T_SPI 4 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_WESP_T_TRAILER_LEN 5 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_WESP_T_WESP_IV 6 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_WESP_T_FID_COUNT 7 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT \ - {"FLAGS", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_WESP_T_FLAGS},\ - {"HEADER_LEN", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_WESP_T_HEADER_LEN},\ - {"NEXT_HEADER", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_WESP_T_NEXT_HEADER},\ - {"SEQ_NUM", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_WESP_T_SEQ_NUM},\ - {"SPI", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_WESP_T_SPI},\ - {"TRAILER_LEN", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_WESP_T_TRAILER_LEN},\ - {"WESP_IV", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_WESP_T_WESP_IV},\ - {"wesp_t fid count", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_WESP_T_FID_COUNT} - - -#endif /* BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_FLEXHDR_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_34_8_0/bcm56890_a0_dna_6_5_34_8_0_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_34_8_0/bcm56890_a0_dna_6_5_34_8_0_bcmpkt_rxpmd_flex_data.h deleted file mode 100644 index 22504cd0dd5..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_34_8_0/bcm56890_a0_dna_6_5_34_8_0_bcmpkt_rxpmd_flex_data.h +++ /dev/null @@ -1,193 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) map.yml. - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - -#ifndef BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_DATA_H -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_DATA_H - -/*! - * \name RX flex metadata field IDs. - */ -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_BSCAN_CONTROL_DATA_15_0 0 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_BSCAN_CONTROL_FLAGS_3_0 1 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0 2 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_DNAT_CTRL_3_0 3 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0 4 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_DVP_15_0 5 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_AND_SNAT_CTRL_15_0 6 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0 7 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0 8 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0 9 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0 10 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0 11 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0 12 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16 13 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0 14 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16 15 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32 16 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_FLOW_ID_LSB_15_0 17 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_FLOW_ID_MSB_3_0 18 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0 19 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0 20 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0 21 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0 22 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16 23 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_INGRESS_DEVICE_PORT_8_0 24 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 25 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0 26 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0 27 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_L2_IIF_12_0 28 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_L2_OIF_12_0 29 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_L3_DNAT_INDEX_15_0 30 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0 31 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0 32 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_L3_SNAT_INDEX_15_0 33 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_MAC_DA_23_20_3_0 34 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_MPLS_LABEL_DECAP_COUNT_3_0 35 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0 36 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0 37 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0 38 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0 39 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_SVP_15_0 40 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0 41 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_SVTAG_CTRL_PKT_INFO_3_0 42 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_SVTAG_SC_INDEX_OR_IFP_OPAQUE_OBJ_15_0 43 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_SVTAG_SC_INDEX_STR_ALLOW_NAT_3_0 44 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0 45 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0 46 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0 47 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0 48 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0 49 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_VFI_15_0 50 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0 51 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_FID_COUNT 52 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_COUNT 48 - -/*! - * \name Packet Flex Reason Types. - */ -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_BMAC_CML 0 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE 1 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS 2 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_DEFAULT 3 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED 4 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED 5 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED 6 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED 7 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP 8 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT 9 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT_HPAE_MISS 10 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_IFP 11 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER 12 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED 13 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT 14 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP 15 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS 16 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE 17 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP 18 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS 19 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR 20 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF 21 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR 22 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL 23 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD 24 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0 25 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1 26 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2 27 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3 28 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4 29 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5 30 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6 31 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7 32 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD 33 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED 34 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED 35 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU 36 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU 37 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED 38 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT 39 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP 40 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD 41 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_SVP 42 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP 43 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU 44 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR 45 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED 46 -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_VFP 47 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \ - {"BMAC_CML", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_BMAC_CML},\ - {"CB_STATION_MOVE", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE},\ - {"CML_FLAGS", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\ - {"DEFAULT", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_DEFAULT},\ - {"DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED},\ - {"DLB_ECMP_PKT_SAMPLED", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED},\ - {"DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED},\ - {"DLB_LAG_PKT_SAMPLED", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED},\ - {"DST_FP", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP},\ - {"EM_FT", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT},\ - {"EM_FT_HPAE_MISS", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT_HPAE_MISS},\ - {"IFP", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_IFP},\ - {"IFP_METER", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\ - {"IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED},\ - {"IVXLT", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\ - {"L2_DST_LOOKUP", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\ - {"L2_DST_LOOKUP_MISS", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\ - {"L2_SRC_STATIC_MOVE", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\ - {"L3_DST_LOOKUP", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\ - {"L3_DST_LOOKUP_MISS", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\ - {"L3_HDR_ERROR", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\ - {"L3_IIF_EQ_L3_OIF", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF},\ - {"L3_TTL_ERROR", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\ - {"LEARN_CACHE_FULL", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\ - {"MACSA_MULTICAST_RSVD", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD},\ - {"MATCHED_RULE_BIT_0", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0},\ - {"MATCHED_RULE_BIT_1", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1},\ - {"MATCHED_RULE_BIT_2", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2},\ - {"MATCHED_RULE_BIT_3", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3},\ - {"MATCHED_RULE_BIT_4", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4},\ - {"MATCHED_RULE_BIT_5", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5},\ - {"MATCHED_RULE_BIT_6", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6},\ - {"MATCHED_RULE_BIT_7", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7},\ - {"MEMBERSHIP_CHECK_FAILED_RSVD", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD},\ - {"MIRROR_SAMPLER_EGR_SAMPLED", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED},\ - {"MIRROR_SAMPLER_SAMPLED", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED},\ - {"MPLS_CTRL_PKT_TO_CPU", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU},\ - {"NO_COPY_TO_CPU", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\ - {"PKT_INTEGRITY_CHECK_FAILED", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\ - {"PROTOCOL_PKT", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\ - {"SER_DROP", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP},\ - {"SPANNING_TREE_CHECK_FAILED_RSVD", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD},\ - {"SVP", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_SVP},\ - {"TRACE_DOP", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\ - {"TRACE_DO_NOT_COPY_TO_CPU", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU},\ - {"TRACE_DO_NOT_MIRROR", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR},\ - {"URPF_CHECK_FAILED", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED},\ - {"VFP", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_VFP},\ - {"flex reason count", BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_COUNT} - -#endif /* BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_34_8_0/bcm56890_a0_dna_6_5_34_8_0_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_34_8_0/bcm56890_a0_dna_6_5_34_8_0_bcmpkt_rxpmd_match_id_defs.h deleted file mode 100644 index 9f3a8e214cc..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm56890_a0/dna_6_5_34_8_0/bcm56890_a0_dna_6_5_34_8_0_bcmpkt_rxpmd_match_id_defs.h +++ /dev/null @@ -1,526 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) bcm56890_a0_dna_6_5_34_8_0_sf_match_id_info.yml - * for device bcm56890_a0 and variant dna_6_5_34_8_0. - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - -#ifndef BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H - -#include - -/*! - * \brief Get the Match ID DataBase information. - * - * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information. -*/ -extern bcmpkt_rxpmd_match_id_db_info_t * - bcm56890_a0_dna_6_5_34_8_0_rxpmd_match_id_db_info_get(void); - -/*! - * \brief Get the Match ID Mapping information. - * - * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information. -*/ -extern bcmpkt_rxpmd_match_id_map_info_t * - bcm56890_a0_dna_6_5_34_8_0_rxpmd_match_id_map_info_get(void); - -/*! - \name RXPMD Match IDs -*/ -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_CNTAG 0 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM 1 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE 2 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0 3 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG 4 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 5 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_MIM_GBP 6 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE 7 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG 8 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC 9 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG 10 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP 11 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 12 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 13 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD 14 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1 15 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2 16 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT 17 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE 18 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 19 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 20 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE 21 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE 22 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM 23 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY 24 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT 25 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ 26 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1 27 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2 28 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP 29 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER 30 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE 31 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP 32 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E 33 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 34 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 35 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MAC_IN_MAC 36 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 37 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 38 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 39 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 40 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 41 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 42 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 43 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH 44 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW 45 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE 46 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 47 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1 48 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2 49 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP 50 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1 51 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2 52 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES 53 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES 54 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP 55 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDPIPSEC 56 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 57 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 58 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 59 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN 60 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1 61 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2 62 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH 63 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK 64 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE 65 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_CNTAG 66 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM 67 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE 68 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0 69 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG 70 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 71 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_MIM_GBP 72 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE 73 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG 74 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC 75 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG 76 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP 77 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 78 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 79 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD 80 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1 81 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2 82 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT 83 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE 84 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 85 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 86 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE 87 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE 88 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM 89 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY 90 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT 91 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ 92 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1 93 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2 94 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP 95 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER 96 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE 97 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP 98 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E 99 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 100 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 101 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MAC_IN_MAC 102 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 103 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 104 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 105 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 106 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 107 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 108 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 109 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH 110 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW 111 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE 112 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 113 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1 114 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2 115 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP 116 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1 117 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2 118 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES 119 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES 120 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP 121 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDPIPSEC 122 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 123 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 124 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 125 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN 126 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1 127 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2 128 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_CNTAG 129 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG 130 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 131 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE 132 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG 133 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC 134 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP 135 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 136 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 137 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD 138 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1 139 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2 140 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT 141 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE 142 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 143 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 144 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1 145 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2 146 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP 147 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER 148 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE 149 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP 150 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 151 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 152 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE 153 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 154 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1 155 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2 156 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP 157 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1 158 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2 159 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES 160 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES 161 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP 162 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 163 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 164 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 165 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1 166 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2 167 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_CNTAG 168 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM 169 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE 170 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0 171 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG 172 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 173 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_MIM_GBP 174 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE 175 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG 176 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC 177 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG 178 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP 179 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 180 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 181 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD 182 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1 183 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2 184 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT 185 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE 186 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 187 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 188 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE 189 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE 190 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM 191 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY 192 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT 193 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ 194 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1 195 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2 196 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP 197 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER 198 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE 199 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP 200 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E 201 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 202 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 203 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MAC_IN_MAC 204 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 205 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 206 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 207 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 208 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 209 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 210 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 211 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH 212 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW 213 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE 214 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 215 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1 216 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2 217 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP 218 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1 219 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2 220 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES 221 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES 222 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP 223 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDPIPSEC 224 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 225 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 226 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 227 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN 228 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1 229 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2 230 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH 231 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK 232 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE 233 -#define BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_COUNT 234 - -#define BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \ - {"EGRESS_PKT_FWD_L2_HDR_CNTAG", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_CNTAG}, \ - {"EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM}, \ - {"EGRESS_PKT_FWD_L2_HDR_HG3_BASE", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE}, \ - {"EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0}, \ - {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \ - {"EGRESS_PKT_FWD_L2_HDR_L2", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \ - {"EGRESS_PKT_FWD_L2_HDR_MIM_GBP", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_MIM_GBP}, \ - {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \ - {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \ - {"EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC}, \ - {"EGRESS_PKT_FWD_L2_HDR_SVTAG", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_BFD", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_GPE", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_GRE", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_IGMP", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MAC_IN_MAC", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MAC_IN_MAC}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_P_1588", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_UDPIPSEC", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDPIPSEC}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2}, \ - {"EGRESS_PKT_SYS_HDR_EP_NIH", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH}, \ - {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \ - {"EGRESS_PKT_SYS_HDR_NONE", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_CNTAG", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_CNTAG}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_MIM_GBP", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_MIM_GBP}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_SVTAG", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MAC_IN_MAC", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MAC_IN_MAC}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDPIPSEC", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDPIPSEC}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2}, \ - {"INGRESS_PKT_INNER_L2_HDR_CNTAG", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_CNTAG}, \ - {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \ - {"INGRESS_PKT_INNER_L2_HDR_L2", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \ - {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \ - {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \ - {"INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_BFD", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_IGMP", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_P_1588", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2}, \ - {"INGRESS_PKT_OUTER_L2_HDR_CNTAG", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_CNTAG}, \ - {"INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM}, \ - {"INGRESS_PKT_OUTER_L2_HDR_HG3_BASE", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE}, \ - {"INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0}, \ - {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \ - {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \ - {"INGRESS_PKT_OUTER_L2_HDR_MIM_GBP", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_MIM_GBP}, \ - {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \ - {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \ - {"INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC}, \ - {"INGRESS_PKT_OUTER_L2_HDR_SVTAG", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_BFD", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_GPE", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MAC_IN_MAC", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MAC_IN_MAC}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_UDPIPSEC", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDPIPSEC}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2}, \ - {"INGRESS_PKT_SYS_HDR_EP_NIH", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH}, \ - {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \ - {"INGRESS_PKT_SYS_HDR_NONE", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \ - {"rxpmd_match_id_count", BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_COUNT} - -#endif /*! BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/cna_6_5_34_2_0/bcm78800_a0_cna_6_5_34_2_0_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/cna_6_5_34_2_0/bcm78800_a0_cna_6_5_34_2_0_bcmpkt_flexhdr.h deleted file mode 100644 index d46ac0cd752..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/cna_6_5_34_2_0/bcm78800_a0_cna_6_5_34_2_0_bcmpkt_flexhdr.h +++ /dev/null @@ -1,107 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) header.yml. - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - -#ifndef BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_FLEXHDR_H -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_FLEXHDR_H - -#include - -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T 0 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T 1 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T 2 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T 3 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T 4 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T 5 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ETHERTYPE_T 6 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T 7 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ICMP_T 8 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T 9 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_A_T 10 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_B_T 11 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_BASE_T 12 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IPFIX_T 13 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T 14 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T 15 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_L2_T 16 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_MIRROR_ERSPAN_SN_T 17 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_MIRROR_TRANSPORT_T 18 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T 19 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T 20 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T 21 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T 22 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T 23 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_2_T 24 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_TCP_FIRST_4BYTES_T 25 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T 26 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_UDP_T 27 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L3_T 28 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L4_T 29 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T 30 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_VLAN_T 31 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_VXLAN_T 32 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_T 33 - -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_FLEXHDR_COUNT 34 - -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_FLEXHDR_NAME_MAP_INIT \ - {"arp_t", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T},\ - {"cpu_composites_0_t", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T},\ - {"cpu_composites_1_t", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T},\ - {"ep_nih_header_t", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T},\ - {"erspan3_fixed_hdr_t", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T},\ - {"erspan3_subhdr_5_t", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T},\ - {"ethertype_t", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ETHERTYPE_T},\ - {"generic_loopback_t", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T},\ - {"icmp_t", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ICMP_T},\ - {"ifa_header_t", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T},\ - {"ifa_metadata_a_t", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_A_T},\ - {"ifa_metadata_b_t", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_B_T},\ - {"ifa_metadata_base_t", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_BASE_T},\ - {"ipfix_t", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IPFIX_T},\ - {"ipv4_t", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T},\ - {"ipv6_t", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T},\ - {"l2_t", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_L2_T},\ - {"mirror_erspan_sn_t", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_MIRROR_ERSPAN_SN_T},\ - {"mirror_transport_t", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_MIRROR_TRANSPORT_T},\ - {"psamp_mirror_on_drop_0_t", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\ - {"psamp_mirror_on_drop_3_t", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T},\ - {"rarp_t", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T},\ - {"sflow_shim_0_t", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T},\ - {"sflow_shim_1_t", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T},\ - {"sflow_shim_2_t", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_2_T},\ - {"tcp_first_4bytes_t", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_TCP_FIRST_4BYTES_T},\ - {"tcp_last_16bytes_t", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T},\ - {"udp_t", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_UDP_T},\ - {"unknown_l3_t", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L3_T},\ - {"unknown_l4_t", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L4_T},\ - {"unknown_l5_t", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T},\ - {"vlan_t", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_VLAN_T},\ - {"vxlan_t", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_VXLAN_T},\ - {"RXPMD_FLEX_T", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_T},\ - {"flexhdr count", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_FLEXHDR_COUNT} - -#endif /* BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_FLEXHDR_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/cna_6_5_34_2_0/bcm78800_a0_cna_6_5_34_2_0_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/cna_6_5_34_2_0/bcm78800_a0_cna_6_5_34_2_0_bcmpkt_flexhdr_data.h deleted file mode 100644 index 9779e30135e..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/cna_6_5_34_2_0/bcm78800_a0_cna_6_5_34_2_0_bcmpkt_flexhdr_data.h +++ /dev/null @@ -1,703 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) header.yml. - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - -#ifndef BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_FLEXHDR_DATA_H -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_FLEXHDR_DATA_H - -/*! - * \name ARP_T field IDs. - */ -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_HARDWARE_LEN 0 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_HARDWARE_TYPE 1 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_OPERATION 2 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_PROT_ADDR_LEN 3 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_PROTOCOL_TYPE 4 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_SENDER_HA 5 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_SENDER_IP 6 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_TARGET_HA 7 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_TARGET_IP 8 - -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_FID_COUNT 9 - -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \ - {"HARDWARE_LEN", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_HARDWARE_LEN},\ - {"HARDWARE_TYPE", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_HARDWARE_TYPE},\ - {"OPERATION", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_OPERATION},\ - {"PROT_ADDR_LEN", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_PROT_ADDR_LEN},\ - {"PROTOCOL_TYPE", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_PROTOCOL_TYPE},\ - {"SENDER_HA", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_SENDER_HA},\ - {"SENDER_IP", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_SENDER_IP},\ - {"TARGET_HA", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_TARGET_HA},\ - {"TARGET_IP", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_TARGET_IP},\ - {"arp_t fid count", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_FID_COUNT} - -/*! - * \name CPU_COMPOSITES_0_T field IDs. - */ -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6 - -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT 7 - -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \ - {"DMA_CONT0", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\ - {"DMA_CONT1", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\ - {"DMA_CONT2", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\ - {"DMA_CONT3", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\ - {"DMA_CONT4", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\ - {"DMA_CONT5", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\ - {"DMA_CONT6", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\ - {"cpu_composites_0_t fid count", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT} - -/*! - * \name CPU_COMPOSITES_1_T field IDs. - */ -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7 8 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8 9 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9 10 - -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT 11 - -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \ - {"DMA_CONT10", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\ - {"DMA_CONT11", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\ - {"DMA_CONT12", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\ - {"DMA_CONT13", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\ - {"DMA_CONT14", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\ - {"DMA_CONT15", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\ - {"DMA_CONT16", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\ - {"DMA_CONT17", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\ - {"DMA_CONT7", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\ - {"DMA_CONT8", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\ - {"DMA_CONT9", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\ - {"cpu_composites_1_t fid count", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT} - -/*! - * \name EP_NIH_HEADER_T field IDs. - */ -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE 0 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE 1 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A 2 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B 3 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C 4 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A 5 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B 6 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C 7 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX 8 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0 9 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_START 10 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP 11 - -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT 12 - -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT \ - {"HEADER_SUBTYPE", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE},\ - {"HEADER_TYPE", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE},\ - {"OPAQUE_CTRL_A", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A},\ - {"OPAQUE_CTRL_B", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B},\ - {"OPAQUE_CTRL_C", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C},\ - {"OPAQUE_OBJECT_A", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A},\ - {"OPAQUE_OBJECT_B", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B},\ - {"OPAQUE_OBJECT_C", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C},\ - {"RECIRC_PROFILE_INDEX", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX},\ - {"RESERVED_0", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0},\ - {"START", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_START},\ - {"TIMESTAMP", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP},\ - {"ep_nih_header_t fid count", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT} - -/*! - * \name ERSPAN3_FIXED_HDR_T field IDs. - */ -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO 0 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS 1 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID 2 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID 4 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T 5 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP 6 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER 7 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN 8 - -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT 9 - -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \ - {"BSO", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\ - {"COS", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\ - {"GBP_SID", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\ - {"P_FT_HWID_D_GRA_O", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\ - {"SESSION_ID", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\ - {"T", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\ - {"TIMESTAMP", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\ - {"VER", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\ - {"VLAN", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\ - {"erspan3_fixed_hdr_t fid count", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT} - -/*! - * \name ERSPAN3_SUBHDR_5_T field IDs. - */ -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID 1 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID 2 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP 3 - -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT 4 - -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \ - {"PLATFORM_ID", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\ - {"PORT_ID", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\ - {"SWITCH_ID", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\ - {"TIMESTAMP", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\ - {"erspan3_subhdr_5_t fid count", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT} - -/*! - * \name ETHERTYPE_T field IDs. - */ -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ETHERTYPE_T_TYPE 0 - -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT 1 - -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \ - {"TYPE", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ETHERTYPE_T_TYPE},\ - {"ethertype_t fid count", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT} - -/*! - * \name GENERIC_LOOPBACK_T field IDs. - */ -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ 0 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE 1 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ 2 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS 3 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE 4 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY 5 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL 6 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ 7 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0 8 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1 9 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ 10 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1 11 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2 12 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT 13 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE 14 - -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT 15 - -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \ - {"DESTINATION_OBJ", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_OBJ},\ - {"DESTINATION_TYPE", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\ - {"ENTROPY_OBJ", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_ENTROPY_OBJ},\ - {"FLAGS", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\ - {"HEADER_TYPE", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\ - {"INPUT_PRIORITY", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\ - {"INTERFACE_CTRL", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\ - {"INTERFACE_OBJ", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJ},\ - {"PROCESSING_CTRL_0", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\ - {"PROCESSING_CTRL_1", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\ - {"QOS_OBJ", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_QOS_OBJ},\ - {"RESERVED_1", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\ - {"RESERVED_2", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2},\ - {"SOURCE_SYSTEM_PORT", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE_SYSTEM_PORT},\ - {"START_BYTE", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\ - {"generic_loopback_t fid count", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT} - -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP 0 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF 1 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED 2 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP 3 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP 4 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP 5 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP 6 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP 7 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1 8 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10 - -/*! - * \name ICMP_T field IDs. - */ -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ICMP_T_CHECKSUM 0 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ICMP_T_CODE 1 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ICMP_T_ICMP_TYPE 2 - -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ICMP_T_FID_COUNT 3 - -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \ - {"CHECKSUM", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ICMP_T_CHECKSUM},\ - {"CODE", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ICMP_T_CODE},\ - {"ICMP_TYPE", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ICMP_T_ICMP_TYPE},\ - {"icmp_t fid count", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ICMP_T_FID_COUNT} - -/*! - * \name IFA_HEADER_T field IDs. - */ -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_FLAGS 0 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_GNS 1 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH 2 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_NEXT_HDR 3 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_VER 4 - -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_FID_COUNT 5 - -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT \ - {"FLAGS", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_FLAGS},\ - {"GNS", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_GNS},\ - {"MAX_LENGTH", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH},\ - {"NEXT_HDR", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_NEXT_HDR},\ - {"VER", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_VER},\ - {"ifa_header_t fid count", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_FID_COUNT} - -/*! - * \name IFA_METADATA_A_T field IDs. - */ -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_A_T_CN 0 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_A_T_FWD_HDR_TTL 1 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_A_T_LNS_DEVICE_ID 2 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_A_T_PORT_SPEED 3 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_A_T_QUEUE_ID 4 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_A_T_RX_TIMESTAMP_SEC 5 - -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT 6 - -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_A_T_FIELD_NAME_MAP_INIT \ - {"CN", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_A_T_CN},\ - {"FWD_HDR_TTL", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_A_T_FWD_HDR_TTL},\ - {"LNS_DEVICE_ID", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_A_T_LNS_DEVICE_ID},\ - {"PORT_SPEED", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_A_T_PORT_SPEED},\ - {"QUEUE_ID", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_A_T_QUEUE_ID},\ - {"RX_TIMESTAMP_SEC", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_A_T_RX_TIMESTAMP_SEC},\ - {"ifa_metadata_a_t fid count", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT} - -/*! - * \name IFA_METADATA_B_T field IDs. - */ -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_B_T_EGRESS_PORT_ID 0 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_B_T_INGRESS_PORT_ID 1 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_B_T_MMU_STAT_0 2 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_B_T_MMU_STAT_1 3 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_B_T_RESIDENCE_TIME_NANOSEC 4 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_B_T_RX_TIMESTAMP_NANOSEC 5 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_B_T_TX_QUEUE_BYTE_COUNT 6 - -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT 7 - -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_B_T_FIELD_NAME_MAP_INIT \ - {"EGRESS_PORT_ID", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_B_T_EGRESS_PORT_ID},\ - {"INGRESS_PORT_ID", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_B_T_INGRESS_PORT_ID},\ - {"MMU_STAT_0", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_B_T_MMU_STAT_0},\ - {"MMU_STAT_1", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_B_T_MMU_STAT_1},\ - {"RESIDENCE_TIME_NANOSEC", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_B_T_RESIDENCE_TIME_NANOSEC},\ - {"RX_TIMESTAMP_NANOSEC", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_B_T_RX_TIMESTAMP_NANOSEC},\ - {"TX_QUEUE_BYTE_COUNT", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_B_T_TX_QUEUE_BYTE_COUNT},\ - {"ifa_metadata_b_t fid count", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT} - -/*! - * \name IFA_METADATA_BASE_T field IDs. - */ -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_BASE_T_ACTION_VECTOR 0 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_BASE_T_HOP_LIMIT_CURRENT_LENGTH 1 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_BASE_T_REQUEST_VECTOR 2 - -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT 3 - -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_BASE_T_FIELD_NAME_MAP_INIT \ - {"ACTION_VECTOR", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_BASE_T_ACTION_VECTOR},\ - {"HOP_LIMIT_CURRENT_LENGTH", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_BASE_T_HOP_LIMIT_CURRENT_LENGTH},\ - {"REQUEST_VECTOR", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_BASE_T_REQUEST_VECTOR},\ - {"ifa_metadata_base_t fid count", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT} - -/*! - * \name IPFIX_T field IDs. - */ -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IPFIX_T_EXPORT_TIME 0 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IPFIX_T_LENGTH 1 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IPFIX_T_SEQUENCE_NUM 3 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IPFIX_T_VERSION 4 - -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IPFIX_T_FID_COUNT 5 - -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \ - {"EXPORT_TIME", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IPFIX_T_EXPORT_TIME},\ - {"LENGTH", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IPFIX_T_LENGTH},\ - {"OBS_DOMAIN_ID", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\ - {"SEQUENCE_NUM", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IPFIX_T_SEQUENCE_NUM},\ - {"VERSION", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IPFIX_T_VERSION},\ - {"ipfix_t fid count", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IPFIX_T_FID_COUNT} - -/*! - * \name IPV4_T field IDs. - */ -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_DA 0 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_HDR_CHECKSUM 2 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_ID 3 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_OPTION 4 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_PROTOCOL 5 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_SA 6 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_TOS 7 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_TOTAL_LENGTH 8 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_TTL 9 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_VERSION_HDR_LEN 10 - -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_FID_COUNT 11 - -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \ - {"DA", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_DA},\ - {"FLAGS_FRAG_OFFSET", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\ - {"HDR_CHECKSUM", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_HDR_CHECKSUM},\ - {"ID", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_ID},\ - {"OPTION", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_OPTION},\ - {"PROTOCOL", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_PROTOCOL},\ - {"SA", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_SA},\ - {"TOS", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_TOS},\ - {"TOTAL_LENGTH", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_TOTAL_LENGTH},\ - {"TTL", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_TTL},\ - {"VERSION_HDR_LEN", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_VERSION_HDR_LEN},\ - {"ipv4_t fid count", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_FID_COUNT} - -/*! - * \name IPV6_T field IDs. - */ -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_DA 0 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_FLOW_LABEL 1 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_HOP_LIMIT 2 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_NEXT_HEADER 3 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_SA 5 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_TRAFFIC_CLASS 6 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_VERSION 7 - -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_FID_COUNT 8 - -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \ - {"DA", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_DA},\ - {"FLOW_LABEL", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_FLOW_LABEL},\ - {"HOP_LIMIT", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_HOP_LIMIT},\ - {"NEXT_HEADER", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_NEXT_HEADER},\ - {"PAYLOAD_LENGTH", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\ - {"SA", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_SA},\ - {"TRAFFIC_CLASS", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_TRAFFIC_CLASS},\ - {"VERSION", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_VERSION},\ - {"ipv6_t fid count", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_FID_COUNT} - -/*! - * \name L2_T field IDs. - */ -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_L2_T_MACDA 0 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_L2_T_MACSA 1 - -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_L2_T_FID_COUNT 2 - -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \ - {"MACDA", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_L2_T_MACDA},\ - {"MACSA", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_L2_T_MACSA},\ - {"l2_t fid count", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_L2_T_FID_COUNT} - -/*! - * \name MIRROR_ERSPAN_SN_T field IDs. - */ -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0 - -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT 1 - -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \ - {"SEQ_NUM", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\ - {"mirror_erspan_sn_t fid count", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT} - -/*! - * \name MIRROR_TRANSPORT_T field IDs. - */ -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_MIRROR_TRANSPORT_T_DATA 0 - -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT 1 - -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \ - {"DATA", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_MIRROR_TRANSPORT_T_DATA},\ - {"mirror_transport_t fid count", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT} - -/*! - * \name PSAMP_MIRROR_ON_DROP_0_T field IDs. - */ -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT 1 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH 2 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS 3 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S 4 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID 5 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID 6 - -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT 7 - -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \ - {"EGRESS_MOD_PORT", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\ - {"INGRESS_PORT", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\ - {"LENGTH", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\ - {"OBS_TIME_NS", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\ - {"OBS_TIME_S", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\ - {"SWITCH_ID", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\ - {"TEMPLATE_ID", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\ - {"psamp_mirror_on_drop_0_t fid count", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT} - -/*! - * \name PSAMP_MIRROR_ON_DROP_3_T field IDs. - */ -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON 0 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0 1 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH 2 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE 3 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX 4 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA 5 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR 6 - -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT 7 - -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT \ - {"DROP_REASON", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_DROP_REASON},\ - {"RESERVED_0", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_RESERVED_0},\ - {"SAMPLED_LENGTH", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SAMPLED_LENGTH},\ - {"SMOD_STATE", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_SMOD_STATE},\ - {"UC_COS__COLOR__PROB_IDX", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_UC_COS__COLOR__PROB_IDX},\ - {"USER_META_DATA", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_USER_META_DATA},\ - {"VAR_LEN_INDICATOR", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_VAR_LEN_INDICATOR},\ - {"psamp_mirror_on_drop_3_t fid count", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT} - -/*! - * \name RARP_T field IDs. - */ -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_HARDWARE_LEN 0 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_HARDWARE_TYPE 1 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_OPERATION 2 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_PROT_ADDR_LEN 3 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_PROTOCOL_TYPE 4 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_SENDER_HA 5 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_SENDER_IP 6 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_TARGET_HA 7 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_TARGET_IP 8 - -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_FID_COUNT 9 - -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \ - {"HARDWARE_LEN", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_HARDWARE_LEN},\ - {"HARDWARE_TYPE", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_HARDWARE_TYPE},\ - {"OPERATION", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_OPERATION},\ - {"PROT_ADDR_LEN", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_PROT_ADDR_LEN},\ - {"PROTOCOL_TYPE", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_PROTOCOL_TYPE},\ - {"SENDER_HA", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_SENDER_HA},\ - {"SENDER_IP", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_SENDER_IP},\ - {"TARGET_HA", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_TARGET_HA},\ - {"TARGET_IP", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_TARGET_IP},\ - {"rarp_t fid count", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_FID_COUNT} - -/*! - * \name SFLOW_SHIM_0_T field IDs. - */ -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION 0 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE 1 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T_VERSION 2 - -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT 3 - -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT \ - {"SYS_DESTINATION", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION},\ - {"SYS_SOURCE", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE},\ - {"VERSION", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T_VERSION},\ - {"sflow_shim_0_t fid count", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT} - -/*! - * \name SFLOW_SHIM_1_T field IDs. - */ -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE 0 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED 1 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE 2 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST 3 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE 4 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED 5 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED 6 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE 7 - -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT 8 - -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT \ - {"FLAG_DEST_SAMPLE", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE},\ - {"FLAG_DISCARDED", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED},\ - {"FLAG_FLEX_SAMPLE", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE},\ - {"FLAG_MCAST", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST},\ - {"FLAG_SRC_SAMPLE", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE},\ - {"FLAG_TRUNCATED", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED},\ - {"RESERVED", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED},\ - {"SYS_OPCODE", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE},\ - {"sflow_shim_1_t fid count", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT} - -/*! - * \name SFLOW_SHIM_2_T field IDs. - */ -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM 0 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA 1 - -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT 2 - -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT \ - {"SEQUENCE_NUM", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM},\ - {"USER_META_DATA", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA},\ - {"sflow_shim_2_t fid count", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT} - -/*! - * \name TCP_FIRST_4BYTES_T field IDs. - */ -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1 - -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT 2 - -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \ - {"DST_PORT", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\ - {"SRC_PORT", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\ - {"tcp_first_4bytes_t fid count", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT} - -/*! - * \name TCP_LAST_16BYTES_T field IDs. - */ -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM 0 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM 1 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM 3 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR 4 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE 5 - -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT 6 - -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \ - {"ACK_NUM", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\ - {"CHECKSUM", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\ - {"HDR_LEN_AND_FLAGS", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\ - {"SEQ_NUM", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\ - {"URGENT_PTR", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\ - {"WIN_SIZE", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\ - {"tcp_last_16bytes_t fid count", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT} - -/*! - * \name UDP_T field IDs. - */ -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_UDP_T_CHECKSUM 0 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_UDP_T_DST_PORT 1 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_UDP_T_SRC_PORT 2 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_UDP_T_UDP_LENGTH 3 - -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_UDP_T_FID_COUNT 4 - -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \ - {"CHECKSUM", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_UDP_T_CHECKSUM},\ - {"DST_PORT", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_UDP_T_DST_PORT},\ - {"SRC_PORT", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_UDP_T_SRC_PORT},\ - {"UDP_LENGTH", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_UDP_T_UDP_LENGTH},\ - {"udp_t fid count", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_UDP_T_FID_COUNT} - -/*! - * \name UNKNOWN_L3_T field IDs. - */ -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD 1 - -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT 2 - -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \ - {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\ - {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\ - {"unknown_l3_t fid count", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT} - -/*! - * \name UNKNOWN_L4_T field IDs. - */ -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0 - -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT 1 - -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \ - {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\ - {"unknown_l4_t fid count", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT} - -/*! - * \name UNKNOWN_L5_T field IDs. - */ -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2 - -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT 3 - -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \ - {"L5_BYTES_0_1", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\ - {"L5_BYTES_2_3", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\ - {"L5_BYTES_4_7", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\ - {"unknown_l5_t fid count", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT} - -/*! - * \name VLAN_T field IDs. - */ -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_VLAN_T_CFI 0 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_VLAN_T_PCP 1 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_VLAN_T_TPID 2 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_VLAN_T_VID 3 - -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_VLAN_T_FID_COUNT 4 - -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \ - {"CFI", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_VLAN_T_CFI},\ - {"PCP", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_VLAN_T_PCP},\ - {"TPID", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_VLAN_T_TPID},\ - {"VID", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_VLAN_T_VID},\ - {"vlan_t fid count", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_VLAN_T_FID_COUNT} - -/*! - * \name VXLAN_T field IDs. - */ -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_VXLAN_T_RESERVED2 1 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_VXLAN_T_VN_ID 2 - -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_VXLAN_T_FID_COUNT 3 - -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \ - {"FLAGS_RESERVED_1", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\ - {"RESERVED2", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_VXLAN_T_RESERVED2},\ - {"VN_ID", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_VXLAN_T_VN_ID},\ - {"vxlan_t fid count", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_VXLAN_T_FID_COUNT} - - -#endif /* BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_FLEXHDR_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/cna_6_5_34_2_0/bcm78800_a0_cna_6_5_34_2_0_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/cna_6_5_34_2_0/bcm78800_a0_cna_6_5_34_2_0_bcmpkt_rxpmd_flex_data.h deleted file mode 100644 index cd23f58758f..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/cna_6_5_34_2_0/bcm78800_a0_cna_6_5_34_2_0_bcmpkt_rxpmd_flex_data.h +++ /dev/null @@ -1,134 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) map.yml. - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - -#ifndef BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_DATA_H -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_DATA_H - -/*! - * \name RX flex metadata field IDs. - */ -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0 0 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_DVP_15_0 1 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0 2 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0 3 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0 4 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_DROP_CODE_15_0 5 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0 6 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0 7 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16 8 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_ERSPAN3_GBP_SID_15_0 9 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0 10 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16 11 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32 12 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0 13 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0 14 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0 15 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0 16 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16 17 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0 18 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0 19 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0 20 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0 21 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_L2_IIF_11_0 22 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_L2_OIF_11_0 23 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0 24 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0 25 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_14_0 26 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_14_0 27 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0 28 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0 29 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_SVP_15_0 30 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0 31 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0 32 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0 33 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0 34 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_TAG_ACTION_CTRL_1_0 35 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0 36 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0 37 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_VFI_15_0 38 - -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_FID_COUNT 39 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_COUNT 25 - -/*! - * \name Packet Flex Reason Types. - */ -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS 0 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT 1 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP 2 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER 3 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT 4 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP 5 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS 6 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD 7 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE 8 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP 9 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS 10 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR 11 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR 12 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL 13 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST 14 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED 15 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED 16 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED 17 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU 18 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED 19 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT 20 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP 21 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED 22 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP 23 -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_VFP 24 - -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \ - {"CML_FLAGS", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\ - {"EM_FT", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT},\ - {"IFP", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP},\ - {"IFP_METER", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\ - {"IVXLT", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT},\ - {"L2_DST_LOOKUP", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\ - {"L2_DST_LOOKUP_MISS", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\ - {"L2_SRC_DISCARD", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD},\ - {"L2_SRC_STATIC_MOVE", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\ - {"L3_DST_LOOKUP", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\ - {"L3_DST_LOOKUP_MISS", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\ - {"L3_HDR_ERROR", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\ - {"L3_TTL_ERROR", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\ - {"LEARN_CACHE_FULL", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\ - {"MACSA_MULTICAST", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST},\ - {"MEMBERSHIP_CHECK_FAILED", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED},\ - {"MIRROR_SAMPLER_EGR_SAMPLED", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED},\ - {"MIRROR_SAMPLER_SAMPLED", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED},\ - {"NO_COPY_TO_CPU", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU},\ - {"PKT_INTEGRITY_CHECK_FAILED", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED},\ - {"PROTOCOL_PKT", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\ - {"SER_DROP", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP},\ - {"SPANNING_TREE_CHECK_FAILED", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED},\ - {"TRACE_DOP", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\ - {"VFP", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_VFP},\ - {"flex reason count", BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_COUNT} - -#endif /* BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/cna_6_5_34_2_0/bcm78800_a0_cna_6_5_34_2_0_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/cna_6_5_34_2_0/bcm78800_a0_cna_6_5_34_2_0_bcmpkt_rxpmd_match_id_defs.h deleted file mode 100644 index 594fd35f231..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78800_a0/cna_6_5_34_2_0/bcm78800_a0_cna_6_5_34_2_0_bcmpkt_rxpmd_match_id_defs.h +++ /dev/null @@ -1,228 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) bcm78800_a0_cna_6_5_34_2_0_sf_match_id_info.yml - * for device bcm78800_a0 and variant cna_6_5_34_2_0. - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - -#ifndef BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H - -#include - -/*! - * \brief Get the Match ID DataBase information. - * - * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information. -*/ -extern bcmpkt_rxpmd_match_id_db_info_t * - bcm78800_a0_cna_6_5_34_2_0_rxpmd_match_id_db_info_get(void); - -/*! - * \brief Get the Match ID Mapping information. - * - * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information. -*/ -extern bcmpkt_rxpmd_match_id_map_info_t * - bcm78800_a0_cna_6_5_34_2_0_rxpmd_match_id_map_info_get(void); - -/*! - \name RXPMD Match IDs -*/ -#define BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG 0 -#define BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 1 -#define BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE 2 -#define BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG 3 -#define BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP 4 -#define BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE 5 -#define BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP 6 -#define BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER 7 -#define BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE 8 -#define BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 9 -#define BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 10 -#define BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE 11 -#define BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP 12 -#define BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES 13 -#define BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES 14 -#define BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP 15 -#define BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 16 -#define BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 17 -#define BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 18 -#define BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN 19 -#define BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH 20 -#define BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK 21 -#define BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE 22 -#define BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG 23 -#define BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 24 -#define BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE 25 -#define BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG 26 -#define BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP 27 -#define BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE 28 -#define BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP 29 -#define BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER 30 -#define BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE 31 -#define BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 32 -#define BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 33 -#define BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE 34 -#define BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP 35 -#define BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES 36 -#define BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES 37 -#define BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP 38 -#define BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 39 -#define BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 40 -#define BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 41 -#define BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN 42 -#define BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG 43 -#define BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 44 -#define BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE 45 -#define BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG 46 -#define BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP 47 -#define BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE 48 -#define BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP 49 -#define BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER 50 -#define BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE 51 -#define BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 52 -#define BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 53 -#define BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE 54 -#define BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP 55 -#define BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES 56 -#define BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES 57 -#define BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP 58 -#define BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 59 -#define BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 60 -#define BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 61 -#define BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG 62 -#define BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 63 -#define BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE 64 -#define BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG 65 -#define BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP 66 -#define BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE 67 -#define BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP 68 -#define BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER 69 -#define BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE 70 -#define BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 71 -#define BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 72 -#define BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE 73 -#define BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP 74 -#define BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES 75 -#define BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES 76 -#define BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP 77 -#define BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 78 -#define BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 79 -#define BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 80 -#define BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN 81 -#define BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH 82 -#define BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK 83 -#define BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE 84 -#define BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_COUNT 85 - -#define BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \ - {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \ - {"EGRESS_PKT_FWD_L2_HDR_L2", BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \ - {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \ - {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER", BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE", BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \ - {"EGRESS_PKT_SYS_HDR_EP_NIH", BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH}, \ - {"EGRESS_PKT_SYS_HDR_LOOPBACK", BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK}, \ - {"EGRESS_PKT_SYS_HDR_NONE", BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER", BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE", BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \ - {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \ - {"INGRESS_PKT_INNER_L2_HDR_L2", BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \ - {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \ - {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER", BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE", BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \ - {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \ - {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \ - {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \ - {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER", BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE", BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \ - {"INGRESS_PKT_SYS_HDR_EP_NIH", BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH}, \ - {"INGRESS_PKT_SYS_HDR_LOOPBACK", BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK}, \ - {"INGRESS_PKT_SYS_HDR_NONE", BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \ - {"rxpmd_match_id_count", BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_COUNT} - -#endif /*! BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78920_a0/vna_4_6_1_0/bcm78920_a0_vna_4_6_1_0_bcmpkt_flexhdr.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78920_a0/vna_4_6_1_0/bcm78920_a0_vna_4_6_1_0_bcmpkt_flexhdr.h deleted file mode 100644 index 7ae74e79dc6..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78920_a0/vna_4_6_1_0/bcm78920_a0_vna_4_6_1_0_bcmpkt_flexhdr.h +++ /dev/null @@ -1,189 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) header.yml. - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - -#ifndef BCM78920_A0_VNA_4_6_1_0_BCMPKT_FLEXHDR_H -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_FLEXHDR_H - -#include - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ARP_T 0 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_AUTHEN_T 1 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_BFD_T 2 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_CNP_ICRC_HDR_T 3 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_CNP_RSVD_HDR_T 4 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_CPU_COMPOSITES_0_T 5 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_CPU_COMPOSITES_1_T 6 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_DCN_T 7 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_DEST_OPTION_T 8 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_EP_NIH_HEADER_T 9 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ERSPAN3_FIXED_HDR_T 10 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ERSPAN3_SUBHDR_5_T 11 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ESP_T 12 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ETHERTYPE_T 13 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_FLEX_L3_HDR_1_T 14 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_FLEX_L3_HDR_2_T 15 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_FRAG_T 16 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_LOOPBACK_T 17 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_METADATA_T 18 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_GPE_T 19 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_GRE_CHKSUM_T 20 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_GRE_KEY_T 21 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_GRE_ROUT_T 22 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_GRE_SEQ_T 23 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_GRE_T 24 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_HOP_BY_HOP_T 25 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ICMP_T 26 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_IFA_HEADER_T 27 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_IFA_METADATA_A_T 28 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_IFA_METADATA_B_T 29 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_IFA_METADATA_BASE_T 30 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_IGMP_T 31 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_IPFIX_T 32 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_IPV4_T 33 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_IPV6_T 34 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_L2_INSTR_4BYTE_T 35 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_L2_INSTR_8BYTE_T 36 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_L2_T 37 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_MIRROR_ERSPAN_SN_T 38 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_MIRROR_TRANSPORT_T 39 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_MPLS_ACH_T 40 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_MPLS_BV_T 41 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_MPLS_CW_T 42 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_MPLS_T 43 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_P_1588_T 44 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_0_T 45 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_1_T 46 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T 47 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T 48 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T 49 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_POSTCARD_0_T 50 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_POSTCARD_1_T 51 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RARP_T 52 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROCEV2_AETH_T 53 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROCEV2_BTH_T 54 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROCEV2_DETH_T 55 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROCEV2_RETH_T 56 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROUTING_T 57 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RSPAN_T 58 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_SFLOW_SHIM_0_T 59 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_SFLOW_SHIM_1_T 60 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_SFLOW_SHIM_2_T 61 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_SNAP_LLC_T 62 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_TCP_FIRST_4BYTES_T 63 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_TCP_LAST_16BYTES_T 64 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_UDP_T 65 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_UNKNOWN_L3_T 66 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_UNKNOWN_L4_T 67 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_UNKNOWN_L5_T 68 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_VLAN_T 69 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_VPP_RX_MD_HEADER_T 70 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_VPP_TX_MD_HEADER_T 71 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_VXLAN_T 72 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_WESP_T 73 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_T 74 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_FLEXHDR_COUNT 75 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_FLEXHDR_NAME_MAP_INIT \ - {"arp_t", BCM78920_A0_VNA_4_6_1_0_BCMPKT_ARP_T},\ - {"authen_t", BCM78920_A0_VNA_4_6_1_0_BCMPKT_AUTHEN_T},\ - {"bfd_t", BCM78920_A0_VNA_4_6_1_0_BCMPKT_BFD_T},\ - {"cnp_icrc_hdr_t", BCM78920_A0_VNA_4_6_1_0_BCMPKT_CNP_ICRC_HDR_T},\ - {"cnp_rsvd_hdr_t", BCM78920_A0_VNA_4_6_1_0_BCMPKT_CNP_RSVD_HDR_T},\ - {"cpu_composites_0_t", BCM78920_A0_VNA_4_6_1_0_BCMPKT_CPU_COMPOSITES_0_T},\ - {"cpu_composites_1_t", BCM78920_A0_VNA_4_6_1_0_BCMPKT_CPU_COMPOSITES_1_T},\ - {"dcn_t", BCM78920_A0_VNA_4_6_1_0_BCMPKT_DCN_T},\ - {"dest_option_t", BCM78920_A0_VNA_4_6_1_0_BCMPKT_DEST_OPTION_T},\ - {"ep_nih_header_t", BCM78920_A0_VNA_4_6_1_0_BCMPKT_EP_NIH_HEADER_T},\ - {"erspan3_fixed_hdr_t", BCM78920_A0_VNA_4_6_1_0_BCMPKT_ERSPAN3_FIXED_HDR_T},\ - {"erspan3_subhdr_5_t", BCM78920_A0_VNA_4_6_1_0_BCMPKT_ERSPAN3_SUBHDR_5_T},\ - {"esp_t", BCM78920_A0_VNA_4_6_1_0_BCMPKT_ESP_T},\ - {"ethertype_t", BCM78920_A0_VNA_4_6_1_0_BCMPKT_ETHERTYPE_T},\ - {"flex_l3_hdr_1_t", BCM78920_A0_VNA_4_6_1_0_BCMPKT_FLEX_L3_HDR_1_T},\ - {"flex_l3_hdr_2_t", BCM78920_A0_VNA_4_6_1_0_BCMPKT_FLEX_L3_HDR_2_T},\ - {"frag_t", BCM78920_A0_VNA_4_6_1_0_BCMPKT_FRAG_T},\ - {"generic_loopback_t", BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_LOOPBACK_T},\ - {"generic_metadata_t", BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_METADATA_T},\ - {"gpe_t", BCM78920_A0_VNA_4_6_1_0_BCMPKT_GPE_T},\ - {"gre_chksum_t", BCM78920_A0_VNA_4_6_1_0_BCMPKT_GRE_CHKSUM_T},\ - {"gre_key_t", BCM78920_A0_VNA_4_6_1_0_BCMPKT_GRE_KEY_T},\ - {"gre_rout_t", BCM78920_A0_VNA_4_6_1_0_BCMPKT_GRE_ROUT_T},\ - {"gre_seq_t", BCM78920_A0_VNA_4_6_1_0_BCMPKT_GRE_SEQ_T},\ - {"gre_t", BCM78920_A0_VNA_4_6_1_0_BCMPKT_GRE_T},\ - {"hop_by_hop_t", BCM78920_A0_VNA_4_6_1_0_BCMPKT_HOP_BY_HOP_T},\ - {"icmp_t", BCM78920_A0_VNA_4_6_1_0_BCMPKT_ICMP_T},\ - {"ifa_header_t", BCM78920_A0_VNA_4_6_1_0_BCMPKT_IFA_HEADER_T},\ - {"ifa_metadata_a_t", BCM78920_A0_VNA_4_6_1_0_BCMPKT_IFA_METADATA_A_T},\ - {"ifa_metadata_b_t", BCM78920_A0_VNA_4_6_1_0_BCMPKT_IFA_METADATA_B_T},\ - {"ifa_metadata_base_t", BCM78920_A0_VNA_4_6_1_0_BCMPKT_IFA_METADATA_BASE_T},\ - {"igmp_t", BCM78920_A0_VNA_4_6_1_0_BCMPKT_IGMP_T},\ - {"ipfix_t", BCM78920_A0_VNA_4_6_1_0_BCMPKT_IPFIX_T},\ - {"ipv4_t", BCM78920_A0_VNA_4_6_1_0_BCMPKT_IPV4_T},\ - {"ipv6_t", BCM78920_A0_VNA_4_6_1_0_BCMPKT_IPV6_T},\ - {"l2_instr_4byte_t", BCM78920_A0_VNA_4_6_1_0_BCMPKT_L2_INSTR_4BYTE_T},\ - {"l2_instr_8byte_t", BCM78920_A0_VNA_4_6_1_0_BCMPKT_L2_INSTR_8BYTE_T},\ - {"l2_t", BCM78920_A0_VNA_4_6_1_0_BCMPKT_L2_T},\ - {"mirror_erspan_sn_t", BCM78920_A0_VNA_4_6_1_0_BCMPKT_MIRROR_ERSPAN_SN_T},\ - {"mirror_transport_t", BCM78920_A0_VNA_4_6_1_0_BCMPKT_MIRROR_TRANSPORT_T},\ - {"mpls_ach_t", BCM78920_A0_VNA_4_6_1_0_BCMPKT_MPLS_ACH_T},\ - {"mpls_bv_t", BCM78920_A0_VNA_4_6_1_0_BCMPKT_MPLS_BV_T},\ - {"mpls_cw_t", BCM78920_A0_VNA_4_6_1_0_BCMPKT_MPLS_CW_T},\ - {"mpls_t", BCM78920_A0_VNA_4_6_1_0_BCMPKT_MPLS_T},\ - {"p_1588_t", BCM78920_A0_VNA_4_6_1_0_BCMPKT_P_1588_T},\ - {"psamp_0_t", BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_0_T},\ - {"psamp_1_t", BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_1_T},\ - {"psamp_mirror_on_drop_0_t", BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T},\ - {"psamp_mirror_on_drop_1_t", BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T},\ - {"psamp_mirror_on_drop_2_t", BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T},\ - {"psamp_postcard_0_t", BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_POSTCARD_0_T},\ - {"psamp_postcard_1_t", BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_POSTCARD_1_T},\ - {"rarp_t", BCM78920_A0_VNA_4_6_1_0_BCMPKT_RARP_T},\ - {"rocev2_aeth_t", BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROCEV2_AETH_T},\ - {"rocev2_bth_t", BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROCEV2_BTH_T},\ - {"rocev2_deth_t", BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROCEV2_DETH_T},\ - {"rocev2_reth_t", BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROCEV2_RETH_T},\ - {"routing_t", BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROUTING_T},\ - {"rspan_t", BCM78920_A0_VNA_4_6_1_0_BCMPKT_RSPAN_T},\ - {"sflow_shim_0_t", BCM78920_A0_VNA_4_6_1_0_BCMPKT_SFLOW_SHIM_0_T},\ - {"sflow_shim_1_t", BCM78920_A0_VNA_4_6_1_0_BCMPKT_SFLOW_SHIM_1_T},\ - {"sflow_shim_2_t", BCM78920_A0_VNA_4_6_1_0_BCMPKT_SFLOW_SHIM_2_T},\ - {"snap_llc_t", BCM78920_A0_VNA_4_6_1_0_BCMPKT_SNAP_LLC_T},\ - {"tcp_first_4bytes_t", BCM78920_A0_VNA_4_6_1_0_BCMPKT_TCP_FIRST_4BYTES_T},\ - {"tcp_last_16bytes_t", BCM78920_A0_VNA_4_6_1_0_BCMPKT_TCP_LAST_16BYTES_T},\ - {"udp_t", BCM78920_A0_VNA_4_6_1_0_BCMPKT_UDP_T},\ - {"unknown_l3_t", BCM78920_A0_VNA_4_6_1_0_BCMPKT_UNKNOWN_L3_T},\ - {"unknown_l4_t", BCM78920_A0_VNA_4_6_1_0_BCMPKT_UNKNOWN_L4_T},\ - {"unknown_l5_t", BCM78920_A0_VNA_4_6_1_0_BCMPKT_UNKNOWN_L5_T},\ - {"vlan_t", BCM78920_A0_VNA_4_6_1_0_BCMPKT_VLAN_T},\ - {"vpp_rx_md_header_t", BCM78920_A0_VNA_4_6_1_0_BCMPKT_VPP_RX_MD_HEADER_T},\ - {"vpp_tx_md_header_t", BCM78920_A0_VNA_4_6_1_0_BCMPKT_VPP_TX_MD_HEADER_T},\ - {"vxlan_t", BCM78920_A0_VNA_4_6_1_0_BCMPKT_VXLAN_T},\ - {"wesp_t", BCM78920_A0_VNA_4_6_1_0_BCMPKT_WESP_T},\ - {"RXPMD_FLEX_T", BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_T},\ - {"flexhdr count", BCM78920_A0_VNA_4_6_1_0_BCMPKT_FLEXHDR_COUNT} - -#endif /* BCM78920_A0_VNA_4_6_1_0_BCMPKT_FLEXHDR_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78920_a0/vna_4_6_1_0/bcm78920_a0_vna_4_6_1_0_bcmpkt_flexhdr_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78920_a0/vna_4_6_1_0/bcm78920_a0_vna_4_6_1_0_bcmpkt_flexhdr_data.h deleted file mode 100644 index c841c68692a..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78920_a0/vna_4_6_1_0/bcm78920_a0_vna_4_6_1_0_bcmpkt_flexhdr_data.h +++ /dev/null @@ -1,1511 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) header.yml. - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - -#ifndef BCM78920_A0_VNA_4_6_1_0_BCMPKT_FLEXHDR_DATA_H -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_FLEXHDR_DATA_H - -/*! - * \name ARP_T field IDs. - */ -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ARP_T_HARDWARE_LEN 0 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ARP_T_HARDWARE_TYPE 1 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ARP_T_OPERATION 2 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ARP_T_PROT_ADDR_LEN 3 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ARP_T_PROTOCOL_TYPE 4 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ARP_T_SENDER_HA 5 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ARP_T_SENDER_IP 6 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ARP_T_TARGET_HA 7 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ARP_T_TARGET_IP 8 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ARP_T_FID_COUNT 9 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT \ - {"HARDWARE_LEN", BCM78920_A0_VNA_4_6_1_0_BCMPKT_ARP_T_HARDWARE_LEN},\ - {"HARDWARE_TYPE", BCM78920_A0_VNA_4_6_1_0_BCMPKT_ARP_T_HARDWARE_TYPE},\ - {"OPERATION", BCM78920_A0_VNA_4_6_1_0_BCMPKT_ARP_T_OPERATION},\ - {"PROT_ADDR_LEN", BCM78920_A0_VNA_4_6_1_0_BCMPKT_ARP_T_PROT_ADDR_LEN},\ - {"PROTOCOL_TYPE", BCM78920_A0_VNA_4_6_1_0_BCMPKT_ARP_T_PROTOCOL_TYPE},\ - {"SENDER_HA", BCM78920_A0_VNA_4_6_1_0_BCMPKT_ARP_T_SENDER_HA},\ - {"SENDER_IP", BCM78920_A0_VNA_4_6_1_0_BCMPKT_ARP_T_SENDER_IP},\ - {"TARGET_HA", BCM78920_A0_VNA_4_6_1_0_BCMPKT_ARP_T_TARGET_HA},\ - {"TARGET_IP", BCM78920_A0_VNA_4_6_1_0_BCMPKT_ARP_T_TARGET_IP},\ - {"arp_t fid count", BCM78920_A0_VNA_4_6_1_0_BCMPKT_ARP_T_FID_COUNT} - -/*! - * \name AUTHEN_T field IDs. - */ -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_AUTHEN_T_DATA 0 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_AUTHEN_T_NEXT_HEADER 1 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN 2 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_AUTHEN_T_RESERVED 3 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_AUTHEN_T_SEQ_NUM 4 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_AUTHEN_T_SPI 5 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_AUTHEN_T_FID_COUNT 6 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT \ - {"DATA", BCM78920_A0_VNA_4_6_1_0_BCMPKT_AUTHEN_T_DATA},\ - {"NEXT_HEADER", BCM78920_A0_VNA_4_6_1_0_BCMPKT_AUTHEN_T_NEXT_HEADER},\ - {"PAYLOAD_LEN", BCM78920_A0_VNA_4_6_1_0_BCMPKT_AUTHEN_T_PAYLOAD_LEN},\ - {"RESERVED", BCM78920_A0_VNA_4_6_1_0_BCMPKT_AUTHEN_T_RESERVED},\ - {"SEQ_NUM", BCM78920_A0_VNA_4_6_1_0_BCMPKT_AUTHEN_T_SEQ_NUM},\ - {"SPI", BCM78920_A0_VNA_4_6_1_0_BCMPKT_AUTHEN_T_SPI},\ - {"authen_t fid count", BCM78920_A0_VNA_4_6_1_0_BCMPKT_AUTHEN_T_FID_COUNT} - -/*! - * \name BFD_T field IDs. - */ -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_BFD_T_AP 0 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_BFD_T_BFD_LENGTH 1 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_BFD_T_CPI 2 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_BFD_T_DEM 3 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_BFD_T_DESMINTXINTV 4 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_BFD_T_DETECTMULT 5 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_BFD_T_DIAG 6 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_BFD_T_FIN 7 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_BFD_T_MINECHORXINTV 8 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_BFD_T_MPT 9 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_BFD_T_MYDISCRIM 10 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_BFD_T_POLL 11 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_BFD_T_REQMINRXINTV 12 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_BFD_T_STA 13 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_BFD_T_URDISCRIM 14 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_BFD_T_VERSION 15 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_BFD_T_FID_COUNT 16 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT \ - {"AP", BCM78920_A0_VNA_4_6_1_0_BCMPKT_BFD_T_AP},\ - {"BFD_LENGTH", BCM78920_A0_VNA_4_6_1_0_BCMPKT_BFD_T_BFD_LENGTH},\ - {"CPI", BCM78920_A0_VNA_4_6_1_0_BCMPKT_BFD_T_CPI},\ - {"DEM", BCM78920_A0_VNA_4_6_1_0_BCMPKT_BFD_T_DEM},\ - {"DESMINTXINTV", BCM78920_A0_VNA_4_6_1_0_BCMPKT_BFD_T_DESMINTXINTV},\ - {"DETECTMULT", BCM78920_A0_VNA_4_6_1_0_BCMPKT_BFD_T_DETECTMULT},\ - {"DIAG", BCM78920_A0_VNA_4_6_1_0_BCMPKT_BFD_T_DIAG},\ - {"FIN", BCM78920_A0_VNA_4_6_1_0_BCMPKT_BFD_T_FIN},\ - {"MINECHORXINTV", BCM78920_A0_VNA_4_6_1_0_BCMPKT_BFD_T_MINECHORXINTV},\ - {"MPT", BCM78920_A0_VNA_4_6_1_0_BCMPKT_BFD_T_MPT},\ - {"MYDISCRIM", BCM78920_A0_VNA_4_6_1_0_BCMPKT_BFD_T_MYDISCRIM},\ - {"POLL", BCM78920_A0_VNA_4_6_1_0_BCMPKT_BFD_T_POLL},\ - {"REQMINRXINTV", BCM78920_A0_VNA_4_6_1_0_BCMPKT_BFD_T_REQMINRXINTV},\ - {"STA", BCM78920_A0_VNA_4_6_1_0_BCMPKT_BFD_T_STA},\ - {"URDISCRIM", BCM78920_A0_VNA_4_6_1_0_BCMPKT_BFD_T_URDISCRIM},\ - {"VERSION", BCM78920_A0_VNA_4_6_1_0_BCMPKT_BFD_T_VERSION},\ - {"bfd_t fid count", BCM78920_A0_VNA_4_6_1_0_BCMPKT_BFD_T_FID_COUNT} - -/*! - * \name CNP_ICRC_HDR_T field IDs. - */ -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_CNP_ICRC_HDR_T_RESERVED_0 0 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_CNP_ICRC_HDR_T_RESERVED_1 1 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_CNP_ICRC_HDR_T_FID_COUNT 2 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_CNP_ICRC_HDR_T_FIELD_NAME_MAP_INIT \ - {"RESERVED_0", BCM78920_A0_VNA_4_6_1_0_BCMPKT_CNP_ICRC_HDR_T_RESERVED_0},\ - {"RESERVED_1", BCM78920_A0_VNA_4_6_1_0_BCMPKT_CNP_ICRC_HDR_T_RESERVED_1},\ - {"cnp_icrc_hdr_t fid count", BCM78920_A0_VNA_4_6_1_0_BCMPKT_CNP_ICRC_HDR_T_FID_COUNT} - -/*! - * \name CNP_RSVD_HDR_T field IDs. - */ -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_CNP_RSVD_HDR_T_RESERVED_0 0 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_CNP_RSVD_HDR_T_RESERVED_1 1 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_CNP_RSVD_HDR_T_RESERVED_2 2 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_CNP_RSVD_HDR_T_RESERVED_3 3 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_CNP_RSVD_HDR_T_RESERVED_4 4 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_CNP_RSVD_HDR_T_RESERVED_5 5 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_CNP_RSVD_HDR_T_RESERVED_6 6 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_CNP_RSVD_HDR_T_RESERVED_7 7 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_CNP_RSVD_HDR_T_FID_COUNT 8 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_CNP_RSVD_HDR_T_FIELD_NAME_MAP_INIT \ - {"RESERVED_0", BCM78920_A0_VNA_4_6_1_0_BCMPKT_CNP_RSVD_HDR_T_RESERVED_0},\ - {"RESERVED_1", BCM78920_A0_VNA_4_6_1_0_BCMPKT_CNP_RSVD_HDR_T_RESERVED_1},\ - {"RESERVED_2", BCM78920_A0_VNA_4_6_1_0_BCMPKT_CNP_RSVD_HDR_T_RESERVED_2},\ - {"RESERVED_3", BCM78920_A0_VNA_4_6_1_0_BCMPKT_CNP_RSVD_HDR_T_RESERVED_3},\ - {"RESERVED_4", BCM78920_A0_VNA_4_6_1_0_BCMPKT_CNP_RSVD_HDR_T_RESERVED_4},\ - {"RESERVED_5", BCM78920_A0_VNA_4_6_1_0_BCMPKT_CNP_RSVD_HDR_T_RESERVED_5},\ - {"RESERVED_6", BCM78920_A0_VNA_4_6_1_0_BCMPKT_CNP_RSVD_HDR_T_RESERVED_6},\ - {"RESERVED_7", BCM78920_A0_VNA_4_6_1_0_BCMPKT_CNP_RSVD_HDR_T_RESERVED_7},\ - {"cnp_rsvd_hdr_t fid count", BCM78920_A0_VNA_4_6_1_0_BCMPKT_CNP_RSVD_HDR_T_FID_COUNT} - -/*! - * \name CPU_COMPOSITES_0_T field IDs. - */ -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0 0 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1 1 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2 2 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3 3 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4 4 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5 5 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6 6 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT 7 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT \ - {"DMA_CONT0", BCM78920_A0_VNA_4_6_1_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT0},\ - {"DMA_CONT1", BCM78920_A0_VNA_4_6_1_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT1},\ - {"DMA_CONT2", BCM78920_A0_VNA_4_6_1_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT2},\ - {"DMA_CONT3", BCM78920_A0_VNA_4_6_1_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT3},\ - {"DMA_CONT4", BCM78920_A0_VNA_4_6_1_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT4},\ - {"DMA_CONT5", BCM78920_A0_VNA_4_6_1_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT5},\ - {"DMA_CONT6", BCM78920_A0_VNA_4_6_1_0_BCMPKT_CPU_COMPOSITES_0_T_DMA_CONT6},\ - {"cpu_composites_0_t fid count", BCM78920_A0_VNA_4_6_1_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT} - -/*! - * \name CPU_COMPOSITES_1_T field IDs. - */ -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10 0 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11 1 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12 2 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13 3 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14 4 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15 5 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16 6 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17 7 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7 8 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8 9 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9 10 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT 11 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT \ - {"DMA_CONT10", BCM78920_A0_VNA_4_6_1_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT10},\ - {"DMA_CONT11", BCM78920_A0_VNA_4_6_1_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT11},\ - {"DMA_CONT12", BCM78920_A0_VNA_4_6_1_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT12},\ - {"DMA_CONT13", BCM78920_A0_VNA_4_6_1_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT13},\ - {"DMA_CONT14", BCM78920_A0_VNA_4_6_1_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT14},\ - {"DMA_CONT15", BCM78920_A0_VNA_4_6_1_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT15},\ - {"DMA_CONT16", BCM78920_A0_VNA_4_6_1_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT16},\ - {"DMA_CONT17", BCM78920_A0_VNA_4_6_1_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT17},\ - {"DMA_CONT7", BCM78920_A0_VNA_4_6_1_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT7},\ - {"DMA_CONT8", BCM78920_A0_VNA_4_6_1_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT8},\ - {"DMA_CONT9", BCM78920_A0_VNA_4_6_1_0_BCMPKT_CPU_COMPOSITES_1_T_DMA_CONT9},\ - {"cpu_composites_1_t fid count", BCM78920_A0_VNA_4_6_1_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT} - -/*! - * \name DCN_T field IDs. - */ -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_DCN_T_BYTE_2_3 0 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_DCN_T_BYTE_4 1 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_DCN_T_BYTE_5_6 2 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_DCN_T_FLAGS_BCM_BYTE 3 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_DCN_T_NEXT_PROTOCOL 4 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_DCN_T_FID_COUNT 5 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_DCN_T_FIELD_NAME_MAP_INIT \ - {"BYTE_2_3", BCM78920_A0_VNA_4_6_1_0_BCMPKT_DCN_T_BYTE_2_3},\ - {"BYTE_4", BCM78920_A0_VNA_4_6_1_0_BCMPKT_DCN_T_BYTE_4},\ - {"BYTE_5_6", BCM78920_A0_VNA_4_6_1_0_BCMPKT_DCN_T_BYTE_5_6},\ - {"FLAGS_BCM_BYTE", BCM78920_A0_VNA_4_6_1_0_BCMPKT_DCN_T_FLAGS_BCM_BYTE},\ - {"NEXT_PROTOCOL", BCM78920_A0_VNA_4_6_1_0_BCMPKT_DCN_T_NEXT_PROTOCOL},\ - {"dcn_t fid count", BCM78920_A0_VNA_4_6_1_0_BCMPKT_DCN_T_FID_COUNT} - -/*! - * \name DEST_OPTION_T field IDs. - */ -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN 0 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER 1 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_DEST_OPTION_T_OPTION 2 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_DEST_OPTION_T_FID_COUNT 3 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT \ - {"HDR_EXT_LEN", BCM78920_A0_VNA_4_6_1_0_BCMPKT_DEST_OPTION_T_HDR_EXT_LEN},\ - {"NEXT_HEADER", BCM78920_A0_VNA_4_6_1_0_BCMPKT_DEST_OPTION_T_NEXT_HEADER},\ - {"OPTION", BCM78920_A0_VNA_4_6_1_0_BCMPKT_DEST_OPTION_T_OPTION},\ - {"dest_option_t fid count", BCM78920_A0_VNA_4_6_1_0_BCMPKT_DEST_OPTION_T_FID_COUNT} - -/*! - * \name EP_NIH_HEADER_T field IDs. - */ -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE 0 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE 1 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A 2 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B 3 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C 4 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A 5 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B 6 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C 7 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX 8 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0 9 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_EP_NIH_HEADER_T_START 10 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP 11 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT 12 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT \ - {"HEADER_SUBTYPE", BCM78920_A0_VNA_4_6_1_0_BCMPKT_EP_NIH_HEADER_T_HEADER_SUBTYPE},\ - {"HEADER_TYPE", BCM78920_A0_VNA_4_6_1_0_BCMPKT_EP_NIH_HEADER_T_HEADER_TYPE},\ - {"OPAQUE_CTRL_A", BCM78920_A0_VNA_4_6_1_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_A},\ - {"OPAQUE_CTRL_B", BCM78920_A0_VNA_4_6_1_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_B},\ - {"OPAQUE_CTRL_C", BCM78920_A0_VNA_4_6_1_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_CTRL_C},\ - {"OPAQUE_OBJECT_A", BCM78920_A0_VNA_4_6_1_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_A},\ - {"OPAQUE_OBJECT_B", BCM78920_A0_VNA_4_6_1_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_B},\ - {"OPAQUE_OBJECT_C", BCM78920_A0_VNA_4_6_1_0_BCMPKT_EP_NIH_HEADER_T_OPAQUE_OBJECT_C},\ - {"RECIRC_PROFILE_INDEX", BCM78920_A0_VNA_4_6_1_0_BCMPKT_EP_NIH_HEADER_T_RECIRC_PROFILE_INDEX},\ - {"RESERVED_0", BCM78920_A0_VNA_4_6_1_0_BCMPKT_EP_NIH_HEADER_T_RESERVED_0},\ - {"START", BCM78920_A0_VNA_4_6_1_0_BCMPKT_EP_NIH_HEADER_T_START},\ - {"TIMESTAMP", BCM78920_A0_VNA_4_6_1_0_BCMPKT_EP_NIH_HEADER_T_TIMESTAMP},\ - {"ep_nih_header_t fid count", BCM78920_A0_VNA_4_6_1_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT} - -/*! - * \name ERSPAN3_FIXED_HDR_T field IDs. - */ -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO 0 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS 1 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID 2 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O 3 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID 4 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T 5 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP 6 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER 7 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN 8 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT 9 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT \ - {"BSO", BCM78920_A0_VNA_4_6_1_0_BCMPKT_ERSPAN3_FIXED_HDR_T_BSO},\ - {"COS", BCM78920_A0_VNA_4_6_1_0_BCMPKT_ERSPAN3_FIXED_HDR_T_COS},\ - {"GBP_SID", BCM78920_A0_VNA_4_6_1_0_BCMPKT_ERSPAN3_FIXED_HDR_T_GBP_SID},\ - {"P_FT_HWID_D_GRA_O", BCM78920_A0_VNA_4_6_1_0_BCMPKT_ERSPAN3_FIXED_HDR_T_P_FT_HWID_D_GRA_O},\ - {"SESSION_ID", BCM78920_A0_VNA_4_6_1_0_BCMPKT_ERSPAN3_FIXED_HDR_T_SESSION_ID},\ - {"T", BCM78920_A0_VNA_4_6_1_0_BCMPKT_ERSPAN3_FIXED_HDR_T_T},\ - {"TIMESTAMP", BCM78920_A0_VNA_4_6_1_0_BCMPKT_ERSPAN3_FIXED_HDR_T_TIMESTAMP},\ - {"VER", BCM78920_A0_VNA_4_6_1_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VER},\ - {"VLAN", BCM78920_A0_VNA_4_6_1_0_BCMPKT_ERSPAN3_FIXED_HDR_T_VLAN},\ - {"erspan3_fixed_hdr_t fid count", BCM78920_A0_VNA_4_6_1_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT} - -/*! - * \name ERSPAN3_SUBHDR_5_T field IDs. - */ -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID 0 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID 1 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID 2 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP 3 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT 4 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT \ - {"PLATFORM_ID", BCM78920_A0_VNA_4_6_1_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PLATFORM_ID},\ - {"PORT_ID", BCM78920_A0_VNA_4_6_1_0_BCMPKT_ERSPAN3_SUBHDR_5_T_PORT_ID},\ - {"SWITCH_ID", BCM78920_A0_VNA_4_6_1_0_BCMPKT_ERSPAN3_SUBHDR_5_T_SWITCH_ID},\ - {"TIMESTAMP", BCM78920_A0_VNA_4_6_1_0_BCMPKT_ERSPAN3_SUBHDR_5_T_TIMESTAMP},\ - {"erspan3_subhdr_5_t fid count", BCM78920_A0_VNA_4_6_1_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT} - -/*! - * \name ESP_T field IDs. - */ -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ESP_T_NEXT_HEADER 0 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ESP_T_PAD 1 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ESP_T_PAD_LEN 2 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ESP_T_SEQ_NUM 3 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ESP_T_SPI 4 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ESP_T_FID_COUNT 5 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT \ - {"NEXT_HEADER", BCM78920_A0_VNA_4_6_1_0_BCMPKT_ESP_T_NEXT_HEADER},\ - {"PAD", BCM78920_A0_VNA_4_6_1_0_BCMPKT_ESP_T_PAD},\ - {"PAD_LEN", BCM78920_A0_VNA_4_6_1_0_BCMPKT_ESP_T_PAD_LEN},\ - {"SEQ_NUM", BCM78920_A0_VNA_4_6_1_0_BCMPKT_ESP_T_SEQ_NUM},\ - {"SPI", BCM78920_A0_VNA_4_6_1_0_BCMPKT_ESP_T_SPI},\ - {"esp_t fid count", BCM78920_A0_VNA_4_6_1_0_BCMPKT_ESP_T_FID_COUNT} - -/*! - * \name ETHERTYPE_T field IDs. - */ -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ETHERTYPE_T_TYPE 0 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ETHERTYPE_T_FID_COUNT 1 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT \ - {"TYPE", BCM78920_A0_VNA_4_6_1_0_BCMPKT_ETHERTYPE_T_TYPE},\ - {"ethertype_t fid count", BCM78920_A0_VNA_4_6_1_0_BCMPKT_ETHERTYPE_T_FID_COUNT} - -/*! - * \name FLEX_L3_HDR_1_T field IDs. - */ -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_FLEX_L3_HDR_1_T_FLAGS_TTL 0 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_FLEX_L3_HDR_1_T_TOS 1 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_FLEX_L3_HDR_1_T_FID_COUNT 2 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_FLEX_L3_HDR_1_T_FIELD_NAME_MAP_INIT \ - {"FLAGS_TTL", BCM78920_A0_VNA_4_6_1_0_BCMPKT_FLEX_L3_HDR_1_T_FLAGS_TTL},\ - {"TOS", BCM78920_A0_VNA_4_6_1_0_BCMPKT_FLEX_L3_HDR_1_T_TOS},\ - {"flex_l3_hdr_1_t fid count", BCM78920_A0_VNA_4_6_1_0_BCMPKT_FLEX_L3_HDR_1_T_FID_COUNT} - -/*! - * \name FLEX_L3_HDR_2_T field IDs. - */ -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_FLEX_L3_HDR_2_T_FLAGS_TTL 0 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_FLEX_L3_HDR_2_T_FLOW_LABEL_RESERVED 1 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_FLEX_L3_HDR_2_T_TOS 2 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_FLEX_L3_HDR_2_T_FID_COUNT 3 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_FLEX_L3_HDR_2_T_FIELD_NAME_MAP_INIT \ - {"FLAGS_TTL", BCM78920_A0_VNA_4_6_1_0_BCMPKT_FLEX_L3_HDR_2_T_FLAGS_TTL},\ - {"FLOW_LABEL_RESERVED", BCM78920_A0_VNA_4_6_1_0_BCMPKT_FLEX_L3_HDR_2_T_FLOW_LABEL_RESERVED},\ - {"TOS", BCM78920_A0_VNA_4_6_1_0_BCMPKT_FLEX_L3_HDR_2_T_TOS},\ - {"flex_l3_hdr_2_t fid count", BCM78920_A0_VNA_4_6_1_0_BCMPKT_FLEX_L3_HDR_2_T_FID_COUNT} - -/*! - * \name FRAG_T field IDs. - */ -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_FRAG_T_FRAG_INFO 0 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_FRAG_T_ID 1 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_FRAG_T_NEXT_HEADER 2 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_FRAG_T_RESERVED 3 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_FRAG_T_FID_COUNT 4 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT \ - {"FRAG_INFO", BCM78920_A0_VNA_4_6_1_0_BCMPKT_FRAG_T_FRAG_INFO},\ - {"ID", BCM78920_A0_VNA_4_6_1_0_BCMPKT_FRAG_T_ID},\ - {"NEXT_HEADER", BCM78920_A0_VNA_4_6_1_0_BCMPKT_FRAG_T_NEXT_HEADER},\ - {"RESERVED", BCM78920_A0_VNA_4_6_1_0_BCMPKT_FRAG_T_RESERVED},\ - {"frag_t fid count", BCM78920_A0_VNA_4_6_1_0_BCMPKT_FRAG_T_FID_COUNT} - -/*! - * \name GENERIC_LOOPBACK_T field IDs. - */ -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION 0 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE 1 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS 2 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE 3 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_LOOPBACK_T_INC_QP_ID 4 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_LOOPBACK_T_INC_RSVD_1 5 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_LOOPBACK_T_INC_RSVD_6 6 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_LOOPBACK_T_INC_SRC_HOST_PROFILE 7 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY 8 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_LOOPBACK_T_INT_CN_CNG 9 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_LOOPBACK_T_INT_PRI 10 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL 11 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJECT 12 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_LOOPBACK_T_PACKET_ENTROPY 13 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0 14 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1 15 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1 16 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2 17 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE 18 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE 19 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT 20 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT \ - {"DESTINATION", BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION},\ - {"DESTINATION_TYPE", BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE},\ - {"FLAGS", BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_LOOPBACK_T_FLAGS},\ - {"HEADER_TYPE", BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_LOOPBACK_T_HEADER_TYPE},\ - {"INC_QP_ID", BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_LOOPBACK_T_INC_QP_ID},\ - {"INC_RSVD_1", BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_LOOPBACK_T_INC_RSVD_1},\ - {"INC_RSVD_6", BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_LOOPBACK_T_INC_RSVD_6},\ - {"INC_SRC_HOST_PROFILE", BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_LOOPBACK_T_INC_SRC_HOST_PROFILE},\ - {"INPUT_PRIORITY", BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_LOOPBACK_T_INPUT_PRIORITY},\ - {"INT_CN_CNG", BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_LOOPBACK_T_INT_CN_CNG},\ - {"INT_PRI", BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_LOOPBACK_T_INT_PRI},\ - {"INTERFACE_CTRL", BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_CTRL},\ - {"INTERFACE_OBJECT", BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_LOOPBACK_T_INTERFACE_OBJECT},\ - {"PACKET_ENTROPY", BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_LOOPBACK_T_PACKET_ENTROPY},\ - {"PROCESSING_CTRL_0", BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_0},\ - {"PROCESSING_CTRL_1", BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_LOOPBACK_T_PROCESSING_CTRL_1},\ - {"RESERVED_1", BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_1},\ - {"RESERVED_2", BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_LOOPBACK_T_RESERVED_2},\ - {"SOURCE", BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_LOOPBACK_T_SOURCE},\ - {"START_BYTE", BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_LOOPBACK_T_START_BYTE},\ - {"generic_loopback_t fid count", BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT} - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NO_OP 0 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2_OIF 1 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED 2 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__VP 3 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP 4 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__NHOP 5 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L2MC_GROUP 6 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__L3MC_GROUP 7 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__RESERVED_1 8 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__ECMP_MEMBER 9 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_LOOPBACK_T_DESTINATION_TYPE__DEVICE_PORT 10 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__TUNNEL 0 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_TYPE__GENERIC 1 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__NOOP 0 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__VFI 1 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_LOOPBACK_T_LOOPBACK_HEADER_INTERFACE_CTRL__L3_IIF 2 - -/*! - * \name GENERIC_METADATA_T field IDs. - */ -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_METADATA_T_L4_DST_PORT 0 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_METADATA_T_NODE_ID 1 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_METADATA_T_PKT_IP_LENGTH 2 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_METADATA_T_PORT_SPEED_PORT_TYPE_TTL 3 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_METADATA_T_QUEUE_LENGTH 4 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_METADATA_T_RESERVED 5 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_METADATA_T_TX_PORT_QUEUE_NUM 6 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_METADATA_T_VER_MSG_REASON_CONTENT_ID 7 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_METADATA_T_FID_COUNT 8 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_METADATA_T_FIELD_NAME_MAP_INIT \ - {"L4_DST_PORT", BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_METADATA_T_L4_DST_PORT},\ - {"NODE_ID", BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_METADATA_T_NODE_ID},\ - {"PKT_IP_LENGTH", BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_METADATA_T_PKT_IP_LENGTH},\ - {"PORT_SPEED_PORT_TYPE_TTL", BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_METADATA_T_PORT_SPEED_PORT_TYPE_TTL},\ - {"QUEUE_LENGTH", BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_METADATA_T_QUEUE_LENGTH},\ - {"RESERVED", BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_METADATA_T_RESERVED},\ - {"TX_PORT_QUEUE_NUM", BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_METADATA_T_TX_PORT_QUEUE_NUM},\ - {"VER_MSG_REASON_CONTENT_ID", BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_METADATA_T_VER_MSG_REASON_CONTENT_ID},\ - {"generic_metadata_t fid count", BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_METADATA_T_FID_COUNT} - -/*! - * \name GPE_T field IDs. - */ -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_GPE_T_FLAGS 0 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_GPE_T_NEXT_PROTOCOL 1 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_GPE_T_RESERVED0 2 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_GPE_T_RESERVED1 3 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_GPE_T_VNI 4 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_GPE_T_FID_COUNT 5 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT \ - {"FLAGS", BCM78920_A0_VNA_4_6_1_0_BCMPKT_GPE_T_FLAGS},\ - {"NEXT_PROTOCOL", BCM78920_A0_VNA_4_6_1_0_BCMPKT_GPE_T_NEXT_PROTOCOL},\ - {"RESERVED0", BCM78920_A0_VNA_4_6_1_0_BCMPKT_GPE_T_RESERVED0},\ - {"RESERVED1", BCM78920_A0_VNA_4_6_1_0_BCMPKT_GPE_T_RESERVED1},\ - {"VNI", BCM78920_A0_VNA_4_6_1_0_BCMPKT_GPE_T_VNI},\ - {"gpe_t fid count", BCM78920_A0_VNA_4_6_1_0_BCMPKT_GPE_T_FID_COUNT} - -/*! - * \name GRE_CHKSUM_T field IDs. - */ -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM 0 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_GRE_CHKSUM_T_OFFSET 1 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT 2 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT \ - {"CHECKSUM", BCM78920_A0_VNA_4_6_1_0_BCMPKT_GRE_CHKSUM_T_CHECKSUM},\ - {"OFFSET", BCM78920_A0_VNA_4_6_1_0_BCMPKT_GRE_CHKSUM_T_OFFSET},\ - {"gre_chksum_t fid count", BCM78920_A0_VNA_4_6_1_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT} - -/*! - * \name GRE_KEY_T field IDs. - */ -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_GRE_KEY_T_KEY 0 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_GRE_KEY_T_FID_COUNT 1 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT \ - {"KEY", BCM78920_A0_VNA_4_6_1_0_BCMPKT_GRE_KEY_T_KEY},\ - {"gre_key_t fid count", BCM78920_A0_VNA_4_6_1_0_BCMPKT_GRE_KEY_T_FID_COUNT} - -/*! - * \name GRE_ROUT_T field IDs. - */ -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_GRE_ROUT_T_ROUTING 0 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_GRE_ROUT_T_FID_COUNT 1 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT \ - {"ROUTING", BCM78920_A0_VNA_4_6_1_0_BCMPKT_GRE_ROUT_T_ROUTING},\ - {"gre_rout_t fid count", BCM78920_A0_VNA_4_6_1_0_BCMPKT_GRE_ROUT_T_FID_COUNT} - -/*! - * \name GRE_SEQ_T field IDs. - */ -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_GRE_SEQ_T_SEQUENCE 0 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_GRE_SEQ_T_FID_COUNT 1 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT \ - {"SEQUENCE", BCM78920_A0_VNA_4_6_1_0_BCMPKT_GRE_SEQ_T_SEQUENCE},\ - {"gre_seq_t fid count", BCM78920_A0_VNA_4_6_1_0_BCMPKT_GRE_SEQ_T_FID_COUNT} - -/*! - * \name GRE_T field IDs. - */ -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_GRE_T_C_R_K_S 0 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_GRE_T_PROTOCOL 1 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_GRE_T_RESERVED 2 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_GRE_T_VERSION 3 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_GRE_T_FID_COUNT 4 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT \ - {"C_R_K_S", BCM78920_A0_VNA_4_6_1_0_BCMPKT_GRE_T_C_R_K_S},\ - {"PROTOCOL", BCM78920_A0_VNA_4_6_1_0_BCMPKT_GRE_T_PROTOCOL},\ - {"RESERVED", BCM78920_A0_VNA_4_6_1_0_BCMPKT_GRE_T_RESERVED},\ - {"VERSION", BCM78920_A0_VNA_4_6_1_0_BCMPKT_GRE_T_VERSION},\ - {"gre_t fid count", BCM78920_A0_VNA_4_6_1_0_BCMPKT_GRE_T_FID_COUNT} - -/*! - * \name HOP_BY_HOP_T field IDs. - */ -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN 0 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER 1 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_HOP_BY_HOP_T_OPTION 2 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT 3 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT \ - {"HDR_EXT_LEN", BCM78920_A0_VNA_4_6_1_0_BCMPKT_HOP_BY_HOP_T_HDR_EXT_LEN},\ - {"NEXT_HEADER", BCM78920_A0_VNA_4_6_1_0_BCMPKT_HOP_BY_HOP_T_NEXT_HEADER},\ - {"OPTION", BCM78920_A0_VNA_4_6_1_0_BCMPKT_HOP_BY_HOP_T_OPTION},\ - {"hop_by_hop_t fid count", BCM78920_A0_VNA_4_6_1_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT} - -/*! - * \name ICMP_T field IDs. - */ -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ICMP_T_CHECKSUM 0 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ICMP_T_CODE 1 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ICMP_T_ICMP_TYPE 2 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ICMP_T_FID_COUNT 3 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT \ - {"CHECKSUM", BCM78920_A0_VNA_4_6_1_0_BCMPKT_ICMP_T_CHECKSUM},\ - {"CODE", BCM78920_A0_VNA_4_6_1_0_BCMPKT_ICMP_T_CODE},\ - {"ICMP_TYPE", BCM78920_A0_VNA_4_6_1_0_BCMPKT_ICMP_T_ICMP_TYPE},\ - {"icmp_t fid count", BCM78920_A0_VNA_4_6_1_0_BCMPKT_ICMP_T_FID_COUNT} - -/*! - * \name IFA_HEADER_T field IDs. - */ -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_IFA_HEADER_T_FLAGS 0 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_IFA_HEADER_T_GNS 1 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH 2 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_IFA_HEADER_T_NEXT_HDR 3 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_IFA_HEADER_T_VER 4 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_IFA_HEADER_T_FID_COUNT 5 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT \ - {"FLAGS", BCM78920_A0_VNA_4_6_1_0_BCMPKT_IFA_HEADER_T_FLAGS},\ - {"GNS", BCM78920_A0_VNA_4_6_1_0_BCMPKT_IFA_HEADER_T_GNS},\ - {"MAX_LENGTH", BCM78920_A0_VNA_4_6_1_0_BCMPKT_IFA_HEADER_T_MAX_LENGTH},\ - {"NEXT_HDR", BCM78920_A0_VNA_4_6_1_0_BCMPKT_IFA_HEADER_T_NEXT_HDR},\ - {"VER", BCM78920_A0_VNA_4_6_1_0_BCMPKT_IFA_HEADER_T_VER},\ - {"ifa_header_t fid count", BCM78920_A0_VNA_4_6_1_0_BCMPKT_IFA_HEADER_T_FID_COUNT} - -/*! - * \name IFA_METADATA_A_T field IDs. - */ -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_IFA_METADATA_A_T_CN 0 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_IFA_METADATA_A_T_FWD_HDR_TTL 1 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_IFA_METADATA_A_T_LNS_DEVICE_ID 2 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_IFA_METADATA_A_T_PORT_SPEED 3 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_IFA_METADATA_A_T_QUEUE_ID 4 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_IFA_METADATA_A_T_RX_TIMESTAMP_SEC 5 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT 6 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_IFA_METADATA_A_T_FIELD_NAME_MAP_INIT \ - {"CN", BCM78920_A0_VNA_4_6_1_0_BCMPKT_IFA_METADATA_A_T_CN},\ - {"FWD_HDR_TTL", BCM78920_A0_VNA_4_6_1_0_BCMPKT_IFA_METADATA_A_T_FWD_HDR_TTL},\ - {"LNS_DEVICE_ID", BCM78920_A0_VNA_4_6_1_0_BCMPKT_IFA_METADATA_A_T_LNS_DEVICE_ID},\ - {"PORT_SPEED", BCM78920_A0_VNA_4_6_1_0_BCMPKT_IFA_METADATA_A_T_PORT_SPEED},\ - {"QUEUE_ID", BCM78920_A0_VNA_4_6_1_0_BCMPKT_IFA_METADATA_A_T_QUEUE_ID},\ - {"RX_TIMESTAMP_SEC", BCM78920_A0_VNA_4_6_1_0_BCMPKT_IFA_METADATA_A_T_RX_TIMESTAMP_SEC},\ - {"ifa_metadata_a_t fid count", BCM78920_A0_VNA_4_6_1_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT} - -/*! - * \name IFA_METADATA_B_T field IDs. - */ -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_IFA_METADATA_B_T_EGRESS_PORT_ID 0 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_IFA_METADATA_B_T_INGRESS_PORT_ID 1 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_IFA_METADATA_B_T_MMU_STAT_0 2 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_IFA_METADATA_B_T_MMU_STAT_1 3 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_IFA_METADATA_B_T_RESIDENCE_TIME_NANOSEC 4 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_IFA_METADATA_B_T_RX_TIMESTAMP_NANOSEC 5 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_IFA_METADATA_B_T_TX_QUEUE_BYTE_COUNT 6 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT 7 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_IFA_METADATA_B_T_FIELD_NAME_MAP_INIT \ - {"EGRESS_PORT_ID", BCM78920_A0_VNA_4_6_1_0_BCMPKT_IFA_METADATA_B_T_EGRESS_PORT_ID},\ - {"INGRESS_PORT_ID", BCM78920_A0_VNA_4_6_1_0_BCMPKT_IFA_METADATA_B_T_INGRESS_PORT_ID},\ - {"MMU_STAT_0", BCM78920_A0_VNA_4_6_1_0_BCMPKT_IFA_METADATA_B_T_MMU_STAT_0},\ - {"MMU_STAT_1", BCM78920_A0_VNA_4_6_1_0_BCMPKT_IFA_METADATA_B_T_MMU_STAT_1},\ - {"RESIDENCE_TIME_NANOSEC", BCM78920_A0_VNA_4_6_1_0_BCMPKT_IFA_METADATA_B_T_RESIDENCE_TIME_NANOSEC},\ - {"RX_TIMESTAMP_NANOSEC", BCM78920_A0_VNA_4_6_1_0_BCMPKT_IFA_METADATA_B_T_RX_TIMESTAMP_NANOSEC},\ - {"TX_QUEUE_BYTE_COUNT", BCM78920_A0_VNA_4_6_1_0_BCMPKT_IFA_METADATA_B_T_TX_QUEUE_BYTE_COUNT},\ - {"ifa_metadata_b_t fid count", BCM78920_A0_VNA_4_6_1_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT} - -/*! - * \name IFA_METADATA_BASE_T field IDs. - */ -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_IFA_METADATA_BASE_T_ACTION_VECTOR 0 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_IFA_METADATA_BASE_T_HOP_LIMIT_CURRENT_LENGTH 1 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_IFA_METADATA_BASE_T_REQUEST_VECTOR 2 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT 3 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_IFA_METADATA_BASE_T_FIELD_NAME_MAP_INIT \ - {"ACTION_VECTOR", BCM78920_A0_VNA_4_6_1_0_BCMPKT_IFA_METADATA_BASE_T_ACTION_VECTOR},\ - {"HOP_LIMIT_CURRENT_LENGTH", BCM78920_A0_VNA_4_6_1_0_BCMPKT_IFA_METADATA_BASE_T_HOP_LIMIT_CURRENT_LENGTH},\ - {"REQUEST_VECTOR", BCM78920_A0_VNA_4_6_1_0_BCMPKT_IFA_METADATA_BASE_T_REQUEST_VECTOR},\ - {"ifa_metadata_base_t fid count", BCM78920_A0_VNA_4_6_1_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT} - -/*! - * \name IGMP_T field IDs. - */ -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_IGMP_T_CHECKSUM 0 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_IGMP_T_GROUP_ADDRESS 1 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_IGMP_T_IGMP_TYPE 2 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_IGMP_T_MAX_RESP_TIME 3 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_IGMP_T_FID_COUNT 4 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT \ - {"CHECKSUM", BCM78920_A0_VNA_4_6_1_0_BCMPKT_IGMP_T_CHECKSUM},\ - {"GROUP_ADDRESS", BCM78920_A0_VNA_4_6_1_0_BCMPKT_IGMP_T_GROUP_ADDRESS},\ - {"IGMP_TYPE", BCM78920_A0_VNA_4_6_1_0_BCMPKT_IGMP_T_IGMP_TYPE},\ - {"MAX_RESP_TIME", BCM78920_A0_VNA_4_6_1_0_BCMPKT_IGMP_T_MAX_RESP_TIME},\ - {"igmp_t fid count", BCM78920_A0_VNA_4_6_1_0_BCMPKT_IGMP_T_FID_COUNT} - -/*! - * \name IPFIX_T field IDs. - */ -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_IPFIX_T_EXPORT_TIME 0 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_IPFIX_T_LENGTH 1 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID 2 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_IPFIX_T_SEQUENCE_NUM 3 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_IPFIX_T_VERSION 4 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_IPFIX_T_FID_COUNT 5 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT \ - {"EXPORT_TIME", BCM78920_A0_VNA_4_6_1_0_BCMPKT_IPFIX_T_EXPORT_TIME},\ - {"LENGTH", BCM78920_A0_VNA_4_6_1_0_BCMPKT_IPFIX_T_LENGTH},\ - {"OBS_DOMAIN_ID", BCM78920_A0_VNA_4_6_1_0_BCMPKT_IPFIX_T_OBS_DOMAIN_ID},\ - {"SEQUENCE_NUM", BCM78920_A0_VNA_4_6_1_0_BCMPKT_IPFIX_T_SEQUENCE_NUM},\ - {"VERSION", BCM78920_A0_VNA_4_6_1_0_BCMPKT_IPFIX_T_VERSION},\ - {"ipfix_t fid count", BCM78920_A0_VNA_4_6_1_0_BCMPKT_IPFIX_T_FID_COUNT} - -/*! - * \name IPV4_T field IDs. - */ -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_IPV4_T_DA 0 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET 1 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_IPV4_T_HDR_CHECKSUM 2 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_IPV4_T_ID 3 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_IPV4_T_OPTION 4 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_IPV4_T_PROTOCOL 5 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_IPV4_T_SA 6 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_IPV4_T_TOS 7 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_IPV4_T_TOTAL_LENGTH 8 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_IPV4_T_TTL 9 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_IPV4_T_VERSION_HDR_LEN 10 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_IPV4_T_FID_COUNT 11 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT \ - {"DA", BCM78920_A0_VNA_4_6_1_0_BCMPKT_IPV4_T_DA},\ - {"FLAGS_FRAG_OFFSET", BCM78920_A0_VNA_4_6_1_0_BCMPKT_IPV4_T_FLAGS_FRAG_OFFSET},\ - {"HDR_CHECKSUM", BCM78920_A0_VNA_4_6_1_0_BCMPKT_IPV4_T_HDR_CHECKSUM},\ - {"ID", BCM78920_A0_VNA_4_6_1_0_BCMPKT_IPV4_T_ID},\ - {"OPTION", BCM78920_A0_VNA_4_6_1_0_BCMPKT_IPV4_T_OPTION},\ - {"PROTOCOL", BCM78920_A0_VNA_4_6_1_0_BCMPKT_IPV4_T_PROTOCOL},\ - {"SA", BCM78920_A0_VNA_4_6_1_0_BCMPKT_IPV4_T_SA},\ - {"TOS", BCM78920_A0_VNA_4_6_1_0_BCMPKT_IPV4_T_TOS},\ - {"TOTAL_LENGTH", BCM78920_A0_VNA_4_6_1_0_BCMPKT_IPV4_T_TOTAL_LENGTH},\ - {"TTL", BCM78920_A0_VNA_4_6_1_0_BCMPKT_IPV4_T_TTL},\ - {"VERSION_HDR_LEN", BCM78920_A0_VNA_4_6_1_0_BCMPKT_IPV4_T_VERSION_HDR_LEN},\ - {"ipv4_t fid count", BCM78920_A0_VNA_4_6_1_0_BCMPKT_IPV4_T_FID_COUNT} - -/*! - * \name IPV6_T field IDs. - */ -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_IPV6_T_DA 0 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_IPV6_T_FLOW_LABEL 1 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_IPV6_T_HOP_LIMIT 2 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_IPV6_T_NEXT_HEADER 3 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH 4 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_IPV6_T_SA 5 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_IPV6_T_TRAFFIC_CLASS 6 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_IPV6_T_VERSION 7 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_IPV6_T_FID_COUNT 8 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT \ - {"DA", BCM78920_A0_VNA_4_6_1_0_BCMPKT_IPV6_T_DA},\ - {"FLOW_LABEL", BCM78920_A0_VNA_4_6_1_0_BCMPKT_IPV6_T_FLOW_LABEL},\ - {"HOP_LIMIT", BCM78920_A0_VNA_4_6_1_0_BCMPKT_IPV6_T_HOP_LIMIT},\ - {"NEXT_HEADER", BCM78920_A0_VNA_4_6_1_0_BCMPKT_IPV6_T_NEXT_HEADER},\ - {"PAYLOAD_LENGTH", BCM78920_A0_VNA_4_6_1_0_BCMPKT_IPV6_T_PAYLOAD_LENGTH},\ - {"SA", BCM78920_A0_VNA_4_6_1_0_BCMPKT_IPV6_T_SA},\ - {"TRAFFIC_CLASS", BCM78920_A0_VNA_4_6_1_0_BCMPKT_IPV6_T_TRAFFIC_CLASS},\ - {"VERSION", BCM78920_A0_VNA_4_6_1_0_BCMPKT_IPV6_T_VERSION},\ - {"ipv6_t fid count", BCM78920_A0_VNA_4_6_1_0_BCMPKT_IPV6_T_FID_COUNT} - -/*! - * \name L2_INSTR_4BYTE_T field IDs. - */ -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_L2_INSTR_4BYTE_T_TAG 0 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_L2_INSTR_4BYTE_T_TPID 1 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_L2_INSTR_4BYTE_T_FID_COUNT 2 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_L2_INSTR_4BYTE_T_FIELD_NAME_MAP_INIT \ - {"TAG", BCM78920_A0_VNA_4_6_1_0_BCMPKT_L2_INSTR_4BYTE_T_TAG},\ - {"TPID", BCM78920_A0_VNA_4_6_1_0_BCMPKT_L2_INSTR_4BYTE_T_TPID},\ - {"l2_instr_4byte_t fid count", BCM78920_A0_VNA_4_6_1_0_BCMPKT_L2_INSTR_4BYTE_T_FID_COUNT} - -/*! - * \name L2_INSTR_8BYTE_T field IDs. - */ -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_L2_INSTR_8BYTE_T_TAG_HI 0 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_L2_INSTR_8BYTE_T_TAG_LO 1 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_L2_INSTR_8BYTE_T_TAG_MID 2 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_L2_INSTR_8BYTE_T_TPID 3 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_L2_INSTR_8BYTE_T_FID_COUNT 4 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_L2_INSTR_8BYTE_T_FIELD_NAME_MAP_INIT \ - {"TAG_HI", BCM78920_A0_VNA_4_6_1_0_BCMPKT_L2_INSTR_8BYTE_T_TAG_HI},\ - {"TAG_LO", BCM78920_A0_VNA_4_6_1_0_BCMPKT_L2_INSTR_8BYTE_T_TAG_LO},\ - {"TAG_MID", BCM78920_A0_VNA_4_6_1_0_BCMPKT_L2_INSTR_8BYTE_T_TAG_MID},\ - {"TPID", BCM78920_A0_VNA_4_6_1_0_BCMPKT_L2_INSTR_8BYTE_T_TPID},\ - {"l2_instr_8byte_t fid count", BCM78920_A0_VNA_4_6_1_0_BCMPKT_L2_INSTR_8BYTE_T_FID_COUNT} - -/*! - * \name L2_T field IDs. - */ -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_L2_T_MACDA 0 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_L2_T_MACSA 1 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_L2_T_FID_COUNT 2 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT \ - {"MACDA", BCM78920_A0_VNA_4_6_1_0_BCMPKT_L2_T_MACDA},\ - {"MACSA", BCM78920_A0_VNA_4_6_1_0_BCMPKT_L2_T_MACSA},\ - {"l2_t fid count", BCM78920_A0_VNA_4_6_1_0_BCMPKT_L2_T_FID_COUNT} - -/*! - * \name MIRROR_ERSPAN_SN_T field IDs. - */ -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM 0 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT 1 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT \ - {"SEQ_NUM", BCM78920_A0_VNA_4_6_1_0_BCMPKT_MIRROR_ERSPAN_SN_T_SEQ_NUM},\ - {"mirror_erspan_sn_t fid count", BCM78920_A0_VNA_4_6_1_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT} - -/*! - * \name MIRROR_TRANSPORT_T field IDs. - */ -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_MIRROR_TRANSPORT_T_DATA 0 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT 1 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT \ - {"DATA", BCM78920_A0_VNA_4_6_1_0_BCMPKT_MIRROR_TRANSPORT_T_DATA},\ - {"mirror_transport_t fid count", BCM78920_A0_VNA_4_6_1_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT} - -/*! - * \name MPLS_ACH_T field IDs. - */ -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE 0 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_MPLS_ACH_T_CW_TYPE 1 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_MPLS_ACH_T_RESERVED 2 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_MPLS_ACH_T_VERSION 3 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_MPLS_ACH_T_FID_COUNT 4 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT \ - {"CHANNEL_TYPE", BCM78920_A0_VNA_4_6_1_0_BCMPKT_MPLS_ACH_T_CHANNEL_TYPE},\ - {"CW_TYPE", BCM78920_A0_VNA_4_6_1_0_BCMPKT_MPLS_ACH_T_CW_TYPE},\ - {"RESERVED", BCM78920_A0_VNA_4_6_1_0_BCMPKT_MPLS_ACH_T_RESERVED},\ - {"VERSION", BCM78920_A0_VNA_4_6_1_0_BCMPKT_MPLS_ACH_T_VERSION},\ - {"mpls_ach_t fid count", BCM78920_A0_VNA_4_6_1_0_BCMPKT_MPLS_ACH_T_FID_COUNT} - -/*! - * \name MPLS_BV_T field IDs. - */ -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_MPLS_BV_T_VALUE 0 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_MPLS_BV_T_FID_COUNT 1 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT \ - {"VALUE", BCM78920_A0_VNA_4_6_1_0_BCMPKT_MPLS_BV_T_VALUE},\ - {"mpls_bv_t fid count", BCM78920_A0_VNA_4_6_1_0_BCMPKT_MPLS_BV_T_FID_COUNT} - -/*! - * \name MPLS_CW_T field IDs. - */ -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_MPLS_CW_T_CW_TYPE 0 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_MPLS_CW_T_RESERVED 1 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER 2 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_MPLS_CW_T_FID_COUNT 3 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT \ - {"CW_TYPE", BCM78920_A0_VNA_4_6_1_0_BCMPKT_MPLS_CW_T_CW_TYPE},\ - {"RESERVED", BCM78920_A0_VNA_4_6_1_0_BCMPKT_MPLS_CW_T_RESERVED},\ - {"SEQ_NUMBER", BCM78920_A0_VNA_4_6_1_0_BCMPKT_MPLS_CW_T_SEQ_NUMBER},\ - {"mpls_cw_t fid count", BCM78920_A0_VNA_4_6_1_0_BCMPKT_MPLS_CW_T_FID_COUNT} - -/*! - * \name MPLS_T field IDs. - */ -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_MPLS_T_BOS 0 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_MPLS_T_EXP 1 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_MPLS_T_LABEL 2 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_MPLS_T_TTL 3 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_MPLS_T_FID_COUNT 4 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT \ - {"BOS", BCM78920_A0_VNA_4_6_1_0_BCMPKT_MPLS_T_BOS},\ - {"EXP", BCM78920_A0_VNA_4_6_1_0_BCMPKT_MPLS_T_EXP},\ - {"LABEL", BCM78920_A0_VNA_4_6_1_0_BCMPKT_MPLS_T_LABEL},\ - {"TTL", BCM78920_A0_VNA_4_6_1_0_BCMPKT_MPLS_T_TTL},\ - {"mpls_t fid count", BCM78920_A0_VNA_4_6_1_0_BCMPKT_MPLS_T_FID_COUNT} - -/*! - * \name P_1588_T field IDs. - */ -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_P_1588_T_CNTRL 0 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_P_1588_T_CORRECTION 1 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_P_1588_T_DOMAIN_NB 2 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_P_1588_T_FLAGS 3 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_P_1588_T_LOGMSGINTERVAL 4 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_P_1588_T_MSG_LENGTH 5 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_P_1588_T_MSG_TYPE 6 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_P_1588_T_RESERVED1 7 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_P_1588_T_RESERVED2 8 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_P_1588_T_RESERVED3 9 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_P_1588_T_SEQ_ID 10 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_P_1588_T_SRCPORTID 11 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_P_1588_T_TRANSPORTSPEC 12 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_P_1588_T_VERSION 13 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_P_1588_T_FID_COUNT 14 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT \ - {"CNTRL", BCM78920_A0_VNA_4_6_1_0_BCMPKT_P_1588_T_CNTRL},\ - {"CORRECTION", BCM78920_A0_VNA_4_6_1_0_BCMPKT_P_1588_T_CORRECTION},\ - {"DOMAIN_NB", BCM78920_A0_VNA_4_6_1_0_BCMPKT_P_1588_T_DOMAIN_NB},\ - {"FLAGS", BCM78920_A0_VNA_4_6_1_0_BCMPKT_P_1588_T_FLAGS},\ - {"LOGMSGINTERVAL", BCM78920_A0_VNA_4_6_1_0_BCMPKT_P_1588_T_LOGMSGINTERVAL},\ - {"MSG_LENGTH", BCM78920_A0_VNA_4_6_1_0_BCMPKT_P_1588_T_MSG_LENGTH},\ - {"MSG_TYPE", BCM78920_A0_VNA_4_6_1_0_BCMPKT_P_1588_T_MSG_TYPE},\ - {"RESERVED1", BCM78920_A0_VNA_4_6_1_0_BCMPKT_P_1588_T_RESERVED1},\ - {"RESERVED2", BCM78920_A0_VNA_4_6_1_0_BCMPKT_P_1588_T_RESERVED2},\ - {"RESERVED3", BCM78920_A0_VNA_4_6_1_0_BCMPKT_P_1588_T_RESERVED3},\ - {"SEQ_ID", BCM78920_A0_VNA_4_6_1_0_BCMPKT_P_1588_T_SEQ_ID},\ - {"SRCPORTID", BCM78920_A0_VNA_4_6_1_0_BCMPKT_P_1588_T_SRCPORTID},\ - {"TRANSPORTSPEC", BCM78920_A0_VNA_4_6_1_0_BCMPKT_P_1588_T_TRANSPORTSPEC},\ - {"VERSION", BCM78920_A0_VNA_4_6_1_0_BCMPKT_P_1588_T_VERSION},\ - {"p_1588_t fid count", BCM78920_A0_VNA_4_6_1_0_BCMPKT_P_1588_T_FID_COUNT} - -/*! - * \name PSAMP_0_T field IDs. - */ -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_0_T_FLOWSET 0 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_0_T_LENGTH 1 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX 2 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS 3 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_0_T_OBS_TIME_S 4 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID 5 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_0_T_FID_COUNT 6 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT \ - {"FLOWSET", BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_0_T_FLOWSET},\ - {"LENGTH", BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_0_T_LENGTH},\ - {"NEXT_HOP_INDEX", BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_0_T_NEXT_HOP_INDEX},\ - {"OBS_TIME_NS", BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_0_T_OBS_TIME_NS},\ - {"OBS_TIME_S", BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_0_T_OBS_TIME_S},\ - {"TEMPLATE_ID", BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_0_T_TEMPLATE_ID},\ - {"psamp_0_t fid count", BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_0_T_FID_COUNT} - -/*! - * \name PSAMP_1_T field IDs. - */ -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_1_T_DLB_ID 0 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_1_T_EGRESS_PORT 1 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_1_T_EPOCH 2 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_1_T_INGRESS_PORT 3 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH 4 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_1_T_USER_META_DATA 5 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG 6 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_1_T_FID_COUNT 7 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT \ - {"DLB_ID", BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_1_T_DLB_ID},\ - {"EGRESS_PORT", BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_1_T_EGRESS_PORT},\ - {"EPOCH", BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_1_T_EPOCH},\ - {"INGRESS_PORT", BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_1_T_INGRESS_PORT},\ - {"SAMPLED_LENGTH", BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_1_T_SAMPLED_LENGTH},\ - {"USER_META_DATA", BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_1_T_USER_META_DATA},\ - {"VARIABLE_FLAG", BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_1_T_VARIABLE_FLAG},\ - {"psamp_1_t fid count", BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_1_T_FID_COUNT} - -/*! - * \name PSAMP_MIRROR_ON_DROP_0_T field IDs. - */ -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT 0 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT 1 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH 2 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS 3 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S 4 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID 5 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID 6 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT 7 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT \ - {"EGRESS_MOD_PORT", BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_EGRESS_MOD_PORT},\ - {"INGRESS_PORT", BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_INGRESS_PORT},\ - {"LENGTH", BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_LENGTH},\ - {"OBS_TIME_NS", BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_NS},\ - {"OBS_TIME_S", BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_OBS_TIME_S},\ - {"SWITCH_ID", BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_SWITCH_ID},\ - {"TEMPLATE_ID", BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_TEMPLATE_ID},\ - {"psamp_mirror_on_drop_0_t fid count", BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT} - -/*! - * \name PSAMP_MIRROR_ON_DROP_1_T field IDs. - */ -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_DROP_REASON 0 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_RESERVED_0 1 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_SAMPLED_LENGTH 2 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_SMOD_STATE 3 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_UC_COS__COLOR__PROB_IDX 4 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_USER_META_DATA 5 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_VAR_LEN_INDICATOR 6 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT 7 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FIELD_NAME_MAP_INIT \ - {"DROP_REASON", BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_DROP_REASON},\ - {"RESERVED_0", BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_RESERVED_0},\ - {"SAMPLED_LENGTH", BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_SAMPLED_LENGTH},\ - {"SMOD_STATE", BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_SMOD_STATE},\ - {"UC_COS__COLOR__PROB_IDX", BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_UC_COS__COLOR__PROB_IDX},\ - {"USER_META_DATA", BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_USER_META_DATA},\ - {"VAR_LEN_INDICATOR", BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_VAR_LEN_INDICATOR},\ - {"psamp_mirror_on_drop_1_t fid count", BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT} - -/*! - * \name PSAMP_MIRROR_ON_DROP_2_T field IDs. - */ -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EGR_DROP_REASON 0 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EP_COPY_SESSION_INDEX 1 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_RESERVED_0 2 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_SAMPLED_LENGTH 3 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_USER_META_DATA 4 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_VAR_LEN_INDICATOR 5 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT 6 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FIELD_NAME_MAP_INIT \ - {"EGR_DROP_REASON", BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EGR_DROP_REASON},\ - {"EP_COPY_SESSION_INDEX", BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_EP_COPY_SESSION_INDEX},\ - {"RESERVED_0", BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_RESERVED_0},\ - {"SAMPLED_LENGTH", BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_SAMPLED_LENGTH},\ - {"USER_META_DATA", BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_USER_META_DATA},\ - {"VAR_LEN_INDICATOR", BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_VAR_LEN_INDICATOR},\ - {"psamp_mirror_on_drop_2_t fid count", BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT} - -/*! - * \name PSAMP_POSTCARD_0_T field IDs. - */ -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_POSTCARD_0_T_EGRESS_MOD_PORT 0 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_POSTCARD_0_T_INGRESS_PORT 1 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_POSTCARD_0_T_OBS_TIME_NS 2 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_POSTCARD_0_T_OBS_TIME_S 3 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_POSTCARD_0_T_PSAMP_LENGTH 4 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_POSTCARD_0_T_TEMPLATE_ID 5 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_POSTCARD_0_T_FID_COUNT 6 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_POSTCARD_0_T_FIELD_NAME_MAP_INIT \ - {"EGRESS_MOD_PORT", BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_POSTCARD_0_T_EGRESS_MOD_PORT},\ - {"INGRESS_PORT", BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_POSTCARD_0_T_INGRESS_PORT},\ - {"OBS_TIME_NS", BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_POSTCARD_0_T_OBS_TIME_NS},\ - {"OBS_TIME_S", BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_POSTCARD_0_T_OBS_TIME_S},\ - {"PSAMP_LENGTH", BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_POSTCARD_0_T_PSAMP_LENGTH},\ - {"TEMPLATE_ID", BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_POSTCARD_0_T_TEMPLATE_ID},\ - {"psamp_postcard_0_t fid count", BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_POSTCARD_0_T_FID_COUNT} - -/*! - * \name PSAMP_POSTCARD_1_T field IDs. - */ -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_POSTCARD_1_T_COLOR_IDX_COS_DROPLOC 0 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_POSTCARD_1_T_DROP_REASON_CODE 1 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_POSTCARD_1_T_MMU_STAT_0 2 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_POSTCARD_1_T_MMU_STAT_1 3 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_POSTCARD_1_T_QUEUE_ID 4 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_POSTCARD_1_T_RESERVED_1 5 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_POSTCARD_1_T_RESIDENCE_TIME 6 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_POSTCARD_1_T_SAMPLED_LENGTH 7 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_POSTCARD_1_T_VAR_LEN_INDICATOR 8 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_POSTCARD_1_T_FID_COUNT 9 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_POSTCARD_1_T_FIELD_NAME_MAP_INIT \ - {"COLOR_IDX_COS_DROPLOC", BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_POSTCARD_1_T_COLOR_IDX_COS_DROPLOC},\ - {"DROP_REASON_CODE", BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_POSTCARD_1_T_DROP_REASON_CODE},\ - {"MMU_STAT_0", BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_POSTCARD_1_T_MMU_STAT_0},\ - {"MMU_STAT_1", BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_POSTCARD_1_T_MMU_STAT_1},\ - {"QUEUE_ID", BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_POSTCARD_1_T_QUEUE_ID},\ - {"RESERVED_1", BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_POSTCARD_1_T_RESERVED_1},\ - {"RESIDENCE_TIME", BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_POSTCARD_1_T_RESIDENCE_TIME},\ - {"SAMPLED_LENGTH", BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_POSTCARD_1_T_SAMPLED_LENGTH},\ - {"VAR_LEN_INDICATOR", BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_POSTCARD_1_T_VAR_LEN_INDICATOR},\ - {"psamp_postcard_1_t fid count", BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_POSTCARD_1_T_FID_COUNT} - -/*! - * \name RARP_T field IDs. - */ -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RARP_T_HARDWARE_LEN 0 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RARP_T_HARDWARE_TYPE 1 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RARP_T_OPERATION 2 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RARP_T_PROT_ADDR_LEN 3 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RARP_T_PROTOCOL_TYPE 4 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RARP_T_SENDER_HA 5 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RARP_T_SENDER_IP 6 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RARP_T_TARGET_HA 7 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RARP_T_TARGET_IP 8 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RARP_T_FID_COUNT 9 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT \ - {"HARDWARE_LEN", BCM78920_A0_VNA_4_6_1_0_BCMPKT_RARP_T_HARDWARE_LEN},\ - {"HARDWARE_TYPE", BCM78920_A0_VNA_4_6_1_0_BCMPKT_RARP_T_HARDWARE_TYPE},\ - {"OPERATION", BCM78920_A0_VNA_4_6_1_0_BCMPKT_RARP_T_OPERATION},\ - {"PROT_ADDR_LEN", BCM78920_A0_VNA_4_6_1_0_BCMPKT_RARP_T_PROT_ADDR_LEN},\ - {"PROTOCOL_TYPE", BCM78920_A0_VNA_4_6_1_0_BCMPKT_RARP_T_PROTOCOL_TYPE},\ - {"SENDER_HA", BCM78920_A0_VNA_4_6_1_0_BCMPKT_RARP_T_SENDER_HA},\ - {"SENDER_IP", BCM78920_A0_VNA_4_6_1_0_BCMPKT_RARP_T_SENDER_IP},\ - {"TARGET_HA", BCM78920_A0_VNA_4_6_1_0_BCMPKT_RARP_T_TARGET_HA},\ - {"TARGET_IP", BCM78920_A0_VNA_4_6_1_0_BCMPKT_RARP_T_TARGET_IP},\ - {"rarp_t fid count", BCM78920_A0_VNA_4_6_1_0_BCMPKT_RARP_T_FID_COUNT} - -/*! - * \name ROCEV2_AETH_T field IDs. - */ -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROCEV2_AETH_T_MSG_SEQ_NUM_LO 0 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROCEV2_AETH_T_SYNDROME_MSG_SEQ_NUM_HI 1 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROCEV2_AETH_T_FID_COUNT 2 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROCEV2_AETH_T_FIELD_NAME_MAP_INIT \ - {"MSG_SEQ_NUM_LO", BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROCEV2_AETH_T_MSG_SEQ_NUM_LO},\ - {"SYNDROME_MSG_SEQ_NUM_HI", BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROCEV2_AETH_T_SYNDROME_MSG_SEQ_NUM_HI},\ - {"rocev2_aeth_t fid count", BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROCEV2_AETH_T_FID_COUNT} - -/*! - * \name ROCEV2_BTH_T field IDs. - */ -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROCEV2_BTH_T_DST_QP_HI 0 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROCEV2_BTH_T_DST_QP_LO_A 1 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROCEV2_BTH_T_DST_QP_LO_B 2 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROCEV2_BTH_T_FLAGS_VER 3 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROCEV2_BTH_T_OPCODE 4 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROCEV2_BTH_T_PARTITION_KEY 5 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROCEV2_BTH_T_RESERVED 6 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROCEV2_BTH_T_RESERVED_SEQ_NUM_HI 7 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROCEV2_BTH_T_SEQ_NUM_LO 8 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROCEV2_BTH_T_FID_COUNT 9 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROCEV2_BTH_T_FIELD_NAME_MAP_INIT \ - {"DST_QP_HI", BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROCEV2_BTH_T_DST_QP_HI},\ - {"DST_QP_LO_A", BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROCEV2_BTH_T_DST_QP_LO_A},\ - {"DST_QP_LO_B", BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROCEV2_BTH_T_DST_QP_LO_B},\ - {"FLAGS_VER", BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROCEV2_BTH_T_FLAGS_VER},\ - {"OPCODE", BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROCEV2_BTH_T_OPCODE},\ - {"PARTITION_KEY", BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROCEV2_BTH_T_PARTITION_KEY},\ - {"RESERVED", BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROCEV2_BTH_T_RESERVED},\ - {"RESERVED_SEQ_NUM_HI", BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROCEV2_BTH_T_RESERVED_SEQ_NUM_HI},\ - {"SEQ_NUM_LO", BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROCEV2_BTH_T_SEQ_NUM_LO},\ - {"rocev2_bth_t fid count", BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROCEV2_BTH_T_FID_COUNT} - -/*! - * \name ROCEV2_DETH_T field IDs. - */ -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROCEV2_DETH_T_QUEUE_KEY_HI 0 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROCEV2_DETH_T_QUEUE_KEY_LO 1 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROCEV2_DETH_T_RESERVED_SRC_QP_HI 2 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROCEV2_DETH_T_SRC_QP_LO 3 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROCEV2_DETH_T_FID_COUNT 4 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROCEV2_DETH_T_FIELD_NAME_MAP_INIT \ - {"QUEUE_KEY_HI", BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROCEV2_DETH_T_QUEUE_KEY_HI},\ - {"QUEUE_KEY_LO", BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROCEV2_DETH_T_QUEUE_KEY_LO},\ - {"RESERVED_SRC_QP_HI", BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROCEV2_DETH_T_RESERVED_SRC_QP_HI},\ - {"SRC_QP_LO", BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROCEV2_DETH_T_SRC_QP_LO},\ - {"rocev2_deth_t fid count", BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROCEV2_DETH_T_FID_COUNT} - -/*! - * \name ROCEV2_RETH_T field IDs. - */ -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROCEV2_RETH_T_DMA_LENGTH_HI 0 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROCEV2_RETH_T_DMA_LENGTH_LO 1 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROCEV2_RETH_T_REMOTE_KEY_HI 2 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROCEV2_RETH_T_REMOTE_KEY_LO 3 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROCEV2_RETH_T_VIRTUAL_ADDRESS_HI 4 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROCEV2_RETH_T_VIRTUAL_ADDRESS_LO 5 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROCEV2_RETH_T_FID_COUNT 6 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROCEV2_RETH_T_FIELD_NAME_MAP_INIT \ - {"DMA_LENGTH_HI", BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROCEV2_RETH_T_DMA_LENGTH_HI},\ - {"DMA_LENGTH_LO", BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROCEV2_RETH_T_DMA_LENGTH_LO},\ - {"REMOTE_KEY_HI", BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROCEV2_RETH_T_REMOTE_KEY_HI},\ - {"REMOTE_KEY_LO", BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROCEV2_RETH_T_REMOTE_KEY_LO},\ - {"VIRTUAL_ADDRESS_HI", BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROCEV2_RETH_T_VIRTUAL_ADDRESS_HI},\ - {"VIRTUAL_ADDRESS_LO", BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROCEV2_RETH_T_VIRTUAL_ADDRESS_LO},\ - {"rocev2_reth_t fid count", BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROCEV2_RETH_T_FID_COUNT} - -/*! - * \name ROUTING_T field IDs. - */ -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROUTING_T_DATA 0 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROUTING_T_HDR_EXT_LEN 1 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROUTING_T_NEXT_HEADER 2 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROUTING_T_ROUTING_TYPE 3 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT 4 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROUTING_T_FID_COUNT 5 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT \ - {"DATA", BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROUTING_T_DATA},\ - {"HDR_EXT_LEN", BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROUTING_T_HDR_EXT_LEN},\ - {"NEXT_HEADER", BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROUTING_T_NEXT_HEADER},\ - {"ROUTING_TYPE", BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROUTING_T_ROUTING_TYPE},\ - {"SEGMENTS_LEFT", BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROUTING_T_SEGMENTS_LEFT},\ - {"routing_t fid count", BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROUTING_T_FID_COUNT} - -/*! - * \name RSPAN_T field IDs. - */ -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RSPAN_T_TAG 0 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RSPAN_T_TPID 1 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RSPAN_T_FID_COUNT 2 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT \ - {"TAG", BCM78920_A0_VNA_4_6_1_0_BCMPKT_RSPAN_T_TAG},\ - {"TPID", BCM78920_A0_VNA_4_6_1_0_BCMPKT_RSPAN_T_TPID},\ - {"rspan_t fid count", BCM78920_A0_VNA_4_6_1_0_BCMPKT_RSPAN_T_FID_COUNT} - -/*! - * \name SFLOW_SHIM_0_T field IDs. - */ -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION 0 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE 1 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_SFLOW_SHIM_0_T_VERSION 2 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT 3 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT \ - {"SYS_DESTINATION", BCM78920_A0_VNA_4_6_1_0_BCMPKT_SFLOW_SHIM_0_T_SYS_DESTINATION},\ - {"SYS_SOURCE", BCM78920_A0_VNA_4_6_1_0_BCMPKT_SFLOW_SHIM_0_T_SYS_SOURCE},\ - {"VERSION", BCM78920_A0_VNA_4_6_1_0_BCMPKT_SFLOW_SHIM_0_T_VERSION},\ - {"sflow_shim_0_t fid count", BCM78920_A0_VNA_4_6_1_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT} - -/*! - * \name SFLOW_SHIM_1_T field IDs. - */ -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE 0 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED 1 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE 2 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST 3 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE 4 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED 5 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED 6 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE 7 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT 8 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT \ - {"FLAG_DEST_SAMPLE", BCM78920_A0_VNA_4_6_1_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DEST_SAMPLE},\ - {"FLAG_DISCARDED", BCM78920_A0_VNA_4_6_1_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_DISCARDED},\ - {"FLAG_FLEX_SAMPLE", BCM78920_A0_VNA_4_6_1_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_FLEX_SAMPLE},\ - {"FLAG_MCAST", BCM78920_A0_VNA_4_6_1_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_MCAST},\ - {"FLAG_SRC_SAMPLE", BCM78920_A0_VNA_4_6_1_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_SRC_SAMPLE},\ - {"FLAG_TRUNCATED", BCM78920_A0_VNA_4_6_1_0_BCMPKT_SFLOW_SHIM_1_T_FLAG_TRUNCATED},\ - {"RESERVED", BCM78920_A0_VNA_4_6_1_0_BCMPKT_SFLOW_SHIM_1_T_RESERVED},\ - {"SYS_OPCODE", BCM78920_A0_VNA_4_6_1_0_BCMPKT_SFLOW_SHIM_1_T_SYS_OPCODE},\ - {"sflow_shim_1_t fid count", BCM78920_A0_VNA_4_6_1_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT} - -/*! - * \name SFLOW_SHIM_2_T field IDs. - */ -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM 0 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA 1 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT 2 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT \ - {"SEQUENCE_NUM", BCM78920_A0_VNA_4_6_1_0_BCMPKT_SFLOW_SHIM_2_T_SEQUENCE_NUM},\ - {"USER_META_DATA", BCM78920_A0_VNA_4_6_1_0_BCMPKT_SFLOW_SHIM_2_T_USER_META_DATA},\ - {"sflow_shim_2_t fid count", BCM78920_A0_VNA_4_6_1_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT} - -/*! - * \name SNAP_LLC_T field IDs. - */ -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_SNAP_LLC_T_LENGTH 0 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_SNAP_LLC_T_SNAP_LLC 1 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_SNAP_LLC_T_FID_COUNT 2 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT \ - {"LENGTH", BCM78920_A0_VNA_4_6_1_0_BCMPKT_SNAP_LLC_T_LENGTH},\ - {"SNAP_LLC", BCM78920_A0_VNA_4_6_1_0_BCMPKT_SNAP_LLC_T_SNAP_LLC},\ - {"snap_llc_t fid count", BCM78920_A0_VNA_4_6_1_0_BCMPKT_SNAP_LLC_T_FID_COUNT} - -/*! - * \name TCP_FIRST_4BYTES_T field IDs. - */ -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT 0 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT 1 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT 2 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT \ - {"DST_PORT", BCM78920_A0_VNA_4_6_1_0_BCMPKT_TCP_FIRST_4BYTES_T_DST_PORT},\ - {"SRC_PORT", BCM78920_A0_VNA_4_6_1_0_BCMPKT_TCP_FIRST_4BYTES_T_SRC_PORT},\ - {"tcp_first_4bytes_t fid count", BCM78920_A0_VNA_4_6_1_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT} - -/*! - * \name TCP_LAST_16BYTES_T field IDs. - */ -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM 0 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM 1 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS 2 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM 3 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR 4 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE 5 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT 6 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT \ - {"ACK_NUM", BCM78920_A0_VNA_4_6_1_0_BCMPKT_TCP_LAST_16BYTES_T_ACK_NUM},\ - {"CHECKSUM", BCM78920_A0_VNA_4_6_1_0_BCMPKT_TCP_LAST_16BYTES_T_CHECKSUM},\ - {"HDR_LEN_AND_FLAGS", BCM78920_A0_VNA_4_6_1_0_BCMPKT_TCP_LAST_16BYTES_T_HDR_LEN_AND_FLAGS},\ - {"SEQ_NUM", BCM78920_A0_VNA_4_6_1_0_BCMPKT_TCP_LAST_16BYTES_T_SEQ_NUM},\ - {"URGENT_PTR", BCM78920_A0_VNA_4_6_1_0_BCMPKT_TCP_LAST_16BYTES_T_URGENT_PTR},\ - {"WIN_SIZE", BCM78920_A0_VNA_4_6_1_0_BCMPKT_TCP_LAST_16BYTES_T_WIN_SIZE},\ - {"tcp_last_16bytes_t fid count", BCM78920_A0_VNA_4_6_1_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT} - -/*! - * \name UDP_T field IDs. - */ -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_UDP_T_CHECKSUM 0 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_UDP_T_DST_PORT 1 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_UDP_T_SRC_PORT 2 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_UDP_T_UDP_LENGTH 3 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_UDP_T_FID_COUNT 4 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT \ - {"CHECKSUM", BCM78920_A0_VNA_4_6_1_0_BCMPKT_UDP_T_CHECKSUM},\ - {"DST_PORT", BCM78920_A0_VNA_4_6_1_0_BCMPKT_UDP_T_DST_PORT},\ - {"SRC_PORT", BCM78920_A0_VNA_4_6_1_0_BCMPKT_UDP_T_SRC_PORT},\ - {"UDP_LENGTH", BCM78920_A0_VNA_4_6_1_0_BCMPKT_UDP_T_UDP_LENGTH},\ - {"udp_t fid count", BCM78920_A0_VNA_4_6_1_0_BCMPKT_UDP_T_FID_COUNT} - -/*! - * \name UNKNOWN_L3_T field IDs. - */ -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD 0 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD 1 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT 2 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT \ - {"FIRST_16BYTES_OF_L3_PAYLOAD", BCM78920_A0_VNA_4_6_1_0_BCMPKT_UNKNOWN_L3_T_FIRST_16BYTES_OF_L3_PAYLOAD},\ - {"NEXT_16BYTES_OF_L3_PAYLOAD", BCM78920_A0_VNA_4_6_1_0_BCMPKT_UNKNOWN_L3_T_NEXT_16BYTES_OF_L3_PAYLOAD},\ - {"unknown_l3_t fid count", BCM78920_A0_VNA_4_6_1_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT} - -/*! - * \name UNKNOWN_L4_T field IDs. - */ -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD 0 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT 1 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT \ - {"FIRST_4BYTES_OF_L4_PAYLOAD", BCM78920_A0_VNA_4_6_1_0_BCMPKT_UNKNOWN_L4_T_FIRST_4BYTES_OF_L4_PAYLOAD},\ - {"unknown_l4_t fid count", BCM78920_A0_VNA_4_6_1_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT} - -/*! - * \name UNKNOWN_L5_T field IDs. - */ -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1 0 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3 1 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7 2 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_8_9 3 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT 4 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT \ - {"L5_BYTES_0_1", BCM78920_A0_VNA_4_6_1_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_0_1},\ - {"L5_BYTES_2_3", BCM78920_A0_VNA_4_6_1_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_2_3},\ - {"L5_BYTES_4_7", BCM78920_A0_VNA_4_6_1_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_4_7},\ - {"L5_BYTES_8_9", BCM78920_A0_VNA_4_6_1_0_BCMPKT_UNKNOWN_L5_T_L5_BYTES_8_9},\ - {"unknown_l5_t fid count", BCM78920_A0_VNA_4_6_1_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT} - -/*! - * \name VLAN_T field IDs. - */ -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_VLAN_T_CFI 0 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_VLAN_T_PCP 1 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_VLAN_T_TPID 2 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_VLAN_T_VID 3 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_VLAN_T_FID_COUNT 4 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT \ - {"CFI", BCM78920_A0_VNA_4_6_1_0_BCMPKT_VLAN_T_CFI},\ - {"PCP", BCM78920_A0_VNA_4_6_1_0_BCMPKT_VLAN_T_PCP},\ - {"TPID", BCM78920_A0_VNA_4_6_1_0_BCMPKT_VLAN_T_TPID},\ - {"VID", BCM78920_A0_VNA_4_6_1_0_BCMPKT_VLAN_T_VID},\ - {"vlan_t fid count", BCM78920_A0_VNA_4_6_1_0_BCMPKT_VLAN_T_FID_COUNT} - -/*! - * \name VPP_RX_MD_HEADER_T field IDs. - */ -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_VPP_RX_MD_HEADER_T_AR_GROUP_TOS 0 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_VPP_RX_MD_HEADER_T_CPU_OPCODE 1 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_VPP_RX_MD_HEADER_T_DROP_CODE_MATCHED_DST_SRC_PORT 2 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_VPP_RX_MD_HEADER_T_ETHERTYPE 3 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_VPP_RX_MD_HEADER_T_FWD_VLAN_SW_COPY_REASON_QUEUE_NUM 4 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_VPP_RX_MD_HEADER_T_INPUT_PRI_QBUS_INT_CN_CNG_MOD_DATA 5 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_VPP_RX_MD_HEADER_T_MISC_DATA 6 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_VPP_RX_MD_HEADER_T_MOD_DATA_INSTR_ACTION_RESERVED 7 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_VPP_RX_MD_HEADER_T_NONSW_COPY_BITMAP 8 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_VPP_RX_MD_HEADER_T_RESERVED 9 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_VPP_RX_MD_HEADER_T_SW_COPY_QUEUE_DST_PORT 10 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_VPP_RX_MD_HEADER_T_TIMESTAMP 11 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_VPP_RX_MD_HEADER_T_TRUNCATED_FULL_PKT_LENGTH 12 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_VPP_RX_MD_HEADER_T_FID_COUNT 13 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_VPP_RX_MD_HEADER_T_FIELD_NAME_MAP_INIT \ - {"AR_GROUP_TOS", BCM78920_A0_VNA_4_6_1_0_BCMPKT_VPP_RX_MD_HEADER_T_AR_GROUP_TOS},\ - {"CPU_OPCODE", BCM78920_A0_VNA_4_6_1_0_BCMPKT_VPP_RX_MD_HEADER_T_CPU_OPCODE},\ - {"DROP_CODE_MATCHED_DST_SRC_PORT", BCM78920_A0_VNA_4_6_1_0_BCMPKT_VPP_RX_MD_HEADER_T_DROP_CODE_MATCHED_DST_SRC_PORT},\ - {"ETHERTYPE", BCM78920_A0_VNA_4_6_1_0_BCMPKT_VPP_RX_MD_HEADER_T_ETHERTYPE},\ - {"FWD_VLAN_SW_COPY_REASON_QUEUE_NUM", BCM78920_A0_VNA_4_6_1_0_BCMPKT_VPP_RX_MD_HEADER_T_FWD_VLAN_SW_COPY_REASON_QUEUE_NUM},\ - {"INPUT_PRI_QBUS_INT_CN_CNG_MOD_DATA", BCM78920_A0_VNA_4_6_1_0_BCMPKT_VPP_RX_MD_HEADER_T_INPUT_PRI_QBUS_INT_CN_CNG_MOD_DATA},\ - {"MISC_DATA", BCM78920_A0_VNA_4_6_1_0_BCMPKT_VPP_RX_MD_HEADER_T_MISC_DATA},\ - {"MOD_DATA_INSTR_ACTION_RESERVED", BCM78920_A0_VNA_4_6_1_0_BCMPKT_VPP_RX_MD_HEADER_T_MOD_DATA_INSTR_ACTION_RESERVED},\ - {"NONSW_COPY_BITMAP", BCM78920_A0_VNA_4_6_1_0_BCMPKT_VPP_RX_MD_HEADER_T_NONSW_COPY_BITMAP},\ - {"RESERVED", BCM78920_A0_VNA_4_6_1_0_BCMPKT_VPP_RX_MD_HEADER_T_RESERVED},\ - {"SW_COPY_QUEUE_DST_PORT", BCM78920_A0_VNA_4_6_1_0_BCMPKT_VPP_RX_MD_HEADER_T_SW_COPY_QUEUE_DST_PORT},\ - {"TIMESTAMP", BCM78920_A0_VNA_4_6_1_0_BCMPKT_VPP_RX_MD_HEADER_T_TIMESTAMP},\ - {"TRUNCATED_FULL_PKT_LENGTH", BCM78920_A0_VNA_4_6_1_0_BCMPKT_VPP_RX_MD_HEADER_T_TRUNCATED_FULL_PKT_LENGTH},\ - {"vpp_rx_md_header_t fid count", BCM78920_A0_VNA_4_6_1_0_BCMPKT_VPP_RX_MD_HEADER_T_FID_COUNT} - -/*! - * \name VPP_TX_MD_HEADER_T field IDs. - */ -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_VPP_TX_MD_HEADER_T_DESTINATION 0 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_VPP_TX_MD_HEADER_T_DESTINATION_TYPE 1 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_VPP_TX_MD_HEADER_T_FWD_VLAN_PROFILE_LPP_CLASS_ID 2 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_VPP_TX_MD_HEADER_T_INC_CTRL_INFO 3 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_VPP_TX_MD_HEADER_T_MY_STATION_HIT_VRF_QUEUE_NUM_VALID 4 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_VPP_TX_MD_HEADER_T_PACKET_ENTROPY_INT_CN_CNG_INT_PRI 5 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_VPP_TX_MD_HEADER_T_PKT_CTRL_PROFILE_RX_PP_PORT 6 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_VPP_TX_MD_HEADER_T_QOS_INPUT_PRI_RSVD_QNUM 7 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_VPP_TX_MD_HEADER_T_START_HEADER_TYPE 8 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_VPP_TX_MD_HEADER_T_VPP_COPY_TYPE 9 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_VPP_TX_MD_HEADER_T_VRF_AR_GROUP 10 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_VPP_TX_MD_HEADER_T_FID_COUNT 11 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_VPP_TX_MD_HEADER_T_FIELD_NAME_MAP_INIT \ - {"DESTINATION", BCM78920_A0_VNA_4_6_1_0_BCMPKT_VPP_TX_MD_HEADER_T_DESTINATION},\ - {"DESTINATION_TYPE", BCM78920_A0_VNA_4_6_1_0_BCMPKT_VPP_TX_MD_HEADER_T_DESTINATION_TYPE},\ - {"FWD_VLAN_PROFILE_LPP_CLASS_ID", BCM78920_A0_VNA_4_6_1_0_BCMPKT_VPP_TX_MD_HEADER_T_FWD_VLAN_PROFILE_LPP_CLASS_ID},\ - {"INC_CTRL_INFO", BCM78920_A0_VNA_4_6_1_0_BCMPKT_VPP_TX_MD_HEADER_T_INC_CTRL_INFO},\ - {"MY_STATION_HIT_VRF_QUEUE_NUM_VALID", BCM78920_A0_VNA_4_6_1_0_BCMPKT_VPP_TX_MD_HEADER_T_MY_STATION_HIT_VRF_QUEUE_NUM_VALID},\ - {"PACKET_ENTROPY_INT_CN_CNG_INT_PRI", BCM78920_A0_VNA_4_6_1_0_BCMPKT_VPP_TX_MD_HEADER_T_PACKET_ENTROPY_INT_CN_CNG_INT_PRI},\ - {"PKT_CTRL_PROFILE_RX_PP_PORT", BCM78920_A0_VNA_4_6_1_0_BCMPKT_VPP_TX_MD_HEADER_T_PKT_CTRL_PROFILE_RX_PP_PORT},\ - {"QOS_INPUT_PRI_RSVD_QNUM", BCM78920_A0_VNA_4_6_1_0_BCMPKT_VPP_TX_MD_HEADER_T_QOS_INPUT_PRI_RSVD_QNUM},\ - {"START_HEADER_TYPE", BCM78920_A0_VNA_4_6_1_0_BCMPKT_VPP_TX_MD_HEADER_T_START_HEADER_TYPE},\ - {"VPP_COPY_TYPE", BCM78920_A0_VNA_4_6_1_0_BCMPKT_VPP_TX_MD_HEADER_T_VPP_COPY_TYPE},\ - {"VRF_AR_GROUP", BCM78920_A0_VNA_4_6_1_0_BCMPKT_VPP_TX_MD_HEADER_T_VRF_AR_GROUP},\ - {"vpp_tx_md_header_t fid count", BCM78920_A0_VNA_4_6_1_0_BCMPKT_VPP_TX_MD_HEADER_T_FID_COUNT} - -/*! - * \name VXLAN_T field IDs. - */ -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1 0 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_VXLAN_T_RESERVED2 1 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_VXLAN_T_VN_ID 2 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_VXLAN_T_FID_COUNT 3 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT \ - {"FLAGS_RESERVED_1", BCM78920_A0_VNA_4_6_1_0_BCMPKT_VXLAN_T_FLAGS_RESERVED_1},\ - {"RESERVED2", BCM78920_A0_VNA_4_6_1_0_BCMPKT_VXLAN_T_RESERVED2},\ - {"VN_ID", BCM78920_A0_VNA_4_6_1_0_BCMPKT_VXLAN_T_VN_ID},\ - {"vxlan_t fid count", BCM78920_A0_VNA_4_6_1_0_BCMPKT_VXLAN_T_FID_COUNT} - -/*! - * \name WESP_T field IDs. - */ -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_WESP_T_FLAGS 0 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_WESP_T_HEADER_LEN 1 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_WESP_T_NEXT_HEADER 2 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_WESP_T_SEQ_NUM 3 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_WESP_T_SPI 4 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_WESP_T_TRAILER_LEN 5 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_WESP_T_WESP_IV 6 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_WESP_T_FID_COUNT 7 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT \ - {"FLAGS", BCM78920_A0_VNA_4_6_1_0_BCMPKT_WESP_T_FLAGS},\ - {"HEADER_LEN", BCM78920_A0_VNA_4_6_1_0_BCMPKT_WESP_T_HEADER_LEN},\ - {"NEXT_HEADER", BCM78920_A0_VNA_4_6_1_0_BCMPKT_WESP_T_NEXT_HEADER},\ - {"SEQ_NUM", BCM78920_A0_VNA_4_6_1_0_BCMPKT_WESP_T_SEQ_NUM},\ - {"SPI", BCM78920_A0_VNA_4_6_1_0_BCMPKT_WESP_T_SPI},\ - {"TRAILER_LEN", BCM78920_A0_VNA_4_6_1_0_BCMPKT_WESP_T_TRAILER_LEN},\ - {"WESP_IV", BCM78920_A0_VNA_4_6_1_0_BCMPKT_WESP_T_WESP_IV},\ - {"wesp_t fid count", BCM78920_A0_VNA_4_6_1_0_BCMPKT_WESP_T_FID_COUNT} - - -#endif /* BCM78920_A0_VNA_4_6_1_0_BCMPKT_FLEXHDR_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78920_a0/vna_4_6_1_0/bcm78920_a0_vna_4_6_1_0_bcmpkt_rxpmd_flex_data.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78920_a0/vna_4_6_1_0/bcm78920_a0_vna_4_6_1_0_bcmpkt_rxpmd_flex_data.h deleted file mode 100644 index fbeaaedc1d1..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78920_a0/vna_4_6_1_0/bcm78920_a0_vna_4_6_1_0_bcmpkt_rxpmd_flex_data.h +++ /dev/null @@ -1,187 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) map.yml. - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - -#ifndef BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_DATA_H -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_DATA_H - -/*! - * \name RX flex metadata field IDs. - */ -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0 0 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_15_0 1 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0 2 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0 3 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16 4 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_UPDATED_15_0 5 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_UPDATED_31_16 6 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_UPDATED_47_32 7 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_IFP_CLASS_ID_15_0 8 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_IFP_DO_NOT_MODIFY_TS_CONTROL_ACTION_3_0 9 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_IFP_VCA_KEY_PROFILE_INDEX_3_0 10 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_INC_CTRL_INFO_15_0 11 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0 12 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16 13 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0 14 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_L2_IIF_16_9_0 15 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_L2_OIF_16_9_0 16 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_L3_IIF_16_15_0 17 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_16_11_0 18 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_LPP_IP_MMU_DROP_CODE_15_0 19 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0 20 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0 21 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0 22 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_1_3_0 23 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_2_3_0 24 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_SWITCH_COPY_DESTINATION_15_0 25 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_SWITCH_COPY_QUEUE_NUM_3_0 26 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0 27 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_VCA_IF_REQ_SF_PROFILE_3_0 28 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_VCA_QUERY_PORT_NUM_15_0 29 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_VCA_QUERY_QUEUE_NUM_3_0 30 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_VFI_15_0 31 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_INC_CTRL_3_0 32 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_VRF_7_0 33 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_FID_COUNT 34 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_COUNT 54 - -/*! - * \name Packet Flex Reason Types. - */ -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS 0 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT 1 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_IDEV_CONFIG_TO_CPU 2 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_IFP 3 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER 4 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_ING_ADAPT_OR_MIRROR_SAMPLER_SAMPLED 5 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED_OR_L3_IIF_EQ_L3_OIF 6 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP 7 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS 8 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE 9 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP 10 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS 11 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR 12 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR 13 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL 14 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_AFR_DST_LOOKUP_MISS 15 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_AFR_VLAN_TO_VRF_MISS 16 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_AR_MONITOR_TO_CPU 17 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_DOS_ATTACK 18 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_FIRST_PSN_MISMATCH 19 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_FIRST_RD_NAK 20 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_FIRST_WR_NAK 21 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_IFP_PROTOCOL_UDF_TCAM 22 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_INCA_MSG 23 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_L2_INSTR_UNKNOWN_SIGNAL_TYPE 24 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_L3HDR_ERROR 25 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_L3_DST_DISCARD 26 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_L3_DST_LOOKUP_MISS 27 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_L3_MTU_CHECK_FAIL 28 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_NHOP_TO_CPU 29 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_OTHER_DROPS 30 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_PACKET_TRACE_TO_CPU 31 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_PARITY_ERROR 32 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_SFLOW 33 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_TIME_SYNC 34 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_TTL_ERROR 35 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_VLAN_FILTER_DROP 36 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_VLAN_TO_VRF_MISS 37 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LPP_COPY_TO_DEBUG 38 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0 39 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1 40 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2 41 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3 42 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4 43 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5 44 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6 45 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7 46 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_SPANNING_TREE_TPID_CHECK_FAILED 47 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT 48 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP 49 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP 50 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU 51 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR 52 -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_VFP 53 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT \ - {"CML_FLAGS", BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS},\ - {"EM_FT", BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT},\ - {"IDEV_CONFIG_TO_CPU", BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_IDEV_CONFIG_TO_CPU},\ - {"IFP", BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_IFP},\ - {"IFP_METER", BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER},\ - {"ING_ADAPT_OR_MIRROR_SAMPLER_SAMPLED", BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_ING_ADAPT_OR_MIRROR_SAMPLER_SAMPLED},\ - {"IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED_OR_L3_IIF_EQ_L3_OIF", BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED_OR_L3_IIF_EQ_L3_OIF},\ - {"L2_DST_LOOKUP", BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP},\ - {"L2_DST_LOOKUP_MISS", BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS},\ - {"L2_SRC_STATIC_MOVE", BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE},\ - {"L3_DST_LOOKUP", BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP},\ - {"L3_DST_LOOKUP_MISS", BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS},\ - {"L3_HDR_ERROR", BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR},\ - {"L3_TTL_ERROR", BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR},\ - {"LEARN_CACHE_FULL", BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL},\ - {"LL_AFR_DST_LOOKUP_MISS", BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_AFR_DST_LOOKUP_MISS},\ - {"LL_AFR_VLAN_TO_VRF_MISS", BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_AFR_VLAN_TO_VRF_MISS},\ - {"LL_AR_MONITOR_TO_CPU", BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_AR_MONITOR_TO_CPU},\ - {"LL_DOS_ATTACK", BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_DOS_ATTACK},\ - {"LL_FIRST_PSN_MISMATCH", BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_FIRST_PSN_MISMATCH},\ - {"LL_FIRST_RD_NAK", BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_FIRST_RD_NAK},\ - {"LL_FIRST_WR_NAK", BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_FIRST_WR_NAK},\ - {"LL_IFP_PROTOCOL_UDF_TCAM", BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_IFP_PROTOCOL_UDF_TCAM},\ - {"LL_INCA_MSG", BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_INCA_MSG},\ - {"LL_L2_INSTR_UNKNOWN_SIGNAL_TYPE", BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_L2_INSTR_UNKNOWN_SIGNAL_TYPE},\ - {"LL_L3HDR_ERROR", BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_L3HDR_ERROR},\ - {"LL_L3_DST_DISCARD", BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_L3_DST_DISCARD},\ - {"LL_L3_DST_LOOKUP_MISS", BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_L3_DST_LOOKUP_MISS},\ - {"LL_L3_MTU_CHECK_FAIL", BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_L3_MTU_CHECK_FAIL},\ - {"LL_NHOP_TO_CPU", BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_NHOP_TO_CPU},\ - {"LL_OTHER_DROPS", BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_OTHER_DROPS},\ - {"LL_PACKET_TRACE_TO_CPU", BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_PACKET_TRACE_TO_CPU},\ - {"LL_PARITY_ERROR", BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_PARITY_ERROR},\ - {"LL_SFLOW", BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_SFLOW},\ - {"LL_TIME_SYNC", BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_TIME_SYNC},\ - {"LL_TTL_ERROR", BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_TTL_ERROR},\ - {"LL_VLAN_FILTER_DROP", BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_VLAN_FILTER_DROP},\ - {"LL_VLAN_TO_VRF_MISS", BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_VLAN_TO_VRF_MISS},\ - {"LPP_COPY_TO_DEBUG", BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LPP_COPY_TO_DEBUG},\ - {"MATCHED_RULE_BIT_0", BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0},\ - {"MATCHED_RULE_BIT_1", BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1},\ - {"MATCHED_RULE_BIT_2", BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2},\ - {"MATCHED_RULE_BIT_3", BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3},\ - {"MATCHED_RULE_BIT_4", BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4},\ - {"MATCHED_RULE_BIT_5", BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5},\ - {"MATCHED_RULE_BIT_6", BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6},\ - {"MATCHED_RULE_BIT_7", BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7},\ - {"MEMBERSHIP_SPANNING_TREE_TPID_CHECK_FAILED", BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_SPANNING_TREE_TPID_CHECK_FAILED},\ - {"PROTOCOL_PKT", BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT},\ - {"SER_DROP", BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP},\ - {"TRACE_DOP", BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP},\ - {"TRACE_DO_NOT_COPY_TO_CPU", BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU},\ - {"TRACE_DO_NOT_MIRROR", BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR},\ - {"VFP", BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_VFP},\ - {"flex reason count", BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_COUNT} - -#endif /* BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_DATA_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78920_a0/vna_4_6_1_0/bcm78920_a0_vna_4_6_1_0_bcmpkt_rxpmd_match_id_defs.h b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78920_a0/vna_4_6_1_0/bcm78920_a0_vna_4_6_1_0_bcmpkt_rxpmd_match_id_defs.h deleted file mode 100644 index e038e2e1c22..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/include/bcmpkt/xfcr/bcm78920_a0/vna_4_6_1_0/bcm78920_a0_vna_4_6_1_0_bcmpkt_rxpmd_match_id_defs.h +++ /dev/null @@ -1,436 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) bcm78920_a0_vna_4_6_1_0_sf_match_id_info.yml - * for device bcm78920_a0 and variant vna_4_6_1_0. - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - -#ifndef BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H - -#include - -/*! - * \brief Get the Match ID DataBase information. - * - * \retval bcmpkt_rxpmd_match_id_db_info_t Match ID DataBase information. -*/ -extern bcmpkt_rxpmd_match_id_db_info_t * - bcm78920_a0_vna_4_6_1_0_rxpmd_match_id_db_info_get(void); - -/*! - * \brief Get the Match ID Mapping information. - * - * \retval bcmpkt_rxpmd_match_id_map_info_t Match ID Mapping information. -*/ -extern bcmpkt_rxpmd_match_id_map_info_t * - bcm78920_a0_vna_4_6_1_0_rxpmd_match_id_map_info_get(void); - -/*! - \name RXPMD Match IDs -*/ -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG 0 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 1 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2_INSTR_4BYTE 2 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2_INSTR_8BYTE 3 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE 4 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG 5 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC 6 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VPP_RX_MD_HEADER 7 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP 8 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 9 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 10 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD 11 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DCN 12 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1 13 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2 14 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT 15 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE 16 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FLEX_L3_HDR_1 17 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FLEX_L3_HDR_2 18 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 19 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 20 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GENERIC_METADATA 21 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE 22 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE 23 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM 24 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY 25 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT 26 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ 27 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1 28 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2 29 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP 30 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER 31 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE 32 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP 33 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 34 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 35 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE 36 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 37 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP 38 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROCEV2_AETH 39 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROCEV2_BTH 40 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROCEV2_DETH 41 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROCEV2_RETH 42 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1 43 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2 44 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES 45 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES 46 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP 47 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 48 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 49 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 50 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN 51 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1 52 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2 53 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH 54 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK_HEADER 55 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE 56 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG 57 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 58 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2_INSTR_4BYTE 59 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2_INSTR_8BYTE 60 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE 61 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG 62 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC 63 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VPP_RX_MD_HEADER 64 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP 65 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 66 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 67 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD 68 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DCN 69 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1 70 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2 71 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT 72 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE 73 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FLEX_L3_HDR_1 74 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FLEX_L3_HDR_2 75 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 76 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 77 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GENERIC_METADATA 78 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE 79 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE 80 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM 81 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY 82 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT 83 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ 84 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1 85 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2 86 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP 87 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER 88 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE 89 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP 90 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 91 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 92 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE 93 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 94 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP 95 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROCEV2_AETH 96 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROCEV2_BTH 97 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROCEV2_DETH 98 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROCEV2_RETH 99 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1 100 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2 101 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES 102 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES 103 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP 104 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 105 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 106 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 107 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN 108 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1 109 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2 110 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG 111 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 112 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE 113 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG 114 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC 115 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP 116 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD 117 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE 118 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP 119 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP 120 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 121 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 122 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE 123 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 124 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP 125 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES 126 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES 127 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP 128 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 129 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 130 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 131 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG 132 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 133 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2_INSTR_4BYTE 134 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2_INSTR_8BYTE 135 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE 136 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG 137 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC 138 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VPP_RX_MD_HEADER 139 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP 140 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 141 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 142 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD 143 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DCN 144 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1 145 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2 146 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT 147 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE 148 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FLEX_L3_HDR_1 149 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FLEX_L3_HDR_2 150 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 151 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 152 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GENERIC_METADATA 153 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE 154 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE 155 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM 156 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY 157 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT 158 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ 159 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1 160 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2 161 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP 162 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER 163 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE 164 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP 165 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 166 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 167 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE 168 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 169 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP 170 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROCEV2_AETH 171 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROCEV2_BTH 172 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROCEV2_DETH 173 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROCEV2_RETH 174 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1 175 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2 176 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES 177 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES 178 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP 179 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 180 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 181 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 182 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN 183 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1 184 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2 185 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH 186 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK_HEADER 187 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE 188 -#define BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_COUNT 189 - -#define BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT \ - {"EGRESS_PKT_FWD_L2_HDR_ITAG", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG}, \ - {"EGRESS_PKT_FWD_L2_HDR_L2", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2}, \ - {"EGRESS_PKT_FWD_L2_HDR_L2_INSTR_4BYTE", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2_INSTR_4BYTE}, \ - {"EGRESS_PKT_FWD_L2_HDR_L2_INSTR_8BYTE", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2_INSTR_8BYTE}, \ - {"EGRESS_PKT_FWD_L2_HDR_NONE", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE}, \ - {"EGRESS_PKT_FWD_L2_HDR_OTAG", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG}, \ - {"EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC}, \ - {"EGRESS_PKT_FWD_L2_HDR_VPP_RX_MD_HEADER", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VPP_RX_MD_HEADER}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_ARP", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_BFD", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_DCN", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DCN}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_FLEX_L3_HDR_1", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FLEX_L3_HDR_1}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_FLEX_L3_HDR_2", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FLEX_L3_HDR_2}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_GENERIC_METADATA", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GENERIC_METADATA}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_GPE", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_GRE", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_ICMP", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_IGMP", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_IPV4", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_IPV6", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_NONE", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_P_1588", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_RARP", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_ROCEV2_AETH", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROCEV2_AETH}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_ROCEV2_BTH", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROCEV2_BTH}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_ROCEV2_DETH", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROCEV2_DETH}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_ROCEV2_RETH", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROCEV2_RETH}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_UDP", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1}, \ - {"EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2}, \ - {"EGRESS_PKT_SYS_HDR_EP_NIH", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH}, \ - {"EGRESS_PKT_SYS_HDR_LOOPBACK_HEADER", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK_HEADER}, \ - {"EGRESS_PKT_SYS_HDR_NONE", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_ITAG", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_L2", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_L2_INSTR_4BYTE", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2_INSTR_4BYTE}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_L2_INSTR_8BYTE", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2_INSTR_8BYTE}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_NONE", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_OTAG", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC}, \ - {"EGRESS_PKT_TUNNEL_L2_HDR_VPP_RX_MD_HEADER", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VPP_RX_MD_HEADER}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_DCN", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DCN}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FLEX_L3_HDR_1", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FLEX_L3_HDR_1}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FLEX_L3_HDR_2", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FLEX_L3_HDR_2}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GENERIC_METADATA", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GENERIC_METADATA}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ROCEV2_AETH", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROCEV2_AETH}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ROCEV2_BTH", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROCEV2_BTH}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ROCEV2_DETH", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROCEV2_DETH}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ROCEV2_RETH", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROCEV2_RETH}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1}, \ - {"EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2}, \ - {"INGRESS_PKT_INNER_L2_HDR_ITAG", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG}, \ - {"INGRESS_PKT_INNER_L2_HDR_L2", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2}, \ - {"INGRESS_PKT_INNER_L2_HDR_NONE", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE}, \ - {"INGRESS_PKT_INNER_L2_HDR_OTAG", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG}, \ - {"INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_ARP", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_BFD", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_ICMP", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_IGMP", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_IPV4", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_IPV6", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_NONE", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_P_1588", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_RARP", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_UDP", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4}, \ - {"INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5}, \ - {"INGRESS_PKT_OUTER_L2_HDR_ITAG", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG}, \ - {"INGRESS_PKT_OUTER_L2_HDR_L2", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2}, \ - {"INGRESS_PKT_OUTER_L2_HDR_L2_INSTR_4BYTE", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2_INSTR_4BYTE}, \ - {"INGRESS_PKT_OUTER_L2_HDR_L2_INSTR_8BYTE", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2_INSTR_8BYTE}, \ - {"INGRESS_PKT_OUTER_L2_HDR_NONE", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE}, \ - {"INGRESS_PKT_OUTER_L2_HDR_OTAG", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG}, \ - {"INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC}, \ - {"INGRESS_PKT_OUTER_L2_HDR_VPP_RX_MD_HEADER", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VPP_RX_MD_HEADER}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_ARP", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_BFD", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_DCN", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DCN}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_FLEX_L3_HDR_1", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FLEX_L3_HDR_1}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_FLEX_L3_HDR_2", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FLEX_L3_HDR_2}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_GENERIC_METADATA", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GENERIC_METADATA}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_GPE", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_NONE", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_RARP", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_ROCEV2_AETH", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROCEV2_AETH}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_ROCEV2_BTH", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROCEV2_BTH}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_ROCEV2_DETH", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROCEV2_DETH}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_ROCEV2_RETH", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROCEV2_RETH}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_UDP", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1}, \ - {"INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2}, \ - {"INGRESS_PKT_SYS_HDR_EP_NIH", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH}, \ - {"INGRESS_PKT_SYS_HDR_LOOPBACK_HEADER", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK_HEADER}, \ - {"INGRESS_PKT_SYS_HDR_NONE", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE}, \ - {"rxpmd_match_id_count", BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_COUNT} - -#endif /*! BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_MATCH_ID_DEFS_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56690_a0/cna_6_5_34_2_0/bcm56690_a0_cna_6_5_34_2_0_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56690_a0/cna_6_5_34_2_0/bcm56690_a0_cna_6_5_34_2_0_bcmpkt_rxpmd_match_id.c deleted file mode 100644 index 049aff0d77a..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56690_a0/cna_6_5_34_2_0/bcm56690_a0_cna_6_5_34_2_0_bcmpkt_rxpmd_match_id.c +++ /dev/null @@ -1,1600 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) bcm56690_a0_cna_6_5_34_2_0_sf_match_id_info.yml - * for device bcm56690_a0 and variant cna_6_5_34_2_0. - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - - -#include -#include - -static uint32_t bcm56690_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_itag[1] = -{ - 0x14, -}; - -static uint32_t bcm56690_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_l2[1] = -{ - 0x1e, -}; - -static uint32_t bcm56690_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_otag[1] = -{ - 0x18, -}; - -static uint32_t bcm56690_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_arp[1] = -{ - 0x4, -}; - -static uint32_t bcm56690_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ethertype[1] = -{ - 0x3d7eb7fe, -}; - -static uint32_t bcm56690_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_icmp[1] = -{ - 0x100010, -}; - -static uint32_t bcm56690_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_header[1] = -{ - 0x7e0, -}; - -static uint32_t bcm56690_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_metadata_base[1] = -{ - 0x500, -}; - -static uint32_t bcm56690_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv4[1] = -{ - 0x6b7f8, -}; - -static uint32_t bcm56690_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv6[1] = -{ - 0xd780000, -}; - -static uint32_t bcm56690_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rarp[1] = -{ - 0x10000000, -}; - -static uint32_t bcm56690_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_first_4bytes[1] = -{ - 0x6031c0, -}; - -static uint32_t bcm56690_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_last_16bytes[1] = -{ - 0x402180, -}; - -static uint32_t bcm56690_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_udp[1] = -{ - 0x5028600, -}; - -static uint32_t bcm56690_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l3[1] = -{ - 0x20000000, -}; - -static uint32_t bcm56690_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l4[1] = -{ - 0x8040000, -}; - -static uint32_t bcm56690_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l5[1] = -{ - 0x4020000, -}; - -static uint32_t bcm56690_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_itag[1] = -{ - 0x28, -}; - -static uint32_t bcm56690_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_l2[1] = -{ - 0x3e, -}; - -static uint32_t bcm56690_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_otag[1] = -{ - 0x30, -}; - -static uint32_t bcm56690_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_arp[1] = -{ - 0x4, -}; - -static uint32_t bcm56690_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ethertype[2] = -{ - 0x9ffd67fe, - 0x1f5, -}; - -static uint32_t bcm56690_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_icmp[1] = -{ - 0x400010, -}; - -static uint32_t bcm56690_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_header[1] = -{ - 0x1f8007e0, -}; - -static uint32_t bcm56690_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_metadata_base[1] = -{ - 0x14000500, -}; - -static uint32_t bcm56690_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv4[1] = -{ - 0x1d67f8, -}; - -static uint32_t bcm56690_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv6[2] = -{ - 0x9fe00000, - 0x75, -}; - -static uint32_t bcm56690_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rarp[2] = -{ - 0x0, - 0x80, -}; - -static uint32_t bcm56690_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_first_4bytes[2] = -{ - 0x870061c0, - 0x1, -}; - -static uint32_t bcm56690_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_last_16bytes[2] = -{ - 0x6004180, - 0x1, -}; - -static uint32_t bcm56690_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_udp[2] = -{ - 0x180d0600, - 0x34, -}; - -static uint32_t bcm56690_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l3[2] = -{ - 0x0, - 0x100, -}; - -static uint32_t bcm56690_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l4[2] = -{ - 0x100000, - 0x40, -}; - -static uint32_t bcm56690_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l5[2] = -{ - 0x40000, - 0x10, -}; - -static uint32_t bcm56690_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_vxlan[2] = -{ - 0x80000, - 0x20, -}; - -static uint32_t bcm56690_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_sys_hdr_ep_nih[1] = -{ - 0x4, -}; - -static uint32_t bcm56690_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_sys_hdr_loopback[1] = -{ - 0x8, -}; - - -static bcmpkt_rxpmd_match_id_db_t -bcm56690_a0_cna_6_5_34_2_0_rxpmd_match_id_db[BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_COUNT] = { - { - /* BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */ - .name = "EGRESS_PKT_FWD_L2_HDR_ITAG", - .match = 0x2, - .match_mask = 0x2, - .match_maxbit = 16, - .match_minbit = 14, - .maxbit = 1, - .minbit = 1, - .value = 0x1, - .pmaxbit = 16, - .pminbit = 14, - - }, - { - /* BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */ - .name = "EGRESS_PKT_FWD_L2_HDR_L2", - .match = 0x1, - .match_mask = 0x1, - .match_maxbit = 16, - .match_minbit = 14, - .maxbit = 0, - .minbit = 0, - .value = 0x1, - .pmaxbit = 16, - .pminbit = 14, - - }, - { - /* BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */ - .name = "EGRESS_PKT_FWD_L2_HDR_NONE", - .match = 0x0, - .match_mask = 0x7, - .match_maxbit = 16, - .match_minbit = 14, - .maxbit = 2, - .minbit = 0, - .value = 0x0, - .pmaxbit = 16, - .pminbit = 14, - - }, - { - /* BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */ - .name = "EGRESS_PKT_FWD_L2_HDR_OTAG", - .match = 0x4, - .match_mask = 0x4, - .match_maxbit = 16, - .match_minbit = 14, - .maxbit = 2, - .minbit = 2, - .value = 0x1, - .pmaxbit = 16, - .pminbit = 14, - - }, - { - /* BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_ARP", - .match = 0x80, - .match_mask = 0x18e, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 8, - .minbit = 7, - .value = 0x1, - .pmaxbit = 25, - .pminbit = 17, - - }, - { - /* BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", - .match = 0x1, - .match_mask = 0x1, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 0, - .minbit = 0, - .value = 0x1, - .pmaxbit = 25, - .pminbit = 17, - - }, - { - /* BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_ICMP", - .match = 0x100, - .match_mask = 0x186, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 8, - .minbit = 7, - .value = 0x2, - .pmaxbit = 25, - .pminbit = 17, - - }, - { - /* BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER", - .match = 0x8, - .match_mask = 0x8, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 3, - .minbit = 3, - .value = 0x1, - .pmaxbit = 25, - .pminbit = 17, - - }, - { - /* BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE", - .match = 0x88, - .match_mask = 0x188, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 8, - .minbit = 7, - .value = 0x1, - .pmaxbit = 25, - .pminbit = 17, - - }, - { - /* BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV4", - .match = 0x20, - .match_mask = 0x60, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 6, - .minbit = 5, - .value = 0x1, - .pmaxbit = 25, - .pminbit = 17, - - }, - { - /* BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV6", - .match = 0x40, - .match_mask = 0x60, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 6, - .minbit = 5, - .value = 0x2, - .pmaxbit = 25, - .pminbit = 17, - - }, - { - /* BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_NONE", - .match = 0x0, - .match_mask = 0x1ff, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 8, - .minbit = 0, - .value = 0x0, - .pmaxbit = 25, - .pminbit = 17, - - }, - { - /* BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_RARP", - .match = 0x2, - .match_mask = 0x6, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 2, - .minbit = 1, - .value = 0x1, - .pmaxbit = 25, - .pminbit = 17, - - }, - { - /* BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", - .match = 0x4, - .match_mask = 0x6, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 2, - .minbit = 1, - .value = 0x2, - .pmaxbit = 25, - .pminbit = 17, - - }, - { - /* BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", - .match = 0x10, - .match_mask = 0x10, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 4, - .minbit = 4, - .value = 0x1, - .pmaxbit = 25, - .pminbit = 17, - - }, - { - /* BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_UDP", - .match = 0x6, - .match_mask = 0x6, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 2, - .minbit = 1, - .value = 0x3, - .pmaxbit = 25, - .pminbit = 17, - - }, - { - /* BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", - .match = 0x60, - .match_mask = 0x60, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 6, - .minbit = 5, - .value = 0x3, - .pmaxbit = 25, - .pminbit = 17, - - }, - { - /* BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", - .match = 0x180, - .match_mask = 0x180, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 8, - .minbit = 7, - .value = 0x3, - .pmaxbit = 25, - .pminbit = 17, - - }, - { - /* BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", - .match = 0x106, - .match_mask = 0x186, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 8, - .minbit = 7, - .value = 0x2, - .pmaxbit = 25, - .pminbit = 17, - - }, - { - /* BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", - .match = 0x86, - .match_mask = 0x18e, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 8, - .minbit = 7, - .value = 0x1, - .pmaxbit = 25, - .pminbit = 17, - - }, - { - /* BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH */ - .name = "EGRESS_PKT_SYS_HDR_EP_NIH", - .match = 0x2, - .match_mask = 0x3, - .match_maxbit = 1, - .match_minbit = 0, - .maxbit = 1, - .minbit = 0, - .value = 0x2, - .pmaxbit = 1, - .pminbit = 0, - - }, - { - /* BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */ - .name = "EGRESS_PKT_SYS_HDR_LOOPBACK", - .match = 0x1, - .match_mask = 0x3, - .match_maxbit = 1, - .match_minbit = 0, - .maxbit = 1, - .minbit = 0, - .value = 0x1, - .pmaxbit = 1, - .pminbit = 0, - - }, - { - /* BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */ - .name = "EGRESS_PKT_SYS_HDR_NONE", - .match = 0x0, - .match_mask = 0x3, - .match_maxbit = 1, - .match_minbit = 0, - .maxbit = 1, - .minbit = 0, - .value = 0x0, - .pmaxbit = 1, - .pminbit = 0, - - }, - { - /* BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */ - .name = "EGRESS_PKT_TUNNEL_L2_HDR_ITAG", - .match = 0x2, - .match_mask = 0x2, - .match_maxbit = 4, - .match_minbit = 2, - .maxbit = 1, - .minbit = 1, - .value = 0x1, - .pmaxbit = 4, - .pminbit = 2, - - }, - { - /* BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */ - .name = "EGRESS_PKT_TUNNEL_L2_HDR_L2", - .match = 0x1, - .match_mask = 0x1, - .match_maxbit = 4, - .match_minbit = 2, - .maxbit = 0, - .minbit = 0, - .value = 0x1, - .pmaxbit = 4, - .pminbit = 2, - - }, - { - /* BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */ - .name = "EGRESS_PKT_TUNNEL_L2_HDR_NONE", - .match = 0x0, - .match_mask = 0x7, - .match_maxbit = 4, - .match_minbit = 2, - .maxbit = 2, - .minbit = 0, - .value = 0x0, - .pmaxbit = 4, - .pminbit = 2, - - }, - { - /* BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */ - .name = "EGRESS_PKT_TUNNEL_L2_HDR_OTAG", - .match = 0x4, - .match_mask = 0x4, - .match_maxbit = 4, - .match_minbit = 2, - .maxbit = 2, - .minbit = 2, - .value = 0x1, - .pmaxbit = 4, - .pminbit = 2, - - }, - { - /* BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", - .match = 0x80, - .match_mask = 0x18e, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 8, - .minbit = 7, - .value = 0x1, - .pmaxbit = 13, - .pminbit = 5, - - }, - { - /* BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", - .match = 0x1, - .match_mask = 0x1, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 0, - .minbit = 0, - .value = 0x1, - .pmaxbit = 13, - .pminbit = 5, - - }, - { - /* BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", - .match = 0x100, - .match_mask = 0x186, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 8, - .minbit = 7, - .value = 0x2, - .pmaxbit = 13, - .pminbit = 5, - - }, - { - /* BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER", - .match = 0x8, - .match_mask = 0x8, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 3, - .minbit = 3, - .value = 0x1, - .pmaxbit = 13, - .pminbit = 5, - - }, - { - /* BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE", - .match = 0x88, - .match_mask = 0x188, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 8, - .minbit = 7, - .value = 0x1, - .pmaxbit = 13, - .pminbit = 5, - - }, - { - /* BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", - .match = 0x20, - .match_mask = 0x60, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 6, - .minbit = 5, - .value = 0x1, - .pmaxbit = 13, - .pminbit = 5, - - }, - { - /* BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", - .match = 0x40, - .match_mask = 0x60, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 6, - .minbit = 5, - .value = 0x2, - .pmaxbit = 13, - .pminbit = 5, - - }, - { - /* BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", - .match = 0x0, - .match_mask = 0x1ff, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 8, - .minbit = 0, - .value = 0x0, - .pmaxbit = 13, - .pminbit = 5, - - }, - { - /* BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", - .match = 0x2, - .match_mask = 0x6, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 2, - .minbit = 1, - .value = 0x1, - .pmaxbit = 13, - .pminbit = 5, - - }, - { - /* BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", - .match = 0x4, - .match_mask = 0x6, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 2, - .minbit = 1, - .value = 0x2, - .pmaxbit = 13, - .pminbit = 5, - - }, - { - /* BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", - .match = 0x10, - .match_mask = 0x10, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 4, - .minbit = 4, - .value = 0x1, - .pmaxbit = 13, - .pminbit = 5, - - }, - { - /* BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", - .match = 0x6, - .match_mask = 0x6, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 2, - .minbit = 1, - .value = 0x3, - .pmaxbit = 13, - .pminbit = 5, - - }, - { - /* BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", - .match = 0x60, - .match_mask = 0x60, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 6, - .minbit = 5, - .value = 0x3, - .pmaxbit = 13, - .pminbit = 5, - - }, - { - /* BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", - .match = 0x180, - .match_mask = 0x180, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 8, - .minbit = 7, - .value = 0x3, - .pmaxbit = 13, - .pminbit = 5, - - }, - { - /* BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", - .match = 0x106, - .match_mask = 0x186, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 8, - .minbit = 7, - .value = 0x2, - .pmaxbit = 13, - .pminbit = 5, - - }, - { - /* BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", - .match = 0x86, - .match_mask = 0x18e, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 8, - .minbit = 7, - .value = 0x1, - .pmaxbit = 13, - .pminbit = 5, - - }, - { - /* BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */ - .name = "INGRESS_PKT_INNER_L2_HDR_ITAG", - .match = 0x2, - .match_mask = 0x2, - .match_maxbit = 16, - .match_minbit = 14, - .maxbit = 1, - .minbit = 1, - .value = 0x1, - .pmaxbit = 16, - .pminbit = 14, - .zone_minbit = 11, - .arc_id_mask = 0x3800, - .num_zone_bmp_words = 1, - .zone_bmp = bcm56690_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_itag, - - }, - { - /* BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */ - .name = "INGRESS_PKT_INNER_L2_HDR_L2", - .match = 0x1, - .match_mask = 0x1, - .match_maxbit = 16, - .match_minbit = 14, - .maxbit = 0, - .minbit = 0, - .value = 0x1, - .pmaxbit = 16, - .pminbit = 14, - .zone_minbit = 11, - .arc_id_mask = 0x3800, - .num_zone_bmp_words = 1, - .zone_bmp = bcm56690_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_l2, - - }, - { - /* BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */ - .name = "INGRESS_PKT_INNER_L2_HDR_NONE", - .match = 0x0, - .match_mask = 0x7, - .match_maxbit = 16, - .match_minbit = 14, - .maxbit = 2, - .minbit = 0, - .value = 0x0, - .pmaxbit = 16, - .pminbit = 14, - .zone_minbit = 11, - .arc_id_mask = 0x3800, - - }, - { - /* BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */ - .name = "INGRESS_PKT_INNER_L2_HDR_OTAG", - .match = 0x4, - .match_mask = 0x4, - .match_maxbit = 16, - .match_minbit = 14, - .maxbit = 2, - .minbit = 2, - .value = 0x1, - .pmaxbit = 16, - .pminbit = 14, - .zone_minbit = 11, - .arc_id_mask = 0x3800, - .num_zone_bmp_words = 1, - .zone_bmp = bcm56690_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_otag, - - }, - { - /* BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_ARP", - .match = 0x80, - .match_mask = 0x18e, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 8, - .minbit = 7, - .value = 0x1, - .pmaxbit = 25, - .pminbit = 17, - .zone_minbit = 14, - .arc_id_mask = 0x7c000, - .num_zone_bmp_words = 1, - .zone_bmp = bcm56690_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_arp, - - }, - { - /* BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", - .match = 0x1, - .match_mask = 0x1, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 0, - .minbit = 0, - .value = 0x1, - .pmaxbit = 25, - .pminbit = 17, - .zone_minbit = 14, - .arc_id_mask = 0x7c000, - .num_zone_bmp_words = 1, - .zone_bmp = bcm56690_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ethertype, - - }, - { - /* BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_ICMP", - .match = 0x100, - .match_mask = 0x186, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 8, - .minbit = 7, - .value = 0x2, - .pmaxbit = 25, - .pminbit = 17, - .zone_minbit = 14, - .arc_id_mask = 0x7c000, - .num_zone_bmp_words = 1, - .zone_bmp = bcm56690_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_icmp, - - }, - { - /* BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER", - .match = 0x8, - .match_mask = 0x8, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 3, - .minbit = 3, - .value = 0x1, - .pmaxbit = 25, - .pminbit = 17, - .zone_minbit = 14, - .arc_id_mask = 0x7c000, - .num_zone_bmp_words = 1, - .zone_bmp = bcm56690_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_header, - - }, - { - /* BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE", - .match = 0x88, - .match_mask = 0x188, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 8, - .minbit = 7, - .value = 0x1, - .pmaxbit = 25, - .pminbit = 17, - .zone_minbit = 14, - .arc_id_mask = 0x7c000, - .num_zone_bmp_words = 1, - .zone_bmp = bcm56690_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_metadata_base, - - }, - { - /* BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV4", - .match = 0x20, - .match_mask = 0x60, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 6, - .minbit = 5, - .value = 0x1, - .pmaxbit = 25, - .pminbit = 17, - .zone_minbit = 14, - .arc_id_mask = 0x7c000, - .num_zone_bmp_words = 1, - .zone_bmp = bcm56690_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv4, - - }, - { - /* BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV6", - .match = 0x40, - .match_mask = 0x60, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 6, - .minbit = 5, - .value = 0x2, - .pmaxbit = 25, - .pminbit = 17, - .zone_minbit = 14, - .arc_id_mask = 0x7c000, - .num_zone_bmp_words = 1, - .zone_bmp = bcm56690_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv6, - - }, - { - /* BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_NONE", - .match = 0x0, - .match_mask = 0x1ff, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 8, - .minbit = 0, - .value = 0x0, - .pmaxbit = 25, - .pminbit = 17, - .zone_minbit = 14, - .arc_id_mask = 0x7c000, - - }, - { - /* BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_RARP", - .match = 0x2, - .match_mask = 0x6, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 2, - .minbit = 1, - .value = 0x1, - .pmaxbit = 25, - .pminbit = 17, - .zone_minbit = 14, - .arc_id_mask = 0x7c000, - .num_zone_bmp_words = 1, - .zone_bmp = bcm56690_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rarp, - - }, - { - /* BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", - .match = 0x4, - .match_mask = 0x6, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 2, - .minbit = 1, - .value = 0x2, - .pmaxbit = 25, - .pminbit = 17, - .zone_minbit = 14, - .arc_id_mask = 0x7c000, - .num_zone_bmp_words = 1, - .zone_bmp = bcm56690_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_first_4bytes, - - }, - { - /* BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", - .match = 0x10, - .match_mask = 0x10, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 4, - .minbit = 4, - .value = 0x1, - .pmaxbit = 25, - .pminbit = 17, - .zone_minbit = 14, - .arc_id_mask = 0x7c000, - .num_zone_bmp_words = 1, - .zone_bmp = bcm56690_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_last_16bytes, - - }, - { - /* BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_UDP", - .match = 0x6, - .match_mask = 0x6, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 2, - .minbit = 1, - .value = 0x3, - .pmaxbit = 25, - .pminbit = 17, - .zone_minbit = 14, - .arc_id_mask = 0x7c000, - .num_zone_bmp_words = 1, - .zone_bmp = bcm56690_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_udp, - - }, - { - /* BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", - .match = 0x60, - .match_mask = 0x60, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 6, - .minbit = 5, - .value = 0x3, - .pmaxbit = 25, - .pminbit = 17, - .zone_minbit = 14, - .arc_id_mask = 0x7c000, - .num_zone_bmp_words = 1, - .zone_bmp = bcm56690_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l3, - - }, - { - /* BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", - .match = 0x180, - .match_mask = 0x180, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 8, - .minbit = 7, - .value = 0x3, - .pmaxbit = 25, - .pminbit = 17, - .zone_minbit = 14, - .arc_id_mask = 0x7c000, - .num_zone_bmp_words = 1, - .zone_bmp = bcm56690_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l4, - - }, - { - /* BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", - .match = 0x106, - .match_mask = 0x186, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 8, - .minbit = 7, - .value = 0x2, - .pmaxbit = 25, - .pminbit = 17, - .zone_minbit = 14, - .arc_id_mask = 0x7c000, - .num_zone_bmp_words = 1, - .zone_bmp = bcm56690_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l5, - - }, - { - /* BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */ - .name = "INGRESS_PKT_OUTER_L2_HDR_ITAG", - .match = 0x2, - .match_mask = 0x2, - .match_maxbit = 4, - .match_minbit = 2, - .maxbit = 1, - .minbit = 1, - .value = 0x1, - .pmaxbit = 4, - .pminbit = 2, - .zone_minbit = 2, - .arc_id_mask = 0x1c, - .num_zone_bmp_words = 1, - .zone_bmp = bcm56690_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_itag, - - }, - { - /* BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */ - .name = "INGRESS_PKT_OUTER_L2_HDR_L2", - .match = 0x1, - .match_mask = 0x1, - .match_maxbit = 4, - .match_minbit = 2, - .maxbit = 0, - .minbit = 0, - .value = 0x1, - .pmaxbit = 4, - .pminbit = 2, - .zone_minbit = 2, - .arc_id_mask = 0x1c, - .num_zone_bmp_words = 1, - .zone_bmp = bcm56690_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_l2, - - }, - { - /* BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */ - .name = "INGRESS_PKT_OUTER_L2_HDR_NONE", - .match = 0x0, - .match_mask = 0x7, - .match_maxbit = 4, - .match_minbit = 2, - .maxbit = 2, - .minbit = 0, - .value = 0x0, - .pmaxbit = 4, - .pminbit = 2, - .zone_minbit = 2, - .arc_id_mask = 0x1c, - - }, - { - /* BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */ - .name = "INGRESS_PKT_OUTER_L2_HDR_OTAG", - .match = 0x4, - .match_mask = 0x4, - .match_maxbit = 4, - .match_minbit = 2, - .maxbit = 2, - .minbit = 2, - .value = 0x1, - .pmaxbit = 4, - .pminbit = 2, - .zone_minbit = 2, - .arc_id_mask = 0x1c, - .num_zone_bmp_words = 1, - .zone_bmp = bcm56690_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_otag, - - }, - { - /* BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ARP", - .match = 0x80, - .match_mask = 0x18e, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 8, - .minbit = 7, - .value = 0x1, - .pmaxbit = 13, - .pminbit = 5, - .zone_minbit = 5, - .arc_id_mask = 0x7e0, - .num_zone_bmp_words = 1, - .zone_bmp = bcm56690_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_arp, - - }, - { - /* BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", - .match = 0x1, - .match_mask = 0x1, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 0, - .minbit = 0, - .value = 0x1, - .pmaxbit = 13, - .pminbit = 5, - .zone_minbit = 5, - .arc_id_mask = 0x7e0, - .num_zone_bmp_words = 2, - .zone_bmp = bcm56690_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ethertype, - - }, - { - /* BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", - .match = 0x100, - .match_mask = 0x186, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 8, - .minbit = 7, - .value = 0x2, - .pmaxbit = 13, - .pminbit = 5, - .zone_minbit = 5, - .arc_id_mask = 0x7e0, - .num_zone_bmp_words = 1, - .zone_bmp = bcm56690_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_icmp, - - }, - { - /* BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER", - .match = 0x8, - .match_mask = 0x8, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 3, - .minbit = 3, - .value = 0x1, - .pmaxbit = 13, - .pminbit = 5, - .zone_minbit = 5, - .arc_id_mask = 0x7e0, - .num_zone_bmp_words = 1, - .zone_bmp = bcm56690_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_header, - - }, - { - /* BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE", - .match = 0x88, - .match_mask = 0x188, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 8, - .minbit = 7, - .value = 0x1, - .pmaxbit = 13, - .pminbit = 5, - .zone_minbit = 5, - .arc_id_mask = 0x7e0, - .num_zone_bmp_words = 1, - .zone_bmp = bcm56690_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_metadata_base, - - }, - { - /* BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", - .match = 0x20, - .match_mask = 0x60, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 6, - .minbit = 5, - .value = 0x1, - .pmaxbit = 13, - .pminbit = 5, - .zone_minbit = 5, - .arc_id_mask = 0x7e0, - .num_zone_bmp_words = 1, - .zone_bmp = bcm56690_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv4, - - }, - { - /* BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", - .match = 0x40, - .match_mask = 0x60, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 6, - .minbit = 5, - .value = 0x2, - .pmaxbit = 13, - .pminbit = 5, - .zone_minbit = 5, - .arc_id_mask = 0x7e0, - .num_zone_bmp_words = 2, - .zone_bmp = bcm56690_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv6, - - }, - { - /* BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_NONE", - .match = 0x0, - .match_mask = 0x1ff, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 8, - .minbit = 0, - .value = 0x0, - .pmaxbit = 13, - .pminbit = 5, - .zone_minbit = 5, - .arc_id_mask = 0x7e0, - - }, - { - /* BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_RARP", - .match = 0x2, - .match_mask = 0x6, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 2, - .minbit = 1, - .value = 0x1, - .pmaxbit = 13, - .pminbit = 5, - .zone_minbit = 5, - .arc_id_mask = 0x7e0, - .num_zone_bmp_words = 2, - .zone_bmp = bcm56690_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rarp, - - }, - { - /* BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", - .match = 0x4, - .match_mask = 0x6, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 2, - .minbit = 1, - .value = 0x2, - .pmaxbit = 13, - .pminbit = 5, - .zone_minbit = 5, - .arc_id_mask = 0x7e0, - .num_zone_bmp_words = 2, - .zone_bmp = bcm56690_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_first_4bytes, - - }, - { - /* BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", - .match = 0x10, - .match_mask = 0x10, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 4, - .minbit = 4, - .value = 0x1, - .pmaxbit = 13, - .pminbit = 5, - .zone_minbit = 5, - .arc_id_mask = 0x7e0, - .num_zone_bmp_words = 2, - .zone_bmp = bcm56690_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_last_16bytes, - - }, - { - /* BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UDP", - .match = 0x6, - .match_mask = 0x6, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 2, - .minbit = 1, - .value = 0x3, - .pmaxbit = 13, - .pminbit = 5, - .zone_minbit = 5, - .arc_id_mask = 0x7e0, - .num_zone_bmp_words = 2, - .zone_bmp = bcm56690_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_udp, - - }, - { - /* BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", - .match = 0x60, - .match_mask = 0x60, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 6, - .minbit = 5, - .value = 0x3, - .pmaxbit = 13, - .pminbit = 5, - .zone_minbit = 5, - .arc_id_mask = 0x7e0, - .num_zone_bmp_words = 2, - .zone_bmp = bcm56690_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l3, - - }, - { - /* BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", - .match = 0x180, - .match_mask = 0x180, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 8, - .minbit = 7, - .value = 0x3, - .pmaxbit = 13, - .pminbit = 5, - .zone_minbit = 5, - .arc_id_mask = 0x7e0, - .num_zone_bmp_words = 2, - .zone_bmp = bcm56690_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l4, - - }, - { - /* BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", - .match = 0x106, - .match_mask = 0x186, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 8, - .minbit = 7, - .value = 0x2, - .pmaxbit = 13, - .pminbit = 5, - .zone_minbit = 5, - .arc_id_mask = 0x7e0, - .num_zone_bmp_words = 2, - .zone_bmp = bcm56690_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l5, - - }, - { - /* BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", - .match = 0x86, - .match_mask = 0x18e, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 8, - .minbit = 7, - .value = 0x1, - .pmaxbit = 13, - .pminbit = 5, - .zone_minbit = 5, - .arc_id_mask = 0x7e0, - .num_zone_bmp_words = 2, - .zone_bmp = bcm56690_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_vxlan, - - }, - { - /* BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH */ - .name = "INGRESS_PKT_SYS_HDR_EP_NIH", - .match = 0x2, - .match_mask = 0x3, - .match_maxbit = 1, - .match_minbit = 0, - .maxbit = 1, - .minbit = 0, - .value = 0x2, - .pmaxbit = 1, - .pminbit = 0, - .zone_minbit = 0, - .arc_id_mask = 0x3, - .num_zone_bmp_words = 1, - .zone_bmp = bcm56690_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_sys_hdr_ep_nih, - - }, - { - /* BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */ - .name = "INGRESS_PKT_SYS_HDR_LOOPBACK", - .match = 0x1, - .match_mask = 0x3, - .match_maxbit = 1, - .match_minbit = 0, - .maxbit = 1, - .minbit = 0, - .value = 0x1, - .pmaxbit = 1, - .pminbit = 0, - .zone_minbit = 0, - .arc_id_mask = 0x3, - .num_zone_bmp_words = 1, - .zone_bmp = bcm56690_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_sys_hdr_loopback, - - }, - { - /* BCM56690_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */ - .name = "INGRESS_PKT_SYS_HDR_NONE", - .match = 0x0, - .match_mask = 0x3, - .match_maxbit = 1, - .match_minbit = 0, - .maxbit = 1, - .minbit = 0, - .value = 0x0, - .pmaxbit = 1, - .pminbit = 0, - .zone_minbit = 0, - .arc_id_mask = 0x3, - - }, -}; - -static bcmpkt_rxpmd_match_id_db_info_t bcm56690_a0_cna_6_5_34_2_0_rxpmd_match_id_db_info = { - .num_entries = 85, - .db = bcm56690_a0_cna_6_5_34_2_0_rxpmd_match_id_db -}; -bcmpkt_rxpmd_match_id_db_info_t * bcm56690_a0_cna_6_5_34_2_0_rxpmd_match_id_db_info_get(void) { - return &bcm56690_a0_cna_6_5_34_2_0_rxpmd_match_id_db_info; -} - -static shr_enum_map_t bcm56690_a0_cna_6_5_34_2_0_rxpmd_match_id_map[] = { - BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_rxpmd_match_id_map_info_t bcm56690_a0_cna_6_5_34_2_0_rxpmd_match_id_map_info = { - .num_entries = 85, - .map = bcm56690_a0_cna_6_5_34_2_0_rxpmd_match_id_map -}; - -bcmpkt_rxpmd_match_id_map_info_t * bcm56690_a0_cna_6_5_34_2_0_rxpmd_match_id_map_info_get(void) { - return &bcm56690_a0_cna_6_5_34_2_0_rxpmd_match_id_map_info; -} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56690_a0/cna_6_5_34_2_0/bcm56690_a0_cna_6_5_34_2_0_pkt_flexhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56690_a0/cna_6_5_34_2_0/bcm56690_a0_cna_6_5_34_2_0_pkt_flexhdr.c deleted file mode 100644 index eb09632b338..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56690_a0/cna_6_5_34_2_0/bcm56690_a0_cna_6_5_34_2_0_pkt_flexhdr.c +++ /dev/null @@ -1,4620 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) map.yml - * for device bcm56690_a0 and variant cna_6_5_34_2_0. - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - -#include -#include -#include -#include -#include -#include -#include - -#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) -#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) -#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) -#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) - -static void bcm56690_a0_cna_6_5_34_2_0_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons) -{ - uint32_t *reason = data + 0; - - if (reason[13] & (0x1 << 0)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU); - } - if (reason[13] & (0x1 << 1)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS); - } - if (reason[13] & (0x1 << 2)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE); - } - if (reason[13] & (0x1 << 3)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD); - } - if (reason[13] & (0x1 << 4)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST); - } - if (reason[13] & (0x1 << 5)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED); - } - if (reason[13] & (0x1 << 6)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT); - } - if (reason[13] & (0x1 << 7)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED); - } - if (reason[13] & (0x1 << 8)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED); - } - if (reason[13] & (0x1 << 9)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS); - } - if (reason[13] & (0x1 << 10)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP); - } - if (reason[13] & (0x1 << 11)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS); - } - if (reason[13] & (0x1 << 12)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP); - } - if (reason[13] & (0x1 << 13)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR); - } - if (reason[13] & (0x1 << 14)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR); - } - if (reason[13] & (0x1 << 16)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL); - } - if (reason[13] & (0x1 << 17)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_VFP); - } - if (reason[13] & (0x1 << 18)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP); - } - if (reason[13] & (0x1 << 19)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER); - } - if (reason[13] & (0x1 << 22)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT); - } - if (reason[13] & (0x1 << 23)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT); - } - if (reason[13] & (0x1 << 24)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED); - } - if (reason[13] & (0x1 << 25)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED); - } - if (reason[13] & (0x1 << 26)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP); - } - if (reason[12] & (0x1 << 15)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP); - } -} - -static void bcm56690_a0_cna_6_5_34_2_0_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data) -{ - uint32_t *reason = data + 0; - - reason[13] = 0; - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) { - reason[13] |= (0x1 << 0); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) { - reason[13] |= (0x1 << 1); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) { - reason[13] |= (0x1 << 2); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD)) { - reason[13] |= (0x1 << 3); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST)) { - reason[13] |= (0x1 << 4); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) { - reason[13] |= (0x1 << 5); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) { - reason[13] |= (0x1 << 6); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED)) { - reason[13] |= (0x1 << 7); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED)) { - reason[13] |= (0x1 << 8); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) { - reason[13] |= (0x1 << 9); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) { - reason[13] |= (0x1 << 10); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) { - reason[13] |= (0x1 << 11); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) { - reason[13] |= (0x1 << 12); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) { - reason[13] |= (0x1 << 13); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) { - reason[13] |= (0x1 << 14); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) { - reason[13] |= (0x1 << 16); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_VFP)) { - reason[13] |= (0x1 << 17); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP)) { - reason[13] |= (0x1 << 18); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) { - reason[13] |= (0x1 << 19); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT)) { - reason[13] |= (0x1 << 22); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) { - reason[13] |= (0x1 << 23); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED)) { - reason[13] |= (0x1 << 24); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED)) { - reason[13] |= (0x1 << 25); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP)) { - reason[13] |= (0x1 << 26); - } - reason[12] = 0; - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) { - reason[12] |= (0x1 << 15); - } -} - -static bcmpkt_flex_field_metadata_t bcm56690_a0_cna_6_5_34_2_0_rxpmd_flex_field_data[] = { - { - .name = "DROP_CODE_15_0", - .fid = BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 48, 63 }, /* Profile 2. */ - { -1, -1 }, /* Profile 3. */ - { 48, 63 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "DVP_15_0", - .fid = BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_DVP_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 192, 207 }, /* Profile 2. */ - { 192, 207 }, /* Profile 3. */ - { 192, 207 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "EFFECTIVE_TTL_7_0", - .fid = BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 336, 343 }, /* Profile 2. */ - { 336, 343 }, /* Profile 3. */ - { 336, 343 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "ENTROPY_LABEL_HIGH_3_0", - .fid = BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 412, 415 }, /* Profile 2. */ - { 412, 415 }, /* Profile 3. */ - { 412, 415 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "ENTROPY_LABEL_LOW_15_0", - .fid = BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 368, 383 }, /* Profile 2. */ - { 368, 383 }, /* Profile 3. */ - { 368, 383 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "EP_NIH_HDR_DROP_CODE_15_0", - .fid = BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_DROP_CODE_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { -1, -1 }, /* Profile 2. */ - { 48, 63 }, /* Profile 3. */ - }, - .profile_cnt = 4, - }, - { - .name = "EP_NIH_HDR_RECIRC_CODE_3_0", - .fid = BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 384, 387 }, /* Profile 2. */ - { 384, 387 }, /* Profile 3. */ - { 384, 387 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "EP_NIH_HDR_TIMESTAMP_15_0", - .fid = BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 128, 143 }, /* Profile 2. */ - { 128, 143 }, /* Profile 3. */ - }, - .profile_cnt = 4, - }, - { - .name = "EP_NIH_HDR_TIMESTAMP_31_16", - .fid = BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 144, 159 }, /* Profile 2. */ - { 144, 159 }, /* Profile 3. */ - }, - .profile_cnt = 4, - }, - { - .name = "ERSPAN3_GBP_SID_15_0", - .fid = BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_ERSPAN3_GBP_SID_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 352, 367 }, /* Profile 2. */ - { 352, 367 }, /* Profile 3. */ - { 352, 367 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "EVENT_TRACE_VECTOR_15_0", - .fid = BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 0, 15 }, /* Profile 2. */ - { 0, 15 }, /* Profile 3. */ - { 0, 15 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "EVENT_TRACE_VECTOR_31_16", - .fid = BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 16, 31 }, /* Profile 2. */ - { 16, 31 }, /* Profile 3. */ - { 16, 31 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "EVENT_TRACE_VECTOR_47_32", - .fid = BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 32, 47 }, /* Profile 2. */ - { 32, 47 }, /* Profile 3. */ - { 32, 47 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "I2E_CLASS_ID_15_0", - .fid = BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 224, 239 }, /* Profile 2. */ - { 224, 239 }, /* Profile 3. */ - { 224, 239 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "IFP_IOAM_GBP_ACTION_3_0", - .fid = BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 424, 427 }, /* Profile 2. */ - { 424, 427 }, /* Profile 3. */ - { 424, 427 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "IFP_TS_CONTROL_ACTION_3_0", - .fid = BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 396, 399 }, /* Profile 2. */ - { 396, 399 }, /* Profile 3. */ - { 396, 399 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "ING_TIMESTAMP_15_0", - .fid = BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { -1, -1 }, /* Profile 2. */ - { -1, -1 }, /* Profile 3. */ - { 128, 143 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "ING_TIMESTAMP_31_16", - .fid = BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { -1, -1 }, /* Profile 2. */ - { -1, -1 }, /* Profile 3. */ - { 144, 159 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "INGRESS_PP_PORT_6_0", - .fid = BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_6_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 112, 118 }, /* Profile 2. */ - { 112, 118 }, /* Profile 3. */ - { 112, 118 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0", - .fid = BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 240, 255 }, /* Profile 2. */ - { 240, 255 }, /* Profile 3. */ - { 240, 255 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "INGRESS_QOS_REMARK_CTRL_3_0", - .fid = BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 420, 423 }, /* Profile 2. */ - { 420, 423 }, /* Profile 3. */ - { 420, 423 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "INT_PRI_3_0", - .fid = BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 400, 403 }, /* Profile 2. */ - { 400, 403 }, /* Profile 3. */ - { 400, 403 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "L2_IIF_10_0", - .fid = BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 256, 266 }, /* Profile 2. */ - { 256, 266 }, /* Profile 3. */ - { 256, 266 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "L2_OIF_10_0", - .fid = BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 96, 106 }, /* Profile 2. */ - { 96, 106 }, /* Profile 3. */ - { 96, 106 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "L3_IIF_13_0", - .fid = BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 304, 317 }, /* Profile 2. */ - { 304, 317 }, /* Profile 3. */ - { 304, 317 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "L3_OIF_1_13_0", - .fid = BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 176, 189 }, /* Profile 2. */ - { 176, 189 }, /* Profile 3. */ - { 176, 189 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "NHOP_2_OR_ECMP_GROUP_INDEX_1_14_0", - .fid = BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_14_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 288, 302 }, /* Profile 2. */ - { 288, 302 }, /* Profile 3. */ - { 288, 302 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "NHOP_INDEX_1_14_0", - .fid = BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_14_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 208, 222 }, /* Profile 2. */ - { 208, 222 }, /* Profile 3. */ - { 208, 222 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "PARSER_VHLEN_0_15_0", - .fid = BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 64, 79 }, /* Profile 2. */ - { 64, 79 }, /* Profile 3. */ - { 64, 79 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "PKT_MISC_CTRL_0_3_0", - .fid = BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 416, 419 }, /* Profile 2. */ - { 416, 419 }, /* Profile 3. */ - { 416, 419 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "SVP_15_0", - .fid = BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_SVP_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 272, 287 }, /* Profile 2. */ - { 272, 287 }, /* Profile 3. */ - { 272, 287 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "SVP_NETWORK_GROUP_BITMAP_3_0", - .fid = BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 388, 391 }, /* Profile 2. */ - { 388, 391 }, /* Profile 3. */ - { 388, 391 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "SYSTEM_DESTINATION_15_0", - .fid = BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 160, 175 }, /* Profile 2. */ - { 160, 175 }, /* Profile 3. */ - { 160, 175 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "SYSTEM_OPCODE_3_0", - .fid = BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 408, 411 }, /* Profile 2. */ - { 408, 411 }, /* Profile 3. */ - { 408, 411 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "SYSTEM_SOURCE_15_0", - .fid = BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 320, 335 }, /* Profile 2. */ - { 320, 335 }, /* Profile 3. */ - { 320, 335 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "TAG_ACTION_CTRL_1_0", - .fid = BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_TAG_ACTION_CTRL_1_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 428, 429 }, /* Profile 2. */ - { 428, 429 }, /* Profile 3. */ - { 428, 429 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "TIMESTAMP_CTRL_3_0", - .fid = BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 404, 407 }, /* Profile 2. */ - { 404, 407 }, /* Profile 3. */ - { 404, 407 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "TUNNEL_PROCESSING_RESULTS_1_3_0", - .fid = BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 392, 395 }, /* Profile 2. */ - { 392, 395 }, /* Profile 3. */ - { 392, 395 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "VFI_15_0", - .fid = BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_VFI_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 80, 95 }, /* Profile 2. */ - { 80, 95 }, /* Profile 3. */ - { 80, 95 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, -}; -static bcmpkt_flex_field_info_t bcm56690_a0_cna_6_5_34_2_0_rxpmd_flex_field_info = { - .num_fields = BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_FID_COUNT, - .info = bcm56690_a0_cna_6_5_34_2_0_rxpmd_flex_field_data, - .profile_bmp_cnt = 1, - .profile_bmp[0] = 0x1c, - -}; - -static shr_enum_map_t bcm56690_a0_cna_6_5_34_2_0_rxpmd_flex_reason_names[] = { - BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT -}; - -static bcmpkt_flex_reasons_info_t bcm56690_a0_cna_6_5_34_2_0_rxpmd_flex_reasons_info = { - .num_reasons = BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_COUNT, - .reason_names = bcm56690_a0_cna_6_5_34_2_0_rxpmd_flex_reason_names, - .reason_encode = bcm56690_a0_cna_6_5_34_2_0_rxpmd_flex_reason_encode, - .reason_decode = bcm56690_a0_cna_6_5_34_2_0_rxpmd_flex_reason_decode, -}; - - -static int32_t bcmpkt_arp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 24, 8); - - return ret; -} - -static int32_t bcmpkt_arp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_arp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_arp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_arp_t_operation_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 16); - - return ret; -} - -static int32_t bcmpkt_arp_t_operation_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_arp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 8); - - return ret; -} - -static int32_t bcmpkt_arp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_arp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_arp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_arp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_arp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_arp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_arp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_arp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_arp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_arp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_arp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56690_a0_cna_6_5_34_2_0_arp_t_fget[BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_FID_COUNT] = { - bcmpkt_arp_t_hardware_len_get, - bcmpkt_arp_t_hardware_type_get, - bcmpkt_arp_t_operation_get, - bcmpkt_arp_t_prot_addr_len_get, - bcmpkt_arp_t_protocol_type_get, - bcmpkt_arp_t_sender_ha_get, - bcmpkt_arp_t_sender_ip_get, - bcmpkt_arp_t_target_ha_get, - bcmpkt_arp_t_target_ip_get, -}; - -bcmpkt_flex_field_set_f bcm56690_a0_cna_6_5_34_2_0_arp_t_fset[BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_FID_COUNT] = { - bcmpkt_arp_t_hardware_len_set, - bcmpkt_arp_t_hardware_type_set, - bcmpkt_arp_t_operation_set, - bcmpkt_arp_t_prot_addr_len_set, - bcmpkt_arp_t_protocol_type_set, - bcmpkt_arp_t_sender_ha_set, - bcmpkt_arp_t_sender_ip_set, - bcmpkt_arp_t_target_ha_set, - bcmpkt_arp_t_target_ip_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56690_a0_cna_6_5_34_2_0_arp_t_field_data[] = { - BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56690_a0_cna_6_5_34_2_0_arp_t_field_info = { - .num_fields = BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_FID_COUNT, - .info = bcm56690_a0_cna_6_5_34_2_0_arp_t_field_data, -}; - - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56690_a0_cna_6_5_34_2_0_cpu_composites_0_t_fget[BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { - bcmpkt_cpu_composites_0_t_dma_cont0_get, - bcmpkt_cpu_composites_0_t_dma_cont1_get, - bcmpkt_cpu_composites_0_t_dma_cont2_get, - bcmpkt_cpu_composites_0_t_dma_cont3_get, - bcmpkt_cpu_composites_0_t_dma_cont4_get, - bcmpkt_cpu_composites_0_t_dma_cont5_get, - bcmpkt_cpu_composites_0_t_dma_cont6_get, -}; - -bcmpkt_flex_field_set_f bcm56690_a0_cna_6_5_34_2_0_cpu_composites_0_t_fset[BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { - bcmpkt_cpu_composites_0_t_dma_cont0_set, - bcmpkt_cpu_composites_0_t_dma_cont1_set, - bcmpkt_cpu_composites_0_t_dma_cont2_set, - bcmpkt_cpu_composites_0_t_dma_cont3_set, - bcmpkt_cpu_composites_0_t_dma_cont4_set, - bcmpkt_cpu_composites_0_t_dma_cont5_set, - bcmpkt_cpu_composites_0_t_dma_cont6_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56690_a0_cna_6_5_34_2_0_cpu_composites_0_t_field_data[] = { - BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56690_a0_cna_6_5_34_2_0_cpu_composites_0_t_field_info = { - .num_fields = BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT, - .info = bcm56690_a0_cna_6_5_34_2_0_cpu_composites_0_t_field_data, -}; - - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56690_a0_cna_6_5_34_2_0_cpu_composites_1_t_fget[BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { - bcmpkt_cpu_composites_1_t_dma_cont10_get, - bcmpkt_cpu_composites_1_t_dma_cont11_get, - bcmpkt_cpu_composites_1_t_dma_cont12_get, - bcmpkt_cpu_composites_1_t_dma_cont13_get, - bcmpkt_cpu_composites_1_t_dma_cont14_get, - bcmpkt_cpu_composites_1_t_dma_cont15_get, - bcmpkt_cpu_composites_1_t_dma_cont16_get, - bcmpkt_cpu_composites_1_t_dma_cont17_get, - bcmpkt_cpu_composites_1_t_dma_cont7_get, - bcmpkt_cpu_composites_1_t_dma_cont8_get, - bcmpkt_cpu_composites_1_t_dma_cont9_get, -}; - -bcmpkt_flex_field_set_f bcm56690_a0_cna_6_5_34_2_0_cpu_composites_1_t_fset[BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { - bcmpkt_cpu_composites_1_t_dma_cont10_set, - bcmpkt_cpu_composites_1_t_dma_cont11_set, - bcmpkt_cpu_composites_1_t_dma_cont12_set, - bcmpkt_cpu_composites_1_t_dma_cont13_set, - bcmpkt_cpu_composites_1_t_dma_cont14_set, - bcmpkt_cpu_composites_1_t_dma_cont15_set, - bcmpkt_cpu_composites_1_t_dma_cont16_set, - bcmpkt_cpu_composites_1_t_dma_cont17_set, - bcmpkt_cpu_composites_1_t_dma_cont7_set, - bcmpkt_cpu_composites_1_t_dma_cont8_set, - bcmpkt_cpu_composites_1_t_dma_cont9_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56690_a0_cna_6_5_34_2_0_cpu_composites_1_t_field_data[] = { - BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56690_a0_cna_6_5_34_2_0_cpu_composites_1_t_field_info = { - .num_fields = BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT, - .info = bcm56690_a0_cna_6_5_34_2_0_cpu_composites_1_t_field_data, -}; - - -static int32_t bcmpkt_ep_nih_header_t_header_subtype_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 20, 4); - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_header_subtype_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 20, 4, val); - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_header_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 6); - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_header_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 6, val); - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 8, 4); - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 8, 4, val); - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 20, 4); - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 20, 4, val); - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 4); - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 4, val); - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[3], 16, 16); - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[3], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[3], 0, 16); - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[3], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 4); - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 4, val); - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 12, 4); - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 12, 4, val); - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_start_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 30, 2); - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_start_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 30, 2, val); - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56690_a0_cna_6_5_34_2_0_ep_nih_header_t_fget[BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = { - bcmpkt_ep_nih_header_t_header_subtype_get, - bcmpkt_ep_nih_header_t_header_type_get, - bcmpkt_ep_nih_header_t_opaque_ctrl_a_get, - bcmpkt_ep_nih_header_t_opaque_ctrl_b_get, - bcmpkt_ep_nih_header_t_opaque_ctrl_c_get, - bcmpkt_ep_nih_header_t_opaque_object_a_get, - bcmpkt_ep_nih_header_t_opaque_object_b_get, - bcmpkt_ep_nih_header_t_opaque_object_c_get, - bcmpkt_ep_nih_header_t_recirc_profile_index_get, - bcmpkt_ep_nih_header_t_reserved_0_get, - bcmpkt_ep_nih_header_t_start_get, - bcmpkt_ep_nih_header_t_timestamp_get, -}; - -bcmpkt_flex_field_set_f bcm56690_a0_cna_6_5_34_2_0_ep_nih_header_t_fset[BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = { - bcmpkt_ep_nih_header_t_header_subtype_set, - bcmpkt_ep_nih_header_t_header_type_set, - bcmpkt_ep_nih_header_t_opaque_ctrl_a_set, - bcmpkt_ep_nih_header_t_opaque_ctrl_b_set, - bcmpkt_ep_nih_header_t_opaque_ctrl_c_set, - bcmpkt_ep_nih_header_t_opaque_object_a_set, - bcmpkt_ep_nih_header_t_opaque_object_b_set, - bcmpkt_ep_nih_header_t_opaque_object_c_set, - bcmpkt_ep_nih_header_t_recirc_profile_index_set, - bcmpkt_ep_nih_header_t_reserved_0_set, - bcmpkt_ep_nih_header_t_start_set, - bcmpkt_ep_nih_header_t_timestamp_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56690_a0_cna_6_5_34_2_0_ep_nih_header_t_field_data[] = { - BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56690_a0_cna_6_5_34_2_0_ep_nih_header_t_field_info = { - .num_fields = BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT, - .info = bcm56690_a0_cna_6_5_34_2_0_ep_nih_header_t_field_data, -}; - - -static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 11, 2); - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 11, 2, val); - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 13, 3); - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 13, 3, val); - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 16, 16); - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 0, 16); - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 10); - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 10, val); - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_t_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 10, 1); - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_t_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 10, 1, val); - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 28, 4); - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 28, 4, val); - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 12); - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 12, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56690_a0_cna_6_5_34_2_0_erspan3_fixed_hdr_t_fget[BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { - bcmpkt_erspan3_fixed_hdr_t_bso_get, - bcmpkt_erspan3_fixed_hdr_t_cos_get, - bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get, - bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get, - bcmpkt_erspan3_fixed_hdr_t_session_id_get, - bcmpkt_erspan3_fixed_hdr_t_t_get, - bcmpkt_erspan3_fixed_hdr_t_timestamp_get, - bcmpkt_erspan3_fixed_hdr_t_ver_get, - bcmpkt_erspan3_fixed_hdr_t_vlan_get, -}; - -bcmpkt_flex_field_set_f bcm56690_a0_cna_6_5_34_2_0_erspan3_fixed_hdr_t_fset[BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { - bcmpkt_erspan3_fixed_hdr_t_bso_set, - bcmpkt_erspan3_fixed_hdr_t_cos_set, - bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set, - bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set, - bcmpkt_erspan3_fixed_hdr_t_session_id_set, - bcmpkt_erspan3_fixed_hdr_t_t_set, - bcmpkt_erspan3_fixed_hdr_t_timestamp_set, - bcmpkt_erspan3_fixed_hdr_t_ver_set, - bcmpkt_erspan3_fixed_hdr_t_vlan_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56690_a0_cna_6_5_34_2_0_erspan3_fixed_hdr_t_field_data[] = { - BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56690_a0_cna_6_5_34_2_0_erspan3_fixed_hdr_t_field_info = { - .num_fields = BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT, - .info = bcm56690_a0_cna_6_5_34_2_0_erspan3_fixed_hdr_t_field_data, -}; - - -static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 26, 6); - - return ret; -} - -static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 26, 6, val); - return ret; -} - -static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 10); - - return ret; -} - -static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 10, val); - return ret; -} - -static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56690_a0_cna_6_5_34_2_0_erspan3_subhdr_5_t_fget[BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { - bcmpkt_erspan3_subhdr_5_t_platform_id_get, - bcmpkt_erspan3_subhdr_5_t_port_id_get, - bcmpkt_erspan3_subhdr_5_t_switch_id_get, - bcmpkt_erspan3_subhdr_5_t_timestamp_get, -}; - -bcmpkt_flex_field_set_f bcm56690_a0_cna_6_5_34_2_0_erspan3_subhdr_5_t_fset[BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { - bcmpkt_erspan3_subhdr_5_t_platform_id_set, - bcmpkt_erspan3_subhdr_5_t_port_id_set, - bcmpkt_erspan3_subhdr_5_t_switch_id_set, - bcmpkt_erspan3_subhdr_5_t_timestamp_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56690_a0_cna_6_5_34_2_0_erspan3_subhdr_5_t_field_data[] = { - BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56690_a0_cna_6_5_34_2_0_erspan3_subhdr_5_t_field_info = { - .num_fields = BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT, - .info = bcm56690_a0_cna_6_5_34_2_0_erspan3_subhdr_5_t_field_data, -}; - - -static int32_t bcmpkt_ethertype_t_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_ethertype_t_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56690_a0_cna_6_5_34_2_0_ethertype_t_fget[BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = { - bcmpkt_ethertype_t_type_get, -}; - -bcmpkt_flex_field_set_f bcm56690_a0_cna_6_5_34_2_0_ethertype_t_fset[BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = { - bcmpkt_ethertype_t_type_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56690_a0_cna_6_5_34_2_0_ethertype_t_field_data[] = { - BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56690_a0_cna_6_5_34_2_0_ethertype_t_field_info = { - .num_fields = BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT, - .info = bcm56690_a0_cna_6_5_34_2_0_ethertype_t_field_data, -}; - - -static int32_t bcmpkt_generic_loopback_t_destination_obj_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 16); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_destination_obj_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_destination_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 24, 4); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_destination_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 24, 4, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_entropy_obj_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[3], 16, 16); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_entropy_obj_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[3], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_flags_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 4); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_flags_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 4, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_header_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 20, 4); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_header_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 20, 4, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_input_priority_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 12, 4); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_input_priority_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 12, 4, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_interface_ctrl_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 4, 4); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_interface_ctrl_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 4, 4, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_interface_obj_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 0, 16); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_interface_obj_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 4); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 4, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 28, 4); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 28, 4, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_qos_obj_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 8); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_qos_obj_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_reserved_1_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 8, 4); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_reserved_1_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 8, 4, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_reserved_2_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[3], 0, 16); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_reserved_2_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[3], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_source_system_port_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 16, 16); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_source_system_port_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_start_byte_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_start_byte_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56690_a0_cna_6_5_34_2_0_generic_loopback_t_fget[BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { - bcmpkt_generic_loopback_t_destination_obj_get, - bcmpkt_generic_loopback_t_destination_type_get, - bcmpkt_generic_loopback_t_entropy_obj_get, - bcmpkt_generic_loopback_t_flags_get, - bcmpkt_generic_loopback_t_header_type_get, - bcmpkt_generic_loopback_t_input_priority_get, - bcmpkt_generic_loopback_t_interface_ctrl_get, - bcmpkt_generic_loopback_t_interface_obj_get, - bcmpkt_generic_loopback_t_processing_ctrl_0_get, - bcmpkt_generic_loopback_t_processing_ctrl_1_get, - bcmpkt_generic_loopback_t_qos_obj_get, - bcmpkt_generic_loopback_t_reserved_1_get, - bcmpkt_generic_loopback_t_reserved_2_get, - bcmpkt_generic_loopback_t_source_system_port_get, - bcmpkt_generic_loopback_t_start_byte_get, -}; - -bcmpkt_flex_field_set_f bcm56690_a0_cna_6_5_34_2_0_generic_loopback_t_fset[BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { - bcmpkt_generic_loopback_t_destination_obj_set, - bcmpkt_generic_loopback_t_destination_type_set, - bcmpkt_generic_loopback_t_entropy_obj_set, - bcmpkt_generic_loopback_t_flags_set, - bcmpkt_generic_loopback_t_header_type_set, - bcmpkt_generic_loopback_t_input_priority_set, - bcmpkt_generic_loopback_t_interface_ctrl_set, - bcmpkt_generic_loopback_t_interface_obj_set, - bcmpkt_generic_loopback_t_processing_ctrl_0_set, - bcmpkt_generic_loopback_t_processing_ctrl_1_set, - bcmpkt_generic_loopback_t_qos_obj_set, - bcmpkt_generic_loopback_t_reserved_1_set, - bcmpkt_generic_loopback_t_reserved_2_set, - bcmpkt_generic_loopback_t_source_system_port_set, - bcmpkt_generic_loopback_t_start_byte_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56690_a0_cna_6_5_34_2_0_generic_loopback_t_field_data[] = { - BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56690_a0_cna_6_5_34_2_0_generic_loopback_t_field_info = { - .num_fields = BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT, - .info = bcm56690_a0_cna_6_5_34_2_0_generic_loopback_t_field_data, -}; - - -static int32_t bcmpkt_icmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_icmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_icmp_t_code_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_icmp_t_code_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_icmp_t_icmp_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_icmp_t_icmp_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56690_a0_cna_6_5_34_2_0_icmp_t_fget[BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ICMP_T_FID_COUNT] = { - bcmpkt_icmp_t_checksum_get, - bcmpkt_icmp_t_code_get, - bcmpkt_icmp_t_icmp_type_get, -}; - -bcmpkt_flex_field_set_f bcm56690_a0_cna_6_5_34_2_0_icmp_t_fset[BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ICMP_T_FID_COUNT] = { - bcmpkt_icmp_t_checksum_set, - bcmpkt_icmp_t_code_set, - bcmpkt_icmp_t_icmp_type_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56690_a0_cna_6_5_34_2_0_icmp_t_field_data[] = { - BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56690_a0_cna_6_5_34_2_0_icmp_t_field_info = { - .num_fields = BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_ICMP_T_FID_COUNT, - .info = bcm56690_a0_cna_6_5_34_2_0_icmp_t_field_data, -}; - - -static int32_t bcmpkt_ifa_header_t_flags_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 8, 8); - - return ret; -} - -static int32_t bcmpkt_ifa_header_t_flags_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 8, 8, val); - return ret; -} - -static int32_t bcmpkt_ifa_header_t_gns_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 4); - - return ret; -} - -static int32_t bcmpkt_ifa_header_t_gns_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 4, val); - return ret; -} - -static int32_t bcmpkt_ifa_header_t_max_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 8); - - return ret; -} - -static int32_t bcmpkt_ifa_header_t_max_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 8, val); - return ret; -} - -static int32_t bcmpkt_ifa_header_t_next_hdr_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_ifa_header_t_next_hdr_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_ifa_header_t_ver_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 28, 4); - - return ret; -} - -static int32_t bcmpkt_ifa_header_t_ver_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 28, 4, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56690_a0_cna_6_5_34_2_0_ifa_header_t_fget[BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = { - bcmpkt_ifa_header_t_flags_get, - bcmpkt_ifa_header_t_gns_get, - bcmpkt_ifa_header_t_max_length_get, - bcmpkt_ifa_header_t_next_hdr_get, - bcmpkt_ifa_header_t_ver_get, -}; - -bcmpkt_flex_field_set_f bcm56690_a0_cna_6_5_34_2_0_ifa_header_t_fset[BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = { - bcmpkt_ifa_header_t_flags_set, - bcmpkt_ifa_header_t_gns_set, - bcmpkt_ifa_header_t_max_length_set, - bcmpkt_ifa_header_t_next_hdr_set, - bcmpkt_ifa_header_t_ver_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56690_a0_cna_6_5_34_2_0_ifa_header_t_field_data[] = { - BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56690_a0_cna_6_5_34_2_0_ifa_header_t_field_info = { - .num_fields = BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_FID_COUNT, - .info = bcm56690_a0_cna_6_5_34_2_0_ifa_header_t_field_data, -}; - - -static int32_t bcmpkt_ifa_metadata_a_t_cn_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 26, 2); - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_a_t_cn_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 26, 2, val); - return ret; -} - -static int32_t bcmpkt_ifa_metadata_a_t_fwd_hdr_ttl_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 8); - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_a_t_fwd_hdr_ttl_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 8, val); - return ret; -} - -static int32_t bcmpkt_ifa_metadata_a_t_lns_device_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 8, 24); - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_a_t_lns_device_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 8, 24, val); - return ret; -} - -static int32_t bcmpkt_ifa_metadata_a_t_port_speed_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 28, 4); - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_a_t_port_speed_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 28, 4, val); - return ret; -} - -static int32_t bcmpkt_ifa_metadata_a_t_queue_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 20, 6); - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_a_t_queue_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 20, 6, val); - return ret; -} - -static int32_t bcmpkt_ifa_metadata_a_t_rx_timestamp_sec_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 20); - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_a_t_rx_timestamp_sec_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 20, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56690_a0_cna_6_5_34_2_0_ifa_metadata_a_t_fget[BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT] = { - bcmpkt_ifa_metadata_a_t_cn_get, - bcmpkt_ifa_metadata_a_t_fwd_hdr_ttl_get, - bcmpkt_ifa_metadata_a_t_lns_device_id_get, - bcmpkt_ifa_metadata_a_t_port_speed_get, - bcmpkt_ifa_metadata_a_t_queue_id_get, - bcmpkt_ifa_metadata_a_t_rx_timestamp_sec_get, -}; - -bcmpkt_flex_field_set_f bcm56690_a0_cna_6_5_34_2_0_ifa_metadata_a_t_fset[BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT] = { - bcmpkt_ifa_metadata_a_t_cn_set, - bcmpkt_ifa_metadata_a_t_fwd_hdr_ttl_set, - bcmpkt_ifa_metadata_a_t_lns_device_id_set, - bcmpkt_ifa_metadata_a_t_port_speed_set, - bcmpkt_ifa_metadata_a_t_queue_id_set, - bcmpkt_ifa_metadata_a_t_rx_timestamp_sec_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56690_a0_cna_6_5_34_2_0_ifa_metadata_a_t_field_data[] = { - BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_A_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56690_a0_cna_6_5_34_2_0_ifa_metadata_a_t_field_info = { - .num_fields = BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT, - .info = bcm56690_a0_cna_6_5_34_2_0_ifa_metadata_a_t_field_data, -}; - - -static int32_t bcmpkt_ifa_metadata_b_t_egress_port_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_b_t_egress_port_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_ifa_metadata_b_t_ingress_port_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_b_t_ingress_port_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_ifa_metadata_b_t_mmu_stat_0_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_b_t_mmu_stat_0_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_b_t_mmu_stat_1_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_b_t_mmu_stat_1_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_b_t_residence_time_nanosec_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_b_t_residence_time_nanosec_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_b_t_rx_timestamp_nanosec_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_b_t_rx_timestamp_nanosec_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_b_t_tx_queue_byte_count_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_b_t_tx_queue_byte_count_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56690_a0_cna_6_5_34_2_0_ifa_metadata_b_t_fget[BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT] = { - bcmpkt_ifa_metadata_b_t_egress_port_id_get, - bcmpkt_ifa_metadata_b_t_ingress_port_id_get, - bcmpkt_ifa_metadata_b_t_mmu_stat_0_get, - bcmpkt_ifa_metadata_b_t_mmu_stat_1_get, - bcmpkt_ifa_metadata_b_t_residence_time_nanosec_get, - bcmpkt_ifa_metadata_b_t_rx_timestamp_nanosec_get, - bcmpkt_ifa_metadata_b_t_tx_queue_byte_count_get, -}; - -bcmpkt_flex_field_set_f bcm56690_a0_cna_6_5_34_2_0_ifa_metadata_b_t_fset[BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT] = { - bcmpkt_ifa_metadata_b_t_egress_port_id_set, - bcmpkt_ifa_metadata_b_t_ingress_port_id_set, - bcmpkt_ifa_metadata_b_t_mmu_stat_0_set, - bcmpkt_ifa_metadata_b_t_mmu_stat_1_set, - bcmpkt_ifa_metadata_b_t_residence_time_nanosec_set, - bcmpkt_ifa_metadata_b_t_rx_timestamp_nanosec_set, - bcmpkt_ifa_metadata_b_t_tx_queue_byte_count_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56690_a0_cna_6_5_34_2_0_ifa_metadata_b_t_field_data[] = { - BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_B_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56690_a0_cna_6_5_34_2_0_ifa_metadata_b_t_field_info = { - .num_fields = BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT, - .info = bcm56690_a0_cna_6_5_34_2_0_ifa_metadata_b_t_field_data, -}; - - -static int32_t bcmpkt_ifa_metadata_base_t_action_vector_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_base_t_action_vector_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_ifa_metadata_base_t_hop_limit_current_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_base_t_hop_limit_current_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_ifa_metadata_base_t_request_vector_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_base_t_request_vector_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56690_a0_cna_6_5_34_2_0_ifa_metadata_base_t_fget[BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT] = { - bcmpkt_ifa_metadata_base_t_action_vector_get, - bcmpkt_ifa_metadata_base_t_hop_limit_current_length_get, - bcmpkt_ifa_metadata_base_t_request_vector_get, -}; - -bcmpkt_flex_field_set_f bcm56690_a0_cna_6_5_34_2_0_ifa_metadata_base_t_fset[BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT] = { - bcmpkt_ifa_metadata_base_t_action_vector_set, - bcmpkt_ifa_metadata_base_t_hop_limit_current_length_set, - bcmpkt_ifa_metadata_base_t_request_vector_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56690_a0_cna_6_5_34_2_0_ifa_metadata_base_t_field_data[] = { - BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_BASE_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56690_a0_cna_6_5_34_2_0_ifa_metadata_base_t_field_info = { - .num_fields = BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT, - .info = bcm56690_a0_cna_6_5_34_2_0_ifa_metadata_base_t_field_data, -}; - - -static int32_t bcmpkt_ipfix_t_export_time_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipfix_t_export_time_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipfix_t_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_ipfix_t_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_ipfix_t_obs_domain_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipfix_t_obs_domain_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipfix_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipfix_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipfix_t_version_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_ipfix_t_version_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56690_a0_cna_6_5_34_2_0_ipfix_t_fget[BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IPFIX_T_FID_COUNT] = { - bcmpkt_ipfix_t_export_time_get, - bcmpkt_ipfix_t_length_get, - bcmpkt_ipfix_t_obs_domain_id_get, - bcmpkt_ipfix_t_sequence_num_get, - bcmpkt_ipfix_t_version_get, -}; - -bcmpkt_flex_field_set_f bcm56690_a0_cna_6_5_34_2_0_ipfix_t_fset[BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IPFIX_T_FID_COUNT] = { - bcmpkt_ipfix_t_export_time_set, - bcmpkt_ipfix_t_length_set, - bcmpkt_ipfix_t_obs_domain_id_set, - bcmpkt_ipfix_t_sequence_num_set, - bcmpkt_ipfix_t_version_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56690_a0_cna_6_5_34_2_0_ipfix_t_field_data[] = { - BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56690_a0_cna_6_5_34_2_0_ipfix_t_field_info = { - .num_fields = BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IPFIX_T_FID_COUNT, - .info = bcm56690_a0_cna_6_5_34_2_0_ipfix_t_field_data, -}; - - -static int32_t bcmpkt_ipv4_t_da_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv4_t_da_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv4_t_flags_frag_offset_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 16); - - return ret; -} - -static int32_t bcmpkt_ipv4_t_flags_frag_offset_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_ipv4_t_hdr_checksum_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 0, 16); - - return ret; -} - -static int32_t bcmpkt_ipv4_t_hdr_checksum_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_ipv4_t_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 16); - - return ret; -} - -static int32_t bcmpkt_ipv4_t_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_ipv4_t_option_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv4_t_option_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv4_t_protocol_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 16, 8); - - return ret; -} - -static int32_t bcmpkt_ipv4_t_protocol_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_ipv4_t_sa_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv4_t_sa_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv4_t_tos_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_ipv4_t_tos_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_ipv4_t_total_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_ipv4_t_total_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_ipv4_t_ttl_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 24, 8); - - return ret; -} - -static int32_t bcmpkt_ipv4_t_ttl_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_ipv4_t_version_hdr_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_ipv4_t_version_hdr_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56690_a0_cna_6_5_34_2_0_ipv4_t_fget[BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_FID_COUNT] = { - bcmpkt_ipv4_t_da_get, - bcmpkt_ipv4_t_flags_frag_offset_get, - bcmpkt_ipv4_t_hdr_checksum_get, - bcmpkt_ipv4_t_id_get, - bcmpkt_ipv4_t_option_get, - bcmpkt_ipv4_t_protocol_get, - bcmpkt_ipv4_t_sa_get, - bcmpkt_ipv4_t_tos_get, - bcmpkt_ipv4_t_total_length_get, - bcmpkt_ipv4_t_ttl_get, - bcmpkt_ipv4_t_version_hdr_len_get, -}; - -bcmpkt_flex_field_set_f bcm56690_a0_cna_6_5_34_2_0_ipv4_t_fset[BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_FID_COUNT] = { - bcmpkt_ipv4_t_da_set, - bcmpkt_ipv4_t_flags_frag_offset_set, - bcmpkt_ipv4_t_hdr_checksum_set, - bcmpkt_ipv4_t_id_set, - bcmpkt_ipv4_t_option_set, - bcmpkt_ipv4_t_protocol_set, - bcmpkt_ipv4_t_sa_set, - bcmpkt_ipv4_t_tos_set, - bcmpkt_ipv4_t_total_length_set, - bcmpkt_ipv4_t_ttl_set, - bcmpkt_ipv4_t_version_hdr_len_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56690_a0_cna_6_5_34_2_0_ipv4_t_field_data[] = { - BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56690_a0_cna_6_5_34_2_0_ipv4_t_field_info = { - .num_fields = BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_FID_COUNT, - .info = bcm56690_a0_cna_6_5_34_2_0_ipv4_t_field_data, -}; - - -static int32_t bcmpkt_ipv6_t_da_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv6_t_da_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv6_t_flow_label_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 20); - - return ret; -} - -static int32_t bcmpkt_ipv6_t_flow_label_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 20, val); - return ret; -} - -static int32_t bcmpkt_ipv6_t_hop_limit_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 8); - - return ret; -} - -static int32_t bcmpkt_ipv6_t_hop_limit_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 8, val); - return ret; -} - -static int32_t bcmpkt_ipv6_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 8, 8); - - return ret; -} - -static int32_t bcmpkt_ipv6_t_next_header_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 8, 8, val); - return ret; -} - -static int32_t bcmpkt_ipv6_t_payload_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 16); - - return ret; -} - -static int32_t bcmpkt_ipv6_t_payload_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_ipv6_t_sa_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv6_t_sa_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv6_t_traffic_class_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 20, 8); - - return ret; -} - -static int32_t bcmpkt_ipv6_t_traffic_class_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 20, 8, val); - return ret; -} - -static int32_t bcmpkt_ipv6_t_version_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 28, 4); - - return ret; -} - -static int32_t bcmpkt_ipv6_t_version_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 28, 4, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56690_a0_cna_6_5_34_2_0_ipv6_t_fget[BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_FID_COUNT] = { - bcmpkt_ipv6_t_da_get, - bcmpkt_ipv6_t_flow_label_get, - bcmpkt_ipv6_t_hop_limit_get, - bcmpkt_ipv6_t_next_header_get, - bcmpkt_ipv6_t_payload_length_get, - bcmpkt_ipv6_t_sa_get, - bcmpkt_ipv6_t_traffic_class_get, - bcmpkt_ipv6_t_version_get, -}; - -bcmpkt_flex_field_set_f bcm56690_a0_cna_6_5_34_2_0_ipv6_t_fset[BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_FID_COUNT] = { - bcmpkt_ipv6_t_da_set, - bcmpkt_ipv6_t_flow_label_set, - bcmpkt_ipv6_t_hop_limit_set, - bcmpkt_ipv6_t_next_header_set, - bcmpkt_ipv6_t_payload_length_set, - bcmpkt_ipv6_t_sa_set, - bcmpkt_ipv6_t_traffic_class_set, - bcmpkt_ipv6_t_version_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56690_a0_cna_6_5_34_2_0_ipv6_t_field_data[] = { - BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56690_a0_cna_6_5_34_2_0_ipv6_t_field_info = { - .num_fields = BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_FID_COUNT, - .info = bcm56690_a0_cna_6_5_34_2_0_ipv6_t_field_data, -}; - - -static int32_t bcmpkt_l2_t_macda_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_l2_t_macda_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_l2_t_macsa_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_l2_t_macsa_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56690_a0_cna_6_5_34_2_0_l2_t_fget[BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_L2_T_FID_COUNT] = { - bcmpkt_l2_t_macda_get, - bcmpkt_l2_t_macsa_get, -}; - -bcmpkt_flex_field_set_f bcm56690_a0_cna_6_5_34_2_0_l2_t_fset[BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_L2_T_FID_COUNT] = { - bcmpkt_l2_t_macda_set, - bcmpkt_l2_t_macsa_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56690_a0_cna_6_5_34_2_0_l2_t_field_data[] = { - BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56690_a0_cna_6_5_34_2_0_l2_t_field_info = { - .num_fields = BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_L2_T_FID_COUNT, - .info = bcm56690_a0_cna_6_5_34_2_0_l2_t_field_data, -}; - - -static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56690_a0_cna_6_5_34_2_0_mirror_erspan_sn_t_fget[BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { - bcmpkt_mirror_erspan_sn_t_seq_num_get, -}; - -bcmpkt_flex_field_set_f bcm56690_a0_cna_6_5_34_2_0_mirror_erspan_sn_t_fset[BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { - bcmpkt_mirror_erspan_sn_t_seq_num_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56690_a0_cna_6_5_34_2_0_mirror_erspan_sn_t_field_data[] = { - BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56690_a0_cna_6_5_34_2_0_mirror_erspan_sn_t_field_info = { - .num_fields = BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT, - .info = bcm56690_a0_cna_6_5_34_2_0_mirror_erspan_sn_t_field_data, -}; - - -static int32_t bcmpkt_mirror_transport_t_data_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_mirror_transport_t_data_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56690_a0_cna_6_5_34_2_0_mirror_transport_t_fget[BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { - bcmpkt_mirror_transport_t_data_get, -}; - -bcmpkt_flex_field_set_f bcm56690_a0_cna_6_5_34_2_0_mirror_transport_t_fset[BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { - bcmpkt_mirror_transport_t_data_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56690_a0_cna_6_5_34_2_0_mirror_transport_t_field_data[] = { - BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56690_a0_cna_6_5_34_2_0_mirror_transport_t_field_info = { - .num_fields = BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT, - .info = bcm56690_a0_cna_6_5_34_2_0_mirror_transport_t_field_data, -}; - - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[4], 16, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[4], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[4], 0, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[4], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56690_a0_cna_6_5_34_2_0_psamp_mirror_on_drop_0_t_fget[BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { - bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get, - bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get, - bcmpkt_psamp_mirror_on_drop_0_t_length_get, - bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get, - bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get, - bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get, - bcmpkt_psamp_mirror_on_drop_0_t_template_id_get, -}; - -bcmpkt_flex_field_set_f bcm56690_a0_cna_6_5_34_2_0_psamp_mirror_on_drop_0_t_fset[BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { - bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set, - bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set, - bcmpkt_psamp_mirror_on_drop_0_t_length_set, - bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set, - bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set, - bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set, - bcmpkt_psamp_mirror_on_drop_0_t_template_id_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56690_a0_cna_6_5_34_2_0_psamp_mirror_on_drop_0_t_field_data[] = { - BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56690_a0_cna_6_5_34_2_0_psamp_mirror_on_drop_0_t_field_info = { - .num_fields = BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT, - .info = bcm56690_a0_cna_6_5_34_2_0_psamp_mirror_on_drop_0_t_field_data, -}; - - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 6); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 6, val); - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_smod_state_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 22, 2); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_smod_state_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 22, 2, val); - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 24, 8); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 8); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 8, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56690_a0_cna_6_5_34_2_0_psamp_mirror_on_drop_3_t_fget[BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = { - bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get, - bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get, - bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get, - bcmpkt_psamp_mirror_on_drop_3_t_smod_state_get, - bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get, - bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get, - bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get, -}; - -bcmpkt_flex_field_set_f bcm56690_a0_cna_6_5_34_2_0_psamp_mirror_on_drop_3_t_fset[BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = { - bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set, - bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set, - bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set, - bcmpkt_psamp_mirror_on_drop_3_t_smod_state_set, - bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set, - bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set, - bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56690_a0_cna_6_5_34_2_0_psamp_mirror_on_drop_3_t_field_data[] = { - BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56690_a0_cna_6_5_34_2_0_psamp_mirror_on_drop_3_t_field_info = { - .num_fields = BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT, - .info = bcm56690_a0_cna_6_5_34_2_0_psamp_mirror_on_drop_3_t_field_data, -}; - - -static int32_t bcmpkt_rarp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 24, 8); - - return ret; -} - -static int32_t bcmpkt_rarp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_rarp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_rarp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_rarp_t_operation_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 16); - - return ret; -} - -static int32_t bcmpkt_rarp_t_operation_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_rarp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 8); - - return ret; -} - -static int32_t bcmpkt_rarp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_rarp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_rarp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_rarp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_rarp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_rarp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_rarp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_rarp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_rarp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_rarp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_rarp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56690_a0_cna_6_5_34_2_0_rarp_t_fget[BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_FID_COUNT] = { - bcmpkt_rarp_t_hardware_len_get, - bcmpkt_rarp_t_hardware_type_get, - bcmpkt_rarp_t_operation_get, - bcmpkt_rarp_t_prot_addr_len_get, - bcmpkt_rarp_t_protocol_type_get, - bcmpkt_rarp_t_sender_ha_get, - bcmpkt_rarp_t_sender_ip_get, - bcmpkt_rarp_t_target_ha_get, - bcmpkt_rarp_t_target_ip_get, -}; - -bcmpkt_flex_field_set_f bcm56690_a0_cna_6_5_34_2_0_rarp_t_fset[BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_FID_COUNT] = { - bcmpkt_rarp_t_hardware_len_set, - bcmpkt_rarp_t_hardware_type_set, - bcmpkt_rarp_t_operation_set, - bcmpkt_rarp_t_prot_addr_len_set, - bcmpkt_rarp_t_protocol_type_set, - bcmpkt_rarp_t_sender_ha_set, - bcmpkt_rarp_t_sender_ip_set, - bcmpkt_rarp_t_target_ha_set, - bcmpkt_rarp_t_target_ip_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56690_a0_cna_6_5_34_2_0_rarp_t_field_data[] = { - BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56690_a0_cna_6_5_34_2_0_rarp_t_field_info = { - .num_fields = BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_FID_COUNT, - .info = bcm56690_a0_cna_6_5_34_2_0_rarp_t_field_data, -}; - - -static int32_t bcmpkt_sflow_shim_0_t_sys_destination_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 16); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_0_t_sys_destination_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_sflow_shim_0_t_sys_source_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 16); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_0_t_sys_source_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_sflow_shim_0_t_version_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_sflow_shim_0_t_version_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56690_a0_cna_6_5_34_2_0_sflow_shim_0_t_fget[BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { - bcmpkt_sflow_shim_0_t_sys_destination_get, - bcmpkt_sflow_shim_0_t_sys_source_get, - bcmpkt_sflow_shim_0_t_version_get, -}; - -bcmpkt_flex_field_set_f bcm56690_a0_cna_6_5_34_2_0_sflow_shim_0_t_fset[BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { - bcmpkt_sflow_shim_0_t_sys_destination_set, - bcmpkt_sflow_shim_0_t_sys_source_set, - bcmpkt_sflow_shim_0_t_version_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56690_a0_cna_6_5_34_2_0_sflow_shim_0_t_field_data[] = { - BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56690_a0_cna_6_5_34_2_0_sflow_shim_0_t_field_info = { - .num_fields = BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT, - .info = bcm56690_a0_cna_6_5_34_2_0_sflow_shim_0_t_field_data, -}; - - -static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 30, 1); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 30, 1, val); - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 27, 1); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 27, 1, val); - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 29, 1); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 29, 1, val); - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 28, 1); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 28, 1, val); - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 31, 1); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 31, 1, val); - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 26, 1); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 26, 1, val); - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 7); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_reserved_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 7, val); - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 23, 3); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 23, 3, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56690_a0_cna_6_5_34_2_0_sflow_shim_1_t_fget[BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { - bcmpkt_sflow_shim_1_t_flag_dest_sample_get, - bcmpkt_sflow_shim_1_t_flag_discarded_get, - bcmpkt_sflow_shim_1_t_flag_flex_sample_get, - bcmpkt_sflow_shim_1_t_flag_mcast_get, - bcmpkt_sflow_shim_1_t_flag_src_sample_get, - bcmpkt_sflow_shim_1_t_flag_truncated_get, - bcmpkt_sflow_shim_1_t_reserved_get, - bcmpkt_sflow_shim_1_t_sys_opcode_get, -}; - -bcmpkt_flex_field_set_f bcm56690_a0_cna_6_5_34_2_0_sflow_shim_1_t_fset[BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { - bcmpkt_sflow_shim_1_t_flag_dest_sample_set, - bcmpkt_sflow_shim_1_t_flag_discarded_set, - bcmpkt_sflow_shim_1_t_flag_flex_sample_set, - bcmpkt_sflow_shim_1_t_flag_mcast_set, - bcmpkt_sflow_shim_1_t_flag_src_sample_set, - bcmpkt_sflow_shim_1_t_flag_truncated_set, - bcmpkt_sflow_shim_1_t_reserved_set, - bcmpkt_sflow_shim_1_t_sys_opcode_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56690_a0_cna_6_5_34_2_0_sflow_shim_1_t_field_data[] = { - BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56690_a0_cna_6_5_34_2_0_sflow_shim_1_t_field_info = { - .num_fields = BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT, - .info = bcm56690_a0_cna_6_5_34_2_0_sflow_shim_1_t_field_data, -}; - - -static int32_t bcmpkt_sflow_shim_2_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_sflow_shim_2_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56690_a0_cna_6_5_34_2_0_sflow_shim_2_t_fget[BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { - bcmpkt_sflow_shim_2_t_sequence_num_get, - bcmpkt_sflow_shim_2_t_user_meta_data_get, -}; - -bcmpkt_flex_field_set_f bcm56690_a0_cna_6_5_34_2_0_sflow_shim_2_t_fset[BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { - bcmpkt_sflow_shim_2_t_sequence_num_set, - bcmpkt_sflow_shim_2_t_user_meta_data_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56690_a0_cna_6_5_34_2_0_sflow_shim_2_t_field_data[] = { - BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56690_a0_cna_6_5_34_2_0_sflow_shim_2_t_field_info = { - .num_fields = BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT, - .info = bcm56690_a0_cna_6_5_34_2_0_sflow_shim_2_t_field_data, -}; - - -static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_tcp_first_4bytes_t_src_port_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_tcp_first_4bytes_t_src_port_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56690_a0_cna_6_5_34_2_0_tcp_first_4bytes_t_fget[BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { - bcmpkt_tcp_first_4bytes_t_dst_port_get, - bcmpkt_tcp_first_4bytes_t_src_port_get, -}; - -bcmpkt_flex_field_set_f bcm56690_a0_cna_6_5_34_2_0_tcp_first_4bytes_t_fset[BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { - bcmpkt_tcp_first_4bytes_t_dst_port_set, - bcmpkt_tcp_first_4bytes_t_src_port_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56690_a0_cna_6_5_34_2_0_tcp_first_4bytes_t_field_data[] = { - BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56690_a0_cna_6_5_34_2_0_tcp_first_4bytes_t_field_info = { - .num_fields = BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT, - .info = bcm56690_a0_cna_6_5_34_2_0_tcp_first_4bytes_t_field_data, -}; - - -static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[3], 16, 16); - - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_checksum_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[3], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 16, 16); - - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[3], 0, 16); - - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[3], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_win_size_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 0, 16); - - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_win_size_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 0, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56690_a0_cna_6_5_34_2_0_tcp_last_16bytes_t_fget[BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { - bcmpkt_tcp_last_16bytes_t_ack_num_get, - bcmpkt_tcp_last_16bytes_t_checksum_get, - bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get, - bcmpkt_tcp_last_16bytes_t_seq_num_get, - bcmpkt_tcp_last_16bytes_t_urgent_ptr_get, - bcmpkt_tcp_last_16bytes_t_win_size_get, -}; - -bcmpkt_flex_field_set_f bcm56690_a0_cna_6_5_34_2_0_tcp_last_16bytes_t_fset[BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { - bcmpkt_tcp_last_16bytes_t_ack_num_set, - bcmpkt_tcp_last_16bytes_t_checksum_set, - bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set, - bcmpkt_tcp_last_16bytes_t_seq_num_set, - bcmpkt_tcp_last_16bytes_t_urgent_ptr_set, - bcmpkt_tcp_last_16bytes_t_win_size_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56690_a0_cna_6_5_34_2_0_tcp_last_16bytes_t_field_data[] = { - BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56690_a0_cna_6_5_34_2_0_tcp_last_16bytes_t_field_info = { - .num_fields = BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT, - .info = bcm56690_a0_cna_6_5_34_2_0_tcp_last_16bytes_t_field_data, -}; - - -static int32_t bcmpkt_udp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 16); - - return ret; -} - -static int32_t bcmpkt_udp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_udp_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_udp_t_dst_port_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_udp_t_src_port_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_udp_t_src_port_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_udp_t_udp_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 16); - - return ret; -} - -static int32_t bcmpkt_udp_t_udp_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56690_a0_cna_6_5_34_2_0_udp_t_fget[BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_UDP_T_FID_COUNT] = { - bcmpkt_udp_t_checksum_get, - bcmpkt_udp_t_dst_port_get, - bcmpkt_udp_t_src_port_get, - bcmpkt_udp_t_udp_length_get, -}; - -bcmpkt_flex_field_set_f bcm56690_a0_cna_6_5_34_2_0_udp_t_fset[BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_UDP_T_FID_COUNT] = { - bcmpkt_udp_t_checksum_set, - bcmpkt_udp_t_dst_port_set, - bcmpkt_udp_t_src_port_set, - bcmpkt_udp_t_udp_length_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56690_a0_cna_6_5_34_2_0_udp_t_field_data[] = { - BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56690_a0_cna_6_5_34_2_0_udp_t_field_info = { - .num_fields = BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_UDP_T_FID_COUNT, - .info = bcm56690_a0_cna_6_5_34_2_0_udp_t_field_data, -}; - - -static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56690_a0_cna_6_5_34_2_0_unknown_l3_t_fget[BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { - bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get, - bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get, -}; - -bcmpkt_flex_field_set_f bcm56690_a0_cna_6_5_34_2_0_unknown_l3_t_fset[BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { - bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set, - bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56690_a0_cna_6_5_34_2_0_unknown_l3_t_field_data[] = { - BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56690_a0_cna_6_5_34_2_0_unknown_l3_t_field_info = { - .num_fields = BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT, - .info = bcm56690_a0_cna_6_5_34_2_0_unknown_l3_t_field_data, -}; - - -static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56690_a0_cna_6_5_34_2_0_unknown_l4_t_fget[BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { - bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get, -}; - -bcmpkt_flex_field_set_f bcm56690_a0_cna_6_5_34_2_0_unknown_l4_t_fset[BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { - bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56690_a0_cna_6_5_34_2_0_unknown_l4_t_field_data[] = { - BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56690_a0_cna_6_5_34_2_0_unknown_l4_t_field_info = { - .num_fields = BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT, - .info = bcm56690_a0_cna_6_5_34_2_0_unknown_l4_t_field_data, -}; - - -static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56690_a0_cna_6_5_34_2_0_unknown_l5_t_fget[BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { - bcmpkt_unknown_l5_t_l5_bytes_0_1_get, - bcmpkt_unknown_l5_t_l5_bytes_2_3_get, - bcmpkt_unknown_l5_t_l5_bytes_4_7_get, -}; - -bcmpkt_flex_field_set_f bcm56690_a0_cna_6_5_34_2_0_unknown_l5_t_fset[BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { - bcmpkt_unknown_l5_t_l5_bytes_0_1_set, - bcmpkt_unknown_l5_t_l5_bytes_2_3_set, - bcmpkt_unknown_l5_t_l5_bytes_4_7_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56690_a0_cna_6_5_34_2_0_unknown_l5_t_field_data[] = { - BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56690_a0_cna_6_5_34_2_0_unknown_l5_t_field_info = { - .num_fields = BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT, - .info = bcm56690_a0_cna_6_5_34_2_0_unknown_l5_t_field_data, -}; - - -static int32_t bcmpkt_vlan_t_cfi_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 12, 1); - - return ret; -} - -static int32_t bcmpkt_vlan_t_cfi_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 12, 1, val); - return ret; -} - -static int32_t bcmpkt_vlan_t_pcp_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 13, 3); - - return ret; -} - -static int32_t bcmpkt_vlan_t_pcp_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 13, 3, val); - return ret; -} - -static int32_t bcmpkt_vlan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_vlan_t_tpid_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_vlan_t_vid_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 12); - - return ret; -} - -static int32_t bcmpkt_vlan_t_vid_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 12, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56690_a0_cna_6_5_34_2_0_vlan_t_fget[BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_VLAN_T_FID_COUNT] = { - bcmpkt_vlan_t_cfi_get, - bcmpkt_vlan_t_pcp_get, - bcmpkt_vlan_t_tpid_get, - bcmpkt_vlan_t_vid_get, -}; - -bcmpkt_flex_field_set_f bcm56690_a0_cna_6_5_34_2_0_vlan_t_fset[BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_VLAN_T_FID_COUNT] = { - bcmpkt_vlan_t_cfi_set, - bcmpkt_vlan_t_pcp_set, - bcmpkt_vlan_t_tpid_set, - bcmpkt_vlan_t_vid_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56690_a0_cna_6_5_34_2_0_vlan_t_field_data[] = { - BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56690_a0_cna_6_5_34_2_0_vlan_t_field_info = { - .num_fields = BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_VLAN_T_FID_COUNT, - .info = bcm56690_a0_cna_6_5_34_2_0_vlan_t_field_data, -}; - - -static int32_t bcmpkt_vxlan_t_flags_reserved_1_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_vxlan_t_flags_reserved_1_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_vxlan_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 8); - - return ret; -} - -static int32_t bcmpkt_vxlan_t_reserved2_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 8, val); - return ret; -} - -static int32_t bcmpkt_vxlan_t_vn_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 8, 24); - - return ret; -} - -static int32_t bcmpkt_vxlan_t_vn_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 8, 24, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56690_a0_cna_6_5_34_2_0_vxlan_t_fget[BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_VXLAN_T_FID_COUNT] = { - bcmpkt_vxlan_t_flags_reserved_1_get, - bcmpkt_vxlan_t_reserved2_get, - bcmpkt_vxlan_t_vn_id_get, -}; - -bcmpkt_flex_field_set_f bcm56690_a0_cna_6_5_34_2_0_vxlan_t_fset[BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_VXLAN_T_FID_COUNT] = { - bcmpkt_vxlan_t_flags_reserved_1_set, - bcmpkt_vxlan_t_reserved2_set, - bcmpkt_vxlan_t_vn_id_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56690_a0_cna_6_5_34_2_0_vxlan_t_field_data[] = { - BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56690_a0_cna_6_5_34_2_0_vxlan_t_field_info = { - .num_fields = BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_VXLAN_T_FID_COUNT, - .info = bcm56690_a0_cna_6_5_34_2_0_vxlan_t_field_data, -}; - -static bcmpkt_flex_pmd_info_t bcm56690_a0_cna_6_5_34_2_0_flexhdr_info_list[BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_FLEXHDR_COUNT] = { - { - .is_supported = TRUE, - .field_info = &bcm56690_a0_cna_6_5_34_2_0_arp_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56690_a0_cna_6_5_34_2_0_arp_t_fget, - .flex_fset = bcm56690_a0_cna_6_5_34_2_0_arp_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56690_a0_cna_6_5_34_2_0_cpu_composites_0_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56690_a0_cna_6_5_34_2_0_cpu_composites_0_t_fget, - .flex_fset = bcm56690_a0_cna_6_5_34_2_0_cpu_composites_0_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56690_a0_cna_6_5_34_2_0_cpu_composites_1_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56690_a0_cna_6_5_34_2_0_cpu_composites_1_t_fget, - .flex_fset = bcm56690_a0_cna_6_5_34_2_0_cpu_composites_1_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56690_a0_cna_6_5_34_2_0_ep_nih_header_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56690_a0_cna_6_5_34_2_0_ep_nih_header_t_fget, - .flex_fset = bcm56690_a0_cna_6_5_34_2_0_ep_nih_header_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56690_a0_cna_6_5_34_2_0_erspan3_fixed_hdr_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56690_a0_cna_6_5_34_2_0_erspan3_fixed_hdr_t_fget, - .flex_fset = bcm56690_a0_cna_6_5_34_2_0_erspan3_fixed_hdr_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56690_a0_cna_6_5_34_2_0_erspan3_subhdr_5_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56690_a0_cna_6_5_34_2_0_erspan3_subhdr_5_t_fget, - .flex_fset = bcm56690_a0_cna_6_5_34_2_0_erspan3_subhdr_5_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56690_a0_cna_6_5_34_2_0_ethertype_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56690_a0_cna_6_5_34_2_0_ethertype_t_fget, - .flex_fset = bcm56690_a0_cna_6_5_34_2_0_ethertype_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56690_a0_cna_6_5_34_2_0_generic_loopback_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56690_a0_cna_6_5_34_2_0_generic_loopback_t_fget, - .flex_fset = bcm56690_a0_cna_6_5_34_2_0_generic_loopback_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56690_a0_cna_6_5_34_2_0_icmp_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56690_a0_cna_6_5_34_2_0_icmp_t_fget, - .flex_fset = bcm56690_a0_cna_6_5_34_2_0_icmp_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56690_a0_cna_6_5_34_2_0_ifa_header_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56690_a0_cna_6_5_34_2_0_ifa_header_t_fget, - .flex_fset = bcm56690_a0_cna_6_5_34_2_0_ifa_header_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56690_a0_cna_6_5_34_2_0_ifa_metadata_a_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56690_a0_cna_6_5_34_2_0_ifa_metadata_a_t_fget, - .flex_fset = bcm56690_a0_cna_6_5_34_2_0_ifa_metadata_a_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56690_a0_cna_6_5_34_2_0_ifa_metadata_b_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56690_a0_cna_6_5_34_2_0_ifa_metadata_b_t_fget, - .flex_fset = bcm56690_a0_cna_6_5_34_2_0_ifa_metadata_b_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56690_a0_cna_6_5_34_2_0_ifa_metadata_base_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56690_a0_cna_6_5_34_2_0_ifa_metadata_base_t_fget, - .flex_fset = bcm56690_a0_cna_6_5_34_2_0_ifa_metadata_base_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56690_a0_cna_6_5_34_2_0_ipfix_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56690_a0_cna_6_5_34_2_0_ipfix_t_fget, - .flex_fset = bcm56690_a0_cna_6_5_34_2_0_ipfix_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56690_a0_cna_6_5_34_2_0_ipv4_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56690_a0_cna_6_5_34_2_0_ipv4_t_fget, - .flex_fset = bcm56690_a0_cna_6_5_34_2_0_ipv4_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56690_a0_cna_6_5_34_2_0_ipv6_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56690_a0_cna_6_5_34_2_0_ipv6_t_fget, - .flex_fset = bcm56690_a0_cna_6_5_34_2_0_ipv6_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56690_a0_cna_6_5_34_2_0_l2_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56690_a0_cna_6_5_34_2_0_l2_t_fget, - .flex_fset = bcm56690_a0_cna_6_5_34_2_0_l2_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56690_a0_cna_6_5_34_2_0_mirror_erspan_sn_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56690_a0_cna_6_5_34_2_0_mirror_erspan_sn_t_fget, - .flex_fset = bcm56690_a0_cna_6_5_34_2_0_mirror_erspan_sn_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56690_a0_cna_6_5_34_2_0_mirror_transport_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56690_a0_cna_6_5_34_2_0_mirror_transport_t_fget, - .flex_fset = bcm56690_a0_cna_6_5_34_2_0_mirror_transport_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56690_a0_cna_6_5_34_2_0_psamp_mirror_on_drop_0_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56690_a0_cna_6_5_34_2_0_psamp_mirror_on_drop_0_t_fget, - .flex_fset = bcm56690_a0_cna_6_5_34_2_0_psamp_mirror_on_drop_0_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56690_a0_cna_6_5_34_2_0_psamp_mirror_on_drop_3_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56690_a0_cna_6_5_34_2_0_psamp_mirror_on_drop_3_t_fget, - .flex_fset = bcm56690_a0_cna_6_5_34_2_0_psamp_mirror_on_drop_3_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56690_a0_cna_6_5_34_2_0_rarp_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56690_a0_cna_6_5_34_2_0_rarp_t_fget, - .flex_fset = bcm56690_a0_cna_6_5_34_2_0_rarp_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56690_a0_cna_6_5_34_2_0_sflow_shim_0_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56690_a0_cna_6_5_34_2_0_sflow_shim_0_t_fget, - .flex_fset = bcm56690_a0_cna_6_5_34_2_0_sflow_shim_0_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56690_a0_cna_6_5_34_2_0_sflow_shim_1_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56690_a0_cna_6_5_34_2_0_sflow_shim_1_t_fget, - .flex_fset = bcm56690_a0_cna_6_5_34_2_0_sflow_shim_1_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56690_a0_cna_6_5_34_2_0_sflow_shim_2_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56690_a0_cna_6_5_34_2_0_sflow_shim_2_t_fget, - .flex_fset = bcm56690_a0_cna_6_5_34_2_0_sflow_shim_2_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56690_a0_cna_6_5_34_2_0_tcp_first_4bytes_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56690_a0_cna_6_5_34_2_0_tcp_first_4bytes_t_fget, - .flex_fset = bcm56690_a0_cna_6_5_34_2_0_tcp_first_4bytes_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56690_a0_cna_6_5_34_2_0_tcp_last_16bytes_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56690_a0_cna_6_5_34_2_0_tcp_last_16bytes_t_fget, - .flex_fset = bcm56690_a0_cna_6_5_34_2_0_tcp_last_16bytes_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56690_a0_cna_6_5_34_2_0_udp_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56690_a0_cna_6_5_34_2_0_udp_t_fget, - .flex_fset = bcm56690_a0_cna_6_5_34_2_0_udp_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56690_a0_cna_6_5_34_2_0_unknown_l3_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56690_a0_cna_6_5_34_2_0_unknown_l3_t_fget, - .flex_fset = bcm56690_a0_cna_6_5_34_2_0_unknown_l3_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56690_a0_cna_6_5_34_2_0_unknown_l4_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56690_a0_cna_6_5_34_2_0_unknown_l4_t_fget, - .flex_fset = bcm56690_a0_cna_6_5_34_2_0_unknown_l4_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56690_a0_cna_6_5_34_2_0_unknown_l5_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56690_a0_cna_6_5_34_2_0_unknown_l5_t_fget, - .flex_fset = bcm56690_a0_cna_6_5_34_2_0_unknown_l5_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56690_a0_cna_6_5_34_2_0_vlan_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56690_a0_cna_6_5_34_2_0_vlan_t_fget, - .flex_fset = bcm56690_a0_cna_6_5_34_2_0_vlan_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56690_a0_cna_6_5_34_2_0_vxlan_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56690_a0_cna_6_5_34_2_0_vxlan_t_fget, - .flex_fset = bcm56690_a0_cna_6_5_34_2_0_vxlan_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56690_a0_cna_6_5_34_2_0_rxpmd_flex_field_info, - .reasons_info = &bcm56690_a0_cna_6_5_34_2_0_rxpmd_flex_reasons_info, - .flex_common_fget = bcm56690_a0_rxpmd_flex_fget, - .flex_common_fset = bcm56690_a0_rxpmd_flex_fset, - }, -}; - -static shr_enum_map_t bcm56690_a0_cna_6_5_34_2_0_flexhdr_id_map[] = { - BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_FLEXHDR_NAME_MAP_INIT -}; - -shr_enum_map_t * bcm56690_a0_cna_6_5_34_2_0_flexhdr_map_get(void) -{ - return bcm56690_a0_cna_6_5_34_2_0_flexhdr_id_map; -} - -bcmpkt_flex_pmd_info_t * bcm56690_a0_cna_6_5_34_2_0_flex_pmd_info_get(uint32_t hid) -{ - if (hid >= BCM56690_A0_CNA_6_5_34_2_0_BCMPKT_FLEXHDR_COUNT) { - return NULL; - } - - return &bcm56690_a0_cna_6_5_34_2_0_flexhdr_info_list[hid]; -} - -int bcm56690_a0_cna_6_5_34_2_0_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = { - 7, - -1, - -1, - 33, -}; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/cna_6_5_34_2_0/bcm56780_a0_cna_6_5_34_2_0_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/cna_6_5_34_2_0/bcm56780_a0_cna_6_5_34_2_0_bcmpkt_rxpmd_match_id.c deleted file mode 100644 index d5338b3df9a..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/cna_6_5_34_2_0/bcm56780_a0_cna_6_5_34_2_0_bcmpkt_rxpmd_match_id.c +++ /dev/null @@ -1,1289 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) bcm56780_a0_cna_6_5_34_2_0_sf_match_id_info.yml - * for device bcm56780_a0 and variant cna_6_5_34_2_0. - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - - -#include -#include - - -static bcmpkt_rxpmd_match_id_db_t -bcm56780_a0_cna_6_5_34_2_0_rxpmd_match_id_db[BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_COUNT] = { - { - /* BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */ - .name = "EGRESS_PKT_FWD_L2_HDR_ITAG", - .match = 0x2, - .match_mask = 0x2, - .match_maxbit = 18, - .match_minbit = 15, - .maxbit = 1, - .minbit = 1, - .value = 0x1, - .pmaxbit = 38, - .pminbit = 35, - - }, - { - /* BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */ - .name = "EGRESS_PKT_FWD_L2_HDR_L2", - .match = 0x1, - .match_mask = 0x1, - .match_maxbit = 18, - .match_minbit = 15, - .maxbit = 0, - .minbit = 0, - .value = 0x1, - .pmaxbit = 38, - .pminbit = 35, - - }, - { - /* BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */ - .name = "EGRESS_PKT_FWD_L2_HDR_NONE", - .match = 0x0, - .match_mask = 0xf, - .match_maxbit = 18, - .match_minbit = 15, - .maxbit = 3, - .minbit = 0, - .value = 0x0, - .pmaxbit = 38, - .pminbit = 35, - - }, - { - /* BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */ - .name = "EGRESS_PKT_FWD_L2_HDR_OTAG", - .match = 0x8, - .match_mask = 0x8, - .match_maxbit = 18, - .match_minbit = 15, - .maxbit = 3, - .minbit = 3, - .value = 0x1, - .pmaxbit = 38, - .pminbit = 35, - - }, - { - /* BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG */ - .name = "EGRESS_PKT_FWD_L2_HDR_SVTAG", - .match = 0x4, - .match_mask = 0x4, - .match_maxbit = 18, - .match_minbit = 15, - .maxbit = 2, - .minbit = 2, - .value = 0x1, - .pmaxbit = 38, - .pminbit = 35, - - }, - { - /* BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_ARP", - .match = 0x80, - .match_mask = 0x18e, - .match_maxbit = 27, - .match_minbit = 19, - .maxbit = 8, - .minbit = 7, - .value = 0x1, - .pmaxbit = 57, - .pminbit = 49, - - }, - { - /* BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", - .match = 0x1, - .match_mask = 0x1, - .match_maxbit = 27, - .match_minbit = 19, - .maxbit = 0, - .minbit = 0, - .value = 0x1, - .pmaxbit = 57, - .pminbit = 49, - - }, - { - /* BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_ICMP", - .match = 0x100, - .match_mask = 0x186, - .match_maxbit = 27, - .match_minbit = 19, - .maxbit = 8, - .minbit = 7, - .value = 0x2, - .pmaxbit = 57, - .pminbit = 49, - - }, - { - /* BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER", - .match = 0x8, - .match_mask = 0x8, - .match_maxbit = 27, - .match_minbit = 19, - .maxbit = 3, - .minbit = 3, - .value = 0x1, - .pmaxbit = 57, - .pminbit = 49, - - }, - { - /* BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA", - .match = 0x88, - .match_mask = 0x188, - .match_maxbit = 27, - .match_minbit = 19, - .maxbit = 8, - .minbit = 7, - .value = 0x1, - .pmaxbit = 57, - .pminbit = 49, - - }, - { - /* BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV4", - .match = 0x20, - .match_mask = 0x60, - .match_maxbit = 27, - .match_minbit = 19, - .maxbit = 6, - .minbit = 5, - .value = 0x1, - .pmaxbit = 57, - .pminbit = 49, - - }, - { - /* BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV6", - .match = 0x40, - .match_mask = 0x60, - .match_maxbit = 27, - .match_minbit = 19, - .maxbit = 6, - .minbit = 5, - .value = 0x2, - .pmaxbit = 57, - .pminbit = 49, - - }, - { - /* BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_NONE", - .match = 0x0, - .match_mask = 0x1ff, - .match_maxbit = 27, - .match_minbit = 19, - .maxbit = 8, - .minbit = 0, - .value = 0x0, - .pmaxbit = 57, - .pminbit = 49, - - }, - { - /* BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_RARP", - .match = 0x2, - .match_mask = 0x6, - .match_maxbit = 27, - .match_minbit = 19, - .maxbit = 2, - .minbit = 1, - .value = 0x1, - .pmaxbit = 57, - .pminbit = 49, - - }, - { - /* BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", - .match = 0x4, - .match_mask = 0x6, - .match_maxbit = 27, - .match_minbit = 19, - .maxbit = 2, - .minbit = 1, - .value = 0x2, - .pmaxbit = 57, - .pminbit = 49, - - }, - { - /* BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", - .match = 0x10, - .match_mask = 0x10, - .match_maxbit = 27, - .match_minbit = 19, - .maxbit = 4, - .minbit = 4, - .value = 0x1, - .pmaxbit = 57, - .pminbit = 49, - - }, - { - /* BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_UDP", - .match = 0x6, - .match_mask = 0x6, - .match_maxbit = 27, - .match_minbit = 19, - .maxbit = 2, - .minbit = 1, - .value = 0x3, - .pmaxbit = 57, - .pminbit = 49, - - }, - { - /* BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", - .match = 0x60, - .match_mask = 0x60, - .match_maxbit = 27, - .match_minbit = 19, - .maxbit = 6, - .minbit = 5, - .value = 0x3, - .pmaxbit = 57, - .pminbit = 49, - - }, - { - /* BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", - .match = 0x180, - .match_mask = 0x180, - .match_maxbit = 27, - .match_minbit = 19, - .maxbit = 8, - .minbit = 7, - .value = 0x3, - .pmaxbit = 57, - .pminbit = 49, - - }, - { - /* BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", - .match = 0x106, - .match_mask = 0x186, - .match_maxbit = 27, - .match_minbit = 19, - .maxbit = 8, - .minbit = 7, - .value = 0x2, - .pmaxbit = 57, - .pminbit = 49, - - }, - { - /* BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", - .match = 0x86, - .match_mask = 0x18e, - .match_maxbit = 27, - .match_minbit = 19, - .maxbit = 8, - .minbit = 7, - .value = 0x1, - .pmaxbit = 57, - .pminbit = 49, - - }, - { - /* BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH */ - .name = "EGRESS_PKT_SYS_HDR_EP_NIH", - .match = 0x2, - .match_mask = 0x3, - .match_maxbit = 1, - .match_minbit = 0, - .maxbit = 1, - .minbit = 0, - .value = 0x2, - .pmaxbit = 1, - .pminbit = 0, - - }, - { - /* BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */ - .name = "EGRESS_PKT_SYS_HDR_LOOPBACK", - .match = 0x1, - .match_mask = 0x3, - .match_maxbit = 1, - .match_minbit = 0, - .maxbit = 1, - .minbit = 0, - .value = 0x1, - .pmaxbit = 1, - .pminbit = 0, - - }, - { - /* BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */ - .name = "EGRESS_PKT_SYS_HDR_NONE", - .match = 0x0, - .match_mask = 0x3, - .match_maxbit = 1, - .match_minbit = 0, - .maxbit = 1, - .minbit = 0, - .value = 0x0, - .pmaxbit = 1, - .pminbit = 0, - - }, - { - /* BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */ - .name = "EGRESS_PKT_TUNNEL_L2_HDR_ITAG", - .match = 0x2, - .match_mask = 0x2, - .match_maxbit = 5, - .match_minbit = 2, - .maxbit = 1, - .minbit = 1, - .value = 0x1, - .pmaxbit = 10, - .pminbit = 7, - - }, - { - /* BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */ - .name = "EGRESS_PKT_TUNNEL_L2_HDR_L2", - .match = 0x1, - .match_mask = 0x1, - .match_maxbit = 5, - .match_minbit = 2, - .maxbit = 0, - .minbit = 0, - .value = 0x1, - .pmaxbit = 10, - .pminbit = 7, - - }, - { - /* BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */ - .name = "EGRESS_PKT_TUNNEL_L2_HDR_NONE", - .match = 0x0, - .match_mask = 0xf, - .match_maxbit = 5, - .match_minbit = 2, - .maxbit = 3, - .minbit = 0, - .value = 0x0, - .pmaxbit = 10, - .pminbit = 7, - - }, - { - /* BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */ - .name = "EGRESS_PKT_TUNNEL_L2_HDR_OTAG", - .match = 0x8, - .match_mask = 0x8, - .match_maxbit = 5, - .match_minbit = 2, - .maxbit = 3, - .minbit = 3, - .value = 0x1, - .pmaxbit = 10, - .pminbit = 7, - - }, - { - /* BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG */ - .name = "EGRESS_PKT_TUNNEL_L2_HDR_SVTAG", - .match = 0x4, - .match_mask = 0x4, - .match_maxbit = 5, - .match_minbit = 2, - .maxbit = 2, - .minbit = 2, - .value = 0x1, - .pmaxbit = 10, - .pminbit = 7, - - }, - { - /* BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", - .match = 0x80, - .match_mask = 0x18e, - .match_maxbit = 14, - .match_minbit = 6, - .maxbit = 8, - .minbit = 7, - .value = 0x1, - .pmaxbit = 29, - .pminbit = 21, - - }, - { - /* BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", - .match = 0x1, - .match_mask = 0x1, - .match_maxbit = 14, - .match_minbit = 6, - .maxbit = 0, - .minbit = 0, - .value = 0x1, - .pmaxbit = 29, - .pminbit = 21, - - }, - { - /* BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", - .match = 0x100, - .match_mask = 0x186, - .match_maxbit = 14, - .match_minbit = 6, - .maxbit = 8, - .minbit = 7, - .value = 0x2, - .pmaxbit = 29, - .pminbit = 21, - - }, - { - /* BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER", - .match = 0x8, - .match_mask = 0x8, - .match_maxbit = 14, - .match_minbit = 6, - .maxbit = 3, - .minbit = 3, - .value = 0x1, - .pmaxbit = 29, - .pminbit = 21, - - }, - { - /* BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA", - .match = 0x88, - .match_mask = 0x188, - .match_maxbit = 14, - .match_minbit = 6, - .maxbit = 8, - .minbit = 7, - .value = 0x1, - .pmaxbit = 29, - .pminbit = 21, - - }, - { - /* BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", - .match = 0x20, - .match_mask = 0x60, - .match_maxbit = 14, - .match_minbit = 6, - .maxbit = 6, - .minbit = 5, - .value = 0x1, - .pmaxbit = 29, - .pminbit = 21, - - }, - { - /* BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", - .match = 0x40, - .match_mask = 0x60, - .match_maxbit = 14, - .match_minbit = 6, - .maxbit = 6, - .minbit = 5, - .value = 0x2, - .pmaxbit = 29, - .pminbit = 21, - - }, - { - /* BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", - .match = 0x0, - .match_mask = 0x1ff, - .match_maxbit = 14, - .match_minbit = 6, - .maxbit = 8, - .minbit = 0, - .value = 0x0, - .pmaxbit = 29, - .pminbit = 21, - - }, - { - /* BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", - .match = 0x2, - .match_mask = 0x6, - .match_maxbit = 14, - .match_minbit = 6, - .maxbit = 2, - .minbit = 1, - .value = 0x1, - .pmaxbit = 29, - .pminbit = 21, - - }, - { - /* BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", - .match = 0x4, - .match_mask = 0x6, - .match_maxbit = 14, - .match_minbit = 6, - .maxbit = 2, - .minbit = 1, - .value = 0x2, - .pmaxbit = 29, - .pminbit = 21, - - }, - { - /* BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", - .match = 0x10, - .match_mask = 0x10, - .match_maxbit = 14, - .match_minbit = 6, - .maxbit = 4, - .minbit = 4, - .value = 0x1, - .pmaxbit = 29, - .pminbit = 21, - - }, - { - /* BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", - .match = 0x6, - .match_mask = 0x6, - .match_maxbit = 14, - .match_minbit = 6, - .maxbit = 2, - .minbit = 1, - .value = 0x3, - .pmaxbit = 29, - .pminbit = 21, - - }, - { - /* BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", - .match = 0x60, - .match_mask = 0x60, - .match_maxbit = 14, - .match_minbit = 6, - .maxbit = 6, - .minbit = 5, - .value = 0x3, - .pmaxbit = 29, - .pminbit = 21, - - }, - { - /* BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", - .match = 0x180, - .match_mask = 0x180, - .match_maxbit = 14, - .match_minbit = 6, - .maxbit = 8, - .minbit = 7, - .value = 0x3, - .pmaxbit = 29, - .pminbit = 21, - - }, - { - /* BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", - .match = 0x106, - .match_mask = 0x186, - .match_maxbit = 14, - .match_minbit = 6, - .maxbit = 8, - .minbit = 7, - .value = 0x2, - .pmaxbit = 29, - .pminbit = 21, - - }, - { - /* BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", - .match = 0x86, - .match_mask = 0x18e, - .match_maxbit = 14, - .match_minbit = 6, - .maxbit = 8, - .minbit = 7, - .value = 0x1, - .pmaxbit = 29, - .pminbit = 21, - - }, - { - /* BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */ - .name = "INGRESS_PKT_INNER_L2_HDR_ITAG", - .match = 0x2, - .match_mask = 0x2, - .match_maxbit = 18, - .match_minbit = 15, - .maxbit = 1, - .minbit = 1, - .value = 0x1, - .pmaxbit = 18, - .pminbit = 15, - - }, - { - /* BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */ - .name = "INGRESS_PKT_INNER_L2_HDR_L2", - .match = 0x1, - .match_mask = 0x1, - .match_maxbit = 18, - .match_minbit = 15, - .maxbit = 0, - .minbit = 0, - .value = 0x1, - .pmaxbit = 18, - .pminbit = 15, - - }, - { - /* BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */ - .name = "INGRESS_PKT_INNER_L2_HDR_NONE", - .match = 0x0, - .match_mask = 0xf, - .match_maxbit = 18, - .match_minbit = 15, - .maxbit = 3, - .minbit = 0, - .value = 0x0, - .pmaxbit = 18, - .pminbit = 15, - - }, - { - /* BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */ - .name = "INGRESS_PKT_INNER_L2_HDR_OTAG", - .match = 0x8, - .match_mask = 0x8, - .match_maxbit = 18, - .match_minbit = 15, - .maxbit = 3, - .minbit = 3, - .value = 0x1, - .pmaxbit = 18, - .pminbit = 15, - - }, - { - /* BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_ARP", - .match = 0x80, - .match_mask = 0x18e, - .match_maxbit = 27, - .match_minbit = 19, - .maxbit = 8, - .minbit = 7, - .value = 0x1, - .pmaxbit = 27, - .pminbit = 19, - - }, - { - /* BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", - .match = 0x1, - .match_mask = 0x1, - .match_maxbit = 27, - .match_minbit = 19, - .maxbit = 0, - .minbit = 0, - .value = 0x1, - .pmaxbit = 27, - .pminbit = 19, - - }, - { - /* BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_ICMP", - .match = 0x100, - .match_mask = 0x186, - .match_maxbit = 27, - .match_minbit = 19, - .maxbit = 8, - .minbit = 7, - .value = 0x2, - .pmaxbit = 27, - .pminbit = 19, - - }, - { - /* BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER", - .match = 0x8, - .match_mask = 0x8, - .match_maxbit = 27, - .match_minbit = 19, - .maxbit = 3, - .minbit = 3, - .value = 0x1, - .pmaxbit = 27, - .pminbit = 19, - - }, - { - /* BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA", - .match = 0x88, - .match_mask = 0x188, - .match_maxbit = 27, - .match_minbit = 19, - .maxbit = 8, - .minbit = 7, - .value = 0x1, - .pmaxbit = 27, - .pminbit = 19, - - }, - { - /* BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV4", - .match = 0x20, - .match_mask = 0x60, - .match_maxbit = 27, - .match_minbit = 19, - .maxbit = 6, - .minbit = 5, - .value = 0x1, - .pmaxbit = 27, - .pminbit = 19, - - }, - { - /* BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV6", - .match = 0x40, - .match_mask = 0x60, - .match_maxbit = 27, - .match_minbit = 19, - .maxbit = 6, - .minbit = 5, - .value = 0x2, - .pmaxbit = 27, - .pminbit = 19, - - }, - { - /* BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_NONE", - .match = 0x0, - .match_mask = 0x1ff, - .match_maxbit = 27, - .match_minbit = 19, - .maxbit = 8, - .minbit = 0, - .value = 0x0, - .pmaxbit = 27, - .pminbit = 19, - - }, - { - /* BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_RARP", - .match = 0x2, - .match_mask = 0x6, - .match_maxbit = 27, - .match_minbit = 19, - .maxbit = 2, - .minbit = 1, - .value = 0x1, - .pmaxbit = 27, - .pminbit = 19, - - }, - { - /* BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", - .match = 0x4, - .match_mask = 0x6, - .match_maxbit = 27, - .match_minbit = 19, - .maxbit = 2, - .minbit = 1, - .value = 0x2, - .pmaxbit = 27, - .pminbit = 19, - - }, - { - /* BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", - .match = 0x10, - .match_mask = 0x10, - .match_maxbit = 27, - .match_minbit = 19, - .maxbit = 4, - .minbit = 4, - .value = 0x1, - .pmaxbit = 27, - .pminbit = 19, - - }, - { - /* BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_UDP", - .match = 0x6, - .match_mask = 0x6, - .match_maxbit = 27, - .match_minbit = 19, - .maxbit = 2, - .minbit = 1, - .value = 0x3, - .pmaxbit = 27, - .pminbit = 19, - - }, - { - /* BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", - .match = 0x60, - .match_mask = 0x60, - .match_maxbit = 27, - .match_minbit = 19, - .maxbit = 6, - .minbit = 5, - .value = 0x3, - .pmaxbit = 27, - .pminbit = 19, - - }, - { - /* BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", - .match = 0x180, - .match_mask = 0x180, - .match_maxbit = 27, - .match_minbit = 19, - .maxbit = 8, - .minbit = 7, - .value = 0x3, - .pmaxbit = 27, - .pminbit = 19, - - }, - { - /* BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", - .match = 0x106, - .match_mask = 0x186, - .match_maxbit = 27, - .match_minbit = 19, - .maxbit = 8, - .minbit = 7, - .value = 0x2, - .pmaxbit = 27, - .pminbit = 19, - - }, - { - /* BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */ - .name = "INGRESS_PKT_OUTER_L2_HDR_ITAG", - .match = 0x2, - .match_mask = 0x2, - .match_maxbit = 5, - .match_minbit = 2, - .maxbit = 1, - .minbit = 1, - .value = 0x1, - .pmaxbit = 5, - .pminbit = 2, - - }, - { - /* BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */ - .name = "INGRESS_PKT_OUTER_L2_HDR_L2", - .match = 0x1, - .match_mask = 0x1, - .match_maxbit = 5, - .match_minbit = 2, - .maxbit = 0, - .minbit = 0, - .value = 0x1, - .pmaxbit = 5, - .pminbit = 2, - - }, - { - /* BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */ - .name = "INGRESS_PKT_OUTER_L2_HDR_NONE", - .match = 0x0, - .match_mask = 0xf, - .match_maxbit = 5, - .match_minbit = 2, - .maxbit = 3, - .minbit = 0, - .value = 0x0, - .pmaxbit = 5, - .pminbit = 2, - - }, - { - /* BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */ - .name = "INGRESS_PKT_OUTER_L2_HDR_OTAG", - .match = 0x8, - .match_mask = 0x8, - .match_maxbit = 5, - .match_minbit = 2, - .maxbit = 3, - .minbit = 3, - .value = 0x1, - .pmaxbit = 5, - .pminbit = 2, - - }, - { - /* BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG */ - .name = "INGRESS_PKT_OUTER_L2_HDR_SVTAG", - .match = 0x4, - .match_mask = 0x4, - .match_maxbit = 5, - .match_minbit = 2, - .maxbit = 2, - .minbit = 2, - .value = 0x1, - .pmaxbit = 5, - .pminbit = 2, - - }, - { - /* BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ARP", - .match = 0x80, - .match_mask = 0x18e, - .match_maxbit = 14, - .match_minbit = 6, - .maxbit = 8, - .minbit = 7, - .value = 0x1, - .pmaxbit = 14, - .pminbit = 6, - - }, - { - /* BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", - .match = 0x1, - .match_mask = 0x1, - .match_maxbit = 14, - .match_minbit = 6, - .maxbit = 0, - .minbit = 0, - .value = 0x1, - .pmaxbit = 14, - .pminbit = 6, - - }, - { - /* BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", - .match = 0x100, - .match_mask = 0x186, - .match_maxbit = 14, - .match_minbit = 6, - .maxbit = 8, - .minbit = 7, - .value = 0x2, - .pmaxbit = 14, - .pminbit = 6, - - }, - { - /* BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER", - .match = 0x8, - .match_mask = 0x8, - .match_maxbit = 14, - .match_minbit = 6, - .maxbit = 3, - .minbit = 3, - .value = 0x1, - .pmaxbit = 14, - .pminbit = 6, - - }, - { - /* BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA", - .match = 0x88, - .match_mask = 0x188, - .match_maxbit = 14, - .match_minbit = 6, - .maxbit = 8, - .minbit = 7, - .value = 0x1, - .pmaxbit = 14, - .pminbit = 6, - - }, - { - /* BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", - .match = 0x20, - .match_mask = 0x60, - .match_maxbit = 14, - .match_minbit = 6, - .maxbit = 6, - .minbit = 5, - .value = 0x1, - .pmaxbit = 14, - .pminbit = 6, - - }, - { - /* BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", - .match = 0x40, - .match_mask = 0x60, - .match_maxbit = 14, - .match_minbit = 6, - .maxbit = 6, - .minbit = 5, - .value = 0x2, - .pmaxbit = 14, - .pminbit = 6, - - }, - { - /* BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_NONE", - .match = 0x0, - .match_mask = 0x1ff, - .match_maxbit = 14, - .match_minbit = 6, - .maxbit = 8, - .minbit = 0, - .value = 0x0, - .pmaxbit = 14, - .pminbit = 6, - - }, - { - /* BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_RARP", - .match = 0x2, - .match_mask = 0x6, - .match_maxbit = 14, - .match_minbit = 6, - .maxbit = 2, - .minbit = 1, - .value = 0x1, - .pmaxbit = 14, - .pminbit = 6, - - }, - { - /* BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", - .match = 0x4, - .match_mask = 0x6, - .match_maxbit = 14, - .match_minbit = 6, - .maxbit = 2, - .minbit = 1, - .value = 0x2, - .pmaxbit = 14, - .pminbit = 6, - - }, - { - /* BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", - .match = 0x10, - .match_mask = 0x10, - .match_maxbit = 14, - .match_minbit = 6, - .maxbit = 4, - .minbit = 4, - .value = 0x1, - .pmaxbit = 14, - .pminbit = 6, - - }, - { - /* BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UDP", - .match = 0x6, - .match_mask = 0x6, - .match_maxbit = 14, - .match_minbit = 6, - .maxbit = 2, - .minbit = 1, - .value = 0x3, - .pmaxbit = 14, - .pminbit = 6, - - }, - { - /* BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", - .match = 0x60, - .match_mask = 0x60, - .match_maxbit = 14, - .match_minbit = 6, - .maxbit = 6, - .minbit = 5, - .value = 0x3, - .pmaxbit = 14, - .pminbit = 6, - - }, - { - /* BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", - .match = 0x180, - .match_mask = 0x180, - .match_maxbit = 14, - .match_minbit = 6, - .maxbit = 8, - .minbit = 7, - .value = 0x3, - .pmaxbit = 14, - .pminbit = 6, - - }, - { - /* BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", - .match = 0x106, - .match_mask = 0x186, - .match_maxbit = 14, - .match_minbit = 6, - .maxbit = 8, - .minbit = 7, - .value = 0x2, - .pmaxbit = 14, - .pminbit = 6, - - }, - { - /* BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", - .match = 0x86, - .match_mask = 0x18e, - .match_maxbit = 14, - .match_minbit = 6, - .maxbit = 8, - .minbit = 7, - .value = 0x1, - .pmaxbit = 14, - .pminbit = 6, - - }, - { - /* BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH */ - .name = "INGRESS_PKT_SYS_HDR_EP_NIH", - .match = 0x2, - .match_mask = 0x3, - .match_maxbit = 1, - .match_minbit = 0, - .maxbit = 1, - .minbit = 0, - .value = 0x2, - .pmaxbit = 1, - .pminbit = 0, - - }, - { - /* BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */ - .name = "INGRESS_PKT_SYS_HDR_LOOPBACK", - .match = 0x1, - .match_mask = 0x3, - .match_maxbit = 1, - .match_minbit = 0, - .maxbit = 1, - .minbit = 0, - .value = 0x1, - .pmaxbit = 1, - .pminbit = 0, - - }, - { - /* BCM56780_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */ - .name = "INGRESS_PKT_SYS_HDR_NONE", - .match = 0x0, - .match_mask = 0x3, - .match_maxbit = 1, - .match_minbit = 0, - .maxbit = 1, - .minbit = 0, - .value = 0x0, - .pmaxbit = 1, - .pminbit = 0, - - }, -}; - -static bcmpkt_rxpmd_match_id_db_info_t bcm56780_a0_cna_6_5_34_2_0_rxpmd_match_id_db_info = { - .num_entries = 88, - .db = bcm56780_a0_cna_6_5_34_2_0_rxpmd_match_id_db -}; -bcmpkt_rxpmd_match_id_db_info_t * bcm56780_a0_cna_6_5_34_2_0_rxpmd_match_id_db_info_get(void) { - return &bcm56780_a0_cna_6_5_34_2_0_rxpmd_match_id_db_info; -} - -static shr_enum_map_t bcm56780_a0_cna_6_5_34_2_0_rxpmd_match_id_map[] = { - BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_rxpmd_match_id_map_info_t bcm56780_a0_cna_6_5_34_2_0_rxpmd_match_id_map_info = { - .num_entries = 88, - .map = bcm56780_a0_cna_6_5_34_2_0_rxpmd_match_id_map -}; - -bcmpkt_rxpmd_match_id_map_info_t * bcm56780_a0_cna_6_5_34_2_0_rxpmd_match_id_map_info_get(void) { - return &bcm56780_a0_cna_6_5_34_2_0_rxpmd_match_id_map_info; -} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/cna_6_5_34_2_0/bcm56780_a0_cna_6_5_34_2_0_pkt_flexhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/cna_6_5_34_2_0/bcm56780_a0_cna_6_5_34_2_0_pkt_flexhdr.c deleted file mode 100644 index 839ea88b7ca..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/cna_6_5_34_2_0/bcm56780_a0_cna_6_5_34_2_0_pkt_flexhdr.c +++ /dev/null @@ -1,4435 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) map.yml - * for device bcm56780_a0 and variant cna_6_5_34_2_0. - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - -#include -#include -#include -#include -#include -#include -#include - -#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) -#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) -#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) -#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) - -static void bcm56780_a0_cna_6_5_34_2_0_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons) -{ - uint32_t *reason = data + 0; - - if (reason[13] & (0x1 << 0)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU); - } - if (reason[13] & (0x1 << 1)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS); - } - if (reason[13] & (0x1 << 2)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE); - } - if (reason[13] & (0x1 << 3)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD); - } - if (reason[13] & (0x1 << 4)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST); - } - if (reason[13] & (0x1 << 5)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED); - } - if (reason[13] & (0x1 << 6)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT); - } - if (reason[13] & (0x1 << 7)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED); - } - if (reason[13] & (0x1 << 8)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED); - } - if (reason[13] & (0x1 << 9)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS); - } - if (reason[13] & (0x1 << 10)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP); - } - if (reason[13] & (0x1 << 11)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS); - } - if (reason[13] & (0x1 << 12)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP); - } - if (reason[13] & (0x1 << 13)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR); - } - if (reason[13] & (0x1 << 14)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR); - } - if (reason[13] & (0x1 << 16)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL); - } - if (reason[13] & (0x1 << 17)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_VFP); - } - if (reason[13] & (0x1 << 18)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP); - } - if (reason[13] & (0x1 << 19)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER); - } - if (reason[13] & (0x1 << 22)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT); - } - if (reason[13] & (0x1 << 23)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT); - } - if (reason[13] & (0x1 << 24)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED); - } - if (reason[13] & (0x1 << 25)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED); - } - if (reason[13] & (0x1 << 26)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP); - } - if (reason[12] & (0x1 << 15)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP); - } -} - -static void bcm56780_a0_cna_6_5_34_2_0_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data) -{ - uint32_t *reason = data + 0; - - reason[13] = 0; - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) { - reason[13] |= (0x1 << 0); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) { - reason[13] |= (0x1 << 1); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) { - reason[13] |= (0x1 << 2); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD)) { - reason[13] |= (0x1 << 3); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST)) { - reason[13] |= (0x1 << 4); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) { - reason[13] |= (0x1 << 5); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) { - reason[13] |= (0x1 << 6); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED)) { - reason[13] |= (0x1 << 7); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED)) { - reason[13] |= (0x1 << 8); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) { - reason[13] |= (0x1 << 9); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) { - reason[13] |= (0x1 << 10); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) { - reason[13] |= (0x1 << 11); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) { - reason[13] |= (0x1 << 12); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) { - reason[13] |= (0x1 << 13); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) { - reason[13] |= (0x1 << 14); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) { - reason[13] |= (0x1 << 16); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_VFP)) { - reason[13] |= (0x1 << 17); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP)) { - reason[13] |= (0x1 << 18); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) { - reason[13] |= (0x1 << 19); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT)) { - reason[13] |= (0x1 << 22); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) { - reason[13] |= (0x1 << 23); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED)) { - reason[13] |= (0x1 << 24); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED)) { - reason[13] |= (0x1 << 25); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP)) { - reason[13] |= (0x1 << 26); - } - reason[12] = 0; - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) { - reason[12] |= (0x1 << 15); - } -} - -static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_34_2_0_rxpmd_flex_field_data[] = { - { - .name = "DROP_CODE_15_0", - .fid = BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 48, 63 }, /* Profile 2. */ - { -1, -1 }, /* Profile 3. */ - { 48, 63 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "DVP_15_0", - .fid = BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_DVP_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 384, 399 }, /* Profile 2. */ - { 384, 399 }, /* Profile 3. */ - { 384, 399 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "EFFECTIVE_TTL_7_0", - .fid = BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 208, 215 }, /* Profile 2. */ - { 208, 215 }, /* Profile 3. */ - { 208, 215 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "ENTROPY_LABEL_HIGH_3_0", - .fid = BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 444, 447 }, /* Profile 2. */ - { 444, 447 }, /* Profile 3. */ - { 444, 447 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "ENTROPY_LABEL_LOW_15_0", - .fid = BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 240, 255 }, /* Profile 2. */ - { 240, 255 }, /* Profile 3. */ - { 240, 255 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "EP_NIH_HDR_DROP_CODE_15_0", - .fid = BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_DROP_CODE_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { -1, -1 }, /* Profile 2. */ - { 48, 63 }, /* Profile 3. */ - }, - .profile_cnt = 4, - }, - { - .name = "EP_NIH_HDR_RECIRC_CODE_3_0", - .fid = BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 416, 419 }, /* Profile 2. */ - { 416, 419 }, /* Profile 3. */ - { 416, 419 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "EP_NIH_HDR_TIMESTAMP_15_0", - .fid = BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 288, 303 }, /* Profile 2. */ - { 288, 303 }, /* Profile 3. */ - }, - .profile_cnt = 4, - }, - { - .name = "EP_NIH_HDR_TIMESTAMP_31_16", - .fid = BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 304, 319 }, /* Profile 2. */ - { 304, 319 }, /* Profile 3. */ - }, - .profile_cnt = 4, - }, - { - .name = "ERSPAN3_GBP_SID_15_0", - .fid = BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_ERSPAN3_GBP_SID_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 224, 239 }, /* Profile 2. */ - { 224, 239 }, /* Profile 3. */ - { 224, 239 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "EVENT_TRACE_VECTOR_15_0", - .fid = BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 0, 15 }, /* Profile 2. */ - { 0, 15 }, /* Profile 3. */ - { 0, 15 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "EVENT_TRACE_VECTOR_31_16", - .fid = BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 16, 31 }, /* Profile 2. */ - { 16, 31 }, /* Profile 3. */ - { 16, 31 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "EVENT_TRACE_VECTOR_47_32", - .fid = BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 32, 47 }, /* Profile 2. */ - { 32, 47 }, /* Profile 3. */ - { 32, 47 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "I2E_CLASS_ID_15_0", - .fid = BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 80, 95 }, /* Profile 2. */ - { 80, 95 }, /* Profile 3. */ - { 80, 95 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "IFP_IOAM_GBP_ACTION_3_0", - .fid = BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 428, 431 }, /* Profile 2. */ - { 428, 431 }, /* Profile 3. */ - { 428, 431 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "IFP_TO_EP_MACSEC_INFO_OR_IFP_OPAQUE_OBJ_15_0", - .fid = BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_IFP_TO_EP_MACSEC_INFO_OR_IFP_OPAQUE_OBJ_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 128, 143 }, /* Profile 2. */ - { 128, 143 }, /* Profile 3. */ - { 128, 143 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "IFP_TS_CONTROL_ACTION_3_0", - .fid = BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 412, 415 }, /* Profile 2. */ - { 412, 415 }, /* Profile 3. */ - { 412, 415 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "ING_TIMESTAMP_15_0", - .fid = BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { -1, -1 }, /* Profile 2. */ - { -1, -1 }, /* Profile 3. */ - { 288, 303 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "ING_TIMESTAMP_31_16", - .fid = BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { -1, -1 }, /* Profile 2. */ - { -1, -1 }, /* Profile 3. */ - { 304, 319 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "INGRESS_PP_PORT_7_0", - .fid = BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 272, 279 }, /* Profile 2. */ - { 272, 279 }, /* Profile 3. */ - { 272, 279 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0", - .fid = BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 96, 111 }, /* Profile 2. */ - { 96, 111 }, /* Profile 3. */ - { 96, 111 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "INGRESS_QOS_REMARK_CTRL_3_0", - .fid = BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 424, 427 }, /* Profile 2. */ - { 424, 427 }, /* Profile 3. */ - { 424, 427 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "INT_PRI_3_0", - .fid = BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 400, 403 }, /* Profile 2. */ - { 400, 403 }, /* Profile 3. */ - { 400, 403 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "L2_IIF_10_0", - .fid = BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 320, 330 }, /* Profile 2. */ - { 320, 330 }, /* Profile 3. */ - { 320, 330 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "L2_OIF_10_0", - .fid = BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 352, 362 }, /* Profile 2. */ - { 352, 362 }, /* Profile 3. */ - { 352, 362 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "L3_IIF_13_0", - .fid = BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 160, 173 }, /* Profile 2. */ - { 160, 173 }, /* Profile 3. */ - { 160, 173 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "L3_OIF_1_13_0", - .fid = BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 368, 381 }, /* Profile 2. */ - { 368, 381 }, /* Profile 3. */ - { 368, 381 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "NHOP_2_OR_ECMP_GROUP_INDEX_1_14_0", - .fid = BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_14_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 336, 350 }, /* Profile 2. */ - { 336, 350 }, /* Profile 3. */ - { 336, 350 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "NHOP_INDEX_1_14_0", - .fid = BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_14_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 144, 158 }, /* Profile 2. */ - { 144, 158 }, /* Profile 3. */ - { 144, 158 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "PARSER_VHLEN_0_15_0", - .fid = BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 64, 79 }, /* Profile 2. */ - { 64, 79 }, /* Profile 3. */ - { 64, 79 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "PKT_MISC_CTRL_0_3_0", - .fid = BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 420, 423 }, /* Profile 2. */ - { 420, 423 }, /* Profile 3. */ - { 420, 423 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "SVP_15_0", - .fid = BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_SVP_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 112, 127 }, /* Profile 2. */ - { 112, 127 }, /* Profile 3. */ - { 112, 127 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "SVP_NETWORK_GROUP_BITMAP_3_0", - .fid = BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 404, 407 }, /* Profile 2. */ - { 404, 407 }, /* Profile 3. */ - { 404, 407 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "SYSTEM_DESTINATION_15_0", - .fid = BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 192, 207 }, /* Profile 2. */ - { 192, 207 }, /* Profile 3. */ - { 192, 207 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "SYSTEM_OPCODE_3_0", - .fid = BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 440, 443 }, /* Profile 2. */ - { 440, 443 }, /* Profile 3. */ - { 440, 443 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "SYSTEM_SOURCE_15_0", - .fid = BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 176, 191 }, /* Profile 2. */ - { 176, 191 }, /* Profile 3. */ - { 176, 191 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "TAG_ACTION_CTRL_1_0", - .fid = BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_TAG_ACTION_CTRL_1_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 432, 433 }, /* Profile 2. */ - { 432, 433 }, /* Profile 3. */ - { 432, 433 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "TIMESTAMP_CTRL_3_0", - .fid = BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 408, 411 }, /* Profile 2. */ - { 408, 411 }, /* Profile 3. */ - { 408, 411 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "TUNNEL_PROCESSING_RESULTS_1_3_0", - .fid = BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 436, 439 }, /* Profile 2. */ - { 436, 439 }, /* Profile 3. */ - { 436, 439 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "VFI_15_0", - .fid = BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_VFI_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 256, 271 }, /* Profile 2. */ - { 256, 271 }, /* Profile 3. */ - { 256, 271 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, -}; -static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_34_2_0_rxpmd_flex_field_info = { - .num_fields = BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_FID_COUNT, - .info = bcm56780_a0_cna_6_5_34_2_0_rxpmd_flex_field_data, - .profile_bmp_cnt = 1, - .profile_bmp[0] = 0x1c, - -}; - -static shr_enum_map_t bcm56780_a0_cna_6_5_34_2_0_rxpmd_flex_reason_names[] = { - BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT -}; - -static bcmpkt_flex_reasons_info_t bcm56780_a0_cna_6_5_34_2_0_rxpmd_flex_reasons_info = { - .num_reasons = BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_COUNT, - .reason_names = bcm56780_a0_cna_6_5_34_2_0_rxpmd_flex_reason_names, - .reason_encode = bcm56780_a0_cna_6_5_34_2_0_rxpmd_flex_reason_encode, - .reason_decode = bcm56780_a0_cna_6_5_34_2_0_rxpmd_flex_reason_decode, -}; - - -static int32_t bcmpkt_arp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 24, 8); - - return ret; -} - -static int32_t bcmpkt_arp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_arp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_arp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_arp_t_operation_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 16); - - return ret; -} - -static int32_t bcmpkt_arp_t_operation_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_arp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 8); - - return ret; -} - -static int32_t bcmpkt_arp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_arp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_arp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_arp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_arp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_arp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_arp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_arp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_arp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_arp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_arp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_34_2_0_arp_t_fget[BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_FID_COUNT] = { - bcmpkt_arp_t_hardware_len_get, - bcmpkt_arp_t_hardware_type_get, - bcmpkt_arp_t_operation_get, - bcmpkt_arp_t_prot_addr_len_get, - bcmpkt_arp_t_protocol_type_get, - bcmpkt_arp_t_sender_ha_get, - bcmpkt_arp_t_sender_ip_get, - bcmpkt_arp_t_target_ha_get, - bcmpkt_arp_t_target_ip_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_34_2_0_arp_t_fset[BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_FID_COUNT] = { - bcmpkt_arp_t_hardware_len_set, - bcmpkt_arp_t_hardware_type_set, - bcmpkt_arp_t_operation_set, - bcmpkt_arp_t_prot_addr_len_set, - bcmpkt_arp_t_protocol_type_set, - bcmpkt_arp_t_sender_ha_set, - bcmpkt_arp_t_sender_ip_set, - bcmpkt_arp_t_target_ha_set, - bcmpkt_arp_t_target_ip_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_34_2_0_arp_t_field_data[] = { - BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_34_2_0_arp_t_field_info = { - .num_fields = BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_FID_COUNT, - .info = bcm56780_a0_cna_6_5_34_2_0_arp_t_field_data, -}; - - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_34_2_0_cpu_composites_0_t_fget[BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { - bcmpkt_cpu_composites_0_t_dma_cont0_get, - bcmpkt_cpu_composites_0_t_dma_cont1_get, - bcmpkt_cpu_composites_0_t_dma_cont2_get, - bcmpkt_cpu_composites_0_t_dma_cont3_get, - bcmpkt_cpu_composites_0_t_dma_cont4_get, - bcmpkt_cpu_composites_0_t_dma_cont5_get, - bcmpkt_cpu_composites_0_t_dma_cont6_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_34_2_0_cpu_composites_0_t_fset[BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { - bcmpkt_cpu_composites_0_t_dma_cont0_set, - bcmpkt_cpu_composites_0_t_dma_cont1_set, - bcmpkt_cpu_composites_0_t_dma_cont2_set, - bcmpkt_cpu_composites_0_t_dma_cont3_set, - bcmpkt_cpu_composites_0_t_dma_cont4_set, - bcmpkt_cpu_composites_0_t_dma_cont5_set, - bcmpkt_cpu_composites_0_t_dma_cont6_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_34_2_0_cpu_composites_0_t_field_data[] = { - BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_34_2_0_cpu_composites_0_t_field_info = { - .num_fields = BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT, - .info = bcm56780_a0_cna_6_5_34_2_0_cpu_composites_0_t_field_data, -}; - - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_34_2_0_cpu_composites_1_t_fget[BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { - bcmpkt_cpu_composites_1_t_dma_cont10_get, - bcmpkt_cpu_composites_1_t_dma_cont11_get, - bcmpkt_cpu_composites_1_t_dma_cont12_get, - bcmpkt_cpu_composites_1_t_dma_cont13_get, - bcmpkt_cpu_composites_1_t_dma_cont14_get, - bcmpkt_cpu_composites_1_t_dma_cont15_get, - bcmpkt_cpu_composites_1_t_dma_cont16_get, - bcmpkt_cpu_composites_1_t_dma_cont17_get, - bcmpkt_cpu_composites_1_t_dma_cont7_get, - bcmpkt_cpu_composites_1_t_dma_cont8_get, - bcmpkt_cpu_composites_1_t_dma_cont9_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_34_2_0_cpu_composites_1_t_fset[BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { - bcmpkt_cpu_composites_1_t_dma_cont10_set, - bcmpkt_cpu_composites_1_t_dma_cont11_set, - bcmpkt_cpu_composites_1_t_dma_cont12_set, - bcmpkt_cpu_composites_1_t_dma_cont13_set, - bcmpkt_cpu_composites_1_t_dma_cont14_set, - bcmpkt_cpu_composites_1_t_dma_cont15_set, - bcmpkt_cpu_composites_1_t_dma_cont16_set, - bcmpkt_cpu_composites_1_t_dma_cont17_set, - bcmpkt_cpu_composites_1_t_dma_cont7_set, - bcmpkt_cpu_composites_1_t_dma_cont8_set, - bcmpkt_cpu_composites_1_t_dma_cont9_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_34_2_0_cpu_composites_1_t_field_data[] = { - BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_34_2_0_cpu_composites_1_t_field_info = { - .num_fields = BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT, - .info = bcm56780_a0_cna_6_5_34_2_0_cpu_composites_1_t_field_data, -}; - - -static int32_t bcmpkt_ep_nih_header_t_header_subtype_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 20, 4); - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_header_subtype_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 20, 4, val); - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_header_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 6); - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_header_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 6, val); - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 8, 4); - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 8, 4, val); - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 20, 4); - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 20, 4, val); - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 4); - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 4, val); - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[3], 16, 16); - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[3], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[3], 0, 16); - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[3], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 4); - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 4, val); - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 12, 4); - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 12, 4, val); - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_start_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 30, 2); - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_start_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 30, 2, val); - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_34_2_0_ep_nih_header_t_fget[BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = { - bcmpkt_ep_nih_header_t_header_subtype_get, - bcmpkt_ep_nih_header_t_header_type_get, - bcmpkt_ep_nih_header_t_opaque_ctrl_a_get, - bcmpkt_ep_nih_header_t_opaque_ctrl_b_get, - bcmpkt_ep_nih_header_t_opaque_ctrl_c_get, - bcmpkt_ep_nih_header_t_opaque_object_a_get, - bcmpkt_ep_nih_header_t_opaque_object_b_get, - bcmpkt_ep_nih_header_t_opaque_object_c_get, - bcmpkt_ep_nih_header_t_recirc_profile_index_get, - bcmpkt_ep_nih_header_t_reserved_0_get, - bcmpkt_ep_nih_header_t_start_get, - bcmpkt_ep_nih_header_t_timestamp_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_34_2_0_ep_nih_header_t_fset[BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = { - bcmpkt_ep_nih_header_t_header_subtype_set, - bcmpkt_ep_nih_header_t_header_type_set, - bcmpkt_ep_nih_header_t_opaque_ctrl_a_set, - bcmpkt_ep_nih_header_t_opaque_ctrl_b_set, - bcmpkt_ep_nih_header_t_opaque_ctrl_c_set, - bcmpkt_ep_nih_header_t_opaque_object_a_set, - bcmpkt_ep_nih_header_t_opaque_object_b_set, - bcmpkt_ep_nih_header_t_opaque_object_c_set, - bcmpkt_ep_nih_header_t_recirc_profile_index_set, - bcmpkt_ep_nih_header_t_reserved_0_set, - bcmpkt_ep_nih_header_t_start_set, - bcmpkt_ep_nih_header_t_timestamp_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_34_2_0_ep_nih_header_t_field_data[] = { - BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_34_2_0_ep_nih_header_t_field_info = { - .num_fields = BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT, - .info = bcm56780_a0_cna_6_5_34_2_0_ep_nih_header_t_field_data, -}; - - -static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 11, 2); - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 11, 2, val); - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 13, 3); - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 13, 3, val); - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 16, 16); - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 0, 16); - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 10); - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 10, val); - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_t_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 10, 1); - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_t_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 10, 1, val); - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 28, 4); - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 28, 4, val); - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 12); - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 12, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_34_2_0_erspan3_fixed_hdr_t_fget[BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { - bcmpkt_erspan3_fixed_hdr_t_bso_get, - bcmpkt_erspan3_fixed_hdr_t_cos_get, - bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get, - bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get, - bcmpkt_erspan3_fixed_hdr_t_session_id_get, - bcmpkt_erspan3_fixed_hdr_t_t_get, - bcmpkt_erspan3_fixed_hdr_t_timestamp_get, - bcmpkt_erspan3_fixed_hdr_t_ver_get, - bcmpkt_erspan3_fixed_hdr_t_vlan_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_34_2_0_erspan3_fixed_hdr_t_fset[BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { - bcmpkt_erspan3_fixed_hdr_t_bso_set, - bcmpkt_erspan3_fixed_hdr_t_cos_set, - bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set, - bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set, - bcmpkt_erspan3_fixed_hdr_t_session_id_set, - bcmpkt_erspan3_fixed_hdr_t_t_set, - bcmpkt_erspan3_fixed_hdr_t_timestamp_set, - bcmpkt_erspan3_fixed_hdr_t_ver_set, - bcmpkt_erspan3_fixed_hdr_t_vlan_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_34_2_0_erspan3_fixed_hdr_t_field_data[] = { - BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_34_2_0_erspan3_fixed_hdr_t_field_info = { - .num_fields = BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT, - .info = bcm56780_a0_cna_6_5_34_2_0_erspan3_fixed_hdr_t_field_data, -}; - - -static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 26, 6); - - return ret; -} - -static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 26, 6, val); - return ret; -} - -static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 10); - - return ret; -} - -static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 10, val); - return ret; -} - -static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_34_2_0_erspan3_subhdr_5_t_fget[BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { - bcmpkt_erspan3_subhdr_5_t_platform_id_get, - bcmpkt_erspan3_subhdr_5_t_port_id_get, - bcmpkt_erspan3_subhdr_5_t_switch_id_get, - bcmpkt_erspan3_subhdr_5_t_timestamp_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_34_2_0_erspan3_subhdr_5_t_fset[BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { - bcmpkt_erspan3_subhdr_5_t_platform_id_set, - bcmpkt_erspan3_subhdr_5_t_port_id_set, - bcmpkt_erspan3_subhdr_5_t_switch_id_set, - bcmpkt_erspan3_subhdr_5_t_timestamp_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_34_2_0_erspan3_subhdr_5_t_field_data[] = { - BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_34_2_0_erspan3_subhdr_5_t_field_info = { - .num_fields = BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT, - .info = bcm56780_a0_cna_6_5_34_2_0_erspan3_subhdr_5_t_field_data, -}; - - -static int32_t bcmpkt_ethertype_t_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_ethertype_t_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_34_2_0_ethertype_t_fget[BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = { - bcmpkt_ethertype_t_type_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_34_2_0_ethertype_t_fset[BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = { - bcmpkt_ethertype_t_type_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_34_2_0_ethertype_t_field_data[] = { - BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_34_2_0_ethertype_t_field_info = { - .num_fields = BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT, - .info = bcm56780_a0_cna_6_5_34_2_0_ethertype_t_field_data, -}; - - -static int32_t bcmpkt_generic_loopback_t_destination_obj_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 16); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_destination_obj_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_destination_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 24, 4); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_destination_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 24, 4, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_entropy_obj_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[3], 16, 16); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_entropy_obj_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[3], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_flags_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 4); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_flags_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 4, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_header_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 20, 4); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_header_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 20, 4, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_input_priority_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 12, 4); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_input_priority_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 12, 4, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_interface_ctrl_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 4, 4); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_interface_ctrl_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 4, 4, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_interface_obj_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 0, 16); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_interface_obj_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 4); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 4, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 28, 4); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 28, 4, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_qos_obj_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 8); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_qos_obj_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_reserved_1_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 8, 4); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_reserved_1_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 8, 4, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_reserved_2_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[3], 0, 16); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_reserved_2_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[3], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_source_system_port_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 16, 16); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_source_system_port_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_start_byte_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_start_byte_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_34_2_0_generic_loopback_t_fget[BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { - bcmpkt_generic_loopback_t_destination_obj_get, - bcmpkt_generic_loopback_t_destination_type_get, - bcmpkt_generic_loopback_t_entropy_obj_get, - bcmpkt_generic_loopback_t_flags_get, - bcmpkt_generic_loopback_t_header_type_get, - bcmpkt_generic_loopback_t_input_priority_get, - bcmpkt_generic_loopback_t_interface_ctrl_get, - bcmpkt_generic_loopback_t_interface_obj_get, - bcmpkt_generic_loopback_t_processing_ctrl_0_get, - bcmpkt_generic_loopback_t_processing_ctrl_1_get, - bcmpkt_generic_loopback_t_qos_obj_get, - bcmpkt_generic_loopback_t_reserved_1_get, - bcmpkt_generic_loopback_t_reserved_2_get, - bcmpkt_generic_loopback_t_source_system_port_get, - bcmpkt_generic_loopback_t_start_byte_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_34_2_0_generic_loopback_t_fset[BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { - bcmpkt_generic_loopback_t_destination_obj_set, - bcmpkt_generic_loopback_t_destination_type_set, - bcmpkt_generic_loopback_t_entropy_obj_set, - bcmpkt_generic_loopback_t_flags_set, - bcmpkt_generic_loopback_t_header_type_set, - bcmpkt_generic_loopback_t_input_priority_set, - bcmpkt_generic_loopback_t_interface_ctrl_set, - bcmpkt_generic_loopback_t_interface_obj_set, - bcmpkt_generic_loopback_t_processing_ctrl_0_set, - bcmpkt_generic_loopback_t_processing_ctrl_1_set, - bcmpkt_generic_loopback_t_qos_obj_set, - bcmpkt_generic_loopback_t_reserved_1_set, - bcmpkt_generic_loopback_t_reserved_2_set, - bcmpkt_generic_loopback_t_source_system_port_set, - bcmpkt_generic_loopback_t_start_byte_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_34_2_0_generic_loopback_t_field_data[] = { - BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_34_2_0_generic_loopback_t_field_info = { - .num_fields = BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT, - .info = bcm56780_a0_cna_6_5_34_2_0_generic_loopback_t_field_data, -}; - - -static int32_t bcmpkt_icmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_icmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_icmp_t_code_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_icmp_t_code_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_icmp_t_icmp_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_icmp_t_icmp_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_34_2_0_icmp_t_fget[BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ICMP_T_FID_COUNT] = { - bcmpkt_icmp_t_checksum_get, - bcmpkt_icmp_t_code_get, - bcmpkt_icmp_t_icmp_type_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_34_2_0_icmp_t_fset[BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ICMP_T_FID_COUNT] = { - bcmpkt_icmp_t_checksum_set, - bcmpkt_icmp_t_code_set, - bcmpkt_icmp_t_icmp_type_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_34_2_0_icmp_t_field_data[] = { - BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_34_2_0_icmp_t_field_info = { - .num_fields = BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_ICMP_T_FID_COUNT, - .info = bcm56780_a0_cna_6_5_34_2_0_icmp_t_field_data, -}; - - -static int32_t bcmpkt_ifa_header_t_flags_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 8, 8); - - return ret; -} - -static int32_t bcmpkt_ifa_header_t_flags_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 8, 8, val); - return ret; -} - -static int32_t bcmpkt_ifa_header_t_gns_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 4); - - return ret; -} - -static int32_t bcmpkt_ifa_header_t_gns_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 4, val); - return ret; -} - -static int32_t bcmpkt_ifa_header_t_max_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 8); - - return ret; -} - -static int32_t bcmpkt_ifa_header_t_max_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 8, val); - return ret; -} - -static int32_t bcmpkt_ifa_header_t_next_hdr_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_ifa_header_t_next_hdr_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_ifa_header_t_ver_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 28, 4); - - return ret; -} - -static int32_t bcmpkt_ifa_header_t_ver_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 28, 4, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_34_2_0_ifa_header_t_fget[BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = { - bcmpkt_ifa_header_t_flags_get, - bcmpkt_ifa_header_t_gns_get, - bcmpkt_ifa_header_t_max_length_get, - bcmpkt_ifa_header_t_next_hdr_get, - bcmpkt_ifa_header_t_ver_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_34_2_0_ifa_header_t_fset[BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = { - bcmpkt_ifa_header_t_flags_set, - bcmpkt_ifa_header_t_gns_set, - bcmpkt_ifa_header_t_max_length_set, - bcmpkt_ifa_header_t_next_hdr_set, - bcmpkt_ifa_header_t_ver_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_34_2_0_ifa_header_t_field_data[] = { - BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_34_2_0_ifa_header_t_field_info = { - .num_fields = BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_FID_COUNT, - .info = bcm56780_a0_cna_6_5_34_2_0_ifa_header_t_field_data, -}; - - -static int32_t bcmpkt_ifa_metadata_t_action_vector_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_t_action_vector_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_ifa_metadata_t_hop_limit_current_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_t_hop_limit_current_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_ifa_metadata_t_metadata_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_t_metadata_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_t_request_vector_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_t_request_vector_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_34_2_0_ifa_metadata_t_fget[BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_T_FID_COUNT] = { - bcmpkt_ifa_metadata_t_action_vector_get, - bcmpkt_ifa_metadata_t_hop_limit_current_length_get, - bcmpkt_ifa_metadata_t_metadata_get, - bcmpkt_ifa_metadata_t_request_vector_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_34_2_0_ifa_metadata_t_fset[BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_T_FID_COUNT] = { - bcmpkt_ifa_metadata_t_action_vector_set, - bcmpkt_ifa_metadata_t_hop_limit_current_length_set, - bcmpkt_ifa_metadata_t_metadata_set, - bcmpkt_ifa_metadata_t_request_vector_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_34_2_0_ifa_metadata_t_field_data[] = { - BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_34_2_0_ifa_metadata_t_field_info = { - .num_fields = BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_T_FID_COUNT, - .info = bcm56780_a0_cna_6_5_34_2_0_ifa_metadata_t_field_data, -}; - - -static int32_t bcmpkt_ipfix_t_export_time_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipfix_t_export_time_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipfix_t_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_ipfix_t_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_ipfix_t_obs_domain_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipfix_t_obs_domain_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipfix_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipfix_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipfix_t_version_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_ipfix_t_version_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_34_2_0_ipfix_t_fget[BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IPFIX_T_FID_COUNT] = { - bcmpkt_ipfix_t_export_time_get, - bcmpkt_ipfix_t_length_get, - bcmpkt_ipfix_t_obs_domain_id_get, - bcmpkt_ipfix_t_sequence_num_get, - bcmpkt_ipfix_t_version_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_34_2_0_ipfix_t_fset[BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IPFIX_T_FID_COUNT] = { - bcmpkt_ipfix_t_export_time_set, - bcmpkt_ipfix_t_length_set, - bcmpkt_ipfix_t_obs_domain_id_set, - bcmpkt_ipfix_t_sequence_num_set, - bcmpkt_ipfix_t_version_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_34_2_0_ipfix_t_field_data[] = { - BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_34_2_0_ipfix_t_field_info = { - .num_fields = BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IPFIX_T_FID_COUNT, - .info = bcm56780_a0_cna_6_5_34_2_0_ipfix_t_field_data, -}; - - -static int32_t bcmpkt_ipv4_t_da_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv4_t_da_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv4_t_flags_frag_offset_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 16); - - return ret; -} - -static int32_t bcmpkt_ipv4_t_flags_frag_offset_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_ipv4_t_hdr_checksum_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 0, 16); - - return ret; -} - -static int32_t bcmpkt_ipv4_t_hdr_checksum_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_ipv4_t_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 16); - - return ret; -} - -static int32_t bcmpkt_ipv4_t_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_ipv4_t_option_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv4_t_option_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv4_t_protocol_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 16, 8); - - return ret; -} - -static int32_t bcmpkt_ipv4_t_protocol_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_ipv4_t_sa_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv4_t_sa_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv4_t_tos_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_ipv4_t_tos_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_ipv4_t_total_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_ipv4_t_total_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_ipv4_t_ttl_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 24, 8); - - return ret; -} - -static int32_t bcmpkt_ipv4_t_ttl_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_ipv4_t_version_hdr_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_ipv4_t_version_hdr_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_34_2_0_ipv4_t_fget[BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_FID_COUNT] = { - bcmpkt_ipv4_t_da_get, - bcmpkt_ipv4_t_flags_frag_offset_get, - bcmpkt_ipv4_t_hdr_checksum_get, - bcmpkt_ipv4_t_id_get, - bcmpkt_ipv4_t_option_get, - bcmpkt_ipv4_t_protocol_get, - bcmpkt_ipv4_t_sa_get, - bcmpkt_ipv4_t_tos_get, - bcmpkt_ipv4_t_total_length_get, - bcmpkt_ipv4_t_ttl_get, - bcmpkt_ipv4_t_version_hdr_len_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_34_2_0_ipv4_t_fset[BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_FID_COUNT] = { - bcmpkt_ipv4_t_da_set, - bcmpkt_ipv4_t_flags_frag_offset_set, - bcmpkt_ipv4_t_hdr_checksum_set, - bcmpkt_ipv4_t_id_set, - bcmpkt_ipv4_t_option_set, - bcmpkt_ipv4_t_protocol_set, - bcmpkt_ipv4_t_sa_set, - bcmpkt_ipv4_t_tos_set, - bcmpkt_ipv4_t_total_length_set, - bcmpkt_ipv4_t_ttl_set, - bcmpkt_ipv4_t_version_hdr_len_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_34_2_0_ipv4_t_field_data[] = { - BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_34_2_0_ipv4_t_field_info = { - .num_fields = BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_FID_COUNT, - .info = bcm56780_a0_cna_6_5_34_2_0_ipv4_t_field_data, -}; - - -static int32_t bcmpkt_ipv6_t_da_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv6_t_da_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv6_t_flow_label_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 20); - - return ret; -} - -static int32_t bcmpkt_ipv6_t_flow_label_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 20, val); - return ret; -} - -static int32_t bcmpkt_ipv6_t_hop_limit_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 8); - - return ret; -} - -static int32_t bcmpkt_ipv6_t_hop_limit_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 8, val); - return ret; -} - -static int32_t bcmpkt_ipv6_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 8, 8); - - return ret; -} - -static int32_t bcmpkt_ipv6_t_next_header_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 8, 8, val); - return ret; -} - -static int32_t bcmpkt_ipv6_t_payload_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 16); - - return ret; -} - -static int32_t bcmpkt_ipv6_t_payload_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_ipv6_t_sa_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv6_t_sa_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv6_t_traffic_class_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 20, 8); - - return ret; -} - -static int32_t bcmpkt_ipv6_t_traffic_class_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 20, 8, val); - return ret; -} - -static int32_t bcmpkt_ipv6_t_version_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 28, 4); - - return ret; -} - -static int32_t bcmpkt_ipv6_t_version_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 28, 4, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_34_2_0_ipv6_t_fget[BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_FID_COUNT] = { - bcmpkt_ipv6_t_da_get, - bcmpkt_ipv6_t_flow_label_get, - bcmpkt_ipv6_t_hop_limit_get, - bcmpkt_ipv6_t_next_header_get, - bcmpkt_ipv6_t_payload_length_get, - bcmpkt_ipv6_t_sa_get, - bcmpkt_ipv6_t_traffic_class_get, - bcmpkt_ipv6_t_version_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_34_2_0_ipv6_t_fset[BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_FID_COUNT] = { - bcmpkt_ipv6_t_da_set, - bcmpkt_ipv6_t_flow_label_set, - bcmpkt_ipv6_t_hop_limit_set, - bcmpkt_ipv6_t_next_header_set, - bcmpkt_ipv6_t_payload_length_set, - bcmpkt_ipv6_t_sa_set, - bcmpkt_ipv6_t_traffic_class_set, - bcmpkt_ipv6_t_version_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_34_2_0_ipv6_t_field_data[] = { - BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_34_2_0_ipv6_t_field_info = { - .num_fields = BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_FID_COUNT, - .info = bcm56780_a0_cna_6_5_34_2_0_ipv6_t_field_data, -}; - - -static int32_t bcmpkt_l2_t_macda_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_l2_t_macda_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_l2_t_macsa_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_l2_t_macsa_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_34_2_0_l2_t_fget[BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_L2_T_FID_COUNT] = { - bcmpkt_l2_t_macda_get, - bcmpkt_l2_t_macsa_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_34_2_0_l2_t_fset[BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_L2_T_FID_COUNT] = { - bcmpkt_l2_t_macda_set, - bcmpkt_l2_t_macsa_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_34_2_0_l2_t_field_data[] = { - BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_34_2_0_l2_t_field_info = { - .num_fields = BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_L2_T_FID_COUNT, - .info = bcm56780_a0_cna_6_5_34_2_0_l2_t_field_data, -}; - - -static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_34_2_0_mirror_erspan_sn_t_fget[BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { - bcmpkt_mirror_erspan_sn_t_seq_num_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_34_2_0_mirror_erspan_sn_t_fset[BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { - bcmpkt_mirror_erspan_sn_t_seq_num_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_34_2_0_mirror_erspan_sn_t_field_data[] = { - BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_34_2_0_mirror_erspan_sn_t_field_info = { - .num_fields = BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT, - .info = bcm56780_a0_cna_6_5_34_2_0_mirror_erspan_sn_t_field_data, -}; - - -static int32_t bcmpkt_mirror_transport_t_data_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_mirror_transport_t_data_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_34_2_0_mirror_transport_t_fget[BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { - bcmpkt_mirror_transport_t_data_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_34_2_0_mirror_transport_t_fset[BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { - bcmpkt_mirror_transport_t_data_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_34_2_0_mirror_transport_t_field_data[] = { - BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_34_2_0_mirror_transport_t_field_info = { - .num_fields = BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT, - .info = bcm56780_a0_cna_6_5_34_2_0_mirror_transport_t_field_data, -}; - - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[4], 16, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[4], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[4], 0, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[4], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_34_2_0_psamp_mirror_on_drop_0_t_fget[BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { - bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get, - bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get, - bcmpkt_psamp_mirror_on_drop_0_t_length_get, - bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get, - bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get, - bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get, - bcmpkt_psamp_mirror_on_drop_0_t_template_id_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_34_2_0_psamp_mirror_on_drop_0_t_fset[BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { - bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set, - bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set, - bcmpkt_psamp_mirror_on_drop_0_t_length_set, - bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set, - bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set, - bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set, - bcmpkt_psamp_mirror_on_drop_0_t_template_id_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_34_2_0_psamp_mirror_on_drop_0_t_field_data[] = { - BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_34_2_0_psamp_mirror_on_drop_0_t_field_info = { - .num_fields = BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT, - .info = bcm56780_a0_cna_6_5_34_2_0_psamp_mirror_on_drop_0_t_field_data, -}; - - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 6); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 6, val); - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_smod_state_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 22, 2); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_smod_state_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 22, 2, val); - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 24, 8); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 8); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 8, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_34_2_0_psamp_mirror_on_drop_3_t_fget[BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = { - bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get, - bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get, - bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get, - bcmpkt_psamp_mirror_on_drop_3_t_smod_state_get, - bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get, - bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get, - bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_34_2_0_psamp_mirror_on_drop_3_t_fset[BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = { - bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set, - bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set, - bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set, - bcmpkt_psamp_mirror_on_drop_3_t_smod_state_set, - bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set, - bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set, - bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_34_2_0_psamp_mirror_on_drop_3_t_field_data[] = { - BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_34_2_0_psamp_mirror_on_drop_3_t_field_info = { - .num_fields = BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT, - .info = bcm56780_a0_cna_6_5_34_2_0_psamp_mirror_on_drop_3_t_field_data, -}; - - -static int32_t bcmpkt_rarp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 24, 8); - - return ret; -} - -static int32_t bcmpkt_rarp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_rarp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_rarp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_rarp_t_operation_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 16); - - return ret; -} - -static int32_t bcmpkt_rarp_t_operation_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_rarp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 8); - - return ret; -} - -static int32_t bcmpkt_rarp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_rarp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_rarp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_rarp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_rarp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_rarp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_rarp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_rarp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_rarp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_rarp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_rarp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_34_2_0_rarp_t_fget[BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_FID_COUNT] = { - bcmpkt_rarp_t_hardware_len_get, - bcmpkt_rarp_t_hardware_type_get, - bcmpkt_rarp_t_operation_get, - bcmpkt_rarp_t_prot_addr_len_get, - bcmpkt_rarp_t_protocol_type_get, - bcmpkt_rarp_t_sender_ha_get, - bcmpkt_rarp_t_sender_ip_get, - bcmpkt_rarp_t_target_ha_get, - bcmpkt_rarp_t_target_ip_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_34_2_0_rarp_t_fset[BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_FID_COUNT] = { - bcmpkt_rarp_t_hardware_len_set, - bcmpkt_rarp_t_hardware_type_set, - bcmpkt_rarp_t_operation_set, - bcmpkt_rarp_t_prot_addr_len_set, - bcmpkt_rarp_t_protocol_type_set, - bcmpkt_rarp_t_sender_ha_set, - bcmpkt_rarp_t_sender_ip_set, - bcmpkt_rarp_t_target_ha_set, - bcmpkt_rarp_t_target_ip_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_34_2_0_rarp_t_field_data[] = { - BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_34_2_0_rarp_t_field_info = { - .num_fields = BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_FID_COUNT, - .info = bcm56780_a0_cna_6_5_34_2_0_rarp_t_field_data, -}; - - -static int32_t bcmpkt_sflow_shim_0_t_sys_destination_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 16); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_0_t_sys_destination_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_sflow_shim_0_t_sys_source_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 16); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_0_t_sys_source_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_sflow_shim_0_t_version_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_sflow_shim_0_t_version_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_34_2_0_sflow_shim_0_t_fget[BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { - bcmpkt_sflow_shim_0_t_sys_destination_get, - bcmpkt_sflow_shim_0_t_sys_source_get, - bcmpkt_sflow_shim_0_t_version_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_34_2_0_sflow_shim_0_t_fset[BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { - bcmpkt_sflow_shim_0_t_sys_destination_set, - bcmpkt_sflow_shim_0_t_sys_source_set, - bcmpkt_sflow_shim_0_t_version_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_34_2_0_sflow_shim_0_t_field_data[] = { - BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_34_2_0_sflow_shim_0_t_field_info = { - .num_fields = BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT, - .info = bcm56780_a0_cna_6_5_34_2_0_sflow_shim_0_t_field_data, -}; - - -static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 30, 1); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 30, 1, val); - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 27, 1); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 27, 1, val); - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 29, 1); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 29, 1, val); - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 28, 1); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 28, 1, val); - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 31, 1); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 31, 1, val); - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 26, 1); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 26, 1, val); - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 7); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_reserved_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 7, val); - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 23, 3); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 23, 3, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_34_2_0_sflow_shim_1_t_fget[BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { - bcmpkt_sflow_shim_1_t_flag_dest_sample_get, - bcmpkt_sflow_shim_1_t_flag_discarded_get, - bcmpkt_sflow_shim_1_t_flag_flex_sample_get, - bcmpkt_sflow_shim_1_t_flag_mcast_get, - bcmpkt_sflow_shim_1_t_flag_src_sample_get, - bcmpkt_sflow_shim_1_t_flag_truncated_get, - bcmpkt_sflow_shim_1_t_reserved_get, - bcmpkt_sflow_shim_1_t_sys_opcode_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_34_2_0_sflow_shim_1_t_fset[BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { - bcmpkt_sflow_shim_1_t_flag_dest_sample_set, - bcmpkt_sflow_shim_1_t_flag_discarded_set, - bcmpkt_sflow_shim_1_t_flag_flex_sample_set, - bcmpkt_sflow_shim_1_t_flag_mcast_set, - bcmpkt_sflow_shim_1_t_flag_src_sample_set, - bcmpkt_sflow_shim_1_t_flag_truncated_set, - bcmpkt_sflow_shim_1_t_reserved_set, - bcmpkt_sflow_shim_1_t_sys_opcode_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_34_2_0_sflow_shim_1_t_field_data[] = { - BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_34_2_0_sflow_shim_1_t_field_info = { - .num_fields = BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT, - .info = bcm56780_a0_cna_6_5_34_2_0_sflow_shim_1_t_field_data, -}; - - -static int32_t bcmpkt_sflow_shim_2_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_sflow_shim_2_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_34_2_0_sflow_shim_2_t_fget[BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { - bcmpkt_sflow_shim_2_t_sequence_num_get, - bcmpkt_sflow_shim_2_t_user_meta_data_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_34_2_0_sflow_shim_2_t_fset[BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { - bcmpkt_sflow_shim_2_t_sequence_num_set, - bcmpkt_sflow_shim_2_t_user_meta_data_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_34_2_0_sflow_shim_2_t_field_data[] = { - BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_34_2_0_sflow_shim_2_t_field_info = { - .num_fields = BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT, - .info = bcm56780_a0_cna_6_5_34_2_0_sflow_shim_2_t_field_data, -}; - - -static int32_t bcmpkt_svtag_t_data_lwr_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_svtag_t_data_lwr_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_svtag_t_data_upr_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_svtag_t_data_upr_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_34_2_0_svtag_t_fget[BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_SVTAG_T_FID_COUNT] = { - bcmpkt_svtag_t_data_lwr_get, - bcmpkt_svtag_t_data_upr_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_34_2_0_svtag_t_fset[BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_SVTAG_T_FID_COUNT] = { - bcmpkt_svtag_t_data_lwr_set, - bcmpkt_svtag_t_data_upr_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_34_2_0_svtag_t_field_data[] = { - BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_SVTAG_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_34_2_0_svtag_t_field_info = { - .num_fields = BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_SVTAG_T_FID_COUNT, - .info = bcm56780_a0_cna_6_5_34_2_0_svtag_t_field_data, -}; - - -static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_tcp_first_4bytes_t_src_port_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_tcp_first_4bytes_t_src_port_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_34_2_0_tcp_first_4bytes_t_fget[BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { - bcmpkt_tcp_first_4bytes_t_dst_port_get, - bcmpkt_tcp_first_4bytes_t_src_port_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_34_2_0_tcp_first_4bytes_t_fset[BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { - bcmpkt_tcp_first_4bytes_t_dst_port_set, - bcmpkt_tcp_first_4bytes_t_src_port_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_34_2_0_tcp_first_4bytes_t_field_data[] = { - BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_34_2_0_tcp_first_4bytes_t_field_info = { - .num_fields = BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT, - .info = bcm56780_a0_cna_6_5_34_2_0_tcp_first_4bytes_t_field_data, -}; - - -static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[3], 16, 16); - - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_checksum_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[3], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 16, 16); - - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[3], 0, 16); - - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[3], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_win_size_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 0, 16); - - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_win_size_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 0, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_34_2_0_tcp_last_16bytes_t_fget[BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { - bcmpkt_tcp_last_16bytes_t_ack_num_get, - bcmpkt_tcp_last_16bytes_t_checksum_get, - bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get, - bcmpkt_tcp_last_16bytes_t_seq_num_get, - bcmpkt_tcp_last_16bytes_t_urgent_ptr_get, - bcmpkt_tcp_last_16bytes_t_win_size_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_34_2_0_tcp_last_16bytes_t_fset[BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { - bcmpkt_tcp_last_16bytes_t_ack_num_set, - bcmpkt_tcp_last_16bytes_t_checksum_set, - bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set, - bcmpkt_tcp_last_16bytes_t_seq_num_set, - bcmpkt_tcp_last_16bytes_t_urgent_ptr_set, - bcmpkt_tcp_last_16bytes_t_win_size_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_34_2_0_tcp_last_16bytes_t_field_data[] = { - BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_34_2_0_tcp_last_16bytes_t_field_info = { - .num_fields = BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT, - .info = bcm56780_a0_cna_6_5_34_2_0_tcp_last_16bytes_t_field_data, -}; - - -static int32_t bcmpkt_udp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 16); - - return ret; -} - -static int32_t bcmpkt_udp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_udp_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_udp_t_dst_port_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_udp_t_src_port_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_udp_t_src_port_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_udp_t_udp_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 16); - - return ret; -} - -static int32_t bcmpkt_udp_t_udp_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_34_2_0_udp_t_fget[BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_UDP_T_FID_COUNT] = { - bcmpkt_udp_t_checksum_get, - bcmpkt_udp_t_dst_port_get, - bcmpkt_udp_t_src_port_get, - bcmpkt_udp_t_udp_length_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_34_2_0_udp_t_fset[BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_UDP_T_FID_COUNT] = { - bcmpkt_udp_t_checksum_set, - bcmpkt_udp_t_dst_port_set, - bcmpkt_udp_t_src_port_set, - bcmpkt_udp_t_udp_length_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_34_2_0_udp_t_field_data[] = { - BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_34_2_0_udp_t_field_info = { - .num_fields = BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_UDP_T_FID_COUNT, - .info = bcm56780_a0_cna_6_5_34_2_0_udp_t_field_data, -}; - - -static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_34_2_0_unknown_l3_t_fget[BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { - bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get, - bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_34_2_0_unknown_l3_t_fset[BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { - bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set, - bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_34_2_0_unknown_l3_t_field_data[] = { - BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_34_2_0_unknown_l3_t_field_info = { - .num_fields = BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT, - .info = bcm56780_a0_cna_6_5_34_2_0_unknown_l3_t_field_data, -}; - - -static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_34_2_0_unknown_l4_t_fget[BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { - bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_34_2_0_unknown_l4_t_fset[BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { - bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_34_2_0_unknown_l4_t_field_data[] = { - BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_34_2_0_unknown_l4_t_field_info = { - .num_fields = BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT, - .info = bcm56780_a0_cna_6_5_34_2_0_unknown_l4_t_field_data, -}; - - -static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_34_2_0_unknown_l5_t_fget[BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { - bcmpkt_unknown_l5_t_l5_bytes_0_1_get, - bcmpkt_unknown_l5_t_l5_bytes_2_3_get, - bcmpkt_unknown_l5_t_l5_bytes_4_7_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_34_2_0_unknown_l5_t_fset[BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { - bcmpkt_unknown_l5_t_l5_bytes_0_1_set, - bcmpkt_unknown_l5_t_l5_bytes_2_3_set, - bcmpkt_unknown_l5_t_l5_bytes_4_7_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_34_2_0_unknown_l5_t_field_data[] = { - BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_34_2_0_unknown_l5_t_field_info = { - .num_fields = BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT, - .info = bcm56780_a0_cna_6_5_34_2_0_unknown_l5_t_field_data, -}; - - -static int32_t bcmpkt_vlan_t_cfi_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 12, 1); - - return ret; -} - -static int32_t bcmpkt_vlan_t_cfi_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 12, 1, val); - return ret; -} - -static int32_t bcmpkt_vlan_t_pcp_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 13, 3); - - return ret; -} - -static int32_t bcmpkt_vlan_t_pcp_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 13, 3, val); - return ret; -} - -static int32_t bcmpkt_vlan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_vlan_t_tpid_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_vlan_t_vid_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 12); - - return ret; -} - -static int32_t bcmpkt_vlan_t_vid_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 12, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_34_2_0_vlan_t_fget[BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_VLAN_T_FID_COUNT] = { - bcmpkt_vlan_t_cfi_get, - bcmpkt_vlan_t_pcp_get, - bcmpkt_vlan_t_tpid_get, - bcmpkt_vlan_t_vid_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_34_2_0_vlan_t_fset[BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_VLAN_T_FID_COUNT] = { - bcmpkt_vlan_t_cfi_set, - bcmpkt_vlan_t_pcp_set, - bcmpkt_vlan_t_tpid_set, - bcmpkt_vlan_t_vid_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_34_2_0_vlan_t_field_data[] = { - BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_34_2_0_vlan_t_field_info = { - .num_fields = BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_VLAN_T_FID_COUNT, - .info = bcm56780_a0_cna_6_5_34_2_0_vlan_t_field_data, -}; - - -static int32_t bcmpkt_vxlan_t_flags_reserved_1_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_vxlan_t_flags_reserved_1_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_vxlan_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 8); - - return ret; -} - -static int32_t bcmpkt_vxlan_t_reserved2_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 8, val); - return ret; -} - -static int32_t bcmpkt_vxlan_t_vn_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 8, 24); - - return ret; -} - -static int32_t bcmpkt_vxlan_t_vn_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 8, 24, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_cna_6_5_34_2_0_vxlan_t_fget[BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_VXLAN_T_FID_COUNT] = { - bcmpkt_vxlan_t_flags_reserved_1_get, - bcmpkt_vxlan_t_reserved2_get, - bcmpkt_vxlan_t_vn_id_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_cna_6_5_34_2_0_vxlan_t_fset[BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_VXLAN_T_FID_COUNT] = { - bcmpkt_vxlan_t_flags_reserved_1_set, - bcmpkt_vxlan_t_reserved2_set, - bcmpkt_vxlan_t_vn_id_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_cna_6_5_34_2_0_vxlan_t_field_data[] = { - BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_cna_6_5_34_2_0_vxlan_t_field_info = { - .num_fields = BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_VXLAN_T_FID_COUNT, - .info = bcm56780_a0_cna_6_5_34_2_0_vxlan_t_field_data, -}; - -static bcmpkt_flex_pmd_info_t bcm56780_a0_cna_6_5_34_2_0_flexhdr_info_list[BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_FLEXHDR_COUNT] = { - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_cna_6_5_34_2_0_arp_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_cna_6_5_34_2_0_arp_t_fget, - .flex_fset = bcm56780_a0_cna_6_5_34_2_0_arp_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_cna_6_5_34_2_0_cpu_composites_0_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_cna_6_5_34_2_0_cpu_composites_0_t_fget, - .flex_fset = bcm56780_a0_cna_6_5_34_2_0_cpu_composites_0_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_cna_6_5_34_2_0_cpu_composites_1_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_cna_6_5_34_2_0_cpu_composites_1_t_fget, - .flex_fset = bcm56780_a0_cna_6_5_34_2_0_cpu_composites_1_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_cna_6_5_34_2_0_ep_nih_header_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_cna_6_5_34_2_0_ep_nih_header_t_fget, - .flex_fset = bcm56780_a0_cna_6_5_34_2_0_ep_nih_header_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_cna_6_5_34_2_0_erspan3_fixed_hdr_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_cna_6_5_34_2_0_erspan3_fixed_hdr_t_fget, - .flex_fset = bcm56780_a0_cna_6_5_34_2_0_erspan3_fixed_hdr_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_cna_6_5_34_2_0_erspan3_subhdr_5_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_cna_6_5_34_2_0_erspan3_subhdr_5_t_fget, - .flex_fset = bcm56780_a0_cna_6_5_34_2_0_erspan3_subhdr_5_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_cna_6_5_34_2_0_ethertype_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_cna_6_5_34_2_0_ethertype_t_fget, - .flex_fset = bcm56780_a0_cna_6_5_34_2_0_ethertype_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_cna_6_5_34_2_0_generic_loopback_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_cna_6_5_34_2_0_generic_loopback_t_fget, - .flex_fset = bcm56780_a0_cna_6_5_34_2_0_generic_loopback_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_cna_6_5_34_2_0_icmp_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_cna_6_5_34_2_0_icmp_t_fget, - .flex_fset = bcm56780_a0_cna_6_5_34_2_0_icmp_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_cna_6_5_34_2_0_ifa_header_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_cna_6_5_34_2_0_ifa_header_t_fget, - .flex_fset = bcm56780_a0_cna_6_5_34_2_0_ifa_header_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_cna_6_5_34_2_0_ifa_metadata_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_cna_6_5_34_2_0_ifa_metadata_t_fget, - .flex_fset = bcm56780_a0_cna_6_5_34_2_0_ifa_metadata_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_cna_6_5_34_2_0_ipfix_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_cna_6_5_34_2_0_ipfix_t_fget, - .flex_fset = bcm56780_a0_cna_6_5_34_2_0_ipfix_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_cna_6_5_34_2_0_ipv4_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_cna_6_5_34_2_0_ipv4_t_fget, - .flex_fset = bcm56780_a0_cna_6_5_34_2_0_ipv4_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_cna_6_5_34_2_0_ipv6_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_cna_6_5_34_2_0_ipv6_t_fget, - .flex_fset = bcm56780_a0_cna_6_5_34_2_0_ipv6_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_cna_6_5_34_2_0_l2_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_cna_6_5_34_2_0_l2_t_fget, - .flex_fset = bcm56780_a0_cna_6_5_34_2_0_l2_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_cna_6_5_34_2_0_mirror_erspan_sn_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_cna_6_5_34_2_0_mirror_erspan_sn_t_fget, - .flex_fset = bcm56780_a0_cna_6_5_34_2_0_mirror_erspan_sn_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_cna_6_5_34_2_0_mirror_transport_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_cna_6_5_34_2_0_mirror_transport_t_fget, - .flex_fset = bcm56780_a0_cna_6_5_34_2_0_mirror_transport_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_cna_6_5_34_2_0_psamp_mirror_on_drop_0_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_cna_6_5_34_2_0_psamp_mirror_on_drop_0_t_fget, - .flex_fset = bcm56780_a0_cna_6_5_34_2_0_psamp_mirror_on_drop_0_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_cna_6_5_34_2_0_psamp_mirror_on_drop_3_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_cna_6_5_34_2_0_psamp_mirror_on_drop_3_t_fget, - .flex_fset = bcm56780_a0_cna_6_5_34_2_0_psamp_mirror_on_drop_3_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_cna_6_5_34_2_0_rarp_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_cna_6_5_34_2_0_rarp_t_fget, - .flex_fset = bcm56780_a0_cna_6_5_34_2_0_rarp_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_cna_6_5_34_2_0_sflow_shim_0_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_cna_6_5_34_2_0_sflow_shim_0_t_fget, - .flex_fset = bcm56780_a0_cna_6_5_34_2_0_sflow_shim_0_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_cna_6_5_34_2_0_sflow_shim_1_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_cna_6_5_34_2_0_sflow_shim_1_t_fget, - .flex_fset = bcm56780_a0_cna_6_5_34_2_0_sflow_shim_1_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_cna_6_5_34_2_0_sflow_shim_2_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_cna_6_5_34_2_0_sflow_shim_2_t_fget, - .flex_fset = bcm56780_a0_cna_6_5_34_2_0_sflow_shim_2_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_cna_6_5_34_2_0_svtag_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_cna_6_5_34_2_0_svtag_t_fget, - .flex_fset = bcm56780_a0_cna_6_5_34_2_0_svtag_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_cna_6_5_34_2_0_tcp_first_4bytes_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_cna_6_5_34_2_0_tcp_first_4bytes_t_fget, - .flex_fset = bcm56780_a0_cna_6_5_34_2_0_tcp_first_4bytes_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_cna_6_5_34_2_0_tcp_last_16bytes_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_cna_6_5_34_2_0_tcp_last_16bytes_t_fget, - .flex_fset = bcm56780_a0_cna_6_5_34_2_0_tcp_last_16bytes_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_cna_6_5_34_2_0_udp_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_cna_6_5_34_2_0_udp_t_fget, - .flex_fset = bcm56780_a0_cna_6_5_34_2_0_udp_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_cna_6_5_34_2_0_unknown_l3_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_cna_6_5_34_2_0_unknown_l3_t_fget, - .flex_fset = bcm56780_a0_cna_6_5_34_2_0_unknown_l3_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_cna_6_5_34_2_0_unknown_l4_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_cna_6_5_34_2_0_unknown_l4_t_fget, - .flex_fset = bcm56780_a0_cna_6_5_34_2_0_unknown_l4_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_cna_6_5_34_2_0_unknown_l5_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_cna_6_5_34_2_0_unknown_l5_t_fget, - .flex_fset = bcm56780_a0_cna_6_5_34_2_0_unknown_l5_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_cna_6_5_34_2_0_vlan_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_cna_6_5_34_2_0_vlan_t_fget, - .flex_fset = bcm56780_a0_cna_6_5_34_2_0_vlan_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_cna_6_5_34_2_0_vxlan_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_cna_6_5_34_2_0_vxlan_t_fget, - .flex_fset = bcm56780_a0_cna_6_5_34_2_0_vxlan_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_cna_6_5_34_2_0_rxpmd_flex_field_info, - .reasons_info = &bcm56780_a0_cna_6_5_34_2_0_rxpmd_flex_reasons_info, - .flex_common_fget = bcm56780_a0_rxpmd_flex_fget, - .flex_common_fset = bcm56780_a0_rxpmd_flex_fset, - }, -}; - -static shr_enum_map_t bcm56780_a0_cna_6_5_34_2_0_flexhdr_id_map[] = { - BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_FLEXHDR_NAME_MAP_INIT -}; - -shr_enum_map_t * bcm56780_a0_cna_6_5_34_2_0_flexhdr_map_get(void) -{ - return bcm56780_a0_cna_6_5_34_2_0_flexhdr_id_map; -} - -bcmpkt_flex_pmd_info_t * bcm56780_a0_cna_6_5_34_2_0_flex_pmd_info_get(uint32_t hid) -{ - if (hid >= BCM56780_A0_CNA_6_5_34_2_0_BCMPKT_FLEXHDR_COUNT) { - return NULL; - } - - return &bcm56780_a0_cna_6_5_34_2_0_flexhdr_info_list[hid]; -} - -int bcm56780_a0_cna_6_5_34_2_0_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = { - 7, - -1, - -1, - 32, -}; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/hna_6_5_34_2_0/bcm56780_a0_hna_6_5_34_2_0_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/hna_6_5_34_2_0/bcm56780_a0_hna_6_5_34_2_0_bcmpkt_rxpmd_match_id.c deleted file mode 100644 index aa368ee2ab5..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/hna_6_5_34_2_0/bcm56780_a0_hna_6_5_34_2_0_bcmpkt_rxpmd_match_id.c +++ /dev/null @@ -1,2409 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) bcm56780_a0_hna_6_5_34_2_0_sf_match_id_info.yml - * for device bcm56780_a0 and variant hna_6_5_34_2_0. - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - - -#include -#include - - -static bcmpkt_rxpmd_match_id_db_t -bcm56780_a0_hna_6_5_34_2_0_rxpmd_match_id_db[BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_COUNT] = { - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG */ - .name = "EGRESS_PKT_FWD_L2_HDR_ETAG", - .match = 0x40, - .match_mask = 0x60, - .match_maxbit = 29, - .match_minbit = 23, - .maxbit = 6, - .minbit = 5, - .value = 0x2, - .pmaxbit = 41, - .pminbit = 35, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */ - .name = "EGRESS_PKT_FWD_L2_HDR_ITAG", - .match = 0x10, - .match_mask = 0x10, - .match_maxbit = 29, - .match_minbit = 23, - .maxbit = 4, - .minbit = 4, - .value = 0x1, - .pmaxbit = 41, - .pminbit = 35, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */ - .name = "EGRESS_PKT_FWD_L2_HDR_L2", - .match = 0x1, - .match_mask = 0x1, - .match_maxbit = 29, - .match_minbit = 23, - .maxbit = 0, - .minbit = 0, - .value = 0x1, - .pmaxbit = 41, - .pminbit = 35, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */ - .name = "EGRESS_PKT_FWD_L2_HDR_NONE", - .match = 0x0, - .match_mask = 0x7f, - .match_maxbit = 29, - .match_minbit = 23, - .maxbit = 6, - .minbit = 0, - .value = 0x0, - .pmaxbit = 41, - .pminbit = 35, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */ - .name = "EGRESS_PKT_FWD_L2_HDR_OTAG", - .match = 0x8, - .match_mask = 0x8, - .match_maxbit = 29, - .match_minbit = 23, - .maxbit = 3, - .minbit = 3, - .value = 0x1, - .pmaxbit = 41, - .pminbit = 35, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC */ - .name = "EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", - .match = 0x2, - .match_mask = 0x2, - .match_maxbit = 29, - .match_minbit = 23, - .maxbit = 1, - .minbit = 1, - .value = 0x1, - .pmaxbit = 41, - .pminbit = 35, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG */ - .name = "EGRESS_PKT_FWD_L2_HDR_SVTAG", - .match = 0x4, - .match_mask = 0x4, - .match_maxbit = 29, - .match_minbit = 23, - .maxbit = 2, - .minbit = 2, - .value = 0x1, - .pmaxbit = 41, - .pminbit = 35, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG */ - .name = "EGRESS_PKT_FWD_L2_HDR_VNTAG", - .match = 0x20, - .match_mask = 0x60, - .match_maxbit = 29, - .match_minbit = 23, - .maxbit = 6, - .minbit = 5, - .value = 0x1, - .pmaxbit = 41, - .pminbit = 35, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_ARP", - .match = 0x100, - .match_mask = 0x7b0, - .match_maxbit = 43, - .match_minbit = 30, - .maxbit = 10, - .minbit = 8, - .value = 0x1, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_BFD", - .match = 0x3800, - .match_mask = 0x3800, - .match_maxbit = 43, - .match_minbit = 30, - .maxbit = 13, - .minbit = 11, - .value = 0x7, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", - .match = 0x800, - .match_mask = 0x380c, - .match_maxbit = 43, - .match_minbit = 30, - .maxbit = 13, - .minbit = 11, - .value = 0x1, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", - .match = 0x1, - .match_mask = 0x1, - .match_maxbit = 43, - .match_minbit = 30, - .maxbit = 0, - .minbit = 0, - .value = 0x1, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", - .match = 0x120, - .match_mask = 0x7b0, - .match_maxbit = 43, - .match_minbit = 30, - .maxbit = 10, - .minbit = 8, - .value = 0x1, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", - .match = 0x420, - .match_mask = 0x7b0, - .match_maxbit = 43, - .match_minbit = 30, - .maxbit = 10, - .minbit = 8, - .value = 0x4, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_GPE", - .match = 0x200c, - .match_mask = 0x388c, - .match_maxbit = 43, - .match_minbit = 30, - .maxbit = 13, - .minbit = 11, - .value = 0x4, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE", - .match = 0x2, - .match_mask = 0x82, - .match_maxbit = 43, - .match_minbit = 30, - .maxbit = 1, - .minbit = 1, - .value = 0x1, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", - .match = 0x1800, - .match_mask = 0x3800, - .match_maxbit = 43, - .match_minbit = 30, - .maxbit = 13, - .minbit = 11, - .value = 0x3, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", - .match = 0x8, - .match_mask = 0x8c, - .match_maxbit = 43, - .match_minbit = 30, - .maxbit = 3, - .minbit = 2, - .value = 0x2, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", - .match = 0x300, - .match_mask = 0x780, - .match_maxbit = 43, - .match_minbit = 30, - .maxbit = 10, - .minbit = 8, - .value = 0x3, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", - .match = 0x40, - .match_mask = 0xc0, - .match_maxbit = 43, - .match_minbit = 30, - .maxbit = 6, - .minbit = 6, - .value = 0x1, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_ICMP", - .match = 0x2000, - .match_mask = 0x380c, - .match_maxbit = 43, - .match_minbit = 30, - .maxbit = 13, - .minbit = 11, - .value = 0x4, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA", - .match = 0x700, - .match_mask = 0x780, - .match_maxbit = 43, - .match_minbit = 30, - .maxbit = 10, - .minbit = 8, - .value = 0x7, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_IGMP", - .match = 0x200, - .match_mask = 0x780, - .match_maxbit = 43, - .match_minbit = 30, - .maxbit = 10, - .minbit = 8, - .value = 0x2, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV4", - .match = 0x10, - .match_mask = 0xb0, - .match_maxbit = 43, - .match_minbit = 30, - .maxbit = 5, - .minbit = 4, - .value = 0x1, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV6", - .match = 0x20, - .match_mask = 0xb0, - .match_maxbit = 43, - .match_minbit = 30, - .maxbit = 5, - .minbit = 4, - .value = 0x2, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", - .match = 0x80, - .match_mask = 0x80, - .match_maxbit = 43, - .match_minbit = 30, - .maxbit = 7, - .minbit = 7, - .value = 0x1, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", - .match = 0x82, - .match_mask = 0x82, - .match_maxbit = 43, - .match_minbit = 30, - .maxbit = 1, - .minbit = 1, - .value = 0x1, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", - .match = 0x84, - .match_mask = 0x84, - .match_maxbit = 43, - .match_minbit = 30, - .maxbit = 2, - .minbit = 2, - .value = 0x1, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", - .match = 0x88, - .match_mask = 0x88, - .match_maxbit = 43, - .match_minbit = 30, - .maxbit = 3, - .minbit = 3, - .value = 0x1, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", - .match = 0x90, - .match_mask = 0x90, - .match_maxbit = 43, - .match_minbit = 30, - .maxbit = 4, - .minbit = 4, - .value = 0x1, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", - .match = 0xa0, - .match_mask = 0xa0, - .match_maxbit = 43, - .match_minbit = 30, - .maxbit = 5, - .minbit = 5, - .value = 0x1, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", - .match = 0xc0, - .match_mask = 0xc0, - .match_maxbit = 43, - .match_minbit = 30, - .maxbit = 6, - .minbit = 6, - .value = 0x1, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", - .match = 0x180, - .match_mask = 0x180, - .match_maxbit = 43, - .match_minbit = 30, - .maxbit = 8, - .minbit = 8, - .value = 0x1, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", - .match = 0x280, - .match_mask = 0x280, - .match_maxbit = 43, - .match_minbit = 30, - .maxbit = 9, - .minbit = 9, - .value = 0x1, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_NONE", - .match = 0x0, - .match_mask = 0x3fff, - .match_maxbit = 43, - .match_minbit = 30, - .maxbit = 13, - .minbit = 0, - .value = 0x0, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_P_1588", - .match = 0x3000, - .match_mask = 0x3800, - .match_maxbit = 43, - .match_minbit = 30, - .maxbit = 13, - .minbit = 11, - .value = 0x6, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_RARP", - .match = 0x400, - .match_mask = 0x7b0, - .match_maxbit = 43, - .match_minbit = 30, - .maxbit = 10, - .minbit = 8, - .value = 0x4, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", - .match = 0x4, - .match_mask = 0x8c, - .match_maxbit = 43, - .match_minbit = 30, - .maxbit = 3, - .minbit = 2, - .value = 0x1, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", - .match = 0x804, - .match_mask = 0x388c, - .match_maxbit = 43, - .match_minbit = 30, - .maxbit = 13, - .minbit = 11, - .value = 0x1, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_UDP", - .match = 0xc, - .match_mask = 0x8c, - .match_maxbit = 43, - .match_minbit = 30, - .maxbit = 3, - .minbit = 2, - .value = 0x3, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDPIPSEC */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_UDPIPSEC", - .match = 0x600, - .match_mask = 0x780, - .match_maxbit = 43, - .match_minbit = 30, - .maxbit = 10, - .minbit = 8, - .value = 0x6, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", - .match = 0x500, - .match_mask = 0x780, - .match_maxbit = 43, - .match_minbit = 30, - .maxbit = 10, - .minbit = 8, - .value = 0x5, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", - .match = 0x2800, - .match_mask = 0x380c, - .match_maxbit = 43, - .match_minbit = 30, - .maxbit = 13, - .minbit = 11, - .value = 0x5, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", - .match = 0x280c, - .match_mask = 0x388c, - .match_maxbit = 43, - .match_minbit = 30, - .maxbit = 13, - .minbit = 11, - .value = 0x5, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", - .match = 0x1000, - .match_mask = 0x3800, - .match_maxbit = 43, - .match_minbit = 30, - .maxbit = 13, - .minbit = 11, - .value = 0x2, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH */ - .name = "EGRESS_PKT_SYS_HDR_EP_NIH", - .match = 0x2, - .match_mask = 0x3, - .match_maxbit = 1, - .match_minbit = 0, - .maxbit = 1, - .minbit = 0, - .value = 0x2, - .pmaxbit = 1, - .pminbit = 0, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */ - .name = "EGRESS_PKT_SYS_HDR_LOOPBACK", - .match = 0x1, - .match_mask = 0x3, - .match_maxbit = 1, - .match_minbit = 0, - .maxbit = 1, - .minbit = 0, - .value = 0x1, - .pmaxbit = 1, - .pminbit = 0, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */ - .name = "EGRESS_PKT_SYS_HDR_NONE", - .match = 0x0, - .match_mask = 0x3, - .match_maxbit = 1, - .match_minbit = 0, - .maxbit = 1, - .minbit = 0, - .value = 0x0, - .pmaxbit = 1, - .pminbit = 0, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG */ - .name = "EGRESS_PKT_TUNNEL_L2_HDR_ETAG", - .match = 0x40, - .match_mask = 0x60, - .match_maxbit = 8, - .match_minbit = 2, - .maxbit = 6, - .minbit = 5, - .value = 0x2, - .pmaxbit = 13, - .pminbit = 7, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */ - .name = "EGRESS_PKT_TUNNEL_L2_HDR_ITAG", - .match = 0x10, - .match_mask = 0x10, - .match_maxbit = 8, - .match_minbit = 2, - .maxbit = 4, - .minbit = 4, - .value = 0x1, - .pmaxbit = 13, - .pminbit = 7, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */ - .name = "EGRESS_PKT_TUNNEL_L2_HDR_L2", - .match = 0x1, - .match_mask = 0x1, - .match_maxbit = 8, - .match_minbit = 2, - .maxbit = 0, - .minbit = 0, - .value = 0x1, - .pmaxbit = 13, - .pminbit = 7, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */ - .name = "EGRESS_PKT_TUNNEL_L2_HDR_NONE", - .match = 0x0, - .match_mask = 0x7f, - .match_maxbit = 8, - .match_minbit = 2, - .maxbit = 6, - .minbit = 0, - .value = 0x0, - .pmaxbit = 13, - .pminbit = 7, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */ - .name = "EGRESS_PKT_TUNNEL_L2_HDR_OTAG", - .match = 0x8, - .match_mask = 0x8, - .match_maxbit = 8, - .match_minbit = 2, - .maxbit = 3, - .minbit = 3, - .value = 0x1, - .pmaxbit = 13, - .pminbit = 7, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC */ - .name = "EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", - .match = 0x2, - .match_mask = 0x2, - .match_maxbit = 8, - .match_minbit = 2, - .maxbit = 1, - .minbit = 1, - .value = 0x1, - .pmaxbit = 13, - .pminbit = 7, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG */ - .name = "EGRESS_PKT_TUNNEL_L2_HDR_SVTAG", - .match = 0x4, - .match_mask = 0x4, - .match_maxbit = 8, - .match_minbit = 2, - .maxbit = 2, - .minbit = 2, - .value = 0x1, - .pmaxbit = 13, - .pminbit = 7, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG */ - .name = "EGRESS_PKT_TUNNEL_L2_HDR_VNTAG", - .match = 0x20, - .match_mask = 0x60, - .match_maxbit = 8, - .match_minbit = 2, - .maxbit = 6, - .minbit = 5, - .value = 0x1, - .pmaxbit = 13, - .pminbit = 7, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", - .match = 0x100, - .match_mask = 0x7b0, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 10, - .minbit = 8, - .value = 0x1, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", - .match = 0x3800, - .match_mask = 0x3800, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 13, - .minbit = 11, - .value = 0x7, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", - .match = 0x800, - .match_mask = 0x380c, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 13, - .minbit = 11, - .value = 0x1, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", - .match = 0x1, - .match_mask = 0x1, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 0, - .minbit = 0, - .value = 0x1, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", - .match = 0x120, - .match_mask = 0x7b0, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 10, - .minbit = 8, - .value = 0x1, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", - .match = 0x420, - .match_mask = 0x7b0, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 10, - .minbit = 8, - .value = 0x4, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", - .match = 0x200c, - .match_mask = 0x388c, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 13, - .minbit = 11, - .value = 0x4, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", - .match = 0x2, - .match_mask = 0x82, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 1, - .minbit = 1, - .value = 0x1, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", - .match = 0x1800, - .match_mask = 0x3800, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 13, - .minbit = 11, - .value = 0x3, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", - .match = 0x8, - .match_mask = 0x8c, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 3, - .minbit = 2, - .value = 0x2, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", - .match = 0x300, - .match_mask = 0x780, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 10, - .minbit = 8, - .value = 0x3, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", - .match = 0x40, - .match_mask = 0xc0, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 6, - .minbit = 6, - .value = 0x1, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", - .match = 0x2000, - .match_mask = 0x380c, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 13, - .minbit = 11, - .value = 0x4, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA", - .match = 0x700, - .match_mask = 0x780, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 10, - .minbit = 8, - .value = 0x7, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", - .match = 0x200, - .match_mask = 0x780, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 10, - .minbit = 8, - .value = 0x2, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", - .match = 0x10, - .match_mask = 0xb0, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 5, - .minbit = 4, - .value = 0x1, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", - .match = 0x20, - .match_mask = 0xb0, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 5, - .minbit = 4, - .value = 0x2, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", - .match = 0x80, - .match_mask = 0x80, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 7, - .minbit = 7, - .value = 0x1, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", - .match = 0x82, - .match_mask = 0x82, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 1, - .minbit = 1, - .value = 0x1, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", - .match = 0x84, - .match_mask = 0x84, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 2, - .minbit = 2, - .value = 0x1, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", - .match = 0x88, - .match_mask = 0x88, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 3, - .minbit = 3, - .value = 0x1, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", - .match = 0x90, - .match_mask = 0x90, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 4, - .minbit = 4, - .value = 0x1, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", - .match = 0xa0, - .match_mask = 0xa0, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 5, - .minbit = 5, - .value = 0x1, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", - .match = 0xc0, - .match_mask = 0xc0, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 6, - .minbit = 6, - .value = 0x1, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", - .match = 0x180, - .match_mask = 0x180, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 8, - .minbit = 8, - .value = 0x1, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", - .match = 0x280, - .match_mask = 0x280, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 9, - .minbit = 9, - .value = 0x1, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", - .match = 0x0, - .match_mask = 0x3fff, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 13, - .minbit = 0, - .value = 0x0, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", - .match = 0x3000, - .match_mask = 0x3800, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 13, - .minbit = 11, - .value = 0x6, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", - .match = 0x400, - .match_mask = 0x7b0, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 10, - .minbit = 8, - .value = 0x4, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", - .match = 0x4, - .match_mask = 0x8c, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 3, - .minbit = 2, - .value = 0x1, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", - .match = 0x804, - .match_mask = 0x388c, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 13, - .minbit = 11, - .value = 0x1, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", - .match = 0xc, - .match_mask = 0x8c, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 3, - .minbit = 2, - .value = 0x3, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDPIPSEC */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UDPIPSEC", - .match = 0x600, - .match_mask = 0x780, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 10, - .minbit = 8, - .value = 0x6, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", - .match = 0x500, - .match_mask = 0x780, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 10, - .minbit = 8, - .value = 0x5, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", - .match = 0x2800, - .match_mask = 0x380c, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 13, - .minbit = 11, - .value = 0x5, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", - .match = 0x280c, - .match_mask = 0x388c, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 13, - .minbit = 11, - .value = 0x5, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", - .match = 0x1000, - .match_mask = 0x3800, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 13, - .minbit = 11, - .value = 0x2, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG */ - .name = "INGRESS_PKT_INNER_L2_HDR_ETAG", - .match = 0x40, - .match_mask = 0x60, - .match_maxbit = 29, - .match_minbit = 23, - .maxbit = 6, - .minbit = 5, - .value = 0x2, - .pmaxbit = 29, - .pminbit = 23, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */ - .name = "INGRESS_PKT_INNER_L2_HDR_ITAG", - .match = 0x10, - .match_mask = 0x10, - .match_maxbit = 29, - .match_minbit = 23, - .maxbit = 4, - .minbit = 4, - .value = 0x1, - .pmaxbit = 29, - .pminbit = 23, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */ - .name = "INGRESS_PKT_INNER_L2_HDR_L2", - .match = 0x1, - .match_mask = 0x1, - .match_maxbit = 29, - .match_minbit = 23, - .maxbit = 0, - .minbit = 0, - .value = 0x1, - .pmaxbit = 29, - .pminbit = 23, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */ - .name = "INGRESS_PKT_INNER_L2_HDR_NONE", - .match = 0x0, - .match_mask = 0x7f, - .match_maxbit = 29, - .match_minbit = 23, - .maxbit = 6, - .minbit = 0, - .value = 0x0, - .pmaxbit = 29, - .pminbit = 23, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */ - .name = "INGRESS_PKT_INNER_L2_HDR_OTAG", - .match = 0x8, - .match_mask = 0x8, - .match_maxbit = 29, - .match_minbit = 23, - .maxbit = 3, - .minbit = 3, - .value = 0x1, - .pmaxbit = 29, - .pminbit = 23, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC */ - .name = "INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", - .match = 0x2, - .match_mask = 0x2, - .match_maxbit = 29, - .match_minbit = 23, - .maxbit = 1, - .minbit = 1, - .value = 0x1, - .pmaxbit = 29, - .pminbit = 23, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG */ - .name = "INGRESS_PKT_INNER_L2_HDR_VNTAG", - .match = 0x20, - .match_mask = 0x60, - .match_maxbit = 29, - .match_minbit = 23, - .maxbit = 6, - .minbit = 5, - .value = 0x1, - .pmaxbit = 29, - .pminbit = 23, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_ARP", - .match = 0x100, - .match_mask = 0x7b0, - .match_maxbit = 43, - .match_minbit = 30, - .maxbit = 10, - .minbit = 8, - .value = 0x1, - .pmaxbit = 43, - .pminbit = 30, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_BFD", - .match = 0x3800, - .match_mask = 0x3800, - .match_maxbit = 43, - .match_minbit = 30, - .maxbit = 13, - .minbit = 11, - .value = 0x7, - .pmaxbit = 43, - .pminbit = 30, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", - .match = 0x800, - .match_mask = 0x380c, - .match_maxbit = 43, - .match_minbit = 30, - .maxbit = 13, - .minbit = 11, - .value = 0x1, - .pmaxbit = 43, - .pminbit = 30, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", - .match = 0x1, - .match_mask = 0x1, - .match_maxbit = 43, - .match_minbit = 30, - .maxbit = 0, - .minbit = 0, - .value = 0x1, - .pmaxbit = 43, - .pminbit = 30, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", - .match = 0x120, - .match_mask = 0x7b0, - .match_maxbit = 43, - .match_minbit = 30, - .maxbit = 10, - .minbit = 8, - .value = 0x1, - .pmaxbit = 43, - .pminbit = 30, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", - .match = 0x420, - .match_mask = 0x7b0, - .match_maxbit = 43, - .match_minbit = 30, - .maxbit = 10, - .minbit = 8, - .value = 0x4, - .pmaxbit = 43, - .pminbit = 30, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_ICMP", - .match = 0x2000, - .match_mask = 0x380c, - .match_maxbit = 43, - .match_minbit = 30, - .maxbit = 13, - .minbit = 11, - .value = 0x4, - .pmaxbit = 43, - .pminbit = 30, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA", - .match = 0x700, - .match_mask = 0x780, - .match_maxbit = 43, - .match_minbit = 30, - .maxbit = 10, - .minbit = 8, - .value = 0x7, - .pmaxbit = 43, - .pminbit = 30, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_IGMP", - .match = 0x200, - .match_mask = 0x780, - .match_maxbit = 43, - .match_minbit = 30, - .maxbit = 10, - .minbit = 8, - .value = 0x2, - .pmaxbit = 43, - .pminbit = 30, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV4", - .match = 0x10, - .match_mask = 0xb0, - .match_maxbit = 43, - .match_minbit = 30, - .maxbit = 5, - .minbit = 4, - .value = 0x1, - .pmaxbit = 43, - .pminbit = 30, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV6", - .match = 0x20, - .match_mask = 0xb0, - .match_maxbit = 43, - .match_minbit = 30, - .maxbit = 5, - .minbit = 4, - .value = 0x2, - .pmaxbit = 43, - .pminbit = 30, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_NONE", - .match = 0x0, - .match_mask = 0x3fff, - .match_maxbit = 43, - .match_minbit = 30, - .maxbit = 13, - .minbit = 0, - .value = 0x0, - .pmaxbit = 43, - .pminbit = 30, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_P_1588", - .match = 0x3000, - .match_mask = 0x3800, - .match_maxbit = 43, - .match_minbit = 30, - .maxbit = 13, - .minbit = 11, - .value = 0x6, - .pmaxbit = 43, - .pminbit = 30, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_RARP", - .match = 0x400, - .match_mask = 0x7b0, - .match_maxbit = 43, - .match_minbit = 30, - .maxbit = 10, - .minbit = 8, - .value = 0x4, - .pmaxbit = 43, - .pminbit = 30, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", - .match = 0x4, - .match_mask = 0x8c, - .match_maxbit = 43, - .match_minbit = 30, - .maxbit = 3, - .minbit = 2, - .value = 0x1, - .pmaxbit = 43, - .pminbit = 30, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", - .match = 0x804, - .match_mask = 0x388c, - .match_maxbit = 43, - .match_minbit = 30, - .maxbit = 13, - .minbit = 11, - .value = 0x1, - .pmaxbit = 43, - .pminbit = 30, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_UDP", - .match = 0xc, - .match_mask = 0x8c, - .match_maxbit = 43, - .match_minbit = 30, - .maxbit = 3, - .minbit = 2, - .value = 0x3, - .pmaxbit = 43, - .pminbit = 30, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", - .match = 0x500, - .match_mask = 0x780, - .match_maxbit = 43, - .match_minbit = 30, - .maxbit = 10, - .minbit = 8, - .value = 0x5, - .pmaxbit = 43, - .pminbit = 30, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", - .match = 0x2800, - .match_mask = 0x380c, - .match_maxbit = 43, - .match_minbit = 30, - .maxbit = 13, - .minbit = 11, - .value = 0x5, - .pmaxbit = 43, - .pminbit = 30, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", - .match = 0x280c, - .match_mask = 0x388c, - .match_maxbit = 43, - .match_minbit = 30, - .maxbit = 13, - .minbit = 11, - .value = 0x5, - .pmaxbit = 43, - .pminbit = 30, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG */ - .name = "INGRESS_PKT_OUTER_L2_HDR_ETAG", - .match = 0x40, - .match_mask = 0x60, - .match_maxbit = 8, - .match_minbit = 2, - .maxbit = 6, - .minbit = 5, - .value = 0x2, - .pmaxbit = 8, - .pminbit = 2, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */ - .name = "INGRESS_PKT_OUTER_L2_HDR_ITAG", - .match = 0x10, - .match_mask = 0x10, - .match_maxbit = 8, - .match_minbit = 2, - .maxbit = 4, - .minbit = 4, - .value = 0x1, - .pmaxbit = 8, - .pminbit = 2, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */ - .name = "INGRESS_PKT_OUTER_L2_HDR_L2", - .match = 0x1, - .match_mask = 0x1, - .match_maxbit = 8, - .match_minbit = 2, - .maxbit = 0, - .minbit = 0, - .value = 0x1, - .pmaxbit = 8, - .pminbit = 2, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */ - .name = "INGRESS_PKT_OUTER_L2_HDR_NONE", - .match = 0x0, - .match_mask = 0x7f, - .match_maxbit = 8, - .match_minbit = 2, - .maxbit = 6, - .minbit = 0, - .value = 0x0, - .pmaxbit = 8, - .pminbit = 2, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */ - .name = "INGRESS_PKT_OUTER_L2_HDR_OTAG", - .match = 0x8, - .match_mask = 0x8, - .match_maxbit = 8, - .match_minbit = 2, - .maxbit = 3, - .minbit = 3, - .value = 0x1, - .pmaxbit = 8, - .pminbit = 2, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC */ - .name = "INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", - .match = 0x2, - .match_mask = 0x2, - .match_maxbit = 8, - .match_minbit = 2, - .maxbit = 1, - .minbit = 1, - .value = 0x1, - .pmaxbit = 8, - .pminbit = 2, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG */ - .name = "INGRESS_PKT_OUTER_L2_HDR_SVTAG", - .match = 0x4, - .match_mask = 0x4, - .match_maxbit = 8, - .match_minbit = 2, - .maxbit = 2, - .minbit = 2, - .value = 0x1, - .pmaxbit = 8, - .pminbit = 2, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG */ - .name = "INGRESS_PKT_OUTER_L2_HDR_VNTAG", - .match = 0x20, - .match_mask = 0x60, - .match_maxbit = 8, - .match_minbit = 2, - .maxbit = 6, - .minbit = 5, - .value = 0x1, - .pmaxbit = 8, - .pminbit = 2, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ARP", - .match = 0x100, - .match_mask = 0x7b0, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 10, - .minbit = 8, - .value = 0x1, - .pmaxbit = 22, - .pminbit = 9, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_BFD", - .match = 0x3800, - .match_mask = 0x3800, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 13, - .minbit = 11, - .value = 0x7, - .pmaxbit = 22, - .pminbit = 9, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", - .match = 0x800, - .match_mask = 0x380c, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 13, - .minbit = 11, - .value = 0x1, - .pmaxbit = 22, - .pminbit = 9, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", - .match = 0x1, - .match_mask = 0x1, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 0, - .minbit = 0, - .value = 0x1, - .pmaxbit = 22, - .pminbit = 9, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", - .match = 0x120, - .match_mask = 0x7b0, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 10, - .minbit = 8, - .value = 0x1, - .pmaxbit = 22, - .pminbit = 9, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", - .match = 0x420, - .match_mask = 0x7b0, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 10, - .minbit = 8, - .value = 0x4, - .pmaxbit = 22, - .pminbit = 9, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GPE", - .match = 0x200c, - .match_mask = 0x388c, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 13, - .minbit = 11, - .value = 0x4, - .pmaxbit = 22, - .pminbit = 9, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE", - .match = 0x2, - .match_mask = 0x82, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 1, - .minbit = 1, - .value = 0x1, - .pmaxbit = 22, - .pminbit = 9, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", - .match = 0x1800, - .match_mask = 0x3800, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 13, - .minbit = 11, - .value = 0x3, - .pmaxbit = 22, - .pminbit = 9, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", - .match = 0x8, - .match_mask = 0x8c, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 3, - .minbit = 2, - .value = 0x2, - .pmaxbit = 22, - .pminbit = 9, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", - .match = 0x300, - .match_mask = 0x780, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 10, - .minbit = 8, - .value = 0x3, - .pmaxbit = 22, - .pminbit = 9, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", - .match = 0x40, - .match_mask = 0xc0, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 6, - .minbit = 6, - .value = 0x1, - .pmaxbit = 22, - .pminbit = 9, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", - .match = 0x2000, - .match_mask = 0x380c, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 13, - .minbit = 11, - .value = 0x4, - .pmaxbit = 22, - .pminbit = 9, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA", - .match = 0x700, - .match_mask = 0x780, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 10, - .minbit = 8, - .value = 0x7, - .pmaxbit = 22, - .pminbit = 9, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", - .match = 0x200, - .match_mask = 0x780, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 10, - .minbit = 8, - .value = 0x2, - .pmaxbit = 22, - .pminbit = 9, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", - .match = 0x10, - .match_mask = 0xb0, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 5, - .minbit = 4, - .value = 0x1, - .pmaxbit = 22, - .pminbit = 9, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", - .match = 0x20, - .match_mask = 0xb0, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 5, - .minbit = 4, - .value = 0x2, - .pmaxbit = 22, - .pminbit = 9, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", - .match = 0x80, - .match_mask = 0x80, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 7, - .minbit = 7, - .value = 0x1, - .pmaxbit = 22, - .pminbit = 9, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", - .match = 0x82, - .match_mask = 0x82, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 1, - .minbit = 1, - .value = 0x1, - .pmaxbit = 22, - .pminbit = 9, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", - .match = 0x84, - .match_mask = 0x84, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 2, - .minbit = 2, - .value = 0x1, - .pmaxbit = 22, - .pminbit = 9, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", - .match = 0x88, - .match_mask = 0x88, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 3, - .minbit = 3, - .value = 0x1, - .pmaxbit = 22, - .pminbit = 9, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", - .match = 0x90, - .match_mask = 0x90, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 4, - .minbit = 4, - .value = 0x1, - .pmaxbit = 22, - .pminbit = 9, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", - .match = 0xa0, - .match_mask = 0xa0, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 5, - .minbit = 5, - .value = 0x1, - .pmaxbit = 22, - .pminbit = 9, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", - .match = 0xc0, - .match_mask = 0xc0, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 6, - .minbit = 6, - .value = 0x1, - .pmaxbit = 22, - .pminbit = 9, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", - .match = 0x180, - .match_mask = 0x180, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 8, - .minbit = 8, - .value = 0x1, - .pmaxbit = 22, - .pminbit = 9, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", - .match = 0x280, - .match_mask = 0x280, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 9, - .minbit = 9, - .value = 0x1, - .pmaxbit = 22, - .pminbit = 9, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_NONE", - .match = 0x0, - .match_mask = 0x3fff, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 13, - .minbit = 0, - .value = 0x0, - .pmaxbit = 22, - .pminbit = 9, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", - .match = 0x3000, - .match_mask = 0x3800, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 13, - .minbit = 11, - .value = 0x6, - .pmaxbit = 22, - .pminbit = 9, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_RARP", - .match = 0x400, - .match_mask = 0x7b0, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 10, - .minbit = 8, - .value = 0x4, - .pmaxbit = 22, - .pminbit = 9, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", - .match = 0x4, - .match_mask = 0x8c, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 3, - .minbit = 2, - .value = 0x1, - .pmaxbit = 22, - .pminbit = 9, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", - .match = 0x804, - .match_mask = 0x388c, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 13, - .minbit = 11, - .value = 0x1, - .pmaxbit = 22, - .pminbit = 9, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UDP", - .match = 0xc, - .match_mask = 0x8c, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 3, - .minbit = 2, - .value = 0x3, - .pmaxbit = 22, - .pminbit = 9, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDPIPSEC */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UDPIPSEC", - .match = 0x600, - .match_mask = 0x780, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 10, - .minbit = 8, - .value = 0x6, - .pmaxbit = 22, - .pminbit = 9, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", - .match = 0x500, - .match_mask = 0x780, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 10, - .minbit = 8, - .value = 0x5, - .pmaxbit = 22, - .pminbit = 9, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", - .match = 0x2800, - .match_mask = 0x380c, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 13, - .minbit = 11, - .value = 0x5, - .pmaxbit = 22, - .pminbit = 9, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", - .match = 0x280c, - .match_mask = 0x388c, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 13, - .minbit = 11, - .value = 0x5, - .pmaxbit = 22, - .pminbit = 9, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", - .match = 0x1000, - .match_mask = 0x3800, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 13, - .minbit = 11, - .value = 0x2, - .pmaxbit = 22, - .pminbit = 9, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH */ - .name = "INGRESS_PKT_SYS_HDR_EP_NIH", - .match = 0x2, - .match_mask = 0x3, - .match_maxbit = 1, - .match_minbit = 0, - .maxbit = 1, - .minbit = 0, - .value = 0x2, - .pmaxbit = 1, - .pminbit = 0, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */ - .name = "INGRESS_PKT_SYS_HDR_LOOPBACK", - .match = 0x1, - .match_mask = 0x3, - .match_maxbit = 1, - .match_minbit = 0, - .maxbit = 1, - .minbit = 0, - .value = 0x1, - .pmaxbit = 1, - .pminbit = 0, - - }, - { - /* BCM56780_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */ - .name = "INGRESS_PKT_SYS_HDR_NONE", - .match = 0x0, - .match_mask = 0x3, - .match_maxbit = 1, - .match_minbit = 0, - .maxbit = 1, - .minbit = 0, - .value = 0x0, - .pmaxbit = 1, - .pminbit = 0, - - }, -}; - -static bcmpkt_rxpmd_match_id_db_info_t bcm56780_a0_hna_6_5_34_2_0_rxpmd_match_id_db_info = { - .num_entries = 168, - .db = bcm56780_a0_hna_6_5_34_2_0_rxpmd_match_id_db -}; -bcmpkt_rxpmd_match_id_db_info_t * bcm56780_a0_hna_6_5_34_2_0_rxpmd_match_id_db_info_get(void) { - return &bcm56780_a0_hna_6_5_34_2_0_rxpmd_match_id_db_info; -} - -static shr_enum_map_t bcm56780_a0_hna_6_5_34_2_0_rxpmd_match_id_map[] = { - BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_rxpmd_match_id_map_info_t bcm56780_a0_hna_6_5_34_2_0_rxpmd_match_id_map_info = { - .num_entries = 168, - .map = bcm56780_a0_hna_6_5_34_2_0_rxpmd_match_id_map -}; - -bcmpkt_rxpmd_match_id_map_info_t * bcm56780_a0_hna_6_5_34_2_0_rxpmd_match_id_map_info_get(void) { - return &bcm56780_a0_hna_6_5_34_2_0_rxpmd_match_id_map_info; -} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/hna_6_5_34_2_0/bcm56780_a0_hna_6_5_34_2_0_pkt_flexhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/hna_6_5_34_2_0/bcm56780_a0_hna_6_5_34_2_0_pkt_flexhdr.c deleted file mode 100644 index 48c7deaa8cd..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56780_a0/hna_6_5_34_2_0/bcm56780_a0_hna_6_5_34_2_0_pkt_flexhdr.c +++ /dev/null @@ -1,9194 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) map.yml - * for device bcm56780_a0 and variant hna_6_5_34_2_0. - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - -#include -#include -#include -#include -#include -#include -#include - -#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) -#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) -#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) -#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) - -static void bcm56780_a0_hna_6_5_34_2_0_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons) -{ - uint32_t *reason = data + 0; - - if (reason[13] & (0x1 << 0)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU); - } - if (reason[13] & (0x1 << 1)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS); - } - if (reason[13] & (0x1 << 2)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE); - } - if (reason[13] & (0x1 << 3)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT); - } - if (reason[13] & (0x1 << 4)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD); - } - if (reason[13] & (0x1 << 5)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED); - } - if (reason[13] & (0x1 << 6)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT); - } - if (reason[13] & (0x1 << 7)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD); - } - if (reason[13] & (0x1 << 8)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD); - } - if (reason[13] & (0x1 << 9)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS); - } - if (reason[13] & (0x1 << 10)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP); - } - if (reason[13] & (0x1 << 11)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS); - } - if (reason[13] & (0x1 << 12)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP); - } - if (reason[13] & (0x1 << 13)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR); - } - if (reason[13] & (0x1 << 14)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR); - } - if (reason[13] & (0x1 << 15)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED); - } - if (reason[13] & (0x1 << 16)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL); - } - if (reason[13] & (0x1 << 17)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_VFP); - } - if (reason[13] & (0x1 << 18)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP); - } - if (reason[13] & (0x1 << 19)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER); - } - if (reason[13] & (0x1 << 20)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP); - } - if (reason[13] & (0x1 << 21)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_SVP); - } - if (reason[13] & (0x1 << 22)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT); - } - if (reason[13] & (0x1 << 23)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT); - } - if (reason[13] & (0x1 << 24)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED); - } - if (reason[13] & (0x1 << 25)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED); - } - if (reason[13] & (0x1 << 26)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP); - } - if (reason[13] & (0x1 << 27)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED); - } - if (reason[13] & (0x1 << 28)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF); - } - if (reason[13] & (0x1 << 29)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED); - } - if (reason[13] & (0x1 << 30)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED); - } - if (reason[13] & (0x1 << 31)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU); - } - if (reason[12] & (0x1 << 0)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0); - } - if (reason[12] & (0x1 << 1)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1); - } - if (reason[12] & (0x1 << 2)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2); - } - if (reason[12] & (0x1 << 3)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3); - } - if (reason[12] & (0x1 << 4)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4); - } - if (reason[12] & (0x1 << 5)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5); - } - if (reason[12] & (0x1 << 6)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6); - } - if (reason[12] & (0x1 << 7)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7); - } - if (reason[12] & (0x1 << 8)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MTOP_IPV4_GATEWAY); - } - if (reason[12] & (0x1 << 9)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED); - } - if (reason[12] & (0x1 << 10)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED); - } - if (reason[12] & (0x1 << 11)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE); - } - if (reason[12] & (0x1 << 12)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR); - } - if (reason[12] & (0x1 << 13)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU); - } - if (reason[12] & (0x1 << 15)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP); - } -} - -static void bcm56780_a0_hna_6_5_34_2_0_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data) -{ - uint32_t *reason = data + 0; - - reason[13] = 0; - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) { - reason[13] |= (0x1 << 0); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) { - reason[13] |= (0x1 << 1); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) { - reason[13] |= (0x1 << 2); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT)) { - reason[13] |= (0x1 << 3); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD)) { - reason[13] |= (0x1 << 4); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) { - reason[13] |= (0x1 << 5); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) { - reason[13] |= (0x1 << 6); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD)) { - reason[13] |= (0x1 << 7); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD)) { - reason[13] |= (0x1 << 8); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) { - reason[13] |= (0x1 << 9); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) { - reason[13] |= (0x1 << 10); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) { - reason[13] |= (0x1 << 11); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) { - reason[13] |= (0x1 << 12); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) { - reason[13] |= (0x1 << 13); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) { - reason[13] |= (0x1 << 14); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED)) { - reason[13] |= (0x1 << 15); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) { - reason[13] |= (0x1 << 16); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_VFP)) { - reason[13] |= (0x1 << 17); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP)) { - reason[13] |= (0x1 << 18); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) { - reason[13] |= (0x1 << 19); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP)) { - reason[13] |= (0x1 << 20); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_SVP)) { - reason[13] |= (0x1 << 21); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT)) { - reason[13] |= (0x1 << 22); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) { - reason[13] |= (0x1 << 23); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED)) { - reason[13] |= (0x1 << 24); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED)) { - reason[13] |= (0x1 << 25); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP)) { - reason[13] |= (0x1 << 26); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED)) { - reason[13] |= (0x1 << 27); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF)) { - reason[13] |= (0x1 << 28); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED)) { - reason[13] |= (0x1 << 29); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED)) { - reason[13] |= (0x1 << 30); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU)) { - reason[13] |= (0x1 << 31); - } - reason[12] = 0; - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0)) { - reason[12] |= (0x1 << 0); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1)) { - reason[12] |= (0x1 << 1); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2)) { - reason[12] |= (0x1 << 2); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3)) { - reason[12] |= (0x1 << 3); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4)) { - reason[12] |= (0x1 << 4); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5)) { - reason[12] |= (0x1 << 5); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6)) { - reason[12] |= (0x1 << 6); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7)) { - reason[12] |= (0x1 << 7); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MTOP_IPV4_GATEWAY)) { - reason[12] |= (0x1 << 8); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED)) { - reason[12] |= (0x1 << 9); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED)) { - reason[12] |= (0x1 << 10); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE)) { - reason[12] |= (0x1 << 11); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR)) { - reason[12] |= (0x1 << 12); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU)) { - reason[12] |= (0x1 << 13); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) { - reason[12] |= (0x1 << 15); - } -} - -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_34_2_0_rxpmd_flex_field_data[] = { - { - .name = "DLB_ECMP_DESTINATION_15_0", - .fid = BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { -1, -1 }, /* Profile 2. */ - { -1, -1 }, /* Profile 3. */ - { -1, -1 }, /* Profile 4. */ - { -1, -1 }, /* Profile 5. */ - { -1, -1 }, /* Profile 6. */ - { -1, -1 }, /* Profile 7. */ - { -1, -1 }, /* Profile 8. */ - { -1, -1 }, /* Profile 9. */ - { -1, -1 }, /* Profile 10. */ - { -1, -1 }, /* Profile 11. */ - { 128, 143 }, /* Profile 12. */ - { 128, 143 }, /* Profile 13. */ - { 128, 143 }, /* Profile 14. */ - { 128, 143 }, /* Profile 15. */ - { 128, 143 }, /* Profile 16. */ - { 128, 143 }, /* Profile 17. */ - { 128, 143 }, /* Profile 18. */ - { 128, 143 }, /* Profile 19. */ - { 128, 143 }, /* Profile 20. */ - { 128, 143 }, /* Profile 21. */ - { -1, -1 }, /* Profile 22. */ - { -1, -1 }, /* Profile 23. */ - { -1, -1 }, /* Profile 24. */ - { -1, -1 }, /* Profile 25. */ - { -1, -1 }, /* Profile 26. */ - { -1, -1 }, /* Profile 27. */ - { -1, -1 }, /* Profile 28. */ - { -1, -1 }, /* Profile 29. */ - { -1, -1 }, /* Profile 30. */ - { -1, -1 }, /* Profile 31. */ - { 128, 143 }, /* Profile 32. */ - { 128, 143 }, /* Profile 33. */ - { 128, 143 }, /* Profile 34. */ - { 128, 143 }, /* Profile 35. */ - { 128, 143 }, /* Profile 36. */ - { 128, 143 }, /* Profile 37. */ - { 128, 143 }, /* Profile 38. */ - { 128, 143 }, /* Profile 39. */ - { 128, 143 }, /* Profile 40. */ - { 128, 143 }, /* Profile 41. */ - }, - .profile_cnt = 42, - }, - { - .name = "DROP_CODE_15_0", - .fid = BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 48, 63 }, /* Profile 2. */ - { 48, 63 }, /* Profile 3. */ - { 48, 63 }, /* Profile 4. */ - { 48, 63 }, /* Profile 5. */ - { -1, -1 }, /* Profile 6. */ - { -1, -1 }, /* Profile 7. */ - { -1, -1 }, /* Profile 8. */ - { -1, -1 }, /* Profile 9. */ - { 48, 63 }, /* Profile 10. */ - { 48, 63 }, /* Profile 11. */ - { 48, 63 }, /* Profile 12. */ - { 48, 63 }, /* Profile 13. */ - { 48, 63 }, /* Profile 14. */ - { 48, 63 }, /* Profile 15. */ - { -1, -1 }, /* Profile 16. */ - { -1, -1 }, /* Profile 17. */ - { -1, -1 }, /* Profile 18. */ - { -1, -1 }, /* Profile 19. */ - { 48, 63 }, /* Profile 20. */ - { 48, 63 }, /* Profile 21. */ - { 48, 63 }, /* Profile 22. */ - { 48, 63 }, /* Profile 23. */ - { 48, 63 }, /* Profile 24. */ - { 48, 63 }, /* Profile 25. */ - { -1, -1 }, /* Profile 26. */ - { -1, -1 }, /* Profile 27. */ - { -1, -1 }, /* Profile 28. */ - { -1, -1 }, /* Profile 29. */ - { 48, 63 }, /* Profile 30. */ - { 48, 63 }, /* Profile 31. */ - { 48, 63 }, /* Profile 32. */ - { 48, 63 }, /* Profile 33. */ - { 48, 63 }, /* Profile 34. */ - { 48, 63 }, /* Profile 35. */ - { -1, -1 }, /* Profile 36. */ - { -1, -1 }, /* Profile 37. */ - { -1, -1 }, /* Profile 38. */ - { -1, -1 }, /* Profile 39. */ - { 48, 63 }, /* Profile 40. */ - { 48, 63 }, /* Profile 41. */ - }, - .profile_cnt = 42, - }, - { - .name = "DVP_15_0", - .fid = BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_DVP_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 368, 383 }, /* Profile 2. */ - { 368, 383 }, /* Profile 3. */ - { 368, 383 }, /* Profile 4. */ - { 368, 383 }, /* Profile 5. */ - { 368, 383 }, /* Profile 6. */ - { 368, 383 }, /* Profile 7. */ - { 368, 383 }, /* Profile 8. */ - { 368, 383 }, /* Profile 9. */ - { 368, 383 }, /* Profile 10. */ - { 368, 383 }, /* Profile 11. */ - { 368, 383 }, /* Profile 12. */ - { 368, 383 }, /* Profile 13. */ - { 368, 383 }, /* Profile 14. */ - { 368, 383 }, /* Profile 15. */ - { 368, 383 }, /* Profile 16. */ - { 368, 383 }, /* Profile 17. */ - { 368, 383 }, /* Profile 18. */ - { 368, 383 }, /* Profile 19. */ - { 368, 383 }, /* Profile 20. */ - { 368, 383 }, /* Profile 21. */ - { 368, 383 }, /* Profile 22. */ - { 368, 383 }, /* Profile 23. */ - { 368, 383 }, /* Profile 24. */ - { 368, 383 }, /* Profile 25. */ - { 368, 383 }, /* Profile 26. */ - { 368, 383 }, /* Profile 27. */ - { 368, 383 }, /* Profile 28. */ - { 368, 383 }, /* Profile 29. */ - { 368, 383 }, /* Profile 30. */ - { 368, 383 }, /* Profile 31. */ - { 368, 383 }, /* Profile 32. */ - { 368, 383 }, /* Profile 33. */ - { 368, 383 }, /* Profile 34. */ - { 368, 383 }, /* Profile 35. */ - { 368, 383 }, /* Profile 36. */ - { 368, 383 }, /* Profile 37. */ - { 368, 383 }, /* Profile 38. */ - { 368, 383 }, /* Profile 39. */ - { 368, 383 }, /* Profile 40. */ - { 368, 383 }, /* Profile 41. */ - }, - .profile_cnt = 42, - }, - { - .name = "EFFECTIVE_TTL_7_0", - .fid = BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 80, 87 }, /* Profile 2. */ - { 80, 87 }, /* Profile 3. */ - { 80, 87 }, /* Profile 4. */ - { 80, 87 }, /* Profile 5. */ - { 80, 87 }, /* Profile 6. */ - { 80, 87 }, /* Profile 7. */ - { 80, 87 }, /* Profile 8. */ - { 80, 87 }, /* Profile 9. */ - { 80, 87 }, /* Profile 10. */ - { 80, 87 }, /* Profile 11. */ - { 80, 87 }, /* Profile 12. */ - { 80, 87 }, /* Profile 13. */ - { 80, 87 }, /* Profile 14. */ - { 80, 87 }, /* Profile 15. */ - { 80, 87 }, /* Profile 16. */ - { 80, 87 }, /* Profile 17. */ - { 80, 87 }, /* Profile 18. */ - { 80, 87 }, /* Profile 19. */ - { 80, 87 }, /* Profile 20. */ - { 80, 87 }, /* Profile 21. */ - { 80, 87 }, /* Profile 22. */ - { 80, 87 }, /* Profile 23. */ - { 80, 87 }, /* Profile 24. */ - { 80, 87 }, /* Profile 25. */ - { 80, 87 }, /* Profile 26. */ - { 80, 87 }, /* Profile 27. */ - { 80, 87 }, /* Profile 28. */ - { 80, 87 }, /* Profile 29. */ - { 80, 87 }, /* Profile 30. */ - { 80, 87 }, /* Profile 31. */ - { 80, 87 }, /* Profile 32. */ - { 80, 87 }, /* Profile 33. */ - { 80, 87 }, /* Profile 34. */ - { 80, 87 }, /* Profile 35. */ - { 80, 87 }, /* Profile 36. */ - { 80, 87 }, /* Profile 37. */ - { 80, 87 }, /* Profile 38. */ - { 80, 87 }, /* Profile 39. */ - { 80, 87 }, /* Profile 40. */ - { 80, 87 }, /* Profile 41. */ - }, - .profile_cnt = 42, - }, - { - .name = "EGR_MTOP_INDEX_HI_3_0", - .fid = BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_EGR_MTOP_INDEX_HI_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 384, 387 }, /* Profile 2. */ - { 384, 387 }, /* Profile 3. */ - { 384, 387 }, /* Profile 4. */ - { 384, 387 }, /* Profile 5. */ - { 384, 387 }, /* Profile 6. */ - { 384, 387 }, /* Profile 7. */ - { 384, 387 }, /* Profile 8. */ - { 384, 387 }, /* Profile 9. */ - { 384, 387 }, /* Profile 10. */ - { 384, 387 }, /* Profile 11. */ - { 384, 387 }, /* Profile 12. */ - { 384, 387 }, /* Profile 13. */ - { 384, 387 }, /* Profile 14. */ - { 384, 387 }, /* Profile 15. */ - { 384, 387 }, /* Profile 16. */ - { 384, 387 }, /* Profile 17. */ - { 384, 387 }, /* Profile 18. */ - { 384, 387 }, /* Profile 19. */ - { 384, 387 }, /* Profile 20. */ - { 384, 387 }, /* Profile 21. */ - { 384, 387 }, /* Profile 22. */ - { 384, 387 }, /* Profile 23. */ - { 384, 387 }, /* Profile 24. */ - { 384, 387 }, /* Profile 25. */ - { 384, 387 }, /* Profile 26. */ - { 384, 387 }, /* Profile 27. */ - { 384, 387 }, /* Profile 28. */ - { 384, 387 }, /* Profile 29. */ - { 384, 387 }, /* Profile 30. */ - { 384, 387 }, /* Profile 31. */ - { 384, 387 }, /* Profile 32. */ - { 384, 387 }, /* Profile 33. */ - { 384, 387 }, /* Profile 34. */ - { 384, 387 }, /* Profile 35. */ - { 384, 387 }, /* Profile 36. */ - { 384, 387 }, /* Profile 37. */ - { 384, 387 }, /* Profile 38. */ - { 384, 387 }, /* Profile 39. */ - { 384, 387 }, /* Profile 40. */ - { 384, 387 }, /* Profile 41. */ - }, - .profile_cnt = 42, - }, - { - .name = "EGR_MTOP_INDEX_LO_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0", - .fid = BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_EGR_MTOP_INDEX_LO_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { -1, -1 }, /* Profile 2. */ - { -1, -1 }, /* Profile 3. */ - { -1, -1 }, /* Profile 4. */ - { -1, -1 }, /* Profile 5. */ - { 48, 63 }, /* Profile 6. */ - { 48, 63 }, /* Profile 7. */ - { 48, 63 }, /* Profile 8. */ - { 48, 63 }, /* Profile 9. */ - { -1, -1 }, /* Profile 10. */ - { -1, -1 }, /* Profile 11. */ - { -1, -1 }, /* Profile 12. */ - { -1, -1 }, /* Profile 13. */ - { -1, -1 }, /* Profile 14. */ - { -1, -1 }, /* Profile 15. */ - { 48, 63 }, /* Profile 16. */ - { 48, 63 }, /* Profile 17. */ - { 48, 63 }, /* Profile 18. */ - { 48, 63 }, /* Profile 19. */ - { -1, -1 }, /* Profile 20. */ - { -1, -1 }, /* Profile 21. */ - { -1, -1 }, /* Profile 22. */ - { -1, -1 }, /* Profile 23. */ - { -1, -1 }, /* Profile 24. */ - { -1, -1 }, /* Profile 25. */ - { 48, 63 }, /* Profile 26. */ - { 48, 63 }, /* Profile 27. */ - { 48, 63 }, /* Profile 28. */ - { 48, 63 }, /* Profile 29. */ - { -1, -1 }, /* Profile 30. */ - { -1, -1 }, /* Profile 31. */ - { -1, -1 }, /* Profile 32. */ - { -1, -1 }, /* Profile 33. */ - { -1, -1 }, /* Profile 34. */ - { -1, -1 }, /* Profile 35. */ - { 48, 63 }, /* Profile 36. */ - { 48, 63 }, /* Profile 37. */ - { 48, 63 }, /* Profile 38. */ - { 48, 63 }, /* Profile 39. */ - }, - .profile_cnt = 40, - }, - { - .name = "EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0", - .fid = BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 128, 143 }, /* Profile 2. */ - { 128, 143 }, /* Profile 3. */ - { 128, 143 }, /* Profile 4. */ - { 128, 143 }, /* Profile 5. */ - { 128, 143 }, /* Profile 6. */ - { 128, 143 }, /* Profile 7. */ - { 128, 143 }, /* Profile 8. */ - { 128, 143 }, /* Profile 9. */ - { 128, 143 }, /* Profile 10. */ - { 128, 143 }, /* Profile 11. */ - { -1, -1 }, /* Profile 12. */ - { -1, -1 }, /* Profile 13. */ - { -1, -1 }, /* Profile 14. */ - { -1, -1 }, /* Profile 15. */ - { -1, -1 }, /* Profile 16. */ - { -1, -1 }, /* Profile 17. */ - { -1, -1 }, /* Profile 18. */ - { -1, -1 }, /* Profile 19. */ - { -1, -1 }, /* Profile 20. */ - { -1, -1 }, /* Profile 21. */ - { 128, 143 }, /* Profile 22. */ - { 128, 143 }, /* Profile 23. */ - { 128, 143 }, /* Profile 24. */ - { 128, 143 }, /* Profile 25. */ - { 128, 143 }, /* Profile 26. */ - { 128, 143 }, /* Profile 27. */ - { 128, 143 }, /* Profile 28. */ - { 128, 143 }, /* Profile 29. */ - { 128, 143 }, /* Profile 30. */ - { 128, 143 }, /* Profile 31. */ - }, - .profile_cnt = 32, - }, - { - .name = "ENTROPY_LABEL_HIGH_3_0", - .fid = BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 420, 423 }, /* Profile 2. */ - { 420, 423 }, /* Profile 3. */ - { 420, 423 }, /* Profile 4. */ - { 420, 423 }, /* Profile 5. */ - { 420, 423 }, /* Profile 6. */ - { 420, 423 }, /* Profile 7. */ - { 420, 423 }, /* Profile 8. */ - { 420, 423 }, /* Profile 9. */ - { 420, 423 }, /* Profile 10. */ - { 420, 423 }, /* Profile 11. */ - { 420, 423 }, /* Profile 12. */ - { 420, 423 }, /* Profile 13. */ - { 420, 423 }, /* Profile 14. */ - { 420, 423 }, /* Profile 15. */ - { 420, 423 }, /* Profile 16. */ - { 420, 423 }, /* Profile 17. */ - { 420, 423 }, /* Profile 18. */ - { 420, 423 }, /* Profile 19. */ - { 420, 423 }, /* Profile 20. */ - { 420, 423 }, /* Profile 21. */ - { 420, 423 }, /* Profile 22. */ - { 420, 423 }, /* Profile 23. */ - { 420, 423 }, /* Profile 24. */ - { 420, 423 }, /* Profile 25. */ - { 420, 423 }, /* Profile 26. */ - { 420, 423 }, /* Profile 27. */ - { 420, 423 }, /* Profile 28. */ - { 420, 423 }, /* Profile 29. */ - { 420, 423 }, /* Profile 30. */ - { 420, 423 }, /* Profile 31. */ - { 420, 423 }, /* Profile 32. */ - { 420, 423 }, /* Profile 33. */ - { 420, 423 }, /* Profile 34. */ - { 420, 423 }, /* Profile 35. */ - { 420, 423 }, /* Profile 36. */ - { 420, 423 }, /* Profile 37. */ - { 420, 423 }, /* Profile 38. */ - { 420, 423 }, /* Profile 39. */ - { 420, 423 }, /* Profile 40. */ - { 420, 423 }, /* Profile 41. */ - }, - .profile_cnt = 42, - }, - { - .name = "ENTROPY_LABEL_LOW_15_0", - .fid = BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 96, 111 }, /* Profile 2. */ - { 96, 111 }, /* Profile 3. */ - { 96, 111 }, /* Profile 4. */ - { 96, 111 }, /* Profile 5. */ - { 96, 111 }, /* Profile 6. */ - { 96, 111 }, /* Profile 7. */ - { 96, 111 }, /* Profile 8. */ - { 96, 111 }, /* Profile 9. */ - { 96, 111 }, /* Profile 10. */ - { 96, 111 }, /* Profile 11. */ - { 96, 111 }, /* Profile 12. */ - { 96, 111 }, /* Profile 13. */ - { 96, 111 }, /* Profile 14. */ - { 96, 111 }, /* Profile 15. */ - { 96, 111 }, /* Profile 16. */ - { 96, 111 }, /* Profile 17. */ - { 96, 111 }, /* Profile 18. */ - { 96, 111 }, /* Profile 19. */ - { 96, 111 }, /* Profile 20. */ - { 96, 111 }, /* Profile 21. */ - { 96, 111 }, /* Profile 22. */ - { 96, 111 }, /* Profile 23. */ - { 96, 111 }, /* Profile 24. */ - { 96, 111 }, /* Profile 25. */ - { 96, 111 }, /* Profile 26. */ - { 96, 111 }, /* Profile 27. */ - { 96, 111 }, /* Profile 28. */ - { 96, 111 }, /* Profile 29. */ - { 96, 111 }, /* Profile 30. */ - { 96, 111 }, /* Profile 31. */ - { 96, 111 }, /* Profile 32. */ - { 96, 111 }, /* Profile 33. */ - { 96, 111 }, /* Profile 34. */ - { 96, 111 }, /* Profile 35. */ - { 96, 111 }, /* Profile 36. */ - { 96, 111 }, /* Profile 37. */ - { 96, 111 }, /* Profile 38. */ - { 96, 111 }, /* Profile 39. */ - { 96, 111 }, /* Profile 40. */ - { 96, 111 }, /* Profile 41. */ - }, - .profile_cnt = 42, - }, - { - .name = "EP_NIH_HDR_TIMESTAMP_15_0", - .fid = BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 256, 271 }, /* Profile 2. */ - { -1, -1 }, /* Profile 3. */ - { 240, 255 }, /* Profile 4. */ - { -1, -1 }, /* Profile 5. */ - { 256, 271 }, /* Profile 6. */ - { -1, -1 }, /* Profile 7. */ - { 240, 255 }, /* Profile 8. */ - { -1, -1 }, /* Profile 9. */ - { -1, -1 }, /* Profile 10. */ - { -1, -1 }, /* Profile 11. */ - { 256, 271 }, /* Profile 12. */ - { -1, -1 }, /* Profile 13. */ - { 240, 255 }, /* Profile 14. */ - { -1, -1 }, /* Profile 15. */ - { 256, 271 }, /* Profile 16. */ - { -1, -1 }, /* Profile 17. */ - { 240, 255 }, /* Profile 18. */ - { -1, -1 }, /* Profile 19. */ - { -1, -1 }, /* Profile 20. */ - { -1, -1 }, /* Profile 21. */ - { 256, 271 }, /* Profile 22. */ - { -1, -1 }, /* Profile 23. */ - { 240, 255 }, /* Profile 24. */ - { -1, -1 }, /* Profile 25. */ - { 256, 271 }, /* Profile 26. */ - { -1, -1 }, /* Profile 27. */ - { 240, 255 }, /* Profile 28. */ - { -1, -1 }, /* Profile 29. */ - { -1, -1 }, /* Profile 30. */ - { -1, -1 }, /* Profile 31. */ - { 256, 271 }, /* Profile 32. */ - { -1, -1 }, /* Profile 33. */ - { 240, 255 }, /* Profile 34. */ - { -1, -1 }, /* Profile 35. */ - { 256, 271 }, /* Profile 36. */ - { -1, -1 }, /* Profile 37. */ - { 240, 255 }, /* Profile 38. */ - }, - .profile_cnt = 39, - }, - { - .name = "EP_NIH_HDR_TIMESTAMP_31_16", - .fid = BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 272, 287 }, /* Profile 2. */ - { -1, -1 }, /* Profile 3. */ - { 256, 271 }, /* Profile 4. */ - { -1, -1 }, /* Profile 5. */ - { 272, 287 }, /* Profile 6. */ - { -1, -1 }, /* Profile 7. */ - { 256, 271 }, /* Profile 8. */ - { -1, -1 }, /* Profile 9. */ - { -1, -1 }, /* Profile 10. */ - { -1, -1 }, /* Profile 11. */ - { 272, 287 }, /* Profile 12. */ - { -1, -1 }, /* Profile 13. */ - { 256, 271 }, /* Profile 14. */ - { -1, -1 }, /* Profile 15. */ - { 272, 287 }, /* Profile 16. */ - { -1, -1 }, /* Profile 17. */ - { 256, 271 }, /* Profile 18. */ - { -1, -1 }, /* Profile 19. */ - { -1, -1 }, /* Profile 20. */ - { -1, -1 }, /* Profile 21. */ - { 272, 287 }, /* Profile 22. */ - { -1, -1 }, /* Profile 23. */ - { 256, 271 }, /* Profile 24. */ - { -1, -1 }, /* Profile 25. */ - { 272, 287 }, /* Profile 26. */ - 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{ 208, 223 }, /* Profile 21. */ - { 224, 239 }, /* Profile 22. */ - { 224, 239 }, /* Profile 23. */ - { 208, 223 }, /* Profile 24. */ - { 208, 223 }, /* Profile 25. */ - { 224, 239 }, /* Profile 26. */ - { 224, 239 }, /* Profile 27. */ - { 208, 223 }, /* Profile 28. */ - { 208, 223 }, /* Profile 29. */ - { 224, 239 }, /* Profile 30. */ - { 208, 223 }, /* Profile 31. */ - { 224, 239 }, /* Profile 32. */ - { 224, 239 }, /* Profile 33. */ - { 208, 223 }, /* Profile 34. */ - { 208, 223 }, /* Profile 35. */ - { 224, 239 }, /* Profile 36. */ - { 224, 239 }, /* Profile 37. */ - { 208, 223 }, /* Profile 38. */ - { 208, 223 }, /* Profile 39. */ - { 224, 239 }, /* Profile 40. */ - { 208, 223 }, /* Profile 41. */ - }, - .profile_cnt = 42, - }, - { - .name = "SYSTEM_OPCODE_3_0", - .fid = BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 416, 419 }, /* Profile 2. */ - { 416, 419 }, /* Profile 3. */ - { 416, 419 }, /* Profile 4. */ - { 416, 419 }, /* Profile 5. */ - { 416, 419 }, /* Profile 6. */ - { 416, 419 }, /* Profile 7. */ - { 416, 419 }, /* Profile 8. */ - { 416, 419 }, /* Profile 9. */ - { 416, 419 }, /* Profile 10. */ - { 416, 419 }, /* Profile 11. */ - { 416, 419 }, /* Profile 12. */ - { 416, 419 }, /* Profile 13. */ - { 416, 419 }, /* Profile 14. */ - { 416, 419 }, /* Profile 15. */ - { 416, 419 }, /* Profile 16. */ - { 416, 419 }, /* Profile 17. */ - { 416, 419 }, /* Profile 18. */ - { 416, 419 }, /* Profile 19. */ - { 416, 419 }, /* Profile 20. */ - { 416, 419 }, /* Profile 21. */ - { 416, 419 }, /* Profile 22. */ - { 416, 419 }, /* Profile 23. */ - { 416, 419 }, /* Profile 24. */ - { 416, 419 }, /* Profile 25. */ - { 416, 419 }, /* Profile 26. */ - { 416, 419 }, /* Profile 27. */ - { 416, 419 }, /* Profile 28. */ - { 416, 419 }, /* Profile 29. */ - { 416, 419 }, /* Profile 30. */ - { 416, 419 }, /* Profile 31. */ - { 416, 419 }, /* Profile 32. */ - { 416, 419 }, /* Profile 33. */ - { 416, 419 }, /* Profile 34. */ - { 416, 419 }, /* Profile 35. */ - { 416, 419 }, /* Profile 36. */ - { 416, 419 }, /* Profile 37. */ - { 416, 419 }, /* Profile 38. */ - { 416, 419 }, /* Profile 39. */ - { 416, 419 }, /* Profile 40. */ - { 416, 419 }, /* Profile 41. */ - }, - .profile_cnt = 42, - }, - { - .name = "SYSTEM_SOURCE_15_0", - .fid = BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { -1, -1 }, /* Profile 2. */ - { -1, -1 }, /* Profile 3. */ - { -1, -1 }, /* Profile 4. */ - { -1, -1 }, /* Profile 5. */ - { -1, -1 }, /* Profile 6. */ - { -1, -1 }, /* Profile 7. */ - { -1, -1 }, /* Profile 8. */ - { -1, -1 }, /* Profile 9. */ - { -1, -1 }, /* Profile 10. */ - { -1, -1 }, /* Profile 11. */ - { -1, -1 }, /* Profile 12. */ - { -1, -1 }, /* Profile 13. */ - { -1, -1 }, /* Profile 14. */ - { -1, -1 }, /* Profile 15. */ - { -1, -1 }, /* Profile 16. */ - { -1, -1 }, /* Profile 17. */ - { -1, -1 }, /* Profile 18. */ - { -1, -1 }, /* Profile 19. */ - { -1, -1 }, /* Profile 20. */ - { -1, -1 }, /* Profile 21. */ - { 208, 223 }, /* Profile 22. */ - { 208, 223 }, /* Profile 23. */ - { 192, 207 }, /* Profile 24. */ - { 192, 207 }, /* Profile 25. */ - { 208, 223 }, /* Profile 26. */ - { 208, 223 }, /* Profile 27. */ - { 192, 207 }, /* Profile 28. */ - { 192, 207 }, /* Profile 29. */ - { 208, 223 }, /* Profile 30. */ - { 192, 207 }, /* Profile 31. */ - { 208, 223 }, /* Profile 32. */ - { 208, 223 }, /* Profile 33. */ - { 192, 207 }, /* Profile 34. */ - { 192, 207 }, /* Profile 35. */ - { 208, 223 }, /* Profile 36. */ - { 208, 223 }, /* Profile 37. */ - { 192, 207 }, /* Profile 38. */ - { 192, 207 }, /* Profile 39. */ - { 208, 223 }, /* Profile 40. */ - { 192, 207 }, /* Profile 41. */ - }, - .profile_cnt = 42, - }, - { - .name = "TIMESTAMP_CTRL_3_0", - .fid = BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 388, 391 }, /* Profile 2. */ - { 388, 391 }, /* Profile 3. */ - { 388, 391 }, /* Profile 4. */ - { 388, 391 }, /* Profile 5. */ - { 388, 391 }, /* Profile 6. */ - { 388, 391 }, /* Profile 7. */ - { 388, 391 }, /* Profile 8. */ - { 388, 391 }, /* Profile 9. */ - { 388, 391 }, /* Profile 10. */ - { 388, 391 }, /* Profile 11. */ - { 388, 391 }, /* Profile 12. */ - { 388, 391 }, /* Profile 13. */ - { 388, 391 }, /* Profile 14. */ - { 388, 391 }, /* Profile 15. */ - { 388, 391 }, /* Profile 16. */ - { 388, 391 }, /* Profile 17. */ - { 388, 391 }, /* Profile 18. */ - { 388, 391 }, /* Profile 19. */ - { 388, 391 }, /* Profile 20. */ - { 388, 391 }, /* Profile 21. */ - { 388, 391 }, /* Profile 22. */ - { 388, 391 }, /* Profile 23. */ - { 388, 391 }, /* Profile 24. */ - { 388, 391 }, /* Profile 25. */ - { 388, 391 }, /* Profile 26. */ - { 388, 391 }, /* Profile 27. */ - { 388, 391 }, /* Profile 28. */ - { 388, 391 }, /* Profile 29. */ - { 388, 391 }, /* Profile 30. */ - { 388, 391 }, /* Profile 31. */ - { 388, 391 }, /* Profile 32. */ - { 388, 391 }, /* Profile 33. */ - { 388, 391 }, /* Profile 34. */ - { 388, 391 }, /* Profile 35. */ - { 388, 391 }, /* Profile 36. */ - { 388, 391 }, /* Profile 37. */ - { 388, 391 }, /* Profile 38. */ - { 388, 391 }, /* Profile 39. */ - { 388, 391 }, /* Profile 40. */ - { 388, 391 }, /* Profile 41. */ - }, - .profile_cnt = 42, - }, - { - .name = "VFI_15_0", - .fid = BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_VFI_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 336, 351 }, /* Profile 2. */ - { 336, 351 }, /* Profile 3. */ - { 320, 335 }, /* Profile 4. */ - { 320, 335 }, /* Profile 5. */ - { 336, 351 }, /* Profile 6. */ - { 336, 351 }, /* Profile 7. */ - { 320, 335 }, /* Profile 8. */ - { 320, 335 }, /* Profile 9. */ - { 336, 351 }, /* Profile 10. */ - { 320, 335 }, /* Profile 11. */ - { 336, 351 }, /* Profile 12. */ - { 336, 351 }, /* Profile 13. */ - { 320, 335 }, /* Profile 14. */ - { 320, 335 }, /* Profile 15. */ - { 336, 351 }, /* Profile 16. */ - { 336, 351 }, /* Profile 17. */ - { 320, 335 }, /* Profile 18. */ - { 320, 335 }, /* Profile 19. */ - { 336, 351 }, /* Profile 20. */ - { 320, 335 }, /* Profile 21. */ - { 336, 351 }, /* Profile 22. */ - { 336, 351 }, /* Profile 23. */ - { 320, 335 }, /* Profile 24. */ - { 320, 335 }, /* Profile 25. */ - { 336, 351 }, /* Profile 26. */ - { 336, 351 }, /* Profile 27. */ - { 320, 335 }, /* Profile 28. */ - { 320, 335 }, /* Profile 29. */ - { 336, 351 }, /* Profile 30. */ - { 320, 335 }, /* Profile 31. */ - { 336, 351 }, /* Profile 32. */ - { 336, 351 }, /* Profile 33. */ - { 320, 335 }, /* Profile 34. */ - { 320, 335 }, /* Profile 35. */ - { 336, 351 }, /* Profile 36. */ - { 336, 351 }, /* Profile 37. */ - { 320, 335 }, /* Profile 38. */ - { 320, 335 }, /* Profile 39. */ - { 336, 351 }, /* Profile 40. */ - { 320, 335 }, /* Profile 41. */ - }, - .profile_cnt = 42, - }, - { - .name = "VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0", - .fid = BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 404, 407 }, /* Profile 2. */ - { 404, 407 }, /* Profile 3. */ - { 404, 407 }, /* Profile 4. */ - { 404, 407 }, /* Profile 5. */ - { 404, 407 }, /* Profile 6. */ - { 404, 407 }, /* Profile 7. */ - { 404, 407 }, /* Profile 8. */ - { 404, 407 }, /* Profile 9. */ - { 404, 407 }, /* Profile 10. */ - { 404, 407 }, /* Profile 11. */ - { 404, 407 }, /* Profile 12. */ - { 404, 407 }, /* Profile 13. */ - { 404, 407 }, /* Profile 14. */ - { 404, 407 }, /* Profile 15. */ - { 404, 407 }, /* Profile 16. */ - { 404, 407 }, /* Profile 17. */ - { 404, 407 }, /* Profile 18. */ - { 404, 407 }, /* Profile 19. */ - { 404, 407 }, /* Profile 20. */ - { 404, 407 }, /* Profile 21. */ - { 404, 407 }, /* Profile 22. */ - { 404, 407 }, /* Profile 23. */ - { 404, 407 }, /* Profile 24. */ - { 404, 407 }, /* Profile 25. */ - { 404, 407 }, /* Profile 26. */ - { 404, 407 }, /* Profile 27. */ - { 404, 407 }, /* Profile 28. */ - { 404, 407 }, /* Profile 29. */ - { 404, 407 }, /* Profile 30. */ - { 404, 407 }, /* Profile 31. */ - { 404, 407 }, /* Profile 32. */ - { 404, 407 }, /* Profile 33. */ - { 404, 407 }, /* Profile 34. */ - { 404, 407 }, /* Profile 35. */ - { 404, 407 }, /* Profile 36. */ - { 404, 407 }, /* Profile 37. */ - { 404, 407 }, /* Profile 38. */ - { 404, 407 }, /* Profile 39. */ - { 404, 407 }, /* Profile 40. */ - { 404, 407 }, /* Profile 41. */ - }, - .profile_cnt = 42, - }, -}; -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_34_2_0_rxpmd_flex_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_FID_COUNT, - .info = bcm56780_a0_hna_6_5_34_2_0_rxpmd_flex_field_data, - .profile_bmp_cnt = 2, - .profile_bmp[0] = 0xfffffffc, - .profile_bmp[1] = 0x3ff, - -}; - -static shr_enum_map_t bcm56780_a0_hna_6_5_34_2_0_rxpmd_flex_reason_names[] = { - BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT -}; - -static bcmpkt_flex_reasons_info_t bcm56780_a0_hna_6_5_34_2_0_rxpmd_flex_reasons_info = { - .num_reasons = BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_COUNT, - .reason_names = bcm56780_a0_hna_6_5_34_2_0_rxpmd_flex_reason_names, - .reason_encode = bcm56780_a0_hna_6_5_34_2_0_rxpmd_flex_reason_encode, - .reason_decode = bcm56780_a0_hna_6_5_34_2_0_rxpmd_flex_reason_decode, -}; - - -static int32_t bcmpkt_arp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 24, 8); - - return ret; -} - -static int32_t bcmpkt_arp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_arp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_arp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_arp_t_operation_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 16); - - return ret; -} - -static int32_t bcmpkt_arp_t_operation_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_arp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 8); - - return ret; -} - -static int32_t bcmpkt_arp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_arp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_arp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_arp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_arp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_arp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_arp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_arp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_arp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_arp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_arp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_34_2_0_arp_t_fget[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ARP_T_FID_COUNT] = { - bcmpkt_arp_t_hardware_len_get, - bcmpkt_arp_t_hardware_type_get, - bcmpkt_arp_t_operation_get, - bcmpkt_arp_t_prot_addr_len_get, - bcmpkt_arp_t_protocol_type_get, - bcmpkt_arp_t_sender_ha_get, - bcmpkt_arp_t_sender_ip_get, - bcmpkt_arp_t_target_ha_get, - bcmpkt_arp_t_target_ip_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_34_2_0_arp_t_fset[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ARP_T_FID_COUNT] = { - bcmpkt_arp_t_hardware_len_set, - bcmpkt_arp_t_hardware_type_set, - bcmpkt_arp_t_operation_set, - bcmpkt_arp_t_prot_addr_len_set, - bcmpkt_arp_t_protocol_type_set, - bcmpkt_arp_t_sender_ha_set, - bcmpkt_arp_t_sender_ip_set, - bcmpkt_arp_t_target_ha_set, - bcmpkt_arp_t_target_ip_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_34_2_0_arp_t_field_data[] = { - BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_34_2_0_arp_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ARP_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_34_2_0_arp_t_field_data, -}; - - -static int32_t bcmpkt_authen_t_data_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_authen_t_data_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_authen_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_authen_t_next_header_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_authen_t_payload_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_authen_t_payload_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_authen_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_authen_t_reserved_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_authen_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_authen_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_authen_t_spi_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_authen_t_spi_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_34_2_0_authen_t_fget[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_AUTHEN_T_FID_COUNT] = { - bcmpkt_authen_t_data_get, - bcmpkt_authen_t_next_header_get, - bcmpkt_authen_t_payload_len_get, - bcmpkt_authen_t_reserved_get, - bcmpkt_authen_t_seq_num_get, - bcmpkt_authen_t_spi_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_34_2_0_authen_t_fset[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_AUTHEN_T_FID_COUNT] = { - bcmpkt_authen_t_data_set, - bcmpkt_authen_t_next_header_set, - bcmpkt_authen_t_payload_len_set, - bcmpkt_authen_t_reserved_set, - bcmpkt_authen_t_seq_num_set, - bcmpkt_authen_t_spi_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_34_2_0_authen_t_field_data[] = { - BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_34_2_0_authen_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_AUTHEN_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_34_2_0_authen_t_field_data, -}; - - -static int32_t bcmpkt_bfd_t_desmintxintv_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_bfd_t_desmintxintv_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_bfd_t_minechorxintv_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_bfd_t_minechorxintv_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_bfd_t_reqminrxintv_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_bfd_t_reqminrxintv_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_bfd_t_ap_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 18, 1); - - return ret; -} - -static int32_t bcmpkt_bfd_t_ap_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 18, 1, val); - return ret; -} - -static int32_t bcmpkt_bfd_t_bfd_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 8); - - return ret; -} - -static int32_t bcmpkt_bfd_t_bfd_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 8, val); - return ret; -} - -static int32_t bcmpkt_bfd_t_cpi_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 19, 1); - - return ret; -} - -static int32_t bcmpkt_bfd_t_cpi_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 19, 1, val); - return ret; -} - -static int32_t bcmpkt_bfd_t_dem_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 17, 1); - - return ret; -} - -static int32_t bcmpkt_bfd_t_dem_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 17, 1, val); - return ret; -} - -static int32_t bcmpkt_bfd_t_detectmult_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 8, 8); - - return ret; -} - -static int32_t bcmpkt_bfd_t_detectmult_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 8, 8, val); - return ret; -} - -static int32_t bcmpkt_bfd_t_diag_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 5); - - return ret; -} - -static int32_t bcmpkt_bfd_t_diag_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 5, val); - return ret; -} - -static int32_t bcmpkt_bfd_t_fin_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 20, 1); - - return ret; -} - -static int32_t bcmpkt_bfd_t_fin_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 20, 1, val); - return ret; -} - -static int32_t bcmpkt_bfd_t_mpt_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 1); - - return ret; -} - -static int32_t bcmpkt_bfd_t_mpt_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 1, val); - return ret; -} - -static int32_t bcmpkt_bfd_t_mydiscrim_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_bfd_t_mydiscrim_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_bfd_t_poll_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 21, 1); - - return ret; -} - -static int32_t bcmpkt_bfd_t_poll_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 21, 1, val); - return ret; -} - -static int32_t bcmpkt_bfd_t_sta_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 22, 2); - - return ret; -} - -static int32_t bcmpkt_bfd_t_sta_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 22, 2, val); - return ret; -} - -static int32_t bcmpkt_bfd_t_urdiscrim_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_bfd_t_urdiscrim_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_bfd_t_version_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 29, 3); - - return ret; -} - -static int32_t bcmpkt_bfd_t_version_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 29, 3, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_34_2_0_bfd_t_fget[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_BFD_T_FID_COUNT] = { - bcmpkt_bfd_t_ap_get, - bcmpkt_bfd_t_bfd_length_get, - bcmpkt_bfd_t_cpi_get, - bcmpkt_bfd_t_dem_get, - bcmpkt_bfd_t_desmintxintv_get, - bcmpkt_bfd_t_detectmult_get, - bcmpkt_bfd_t_diag_get, - bcmpkt_bfd_t_fin_get, - bcmpkt_bfd_t_minechorxintv_get, - bcmpkt_bfd_t_mpt_get, - bcmpkt_bfd_t_mydiscrim_get, - bcmpkt_bfd_t_poll_get, - bcmpkt_bfd_t_reqminrxintv_get, - bcmpkt_bfd_t_sta_get, - bcmpkt_bfd_t_urdiscrim_get, - bcmpkt_bfd_t_version_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_34_2_0_bfd_t_fset[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_BFD_T_FID_COUNT] = { - bcmpkt_bfd_t_ap_set, - bcmpkt_bfd_t_bfd_length_set, - bcmpkt_bfd_t_cpi_set, - bcmpkt_bfd_t_dem_set, - bcmpkt_bfd_t_desmintxintv_set, - bcmpkt_bfd_t_detectmult_set, - bcmpkt_bfd_t_diag_set, - bcmpkt_bfd_t_fin_set, - bcmpkt_bfd_t_minechorxintv_set, - bcmpkt_bfd_t_mpt_set, - bcmpkt_bfd_t_mydiscrim_set, - bcmpkt_bfd_t_poll_set, - bcmpkt_bfd_t_reqminrxintv_set, - bcmpkt_bfd_t_sta_set, - bcmpkt_bfd_t_urdiscrim_set, - bcmpkt_bfd_t_version_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_34_2_0_bfd_t_field_data[] = { - BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_34_2_0_bfd_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_BFD_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_34_2_0_bfd_t_field_data, -}; - - -static int32_t bcmpkt_cntag_t_rpid_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_cntag_t_rpid_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_cntag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_cntag_t_tpid_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_34_2_0_cntag_t_fget[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_CNTAG_T_FID_COUNT] = { - bcmpkt_cntag_t_rpid_get, - bcmpkt_cntag_t_tpid_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_34_2_0_cntag_t_fset[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_CNTAG_T_FID_COUNT] = { - bcmpkt_cntag_t_rpid_set, - bcmpkt_cntag_t_tpid_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_34_2_0_cntag_t_field_data[] = { - BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_34_2_0_cntag_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_CNTAG_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_34_2_0_cntag_t_field_data, -}; - - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_34_2_0_cpu_composites_0_t_fget[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { - bcmpkt_cpu_composites_0_t_dma_cont0_get, - bcmpkt_cpu_composites_0_t_dma_cont1_get, - bcmpkt_cpu_composites_0_t_dma_cont2_get, - bcmpkt_cpu_composites_0_t_dma_cont3_get, - bcmpkt_cpu_composites_0_t_dma_cont4_get, - bcmpkt_cpu_composites_0_t_dma_cont5_get, - bcmpkt_cpu_composites_0_t_dma_cont6_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_34_2_0_cpu_composites_0_t_fset[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { - bcmpkt_cpu_composites_0_t_dma_cont0_set, - bcmpkt_cpu_composites_0_t_dma_cont1_set, - bcmpkt_cpu_composites_0_t_dma_cont2_set, - bcmpkt_cpu_composites_0_t_dma_cont3_set, - bcmpkt_cpu_composites_0_t_dma_cont4_set, - bcmpkt_cpu_composites_0_t_dma_cont5_set, - bcmpkt_cpu_composites_0_t_dma_cont6_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_34_2_0_cpu_composites_0_t_field_data[] = { - BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_34_2_0_cpu_composites_0_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_34_2_0_cpu_composites_0_t_field_data, -}; - - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_34_2_0_cpu_composites_1_t_fget[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { - bcmpkt_cpu_composites_1_t_dma_cont10_get, - bcmpkt_cpu_composites_1_t_dma_cont11_get, - bcmpkt_cpu_composites_1_t_dma_cont12_get, - bcmpkt_cpu_composites_1_t_dma_cont13_get, - bcmpkt_cpu_composites_1_t_dma_cont14_get, - bcmpkt_cpu_composites_1_t_dma_cont15_get, - bcmpkt_cpu_composites_1_t_dma_cont16_get, - bcmpkt_cpu_composites_1_t_dma_cont17_get, - bcmpkt_cpu_composites_1_t_dma_cont7_get, - bcmpkt_cpu_composites_1_t_dma_cont8_get, - bcmpkt_cpu_composites_1_t_dma_cont9_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_34_2_0_cpu_composites_1_t_fset[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { - bcmpkt_cpu_composites_1_t_dma_cont10_set, - bcmpkt_cpu_composites_1_t_dma_cont11_set, - bcmpkt_cpu_composites_1_t_dma_cont12_set, - bcmpkt_cpu_composites_1_t_dma_cont13_set, - bcmpkt_cpu_composites_1_t_dma_cont14_set, - bcmpkt_cpu_composites_1_t_dma_cont15_set, - bcmpkt_cpu_composites_1_t_dma_cont16_set, - bcmpkt_cpu_composites_1_t_dma_cont17_set, - bcmpkt_cpu_composites_1_t_dma_cont7_set, - bcmpkt_cpu_composites_1_t_dma_cont8_set, - bcmpkt_cpu_composites_1_t_dma_cont9_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_34_2_0_cpu_composites_1_t_field_data[] = { - BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_34_2_0_cpu_composites_1_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_34_2_0_cpu_composites_1_t_field_data, -}; - - -static int32_t bcmpkt_dest_option_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_dest_option_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_dest_option_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_dest_option_t_next_header_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_dest_option_t_option_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_dest_option_t_option_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_34_2_0_dest_option_t_fget[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = { - bcmpkt_dest_option_t_hdr_ext_len_get, - bcmpkt_dest_option_t_next_header_get, - bcmpkt_dest_option_t_option_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_34_2_0_dest_option_t_fset[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = { - bcmpkt_dest_option_t_hdr_ext_len_set, - bcmpkt_dest_option_t_next_header_set, - bcmpkt_dest_option_t_option_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_34_2_0_dest_option_t_field_data[] = { - BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_34_2_0_dest_option_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_DEST_OPTION_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_34_2_0_dest_option_t_field_data, -}; - - -static int32_t bcmpkt_ep_nih_header_t_header_subtype_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 20, 4); - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_header_subtype_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 20, 4, val); - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_header_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 6); - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_header_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 6, val); - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 8, 4); - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 8, 4, val); - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 20, 4); - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 20, 4, val); - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 4); - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 4, val); - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[3], 16, 16); - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[3], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[3], 0, 16); - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[3], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 4); - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 4, val); - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 12, 4); - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 12, 4, val); - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_start_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 30, 2); - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_start_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 30, 2, val); - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_34_2_0_ep_nih_header_t_fget[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = { - bcmpkt_ep_nih_header_t_header_subtype_get, - bcmpkt_ep_nih_header_t_header_type_get, - bcmpkt_ep_nih_header_t_opaque_ctrl_a_get, - bcmpkt_ep_nih_header_t_opaque_ctrl_b_get, - bcmpkt_ep_nih_header_t_opaque_ctrl_c_get, - bcmpkt_ep_nih_header_t_opaque_object_a_get, - bcmpkt_ep_nih_header_t_opaque_object_b_get, - bcmpkt_ep_nih_header_t_opaque_object_c_get, - bcmpkt_ep_nih_header_t_recirc_profile_index_get, - bcmpkt_ep_nih_header_t_reserved_0_get, - bcmpkt_ep_nih_header_t_start_get, - bcmpkt_ep_nih_header_t_timestamp_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_34_2_0_ep_nih_header_t_fset[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = { - bcmpkt_ep_nih_header_t_header_subtype_set, - bcmpkt_ep_nih_header_t_header_type_set, - bcmpkt_ep_nih_header_t_opaque_ctrl_a_set, - bcmpkt_ep_nih_header_t_opaque_ctrl_b_set, - bcmpkt_ep_nih_header_t_opaque_ctrl_c_set, - bcmpkt_ep_nih_header_t_opaque_object_a_set, - bcmpkt_ep_nih_header_t_opaque_object_b_set, - bcmpkt_ep_nih_header_t_opaque_object_c_set, - bcmpkt_ep_nih_header_t_recirc_profile_index_set, - bcmpkt_ep_nih_header_t_reserved_0_set, - bcmpkt_ep_nih_header_t_start_set, - bcmpkt_ep_nih_header_t_timestamp_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_34_2_0_ep_nih_header_t_field_data[] = { - BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_34_2_0_ep_nih_header_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_34_2_0_ep_nih_header_t_field_data, -}; - - -static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 11, 2); - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 11, 2, val); - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 13, 3); - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 13, 3, val); - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 16, 16); - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 0, 16); - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 10); - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 10, val); - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_t_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 10, 1); - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_t_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 10, 1, val); - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 28, 4); - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 28, 4, val); - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 12); - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 12, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_34_2_0_erspan3_fixed_hdr_t_fget[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { - bcmpkt_erspan3_fixed_hdr_t_bso_get, - bcmpkt_erspan3_fixed_hdr_t_cos_get, - bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get, - bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get, - bcmpkt_erspan3_fixed_hdr_t_session_id_get, - bcmpkt_erspan3_fixed_hdr_t_t_get, - bcmpkt_erspan3_fixed_hdr_t_timestamp_get, - bcmpkt_erspan3_fixed_hdr_t_ver_get, - bcmpkt_erspan3_fixed_hdr_t_vlan_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_34_2_0_erspan3_fixed_hdr_t_fset[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { - bcmpkt_erspan3_fixed_hdr_t_bso_set, - bcmpkt_erspan3_fixed_hdr_t_cos_set, - bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set, - bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set, - bcmpkt_erspan3_fixed_hdr_t_session_id_set, - bcmpkt_erspan3_fixed_hdr_t_t_set, - bcmpkt_erspan3_fixed_hdr_t_timestamp_set, - bcmpkt_erspan3_fixed_hdr_t_ver_set, - bcmpkt_erspan3_fixed_hdr_t_vlan_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_34_2_0_erspan3_fixed_hdr_t_field_data[] = { - BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_34_2_0_erspan3_fixed_hdr_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_34_2_0_erspan3_fixed_hdr_t_field_data, -}; - - -static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 26, 6); - - return ret; -} - -static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 26, 6, val); - return ret; -} - -static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 10); - - return ret; -} - -static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 10, val); - return ret; -} - -static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_34_2_0_erspan3_subhdr_5_t_fget[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { - bcmpkt_erspan3_subhdr_5_t_platform_id_get, - bcmpkt_erspan3_subhdr_5_t_port_id_get, - bcmpkt_erspan3_subhdr_5_t_switch_id_get, - bcmpkt_erspan3_subhdr_5_t_timestamp_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_34_2_0_erspan3_subhdr_5_t_fset[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { - bcmpkt_erspan3_subhdr_5_t_platform_id_set, - bcmpkt_erspan3_subhdr_5_t_port_id_set, - bcmpkt_erspan3_subhdr_5_t_switch_id_set, - bcmpkt_erspan3_subhdr_5_t_timestamp_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_34_2_0_erspan3_subhdr_5_t_field_data[] = { - BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_34_2_0_erspan3_subhdr_5_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_34_2_0_erspan3_subhdr_5_t_field_data, -}; - - -static int32_t bcmpkt_esp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 0, 8); - - return ret; -} - -static int32_t bcmpkt_esp_t_next_header_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 0, 8, val); - return ret; -} - -static int32_t bcmpkt_esp_t_pad_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 8, 16); - - return ret; -} - -static int32_t bcmpkt_esp_t_pad_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 8, 16, val); - return ret; -} - -static int32_t bcmpkt_esp_t_pad_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 24, 8); - - return ret; -} - -static int32_t bcmpkt_esp_t_pad_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_esp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_esp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_esp_t_spi_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_esp_t_spi_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_34_2_0_esp_t_fget[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ESP_T_FID_COUNT] = { - bcmpkt_esp_t_next_header_get, - bcmpkt_esp_t_pad_get, - bcmpkt_esp_t_pad_len_get, - bcmpkt_esp_t_seq_num_get, - bcmpkt_esp_t_spi_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_34_2_0_esp_t_fset[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ESP_T_FID_COUNT] = { - bcmpkt_esp_t_next_header_set, - bcmpkt_esp_t_pad_set, - bcmpkt_esp_t_pad_len_set, - bcmpkt_esp_t_seq_num_set, - bcmpkt_esp_t_spi_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_34_2_0_esp_t_field_data[] = { - BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_34_2_0_esp_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ESP_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_34_2_0_esp_t_field_data, -}; - - -static int32_t bcmpkt_etag_t_tag_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_etag_t_tag_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_etag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_etag_t_tpid_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_34_2_0_etag_t_fget[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ETAG_T_FID_COUNT] = { - bcmpkt_etag_t_tag_get, - bcmpkt_etag_t_tpid_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_34_2_0_etag_t_fset[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ETAG_T_FID_COUNT] = { - bcmpkt_etag_t_tag_set, - bcmpkt_etag_t_tpid_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_34_2_0_etag_t_field_data[] = { - BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_34_2_0_etag_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ETAG_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_34_2_0_etag_t_field_data, -}; - - -static int32_t bcmpkt_ethertype_t_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_ethertype_t_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_34_2_0_ethertype_t_fget[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = { - bcmpkt_ethertype_t_type_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_34_2_0_ethertype_t_fset[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = { - bcmpkt_ethertype_t_type_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_34_2_0_ethertype_t_field_data[] = { - BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_34_2_0_ethertype_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_34_2_0_ethertype_t_field_data, -}; - - -static int32_t bcmpkt_frag_t_frag_info_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_frag_t_frag_info_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_frag_t_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_frag_t_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_frag_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_frag_t_next_header_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_frag_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_frag_t_reserved_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_34_2_0_frag_t_fget[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_FRAG_T_FID_COUNT] = { - bcmpkt_frag_t_frag_info_get, - bcmpkt_frag_t_id_get, - bcmpkt_frag_t_next_header_get, - bcmpkt_frag_t_reserved_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_34_2_0_frag_t_fset[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_FRAG_T_FID_COUNT] = { - bcmpkt_frag_t_frag_info_set, - bcmpkt_frag_t_id_set, - bcmpkt_frag_t_next_header_set, - bcmpkt_frag_t_reserved_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_34_2_0_frag_t_field_data[] = { - BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_34_2_0_frag_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_FRAG_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_34_2_0_frag_t_field_data, -}; - - -static int32_t bcmpkt_generic_loopback_t_destination_obj_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 16); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_destination_obj_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_destination_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 24, 4); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_destination_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 24, 4, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_entropy_obj_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[3], 16, 16); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_entropy_obj_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[3], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_flags_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 4); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_flags_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 4, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_header_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 20, 4); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_header_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 20, 4, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_input_priority_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 12, 4); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_input_priority_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 12, 4, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_interface_ctrl_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 4, 4); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_interface_ctrl_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 4, 4, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_interface_obj_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 0, 16); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_interface_obj_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 4); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 4, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 28, 4); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 28, 4, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_qos_obj_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 8); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_qos_obj_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_reserved_1_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 8, 4); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_reserved_1_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 8, 4, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_source_system_port_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 16, 16); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_source_system_port_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_start_byte_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_start_byte_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_svp_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[3], 0, 16); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_svp_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[3], 0, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_34_2_0_generic_loopback_t_fget[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { - bcmpkt_generic_loopback_t_destination_obj_get, - bcmpkt_generic_loopback_t_destination_type_get, - bcmpkt_generic_loopback_t_entropy_obj_get, - bcmpkt_generic_loopback_t_flags_get, - bcmpkt_generic_loopback_t_header_type_get, - bcmpkt_generic_loopback_t_input_priority_get, - bcmpkt_generic_loopback_t_interface_ctrl_get, - bcmpkt_generic_loopback_t_interface_obj_get, - bcmpkt_generic_loopback_t_processing_ctrl_0_get, - bcmpkt_generic_loopback_t_processing_ctrl_1_get, - bcmpkt_generic_loopback_t_qos_obj_get, - bcmpkt_generic_loopback_t_reserved_1_get, - bcmpkt_generic_loopback_t_source_system_port_get, - bcmpkt_generic_loopback_t_start_byte_get, - bcmpkt_generic_loopback_t_svp_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_34_2_0_generic_loopback_t_fset[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { - bcmpkt_generic_loopback_t_destination_obj_set, - bcmpkt_generic_loopback_t_destination_type_set, - bcmpkt_generic_loopback_t_entropy_obj_set, - bcmpkt_generic_loopback_t_flags_set, - bcmpkt_generic_loopback_t_header_type_set, - bcmpkt_generic_loopback_t_input_priority_set, - bcmpkt_generic_loopback_t_interface_ctrl_set, - bcmpkt_generic_loopback_t_interface_obj_set, - bcmpkt_generic_loopback_t_processing_ctrl_0_set, - bcmpkt_generic_loopback_t_processing_ctrl_1_set, - bcmpkt_generic_loopback_t_qos_obj_set, - bcmpkt_generic_loopback_t_reserved_1_set, - bcmpkt_generic_loopback_t_source_system_port_set, - bcmpkt_generic_loopback_t_start_byte_set, - bcmpkt_generic_loopback_t_svp_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_34_2_0_generic_loopback_t_field_data[] = { - BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_34_2_0_generic_loopback_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_34_2_0_generic_loopback_t_field_data, -}; - - -static int32_t bcmpkt_gpe_t_flags_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_gpe_t_flags_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_gpe_t_next_protocol_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 8); - - return ret; -} - -static int32_t bcmpkt_gpe_t_next_protocol_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 8, val); - return ret; -} - -static int32_t bcmpkt_gpe_t_reserved0_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 8, 16); - - return ret; -} - -static int32_t bcmpkt_gpe_t_reserved0_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 8, 16, val); - return ret; -} - -static int32_t bcmpkt_gpe_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 8); - - return ret; -} - -static int32_t bcmpkt_gpe_t_reserved1_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 8, val); - return ret; -} - -static int32_t bcmpkt_gpe_t_vni_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 8, 24); - - return ret; -} - -static int32_t bcmpkt_gpe_t_vni_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 8, 24, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_34_2_0_gpe_t_fget[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GPE_T_FID_COUNT] = { - bcmpkt_gpe_t_flags_get, - bcmpkt_gpe_t_next_protocol_get, - bcmpkt_gpe_t_reserved0_get, - bcmpkt_gpe_t_reserved1_get, - bcmpkt_gpe_t_vni_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_34_2_0_gpe_t_fset[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GPE_T_FID_COUNT] = { - bcmpkt_gpe_t_flags_set, - bcmpkt_gpe_t_next_protocol_set, - bcmpkt_gpe_t_reserved0_set, - bcmpkt_gpe_t_reserved1_set, - bcmpkt_gpe_t_vni_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_34_2_0_gpe_t_field_data[] = { - BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_34_2_0_gpe_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GPE_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_34_2_0_gpe_t_field_data, -}; - - -static int32_t bcmpkt_gre_chksum_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_gre_chksum_t_checksum_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_gre_chksum_t_offset_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_gre_chksum_t_offset_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_34_2_0_gre_chksum_t_fget[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = { - bcmpkt_gre_chksum_t_checksum_get, - bcmpkt_gre_chksum_t_offset_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_34_2_0_gre_chksum_t_fset[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = { - bcmpkt_gre_chksum_t_checksum_set, - bcmpkt_gre_chksum_t_offset_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_34_2_0_gre_chksum_t_field_data[] = { - BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_34_2_0_gre_chksum_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_34_2_0_gre_chksum_t_field_data, -}; - - -static int32_t bcmpkt_gre_key_t_key_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_gre_key_t_key_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_34_2_0_gre_key_t_fget[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GRE_KEY_T_FID_COUNT] = { - bcmpkt_gre_key_t_key_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_34_2_0_gre_key_t_fset[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GRE_KEY_T_FID_COUNT] = { - bcmpkt_gre_key_t_key_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_34_2_0_gre_key_t_field_data[] = { - BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_34_2_0_gre_key_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GRE_KEY_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_34_2_0_gre_key_t_field_data, -}; - - -static int32_t bcmpkt_gre_rout_t_routing_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_gre_rout_t_routing_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_34_2_0_gre_rout_t_fget[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = { - bcmpkt_gre_rout_t_routing_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_34_2_0_gre_rout_t_fset[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = { - bcmpkt_gre_rout_t_routing_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_34_2_0_gre_rout_t_field_data[] = { - BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_34_2_0_gre_rout_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GRE_ROUT_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_34_2_0_gre_rout_t_field_data, -}; - - -static int32_t bcmpkt_gre_seq_t_sequence_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_gre_seq_t_sequence_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_34_2_0_gre_seq_t_fget[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = { - bcmpkt_gre_seq_t_sequence_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_34_2_0_gre_seq_t_fset[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = { - bcmpkt_gre_seq_t_sequence_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_34_2_0_gre_seq_t_field_data[] = { - BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_34_2_0_gre_seq_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GRE_SEQ_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_34_2_0_gre_seq_t_field_data, -}; - - -static int32_t bcmpkt_gre_t_c_r_k_s_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 28, 4); - - return ret; -} - -static int32_t bcmpkt_gre_t_c_r_k_s_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 28, 4, val); - return ret; -} - -static int32_t bcmpkt_gre_t_protocol_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_gre_t_protocol_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_gre_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 19, 9); - - return ret; -} - -static int32_t bcmpkt_gre_t_reserved_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 19, 9, val); - return ret; -} - -static int32_t bcmpkt_gre_t_version_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 3); - - return ret; -} - -static int32_t bcmpkt_gre_t_version_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 3, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_34_2_0_gre_t_fget[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GRE_T_FID_COUNT] = { - bcmpkt_gre_t_c_r_k_s_get, - bcmpkt_gre_t_protocol_get, - bcmpkt_gre_t_reserved_get, - bcmpkt_gre_t_version_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_34_2_0_gre_t_fset[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GRE_T_FID_COUNT] = { - bcmpkt_gre_t_c_r_k_s_set, - bcmpkt_gre_t_protocol_set, - bcmpkt_gre_t_reserved_set, - bcmpkt_gre_t_version_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_34_2_0_gre_t_field_data[] = { - BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_34_2_0_gre_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_GRE_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_34_2_0_gre_t_field_data, -}; - - -static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_hop_by_hop_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_hop_by_hop_t_next_header_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_hop_by_hop_t_option_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_hop_by_hop_t_option_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_34_2_0_hop_by_hop_t_fget[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = { - bcmpkt_hop_by_hop_t_hdr_ext_len_get, - bcmpkt_hop_by_hop_t_next_header_get, - bcmpkt_hop_by_hop_t_option_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_34_2_0_hop_by_hop_t_fset[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = { - bcmpkt_hop_by_hop_t_hdr_ext_len_set, - bcmpkt_hop_by_hop_t_next_header_set, - bcmpkt_hop_by_hop_t_option_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_34_2_0_hop_by_hop_t_field_data[] = { - BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_34_2_0_hop_by_hop_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_34_2_0_hop_by_hop_t_field_data, -}; - - -static int32_t bcmpkt_icmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_icmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_icmp_t_code_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_icmp_t_code_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_icmp_t_icmp_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_icmp_t_icmp_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_34_2_0_icmp_t_fget[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ICMP_T_FID_COUNT] = { - bcmpkt_icmp_t_checksum_get, - bcmpkt_icmp_t_code_get, - bcmpkt_icmp_t_icmp_type_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_34_2_0_icmp_t_fset[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ICMP_T_FID_COUNT] = { - bcmpkt_icmp_t_checksum_set, - bcmpkt_icmp_t_code_set, - bcmpkt_icmp_t_icmp_type_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_34_2_0_icmp_t_field_data[] = { - BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_34_2_0_icmp_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ICMP_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_34_2_0_icmp_t_field_data, -}; - - -static int32_t bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 8); - - return ret; -} - -static int32_t bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 8, val); - return ret; -} - -static int32_t bcmpkt_ifa_flex_md_0_a_t_lns_device_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 8, 24); - - return ret; -} - -static int32_t bcmpkt_ifa_flex_md_0_a_t_lns_device_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 8, 24, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_34_2_0_ifa_flex_md_0_a_t_fget[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT] = { - bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_get, - bcmpkt_ifa_flex_md_0_a_t_lns_device_id_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_34_2_0_ifa_flex_md_0_a_t_fset[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT] = { - bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_set, - bcmpkt_ifa_flex_md_0_a_t_lns_device_id_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_34_2_0_ifa_flex_md_0_a_t_field_data[] = { - BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_34_2_0_ifa_flex_md_0_a_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_34_2_0_ifa_flex_md_0_a_t_field_data, -}; - - -static int32_t bcmpkt_ifa_flex_md_0_b_t_cn_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 26, 2); - - return ret; -} - -static int32_t bcmpkt_ifa_flex_md_0_b_t_cn_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 26, 2, val); - return ret; -} - -static int32_t bcmpkt_ifa_flex_md_0_b_t_port_speed_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 28, 4); - - return ret; -} - -static int32_t bcmpkt_ifa_flex_md_0_b_t_port_speed_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 28, 4, val); - return ret; -} - -static int32_t bcmpkt_ifa_flex_md_0_b_t_queue_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 20, 6); - - return ret; -} - -static int32_t bcmpkt_ifa_flex_md_0_b_t_queue_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 20, 6, val); - return ret; -} - -static int32_t bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 20); - - return ret; -} - -static int32_t bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 20, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_34_2_0_ifa_flex_md_0_b_t_fget[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT] = { - bcmpkt_ifa_flex_md_0_b_t_cn_get, - bcmpkt_ifa_flex_md_0_b_t_port_speed_get, - bcmpkt_ifa_flex_md_0_b_t_queue_id_get, - bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_34_2_0_ifa_flex_md_0_b_t_fset[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT] = { - bcmpkt_ifa_flex_md_0_b_t_cn_set, - bcmpkt_ifa_flex_md_0_b_t_port_speed_set, - bcmpkt_ifa_flex_md_0_b_t_queue_id_set, - bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_34_2_0_ifa_flex_md_0_b_t_field_data[] = { - BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_34_2_0_ifa_flex_md_0_b_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_34_2_0_ifa_flex_md_0_b_t_field_data, -}; - - -static int32_t bcmpkt_ifa_flex_md_1_t_egress_port_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_ifa_flex_md_1_t_egress_port_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_ifa_flex_md_1_t_ingress_port_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_ifa_flex_md_1_t_ingress_port_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_34_2_0_ifa_flex_md_1_t_fget[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT] = { - bcmpkt_ifa_flex_md_1_t_egress_port_id_get, - bcmpkt_ifa_flex_md_1_t_ingress_port_id_get, - bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_34_2_0_ifa_flex_md_1_t_fset[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT] = { - bcmpkt_ifa_flex_md_1_t_egress_port_id_set, - bcmpkt_ifa_flex_md_1_t_ingress_port_id_set, - bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_34_2_0_ifa_flex_md_1_t_field_data[] = { - BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_1_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_34_2_0_ifa_flex_md_1_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_34_2_0_ifa_flex_md_1_t_field_data, -}; - - -static int32_t bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_34_2_0_ifa_flex_md_2_t_fget[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT] = { - bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_get, - bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_34_2_0_ifa_flex_md_2_t_fset[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT] = { - bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_set, - bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_34_2_0_ifa_flex_md_2_t_field_data[] = { - BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_2_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_34_2_0_ifa_flex_md_2_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_34_2_0_ifa_flex_md_2_t_field_data, -}; - - -static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_0_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_0_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_1_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_1_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_34_2_0_ifa_flex_md_3_t_fget[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT] = { - bcmpkt_ifa_flex_md_3_t_mmu_stat_0_get, - bcmpkt_ifa_flex_md_3_t_mmu_stat_1_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_34_2_0_ifa_flex_md_3_t_fset[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT] = { - bcmpkt_ifa_flex_md_3_t_mmu_stat_0_set, - bcmpkt_ifa_flex_md_3_t_mmu_stat_1_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_34_2_0_ifa_flex_md_3_t_field_data[] = { - BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_3_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_34_2_0_ifa_flex_md_3_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_34_2_0_ifa_flex_md_3_t_field_data, -}; - - -static int32_t bcmpkt_ifa_header_t_flags_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 8, 8); - - return ret; -} - -static int32_t bcmpkt_ifa_header_t_flags_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 8, 8, val); - return ret; -} - -static int32_t bcmpkt_ifa_header_t_gns_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 4); - - return ret; -} - -static int32_t bcmpkt_ifa_header_t_gns_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 4, val); - return ret; -} - -static int32_t bcmpkt_ifa_header_t_max_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 8); - - return ret; -} - -static int32_t bcmpkt_ifa_header_t_max_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 8, val); - return ret; -} - -static int32_t bcmpkt_ifa_header_t_next_hdr_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_ifa_header_t_next_hdr_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_ifa_header_t_ver_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 28, 4); - - return ret; -} - -static int32_t bcmpkt_ifa_header_t_ver_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 28, 4, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_34_2_0_ifa_header_t_fget[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = { - bcmpkt_ifa_header_t_flags_get, - bcmpkt_ifa_header_t_gns_get, - bcmpkt_ifa_header_t_max_length_get, - bcmpkt_ifa_header_t_next_hdr_get, - bcmpkt_ifa_header_t_ver_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_34_2_0_ifa_header_t_fset[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = { - bcmpkt_ifa_header_t_flags_set, - bcmpkt_ifa_header_t_gns_set, - bcmpkt_ifa_header_t_max_length_set, - bcmpkt_ifa_header_t_next_hdr_set, - bcmpkt_ifa_header_t_ver_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_34_2_0_ifa_header_t_field_data[] = { - BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_34_2_0_ifa_header_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_34_2_0_ifa_header_t_field_data, -}; - - -static int32_t bcmpkt_ifa_md_base_t_action_vector_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_ifa_md_base_t_action_vector_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_ifa_md_base_t_hop_limit_current_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_ifa_md_base_t_hop_limit_current_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_ifa_md_base_t_request_vector_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_ifa_md_base_t_request_vector_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_34_2_0_ifa_md_base_t_fget[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT] = { - bcmpkt_ifa_md_base_t_action_vector_get, - bcmpkt_ifa_md_base_t_hop_limit_current_length_get, - bcmpkt_ifa_md_base_t_request_vector_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_34_2_0_ifa_md_base_t_fset[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT] = { - bcmpkt_ifa_md_base_t_action_vector_set, - bcmpkt_ifa_md_base_t_hop_limit_current_length_set, - bcmpkt_ifa_md_base_t_request_vector_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_34_2_0_ifa_md_base_t_field_data[] = { - BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_MD_BASE_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_34_2_0_ifa_md_base_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_34_2_0_ifa_md_base_t_field_data, -}; - - -static int32_t bcmpkt_ifa_metadata_t_action_vector_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_t_action_vector_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_ifa_metadata_t_hop_limit_current_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_t_hop_limit_current_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_ifa_metadata_t_metadata_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_t_metadata_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_t_request_vector_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_t_request_vector_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_34_2_0_ifa_metadata_t_fget[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_METADATA_T_FID_COUNT] = { - bcmpkt_ifa_metadata_t_action_vector_get, - bcmpkt_ifa_metadata_t_hop_limit_current_length_get, - bcmpkt_ifa_metadata_t_metadata_get, - bcmpkt_ifa_metadata_t_request_vector_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_34_2_0_ifa_metadata_t_fset[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_METADATA_T_FID_COUNT] = { - bcmpkt_ifa_metadata_t_action_vector_set, - bcmpkt_ifa_metadata_t_hop_limit_current_length_set, - bcmpkt_ifa_metadata_t_metadata_set, - bcmpkt_ifa_metadata_t_request_vector_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_34_2_0_ifa_metadata_t_field_data[] = { - BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_METADATA_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_34_2_0_ifa_metadata_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IFA_METADATA_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_34_2_0_ifa_metadata_t_field_data, -}; - - -static int32_t bcmpkt_igmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_igmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_igmp_t_group_address_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_igmp_t_group_address_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_igmp_t_igmp_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_igmp_t_igmp_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_igmp_t_max_resp_time_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_igmp_t_max_resp_time_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_34_2_0_igmp_t_fget[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IGMP_T_FID_COUNT] = { - bcmpkt_igmp_t_checksum_get, - bcmpkt_igmp_t_group_address_get, - bcmpkt_igmp_t_igmp_type_get, - bcmpkt_igmp_t_max_resp_time_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_34_2_0_igmp_t_fset[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IGMP_T_FID_COUNT] = { - bcmpkt_igmp_t_checksum_set, - bcmpkt_igmp_t_group_address_set, - bcmpkt_igmp_t_igmp_type_set, - bcmpkt_igmp_t_max_resp_time_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_34_2_0_igmp_t_field_data[] = { - BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_34_2_0_igmp_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IGMP_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_34_2_0_igmp_t_field_data, -}; - - -static int32_t bcmpkt_ipfix_t_export_time_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipfix_t_export_time_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipfix_t_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_ipfix_t_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_ipfix_t_obs_domain_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipfix_t_obs_domain_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipfix_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipfix_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipfix_t_version_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_ipfix_t_version_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_34_2_0_ipfix_t_fget[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IPFIX_T_FID_COUNT] = { - bcmpkt_ipfix_t_export_time_get, - bcmpkt_ipfix_t_length_get, - bcmpkt_ipfix_t_obs_domain_id_get, - bcmpkt_ipfix_t_sequence_num_get, - bcmpkt_ipfix_t_version_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_34_2_0_ipfix_t_fset[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IPFIX_T_FID_COUNT] = { - bcmpkt_ipfix_t_export_time_set, - bcmpkt_ipfix_t_length_set, - bcmpkt_ipfix_t_obs_domain_id_set, - bcmpkt_ipfix_t_sequence_num_set, - bcmpkt_ipfix_t_version_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_34_2_0_ipfix_t_field_data[] = { - BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_34_2_0_ipfix_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IPFIX_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_34_2_0_ipfix_t_field_data, -}; - - -static int32_t bcmpkt_ipv4_t_da_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv4_t_da_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv4_t_flags_frag_offset_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 16); - - return ret; -} - -static int32_t bcmpkt_ipv4_t_flags_frag_offset_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_ipv4_t_hdr_checksum_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 0, 16); - - return ret; -} - -static int32_t bcmpkt_ipv4_t_hdr_checksum_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_ipv4_t_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 16); - - return ret; -} - -static int32_t bcmpkt_ipv4_t_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_ipv4_t_option_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv4_t_option_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv4_t_protocol_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 16, 8); - - return ret; -} - -static int32_t bcmpkt_ipv4_t_protocol_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_ipv4_t_sa_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv4_t_sa_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv4_t_tos_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_ipv4_t_tos_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_ipv4_t_total_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_ipv4_t_total_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_ipv4_t_ttl_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 24, 8); - - return ret; -} - -static int32_t bcmpkt_ipv4_t_ttl_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_ipv4_t_version_hdr_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_ipv4_t_version_hdr_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_34_2_0_ipv4_t_fget[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IPV4_T_FID_COUNT] = { - bcmpkt_ipv4_t_da_get, - bcmpkt_ipv4_t_flags_frag_offset_get, - bcmpkt_ipv4_t_hdr_checksum_get, - bcmpkt_ipv4_t_id_get, - bcmpkt_ipv4_t_option_get, - bcmpkt_ipv4_t_protocol_get, - bcmpkt_ipv4_t_sa_get, - bcmpkt_ipv4_t_tos_get, - bcmpkt_ipv4_t_total_length_get, - bcmpkt_ipv4_t_ttl_get, - bcmpkt_ipv4_t_version_hdr_len_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_34_2_0_ipv4_t_fset[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IPV4_T_FID_COUNT] = { - bcmpkt_ipv4_t_da_set, - bcmpkt_ipv4_t_flags_frag_offset_set, - bcmpkt_ipv4_t_hdr_checksum_set, - bcmpkt_ipv4_t_id_set, - bcmpkt_ipv4_t_option_set, - bcmpkt_ipv4_t_protocol_set, - bcmpkt_ipv4_t_sa_set, - bcmpkt_ipv4_t_tos_set, - bcmpkt_ipv4_t_total_length_set, - bcmpkt_ipv4_t_ttl_set, - bcmpkt_ipv4_t_version_hdr_len_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_34_2_0_ipv4_t_field_data[] = { - BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_34_2_0_ipv4_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IPV4_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_34_2_0_ipv4_t_field_data, -}; - - -static int32_t bcmpkt_ipv6_t_da_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv6_t_da_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv6_t_flow_label_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 20); - - return ret; -} - -static int32_t bcmpkt_ipv6_t_flow_label_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 20, val); - return ret; -} - -static int32_t bcmpkt_ipv6_t_hop_limit_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 8); - - return ret; -} - -static int32_t bcmpkt_ipv6_t_hop_limit_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 8, val); - return ret; -} - -static int32_t bcmpkt_ipv6_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 8, 8); - - return ret; -} - -static int32_t bcmpkt_ipv6_t_next_header_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 8, 8, val); - return ret; -} - -static int32_t bcmpkt_ipv6_t_payload_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 16); - - return ret; -} - -static int32_t bcmpkt_ipv6_t_payload_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_ipv6_t_sa_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv6_t_sa_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv6_t_traffic_class_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 20, 8); - - return ret; -} - -static int32_t bcmpkt_ipv6_t_traffic_class_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 20, 8, val); - return ret; -} - -static int32_t bcmpkt_ipv6_t_version_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 28, 4); - - return ret; -} - -static int32_t bcmpkt_ipv6_t_version_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 28, 4, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_34_2_0_ipv6_t_fget[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IPV6_T_FID_COUNT] = { - bcmpkt_ipv6_t_da_get, - bcmpkt_ipv6_t_flow_label_get, - bcmpkt_ipv6_t_hop_limit_get, - bcmpkt_ipv6_t_next_header_get, - bcmpkt_ipv6_t_payload_length_get, - bcmpkt_ipv6_t_sa_get, - bcmpkt_ipv6_t_traffic_class_get, - bcmpkt_ipv6_t_version_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_34_2_0_ipv6_t_fset[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IPV6_T_FID_COUNT] = { - bcmpkt_ipv6_t_da_set, - bcmpkt_ipv6_t_flow_label_set, - bcmpkt_ipv6_t_hop_limit_set, - bcmpkt_ipv6_t_next_header_set, - bcmpkt_ipv6_t_payload_length_set, - bcmpkt_ipv6_t_sa_set, - bcmpkt_ipv6_t_traffic_class_set, - bcmpkt_ipv6_t_version_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_34_2_0_ipv6_t_field_data[] = { - BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_34_2_0_ipv6_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_IPV6_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_34_2_0_ipv6_t_field_data, -}; - - -static int32_t bcmpkt_l2_t_macda_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_l2_t_macda_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_l2_t_macsa_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_l2_t_macsa_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_34_2_0_l2_t_fget[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_L2_T_FID_COUNT] = { - bcmpkt_l2_t_macda_get, - bcmpkt_l2_t_macsa_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_34_2_0_l2_t_fset[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_L2_T_FID_COUNT] = { - bcmpkt_l2_t_macda_set, - bcmpkt_l2_t_macsa_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_34_2_0_l2_t_field_data[] = { - BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_34_2_0_l2_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_L2_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_34_2_0_l2_t_field_data, -}; - - -static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_34_2_0_mirror_erspan_sn_t_fget[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { - bcmpkt_mirror_erspan_sn_t_seq_num_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_34_2_0_mirror_erspan_sn_t_fset[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { - bcmpkt_mirror_erspan_sn_t_seq_num_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_34_2_0_mirror_erspan_sn_t_field_data[] = { - BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_34_2_0_mirror_erspan_sn_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_34_2_0_mirror_erspan_sn_t_field_data, -}; - - -static int32_t bcmpkt_mirror_transport_t_data_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_mirror_transport_t_data_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_34_2_0_mirror_transport_t_fget[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { - bcmpkt_mirror_transport_t_data_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_34_2_0_mirror_transport_t_fset[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { - bcmpkt_mirror_transport_t_data_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_34_2_0_mirror_transport_t_field_data[] = { - BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_34_2_0_mirror_transport_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_34_2_0_mirror_transport_t_field_data, -}; - - -static int32_t bcmpkt_mpls_ach_t_channel_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_mpls_ach_t_channel_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_mpls_ach_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 28, 4); - - return ret; -} - -static int32_t bcmpkt_mpls_ach_t_cw_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 28, 4, val); - return ret; -} - -static int32_t bcmpkt_mpls_ach_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_mpls_ach_t_reserved_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_mpls_ach_t_version_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 4); - - return ret; -} - -static int32_t bcmpkt_mpls_ach_t_version_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 4, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_34_2_0_mpls_ach_t_fget[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = { - bcmpkt_mpls_ach_t_channel_type_get, - bcmpkt_mpls_ach_t_cw_type_get, - bcmpkt_mpls_ach_t_reserved_get, - bcmpkt_mpls_ach_t_version_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_34_2_0_mpls_ach_t_fset[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = { - bcmpkt_mpls_ach_t_channel_type_set, - bcmpkt_mpls_ach_t_cw_type_set, - bcmpkt_mpls_ach_t_reserved_set, - bcmpkt_mpls_ach_t_version_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_34_2_0_mpls_ach_t_field_data[] = { - BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_34_2_0_mpls_ach_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_ACH_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_34_2_0_mpls_ach_t_field_data, -}; - - -static int32_t bcmpkt_mpls_bv_t_value_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_mpls_bv_t_value_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_34_2_0_mpls_bv_t_fget[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_BV_T_FID_COUNT] = { - bcmpkt_mpls_bv_t_value_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_34_2_0_mpls_bv_t_fset[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_BV_T_FID_COUNT] = { - bcmpkt_mpls_bv_t_value_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_34_2_0_mpls_bv_t_field_data[] = { - BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_34_2_0_mpls_bv_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_BV_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_34_2_0_mpls_bv_t_field_data, -}; - - -static int32_t bcmpkt_mpls_cw_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 28, 4); - - return ret; -} - -static int32_t bcmpkt_mpls_cw_t_cw_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 28, 4, val); - return ret; -} - -static int32_t bcmpkt_mpls_cw_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 12); - - return ret; -} - -static int32_t bcmpkt_mpls_cw_t_reserved_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 12, val); - return ret; -} - -static int32_t bcmpkt_mpls_cw_t_seq_number_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_mpls_cw_t_seq_number_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_34_2_0_mpls_cw_t_fget[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_CW_T_FID_COUNT] = { - bcmpkt_mpls_cw_t_cw_type_get, - bcmpkt_mpls_cw_t_reserved_get, - bcmpkt_mpls_cw_t_seq_number_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_34_2_0_mpls_cw_t_fset[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_CW_T_FID_COUNT] = { - bcmpkt_mpls_cw_t_cw_type_set, - bcmpkt_mpls_cw_t_reserved_set, - bcmpkt_mpls_cw_t_seq_number_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_34_2_0_mpls_cw_t_field_data[] = { - BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_34_2_0_mpls_cw_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_CW_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_34_2_0_mpls_cw_t_field_data, -}; - - -static int32_t bcmpkt_mpls_t_bos_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 8, 1); - - return ret; -} - -static int32_t bcmpkt_mpls_t_bos_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 8, 1, val); - return ret; -} - -static int32_t bcmpkt_mpls_t_exp_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 9, 3); - - return ret; -} - -static int32_t bcmpkt_mpls_t_exp_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 9, 3, val); - return ret; -} - -static int32_t bcmpkt_mpls_t_label_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 12, 20); - - return ret; -} - -static int32_t bcmpkt_mpls_t_label_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 12, 20, val); - return ret; -} - -static int32_t bcmpkt_mpls_t_ttl_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 8); - - return ret; -} - -static int32_t bcmpkt_mpls_t_ttl_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 8, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_34_2_0_mpls_t_fget[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_T_FID_COUNT] = { - bcmpkt_mpls_t_bos_get, - bcmpkt_mpls_t_exp_get, - bcmpkt_mpls_t_label_get, - bcmpkt_mpls_t_ttl_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_34_2_0_mpls_t_fset[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_T_FID_COUNT] = { - bcmpkt_mpls_t_bos_set, - bcmpkt_mpls_t_exp_set, - bcmpkt_mpls_t_label_set, - bcmpkt_mpls_t_ttl_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_34_2_0_mpls_t_field_data[] = { - BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_34_2_0_mpls_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_34_2_0_mpls_t_field_data, -}; - - -static int32_t bcmpkt_p_1588_t_cntrl_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[8], 24, 8); - - return ret; -} - -static int32_t bcmpkt_p_1588_t_cntrl_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[8], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_p_1588_t_correction_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_p_1588_t_correction_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_p_1588_t_domain_nb_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 24, 8); - - return ret; -} - -static int32_t bcmpkt_p_1588_t_domain_nb_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_p_1588_t_flags_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 16); - - return ret; -} - -static int32_t bcmpkt_p_1588_t_flags_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_p_1588_t_logmsginterval_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[8], 16, 8); - - return ret; -} - -static int32_t bcmpkt_p_1588_t_logmsginterval_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[8], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_p_1588_t_msg_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_p_1588_t_msg_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_p_1588_t_msg_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 4); - - return ret; -} - -static int32_t bcmpkt_p_1588_t_msg_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 4, val); - return ret; -} - -static int32_t bcmpkt_p_1588_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 20, 4); - - return ret; -} - -static int32_t bcmpkt_p_1588_t_reserved1_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 20, 4, val); - return ret; -} - -static int32_t bcmpkt_p_1588_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 8); - - return ret; -} - -static int32_t bcmpkt_p_1588_t_reserved2_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_p_1588_t_reserved3_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_p_1588_t_reserved3_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_p_1588_t_seq_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[7], 0, 16); - - return ret; -} - -static int32_t bcmpkt_p_1588_t_seq_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[7], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_p_1588_t_srcportid_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_p_1588_t_srcportid_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_p_1588_t_transportspec_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 28, 4); - - return ret; -} - -static int32_t bcmpkt_p_1588_t_transportspec_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 28, 4, val); - return ret; -} - -static int32_t bcmpkt_p_1588_t_version_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 4); - - return ret; -} - -static int32_t bcmpkt_p_1588_t_version_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 4, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_34_2_0_p_1588_t_fget[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_P_1588_T_FID_COUNT] = { - bcmpkt_p_1588_t_cntrl_get, - bcmpkt_p_1588_t_correction_get, - bcmpkt_p_1588_t_domain_nb_get, - bcmpkt_p_1588_t_flags_get, - bcmpkt_p_1588_t_logmsginterval_get, - bcmpkt_p_1588_t_msg_length_get, - bcmpkt_p_1588_t_msg_type_get, - bcmpkt_p_1588_t_reserved1_get, - bcmpkt_p_1588_t_reserved2_get, - bcmpkt_p_1588_t_reserved3_get, - bcmpkt_p_1588_t_seq_id_get, - bcmpkt_p_1588_t_srcportid_get, - bcmpkt_p_1588_t_transportspec_get, - bcmpkt_p_1588_t_version_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_34_2_0_p_1588_t_fset[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_P_1588_T_FID_COUNT] = { - bcmpkt_p_1588_t_cntrl_set, - bcmpkt_p_1588_t_correction_set, - bcmpkt_p_1588_t_domain_nb_set, - bcmpkt_p_1588_t_flags_set, - bcmpkt_p_1588_t_logmsginterval_set, - bcmpkt_p_1588_t_msg_length_set, - bcmpkt_p_1588_t_msg_type_set, - bcmpkt_p_1588_t_reserved1_set, - bcmpkt_p_1588_t_reserved2_set, - bcmpkt_p_1588_t_reserved3_set, - bcmpkt_p_1588_t_seq_id_set, - bcmpkt_p_1588_t_srcportid_set, - bcmpkt_p_1588_t_transportspec_set, - bcmpkt_p_1588_t_version_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_34_2_0_p_1588_t_field_data[] = { - BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_34_2_0_p_1588_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_P_1588_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_34_2_0_p_1588_t_field_data, -}; - - -static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_prog_ext_hdr_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_prog_ext_hdr_t_next_header_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_prog_ext_hdr_t_option_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_prog_ext_hdr_t_option_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_34_2_0_prog_ext_hdr_t_fget[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = { - bcmpkt_prog_ext_hdr_t_hdr_ext_len_get, - bcmpkt_prog_ext_hdr_t_next_header_get, - bcmpkt_prog_ext_hdr_t_option_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_34_2_0_prog_ext_hdr_t_fset[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = { - bcmpkt_prog_ext_hdr_t_hdr_ext_len_set, - bcmpkt_prog_ext_hdr_t_next_header_set, - bcmpkt_prog_ext_hdr_t_option_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_34_2_0_prog_ext_hdr_t_field_data[] = { - BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_34_2_0_prog_ext_hdr_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_34_2_0_prog_ext_hdr_t_field_data, -}; - - -static int32_t bcmpkt_psamp_0_t_flowset_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[3], 16, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_0_t_flowset_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[3], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_0_t_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_0_t_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_0_t_next_hop_index_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[3], 0, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_0_t_next_hop_index_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[3], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_34_2_0_psamp_0_t_fget[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_0_T_FID_COUNT] = { - bcmpkt_psamp_0_t_flowset_get, - bcmpkt_psamp_0_t_length_get, - bcmpkt_psamp_0_t_next_hop_index_get, - bcmpkt_psamp_0_t_obs_time_ns_get, - bcmpkt_psamp_0_t_obs_time_s_get, - bcmpkt_psamp_0_t_template_id_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_34_2_0_psamp_0_t_fset[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_0_T_FID_COUNT] = { - bcmpkt_psamp_0_t_flowset_set, - bcmpkt_psamp_0_t_length_set, - bcmpkt_psamp_0_t_next_hop_index_set, - bcmpkt_psamp_0_t_obs_time_ns_set, - bcmpkt_psamp_0_t_obs_time_s_set, - bcmpkt_psamp_0_t_template_id_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_34_2_0_psamp_0_t_field_data[] = { - BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_34_2_0_psamp_0_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_0_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_34_2_0_psamp_0_t_field_data, -}; - - -static int32_t bcmpkt_psamp_1_t_dlb_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 24, 8); - - return ret; -} - -static int32_t bcmpkt_psamp_1_t_dlb_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_psamp_1_t_egress_port_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_1_t_egress_port_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_1_t_epoch_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_1_t_epoch_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_1_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_1_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_1_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 0, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_1_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_1_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_1_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_1_t_variable_flag_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 16, 8); - - return ret; -} - -static int32_t bcmpkt_psamp_1_t_variable_flag_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 16, 8, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_34_2_0_psamp_1_t_fget[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_1_T_FID_COUNT] = { - bcmpkt_psamp_1_t_dlb_id_get, - bcmpkt_psamp_1_t_egress_port_get, - bcmpkt_psamp_1_t_epoch_get, - bcmpkt_psamp_1_t_ingress_port_get, - bcmpkt_psamp_1_t_sampled_length_get, - bcmpkt_psamp_1_t_user_meta_data_get, - bcmpkt_psamp_1_t_variable_flag_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_34_2_0_psamp_1_t_fset[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_1_T_FID_COUNT] = { - bcmpkt_psamp_1_t_dlb_id_set, - bcmpkt_psamp_1_t_egress_port_set, - bcmpkt_psamp_1_t_epoch_set, - bcmpkt_psamp_1_t_ingress_port_set, - bcmpkt_psamp_1_t_sampled_length_set, - bcmpkt_psamp_1_t_user_meta_data_set, - bcmpkt_psamp_1_t_variable_flag_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_34_2_0_psamp_1_t_field_data[] = { - BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_34_2_0_psamp_1_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_1_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_34_2_0_psamp_1_t_field_data, -}; - - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[4], 16, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[4], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[4], 0, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[4], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_34_2_0_psamp_mirror_on_drop_0_t_fget[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { - bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get, - bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get, - bcmpkt_psamp_mirror_on_drop_0_t_length_get, - bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get, - bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get, - bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get, - bcmpkt_psamp_mirror_on_drop_0_t_template_id_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_34_2_0_psamp_mirror_on_drop_0_t_fset[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { - bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set, - bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set, - bcmpkt_psamp_mirror_on_drop_0_t_length_set, - bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set, - bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set, - bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set, - bcmpkt_psamp_mirror_on_drop_0_t_template_id_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_34_2_0_psamp_mirror_on_drop_0_t_field_data[] = { - BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_34_2_0_psamp_mirror_on_drop_0_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_34_2_0_psamp_mirror_on_drop_0_t_field_data, -}; - - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 6); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 6, val); - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_smod_state_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 22, 2); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_smod_state_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 22, 2, val); - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 24, 8); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 8); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 8, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_34_2_0_psamp_mirror_on_drop_3_t_fget[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = { - bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get, - bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get, - bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get, - bcmpkt_psamp_mirror_on_drop_3_t_smod_state_get, - bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get, - bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get, - bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_34_2_0_psamp_mirror_on_drop_3_t_fset[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = { - bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set, - bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set, - bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set, - bcmpkt_psamp_mirror_on_drop_3_t_smod_state_set, - bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set, - bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set, - bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_34_2_0_psamp_mirror_on_drop_3_t_field_data[] = { - BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_34_2_0_psamp_mirror_on_drop_3_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_34_2_0_psamp_mirror_on_drop_3_t_field_data, -}; - - -static int32_t bcmpkt_rarp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 24, 8); - - return ret; -} - -static int32_t bcmpkt_rarp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_rarp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_rarp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_rarp_t_operation_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 16); - - return ret; -} - -static int32_t bcmpkt_rarp_t_operation_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_rarp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 8); - - return ret; -} - -static int32_t bcmpkt_rarp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_rarp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_rarp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_rarp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_rarp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_rarp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_rarp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_rarp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_rarp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_rarp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_rarp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_34_2_0_rarp_t_fget[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RARP_T_FID_COUNT] = { - bcmpkt_rarp_t_hardware_len_get, - bcmpkt_rarp_t_hardware_type_get, - bcmpkt_rarp_t_operation_get, - bcmpkt_rarp_t_prot_addr_len_get, - bcmpkt_rarp_t_protocol_type_get, - bcmpkt_rarp_t_sender_ha_get, - bcmpkt_rarp_t_sender_ip_get, - bcmpkt_rarp_t_target_ha_get, - bcmpkt_rarp_t_target_ip_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_34_2_0_rarp_t_fset[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RARP_T_FID_COUNT] = { - bcmpkt_rarp_t_hardware_len_set, - bcmpkt_rarp_t_hardware_type_set, - bcmpkt_rarp_t_operation_set, - bcmpkt_rarp_t_prot_addr_len_set, - bcmpkt_rarp_t_protocol_type_set, - bcmpkt_rarp_t_sender_ha_set, - bcmpkt_rarp_t_sender_ip_set, - bcmpkt_rarp_t_target_ha_set, - bcmpkt_rarp_t_target_ip_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_34_2_0_rarp_t_field_data[] = { - BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_34_2_0_rarp_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RARP_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_34_2_0_rarp_t_field_data, -}; - - -static int32_t bcmpkt_routing_t_data_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_routing_t_data_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_routing_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_routing_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_routing_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_routing_t_next_header_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_routing_t_routing_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 8, 8); - - return ret; -} - -static int32_t bcmpkt_routing_t_routing_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 8, 8, val); - return ret; -} - -static int32_t bcmpkt_routing_t_segments_left_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 8); - - return ret; -} - -static int32_t bcmpkt_routing_t_segments_left_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 8, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_34_2_0_routing_t_fget[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ROUTING_T_FID_COUNT] = { - bcmpkt_routing_t_data_get, - bcmpkt_routing_t_hdr_ext_len_get, - bcmpkt_routing_t_next_header_get, - bcmpkt_routing_t_routing_type_get, - bcmpkt_routing_t_segments_left_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_34_2_0_routing_t_fset[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ROUTING_T_FID_COUNT] = { - bcmpkt_routing_t_data_set, - bcmpkt_routing_t_hdr_ext_len_set, - bcmpkt_routing_t_next_header_set, - bcmpkt_routing_t_routing_type_set, - bcmpkt_routing_t_segments_left_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_34_2_0_routing_t_field_data[] = { - BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_34_2_0_routing_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_ROUTING_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_34_2_0_routing_t_field_data, -}; - - -static int32_t bcmpkt_rspan_t_tag_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_rspan_t_tag_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_rspan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_rspan_t_tpid_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_34_2_0_rspan_t_fget[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RSPAN_T_FID_COUNT] = { - bcmpkt_rspan_t_tag_get, - bcmpkt_rspan_t_tpid_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_34_2_0_rspan_t_fset[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RSPAN_T_FID_COUNT] = { - bcmpkt_rspan_t_tag_set, - bcmpkt_rspan_t_tpid_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_34_2_0_rspan_t_field_data[] = { - BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_34_2_0_rspan_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_RSPAN_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_34_2_0_rspan_t_field_data, -}; - - -static int32_t bcmpkt_sflow_shim_0_t_sys_destination_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 16); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_0_t_sys_destination_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_sflow_shim_0_t_sys_source_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 16); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_0_t_sys_source_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_sflow_shim_0_t_version_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_sflow_shim_0_t_version_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_34_2_0_sflow_shim_0_t_fget[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { - bcmpkt_sflow_shim_0_t_sys_destination_get, - bcmpkt_sflow_shim_0_t_sys_source_get, - bcmpkt_sflow_shim_0_t_version_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_34_2_0_sflow_shim_0_t_fset[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { - bcmpkt_sflow_shim_0_t_sys_destination_set, - bcmpkt_sflow_shim_0_t_sys_source_set, - bcmpkt_sflow_shim_0_t_version_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_34_2_0_sflow_shim_0_t_field_data[] = { - BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_34_2_0_sflow_shim_0_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_34_2_0_sflow_shim_0_t_field_data, -}; - - -static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 30, 1); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 30, 1, val); - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 27, 1); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 27, 1, val); - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 29, 1); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 29, 1, val); - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 28, 1); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 28, 1, val); - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 31, 1); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 31, 1, val); - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 26, 1); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 26, 1, val); - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 7); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_reserved_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 7, val); - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 23, 3); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 23, 3, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_34_2_0_sflow_shim_1_t_fget[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { - bcmpkt_sflow_shim_1_t_flag_dest_sample_get, - bcmpkt_sflow_shim_1_t_flag_discarded_get, - bcmpkt_sflow_shim_1_t_flag_flex_sample_get, - bcmpkt_sflow_shim_1_t_flag_mcast_get, - bcmpkt_sflow_shim_1_t_flag_src_sample_get, - bcmpkt_sflow_shim_1_t_flag_truncated_get, - bcmpkt_sflow_shim_1_t_reserved_get, - bcmpkt_sflow_shim_1_t_sys_opcode_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_34_2_0_sflow_shim_1_t_fset[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { - bcmpkt_sflow_shim_1_t_flag_dest_sample_set, - bcmpkt_sflow_shim_1_t_flag_discarded_set, - bcmpkt_sflow_shim_1_t_flag_flex_sample_set, - bcmpkt_sflow_shim_1_t_flag_mcast_set, - bcmpkt_sflow_shim_1_t_flag_src_sample_set, - bcmpkt_sflow_shim_1_t_flag_truncated_set, - bcmpkt_sflow_shim_1_t_reserved_set, - bcmpkt_sflow_shim_1_t_sys_opcode_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_34_2_0_sflow_shim_1_t_field_data[] = { - BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_34_2_0_sflow_shim_1_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_34_2_0_sflow_shim_1_t_field_data, -}; - - -static int32_t bcmpkt_sflow_shim_2_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_sflow_shim_2_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_34_2_0_sflow_shim_2_t_fget[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { - bcmpkt_sflow_shim_2_t_sequence_num_get, - bcmpkt_sflow_shim_2_t_user_meta_data_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_34_2_0_sflow_shim_2_t_fset[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { - bcmpkt_sflow_shim_2_t_sequence_num_set, - bcmpkt_sflow_shim_2_t_user_meta_data_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_34_2_0_sflow_shim_2_t_field_data[] = { - BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_34_2_0_sflow_shim_2_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_34_2_0_sflow_shim_2_t_field_data, -}; - - -static int32_t bcmpkt_snap_llc_t_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_snap_llc_t_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_snap_llc_t_snap_llc_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_snap_llc_t_snap_llc_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_34_2_0_snap_llc_t_fget[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = { - bcmpkt_snap_llc_t_length_get, - bcmpkt_snap_llc_t_snap_llc_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_34_2_0_snap_llc_t_fset[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = { - bcmpkt_snap_llc_t_length_set, - bcmpkt_snap_llc_t_snap_llc_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_34_2_0_snap_llc_t_field_data[] = { - BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_34_2_0_snap_llc_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_SNAP_LLC_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_34_2_0_snap_llc_t_field_data, -}; - - -static int32_t bcmpkt_svtag_t_data_lwr_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_svtag_t_data_lwr_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_svtag_t_data_upr_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_svtag_t_data_upr_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_34_2_0_svtag_t_fget[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_SVTAG_T_FID_COUNT] = { - bcmpkt_svtag_t_data_lwr_get, - bcmpkt_svtag_t_data_upr_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_34_2_0_svtag_t_fset[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_SVTAG_T_FID_COUNT] = { - bcmpkt_svtag_t_data_lwr_set, - bcmpkt_svtag_t_data_upr_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_34_2_0_svtag_t_field_data[] = { - BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_SVTAG_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_34_2_0_svtag_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_SVTAG_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_34_2_0_svtag_t_field_data, -}; - - -static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_tcp_first_4bytes_t_src_port_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_tcp_first_4bytes_t_src_port_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_34_2_0_tcp_first_4bytes_t_fget[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { - bcmpkt_tcp_first_4bytes_t_dst_port_get, - bcmpkt_tcp_first_4bytes_t_src_port_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_34_2_0_tcp_first_4bytes_t_fset[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { - bcmpkt_tcp_first_4bytes_t_dst_port_set, - bcmpkt_tcp_first_4bytes_t_src_port_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_34_2_0_tcp_first_4bytes_t_field_data[] = { - BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_34_2_0_tcp_first_4bytes_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_34_2_0_tcp_first_4bytes_t_field_data, -}; - - -static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[3], 16, 16); - - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_checksum_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[3], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 16, 16); - - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[3], 0, 16); - - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[3], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_win_size_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 0, 16); - - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_win_size_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 0, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_34_2_0_tcp_last_16bytes_t_fget[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { - bcmpkt_tcp_last_16bytes_t_ack_num_get, - bcmpkt_tcp_last_16bytes_t_checksum_get, - bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get, - bcmpkt_tcp_last_16bytes_t_seq_num_get, - bcmpkt_tcp_last_16bytes_t_urgent_ptr_get, - bcmpkt_tcp_last_16bytes_t_win_size_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_34_2_0_tcp_last_16bytes_t_fset[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { - bcmpkt_tcp_last_16bytes_t_ack_num_set, - bcmpkt_tcp_last_16bytes_t_checksum_set, - bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set, - bcmpkt_tcp_last_16bytes_t_seq_num_set, - bcmpkt_tcp_last_16bytes_t_urgent_ptr_set, - bcmpkt_tcp_last_16bytes_t_win_size_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_34_2_0_tcp_last_16bytes_t_field_data[] = { - BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_34_2_0_tcp_last_16bytes_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_34_2_0_tcp_last_16bytes_t_field_data, -}; - - -static int32_t bcmpkt_udp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 16); - - return ret; -} - -static int32_t bcmpkt_udp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_udp_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_udp_t_dst_port_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_udp_t_src_port_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_udp_t_src_port_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_udp_t_udp_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 16); - - return ret; -} - -static int32_t bcmpkt_udp_t_udp_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_34_2_0_udp_t_fget[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_UDP_T_FID_COUNT] = { - bcmpkt_udp_t_checksum_get, - bcmpkt_udp_t_dst_port_get, - bcmpkt_udp_t_src_port_get, - bcmpkt_udp_t_udp_length_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_34_2_0_udp_t_fset[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_UDP_T_FID_COUNT] = { - bcmpkt_udp_t_checksum_set, - bcmpkt_udp_t_dst_port_set, - bcmpkt_udp_t_src_port_set, - bcmpkt_udp_t_udp_length_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_34_2_0_udp_t_field_data[] = { - BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_34_2_0_udp_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_UDP_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_34_2_0_udp_t_field_data, -}; - - -static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_34_2_0_unknown_l3_t_fget[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { - bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get, - bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_34_2_0_unknown_l3_t_fset[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { - bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set, - bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_34_2_0_unknown_l3_t_field_data[] = { - BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_34_2_0_unknown_l3_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_34_2_0_unknown_l3_t_field_data, -}; - - -static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_34_2_0_unknown_l4_t_fget[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { - bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_34_2_0_unknown_l4_t_fset[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { - bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_34_2_0_unknown_l4_t_field_data[] = { - BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_34_2_0_unknown_l4_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_34_2_0_unknown_l4_t_field_data, -}; - - -static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_34_2_0_unknown_l5_t_fget[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { - bcmpkt_unknown_l5_t_l5_bytes_0_1_get, - bcmpkt_unknown_l5_t_l5_bytes_2_3_get, - bcmpkt_unknown_l5_t_l5_bytes_4_7_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_34_2_0_unknown_l5_t_fset[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { - bcmpkt_unknown_l5_t_l5_bytes_0_1_set, - bcmpkt_unknown_l5_t_l5_bytes_2_3_set, - bcmpkt_unknown_l5_t_l5_bytes_4_7_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_34_2_0_unknown_l5_t_field_data[] = { - BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_34_2_0_unknown_l5_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_34_2_0_unknown_l5_t_field_data, -}; - - -static int32_t bcmpkt_vlan_t_cfi_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 12, 1); - - return ret; -} - -static int32_t bcmpkt_vlan_t_cfi_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 12, 1, val); - return ret; -} - -static int32_t bcmpkt_vlan_t_pcp_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 13, 3); - - return ret; -} - -static int32_t bcmpkt_vlan_t_pcp_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 13, 3, val); - return ret; -} - -static int32_t bcmpkt_vlan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_vlan_t_tpid_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_vlan_t_vid_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 12); - - return ret; -} - -static int32_t bcmpkt_vlan_t_vid_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 12, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_34_2_0_vlan_t_fget[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_VLAN_T_FID_COUNT] = { - bcmpkt_vlan_t_cfi_get, - bcmpkt_vlan_t_pcp_get, - bcmpkt_vlan_t_tpid_get, - bcmpkt_vlan_t_vid_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_34_2_0_vlan_t_fset[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_VLAN_T_FID_COUNT] = { - bcmpkt_vlan_t_cfi_set, - bcmpkt_vlan_t_pcp_set, - bcmpkt_vlan_t_tpid_set, - bcmpkt_vlan_t_vid_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_34_2_0_vlan_t_field_data[] = { - BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_34_2_0_vlan_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_VLAN_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_34_2_0_vlan_t_field_data, -}; - - -static int32_t bcmpkt_vntag_t_tag_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_vntag_t_tag_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_vntag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_vntag_t_tpid_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_34_2_0_vntag_t_fget[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_VNTAG_T_FID_COUNT] = { - bcmpkt_vntag_t_tag_get, - bcmpkt_vntag_t_tpid_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_34_2_0_vntag_t_fset[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_VNTAG_T_FID_COUNT] = { - bcmpkt_vntag_t_tag_set, - bcmpkt_vntag_t_tpid_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_34_2_0_vntag_t_field_data[] = { - BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_34_2_0_vntag_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_VNTAG_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_34_2_0_vntag_t_field_data, -}; - - -static int32_t bcmpkt_vxlan_t_flags_reserved_1_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_vxlan_t_flags_reserved_1_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_vxlan_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 8); - - return ret; -} - -static int32_t bcmpkt_vxlan_t_reserved2_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 8, val); - return ret; -} - -static int32_t bcmpkt_vxlan_t_vn_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 8, 24); - - return ret; -} - -static int32_t bcmpkt_vxlan_t_vn_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 8, 24, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_34_2_0_vxlan_t_fget[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_VXLAN_T_FID_COUNT] = { - bcmpkt_vxlan_t_flags_reserved_1_get, - bcmpkt_vxlan_t_reserved2_get, - bcmpkt_vxlan_t_vn_id_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_34_2_0_vxlan_t_fset[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_VXLAN_T_FID_COUNT] = { - bcmpkt_vxlan_t_flags_reserved_1_set, - bcmpkt_vxlan_t_reserved2_set, - bcmpkt_vxlan_t_vn_id_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_34_2_0_vxlan_t_field_data[] = { - BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_34_2_0_vxlan_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_VXLAN_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_34_2_0_vxlan_t_field_data, -}; - - -static int32_t bcmpkt_wesp_t_flags_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 8); - - return ret; -} - -static int32_t bcmpkt_wesp_t_flags_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 8, val); - return ret; -} - -static int32_t bcmpkt_wesp_t_header_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_wesp_t_header_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_wesp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_wesp_t_next_header_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_wesp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_wesp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_wesp_t_spi_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_wesp_t_spi_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_wesp_t_trailer_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 8, 8); - - return ret; -} - -static int32_t bcmpkt_wesp_t_trailer_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 8, 8, val); - return ret; -} - -static int32_t bcmpkt_wesp_t_wesp_iv_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_wesp_t_wesp_iv_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56780_a0_hna_6_5_34_2_0_wesp_t_fget[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_WESP_T_FID_COUNT] = { - bcmpkt_wesp_t_flags_get, - bcmpkt_wesp_t_header_len_get, - bcmpkt_wesp_t_next_header_get, - bcmpkt_wesp_t_seq_num_get, - bcmpkt_wesp_t_spi_get, - bcmpkt_wesp_t_trailer_len_get, - bcmpkt_wesp_t_wesp_iv_get, -}; - -bcmpkt_flex_field_set_f bcm56780_a0_hna_6_5_34_2_0_wesp_t_fset[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_WESP_T_FID_COUNT] = { - bcmpkt_wesp_t_flags_set, - bcmpkt_wesp_t_header_len_set, - bcmpkt_wesp_t_next_header_set, - bcmpkt_wesp_t_seq_num_set, - bcmpkt_wesp_t_spi_set, - bcmpkt_wesp_t_trailer_len_set, - bcmpkt_wesp_t_wesp_iv_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56780_a0_hna_6_5_34_2_0_wesp_t_field_data[] = { - BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56780_a0_hna_6_5_34_2_0_wesp_t_field_info = { - .num_fields = BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_WESP_T_FID_COUNT, - .info = bcm56780_a0_hna_6_5_34_2_0_wesp_t_field_data, -}; - -static bcmpkt_flex_pmd_info_t bcm56780_a0_hna_6_5_34_2_0_flexhdr_info_list[BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_FLEXHDR_COUNT] = { - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_34_2_0_arp_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_34_2_0_arp_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_34_2_0_arp_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_34_2_0_authen_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_34_2_0_authen_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_34_2_0_authen_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_34_2_0_bfd_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_34_2_0_bfd_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_34_2_0_bfd_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_34_2_0_cntag_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_34_2_0_cntag_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_34_2_0_cntag_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_34_2_0_cpu_composites_0_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_34_2_0_cpu_composites_0_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_34_2_0_cpu_composites_0_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_34_2_0_cpu_composites_1_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_34_2_0_cpu_composites_1_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_34_2_0_cpu_composites_1_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_34_2_0_dest_option_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_34_2_0_dest_option_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_34_2_0_dest_option_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_34_2_0_ep_nih_header_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_34_2_0_ep_nih_header_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_34_2_0_ep_nih_header_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_34_2_0_erspan3_fixed_hdr_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_34_2_0_erspan3_fixed_hdr_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_34_2_0_erspan3_fixed_hdr_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_34_2_0_erspan3_subhdr_5_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_34_2_0_erspan3_subhdr_5_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_34_2_0_erspan3_subhdr_5_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_34_2_0_esp_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_34_2_0_esp_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_34_2_0_esp_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_34_2_0_etag_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_34_2_0_etag_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_34_2_0_etag_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_34_2_0_ethertype_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_34_2_0_ethertype_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_34_2_0_ethertype_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_34_2_0_frag_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_34_2_0_frag_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_34_2_0_frag_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_34_2_0_generic_loopback_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_34_2_0_generic_loopback_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_34_2_0_generic_loopback_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_34_2_0_gpe_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_34_2_0_gpe_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_34_2_0_gpe_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_34_2_0_gre_chksum_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_34_2_0_gre_chksum_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_34_2_0_gre_chksum_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_34_2_0_gre_key_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_34_2_0_gre_key_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_34_2_0_gre_key_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_34_2_0_gre_rout_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_34_2_0_gre_rout_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_34_2_0_gre_rout_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_34_2_0_gre_seq_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_34_2_0_gre_seq_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_34_2_0_gre_seq_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_34_2_0_gre_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_34_2_0_gre_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_34_2_0_gre_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_34_2_0_hop_by_hop_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_34_2_0_hop_by_hop_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_34_2_0_hop_by_hop_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_34_2_0_icmp_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_34_2_0_icmp_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_34_2_0_icmp_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_34_2_0_ifa_flex_md_0_a_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_34_2_0_ifa_flex_md_0_a_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_34_2_0_ifa_flex_md_0_a_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_34_2_0_ifa_flex_md_0_b_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_34_2_0_ifa_flex_md_0_b_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_34_2_0_ifa_flex_md_0_b_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_34_2_0_ifa_flex_md_1_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_34_2_0_ifa_flex_md_1_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_34_2_0_ifa_flex_md_1_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_34_2_0_ifa_flex_md_2_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_34_2_0_ifa_flex_md_2_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_34_2_0_ifa_flex_md_2_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_34_2_0_ifa_flex_md_3_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_34_2_0_ifa_flex_md_3_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_34_2_0_ifa_flex_md_3_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_34_2_0_ifa_header_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_34_2_0_ifa_header_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_34_2_0_ifa_header_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_34_2_0_ifa_md_base_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_34_2_0_ifa_md_base_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_34_2_0_ifa_md_base_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_34_2_0_ifa_metadata_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_34_2_0_ifa_metadata_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_34_2_0_ifa_metadata_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_34_2_0_igmp_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_34_2_0_igmp_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_34_2_0_igmp_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_34_2_0_ipfix_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_34_2_0_ipfix_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_34_2_0_ipfix_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_34_2_0_ipv4_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_34_2_0_ipv4_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_34_2_0_ipv4_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_34_2_0_ipv6_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_34_2_0_ipv6_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_34_2_0_ipv6_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_34_2_0_l2_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_34_2_0_l2_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_34_2_0_l2_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_34_2_0_mirror_erspan_sn_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_34_2_0_mirror_erspan_sn_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_34_2_0_mirror_erspan_sn_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_34_2_0_mirror_transport_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_34_2_0_mirror_transport_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_34_2_0_mirror_transport_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_34_2_0_mpls_ach_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_34_2_0_mpls_ach_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_34_2_0_mpls_ach_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_34_2_0_mpls_bv_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_34_2_0_mpls_bv_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_34_2_0_mpls_bv_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_34_2_0_mpls_cw_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_34_2_0_mpls_cw_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_34_2_0_mpls_cw_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_34_2_0_mpls_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_34_2_0_mpls_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_34_2_0_mpls_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_34_2_0_p_1588_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_34_2_0_p_1588_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_34_2_0_p_1588_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_34_2_0_prog_ext_hdr_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_34_2_0_prog_ext_hdr_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_34_2_0_prog_ext_hdr_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_34_2_0_psamp_0_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_34_2_0_psamp_0_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_34_2_0_psamp_0_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_34_2_0_psamp_1_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_34_2_0_psamp_1_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_34_2_0_psamp_1_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_34_2_0_psamp_mirror_on_drop_0_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_34_2_0_psamp_mirror_on_drop_0_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_34_2_0_psamp_mirror_on_drop_0_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_34_2_0_psamp_mirror_on_drop_3_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_34_2_0_psamp_mirror_on_drop_3_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_34_2_0_psamp_mirror_on_drop_3_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_34_2_0_rarp_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_34_2_0_rarp_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_34_2_0_rarp_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_34_2_0_routing_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_34_2_0_routing_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_34_2_0_routing_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_34_2_0_rspan_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_34_2_0_rspan_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_34_2_0_rspan_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_34_2_0_sflow_shim_0_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_34_2_0_sflow_shim_0_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_34_2_0_sflow_shim_0_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_34_2_0_sflow_shim_1_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_34_2_0_sflow_shim_1_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_34_2_0_sflow_shim_1_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_34_2_0_sflow_shim_2_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_34_2_0_sflow_shim_2_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_34_2_0_sflow_shim_2_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_34_2_0_snap_llc_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_34_2_0_snap_llc_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_34_2_0_snap_llc_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_34_2_0_svtag_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_34_2_0_svtag_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_34_2_0_svtag_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_34_2_0_tcp_first_4bytes_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_34_2_0_tcp_first_4bytes_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_34_2_0_tcp_first_4bytes_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_34_2_0_tcp_last_16bytes_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_34_2_0_tcp_last_16bytes_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_34_2_0_tcp_last_16bytes_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_34_2_0_udp_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_34_2_0_udp_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_34_2_0_udp_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_34_2_0_unknown_l3_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_34_2_0_unknown_l3_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_34_2_0_unknown_l3_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_34_2_0_unknown_l4_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_34_2_0_unknown_l4_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_34_2_0_unknown_l4_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_34_2_0_unknown_l5_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_34_2_0_unknown_l5_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_34_2_0_unknown_l5_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_34_2_0_vlan_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_34_2_0_vlan_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_34_2_0_vlan_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_34_2_0_vntag_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_34_2_0_vntag_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_34_2_0_vntag_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_34_2_0_vxlan_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_34_2_0_vxlan_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_34_2_0_vxlan_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_34_2_0_wesp_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56780_a0_hna_6_5_34_2_0_wesp_t_fget, - .flex_fset = bcm56780_a0_hna_6_5_34_2_0_wesp_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56780_a0_hna_6_5_34_2_0_rxpmd_flex_field_info, - .reasons_info = &bcm56780_a0_hna_6_5_34_2_0_rxpmd_flex_reasons_info, - .flex_common_fget = bcm56780_a0_rxpmd_flex_fget, - .flex_common_fset = bcm56780_a0_rxpmd_flex_fset, - }, -}; - -static shr_enum_map_t bcm56780_a0_hna_6_5_34_2_0_flexhdr_id_map[] = { - BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_FLEXHDR_NAME_MAP_INIT -}; - -shr_enum_map_t * bcm56780_a0_hna_6_5_34_2_0_flexhdr_map_get(void) -{ - return bcm56780_a0_hna_6_5_34_2_0_flexhdr_id_map; -} - -bcmpkt_flex_pmd_info_t * bcm56780_a0_hna_6_5_34_2_0_flex_pmd_info_get(uint32_t hid) -{ - if (hid >= BCM56780_A0_HNA_6_5_34_2_0_BCMPKT_FLEXHDR_COUNT) { - return NULL; - } - - return &bcm56780_a0_hna_6_5_34_2_0_flexhdr_info_list[hid]; -} - -int bcm56780_a0_hna_6_5_34_2_0_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = { - 14, - -1, - -1, - 66, -}; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/hna_6_5_34_2_0/bcm56880_a0_hna_6_5_34_2_0_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/hna_6_5_34_2_0/bcm56880_a0_hna_6_5_34_2_0_bcmpkt_rxpmd_match_id.c deleted file mode 100644 index a1721cbe50f..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/hna_6_5_34_2_0/bcm56880_a0_hna_6_5_34_2_0_bcmpkt_rxpmd_match_id.c +++ /dev/null @@ -1,2409 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) bcm56880_a0_hna_6_5_34_2_0_sf_match_id_info.yml - * for device bcm56880_a0 and variant hna_6_5_34_2_0. - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - - -#include -#include - - -static bcmpkt_rxpmd_match_id_db_t -bcm56880_a0_hna_6_5_34_2_0_rxpmd_match_id_db[BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_COUNT] = { - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG */ - .name = "EGRESS_PKT_FWD_L2_HDR_ETAG", - .match = 0x20, - .match_mask = 0x30, - .match_maxbit = 26, - .match_minbit = 21, - .maxbit = 5, - .minbit = 4, - .value = 0x2, - .pmaxbit = 40, - .pminbit = 35, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */ - .name = "EGRESS_PKT_FWD_L2_HDR_ITAG", - .match = 0x8, - .match_mask = 0x8, - .match_maxbit = 26, - .match_minbit = 21, - .maxbit = 3, - .minbit = 3, - .value = 0x1, - .pmaxbit = 40, - .pminbit = 35, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */ - .name = "EGRESS_PKT_FWD_L2_HDR_L2", - .match = 0x1, - .match_mask = 0x1, - .match_maxbit = 26, - .match_minbit = 21, - .maxbit = 0, - .minbit = 0, - .value = 0x1, - .pmaxbit = 40, - .pminbit = 35, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */ - .name = "EGRESS_PKT_FWD_L2_HDR_NONE", - .match = 0x0, - .match_mask = 0x3f, - .match_maxbit = 26, - .match_minbit = 21, - .maxbit = 5, - .minbit = 0, - .value = 0x0, - .pmaxbit = 40, - .pminbit = 35, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */ - .name = "EGRESS_PKT_FWD_L2_HDR_OTAG", - .match = 0x4, - .match_mask = 0x4, - .match_maxbit = 26, - .match_minbit = 21, - .maxbit = 2, - .minbit = 2, - .value = 0x1, - .pmaxbit = 40, - .pminbit = 35, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC */ - .name = "EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", - .match = 0x2, - .match_mask = 0x2, - .match_maxbit = 26, - .match_minbit = 21, - .maxbit = 1, - .minbit = 1, - .value = 0x1, - .pmaxbit = 40, - .pminbit = 35, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG */ - .name = "EGRESS_PKT_FWD_L2_HDR_VNTAG", - .match = 0x10, - .match_mask = 0x30, - .match_maxbit = 26, - .match_minbit = 21, - .maxbit = 5, - .minbit = 4, - .value = 0x1, - .pmaxbit = 40, - .pminbit = 35, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_ARP", - .match = 0x1800, - .match_mask = 0x3830, - .match_maxbit = 40, - .match_minbit = 27, - .maxbit = 13, - .minbit = 11, - .value = 0x3, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", - .match = 0x80, - .match_mask = 0x1c2, - .match_maxbit = 40, - .match_minbit = 27, - .maxbit = 8, - .minbit = 7, - .value = 0x1, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", - .match = 0x408, - .match_mask = 0x64c, - .match_maxbit = 40, - .match_minbit = 27, - .maxbit = 10, - .minbit = 9, - .value = 0x2, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_BFD", - .match = 0x3800, - .match_mask = 0x3800, - .match_maxbit = 40, - .match_minbit = 27, - .maxbit = 13, - .minbit = 11, - .value = 0x7, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", - .match = 0x200, - .match_mask = 0x642, - .match_maxbit = 40, - .match_minbit = 27, - .maxbit = 10, - .minbit = 9, - .value = 0x1, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", - .match = 0x1, - .match_mask = 0x1, - .match_maxbit = 40, - .match_minbit = 27, - .maxbit = 0, - .minbit = 0, - .value = 0x1, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", - .match = 0x100, - .match_mask = 0x1c0, - .match_maxbit = 40, - .match_minbit = 27, - .maxbit = 8, - .minbit = 7, - .value = 0x2, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", - .match = 0x600, - .match_mask = 0x640, - .match_maxbit = 40, - .match_minbit = 27, - .maxbit = 10, - .minbit = 9, - .value = 0x3, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_GPE", - .match = 0x1830, - .match_mask = 0x3870, - .match_maxbit = 40, - .match_minbit = 27, - .maxbit = 13, - .minbit = 11, - .value = 0x3, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE", - .match = 0x2, - .match_mask = 0x42, - .match_maxbit = 40, - .match_minbit = 27, - .maxbit = 1, - .minbit = 1, - .value = 0x1, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", - .match = 0x202, - .match_mask = 0x642, - .match_maxbit = 40, - .match_minbit = 27, - .maxbit = 10, - .minbit = 9, - .value = 0x1, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", - .match = 0x1000, - .match_mask = 0x3800, - .match_maxbit = 40, - .match_minbit = 27, - .maxbit = 13, - .minbit = 11, - .value = 0x2, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", - .match = 0x82, - .match_mask = 0x1c2, - .match_maxbit = 40, - .match_minbit = 27, - .maxbit = 8, - .minbit = 7, - .value = 0x1, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", - .match = 0x12, - .match_mask = 0x72, - .match_maxbit = 40, - .match_minbit = 27, - .maxbit = 5, - .minbit = 4, - .value = 0x1, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_ICMP", - .match = 0x2000, - .match_mask = 0x3830, - .match_maxbit = 40, - .match_minbit = 27, - .maxbit = 13, - .minbit = 11, - .value = 0x4, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA", - .match = 0x180, - .match_mask = 0x1c0, - .match_maxbit = 40, - .match_minbit = 27, - .maxbit = 8, - .minbit = 7, - .value = 0x3, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_IGMP", - .match = 0x404, - .match_mask = 0x64c, - .match_maxbit = 40, - .match_minbit = 27, - .maxbit = 10, - .minbit = 9, - .value = 0x2, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV4", - .match = 0x4, - .match_mask = 0x4c, - .match_maxbit = 40, - .match_minbit = 27, - .maxbit = 3, - .minbit = 2, - .value = 0x1, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV6", - .match = 0x8, - .match_mask = 0x4c, - .match_maxbit = 40, - .match_minbit = 27, - .maxbit = 3, - .minbit = 2, - .value = 0x2, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", - .match = 0x40, - .match_mask = 0x40, - .match_maxbit = 40, - .match_minbit = 27, - .maxbit = 6, - .minbit = 6, - .value = 0x1, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", - .match = 0x42, - .match_mask = 0x42, - .match_maxbit = 40, - .match_minbit = 27, - .maxbit = 1, - .minbit = 1, - .value = 0x1, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", - .match = 0x44, - .match_mask = 0x44, - .match_maxbit = 40, - .match_minbit = 27, - .maxbit = 2, - .minbit = 2, - .value = 0x1, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", - .match = 0x48, - .match_mask = 0x48, - .match_maxbit = 40, - .match_minbit = 27, - .maxbit = 3, - .minbit = 3, - .value = 0x1, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", - .match = 0x50, - .match_mask = 0x50, - .match_maxbit = 40, - .match_minbit = 27, - .maxbit = 4, - .minbit = 4, - .value = 0x1, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", - .match = 0x60, - .match_mask = 0x60, - .match_maxbit = 40, - .match_minbit = 27, - .maxbit = 5, - .minbit = 5, - .value = 0x1, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", - .match = 0xc0, - .match_mask = 0xc0, - .match_maxbit = 40, - .match_minbit = 27, - .maxbit = 7, - .minbit = 7, - .value = 0x1, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", - .match = 0x140, - .match_mask = 0x140, - .match_maxbit = 40, - .match_minbit = 27, - .maxbit = 8, - .minbit = 8, - .value = 0x1, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", - .match = 0x240, - .match_mask = 0x240, - .match_maxbit = 40, - .match_minbit = 27, - .maxbit = 9, - .minbit = 9, - .value = 0x1, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_NONE", - .match = 0x0, - .match_mask = 0x3fff, - .match_maxbit = 40, - .match_minbit = 27, - .maxbit = 13, - .minbit = 0, - .value = 0x0, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_P_1588", - .match = 0x3000, - .match_mask = 0x3800, - .match_maxbit = 40, - .match_minbit = 27, - .maxbit = 13, - .minbit = 11, - .value = 0x6, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_RARP", - .match = 0x800, - .match_mask = 0x3830, - .match_maxbit = 40, - .match_minbit = 27, - .maxbit = 13, - .minbit = 11, - .value = 0x1, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", - .match = 0x20, - .match_mask = 0x70, - .match_maxbit = 40, - .match_minbit = 27, - .maxbit = 5, - .minbit = 4, - .value = 0x2, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", - .match = 0x820, - .match_mask = 0x3870, - .match_maxbit = 40, - .match_minbit = 27, - .maxbit = 13, - .minbit = 11, - .value = 0x1, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_UDP", - .match = 0x30, - .match_mask = 0x70, - .match_maxbit = 40, - .match_minbit = 27, - .maxbit = 5, - .minbit = 4, - .value = 0x3, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", - .match = 0x10, - .match_mask = 0x72, - .match_maxbit = 40, - .match_minbit = 27, - .maxbit = 5, - .minbit = 4, - .value = 0x1, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", - .match = 0x2800, - .match_mask = 0x3800, - .match_maxbit = 40, - .match_minbit = 27, - .maxbit = 13, - .minbit = 11, - .value = 0x5, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", - .match = 0x2030, - .match_mask = 0x3870, - .match_maxbit = 40, - .match_minbit = 27, - .maxbit = 13, - .minbit = 11, - .value = 0x4, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", - .match = 0x830, - .match_mask = 0x3870, - .match_maxbit = 40, - .match_minbit = 27, - .maxbit = 13, - .minbit = 11, - .value = 0x1, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */ - .name = "EGRESS_PKT_SYS_HDR_LOOPBACK", - .match = 0x1, - .match_mask = 0x1, - .match_maxbit = 0, - .match_minbit = 0, - .maxbit = 0, - .minbit = 0, - .value = 0x1, - .pmaxbit = 0, - .pminbit = 0, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */ - .name = "EGRESS_PKT_SYS_HDR_NONE", - .match = 0x0, - .match_mask = 0x1, - .match_maxbit = 0, - .match_minbit = 0, - .maxbit = 0, - .minbit = 0, - .value = 0x0, - .pmaxbit = 0, - .pminbit = 0, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG */ - .name = "EGRESS_PKT_TUNNEL_L2_HDR_ETAG", - .match = 0x20, - .match_mask = 0x30, - .match_maxbit = 6, - .match_minbit = 1, - .maxbit = 5, - .minbit = 4, - .value = 0x2, - .pmaxbit = 12, - .pminbit = 7, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */ - .name = "EGRESS_PKT_TUNNEL_L2_HDR_ITAG", - .match = 0x8, - .match_mask = 0x8, - .match_maxbit = 6, - .match_minbit = 1, - .maxbit = 3, - .minbit = 3, - .value = 0x1, - .pmaxbit = 12, - .pminbit = 7, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */ - .name = "EGRESS_PKT_TUNNEL_L2_HDR_L2", - .match = 0x1, - .match_mask = 0x1, - .match_maxbit = 6, - .match_minbit = 1, - .maxbit = 0, - .minbit = 0, - .value = 0x1, - .pmaxbit = 12, - .pminbit = 7, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */ - .name = "EGRESS_PKT_TUNNEL_L2_HDR_NONE", - .match = 0x0, - .match_mask = 0x3f, - .match_maxbit = 6, - .match_minbit = 1, - .maxbit = 5, - .minbit = 0, - .value = 0x0, - .pmaxbit = 12, - .pminbit = 7, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */ - .name = "EGRESS_PKT_TUNNEL_L2_HDR_OTAG", - .match = 0x4, - .match_mask = 0x4, - .match_maxbit = 6, - .match_minbit = 1, - .maxbit = 2, - .minbit = 2, - .value = 0x1, - .pmaxbit = 12, - .pminbit = 7, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC */ - .name = "EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", - .match = 0x2, - .match_mask = 0x2, - .match_maxbit = 6, - .match_minbit = 1, - .maxbit = 1, - .minbit = 1, - .value = 0x1, - .pmaxbit = 12, - .pminbit = 7, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG */ - .name = "EGRESS_PKT_TUNNEL_L2_HDR_VNTAG", - .match = 0x10, - .match_mask = 0x30, - .match_maxbit = 6, - .match_minbit = 1, - .maxbit = 5, - .minbit = 4, - .value = 0x1, - .pmaxbit = 12, - .pminbit = 7, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", - .match = 0x1800, - .match_mask = 0x3830, - .match_maxbit = 20, - .match_minbit = 7, - .maxbit = 13, - .minbit = 11, - .value = 0x3, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", - .match = 0x80, - .match_mask = 0x1c2, - .match_maxbit = 20, - .match_minbit = 7, - .maxbit = 8, - .minbit = 7, - .value = 0x1, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", - .match = 0x408, - .match_mask = 0x64c, - .match_maxbit = 20, - .match_minbit = 7, - .maxbit = 10, - .minbit = 9, - .value = 0x2, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", - .match = 0x3800, - .match_mask = 0x3800, - .match_maxbit = 20, - .match_minbit = 7, - .maxbit = 13, - .minbit = 11, - .value = 0x7, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", - .match = 0x200, - .match_mask = 0x642, - .match_maxbit = 20, - .match_minbit = 7, - .maxbit = 10, - .minbit = 9, - .value = 0x1, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", - .match = 0x1, - .match_mask = 0x1, - .match_maxbit = 20, - .match_minbit = 7, - .maxbit = 0, - .minbit = 0, - .value = 0x1, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", - .match = 0x100, - .match_mask = 0x1c0, - .match_maxbit = 20, - .match_minbit = 7, - .maxbit = 8, - .minbit = 7, - .value = 0x2, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", - .match = 0x600, - .match_mask = 0x640, - .match_maxbit = 20, - .match_minbit = 7, - .maxbit = 10, - .minbit = 9, - .value = 0x3, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", - .match = 0x1830, - .match_mask = 0x3870, - .match_maxbit = 20, - .match_minbit = 7, - .maxbit = 13, - .minbit = 11, - .value = 0x3, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", - .match = 0x2, - .match_mask = 0x42, - .match_maxbit = 20, - .match_minbit = 7, - .maxbit = 1, - .minbit = 1, - .value = 0x1, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", - .match = 0x202, - .match_mask = 0x642, - .match_maxbit = 20, - .match_minbit = 7, - .maxbit = 10, - .minbit = 9, - .value = 0x1, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", - .match = 0x1000, - .match_mask = 0x3800, - .match_maxbit = 20, - .match_minbit = 7, - .maxbit = 13, - .minbit = 11, - .value = 0x2, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", - .match = 0x82, - .match_mask = 0x1c2, - .match_maxbit = 20, - .match_minbit = 7, - .maxbit = 8, - .minbit = 7, - .value = 0x1, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", - .match = 0x12, - .match_mask = 0x72, - .match_maxbit = 20, - .match_minbit = 7, - .maxbit = 5, - .minbit = 4, - .value = 0x1, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", - .match = 0x2000, - .match_mask = 0x3830, - .match_maxbit = 20, - .match_minbit = 7, - .maxbit = 13, - .minbit = 11, - .value = 0x4, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA", - .match = 0x180, - .match_mask = 0x1c0, - .match_maxbit = 20, - .match_minbit = 7, - .maxbit = 8, - .minbit = 7, - .value = 0x3, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", - .match = 0x404, - .match_mask = 0x64c, - .match_maxbit = 20, - .match_minbit = 7, - .maxbit = 10, - .minbit = 9, - .value = 0x2, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", - .match = 0x4, - .match_mask = 0x4c, - .match_maxbit = 20, - .match_minbit = 7, - .maxbit = 3, - .minbit = 2, - .value = 0x1, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", - .match = 0x8, - .match_mask = 0x4c, - .match_maxbit = 20, - .match_minbit = 7, - .maxbit = 3, - .minbit = 2, - .value = 0x2, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", - .match = 0x40, - .match_mask = 0x40, - .match_maxbit = 20, - .match_minbit = 7, - .maxbit = 6, - .minbit = 6, - .value = 0x1, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", - .match = 0x42, - .match_mask = 0x42, - .match_maxbit = 20, - .match_minbit = 7, - .maxbit = 1, - .minbit = 1, - .value = 0x1, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", - .match = 0x44, - .match_mask = 0x44, - .match_maxbit = 20, - .match_minbit = 7, - .maxbit = 2, - .minbit = 2, - .value = 0x1, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", - .match = 0x48, - .match_mask = 0x48, - .match_maxbit = 20, - .match_minbit = 7, - .maxbit = 3, - .minbit = 3, - .value = 0x1, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", - .match = 0x50, - .match_mask = 0x50, - .match_maxbit = 20, - .match_minbit = 7, - .maxbit = 4, - .minbit = 4, - .value = 0x1, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", - .match = 0x60, - .match_mask = 0x60, - .match_maxbit = 20, - .match_minbit = 7, - .maxbit = 5, - .minbit = 5, - .value = 0x1, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", - .match = 0xc0, - .match_mask = 0xc0, - .match_maxbit = 20, - .match_minbit = 7, - .maxbit = 7, - .minbit = 7, - .value = 0x1, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", - .match = 0x140, - .match_mask = 0x140, - .match_maxbit = 20, - .match_minbit = 7, - .maxbit = 8, - .minbit = 8, - .value = 0x1, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", - .match = 0x240, - .match_mask = 0x240, - .match_maxbit = 20, - .match_minbit = 7, - .maxbit = 9, - .minbit = 9, - .value = 0x1, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", - .match = 0x0, - .match_mask = 0x3fff, - .match_maxbit = 20, - .match_minbit = 7, - .maxbit = 13, - .minbit = 0, - .value = 0x0, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", - .match = 0x3000, - .match_mask = 0x3800, - .match_maxbit = 20, - .match_minbit = 7, - .maxbit = 13, - .minbit = 11, - .value = 0x6, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", - .match = 0x800, - .match_mask = 0x3830, - .match_maxbit = 20, - .match_minbit = 7, - .maxbit = 13, - .minbit = 11, - .value = 0x1, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", - .match = 0x20, - .match_mask = 0x70, - .match_maxbit = 20, - .match_minbit = 7, - .maxbit = 5, - .minbit = 4, - .value = 0x2, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", - .match = 0x820, - .match_mask = 0x3870, - .match_maxbit = 20, - .match_minbit = 7, - .maxbit = 13, - .minbit = 11, - .value = 0x1, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", - .match = 0x30, - .match_mask = 0x70, - .match_maxbit = 20, - .match_minbit = 7, - .maxbit = 5, - .minbit = 4, - .value = 0x3, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", - .match = 0x10, - .match_mask = 0x72, - .match_maxbit = 20, - .match_minbit = 7, - .maxbit = 5, - .minbit = 4, - .value = 0x1, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", - .match = 0x2800, - .match_mask = 0x3800, - .match_maxbit = 20, - .match_minbit = 7, - .maxbit = 13, - .minbit = 11, - .value = 0x5, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", - .match = 0x2030, - .match_mask = 0x3870, - .match_maxbit = 20, - .match_minbit = 7, - .maxbit = 13, - .minbit = 11, - .value = 0x4, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", - .match = 0x830, - .match_mask = 0x3870, - .match_maxbit = 20, - .match_minbit = 7, - .maxbit = 13, - .minbit = 11, - .value = 0x1, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG */ - .name = "INGRESS_PKT_INNER_L2_HDR_ETAG", - .match = 0x20, - .match_mask = 0x30, - .match_maxbit = 26, - .match_minbit = 21, - .maxbit = 5, - .minbit = 4, - .value = 0x2, - .pmaxbit = 26, - .pminbit = 21, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */ - .name = "INGRESS_PKT_INNER_L2_HDR_ITAG", - .match = 0x8, - .match_mask = 0x8, - .match_maxbit = 26, - .match_minbit = 21, - .maxbit = 3, - .minbit = 3, - .value = 0x1, - .pmaxbit = 26, - .pminbit = 21, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */ - .name = "INGRESS_PKT_INNER_L2_HDR_L2", - .match = 0x1, - .match_mask = 0x1, - .match_maxbit = 26, - .match_minbit = 21, - .maxbit = 0, - .minbit = 0, - .value = 0x1, - .pmaxbit = 26, - .pminbit = 21, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */ - .name = "INGRESS_PKT_INNER_L2_HDR_NONE", - .match = 0x0, - .match_mask = 0x3f, - .match_maxbit = 26, - .match_minbit = 21, - .maxbit = 5, - .minbit = 0, - .value = 0x0, - .pmaxbit = 26, - .pminbit = 21, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */ - .name = "INGRESS_PKT_INNER_L2_HDR_OTAG", - .match = 0x4, - .match_mask = 0x4, - .match_maxbit = 26, - .match_minbit = 21, - .maxbit = 2, - .minbit = 2, - .value = 0x1, - .pmaxbit = 26, - .pminbit = 21, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC */ - .name = "INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", - .match = 0x2, - .match_mask = 0x2, - .match_maxbit = 26, - .match_minbit = 21, - .maxbit = 1, - .minbit = 1, - .value = 0x1, - .pmaxbit = 26, - .pminbit = 21, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG */ - .name = "INGRESS_PKT_INNER_L2_HDR_VNTAG", - .match = 0x10, - .match_mask = 0x30, - .match_maxbit = 26, - .match_minbit = 21, - .maxbit = 5, - .minbit = 4, - .value = 0x1, - .pmaxbit = 26, - .pminbit = 21, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_ARP", - .match = 0x1800, - .match_mask = 0x3830, - .match_maxbit = 40, - .match_minbit = 27, - .maxbit = 13, - .minbit = 11, - .value = 0x3, - .pmaxbit = 40, - .pminbit = 27, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", - .match = 0x80, - .match_mask = 0x1c2, - .match_maxbit = 40, - .match_minbit = 27, - .maxbit = 8, - .minbit = 7, - .value = 0x1, - .pmaxbit = 40, - .pminbit = 27, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", - .match = 0x408, - .match_mask = 0x64c, - .match_maxbit = 40, - .match_minbit = 27, - .maxbit = 10, - .minbit = 9, - .value = 0x2, - .pmaxbit = 40, - .pminbit = 27, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_BFD", - .match = 0x3800, - .match_mask = 0x3800, - .match_maxbit = 40, - .match_minbit = 27, - .maxbit = 13, - .minbit = 11, - .value = 0x7, - .pmaxbit = 40, - .pminbit = 27, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", - .match = 0x200, - .match_mask = 0x642, - .match_maxbit = 40, - .match_minbit = 27, - .maxbit = 10, - .minbit = 9, - .value = 0x1, - .pmaxbit = 40, - .pminbit = 27, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", - .match = 0x1, - .match_mask = 0x1, - .match_maxbit = 40, - .match_minbit = 27, - .maxbit = 0, - .minbit = 0, - .value = 0x1, - .pmaxbit = 40, - .pminbit = 27, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", - .match = 0x100, - .match_mask = 0x1c0, - .match_maxbit = 40, - .match_minbit = 27, - .maxbit = 8, - .minbit = 7, - .value = 0x2, - .pmaxbit = 40, - .pminbit = 27, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", - .match = 0x600, - .match_mask = 0x640, - .match_maxbit = 40, - .match_minbit = 27, - .maxbit = 10, - .minbit = 9, - .value = 0x3, - .pmaxbit = 40, - .pminbit = 27, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_ICMP", - .match = 0x2000, - .match_mask = 0x3830, - .match_maxbit = 40, - .match_minbit = 27, - .maxbit = 13, - .minbit = 11, - .value = 0x4, - .pmaxbit = 40, - .pminbit = 27, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA", - .match = 0x180, - .match_mask = 0x1c0, - .match_maxbit = 40, - .match_minbit = 27, - .maxbit = 8, - .minbit = 7, - .value = 0x3, - .pmaxbit = 40, - .pminbit = 27, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_IGMP", - .match = 0x404, - .match_mask = 0x64c, - .match_maxbit = 40, - .match_minbit = 27, - .maxbit = 10, - .minbit = 9, - .value = 0x2, - .pmaxbit = 40, - .pminbit = 27, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV4", - .match = 0x4, - .match_mask = 0x4c, - .match_maxbit = 40, - .match_minbit = 27, - .maxbit = 3, - .minbit = 2, - .value = 0x1, - .pmaxbit = 40, - .pminbit = 27, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV6", - .match = 0x8, - .match_mask = 0x4c, - .match_maxbit = 40, - .match_minbit = 27, - .maxbit = 3, - .minbit = 2, - .value = 0x2, - .pmaxbit = 40, - .pminbit = 27, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_NONE", - .match = 0x0, - .match_mask = 0x3fff, - .match_maxbit = 40, - .match_minbit = 27, - .maxbit = 13, - .minbit = 0, - .value = 0x0, - .pmaxbit = 40, - .pminbit = 27, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_P_1588", - .match = 0x3000, - .match_mask = 0x3800, - .match_maxbit = 40, - .match_minbit = 27, - .maxbit = 13, - .minbit = 11, - .value = 0x6, - .pmaxbit = 40, - .pminbit = 27, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_RARP", - .match = 0x800, - .match_mask = 0x3830, - .match_maxbit = 40, - .match_minbit = 27, - .maxbit = 13, - .minbit = 11, - .value = 0x1, - .pmaxbit = 40, - .pminbit = 27, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", - .match = 0x20, - .match_mask = 0x70, - .match_maxbit = 40, - .match_minbit = 27, - .maxbit = 5, - .minbit = 4, - .value = 0x2, - .pmaxbit = 40, - .pminbit = 27, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", - .match = 0x820, - .match_mask = 0x3870, - .match_maxbit = 40, - .match_minbit = 27, - .maxbit = 13, - .minbit = 11, - .value = 0x1, - .pmaxbit = 40, - .pminbit = 27, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_UDP", - .match = 0x30, - .match_mask = 0x70, - .match_maxbit = 40, - .match_minbit = 27, - .maxbit = 5, - .minbit = 4, - .value = 0x3, - .pmaxbit = 40, - .pminbit = 27, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", - .match = 0x10, - .match_mask = 0x72, - .match_maxbit = 40, - .match_minbit = 27, - .maxbit = 5, - .minbit = 4, - .value = 0x1, - .pmaxbit = 40, - .pminbit = 27, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", - .match = 0x2800, - .match_mask = 0x3800, - .match_maxbit = 40, - .match_minbit = 27, - .maxbit = 13, - .minbit = 11, - .value = 0x5, - .pmaxbit = 40, - .pminbit = 27, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", - .match = 0x2030, - .match_mask = 0x3870, - .match_maxbit = 40, - .match_minbit = 27, - .maxbit = 13, - .minbit = 11, - .value = 0x4, - .pmaxbit = 40, - .pminbit = 27, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG */ - .name = "INGRESS_PKT_OUTER_L2_HDR_ETAG", - .match = 0x20, - .match_mask = 0x30, - .match_maxbit = 6, - .match_minbit = 1, - .maxbit = 5, - .minbit = 4, - .value = 0x2, - .pmaxbit = 6, - .pminbit = 1, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */ - .name = "INGRESS_PKT_OUTER_L2_HDR_ITAG", - .match = 0x8, - .match_mask = 0x8, - .match_maxbit = 6, - .match_minbit = 1, - .maxbit = 3, - .minbit = 3, - .value = 0x1, - .pmaxbit = 6, - .pminbit = 1, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */ - .name = "INGRESS_PKT_OUTER_L2_HDR_L2", - .match = 0x1, - .match_mask = 0x1, - .match_maxbit = 6, - .match_minbit = 1, - .maxbit = 0, - .minbit = 0, - .value = 0x1, - .pmaxbit = 6, - .pminbit = 1, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */ - .name = "INGRESS_PKT_OUTER_L2_HDR_NONE", - .match = 0x0, - .match_mask = 0x3f, - .match_maxbit = 6, - .match_minbit = 1, - .maxbit = 5, - .minbit = 0, - .value = 0x0, - .pmaxbit = 6, - .pminbit = 1, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */ - .name = "INGRESS_PKT_OUTER_L2_HDR_OTAG", - .match = 0x4, - .match_mask = 0x4, - .match_maxbit = 6, - .match_minbit = 1, - .maxbit = 2, - .minbit = 2, - .value = 0x1, - .pmaxbit = 6, - .pminbit = 1, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC */ - .name = "INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", - .match = 0x2, - .match_mask = 0x2, - .match_maxbit = 6, - .match_minbit = 1, - .maxbit = 1, - .minbit = 1, - .value = 0x1, - .pmaxbit = 6, - .pminbit = 1, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG */ - .name = "INGRESS_PKT_OUTER_L2_HDR_VNTAG", - .match = 0x10, - .match_mask = 0x30, - .match_maxbit = 6, - .match_minbit = 1, - .maxbit = 5, - .minbit = 4, - .value = 0x1, - .pmaxbit = 6, - .pminbit = 1, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ARP", - .match = 0x1800, - .match_mask = 0x3830, - .match_maxbit = 20, - .match_minbit = 7, - .maxbit = 13, - .minbit = 11, - .value = 0x3, - .pmaxbit = 20, - .pminbit = 7, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", - .match = 0x80, - .match_mask = 0x1c2, - .match_maxbit = 20, - .match_minbit = 7, - .maxbit = 8, - .minbit = 7, - .value = 0x1, - .pmaxbit = 20, - .pminbit = 7, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", - .match = 0x408, - .match_mask = 0x64c, - .match_maxbit = 20, - .match_minbit = 7, - .maxbit = 10, - .minbit = 9, - .value = 0x2, - .pmaxbit = 20, - .pminbit = 7, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_BFD", - .match = 0x3800, - .match_mask = 0x3800, - .match_maxbit = 20, - .match_minbit = 7, - .maxbit = 13, - .minbit = 11, - .value = 0x7, - .pmaxbit = 20, - .pminbit = 7, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", - .match = 0x200, - .match_mask = 0x642, - .match_maxbit = 20, - .match_minbit = 7, - .maxbit = 10, - .minbit = 9, - .value = 0x1, - .pmaxbit = 20, - .pminbit = 7, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", - .match = 0x1, - .match_mask = 0x1, - .match_maxbit = 20, - .match_minbit = 7, - .maxbit = 0, - .minbit = 0, - .value = 0x1, - .pmaxbit = 20, - .pminbit = 7, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", - .match = 0x100, - .match_mask = 0x1c0, - .match_maxbit = 20, - .match_minbit = 7, - .maxbit = 8, - .minbit = 7, - .value = 0x2, - .pmaxbit = 20, - .pminbit = 7, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", - .match = 0x600, - .match_mask = 0x640, - .match_maxbit = 20, - .match_minbit = 7, - .maxbit = 10, - .minbit = 9, - .value = 0x3, - .pmaxbit = 20, - .pminbit = 7, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GPE", - .match = 0x1830, - .match_mask = 0x3870, - .match_maxbit = 20, - .match_minbit = 7, - .maxbit = 13, - .minbit = 11, - .value = 0x3, - .pmaxbit = 20, - .pminbit = 7, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE", - .match = 0x2, - .match_mask = 0x42, - .match_maxbit = 20, - .match_minbit = 7, - .maxbit = 1, - .minbit = 1, - .value = 0x1, - .pmaxbit = 20, - .pminbit = 7, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", - .match = 0x202, - .match_mask = 0x642, - .match_maxbit = 20, - .match_minbit = 7, - .maxbit = 10, - .minbit = 9, - .value = 0x1, - .pmaxbit = 20, - .pminbit = 7, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", - .match = 0x1000, - .match_mask = 0x3800, - .match_maxbit = 20, - .match_minbit = 7, - .maxbit = 13, - .minbit = 11, - .value = 0x2, - .pmaxbit = 20, - .pminbit = 7, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", - .match = 0x82, - .match_mask = 0x1c2, - .match_maxbit = 20, - .match_minbit = 7, - .maxbit = 8, - .minbit = 7, - .value = 0x1, - .pmaxbit = 20, - .pminbit = 7, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", - .match = 0x12, - .match_mask = 0x72, - .match_maxbit = 20, - .match_minbit = 7, - .maxbit = 5, - .minbit = 4, - .value = 0x1, - .pmaxbit = 20, - .pminbit = 7, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", - .match = 0x2000, - .match_mask = 0x3830, - .match_maxbit = 20, - .match_minbit = 7, - .maxbit = 13, - .minbit = 11, - .value = 0x4, - .pmaxbit = 20, - .pminbit = 7, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA", - .match = 0x180, - .match_mask = 0x1c0, - .match_maxbit = 20, - .match_minbit = 7, - .maxbit = 8, - .minbit = 7, - .value = 0x3, - .pmaxbit = 20, - .pminbit = 7, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", - .match = 0x404, - .match_mask = 0x64c, - .match_maxbit = 20, - .match_minbit = 7, - .maxbit = 10, - .minbit = 9, - .value = 0x2, - .pmaxbit = 20, - .pminbit = 7, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", - .match = 0x4, - .match_mask = 0x4c, - .match_maxbit = 20, - .match_minbit = 7, - .maxbit = 3, - .minbit = 2, - .value = 0x1, - .pmaxbit = 20, - .pminbit = 7, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", - .match = 0x8, - .match_mask = 0x4c, - .match_maxbit = 20, - .match_minbit = 7, - .maxbit = 3, - .minbit = 2, - .value = 0x2, - .pmaxbit = 20, - .pminbit = 7, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", - .match = 0x40, - .match_mask = 0x40, - .match_maxbit = 20, - .match_minbit = 7, - .maxbit = 6, - .minbit = 6, - .value = 0x1, - .pmaxbit = 20, - .pminbit = 7, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", - .match = 0x42, - .match_mask = 0x42, - .match_maxbit = 20, - .match_minbit = 7, - .maxbit = 1, - .minbit = 1, - .value = 0x1, - .pmaxbit = 20, - .pminbit = 7, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", - .match = 0x44, - .match_mask = 0x44, - .match_maxbit = 20, - .match_minbit = 7, - .maxbit = 2, - .minbit = 2, - .value = 0x1, - .pmaxbit = 20, - .pminbit = 7, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", - .match = 0x48, - .match_mask = 0x48, - .match_maxbit = 20, - .match_minbit = 7, - .maxbit = 3, - .minbit = 3, - .value = 0x1, - .pmaxbit = 20, - .pminbit = 7, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", - .match = 0x50, - .match_mask = 0x50, - .match_maxbit = 20, - .match_minbit = 7, - .maxbit = 4, - .minbit = 4, - .value = 0x1, - .pmaxbit = 20, - .pminbit = 7, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", - .match = 0x60, - .match_mask = 0x60, - .match_maxbit = 20, - .match_minbit = 7, - .maxbit = 5, - .minbit = 5, - .value = 0x1, - .pmaxbit = 20, - .pminbit = 7, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", - .match = 0xc0, - .match_mask = 0xc0, - .match_maxbit = 20, - .match_minbit = 7, - .maxbit = 7, - .minbit = 7, - .value = 0x1, - .pmaxbit = 20, - .pminbit = 7, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", - .match = 0x140, - .match_mask = 0x140, - .match_maxbit = 20, - .match_minbit = 7, - .maxbit = 8, - .minbit = 8, - .value = 0x1, - .pmaxbit = 20, - .pminbit = 7, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", - .match = 0x240, - .match_mask = 0x240, - .match_maxbit = 20, - .match_minbit = 7, - .maxbit = 9, - .minbit = 9, - .value = 0x1, - .pmaxbit = 20, - .pminbit = 7, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_NONE", - .match = 0x0, - .match_mask = 0x3fff, - .match_maxbit = 20, - .match_minbit = 7, - .maxbit = 13, - .minbit = 0, - .value = 0x0, - .pmaxbit = 20, - .pminbit = 7, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", - .match = 0x3000, - .match_mask = 0x3800, - .match_maxbit = 20, - .match_minbit = 7, - .maxbit = 13, - .minbit = 11, - .value = 0x6, - .pmaxbit = 20, - .pminbit = 7, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_RARP", - .match = 0x800, - .match_mask = 0x3830, - .match_maxbit = 20, - .match_minbit = 7, - .maxbit = 13, - .minbit = 11, - .value = 0x1, - .pmaxbit = 20, - .pminbit = 7, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", - .match = 0x20, - .match_mask = 0x70, - .match_maxbit = 20, - .match_minbit = 7, - .maxbit = 5, - .minbit = 4, - .value = 0x2, - .pmaxbit = 20, - .pminbit = 7, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", - .match = 0x820, - .match_mask = 0x3870, - .match_maxbit = 20, - .match_minbit = 7, - .maxbit = 13, - .minbit = 11, - .value = 0x1, - .pmaxbit = 20, - .pminbit = 7, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UDP", - .match = 0x30, - .match_mask = 0x70, - .match_maxbit = 20, - .match_minbit = 7, - .maxbit = 5, - .minbit = 4, - .value = 0x3, - .pmaxbit = 20, - .pminbit = 7, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", - .match = 0x10, - .match_mask = 0x72, - .match_maxbit = 20, - .match_minbit = 7, - .maxbit = 5, - .minbit = 4, - .value = 0x1, - .pmaxbit = 20, - .pminbit = 7, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", - .match = 0x2800, - .match_mask = 0x3800, - .match_maxbit = 20, - .match_minbit = 7, - .maxbit = 13, - .minbit = 11, - .value = 0x5, - .pmaxbit = 20, - .pminbit = 7, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", - .match = 0x2030, - .match_mask = 0x3870, - .match_maxbit = 20, - .match_minbit = 7, - .maxbit = 13, - .minbit = 11, - .value = 0x4, - .pmaxbit = 20, - .pminbit = 7, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", - .match = 0x830, - .match_mask = 0x3870, - .match_maxbit = 20, - .match_minbit = 7, - .maxbit = 13, - .minbit = 11, - .value = 0x1, - .pmaxbit = 20, - .pminbit = 7, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */ - .name = "INGRESS_PKT_SYS_HDR_LOOPBACK", - .match = 0x1, - .match_mask = 0x1, - .match_maxbit = 0, - .match_minbit = 0, - .maxbit = 0, - .minbit = 0, - .value = 0x1, - .pmaxbit = 0, - .pminbit = 0, - - }, - { - /* BCM56880_A0_HNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */ - .name = "INGRESS_PKT_SYS_HDR_NONE", - .match = 0x0, - .match_mask = 0x1, - .match_maxbit = 0, - .match_minbit = 0, - .maxbit = 0, - .minbit = 0, - .value = 0x0, - .pmaxbit = 0, - .pminbit = 0, - - }, -}; - -static bcmpkt_rxpmd_match_id_db_info_t bcm56880_a0_hna_6_5_34_2_0_rxpmd_match_id_db_info = { - .num_entries = 168, - .db = bcm56880_a0_hna_6_5_34_2_0_rxpmd_match_id_db -}; -bcmpkt_rxpmd_match_id_db_info_t * bcm56880_a0_hna_6_5_34_2_0_rxpmd_match_id_db_info_get(void) { - return &bcm56880_a0_hna_6_5_34_2_0_rxpmd_match_id_db_info; -} - -static shr_enum_map_t bcm56880_a0_hna_6_5_34_2_0_rxpmd_match_id_map[] = { - BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_rxpmd_match_id_map_info_t bcm56880_a0_hna_6_5_34_2_0_rxpmd_match_id_map_info = { - .num_entries = 168, - .map = bcm56880_a0_hna_6_5_34_2_0_rxpmd_match_id_map -}; - -bcmpkt_rxpmd_match_id_map_info_t * bcm56880_a0_hna_6_5_34_2_0_rxpmd_match_id_map_info_get(void) { - return &bcm56880_a0_hna_6_5_34_2_0_rxpmd_match_id_map_info; -} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/hna_6_5_34_2_0/bcm56880_a0_hna_6_5_34_2_0_pkt_flexhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/hna_6_5_34_2_0/bcm56880_a0_hna_6_5_34_2_0_pkt_flexhdr.c deleted file mode 100644 index 3f15fef54a1..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/hna_6_5_34_2_0/bcm56880_a0_hna_6_5_34_2_0_pkt_flexhdr.c +++ /dev/null @@ -1,7479 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) map.yml - * for device bcm56880_a0 and variant hna_6_5_34_2_0. - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - -#include -#include -#include -#include -#include -#include -#include - -#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) -#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) -#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) -#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) - -static void bcm56880_a0_hna_6_5_34_2_0_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons) -{ - uint32_t *reason = data + 0; - - if (reason[12] & (0x1 << 0)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU); - } - if (reason[12] & (0x1 << 1)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS); - } - if (reason[12] & (0x1 << 2)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE); - } - if (reason[12] & (0x1 << 3)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT); - } - if (reason[12] & (0x1 << 4)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD); - } - if (reason[12] & (0x1 << 5)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED); - } - if (reason[12] & (0x1 << 6)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT); - } - if (reason[12] & (0x1 << 7)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD); - } - if (reason[12] & (0x1 << 8)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD); - } - if (reason[12] & (0x1 << 9)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS); - } - if (reason[12] & (0x1 << 10)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP); - } - if (reason[12] & (0x1 << 11)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS); - } - if (reason[12] & (0x1 << 12)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP); - } - if (reason[12] & (0x1 << 13)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR); - } - if (reason[12] & (0x1 << 14)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR); - } - if (reason[12] & (0x1 << 15)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED); - } - if (reason[12] & (0x1 << 16)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL); - } - if (reason[12] & (0x1 << 17)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_VFP); - } - if (reason[12] & (0x1 << 18)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP); - } - if (reason[12] & (0x1 << 19)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER); - } - if (reason[12] & (0x1 << 20)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP); - } - if (reason[12] & (0x1 << 21)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_SVP); - } - if (reason[12] & (0x1 << 22)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT); - } - if (reason[12] & (0x1 << 23)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT); - } - if (reason[12] & (0x1 << 24)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED); - } - if (reason[12] & (0x1 << 25)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED); - } - if (reason[12] & (0x1 << 26)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP); - } - if (reason[12] & (0x1 << 27)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED); - } - if (reason[12] & (0x1 << 28)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF); - } - if (reason[12] & (0x1 << 29)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED); - } - if (reason[12] & (0x1 << 30)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED); - } - if (reason[12] & (0x1 << 31)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU); - } - if (reason[11] & (0x1 << 0)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0); - } - if (reason[11] & (0x1 << 1)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1); - } - if (reason[11] & (0x1 << 2)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2); - } - if (reason[11] & (0x1 << 3)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3); - } - if (reason[11] & (0x1 << 4)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4); - } - if (reason[11] & (0x1 << 5)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5); - } - if (reason[11] & (0x1 << 6)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6); - } - if (reason[11] & (0x1 << 7)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7); - } - if (reason[11] & (0x1 << 8)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE); - } - if (reason[11] & (0x1 << 15)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP); - } -} - -static void bcm56880_a0_hna_6_5_34_2_0_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data) -{ - uint32_t *reason = data + 0; - - reason[12] = 0; - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) { - reason[12] |= (0x1 << 0); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) { - reason[12] |= (0x1 << 1); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) { - reason[12] |= (0x1 << 2); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT)) { - reason[12] |= (0x1 << 3); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD)) { - reason[12] |= (0x1 << 4); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) { - reason[12] |= (0x1 << 5); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) { - reason[12] |= (0x1 << 6); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD)) { - reason[12] |= (0x1 << 7); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD)) { - reason[12] |= (0x1 << 8); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) { - reason[12] |= (0x1 << 9); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) { - reason[12] |= (0x1 << 10); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) { - reason[12] |= (0x1 << 11); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) { - reason[12] |= (0x1 << 12); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) { - reason[12] |= (0x1 << 13); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) { - reason[12] |= (0x1 << 14); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED)) { - reason[12] |= (0x1 << 15); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) { - reason[12] |= (0x1 << 16); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_VFP)) { - reason[12] |= (0x1 << 17); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP)) { - reason[12] |= (0x1 << 18); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) { - reason[12] |= (0x1 << 19); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP)) { - reason[12] |= (0x1 << 20); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_SVP)) { - reason[12] |= (0x1 << 21); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT)) { - reason[12] |= (0x1 << 22); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) { - reason[12] |= (0x1 << 23); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED)) { - reason[12] |= (0x1 << 24); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED)) { - reason[12] |= (0x1 << 25); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP)) { - reason[12] |= (0x1 << 26); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED)) { - reason[12] |= (0x1 << 27); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF)) { - reason[12] |= (0x1 << 28); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED)) { - reason[12] |= (0x1 << 29); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED)) { - reason[12] |= (0x1 << 30); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU)) { - reason[12] |= (0x1 << 31); - } - reason[11] = 0; - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0)) { - reason[11] |= (0x1 << 0); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1)) { - reason[11] |= (0x1 << 1); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2)) { - reason[11] |= (0x1 << 2); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3)) { - reason[11] |= (0x1 << 3); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4)) { - reason[11] |= (0x1 << 4); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5)) { - reason[11] |= (0x1 << 5); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6)) { - reason[11] |= (0x1 << 6); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7)) { - reason[11] |= (0x1 << 7); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE)) { - reason[11] |= (0x1 << 8); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) { - reason[11] |= (0x1 << 15); - } -} - -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_34_2_0_rxpmd_flex_field_data[] = { - { - .name = "DLB_ECMP_DESTINATION_15_0", - .fid = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { -1, -1 }, /* Profile 2. */ - { -1, -1 }, /* Profile 3. */ - { 256, 271 }, /* Profile 4. */ - { 240, 255 }, /* Profile 5. */ - { -1, -1 }, /* Profile 6. */ - { -1, -1 }, /* Profile 7. */ - { 256, 271 }, /* Profile 8. */ - { 240, 255 }, /* Profile 9. */ - }, - .profile_cnt = 10, - }, - { - .name = "DROP_CODE_15_0", - .fid = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 48, 63 }, /* Profile 2. */ - { 48, 63 }, /* Profile 3. */ - { 48, 63 }, /* Profile 4. */ - { 48, 63 }, /* Profile 5. */ - { 48, 63 }, /* Profile 6. */ - { 48, 63 }, /* Profile 7. */ - { 48, 63 }, /* Profile 8. */ - { 48, 63 }, /* Profile 9. */ - }, - .profile_cnt = 10, - }, - { - .name = "DVP_15_0", - .fid = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_DVP_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 352, 367 }, /* Profile 2. */ - { 352, 367 }, /* Profile 3. */ - { 352, 367 }, /* Profile 4. */ - { 352, 367 }, /* Profile 5. */ - { 352, 367 }, /* Profile 6. */ - { 352, 367 }, /* Profile 7. */ - { 352, 367 }, /* Profile 8. */ - { 352, 367 }, /* Profile 9. */ - }, - .profile_cnt = 10, - }, - { - .name = "EFFECTIVE_TTL_7_0", - .fid = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 176, 183 }, /* Profile 2. */ - { 160, 167 }, /* Profile 3. */ - { 176, 183 }, /* Profile 4. */ - { 160, 167 }, /* Profile 5. */ - { 176, 183 }, /* Profile 6. */ - { 160, 167 }, /* Profile 7. */ - { 176, 183 }, /* Profile 8. */ - { 160, 167 }, /* Profile 9. */ - }, - .profile_cnt = 10, - }, - { - .name = "EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0", - .fid = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_EM_FT_OPAQUE_OBJ_OR_IFP_OPAQUE_OBJ_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 256, 271 }, /* Profile 2. */ - { 240, 255 }, /* Profile 3. */ - { -1, -1 }, /* Profile 4. */ - { -1, -1 }, /* Profile 5. */ - { 256, 271 }, /* Profile 6. */ - { 240, 255 }, /* Profile 7. */ - }, - .profile_cnt = 8, - }, - { - .name = "ENTROPY_LABEL_HIGH_3_0", - .fid = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 376, 379 }, /* Profile 2. */ - { 376, 379 }, /* Profile 3. */ - { 376, 379 }, /* Profile 4. */ - { 376, 379 }, /* Profile 5. */ - { 376, 379 }, /* Profile 6. */ - { 376, 379 }, /* Profile 7. */ - { 376, 379 }, /* Profile 8. */ - { 376, 379 }, /* Profile 9. */ - }, - .profile_cnt = 10, - }, - { - .name = "ENTROPY_LABEL_LOW_15_0", - .fid = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 192, 207 }, /* Profile 2. */ - { 176, 191 }, /* Profile 3. */ - { 192, 207 }, /* Profile 4. */ - { 176, 191 }, /* Profile 5. */ - { 192, 207 }, /* Profile 6. */ - { 176, 191 }, /* Profile 7. */ - { 192, 207 }, /* Profile 8. */ - { 176, 191 }, /* Profile 9. */ - }, - .profile_cnt = 10, - }, - { - .name = "EVENT_TRACE_VECTOR_31_0", - .fid = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 0, 31 }, /* Profile 2. */ - { 0, 31 }, /* Profile 3. */ - { 0, 31 }, /* Profile 4. */ - { 0, 31 }, /* Profile 5. */ - { 0, 31 }, /* Profile 6. */ - { 0, 31 }, /* Profile 7. */ - { 0, 31 }, /* Profile 8. */ - { 0, 31 }, /* Profile 9. */ - }, - .profile_cnt = 10, - }, - { - .name = "EVENT_TRACE_VECTOR_47_32", - .fid = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 32, 47 }, /* Profile 2. */ - { 32, 47 }, /* Profile 3. */ - { 32, 47 }, /* Profile 4. */ - { 32, 47 }, /* Profile 5. */ - { 32, 47 }, /* Profile 6. */ - { 32, 47 }, /* Profile 7. */ - { 32, 47 }, /* Profile 8. */ - { 32, 47 }, /* Profile 9. */ - }, - .profile_cnt = 10, - }, - { - .name = "I2E_CLASS_ID_15_0", - .fid = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 304, 319 }, /* Profile 2. */ - { 288, 303 }, /* Profile 3. */ - { 304, 319 }, /* Profile 4. */ - { 288, 303 }, /* Profile 5. */ - { 304, 319 }, /* Profile 6. */ - { 288, 303 }, /* Profile 7. */ - { 304, 319 }, /* Profile 8. */ - { 288, 303 }, /* Profile 9. */ - }, - .profile_cnt = 10, - }, - { - .name = "IFP_IOAM_GBP_ACTION_3_0", - .fid = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 400, 403 }, /* Profile 2. */ - { 400, 403 }, /* Profile 3. */ - { 400, 403 }, /* Profile 4. */ - { 400, 403 }, /* Profile 5. */ - { 400, 403 }, /* Profile 6. */ - { 400, 403 }, /* Profile 7. */ - { 400, 403 }, /* Profile 8. */ - { 400, 403 }, /* Profile 9. */ - }, - .profile_cnt = 10, - }, - { - .name = "IFP_TS_CONTROL_ACTION_3_0", - .fid = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 388, 391 }, /* Profile 2. */ - { 388, 391 }, /* Profile 3. */ - { 388, 391 }, /* Profile 4. */ - { 388, 391 }, /* Profile 5. */ - { 388, 391 }, /* Profile 6. */ - { 388, 391 }, /* Profile 7. */ - { 388, 391 }, /* Profile 8. */ - { 388, 391 }, /* Profile 9. */ - }, - .profile_cnt = 10, - }, - { - .name = "ING_PORT_GROUP_ID_3_0_3_0", - .fid = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_ING_PORT_GROUP_ID_3_0_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 412, 415 }, /* Profile 2. */ - { 412, 415 }, /* Profile 3. */ - { 412, 415 }, /* Profile 4. */ - { 412, 415 }, /* Profile 5. */ - { 412, 415 }, /* Profile 6. */ - { 412, 415 }, /* Profile 7. */ - { 412, 415 }, /* Profile 8. */ - { 412, 415 }, /* Profile 9. */ - }, - .profile_cnt = 10, - }, - { - .name = "ING_PORT_GROUP_ID_7_4_3_0", - .fid = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_ING_PORT_GROUP_ID_7_4_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 408, 411 }, /* Profile 2. */ - { 408, 411 }, /* Profile 3. */ - { 408, 411 }, /* Profile 4. */ - { 408, 411 }, /* Profile 5. */ - { 408, 411 }, /* Profile 6. */ - { 408, 411 }, /* Profile 7. */ - { 408, 411 }, /* Profile 8. */ - { 408, 411 }, /* Profile 9. */ - }, - .profile_cnt = 10, - }, - { - .name = "ING_TIMESTAMP_31_0", - .fid = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 64, 95 }, /* Profile 2. */ - { 64, 95 }, /* Profile 3. */ - { 64, 95 }, /* Profile 4. */ - { 64, 95 }, /* Profile 5. */ - { 64, 95 }, /* Profile 6. */ - { 64, 95 }, /* Profile 7. */ - { 64, 95 }, /* Profile 8. */ - { 64, 95 }, /* Profile 9. */ - }, - .profile_cnt = 10, - }, - { - .name = "INGRESS_PP_PORT_ITAG_PRESERVE_15_0", - .fid = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_ITAG_PRESERVE_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 112, 127 }, /* Profile 2. */ - { 112, 127 }, /* Profile 3. */ - { 112, 127 }, /* Profile 4. */ - { 112, 127 }, /* Profile 5. */ - { 112, 127 }, /* Profile 6. */ - { 112, 127 }, /* Profile 7. */ - { 112, 127 }, /* Profile 8. */ - { 112, 127 }, /* Profile 9. */ - }, - .profile_cnt = 10, - }, - { - .name = "INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0", - .fid = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 224, 239 }, /* Profile 2. */ - { 208, 223 }, /* Profile 3. */ - { 224, 239 }, /* Profile 4. */ - { 208, 223 }, /* Profile 5. */ - { 224, 239 }, /* Profile 6. */ - { 208, 223 }, /* Profile 7. */ - { 224, 239 }, /* Profile 8. */ - { 208, 223 }, /* Profile 9. */ - }, - .profile_cnt = 10, - }, - { - .name = "INGRESS_QOS_REMARK_CTRL_3_0", - .fid = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 392, 395 }, /* Profile 2. */ - { 392, 395 }, /* Profile 3. */ - { 392, 395 }, /* Profile 4. */ - { 392, 395 }, /* Profile 5. */ - { 392, 395 }, /* Profile 6. */ - { 392, 395 }, /* Profile 7. */ - { 392, 395 }, /* Profile 8. */ - { 392, 395 }, /* Profile 9. */ - }, - .profile_cnt = 10, - }, - { - .name = "INT_PRI_3_0", - .fid = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 372, 375 }, /* Profile 2. */ - { 372, 375 }, /* Profile 3. */ - { 372, 375 }, /* Profile 4. */ - { 372, 375 }, /* Profile 5. */ - { 372, 375 }, /* Profile 6. */ - { 372, 375 }, /* Profile 7. */ - { 372, 375 }, /* Profile 8. */ - { 372, 375 }, /* Profile 9. */ - }, - .profile_cnt = 10, - }, - { - .name = "L2_IIF_10_0", - .fid = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 128, 138 }, /* Profile 2. */ - { -1, -1 }, /* Profile 3. */ - { 128, 138 }, /* Profile 4. */ - { -1, -1 }, /* Profile 5. */ - { 128, 138 }, /* Profile 6. */ - { -1, -1 }, /* Profile 7. */ - { 128, 138 }, /* Profile 8. */ - }, - .profile_cnt = 9, - }, - { - .name = "L2_OIF_10_0", - .fid = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { -1, -1 }, /* Profile 2. */ - { 320, 330 }, /* Profile 3. */ - { -1, -1 }, /* Profile 4. */ - { 320, 330 }, /* Profile 5. */ - { -1, -1 }, /* Profile 6. */ - { 320, 330 }, /* Profile 7. */ - { -1, -1 }, /* Profile 8. */ - { 320, 330 }, /* Profile 9. */ - }, - .profile_cnt = 10, - }, - { - .name = "L3_IIF_13_0", - .fid = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 160, 173 }, /* Profile 2. */ - { 144, 157 }, /* Profile 3. */ - { 160, 173 }, /* Profile 4. */ - { 144, 157 }, /* Profile 5. */ - { 160, 173 }, /* Profile 6. */ - { 144, 157 }, /* Profile 7. */ - { 160, 173 }, /* Profile 8. */ - { 144, 157 }, /* Profile 9. */ - }, - .profile_cnt = 10, - }, - { - .name = "L3_OIF_1_13_0", - .fid = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 336, 349 }, /* Profile 2. */ - { 336, 349 }, /* Profile 3. */ - { 336, 349 }, /* Profile 4. */ - { 336, 349 }, /* Profile 5. */ - { 336, 349 }, /* Profile 6. */ - { 336, 349 }, /* Profile 7. */ - { 336, 349 }, /* Profile 8. */ - { 336, 349 }, /* Profile 9. */ - }, - .profile_cnt = 10, - }, - { - .name = "NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0", - .fid = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 144, 159 }, /* Profile 2. */ - { 128, 143 }, /* Profile 3. */ - { 144, 159 }, /* Profile 4. */ - { 128, 143 }, /* Profile 5. */ - { 144, 159 }, /* Profile 6. */ - { 128, 143 }, /* Profile 7. */ - { 144, 159 }, /* Profile 8. */ - { 128, 143 }, /* Profile 9. */ - }, - .profile_cnt = 10, - }, - { - .name = "NHOP_INDEX_1_15_0", - .fid = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 208, 223 }, /* Profile 2. */ - { 192, 207 }, /* Profile 3. */ - { 208, 223 }, /* Profile 4. */ - { 192, 207 }, /* Profile 5. */ - { 208, 223 }, /* Profile 6. */ - { 192, 207 }, /* Profile 7. */ - { 208, 223 }, /* Profile 8. */ - { 192, 207 }, /* Profile 9. */ - }, - .profile_cnt = 10, - }, - { - .name = "PARSER_VHLEN_0_15_0", - .fid = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 96, 111 }, /* Profile 2. */ - { 96, 111 }, /* Profile 3. */ - { 96, 111 }, /* Profile 4. */ - { 96, 111 }, /* Profile 5. */ - { 96, 111 }, /* Profile 6. */ - { 96, 111 }, /* Profile 7. */ - { 96, 111 }, /* Profile 8. */ - { 96, 111 }, /* Profile 9. */ - }, - .profile_cnt = 10, - }, - { - .name = "PKT_MISC_CTRL_0_3_0", - .fid = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 384, 387 }, /* Profile 2. */ - { 384, 387 }, /* Profile 3. */ - { 384, 387 }, /* Profile 4. */ - { 384, 387 }, /* Profile 5. */ - { 384, 387 }, /* Profile 6. */ - { 384, 387 }, /* Profile 7. */ - { 384, 387 }, /* Profile 8. */ - { 384, 387 }, /* Profile 9. */ - }, - .profile_cnt = 10, - }, - { - .name = "SVP_15_0", - .fid = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_SVP_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 320, 335 }, /* Profile 2. */ - { 304, 319 }, /* Profile 3. */ - { 320, 335 }, /* Profile 4. */ - { 304, 319 }, /* Profile 5. */ - { 320, 335 }, /* Profile 6. */ - { 304, 319 }, /* Profile 7. */ - { 320, 335 }, /* Profile 8. */ - { 304, 319 }, /* Profile 9. */ - }, - .profile_cnt = 10, - }, - { - .name = "SVP_NETWORK_GROUP_BITMAP_3_0", - .fid = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 404, 407 }, /* Profile 2. */ - { 404, 407 }, /* Profile 3. */ - { 404, 407 }, /* Profile 4. */ - { 404, 407 }, /* Profile 5. */ - { 404, 407 }, /* Profile 6. */ - { 404, 407 }, /* Profile 7. */ - { 404, 407 }, /* Profile 8. */ - { 404, 407 }, /* Profile 9. */ - }, - .profile_cnt = 10, - }, - { - .name = "SYSTEM_DESTINATION_15_0", - .fid = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 288, 303 }, /* Profile 2. */ - { 272, 287 }, /* Profile 3. */ - { 288, 303 }, /* Profile 4. */ - { 272, 287 }, /* Profile 5. */ - { 288, 303 }, /* Profile 6. */ - { 272, 287 }, /* Profile 7. */ - { 288, 303 }, /* Profile 8. */ - { 272, 287 }, /* Profile 9. */ - }, - .profile_cnt = 10, - }, - { - .name = "SYSTEM_OPCODE_3_0", - .fid = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 380, 383 }, /* Profile 2. */ - { 380, 383 }, /* Profile 3. */ - { 380, 383 }, /* Profile 4. */ - { 380, 383 }, /* Profile 5. */ - { 380, 383 }, /* Profile 6. */ - { 380, 383 }, /* Profile 7. */ - { 380, 383 }, /* Profile 8. */ - { 380, 383 }, /* Profile 9. */ - }, - .profile_cnt = 10, - }, - { - .name = "SYSTEM_SOURCE_15_0", - .fid = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { -1, -1 }, /* Profile 2. */ - { -1, -1 }, /* Profile 3. */ - { -1, -1 }, /* Profile 4. */ - { -1, -1 }, /* Profile 5. */ - { 272, 287 }, /* Profile 6. */ - { 256, 271 }, /* Profile 7. */ - { 272, 287 }, /* Profile 8. */ - { 256, 271 }, /* Profile 9. */ - }, - .profile_cnt = 10, - }, - { - .name = "TIMESTAMP_CTRL_3_0", - .fid = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 368, 371 }, /* Profile 2. */ - { 368, 371 }, /* Profile 3. */ - { 368, 371 }, /* Profile 4. */ - { 368, 371 }, /* Profile 5. */ - { 368, 371 }, /* Profile 6. */ - { 368, 371 }, /* Profile 7. */ - { 368, 371 }, /* Profile 8. */ - { 368, 371 }, /* Profile 9. */ - }, - .profile_cnt = 10, - }, - { - .name = "TUNNEL_PROCESSING_RESULTS_1_3_0", - .fid = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 396, 399 }, /* Profile 2. */ - { 396, 399 }, /* Profile 3. */ - { 396, 399 }, /* Profile 4. */ - { 396, 399 }, /* Profile 5. */ - { 396, 399 }, /* Profile 6. */ - { 396, 399 }, /* Profile 7. */ - { 396, 399 }, /* Profile 8. */ - { 396, 399 }, /* Profile 9. */ - }, - .profile_cnt = 10, - }, - { - .name = "VFI_15_0", - .fid = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_VFI_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 240, 255 }, /* Profile 2. */ - { 224, 239 }, /* Profile 3. */ - { 240, 255 }, /* Profile 4. */ - { 224, 239 }, /* Profile 5. */ - { 240, 255 }, /* Profile 6. */ - { 224, 239 }, /* Profile 7. */ - { 240, 255 }, /* Profile 8. */ - { 224, 239 }, /* Profile 9. */ - }, - .profile_cnt = 10, - }, -}; -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_34_2_0_rxpmd_flex_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_FID_COUNT, - .info = bcm56880_a0_hna_6_5_34_2_0_rxpmd_flex_field_data, - .profile_bmp_cnt = 1, - .profile_bmp[0] = 0x3fc, - -}; - -static shr_enum_map_t bcm56880_a0_hna_6_5_34_2_0_rxpmd_flex_reason_names[] = { - BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT -}; - -static bcmpkt_flex_reasons_info_t bcm56880_a0_hna_6_5_34_2_0_rxpmd_flex_reasons_info = { - .num_reasons = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_COUNT, - .reason_names = bcm56880_a0_hna_6_5_34_2_0_rxpmd_flex_reason_names, - .reason_encode = bcm56880_a0_hna_6_5_34_2_0_rxpmd_flex_reason_encode, - .reason_decode = bcm56880_a0_hna_6_5_34_2_0_rxpmd_flex_reason_decode, -}; - - -static int32_t bcmpkt_arp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 24, 8); - - return ret; -} - -static int32_t bcmpkt_arp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_arp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_arp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_arp_t_operation_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 16); - - return ret; -} - -static int32_t bcmpkt_arp_t_operation_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_arp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 8); - - return ret; -} - -static int32_t bcmpkt_arp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_arp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_arp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_arp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_arp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_arp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_arp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_arp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_arp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_arp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_arp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_34_2_0_arp_t_fget[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ARP_T_FID_COUNT] = { - bcmpkt_arp_t_hardware_len_get, - bcmpkt_arp_t_hardware_type_get, - bcmpkt_arp_t_operation_get, - bcmpkt_arp_t_prot_addr_len_get, - bcmpkt_arp_t_protocol_type_get, - bcmpkt_arp_t_sender_ha_get, - bcmpkt_arp_t_sender_ip_get, - bcmpkt_arp_t_target_ha_get, - bcmpkt_arp_t_target_ip_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_34_2_0_arp_t_fset[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ARP_T_FID_COUNT] = { - bcmpkt_arp_t_hardware_len_set, - bcmpkt_arp_t_hardware_type_set, - bcmpkt_arp_t_operation_set, - bcmpkt_arp_t_prot_addr_len_set, - bcmpkt_arp_t_protocol_type_set, - bcmpkt_arp_t_sender_ha_set, - bcmpkt_arp_t_sender_ip_set, - bcmpkt_arp_t_target_ha_set, - bcmpkt_arp_t_target_ip_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_34_2_0_arp_t_field_data[] = { - BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_34_2_0_arp_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ARP_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_34_2_0_arp_t_field_data, -}; - - -static int32_t bcmpkt_authen_t_data_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_authen_t_data_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_authen_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_authen_t_next_header_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_authen_t_payload_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_authen_t_payload_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_authen_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_authen_t_reserved_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_authen_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_authen_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_authen_t_spi_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_authen_t_spi_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_34_2_0_authen_t_fget[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_AUTHEN_T_FID_COUNT] = { - bcmpkt_authen_t_data_get, - bcmpkt_authen_t_next_header_get, - bcmpkt_authen_t_payload_len_get, - bcmpkt_authen_t_reserved_get, - bcmpkt_authen_t_seq_num_get, - bcmpkt_authen_t_spi_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_34_2_0_authen_t_fset[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_AUTHEN_T_FID_COUNT] = { - bcmpkt_authen_t_data_set, - bcmpkt_authen_t_next_header_set, - bcmpkt_authen_t_payload_len_set, - bcmpkt_authen_t_reserved_set, - bcmpkt_authen_t_seq_num_set, - bcmpkt_authen_t_spi_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_34_2_0_authen_t_field_data[] = { - BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_34_2_0_authen_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_AUTHEN_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_34_2_0_authen_t_field_data, -}; - - -static int32_t bcmpkt_bfd_t_desmintxintv_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_bfd_t_desmintxintv_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_bfd_t_minechorxintv_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_bfd_t_minechorxintv_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_bfd_t_reqminrxintv_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_bfd_t_reqminrxintv_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_bfd_t_ap_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 18, 1); - - return ret; -} - -static int32_t bcmpkt_bfd_t_ap_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 18, 1, val); - return ret; -} - -static int32_t bcmpkt_bfd_t_bfd_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 8); - - return ret; -} - -static int32_t bcmpkt_bfd_t_bfd_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 8, val); - return ret; -} - -static int32_t bcmpkt_bfd_t_cpi_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 19, 1); - - return ret; -} - -static int32_t bcmpkt_bfd_t_cpi_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 19, 1, val); - return ret; -} - -static int32_t bcmpkt_bfd_t_dem_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 17, 1); - - return ret; -} - -static int32_t bcmpkt_bfd_t_dem_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 17, 1, val); - return ret; -} - -static int32_t bcmpkt_bfd_t_detectmult_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 8, 8); - - return ret; -} - -static int32_t bcmpkt_bfd_t_detectmult_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 8, 8, val); - return ret; -} - -static int32_t bcmpkt_bfd_t_diag_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 5); - - return ret; -} - -static int32_t bcmpkt_bfd_t_diag_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 5, val); - return ret; -} - -static int32_t bcmpkt_bfd_t_fin_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 20, 1); - - return ret; -} - -static int32_t bcmpkt_bfd_t_fin_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 20, 1, val); - return ret; -} - -static int32_t bcmpkt_bfd_t_mpt_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 1); - - return ret; -} - -static int32_t bcmpkt_bfd_t_mpt_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 1, val); - return ret; -} - -static int32_t bcmpkt_bfd_t_mydiscrim_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_bfd_t_mydiscrim_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_bfd_t_poll_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 21, 1); - - return ret; -} - -static int32_t bcmpkt_bfd_t_poll_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 21, 1, val); - return ret; -} - -static int32_t bcmpkt_bfd_t_sta_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 22, 2); - - return ret; -} - -static int32_t bcmpkt_bfd_t_sta_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 22, 2, val); - return ret; -} - -static int32_t bcmpkt_bfd_t_urdiscrim_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_bfd_t_urdiscrim_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_bfd_t_version_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 29, 3); - - return ret; -} - -static int32_t bcmpkt_bfd_t_version_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 29, 3, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_34_2_0_bfd_t_fget[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_BFD_T_FID_COUNT] = { - bcmpkt_bfd_t_ap_get, - bcmpkt_bfd_t_bfd_length_get, - bcmpkt_bfd_t_cpi_get, - bcmpkt_bfd_t_dem_get, - bcmpkt_bfd_t_desmintxintv_get, - bcmpkt_bfd_t_detectmult_get, - bcmpkt_bfd_t_diag_get, - bcmpkt_bfd_t_fin_get, - bcmpkt_bfd_t_minechorxintv_get, - bcmpkt_bfd_t_mpt_get, - bcmpkt_bfd_t_mydiscrim_get, - bcmpkt_bfd_t_poll_get, - bcmpkt_bfd_t_reqminrxintv_get, - bcmpkt_bfd_t_sta_get, - bcmpkt_bfd_t_urdiscrim_get, - bcmpkt_bfd_t_version_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_34_2_0_bfd_t_fset[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_BFD_T_FID_COUNT] = { - bcmpkt_bfd_t_ap_set, - bcmpkt_bfd_t_bfd_length_set, - bcmpkt_bfd_t_cpi_set, - bcmpkt_bfd_t_dem_set, - bcmpkt_bfd_t_desmintxintv_set, - bcmpkt_bfd_t_detectmult_set, - bcmpkt_bfd_t_diag_set, - bcmpkt_bfd_t_fin_set, - bcmpkt_bfd_t_minechorxintv_set, - bcmpkt_bfd_t_mpt_set, - bcmpkt_bfd_t_mydiscrim_set, - bcmpkt_bfd_t_poll_set, - bcmpkt_bfd_t_reqminrxintv_set, - bcmpkt_bfd_t_sta_set, - bcmpkt_bfd_t_urdiscrim_set, - bcmpkt_bfd_t_version_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_34_2_0_bfd_t_field_data[] = { - BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_34_2_0_bfd_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_BFD_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_34_2_0_bfd_t_field_data, -}; - - -static int32_t bcmpkt_cntag_t_rpid_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_cntag_t_rpid_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_cntag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_cntag_t_tpid_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_34_2_0_cntag_t_fget[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_CNTAG_T_FID_COUNT] = { - bcmpkt_cntag_t_rpid_get, - bcmpkt_cntag_t_tpid_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_34_2_0_cntag_t_fset[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_CNTAG_T_FID_COUNT] = { - bcmpkt_cntag_t_rpid_set, - bcmpkt_cntag_t_tpid_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_34_2_0_cntag_t_field_data[] = { - BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_34_2_0_cntag_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_CNTAG_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_34_2_0_cntag_t_field_data, -}; - - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_34_2_0_cpu_composites_0_t_fget[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { - bcmpkt_cpu_composites_0_t_dma_cont0_get, - bcmpkt_cpu_composites_0_t_dma_cont1_get, - bcmpkt_cpu_composites_0_t_dma_cont2_get, - bcmpkt_cpu_composites_0_t_dma_cont3_get, - bcmpkt_cpu_composites_0_t_dma_cont4_get, - bcmpkt_cpu_composites_0_t_dma_cont5_get, - bcmpkt_cpu_composites_0_t_dma_cont6_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_34_2_0_cpu_composites_0_t_fset[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { - bcmpkt_cpu_composites_0_t_dma_cont0_set, - bcmpkt_cpu_composites_0_t_dma_cont1_set, - bcmpkt_cpu_composites_0_t_dma_cont2_set, - bcmpkt_cpu_composites_0_t_dma_cont3_set, - bcmpkt_cpu_composites_0_t_dma_cont4_set, - bcmpkt_cpu_composites_0_t_dma_cont5_set, - bcmpkt_cpu_composites_0_t_dma_cont6_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_34_2_0_cpu_composites_0_t_field_data[] = { - BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_34_2_0_cpu_composites_0_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_34_2_0_cpu_composites_0_t_field_data, -}; - - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_34_2_0_cpu_composites_1_t_fget[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { - bcmpkt_cpu_composites_1_t_dma_cont10_get, - bcmpkt_cpu_composites_1_t_dma_cont11_get, - bcmpkt_cpu_composites_1_t_dma_cont12_get, - bcmpkt_cpu_composites_1_t_dma_cont13_get, - bcmpkt_cpu_composites_1_t_dma_cont14_get, - bcmpkt_cpu_composites_1_t_dma_cont15_get, - bcmpkt_cpu_composites_1_t_dma_cont16_get, - bcmpkt_cpu_composites_1_t_dma_cont17_get, - bcmpkt_cpu_composites_1_t_dma_cont7_get, - bcmpkt_cpu_composites_1_t_dma_cont8_get, - bcmpkt_cpu_composites_1_t_dma_cont9_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_34_2_0_cpu_composites_1_t_fset[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { - bcmpkt_cpu_composites_1_t_dma_cont10_set, - bcmpkt_cpu_composites_1_t_dma_cont11_set, - bcmpkt_cpu_composites_1_t_dma_cont12_set, - bcmpkt_cpu_composites_1_t_dma_cont13_set, - bcmpkt_cpu_composites_1_t_dma_cont14_set, - bcmpkt_cpu_composites_1_t_dma_cont15_set, - bcmpkt_cpu_composites_1_t_dma_cont16_set, - bcmpkt_cpu_composites_1_t_dma_cont17_set, - bcmpkt_cpu_composites_1_t_dma_cont7_set, - bcmpkt_cpu_composites_1_t_dma_cont8_set, - bcmpkt_cpu_composites_1_t_dma_cont9_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_34_2_0_cpu_composites_1_t_field_data[] = { - BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_34_2_0_cpu_composites_1_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_34_2_0_cpu_composites_1_t_field_data, -}; - - -static int32_t bcmpkt_dest_option_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_dest_option_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_dest_option_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_dest_option_t_next_header_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_dest_option_t_option_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_dest_option_t_option_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_34_2_0_dest_option_t_fget[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = { - bcmpkt_dest_option_t_hdr_ext_len_get, - bcmpkt_dest_option_t_next_header_get, - bcmpkt_dest_option_t_option_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_34_2_0_dest_option_t_fset[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = { - bcmpkt_dest_option_t_hdr_ext_len_set, - bcmpkt_dest_option_t_next_header_set, - bcmpkt_dest_option_t_option_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_34_2_0_dest_option_t_field_data[] = { - BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_34_2_0_dest_option_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_DEST_OPTION_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_34_2_0_dest_option_t_field_data, -}; - - -static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 11, 2); - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 11, 2, val); - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 13, 3); - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 13, 3, val); - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 16, 16); - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 0, 16); - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 10); - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 10, val); - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_t_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 10, 1); - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_t_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 10, 1, val); - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 28, 4); - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 28, 4, val); - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 12); - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 12, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_34_2_0_erspan3_fixed_hdr_t_fget[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { - bcmpkt_erspan3_fixed_hdr_t_bso_get, - bcmpkt_erspan3_fixed_hdr_t_cos_get, - bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get, - bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get, - bcmpkt_erspan3_fixed_hdr_t_session_id_get, - bcmpkt_erspan3_fixed_hdr_t_t_get, - bcmpkt_erspan3_fixed_hdr_t_timestamp_get, - bcmpkt_erspan3_fixed_hdr_t_ver_get, - bcmpkt_erspan3_fixed_hdr_t_vlan_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_34_2_0_erspan3_fixed_hdr_t_fset[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { - bcmpkt_erspan3_fixed_hdr_t_bso_set, - bcmpkt_erspan3_fixed_hdr_t_cos_set, - bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set, - bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set, - bcmpkt_erspan3_fixed_hdr_t_session_id_set, - bcmpkt_erspan3_fixed_hdr_t_t_set, - bcmpkt_erspan3_fixed_hdr_t_timestamp_set, - bcmpkt_erspan3_fixed_hdr_t_ver_set, - bcmpkt_erspan3_fixed_hdr_t_vlan_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_34_2_0_erspan3_fixed_hdr_t_field_data[] = { - BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_34_2_0_erspan3_fixed_hdr_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_34_2_0_erspan3_fixed_hdr_t_field_data, -}; - - -static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 26, 6); - - return ret; -} - -static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 26, 6, val); - return ret; -} - -static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 10); - - return ret; -} - -static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 10, val); - return ret; -} - -static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_34_2_0_erspan3_subhdr_5_t_fget[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { - bcmpkt_erspan3_subhdr_5_t_platform_id_get, - bcmpkt_erspan3_subhdr_5_t_port_id_get, - bcmpkt_erspan3_subhdr_5_t_switch_id_get, - bcmpkt_erspan3_subhdr_5_t_timestamp_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_34_2_0_erspan3_subhdr_5_t_fset[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { - bcmpkt_erspan3_subhdr_5_t_platform_id_set, - bcmpkt_erspan3_subhdr_5_t_port_id_set, - bcmpkt_erspan3_subhdr_5_t_switch_id_set, - bcmpkt_erspan3_subhdr_5_t_timestamp_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_34_2_0_erspan3_subhdr_5_t_field_data[] = { - BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_34_2_0_erspan3_subhdr_5_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_34_2_0_erspan3_subhdr_5_t_field_data, -}; - - -static int32_t bcmpkt_esp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 0, 8); - - return ret; -} - -static int32_t bcmpkt_esp_t_next_header_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 0, 8, val); - return ret; -} - -static int32_t bcmpkt_esp_t_pad_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 8, 16); - - return ret; -} - -static int32_t bcmpkt_esp_t_pad_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 8, 16, val); - return ret; -} - -static int32_t bcmpkt_esp_t_pad_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 24, 8); - - return ret; -} - -static int32_t bcmpkt_esp_t_pad_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_esp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_esp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_esp_t_spi_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_esp_t_spi_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_34_2_0_esp_t_fget[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ESP_T_FID_COUNT] = { - bcmpkt_esp_t_next_header_get, - bcmpkt_esp_t_pad_get, - bcmpkt_esp_t_pad_len_get, - bcmpkt_esp_t_seq_num_get, - bcmpkt_esp_t_spi_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_34_2_0_esp_t_fset[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ESP_T_FID_COUNT] = { - bcmpkt_esp_t_next_header_set, - bcmpkt_esp_t_pad_set, - bcmpkt_esp_t_pad_len_set, - bcmpkt_esp_t_seq_num_set, - bcmpkt_esp_t_spi_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_34_2_0_esp_t_field_data[] = { - BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_34_2_0_esp_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ESP_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_34_2_0_esp_t_field_data, -}; - - -static int32_t bcmpkt_etag_t_tag_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_etag_t_tag_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_etag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_etag_t_tpid_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_34_2_0_etag_t_fget[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ETAG_T_FID_COUNT] = { - bcmpkt_etag_t_tag_get, - bcmpkt_etag_t_tpid_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_34_2_0_etag_t_fset[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ETAG_T_FID_COUNT] = { - bcmpkt_etag_t_tag_set, - bcmpkt_etag_t_tpid_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_34_2_0_etag_t_field_data[] = { - BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_34_2_0_etag_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ETAG_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_34_2_0_etag_t_field_data, -}; - - -static int32_t bcmpkt_ethertype_t_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_ethertype_t_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_34_2_0_ethertype_t_fget[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = { - bcmpkt_ethertype_t_type_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_34_2_0_ethertype_t_fset[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = { - bcmpkt_ethertype_t_type_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_34_2_0_ethertype_t_field_data[] = { - BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_34_2_0_ethertype_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_34_2_0_ethertype_t_field_data, -}; - - -static int32_t bcmpkt_frag_t_frag_info_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_frag_t_frag_info_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_frag_t_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_frag_t_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_frag_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_frag_t_next_header_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_frag_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_frag_t_reserved_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_34_2_0_frag_t_fget[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_FRAG_T_FID_COUNT] = { - bcmpkt_frag_t_frag_info_get, - bcmpkt_frag_t_id_get, - bcmpkt_frag_t_next_header_get, - bcmpkt_frag_t_reserved_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_34_2_0_frag_t_fset[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_FRAG_T_FID_COUNT] = { - bcmpkt_frag_t_frag_info_set, - bcmpkt_frag_t_id_set, - bcmpkt_frag_t_next_header_set, - bcmpkt_frag_t_reserved_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_34_2_0_frag_t_field_data[] = { - BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_34_2_0_frag_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_FRAG_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_34_2_0_frag_t_field_data, -}; - - -static int32_t bcmpkt_generic_loopback_t_destination_obj_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 16); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_destination_obj_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_destination_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 24, 4); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_destination_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 24, 4, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_entropy_obj_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[3], 16, 16); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_entropy_obj_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[3], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_flags_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 4); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_flags_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 4, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_header_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 20, 4); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_header_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 20, 4, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_input_priority_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 12, 4); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_input_priority_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 12, 4, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_interface_ctrl_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 4, 4); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_interface_ctrl_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 4, 4, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_interface_obj_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 0, 16); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_interface_obj_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 4); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 4, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 28, 4); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 28, 4, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_qos_obj_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 8); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_qos_obj_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_reserved_1_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 8, 4); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_reserved_1_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 8, 4, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_source_system_port_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 16, 16); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_source_system_port_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_start_byte_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_start_byte_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_svp_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[3], 0, 16); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_svp_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[3], 0, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_34_2_0_generic_loopback_t_fget[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { - bcmpkt_generic_loopback_t_destination_obj_get, - bcmpkt_generic_loopback_t_destination_type_get, - bcmpkt_generic_loopback_t_entropy_obj_get, - bcmpkt_generic_loopback_t_flags_get, - bcmpkt_generic_loopback_t_header_type_get, - bcmpkt_generic_loopback_t_input_priority_get, - bcmpkt_generic_loopback_t_interface_ctrl_get, - bcmpkt_generic_loopback_t_interface_obj_get, - bcmpkt_generic_loopback_t_processing_ctrl_0_get, - bcmpkt_generic_loopback_t_processing_ctrl_1_get, - bcmpkt_generic_loopback_t_qos_obj_get, - bcmpkt_generic_loopback_t_reserved_1_get, - bcmpkt_generic_loopback_t_source_system_port_get, - bcmpkt_generic_loopback_t_start_byte_get, - bcmpkt_generic_loopback_t_svp_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_34_2_0_generic_loopback_t_fset[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { - bcmpkt_generic_loopback_t_destination_obj_set, - bcmpkt_generic_loopback_t_destination_type_set, - bcmpkt_generic_loopback_t_entropy_obj_set, - bcmpkt_generic_loopback_t_flags_set, - bcmpkt_generic_loopback_t_header_type_set, - bcmpkt_generic_loopback_t_input_priority_set, - bcmpkt_generic_loopback_t_interface_ctrl_set, - bcmpkt_generic_loopback_t_interface_obj_set, - bcmpkt_generic_loopback_t_processing_ctrl_0_set, - bcmpkt_generic_loopback_t_processing_ctrl_1_set, - bcmpkt_generic_loopback_t_qos_obj_set, - bcmpkt_generic_loopback_t_reserved_1_set, - bcmpkt_generic_loopback_t_source_system_port_set, - bcmpkt_generic_loopback_t_start_byte_set, - bcmpkt_generic_loopback_t_svp_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_34_2_0_generic_loopback_t_field_data[] = { - BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_34_2_0_generic_loopback_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_34_2_0_generic_loopback_t_field_data, -}; - - -static int32_t bcmpkt_gpe_t_flags_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_gpe_t_flags_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_gpe_t_next_protocol_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 8); - - return ret; -} - -static int32_t bcmpkt_gpe_t_next_protocol_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 8, val); - return ret; -} - -static int32_t bcmpkt_gpe_t_reserved0_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 8, 16); - - return ret; -} - -static int32_t bcmpkt_gpe_t_reserved0_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 8, 16, val); - return ret; -} - -static int32_t bcmpkt_gpe_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 8); - - return ret; -} - -static int32_t bcmpkt_gpe_t_reserved1_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 8, val); - return ret; -} - -static int32_t bcmpkt_gpe_t_vni_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 8, 24); - - return ret; -} - -static int32_t bcmpkt_gpe_t_vni_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 8, 24, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_34_2_0_gpe_t_fget[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GPE_T_FID_COUNT] = { - bcmpkt_gpe_t_flags_get, - bcmpkt_gpe_t_next_protocol_get, - bcmpkt_gpe_t_reserved0_get, - bcmpkt_gpe_t_reserved1_get, - bcmpkt_gpe_t_vni_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_34_2_0_gpe_t_fset[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GPE_T_FID_COUNT] = { - bcmpkt_gpe_t_flags_set, - bcmpkt_gpe_t_next_protocol_set, - bcmpkt_gpe_t_reserved0_set, - bcmpkt_gpe_t_reserved1_set, - bcmpkt_gpe_t_vni_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_34_2_0_gpe_t_field_data[] = { - BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_34_2_0_gpe_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GPE_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_34_2_0_gpe_t_field_data, -}; - - -static int32_t bcmpkt_gre_chksum_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_gre_chksum_t_checksum_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_gre_chksum_t_offset_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_gre_chksum_t_offset_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_34_2_0_gre_chksum_t_fget[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = { - bcmpkt_gre_chksum_t_checksum_get, - bcmpkt_gre_chksum_t_offset_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_34_2_0_gre_chksum_t_fset[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = { - bcmpkt_gre_chksum_t_checksum_set, - bcmpkt_gre_chksum_t_offset_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_34_2_0_gre_chksum_t_field_data[] = { - BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_34_2_0_gre_chksum_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_34_2_0_gre_chksum_t_field_data, -}; - - -static int32_t bcmpkt_gre_key_t_key_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_gre_key_t_key_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_34_2_0_gre_key_t_fget[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GRE_KEY_T_FID_COUNT] = { - bcmpkt_gre_key_t_key_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_34_2_0_gre_key_t_fset[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GRE_KEY_T_FID_COUNT] = { - bcmpkt_gre_key_t_key_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_34_2_0_gre_key_t_field_data[] = { - BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_34_2_0_gre_key_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GRE_KEY_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_34_2_0_gre_key_t_field_data, -}; - - -static int32_t bcmpkt_gre_rout_t_routing_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_gre_rout_t_routing_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_34_2_0_gre_rout_t_fget[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = { - bcmpkt_gre_rout_t_routing_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_34_2_0_gre_rout_t_fset[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = { - bcmpkt_gre_rout_t_routing_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_34_2_0_gre_rout_t_field_data[] = { - BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_34_2_0_gre_rout_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GRE_ROUT_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_34_2_0_gre_rout_t_field_data, -}; - - -static int32_t bcmpkt_gre_seq_t_sequence_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_gre_seq_t_sequence_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_34_2_0_gre_seq_t_fget[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = { - bcmpkt_gre_seq_t_sequence_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_34_2_0_gre_seq_t_fset[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = { - bcmpkt_gre_seq_t_sequence_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_34_2_0_gre_seq_t_field_data[] = { - BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_34_2_0_gre_seq_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GRE_SEQ_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_34_2_0_gre_seq_t_field_data, -}; - - -static int32_t bcmpkt_gre_t_c_r_k_s_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 28, 4); - - return ret; -} - -static int32_t bcmpkt_gre_t_c_r_k_s_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 28, 4, val); - return ret; -} - -static int32_t bcmpkt_gre_t_protocol_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_gre_t_protocol_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_gre_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 19, 9); - - return ret; -} - -static int32_t bcmpkt_gre_t_reserved_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 19, 9, val); - return ret; -} - -static int32_t bcmpkt_gre_t_version_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 3); - - return ret; -} - -static int32_t bcmpkt_gre_t_version_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 3, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_34_2_0_gre_t_fget[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GRE_T_FID_COUNT] = { - bcmpkt_gre_t_c_r_k_s_get, - bcmpkt_gre_t_protocol_get, - bcmpkt_gre_t_reserved_get, - bcmpkt_gre_t_version_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_34_2_0_gre_t_fset[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GRE_T_FID_COUNT] = { - bcmpkt_gre_t_c_r_k_s_set, - bcmpkt_gre_t_protocol_set, - bcmpkt_gre_t_reserved_set, - bcmpkt_gre_t_version_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_34_2_0_gre_t_field_data[] = { - BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_34_2_0_gre_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_GRE_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_34_2_0_gre_t_field_data, -}; - - -static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_hop_by_hop_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_hop_by_hop_t_next_header_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_hop_by_hop_t_option_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_hop_by_hop_t_option_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_34_2_0_hop_by_hop_t_fget[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = { - bcmpkt_hop_by_hop_t_hdr_ext_len_get, - bcmpkt_hop_by_hop_t_next_header_get, - bcmpkt_hop_by_hop_t_option_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_34_2_0_hop_by_hop_t_fset[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = { - bcmpkt_hop_by_hop_t_hdr_ext_len_set, - bcmpkt_hop_by_hop_t_next_header_set, - bcmpkt_hop_by_hop_t_option_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_34_2_0_hop_by_hop_t_field_data[] = { - BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_34_2_0_hop_by_hop_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_34_2_0_hop_by_hop_t_field_data, -}; - - -static int32_t bcmpkt_icmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_icmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_icmp_t_code_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_icmp_t_code_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_icmp_t_icmp_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_icmp_t_icmp_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_34_2_0_icmp_t_fget[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ICMP_T_FID_COUNT] = { - bcmpkt_icmp_t_checksum_get, - bcmpkt_icmp_t_code_get, - bcmpkt_icmp_t_icmp_type_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_34_2_0_icmp_t_fset[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ICMP_T_FID_COUNT] = { - bcmpkt_icmp_t_checksum_set, - bcmpkt_icmp_t_code_set, - bcmpkt_icmp_t_icmp_type_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_34_2_0_icmp_t_field_data[] = { - BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_34_2_0_icmp_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ICMP_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_34_2_0_icmp_t_field_data, -}; - - -static int32_t bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 8); - - return ret; -} - -static int32_t bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 8, val); - return ret; -} - -static int32_t bcmpkt_ifa_flex_md_0_a_t_lns_device_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 8, 24); - - return ret; -} - -static int32_t bcmpkt_ifa_flex_md_0_a_t_lns_device_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 8, 24, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_34_2_0_ifa_flex_md_0_a_t_fget[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT] = { - bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_get, - bcmpkt_ifa_flex_md_0_a_t_lns_device_id_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_34_2_0_ifa_flex_md_0_a_t_fset[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT] = { - bcmpkt_ifa_flex_md_0_a_t_fwd_hdr_ttl_set, - bcmpkt_ifa_flex_md_0_a_t_lns_device_id_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_34_2_0_ifa_flex_md_0_a_t_field_data[] = { - BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_34_2_0_ifa_flex_md_0_a_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_0_A_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_34_2_0_ifa_flex_md_0_a_t_field_data, -}; - - -static int32_t bcmpkt_ifa_flex_md_0_b_t_cn_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 26, 2); - - return ret; -} - -static int32_t bcmpkt_ifa_flex_md_0_b_t_cn_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 26, 2, val); - return ret; -} - -static int32_t bcmpkt_ifa_flex_md_0_b_t_port_speed_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 28, 4); - - return ret; -} - -static int32_t bcmpkt_ifa_flex_md_0_b_t_port_speed_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 28, 4, val); - return ret; -} - -static int32_t bcmpkt_ifa_flex_md_0_b_t_queue_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 20, 6); - - return ret; -} - -static int32_t bcmpkt_ifa_flex_md_0_b_t_queue_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 20, 6, val); - return ret; -} - -static int32_t bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 20); - - return ret; -} - -static int32_t bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 20, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_34_2_0_ifa_flex_md_0_b_t_fget[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT] = { - bcmpkt_ifa_flex_md_0_b_t_cn_get, - bcmpkt_ifa_flex_md_0_b_t_port_speed_get, - bcmpkt_ifa_flex_md_0_b_t_queue_id_get, - bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_34_2_0_ifa_flex_md_0_b_t_fset[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT] = { - bcmpkt_ifa_flex_md_0_b_t_cn_set, - bcmpkt_ifa_flex_md_0_b_t_port_speed_set, - bcmpkt_ifa_flex_md_0_b_t_queue_id_set, - bcmpkt_ifa_flex_md_0_b_t_rx_timestamp_sec_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_34_2_0_ifa_flex_md_0_b_t_field_data[] = { - BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_34_2_0_ifa_flex_md_0_b_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_0_B_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_34_2_0_ifa_flex_md_0_b_t_field_data, -}; - - -static int32_t bcmpkt_ifa_flex_md_1_t_egress_port_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_ifa_flex_md_1_t_egress_port_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_ifa_flex_md_1_t_ingress_port_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_ifa_flex_md_1_t_ingress_port_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_34_2_0_ifa_flex_md_1_t_fget[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT] = { - bcmpkt_ifa_flex_md_1_t_egress_port_id_get, - bcmpkt_ifa_flex_md_1_t_ingress_port_id_get, - bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_34_2_0_ifa_flex_md_1_t_fset[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT] = { - bcmpkt_ifa_flex_md_1_t_egress_port_id_set, - bcmpkt_ifa_flex_md_1_t_ingress_port_id_set, - bcmpkt_ifa_flex_md_1_t_rx_timestamp_nanosec_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_34_2_0_ifa_flex_md_1_t_field_data[] = { - BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_1_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_34_2_0_ifa_flex_md_1_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_1_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_34_2_0_ifa_flex_md_1_t_field_data, -}; - - -static int32_t bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_34_2_0_ifa_flex_md_2_t_fget[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT] = { - bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_get, - bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_34_2_0_ifa_flex_md_2_t_fset[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT] = { - bcmpkt_ifa_flex_md_2_t_residence_time_nanosec_set, - bcmpkt_ifa_flex_md_2_t_tx_queue_byte_count_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_34_2_0_ifa_flex_md_2_t_field_data[] = { - BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_2_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_34_2_0_ifa_flex_md_2_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_2_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_34_2_0_ifa_flex_md_2_t_field_data, -}; - - -static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_0_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_0_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_1_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ifa_flex_md_3_t_mmu_stat_1_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_34_2_0_ifa_flex_md_3_t_fget[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT] = { - bcmpkt_ifa_flex_md_3_t_mmu_stat_0_get, - bcmpkt_ifa_flex_md_3_t_mmu_stat_1_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_34_2_0_ifa_flex_md_3_t_fset[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT] = { - bcmpkt_ifa_flex_md_3_t_mmu_stat_0_set, - bcmpkt_ifa_flex_md_3_t_mmu_stat_1_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_34_2_0_ifa_flex_md_3_t_field_data[] = { - BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_3_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_34_2_0_ifa_flex_md_3_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_FLEX_MD_3_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_34_2_0_ifa_flex_md_3_t_field_data, -}; - - -static int32_t bcmpkt_ifa_header_t_flags_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 8, 8); - - return ret; -} - -static int32_t bcmpkt_ifa_header_t_flags_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 8, 8, val); - return ret; -} - -static int32_t bcmpkt_ifa_header_t_gns_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 4); - - return ret; -} - -static int32_t bcmpkt_ifa_header_t_gns_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 4, val); - return ret; -} - -static int32_t bcmpkt_ifa_header_t_max_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 8); - - return ret; -} - -static int32_t bcmpkt_ifa_header_t_max_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 8, val); - return ret; -} - -static int32_t bcmpkt_ifa_header_t_next_hdr_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_ifa_header_t_next_hdr_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_ifa_header_t_ver_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 28, 4); - - return ret; -} - -static int32_t bcmpkt_ifa_header_t_ver_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 28, 4, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_34_2_0_ifa_header_t_fget[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = { - bcmpkt_ifa_header_t_flags_get, - bcmpkt_ifa_header_t_gns_get, - bcmpkt_ifa_header_t_max_length_get, - bcmpkt_ifa_header_t_next_hdr_get, - bcmpkt_ifa_header_t_ver_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_34_2_0_ifa_header_t_fset[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = { - bcmpkt_ifa_header_t_flags_set, - bcmpkt_ifa_header_t_gns_set, - bcmpkt_ifa_header_t_max_length_set, - bcmpkt_ifa_header_t_next_hdr_set, - bcmpkt_ifa_header_t_ver_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_34_2_0_ifa_header_t_field_data[] = { - BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_34_2_0_ifa_header_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_34_2_0_ifa_header_t_field_data, -}; - - -static int32_t bcmpkt_ifa_md_base_t_action_vector_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_ifa_md_base_t_action_vector_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_ifa_md_base_t_hop_limit_current_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_ifa_md_base_t_hop_limit_current_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_ifa_md_base_t_request_vector_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_ifa_md_base_t_request_vector_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_34_2_0_ifa_md_base_t_fget[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT] = { - bcmpkt_ifa_md_base_t_action_vector_get, - bcmpkt_ifa_md_base_t_hop_limit_current_length_get, - bcmpkt_ifa_md_base_t_request_vector_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_34_2_0_ifa_md_base_t_fset[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT] = { - bcmpkt_ifa_md_base_t_action_vector_set, - bcmpkt_ifa_md_base_t_hop_limit_current_length_set, - bcmpkt_ifa_md_base_t_request_vector_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_34_2_0_ifa_md_base_t_field_data[] = { - BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_MD_BASE_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_34_2_0_ifa_md_base_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_MD_BASE_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_34_2_0_ifa_md_base_t_field_data, -}; - - -static int32_t bcmpkt_ifa_metadata_t_action_vector_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_t_action_vector_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_ifa_metadata_t_hop_limit_current_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_t_hop_limit_current_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_ifa_metadata_t_metadata_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_t_metadata_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_t_request_vector_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_t_request_vector_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_34_2_0_ifa_metadata_t_fget[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_METADATA_T_FID_COUNT] = { - bcmpkt_ifa_metadata_t_action_vector_get, - bcmpkt_ifa_metadata_t_hop_limit_current_length_get, - bcmpkt_ifa_metadata_t_metadata_get, - bcmpkt_ifa_metadata_t_request_vector_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_34_2_0_ifa_metadata_t_fset[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_METADATA_T_FID_COUNT] = { - bcmpkt_ifa_metadata_t_action_vector_set, - bcmpkt_ifa_metadata_t_hop_limit_current_length_set, - bcmpkt_ifa_metadata_t_metadata_set, - bcmpkt_ifa_metadata_t_request_vector_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_34_2_0_ifa_metadata_t_field_data[] = { - BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_METADATA_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_34_2_0_ifa_metadata_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IFA_METADATA_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_34_2_0_ifa_metadata_t_field_data, -}; - - -static int32_t bcmpkt_igmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_igmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_igmp_t_group_address_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_igmp_t_group_address_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_igmp_t_igmp_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_igmp_t_igmp_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_igmp_t_max_resp_time_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_igmp_t_max_resp_time_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_34_2_0_igmp_t_fget[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IGMP_T_FID_COUNT] = { - bcmpkt_igmp_t_checksum_get, - bcmpkt_igmp_t_group_address_get, - bcmpkt_igmp_t_igmp_type_get, - bcmpkt_igmp_t_max_resp_time_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_34_2_0_igmp_t_fset[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IGMP_T_FID_COUNT] = { - bcmpkt_igmp_t_checksum_set, - bcmpkt_igmp_t_group_address_set, - bcmpkt_igmp_t_igmp_type_set, - bcmpkt_igmp_t_max_resp_time_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_34_2_0_igmp_t_field_data[] = { - BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_34_2_0_igmp_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IGMP_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_34_2_0_igmp_t_field_data, -}; - - -static int32_t bcmpkt_ipfix_t_export_time_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipfix_t_export_time_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipfix_t_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_ipfix_t_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_ipfix_t_obs_domain_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipfix_t_obs_domain_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipfix_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipfix_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipfix_t_version_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_ipfix_t_version_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_34_2_0_ipfix_t_fget[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IPFIX_T_FID_COUNT] = { - bcmpkt_ipfix_t_export_time_get, - bcmpkt_ipfix_t_length_get, - bcmpkt_ipfix_t_obs_domain_id_get, - bcmpkt_ipfix_t_sequence_num_get, - bcmpkt_ipfix_t_version_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_34_2_0_ipfix_t_fset[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IPFIX_T_FID_COUNT] = { - bcmpkt_ipfix_t_export_time_set, - bcmpkt_ipfix_t_length_set, - bcmpkt_ipfix_t_obs_domain_id_set, - bcmpkt_ipfix_t_sequence_num_set, - bcmpkt_ipfix_t_version_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_34_2_0_ipfix_t_field_data[] = { - BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_34_2_0_ipfix_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IPFIX_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_34_2_0_ipfix_t_field_data, -}; - - -static int32_t bcmpkt_ipv4_t_da_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv4_t_da_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv4_t_flags_frag_offset_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 16); - - return ret; -} - -static int32_t bcmpkt_ipv4_t_flags_frag_offset_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_ipv4_t_hdr_checksum_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 0, 16); - - return ret; -} - -static int32_t bcmpkt_ipv4_t_hdr_checksum_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_ipv4_t_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 16); - - return ret; -} - -static int32_t bcmpkt_ipv4_t_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_ipv4_t_option_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv4_t_option_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv4_t_protocol_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 16, 8); - - return ret; -} - -static int32_t bcmpkt_ipv4_t_protocol_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_ipv4_t_sa_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv4_t_sa_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv4_t_tos_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_ipv4_t_tos_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_ipv4_t_total_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_ipv4_t_total_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_ipv4_t_ttl_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 24, 8); - - return ret; -} - -static int32_t bcmpkt_ipv4_t_ttl_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_ipv4_t_version_hdr_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_ipv4_t_version_hdr_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_34_2_0_ipv4_t_fget[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IPV4_T_FID_COUNT] = { - bcmpkt_ipv4_t_da_get, - bcmpkt_ipv4_t_flags_frag_offset_get, - bcmpkt_ipv4_t_hdr_checksum_get, - bcmpkt_ipv4_t_id_get, - bcmpkt_ipv4_t_option_get, - bcmpkt_ipv4_t_protocol_get, - bcmpkt_ipv4_t_sa_get, - bcmpkt_ipv4_t_tos_get, - bcmpkt_ipv4_t_total_length_get, - bcmpkt_ipv4_t_ttl_get, - bcmpkt_ipv4_t_version_hdr_len_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_34_2_0_ipv4_t_fset[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IPV4_T_FID_COUNT] = { - bcmpkt_ipv4_t_da_set, - bcmpkt_ipv4_t_flags_frag_offset_set, - bcmpkt_ipv4_t_hdr_checksum_set, - bcmpkt_ipv4_t_id_set, - bcmpkt_ipv4_t_option_set, - bcmpkt_ipv4_t_protocol_set, - bcmpkt_ipv4_t_sa_set, - bcmpkt_ipv4_t_tos_set, - bcmpkt_ipv4_t_total_length_set, - bcmpkt_ipv4_t_ttl_set, - bcmpkt_ipv4_t_version_hdr_len_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_34_2_0_ipv4_t_field_data[] = { - BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_34_2_0_ipv4_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IPV4_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_34_2_0_ipv4_t_field_data, -}; - - -static int32_t bcmpkt_ipv6_t_da_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv6_t_da_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv6_t_flow_label_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 20); - - return ret; -} - -static int32_t bcmpkt_ipv6_t_flow_label_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 20, val); - return ret; -} - -static int32_t bcmpkt_ipv6_t_hop_limit_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 8); - - return ret; -} - -static int32_t bcmpkt_ipv6_t_hop_limit_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 8, val); - return ret; -} - -static int32_t bcmpkt_ipv6_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 8, 8); - - return ret; -} - -static int32_t bcmpkt_ipv6_t_next_header_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 8, 8, val); - return ret; -} - -static int32_t bcmpkt_ipv6_t_payload_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 16); - - return ret; -} - -static int32_t bcmpkt_ipv6_t_payload_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_ipv6_t_sa_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv6_t_sa_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv6_t_traffic_class_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 20, 8); - - return ret; -} - -static int32_t bcmpkt_ipv6_t_traffic_class_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 20, 8, val); - return ret; -} - -static int32_t bcmpkt_ipv6_t_version_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 28, 4); - - return ret; -} - -static int32_t bcmpkt_ipv6_t_version_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 28, 4, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_34_2_0_ipv6_t_fget[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IPV6_T_FID_COUNT] = { - bcmpkt_ipv6_t_da_get, - bcmpkt_ipv6_t_flow_label_get, - bcmpkt_ipv6_t_hop_limit_get, - bcmpkt_ipv6_t_next_header_get, - bcmpkt_ipv6_t_payload_length_get, - bcmpkt_ipv6_t_sa_get, - bcmpkt_ipv6_t_traffic_class_get, - bcmpkt_ipv6_t_version_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_34_2_0_ipv6_t_fset[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IPV6_T_FID_COUNT] = { - bcmpkt_ipv6_t_da_set, - bcmpkt_ipv6_t_flow_label_set, - bcmpkt_ipv6_t_hop_limit_set, - bcmpkt_ipv6_t_next_header_set, - bcmpkt_ipv6_t_payload_length_set, - bcmpkt_ipv6_t_sa_set, - bcmpkt_ipv6_t_traffic_class_set, - bcmpkt_ipv6_t_version_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_34_2_0_ipv6_t_field_data[] = { - BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_34_2_0_ipv6_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_IPV6_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_34_2_0_ipv6_t_field_data, -}; - - -static int32_t bcmpkt_l2_t_macda_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_l2_t_macda_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_l2_t_macsa_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_l2_t_macsa_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_34_2_0_l2_t_fget[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_L2_T_FID_COUNT] = { - bcmpkt_l2_t_macda_get, - bcmpkt_l2_t_macsa_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_34_2_0_l2_t_fset[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_L2_T_FID_COUNT] = { - bcmpkt_l2_t_macda_set, - bcmpkt_l2_t_macsa_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_34_2_0_l2_t_field_data[] = { - BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_34_2_0_l2_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_L2_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_34_2_0_l2_t_field_data, -}; - - -static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_34_2_0_mirror_erspan_sn_t_fget[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { - bcmpkt_mirror_erspan_sn_t_seq_num_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_34_2_0_mirror_erspan_sn_t_fset[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { - bcmpkt_mirror_erspan_sn_t_seq_num_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_34_2_0_mirror_erspan_sn_t_field_data[] = { - BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_34_2_0_mirror_erspan_sn_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_34_2_0_mirror_erspan_sn_t_field_data, -}; - - -static int32_t bcmpkt_mirror_transport_t_data_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_mirror_transport_t_data_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_34_2_0_mirror_transport_t_fget[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { - bcmpkt_mirror_transport_t_data_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_34_2_0_mirror_transport_t_fset[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { - bcmpkt_mirror_transport_t_data_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_34_2_0_mirror_transport_t_field_data[] = { - BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_34_2_0_mirror_transport_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_34_2_0_mirror_transport_t_field_data, -}; - - -static int32_t bcmpkt_mpls_ach_t_channel_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_mpls_ach_t_channel_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_mpls_ach_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 28, 4); - - return ret; -} - -static int32_t bcmpkt_mpls_ach_t_cw_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 28, 4, val); - return ret; -} - -static int32_t bcmpkt_mpls_ach_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_mpls_ach_t_reserved_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_mpls_ach_t_version_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 4); - - return ret; -} - -static int32_t bcmpkt_mpls_ach_t_version_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 4, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_34_2_0_mpls_ach_t_fget[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = { - bcmpkt_mpls_ach_t_channel_type_get, - bcmpkt_mpls_ach_t_cw_type_get, - bcmpkt_mpls_ach_t_reserved_get, - bcmpkt_mpls_ach_t_version_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_34_2_0_mpls_ach_t_fset[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = { - bcmpkt_mpls_ach_t_channel_type_set, - bcmpkt_mpls_ach_t_cw_type_set, - bcmpkt_mpls_ach_t_reserved_set, - bcmpkt_mpls_ach_t_version_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_34_2_0_mpls_ach_t_field_data[] = { - BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_34_2_0_mpls_ach_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_ACH_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_34_2_0_mpls_ach_t_field_data, -}; - - -static int32_t bcmpkt_mpls_bv_t_value_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_mpls_bv_t_value_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_34_2_0_mpls_bv_t_fget[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_BV_T_FID_COUNT] = { - bcmpkt_mpls_bv_t_value_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_34_2_0_mpls_bv_t_fset[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_BV_T_FID_COUNT] = { - bcmpkt_mpls_bv_t_value_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_34_2_0_mpls_bv_t_field_data[] = { - BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_34_2_0_mpls_bv_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_BV_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_34_2_0_mpls_bv_t_field_data, -}; - - -static int32_t bcmpkt_mpls_cw_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 28, 4); - - return ret; -} - -static int32_t bcmpkt_mpls_cw_t_cw_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 28, 4, val); - return ret; -} - -static int32_t bcmpkt_mpls_cw_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 12); - - return ret; -} - -static int32_t bcmpkt_mpls_cw_t_reserved_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 12, val); - return ret; -} - -static int32_t bcmpkt_mpls_cw_t_seq_number_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_mpls_cw_t_seq_number_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_34_2_0_mpls_cw_t_fget[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_CW_T_FID_COUNT] = { - bcmpkt_mpls_cw_t_cw_type_get, - bcmpkt_mpls_cw_t_reserved_get, - bcmpkt_mpls_cw_t_seq_number_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_34_2_0_mpls_cw_t_fset[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_CW_T_FID_COUNT] = { - bcmpkt_mpls_cw_t_cw_type_set, - bcmpkt_mpls_cw_t_reserved_set, - bcmpkt_mpls_cw_t_seq_number_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_34_2_0_mpls_cw_t_field_data[] = { - BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_34_2_0_mpls_cw_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_CW_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_34_2_0_mpls_cw_t_field_data, -}; - - -static int32_t bcmpkt_mpls_t_bos_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 8, 1); - - return ret; -} - -static int32_t bcmpkt_mpls_t_bos_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 8, 1, val); - return ret; -} - -static int32_t bcmpkt_mpls_t_exp_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 9, 3); - - return ret; -} - -static int32_t bcmpkt_mpls_t_exp_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 9, 3, val); - return ret; -} - -static int32_t bcmpkt_mpls_t_label_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 12, 20); - - return ret; -} - -static int32_t bcmpkt_mpls_t_label_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 12, 20, val); - return ret; -} - -static int32_t bcmpkt_mpls_t_ttl_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 8); - - return ret; -} - -static int32_t bcmpkt_mpls_t_ttl_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 8, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_34_2_0_mpls_t_fget[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_T_FID_COUNT] = { - bcmpkt_mpls_t_bos_get, - bcmpkt_mpls_t_exp_get, - bcmpkt_mpls_t_label_get, - bcmpkt_mpls_t_ttl_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_34_2_0_mpls_t_fset[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_T_FID_COUNT] = { - bcmpkt_mpls_t_bos_set, - bcmpkt_mpls_t_exp_set, - bcmpkt_mpls_t_label_set, - bcmpkt_mpls_t_ttl_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_34_2_0_mpls_t_field_data[] = { - BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_34_2_0_mpls_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_MPLS_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_34_2_0_mpls_t_field_data, -}; - - -static int32_t bcmpkt_p_1588_t_cntrl_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[8], 24, 8); - - return ret; -} - -static int32_t bcmpkt_p_1588_t_cntrl_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[8], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_p_1588_t_correction_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_p_1588_t_correction_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_p_1588_t_domain_nb_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 24, 8); - - return ret; -} - -static int32_t bcmpkt_p_1588_t_domain_nb_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_p_1588_t_flags_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 16); - - return ret; -} - -static int32_t bcmpkt_p_1588_t_flags_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_p_1588_t_logmsginterval_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[8], 16, 8); - - return ret; -} - -static int32_t bcmpkt_p_1588_t_logmsginterval_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[8], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_p_1588_t_msg_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_p_1588_t_msg_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_p_1588_t_msg_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 4); - - return ret; -} - -static int32_t bcmpkt_p_1588_t_msg_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 4, val); - return ret; -} - -static int32_t bcmpkt_p_1588_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 20, 4); - - return ret; -} - -static int32_t bcmpkt_p_1588_t_reserved1_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 20, 4, val); - return ret; -} - -static int32_t bcmpkt_p_1588_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 8); - - return ret; -} - -static int32_t bcmpkt_p_1588_t_reserved2_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_p_1588_t_reserved3_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_p_1588_t_reserved3_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_p_1588_t_seq_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[7], 0, 16); - - return ret; -} - -static int32_t bcmpkt_p_1588_t_seq_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[7], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_p_1588_t_srcportid_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_p_1588_t_srcportid_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_p_1588_t_transportspec_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 28, 4); - - return ret; -} - -static int32_t bcmpkt_p_1588_t_transportspec_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 28, 4, val); - return ret; -} - -static int32_t bcmpkt_p_1588_t_version_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 4); - - return ret; -} - -static int32_t bcmpkt_p_1588_t_version_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 4, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_34_2_0_p_1588_t_fget[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_P_1588_T_FID_COUNT] = { - bcmpkt_p_1588_t_cntrl_get, - bcmpkt_p_1588_t_correction_get, - bcmpkt_p_1588_t_domain_nb_get, - bcmpkt_p_1588_t_flags_get, - bcmpkt_p_1588_t_logmsginterval_get, - bcmpkt_p_1588_t_msg_length_get, - bcmpkt_p_1588_t_msg_type_get, - bcmpkt_p_1588_t_reserved1_get, - bcmpkt_p_1588_t_reserved2_get, - bcmpkt_p_1588_t_reserved3_get, - bcmpkt_p_1588_t_seq_id_get, - bcmpkt_p_1588_t_srcportid_get, - bcmpkt_p_1588_t_transportspec_get, - bcmpkt_p_1588_t_version_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_34_2_0_p_1588_t_fset[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_P_1588_T_FID_COUNT] = { - bcmpkt_p_1588_t_cntrl_set, - bcmpkt_p_1588_t_correction_set, - bcmpkt_p_1588_t_domain_nb_set, - bcmpkt_p_1588_t_flags_set, - bcmpkt_p_1588_t_logmsginterval_set, - bcmpkt_p_1588_t_msg_length_set, - bcmpkt_p_1588_t_msg_type_set, - bcmpkt_p_1588_t_reserved1_set, - bcmpkt_p_1588_t_reserved2_set, - bcmpkt_p_1588_t_reserved3_set, - bcmpkt_p_1588_t_seq_id_set, - bcmpkt_p_1588_t_srcportid_set, - bcmpkt_p_1588_t_transportspec_set, - bcmpkt_p_1588_t_version_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_34_2_0_p_1588_t_field_data[] = { - BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_34_2_0_p_1588_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_P_1588_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_34_2_0_p_1588_t_field_data, -}; - - -static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_prog_ext_hdr_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_prog_ext_hdr_t_next_header_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_prog_ext_hdr_t_option_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_prog_ext_hdr_t_option_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_34_2_0_prog_ext_hdr_t_fget[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = { - bcmpkt_prog_ext_hdr_t_hdr_ext_len_get, - bcmpkt_prog_ext_hdr_t_next_header_get, - bcmpkt_prog_ext_hdr_t_option_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_34_2_0_prog_ext_hdr_t_fset[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = { - bcmpkt_prog_ext_hdr_t_hdr_ext_len_set, - bcmpkt_prog_ext_hdr_t_next_header_set, - bcmpkt_prog_ext_hdr_t_option_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_34_2_0_prog_ext_hdr_t_field_data[] = { - BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_34_2_0_prog_ext_hdr_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_34_2_0_prog_ext_hdr_t_field_data, -}; - - -static int32_t bcmpkt_psamp_0_t_flowset_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[3], 16, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_0_t_flowset_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[3], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_0_t_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_0_t_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_0_t_next_hop_index_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[3], 0, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_0_t_next_hop_index_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[3], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_34_2_0_psamp_0_t_fget[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_0_T_FID_COUNT] = { - bcmpkt_psamp_0_t_flowset_get, - bcmpkt_psamp_0_t_length_get, - bcmpkt_psamp_0_t_next_hop_index_get, - bcmpkt_psamp_0_t_obs_time_ns_get, - bcmpkt_psamp_0_t_obs_time_s_get, - bcmpkt_psamp_0_t_template_id_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_34_2_0_psamp_0_t_fset[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_0_T_FID_COUNT] = { - bcmpkt_psamp_0_t_flowset_set, - bcmpkt_psamp_0_t_length_set, - bcmpkt_psamp_0_t_next_hop_index_set, - bcmpkt_psamp_0_t_obs_time_ns_set, - bcmpkt_psamp_0_t_obs_time_s_set, - bcmpkt_psamp_0_t_template_id_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_34_2_0_psamp_0_t_field_data[] = { - BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_34_2_0_psamp_0_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_0_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_34_2_0_psamp_0_t_field_data, -}; - - -static int32_t bcmpkt_psamp_1_t_dlb_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 24, 8); - - return ret; -} - -static int32_t bcmpkt_psamp_1_t_dlb_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_psamp_1_t_egress_port_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_1_t_egress_port_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_1_t_epoch_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_1_t_epoch_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_1_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_1_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_1_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 0, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_1_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_1_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_1_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_1_t_variable_flag_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 16, 8); - - return ret; -} - -static int32_t bcmpkt_psamp_1_t_variable_flag_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 16, 8, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_34_2_0_psamp_1_t_fget[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_1_T_FID_COUNT] = { - bcmpkt_psamp_1_t_dlb_id_get, - bcmpkt_psamp_1_t_egress_port_get, - bcmpkt_psamp_1_t_epoch_get, - bcmpkt_psamp_1_t_ingress_port_get, - bcmpkt_psamp_1_t_sampled_length_get, - bcmpkt_psamp_1_t_user_meta_data_get, - bcmpkt_psamp_1_t_variable_flag_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_34_2_0_psamp_1_t_fset[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_1_T_FID_COUNT] = { - bcmpkt_psamp_1_t_dlb_id_set, - bcmpkt_psamp_1_t_egress_port_set, - bcmpkt_psamp_1_t_epoch_set, - bcmpkt_psamp_1_t_ingress_port_set, - bcmpkt_psamp_1_t_sampled_length_set, - bcmpkt_psamp_1_t_user_meta_data_set, - bcmpkt_psamp_1_t_variable_flag_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_34_2_0_psamp_1_t_field_data[] = { - BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_34_2_0_psamp_1_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_1_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_34_2_0_psamp_1_t_field_data, -}; - - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[4], 16, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[4], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[4], 0, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[4], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_34_2_0_psamp_mirror_on_drop_0_t_fget[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { - bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get, - bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get, - bcmpkt_psamp_mirror_on_drop_0_t_length_get, - bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get, - bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get, - bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get, - bcmpkt_psamp_mirror_on_drop_0_t_template_id_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_34_2_0_psamp_mirror_on_drop_0_t_fset[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { - bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set, - bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set, - bcmpkt_psamp_mirror_on_drop_0_t_length_set, - bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set, - bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set, - bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set, - bcmpkt_psamp_mirror_on_drop_0_t_template_id_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_34_2_0_psamp_mirror_on_drop_0_t_field_data[] = { - BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_34_2_0_psamp_mirror_on_drop_0_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_34_2_0_psamp_mirror_on_drop_0_t_field_data, -}; - - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_mod_state_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 22, 2); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_mod_state_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 22, 2, val); - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 6); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 6, val); - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 24, 8); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 8); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 8, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_34_2_0_psamp_mirror_on_drop_3_t_fget[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = { - bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get, - bcmpkt_psamp_mirror_on_drop_3_t_mod_state_get, - bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get, - bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get, - bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get, - bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get, - bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_34_2_0_psamp_mirror_on_drop_3_t_fset[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = { - bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set, - bcmpkt_psamp_mirror_on_drop_3_t_mod_state_set, - bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set, - bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set, - bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set, - bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set, - bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_34_2_0_psamp_mirror_on_drop_3_t_field_data[] = { - BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_34_2_0_psamp_mirror_on_drop_3_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_34_2_0_psamp_mirror_on_drop_3_t_field_data, -}; - - -static int32_t bcmpkt_rarp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 24, 8); - - return ret; -} - -static int32_t bcmpkt_rarp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_rarp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_rarp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_rarp_t_operation_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 16); - - return ret; -} - -static int32_t bcmpkt_rarp_t_operation_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_rarp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 8); - - return ret; -} - -static int32_t bcmpkt_rarp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_rarp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_rarp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_rarp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_rarp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_rarp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_rarp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_rarp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_rarp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_rarp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_rarp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_34_2_0_rarp_t_fget[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RARP_T_FID_COUNT] = { - bcmpkt_rarp_t_hardware_len_get, - bcmpkt_rarp_t_hardware_type_get, - bcmpkt_rarp_t_operation_get, - bcmpkt_rarp_t_prot_addr_len_get, - bcmpkt_rarp_t_protocol_type_get, - bcmpkt_rarp_t_sender_ha_get, - bcmpkt_rarp_t_sender_ip_get, - bcmpkt_rarp_t_target_ha_get, - bcmpkt_rarp_t_target_ip_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_34_2_0_rarp_t_fset[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RARP_T_FID_COUNT] = { - bcmpkt_rarp_t_hardware_len_set, - bcmpkt_rarp_t_hardware_type_set, - bcmpkt_rarp_t_operation_set, - bcmpkt_rarp_t_prot_addr_len_set, - bcmpkt_rarp_t_protocol_type_set, - bcmpkt_rarp_t_sender_ha_set, - bcmpkt_rarp_t_sender_ip_set, - bcmpkt_rarp_t_target_ha_set, - bcmpkt_rarp_t_target_ip_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_34_2_0_rarp_t_field_data[] = { - BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_34_2_0_rarp_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RARP_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_34_2_0_rarp_t_field_data, -}; - - -static int32_t bcmpkt_routing_t_data_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_routing_t_data_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_routing_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_routing_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_routing_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_routing_t_next_header_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_routing_t_routing_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 8, 8); - - return ret; -} - -static int32_t bcmpkt_routing_t_routing_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 8, 8, val); - return ret; -} - -static int32_t bcmpkt_routing_t_segments_left_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 8); - - return ret; -} - -static int32_t bcmpkt_routing_t_segments_left_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 8, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_34_2_0_routing_t_fget[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ROUTING_T_FID_COUNT] = { - bcmpkt_routing_t_data_get, - bcmpkt_routing_t_hdr_ext_len_get, - bcmpkt_routing_t_next_header_get, - bcmpkt_routing_t_routing_type_get, - bcmpkt_routing_t_segments_left_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_34_2_0_routing_t_fset[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ROUTING_T_FID_COUNT] = { - bcmpkt_routing_t_data_set, - bcmpkt_routing_t_hdr_ext_len_set, - bcmpkt_routing_t_next_header_set, - bcmpkt_routing_t_routing_type_set, - bcmpkt_routing_t_segments_left_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_34_2_0_routing_t_field_data[] = { - BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_34_2_0_routing_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_ROUTING_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_34_2_0_routing_t_field_data, -}; - - -static int32_t bcmpkt_rspan_t_tag_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_rspan_t_tag_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_rspan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_rspan_t_tpid_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_34_2_0_rspan_t_fget[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RSPAN_T_FID_COUNT] = { - bcmpkt_rspan_t_tag_get, - bcmpkt_rspan_t_tpid_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_34_2_0_rspan_t_fset[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RSPAN_T_FID_COUNT] = { - bcmpkt_rspan_t_tag_set, - bcmpkt_rspan_t_tpid_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_34_2_0_rspan_t_field_data[] = { - BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_34_2_0_rspan_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_RSPAN_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_34_2_0_rspan_t_field_data, -}; - - -static int32_t bcmpkt_sflow_shim_0_t_sys_destination_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 16); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_0_t_sys_destination_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_sflow_shim_0_t_sys_source_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 16); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_0_t_sys_source_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_sflow_shim_0_t_version_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_sflow_shim_0_t_version_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_34_2_0_sflow_shim_0_t_fget[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { - bcmpkt_sflow_shim_0_t_sys_destination_get, - bcmpkt_sflow_shim_0_t_sys_source_get, - bcmpkt_sflow_shim_0_t_version_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_34_2_0_sflow_shim_0_t_fset[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { - bcmpkt_sflow_shim_0_t_sys_destination_set, - bcmpkt_sflow_shim_0_t_sys_source_set, - bcmpkt_sflow_shim_0_t_version_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_34_2_0_sflow_shim_0_t_field_data[] = { - BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_34_2_0_sflow_shim_0_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_34_2_0_sflow_shim_0_t_field_data, -}; - - -static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 30, 1); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 30, 1, val); - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 27, 1); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 27, 1, val); - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 29, 1); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 29, 1, val); - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 28, 1); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 28, 1, val); - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 31, 1); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 31, 1, val); - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 26, 1); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 26, 1, val); - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 7); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_reserved_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 7, val); - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 23, 3); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 23, 3, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_34_2_0_sflow_shim_1_t_fget[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { - bcmpkt_sflow_shim_1_t_flag_dest_sample_get, - bcmpkt_sflow_shim_1_t_flag_discarded_get, - bcmpkt_sflow_shim_1_t_flag_flex_sample_get, - bcmpkt_sflow_shim_1_t_flag_mcast_get, - bcmpkt_sflow_shim_1_t_flag_src_sample_get, - bcmpkt_sflow_shim_1_t_flag_truncated_get, - bcmpkt_sflow_shim_1_t_reserved_get, - bcmpkt_sflow_shim_1_t_sys_opcode_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_34_2_0_sflow_shim_1_t_fset[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { - bcmpkt_sflow_shim_1_t_flag_dest_sample_set, - bcmpkt_sflow_shim_1_t_flag_discarded_set, - bcmpkt_sflow_shim_1_t_flag_flex_sample_set, - bcmpkt_sflow_shim_1_t_flag_mcast_set, - bcmpkt_sflow_shim_1_t_flag_src_sample_set, - bcmpkt_sflow_shim_1_t_flag_truncated_set, - bcmpkt_sflow_shim_1_t_reserved_set, - bcmpkt_sflow_shim_1_t_sys_opcode_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_34_2_0_sflow_shim_1_t_field_data[] = { - BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_34_2_0_sflow_shim_1_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_34_2_0_sflow_shim_1_t_field_data, -}; - - -static int32_t bcmpkt_sflow_shim_2_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_sflow_shim_2_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_34_2_0_sflow_shim_2_t_fget[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { - bcmpkt_sflow_shim_2_t_sequence_num_get, - bcmpkt_sflow_shim_2_t_user_meta_data_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_34_2_0_sflow_shim_2_t_fset[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { - bcmpkt_sflow_shim_2_t_sequence_num_set, - bcmpkt_sflow_shim_2_t_user_meta_data_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_34_2_0_sflow_shim_2_t_field_data[] = { - BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_34_2_0_sflow_shim_2_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_34_2_0_sflow_shim_2_t_field_data, -}; - - -static int32_t bcmpkt_snap_llc_t_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_snap_llc_t_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_snap_llc_t_snap_llc_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_snap_llc_t_snap_llc_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_34_2_0_snap_llc_t_fget[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = { - bcmpkt_snap_llc_t_length_get, - bcmpkt_snap_llc_t_snap_llc_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_34_2_0_snap_llc_t_fset[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = { - bcmpkt_snap_llc_t_length_set, - bcmpkt_snap_llc_t_snap_llc_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_34_2_0_snap_llc_t_field_data[] = { - BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_34_2_0_snap_llc_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_SNAP_LLC_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_34_2_0_snap_llc_t_field_data, -}; - - -static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_tcp_first_4bytes_t_src_port_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_tcp_first_4bytes_t_src_port_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_34_2_0_tcp_first_4bytes_t_fget[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { - bcmpkt_tcp_first_4bytes_t_dst_port_get, - bcmpkt_tcp_first_4bytes_t_src_port_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_34_2_0_tcp_first_4bytes_t_fset[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { - bcmpkt_tcp_first_4bytes_t_dst_port_set, - bcmpkt_tcp_first_4bytes_t_src_port_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_34_2_0_tcp_first_4bytes_t_field_data[] = { - BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_34_2_0_tcp_first_4bytes_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_34_2_0_tcp_first_4bytes_t_field_data, -}; - - -static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[3], 16, 16); - - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_checksum_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[3], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 16, 16); - - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[3], 0, 16); - - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[3], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_win_size_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 0, 16); - - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_win_size_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 0, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_34_2_0_tcp_last_16bytes_t_fget[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { - bcmpkt_tcp_last_16bytes_t_ack_num_get, - bcmpkt_tcp_last_16bytes_t_checksum_get, - bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get, - bcmpkt_tcp_last_16bytes_t_seq_num_get, - bcmpkt_tcp_last_16bytes_t_urgent_ptr_get, - bcmpkt_tcp_last_16bytes_t_win_size_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_34_2_0_tcp_last_16bytes_t_fset[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { - bcmpkt_tcp_last_16bytes_t_ack_num_set, - bcmpkt_tcp_last_16bytes_t_checksum_set, - bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set, - bcmpkt_tcp_last_16bytes_t_seq_num_set, - bcmpkt_tcp_last_16bytes_t_urgent_ptr_set, - bcmpkt_tcp_last_16bytes_t_win_size_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_34_2_0_tcp_last_16bytes_t_field_data[] = { - BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_34_2_0_tcp_last_16bytes_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_34_2_0_tcp_last_16bytes_t_field_data, -}; - - -static int32_t bcmpkt_udp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 16); - - return ret; -} - -static int32_t bcmpkt_udp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_udp_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_udp_t_dst_port_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_udp_t_src_port_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_udp_t_src_port_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_udp_t_udp_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 16); - - return ret; -} - -static int32_t bcmpkt_udp_t_udp_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_34_2_0_udp_t_fget[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_UDP_T_FID_COUNT] = { - bcmpkt_udp_t_checksum_get, - bcmpkt_udp_t_dst_port_get, - bcmpkt_udp_t_src_port_get, - bcmpkt_udp_t_udp_length_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_34_2_0_udp_t_fset[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_UDP_T_FID_COUNT] = { - bcmpkt_udp_t_checksum_set, - bcmpkt_udp_t_dst_port_set, - bcmpkt_udp_t_src_port_set, - bcmpkt_udp_t_udp_length_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_34_2_0_udp_t_field_data[] = { - BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_34_2_0_udp_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_UDP_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_34_2_0_udp_t_field_data, -}; - - -static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_34_2_0_unknown_l3_t_fget[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { - bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get, - bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_34_2_0_unknown_l3_t_fset[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { - bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set, - bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_34_2_0_unknown_l3_t_field_data[] = { - BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_34_2_0_unknown_l3_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_34_2_0_unknown_l3_t_field_data, -}; - - -static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_34_2_0_unknown_l4_t_fget[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { - bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_34_2_0_unknown_l4_t_fset[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { - bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_34_2_0_unknown_l4_t_field_data[] = { - BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_34_2_0_unknown_l4_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_34_2_0_unknown_l4_t_field_data, -}; - - -static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_34_2_0_unknown_l5_t_fget[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { - bcmpkt_unknown_l5_t_l5_bytes_0_1_get, - bcmpkt_unknown_l5_t_l5_bytes_2_3_get, - bcmpkt_unknown_l5_t_l5_bytes_4_7_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_34_2_0_unknown_l5_t_fset[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { - bcmpkt_unknown_l5_t_l5_bytes_0_1_set, - bcmpkt_unknown_l5_t_l5_bytes_2_3_set, - bcmpkt_unknown_l5_t_l5_bytes_4_7_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_34_2_0_unknown_l5_t_field_data[] = { - BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_34_2_0_unknown_l5_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_34_2_0_unknown_l5_t_field_data, -}; - - -static int32_t bcmpkt_vlan_t_cfi_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 12, 1); - - return ret; -} - -static int32_t bcmpkt_vlan_t_cfi_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 12, 1, val); - return ret; -} - -static int32_t bcmpkt_vlan_t_pcp_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 13, 3); - - return ret; -} - -static int32_t bcmpkt_vlan_t_pcp_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 13, 3, val); - return ret; -} - -static int32_t bcmpkt_vlan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_vlan_t_tpid_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_vlan_t_vid_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 12); - - return ret; -} - -static int32_t bcmpkt_vlan_t_vid_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 12, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_34_2_0_vlan_t_fget[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_VLAN_T_FID_COUNT] = { - bcmpkt_vlan_t_cfi_get, - bcmpkt_vlan_t_pcp_get, - bcmpkt_vlan_t_tpid_get, - bcmpkt_vlan_t_vid_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_34_2_0_vlan_t_fset[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_VLAN_T_FID_COUNT] = { - bcmpkt_vlan_t_cfi_set, - bcmpkt_vlan_t_pcp_set, - bcmpkt_vlan_t_tpid_set, - bcmpkt_vlan_t_vid_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_34_2_0_vlan_t_field_data[] = { - BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_34_2_0_vlan_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_VLAN_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_34_2_0_vlan_t_field_data, -}; - - -static int32_t bcmpkt_vntag_t_tag_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_vntag_t_tag_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_vntag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_vntag_t_tpid_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_34_2_0_vntag_t_fget[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_VNTAG_T_FID_COUNT] = { - bcmpkt_vntag_t_tag_get, - bcmpkt_vntag_t_tpid_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_34_2_0_vntag_t_fset[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_VNTAG_T_FID_COUNT] = { - bcmpkt_vntag_t_tag_set, - bcmpkt_vntag_t_tpid_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_34_2_0_vntag_t_field_data[] = { - BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_34_2_0_vntag_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_VNTAG_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_34_2_0_vntag_t_field_data, -}; - - -static int32_t bcmpkt_vxlan_t_flags_reserved_1_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_vxlan_t_flags_reserved_1_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_vxlan_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 8); - - return ret; -} - -static int32_t bcmpkt_vxlan_t_reserved2_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 8, val); - return ret; -} - -static int32_t bcmpkt_vxlan_t_vn_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 8, 24); - - return ret; -} - -static int32_t bcmpkt_vxlan_t_vn_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 8, 24, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_34_2_0_vxlan_t_fget[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_VXLAN_T_FID_COUNT] = { - bcmpkt_vxlan_t_flags_reserved_1_get, - bcmpkt_vxlan_t_reserved2_get, - bcmpkt_vxlan_t_vn_id_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_34_2_0_vxlan_t_fset[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_VXLAN_T_FID_COUNT] = { - bcmpkt_vxlan_t_flags_reserved_1_set, - bcmpkt_vxlan_t_reserved2_set, - bcmpkt_vxlan_t_vn_id_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_34_2_0_vxlan_t_field_data[] = { - BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_34_2_0_vxlan_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_VXLAN_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_34_2_0_vxlan_t_field_data, -}; - - -static int32_t bcmpkt_wesp_t_flags_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 8); - - return ret; -} - -static int32_t bcmpkt_wesp_t_flags_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 8, val); - return ret; -} - -static int32_t bcmpkt_wesp_t_header_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_wesp_t_header_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_wesp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_wesp_t_next_header_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_wesp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_wesp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_wesp_t_spi_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_wesp_t_spi_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_wesp_t_trailer_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 8, 8); - - return ret; -} - -static int32_t bcmpkt_wesp_t_trailer_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 8, 8, val); - return ret; -} - -static int32_t bcmpkt_wesp_t_wesp_iv_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_wesp_t_wesp_iv_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_hna_6_5_34_2_0_wesp_t_fget[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_WESP_T_FID_COUNT] = { - bcmpkt_wesp_t_flags_get, - bcmpkt_wesp_t_header_len_get, - bcmpkt_wesp_t_next_header_get, - bcmpkt_wesp_t_seq_num_get, - bcmpkt_wesp_t_spi_get, - bcmpkt_wesp_t_trailer_len_get, - bcmpkt_wesp_t_wesp_iv_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_hna_6_5_34_2_0_wesp_t_fset[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_WESP_T_FID_COUNT] = { - bcmpkt_wesp_t_flags_set, - bcmpkt_wesp_t_header_len_set, - bcmpkt_wesp_t_next_header_set, - bcmpkt_wesp_t_seq_num_set, - bcmpkt_wesp_t_spi_set, - bcmpkt_wesp_t_trailer_len_set, - bcmpkt_wesp_t_wesp_iv_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_hna_6_5_34_2_0_wesp_t_field_data[] = { - BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_hna_6_5_34_2_0_wesp_t_field_info = { - .num_fields = BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_WESP_T_FID_COUNT, - .info = bcm56880_a0_hna_6_5_34_2_0_wesp_t_field_data, -}; - -static bcmpkt_flex_pmd_info_t bcm56880_a0_hna_6_5_34_2_0_flexhdr_info_list[BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_FLEXHDR_COUNT] = { - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_34_2_0_arp_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_34_2_0_arp_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_34_2_0_arp_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_34_2_0_authen_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_34_2_0_authen_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_34_2_0_authen_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_34_2_0_bfd_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_34_2_0_bfd_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_34_2_0_bfd_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_34_2_0_cntag_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_34_2_0_cntag_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_34_2_0_cntag_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_34_2_0_cpu_composites_0_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_34_2_0_cpu_composites_0_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_34_2_0_cpu_composites_0_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_34_2_0_cpu_composites_1_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_34_2_0_cpu_composites_1_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_34_2_0_cpu_composites_1_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_34_2_0_dest_option_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_34_2_0_dest_option_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_34_2_0_dest_option_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_34_2_0_erspan3_fixed_hdr_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_34_2_0_erspan3_fixed_hdr_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_34_2_0_erspan3_fixed_hdr_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_34_2_0_erspan3_subhdr_5_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_34_2_0_erspan3_subhdr_5_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_34_2_0_erspan3_subhdr_5_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_34_2_0_esp_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_34_2_0_esp_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_34_2_0_esp_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_34_2_0_etag_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_34_2_0_etag_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_34_2_0_etag_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_34_2_0_ethertype_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_34_2_0_ethertype_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_34_2_0_ethertype_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_34_2_0_frag_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_34_2_0_frag_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_34_2_0_frag_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_34_2_0_generic_loopback_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_34_2_0_generic_loopback_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_34_2_0_generic_loopback_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_34_2_0_gpe_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_34_2_0_gpe_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_34_2_0_gpe_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_34_2_0_gre_chksum_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_34_2_0_gre_chksum_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_34_2_0_gre_chksum_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_34_2_0_gre_key_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_34_2_0_gre_key_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_34_2_0_gre_key_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_34_2_0_gre_rout_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_34_2_0_gre_rout_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_34_2_0_gre_rout_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_34_2_0_gre_seq_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_34_2_0_gre_seq_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_34_2_0_gre_seq_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_34_2_0_gre_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_34_2_0_gre_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_34_2_0_gre_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_34_2_0_hop_by_hop_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_34_2_0_hop_by_hop_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_34_2_0_hop_by_hop_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_34_2_0_icmp_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_34_2_0_icmp_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_34_2_0_icmp_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_34_2_0_ifa_flex_md_0_a_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_34_2_0_ifa_flex_md_0_a_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_34_2_0_ifa_flex_md_0_a_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_34_2_0_ifa_flex_md_0_b_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_34_2_0_ifa_flex_md_0_b_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_34_2_0_ifa_flex_md_0_b_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_34_2_0_ifa_flex_md_1_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_34_2_0_ifa_flex_md_1_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_34_2_0_ifa_flex_md_1_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_34_2_0_ifa_flex_md_2_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_34_2_0_ifa_flex_md_2_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_34_2_0_ifa_flex_md_2_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_34_2_0_ifa_flex_md_3_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_34_2_0_ifa_flex_md_3_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_34_2_0_ifa_flex_md_3_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_34_2_0_ifa_header_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_34_2_0_ifa_header_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_34_2_0_ifa_header_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_34_2_0_ifa_md_base_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_34_2_0_ifa_md_base_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_34_2_0_ifa_md_base_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_34_2_0_ifa_metadata_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_34_2_0_ifa_metadata_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_34_2_0_ifa_metadata_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_34_2_0_igmp_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_34_2_0_igmp_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_34_2_0_igmp_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_34_2_0_ipfix_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_34_2_0_ipfix_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_34_2_0_ipfix_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_34_2_0_ipv4_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_34_2_0_ipv4_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_34_2_0_ipv4_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_34_2_0_ipv6_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_34_2_0_ipv6_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_34_2_0_ipv6_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_34_2_0_l2_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_34_2_0_l2_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_34_2_0_l2_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_34_2_0_mirror_erspan_sn_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_34_2_0_mirror_erspan_sn_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_34_2_0_mirror_erspan_sn_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_34_2_0_mirror_transport_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_34_2_0_mirror_transport_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_34_2_0_mirror_transport_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_34_2_0_mpls_ach_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_34_2_0_mpls_ach_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_34_2_0_mpls_ach_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_34_2_0_mpls_bv_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_34_2_0_mpls_bv_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_34_2_0_mpls_bv_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_34_2_0_mpls_cw_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_34_2_0_mpls_cw_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_34_2_0_mpls_cw_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_34_2_0_mpls_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_34_2_0_mpls_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_34_2_0_mpls_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_34_2_0_p_1588_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_34_2_0_p_1588_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_34_2_0_p_1588_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_34_2_0_prog_ext_hdr_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_34_2_0_prog_ext_hdr_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_34_2_0_prog_ext_hdr_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_34_2_0_psamp_0_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_34_2_0_psamp_0_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_34_2_0_psamp_0_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_34_2_0_psamp_1_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_34_2_0_psamp_1_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_34_2_0_psamp_1_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_34_2_0_psamp_mirror_on_drop_0_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_34_2_0_psamp_mirror_on_drop_0_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_34_2_0_psamp_mirror_on_drop_0_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_34_2_0_psamp_mirror_on_drop_3_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_34_2_0_psamp_mirror_on_drop_3_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_34_2_0_psamp_mirror_on_drop_3_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_34_2_0_rarp_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_34_2_0_rarp_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_34_2_0_rarp_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_34_2_0_routing_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_34_2_0_routing_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_34_2_0_routing_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_34_2_0_rspan_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_34_2_0_rspan_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_34_2_0_rspan_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_34_2_0_sflow_shim_0_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_34_2_0_sflow_shim_0_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_34_2_0_sflow_shim_0_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_34_2_0_sflow_shim_1_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_34_2_0_sflow_shim_1_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_34_2_0_sflow_shim_1_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_34_2_0_sflow_shim_2_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_34_2_0_sflow_shim_2_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_34_2_0_sflow_shim_2_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_34_2_0_snap_llc_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_34_2_0_snap_llc_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_34_2_0_snap_llc_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_34_2_0_tcp_first_4bytes_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_34_2_0_tcp_first_4bytes_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_34_2_0_tcp_first_4bytes_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_34_2_0_tcp_last_16bytes_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_34_2_0_tcp_last_16bytes_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_34_2_0_tcp_last_16bytes_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_34_2_0_udp_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_34_2_0_udp_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_34_2_0_udp_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_34_2_0_unknown_l3_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_34_2_0_unknown_l3_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_34_2_0_unknown_l3_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_34_2_0_unknown_l4_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_34_2_0_unknown_l4_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_34_2_0_unknown_l4_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_34_2_0_unknown_l5_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_34_2_0_unknown_l5_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_34_2_0_unknown_l5_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_34_2_0_vlan_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_34_2_0_vlan_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_34_2_0_vlan_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_34_2_0_vntag_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_34_2_0_vntag_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_34_2_0_vntag_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_34_2_0_vxlan_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_34_2_0_vxlan_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_34_2_0_vxlan_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_34_2_0_wesp_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_hna_6_5_34_2_0_wesp_t_fget, - .flex_fset = bcm56880_a0_hna_6_5_34_2_0_wesp_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_hna_6_5_34_2_0_rxpmd_flex_field_info, - .reasons_info = &bcm56880_a0_hna_6_5_34_2_0_rxpmd_flex_reasons_info, - .flex_common_fget = bcm56880_a0_rxpmd_flex_fget, - .flex_common_fset = bcm56880_a0_rxpmd_flex_fset, - }, -}; - -static shr_enum_map_t bcm56880_a0_hna_6_5_34_2_0_flexhdr_id_map[] = { - BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_FLEXHDR_NAME_MAP_INIT -}; - -shr_enum_map_t * bcm56880_a0_hna_6_5_34_2_0_flexhdr_map_get(void) -{ - return bcm56880_a0_hna_6_5_34_2_0_flexhdr_id_map; -} - -bcmpkt_flex_pmd_info_t * bcm56880_a0_hna_6_5_34_2_0_flex_pmd_info_get(uint32_t hid) -{ - if (hid >= BCM56880_A0_HNA_6_5_34_2_0_BCMPKT_FLEXHDR_COUNT) { - return NULL; - } - - return &bcm56880_a0_hna_6_5_34_2_0_flexhdr_info_list[hid]; -} - -int bcm56880_a0_hna_6_5_34_2_0_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = { - 13, - -1, - -1, - 64, -}; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_34_3_0/bcm56880_a0_nfa_6_5_34_3_0_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_34_3_0/bcm56880_a0_nfa_6_5_34_3_0_bcmpkt_rxpmd_match_id.c deleted file mode 100644 index e9004f536e8..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_34_3_0/bcm56880_a0_nfa_6_5_34_3_0_bcmpkt_rxpmd_match_id.c +++ /dev/null @@ -1,2633 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) bcm56880_a0_nfa_6_5_34_3_0_sf_match_id_info.yml - * for device bcm56880_a0 and variant nfa_6_5_34_3_0. - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - - -#include -#include - - -static bcmpkt_rxpmd_match_id_db_t -bcm56880_a0_nfa_6_5_34_3_0_rxpmd_match_id_db[BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_COUNT] = { - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ETAG */ - .name = "EGRESS_PKT_FWD_L2_HDR_ETAG", - .match = 0x80, - .match_mask = 0xc0, - .match_maxbit = 30, - .match_minbit = 23, - .maxbit = 7, - .minbit = 6, - .value = 0x2, - .pmaxbit = 42, - .pminbit = 35, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */ - .name = "EGRESS_PKT_FWD_L2_HDR_ITAG", - .match = 0x10, - .match_mask = 0x10, - .match_maxbit = 30, - .match_minbit = 23, - .maxbit = 4, - .minbit = 4, - .value = 0x1, - .pmaxbit = 42, - .pminbit = 35, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */ - .name = "EGRESS_PKT_FWD_L2_HDR_L2", - .match = 0x1, - .match_mask = 0x1, - .match_maxbit = 30, - .match_minbit = 23, - .maxbit = 0, - .minbit = 0, - .value = 0x1, - .pmaxbit = 42, - .pminbit = 35, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */ - .name = "EGRESS_PKT_FWD_L2_HDR_NONE", - .match = 0x0, - .match_mask = 0xff, - .match_maxbit = 30, - .match_minbit = 23, - .maxbit = 7, - .minbit = 0, - .value = 0x0, - .pmaxbit = 42, - .pminbit = 35, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OPAQUETAG */ - .name = "EGRESS_PKT_FWD_L2_HDR_OPAQUETAG", - .match = 0x20, - .match_mask = 0x20, - .match_maxbit = 30, - .match_minbit = 23, - .maxbit = 5, - .minbit = 5, - .value = 0x1, - .pmaxbit = 42, - .pminbit = 35, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */ - .name = "EGRESS_PKT_FWD_L2_HDR_OTAG", - .match = 0x8, - .match_mask = 0x8, - .match_maxbit = 30, - .match_minbit = 23, - .maxbit = 3, - .minbit = 3, - .value = 0x1, - .pmaxbit = 42, - .pminbit = 35, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_RSPAN */ - .name = "EGRESS_PKT_FWD_L2_HDR_RSPAN", - .match = 0x4, - .match_mask = 0x4, - .match_maxbit = 30, - .match_minbit = 23, - .maxbit = 2, - .minbit = 2, - .value = 0x1, - .pmaxbit = 42, - .pminbit = 35, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC */ - .name = "EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", - .match = 0x2, - .match_mask = 0x2, - .match_maxbit = 30, - .match_minbit = 23, - .maxbit = 1, - .minbit = 1, - .value = 0x1, - .pmaxbit = 42, - .pminbit = 35, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VNTAG */ - .name = "EGRESS_PKT_FWD_L2_HDR_VNTAG", - .match = 0x40, - .match_mask = 0xc0, - .match_maxbit = 30, - .match_minbit = 23, - .maxbit = 7, - .minbit = 6, - .value = 0x1, - .pmaxbit = 42, - .pminbit = 35, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_ARP", - .match = 0x8, - .match_mask = 0x58, - .match_maxbit = 44, - .match_minbit = 31, - .maxbit = 4, - .minbit = 3, - .value = 0x1, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", - .match = 0x180, - .match_mask = 0x1c0, - .match_maxbit = 44, - .match_minbit = 31, - .maxbit = 8, - .minbit = 7, - .value = 0x3, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", - .match = 0x418, - .match_mask = 0x658, - .match_maxbit = 44, - .match_minbit = 31, - .maxbit = 10, - .minbit = 9, - .value = 0x2, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_BFD", - .match = 0x3800, - .match_mask = 0x3800, - .match_maxbit = 44, - .match_minbit = 31, - .maxbit = 13, - .minbit = 11, - .value = 0x7, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", - .match = 0x200, - .match_mask = 0x646, - .match_maxbit = 44, - .match_minbit = 31, - .maxbit = 10, - .minbit = 9, - .value = 0x1, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", - .match = 0x1, - .match_mask = 0x1, - .match_maxbit = 44, - .match_minbit = 31, - .maxbit = 0, - .minbit = 0, - .value = 0x1, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", - .match = 0x98, - .match_mask = 0x1d8, - .match_maxbit = 44, - .match_minbit = 31, - .maxbit = 8, - .minbit = 7, - .value = 0x1, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", - .match = 0x600, - .match_mask = 0x640, - .match_maxbit = 44, - .match_minbit = 31, - .maxbit = 10, - .minbit = 9, - .value = 0x3, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_GPE", - .match = 0x1006, - .match_mask = 0x3846, - .match_maxbit = 44, - .match_minbit = 31, - .maxbit = 13, - .minbit = 11, - .value = 0x2, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE", - .match = 0x4, - .match_mask = 0x46, - .match_maxbit = 44, - .match_minbit = 31, - .maxbit = 2, - .minbit = 1, - .value = 0x2, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", - .match = 0x204, - .match_mask = 0x646, - .match_maxbit = 44, - .match_minbit = 31, - .maxbit = 10, - .minbit = 9, - .value = 0x1, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", - .match = 0x804, - .match_mask = 0x3846, - .match_maxbit = 44, - .match_minbit = 31, - .maxbit = 13, - .minbit = 11, - .value = 0x1, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", - .match = 0x100, - .match_mask = 0x1c0, - .match_maxbit = 44, - .match_minbit = 31, - .maxbit = 8, - .minbit = 7, - .value = 0x2, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", - .match = 0x24, - .match_mask = 0x66, - .match_maxbit = 44, - .match_minbit = 31, - .maxbit = 5, - .minbit = 5, - .value = 0x1, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_12BYTE */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_GTP_12BYTE", - .match = 0x2800, - .match_mask = 0x3800, - .match_maxbit = 44, - .match_minbit = 31, - .maxbit = 13, - .minbit = 11, - .value = 0x5, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_8BYTE */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_GTP_8BYTE", - .match = 0x2000, - .match_mask = 0x3800, - .match_maxbit = 44, - .match_minbit = 31, - .maxbit = 13, - .minbit = 11, - .value = 0x4, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_EXT_4BYTE */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_GTP_EXT_4BYTE", - .match = 0x826, - .match_mask = 0x3866, - .match_maxbit = 44, - .match_minbit = 31, - .maxbit = 13, - .minbit = 11, - .value = 0x1, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GTP_WITH_EXT */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_GTP_WITH_EXT", - .match = 0x26, - .match_mask = 0x66, - .match_maxbit = 44, - .match_minbit = 31, - .maxbit = 5, - .minbit = 5, - .value = 0x1, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_ICMP", - .match = 0x800, - .match_mask = 0x3826, - .match_maxbit = 44, - .match_minbit = 31, - .maxbit = 13, - .minbit = 11, - .value = 0x1, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_IGMP", - .match = 0x410, - .match_mask = 0x658, - .match_maxbit = 44, - .match_minbit = 31, - .maxbit = 10, - .minbit = 9, - .value = 0x2, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV4", - .match = 0x10, - .match_mask = 0x58, - .match_maxbit = 44, - .match_minbit = 31, - .maxbit = 4, - .minbit = 3, - .value = 0x2, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV6", - .match = 0x18, - .match_mask = 0x58, - .match_maxbit = 44, - .match_minbit = 31, - .maxbit = 4, - .minbit = 3, - .value = 0x3, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", - .match = 0x40, - .match_mask = 0x40, - .match_maxbit = 44, - .match_minbit = 31, - .maxbit = 6, - .minbit = 6, - .value = 0x1, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", - .match = 0x42, - .match_mask = 0x42, - .match_maxbit = 44, - .match_minbit = 31, - .maxbit = 1, - .minbit = 1, - .value = 0x1, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", - .match = 0x44, - .match_mask = 0x44, - .match_maxbit = 44, - .match_minbit = 31, - .maxbit = 2, - .minbit = 2, - .value = 0x1, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", - .match = 0x48, - .match_mask = 0x48, - .match_maxbit = 44, - .match_minbit = 31, - .maxbit = 3, - .minbit = 3, - .value = 0x1, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", - .match = 0x50, - .match_mask = 0x50, - .match_maxbit = 44, - .match_minbit = 31, - .maxbit = 4, - .minbit = 4, - .value = 0x1, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", - .match = 0x60, - .match_mask = 0x60, - .match_maxbit = 44, - .match_minbit = 31, - .maxbit = 5, - .minbit = 5, - .value = 0x1, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", - .match = 0xc0, - .match_mask = 0xc0, - .match_maxbit = 44, - .match_minbit = 31, - .maxbit = 7, - .minbit = 7, - .value = 0x1, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", - .match = 0x140, - .match_mask = 0x140, - .match_maxbit = 44, - .match_minbit = 31, - .maxbit = 8, - .minbit = 8, - .value = 0x1, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", - .match = 0x240, - .match_mask = 0x240, - .match_maxbit = 44, - .match_minbit = 31, - .maxbit = 9, - .minbit = 9, - .value = 0x1, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_NONE", - .match = 0x0, - .match_mask = 0x3fff, - .match_maxbit = 44, - .match_minbit = 31, - .maxbit = 13, - .minbit = 0, - .value = 0x0, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_P_1588", - .match = 0x1800, - .match_mask = 0x3800, - .match_maxbit = 44, - .match_minbit = 31, - .maxbit = 13, - .minbit = 11, - .value = 0x3, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_RARP", - .match = 0x2, - .match_mask = 0x46, - .match_maxbit = 44, - .match_minbit = 31, - .maxbit = 2, - .minbit = 1, - .value = 0x1, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", - .match = 0x20, - .match_mask = 0x66, - .match_maxbit = 44, - .match_minbit = 31, - .maxbit = 5, - .minbit = 5, - .value = 0x1, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", - .match = 0x820, - .match_mask = 0x3866, - .match_maxbit = 44, - .match_minbit = 31, - .maxbit = 13, - .minbit = 11, - .value = 0x1, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_UDP", - .match = 0x6, - .match_mask = 0x46, - .match_maxbit = 44, - .match_minbit = 31, - .maxbit = 2, - .minbit = 1, - .value = 0x3, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", - .match = 0x80, - .match_mask = 0x1d8, - .match_maxbit = 44, - .match_minbit = 31, - .maxbit = 8, - .minbit = 7, - .value = 0x1, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", - .match = 0x1000, - .match_mask = 0x3806, - .match_maxbit = 44, - .match_minbit = 31, - .maxbit = 13, - .minbit = 11, - .value = 0x2, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", - .match = 0x3000, - .match_mask = 0x3800, - .match_maxbit = 44, - .match_minbit = 31, - .maxbit = 13, - .minbit = 11, - .value = 0x6, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", - .match = 0x806, - .match_mask = 0x3866, - .match_maxbit = 44, - .match_minbit = 31, - .maxbit = 13, - .minbit = 11, - .value = 0x1, - .pmaxbit = 62, - .pminbit = 49, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */ - .name = "EGRESS_PKT_SYS_HDR_LOOPBACK", - .match = 0x1, - .match_mask = 0x1, - .match_maxbit = 0, - .match_minbit = 0, - .maxbit = 0, - .minbit = 0, - .value = 0x1, - .pmaxbit = 0, - .pminbit = 0, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */ - .name = "EGRESS_PKT_SYS_HDR_NONE", - .match = 0x0, - .match_mask = 0x1, - .match_maxbit = 0, - .match_minbit = 0, - .maxbit = 0, - .minbit = 0, - .value = 0x0, - .pmaxbit = 0, - .pminbit = 0, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ETAG */ - .name = "EGRESS_PKT_TUNNEL_L2_HDR_ETAG", - .match = 0x80, - .match_mask = 0xc0, - .match_maxbit = 8, - .match_minbit = 1, - .maxbit = 7, - .minbit = 6, - .value = 0x2, - .pmaxbit = 14, - .pminbit = 7, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */ - .name = "EGRESS_PKT_TUNNEL_L2_HDR_ITAG", - .match = 0x10, - .match_mask = 0x10, - .match_maxbit = 8, - .match_minbit = 1, - .maxbit = 4, - .minbit = 4, - .value = 0x1, - .pmaxbit = 14, - .pminbit = 7, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */ - .name = "EGRESS_PKT_TUNNEL_L2_HDR_L2", - .match = 0x1, - .match_mask = 0x1, - .match_maxbit = 8, - .match_minbit = 1, - .maxbit = 0, - .minbit = 0, - .value = 0x1, - .pmaxbit = 14, - .pminbit = 7, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */ - .name = "EGRESS_PKT_TUNNEL_L2_HDR_NONE", - .match = 0x0, - .match_mask = 0xff, - .match_maxbit = 8, - .match_minbit = 1, - .maxbit = 7, - .minbit = 0, - .value = 0x0, - .pmaxbit = 14, - .pminbit = 7, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OPAQUETAG */ - .name = "EGRESS_PKT_TUNNEL_L2_HDR_OPAQUETAG", - .match = 0x20, - .match_mask = 0x20, - .match_maxbit = 8, - .match_minbit = 1, - .maxbit = 5, - .minbit = 5, - .value = 0x1, - .pmaxbit = 14, - .pminbit = 7, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */ - .name = "EGRESS_PKT_TUNNEL_L2_HDR_OTAG", - .match = 0x8, - .match_mask = 0x8, - .match_maxbit = 8, - .match_minbit = 1, - .maxbit = 3, - .minbit = 3, - .value = 0x1, - .pmaxbit = 14, - .pminbit = 7, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_RSPAN */ - .name = "EGRESS_PKT_TUNNEL_L2_HDR_RSPAN", - .match = 0x4, - .match_mask = 0x4, - .match_maxbit = 8, - .match_minbit = 1, - .maxbit = 2, - .minbit = 2, - .value = 0x1, - .pmaxbit = 14, - .pminbit = 7, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC */ - .name = "EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", - .match = 0x2, - .match_mask = 0x2, - .match_maxbit = 8, - .match_minbit = 1, - .maxbit = 1, - .minbit = 1, - .value = 0x1, - .pmaxbit = 14, - .pminbit = 7, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VNTAG */ - .name = "EGRESS_PKT_TUNNEL_L2_HDR_VNTAG", - .match = 0x40, - .match_mask = 0xc0, - .match_maxbit = 8, - .match_minbit = 1, - .maxbit = 7, - .minbit = 6, - .value = 0x1, - .pmaxbit = 14, - .pminbit = 7, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", - .match = 0x8, - .match_mask = 0x58, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 4, - .minbit = 3, - .value = 0x1, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", - .match = 0x180, - .match_mask = 0x1c0, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 8, - .minbit = 7, - .value = 0x3, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", - .match = 0x418, - .match_mask = 0x658, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 10, - .minbit = 9, - .value = 0x2, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", - .match = 0x3800, - .match_mask = 0x3800, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 13, - .minbit = 11, - .value = 0x7, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", - .match = 0x200, - .match_mask = 0x646, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 10, - .minbit = 9, - .value = 0x1, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", - .match = 0x1, - .match_mask = 0x1, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 0, - .minbit = 0, - .value = 0x1, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", - .match = 0x98, - .match_mask = 0x1d8, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 8, - .minbit = 7, - .value = 0x1, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", - .match = 0x600, - .match_mask = 0x640, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 10, - .minbit = 9, - .value = 0x3, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", - .match = 0x1006, - .match_mask = 0x3846, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 13, - .minbit = 11, - .value = 0x2, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", - .match = 0x4, - .match_mask = 0x46, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 2, - .minbit = 1, - .value = 0x2, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", - .match = 0x204, - .match_mask = 0x646, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 10, - .minbit = 9, - .value = 0x1, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", - .match = 0x804, - .match_mask = 0x3846, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 13, - .minbit = 11, - .value = 0x1, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", - .match = 0x100, - .match_mask = 0x1c0, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 8, - .minbit = 7, - .value = 0x2, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", - .match = 0x24, - .match_mask = 0x66, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 5, - .minbit = 5, - .value = 0x1, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_12BYTE */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_12BYTE", - .match = 0x2800, - .match_mask = 0x3800, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 13, - .minbit = 11, - .value = 0x5, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_8BYTE */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_8BYTE", - .match = 0x2000, - .match_mask = 0x3800, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 13, - .minbit = 11, - .value = 0x4, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_EXT_4BYTE */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_EXT_4BYTE", - .match = 0x826, - .match_mask = 0x3866, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 13, - .minbit = 11, - .value = 0x1, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_WITH_EXT */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GTP_WITH_EXT", - .match = 0x26, - .match_mask = 0x66, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 5, - .minbit = 5, - .value = 0x1, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", - .match = 0x800, - .match_mask = 0x3826, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 13, - .minbit = 11, - .value = 0x1, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", - .match = 0x410, - .match_mask = 0x658, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 10, - .minbit = 9, - .value = 0x2, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", - .match = 0x10, - .match_mask = 0x58, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 4, - .minbit = 3, - .value = 0x2, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", - .match = 0x18, - .match_mask = 0x58, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 4, - .minbit = 3, - .value = 0x3, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", - .match = 0x40, - .match_mask = 0x40, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 6, - .minbit = 6, - .value = 0x1, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", - .match = 0x42, - .match_mask = 0x42, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 1, - .minbit = 1, - .value = 0x1, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", - .match = 0x44, - .match_mask = 0x44, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 2, - .minbit = 2, - .value = 0x1, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", - .match = 0x48, - .match_mask = 0x48, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 3, - .minbit = 3, - .value = 0x1, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", - .match = 0x50, - .match_mask = 0x50, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 4, - .minbit = 4, - .value = 0x1, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", - .match = 0x60, - .match_mask = 0x60, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 5, - .minbit = 5, - .value = 0x1, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", - .match = 0xc0, - .match_mask = 0xc0, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 7, - .minbit = 7, - .value = 0x1, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", - .match = 0x140, - .match_mask = 0x140, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 8, - .minbit = 8, - .value = 0x1, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", - .match = 0x240, - .match_mask = 0x240, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 9, - .minbit = 9, - .value = 0x1, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", - .match = 0x0, - .match_mask = 0x3fff, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 13, - .minbit = 0, - .value = 0x0, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", - .match = 0x1800, - .match_mask = 0x3800, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 13, - .minbit = 11, - .value = 0x3, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", - .match = 0x2, - .match_mask = 0x46, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 2, - .minbit = 1, - .value = 0x1, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", - .match = 0x20, - .match_mask = 0x66, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 5, - .minbit = 5, - .value = 0x1, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", - .match = 0x820, - .match_mask = 0x3866, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 13, - .minbit = 11, - .value = 0x1, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", - .match = 0x6, - .match_mask = 0x46, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 2, - .minbit = 1, - .value = 0x3, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", - .match = 0x80, - .match_mask = 0x1d8, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 8, - .minbit = 7, - .value = 0x1, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", - .match = 0x1000, - .match_mask = 0x3806, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 13, - .minbit = 11, - .value = 0x2, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", - .match = 0x3000, - .match_mask = 0x3800, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 13, - .minbit = 11, - .value = 0x6, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", - .match = 0x806, - .match_mask = 0x3866, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 13, - .minbit = 11, - .value = 0x1, - .pmaxbit = 34, - .pminbit = 21, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ETAG */ - .name = "INGRESS_PKT_INNER_L2_HDR_ETAG", - .match = 0x80, - .match_mask = 0xc0, - .match_maxbit = 30, - .match_minbit = 23, - .maxbit = 7, - .minbit = 6, - .value = 0x2, - .pmaxbit = 30, - .pminbit = 23, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */ - .name = "INGRESS_PKT_INNER_L2_HDR_ITAG", - .match = 0x10, - .match_mask = 0x10, - .match_maxbit = 30, - .match_minbit = 23, - .maxbit = 4, - .minbit = 4, - .value = 0x1, - .pmaxbit = 30, - .pminbit = 23, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */ - .name = "INGRESS_PKT_INNER_L2_HDR_L2", - .match = 0x1, - .match_mask = 0x1, - .match_maxbit = 30, - .match_minbit = 23, - .maxbit = 0, - .minbit = 0, - .value = 0x1, - .pmaxbit = 30, - .pminbit = 23, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */ - .name = "INGRESS_PKT_INNER_L2_HDR_NONE", - .match = 0x0, - .match_mask = 0xff, - .match_maxbit = 30, - .match_minbit = 23, - .maxbit = 7, - .minbit = 0, - .value = 0x0, - .pmaxbit = 30, - .pminbit = 23, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OPAQUETAG */ - .name = "INGRESS_PKT_INNER_L2_HDR_OPAQUETAG", - .match = 0x20, - .match_mask = 0x20, - .match_maxbit = 30, - .match_minbit = 23, - .maxbit = 5, - .minbit = 5, - .value = 0x1, - .pmaxbit = 30, - .pminbit = 23, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */ - .name = "INGRESS_PKT_INNER_L2_HDR_OTAG", - .match = 0x8, - .match_mask = 0x8, - .match_maxbit = 30, - .match_minbit = 23, - .maxbit = 3, - .minbit = 3, - .value = 0x1, - .pmaxbit = 30, - .pminbit = 23, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_RSPAN */ - .name = "INGRESS_PKT_INNER_L2_HDR_RSPAN", - .match = 0x4, - .match_mask = 0x4, - .match_maxbit = 30, - .match_minbit = 23, - .maxbit = 2, - .minbit = 2, - .value = 0x1, - .pmaxbit = 30, - .pminbit = 23, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC */ - .name = "INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", - .match = 0x2, - .match_mask = 0x2, - .match_maxbit = 30, - .match_minbit = 23, - .maxbit = 1, - .minbit = 1, - .value = 0x1, - .pmaxbit = 30, - .pminbit = 23, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_VNTAG */ - .name = "INGRESS_PKT_INNER_L2_HDR_VNTAG", - .match = 0x40, - .match_mask = 0xc0, - .match_maxbit = 30, - .match_minbit = 23, - .maxbit = 7, - .minbit = 6, - .value = 0x1, - .pmaxbit = 30, - .pminbit = 23, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_ARP", - .match = 0x8, - .match_mask = 0x58, - .match_maxbit = 44, - .match_minbit = 31, - .maxbit = 4, - .minbit = 3, - .value = 0x1, - .pmaxbit = 44, - .pminbit = 31, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", - .match = 0x180, - .match_mask = 0x1c0, - .match_maxbit = 44, - .match_minbit = 31, - .maxbit = 8, - .minbit = 7, - .value = 0x3, - .pmaxbit = 44, - .pminbit = 31, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", - .match = 0x418, - .match_mask = 0x658, - .match_maxbit = 44, - .match_minbit = 31, - .maxbit = 10, - .minbit = 9, - .value = 0x2, - .pmaxbit = 44, - .pminbit = 31, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_BFD", - .match = 0x3800, - .match_mask = 0x3800, - .match_maxbit = 44, - .match_minbit = 31, - .maxbit = 13, - .minbit = 11, - .value = 0x7, - .pmaxbit = 44, - .pminbit = 31, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", - .match = 0x200, - .match_mask = 0x646, - .match_maxbit = 44, - .match_minbit = 31, - .maxbit = 10, - .minbit = 9, - .value = 0x1, - .pmaxbit = 44, - .pminbit = 31, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", - .match = 0x1, - .match_mask = 0x1, - .match_maxbit = 44, - .match_minbit = 31, - .maxbit = 0, - .minbit = 0, - .value = 0x1, - .pmaxbit = 44, - .pminbit = 31, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", - .match = 0x98, - .match_mask = 0x1d8, - .match_maxbit = 44, - .match_minbit = 31, - .maxbit = 8, - .minbit = 7, - .value = 0x1, - .pmaxbit = 44, - .pminbit = 31, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", - .match = 0x600, - .match_mask = 0x640, - .match_maxbit = 44, - .match_minbit = 31, - .maxbit = 10, - .minbit = 9, - .value = 0x3, - .pmaxbit = 44, - .pminbit = 31, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_ICMP", - .match = 0x800, - .match_mask = 0x3826, - .match_maxbit = 44, - .match_minbit = 31, - .maxbit = 13, - .minbit = 11, - .value = 0x1, - .pmaxbit = 44, - .pminbit = 31, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_IGMP", - .match = 0x410, - .match_mask = 0x658, - .match_maxbit = 44, - .match_minbit = 31, - .maxbit = 10, - .minbit = 9, - .value = 0x2, - .pmaxbit = 44, - .pminbit = 31, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV4", - .match = 0x10, - .match_mask = 0x58, - .match_maxbit = 44, - .match_minbit = 31, - .maxbit = 4, - .minbit = 3, - .value = 0x2, - .pmaxbit = 44, - .pminbit = 31, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV6", - .match = 0x18, - .match_mask = 0x58, - .match_maxbit = 44, - .match_minbit = 31, - .maxbit = 4, - .minbit = 3, - .value = 0x3, - .pmaxbit = 44, - .pminbit = 31, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_NONE", - .match = 0x0, - .match_mask = 0x3fff, - .match_maxbit = 44, - .match_minbit = 31, - .maxbit = 13, - .minbit = 0, - .value = 0x0, - .pmaxbit = 44, - .pminbit = 31, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_P_1588", - .match = 0x1800, - .match_mask = 0x3800, - .match_maxbit = 44, - .match_minbit = 31, - .maxbit = 13, - .minbit = 11, - .value = 0x3, - .pmaxbit = 44, - .pminbit = 31, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_RARP", - .match = 0x2, - .match_mask = 0x46, - .match_maxbit = 44, - .match_minbit = 31, - .maxbit = 2, - .minbit = 1, - .value = 0x1, - .pmaxbit = 44, - .pminbit = 31, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", - .match = 0x20, - .match_mask = 0x66, - .match_maxbit = 44, - .match_minbit = 31, - .maxbit = 5, - .minbit = 5, - .value = 0x1, - .pmaxbit = 44, - .pminbit = 31, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", - .match = 0x820, - .match_mask = 0x3866, - .match_maxbit = 44, - .match_minbit = 31, - .maxbit = 13, - .minbit = 11, - .value = 0x1, - .pmaxbit = 44, - .pminbit = 31, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_UDP", - .match = 0x6, - .match_mask = 0x46, - .match_maxbit = 44, - .match_minbit = 31, - .maxbit = 2, - .minbit = 1, - .value = 0x3, - .pmaxbit = 44, - .pminbit = 31, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", - .match = 0x80, - .match_mask = 0x1d8, - .match_maxbit = 44, - .match_minbit = 31, - .maxbit = 8, - .minbit = 7, - .value = 0x1, - .pmaxbit = 44, - .pminbit = 31, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", - .match = 0x1000, - .match_mask = 0x3806, - .match_maxbit = 44, - .match_minbit = 31, - .maxbit = 13, - .minbit = 11, - .value = 0x2, - .pmaxbit = 44, - .pminbit = 31, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", - .match = 0x3000, - .match_mask = 0x3800, - .match_maxbit = 44, - .match_minbit = 31, - .maxbit = 13, - .minbit = 11, - .value = 0x6, - .pmaxbit = 44, - .pminbit = 31, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ETAG */ - .name = "INGRESS_PKT_OUTER_L2_HDR_ETAG", - .match = 0x80, - .match_mask = 0xc0, - .match_maxbit = 8, - .match_minbit = 1, - .maxbit = 7, - .minbit = 6, - .value = 0x2, - .pmaxbit = 8, - .pminbit = 1, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */ - .name = "INGRESS_PKT_OUTER_L2_HDR_ITAG", - .match = 0x10, - .match_mask = 0x10, - .match_maxbit = 8, - .match_minbit = 1, - .maxbit = 4, - .minbit = 4, - .value = 0x1, - .pmaxbit = 8, - .pminbit = 1, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */ - .name = "INGRESS_PKT_OUTER_L2_HDR_L2", - .match = 0x1, - .match_mask = 0x1, - .match_maxbit = 8, - .match_minbit = 1, - .maxbit = 0, - .minbit = 0, - .value = 0x1, - .pmaxbit = 8, - .pminbit = 1, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */ - .name = "INGRESS_PKT_OUTER_L2_HDR_NONE", - .match = 0x0, - .match_mask = 0xff, - .match_maxbit = 8, - .match_minbit = 1, - .maxbit = 7, - .minbit = 0, - .value = 0x0, - .pmaxbit = 8, - .pminbit = 1, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OPAQUETAG */ - .name = "INGRESS_PKT_OUTER_L2_HDR_OPAQUETAG", - .match = 0x20, - .match_mask = 0x20, - .match_maxbit = 8, - .match_minbit = 1, - .maxbit = 5, - .minbit = 5, - .value = 0x1, - .pmaxbit = 8, - .pminbit = 1, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */ - .name = "INGRESS_PKT_OUTER_L2_HDR_OTAG", - .match = 0x8, - .match_mask = 0x8, - .match_maxbit = 8, - .match_minbit = 1, - .maxbit = 3, - .minbit = 3, - .value = 0x1, - .pmaxbit = 8, - .pminbit = 1, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_RSPAN */ - .name = "INGRESS_PKT_OUTER_L2_HDR_RSPAN", - .match = 0x4, - .match_mask = 0x4, - .match_maxbit = 8, - .match_minbit = 1, - .maxbit = 2, - .minbit = 2, - .value = 0x1, - .pmaxbit = 8, - .pminbit = 1, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC */ - .name = "INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", - .match = 0x2, - .match_mask = 0x2, - .match_maxbit = 8, - .match_minbit = 1, - .maxbit = 1, - .minbit = 1, - .value = 0x1, - .pmaxbit = 8, - .pminbit = 1, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VNTAG */ - .name = "INGRESS_PKT_OUTER_L2_HDR_VNTAG", - .match = 0x40, - .match_mask = 0xc0, - .match_maxbit = 8, - .match_minbit = 1, - .maxbit = 7, - .minbit = 6, - .value = 0x1, - .pmaxbit = 8, - .pminbit = 1, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ARP", - .match = 0x8, - .match_mask = 0x58, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 4, - .minbit = 3, - .value = 0x1, - .pmaxbit = 22, - .pminbit = 9, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", - .match = 0x180, - .match_mask = 0x1c0, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 8, - .minbit = 7, - .value = 0x3, - .pmaxbit = 22, - .pminbit = 9, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", - .match = 0x418, - .match_mask = 0x658, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 10, - .minbit = 9, - .value = 0x2, - .pmaxbit = 22, - .pminbit = 9, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_BFD", - .match = 0x3800, - .match_mask = 0x3800, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 13, - .minbit = 11, - .value = 0x7, - .pmaxbit = 22, - .pminbit = 9, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", - .match = 0x200, - .match_mask = 0x646, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 10, - .minbit = 9, - .value = 0x1, - .pmaxbit = 22, - .pminbit = 9, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", - .match = 0x1, - .match_mask = 0x1, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 0, - .minbit = 0, - .value = 0x1, - .pmaxbit = 22, - .pminbit = 9, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", - .match = 0x98, - .match_mask = 0x1d8, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 8, - .minbit = 7, - .value = 0x1, - .pmaxbit = 22, - .pminbit = 9, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", - .match = 0x600, - .match_mask = 0x640, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 10, - .minbit = 9, - .value = 0x3, - .pmaxbit = 22, - .pminbit = 9, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GPE", - .match = 0x1006, - .match_mask = 0x3846, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 13, - .minbit = 11, - .value = 0x2, - .pmaxbit = 22, - .pminbit = 9, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE", - .match = 0x4, - .match_mask = 0x46, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 2, - .minbit = 1, - .value = 0x2, - .pmaxbit = 22, - .pminbit = 9, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", - .match = 0x204, - .match_mask = 0x646, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 10, - .minbit = 9, - .value = 0x1, - .pmaxbit = 22, - .pminbit = 9, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", - .match = 0x804, - .match_mask = 0x3846, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 13, - .minbit = 11, - .value = 0x1, - .pmaxbit = 22, - .pminbit = 9, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", - .match = 0x100, - .match_mask = 0x1c0, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 8, - .minbit = 7, - .value = 0x2, - .pmaxbit = 22, - .pminbit = 9, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", - .match = 0x24, - .match_mask = 0x66, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 5, - .minbit = 5, - .value = 0x1, - .pmaxbit = 22, - .pminbit = 9, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_12BYTE */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GTP_12BYTE", - .match = 0x2800, - .match_mask = 0x3800, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 13, - .minbit = 11, - .value = 0x5, - .pmaxbit = 22, - .pminbit = 9, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_8BYTE */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GTP_8BYTE", - .match = 0x2000, - .match_mask = 0x3800, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 13, - .minbit = 11, - .value = 0x4, - .pmaxbit = 22, - .pminbit = 9, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_EXT_4BYTE */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GTP_EXT_4BYTE", - .match = 0x826, - .match_mask = 0x3866, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 13, - .minbit = 11, - .value = 0x1, - .pmaxbit = 22, - .pminbit = 9, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GTP_WITH_EXT */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GTP_WITH_EXT", - .match = 0x26, - .match_mask = 0x66, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 5, - .minbit = 5, - .value = 0x1, - .pmaxbit = 22, - .pminbit = 9, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", - .match = 0x800, - .match_mask = 0x3826, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 13, - .minbit = 11, - .value = 0x1, - .pmaxbit = 22, - .pminbit = 9, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", - .match = 0x410, - .match_mask = 0x658, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 10, - .minbit = 9, - .value = 0x2, - .pmaxbit = 22, - .pminbit = 9, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", - .match = 0x10, - .match_mask = 0x58, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 4, - .minbit = 3, - .value = 0x2, - .pmaxbit = 22, - .pminbit = 9, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", - .match = 0x18, - .match_mask = 0x58, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 4, - .minbit = 3, - .value = 0x3, - .pmaxbit = 22, - .pminbit = 9, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", - .match = 0x40, - .match_mask = 0x40, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 6, - .minbit = 6, - .value = 0x1, - .pmaxbit = 22, - .pminbit = 9, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", - .match = 0x42, - .match_mask = 0x42, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 1, - .minbit = 1, - .value = 0x1, - .pmaxbit = 22, - .pminbit = 9, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", - .match = 0x44, - .match_mask = 0x44, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 2, - .minbit = 2, - .value = 0x1, - .pmaxbit = 22, - .pminbit = 9, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", - .match = 0x48, - .match_mask = 0x48, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 3, - .minbit = 3, - .value = 0x1, - .pmaxbit = 22, - .pminbit = 9, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", - .match = 0x50, - .match_mask = 0x50, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 4, - .minbit = 4, - .value = 0x1, - .pmaxbit = 22, - .pminbit = 9, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", - .match = 0x60, - .match_mask = 0x60, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 5, - .minbit = 5, - .value = 0x1, - .pmaxbit = 22, - .pminbit = 9, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", - .match = 0xc0, - .match_mask = 0xc0, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 7, - .minbit = 7, - .value = 0x1, - .pmaxbit = 22, - .pminbit = 9, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", - .match = 0x140, - .match_mask = 0x140, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 8, - .minbit = 8, - .value = 0x1, - .pmaxbit = 22, - .pminbit = 9, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", - .match = 0x240, - .match_mask = 0x240, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 9, - .minbit = 9, - .value = 0x1, - .pmaxbit = 22, - .pminbit = 9, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_NONE", - .match = 0x0, - .match_mask = 0x3fff, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 13, - .minbit = 0, - .value = 0x0, - .pmaxbit = 22, - .pminbit = 9, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", - .match = 0x1800, - .match_mask = 0x3800, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 13, - .minbit = 11, - .value = 0x3, - .pmaxbit = 22, - .pminbit = 9, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_RARP", - .match = 0x2, - .match_mask = 0x46, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 2, - .minbit = 1, - .value = 0x1, - .pmaxbit = 22, - .pminbit = 9, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", - .match = 0x20, - .match_mask = 0x66, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 5, - .minbit = 5, - .value = 0x1, - .pmaxbit = 22, - .pminbit = 9, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", - .match = 0x820, - .match_mask = 0x3866, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 13, - .minbit = 11, - .value = 0x1, - .pmaxbit = 22, - .pminbit = 9, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UDP", - .match = 0x6, - .match_mask = 0x46, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 2, - .minbit = 1, - .value = 0x3, - .pmaxbit = 22, - .pminbit = 9, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", - .match = 0x80, - .match_mask = 0x1d8, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 8, - .minbit = 7, - .value = 0x1, - .pmaxbit = 22, - .pminbit = 9, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", - .match = 0x1000, - .match_mask = 0x3806, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 13, - .minbit = 11, - .value = 0x2, - .pmaxbit = 22, - .pminbit = 9, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", - .match = 0x3000, - .match_mask = 0x3800, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 13, - .minbit = 11, - .value = 0x6, - .pmaxbit = 22, - .pminbit = 9, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", - .match = 0x806, - .match_mask = 0x3866, - .match_maxbit = 22, - .match_minbit = 9, - .maxbit = 13, - .minbit = 11, - .value = 0x1, - .pmaxbit = 22, - .pminbit = 9, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */ - .name = "INGRESS_PKT_SYS_HDR_LOOPBACK", - .match = 0x1, - .match_mask = 0x1, - .match_maxbit = 0, - .match_minbit = 0, - .maxbit = 0, - .minbit = 0, - .value = 0x1, - .pmaxbit = 0, - .pminbit = 0, - - }, - { - /* BCM56880_A0_NFA_6_5_34_3_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */ - .name = "INGRESS_PKT_SYS_HDR_NONE", - .match = 0x0, - .match_mask = 0x1, - .match_maxbit = 0, - .match_minbit = 0, - .maxbit = 0, - .minbit = 0, - .value = 0x0, - .pmaxbit = 0, - .pminbit = 0, - - }, -}; - -static bcmpkt_rxpmd_match_id_db_info_t bcm56880_a0_nfa_6_5_34_3_0_rxpmd_match_id_db_info = { - .num_entries = 184, - .db = bcm56880_a0_nfa_6_5_34_3_0_rxpmd_match_id_db -}; -bcmpkt_rxpmd_match_id_db_info_t * bcm56880_a0_nfa_6_5_34_3_0_rxpmd_match_id_db_info_get(void) { - return &bcm56880_a0_nfa_6_5_34_3_0_rxpmd_match_id_db_info; -} - -static shr_enum_map_t bcm56880_a0_nfa_6_5_34_3_0_rxpmd_match_id_map[] = { - BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_rxpmd_match_id_map_info_t bcm56880_a0_nfa_6_5_34_3_0_rxpmd_match_id_map_info = { - .num_entries = 184, - .map = bcm56880_a0_nfa_6_5_34_3_0_rxpmd_match_id_map -}; - -bcmpkt_rxpmd_match_id_map_info_t * bcm56880_a0_nfa_6_5_34_3_0_rxpmd_match_id_map_info_get(void) { - return &bcm56880_a0_nfa_6_5_34_3_0_rxpmd_match_id_map_info; -} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_34_3_0/bcm56880_a0_nfa_6_5_34_3_0_pkt_flexhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_34_3_0/bcm56880_a0_nfa_6_5_34_3_0_pkt_flexhdr.c deleted file mode 100644 index 29d5abd33af..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56880_a0/nfa_6_5_34_3_0/bcm56880_a0_nfa_6_5_34_3_0_pkt_flexhdr.c +++ /dev/null @@ -1,7068 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) map.yml - * for device bcm56880_a0 and variant nfa_6_5_34_3_0. - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - -#include -#include -#include -#include -#include -#include -#include - -#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) -#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) -#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) -#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) - -static void bcm56880_a0_nfa_6_5_34_3_0_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons) -{ - uint32_t *reason = data + 0; - - if (reason[12] & (0x1 << 0)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU); - } - if (reason[12] & (0x1 << 1)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS); - } - if (reason[12] & (0x1 << 2)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE); - } - if (reason[12] & (0x1 << 3)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT); - } - if (reason[12] & (0x1 << 4)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD); - } - if (reason[12] & (0x1 << 5)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED); - } - if (reason[12] & (0x1 << 6)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT); - } - if (reason[12] & (0x1 << 7)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD); - } - if (reason[12] & (0x1 << 8)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD); - } - if (reason[12] & (0x1 << 9)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS); - } - if (reason[12] & (0x1 << 10)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP); - } - if (reason[12] & (0x1 << 11)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS); - } - if (reason[12] & (0x1 << 12)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP); - } - if (reason[12] & (0x1 << 13)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR); - } - if (reason[12] & (0x1 << 14)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR); - } - if (reason[12] & (0x1 << 15)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED); - } - if (reason[12] & (0x1 << 16)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL); - } - if (reason[12] & (0x1 << 17)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_VFP); - } - if (reason[12] & (0x1 << 18)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP); - } - if (reason[12] & (0x1 << 19)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER); - } - if (reason[12] & (0x1 << 20)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP); - } - if (reason[12] & (0x1 << 21)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_SVP); - } - if (reason[12] & (0x1 << 22)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT); - } - if (reason[12] & (0x1 << 23)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT); - } - if (reason[12] & (0x1 << 24)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED); - } - if (reason[12] & (0x1 << 25)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED); - } - if (reason[12] & (0x1 << 26)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP); - } - if (reason[12] & (0x1 << 27)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED); - } - if (reason[12] & (0x1 << 28)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF); - } - if (reason[12] & (0x1 << 29)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED); - } - if (reason[12] & (0x1 << 30)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED); - } - if (reason[12] & (0x1 << 31)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU); - } - if (reason[11] & (0x1 << 0)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0); - } - if (reason[11] & (0x1 << 1)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1); - } - if (reason[11] & (0x1 << 2)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2); - } - if (reason[11] & (0x1 << 3)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3); - } - if (reason[11] & (0x1 << 4)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4); - } - if (reason[11] & (0x1 << 5)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5); - } - if (reason[11] & (0x1 << 6)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6); - } - if (reason[11] & (0x1 << 7)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7); - } - if (reason[11] & (0x1 << 8)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_PE_VID_FWD_MISS); - } - if (reason[11] & (0x1 << 9)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_PE_VID_RPF_MISS); - } - if (reason[11] & (0x1 << 10)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_PE_RPF); - } - if (reason[11] & (0x1 << 11)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_PKT_ETAG_UNEXPECTED); - } - if (reason[11] & (0x1 << 12)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_PKT_ETAG_EXPECTED); - } - if (reason[11] & (0x1 << 15)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP); - } -} - -static void bcm56880_a0_nfa_6_5_34_3_0_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data) -{ - uint32_t *reason = data + 0; - - reason[12] = 0; - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) { - reason[12] |= (0x1 << 0); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) { - reason[12] |= (0x1 << 1); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) { - reason[12] |= (0x1 << 2); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_RESERVED_TRACE_BIT)) { - reason[12] |= (0x1 << 3); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD)) { - reason[12] |= (0x1 << 4); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) { - reason[12] |= (0x1 << 5); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) { - reason[12] |= (0x1 << 6); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD)) { - reason[12] |= (0x1 << 7); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD)) { - reason[12] |= (0x1 << 8); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) { - reason[12] |= (0x1 << 9); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) { - reason[12] |= (0x1 << 10); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) { - reason[12] |= (0x1 << 11); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) { - reason[12] |= (0x1 << 12); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) { - reason[12] |= (0x1 << 13); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) { - reason[12] |= (0x1 << 14); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED)) { - reason[12] |= (0x1 << 15); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) { - reason[12] |= (0x1 << 16); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_VFP)) { - reason[12] |= (0x1 << 17); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP)) { - reason[12] |= (0x1 << 18); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) { - reason[12] |= (0x1 << 19); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP)) { - reason[12] |= (0x1 << 20); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_SVP)) { - reason[12] |= (0x1 << 21); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT)) { - reason[12] |= (0x1 << 22); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) { - reason[12] |= (0x1 << 23); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED)) { - reason[12] |= (0x1 << 24); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED)) { - reason[12] |= (0x1 << 25); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP)) { - reason[12] |= (0x1 << 26); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED)) { - reason[12] |= (0x1 << 27); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF)) { - reason[12] |= (0x1 << 28); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED)) { - reason[12] |= (0x1 << 29); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED)) { - reason[12] |= (0x1 << 30); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU)) { - reason[12] |= (0x1 << 31); - } - reason[11] = 0; - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0)) { - reason[11] |= (0x1 << 0); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1)) { - reason[11] |= (0x1 << 1); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2)) { - reason[11] |= (0x1 << 2); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3)) { - reason[11] |= (0x1 << 3); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4)) { - reason[11] |= (0x1 << 4); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5)) { - reason[11] |= (0x1 << 5); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6)) { - reason[11] |= (0x1 << 6); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7)) { - reason[11] |= (0x1 << 7); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_PE_VID_FWD_MISS)) { - reason[11] |= (0x1 << 8); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_PE_VID_RPF_MISS)) { - reason[11] |= (0x1 << 9); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_PE_RPF)) { - reason[11] |= (0x1 << 10); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_PKT_ETAG_UNEXPECTED)) { - reason[11] |= (0x1 << 11); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_PKT_ETAG_EXPECTED)) { - reason[11] |= (0x1 << 12); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) { - reason[11] |= (0x1 << 15); - } -} - -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_34_3_0_rxpmd_flex_field_data[] = { - { - .name = "DLB_ECMP_DESTINATION_15_0", - .fid = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 144, 159 }, /* Profile 2. */ - { 128, 143 }, /* Profile 3. */ - }, - .profile_cnt = 4, - }, - { - .name = "DROP_CODE_15_0", - .fid = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 48, 63 }, /* Profile 2. */ - { 48, 63 }, /* Profile 3. */ - { 48, 63 }, /* Profile 4. */ - { 48, 63 }, /* Profile 5. */ - }, - .profile_cnt = 6, - }, - { - .name = "DVP_15_0", - .fid = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_DVP_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 240, 255 }, /* Profile 2. */ - { 240, 255 }, /* Profile 3. */ - { 240, 255 }, /* Profile 4. */ - { 240, 255 }, /* Profile 5. */ - }, - .profile_cnt = 6, - }, - { - .name = "EFFECTIVE_TTL_7_0", - .fid = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 160, 167 }, /* Profile 2. */ - { 144, 151 }, /* Profile 3. */ - { 160, 167 }, /* Profile 4. */ - { 144, 151 }, /* Profile 5. */ - }, - .profile_cnt = 6, - }, - { - .name = "ENTROPY_LABEL_LOW_15_0", - .fid = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 304, 319 }, /* Profile 2. */ - { 304, 319 }, /* Profile 3. */ - { 304, 319 }, /* Profile 4. */ - { 304, 319 }, /* Profile 5. */ - }, - .profile_cnt = 6, - }, - { - .name = "EVENT_TRACE_VECTOR_31_0", - .fid = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 0, 31 }, /* Profile 2. */ - { 0, 31 }, /* Profile 3. */ - { 0, 31 }, /* Profile 4. */ - { 0, 31 }, /* Profile 5. */ - }, - .profile_cnt = 6, - }, - { - .name = "EVENT_TRACE_VECTOR_47_32", - .fid = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 32, 47 }, /* Profile 2. */ - { 32, 47 }, /* Profile 3. */ - { 32, 47 }, /* Profile 4. */ - { 32, 47 }, /* Profile 5. */ - }, - .profile_cnt = 6, - }, - { - .name = "I2E_CLASS_ID_15_0", - .fid = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 288, 303 }, /* Profile 2. */ - { 288, 303 }, /* Profile 3. */ - { 288, 303 }, /* Profile 4. */ - { 288, 303 }, /* Profile 5. */ - }, - .profile_cnt = 6, - }, - { - .name = "IFP_TS_CONTROL_ACTION_3_0", - .fid = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 376, 379 }, /* Profile 2. */ - { 376, 379 }, /* Profile 3. */ - { 376, 379 }, /* Profile 4. */ - { 376, 379 }, /* Profile 5. */ - }, - .profile_cnt = 6, - }, - { - .name = "ING_ETAG_ACTION_3_0", - .fid = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_ING_ETAG_ACTION_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 372, 375 }, /* Profile 2. */ - { 372, 375 }, /* Profile 3. */ - { 372, 375 }, /* Profile 4. */ - { 372, 375 }, /* Profile 5. */ - }, - .profile_cnt = 6, - }, - { - .name = "ING_ETAG_PCP_DEI_3_0", - .fid = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_ING_ETAG_PCP_DEI_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 368, 371 }, /* Profile 2. */ - { 368, 371 }, /* Profile 3. */ - { 368, 371 }, /* Profile 4. */ - { 368, 371 }, /* Profile 5. */ - }, - .profile_cnt = 6, - }, - { - .name = "ING_ETAG_VID_16_15_0", - .fid = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_ING_ETAG_VID_16_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { -1, -1 }, /* Profile 2. */ - { -1, -1 }, /* Profile 3. */ - { 144, 159 }, /* Profile 4. */ - { 128, 143 }, /* Profile 5. */ - }, - .profile_cnt = 6, - }, - { - .name = "ING_TIMESTAMP_31_0", - .fid = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 64, 95 }, /* Profile 2. */ - { 64, 95 }, /* Profile 3. */ - { 64, 95 }, /* Profile 4. */ - { 64, 95 }, /* Profile 5. */ - }, - .profile_cnt = 6, - }, - { - .name = "INGRESS_PP_PORT_7_0", - .fid = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 256, 263 }, /* Profile 2. */ - { 256, 263 }, /* Profile 3. */ - { 256, 263 }, /* Profile 4. */ - { 256, 263 }, /* Profile 5. */ - }, - .profile_cnt = 6, - }, - { - .name = "INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0", - .fid = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 320, 335 }, /* Profile 2. */ - { 320, 335 }, /* Profile 3. */ - { 320, 335 }, /* Profile 4. */ - { 320, 335 }, /* Profile 5. */ - }, - .profile_cnt = 6, - }, - { - .name = "INGRESS_QOS_REMARK_CTRL_3_0", - .fid = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 404, 407 }, /* Profile 2. */ - { 404, 407 }, /* Profile 3. */ - { 404, 407 }, /* Profile 4. */ - { 404, 407 }, /* Profile 5. */ - }, - .profile_cnt = 6, - }, - { - .name = "INT_PRI_3_0", - .fid = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 384, 387 }, /* Profile 2. */ - { 384, 387 }, /* Profile 3. */ - { 384, 387 }, /* Profile 4. */ - { 384, 387 }, /* Profile 5. */ - }, - .profile_cnt = 6, - }, - { - .name = "L2_IIF_10_0", - .fid = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 128, 138 }, /* Profile 2. */ - { -1, -1 }, /* Profile 3. */ - { 128, 138 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "L2_OIF_10_0", - .fid = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { -1, -1 }, /* Profile 2. */ - { 208, 218 }, /* Profile 3. */ - { -1, -1 }, /* Profile 4. */ - { 208, 218 }, /* Profile 5. */ - }, - .profile_cnt = 6, - }, - { - .name = "L3_IIF_13_0", - .fid = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 352, 365 }, /* Profile 2. */ - { 352, 365 }, /* Profile 3. */ - { 352, 365 }, /* Profile 4. */ - { 352, 365 }, /* Profile 5. */ - }, - .profile_cnt = 6, - }, - { - .name = "L3_OIF_1_13_0", - .fid = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 224, 237 }, /* Profile 2. */ - { 224, 237 }, /* Profile 3. */ - { 224, 237 }, /* Profile 4. */ - { 224, 237 }, /* Profile 5. */ - }, - .profile_cnt = 6, - }, - { - .name = "MPLS_LABEL_DECAP_COUNT_3_0", - .fid = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_MPLS_LABEL_DECAP_COUNT_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 412, 415 }, /* Profile 2. */ - { 412, 415 }, /* Profile 3. */ - { 412, 415 }, /* Profile 4. */ - { 412, 415 }, /* Profile 5. */ - }, - .profile_cnt = 6, - }, - { - .name = "NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0", - .fid = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 336, 351 }, /* Profile 2. */ - { 336, 351 }, /* Profile 3. */ - { 336, 351 }, /* Profile 4. */ - { 336, 351 }, /* Profile 5. */ - }, - .profile_cnt = 6, - }, - { - .name = "NHOP_INDEX_1_15_0", - .fid = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 176, 191 }, /* Profile 2. */ - { 160, 175 }, /* Profile 3. */ - { 176, 191 }, /* Profile 4. */ - { 160, 175 }, /* Profile 5. */ - }, - .profile_cnt = 6, - }, - { - .name = "PARSER_VHLEN_0_15_0", - .fid = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 96, 111 }, /* Profile 2. */ - { 96, 111 }, /* Profile 3. */ - { 96, 111 }, /* Profile 4. */ - { 96, 111 }, /* Profile 5. */ - }, - .profile_cnt = 6, - }, - { - .name = "PKT_MISC_CTRL_0_3_0", - .fid = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 408, 411 }, /* Profile 2. */ - { 408, 411 }, /* Profile 3. */ - { 408, 411 }, /* Profile 4. */ - { 408, 411 }, /* Profile 5. */ - }, - .profile_cnt = 6, - }, - { - .name = "SVP_15_0", - .fid = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_SVP_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 192, 207 }, /* Profile 2. */ - { 176, 191 }, /* Profile 3. */ - { 192, 207 }, /* Profile 4. */ - { 176, 191 }, /* Profile 5. */ - }, - .profile_cnt = 6, - }, - { - .name = "SVP_NETWORK_GROUP_BITMAP_3_0", - .fid = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 400, 403 }, /* Profile 2. */ - { 400, 403 }, /* Profile 3. */ - { 400, 403 }, /* Profile 4. */ - { 400, 403 }, /* Profile 5. */ - }, - .profile_cnt = 6, - }, - { - .name = "SYSTEM_DESTINATION_15_0", - .fid = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 112, 127 }, /* Profile 2. */ - { 112, 127 }, /* Profile 3. */ - { 112, 127 }, /* Profile 4. */ - { 112, 127 }, /* Profile 5. */ - }, - .profile_cnt = 6, - }, - { - .name = "SYSTEM_OPCODE_3_0", - .fid = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 396, 399 }, /* Profile 2. */ - { 396, 399 }, /* Profile 3. */ - { 396, 399 }, /* Profile 4. */ - { 396, 399 }, /* Profile 5. */ - }, - .profile_cnt = 6, - }, - { - .name = "T_VLAN_TAG_VALUE_15_0", - .fid = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_T_VLAN_TAG_VALUE_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 272, 287 }, /* Profile 2. */ - { 272, 287 }, /* Profile 3. */ - { 272, 287 }, /* Profile 4. */ - { 272, 287 }, /* Profile 5. */ - }, - .profile_cnt = 6, - }, - { - .name = "TIMESTAMP_CTRL_3_0", - .fid = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 380, 383 }, /* Profile 2. */ - { 380, 383 }, /* Profile 3. */ - { 380, 383 }, /* Profile 4. */ - { 380, 383 }, /* Profile 5. */ - }, - .profile_cnt = 6, - }, - { - .name = "TUNNEL_PROCESSING_RESULTS_1_3_0", - .fid = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 392, 395 }, /* Profile 2. */ - { 392, 395 }, /* Profile 3. */ - { 392, 395 }, /* Profile 4. */ - { 392, 395 }, /* Profile 5. */ - }, - .profile_cnt = 6, - }, - { - .name = "VFI_15_0", - .fid = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_VFI_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 208, 223 }, /* Profile 2. */ - { 192, 207 }, /* Profile 3. */ - { 208, 223 }, /* Profile 4. */ - { 192, 207 }, /* Profile 5. */ - }, - .profile_cnt = 6, - }, - { - .name = "VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0", - .fid = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 388, 391 }, /* Profile 2. */ - { 388, 391 }, /* Profile 3. */ - { 388, 391 }, /* Profile 4. */ - { 388, 391 }, /* Profile 5. */ - }, - .profile_cnt = 6, - }, -}; -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_34_3_0_rxpmd_flex_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_34_3_0_rxpmd_flex_field_data, - .profile_bmp_cnt = 1, - .profile_bmp[0] = 0x3c, - -}; - -static shr_enum_map_t bcm56880_a0_nfa_6_5_34_3_0_rxpmd_flex_reason_names[] = { - BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT -}; - -static bcmpkt_flex_reasons_info_t bcm56880_a0_nfa_6_5_34_3_0_rxpmd_flex_reasons_info = { - .num_reasons = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RXPMD_FLEX_REASON_COUNT, - .reason_names = bcm56880_a0_nfa_6_5_34_3_0_rxpmd_flex_reason_names, - .reason_encode = bcm56880_a0_nfa_6_5_34_3_0_rxpmd_flex_reason_encode, - .reason_decode = bcm56880_a0_nfa_6_5_34_3_0_rxpmd_flex_reason_decode, -}; - - -static int32_t bcmpkt_arp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 24, 8); - - return ret; -} - -static int32_t bcmpkt_arp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_arp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_arp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_arp_t_operation_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 16); - - return ret; -} - -static int32_t bcmpkt_arp_t_operation_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_arp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 8); - - return ret; -} - -static int32_t bcmpkt_arp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_arp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_arp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_arp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_arp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_arp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_arp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_arp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_arp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_arp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_arp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_34_3_0_arp_t_fget[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ARP_T_FID_COUNT] = { - bcmpkt_arp_t_hardware_len_get, - bcmpkt_arp_t_hardware_type_get, - bcmpkt_arp_t_operation_get, - bcmpkt_arp_t_prot_addr_len_get, - bcmpkt_arp_t_protocol_type_get, - bcmpkt_arp_t_sender_ha_get, - bcmpkt_arp_t_sender_ip_get, - bcmpkt_arp_t_target_ha_get, - bcmpkt_arp_t_target_ip_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_34_3_0_arp_t_fset[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ARP_T_FID_COUNT] = { - bcmpkt_arp_t_hardware_len_set, - bcmpkt_arp_t_hardware_type_set, - bcmpkt_arp_t_operation_set, - bcmpkt_arp_t_prot_addr_len_set, - bcmpkt_arp_t_protocol_type_set, - bcmpkt_arp_t_sender_ha_set, - bcmpkt_arp_t_sender_ip_set, - bcmpkt_arp_t_target_ha_set, - bcmpkt_arp_t_target_ip_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_34_3_0_arp_t_field_data[] = { - BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_34_3_0_arp_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ARP_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_34_3_0_arp_t_field_data, -}; - - -static int32_t bcmpkt_authen_t_data_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_authen_t_data_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_authen_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_authen_t_next_header_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_authen_t_payload_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_authen_t_payload_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_authen_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_authen_t_reserved_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_authen_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_authen_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_authen_t_spi_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_authen_t_spi_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_34_3_0_authen_t_fget[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_AUTHEN_T_FID_COUNT] = { - bcmpkt_authen_t_data_get, - bcmpkt_authen_t_next_header_get, - bcmpkt_authen_t_payload_len_get, - bcmpkt_authen_t_reserved_get, - bcmpkt_authen_t_seq_num_get, - bcmpkt_authen_t_spi_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_34_3_0_authen_t_fset[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_AUTHEN_T_FID_COUNT] = { - bcmpkt_authen_t_data_set, - bcmpkt_authen_t_next_header_set, - bcmpkt_authen_t_payload_len_set, - bcmpkt_authen_t_reserved_set, - bcmpkt_authen_t_seq_num_set, - bcmpkt_authen_t_spi_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_34_3_0_authen_t_field_data[] = { - BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_34_3_0_authen_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_AUTHEN_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_34_3_0_authen_t_field_data, -}; - - -static int32_t bcmpkt_bfd_t_desmintxintv_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_bfd_t_desmintxintv_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_bfd_t_minechorxintv_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_bfd_t_minechorxintv_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_bfd_t_reqminrxintv_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_bfd_t_reqminrxintv_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_bfd_t_ap_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 18, 1); - - return ret; -} - -static int32_t bcmpkt_bfd_t_ap_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 18, 1, val); - return ret; -} - -static int32_t bcmpkt_bfd_t_bfd_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 8); - - return ret; -} - -static int32_t bcmpkt_bfd_t_bfd_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 8, val); - return ret; -} - -static int32_t bcmpkt_bfd_t_cpi_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 19, 1); - - return ret; -} - -static int32_t bcmpkt_bfd_t_cpi_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 19, 1, val); - return ret; -} - -static int32_t bcmpkt_bfd_t_dem_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 17, 1); - - return ret; -} - -static int32_t bcmpkt_bfd_t_dem_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 17, 1, val); - return ret; -} - -static int32_t bcmpkt_bfd_t_detectmult_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 8, 8); - - return ret; -} - -static int32_t bcmpkt_bfd_t_detectmult_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 8, 8, val); - return ret; -} - -static int32_t bcmpkt_bfd_t_diag_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 5); - - return ret; -} - -static int32_t bcmpkt_bfd_t_diag_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 5, val); - return ret; -} - -static int32_t bcmpkt_bfd_t_fin_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 20, 1); - - return ret; -} - -static int32_t bcmpkt_bfd_t_fin_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 20, 1, val); - return ret; -} - -static int32_t bcmpkt_bfd_t_mpt_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 1); - - return ret; -} - -static int32_t bcmpkt_bfd_t_mpt_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 1, val); - return ret; -} - -static int32_t bcmpkt_bfd_t_mydiscrim_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_bfd_t_mydiscrim_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_bfd_t_poll_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 21, 1); - - return ret; -} - -static int32_t bcmpkt_bfd_t_poll_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 21, 1, val); - return ret; -} - -static int32_t bcmpkt_bfd_t_sta_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 22, 2); - - return ret; -} - -static int32_t bcmpkt_bfd_t_sta_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 22, 2, val); - return ret; -} - -static int32_t bcmpkt_bfd_t_urdiscrim_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_bfd_t_urdiscrim_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_bfd_t_version_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 29, 3); - - return ret; -} - -static int32_t bcmpkt_bfd_t_version_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 29, 3, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_34_3_0_bfd_t_fget[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_BFD_T_FID_COUNT] = { - bcmpkt_bfd_t_ap_get, - bcmpkt_bfd_t_bfd_length_get, - bcmpkt_bfd_t_cpi_get, - bcmpkt_bfd_t_dem_get, - bcmpkt_bfd_t_desmintxintv_get, - bcmpkt_bfd_t_detectmult_get, - bcmpkt_bfd_t_diag_get, - bcmpkt_bfd_t_fin_get, - bcmpkt_bfd_t_minechorxintv_get, - bcmpkt_bfd_t_mpt_get, - bcmpkt_bfd_t_mydiscrim_get, - bcmpkt_bfd_t_poll_get, - bcmpkt_bfd_t_reqminrxintv_get, - bcmpkt_bfd_t_sta_get, - bcmpkt_bfd_t_urdiscrim_get, - bcmpkt_bfd_t_version_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_34_3_0_bfd_t_fset[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_BFD_T_FID_COUNT] = { - bcmpkt_bfd_t_ap_set, - bcmpkt_bfd_t_bfd_length_set, - bcmpkt_bfd_t_cpi_set, - bcmpkt_bfd_t_dem_set, - bcmpkt_bfd_t_desmintxintv_set, - bcmpkt_bfd_t_detectmult_set, - bcmpkt_bfd_t_diag_set, - bcmpkt_bfd_t_fin_set, - bcmpkt_bfd_t_minechorxintv_set, - bcmpkt_bfd_t_mpt_set, - bcmpkt_bfd_t_mydiscrim_set, - bcmpkt_bfd_t_poll_set, - bcmpkt_bfd_t_reqminrxintv_set, - bcmpkt_bfd_t_sta_set, - bcmpkt_bfd_t_urdiscrim_set, - bcmpkt_bfd_t_version_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_34_3_0_bfd_t_field_data[] = { - BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_34_3_0_bfd_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_BFD_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_34_3_0_bfd_t_field_data, -}; - - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_34_3_0_cpu_composites_0_t_fget[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { - bcmpkt_cpu_composites_0_t_dma_cont0_get, - bcmpkt_cpu_composites_0_t_dma_cont1_get, - bcmpkt_cpu_composites_0_t_dma_cont2_get, - bcmpkt_cpu_composites_0_t_dma_cont3_get, - bcmpkt_cpu_composites_0_t_dma_cont4_get, - bcmpkt_cpu_composites_0_t_dma_cont5_get, - bcmpkt_cpu_composites_0_t_dma_cont6_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_34_3_0_cpu_composites_0_t_fset[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { - bcmpkt_cpu_composites_0_t_dma_cont0_set, - bcmpkt_cpu_composites_0_t_dma_cont1_set, - bcmpkt_cpu_composites_0_t_dma_cont2_set, - bcmpkt_cpu_composites_0_t_dma_cont3_set, - bcmpkt_cpu_composites_0_t_dma_cont4_set, - bcmpkt_cpu_composites_0_t_dma_cont5_set, - bcmpkt_cpu_composites_0_t_dma_cont6_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_34_3_0_cpu_composites_0_t_field_data[] = { - BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_34_3_0_cpu_composites_0_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_34_3_0_cpu_composites_0_t_field_data, -}; - - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_34_3_0_cpu_composites_1_t_fget[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { - bcmpkt_cpu_composites_1_t_dma_cont10_get, - bcmpkt_cpu_composites_1_t_dma_cont11_get, - bcmpkt_cpu_composites_1_t_dma_cont12_get, - bcmpkt_cpu_composites_1_t_dma_cont13_get, - bcmpkt_cpu_composites_1_t_dma_cont14_get, - bcmpkt_cpu_composites_1_t_dma_cont15_get, - bcmpkt_cpu_composites_1_t_dma_cont16_get, - bcmpkt_cpu_composites_1_t_dma_cont17_get, - bcmpkt_cpu_composites_1_t_dma_cont7_get, - bcmpkt_cpu_composites_1_t_dma_cont8_get, - bcmpkt_cpu_composites_1_t_dma_cont9_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_34_3_0_cpu_composites_1_t_fset[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { - bcmpkt_cpu_composites_1_t_dma_cont10_set, - bcmpkt_cpu_composites_1_t_dma_cont11_set, - bcmpkt_cpu_composites_1_t_dma_cont12_set, - bcmpkt_cpu_composites_1_t_dma_cont13_set, - bcmpkt_cpu_composites_1_t_dma_cont14_set, - bcmpkt_cpu_composites_1_t_dma_cont15_set, - bcmpkt_cpu_composites_1_t_dma_cont16_set, - bcmpkt_cpu_composites_1_t_dma_cont17_set, - bcmpkt_cpu_composites_1_t_dma_cont7_set, - bcmpkt_cpu_composites_1_t_dma_cont8_set, - bcmpkt_cpu_composites_1_t_dma_cont9_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_34_3_0_cpu_composites_1_t_field_data[] = { - BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_34_3_0_cpu_composites_1_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_34_3_0_cpu_composites_1_t_field_data, -}; - - -static int32_t bcmpkt_dest_option_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_dest_option_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_dest_option_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_dest_option_t_next_header_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_dest_option_t_option_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_dest_option_t_option_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_34_3_0_dest_option_t_fget[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = { - bcmpkt_dest_option_t_hdr_ext_len_get, - bcmpkt_dest_option_t_next_header_get, - bcmpkt_dest_option_t_option_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_34_3_0_dest_option_t_fset[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = { - bcmpkt_dest_option_t_hdr_ext_len_set, - bcmpkt_dest_option_t_next_header_set, - bcmpkt_dest_option_t_option_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_34_3_0_dest_option_t_field_data[] = { - BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_34_3_0_dest_option_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_DEST_OPTION_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_34_3_0_dest_option_t_field_data, -}; - - -static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 11, 2); - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 11, 2, val); - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 13, 3); - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 13, 3, val); - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 16, 16); - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 0, 16); - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 10); - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 10, val); - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_t_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 10, 1); - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_t_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 10, 1, val); - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 28, 4); - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 28, 4, val); - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 12); - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 12, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_34_3_0_erspan3_fixed_hdr_t_fget[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { - bcmpkt_erspan3_fixed_hdr_t_bso_get, - bcmpkt_erspan3_fixed_hdr_t_cos_get, - bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get, - bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get, - bcmpkt_erspan3_fixed_hdr_t_session_id_get, - bcmpkt_erspan3_fixed_hdr_t_t_get, - bcmpkt_erspan3_fixed_hdr_t_timestamp_get, - bcmpkt_erspan3_fixed_hdr_t_ver_get, - bcmpkt_erspan3_fixed_hdr_t_vlan_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_34_3_0_erspan3_fixed_hdr_t_fset[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { - bcmpkt_erspan3_fixed_hdr_t_bso_set, - bcmpkt_erspan3_fixed_hdr_t_cos_set, - bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set, - bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set, - bcmpkt_erspan3_fixed_hdr_t_session_id_set, - bcmpkt_erspan3_fixed_hdr_t_t_set, - bcmpkt_erspan3_fixed_hdr_t_timestamp_set, - bcmpkt_erspan3_fixed_hdr_t_ver_set, - bcmpkt_erspan3_fixed_hdr_t_vlan_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_34_3_0_erspan3_fixed_hdr_t_field_data[] = { - BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_34_3_0_erspan3_fixed_hdr_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_34_3_0_erspan3_fixed_hdr_t_field_data, -}; - - -static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 26, 6); - - return ret; -} - -static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 26, 6, val); - return ret; -} - -static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 10); - - return ret; -} - -static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 10, val); - return ret; -} - -static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_34_3_0_erspan3_subhdr_5_t_fget[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { - bcmpkt_erspan3_subhdr_5_t_platform_id_get, - bcmpkt_erspan3_subhdr_5_t_port_id_get, - bcmpkt_erspan3_subhdr_5_t_switch_id_get, - bcmpkt_erspan3_subhdr_5_t_timestamp_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_34_3_0_erspan3_subhdr_5_t_fset[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { - bcmpkt_erspan3_subhdr_5_t_platform_id_set, - bcmpkt_erspan3_subhdr_5_t_port_id_set, - bcmpkt_erspan3_subhdr_5_t_switch_id_set, - bcmpkt_erspan3_subhdr_5_t_timestamp_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_34_3_0_erspan3_subhdr_5_t_field_data[] = { - BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_34_3_0_erspan3_subhdr_5_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_34_3_0_erspan3_subhdr_5_t_field_data, -}; - - -static int32_t bcmpkt_esp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 0, 8); - - return ret; -} - -static int32_t bcmpkt_esp_t_next_header_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 0, 8, val); - return ret; -} - -static int32_t bcmpkt_esp_t_pad_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 8, 16); - - return ret; -} - -static int32_t bcmpkt_esp_t_pad_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 8, 16, val); - return ret; -} - -static int32_t bcmpkt_esp_t_pad_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 24, 8); - - return ret; -} - -static int32_t bcmpkt_esp_t_pad_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_esp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_esp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_esp_t_spi_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_esp_t_spi_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_34_3_0_esp_t_fget[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ESP_T_FID_COUNT] = { - bcmpkt_esp_t_next_header_get, - bcmpkt_esp_t_pad_get, - bcmpkt_esp_t_pad_len_get, - bcmpkt_esp_t_seq_num_get, - bcmpkt_esp_t_spi_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_34_3_0_esp_t_fset[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ESP_T_FID_COUNT] = { - bcmpkt_esp_t_next_header_set, - bcmpkt_esp_t_pad_set, - bcmpkt_esp_t_pad_len_set, - bcmpkt_esp_t_seq_num_set, - bcmpkt_esp_t_spi_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_34_3_0_esp_t_field_data[] = { - BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_34_3_0_esp_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ESP_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_34_3_0_esp_t_field_data, -}; - - -static int32_t bcmpkt_etag_t_pcp_dei_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 12, 4); - - return ret; -} - -static int32_t bcmpkt_etag_t_pcp_dei_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 12, 4, val); - return ret; -} - -static int32_t bcmpkt_etag_t_rsrvd0_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 30, 2); - - return ret; -} - -static int32_t bcmpkt_etag_t_rsrvd0_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 30, 2, val); - return ret; -} - -static int32_t bcmpkt_etag_t_rsrvd1_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 16); - - return ret; -} - -static int32_t bcmpkt_etag_t_rsrvd1_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_etag_t_svid_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 12); - - return ret; -} - -static int32_t bcmpkt_etag_t_svid_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 12, val); - return ret; -} - -static int32_t bcmpkt_etag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_etag_t_tpid_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_etag_t_vid_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 14); - - return ret; -} - -static int32_t bcmpkt_etag_t_vid_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 14, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_34_3_0_etag_t_fget[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ETAG_T_FID_COUNT] = { - bcmpkt_etag_t_pcp_dei_get, - bcmpkt_etag_t_rsrvd0_get, - bcmpkt_etag_t_rsrvd1_get, - bcmpkt_etag_t_svid_get, - bcmpkt_etag_t_tpid_get, - bcmpkt_etag_t_vid_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_34_3_0_etag_t_fset[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ETAG_T_FID_COUNT] = { - bcmpkt_etag_t_pcp_dei_set, - bcmpkt_etag_t_rsrvd0_set, - bcmpkt_etag_t_rsrvd1_set, - bcmpkt_etag_t_svid_set, - bcmpkt_etag_t_tpid_set, - bcmpkt_etag_t_vid_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_34_3_0_etag_t_field_data[] = { - BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ETAG_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_34_3_0_etag_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ETAG_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_34_3_0_etag_t_field_data, -}; - - -static int32_t bcmpkt_ethertype_t_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_ethertype_t_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_34_3_0_ethertype_t_fget[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = { - bcmpkt_ethertype_t_type_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_34_3_0_ethertype_t_fset[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = { - bcmpkt_ethertype_t_type_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_34_3_0_ethertype_t_field_data[] = { - BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_34_3_0_ethertype_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ETHERTYPE_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_34_3_0_ethertype_t_field_data, -}; - - -static int32_t bcmpkt_frag_t_frag_info_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_frag_t_frag_info_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_frag_t_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_frag_t_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_frag_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_frag_t_next_header_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_frag_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_frag_t_reserved_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_34_3_0_frag_t_fget[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_FRAG_T_FID_COUNT] = { - bcmpkt_frag_t_frag_info_get, - bcmpkt_frag_t_id_get, - bcmpkt_frag_t_next_header_get, - bcmpkt_frag_t_reserved_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_34_3_0_frag_t_fset[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_FRAG_T_FID_COUNT] = { - bcmpkt_frag_t_frag_info_set, - bcmpkt_frag_t_id_set, - bcmpkt_frag_t_next_header_set, - bcmpkt_frag_t_reserved_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_34_3_0_frag_t_field_data[] = { - BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_34_3_0_frag_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_FRAG_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_34_3_0_frag_t_field_data, -}; - - -static int32_t bcmpkt_generic_loopback_t_destination_obj_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 16); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_destination_obj_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_destination_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 24, 4); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_destination_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 24, 4, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_entropy_obj_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[3], 16, 16); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_entropy_obj_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[3], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_flags_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 4); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_flags_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 4, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_header_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 20, 4); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_header_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 20, 4, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_input_priority_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 12, 4); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_input_priority_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 12, 4, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_interface_ctrl_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 4, 4); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_interface_ctrl_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 4, 4, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_interface_obj_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 0, 16); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_interface_obj_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 4); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 4, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 28, 4); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 28, 4, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_qos_obj_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 8); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_qos_obj_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_reserved_1_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 8, 4); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_reserved_1_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 8, 4, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_reserved_2_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[3], 0, 16); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_reserved_2_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[3], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_source_system_port_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 16, 16); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_source_system_port_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_start_byte_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_start_byte_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_34_3_0_generic_loopback_t_fget[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { - bcmpkt_generic_loopback_t_destination_obj_get, - bcmpkt_generic_loopback_t_destination_type_get, - bcmpkt_generic_loopback_t_entropy_obj_get, - bcmpkt_generic_loopback_t_flags_get, - bcmpkt_generic_loopback_t_header_type_get, - bcmpkt_generic_loopback_t_input_priority_get, - bcmpkt_generic_loopback_t_interface_ctrl_get, - bcmpkt_generic_loopback_t_interface_obj_get, - bcmpkt_generic_loopback_t_processing_ctrl_0_get, - bcmpkt_generic_loopback_t_processing_ctrl_1_get, - bcmpkt_generic_loopback_t_qos_obj_get, - bcmpkt_generic_loopback_t_reserved_1_get, - bcmpkt_generic_loopback_t_reserved_2_get, - bcmpkt_generic_loopback_t_source_system_port_get, - bcmpkt_generic_loopback_t_start_byte_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_34_3_0_generic_loopback_t_fset[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { - bcmpkt_generic_loopback_t_destination_obj_set, - bcmpkt_generic_loopback_t_destination_type_set, - bcmpkt_generic_loopback_t_entropy_obj_set, - bcmpkt_generic_loopback_t_flags_set, - bcmpkt_generic_loopback_t_header_type_set, - bcmpkt_generic_loopback_t_input_priority_set, - bcmpkt_generic_loopback_t_interface_ctrl_set, - bcmpkt_generic_loopback_t_interface_obj_set, - bcmpkt_generic_loopback_t_processing_ctrl_0_set, - bcmpkt_generic_loopback_t_processing_ctrl_1_set, - bcmpkt_generic_loopback_t_qos_obj_set, - bcmpkt_generic_loopback_t_reserved_1_set, - bcmpkt_generic_loopback_t_reserved_2_set, - bcmpkt_generic_loopback_t_source_system_port_set, - bcmpkt_generic_loopback_t_start_byte_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_34_3_0_generic_loopback_t_field_data[] = { - BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_34_3_0_generic_loopback_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_34_3_0_generic_loopback_t_field_data, -}; - - -static int32_t bcmpkt_gpe_t_flags_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_gpe_t_flags_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_gpe_t_next_protocol_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 8); - - return ret; -} - -static int32_t bcmpkt_gpe_t_next_protocol_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 8, val); - return ret; -} - -static int32_t bcmpkt_gpe_t_reserved0_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 8, 16); - - return ret; -} - -static int32_t bcmpkt_gpe_t_reserved0_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 8, 16, val); - return ret; -} - -static int32_t bcmpkt_gpe_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 8); - - return ret; -} - -static int32_t bcmpkt_gpe_t_reserved1_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 8, val); - return ret; -} - -static int32_t bcmpkt_gpe_t_vni_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 8, 24); - - return ret; -} - -static int32_t bcmpkt_gpe_t_vni_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 8, 24, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_34_3_0_gpe_t_fget[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GPE_T_FID_COUNT] = { - bcmpkt_gpe_t_flags_get, - bcmpkt_gpe_t_next_protocol_get, - bcmpkt_gpe_t_reserved0_get, - bcmpkt_gpe_t_reserved1_get, - bcmpkt_gpe_t_vni_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_34_3_0_gpe_t_fset[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GPE_T_FID_COUNT] = { - bcmpkt_gpe_t_flags_set, - bcmpkt_gpe_t_next_protocol_set, - bcmpkt_gpe_t_reserved0_set, - bcmpkt_gpe_t_reserved1_set, - bcmpkt_gpe_t_vni_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_34_3_0_gpe_t_field_data[] = { - BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_34_3_0_gpe_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GPE_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_34_3_0_gpe_t_field_data, -}; - - -static int32_t bcmpkt_gre_chksum_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_gre_chksum_t_checksum_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_gre_chksum_t_offset_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_gre_chksum_t_offset_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_34_3_0_gre_chksum_t_fget[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = { - bcmpkt_gre_chksum_t_checksum_get, - bcmpkt_gre_chksum_t_offset_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_34_3_0_gre_chksum_t_fset[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = { - bcmpkt_gre_chksum_t_checksum_set, - bcmpkt_gre_chksum_t_offset_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_34_3_0_gre_chksum_t_field_data[] = { - BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_34_3_0_gre_chksum_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_34_3_0_gre_chksum_t_field_data, -}; - - -static int32_t bcmpkt_gre_key_t_vn_id_lower_entropy_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_gre_key_t_vn_id_lower_entropy_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_gre_key_t_vn_id_upper_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_gre_key_t_vn_id_upper_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_34_3_0_gre_key_t_fget[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GRE_KEY_T_FID_COUNT] = { - bcmpkt_gre_key_t_vn_id_lower_entropy_get, - bcmpkt_gre_key_t_vn_id_upper_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_34_3_0_gre_key_t_fset[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GRE_KEY_T_FID_COUNT] = { - bcmpkt_gre_key_t_vn_id_lower_entropy_set, - bcmpkt_gre_key_t_vn_id_upper_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_34_3_0_gre_key_t_field_data[] = { - BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_34_3_0_gre_key_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GRE_KEY_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_34_3_0_gre_key_t_field_data, -}; - - -static int32_t bcmpkt_gre_rout_t_routing_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_gre_rout_t_routing_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_34_3_0_gre_rout_t_fget[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = { - bcmpkt_gre_rout_t_routing_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_34_3_0_gre_rout_t_fset[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = { - bcmpkt_gre_rout_t_routing_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_34_3_0_gre_rout_t_field_data[] = { - BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_34_3_0_gre_rout_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GRE_ROUT_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_34_3_0_gre_rout_t_field_data, -}; - - -static int32_t bcmpkt_gre_seq_t_sequence_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_gre_seq_t_sequence_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_34_3_0_gre_seq_t_fget[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = { - bcmpkt_gre_seq_t_sequence_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_34_3_0_gre_seq_t_fset[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = { - bcmpkt_gre_seq_t_sequence_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_34_3_0_gre_seq_t_field_data[] = { - BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_34_3_0_gre_seq_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GRE_SEQ_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_34_3_0_gre_seq_t_field_data, -}; - - -static int32_t bcmpkt_gre_t_c_r_k_s_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 28, 4); - - return ret; -} - -static int32_t bcmpkt_gre_t_c_r_k_s_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 28, 4, val); - return ret; -} - -static int32_t bcmpkt_gre_t_protocol_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_gre_t_protocol_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_gre_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 19, 9); - - return ret; -} - -static int32_t bcmpkt_gre_t_reserved_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 19, 9, val); - return ret; -} - -static int32_t bcmpkt_gre_t_version_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 3); - - return ret; -} - -static int32_t bcmpkt_gre_t_version_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 3, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_34_3_0_gre_t_fget[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GRE_T_FID_COUNT] = { - bcmpkt_gre_t_c_r_k_s_get, - bcmpkt_gre_t_protocol_get, - bcmpkt_gre_t_reserved_get, - bcmpkt_gre_t_version_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_34_3_0_gre_t_fset[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GRE_T_FID_COUNT] = { - bcmpkt_gre_t_c_r_k_s_set, - bcmpkt_gre_t_protocol_set, - bcmpkt_gre_t_reserved_set, - bcmpkt_gre_t_version_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_34_3_0_gre_t_field_data[] = { - BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_34_3_0_gre_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GRE_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_34_3_0_gre_t_field_data, -}; - - -static int32_t bcmpkt_gtp_12byte_t_bytes_11_8_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_gtp_12byte_t_bytes_11_8_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_gtp_12byte_t_bytes_3_0_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_gtp_12byte_t_bytes_3_0_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_gtp_12byte_t_bytes_7_4_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_gtp_12byte_t_bytes_7_4_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_34_3_0_gtp_12byte_t_fget[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GTP_12BYTE_T_FID_COUNT] = { - bcmpkt_gtp_12byte_t_bytes_11_8_get, - bcmpkt_gtp_12byte_t_bytes_3_0_get, - bcmpkt_gtp_12byte_t_bytes_7_4_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_34_3_0_gtp_12byte_t_fset[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GTP_12BYTE_T_FID_COUNT] = { - bcmpkt_gtp_12byte_t_bytes_11_8_set, - bcmpkt_gtp_12byte_t_bytes_3_0_set, - bcmpkt_gtp_12byte_t_bytes_7_4_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_34_3_0_gtp_12byte_t_field_data[] = { - BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GTP_12BYTE_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_34_3_0_gtp_12byte_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GTP_12BYTE_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_34_3_0_gtp_12byte_t_field_data, -}; - - -static int32_t bcmpkt_gtp_8byte_t_bytes_3_0_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_gtp_8byte_t_bytes_3_0_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_gtp_8byte_t_bytes_7_4_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_gtp_8byte_t_bytes_7_4_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_34_3_0_gtp_8byte_t_fget[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GTP_8BYTE_T_FID_COUNT] = { - bcmpkt_gtp_8byte_t_bytes_3_0_get, - bcmpkt_gtp_8byte_t_bytes_7_4_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_34_3_0_gtp_8byte_t_fset[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GTP_8BYTE_T_FID_COUNT] = { - bcmpkt_gtp_8byte_t_bytes_3_0_set, - bcmpkt_gtp_8byte_t_bytes_7_4_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_34_3_0_gtp_8byte_t_field_data[] = { - BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GTP_8BYTE_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_34_3_0_gtp_8byte_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GTP_8BYTE_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_34_3_0_gtp_8byte_t_field_data, -}; - - -static int32_t bcmpkt_gtp_ext_4byte_t_ext_hdr_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_gtp_ext_4byte_t_ext_hdr_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_34_3_0_gtp_ext_4byte_t_fget[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GTP_EXT_4BYTE_T_FID_COUNT] = { - bcmpkt_gtp_ext_4byte_t_ext_hdr_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_34_3_0_gtp_ext_4byte_t_fset[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GTP_EXT_4BYTE_T_FID_COUNT] = { - bcmpkt_gtp_ext_4byte_t_ext_hdr_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_34_3_0_gtp_ext_4byte_t_field_data[] = { - BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GTP_EXT_4BYTE_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_34_3_0_gtp_ext_4byte_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GTP_EXT_4BYTE_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_34_3_0_gtp_ext_4byte_t_field_data, -}; - - -static int32_t bcmpkt_gtp_with_ext_t_bytes_11_8_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_gtp_with_ext_t_bytes_11_8_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_gtp_with_ext_t_bytes_3_0_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_gtp_with_ext_t_bytes_3_0_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_gtp_with_ext_t_bytes_7_4_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_gtp_with_ext_t_bytes_7_4_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_34_3_0_gtp_with_ext_t_fget[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GTP_WITH_EXT_T_FID_COUNT] = { - bcmpkt_gtp_with_ext_t_bytes_11_8_get, - bcmpkt_gtp_with_ext_t_bytes_3_0_get, - bcmpkt_gtp_with_ext_t_bytes_7_4_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_34_3_0_gtp_with_ext_t_fset[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GTP_WITH_EXT_T_FID_COUNT] = { - bcmpkt_gtp_with_ext_t_bytes_11_8_set, - bcmpkt_gtp_with_ext_t_bytes_3_0_set, - bcmpkt_gtp_with_ext_t_bytes_7_4_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_34_3_0_gtp_with_ext_t_field_data[] = { - BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GTP_WITH_EXT_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_34_3_0_gtp_with_ext_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_GTP_WITH_EXT_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_34_3_0_gtp_with_ext_t_field_data, -}; - - -static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_hop_by_hop_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_hop_by_hop_t_next_header_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_hop_by_hop_t_option_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_hop_by_hop_t_option_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_34_3_0_hop_by_hop_t_fget[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = { - bcmpkt_hop_by_hop_t_hdr_ext_len_get, - bcmpkt_hop_by_hop_t_next_header_get, - bcmpkt_hop_by_hop_t_option_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_34_3_0_hop_by_hop_t_fset[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = { - bcmpkt_hop_by_hop_t_hdr_ext_len_set, - bcmpkt_hop_by_hop_t_next_header_set, - bcmpkt_hop_by_hop_t_option_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_34_3_0_hop_by_hop_t_field_data[] = { - BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_34_3_0_hop_by_hop_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_34_3_0_hop_by_hop_t_field_data, -}; - - -static int32_t bcmpkt_icmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_icmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_icmp_t_code_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_icmp_t_code_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_icmp_t_icmp_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_icmp_t_icmp_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_34_3_0_icmp_t_fget[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ICMP_T_FID_COUNT] = { - bcmpkt_icmp_t_checksum_get, - bcmpkt_icmp_t_code_get, - bcmpkt_icmp_t_icmp_type_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_34_3_0_icmp_t_fset[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ICMP_T_FID_COUNT] = { - bcmpkt_icmp_t_checksum_set, - bcmpkt_icmp_t_code_set, - bcmpkt_icmp_t_icmp_type_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_34_3_0_icmp_t_field_data[] = { - BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_34_3_0_icmp_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ICMP_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_34_3_0_icmp_t_field_data, -}; - - -static int32_t bcmpkt_igmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_igmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_igmp_t_group_address_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_igmp_t_group_address_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_igmp_t_igmp_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_igmp_t_igmp_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_igmp_t_max_resp_time_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_igmp_t_max_resp_time_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_34_3_0_igmp_t_fget[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IGMP_T_FID_COUNT] = { - bcmpkt_igmp_t_checksum_get, - bcmpkt_igmp_t_group_address_get, - bcmpkt_igmp_t_igmp_type_get, - bcmpkt_igmp_t_max_resp_time_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_34_3_0_igmp_t_fset[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IGMP_T_FID_COUNT] = { - bcmpkt_igmp_t_checksum_set, - bcmpkt_igmp_t_group_address_set, - bcmpkt_igmp_t_igmp_type_set, - bcmpkt_igmp_t_max_resp_time_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_34_3_0_igmp_t_field_data[] = { - BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_34_3_0_igmp_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IGMP_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_34_3_0_igmp_t_field_data, -}; - - -static int32_t bcmpkt_ipfix_t_export_time_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipfix_t_export_time_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipfix_t_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_ipfix_t_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_ipfix_t_obs_domain_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipfix_t_obs_domain_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipfix_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipfix_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipfix_t_version_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_ipfix_t_version_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_34_3_0_ipfix_t_fget[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IPFIX_T_FID_COUNT] = { - bcmpkt_ipfix_t_export_time_get, - bcmpkt_ipfix_t_length_get, - bcmpkt_ipfix_t_obs_domain_id_get, - bcmpkt_ipfix_t_sequence_num_get, - bcmpkt_ipfix_t_version_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_34_3_0_ipfix_t_fset[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IPFIX_T_FID_COUNT] = { - bcmpkt_ipfix_t_export_time_set, - bcmpkt_ipfix_t_length_set, - bcmpkt_ipfix_t_obs_domain_id_set, - bcmpkt_ipfix_t_sequence_num_set, - bcmpkt_ipfix_t_version_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_34_3_0_ipfix_t_field_data[] = { - BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_34_3_0_ipfix_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IPFIX_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_34_3_0_ipfix_t_field_data, -}; - - -static int32_t bcmpkt_ipv4_t_da_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv4_t_da_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv4_t_flags_frag_offset_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 16); - - return ret; -} - -static int32_t bcmpkt_ipv4_t_flags_frag_offset_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_ipv4_t_hdr_checksum_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 0, 16); - - return ret; -} - -static int32_t bcmpkt_ipv4_t_hdr_checksum_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_ipv4_t_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 16); - - return ret; -} - -static int32_t bcmpkt_ipv4_t_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_ipv4_t_option_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv4_t_option_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv4_t_protocol_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 16, 8); - - return ret; -} - -static int32_t bcmpkt_ipv4_t_protocol_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_ipv4_t_sa_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv4_t_sa_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv4_t_tos_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_ipv4_t_tos_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_ipv4_t_total_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_ipv4_t_total_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_ipv4_t_ttl_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 24, 8); - - return ret; -} - -static int32_t bcmpkt_ipv4_t_ttl_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_ipv4_t_version_hdr_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_ipv4_t_version_hdr_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_34_3_0_ipv4_t_fget[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IPV4_T_FID_COUNT] = { - bcmpkt_ipv4_t_da_get, - bcmpkt_ipv4_t_flags_frag_offset_get, - bcmpkt_ipv4_t_hdr_checksum_get, - bcmpkt_ipv4_t_id_get, - bcmpkt_ipv4_t_option_get, - bcmpkt_ipv4_t_protocol_get, - bcmpkt_ipv4_t_sa_get, - bcmpkt_ipv4_t_tos_get, - bcmpkt_ipv4_t_total_length_get, - bcmpkt_ipv4_t_ttl_get, - bcmpkt_ipv4_t_version_hdr_len_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_34_3_0_ipv4_t_fset[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IPV4_T_FID_COUNT] = { - bcmpkt_ipv4_t_da_set, - bcmpkt_ipv4_t_flags_frag_offset_set, - bcmpkt_ipv4_t_hdr_checksum_set, - bcmpkt_ipv4_t_id_set, - bcmpkt_ipv4_t_option_set, - bcmpkt_ipv4_t_protocol_set, - bcmpkt_ipv4_t_sa_set, - bcmpkt_ipv4_t_tos_set, - bcmpkt_ipv4_t_total_length_set, - bcmpkt_ipv4_t_ttl_set, - bcmpkt_ipv4_t_version_hdr_len_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_34_3_0_ipv4_t_field_data[] = { - BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_34_3_0_ipv4_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IPV4_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_34_3_0_ipv4_t_field_data, -}; - - -static int32_t bcmpkt_ipv6_t_da_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv6_t_da_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv6_t_flow_label_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 20); - - return ret; -} - -static int32_t bcmpkt_ipv6_t_flow_label_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 20, val); - return ret; -} - -static int32_t bcmpkt_ipv6_t_hop_limit_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 8); - - return ret; -} - -static int32_t bcmpkt_ipv6_t_hop_limit_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 8, val); - return ret; -} - -static int32_t bcmpkt_ipv6_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 8, 8); - - return ret; -} - -static int32_t bcmpkt_ipv6_t_next_header_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 8, 8, val); - return ret; -} - -static int32_t bcmpkt_ipv6_t_payload_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 16); - - return ret; -} - -static int32_t bcmpkt_ipv6_t_payload_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_ipv6_t_sa_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv6_t_sa_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv6_t_traffic_class_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 20, 8); - - return ret; -} - -static int32_t bcmpkt_ipv6_t_traffic_class_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 20, 8, val); - return ret; -} - -static int32_t bcmpkt_ipv6_t_version_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 28, 4); - - return ret; -} - -static int32_t bcmpkt_ipv6_t_version_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 28, 4, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_34_3_0_ipv6_t_fget[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IPV6_T_FID_COUNT] = { - bcmpkt_ipv6_t_da_get, - bcmpkt_ipv6_t_flow_label_get, - bcmpkt_ipv6_t_hop_limit_get, - bcmpkt_ipv6_t_next_header_get, - bcmpkt_ipv6_t_payload_length_get, - bcmpkt_ipv6_t_sa_get, - bcmpkt_ipv6_t_traffic_class_get, - bcmpkt_ipv6_t_version_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_34_3_0_ipv6_t_fset[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IPV6_T_FID_COUNT] = { - bcmpkt_ipv6_t_da_set, - bcmpkt_ipv6_t_flow_label_set, - bcmpkt_ipv6_t_hop_limit_set, - bcmpkt_ipv6_t_next_header_set, - bcmpkt_ipv6_t_payload_length_set, - bcmpkt_ipv6_t_sa_set, - bcmpkt_ipv6_t_traffic_class_set, - bcmpkt_ipv6_t_version_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_34_3_0_ipv6_t_field_data[] = { - BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_34_3_0_ipv6_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_IPV6_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_34_3_0_ipv6_t_field_data, -}; - - -static int32_t bcmpkt_l2_t_macda_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_l2_t_macda_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_l2_t_macsa_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_l2_t_macsa_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_34_3_0_l2_t_fget[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_L2_T_FID_COUNT] = { - bcmpkt_l2_t_macda_get, - bcmpkt_l2_t_macsa_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_34_3_0_l2_t_fset[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_L2_T_FID_COUNT] = { - bcmpkt_l2_t_macda_set, - bcmpkt_l2_t_macsa_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_34_3_0_l2_t_field_data[] = { - BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_34_3_0_l2_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_L2_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_34_3_0_l2_t_field_data, -}; - - -static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_34_3_0_mirror_erspan_sn_t_fget[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { - bcmpkt_mirror_erspan_sn_t_seq_num_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_34_3_0_mirror_erspan_sn_t_fset[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { - bcmpkt_mirror_erspan_sn_t_seq_num_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_34_3_0_mirror_erspan_sn_t_field_data[] = { - BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_34_3_0_mirror_erspan_sn_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_34_3_0_mirror_erspan_sn_t_field_data, -}; - - -static int32_t bcmpkt_mirror_transport_t_data_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_mirror_transport_t_data_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_34_3_0_mirror_transport_t_fget[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { - bcmpkt_mirror_transport_t_data_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_34_3_0_mirror_transport_t_fset[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { - bcmpkt_mirror_transport_t_data_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_34_3_0_mirror_transport_t_field_data[] = { - BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_34_3_0_mirror_transport_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_34_3_0_mirror_transport_t_field_data, -}; - - -static int32_t bcmpkt_mpls_ach_t_channel_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_mpls_ach_t_channel_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_mpls_ach_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 28, 4); - - return ret; -} - -static int32_t bcmpkt_mpls_ach_t_cw_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 28, 4, val); - return ret; -} - -static int32_t bcmpkt_mpls_ach_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_mpls_ach_t_reserved_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_mpls_ach_t_version_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 4); - - return ret; -} - -static int32_t bcmpkt_mpls_ach_t_version_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 4, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_34_3_0_mpls_ach_t_fget[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = { - bcmpkt_mpls_ach_t_channel_type_get, - bcmpkt_mpls_ach_t_cw_type_get, - bcmpkt_mpls_ach_t_reserved_get, - bcmpkt_mpls_ach_t_version_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_34_3_0_mpls_ach_t_fset[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = { - bcmpkt_mpls_ach_t_channel_type_set, - bcmpkt_mpls_ach_t_cw_type_set, - bcmpkt_mpls_ach_t_reserved_set, - bcmpkt_mpls_ach_t_version_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_34_3_0_mpls_ach_t_field_data[] = { - BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_34_3_0_mpls_ach_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_MPLS_ACH_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_34_3_0_mpls_ach_t_field_data, -}; - - -static int32_t bcmpkt_mpls_bv_t_value_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_mpls_bv_t_value_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_34_3_0_mpls_bv_t_fget[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_MPLS_BV_T_FID_COUNT] = { - bcmpkt_mpls_bv_t_value_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_34_3_0_mpls_bv_t_fset[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_MPLS_BV_T_FID_COUNT] = { - bcmpkt_mpls_bv_t_value_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_34_3_0_mpls_bv_t_field_data[] = { - BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_34_3_0_mpls_bv_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_MPLS_BV_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_34_3_0_mpls_bv_t_field_data, -}; - - -static int32_t bcmpkt_mpls_cw_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 28, 4); - - return ret; -} - -static int32_t bcmpkt_mpls_cw_t_cw_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 28, 4, val); - return ret; -} - -static int32_t bcmpkt_mpls_cw_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 12); - - return ret; -} - -static int32_t bcmpkt_mpls_cw_t_reserved_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 12, val); - return ret; -} - -static int32_t bcmpkt_mpls_cw_t_seq_number_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_mpls_cw_t_seq_number_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_34_3_0_mpls_cw_t_fget[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_MPLS_CW_T_FID_COUNT] = { - bcmpkt_mpls_cw_t_cw_type_get, - bcmpkt_mpls_cw_t_reserved_get, - bcmpkt_mpls_cw_t_seq_number_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_34_3_0_mpls_cw_t_fset[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_MPLS_CW_T_FID_COUNT] = { - bcmpkt_mpls_cw_t_cw_type_set, - bcmpkt_mpls_cw_t_reserved_set, - bcmpkt_mpls_cw_t_seq_number_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_34_3_0_mpls_cw_t_field_data[] = { - BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_34_3_0_mpls_cw_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_MPLS_CW_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_34_3_0_mpls_cw_t_field_data, -}; - - -static int32_t bcmpkt_mpls_t_bos_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 8, 1); - - return ret; -} - -static int32_t bcmpkt_mpls_t_bos_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 8, 1, val); - return ret; -} - -static int32_t bcmpkt_mpls_t_exp_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 9, 3); - - return ret; -} - -static int32_t bcmpkt_mpls_t_exp_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 9, 3, val); - return ret; -} - -static int32_t bcmpkt_mpls_t_label_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 12, 20); - - return ret; -} - -static int32_t bcmpkt_mpls_t_label_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 12, 20, val); - return ret; -} - -static int32_t bcmpkt_mpls_t_ttl_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 8); - - return ret; -} - -static int32_t bcmpkt_mpls_t_ttl_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 8, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_34_3_0_mpls_t_fget[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_MPLS_T_FID_COUNT] = { - bcmpkt_mpls_t_bos_get, - bcmpkt_mpls_t_exp_get, - bcmpkt_mpls_t_label_get, - bcmpkt_mpls_t_ttl_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_34_3_0_mpls_t_fset[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_MPLS_T_FID_COUNT] = { - bcmpkt_mpls_t_bos_set, - bcmpkt_mpls_t_exp_set, - bcmpkt_mpls_t_label_set, - bcmpkt_mpls_t_ttl_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_34_3_0_mpls_t_field_data[] = { - BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_34_3_0_mpls_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_MPLS_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_34_3_0_mpls_t_field_data, -}; - - -static int32_t bcmpkt_opaquetag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_opaquetag_t_tpid_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_opaquetag_t_vlan_tag_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_opaquetag_t_vlan_tag_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_34_3_0_opaquetag_t_fget[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_OPAQUETAG_T_FID_COUNT] = { - bcmpkt_opaquetag_t_tpid_get, - bcmpkt_opaquetag_t_vlan_tag_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_34_3_0_opaquetag_t_fset[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_OPAQUETAG_T_FID_COUNT] = { - bcmpkt_opaquetag_t_tpid_set, - bcmpkt_opaquetag_t_vlan_tag_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_34_3_0_opaquetag_t_field_data[] = { - BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_OPAQUETAG_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_34_3_0_opaquetag_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_OPAQUETAG_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_34_3_0_opaquetag_t_field_data, -}; - - -static int32_t bcmpkt_p_1588_t_cntrl_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[8], 24, 8); - - return ret; -} - -static int32_t bcmpkt_p_1588_t_cntrl_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[8], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_p_1588_t_correction_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_p_1588_t_correction_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_p_1588_t_domain_nb_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 24, 8); - - return ret; -} - -static int32_t bcmpkt_p_1588_t_domain_nb_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_p_1588_t_flags_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 16); - - return ret; -} - -static int32_t bcmpkt_p_1588_t_flags_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_p_1588_t_logmsginterval_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[8], 16, 8); - - return ret; -} - -static int32_t bcmpkt_p_1588_t_logmsginterval_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[8], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_p_1588_t_msg_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_p_1588_t_msg_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_p_1588_t_msg_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 4); - - return ret; -} - -static int32_t bcmpkt_p_1588_t_msg_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 4, val); - return ret; -} - -static int32_t bcmpkt_p_1588_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 20, 4); - - return ret; -} - -static int32_t bcmpkt_p_1588_t_reserved1_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 20, 4, val); - return ret; -} - -static int32_t bcmpkt_p_1588_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 8); - - return ret; -} - -static int32_t bcmpkt_p_1588_t_reserved2_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_p_1588_t_reserved3_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_p_1588_t_reserved3_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_p_1588_t_seq_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[7], 0, 16); - - return ret; -} - -static int32_t bcmpkt_p_1588_t_seq_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[7], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_p_1588_t_srcportid_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_p_1588_t_srcportid_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_p_1588_t_transportspec_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 28, 4); - - return ret; -} - -static int32_t bcmpkt_p_1588_t_transportspec_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 28, 4, val); - return ret; -} - -static int32_t bcmpkt_p_1588_t_version_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 4); - - return ret; -} - -static int32_t bcmpkt_p_1588_t_version_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 4, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_34_3_0_p_1588_t_fget[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_P_1588_T_FID_COUNT] = { - bcmpkt_p_1588_t_cntrl_get, - bcmpkt_p_1588_t_correction_get, - bcmpkt_p_1588_t_domain_nb_get, - bcmpkt_p_1588_t_flags_get, - bcmpkt_p_1588_t_logmsginterval_get, - bcmpkt_p_1588_t_msg_length_get, - bcmpkt_p_1588_t_msg_type_get, - bcmpkt_p_1588_t_reserved1_get, - bcmpkt_p_1588_t_reserved2_get, - bcmpkt_p_1588_t_reserved3_get, - bcmpkt_p_1588_t_seq_id_get, - bcmpkt_p_1588_t_srcportid_get, - bcmpkt_p_1588_t_transportspec_get, - bcmpkt_p_1588_t_version_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_34_3_0_p_1588_t_fset[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_P_1588_T_FID_COUNT] = { - bcmpkt_p_1588_t_cntrl_set, - bcmpkt_p_1588_t_correction_set, - bcmpkt_p_1588_t_domain_nb_set, - bcmpkt_p_1588_t_flags_set, - bcmpkt_p_1588_t_logmsginterval_set, - bcmpkt_p_1588_t_msg_length_set, - bcmpkt_p_1588_t_msg_type_set, - bcmpkt_p_1588_t_reserved1_set, - bcmpkt_p_1588_t_reserved2_set, - bcmpkt_p_1588_t_reserved3_set, - bcmpkt_p_1588_t_seq_id_set, - bcmpkt_p_1588_t_srcportid_set, - bcmpkt_p_1588_t_transportspec_set, - bcmpkt_p_1588_t_version_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_34_3_0_p_1588_t_field_data[] = { - BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_34_3_0_p_1588_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_P_1588_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_34_3_0_p_1588_t_field_data, -}; - - -static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_prog_ext_hdr_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_prog_ext_hdr_t_next_header_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_prog_ext_hdr_t_option_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_prog_ext_hdr_t_option_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_34_3_0_prog_ext_hdr_t_fget[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = { - bcmpkt_prog_ext_hdr_t_hdr_ext_len_get, - bcmpkt_prog_ext_hdr_t_next_header_get, - bcmpkt_prog_ext_hdr_t_option_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_34_3_0_prog_ext_hdr_t_fset[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = { - bcmpkt_prog_ext_hdr_t_hdr_ext_len_set, - bcmpkt_prog_ext_hdr_t_next_header_set, - bcmpkt_prog_ext_hdr_t_option_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_34_3_0_prog_ext_hdr_t_field_data[] = { - BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_34_3_0_prog_ext_hdr_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_34_3_0_prog_ext_hdr_t_field_data, -}; - - -static int32_t bcmpkt_psamp_0_t_flowset_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[3], 16, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_0_t_flowset_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[3], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_0_t_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_0_t_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_0_t_next_hop_index_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[3], 0, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_0_t_next_hop_index_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[3], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_34_3_0_psamp_0_t_fget[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PSAMP_0_T_FID_COUNT] = { - bcmpkt_psamp_0_t_flowset_get, - bcmpkt_psamp_0_t_length_get, - bcmpkt_psamp_0_t_next_hop_index_get, - bcmpkt_psamp_0_t_obs_time_ns_get, - bcmpkt_psamp_0_t_obs_time_s_get, - bcmpkt_psamp_0_t_template_id_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_34_3_0_psamp_0_t_fset[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PSAMP_0_T_FID_COUNT] = { - bcmpkt_psamp_0_t_flowset_set, - bcmpkt_psamp_0_t_length_set, - bcmpkt_psamp_0_t_next_hop_index_set, - bcmpkt_psamp_0_t_obs_time_ns_set, - bcmpkt_psamp_0_t_obs_time_s_set, - bcmpkt_psamp_0_t_template_id_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_34_3_0_psamp_0_t_field_data[] = { - BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_34_3_0_psamp_0_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PSAMP_0_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_34_3_0_psamp_0_t_field_data, -}; - - -static int32_t bcmpkt_psamp_1_t_dlb_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 24, 8); - - return ret; -} - -static int32_t bcmpkt_psamp_1_t_dlb_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_psamp_1_t_egress_port_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_1_t_egress_port_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_1_t_epoch_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_1_t_epoch_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_1_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_1_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_1_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 0, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_1_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_1_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_1_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_1_t_variable_flag_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 16, 8); - - return ret; -} - -static int32_t bcmpkt_psamp_1_t_variable_flag_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 16, 8, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_34_3_0_psamp_1_t_fget[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PSAMP_1_T_FID_COUNT] = { - bcmpkt_psamp_1_t_dlb_id_get, - bcmpkt_psamp_1_t_egress_port_get, - bcmpkt_psamp_1_t_epoch_get, - bcmpkt_psamp_1_t_ingress_port_get, - bcmpkt_psamp_1_t_sampled_length_get, - bcmpkt_psamp_1_t_user_meta_data_get, - bcmpkt_psamp_1_t_variable_flag_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_34_3_0_psamp_1_t_fset[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PSAMP_1_T_FID_COUNT] = { - bcmpkt_psamp_1_t_dlb_id_set, - bcmpkt_psamp_1_t_egress_port_set, - bcmpkt_psamp_1_t_epoch_set, - bcmpkt_psamp_1_t_ingress_port_set, - bcmpkt_psamp_1_t_sampled_length_set, - bcmpkt_psamp_1_t_user_meta_data_set, - bcmpkt_psamp_1_t_variable_flag_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_34_3_0_psamp_1_t_field_data[] = { - BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_34_3_0_psamp_1_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PSAMP_1_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_34_3_0_psamp_1_t_field_data, -}; - - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[4], 16, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[4], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[4], 0, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[4], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_34_3_0_psamp_mirror_on_drop_0_t_fget[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { - bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get, - bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get, - bcmpkt_psamp_mirror_on_drop_0_t_length_get, - bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get, - bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get, - bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get, - bcmpkt_psamp_mirror_on_drop_0_t_template_id_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_34_3_0_psamp_mirror_on_drop_0_t_fset[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { - bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set, - bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set, - bcmpkt_psamp_mirror_on_drop_0_t_length_set, - bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set, - bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set, - bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set, - bcmpkt_psamp_mirror_on_drop_0_t_template_id_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_34_3_0_psamp_mirror_on_drop_0_t_field_data[] = { - BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_34_3_0_psamp_mirror_on_drop_0_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_34_3_0_psamp_mirror_on_drop_0_t_field_data, -}; - - -static int32_t bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 24, 8); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 8); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 8, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_34_3_0_psamp_mirror_on_drop_1_t_fget[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT] = { - bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_get, - bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_get, - bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_get, - bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_get, - bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_get, - bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_34_3_0_psamp_mirror_on_drop_1_t_fset[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT] = { - bcmpkt_psamp_mirror_on_drop_1_t_ing_drop_reason_set, - bcmpkt_psamp_mirror_on_drop_1_t_mirror_on_drop_obj_set, - bcmpkt_psamp_mirror_on_drop_1_t_mmu_drop_ctrl_set, - bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_set, - bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_set, - bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_34_3_0_psamp_mirror_on_drop_1_t_field_data[] = { - BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_34_3_0_psamp_mirror_on_drop_1_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_34_3_0_psamp_mirror_on_drop_1_t_field_data, -}; - - -static int32_t bcmpkt_rarp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 24, 8); - - return ret; -} - -static int32_t bcmpkt_rarp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_rarp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_rarp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_rarp_t_operation_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 16); - - return ret; -} - -static int32_t bcmpkt_rarp_t_operation_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_rarp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 8); - - return ret; -} - -static int32_t bcmpkt_rarp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_rarp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_rarp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_rarp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_rarp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_rarp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_rarp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_rarp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_rarp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_rarp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_rarp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_34_3_0_rarp_t_fget[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RARP_T_FID_COUNT] = { - bcmpkt_rarp_t_hardware_len_get, - bcmpkt_rarp_t_hardware_type_get, - bcmpkt_rarp_t_operation_get, - bcmpkt_rarp_t_prot_addr_len_get, - bcmpkt_rarp_t_protocol_type_get, - bcmpkt_rarp_t_sender_ha_get, - bcmpkt_rarp_t_sender_ip_get, - bcmpkt_rarp_t_target_ha_get, - bcmpkt_rarp_t_target_ip_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_34_3_0_rarp_t_fset[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RARP_T_FID_COUNT] = { - bcmpkt_rarp_t_hardware_len_set, - bcmpkt_rarp_t_hardware_type_set, - bcmpkt_rarp_t_operation_set, - bcmpkt_rarp_t_prot_addr_len_set, - bcmpkt_rarp_t_protocol_type_set, - bcmpkt_rarp_t_sender_ha_set, - bcmpkt_rarp_t_sender_ip_set, - bcmpkt_rarp_t_target_ha_set, - bcmpkt_rarp_t_target_ip_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_34_3_0_rarp_t_field_data[] = { - BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_34_3_0_rarp_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RARP_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_34_3_0_rarp_t_field_data, -}; - - -static int32_t bcmpkt_routing_t_data_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_routing_t_data_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_routing_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_routing_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_routing_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_routing_t_next_header_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_routing_t_routing_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 8, 8); - - return ret; -} - -static int32_t bcmpkt_routing_t_routing_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 8, 8, val); - return ret; -} - -static int32_t bcmpkt_routing_t_segments_left_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 8); - - return ret; -} - -static int32_t bcmpkt_routing_t_segments_left_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 8, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_34_3_0_routing_t_fget[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ROUTING_T_FID_COUNT] = { - bcmpkt_routing_t_data_get, - bcmpkt_routing_t_hdr_ext_len_get, - bcmpkt_routing_t_next_header_get, - bcmpkt_routing_t_routing_type_get, - bcmpkt_routing_t_segments_left_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_34_3_0_routing_t_fset[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ROUTING_T_FID_COUNT] = { - bcmpkt_routing_t_data_set, - bcmpkt_routing_t_hdr_ext_len_set, - bcmpkt_routing_t_next_header_set, - bcmpkt_routing_t_routing_type_set, - bcmpkt_routing_t_segments_left_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_34_3_0_routing_t_field_data[] = { - BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_34_3_0_routing_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_ROUTING_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_34_3_0_routing_t_field_data, -}; - - -static int32_t bcmpkt_rspan_t_tag_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_rspan_t_tag_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_rspan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_rspan_t_tpid_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_34_3_0_rspan_t_fget[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RSPAN_T_FID_COUNT] = { - bcmpkt_rspan_t_tag_get, - bcmpkt_rspan_t_tpid_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_34_3_0_rspan_t_fset[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RSPAN_T_FID_COUNT] = { - bcmpkt_rspan_t_tag_set, - bcmpkt_rspan_t_tpid_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_34_3_0_rspan_t_field_data[] = { - BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_34_3_0_rspan_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_RSPAN_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_34_3_0_rspan_t_field_data, -}; - - -static int32_t bcmpkt_sflow_shim_0_t_sys_destination_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 16); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_0_t_sys_destination_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_sflow_shim_0_t_sys_source_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 16); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_0_t_sys_source_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_sflow_shim_0_t_version_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_sflow_shim_0_t_version_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_34_3_0_sflow_shim_0_t_fget[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { - bcmpkt_sflow_shim_0_t_sys_destination_get, - bcmpkt_sflow_shim_0_t_sys_source_get, - bcmpkt_sflow_shim_0_t_version_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_34_3_0_sflow_shim_0_t_fset[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { - bcmpkt_sflow_shim_0_t_sys_destination_set, - bcmpkt_sflow_shim_0_t_sys_source_set, - bcmpkt_sflow_shim_0_t_version_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_34_3_0_sflow_shim_0_t_field_data[] = { - BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_34_3_0_sflow_shim_0_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_34_3_0_sflow_shim_0_t_field_data, -}; - - -static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 30, 1); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 30, 1, val); - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 27, 1); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 27, 1, val); - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 29, 1); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 29, 1, val); - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 28, 1); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 28, 1, val); - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 31, 1); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 31, 1, val); - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 26, 1); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 26, 1, val); - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 7); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_reserved_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 7, val); - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 23, 3); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 23, 3, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_34_3_0_sflow_shim_1_t_fget[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { - bcmpkt_sflow_shim_1_t_flag_dest_sample_get, - bcmpkt_sflow_shim_1_t_flag_discarded_get, - bcmpkt_sflow_shim_1_t_flag_flex_sample_get, - bcmpkt_sflow_shim_1_t_flag_mcast_get, - bcmpkt_sflow_shim_1_t_flag_src_sample_get, - bcmpkt_sflow_shim_1_t_flag_truncated_get, - bcmpkt_sflow_shim_1_t_reserved_get, - bcmpkt_sflow_shim_1_t_sys_opcode_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_34_3_0_sflow_shim_1_t_fset[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { - bcmpkt_sflow_shim_1_t_flag_dest_sample_set, - bcmpkt_sflow_shim_1_t_flag_discarded_set, - bcmpkt_sflow_shim_1_t_flag_flex_sample_set, - bcmpkt_sflow_shim_1_t_flag_mcast_set, - bcmpkt_sflow_shim_1_t_flag_src_sample_set, - bcmpkt_sflow_shim_1_t_flag_truncated_set, - bcmpkt_sflow_shim_1_t_reserved_set, - bcmpkt_sflow_shim_1_t_sys_opcode_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_34_3_0_sflow_shim_1_t_field_data[] = { - BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_34_3_0_sflow_shim_1_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_34_3_0_sflow_shim_1_t_field_data, -}; - - -static int32_t bcmpkt_sflow_shim_2_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_sflow_shim_2_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_34_3_0_sflow_shim_2_t_fget[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { - bcmpkt_sflow_shim_2_t_sequence_num_get, - bcmpkt_sflow_shim_2_t_user_meta_data_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_34_3_0_sflow_shim_2_t_fset[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { - bcmpkt_sflow_shim_2_t_sequence_num_set, - bcmpkt_sflow_shim_2_t_user_meta_data_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_34_3_0_sflow_shim_2_t_field_data[] = { - BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_34_3_0_sflow_shim_2_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_34_3_0_sflow_shim_2_t_field_data, -}; - - -static int32_t bcmpkt_snap_llc_t_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_snap_llc_t_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_snap_llc_t_snap_llc_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_snap_llc_t_snap_llc_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_34_3_0_snap_llc_t_fget[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = { - bcmpkt_snap_llc_t_length_get, - bcmpkt_snap_llc_t_snap_llc_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_34_3_0_snap_llc_t_fset[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = { - bcmpkt_snap_llc_t_length_set, - bcmpkt_snap_llc_t_snap_llc_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_34_3_0_snap_llc_t_field_data[] = { - BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_34_3_0_snap_llc_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_SNAP_LLC_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_34_3_0_snap_llc_t_field_data, -}; - - -static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_tcp_first_4bytes_t_src_port_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_tcp_first_4bytes_t_src_port_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_34_3_0_tcp_first_4bytes_t_fget[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { - bcmpkt_tcp_first_4bytes_t_dst_port_get, - bcmpkt_tcp_first_4bytes_t_src_port_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_34_3_0_tcp_first_4bytes_t_fset[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { - bcmpkt_tcp_first_4bytes_t_dst_port_set, - bcmpkt_tcp_first_4bytes_t_src_port_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_34_3_0_tcp_first_4bytes_t_field_data[] = { - BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_34_3_0_tcp_first_4bytes_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_34_3_0_tcp_first_4bytes_t_field_data, -}; - - -static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[3], 16, 16); - - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_checksum_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[3], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 16, 16); - - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[3], 0, 16); - - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[3], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_win_size_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 0, 16); - - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_win_size_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 0, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_34_3_0_tcp_last_16bytes_t_fget[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { - bcmpkt_tcp_last_16bytes_t_ack_num_get, - bcmpkt_tcp_last_16bytes_t_checksum_get, - bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get, - bcmpkt_tcp_last_16bytes_t_seq_num_get, - bcmpkt_tcp_last_16bytes_t_urgent_ptr_get, - bcmpkt_tcp_last_16bytes_t_win_size_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_34_3_0_tcp_last_16bytes_t_fset[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { - bcmpkt_tcp_last_16bytes_t_ack_num_set, - bcmpkt_tcp_last_16bytes_t_checksum_set, - bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set, - bcmpkt_tcp_last_16bytes_t_seq_num_set, - bcmpkt_tcp_last_16bytes_t_urgent_ptr_set, - bcmpkt_tcp_last_16bytes_t_win_size_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_34_3_0_tcp_last_16bytes_t_field_data[] = { - BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_34_3_0_tcp_last_16bytes_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_34_3_0_tcp_last_16bytes_t_field_data, -}; - - -static int32_t bcmpkt_udp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 16); - - return ret; -} - -static int32_t bcmpkt_udp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_udp_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_udp_t_dst_port_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_udp_t_src_port_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_udp_t_src_port_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_udp_t_udp_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 16); - - return ret; -} - -static int32_t bcmpkt_udp_t_udp_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_34_3_0_udp_t_fget[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_UDP_T_FID_COUNT] = { - bcmpkt_udp_t_checksum_get, - bcmpkt_udp_t_dst_port_get, - bcmpkt_udp_t_src_port_get, - bcmpkt_udp_t_udp_length_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_34_3_0_udp_t_fset[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_UDP_T_FID_COUNT] = { - bcmpkt_udp_t_checksum_set, - bcmpkt_udp_t_dst_port_set, - bcmpkt_udp_t_src_port_set, - bcmpkt_udp_t_udp_length_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_34_3_0_udp_t_field_data[] = { - BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_34_3_0_udp_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_UDP_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_34_3_0_udp_t_field_data, -}; - - -static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_34_3_0_unknown_l3_t_fget[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { - bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get, - bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_34_3_0_unknown_l3_t_fset[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { - bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set, - bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_34_3_0_unknown_l3_t_field_data[] = { - BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_34_3_0_unknown_l3_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_34_3_0_unknown_l3_t_field_data, -}; - - -static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_34_3_0_unknown_l4_t_fget[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { - bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_34_3_0_unknown_l4_t_fset[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { - bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_34_3_0_unknown_l4_t_field_data[] = { - BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_34_3_0_unknown_l4_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_34_3_0_unknown_l4_t_field_data, -}; - - -static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_34_3_0_unknown_l5_t_fget[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { - bcmpkt_unknown_l5_t_l5_bytes_0_1_get, - bcmpkt_unknown_l5_t_l5_bytes_2_3_get, - bcmpkt_unknown_l5_t_l5_bytes_4_7_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_34_3_0_unknown_l5_t_fset[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { - bcmpkt_unknown_l5_t_l5_bytes_0_1_set, - bcmpkt_unknown_l5_t_l5_bytes_2_3_set, - bcmpkt_unknown_l5_t_l5_bytes_4_7_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_34_3_0_unknown_l5_t_field_data[] = { - BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_34_3_0_unknown_l5_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_34_3_0_unknown_l5_t_field_data, -}; - - -static int32_t bcmpkt_vlan_t_cfi_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 12, 1); - - return ret; -} - -static int32_t bcmpkt_vlan_t_cfi_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 12, 1, val); - return ret; -} - -static int32_t bcmpkt_vlan_t_pcp_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 13, 3); - - return ret; -} - -static int32_t bcmpkt_vlan_t_pcp_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 13, 3, val); - return ret; -} - -static int32_t bcmpkt_vlan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_vlan_t_tpid_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_vlan_t_vid_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 12); - - return ret; -} - -static int32_t bcmpkt_vlan_t_vid_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 12, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_34_3_0_vlan_t_fget[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_VLAN_T_FID_COUNT] = { - bcmpkt_vlan_t_cfi_get, - bcmpkt_vlan_t_pcp_get, - bcmpkt_vlan_t_tpid_get, - bcmpkt_vlan_t_vid_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_34_3_0_vlan_t_fset[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_VLAN_T_FID_COUNT] = { - bcmpkt_vlan_t_cfi_set, - bcmpkt_vlan_t_pcp_set, - bcmpkt_vlan_t_tpid_set, - bcmpkt_vlan_t_vid_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_34_3_0_vlan_t_field_data[] = { - BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_34_3_0_vlan_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_VLAN_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_34_3_0_vlan_t_field_data, -}; - - -static int32_t bcmpkt_vntag_t_tag_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_vntag_t_tag_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_vntag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_vntag_t_tpid_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_34_3_0_vntag_t_fget[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_VNTAG_T_FID_COUNT] = { - bcmpkt_vntag_t_tag_get, - bcmpkt_vntag_t_tpid_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_34_3_0_vntag_t_fset[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_VNTAG_T_FID_COUNT] = { - bcmpkt_vntag_t_tag_set, - bcmpkt_vntag_t_tpid_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_34_3_0_vntag_t_field_data[] = { - BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_VNTAG_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_34_3_0_vntag_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_VNTAG_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_34_3_0_vntag_t_field_data, -}; - - -static int32_t bcmpkt_vxlan_t_flags_reserved_1_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_vxlan_t_flags_reserved_1_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_vxlan_t_vn_id_lower_reserved2_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 16); - - return ret; -} - -static int32_t bcmpkt_vxlan_t_vn_id_lower_reserved2_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_vxlan_t_vn_id_upper_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 16); - - return ret; -} - -static int32_t bcmpkt_vxlan_t_vn_id_upper_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_34_3_0_vxlan_t_fget[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_VXLAN_T_FID_COUNT] = { - bcmpkt_vxlan_t_flags_reserved_1_get, - bcmpkt_vxlan_t_vn_id_lower_reserved2_get, - bcmpkt_vxlan_t_vn_id_upper_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_34_3_0_vxlan_t_fset[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_VXLAN_T_FID_COUNT] = { - bcmpkt_vxlan_t_flags_reserved_1_set, - bcmpkt_vxlan_t_vn_id_lower_reserved2_set, - bcmpkt_vxlan_t_vn_id_upper_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_34_3_0_vxlan_t_field_data[] = { - BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_34_3_0_vxlan_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_VXLAN_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_34_3_0_vxlan_t_field_data, -}; - - -static int32_t bcmpkt_wesp_t_flags_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 8); - - return ret; -} - -static int32_t bcmpkt_wesp_t_flags_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 8, val); - return ret; -} - -static int32_t bcmpkt_wesp_t_header_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_wesp_t_header_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_wesp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_wesp_t_next_header_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_wesp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_wesp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_wesp_t_spi_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_wesp_t_spi_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_wesp_t_trailer_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 8, 8); - - return ret; -} - -static int32_t bcmpkt_wesp_t_trailer_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 8, 8, val); - return ret; -} - -static int32_t bcmpkt_wesp_t_wesp_iv_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_wesp_t_wesp_iv_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56880_a0_nfa_6_5_34_3_0_wesp_t_fget[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_WESP_T_FID_COUNT] = { - bcmpkt_wesp_t_flags_get, - bcmpkt_wesp_t_header_len_get, - bcmpkt_wesp_t_next_header_get, - bcmpkt_wesp_t_seq_num_get, - bcmpkt_wesp_t_spi_get, - bcmpkt_wesp_t_trailer_len_get, - bcmpkt_wesp_t_wesp_iv_get, -}; - -bcmpkt_flex_field_set_f bcm56880_a0_nfa_6_5_34_3_0_wesp_t_fset[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_WESP_T_FID_COUNT] = { - bcmpkt_wesp_t_flags_set, - bcmpkt_wesp_t_header_len_set, - bcmpkt_wesp_t_next_header_set, - bcmpkt_wesp_t_seq_num_set, - bcmpkt_wesp_t_spi_set, - bcmpkt_wesp_t_trailer_len_set, - bcmpkt_wesp_t_wesp_iv_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56880_a0_nfa_6_5_34_3_0_wesp_t_field_data[] = { - BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56880_a0_nfa_6_5_34_3_0_wesp_t_field_info = { - .num_fields = BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_WESP_T_FID_COUNT, - .info = bcm56880_a0_nfa_6_5_34_3_0_wesp_t_field_data, -}; - -static bcmpkt_flex_pmd_info_t bcm56880_a0_nfa_6_5_34_3_0_flexhdr_info_list[BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_FLEXHDR_COUNT] = { - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_34_3_0_arp_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_34_3_0_arp_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_34_3_0_arp_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_34_3_0_authen_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_34_3_0_authen_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_34_3_0_authen_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_34_3_0_bfd_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_34_3_0_bfd_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_34_3_0_bfd_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_34_3_0_cpu_composites_0_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_34_3_0_cpu_composites_0_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_34_3_0_cpu_composites_0_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_34_3_0_cpu_composites_1_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_34_3_0_cpu_composites_1_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_34_3_0_cpu_composites_1_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_34_3_0_dest_option_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_34_3_0_dest_option_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_34_3_0_dest_option_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_34_3_0_erspan3_fixed_hdr_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_34_3_0_erspan3_fixed_hdr_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_34_3_0_erspan3_fixed_hdr_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_34_3_0_erspan3_subhdr_5_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_34_3_0_erspan3_subhdr_5_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_34_3_0_erspan3_subhdr_5_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_34_3_0_esp_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_34_3_0_esp_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_34_3_0_esp_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_34_3_0_etag_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_34_3_0_etag_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_34_3_0_etag_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_34_3_0_ethertype_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_34_3_0_ethertype_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_34_3_0_ethertype_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_34_3_0_frag_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_34_3_0_frag_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_34_3_0_frag_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_34_3_0_generic_loopback_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_34_3_0_generic_loopback_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_34_3_0_generic_loopback_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_34_3_0_gpe_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_34_3_0_gpe_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_34_3_0_gpe_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_34_3_0_gre_chksum_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_34_3_0_gre_chksum_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_34_3_0_gre_chksum_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_34_3_0_gre_key_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_34_3_0_gre_key_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_34_3_0_gre_key_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_34_3_0_gre_rout_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_34_3_0_gre_rout_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_34_3_0_gre_rout_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_34_3_0_gre_seq_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_34_3_0_gre_seq_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_34_3_0_gre_seq_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_34_3_0_gre_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_34_3_0_gre_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_34_3_0_gre_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_34_3_0_gtp_12byte_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_34_3_0_gtp_12byte_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_34_3_0_gtp_12byte_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_34_3_0_gtp_8byte_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_34_3_0_gtp_8byte_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_34_3_0_gtp_8byte_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_34_3_0_gtp_ext_4byte_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_34_3_0_gtp_ext_4byte_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_34_3_0_gtp_ext_4byte_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_34_3_0_gtp_with_ext_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_34_3_0_gtp_with_ext_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_34_3_0_gtp_with_ext_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_34_3_0_hop_by_hop_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_34_3_0_hop_by_hop_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_34_3_0_hop_by_hop_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_34_3_0_icmp_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_34_3_0_icmp_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_34_3_0_icmp_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_34_3_0_igmp_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_34_3_0_igmp_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_34_3_0_igmp_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_34_3_0_ipfix_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_34_3_0_ipfix_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_34_3_0_ipfix_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_34_3_0_ipv4_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_34_3_0_ipv4_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_34_3_0_ipv4_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_34_3_0_ipv6_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_34_3_0_ipv6_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_34_3_0_ipv6_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_34_3_0_l2_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_34_3_0_l2_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_34_3_0_l2_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_34_3_0_mirror_erspan_sn_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_34_3_0_mirror_erspan_sn_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_34_3_0_mirror_erspan_sn_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_34_3_0_mirror_transport_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_34_3_0_mirror_transport_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_34_3_0_mirror_transport_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_34_3_0_mpls_ach_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_34_3_0_mpls_ach_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_34_3_0_mpls_ach_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_34_3_0_mpls_bv_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_34_3_0_mpls_bv_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_34_3_0_mpls_bv_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_34_3_0_mpls_cw_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_34_3_0_mpls_cw_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_34_3_0_mpls_cw_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_34_3_0_mpls_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_34_3_0_mpls_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_34_3_0_mpls_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_34_3_0_opaquetag_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_34_3_0_opaquetag_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_34_3_0_opaquetag_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_34_3_0_p_1588_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_34_3_0_p_1588_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_34_3_0_p_1588_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_34_3_0_prog_ext_hdr_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_34_3_0_prog_ext_hdr_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_34_3_0_prog_ext_hdr_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_34_3_0_psamp_0_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_34_3_0_psamp_0_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_34_3_0_psamp_0_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_34_3_0_psamp_1_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_34_3_0_psamp_1_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_34_3_0_psamp_1_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_34_3_0_psamp_mirror_on_drop_0_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_34_3_0_psamp_mirror_on_drop_0_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_34_3_0_psamp_mirror_on_drop_0_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_34_3_0_psamp_mirror_on_drop_1_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_34_3_0_psamp_mirror_on_drop_1_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_34_3_0_psamp_mirror_on_drop_1_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_34_3_0_rarp_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_34_3_0_rarp_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_34_3_0_rarp_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_34_3_0_routing_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_34_3_0_routing_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_34_3_0_routing_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_34_3_0_rspan_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_34_3_0_rspan_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_34_3_0_rspan_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_34_3_0_sflow_shim_0_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_34_3_0_sflow_shim_0_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_34_3_0_sflow_shim_0_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_34_3_0_sflow_shim_1_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_34_3_0_sflow_shim_1_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_34_3_0_sflow_shim_1_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_34_3_0_sflow_shim_2_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_34_3_0_sflow_shim_2_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_34_3_0_sflow_shim_2_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_34_3_0_snap_llc_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_34_3_0_snap_llc_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_34_3_0_snap_llc_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_34_3_0_tcp_first_4bytes_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_34_3_0_tcp_first_4bytes_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_34_3_0_tcp_first_4bytes_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_34_3_0_tcp_last_16bytes_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_34_3_0_tcp_last_16bytes_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_34_3_0_tcp_last_16bytes_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_34_3_0_udp_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_34_3_0_udp_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_34_3_0_udp_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_34_3_0_unknown_l3_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_34_3_0_unknown_l3_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_34_3_0_unknown_l3_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_34_3_0_unknown_l4_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_34_3_0_unknown_l4_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_34_3_0_unknown_l4_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_34_3_0_unknown_l5_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_34_3_0_unknown_l5_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_34_3_0_unknown_l5_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_34_3_0_vlan_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_34_3_0_vlan_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_34_3_0_vlan_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_34_3_0_vntag_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_34_3_0_vntag_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_34_3_0_vntag_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_34_3_0_vxlan_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_34_3_0_vxlan_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_34_3_0_vxlan_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_34_3_0_wesp_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56880_a0_nfa_6_5_34_3_0_wesp_t_fget, - .flex_fset = bcm56880_a0_nfa_6_5_34_3_0_wesp_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56880_a0_nfa_6_5_34_3_0_rxpmd_flex_field_info, - .reasons_info = &bcm56880_a0_nfa_6_5_34_3_0_rxpmd_flex_reasons_info, - .flex_common_fget = bcm56880_a0_rxpmd_flex_fget, - .flex_common_fset = bcm56880_a0_rxpmd_flex_fset, - }, -}; - -static shr_enum_map_t bcm56880_a0_nfa_6_5_34_3_0_flexhdr_id_map[] = { - BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_FLEXHDR_NAME_MAP_INIT -}; - -shr_enum_map_t * bcm56880_a0_nfa_6_5_34_3_0_flexhdr_map_get(void) -{ - return bcm56880_a0_nfa_6_5_34_3_0_flexhdr_id_map; -} - -bcmpkt_flex_pmd_info_t * bcm56880_a0_nfa_6_5_34_3_0_flex_pmd_info_get(uint32_t hid) -{ - if (hid >= BCM56880_A0_NFA_6_5_34_3_0_BCMPKT_FLEXHDR_COUNT) { - return NULL; - } - - return &bcm56880_a0_nfa_6_5_34_3_0_flexhdr_info_list[hid]; -} - -int bcm56880_a0_nfa_6_5_34_3_0_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = { - 12, - -1, - -1, - 60, -}; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/cna_6_5_34_2_0/bcm56890_a0_cna_6_5_34_2_0_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/cna_6_5_34_2_0/bcm56890_a0_cna_6_5_34_2_0_bcmpkt_rxpmd_match_id.c deleted file mode 100644 index dbc49ede5ff..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/cna_6_5_34_2_0/bcm56890_a0_cna_6_5_34_2_0_bcmpkt_rxpmd_match_id.c +++ /dev/null @@ -1,1600 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) bcm56890_a0_cna_6_5_34_2_0_sf_match_id_info.yml - * for device bcm56890_a0 and variant cna_6_5_34_2_0. - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - - -#include -#include - -static uint32_t bcm56890_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_itag[1] = -{ - 0x14, -}; - -static uint32_t bcm56890_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_l2[1] = -{ - 0x1e, -}; - -static uint32_t bcm56890_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_otag[1] = -{ - 0x18, -}; - -static uint32_t bcm56890_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_arp[1] = -{ - 0x4, -}; - -static uint32_t bcm56890_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ethertype[1] = -{ - 0x3d7eb7fe, -}; - -static uint32_t bcm56890_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_icmp[1] = -{ - 0x100010, -}; - -static uint32_t bcm56890_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_header[1] = -{ - 0x7e0, -}; - -static uint32_t bcm56890_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_metadata_base[1] = -{ - 0x500, -}; - -static uint32_t bcm56890_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv4[1] = -{ - 0x6b7f8, -}; - -static uint32_t bcm56890_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv6[1] = -{ - 0xd780000, -}; - -static uint32_t bcm56890_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rarp[1] = -{ - 0x10000000, -}; - -static uint32_t bcm56890_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_first_4bytes[1] = -{ - 0x6031c0, -}; - -static uint32_t bcm56890_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_last_16bytes[1] = -{ - 0x402180, -}; - -static uint32_t bcm56890_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_udp[1] = -{ - 0x5028600, -}; - -static uint32_t bcm56890_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l3[1] = -{ - 0x20000000, -}; - -static uint32_t bcm56890_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l4[1] = -{ - 0x8040000, -}; - -static uint32_t bcm56890_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l5[1] = -{ - 0x4020000, -}; - -static uint32_t bcm56890_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_itag[1] = -{ - 0x28, -}; - -static uint32_t bcm56890_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_l2[1] = -{ - 0x3e, -}; - -static uint32_t bcm56890_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_otag[1] = -{ - 0x30, -}; - -static uint32_t bcm56890_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_arp[1] = -{ - 0x4, -}; - -static uint32_t bcm56890_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ethertype[2] = -{ - 0x9ffd67fe, - 0x1f5, -}; - -static uint32_t bcm56890_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_icmp[1] = -{ - 0x400010, -}; - -static uint32_t bcm56890_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_header[1] = -{ - 0x1f8007e0, -}; - -static uint32_t bcm56890_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_metadata_base[1] = -{ - 0x14000500, -}; - -static uint32_t bcm56890_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv4[1] = -{ - 0x1d67f8, -}; - -static uint32_t bcm56890_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv6[2] = -{ - 0x9fe00000, - 0x75, -}; - -static uint32_t bcm56890_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rarp[2] = -{ - 0x0, - 0x80, -}; - -static uint32_t bcm56890_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_first_4bytes[2] = -{ - 0x870061c0, - 0x1, -}; - -static uint32_t bcm56890_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_last_16bytes[2] = -{ - 0x6004180, - 0x1, -}; - -static uint32_t bcm56890_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_udp[2] = -{ - 0x180d0600, - 0x34, -}; - -static uint32_t bcm56890_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l3[2] = -{ - 0x0, - 0x100, -}; - -static uint32_t bcm56890_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l4[2] = -{ - 0x100000, - 0x40, -}; - -static uint32_t bcm56890_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l5[2] = -{ - 0x40000, - 0x10, -}; - -static uint32_t bcm56890_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_vxlan[2] = -{ - 0x80000, - 0x20, -}; - -static uint32_t bcm56890_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_sys_hdr_ep_nih[1] = -{ - 0x4, -}; - -static uint32_t bcm56890_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_sys_hdr_loopback[1] = -{ - 0x8, -}; - - -static bcmpkt_rxpmd_match_id_db_t -bcm56890_a0_cna_6_5_34_2_0_rxpmd_match_id_db[BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_COUNT] = { - { - /* BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */ - .name = "EGRESS_PKT_FWD_L2_HDR_ITAG", - .match = 0x2, - .match_mask = 0x2, - .match_maxbit = 16, - .match_minbit = 14, - .maxbit = 1, - .minbit = 1, - .value = 0x1, - .pmaxbit = 16, - .pminbit = 14, - - }, - { - /* BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */ - .name = "EGRESS_PKT_FWD_L2_HDR_L2", - .match = 0x1, - .match_mask = 0x1, - .match_maxbit = 16, - .match_minbit = 14, - .maxbit = 0, - .minbit = 0, - .value = 0x1, - .pmaxbit = 16, - .pminbit = 14, - - }, - { - /* BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */ - .name = "EGRESS_PKT_FWD_L2_HDR_NONE", - .match = 0x0, - .match_mask = 0x7, - .match_maxbit = 16, - .match_minbit = 14, - .maxbit = 2, - .minbit = 0, - .value = 0x0, - .pmaxbit = 16, - .pminbit = 14, - - }, - { - /* BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */ - .name = "EGRESS_PKT_FWD_L2_HDR_OTAG", - .match = 0x4, - .match_mask = 0x4, - .match_maxbit = 16, - .match_minbit = 14, - .maxbit = 2, - .minbit = 2, - .value = 0x1, - .pmaxbit = 16, - .pminbit = 14, - - }, - { - /* BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_ARP", - .match = 0x80, - .match_mask = 0x18e, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 8, - .minbit = 7, - .value = 0x1, - .pmaxbit = 25, - .pminbit = 17, - - }, - { - /* BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", - .match = 0x1, - .match_mask = 0x1, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 0, - .minbit = 0, - .value = 0x1, - .pmaxbit = 25, - .pminbit = 17, - - }, - { - /* BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_ICMP", - .match = 0x100, - .match_mask = 0x186, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 8, - .minbit = 7, - .value = 0x2, - .pmaxbit = 25, - .pminbit = 17, - - }, - { - /* BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER", - .match = 0x8, - .match_mask = 0x8, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 3, - .minbit = 3, - .value = 0x1, - .pmaxbit = 25, - .pminbit = 17, - - }, - { - /* BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE", - .match = 0x88, - .match_mask = 0x188, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 8, - .minbit = 7, - .value = 0x1, - .pmaxbit = 25, - .pminbit = 17, - - }, - { - /* BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV4", - .match = 0x20, - .match_mask = 0x60, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 6, - .minbit = 5, - .value = 0x1, - .pmaxbit = 25, - .pminbit = 17, - - }, - { - /* BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV6", - .match = 0x40, - .match_mask = 0x60, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 6, - .minbit = 5, - .value = 0x2, - .pmaxbit = 25, - .pminbit = 17, - - }, - { - /* BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_NONE", - .match = 0x0, - .match_mask = 0x1ff, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 8, - .minbit = 0, - .value = 0x0, - .pmaxbit = 25, - .pminbit = 17, - - }, - { - /* BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_RARP", - .match = 0x2, - .match_mask = 0x6, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 2, - .minbit = 1, - .value = 0x1, - .pmaxbit = 25, - .pminbit = 17, - - }, - { - /* BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", - .match = 0x4, - .match_mask = 0x6, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 2, - .minbit = 1, - .value = 0x2, - .pmaxbit = 25, - .pminbit = 17, - - }, - { - /* BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", - .match = 0x10, - .match_mask = 0x10, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 4, - .minbit = 4, - .value = 0x1, - .pmaxbit = 25, - .pminbit = 17, - - }, - { - /* BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_UDP", - .match = 0x6, - .match_mask = 0x6, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 2, - .minbit = 1, - .value = 0x3, - .pmaxbit = 25, - .pminbit = 17, - - }, - { - /* BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", - .match = 0x60, - .match_mask = 0x60, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 6, - .minbit = 5, - .value = 0x3, - .pmaxbit = 25, - .pminbit = 17, - - }, - { - /* BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", - .match = 0x180, - .match_mask = 0x180, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 8, - .minbit = 7, - .value = 0x3, - .pmaxbit = 25, - .pminbit = 17, - - }, - { - /* BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", - .match = 0x106, - .match_mask = 0x186, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 8, - .minbit = 7, - .value = 0x2, - .pmaxbit = 25, - .pminbit = 17, - - }, - { - /* BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", - .match = 0x86, - .match_mask = 0x18e, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 8, - .minbit = 7, - .value = 0x1, - .pmaxbit = 25, - .pminbit = 17, - - }, - { - /* BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH */ - .name = "EGRESS_PKT_SYS_HDR_EP_NIH", - .match = 0x2, - .match_mask = 0x3, - .match_maxbit = 1, - .match_minbit = 0, - .maxbit = 1, - .minbit = 0, - .value = 0x2, - .pmaxbit = 1, - .pminbit = 0, - - }, - { - /* BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */ - .name = "EGRESS_PKT_SYS_HDR_LOOPBACK", - .match = 0x1, - .match_mask = 0x3, - .match_maxbit = 1, - .match_minbit = 0, - .maxbit = 1, - .minbit = 0, - .value = 0x1, - .pmaxbit = 1, - .pminbit = 0, - - }, - { - /* BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */ - .name = "EGRESS_PKT_SYS_HDR_NONE", - .match = 0x0, - .match_mask = 0x3, - .match_maxbit = 1, - .match_minbit = 0, - .maxbit = 1, - .minbit = 0, - .value = 0x0, - .pmaxbit = 1, - .pminbit = 0, - - }, - { - /* BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */ - .name = "EGRESS_PKT_TUNNEL_L2_HDR_ITAG", - .match = 0x2, - .match_mask = 0x2, - .match_maxbit = 4, - .match_minbit = 2, - .maxbit = 1, - .minbit = 1, - .value = 0x1, - .pmaxbit = 4, - .pminbit = 2, - - }, - { - /* BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */ - .name = "EGRESS_PKT_TUNNEL_L2_HDR_L2", - .match = 0x1, - .match_mask = 0x1, - .match_maxbit = 4, - .match_minbit = 2, - .maxbit = 0, - .minbit = 0, - .value = 0x1, - .pmaxbit = 4, - .pminbit = 2, - - }, - { - /* BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */ - .name = "EGRESS_PKT_TUNNEL_L2_HDR_NONE", - .match = 0x0, - .match_mask = 0x7, - .match_maxbit = 4, - .match_minbit = 2, - .maxbit = 2, - .minbit = 0, - .value = 0x0, - .pmaxbit = 4, - .pminbit = 2, - - }, - { - /* BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */ - .name = "EGRESS_PKT_TUNNEL_L2_HDR_OTAG", - .match = 0x4, - .match_mask = 0x4, - .match_maxbit = 4, - .match_minbit = 2, - .maxbit = 2, - .minbit = 2, - .value = 0x1, - .pmaxbit = 4, - .pminbit = 2, - - }, - { - /* BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", - .match = 0x80, - .match_mask = 0x18e, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 8, - .minbit = 7, - .value = 0x1, - .pmaxbit = 13, - .pminbit = 5, - - }, - { - /* BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", - .match = 0x1, - .match_mask = 0x1, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 0, - .minbit = 0, - .value = 0x1, - .pmaxbit = 13, - .pminbit = 5, - - }, - { - /* BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", - .match = 0x100, - .match_mask = 0x186, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 8, - .minbit = 7, - .value = 0x2, - .pmaxbit = 13, - .pminbit = 5, - - }, - { - /* BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER", - .match = 0x8, - .match_mask = 0x8, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 3, - .minbit = 3, - .value = 0x1, - .pmaxbit = 13, - .pminbit = 5, - - }, - { - /* BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE", - .match = 0x88, - .match_mask = 0x188, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 8, - .minbit = 7, - .value = 0x1, - .pmaxbit = 13, - .pminbit = 5, - - }, - { - /* BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", - .match = 0x20, - .match_mask = 0x60, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 6, - .minbit = 5, - .value = 0x1, - .pmaxbit = 13, - .pminbit = 5, - - }, - { - /* BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", - .match = 0x40, - .match_mask = 0x60, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 6, - .minbit = 5, - .value = 0x2, - .pmaxbit = 13, - .pminbit = 5, - - }, - { - /* BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", - .match = 0x0, - .match_mask = 0x1ff, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 8, - .minbit = 0, - .value = 0x0, - .pmaxbit = 13, - .pminbit = 5, - - }, - { - /* BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", - .match = 0x2, - .match_mask = 0x6, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 2, - .minbit = 1, - .value = 0x1, - .pmaxbit = 13, - .pminbit = 5, - - }, - { - /* BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", - .match = 0x4, - .match_mask = 0x6, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 2, - .minbit = 1, - .value = 0x2, - .pmaxbit = 13, - .pminbit = 5, - - }, - { - /* BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", - .match = 0x10, - .match_mask = 0x10, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 4, - .minbit = 4, - .value = 0x1, - .pmaxbit = 13, - .pminbit = 5, - - }, - { - /* BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", - .match = 0x6, - .match_mask = 0x6, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 2, - .minbit = 1, - .value = 0x3, - .pmaxbit = 13, - .pminbit = 5, - - }, - { - /* BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", - .match = 0x60, - .match_mask = 0x60, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 6, - .minbit = 5, - .value = 0x3, - .pmaxbit = 13, - .pminbit = 5, - - }, - { - /* BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", - .match = 0x180, - .match_mask = 0x180, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 8, - .minbit = 7, - .value = 0x3, - .pmaxbit = 13, - .pminbit = 5, - - }, - { - /* BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", - .match = 0x106, - .match_mask = 0x186, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 8, - .minbit = 7, - .value = 0x2, - .pmaxbit = 13, - .pminbit = 5, - - }, - { - /* BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", - .match = 0x86, - .match_mask = 0x18e, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 8, - .minbit = 7, - .value = 0x1, - .pmaxbit = 13, - .pminbit = 5, - - }, - { - /* BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */ - .name = "INGRESS_PKT_INNER_L2_HDR_ITAG", - .match = 0x2, - .match_mask = 0x2, - .match_maxbit = 16, - .match_minbit = 14, - .maxbit = 1, - .minbit = 1, - .value = 0x1, - .pmaxbit = 16, - .pminbit = 14, - .zone_minbit = 11, - .arc_id_mask = 0x3800, - .num_zone_bmp_words = 1, - .zone_bmp = bcm56890_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_itag, - - }, - { - /* BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */ - .name = "INGRESS_PKT_INNER_L2_HDR_L2", - .match = 0x1, - .match_mask = 0x1, - .match_maxbit = 16, - .match_minbit = 14, - .maxbit = 0, - .minbit = 0, - .value = 0x1, - .pmaxbit = 16, - .pminbit = 14, - .zone_minbit = 11, - .arc_id_mask = 0x3800, - .num_zone_bmp_words = 1, - .zone_bmp = bcm56890_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_l2, - - }, - { - /* BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */ - .name = "INGRESS_PKT_INNER_L2_HDR_NONE", - .match = 0x0, - .match_mask = 0x7, - .match_maxbit = 16, - .match_minbit = 14, - .maxbit = 2, - .minbit = 0, - .value = 0x0, - .pmaxbit = 16, - .pminbit = 14, - .zone_minbit = 11, - .arc_id_mask = 0x3800, - - }, - { - /* BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */ - .name = "INGRESS_PKT_INNER_L2_HDR_OTAG", - .match = 0x4, - .match_mask = 0x4, - .match_maxbit = 16, - .match_minbit = 14, - .maxbit = 2, - .minbit = 2, - .value = 0x1, - .pmaxbit = 16, - .pminbit = 14, - .zone_minbit = 11, - .arc_id_mask = 0x3800, - .num_zone_bmp_words = 1, - .zone_bmp = bcm56890_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_otag, - - }, - { - /* BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_ARP", - .match = 0x80, - .match_mask = 0x18e, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 8, - .minbit = 7, - .value = 0x1, - .pmaxbit = 25, - .pminbit = 17, - .zone_minbit = 14, - .arc_id_mask = 0x7c000, - .num_zone_bmp_words = 1, - .zone_bmp = bcm56890_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_arp, - - }, - { - /* BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", - .match = 0x1, - .match_mask = 0x1, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 0, - .minbit = 0, - .value = 0x1, - .pmaxbit = 25, - .pminbit = 17, - .zone_minbit = 14, - .arc_id_mask = 0x7c000, - .num_zone_bmp_words = 1, - .zone_bmp = bcm56890_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ethertype, - - }, - { - /* BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_ICMP", - .match = 0x100, - .match_mask = 0x186, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 8, - .minbit = 7, - .value = 0x2, - .pmaxbit = 25, - .pminbit = 17, - .zone_minbit = 14, - .arc_id_mask = 0x7c000, - .num_zone_bmp_words = 1, - .zone_bmp = bcm56890_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_icmp, - - }, - { - /* BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER", - .match = 0x8, - .match_mask = 0x8, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 3, - .minbit = 3, - .value = 0x1, - .pmaxbit = 25, - .pminbit = 17, - .zone_minbit = 14, - .arc_id_mask = 0x7c000, - .num_zone_bmp_words = 1, - .zone_bmp = bcm56890_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_header, - - }, - { - /* BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE", - .match = 0x88, - .match_mask = 0x188, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 8, - .minbit = 7, - .value = 0x1, - .pmaxbit = 25, - .pminbit = 17, - .zone_minbit = 14, - .arc_id_mask = 0x7c000, - .num_zone_bmp_words = 1, - .zone_bmp = bcm56890_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_metadata_base, - - }, - { - /* BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV4", - .match = 0x20, - .match_mask = 0x60, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 6, - .minbit = 5, - .value = 0x1, - .pmaxbit = 25, - .pminbit = 17, - .zone_minbit = 14, - .arc_id_mask = 0x7c000, - .num_zone_bmp_words = 1, - .zone_bmp = bcm56890_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv4, - - }, - { - /* BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV6", - .match = 0x40, - .match_mask = 0x60, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 6, - .minbit = 5, - .value = 0x2, - .pmaxbit = 25, - .pminbit = 17, - .zone_minbit = 14, - .arc_id_mask = 0x7c000, - .num_zone_bmp_words = 1, - .zone_bmp = bcm56890_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv6, - - }, - { - /* BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_NONE", - .match = 0x0, - .match_mask = 0x1ff, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 8, - .minbit = 0, - .value = 0x0, - .pmaxbit = 25, - .pminbit = 17, - .zone_minbit = 14, - .arc_id_mask = 0x7c000, - - }, - { - /* BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_RARP", - .match = 0x2, - .match_mask = 0x6, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 2, - .minbit = 1, - .value = 0x1, - .pmaxbit = 25, - .pminbit = 17, - .zone_minbit = 14, - .arc_id_mask = 0x7c000, - .num_zone_bmp_words = 1, - .zone_bmp = bcm56890_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rarp, - - }, - { - /* BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", - .match = 0x4, - .match_mask = 0x6, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 2, - .minbit = 1, - .value = 0x2, - .pmaxbit = 25, - .pminbit = 17, - .zone_minbit = 14, - .arc_id_mask = 0x7c000, - .num_zone_bmp_words = 1, - .zone_bmp = bcm56890_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_first_4bytes, - - }, - { - /* BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", - .match = 0x10, - .match_mask = 0x10, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 4, - .minbit = 4, - .value = 0x1, - .pmaxbit = 25, - .pminbit = 17, - .zone_minbit = 14, - .arc_id_mask = 0x7c000, - .num_zone_bmp_words = 1, - .zone_bmp = bcm56890_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_last_16bytes, - - }, - { - /* BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_UDP", - .match = 0x6, - .match_mask = 0x6, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 2, - .minbit = 1, - .value = 0x3, - .pmaxbit = 25, - .pminbit = 17, - .zone_minbit = 14, - .arc_id_mask = 0x7c000, - .num_zone_bmp_words = 1, - .zone_bmp = bcm56890_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_udp, - - }, - { - /* BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", - .match = 0x60, - .match_mask = 0x60, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 6, - .minbit = 5, - .value = 0x3, - .pmaxbit = 25, - .pminbit = 17, - .zone_minbit = 14, - .arc_id_mask = 0x7c000, - .num_zone_bmp_words = 1, - .zone_bmp = bcm56890_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l3, - - }, - { - /* BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", - .match = 0x180, - .match_mask = 0x180, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 8, - .minbit = 7, - .value = 0x3, - .pmaxbit = 25, - .pminbit = 17, - .zone_minbit = 14, - .arc_id_mask = 0x7c000, - .num_zone_bmp_words = 1, - .zone_bmp = bcm56890_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l4, - - }, - { - /* BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", - .match = 0x106, - .match_mask = 0x186, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 8, - .minbit = 7, - .value = 0x2, - .pmaxbit = 25, - .pminbit = 17, - .zone_minbit = 14, - .arc_id_mask = 0x7c000, - .num_zone_bmp_words = 1, - .zone_bmp = bcm56890_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l5, - - }, - { - /* BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */ - .name = "INGRESS_PKT_OUTER_L2_HDR_ITAG", - .match = 0x2, - .match_mask = 0x2, - .match_maxbit = 4, - .match_minbit = 2, - .maxbit = 1, - .minbit = 1, - .value = 0x1, - .pmaxbit = 4, - .pminbit = 2, - .zone_minbit = 2, - .arc_id_mask = 0x1c, - .num_zone_bmp_words = 1, - .zone_bmp = bcm56890_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_itag, - - }, - { - /* BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */ - .name = "INGRESS_PKT_OUTER_L2_HDR_L2", - .match = 0x1, - .match_mask = 0x1, - .match_maxbit = 4, - .match_minbit = 2, - .maxbit = 0, - .minbit = 0, - .value = 0x1, - .pmaxbit = 4, - .pminbit = 2, - .zone_minbit = 2, - .arc_id_mask = 0x1c, - .num_zone_bmp_words = 1, - .zone_bmp = bcm56890_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_l2, - - }, - { - /* BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */ - .name = "INGRESS_PKT_OUTER_L2_HDR_NONE", - .match = 0x0, - .match_mask = 0x7, - .match_maxbit = 4, - .match_minbit = 2, - .maxbit = 2, - .minbit = 0, - .value = 0x0, - .pmaxbit = 4, - .pminbit = 2, - .zone_minbit = 2, - .arc_id_mask = 0x1c, - - }, - { - /* BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */ - .name = "INGRESS_PKT_OUTER_L2_HDR_OTAG", - .match = 0x4, - .match_mask = 0x4, - .match_maxbit = 4, - .match_minbit = 2, - .maxbit = 2, - .minbit = 2, - .value = 0x1, - .pmaxbit = 4, - .pminbit = 2, - .zone_minbit = 2, - .arc_id_mask = 0x1c, - .num_zone_bmp_words = 1, - .zone_bmp = bcm56890_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_otag, - - }, - { - /* BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ARP", - .match = 0x80, - .match_mask = 0x18e, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 8, - .minbit = 7, - .value = 0x1, - .pmaxbit = 13, - .pminbit = 5, - .zone_minbit = 5, - .arc_id_mask = 0x7e0, - .num_zone_bmp_words = 1, - .zone_bmp = bcm56890_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_arp, - - }, - { - /* BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", - .match = 0x1, - .match_mask = 0x1, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 0, - .minbit = 0, - .value = 0x1, - .pmaxbit = 13, - .pminbit = 5, - .zone_minbit = 5, - .arc_id_mask = 0x7e0, - .num_zone_bmp_words = 2, - .zone_bmp = bcm56890_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ethertype, - - }, - { - /* BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", - .match = 0x100, - .match_mask = 0x186, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 8, - .minbit = 7, - .value = 0x2, - .pmaxbit = 13, - .pminbit = 5, - .zone_minbit = 5, - .arc_id_mask = 0x7e0, - .num_zone_bmp_words = 1, - .zone_bmp = bcm56890_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_icmp, - - }, - { - /* BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER", - .match = 0x8, - .match_mask = 0x8, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 3, - .minbit = 3, - .value = 0x1, - .pmaxbit = 13, - .pminbit = 5, - .zone_minbit = 5, - .arc_id_mask = 0x7e0, - .num_zone_bmp_words = 1, - .zone_bmp = bcm56890_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_header, - - }, - { - /* BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE", - .match = 0x88, - .match_mask = 0x188, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 8, - .minbit = 7, - .value = 0x1, - .pmaxbit = 13, - .pminbit = 5, - .zone_minbit = 5, - .arc_id_mask = 0x7e0, - .num_zone_bmp_words = 1, - .zone_bmp = bcm56890_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_metadata_base, - - }, - { - /* BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", - .match = 0x20, - .match_mask = 0x60, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 6, - .minbit = 5, - .value = 0x1, - .pmaxbit = 13, - .pminbit = 5, - .zone_minbit = 5, - .arc_id_mask = 0x7e0, - .num_zone_bmp_words = 1, - .zone_bmp = bcm56890_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv4, - - }, - { - /* BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", - .match = 0x40, - .match_mask = 0x60, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 6, - .minbit = 5, - .value = 0x2, - .pmaxbit = 13, - .pminbit = 5, - .zone_minbit = 5, - .arc_id_mask = 0x7e0, - .num_zone_bmp_words = 2, - .zone_bmp = bcm56890_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv6, - - }, - { - /* BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_NONE", - .match = 0x0, - .match_mask = 0x1ff, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 8, - .minbit = 0, - .value = 0x0, - .pmaxbit = 13, - .pminbit = 5, - .zone_minbit = 5, - .arc_id_mask = 0x7e0, - - }, - { - /* BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_RARP", - .match = 0x2, - .match_mask = 0x6, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 2, - .minbit = 1, - .value = 0x1, - .pmaxbit = 13, - .pminbit = 5, - .zone_minbit = 5, - .arc_id_mask = 0x7e0, - .num_zone_bmp_words = 2, - .zone_bmp = bcm56890_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rarp, - - }, - { - /* BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", - .match = 0x4, - .match_mask = 0x6, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 2, - .minbit = 1, - .value = 0x2, - .pmaxbit = 13, - .pminbit = 5, - .zone_minbit = 5, - .arc_id_mask = 0x7e0, - .num_zone_bmp_words = 2, - .zone_bmp = bcm56890_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_first_4bytes, - - }, - { - /* BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", - .match = 0x10, - .match_mask = 0x10, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 4, - .minbit = 4, - .value = 0x1, - .pmaxbit = 13, - .pminbit = 5, - .zone_minbit = 5, - .arc_id_mask = 0x7e0, - .num_zone_bmp_words = 2, - .zone_bmp = bcm56890_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_last_16bytes, - - }, - { - /* BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UDP", - .match = 0x6, - .match_mask = 0x6, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 2, - .minbit = 1, - .value = 0x3, - .pmaxbit = 13, - .pminbit = 5, - .zone_minbit = 5, - .arc_id_mask = 0x7e0, - .num_zone_bmp_words = 2, - .zone_bmp = bcm56890_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_udp, - - }, - { - /* BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", - .match = 0x60, - .match_mask = 0x60, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 6, - .minbit = 5, - .value = 0x3, - .pmaxbit = 13, - .pminbit = 5, - .zone_minbit = 5, - .arc_id_mask = 0x7e0, - .num_zone_bmp_words = 2, - .zone_bmp = bcm56890_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l3, - - }, - { - /* BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", - .match = 0x180, - .match_mask = 0x180, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 8, - .minbit = 7, - .value = 0x3, - .pmaxbit = 13, - .pminbit = 5, - .zone_minbit = 5, - .arc_id_mask = 0x7e0, - .num_zone_bmp_words = 2, - .zone_bmp = bcm56890_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l4, - - }, - { - /* BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", - .match = 0x106, - .match_mask = 0x186, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 8, - .minbit = 7, - .value = 0x2, - .pmaxbit = 13, - .pminbit = 5, - .zone_minbit = 5, - .arc_id_mask = 0x7e0, - .num_zone_bmp_words = 2, - .zone_bmp = bcm56890_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l5, - - }, - { - /* BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", - .match = 0x86, - .match_mask = 0x18e, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 8, - .minbit = 7, - .value = 0x1, - .pmaxbit = 13, - .pminbit = 5, - .zone_minbit = 5, - .arc_id_mask = 0x7e0, - .num_zone_bmp_words = 2, - .zone_bmp = bcm56890_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_vxlan, - - }, - { - /* BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH */ - .name = "INGRESS_PKT_SYS_HDR_EP_NIH", - .match = 0x2, - .match_mask = 0x3, - .match_maxbit = 1, - .match_minbit = 0, - .maxbit = 1, - .minbit = 0, - .value = 0x2, - .pmaxbit = 1, - .pminbit = 0, - .zone_minbit = 0, - .arc_id_mask = 0x3, - .num_zone_bmp_words = 1, - .zone_bmp = bcm56890_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_sys_hdr_ep_nih, - - }, - { - /* BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */ - .name = "INGRESS_PKT_SYS_HDR_LOOPBACK", - .match = 0x1, - .match_mask = 0x3, - .match_maxbit = 1, - .match_minbit = 0, - .maxbit = 1, - .minbit = 0, - .value = 0x1, - .pmaxbit = 1, - .pminbit = 0, - .zone_minbit = 0, - .arc_id_mask = 0x3, - .num_zone_bmp_words = 1, - .zone_bmp = bcm56890_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_sys_hdr_loopback, - - }, - { - /* BCM56890_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */ - .name = "INGRESS_PKT_SYS_HDR_NONE", - .match = 0x0, - .match_mask = 0x3, - .match_maxbit = 1, - .match_minbit = 0, - .maxbit = 1, - .minbit = 0, - .value = 0x0, - .pmaxbit = 1, - .pminbit = 0, - .zone_minbit = 0, - .arc_id_mask = 0x3, - - }, -}; - -static bcmpkt_rxpmd_match_id_db_info_t bcm56890_a0_cna_6_5_34_2_0_rxpmd_match_id_db_info = { - .num_entries = 85, - .db = bcm56890_a0_cna_6_5_34_2_0_rxpmd_match_id_db -}; -bcmpkt_rxpmd_match_id_db_info_t * bcm56890_a0_cna_6_5_34_2_0_rxpmd_match_id_db_info_get(void) { - return &bcm56890_a0_cna_6_5_34_2_0_rxpmd_match_id_db_info; -} - -static shr_enum_map_t bcm56890_a0_cna_6_5_34_2_0_rxpmd_match_id_map[] = { - BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_rxpmd_match_id_map_info_t bcm56890_a0_cna_6_5_34_2_0_rxpmd_match_id_map_info = { - .num_entries = 85, - .map = bcm56890_a0_cna_6_5_34_2_0_rxpmd_match_id_map -}; - -bcmpkt_rxpmd_match_id_map_info_t * bcm56890_a0_cna_6_5_34_2_0_rxpmd_match_id_map_info_get(void) { - return &bcm56890_a0_cna_6_5_34_2_0_rxpmd_match_id_map_info; -} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/cna_6_5_34_2_0/bcm56890_a0_cna_6_5_34_2_0_pkt_flexhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/cna_6_5_34_2_0/bcm56890_a0_cna_6_5_34_2_0_pkt_flexhdr.c deleted file mode 100644 index 934b8879a77..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/cna_6_5_34_2_0/bcm56890_a0_cna_6_5_34_2_0_pkt_flexhdr.c +++ /dev/null @@ -1,4620 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) map.yml - * for device bcm56890_a0 and variant cna_6_5_34_2_0. - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - -#include -#include -#include -#include -#include -#include -#include - -#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) -#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) -#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) -#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) - -static void bcm56890_a0_cna_6_5_34_2_0_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons) -{ - uint32_t *reason = data + 0; - - if (reason[13] & (0x1 << 0)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU); - } - if (reason[13] & (0x1 << 1)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS); - } - if (reason[13] & (0x1 << 2)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE); - } - if (reason[13] & (0x1 << 3)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD); - } - if (reason[13] & (0x1 << 4)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST); - } - if (reason[13] & (0x1 << 5)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED); - } - if (reason[13] & (0x1 << 6)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT); - } - if (reason[13] & (0x1 << 7)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED); - } - if (reason[13] & (0x1 << 8)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED); - } - if (reason[13] & (0x1 << 9)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS); - } - if (reason[13] & (0x1 << 10)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP); - } - if (reason[13] & (0x1 << 11)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS); - } - if (reason[13] & (0x1 << 12)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP); - } - if (reason[13] & (0x1 << 13)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR); - } - if (reason[13] & (0x1 << 14)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR); - } - if (reason[13] & (0x1 << 16)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL); - } - if (reason[13] & (0x1 << 17)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_VFP); - } - if (reason[13] & (0x1 << 18)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP); - } - if (reason[13] & (0x1 << 19)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER); - } - if (reason[13] & (0x1 << 22)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT); - } - if (reason[13] & (0x1 << 23)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT); - } - if (reason[13] & (0x1 << 24)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED); - } - if (reason[13] & (0x1 << 25)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED); - } - if (reason[13] & (0x1 << 26)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP); - } - if (reason[12] & (0x1 << 15)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP); - } -} - -static void bcm56890_a0_cna_6_5_34_2_0_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data) -{ - uint32_t *reason = data + 0; - - reason[13] = 0; - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) { - reason[13] |= (0x1 << 0); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) { - reason[13] |= (0x1 << 1); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) { - reason[13] |= (0x1 << 2); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD)) { - reason[13] |= (0x1 << 3); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST)) { - reason[13] |= (0x1 << 4); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) { - reason[13] |= (0x1 << 5); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) { - reason[13] |= (0x1 << 6); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED)) { - reason[13] |= (0x1 << 7); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED)) { - reason[13] |= (0x1 << 8); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) { - reason[13] |= (0x1 << 9); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) { - reason[13] |= (0x1 << 10); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) { - reason[13] |= (0x1 << 11); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) { - reason[13] |= (0x1 << 12); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) { - reason[13] |= (0x1 << 13); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) { - reason[13] |= (0x1 << 14); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) { - reason[13] |= (0x1 << 16); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_VFP)) { - reason[13] |= (0x1 << 17); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP)) { - reason[13] |= (0x1 << 18); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) { - reason[13] |= (0x1 << 19); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT)) { - reason[13] |= (0x1 << 22); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) { - reason[13] |= (0x1 << 23); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED)) { - reason[13] |= (0x1 << 24); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED)) { - reason[13] |= (0x1 << 25); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP)) { - reason[13] |= (0x1 << 26); - } - reason[12] = 0; - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) { - reason[12] |= (0x1 << 15); - } -} - -static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_34_2_0_rxpmd_flex_field_data[] = { - { - .name = "DROP_CODE_15_0", - .fid = BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 48, 63 }, /* Profile 2. */ - { -1, -1 }, /* Profile 3. */ - { 48, 63 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "DVP_15_0", - .fid = BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_DVP_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 144, 159 }, /* Profile 2. */ - { 144, 159 }, /* Profile 3. */ - { 144, 159 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "EFFECTIVE_TTL_7_0", - .fid = BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 336, 343 }, /* Profile 2. */ - { 336, 343 }, /* Profile 3. */ - { 336, 343 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "ENTROPY_LABEL_HIGH_3_0", - .fid = BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 404, 407 }, /* Profile 2. */ - { 404, 407 }, /* Profile 3. */ - { 404, 407 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "ENTROPY_LABEL_LOW_15_0", - .fid = BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 368, 383 }, /* Profile 2. */ - { 368, 383 }, /* Profile 3. */ - { 368, 383 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "EP_NIH_HDR_DROP_CODE_15_0", - .fid = BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_DROP_CODE_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { -1, -1 }, /* Profile 2. */ - { 48, 63 }, /* Profile 3. */ - }, - .profile_cnt = 4, - }, - { - .name = "EP_NIH_HDR_RECIRC_CODE_3_0", - .fid = BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 384, 387 }, /* Profile 2. */ - { 384, 387 }, /* Profile 3. */ - { 384, 387 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "EP_NIH_HDR_TIMESTAMP_15_0", - .fid = BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 160, 175 }, /* Profile 2. */ - { 160, 175 }, /* Profile 3. */ - }, - .profile_cnt = 4, - }, - { - .name = "EP_NIH_HDR_TIMESTAMP_31_16", - .fid = BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 176, 191 }, /* Profile 2. */ - { 176, 191 }, /* Profile 3. */ - }, - .profile_cnt = 4, - }, - { - .name = "ERSPAN3_GBP_SID_15_0", - .fid = BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_ERSPAN3_GBP_SID_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 352, 367 }, /* Profile 2. */ - { 352, 367 }, /* Profile 3. */ - { 352, 367 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "EVENT_TRACE_VECTOR_15_0", - .fid = BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 0, 15 }, /* Profile 2. */ - { 0, 15 }, /* Profile 3. */ - { 0, 15 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "EVENT_TRACE_VECTOR_31_16", - .fid = BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 16, 31 }, /* Profile 2. */ - { 16, 31 }, /* Profile 3. */ - { 16, 31 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "EVENT_TRACE_VECTOR_47_32", - .fid = BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 32, 47 }, /* Profile 2. */ - { 32, 47 }, /* Profile 3. */ - { 32, 47 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "I2E_CLASS_ID_15_0", - .fid = BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 208, 223 }, /* Profile 2. */ - { 208, 223 }, /* Profile 3. */ - { 208, 223 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "IFP_IOAM_GBP_ACTION_3_0", - .fid = BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 412, 415 }, /* Profile 2. */ - { 412, 415 }, /* Profile 3. */ - { 412, 415 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "IFP_TS_CONTROL_ACTION_3_0", - .fid = BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 424, 427 }, /* Profile 2. */ - { 424, 427 }, /* Profile 3. */ - { 424, 427 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "ING_TIMESTAMP_15_0", - .fid = BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { -1, -1 }, /* Profile 2. */ - { -1, -1 }, /* Profile 3. */ - { 160, 175 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "ING_TIMESTAMP_31_16", - .fid = BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { -1, -1 }, /* Profile 2. */ - { -1, -1 }, /* Profile 3. */ - { 176, 191 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "INGRESS_PP_PORT_8_0", - .fid = BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_8_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 304, 312 }, /* Profile 2. */ - { 304, 312 }, /* Profile 3. */ - { 304, 312 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0", - .fid = BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 224, 239 }, /* Profile 2. */ - { 224, 239 }, /* Profile 3. */ - { 224, 239 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "INGRESS_QOS_REMARK_CTRL_3_0", - .fid = BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 416, 419 }, /* Profile 2. */ - { 416, 419 }, /* Profile 3. */ - { 416, 419 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "INT_PRI_3_0", - .fid = BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 428, 431 }, /* Profile 2. */ - { 428, 431 }, /* Profile 3. */ - { 428, 431 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "L2_IIF_10_0", - .fid = BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_L2_IIF_10_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 240, 250 }, /* Profile 2. */ - { 240, 250 }, /* Profile 3. */ - { 240, 250 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "L2_OIF_10_0", - .fid = BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_L2_OIF_10_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 112, 122 }, /* Profile 2. */ - { 112, 122 }, /* Profile 3. */ - { 112, 122 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "L3_IIF_13_0", - .fid = BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 272, 285 }, /* Profile 2. */ - { 272, 285 }, /* Profile 3. */ - { 272, 285 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "L3_OIF_1_13_0", - .fid = BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 128, 141 }, /* Profile 2. */ - { 128, 141 }, /* Profile 3. */ - { 128, 141 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "NHOP_2_OR_ECMP_GROUP_INDEX_1_14_0", - .fid = BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_14_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 288, 302 }, /* Profile 2. */ - { 288, 302 }, /* Profile 3. */ - { 288, 302 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "NHOP_INDEX_1_14_0", - .fid = BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_14_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 192, 206 }, /* Profile 2. */ - { 192, 206 }, /* Profile 3. */ - { 192, 206 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "PARSER_VHLEN_0_15_0", - .fid = BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 64, 79 }, /* Profile 2. */ - { 64, 79 }, /* Profile 3. */ - { 64, 79 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "PKT_MISC_CTRL_0_3_0", - .fid = BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 408, 411 }, /* Profile 2. */ - { 408, 411 }, /* Profile 3. */ - { 408, 411 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "SVP_15_0", - .fid = BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_SVP_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 256, 271 }, /* Profile 2. */ - { 256, 271 }, /* Profile 3. */ - { 256, 271 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "SVP_NETWORK_GROUP_BITMAP_3_0", - .fid = BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 388, 391 }, /* Profile 2. */ - { 388, 391 }, /* Profile 3. */ - { 388, 391 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "SYSTEM_DESTINATION_15_0", - .fid = BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 80, 95 }, /* Profile 2. */ - { 80, 95 }, /* Profile 3. */ - { 80, 95 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "SYSTEM_OPCODE_3_0", - .fid = BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 400, 403 }, /* Profile 2. */ - { 400, 403 }, /* Profile 3. */ - { 400, 403 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "SYSTEM_SOURCE_15_0", - .fid = BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 320, 335 }, /* Profile 2. */ - { 320, 335 }, /* Profile 3. */ - { 320, 335 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "TAG_ACTION_CTRL_1_0", - .fid = BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_TAG_ACTION_CTRL_1_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 420, 421 }, /* Profile 2. */ - { 420, 421 }, /* Profile 3. */ - { 420, 421 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "TIMESTAMP_CTRL_3_0", - .fid = BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 396, 399 }, /* Profile 2. */ - { 396, 399 }, /* Profile 3. */ - { 396, 399 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "TUNNEL_PROCESSING_RESULTS_1_3_0", - .fid = BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 392, 395 }, /* Profile 2. */ - { 392, 395 }, /* Profile 3. */ - { 392, 395 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "VFI_15_0", - .fid = BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_VFI_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 96, 111 }, /* Profile 2. */ - { 96, 111 }, /* Profile 3. */ - { 96, 111 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, -}; -static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_34_2_0_rxpmd_flex_field_info = { - .num_fields = BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_FID_COUNT, - .info = bcm56890_a0_cna_6_5_34_2_0_rxpmd_flex_field_data, - .profile_bmp_cnt = 1, - .profile_bmp[0] = 0x1c, - -}; - -static shr_enum_map_t bcm56890_a0_cna_6_5_34_2_0_rxpmd_flex_reason_names[] = { - BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT -}; - -static bcmpkt_flex_reasons_info_t bcm56890_a0_cna_6_5_34_2_0_rxpmd_flex_reasons_info = { - .num_reasons = BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_COUNT, - .reason_names = bcm56890_a0_cna_6_5_34_2_0_rxpmd_flex_reason_names, - .reason_encode = bcm56890_a0_cna_6_5_34_2_0_rxpmd_flex_reason_encode, - .reason_decode = bcm56890_a0_cna_6_5_34_2_0_rxpmd_flex_reason_decode, -}; - - -static int32_t bcmpkt_arp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 24, 8); - - return ret; -} - -static int32_t bcmpkt_arp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_arp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_arp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_arp_t_operation_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 16); - - return ret; -} - -static int32_t bcmpkt_arp_t_operation_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_arp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 8); - - return ret; -} - -static int32_t bcmpkt_arp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_arp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_arp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_arp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_arp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_arp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_arp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_arp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_arp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_arp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_arp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_34_2_0_arp_t_fget[BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_FID_COUNT] = { - bcmpkt_arp_t_hardware_len_get, - bcmpkt_arp_t_hardware_type_get, - bcmpkt_arp_t_operation_get, - bcmpkt_arp_t_prot_addr_len_get, - bcmpkt_arp_t_protocol_type_get, - bcmpkt_arp_t_sender_ha_get, - bcmpkt_arp_t_sender_ip_get, - bcmpkt_arp_t_target_ha_get, - bcmpkt_arp_t_target_ip_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_34_2_0_arp_t_fset[BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_FID_COUNT] = { - bcmpkt_arp_t_hardware_len_set, - bcmpkt_arp_t_hardware_type_set, - bcmpkt_arp_t_operation_set, - bcmpkt_arp_t_prot_addr_len_set, - bcmpkt_arp_t_protocol_type_set, - bcmpkt_arp_t_sender_ha_set, - bcmpkt_arp_t_sender_ip_set, - bcmpkt_arp_t_target_ha_set, - bcmpkt_arp_t_target_ip_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_34_2_0_arp_t_field_data[] = { - BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_34_2_0_arp_t_field_info = { - .num_fields = BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_FID_COUNT, - .info = bcm56890_a0_cna_6_5_34_2_0_arp_t_field_data, -}; - - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_34_2_0_cpu_composites_0_t_fget[BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { - bcmpkt_cpu_composites_0_t_dma_cont0_get, - bcmpkt_cpu_composites_0_t_dma_cont1_get, - bcmpkt_cpu_composites_0_t_dma_cont2_get, - bcmpkt_cpu_composites_0_t_dma_cont3_get, - bcmpkt_cpu_composites_0_t_dma_cont4_get, - bcmpkt_cpu_composites_0_t_dma_cont5_get, - bcmpkt_cpu_composites_0_t_dma_cont6_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_34_2_0_cpu_composites_0_t_fset[BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { - bcmpkt_cpu_composites_0_t_dma_cont0_set, - bcmpkt_cpu_composites_0_t_dma_cont1_set, - bcmpkt_cpu_composites_0_t_dma_cont2_set, - bcmpkt_cpu_composites_0_t_dma_cont3_set, - bcmpkt_cpu_composites_0_t_dma_cont4_set, - bcmpkt_cpu_composites_0_t_dma_cont5_set, - bcmpkt_cpu_composites_0_t_dma_cont6_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_34_2_0_cpu_composites_0_t_field_data[] = { - BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_34_2_0_cpu_composites_0_t_field_info = { - .num_fields = BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT, - .info = bcm56890_a0_cna_6_5_34_2_0_cpu_composites_0_t_field_data, -}; - - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_34_2_0_cpu_composites_1_t_fget[BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { - bcmpkt_cpu_composites_1_t_dma_cont10_get, - bcmpkt_cpu_composites_1_t_dma_cont11_get, - bcmpkt_cpu_composites_1_t_dma_cont12_get, - bcmpkt_cpu_composites_1_t_dma_cont13_get, - bcmpkt_cpu_composites_1_t_dma_cont14_get, - bcmpkt_cpu_composites_1_t_dma_cont15_get, - bcmpkt_cpu_composites_1_t_dma_cont16_get, - bcmpkt_cpu_composites_1_t_dma_cont17_get, - bcmpkt_cpu_composites_1_t_dma_cont7_get, - bcmpkt_cpu_composites_1_t_dma_cont8_get, - bcmpkt_cpu_composites_1_t_dma_cont9_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_34_2_0_cpu_composites_1_t_fset[BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { - bcmpkt_cpu_composites_1_t_dma_cont10_set, - bcmpkt_cpu_composites_1_t_dma_cont11_set, - bcmpkt_cpu_composites_1_t_dma_cont12_set, - bcmpkt_cpu_composites_1_t_dma_cont13_set, - bcmpkt_cpu_composites_1_t_dma_cont14_set, - bcmpkt_cpu_composites_1_t_dma_cont15_set, - bcmpkt_cpu_composites_1_t_dma_cont16_set, - bcmpkt_cpu_composites_1_t_dma_cont17_set, - bcmpkt_cpu_composites_1_t_dma_cont7_set, - bcmpkt_cpu_composites_1_t_dma_cont8_set, - bcmpkt_cpu_composites_1_t_dma_cont9_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_34_2_0_cpu_composites_1_t_field_data[] = { - BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_34_2_0_cpu_composites_1_t_field_info = { - .num_fields = BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT, - .info = bcm56890_a0_cna_6_5_34_2_0_cpu_composites_1_t_field_data, -}; - - -static int32_t bcmpkt_ep_nih_header_t_header_subtype_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 20, 4); - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_header_subtype_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 20, 4, val); - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_header_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 6); - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_header_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 6, val); - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 8, 4); - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 8, 4, val); - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 20, 4); - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 20, 4, val); - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 4); - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 4, val); - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[3], 16, 16); - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[3], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[3], 0, 16); - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[3], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 4); - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 4, val); - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 12, 4); - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 12, 4, val); - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_start_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 30, 2); - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_start_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 30, 2, val); - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_34_2_0_ep_nih_header_t_fget[BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = { - bcmpkt_ep_nih_header_t_header_subtype_get, - bcmpkt_ep_nih_header_t_header_type_get, - bcmpkt_ep_nih_header_t_opaque_ctrl_a_get, - bcmpkt_ep_nih_header_t_opaque_ctrl_b_get, - bcmpkt_ep_nih_header_t_opaque_ctrl_c_get, - bcmpkt_ep_nih_header_t_opaque_object_a_get, - bcmpkt_ep_nih_header_t_opaque_object_b_get, - bcmpkt_ep_nih_header_t_opaque_object_c_get, - bcmpkt_ep_nih_header_t_recirc_profile_index_get, - bcmpkt_ep_nih_header_t_reserved_0_get, - bcmpkt_ep_nih_header_t_start_get, - bcmpkt_ep_nih_header_t_timestamp_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_34_2_0_ep_nih_header_t_fset[BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = { - bcmpkt_ep_nih_header_t_header_subtype_set, - bcmpkt_ep_nih_header_t_header_type_set, - bcmpkt_ep_nih_header_t_opaque_ctrl_a_set, - bcmpkt_ep_nih_header_t_opaque_ctrl_b_set, - bcmpkt_ep_nih_header_t_opaque_ctrl_c_set, - bcmpkt_ep_nih_header_t_opaque_object_a_set, - bcmpkt_ep_nih_header_t_opaque_object_b_set, - bcmpkt_ep_nih_header_t_opaque_object_c_set, - bcmpkt_ep_nih_header_t_recirc_profile_index_set, - bcmpkt_ep_nih_header_t_reserved_0_set, - bcmpkt_ep_nih_header_t_start_set, - bcmpkt_ep_nih_header_t_timestamp_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_34_2_0_ep_nih_header_t_field_data[] = { - BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_34_2_0_ep_nih_header_t_field_info = { - .num_fields = BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT, - .info = bcm56890_a0_cna_6_5_34_2_0_ep_nih_header_t_field_data, -}; - - -static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 11, 2); - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 11, 2, val); - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 13, 3); - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 13, 3, val); - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 16, 16); - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 0, 16); - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 10); - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 10, val); - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_t_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 10, 1); - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_t_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 10, 1, val); - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 28, 4); - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 28, 4, val); - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 12); - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 12, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_34_2_0_erspan3_fixed_hdr_t_fget[BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { - bcmpkt_erspan3_fixed_hdr_t_bso_get, - bcmpkt_erspan3_fixed_hdr_t_cos_get, - bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get, - bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get, - bcmpkt_erspan3_fixed_hdr_t_session_id_get, - bcmpkt_erspan3_fixed_hdr_t_t_get, - bcmpkt_erspan3_fixed_hdr_t_timestamp_get, - bcmpkt_erspan3_fixed_hdr_t_ver_get, - bcmpkt_erspan3_fixed_hdr_t_vlan_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_34_2_0_erspan3_fixed_hdr_t_fset[BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { - bcmpkt_erspan3_fixed_hdr_t_bso_set, - bcmpkt_erspan3_fixed_hdr_t_cos_set, - bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set, - bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set, - bcmpkt_erspan3_fixed_hdr_t_session_id_set, - bcmpkt_erspan3_fixed_hdr_t_t_set, - bcmpkt_erspan3_fixed_hdr_t_timestamp_set, - bcmpkt_erspan3_fixed_hdr_t_ver_set, - bcmpkt_erspan3_fixed_hdr_t_vlan_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_34_2_0_erspan3_fixed_hdr_t_field_data[] = { - BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_34_2_0_erspan3_fixed_hdr_t_field_info = { - .num_fields = BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT, - .info = bcm56890_a0_cna_6_5_34_2_0_erspan3_fixed_hdr_t_field_data, -}; - - -static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 26, 6); - - return ret; -} - -static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 26, 6, val); - return ret; -} - -static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 10); - - return ret; -} - -static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 10, val); - return ret; -} - -static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_34_2_0_erspan3_subhdr_5_t_fget[BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { - bcmpkt_erspan3_subhdr_5_t_platform_id_get, - bcmpkt_erspan3_subhdr_5_t_port_id_get, - bcmpkt_erspan3_subhdr_5_t_switch_id_get, - bcmpkt_erspan3_subhdr_5_t_timestamp_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_34_2_0_erspan3_subhdr_5_t_fset[BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { - bcmpkt_erspan3_subhdr_5_t_platform_id_set, - bcmpkt_erspan3_subhdr_5_t_port_id_set, - bcmpkt_erspan3_subhdr_5_t_switch_id_set, - bcmpkt_erspan3_subhdr_5_t_timestamp_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_34_2_0_erspan3_subhdr_5_t_field_data[] = { - BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_34_2_0_erspan3_subhdr_5_t_field_info = { - .num_fields = BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT, - .info = bcm56890_a0_cna_6_5_34_2_0_erspan3_subhdr_5_t_field_data, -}; - - -static int32_t bcmpkt_ethertype_t_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_ethertype_t_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_34_2_0_ethertype_t_fget[BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = { - bcmpkt_ethertype_t_type_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_34_2_0_ethertype_t_fset[BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = { - bcmpkt_ethertype_t_type_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_34_2_0_ethertype_t_field_data[] = { - BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_34_2_0_ethertype_t_field_info = { - .num_fields = BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT, - .info = bcm56890_a0_cna_6_5_34_2_0_ethertype_t_field_data, -}; - - -static int32_t bcmpkt_generic_loopback_t_destination_obj_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 16); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_destination_obj_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_destination_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 24, 4); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_destination_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 24, 4, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_entropy_obj_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[3], 16, 16); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_entropy_obj_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[3], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_flags_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 4); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_flags_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 4, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_header_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 20, 4); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_header_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 20, 4, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_input_priority_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 12, 4); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_input_priority_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 12, 4, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_interface_ctrl_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 4, 4); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_interface_ctrl_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 4, 4, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_interface_obj_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 0, 16); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_interface_obj_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 4); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 4, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 28, 4); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 28, 4, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_qos_obj_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 8); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_qos_obj_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_reserved_1_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 8, 4); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_reserved_1_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 8, 4, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_reserved_2_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[3], 0, 16); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_reserved_2_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[3], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_source_system_port_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 16, 16); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_source_system_port_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_start_byte_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_start_byte_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_34_2_0_generic_loopback_t_fget[BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { - bcmpkt_generic_loopback_t_destination_obj_get, - bcmpkt_generic_loopback_t_destination_type_get, - bcmpkt_generic_loopback_t_entropy_obj_get, - bcmpkt_generic_loopback_t_flags_get, - bcmpkt_generic_loopback_t_header_type_get, - bcmpkt_generic_loopback_t_input_priority_get, - bcmpkt_generic_loopback_t_interface_ctrl_get, - bcmpkt_generic_loopback_t_interface_obj_get, - bcmpkt_generic_loopback_t_processing_ctrl_0_get, - bcmpkt_generic_loopback_t_processing_ctrl_1_get, - bcmpkt_generic_loopback_t_qos_obj_get, - bcmpkt_generic_loopback_t_reserved_1_get, - bcmpkt_generic_loopback_t_reserved_2_get, - bcmpkt_generic_loopback_t_source_system_port_get, - bcmpkt_generic_loopback_t_start_byte_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_34_2_0_generic_loopback_t_fset[BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { - bcmpkt_generic_loopback_t_destination_obj_set, - bcmpkt_generic_loopback_t_destination_type_set, - bcmpkt_generic_loopback_t_entropy_obj_set, - bcmpkt_generic_loopback_t_flags_set, - bcmpkt_generic_loopback_t_header_type_set, - bcmpkt_generic_loopback_t_input_priority_set, - bcmpkt_generic_loopback_t_interface_ctrl_set, - bcmpkt_generic_loopback_t_interface_obj_set, - bcmpkt_generic_loopback_t_processing_ctrl_0_set, - bcmpkt_generic_loopback_t_processing_ctrl_1_set, - bcmpkt_generic_loopback_t_qos_obj_set, - bcmpkt_generic_loopback_t_reserved_1_set, - bcmpkt_generic_loopback_t_reserved_2_set, - bcmpkt_generic_loopback_t_source_system_port_set, - bcmpkt_generic_loopback_t_start_byte_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_34_2_0_generic_loopback_t_field_data[] = { - BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_34_2_0_generic_loopback_t_field_info = { - .num_fields = BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT, - .info = bcm56890_a0_cna_6_5_34_2_0_generic_loopback_t_field_data, -}; - - -static int32_t bcmpkt_icmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_icmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_icmp_t_code_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_icmp_t_code_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_icmp_t_icmp_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_icmp_t_icmp_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_34_2_0_icmp_t_fget[BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ICMP_T_FID_COUNT] = { - bcmpkt_icmp_t_checksum_get, - bcmpkt_icmp_t_code_get, - bcmpkt_icmp_t_icmp_type_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_34_2_0_icmp_t_fset[BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ICMP_T_FID_COUNT] = { - bcmpkt_icmp_t_checksum_set, - bcmpkt_icmp_t_code_set, - bcmpkt_icmp_t_icmp_type_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_34_2_0_icmp_t_field_data[] = { - BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_34_2_0_icmp_t_field_info = { - .num_fields = BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_ICMP_T_FID_COUNT, - .info = bcm56890_a0_cna_6_5_34_2_0_icmp_t_field_data, -}; - - -static int32_t bcmpkt_ifa_header_t_flags_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 8, 8); - - return ret; -} - -static int32_t bcmpkt_ifa_header_t_flags_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 8, 8, val); - return ret; -} - -static int32_t bcmpkt_ifa_header_t_gns_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 4); - - return ret; -} - -static int32_t bcmpkt_ifa_header_t_gns_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 4, val); - return ret; -} - -static int32_t bcmpkt_ifa_header_t_max_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 8); - - return ret; -} - -static int32_t bcmpkt_ifa_header_t_max_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 8, val); - return ret; -} - -static int32_t bcmpkt_ifa_header_t_next_hdr_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_ifa_header_t_next_hdr_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_ifa_header_t_ver_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 28, 4); - - return ret; -} - -static int32_t bcmpkt_ifa_header_t_ver_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 28, 4, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_34_2_0_ifa_header_t_fget[BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = { - bcmpkt_ifa_header_t_flags_get, - bcmpkt_ifa_header_t_gns_get, - bcmpkt_ifa_header_t_max_length_get, - bcmpkt_ifa_header_t_next_hdr_get, - bcmpkt_ifa_header_t_ver_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_34_2_0_ifa_header_t_fset[BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = { - bcmpkt_ifa_header_t_flags_set, - bcmpkt_ifa_header_t_gns_set, - bcmpkt_ifa_header_t_max_length_set, - bcmpkt_ifa_header_t_next_hdr_set, - bcmpkt_ifa_header_t_ver_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_34_2_0_ifa_header_t_field_data[] = { - BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_34_2_0_ifa_header_t_field_info = { - .num_fields = BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_FID_COUNT, - .info = bcm56890_a0_cna_6_5_34_2_0_ifa_header_t_field_data, -}; - - -static int32_t bcmpkt_ifa_metadata_a_t_cn_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 26, 2); - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_a_t_cn_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 26, 2, val); - return ret; -} - -static int32_t bcmpkt_ifa_metadata_a_t_fwd_hdr_ttl_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 8); - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_a_t_fwd_hdr_ttl_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 8, val); - return ret; -} - -static int32_t bcmpkt_ifa_metadata_a_t_lns_device_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 8, 24); - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_a_t_lns_device_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 8, 24, val); - return ret; -} - -static int32_t bcmpkt_ifa_metadata_a_t_port_speed_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 28, 4); - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_a_t_port_speed_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 28, 4, val); - return ret; -} - -static int32_t bcmpkt_ifa_metadata_a_t_queue_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 20, 6); - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_a_t_queue_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 20, 6, val); - return ret; -} - -static int32_t bcmpkt_ifa_metadata_a_t_rx_timestamp_sec_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 20); - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_a_t_rx_timestamp_sec_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 20, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_34_2_0_ifa_metadata_a_t_fget[BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT] = { - bcmpkt_ifa_metadata_a_t_cn_get, - bcmpkt_ifa_metadata_a_t_fwd_hdr_ttl_get, - bcmpkt_ifa_metadata_a_t_lns_device_id_get, - bcmpkt_ifa_metadata_a_t_port_speed_get, - bcmpkt_ifa_metadata_a_t_queue_id_get, - bcmpkt_ifa_metadata_a_t_rx_timestamp_sec_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_34_2_0_ifa_metadata_a_t_fset[BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT] = { - bcmpkt_ifa_metadata_a_t_cn_set, - bcmpkt_ifa_metadata_a_t_fwd_hdr_ttl_set, - bcmpkt_ifa_metadata_a_t_lns_device_id_set, - bcmpkt_ifa_metadata_a_t_port_speed_set, - bcmpkt_ifa_metadata_a_t_queue_id_set, - bcmpkt_ifa_metadata_a_t_rx_timestamp_sec_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_34_2_0_ifa_metadata_a_t_field_data[] = { - BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_A_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_34_2_0_ifa_metadata_a_t_field_info = { - .num_fields = BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT, - .info = bcm56890_a0_cna_6_5_34_2_0_ifa_metadata_a_t_field_data, -}; - - -static int32_t bcmpkt_ifa_metadata_b_t_egress_port_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_b_t_egress_port_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_ifa_metadata_b_t_ingress_port_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_b_t_ingress_port_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_ifa_metadata_b_t_mmu_stat_0_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_b_t_mmu_stat_0_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_b_t_mmu_stat_1_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_b_t_mmu_stat_1_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_b_t_residence_time_nanosec_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_b_t_residence_time_nanosec_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_b_t_rx_timestamp_nanosec_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_b_t_rx_timestamp_nanosec_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_b_t_tx_queue_byte_count_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_b_t_tx_queue_byte_count_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_34_2_0_ifa_metadata_b_t_fget[BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT] = { - bcmpkt_ifa_metadata_b_t_egress_port_id_get, - bcmpkt_ifa_metadata_b_t_ingress_port_id_get, - bcmpkt_ifa_metadata_b_t_mmu_stat_0_get, - bcmpkt_ifa_metadata_b_t_mmu_stat_1_get, - bcmpkt_ifa_metadata_b_t_residence_time_nanosec_get, - bcmpkt_ifa_metadata_b_t_rx_timestamp_nanosec_get, - bcmpkt_ifa_metadata_b_t_tx_queue_byte_count_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_34_2_0_ifa_metadata_b_t_fset[BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT] = { - bcmpkt_ifa_metadata_b_t_egress_port_id_set, - bcmpkt_ifa_metadata_b_t_ingress_port_id_set, - bcmpkt_ifa_metadata_b_t_mmu_stat_0_set, - bcmpkt_ifa_metadata_b_t_mmu_stat_1_set, - bcmpkt_ifa_metadata_b_t_residence_time_nanosec_set, - bcmpkt_ifa_metadata_b_t_rx_timestamp_nanosec_set, - bcmpkt_ifa_metadata_b_t_tx_queue_byte_count_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_34_2_0_ifa_metadata_b_t_field_data[] = { - BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_B_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_34_2_0_ifa_metadata_b_t_field_info = { - .num_fields = BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT, - .info = bcm56890_a0_cna_6_5_34_2_0_ifa_metadata_b_t_field_data, -}; - - -static int32_t bcmpkt_ifa_metadata_base_t_action_vector_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_base_t_action_vector_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_ifa_metadata_base_t_hop_limit_current_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_base_t_hop_limit_current_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_ifa_metadata_base_t_request_vector_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_base_t_request_vector_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_34_2_0_ifa_metadata_base_t_fget[BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT] = { - bcmpkt_ifa_metadata_base_t_action_vector_get, - bcmpkt_ifa_metadata_base_t_hop_limit_current_length_get, - bcmpkt_ifa_metadata_base_t_request_vector_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_34_2_0_ifa_metadata_base_t_fset[BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT] = { - bcmpkt_ifa_metadata_base_t_action_vector_set, - bcmpkt_ifa_metadata_base_t_hop_limit_current_length_set, - bcmpkt_ifa_metadata_base_t_request_vector_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_34_2_0_ifa_metadata_base_t_field_data[] = { - BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_BASE_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_34_2_0_ifa_metadata_base_t_field_info = { - .num_fields = BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT, - .info = bcm56890_a0_cna_6_5_34_2_0_ifa_metadata_base_t_field_data, -}; - - -static int32_t bcmpkt_ipfix_t_export_time_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipfix_t_export_time_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipfix_t_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_ipfix_t_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_ipfix_t_obs_domain_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipfix_t_obs_domain_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipfix_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipfix_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipfix_t_version_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_ipfix_t_version_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_34_2_0_ipfix_t_fget[BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IPFIX_T_FID_COUNT] = { - bcmpkt_ipfix_t_export_time_get, - bcmpkt_ipfix_t_length_get, - bcmpkt_ipfix_t_obs_domain_id_get, - bcmpkt_ipfix_t_sequence_num_get, - bcmpkt_ipfix_t_version_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_34_2_0_ipfix_t_fset[BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IPFIX_T_FID_COUNT] = { - bcmpkt_ipfix_t_export_time_set, - bcmpkt_ipfix_t_length_set, - bcmpkt_ipfix_t_obs_domain_id_set, - bcmpkt_ipfix_t_sequence_num_set, - bcmpkt_ipfix_t_version_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_34_2_0_ipfix_t_field_data[] = { - BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_34_2_0_ipfix_t_field_info = { - .num_fields = BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IPFIX_T_FID_COUNT, - .info = bcm56890_a0_cna_6_5_34_2_0_ipfix_t_field_data, -}; - - -static int32_t bcmpkt_ipv4_t_da_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv4_t_da_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv4_t_flags_frag_offset_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 16); - - return ret; -} - -static int32_t bcmpkt_ipv4_t_flags_frag_offset_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_ipv4_t_hdr_checksum_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 0, 16); - - return ret; -} - -static int32_t bcmpkt_ipv4_t_hdr_checksum_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_ipv4_t_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 16); - - return ret; -} - -static int32_t bcmpkt_ipv4_t_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_ipv4_t_option_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv4_t_option_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv4_t_protocol_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 16, 8); - - return ret; -} - -static int32_t bcmpkt_ipv4_t_protocol_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_ipv4_t_sa_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv4_t_sa_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv4_t_tos_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_ipv4_t_tos_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_ipv4_t_total_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_ipv4_t_total_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_ipv4_t_ttl_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 24, 8); - - return ret; -} - -static int32_t bcmpkt_ipv4_t_ttl_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_ipv4_t_version_hdr_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_ipv4_t_version_hdr_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_34_2_0_ipv4_t_fget[BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_FID_COUNT] = { - bcmpkt_ipv4_t_da_get, - bcmpkt_ipv4_t_flags_frag_offset_get, - bcmpkt_ipv4_t_hdr_checksum_get, - bcmpkt_ipv4_t_id_get, - bcmpkt_ipv4_t_option_get, - bcmpkt_ipv4_t_protocol_get, - bcmpkt_ipv4_t_sa_get, - bcmpkt_ipv4_t_tos_get, - bcmpkt_ipv4_t_total_length_get, - bcmpkt_ipv4_t_ttl_get, - bcmpkt_ipv4_t_version_hdr_len_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_34_2_0_ipv4_t_fset[BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_FID_COUNT] = { - bcmpkt_ipv4_t_da_set, - bcmpkt_ipv4_t_flags_frag_offset_set, - bcmpkt_ipv4_t_hdr_checksum_set, - bcmpkt_ipv4_t_id_set, - bcmpkt_ipv4_t_option_set, - bcmpkt_ipv4_t_protocol_set, - bcmpkt_ipv4_t_sa_set, - bcmpkt_ipv4_t_tos_set, - bcmpkt_ipv4_t_total_length_set, - bcmpkt_ipv4_t_ttl_set, - bcmpkt_ipv4_t_version_hdr_len_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_34_2_0_ipv4_t_field_data[] = { - BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_34_2_0_ipv4_t_field_info = { - .num_fields = BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_FID_COUNT, - .info = bcm56890_a0_cna_6_5_34_2_0_ipv4_t_field_data, -}; - - -static int32_t bcmpkt_ipv6_t_da_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv6_t_da_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv6_t_flow_label_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 20); - - return ret; -} - -static int32_t bcmpkt_ipv6_t_flow_label_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 20, val); - return ret; -} - -static int32_t bcmpkt_ipv6_t_hop_limit_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 8); - - return ret; -} - -static int32_t bcmpkt_ipv6_t_hop_limit_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 8, val); - return ret; -} - -static int32_t bcmpkt_ipv6_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 8, 8); - - return ret; -} - -static int32_t bcmpkt_ipv6_t_next_header_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 8, 8, val); - return ret; -} - -static int32_t bcmpkt_ipv6_t_payload_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 16); - - return ret; -} - -static int32_t bcmpkt_ipv6_t_payload_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_ipv6_t_sa_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv6_t_sa_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv6_t_traffic_class_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 20, 8); - - return ret; -} - -static int32_t bcmpkt_ipv6_t_traffic_class_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 20, 8, val); - return ret; -} - -static int32_t bcmpkt_ipv6_t_version_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 28, 4); - - return ret; -} - -static int32_t bcmpkt_ipv6_t_version_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 28, 4, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_34_2_0_ipv6_t_fget[BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_FID_COUNT] = { - bcmpkt_ipv6_t_da_get, - bcmpkt_ipv6_t_flow_label_get, - bcmpkt_ipv6_t_hop_limit_get, - bcmpkt_ipv6_t_next_header_get, - bcmpkt_ipv6_t_payload_length_get, - bcmpkt_ipv6_t_sa_get, - bcmpkt_ipv6_t_traffic_class_get, - bcmpkt_ipv6_t_version_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_34_2_0_ipv6_t_fset[BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_FID_COUNT] = { - bcmpkt_ipv6_t_da_set, - bcmpkt_ipv6_t_flow_label_set, - bcmpkt_ipv6_t_hop_limit_set, - bcmpkt_ipv6_t_next_header_set, - bcmpkt_ipv6_t_payload_length_set, - bcmpkt_ipv6_t_sa_set, - bcmpkt_ipv6_t_traffic_class_set, - bcmpkt_ipv6_t_version_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_34_2_0_ipv6_t_field_data[] = { - BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_34_2_0_ipv6_t_field_info = { - .num_fields = BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_FID_COUNT, - .info = bcm56890_a0_cna_6_5_34_2_0_ipv6_t_field_data, -}; - - -static int32_t bcmpkt_l2_t_macda_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_l2_t_macda_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_l2_t_macsa_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_l2_t_macsa_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_34_2_0_l2_t_fget[BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_L2_T_FID_COUNT] = { - bcmpkt_l2_t_macda_get, - bcmpkt_l2_t_macsa_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_34_2_0_l2_t_fset[BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_L2_T_FID_COUNT] = { - bcmpkt_l2_t_macda_set, - bcmpkt_l2_t_macsa_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_34_2_0_l2_t_field_data[] = { - BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_34_2_0_l2_t_field_info = { - .num_fields = BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_L2_T_FID_COUNT, - .info = bcm56890_a0_cna_6_5_34_2_0_l2_t_field_data, -}; - - -static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_34_2_0_mirror_erspan_sn_t_fget[BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { - bcmpkt_mirror_erspan_sn_t_seq_num_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_34_2_0_mirror_erspan_sn_t_fset[BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { - bcmpkt_mirror_erspan_sn_t_seq_num_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_34_2_0_mirror_erspan_sn_t_field_data[] = { - BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_34_2_0_mirror_erspan_sn_t_field_info = { - .num_fields = BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT, - .info = bcm56890_a0_cna_6_5_34_2_0_mirror_erspan_sn_t_field_data, -}; - - -static int32_t bcmpkt_mirror_transport_t_data_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_mirror_transport_t_data_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_34_2_0_mirror_transport_t_fget[BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { - bcmpkt_mirror_transport_t_data_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_34_2_0_mirror_transport_t_fset[BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { - bcmpkt_mirror_transport_t_data_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_34_2_0_mirror_transport_t_field_data[] = { - BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_34_2_0_mirror_transport_t_field_info = { - .num_fields = BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT, - .info = bcm56890_a0_cna_6_5_34_2_0_mirror_transport_t_field_data, -}; - - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[4], 16, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[4], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[4], 0, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[4], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_34_2_0_psamp_mirror_on_drop_0_t_fget[BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { - bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get, - bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get, - bcmpkt_psamp_mirror_on_drop_0_t_length_get, - bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get, - bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get, - bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get, - bcmpkt_psamp_mirror_on_drop_0_t_template_id_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_34_2_0_psamp_mirror_on_drop_0_t_fset[BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { - bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set, - bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set, - bcmpkt_psamp_mirror_on_drop_0_t_length_set, - bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set, - bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set, - bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set, - bcmpkt_psamp_mirror_on_drop_0_t_template_id_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_34_2_0_psamp_mirror_on_drop_0_t_field_data[] = { - BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_34_2_0_psamp_mirror_on_drop_0_t_field_info = { - .num_fields = BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT, - .info = bcm56890_a0_cna_6_5_34_2_0_psamp_mirror_on_drop_0_t_field_data, -}; - - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 6); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 6, val); - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_smod_state_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 22, 2); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_smod_state_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 22, 2, val); - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 24, 8); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 8); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 8, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_34_2_0_psamp_mirror_on_drop_3_t_fget[BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = { - bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get, - bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get, - bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get, - bcmpkt_psamp_mirror_on_drop_3_t_smod_state_get, - bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get, - bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get, - bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_34_2_0_psamp_mirror_on_drop_3_t_fset[BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = { - bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set, - bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set, - bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set, - bcmpkt_psamp_mirror_on_drop_3_t_smod_state_set, - bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set, - bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set, - bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_34_2_0_psamp_mirror_on_drop_3_t_field_data[] = { - BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_34_2_0_psamp_mirror_on_drop_3_t_field_info = { - .num_fields = BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT, - .info = bcm56890_a0_cna_6_5_34_2_0_psamp_mirror_on_drop_3_t_field_data, -}; - - -static int32_t bcmpkt_rarp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 24, 8); - - return ret; -} - -static int32_t bcmpkt_rarp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_rarp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_rarp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_rarp_t_operation_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 16); - - return ret; -} - -static int32_t bcmpkt_rarp_t_operation_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_rarp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 8); - - return ret; -} - -static int32_t bcmpkt_rarp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_rarp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_rarp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_rarp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_rarp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_rarp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_rarp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_rarp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_rarp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_rarp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_rarp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_34_2_0_rarp_t_fget[BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_FID_COUNT] = { - bcmpkt_rarp_t_hardware_len_get, - bcmpkt_rarp_t_hardware_type_get, - bcmpkt_rarp_t_operation_get, - bcmpkt_rarp_t_prot_addr_len_get, - bcmpkt_rarp_t_protocol_type_get, - bcmpkt_rarp_t_sender_ha_get, - bcmpkt_rarp_t_sender_ip_get, - bcmpkt_rarp_t_target_ha_get, - bcmpkt_rarp_t_target_ip_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_34_2_0_rarp_t_fset[BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_FID_COUNT] = { - bcmpkt_rarp_t_hardware_len_set, - bcmpkt_rarp_t_hardware_type_set, - bcmpkt_rarp_t_operation_set, - bcmpkt_rarp_t_prot_addr_len_set, - bcmpkt_rarp_t_protocol_type_set, - bcmpkt_rarp_t_sender_ha_set, - bcmpkt_rarp_t_sender_ip_set, - bcmpkt_rarp_t_target_ha_set, - bcmpkt_rarp_t_target_ip_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_34_2_0_rarp_t_field_data[] = { - BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_34_2_0_rarp_t_field_info = { - .num_fields = BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_FID_COUNT, - .info = bcm56890_a0_cna_6_5_34_2_0_rarp_t_field_data, -}; - - -static int32_t bcmpkt_sflow_shim_0_t_sys_destination_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 16); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_0_t_sys_destination_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_sflow_shim_0_t_sys_source_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 16); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_0_t_sys_source_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_sflow_shim_0_t_version_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_sflow_shim_0_t_version_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_34_2_0_sflow_shim_0_t_fget[BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { - bcmpkt_sflow_shim_0_t_sys_destination_get, - bcmpkt_sflow_shim_0_t_sys_source_get, - bcmpkt_sflow_shim_0_t_version_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_34_2_0_sflow_shim_0_t_fset[BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { - bcmpkt_sflow_shim_0_t_sys_destination_set, - bcmpkt_sflow_shim_0_t_sys_source_set, - bcmpkt_sflow_shim_0_t_version_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_34_2_0_sflow_shim_0_t_field_data[] = { - BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_34_2_0_sflow_shim_0_t_field_info = { - .num_fields = BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT, - .info = bcm56890_a0_cna_6_5_34_2_0_sflow_shim_0_t_field_data, -}; - - -static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 30, 1); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 30, 1, val); - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 27, 1); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 27, 1, val); - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 29, 1); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 29, 1, val); - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 28, 1); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 28, 1, val); - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 31, 1); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 31, 1, val); - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 26, 1); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 26, 1, val); - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 7); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_reserved_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 7, val); - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 23, 3); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 23, 3, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_34_2_0_sflow_shim_1_t_fget[BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { - bcmpkt_sflow_shim_1_t_flag_dest_sample_get, - bcmpkt_sflow_shim_1_t_flag_discarded_get, - bcmpkt_sflow_shim_1_t_flag_flex_sample_get, - bcmpkt_sflow_shim_1_t_flag_mcast_get, - bcmpkt_sflow_shim_1_t_flag_src_sample_get, - bcmpkt_sflow_shim_1_t_flag_truncated_get, - bcmpkt_sflow_shim_1_t_reserved_get, - bcmpkt_sflow_shim_1_t_sys_opcode_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_34_2_0_sflow_shim_1_t_fset[BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { - bcmpkt_sflow_shim_1_t_flag_dest_sample_set, - bcmpkt_sflow_shim_1_t_flag_discarded_set, - bcmpkt_sflow_shim_1_t_flag_flex_sample_set, - bcmpkt_sflow_shim_1_t_flag_mcast_set, - bcmpkt_sflow_shim_1_t_flag_src_sample_set, - bcmpkt_sflow_shim_1_t_flag_truncated_set, - bcmpkt_sflow_shim_1_t_reserved_set, - bcmpkt_sflow_shim_1_t_sys_opcode_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_34_2_0_sflow_shim_1_t_field_data[] = { - BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_34_2_0_sflow_shim_1_t_field_info = { - .num_fields = BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT, - .info = bcm56890_a0_cna_6_5_34_2_0_sflow_shim_1_t_field_data, -}; - - -static int32_t bcmpkt_sflow_shim_2_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_sflow_shim_2_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_34_2_0_sflow_shim_2_t_fget[BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { - bcmpkt_sflow_shim_2_t_sequence_num_get, - bcmpkt_sflow_shim_2_t_user_meta_data_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_34_2_0_sflow_shim_2_t_fset[BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { - bcmpkt_sflow_shim_2_t_sequence_num_set, - bcmpkt_sflow_shim_2_t_user_meta_data_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_34_2_0_sflow_shim_2_t_field_data[] = { - BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_34_2_0_sflow_shim_2_t_field_info = { - .num_fields = BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT, - .info = bcm56890_a0_cna_6_5_34_2_0_sflow_shim_2_t_field_data, -}; - - -static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_tcp_first_4bytes_t_src_port_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_tcp_first_4bytes_t_src_port_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_34_2_0_tcp_first_4bytes_t_fget[BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { - bcmpkt_tcp_first_4bytes_t_dst_port_get, - bcmpkt_tcp_first_4bytes_t_src_port_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_34_2_0_tcp_first_4bytes_t_fset[BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { - bcmpkt_tcp_first_4bytes_t_dst_port_set, - bcmpkt_tcp_first_4bytes_t_src_port_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_34_2_0_tcp_first_4bytes_t_field_data[] = { - BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_34_2_0_tcp_first_4bytes_t_field_info = { - .num_fields = BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT, - .info = bcm56890_a0_cna_6_5_34_2_0_tcp_first_4bytes_t_field_data, -}; - - -static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[3], 16, 16); - - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_checksum_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[3], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 16, 16); - - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[3], 0, 16); - - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[3], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_win_size_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 0, 16); - - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_win_size_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 0, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_34_2_0_tcp_last_16bytes_t_fget[BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { - bcmpkt_tcp_last_16bytes_t_ack_num_get, - bcmpkt_tcp_last_16bytes_t_checksum_get, - bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get, - bcmpkt_tcp_last_16bytes_t_seq_num_get, - bcmpkt_tcp_last_16bytes_t_urgent_ptr_get, - bcmpkt_tcp_last_16bytes_t_win_size_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_34_2_0_tcp_last_16bytes_t_fset[BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { - bcmpkt_tcp_last_16bytes_t_ack_num_set, - bcmpkt_tcp_last_16bytes_t_checksum_set, - bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set, - bcmpkt_tcp_last_16bytes_t_seq_num_set, - bcmpkt_tcp_last_16bytes_t_urgent_ptr_set, - bcmpkt_tcp_last_16bytes_t_win_size_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_34_2_0_tcp_last_16bytes_t_field_data[] = { - BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_34_2_0_tcp_last_16bytes_t_field_info = { - .num_fields = BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT, - .info = bcm56890_a0_cna_6_5_34_2_0_tcp_last_16bytes_t_field_data, -}; - - -static int32_t bcmpkt_udp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 16); - - return ret; -} - -static int32_t bcmpkt_udp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_udp_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_udp_t_dst_port_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_udp_t_src_port_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_udp_t_src_port_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_udp_t_udp_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 16); - - return ret; -} - -static int32_t bcmpkt_udp_t_udp_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_34_2_0_udp_t_fget[BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_UDP_T_FID_COUNT] = { - bcmpkt_udp_t_checksum_get, - bcmpkt_udp_t_dst_port_get, - bcmpkt_udp_t_src_port_get, - bcmpkt_udp_t_udp_length_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_34_2_0_udp_t_fset[BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_UDP_T_FID_COUNT] = { - bcmpkt_udp_t_checksum_set, - bcmpkt_udp_t_dst_port_set, - bcmpkt_udp_t_src_port_set, - bcmpkt_udp_t_udp_length_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_34_2_0_udp_t_field_data[] = { - BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_34_2_0_udp_t_field_info = { - .num_fields = BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_UDP_T_FID_COUNT, - .info = bcm56890_a0_cna_6_5_34_2_0_udp_t_field_data, -}; - - -static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_34_2_0_unknown_l3_t_fget[BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { - bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get, - bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_34_2_0_unknown_l3_t_fset[BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { - bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set, - bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_34_2_0_unknown_l3_t_field_data[] = { - BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_34_2_0_unknown_l3_t_field_info = { - .num_fields = BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT, - .info = bcm56890_a0_cna_6_5_34_2_0_unknown_l3_t_field_data, -}; - - -static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_34_2_0_unknown_l4_t_fget[BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { - bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_34_2_0_unknown_l4_t_fset[BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { - bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_34_2_0_unknown_l4_t_field_data[] = { - BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_34_2_0_unknown_l4_t_field_info = { - .num_fields = BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT, - .info = bcm56890_a0_cna_6_5_34_2_0_unknown_l4_t_field_data, -}; - - -static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_34_2_0_unknown_l5_t_fget[BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { - bcmpkt_unknown_l5_t_l5_bytes_0_1_get, - bcmpkt_unknown_l5_t_l5_bytes_2_3_get, - bcmpkt_unknown_l5_t_l5_bytes_4_7_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_34_2_0_unknown_l5_t_fset[BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { - bcmpkt_unknown_l5_t_l5_bytes_0_1_set, - bcmpkt_unknown_l5_t_l5_bytes_2_3_set, - bcmpkt_unknown_l5_t_l5_bytes_4_7_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_34_2_0_unknown_l5_t_field_data[] = { - BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_34_2_0_unknown_l5_t_field_info = { - .num_fields = BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT, - .info = bcm56890_a0_cna_6_5_34_2_0_unknown_l5_t_field_data, -}; - - -static int32_t bcmpkt_vlan_t_cfi_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 12, 1); - - return ret; -} - -static int32_t bcmpkt_vlan_t_cfi_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 12, 1, val); - return ret; -} - -static int32_t bcmpkt_vlan_t_pcp_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 13, 3); - - return ret; -} - -static int32_t bcmpkt_vlan_t_pcp_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 13, 3, val); - return ret; -} - -static int32_t bcmpkt_vlan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_vlan_t_tpid_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_vlan_t_vid_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 12); - - return ret; -} - -static int32_t bcmpkt_vlan_t_vid_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 12, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_34_2_0_vlan_t_fget[BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_VLAN_T_FID_COUNT] = { - bcmpkt_vlan_t_cfi_get, - bcmpkt_vlan_t_pcp_get, - bcmpkt_vlan_t_tpid_get, - bcmpkt_vlan_t_vid_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_34_2_0_vlan_t_fset[BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_VLAN_T_FID_COUNT] = { - bcmpkt_vlan_t_cfi_set, - bcmpkt_vlan_t_pcp_set, - bcmpkt_vlan_t_tpid_set, - bcmpkt_vlan_t_vid_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_34_2_0_vlan_t_field_data[] = { - BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_34_2_0_vlan_t_field_info = { - .num_fields = BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_VLAN_T_FID_COUNT, - .info = bcm56890_a0_cna_6_5_34_2_0_vlan_t_field_data, -}; - - -static int32_t bcmpkt_vxlan_t_flags_reserved_1_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_vxlan_t_flags_reserved_1_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_vxlan_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 8); - - return ret; -} - -static int32_t bcmpkt_vxlan_t_reserved2_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 8, val); - return ret; -} - -static int32_t bcmpkt_vxlan_t_vn_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 8, 24); - - return ret; -} - -static int32_t bcmpkt_vxlan_t_vn_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 8, 24, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_cna_6_5_34_2_0_vxlan_t_fget[BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_VXLAN_T_FID_COUNT] = { - bcmpkt_vxlan_t_flags_reserved_1_get, - bcmpkt_vxlan_t_reserved2_get, - bcmpkt_vxlan_t_vn_id_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_cna_6_5_34_2_0_vxlan_t_fset[BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_VXLAN_T_FID_COUNT] = { - bcmpkt_vxlan_t_flags_reserved_1_set, - bcmpkt_vxlan_t_reserved2_set, - bcmpkt_vxlan_t_vn_id_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_cna_6_5_34_2_0_vxlan_t_field_data[] = { - BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_cna_6_5_34_2_0_vxlan_t_field_info = { - .num_fields = BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_VXLAN_T_FID_COUNT, - .info = bcm56890_a0_cna_6_5_34_2_0_vxlan_t_field_data, -}; - -static bcmpkt_flex_pmd_info_t bcm56890_a0_cna_6_5_34_2_0_flexhdr_info_list[BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_FLEXHDR_COUNT] = { - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_cna_6_5_34_2_0_arp_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_cna_6_5_34_2_0_arp_t_fget, - .flex_fset = bcm56890_a0_cna_6_5_34_2_0_arp_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_cna_6_5_34_2_0_cpu_composites_0_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_cna_6_5_34_2_0_cpu_composites_0_t_fget, - .flex_fset = bcm56890_a0_cna_6_5_34_2_0_cpu_composites_0_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_cna_6_5_34_2_0_cpu_composites_1_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_cna_6_5_34_2_0_cpu_composites_1_t_fget, - .flex_fset = bcm56890_a0_cna_6_5_34_2_0_cpu_composites_1_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_cna_6_5_34_2_0_ep_nih_header_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_cna_6_5_34_2_0_ep_nih_header_t_fget, - .flex_fset = bcm56890_a0_cna_6_5_34_2_0_ep_nih_header_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_cna_6_5_34_2_0_erspan3_fixed_hdr_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_cna_6_5_34_2_0_erspan3_fixed_hdr_t_fget, - .flex_fset = bcm56890_a0_cna_6_5_34_2_0_erspan3_fixed_hdr_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_cna_6_5_34_2_0_erspan3_subhdr_5_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_cna_6_5_34_2_0_erspan3_subhdr_5_t_fget, - .flex_fset = bcm56890_a0_cna_6_5_34_2_0_erspan3_subhdr_5_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_cna_6_5_34_2_0_ethertype_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_cna_6_5_34_2_0_ethertype_t_fget, - .flex_fset = bcm56890_a0_cna_6_5_34_2_0_ethertype_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_cna_6_5_34_2_0_generic_loopback_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_cna_6_5_34_2_0_generic_loopback_t_fget, - .flex_fset = bcm56890_a0_cna_6_5_34_2_0_generic_loopback_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_cna_6_5_34_2_0_icmp_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_cna_6_5_34_2_0_icmp_t_fget, - .flex_fset = bcm56890_a0_cna_6_5_34_2_0_icmp_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_cna_6_5_34_2_0_ifa_header_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_cna_6_5_34_2_0_ifa_header_t_fget, - .flex_fset = bcm56890_a0_cna_6_5_34_2_0_ifa_header_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_cna_6_5_34_2_0_ifa_metadata_a_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_cna_6_5_34_2_0_ifa_metadata_a_t_fget, - .flex_fset = bcm56890_a0_cna_6_5_34_2_0_ifa_metadata_a_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_cna_6_5_34_2_0_ifa_metadata_b_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_cna_6_5_34_2_0_ifa_metadata_b_t_fget, - .flex_fset = bcm56890_a0_cna_6_5_34_2_0_ifa_metadata_b_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_cna_6_5_34_2_0_ifa_metadata_base_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_cna_6_5_34_2_0_ifa_metadata_base_t_fget, - .flex_fset = bcm56890_a0_cna_6_5_34_2_0_ifa_metadata_base_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_cna_6_5_34_2_0_ipfix_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_cna_6_5_34_2_0_ipfix_t_fget, - .flex_fset = bcm56890_a0_cna_6_5_34_2_0_ipfix_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_cna_6_5_34_2_0_ipv4_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_cna_6_5_34_2_0_ipv4_t_fget, - .flex_fset = bcm56890_a0_cna_6_5_34_2_0_ipv4_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_cna_6_5_34_2_0_ipv6_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_cna_6_5_34_2_0_ipv6_t_fget, - .flex_fset = bcm56890_a0_cna_6_5_34_2_0_ipv6_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_cna_6_5_34_2_0_l2_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_cna_6_5_34_2_0_l2_t_fget, - .flex_fset = bcm56890_a0_cna_6_5_34_2_0_l2_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_cna_6_5_34_2_0_mirror_erspan_sn_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_cna_6_5_34_2_0_mirror_erspan_sn_t_fget, - .flex_fset = bcm56890_a0_cna_6_5_34_2_0_mirror_erspan_sn_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_cna_6_5_34_2_0_mirror_transport_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_cna_6_5_34_2_0_mirror_transport_t_fget, - .flex_fset = bcm56890_a0_cna_6_5_34_2_0_mirror_transport_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_cna_6_5_34_2_0_psamp_mirror_on_drop_0_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_cna_6_5_34_2_0_psamp_mirror_on_drop_0_t_fget, - .flex_fset = bcm56890_a0_cna_6_5_34_2_0_psamp_mirror_on_drop_0_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_cna_6_5_34_2_0_psamp_mirror_on_drop_3_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_cna_6_5_34_2_0_psamp_mirror_on_drop_3_t_fget, - .flex_fset = bcm56890_a0_cna_6_5_34_2_0_psamp_mirror_on_drop_3_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_cna_6_5_34_2_0_rarp_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_cna_6_5_34_2_0_rarp_t_fget, - .flex_fset = bcm56890_a0_cna_6_5_34_2_0_rarp_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_cna_6_5_34_2_0_sflow_shim_0_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_cna_6_5_34_2_0_sflow_shim_0_t_fget, - .flex_fset = bcm56890_a0_cna_6_5_34_2_0_sflow_shim_0_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_cna_6_5_34_2_0_sflow_shim_1_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_cna_6_5_34_2_0_sflow_shim_1_t_fget, - .flex_fset = bcm56890_a0_cna_6_5_34_2_0_sflow_shim_1_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_cna_6_5_34_2_0_sflow_shim_2_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_cna_6_5_34_2_0_sflow_shim_2_t_fget, - .flex_fset = bcm56890_a0_cna_6_5_34_2_0_sflow_shim_2_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_cna_6_5_34_2_0_tcp_first_4bytes_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_cna_6_5_34_2_0_tcp_first_4bytes_t_fget, - .flex_fset = bcm56890_a0_cna_6_5_34_2_0_tcp_first_4bytes_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_cna_6_5_34_2_0_tcp_last_16bytes_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_cna_6_5_34_2_0_tcp_last_16bytes_t_fget, - .flex_fset = bcm56890_a0_cna_6_5_34_2_0_tcp_last_16bytes_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_cna_6_5_34_2_0_udp_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_cna_6_5_34_2_0_udp_t_fget, - .flex_fset = bcm56890_a0_cna_6_5_34_2_0_udp_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_cna_6_5_34_2_0_unknown_l3_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_cna_6_5_34_2_0_unknown_l3_t_fget, - .flex_fset = bcm56890_a0_cna_6_5_34_2_0_unknown_l3_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_cna_6_5_34_2_0_unknown_l4_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_cna_6_5_34_2_0_unknown_l4_t_fget, - .flex_fset = bcm56890_a0_cna_6_5_34_2_0_unknown_l4_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_cna_6_5_34_2_0_unknown_l5_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_cna_6_5_34_2_0_unknown_l5_t_fget, - .flex_fset = bcm56890_a0_cna_6_5_34_2_0_unknown_l5_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_cna_6_5_34_2_0_vlan_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_cna_6_5_34_2_0_vlan_t_fget, - .flex_fset = bcm56890_a0_cna_6_5_34_2_0_vlan_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_cna_6_5_34_2_0_vxlan_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_cna_6_5_34_2_0_vxlan_t_fget, - .flex_fset = bcm56890_a0_cna_6_5_34_2_0_vxlan_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_cna_6_5_34_2_0_rxpmd_flex_field_info, - .reasons_info = &bcm56890_a0_cna_6_5_34_2_0_rxpmd_flex_reasons_info, - .flex_common_fget = bcm56890_a0_rxpmd_flex_fget, - .flex_common_fset = bcm56890_a0_rxpmd_flex_fset, - }, -}; - -static shr_enum_map_t bcm56890_a0_cna_6_5_34_2_0_flexhdr_id_map[] = { - BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_FLEXHDR_NAME_MAP_INIT -}; - -shr_enum_map_t * bcm56890_a0_cna_6_5_34_2_0_flexhdr_map_get(void) -{ - return bcm56890_a0_cna_6_5_34_2_0_flexhdr_id_map; -} - -bcmpkt_flex_pmd_info_t * bcm56890_a0_cna_6_5_34_2_0_flex_pmd_info_get(uint32_t hid) -{ - if (hid >= BCM56890_A0_CNA_6_5_34_2_0_BCMPKT_FLEXHDR_COUNT) { - return NULL; - } - - return &bcm56890_a0_cna_6_5_34_2_0_flexhdr_info_list[hid]; -} - -int bcm56890_a0_cna_6_5_34_2_0_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = { - 7, - -1, - -1, - 33, -}; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/dna_6_5_34_8_0/bcm56890_a0_dna_6_5_34_8_0_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/dna_6_5_34_8_0/bcm56890_a0_dna_6_5_34_8_0_bcmpkt_rxpmd_match_id.c deleted file mode 100644 index 36c9a608e34..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/dna_6_5_34_8_0/bcm56890_a0_dna_6_5_34_8_0_bcmpkt_rxpmd_match_id.c +++ /dev/null @@ -1,7454 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) bcm56890_a0_dna_6_5_34_8_0_sf_match_id_info.yml - * for device bcm56890_a0 and variant dna_6_5_34_8_0. - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - - -#include -#include - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_cntag[1] = -{ - 0x366c, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_itag[1] = -{ - 0x78f0, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_l2[1] = -{ - 0x1fffe, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_otag[1] = -{ - 0xff00, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_snap_or_llc[1] = -{ - 0x1e4c8, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_arp[1] = -{ - 0x4, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_1[39] = -{ - 0x10, - 0x400000, - 0x1dd8000, - 0x20, - 0x0, - 0x0, - 0x0, - 0xbfddfddf, - 0xf77fbbfb, - 0xddfddf77, - 0x1, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x400000, - 0x0, - 0x100, - 0x800776, - 0x0, - 0x0, - 0x0, - 0xf77c0000, - 0xefeeff77, - 0x7ddfddfe, - 0x777f7, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_2[55] = -{ - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x1dde, - 0x0, - 0x0, - 0x7778, - 0x0, - 0x0, - 0x1dde0, - 0x0, - 0xbc000000, - 0x3b, - 0x0, - 0x0, - 0x3bbc0, - 0x0, - 0x0, - 0x77780, - 0x0, - 0x0, - 0x3bbc0000, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x77780000, - 0x0, - 0x0, - 0xdde00000, - 0x1, - 0x0, - 0x77800000, - 0x7, - 0x0, - 0xeef000, - 0x0, - 0x0, - 0xef000000, - 0xe, - 0x0, - 0xde000000, - 0x1d, - 0x0, - 0x0, - 0xeef0, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_bfd[57] = -{ - 0x0, - 0x0, - 0x100000, - 0x1000000, - 0x0, - 0x0, - 0x2000, - 0x100100, - 0x4002002, - 0x10010040, - 0x400400, - 0x10008008, - 0x40040100, - 0x1001000, - 0x40040020, - 0x100100, - 0x4002002, - 0x80080040, - 0x200200, - 0x2002000, - 0x80040040, - 0x200800, - 0x4004002, - 0x80080, - 0x401001, - 0x2001004, - 0x40040020, - 0x800800, - 0x2002, - 0x0, - 0x0, - 0x40, - 0x400, - 0x0, - 0x80000000, - 0x4000000, - 0x80080040, - 0x1001000, - 0x10004004, - 0x200100, - 0x4004002, - 0x40010010, - 0x800400, - 0x4010010, - 0x80080040, - 0x1001000, - 0x8020020, - 0x80000080, - 0x1000800, - 0x20020010, - 0x80080, - 0x2001001, - 0x40040020, - 0x40100100, - 0x800800, - 0x20010010, - 0x80080200, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_1[42] = -{ - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0xff77f77c, - 0xddfeefee, - 0x77f77ddf, - 0x7, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0xddf00000, - 0xbfbbfddf, - 0xf77f77fb, - 0x1ddfdd, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_2[55] = -{ - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x1dde000, - 0x0, - 0x0, - 0x7778000, - 0x0, - 0x0, - 0x1dde0000, - 0x0, - 0x0, - 0x3bbc0, - 0x0, - 0x0, - 0x3bbc0000, - 0x0, - 0x0, - 0x77780000, - 0x0, - 0x0, - 0xc0000000, - 0x3bb, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x80000000, - 0x777, - 0x0, - 0x0, - 0x1dde, - 0x0, - 0x0, - 0x7778, - 0x0, - 0xef000000, - 0xe, - 0x0, - 0x0, - 0xeef0, - 0x0, - 0x0, - 0x1dde0, - 0x0, - 0x0, - 0xeef0000, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_esp_ext[55] = -{ - 0x0, - 0x0, - 0x0, - 0x40, - 0x0, - 0x0, - 0x0, - 0x2000000, - 0x0, - 0x0, - 0x8000000, - 0x0, - 0x0, - 0x20000008, - 0x0, - 0x0, - 0x40000, - 0x0, - 0x0, - 0x40000000, - 0x0, - 0x0, - 0x80000000, - 0x0, - 0x0, - 0x0, - 0x400, - 0x0, - 0x0, - 0x0, - 0x0, - 0x1000000, - 0x0, - 0x0, - 0x0, - 0x0, - 0x800, - 0x0, - 0x0, - 0x2000, - 0x0, - 0x200000, - 0x8000, - 0x0, - 0x0, - 0x10, - 0x0, - 0x0, - 0x10000, - 0x0, - 0x0, - 0x20000, - 0x0, - 0x0, - 0x10000000, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ethertype[29] = -{ - 0x1e, - 0x400000, - 0x1dd8000, - 0x3ddcafe0, - 0x0, - 0x8000, - 0xc003bb00, - 0xbfddfddf, - 0xf77fbbfb, - 0xddfddf77, - 0xff77f77d, - 0xddfeefee, - 0x77f77ddf, - 0xfddfddff, - 0x77f77fbb, - 0xbfddfddf, - 0xf77fbbfb, - 0xefeeff77, - 0x7fbbfbbe, - 0xfbbfbbe5, - 0xeff77f77, - 0xbfbbeefe, - 0xf77f77fb, - 0xdfeefeef, - 0x7f77ddfd, - 0xfbbfddf7, - 0x77f77fbb, - 0xbeefeeff, - 0x1bbbfb, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_1[45] = -{ - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0xfddfddf0, - 0x77f77fbb, - 0x1ddfddf, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x77c00000, - 0xfeeff77f, - 0xf77ddfdd, - 0x777, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_2[56] = -{ - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0xbc000000, - 0x3b, - 0x0, - 0xf0000000, - 0xee, - 0x0, - 0x0, - 0x0, - 0x0, - 0x77780000, - 0x0, - 0x0, - 0x80000000, - 0x777, - 0x0, - 0x0, - 0xeef, - 0x0, - 0x0, - 0x777800, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0xeef000, - 0x0, - 0x0, - 0x3bbc000, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x1dde0, - 0x0, - 0x0, - 0x1dde0000, - 0x0, - 0x0, - 0x3bbc0000, - 0x0, - 0x0, - 0xe0000000, - 0x1dd, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_1[48] = -{ - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0xbe000000, - 0xf77fbbfb, - 0xefeeff77, - 0x3bbfbbe, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0xefeef800, - 0xfddfddfe, - 0xeefbbfbb, - 0xeef, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_2[56] = -{ - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x3bbc0, - 0x0, - 0x0, - 0xeef00, - 0x0, - 0xc0000000, - 0x3bb, - 0x0, - 0x80000000, - 0x777, - 0x0, - 0x0, - 0x777800, - 0x0, - 0x0, - 0xeef000, - 0x0, - 0x0, - 0x77800000, - 0x7, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0xef000000, - 0xe, - 0x0, - 0xbc000000, - 0x3b, - 0x0, - 0xeef0000, - 0x0, - 0x0, - 0x1dde0000, - 0x0, - 0x0, - 0xe0000000, - 0x1dd, - 0x0, - 0xc0000000, - 0x3bb, - 0x0, - 0x0, - 0x1dde00, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_icmp[57] = -{ - 0x0, - 0x400000, - 0x0, - 0x80, - 0x0, - 0x8000, - 0x0, - 0x8004004, - 0x140080, - 0x400001, - 0x20010010, - 0x500200, - 0x1000004, - 0x80040040, - 0x1001400, - 0x8004000, - 0x100080, - 0x2002801, - 0x4008000, - 0x80080, - 0x2801001, - 0x8000020, - 0x100100, - 0x5002002, - 0x10000040, - 0x80080000, - 0x1001000, - 0x20028, - 0x80, - 0x0, - 0x100, - 0x2000000, - 0x0, - 0x0, - 0x2, - 0x100000, - 0x2002001, - 0x40050, - 0x400100, - 0x8008004, - 0x100140, - 0x1000400, - 0x50020010, - 0x400, - 0x2002001, - 0xa0040040, - 0x800, - 0x2001002, - 0x40040020, - 0x800a00, - 0x4002000, - 0x80080040, - 0x1001400, - 0x4000, - 0x40020020, - 0xa00400, - 0x2000008, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_header[48] = -{ - 0x0, - 0x0, - 0x0, - 0xaf00, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x78000000, - 0x5, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0xbc000000, - 0x2, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x15e000, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_metadata_base[48] = -{ - 0x0, - 0x0, - 0x0, - 0x8800, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x40000000, - 0x4, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x20000000, - 0x2, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x110000, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_igmp[36] = -{ - 0x0, - 0x0, - 0x0, - 0x40020, - 0x0, - 0x0, - 0x40000000, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x800000, - 0x10, - 0x0, - 0x0, - 0x10000, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv4[36] = -{ - 0x18, - 0x400000, - 0x1dd8000, - 0x3ddcafe0, - 0x0, - 0x8000, - 0x4003bb00, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x600000, - 0x0, - 0x100, - 0xbf800776, - 0xf772, - 0x0, - 0xec000002, - 0x1000e, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv6[58] = -{ - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x80000000, - 0xbfddfddf, - 0xf77fbbfb, - 0xddfddf77, - 0xff77f77d, - 0xddfeefee, - 0x77f77ddf, - 0xfddfddff, - 0x77f77fbb, - 0xbfddfddf, - 0xf77fbbfb, - 0xefeeff77, - 0x7fbbfbbe, - 0xfbbfbbe5, - 0xeff77f77, - 0xbfbbeefe, - 0xf77f77fb, - 0xdfeefeef, - 0x7f77ddfd, - 0xfbbfddf7, - 0x77f77fbb, - 0xbeefeeff, - 0x3bbfb, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0xf77e0000, - 0xefeeff77, - 0x7ddfddfe, - 0xddf777f7, - 0xbfbbfddf, - 0xf77f77fb, - 0x77fddfdd, - 0xfeeff77f, - 0xf77ddfdd, - 0xefeeff77, - 0xfddfddfe, - 0xeefbbfbb, - 0xef95feef, - 0xfddfeefe, - 0xbbfbbfdd, - 0xdfeefeef, - 0xfbbfddfd, - 0x77f77fbb, - 0x77ddfddf, - 0xfeefeeff, - 0xbbfddfdd, - 0xefeefbbf, - 0xe, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_p_1588[58] = -{ - 0x0, - 0x0, - 0x400000, - 0x4000000, - 0x0, - 0x0, - 0x8000, - 0x400400, - 0x10008008, - 0x40040100, - 0x1001000, - 0x40020020, - 0x100400, - 0x4004001, - 0x100080, - 0x400401, - 0x10008008, - 0x200100, - 0x800802, - 0x8008000, - 0x100100, - 0x802002, - 0x10010008, - 0x200200, - 0x1004004, - 0x8004010, - 0x100080, - 0x2002001, - 0x8008, - 0x0, - 0x0, - 0x100, - 0x1000, - 0x0, - 0x0, - 0x10000002, - 0x200100, - 0x4004002, - 0x40010010, - 0x800400, - 0x10010008, - 0x40040, - 0x2001001, - 0x10040040, - 0x200100, - 0x4004002, - 0x20080080, - 0x200, - 0x4002002, - 0x80080040, - 0x200200, - 0x8004004, - 0x100080, - 0x400401, - 0x2002001, - 0x80040040, - 0x200800, - 0x2, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_1[51] = -{ - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0xfbbfbbe0, - 0xeff77f77, - 0xbfbbeefe, - 0x3b, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0xef800000, - 0xfddfeefe, - 0xbbfbbfdd, - 0xeefeef, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_2[57] = -{ - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x77780000, - 0x0, - 0x0, - 0xdde00000, - 0x1, - 0x0, - 0x777800, - 0x0, - 0x0, - 0xeef000, - 0x0, - 0x0, - 0xef000000, - 0xe, - 0x0, - 0xde000000, - 0x1d, - 0x0, - 0x0, - 0xeef0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x1dde0, - 0x0, - 0x0, - 0x77780, - 0x0, - 0xe0000000, - 0x1dd, - 0x0, - 0xc0000000, - 0x3bb, - 0x0, - 0x0, - 0x3bbc00, - 0x0, - 0x0, - 0x777800, - 0x0, - 0x0, - 0xbbc00000, - 0x3, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rarp[29] = -{ - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x80000, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_1[54] = -{ - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0xf77f77c0, - 0xdfeefeef, - 0x7f77ddfd, - 0x77, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0xdf000000, - 0xfbbfddfd, - 0x77f77fbb, - 0x1ddfddf, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_2[57] = -{ - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x80000000, - 0x777, - 0x0, - 0x0, - 0x1dde, - 0x0, - 0x77800000, - 0x7, - 0x0, - 0xef000000, - 0xe, - 0x0, - 0x0, - 0xeef0, - 0x0, - 0x0, - 0x1dde0, - 0x0, - 0x0, - 0xeef0000, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x1dde0000, - 0x0, - 0x0, - 0x77780000, - 0x0, - 0x0, - 0x1dde00, - 0x0, - 0x0, - 0x3bbc00, - 0x0, - 0x0, - 0xbbc00000, - 0x3, - 0x0, - 0x77800000, - 0x7, - 0x0, - 0x0, - 0x3bbc, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_first_4bytes[57] = -{ - 0x0, - 0x0, - 0x58000, - 0x580e00, - 0x0, - 0x0, - 0xb00, - 0xb0058058, - 0x1600b00, - 0x5805816, - 0xc0160160, - 0x5802c02, - 0x16016058, - 0x580580, - 0x1601600b, - 0xb0058058, - 0x1600b00, - 0x2c02c016, - 0x700b00b0, - 0xb00b00, - 0x2c016016, - 0xb00b02c0, - 0x1601600, - 0x5802c02c, - 0x60160580, - 0xb00581, - 0x1601600b, - 0xb02c02c0, - 0xb00, - 0x0, - 0x0, - 0x38000016, - 0x160, - 0x0, - 0x2c000000, - 0x1600000, - 0x2c02c016, - 0x60580580, - 0x5801601, - 0xb00b0058, - 0x81601600, - 0x16005805, - 0x802c0160, - 0x1605805, - 0x2c02c016, - 0x580580, - 0x2c0b00b, - 0x2c01c02c, - 0x805802c0, - 0xb00b005, - 0x5802c02c, - 0xb00580, - 0x1601600b, - 0x16058058, - 0x802c02c0, - 0xb005805, - 0x2c02c0b0, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_last_16bytes[57] = -{ - 0x0, - 0x0, - 0x50000, - 0x500c00, - 0x0, - 0x0, - 0xa00, - 0xa0050050, - 0x1400a00, - 0x5005014, - 0x80140140, - 0x5002802, - 0x14014050, - 0x500500, - 0x1401400a, - 0xa0050050, - 0x1400a00, - 0x28028014, - 0x600a00a0, - 0xa00a00, - 0x28014014, - 0xa00a0280, - 0x1401400, - 0x50028028, - 0x40140500, - 0xa00501, - 0x1401400a, - 0xa0280280, - 0xa00, - 0x0, - 0x0, - 0x30000014, - 0x140, - 0x0, - 0x28000000, - 0x1400000, - 0x28028014, - 0x40500500, - 0x5001401, - 0xa00a0050, - 0x1401400, - 0x14005005, - 0x280140, - 0x1405005, - 0x28028014, - 0x500500, - 0x280a00a, - 0x28018028, - 0x500280, - 0xa00a005, - 0x50028028, - 0xa00500, - 0x1401400a, - 0x14050050, - 0x280280, - 0xa005005, - 0x280280a0, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_udp[58] = -{ - 0x0, - 0x0, - 0xd80000, - 0xd80a000, - 0x0, - 0x0, - 0x1b000, - 0xd80d80, - 0x3601b01b, - 0xd80d8360, - 0x3603600, - 0xd806c06c, - 0x60360d80, - 0xd80d803, - 0x603601b0, - 0xd80d83, - 0x3601b01b, - 0xc06c0360, - 0x1b01b06, - 0x1b01b005, - 0xc0360360, - 0x1b06c06, - 0x3603601b, - 0x806c06c0, - 0x360d80d, - 0x1b00d836, - 0x603601b0, - 0x6c06c03, - 0x1b01b, - 0x0, - 0x0, - 0x80000360, - 0x3602, - 0x0, - 0xc0000000, - 0x36000006, - 0xc06c0360, - 0xd80d806, - 0xd8036036, - 0x1b00d80, - 0x3603601b, - 0x600d80d8, - 0x6c03603, - 0x360d80d8, - 0xc06c0360, - 0xd80d806, - 0x6c1b01b0, - 0xc01406c0, - 0xd806c06, - 0xb01b00d8, - 0x806c06c1, - 0x1b00d80d, - 0x603601b0, - 0x60d80d83, - 0x6c06c03, - 0xb00d80d8, - 0xc06c1b01, - 0x6, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l3[29] = -{ - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x100000, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l4[58] = -{ - 0x0, - 0x0, - 0x1000000, - 0x10000000, - 0x0, - 0x0, - 0x20000, - 0x1001000, - 0x40020020, - 0x100400, - 0x4004001, - 0x80080, - 0x401001, - 0x10010004, - 0x400200, - 0x1001004, - 0x40020020, - 0x800400, - 0x2002008, - 0x20020000, - 0x400400, - 0x2008008, - 0x40040020, - 0x800800, - 0x4010010, - 0x20010040, - 0x400200, - 0x8008004, - 0x20020, - 0x0, - 0x0, - 0x400, - 0x4000, - 0x0, - 0x0, - 0x40000008, - 0x800400, - 0x10010008, - 0x40040, - 0x2001001, - 0x40040020, - 0x100100, - 0x8004004, - 0x40100100, - 0x800400, - 0x10010008, - 0x80200200, - 0x800, - 0x10008008, - 0x200100, - 0x800802, - 0x20010010, - 0x400200, - 0x1001004, - 0x8008004, - 0x100100, - 0x802002, - 0x8, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l5[58] = -{ - 0x0, - 0x0, - 0x840000, - 0x8400000, - 0x0, - 0x0, - 0x10800, - 0x80840840, - 0x21010810, - 0x84084210, - 0x2102100, - 0x84042042, - 0x10210840, - 0x8408402, - 0x10210108, - 0x80840842, - 0x21010810, - 0x20420210, - 0x1081084, - 0x10810800, - 0x20210210, - 0x81084204, - 0x21021010, - 0x40420420, - 0x2108408, - 0x10808421, - 0x10210108, - 0x84204202, - 0x10810, - 0x0, - 0x0, - 0x210, - 0x2100, - 0x0, - 0x20000000, - 0x21000004, - 0x20420210, - 0x8408404, - 0x84021021, - 0x81080840, - 0x21021010, - 0x10084084, - 0x4202102, - 0x21084084, - 0x20420210, - 0x8408404, - 0x42108108, - 0x20000420, - 0x8404204, - 0x8108084, - 0x40420421, - 0x10808408, - 0x10210108, - 0x10840842, - 0x4204202, - 0x8084084, - 0x20421081, - 0x4, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_1[58] = -{ - 0x0, - 0x0, - 0x0, - 0x20000000, - 0x0, - 0x8000, - 0x4003bb00, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0xfbbe0000, - 0x77f77fbb, - 0xbeefeeff, - 0x3bbfb, - 0x0, - 0x0, - 0x0, - 0x8000, - 0x0, - 0xec000002, - 0x1000e, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0xfeefeef8, - 0xbbfddfdd, - 0xefeefbbf, - 0xe, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_2[58] = -{ - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0xdde00000, - 0x1, - 0x0, - 0x77800000, - 0x7, - 0x0, - 0x1dde000, - 0x0, - 0x0, - 0x3bbc000, - 0x0, - 0x0, - 0xbc000000, - 0x3b, - 0x0, - 0x78000000, - 0x77, - 0x0, - 0x0, - 0x3bbc0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x77780, - 0x0, - 0x0, - 0x1dde00, - 0x0, - 0x80000000, - 0x777, - 0x0, - 0x0, - 0xeef, - 0x0, - 0x0, - 0xeef000, - 0x0, - 0x0, - 0x1dde000, - 0x0, - 0x0, - 0xef000000, - 0xe, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_cntag[5] = -{ - 0x3060cc18, - 0x3060c198, - 0x660c183, - 0x60cc183, - 0xc1983, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_gbp_ethernet_shim[5] = -{ - 0x40090120, - 0x4801202, - 0x48090024, - 0x901200, - 0x12024, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_base[5] = -{ - 0xfc000000, - 0xffffffff, - 0xfff, - 0xffffffe0, - 0x7fffff, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_ext_0[5] = -{ - 0x0, - 0xfff80000, - 0xfff, - 0xc0000000, - 0x7fffff, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_itag[5] = -{ - 0x807e0fc0, - 0x3f00fc1f, - 0xf07e01f8, - 0x7e0fc03, - 0xfc1f8, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_l2[5] = -{ - 0xfffffffe, - 0xffffffff, - 0xffffffff, - 0xffffffff, - 0x7fffff, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_mim_gbp[5] = -{ - 0x901200, - 0x48012024, - 0x80900240, - 0x9012004, - 0x120240, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_otag[5] = -{ - 0x1ffe000, - 0x8003ffc0, - 0xff0007ff, - 0x1ffe000f, - 0x3ffc00, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_snap_or_llc[5] = -{ - 0x23448890, - 0x22468911, - 0x24448d12, - 0x3448891a, - 0x689112, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_svtag[5] = -{ - 0x0, - 0x0, - 0xfffff000, - 0xffffffff, - 0x7fffff, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_arp[1] = -{ - 0x4, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_1[15] = -{ - 0x10, - 0x0, - 0x4, - 0x20003df6, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0xeff7df00, - 0xf7fbeffb, - 0xfbfdf7fd, - 0xefbfdf7e, - 0x1, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_2[36] = -{ - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0xf7de00, - 0x0, - 0x0, - 0x0, - 0x3df78, - 0x0, - 0x0, - 0xe0000000, - 0xf7d, - 0x0, - 0x0, - 0x0, - 0x1efbc0, - 0x0, - 0x0, - 0x0, - 0xfbc00000, - 0x1e, - 0x0, - 0x0, - 0x3df78000, - 0x0, - 0x0, - 0x0, - 0x80000000, - 0x3df7, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_bfd[40] = -{ - 0x0, - 0x0, - 0x0, - 0x40, - 0x0, - 0x8008000, - 0x20, - 0x0, - 0x0, - 0x10000, - 0x80010000, - 0x40008000, - 0x20004000, - 0x2000400, - 0x2000400, - 0x1000200, - 0x800100, - 0x80010, - 0x80010, - 0x80008, - 0x40008004, - 0x0, - 0x10002000, - 0x8001000, - 0x4000800, - 0x400080, - 0x20004000, - 0x10001000, - 0x8000800, - 0x800400, - 0x400040, - 0x200020, - 0x100010, - 0x80010008, - 0x401000, - 0x200040, - 0x100020, - 0x100020, - 0x10002, - 0x4444444, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_1[18] = -{ - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0xefbfdf7c, - 0xf7dfefbf, - 0xfbeff7df, - 0x7beff7d, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_2[36] = -{ - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0xef000000, - 0x7b, - 0x0, - 0x0, - 0xefbc0000, - 0x1, - 0x0, - 0x0, - 0x7bef000, - 0x0, - 0x0, - 0x0, - 0x7de00000, - 0xf, - 0x0, - 0x0, - 0x0, - 0xf7de0, - 0x0, - 0x0, - 0xc0000000, - 0x1efb, - 0x0, - 0x0, - 0x0, - 0x1efbc000, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_esp_ext[36] = -{ - 0x0, - 0x0, - 0x0, - 0x40000000, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x80, - 0x0, - 0x0, - 0x0, - 0x2, - 0x0, - 0x8000000, - 0x8000000, - 0x0, - 0x0, - 0x0, - 0x0, - 0x10, - 0x0, - 0x0, - 0x0, - 0x100000, - 0x0, - 0x0, - 0x0, - 0x2000, - 0x0, - 0x0, - 0x0, - 0x20000000, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ethertype[40] = -{ - 0x1e, - 0x0, - 0x4, - 0xe0003df6, - 0xffffffff, - 0xbefbf117, - 0x3eff, - 0x0, - 0x1800, - 0xf7d800, - 0xeff7df80, - 0xf7fbeffb, - 0xfbfdf7fd, - 0xefbfdf7e, - 0xefbfdf7d, - 0xf7dfefbf, - 0xfbeff7df, - 0xffbeff7d, - 0xffbeff7d, - 0x7fbeffbe, - 0xf7fbefdf, - 0xfffffffd, - 0x7dfefbff, - 0xbeff7dff, - 0xdf7fbeff, - 0xfdf7fbef, - 0xfbfdf117, - 0x7dff7dfe, - 0xbeffbeff, - 0xfbefdf7f, - 0xfdf7fdf7, - 0xfefbfefb, - 0xff7dff7d, - 0xeff7dfbe, - 0xfdff7dfb, - 0xfefbfdf7, - 0xdf7dfefb, - 0xbf7dfefb, - 0xfff7dfef, - 0x7fffffff, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_1[22] = -{ - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0xf0000000, - 0xffbeff7d, - 0x7fbeffbe, - 0xf7fbefdf, - 0x3d, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_2[37] = -{ - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x7bef00, - 0x0, - 0x0, - 0x0, - 0x1efbc, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0xf7de0, - 0x0, - 0x0, - 0x0, - 0x7de00000, - 0xf, - 0x0, - 0x0, - 0x1efbc000, - 0x0, - 0x0, - 0x0, - 0xc0000000, - 0x1efb, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gpe[39] = -{ - 0x0, - 0x0, - 0x0, - 0x180, - 0x0, - 0x30030000, - 0xc0, - 0x0, - 0x0, - 0x60000, - 0x60000, - 0x80030003, - 0xc0018001, - 0xc001800, - 0xc001800, - 0x6000c00, - 0x3000600, - 0x300060, - 0x300060, - 0x300030, - 0x80030018, - 0x1, - 0x6000c000, - 0x30006000, - 0x18003000, - 0x1800300, - 0xc0018000, - 0x60006000, - 0x30003000, - 0x3001800, - 0x1800180, - 0xc000c0, - 0x600060, - 0x60030, - 0x1806003, - 0xc00180, - 0x6000c0, - 0x6000c0, - 0x6000c, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre[23] = -{ - 0x0, - 0x0, - 0x0, - 0x80000000, - 0x3fffffff, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0xffffffc0, - 0x1f, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_chksum[22] = -{ - 0x0, - 0x0, - 0x0, - 0x0, - 0x1fffe, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0xffff00, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_key[22] = -{ - 0x0, - 0x0, - 0x0, - 0x0, - 0x1fe03fc, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0xff01fe00, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_rout[23] = -{ - 0x0, - 0x0, - 0x0, - 0x0, - 0x31999b30, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0xcccd9800, - 0x18, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_seq[23] = -{ - 0x0, - 0x0, - 0x0, - 0x0, - 0x3de1e3c0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0xf0f1e000, - 0x1e, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_1[26] = -{ - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x7dfefbe0, - 0xbeff7dff, - 0xdf7fbeff, - 0x3df7fbef, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_2[37] = -{ - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0xf7800000, - 0x3d, - 0x0, - 0x0, - 0xf7de0000, - 0x0, - 0x0, - 0xf0000000, - 0x7be, - 0x0, - 0x0, - 0x0, - 0xbef00000, - 0x7, - 0x0, - 0x0, - 0x0, - 0x7bef0, - 0x0, - 0x0, - 0xe0000000, - 0xf7d, - 0x0, - 0x0, - 0x0, - 0xf7de000, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_icmp[39] = -{ - 0x0, - 0x0, - 0x4, - 0x0, - 0x40000000, - 0x0, - 0x0, - 0x0, - 0x800, - 0x0, - 0x2000400, - 0x1000200, - 0x800140, - 0x80000, - 0x80010, - 0x40008, - 0x20005, - 0x40002000, - 0x20002000, - 0x10002800, - 0x1000000, - 0x0, - 0x400080, - 0x200040, - 0x100028, - 0x40010000, - 0x800000, - 0x400040, - 0x280020, - 0x10, - 0x80010001, - 0x40008000, - 0x20005000, - 0x2000000, - 0x0, - 0x80008001, - 0x90004000, - 0x4000, - 0x400, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_header[27] = -{ - 0x0, - 0x0, - 0x0, - 0x0, - 0x80000000, - 0x117, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x80000000, - 0x117, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_metadata_base[27] = -{ - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x104, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x104, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_igmp[9] = -{ - 0x0, - 0x0, - 0x0, - 0x20000000, - 0x0, - 0x1000, - 0x0, - 0x0, - 0x1000, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ioam_e2e[39] = -{ - 0x0, - 0x0, - 0x0, - 0x100, - 0x0, - 0x20020000, - 0x80, - 0x0, - 0x0, - 0x40000, - 0x40000, - 0x20002, - 0x80010001, - 0x8001000, - 0x8001000, - 0x4000800, - 0x2000400, - 0x200040, - 0x200040, - 0x200020, - 0x20010, - 0x1, - 0x40008000, - 0x20004000, - 0x10002000, - 0x1000200, - 0x80010000, - 0x40004000, - 0x20002000, - 0x2001000, - 0x1000100, - 0x800080, - 0x400040, - 0x40020, - 0x1004002, - 0x800100, - 0x400080, - 0x400080, - 0x40008, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv4[10] = -{ - 0x18, - 0x0, - 0x4, - 0xe0003df6, - 0xffffffff, - 0xbefbf117, - 0x3eff, - 0x0, - 0x1800, - 0xf7d800, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv6[39] = -{ - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0xeff7df80, - 0xf7fbeffb, - 0xfbfdf7fd, - 0xefbfdf7e, - 0xefbfdf7d, - 0xf7dfefbf, - 0xfbeff7df, - 0xffbeff7d, - 0xffbeff7d, - 0x7fbeffbe, - 0xf7fbefdf, - 0xfffffffd, - 0x7dfefbff, - 0xbeff7dff, - 0xdf7fbeff, - 0xfdf7fbef, - 0xfbfdf117, - 0x7dff7dfe, - 0xbeffbeff, - 0xfbefdf7f, - 0xfdf7fdf7, - 0xfefbfefb, - 0xff7dff7d, - 0xeff7dfbe, - 0xfdff7dfb, - 0xfefbfdf7, - 0xdf7dfefb, - 0xbf7dfefb, - 0xf7dfef, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mac_in_mac[39] = -{ - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x1000000, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls0[40] = -{ - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0xfe000000, - 0xfffffff, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls1[40] = -{ - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0xfc000000, - 0xffffff, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls2[40] = -{ - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0xf8000000, - 0xfffff, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls3[40] = -{ - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0xf0000000, - 0xffff, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls4[40] = -{ - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0xe0000000, - 0xfff, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls5[40] = -{ - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0xc0000000, - 0xff, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls6[40] = -{ - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x80000000, - 0xf, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_ach[40] = -{ - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x6666666, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_cw[40] = -{ - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x8888888, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_p_1588[40] = -{ - 0x0, - 0x0, - 0x0, - 0x400, - 0x0, - 0x80080000, - 0x200, - 0x0, - 0x0, - 0x100000, - 0x100000, - 0x80008, - 0x40004, - 0x20004002, - 0x20004000, - 0x10002000, - 0x8001000, - 0x800100, - 0x800100, - 0x800080, - 0x80040, - 0x4, - 0x20000, - 0x80010001, - 0x40008000, - 0x4000800, - 0x40000, - 0x10002, - 0x80008001, - 0x8004000, - 0x4000400, - 0x2000200, - 0x1000100, - 0x100080, - 0x4010008, - 0x2000400, - 0x1000200, - 0x1000200, - 0x100020, - 0x10000000, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_1[31] = -{ - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0xfbe00000, - 0x7dff7dfe, - 0xbeffbeff, - 0xfbefdf7f, - 0x3df7, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_2[38] = -{ - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x3df780, - 0x0, - 0x0, - 0x0, - 0xf7de, - 0x0, - 0x0, - 0x7bef000, - 0x0, - 0x0, - 0x0, - 0x0, - 0x7bef0, - 0x0, - 0x0, - 0x0, - 0xbef00000, - 0x7, - 0x0, - 0x0, - 0xf7de000, - 0x0, - 0x0, - 0x0, - 0xc0000000, - 0x1efb, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rarp[40] = -{ - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x20000000, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_1[35] = -{ - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0xfdf7c000, - 0xfefbfefb, - 0xff7dff7d, - 0xeff7dfbe, - 0x7b, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_2[38] = -{ - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0xfbc00000, - 0x1e, - 0x0, - 0x0, - 0x7bef0000, - 0x0, - 0x0, - 0x78000000, - 0x3df, - 0x0, - 0x0, - 0x0, - 0xdf780000, - 0x3, - 0x0, - 0x0, - 0x0, - 0x3df78, - 0x0, - 0x0, - 0xf0000000, - 0x7be, - 0x0, - 0x0, - 0x0, - 0xf7de000, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_first_4bytes[39] = -{ - 0x0, - 0x0, - 0x0, - 0x16, - 0x0, - 0x2c00007, - 0x0, - 0x0, - 0x0, - 0x5800, - 0x2c005800, - 0x16002c00, - 0xb001600, - 0xb00160, - 0xb00160, - 0x5800b0, - 0x802c0058, - 0x8002c005, - 0xc002c005, - 0x6002c002, - 0x16002c01, - 0x0, - 0x5800b00, - 0x2c00580, - 0x16002c0, - 0x16002c, - 0xb000007, - 0x5800580, - 0x2c002c0, - 0x2c0160, - 0x160016, - 0x800b000b, - 0xc0058005, - 0x2c005802, - 0x580, - 0xb0016, - 0x5800b, - 0xb005800b, - 0x5800, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_last_16bytes[39] = -{ - 0x0, - 0x0, - 0x0, - 0x14, - 0x0, - 0x2800006, - 0x0, - 0x0, - 0x0, - 0x5000, - 0x28005000, - 0x14002800, - 0xa001400, - 0xa00140, - 0xa00140, - 0x5000a0, - 0x280050, - 0x28005, - 0x80028005, - 0x40028002, - 0x14002801, - 0x0, - 0x5000a00, - 0x2800500, - 0x1400280, - 0x140028, - 0xa000006, - 0x5000500, - 0x2800280, - 0x280140, - 0x140014, - 0xa000a, - 0x80050005, - 0x28005002, - 0x500, - 0xa0014, - 0x5000a, - 0xa005000a, - 0x5000, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_udp[39] = -{ - 0x0, - 0x0, - 0x0, - 0x1de0, - 0x0, - 0xbc3bc110, - 0xef3, - 0x0, - 0x0, - 0x778000, - 0xc0778000, - 0xe03bc03b, - 0xf01de01d, - 0xef01de0e, - 0xef01de00, - 0x7780ef00, - 0x3bc07780, - 0x3bc0778, - 0x3bc0778, - 0x3bc03bc, - 0xe03bc1de, - 0x1d, - 0x780ef000, - 0xbc077807, - 0xde03bc03, - 0x1de03bc1, - 0xf01de110, - 0x7807780e, - 0xbc03bc07, - 0x3bc1de03, - 0x1de01de0, - 0xef00ef0, - 0x7780778, - 0xc07783bc, - 0x1de7783b, - 0xef01de0, - 0x7780ef0, - 0x7780ef0, - 0x7780ef, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_udpipsec[35] = -{ - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0xefc, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x1df80000, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l3[40] = -{ - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x40000000, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l4[39] = -{ - 0x0, - 0x0, - 0x0, - 0x2000, - 0x0, - 0x0, - 0x1000, - 0x0, - 0x0, - 0x800000, - 0x800000, - 0x400040, - 0x200020, - 0x20010, - 0x20001, - 0x80010001, - 0x40008000, - 0x4000800, - 0x4000800, - 0x4000400, - 0x400200, - 0x20, - 0x100000, - 0x80008, - 0x40004, - 0x20004002, - 0x0, - 0x80010, - 0x40008, - 0x40020004, - 0x20002000, - 0x10001000, - 0x8000800, - 0x800400, - 0x20000040, - 0x10002000, - 0x8001000, - 0x8001000, - 0x800100, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l5[39] = -{ - 0x0, - 0x0, - 0x0, - 0x810, - 0x0, - 0x2100000, - 0x401, - 0x0, - 0x0, - 0x204000, - 0x20204000, - 0x10102010, - 0x8081008, - 0x40808104, - 0x40808100, - 0x20404080, - 0x10202040, - 0x1020204, - 0x1020204, - 0x1020102, - 0x10102081, - 0x8, - 0x4040800, - 0x2020402, - 0x81010201, - 0x8101020, - 0x8080000, - 0x4020404, - 0x2010202, - 0x10208101, - 0x8100810, - 0x4080408, - 0x2040204, - 0x20204102, - 0x8020410, - 0x4080810, - 0x2040408, - 0x82040408, - 0x204040, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_vxlan[39] = -{ - 0x0, - 0x0, - 0x0, - 0x1000, - 0x0, - 0x200000, - 0x802, - 0x0, - 0x0, - 0x400000, - 0x400000, - 0x200020, - 0x100010, - 0x80010008, - 0x80010000, - 0x40008000, - 0x20004000, - 0x2000400, - 0x2000400, - 0x2000200, - 0x200100, - 0x10, - 0x80000, - 0x40004, - 0x20002, - 0x10002001, - 0x100000, - 0x40008, - 0x20004, - 0x20010002, - 0x10001000, - 0x8000800, - 0x4000400, - 0x400200, - 0x10040020, - 0x8001000, - 0x4000800, - 0x4000800, - 0x400080, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_1[39] = -{ - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x2000, - 0x0, - 0x1800, - 0xf7d800, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0xc0000000, - 0xfefbfdf7, - 0xdf7dfefb, - 0xbf7dfefb, - 0xf7dfef, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_2[39] = -{ - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0xefbc0000, - 0x1, - 0x0, - 0x0, - 0x7bef000, - 0x0, - 0x0, - 0xf7800000, - 0x3d, - 0x0, - 0x0, - 0x0, - 0x3df78000, - 0x0, - 0x0, - 0x0, - 0x80000000, - 0x3df7, - 0x0, - 0x0, - 0xef000000, - 0x7b, - 0x0, - 0x0, - 0x0, - 0xf7de00, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_sys_hdr_ep_nih[1] = -{ - 0x4, -}; - -static uint32_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_sys_hdr_loopback[1] = -{ - 0x8, -}; - - -static bcmpkt_rxpmd_match_id_db_t -bcm56890_a0_dna_6_5_34_8_0_rxpmd_match_id_db[BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_COUNT] = { - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_CNTAG */ - .name = "EGRESS_PKT_FWD_L2_HDR_CNTAG", - .match = 0x180, - .match_mask = 0x180, - .match_maxbit = 37, - .match_minbit = 29, - .maxbit = 8, - .minbit = 7, - .value = 0x3, - .pmaxbit = 37, - .pminbit = 29, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM */ - .name = "EGRESS_PKT_FWD_L2_HDR_GBP_ETHERNET_SHIM", - .match = 0x100, - .match_mask = 0x180, - .match_maxbit = 37, - .match_minbit = 29, - .maxbit = 8, - .minbit = 7, - .value = 0x2, - .pmaxbit = 37, - .pminbit = 29, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_BASE */ - .name = "EGRESS_PKT_FWD_L2_HDR_HG3_BASE", - .match = 0x1, - .match_mask = 0x1, - .match_maxbit = 37, - .match_minbit = 29, - .maxbit = 0, - .minbit = 0, - .value = 0x1, - .pmaxbit = 37, - .pminbit = 29, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0 */ - .name = "EGRESS_PKT_FWD_L2_HDR_HG3_EXT_0", - .match = 0x10, - .match_mask = 0x10, - .match_maxbit = 37, - .match_minbit = 29, - .maxbit = 4, - .minbit = 4, - .value = 0x1, - .pmaxbit = 37, - .pminbit = 29, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */ - .name = "EGRESS_PKT_FWD_L2_HDR_ITAG", - .match = 0x40, - .match_mask = 0x40, - .match_maxbit = 37, - .match_minbit = 29, - .maxbit = 6, - .minbit = 6, - .value = 0x1, - .pmaxbit = 37, - .pminbit = 29, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */ - .name = "EGRESS_PKT_FWD_L2_HDR_L2", - .match = 0x2, - .match_mask = 0x2, - .match_maxbit = 37, - .match_minbit = 29, - .maxbit = 1, - .minbit = 1, - .value = 0x1, - .pmaxbit = 37, - .pminbit = 29, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_MIM_GBP */ - .name = "EGRESS_PKT_FWD_L2_HDR_MIM_GBP", - .match = 0x80, - .match_mask = 0x180, - .match_maxbit = 37, - .match_minbit = 29, - .maxbit = 8, - .minbit = 7, - .value = 0x1, - .pmaxbit = 37, - .pminbit = 29, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */ - .name = "EGRESS_PKT_FWD_L2_HDR_NONE", - .match = 0x0, - .match_mask = 0x1ff, - .match_maxbit = 37, - .match_minbit = 29, - .maxbit = 8, - .minbit = 0, - .value = 0x0, - .pmaxbit = 37, - .pminbit = 29, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */ - .name = "EGRESS_PKT_FWD_L2_HDR_OTAG", - .match = 0x20, - .match_mask = 0x20, - .match_maxbit = 37, - .match_minbit = 29, - .maxbit = 5, - .minbit = 5, - .value = 0x1, - .pmaxbit = 37, - .pminbit = 29, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC */ - .name = "EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", - .match = 0x4, - .match_mask = 0x4, - .match_maxbit = 37, - .match_minbit = 29, - .maxbit = 2, - .minbit = 2, - .value = 0x1, - .pmaxbit = 37, - .pminbit = 29, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SVTAG */ - .name = "EGRESS_PKT_FWD_L2_HDR_SVTAG", - .match = 0x8, - .match_mask = 0x8, - .match_maxbit = 37, - .match_minbit = 29, - .maxbit = 3, - .minbit = 3, - .value = 0x1, - .pmaxbit = 37, - .pminbit = 29, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_ARP", - .match = 0x4000, - .match_mask = 0x3c000, - .match_maxbit = 55, - .match_minbit = 38, - .maxbit = 17, - .minbit = 14, - .value = 0x1, - .pmaxbit = 55, - .pminbit = 38, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", - .match = 0x2c000, - .match_mask = 0x3c000, - .match_maxbit = 55, - .match_minbit = 38, - .maxbit = 17, - .minbit = 14, - .value = 0xb, - .pmaxbit = 55, - .pminbit = 38, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", - .match = 0x140, - .match_mask = 0x7c0, - .match_maxbit = 55, - .match_minbit = 38, - .maxbit = 9, - .minbit = 6, - .value = 0x5, - .pmaxbit = 55, - .pminbit = 38, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_BFD", - .match = 0x3000, - .match_mask = 0x3800, - .match_maxbit = 55, - .match_minbit = 38, - .maxbit = 13, - .minbit = 11, - .value = 0x6, - .pmaxbit = 55, - .pminbit = 38, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1", - .match = 0x20000, - .match_mask = 0x3c000, - .match_maxbit = 55, - .match_minbit = 38, - .maxbit = 17, - .minbit = 14, - .value = 0x8, - .pmaxbit = 55, - .pminbit = 38, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2", - .match = 0x200, - .match_mask = 0x7c0, - .match_maxbit = 55, - .match_minbit = 38, - .maxbit = 9, - .minbit = 6, - .value = 0x8, - .pmaxbit = 55, - .pminbit = 38, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", - .match = 0x40, - .match_mask = 0x7c0, - .match_maxbit = 55, - .match_minbit = 38, - .maxbit = 9, - .minbit = 6, - .value = 0x1, - .pmaxbit = 55, - .pminbit = 38, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", - .match = 0x1, - .match_mask = 0x1, - .match_maxbit = 55, - .match_minbit = 38, - .maxbit = 0, - .minbit = 0, - .value = 0x1, - .pmaxbit = 55, - .pminbit = 38, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", - .match = 0x28000, - .match_mask = 0x3c000, - .match_maxbit = 55, - .match_minbit = 38, - .maxbit = 17, - .minbit = 14, - .value = 0xa, - .pmaxbit = 55, - .pminbit = 38, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", - .match = 0x240, - .match_mask = 0x7c0, - .match_maxbit = 55, - .match_minbit = 38, - .maxbit = 9, - .minbit = 6, - .value = 0x9, - .pmaxbit = 55, - .pminbit = 38, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_GPE", - .match = 0x30, - .match_mask = 0x438, - .match_maxbit = 55, - .match_minbit = 38, - .maxbit = 5, - .minbit = 5, - .value = 0x1, - .pmaxbit = 55, - .pminbit = 38, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE", - .match = 0x18, - .match_mask = 0x418, - .match_maxbit = 55, - .match_minbit = 38, - .maxbit = 4, - .minbit = 3, - .value = 0x3, - .pmaxbit = 55, - .pminbit = 38, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", - .match = 0x80, - .match_mask = 0x7c0, - .match_maxbit = 55, - .match_minbit = 38, - .maxbit = 9, - .minbit = 6, - .value = 0x2, - .pmaxbit = 55, - .pminbit = 38, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", - .match = 0x1800, - .match_mask = 0x3800, - .match_maxbit = 55, - .match_minbit = 38, - .maxbit = 13, - .minbit = 11, - .value = 0x3, - .pmaxbit = 55, - .pminbit = 38, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", - .match = 0x10000, - .match_mask = 0x3c000, - .match_maxbit = 55, - .match_minbit = 38, - .maxbit = 17, - .minbit = 14, - .value = 0x4, - .pmaxbit = 55, - .pminbit = 38, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", - .match = 0x38, - .match_mask = 0x438, - .match_maxbit = 55, - .match_minbit = 38, - .maxbit = 5, - .minbit = 5, - .value = 0x1, - .pmaxbit = 55, - .pminbit = 38, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1", - .match = 0x8000, - .match_mask = 0x3c000, - .match_maxbit = 55, - .match_minbit = 38, - .maxbit = 17, - .minbit = 14, - .value = 0x2, - .pmaxbit = 55, - .pminbit = 38, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2", - .match = 0xc0, - .match_mask = 0x7c0, - .match_maxbit = 55, - .match_minbit = 38, - .maxbit = 9, - .minbit = 6, - .value = 0x3, - .pmaxbit = 55, - .pminbit = 38, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_ICMP", - .match = 0x800, - .match_mask = 0x3818, - .match_maxbit = 55, - .match_minbit = 38, - .maxbit = 13, - .minbit = 11, - .value = 0x1, - .pmaxbit = 55, - .pminbit = 38, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER", - .match = 0x2c0, - .match_mask = 0x7c0, - .match_maxbit = 55, - .match_minbit = 38, - .maxbit = 9, - .minbit = 6, - .value = 0xb, - .pmaxbit = 55, - .pminbit = 38, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE", - .match = 0xc000, - .match_mask = 0x3c000, - .match_maxbit = 55, - .match_minbit = 38, - .maxbit = 17, - .minbit = 14, - .value = 0x3, - .pmaxbit = 55, - .pminbit = 38, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_IGMP", - .match = 0x100, - .match_mask = 0x7c0, - .match_maxbit = 55, - .match_minbit = 38, - .maxbit = 9, - .minbit = 6, - .value = 0x4, - .pmaxbit = 55, - .pminbit = 38, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_IOAM_E2E", - .match = 0x1000, - .match_mask = 0x3800, - .match_maxbit = 55, - .match_minbit = 38, - .maxbit = 13, - .minbit = 11, - .value = 0x2, - .pmaxbit = 55, - .pminbit = 38, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV4", - .match = 0x2, - .match_mask = 0x406, - .match_maxbit = 55, - .match_minbit = 38, - .maxbit = 2, - .minbit = 1, - .value = 0x1, - .pmaxbit = 55, - .pminbit = 38, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV6", - .match = 0x4, - .match_mask = 0x406, - .match_maxbit = 55, - .match_minbit = 38, - .maxbit = 2, - .minbit = 1, - .value = 0x2, - .pmaxbit = 55, - .pminbit = 38, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MAC_IN_MAC */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_MAC_IN_MAC", - .match = 0x1c000, - .match_mask = 0x3c000, - .match_maxbit = 55, - .match_minbit = 38, - .maxbit = 17, - .minbit = 14, - .value = 0x7, - .pmaxbit = 55, - .pminbit = 38, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS0 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS0", - .match = 0x400, - .match_mask = 0x400, - .match_maxbit = 55, - .match_minbit = 38, - .maxbit = 10, - .minbit = 10, - .value = 0x1, - .pmaxbit = 55, - .pminbit = 38, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS1 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS1", - .match = 0x402, - .match_mask = 0x402, - .match_maxbit = 55, - .match_minbit = 38, - .maxbit = 1, - .minbit = 1, - .value = 0x1, - .pmaxbit = 55, - .pminbit = 38, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS2 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS2", - .match = 0x404, - .match_mask = 0x404, - .match_maxbit = 55, - .match_minbit = 38, - .maxbit = 2, - .minbit = 2, - .value = 0x1, - .pmaxbit = 55, - .pminbit = 38, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS3 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS3", - .match = 0x408, - .match_mask = 0x408, - .match_maxbit = 55, - .match_minbit = 38, - .maxbit = 3, - .minbit = 3, - .value = 0x1, - .pmaxbit = 55, - .pminbit = 38, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS4 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS4", - .match = 0x410, - .match_mask = 0x410, - .match_maxbit = 55, - .match_minbit = 38, - .maxbit = 4, - .minbit = 4, - .value = 0x1, - .pmaxbit = 55, - .pminbit = 38, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS5 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS5", - .match = 0x420, - .match_mask = 0x420, - .match_maxbit = 55, - .match_minbit = 38, - .maxbit = 5, - .minbit = 5, - .value = 0x1, - .pmaxbit = 55, - .pminbit = 38, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS6 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS6", - .match = 0x440, - .match_mask = 0x440, - .match_maxbit = 55, - .match_minbit = 38, - .maxbit = 6, - .minbit = 6, - .value = 0x1, - .pmaxbit = 55, - .pminbit = 38, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_ACH", - .match = 0x480, - .match_mask = 0x480, - .match_maxbit = 55, - .match_minbit = 38, - .maxbit = 7, - .minbit = 7, - .value = 0x1, - .pmaxbit = 55, - .pminbit = 38, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_MPLS_CW", - .match = 0x500, - .match_mask = 0x500, - .match_maxbit = 55, - .match_minbit = 38, - .maxbit = 8, - .minbit = 8, - .value = 0x1, - .pmaxbit = 55, - .pminbit = 38, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_NONE", - .match = 0x0, - .match_mask = 0x3ffff, - .match_maxbit = 55, - .match_minbit = 38, - .maxbit = 17, - .minbit = 0, - .value = 0x0, - .pmaxbit = 55, - .pminbit = 38, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_P_1588", - .match = 0x2800, - .match_mask = 0x3800, - .match_maxbit = 55, - .match_minbit = 38, - .maxbit = 13, - .minbit = 11, - .value = 0x5, - .pmaxbit = 55, - .pminbit = 38, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_1", - .match = 0x34000, - .match_mask = 0x3c000, - .match_maxbit = 55, - .match_minbit = 38, - .maxbit = 17, - .minbit = 14, - .value = 0xd, - .pmaxbit = 55, - .pminbit = 38, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_PROG_EXT_2", - .match = 0x280, - .match_mask = 0x7c0, - .match_maxbit = 55, - .match_minbit = 38, - .maxbit = 9, - .minbit = 6, - .value = 0xa, - .pmaxbit = 55, - .pminbit = 38, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_RARP", - .match = 0x14000, - .match_mask = 0x3c000, - .match_maxbit = 55, - .match_minbit = 38, - .maxbit = 17, - .minbit = 14, - .value = 0x5, - .pmaxbit = 55, - .pminbit = 38, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1", - .match = 0x18000, - .match_mask = 0x3c000, - .match_maxbit = 55, - .match_minbit = 38, - .maxbit = 17, - .minbit = 14, - .value = 0x6, - .pmaxbit = 55, - .pminbit = 38, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2", - .match = 0x1c0, - .match_mask = 0x7c0, - .match_maxbit = 55, - .match_minbit = 38, - .maxbit = 9, - .minbit = 6, - .value = 0x7, - .pmaxbit = 55, - .pminbit = 38, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", - .match = 0x8, - .match_mask = 0x418, - .match_maxbit = 55, - .match_minbit = 38, - .maxbit = 4, - .minbit = 3, - .value = 0x1, - .pmaxbit = 55, - .pminbit = 38, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", - .match = 0x28, - .match_mask = 0x438, - .match_maxbit = 55, - .match_minbit = 38, - .maxbit = 5, - .minbit = 5, - .value = 0x1, - .pmaxbit = 55, - .pminbit = 38, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_UDP", - .match = 0x10, - .match_mask = 0x418, - .match_maxbit = 55, - .match_minbit = 38, - .maxbit = 4, - .minbit = 3, - .value = 0x2, - .pmaxbit = 55, - .pminbit = 38, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDPIPSEC */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_UDPIPSEC", - .match = 0x38000, - .match_mask = 0x3c000, - .match_maxbit = 55, - .match_minbit = 38, - .maxbit = 17, - .minbit = 14, - .value = 0xe, - .pmaxbit = 55, - .pminbit = 38, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", - .match = 0x24000, - .match_mask = 0x3c000, - .match_maxbit = 55, - .match_minbit = 38, - .maxbit = 17, - .minbit = 14, - .value = 0x9, - .pmaxbit = 55, - .pminbit = 38, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", - .match = 0x2000, - .match_mask = 0x3800, - .match_maxbit = 55, - .match_minbit = 38, - .maxbit = 13, - .minbit = 11, - .value = 0x4, - .pmaxbit = 55, - .pminbit = 38, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", - .match = 0x3800, - .match_mask = 0x3800, - .match_maxbit = 55, - .match_minbit = 38, - .maxbit = 13, - .minbit = 11, - .value = 0x7, - .pmaxbit = 55, - .pminbit = 38, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", - .match = 0x810, - .match_mask = 0x3c18, - .match_maxbit = 55, - .match_minbit = 38, - .maxbit = 13, - .minbit = 11, - .value = 0x1, - .pmaxbit = 55, - .pminbit = 38, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1", - .match = 0x30000, - .match_mask = 0x3c000, - .match_maxbit = 55, - .match_minbit = 38, - .maxbit = 17, - .minbit = 14, - .value = 0xc, - .pmaxbit = 55, - .pminbit = 38, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2", - .match = 0x180, - .match_mask = 0x7c0, - .match_maxbit = 55, - .match_minbit = 38, - .maxbit = 9, - .minbit = 6, - .value = 0x6, - .pmaxbit = 55, - .pminbit = 38, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH */ - .name = "EGRESS_PKT_SYS_HDR_EP_NIH", - .match = 0x2, - .match_mask = 0x3, - .match_maxbit = 1, - .match_minbit = 0, - .maxbit = 1, - .minbit = 0, - .value = 0x2, - .pmaxbit = 1, - .pminbit = 0, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */ - .name = "EGRESS_PKT_SYS_HDR_LOOPBACK", - .match = 0x1, - .match_mask = 0x3, - .match_maxbit = 1, - .match_minbit = 0, - .maxbit = 1, - .minbit = 0, - .value = 0x1, - .pmaxbit = 1, - .pminbit = 0, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */ - .name = "EGRESS_PKT_SYS_HDR_NONE", - .match = 0x0, - .match_mask = 0x3, - .match_maxbit = 1, - .match_minbit = 0, - .maxbit = 1, - .minbit = 0, - .value = 0x0, - .pmaxbit = 1, - .pminbit = 0, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_CNTAG */ - .name = "EGRESS_PKT_TUNNEL_L2_HDR_CNTAG", - .match = 0x180, - .match_mask = 0x180, - .match_maxbit = 10, - .match_minbit = 2, - .maxbit = 8, - .minbit = 7, - .value = 0x3, - .pmaxbit = 10, - .pminbit = 2, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM */ - .name = "EGRESS_PKT_TUNNEL_L2_HDR_GBP_ETHERNET_SHIM", - .match = 0x100, - .match_mask = 0x180, - .match_maxbit = 10, - .match_minbit = 2, - .maxbit = 8, - .minbit = 7, - .value = 0x2, - .pmaxbit = 10, - .pminbit = 2, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE */ - .name = "EGRESS_PKT_TUNNEL_L2_HDR_HG3_BASE", - .match = 0x1, - .match_mask = 0x1, - .match_maxbit = 10, - .match_minbit = 2, - .maxbit = 0, - .minbit = 0, - .value = 0x1, - .pmaxbit = 10, - .pminbit = 2, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0 */ - .name = "EGRESS_PKT_TUNNEL_L2_HDR_HG3_EXT_0", - .match = 0x10, - .match_mask = 0x10, - .match_maxbit = 10, - .match_minbit = 2, - .maxbit = 4, - .minbit = 4, - .value = 0x1, - .pmaxbit = 10, - .pminbit = 2, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */ - .name = "EGRESS_PKT_TUNNEL_L2_HDR_ITAG", - .match = 0x40, - .match_mask = 0x40, - .match_maxbit = 10, - .match_minbit = 2, - .maxbit = 6, - .minbit = 6, - .value = 0x1, - .pmaxbit = 10, - .pminbit = 2, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */ - .name = "EGRESS_PKT_TUNNEL_L2_HDR_L2", - .match = 0x2, - .match_mask = 0x2, - .match_maxbit = 10, - .match_minbit = 2, - .maxbit = 1, - .minbit = 1, - .value = 0x1, - .pmaxbit = 10, - .pminbit = 2, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_MIM_GBP */ - .name = "EGRESS_PKT_TUNNEL_L2_HDR_MIM_GBP", - .match = 0x80, - .match_mask = 0x180, - .match_maxbit = 10, - .match_minbit = 2, - .maxbit = 8, - .minbit = 7, - .value = 0x1, - .pmaxbit = 10, - .pminbit = 2, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */ - .name = "EGRESS_PKT_TUNNEL_L2_HDR_NONE", - .match = 0x0, - .match_mask = 0x1ff, - .match_maxbit = 10, - .match_minbit = 2, - .maxbit = 8, - .minbit = 0, - .value = 0x0, - .pmaxbit = 10, - .pminbit = 2, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */ - .name = "EGRESS_PKT_TUNNEL_L2_HDR_OTAG", - .match = 0x20, - .match_mask = 0x20, - .match_maxbit = 10, - .match_minbit = 2, - .maxbit = 5, - .minbit = 5, - .value = 0x1, - .pmaxbit = 10, - .pminbit = 2, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC */ - .name = "EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", - .match = 0x4, - .match_mask = 0x4, - .match_maxbit = 10, - .match_minbit = 2, - .maxbit = 2, - .minbit = 2, - .value = 0x1, - .pmaxbit = 10, - .pminbit = 2, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SVTAG */ - .name = "EGRESS_PKT_TUNNEL_L2_HDR_SVTAG", - .match = 0x8, - .match_mask = 0x8, - .match_maxbit = 10, - .match_minbit = 2, - .maxbit = 3, - .minbit = 3, - .value = 0x1, - .pmaxbit = 10, - .pminbit = 2, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", - .match = 0x4000, - .match_mask = 0x3c000, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 17, - .minbit = 14, - .value = 0x1, - .pmaxbit = 28, - .pminbit = 11, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", - .match = 0x2c000, - .match_mask = 0x3c000, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 17, - .minbit = 14, - .value = 0xb, - .pmaxbit = 28, - .pminbit = 11, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", - .match = 0x140, - .match_mask = 0x7c0, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 9, - .minbit = 6, - .value = 0x5, - .pmaxbit = 28, - .pminbit = 11, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", - .match = 0x3000, - .match_mask = 0x3800, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 13, - .minbit = 11, - .value = 0x6, - .pmaxbit = 28, - .pminbit = 11, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1", - .match = 0x20000, - .match_mask = 0x3c000, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 17, - .minbit = 14, - .value = 0x8, - .pmaxbit = 28, - .pminbit = 11, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2", - .match = 0x200, - .match_mask = 0x7c0, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 9, - .minbit = 6, - .value = 0x8, - .pmaxbit = 28, - .pminbit = 11, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", - .match = 0x40, - .match_mask = 0x7c0, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 9, - .minbit = 6, - .value = 0x1, - .pmaxbit = 28, - .pminbit = 11, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", - .match = 0x1, - .match_mask = 0x1, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 0, - .minbit = 0, - .value = 0x1, - .pmaxbit = 28, - .pminbit = 11, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", - .match = 0x28000, - .match_mask = 0x3c000, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 17, - .minbit = 14, - .value = 0xa, - .pmaxbit = 28, - .pminbit = 11, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", - .match = 0x240, - .match_mask = 0x7c0, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 9, - .minbit = 6, - .value = 0x9, - .pmaxbit = 28, - .pminbit = 11, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", - .match = 0x30, - .match_mask = 0x438, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 5, - .minbit = 5, - .value = 0x1, - .pmaxbit = 28, - .pminbit = 11, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", - .match = 0x18, - .match_mask = 0x418, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 4, - .minbit = 3, - .value = 0x3, - .pmaxbit = 28, - .pminbit = 11, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", - .match = 0x80, - .match_mask = 0x7c0, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 9, - .minbit = 6, - .value = 0x2, - .pmaxbit = 28, - .pminbit = 11, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", - .match = 0x1800, - .match_mask = 0x3800, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 13, - .minbit = 11, - .value = 0x3, - .pmaxbit = 28, - .pminbit = 11, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", - .match = 0x10000, - .match_mask = 0x3c000, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 17, - .minbit = 14, - .value = 0x4, - .pmaxbit = 28, - .pminbit = 11, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", - .match = 0x38, - .match_mask = 0x438, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 5, - .minbit = 5, - .value = 0x1, - .pmaxbit = 28, - .pminbit = 11, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1", - .match = 0x8000, - .match_mask = 0x3c000, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 17, - .minbit = 14, - .value = 0x2, - .pmaxbit = 28, - .pminbit = 11, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2", - .match = 0xc0, - .match_mask = 0x7c0, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 9, - .minbit = 6, - .value = 0x3, - .pmaxbit = 28, - .pminbit = 11, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", - .match = 0x800, - .match_mask = 0x3818, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 13, - .minbit = 11, - .value = 0x1, - .pmaxbit = 28, - .pminbit = 11, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER", - .match = 0x2c0, - .match_mask = 0x7c0, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 9, - .minbit = 6, - .value = 0xb, - .pmaxbit = 28, - .pminbit = 11, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE", - .match = 0xc000, - .match_mask = 0x3c000, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 17, - .minbit = 14, - .value = 0x3, - .pmaxbit = 28, - .pminbit = 11, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", - .match = 0x100, - .match_mask = 0x7c0, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 9, - .minbit = 6, - .value = 0x4, - .pmaxbit = 28, - .pminbit = 11, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IOAM_E2E", - .match = 0x1000, - .match_mask = 0x3800, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 13, - .minbit = 11, - .value = 0x2, - .pmaxbit = 28, - .pminbit = 11, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", - .match = 0x2, - .match_mask = 0x406, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 2, - .minbit = 1, - .value = 0x1, - .pmaxbit = 28, - .pminbit = 11, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", - .match = 0x4, - .match_mask = 0x406, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 2, - .minbit = 1, - .value = 0x2, - .pmaxbit = 28, - .pminbit = 11, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MAC_IN_MAC */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MAC_IN_MAC", - .match = 0x1c000, - .match_mask = 0x3c000, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 17, - .minbit = 14, - .value = 0x7, - .pmaxbit = 28, - .pminbit = 11, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS0", - .match = 0x400, - .match_mask = 0x400, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 10, - .minbit = 10, - .value = 0x1, - .pmaxbit = 28, - .pminbit = 11, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS1", - .match = 0x402, - .match_mask = 0x402, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 1, - .minbit = 1, - .value = 0x1, - .pmaxbit = 28, - .pminbit = 11, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS2", - .match = 0x404, - .match_mask = 0x404, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 2, - .minbit = 2, - .value = 0x1, - .pmaxbit = 28, - .pminbit = 11, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS3", - .match = 0x408, - .match_mask = 0x408, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 3, - .minbit = 3, - .value = 0x1, - .pmaxbit = 28, - .pminbit = 11, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS4", - .match = 0x410, - .match_mask = 0x410, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 4, - .minbit = 4, - .value = 0x1, - .pmaxbit = 28, - .pminbit = 11, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS5", - .match = 0x420, - .match_mask = 0x420, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 5, - .minbit = 5, - .value = 0x1, - .pmaxbit = 28, - .pminbit = 11, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS6", - .match = 0x440, - .match_mask = 0x440, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 6, - .minbit = 6, - .value = 0x1, - .pmaxbit = 28, - .pminbit = 11, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_ACH", - .match = 0x480, - .match_mask = 0x480, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 7, - .minbit = 7, - .value = 0x1, - .pmaxbit = 28, - .pminbit = 11, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_MPLS_CW", - .match = 0x500, - .match_mask = 0x500, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 8, - .minbit = 8, - .value = 0x1, - .pmaxbit = 28, - .pminbit = 11, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", - .match = 0x0, - .match_mask = 0x3ffff, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 17, - .minbit = 0, - .value = 0x0, - .pmaxbit = 28, - .pminbit = 11, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", - .match = 0x2800, - .match_mask = 0x3800, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 13, - .minbit = 11, - .value = 0x5, - .pmaxbit = 28, - .pminbit = 11, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_1", - .match = 0x34000, - .match_mask = 0x3c000, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 17, - .minbit = 14, - .value = 0xd, - .pmaxbit = 28, - .pminbit = 11, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_PROG_EXT_2", - .match = 0x280, - .match_mask = 0x7c0, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 9, - .minbit = 6, - .value = 0xa, - .pmaxbit = 28, - .pminbit = 11, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", - .match = 0x14000, - .match_mask = 0x3c000, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 17, - .minbit = 14, - .value = 0x5, - .pmaxbit = 28, - .pminbit = 11, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1", - .match = 0x18000, - .match_mask = 0x3c000, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 17, - .minbit = 14, - .value = 0x6, - .pmaxbit = 28, - .pminbit = 11, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2", - .match = 0x1c0, - .match_mask = 0x7c0, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 9, - .minbit = 6, - .value = 0x7, - .pmaxbit = 28, - .pminbit = 11, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", - .match = 0x8, - .match_mask = 0x418, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 4, - .minbit = 3, - .value = 0x1, - .pmaxbit = 28, - .pminbit = 11, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", - .match = 0x28, - .match_mask = 0x438, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 5, - .minbit = 5, - .value = 0x1, - .pmaxbit = 28, - .pminbit = 11, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", - .match = 0x10, - .match_mask = 0x418, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 4, - .minbit = 3, - .value = 0x2, - .pmaxbit = 28, - .pminbit = 11, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDPIPSEC */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UDPIPSEC", - .match = 0x38000, - .match_mask = 0x3c000, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 17, - .minbit = 14, - .value = 0xe, - .pmaxbit = 28, - .pminbit = 11, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", - .match = 0x24000, - .match_mask = 0x3c000, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 17, - .minbit = 14, - .value = 0x9, - .pmaxbit = 28, - .pminbit = 11, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", - .match = 0x2000, - .match_mask = 0x3800, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 13, - .minbit = 11, - .value = 0x4, - .pmaxbit = 28, - .pminbit = 11, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", - .match = 0x3800, - .match_mask = 0x3800, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 13, - .minbit = 11, - .value = 0x7, - .pmaxbit = 28, - .pminbit = 11, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", - .match = 0x810, - .match_mask = 0x3c18, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 13, - .minbit = 11, - .value = 0x1, - .pmaxbit = 28, - .pminbit = 11, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1", - .match = 0x30000, - .match_mask = 0x3c000, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 17, - .minbit = 14, - .value = 0xc, - .pmaxbit = 28, - .pminbit = 11, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2", - .match = 0x180, - .match_mask = 0x7c0, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 9, - .minbit = 6, - .value = 0x6, - .pmaxbit = 28, - .pminbit = 11, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_CNTAG */ - .name = "INGRESS_PKT_INNER_L2_HDR_CNTAG", - .match = 0x180, - .match_mask = 0x180, - .match_maxbit = 37, - .match_minbit = 29, - .maxbit = 8, - .minbit = 7, - .value = 0x3, - .pmaxbit = 37, - .pminbit = 29, - .zone_minbit = 21, - .arc_id_mask = 0x3e00000, - .num_zone_bmp_words = 1, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_cntag, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */ - .name = "INGRESS_PKT_INNER_L2_HDR_ITAG", - .match = 0x40, - .match_mask = 0x40, - .match_maxbit = 37, - .match_minbit = 29, - .maxbit = 6, - .minbit = 6, - .value = 0x1, - .pmaxbit = 37, - .pminbit = 29, - .zone_minbit = 21, - .arc_id_mask = 0x3e00000, - .num_zone_bmp_words = 1, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_itag, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */ - .name = "INGRESS_PKT_INNER_L2_HDR_L2", - .match = 0x2, - .match_mask = 0x2, - .match_maxbit = 37, - .match_minbit = 29, - .maxbit = 1, - .minbit = 1, - .value = 0x1, - .pmaxbit = 37, - .pminbit = 29, - .zone_minbit = 21, - .arc_id_mask = 0x3e00000, - .num_zone_bmp_words = 1, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_l2, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */ - .name = "INGRESS_PKT_INNER_L2_HDR_NONE", - .match = 0x0, - .match_mask = 0x1ff, - .match_maxbit = 37, - .match_minbit = 29, - .maxbit = 8, - .minbit = 0, - .value = 0x0, - .pmaxbit = 37, - .pminbit = 29, - .zone_minbit = 21, - .arc_id_mask = 0x3e00000, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */ - .name = "INGRESS_PKT_INNER_L2_HDR_OTAG", - .match = 0x20, - .match_mask = 0x20, - .match_maxbit = 37, - .match_minbit = 29, - .maxbit = 5, - .minbit = 5, - .value = 0x1, - .pmaxbit = 37, - .pminbit = 29, - .zone_minbit = 21, - .arc_id_mask = 0x3e00000, - .num_zone_bmp_words = 1, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_otag, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC */ - .name = "INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", - .match = 0x4, - .match_mask = 0x4, - .match_maxbit = 37, - .match_minbit = 29, - .maxbit = 2, - .minbit = 2, - .value = 0x1, - .pmaxbit = 37, - .pminbit = 29, - .zone_minbit = 21, - .arc_id_mask = 0x3e00000, - .num_zone_bmp_words = 1, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_snap_or_llc, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_ARP", - .match = 0x4000, - .match_mask = 0x3c000, - .match_maxbit = 55, - .match_minbit = 38, - .maxbit = 17, - .minbit = 14, - .value = 0x1, - .pmaxbit = 55, - .pminbit = 38, - .zone_minbit = 26, - .arc_id_mask = 0x1ffc000000, - .num_zone_bmp_words = 1, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_arp, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1 */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_1", - .match = 0x2c000, - .match_mask = 0x3c000, - .match_maxbit = 55, - .match_minbit = 38, - .maxbit = 17, - .minbit = 14, - .value = 0xb, - .pmaxbit = 55, - .pminbit = 38, - .zone_minbit = 26, - .arc_id_mask = 0x1ffc000000, - .num_zone_bmp_words = 39, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_1, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2 */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_AUTH_EXT_2", - .match = 0x140, - .match_mask = 0x7c0, - .match_maxbit = 55, - .match_minbit = 38, - .maxbit = 9, - .minbit = 6, - .value = 0x5, - .pmaxbit = 55, - .pminbit = 38, - .zone_minbit = 26, - .arc_id_mask = 0x1ffc000000, - .num_zone_bmp_words = 55, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_auth_ext_2, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_BFD", - .match = 0x3000, - .match_mask = 0x3800, - .match_maxbit = 55, - .match_minbit = 38, - .maxbit = 13, - .minbit = 11, - .value = 0x6, - .pmaxbit = 55, - .pminbit = 38, - .zone_minbit = 26, - .arc_id_mask = 0x1ffc000000, - .num_zone_bmp_words = 57, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_bfd, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1 */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_1", - .match = 0x20000, - .match_mask = 0x3c000, - .match_maxbit = 55, - .match_minbit = 38, - .maxbit = 17, - .minbit = 14, - .value = 0x8, - .pmaxbit = 55, - .pminbit = 38, - .zone_minbit = 26, - .arc_id_mask = 0x1ffc000000, - .num_zone_bmp_words = 42, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_1, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2 */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_DEST_OPT_EXT_2", - .match = 0x200, - .match_mask = 0x7c0, - .match_maxbit = 55, - .match_minbit = 38, - .maxbit = 9, - .minbit = 6, - .value = 0x8, - .pmaxbit = 55, - .pminbit = 38, - .zone_minbit = 26, - .arc_id_mask = 0x1ffc000000, - .num_zone_bmp_words = 55, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_dest_opt_ext_2, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_ESP_EXT", - .match = 0x40, - .match_mask = 0x7c0, - .match_maxbit = 55, - .match_minbit = 38, - .maxbit = 9, - .minbit = 6, - .value = 0x1, - .pmaxbit = 55, - .pminbit = 38, - .zone_minbit = 26, - .arc_id_mask = 0x1ffc000000, - .num_zone_bmp_words = 55, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_esp_ext, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", - .match = 0x1, - .match_mask = 0x1, - .match_maxbit = 55, - .match_minbit = 38, - .maxbit = 0, - .minbit = 0, - .value = 0x1, - .pmaxbit = 55, - .pminbit = 38, - .zone_minbit = 26, - .arc_id_mask = 0x1ffc000000, - .num_zone_bmp_words = 29, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ethertype, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1 */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_1", - .match = 0x28000, - .match_mask = 0x3c000, - .match_maxbit = 55, - .match_minbit = 38, - .maxbit = 17, - .minbit = 14, - .value = 0xa, - .pmaxbit = 55, - .pminbit = 38, - .zone_minbit = 26, - .arc_id_mask = 0x1ffc000000, - .num_zone_bmp_words = 45, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_1, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2 */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_FRAG_EXT_2", - .match = 0x240, - .match_mask = 0x7c0, - .match_maxbit = 55, - .match_minbit = 38, - .maxbit = 9, - .minbit = 6, - .value = 0x9, - .pmaxbit = 55, - .pminbit = 38, - .zone_minbit = 26, - .arc_id_mask = 0x1ffc000000, - .num_zone_bmp_words = 56, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_frag_ext_2, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1 */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_1", - .match = 0x8000, - .match_mask = 0x3c000, - .match_maxbit = 55, - .match_minbit = 38, - .maxbit = 17, - .minbit = 14, - .value = 0x2, - .pmaxbit = 55, - .pminbit = 38, - .zone_minbit = 26, - .arc_id_mask = 0x1ffc000000, - .num_zone_bmp_words = 48, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_1, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2 */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_HOP_BY_HOP_EXT_2", - .match = 0xc0, - .match_mask = 0x7c0, - .match_maxbit = 55, - .match_minbit = 38, - .maxbit = 9, - .minbit = 6, - .value = 0x3, - .pmaxbit = 55, - .pminbit = 38, - .zone_minbit = 26, - .arc_id_mask = 0x1ffc000000, - .num_zone_bmp_words = 56, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_hop_by_hop_ext_2, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_ICMP", - .match = 0x800, - .match_mask = 0x3818, - .match_maxbit = 55, - .match_minbit = 38, - .maxbit = 13, - .minbit = 11, - .value = 0x1, - .pmaxbit = 55, - .pminbit = 38, - .zone_minbit = 26, - .arc_id_mask = 0x1ffc000000, - .num_zone_bmp_words = 57, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_icmp, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER", - .match = 0x2c0, - .match_mask = 0x7c0, - .match_maxbit = 55, - .match_minbit = 38, - .maxbit = 9, - .minbit = 6, - .value = 0xb, - .pmaxbit = 55, - .pminbit = 38, - .zone_minbit = 26, - .arc_id_mask = 0x1ffc000000, - .num_zone_bmp_words = 48, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_header, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE", - .match = 0xc000, - .match_mask = 0x3c000, - .match_maxbit = 55, - .match_minbit = 38, - .maxbit = 17, - .minbit = 14, - .value = 0x3, - .pmaxbit = 55, - .pminbit = 38, - .zone_minbit = 26, - .arc_id_mask = 0x1ffc000000, - .num_zone_bmp_words = 48, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_metadata_base, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_IGMP", - .match = 0x100, - .match_mask = 0x7c0, - .match_maxbit = 55, - .match_minbit = 38, - .maxbit = 9, - .minbit = 6, - .value = 0x4, - .pmaxbit = 55, - .pminbit = 38, - .zone_minbit = 26, - .arc_id_mask = 0x1ffc000000, - .num_zone_bmp_words = 36, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_igmp, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV4", - .match = 0x2, - .match_mask = 0x406, - .match_maxbit = 55, - .match_minbit = 38, - .maxbit = 2, - .minbit = 1, - .value = 0x1, - .pmaxbit = 55, - .pminbit = 38, - .zone_minbit = 26, - .arc_id_mask = 0x1ffc000000, - .num_zone_bmp_words = 36, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv4, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV6", - .match = 0x4, - .match_mask = 0x406, - .match_maxbit = 55, - .match_minbit = 38, - .maxbit = 2, - .minbit = 1, - .value = 0x2, - .pmaxbit = 55, - .pminbit = 38, - .zone_minbit = 26, - .arc_id_mask = 0x1ffc000000, - .num_zone_bmp_words = 58, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv6, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_NONE", - .match = 0x0, - .match_mask = 0x3ffff, - .match_maxbit = 55, - .match_minbit = 38, - .maxbit = 17, - .minbit = 0, - .value = 0x0, - .pmaxbit = 55, - .pminbit = 38, - .zone_minbit = 26, - .arc_id_mask = 0x1ffc000000, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_P_1588", - .match = 0x2800, - .match_mask = 0x3800, - .match_maxbit = 55, - .match_minbit = 38, - .maxbit = 13, - .minbit = 11, - .value = 0x5, - .pmaxbit = 55, - .pminbit = 38, - .zone_minbit = 26, - .arc_id_mask = 0x1ffc000000, - .num_zone_bmp_words = 58, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_p_1588, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1 */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_1", - .match = 0x34000, - .match_mask = 0x3c000, - .match_maxbit = 55, - .match_minbit = 38, - .maxbit = 17, - .minbit = 14, - .value = 0xd, - .pmaxbit = 55, - .pminbit = 38, - .zone_minbit = 26, - .arc_id_mask = 0x1ffc000000, - .num_zone_bmp_words = 51, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_1, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2 */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_PROG_EXT_2", - .match = 0x280, - .match_mask = 0x7c0, - .match_maxbit = 55, - .match_minbit = 38, - .maxbit = 9, - .minbit = 6, - .value = 0xa, - .pmaxbit = 55, - .pminbit = 38, - .zone_minbit = 26, - .arc_id_mask = 0x1ffc000000, - .num_zone_bmp_words = 57, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_prog_ext_2, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_RARP", - .match = 0x14000, - .match_mask = 0x3c000, - .match_maxbit = 55, - .match_minbit = 38, - .maxbit = 17, - .minbit = 14, - .value = 0x5, - .pmaxbit = 55, - .pminbit = 38, - .zone_minbit = 26, - .arc_id_mask = 0x1ffc000000, - .num_zone_bmp_words = 29, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rarp, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1 */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_1", - .match = 0x18000, - .match_mask = 0x3c000, - .match_maxbit = 55, - .match_minbit = 38, - .maxbit = 17, - .minbit = 14, - .value = 0x6, - .pmaxbit = 55, - .pminbit = 38, - .zone_minbit = 26, - .arc_id_mask = 0x1ffc000000, - .num_zone_bmp_words = 54, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_1, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2 */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_ROUT_EXT_2", - .match = 0x1c0, - .match_mask = 0x7c0, - .match_maxbit = 55, - .match_minbit = 38, - .maxbit = 9, - .minbit = 6, - .value = 0x7, - .pmaxbit = 55, - .pminbit = 38, - .zone_minbit = 26, - .arc_id_mask = 0x1ffc000000, - .num_zone_bmp_words = 57, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rout_ext_2, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", - .match = 0x8, - .match_mask = 0x418, - .match_maxbit = 55, - .match_minbit = 38, - .maxbit = 4, - .minbit = 3, - .value = 0x1, - .pmaxbit = 55, - .pminbit = 38, - .zone_minbit = 26, - .arc_id_mask = 0x1ffc000000, - .num_zone_bmp_words = 57, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_first_4bytes, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", - .match = 0x28, - .match_mask = 0x438, - .match_maxbit = 55, - .match_minbit = 38, - .maxbit = 5, - .minbit = 5, - .value = 0x1, - .pmaxbit = 55, - .pminbit = 38, - .zone_minbit = 26, - .arc_id_mask = 0x1ffc000000, - .num_zone_bmp_words = 57, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_last_16bytes, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_UDP", - .match = 0x10, - .match_mask = 0x418, - .match_maxbit = 55, - .match_minbit = 38, - .maxbit = 4, - .minbit = 3, - .value = 0x2, - .pmaxbit = 55, - .pminbit = 38, - .zone_minbit = 26, - .arc_id_mask = 0x1ffc000000, - .num_zone_bmp_words = 58, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_udp, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", - .match = 0x24000, - .match_mask = 0x3c000, - .match_maxbit = 55, - .match_minbit = 38, - .maxbit = 17, - .minbit = 14, - .value = 0x9, - .pmaxbit = 55, - .pminbit = 38, - .zone_minbit = 26, - .arc_id_mask = 0x1ffc000000, - .num_zone_bmp_words = 29, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l3, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", - .match = 0x2000, - .match_mask = 0x3800, - .match_maxbit = 55, - .match_minbit = 38, - .maxbit = 13, - .minbit = 11, - .value = 0x4, - .pmaxbit = 55, - .pminbit = 38, - .zone_minbit = 26, - .arc_id_mask = 0x1ffc000000, - .num_zone_bmp_words = 58, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l4, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", - .match = 0x3800, - .match_mask = 0x3800, - .match_maxbit = 55, - .match_minbit = 38, - .maxbit = 13, - .minbit = 11, - .value = 0x7, - .pmaxbit = 55, - .pminbit = 38, - .zone_minbit = 26, - .arc_id_mask = 0x1ffc000000, - .num_zone_bmp_words = 58, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l5, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1 */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_1", - .match = 0x30000, - .match_mask = 0x3c000, - .match_maxbit = 55, - .match_minbit = 38, - .maxbit = 17, - .minbit = 14, - .value = 0xc, - .pmaxbit = 55, - .pminbit = 38, - .zone_minbit = 26, - .arc_id_mask = 0x1ffc000000, - .num_zone_bmp_words = 58, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_1, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2 */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_WESP_EXT_2", - .match = 0x180, - .match_mask = 0x7c0, - .match_maxbit = 55, - .match_minbit = 38, - .maxbit = 9, - .minbit = 6, - .value = 0x6, - .pmaxbit = 55, - .pminbit = 38, - .zone_minbit = 26, - .arc_id_mask = 0x1ffc000000, - .num_zone_bmp_words = 58, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_wesp_ext_2, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_CNTAG */ - .name = "INGRESS_PKT_OUTER_L2_HDR_CNTAG", - .match = 0x180, - .match_mask = 0x180, - .match_maxbit = 10, - .match_minbit = 2, - .maxbit = 8, - .minbit = 7, - .value = 0x3, - .pmaxbit = 10, - .pminbit = 2, - .zone_minbit = 2, - .arc_id_mask = 0x3fc, - .num_zone_bmp_words = 5, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_cntag, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM */ - .name = "INGRESS_PKT_OUTER_L2_HDR_GBP_ETHERNET_SHIM", - .match = 0x100, - .match_mask = 0x180, - .match_maxbit = 10, - .match_minbit = 2, - .maxbit = 8, - .minbit = 7, - .value = 0x2, - .pmaxbit = 10, - .pminbit = 2, - .zone_minbit = 2, - .arc_id_mask = 0x3fc, - .num_zone_bmp_words = 5, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_gbp_ethernet_shim, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_BASE */ - .name = "INGRESS_PKT_OUTER_L2_HDR_HG3_BASE", - .match = 0x1, - .match_mask = 0x1, - .match_maxbit = 10, - .match_minbit = 2, - .maxbit = 0, - .minbit = 0, - .value = 0x1, - .pmaxbit = 10, - .pminbit = 2, - .zone_minbit = 2, - .arc_id_mask = 0x3fc, - .num_zone_bmp_words = 5, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_base, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0 */ - .name = "INGRESS_PKT_OUTER_L2_HDR_HG3_EXT_0", - .match = 0x10, - .match_mask = 0x10, - .match_maxbit = 10, - .match_minbit = 2, - .maxbit = 4, - .minbit = 4, - .value = 0x1, - .pmaxbit = 10, - .pminbit = 2, - .zone_minbit = 2, - .arc_id_mask = 0x3fc, - .num_zone_bmp_words = 5, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_hg3_ext_0, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */ - .name = "INGRESS_PKT_OUTER_L2_HDR_ITAG", - .match = 0x40, - .match_mask = 0x40, - .match_maxbit = 10, - .match_minbit = 2, - .maxbit = 6, - .minbit = 6, - .value = 0x1, - .pmaxbit = 10, - .pminbit = 2, - .zone_minbit = 2, - .arc_id_mask = 0x3fc, - .num_zone_bmp_words = 5, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_itag, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */ - .name = "INGRESS_PKT_OUTER_L2_HDR_L2", - .match = 0x2, - .match_mask = 0x2, - .match_maxbit = 10, - .match_minbit = 2, - .maxbit = 1, - .minbit = 1, - .value = 0x1, - .pmaxbit = 10, - .pminbit = 2, - .zone_minbit = 2, - .arc_id_mask = 0x3fc, - .num_zone_bmp_words = 5, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_l2, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_MIM_GBP */ - .name = "INGRESS_PKT_OUTER_L2_HDR_MIM_GBP", - .match = 0x80, - .match_mask = 0x180, - .match_maxbit = 10, - .match_minbit = 2, - .maxbit = 8, - .minbit = 7, - .value = 0x1, - .pmaxbit = 10, - .pminbit = 2, - .zone_minbit = 2, - .arc_id_mask = 0x3fc, - .num_zone_bmp_words = 5, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_mim_gbp, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */ - .name = "INGRESS_PKT_OUTER_L2_HDR_NONE", - .match = 0x0, - .match_mask = 0x1ff, - .match_maxbit = 10, - .match_minbit = 2, - .maxbit = 8, - .minbit = 0, - .value = 0x0, - .pmaxbit = 10, - .pminbit = 2, - .zone_minbit = 2, - .arc_id_mask = 0x3fc, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */ - .name = "INGRESS_PKT_OUTER_L2_HDR_OTAG", - .match = 0x20, - .match_mask = 0x20, - .match_maxbit = 10, - .match_minbit = 2, - .maxbit = 5, - .minbit = 5, - .value = 0x1, - .pmaxbit = 10, - .pminbit = 2, - .zone_minbit = 2, - .arc_id_mask = 0x3fc, - .num_zone_bmp_words = 5, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_otag, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC */ - .name = "INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", - .match = 0x4, - .match_mask = 0x4, - .match_maxbit = 10, - .match_minbit = 2, - .maxbit = 2, - .minbit = 2, - .value = 0x1, - .pmaxbit = 10, - .pminbit = 2, - .zone_minbit = 2, - .arc_id_mask = 0x3fc, - .num_zone_bmp_words = 5, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_snap_or_llc, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SVTAG */ - .name = "INGRESS_PKT_OUTER_L2_HDR_SVTAG", - .match = 0x8, - .match_mask = 0x8, - .match_maxbit = 10, - .match_minbit = 2, - .maxbit = 3, - .minbit = 3, - .value = 0x1, - .pmaxbit = 10, - .pminbit = 2, - .zone_minbit = 2, - .arc_id_mask = 0x3fc, - .num_zone_bmp_words = 5, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_svtag, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ARP", - .match = 0x4000, - .match_mask = 0x3c000, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 17, - .minbit = 14, - .value = 0x1, - .pmaxbit = 28, - .pminbit = 11, - .zone_minbit = 10, - .arc_id_mask = 0x1ffc00, - .num_zone_bmp_words = 1, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_arp, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", - .match = 0x2c000, - .match_mask = 0x3c000, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 17, - .minbit = 14, - .value = 0xb, - .pmaxbit = 28, - .pminbit = 11, - .zone_minbit = 10, - .arc_id_mask = 0x1ffc00, - .num_zone_bmp_words = 15, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_1, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", - .match = 0x140, - .match_mask = 0x7c0, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 9, - .minbit = 6, - .value = 0x5, - .pmaxbit = 28, - .pminbit = 11, - .zone_minbit = 10, - .arc_id_mask = 0x1ffc00, - .num_zone_bmp_words = 36, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_2, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_BFD", - .match = 0x3000, - .match_mask = 0x3800, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 13, - .minbit = 11, - .value = 0x6, - .pmaxbit = 28, - .pminbit = 11, - .zone_minbit = 10, - .arc_id_mask = 0x1ffc00, - .num_zone_bmp_words = 40, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_bfd, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1", - .match = 0x20000, - .match_mask = 0x3c000, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 17, - .minbit = 14, - .value = 0x8, - .pmaxbit = 28, - .pminbit = 11, - .zone_minbit = 10, - .arc_id_mask = 0x1ffc00, - .num_zone_bmp_words = 18, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_1, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2", - .match = 0x200, - .match_mask = 0x7c0, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 9, - .minbit = 6, - .value = 0x8, - .pmaxbit = 28, - .pminbit = 11, - .zone_minbit = 10, - .arc_id_mask = 0x1ffc00, - .num_zone_bmp_words = 36, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_2, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", - .match = 0x40, - .match_mask = 0x7c0, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 9, - .minbit = 6, - .value = 0x1, - .pmaxbit = 28, - .pminbit = 11, - .zone_minbit = 10, - .arc_id_mask = 0x1ffc00, - .num_zone_bmp_words = 36, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_esp_ext, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", - .match = 0x1, - .match_mask = 0x1, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 0, - .minbit = 0, - .value = 0x1, - .pmaxbit = 28, - .pminbit = 11, - .zone_minbit = 10, - .arc_id_mask = 0x1ffc00, - .num_zone_bmp_words = 40, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ethertype, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", - .match = 0x28000, - .match_mask = 0x3c000, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 17, - .minbit = 14, - .value = 0xa, - .pmaxbit = 28, - .pminbit = 11, - .zone_minbit = 10, - .arc_id_mask = 0x1ffc00, - .num_zone_bmp_words = 22, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_1, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", - .match = 0x240, - .match_mask = 0x7c0, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 9, - .minbit = 6, - .value = 0x9, - .pmaxbit = 28, - .pminbit = 11, - .zone_minbit = 10, - .arc_id_mask = 0x1ffc00, - .num_zone_bmp_words = 37, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_2, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GPE", - .match = 0x30, - .match_mask = 0x438, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 5, - .minbit = 5, - .value = 0x1, - .pmaxbit = 28, - .pminbit = 11, - .zone_minbit = 10, - .arc_id_mask = 0x1ffc00, - .num_zone_bmp_words = 39, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gpe, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE", - .match = 0x18, - .match_mask = 0x418, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 4, - .minbit = 3, - .value = 0x3, - .pmaxbit = 28, - .pminbit = 11, - .zone_minbit = 10, - .arc_id_mask = 0x1ffc00, - .num_zone_bmp_words = 23, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", - .match = 0x80, - .match_mask = 0x7c0, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 9, - .minbit = 6, - .value = 0x2, - .pmaxbit = 28, - .pminbit = 11, - .zone_minbit = 10, - .arc_id_mask = 0x1ffc00, - .num_zone_bmp_words = 22, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_chksum, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", - .match = 0x1800, - .match_mask = 0x3800, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 13, - .minbit = 11, - .value = 0x3, - .pmaxbit = 28, - .pminbit = 11, - .zone_minbit = 10, - .arc_id_mask = 0x1ffc00, - .num_zone_bmp_words = 22, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_key, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", - .match = 0x10000, - .match_mask = 0x3c000, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 17, - .minbit = 14, - .value = 0x4, - .pmaxbit = 28, - .pminbit = 11, - .zone_minbit = 10, - .arc_id_mask = 0x1ffc00, - .num_zone_bmp_words = 23, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_rout, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", - .match = 0x38, - .match_mask = 0x438, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 5, - .minbit = 5, - .value = 0x1, - .pmaxbit = 28, - .pminbit = 11, - .zone_minbit = 10, - .arc_id_mask = 0x1ffc00, - .num_zone_bmp_words = 23, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_seq, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1", - .match = 0x8000, - .match_mask = 0x3c000, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 17, - .minbit = 14, - .value = 0x2, - .pmaxbit = 28, - .pminbit = 11, - .zone_minbit = 10, - .arc_id_mask = 0x1ffc00, - .num_zone_bmp_words = 26, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_1, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2", - .match = 0xc0, - .match_mask = 0x7c0, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 9, - .minbit = 6, - .value = 0x3, - .pmaxbit = 28, - .pminbit = 11, - .zone_minbit = 10, - .arc_id_mask = 0x1ffc00, - .num_zone_bmp_words = 37, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_2, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", - .match = 0x800, - .match_mask = 0x3818, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 13, - .minbit = 11, - .value = 0x1, - .pmaxbit = 28, - .pminbit = 11, - .zone_minbit = 10, - .arc_id_mask = 0x1ffc00, - .num_zone_bmp_words = 39, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_icmp, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER", - .match = 0x2c0, - .match_mask = 0x7c0, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 9, - .minbit = 6, - .value = 0xb, - .pmaxbit = 28, - .pminbit = 11, - .zone_minbit = 10, - .arc_id_mask = 0x1ffc00, - .num_zone_bmp_words = 27, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_header, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE", - .match = 0xc000, - .match_mask = 0x3c000, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 17, - .minbit = 14, - .value = 0x3, - .pmaxbit = 28, - .pminbit = 11, - .zone_minbit = 10, - .arc_id_mask = 0x1ffc00, - .num_zone_bmp_words = 27, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_metadata_base, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", - .match = 0x100, - .match_mask = 0x7c0, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 9, - .minbit = 6, - .value = 0x4, - .pmaxbit = 28, - .pminbit = 11, - .zone_minbit = 10, - .arc_id_mask = 0x1ffc00, - .num_zone_bmp_words = 9, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_igmp, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IOAM_E2E", - .match = 0x1000, - .match_mask = 0x3800, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 13, - .minbit = 11, - .value = 0x2, - .pmaxbit = 28, - .pminbit = 11, - .zone_minbit = 10, - .arc_id_mask = 0x1ffc00, - .num_zone_bmp_words = 39, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ioam_e2e, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", - .match = 0x2, - .match_mask = 0x406, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 2, - .minbit = 1, - .value = 0x1, - .pmaxbit = 28, - .pminbit = 11, - .zone_minbit = 10, - .arc_id_mask = 0x1ffc00, - .num_zone_bmp_words = 10, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv4, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", - .match = 0x4, - .match_mask = 0x406, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 2, - .minbit = 1, - .value = 0x2, - .pmaxbit = 28, - .pminbit = 11, - .zone_minbit = 10, - .arc_id_mask = 0x1ffc00, - .num_zone_bmp_words = 39, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv6, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MAC_IN_MAC */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MAC_IN_MAC", - .match = 0x1c000, - .match_mask = 0x3c000, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 17, - .minbit = 14, - .value = 0x7, - .pmaxbit = 28, - .pminbit = 11, - .zone_minbit = 10, - .arc_id_mask = 0x1ffc00, - .num_zone_bmp_words = 39, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mac_in_mac, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS0", - .match = 0x400, - .match_mask = 0x400, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 10, - .minbit = 10, - .value = 0x1, - .pmaxbit = 28, - .pminbit = 11, - .zone_minbit = 10, - .arc_id_mask = 0x1ffc00, - .num_zone_bmp_words = 40, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls0, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS1", - .match = 0x402, - .match_mask = 0x402, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 1, - .minbit = 1, - .value = 0x1, - .pmaxbit = 28, - .pminbit = 11, - .zone_minbit = 10, - .arc_id_mask = 0x1ffc00, - .num_zone_bmp_words = 40, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls1, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS2", - .match = 0x404, - .match_mask = 0x404, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 2, - .minbit = 2, - .value = 0x1, - .pmaxbit = 28, - .pminbit = 11, - .zone_minbit = 10, - .arc_id_mask = 0x1ffc00, - .num_zone_bmp_words = 40, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls2, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS3", - .match = 0x408, - .match_mask = 0x408, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 3, - .minbit = 3, - .value = 0x1, - .pmaxbit = 28, - .pminbit = 11, - .zone_minbit = 10, - .arc_id_mask = 0x1ffc00, - .num_zone_bmp_words = 40, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls3, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS4", - .match = 0x410, - .match_mask = 0x410, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 4, - .minbit = 4, - .value = 0x1, - .pmaxbit = 28, - .pminbit = 11, - .zone_minbit = 10, - .arc_id_mask = 0x1ffc00, - .num_zone_bmp_words = 40, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls4, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS5", - .match = 0x420, - .match_mask = 0x420, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 5, - .minbit = 5, - .value = 0x1, - .pmaxbit = 28, - .pminbit = 11, - .zone_minbit = 10, - .arc_id_mask = 0x1ffc00, - .num_zone_bmp_words = 40, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls5, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS6", - .match = 0x440, - .match_mask = 0x440, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 6, - .minbit = 6, - .value = 0x1, - .pmaxbit = 28, - .pminbit = 11, - .zone_minbit = 10, - .arc_id_mask = 0x1ffc00, - .num_zone_bmp_words = 40, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls6, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_ACH", - .match = 0x480, - .match_mask = 0x480, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 7, - .minbit = 7, - .value = 0x1, - .pmaxbit = 28, - .pminbit = 11, - .zone_minbit = 10, - .arc_id_mask = 0x1ffc00, - .num_zone_bmp_words = 40, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_ach, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_MPLS_CW", - .match = 0x500, - .match_mask = 0x500, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 8, - .minbit = 8, - .value = 0x1, - .pmaxbit = 28, - .pminbit = 11, - .zone_minbit = 10, - .arc_id_mask = 0x1ffc00, - .num_zone_bmp_words = 40, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_mpls_cw, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_NONE", - .match = 0x0, - .match_mask = 0x3ffff, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 17, - .minbit = 0, - .value = 0x0, - .pmaxbit = 28, - .pminbit = 11, - .zone_minbit = 10, - .arc_id_mask = 0x1ffc00, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", - .match = 0x2800, - .match_mask = 0x3800, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 13, - .minbit = 11, - .value = 0x5, - .pmaxbit = 28, - .pminbit = 11, - .zone_minbit = 10, - .arc_id_mask = 0x1ffc00, - .num_zone_bmp_words = 40, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_p_1588, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_1", - .match = 0x34000, - .match_mask = 0x3c000, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 17, - .minbit = 14, - .value = 0xd, - .pmaxbit = 28, - .pminbit = 11, - .zone_minbit = 10, - .arc_id_mask = 0x1ffc00, - .num_zone_bmp_words = 31, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_1, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_PROG_EXT_2", - .match = 0x280, - .match_mask = 0x7c0, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 9, - .minbit = 6, - .value = 0xa, - .pmaxbit = 28, - .pminbit = 11, - .zone_minbit = 10, - .arc_id_mask = 0x1ffc00, - .num_zone_bmp_words = 38, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_prog_ext_2, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_RARP", - .match = 0x14000, - .match_mask = 0x3c000, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 17, - .minbit = 14, - .value = 0x5, - .pmaxbit = 28, - .pminbit = 11, - .zone_minbit = 10, - .arc_id_mask = 0x1ffc00, - .num_zone_bmp_words = 40, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rarp, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1", - .match = 0x18000, - .match_mask = 0x3c000, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 17, - .minbit = 14, - .value = 0x6, - .pmaxbit = 28, - .pminbit = 11, - .zone_minbit = 10, - .arc_id_mask = 0x1ffc00, - .num_zone_bmp_words = 35, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_1, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2", - .match = 0x1c0, - .match_mask = 0x7c0, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 9, - .minbit = 6, - .value = 0x7, - .pmaxbit = 28, - .pminbit = 11, - .zone_minbit = 10, - .arc_id_mask = 0x1ffc00, - .num_zone_bmp_words = 38, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_2, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", - .match = 0x8, - .match_mask = 0x418, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 4, - .minbit = 3, - .value = 0x1, - .pmaxbit = 28, - .pminbit = 11, - .zone_minbit = 10, - .arc_id_mask = 0x1ffc00, - .num_zone_bmp_words = 39, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_first_4bytes, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", - .match = 0x28, - .match_mask = 0x438, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 5, - .minbit = 5, - .value = 0x1, - .pmaxbit = 28, - .pminbit = 11, - .zone_minbit = 10, - .arc_id_mask = 0x1ffc00, - .num_zone_bmp_words = 39, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_last_16bytes, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UDP", - .match = 0x10, - .match_mask = 0x418, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 4, - .minbit = 3, - .value = 0x2, - .pmaxbit = 28, - .pminbit = 11, - .zone_minbit = 10, - .arc_id_mask = 0x1ffc00, - .num_zone_bmp_words = 39, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_udp, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDPIPSEC */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UDPIPSEC", - .match = 0x38000, - .match_mask = 0x3c000, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 17, - .minbit = 14, - .value = 0xe, - .pmaxbit = 28, - .pminbit = 11, - .zone_minbit = 10, - .arc_id_mask = 0x1ffc00, - .num_zone_bmp_words = 35, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_udpipsec, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", - .match = 0x24000, - .match_mask = 0x3c000, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 17, - .minbit = 14, - .value = 0x9, - .pmaxbit = 28, - .pminbit = 11, - .zone_minbit = 10, - .arc_id_mask = 0x1ffc00, - .num_zone_bmp_words = 40, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l3, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", - .match = 0x2000, - .match_mask = 0x3800, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 13, - .minbit = 11, - .value = 0x4, - .pmaxbit = 28, - .pminbit = 11, - .zone_minbit = 10, - .arc_id_mask = 0x1ffc00, - .num_zone_bmp_words = 39, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l4, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", - .match = 0x3800, - .match_mask = 0x3800, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 13, - .minbit = 11, - .value = 0x7, - .pmaxbit = 28, - .pminbit = 11, - .zone_minbit = 10, - .arc_id_mask = 0x1ffc00, - .num_zone_bmp_words = 39, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l5, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", - .match = 0x810, - .match_mask = 0x3c18, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 13, - .minbit = 11, - .value = 0x1, - .pmaxbit = 28, - .pminbit = 11, - .zone_minbit = 10, - .arc_id_mask = 0x1ffc00, - .num_zone_bmp_words = 39, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_vxlan, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1", - .match = 0x30000, - .match_mask = 0x3c000, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 17, - .minbit = 14, - .value = 0xc, - .pmaxbit = 28, - .pminbit = 11, - .zone_minbit = 10, - .arc_id_mask = 0x1ffc00, - .num_zone_bmp_words = 39, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_1, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2", - .match = 0x180, - .match_mask = 0x7c0, - .match_maxbit = 28, - .match_minbit = 11, - .maxbit = 9, - .minbit = 6, - .value = 0x6, - .pmaxbit = 28, - .pminbit = 11, - .zone_minbit = 10, - .arc_id_mask = 0x1ffc00, - .num_zone_bmp_words = 39, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_2, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH */ - .name = "INGRESS_PKT_SYS_HDR_EP_NIH", - .match = 0x2, - .match_mask = 0x3, - .match_maxbit = 1, - .match_minbit = 0, - .maxbit = 1, - .minbit = 0, - .value = 0x2, - .pmaxbit = 1, - .pminbit = 0, - .zone_minbit = 0, - .arc_id_mask = 0x3, - .num_zone_bmp_words = 1, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_sys_hdr_ep_nih, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */ - .name = "INGRESS_PKT_SYS_HDR_LOOPBACK", - .match = 0x1, - .match_mask = 0x3, - .match_maxbit = 1, - .match_minbit = 0, - .maxbit = 1, - .minbit = 0, - .value = 0x1, - .pmaxbit = 1, - .pminbit = 0, - .zone_minbit = 0, - .arc_id_mask = 0x3, - .num_zone_bmp_words = 1, - .zone_bmp = bcm56890_a0_dna_6_5_34_8_0_rxpmd_arc_ingress_pkt_sys_hdr_loopback, - - }, - { - /* BCM56890_A0_DNA_6_5_34_8_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */ - .name = "INGRESS_PKT_SYS_HDR_NONE", - .match = 0x0, - .match_mask = 0x3, - .match_maxbit = 1, - .match_minbit = 0, - .maxbit = 1, - .minbit = 0, - .value = 0x0, - .pmaxbit = 1, - .pminbit = 0, - .zone_minbit = 0, - .arc_id_mask = 0x3, - - }, -}; - -static bcmpkt_rxpmd_match_id_db_info_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_match_id_db_info = { - .num_entries = 234, - .db = bcm56890_a0_dna_6_5_34_8_0_rxpmd_match_id_db -}; -bcmpkt_rxpmd_match_id_db_info_t * bcm56890_a0_dna_6_5_34_8_0_rxpmd_match_id_db_info_get(void) { - return &bcm56890_a0_dna_6_5_34_8_0_rxpmd_match_id_db_info; -} - -static shr_enum_map_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_match_id_map[] = { - BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_rxpmd_match_id_map_info_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_match_id_map_info = { - .num_entries = 234, - .map = bcm56890_a0_dna_6_5_34_8_0_rxpmd_match_id_map -}; - -bcmpkt_rxpmd_match_id_map_info_t * bcm56890_a0_dna_6_5_34_8_0_rxpmd_match_id_map_info_get(void) { - return &bcm56890_a0_dna_6_5_34_8_0_rxpmd_match_id_map_info; -} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/dna_6_5_34_8_0/bcm56890_a0_dna_6_5_34_8_0_pkt_flexhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/dna_6_5_34_8_0/bcm56890_a0_dna_6_5_34_8_0_pkt_flexhdr.c deleted file mode 100644 index 96bc5464132..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm56890_a0/dna_6_5_34_8_0/bcm56890_a0_dna_6_5_34_8_0_pkt_flexhdr.c +++ /dev/null @@ -1,10472 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) map.yml - * for device bcm56890_a0 and variant dna_6_5_34_8_0. - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - -#include -#include -#include -#include -#include -#include -#include - -#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) -#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) -#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) -#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) - -static void bcm56890_a0_dna_6_5_34_8_0_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons) -{ - uint32_t *reason = data + 0; - - if (reason[13] & (0x1 << 0)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU); - } - if (reason[13] & (0x1 << 1)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS); - } - if (reason[13] & (0x1 << 2)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE); - } - if (reason[13] & (0x1 << 3)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT_HPAE_MISS); - } - if (reason[13] & (0x1 << 4)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD); - } - if (reason[13] & (0x1 << 5)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED); - } - if (reason[13] & (0x1 << 6)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT); - } - if (reason[13] & (0x1 << 7)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD); - } - if (reason[13] & (0x1 << 8)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD); - } - if (reason[13] & (0x1 << 9)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS); - } - if (reason[13] & (0x1 << 10)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP); - } - if (reason[13] & (0x1 << 11)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS); - } - if (reason[13] & (0x1 << 12)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP); - } - if (reason[13] & (0x1 << 13)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR); - } - if (reason[13] & (0x1 << 14)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR); - } - if (reason[13] & (0x1 << 15)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED); - } - if (reason[13] & (0x1 << 16)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL); - } - if (reason[13] & (0x1 << 17)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_VFP); - } - if (reason[13] & (0x1 << 18)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_IFP); - } - if (reason[13] & (0x1 << 19)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER); - } - if (reason[13] & (0x1 << 20)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP); - } - if (reason[13] & (0x1 << 21)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_SVP); - } - if (reason[13] & (0x1 << 22)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT); - } - if (reason[13] & (0x1 << 23)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT); - } - if (reason[13] & (0x1 << 24)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED); - } - if (reason[13] & (0x1 << 25)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED); - } - if (reason[13] & (0x1 << 26)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP); - } - if (reason[13] & (0x1 << 27)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED); - } - if (reason[13] & (0x1 << 28)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF); - } - if (reason[13] & (0x1 << 29)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED); - } - if (reason[13] & (0x1 << 30)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED); - } - if (reason[13] & (0x1 << 31)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU); - } - if (reason[12] & (0x1 << 0)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0); - } - if (reason[12] & (0x1 << 1)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1); - } - if (reason[12] & (0x1 << 2)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2); - } - if (reason[12] & (0x1 << 3)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3); - } - if (reason[12] & (0x1 << 4)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4); - } - if (reason[12] & (0x1 << 5)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5); - } - if (reason[12] & (0x1 << 6)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6); - } - if (reason[12] & (0x1 << 7)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7); - } - if (reason[12] & (0x1 << 8)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_DEFAULT); - } - if (reason[12] & (0x1 << 9)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED); - } - if (reason[12] & (0x1 << 10)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED); - } - if (reason[12] & (0x1 << 11)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_BMAC_CML); - } - if (reason[12] & (0x1 << 12)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR); - } - if (reason[12] & (0x1 << 13)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU); - } - if (reason[12] & (0x1 << 14)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE); - } - if (reason[12] & (0x1 << 15)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP); - } -} - -static void bcm56890_a0_dna_6_5_34_8_0_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data) -{ - uint32_t *reason = data + 0; - - reason[13] = 0; - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) { - reason[13] |= (0x1 << 0); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) { - reason[13] |= (0x1 << 1); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) { - reason[13] |= (0x1 << 2); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT_HPAE_MISS)) { - reason[13] |= (0x1 << 3); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST_RSVD)) { - reason[13] |= (0x1 << 4); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) { - reason[13] |= (0x1 << 5); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) { - reason[13] |= (0x1 << 6); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED_RSVD)) { - reason[13] |= (0x1 << 7); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED_RSVD)) { - reason[13] |= (0x1 << 8); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) { - reason[13] |= (0x1 << 9); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) { - reason[13] |= (0x1 << 10); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) { - reason[13] |= (0x1 << 11); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) { - reason[13] |= (0x1 << 12); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) { - reason[13] |= (0x1 << 13); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) { - reason[13] |= (0x1 << 14); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED)) { - reason[13] |= (0x1 << 15); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) { - reason[13] |= (0x1 << 16); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_VFP)) { - reason[13] |= (0x1 << 17); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_IFP)) { - reason[13] |= (0x1 << 18); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) { - reason[13] |= (0x1 << 19); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_DST_FP)) { - reason[13] |= (0x1 << 20); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_SVP)) { - reason[13] |= (0x1 << 21); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT)) { - reason[13] |= (0x1 << 22); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) { - reason[13] |= (0x1 << 23); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED)) { - reason[13] |= (0x1 << 24); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED)) { - reason[13] |= (0x1 << 25); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP)) { - reason[13] |= (0x1 << 26); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_URPF_CHECK_FAILED)) { - reason[13] |= (0x1 << 27); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_L3_IIF_EQ_L3_OIF)) { - reason[13] |= (0x1 << 28); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_MONITOR_EN_OR_MEMBER_REASSINED)) { - reason[13] |= (0x1 << 29); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_MONITOR_EN_OR_MEMBER_REASSINED)) { - reason[13] |= (0x1 << 30); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_MPLS_CTRL_PKT_TO_CPU)) { - reason[13] |= (0x1 << 31); - } - reason[12] = 0; - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0)) { - reason[12] |= (0x1 << 0); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1)) { - reason[12] |= (0x1 << 1); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2)) { - reason[12] |= (0x1 << 2); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3)) { - reason[12] |= (0x1 << 3); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4)) { - reason[12] |= (0x1 << 4); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5)) { - reason[12] |= (0x1 << 5); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6)) { - reason[12] |= (0x1 << 6); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7)) { - reason[12] |= (0x1 << 7); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_DEFAULT)) { - reason[12] |= (0x1 << 8); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_DLB_ECMP_PKT_SAMPLED)) { - reason[12] |= (0x1 << 9); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_DLB_LAG_PKT_SAMPLED)) { - reason[12] |= (0x1 << 10); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_BMAC_CML)) { - reason[12] |= (0x1 << 11); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR)) { - reason[12] |= (0x1 << 12); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU)) { - reason[12] |= (0x1 << 13); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_CB_STATION_MOVE)) { - reason[12] |= (0x1 << 14); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) { - reason[12] |= (0x1 << 15); - } -} - -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_flex_field_data[] = { - { - .name = "BSCAN_CONTROL_DATA_15_0", - .fid = BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_BSCAN_CONTROL_DATA_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 400, 415 }, /* Profile 2. */ - { 400, 415 }, /* Profile 3. */ - { 400, 415 }, /* Profile 4. */ - { 400, 415 }, /* Profile 5. */ - { 400, 415 }, /* Profile 6. */ - { 400, 415 }, /* Profile 7. */ - { 400, 415 }, /* Profile 8. */ - { 400, 415 }, /* Profile 9. */ - { 400, 415 }, /* Profile 10. */ - { 400, 415 }, /* Profile 11. */ - { 400, 415 }, /* Profile 12. */ - { 400, 415 }, /* Profile 13. */ - { 400, 415 }, /* Profile 14. */ - { 400, 415 }, /* Profile 15. */ - { 400, 415 }, /* Profile 16. */ - { 400, 415 }, /* Profile 17. */ - { 400, 415 }, /* Profile 18. */ - { 400, 415 }, /* Profile 19. */ - { 400, 415 }, /* Profile 20. */ - { 400, 415 }, /* Profile 21. */ - { 400, 415 }, /* Profile 22. */ - { 400, 415 }, /* Profile 23. */ - { 400, 415 }, /* Profile 24. */ - { 400, 415 }, /* Profile 25. */ - { 400, 415 }, /* Profile 26. */ - { 400, 415 }, /* Profile 27. */ - { 400, 415 }, /* Profile 28. */ - { 400, 415 }, /* Profile 29. */ - { 400, 415 }, /* Profile 30. */ - { 400, 415 }, /* Profile 31. */ - { 400, 415 }, /* Profile 32. */ - { 400, 415 }, /* Profile 33. */ - { 400, 415 }, /* Profile 34. */ - { 400, 415 }, /* Profile 35. */ - { 400, 415 }, /* Profile 36. */ - { 400, 415 }, /* Profile 37. */ - { 400, 415 }, /* Profile 38. */ - { 400, 415 }, /* Profile 39. */ - { 400, 415 }, /* Profile 40. */ - { 400, 415 }, /* Profile 41. */ - { 400, 415 }, /* Profile 42. */ - { 400, 415 }, /* Profile 43. */ - { 400, 415 }, /* Profile 44. */ - { 400, 415 }, /* Profile 45. */ - }, - .profile_cnt = 46, - }, - { - .name = "BSCAN_CONTROL_FLAGS_3_0", - .fid = BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_BSCAN_CONTROL_FLAGS_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 476, 479 }, /* Profile 2. */ - { 476, 479 }, /* Profile 3. */ - { 476, 479 }, /* Profile 4. */ - { 476, 479 }, /* Profile 5. */ - { 476, 479 }, /* Profile 6. */ - { 476, 479 }, /* Profile 7. */ - { 476, 479 }, /* Profile 8. */ - { 476, 479 }, /* Profile 9. */ - { 476, 479 }, /* Profile 10. */ - { 476, 479 }, /* Profile 11. */ - { 476, 479 }, /* Profile 12. */ - { 476, 479 }, /* Profile 13. */ - { 476, 479 }, /* Profile 14. */ - { 476, 479 }, /* Profile 15. */ - { 476, 479 }, /* Profile 16. */ - { 476, 479 }, /* Profile 17. */ - { 476, 479 }, /* Profile 18. */ - { 476, 479 }, /* Profile 19. */ - { 476, 479 }, /* Profile 20. */ - { 476, 479 }, /* Profile 21. */ - { 476, 479 }, /* Profile 22. */ - { 476, 479 }, /* Profile 23. */ - { 476, 479 }, /* Profile 24. */ - { 476, 479 }, /* Profile 25. */ - { 476, 479 }, /* Profile 26. */ - { 476, 479 }, /* Profile 27. */ - { 476, 479 }, /* Profile 28. */ - { 476, 479 }, /* Profile 29. */ - { 476, 479 }, /* Profile 30. */ - { 476, 479 }, /* Profile 31. */ - { 476, 479 }, /* Profile 32. */ - { 476, 479 }, /* Profile 33. */ - { 476, 479 }, /* Profile 34. */ - { 476, 479 }, /* Profile 35. */ - { 476, 479 }, /* Profile 36. */ - { 476, 479 }, /* Profile 37. */ - { 476, 479 }, /* Profile 38. */ - { 476, 479 }, /* Profile 39. */ - { 476, 479 }, /* Profile 40. */ - { 476, 479 }, /* Profile 41. */ - { 476, 479 }, /* Profile 42. */ - { 476, 479 }, /* Profile 43. */ - { 476, 479 }, /* Profile 44. */ - { 476, 479 }, /* Profile 45. */ - }, - .profile_cnt = 46, - }, - { - .name = "DLB_ECMP_DESTINATION_15_0", - .fid = BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_DLB_ECMP_DESTINATION_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { -1, -1 }, /* Profile 2. */ - { -1, -1 }, /* Profile 3. */ - { -1, -1 }, /* Profile 4. */ - { -1, -1 }, /* Profile 5. */ - { -1, -1 }, /* Profile 6. */ - { -1, -1 }, /* Profile 7. */ - { -1, -1 }, /* Profile 8. */ - { -1, -1 }, /* Profile 9. */ - { -1, -1 }, /* Profile 10. */ - { -1, -1 }, /* Profile 11. */ - { -1, -1 }, /* Profile 12. */ - { 320, 335 }, /* Profile 13. */ - { 320, 335 }, /* Profile 14. */ - { 336, 351 }, /* Profile 15. */ - { 336, 351 }, /* Profile 16. */ - { 320, 335 }, /* Profile 17. */ - { 320, 335 }, /* Profile 18. */ - { 336, 351 }, /* Profile 19. */ - { 336, 351 }, /* Profile 20. */ - { 320, 335 }, /* Profile 21. */ - { 320, 335 }, /* Profile 22. */ - { 336, 351 }, /* Profile 23. */ - { -1, -1 }, /* Profile 24. */ - { -1, -1 }, /* Profile 25. */ - { -1, -1 }, /* Profile 26. */ - { -1, -1 }, /* Profile 27. */ - { -1, -1 }, /* Profile 28. */ - { -1, -1 }, /* Profile 29. */ - { -1, -1 }, /* Profile 30. */ - { -1, -1 }, /* Profile 31. */ - { -1, -1 }, /* Profile 32. */ - { -1, -1 }, /* Profile 33. */ - { -1, -1 }, /* Profile 34. */ - { 320, 335 }, /* Profile 35. */ - { 320, 335 }, /* Profile 36. */ - { 336, 351 }, /* Profile 37. */ - { 336, 351 }, /* Profile 38. */ - { 320, 335 }, /* Profile 39. */ - { 320, 335 }, /* Profile 40. */ - { 336, 351 }, /* Profile 41. */ - { 336, 351 }, /* Profile 42. */ - { 320, 335 }, /* Profile 43. */ - { 320, 335 }, /* Profile 44. */ - { 336, 351 }, /* Profile 45. */ - }, - .profile_cnt = 46, - }, - { - .name = "DNAT_CTRL_3_0", - .fid = BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_DNAT_CTRL_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { -1, -1 }, /* Profile 2. */ - { 420, 423 }, /* Profile 3. */ - { -1, -1 }, /* Profile 4. */ - { -1, -1 }, /* Profile 5. */ - { -1, -1 }, /* Profile 6. */ - { 420, 423 }, /* Profile 7. */ - { -1, -1 }, /* Profile 8. */ - { -1, -1 }, /* Profile 9. */ - { -1, -1 }, /* Profile 10. */ - { 420, 423 }, /* Profile 11. */ - { -1, -1 }, /* Profile 12. */ - { -1, -1 }, /* Profile 13. */ - { 420, 423 }, /* Profile 14. */ - { -1, -1 }, /* Profile 15. */ - { -1, -1 }, /* Profile 16. */ - { -1, -1 }, /* Profile 17. */ - { 420, 423 }, /* Profile 18. */ - { -1, -1 }, /* Profile 19. */ - { -1, -1 }, /* Profile 20. */ - { -1, -1 }, /* Profile 21. */ - { 420, 423 }, /* Profile 22. */ - { -1, -1 }, /* Profile 23. */ - { -1, -1 }, /* Profile 24. */ - { 420, 423 }, /* Profile 25. */ - { -1, -1 }, /* Profile 26. */ - { -1, -1 }, /* Profile 27. */ - { -1, -1 }, /* Profile 28. */ - { 420, 423 }, /* Profile 29. */ - { -1, -1 }, /* Profile 30. */ - { -1, -1 }, /* Profile 31. */ - { -1, -1 }, /* Profile 32. */ - { 420, 423 }, /* Profile 33. */ - { -1, -1 }, /* Profile 34. */ - { -1, -1 }, /* Profile 35. */ - { 420, 423 }, /* Profile 36. */ - { -1, -1 }, /* Profile 37. */ - { -1, -1 }, /* Profile 38. */ - { -1, -1 }, /* Profile 39. */ - { 420, 423 }, /* Profile 40. */ - { -1, -1 }, /* Profile 41. */ - { -1, -1 }, /* Profile 42. */ - { -1, -1 }, /* Profile 43. */ - { 420, 423 }, /* Profile 44. */ - }, - .profile_cnt = 45, - }, - { - .name = "DROP_CODE_15_0", - .fid = BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 48, 63 }, /* Profile 2. */ - { 48, 63 }, /* Profile 3. */ - { 48, 63 }, /* Profile 4. */ - { 48, 63 }, /* Profile 5. */ - { -1, -1 }, /* Profile 6. */ - { -1, -1 }, /* Profile 7. */ - { -1, -1 }, /* Profile 8. */ - { -1, -1 }, /* Profile 9. */ - { 48, 63 }, /* Profile 10. */ - { 48, 63 }, /* Profile 11. */ - { 48, 63 }, /* Profile 12. */ - { 48, 63 }, /* Profile 13. */ - { 48, 63 }, /* Profile 14. */ - { 48, 63 }, /* Profile 15. */ - { 48, 63 }, /* Profile 16. */ - { -1, -1 }, /* Profile 17. */ - { -1, -1 }, /* Profile 18. */ - { -1, -1 }, /* Profile 19. */ - { -1, -1 }, /* Profile 20. */ - { 48, 63 }, /* Profile 21. */ - { 48, 63 }, /* Profile 22. */ - { 48, 63 }, /* Profile 23. */ - { 48, 63 }, /* Profile 24. */ - { 48, 63 }, /* Profile 25. */ - { 48, 63 }, /* Profile 26. */ - { 48, 63 }, /* Profile 27. */ - { -1, -1 }, /* Profile 28. */ - { -1, -1 }, /* Profile 29. */ - { -1, -1 }, /* Profile 30. */ - { -1, -1 }, /* Profile 31. */ - { 48, 63 }, /* Profile 32. */ - { 48, 63 }, /* Profile 33. */ - { 48, 63 }, /* Profile 34. */ - { 48, 63 }, /* Profile 35. */ - { 48, 63 }, /* Profile 36. */ - { 48, 63 }, /* Profile 37. */ - { 48, 63 }, /* Profile 38. */ - { -1, -1 }, /* Profile 39. */ - { -1, -1 }, /* Profile 40. */ - { -1, -1 }, /* Profile 41. */ - { -1, -1 }, /* Profile 42. */ - { 48, 63 }, /* Profile 43. */ - { 48, 63 }, /* Profile 44. */ - { 48, 63 }, /* Profile 45. */ - }, - .profile_cnt = 46, - }, - { - .name = "DVP_15_0", - .fid = BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_DVP_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 208, 223 }, /* Profile 2. */ - { 208, 223 }, /* Profile 3. */ - { 240, 255 }, /* Profile 4. */ - { 240, 255 }, /* Profile 5. */ - { 208, 223 }, /* Profile 6. */ - { 208, 223 }, /* Profile 7. */ - { 240, 255 }, /* Profile 8. */ - { 240, 255 }, /* Profile 9. */ - { 208, 223 }, /* Profile 10. */ - { 208, 223 }, /* Profile 11. */ - { 240, 255 }, /* Profile 12. */ - { 208, 223 }, /* Profile 13. */ - { 208, 223 }, /* Profile 14. */ - { 240, 255 }, /* Profile 15. */ - { 240, 255 }, /* Profile 16. */ - { 208, 223 }, /* Profile 17. */ - { 208, 223 }, /* Profile 18. */ - { 240, 255 }, /* Profile 19. */ - { 240, 255 }, /* Profile 20. */ - { 208, 223 }, /* Profile 21. */ - { 208, 223 }, /* Profile 22. */ - { 240, 255 }, /* Profile 23. */ - { 224, 239 }, /* Profile 24. */ - { 224, 239 }, /* Profile 25. */ - { 256, 271 }, /* Profile 26. */ - { 256, 271 }, /* Profile 27. */ - { 224, 239 }, /* Profile 28. */ - { 224, 239 }, /* Profile 29. */ - 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{ 432, 435 }, /* Profile 35. */ - { 436, 439 }, /* Profile 36. */ - { 432, 435 }, /* Profile 37. */ - { 432, 435 }, /* Profile 38. */ - { 432, 435 }, /* Profile 39. */ - { 436, 439 }, /* Profile 40. */ - { 432, 435 }, /* Profile 41. */ - { 432, 435 }, /* Profile 42. */ - { 432, 435 }, /* Profile 43. */ - { 436, 439 }, /* Profile 44. */ - { 432, 435 }, /* Profile 45. */ - }, - .profile_cnt = 46, - }, - { - .name = "SVTAG_CTRL_PKT_INFO_3_0", - .fid = BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_SVTAG_CTRL_PKT_INFO_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 468, 471 }, /* Profile 2. */ - { 468, 471 }, /* Profile 3. */ - { 468, 471 }, /* Profile 4. */ - { 468, 471 }, /* Profile 5. */ - { 468, 471 }, /* Profile 6. */ - { 468, 471 }, /* Profile 7. */ - { 468, 471 }, /* Profile 8. */ - { 468, 471 }, /* Profile 9. */ - { 464, 467 }, /* Profile 10. */ - { 464, 467 }, /* Profile 11. */ - { 464, 467 }, /* Profile 12. */ - { 468, 471 }, /* Profile 13. */ - { 468, 471 }, /* Profile 14. */ - { 468, 471 }, /* Profile 15. */ - { 468, 471 }, /* Profile 16. */ - { 468, 471 }, /* Profile 17. */ - { 468, 471 }, /* Profile 18. */ - { 468, 471 }, /* Profile 19. */ - { 468, 471 }, /* Profile 20. */ - { 464, 467 }, /* Profile 21. */ - { 464, 467 }, /* Profile 22. */ - { 464, 467 }, /* Profile 23. */ - { 468, 471 }, /* Profile 24. */ - { 468, 471 }, /* Profile 25. */ - { 468, 471 }, /* Profile 26. */ - { 468, 471 }, /* Profile 27. */ - { 468, 471 }, /* Profile 28. */ - { 468, 471 }, /* Profile 29. */ - { 468, 471 }, /* Profile 30. */ - { 468, 471 }, /* Profile 31. */ - { 464, 467 }, /* Profile 32. */ - { 464, 467 }, /* Profile 33. */ - { 464, 467 }, /* Profile 34. */ - { 468, 471 }, /* Profile 35. */ - { 468, 471 }, /* Profile 36. */ - { 468, 471 }, /* Profile 37. */ - { 468, 471 }, /* Profile 38. */ - { 468, 471 }, /* Profile 39. */ - { 468, 471 }, /* Profile 40. */ - { 468, 471 }, /* Profile 41. */ - { 468, 471 }, /* Profile 42. */ - { 464, 467 }, /* Profile 43. */ - { 464, 467 }, /* Profile 44. */ - { 464, 467 }, /* Profile 45. */ - }, - .profile_cnt = 46, - }, - { - .name = "SVTAG_SC_INDEX_OR_IFP_OPAQUE_OBJ_15_0", - .fid = BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_SVTAG_SC_INDEX_OR_IFP_OPAQUE_OBJ_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 176, 191 }, /* Profile 2. */ - { 176, 191 }, /* Profile 3. */ - { 208, 223 }, /* Profile 4. */ - { 208, 223 }, /* Profile 5. */ - { 176, 191 }, /* Profile 6. */ - { 176, 191 }, /* Profile 7. */ - { 208, 223 }, /* Profile 8. */ - { 208, 223 }, /* Profile 9. */ - { 176, 191 }, /* Profile 10. */ - { 176, 191 }, /* Profile 11. */ - { 208, 223 }, /* Profile 12. */ - { 176, 191 }, /* Profile 13. */ - { 176, 191 }, /* Profile 14. */ - { 208, 223 }, /* Profile 15. */ - { 208, 223 }, /* Profile 16. */ - { 176, 191 }, /* Profile 17. */ - { 176, 191 }, /* Profile 18. */ - { 208, 223 }, /* Profile 19. */ - { 208, 223 }, /* Profile 20. */ - { 176, 191 }, /* Profile 21. */ - { 176, 191 }, /* Profile 22. */ - { 208, 223 }, /* Profile 23. */ - { 192, 207 }, /* Profile 24. */ - { 192, 207 }, /* Profile 25. */ - { 224, 239 }, /* Profile 26. */ - { 224, 239 }, /* Profile 27. */ - { 192, 207 }, /* Profile 28. */ - { 192, 207 }, /* Profile 29. */ - { 224, 239 }, /* Profile 30. */ - { 224, 239 }, /* Profile 31. */ - { 192, 207 }, /* Profile 32. */ - { 192, 207 }, /* Profile 33. */ - { 224, 239 }, /* Profile 34. */ - { 192, 207 }, /* Profile 35. */ - { 192, 207 }, /* Profile 36. */ - { 224, 239 }, /* Profile 37. */ - { 224, 239 }, /* Profile 38. */ - { 192, 207 }, /* Profile 39. */ - { 192, 207 }, /* Profile 40. */ - { 224, 239 }, /* Profile 41. */ - { 224, 239 }, /* Profile 42. */ - { 192, 207 }, /* Profile 43. */ - { 192, 207 }, /* Profile 44. */ - { 224, 239 }, /* Profile 45. */ - }, - .profile_cnt = 46, - }, - { - .name = "SVTAG_SC_INDEX_STR_ALLOW_NAT_3_0", - .fid = BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_SVTAG_SC_INDEX_STR_ALLOW_NAT_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 416, 419 }, /* Profile 2. */ - { 416, 419 }, /* Profile 3. */ - { 416, 419 }, /* Profile 4. */ - { 416, 419 }, /* Profile 5. */ - { 416, 419 }, /* Profile 6. */ - { 416, 419 }, /* Profile 7. */ - { 416, 419 }, /* Profile 8. */ - { 416, 419 }, /* Profile 9. */ - { 416, 419 }, /* Profile 10. */ - { 416, 419 }, /* Profile 11. */ - { 416, 419 }, /* Profile 12. */ - { 416, 419 }, /* Profile 13. */ - { 416, 419 }, /* Profile 14. */ - { 416, 419 }, /* Profile 15. */ - { 416, 419 }, /* Profile 16. */ - { 416, 419 }, /* Profile 17. */ - { 416, 419 }, /* Profile 18. */ - { 416, 419 }, /* Profile 19. */ - { 416, 419 }, /* Profile 20. */ - { 416, 419 }, /* Profile 21. */ - { 416, 419 }, /* Profile 22. */ - { 416, 419 }, /* Profile 23. */ - { 416, 419 }, /* Profile 24. */ - { 416, 419 }, /* Profile 25. */ - { 416, 419 }, /* Profile 26. */ - { 416, 419 }, /* Profile 27. */ - { 416, 419 }, /* Profile 28. */ - { 416, 419 }, /* Profile 29. */ - { 416, 419 }, /* Profile 30. */ - { 416, 419 }, /* Profile 31. */ - { 416, 419 }, /* Profile 32. */ - { 416, 419 }, /* Profile 33. */ - { 416, 419 }, /* Profile 34. */ - { 416, 419 }, /* Profile 35. */ - { 416, 419 }, /* Profile 36. */ - { 416, 419 }, /* Profile 37. */ - { 416, 419 }, /* Profile 38. */ - { 416, 419 }, /* Profile 39. */ - { 416, 419 }, /* Profile 40. */ - { 416, 419 }, /* Profile 41. */ - { 416, 419 }, /* Profile 42. */ - { 416, 419 }, /* Profile 43. */ - { 416, 419 }, /* Profile 44. */ - { 416, 419 }, /* Profile 45. */ - }, - .profile_cnt = 46, - }, - { - .name = "SYSTEM_DESTINATION_15_0", - .fid = BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 160, 175 }, /* Profile 2. */ - { 160, 175 }, /* Profile 3. */ - { 192, 207 }, /* Profile 4. */ - { 192, 207 }, /* Profile 5. */ - { 160, 175 }, /* Profile 6. */ - { 160, 175 }, /* Profile 7. */ - { 192, 207 }, /* Profile 8. */ - { 192, 207 }, /* Profile 9. */ - { 160, 175 }, /* Profile 10. */ - { 160, 175 }, /* Profile 11. */ - { 192, 207 }, /* Profile 12. */ - { 160, 175 }, /* Profile 13. */ - { 160, 175 }, /* Profile 14. */ - { 192, 207 }, /* Profile 15. */ - { 192, 207 }, /* Profile 16. */ - { 160, 175 }, /* Profile 17. */ - { 160, 175 }, /* Profile 18. */ - { 192, 207 }, /* Profile 19. */ - { 192, 207 }, /* Profile 20. */ - { 160, 175 }, /* Profile 21. */ - { 160, 175 }, /* Profile 22. */ - { 192, 207 }, /* Profile 23. */ - { 176, 191 }, /* Profile 24. */ - { 176, 191 }, /* Profile 25. */ - { 208, 223 }, /* Profile 26. */ - { 208, 223 }, /* Profile 27. */ - { 176, 191 }, /* Profile 28. */ - { 176, 191 }, /* Profile 29. */ - { 208, 223 }, /* Profile 30. */ - { 208, 223 }, /* Profile 31. */ - { 176, 191 }, /* Profile 32. */ - { 176, 191 }, /* Profile 33. */ - { 208, 223 }, /* Profile 34. */ - { 176, 191 }, /* Profile 35. */ - { 176, 191 }, /* Profile 36. */ - { 208, 223 }, /* Profile 37. */ - { 208, 223 }, /* Profile 38. */ - { 176, 191 }, /* Profile 39. */ - { 176, 191 }, /* Profile 40. */ - { 208, 223 }, /* Profile 41. */ - { 208, 223 }, /* Profile 42. */ - { 176, 191 }, /* Profile 43. */ - { 176, 191 }, /* Profile 44. */ - { 208, 223 }, /* Profile 45. */ - }, - .profile_cnt = 46, - }, - { - .name = "SYSTEM_OPCODE_3_0", - .fid = BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 456, 459 }, /* Profile 2. */ - { 456, 459 }, /* Profile 3. */ - { 456, 459 }, /* Profile 4. */ - { 456, 459 }, /* Profile 5. */ - { 456, 459 }, /* Profile 6. */ - { 456, 459 }, /* Profile 7. */ - { 456, 459 }, /* Profile 8. */ - { 456, 459 }, /* Profile 9. */ - { 452, 455 }, /* Profile 10. */ - { 452, 455 }, /* Profile 11. */ - { 452, 455 }, /* Profile 12. */ - { 456, 459 }, /* Profile 13. */ - { 456, 459 }, /* Profile 14. */ - { 456, 459 }, /* Profile 15. */ - { 456, 459 }, /* Profile 16. */ - { 456, 459 }, /* Profile 17. */ - { 456, 459 }, /* Profile 18. */ - { 456, 459 }, /* Profile 19. */ - { 456, 459 }, /* Profile 20. */ - { 452, 455 }, /* Profile 21. */ - { 452, 455 }, /* Profile 22. */ - { 452, 455 }, /* Profile 23. */ - { 456, 459 }, /* Profile 24. */ - { 456, 459 }, /* Profile 25. */ - { 456, 459 }, /* Profile 26. */ - { 456, 459 }, /* Profile 27. */ - { 456, 459 }, /* Profile 28. */ - { 456, 459 }, /* Profile 29. */ - { 456, 459 }, /* Profile 30. */ - { 456, 459 }, /* Profile 31. */ - { 452, 455 }, /* Profile 32. */ - { 452, 455 }, /* Profile 33. */ - { 452, 455 }, /* Profile 34. */ - { 456, 459 }, /* Profile 35. */ - { 456, 459 }, /* Profile 36. */ - { 456, 459 }, /* Profile 37. */ - { 456, 459 }, /* Profile 38. */ - { 456, 459 }, /* Profile 39. */ - { 456, 459 }, /* Profile 40. */ - { 456, 459 }, /* Profile 41. */ - { 456, 459 }, /* Profile 42. */ - { 452, 455 }, /* Profile 43. */ - { 452, 455 }, /* Profile 44. */ - { 452, 455 }, /* Profile 45. */ - }, - .profile_cnt = 46, - }, - { - .name = "SYSTEM_SOURCE_15_0", - .fid = BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 80, 95 }, /* Profile 2. */ - { 80, 95 }, /* Profile 3. */ - { 80, 95 }, /* Profile 4. */ - { 80, 95 }, /* Profile 5. */ - { 80, 95 }, /* Profile 6. */ - { 80, 95 }, /* Profile 7. */ - { 80, 95 }, /* Profile 8. */ - { 80, 95 }, /* Profile 9. */ - { 80, 95 }, /* Profile 10. */ - { 80, 95 }, /* Profile 11. */ - { 80, 95 }, /* Profile 12. */ - { 80, 95 }, /* Profile 13. */ - { 80, 95 }, /* Profile 14. */ - { 80, 95 }, /* Profile 15. */ - { 80, 95 }, /* Profile 16. */ - { 80, 95 }, /* Profile 17. */ - { 80, 95 }, /* Profile 18. */ - { 80, 95 }, /* Profile 19. */ - { 80, 95 }, /* Profile 20. */ - { 80, 95 }, /* Profile 21. */ - { 80, 95 }, /* Profile 22. */ - { 80, 95 }, /* Profile 23. */ - { 80, 95 }, /* Profile 24. */ - { 80, 95 }, /* Profile 25. */ - { 80, 95 }, /* Profile 26. */ - { 80, 95 }, /* Profile 27. */ - { 80, 95 }, /* Profile 28. */ - { 80, 95 }, /* Profile 29. */ - { 80, 95 }, /* Profile 30. */ - { 80, 95 }, /* Profile 31. */ - { 80, 95 }, /* Profile 32. */ - { 80, 95 }, /* Profile 33. */ - { 80, 95 }, /* Profile 34. */ - { 80, 95 }, /* Profile 35. */ - { 80, 95 }, /* Profile 36. */ - { 80, 95 }, /* Profile 37. */ - { 80, 95 }, /* Profile 38. */ - { 80, 95 }, /* Profile 39. */ - { 80, 95 }, /* Profile 40. */ - { 80, 95 }, /* Profile 41. */ - { 80, 95 }, /* Profile 42. */ - { 80, 95 }, /* Profile 43. */ - { 80, 95 }, /* Profile 44. */ - { 80, 95 }, /* Profile 45. */ - }, - .profile_cnt = 46, - }, - { - .name = "TIMESTAMP_CTRL_3_0", - .fid = BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { -1, -1 }, /* Profile 2. */ - { -1, -1 }, /* Profile 3. */ - { 444, 447 }, /* Profile 4. */ - { 444, 447 }, /* Profile 5. */ - { -1, -1 }, /* Profile 6. */ - { -1, -1 }, /* Profile 7. */ - { 444, 447 }, /* Profile 8. */ - { 444, 447 }, /* Profile 9. */ - { -1, -1 }, /* Profile 10. */ - { -1, -1 }, /* Profile 11. */ - { 440, 443 }, /* Profile 12. */ - { -1, -1 }, /* Profile 13. */ - { -1, -1 }, /* Profile 14. */ - { 444, 447 }, /* Profile 15. */ - { 444, 447 }, /* Profile 16. */ - { -1, -1 }, /* Profile 17. */ - { -1, -1 }, /* Profile 18. */ - { 444, 447 }, /* Profile 19. */ - { 444, 447 }, /* Profile 20. */ - { -1, -1 }, /* Profile 21. */ - { -1, -1 }, /* Profile 22. */ - { 440, 443 }, /* Profile 23. */ - { -1, -1 }, /* Profile 24. */ - { -1, -1 }, /* Profile 25. */ - { 444, 447 }, /* Profile 26. */ - { 444, 447 }, /* Profile 27. */ - { -1, -1 }, /* Profile 28. */ - { -1, -1 }, /* Profile 29. */ - { 444, 447 }, /* Profile 30. */ - { 444, 447 }, /* Profile 31. */ - { -1, -1 }, /* Profile 32. */ - { -1, -1 }, /* Profile 33. */ - { 440, 443 }, /* Profile 34. */ - { -1, -1 }, /* Profile 35. */ - { -1, -1 }, /* Profile 36. */ - { 444, 447 }, /* Profile 37. */ - { 444, 447 }, /* Profile 38. */ - { -1, -1 }, /* Profile 39. */ - { -1, -1 }, /* Profile 40. */ - { 444, 447 }, /* Profile 41. */ - { 444, 447 }, /* Profile 42. */ - { -1, -1 }, /* Profile 43. */ - { -1, -1 }, /* Profile 44. */ - { 440, 443 }, /* Profile 45. */ - }, - .profile_cnt = 46, - }, - { - .name = "TUNNEL_PROCESSING_RESULTS_1_3_0", - .fid = BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 448, 451 }, /* Profile 2. */ - { 448, 451 }, /* Profile 3. */ - { 448, 451 }, /* Profile 4. */ - { 448, 451 }, /* Profile 5. */ - { 448, 451 }, /* Profile 6. */ - { 448, 451 }, /* Profile 7. */ - { 448, 451 }, /* Profile 8. */ - { 448, 451 }, /* Profile 9. */ - { 444, 447 }, /* Profile 10. */ - { 444, 447 }, /* Profile 11. */ - { 444, 447 }, /* Profile 12. */ - { 448, 451 }, /* Profile 13. */ - { 448, 451 }, /* Profile 14. */ - { 448, 451 }, /* Profile 15. */ - { 448, 451 }, /* Profile 16. */ - { 448, 451 }, /* Profile 17. */ - { 448, 451 }, /* Profile 18. */ - { 448, 451 }, /* Profile 19. */ - { 448, 451 }, /* Profile 20. */ - { 444, 447 }, /* Profile 21. */ - { 444, 447 }, /* Profile 22. */ - { 444, 447 }, /* Profile 23. */ - { 448, 451 }, /* Profile 24. */ - { 448, 451 }, /* Profile 25. */ - { 448, 451 }, /* Profile 26. */ - { 448, 451 }, /* Profile 27. */ - { 448, 451 }, /* Profile 28. */ - { 448, 451 }, /* Profile 29. */ - { 448, 451 }, /* Profile 30. */ - { 448, 451 }, /* Profile 31. */ - { 444, 447 }, /* Profile 32. */ - { 444, 447 }, /* Profile 33. */ - { 444, 447 }, /* Profile 34. */ - { 448, 451 }, /* Profile 35. */ - { 448, 451 }, /* Profile 36. */ - { 448, 451 }, /* Profile 37. */ - { 448, 451 }, /* Profile 38. */ - { 448, 451 }, /* Profile 39. */ - { 448, 451 }, /* Profile 40. */ - { 448, 451 }, /* Profile 41. */ - { 448, 451 }, /* Profile 42. */ - { 444, 447 }, /* Profile 43. */ - { 444, 447 }, /* Profile 44. */ - { 444, 447 }, /* Profile 45. */ - }, - .profile_cnt = 46, - }, - { - .name = "VFI_15_0", - .fid = BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_VFI_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 128, 143 }, /* Profile 2. */ - { 128, 143 }, /* Profile 3. */ - { 128, 143 }, /* Profile 4. */ - { 128, 143 }, /* Profile 5. */ - { 128, 143 }, /* Profile 6. */ - { 128, 143 }, /* Profile 7. */ - { 128, 143 }, /* Profile 8. */ - { 128, 143 }, /* Profile 9. */ - { 128, 143 }, /* Profile 10. */ - { 128, 143 }, /* Profile 11. */ - { 128, 143 }, /* Profile 12. */ - { 128, 143 }, /* Profile 13. */ - { 128, 143 }, /* Profile 14. */ - { 128, 143 }, /* Profile 15. */ - { 128, 143 }, /* Profile 16. */ - { 128, 143 }, /* Profile 17. */ - { 128, 143 }, /* Profile 18. */ - { 128, 143 }, /* Profile 19. */ - { 128, 143 }, /* Profile 20. */ - { 128, 143 }, /* Profile 21. */ - { 128, 143 }, /* Profile 22. */ - { 128, 143 }, /* Profile 23. */ - { 128, 143 }, /* Profile 24. */ - { 128, 143 }, /* Profile 25. */ - { 128, 143 }, /* Profile 26. */ - { 128, 143 }, /* Profile 27. */ - { 128, 143 }, /* Profile 28. */ - { 128, 143 }, /* Profile 29. */ - { 128, 143 }, /* Profile 30. */ - { 128, 143 }, /* Profile 31. */ - { 128, 143 }, /* Profile 32. */ - { 128, 143 }, /* Profile 33. */ - { 128, 143 }, /* Profile 34. */ - { 128, 143 }, /* Profile 35. */ - { 128, 143 }, /* Profile 36. */ - { 128, 143 }, /* Profile 37. */ - { 128, 143 }, /* Profile 38. */ - { 128, 143 }, /* Profile 39. */ - { 128, 143 }, /* Profile 40. */ - { 128, 143 }, /* Profile 41. */ - { 128, 143 }, /* Profile 42. */ - { 128, 143 }, /* Profile 43. */ - { 128, 143 }, /* Profile 44. */ - { 128, 143 }, /* Profile 45. */ - }, - .profile_cnt = 46, - }, - { - .name = "VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0", - .fid = BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_CTRL_SVP_MIRROR_ENABLE_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 424, 427 }, /* Profile 2. */ - { 428, 431 }, /* Profile 3. */ - { 424, 427 }, /* Profile 4. */ - { 424, 427 }, /* Profile 5. */ - { 424, 427 }, /* Profile 6. */ - { 428, 431 }, /* Profile 7. */ - { 424, 427 }, /* Profile 8. */ - { 424, 427 }, /* Profile 9. */ - { 424, 427 }, /* Profile 10. */ - { 428, 431 }, /* Profile 11. */ - { 424, 427 }, /* Profile 12. */ - { 424, 427 }, /* Profile 13. */ - { 428, 431 }, /* Profile 14. */ - { 424, 427 }, /* Profile 15. */ - { 424, 427 }, /* Profile 16. */ - { 424, 427 }, /* Profile 17. */ - { 428, 431 }, /* Profile 18. */ - { 424, 427 }, /* Profile 19. */ - { 424, 427 }, /* Profile 20. */ - { 424, 427 }, /* Profile 21. */ - { 428, 431 }, /* Profile 22. */ - { 424, 427 }, /* Profile 23. */ - { 424, 427 }, /* Profile 24. */ - { 428, 431 }, /* Profile 25. */ - { 424, 427 }, /* Profile 26. */ - { 424, 427 }, /* Profile 27. */ - { 424, 427 }, /* Profile 28. */ - { 428, 431 }, /* Profile 29. */ - { 424, 427 }, /* Profile 30. */ - { 424, 427 }, /* Profile 31. */ - { 424, 427 }, /* Profile 32. */ - { 428, 431 }, /* Profile 33. */ - { 424, 427 }, /* Profile 34. */ - { 424, 427 }, /* Profile 35. */ - { 428, 431 }, /* Profile 36. */ - { 424, 427 }, /* Profile 37. */ - { 424, 427 }, /* Profile 38. */ - { 424, 427 }, /* Profile 39. */ - { 428, 431 }, /* Profile 40. */ - { 424, 427 }, /* Profile 41. */ - { 424, 427 }, /* Profile 42. */ - { 424, 427 }, /* Profile 43. */ - { 428, 431 }, /* Profile 44. */ - { 424, 427 }, /* Profile 45. */ - }, - .profile_cnt = 46, - }, -}; -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_flex_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_FID_COUNT, - .info = bcm56890_a0_dna_6_5_34_8_0_rxpmd_flex_field_data, - .profile_bmp_cnt = 2, - .profile_bmp[0] = 0xfffffffc, - .profile_bmp[1] = 0x3fff, - -}; - -static shr_enum_map_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_flex_reason_names[] = { - BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT -}; - -static bcmpkt_flex_reasons_info_t bcm56890_a0_dna_6_5_34_8_0_rxpmd_flex_reasons_info = { - .num_reasons = BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RXPMD_FLEX_REASON_COUNT, - .reason_names = bcm56890_a0_dna_6_5_34_8_0_rxpmd_flex_reason_names, - .reason_encode = bcm56890_a0_dna_6_5_34_8_0_rxpmd_flex_reason_encode, - .reason_decode = bcm56890_a0_dna_6_5_34_8_0_rxpmd_flex_reason_decode, -}; - - -static int32_t bcmpkt_arp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 24, 8); - - return ret; -} - -static int32_t bcmpkt_arp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_arp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_arp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_arp_t_operation_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 16); - - return ret; -} - -static int32_t bcmpkt_arp_t_operation_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_arp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 8); - - return ret; -} - -static int32_t bcmpkt_arp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_arp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_arp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_arp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_arp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_arp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_arp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_arp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_arp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_arp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_arp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_34_8_0_arp_t_fget[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ARP_T_FID_COUNT] = { - bcmpkt_arp_t_hardware_len_get, - bcmpkt_arp_t_hardware_type_get, - bcmpkt_arp_t_operation_get, - bcmpkt_arp_t_prot_addr_len_get, - bcmpkt_arp_t_protocol_type_get, - bcmpkt_arp_t_sender_ha_get, - bcmpkt_arp_t_sender_ip_get, - bcmpkt_arp_t_target_ha_get, - bcmpkt_arp_t_target_ip_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_34_8_0_arp_t_fset[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ARP_T_FID_COUNT] = { - bcmpkt_arp_t_hardware_len_set, - bcmpkt_arp_t_hardware_type_set, - bcmpkt_arp_t_operation_set, - bcmpkt_arp_t_prot_addr_len_set, - bcmpkt_arp_t_protocol_type_set, - bcmpkt_arp_t_sender_ha_set, - bcmpkt_arp_t_sender_ip_set, - bcmpkt_arp_t_target_ha_set, - bcmpkt_arp_t_target_ip_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_34_8_0_arp_t_field_data[] = { - BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_34_8_0_arp_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ARP_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_34_8_0_arp_t_field_data, -}; - - -static int32_t bcmpkt_authen_t_data_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_authen_t_data_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_authen_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_authen_t_next_header_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_authen_t_payload_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_authen_t_payload_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_authen_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_authen_t_reserved_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_authen_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_authen_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_authen_t_spi_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_authen_t_spi_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_34_8_0_authen_t_fget[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_AUTHEN_T_FID_COUNT] = { - bcmpkt_authen_t_data_get, - bcmpkt_authen_t_next_header_get, - bcmpkt_authen_t_payload_len_get, - bcmpkt_authen_t_reserved_get, - bcmpkt_authen_t_seq_num_get, - bcmpkt_authen_t_spi_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_34_8_0_authen_t_fset[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_AUTHEN_T_FID_COUNT] = { - bcmpkt_authen_t_data_set, - bcmpkt_authen_t_next_header_set, - bcmpkt_authen_t_payload_len_set, - bcmpkt_authen_t_reserved_set, - bcmpkt_authen_t_seq_num_set, - bcmpkt_authen_t_spi_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_34_8_0_authen_t_field_data[] = { - BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_34_8_0_authen_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_AUTHEN_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_34_8_0_authen_t_field_data, -}; - - -static int32_t bcmpkt_bfd_t_desmintxintv_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_bfd_t_desmintxintv_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_bfd_t_minechorxintv_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_bfd_t_minechorxintv_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_bfd_t_reqminrxintv_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_bfd_t_reqminrxintv_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_bfd_t_ap_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 18, 1); - - return ret; -} - -static int32_t bcmpkt_bfd_t_ap_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 18, 1, val); - return ret; -} - -static int32_t bcmpkt_bfd_t_bfd_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 8); - - return ret; -} - -static int32_t bcmpkt_bfd_t_bfd_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 8, val); - return ret; -} - -static int32_t bcmpkt_bfd_t_cpi_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 19, 1); - - return ret; -} - -static int32_t bcmpkt_bfd_t_cpi_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 19, 1, val); - return ret; -} - -static int32_t bcmpkt_bfd_t_dem_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 17, 1); - - return ret; -} - -static int32_t bcmpkt_bfd_t_dem_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 17, 1, val); - return ret; -} - -static int32_t bcmpkt_bfd_t_detectmult_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 8, 8); - - return ret; -} - -static int32_t bcmpkt_bfd_t_detectmult_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 8, 8, val); - return ret; -} - -static int32_t bcmpkt_bfd_t_diag_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 5); - - return ret; -} - -static int32_t bcmpkt_bfd_t_diag_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 5, val); - return ret; -} - -static int32_t bcmpkt_bfd_t_fin_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 20, 1); - - return ret; -} - -static int32_t bcmpkt_bfd_t_fin_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 20, 1, val); - return ret; -} - -static int32_t bcmpkt_bfd_t_mpt_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 1); - - return ret; -} - -static int32_t bcmpkt_bfd_t_mpt_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 1, val); - return ret; -} - -static int32_t bcmpkt_bfd_t_mydiscrim_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_bfd_t_mydiscrim_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_bfd_t_poll_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 21, 1); - - return ret; -} - -static int32_t bcmpkt_bfd_t_poll_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 21, 1, val); - return ret; -} - -static int32_t bcmpkt_bfd_t_sta_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 22, 2); - - return ret; -} - -static int32_t bcmpkt_bfd_t_sta_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 22, 2, val); - return ret; -} - -static int32_t bcmpkt_bfd_t_urdiscrim_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_bfd_t_urdiscrim_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_bfd_t_version_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 29, 3); - - return ret; -} - -static int32_t bcmpkt_bfd_t_version_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 29, 3, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_34_8_0_bfd_t_fget[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_BFD_T_FID_COUNT] = { - bcmpkt_bfd_t_ap_get, - bcmpkt_bfd_t_bfd_length_get, - bcmpkt_bfd_t_cpi_get, - bcmpkt_bfd_t_dem_get, - bcmpkt_bfd_t_desmintxintv_get, - bcmpkt_bfd_t_detectmult_get, - bcmpkt_bfd_t_diag_get, - bcmpkt_bfd_t_fin_get, - bcmpkt_bfd_t_minechorxintv_get, - bcmpkt_bfd_t_mpt_get, - bcmpkt_bfd_t_mydiscrim_get, - bcmpkt_bfd_t_poll_get, - bcmpkt_bfd_t_reqminrxintv_get, - bcmpkt_bfd_t_sta_get, - bcmpkt_bfd_t_urdiscrim_get, - bcmpkt_bfd_t_version_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_34_8_0_bfd_t_fset[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_BFD_T_FID_COUNT] = { - bcmpkt_bfd_t_ap_set, - bcmpkt_bfd_t_bfd_length_set, - bcmpkt_bfd_t_cpi_set, - bcmpkt_bfd_t_dem_set, - bcmpkt_bfd_t_desmintxintv_set, - bcmpkt_bfd_t_detectmult_set, - bcmpkt_bfd_t_diag_set, - bcmpkt_bfd_t_fin_set, - bcmpkt_bfd_t_minechorxintv_set, - bcmpkt_bfd_t_mpt_set, - bcmpkt_bfd_t_mydiscrim_set, - bcmpkt_bfd_t_poll_set, - bcmpkt_bfd_t_reqminrxintv_set, - bcmpkt_bfd_t_sta_set, - bcmpkt_bfd_t_urdiscrim_set, - bcmpkt_bfd_t_version_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_34_8_0_bfd_t_field_data[] = { - BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_34_8_0_bfd_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_BFD_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_34_8_0_bfd_t_field_data, -}; - - -static int32_t bcmpkt_cntag_t_rpid_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_cntag_t_rpid_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_cntag_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_cntag_t_tpid_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_34_8_0_cntag_t_fget[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_CNTAG_T_FID_COUNT] = { - bcmpkt_cntag_t_rpid_get, - bcmpkt_cntag_t_tpid_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_34_8_0_cntag_t_fset[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_CNTAG_T_FID_COUNT] = { - bcmpkt_cntag_t_rpid_set, - bcmpkt_cntag_t_tpid_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_34_8_0_cntag_t_field_data[] = { - BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_CNTAG_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_34_8_0_cntag_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_CNTAG_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_34_8_0_cntag_t_field_data, -}; - - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_34_8_0_cpu_composites_0_t_fget[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { - bcmpkt_cpu_composites_0_t_dma_cont0_get, - bcmpkt_cpu_composites_0_t_dma_cont1_get, - bcmpkt_cpu_composites_0_t_dma_cont2_get, - bcmpkt_cpu_composites_0_t_dma_cont3_get, - bcmpkt_cpu_composites_0_t_dma_cont4_get, - bcmpkt_cpu_composites_0_t_dma_cont5_get, - bcmpkt_cpu_composites_0_t_dma_cont6_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_34_8_0_cpu_composites_0_t_fset[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { - bcmpkt_cpu_composites_0_t_dma_cont0_set, - bcmpkt_cpu_composites_0_t_dma_cont1_set, - bcmpkt_cpu_composites_0_t_dma_cont2_set, - bcmpkt_cpu_composites_0_t_dma_cont3_set, - bcmpkt_cpu_composites_0_t_dma_cont4_set, - bcmpkt_cpu_composites_0_t_dma_cont5_set, - bcmpkt_cpu_composites_0_t_dma_cont6_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_34_8_0_cpu_composites_0_t_field_data[] = { - BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_34_8_0_cpu_composites_0_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_34_8_0_cpu_composites_0_t_field_data, -}; - - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_34_8_0_cpu_composites_1_t_fget[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { - bcmpkt_cpu_composites_1_t_dma_cont10_get, - bcmpkt_cpu_composites_1_t_dma_cont11_get, - bcmpkt_cpu_composites_1_t_dma_cont12_get, - bcmpkt_cpu_composites_1_t_dma_cont13_get, - bcmpkt_cpu_composites_1_t_dma_cont14_get, - bcmpkt_cpu_composites_1_t_dma_cont15_get, - bcmpkt_cpu_composites_1_t_dma_cont16_get, - bcmpkt_cpu_composites_1_t_dma_cont17_get, - bcmpkt_cpu_composites_1_t_dma_cont7_get, - bcmpkt_cpu_composites_1_t_dma_cont8_get, - bcmpkt_cpu_composites_1_t_dma_cont9_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_34_8_0_cpu_composites_1_t_fset[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { - bcmpkt_cpu_composites_1_t_dma_cont10_set, - bcmpkt_cpu_composites_1_t_dma_cont11_set, - bcmpkt_cpu_composites_1_t_dma_cont12_set, - bcmpkt_cpu_composites_1_t_dma_cont13_set, - bcmpkt_cpu_composites_1_t_dma_cont14_set, - bcmpkt_cpu_composites_1_t_dma_cont15_set, - bcmpkt_cpu_composites_1_t_dma_cont16_set, - bcmpkt_cpu_composites_1_t_dma_cont17_set, - bcmpkt_cpu_composites_1_t_dma_cont7_set, - bcmpkt_cpu_composites_1_t_dma_cont8_set, - bcmpkt_cpu_composites_1_t_dma_cont9_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_34_8_0_cpu_composites_1_t_field_data[] = { - BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_34_8_0_cpu_composites_1_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_34_8_0_cpu_composites_1_t_field_data, -}; - - -static int32_t bcmpkt_dest_option_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_dest_option_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_dest_option_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_dest_option_t_next_header_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_dest_option_t_option_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_dest_option_t_option_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_34_8_0_dest_option_t_fget[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = { - bcmpkt_dest_option_t_hdr_ext_len_get, - bcmpkt_dest_option_t_next_header_get, - bcmpkt_dest_option_t_option_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_34_8_0_dest_option_t_fset[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = { - bcmpkt_dest_option_t_hdr_ext_len_set, - bcmpkt_dest_option_t_next_header_set, - bcmpkt_dest_option_t_option_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_34_8_0_dest_option_t_field_data[] = { - BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_34_8_0_dest_option_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_DEST_OPTION_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_34_8_0_dest_option_t_field_data, -}; - - -static int32_t bcmpkt_ep_nih_header_t_header_subtype_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 20, 4); - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_header_subtype_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 20, 4, val); - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_header_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 6); - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_header_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 6, val); - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 8, 4); - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 8, 4, val); - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 20, 4); - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 20, 4, val); - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 4); - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 4, val); - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[3], 16, 16); - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[3], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[3], 0, 16); - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[3], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 4); - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 4, val); - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 12, 4); - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 12, 4, val); - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_start_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 30, 2); - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_start_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 30, 2, val); - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_34_8_0_ep_nih_header_t_fget[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = { - bcmpkt_ep_nih_header_t_header_subtype_get, - bcmpkt_ep_nih_header_t_header_type_get, - bcmpkt_ep_nih_header_t_opaque_ctrl_a_get, - bcmpkt_ep_nih_header_t_opaque_ctrl_b_get, - bcmpkt_ep_nih_header_t_opaque_ctrl_c_get, - bcmpkt_ep_nih_header_t_opaque_object_a_get, - bcmpkt_ep_nih_header_t_opaque_object_b_get, - bcmpkt_ep_nih_header_t_opaque_object_c_get, - bcmpkt_ep_nih_header_t_recirc_profile_index_get, - bcmpkt_ep_nih_header_t_reserved_0_get, - bcmpkt_ep_nih_header_t_start_get, - bcmpkt_ep_nih_header_t_timestamp_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_34_8_0_ep_nih_header_t_fset[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = { - bcmpkt_ep_nih_header_t_header_subtype_set, - bcmpkt_ep_nih_header_t_header_type_set, - bcmpkt_ep_nih_header_t_opaque_ctrl_a_set, - bcmpkt_ep_nih_header_t_opaque_ctrl_b_set, - bcmpkt_ep_nih_header_t_opaque_ctrl_c_set, - bcmpkt_ep_nih_header_t_opaque_object_a_set, - bcmpkt_ep_nih_header_t_opaque_object_b_set, - bcmpkt_ep_nih_header_t_opaque_object_c_set, - bcmpkt_ep_nih_header_t_recirc_profile_index_set, - bcmpkt_ep_nih_header_t_reserved_0_set, - bcmpkt_ep_nih_header_t_start_set, - bcmpkt_ep_nih_header_t_timestamp_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_34_8_0_ep_nih_header_t_field_data[] = { - BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_34_8_0_ep_nih_header_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_34_8_0_ep_nih_header_t_field_data, -}; - - -static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 11, 2); - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 11, 2, val); - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 13, 3); - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 13, 3, val); - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 16, 16); - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 0, 16); - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 10); - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 10, val); - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_t_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 10, 1); - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_t_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 10, 1, val); - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 28, 4); - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 28, 4, val); - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 12); - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 12, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_34_8_0_erspan3_fixed_hdr_t_fget[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { - bcmpkt_erspan3_fixed_hdr_t_bso_get, - bcmpkt_erspan3_fixed_hdr_t_cos_get, - bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get, - bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get, - bcmpkt_erspan3_fixed_hdr_t_session_id_get, - bcmpkt_erspan3_fixed_hdr_t_t_get, - bcmpkt_erspan3_fixed_hdr_t_timestamp_get, - bcmpkt_erspan3_fixed_hdr_t_ver_get, - bcmpkt_erspan3_fixed_hdr_t_vlan_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_34_8_0_erspan3_fixed_hdr_t_fset[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { - bcmpkt_erspan3_fixed_hdr_t_bso_set, - bcmpkt_erspan3_fixed_hdr_t_cos_set, - bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set, - bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set, - bcmpkt_erspan3_fixed_hdr_t_session_id_set, - bcmpkt_erspan3_fixed_hdr_t_t_set, - bcmpkt_erspan3_fixed_hdr_t_timestamp_set, - bcmpkt_erspan3_fixed_hdr_t_ver_set, - bcmpkt_erspan3_fixed_hdr_t_vlan_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_34_8_0_erspan3_fixed_hdr_t_field_data[] = { - BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_34_8_0_erspan3_fixed_hdr_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_34_8_0_erspan3_fixed_hdr_t_field_data, -}; - - -static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 26, 6); - - return ret; -} - -static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 26, 6, val); - return ret; -} - -static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 10); - - return ret; -} - -static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 10, val); - return ret; -} - -static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_34_8_0_erspan3_subhdr_5_t_fget[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { - bcmpkt_erspan3_subhdr_5_t_platform_id_get, - bcmpkt_erspan3_subhdr_5_t_port_id_get, - bcmpkt_erspan3_subhdr_5_t_switch_id_get, - bcmpkt_erspan3_subhdr_5_t_timestamp_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_34_8_0_erspan3_subhdr_5_t_fset[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { - bcmpkt_erspan3_subhdr_5_t_platform_id_set, - bcmpkt_erspan3_subhdr_5_t_port_id_set, - bcmpkt_erspan3_subhdr_5_t_switch_id_set, - bcmpkt_erspan3_subhdr_5_t_timestamp_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_34_8_0_erspan3_subhdr_5_t_field_data[] = { - BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_34_8_0_erspan3_subhdr_5_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_34_8_0_erspan3_subhdr_5_t_field_data, -}; - - -static int32_t bcmpkt_esp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 0, 8); - - return ret; -} - -static int32_t bcmpkt_esp_t_next_header_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 0, 8, val); - return ret; -} - -static int32_t bcmpkt_esp_t_pad_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 8, 16); - - return ret; -} - -static int32_t bcmpkt_esp_t_pad_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 8, 16, val); - return ret; -} - -static int32_t bcmpkt_esp_t_pad_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 24, 8); - - return ret; -} - -static int32_t bcmpkt_esp_t_pad_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_esp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_esp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_esp_t_spi_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_esp_t_spi_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_34_8_0_esp_t_fget[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ESP_T_FID_COUNT] = { - bcmpkt_esp_t_next_header_get, - bcmpkt_esp_t_pad_get, - bcmpkt_esp_t_pad_len_get, - bcmpkt_esp_t_seq_num_get, - bcmpkt_esp_t_spi_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_34_8_0_esp_t_fset[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ESP_T_FID_COUNT] = { - bcmpkt_esp_t_next_header_set, - bcmpkt_esp_t_pad_set, - bcmpkt_esp_t_pad_len_set, - bcmpkt_esp_t_seq_num_set, - bcmpkt_esp_t_spi_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_34_8_0_esp_t_field_data[] = { - BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_34_8_0_esp_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ESP_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_34_8_0_esp_t_field_data, -}; - - -static int32_t bcmpkt_ethertype_t_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_ethertype_t_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_34_8_0_ethertype_t_fget[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = { - bcmpkt_ethertype_t_type_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_34_8_0_ethertype_t_fset[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = { - bcmpkt_ethertype_t_type_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_34_8_0_ethertype_t_field_data[] = { - BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_34_8_0_ethertype_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ETHERTYPE_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_34_8_0_ethertype_t_field_data, -}; - - -static int32_t bcmpkt_frag_t_frag_info_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_frag_t_frag_info_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_frag_t_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_frag_t_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_frag_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_frag_t_next_header_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_frag_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_frag_t_reserved_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_34_8_0_frag_t_fget[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_FRAG_T_FID_COUNT] = { - bcmpkt_frag_t_frag_info_get, - bcmpkt_frag_t_id_get, - bcmpkt_frag_t_next_header_get, - bcmpkt_frag_t_reserved_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_34_8_0_frag_t_fset[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_FRAG_T_FID_COUNT] = { - bcmpkt_frag_t_frag_info_set, - bcmpkt_frag_t_id_set, - bcmpkt_frag_t_next_header_set, - bcmpkt_frag_t_reserved_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_34_8_0_frag_t_field_data[] = { - BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_34_8_0_frag_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_FRAG_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_34_8_0_frag_t_field_data, -}; - - -static int32_t bcmpkt_gbp_ethernet_shim_t_ethertype_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_gbp_ethernet_shim_t_ethertype_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_gbp_ethernet_shim_t_flags_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 20, 4); - - return ret; -} - -static int32_t bcmpkt_gbp_ethernet_shim_t_flags_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 20, 4, val); - return ret; -} - -static int32_t bcmpkt_gbp_ethernet_shim_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 24, 8); - - return ret; -} - -static int32_t bcmpkt_gbp_ethernet_shim_t_reserved_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_gbp_ethernet_shim_t_sid_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 16); - - return ret; -} - -static int32_t bcmpkt_gbp_ethernet_shim_t_sid_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_gbp_ethernet_shim_t_subtype_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_gbp_ethernet_shim_t_subtype_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_gbp_ethernet_shim_t_ver_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 4); - - return ret; -} - -static int32_t bcmpkt_gbp_ethernet_shim_t_ver_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 4, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_34_8_0_gbp_ethernet_shim_t_fget[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT] = { - bcmpkt_gbp_ethernet_shim_t_ethertype_get, - bcmpkt_gbp_ethernet_shim_t_flags_get, - bcmpkt_gbp_ethernet_shim_t_reserved_get, - bcmpkt_gbp_ethernet_shim_t_sid_get, - bcmpkt_gbp_ethernet_shim_t_subtype_get, - bcmpkt_gbp_ethernet_shim_t_ver_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_34_8_0_gbp_ethernet_shim_t_fset[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT] = { - bcmpkt_gbp_ethernet_shim_t_ethertype_set, - bcmpkt_gbp_ethernet_shim_t_flags_set, - bcmpkt_gbp_ethernet_shim_t_reserved_set, - bcmpkt_gbp_ethernet_shim_t_sid_set, - bcmpkt_gbp_ethernet_shim_t_subtype_set, - bcmpkt_gbp_ethernet_shim_t_ver_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_34_8_0_gbp_ethernet_shim_t_field_data[] = { - BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GBP_ETHERNET_SHIM_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_34_8_0_gbp_ethernet_shim_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GBP_ETHERNET_SHIM_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_34_8_0_gbp_ethernet_shim_t_field_data, -}; - - -static int32_t bcmpkt_generic_loopback_t_destination_obj_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 16); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_destination_obj_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_destination_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 24, 4); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_destination_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 24, 4, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_entropy_obj_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[3], 16, 16); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_entropy_obj_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[3], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_flags_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 4); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_flags_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 4, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_header_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 20, 4); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_header_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 20, 4, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_input_priority_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 12, 4); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_input_priority_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 12, 4, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_interface_ctrl_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 4, 4); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_interface_ctrl_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 4, 4, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_interface_obj_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 0, 16); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_interface_obj_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 4); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 4, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 28, 4); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 28, 4, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_qos_obj_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 8); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_qos_obj_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_reserved_1_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 8, 4); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_reserved_1_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 8, 4, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_source_system_port_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 16, 16); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_source_system_port_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_src_subport_num_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[3], 0, 16); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_src_subport_num_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[3], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_start_byte_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_start_byte_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_34_8_0_generic_loopback_t_fget[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { - bcmpkt_generic_loopback_t_destination_obj_get, - bcmpkt_generic_loopback_t_destination_type_get, - bcmpkt_generic_loopback_t_entropy_obj_get, - bcmpkt_generic_loopback_t_flags_get, - bcmpkt_generic_loopback_t_header_type_get, - bcmpkt_generic_loopback_t_input_priority_get, - bcmpkt_generic_loopback_t_interface_ctrl_get, - bcmpkt_generic_loopback_t_interface_obj_get, - bcmpkt_generic_loopback_t_processing_ctrl_0_get, - bcmpkt_generic_loopback_t_processing_ctrl_1_get, - bcmpkt_generic_loopback_t_qos_obj_get, - bcmpkt_generic_loopback_t_reserved_1_get, - bcmpkt_generic_loopback_t_source_system_port_get, - bcmpkt_generic_loopback_t_src_subport_num_get, - bcmpkt_generic_loopback_t_start_byte_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_34_8_0_generic_loopback_t_fset[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { - bcmpkt_generic_loopback_t_destination_obj_set, - bcmpkt_generic_loopback_t_destination_type_set, - bcmpkt_generic_loopback_t_entropy_obj_set, - bcmpkt_generic_loopback_t_flags_set, - bcmpkt_generic_loopback_t_header_type_set, - bcmpkt_generic_loopback_t_input_priority_set, - bcmpkt_generic_loopback_t_interface_ctrl_set, - bcmpkt_generic_loopback_t_interface_obj_set, - bcmpkt_generic_loopback_t_processing_ctrl_0_set, - bcmpkt_generic_loopback_t_processing_ctrl_1_set, - bcmpkt_generic_loopback_t_qos_obj_set, - bcmpkt_generic_loopback_t_reserved_1_set, - bcmpkt_generic_loopback_t_source_system_port_set, - bcmpkt_generic_loopback_t_src_subport_num_set, - bcmpkt_generic_loopback_t_start_byte_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_34_8_0_generic_loopback_t_field_data[] = { - BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_34_8_0_generic_loopback_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_34_8_0_generic_loopback_t_field_data, -}; - - -static int32_t bcmpkt_gpe_t_flags_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_gpe_t_flags_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_gpe_t_next_protocol_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 8); - - return ret; -} - -static int32_t bcmpkt_gpe_t_next_protocol_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 8, val); - return ret; -} - -static int32_t bcmpkt_gpe_t_reserved0_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 8, 16); - - return ret; -} - -static int32_t bcmpkt_gpe_t_reserved0_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 8, 16, val); - return ret; -} - -static int32_t bcmpkt_gpe_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 8); - - return ret; -} - -static int32_t bcmpkt_gpe_t_reserved1_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 8, val); - return ret; -} - -static int32_t bcmpkt_gpe_t_vni_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 8, 24); - - return ret; -} - -static int32_t bcmpkt_gpe_t_vni_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 8, 24, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_34_8_0_gpe_t_fget[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GPE_T_FID_COUNT] = { - bcmpkt_gpe_t_flags_get, - bcmpkt_gpe_t_next_protocol_get, - bcmpkt_gpe_t_reserved0_get, - bcmpkt_gpe_t_reserved1_get, - bcmpkt_gpe_t_vni_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_34_8_0_gpe_t_fset[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GPE_T_FID_COUNT] = { - bcmpkt_gpe_t_flags_set, - bcmpkt_gpe_t_next_protocol_set, - bcmpkt_gpe_t_reserved0_set, - bcmpkt_gpe_t_reserved1_set, - bcmpkt_gpe_t_vni_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_34_8_0_gpe_t_field_data[] = { - BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_34_8_0_gpe_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GPE_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_34_8_0_gpe_t_field_data, -}; - - -static int32_t bcmpkt_gre_chksum_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_gre_chksum_t_checksum_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_gre_chksum_t_offset_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_gre_chksum_t_offset_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_34_8_0_gre_chksum_t_fget[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = { - bcmpkt_gre_chksum_t_checksum_get, - bcmpkt_gre_chksum_t_offset_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_34_8_0_gre_chksum_t_fset[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = { - bcmpkt_gre_chksum_t_checksum_set, - bcmpkt_gre_chksum_t_offset_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_34_8_0_gre_chksum_t_field_data[] = { - BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_34_8_0_gre_chksum_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_34_8_0_gre_chksum_t_field_data, -}; - - -static int32_t bcmpkt_gre_key_t_vn_id_lower_entropy_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_gre_key_t_vn_id_lower_entropy_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_gre_key_t_vn_id_upper_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_gre_key_t_vn_id_upper_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_34_8_0_gre_key_t_fget[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GRE_KEY_T_FID_COUNT] = { - bcmpkt_gre_key_t_vn_id_lower_entropy_get, - bcmpkt_gre_key_t_vn_id_upper_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_34_8_0_gre_key_t_fset[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GRE_KEY_T_FID_COUNT] = { - bcmpkt_gre_key_t_vn_id_lower_entropy_set, - bcmpkt_gre_key_t_vn_id_upper_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_34_8_0_gre_key_t_field_data[] = { - BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_34_8_0_gre_key_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GRE_KEY_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_34_8_0_gre_key_t_field_data, -}; - - -static int32_t bcmpkt_gre_rout_t_routing_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_gre_rout_t_routing_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_34_8_0_gre_rout_t_fget[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = { - bcmpkt_gre_rout_t_routing_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_34_8_0_gre_rout_t_fset[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = { - bcmpkt_gre_rout_t_routing_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_34_8_0_gre_rout_t_field_data[] = { - BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_34_8_0_gre_rout_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GRE_ROUT_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_34_8_0_gre_rout_t_field_data, -}; - - -static int32_t bcmpkt_gre_seq_t_sequence_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_gre_seq_t_sequence_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_34_8_0_gre_seq_t_fget[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = { - bcmpkt_gre_seq_t_sequence_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_34_8_0_gre_seq_t_fset[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = { - bcmpkt_gre_seq_t_sequence_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_34_8_0_gre_seq_t_field_data[] = { - BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_34_8_0_gre_seq_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GRE_SEQ_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_34_8_0_gre_seq_t_field_data, -}; - - -static int32_t bcmpkt_gre_t_c_r_k_s_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 28, 4); - - return ret; -} - -static int32_t bcmpkt_gre_t_c_r_k_s_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 28, 4, val); - return ret; -} - -static int32_t bcmpkt_gre_t_protocol_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_gre_t_protocol_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_gre_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 19, 9); - - return ret; -} - -static int32_t bcmpkt_gre_t_reserved_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 19, 9, val); - return ret; -} - -static int32_t bcmpkt_gre_t_version_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 3); - - return ret; -} - -static int32_t bcmpkt_gre_t_version_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 3, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_34_8_0_gre_t_fget[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GRE_T_FID_COUNT] = { - bcmpkt_gre_t_c_r_k_s_get, - bcmpkt_gre_t_protocol_get, - bcmpkt_gre_t_reserved_get, - bcmpkt_gre_t_version_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_34_8_0_gre_t_fset[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GRE_T_FID_COUNT] = { - bcmpkt_gre_t_c_r_k_s_set, - bcmpkt_gre_t_protocol_set, - bcmpkt_gre_t_reserved_set, - bcmpkt_gre_t_version_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_34_8_0_gre_t_field_data[] = { - BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_34_8_0_gre_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_GRE_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_34_8_0_gre_t_field_data, -}; - - -static int32_t bcmpkt_hg3_base_t_cn_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 4, 2); - - return ret; -} - -static int32_t bcmpkt_hg3_base_t_cn_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 4, 2, val); - return ret; -} - -static int32_t bcmpkt_hg3_base_t_cng_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 6, 2); - - return ret; -} - -static int32_t bcmpkt_hg3_base_t_cng_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 6, 2, val); - return ret; -} - -static int32_t bcmpkt_hg3_base_t_entropy_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 8, 8); - - return ret; -} - -static int32_t bcmpkt_hg3_base_t_entropy_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 8, 8, val); - return ret; -} - -static int32_t bcmpkt_hg3_base_t_ext_hdr_present_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 18, 2); - - return ret; -} - -static int32_t bcmpkt_hg3_base_t_ext_hdr_present_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 18, 2, val); - return ret; -} - -static int32_t bcmpkt_hg3_base_t_hg3_reserved_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 17, 1); - - return ret; -} - -static int32_t bcmpkt_hg3_base_t_hg3_reserved_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 17, 1, val); - return ret; -} - -static int32_t bcmpkt_hg3_base_t_l3_routed_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 31, 1); - - return ret; -} - -static int32_t bcmpkt_hg3_base_t_l3_routed_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 31, 1, val); - return ret; -} - -static int32_t bcmpkt_hg3_base_t_mirror_copy_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 1); - - return ret; -} - -static int32_t bcmpkt_hg3_base_t_mirror_copy_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 1, val); - return ret; -} - -static int32_t bcmpkt_hg3_base_t_reserved_etype_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 22, 10); - - return ret; -} - -static int32_t bcmpkt_hg3_base_t_reserved_etype_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 22, 10, val); - return ret; -} - -static int32_t bcmpkt_hg3_base_t_system_destination_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 15); - - return ret; -} - -static int32_t bcmpkt_hg3_base_t_system_destination_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 15, val); - return ret; -} - -static int32_t bcmpkt_hg3_base_t_system_destination_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 15, 1); - - return ret; -} - -static int32_t bcmpkt_hg3_base_t_system_destination_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 15, 1, val); - return ret; -} - -static int32_t bcmpkt_hg3_base_t_system_source_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 15); - - return ret; -} - -static int32_t bcmpkt_hg3_base_t_system_source_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 15, val); - return ret; -} - -static int32_t bcmpkt_hg3_base_t_tc_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 4); - - return ret; -} - -static int32_t bcmpkt_hg3_base_t_tc_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 4, val); - return ret; -} - -static int32_t bcmpkt_hg3_base_t_version_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 20, 2); - - return ret; -} - -static int32_t bcmpkt_hg3_base_t_version_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 20, 2, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_34_8_0_hg3_base_t_fget[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_HG3_BASE_T_FID_COUNT] = { - bcmpkt_hg3_base_t_cn_get, - bcmpkt_hg3_base_t_cng_get, - bcmpkt_hg3_base_t_entropy_get, - bcmpkt_hg3_base_t_ext_hdr_present_get, - bcmpkt_hg3_base_t_hg3_reserved_get, - bcmpkt_hg3_base_t_l3_routed_get, - bcmpkt_hg3_base_t_mirror_copy_get, - bcmpkt_hg3_base_t_reserved_etype_get, - bcmpkt_hg3_base_t_system_destination_get, - bcmpkt_hg3_base_t_system_destination_type_get, - bcmpkt_hg3_base_t_system_source_get, - bcmpkt_hg3_base_t_tc_get, - bcmpkt_hg3_base_t_version_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_34_8_0_hg3_base_t_fset[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_HG3_BASE_T_FID_COUNT] = { - bcmpkt_hg3_base_t_cn_set, - bcmpkt_hg3_base_t_cng_set, - bcmpkt_hg3_base_t_entropy_set, - bcmpkt_hg3_base_t_ext_hdr_present_set, - bcmpkt_hg3_base_t_hg3_reserved_set, - bcmpkt_hg3_base_t_l3_routed_set, - bcmpkt_hg3_base_t_mirror_copy_set, - bcmpkt_hg3_base_t_reserved_etype_set, - bcmpkt_hg3_base_t_system_destination_set, - bcmpkt_hg3_base_t_system_destination_type_set, - bcmpkt_hg3_base_t_system_source_set, - bcmpkt_hg3_base_t_tc_set, - bcmpkt_hg3_base_t_version_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_34_8_0_hg3_base_t_field_data[] = { - BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_HG3_BASE_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_34_8_0_hg3_base_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_HG3_BASE_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_34_8_0_hg3_base_t_field_data, -}; - - -static int32_t bcmpkt_hg3_extension_0_t_class_id_lsb_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_hg3_extension_0_t_class_id_lsb_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_hg3_extension_0_t_class_id_msb_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 2); - - return ret; -} - -static int32_t bcmpkt_hg3_extension_0_t_class_id_msb_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 2, val); - return ret; -} - -static int32_t bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 16); - - return ret; -} - -static int32_t bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_hg3_extension_0_t_flags_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 26, 6); - - return ret; -} - -static int32_t bcmpkt_hg3_extension_0_t_flags_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 26, 6, val); - return ret; -} - -static int32_t bcmpkt_hg3_extension_0_t_forwarding_domain_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_hg3_extension_0_t_forwarding_domain_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_hg3_extension_0_t_svp_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 16); - - return ret; -} - -static int32_t bcmpkt_hg3_extension_0_t_svp_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_34_8_0_hg3_extension_0_t_fget[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT] = { - bcmpkt_hg3_extension_0_t_class_id_lsb_get, - bcmpkt_hg3_extension_0_t_class_id_msb_get, - bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_get, - bcmpkt_hg3_extension_0_t_flags_get, - bcmpkt_hg3_extension_0_t_forwarding_domain_get, - bcmpkt_hg3_extension_0_t_svp_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_34_8_0_hg3_extension_0_t_fset[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT] = { - bcmpkt_hg3_extension_0_t_class_id_lsb_set, - bcmpkt_hg3_extension_0_t_class_id_msb_set, - bcmpkt_hg3_extension_0_t_dvp_or_l3_iif_set, - bcmpkt_hg3_extension_0_t_flags_set, - bcmpkt_hg3_extension_0_t_forwarding_domain_set, - bcmpkt_hg3_extension_0_t_svp_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_34_8_0_hg3_extension_0_t_field_data[] = { - BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_HG3_EXTENSION_0_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_34_8_0_hg3_extension_0_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_HG3_EXTENSION_0_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_34_8_0_hg3_extension_0_t_field_data, -}; - - -static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_hop_by_hop_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_hop_by_hop_t_next_header_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_hop_by_hop_t_option_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_hop_by_hop_t_option_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_34_8_0_hop_by_hop_t_fget[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = { - bcmpkt_hop_by_hop_t_hdr_ext_len_get, - bcmpkt_hop_by_hop_t_next_header_get, - bcmpkt_hop_by_hop_t_option_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_34_8_0_hop_by_hop_t_fset[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = { - bcmpkt_hop_by_hop_t_hdr_ext_len_set, - bcmpkt_hop_by_hop_t_next_header_set, - bcmpkt_hop_by_hop_t_option_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_34_8_0_hop_by_hop_t_field_data[] = { - BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_34_8_0_hop_by_hop_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_34_8_0_hop_by_hop_t_field_data, -}; - - -static int32_t bcmpkt_icmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_icmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_icmp_t_code_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_icmp_t_code_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_icmp_t_icmp_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_icmp_t_icmp_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_34_8_0_icmp_t_fget[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ICMP_T_FID_COUNT] = { - bcmpkt_icmp_t_checksum_get, - bcmpkt_icmp_t_code_get, - bcmpkt_icmp_t_icmp_type_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_34_8_0_icmp_t_fset[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ICMP_T_FID_COUNT] = { - bcmpkt_icmp_t_checksum_set, - bcmpkt_icmp_t_code_set, - bcmpkt_icmp_t_icmp_type_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_34_8_0_icmp_t_field_data[] = { - BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_34_8_0_icmp_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ICMP_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_34_8_0_icmp_t_field_data, -}; - - -static int32_t bcmpkt_ifa_header_t_flags_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 8, 8); - - return ret; -} - -static int32_t bcmpkt_ifa_header_t_flags_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 8, 8, val); - return ret; -} - -static int32_t bcmpkt_ifa_header_t_gns_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 4); - - return ret; -} - -static int32_t bcmpkt_ifa_header_t_gns_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 4, val); - return ret; -} - -static int32_t bcmpkt_ifa_header_t_max_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 8); - - return ret; -} - -static int32_t bcmpkt_ifa_header_t_max_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 8, val); - return ret; -} - -static int32_t bcmpkt_ifa_header_t_next_hdr_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_ifa_header_t_next_hdr_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_ifa_header_t_ver_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 28, 4); - - return ret; -} - -static int32_t bcmpkt_ifa_header_t_ver_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 28, 4, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_34_8_0_ifa_header_t_fget[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = { - bcmpkt_ifa_header_t_flags_get, - bcmpkt_ifa_header_t_gns_get, - bcmpkt_ifa_header_t_max_length_get, - bcmpkt_ifa_header_t_next_hdr_get, - bcmpkt_ifa_header_t_ver_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_34_8_0_ifa_header_t_fset[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = { - bcmpkt_ifa_header_t_flags_set, - bcmpkt_ifa_header_t_gns_set, - bcmpkt_ifa_header_t_max_length_set, - bcmpkt_ifa_header_t_next_hdr_set, - bcmpkt_ifa_header_t_ver_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_34_8_0_ifa_header_t_field_data[] = { - BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_34_8_0_ifa_header_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IFA_HEADER_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_34_8_0_ifa_header_t_field_data, -}; - - -static int32_t bcmpkt_ifa_metadata_a_t_cn_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 26, 2); - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_a_t_cn_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 26, 2, val); - return ret; -} - -static int32_t bcmpkt_ifa_metadata_a_t_fwd_hdr_ttl_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 8); - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_a_t_fwd_hdr_ttl_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 8, val); - return ret; -} - -static int32_t bcmpkt_ifa_metadata_a_t_lns_device_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 8, 24); - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_a_t_lns_device_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 8, 24, val); - return ret; -} - -static int32_t bcmpkt_ifa_metadata_a_t_port_speed_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 28, 4); - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_a_t_port_speed_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 28, 4, val); - return ret; -} - -static int32_t bcmpkt_ifa_metadata_a_t_queue_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 20, 6); - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_a_t_queue_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 20, 6, val); - return ret; -} - -static int32_t bcmpkt_ifa_metadata_a_t_rx_timestamp_sec_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 20); - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_a_t_rx_timestamp_sec_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 20, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_34_8_0_ifa_metadata_a_t_fget[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT] = { - bcmpkt_ifa_metadata_a_t_cn_get, - bcmpkt_ifa_metadata_a_t_fwd_hdr_ttl_get, - bcmpkt_ifa_metadata_a_t_lns_device_id_get, - bcmpkt_ifa_metadata_a_t_port_speed_get, - bcmpkt_ifa_metadata_a_t_queue_id_get, - bcmpkt_ifa_metadata_a_t_rx_timestamp_sec_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_34_8_0_ifa_metadata_a_t_fset[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT] = { - bcmpkt_ifa_metadata_a_t_cn_set, - bcmpkt_ifa_metadata_a_t_fwd_hdr_ttl_set, - bcmpkt_ifa_metadata_a_t_lns_device_id_set, - bcmpkt_ifa_metadata_a_t_port_speed_set, - bcmpkt_ifa_metadata_a_t_queue_id_set, - bcmpkt_ifa_metadata_a_t_rx_timestamp_sec_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_34_8_0_ifa_metadata_a_t_field_data[] = { - BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IFA_METADATA_A_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_34_8_0_ifa_metadata_a_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_34_8_0_ifa_metadata_a_t_field_data, -}; - - -static int32_t bcmpkt_ifa_metadata_b_t_egress_port_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_b_t_egress_port_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_ifa_metadata_b_t_ingress_port_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_b_t_ingress_port_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_ifa_metadata_b_t_mmu_stat_0_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_b_t_mmu_stat_0_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_b_t_mmu_stat_1_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_b_t_mmu_stat_1_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_b_t_residence_time_nanosec_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_b_t_residence_time_nanosec_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_b_t_rx_timestamp_nanosec_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_b_t_rx_timestamp_nanosec_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_b_t_tx_queue_byte_count_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_b_t_tx_queue_byte_count_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_34_8_0_ifa_metadata_b_t_fget[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT] = { - bcmpkt_ifa_metadata_b_t_egress_port_id_get, - bcmpkt_ifa_metadata_b_t_ingress_port_id_get, - bcmpkt_ifa_metadata_b_t_mmu_stat_0_get, - bcmpkt_ifa_metadata_b_t_mmu_stat_1_get, - bcmpkt_ifa_metadata_b_t_residence_time_nanosec_get, - bcmpkt_ifa_metadata_b_t_rx_timestamp_nanosec_get, - bcmpkt_ifa_metadata_b_t_tx_queue_byte_count_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_34_8_0_ifa_metadata_b_t_fset[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT] = { - bcmpkt_ifa_metadata_b_t_egress_port_id_set, - bcmpkt_ifa_metadata_b_t_ingress_port_id_set, - bcmpkt_ifa_metadata_b_t_mmu_stat_0_set, - bcmpkt_ifa_metadata_b_t_mmu_stat_1_set, - bcmpkt_ifa_metadata_b_t_residence_time_nanosec_set, - bcmpkt_ifa_metadata_b_t_rx_timestamp_nanosec_set, - bcmpkt_ifa_metadata_b_t_tx_queue_byte_count_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_34_8_0_ifa_metadata_b_t_field_data[] = { - BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IFA_METADATA_B_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_34_8_0_ifa_metadata_b_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_34_8_0_ifa_metadata_b_t_field_data, -}; - - -static int32_t bcmpkt_ifa_metadata_base_t_action_vector_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_base_t_action_vector_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_ifa_metadata_base_t_hop_limit_current_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_base_t_hop_limit_current_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_ifa_metadata_base_t_request_vector_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_base_t_request_vector_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_34_8_0_ifa_metadata_base_t_fget[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT] = { - bcmpkt_ifa_metadata_base_t_action_vector_get, - bcmpkt_ifa_metadata_base_t_hop_limit_current_length_get, - bcmpkt_ifa_metadata_base_t_request_vector_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_34_8_0_ifa_metadata_base_t_fset[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT] = { - bcmpkt_ifa_metadata_base_t_action_vector_set, - bcmpkt_ifa_metadata_base_t_hop_limit_current_length_set, - bcmpkt_ifa_metadata_base_t_request_vector_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_34_8_0_ifa_metadata_base_t_field_data[] = { - BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IFA_METADATA_BASE_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_34_8_0_ifa_metadata_base_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_34_8_0_ifa_metadata_base_t_field_data, -}; - - -static int32_t bcmpkt_igmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_igmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_igmp_t_group_address_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_igmp_t_group_address_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_igmp_t_igmp_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_igmp_t_igmp_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_igmp_t_max_resp_time_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_igmp_t_max_resp_time_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_34_8_0_igmp_t_fget[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IGMP_T_FID_COUNT] = { - bcmpkt_igmp_t_checksum_get, - bcmpkt_igmp_t_group_address_get, - bcmpkt_igmp_t_igmp_type_get, - bcmpkt_igmp_t_max_resp_time_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_34_8_0_igmp_t_fset[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IGMP_T_FID_COUNT] = { - bcmpkt_igmp_t_checksum_set, - bcmpkt_igmp_t_group_address_set, - bcmpkt_igmp_t_igmp_type_set, - bcmpkt_igmp_t_max_resp_time_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_34_8_0_igmp_t_field_data[] = { - BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_34_8_0_igmp_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IGMP_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_34_8_0_igmp_t_field_data, -}; - - -static int32_t bcmpkt_ioam_e2e_t_ioam_e2e_data_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ioam_e2e_t_ioam_e2e_data_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ioam_e2e_t_ioam_e2e_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 16); - - return ret; -} - -static int32_t bcmpkt_ioam_e2e_t_ioam_e2e_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_ioam_e2e_t_ioam_hdr_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_ioam_e2e_t_ioam_hdr_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_ioam_e2e_t_namespace_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 16); - - return ret; -} - -static int32_t bcmpkt_ioam_e2e_t_namespace_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_ioam_e2e_t_next_protocol_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 8); - - return ret; -} - -static int32_t bcmpkt_ioam_e2e_t_next_protocol_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 8, val); - return ret; -} - -static int32_t bcmpkt_ioam_e2e_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 8, 8); - - return ret; -} - -static int32_t bcmpkt_ioam_e2e_t_reserved_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 8, 8, val); - return ret; -} - -static int32_t bcmpkt_ioam_e2e_t_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_ioam_e2e_t_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_34_8_0_ioam_e2e_t_fget[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IOAM_E2E_T_FID_COUNT] = { - bcmpkt_ioam_e2e_t_ioam_e2e_data_get, - bcmpkt_ioam_e2e_t_ioam_e2e_type_get, - bcmpkt_ioam_e2e_t_ioam_hdr_len_get, - bcmpkt_ioam_e2e_t_namespace_id_get, - bcmpkt_ioam_e2e_t_next_protocol_get, - bcmpkt_ioam_e2e_t_reserved_get, - bcmpkt_ioam_e2e_t_type_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_34_8_0_ioam_e2e_t_fset[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IOAM_E2E_T_FID_COUNT] = { - bcmpkt_ioam_e2e_t_ioam_e2e_data_set, - bcmpkt_ioam_e2e_t_ioam_e2e_type_set, - bcmpkt_ioam_e2e_t_ioam_hdr_len_set, - bcmpkt_ioam_e2e_t_namespace_id_set, - bcmpkt_ioam_e2e_t_next_protocol_set, - bcmpkt_ioam_e2e_t_reserved_set, - bcmpkt_ioam_e2e_t_type_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_34_8_0_ioam_e2e_t_field_data[] = { - BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IOAM_E2E_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_34_8_0_ioam_e2e_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IOAM_E2E_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_34_8_0_ioam_e2e_t_field_data, -}; - - -static int32_t bcmpkt_ipfix_t_export_time_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipfix_t_export_time_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipfix_t_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_ipfix_t_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_ipfix_t_obs_domain_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipfix_t_obs_domain_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipfix_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipfix_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipfix_t_version_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_ipfix_t_version_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_34_8_0_ipfix_t_fget[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IPFIX_T_FID_COUNT] = { - bcmpkt_ipfix_t_export_time_get, - bcmpkt_ipfix_t_length_get, - bcmpkt_ipfix_t_obs_domain_id_get, - bcmpkt_ipfix_t_sequence_num_get, - bcmpkt_ipfix_t_version_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_34_8_0_ipfix_t_fset[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IPFIX_T_FID_COUNT] = { - bcmpkt_ipfix_t_export_time_set, - bcmpkt_ipfix_t_length_set, - bcmpkt_ipfix_t_obs_domain_id_set, - bcmpkt_ipfix_t_sequence_num_set, - bcmpkt_ipfix_t_version_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_34_8_0_ipfix_t_field_data[] = { - BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_34_8_0_ipfix_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IPFIX_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_34_8_0_ipfix_t_field_data, -}; - - -static int32_t bcmpkt_ipv4_t_da_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv4_t_da_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv4_t_flags_frag_offset_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 16); - - return ret; -} - -static int32_t bcmpkt_ipv4_t_flags_frag_offset_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_ipv4_t_hdr_checksum_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 0, 16); - - return ret; -} - -static int32_t bcmpkt_ipv4_t_hdr_checksum_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_ipv4_t_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 16); - - return ret; -} - -static int32_t bcmpkt_ipv4_t_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_ipv4_t_option_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv4_t_option_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv4_t_protocol_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 16, 8); - - return ret; -} - -static int32_t bcmpkt_ipv4_t_protocol_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_ipv4_t_sa_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv4_t_sa_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv4_t_tos_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_ipv4_t_tos_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_ipv4_t_total_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_ipv4_t_total_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_ipv4_t_ttl_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 24, 8); - - return ret; -} - -static int32_t bcmpkt_ipv4_t_ttl_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_ipv4_t_version_hdr_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_ipv4_t_version_hdr_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_34_8_0_ipv4_t_fget[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IPV4_T_FID_COUNT] = { - bcmpkt_ipv4_t_da_get, - bcmpkt_ipv4_t_flags_frag_offset_get, - bcmpkt_ipv4_t_hdr_checksum_get, - bcmpkt_ipv4_t_id_get, - bcmpkt_ipv4_t_option_get, - bcmpkt_ipv4_t_protocol_get, - bcmpkt_ipv4_t_sa_get, - bcmpkt_ipv4_t_tos_get, - bcmpkt_ipv4_t_total_length_get, - bcmpkt_ipv4_t_ttl_get, - bcmpkt_ipv4_t_version_hdr_len_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_34_8_0_ipv4_t_fset[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IPV4_T_FID_COUNT] = { - bcmpkt_ipv4_t_da_set, - bcmpkt_ipv4_t_flags_frag_offset_set, - bcmpkt_ipv4_t_hdr_checksum_set, - bcmpkt_ipv4_t_id_set, - bcmpkt_ipv4_t_option_set, - bcmpkt_ipv4_t_protocol_set, - bcmpkt_ipv4_t_sa_set, - bcmpkt_ipv4_t_tos_set, - bcmpkt_ipv4_t_total_length_set, - bcmpkt_ipv4_t_ttl_set, - bcmpkt_ipv4_t_version_hdr_len_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_34_8_0_ipv4_t_field_data[] = { - BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_34_8_0_ipv4_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IPV4_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_34_8_0_ipv4_t_field_data, -}; - - -static int32_t bcmpkt_ipv6_t_da_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv6_t_da_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv6_t_flow_label_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 20); - - return ret; -} - -static int32_t bcmpkt_ipv6_t_flow_label_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 20, val); - return ret; -} - -static int32_t bcmpkt_ipv6_t_hop_limit_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 8); - - return ret; -} - -static int32_t bcmpkt_ipv6_t_hop_limit_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 8, val); - return ret; -} - -static int32_t bcmpkt_ipv6_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 8, 8); - - return ret; -} - -static int32_t bcmpkt_ipv6_t_next_header_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 8, 8, val); - return ret; -} - -static int32_t bcmpkt_ipv6_t_payload_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 16); - - return ret; -} - -static int32_t bcmpkt_ipv6_t_payload_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_ipv6_t_sa_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv6_t_sa_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv6_t_traffic_class_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 20, 8); - - return ret; -} - -static int32_t bcmpkt_ipv6_t_traffic_class_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 20, 8, val); - return ret; -} - -static int32_t bcmpkt_ipv6_t_version_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 28, 4); - - return ret; -} - -static int32_t bcmpkt_ipv6_t_version_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 28, 4, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_34_8_0_ipv6_t_fget[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IPV6_T_FID_COUNT] = { - bcmpkt_ipv6_t_da_get, - bcmpkt_ipv6_t_flow_label_get, - bcmpkt_ipv6_t_hop_limit_get, - bcmpkt_ipv6_t_next_header_get, - bcmpkt_ipv6_t_payload_length_get, - bcmpkt_ipv6_t_sa_get, - bcmpkt_ipv6_t_traffic_class_get, - bcmpkt_ipv6_t_version_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_34_8_0_ipv6_t_fset[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IPV6_T_FID_COUNT] = { - bcmpkt_ipv6_t_da_set, - bcmpkt_ipv6_t_flow_label_set, - bcmpkt_ipv6_t_hop_limit_set, - bcmpkt_ipv6_t_next_header_set, - bcmpkt_ipv6_t_payload_length_set, - bcmpkt_ipv6_t_sa_set, - bcmpkt_ipv6_t_traffic_class_set, - bcmpkt_ipv6_t_version_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_34_8_0_ipv6_t_field_data[] = { - BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_34_8_0_ipv6_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_IPV6_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_34_8_0_ipv6_t_field_data, -}; - - -static int32_t bcmpkt_l2_t_macda_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_l2_t_macda_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_l2_t_macsa_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_l2_t_macsa_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_34_8_0_l2_t_fget[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_L2_T_FID_COUNT] = { - bcmpkt_l2_t_macda_get, - bcmpkt_l2_t_macsa_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_34_8_0_l2_t_fset[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_L2_T_FID_COUNT] = { - bcmpkt_l2_t_macda_set, - bcmpkt_l2_t_macsa_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_34_8_0_l2_t_field_data[] = { - BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_34_8_0_l2_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_L2_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_34_8_0_l2_t_field_data, -}; - - -static int32_t bcmpkt_mac_in_mac_t_flags_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 4); - - return ret; -} - -static int32_t bcmpkt_mac_in_mac_t_flags_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 4, val); - return ret; -} - -static int32_t bcmpkt_mac_in_mac_t_isid_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 24); - - return ret; -} - -static int32_t bcmpkt_mac_in_mac_t_isid_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 24, val); - return ret; -} - -static int32_t bcmpkt_mac_in_mac_t_pcp_de_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 28, 4); - - return ret; -} - -static int32_t bcmpkt_mac_in_mac_t_pcp_de_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 28, 4, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_34_8_0_mac_in_mac_t_fget[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MAC_IN_MAC_T_FID_COUNT] = { - bcmpkt_mac_in_mac_t_flags_get, - bcmpkt_mac_in_mac_t_isid_get, - bcmpkt_mac_in_mac_t_pcp_de_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_34_8_0_mac_in_mac_t_fset[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MAC_IN_MAC_T_FID_COUNT] = { - bcmpkt_mac_in_mac_t_flags_set, - bcmpkt_mac_in_mac_t_isid_set, - bcmpkt_mac_in_mac_t_pcp_de_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_34_8_0_mac_in_mac_t_field_data[] = { - BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MAC_IN_MAC_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_34_8_0_mac_in_mac_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MAC_IN_MAC_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_34_8_0_mac_in_mac_t_field_data, -}; - - -static int32_t bcmpkt_mim_gbp_t_gbp_sid_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_mim_gbp_t_gbp_sid_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_mim_gbp_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_mim_gbp_t_tpid_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_34_8_0_mim_gbp_t_fget[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MIM_GBP_T_FID_COUNT] = { - bcmpkt_mim_gbp_t_gbp_sid_get, - bcmpkt_mim_gbp_t_tpid_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_34_8_0_mim_gbp_t_fset[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MIM_GBP_T_FID_COUNT] = { - bcmpkt_mim_gbp_t_gbp_sid_set, - bcmpkt_mim_gbp_t_tpid_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_34_8_0_mim_gbp_t_field_data[] = { - BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MIM_GBP_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_34_8_0_mim_gbp_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MIM_GBP_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_34_8_0_mim_gbp_t_field_data, -}; - - -static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_34_8_0_mirror_erspan_sn_t_fget[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { - bcmpkt_mirror_erspan_sn_t_seq_num_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_34_8_0_mirror_erspan_sn_t_fset[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { - bcmpkt_mirror_erspan_sn_t_seq_num_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_34_8_0_mirror_erspan_sn_t_field_data[] = { - BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_34_8_0_mirror_erspan_sn_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_34_8_0_mirror_erspan_sn_t_field_data, -}; - - -static int32_t bcmpkt_mirror_transport_t_data_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_mirror_transport_t_data_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_34_8_0_mirror_transport_t_fget[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { - bcmpkt_mirror_transport_t_data_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_34_8_0_mirror_transport_t_fset[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { - bcmpkt_mirror_transport_t_data_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_34_8_0_mirror_transport_t_field_data[] = { - BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_34_8_0_mirror_transport_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_34_8_0_mirror_transport_t_field_data, -}; - - -static int32_t bcmpkt_mpls_ach_t_channel_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_mpls_ach_t_channel_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_mpls_ach_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 28, 4); - - return ret; -} - -static int32_t bcmpkt_mpls_ach_t_cw_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 28, 4, val); - return ret; -} - -static int32_t bcmpkt_mpls_ach_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_mpls_ach_t_reserved_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_mpls_ach_t_version_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 4); - - return ret; -} - -static int32_t bcmpkt_mpls_ach_t_version_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 4, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_34_8_0_mpls_ach_t_fget[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = { - bcmpkt_mpls_ach_t_channel_type_get, - bcmpkt_mpls_ach_t_cw_type_get, - bcmpkt_mpls_ach_t_reserved_get, - bcmpkt_mpls_ach_t_version_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_34_8_0_mpls_ach_t_fset[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = { - bcmpkt_mpls_ach_t_channel_type_set, - bcmpkt_mpls_ach_t_cw_type_set, - bcmpkt_mpls_ach_t_reserved_set, - bcmpkt_mpls_ach_t_version_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_34_8_0_mpls_ach_t_field_data[] = { - BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_34_8_0_mpls_ach_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MPLS_ACH_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_34_8_0_mpls_ach_t_field_data, -}; - - -static int32_t bcmpkt_mpls_bv_t_value_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_mpls_bv_t_value_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_34_8_0_mpls_bv_t_fget[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MPLS_BV_T_FID_COUNT] = { - bcmpkt_mpls_bv_t_value_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_34_8_0_mpls_bv_t_fset[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MPLS_BV_T_FID_COUNT] = { - bcmpkt_mpls_bv_t_value_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_34_8_0_mpls_bv_t_field_data[] = { - BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_34_8_0_mpls_bv_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MPLS_BV_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_34_8_0_mpls_bv_t_field_data, -}; - - -static int32_t bcmpkt_mpls_cw_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 28, 4); - - return ret; -} - -static int32_t bcmpkt_mpls_cw_t_cw_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 28, 4, val); - return ret; -} - -static int32_t bcmpkt_mpls_cw_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 12); - - return ret; -} - -static int32_t bcmpkt_mpls_cw_t_reserved_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 12, val); - return ret; -} - -static int32_t bcmpkt_mpls_cw_t_seq_number_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_mpls_cw_t_seq_number_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_34_8_0_mpls_cw_t_fget[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MPLS_CW_T_FID_COUNT] = { - bcmpkt_mpls_cw_t_cw_type_get, - bcmpkt_mpls_cw_t_reserved_get, - bcmpkt_mpls_cw_t_seq_number_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_34_8_0_mpls_cw_t_fset[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MPLS_CW_T_FID_COUNT] = { - bcmpkt_mpls_cw_t_cw_type_set, - bcmpkt_mpls_cw_t_reserved_set, - bcmpkt_mpls_cw_t_seq_number_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_34_8_0_mpls_cw_t_field_data[] = { - BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_34_8_0_mpls_cw_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MPLS_CW_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_34_8_0_mpls_cw_t_field_data, -}; - - -static int32_t bcmpkt_mpls_t_bos_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 8, 1); - - return ret; -} - -static int32_t bcmpkt_mpls_t_bos_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 8, 1, val); - return ret; -} - -static int32_t bcmpkt_mpls_t_exp_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 9, 3); - - return ret; -} - -static int32_t bcmpkt_mpls_t_exp_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 9, 3, val); - return ret; -} - -static int32_t bcmpkt_mpls_t_label_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 12, 20); - - return ret; -} - -static int32_t bcmpkt_mpls_t_label_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 12, 20, val); - return ret; -} - -static int32_t bcmpkt_mpls_t_ttl_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 8); - - return ret; -} - -static int32_t bcmpkt_mpls_t_ttl_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 8, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_34_8_0_mpls_t_fget[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MPLS_T_FID_COUNT] = { - bcmpkt_mpls_t_bos_get, - bcmpkt_mpls_t_exp_get, - bcmpkt_mpls_t_label_get, - bcmpkt_mpls_t_ttl_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_34_8_0_mpls_t_fset[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MPLS_T_FID_COUNT] = { - bcmpkt_mpls_t_bos_set, - bcmpkt_mpls_t_exp_set, - bcmpkt_mpls_t_label_set, - bcmpkt_mpls_t_ttl_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_34_8_0_mpls_t_field_data[] = { - BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_34_8_0_mpls_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_MPLS_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_34_8_0_mpls_t_field_data, -}; - - -static int32_t bcmpkt_p_1588_t_cntrl_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[8], 24, 8); - - return ret; -} - -static int32_t bcmpkt_p_1588_t_cntrl_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[8], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_p_1588_t_correction_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_p_1588_t_correction_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_p_1588_t_domain_nb_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 24, 8); - - return ret; -} - -static int32_t bcmpkt_p_1588_t_domain_nb_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_p_1588_t_flags_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 16); - - return ret; -} - -static int32_t bcmpkt_p_1588_t_flags_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_p_1588_t_logmsginterval_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[8], 16, 8); - - return ret; -} - -static int32_t bcmpkt_p_1588_t_logmsginterval_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[8], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_p_1588_t_msg_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_p_1588_t_msg_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_p_1588_t_msg_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 4); - - return ret; -} - -static int32_t bcmpkt_p_1588_t_msg_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 4, val); - return ret; -} - -static int32_t bcmpkt_p_1588_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 20, 4); - - return ret; -} - -static int32_t bcmpkt_p_1588_t_reserved1_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 20, 4, val); - return ret; -} - -static int32_t bcmpkt_p_1588_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 8); - - return ret; -} - -static int32_t bcmpkt_p_1588_t_reserved2_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_p_1588_t_reserved3_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_p_1588_t_reserved3_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_p_1588_t_seq_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[7], 0, 16); - - return ret; -} - -static int32_t bcmpkt_p_1588_t_seq_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[7], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_p_1588_t_srcportid_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_p_1588_t_srcportid_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_p_1588_t_transportspec_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 28, 4); - - return ret; -} - -static int32_t bcmpkt_p_1588_t_transportspec_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 28, 4, val); - return ret; -} - -static int32_t bcmpkt_p_1588_t_version_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 4); - - return ret; -} - -static int32_t bcmpkt_p_1588_t_version_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 4, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_34_8_0_p_1588_t_fget[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_P_1588_T_FID_COUNT] = { - bcmpkt_p_1588_t_cntrl_get, - bcmpkt_p_1588_t_correction_get, - bcmpkt_p_1588_t_domain_nb_get, - bcmpkt_p_1588_t_flags_get, - bcmpkt_p_1588_t_logmsginterval_get, - bcmpkt_p_1588_t_msg_length_get, - bcmpkt_p_1588_t_msg_type_get, - bcmpkt_p_1588_t_reserved1_get, - bcmpkt_p_1588_t_reserved2_get, - bcmpkt_p_1588_t_reserved3_get, - bcmpkt_p_1588_t_seq_id_get, - bcmpkt_p_1588_t_srcportid_get, - bcmpkt_p_1588_t_transportspec_get, - bcmpkt_p_1588_t_version_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_34_8_0_p_1588_t_fset[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_P_1588_T_FID_COUNT] = { - bcmpkt_p_1588_t_cntrl_set, - bcmpkt_p_1588_t_correction_set, - bcmpkt_p_1588_t_domain_nb_set, - bcmpkt_p_1588_t_flags_set, - bcmpkt_p_1588_t_logmsginterval_set, - bcmpkt_p_1588_t_msg_length_set, - bcmpkt_p_1588_t_msg_type_set, - bcmpkt_p_1588_t_reserved1_set, - bcmpkt_p_1588_t_reserved2_set, - bcmpkt_p_1588_t_reserved3_set, - bcmpkt_p_1588_t_seq_id_set, - bcmpkt_p_1588_t_srcportid_set, - bcmpkt_p_1588_t_transportspec_set, - bcmpkt_p_1588_t_version_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_34_8_0_p_1588_t_field_data[] = { - BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_34_8_0_p_1588_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_P_1588_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_34_8_0_p_1588_t_field_data, -}; - - -static int32_t bcmpkt_pim_t_hdr_bytes_0_1_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_pim_t_hdr_bytes_0_1_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_pim_t_hdr_bytes_2_3_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_pim_t_hdr_bytes_2_3_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_pim_t_hdr_bytes_4_5_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 16); - - return ret; -} - -static int32_t bcmpkt_pim_t_hdr_bytes_4_5_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_pim_t_hdr_bytes_6_7_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 16); - - return ret; -} - -static int32_t bcmpkt_pim_t_hdr_bytes_6_7_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_34_8_0_pim_t_fget[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PIM_T_FID_COUNT] = { - bcmpkt_pim_t_hdr_bytes_0_1_get, - bcmpkt_pim_t_hdr_bytes_2_3_get, - bcmpkt_pim_t_hdr_bytes_4_5_get, - bcmpkt_pim_t_hdr_bytes_6_7_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_34_8_0_pim_t_fset[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PIM_T_FID_COUNT] = { - bcmpkt_pim_t_hdr_bytes_0_1_set, - bcmpkt_pim_t_hdr_bytes_2_3_set, - bcmpkt_pim_t_hdr_bytes_4_5_set, - bcmpkt_pim_t_hdr_bytes_6_7_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_34_8_0_pim_t_field_data[] = { - BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PIM_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_34_8_0_pim_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PIM_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_34_8_0_pim_t_field_data, -}; - - -static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_prog_ext_hdr_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_prog_ext_hdr_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_prog_ext_hdr_t_next_header_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_prog_ext_hdr_t_option_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_prog_ext_hdr_t_option_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_34_8_0_prog_ext_hdr_t_fget[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = { - bcmpkt_prog_ext_hdr_t_hdr_ext_len_get, - bcmpkt_prog_ext_hdr_t_next_header_get, - bcmpkt_prog_ext_hdr_t_option_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_34_8_0_prog_ext_hdr_t_fset[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT] = { - bcmpkt_prog_ext_hdr_t_hdr_ext_len_set, - bcmpkt_prog_ext_hdr_t_next_header_set, - bcmpkt_prog_ext_hdr_t_option_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_34_8_0_prog_ext_hdr_t_field_data[] = { - BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PROG_EXT_HDR_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_34_8_0_prog_ext_hdr_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PROG_EXT_HDR_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_34_8_0_prog_ext_hdr_t_field_data, -}; - - -static int32_t bcmpkt_psamp_0_t_flowset_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[3], 16, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_0_t_flowset_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[3], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_0_t_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_0_t_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_0_t_next_hop_index_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[3], 0, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_0_t_next_hop_index_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[3], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_34_8_0_psamp_0_t_fget[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_0_T_FID_COUNT] = { - bcmpkt_psamp_0_t_flowset_get, - bcmpkt_psamp_0_t_length_get, - bcmpkt_psamp_0_t_next_hop_index_get, - bcmpkt_psamp_0_t_obs_time_ns_get, - bcmpkt_psamp_0_t_obs_time_s_get, - bcmpkt_psamp_0_t_template_id_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_34_8_0_psamp_0_t_fset[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_0_T_FID_COUNT] = { - bcmpkt_psamp_0_t_flowset_set, - bcmpkt_psamp_0_t_length_set, - bcmpkt_psamp_0_t_next_hop_index_set, - bcmpkt_psamp_0_t_obs_time_ns_set, - bcmpkt_psamp_0_t_obs_time_s_set, - bcmpkt_psamp_0_t_template_id_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_34_8_0_psamp_0_t_field_data[] = { - BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_34_8_0_psamp_0_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_0_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_34_8_0_psamp_0_t_field_data, -}; - - -static int32_t bcmpkt_psamp_1_t_dlb_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 24, 8); - - return ret; -} - -static int32_t bcmpkt_psamp_1_t_dlb_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_psamp_1_t_egress_port_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_1_t_egress_port_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_1_t_epoch_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_1_t_epoch_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_1_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_1_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_1_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 0, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_1_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_1_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_1_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_1_t_variable_flag_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 16, 8); - - return ret; -} - -static int32_t bcmpkt_psamp_1_t_variable_flag_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 16, 8, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_34_8_0_psamp_1_t_fget[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_1_T_FID_COUNT] = { - bcmpkt_psamp_1_t_dlb_id_get, - bcmpkt_psamp_1_t_egress_port_get, - bcmpkt_psamp_1_t_epoch_get, - bcmpkt_psamp_1_t_ingress_port_get, - bcmpkt_psamp_1_t_sampled_length_get, - bcmpkt_psamp_1_t_user_meta_data_get, - bcmpkt_psamp_1_t_variable_flag_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_34_8_0_psamp_1_t_fset[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_1_T_FID_COUNT] = { - bcmpkt_psamp_1_t_dlb_id_set, - bcmpkt_psamp_1_t_egress_port_set, - bcmpkt_psamp_1_t_epoch_set, - bcmpkt_psamp_1_t_ingress_port_set, - bcmpkt_psamp_1_t_sampled_length_set, - bcmpkt_psamp_1_t_user_meta_data_set, - bcmpkt_psamp_1_t_variable_flag_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_34_8_0_psamp_1_t_field_data[] = { - BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_34_8_0_psamp_1_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_1_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_34_8_0_psamp_1_t_field_data, -}; - - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[4], 16, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[4], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[4], 0, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[4], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_34_8_0_psamp_mirror_on_drop_0_t_fget[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { - bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get, - bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get, - bcmpkt_psamp_mirror_on_drop_0_t_length_get, - bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get, - bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get, - bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get, - bcmpkt_psamp_mirror_on_drop_0_t_template_id_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_34_8_0_psamp_mirror_on_drop_0_t_fset[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { - bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set, - bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set, - bcmpkt_psamp_mirror_on_drop_0_t_length_set, - bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set, - bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set, - bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set, - bcmpkt_psamp_mirror_on_drop_0_t_template_id_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_34_8_0_psamp_mirror_on_drop_0_t_field_data[] = { - BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_34_8_0_psamp_mirror_on_drop_0_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_34_8_0_psamp_mirror_on_drop_0_t_field_data, -}; - - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 6); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 6, val); - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_smod_state_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 22, 2); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_smod_state_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 22, 2, val); - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 24, 8); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 8); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 8, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_34_8_0_psamp_mirror_on_drop_3_t_fget[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = { - bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get, - bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get, - bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get, - bcmpkt_psamp_mirror_on_drop_3_t_smod_state_get, - bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get, - bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get, - bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_34_8_0_psamp_mirror_on_drop_3_t_fset[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = { - bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set, - bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set, - bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set, - bcmpkt_psamp_mirror_on_drop_3_t_smod_state_set, - bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set, - bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set, - bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_34_8_0_psamp_mirror_on_drop_3_t_field_data[] = { - BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_34_8_0_psamp_mirror_on_drop_3_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_34_8_0_psamp_mirror_on_drop_3_t_field_data, -}; - - -static int32_t bcmpkt_rarp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 24, 8); - - return ret; -} - -static int32_t bcmpkt_rarp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_rarp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_rarp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_rarp_t_operation_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 16); - - return ret; -} - -static int32_t bcmpkt_rarp_t_operation_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_rarp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 8); - - return ret; -} - -static int32_t bcmpkt_rarp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_rarp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_rarp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_rarp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_rarp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_rarp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_rarp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_rarp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_rarp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_rarp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_rarp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_34_8_0_rarp_t_fget[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RARP_T_FID_COUNT] = { - bcmpkt_rarp_t_hardware_len_get, - bcmpkt_rarp_t_hardware_type_get, - bcmpkt_rarp_t_operation_get, - bcmpkt_rarp_t_prot_addr_len_get, - bcmpkt_rarp_t_protocol_type_get, - bcmpkt_rarp_t_sender_ha_get, - bcmpkt_rarp_t_sender_ip_get, - bcmpkt_rarp_t_target_ha_get, - bcmpkt_rarp_t_target_ip_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_34_8_0_rarp_t_fset[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RARP_T_FID_COUNT] = { - bcmpkt_rarp_t_hardware_len_set, - bcmpkt_rarp_t_hardware_type_set, - bcmpkt_rarp_t_operation_set, - bcmpkt_rarp_t_prot_addr_len_set, - bcmpkt_rarp_t_protocol_type_set, - bcmpkt_rarp_t_sender_ha_set, - bcmpkt_rarp_t_sender_ip_set, - bcmpkt_rarp_t_target_ha_set, - bcmpkt_rarp_t_target_ip_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_34_8_0_rarp_t_field_data[] = { - BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_34_8_0_rarp_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_RARP_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_34_8_0_rarp_t_field_data, -}; - - -static int32_t bcmpkt_routing_t_data_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_routing_t_data_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_routing_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_routing_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_routing_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_routing_t_next_header_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_routing_t_routing_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 8, 8); - - return ret; -} - -static int32_t bcmpkt_routing_t_routing_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 8, 8, val); - return ret; -} - -static int32_t bcmpkt_routing_t_segments_left_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 8); - - return ret; -} - -static int32_t bcmpkt_routing_t_segments_left_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 8, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_34_8_0_routing_t_fget[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ROUTING_T_FID_COUNT] = { - bcmpkt_routing_t_data_get, - bcmpkt_routing_t_hdr_ext_len_get, - bcmpkt_routing_t_next_header_get, - bcmpkt_routing_t_routing_type_get, - bcmpkt_routing_t_segments_left_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_34_8_0_routing_t_fset[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ROUTING_T_FID_COUNT] = { - bcmpkt_routing_t_data_set, - bcmpkt_routing_t_hdr_ext_len_set, - bcmpkt_routing_t_next_header_set, - bcmpkt_routing_t_routing_type_set, - bcmpkt_routing_t_segments_left_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_34_8_0_routing_t_field_data[] = { - BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_34_8_0_routing_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_ROUTING_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_34_8_0_routing_t_field_data, -}; - - -static int32_t bcmpkt_sflow_shim_0_t_sys_destination_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 16); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_0_t_sys_destination_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_sflow_shim_0_t_sys_source_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 16); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_0_t_sys_source_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_sflow_shim_0_t_version_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_sflow_shim_0_t_version_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_34_8_0_sflow_shim_0_t_fget[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { - bcmpkt_sflow_shim_0_t_sys_destination_get, - bcmpkt_sflow_shim_0_t_sys_source_get, - bcmpkt_sflow_shim_0_t_version_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_34_8_0_sflow_shim_0_t_fset[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { - bcmpkt_sflow_shim_0_t_sys_destination_set, - bcmpkt_sflow_shim_0_t_sys_source_set, - bcmpkt_sflow_shim_0_t_version_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_34_8_0_sflow_shim_0_t_field_data[] = { - BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_34_8_0_sflow_shim_0_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_34_8_0_sflow_shim_0_t_field_data, -}; - - -static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 30, 1); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 30, 1, val); - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 27, 1); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 27, 1, val); - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 29, 1); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 29, 1, val); - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 28, 1); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 28, 1, val); - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 31, 1); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 31, 1, val); - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 26, 1); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 26, 1, val); - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 7); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_reserved_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 7, val); - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 23, 3); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 23, 3, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_34_8_0_sflow_shim_1_t_fget[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { - bcmpkt_sflow_shim_1_t_flag_dest_sample_get, - bcmpkt_sflow_shim_1_t_flag_discarded_get, - bcmpkt_sflow_shim_1_t_flag_flex_sample_get, - bcmpkt_sflow_shim_1_t_flag_mcast_get, - bcmpkt_sflow_shim_1_t_flag_src_sample_get, - bcmpkt_sflow_shim_1_t_flag_truncated_get, - bcmpkt_sflow_shim_1_t_reserved_get, - bcmpkt_sflow_shim_1_t_sys_opcode_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_34_8_0_sflow_shim_1_t_fset[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { - bcmpkt_sflow_shim_1_t_flag_dest_sample_set, - bcmpkt_sflow_shim_1_t_flag_discarded_set, - bcmpkt_sflow_shim_1_t_flag_flex_sample_set, - bcmpkt_sflow_shim_1_t_flag_mcast_set, - bcmpkt_sflow_shim_1_t_flag_src_sample_set, - bcmpkt_sflow_shim_1_t_flag_truncated_set, - bcmpkt_sflow_shim_1_t_reserved_set, - bcmpkt_sflow_shim_1_t_sys_opcode_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_34_8_0_sflow_shim_1_t_field_data[] = { - BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_34_8_0_sflow_shim_1_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_34_8_0_sflow_shim_1_t_field_data, -}; - - -static int32_t bcmpkt_sflow_shim_2_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_sflow_shim_2_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_34_8_0_sflow_shim_2_t_fget[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { - bcmpkt_sflow_shim_2_t_sequence_num_get, - bcmpkt_sflow_shim_2_t_user_meta_data_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_34_8_0_sflow_shim_2_t_fset[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { - bcmpkt_sflow_shim_2_t_sequence_num_set, - bcmpkt_sflow_shim_2_t_user_meta_data_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_34_8_0_sflow_shim_2_t_field_data[] = { - BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_34_8_0_sflow_shim_2_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_34_8_0_sflow_shim_2_t_field_data, -}; - - -static int32_t bcmpkt_snap_llc_t_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_snap_llc_t_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_snap_llc_t_snap_llc_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_snap_llc_t_snap_llc_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_34_8_0_snap_llc_t_fget[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = { - bcmpkt_snap_llc_t_length_get, - bcmpkt_snap_llc_t_snap_llc_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_34_8_0_snap_llc_t_fset[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = { - bcmpkt_snap_llc_t_length_set, - bcmpkt_snap_llc_t_snap_llc_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_34_8_0_snap_llc_t_field_data[] = { - BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_34_8_0_snap_llc_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_SNAP_LLC_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_34_8_0_snap_llc_t_field_data, -}; - - -static int32_t bcmpkt_svtag_t_data_lwr_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_svtag_t_data_lwr_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_svtag_t_data_upr_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_svtag_t_data_upr_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_34_8_0_svtag_t_fget[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_SVTAG_T_FID_COUNT] = { - bcmpkt_svtag_t_data_lwr_get, - bcmpkt_svtag_t_data_upr_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_34_8_0_svtag_t_fset[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_SVTAG_T_FID_COUNT] = { - bcmpkt_svtag_t_data_lwr_set, - bcmpkt_svtag_t_data_upr_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_34_8_0_svtag_t_field_data[] = { - BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_SVTAG_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_34_8_0_svtag_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_SVTAG_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_34_8_0_svtag_t_field_data, -}; - - -static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_tcp_first_4bytes_t_src_port_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_tcp_first_4bytes_t_src_port_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_34_8_0_tcp_first_4bytes_t_fget[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { - bcmpkt_tcp_first_4bytes_t_dst_port_get, - bcmpkt_tcp_first_4bytes_t_src_port_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_34_8_0_tcp_first_4bytes_t_fset[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { - bcmpkt_tcp_first_4bytes_t_dst_port_set, - bcmpkt_tcp_first_4bytes_t_src_port_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_34_8_0_tcp_first_4bytes_t_field_data[] = { - BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_34_8_0_tcp_first_4bytes_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_34_8_0_tcp_first_4bytes_t_field_data, -}; - - -static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[3], 16, 16); - - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_checksum_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[3], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 16, 16); - - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[3], 0, 16); - - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[3], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_win_size_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 0, 16); - - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_win_size_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 0, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_34_8_0_tcp_last_16bytes_t_fget[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { - bcmpkt_tcp_last_16bytes_t_ack_num_get, - bcmpkt_tcp_last_16bytes_t_checksum_get, - bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get, - bcmpkt_tcp_last_16bytes_t_seq_num_get, - bcmpkt_tcp_last_16bytes_t_urgent_ptr_get, - bcmpkt_tcp_last_16bytes_t_win_size_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_34_8_0_tcp_last_16bytes_t_fset[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { - bcmpkt_tcp_last_16bytes_t_ack_num_set, - bcmpkt_tcp_last_16bytes_t_checksum_set, - bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set, - bcmpkt_tcp_last_16bytes_t_seq_num_set, - bcmpkt_tcp_last_16bytes_t_urgent_ptr_set, - bcmpkt_tcp_last_16bytes_t_win_size_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_34_8_0_tcp_last_16bytes_t_field_data[] = { - BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_34_8_0_tcp_last_16bytes_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_34_8_0_tcp_last_16bytes_t_field_data, -}; - - -static int32_t bcmpkt_udp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 16); - - return ret; -} - -static int32_t bcmpkt_udp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_udp_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_udp_t_dst_port_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_udp_t_src_port_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_udp_t_src_port_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_udp_t_udp_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 16); - - return ret; -} - -static int32_t bcmpkt_udp_t_udp_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_34_8_0_udp_t_fget[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_UDP_T_FID_COUNT] = { - bcmpkt_udp_t_checksum_get, - bcmpkt_udp_t_dst_port_get, - bcmpkt_udp_t_src_port_get, - bcmpkt_udp_t_udp_length_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_34_8_0_udp_t_fset[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_UDP_T_FID_COUNT] = { - bcmpkt_udp_t_checksum_set, - bcmpkt_udp_t_dst_port_set, - bcmpkt_udp_t_src_port_set, - bcmpkt_udp_t_udp_length_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_34_8_0_udp_t_field_data[] = { - BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_34_8_0_udp_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_UDP_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_34_8_0_udp_t_field_data, -}; - - -static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_34_8_0_unknown_l3_t_fget[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { - bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get, - bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_34_8_0_unknown_l3_t_fset[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { - bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set, - bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_34_8_0_unknown_l3_t_field_data[] = { - BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_34_8_0_unknown_l3_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_34_8_0_unknown_l3_t_field_data, -}; - - -static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_34_8_0_unknown_l4_t_fget[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { - bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_34_8_0_unknown_l4_t_fset[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { - bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_34_8_0_unknown_l4_t_field_data[] = { - BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_34_8_0_unknown_l4_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_34_8_0_unknown_l4_t_field_data, -}; - - -static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_unknown_l5_t_l5_bytes_8_9_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 16, 16); - - return ret; -} - -static int32_t bcmpkt_unknown_l5_t_l5_bytes_8_9_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_34_8_0_unknown_l5_t_fget[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { - bcmpkt_unknown_l5_t_l5_bytes_0_1_get, - bcmpkt_unknown_l5_t_l5_bytes_2_3_get, - bcmpkt_unknown_l5_t_l5_bytes_4_7_get, - bcmpkt_unknown_l5_t_l5_bytes_8_9_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_34_8_0_unknown_l5_t_fset[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { - bcmpkt_unknown_l5_t_l5_bytes_0_1_set, - bcmpkt_unknown_l5_t_l5_bytes_2_3_set, - bcmpkt_unknown_l5_t_l5_bytes_4_7_set, - bcmpkt_unknown_l5_t_l5_bytes_8_9_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_34_8_0_unknown_l5_t_field_data[] = { - BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_34_8_0_unknown_l5_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_34_8_0_unknown_l5_t_field_data, -}; - - -static int32_t bcmpkt_vlan_t_cfi_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 12, 1); - - return ret; -} - -static int32_t bcmpkt_vlan_t_cfi_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 12, 1, val); - return ret; -} - -static int32_t bcmpkt_vlan_t_pcp_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 13, 3); - - return ret; -} - -static int32_t bcmpkt_vlan_t_pcp_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 13, 3, val); - return ret; -} - -static int32_t bcmpkt_vlan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_vlan_t_tpid_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_vlan_t_vid_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 12); - - return ret; -} - -static int32_t bcmpkt_vlan_t_vid_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 12, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_34_8_0_vlan_t_fget[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_VLAN_T_FID_COUNT] = { - bcmpkt_vlan_t_cfi_get, - bcmpkt_vlan_t_pcp_get, - bcmpkt_vlan_t_tpid_get, - bcmpkt_vlan_t_vid_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_34_8_0_vlan_t_fset[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_VLAN_T_FID_COUNT] = { - bcmpkt_vlan_t_cfi_set, - bcmpkt_vlan_t_pcp_set, - bcmpkt_vlan_t_tpid_set, - bcmpkt_vlan_t_vid_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_34_8_0_vlan_t_field_data[] = { - BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_34_8_0_vlan_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_VLAN_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_34_8_0_vlan_t_field_data, -}; - - -static int32_t bcmpkt_vxlan_t_flags_reserved_1_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_vxlan_t_flags_reserved_1_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_vxlan_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 8); - - return ret; -} - -static int32_t bcmpkt_vxlan_t_reserved2_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 8, val); - return ret; -} - -static int32_t bcmpkt_vxlan_t_vn_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 8, 24); - - return ret; -} - -static int32_t bcmpkt_vxlan_t_vn_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 8, 24, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_34_8_0_vxlan_t_fget[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_VXLAN_T_FID_COUNT] = { - bcmpkt_vxlan_t_flags_reserved_1_get, - bcmpkt_vxlan_t_reserved2_get, - bcmpkt_vxlan_t_vn_id_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_34_8_0_vxlan_t_fset[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_VXLAN_T_FID_COUNT] = { - bcmpkt_vxlan_t_flags_reserved_1_set, - bcmpkt_vxlan_t_reserved2_set, - bcmpkt_vxlan_t_vn_id_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_34_8_0_vxlan_t_field_data[] = { - BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_34_8_0_vxlan_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_VXLAN_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_34_8_0_vxlan_t_field_data, -}; - - -static int32_t bcmpkt_wesp_t_flags_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 8); - - return ret; -} - -static int32_t bcmpkt_wesp_t_flags_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 8, val); - return ret; -} - -static int32_t bcmpkt_wesp_t_header_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_wesp_t_header_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_wesp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_wesp_t_next_header_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_wesp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_wesp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_wesp_t_spi_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_wesp_t_spi_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_wesp_t_trailer_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 8, 8); - - return ret; -} - -static int32_t bcmpkt_wesp_t_trailer_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 8, 8, val); - return ret; -} - -static int32_t bcmpkt_wesp_t_wesp_iv_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_wesp_t_wesp_iv_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm56890_a0_dna_6_5_34_8_0_wesp_t_fget[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_WESP_T_FID_COUNT] = { - bcmpkt_wesp_t_flags_get, - bcmpkt_wesp_t_header_len_get, - bcmpkt_wesp_t_next_header_get, - bcmpkt_wesp_t_seq_num_get, - bcmpkt_wesp_t_spi_get, - bcmpkt_wesp_t_trailer_len_get, - bcmpkt_wesp_t_wesp_iv_get, -}; - -bcmpkt_flex_field_set_f bcm56890_a0_dna_6_5_34_8_0_wesp_t_fset[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_WESP_T_FID_COUNT] = { - bcmpkt_wesp_t_flags_set, - bcmpkt_wesp_t_header_len_set, - bcmpkt_wesp_t_next_header_set, - bcmpkt_wesp_t_seq_num_set, - bcmpkt_wesp_t_spi_set, - bcmpkt_wesp_t_trailer_len_set, - bcmpkt_wesp_t_wesp_iv_set, -}; - -static bcmpkt_flex_field_metadata_t bcm56890_a0_dna_6_5_34_8_0_wesp_t_field_data[] = { - BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm56890_a0_dna_6_5_34_8_0_wesp_t_field_info = { - .num_fields = BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_WESP_T_FID_COUNT, - .info = bcm56890_a0_dna_6_5_34_8_0_wesp_t_field_data, -}; - -static bcmpkt_flex_pmd_info_t bcm56890_a0_dna_6_5_34_8_0_flexhdr_info_list[BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_FLEXHDR_COUNT] = { - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_34_8_0_arp_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_34_8_0_arp_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_34_8_0_arp_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_34_8_0_authen_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_34_8_0_authen_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_34_8_0_authen_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_34_8_0_bfd_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_34_8_0_bfd_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_34_8_0_bfd_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_34_8_0_cntag_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_34_8_0_cntag_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_34_8_0_cntag_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_34_8_0_cpu_composites_0_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_34_8_0_cpu_composites_0_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_34_8_0_cpu_composites_0_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_34_8_0_cpu_composites_1_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_34_8_0_cpu_composites_1_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_34_8_0_cpu_composites_1_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_34_8_0_dest_option_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_34_8_0_dest_option_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_34_8_0_dest_option_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_34_8_0_ep_nih_header_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_34_8_0_ep_nih_header_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_34_8_0_ep_nih_header_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_34_8_0_erspan3_fixed_hdr_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_34_8_0_erspan3_fixed_hdr_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_34_8_0_erspan3_fixed_hdr_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_34_8_0_erspan3_subhdr_5_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_34_8_0_erspan3_subhdr_5_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_34_8_0_erspan3_subhdr_5_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_34_8_0_esp_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_34_8_0_esp_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_34_8_0_esp_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_34_8_0_ethertype_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_34_8_0_ethertype_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_34_8_0_ethertype_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_34_8_0_frag_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_34_8_0_frag_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_34_8_0_frag_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_34_8_0_gbp_ethernet_shim_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_34_8_0_gbp_ethernet_shim_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_34_8_0_gbp_ethernet_shim_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_34_8_0_generic_loopback_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_34_8_0_generic_loopback_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_34_8_0_generic_loopback_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_34_8_0_gpe_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_34_8_0_gpe_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_34_8_0_gpe_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_34_8_0_gre_chksum_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_34_8_0_gre_chksum_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_34_8_0_gre_chksum_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_34_8_0_gre_key_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_34_8_0_gre_key_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_34_8_0_gre_key_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_34_8_0_gre_rout_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_34_8_0_gre_rout_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_34_8_0_gre_rout_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_34_8_0_gre_seq_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_34_8_0_gre_seq_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_34_8_0_gre_seq_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_34_8_0_gre_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_34_8_0_gre_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_34_8_0_gre_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_34_8_0_hg3_base_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_34_8_0_hg3_base_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_34_8_0_hg3_base_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_34_8_0_hg3_extension_0_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_34_8_0_hg3_extension_0_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_34_8_0_hg3_extension_0_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_34_8_0_hop_by_hop_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_34_8_0_hop_by_hop_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_34_8_0_hop_by_hop_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_34_8_0_icmp_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_34_8_0_icmp_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_34_8_0_icmp_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_34_8_0_ifa_header_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_34_8_0_ifa_header_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_34_8_0_ifa_header_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_34_8_0_ifa_metadata_a_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_34_8_0_ifa_metadata_a_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_34_8_0_ifa_metadata_a_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_34_8_0_ifa_metadata_b_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_34_8_0_ifa_metadata_b_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_34_8_0_ifa_metadata_b_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_34_8_0_ifa_metadata_base_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_34_8_0_ifa_metadata_base_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_34_8_0_ifa_metadata_base_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_34_8_0_igmp_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_34_8_0_igmp_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_34_8_0_igmp_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_34_8_0_ioam_e2e_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_34_8_0_ioam_e2e_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_34_8_0_ioam_e2e_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_34_8_0_ipfix_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_34_8_0_ipfix_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_34_8_0_ipfix_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_34_8_0_ipv4_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_34_8_0_ipv4_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_34_8_0_ipv4_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_34_8_0_ipv6_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_34_8_0_ipv6_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_34_8_0_ipv6_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_34_8_0_l2_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_34_8_0_l2_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_34_8_0_l2_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_34_8_0_mac_in_mac_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_34_8_0_mac_in_mac_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_34_8_0_mac_in_mac_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_34_8_0_mim_gbp_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_34_8_0_mim_gbp_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_34_8_0_mim_gbp_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_34_8_0_mirror_erspan_sn_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_34_8_0_mirror_erspan_sn_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_34_8_0_mirror_erspan_sn_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_34_8_0_mirror_transport_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_34_8_0_mirror_transport_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_34_8_0_mirror_transport_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_34_8_0_mpls_ach_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_34_8_0_mpls_ach_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_34_8_0_mpls_ach_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_34_8_0_mpls_bv_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_34_8_0_mpls_bv_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_34_8_0_mpls_bv_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_34_8_0_mpls_cw_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_34_8_0_mpls_cw_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_34_8_0_mpls_cw_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_34_8_0_mpls_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_34_8_0_mpls_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_34_8_0_mpls_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_34_8_0_p_1588_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_34_8_0_p_1588_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_34_8_0_p_1588_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_34_8_0_pim_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_34_8_0_pim_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_34_8_0_pim_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_34_8_0_prog_ext_hdr_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_34_8_0_prog_ext_hdr_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_34_8_0_prog_ext_hdr_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_34_8_0_psamp_0_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_34_8_0_psamp_0_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_34_8_0_psamp_0_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_34_8_0_psamp_1_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_34_8_0_psamp_1_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_34_8_0_psamp_1_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_34_8_0_psamp_mirror_on_drop_0_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_34_8_0_psamp_mirror_on_drop_0_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_34_8_0_psamp_mirror_on_drop_0_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_34_8_0_psamp_mirror_on_drop_3_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_34_8_0_psamp_mirror_on_drop_3_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_34_8_0_psamp_mirror_on_drop_3_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_34_8_0_rarp_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_34_8_0_rarp_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_34_8_0_rarp_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_34_8_0_routing_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_34_8_0_routing_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_34_8_0_routing_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_34_8_0_sflow_shim_0_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_34_8_0_sflow_shim_0_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_34_8_0_sflow_shim_0_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_34_8_0_sflow_shim_1_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_34_8_0_sflow_shim_1_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_34_8_0_sflow_shim_1_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_34_8_0_sflow_shim_2_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_34_8_0_sflow_shim_2_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_34_8_0_sflow_shim_2_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_34_8_0_snap_llc_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_34_8_0_snap_llc_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_34_8_0_snap_llc_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_34_8_0_svtag_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_34_8_0_svtag_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_34_8_0_svtag_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_34_8_0_tcp_first_4bytes_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_34_8_0_tcp_first_4bytes_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_34_8_0_tcp_first_4bytes_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_34_8_0_tcp_last_16bytes_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_34_8_0_tcp_last_16bytes_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_34_8_0_tcp_last_16bytes_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_34_8_0_udp_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_34_8_0_udp_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_34_8_0_udp_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_34_8_0_unknown_l3_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_34_8_0_unknown_l3_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_34_8_0_unknown_l3_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_34_8_0_unknown_l4_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_34_8_0_unknown_l4_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_34_8_0_unknown_l4_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_34_8_0_unknown_l5_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_34_8_0_unknown_l5_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_34_8_0_unknown_l5_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_34_8_0_vlan_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_34_8_0_vlan_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_34_8_0_vlan_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_34_8_0_vxlan_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_34_8_0_vxlan_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_34_8_0_vxlan_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_34_8_0_wesp_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm56890_a0_dna_6_5_34_8_0_wesp_t_fget, - .flex_fset = bcm56890_a0_dna_6_5_34_8_0_wesp_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm56890_a0_dna_6_5_34_8_0_rxpmd_flex_field_info, - .reasons_info = &bcm56890_a0_dna_6_5_34_8_0_rxpmd_flex_reasons_info, - .flex_common_fget = bcm56890_a0_rxpmd_flex_fget, - .flex_common_fset = bcm56890_a0_rxpmd_flex_fset, - }, -}; - -static shr_enum_map_t bcm56890_a0_dna_6_5_34_8_0_flexhdr_id_map[] = { - BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_FLEXHDR_NAME_MAP_INIT -}; - -shr_enum_map_t * bcm56890_a0_dna_6_5_34_8_0_flexhdr_map_get(void) -{ - return bcm56890_a0_dna_6_5_34_8_0_flexhdr_id_map; -} - -bcmpkt_flex_pmd_info_t * bcm56890_a0_dna_6_5_34_8_0_flex_pmd_info_get(uint32_t hid) -{ - if (hid >= BCM56890_A0_DNA_6_5_34_8_0_BCMPKT_FLEXHDR_COUNT) { - return NULL; - } - - return &bcm56890_a0_dna_6_5_34_8_0_flexhdr_info_list[hid]; -} - -int bcm56890_a0_dna_6_5_34_8_0_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = { - 14, - 21, - 22, - 66, -}; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm78800_a0/cna_6_5_34_2_0/bcm78800_a0_cna_6_5_34_2_0_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm78800_a0/cna_6_5_34_2_0/bcm78800_a0_cna_6_5_34_2_0_bcmpkt_rxpmd_match_id.c deleted file mode 100644 index 17355c228cb..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm78800_a0/cna_6_5_34_2_0/bcm78800_a0_cna_6_5_34_2_0_bcmpkt_rxpmd_match_id.c +++ /dev/null @@ -1,1600 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) bcm78800_a0_cna_6_5_34_2_0_sf_match_id_info.yml - * for device bcm78800_a0 and variant cna_6_5_34_2_0. - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - - -#include -#include - -static uint32_t bcm78800_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_itag[1] = -{ - 0x14, -}; - -static uint32_t bcm78800_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_l2[1] = -{ - 0x1e, -}; - -static uint32_t bcm78800_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_otag[1] = -{ - 0x18, -}; - -static uint32_t bcm78800_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_arp[1] = -{ - 0x4, -}; - -static uint32_t bcm78800_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ethertype[1] = -{ - 0x3d7eb7fe, -}; - -static uint32_t bcm78800_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_icmp[1] = -{ - 0x100010, -}; - -static uint32_t bcm78800_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_header[1] = -{ - 0x7e0, -}; - -static uint32_t bcm78800_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_metadata_base[1] = -{ - 0x500, -}; - -static uint32_t bcm78800_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv4[1] = -{ - 0x6b7f8, -}; - -static uint32_t bcm78800_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv6[1] = -{ - 0xd780000, -}; - -static uint32_t bcm78800_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rarp[1] = -{ - 0x10000000, -}; - -static uint32_t bcm78800_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_first_4bytes[1] = -{ - 0x6031c0, -}; - -static uint32_t bcm78800_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_last_16bytes[1] = -{ - 0x402180, -}; - -static uint32_t bcm78800_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_udp[1] = -{ - 0x5028600, -}; - -static uint32_t bcm78800_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l3[1] = -{ - 0x20000000, -}; - -static uint32_t bcm78800_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l4[1] = -{ - 0x8040000, -}; - -static uint32_t bcm78800_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l5[1] = -{ - 0x4020000, -}; - -static uint32_t bcm78800_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_itag[1] = -{ - 0x28, -}; - -static uint32_t bcm78800_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_l2[1] = -{ - 0x3e, -}; - -static uint32_t bcm78800_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_otag[1] = -{ - 0x30, -}; - -static uint32_t bcm78800_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_arp[1] = -{ - 0x4, -}; - -static uint32_t bcm78800_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ethertype[2] = -{ - 0x9ffd67fe, - 0x1f5, -}; - -static uint32_t bcm78800_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_icmp[1] = -{ - 0x400010, -}; - -static uint32_t bcm78800_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_header[1] = -{ - 0x1f8007e0, -}; - -static uint32_t bcm78800_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_metadata_base[1] = -{ - 0x14000500, -}; - -static uint32_t bcm78800_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv4[1] = -{ - 0x1d67f8, -}; - -static uint32_t bcm78800_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv6[2] = -{ - 0x9fe00000, - 0x75, -}; - -static uint32_t bcm78800_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rarp[2] = -{ - 0x0, - 0x80, -}; - -static uint32_t bcm78800_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_first_4bytes[2] = -{ - 0x870061c0, - 0x1, -}; - -static uint32_t bcm78800_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_last_16bytes[2] = -{ - 0x6004180, - 0x1, -}; - -static uint32_t bcm78800_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_udp[2] = -{ - 0x180d0600, - 0x34, -}; - -static uint32_t bcm78800_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l3[2] = -{ - 0x0, - 0x100, -}; - -static uint32_t bcm78800_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l4[2] = -{ - 0x100000, - 0x40, -}; - -static uint32_t bcm78800_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l5[2] = -{ - 0x40000, - 0x10, -}; - -static uint32_t bcm78800_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_vxlan[2] = -{ - 0x80000, - 0x20, -}; - -static uint32_t bcm78800_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_sys_hdr_ep_nih[1] = -{ - 0x4, -}; - -static uint32_t bcm78800_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_sys_hdr_loopback[1] = -{ - 0x8, -}; - - -static bcmpkt_rxpmd_match_id_db_t -bcm78800_a0_cna_6_5_34_2_0_rxpmd_match_id_db[BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_COUNT] = { - { - /* BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */ - .name = "EGRESS_PKT_FWD_L2_HDR_ITAG", - .match = 0x2, - .match_mask = 0x2, - .match_maxbit = 16, - .match_minbit = 14, - .maxbit = 1, - .minbit = 1, - .value = 0x1, - .pmaxbit = 16, - .pminbit = 14, - - }, - { - /* BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */ - .name = "EGRESS_PKT_FWD_L2_HDR_L2", - .match = 0x1, - .match_mask = 0x1, - .match_maxbit = 16, - .match_minbit = 14, - .maxbit = 0, - .minbit = 0, - .value = 0x1, - .pmaxbit = 16, - .pminbit = 14, - - }, - { - /* BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */ - .name = "EGRESS_PKT_FWD_L2_HDR_NONE", - .match = 0x0, - .match_mask = 0x7, - .match_maxbit = 16, - .match_minbit = 14, - .maxbit = 2, - .minbit = 0, - .value = 0x0, - .pmaxbit = 16, - .pminbit = 14, - - }, - { - /* BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */ - .name = "EGRESS_PKT_FWD_L2_HDR_OTAG", - .match = 0x4, - .match_mask = 0x4, - .match_maxbit = 16, - .match_minbit = 14, - .maxbit = 2, - .minbit = 2, - .value = 0x1, - .pmaxbit = 16, - .pminbit = 14, - - }, - { - /* BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_ARP", - .match = 0x80, - .match_mask = 0x18e, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 8, - .minbit = 7, - .value = 0x1, - .pmaxbit = 25, - .pminbit = 17, - - }, - { - /* BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", - .match = 0x1, - .match_mask = 0x1, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 0, - .minbit = 0, - .value = 0x1, - .pmaxbit = 25, - .pminbit = 17, - - }, - { - /* BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_ICMP", - .match = 0x100, - .match_mask = 0x186, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 8, - .minbit = 7, - .value = 0x2, - .pmaxbit = 25, - .pminbit = 17, - - }, - { - /* BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER", - .match = 0x8, - .match_mask = 0x8, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 3, - .minbit = 3, - .value = 0x1, - .pmaxbit = 25, - .pminbit = 17, - - }, - { - /* BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE", - .match = 0x88, - .match_mask = 0x188, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 8, - .minbit = 7, - .value = 0x1, - .pmaxbit = 25, - .pminbit = 17, - - }, - { - /* BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV4", - .match = 0x20, - .match_mask = 0x60, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 6, - .minbit = 5, - .value = 0x1, - .pmaxbit = 25, - .pminbit = 17, - - }, - { - /* BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV6", - .match = 0x40, - .match_mask = 0x60, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 6, - .minbit = 5, - .value = 0x2, - .pmaxbit = 25, - .pminbit = 17, - - }, - { - /* BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_NONE", - .match = 0x0, - .match_mask = 0x1ff, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 8, - .minbit = 0, - .value = 0x0, - .pmaxbit = 25, - .pminbit = 17, - - }, - { - /* BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_RARP", - .match = 0x2, - .match_mask = 0x6, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 2, - .minbit = 1, - .value = 0x1, - .pmaxbit = 25, - .pminbit = 17, - - }, - { - /* BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", - .match = 0x4, - .match_mask = 0x6, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 2, - .minbit = 1, - .value = 0x2, - .pmaxbit = 25, - .pminbit = 17, - - }, - { - /* BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", - .match = 0x10, - .match_mask = 0x10, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 4, - .minbit = 4, - .value = 0x1, - .pmaxbit = 25, - .pminbit = 17, - - }, - { - /* BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_UDP", - .match = 0x6, - .match_mask = 0x6, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 2, - .minbit = 1, - .value = 0x3, - .pmaxbit = 25, - .pminbit = 17, - - }, - { - /* BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", - .match = 0x60, - .match_mask = 0x60, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 6, - .minbit = 5, - .value = 0x3, - .pmaxbit = 25, - .pminbit = 17, - - }, - { - /* BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", - .match = 0x180, - .match_mask = 0x180, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 8, - .minbit = 7, - .value = 0x3, - .pmaxbit = 25, - .pminbit = 17, - - }, - { - /* BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", - .match = 0x106, - .match_mask = 0x186, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 8, - .minbit = 7, - .value = 0x2, - .pmaxbit = 25, - .pminbit = 17, - - }, - { - /* BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", - .match = 0x86, - .match_mask = 0x18e, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 8, - .minbit = 7, - .value = 0x1, - .pmaxbit = 25, - .pminbit = 17, - - }, - { - /* BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH */ - .name = "EGRESS_PKT_SYS_HDR_EP_NIH", - .match = 0x2, - .match_mask = 0x3, - .match_maxbit = 1, - .match_minbit = 0, - .maxbit = 1, - .minbit = 0, - .value = 0x2, - .pmaxbit = 1, - .pminbit = 0, - - }, - { - /* BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK */ - .name = "EGRESS_PKT_SYS_HDR_LOOPBACK", - .match = 0x1, - .match_mask = 0x3, - .match_maxbit = 1, - .match_minbit = 0, - .maxbit = 1, - .minbit = 0, - .value = 0x1, - .pmaxbit = 1, - .pminbit = 0, - - }, - { - /* BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */ - .name = "EGRESS_PKT_SYS_HDR_NONE", - .match = 0x0, - .match_mask = 0x3, - .match_maxbit = 1, - .match_minbit = 0, - .maxbit = 1, - .minbit = 0, - .value = 0x0, - .pmaxbit = 1, - .pminbit = 0, - - }, - { - /* BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */ - .name = "EGRESS_PKT_TUNNEL_L2_HDR_ITAG", - .match = 0x2, - .match_mask = 0x2, - .match_maxbit = 4, - .match_minbit = 2, - .maxbit = 1, - .minbit = 1, - .value = 0x1, - .pmaxbit = 4, - .pminbit = 2, - - }, - { - /* BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */ - .name = "EGRESS_PKT_TUNNEL_L2_HDR_L2", - .match = 0x1, - .match_mask = 0x1, - .match_maxbit = 4, - .match_minbit = 2, - .maxbit = 0, - .minbit = 0, - .value = 0x1, - .pmaxbit = 4, - .pminbit = 2, - - }, - { - /* BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */ - .name = "EGRESS_PKT_TUNNEL_L2_HDR_NONE", - .match = 0x0, - .match_mask = 0x7, - .match_maxbit = 4, - .match_minbit = 2, - .maxbit = 2, - .minbit = 0, - .value = 0x0, - .pmaxbit = 4, - .pminbit = 2, - - }, - { - /* BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */ - .name = "EGRESS_PKT_TUNNEL_L2_HDR_OTAG", - .match = 0x4, - .match_mask = 0x4, - .match_maxbit = 4, - .match_minbit = 2, - .maxbit = 2, - .minbit = 2, - .value = 0x1, - .pmaxbit = 4, - .pminbit = 2, - - }, - { - /* BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", - .match = 0x80, - .match_mask = 0x18e, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 8, - .minbit = 7, - .value = 0x1, - .pmaxbit = 13, - .pminbit = 5, - - }, - { - /* BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", - .match = 0x1, - .match_mask = 0x1, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 0, - .minbit = 0, - .value = 0x1, - .pmaxbit = 13, - .pminbit = 5, - - }, - { - /* BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", - .match = 0x100, - .match_mask = 0x186, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 8, - .minbit = 7, - .value = 0x2, - .pmaxbit = 13, - .pminbit = 5, - - }, - { - /* BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER", - .match = 0x8, - .match_mask = 0x8, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 3, - .minbit = 3, - .value = 0x1, - .pmaxbit = 13, - .pminbit = 5, - - }, - { - /* BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE", - .match = 0x88, - .match_mask = 0x188, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 8, - .minbit = 7, - .value = 0x1, - .pmaxbit = 13, - .pminbit = 5, - - }, - { - /* BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", - .match = 0x20, - .match_mask = 0x60, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 6, - .minbit = 5, - .value = 0x1, - .pmaxbit = 13, - .pminbit = 5, - - }, - { - /* BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", - .match = 0x40, - .match_mask = 0x60, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 6, - .minbit = 5, - .value = 0x2, - .pmaxbit = 13, - .pminbit = 5, - - }, - { - /* BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", - .match = 0x0, - .match_mask = 0x1ff, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 8, - .minbit = 0, - .value = 0x0, - .pmaxbit = 13, - .pminbit = 5, - - }, - { - /* BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", - .match = 0x2, - .match_mask = 0x6, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 2, - .minbit = 1, - .value = 0x1, - .pmaxbit = 13, - .pminbit = 5, - - }, - { - /* BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", - .match = 0x4, - .match_mask = 0x6, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 2, - .minbit = 1, - .value = 0x2, - .pmaxbit = 13, - .pminbit = 5, - - }, - { - /* BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", - .match = 0x10, - .match_mask = 0x10, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 4, - .minbit = 4, - .value = 0x1, - .pmaxbit = 13, - .pminbit = 5, - - }, - { - /* BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", - .match = 0x6, - .match_mask = 0x6, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 2, - .minbit = 1, - .value = 0x3, - .pmaxbit = 13, - .pminbit = 5, - - }, - { - /* BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", - .match = 0x60, - .match_mask = 0x60, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 6, - .minbit = 5, - .value = 0x3, - .pmaxbit = 13, - .pminbit = 5, - - }, - { - /* BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", - .match = 0x180, - .match_mask = 0x180, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 8, - .minbit = 7, - .value = 0x3, - .pmaxbit = 13, - .pminbit = 5, - - }, - { - /* BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", - .match = 0x106, - .match_mask = 0x186, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 8, - .minbit = 7, - .value = 0x2, - .pmaxbit = 13, - .pminbit = 5, - - }, - { - /* BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", - .match = 0x86, - .match_mask = 0x18e, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 8, - .minbit = 7, - .value = 0x1, - .pmaxbit = 13, - .pminbit = 5, - - }, - { - /* BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */ - .name = "INGRESS_PKT_INNER_L2_HDR_ITAG", - .match = 0x2, - .match_mask = 0x2, - .match_maxbit = 16, - .match_minbit = 14, - .maxbit = 1, - .minbit = 1, - .value = 0x1, - .pmaxbit = 16, - .pminbit = 14, - .zone_minbit = 11, - .arc_id_mask = 0x3800, - .num_zone_bmp_words = 1, - .zone_bmp = bcm78800_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_itag, - - }, - { - /* BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */ - .name = "INGRESS_PKT_INNER_L2_HDR_L2", - .match = 0x1, - .match_mask = 0x1, - .match_maxbit = 16, - .match_minbit = 14, - .maxbit = 0, - .minbit = 0, - .value = 0x1, - .pmaxbit = 16, - .pminbit = 14, - .zone_minbit = 11, - .arc_id_mask = 0x3800, - .num_zone_bmp_words = 1, - .zone_bmp = bcm78800_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_l2, - - }, - { - /* BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */ - .name = "INGRESS_PKT_INNER_L2_HDR_NONE", - .match = 0x0, - .match_mask = 0x7, - .match_maxbit = 16, - .match_minbit = 14, - .maxbit = 2, - .minbit = 0, - .value = 0x0, - .pmaxbit = 16, - .pminbit = 14, - .zone_minbit = 11, - .arc_id_mask = 0x3800, - - }, - { - /* BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */ - .name = "INGRESS_PKT_INNER_L2_HDR_OTAG", - .match = 0x4, - .match_mask = 0x4, - .match_maxbit = 16, - .match_minbit = 14, - .maxbit = 2, - .minbit = 2, - .value = 0x1, - .pmaxbit = 16, - .pminbit = 14, - .zone_minbit = 11, - .arc_id_mask = 0x3800, - .num_zone_bmp_words = 1, - .zone_bmp = bcm78800_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_otag, - - }, - { - /* BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_ARP", - .match = 0x80, - .match_mask = 0x18e, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 8, - .minbit = 7, - .value = 0x1, - .pmaxbit = 25, - .pminbit = 17, - .zone_minbit = 14, - .arc_id_mask = 0x7c000, - .num_zone_bmp_words = 1, - .zone_bmp = bcm78800_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_arp, - - }, - { - /* BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", - .match = 0x1, - .match_mask = 0x1, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 0, - .minbit = 0, - .value = 0x1, - .pmaxbit = 25, - .pminbit = 17, - .zone_minbit = 14, - .arc_id_mask = 0x7c000, - .num_zone_bmp_words = 1, - .zone_bmp = bcm78800_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ethertype, - - }, - { - /* BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_ICMP", - .match = 0x100, - .match_mask = 0x186, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 8, - .minbit = 7, - .value = 0x2, - .pmaxbit = 25, - .pminbit = 17, - .zone_minbit = 14, - .arc_id_mask = 0x7c000, - .num_zone_bmp_words = 1, - .zone_bmp = bcm78800_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_icmp, - - }, - { - /* BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_IFA_HEADER", - .match = 0x8, - .match_mask = 0x8, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 3, - .minbit = 3, - .value = 0x1, - .pmaxbit = 25, - .pminbit = 17, - .zone_minbit = 14, - .arc_id_mask = 0x7c000, - .num_zone_bmp_words = 1, - .zone_bmp = bcm78800_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_header, - - }, - { - /* BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_IFA_METADATA_BASE", - .match = 0x88, - .match_mask = 0x188, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 8, - .minbit = 7, - .value = 0x1, - .pmaxbit = 25, - .pminbit = 17, - .zone_minbit = 14, - .arc_id_mask = 0x7c000, - .num_zone_bmp_words = 1, - .zone_bmp = bcm78800_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ifa_metadata_base, - - }, - { - /* BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV4", - .match = 0x20, - .match_mask = 0x60, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 6, - .minbit = 5, - .value = 0x1, - .pmaxbit = 25, - .pminbit = 17, - .zone_minbit = 14, - .arc_id_mask = 0x7c000, - .num_zone_bmp_words = 1, - .zone_bmp = bcm78800_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv4, - - }, - { - /* BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV6", - .match = 0x40, - .match_mask = 0x60, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 6, - .minbit = 5, - .value = 0x2, - .pmaxbit = 25, - .pminbit = 17, - .zone_minbit = 14, - .arc_id_mask = 0x7c000, - .num_zone_bmp_words = 1, - .zone_bmp = bcm78800_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv6, - - }, - { - /* BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_NONE", - .match = 0x0, - .match_mask = 0x1ff, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 8, - .minbit = 0, - .value = 0x0, - .pmaxbit = 25, - .pminbit = 17, - .zone_minbit = 14, - .arc_id_mask = 0x7c000, - - }, - { - /* BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_RARP", - .match = 0x2, - .match_mask = 0x6, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 2, - .minbit = 1, - .value = 0x1, - .pmaxbit = 25, - .pminbit = 17, - .zone_minbit = 14, - .arc_id_mask = 0x7c000, - .num_zone_bmp_words = 1, - .zone_bmp = bcm78800_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rarp, - - }, - { - /* BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", - .match = 0x4, - .match_mask = 0x6, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 2, - .minbit = 1, - .value = 0x2, - .pmaxbit = 25, - .pminbit = 17, - .zone_minbit = 14, - .arc_id_mask = 0x7c000, - .num_zone_bmp_words = 1, - .zone_bmp = bcm78800_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_first_4bytes, - - }, - { - /* BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", - .match = 0x10, - .match_mask = 0x10, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 4, - .minbit = 4, - .value = 0x1, - .pmaxbit = 25, - .pminbit = 17, - .zone_minbit = 14, - .arc_id_mask = 0x7c000, - .num_zone_bmp_words = 1, - .zone_bmp = bcm78800_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_last_16bytes, - - }, - { - /* BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_UDP", - .match = 0x6, - .match_mask = 0x6, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 2, - .minbit = 1, - .value = 0x3, - .pmaxbit = 25, - .pminbit = 17, - .zone_minbit = 14, - .arc_id_mask = 0x7c000, - .num_zone_bmp_words = 1, - .zone_bmp = bcm78800_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_udp, - - }, - { - /* BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", - .match = 0x60, - .match_mask = 0x60, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 6, - .minbit = 5, - .value = 0x3, - .pmaxbit = 25, - .pminbit = 17, - .zone_minbit = 14, - .arc_id_mask = 0x7c000, - .num_zone_bmp_words = 1, - .zone_bmp = bcm78800_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l3, - - }, - { - /* BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", - .match = 0x180, - .match_mask = 0x180, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 8, - .minbit = 7, - .value = 0x3, - .pmaxbit = 25, - .pminbit = 17, - .zone_minbit = 14, - .arc_id_mask = 0x7c000, - .num_zone_bmp_words = 1, - .zone_bmp = bcm78800_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l4, - - }, - { - /* BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", - .match = 0x106, - .match_mask = 0x186, - .match_maxbit = 25, - .match_minbit = 17, - .maxbit = 8, - .minbit = 7, - .value = 0x2, - .pmaxbit = 25, - .pminbit = 17, - .zone_minbit = 14, - .arc_id_mask = 0x7c000, - .num_zone_bmp_words = 1, - .zone_bmp = bcm78800_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l5, - - }, - { - /* BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */ - .name = "INGRESS_PKT_OUTER_L2_HDR_ITAG", - .match = 0x2, - .match_mask = 0x2, - .match_maxbit = 4, - .match_minbit = 2, - .maxbit = 1, - .minbit = 1, - .value = 0x1, - .pmaxbit = 4, - .pminbit = 2, - .zone_minbit = 2, - .arc_id_mask = 0x1c, - .num_zone_bmp_words = 1, - .zone_bmp = bcm78800_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_itag, - - }, - { - /* BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */ - .name = "INGRESS_PKT_OUTER_L2_HDR_L2", - .match = 0x1, - .match_mask = 0x1, - .match_maxbit = 4, - .match_minbit = 2, - .maxbit = 0, - .minbit = 0, - .value = 0x1, - .pmaxbit = 4, - .pminbit = 2, - .zone_minbit = 2, - .arc_id_mask = 0x1c, - .num_zone_bmp_words = 1, - .zone_bmp = bcm78800_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_l2, - - }, - { - /* BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */ - .name = "INGRESS_PKT_OUTER_L2_HDR_NONE", - .match = 0x0, - .match_mask = 0x7, - .match_maxbit = 4, - .match_minbit = 2, - .maxbit = 2, - .minbit = 0, - .value = 0x0, - .pmaxbit = 4, - .pminbit = 2, - .zone_minbit = 2, - .arc_id_mask = 0x1c, - - }, - { - /* BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */ - .name = "INGRESS_PKT_OUTER_L2_HDR_OTAG", - .match = 0x4, - .match_mask = 0x4, - .match_maxbit = 4, - .match_minbit = 2, - .maxbit = 2, - .minbit = 2, - .value = 0x1, - .pmaxbit = 4, - .pminbit = 2, - .zone_minbit = 2, - .arc_id_mask = 0x1c, - .num_zone_bmp_words = 1, - .zone_bmp = bcm78800_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_otag, - - }, - { - /* BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ARP", - .match = 0x80, - .match_mask = 0x18e, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 8, - .minbit = 7, - .value = 0x1, - .pmaxbit = 13, - .pminbit = 5, - .zone_minbit = 5, - .arc_id_mask = 0x7e0, - .num_zone_bmp_words = 1, - .zone_bmp = bcm78800_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_arp, - - }, - { - /* BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", - .match = 0x1, - .match_mask = 0x1, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 0, - .minbit = 0, - .value = 0x1, - .pmaxbit = 13, - .pminbit = 5, - .zone_minbit = 5, - .arc_id_mask = 0x7e0, - .num_zone_bmp_words = 2, - .zone_bmp = bcm78800_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ethertype, - - }, - { - /* BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", - .match = 0x100, - .match_mask = 0x186, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 8, - .minbit = 7, - .value = 0x2, - .pmaxbit = 13, - .pminbit = 5, - .zone_minbit = 5, - .arc_id_mask = 0x7e0, - .num_zone_bmp_words = 1, - .zone_bmp = bcm78800_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_icmp, - - }, - { - /* BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER", - .match = 0x8, - .match_mask = 0x8, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 3, - .minbit = 3, - .value = 0x1, - .pmaxbit = 13, - .pminbit = 5, - .zone_minbit = 5, - .arc_id_mask = 0x7e0, - .num_zone_bmp_words = 1, - .zone_bmp = bcm78800_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_header, - - }, - { - /* BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE", - .match = 0x88, - .match_mask = 0x188, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 8, - .minbit = 7, - .value = 0x1, - .pmaxbit = 13, - .pminbit = 5, - .zone_minbit = 5, - .arc_id_mask = 0x7e0, - .num_zone_bmp_words = 1, - .zone_bmp = bcm78800_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_metadata_base, - - }, - { - /* BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", - .match = 0x20, - .match_mask = 0x60, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 6, - .minbit = 5, - .value = 0x1, - .pmaxbit = 13, - .pminbit = 5, - .zone_minbit = 5, - .arc_id_mask = 0x7e0, - .num_zone_bmp_words = 1, - .zone_bmp = bcm78800_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv4, - - }, - { - /* BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", - .match = 0x40, - .match_mask = 0x60, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 6, - .minbit = 5, - .value = 0x2, - .pmaxbit = 13, - .pminbit = 5, - .zone_minbit = 5, - .arc_id_mask = 0x7e0, - .num_zone_bmp_words = 2, - .zone_bmp = bcm78800_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv6, - - }, - { - /* BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_NONE", - .match = 0x0, - .match_mask = 0x1ff, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 8, - .minbit = 0, - .value = 0x0, - .pmaxbit = 13, - .pminbit = 5, - .zone_minbit = 5, - .arc_id_mask = 0x7e0, - - }, - { - /* BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_RARP", - .match = 0x2, - .match_mask = 0x6, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 2, - .minbit = 1, - .value = 0x1, - .pmaxbit = 13, - .pminbit = 5, - .zone_minbit = 5, - .arc_id_mask = 0x7e0, - .num_zone_bmp_words = 2, - .zone_bmp = bcm78800_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rarp, - - }, - { - /* BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", - .match = 0x4, - .match_mask = 0x6, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 2, - .minbit = 1, - .value = 0x2, - .pmaxbit = 13, - .pminbit = 5, - .zone_minbit = 5, - .arc_id_mask = 0x7e0, - .num_zone_bmp_words = 2, - .zone_bmp = bcm78800_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_first_4bytes, - - }, - { - /* BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", - .match = 0x10, - .match_mask = 0x10, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 4, - .minbit = 4, - .value = 0x1, - .pmaxbit = 13, - .pminbit = 5, - .zone_minbit = 5, - .arc_id_mask = 0x7e0, - .num_zone_bmp_words = 2, - .zone_bmp = bcm78800_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_last_16bytes, - - }, - { - /* BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UDP", - .match = 0x6, - .match_mask = 0x6, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 2, - .minbit = 1, - .value = 0x3, - .pmaxbit = 13, - .pminbit = 5, - .zone_minbit = 5, - .arc_id_mask = 0x7e0, - .num_zone_bmp_words = 2, - .zone_bmp = bcm78800_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_udp, - - }, - { - /* BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", - .match = 0x60, - .match_mask = 0x60, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 6, - .minbit = 5, - .value = 0x3, - .pmaxbit = 13, - .pminbit = 5, - .zone_minbit = 5, - .arc_id_mask = 0x7e0, - .num_zone_bmp_words = 2, - .zone_bmp = bcm78800_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l3, - - }, - { - /* BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", - .match = 0x180, - .match_mask = 0x180, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 8, - .minbit = 7, - .value = 0x3, - .pmaxbit = 13, - .pminbit = 5, - .zone_minbit = 5, - .arc_id_mask = 0x7e0, - .num_zone_bmp_words = 2, - .zone_bmp = bcm78800_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l4, - - }, - { - /* BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", - .match = 0x106, - .match_mask = 0x186, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 8, - .minbit = 7, - .value = 0x2, - .pmaxbit = 13, - .pminbit = 5, - .zone_minbit = 5, - .arc_id_mask = 0x7e0, - .num_zone_bmp_words = 2, - .zone_bmp = bcm78800_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l5, - - }, - { - /* BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", - .match = 0x86, - .match_mask = 0x18e, - .match_maxbit = 13, - .match_minbit = 5, - .maxbit = 8, - .minbit = 7, - .value = 0x1, - .pmaxbit = 13, - .pminbit = 5, - .zone_minbit = 5, - .arc_id_mask = 0x7e0, - .num_zone_bmp_words = 2, - .zone_bmp = bcm78800_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_vxlan, - - }, - { - /* BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH */ - .name = "INGRESS_PKT_SYS_HDR_EP_NIH", - .match = 0x2, - .match_mask = 0x3, - .match_maxbit = 1, - .match_minbit = 0, - .maxbit = 1, - .minbit = 0, - .value = 0x2, - .pmaxbit = 1, - .pminbit = 0, - .zone_minbit = 0, - .arc_id_mask = 0x3, - .num_zone_bmp_words = 1, - .zone_bmp = bcm78800_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_sys_hdr_ep_nih, - - }, - { - /* BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK */ - .name = "INGRESS_PKT_SYS_HDR_LOOPBACK", - .match = 0x1, - .match_mask = 0x3, - .match_maxbit = 1, - .match_minbit = 0, - .maxbit = 1, - .minbit = 0, - .value = 0x1, - .pmaxbit = 1, - .pminbit = 0, - .zone_minbit = 0, - .arc_id_mask = 0x3, - .num_zone_bmp_words = 1, - .zone_bmp = bcm78800_a0_cna_6_5_34_2_0_rxpmd_arc_ingress_pkt_sys_hdr_loopback, - - }, - { - /* BCM78800_A0_CNA_6_5_34_2_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */ - .name = "INGRESS_PKT_SYS_HDR_NONE", - .match = 0x0, - .match_mask = 0x3, - .match_maxbit = 1, - .match_minbit = 0, - .maxbit = 1, - .minbit = 0, - .value = 0x0, - .pmaxbit = 1, - .pminbit = 0, - .zone_minbit = 0, - .arc_id_mask = 0x3, - - }, -}; - -static bcmpkt_rxpmd_match_id_db_info_t bcm78800_a0_cna_6_5_34_2_0_rxpmd_match_id_db_info = { - .num_entries = 85, - .db = bcm78800_a0_cna_6_5_34_2_0_rxpmd_match_id_db -}; -bcmpkt_rxpmd_match_id_db_info_t * bcm78800_a0_cna_6_5_34_2_0_rxpmd_match_id_db_info_get(void) { - return &bcm78800_a0_cna_6_5_34_2_0_rxpmd_match_id_db_info; -} - -static shr_enum_map_t bcm78800_a0_cna_6_5_34_2_0_rxpmd_match_id_map[] = { - BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_rxpmd_match_id_map_info_t bcm78800_a0_cna_6_5_34_2_0_rxpmd_match_id_map_info = { - .num_entries = 85, - .map = bcm78800_a0_cna_6_5_34_2_0_rxpmd_match_id_map -}; - -bcmpkt_rxpmd_match_id_map_info_t * bcm78800_a0_cna_6_5_34_2_0_rxpmd_match_id_map_info_get(void) { - return &bcm78800_a0_cna_6_5_34_2_0_rxpmd_match_id_map_info; -} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm78800_a0/cna_6_5_34_2_0/bcm78800_a0_cna_6_5_34_2_0_pkt_flexhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm78800_a0/cna_6_5_34_2_0/bcm78800_a0_cna_6_5_34_2_0_pkt_flexhdr.c deleted file mode 100644 index f601c977432..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm78800_a0/cna_6_5_34_2_0/bcm78800_a0_cna_6_5_34_2_0_pkt_flexhdr.c +++ /dev/null @@ -1,4620 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) map.yml - * for device bcm78800_a0 and variant cna_6_5_34_2_0. - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - -#include -#include -#include -#include -#include -#include -#include - -#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) -#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) -#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) -#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) - -static void bcm78800_a0_cna_6_5_34_2_0_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons) -{ - uint32_t *reason = data + 0; - - if (reason[13] & (0x1 << 0)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU); - } - if (reason[13] & (0x1 << 1)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS); - } - if (reason[13] & (0x1 << 2)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE); - } - if (reason[13] & (0x1 << 3)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD); - } - if (reason[13] & (0x1 << 4)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST); - } - if (reason[13] & (0x1 << 5)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED); - } - if (reason[13] & (0x1 << 6)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT); - } - if (reason[13] & (0x1 << 7)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED); - } - if (reason[13] & (0x1 << 8)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED); - } - if (reason[13] & (0x1 << 9)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS); - } - if (reason[13] & (0x1 << 10)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP); - } - if (reason[13] & (0x1 << 11)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS); - } - if (reason[13] & (0x1 << 12)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP); - } - if (reason[13] & (0x1 << 13)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR); - } - if (reason[13] & (0x1 << 14)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR); - } - if (reason[13] & (0x1 << 16)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL); - } - if (reason[13] & (0x1 << 17)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_VFP); - } - if (reason[13] & (0x1 << 18)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP); - } - if (reason[13] & (0x1 << 19)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER); - } - if (reason[13] & (0x1 << 22)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT); - } - if (reason[13] & (0x1 << 23)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT); - } - if (reason[13] & (0x1 << 24)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED); - } - if (reason[13] & (0x1 << 25)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED); - } - if (reason[13] & (0x1 << 26)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP); - } - if (reason[12] & (0x1 << 15)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP); - } -} - -static void bcm78800_a0_cna_6_5_34_2_0_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data) -{ - uint32_t *reason = data + 0; - - reason[13] = 0; - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_NO_COPY_TO_CPU)) { - reason[13] |= (0x1 << 0); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) { - reason[13] |= (0x1 << 1); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) { - reason[13] |= (0x1 << 2); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_DISCARD)) { - reason[13] |= (0x1 << 3); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MACSA_MULTICAST)) { - reason[13] |= (0x1 << 4); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_PKT_INTEGRITY_CHECK_FAILED)) { - reason[13] |= (0x1 << 5); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) { - reason[13] |= (0x1 << 6); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_CHECK_FAILED)) { - reason[13] |= (0x1 << 7); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_SPANNING_TREE_CHECK_FAILED)) { - reason[13] |= (0x1 << 8); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) { - reason[13] |= (0x1 << 9); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) { - reason[13] |= (0x1 << 10); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) { - reason[13] |= (0x1 << 11); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) { - reason[13] |= (0x1 << 12); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) { - reason[13] |= (0x1 << 13); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) { - reason[13] |= (0x1 << 14); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) { - reason[13] |= (0x1 << 16); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_VFP)) { - reason[13] |= (0x1 << 17); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP)) { - reason[13] |= (0x1 << 18); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) { - reason[13] |= (0x1 << 19); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT)) { - reason[13] |= (0x1 << 22); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_IVXLT)) { - reason[13] |= (0x1 << 23); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_SAMPLED)) { - reason[13] |= (0x1 << 24); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_MIRROR_SAMPLER_EGR_SAMPLED)) { - reason[13] |= (0x1 << 25); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP)) { - reason[13] |= (0x1 << 26); - } - reason[12] = 0; - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) { - reason[12] |= (0x1 << 15); - } -} - -static bcmpkt_flex_field_metadata_t bcm78800_a0_cna_6_5_34_2_0_rxpmd_flex_field_data[] = { - { - .name = "DROP_CODE_15_0", - .fid = BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 48, 63 }, /* Profile 2. */ - { -1, -1 }, /* Profile 3. */ - { 48, 63 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "DVP_15_0", - .fid = BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_DVP_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 128, 143 }, /* Profile 2. */ - { 128, 143 }, /* Profile 3. */ - { 128, 143 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "EFFECTIVE_TTL_7_0", - .fid = BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_EFFECTIVE_TTL_7_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 256, 263 }, /* Profile 2. */ - { 256, 263 }, /* Profile 3. */ - { 256, 263 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "ENTROPY_LABEL_HIGH_3_0", - .fid = BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_HIGH_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 400, 403 }, /* Profile 2. */ - { 400, 403 }, /* Profile 3. */ - { 400, 403 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "ENTROPY_LABEL_LOW_15_0", - .fid = BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_LOW_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 288, 303 }, /* Profile 2. */ - { 288, 303 }, /* Profile 3. */ - { 288, 303 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "EP_NIH_HDR_DROP_CODE_15_0", - .fid = BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_DROP_CODE_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { -1, -1 }, /* Profile 2. */ - { 48, 63 }, /* Profile 3. */ - }, - .profile_cnt = 4, - }, - { - .name = "EP_NIH_HDR_RECIRC_CODE_3_0", - .fid = BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_RECIRC_CODE_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 384, 387 }, /* Profile 2. */ - { 384, 387 }, /* Profile 3. */ - { 384, 387 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "EP_NIH_HDR_TIMESTAMP_15_0", - .fid = BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 144, 159 }, /* Profile 2. */ - { 144, 159 }, /* Profile 3. */ - }, - .profile_cnt = 4, - }, - { - .name = "EP_NIH_HDR_TIMESTAMP_31_16", - .fid = BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 160, 175 }, /* Profile 2. */ - { 160, 175 }, /* Profile 3. */ - }, - .profile_cnt = 4, - }, - { - .name = "ERSPAN3_GBP_SID_15_0", - .fid = BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_ERSPAN3_GBP_SID_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 272, 287 }, /* Profile 2. */ - { 272, 287 }, /* Profile 3. */ - { 272, 287 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "EVENT_TRACE_VECTOR_15_0", - .fid = BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 0, 15 }, /* Profile 2. */ - { 0, 15 }, /* Profile 3. */ - { 0, 15 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "EVENT_TRACE_VECTOR_31_16", - .fid = BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_31_16, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 16, 31 }, /* Profile 2. */ - { 16, 31 }, /* Profile 3. */ - { 16, 31 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "EVENT_TRACE_VECTOR_47_32", - .fid = BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_47_32, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 32, 47 }, /* Profile 2. */ - { 32, 47 }, /* Profile 3. */ - { 32, 47 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "I2E_CLASS_ID_15_0", - .fid = BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_I2E_CLASS_ID_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 192, 207 }, /* Profile 2. */ - { 192, 207 }, /* Profile 3. */ - { 192, 207 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "IFP_IOAM_GBP_ACTION_3_0", - .fid = BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_IFP_IOAM_GBP_ACTION_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 408, 411 }, /* Profile 2. */ - { 408, 411 }, /* Profile 3. */ - { 408, 411 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "IFP_TS_CONTROL_ACTION_3_0", - .fid = BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_IFP_TS_CONTROL_ACTION_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 420, 423 }, /* Profile 2. */ - { 420, 423 }, /* Profile 3. */ - { 420, 423 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "ING_TIMESTAMP_15_0", - .fid = BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { -1, -1 }, /* Profile 2. */ - { -1, -1 }, /* Profile 3. */ - { 144, 159 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "ING_TIMESTAMP_31_16", - .fid = BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { -1, -1 }, /* Profile 2. */ - { -1, -1 }, /* Profile 3. */ - { 160, 175 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "INGRESS_PP_PORT_7_0", - .fid = BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_INGRESS_PP_PORT_7_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 208, 215 }, /* Profile 2. */ - { 208, 215 }, /* Profile 3. */ - { 208, 215 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0", - .fid = BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMAP_VALUE_OR_IFP_OPAQUE_OBJ_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 304, 319 }, /* Profile 2. */ - { 304, 319 }, /* Profile 3. */ - { 304, 319 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "INGRESS_QOS_REMARK_CTRL_3_0", - .fid = BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_INGRESS_QOS_REMARK_CTRL_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 412, 415 }, /* Profile 2. */ - { 412, 415 }, /* Profile 3. */ - { 412, 415 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "INT_PRI_3_0", - .fid = BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 424, 427 }, /* Profile 2. */ - { 424, 427 }, /* Profile 3. */ - { 424, 427 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "L2_IIF_11_0", - .fid = BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_L2_IIF_11_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 320, 331 }, /* Profile 2. */ - { 320, 331 }, /* Profile 3. */ - { 320, 331 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "L2_OIF_11_0", - .fid = BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_L2_OIF_11_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 96, 107 }, /* Profile 2. */ - { 96, 107 }, /* Profile 3. */ - { 96, 107 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "L3_IIF_13_0", - .fid = BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_L3_IIF_13_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 352, 365 }, /* Profile 2. */ - { 352, 365 }, /* Profile 3. */ - { 352, 365 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "L3_OIF_1_13_0", - .fid = BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_13_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 112, 125 }, /* Profile 2. */ - { 112, 125 }, /* Profile 3. */ - { 112, 125 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "NHOP_2_OR_ECMP_GROUP_INDEX_1_14_0", - .fid = BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_NHOP_2_OR_ECMP_GROUP_INDEX_1_14_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 368, 382 }, /* Profile 2. */ - { 368, 382 }, /* Profile 3. */ - { 368, 382 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "NHOP_INDEX_1_14_0", - .fid = BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_14_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 176, 190 }, /* Profile 2. */ - { 176, 190 }, /* Profile 3. */ - { 176, 190 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "PARSER_VHLEN_0_15_0", - .fid = BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 64, 79 }, /* Profile 2. */ - { 64, 79 }, /* Profile 3. */ - { 64, 79 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "PKT_MISC_CTRL_0_3_0", - .fid = BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 404, 407 }, /* Profile 2. */ - { 404, 407 }, /* Profile 3. */ - { 404, 407 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "SVP_15_0", - .fid = BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_SVP_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 336, 351 }, /* Profile 2. */ - { 336, 351 }, /* Profile 3. */ - { 336, 351 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "SVP_NETWORK_GROUP_BITMAP_3_0", - .fid = BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_SVP_NETWORK_GROUP_BITMAP_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 428, 431 }, /* Profile 2. */ - { 428, 431 }, /* Profile 3. */ - { 428, 431 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "SYSTEM_DESTINATION_15_0", - .fid = BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_DESTINATION_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 240, 255 }, /* Profile 2. */ - { 240, 255 }, /* Profile 3. */ - { 240, 255 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "SYSTEM_OPCODE_3_0", - .fid = BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 396, 399 }, /* Profile 2. */ - { 396, 399 }, /* Profile 3. */ - { 396, 399 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "SYSTEM_SOURCE_15_0", - .fid = BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_SYSTEM_SOURCE_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 224, 239 }, /* Profile 2. */ - { 224, 239 }, /* Profile 3. */ - { 224, 239 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "TAG_ACTION_CTRL_1_0", - .fid = BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_TAG_ACTION_CTRL_1_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 416, 417 }, /* Profile 2. */ - { 416, 417 }, /* Profile 3. */ - { 416, 417 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "TIMESTAMP_CTRL_3_0", - .fid = BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_TIMESTAMP_CTRL_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 388, 391 }, /* Profile 2. */ - { 388, 391 }, /* Profile 3. */ - { 388, 391 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "TUNNEL_PROCESSING_RESULTS_1_3_0", - .fid = BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_TUNNEL_PROCESSING_RESULTS_1_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 392, 395 }, /* Profile 2. */ - { 392, 395 }, /* Profile 3. */ - { 392, 395 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, - { - .name = "VFI_15_0", - .fid = BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_VFI_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 80, 95 }, /* Profile 2. */ - { 80, 95 }, /* Profile 3. */ - { 80, 95 }, /* Profile 4. */ - }, - .profile_cnt = 5, - }, -}; -static bcmpkt_flex_field_info_t bcm78800_a0_cna_6_5_34_2_0_rxpmd_flex_field_info = { - .num_fields = BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_FID_COUNT, - .info = bcm78800_a0_cna_6_5_34_2_0_rxpmd_flex_field_data, - .profile_bmp_cnt = 1, - .profile_bmp[0] = 0x1c, - -}; - -static shr_enum_map_t bcm78800_a0_cna_6_5_34_2_0_rxpmd_flex_reason_names[] = { - BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT -}; - -static bcmpkt_flex_reasons_info_t bcm78800_a0_cna_6_5_34_2_0_rxpmd_flex_reasons_info = { - .num_reasons = BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RXPMD_FLEX_REASON_COUNT, - .reason_names = bcm78800_a0_cna_6_5_34_2_0_rxpmd_flex_reason_names, - .reason_encode = bcm78800_a0_cna_6_5_34_2_0_rxpmd_flex_reason_encode, - .reason_decode = bcm78800_a0_cna_6_5_34_2_0_rxpmd_flex_reason_decode, -}; - - -static int32_t bcmpkt_arp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 24, 8); - - return ret; -} - -static int32_t bcmpkt_arp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_arp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_arp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_arp_t_operation_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 16); - - return ret; -} - -static int32_t bcmpkt_arp_t_operation_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_arp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 8); - - return ret; -} - -static int32_t bcmpkt_arp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_arp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_arp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_arp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_arp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_arp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_arp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_arp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_arp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_arp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_arp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm78800_a0_cna_6_5_34_2_0_arp_t_fget[BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_FID_COUNT] = { - bcmpkt_arp_t_hardware_len_get, - bcmpkt_arp_t_hardware_type_get, - bcmpkt_arp_t_operation_get, - bcmpkt_arp_t_prot_addr_len_get, - bcmpkt_arp_t_protocol_type_get, - bcmpkt_arp_t_sender_ha_get, - bcmpkt_arp_t_sender_ip_get, - bcmpkt_arp_t_target_ha_get, - bcmpkt_arp_t_target_ip_get, -}; - -bcmpkt_flex_field_set_f bcm78800_a0_cna_6_5_34_2_0_arp_t_fset[BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_FID_COUNT] = { - bcmpkt_arp_t_hardware_len_set, - bcmpkt_arp_t_hardware_type_set, - bcmpkt_arp_t_operation_set, - bcmpkt_arp_t_prot_addr_len_set, - bcmpkt_arp_t_protocol_type_set, - bcmpkt_arp_t_sender_ha_set, - bcmpkt_arp_t_sender_ip_set, - bcmpkt_arp_t_target_ha_set, - bcmpkt_arp_t_target_ip_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78800_a0_cna_6_5_34_2_0_arp_t_field_data[] = { - BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78800_a0_cna_6_5_34_2_0_arp_t_field_info = { - .num_fields = BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ARP_T_FID_COUNT, - .info = bcm78800_a0_cna_6_5_34_2_0_arp_t_field_data, -}; - - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm78800_a0_cna_6_5_34_2_0_cpu_composites_0_t_fget[BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { - bcmpkt_cpu_composites_0_t_dma_cont0_get, - bcmpkt_cpu_composites_0_t_dma_cont1_get, - bcmpkt_cpu_composites_0_t_dma_cont2_get, - bcmpkt_cpu_composites_0_t_dma_cont3_get, - bcmpkt_cpu_composites_0_t_dma_cont4_get, - bcmpkt_cpu_composites_0_t_dma_cont5_get, - bcmpkt_cpu_composites_0_t_dma_cont6_get, -}; - -bcmpkt_flex_field_set_f bcm78800_a0_cna_6_5_34_2_0_cpu_composites_0_t_fset[BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { - bcmpkt_cpu_composites_0_t_dma_cont0_set, - bcmpkt_cpu_composites_0_t_dma_cont1_set, - bcmpkt_cpu_composites_0_t_dma_cont2_set, - bcmpkt_cpu_composites_0_t_dma_cont3_set, - bcmpkt_cpu_composites_0_t_dma_cont4_set, - bcmpkt_cpu_composites_0_t_dma_cont5_set, - bcmpkt_cpu_composites_0_t_dma_cont6_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78800_a0_cna_6_5_34_2_0_cpu_composites_0_t_field_data[] = { - BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78800_a0_cna_6_5_34_2_0_cpu_composites_0_t_field_info = { - .num_fields = BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT, - .info = bcm78800_a0_cna_6_5_34_2_0_cpu_composites_0_t_field_data, -}; - - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm78800_a0_cna_6_5_34_2_0_cpu_composites_1_t_fget[BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { - bcmpkt_cpu_composites_1_t_dma_cont10_get, - bcmpkt_cpu_composites_1_t_dma_cont11_get, - bcmpkt_cpu_composites_1_t_dma_cont12_get, - bcmpkt_cpu_composites_1_t_dma_cont13_get, - bcmpkt_cpu_composites_1_t_dma_cont14_get, - bcmpkt_cpu_composites_1_t_dma_cont15_get, - bcmpkt_cpu_composites_1_t_dma_cont16_get, - bcmpkt_cpu_composites_1_t_dma_cont17_get, - bcmpkt_cpu_composites_1_t_dma_cont7_get, - bcmpkt_cpu_composites_1_t_dma_cont8_get, - bcmpkt_cpu_composites_1_t_dma_cont9_get, -}; - -bcmpkt_flex_field_set_f bcm78800_a0_cna_6_5_34_2_0_cpu_composites_1_t_fset[BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { - bcmpkt_cpu_composites_1_t_dma_cont10_set, - bcmpkt_cpu_composites_1_t_dma_cont11_set, - bcmpkt_cpu_composites_1_t_dma_cont12_set, - bcmpkt_cpu_composites_1_t_dma_cont13_set, - bcmpkt_cpu_composites_1_t_dma_cont14_set, - bcmpkt_cpu_composites_1_t_dma_cont15_set, - bcmpkt_cpu_composites_1_t_dma_cont16_set, - bcmpkt_cpu_composites_1_t_dma_cont17_set, - bcmpkt_cpu_composites_1_t_dma_cont7_set, - bcmpkt_cpu_composites_1_t_dma_cont8_set, - bcmpkt_cpu_composites_1_t_dma_cont9_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78800_a0_cna_6_5_34_2_0_cpu_composites_1_t_field_data[] = { - BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78800_a0_cna_6_5_34_2_0_cpu_composites_1_t_field_info = { - .num_fields = BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT, - .info = bcm78800_a0_cna_6_5_34_2_0_cpu_composites_1_t_field_data, -}; - - -static int32_t bcmpkt_ep_nih_header_t_header_subtype_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 20, 4); - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_header_subtype_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 20, 4, val); - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_header_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 6); - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_header_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 6, val); - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 8, 4); - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 8, 4, val); - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 20, 4); - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 20, 4, val); - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 4); - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 4, val); - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[3], 16, 16); - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[3], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[3], 0, 16); - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[3], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 4); - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 4, val); - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 12, 4); - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 12, 4, val); - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_start_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 30, 2); - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_start_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 30, 2, val); - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm78800_a0_cna_6_5_34_2_0_ep_nih_header_t_fget[BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = { - bcmpkt_ep_nih_header_t_header_subtype_get, - bcmpkt_ep_nih_header_t_header_type_get, - bcmpkt_ep_nih_header_t_opaque_ctrl_a_get, - bcmpkt_ep_nih_header_t_opaque_ctrl_b_get, - bcmpkt_ep_nih_header_t_opaque_ctrl_c_get, - bcmpkt_ep_nih_header_t_opaque_object_a_get, - bcmpkt_ep_nih_header_t_opaque_object_b_get, - bcmpkt_ep_nih_header_t_opaque_object_c_get, - bcmpkt_ep_nih_header_t_recirc_profile_index_get, - bcmpkt_ep_nih_header_t_reserved_0_get, - bcmpkt_ep_nih_header_t_start_get, - bcmpkt_ep_nih_header_t_timestamp_get, -}; - -bcmpkt_flex_field_set_f bcm78800_a0_cna_6_5_34_2_0_ep_nih_header_t_fset[BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = { - bcmpkt_ep_nih_header_t_header_subtype_set, - bcmpkt_ep_nih_header_t_header_type_set, - bcmpkt_ep_nih_header_t_opaque_ctrl_a_set, - bcmpkt_ep_nih_header_t_opaque_ctrl_b_set, - bcmpkt_ep_nih_header_t_opaque_ctrl_c_set, - bcmpkt_ep_nih_header_t_opaque_object_a_set, - bcmpkt_ep_nih_header_t_opaque_object_b_set, - bcmpkt_ep_nih_header_t_opaque_object_c_set, - bcmpkt_ep_nih_header_t_recirc_profile_index_set, - bcmpkt_ep_nih_header_t_reserved_0_set, - bcmpkt_ep_nih_header_t_start_set, - bcmpkt_ep_nih_header_t_timestamp_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78800_a0_cna_6_5_34_2_0_ep_nih_header_t_field_data[] = { - BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78800_a0_cna_6_5_34_2_0_ep_nih_header_t_field_info = { - .num_fields = BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT, - .info = bcm78800_a0_cna_6_5_34_2_0_ep_nih_header_t_field_data, -}; - - -static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 11, 2); - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 11, 2, val); - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 13, 3); - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 13, 3, val); - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 16, 16); - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 0, 16); - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 10); - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 10, val); - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_t_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 10, 1); - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_t_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 10, 1, val); - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 28, 4); - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 28, 4, val); - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 12); - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 12, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm78800_a0_cna_6_5_34_2_0_erspan3_fixed_hdr_t_fget[BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { - bcmpkt_erspan3_fixed_hdr_t_bso_get, - bcmpkt_erspan3_fixed_hdr_t_cos_get, - bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get, - bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get, - bcmpkt_erspan3_fixed_hdr_t_session_id_get, - bcmpkt_erspan3_fixed_hdr_t_t_get, - bcmpkt_erspan3_fixed_hdr_t_timestamp_get, - bcmpkt_erspan3_fixed_hdr_t_ver_get, - bcmpkt_erspan3_fixed_hdr_t_vlan_get, -}; - -bcmpkt_flex_field_set_f bcm78800_a0_cna_6_5_34_2_0_erspan3_fixed_hdr_t_fset[BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { - bcmpkt_erspan3_fixed_hdr_t_bso_set, - bcmpkt_erspan3_fixed_hdr_t_cos_set, - bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set, - bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set, - bcmpkt_erspan3_fixed_hdr_t_session_id_set, - bcmpkt_erspan3_fixed_hdr_t_t_set, - bcmpkt_erspan3_fixed_hdr_t_timestamp_set, - bcmpkt_erspan3_fixed_hdr_t_ver_set, - bcmpkt_erspan3_fixed_hdr_t_vlan_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78800_a0_cna_6_5_34_2_0_erspan3_fixed_hdr_t_field_data[] = { - BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78800_a0_cna_6_5_34_2_0_erspan3_fixed_hdr_t_field_info = { - .num_fields = BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT, - .info = bcm78800_a0_cna_6_5_34_2_0_erspan3_fixed_hdr_t_field_data, -}; - - -static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 26, 6); - - return ret; -} - -static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 26, 6, val); - return ret; -} - -static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 10); - - return ret; -} - -static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 10, val); - return ret; -} - -static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm78800_a0_cna_6_5_34_2_0_erspan3_subhdr_5_t_fget[BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { - bcmpkt_erspan3_subhdr_5_t_platform_id_get, - bcmpkt_erspan3_subhdr_5_t_port_id_get, - bcmpkt_erspan3_subhdr_5_t_switch_id_get, - bcmpkt_erspan3_subhdr_5_t_timestamp_get, -}; - -bcmpkt_flex_field_set_f bcm78800_a0_cna_6_5_34_2_0_erspan3_subhdr_5_t_fset[BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { - bcmpkt_erspan3_subhdr_5_t_platform_id_set, - bcmpkt_erspan3_subhdr_5_t_port_id_set, - bcmpkt_erspan3_subhdr_5_t_switch_id_set, - bcmpkt_erspan3_subhdr_5_t_timestamp_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78800_a0_cna_6_5_34_2_0_erspan3_subhdr_5_t_field_data[] = { - BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78800_a0_cna_6_5_34_2_0_erspan3_subhdr_5_t_field_info = { - .num_fields = BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT, - .info = bcm78800_a0_cna_6_5_34_2_0_erspan3_subhdr_5_t_field_data, -}; - - -static int32_t bcmpkt_ethertype_t_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_ethertype_t_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm78800_a0_cna_6_5_34_2_0_ethertype_t_fget[BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = { - bcmpkt_ethertype_t_type_get, -}; - -bcmpkt_flex_field_set_f bcm78800_a0_cna_6_5_34_2_0_ethertype_t_fset[BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = { - bcmpkt_ethertype_t_type_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78800_a0_cna_6_5_34_2_0_ethertype_t_field_data[] = { - BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78800_a0_cna_6_5_34_2_0_ethertype_t_field_info = { - .num_fields = BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ETHERTYPE_T_FID_COUNT, - .info = bcm78800_a0_cna_6_5_34_2_0_ethertype_t_field_data, -}; - - -static int32_t bcmpkt_generic_loopback_t_destination_obj_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 16); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_destination_obj_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_destination_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 24, 4); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_destination_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 24, 4, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_entropy_obj_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[3], 16, 16); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_entropy_obj_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[3], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_flags_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 4); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_flags_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 4, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_header_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 20, 4); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_header_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 20, 4, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_input_priority_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 12, 4); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_input_priority_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 12, 4, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_interface_ctrl_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 4, 4); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_interface_ctrl_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 4, 4, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_interface_obj_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 0, 16); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_interface_obj_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 4); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 4, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 28, 4); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 28, 4, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_qos_obj_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 8); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_qos_obj_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_reserved_1_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 8, 4); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_reserved_1_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 8, 4, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_reserved_2_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[3], 0, 16); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_reserved_2_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[3], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_source_system_port_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 16, 16); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_source_system_port_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_start_byte_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_start_byte_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm78800_a0_cna_6_5_34_2_0_generic_loopback_t_fget[BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { - bcmpkt_generic_loopback_t_destination_obj_get, - bcmpkt_generic_loopback_t_destination_type_get, - bcmpkt_generic_loopback_t_entropy_obj_get, - bcmpkt_generic_loopback_t_flags_get, - bcmpkt_generic_loopback_t_header_type_get, - bcmpkt_generic_loopback_t_input_priority_get, - bcmpkt_generic_loopback_t_interface_ctrl_get, - bcmpkt_generic_loopback_t_interface_obj_get, - bcmpkt_generic_loopback_t_processing_ctrl_0_get, - bcmpkt_generic_loopback_t_processing_ctrl_1_get, - bcmpkt_generic_loopback_t_qos_obj_get, - bcmpkt_generic_loopback_t_reserved_1_get, - bcmpkt_generic_loopback_t_reserved_2_get, - bcmpkt_generic_loopback_t_source_system_port_get, - bcmpkt_generic_loopback_t_start_byte_get, -}; - -bcmpkt_flex_field_set_f bcm78800_a0_cna_6_5_34_2_0_generic_loopback_t_fset[BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { - bcmpkt_generic_loopback_t_destination_obj_set, - bcmpkt_generic_loopback_t_destination_type_set, - bcmpkt_generic_loopback_t_entropy_obj_set, - bcmpkt_generic_loopback_t_flags_set, - bcmpkt_generic_loopback_t_header_type_set, - bcmpkt_generic_loopback_t_input_priority_set, - bcmpkt_generic_loopback_t_interface_ctrl_set, - bcmpkt_generic_loopback_t_interface_obj_set, - bcmpkt_generic_loopback_t_processing_ctrl_0_set, - bcmpkt_generic_loopback_t_processing_ctrl_1_set, - bcmpkt_generic_loopback_t_qos_obj_set, - bcmpkt_generic_loopback_t_reserved_1_set, - bcmpkt_generic_loopback_t_reserved_2_set, - bcmpkt_generic_loopback_t_source_system_port_set, - bcmpkt_generic_loopback_t_start_byte_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78800_a0_cna_6_5_34_2_0_generic_loopback_t_field_data[] = { - BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78800_a0_cna_6_5_34_2_0_generic_loopback_t_field_info = { - .num_fields = BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT, - .info = bcm78800_a0_cna_6_5_34_2_0_generic_loopback_t_field_data, -}; - - -static int32_t bcmpkt_icmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_icmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_icmp_t_code_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_icmp_t_code_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_icmp_t_icmp_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_icmp_t_icmp_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm78800_a0_cna_6_5_34_2_0_icmp_t_fget[BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ICMP_T_FID_COUNT] = { - bcmpkt_icmp_t_checksum_get, - bcmpkt_icmp_t_code_get, - bcmpkt_icmp_t_icmp_type_get, -}; - -bcmpkt_flex_field_set_f bcm78800_a0_cna_6_5_34_2_0_icmp_t_fset[BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ICMP_T_FID_COUNT] = { - bcmpkt_icmp_t_checksum_set, - bcmpkt_icmp_t_code_set, - bcmpkt_icmp_t_icmp_type_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78800_a0_cna_6_5_34_2_0_icmp_t_field_data[] = { - BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78800_a0_cna_6_5_34_2_0_icmp_t_field_info = { - .num_fields = BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_ICMP_T_FID_COUNT, - .info = bcm78800_a0_cna_6_5_34_2_0_icmp_t_field_data, -}; - - -static int32_t bcmpkt_ifa_header_t_flags_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 8, 8); - - return ret; -} - -static int32_t bcmpkt_ifa_header_t_flags_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 8, 8, val); - return ret; -} - -static int32_t bcmpkt_ifa_header_t_gns_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 4); - - return ret; -} - -static int32_t bcmpkt_ifa_header_t_gns_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 4, val); - return ret; -} - -static int32_t bcmpkt_ifa_header_t_max_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 8); - - return ret; -} - -static int32_t bcmpkt_ifa_header_t_max_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 8, val); - return ret; -} - -static int32_t bcmpkt_ifa_header_t_next_hdr_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_ifa_header_t_next_hdr_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_ifa_header_t_ver_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 28, 4); - - return ret; -} - -static int32_t bcmpkt_ifa_header_t_ver_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 28, 4, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm78800_a0_cna_6_5_34_2_0_ifa_header_t_fget[BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = { - bcmpkt_ifa_header_t_flags_get, - bcmpkt_ifa_header_t_gns_get, - bcmpkt_ifa_header_t_max_length_get, - bcmpkt_ifa_header_t_next_hdr_get, - bcmpkt_ifa_header_t_ver_get, -}; - -bcmpkt_flex_field_set_f bcm78800_a0_cna_6_5_34_2_0_ifa_header_t_fset[BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = { - bcmpkt_ifa_header_t_flags_set, - bcmpkt_ifa_header_t_gns_set, - bcmpkt_ifa_header_t_max_length_set, - bcmpkt_ifa_header_t_next_hdr_set, - bcmpkt_ifa_header_t_ver_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78800_a0_cna_6_5_34_2_0_ifa_header_t_field_data[] = { - BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78800_a0_cna_6_5_34_2_0_ifa_header_t_field_info = { - .num_fields = BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IFA_HEADER_T_FID_COUNT, - .info = bcm78800_a0_cna_6_5_34_2_0_ifa_header_t_field_data, -}; - - -static int32_t bcmpkt_ifa_metadata_a_t_cn_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 26, 2); - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_a_t_cn_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 26, 2, val); - return ret; -} - -static int32_t bcmpkt_ifa_metadata_a_t_fwd_hdr_ttl_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 8); - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_a_t_fwd_hdr_ttl_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 8, val); - return ret; -} - -static int32_t bcmpkt_ifa_metadata_a_t_lns_device_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 8, 24); - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_a_t_lns_device_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 8, 24, val); - return ret; -} - -static int32_t bcmpkt_ifa_metadata_a_t_port_speed_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 28, 4); - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_a_t_port_speed_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 28, 4, val); - return ret; -} - -static int32_t bcmpkt_ifa_metadata_a_t_queue_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 20, 6); - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_a_t_queue_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 20, 6, val); - return ret; -} - -static int32_t bcmpkt_ifa_metadata_a_t_rx_timestamp_sec_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 20); - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_a_t_rx_timestamp_sec_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 20, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm78800_a0_cna_6_5_34_2_0_ifa_metadata_a_t_fget[BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT] = { - bcmpkt_ifa_metadata_a_t_cn_get, - bcmpkt_ifa_metadata_a_t_fwd_hdr_ttl_get, - bcmpkt_ifa_metadata_a_t_lns_device_id_get, - bcmpkt_ifa_metadata_a_t_port_speed_get, - bcmpkt_ifa_metadata_a_t_queue_id_get, - bcmpkt_ifa_metadata_a_t_rx_timestamp_sec_get, -}; - -bcmpkt_flex_field_set_f bcm78800_a0_cna_6_5_34_2_0_ifa_metadata_a_t_fset[BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT] = { - bcmpkt_ifa_metadata_a_t_cn_set, - bcmpkt_ifa_metadata_a_t_fwd_hdr_ttl_set, - bcmpkt_ifa_metadata_a_t_lns_device_id_set, - bcmpkt_ifa_metadata_a_t_port_speed_set, - bcmpkt_ifa_metadata_a_t_queue_id_set, - bcmpkt_ifa_metadata_a_t_rx_timestamp_sec_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78800_a0_cna_6_5_34_2_0_ifa_metadata_a_t_field_data[] = { - BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_A_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78800_a0_cna_6_5_34_2_0_ifa_metadata_a_t_field_info = { - .num_fields = BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT, - .info = bcm78800_a0_cna_6_5_34_2_0_ifa_metadata_a_t_field_data, -}; - - -static int32_t bcmpkt_ifa_metadata_b_t_egress_port_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_b_t_egress_port_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_ifa_metadata_b_t_ingress_port_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_b_t_ingress_port_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_ifa_metadata_b_t_mmu_stat_0_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_b_t_mmu_stat_0_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_b_t_mmu_stat_1_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_b_t_mmu_stat_1_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_b_t_residence_time_nanosec_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_b_t_residence_time_nanosec_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_b_t_rx_timestamp_nanosec_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_b_t_rx_timestamp_nanosec_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_b_t_tx_queue_byte_count_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_b_t_tx_queue_byte_count_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm78800_a0_cna_6_5_34_2_0_ifa_metadata_b_t_fget[BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT] = { - bcmpkt_ifa_metadata_b_t_egress_port_id_get, - bcmpkt_ifa_metadata_b_t_ingress_port_id_get, - bcmpkt_ifa_metadata_b_t_mmu_stat_0_get, - bcmpkt_ifa_metadata_b_t_mmu_stat_1_get, - bcmpkt_ifa_metadata_b_t_residence_time_nanosec_get, - bcmpkt_ifa_metadata_b_t_rx_timestamp_nanosec_get, - bcmpkt_ifa_metadata_b_t_tx_queue_byte_count_get, -}; - -bcmpkt_flex_field_set_f bcm78800_a0_cna_6_5_34_2_0_ifa_metadata_b_t_fset[BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT] = { - bcmpkt_ifa_metadata_b_t_egress_port_id_set, - bcmpkt_ifa_metadata_b_t_ingress_port_id_set, - bcmpkt_ifa_metadata_b_t_mmu_stat_0_set, - bcmpkt_ifa_metadata_b_t_mmu_stat_1_set, - bcmpkt_ifa_metadata_b_t_residence_time_nanosec_set, - bcmpkt_ifa_metadata_b_t_rx_timestamp_nanosec_set, - bcmpkt_ifa_metadata_b_t_tx_queue_byte_count_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78800_a0_cna_6_5_34_2_0_ifa_metadata_b_t_field_data[] = { - BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_B_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78800_a0_cna_6_5_34_2_0_ifa_metadata_b_t_field_info = { - .num_fields = BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT, - .info = bcm78800_a0_cna_6_5_34_2_0_ifa_metadata_b_t_field_data, -}; - - -static int32_t bcmpkt_ifa_metadata_base_t_action_vector_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_base_t_action_vector_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_ifa_metadata_base_t_hop_limit_current_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_base_t_hop_limit_current_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_ifa_metadata_base_t_request_vector_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_base_t_request_vector_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm78800_a0_cna_6_5_34_2_0_ifa_metadata_base_t_fget[BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT] = { - bcmpkt_ifa_metadata_base_t_action_vector_get, - bcmpkt_ifa_metadata_base_t_hop_limit_current_length_get, - bcmpkt_ifa_metadata_base_t_request_vector_get, -}; - -bcmpkt_flex_field_set_f bcm78800_a0_cna_6_5_34_2_0_ifa_metadata_base_t_fset[BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT] = { - bcmpkt_ifa_metadata_base_t_action_vector_set, - bcmpkt_ifa_metadata_base_t_hop_limit_current_length_set, - bcmpkt_ifa_metadata_base_t_request_vector_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78800_a0_cna_6_5_34_2_0_ifa_metadata_base_t_field_data[] = { - BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_BASE_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78800_a0_cna_6_5_34_2_0_ifa_metadata_base_t_field_info = { - .num_fields = BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT, - .info = bcm78800_a0_cna_6_5_34_2_0_ifa_metadata_base_t_field_data, -}; - - -static int32_t bcmpkt_ipfix_t_export_time_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipfix_t_export_time_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipfix_t_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_ipfix_t_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_ipfix_t_obs_domain_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipfix_t_obs_domain_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipfix_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipfix_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipfix_t_version_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_ipfix_t_version_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm78800_a0_cna_6_5_34_2_0_ipfix_t_fget[BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IPFIX_T_FID_COUNT] = { - bcmpkt_ipfix_t_export_time_get, - bcmpkt_ipfix_t_length_get, - bcmpkt_ipfix_t_obs_domain_id_get, - bcmpkt_ipfix_t_sequence_num_get, - bcmpkt_ipfix_t_version_get, -}; - -bcmpkt_flex_field_set_f bcm78800_a0_cna_6_5_34_2_0_ipfix_t_fset[BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IPFIX_T_FID_COUNT] = { - bcmpkt_ipfix_t_export_time_set, - bcmpkt_ipfix_t_length_set, - bcmpkt_ipfix_t_obs_domain_id_set, - bcmpkt_ipfix_t_sequence_num_set, - bcmpkt_ipfix_t_version_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78800_a0_cna_6_5_34_2_0_ipfix_t_field_data[] = { - BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78800_a0_cna_6_5_34_2_0_ipfix_t_field_info = { - .num_fields = BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IPFIX_T_FID_COUNT, - .info = bcm78800_a0_cna_6_5_34_2_0_ipfix_t_field_data, -}; - - -static int32_t bcmpkt_ipv4_t_da_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv4_t_da_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv4_t_flags_frag_offset_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 16); - - return ret; -} - -static int32_t bcmpkt_ipv4_t_flags_frag_offset_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_ipv4_t_hdr_checksum_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 0, 16); - - return ret; -} - -static int32_t bcmpkt_ipv4_t_hdr_checksum_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_ipv4_t_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 16); - - return ret; -} - -static int32_t bcmpkt_ipv4_t_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_ipv4_t_option_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv4_t_option_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv4_t_protocol_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 16, 8); - - return ret; -} - -static int32_t bcmpkt_ipv4_t_protocol_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_ipv4_t_sa_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv4_t_sa_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv4_t_tos_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_ipv4_t_tos_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_ipv4_t_total_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_ipv4_t_total_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_ipv4_t_ttl_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 24, 8); - - return ret; -} - -static int32_t bcmpkt_ipv4_t_ttl_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_ipv4_t_version_hdr_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_ipv4_t_version_hdr_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm78800_a0_cna_6_5_34_2_0_ipv4_t_fget[BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_FID_COUNT] = { - bcmpkt_ipv4_t_da_get, - bcmpkt_ipv4_t_flags_frag_offset_get, - bcmpkt_ipv4_t_hdr_checksum_get, - bcmpkt_ipv4_t_id_get, - bcmpkt_ipv4_t_option_get, - bcmpkt_ipv4_t_protocol_get, - bcmpkt_ipv4_t_sa_get, - bcmpkt_ipv4_t_tos_get, - bcmpkt_ipv4_t_total_length_get, - bcmpkt_ipv4_t_ttl_get, - bcmpkt_ipv4_t_version_hdr_len_get, -}; - -bcmpkt_flex_field_set_f bcm78800_a0_cna_6_5_34_2_0_ipv4_t_fset[BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_FID_COUNT] = { - bcmpkt_ipv4_t_da_set, - bcmpkt_ipv4_t_flags_frag_offset_set, - bcmpkt_ipv4_t_hdr_checksum_set, - bcmpkt_ipv4_t_id_set, - bcmpkt_ipv4_t_option_set, - bcmpkt_ipv4_t_protocol_set, - bcmpkt_ipv4_t_sa_set, - bcmpkt_ipv4_t_tos_set, - bcmpkt_ipv4_t_total_length_set, - bcmpkt_ipv4_t_ttl_set, - bcmpkt_ipv4_t_version_hdr_len_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78800_a0_cna_6_5_34_2_0_ipv4_t_field_data[] = { - BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78800_a0_cna_6_5_34_2_0_ipv4_t_field_info = { - .num_fields = BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IPV4_T_FID_COUNT, - .info = bcm78800_a0_cna_6_5_34_2_0_ipv4_t_field_data, -}; - - -static int32_t bcmpkt_ipv6_t_da_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv6_t_da_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv6_t_flow_label_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 20); - - return ret; -} - -static int32_t bcmpkt_ipv6_t_flow_label_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 20, val); - return ret; -} - -static int32_t bcmpkt_ipv6_t_hop_limit_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 8); - - return ret; -} - -static int32_t bcmpkt_ipv6_t_hop_limit_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 8, val); - return ret; -} - -static int32_t bcmpkt_ipv6_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 8, 8); - - return ret; -} - -static int32_t bcmpkt_ipv6_t_next_header_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 8, 8, val); - return ret; -} - -static int32_t bcmpkt_ipv6_t_payload_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 16); - - return ret; -} - -static int32_t bcmpkt_ipv6_t_payload_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_ipv6_t_sa_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv6_t_sa_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv6_t_traffic_class_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 20, 8); - - return ret; -} - -static int32_t bcmpkt_ipv6_t_traffic_class_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 20, 8, val); - return ret; -} - -static int32_t bcmpkt_ipv6_t_version_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 28, 4); - - return ret; -} - -static int32_t bcmpkt_ipv6_t_version_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 28, 4, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm78800_a0_cna_6_5_34_2_0_ipv6_t_fget[BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_FID_COUNT] = { - bcmpkt_ipv6_t_da_get, - bcmpkt_ipv6_t_flow_label_get, - bcmpkt_ipv6_t_hop_limit_get, - bcmpkt_ipv6_t_next_header_get, - bcmpkt_ipv6_t_payload_length_get, - bcmpkt_ipv6_t_sa_get, - bcmpkt_ipv6_t_traffic_class_get, - bcmpkt_ipv6_t_version_get, -}; - -bcmpkt_flex_field_set_f bcm78800_a0_cna_6_5_34_2_0_ipv6_t_fset[BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_FID_COUNT] = { - bcmpkt_ipv6_t_da_set, - bcmpkt_ipv6_t_flow_label_set, - bcmpkt_ipv6_t_hop_limit_set, - bcmpkt_ipv6_t_next_header_set, - bcmpkt_ipv6_t_payload_length_set, - bcmpkt_ipv6_t_sa_set, - bcmpkt_ipv6_t_traffic_class_set, - bcmpkt_ipv6_t_version_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78800_a0_cna_6_5_34_2_0_ipv6_t_field_data[] = { - BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78800_a0_cna_6_5_34_2_0_ipv6_t_field_info = { - .num_fields = BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_IPV6_T_FID_COUNT, - .info = bcm78800_a0_cna_6_5_34_2_0_ipv6_t_field_data, -}; - - -static int32_t bcmpkt_l2_t_macda_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_l2_t_macda_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_l2_t_macsa_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_l2_t_macsa_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm78800_a0_cna_6_5_34_2_0_l2_t_fget[BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_L2_T_FID_COUNT] = { - bcmpkt_l2_t_macda_get, - bcmpkt_l2_t_macsa_get, -}; - -bcmpkt_flex_field_set_f bcm78800_a0_cna_6_5_34_2_0_l2_t_fset[BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_L2_T_FID_COUNT] = { - bcmpkt_l2_t_macda_set, - bcmpkt_l2_t_macsa_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78800_a0_cna_6_5_34_2_0_l2_t_field_data[] = { - BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78800_a0_cna_6_5_34_2_0_l2_t_field_info = { - .num_fields = BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_L2_T_FID_COUNT, - .info = bcm78800_a0_cna_6_5_34_2_0_l2_t_field_data, -}; - - -static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm78800_a0_cna_6_5_34_2_0_mirror_erspan_sn_t_fget[BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { - bcmpkt_mirror_erspan_sn_t_seq_num_get, -}; - -bcmpkt_flex_field_set_f bcm78800_a0_cna_6_5_34_2_0_mirror_erspan_sn_t_fset[BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { - bcmpkt_mirror_erspan_sn_t_seq_num_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78800_a0_cna_6_5_34_2_0_mirror_erspan_sn_t_field_data[] = { - BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78800_a0_cna_6_5_34_2_0_mirror_erspan_sn_t_field_info = { - .num_fields = BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT, - .info = bcm78800_a0_cna_6_5_34_2_0_mirror_erspan_sn_t_field_data, -}; - - -static int32_t bcmpkt_mirror_transport_t_data_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_mirror_transport_t_data_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm78800_a0_cna_6_5_34_2_0_mirror_transport_t_fget[BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { - bcmpkt_mirror_transport_t_data_get, -}; - -bcmpkt_flex_field_set_f bcm78800_a0_cna_6_5_34_2_0_mirror_transport_t_fset[BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { - bcmpkt_mirror_transport_t_data_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78800_a0_cna_6_5_34_2_0_mirror_transport_t_field_data[] = { - BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78800_a0_cna_6_5_34_2_0_mirror_transport_t_field_info = { - .num_fields = BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT, - .info = bcm78800_a0_cna_6_5_34_2_0_mirror_transport_t_field_data, -}; - - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[4], 16, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[4], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[4], 0, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[4], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm78800_a0_cna_6_5_34_2_0_psamp_mirror_on_drop_0_t_fget[BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { - bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get, - bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get, - bcmpkt_psamp_mirror_on_drop_0_t_length_get, - bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get, - bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get, - bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get, - bcmpkt_psamp_mirror_on_drop_0_t_template_id_get, -}; - -bcmpkt_flex_field_set_f bcm78800_a0_cna_6_5_34_2_0_psamp_mirror_on_drop_0_t_fset[BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { - bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set, - bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set, - bcmpkt_psamp_mirror_on_drop_0_t_length_set, - bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set, - bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set, - bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set, - bcmpkt_psamp_mirror_on_drop_0_t_template_id_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78800_a0_cna_6_5_34_2_0_psamp_mirror_on_drop_0_t_field_data[] = { - BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78800_a0_cna_6_5_34_2_0_psamp_mirror_on_drop_0_t_field_info = { - .num_fields = BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT, - .info = bcm78800_a0_cna_6_5_34_2_0_psamp_mirror_on_drop_0_t_field_data, -}; - - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 6); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 6, val); - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_smod_state_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 22, 2); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_smod_state_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 22, 2, val); - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 24, 8); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 8); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 8, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm78800_a0_cna_6_5_34_2_0_psamp_mirror_on_drop_3_t_fget[BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = { - bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_get, - bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_get, - bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_get, - bcmpkt_psamp_mirror_on_drop_3_t_smod_state_get, - bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_get, - bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_get, - bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_get, -}; - -bcmpkt_flex_field_set_f bcm78800_a0_cna_6_5_34_2_0_psamp_mirror_on_drop_3_t_fset[BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT] = { - bcmpkt_psamp_mirror_on_drop_3_t_drop_reason_set, - bcmpkt_psamp_mirror_on_drop_3_t_reserved_0_set, - bcmpkt_psamp_mirror_on_drop_3_t_sampled_length_set, - bcmpkt_psamp_mirror_on_drop_3_t_smod_state_set, - bcmpkt_psamp_mirror_on_drop_3_t_uc_cos__color__prob_idx_set, - bcmpkt_psamp_mirror_on_drop_3_t_user_meta_data_set, - bcmpkt_psamp_mirror_on_drop_3_t_var_len_indicator_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78800_a0_cna_6_5_34_2_0_psamp_mirror_on_drop_3_t_field_data[] = { - BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78800_a0_cna_6_5_34_2_0_psamp_mirror_on_drop_3_t_field_info = { - .num_fields = BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_PSAMP_MIRROR_ON_DROP_3_T_FID_COUNT, - .info = bcm78800_a0_cna_6_5_34_2_0_psamp_mirror_on_drop_3_t_field_data, -}; - - -static int32_t bcmpkt_rarp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 24, 8); - - return ret; -} - -static int32_t bcmpkt_rarp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_rarp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_rarp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_rarp_t_operation_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 16); - - return ret; -} - -static int32_t bcmpkt_rarp_t_operation_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_rarp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 8); - - return ret; -} - -static int32_t bcmpkt_rarp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_rarp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_rarp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_rarp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_rarp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_rarp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_rarp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_rarp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_rarp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_rarp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_rarp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm78800_a0_cna_6_5_34_2_0_rarp_t_fget[BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_FID_COUNT] = { - bcmpkt_rarp_t_hardware_len_get, - bcmpkt_rarp_t_hardware_type_get, - bcmpkt_rarp_t_operation_get, - bcmpkt_rarp_t_prot_addr_len_get, - bcmpkt_rarp_t_protocol_type_get, - bcmpkt_rarp_t_sender_ha_get, - bcmpkt_rarp_t_sender_ip_get, - bcmpkt_rarp_t_target_ha_get, - bcmpkt_rarp_t_target_ip_get, -}; - -bcmpkt_flex_field_set_f bcm78800_a0_cna_6_5_34_2_0_rarp_t_fset[BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_FID_COUNT] = { - bcmpkt_rarp_t_hardware_len_set, - bcmpkt_rarp_t_hardware_type_set, - bcmpkt_rarp_t_operation_set, - bcmpkt_rarp_t_prot_addr_len_set, - bcmpkt_rarp_t_protocol_type_set, - bcmpkt_rarp_t_sender_ha_set, - bcmpkt_rarp_t_sender_ip_set, - bcmpkt_rarp_t_target_ha_set, - bcmpkt_rarp_t_target_ip_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78800_a0_cna_6_5_34_2_0_rarp_t_field_data[] = { - BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78800_a0_cna_6_5_34_2_0_rarp_t_field_info = { - .num_fields = BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_RARP_T_FID_COUNT, - .info = bcm78800_a0_cna_6_5_34_2_0_rarp_t_field_data, -}; - - -static int32_t bcmpkt_sflow_shim_0_t_sys_destination_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 16); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_0_t_sys_destination_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_sflow_shim_0_t_sys_source_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 16); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_0_t_sys_source_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_sflow_shim_0_t_version_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_sflow_shim_0_t_version_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm78800_a0_cna_6_5_34_2_0_sflow_shim_0_t_fget[BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { - bcmpkt_sflow_shim_0_t_sys_destination_get, - bcmpkt_sflow_shim_0_t_sys_source_get, - bcmpkt_sflow_shim_0_t_version_get, -}; - -bcmpkt_flex_field_set_f bcm78800_a0_cna_6_5_34_2_0_sflow_shim_0_t_fset[BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { - bcmpkt_sflow_shim_0_t_sys_destination_set, - bcmpkt_sflow_shim_0_t_sys_source_set, - bcmpkt_sflow_shim_0_t_version_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78800_a0_cna_6_5_34_2_0_sflow_shim_0_t_field_data[] = { - BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78800_a0_cna_6_5_34_2_0_sflow_shim_0_t_field_info = { - .num_fields = BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT, - .info = bcm78800_a0_cna_6_5_34_2_0_sflow_shim_0_t_field_data, -}; - - -static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 30, 1); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 30, 1, val); - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 27, 1); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 27, 1, val); - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 29, 1); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 29, 1, val); - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 28, 1); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 28, 1, val); - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 31, 1); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 31, 1, val); - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 26, 1); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 26, 1, val); - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 7); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_reserved_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 7, val); - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 23, 3); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 23, 3, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm78800_a0_cna_6_5_34_2_0_sflow_shim_1_t_fget[BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { - bcmpkt_sflow_shim_1_t_flag_dest_sample_get, - bcmpkt_sflow_shim_1_t_flag_discarded_get, - bcmpkt_sflow_shim_1_t_flag_flex_sample_get, - bcmpkt_sflow_shim_1_t_flag_mcast_get, - bcmpkt_sflow_shim_1_t_flag_src_sample_get, - bcmpkt_sflow_shim_1_t_flag_truncated_get, - bcmpkt_sflow_shim_1_t_reserved_get, - bcmpkt_sflow_shim_1_t_sys_opcode_get, -}; - -bcmpkt_flex_field_set_f bcm78800_a0_cna_6_5_34_2_0_sflow_shim_1_t_fset[BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { - bcmpkt_sflow_shim_1_t_flag_dest_sample_set, - bcmpkt_sflow_shim_1_t_flag_discarded_set, - bcmpkt_sflow_shim_1_t_flag_flex_sample_set, - bcmpkt_sflow_shim_1_t_flag_mcast_set, - bcmpkt_sflow_shim_1_t_flag_src_sample_set, - bcmpkt_sflow_shim_1_t_flag_truncated_set, - bcmpkt_sflow_shim_1_t_reserved_set, - bcmpkt_sflow_shim_1_t_sys_opcode_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78800_a0_cna_6_5_34_2_0_sflow_shim_1_t_field_data[] = { - BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78800_a0_cna_6_5_34_2_0_sflow_shim_1_t_field_info = { - .num_fields = BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT, - .info = bcm78800_a0_cna_6_5_34_2_0_sflow_shim_1_t_field_data, -}; - - -static int32_t bcmpkt_sflow_shim_2_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_sflow_shim_2_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm78800_a0_cna_6_5_34_2_0_sflow_shim_2_t_fget[BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { - bcmpkt_sflow_shim_2_t_sequence_num_get, - bcmpkt_sflow_shim_2_t_user_meta_data_get, -}; - -bcmpkt_flex_field_set_f bcm78800_a0_cna_6_5_34_2_0_sflow_shim_2_t_fset[BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { - bcmpkt_sflow_shim_2_t_sequence_num_set, - bcmpkt_sflow_shim_2_t_user_meta_data_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78800_a0_cna_6_5_34_2_0_sflow_shim_2_t_field_data[] = { - BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78800_a0_cna_6_5_34_2_0_sflow_shim_2_t_field_info = { - .num_fields = BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT, - .info = bcm78800_a0_cna_6_5_34_2_0_sflow_shim_2_t_field_data, -}; - - -static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_tcp_first_4bytes_t_src_port_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_tcp_first_4bytes_t_src_port_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm78800_a0_cna_6_5_34_2_0_tcp_first_4bytes_t_fget[BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { - bcmpkt_tcp_first_4bytes_t_dst_port_get, - bcmpkt_tcp_first_4bytes_t_src_port_get, -}; - -bcmpkt_flex_field_set_f bcm78800_a0_cna_6_5_34_2_0_tcp_first_4bytes_t_fset[BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { - bcmpkt_tcp_first_4bytes_t_dst_port_set, - bcmpkt_tcp_first_4bytes_t_src_port_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78800_a0_cna_6_5_34_2_0_tcp_first_4bytes_t_field_data[] = { - BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78800_a0_cna_6_5_34_2_0_tcp_first_4bytes_t_field_info = { - .num_fields = BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT, - .info = bcm78800_a0_cna_6_5_34_2_0_tcp_first_4bytes_t_field_data, -}; - - -static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[3], 16, 16); - - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_checksum_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[3], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 16, 16); - - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[3], 0, 16); - - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[3], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_win_size_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 0, 16); - - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_win_size_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 0, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm78800_a0_cna_6_5_34_2_0_tcp_last_16bytes_t_fget[BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { - bcmpkt_tcp_last_16bytes_t_ack_num_get, - bcmpkt_tcp_last_16bytes_t_checksum_get, - bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get, - bcmpkt_tcp_last_16bytes_t_seq_num_get, - bcmpkt_tcp_last_16bytes_t_urgent_ptr_get, - bcmpkt_tcp_last_16bytes_t_win_size_get, -}; - -bcmpkt_flex_field_set_f bcm78800_a0_cna_6_5_34_2_0_tcp_last_16bytes_t_fset[BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { - bcmpkt_tcp_last_16bytes_t_ack_num_set, - bcmpkt_tcp_last_16bytes_t_checksum_set, - bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set, - bcmpkt_tcp_last_16bytes_t_seq_num_set, - bcmpkt_tcp_last_16bytes_t_urgent_ptr_set, - bcmpkt_tcp_last_16bytes_t_win_size_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78800_a0_cna_6_5_34_2_0_tcp_last_16bytes_t_field_data[] = { - BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78800_a0_cna_6_5_34_2_0_tcp_last_16bytes_t_field_info = { - .num_fields = BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT, - .info = bcm78800_a0_cna_6_5_34_2_0_tcp_last_16bytes_t_field_data, -}; - - -static int32_t bcmpkt_udp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 16); - - return ret; -} - -static int32_t bcmpkt_udp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_udp_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_udp_t_dst_port_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_udp_t_src_port_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_udp_t_src_port_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_udp_t_udp_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 16); - - return ret; -} - -static int32_t bcmpkt_udp_t_udp_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm78800_a0_cna_6_5_34_2_0_udp_t_fget[BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_UDP_T_FID_COUNT] = { - bcmpkt_udp_t_checksum_get, - bcmpkt_udp_t_dst_port_get, - bcmpkt_udp_t_src_port_get, - bcmpkt_udp_t_udp_length_get, -}; - -bcmpkt_flex_field_set_f bcm78800_a0_cna_6_5_34_2_0_udp_t_fset[BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_UDP_T_FID_COUNT] = { - bcmpkt_udp_t_checksum_set, - bcmpkt_udp_t_dst_port_set, - bcmpkt_udp_t_src_port_set, - bcmpkt_udp_t_udp_length_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78800_a0_cna_6_5_34_2_0_udp_t_field_data[] = { - BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78800_a0_cna_6_5_34_2_0_udp_t_field_info = { - .num_fields = BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_UDP_T_FID_COUNT, - .info = bcm78800_a0_cna_6_5_34_2_0_udp_t_field_data, -}; - - -static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm78800_a0_cna_6_5_34_2_0_unknown_l3_t_fget[BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { - bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get, - bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get, -}; - -bcmpkt_flex_field_set_f bcm78800_a0_cna_6_5_34_2_0_unknown_l3_t_fset[BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { - bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set, - bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78800_a0_cna_6_5_34_2_0_unknown_l3_t_field_data[] = { - BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78800_a0_cna_6_5_34_2_0_unknown_l3_t_field_info = { - .num_fields = BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT, - .info = bcm78800_a0_cna_6_5_34_2_0_unknown_l3_t_field_data, -}; - - -static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm78800_a0_cna_6_5_34_2_0_unknown_l4_t_fget[BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { - bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get, -}; - -bcmpkt_flex_field_set_f bcm78800_a0_cna_6_5_34_2_0_unknown_l4_t_fset[BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { - bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78800_a0_cna_6_5_34_2_0_unknown_l4_t_field_data[] = { - BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78800_a0_cna_6_5_34_2_0_unknown_l4_t_field_info = { - .num_fields = BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT, - .info = bcm78800_a0_cna_6_5_34_2_0_unknown_l4_t_field_data, -}; - - -static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm78800_a0_cna_6_5_34_2_0_unknown_l5_t_fget[BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { - bcmpkt_unknown_l5_t_l5_bytes_0_1_get, - bcmpkt_unknown_l5_t_l5_bytes_2_3_get, - bcmpkt_unknown_l5_t_l5_bytes_4_7_get, -}; - -bcmpkt_flex_field_set_f bcm78800_a0_cna_6_5_34_2_0_unknown_l5_t_fset[BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { - bcmpkt_unknown_l5_t_l5_bytes_0_1_set, - bcmpkt_unknown_l5_t_l5_bytes_2_3_set, - bcmpkt_unknown_l5_t_l5_bytes_4_7_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78800_a0_cna_6_5_34_2_0_unknown_l5_t_field_data[] = { - BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78800_a0_cna_6_5_34_2_0_unknown_l5_t_field_info = { - .num_fields = BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT, - .info = bcm78800_a0_cna_6_5_34_2_0_unknown_l5_t_field_data, -}; - - -static int32_t bcmpkt_vlan_t_cfi_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 12, 1); - - return ret; -} - -static int32_t bcmpkt_vlan_t_cfi_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 12, 1, val); - return ret; -} - -static int32_t bcmpkt_vlan_t_pcp_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 13, 3); - - return ret; -} - -static int32_t bcmpkt_vlan_t_pcp_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 13, 3, val); - return ret; -} - -static int32_t bcmpkt_vlan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_vlan_t_tpid_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_vlan_t_vid_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 12); - - return ret; -} - -static int32_t bcmpkt_vlan_t_vid_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 12, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm78800_a0_cna_6_5_34_2_0_vlan_t_fget[BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_VLAN_T_FID_COUNT] = { - bcmpkt_vlan_t_cfi_get, - bcmpkt_vlan_t_pcp_get, - bcmpkt_vlan_t_tpid_get, - bcmpkt_vlan_t_vid_get, -}; - -bcmpkt_flex_field_set_f bcm78800_a0_cna_6_5_34_2_0_vlan_t_fset[BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_VLAN_T_FID_COUNT] = { - bcmpkt_vlan_t_cfi_set, - bcmpkt_vlan_t_pcp_set, - bcmpkt_vlan_t_tpid_set, - bcmpkt_vlan_t_vid_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78800_a0_cna_6_5_34_2_0_vlan_t_field_data[] = { - BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78800_a0_cna_6_5_34_2_0_vlan_t_field_info = { - .num_fields = BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_VLAN_T_FID_COUNT, - .info = bcm78800_a0_cna_6_5_34_2_0_vlan_t_field_data, -}; - - -static int32_t bcmpkt_vxlan_t_flags_reserved_1_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_vxlan_t_flags_reserved_1_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_vxlan_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 8); - - return ret; -} - -static int32_t bcmpkt_vxlan_t_reserved2_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 8, val); - return ret; -} - -static int32_t bcmpkt_vxlan_t_vn_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 8, 24); - - return ret; -} - -static int32_t bcmpkt_vxlan_t_vn_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 8, 24, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm78800_a0_cna_6_5_34_2_0_vxlan_t_fget[BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_VXLAN_T_FID_COUNT] = { - bcmpkt_vxlan_t_flags_reserved_1_get, - bcmpkt_vxlan_t_reserved2_get, - bcmpkt_vxlan_t_vn_id_get, -}; - -bcmpkt_flex_field_set_f bcm78800_a0_cna_6_5_34_2_0_vxlan_t_fset[BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_VXLAN_T_FID_COUNT] = { - bcmpkt_vxlan_t_flags_reserved_1_set, - bcmpkt_vxlan_t_reserved2_set, - bcmpkt_vxlan_t_vn_id_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78800_a0_cna_6_5_34_2_0_vxlan_t_field_data[] = { - BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78800_a0_cna_6_5_34_2_0_vxlan_t_field_info = { - .num_fields = BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_VXLAN_T_FID_COUNT, - .info = bcm78800_a0_cna_6_5_34_2_0_vxlan_t_field_data, -}; - -static bcmpkt_flex_pmd_info_t bcm78800_a0_cna_6_5_34_2_0_flexhdr_info_list[BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_FLEXHDR_COUNT] = { - { - .is_supported = TRUE, - .field_info = &bcm78800_a0_cna_6_5_34_2_0_arp_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78800_a0_cna_6_5_34_2_0_arp_t_fget, - .flex_fset = bcm78800_a0_cna_6_5_34_2_0_arp_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78800_a0_cna_6_5_34_2_0_cpu_composites_0_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78800_a0_cna_6_5_34_2_0_cpu_composites_0_t_fget, - .flex_fset = bcm78800_a0_cna_6_5_34_2_0_cpu_composites_0_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78800_a0_cna_6_5_34_2_0_cpu_composites_1_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78800_a0_cna_6_5_34_2_0_cpu_composites_1_t_fget, - .flex_fset = bcm78800_a0_cna_6_5_34_2_0_cpu_composites_1_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78800_a0_cna_6_5_34_2_0_ep_nih_header_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78800_a0_cna_6_5_34_2_0_ep_nih_header_t_fget, - .flex_fset = bcm78800_a0_cna_6_5_34_2_0_ep_nih_header_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78800_a0_cna_6_5_34_2_0_erspan3_fixed_hdr_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78800_a0_cna_6_5_34_2_0_erspan3_fixed_hdr_t_fget, - .flex_fset = bcm78800_a0_cna_6_5_34_2_0_erspan3_fixed_hdr_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78800_a0_cna_6_5_34_2_0_erspan3_subhdr_5_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78800_a0_cna_6_5_34_2_0_erspan3_subhdr_5_t_fget, - .flex_fset = bcm78800_a0_cna_6_5_34_2_0_erspan3_subhdr_5_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78800_a0_cna_6_5_34_2_0_ethertype_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78800_a0_cna_6_5_34_2_0_ethertype_t_fget, - .flex_fset = bcm78800_a0_cna_6_5_34_2_0_ethertype_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78800_a0_cna_6_5_34_2_0_generic_loopback_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78800_a0_cna_6_5_34_2_0_generic_loopback_t_fget, - .flex_fset = bcm78800_a0_cna_6_5_34_2_0_generic_loopback_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78800_a0_cna_6_5_34_2_0_icmp_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78800_a0_cna_6_5_34_2_0_icmp_t_fget, - .flex_fset = bcm78800_a0_cna_6_5_34_2_0_icmp_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78800_a0_cna_6_5_34_2_0_ifa_header_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78800_a0_cna_6_5_34_2_0_ifa_header_t_fget, - .flex_fset = bcm78800_a0_cna_6_5_34_2_0_ifa_header_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78800_a0_cna_6_5_34_2_0_ifa_metadata_a_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78800_a0_cna_6_5_34_2_0_ifa_metadata_a_t_fget, - .flex_fset = bcm78800_a0_cna_6_5_34_2_0_ifa_metadata_a_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78800_a0_cna_6_5_34_2_0_ifa_metadata_b_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78800_a0_cna_6_5_34_2_0_ifa_metadata_b_t_fget, - .flex_fset = bcm78800_a0_cna_6_5_34_2_0_ifa_metadata_b_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78800_a0_cna_6_5_34_2_0_ifa_metadata_base_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78800_a0_cna_6_5_34_2_0_ifa_metadata_base_t_fget, - .flex_fset = bcm78800_a0_cna_6_5_34_2_0_ifa_metadata_base_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78800_a0_cna_6_5_34_2_0_ipfix_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78800_a0_cna_6_5_34_2_0_ipfix_t_fget, - .flex_fset = bcm78800_a0_cna_6_5_34_2_0_ipfix_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78800_a0_cna_6_5_34_2_0_ipv4_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78800_a0_cna_6_5_34_2_0_ipv4_t_fget, - .flex_fset = bcm78800_a0_cna_6_5_34_2_0_ipv4_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78800_a0_cna_6_5_34_2_0_ipv6_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78800_a0_cna_6_5_34_2_0_ipv6_t_fget, - .flex_fset = bcm78800_a0_cna_6_5_34_2_0_ipv6_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78800_a0_cna_6_5_34_2_0_l2_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78800_a0_cna_6_5_34_2_0_l2_t_fget, - .flex_fset = bcm78800_a0_cna_6_5_34_2_0_l2_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78800_a0_cna_6_5_34_2_0_mirror_erspan_sn_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78800_a0_cna_6_5_34_2_0_mirror_erspan_sn_t_fget, - .flex_fset = bcm78800_a0_cna_6_5_34_2_0_mirror_erspan_sn_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78800_a0_cna_6_5_34_2_0_mirror_transport_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78800_a0_cna_6_5_34_2_0_mirror_transport_t_fget, - .flex_fset = bcm78800_a0_cna_6_5_34_2_0_mirror_transport_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78800_a0_cna_6_5_34_2_0_psamp_mirror_on_drop_0_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78800_a0_cna_6_5_34_2_0_psamp_mirror_on_drop_0_t_fget, - .flex_fset = bcm78800_a0_cna_6_5_34_2_0_psamp_mirror_on_drop_0_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78800_a0_cna_6_5_34_2_0_psamp_mirror_on_drop_3_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78800_a0_cna_6_5_34_2_0_psamp_mirror_on_drop_3_t_fget, - .flex_fset = bcm78800_a0_cna_6_5_34_2_0_psamp_mirror_on_drop_3_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78800_a0_cna_6_5_34_2_0_rarp_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78800_a0_cna_6_5_34_2_0_rarp_t_fget, - .flex_fset = bcm78800_a0_cna_6_5_34_2_0_rarp_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78800_a0_cna_6_5_34_2_0_sflow_shim_0_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78800_a0_cna_6_5_34_2_0_sflow_shim_0_t_fget, - .flex_fset = bcm78800_a0_cna_6_5_34_2_0_sflow_shim_0_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78800_a0_cna_6_5_34_2_0_sflow_shim_1_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78800_a0_cna_6_5_34_2_0_sflow_shim_1_t_fget, - .flex_fset = bcm78800_a0_cna_6_5_34_2_0_sflow_shim_1_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78800_a0_cna_6_5_34_2_0_sflow_shim_2_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78800_a0_cna_6_5_34_2_0_sflow_shim_2_t_fget, - .flex_fset = bcm78800_a0_cna_6_5_34_2_0_sflow_shim_2_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78800_a0_cna_6_5_34_2_0_tcp_first_4bytes_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78800_a0_cna_6_5_34_2_0_tcp_first_4bytes_t_fget, - .flex_fset = bcm78800_a0_cna_6_5_34_2_0_tcp_first_4bytes_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78800_a0_cna_6_5_34_2_0_tcp_last_16bytes_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78800_a0_cna_6_5_34_2_0_tcp_last_16bytes_t_fget, - .flex_fset = bcm78800_a0_cna_6_5_34_2_0_tcp_last_16bytes_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78800_a0_cna_6_5_34_2_0_udp_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78800_a0_cna_6_5_34_2_0_udp_t_fget, - .flex_fset = bcm78800_a0_cna_6_5_34_2_0_udp_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78800_a0_cna_6_5_34_2_0_unknown_l3_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78800_a0_cna_6_5_34_2_0_unknown_l3_t_fget, - .flex_fset = bcm78800_a0_cna_6_5_34_2_0_unknown_l3_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78800_a0_cna_6_5_34_2_0_unknown_l4_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78800_a0_cna_6_5_34_2_0_unknown_l4_t_fget, - .flex_fset = bcm78800_a0_cna_6_5_34_2_0_unknown_l4_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78800_a0_cna_6_5_34_2_0_unknown_l5_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78800_a0_cna_6_5_34_2_0_unknown_l5_t_fget, - .flex_fset = bcm78800_a0_cna_6_5_34_2_0_unknown_l5_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78800_a0_cna_6_5_34_2_0_vlan_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78800_a0_cna_6_5_34_2_0_vlan_t_fget, - .flex_fset = bcm78800_a0_cna_6_5_34_2_0_vlan_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78800_a0_cna_6_5_34_2_0_vxlan_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78800_a0_cna_6_5_34_2_0_vxlan_t_fget, - .flex_fset = bcm78800_a0_cna_6_5_34_2_0_vxlan_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78800_a0_cna_6_5_34_2_0_rxpmd_flex_field_info, - .reasons_info = &bcm78800_a0_cna_6_5_34_2_0_rxpmd_flex_reasons_info, - .flex_common_fget = bcm78800_a0_rxpmd_flex_fget, - .flex_common_fset = bcm78800_a0_rxpmd_flex_fset, - }, -}; - -static shr_enum_map_t bcm78800_a0_cna_6_5_34_2_0_flexhdr_id_map[] = { - BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_FLEXHDR_NAME_MAP_INIT -}; - -shr_enum_map_t * bcm78800_a0_cna_6_5_34_2_0_flexhdr_map_get(void) -{ - return bcm78800_a0_cna_6_5_34_2_0_flexhdr_id_map; -} - -bcmpkt_flex_pmd_info_t * bcm78800_a0_cna_6_5_34_2_0_flex_pmd_info_get(uint32_t hid) -{ - if (hid >= BCM78800_A0_CNA_6_5_34_2_0_BCMPKT_FLEXHDR_COUNT) { - return NULL; - } - - return &bcm78800_a0_cna_6_5_34_2_0_flexhdr_info_list[hid]; -} - -int bcm78800_a0_cna_6_5_34_2_0_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = { - 7, - -1, - -1, - 33, -}; diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm78920_a0/vna_4_6_1_0/bcm78920_a0_vna_4_6_1_0_bcmpkt_rxpmd_match_id.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm78920_a0/vna_4_6_1_0/bcm78920_a0_vna_4_6_1_0_bcmpkt_rxpmd_match_id.c deleted file mode 100644 index 8668270ea0b..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm78920_a0/vna_4_6_1_0/bcm78920_a0_vna_4_6_1_0_bcmpkt_rxpmd_match_id.c +++ /dev/null @@ -1,5220 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) bcm78920_a0_vna_4_6_1_0_sf_match_id_info.yml - * for device bcm78920_a0 and variant vna_4_6_1_0. - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - - -#include -#include - -static uint32_t bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_itag[1] = -{ - 0x6c, -}; - -static uint32_t bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_l2[1] = -{ - 0x1fe, -}; - -static uint32_t bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_otag[1] = -{ - 0xf0, -}; - -static uint32_t bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_snap_or_llc[1] = -{ - 0x1c8, -}; - -static uint32_t bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_arp[1] = -{ - 0x4, -}; - -static uint32_t bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_bfd[2] = -{ - 0x100400, - 0x802, -}; - -static uint32_t bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ethertype[1] = -{ - 0x3fffffe, -}; - -static uint32_t bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_icmp[2] = -{ - 0x8008010, - 0x40, -}; - -static uint32_t bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_igmp[1] = -{ - 0x10000020, -}; - -static uint32_t bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv4[2] = -{ - 0xfc003ff8, - 0x1f, -}; - -static uint32_t bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv6[2] = -{ - 0xffc000, - 0x7fe0, -}; - -static uint32_t bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_p_1588[2] = -{ - 0x200800, - 0x1004, -}; - -static uint32_t bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rarp[1] = -{ - 0x1000000, -}; - -static uint32_t bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_first_4bytes[2] = -{ - 0xe00701c0, - 0x380, -}; - -static uint32_t bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_last_16bytes[2] = -{ - 0xc0060180, - 0x300, -}; - -static uint32_t bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_udp[2] = -{ - 0x781e00, - 0x3c0f, -}; - -static uint32_t bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l3[1] = -{ - 0x2000000, -}; - -static uint32_t bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l4[2] = -{ - 0x802000, - 0x4010, -}; - -static uint32_t bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l5[2] = -{ - 0x80441100, - 0x2208, -}; - -static uint32_t bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_itag[2] = -{ - 0xf00fc1f8, - 0x1f83, -}; - -static uint32_t bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_l2[2] = -{ - 0xfffffffe, - 0x7ffff, -}; - -static uint32_t bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_l2_instr_4byte[2] = -{ - 0x60318630, - 0x630c, -}; - -static uint32_t bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_l2_instr_8byte[2] = -{ - 0x80c618c0, - 0x18c31, -}; - -static uint32_t bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_otag[2] = -{ - 0x1ffe000, - 0x3ffc0, -}; - -static uint32_t bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_snap_or_llc[2] = -{ - 0x43ad15a0, - 0x75a2b, -}; - -static uint32_t bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_vpp_rx_md_header[2] = -{ - 0xfc000000, - 0x7ffff, -}; - -static uint32_t bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_arp[1] = -{ - 0x4, -}; - -static uint32_t bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_1[32] = -{ - 0xff7ff740, - 0x0, - 0x0, - 0x0, - 0x0, - 0x400000, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0xf7c00000, - 0xffefff7f, - 0xfdffdffe, - 0x7ffbffbf, - 0xfefff7ff, - 0xdffdffef, - 0x3f, -}; - -static uint32_t bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_2[50] = -{ - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0xfbffbc00, - 0x7, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0xffef0000, - 0x1fe, - 0x0, - 0x0, - 0x0, - 0x0, - 0x3fdffde, - 0x0, - 0x0, - 0x0, - 0x0, - 0xffde0000, - 0x3fd, - 0x0, - 0x0, - 0x0, - 0x0, - 0x3fdffde, - 0x0, - 0x0, - 0x0, - 0x0, - 0xffde0000, - 0x3fd, -}; - -static uint32_t bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_bfd[53] = -{ - 0x4000, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x200000, - 0x8000, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x1, - 0x0, - 0x0, - 0x0, - 0x0, - 0x20000, - 0x400, - 0x40000010, - 0x200000, - 0x4000, - 0x0, - 0x40000000, - 0x800000, - 0x10000, - 0x200, - 0x8000004, - 0x100000, - 0x8000, - 0x100, - 0x4000002, - 0x80000, - 0x1000, - 0x80000020, - 0x1000000, - 0x20000, - 0x400, - 0x10000008, - 0x200000, - 0x8000, - 0x100, - 0x4000002, - 0x80000, - 0x1000, - 0x80000020, - 0x1000000, - 0x20000, - 0x400, - 0x10000008, - 0x200000, -}; - -static uint32_t bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dcn[53] = -{ - 0x1f8000, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0xfc00000, - 0x3f0000, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x7e, - 0x0, - 0x0, - 0x0, - 0x0, - 0xfc0000, - 0x1f800, - 0x800007e0, - 0xfc0001f, - 0x1f8000, - 0x0, - 0x80000000, - 0x3f00001f, - 0x7e0000, - 0xfc00, - 0xf00001f8, - 0x7e00003, - 0x3f0000, - 0x7e00, - 0xf80000fc, - 0x3f00001, - 0x7e000, - 0xfc0, - 0x7e00003f, - 0xfc0000, - 0x1f800, - 0xe00003f0, - 0xfc00007, - 0x3f0000, - 0x7e00, - 0xf80000fc, - 0x3f00001, - 0x7e000, - 0xfc0, - 0x7e00003f, - 0xfc0000, - 0x1f800, - 0xe00003f0, - 0xfc00007, -}; - -static uint32_t bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_1[37] = -{ - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0xfeffef80, - 0xbffdffdf, - 0xff7ffbff, - 0xeffefff7, - 0xffdffdff, - 0x7fbffb, -}; - -static uint32_t bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_2[51] = -{ - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0xff7ff78, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0xfdffde00, - 0x3, - 0x0, - 0x0, - 0x0, - 0xbc000000, - 0x7fbff, - 0x0, - 0x0, - 0x0, - 0x0, - 0xfbffbc00, - 0x7, - 0x0, - 0x0, - 0x0, - 0xbc000000, - 0x7fbff, - 0x0, - 0x0, - 0x0, - 0x0, - 0xfbffbc00, - 0x7, -}; - -static uint32_t bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_esp_ext[48] = -{ - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x800000, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x2000000, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x10000000, - 0x0, - 0x0, - 0x0, - 0x0, - 0x800000, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x100, - 0x0, - 0x0, - 0x0, - 0x0, - 0x1000000, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x100, - 0x0, - 0x0, - 0x0, - 0x0, - 0x1000000, -}; - -static uint32_t bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ethertype[54] = -{ - 0xff7ff77e, - 0x0, - 0x0, - 0x0, - 0x0, - 0xffc00000, - 0x2fffffff, - 0xbffb8080, - 0xfeffeeff, - 0x1, - 0x0, - 0x0, - 0x0, - 0xdf800000, - 0x3fdff, - 0x0, - 0x0, - 0x0, - 0x0, - 0xfbffbe00, - 0xfff7ff7f, - 0xf7ffdffd, - 0xbffbff7f, - 0xff7ff7ff, - 0xffffffff, - 0xf7c04017, - 0xffefff7f, - 0xfdffdffe, - 0x7ffbffbf, - 0xfefff7ff, - 0xdffdffef, - 0xfeffefbf, - 0xbffdffdf, - 0xff7ffbff, - 0xeffefff7, - 0xffdffdff, - 0xefffbffb, - 0xffdffeff, - 0xfbffbffd, - 0xfff7ff7f, - 0xfdffeffe, - 0xbffbffdf, - 0xfeffefff, - 0xbffdffdf, - 0xff7ffbff, - 0xeffefff7, - 0xffdffdff, - 0xefffbffb, - 0xffdffeff, - 0xfbffbffd, - 0xfff7ff7f, - 0xfdffeffe, - 0xbffbffdf, - 0x77f, -}; - -static uint32_t bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_flex_l3_hdr_1[1] = -{ - 0x8, -}; - -static uint32_t bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_flex_l3_hdr_2[1] = -{ - 0x10, -}; - -static uint32_t bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_1[24] = -{ - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0xfbffbe00, - 0xfff7ff7f, - 0xf7ffdffd, - 0xbffbff7f, - 0xff7ff7ff, -}; - -static uint32_t bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_2[51] = -{ - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x7fbffbc, - 0x0, - 0x0, - 0x0, - 0x0, - 0xff780000, - 0xff7, - 0x0, - 0x0, - 0x0, - 0x0, - 0xff7ff78, - 0x0, - 0x0, - 0x0, - 0x0, - 0xff780000, - 0xff7, - 0x0, - 0x0, - 0x0, - 0x0, - 0xff7ff78, -}; - -static uint32_t bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_generic_metadata[53] = -{ - 0x200000, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x10000000, - 0x400000, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x80, - 0x0, - 0x0, - 0x0, - 0x0, - 0x1000000, - 0x20000, - 0x800, - 0x10000020, - 0x200000, - 0x0, - 0x0, - 0x40000020, - 0x800000, - 0x10000, - 0x200, - 0x8000004, - 0x400000, - 0x8000, - 0x100, - 0x4000002, - 0x80000, - 0x1000, - 0x80000040, - 0x1000000, - 0x20000, - 0x400, - 0x10000008, - 0x400000, - 0x8000, - 0x100, - 0x4000002, - 0x80000, - 0x1000, - 0x80000040, - 0x1000000, - 0x20000, - 0x400, - 0x10000008, -}; - -static uint32_t bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gpe[53] = -{ - 0x400000, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x20000000, - 0x800000, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x100, - 0x0, - 0x0, - 0x0, - 0x0, - 0x2000000, - 0x40000, - 0x1000, - 0x20000040, - 0x400000, - 0x0, - 0x0, - 0x80000040, - 0x1000000, - 0x20000, - 0x400, - 0x10000008, - 0x800000, - 0x10000, - 0x200, - 0x8000004, - 0x100000, - 0x2000, - 0x80, - 0x2000001, - 0x40000, - 0x800, - 0x20000010, - 0x800000, - 0x10000, - 0x200, - 0x8000004, - 0x100000, - 0x2000, - 0x80, - 0x2000001, - 0x40000, - 0x800, - 0x20000010, -}; - -static uint32_t bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre[25] = -{ - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0xff000000, - 0x7fffff, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x7fffffff, -}; - -static uint32_t bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_chksum[25] = -{ - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0xfc000000, - 0x3ff, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x3fffc, -}; - -static uint32_t bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_key[25] = -{ - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0xf8000000, - 0x3fc07, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x3fc07f8, -}; - -static uint32_t bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_rout[25] = -{ - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x60000000, - 0x633336, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x63333660, -}; - -static uint32_t bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_seq[25] = -{ - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x80000000, - 0x7bc3c7, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x7bc3c780, -}; - -static uint32_t bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_1[43] = -{ - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0xef800000, - 0xffdffeff, - 0xfbffbffd, - 0xfff7ff7f, - 0xfdffeffe, - 0xbffbffdf, - 0x7f, -}; - -static uint32_t bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_2[52] = -{ - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0xe0000000, - 0x3fdffd, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x78000000, - 0xff7ff, - 0x0, - 0x0, - 0x0, - 0x0, - 0xeffef000, - 0x1f, - 0x0, - 0x0, - 0x0, - 0xf0000000, - 0x1feffe, - 0x0, - 0x0, - 0x0, - 0x0, - 0xeffef000, - 0x1f, - 0x0, - 0x0, - 0x0, - 0xf0000000, - 0x1feffe, -}; - -static uint32_t bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_icmp[53] = -{ - 0x100, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x800000, - 0x0, - 0x200, - 0x0, - 0x0, - 0x0, - 0x0, - 0x4000000, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x800, - 0x40000010, - 0x1400000, - 0x0, - 0x100, - 0x0, - 0x1000000, - 0x20000, - 0x400, - 0x10000008, - 0x200000, - 0x4000, - 0x200, - 0x8000004, - 0x100000, - 0x2000, - 0x80000040, - 0x2000000, - 0x40000, - 0x800, - 0x20000010, - 0x400000, - 0x8000, - 0x200, - 0x8000004, - 0x100000, - 0x2000, - 0x80000040, - 0x2000000, - 0x40000, - 0x800, - 0x20000010, - 0x400000, - 0x8000, -}; - -static uint32_t bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_header[26] = -{ - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x2f000000, - 0x80, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x80000000, - 0x4017, -}; - -static uint32_t bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_metadata_base[26] = -{ - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x8000000, - 0x80, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x4004, -}; - -static uint32_t bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_igmp[14] = -{ - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x400000, - 0x0, - 0x8000, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x800000, -}; - -static uint32_t bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv4[14] = -{ - 0xff7ff760, - 0x0, - 0x0, - 0x0, - 0x0, - 0xffc00000, - 0x2fffffff, - 0xbffb8080, - 0xfeffeeff, - 0x1, - 0x0, - 0x0, - 0x0, - 0x800000, -}; - -static uint32_t bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv6[54] = -{ - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0xdf000000, - 0x3fdff, - 0x0, - 0x0, - 0x0, - 0x0, - 0xfbffbe00, - 0xfff7ff7f, - 0xf7ffdffd, - 0xbffbff7f, - 0xff7ff7ff, - 0xffffffff, - 0xf7c04017, - 0xffefff7f, - 0xfdffdffe, - 0x7ffbffbf, - 0xfefff7ff, - 0xdffdffef, - 0xfeffefbf, - 0xbffdffdf, - 0xff7ffbff, - 0xeffefff7, - 0xffdffdff, - 0xefffbffb, - 0xffdffeff, - 0xfbffbffd, - 0xfff7ff7f, - 0xfdffeffe, - 0xbffbffdf, - 0xfeffefff, - 0xbffdffdf, - 0xff7ffbff, - 0xeffefff7, - 0xffdffdff, - 0xefffbffb, - 0xffdffeff, - 0xfbffbffd, - 0xfff7ff7f, - 0xfdffeffe, - 0xbffbffdf, - 0x7f, -}; - -static uint32_t bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_p_1588[54] = -{ - 0x1000000, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x80000000, - 0x2000000, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x400, - 0x0, - 0x0, - 0x0, - 0x0, - 0x8000000, - 0x100000, - 0x4000, - 0x80000100, - 0x1000000, - 0x0, - 0x0, - 0x100, - 0x4000002, - 0x80000, - 0x1000, - 0x40000020, - 0x2000000, - 0x40000, - 0x800, - 0x20000010, - 0x400000, - 0x8000, - 0x200, - 0x8000004, - 0x100000, - 0x2000, - 0x80000040, - 0x2000000, - 0x40000, - 0x800, - 0x20000010, - 0x400000, - 0x8000, - 0x200, - 0x8000004, - 0x100000, - 0x2000, - 0x80000040, - 0x100, -}; - -static uint32_t bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rarp[54] = -{ - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x200, -}; - -static uint32_t bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rocev2_aeth[54] = -{ - 0x4020000, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x1000000, - 0x8040002, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x1008, - 0x0, - 0x0, - 0x0, - 0x0, - 0x20100000, - 0x402000, - 0x10080, - 0x1000402, - 0x4020002, - 0x0, - 0x0, - 0x4000402, - 0x10080008, - 0x201000, - 0x40004020, - 0x800080, - 0x8040001, - 0x100800, - 0x20002010, - 0x80400040, - 0x1008000, - 0x20100, - 0x8000804, - 0x20100010, - 0x402000, - 0x80008040, - 0x1000100, - 0x8040002, - 0x100800, - 0x20002010, - 0x80400040, - 0x1008000, - 0x20100, - 0x8000804, - 0x20100010, - 0x402000, - 0x80008040, - 0x1000100, - 0x2, -}; - -static uint32_t bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rocev2_bth[54] = -{ - 0x1e0f0000, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x7800000, - 0x3c1e000f, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x783c, - 0x0, - 0x0, - 0x0, - 0x0, - 0xf0780000, - 0x1e0f000, - 0x783c0, - 0x7801e0f, - 0x1e0f000f, - 0x0, - 0x0, - 0x1e001e0f, - 0x783c003c, - 0xf07800, - 0xe001e0f0, - 0x83c003c1, - 0x3c1e0007, - 0x783c00, - 0xf000f078, - 0xc1e001e0, - 0x783c003, - 0xf0780, - 0x3c003c1e, - 0xf0780078, - 0x1e0f000, - 0xc003c1e0, - 0x7800783, - 0x3c1e000f, - 0x783c00, - 0xf000f078, - 0xc1e001e0, - 0x783c003, - 0xf0780, - 0x3c003c1e, - 0xf0780078, - 0x1e0f000, - 0xc003c1e0, - 0x7800783, - 0xf, -}; - -static uint32_t bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rocev2_deth[54] = -{ - 0x8040000, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x2000000, - 0x10080004, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x2010, - 0x0, - 0x0, - 0x0, - 0x0, - 0x40200000, - 0x804000, - 0x20100, - 0x2000804, - 0x8040004, - 0x0, - 0x0, - 0x8000804, - 0x20100010, - 0x402000, - 0x80008040, - 0x1000100, - 0x10080002, - 0x201000, - 0x40004020, - 0x800080, - 0x2010001, - 0x40200, - 0x10001008, - 0x40200020, - 0x804000, - 0x10080, - 0x2000201, - 0x10080004, - 0x201000, - 0x40004020, - 0x800080, - 0x2010001, - 0x40200, - 0x10001008, - 0x40200020, - 0x804000, - 0x10080, - 0x2000201, - 0x4, -}; - -static uint32_t bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rocev2_reth[54] = -{ - 0x10080000, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x4000000, - 0x20100008, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x4020, - 0x0, - 0x0, - 0x0, - 0x0, - 0x80400000, - 0x1008000, - 0x40200, - 0x4001008, - 0x10080008, - 0x0, - 0x0, - 0x10001008, - 0x40200020, - 0x804000, - 0x10080, - 0x2000201, - 0x20100004, - 0x402000, - 0x80008040, - 0x1000100, - 0x4020002, - 0x80400, - 0x20002010, - 0x80400040, - 0x1008000, - 0x20100, - 0x4000402, - 0x20100008, - 0x402000, - 0x80008040, - 0x1000100, - 0x4020002, - 0x80400, - 0x20002010, - 0x80400040, - 0x1008000, - 0x20100, - 0x4000402, - 0x8, -}; - -static uint32_t bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_1[48] = -{ - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0xfeffef80, - 0xbffdffdf, - 0xff7ffbff, - 0xeffefff7, - 0xffdffdff, - 0x7fbffb, -}; - -static uint32_t bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_2[53] = -{ - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0xf7800000, - 0xff7f, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0xfef00000, - 0x1fef, - 0x0, - 0x0, - 0x0, - 0x0, - 0x3fdffde0, - 0x0, - 0x0, - 0x0, - 0x0, - 0xfde00000, - 0x3fdf, - 0x0, - 0x0, - 0x0, - 0x0, - 0x3fdffde0, - 0x0, - 0x0, - 0x0, - 0x0, - 0xfde00000, - 0x3fdf, -}; - -static uint32_t bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_first_4bytes[53] = -{ - 0x1600, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0xe000000, - 0xb0000, - 0x2c00, - 0x0, - 0x0, - 0x0, - 0x0, - 0x58000000, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0xb000, - 0x80000160, - 0x16000005, - 0xb0000, - 0x1600, - 0x0, - 0x16000007, - 0x2c0000, - 0x5800, - 0x600000b0, - 0x2c00001, - 0x58000, - 0x2c00, - 0xb0000058, - 0x1600000, - 0x2c000, - 0x580, - 0x2c00000b, - 0x580000, - 0xb000, - 0xc0000160, - 0x5800002, - 0xb0000, - 0x2c00, - 0xb0000058, - 0x1600000, - 0x2c000, - 0x580, - 0x2c00000b, - 0x580000, - 0xb000, - 0xc0000160, - 0x5800002, - 0xb0000, -}; - -static uint32_t bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_last_16bytes[53] = -{ - 0x1400, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0xc000000, - 0xa0000, - 0x2800, - 0x0, - 0x0, - 0x0, - 0x0, - 0x50000000, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0xa000, - 0x140, - 0x14000005, - 0xa0000, - 0x1400, - 0x0, - 0x14000006, - 0x280000, - 0x5000, - 0x400000a0, - 0x2800001, - 0x50000, - 0x2800, - 0xa0000050, - 0x1400000, - 0x28000, - 0x500, - 0x2800000a, - 0x500000, - 0xa000, - 0x80000140, - 0x5000002, - 0xa0000, - 0x2800, - 0xa0000050, - 0x1400000, - 0x28000, - 0x500, - 0x2800000a, - 0x500000, - 0xa000, - 0x80000140, - 0x5000002, - 0xa0000, -}; - -static uint32_t bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_udp[54] = -{ - 0x7f7fe000, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x20000000, - 0xbff00080, - 0xfeffc03f, - 0x0, - 0x0, - 0x0, - 0x0, - 0x80000000, - 0x1fdff, - 0x0, - 0x0, - 0x0, - 0x0, - 0xfbff0000, - 0x7f7fe03, - 0xe01fdff8, - 0xbff07f7f, - 0x7f7fe03f, - 0x0, - 0xe0004010, - 0xffc07f7f, - 0xfdff80fe, - 0x3fbff01, - 0xfc07f7fe, - 0xdff80fef, - 0xfeffc01f, - 0x1fdff80, - 0xfe03fbff, - 0xeffc07f7, - 0x1fdff80f, - 0xc03fbff0, - 0xff80feff, - 0xfbff01fd, - 0x7f7fe03, - 0xf80feffc, - 0xbff01fdf, - 0xfeffc03f, - 0x1fdff80, - 0xfe03fbff, - 0xeffc07f7, - 0x1fdff80f, - 0xc03fbff0, - 0xff80feff, - 0xfbff01fd, - 0x7f7fe03, - 0xf80feffc, - 0xbff01fdf, - 0x3f, -}; - -static uint32_t bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l3[54] = -{ - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x400, -}; - -static uint32_t bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l4[54] = -{ - 0x80000000, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x40, - 0x1, - 0x0, - 0x0, - 0x0, - 0x0, - 0x20000, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x8000004, - 0x200000, - 0x8000, - 0x80000040, - 0x0, - 0x0, - 0x8000, - 0x100, - 0x4000002, - 0x80000, - 0x1000, - 0x20, - 0x2000001, - 0x40000, - 0x800, - 0x20000010, - 0x400000, - 0x10000, - 0x200, - 0x8000004, - 0x100000, - 0x2000, - 0x40, - 0x2000001, - 0x40000, - 0x800, - 0x20000010, - 0x400000, - 0x10000, - 0x200, - 0x8000004, - 0x100000, - 0x2000, - 0x40, -}; - -static uint32_t bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l5[54] = -{ - 0x20001000, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x80000, - 0x40002010, - 0x0, - 0x0, - 0x0, - 0x0, - 0x40000000, - 0x8000, - 0x0, - 0x0, - 0x0, - 0x0, - 0x8000, - 0x2000101, - 0x10080004, - 0x82000, - 0x20001010, - 0x0, - 0x10000000, - 0x202000, - 0x80004040, - 0x1000080, - 0x2020001, - 0x40400, - 0x40002008, - 0x80800040, - 0x1010000, - 0x20200, - 0x8000404, - 0x20100008, - 0x404000, - 0x8080, - 0x2000101, - 0x4040002, - 0x80800, - 0x40002010, - 0x80800040, - 0x1010000, - 0x20200, - 0x8000404, - 0x20100008, - 0x404000, - 0x8080, - 0x2000101, - 0x4040002, - 0x80800, - 0x10, -}; - -static uint32_t bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_vxlan[54] = -{ - 0x40100000, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x8000000, - 0x80200020, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x10040, - 0x0, - 0x0, - 0x0, - 0x0, - 0x800000, - 0x4010002, - 0x100400, - 0x8004010, - 0x40100020, - 0x0, - 0x0, - 0x20004010, - 0x400080, - 0x2008001, - 0x40100, - 0x4000802, - 0x80200010, - 0x1004000, - 0x20080, - 0x2000401, - 0x10040008, - 0x200800, - 0x40008020, - 0x800100, - 0x4010002, - 0x80200, - 0x8001004, - 0x80200020, - 0x1004000, - 0x20080, - 0x2000401, - 0x10040008, - 0x200800, - 0x40008020, - 0x800100, - 0x4010002, - 0x80200, - 0x8001004, - 0x20, -}; - -static uint32_t bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_1[54] = -{ - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0xfeffee80, - 0x1, - 0x0, - 0x0, - 0x0, - 0x800000, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0xef800000, - 0xffdffeff, - 0xfbffbffd, - 0xfff7ff7f, - 0xfdffeffe, - 0xbffbffdf, - 0x7f, -}; - -static uint32_t bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_2[54] = -{ - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0xff7ff780, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0x0, - 0xdffde000, - 0x3f, - 0x0, - 0x0, - 0x0, - 0xc0000000, - 0x7fbffb, - 0x0, - 0x0, - 0x0, - 0x0, - 0xbffbc000, - 0x7f, - 0x0, - 0x0, - 0x0, - 0xc0000000, - 0x7fbffb, - 0x0, - 0x0, - 0x0, - 0x0, - 0xbffbc000, - 0x7f, -}; - -static uint32_t bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_sys_hdr_ep_nih[1] = -{ - 0x4, -}; - -static uint32_t bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_sys_hdr_loopback_header[1] = -{ - 0x8, -}; - - -static bcmpkt_rxpmd_match_id_db_t -bcm78920_a0_vna_4_6_1_0_rxpmd_match_id_db[BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_COUNT] = { - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_ITAG */ - .name = "EGRESS_PKT_FWD_L2_HDR_ITAG", - .match = 0x10, - .match_mask = 0x10, - .match_maxbit = 35, - .match_minbit = 29, - .maxbit = 4, - .minbit = 4, - .value = 0x1, - .pmaxbit = 35, - .pminbit = 29, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2 */ - .name = "EGRESS_PKT_FWD_L2_HDR_L2", - .match = 0x1, - .match_mask = 0x1, - .match_maxbit = 35, - .match_minbit = 29, - .maxbit = 0, - .minbit = 0, - .value = 0x1, - .pmaxbit = 35, - .pminbit = 29, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2_INSTR_4BYTE */ - .name = "EGRESS_PKT_FWD_L2_HDR_L2_INSTR_4BYTE", - .match = 0x20, - .match_mask = 0x60, - .match_maxbit = 35, - .match_minbit = 29, - .maxbit = 6, - .minbit = 5, - .value = 0x1, - .pmaxbit = 35, - .pminbit = 29, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_L2_INSTR_8BYTE */ - .name = "EGRESS_PKT_FWD_L2_HDR_L2_INSTR_8BYTE", - .match = 0x40, - .match_mask = 0x60, - .match_maxbit = 35, - .match_minbit = 29, - .maxbit = 6, - .minbit = 5, - .value = 0x2, - .pmaxbit = 35, - .pminbit = 29, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_NONE */ - .name = "EGRESS_PKT_FWD_L2_HDR_NONE", - .match = 0x0, - .match_mask = 0x7f, - .match_maxbit = 35, - .match_minbit = 29, - .maxbit = 6, - .minbit = 0, - .value = 0x0, - .pmaxbit = 35, - .pminbit = 29, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_OTAG */ - .name = "EGRESS_PKT_FWD_L2_HDR_OTAG", - .match = 0x8, - .match_mask = 0x8, - .match_maxbit = 35, - .match_minbit = 29, - .maxbit = 3, - .minbit = 3, - .value = 0x1, - .pmaxbit = 35, - .pminbit = 29, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC */ - .name = "EGRESS_PKT_FWD_L2_HDR_SNAP_OR_LLC", - .match = 0x2, - .match_mask = 0x2, - .match_maxbit = 35, - .match_minbit = 29, - .maxbit = 1, - .minbit = 1, - .value = 0x1, - .pmaxbit = 35, - .pminbit = 29, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L2_HDR_VPP_RX_MD_HEADER */ - .name = "EGRESS_PKT_FWD_L2_HDR_VPP_RX_MD_HEADER", - .match = 0x4, - .match_mask = 0x4, - .match_maxbit = 35, - .match_minbit = 29, - .maxbit = 2, - .minbit = 2, - .value = 0x1, - .pmaxbit = 35, - .pminbit = 29, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ARP */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_ARP", - .match = 0x8000, - .match_mask = 0xf8006, - .match_maxbit = 55, - .match_minbit = 36, - .maxbit = 17, - .minbit = 15, - .value = 0x1, - .pmaxbit = 55, - .pminbit = 36, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_1", - .match = 0x30000, - .match_mask = 0x38000, - .match_maxbit = 55, - .match_minbit = 36, - .maxbit = 17, - .minbit = 15, - .value = 0x6, - .pmaxbit = 55, - .pminbit = 36, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_AUTH_EXT_2", - .match = 0xa00, - .match_mask = 0x1e00, - .match_maxbit = 55, - .match_minbit = 36, - .maxbit = 12, - .minbit = 9, - .value = 0x5, - .pmaxbit = 55, - .pminbit = 36, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_BFD */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_BFD", - .match = 0x48, - .match_mask = 0x1c8, - .match_maxbit = 55, - .match_minbit = 36, - .maxbit = 8, - .minbit = 6, - .value = 0x1, - .pmaxbit = 55, - .pminbit = 36, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DCN */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_DCN", - .match = 0x20, - .match_mask = 0x30, - .match_maxbit = 55, - .match_minbit = 36, - .maxbit = 5, - .minbit = 4, - .value = 0x2, - .pmaxbit = 55, - .pminbit = 36, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_1", - .match = 0x18004, - .match_mask = 0x38006, - .match_maxbit = 55, - .match_minbit = 36, - .maxbit = 17, - .minbit = 15, - .value = 0x3, - .pmaxbit = 55, - .pminbit = 36, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_DEST_OPT_EXT_2", - .match = 0x1000, - .match_mask = 0x1e00, - .match_maxbit = 55, - .match_minbit = 36, - .maxbit = 12, - .minbit = 9, - .value = 0x8, - .pmaxbit = 55, - .pminbit = 36, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_ESP_EXT", - .match = 0x200, - .match_mask = 0x1e00, - .match_maxbit = 55, - .match_minbit = 36, - .maxbit = 12, - .minbit = 9, - .value = 0x1, - .pmaxbit = 55, - .pminbit = 36, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_ETHERTYPE", - .match = 0x1, - .match_mask = 0x1, - .match_maxbit = 55, - .match_minbit = 36, - .maxbit = 0, - .minbit = 0, - .value = 0x1, - .pmaxbit = 55, - .pminbit = 36, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FLEX_L3_HDR_1 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_FLEX_L3_HDR_1", - .match = 0x18000, - .match_mask = 0x38006, - .match_maxbit = 55, - .match_minbit = 36, - .maxbit = 17, - .minbit = 15, - .value = 0x3, - .pmaxbit = 55, - .pminbit = 36, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FLEX_L3_HDR_2 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_FLEX_L3_HDR_2", - .match = 0x20000, - .match_mask = 0x38006, - .match_maxbit = 55, - .match_minbit = 36, - .maxbit = 17, - .minbit = 15, - .value = 0x4, - .pmaxbit = 55, - .pminbit = 36, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_1", - .match = 0x20004, - .match_mask = 0x38006, - .match_maxbit = 55, - .match_minbit = 36, - .maxbit = 17, - .minbit = 15, - .value = 0x4, - .pmaxbit = 55, - .pminbit = 36, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_FRAG_EXT_2", - .match = 0x1200, - .match_mask = 0x1e00, - .match_maxbit = 55, - .match_minbit = 36, - .maxbit = 12, - .minbit = 9, - .value = 0x9, - .pmaxbit = 55, - .pminbit = 36, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GENERIC_METADATA */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_GENERIC_METADATA", - .match = 0x2008, - .match_mask = 0x61c8, - .match_maxbit = 55, - .match_minbit = 36, - .maxbit = 14, - .minbit = 13, - .value = 0x1, - .pmaxbit = 55, - .pminbit = 36, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GPE */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_GPE", - .match = 0xc8, - .match_mask = 0x1c8, - .match_maxbit = 55, - .match_minbit = 36, - .maxbit = 8, - .minbit = 6, - .value = 0x3, - .pmaxbit = 55, - .pminbit = 36, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE", - .match = 0x80000, - .match_mask = 0x80000, - .match_maxbit = 55, - .match_minbit = 36, - .maxbit = 19, - .minbit = 19, - .value = 0x1, - .pmaxbit = 55, - .pminbit = 36, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_CHKSUM", - .match = 0x400, - .match_mask = 0x1e00, - .match_maxbit = 55, - .match_minbit = 36, - .maxbit = 12, - .minbit = 9, - .value = 0x2, - .pmaxbit = 55, - .pminbit = 36, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_KEY", - .match = 0x80, - .match_mask = 0x1c0, - .match_maxbit = 55, - .match_minbit = 36, - .maxbit = 8, - .minbit = 6, - .value = 0x2, - .pmaxbit = 55, - .pminbit = 36, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_ROUT", - .match = 0x88000, - .match_mask = 0xb8000, - .match_maxbit = 55, - .match_minbit = 36, - .maxbit = 17, - .minbit = 15, - .value = 0x1, - .pmaxbit = 55, - .pminbit = 36, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_GRE_SEQ", - .match = 0x82000, - .match_mask = 0x86000, - .match_maxbit = 55, - .match_minbit = 36, - .maxbit = 14, - .minbit = 13, - .value = 0x1, - .pmaxbit = 55, - .pminbit = 36, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_1", - .match = 0x8004, - .match_mask = 0xf8006, - .match_maxbit = 55, - .match_minbit = 36, - .maxbit = 17, - .minbit = 15, - .value = 0x1, - .pmaxbit = 55, - .pminbit = 36, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_HOP_BY_HOP_EXT_2", - .match = 0x600, - .match_mask = 0x1e00, - .match_maxbit = 55, - .match_minbit = 36, - .maxbit = 12, - .minbit = 9, - .value = 0x3, - .pmaxbit = 55, - .pminbit = 36, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ICMP */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_ICMP", - .match = 0x40, - .match_mask = 0x1c8, - .match_maxbit = 55, - .match_minbit = 36, - .maxbit = 8, - .minbit = 6, - .value = 0x1, - .pmaxbit = 55, - .pminbit = 36, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_IFA_HEADER", - .match = 0x40000, - .match_mask = 0x40000, - .match_maxbit = 55, - .match_minbit = 36, - .maxbit = 18, - .minbit = 18, - .value = 0x1, - .pmaxbit = 55, - .pminbit = 36, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_IFA_METADATA_BASE", - .match = 0x48000, - .match_mask = 0x78000, - .match_maxbit = 55, - .match_minbit = 36, - .maxbit = 17, - .minbit = 15, - .value = 0x1, - .pmaxbit = 55, - .pminbit = 36, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IGMP */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_IGMP", - .match = 0x800, - .match_mask = 0x1e00, - .match_maxbit = 55, - .match_minbit = 36, - .maxbit = 12, - .minbit = 9, - .value = 0x4, - .pmaxbit = 55, - .pminbit = 36, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV4 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV4", - .match = 0x2, - .match_mask = 0x6, - .match_maxbit = 55, - .match_minbit = 36, - .maxbit = 2, - .minbit = 1, - .value = 0x1, - .pmaxbit = 55, - .pminbit = 36, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_IPV6 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_IPV6", - .match = 0x4, - .match_mask = 0x6, - .match_maxbit = 55, - .match_minbit = 36, - .maxbit = 2, - .minbit = 1, - .value = 0x2, - .pmaxbit = 55, - .pminbit = 36, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_NONE */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_NONE", - .match = 0x0, - .match_mask = 0xfffff, - .match_maxbit = 55, - .match_minbit = 36, - .maxbit = 19, - .minbit = 0, - .value = 0x0, - .pmaxbit = 55, - .pminbit = 36, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_P_1588 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_P_1588", - .match = 0x100, - .match_mask = 0x1c0, - .match_maxbit = 55, - .match_minbit = 36, - .maxbit = 8, - .minbit = 6, - .value = 0x4, - .pmaxbit = 55, - .pminbit = 36, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_RARP */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_RARP", - .match = 0x10000, - .match_mask = 0x38006, - .match_maxbit = 55, - .match_minbit = 36, - .maxbit = 17, - .minbit = 15, - .value = 0x2, - .pmaxbit = 55, - .pminbit = 36, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROCEV2_AETH */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_ROCEV2_AETH", - .match = 0x6000, - .match_mask = 0x6000, - .match_maxbit = 55, - .match_minbit = 36, - .maxbit = 14, - .minbit = 13, - .value = 0x3, - .pmaxbit = 55, - .pminbit = 36, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROCEV2_BTH */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_ROCEV2_BTH", - .match = 0x180, - .match_mask = 0x1c0, - .match_maxbit = 55, - .match_minbit = 36, - .maxbit = 8, - .minbit = 6, - .value = 0x6, - .pmaxbit = 55, - .pminbit = 36, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROCEV2_DETH */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_ROCEV2_DETH", - .match = 0x4000, - .match_mask = 0x6000, - .match_maxbit = 55, - .match_minbit = 36, - .maxbit = 14, - .minbit = 13, - .value = 0x2, - .pmaxbit = 55, - .pminbit = 36, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROCEV2_RETH */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_ROCEV2_RETH", - .match = 0x2188, - .match_mask = 0x61c8, - .match_maxbit = 55, - .match_minbit = 36, - .maxbit = 14, - .minbit = 13, - .value = 0x1, - .pmaxbit = 55, - .pminbit = 36, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_1", - .match = 0x10004, - .match_mask = 0x38006, - .match_maxbit = 55, - .match_minbit = 36, - .maxbit = 17, - .minbit = 15, - .value = 0x2, - .pmaxbit = 55, - .pminbit = 36, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_ROUT_EXT_2", - .match = 0xe00, - .match_mask = 0x1e00, - .match_maxbit = 55, - .match_minbit = 36, - .maxbit = 12, - .minbit = 9, - .value = 0x7, - .pmaxbit = 55, - .pminbit = 36, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_FIRST_4BYTES", - .match = 0x10, - .match_mask = 0x30, - .match_maxbit = 55, - .match_minbit = 36, - .maxbit = 5, - .minbit = 4, - .value = 0x1, - .pmaxbit = 55, - .pminbit = 36, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_TCP_LAST_16BYTES", - .match = 0x2010, - .match_mask = 0x6030, - .match_maxbit = 55, - .match_minbit = 36, - .maxbit = 14, - .minbit = 13, - .value = 0x1, - .pmaxbit = 55, - .pminbit = 36, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UDP */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_UDP", - .match = 0x8, - .match_mask = 0x8, - .match_maxbit = 55, - .match_minbit = 36, - .maxbit = 3, - .minbit = 3, - .value = 0x1, - .pmaxbit = 55, - .pminbit = 36, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L3", - .match = 0x28000, - .match_mask = 0x38000, - .match_maxbit = 55, - .match_minbit = 36, - .maxbit = 17, - .minbit = 15, - .value = 0x5, - .pmaxbit = 55, - .pminbit = 36, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L4", - .match = 0xc0, - .match_mask = 0x1c8, - .match_maxbit = 55, - .match_minbit = 36, - .maxbit = 8, - .minbit = 6, - .value = 0x3, - .pmaxbit = 55, - .pminbit = 36, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_UNKNOWN_L5", - .match = 0x140, - .match_mask = 0x1c0, - .match_maxbit = 55, - .match_minbit = 36, - .maxbit = 8, - .minbit = 6, - .value = 0x5, - .pmaxbit = 55, - .pminbit = 36, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_VXLAN */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_VXLAN", - .match = 0x1c0, - .match_mask = 0x1c0, - .match_maxbit = 55, - .match_minbit = 36, - .maxbit = 8, - .minbit = 6, - .value = 0x7, - .pmaxbit = 55, - .pminbit = 36, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_1", - .match = 0x38000, - .match_mask = 0x38000, - .match_maxbit = 55, - .match_minbit = 36, - .maxbit = 17, - .minbit = 15, - .value = 0x7, - .pmaxbit = 55, - .pminbit = 36, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2 */ - .name = "EGRESS_PKT_FWD_L3_L4_HDR_WESP_EXT_2", - .match = 0xc00, - .match_mask = 0x1e00, - .match_maxbit = 55, - .match_minbit = 36, - .maxbit = 12, - .minbit = 9, - .value = 0x6, - .pmaxbit = 55, - .pminbit = 36, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_EP_NIH */ - .name = "EGRESS_PKT_SYS_HDR_EP_NIH", - .match = 0x2, - .match_mask = 0x3, - .match_maxbit = 1, - .match_minbit = 0, - .maxbit = 1, - .minbit = 0, - .value = 0x2, - .pmaxbit = 1, - .pminbit = 0, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_LOOPBACK_HEADER */ - .name = "EGRESS_PKT_SYS_HDR_LOOPBACK_HEADER", - .match = 0x1, - .match_mask = 0x3, - .match_maxbit = 1, - .match_minbit = 0, - .maxbit = 1, - .minbit = 0, - .value = 0x1, - .pmaxbit = 1, - .pminbit = 0, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_SYS_HDR_NONE */ - .name = "EGRESS_PKT_SYS_HDR_NONE", - .match = 0x0, - .match_mask = 0x3, - .match_maxbit = 1, - .match_minbit = 0, - .maxbit = 1, - .minbit = 0, - .value = 0x0, - .pmaxbit = 1, - .pminbit = 0, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_ITAG */ - .name = "EGRESS_PKT_TUNNEL_L2_HDR_ITAG", - .match = 0x10, - .match_mask = 0x10, - .match_maxbit = 8, - .match_minbit = 2, - .maxbit = 4, - .minbit = 4, - .value = 0x1, - .pmaxbit = 8, - .pminbit = 2, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2 */ - .name = "EGRESS_PKT_TUNNEL_L2_HDR_L2", - .match = 0x1, - .match_mask = 0x1, - .match_maxbit = 8, - .match_minbit = 2, - .maxbit = 0, - .minbit = 0, - .value = 0x1, - .pmaxbit = 8, - .pminbit = 2, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2_INSTR_4BYTE */ - .name = "EGRESS_PKT_TUNNEL_L2_HDR_L2_INSTR_4BYTE", - .match = 0x20, - .match_mask = 0x60, - .match_maxbit = 8, - .match_minbit = 2, - .maxbit = 6, - .minbit = 5, - .value = 0x1, - .pmaxbit = 8, - .pminbit = 2, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_L2_INSTR_8BYTE */ - .name = "EGRESS_PKT_TUNNEL_L2_HDR_L2_INSTR_8BYTE", - .match = 0x40, - .match_mask = 0x60, - .match_maxbit = 8, - .match_minbit = 2, - .maxbit = 6, - .minbit = 5, - .value = 0x2, - .pmaxbit = 8, - .pminbit = 2, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_NONE */ - .name = "EGRESS_PKT_TUNNEL_L2_HDR_NONE", - .match = 0x0, - .match_mask = 0x7f, - .match_maxbit = 8, - .match_minbit = 2, - .maxbit = 6, - .minbit = 0, - .value = 0x0, - .pmaxbit = 8, - .pminbit = 2, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_OTAG */ - .name = "EGRESS_PKT_TUNNEL_L2_HDR_OTAG", - .match = 0x8, - .match_mask = 0x8, - .match_maxbit = 8, - .match_minbit = 2, - .maxbit = 3, - .minbit = 3, - .value = 0x1, - .pmaxbit = 8, - .pminbit = 2, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC */ - .name = "EGRESS_PKT_TUNNEL_L2_HDR_SNAP_OR_LLC", - .match = 0x2, - .match_mask = 0x2, - .match_maxbit = 8, - .match_minbit = 2, - .maxbit = 1, - .minbit = 1, - .value = 0x1, - .pmaxbit = 8, - .pminbit = 2, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L2_HDR_VPP_RX_MD_HEADER */ - .name = "EGRESS_PKT_TUNNEL_L2_HDR_VPP_RX_MD_HEADER", - .match = 0x4, - .match_mask = 0x4, - .match_maxbit = 8, - .match_minbit = 2, - .maxbit = 2, - .minbit = 2, - .value = 0x1, - .pmaxbit = 8, - .pminbit = 2, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ARP", - .match = 0x8000, - .match_mask = 0xf8006, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 17, - .minbit = 15, - .value = 0x1, - .pmaxbit = 28, - .pminbit = 9, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_1", - .match = 0x30000, - .match_mask = 0x38000, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 17, - .minbit = 15, - .value = 0x6, - .pmaxbit = 28, - .pminbit = 9, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_AUTH_EXT_2", - .match = 0xa00, - .match_mask = 0x1e00, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 12, - .minbit = 9, - .value = 0x5, - .pmaxbit = 28, - .pminbit = 9, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_BFD", - .match = 0x48, - .match_mask = 0x1c8, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 8, - .minbit = 6, - .value = 0x1, - .pmaxbit = 28, - .pminbit = 9, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DCN */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_DCN", - .match = 0x20, - .match_mask = 0x30, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 5, - .minbit = 4, - .value = 0x2, - .pmaxbit = 28, - .pminbit = 9, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_1", - .match = 0x18004, - .match_mask = 0x38006, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 17, - .minbit = 15, - .value = 0x3, - .pmaxbit = 28, - .pminbit = 9, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_DEST_OPT_EXT_2", - .match = 0x1000, - .match_mask = 0x1e00, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 12, - .minbit = 9, - .value = 0x8, - .pmaxbit = 28, - .pminbit = 9, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ESP_EXT", - .match = 0x200, - .match_mask = 0x1e00, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 12, - .minbit = 9, - .value = 0x1, - .pmaxbit = 28, - .pminbit = 9, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ETHERTYPE", - .match = 0x1, - .match_mask = 0x1, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 0, - .minbit = 0, - .value = 0x1, - .pmaxbit = 28, - .pminbit = 9, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FLEX_L3_HDR_1 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FLEX_L3_HDR_1", - .match = 0x18000, - .match_mask = 0x38006, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 17, - .minbit = 15, - .value = 0x3, - .pmaxbit = 28, - .pminbit = 9, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FLEX_L3_HDR_2 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FLEX_L3_HDR_2", - .match = 0x20000, - .match_mask = 0x38006, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 17, - .minbit = 15, - .value = 0x4, - .pmaxbit = 28, - .pminbit = 9, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_1", - .match = 0x20004, - .match_mask = 0x38006, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 17, - .minbit = 15, - .value = 0x4, - .pmaxbit = 28, - .pminbit = 9, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_FRAG_EXT_2", - .match = 0x1200, - .match_mask = 0x1e00, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 12, - .minbit = 9, - .value = 0x9, - .pmaxbit = 28, - .pminbit = 9, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GENERIC_METADATA */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GENERIC_METADATA", - .match = 0x2008, - .match_mask = 0x61c8, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 14, - .minbit = 13, - .value = 0x1, - .pmaxbit = 28, - .pminbit = 9, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GPE", - .match = 0xc8, - .match_mask = 0x1c8, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 8, - .minbit = 6, - .value = 0x3, - .pmaxbit = 28, - .pminbit = 9, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE", - .match = 0x80000, - .match_mask = 0x80000, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 19, - .minbit = 19, - .value = 0x1, - .pmaxbit = 28, - .pminbit = 9, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_CHKSUM", - .match = 0x400, - .match_mask = 0x1e00, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 12, - .minbit = 9, - .value = 0x2, - .pmaxbit = 28, - .pminbit = 9, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_KEY", - .match = 0x80, - .match_mask = 0x1c0, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 8, - .minbit = 6, - .value = 0x2, - .pmaxbit = 28, - .pminbit = 9, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_ROUT", - .match = 0x88000, - .match_mask = 0xb8000, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 17, - .minbit = 15, - .value = 0x1, - .pmaxbit = 28, - .pminbit = 9, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_GRE_SEQ", - .match = 0x82000, - .match_mask = 0x86000, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 14, - .minbit = 13, - .value = 0x1, - .pmaxbit = 28, - .pminbit = 9, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_1", - .match = 0x8004, - .match_mask = 0xf8006, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 17, - .minbit = 15, - .value = 0x1, - .pmaxbit = 28, - .pminbit = 9, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_HOP_BY_HOP_EXT_2", - .match = 0x600, - .match_mask = 0x1e00, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 12, - .minbit = 9, - .value = 0x3, - .pmaxbit = 28, - .pminbit = 9, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ICMP", - .match = 0x40, - .match_mask = 0x1c8, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 8, - .minbit = 6, - .value = 0x1, - .pmaxbit = 28, - .pminbit = 9, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_HEADER", - .match = 0x40000, - .match_mask = 0x40000, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 18, - .minbit = 18, - .value = 0x1, - .pmaxbit = 28, - .pminbit = 9, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IFA_METADATA_BASE", - .match = 0x48000, - .match_mask = 0x78000, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 17, - .minbit = 15, - .value = 0x1, - .pmaxbit = 28, - .pminbit = 9, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IGMP", - .match = 0x800, - .match_mask = 0x1e00, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 12, - .minbit = 9, - .value = 0x4, - .pmaxbit = 28, - .pminbit = 9, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV4", - .match = 0x2, - .match_mask = 0x6, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 2, - .minbit = 1, - .value = 0x1, - .pmaxbit = 28, - .pminbit = 9, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_IPV6", - .match = 0x4, - .match_mask = 0x6, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 2, - .minbit = 1, - .value = 0x2, - .pmaxbit = 28, - .pminbit = 9, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_NONE", - .match = 0x0, - .match_mask = 0xfffff, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 19, - .minbit = 0, - .value = 0x0, - .pmaxbit = 28, - .pminbit = 9, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_P_1588", - .match = 0x100, - .match_mask = 0x1c0, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 8, - .minbit = 6, - .value = 0x4, - .pmaxbit = 28, - .pminbit = 9, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_RARP", - .match = 0x10000, - .match_mask = 0x38006, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 17, - .minbit = 15, - .value = 0x2, - .pmaxbit = 28, - .pminbit = 9, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROCEV2_AETH */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ROCEV2_AETH", - .match = 0x6000, - .match_mask = 0x6000, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 14, - .minbit = 13, - .value = 0x3, - .pmaxbit = 28, - .pminbit = 9, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROCEV2_BTH */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ROCEV2_BTH", - .match = 0x180, - .match_mask = 0x1c0, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 8, - .minbit = 6, - .value = 0x6, - .pmaxbit = 28, - .pminbit = 9, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROCEV2_DETH */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ROCEV2_DETH", - .match = 0x4000, - .match_mask = 0x6000, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 14, - .minbit = 13, - .value = 0x2, - .pmaxbit = 28, - .pminbit = 9, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROCEV2_RETH */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ROCEV2_RETH", - .match = 0x2188, - .match_mask = 0x61c8, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 14, - .minbit = 13, - .value = 0x1, - .pmaxbit = 28, - .pminbit = 9, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_1", - .match = 0x10004, - .match_mask = 0x38006, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 17, - .minbit = 15, - .value = 0x2, - .pmaxbit = 28, - .pminbit = 9, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_ROUT_EXT_2", - .match = 0xe00, - .match_mask = 0x1e00, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 12, - .minbit = 9, - .value = 0x7, - .pmaxbit = 28, - .pminbit = 9, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_FIRST_4BYTES", - .match = 0x10, - .match_mask = 0x30, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 5, - .minbit = 4, - .value = 0x1, - .pmaxbit = 28, - .pminbit = 9, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_TCP_LAST_16BYTES", - .match = 0x2010, - .match_mask = 0x6030, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 14, - .minbit = 13, - .value = 0x1, - .pmaxbit = 28, - .pminbit = 9, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UDP", - .match = 0x8, - .match_mask = 0x8, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 3, - .minbit = 3, - .value = 0x1, - .pmaxbit = 28, - .pminbit = 9, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L3", - .match = 0x28000, - .match_mask = 0x38000, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 17, - .minbit = 15, - .value = 0x5, - .pmaxbit = 28, - .pminbit = 9, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L4", - .match = 0xc0, - .match_mask = 0x1c8, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 8, - .minbit = 6, - .value = 0x3, - .pmaxbit = 28, - .pminbit = 9, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_UNKNOWN_L5", - .match = 0x140, - .match_mask = 0x1c0, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 8, - .minbit = 6, - .value = 0x5, - .pmaxbit = 28, - .pminbit = 9, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_VXLAN", - .match = 0x1c0, - .match_mask = 0x1c0, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 8, - .minbit = 6, - .value = 0x7, - .pmaxbit = 28, - .pminbit = 9, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_1", - .match = 0x38000, - .match_mask = 0x38000, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 17, - .minbit = 15, - .value = 0x7, - .pmaxbit = 28, - .pminbit = 9, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2 */ - .name = "EGRESS_PKT_TUNNEL_L3_L4_HDR_WESP_EXT_2", - .match = 0xc00, - .match_mask = 0x1e00, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 12, - .minbit = 9, - .value = 0x6, - .pmaxbit = 28, - .pminbit = 9, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_ITAG */ - .name = "INGRESS_PKT_INNER_L2_HDR_ITAG", - .match = 0x10, - .match_mask = 0x10, - .match_maxbit = 35, - .match_minbit = 29, - .maxbit = 4, - .minbit = 4, - .value = 0x1, - .pmaxbit = 35, - .pminbit = 29, - .zone_minbit = 19, - .arc_id_mask = 0x780000, - .num_zone_bmp_words = 1, - .zone_bmp = bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_itag, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_L2 */ - .name = "INGRESS_PKT_INNER_L2_HDR_L2", - .match = 0x1, - .match_mask = 0x1, - .match_maxbit = 35, - .match_minbit = 29, - .maxbit = 0, - .minbit = 0, - .value = 0x1, - .pmaxbit = 35, - .pminbit = 29, - .zone_minbit = 19, - .arc_id_mask = 0x780000, - .num_zone_bmp_words = 1, - .zone_bmp = bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_l2, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_NONE */ - .name = "INGRESS_PKT_INNER_L2_HDR_NONE", - .match = 0x0, - .match_mask = 0x7f, - .match_maxbit = 35, - .match_minbit = 29, - .maxbit = 6, - .minbit = 0, - .value = 0x0, - .pmaxbit = 35, - .pminbit = 29, - .zone_minbit = 19, - .arc_id_mask = 0x780000, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_OTAG */ - .name = "INGRESS_PKT_INNER_L2_HDR_OTAG", - .match = 0x8, - .match_mask = 0x8, - .match_maxbit = 35, - .match_minbit = 29, - .maxbit = 3, - .minbit = 3, - .value = 0x1, - .pmaxbit = 35, - .pminbit = 29, - .zone_minbit = 19, - .arc_id_mask = 0x780000, - .num_zone_bmp_words = 1, - .zone_bmp = bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_otag, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC */ - .name = "INGRESS_PKT_INNER_L2_HDR_SNAP_OR_LLC", - .match = 0x2, - .match_mask = 0x2, - .match_maxbit = 35, - .match_minbit = 29, - .maxbit = 1, - .minbit = 1, - .value = 0x1, - .pmaxbit = 35, - .pminbit = 29, - .zone_minbit = 19, - .arc_id_mask = 0x780000, - .num_zone_bmp_words = 1, - .zone_bmp = bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_inner_l2_hdr_snap_or_llc, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ARP */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_ARP", - .match = 0x8000, - .match_mask = 0xf8006, - .match_maxbit = 55, - .match_minbit = 36, - .maxbit = 17, - .minbit = 15, - .value = 0x1, - .pmaxbit = 55, - .pminbit = 36, - .zone_minbit = 23, - .arc_id_mask = 0x1f800000, - .num_zone_bmp_words = 1, - .zone_bmp = bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_arp, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_BFD */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_BFD", - .match = 0x48, - .match_mask = 0x1c8, - .match_maxbit = 55, - .match_minbit = 36, - .maxbit = 8, - .minbit = 6, - .value = 0x1, - .pmaxbit = 55, - .pminbit = 36, - .zone_minbit = 23, - .arc_id_mask = 0x1f800000, - .num_zone_bmp_words = 2, - .zone_bmp = bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_bfd, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_ETHERTYPE", - .match = 0x1, - .match_mask = 0x1, - .match_maxbit = 55, - .match_minbit = 36, - .maxbit = 0, - .minbit = 0, - .value = 0x1, - .pmaxbit = 55, - .pminbit = 36, - .zone_minbit = 23, - .arc_id_mask = 0x1f800000, - .num_zone_bmp_words = 1, - .zone_bmp = bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ethertype, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_ICMP */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_ICMP", - .match = 0x40, - .match_mask = 0x1c8, - .match_maxbit = 55, - .match_minbit = 36, - .maxbit = 8, - .minbit = 6, - .value = 0x1, - .pmaxbit = 55, - .pminbit = 36, - .zone_minbit = 23, - .arc_id_mask = 0x1f800000, - .num_zone_bmp_words = 2, - .zone_bmp = bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_icmp, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IGMP */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_IGMP", - .match = 0x800, - .match_mask = 0x1e00, - .match_maxbit = 55, - .match_minbit = 36, - .maxbit = 12, - .minbit = 9, - .value = 0x4, - .pmaxbit = 55, - .pminbit = 36, - .zone_minbit = 23, - .arc_id_mask = 0x1f800000, - .num_zone_bmp_words = 1, - .zone_bmp = bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_igmp, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV4 */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV4", - .match = 0x2, - .match_mask = 0x6, - .match_maxbit = 55, - .match_minbit = 36, - .maxbit = 2, - .minbit = 1, - .value = 0x1, - .pmaxbit = 55, - .pminbit = 36, - .zone_minbit = 23, - .arc_id_mask = 0x1f800000, - .num_zone_bmp_words = 2, - .zone_bmp = bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv4, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_IPV6 */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_IPV6", - .match = 0x4, - .match_mask = 0x6, - .match_maxbit = 55, - .match_minbit = 36, - .maxbit = 2, - .minbit = 1, - .value = 0x2, - .pmaxbit = 55, - .pminbit = 36, - .zone_minbit = 23, - .arc_id_mask = 0x1f800000, - .num_zone_bmp_words = 2, - .zone_bmp = bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_ipv6, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_NONE */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_NONE", - .match = 0x0, - .match_mask = 0xfffff, - .match_maxbit = 55, - .match_minbit = 36, - .maxbit = 19, - .minbit = 0, - .value = 0x0, - .pmaxbit = 55, - .pminbit = 36, - .zone_minbit = 23, - .arc_id_mask = 0x1f800000, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_P_1588 */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_P_1588", - .match = 0x100, - .match_mask = 0x1c0, - .match_maxbit = 55, - .match_minbit = 36, - .maxbit = 8, - .minbit = 6, - .value = 0x4, - .pmaxbit = 55, - .pminbit = 36, - .zone_minbit = 23, - .arc_id_mask = 0x1f800000, - .num_zone_bmp_words = 2, - .zone_bmp = bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_p_1588, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_RARP */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_RARP", - .match = 0x10000, - .match_mask = 0x38006, - .match_maxbit = 55, - .match_minbit = 36, - .maxbit = 17, - .minbit = 15, - .value = 0x2, - .pmaxbit = 55, - .pminbit = 36, - .zone_minbit = 23, - .arc_id_mask = 0x1f800000, - .num_zone_bmp_words = 1, - .zone_bmp = bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_rarp, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_FIRST_4BYTES", - .match = 0x10, - .match_mask = 0x30, - .match_maxbit = 55, - .match_minbit = 36, - .maxbit = 5, - .minbit = 4, - .value = 0x1, - .pmaxbit = 55, - .pminbit = 36, - .zone_minbit = 23, - .arc_id_mask = 0x1f800000, - .num_zone_bmp_words = 2, - .zone_bmp = bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_first_4bytes, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_TCP_LAST_16BYTES", - .match = 0x2010, - .match_mask = 0x6030, - .match_maxbit = 55, - .match_minbit = 36, - .maxbit = 14, - .minbit = 13, - .value = 0x1, - .pmaxbit = 55, - .pminbit = 36, - .zone_minbit = 23, - .arc_id_mask = 0x1f800000, - .num_zone_bmp_words = 2, - .zone_bmp = bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_tcp_last_16bytes, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UDP */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_UDP", - .match = 0x8, - .match_mask = 0x8, - .match_maxbit = 55, - .match_minbit = 36, - .maxbit = 3, - .minbit = 3, - .value = 0x1, - .pmaxbit = 55, - .pminbit = 36, - .zone_minbit = 23, - .arc_id_mask = 0x1f800000, - .num_zone_bmp_words = 2, - .zone_bmp = bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_udp, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3 */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L3", - .match = 0x28000, - .match_mask = 0x38000, - .match_maxbit = 55, - .match_minbit = 36, - .maxbit = 17, - .minbit = 15, - .value = 0x5, - .pmaxbit = 55, - .pminbit = 36, - .zone_minbit = 23, - .arc_id_mask = 0x1f800000, - .num_zone_bmp_words = 1, - .zone_bmp = bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l3, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4 */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L4", - .match = 0xc0, - .match_mask = 0x1c8, - .match_maxbit = 55, - .match_minbit = 36, - .maxbit = 8, - .minbit = 6, - .value = 0x3, - .pmaxbit = 55, - .pminbit = 36, - .zone_minbit = 23, - .arc_id_mask = 0x1f800000, - .num_zone_bmp_words = 2, - .zone_bmp = bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l4, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5 */ - .name = "INGRESS_PKT_INNER_L3_L4_HDR_UNKNOWN_L5", - .match = 0x140, - .match_mask = 0x1c0, - .match_maxbit = 55, - .match_minbit = 36, - .maxbit = 8, - .minbit = 6, - .value = 0x5, - .pmaxbit = 55, - .pminbit = 36, - .zone_minbit = 23, - .arc_id_mask = 0x1f800000, - .num_zone_bmp_words = 2, - .zone_bmp = bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_inner_l3_l4_hdr_unknown_l5, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_ITAG */ - .name = "INGRESS_PKT_OUTER_L2_HDR_ITAG", - .match = 0x10, - .match_mask = 0x10, - .match_maxbit = 8, - .match_minbit = 2, - .maxbit = 4, - .minbit = 4, - .value = 0x1, - .pmaxbit = 8, - .pminbit = 2, - .zone_minbit = 2, - .arc_id_mask = 0xfc, - .num_zone_bmp_words = 2, - .zone_bmp = bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_itag, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2 */ - .name = "INGRESS_PKT_OUTER_L2_HDR_L2", - .match = 0x1, - .match_mask = 0x1, - .match_maxbit = 8, - .match_minbit = 2, - .maxbit = 0, - .minbit = 0, - .value = 0x1, - .pmaxbit = 8, - .pminbit = 2, - .zone_minbit = 2, - .arc_id_mask = 0xfc, - .num_zone_bmp_words = 2, - .zone_bmp = bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_l2, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2_INSTR_4BYTE */ - .name = "INGRESS_PKT_OUTER_L2_HDR_L2_INSTR_4BYTE", - .match = 0x20, - .match_mask = 0x60, - .match_maxbit = 8, - .match_minbit = 2, - .maxbit = 6, - .minbit = 5, - .value = 0x1, - .pmaxbit = 8, - .pminbit = 2, - .zone_minbit = 2, - .arc_id_mask = 0xfc, - .num_zone_bmp_words = 2, - .zone_bmp = bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_l2_instr_4byte, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_L2_INSTR_8BYTE */ - .name = "INGRESS_PKT_OUTER_L2_HDR_L2_INSTR_8BYTE", - .match = 0x40, - .match_mask = 0x60, - .match_maxbit = 8, - .match_minbit = 2, - .maxbit = 6, - .minbit = 5, - .value = 0x2, - .pmaxbit = 8, - .pminbit = 2, - .zone_minbit = 2, - .arc_id_mask = 0xfc, - .num_zone_bmp_words = 2, - .zone_bmp = bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_l2_instr_8byte, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_NONE */ - .name = "INGRESS_PKT_OUTER_L2_HDR_NONE", - .match = 0x0, - .match_mask = 0x7f, - .match_maxbit = 8, - .match_minbit = 2, - .maxbit = 6, - .minbit = 0, - .value = 0x0, - .pmaxbit = 8, - .pminbit = 2, - .zone_minbit = 2, - .arc_id_mask = 0xfc, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_OTAG */ - .name = "INGRESS_PKT_OUTER_L2_HDR_OTAG", - .match = 0x8, - .match_mask = 0x8, - .match_maxbit = 8, - .match_minbit = 2, - .maxbit = 3, - .minbit = 3, - .value = 0x1, - .pmaxbit = 8, - .pminbit = 2, - .zone_minbit = 2, - .arc_id_mask = 0xfc, - .num_zone_bmp_words = 2, - .zone_bmp = bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_otag, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC */ - .name = "INGRESS_PKT_OUTER_L2_HDR_SNAP_OR_LLC", - .match = 0x2, - .match_mask = 0x2, - .match_maxbit = 8, - .match_minbit = 2, - .maxbit = 1, - .minbit = 1, - .value = 0x1, - .pmaxbit = 8, - .pminbit = 2, - .zone_minbit = 2, - .arc_id_mask = 0xfc, - .num_zone_bmp_words = 2, - .zone_bmp = bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_snap_or_llc, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L2_HDR_VPP_RX_MD_HEADER */ - .name = "INGRESS_PKT_OUTER_L2_HDR_VPP_RX_MD_HEADER", - .match = 0x4, - .match_mask = 0x4, - .match_maxbit = 8, - .match_minbit = 2, - .maxbit = 2, - .minbit = 2, - .value = 0x1, - .pmaxbit = 8, - .pminbit = 2, - .zone_minbit = 2, - .arc_id_mask = 0xfc, - .num_zone_bmp_words = 2, - .zone_bmp = bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l2_hdr_vpp_rx_md_header, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ARP */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ARP", - .match = 0x8000, - .match_mask = 0xf8006, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 17, - .minbit = 15, - .value = 0x1, - .pmaxbit = 28, - .pminbit = 9, - .zone_minbit = 8, - .arc_id_mask = 0x7ff00, - .num_zone_bmp_words = 1, - .zone_bmp = bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_arp, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_1", - .match = 0x30000, - .match_mask = 0x38000, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 17, - .minbit = 15, - .value = 0x6, - .pmaxbit = 28, - .pminbit = 9, - .zone_minbit = 8, - .arc_id_mask = 0x7ff00, - .num_zone_bmp_words = 32, - .zone_bmp = bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_1, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_AUTH_EXT_2", - .match = 0xa00, - .match_mask = 0x1e00, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 12, - .minbit = 9, - .value = 0x5, - .pmaxbit = 28, - .pminbit = 9, - .zone_minbit = 8, - .arc_id_mask = 0x7ff00, - .num_zone_bmp_words = 50, - .zone_bmp = bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_auth_ext_2, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_BFD */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_BFD", - .match = 0x48, - .match_mask = 0x1c8, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 8, - .minbit = 6, - .value = 0x1, - .pmaxbit = 28, - .pminbit = 9, - .zone_minbit = 8, - .arc_id_mask = 0x7ff00, - .num_zone_bmp_words = 53, - .zone_bmp = bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_bfd, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DCN */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_DCN", - .match = 0x20, - .match_mask = 0x30, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 5, - .minbit = 4, - .value = 0x2, - .pmaxbit = 28, - .pminbit = 9, - .zone_minbit = 8, - .arc_id_mask = 0x7ff00, - .num_zone_bmp_words = 53, - .zone_bmp = bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dcn, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_1", - .match = 0x18004, - .match_mask = 0x38006, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 17, - .minbit = 15, - .value = 0x3, - .pmaxbit = 28, - .pminbit = 9, - .zone_minbit = 8, - .arc_id_mask = 0x7ff00, - .num_zone_bmp_words = 37, - .zone_bmp = bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_1, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_DEST_OPT_EXT_2", - .match = 0x1000, - .match_mask = 0x1e00, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 12, - .minbit = 9, - .value = 0x8, - .pmaxbit = 28, - .pminbit = 9, - .zone_minbit = 8, - .arc_id_mask = 0x7ff00, - .num_zone_bmp_words = 51, - .zone_bmp = bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_dest_opt_ext_2, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ESP_EXT", - .match = 0x200, - .match_mask = 0x1e00, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 12, - .minbit = 9, - .value = 0x1, - .pmaxbit = 28, - .pminbit = 9, - .zone_minbit = 8, - .arc_id_mask = 0x7ff00, - .num_zone_bmp_words = 48, - .zone_bmp = bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_esp_ext, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ETHERTYPE", - .match = 0x1, - .match_mask = 0x1, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 0, - .minbit = 0, - .value = 0x1, - .pmaxbit = 28, - .pminbit = 9, - .zone_minbit = 8, - .arc_id_mask = 0x7ff00, - .num_zone_bmp_words = 54, - .zone_bmp = bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ethertype, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FLEX_L3_HDR_1 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_FLEX_L3_HDR_1", - .match = 0x18000, - .match_mask = 0x38006, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 17, - .minbit = 15, - .value = 0x3, - .pmaxbit = 28, - .pminbit = 9, - .zone_minbit = 8, - .arc_id_mask = 0x7ff00, - .num_zone_bmp_words = 1, - .zone_bmp = bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_flex_l3_hdr_1, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FLEX_L3_HDR_2 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_FLEX_L3_HDR_2", - .match = 0x20000, - .match_mask = 0x38006, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 17, - .minbit = 15, - .value = 0x4, - .pmaxbit = 28, - .pminbit = 9, - .zone_minbit = 8, - .arc_id_mask = 0x7ff00, - .num_zone_bmp_words = 1, - .zone_bmp = bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_flex_l3_hdr_2, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_1", - .match = 0x20004, - .match_mask = 0x38006, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 17, - .minbit = 15, - .value = 0x4, - .pmaxbit = 28, - .pminbit = 9, - .zone_minbit = 8, - .arc_id_mask = 0x7ff00, - .num_zone_bmp_words = 24, - .zone_bmp = bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_1, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_FRAG_EXT_2", - .match = 0x1200, - .match_mask = 0x1e00, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 12, - .minbit = 9, - .value = 0x9, - .pmaxbit = 28, - .pminbit = 9, - .zone_minbit = 8, - .arc_id_mask = 0x7ff00, - .num_zone_bmp_words = 51, - .zone_bmp = bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_frag_ext_2, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GENERIC_METADATA */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GENERIC_METADATA", - .match = 0x2008, - .match_mask = 0x61c8, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 14, - .minbit = 13, - .value = 0x1, - .pmaxbit = 28, - .pminbit = 9, - .zone_minbit = 8, - .arc_id_mask = 0x7ff00, - .num_zone_bmp_words = 53, - .zone_bmp = bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_generic_metadata, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GPE */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GPE", - .match = 0xc8, - .match_mask = 0x1c8, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 8, - .minbit = 6, - .value = 0x3, - .pmaxbit = 28, - .pminbit = 9, - .zone_minbit = 8, - .arc_id_mask = 0x7ff00, - .num_zone_bmp_words = 53, - .zone_bmp = bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gpe, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE", - .match = 0x80000, - .match_mask = 0x80000, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 19, - .minbit = 19, - .value = 0x1, - .pmaxbit = 28, - .pminbit = 9, - .zone_minbit = 8, - .arc_id_mask = 0x7ff00, - .num_zone_bmp_words = 25, - .zone_bmp = bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_CHKSUM", - .match = 0x400, - .match_mask = 0x1e00, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 12, - .minbit = 9, - .value = 0x2, - .pmaxbit = 28, - .pminbit = 9, - .zone_minbit = 8, - .arc_id_mask = 0x7ff00, - .num_zone_bmp_words = 25, - .zone_bmp = bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_chksum, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_KEY", - .match = 0x80, - .match_mask = 0x1c0, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 8, - .minbit = 6, - .value = 0x2, - .pmaxbit = 28, - .pminbit = 9, - .zone_minbit = 8, - .arc_id_mask = 0x7ff00, - .num_zone_bmp_words = 25, - .zone_bmp = bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_key, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_ROUT", - .match = 0x88000, - .match_mask = 0xb8000, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 17, - .minbit = 15, - .value = 0x1, - .pmaxbit = 28, - .pminbit = 9, - .zone_minbit = 8, - .arc_id_mask = 0x7ff00, - .num_zone_bmp_words = 25, - .zone_bmp = bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_rout, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_GRE_SEQ", - .match = 0x82000, - .match_mask = 0x86000, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 14, - .minbit = 13, - .value = 0x1, - .pmaxbit = 28, - .pminbit = 9, - .zone_minbit = 8, - .arc_id_mask = 0x7ff00, - .num_zone_bmp_words = 25, - .zone_bmp = bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_gre_seq, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_1", - .match = 0x8004, - .match_mask = 0xf8006, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 17, - .minbit = 15, - .value = 0x1, - .pmaxbit = 28, - .pminbit = 9, - .zone_minbit = 8, - .arc_id_mask = 0x7ff00, - .num_zone_bmp_words = 43, - .zone_bmp = bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_1, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_HOP_BY_HOP_EXT_2", - .match = 0x600, - .match_mask = 0x1e00, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 12, - .minbit = 9, - .value = 0x3, - .pmaxbit = 28, - .pminbit = 9, - .zone_minbit = 8, - .arc_id_mask = 0x7ff00, - .num_zone_bmp_words = 52, - .zone_bmp = bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_hop_by_hop_ext_2, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ICMP */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ICMP", - .match = 0x40, - .match_mask = 0x1c8, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 8, - .minbit = 6, - .value = 0x1, - .pmaxbit = 28, - .pminbit = 9, - .zone_minbit = 8, - .arc_id_mask = 0x7ff00, - .num_zone_bmp_words = 53, - .zone_bmp = bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_icmp, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IFA_HEADER", - .match = 0x40000, - .match_mask = 0x40000, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 18, - .minbit = 18, - .value = 0x1, - .pmaxbit = 28, - .pminbit = 9, - .zone_minbit = 8, - .arc_id_mask = 0x7ff00, - .num_zone_bmp_words = 26, - .zone_bmp = bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_header, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IFA_METADATA_BASE", - .match = 0x48000, - .match_mask = 0x78000, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 17, - .minbit = 15, - .value = 0x1, - .pmaxbit = 28, - .pminbit = 9, - .zone_minbit = 8, - .arc_id_mask = 0x7ff00, - .num_zone_bmp_words = 26, - .zone_bmp = bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ifa_metadata_base, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IGMP */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IGMP", - .match = 0x800, - .match_mask = 0x1e00, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 12, - .minbit = 9, - .value = 0x4, - .pmaxbit = 28, - .pminbit = 9, - .zone_minbit = 8, - .arc_id_mask = 0x7ff00, - .num_zone_bmp_words = 14, - .zone_bmp = bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_igmp, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV4 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV4", - .match = 0x2, - .match_mask = 0x6, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 2, - .minbit = 1, - .value = 0x1, - .pmaxbit = 28, - .pminbit = 9, - .zone_minbit = 8, - .arc_id_mask = 0x7ff00, - .num_zone_bmp_words = 14, - .zone_bmp = bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv4, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_IPV6 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_IPV6", - .match = 0x4, - .match_mask = 0x6, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 2, - .minbit = 1, - .value = 0x2, - .pmaxbit = 28, - .pminbit = 9, - .zone_minbit = 8, - .arc_id_mask = 0x7ff00, - .num_zone_bmp_words = 54, - .zone_bmp = bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_ipv6, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_NONE */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_NONE", - .match = 0x0, - .match_mask = 0xfffff, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 19, - .minbit = 0, - .value = 0x0, - .pmaxbit = 28, - .pminbit = 9, - .zone_minbit = 8, - .arc_id_mask = 0x7ff00, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_P_1588 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_P_1588", - .match = 0x100, - .match_mask = 0x1c0, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 8, - .minbit = 6, - .value = 0x4, - .pmaxbit = 28, - .pminbit = 9, - .zone_minbit = 8, - .arc_id_mask = 0x7ff00, - .num_zone_bmp_words = 54, - .zone_bmp = bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_p_1588, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_RARP */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_RARP", - .match = 0x10000, - .match_mask = 0x38006, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 17, - .minbit = 15, - .value = 0x2, - .pmaxbit = 28, - .pminbit = 9, - .zone_minbit = 8, - .arc_id_mask = 0x7ff00, - .num_zone_bmp_words = 54, - .zone_bmp = bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rarp, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROCEV2_AETH */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ROCEV2_AETH", - .match = 0x6000, - .match_mask = 0x6000, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 14, - .minbit = 13, - .value = 0x3, - .pmaxbit = 28, - .pminbit = 9, - .zone_minbit = 8, - .arc_id_mask = 0x7ff00, - .num_zone_bmp_words = 54, - .zone_bmp = bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rocev2_aeth, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROCEV2_BTH */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ROCEV2_BTH", - .match = 0x180, - .match_mask = 0x1c0, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 8, - .minbit = 6, - .value = 0x6, - .pmaxbit = 28, - .pminbit = 9, - .zone_minbit = 8, - .arc_id_mask = 0x7ff00, - .num_zone_bmp_words = 54, - .zone_bmp = bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rocev2_bth, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROCEV2_DETH */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ROCEV2_DETH", - .match = 0x4000, - .match_mask = 0x6000, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 14, - .minbit = 13, - .value = 0x2, - .pmaxbit = 28, - .pminbit = 9, - .zone_minbit = 8, - .arc_id_mask = 0x7ff00, - .num_zone_bmp_words = 54, - .zone_bmp = bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rocev2_deth, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROCEV2_RETH */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ROCEV2_RETH", - .match = 0x2188, - .match_mask = 0x61c8, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 14, - .minbit = 13, - .value = 0x1, - .pmaxbit = 28, - .pminbit = 9, - .zone_minbit = 8, - .arc_id_mask = 0x7ff00, - .num_zone_bmp_words = 54, - .zone_bmp = bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rocev2_reth, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_1", - .match = 0x10004, - .match_mask = 0x38006, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 17, - .minbit = 15, - .value = 0x2, - .pmaxbit = 28, - .pminbit = 9, - .zone_minbit = 8, - .arc_id_mask = 0x7ff00, - .num_zone_bmp_words = 48, - .zone_bmp = bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_1, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_ROUT_EXT_2", - .match = 0xe00, - .match_mask = 0x1e00, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 12, - .minbit = 9, - .value = 0x7, - .pmaxbit = 28, - .pminbit = 9, - .zone_minbit = 8, - .arc_id_mask = 0x7ff00, - .num_zone_bmp_words = 53, - .zone_bmp = bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_rout_ext_2, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_FIRST_4BYTES", - .match = 0x10, - .match_mask = 0x30, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 5, - .minbit = 4, - .value = 0x1, - .pmaxbit = 28, - .pminbit = 9, - .zone_minbit = 8, - .arc_id_mask = 0x7ff00, - .num_zone_bmp_words = 53, - .zone_bmp = bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_first_4bytes, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_TCP_LAST_16BYTES", - .match = 0x2010, - .match_mask = 0x6030, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 14, - .minbit = 13, - .value = 0x1, - .pmaxbit = 28, - .pminbit = 9, - .zone_minbit = 8, - .arc_id_mask = 0x7ff00, - .num_zone_bmp_words = 53, - .zone_bmp = bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_tcp_last_16bytes, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UDP */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UDP", - .match = 0x8, - .match_mask = 0x8, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 3, - .minbit = 3, - .value = 0x1, - .pmaxbit = 28, - .pminbit = 9, - .zone_minbit = 8, - .arc_id_mask = 0x7ff00, - .num_zone_bmp_words = 54, - .zone_bmp = bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_udp, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L3", - .match = 0x28000, - .match_mask = 0x38000, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 17, - .minbit = 15, - .value = 0x5, - .pmaxbit = 28, - .pminbit = 9, - .zone_minbit = 8, - .arc_id_mask = 0x7ff00, - .num_zone_bmp_words = 54, - .zone_bmp = bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l3, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L4", - .match = 0xc0, - .match_mask = 0x1c8, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 8, - .minbit = 6, - .value = 0x3, - .pmaxbit = 28, - .pminbit = 9, - .zone_minbit = 8, - .arc_id_mask = 0x7ff00, - .num_zone_bmp_words = 54, - .zone_bmp = bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l4, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_UNKNOWN_L5", - .match = 0x140, - .match_mask = 0x1c0, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 8, - .minbit = 6, - .value = 0x5, - .pmaxbit = 28, - .pminbit = 9, - .zone_minbit = 8, - .arc_id_mask = 0x7ff00, - .num_zone_bmp_words = 54, - .zone_bmp = bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_unknown_l5, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_VXLAN", - .match = 0x1c0, - .match_mask = 0x1c0, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 8, - .minbit = 6, - .value = 0x7, - .pmaxbit = 28, - .pminbit = 9, - .zone_minbit = 8, - .arc_id_mask = 0x7ff00, - .num_zone_bmp_words = 54, - .zone_bmp = bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_vxlan, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_1", - .match = 0x38000, - .match_mask = 0x38000, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 17, - .minbit = 15, - .value = 0x7, - .pmaxbit = 28, - .pminbit = 9, - .zone_minbit = 8, - .arc_id_mask = 0x7ff00, - .num_zone_bmp_words = 54, - .zone_bmp = bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_1, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2 */ - .name = "INGRESS_PKT_OUTER_L3_L4_HDR_WESP_EXT_2", - .match = 0xc00, - .match_mask = 0x1e00, - .match_maxbit = 28, - .match_minbit = 9, - .maxbit = 12, - .minbit = 9, - .value = 0x6, - .pmaxbit = 28, - .pminbit = 9, - .zone_minbit = 8, - .arc_id_mask = 0x7ff00, - .num_zone_bmp_words = 54, - .zone_bmp = bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_outer_l3_l4_hdr_wesp_ext_2, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_EP_NIH */ - .name = "INGRESS_PKT_SYS_HDR_EP_NIH", - .match = 0x2, - .match_mask = 0x3, - .match_maxbit = 1, - .match_minbit = 0, - .maxbit = 1, - .minbit = 0, - .value = 0x2, - .pmaxbit = 1, - .pminbit = 0, - .zone_minbit = 0, - .arc_id_mask = 0x3, - .num_zone_bmp_words = 1, - .zone_bmp = bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_sys_hdr_ep_nih, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_LOOPBACK_HEADER */ - .name = "INGRESS_PKT_SYS_HDR_LOOPBACK_HEADER", - .match = 0x1, - .match_mask = 0x3, - .match_maxbit = 1, - .match_minbit = 0, - .maxbit = 1, - .minbit = 0, - .value = 0x1, - .pmaxbit = 1, - .pminbit = 0, - .zone_minbit = 0, - .arc_id_mask = 0x3, - .num_zone_bmp_words = 1, - .zone_bmp = bcm78920_a0_vna_4_6_1_0_rxpmd_arc_ingress_pkt_sys_hdr_loopback_header, - - }, - { - /* BCM78920_A0_VNA_4_6_1_0_RXPMD_MATCH_ID_INGRESS_PKT_SYS_HDR_NONE */ - .name = "INGRESS_PKT_SYS_HDR_NONE", - .match = 0x0, - .match_mask = 0x3, - .match_maxbit = 1, - .match_minbit = 0, - .maxbit = 1, - .minbit = 0, - .value = 0x0, - .pmaxbit = 1, - .pminbit = 0, - .zone_minbit = 0, - .arc_id_mask = 0x3, - - }, -}; - -static bcmpkt_rxpmd_match_id_db_info_t bcm78920_a0_vna_4_6_1_0_rxpmd_match_id_db_info = { - .num_entries = 189, - .db = bcm78920_a0_vna_4_6_1_0_rxpmd_match_id_db -}; -bcmpkt_rxpmd_match_id_db_info_t * bcm78920_a0_vna_4_6_1_0_rxpmd_match_id_db_info_get(void) { - return &bcm78920_a0_vna_4_6_1_0_rxpmd_match_id_db_info; -} - -static shr_enum_map_t bcm78920_a0_vna_4_6_1_0_rxpmd_match_id_map[] = { - BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_MATCH_ID_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_rxpmd_match_id_map_info_t bcm78920_a0_vna_4_6_1_0_rxpmd_match_id_map_info = { - .num_entries = 189, - .map = bcm78920_a0_vna_4_6_1_0_rxpmd_match_id_map -}; - -bcmpkt_rxpmd_match_id_map_info_t * bcm78920_a0_vna_4_6_1_0_rxpmd_match_id_map_info_get(void) { - return &bcm78920_a0_vna_4_6_1_0_rxpmd_match_id_map_info; -} diff --git a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm78920_a0/vna_4_6_1_0/bcm78920_a0_vna_4_6_1_0_pkt_flexhdr.c b/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm78920_a0/vna_4_6_1_0/bcm78920_a0_vna_4_6_1_0_pkt_flexhdr.c deleted file mode 100644 index 47d6e68037f..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/bcmpkt/xfcr/bcm78920_a0/vna_4_6_1_0/bcm78920_a0_vna_4_6_1_0_pkt_flexhdr.c +++ /dev/null @@ -1,9724 +0,0 @@ -/***************************************************************** - * - * DO NOT EDIT THIS FILE! - * This file is auto-generated by xfc_map_parser - * from the NPL output file(s) map.yml - * for device bcm78920_a0 and variant vna_4_6_1_0. - * Edits to this file will be lost when it is regenerated. - * - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - * - * Tool Path: $SDK/INTERNAL/fltg/xfc_map_parser - * - ****************************************************************/ - -#include -#include -#include -#include -#include -#include -#include - -#define MASK(_bn) (((uint32_t)0x1<<(_bn))-1) -#define WORD_FIELD_GET(_d,_s,_l) (((_d) >> (_s)) & MASK(_l)) -#define WORD_FIELD_SET(_d,_s,_l,_v) (_d)=(((_d) & ~(MASK(_l) << (_s))) | (((_v) & MASK(_l)) << (_s))) -#define WORD_FIELD_MASK(_d,_s,_l) (_d)=((_d) | (MASK(_l) << (_s))) - -static void bcm78920_a0_vna_4_6_1_0_rxpmd_flex_reason_decode(uint32_t *data, bcmpkt_bitmap_t *reasons) -{ - uint32_t *reason = data + 0; - - if (reason[13] & (0x1 << 0)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LPP_COPY_TO_DEBUG); - } - if (reason[13] & (0x1 << 1)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS); - } - if (reason[13] & (0x1 << 2)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE); - } - if (reason[13] & (0x1 << 3)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_IDEV_CONFIG_TO_CPU); - } - if (reason[13] & (0x1 << 4)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT); - } - if (reason[13] & (0x1 << 5)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_SPANNING_TREE_TPID_CHECK_FAILED); - } - if (reason[13] & (0x1 << 6)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS); - } - if (reason[13] & (0x1 << 7)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP); - } - if (reason[13] & (0x1 << 8)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS); - } - if (reason[13] & (0x1 << 9)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP); - } - if (reason[13] & (0x1 << 10)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR); - } - if (reason[13] & (0x1 << 11)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR); - } - if (reason[13] & (0x1 << 12)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED_OR_L3_IIF_EQ_L3_OIF); - } - if (reason[13] & (0x1 << 13)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL); - } - if (reason[13] & (0x1 << 14)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_VFP); - } - if (reason[13] & (0x1 << 15)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_IFP); - } - if (reason[13] & (0x1 << 16)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER); - } - if (reason[13] & (0x1 << 17)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT); - } - if (reason[13] & (0x1 << 18)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_ING_ADAPT_OR_MIRROR_SAMPLER_SAMPLED); - } - if (reason[13] & (0x1 << 19)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP); - } - if (reason[13] & (0x1 << 20)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_IFP_PROTOCOL_UDF_TCAM); - } - if (reason[13] & (0x1 << 21)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_SFLOW); - } - if (reason[13] & (0x1 << 22)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_L3_DST_DISCARD); - } - if (reason[13] & (0x1 << 23)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_L2_INSTR_UNKNOWN_SIGNAL_TYPE); - } - if (reason[13] & (0x1 << 24)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_VLAN_FILTER_DROP); - } - if (reason[13] & (0x1 << 25)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_AR_MONITOR_TO_CPU); - } - if (reason[13] & (0x1 << 26)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_PARITY_ERROR); - } - if (reason[13] & (0x1 << 27)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_VLAN_TO_VRF_MISS); - } - if (reason[13] & (0x1 << 28)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_INCA_MSG); - } - if (reason[13] & (0x1 << 29)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_DOS_ATTACK); - } - if (reason[13] & (0x1 << 30)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_TIME_SYNC); - } - if ((reason[13] & ( 1 << 31)) && (reason[12] & ( 1 << 0)) && !(reason[12] & ( 1 << 1)) && (reason[12] & ( 1 << 2))) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_NHOP_TO_CPU); - } - if (!(reason[13] & ( 1 << 31)) && !(reason[12] & ( 1 << 0)) && (reason[12] & ( 1 << 1)) && (reason[12] & ( 1 << 2))) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_TTL_ERROR); - } - if ((reason[13] & ( 1 << 31)) && !(reason[12] & ( 1 << 0)) && (reason[12] & ( 1 << 1)) && (reason[12] & ( 1 << 2))) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_L3HDR_ERROR); - } - if (!(reason[13] & ( 1 << 31)) && (reason[12] & ( 1 << 0)) && (reason[12] & ( 1 << 1)) && (reason[12] & ( 1 << 2))) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_L3_DST_LOOKUP_MISS); - } - if ((reason[13] & ( 1 << 31)) && (reason[12] & ( 1 << 0)) && (reason[12] & ( 1 << 1)) && (reason[12] & ( 1 << 2))) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_L3_MTU_CHECK_FAIL); - } - if (reason[12] & (0x1 << 4)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0); - } - if (reason[12] & (0x1 << 5)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1); - } - if (reason[12] & (0x1 << 6)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2); - } - if (reason[12] & (0x1 << 7)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3); - } - if (reason[12] & (0x1 << 8)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4); - } - if (reason[12] & (0x1 << 9)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5); - } - if (reason[12] & (0x1 << 10)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6); - } - if (reason[12] & (0x1 << 11)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7); - } - if (reason[12] & (0x1 << 12)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR); - } - if (reason[12] & (0x1 << 13)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU); - } - if (reason[12] & (0x1 << 15)) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP); - } - if (!(reason[13] & ( 1 << 31)) && !(reason[12] & ( 1 << 0)) && !(reason[12] & ( 1 << 1)) && !(reason[12] & ( 1 << 2)) && (reason[12] & ( 1 << 3))) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_AFR_DST_LOOKUP_MISS); - } - if (!(reason[13] & ( 1 << 31)) && (reason[12] & ( 1 << 0)) && !(reason[12] & ( 1 << 1)) && !(reason[12] & ( 1 << 2)) && (reason[12] & ( 1 << 3))) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_PACKET_TRACE_TO_CPU); - } - if ((reason[13] & ( 1 << 31)) && (reason[12] & ( 1 << 0)) && !(reason[12] & ( 1 << 1)) && !(reason[12] & ( 1 << 2)) && (reason[12] & ( 1 << 3))) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_AFR_VLAN_TO_VRF_MISS); - } - if (!(reason[13] & ( 1 << 31)) && !(reason[12] & ( 1 << 0)) && (reason[12] & ( 1 << 1)) && !(reason[12] & ( 1 << 2)) && (reason[12] & ( 1 << 3))) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_FIRST_PSN_MISMATCH); - } - if ((reason[13] & ( 1 << 31)) && !(reason[12] & ( 1 << 0)) && (reason[12] & ( 1 << 1)) && !(reason[12] & ( 1 << 2)) && (reason[12] & ( 1 << 3))) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_FIRST_RD_NAK); - } - if (!(reason[13] & ( 1 << 31)) && (reason[12] & ( 1 << 0)) && (reason[12] & ( 1 << 1)) && !(reason[12] & ( 1 << 2)) && (reason[12] & ( 1 << 3))) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_FIRST_WR_NAK); - } - if ((reason[13] & ( 1 << 31)) && (reason[12] & ( 1 << 0)) && (reason[12] & ( 1 << 1)) && !(reason[12] & ( 1 << 2)) && (reason[12] & ( 1 << 3))) { - BCMPKT_RXPMD_FLEX_REASON_SET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_OTHER_DROPS); - } -} - -static void bcm78920_a0_vna_4_6_1_0_rxpmd_flex_reason_encode(bcmpkt_bitmap_t *reasons, uint32_t *data) -{ - uint32_t *reason = data + 0; - - reason[13] = 0; - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LPP_COPY_TO_DEBUG)) { - reason[13] |= (0x1 << 0); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_CML_FLAGS)) { - reason[13] |= (0x1 << 1); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_L2_SRC_STATIC_MOVE)) { - reason[13] |= (0x1 << 2); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_IDEV_CONFIG_TO_CPU)) { - reason[13] |= (0x1 << 3); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_PROTOCOL_PKT)) { - reason[13] |= (0x1 << 4); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_MEMBERSHIP_SPANNING_TREE_TPID_CHECK_FAILED)) { - reason[13] |= (0x1 << 5); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP_MISS)) { - reason[13] |= (0x1 << 6); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_L2_DST_LOOKUP)) { - reason[13] |= (0x1 << 7); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP_MISS)) { - reason[13] |= (0x1 << 8); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_L3_DST_LOOKUP)) { - reason[13] |= (0x1 << 9); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_L3_HDR_ERROR)) { - reason[13] |= (0x1 << 10); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_L3_TTL_ERROR)) { - reason[13] |= (0x1 << 11); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_IPMC_L3_IIF_OR_RPA_ID_CHECK_FAILED_OR_L3_IIF_EQ_L3_OIF)) { - reason[13] |= (0x1 << 12); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LEARN_CACHE_FULL)) { - reason[13] |= (0x1 << 13); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_VFP)) { - reason[13] |= (0x1 << 14); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_IFP)) { - reason[13] |= (0x1 << 15); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_IFP_METER)) { - reason[13] |= (0x1 << 16); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_EM_FT)) { - reason[13] |= (0x1 << 17); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_ING_ADAPT_OR_MIRROR_SAMPLER_SAMPLED)) { - reason[13] |= (0x1 << 18); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_SER_DROP)) { - reason[13] |= (0x1 << 19); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_IFP_PROTOCOL_UDF_TCAM)) { - reason[13] |= (0x1 << 20); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_SFLOW)) { - reason[13] |= (0x1 << 21); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_L3_DST_DISCARD)) { - reason[13] |= (0x1 << 22); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_L2_INSTR_UNKNOWN_SIGNAL_TYPE)) { - reason[13] |= (0x1 << 23); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_VLAN_FILTER_DROP)) { - reason[13] |= (0x1 << 24); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_AR_MONITOR_TO_CPU)) { - reason[13] |= (0x1 << 25); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_PARITY_ERROR)) { - reason[13] |= (0x1 << 26); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_VLAN_TO_VRF_MISS)) { - reason[13] |= (0x1 << 27); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_INCA_MSG)) { - reason[13] |= (0x1 << 28); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_DOS_ATTACK)) { - reason[13] |= (0x1 << 29); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_TIME_SYNC)) { - reason[13] |= (0x1 << 30); - } - reason[12] = 0; - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_NHOP_TO_CPU)) { - reason[13] |= (1 << 31); - reason[12] |= (1 << 0); - reason[12] |= (0 << 1); - reason[12] |= (1 << 2); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_TTL_ERROR)) { - reason[13] |= (0 << 31); - reason[12] |= (0 << 0); - reason[12] |= (1 << 1); - reason[12] |= (1 << 2); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_L3HDR_ERROR)) { - reason[13] |= (1 << 31); - reason[12] |= (0 << 0); - reason[12] |= (1 << 1); - reason[12] |= (1 << 2); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_L3_DST_LOOKUP_MISS)) { - reason[13] |= (0 << 31); - reason[12] |= (1 << 0); - reason[12] |= (1 << 1); - reason[12] |= (1 << 2); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_L3_MTU_CHECK_FAIL)) { - reason[13] |= (1 << 31); - reason[12] |= (1 << 0); - reason[12] |= (1 << 1); - reason[12] |= (1 << 2); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_0)) { - reason[12] |= (0x1 << 4); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_1)) { - reason[12] |= (0x1 << 5); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_2)) { - reason[12] |= (0x1 << 6); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_3)) { - reason[12] |= (0x1 << 7); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_4)) { - reason[12] |= (0x1 << 8); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_5)) { - reason[12] |= (0x1 << 9); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_6)) { - reason[12] |= (0x1 << 10); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_MATCHED_RULE_BIT_7)) { - reason[12] |= (0x1 << 11); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_MIRROR)) { - reason[12] |= (0x1 << 12); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DO_NOT_COPY_TO_CPU)) { - reason[12] |= (0x1 << 13); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_TRACE_DOP)) { - reason[12] |= (0x1 << 15); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_AFR_DST_LOOKUP_MISS)) { - reason[13] |= (0 << 31); - reason[12] |= (0 << 0); - reason[12] |= (0 << 1); - reason[12] |= (0 << 2); - reason[12] |= (1 << 3); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_PACKET_TRACE_TO_CPU)) { - reason[13] |= (0 << 31); - reason[12] |= (1 << 0); - reason[12] |= (0 << 1); - reason[12] |= (0 << 2); - reason[12] |= (1 << 3); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_AFR_VLAN_TO_VRF_MISS)) { - reason[13] |= (1 << 31); - reason[12] |= (1 << 0); - reason[12] |= (0 << 1); - reason[12] |= (0 << 2); - reason[12] |= (1 << 3); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_FIRST_PSN_MISMATCH)) { - reason[13] |= (0 << 31); - reason[12] |= (0 << 0); - reason[12] |= (1 << 1); - reason[12] |= (0 << 2); - reason[12] |= (1 << 3); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_FIRST_RD_NAK)) { - reason[13] |= (1 << 31); - reason[12] |= (0 << 0); - reason[12] |= (1 << 1); - reason[12] |= (0 << 2); - reason[12] |= (1 << 3); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_FIRST_WR_NAK)) { - reason[13] |= (0 << 31); - reason[12] |= (1 << 0); - reason[12] |= (1 << 1); - reason[12] |= (0 << 2); - reason[12] |= (1 << 3); - } - if (BCMPKT_RXPMD_FLEX_REASON_GET(*reasons, BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_LL_OTHER_DROPS)) { - reason[13] |= (1 << 31); - reason[12] |= (1 << 0); - reason[12] |= (1 << 1); - reason[12] |= (0 << 2); - reason[12] |= (1 << 3); - } -} - -static bcmpkt_flex_field_metadata_t bcm78920_a0_vna_4_6_1_0_rxpmd_flex_field_data[] = { - { - .name = "DROP_CODE_15_0", - .fid = BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_DROP_CODE_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { -1, -1 }, /* Profile 2. */ - { 48, 63 }, /* Profile 3. */ - { -1, -1 }, /* Profile 4. */ - { -1, -1 }, /* Profile 5. */ - { 48, 63 }, /* Profile 6. */ - { -1, -1 }, /* Profile 7. */ - { -1, -1 }, /* Profile 8. */ - { 48, 63 }, /* Profile 9. */ - { -1, -1 }, /* Profile 10. */ - { -1, -1 }, /* Profile 11. */ - { 48, 63 }, /* Profile 12. */ - }, - .profile_cnt = 13, - }, - { - .name = "ENTROPY_LABEL_15_0", - .fid = BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_ENTROPY_LABEL_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 208, 223 }, /* Profile 2. */ - { 208, 223 }, /* Profile 3. */ - { 208, 223 }, /* Profile 4. */ - { 208, 223 }, /* Profile 5. */ - { 208, 223 }, /* Profile 6. */ - { 208, 223 }, /* Profile 7. */ - { 224, 239 }, /* Profile 8. */ - { 224, 239 }, /* Profile 9. */ - { 224, 239 }, /* Profile 10. */ - { 224, 239 }, /* Profile 11. */ - { 224, 239 }, /* Profile 12. */ - { 224, 239 }, /* Profile 13. */ - }, - .profile_cnt = 14, - }, - { - .name = "EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0", - .fid = BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_EP_NIH_DROP_CODE_OR_IFP_OPAQUE_OBJ_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { -1, -1 }, /* Profile 2. */ - { -1, -1 }, /* Profile 3. */ - { 48, 63 }, /* Profile 4. */ - { -1, -1 }, /* Profile 5. */ - { -1, -1 }, /* Profile 6. */ - { 48, 63 }, /* Profile 7. */ - { -1, -1 }, /* Profile 8. */ - { -1, -1 }, /* Profile 9. */ - { 48, 63 }, /* Profile 10. */ - { -1, -1 }, /* Profile 11. */ - { -1, -1 }, /* Profile 12. */ - { 48, 63 }, /* Profile 13. */ - }, - .profile_cnt = 14, - }, - { - .name = "EP_NIH_HDR_TIMESTAMP_15_0", - .fid = BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 144, 159 }, /* Profile 2. */ - { 144, 159 }, /* Profile 3. */ - { 144, 159 }, /* Profile 4. */ - { -1, -1 }, /* Profile 5. */ - { -1, -1 }, /* Profile 6. */ - { -1, -1 }, /* Profile 7. */ - { 160, 175 }, /* Profile 8. */ - { 160, 175 }, /* Profile 9. */ - { 160, 175 }, /* Profile 10. */ - }, - .profile_cnt = 11, - }, - { - .name = "EP_NIH_HDR_TIMESTAMP_31_16", - .fid = BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_EP_NIH_HDR_TIMESTAMP_31_16, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 160, 175 }, /* Profile 2. */ - { 160, 175 }, /* Profile 3. */ - { 160, 175 }, /* Profile 4. */ - { -1, -1 }, /* Profile 5. */ - { -1, -1 }, /* Profile 6. */ - { -1, -1 }, /* Profile 7. */ - { 176, 191 }, /* Profile 8. */ - { 176, 191 }, /* Profile 9. */ - { 176, 191 }, /* Profile 10. */ - }, - .profile_cnt = 11, - }, - { - .name = "EVENT_TRACE_VECTOR_UPDATED_15_0", - .fid = BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_UPDATED_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 0, 15 }, /* Profile 2. */ - { 0, 15 }, /* Profile 3. */ - { 0, 15 }, /* Profile 4. */ - { 0, 15 }, /* Profile 5. */ - { 0, 15 }, /* Profile 6. */ - { 0, 15 }, /* Profile 7. */ - { 0, 15 }, /* Profile 8. */ - { 0, 15 }, /* Profile 9. */ - { 0, 15 }, /* Profile 10. */ - { 0, 15 }, /* Profile 11. */ - { 0, 15 }, /* Profile 12. */ - { 0, 15 }, /* Profile 13. */ - }, - .profile_cnt = 14, - }, - { - .name = "EVENT_TRACE_VECTOR_UPDATED_31_16", - .fid = BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_UPDATED_31_16, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 16, 31 }, /* Profile 2. */ - { 16, 31 }, /* Profile 3. */ - { 16, 31 }, /* Profile 4. */ - { 16, 31 }, /* Profile 5. */ - { 16, 31 }, /* Profile 6. */ - { 16, 31 }, /* Profile 7. */ - { 16, 31 }, /* Profile 8. */ - { 16, 31 }, /* Profile 9. */ - { 16, 31 }, /* Profile 10. */ - { 16, 31 }, /* Profile 11. */ - { 16, 31 }, /* Profile 12. */ - { 16, 31 }, /* Profile 13. */ - }, - .profile_cnt = 14, - }, - { - .name = "EVENT_TRACE_VECTOR_UPDATED_47_32", - .fid = BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_EVENT_TRACE_VECTOR_UPDATED_47_32, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 32, 47 }, /* Profile 2. */ - { 32, 47 }, /* Profile 3. */ - { 32, 47 }, /* Profile 4. */ - { 32, 47 }, /* Profile 5. */ - { 32, 47 }, /* Profile 6. */ - { 32, 47 }, /* Profile 7. */ - { 32, 47 }, /* Profile 8. */ - { 32, 47 }, /* Profile 9. */ - { 32, 47 }, /* Profile 10. */ - { 32, 47 }, /* Profile 11. */ - { 32, 47 }, /* Profile 12. */ - { 32, 47 }, /* Profile 13. */ - }, - .profile_cnt = 14, - }, - { - .name = "IFP_CLASS_ID_15_0", - .fid = BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_IFP_CLASS_ID_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 272, 287 }, /* Profile 2. */ - { 272, 287 }, /* Profile 3. */ - { 272, 287 }, /* Profile 4. */ - { 272, 287 }, /* Profile 5. */ - { 272, 287 }, /* Profile 6. */ - { 272, 287 }, /* Profile 7. */ - { 272, 287 }, /* Profile 8. */ - { 272, 287 }, /* Profile 9. */ - { 272, 287 }, /* Profile 10. */ - { 272, 287 }, /* Profile 11. */ - { 272, 287 }, /* Profile 12. */ - { 272, 287 }, /* Profile 13. */ - }, - .profile_cnt = 14, - }, - { - .name = "IFP_DO_NOT_MODIFY_TS_CONTROL_ACTION_3_0", - .fid = BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_IFP_DO_NOT_MODIFY_TS_CONTROL_ACTION_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 400, 403 }, /* Profile 2. */ - { 400, 403 }, /* Profile 3. */ - { 400, 403 }, /* Profile 4. */ - { 400, 403 }, /* Profile 5. */ - { 400, 403 }, /* Profile 6. */ - { 400, 403 }, /* Profile 7. */ - { 400, 403 }, /* Profile 8. */ - { 400, 403 }, /* Profile 9. */ - { 400, 403 }, /* Profile 10. */ - { 400, 403 }, /* Profile 11. */ - { 400, 403 }, /* Profile 12. */ - { 400, 403 }, /* Profile 13. */ - }, - .profile_cnt = 14, - }, - { - .name = "IFP_VCA_KEY_PROFILE_INDEX_3_0", - .fid = BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_IFP_VCA_KEY_PROFILE_INDEX_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 424, 427 }, /* Profile 2. */ - { 424, 427 }, /* Profile 3. */ - { 424, 427 }, /* Profile 4. */ - { 424, 427 }, /* Profile 5. */ - { 424, 427 }, /* Profile 6. */ - { 424, 427 }, /* Profile 7. */ - { 424, 427 }, /* Profile 8. */ - { 424, 427 }, /* Profile 9. */ - { 424, 427 }, /* Profile 10. */ - { 424, 427 }, /* Profile 11. */ - { 424, 427 }, /* Profile 12. */ - { 424, 427 }, /* Profile 13. */ - }, - .profile_cnt = 14, - }, - { - .name = "INC_CTRL_INFO_15_0", - .fid = BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_INC_CTRL_INFO_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 176, 191 }, /* Profile 2. */ - { 176, 191 }, /* Profile 3. */ - { 176, 191 }, /* Profile 4. */ - { 176, 191 }, /* Profile 5. */ - { 176, 191 }, /* Profile 6. */ - { 176, 191 }, /* Profile 7. */ - { 192, 207 }, /* Profile 8. */ - { 192, 207 }, /* Profile 9. */ - { 192, 207 }, /* Profile 10. */ - { 192, 207 }, /* Profile 11. */ - { 192, 207 }, /* Profile 12. */ - { 192, 207 }, /* Profile 13. */ - }, - .profile_cnt = 14, - }, - { - .name = "ING_TIMESTAMP_15_0", - .fid = BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { -1, -1 }, /* Profile 2. */ - { -1, -1 }, /* Profile 3. */ - { -1, -1 }, /* Profile 4. */ - { 144, 159 }, /* Profile 5. */ - { 144, 159 }, /* Profile 6. */ - { 144, 159 }, /* Profile 7. */ - { -1, -1 }, /* Profile 8. */ - { -1, -1 }, /* Profile 9. */ - { -1, -1 }, /* Profile 10. */ - { 160, 175 }, /* Profile 11. */ - { 160, 175 }, /* Profile 12. */ - { 160, 175 }, /* Profile 13. */ - }, - .profile_cnt = 14, - }, - { - .name = "ING_TIMESTAMP_31_16", - .fid = BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_ING_TIMESTAMP_31_16, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { -1, -1 }, /* Profile 2. */ - { -1, -1 }, /* Profile 3. */ - { -1, -1 }, /* Profile 4. */ - { 160, 175 }, /* Profile 5. */ - { 160, 175 }, /* Profile 6. */ - { 160, 175 }, /* Profile 7. */ - { -1, -1 }, /* Profile 8. */ - { -1, -1 }, /* Profile 9. */ - { -1, -1 }, /* Profile 10. */ - { 176, 191 }, /* Profile 11. */ - { 176, 191 }, /* Profile 12. */ - { 176, 191 }, /* Profile 13. */ - }, - .profile_cnt = 14, - }, - { - .name = "INT_PRI_3_0", - .fid = BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_INT_PRI_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 412, 415 }, /* Profile 2. */ - { 412, 415 }, /* Profile 3. */ - { 412, 415 }, /* Profile 4. */ - { 412, 415 }, /* Profile 5. */ - { 412, 415 }, /* Profile 6. */ - { 412, 415 }, /* Profile 7. */ - { 412, 415 }, /* Profile 8. */ - { 412, 415 }, /* Profile 9. */ - { 412, 415 }, /* Profile 10. */ - { 412, 415 }, /* Profile 11. */ - { 412, 415 }, /* Profile 12. */ - { 412, 415 }, /* Profile 13. */ - }, - .profile_cnt = 14, - }, - { - .name = "L2_IIF_16_9_0", - .fid = BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_L2_IIF_16_9_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 256, 265 }, /* Profile 2. */ - { 256, 265 }, /* Profile 3. */ - { 256, 265 }, /* Profile 4. */ - { 256, 265 }, /* Profile 5. */ - { 256, 265 }, /* Profile 6. */ - { 256, 265 }, /* Profile 7. */ - }, - .profile_cnt = 8, - }, - { - .name = "L2_OIF_16_9_0", - .fid = BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_L2_OIF_16_9_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { -1, -1 }, /* Profile 2. */ - { -1, -1 }, /* Profile 3. */ - { -1, -1 }, /* Profile 4. */ - { -1, -1 }, /* Profile 5. */ - { -1, -1 }, /* Profile 6. */ - { -1, -1 }, /* Profile 7. */ - { 96, 105 }, /* Profile 8. */ - { 96, 105 }, /* Profile 9. */ - { 96, 105 }, /* Profile 10. */ - { 96, 105 }, /* Profile 11. */ - { 96, 105 }, /* Profile 12. */ - { 96, 105 }, /* Profile 13. */ - }, - .profile_cnt = 14, - }, - { - .name = "L3_IIF_16_15_0", - .fid = BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_L3_IIF_16_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 128, 143 }, /* Profile 2. */ - { 128, 143 }, /* Profile 3. */ - { 128, 143 }, /* Profile 4. */ - { 128, 143 }, /* Profile 5. */ - { 128, 143 }, /* Profile 6. */ - { 128, 143 }, /* Profile 7. */ - { 144, 159 }, /* Profile 8. */ - { 144, 159 }, /* Profile 9. */ - { 144, 159 }, /* Profile 10. */ - { 144, 159 }, /* Profile 11. */ - { 144, 159 }, /* Profile 12. */ - { 144, 159 }, /* Profile 13. */ - }, - .profile_cnt = 14, - }, - { - .name = "L3_OIF_1_16_11_0", - .fid = BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_L3_OIF_1_16_11_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 96, 107 }, /* Profile 2. */ - { 96, 107 }, /* Profile 3. */ - { 96, 107 }, /* Profile 4. */ - { 96, 107 }, /* Profile 5. */ - { 96, 107 }, /* Profile 6. */ - { 96, 107 }, /* Profile 7. */ - { 112, 123 }, /* Profile 8. */ - { 112, 123 }, /* Profile 9. */ - { 112, 123 }, /* Profile 10. */ - { 112, 123 }, /* Profile 11. */ - { 112, 123 }, /* Profile 12. */ - { 112, 123 }, /* Profile 13. */ - }, - .profile_cnt = 14, - }, - { - .name = "LPP_IP_MMU_DROP_CODE_15_0", - .fid = BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_LPP_IP_MMU_DROP_CODE_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 48, 63 }, /* Profile 2. */ - { -1, -1 }, /* Profile 3. */ - { -1, -1 }, /* Profile 4. */ - { 48, 63 }, /* Profile 5. */ - { -1, -1 }, /* Profile 6. */ - { -1, -1 }, /* Profile 7. */ - { 48, 63 }, /* Profile 8. */ - { -1, -1 }, /* Profile 9. */ - { -1, -1 }, /* Profile 10. */ - { 48, 63 }, /* Profile 11. */ - }, - .profile_cnt = 12, - }, - { - .name = "NHOP_INDEX_1_15_0", - .fid = BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_NHOP_INDEX_1_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 224, 239 }, /* Profile 2. */ - { 224, 239 }, /* Profile 3. */ - { 224, 239 }, /* Profile 4. */ - { 224, 239 }, /* Profile 5. */ - { 224, 239 }, /* Profile 6. */ - { 224, 239 }, /* Profile 7. */ - { 240, 255 }, /* Profile 8. */ - { 240, 255 }, /* Profile 9. */ - { 240, 255 }, /* Profile 10. */ - { 240, 255 }, /* Profile 11. */ - { 240, 255 }, /* Profile 12. */ - { 240, 255 }, /* Profile 13. */ - }, - .profile_cnt = 14, - }, - { - .name = "PARSER_VHLEN_0_15_0", - .fid = BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_PARSER_VHLEN_0_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 64, 79 }, /* Profile 2. */ - { 64, 79 }, /* Profile 3. */ - { 64, 79 }, /* Profile 4. */ - { 64, 79 }, /* Profile 5. */ - { 64, 79 }, /* Profile 6. */ - { 64, 79 }, /* Profile 7. */ - { 64, 79 }, /* Profile 8. */ - { 64, 79 }, /* Profile 9. */ - { 64, 79 }, /* Profile 10. */ - { 64, 79 }, /* Profile 11. */ - { 64, 79 }, /* Profile 12. */ - { 64, 79 }, /* Profile 13. */ - }, - .profile_cnt = 14, - }, - { - .name = "PKT_MISC_CTRL_0_3_0", - .fid = BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_0_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 420, 423 }, /* Profile 2. */ - { 420, 423 }, /* Profile 3. */ - { 420, 423 }, /* Profile 4. */ - { 420, 423 }, /* Profile 5. */ - { 420, 423 }, /* Profile 6. */ - { 420, 423 }, /* Profile 7. */ - { 420, 423 }, /* Profile 8. */ - { 420, 423 }, /* Profile 9. */ - { 420, 423 }, /* Profile 10. */ - { 420, 423 }, /* Profile 11. */ - { 420, 423 }, /* Profile 12. */ - { 420, 423 }, /* Profile 13. */ - }, - .profile_cnt = 14, - }, - { - .name = "PKT_MISC_CTRL_1_3_0", - .fid = BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_1_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 436, 439 }, /* Profile 2. */ - { 436, 439 }, /* Profile 3. */ - { 436, 439 }, /* Profile 4. */ - { 436, 439 }, /* Profile 5. */ - { 436, 439 }, /* Profile 6. */ - { 436, 439 }, /* Profile 7. */ - { 436, 439 }, /* Profile 8. */ - { 436, 439 }, /* Profile 9. */ - { 436, 439 }, /* Profile 10. */ - { 436, 439 }, /* Profile 11. */ - { 436, 439 }, /* Profile 12. */ - { 436, 439 }, /* Profile 13. */ - }, - .profile_cnt = 14, - }, - { - .name = "PKT_MISC_CTRL_2_3_0", - .fid = BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_PKT_MISC_CTRL_2_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 440, 443 }, /* Profile 2. */ - { 440, 443 }, /* Profile 3. */ - { 440, 443 }, /* Profile 4. */ - { 440, 443 }, /* Profile 5. */ - { 440, 443 }, /* Profile 6. */ - { 440, 443 }, /* Profile 7. */ - { 440, 443 }, /* Profile 8. */ - { 440, 443 }, /* Profile 9. */ - { 440, 443 }, /* Profile 10. */ - { 440, 443 }, /* Profile 11. */ - { 440, 443 }, /* Profile 12. */ - { 440, 443 }, /* Profile 13. */ - }, - .profile_cnt = 14, - }, - { - .name = "SWITCH_COPY_DESTINATION_15_0", - .fid = BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_SWITCH_COPY_DESTINATION_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 192, 207 }, /* Profile 2. */ - { 192, 207 }, /* Profile 3. */ - { 192, 207 }, /* Profile 4. */ - { 192, 207 }, /* Profile 5. */ - { 192, 207 }, /* Profile 6. */ - { 192, 207 }, /* Profile 7. */ - { 208, 223 }, /* Profile 8. */ - { 208, 223 }, /* Profile 9. */ - { 208, 223 }, /* Profile 10. */ - { 208, 223 }, /* Profile 11. */ - { 208, 223 }, /* Profile 12. */ - { 208, 223 }, /* Profile 13. */ - }, - .profile_cnt = 14, - }, - { - .name = "SWITCH_COPY_QUEUE_NUM_3_0", - .fid = BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_SWITCH_COPY_QUEUE_NUM_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 408, 411 }, /* Profile 2. */ - { 408, 411 }, /* Profile 3. */ - { 408, 411 }, /* Profile 4. */ - { 408, 411 }, /* Profile 5. */ - { 408, 411 }, /* Profile 6. */ - { 408, 411 }, /* Profile 7. */ - { 408, 411 }, /* Profile 8. */ - { 408, 411 }, /* Profile 9. */ - { 408, 411 }, /* Profile 10. */ - { 408, 411 }, /* Profile 11. */ - { 408, 411 }, /* Profile 12. */ - { 408, 411 }, /* Profile 13. */ - }, - .profile_cnt = 14, - }, - { - .name = "SYSTEM_OPCODE_3_0", - .fid = BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_SYSTEM_OPCODE_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 428, 431 }, /* Profile 2. */ - { 428, 431 }, /* Profile 3. */ - { 428, 431 }, /* Profile 4. */ - { 428, 431 }, /* Profile 5. */ - { 428, 431 }, /* Profile 6. */ - { 428, 431 }, /* Profile 7. */ - { 428, 431 }, /* Profile 8. */ - { 428, 431 }, /* Profile 9. */ - { 428, 431 }, /* Profile 10. */ - { 428, 431 }, /* Profile 11. */ - { 428, 431 }, /* Profile 12. */ - { 428, 431 }, /* Profile 13. */ - }, - .profile_cnt = 14, - }, - { - .name = "VCA_IF_REQ_SF_PROFILE_3_0", - .fid = BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_VCA_IF_REQ_SF_PROFILE_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 432, 435 }, /* Profile 2. */ - { 432, 435 }, /* Profile 3. */ - { 432, 435 }, /* Profile 4. */ - { 432, 435 }, /* Profile 5. */ - { 432, 435 }, /* Profile 6. */ - { 432, 435 }, /* Profile 7. */ - { 432, 435 }, /* Profile 8. */ - { 432, 435 }, /* Profile 9. */ - { 432, 435 }, /* Profile 10. */ - { 432, 435 }, /* Profile 11. */ - { 432, 435 }, /* Profile 12. */ - { 432, 435 }, /* Profile 13. */ - }, - .profile_cnt = 14, - }, - { - .name = "VCA_QUERY_PORT_NUM_15_0", - .fid = BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_VCA_QUERY_PORT_NUM_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 112, 127 }, /* Profile 2. */ - { 112, 127 }, /* Profile 3. */ - { 112, 127 }, /* Profile 4. */ - { 112, 127 }, /* Profile 5. */ - { 112, 127 }, /* Profile 6. */ - { 112, 127 }, /* Profile 7. */ - { 128, 143 }, /* Profile 8. */ - { 128, 143 }, /* Profile 9. */ - { 128, 143 }, /* Profile 10. */ - { 128, 143 }, /* Profile 11. */ - { 128, 143 }, /* Profile 12. */ - { 128, 143 }, /* Profile 13. */ - }, - .profile_cnt = 14, - }, - { - .name = "VCA_QUERY_QUEUE_NUM_3_0", - .fid = BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_VCA_QUERY_QUEUE_NUM_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 416, 419 }, /* Profile 2. */ - { 416, 419 }, /* Profile 3. */ - { 416, 419 }, /* Profile 4. */ - { 416, 419 }, /* Profile 5. */ - { 416, 419 }, /* Profile 6. */ - { 416, 419 }, /* Profile 7. */ - { 416, 419 }, /* Profile 8. */ - { 416, 419 }, /* Profile 9. */ - { 416, 419 }, /* Profile 10. */ - { 416, 419 }, /* Profile 11. */ - { 416, 419 }, /* Profile 12. */ - { 416, 419 }, /* Profile 13. */ - }, - .profile_cnt = 14, - }, - { - .name = "VFI_15_0", - .fid = BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_VFI_15_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 80, 95 }, /* Profile 2. */ - { 80, 95 }, /* Profile 3. */ - { 80, 95 }, /* Profile 4. */ - { 80, 95 }, /* Profile 5. */ - { 80, 95 }, /* Profile 6. */ - { 80, 95 }, /* Profile 7. */ - { 80, 95 }, /* Profile 8. */ - { 80, 95 }, /* Profile 9. */ - { 80, 95 }, /* Profile 10. */ - { 80, 95 }, /* Profile 11. */ - { 80, 95 }, /* Profile 12. */ - { 80, 95 }, /* Profile 13. */ - }, - .profile_cnt = 14, - }, - { - .name = "VLAN_TAG_PRESERVE_INC_CTRL_3_0", - .fid = BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_VLAN_TAG_PRESERVE_INC_CTRL_3_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 404, 407 }, /* Profile 2. */ - { 404, 407 }, /* Profile 3. */ - { 404, 407 }, /* Profile 4. */ - { 404, 407 }, /* Profile 5. */ - { 404, 407 }, /* Profile 6. */ - { 404, 407 }, /* Profile 7. */ - { 404, 407 }, /* Profile 8. */ - { 404, 407 }, /* Profile 9. */ - { 404, 407 }, /* Profile 10. */ - { 404, 407 }, /* Profile 11. */ - { 404, 407 }, /* Profile 12. */ - { 404, 407 }, /* Profile 13. */ - }, - .profile_cnt = 14, - }, - { - .name = "VRF_7_0", - .fid = BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_VRF_7_0, - .profile = { - { -1, -1 }, /* Profile 0. */ - { -1, -1 }, /* Profile 1. */ - { 240, 247 }, /* Profile 2. */ - { 240, 247 }, /* Profile 3. */ - { 240, 247 }, /* Profile 4. */ - { 240, 247 }, /* Profile 5. */ - { 240, 247 }, /* Profile 6. */ - { 240, 247 }, /* Profile 7. */ - { 256, 263 }, /* Profile 8. */ - { 256, 263 }, /* Profile 9. */ - { 256, 263 }, /* Profile 10. */ - { 256, 263 }, /* Profile 11. */ - { 256, 263 }, /* Profile 12. */ - { 256, 263 }, /* Profile 13. */ - }, - .profile_cnt = 14, - }, -}; -static bcmpkt_flex_field_info_t bcm78920_a0_vna_4_6_1_0_rxpmd_flex_field_info = { - .num_fields = BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_FID_COUNT, - .info = bcm78920_a0_vna_4_6_1_0_rxpmd_flex_field_data, - .profile_bmp_cnt = 1, - .profile_bmp[0] = 0x3ffc, - -}; - -static shr_enum_map_t bcm78920_a0_vna_4_6_1_0_rxpmd_flex_reason_names[] = { - BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_NAME_MAP_INIT -}; - -static bcmpkt_flex_reasons_info_t bcm78920_a0_vna_4_6_1_0_rxpmd_flex_reasons_info = { - .num_reasons = BCM78920_A0_VNA_4_6_1_0_BCMPKT_RXPMD_FLEX_REASON_COUNT, - .reason_names = bcm78920_a0_vna_4_6_1_0_rxpmd_flex_reason_names, - .reason_encode = bcm78920_a0_vna_4_6_1_0_rxpmd_flex_reason_encode, - .reason_decode = bcm78920_a0_vna_4_6_1_0_rxpmd_flex_reason_decode, -}; - - -static int32_t bcmpkt_arp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 24, 8); - - return ret; -} - -static int32_t bcmpkt_arp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_arp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_arp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_arp_t_operation_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 16); - - return ret; -} - -static int32_t bcmpkt_arp_t_operation_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_arp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 8); - - return ret; -} - -static int32_t bcmpkt_arp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_arp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_arp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_arp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_arp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_arp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_arp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_arp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_arp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_arp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_arp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm78920_a0_vna_4_6_1_0_arp_t_fget[BCM78920_A0_VNA_4_6_1_0_BCMPKT_ARP_T_FID_COUNT] = { - bcmpkt_arp_t_hardware_len_get, - bcmpkt_arp_t_hardware_type_get, - bcmpkt_arp_t_operation_get, - bcmpkt_arp_t_prot_addr_len_get, - bcmpkt_arp_t_protocol_type_get, - bcmpkt_arp_t_sender_ha_get, - bcmpkt_arp_t_sender_ip_get, - bcmpkt_arp_t_target_ha_get, - bcmpkt_arp_t_target_ip_get, -}; - -bcmpkt_flex_field_set_f bcm78920_a0_vna_4_6_1_0_arp_t_fset[BCM78920_A0_VNA_4_6_1_0_BCMPKT_ARP_T_FID_COUNT] = { - bcmpkt_arp_t_hardware_len_set, - bcmpkt_arp_t_hardware_type_set, - bcmpkt_arp_t_operation_set, - bcmpkt_arp_t_prot_addr_len_set, - bcmpkt_arp_t_protocol_type_set, - bcmpkt_arp_t_sender_ha_set, - bcmpkt_arp_t_sender_ip_set, - bcmpkt_arp_t_target_ha_set, - bcmpkt_arp_t_target_ip_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78920_a0_vna_4_6_1_0_arp_t_field_data[] = { - BCM78920_A0_VNA_4_6_1_0_BCMPKT_ARP_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78920_a0_vna_4_6_1_0_arp_t_field_info = { - .num_fields = BCM78920_A0_VNA_4_6_1_0_BCMPKT_ARP_T_FID_COUNT, - .info = bcm78920_a0_vna_4_6_1_0_arp_t_field_data, -}; - - -static int32_t bcmpkt_authen_t_data_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_authen_t_data_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_authen_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_authen_t_next_header_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_authen_t_payload_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_authen_t_payload_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_authen_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_authen_t_reserved_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_authen_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_authen_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_authen_t_spi_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_authen_t_spi_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm78920_a0_vna_4_6_1_0_authen_t_fget[BCM78920_A0_VNA_4_6_1_0_BCMPKT_AUTHEN_T_FID_COUNT] = { - bcmpkt_authen_t_data_get, - bcmpkt_authen_t_next_header_get, - bcmpkt_authen_t_payload_len_get, - bcmpkt_authen_t_reserved_get, - bcmpkt_authen_t_seq_num_get, - bcmpkt_authen_t_spi_get, -}; - -bcmpkt_flex_field_set_f bcm78920_a0_vna_4_6_1_0_authen_t_fset[BCM78920_A0_VNA_4_6_1_0_BCMPKT_AUTHEN_T_FID_COUNT] = { - bcmpkt_authen_t_data_set, - bcmpkt_authen_t_next_header_set, - bcmpkt_authen_t_payload_len_set, - bcmpkt_authen_t_reserved_set, - bcmpkt_authen_t_seq_num_set, - bcmpkt_authen_t_spi_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78920_a0_vna_4_6_1_0_authen_t_field_data[] = { - BCM78920_A0_VNA_4_6_1_0_BCMPKT_AUTHEN_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78920_a0_vna_4_6_1_0_authen_t_field_info = { - .num_fields = BCM78920_A0_VNA_4_6_1_0_BCMPKT_AUTHEN_T_FID_COUNT, - .info = bcm78920_a0_vna_4_6_1_0_authen_t_field_data, -}; - - -static int32_t bcmpkt_bfd_t_desmintxintv_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_bfd_t_desmintxintv_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_bfd_t_minechorxintv_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_bfd_t_minechorxintv_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_bfd_t_reqminrxintv_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_bfd_t_reqminrxintv_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_bfd_t_ap_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 18, 1); - - return ret; -} - -static int32_t bcmpkt_bfd_t_ap_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 18, 1, val); - return ret; -} - -static int32_t bcmpkt_bfd_t_bfd_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 8); - - return ret; -} - -static int32_t bcmpkt_bfd_t_bfd_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 8, val); - return ret; -} - -static int32_t bcmpkt_bfd_t_cpi_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 19, 1); - - return ret; -} - -static int32_t bcmpkt_bfd_t_cpi_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 19, 1, val); - return ret; -} - -static int32_t bcmpkt_bfd_t_dem_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 17, 1); - - return ret; -} - -static int32_t bcmpkt_bfd_t_dem_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 17, 1, val); - return ret; -} - -static int32_t bcmpkt_bfd_t_detectmult_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 8, 8); - - return ret; -} - -static int32_t bcmpkt_bfd_t_detectmult_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 8, 8, val); - return ret; -} - -static int32_t bcmpkt_bfd_t_diag_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 5); - - return ret; -} - -static int32_t bcmpkt_bfd_t_diag_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 5, val); - return ret; -} - -static int32_t bcmpkt_bfd_t_fin_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 20, 1); - - return ret; -} - -static int32_t bcmpkt_bfd_t_fin_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 20, 1, val); - return ret; -} - -static int32_t bcmpkt_bfd_t_mpt_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 1); - - return ret; -} - -static int32_t bcmpkt_bfd_t_mpt_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 1, val); - return ret; -} - -static int32_t bcmpkt_bfd_t_mydiscrim_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_bfd_t_mydiscrim_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_bfd_t_poll_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 21, 1); - - return ret; -} - -static int32_t bcmpkt_bfd_t_poll_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 21, 1, val); - return ret; -} - -static int32_t bcmpkt_bfd_t_sta_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 22, 2); - - return ret; -} - -static int32_t bcmpkt_bfd_t_sta_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 22, 2, val); - return ret; -} - -static int32_t bcmpkt_bfd_t_urdiscrim_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_bfd_t_urdiscrim_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_bfd_t_version_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 29, 3); - - return ret; -} - -static int32_t bcmpkt_bfd_t_version_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 29, 3, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm78920_a0_vna_4_6_1_0_bfd_t_fget[BCM78920_A0_VNA_4_6_1_0_BCMPKT_BFD_T_FID_COUNT] = { - bcmpkt_bfd_t_ap_get, - bcmpkt_bfd_t_bfd_length_get, - bcmpkt_bfd_t_cpi_get, - bcmpkt_bfd_t_dem_get, - bcmpkt_bfd_t_desmintxintv_get, - bcmpkt_bfd_t_detectmult_get, - bcmpkt_bfd_t_diag_get, - bcmpkt_bfd_t_fin_get, - bcmpkt_bfd_t_minechorxintv_get, - bcmpkt_bfd_t_mpt_get, - bcmpkt_bfd_t_mydiscrim_get, - bcmpkt_bfd_t_poll_get, - bcmpkt_bfd_t_reqminrxintv_get, - bcmpkt_bfd_t_sta_get, - bcmpkt_bfd_t_urdiscrim_get, - bcmpkt_bfd_t_version_get, -}; - -bcmpkt_flex_field_set_f bcm78920_a0_vna_4_6_1_0_bfd_t_fset[BCM78920_A0_VNA_4_6_1_0_BCMPKT_BFD_T_FID_COUNT] = { - bcmpkt_bfd_t_ap_set, - bcmpkt_bfd_t_bfd_length_set, - bcmpkt_bfd_t_cpi_set, - bcmpkt_bfd_t_dem_set, - bcmpkt_bfd_t_desmintxintv_set, - bcmpkt_bfd_t_detectmult_set, - bcmpkt_bfd_t_diag_set, - bcmpkt_bfd_t_fin_set, - bcmpkt_bfd_t_minechorxintv_set, - bcmpkt_bfd_t_mpt_set, - bcmpkt_bfd_t_mydiscrim_set, - bcmpkt_bfd_t_poll_set, - bcmpkt_bfd_t_reqminrxintv_set, - bcmpkt_bfd_t_sta_set, - bcmpkt_bfd_t_urdiscrim_set, - bcmpkt_bfd_t_version_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78920_a0_vna_4_6_1_0_bfd_t_field_data[] = { - BCM78920_A0_VNA_4_6_1_0_BCMPKT_BFD_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78920_a0_vna_4_6_1_0_bfd_t_field_info = { - .num_fields = BCM78920_A0_VNA_4_6_1_0_BCMPKT_BFD_T_FID_COUNT, - .info = bcm78920_a0_vna_4_6_1_0_bfd_t_field_data, -}; - - -static int32_t bcmpkt_cnp_icrc_hdr_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_cnp_icrc_hdr_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_cnp_icrc_hdr_t_reserved_1_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_cnp_icrc_hdr_t_reserved_1_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm78920_a0_vna_4_6_1_0_cnp_icrc_hdr_t_fget[BCM78920_A0_VNA_4_6_1_0_BCMPKT_CNP_ICRC_HDR_T_FID_COUNT] = { - bcmpkt_cnp_icrc_hdr_t_reserved_0_get, - bcmpkt_cnp_icrc_hdr_t_reserved_1_get, -}; - -bcmpkt_flex_field_set_f bcm78920_a0_vna_4_6_1_0_cnp_icrc_hdr_t_fset[BCM78920_A0_VNA_4_6_1_0_BCMPKT_CNP_ICRC_HDR_T_FID_COUNT] = { - bcmpkt_cnp_icrc_hdr_t_reserved_0_set, - bcmpkt_cnp_icrc_hdr_t_reserved_1_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78920_a0_vna_4_6_1_0_cnp_icrc_hdr_t_field_data[] = { - BCM78920_A0_VNA_4_6_1_0_BCMPKT_CNP_ICRC_HDR_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78920_a0_vna_4_6_1_0_cnp_icrc_hdr_t_field_info = { - .num_fields = BCM78920_A0_VNA_4_6_1_0_BCMPKT_CNP_ICRC_HDR_T_FID_COUNT, - .info = bcm78920_a0_vna_4_6_1_0_cnp_icrc_hdr_t_field_data, -}; - - -static int32_t bcmpkt_cnp_rsvd_hdr_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_cnp_rsvd_hdr_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_cnp_rsvd_hdr_t_reserved_1_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_cnp_rsvd_hdr_t_reserved_1_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_cnp_rsvd_hdr_t_reserved_2_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 16); - - return ret; -} - -static int32_t bcmpkt_cnp_rsvd_hdr_t_reserved_2_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_cnp_rsvd_hdr_t_reserved_3_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 16); - - return ret; -} - -static int32_t bcmpkt_cnp_rsvd_hdr_t_reserved_3_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_cnp_rsvd_hdr_t_reserved_4_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 16, 16); - - return ret; -} - -static int32_t bcmpkt_cnp_rsvd_hdr_t_reserved_4_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_cnp_rsvd_hdr_t_reserved_5_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 0, 16); - - return ret; -} - -static int32_t bcmpkt_cnp_rsvd_hdr_t_reserved_5_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_cnp_rsvd_hdr_t_reserved_6_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[3], 16, 16); - - return ret; -} - -static int32_t bcmpkt_cnp_rsvd_hdr_t_reserved_6_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[3], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_cnp_rsvd_hdr_t_reserved_7_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[3], 0, 16); - - return ret; -} - -static int32_t bcmpkt_cnp_rsvd_hdr_t_reserved_7_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[3], 0, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm78920_a0_vna_4_6_1_0_cnp_rsvd_hdr_t_fget[BCM78920_A0_VNA_4_6_1_0_BCMPKT_CNP_RSVD_HDR_T_FID_COUNT] = { - bcmpkt_cnp_rsvd_hdr_t_reserved_0_get, - bcmpkt_cnp_rsvd_hdr_t_reserved_1_get, - bcmpkt_cnp_rsvd_hdr_t_reserved_2_get, - bcmpkt_cnp_rsvd_hdr_t_reserved_3_get, - bcmpkt_cnp_rsvd_hdr_t_reserved_4_get, - bcmpkt_cnp_rsvd_hdr_t_reserved_5_get, - bcmpkt_cnp_rsvd_hdr_t_reserved_6_get, - bcmpkt_cnp_rsvd_hdr_t_reserved_7_get, -}; - -bcmpkt_flex_field_set_f bcm78920_a0_vna_4_6_1_0_cnp_rsvd_hdr_t_fset[BCM78920_A0_VNA_4_6_1_0_BCMPKT_CNP_RSVD_HDR_T_FID_COUNT] = { - bcmpkt_cnp_rsvd_hdr_t_reserved_0_set, - bcmpkt_cnp_rsvd_hdr_t_reserved_1_set, - bcmpkt_cnp_rsvd_hdr_t_reserved_2_set, - bcmpkt_cnp_rsvd_hdr_t_reserved_3_set, - bcmpkt_cnp_rsvd_hdr_t_reserved_4_set, - bcmpkt_cnp_rsvd_hdr_t_reserved_5_set, - bcmpkt_cnp_rsvd_hdr_t_reserved_6_set, - bcmpkt_cnp_rsvd_hdr_t_reserved_7_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78920_a0_vna_4_6_1_0_cnp_rsvd_hdr_t_field_data[] = { - BCM78920_A0_VNA_4_6_1_0_BCMPKT_CNP_RSVD_HDR_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78920_a0_vna_4_6_1_0_cnp_rsvd_hdr_t_field_info = { - .num_fields = BCM78920_A0_VNA_4_6_1_0_BCMPKT_CNP_RSVD_HDR_T_FID_COUNT, - .info = bcm78920_a0_vna_4_6_1_0_cnp_rsvd_hdr_t_field_data, -}; - - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont0_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont1_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont2_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont3_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont4_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont5_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_0_t_dma_cont6_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm78920_a0_vna_4_6_1_0_cpu_composites_0_t_fget[BCM78920_A0_VNA_4_6_1_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { - bcmpkt_cpu_composites_0_t_dma_cont0_get, - bcmpkt_cpu_composites_0_t_dma_cont1_get, - bcmpkt_cpu_composites_0_t_dma_cont2_get, - bcmpkt_cpu_composites_0_t_dma_cont3_get, - bcmpkt_cpu_composites_0_t_dma_cont4_get, - bcmpkt_cpu_composites_0_t_dma_cont5_get, - bcmpkt_cpu_composites_0_t_dma_cont6_get, -}; - -bcmpkt_flex_field_set_f bcm78920_a0_vna_4_6_1_0_cpu_composites_0_t_fset[BCM78920_A0_VNA_4_6_1_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT] = { - bcmpkt_cpu_composites_0_t_dma_cont0_set, - bcmpkt_cpu_composites_0_t_dma_cont1_set, - bcmpkt_cpu_composites_0_t_dma_cont2_set, - bcmpkt_cpu_composites_0_t_dma_cont3_set, - bcmpkt_cpu_composites_0_t_dma_cont4_set, - bcmpkt_cpu_composites_0_t_dma_cont5_set, - bcmpkt_cpu_composites_0_t_dma_cont6_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78920_a0_vna_4_6_1_0_cpu_composites_0_t_field_data[] = { - BCM78920_A0_VNA_4_6_1_0_BCMPKT_CPU_COMPOSITES_0_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78920_a0_vna_4_6_1_0_cpu_composites_0_t_field_info = { - .num_fields = BCM78920_A0_VNA_4_6_1_0_BCMPKT_CPU_COMPOSITES_0_T_FID_COUNT, - .info = bcm78920_a0_vna_4_6_1_0_cpu_composites_0_t_field_data, -}; - - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont10_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont11_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont12_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont13_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont14_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont15_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont16_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont17_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont7_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont8_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_cpu_composites_1_t_dma_cont9_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm78920_a0_vna_4_6_1_0_cpu_composites_1_t_fget[BCM78920_A0_VNA_4_6_1_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { - bcmpkt_cpu_composites_1_t_dma_cont10_get, - bcmpkt_cpu_composites_1_t_dma_cont11_get, - bcmpkt_cpu_composites_1_t_dma_cont12_get, - bcmpkt_cpu_composites_1_t_dma_cont13_get, - bcmpkt_cpu_composites_1_t_dma_cont14_get, - bcmpkt_cpu_composites_1_t_dma_cont15_get, - bcmpkt_cpu_composites_1_t_dma_cont16_get, - bcmpkt_cpu_composites_1_t_dma_cont17_get, - bcmpkt_cpu_composites_1_t_dma_cont7_get, - bcmpkt_cpu_composites_1_t_dma_cont8_get, - bcmpkt_cpu_composites_1_t_dma_cont9_get, -}; - -bcmpkt_flex_field_set_f bcm78920_a0_vna_4_6_1_0_cpu_composites_1_t_fset[BCM78920_A0_VNA_4_6_1_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT] = { - bcmpkt_cpu_composites_1_t_dma_cont10_set, - bcmpkt_cpu_composites_1_t_dma_cont11_set, - bcmpkt_cpu_composites_1_t_dma_cont12_set, - bcmpkt_cpu_composites_1_t_dma_cont13_set, - bcmpkt_cpu_composites_1_t_dma_cont14_set, - bcmpkt_cpu_composites_1_t_dma_cont15_set, - bcmpkt_cpu_composites_1_t_dma_cont16_set, - bcmpkt_cpu_composites_1_t_dma_cont17_set, - bcmpkt_cpu_composites_1_t_dma_cont7_set, - bcmpkt_cpu_composites_1_t_dma_cont8_set, - bcmpkt_cpu_composites_1_t_dma_cont9_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78920_a0_vna_4_6_1_0_cpu_composites_1_t_field_data[] = { - BCM78920_A0_VNA_4_6_1_0_BCMPKT_CPU_COMPOSITES_1_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78920_a0_vna_4_6_1_0_cpu_composites_1_t_field_info = { - .num_fields = BCM78920_A0_VNA_4_6_1_0_BCMPKT_CPU_COMPOSITES_1_T_FID_COUNT, - .info = bcm78920_a0_vna_4_6_1_0_cpu_composites_1_t_field_data, -}; - - -static int32_t bcmpkt_dcn_t_byte_2_3_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_dcn_t_byte_2_3_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_dcn_t_byte_4_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 24, 8); - - return ret; -} - -static int32_t bcmpkt_dcn_t_byte_4_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_dcn_t_byte_5_6_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 8, 16); - - return ret; -} - -static int32_t bcmpkt_dcn_t_byte_5_6_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 8, 16, val); - return ret; -} - -static int32_t bcmpkt_dcn_t_flags_bcm_byte_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_dcn_t_flags_bcm_byte_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_dcn_t_next_protocol_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 8); - - return ret; -} - -static int32_t bcmpkt_dcn_t_next_protocol_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 8, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm78920_a0_vna_4_6_1_0_dcn_t_fget[BCM78920_A0_VNA_4_6_1_0_BCMPKT_DCN_T_FID_COUNT] = { - bcmpkt_dcn_t_byte_2_3_get, - bcmpkt_dcn_t_byte_4_get, - bcmpkt_dcn_t_byte_5_6_get, - bcmpkt_dcn_t_flags_bcm_byte_get, - bcmpkt_dcn_t_next_protocol_get, -}; - -bcmpkt_flex_field_set_f bcm78920_a0_vna_4_6_1_0_dcn_t_fset[BCM78920_A0_VNA_4_6_1_0_BCMPKT_DCN_T_FID_COUNT] = { - bcmpkt_dcn_t_byte_2_3_set, - bcmpkt_dcn_t_byte_4_set, - bcmpkt_dcn_t_byte_5_6_set, - bcmpkt_dcn_t_flags_bcm_byte_set, - bcmpkt_dcn_t_next_protocol_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78920_a0_vna_4_6_1_0_dcn_t_field_data[] = { - BCM78920_A0_VNA_4_6_1_0_BCMPKT_DCN_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78920_a0_vna_4_6_1_0_dcn_t_field_info = { - .num_fields = BCM78920_A0_VNA_4_6_1_0_BCMPKT_DCN_T_FID_COUNT, - .info = bcm78920_a0_vna_4_6_1_0_dcn_t_field_data, -}; - - -static int32_t bcmpkt_dest_option_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_dest_option_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_dest_option_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_dest_option_t_next_header_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_dest_option_t_option_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_dest_option_t_option_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm78920_a0_vna_4_6_1_0_dest_option_t_fget[BCM78920_A0_VNA_4_6_1_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = { - bcmpkt_dest_option_t_hdr_ext_len_get, - bcmpkt_dest_option_t_next_header_get, - bcmpkt_dest_option_t_option_get, -}; - -bcmpkt_flex_field_set_f bcm78920_a0_vna_4_6_1_0_dest_option_t_fset[BCM78920_A0_VNA_4_6_1_0_BCMPKT_DEST_OPTION_T_FID_COUNT] = { - bcmpkt_dest_option_t_hdr_ext_len_set, - bcmpkt_dest_option_t_next_header_set, - bcmpkt_dest_option_t_option_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78920_a0_vna_4_6_1_0_dest_option_t_field_data[] = { - BCM78920_A0_VNA_4_6_1_0_BCMPKT_DEST_OPTION_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78920_a0_vna_4_6_1_0_dest_option_t_field_info = { - .num_fields = BCM78920_A0_VNA_4_6_1_0_BCMPKT_DEST_OPTION_T_FID_COUNT, - .info = bcm78920_a0_vna_4_6_1_0_dest_option_t_field_data, -}; - - -static int32_t bcmpkt_ep_nih_header_t_header_subtype_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 20, 4); - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_header_subtype_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 20, 4, val); - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_header_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 6); - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_header_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 6, val); - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 8, 4); - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_a_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 8, 4, val); - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 20, 4); - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_b_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 20, 4, val); - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 4); - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_opaque_ctrl_c_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 4, val); - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_opaque_object_a_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[3], 16, 16); - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_opaque_object_b_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[3], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[3], 0, 16); - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_opaque_object_c_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[3], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 4); - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_recirc_profile_index_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 4, val); - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 12, 4); - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 12, 4, val); - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_start_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 30, 2); - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_start_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 30, 2, val); - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ep_nih_header_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm78920_a0_vna_4_6_1_0_ep_nih_header_t_fget[BCM78920_A0_VNA_4_6_1_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = { - bcmpkt_ep_nih_header_t_header_subtype_get, - bcmpkt_ep_nih_header_t_header_type_get, - bcmpkt_ep_nih_header_t_opaque_ctrl_a_get, - bcmpkt_ep_nih_header_t_opaque_ctrl_b_get, - bcmpkt_ep_nih_header_t_opaque_ctrl_c_get, - bcmpkt_ep_nih_header_t_opaque_object_a_get, - bcmpkt_ep_nih_header_t_opaque_object_b_get, - bcmpkt_ep_nih_header_t_opaque_object_c_get, - bcmpkt_ep_nih_header_t_recirc_profile_index_get, - bcmpkt_ep_nih_header_t_reserved_0_get, - bcmpkt_ep_nih_header_t_start_get, - bcmpkt_ep_nih_header_t_timestamp_get, -}; - -bcmpkt_flex_field_set_f bcm78920_a0_vna_4_6_1_0_ep_nih_header_t_fset[BCM78920_A0_VNA_4_6_1_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT] = { - bcmpkt_ep_nih_header_t_header_subtype_set, - bcmpkt_ep_nih_header_t_header_type_set, - bcmpkt_ep_nih_header_t_opaque_ctrl_a_set, - bcmpkt_ep_nih_header_t_opaque_ctrl_b_set, - bcmpkt_ep_nih_header_t_opaque_ctrl_c_set, - bcmpkt_ep_nih_header_t_opaque_object_a_set, - bcmpkt_ep_nih_header_t_opaque_object_b_set, - bcmpkt_ep_nih_header_t_opaque_object_c_set, - bcmpkt_ep_nih_header_t_recirc_profile_index_set, - bcmpkt_ep_nih_header_t_reserved_0_set, - bcmpkt_ep_nih_header_t_start_set, - bcmpkt_ep_nih_header_t_timestamp_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78920_a0_vna_4_6_1_0_ep_nih_header_t_field_data[] = { - BCM78920_A0_VNA_4_6_1_0_BCMPKT_EP_NIH_HEADER_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78920_a0_vna_4_6_1_0_ep_nih_header_t_field_info = { - .num_fields = BCM78920_A0_VNA_4_6_1_0_BCMPKT_EP_NIH_HEADER_T_FID_COUNT, - .info = bcm78920_a0_vna_4_6_1_0_ep_nih_header_t_field_data, -}; - - -static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 11, 2); - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_bso_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 11, 2, val); - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 13, 3); - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_cos_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 13, 3, val); - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 16, 16); - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 0, 16); - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 10); - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_session_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 10, val); - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_t_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 10, 1); - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_t_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 10, 1, val); - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 28, 4); - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_ver_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 28, 4, val); - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 12); - - return ret; -} - -static int32_t bcmpkt_erspan3_fixed_hdr_t_vlan_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 12, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm78920_a0_vna_4_6_1_0_erspan3_fixed_hdr_t_fget[BCM78920_A0_VNA_4_6_1_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { - bcmpkt_erspan3_fixed_hdr_t_bso_get, - bcmpkt_erspan3_fixed_hdr_t_cos_get, - bcmpkt_erspan3_fixed_hdr_t_gbp_sid_get, - bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_get, - bcmpkt_erspan3_fixed_hdr_t_session_id_get, - bcmpkt_erspan3_fixed_hdr_t_t_get, - bcmpkt_erspan3_fixed_hdr_t_timestamp_get, - bcmpkt_erspan3_fixed_hdr_t_ver_get, - bcmpkt_erspan3_fixed_hdr_t_vlan_get, -}; - -bcmpkt_flex_field_set_f bcm78920_a0_vna_4_6_1_0_erspan3_fixed_hdr_t_fset[BCM78920_A0_VNA_4_6_1_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT] = { - bcmpkt_erspan3_fixed_hdr_t_bso_set, - bcmpkt_erspan3_fixed_hdr_t_cos_set, - bcmpkt_erspan3_fixed_hdr_t_gbp_sid_set, - bcmpkt_erspan3_fixed_hdr_t_p_ft_hwid_d_gra_o_set, - bcmpkt_erspan3_fixed_hdr_t_session_id_set, - bcmpkt_erspan3_fixed_hdr_t_t_set, - bcmpkt_erspan3_fixed_hdr_t_timestamp_set, - bcmpkt_erspan3_fixed_hdr_t_ver_set, - bcmpkt_erspan3_fixed_hdr_t_vlan_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78920_a0_vna_4_6_1_0_erspan3_fixed_hdr_t_field_data[] = { - BCM78920_A0_VNA_4_6_1_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78920_a0_vna_4_6_1_0_erspan3_fixed_hdr_t_field_info = { - .num_fields = BCM78920_A0_VNA_4_6_1_0_BCMPKT_ERSPAN3_FIXED_HDR_T_FID_COUNT, - .info = bcm78920_a0_vna_4_6_1_0_erspan3_fixed_hdr_t_field_data, -}; - - -static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 26, 6); - - return ret; -} - -static int32_t bcmpkt_erspan3_subhdr_5_t_platform_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 26, 6, val); - return ret; -} - -static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_erspan3_subhdr_5_t_port_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 10); - - return ret; -} - -static int32_t bcmpkt_erspan3_subhdr_5_t_switch_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 10, val); - return ret; -} - -static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_erspan3_subhdr_5_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm78920_a0_vna_4_6_1_0_erspan3_subhdr_5_t_fget[BCM78920_A0_VNA_4_6_1_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { - bcmpkt_erspan3_subhdr_5_t_platform_id_get, - bcmpkt_erspan3_subhdr_5_t_port_id_get, - bcmpkt_erspan3_subhdr_5_t_switch_id_get, - bcmpkt_erspan3_subhdr_5_t_timestamp_get, -}; - -bcmpkt_flex_field_set_f bcm78920_a0_vna_4_6_1_0_erspan3_subhdr_5_t_fset[BCM78920_A0_VNA_4_6_1_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT] = { - bcmpkt_erspan3_subhdr_5_t_platform_id_set, - bcmpkt_erspan3_subhdr_5_t_port_id_set, - bcmpkt_erspan3_subhdr_5_t_switch_id_set, - bcmpkt_erspan3_subhdr_5_t_timestamp_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78920_a0_vna_4_6_1_0_erspan3_subhdr_5_t_field_data[] = { - BCM78920_A0_VNA_4_6_1_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78920_a0_vna_4_6_1_0_erspan3_subhdr_5_t_field_info = { - .num_fields = BCM78920_A0_VNA_4_6_1_0_BCMPKT_ERSPAN3_SUBHDR_5_T_FID_COUNT, - .info = bcm78920_a0_vna_4_6_1_0_erspan3_subhdr_5_t_field_data, -}; - - -static int32_t bcmpkt_esp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 0, 8); - - return ret; -} - -static int32_t bcmpkt_esp_t_next_header_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 0, 8, val); - return ret; -} - -static int32_t bcmpkt_esp_t_pad_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 8, 16); - - return ret; -} - -static int32_t bcmpkt_esp_t_pad_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 8, 16, val); - return ret; -} - -static int32_t bcmpkt_esp_t_pad_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 24, 8); - - return ret; -} - -static int32_t bcmpkt_esp_t_pad_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_esp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_esp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_esp_t_spi_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_esp_t_spi_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm78920_a0_vna_4_6_1_0_esp_t_fget[BCM78920_A0_VNA_4_6_1_0_BCMPKT_ESP_T_FID_COUNT] = { - bcmpkt_esp_t_next_header_get, - bcmpkt_esp_t_pad_get, - bcmpkt_esp_t_pad_len_get, - bcmpkt_esp_t_seq_num_get, - bcmpkt_esp_t_spi_get, -}; - -bcmpkt_flex_field_set_f bcm78920_a0_vna_4_6_1_0_esp_t_fset[BCM78920_A0_VNA_4_6_1_0_BCMPKT_ESP_T_FID_COUNT] = { - bcmpkt_esp_t_next_header_set, - bcmpkt_esp_t_pad_set, - bcmpkt_esp_t_pad_len_set, - bcmpkt_esp_t_seq_num_set, - bcmpkt_esp_t_spi_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78920_a0_vna_4_6_1_0_esp_t_field_data[] = { - BCM78920_A0_VNA_4_6_1_0_BCMPKT_ESP_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78920_a0_vna_4_6_1_0_esp_t_field_info = { - .num_fields = BCM78920_A0_VNA_4_6_1_0_BCMPKT_ESP_T_FID_COUNT, - .info = bcm78920_a0_vna_4_6_1_0_esp_t_field_data, -}; - - -static int32_t bcmpkt_ethertype_t_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_ethertype_t_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm78920_a0_vna_4_6_1_0_ethertype_t_fget[BCM78920_A0_VNA_4_6_1_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = { - bcmpkt_ethertype_t_type_get, -}; - -bcmpkt_flex_field_set_f bcm78920_a0_vna_4_6_1_0_ethertype_t_fset[BCM78920_A0_VNA_4_6_1_0_BCMPKT_ETHERTYPE_T_FID_COUNT] = { - bcmpkt_ethertype_t_type_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78920_a0_vna_4_6_1_0_ethertype_t_field_data[] = { - BCM78920_A0_VNA_4_6_1_0_BCMPKT_ETHERTYPE_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78920_a0_vna_4_6_1_0_ethertype_t_field_info = { - .num_fields = BCM78920_A0_VNA_4_6_1_0_BCMPKT_ETHERTYPE_T_FID_COUNT, - .info = bcm78920_a0_vna_4_6_1_0_ethertype_t_field_data, -}; - - -static int32_t bcmpkt_flex_l3_hdr_1_t_flags_ttl_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_flex_l3_hdr_1_t_flags_ttl_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_flex_l3_hdr_1_t_tos_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_flex_l3_hdr_1_t_tos_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm78920_a0_vna_4_6_1_0_flex_l3_hdr_1_t_fget[BCM78920_A0_VNA_4_6_1_0_BCMPKT_FLEX_L3_HDR_1_T_FID_COUNT] = { - bcmpkt_flex_l3_hdr_1_t_flags_ttl_get, - bcmpkt_flex_l3_hdr_1_t_tos_get, -}; - -bcmpkt_flex_field_set_f bcm78920_a0_vna_4_6_1_0_flex_l3_hdr_1_t_fset[BCM78920_A0_VNA_4_6_1_0_BCMPKT_FLEX_L3_HDR_1_T_FID_COUNT] = { - bcmpkt_flex_l3_hdr_1_t_flags_ttl_set, - bcmpkt_flex_l3_hdr_1_t_tos_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78920_a0_vna_4_6_1_0_flex_l3_hdr_1_t_field_data[] = { - BCM78920_A0_VNA_4_6_1_0_BCMPKT_FLEX_L3_HDR_1_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78920_a0_vna_4_6_1_0_flex_l3_hdr_1_t_field_info = { - .num_fields = BCM78920_A0_VNA_4_6_1_0_BCMPKT_FLEX_L3_HDR_1_T_FID_COUNT, - .info = bcm78920_a0_vna_4_6_1_0_flex_l3_hdr_1_t_field_data, -}; - - -static int32_t bcmpkt_flex_l3_hdr_2_t_flags_ttl_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_flex_l3_hdr_2_t_flags_ttl_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_flex_l3_hdr_2_t_flow_label_reserved_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_flex_l3_hdr_2_t_flow_label_reserved_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_flex_l3_hdr_2_t_tos_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_flex_l3_hdr_2_t_tos_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm78920_a0_vna_4_6_1_0_flex_l3_hdr_2_t_fget[BCM78920_A0_VNA_4_6_1_0_BCMPKT_FLEX_L3_HDR_2_T_FID_COUNT] = { - bcmpkt_flex_l3_hdr_2_t_flags_ttl_get, - bcmpkt_flex_l3_hdr_2_t_flow_label_reserved_get, - bcmpkt_flex_l3_hdr_2_t_tos_get, -}; - -bcmpkt_flex_field_set_f bcm78920_a0_vna_4_6_1_0_flex_l3_hdr_2_t_fset[BCM78920_A0_VNA_4_6_1_0_BCMPKT_FLEX_L3_HDR_2_T_FID_COUNT] = { - bcmpkt_flex_l3_hdr_2_t_flags_ttl_set, - bcmpkt_flex_l3_hdr_2_t_flow_label_reserved_set, - bcmpkt_flex_l3_hdr_2_t_tos_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78920_a0_vna_4_6_1_0_flex_l3_hdr_2_t_field_data[] = { - BCM78920_A0_VNA_4_6_1_0_BCMPKT_FLEX_L3_HDR_2_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78920_a0_vna_4_6_1_0_flex_l3_hdr_2_t_field_info = { - .num_fields = BCM78920_A0_VNA_4_6_1_0_BCMPKT_FLEX_L3_HDR_2_T_FID_COUNT, - .info = bcm78920_a0_vna_4_6_1_0_flex_l3_hdr_2_t_field_data, -}; - - -static int32_t bcmpkt_frag_t_frag_info_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_frag_t_frag_info_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_frag_t_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_frag_t_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_frag_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_frag_t_next_header_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_frag_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_frag_t_reserved_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm78920_a0_vna_4_6_1_0_frag_t_fget[BCM78920_A0_VNA_4_6_1_0_BCMPKT_FRAG_T_FID_COUNT] = { - bcmpkt_frag_t_frag_info_get, - bcmpkt_frag_t_id_get, - bcmpkt_frag_t_next_header_get, - bcmpkt_frag_t_reserved_get, -}; - -bcmpkt_flex_field_set_f bcm78920_a0_vna_4_6_1_0_frag_t_fset[BCM78920_A0_VNA_4_6_1_0_BCMPKT_FRAG_T_FID_COUNT] = { - bcmpkt_frag_t_frag_info_set, - bcmpkt_frag_t_id_set, - bcmpkt_frag_t_next_header_set, - bcmpkt_frag_t_reserved_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78920_a0_vna_4_6_1_0_frag_t_field_data[] = { - BCM78920_A0_VNA_4_6_1_0_BCMPKT_FRAG_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78920_a0_vna_4_6_1_0_frag_t_field_info = { - .num_fields = BCM78920_A0_VNA_4_6_1_0_BCMPKT_FRAG_T_FID_COUNT, - .info = bcm78920_a0_vna_4_6_1_0_frag_t_field_data, -}; - - -static int32_t bcmpkt_generic_loopback_t_destination_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 16, 16); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_destination_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_destination_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 8, 4); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_destination_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 8, 4, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_flags_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 4); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_flags_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 4, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_header_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 20, 4); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_header_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 20, 4, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_inc_qp_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[3], 6, 2); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_inc_qp_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[3], 6, 2, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_inc_rsvd_1_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[3], 15, 1); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_inc_rsvd_1_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[3], 15, 1, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_inc_rsvd_6_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[3], 0, 6); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_inc_rsvd_6_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[3], 0, 6, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_inc_src_host_profile_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[3], 8, 7); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_inc_src_host_profile_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[3], 8, 7, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_input_priority_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 28, 4); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_input_priority_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 28, 4, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_int_cn_cng_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[3], 20, 4); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_int_cn_cng_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[3], 20, 4, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_int_pri_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[3], 16, 4); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_int_pri_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[3], 16, 4, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_interface_ctrl_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 20, 4); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_interface_ctrl_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 20, 4, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_interface_object_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 0, 16); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_interface_object_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_packet_entropy_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[3], 24, 8); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_packet_entropy_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[3], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 4); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_processing_ctrl_0_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 4, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 12, 4); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_processing_ctrl_1_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 12, 4, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_reserved_1_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 24, 4); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_reserved_1_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 24, 4, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_reserved_2_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 8); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_reserved_2_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 8, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_source_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_source_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_start_byte_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_generic_loopback_t_start_byte_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm78920_a0_vna_4_6_1_0_generic_loopback_t_fget[BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { - bcmpkt_generic_loopback_t_destination_get, - bcmpkt_generic_loopback_t_destination_type_get, - bcmpkt_generic_loopback_t_flags_get, - bcmpkt_generic_loopback_t_header_type_get, - bcmpkt_generic_loopback_t_inc_qp_id_get, - bcmpkt_generic_loopback_t_inc_rsvd_1_get, - bcmpkt_generic_loopback_t_inc_rsvd_6_get, - bcmpkt_generic_loopback_t_inc_src_host_profile_get, - bcmpkt_generic_loopback_t_input_priority_get, - bcmpkt_generic_loopback_t_int_cn_cng_get, - bcmpkt_generic_loopback_t_int_pri_get, - bcmpkt_generic_loopback_t_interface_ctrl_get, - bcmpkt_generic_loopback_t_interface_object_get, - bcmpkt_generic_loopback_t_packet_entropy_get, - bcmpkt_generic_loopback_t_processing_ctrl_0_get, - bcmpkt_generic_loopback_t_processing_ctrl_1_get, - bcmpkt_generic_loopback_t_reserved_1_get, - bcmpkt_generic_loopback_t_reserved_2_get, - bcmpkt_generic_loopback_t_source_get, - bcmpkt_generic_loopback_t_start_byte_get, -}; - -bcmpkt_flex_field_set_f bcm78920_a0_vna_4_6_1_0_generic_loopback_t_fset[BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT] = { - bcmpkt_generic_loopback_t_destination_set, - bcmpkt_generic_loopback_t_destination_type_set, - bcmpkt_generic_loopback_t_flags_set, - bcmpkt_generic_loopback_t_header_type_set, - bcmpkt_generic_loopback_t_inc_qp_id_set, - bcmpkt_generic_loopback_t_inc_rsvd_1_set, - bcmpkt_generic_loopback_t_inc_rsvd_6_set, - bcmpkt_generic_loopback_t_inc_src_host_profile_set, - bcmpkt_generic_loopback_t_input_priority_set, - bcmpkt_generic_loopback_t_int_cn_cng_set, - bcmpkt_generic_loopback_t_int_pri_set, - bcmpkt_generic_loopback_t_interface_ctrl_set, - bcmpkt_generic_loopback_t_interface_object_set, - bcmpkt_generic_loopback_t_packet_entropy_set, - bcmpkt_generic_loopback_t_processing_ctrl_0_set, - bcmpkt_generic_loopback_t_processing_ctrl_1_set, - bcmpkt_generic_loopback_t_reserved_1_set, - bcmpkt_generic_loopback_t_reserved_2_set, - bcmpkt_generic_loopback_t_source_set, - bcmpkt_generic_loopback_t_start_byte_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78920_a0_vna_4_6_1_0_generic_loopback_t_field_data[] = { - BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_LOOPBACK_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78920_a0_vna_4_6_1_0_generic_loopback_t_field_info = { - .num_fields = BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_LOOPBACK_T_FID_COUNT, - .info = bcm78920_a0_vna_4_6_1_0_generic_loopback_t_field_data, -}; - - -static int32_t bcmpkt_generic_metadata_t_l4_dst_port_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_generic_metadata_t_l4_dst_port_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_generic_metadata_t_node_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 16, 16); - - return ret; -} - -static int32_t bcmpkt_generic_metadata_t_node_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_generic_metadata_t_pkt_ip_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 16); - - return ret; -} - -static int32_t bcmpkt_generic_metadata_t_pkt_ip_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_generic_metadata_t_port_speed_port_type_ttl_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 16); - - return ret; -} - -static int32_t bcmpkt_generic_metadata_t_port_speed_port_type_ttl_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_generic_metadata_t_queue_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 0, 16); - - return ret; -} - -static int32_t bcmpkt_generic_metadata_t_queue_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_generic_metadata_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[3], 0, 16); - - return ret; -} - -static int32_t bcmpkt_generic_metadata_t_reserved_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[3], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_generic_metadata_t_tx_port_queue_num_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[3], 16, 16); - - return ret; -} - -static int32_t bcmpkt_generic_metadata_t_tx_port_queue_num_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[3], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_generic_metadata_t_ver_msg_reason_content_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_generic_metadata_t_ver_msg_reason_content_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm78920_a0_vna_4_6_1_0_generic_metadata_t_fget[BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_METADATA_T_FID_COUNT] = { - bcmpkt_generic_metadata_t_l4_dst_port_get, - bcmpkt_generic_metadata_t_node_id_get, - bcmpkt_generic_metadata_t_pkt_ip_length_get, - bcmpkt_generic_metadata_t_port_speed_port_type_ttl_get, - bcmpkt_generic_metadata_t_queue_length_get, - bcmpkt_generic_metadata_t_reserved_get, - bcmpkt_generic_metadata_t_tx_port_queue_num_get, - bcmpkt_generic_metadata_t_ver_msg_reason_content_id_get, -}; - -bcmpkt_flex_field_set_f bcm78920_a0_vna_4_6_1_0_generic_metadata_t_fset[BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_METADATA_T_FID_COUNT] = { - bcmpkt_generic_metadata_t_l4_dst_port_set, - bcmpkt_generic_metadata_t_node_id_set, - bcmpkt_generic_metadata_t_pkt_ip_length_set, - bcmpkt_generic_metadata_t_port_speed_port_type_ttl_set, - bcmpkt_generic_metadata_t_queue_length_set, - bcmpkt_generic_metadata_t_reserved_set, - bcmpkt_generic_metadata_t_tx_port_queue_num_set, - bcmpkt_generic_metadata_t_ver_msg_reason_content_id_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78920_a0_vna_4_6_1_0_generic_metadata_t_field_data[] = { - BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_METADATA_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78920_a0_vna_4_6_1_0_generic_metadata_t_field_info = { - .num_fields = BCM78920_A0_VNA_4_6_1_0_BCMPKT_GENERIC_METADATA_T_FID_COUNT, - .info = bcm78920_a0_vna_4_6_1_0_generic_metadata_t_field_data, -}; - - -static int32_t bcmpkt_gpe_t_flags_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_gpe_t_flags_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_gpe_t_next_protocol_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 8); - - return ret; -} - -static int32_t bcmpkt_gpe_t_next_protocol_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 8, val); - return ret; -} - -static int32_t bcmpkt_gpe_t_reserved0_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 8, 16); - - return ret; -} - -static int32_t bcmpkt_gpe_t_reserved0_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 8, 16, val); - return ret; -} - -static int32_t bcmpkt_gpe_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 8); - - return ret; -} - -static int32_t bcmpkt_gpe_t_reserved1_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 8, val); - return ret; -} - -static int32_t bcmpkt_gpe_t_vni_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 8, 24); - - return ret; -} - -static int32_t bcmpkt_gpe_t_vni_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 8, 24, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm78920_a0_vna_4_6_1_0_gpe_t_fget[BCM78920_A0_VNA_4_6_1_0_BCMPKT_GPE_T_FID_COUNT] = { - bcmpkt_gpe_t_flags_get, - bcmpkt_gpe_t_next_protocol_get, - bcmpkt_gpe_t_reserved0_get, - bcmpkt_gpe_t_reserved1_get, - bcmpkt_gpe_t_vni_get, -}; - -bcmpkt_flex_field_set_f bcm78920_a0_vna_4_6_1_0_gpe_t_fset[BCM78920_A0_VNA_4_6_1_0_BCMPKT_GPE_T_FID_COUNT] = { - bcmpkt_gpe_t_flags_set, - bcmpkt_gpe_t_next_protocol_set, - bcmpkt_gpe_t_reserved0_set, - bcmpkt_gpe_t_reserved1_set, - bcmpkt_gpe_t_vni_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78920_a0_vna_4_6_1_0_gpe_t_field_data[] = { - BCM78920_A0_VNA_4_6_1_0_BCMPKT_GPE_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78920_a0_vna_4_6_1_0_gpe_t_field_info = { - .num_fields = BCM78920_A0_VNA_4_6_1_0_BCMPKT_GPE_T_FID_COUNT, - .info = bcm78920_a0_vna_4_6_1_0_gpe_t_field_data, -}; - - -static int32_t bcmpkt_gre_chksum_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_gre_chksum_t_checksum_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_gre_chksum_t_offset_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_gre_chksum_t_offset_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm78920_a0_vna_4_6_1_0_gre_chksum_t_fget[BCM78920_A0_VNA_4_6_1_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = { - bcmpkt_gre_chksum_t_checksum_get, - bcmpkt_gre_chksum_t_offset_get, -}; - -bcmpkt_flex_field_set_f bcm78920_a0_vna_4_6_1_0_gre_chksum_t_fset[BCM78920_A0_VNA_4_6_1_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT] = { - bcmpkt_gre_chksum_t_checksum_set, - bcmpkt_gre_chksum_t_offset_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78920_a0_vna_4_6_1_0_gre_chksum_t_field_data[] = { - BCM78920_A0_VNA_4_6_1_0_BCMPKT_GRE_CHKSUM_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78920_a0_vna_4_6_1_0_gre_chksum_t_field_info = { - .num_fields = BCM78920_A0_VNA_4_6_1_0_BCMPKT_GRE_CHKSUM_T_FID_COUNT, - .info = bcm78920_a0_vna_4_6_1_0_gre_chksum_t_field_data, -}; - - -static int32_t bcmpkt_gre_key_t_key_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_gre_key_t_key_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm78920_a0_vna_4_6_1_0_gre_key_t_fget[BCM78920_A0_VNA_4_6_1_0_BCMPKT_GRE_KEY_T_FID_COUNT] = { - bcmpkt_gre_key_t_key_get, -}; - -bcmpkt_flex_field_set_f bcm78920_a0_vna_4_6_1_0_gre_key_t_fset[BCM78920_A0_VNA_4_6_1_0_BCMPKT_GRE_KEY_T_FID_COUNT] = { - bcmpkt_gre_key_t_key_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78920_a0_vna_4_6_1_0_gre_key_t_field_data[] = { - BCM78920_A0_VNA_4_6_1_0_BCMPKT_GRE_KEY_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78920_a0_vna_4_6_1_0_gre_key_t_field_info = { - .num_fields = BCM78920_A0_VNA_4_6_1_0_BCMPKT_GRE_KEY_T_FID_COUNT, - .info = bcm78920_a0_vna_4_6_1_0_gre_key_t_field_data, -}; - - -static int32_t bcmpkt_gre_rout_t_routing_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_gre_rout_t_routing_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm78920_a0_vna_4_6_1_0_gre_rout_t_fget[BCM78920_A0_VNA_4_6_1_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = { - bcmpkt_gre_rout_t_routing_get, -}; - -bcmpkt_flex_field_set_f bcm78920_a0_vna_4_6_1_0_gre_rout_t_fset[BCM78920_A0_VNA_4_6_1_0_BCMPKT_GRE_ROUT_T_FID_COUNT] = { - bcmpkt_gre_rout_t_routing_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78920_a0_vna_4_6_1_0_gre_rout_t_field_data[] = { - BCM78920_A0_VNA_4_6_1_0_BCMPKT_GRE_ROUT_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78920_a0_vna_4_6_1_0_gre_rout_t_field_info = { - .num_fields = BCM78920_A0_VNA_4_6_1_0_BCMPKT_GRE_ROUT_T_FID_COUNT, - .info = bcm78920_a0_vna_4_6_1_0_gre_rout_t_field_data, -}; - - -static int32_t bcmpkt_gre_seq_t_sequence_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_gre_seq_t_sequence_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm78920_a0_vna_4_6_1_0_gre_seq_t_fget[BCM78920_A0_VNA_4_6_1_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = { - bcmpkt_gre_seq_t_sequence_get, -}; - -bcmpkt_flex_field_set_f bcm78920_a0_vna_4_6_1_0_gre_seq_t_fset[BCM78920_A0_VNA_4_6_1_0_BCMPKT_GRE_SEQ_T_FID_COUNT] = { - bcmpkt_gre_seq_t_sequence_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78920_a0_vna_4_6_1_0_gre_seq_t_field_data[] = { - BCM78920_A0_VNA_4_6_1_0_BCMPKT_GRE_SEQ_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78920_a0_vna_4_6_1_0_gre_seq_t_field_info = { - .num_fields = BCM78920_A0_VNA_4_6_1_0_BCMPKT_GRE_SEQ_T_FID_COUNT, - .info = bcm78920_a0_vna_4_6_1_0_gre_seq_t_field_data, -}; - - -static int32_t bcmpkt_gre_t_c_r_k_s_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 28, 4); - - return ret; -} - -static int32_t bcmpkt_gre_t_c_r_k_s_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 28, 4, val); - return ret; -} - -static int32_t bcmpkt_gre_t_protocol_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_gre_t_protocol_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_gre_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 19, 9); - - return ret; -} - -static int32_t bcmpkt_gre_t_reserved_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 19, 9, val); - return ret; -} - -static int32_t bcmpkt_gre_t_version_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 3); - - return ret; -} - -static int32_t bcmpkt_gre_t_version_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 3, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm78920_a0_vna_4_6_1_0_gre_t_fget[BCM78920_A0_VNA_4_6_1_0_BCMPKT_GRE_T_FID_COUNT] = { - bcmpkt_gre_t_c_r_k_s_get, - bcmpkt_gre_t_protocol_get, - bcmpkt_gre_t_reserved_get, - bcmpkt_gre_t_version_get, -}; - -bcmpkt_flex_field_set_f bcm78920_a0_vna_4_6_1_0_gre_t_fset[BCM78920_A0_VNA_4_6_1_0_BCMPKT_GRE_T_FID_COUNT] = { - bcmpkt_gre_t_c_r_k_s_set, - bcmpkt_gre_t_protocol_set, - bcmpkt_gre_t_reserved_set, - bcmpkt_gre_t_version_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78920_a0_vna_4_6_1_0_gre_t_field_data[] = { - BCM78920_A0_VNA_4_6_1_0_BCMPKT_GRE_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78920_a0_vna_4_6_1_0_gre_t_field_info = { - .num_fields = BCM78920_A0_VNA_4_6_1_0_BCMPKT_GRE_T_FID_COUNT, - .info = bcm78920_a0_vna_4_6_1_0_gre_t_field_data, -}; - - -static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_hop_by_hop_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_hop_by_hop_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_hop_by_hop_t_next_header_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_hop_by_hop_t_option_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_hop_by_hop_t_option_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm78920_a0_vna_4_6_1_0_hop_by_hop_t_fget[BCM78920_A0_VNA_4_6_1_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = { - bcmpkt_hop_by_hop_t_hdr_ext_len_get, - bcmpkt_hop_by_hop_t_next_header_get, - bcmpkt_hop_by_hop_t_option_get, -}; - -bcmpkt_flex_field_set_f bcm78920_a0_vna_4_6_1_0_hop_by_hop_t_fset[BCM78920_A0_VNA_4_6_1_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT] = { - bcmpkt_hop_by_hop_t_hdr_ext_len_set, - bcmpkt_hop_by_hop_t_next_header_set, - bcmpkt_hop_by_hop_t_option_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78920_a0_vna_4_6_1_0_hop_by_hop_t_field_data[] = { - BCM78920_A0_VNA_4_6_1_0_BCMPKT_HOP_BY_HOP_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78920_a0_vna_4_6_1_0_hop_by_hop_t_field_info = { - .num_fields = BCM78920_A0_VNA_4_6_1_0_BCMPKT_HOP_BY_HOP_T_FID_COUNT, - .info = bcm78920_a0_vna_4_6_1_0_hop_by_hop_t_field_data, -}; - - -static int32_t bcmpkt_icmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_icmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_icmp_t_code_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_icmp_t_code_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_icmp_t_icmp_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_icmp_t_icmp_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm78920_a0_vna_4_6_1_0_icmp_t_fget[BCM78920_A0_VNA_4_6_1_0_BCMPKT_ICMP_T_FID_COUNT] = { - bcmpkt_icmp_t_checksum_get, - bcmpkt_icmp_t_code_get, - bcmpkt_icmp_t_icmp_type_get, -}; - -bcmpkt_flex_field_set_f bcm78920_a0_vna_4_6_1_0_icmp_t_fset[BCM78920_A0_VNA_4_6_1_0_BCMPKT_ICMP_T_FID_COUNT] = { - bcmpkt_icmp_t_checksum_set, - bcmpkt_icmp_t_code_set, - bcmpkt_icmp_t_icmp_type_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78920_a0_vna_4_6_1_0_icmp_t_field_data[] = { - BCM78920_A0_VNA_4_6_1_0_BCMPKT_ICMP_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78920_a0_vna_4_6_1_0_icmp_t_field_info = { - .num_fields = BCM78920_A0_VNA_4_6_1_0_BCMPKT_ICMP_T_FID_COUNT, - .info = bcm78920_a0_vna_4_6_1_0_icmp_t_field_data, -}; - - -static int32_t bcmpkt_ifa_header_t_flags_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 8, 8); - - return ret; -} - -static int32_t bcmpkt_ifa_header_t_flags_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 8, 8, val); - return ret; -} - -static int32_t bcmpkt_ifa_header_t_gns_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 4); - - return ret; -} - -static int32_t bcmpkt_ifa_header_t_gns_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 4, val); - return ret; -} - -static int32_t bcmpkt_ifa_header_t_max_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 8); - - return ret; -} - -static int32_t bcmpkt_ifa_header_t_max_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 8, val); - return ret; -} - -static int32_t bcmpkt_ifa_header_t_next_hdr_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_ifa_header_t_next_hdr_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_ifa_header_t_ver_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 28, 4); - - return ret; -} - -static int32_t bcmpkt_ifa_header_t_ver_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 28, 4, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm78920_a0_vna_4_6_1_0_ifa_header_t_fget[BCM78920_A0_VNA_4_6_1_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = { - bcmpkt_ifa_header_t_flags_get, - bcmpkt_ifa_header_t_gns_get, - bcmpkt_ifa_header_t_max_length_get, - bcmpkt_ifa_header_t_next_hdr_get, - bcmpkt_ifa_header_t_ver_get, -}; - -bcmpkt_flex_field_set_f bcm78920_a0_vna_4_6_1_0_ifa_header_t_fset[BCM78920_A0_VNA_4_6_1_0_BCMPKT_IFA_HEADER_T_FID_COUNT] = { - bcmpkt_ifa_header_t_flags_set, - bcmpkt_ifa_header_t_gns_set, - bcmpkt_ifa_header_t_max_length_set, - bcmpkt_ifa_header_t_next_hdr_set, - bcmpkt_ifa_header_t_ver_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78920_a0_vna_4_6_1_0_ifa_header_t_field_data[] = { - BCM78920_A0_VNA_4_6_1_0_BCMPKT_IFA_HEADER_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78920_a0_vna_4_6_1_0_ifa_header_t_field_info = { - .num_fields = BCM78920_A0_VNA_4_6_1_0_BCMPKT_IFA_HEADER_T_FID_COUNT, - .info = bcm78920_a0_vna_4_6_1_0_ifa_header_t_field_data, -}; - - -static int32_t bcmpkt_ifa_metadata_a_t_cn_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 26, 2); - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_a_t_cn_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 26, 2, val); - return ret; -} - -static int32_t bcmpkt_ifa_metadata_a_t_fwd_hdr_ttl_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 8); - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_a_t_fwd_hdr_ttl_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 8, val); - return ret; -} - -static int32_t bcmpkt_ifa_metadata_a_t_lns_device_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 8, 24); - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_a_t_lns_device_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 8, 24, val); - return ret; -} - -static int32_t bcmpkt_ifa_metadata_a_t_port_speed_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 28, 4); - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_a_t_port_speed_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 28, 4, val); - return ret; -} - -static int32_t bcmpkt_ifa_metadata_a_t_queue_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 20, 6); - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_a_t_queue_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 20, 6, val); - return ret; -} - -static int32_t bcmpkt_ifa_metadata_a_t_rx_timestamp_sec_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 20); - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_a_t_rx_timestamp_sec_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 20, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm78920_a0_vna_4_6_1_0_ifa_metadata_a_t_fget[BCM78920_A0_VNA_4_6_1_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT] = { - bcmpkt_ifa_metadata_a_t_cn_get, - bcmpkt_ifa_metadata_a_t_fwd_hdr_ttl_get, - bcmpkt_ifa_metadata_a_t_lns_device_id_get, - bcmpkt_ifa_metadata_a_t_port_speed_get, - bcmpkt_ifa_metadata_a_t_queue_id_get, - bcmpkt_ifa_metadata_a_t_rx_timestamp_sec_get, -}; - -bcmpkt_flex_field_set_f bcm78920_a0_vna_4_6_1_0_ifa_metadata_a_t_fset[BCM78920_A0_VNA_4_6_1_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT] = { - bcmpkt_ifa_metadata_a_t_cn_set, - bcmpkt_ifa_metadata_a_t_fwd_hdr_ttl_set, - bcmpkt_ifa_metadata_a_t_lns_device_id_set, - bcmpkt_ifa_metadata_a_t_port_speed_set, - bcmpkt_ifa_metadata_a_t_queue_id_set, - bcmpkt_ifa_metadata_a_t_rx_timestamp_sec_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78920_a0_vna_4_6_1_0_ifa_metadata_a_t_field_data[] = { - BCM78920_A0_VNA_4_6_1_0_BCMPKT_IFA_METADATA_A_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78920_a0_vna_4_6_1_0_ifa_metadata_a_t_field_info = { - .num_fields = BCM78920_A0_VNA_4_6_1_0_BCMPKT_IFA_METADATA_A_T_FID_COUNT, - .info = bcm78920_a0_vna_4_6_1_0_ifa_metadata_a_t_field_data, -}; - - -static int32_t bcmpkt_ifa_metadata_b_t_egress_port_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_b_t_egress_port_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_ifa_metadata_b_t_ingress_port_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_b_t_ingress_port_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_ifa_metadata_b_t_mmu_stat_0_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_b_t_mmu_stat_0_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_b_t_mmu_stat_1_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_b_t_mmu_stat_1_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_b_t_residence_time_nanosec_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_b_t_residence_time_nanosec_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_b_t_rx_timestamp_nanosec_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_b_t_rx_timestamp_nanosec_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_b_t_tx_queue_byte_count_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_b_t_tx_queue_byte_count_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm78920_a0_vna_4_6_1_0_ifa_metadata_b_t_fget[BCM78920_A0_VNA_4_6_1_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT] = { - bcmpkt_ifa_metadata_b_t_egress_port_id_get, - bcmpkt_ifa_metadata_b_t_ingress_port_id_get, - bcmpkt_ifa_metadata_b_t_mmu_stat_0_get, - bcmpkt_ifa_metadata_b_t_mmu_stat_1_get, - bcmpkt_ifa_metadata_b_t_residence_time_nanosec_get, - bcmpkt_ifa_metadata_b_t_rx_timestamp_nanosec_get, - bcmpkt_ifa_metadata_b_t_tx_queue_byte_count_get, -}; - -bcmpkt_flex_field_set_f bcm78920_a0_vna_4_6_1_0_ifa_metadata_b_t_fset[BCM78920_A0_VNA_4_6_1_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT] = { - bcmpkt_ifa_metadata_b_t_egress_port_id_set, - bcmpkt_ifa_metadata_b_t_ingress_port_id_set, - bcmpkt_ifa_metadata_b_t_mmu_stat_0_set, - bcmpkt_ifa_metadata_b_t_mmu_stat_1_set, - bcmpkt_ifa_metadata_b_t_residence_time_nanosec_set, - bcmpkt_ifa_metadata_b_t_rx_timestamp_nanosec_set, - bcmpkt_ifa_metadata_b_t_tx_queue_byte_count_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78920_a0_vna_4_6_1_0_ifa_metadata_b_t_field_data[] = { - BCM78920_A0_VNA_4_6_1_0_BCMPKT_IFA_METADATA_B_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78920_a0_vna_4_6_1_0_ifa_metadata_b_t_field_info = { - .num_fields = BCM78920_A0_VNA_4_6_1_0_BCMPKT_IFA_METADATA_B_T_FID_COUNT, - .info = bcm78920_a0_vna_4_6_1_0_ifa_metadata_b_t_field_data, -}; - - -static int32_t bcmpkt_ifa_metadata_base_t_action_vector_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_base_t_action_vector_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_ifa_metadata_base_t_hop_limit_current_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_base_t_hop_limit_current_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_ifa_metadata_base_t_request_vector_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_ifa_metadata_base_t_request_vector_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm78920_a0_vna_4_6_1_0_ifa_metadata_base_t_fget[BCM78920_A0_VNA_4_6_1_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT] = { - bcmpkt_ifa_metadata_base_t_action_vector_get, - bcmpkt_ifa_metadata_base_t_hop_limit_current_length_get, - bcmpkt_ifa_metadata_base_t_request_vector_get, -}; - -bcmpkt_flex_field_set_f bcm78920_a0_vna_4_6_1_0_ifa_metadata_base_t_fset[BCM78920_A0_VNA_4_6_1_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT] = { - bcmpkt_ifa_metadata_base_t_action_vector_set, - bcmpkt_ifa_metadata_base_t_hop_limit_current_length_set, - bcmpkt_ifa_metadata_base_t_request_vector_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78920_a0_vna_4_6_1_0_ifa_metadata_base_t_field_data[] = { - BCM78920_A0_VNA_4_6_1_0_BCMPKT_IFA_METADATA_BASE_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78920_a0_vna_4_6_1_0_ifa_metadata_base_t_field_info = { - .num_fields = BCM78920_A0_VNA_4_6_1_0_BCMPKT_IFA_METADATA_BASE_T_FID_COUNT, - .info = bcm78920_a0_vna_4_6_1_0_ifa_metadata_base_t_field_data, -}; - - -static int32_t bcmpkt_igmp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_igmp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_igmp_t_group_address_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_igmp_t_group_address_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_igmp_t_igmp_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_igmp_t_igmp_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_igmp_t_max_resp_time_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_igmp_t_max_resp_time_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm78920_a0_vna_4_6_1_0_igmp_t_fget[BCM78920_A0_VNA_4_6_1_0_BCMPKT_IGMP_T_FID_COUNT] = { - bcmpkt_igmp_t_checksum_get, - bcmpkt_igmp_t_group_address_get, - bcmpkt_igmp_t_igmp_type_get, - bcmpkt_igmp_t_max_resp_time_get, -}; - -bcmpkt_flex_field_set_f bcm78920_a0_vna_4_6_1_0_igmp_t_fset[BCM78920_A0_VNA_4_6_1_0_BCMPKT_IGMP_T_FID_COUNT] = { - bcmpkt_igmp_t_checksum_set, - bcmpkt_igmp_t_group_address_set, - bcmpkt_igmp_t_igmp_type_set, - bcmpkt_igmp_t_max_resp_time_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78920_a0_vna_4_6_1_0_igmp_t_field_data[] = { - BCM78920_A0_VNA_4_6_1_0_BCMPKT_IGMP_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78920_a0_vna_4_6_1_0_igmp_t_field_info = { - .num_fields = BCM78920_A0_VNA_4_6_1_0_BCMPKT_IGMP_T_FID_COUNT, - .info = bcm78920_a0_vna_4_6_1_0_igmp_t_field_data, -}; - - -static int32_t bcmpkt_ipfix_t_export_time_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipfix_t_export_time_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipfix_t_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_ipfix_t_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_ipfix_t_obs_domain_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipfix_t_obs_domain_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipfix_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipfix_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipfix_t_version_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_ipfix_t_version_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm78920_a0_vna_4_6_1_0_ipfix_t_fget[BCM78920_A0_VNA_4_6_1_0_BCMPKT_IPFIX_T_FID_COUNT] = { - bcmpkt_ipfix_t_export_time_get, - bcmpkt_ipfix_t_length_get, - bcmpkt_ipfix_t_obs_domain_id_get, - bcmpkt_ipfix_t_sequence_num_get, - bcmpkt_ipfix_t_version_get, -}; - -bcmpkt_flex_field_set_f bcm78920_a0_vna_4_6_1_0_ipfix_t_fset[BCM78920_A0_VNA_4_6_1_0_BCMPKT_IPFIX_T_FID_COUNT] = { - bcmpkt_ipfix_t_export_time_set, - bcmpkt_ipfix_t_length_set, - bcmpkt_ipfix_t_obs_domain_id_set, - bcmpkt_ipfix_t_sequence_num_set, - bcmpkt_ipfix_t_version_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78920_a0_vna_4_6_1_0_ipfix_t_field_data[] = { - BCM78920_A0_VNA_4_6_1_0_BCMPKT_IPFIX_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78920_a0_vna_4_6_1_0_ipfix_t_field_info = { - .num_fields = BCM78920_A0_VNA_4_6_1_0_BCMPKT_IPFIX_T_FID_COUNT, - .info = bcm78920_a0_vna_4_6_1_0_ipfix_t_field_data, -}; - - -static int32_t bcmpkt_ipv4_t_da_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv4_t_da_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv4_t_flags_frag_offset_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 16); - - return ret; -} - -static int32_t bcmpkt_ipv4_t_flags_frag_offset_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_ipv4_t_hdr_checksum_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 0, 16); - - return ret; -} - -static int32_t bcmpkt_ipv4_t_hdr_checksum_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_ipv4_t_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 16); - - return ret; -} - -static int32_t bcmpkt_ipv4_t_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_ipv4_t_option_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv4_t_option_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv4_t_protocol_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 16, 8); - - return ret; -} - -static int32_t bcmpkt_ipv4_t_protocol_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_ipv4_t_sa_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv4_t_sa_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv4_t_tos_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_ipv4_t_tos_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_ipv4_t_total_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_ipv4_t_total_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_ipv4_t_ttl_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 24, 8); - - return ret; -} - -static int32_t bcmpkt_ipv4_t_ttl_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_ipv4_t_version_hdr_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_ipv4_t_version_hdr_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm78920_a0_vna_4_6_1_0_ipv4_t_fget[BCM78920_A0_VNA_4_6_1_0_BCMPKT_IPV4_T_FID_COUNT] = { - bcmpkt_ipv4_t_da_get, - bcmpkt_ipv4_t_flags_frag_offset_get, - bcmpkt_ipv4_t_hdr_checksum_get, - bcmpkt_ipv4_t_id_get, - bcmpkt_ipv4_t_option_get, - bcmpkt_ipv4_t_protocol_get, - bcmpkt_ipv4_t_sa_get, - bcmpkt_ipv4_t_tos_get, - bcmpkt_ipv4_t_total_length_get, - bcmpkt_ipv4_t_ttl_get, - bcmpkt_ipv4_t_version_hdr_len_get, -}; - -bcmpkt_flex_field_set_f bcm78920_a0_vna_4_6_1_0_ipv4_t_fset[BCM78920_A0_VNA_4_6_1_0_BCMPKT_IPV4_T_FID_COUNT] = { - bcmpkt_ipv4_t_da_set, - bcmpkt_ipv4_t_flags_frag_offset_set, - bcmpkt_ipv4_t_hdr_checksum_set, - bcmpkt_ipv4_t_id_set, - bcmpkt_ipv4_t_option_set, - bcmpkt_ipv4_t_protocol_set, - bcmpkt_ipv4_t_sa_set, - bcmpkt_ipv4_t_tos_set, - bcmpkt_ipv4_t_total_length_set, - bcmpkt_ipv4_t_ttl_set, - bcmpkt_ipv4_t_version_hdr_len_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78920_a0_vna_4_6_1_0_ipv4_t_field_data[] = { - BCM78920_A0_VNA_4_6_1_0_BCMPKT_IPV4_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78920_a0_vna_4_6_1_0_ipv4_t_field_info = { - .num_fields = BCM78920_A0_VNA_4_6_1_0_BCMPKT_IPV4_T_FID_COUNT, - .info = bcm78920_a0_vna_4_6_1_0_ipv4_t_field_data, -}; - - -static int32_t bcmpkt_ipv6_t_da_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv6_t_da_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv6_t_flow_label_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 20); - - return ret; -} - -static int32_t bcmpkt_ipv6_t_flow_label_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 20, val); - return ret; -} - -static int32_t bcmpkt_ipv6_t_hop_limit_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 8); - - return ret; -} - -static int32_t bcmpkt_ipv6_t_hop_limit_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 8, val); - return ret; -} - -static int32_t bcmpkt_ipv6_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 8, 8); - - return ret; -} - -static int32_t bcmpkt_ipv6_t_next_header_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 8, 8, val); - return ret; -} - -static int32_t bcmpkt_ipv6_t_payload_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 16); - - return ret; -} - -static int32_t bcmpkt_ipv6_t_payload_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_ipv6_t_sa_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv6_t_sa_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_ipv6_t_traffic_class_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 20, 8); - - return ret; -} - -static int32_t bcmpkt_ipv6_t_traffic_class_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 20, 8, val); - return ret; -} - -static int32_t bcmpkt_ipv6_t_version_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 28, 4); - - return ret; -} - -static int32_t bcmpkt_ipv6_t_version_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 28, 4, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm78920_a0_vna_4_6_1_0_ipv6_t_fget[BCM78920_A0_VNA_4_6_1_0_BCMPKT_IPV6_T_FID_COUNT] = { - bcmpkt_ipv6_t_da_get, - bcmpkt_ipv6_t_flow_label_get, - bcmpkt_ipv6_t_hop_limit_get, - bcmpkt_ipv6_t_next_header_get, - bcmpkt_ipv6_t_payload_length_get, - bcmpkt_ipv6_t_sa_get, - bcmpkt_ipv6_t_traffic_class_get, - bcmpkt_ipv6_t_version_get, -}; - -bcmpkt_flex_field_set_f bcm78920_a0_vna_4_6_1_0_ipv6_t_fset[BCM78920_A0_VNA_4_6_1_0_BCMPKT_IPV6_T_FID_COUNT] = { - bcmpkt_ipv6_t_da_set, - bcmpkt_ipv6_t_flow_label_set, - bcmpkt_ipv6_t_hop_limit_set, - bcmpkt_ipv6_t_next_header_set, - bcmpkt_ipv6_t_payload_length_set, - bcmpkt_ipv6_t_sa_set, - bcmpkt_ipv6_t_traffic_class_set, - bcmpkt_ipv6_t_version_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78920_a0_vna_4_6_1_0_ipv6_t_field_data[] = { - BCM78920_A0_VNA_4_6_1_0_BCMPKT_IPV6_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78920_a0_vna_4_6_1_0_ipv6_t_field_info = { - .num_fields = BCM78920_A0_VNA_4_6_1_0_BCMPKT_IPV6_T_FID_COUNT, - .info = bcm78920_a0_vna_4_6_1_0_ipv6_t_field_data, -}; - - -static int32_t bcmpkt_l2_instr_4byte_t_tag_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_l2_instr_4byte_t_tag_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_l2_instr_4byte_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_l2_instr_4byte_t_tpid_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm78920_a0_vna_4_6_1_0_l2_instr_4byte_t_fget[BCM78920_A0_VNA_4_6_1_0_BCMPKT_L2_INSTR_4BYTE_T_FID_COUNT] = { - bcmpkt_l2_instr_4byte_t_tag_get, - bcmpkt_l2_instr_4byte_t_tpid_get, -}; - -bcmpkt_flex_field_set_f bcm78920_a0_vna_4_6_1_0_l2_instr_4byte_t_fset[BCM78920_A0_VNA_4_6_1_0_BCMPKT_L2_INSTR_4BYTE_T_FID_COUNT] = { - bcmpkt_l2_instr_4byte_t_tag_set, - bcmpkt_l2_instr_4byte_t_tpid_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78920_a0_vna_4_6_1_0_l2_instr_4byte_t_field_data[] = { - BCM78920_A0_VNA_4_6_1_0_BCMPKT_L2_INSTR_4BYTE_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78920_a0_vna_4_6_1_0_l2_instr_4byte_t_field_info = { - .num_fields = BCM78920_A0_VNA_4_6_1_0_BCMPKT_L2_INSTR_4BYTE_T_FID_COUNT, - .info = bcm78920_a0_vna_4_6_1_0_l2_instr_4byte_t_field_data, -}; - - -static int32_t bcmpkt_l2_instr_8byte_t_tag_hi_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_l2_instr_8byte_t_tag_hi_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_l2_instr_8byte_t_tag_lo_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 16); - - return ret; -} - -static int32_t bcmpkt_l2_instr_8byte_t_tag_lo_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_l2_instr_8byte_t_tag_mid_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 16); - - return ret; -} - -static int32_t bcmpkt_l2_instr_8byte_t_tag_mid_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_l2_instr_8byte_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_l2_instr_8byte_t_tpid_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm78920_a0_vna_4_6_1_0_l2_instr_8byte_t_fget[BCM78920_A0_VNA_4_6_1_0_BCMPKT_L2_INSTR_8BYTE_T_FID_COUNT] = { - bcmpkt_l2_instr_8byte_t_tag_hi_get, - bcmpkt_l2_instr_8byte_t_tag_lo_get, - bcmpkt_l2_instr_8byte_t_tag_mid_get, - bcmpkt_l2_instr_8byte_t_tpid_get, -}; - -bcmpkt_flex_field_set_f bcm78920_a0_vna_4_6_1_0_l2_instr_8byte_t_fset[BCM78920_A0_VNA_4_6_1_0_BCMPKT_L2_INSTR_8BYTE_T_FID_COUNT] = { - bcmpkt_l2_instr_8byte_t_tag_hi_set, - bcmpkt_l2_instr_8byte_t_tag_lo_set, - bcmpkt_l2_instr_8byte_t_tag_mid_set, - bcmpkt_l2_instr_8byte_t_tpid_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78920_a0_vna_4_6_1_0_l2_instr_8byte_t_field_data[] = { - BCM78920_A0_VNA_4_6_1_0_BCMPKT_L2_INSTR_8BYTE_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78920_a0_vna_4_6_1_0_l2_instr_8byte_t_field_info = { - .num_fields = BCM78920_A0_VNA_4_6_1_0_BCMPKT_L2_INSTR_8BYTE_T_FID_COUNT, - .info = bcm78920_a0_vna_4_6_1_0_l2_instr_8byte_t_field_data, -}; - - -static int32_t bcmpkt_l2_t_macda_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_l2_t_macda_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_l2_t_macsa_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_l2_t_macsa_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm78920_a0_vna_4_6_1_0_l2_t_fget[BCM78920_A0_VNA_4_6_1_0_BCMPKT_L2_T_FID_COUNT] = { - bcmpkt_l2_t_macda_get, - bcmpkt_l2_t_macsa_get, -}; - -bcmpkt_flex_field_set_f bcm78920_a0_vna_4_6_1_0_l2_t_fset[BCM78920_A0_VNA_4_6_1_0_BCMPKT_L2_T_FID_COUNT] = { - bcmpkt_l2_t_macda_set, - bcmpkt_l2_t_macsa_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78920_a0_vna_4_6_1_0_l2_t_field_data[] = { - BCM78920_A0_VNA_4_6_1_0_BCMPKT_L2_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78920_a0_vna_4_6_1_0_l2_t_field_info = { - .num_fields = BCM78920_A0_VNA_4_6_1_0_BCMPKT_L2_T_FID_COUNT, - .info = bcm78920_a0_vna_4_6_1_0_l2_t_field_data, -}; - - -static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_mirror_erspan_sn_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm78920_a0_vna_4_6_1_0_mirror_erspan_sn_t_fget[BCM78920_A0_VNA_4_6_1_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { - bcmpkt_mirror_erspan_sn_t_seq_num_get, -}; - -bcmpkt_flex_field_set_f bcm78920_a0_vna_4_6_1_0_mirror_erspan_sn_t_fset[BCM78920_A0_VNA_4_6_1_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT] = { - bcmpkt_mirror_erspan_sn_t_seq_num_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78920_a0_vna_4_6_1_0_mirror_erspan_sn_t_field_data[] = { - BCM78920_A0_VNA_4_6_1_0_BCMPKT_MIRROR_ERSPAN_SN_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78920_a0_vna_4_6_1_0_mirror_erspan_sn_t_field_info = { - .num_fields = BCM78920_A0_VNA_4_6_1_0_BCMPKT_MIRROR_ERSPAN_SN_T_FID_COUNT, - .info = bcm78920_a0_vna_4_6_1_0_mirror_erspan_sn_t_field_data, -}; - - -static int32_t bcmpkt_mirror_transport_t_data_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_mirror_transport_t_data_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm78920_a0_vna_4_6_1_0_mirror_transport_t_fget[BCM78920_A0_VNA_4_6_1_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { - bcmpkt_mirror_transport_t_data_get, -}; - -bcmpkt_flex_field_set_f bcm78920_a0_vna_4_6_1_0_mirror_transport_t_fset[BCM78920_A0_VNA_4_6_1_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT] = { - bcmpkt_mirror_transport_t_data_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78920_a0_vna_4_6_1_0_mirror_transport_t_field_data[] = { - BCM78920_A0_VNA_4_6_1_0_BCMPKT_MIRROR_TRANSPORT_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78920_a0_vna_4_6_1_0_mirror_transport_t_field_info = { - .num_fields = BCM78920_A0_VNA_4_6_1_0_BCMPKT_MIRROR_TRANSPORT_T_FID_COUNT, - .info = bcm78920_a0_vna_4_6_1_0_mirror_transport_t_field_data, -}; - - -static int32_t bcmpkt_mpls_ach_t_channel_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_mpls_ach_t_channel_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_mpls_ach_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 28, 4); - - return ret; -} - -static int32_t bcmpkt_mpls_ach_t_cw_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 28, 4, val); - return ret; -} - -static int32_t bcmpkt_mpls_ach_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_mpls_ach_t_reserved_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_mpls_ach_t_version_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 4); - - return ret; -} - -static int32_t bcmpkt_mpls_ach_t_version_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 4, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm78920_a0_vna_4_6_1_0_mpls_ach_t_fget[BCM78920_A0_VNA_4_6_1_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = { - bcmpkt_mpls_ach_t_channel_type_get, - bcmpkt_mpls_ach_t_cw_type_get, - bcmpkt_mpls_ach_t_reserved_get, - bcmpkt_mpls_ach_t_version_get, -}; - -bcmpkt_flex_field_set_f bcm78920_a0_vna_4_6_1_0_mpls_ach_t_fset[BCM78920_A0_VNA_4_6_1_0_BCMPKT_MPLS_ACH_T_FID_COUNT] = { - bcmpkt_mpls_ach_t_channel_type_set, - bcmpkt_mpls_ach_t_cw_type_set, - bcmpkt_mpls_ach_t_reserved_set, - bcmpkt_mpls_ach_t_version_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78920_a0_vna_4_6_1_0_mpls_ach_t_field_data[] = { - BCM78920_A0_VNA_4_6_1_0_BCMPKT_MPLS_ACH_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78920_a0_vna_4_6_1_0_mpls_ach_t_field_info = { - .num_fields = BCM78920_A0_VNA_4_6_1_0_BCMPKT_MPLS_ACH_T_FID_COUNT, - .info = bcm78920_a0_vna_4_6_1_0_mpls_ach_t_field_data, -}; - - -static int32_t bcmpkt_mpls_bv_t_value_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_mpls_bv_t_value_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm78920_a0_vna_4_6_1_0_mpls_bv_t_fget[BCM78920_A0_VNA_4_6_1_0_BCMPKT_MPLS_BV_T_FID_COUNT] = { - bcmpkt_mpls_bv_t_value_get, -}; - -bcmpkt_flex_field_set_f bcm78920_a0_vna_4_6_1_0_mpls_bv_t_fset[BCM78920_A0_VNA_4_6_1_0_BCMPKT_MPLS_BV_T_FID_COUNT] = { - bcmpkt_mpls_bv_t_value_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78920_a0_vna_4_6_1_0_mpls_bv_t_field_data[] = { - BCM78920_A0_VNA_4_6_1_0_BCMPKT_MPLS_BV_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78920_a0_vna_4_6_1_0_mpls_bv_t_field_info = { - .num_fields = BCM78920_A0_VNA_4_6_1_0_BCMPKT_MPLS_BV_T_FID_COUNT, - .info = bcm78920_a0_vna_4_6_1_0_mpls_bv_t_field_data, -}; - - -static int32_t bcmpkt_mpls_cw_t_cw_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 28, 4); - - return ret; -} - -static int32_t bcmpkt_mpls_cw_t_cw_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 28, 4, val); - return ret; -} - -static int32_t bcmpkt_mpls_cw_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 12); - - return ret; -} - -static int32_t bcmpkt_mpls_cw_t_reserved_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 12, val); - return ret; -} - -static int32_t bcmpkt_mpls_cw_t_seq_number_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_mpls_cw_t_seq_number_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm78920_a0_vna_4_6_1_0_mpls_cw_t_fget[BCM78920_A0_VNA_4_6_1_0_BCMPKT_MPLS_CW_T_FID_COUNT] = { - bcmpkt_mpls_cw_t_cw_type_get, - bcmpkt_mpls_cw_t_reserved_get, - bcmpkt_mpls_cw_t_seq_number_get, -}; - -bcmpkt_flex_field_set_f bcm78920_a0_vna_4_6_1_0_mpls_cw_t_fset[BCM78920_A0_VNA_4_6_1_0_BCMPKT_MPLS_CW_T_FID_COUNT] = { - bcmpkt_mpls_cw_t_cw_type_set, - bcmpkt_mpls_cw_t_reserved_set, - bcmpkt_mpls_cw_t_seq_number_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78920_a0_vna_4_6_1_0_mpls_cw_t_field_data[] = { - BCM78920_A0_VNA_4_6_1_0_BCMPKT_MPLS_CW_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78920_a0_vna_4_6_1_0_mpls_cw_t_field_info = { - .num_fields = BCM78920_A0_VNA_4_6_1_0_BCMPKT_MPLS_CW_T_FID_COUNT, - .info = bcm78920_a0_vna_4_6_1_0_mpls_cw_t_field_data, -}; - - -static int32_t bcmpkt_mpls_t_bos_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 8, 1); - - return ret; -} - -static int32_t bcmpkt_mpls_t_bos_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 8, 1, val); - return ret; -} - -static int32_t bcmpkt_mpls_t_exp_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 9, 3); - - return ret; -} - -static int32_t bcmpkt_mpls_t_exp_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 9, 3, val); - return ret; -} - -static int32_t bcmpkt_mpls_t_label_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 12, 20); - - return ret; -} - -static int32_t bcmpkt_mpls_t_label_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 12, 20, val); - return ret; -} - -static int32_t bcmpkt_mpls_t_ttl_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 8); - - return ret; -} - -static int32_t bcmpkt_mpls_t_ttl_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 8, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm78920_a0_vna_4_6_1_0_mpls_t_fget[BCM78920_A0_VNA_4_6_1_0_BCMPKT_MPLS_T_FID_COUNT] = { - bcmpkt_mpls_t_bos_get, - bcmpkt_mpls_t_exp_get, - bcmpkt_mpls_t_label_get, - bcmpkt_mpls_t_ttl_get, -}; - -bcmpkt_flex_field_set_f bcm78920_a0_vna_4_6_1_0_mpls_t_fset[BCM78920_A0_VNA_4_6_1_0_BCMPKT_MPLS_T_FID_COUNT] = { - bcmpkt_mpls_t_bos_set, - bcmpkt_mpls_t_exp_set, - bcmpkt_mpls_t_label_set, - bcmpkt_mpls_t_ttl_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78920_a0_vna_4_6_1_0_mpls_t_field_data[] = { - BCM78920_A0_VNA_4_6_1_0_BCMPKT_MPLS_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78920_a0_vna_4_6_1_0_mpls_t_field_info = { - .num_fields = BCM78920_A0_VNA_4_6_1_0_BCMPKT_MPLS_T_FID_COUNT, - .info = bcm78920_a0_vna_4_6_1_0_mpls_t_field_data, -}; - - -static int32_t bcmpkt_p_1588_t_cntrl_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[8], 24, 8); - - return ret; -} - -static int32_t bcmpkt_p_1588_t_cntrl_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[8], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_p_1588_t_correction_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_p_1588_t_correction_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_p_1588_t_domain_nb_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 24, 8); - - return ret; -} - -static int32_t bcmpkt_p_1588_t_domain_nb_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_p_1588_t_flags_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 16); - - return ret; -} - -static int32_t bcmpkt_p_1588_t_flags_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_p_1588_t_logmsginterval_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[8], 16, 8); - - return ret; -} - -static int32_t bcmpkt_p_1588_t_logmsginterval_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[8], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_p_1588_t_msg_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_p_1588_t_msg_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_p_1588_t_msg_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 4); - - return ret; -} - -static int32_t bcmpkt_p_1588_t_msg_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 4, val); - return ret; -} - -static int32_t bcmpkt_p_1588_t_reserved1_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 20, 4); - - return ret; -} - -static int32_t bcmpkt_p_1588_t_reserved1_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 20, 4, val); - return ret; -} - -static int32_t bcmpkt_p_1588_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 8); - - return ret; -} - -static int32_t bcmpkt_p_1588_t_reserved2_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_p_1588_t_reserved3_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_p_1588_t_reserved3_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_p_1588_t_seq_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[7], 0, 16); - - return ret; -} - -static int32_t bcmpkt_p_1588_t_seq_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[7], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_p_1588_t_srcportid_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_p_1588_t_srcportid_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_p_1588_t_transportspec_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 28, 4); - - return ret; -} - -static int32_t bcmpkt_p_1588_t_transportspec_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 28, 4, val); - return ret; -} - -static int32_t bcmpkt_p_1588_t_version_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 4); - - return ret; -} - -static int32_t bcmpkt_p_1588_t_version_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 4, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm78920_a0_vna_4_6_1_0_p_1588_t_fget[BCM78920_A0_VNA_4_6_1_0_BCMPKT_P_1588_T_FID_COUNT] = { - bcmpkt_p_1588_t_cntrl_get, - bcmpkt_p_1588_t_correction_get, - bcmpkt_p_1588_t_domain_nb_get, - bcmpkt_p_1588_t_flags_get, - bcmpkt_p_1588_t_logmsginterval_get, - bcmpkt_p_1588_t_msg_length_get, - bcmpkt_p_1588_t_msg_type_get, - bcmpkt_p_1588_t_reserved1_get, - bcmpkt_p_1588_t_reserved2_get, - bcmpkt_p_1588_t_reserved3_get, - bcmpkt_p_1588_t_seq_id_get, - bcmpkt_p_1588_t_srcportid_get, - bcmpkt_p_1588_t_transportspec_get, - bcmpkt_p_1588_t_version_get, -}; - -bcmpkt_flex_field_set_f bcm78920_a0_vna_4_6_1_0_p_1588_t_fset[BCM78920_A0_VNA_4_6_1_0_BCMPKT_P_1588_T_FID_COUNT] = { - bcmpkt_p_1588_t_cntrl_set, - bcmpkt_p_1588_t_correction_set, - bcmpkt_p_1588_t_domain_nb_set, - bcmpkt_p_1588_t_flags_set, - bcmpkt_p_1588_t_logmsginterval_set, - bcmpkt_p_1588_t_msg_length_set, - bcmpkt_p_1588_t_msg_type_set, - bcmpkt_p_1588_t_reserved1_set, - bcmpkt_p_1588_t_reserved2_set, - bcmpkt_p_1588_t_reserved3_set, - bcmpkt_p_1588_t_seq_id_set, - bcmpkt_p_1588_t_srcportid_set, - bcmpkt_p_1588_t_transportspec_set, - bcmpkt_p_1588_t_version_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78920_a0_vna_4_6_1_0_p_1588_t_field_data[] = { - BCM78920_A0_VNA_4_6_1_0_BCMPKT_P_1588_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78920_a0_vna_4_6_1_0_p_1588_t_field_info = { - .num_fields = BCM78920_A0_VNA_4_6_1_0_BCMPKT_P_1588_T_FID_COUNT, - .info = bcm78920_a0_vna_4_6_1_0_p_1588_t_field_data, -}; - - -static int32_t bcmpkt_psamp_0_t_flowset_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[3], 16, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_0_t_flowset_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[3], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_0_t_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_0_t_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_0_t_next_hop_index_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[3], 0, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_0_t_next_hop_index_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[3], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm78920_a0_vna_4_6_1_0_psamp_0_t_fget[BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_0_T_FID_COUNT] = { - bcmpkt_psamp_0_t_flowset_get, - bcmpkt_psamp_0_t_length_get, - bcmpkt_psamp_0_t_next_hop_index_get, - bcmpkt_psamp_0_t_obs_time_ns_get, - bcmpkt_psamp_0_t_obs_time_s_get, - bcmpkt_psamp_0_t_template_id_get, -}; - -bcmpkt_flex_field_set_f bcm78920_a0_vna_4_6_1_0_psamp_0_t_fset[BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_0_T_FID_COUNT] = { - bcmpkt_psamp_0_t_flowset_set, - bcmpkt_psamp_0_t_length_set, - bcmpkt_psamp_0_t_next_hop_index_set, - bcmpkt_psamp_0_t_obs_time_ns_set, - bcmpkt_psamp_0_t_obs_time_s_set, - bcmpkt_psamp_0_t_template_id_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78920_a0_vna_4_6_1_0_psamp_0_t_field_data[] = { - BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_0_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78920_a0_vna_4_6_1_0_psamp_0_t_field_info = { - .num_fields = BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_0_T_FID_COUNT, - .info = bcm78920_a0_vna_4_6_1_0_psamp_0_t_field_data, -}; - - -static int32_t bcmpkt_psamp_1_t_dlb_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 24, 8); - - return ret; -} - -static int32_t bcmpkt_psamp_1_t_dlb_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_psamp_1_t_egress_port_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_1_t_egress_port_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_1_t_epoch_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_1_t_epoch_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_1_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_1_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_1_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 0, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_1_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_1_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_1_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_1_t_variable_flag_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 16, 8); - - return ret; -} - -static int32_t bcmpkt_psamp_1_t_variable_flag_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 16, 8, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm78920_a0_vna_4_6_1_0_psamp_1_t_fget[BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_1_T_FID_COUNT] = { - bcmpkt_psamp_1_t_dlb_id_get, - bcmpkt_psamp_1_t_egress_port_get, - bcmpkt_psamp_1_t_epoch_get, - bcmpkt_psamp_1_t_ingress_port_get, - bcmpkt_psamp_1_t_sampled_length_get, - bcmpkt_psamp_1_t_user_meta_data_get, - bcmpkt_psamp_1_t_variable_flag_get, -}; - -bcmpkt_flex_field_set_f bcm78920_a0_vna_4_6_1_0_psamp_1_t_fset[BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_1_T_FID_COUNT] = { - bcmpkt_psamp_1_t_dlb_id_set, - bcmpkt_psamp_1_t_egress_port_set, - bcmpkt_psamp_1_t_epoch_set, - bcmpkt_psamp_1_t_ingress_port_set, - bcmpkt_psamp_1_t_sampled_length_set, - bcmpkt_psamp_1_t_user_meta_data_set, - bcmpkt_psamp_1_t_variable_flag_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78920_a0_vna_4_6_1_0_psamp_1_t_field_data[] = { - BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_1_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78920_a0_vna_4_6_1_0_psamp_1_t_field_info = { - .num_fields = BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_1_T_FID_COUNT, - .info = bcm78920_a0_vna_4_6_1_0_psamp_1_t_field_data, -}; - - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[4], 16, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[4], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[4], 0, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[4], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm78920_a0_vna_4_6_1_0_psamp_mirror_on_drop_0_t_fget[BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { - bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_get, - bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_get, - bcmpkt_psamp_mirror_on_drop_0_t_length_get, - bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_get, - bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_get, - bcmpkt_psamp_mirror_on_drop_0_t_switch_id_get, - bcmpkt_psamp_mirror_on_drop_0_t_template_id_get, -}; - -bcmpkt_flex_field_set_f bcm78920_a0_vna_4_6_1_0_psamp_mirror_on_drop_0_t_fset[BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT] = { - bcmpkt_psamp_mirror_on_drop_0_t_egress_mod_port_set, - bcmpkt_psamp_mirror_on_drop_0_t_ingress_port_set, - bcmpkt_psamp_mirror_on_drop_0_t_length_set, - bcmpkt_psamp_mirror_on_drop_0_t_obs_time_ns_set, - bcmpkt_psamp_mirror_on_drop_0_t_obs_time_s_set, - bcmpkt_psamp_mirror_on_drop_0_t_switch_id_set, - bcmpkt_psamp_mirror_on_drop_0_t_template_id_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78920_a0_vna_4_6_1_0_psamp_mirror_on_drop_0_t_field_data[] = { - BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78920_a0_vna_4_6_1_0_psamp_mirror_on_drop_0_t_field_info = { - .num_fields = BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_0_T_FID_COUNT, - .info = bcm78920_a0_vna_4_6_1_0_psamp_mirror_on_drop_0_t_field_data, -}; - - -static int32_t bcmpkt_psamp_mirror_on_drop_1_t_drop_reason_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_1_t_drop_reason_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_1_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 6); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_1_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 6, val); - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_1_t_smod_state_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 22, 2); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_1_t_smod_state_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 22, 2, val); - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_1_t_uc_cos__color__prob_idx_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 24, 8); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_1_t_uc_cos__color__prob_idx_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 8); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 8, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm78920_a0_vna_4_6_1_0_psamp_mirror_on_drop_1_t_fget[BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT] = { - bcmpkt_psamp_mirror_on_drop_1_t_drop_reason_get, - bcmpkt_psamp_mirror_on_drop_1_t_reserved_0_get, - bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_get, - bcmpkt_psamp_mirror_on_drop_1_t_smod_state_get, - bcmpkt_psamp_mirror_on_drop_1_t_uc_cos__color__prob_idx_get, - bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_get, - bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_get, -}; - -bcmpkt_flex_field_set_f bcm78920_a0_vna_4_6_1_0_psamp_mirror_on_drop_1_t_fset[BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT] = { - bcmpkt_psamp_mirror_on_drop_1_t_drop_reason_set, - bcmpkt_psamp_mirror_on_drop_1_t_reserved_0_set, - bcmpkt_psamp_mirror_on_drop_1_t_sampled_length_set, - bcmpkt_psamp_mirror_on_drop_1_t_smod_state_set, - bcmpkt_psamp_mirror_on_drop_1_t_uc_cos__color__prob_idx_set, - bcmpkt_psamp_mirror_on_drop_1_t_user_meta_data_set, - bcmpkt_psamp_mirror_on_drop_1_t_var_len_indicator_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78920_a0_vna_4_6_1_0_psamp_mirror_on_drop_1_t_field_data[] = { - BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78920_a0_vna_4_6_1_0_psamp_mirror_on_drop_1_t_field_info = { - .num_fields = BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_1_T_FID_COUNT, - .info = bcm78920_a0_vna_4_6_1_0_psamp_mirror_on_drop_1_t_field_data, -}; - - -static int32_t bcmpkt_psamp_mirror_on_drop_2_t_egr_drop_reason_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_2_t_egr_drop_reason_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_2_t_ep_copy_session_index_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 24, 4); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_2_t_ep_copy_session_index_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 24, 4, val); - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_2_t_reserved_0_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 28, 4); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_2_t_reserved_0_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 28, 4, val); - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_2_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_2_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_2_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_2_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_2_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 8); - - return ret; -} - -static int32_t bcmpkt_psamp_mirror_on_drop_2_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 8, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm78920_a0_vna_4_6_1_0_psamp_mirror_on_drop_2_t_fget[BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT] = { - bcmpkt_psamp_mirror_on_drop_2_t_egr_drop_reason_get, - bcmpkt_psamp_mirror_on_drop_2_t_ep_copy_session_index_get, - bcmpkt_psamp_mirror_on_drop_2_t_reserved_0_get, - bcmpkt_psamp_mirror_on_drop_2_t_sampled_length_get, - bcmpkt_psamp_mirror_on_drop_2_t_user_meta_data_get, - bcmpkt_psamp_mirror_on_drop_2_t_var_len_indicator_get, -}; - -bcmpkt_flex_field_set_f bcm78920_a0_vna_4_6_1_0_psamp_mirror_on_drop_2_t_fset[BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT] = { - bcmpkt_psamp_mirror_on_drop_2_t_egr_drop_reason_set, - bcmpkt_psamp_mirror_on_drop_2_t_ep_copy_session_index_set, - bcmpkt_psamp_mirror_on_drop_2_t_reserved_0_set, - bcmpkt_psamp_mirror_on_drop_2_t_sampled_length_set, - bcmpkt_psamp_mirror_on_drop_2_t_user_meta_data_set, - bcmpkt_psamp_mirror_on_drop_2_t_var_len_indicator_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78920_a0_vna_4_6_1_0_psamp_mirror_on_drop_2_t_field_data[] = { - BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78920_a0_vna_4_6_1_0_psamp_mirror_on_drop_2_t_field_info = { - .num_fields = BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_MIRROR_ON_DROP_2_T_FID_COUNT, - .info = bcm78920_a0_vna_4_6_1_0_psamp_mirror_on_drop_2_t_field_data, -}; - - -static int32_t bcmpkt_psamp_postcard_0_t_egress_mod_port_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[3], 0, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_postcard_0_t_egress_mod_port_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[3], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_postcard_0_t_ingress_port_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[3], 16, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_postcard_0_t_ingress_port_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[3], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_postcard_0_t_obs_time_ns_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_postcard_0_t_obs_time_ns_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_postcard_0_t_obs_time_s_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_postcard_0_t_obs_time_s_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_postcard_0_t_psamp_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_postcard_0_t_psamp_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_postcard_0_t_template_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_postcard_0_t_template_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm78920_a0_vna_4_6_1_0_psamp_postcard_0_t_fget[BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_POSTCARD_0_T_FID_COUNT] = { - bcmpkt_psamp_postcard_0_t_egress_mod_port_get, - bcmpkt_psamp_postcard_0_t_ingress_port_get, - bcmpkt_psamp_postcard_0_t_obs_time_ns_get, - bcmpkt_psamp_postcard_0_t_obs_time_s_get, - bcmpkt_psamp_postcard_0_t_psamp_length_get, - bcmpkt_psamp_postcard_0_t_template_id_get, -}; - -bcmpkt_flex_field_set_f bcm78920_a0_vna_4_6_1_0_psamp_postcard_0_t_fset[BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_POSTCARD_0_T_FID_COUNT] = { - bcmpkt_psamp_postcard_0_t_egress_mod_port_set, - bcmpkt_psamp_postcard_0_t_ingress_port_set, - bcmpkt_psamp_postcard_0_t_obs_time_ns_set, - bcmpkt_psamp_postcard_0_t_obs_time_s_set, - bcmpkt_psamp_postcard_0_t_psamp_length_set, - bcmpkt_psamp_postcard_0_t_template_id_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78920_a0_vna_4_6_1_0_psamp_postcard_0_t_field_data[] = { - BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_POSTCARD_0_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78920_a0_vna_4_6_1_0_psamp_postcard_0_t_field_info = { - .num_fields = BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_POSTCARD_0_T_FID_COUNT, - .info = bcm78920_a0_vna_4_6_1_0_psamp_postcard_0_t_field_data, -}; - - -static int32_t bcmpkt_psamp_postcard_1_t_color_idx_cos_droploc_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_postcard_1_t_color_idx_cos_droploc_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_postcard_1_t_drop_reason_code_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 8, 8); - - return ret; -} - -static int32_t bcmpkt_psamp_postcard_1_t_drop_reason_code_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 8, 8, val); - return ret; -} - -static int32_t bcmpkt_psamp_postcard_1_t_mmu_stat_0_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_postcard_1_t_mmu_stat_0_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_postcard_1_t_mmu_stat_1_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_postcard_1_t_mmu_stat_1_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_postcard_1_t_queue_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 8); - - return ret; -} - -static int32_t bcmpkt_psamp_postcard_1_t_queue_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 8, val); - return ret; -} - -static int32_t bcmpkt_psamp_postcard_1_t_reserved_1_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[4], 24, 8); - - return ret; -} - -static int32_t bcmpkt_psamp_postcard_1_t_reserved_1_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[4], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_psamp_postcard_1_t_residence_time_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_postcard_1_t_residence_time_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_psamp_postcard_1_t_sampled_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[4], 0, 16); - - return ret; -} - -static int32_t bcmpkt_psamp_postcard_1_t_sampled_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[4], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_psamp_postcard_1_t_var_len_indicator_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[4], 16, 8); - - return ret; -} - -static int32_t bcmpkt_psamp_postcard_1_t_var_len_indicator_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[4], 16, 8, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm78920_a0_vna_4_6_1_0_psamp_postcard_1_t_fget[BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_POSTCARD_1_T_FID_COUNT] = { - bcmpkt_psamp_postcard_1_t_color_idx_cos_droploc_get, - bcmpkt_psamp_postcard_1_t_drop_reason_code_get, - bcmpkt_psamp_postcard_1_t_mmu_stat_0_get, - bcmpkt_psamp_postcard_1_t_mmu_stat_1_get, - bcmpkt_psamp_postcard_1_t_queue_id_get, - bcmpkt_psamp_postcard_1_t_reserved_1_get, - bcmpkt_psamp_postcard_1_t_residence_time_get, - bcmpkt_psamp_postcard_1_t_sampled_length_get, - bcmpkt_psamp_postcard_1_t_var_len_indicator_get, -}; - -bcmpkt_flex_field_set_f bcm78920_a0_vna_4_6_1_0_psamp_postcard_1_t_fset[BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_POSTCARD_1_T_FID_COUNT] = { - bcmpkt_psamp_postcard_1_t_color_idx_cos_droploc_set, - bcmpkt_psamp_postcard_1_t_drop_reason_code_set, - bcmpkt_psamp_postcard_1_t_mmu_stat_0_set, - bcmpkt_psamp_postcard_1_t_mmu_stat_1_set, - bcmpkt_psamp_postcard_1_t_queue_id_set, - bcmpkt_psamp_postcard_1_t_reserved_1_set, - bcmpkt_psamp_postcard_1_t_residence_time_set, - bcmpkt_psamp_postcard_1_t_sampled_length_set, - bcmpkt_psamp_postcard_1_t_var_len_indicator_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78920_a0_vna_4_6_1_0_psamp_postcard_1_t_field_data[] = { - BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_POSTCARD_1_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78920_a0_vna_4_6_1_0_psamp_postcard_1_t_field_info = { - .num_fields = BCM78920_A0_VNA_4_6_1_0_BCMPKT_PSAMP_POSTCARD_1_T_FID_COUNT, - .info = bcm78920_a0_vna_4_6_1_0_psamp_postcard_1_t_field_data, -}; - - -static int32_t bcmpkt_rarp_t_hardware_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 24, 8); - - return ret; -} - -static int32_t bcmpkt_rarp_t_hardware_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_rarp_t_hardware_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_rarp_t_hardware_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_rarp_t_operation_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 16); - - return ret; -} - -static int32_t bcmpkt_rarp_t_operation_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_rarp_t_prot_addr_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 8); - - return ret; -} - -static int32_t bcmpkt_rarp_t_prot_addr_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_rarp_t_protocol_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_rarp_t_protocol_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_rarp_t_sender_ha_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_rarp_t_sender_ha_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_rarp_t_sender_ip_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_rarp_t_sender_ip_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_rarp_t_target_ha_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_rarp_t_target_ha_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_rarp_t_target_ip_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_rarp_t_target_ip_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm78920_a0_vna_4_6_1_0_rarp_t_fget[BCM78920_A0_VNA_4_6_1_0_BCMPKT_RARP_T_FID_COUNT] = { - bcmpkt_rarp_t_hardware_len_get, - bcmpkt_rarp_t_hardware_type_get, - bcmpkt_rarp_t_operation_get, - bcmpkt_rarp_t_prot_addr_len_get, - bcmpkt_rarp_t_protocol_type_get, - bcmpkt_rarp_t_sender_ha_get, - bcmpkt_rarp_t_sender_ip_get, - bcmpkt_rarp_t_target_ha_get, - bcmpkt_rarp_t_target_ip_get, -}; - -bcmpkt_flex_field_set_f bcm78920_a0_vna_4_6_1_0_rarp_t_fset[BCM78920_A0_VNA_4_6_1_0_BCMPKT_RARP_T_FID_COUNT] = { - bcmpkt_rarp_t_hardware_len_set, - bcmpkt_rarp_t_hardware_type_set, - bcmpkt_rarp_t_operation_set, - bcmpkt_rarp_t_prot_addr_len_set, - bcmpkt_rarp_t_protocol_type_set, - bcmpkt_rarp_t_sender_ha_set, - bcmpkt_rarp_t_sender_ip_set, - bcmpkt_rarp_t_target_ha_set, - bcmpkt_rarp_t_target_ip_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78920_a0_vna_4_6_1_0_rarp_t_field_data[] = { - BCM78920_A0_VNA_4_6_1_0_BCMPKT_RARP_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78920_a0_vna_4_6_1_0_rarp_t_field_info = { - .num_fields = BCM78920_A0_VNA_4_6_1_0_BCMPKT_RARP_T_FID_COUNT, - .info = bcm78920_a0_vna_4_6_1_0_rarp_t_field_data, -}; - - -static int32_t bcmpkt_rocev2_aeth_t_msg_seq_num_lo_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_rocev2_aeth_t_msg_seq_num_lo_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_rocev2_aeth_t_syndrome_msg_seq_num_hi_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_rocev2_aeth_t_syndrome_msg_seq_num_hi_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm78920_a0_vna_4_6_1_0_rocev2_aeth_t_fget[BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROCEV2_AETH_T_FID_COUNT] = { - bcmpkt_rocev2_aeth_t_msg_seq_num_lo_get, - bcmpkt_rocev2_aeth_t_syndrome_msg_seq_num_hi_get, -}; - -bcmpkt_flex_field_set_f bcm78920_a0_vna_4_6_1_0_rocev2_aeth_t_fset[BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROCEV2_AETH_T_FID_COUNT] = { - bcmpkt_rocev2_aeth_t_msg_seq_num_lo_set, - bcmpkt_rocev2_aeth_t_syndrome_msg_seq_num_hi_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78920_a0_vna_4_6_1_0_rocev2_aeth_t_field_data[] = { - BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROCEV2_AETH_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78920_a0_vna_4_6_1_0_rocev2_aeth_t_field_info = { - .num_fields = BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROCEV2_AETH_T_FID_COUNT, - .info = bcm78920_a0_vna_4_6_1_0_rocev2_aeth_t_field_data, -}; - - -static int32_t bcmpkt_rocev2_bth_t_dst_qp_hi_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 8); - - return ret; -} - -static int32_t bcmpkt_rocev2_bth_t_dst_qp_hi_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_rocev2_bth_t_dst_qp_lo_a_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 8, 8); - - return ret; -} - -static int32_t bcmpkt_rocev2_bth_t_dst_qp_lo_a_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 8, 8, val); - return ret; -} - -static int32_t bcmpkt_rocev2_bth_t_dst_qp_lo_b_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 8); - - return ret; -} - -static int32_t bcmpkt_rocev2_bth_t_dst_qp_lo_b_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 8, val); - return ret; -} - -static int32_t bcmpkt_rocev2_bth_t_flags_ver_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_rocev2_bth_t_flags_ver_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_rocev2_bth_t_opcode_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_rocev2_bth_t_opcode_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_rocev2_bth_t_partition_key_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_rocev2_bth_t_partition_key_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_rocev2_bth_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 24, 8); - - return ret; -} - -static int32_t bcmpkt_rocev2_bth_t_reserved_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_rocev2_bth_t_reserved_seq_num_hi_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 16, 16); - - return ret; -} - -static int32_t bcmpkt_rocev2_bth_t_reserved_seq_num_hi_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_rocev2_bth_t_seq_num_lo_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 0, 16); - - return ret; -} - -static int32_t bcmpkt_rocev2_bth_t_seq_num_lo_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 0, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm78920_a0_vna_4_6_1_0_rocev2_bth_t_fget[BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROCEV2_BTH_T_FID_COUNT] = { - bcmpkt_rocev2_bth_t_dst_qp_hi_get, - bcmpkt_rocev2_bth_t_dst_qp_lo_a_get, - bcmpkt_rocev2_bth_t_dst_qp_lo_b_get, - bcmpkt_rocev2_bth_t_flags_ver_get, - bcmpkt_rocev2_bth_t_opcode_get, - bcmpkt_rocev2_bth_t_partition_key_get, - bcmpkt_rocev2_bth_t_reserved_get, - bcmpkt_rocev2_bth_t_reserved_seq_num_hi_get, - bcmpkt_rocev2_bth_t_seq_num_lo_get, -}; - -bcmpkt_flex_field_set_f bcm78920_a0_vna_4_6_1_0_rocev2_bth_t_fset[BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROCEV2_BTH_T_FID_COUNT] = { - bcmpkt_rocev2_bth_t_dst_qp_hi_set, - bcmpkt_rocev2_bth_t_dst_qp_lo_a_set, - bcmpkt_rocev2_bth_t_dst_qp_lo_b_set, - bcmpkt_rocev2_bth_t_flags_ver_set, - bcmpkt_rocev2_bth_t_opcode_set, - bcmpkt_rocev2_bth_t_partition_key_set, - bcmpkt_rocev2_bth_t_reserved_set, - bcmpkt_rocev2_bth_t_reserved_seq_num_hi_set, - bcmpkt_rocev2_bth_t_seq_num_lo_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78920_a0_vna_4_6_1_0_rocev2_bth_t_field_data[] = { - BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROCEV2_BTH_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78920_a0_vna_4_6_1_0_rocev2_bth_t_field_info = { - .num_fields = BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROCEV2_BTH_T_FID_COUNT, - .info = bcm78920_a0_vna_4_6_1_0_rocev2_bth_t_field_data, -}; - - -static int32_t bcmpkt_rocev2_deth_t_queue_key_hi_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_rocev2_deth_t_queue_key_hi_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_rocev2_deth_t_queue_key_lo_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_rocev2_deth_t_queue_key_lo_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_rocev2_deth_t_reserved_src_qp_hi_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 16); - - return ret; -} - -static int32_t bcmpkt_rocev2_deth_t_reserved_src_qp_hi_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_rocev2_deth_t_src_qp_lo_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 16); - - return ret; -} - -static int32_t bcmpkt_rocev2_deth_t_src_qp_lo_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm78920_a0_vna_4_6_1_0_rocev2_deth_t_fget[BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROCEV2_DETH_T_FID_COUNT] = { - bcmpkt_rocev2_deth_t_queue_key_hi_get, - bcmpkt_rocev2_deth_t_queue_key_lo_get, - bcmpkt_rocev2_deth_t_reserved_src_qp_hi_get, - bcmpkt_rocev2_deth_t_src_qp_lo_get, -}; - -bcmpkt_flex_field_set_f bcm78920_a0_vna_4_6_1_0_rocev2_deth_t_fset[BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROCEV2_DETH_T_FID_COUNT] = { - bcmpkt_rocev2_deth_t_queue_key_hi_set, - bcmpkt_rocev2_deth_t_queue_key_lo_set, - bcmpkt_rocev2_deth_t_reserved_src_qp_hi_set, - bcmpkt_rocev2_deth_t_src_qp_lo_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78920_a0_vna_4_6_1_0_rocev2_deth_t_field_data[] = { - BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROCEV2_DETH_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78920_a0_vna_4_6_1_0_rocev2_deth_t_field_info = { - .num_fields = BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROCEV2_DETH_T_FID_COUNT, - .info = bcm78920_a0_vna_4_6_1_0_rocev2_deth_t_field_data, -}; - - -static int32_t bcmpkt_rocev2_reth_t_dma_length_hi_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[3], 16, 16); - - return ret; -} - -static int32_t bcmpkt_rocev2_reth_t_dma_length_hi_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[3], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_rocev2_reth_t_dma_length_lo_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[3], 0, 16); - - return ret; -} - -static int32_t bcmpkt_rocev2_reth_t_dma_length_lo_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[3], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_rocev2_reth_t_remote_key_hi_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 16, 16); - - return ret; -} - -static int32_t bcmpkt_rocev2_reth_t_remote_key_hi_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_rocev2_reth_t_remote_key_lo_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 0, 16); - - return ret; -} - -static int32_t bcmpkt_rocev2_reth_t_remote_key_lo_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_rocev2_reth_t_virtual_address_hi_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_rocev2_reth_t_virtual_address_hi_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_rocev2_reth_t_virtual_address_lo_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_rocev2_reth_t_virtual_address_lo_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm78920_a0_vna_4_6_1_0_rocev2_reth_t_fget[BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROCEV2_RETH_T_FID_COUNT] = { - bcmpkt_rocev2_reth_t_dma_length_hi_get, - bcmpkt_rocev2_reth_t_dma_length_lo_get, - bcmpkt_rocev2_reth_t_remote_key_hi_get, - bcmpkt_rocev2_reth_t_remote_key_lo_get, - bcmpkt_rocev2_reth_t_virtual_address_hi_get, - bcmpkt_rocev2_reth_t_virtual_address_lo_get, -}; - -bcmpkt_flex_field_set_f bcm78920_a0_vna_4_6_1_0_rocev2_reth_t_fset[BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROCEV2_RETH_T_FID_COUNT] = { - bcmpkt_rocev2_reth_t_dma_length_hi_set, - bcmpkt_rocev2_reth_t_dma_length_lo_set, - bcmpkt_rocev2_reth_t_remote_key_hi_set, - bcmpkt_rocev2_reth_t_remote_key_lo_set, - bcmpkt_rocev2_reth_t_virtual_address_hi_set, - bcmpkt_rocev2_reth_t_virtual_address_lo_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78920_a0_vna_4_6_1_0_rocev2_reth_t_field_data[] = { - BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROCEV2_RETH_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78920_a0_vna_4_6_1_0_rocev2_reth_t_field_info = { - .num_fields = BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROCEV2_RETH_T_FID_COUNT, - .info = bcm78920_a0_vna_4_6_1_0_rocev2_reth_t_field_data, -}; - - -static int32_t bcmpkt_routing_t_data_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_routing_t_data_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_routing_t_hdr_ext_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_routing_t_hdr_ext_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_routing_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_routing_t_next_header_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_routing_t_routing_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 8, 8); - - return ret; -} - -static int32_t bcmpkt_routing_t_routing_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 8, 8, val); - return ret; -} - -static int32_t bcmpkt_routing_t_segments_left_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 8); - - return ret; -} - -static int32_t bcmpkt_routing_t_segments_left_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 8, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm78920_a0_vna_4_6_1_0_routing_t_fget[BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROUTING_T_FID_COUNT] = { - bcmpkt_routing_t_data_get, - bcmpkt_routing_t_hdr_ext_len_get, - bcmpkt_routing_t_next_header_get, - bcmpkt_routing_t_routing_type_get, - bcmpkt_routing_t_segments_left_get, -}; - -bcmpkt_flex_field_set_f bcm78920_a0_vna_4_6_1_0_routing_t_fset[BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROUTING_T_FID_COUNT] = { - bcmpkt_routing_t_data_set, - bcmpkt_routing_t_hdr_ext_len_set, - bcmpkt_routing_t_next_header_set, - bcmpkt_routing_t_routing_type_set, - bcmpkt_routing_t_segments_left_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78920_a0_vna_4_6_1_0_routing_t_field_data[] = { - BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROUTING_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78920_a0_vna_4_6_1_0_routing_t_field_info = { - .num_fields = BCM78920_A0_VNA_4_6_1_0_BCMPKT_ROUTING_T_FID_COUNT, - .info = bcm78920_a0_vna_4_6_1_0_routing_t_field_data, -}; - - -static int32_t bcmpkt_rspan_t_tag_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_rspan_t_tag_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_rspan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_rspan_t_tpid_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm78920_a0_vna_4_6_1_0_rspan_t_fget[BCM78920_A0_VNA_4_6_1_0_BCMPKT_RSPAN_T_FID_COUNT] = { - bcmpkt_rspan_t_tag_get, - bcmpkt_rspan_t_tpid_get, -}; - -bcmpkt_flex_field_set_f bcm78920_a0_vna_4_6_1_0_rspan_t_fset[BCM78920_A0_VNA_4_6_1_0_BCMPKT_RSPAN_T_FID_COUNT] = { - bcmpkt_rspan_t_tag_set, - bcmpkt_rspan_t_tpid_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78920_a0_vna_4_6_1_0_rspan_t_field_data[] = { - BCM78920_A0_VNA_4_6_1_0_BCMPKT_RSPAN_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78920_a0_vna_4_6_1_0_rspan_t_field_info = { - .num_fields = BCM78920_A0_VNA_4_6_1_0_BCMPKT_RSPAN_T_FID_COUNT, - .info = bcm78920_a0_vna_4_6_1_0_rspan_t_field_data, -}; - - -static int32_t bcmpkt_sflow_shim_0_t_sys_destination_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 16); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_0_t_sys_destination_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_sflow_shim_0_t_sys_source_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 16); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_0_t_sys_source_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_sflow_shim_0_t_version_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_sflow_shim_0_t_version_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm78920_a0_vna_4_6_1_0_sflow_shim_0_t_fget[BCM78920_A0_VNA_4_6_1_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { - bcmpkt_sflow_shim_0_t_sys_destination_get, - bcmpkt_sflow_shim_0_t_sys_source_get, - bcmpkt_sflow_shim_0_t_version_get, -}; - -bcmpkt_flex_field_set_f bcm78920_a0_vna_4_6_1_0_sflow_shim_0_t_fset[BCM78920_A0_VNA_4_6_1_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT] = { - bcmpkt_sflow_shim_0_t_sys_destination_set, - bcmpkt_sflow_shim_0_t_sys_source_set, - bcmpkt_sflow_shim_0_t_version_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78920_a0_vna_4_6_1_0_sflow_shim_0_t_field_data[] = { - BCM78920_A0_VNA_4_6_1_0_BCMPKT_SFLOW_SHIM_0_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78920_a0_vna_4_6_1_0_sflow_shim_0_t_field_info = { - .num_fields = BCM78920_A0_VNA_4_6_1_0_BCMPKT_SFLOW_SHIM_0_T_FID_COUNT, - .info = bcm78920_a0_vna_4_6_1_0_sflow_shim_0_t_field_data, -}; - - -static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 30, 1); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_dest_sample_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 30, 1, val); - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 27, 1); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_discarded_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 27, 1, val); - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 29, 1); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_flex_sample_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 29, 1, val); - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 28, 1); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_mcast_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 28, 1, val); - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 31, 1); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_src_sample_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 31, 1, val); - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 26, 1); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_flag_truncated_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 26, 1, val); - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 7); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_reserved_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 7, val); - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 23, 3); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_1_t_sys_opcode_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 23, 3, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm78920_a0_vna_4_6_1_0_sflow_shim_1_t_fget[BCM78920_A0_VNA_4_6_1_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { - bcmpkt_sflow_shim_1_t_flag_dest_sample_get, - bcmpkt_sflow_shim_1_t_flag_discarded_get, - bcmpkt_sflow_shim_1_t_flag_flex_sample_get, - bcmpkt_sflow_shim_1_t_flag_mcast_get, - bcmpkt_sflow_shim_1_t_flag_src_sample_get, - bcmpkt_sflow_shim_1_t_flag_truncated_get, - bcmpkt_sflow_shim_1_t_reserved_get, - bcmpkt_sflow_shim_1_t_sys_opcode_get, -}; - -bcmpkt_flex_field_set_f bcm78920_a0_vna_4_6_1_0_sflow_shim_1_t_fset[BCM78920_A0_VNA_4_6_1_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT] = { - bcmpkt_sflow_shim_1_t_flag_dest_sample_set, - bcmpkt_sflow_shim_1_t_flag_discarded_set, - bcmpkt_sflow_shim_1_t_flag_flex_sample_set, - bcmpkt_sflow_shim_1_t_flag_mcast_set, - bcmpkt_sflow_shim_1_t_flag_src_sample_set, - bcmpkt_sflow_shim_1_t_flag_truncated_set, - bcmpkt_sflow_shim_1_t_reserved_set, - bcmpkt_sflow_shim_1_t_sys_opcode_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78920_a0_vna_4_6_1_0_sflow_shim_1_t_field_data[] = { - BCM78920_A0_VNA_4_6_1_0_BCMPKT_SFLOW_SHIM_1_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78920_a0_vna_4_6_1_0_sflow_shim_1_t_field_info = { - .num_fields = BCM78920_A0_VNA_4_6_1_0_BCMPKT_SFLOW_SHIM_1_T_FID_COUNT, - .info = bcm78920_a0_vna_4_6_1_0_sflow_shim_1_t_field_data, -}; - - -static int32_t bcmpkt_sflow_shim_2_t_sequence_num_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_sflow_shim_2_t_sequence_num_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_sflow_shim_2_t_user_meta_data_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm78920_a0_vna_4_6_1_0_sflow_shim_2_t_fget[BCM78920_A0_VNA_4_6_1_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { - bcmpkt_sflow_shim_2_t_sequence_num_get, - bcmpkt_sflow_shim_2_t_user_meta_data_get, -}; - -bcmpkt_flex_field_set_f bcm78920_a0_vna_4_6_1_0_sflow_shim_2_t_fset[BCM78920_A0_VNA_4_6_1_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT] = { - bcmpkt_sflow_shim_2_t_sequence_num_set, - bcmpkt_sflow_shim_2_t_user_meta_data_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78920_a0_vna_4_6_1_0_sflow_shim_2_t_field_data[] = { - BCM78920_A0_VNA_4_6_1_0_BCMPKT_SFLOW_SHIM_2_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78920_a0_vna_4_6_1_0_sflow_shim_2_t_field_info = { - .num_fields = BCM78920_A0_VNA_4_6_1_0_BCMPKT_SFLOW_SHIM_2_T_FID_COUNT, - .info = bcm78920_a0_vna_4_6_1_0_sflow_shim_2_t_field_data, -}; - - -static int32_t bcmpkt_snap_llc_t_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_snap_llc_t_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_snap_llc_t_snap_llc_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_snap_llc_t_snap_llc_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm78920_a0_vna_4_6_1_0_snap_llc_t_fget[BCM78920_A0_VNA_4_6_1_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = { - bcmpkt_snap_llc_t_length_get, - bcmpkt_snap_llc_t_snap_llc_get, -}; - -bcmpkt_flex_field_set_f bcm78920_a0_vna_4_6_1_0_snap_llc_t_fset[BCM78920_A0_VNA_4_6_1_0_BCMPKT_SNAP_LLC_T_FID_COUNT] = { - bcmpkt_snap_llc_t_length_set, - bcmpkt_snap_llc_t_snap_llc_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78920_a0_vna_4_6_1_0_snap_llc_t_field_data[] = { - BCM78920_A0_VNA_4_6_1_0_BCMPKT_SNAP_LLC_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78920_a0_vna_4_6_1_0_snap_llc_t_field_info = { - .num_fields = BCM78920_A0_VNA_4_6_1_0_BCMPKT_SNAP_LLC_T_FID_COUNT, - .info = bcm78920_a0_vna_4_6_1_0_snap_llc_t_field_data, -}; - - -static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_tcp_first_4bytes_t_dst_port_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_tcp_first_4bytes_t_src_port_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_tcp_first_4bytes_t_src_port_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm78920_a0_vna_4_6_1_0_tcp_first_4bytes_t_fget[BCM78920_A0_VNA_4_6_1_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { - bcmpkt_tcp_first_4bytes_t_dst_port_get, - bcmpkt_tcp_first_4bytes_t_src_port_get, -}; - -bcmpkt_flex_field_set_f bcm78920_a0_vna_4_6_1_0_tcp_first_4bytes_t_fset[BCM78920_A0_VNA_4_6_1_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT] = { - bcmpkt_tcp_first_4bytes_t_dst_port_set, - bcmpkt_tcp_first_4bytes_t_src_port_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78920_a0_vna_4_6_1_0_tcp_first_4bytes_t_field_data[] = { - BCM78920_A0_VNA_4_6_1_0_BCMPKT_TCP_FIRST_4BYTES_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78920_a0_vna_4_6_1_0_tcp_first_4bytes_t_field_info = { - .num_fields = BCM78920_A0_VNA_4_6_1_0_BCMPKT_TCP_FIRST_4BYTES_T_FID_COUNT, - .info = bcm78920_a0_vna_4_6_1_0_tcp_first_4bytes_t_field_data, -}; - - -static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_ack_num_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[3], 16, 16); - - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_checksum_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[3], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 16, 16); - - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[3], 0, 16); - - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_urgent_ptr_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[3], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_win_size_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 0, 16); - - return ret; -} - -static int32_t bcmpkt_tcp_last_16bytes_t_win_size_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 0, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm78920_a0_vna_4_6_1_0_tcp_last_16bytes_t_fget[BCM78920_A0_VNA_4_6_1_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { - bcmpkt_tcp_last_16bytes_t_ack_num_get, - bcmpkt_tcp_last_16bytes_t_checksum_get, - bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_get, - bcmpkt_tcp_last_16bytes_t_seq_num_get, - bcmpkt_tcp_last_16bytes_t_urgent_ptr_get, - bcmpkt_tcp_last_16bytes_t_win_size_get, -}; - -bcmpkt_flex_field_set_f bcm78920_a0_vna_4_6_1_0_tcp_last_16bytes_t_fset[BCM78920_A0_VNA_4_6_1_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT] = { - bcmpkt_tcp_last_16bytes_t_ack_num_set, - bcmpkt_tcp_last_16bytes_t_checksum_set, - bcmpkt_tcp_last_16bytes_t_hdr_len_and_flags_set, - bcmpkt_tcp_last_16bytes_t_seq_num_set, - bcmpkt_tcp_last_16bytes_t_urgent_ptr_set, - bcmpkt_tcp_last_16bytes_t_win_size_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78920_a0_vna_4_6_1_0_tcp_last_16bytes_t_field_data[] = { - BCM78920_A0_VNA_4_6_1_0_BCMPKT_TCP_LAST_16BYTES_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78920_a0_vna_4_6_1_0_tcp_last_16bytes_t_field_info = { - .num_fields = BCM78920_A0_VNA_4_6_1_0_BCMPKT_TCP_LAST_16BYTES_T_FID_COUNT, - .info = bcm78920_a0_vna_4_6_1_0_tcp_last_16bytes_t_field_data, -}; - - -static int32_t bcmpkt_udp_t_checksum_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 16); - - return ret; -} - -static int32_t bcmpkt_udp_t_checksum_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_udp_t_dst_port_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_udp_t_dst_port_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_udp_t_src_port_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_udp_t_src_port_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_udp_t_udp_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 16); - - return ret; -} - -static int32_t bcmpkt_udp_t_udp_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm78920_a0_vna_4_6_1_0_udp_t_fget[BCM78920_A0_VNA_4_6_1_0_BCMPKT_UDP_T_FID_COUNT] = { - bcmpkt_udp_t_checksum_get, - bcmpkt_udp_t_dst_port_get, - bcmpkt_udp_t_src_port_get, - bcmpkt_udp_t_udp_length_get, -}; - -bcmpkt_flex_field_set_f bcm78920_a0_vna_4_6_1_0_udp_t_fset[BCM78920_A0_VNA_4_6_1_0_BCMPKT_UDP_T_FID_COUNT] = { - bcmpkt_udp_t_checksum_set, - bcmpkt_udp_t_dst_port_set, - bcmpkt_udp_t_src_port_set, - bcmpkt_udp_t_udp_length_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78920_a0_vna_4_6_1_0_udp_t_field_data[] = { - BCM78920_A0_VNA_4_6_1_0_BCMPKT_UDP_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78920_a0_vna_4_6_1_0_udp_t_field_info = { - .num_fields = BCM78920_A0_VNA_4_6_1_0_BCMPKT_UDP_T_FID_COUNT, - .info = bcm78920_a0_vna_4_6_1_0_udp_t_field_data, -}; - - -static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm78920_a0_vna_4_6_1_0_unknown_l3_t_fget[BCM78920_A0_VNA_4_6_1_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { - bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_get, - bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_get, -}; - -bcmpkt_flex_field_set_f bcm78920_a0_vna_4_6_1_0_unknown_l3_t_fset[BCM78920_A0_VNA_4_6_1_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT] = { - bcmpkt_unknown_l3_t_first_16bytes_of_l3_payload_set, - bcmpkt_unknown_l3_t_next_16bytes_of_l3_payload_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78920_a0_vna_4_6_1_0_unknown_l3_t_field_data[] = { - BCM78920_A0_VNA_4_6_1_0_BCMPKT_UNKNOWN_L3_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78920_a0_vna_4_6_1_0_unknown_l3_t_field_info = { - .num_fields = BCM78920_A0_VNA_4_6_1_0_BCMPKT_UNKNOWN_L3_T_FID_COUNT, - .info = bcm78920_a0_vna_4_6_1_0_unknown_l3_t_field_data, -}; - - -static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm78920_a0_vna_4_6_1_0_unknown_l4_t_fget[BCM78920_A0_VNA_4_6_1_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { - bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_get, -}; - -bcmpkt_flex_field_set_f bcm78920_a0_vna_4_6_1_0_unknown_l4_t_fset[BCM78920_A0_VNA_4_6_1_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT] = { - bcmpkt_unknown_l4_t_first_4bytes_of_l4_payload_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78920_a0_vna_4_6_1_0_unknown_l4_t_field_data[] = { - BCM78920_A0_VNA_4_6_1_0_BCMPKT_UNKNOWN_L4_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78920_a0_vna_4_6_1_0_unknown_l4_t_field_info = { - .num_fields = BCM78920_A0_VNA_4_6_1_0_BCMPKT_UNKNOWN_L4_T_FID_COUNT, - .info = bcm78920_a0_vna_4_6_1_0_unknown_l4_t_field_data, -}; - - -static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_unknown_l5_t_l5_bytes_0_1_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_unknown_l5_t_l5_bytes_2_3_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_unknown_l5_t_l5_bytes_4_7_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_unknown_l5_t_l5_bytes_8_9_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 16, 16); - - return ret; -} - -static int32_t bcmpkt_unknown_l5_t_l5_bytes_8_9_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm78920_a0_vna_4_6_1_0_unknown_l5_t_fget[BCM78920_A0_VNA_4_6_1_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { - bcmpkt_unknown_l5_t_l5_bytes_0_1_get, - bcmpkt_unknown_l5_t_l5_bytes_2_3_get, - bcmpkt_unknown_l5_t_l5_bytes_4_7_get, - bcmpkt_unknown_l5_t_l5_bytes_8_9_get, -}; - -bcmpkt_flex_field_set_f bcm78920_a0_vna_4_6_1_0_unknown_l5_t_fset[BCM78920_A0_VNA_4_6_1_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT] = { - bcmpkt_unknown_l5_t_l5_bytes_0_1_set, - bcmpkt_unknown_l5_t_l5_bytes_2_3_set, - bcmpkt_unknown_l5_t_l5_bytes_4_7_set, - bcmpkt_unknown_l5_t_l5_bytes_8_9_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78920_a0_vna_4_6_1_0_unknown_l5_t_field_data[] = { - BCM78920_A0_VNA_4_6_1_0_BCMPKT_UNKNOWN_L5_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78920_a0_vna_4_6_1_0_unknown_l5_t_field_info = { - .num_fields = BCM78920_A0_VNA_4_6_1_0_BCMPKT_UNKNOWN_L5_T_FID_COUNT, - .info = bcm78920_a0_vna_4_6_1_0_unknown_l5_t_field_data, -}; - - -static int32_t bcmpkt_vlan_t_cfi_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 12, 1); - - return ret; -} - -static int32_t bcmpkt_vlan_t_cfi_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 12, 1, val); - return ret; -} - -static int32_t bcmpkt_vlan_t_pcp_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 13, 3); - - return ret; -} - -static int32_t bcmpkt_vlan_t_pcp_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 13, 3, val); - return ret; -} - -static int32_t bcmpkt_vlan_t_tpid_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_vlan_t_tpid_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_vlan_t_vid_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 12); - - return ret; -} - -static int32_t bcmpkt_vlan_t_vid_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 12, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm78920_a0_vna_4_6_1_0_vlan_t_fget[BCM78920_A0_VNA_4_6_1_0_BCMPKT_VLAN_T_FID_COUNT] = { - bcmpkt_vlan_t_cfi_get, - bcmpkt_vlan_t_pcp_get, - bcmpkt_vlan_t_tpid_get, - bcmpkt_vlan_t_vid_get, -}; - -bcmpkt_flex_field_set_f bcm78920_a0_vna_4_6_1_0_vlan_t_fset[BCM78920_A0_VNA_4_6_1_0_BCMPKT_VLAN_T_FID_COUNT] = { - bcmpkt_vlan_t_cfi_set, - bcmpkt_vlan_t_pcp_set, - bcmpkt_vlan_t_tpid_set, - bcmpkt_vlan_t_vid_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78920_a0_vna_4_6_1_0_vlan_t_field_data[] = { - BCM78920_A0_VNA_4_6_1_0_BCMPKT_VLAN_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78920_a0_vna_4_6_1_0_vlan_t_field_info = { - .num_fields = BCM78920_A0_VNA_4_6_1_0_BCMPKT_VLAN_T_FID_COUNT, - .info = bcm78920_a0_vna_4_6_1_0_vlan_t_field_data, -}; - - -static int32_t bcmpkt_vpp_rx_md_header_t_ar_group_tos_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[3], 16, 16); - - return ret; -} - -static int32_t bcmpkt_vpp_rx_md_header_t_ar_group_tos_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[3], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_vpp_rx_md_header_t_cpu_opcode_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_vpp_rx_md_header_t_cpu_opcode_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_vpp_rx_md_header_t_drop_code_matched_dst_src_port_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_vpp_rx_md_header_t_drop_code_matched_dst_src_port_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_vpp_rx_md_header_t_ethertype_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 16); - - return ret; -} - -static int32_t bcmpkt_vpp_rx_md_header_t_ethertype_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_vpp_rx_md_header_t_fwd_vlan_sw_copy_reason_queue_num_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[4], 16, 16); - - return ret; -} - -static int32_t bcmpkt_vpp_rx_md_header_t_fwd_vlan_sw_copy_reason_queue_num_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[4], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_vpp_rx_md_header_t_input_pri_qbus_int_cn_cng_mod_data_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[4], 0, 16); - - return ret; -} - -static int32_t bcmpkt_vpp_rx_md_header_t_input_pri_qbus_int_cn_cng_mod_data_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[4], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_vpp_rx_md_header_t_misc_data_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[5], 0, 16); - - return ret; -} - -static int32_t bcmpkt_vpp_rx_md_header_t_misc_data_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[5], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_vpp_rx_md_header_t_mod_data_instr_action_reserved_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[5], 16, 16); - - return ret; -} - -static int32_t bcmpkt_vpp_rx_md_header_t_mod_data_instr_action_reserved_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[5], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_vpp_rx_md_header_t_nonsw_copy_bitmap_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 0, 16); - - return ret; -} - -static int32_t bcmpkt_vpp_rx_md_header_t_nonsw_copy_bitmap_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_vpp_rx_md_header_t_reserved_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_vpp_rx_md_header_t_reserved_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_vpp_rx_md_header_t_sw_copy_queue_dst_port_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[3], 0, 16); - - return ret; -} - -static int32_t bcmpkt_vpp_rx_md_header_t_sw_copy_queue_dst_port_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[3], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_vpp_rx_md_header_t_timestamp_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_vpp_rx_md_header_t_timestamp_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_vpp_rx_md_header_t_truncated_full_pkt_length_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 16, 16); - - return ret; -} - -static int32_t bcmpkt_vpp_rx_md_header_t_truncated_full_pkt_length_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm78920_a0_vna_4_6_1_0_vpp_rx_md_header_t_fget[BCM78920_A0_VNA_4_6_1_0_BCMPKT_VPP_RX_MD_HEADER_T_FID_COUNT] = { - bcmpkt_vpp_rx_md_header_t_ar_group_tos_get, - bcmpkt_vpp_rx_md_header_t_cpu_opcode_get, - bcmpkt_vpp_rx_md_header_t_drop_code_matched_dst_src_port_get, - bcmpkt_vpp_rx_md_header_t_ethertype_get, - bcmpkt_vpp_rx_md_header_t_fwd_vlan_sw_copy_reason_queue_num_get, - bcmpkt_vpp_rx_md_header_t_input_pri_qbus_int_cn_cng_mod_data_get, - bcmpkt_vpp_rx_md_header_t_misc_data_get, - bcmpkt_vpp_rx_md_header_t_mod_data_instr_action_reserved_get, - bcmpkt_vpp_rx_md_header_t_nonsw_copy_bitmap_get, - bcmpkt_vpp_rx_md_header_t_reserved_get, - bcmpkt_vpp_rx_md_header_t_sw_copy_queue_dst_port_get, - bcmpkt_vpp_rx_md_header_t_timestamp_get, - bcmpkt_vpp_rx_md_header_t_truncated_full_pkt_length_get, -}; - -bcmpkt_flex_field_set_f bcm78920_a0_vna_4_6_1_0_vpp_rx_md_header_t_fset[BCM78920_A0_VNA_4_6_1_0_BCMPKT_VPP_RX_MD_HEADER_T_FID_COUNT] = { - bcmpkt_vpp_rx_md_header_t_ar_group_tos_set, - bcmpkt_vpp_rx_md_header_t_cpu_opcode_set, - bcmpkt_vpp_rx_md_header_t_drop_code_matched_dst_src_port_set, - bcmpkt_vpp_rx_md_header_t_ethertype_set, - bcmpkt_vpp_rx_md_header_t_fwd_vlan_sw_copy_reason_queue_num_set, - bcmpkt_vpp_rx_md_header_t_input_pri_qbus_int_cn_cng_mod_data_set, - bcmpkt_vpp_rx_md_header_t_misc_data_set, - bcmpkt_vpp_rx_md_header_t_mod_data_instr_action_reserved_set, - bcmpkt_vpp_rx_md_header_t_nonsw_copy_bitmap_set, - bcmpkt_vpp_rx_md_header_t_reserved_set, - bcmpkt_vpp_rx_md_header_t_sw_copy_queue_dst_port_set, - bcmpkt_vpp_rx_md_header_t_timestamp_set, - bcmpkt_vpp_rx_md_header_t_truncated_full_pkt_length_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78920_a0_vna_4_6_1_0_vpp_rx_md_header_t_field_data[] = { - BCM78920_A0_VNA_4_6_1_0_BCMPKT_VPP_RX_MD_HEADER_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78920_a0_vna_4_6_1_0_vpp_rx_md_header_t_field_info = { - .num_fields = BCM78920_A0_VNA_4_6_1_0_BCMPKT_VPP_RX_MD_HEADER_T_FID_COUNT, - .info = bcm78920_a0_vna_4_6_1_0_vpp_rx_md_header_t_field_data, -}; - - -static int32_t bcmpkt_vpp_tx_md_header_t_destination_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 0, 12); - - return ret; -} - -static int32_t bcmpkt_vpp_tx_md_header_t_destination_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 0, 12, val); - return ret; -} - -static int32_t bcmpkt_vpp_tx_md_header_t_destination_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 12, 4); - - return ret; -} - -static int32_t bcmpkt_vpp_tx_md_header_t_destination_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 12, 4, val); - return ret; -} - -static int32_t bcmpkt_vpp_tx_md_header_t_fwd_vlan_profile_lpp_class_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[3], 16, 16); - - return ret; -} - -static int32_t bcmpkt_vpp_tx_md_header_t_fwd_vlan_profile_lpp_class_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[3], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_vpp_tx_md_header_t_inc_ctrl_info_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[3], 0, 16); - - return ret; -} - -static int32_t bcmpkt_vpp_tx_md_header_t_inc_ctrl_info_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[3], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_vpp_tx_md_header_t_my_station_hit_vrf_queue_num_valid_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 4); - - return ret; -} - -static int32_t bcmpkt_vpp_tx_md_header_t_my_station_hit_vrf_queue_num_valid_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 4, val); - return ret; -} - -static int32_t bcmpkt_vpp_tx_md_header_t_packet_entropy_int_cn_cng_int_pri_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 16); - - return ret; -} - -static int32_t bcmpkt_vpp_tx_md_header_t_packet_entropy_int_cn_cng_int_pri_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_vpp_tx_md_header_t_pkt_ctrl_profile_rx_pp_port_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 16, 16); - - return ret; -} - -static int32_t bcmpkt_vpp_tx_md_header_t_pkt_ctrl_profile_rx_pp_port_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 16, 16, val); - return ret; -} - -static int32_t bcmpkt_vpp_tx_md_header_t_qos_input_pri_rsvd_qnum_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 16); - - return ret; -} - -static int32_t bcmpkt_vpp_tx_md_header_t_qos_input_pri_rsvd_qnum_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 16, val); - return ret; -} - -static int32_t bcmpkt_vpp_tx_md_header_t_start_header_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_vpp_tx_md_header_t_start_header_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_vpp_tx_md_header_t_vpp_copy_type_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 20, 4); - - return ret; -} - -static int32_t bcmpkt_vpp_tx_md_header_t_vpp_copy_type_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 20, 4, val); - return ret; -} - -static int32_t bcmpkt_vpp_tx_md_header_t_vrf_ar_group_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[2], 16, 16); - - return ret; -} - -static int32_t bcmpkt_vpp_tx_md_header_t_vrf_ar_group_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[2], 16, 16, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm78920_a0_vna_4_6_1_0_vpp_tx_md_header_t_fget[BCM78920_A0_VNA_4_6_1_0_BCMPKT_VPP_TX_MD_HEADER_T_FID_COUNT] = { - bcmpkt_vpp_tx_md_header_t_destination_get, - bcmpkt_vpp_tx_md_header_t_destination_type_get, - bcmpkt_vpp_tx_md_header_t_fwd_vlan_profile_lpp_class_id_get, - bcmpkt_vpp_tx_md_header_t_inc_ctrl_info_get, - bcmpkt_vpp_tx_md_header_t_my_station_hit_vrf_queue_num_valid_get, - bcmpkt_vpp_tx_md_header_t_packet_entropy_int_cn_cng_int_pri_get, - bcmpkt_vpp_tx_md_header_t_pkt_ctrl_profile_rx_pp_port_get, - bcmpkt_vpp_tx_md_header_t_qos_input_pri_rsvd_qnum_get, - bcmpkt_vpp_tx_md_header_t_start_header_type_get, - bcmpkt_vpp_tx_md_header_t_vpp_copy_type_get, - bcmpkt_vpp_tx_md_header_t_vrf_ar_group_get, -}; - -bcmpkt_flex_field_set_f bcm78920_a0_vna_4_6_1_0_vpp_tx_md_header_t_fset[BCM78920_A0_VNA_4_6_1_0_BCMPKT_VPP_TX_MD_HEADER_T_FID_COUNT] = { - bcmpkt_vpp_tx_md_header_t_destination_set, - bcmpkt_vpp_tx_md_header_t_destination_type_set, - bcmpkt_vpp_tx_md_header_t_fwd_vlan_profile_lpp_class_id_set, - bcmpkt_vpp_tx_md_header_t_inc_ctrl_info_set, - bcmpkt_vpp_tx_md_header_t_my_station_hit_vrf_queue_num_valid_set, - bcmpkt_vpp_tx_md_header_t_packet_entropy_int_cn_cng_int_pri_set, - bcmpkt_vpp_tx_md_header_t_pkt_ctrl_profile_rx_pp_port_set, - bcmpkt_vpp_tx_md_header_t_qos_input_pri_rsvd_qnum_set, - bcmpkt_vpp_tx_md_header_t_start_header_type_set, - bcmpkt_vpp_tx_md_header_t_vpp_copy_type_set, - bcmpkt_vpp_tx_md_header_t_vrf_ar_group_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78920_a0_vna_4_6_1_0_vpp_tx_md_header_t_field_data[] = { - BCM78920_A0_VNA_4_6_1_0_BCMPKT_VPP_TX_MD_HEADER_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78920_a0_vna_4_6_1_0_vpp_tx_md_header_t_field_info = { - .num_fields = BCM78920_A0_VNA_4_6_1_0_BCMPKT_VPP_TX_MD_HEADER_T_FID_COUNT, - .info = bcm78920_a0_vna_4_6_1_0_vpp_tx_md_header_t_field_data, -}; - - -static int32_t bcmpkt_vxlan_t_flags_reserved_1_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_vxlan_t_flags_reserved_1_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_vxlan_t_reserved2_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 0, 8); - - return ret; -} - -static int32_t bcmpkt_vxlan_t_reserved2_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 0, 8, val); - return ret; -} - -static int32_t bcmpkt_vxlan_t_vn_id_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[1], 8, 24); - - return ret; -} - -static int32_t bcmpkt_vxlan_t_vn_id_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[1], 8, 24, val); - return ret; -} - -bcmpkt_flex_field_get_f bcm78920_a0_vna_4_6_1_0_vxlan_t_fget[BCM78920_A0_VNA_4_6_1_0_BCMPKT_VXLAN_T_FID_COUNT] = { - bcmpkt_vxlan_t_flags_reserved_1_get, - bcmpkt_vxlan_t_reserved2_get, - bcmpkt_vxlan_t_vn_id_get, -}; - -bcmpkt_flex_field_set_f bcm78920_a0_vna_4_6_1_0_vxlan_t_fset[BCM78920_A0_VNA_4_6_1_0_BCMPKT_VXLAN_T_FID_COUNT] = { - bcmpkt_vxlan_t_flags_reserved_1_set, - bcmpkt_vxlan_t_reserved2_set, - bcmpkt_vxlan_t_vn_id_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78920_a0_vna_4_6_1_0_vxlan_t_field_data[] = { - BCM78920_A0_VNA_4_6_1_0_BCMPKT_VXLAN_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78920_a0_vna_4_6_1_0_vxlan_t_field_info = { - .num_fields = BCM78920_A0_VNA_4_6_1_0_BCMPKT_VXLAN_T_FID_COUNT, - .info = bcm78920_a0_vna_4_6_1_0_vxlan_t_field_data, -}; - - -static int32_t bcmpkt_wesp_t_flags_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 0, 8); - - return ret; -} - -static int32_t bcmpkt_wesp_t_flags_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 0, 8, val); - return ret; -} - -static int32_t bcmpkt_wesp_t_header_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 16, 8); - - return ret; -} - -static int32_t bcmpkt_wesp_t_header_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 16, 8, val); - return ret; -} - -static int32_t bcmpkt_wesp_t_next_header_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 24, 8); - - return ret; -} - -static int32_t bcmpkt_wesp_t_next_header_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 24, 8, val); - return ret; -} - -static int32_t bcmpkt_wesp_t_seq_num_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_wesp_t_seq_num_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_wesp_t_spi_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_wesp_t_spi_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_wesp_t_trailer_len_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - *val = WORD_FIELD_GET(data[0], 8, 8); - - return ret; -} - -static int32_t bcmpkt_wesp_t_trailer_len_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - WORD_FIELD_SET(data[0], 8, 8, val); - return ret; -} - -static int32_t bcmpkt_wesp_t_wesp_iv_get(uint32_t *data, int profile, uint32_t *val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -static int32_t bcmpkt_wesp_t_wesp_iv_set(uint32_t *data, int profile, uint32_t val) { - int32_t ret = SHR_E_NONE; - - ret = SHR_E_PARAM; - - return ret; -} - -bcmpkt_flex_field_get_f bcm78920_a0_vna_4_6_1_0_wesp_t_fget[BCM78920_A0_VNA_4_6_1_0_BCMPKT_WESP_T_FID_COUNT] = { - bcmpkt_wesp_t_flags_get, - bcmpkt_wesp_t_header_len_get, - bcmpkt_wesp_t_next_header_get, - bcmpkt_wesp_t_seq_num_get, - bcmpkt_wesp_t_spi_get, - bcmpkt_wesp_t_trailer_len_get, - bcmpkt_wesp_t_wesp_iv_get, -}; - -bcmpkt_flex_field_set_f bcm78920_a0_vna_4_6_1_0_wesp_t_fset[BCM78920_A0_VNA_4_6_1_0_BCMPKT_WESP_T_FID_COUNT] = { - bcmpkt_wesp_t_flags_set, - bcmpkt_wesp_t_header_len_set, - bcmpkt_wesp_t_next_header_set, - bcmpkt_wesp_t_seq_num_set, - bcmpkt_wesp_t_spi_set, - bcmpkt_wesp_t_trailer_len_set, - bcmpkt_wesp_t_wesp_iv_set, -}; - -static bcmpkt_flex_field_metadata_t bcm78920_a0_vna_4_6_1_0_wesp_t_field_data[] = { - BCM78920_A0_VNA_4_6_1_0_BCMPKT_WESP_T_FIELD_NAME_MAP_INIT -}; - -static bcmpkt_flex_field_info_t bcm78920_a0_vna_4_6_1_0_wesp_t_field_info = { - .num_fields = BCM78920_A0_VNA_4_6_1_0_BCMPKT_WESP_T_FID_COUNT, - .info = bcm78920_a0_vna_4_6_1_0_wesp_t_field_data, -}; - -static bcmpkt_flex_pmd_info_t bcm78920_a0_vna_4_6_1_0_flexhdr_info_list[BCM78920_A0_VNA_4_6_1_0_BCMPKT_FLEXHDR_COUNT] = { - { - .is_supported = TRUE, - .field_info = &bcm78920_a0_vna_4_6_1_0_arp_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78920_a0_vna_4_6_1_0_arp_t_fget, - .flex_fset = bcm78920_a0_vna_4_6_1_0_arp_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78920_a0_vna_4_6_1_0_authen_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78920_a0_vna_4_6_1_0_authen_t_fget, - .flex_fset = bcm78920_a0_vna_4_6_1_0_authen_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78920_a0_vna_4_6_1_0_bfd_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78920_a0_vna_4_6_1_0_bfd_t_fget, - .flex_fset = bcm78920_a0_vna_4_6_1_0_bfd_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78920_a0_vna_4_6_1_0_cnp_icrc_hdr_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78920_a0_vna_4_6_1_0_cnp_icrc_hdr_t_fget, - .flex_fset = bcm78920_a0_vna_4_6_1_0_cnp_icrc_hdr_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78920_a0_vna_4_6_1_0_cnp_rsvd_hdr_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78920_a0_vna_4_6_1_0_cnp_rsvd_hdr_t_fget, - .flex_fset = bcm78920_a0_vna_4_6_1_0_cnp_rsvd_hdr_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78920_a0_vna_4_6_1_0_cpu_composites_0_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78920_a0_vna_4_6_1_0_cpu_composites_0_t_fget, - .flex_fset = bcm78920_a0_vna_4_6_1_0_cpu_composites_0_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78920_a0_vna_4_6_1_0_cpu_composites_1_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78920_a0_vna_4_6_1_0_cpu_composites_1_t_fget, - .flex_fset = bcm78920_a0_vna_4_6_1_0_cpu_composites_1_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78920_a0_vna_4_6_1_0_dcn_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78920_a0_vna_4_6_1_0_dcn_t_fget, - .flex_fset = bcm78920_a0_vna_4_6_1_0_dcn_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78920_a0_vna_4_6_1_0_dest_option_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78920_a0_vna_4_6_1_0_dest_option_t_fget, - .flex_fset = bcm78920_a0_vna_4_6_1_0_dest_option_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78920_a0_vna_4_6_1_0_ep_nih_header_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78920_a0_vna_4_6_1_0_ep_nih_header_t_fget, - .flex_fset = bcm78920_a0_vna_4_6_1_0_ep_nih_header_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78920_a0_vna_4_6_1_0_erspan3_fixed_hdr_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78920_a0_vna_4_6_1_0_erspan3_fixed_hdr_t_fget, - .flex_fset = bcm78920_a0_vna_4_6_1_0_erspan3_fixed_hdr_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78920_a0_vna_4_6_1_0_erspan3_subhdr_5_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78920_a0_vna_4_6_1_0_erspan3_subhdr_5_t_fget, - .flex_fset = bcm78920_a0_vna_4_6_1_0_erspan3_subhdr_5_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78920_a0_vna_4_6_1_0_esp_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78920_a0_vna_4_6_1_0_esp_t_fget, - .flex_fset = bcm78920_a0_vna_4_6_1_0_esp_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78920_a0_vna_4_6_1_0_ethertype_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78920_a0_vna_4_6_1_0_ethertype_t_fget, - .flex_fset = bcm78920_a0_vna_4_6_1_0_ethertype_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78920_a0_vna_4_6_1_0_flex_l3_hdr_1_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78920_a0_vna_4_6_1_0_flex_l3_hdr_1_t_fget, - .flex_fset = bcm78920_a0_vna_4_6_1_0_flex_l3_hdr_1_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78920_a0_vna_4_6_1_0_flex_l3_hdr_2_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78920_a0_vna_4_6_1_0_flex_l3_hdr_2_t_fget, - .flex_fset = bcm78920_a0_vna_4_6_1_0_flex_l3_hdr_2_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78920_a0_vna_4_6_1_0_frag_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78920_a0_vna_4_6_1_0_frag_t_fget, - .flex_fset = bcm78920_a0_vna_4_6_1_0_frag_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78920_a0_vna_4_6_1_0_generic_loopback_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78920_a0_vna_4_6_1_0_generic_loopback_t_fget, - .flex_fset = bcm78920_a0_vna_4_6_1_0_generic_loopback_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78920_a0_vna_4_6_1_0_generic_metadata_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78920_a0_vna_4_6_1_0_generic_metadata_t_fget, - .flex_fset = bcm78920_a0_vna_4_6_1_0_generic_metadata_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78920_a0_vna_4_6_1_0_gpe_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78920_a0_vna_4_6_1_0_gpe_t_fget, - .flex_fset = bcm78920_a0_vna_4_6_1_0_gpe_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78920_a0_vna_4_6_1_0_gre_chksum_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78920_a0_vna_4_6_1_0_gre_chksum_t_fget, - .flex_fset = bcm78920_a0_vna_4_6_1_0_gre_chksum_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78920_a0_vna_4_6_1_0_gre_key_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78920_a0_vna_4_6_1_0_gre_key_t_fget, - .flex_fset = bcm78920_a0_vna_4_6_1_0_gre_key_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78920_a0_vna_4_6_1_0_gre_rout_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78920_a0_vna_4_6_1_0_gre_rout_t_fget, - .flex_fset = bcm78920_a0_vna_4_6_1_0_gre_rout_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78920_a0_vna_4_6_1_0_gre_seq_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78920_a0_vna_4_6_1_0_gre_seq_t_fget, - .flex_fset = bcm78920_a0_vna_4_6_1_0_gre_seq_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78920_a0_vna_4_6_1_0_gre_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78920_a0_vna_4_6_1_0_gre_t_fget, - .flex_fset = bcm78920_a0_vna_4_6_1_0_gre_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78920_a0_vna_4_6_1_0_hop_by_hop_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78920_a0_vna_4_6_1_0_hop_by_hop_t_fget, - .flex_fset = bcm78920_a0_vna_4_6_1_0_hop_by_hop_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78920_a0_vna_4_6_1_0_icmp_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78920_a0_vna_4_6_1_0_icmp_t_fget, - .flex_fset = bcm78920_a0_vna_4_6_1_0_icmp_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78920_a0_vna_4_6_1_0_ifa_header_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78920_a0_vna_4_6_1_0_ifa_header_t_fget, - .flex_fset = bcm78920_a0_vna_4_6_1_0_ifa_header_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78920_a0_vna_4_6_1_0_ifa_metadata_a_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78920_a0_vna_4_6_1_0_ifa_metadata_a_t_fget, - .flex_fset = bcm78920_a0_vna_4_6_1_0_ifa_metadata_a_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78920_a0_vna_4_6_1_0_ifa_metadata_b_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78920_a0_vna_4_6_1_0_ifa_metadata_b_t_fget, - .flex_fset = bcm78920_a0_vna_4_6_1_0_ifa_metadata_b_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78920_a0_vna_4_6_1_0_ifa_metadata_base_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78920_a0_vna_4_6_1_0_ifa_metadata_base_t_fget, - .flex_fset = bcm78920_a0_vna_4_6_1_0_ifa_metadata_base_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78920_a0_vna_4_6_1_0_igmp_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78920_a0_vna_4_6_1_0_igmp_t_fget, - .flex_fset = bcm78920_a0_vna_4_6_1_0_igmp_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78920_a0_vna_4_6_1_0_ipfix_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78920_a0_vna_4_6_1_0_ipfix_t_fget, - .flex_fset = bcm78920_a0_vna_4_6_1_0_ipfix_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78920_a0_vna_4_6_1_0_ipv4_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78920_a0_vna_4_6_1_0_ipv4_t_fget, - .flex_fset = bcm78920_a0_vna_4_6_1_0_ipv4_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78920_a0_vna_4_6_1_0_ipv6_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78920_a0_vna_4_6_1_0_ipv6_t_fget, - .flex_fset = bcm78920_a0_vna_4_6_1_0_ipv6_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78920_a0_vna_4_6_1_0_l2_instr_4byte_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78920_a0_vna_4_6_1_0_l2_instr_4byte_t_fget, - .flex_fset = bcm78920_a0_vna_4_6_1_0_l2_instr_4byte_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78920_a0_vna_4_6_1_0_l2_instr_8byte_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78920_a0_vna_4_6_1_0_l2_instr_8byte_t_fget, - .flex_fset = bcm78920_a0_vna_4_6_1_0_l2_instr_8byte_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78920_a0_vna_4_6_1_0_l2_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78920_a0_vna_4_6_1_0_l2_t_fget, - .flex_fset = bcm78920_a0_vna_4_6_1_0_l2_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78920_a0_vna_4_6_1_0_mirror_erspan_sn_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78920_a0_vna_4_6_1_0_mirror_erspan_sn_t_fget, - .flex_fset = bcm78920_a0_vna_4_6_1_0_mirror_erspan_sn_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78920_a0_vna_4_6_1_0_mirror_transport_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78920_a0_vna_4_6_1_0_mirror_transport_t_fget, - .flex_fset = bcm78920_a0_vna_4_6_1_0_mirror_transport_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78920_a0_vna_4_6_1_0_mpls_ach_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78920_a0_vna_4_6_1_0_mpls_ach_t_fget, - .flex_fset = bcm78920_a0_vna_4_6_1_0_mpls_ach_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78920_a0_vna_4_6_1_0_mpls_bv_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78920_a0_vna_4_6_1_0_mpls_bv_t_fget, - .flex_fset = bcm78920_a0_vna_4_6_1_0_mpls_bv_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78920_a0_vna_4_6_1_0_mpls_cw_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78920_a0_vna_4_6_1_0_mpls_cw_t_fget, - .flex_fset = bcm78920_a0_vna_4_6_1_0_mpls_cw_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78920_a0_vna_4_6_1_0_mpls_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78920_a0_vna_4_6_1_0_mpls_t_fget, - .flex_fset = bcm78920_a0_vna_4_6_1_0_mpls_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78920_a0_vna_4_6_1_0_p_1588_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78920_a0_vna_4_6_1_0_p_1588_t_fget, - .flex_fset = bcm78920_a0_vna_4_6_1_0_p_1588_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78920_a0_vna_4_6_1_0_psamp_0_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78920_a0_vna_4_6_1_0_psamp_0_t_fget, - .flex_fset = bcm78920_a0_vna_4_6_1_0_psamp_0_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78920_a0_vna_4_6_1_0_psamp_1_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78920_a0_vna_4_6_1_0_psamp_1_t_fget, - .flex_fset = bcm78920_a0_vna_4_6_1_0_psamp_1_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78920_a0_vna_4_6_1_0_psamp_mirror_on_drop_0_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78920_a0_vna_4_6_1_0_psamp_mirror_on_drop_0_t_fget, - .flex_fset = bcm78920_a0_vna_4_6_1_0_psamp_mirror_on_drop_0_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78920_a0_vna_4_6_1_0_psamp_mirror_on_drop_1_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78920_a0_vna_4_6_1_0_psamp_mirror_on_drop_1_t_fget, - .flex_fset = bcm78920_a0_vna_4_6_1_0_psamp_mirror_on_drop_1_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78920_a0_vna_4_6_1_0_psamp_mirror_on_drop_2_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78920_a0_vna_4_6_1_0_psamp_mirror_on_drop_2_t_fget, - .flex_fset = bcm78920_a0_vna_4_6_1_0_psamp_mirror_on_drop_2_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78920_a0_vna_4_6_1_0_psamp_postcard_0_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78920_a0_vna_4_6_1_0_psamp_postcard_0_t_fget, - .flex_fset = bcm78920_a0_vna_4_6_1_0_psamp_postcard_0_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78920_a0_vna_4_6_1_0_psamp_postcard_1_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78920_a0_vna_4_6_1_0_psamp_postcard_1_t_fget, - .flex_fset = bcm78920_a0_vna_4_6_1_0_psamp_postcard_1_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78920_a0_vna_4_6_1_0_rarp_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78920_a0_vna_4_6_1_0_rarp_t_fget, - .flex_fset = bcm78920_a0_vna_4_6_1_0_rarp_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78920_a0_vna_4_6_1_0_rocev2_aeth_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78920_a0_vna_4_6_1_0_rocev2_aeth_t_fget, - .flex_fset = bcm78920_a0_vna_4_6_1_0_rocev2_aeth_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78920_a0_vna_4_6_1_0_rocev2_bth_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78920_a0_vna_4_6_1_0_rocev2_bth_t_fget, - .flex_fset = bcm78920_a0_vna_4_6_1_0_rocev2_bth_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78920_a0_vna_4_6_1_0_rocev2_deth_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78920_a0_vna_4_6_1_0_rocev2_deth_t_fget, - .flex_fset = bcm78920_a0_vna_4_6_1_0_rocev2_deth_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78920_a0_vna_4_6_1_0_rocev2_reth_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78920_a0_vna_4_6_1_0_rocev2_reth_t_fget, - .flex_fset = bcm78920_a0_vna_4_6_1_0_rocev2_reth_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78920_a0_vna_4_6_1_0_routing_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78920_a0_vna_4_6_1_0_routing_t_fget, - .flex_fset = bcm78920_a0_vna_4_6_1_0_routing_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78920_a0_vna_4_6_1_0_rspan_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78920_a0_vna_4_6_1_0_rspan_t_fget, - .flex_fset = bcm78920_a0_vna_4_6_1_0_rspan_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78920_a0_vna_4_6_1_0_sflow_shim_0_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78920_a0_vna_4_6_1_0_sflow_shim_0_t_fget, - .flex_fset = bcm78920_a0_vna_4_6_1_0_sflow_shim_0_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78920_a0_vna_4_6_1_0_sflow_shim_1_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78920_a0_vna_4_6_1_0_sflow_shim_1_t_fget, - .flex_fset = bcm78920_a0_vna_4_6_1_0_sflow_shim_1_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78920_a0_vna_4_6_1_0_sflow_shim_2_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78920_a0_vna_4_6_1_0_sflow_shim_2_t_fget, - .flex_fset = bcm78920_a0_vna_4_6_1_0_sflow_shim_2_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78920_a0_vna_4_6_1_0_snap_llc_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78920_a0_vna_4_6_1_0_snap_llc_t_fget, - .flex_fset = bcm78920_a0_vna_4_6_1_0_snap_llc_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78920_a0_vna_4_6_1_0_tcp_first_4bytes_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78920_a0_vna_4_6_1_0_tcp_first_4bytes_t_fget, - .flex_fset = bcm78920_a0_vna_4_6_1_0_tcp_first_4bytes_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78920_a0_vna_4_6_1_0_tcp_last_16bytes_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78920_a0_vna_4_6_1_0_tcp_last_16bytes_t_fget, - .flex_fset = bcm78920_a0_vna_4_6_1_0_tcp_last_16bytes_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78920_a0_vna_4_6_1_0_udp_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78920_a0_vna_4_6_1_0_udp_t_fget, - .flex_fset = bcm78920_a0_vna_4_6_1_0_udp_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78920_a0_vna_4_6_1_0_unknown_l3_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78920_a0_vna_4_6_1_0_unknown_l3_t_fget, - .flex_fset = bcm78920_a0_vna_4_6_1_0_unknown_l3_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78920_a0_vna_4_6_1_0_unknown_l4_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78920_a0_vna_4_6_1_0_unknown_l4_t_fget, - .flex_fset = bcm78920_a0_vna_4_6_1_0_unknown_l4_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78920_a0_vna_4_6_1_0_unknown_l5_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78920_a0_vna_4_6_1_0_unknown_l5_t_fget, - .flex_fset = bcm78920_a0_vna_4_6_1_0_unknown_l5_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78920_a0_vna_4_6_1_0_vlan_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78920_a0_vna_4_6_1_0_vlan_t_fget, - .flex_fset = bcm78920_a0_vna_4_6_1_0_vlan_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78920_a0_vna_4_6_1_0_vpp_rx_md_header_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78920_a0_vna_4_6_1_0_vpp_rx_md_header_t_fget, - .flex_fset = bcm78920_a0_vna_4_6_1_0_vpp_rx_md_header_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78920_a0_vna_4_6_1_0_vpp_tx_md_header_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78920_a0_vna_4_6_1_0_vpp_tx_md_header_t_fget, - .flex_fset = bcm78920_a0_vna_4_6_1_0_vpp_tx_md_header_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78920_a0_vna_4_6_1_0_vxlan_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78920_a0_vna_4_6_1_0_vxlan_t_fget, - .flex_fset = bcm78920_a0_vna_4_6_1_0_vxlan_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78920_a0_vna_4_6_1_0_wesp_t_field_info, - .reasons_info = NULL, - .flex_fget = bcm78920_a0_vna_4_6_1_0_wesp_t_fget, - .flex_fset = bcm78920_a0_vna_4_6_1_0_wesp_t_fset, - }, - { - .is_supported = TRUE, - .field_info = &bcm78920_a0_vna_4_6_1_0_rxpmd_flex_field_info, - .reasons_info = &bcm78920_a0_vna_4_6_1_0_rxpmd_flex_reasons_info, - .flex_common_fget = bcm78920_a0_rxpmd_flex_fget, - .flex_common_fset = bcm78920_a0_rxpmd_flex_fset, - }, -}; - -static shr_enum_map_t bcm78920_a0_vna_4_6_1_0_flexhdr_id_map[] = { - BCM78920_A0_VNA_4_6_1_0_BCMPKT_FLEXHDR_NAME_MAP_INIT -}; - -shr_enum_map_t * bcm78920_a0_vna_4_6_1_0_flexhdr_map_get(void) -{ - return bcm78920_a0_vna_4_6_1_0_flexhdr_id_map; -} - -bcmpkt_flex_pmd_info_t * bcm78920_a0_vna_4_6_1_0_flex_pmd_info_get(uint32_t hid) -{ - if (hid >= BCM78920_A0_VNA_4_6_1_0_BCMPKT_FLEXHDR_COUNT) { - return NULL; - } - - return &bcm78920_a0_vna_4_6_1_0_flexhdr_info_list[hid]; -} - -int bcm78920_a0_vna_4_6_1_0_flexhdr_variant_support_map[BCMPKT_PMD_COUNT] = { - 17, - -1, - -1, - 74, -}; diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/Kbuild b/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/Kbuild deleted file mode 100644 index e5c7ace6271..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/Kbuild +++ /dev/null @@ -1,39 +0,0 @@ -# -*- Kbuild -*- -# -# Linux Generic Netlink module. -# -# Copyright 2018-2025 Broadcom. All rights reserved. -# The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License -# version 2 as published by the Free Software Foundation. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# A copy of the GNU General Public License version 2 (GPLv2) can -# be found in the LICENSES folder. -# -# Enable Kernel PMD -KNETCB_CPPFLAGS += -DKPMD - -obj-m := linux_bcmgenl.o - -ccflags-y := $(SDK_PMD_KFLAGS) $(LKM_CFLAGS) $(LKM_CPPFLAGS) \ - -I$(SDK)/shr/include \ - -I$(SDK)/bcmdrd/include \ - -I$(SDK)/bcmltd/include \ - -I$(SDK)/bcmlrd/include \ - -I$(SDK)/linux/include \ - -I$(SDK)/linux/include/kernel \ - -I$(SDK)/linux/knet/include \ - -I$(SDK)/linux/knet \ - -I$(SDK)/linux/bcmgenl - -linux_bcmgenl-y := $(SDK_PMD_KOBJS) \ - bcmgenl_packet.o \ - bcmgenl_psample.o \ - bcmgenl.o diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/Makefile b/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/Makefile deleted file mode 100644 index 050293d9332..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/Makefile +++ /dev/null @@ -1,54 +0,0 @@ -# -# Copyright 2018-2025 Broadcom. All rights reserved. -# The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License -# version 2 as published by the Free Software Foundation. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# A copy of the GNU General Public License version 2 (GPLv2) can -# be found in the LICENSES folder. -# -# Linux KNET BCMGENL module. -# - -# Include PMD library by default -ifneq (0,$(KPMD)) - -# Kernel module source directory -KMODDIR = $(CURDIR) - -# Avoid creating links in original kernel module source directory -GENDIR = $(KMODDIR)/generated -ifneq ($(OUTPUT_DIR),) -GENDIR = $(OUTPUT_DIR)/knet/generated/bcmgenl -endif -bcmgenl: kpmd - $(MAKE) -C $(GENDIR) all - -# SDK make helper for stand-alone PMD kernel module -include $(SDK)/make/kpmd.mk - -distclean:: - rm -rf $(GENDIR) - -endif # KPMD - -include Kbuild - -ifeq ($(KERNELRELEASE),) - -MOD_NAME = linux_bcmgenl - -include $(SDK)/make/lkm.mk - -endif - -.PHONY: bcmgenl distclean - -distclean:: diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl.c b/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl.c deleted file mode 100644 index 0ec0ff1469f..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/linux/bcmgenl/bcmgenl.c +++ /dev/null @@ -1,861 +0,0 @@ -/*! \file bcmgenl.c - * - * BCMGENL module entry. - * - */ -/* - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - */ - -#include -#include -#include -#include -#include -#include - -#ifdef KPMD -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#endif /* KPMD */ - -#include - -/*! \cond */ -MODULE_AUTHOR("Broadcom Corporation"); -MODULE_DESCRIPTION("BCMGENL Module"); -MODULE_LICENSE("GPL"); -/*! \endcond */ - -/*! driver proc entry root */ -static struct proc_dir_entry *bcmgenl_proc_root = NULL; - -#ifdef GENL_DEBUG -/*! \cond */ -static int debug = 0; -MODULE_PARAM(debug, int, 0); -MODULE_PARM_DESC(debug, "Debug level (default 0)"); -/*! \endcond */ -#endif /* GENL_DEBUG */ - -#ifndef KPMD -#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ - BCMDRD_DEV_T_##_bd, -/*! Enumeration for all base device types. */ -typedef enum { - BCMDRD_DEV_T_NONE = 0, -/*! \cond */ -#include -/*! \endcond */ - BCMDRD_DEV_T_COUNT -} bcmdrd_dev_type_t; - -/*! Create enumeration values from list of supported variants. */ -#define BCMLRD_VARIANT_ENTRY(_bd,_bu,_va,_ve,_vu,_vv,_vo,_vd,_r0,_r1)\ - BCMLRD_VARIANT_T_##_bd##_##_ve, - -/*! Enumeration for all device variants. */ -typedef enum bcmlrd_variant_e { - BCMLRD_VARIANT_T_NONE = 0, -/*! \cond */ -#include -/*! \endcond */ - BCMLRD_VARIANT_T_COUNT -} bcmlrd_variant_t; -#endif /* !KPMD */ - -typedef struct ngknetcb_dev_s { - bool initialized; - bcmdrd_dev_type_t dev_type; - bcmlrd_variant_t var_type; -} ngknetcb_dev_t; - -static ngknetcb_dev_t cb_dev[NUM_PDMA_DEV_MAX]; - -#define BCMDRD_DEVLIST_ENTRY(_nm,_vn,_dv,_rv,_md,_pi,_bd,_bc,_fn,_cn,_pf,_pd,_r0,_r1) \ - {#_bd, BCMDRD_DEV_T_##_bd}, -static const struct { - char *name; - bcmdrd_dev_type_t dev; -} device_types[] = { - {"device_none", BCMDRD_DEV_T_NONE}, -#include - {"device_count", BCMDRD_DEV_T_COUNT} -}; - -#define BCMLRD_VARIANT_ENTRY(_bd,_bu,_va,_ve,_vu,_vv,_vo,_vd,_r0,_r1)\ - {#_bd, #_ve, BCMLRD_VARIANT_T_##_bd##_##_ve}, -static const struct { - char *dev_name; - char *var_name; - bcmlrd_variant_t var; -} variant_types[] = { - {"device_none", "variant_none", BCMLRD_VARIANT_T_NONE}, -#include - {"device_count", "variant_count", BCMLRD_VARIANT_T_COUNT} -}; - -#ifdef KPMD -/* - Change this structure to reflect the match_ids of interest. - This is an example of how it can be used. -*/ -typedef struct cb_match_id_s { - int egress_pkt_fwd_l2_hdr_etag; - int egress_pkt_fwd_l2_hdr_l2; - int ingress_pkt_inner_l2_hdr_l2; - int ingress_pkt_fwd_l2_hdr_etag; - int ingress_pkt_outer_l2_hdr_itag; - int ingress_pkt_outer_l2_hdr_otag; -} cb_match_id_t; - -static cb_match_id_t match_id; - -/* - Initialize the desired match_ids for use later in the code. -*/ -static void -init_match_ids(int unit) -{ - uint32_t val; - - match_id.egress_pkt_fwd_l2_hdr_etag = -1; - match_id.egress_pkt_fwd_l2_hdr_l2 = -1; - match_id.ingress_pkt_inner_l2_hdr_l2 = -1; - match_id.ingress_pkt_fwd_l2_hdr_etag = -1; - match_id.ingress_pkt_outer_l2_hdr_itag = -1; - match_id.ingress_pkt_outer_l2_hdr_otag = -1; - if (bcmpkt_rxpmd_match_id_get(cb_dev[unit].var_type, - "EGRESS_PKT_FWD_L2_HDR_ETAG", &val) == 0) { - match_id.egress_pkt_fwd_l2_hdr_etag = val; - GENL_DBG_VERB("EGRESS_PKT_FWD_L2_HDR_ETAG: %d\n", val); - } - if (bcmpkt_rxpmd_match_id_get(cb_dev[unit].var_type, - "EGRESS_PKT_FWD_L2_HDR_L2", &val) == 0) { - match_id.egress_pkt_fwd_l2_hdr_l2 = val; - GENL_DBG_VERB("EGRESS_PKT_FWD_L2_HDR_L2: %d\n", val); - } - if (bcmpkt_rxpmd_match_id_get(cb_dev[unit].var_type, - "INGRESS_PKT_INNER_L2_HDR_L2", &val) == 0) { - match_id.ingress_pkt_inner_l2_hdr_l2 = val; - GENL_DBG_VERB("INGRESS_PKT_INNER_L2_HDR_L2: %d\n", val); - } - if (bcmpkt_rxpmd_match_id_get(cb_dev[unit].var_type, - "INGRESS_PKT_FWD_L2_HDR_ETAG", &val) == 0) { - match_id.ingress_pkt_fwd_l2_hdr_etag = val; - GENL_DBG_VERB("INGRESS_PKT_FWD_L2_HDR_ETAG: %d\n", val); - } - if (bcmpkt_rxpmd_match_id_get(cb_dev[unit].var_type, - "INGRESS_PKT_OUTER_L2_HDR_ITAG", &val) == 0) { - match_id.ingress_pkt_outer_l2_hdr_itag = val; - GENL_DBG_VERB("INGRESS_PKT_OUTER_L2_HDR_ITAG: %d\n", val); - } - if (bcmpkt_rxpmd_match_id_get(cb_dev[unit].var_type, - "INGRESS_PKT_OUTER_L2_HDR_OTAG", &val) == 0) { - match_id.ingress_pkt_outer_l2_hdr_otag = val; - GENL_DBG_VERB("INGRESS_PKT_OUTER_L2_HDR_OTAG: %d\n", val); - } -} - -/* - * The function get_tag_status() returns the tag status. - * 0 = Untagged - * 1 = Single inner-tag - * 2 = Single outer-tag - * 3 = Double tagged. - * -1 = Unsupported type - */ -static int -get_tag_status(uint32_t dev_type, uint32_t variant, void *rxpmd) -{ - int rv; - const char *tag_type[4] = { - "Untagged", - "Inner Tagged", - "Outer Tagged", - "Double Tagged" - }; - int tag_status = -1; - bcmpkt_rxpmd_fid_support_t support; - uint32_t val = 0; - - bcmpkt_rxpmd_fid_support_get(dev_type, &support); - - if (BCMPKT_RXPMD_FID_SUPPORT_GET(support, BCMPKT_RXPMD_ING_TAG_TYPE)) { - rv = bcmpkt_rxpmd_field_get(dev_type, (uint32_t *)rxpmd, - BCMPKT_RXPMD_ING_TAG_TYPE, &val); - /* Tomahawk4 family */ - - /* - * Indicates the incoming tag status (INCOMING_TAG_STATUS): - * For single tag device: - * 0: untagged, 1: tagged - * For double tag device: - * 0: untagged, 1: single inner-tag, 2: single outer-tag, 3: double tagged - */ - if (SHR_SUCCESS(rv)) { - tag_status = val; - } - } else if (BCMPKT_RXPMD_FID_SUPPORT_GET(support, BCMPKT_RXPMD_MATCH_ID_LO) && - BCMPKT_RXPMD_FID_SUPPORT_GET(support, BCMPKT_RXPMD_MATCH_ID_HI)) { - /* Trident4 family. */ - - uint32_t match_id_data[2]; - bool itag = false, otag = false; - - bcmpkt_rxpmd_field_get(dev_type, rxpmd, BCMPKT_RXPMD_MATCH_ID_LO, - &match_id_data[0]); - bcmpkt_rxpmd_field_get(dev_type, rxpmd, BCMPKT_RXPMD_MATCH_ID_HI, - &match_id_data[1]); - rv = bcmpkt_rxpmd_match_id_present(variant, match_id_data, 2, - match_id.ingress_pkt_outer_l2_hdr_itag); - if (SHR_SUCCESS(rv)) { - itag = true; - } - rv = bcmpkt_rxpmd_match_id_present(variant, match_id_data, 2, - match_id.ingress_pkt_outer_l2_hdr_otag); - if (SHR_SUCCESS(rv)) { - otag = true; - } - if (itag && otag) { - tag_status = 3; - } else if (itag) { - tag_status = 1; - } else if (otag) { - tag_status = 2; - } else { - tag_status = 0; - } - } else if (BCMPKT_RXPMD_FID_SUPPORT_GET(support, BCMPKT_RXPMD_ARC_ID_LO) && - BCMPKT_RXPMD_FID_SUPPORT_GET(support, BCMPKT_RXPMD_ARC_ID_HI)) { - uint32_t arc_id_data[2]; - bool itag = false, otag = false; - - bcmpkt_rxpmd_field_get(dev_type, rxpmd, BCMPKT_RXPMD_ARC_ID_LO, - &arc_id_data[0]); - bcmpkt_rxpmd_field_get(dev_type, rxpmd, BCMPKT_RXPMD_ARC_ID_HI, - &arc_id_data[1]); - rv = bcmpkt_rxpmd_match_id_from_arc_id_present( - variant, arc_id_data, 2, - match_id.ingress_pkt_outer_l2_hdr_itag); - if (SHR_SUCCESS(rv)) { - itag = true; - } - rv = bcmpkt_rxpmd_match_id_from_arc_id_present( - variant, arc_id_data, 2, - match_id.ingress_pkt_outer_l2_hdr_otag); - if (SHR_SUCCESS(rv)) { - otag = true; - } - if (itag && otag) { - tag_status = 3; - } else if (itag) { - tag_status = 1; - } else if (otag) { - tag_status = 2; - } else { - tag_status = 0; - } - } -#ifdef GENL_DEBUG - if (debug & GENL_DBG_LVL_VERB) { - if (tag_status != -1) { - if (tag_status == 0) { - printk(" Incoming frame untagged\n"); - } else { - printk(" Incoming frame tagged: %s\n", tag_type[tag_status]); - } - } else { - printk(" Unsupported tag type\n"); - } - } -#endif /* GENL_DEBUG */ - return tag_status; -} - -static int -dstport_get(void *raw_hg_hdr) -{ - /* - * The bit positions of dest port field is fixed on TH4/TH5. - * directly use HIGIG2_DST_MODID_MGIDH & HIGIG2_DST_PORT_MGIDL to - * get dest port. - */ - int dstport = 0; - const HIGIG2_t *const higig2 = (HIGIG2_t *)raw_hg_hdr; - - if (HIGIG2_MCSTf_GET(*higig2)) { - dstport = 0; - } else { - dstport = (HIGIG2_DST_MODID_MGIDHf_GET(*higig2) << 8) | - HIGIG2_DST_PORT_MGIDLf_GET(*higig2); - } - return dstport; -} - -static int -dstport_type_get(void *raw_hg_hdr) -{ - /* - * The bit positions of multicast field is fixed on TH4/TH5. - * directly use HIGIG2_MCSTf_GET to get dest port. - */ - const HIGIG2_t *const higig2 = (HIGIG2_t *)raw_hg_hdr; - - if (HIGIG2_MCSTf_GET(*higig2)) { - return DSTPORT_TYPE_MC; - } - return DSTPORT_TYPE_NONE; -} - -static bool -is_cpu_port(uint32_t dev_id, uint32_t port) -{ - if (((dev_id == 0xb880) && (port == 160)) || - ((dev_id == 0xb780) && (port == 80)) || - ((dev_id == 0xb690) && (port == 80)) || - ((dev_id == 0xb890) && (port == 272)) || - ((dev_id == 0xf800) && (port == 176))) { - /* - * SYSTEM_DESTINATION_15_0 = 0 is reserved and not used for CPU port on - * Trident 4/5 families. - * e.g TD4X11 map system port of CPU to {modid : 160} - */ - return true; - } - return false; -} - -static int -flexhdr_field_get(bcmlrd_variant_t var_type, uint32_t hid, char *fname, - uint32_t *rxpmd_flex, int flex_profile, uint32_t *val) -{ - int rv; - int fid; - - rv = bcmpkt_flexhdr_field_id_get(var_type, hid, fname, &fid); - if (SHR_FAILURE(rv)) { - return rv; - } - return bcmpkt_flexhdr_field_get(var_type, hid, rxpmd_flex, flex_profile, - fid, val); -} - -static void -rxpmd_meta_get(uint32_t dev_type, bcmlrd_variant_t var_type, - struct ngknet_callback_desc *cbd, uint32_t *rxpmd, - bcmgenl_packet_meta_t *meta, - uint32_t **rflex, uint32_t *rflex_len) -{ - int rv, rv2; - uint32_t *rxpmd_flex = NULL; - uint32_t rxpmd_flex_len = 0; - uint32_t hid, val = 0; - int flex_profile = -1; - uint32_t *mh = NULL; - int reason, reason_num = 0; - bcmpkt_bitmap_t reasons; - bcmpkt_rx_reasons_t rx_reasons; - char *name; - - /* Get tag status */ - meta->tag_status = get_tag_status(dev_type, var_type, (void *)rxpmd); - - /* Get sampling reason */ - BCMPKT_RX_REASON_CLEAR_ALL(reasons); - rv = bcmpkt_rxpmd_reasons_get(dev_type, rxpmd, &rx_reasons); - meta->sample_type = SAMPLE_TYPE_NONE; - if (SHR_SUCCESS(rv)) { - if ((BCMPKT_RX_REASON_GET(rx_reasons, BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_SRC)) || - (BCMPKT_RX_REASON_GET(rx_reasons, BCMPKT_RX_REASON_CPU_SFLOW_SRC))){ - meta->sample_type = SAMPLE_TYPE_INGRESS; - } else if ((BCMPKT_RX_REASON_GET(rx_reasons, BCMPKT_RX_REASON_CPU_SFLOW_CPU_SFLOW_DST)) || - (BCMPKT_RX_REASON_GET(rx_reasons, BCMPKT_RX_REASON_CPU_SFLOW_DST))) { - meta->sample_type = SAMPLE_TYPE_EGRESS; - } - } - - /* Get Module header's pointer */ - rv = bcmpkt_rxpmd_mh_get(dev_type, rxpmd, &mh); - if (SHR_SUCCESS(rv)) { - /* Get dst_port and dst_port_type */ - meta->dst_port = dstport_get((void *)mh); - meta->dst_port_type = dstport_type_get((void *)mh); - } - - /* Get src port */ - rv = bcmpkt_rxpmd_field_get(dev_type, rxpmd, BCMPKT_RXPMD_SRC_PORT_NUM, &val); - if (SHR_SUCCESS(rv)) { - meta->src_port = val; - } else { - rv = bcmpkt_rxpmd_field_get(dev_type, rxpmd, BCMPKT_RXPMD_RX_CHIP_PORT, &val); - if (SHR_SUCCESS(rv)) { - meta->src_port = val; - } - } - - rv = bcmpkt_rxpmd_flexdata_get(dev_type, rxpmd, &rxpmd_flex, &rxpmd_flex_len); - if (SHR_SUCCESS(rv)) { - /* Get sampling reason from flex reasons */ - rv = bcmpkt_rxpmd_flex_reason_max_get(var_type, &val); - rv2 = bcmpkt_rxpmd_flex_reasons_get(var_type, rxpmd_flex, &reasons); - if (SHR_SUCCESS(rv) && SHR_SUCCESS(rv2)) { - meta->sample_type = SAMPLE_TYPE_NONE; - reason_num = (int)val; - for (reason = 0; reason < reason_num; reason++) { - if (BCMPKT_RXPMD_FLEX_REASON_GET(reasons, reason)) { - rv = bcmpkt_rxpmd_flex_reason_name_get(var_type, reason, &name); - if (SHR_SUCCESS(rv)) { - if (strcmp(name, "MIRROR_SAMPLER_SAMPLED") == 0) { - meta->sample_type = SAMPLE_TYPE_INGRESS; - break; - } else if (strcmp(name, "MIRROR_SAMPLER_EGR_SAMPLED") == 0) { - meta->sample_type = SAMPLE_TYPE_EGRESS; - break; - } else { - if (strcmp(name, "LL_SFLOW") == 0) { - meta->sample_type = SAMPLE_TYPE_INGEGR; - break; - } - } - } - } - } - } - - /* Get hid of RXPMD_FLEX_T */ - rv = bcmpkt_flexhdr_header_id_get(var_type, "RXPMD_FLEX_T", &hid); - rv2 = bcmpkt_rxpmd_field_get(dev_type, rxpmd, - BCMPKT_RXPMD_MPB_FLEX_DATA_TYPE, &val); - if (SHR_SUCCESS(rv) && SHR_SUCCESS(rv2)) { - flex_profile = (int)val; - - /* Try to get INGRESS_PP_PORT_7_0 */ - rv = flexhdr_field_get(var_type, hid, "INGRESS_PP_PORT_7_0", - rxpmd_flex, flex_profile, &val); - if (SHR_SUCCESS(rv)) { - meta->ing_pp_port = val; - } - - /* Get dst_port and dst_port_type */ - rv = bcmpkt_rxpmd_field_get(dev_type, rxpmd, BCMPKT_RXPMD_MULTICAST, - &val); - if (SHR_SUCCESS(rv)) { - meta->dst_port_type = (val == 1) ? DSTPORT_TYPE_MC : - DSTPORT_TYPE_NONE; - } - if (meta->dst_port_type == DSTPORT_TYPE_MC) { - meta->dst_port = 0; - } else { - /* Try to get SYSTEM_DESTINATION_15_0 */ - rv = flexhdr_field_get(var_type, hid, "SYSTEM_DESTINATION_15_0", - rxpmd_flex, flex_profile, &val); - if (SHR_FAILURE(rv)) { - /* Try to get SWITCH_COPY_DESTINATION_15_0 */ - rv = flexhdr_field_get(var_type, hid, - "SWITCH_COPY_DESTINATION_15_0", - rxpmd_flex, flex_profile, &val); - } - if (SHR_SUCCESS(rv)) { - if (is_cpu_port(cbd->dinfo->dev_id, val)) { - val = 0; - } - meta->dst_port = val; - } - } - - /* Get fid of ING_TIMESTAMP_31_0 */ - rv = flexhdr_field_get(var_type, hid, "ING_TIMESTAMP_31_0", - rxpmd_flex, flex_profile, &val); - if (SHR_SUCCESS(rv)) { - meta->timestamp = val; - } - } - } else { - if (rv!= SHR_E_UNAVAIL) { - GENL_DBG_VERB("Failed to detect RXPMD_FLEX.\n"); - } - } - *rflex = rxpmd_flex; - *rflex_len = rxpmd_flex_len; -} -#endif /* KPMD */ - -#ifdef GENL_DEBUG -#ifdef KPMD -struct name_value_pair_s { - char *name; - int value; -}; - -static struct name_value_pair_s rxpmd_info[] = { - BCMPKT_RXPMD_FIELD_NAME_MAP_INIT -}; - -static const shr_enum_map_t reason_names[] = -{ - BCMPKT_REASON_NAME_MAP_INIT -}; - -static void -print_all_rxpmd_fields( - bcmdrd_dev_type_t dev_type, - const uint8_t *rxpmd) -{ - int rv, fid; - bcmpkt_rxpmd_fid_support_t support; - uint32_t val; - - printk("\n[RX metadata information]:\n"); - bcmpkt_rxpmd_fid_support_get(dev_type, &support); - - BCMPKT_RXPMD_FID_SUPPORT_ITER(support, fid) { - rv = bcmpkt_rxpmd_field_get - (dev_type, (uint32_t *)rxpmd, fid, &val); - if (rv == 0) { - printk(" %-26s = %10d [0x%X]\n", rxpmd_info[fid].name, val, val); - } - } -} - -static void -print_all_rxpmd_flex_fields( - bcmdrd_dev_type_t dev_type, - bcmlrd_variant_t var_type, - const uint8_t *rxpmd, - uint32_t *rxpmd_flex) -{ - int rv, fid; - int flex_profile = -1; - bcmpkt_flex_field_info_t rxpmd_flex_info; - uint32_t hid, val; - - rv = bcmpkt_rxpmd_field_get(dev_type, (uint32_t *)rxpmd, - BCMPKT_RXPMD_MPB_FLEX_DATA_TYPE, &val); - if (rv < 0) { - return; - } - flex_profile = (int)val; - - rv = bcmpkt_flexhdr_header_id_get(var_type, "RXPMD_FLEX_T", &hid); - if (rv < 0) { - return; - } - - rv = bcmpkt_flexhdr_field_info_get(var_type, hid, &rxpmd_flex_info); - if (rv < 0) { - return; - } - - printk("\n[RX metadata flex information]:\n"); - for (fid = BCMPKT_FID_INVALID + 1; fid < rxpmd_flex_info.num_fields; fid++) { - rv = bcmpkt_flexhdr_field_get(var_type, hid, rxpmd_flex, flex_profile, fid, &val); - if (rv == 0 && val != 0) { - printk(" %-34s = %10d [0x%X]\n", rxpmd_flex_info.info[fid].name, val, val); - } - } -} - -static void -print_all_rx_reason(bcmdrd_dev_type_t dev_type, uint32_t *rxpmd) -{ - int reason, rv; - bcmpkt_rx_reasons_t reasons; - - printk("\n[RX reasons]:\n"); - - if (rxpmd) { - BCMPKT_RX_REASON_CLEAR_ALL(reasons); - rv = bcmpkt_rxpmd_reasons_get(dev_type, rxpmd, &reasons); - if (rv == 0) { - BCMPKT_RX_REASON_ITER(reasons, reason) { - printk(" %s\n", reason_names[reason].name); - } - } - } -} - -static void -print_all_rx_flex_reason(bcmlrd_variant_t variant, uint32_t *rxpmd_flex) -{ - int reason, reason_num = 0, rv; - bcmpkt_bitmap_t reasons; - char *name; - uint32_t val; - - printk("\n[RX flex reasons]:\n"); - - if (rxpmd_flex == NULL) { - return; - } - - rv = bcmpkt_rxpmd_flex_reason_max_get(variant, &val); - if (rv < 0) { - return; - } - reason_num = (int)val; - - rv = bcmpkt_rxpmd_flex_reasons_get(variant, rxpmd_flex, &reasons); - if (rv == 0) { - for (reason = 0; reason < reason_num; reason++) { - if (BCMPKT_RXPMD_FLEX_REASON_GET(reasons, reason)) { - rv = bcmpkt_rxpmd_flex_reason_name_get(variant, reason, &name); - if (!rv) { - printk(" %s\n", name); - } - } - } - } -} -#else -#define print_all_rxpmd_fields(...) -#define print_all_rxpmd_flex_fields(...) -#define print_all_rx_reason(...) -#define print_all_rx_flex_reason(...) -#endif /* KPMD */ - -static void -dump_buffer(uint8_t *data, int size) -{ - const char *const to_hex = "0123456789ABCDEF"; - int i; - char buffer[128]; - char *buffer_ptr; - int addr = 0; - - buffer_ptr = buffer; - if (data && size != 0) { - for (i = 0; i < size; i++) { - *buffer_ptr++ = ' '; - *buffer_ptr++ = to_hex[(data[i] >> 4) & 0xF]; - *buffer_ptr++ = to_hex[data[i] & 0xF]; - if (((i % 16) == 15) || (i == size - 1)) { - *buffer_ptr = '\0'; - buffer_ptr = buffer; - printk(KERN_INFO "%04X %s\n", addr, buffer); - addr = i + 1; - } - } - } -} - -static void -dump_pmd(uint8_t *pmd, int len) -{ - if (debug & GENL_DBG_LVL_PDMP) { - printk(KERN_INFO "[PMD (%d bytes)]:\n", len); - dump_buffer(pmd, len); - } -} - -void dump_skb(struct sk_buff *skb) -{ - if (skb && (skb->len != 0)) { - printk(KERN_INFO "[SKB (%d bytes)]:\n", skb->len); - dump_buffer(skb->data, skb->len); - } -} - -void dump_bcmgenl_pkt(bcmgenl_pkt_t *bcmgenl_pkt) -{ - printk(KERN_INFO" %-20s = 0x%p\n", "Network namespace", bcmgenl_pkt->netns); - printk(KERN_INFO" %-20s = %d\n", "ing_pp_port", bcmgenl_pkt->meta.ing_pp_port); - printk(KERN_INFO" %-20s = %d\n", "src_port", bcmgenl_pkt->meta.src_port); - printk(KERN_INFO" %-20s = %d\n", "dst_port", bcmgenl_pkt->meta.dst_port); - printk(KERN_INFO" %-20s = %d\n", "dst_port_type", bcmgenl_pkt->meta.dst_port_type); - printk(KERN_INFO" %-20s = %d\n", "tag_status", bcmgenl_pkt->meta.tag_status); - printk(KERN_INFO" %-20s = 0x%x\n", "proto", bcmgenl_pkt->meta.proto); - printk(KERN_INFO" %-20s = %d\n", "vlan", bcmgenl_pkt->meta.vlan); - printk(KERN_INFO" %-20s = %s\n", "sample_type", - (bcmgenl_pkt->meta.sample_type == SAMPLE_TYPE_NONE ? "Not sampled" : - bcmgenl_pkt->meta.sample_type == SAMPLE_TYPE_INGRESS ? - "Ingress sampled" : - bcmgenl_pkt->meta.sample_type == SAMPLE_TYPE_EGRESS ? - "Egress sampled" : "Ingress or Egress sampled")); -} -#endif /* GENL_DEBUG */ - -int -bcmgenl_pkt_package( - int dev, - struct sk_buff *skb, - bcmgenl_info_t *bcmgenl_info, - bcmgenl_pkt_t *bcmgenl_pkt) -{ - int unit; - struct ngknet_callback_desc *cbd; - uint8_t *pkt; - uint32_t dev_type = 0; - bcmlrd_variant_t var_type = BCMLRD_VARIANT_T_NONE; - uint32_t *rxpmd = NULL; - uint32_t *rxpmd_flex = NULL; - uint32_t rxpmd_flex_len = 0; - - if (!skb || !bcmgenl_info || !bcmgenl_pkt) { - return SHR_E_PARAM; - } - cbd = NGKNET_SKB_CB(skb); - unit = cbd->dinfo->dev_no; - pkt = cbd->pmd + cbd->pmd_len; - rxpmd = (uint32_t *)cbd->pmd; - - memset(&bcmgenl_pkt->meta, 0, sizeof(bcmgenl_packet_meta_t)); - - bcmgenl_pkt->meta.proto = (uint16_t) ((pkt[12] << 8) | pkt[13]); - bcmgenl_pkt->meta.vlan = (uint16_t) ((pkt[14] << 8) | pkt[15]); - - bcmgenl_pkt->netns = bcmgenl_info->netns; - - if (cb_dev[unit].initialized) { - dev_type = cb_dev[unit].dev_type; - var_type = cb_dev[unit].var_type; -#ifdef KPMD - rxpmd_meta_get(dev_type, var_type, cbd, rxpmd, &bcmgenl_pkt->meta, - &rxpmd_flex, &rxpmd_flex_len); -#endif - } -#ifdef GENL_DEBUG - if (debug & GENL_DBG_LVL_PDMP) { - if (cb_dev[unit].initialized) { - printk("bcmgenl_pkt_package for dev %d:", cbd->dinfo->dev_no); - printk("type_str:%s dev_id: 0x%x variant: %s\n", - cbd->dinfo->type_str, cbd->dinfo->dev_id, variant_types[var_type].var_name); - printk("dev_type: %d\n", dev_type); - printk("variant: %d\n", var_type); - - print_all_rxpmd_fields(dev_type, (void *)rxpmd); - if (rxpmd_flex_len) { - print_all_rxpmd_flex_fields(dev_type, var_type, (void *)rxpmd, rxpmd_flex); - print_all_rx_flex_reason(var_type, rxpmd_flex); - } else { - print_all_rx_reason(dev_type, (void *)rxpmd); - } - - if (cbd->pmd_len != 0) { - dump_pmd(cbd->pmd, cbd->pmd_len); - } - printk("\n[Packet raw data (%d)]:\n", cbd->pkt_len); - dump_buffer(pkt, cbd->pkt_len); - } - dump_bcmgenl_pkt(bcmgenl_pkt); - } -#endif /* GENL_DEBUG */ - return SHR_E_NONE; -} - -/*! - * \brief Device Initialization Callback. - * - * The device initialization callback allows an external module to - * perform device-specific initialization in preparation for Tx and Rx - * packet processing. - * - * \param [in] dinfo Device information. - * - */ -static void -init_cb(ngknet_dev_info_t *dinfo) -{ - int unit; - bcmdrd_dev_type_t dt; - bcmlrd_variant_t var; - unit = dinfo->dev_no; - - if ((unsigned int)unit >= NUM_PDMA_DEV_MAX) { - return; - } - - for (dt = 0; dt < BCMDRD_DEV_T_COUNT; dt++) { - if (!strcasecmp(dinfo->type_str, device_types[dt].name)) { - cb_dev[unit].dev_type = dt; - break; - } - } - - for (var = 0; var < BCMLRD_VARIANT_T_COUNT; var++) { - if ((!strcasecmp(dinfo->type_str, variant_types[var].dev_name)) && - (!strcasecmp(dinfo->var_str, variant_types[var].var_name))) { - cb_dev[unit].var_type = var; - break; - } - } -#ifdef GENL_DEBUG - if (debug & GENL_DBG_LVL_VERB) { - printk("init_cb unit %d, dev %s dev_id: 0x%x variant %s\n", - dinfo->dev_no, dinfo->type_str, dinfo->dev_id, dinfo->var_str); - printk("dev_type: %d\n", cb_dev[unit].dev_type); - printk("variant: %d\n", cb_dev[unit].var_type); - } -#endif /* GENL_DEBUG */ - cb_dev[unit].initialized = true; -#ifdef KPMD - init_match_ids(unit); -#endif /* KPMD */ -} - -static int -bcmgenl_proc_cleanup(void) -{ - remove_proc_entry(BCMGENL_PROCFS_PATH, NULL); - remove_proc_entry(BCM_PROCFS_NAME, NULL); - return 0; -} - -static int -bcmgenl_proc_init(void) -{ - /* initialize proc files (for bcmgenl) */ - proc_mkdir(BCM_PROCFS_NAME, NULL); - bcmgenl_proc_root = proc_mkdir(BCMGENL_PROCFS_PATH, NULL); - return 0; -} - -static int __init -bcmgenl_init_module(void) -{ - ngknet_dev_init_cb_register(init_cb); - - bcmgenl_proc_init(); -#if 0 - bcmgenl_packet_init(); -#endif - bcmgenl_psample_init(); - - return 0; -} - -static void __exit -bcmgenl_exit_module(void) -{ - ngknet_dev_init_cb_unregister(init_cb); -#if 0 - bcmgenl_packet_cleanup(); -#endif - bcmgenl_psample_cleanup(); - bcmgenl_proc_cleanup(); -} - -module_init(bcmgenl_init_module); -module_exit(bcmgenl_exit_module); diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bde/Kbuild b/platform/broadcom/saibcm-modules/sdklt/linux/bde/Kbuild deleted file mode 100644 index 29835c319ca..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/linux/bde/Kbuild +++ /dev/null @@ -1,45 +0,0 @@ -# -*- Kbuild -*- -# -# Linux kernel BDE module. -# -# The BDE_CPPFLAGS variable is intended for configuring non-default -# builds of the NGBDE kernel module, for example, using a different -# default DMA pool size or turning off MSI interrupts. -# -# Copyright 2018-2025 Broadcom. All rights reserved. -# The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License -# version 2 as published by the Free Software Foundation. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# A copy of the GNU General Public License version 2 (GPLv2) can -# be found in the LICENSES folder. -# - -obj-m := linux_ngbde.o - -ccflags-y := $(BDE_CPPFLAGS) $(LKM_CFLAGS) $(LKM_CPPFLAGS) \ - $(LKM_BUILD_INFO) \ - -I$(SDK)/linux/include \ - -I$(SDK)/linux/bde \ - -I$(SDK)/bcmdrd/include - -linux_ngbde-y := ngbde_main.o \ - ngbde_kapi.o \ - ngbde_ioctl.o \ - ngbde_procfs.o \ - ngbde_pio.o \ - ngbde_iio.o \ - ngbde_paxb.o \ - ngbde_dma.o \ - ngbde_intr.o \ - ngbde_pgmem.o \ - ngbde_pci_probe.o \ - ngbde_iproc_probe.o \ - ngbde_swdev.o diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/bde/Makefile b/platform/broadcom/saibcm-modules/sdklt/linux/bde/Makefile deleted file mode 100644 index 3481d10ff8e..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/linux/bde/Makefile +++ /dev/null @@ -1,32 +0,0 @@ -# -# Copyright 2018-2025 Broadcom. All rights reserved. -# The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License -# version 2 as published by the Free Software Foundation. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# A copy of the GNU General Public License version 2 (GPLv2) can -# be found in the LICENSES folder. -# -# Linux kernel BDE module. -# - -include Kbuild - -ifeq ($(KERNELRELEASE),) - -MOD_NAME = linux_ngbde - -include $(SDK)/make/lkm.mk - -endif - -.PHONY: distclean - -distclean:: diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/edk/Kbuild b/platform/broadcom/saibcm-modules/sdklt/linux/edk/Kbuild deleted file mode 100644 index 7e59a877b1e..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/linux/edk/Kbuild +++ /dev/null @@ -1,30 +0,0 @@ -# -*- Kbuild -*- -# -# Linux KNET Callback module. -# -# Copyright 2018-2025 Broadcom. All rights reserved. -# The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License -# version 2 as published by the Free Software Foundation. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# A copy of the GNU General Public License version 2 (GPLv2) can -# be found in the LICENSES folder. -# - -obj-m := linux_ngedk.o - -ccflags-y := $(LKM_CFLAGS) $(LKM_CPPFLAGS) \ - -I$(SDK)/shr/include \ - -I$(SDK)/bcmdrd/include \ - -I$(SDK)/linux/include \ - -I$(SDK)/linux/knet/include \ - -I$(SDK)/linux/knet - -linux_ngedk-y := ngedk_main.o diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/edk/Makefile b/platform/broadcom/saibcm-modules/sdklt/linux/edk/Makefile deleted file mode 100644 index 8fc7d127b9d..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/linux/edk/Makefile +++ /dev/null @@ -1,32 +0,0 @@ -# -# Copyright 2018-2025 Broadcom. All rights reserved. -# The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License -# version 2 as published by the Free Software Foundation. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# A copy of the GNU General Public License version 2 (GPLv2) can -# be found in the LICENSES folder. -# -# Linux KNET Callback module. -# - -include Kbuild - -ifeq ($(KERNELRELEASE),) - -MOD_NAME = linux_ngedk - -include $(SDK)/make/lkm.mk - -endif - -.PHONY: distclean - -distclean:: diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/genl-packet/Kbuild b/platform/broadcom/saibcm-modules/sdklt/linux/genl-packet/Kbuild deleted file mode 100644 index 57b320ac71f..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/linux/genl-packet/Kbuild +++ /dev/null @@ -1,13 +0,0 @@ -# -*- Kbuild -*- -# -# Linux Netlink channel for general packet I/O module. -# -# $Copyright: (c) 2025 Broadcom. -# Broadcom Proprietary and Confidential. All rights reserved.$ -# - -obj-m := genl-packet.o - -ccflags-y := $(LKM_CFLAGS) $(LKM_CPPFLAGS) \ - -I$(SDK)/linux/include/lkm \ - -I$(SDK)/linux/include/kernel diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/genl-packet/Makefile b/platform/broadcom/saibcm-modules/sdklt/linux/genl-packet/Makefile deleted file mode 100644 index 75cf33f8fa7..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/linux/genl-packet/Makefile +++ /dev/null @@ -1,20 +0,0 @@ -# -# $Copyright: (c) 2025 Broadcom. -# Broadcom Proprietary and Confidential. All rights reserved.$ -# -# Linux Netlink channel for general packet I/O module. -# - -include Kbuild - -ifeq ($(KERNELRELEASE),) - -MOD_NAME = genl-packet - -include $(SDK)/make/lkm.mk - -endif - -.PHONY: distclean - -distclean:: diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/lkm.h b/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/lkm.h deleted file mode 100644 index 18f76531c28..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/linux/include/lkm/lkm.h +++ /dev/null @@ -1,205 +0,0 @@ -/*! \file lkm.h - * - * Linux compatibility macros. - * - */ -/* - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - */ - -#ifndef LKM_H -#define LKM_H - -#include -#include -#if LINUX_VERSION_CODE < KERNEL_VERSION(3,1,0) -#error Kernel too old -#endif -#include -#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0) -#include -#endif -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#ifdef CONFIG_DEVFS_FS -#include -#endif - -/* Compatibility Macros */ - -#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,5,0) -#define PROC_OWNER(_m) -#else -#define PROC_OWNER(_m) .owner = _m, -#define proc_ops file_operations -#define proc_open open -#define proc_read read -#define proc_write write -#define proc_lseek llseek -#define proc_release release -#define proc_ioctl unlocked_ioctl -#define proc_compat_ioctl compat_ioctl -#define proc_mmap mmap -#endif - -#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0) -#define PROC_CREATE(_entry, _name, _acc, _path, _fops) \ - do { \ - _entry = proc_create(_name, _acc, _path, _fops); \ - } while (0) - -#define PROC_CREATE_DATA(_entry, _name, _acc, _path, _fops, _data) \ - do { \ - _entry = proc_create_data(_name, _acc, _path, _fops, _data); \ - } while (0) - -#define PROC_PDE_DATA(_node) PDE_DATA(_node) -#else -#define PROC_CREATE(_entry, _name, _acc, _path, _fops) \ - do { \ - _entry = create_proc_entry(_name, _acc, _path); \ - if (_entry) { \ - _entry->proc_fops = _fops; \ - } \ - } while (0) - -#define PROC_CREATE_DATA(_entry, _name, _acc, _path, _fops, _data) \ - do { \ - _entry = create_proc_entry(_name, _acc, _path); \ - if (_entry) { \ - _entry->proc_fops = _fops; \ - _entry->data=_data; \ - } \ - } while (0) - -#define PROC_PDE_DATA(_node) PROC_I(_node)->pde->data -#endif - -#if LINUX_VERSION_CODE < KERNEL_VERSION(4,15,0) -#define timer_arg(var, context, timer_fieldname) \ - (typeof(var))(context) -#define timer_context_t unsigned long -#else -#define timer_context_t struct timer_list * -#define timer_arg(var, context, timer_fieldname) \ - from_timer(var, context, timer_fieldname) -#endif - -#ifndef setup_timer -#define setup_timer(timer, fn, data) \ - timer_setup(timer, fn, 0) -#endif - -#if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0) -static inline void page_ref_inc(struct page *page) -{ - atomic_inc(&page->_count); -} - -static inline void page_ref_dec(struct page *page) -{ - atomic_dec(&page->_count); -} -#endif - -#if LINUX_VERSION_CODE < KERNEL_VERSION(4,8,0) -#define DMA_FORCE_CONTIGUOUS NULL -#else -#define DMA_FORCE_CONTIGUOUS DMA_ATTR_FORCE_CONTIGUOUS -#endif - -#ifndef PCI_IRQ_MSI -/* Emulate new IRQ API if not available */ -#define PCI_IRQ_INTX (1 << 0) -#define PCI_IRQ_MSI (1 << 1) -#define PCI_IRQ_MSIX (1 << 2) -static inline int -pci_alloc_irq_vectors(struct pci_dev *dev, unsigned int min_vecs, - unsigned int max_vecs, unsigned int flags) -{ - /* We do not attempt to support MSI-X via old API */ - if (flags & PCI_IRQ_MSI) { - if (pci_enable_msi(dev) == 0) { - return 1; - } - } - if (flags & PCI_IRQ_INTX) { - return 1; - } - return 0; -} -static inline void -pci_free_irq_vectors(struct pci_dev *dev) -{ - pci_disable_msi(dev); -} -static inline int -pci_irq_vector(struct pci_dev *dev, unsigned int nr) -{ - return dev->irq; -} -#endif - -/* Renamed in 6.8 */ -#ifndef PCI_IRQ_INTX -#define PCI_IRQ_INTX PCI_IRQ_LEGACY -#endif - -#if LINUX_VERSION_CODE < KERNEL_VERSION(4,19,0) -#define strscpy strlcpy -#endif - -#ifndef MAX_PAGE_ORDER -#define MAX_PAGE_ORDER MAX_ORDER -#endif - -#if LINUX_VERSION_CODE < KERNEL_VERSION(6,11,0) -#define kernel_ethtool_ts_info ethtool_ts_info -#endif - -#if LINUX_VERSION_CODE < KERNEL_VERSION(6,11,0) -#define PLATFORM_DRIVER_REMOVE_RETURN_TYPE int -#define PLATFORM_DRIVER_REMOVE_RETURN_VALUE(_v) return (_v) -#endif - -#ifndef PLATFORM_DRIVER_REMOVE_RETURN_TYPE -#define PLATFORM_DRIVER_REMOVE_RETURN_TYPE void -#endif - -#ifndef PLATFORM_DRIVER_REMOVE_RETURN_VALUE -#define PLATFORM_DRIVER_REMOVE_RETURN_VALUE(_v) -#endif - -#endif /* LKM_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/Kbuild b/platform/broadcom/saibcm-modules/sdklt/linux/knet/Kbuild deleted file mode 100644 index 9176a6e075f..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/Kbuild +++ /dev/null @@ -1,53 +0,0 @@ -# -*- Kbuild -*- -# -# Linux KNET module. -# -# Copyright 2018-2025 Broadcom. All rights reserved. -# The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License -# version 2 as published by the Free Software Foundation. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# A copy of the GNU General Public License version 2 (GPLv2) can -# be found in the LICENSES folder. -# - -obj-m := linux_ngknet.o - -ifneq ($(OUTPUT_DIR),) -INCLUDES := -I$(OUTPUT_DIR)/knet/generated/include -I$(OUTPUT_DIR)/knet/generated -endif -ccflags-y := $(KNET_CPPFLAGS) $(LKM_CFLAGS) \ - -I$(SDK)/shr/include \ - -I$(SDK)/bcmdrd/include \ - -I$(SDK)/linux/include \ - -I$(SDK)/linux/knet/generated/include \ - -I$(SDK)/linux/knet/generated \ - $(INCLUDES) - -linux_ngknet-y := $(CHIP_OBJS) \ - bcmcnet_cmicd_pdma_hw.o \ - bcmcnet_cmicd_pdma_rxtx.o \ - bcmcnet_cmicx_pdma_hw.o \ - bcmcnet_cmicx_pdma_rxtx.o \ - bcmcnet_cmicr_pdma_hw.o \ - bcmcnet_cmicr_pdma_rxtx.o \ - bcmcnet_cmicr2_pdma_rxtx.o \ - bcmcnet_core.o \ - bcmcnet_dev.o \ - bcmcnet_rxtx.o \ - ngknet_buff.o \ - ngknet_callback.o \ - ngknet_extra.o \ - ngknet_linux.o \ - ngknet_main.o \ - ngknet_procfs.o \ - ngknet_ptp.o \ - ngknet_xdp.o \ - ngknet_xsk.o diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/Makefile b/platform/broadcom/saibcm-modules/sdklt/linux/knet/Makefile deleted file mode 100644 index 80aa27725ab..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/Makefile +++ /dev/null @@ -1,114 +0,0 @@ -# -# Copyright 2018-2025 Broadcom. All rights reserved. -# The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License -# version 2 as published by the Free Software Foundation. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# A copy of the GNU General Public License version 2 (GPLv2) can -# be found in the LICENSES folder. -# -# Linux KNET module. -# - -CNETDIR = $(SDK)/bcmcnet -KNETDIR = $(SDK)/linux/knet -GENDIR = $(KNETDIR)/generated -SRCIDIR = $(CNETDIR)/include/bcmcnet -ifneq ($(OUTPUT_DIR),) -GENDIR = $(OUTPUT_DIR)/knet/generated -endif -DSTIDIR = $(GENDIR)/include/bcmcnet - -# Change comma-separated list to space-separated list -comma = , -empty = -space = $(empty) $(empty) -spc_sep = $(subst $(comma),$(space),$1) - -# Convert chip name to uppercase -chip_uc = $(subst a,A,$(subst b,B,$(subst c,C,$(subst m,M,$1)))) - -# Convert chip name to lowercase -chip_lc = $(subst A,a,$(subst B,b,$(subst C,c,$(subst M,m,$1)))) - -# -# If SDK_CHIPS is defined, then exclude any chip directory which is -# not part of this list. -# -KNET_CHIPS := $(subst $(CNETDIR)/chip/,,$(wildcard $(CNETDIR)/chip/bcm*)) -ifdef SDK_CHIPS -# Create space-separated lowercase version of chip list -SDK_CHIPS_SPC := $(call spc_sep,$(SDK_CHIPS)) -SDK_CHIPS_LC := $(call chip_lc,$(SDK_CHIPS_SPC)) -# Configure build flags according to chip list -KNET_CHIPS := $(filter $(SDK_CHIPS_LC),$(KNET_CHIPS)) -KNET_CPPFLAGS := CHIP_DEFAULT=0 $(addsuffix =1,$(call chip_uc,$(KNET_CHIPS))) -KNET_CPPFLAGS := $(addprefix -DBCMDRD_CONFIG_INCLUDE_,$(KNET_CPPFLAGS)) -export KNET_CPPFLAGS -endif - -.PHONY: mklinks rmlinks - -knet: mklinks - $(MAKE) -C $(GENDIR) all - -# -# Suppress symlink error messages. -# -# Note that we do not use "ln -f" as this may cause failures if -# multiple builds are done in parallel on the same source tree. -# -R = 2>/dev/null - -mklinks: - mkdir -p $(DSTIDIR) - -ln -sr $(KNETDIR)/ngknet_dep.h $(DSTIDIR)/bcmcnet_dep.h $(R) - -ln -sr $(KNETDIR)/ngknet_buff.h $(DSTIDIR)/bcmcnet_buff.h $(R) - -ln -sr $(SRCIDIR)/bcmcnet_types.h $(DSTIDIR) $(R) - -ln -sr $(SRCIDIR)/bcmcnet_internal.h $(DSTIDIR) $(R) - -ln -sr $(SRCIDIR)/bcmcnet_core.h $(DSTIDIR) $(R) - -ln -sr $(SRCIDIR)/bcmcnet_dev.h $(DSTIDIR) $(R) - -ln -sr $(SRCIDIR)/bcmcnet_rxtx.h $(DSTIDIR) $(R) - -ln -sr $(SRCIDIR)/bcmcnet_cmicd.h $(DSTIDIR) $(R) - -ln -sr $(SRCIDIR)/bcmcnet_cmicx.h $(DSTIDIR) $(R) - -ln -sr $(SRCIDIR)/bcmcnet_cmicr_acc.h $(DSTIDIR) $(R) - -ln -sr $(SRCIDIR)/bcmcnet_cmicr.h $(DSTIDIR) $(R) - -ln -sr $(SRCIDIR)/bcmcnet_cmicr2.h $(DSTIDIR) $(R) - -ln -sr $(CNETDIR)/chip/*/*attach.c $(GENDIR) $(R) - -ln -sr $(CNETDIR)/hmi/cmicd/*.c $(GENDIR) $(R) - -ln -sr $(CNETDIR)/hmi/cmicx/*.c $(GENDIR) $(R) - -ln -sr $(CNETDIR)/hmi/cmicr/*.c $(GENDIR) $(R) - -ln -sr $(CNETDIR)/main/bcmcnet_core.c $(GENDIR) $(R) - -ln -sr $(CNETDIR)/main/bcmcnet_dev.c $(GENDIR) $(R) - -ln -sr $(CNETDIR)/main/bcmcnet_rxtx.c $(GENDIR) $(R) - -ln -sr $(KNETDIR)/*.[ch] $(GENDIR) $(R) - -ln -sr $(KNETDIR)/Makefile $(GENDIR) $(R) - -ln -sr $(KNETDIR)/Kbuild $(GENDIR) $(R) - -rmlinks: - -rm -rf $(GENDIR) - -CHIP_SRCS := $(addsuffix _pdma_attach.c,$(KNET_CHIPS)) -CHIP_OBJS ?= $(patsubst %.c, %.o, $(CHIP_SRCS)) -export CHIP_OBJS - -include Kbuild - -ifeq ($(KERNELRELEASE),) - -MOD_NAME = linux_ngknet - -include $(SDK)/make/lkm.mk - -endif - -.PHONY: distclean - -distclean:: rmlinks diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_buff.c b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_buff.c deleted file mode 100644 index 08c1733ad64..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_buff.c +++ /dev/null @@ -1,645 +0,0 @@ -/*! \file ngknet_buff.c - * - * Utility routines for NGKNET packet buffer management in Linux kernel mode. - * - * These callbacks in the standalone buffer management will be called by pktio - * driver for various buffer operations: - * - Set buffer mode based on the pktio working mode, see \ref enum buf_mode. - * - Allocate and free DCBs, which should be cache coherent. - * - Allocate and free packet buffers, which should use appropriate APIs - * based on buffer mode, and should be mapped/unmapped for DMA operation. - * - Get DMA address for filling DCB. - * - Validate buffer and reusing it. - * - Get buffer information such as packet length, meta data length and so on. - * - Put buffer if it can be reused. - * - */ -/* - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - */ - -#include -#include -#include -#include "ngknet_main.h" -#include "ngknet_extra.h" -#include "ngknet_xdp.h" -#include "ngknet_xsk.h" -#include "ngknet_buff.h" - -/* - * Macros for meta data offset calculation when DMA buffer is mapped for - * hardware or DMAed data length is set. - * The adjustment for meta data length indicated by "adj" should be set in - * pktio driver. In Rx, it is the length of meta data. In Tx, it is a bool - * value to indicate if the meta data length should be considered. - * It only needs to set for legacy devices on which meta data exists in DCB - * and can not be sent/received along with packet payload. Instead, it is - * always 0 for modern LT devices. - */ -#define RX_BUFF_RSV(pbuf) (PDMA_RXB_RESV + pbuf->adj) -#define RX_BUFF_DMA(pbuf) (&pbuf->pkb->data + pbuf->adj) -#define TX_META_LEN(pbuf) (pbuf->adj ? 0 : pbuf->pkb->pkh.meta_len) -#define TX_BUFF_DMA(pbuf) (&pbuf->pkb->data + \ - (pbuf->adj ? pbuf->pkb->pkh.meta_len : 0)) - -#define NGKNET_RX_DMA_ATTR (DMA_ATTR_SKIP_CPU_SYNC | DMA_ATTR_WEAK_ORDERING) - -/*! - * Allocate coherent memory - */ -static void * -ngknet_ring_buf_alloc(struct pdma_dev *dev, uint32_t size, dma_addr_t *dma) -{ - struct ngknet_dev *kdev = (struct ngknet_dev *)dev->priv; - - return dma_alloc_coherent(kdev->dev, size, dma, GFP_KERNEL); -} - -/*! - * Free coherent memory - */ -static void -ngknet_ring_buf_free(struct pdma_dev *dev, uint32_t size, void *addr, dma_addr_t dma) -{ - struct ngknet_dev *kdev = (struct ngknet_dev *)dev->priv; - - dma_free_coherent(kdev->dev, size, addr, dma); -} - -/*! - * Allocate Rx buffer - */ -static int -ngknet_rx_buf_alloc(struct pdma_dev *dev, struct pdma_rx_queue *rxq, - struct pdma_rx_buf *pbuf) -{ - struct ngknet_dev *kdev = (struct ngknet_dev *)dev->priv; - dma_addr_t dma; - -#ifdef NGKNET_XDP_NATIVE - if (rxq->buf_mode == PDMA_BUF_MODE_MAPPED) { - struct xdp_buff *xdp = xsk_buff_alloc(kdev->xsk_pool); - if (!xdp) { - if (xsk_uses_need_wakeup(kdev->xsk_pool)) { - xsk_set_rx_need_wakeup(kdev->xsk_pool); - } - return SHR_E_MEMORY; - } - pbuf->dma = xsk_buff_xdp_get_dma(xdp); - pbuf->skb = (struct sk_buff *)xdp; - } else -#endif - if (rxq->buf_mode == PDMA_BUF_MODE_PAGE) { - struct page *page = kal_dev_alloc_pages(rxq->page_order); - if (unlikely(!page)) { - return SHR_E_MEMORY; - } - dma = kal_dma_map_page_attrs(kdev->dev, page, 0, rxq->page_size, - DMA_FROM_DEVICE, NGKNET_RX_DMA_ATTR); - if (unlikely(dma_mapping_error(kdev->dev, dma))) { - __free_pages(page, rxq->page_order); - return SHR_E_MEMORY; - } - pbuf->dma = dma; - pbuf->page = page; - pbuf->page_offset = 0; - dma_sync_single_range_for_device(kdev->dev, pbuf->dma, pbuf->page_offset, - rxq->page_size >> 1, DMA_FROM_DEVICE); - } else { - struct sk_buff *skb; - skb = netdev_alloc_skb(kdev->net_dev, RX_BUFF_RSV(pbuf) + rxq->buf_size); - if (unlikely(!skb)) { - return SHR_E_MEMORY; - } - skb_reserve(skb, PDMA_RXB_ALIGN - ((unsigned long)skb->data & - (PDMA_RXB_ALIGN - 1))); - pbuf->pkb = (struct pkt_buf *)skb->data; - dma = dma_map_single(kdev->dev, RX_BUFF_DMA(pbuf), rxq->buf_size, - DMA_FROM_DEVICE); - if (unlikely(dma_mapping_error(kdev->dev, dma))) { - dev_kfree_skb_any(skb); - return SHR_E_MEMORY; - } - pbuf->dma = dma; - pbuf->skb = skb; - } - - return SHR_E_NONE; -} - -/*! - * Get Rx buffer DMA address - */ -static void -ngknet_rx_buf_dma(struct pdma_dev *dev, struct pdma_rx_queue *rxq, - struct pdma_rx_buf *pbuf, dma_addr_t *addr) -{ - if (!pbuf->dma) { - *addr = 0; - return; - } - -#ifdef NGKNET_XDP_NATIVE - if (rxq->buf_mode == PDMA_BUF_MODE_MAPPED) { - *addr = pbuf->dma + RX_BUFF_RSV(pbuf); - } else -#endif - if (rxq->buf_mode == PDMA_BUF_MODE_PAGE) { - *addr = pbuf->dma + pbuf->page_offset + RX_BUFF_RSV(pbuf); - } else { - *addr = pbuf->dma; - } -} - -/*! - * Check Rx buffer - */ -static bool -ngknet_rx_buf_avail(struct pdma_dev *dev, struct pdma_rx_queue *rxq, - struct pdma_rx_buf *pbuf) -{ - if (rxq->buf_mode == PDMA_BUF_MODE_PAGE) { - pbuf->skb = NULL; - } - - return (pbuf->dma != 0); -} - -/*! - * Reuse the pages - */ -static void -ngknet_rx_page_reuse(struct pdma_dev *dev, struct pdma_rx_queue *rxq, - struct pdma_rx_buf *pbuf) -{ - struct ngknet_dev *kdev = (struct ngknet_dev *)dev->priv; - - if (unlikely(page_count(pbuf->page) != 1) || - kal_page_is_pfmemalloc(pbuf->page) || - page_to_nid(pbuf->page) != numa_mem_id()) { - kal_dma_unmap_page_attrs(kdev->dev, pbuf->dma, rxq->page_size, - DMA_FROM_DEVICE, NGKNET_RX_DMA_ATTR); - pbuf->dma = 0; - } else { - pbuf->page_offset ^= rxq->page_size >> 1; - page_ref_inc(pbuf->page); - dma_sync_single_range_for_device(kdev->dev, pbuf->dma, pbuf->page_offset, - rxq->page_size >> 1, DMA_FROM_DEVICE); - } -} - -#ifdef NGKNET_XDP_NATIVE -/*! - * Run Rx XDP in zero-copy mode - */ -static int -ngknet_rx_run_xdp_zc(struct pdma_dev *dev, struct pdma_rx_queue *rxq, - struct pdma_rx_buf *pbuf, int len) -{ - struct ngknet_dev *kdev = (struct ngknet_dev *)dev->priv; - struct net_device *ndev; - struct xdp_buff *xdp = (struct xdp_buff *)pbuf->skb; - struct pdma_hw *hw = (struct pdma_hw *)dev->ctrl.hw; - uint32_t meta_len = hw->info.rx_ph_size; - uint8_t fcs = dev->flags & PDMA_NO_FCS ? 0 : ETH_FCS_LEN; - void *frame; - struct pkt_hdr *pkh; - uint32_t xv; - int rv; - - frame = xdp->data - PKT_HDR_SIZE; - pkh = &((struct pkt_buf *)frame)->pkh; - pkh->data_len = len - meta_len; - pkh->meta_len = meta_len; - pkh->queue_id = rxq->queue_id; - - rv = ngknet_rx_xdp_filter(kdev, frame, &ndev); - if (SHR_SUCCESS(rv) && ndev) { - xdp->data_end = xdp->data + len - fcs; - xdp->data_meta = xdp->data; - xv = ngknet_run_xdp_zc(ndev, xdp); - if (xv) { - if (xv & (NGKNET_XDP_REDIR | NGKNET_XDP_TX | NGKNET_XDP_EXIT)) { - return SHR_E_UNAVAIL; - } else if (xv == NGKNET_XDP_BUSY) { - return SHR_E_BUSY; - } else { - xsk_buff_free(xdp); - return SHR_E_UNAVAIL; - } - } - } else if (rv != SHR_E_NO_HANDLER) { - xsk_buff_free(xdp); - return SHR_E_UNAVAIL; - } - - return SHR_E_NONE; -} - -/*! - * Run Rx XDP - */ -static int -ngknet_rx_run_xdp(struct pdma_dev *dev, struct pdma_rx_queue *rxq, - struct pdma_rx_buf *pbuf, int len) -{ - struct ngknet_dev *kdev = (struct ngknet_dev *)dev->priv; - struct net_device *ndev; - struct ngknet_private *priv; - struct xdp_buff xdp; - struct pdma_hw *hw = (struct pdma_hw *)dev->ctrl.hw; - uint32_t meta_len = hw->info.rx_ph_size; - uint8_t fcs = dev->flags & PDMA_NO_FCS ? 0 : ETH_FCS_LEN; - void *frame; - struct pkt_hdr *pkh; - uint32_t xv = NGKNET_XDP_PASS; - int rv; - - frame = page_address(pbuf->page) + pbuf->page_offset + PDMA_RXB_ALIGN; - pkh = &((struct pkt_buf *)frame)->pkh; - pkh->data_len = len - meta_len; - pkh->meta_len = meta_len; - pkh->queue_id = rxq->queue_id; - - rv = ngknet_rx_xdp_filter(kdev, frame, &ndev); - if (SHR_SUCCESS(rv) && ndev) { - priv = netdev_priv(ndev); -#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5,12,0)) - xdp_init_buff(&xdp, rxq->page_size >> 1, &priv->xri); - xdp_prepare_buff(&xdp, page_address(pbuf->page) + pbuf->page_offset, - PDMA_RXB_RESV, len - fcs, true); -#else - xdp.frame_sz = rxq->page_size >> 1; - xdp.rxq = &priv->xri; - xdp.data_hard_start = page_address(pbuf->page) + pbuf->page_offset; - xdp.data = xdp.data_hard_start + PDMA_RXB_RESV; - xdp.data_end = xdp.data + len - fcs; - xdp.data_meta = xdp.data; -#endif -#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5,18,0)) - xdp_buff_clear_frags_flag(&xdp); -#endif - xv = ngknet_run_xdp(ndev, &xdp); - } - - if ((rv && rv != SHR_E_NO_HANDLER) || - (xv && !(xv & (NGKNET_XDP_REDIR | NGKNET_XDP_TX)))) { - dma_sync_single_range_for_device(kdev->dev, pbuf->dma, pbuf->page_offset, - rxq->page_size >> 1, DMA_FROM_DEVICE); - return SHR_E_UNAVAIL; - } - - if (xv & (NGKNET_XDP_REDIR | NGKNET_XDP_TX)) { - ngknet_rx_page_reuse(dev, rxq, pbuf); - return SHR_E_UNAVAIL; - } - - return SHR_E_NONE; -} -#endif - -/*! - * Get Rx buffer - */ -static int -ngknet_rx_buf_get(struct pdma_dev *dev, struct pdma_rx_queue *rxq, - struct pdma_rx_buf *pbuf, int len) -{ - struct ngknet_dev *kdev = (struct ngknet_dev *)dev->priv; - struct sk_buff *skb; - -#ifdef NGKNET_XDP_NATIVE - int rv; - if (rxq->buf_mode == PDMA_BUF_MODE_MAPPED) { - struct xdp_buff *xdp = (struct xdp_buff *)pbuf->skb; - if (pbuf->dma) { -#if (LINUX_VERSION_CODE >= KERNEL_VERSION(6,10,0)) - xsk_buff_dma_sync_for_cpu(xdp); -#else - xsk_buff_dma_sync_for_cpu(xdp, kdev->xsk_pool); -#endif - pbuf->dma = 0; - xdp->data += RX_BUFF_RSV(pbuf); - } - if (kdev->xprog_num > 0) { - rv = ngknet_rx_run_xdp_zc(dev, rxq, pbuf, len); - if (SHR_FAILURE(rv)) { - return rv; - } - } - skb = netdev_alloc_skb(kdev->net_dev, RX_BUFF_RSV(pbuf) + rxq->buf_size); - if (unlikely(!skb)) { - return SHR_E_MEMORY; - } - memcpy(skb->data + RX_BUFF_RSV(pbuf), xdp->data, len); - skb_reserve(skb, PDMA_RXB_ALIGN); - xsk_buff_free(xdp); - pbuf->skb = skb; - pbuf->pkb = (struct pkt_buf *)skb->data; - } else -#endif - if (rxq->buf_mode == PDMA_BUF_MODE_PAGE) { - if (pbuf->skb) { - return SHR_E_NONE; - } - dma_sync_single_range_for_cpu(kdev->dev, pbuf->dma, pbuf->page_offset, - rxq->page_size >> 1, DMA_FROM_DEVICE); -#ifdef NGKNET_XDP_NATIVE - if (kdev->xprog_num > 0) { - rv = ngknet_rx_run_xdp(dev, rxq, pbuf, len); - if (SHR_FAILURE(rv)) { - return rv; - } - } -#endif - skb = kal_build_skb(page_address(pbuf->page) + pbuf->page_offset, - PDMA_RXB_SIZE(rxq->buf_size + pbuf->adj)); - if (unlikely(!skb)) { - return SHR_E_MEMORY; - } - skb_reserve(skb, PDMA_RXB_ALIGN); - pbuf->skb = skb; - pbuf->pkb = (struct pkt_buf *)skb->data; - ngknet_rx_page_reuse(dev, rxq, pbuf); - } else { - if (!pbuf->dma) { - return SHR_E_NONE; - } - skb = pbuf->skb; - dma_unmap_single(kdev->dev, pbuf->dma, rxq->buf_size, DMA_FROM_DEVICE); - pbuf->dma = 0; - } - - skb_put(skb, PKT_HDR_SIZE + pbuf->adj + len); - - return SHR_E_NONE; -} - -/*! - * Put Rx buffer - */ -static int -ngknet_rx_buf_put(struct pdma_dev *dev, struct pdma_rx_queue *rxq, - struct pdma_rx_buf *pbuf, int len) -{ - struct ngknet_dev *kdev = (struct ngknet_dev *)dev->priv; - struct sk_buff *skb = pbuf->skb; - -#ifdef NGKNET_XDP_NATIVE - if (rxq->buf_mode == PDMA_BUF_MODE_MAPPED) { - dev_kfree_skb_any(skb); - pbuf->skb = NULL; - } else -#endif - if (rxq->buf_mode == PDMA_BUF_MODE_PAGE) { - dev_kfree_skb_any(skb); - } else { - if (pbuf->pkb != (struct pkt_buf *)skb->data) { - dev_kfree_skb_any(skb); - pbuf->dma = 0; - pbuf->skb = NULL; - return SHR_E_NONE; - } - pbuf->dma = dma_map_single(kdev->dev, RX_BUFF_DMA(pbuf), rxq->buf_size, - DMA_FROM_DEVICE); - if (unlikely(dma_mapping_error(kdev->dev, pbuf->dma))) { - dev_kfree_skb_any(skb); - pbuf->dma = 0; - pbuf->skb = NULL; - return SHR_E_MEMORY; - } - skb_trim(skb, 0); - } - - return SHR_E_NONE; -} - -/*! - * Free Rx buffer - */ -static void -ngknet_rx_buf_free(struct pdma_dev *dev, struct pdma_rx_queue *rxq, - struct pdma_rx_buf *pbuf) -{ - struct ngknet_dev *kdev = (struct ngknet_dev *)dev->priv; - -#ifdef NGKNET_XDP_NATIVE - if (rxq->buf_mode == PDMA_BUF_MODE_MAPPED) { - struct xdp_buff *xdp = (struct xdp_buff *)pbuf->skb; - if (!xdp) { - return; - } -#if (LINUX_VERSION_CODE >= KERNEL_VERSION(6,10,0)) - xsk_buff_dma_sync_for_cpu(xdp); -#else - xsk_buff_dma_sync_for_cpu(xdp, kdev->xsk_pool); -#endif - xsk_buff_free(xdp); - } else -#endif - if (rxq->buf_mode == PDMA_BUF_MODE_PAGE) { - if (!pbuf->page) { - return; - } - kal_dma_unmap_page_attrs(kdev->dev, pbuf->dma, rxq->page_size, - DMA_FROM_DEVICE, NGKNET_RX_DMA_ATTR); - __free_pages(pbuf->page, rxq->page_order); - } else { - if (!pbuf->skb) { - return; - } - dma_unmap_single(kdev->dev, pbuf->dma, rxq->buf_size, DMA_FROM_DEVICE); - dev_kfree_skb_any(pbuf->skb); - } - - pbuf->dma = 0; - pbuf->page = NULL; - pbuf->page_offset = 0; - pbuf->skb = NULL; - pbuf->pkb = NULL; - pbuf->adj = 0; -} - -/*! - * Get Rx buffer mode - */ -static enum buf_mode -ngknet_rx_buf_mode(struct pdma_dev *dev, struct pdma_rx_queue *rxq) -{ - struct ngknet_dev *kdev = (struct ngknet_dev *)dev->priv; - uint32_t len, pgsz = PAGE_SIZE; - int order = 0; - - if (kdev->flags & NGKNET_XSK_ZC) { - return PDMA_BUF_MODE_MAPPED; - } else if (ngknet_page_buffer_mode_get() == 0) { - return PDMA_BUF_MODE_SKB; - } - - len = dev->rx_ph_size ? rxq->buf_size : rxq->buf_size + PDMA_RXB_META; - do { - if (PDMA_RXB_SIZE(len) * 2 <= pgsz) { - rxq->page_order = order; - rxq->page_size = pgsz; - break; - } - order++; - pgsz *= 2; - } while (1); - - return PDMA_BUF_MODE_PAGE; -} - -/*! - * Get Tx buffer - */ -static int -ngknet_tx_buf_get(struct pdma_dev *dev, struct pdma_tx_queue *txq, - struct pdma_tx_buf *pbuf, void *buf) -{ - struct ngknet_dev *kdev = (struct ngknet_dev *)dev->priv; - struct pkt_buf *pkb = (struct pkt_buf *)*(unsigned long *)buf; - struct sk_buff *skb; - dma_addr_t dma; - -#ifdef NGKNET_XDP_NATIVE - if (pkb->pkh.attrs & PDMA_TX_XSK_ZC) { - struct xsk_frame *xskf = container_of(buf, struct xsk_frame, data); - struct xdp_desc *xdpd = xskf->desc; - skb = (struct sk_buff *)xdpd; - pbuf->pkb = pkb; - pbuf->len = pkb->pkh.data_len + TX_META_LEN(pbuf); - if (pkb->pkh.attrs & PDMA_TX_XDP_ACT) { - dma = dma_map_single(kdev->dev, TX_BUFF_DMA(pbuf), pbuf->len, - DMA_TO_DEVICE); - if (unlikely(dma_mapping_error(kdev->dev, dma))) { - return SHR_E_MEMORY; - } - } else { - dma = xsk_buff_raw_get_dma(kdev->xsk_pool, xdpd->addr + PKT_HDR_SIZE); - xsk_buff_raw_dma_sync_for_device(kdev->xsk_pool, dma, pbuf->len); - } - } else if (pkb->pkh.attrs & PDMA_TX_XDP_FRM) { - struct xdp_frame *xdpf = container_of(buf, struct xdp_frame, data); - skb = (struct sk_buff *)xdpf; - pbuf->pkb = pkb; - pbuf->len = pkb->pkh.data_len + TX_META_LEN(pbuf); - dma = dma_map_single(kdev->dev, TX_BUFF_DMA(pbuf), pbuf->len, - DMA_TO_DEVICE); - if (unlikely(dma_mapping_error(kdev->dev, dma))) { - return SHR_E_MEMORY; - } - } else -#endif - { - skb = container_of(buf, struct sk_buff, data); - pbuf->pkb = pkb; - pbuf->len = pkb->pkh.data_len + TX_META_LEN(pbuf); - dma = dma_map_single(kdev->dev, TX_BUFF_DMA(pbuf), pbuf->len, - DMA_TO_DEVICE); - if (unlikely(dma_mapping_error(kdev->dev, dma))) { - dev_kfree_skb_any(skb); - return SHR_E_MEMORY; - } - } - pbuf->dma = dma; - pbuf->skb = skb; - - return SHR_E_NONE; -} - -/*! - * Get Tx buffer DMA address - */ -static void -ngknet_tx_buf_dma(struct pdma_dev *dev, struct pdma_tx_queue *txq, - struct pdma_tx_buf *pbuf, dma_addr_t *addr) -{ - *addr = pbuf->dma; -} - -/*! - * Free Tx buffer - */ -static void -ngknet_tx_buf_free(struct pdma_dev *dev, struct pdma_tx_queue *txq, - struct pdma_tx_buf *pbuf) -{ - struct ngknet_dev *kdev = (struct ngknet_dev *)dev->priv; - struct pkt_buf *pkb = pbuf->pkb; - struct sk_buff *skb = pbuf->skb; - - if (!skb || !pkb) { - return; - } - -#ifdef NGKNET_XDP_NATIVE - if (pkb->pkh.attrs & PDMA_TX_XSK_ZC) { - if (pkb->pkh.attrs & PDMA_TX_XDP_ACT) { - struct xdp_frame *xdpf = (struct xdp_frame *)skb; - dma_unmap_single(kdev->dev, pbuf->dma, pbuf->len, DMA_TO_DEVICE); - xdp_return_frame(xdpf); - } else { - xsk_tx_completed(kdev->xsk_pool, 1); - } - } else if (pkb->pkh.attrs & PDMA_TX_XDP_FRM) { - struct xdp_frame *xdpf = (struct xdp_frame *)skb; - dma_unmap_single(kdev->dev, pbuf->dma, pbuf->len, DMA_TO_DEVICE); - if (pkb->pkh.attrs & PDMA_TX_XDP_ACT) { - page_frag_free(xdpf->data); - } else { - xdp_return_frame(xdpf); - } - } else -#endif - { - dma_unmap_single(kdev->dev, pbuf->dma, pbuf->len, DMA_TO_DEVICE); - dev_kfree_skb_any(skb); - } - - pbuf->dma = 0; - pbuf->len = 0; - pbuf->skb = NULL; - pbuf->pkb = NULL; - pbuf->adj = 0; -} - -static const struct pdma_buf_mngr buf_mngr = { - .ring_buf_alloc = ngknet_ring_buf_alloc, - .ring_buf_free = ngknet_ring_buf_free, - .rx_buf_alloc = ngknet_rx_buf_alloc, - .rx_buf_dma = ngknet_rx_buf_dma, - .rx_buf_avail = ngknet_rx_buf_avail, - .rx_buf_get = ngknet_rx_buf_get, - .rx_buf_put = ngknet_rx_buf_put, - .rx_buf_free = ngknet_rx_buf_free, - .rx_buf_mode = ngknet_rx_buf_mode, - .tx_buf_get = ngknet_tx_buf_get, - .tx_buf_dma = ngknet_tx_buf_dma, - .tx_buf_free = ngknet_tx_buf_free, -}; - -/*! - * Open a device - */ -void -bcmcnet_buf_mngr_init(struct pdma_dev *dev) -{ - dev->ctrl.buf_mngr = (struct pdma_buf_mngr *)&buf_mngr; -} - diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_xdp.c b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_xdp.c deleted file mode 100644 index ab9de6c9d96..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_xdp.c +++ /dev/null @@ -1,415 +0,0 @@ -/*! \file ngknet_xdp.c - * - * NGKNET XDP_NATIVE driver. - * - */ -/* - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - */ - -#include "ngknet_main.h" -#include "ngknet_extra.h" -#include "ngknet_xdp.h" -#include "ngknet_xsk.h" - -#ifdef NGKNET_XDP_NATIVE - -static inline void -ngknet_xdp_pkt_peek(struct net_device *ndev, void *data, int len, int dir) -{ - struct ngknet_private *priv = netdev_priv(ndev); - struct ngknet_dev *dev = priv->bkn_dev; - struct pdma_dev *pdev = &dev->pdma_dev; - int debug = ngknet_debug_level_get(); - - DBG_VERB(("XDP %s packet (%d bytes).\n", - dir == PDMA_Q_TX ? "Tx" : "Rx", len)); - - if (debug & DBG_LVL_PDMP) { - ngknet_pkt_dump(data, len); - } - - if (debug & DBG_LVL_RATE) { - ngknet_pkt_stats(pdev, dir); - } -} - -static int -ngknet_xdp_rx_frame_process(struct net_device *ndev, struct xdp_buff *xdp, uint32_t *mlen) -{ - struct ngknet_private *priv = netdev_priv(ndev); - struct ngknet_dev *dev = priv->bkn_dev; - struct pkt_hdr *pkh = (struct pkt_hdr *)(xdp->data - PKT_HDR_SIZE); - struct ngknet_rcpu_hdr *rch = (struct ngknet_rcpu_hdr *)pkh; - uint8_t meta_len = pkh->meta_len; - - if (priv->netif.flags & NGKNET_NETIF_F_RCPU_ENCAP) { - /* Set up RCPU header */ - memcpy(rch, xdp->data + meta_len, 2 * ETH_ALEN); - if (*(uint32_t *)&dev->rcpu_ctrl.dst_mac[0] != 0 || - *(uint16_t *)&dev->rcpu_ctrl.dst_mac[4] != 0) { - memcpy(rch->dst_mac, dev->rcpu_ctrl.dst_mac, ETH_ALEN); - } - if (*(uint32_t *)&dev->rcpu_ctrl.src_mac[0] != 0 || - *(uint16_t *)&dev->rcpu_ctrl.src_mac[4] != 0) { - memcpy(rch->src_mac, dev->rcpu_ctrl.src_mac, ETH_ALEN); - } - rch->vlan_tpid = htons(dev->rcpu_ctrl.vlan_tpid); - rch->vlan_tci = htons(dev->rcpu_ctrl.vlan_tci); - rch->eth_type = htons(dev->rcpu_ctrl.eth_type); - rch->pkt_sig = htons(dev->rcpu_ctrl.pkt_sig); - rch->op_code = RCPU_OPCODE_RX; - rch->flags = RCPU_FLAG_MODHDR; - rch->trans_id = htons(dev->rcpu_ctrl.trans_id); - rch->data_len = htons(pkh->data_len); - xdp->data = rch; - } else { - /* Remove meta data */ - xdp->data += meta_len; - } - - xdp->data_meta = xdp->data; - *mlen = meta_len; - - return SHR_E_NONE; -} - -static int -ngknet_xdp_tx_frame_process(struct net_device *ndev, struct xdp_frame *xdpf, bool act) -{ - struct ngknet_private *priv = netdev_priv(ndev); - struct ngknet_dev *dev = priv->bkn_dev; - struct pdma_dev *pdev = &dev->pdma_dev; - struct pkt_hdr *pkh = (struct pkt_hdr *)xdpf->data; - struct ngknet_rcpu_hdr *rch = (struct ngknet_rcpu_hdr *)pkh; - unsigned char *data; - uint32_t meta_len, data_len, pkt_len, tag_len; - uint16_t fcs_len = pdev->flags & PDMA_NO_FCS ? 0 : ETH_FCS_LEN; - uint16_t tpid; - - /* Set up packet header */ - if ((priv->netif.flags & NGKNET_NETIF_F_RCPU_ENCAP) && !act) { - /* RCPU encapsulation packet */ - data_len = pkh->attrs & PDMA_TX_HDR_COOKED ? - pkh->data_len : ntohs(rch->data_len); - pkt_len = PKT_HDR_SIZE + rch->meta_len + data_len; - if (xdpf->len != pkt_len || xdpf->len < (PKT_HDR_SIZE + ETH_HLEN)) { - printk(KERN_ERR "Tx drop: Invalid packet length\n"); - return SHR_E_PARAM; - } - if (dev->rcpu_ctrl.pkt_sig && dev->rcpu_ctrl.pkt_sig != ntohs(rch->pkt_sig)) { - printk(KERN_ERR "Tx drop: Invalid packet signature\n"); - return SHR_E_PARAM; - } - if (pkh->attrs & PDMA_TX_HDR_COOKED) { - /* Resumed packet */ - return SHR_E_NONE; - } - - /* Populate internal packet header */ - xdpf->len += fcs_len; - pkh->data_len = data_len + fcs_len; - pkh->meta_len = rch->meta_len; - pkh->attrs = 0; - if (rch->flags & RCPU_FLAG_MODHDR) { - pkh->attrs |= PDMA_TX_HIGIG_PKT; - } - if (rch->flags & RCPU_FLAG_PAUSE) { - pkh->attrs |= PDMA_TX_PAUSE_PKT; - } - if (rch->flags & RCPU_FLAG_PURGE) { - pkh->attrs |= PDMA_TX_PURGE_PKT; - } - if (rch->flags & RCPU_FLAG_BIND_QUE) { - pkh->attrs |= PDMA_TX_BIND_QUE; - } - if (rch->flags & RCPU_FLAG_NO_PAD) { - pkh->attrs |= PDMA_TX_NO_PAD; - } - } else { - /* Non-RCPU encapsulation packet */ - data_len = pkh->data_len; - pkt_len = PKT_HDR_SIZE + pkh->meta_len + data_len; - if (xdpf->len == pkt_len && pkh->attrs & PDMA_TX_HDR_COOKED && - pkh->pkt_sig == dev->rcpu_ctrl.pkt_sig) { - /* Resumed packet */ - return SHR_E_NONE; - } - - /* Populate internal packet header and meta data if used */ - meta_len = 0; - if (priv->netif.type == NGKNET_NETIF_T_PORT || - priv->netif.type == NGKNET_NETIF_T_META) { - meta_len = priv->netif.meta_len; - if (!meta_len) { - printk(KERN_ERR "Tx abort: no metadata\n"); - return SHR_E_UNAVAIL; - } - } - memmove(xdpf->data + PKT_HDR_SIZE + meta_len, xdpf->data, xdpf->len); - xdpf->len += PKT_HDR_SIZE + meta_len + fcs_len; - memset(xdpf->data, 0, PKT_HDR_SIZE + meta_len); - pkh->data_len = xdpf->len - PKT_HDR_SIZE - meta_len; - pkh->meta_len = meta_len; - if (meta_len) { - /* Send to physical port using netif metadata */ - if (priv->netif.meta_off) { - memmove(xdpf->data + PKT_HDR_SIZE, - xdpf->data + PKT_HDR_SIZE + meta_len, - priv->netif.meta_off); - } - memcpy(xdpf->data + PKT_HDR_SIZE + priv->netif.meta_off, - priv->netif.meta_data, priv->netif.meta_len); - pkh->attrs |= PDMA_TX_HIGIG_PKT; - } - pkh->pkt_sig = dev->rcpu_ctrl.pkt_sig; - } - - data = xdpf->data + PKT_HDR_SIZE + pkh->meta_len; - tpid = data[12] << 8 | data[13]; - tag_len = (tpid == ETH_P_8021Q || tpid == ETH_P_8021AD) ? VLAN_HLEN : 0; - - /* Need to add VLAN tag if packet is untagged */ - if (tag_len == 0 && (priv->netif.vlan & 0xfff) != 0 && - (!(pkh->attrs & PDMA_TX_HIGIG_PKT) || - priv->netif.flags & NGKNET_NETIF_F_ADD_TAG)) { - memmove(&data[16], &data[12], pkh->data_len - ETH_ALEN * 2); - data[12] = 0x81; - data[13] = 0x00; - data[14] = priv->netif.vlan >> 8 & 0xf; - data[15] = priv->netif.vlan & 0xff; - pkh->data_len += VLAN_HLEN; - xdpf->len += VLAN_HLEN; - } - - /* Packet header done here */ - pkh->attrs |= PDMA_TX_XDP_FRM | PDMA_TX_HDR_COOKED; - if (act) { - pkh->attrs |= PDMA_TX_XDP_ACT; - } - - return SHR_E_NONE; -} - -static int -ngknet_xdp_frame_xmit(struct net_device *ndev, struct xdp_frame *frame, bool act) -{ - struct ngknet_private *priv = netdev_priv(ndev); - struct ngknet_dev *dev = priv->bkn_dev; - struct pdma_dev *pdev = &dev->pdma_dev; - struct pkt_buf *pkb; - int rv, qi = -1; - - /* Pre-process the Tx packet */ - rv = ngknet_xdp_tx_frame_process(ndev, frame, act); - if (SHR_FAILURE(rv)) { - return rv; - } - - /* Peek the packet for debugging */ - ngknet_xdp_pkt_peek(ndev, frame->data, frame->len, PDMA_Q_TX); - - /* Do Tx */ - pkb = (struct pkt_buf *)frame->data; - ngknet_tx_queue_schedule(dev, pkb, &qi); - if (qi >= 0) { - return pdev->pkt_xmit(pdev, qi, &frame->data); - } - - for (qi = 0; qi < pdev->ctrl.nb_txq; qi++) { - rv = pdev->pkt_xmit(pdev, qi, &frame->data); - if (SHR_SUCCESS(rv)) { - break; - } - } - - return rv; -} - -static int -ngknet_xdp_prog_setup(struct net_device *ndev, struct bpf_prog *prog) -{ - struct ngknet_private *priv = netdev_priv(ndev); - struct ngknet_dev *dev = priv->bkn_dev; - struct bpf_prog *old_prog; - - if (!ngknet_page_buffer_mode_get() && !priv->xsk_zc) { - printk(KERN_ERR "PAGE buffer mode is not enabled for XSK non-ZC\n"); - return -EINVAL; - } - - old_prog = xchg(&priv->xdp_prog, prog); - if (old_prog) { - bpf_prog_put(old_prog); - } - - if (!!prog != !!old_prog) { - if (prog) { - /* Register XDP Rx info */ - if (!xdp_rxq_info_is_reg(&priv->xri)) { -#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5,11,0)) - if (xdp_rxq_info_reg(&priv->xri, ndev, 0, 0) < 0) { -#else - if (xdp_rxq_info_reg(&priv->xri, ndev, 0) < 0) { -#endif - printk(KERN_ERR "XDP Rx info register failed\n"); - return -EINVAL; - } - } - if (!priv->xsk_zc) { - xdp_rxq_info_unreg_mem_model(&priv->xri); - xdp_rxq_info_reg_mem_model(&priv->xri, MEM_TYPE_PAGE_SHARED, NULL); - } -#if (LINUX_VERSION_CODE >= KERNEL_VERSION(6,3,0)) - xdp_features_set_redirect_target(ndev, true); -#endif - dev->xprog_num++; - printk(KERN_CRIT "XDP program attached to ndev%d.\n", priv->netif.id); - } else { -#if (LINUX_VERSION_CODE >= KERNEL_VERSION(6,3,0)) - xdp_features_clear_redirect_target(ndev); -#endif - if (!priv->xsk_zc) { - xdp_rxq_info_unreg(&priv->xri); - } - dev->xprog_num--; - printk(KERN_CRIT "XDP program detached from ndev%d.\n", priv->netif.id); - } - } - - return 0; -} - -int -ngknet_xdp_setup(struct net_device *ndev, struct netdev_bpf *bpf) -{ - switch (bpf->command) { - case XDP_SETUP_PROG: - return ngknet_xdp_prog_setup(ndev, bpf->prog); - case XDP_SETUP_XSK_POOL: - return ngknet_xsk_pool_setup(ndev, bpf->xsk.pool, bpf->xsk.queue_id); - default: - return -EINVAL; - } - - return 0; -} - -int -ngknet_xdp_xmit(struct net_device *ndev, int n, - struct xdp_frame **frames, uint32_t flags) -{ - struct xdp_frame *frame; - int fn, rv; - - if (unlikely(flags & ~XDP_XMIT_FLAGS_MASK)) { - return -EINVAL; - } - - for (fn = 0; fn < n; fn++) { - frame = frames[fn]; - rv = ngknet_xdp_frame_xmit(ndev, frame, false); - if (SHR_FAILURE(rv)) { - break; - } - } - - return fn; -} - -int -ngknet_run_xdp(struct net_device *ndev, struct xdp_buff *xdp) -{ - struct ngknet_private *priv = netdev_priv(ndev); - struct ngknet_dev *dev = priv->bkn_dev; - struct bpf_prog *xdp_prog = priv->xdp_prog; - struct xdp_frame *xdpf; - void *data = xdp->data; - uint32_t mlen; - uint32_t act, xv; - unsigned long flags; - int rv; - - if (!xdp_prog) { - return NGKNET_XDP_PASS; - } - - /* Pre-process the Rx packet */ - ngknet_xdp_rx_frame_process(ndev, xdp, &mlen); - - /* Peek the packet for debugging */ - ngknet_xdp_pkt_peek(ndev, xdp->data, xdp->data_end - xdp->data, PDMA_Q_RX); - - /* Run XDP program and take the action */ - act = bpf_prog_run_xdp(xdp_prog, xdp); - switch (act) { - case XDP_PASS: - xdp->data = data; - xv = NGKNET_XDP_PASS; - break; - case XDP_TX: - xdp->data = data; - xdp->data += mlen; - xdp->data_meta = xdp->data; - xdpf = xdp_convert_buff_to_frame(xdp); - if (unlikely(!xdpf)) { - goto fail; - } - rv = ngknet_xdp_frame_xmit(ndev, xdpf, true); - if (SHR_FAILURE(rv)) { - printk(KERN_ERR "Tx drop: XDP action Tx error %d\n", rv); - goto fail; - } - xv = NGKNET_XDP_TX; - break; - case XDP_REDIRECT: - rv = xdp_do_redirect(ndev, xdp, xdp_prog); - if (rv) { - goto fail; - } - xdp_do_flush(); - xv = NGKNET_XDP_REDIR; - break; - default: -#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5,17,0)) - bpf_warn_invalid_xdp_action(ndev, xdp_prog, act); -#else - bpf_warn_invalid_xdp_action(act); -#endif - fallthrough; - case XDP_ABORTED: -fail: - trace_xdp_exception(ndev, xdp_prog, act); - fallthrough; - case XDP_DROP: - xv = NGKNET_XDP_DROP; - break; - } - - if (xv != NGKNET_XDP_PASS) { - spin_lock_irqsave(&dev->lock, flags); - priv->users--; - if (!priv->users && priv->wait) { - wake_up(&dev->wq); - } - spin_unlock_irqrestore(&dev->lock, flags); - } - - return xv; -} - -#endif /* NGKNET_XDP_NATIVE */ diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_xdp.h b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_xdp.h deleted file mode 100644 index c985bed9347..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_xdp.h +++ /dev/null @@ -1,67 +0,0 @@ -/*! \file ngknet_xdp.h - * - * NGKNET XDP_NATIVE driver header. - * - */ -/* - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - */ - -#ifndef NGKNET_XDP_H -#define NGKNET_XDP_H - -#define NGKNET_XDP_PASS 0 -#define NGKNET_XDP_DROP (1 << 0) -#define NGKNET_XDP_TX (1 << 1) -#define NGKNET_XDP_REDIR (1 << 2) -#define NGKNET_XDP_BUSY (1 << 3) -#define NGKNET_XDP_EXIT (1 << 4) - -#ifdef NGKNET_XDP_NATIVE - -/*! - * \brief Set up XDP. - * - * \param [in] ndev Network device structure. - * \param [in] bpf BPF structure. - */ -extern int -ngknet_xdp_setup(struct net_device *ndev, struct netdev_bpf *bpf); - -/*! - * \brief Tx for XDP. - * - * \param [in] ndev Network device structure. - * \param [in] frames XDP frame structure array. - * \param [in] flags Tx flags. - */ -extern int -ngknet_xdp_xmit(struct net_device *ndev, int n, struct xdp_frame **frames, - uint32_t flags); - -/*! - * \brief Run XDP program. - * - * \param [in] ndev Network device structure. - * \param [in] xdp XDP buffer. - */ -extern int -ngknet_run_xdp(struct net_device *ndev, struct xdp_buff *xdp); - -#endif /* NGKNET_XDP_NATIVE */ - -#endif /* NGKNET_XDP_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_xsk.c b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_xsk.c deleted file mode 100644 index f2d6c86edbd..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_xsk.c +++ /dev/null @@ -1,711 +0,0 @@ -/*! \file ngknet_xsk.c - * - * NGKNET AF_XDP Zero-copy driver. - * - */ -/* - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - */ - -#include "ngknet_main.h" -#include "ngknet_extra.h" -#include "ngknet_xdp.h" -#include "ngknet_xsk.h" - -#ifdef NGKNET_XDP_NATIVE - -/* Some older kernels do not free buffer on error */ -#if LINUX_VERSION_CODE < KERNEL_VERSION(6,6,15) -#define XSK_RCV_ZC_NO_FREE_ON_ERR -#endif -#if (LINUX_VERSION_CODE >= KERNEL_VERSION(6,7,0) && \ - LINUX_VERSION_CODE <= KERNEL_VERSION(6,7,2)) -#define XSK_RCV_ZC_NO_FREE_ON_ERR -#endif - -#define NGKNET_RX_DMA_ATTR (DMA_ATTR_SKIP_CPU_SYNC | DMA_ATTR_WEAK_ORDERING) - -extern int xsk_napi_tx; - -static atomic_t xsk_active; -static wait_queue_head_t xsk_wq; -static struct task_struct *xsk_task; - -static inline void -ngknet_xsk_pkt_peek(struct net_device *ndev, void *data, int len, int dir) -{ - struct ngknet_private *priv = netdev_priv(ndev); - struct ngknet_dev *dev = priv->bkn_dev; - struct pdma_dev *pdev = &dev->pdma_dev; - int debug = ngknet_debug_level_get(); - - DBG_VERB(("XDP ZC %s packet (%d bytes).\n", - dir == PDMA_Q_TX ? "Tx" : "Rx", len)); - - if (debug & DBG_LVL_PDMP) { - ngknet_pkt_dump(data, len); - } - - if (debug & DBG_LVL_RATE) { - ngknet_pkt_stats(pdev, dir); - } -} - -static int -ngknet_xsk_rx_frame_process(struct net_device *ndev, struct xdp_buff *xdp, uint32_t *mlen) -{ - struct ngknet_private *priv = netdev_priv(ndev); - struct ngknet_dev *dev = priv->bkn_dev; - struct pkt_hdr *pkh = (struct pkt_hdr *)(xdp->data - PKT_HDR_SIZE); - struct ngknet_rcpu_hdr *rch = (struct ngknet_rcpu_hdr *)pkh; - uint8_t meta_len = pkh->meta_len; - - if (priv->netif.flags & NGKNET_NETIF_F_RCPU_ENCAP) { - /* Set up RCPU header */ - memcpy(rch, xdp->data + meta_len, 2 * ETH_ALEN); - if (*(uint32_t *)&dev->rcpu_ctrl.dst_mac[0] != 0 || - *(uint16_t *)&dev->rcpu_ctrl.dst_mac[4] != 0) { - memcpy(rch->dst_mac, dev->rcpu_ctrl.dst_mac, ETH_ALEN); - } - if (*(uint32_t *)&dev->rcpu_ctrl.src_mac[0] != 0 || - *(uint16_t *)&dev->rcpu_ctrl.src_mac[4] != 0) { - memcpy(rch->src_mac, dev->rcpu_ctrl.src_mac, ETH_ALEN); - } - rch->vlan_tpid = htons(dev->rcpu_ctrl.vlan_tpid); - rch->vlan_tci = htons(dev->rcpu_ctrl.vlan_tci); - rch->eth_type = htons(dev->rcpu_ctrl.eth_type); - rch->pkt_sig = htons(dev->rcpu_ctrl.pkt_sig); - rch->op_code = RCPU_OPCODE_RX; - rch->flags = RCPU_FLAG_MODHDR; - rch->trans_id = htons(dev->rcpu_ctrl.trans_id); - rch->data_len = htons(pkh->data_len); - xdp->data = rch; - } else { - /* Remove meta data */ - xdp->data += meta_len; - } - - xdp->data_meta = xdp->data; - *mlen = meta_len; - - return SHR_E_NONE; -} - -static int -ngknet_xsk_tx_frame_process(struct net_device *ndev, struct xsk_frame *xskf, bool act) -{ - struct ngknet_private *priv = netdev_priv(ndev); - struct ngknet_dev *dev = priv->bkn_dev; - struct pdma_dev *pdev = &dev->pdma_dev; - struct pkt_hdr *pkh = (struct pkt_hdr *)xskf->data; - struct ngknet_rcpu_hdr *rch = (struct ngknet_rcpu_hdr *)pkh; - unsigned char *data; - uint32_t meta_len, data_len, pkt_len, tag_len; - uint16_t fcs_len = pdev->flags & PDMA_NO_FCS ? 0 : ETH_FCS_LEN; - uint16_t tpid; - - /* Set up packet header */ - if ((priv->netif.flags & NGKNET_NETIF_F_RCPU_ENCAP) && !act) { - /* RCPU encapsulation packet */ - data_len = pkh->attrs & PDMA_TX_HDR_COOKED ? - pkh->data_len : ntohs(rch->data_len); - pkt_len = PKT_HDR_SIZE + rch->meta_len + data_len; - if (xskf->len != pkt_len || xskf->len < (PKT_HDR_SIZE + ETH_HLEN)) { - printk(KERN_ERR "Invalid packet header\n"); - /* Let HW drop the packet */ - data_len = xskf->len - sizeof(struct ngknet_rcpu_hdr); - rch->meta_len = 0; - rch->flags = RCPU_FLAG_MODHDR; - } else if (dev->rcpu_ctrl.pkt_sig && dev->rcpu_ctrl.pkt_sig != ntohs(rch->pkt_sig)) { - printk(KERN_ERR "Invalid packet signature\n"); - } - if (pkh->attrs & PDMA_TX_HDR_COOKED) { - /* Resumed packet */ - return SHR_E_NONE; - } - - /* Populate internal packet header */ - xskf->len += fcs_len; - pkh->data_len = data_len + fcs_len; - pkh->meta_len = rch->meta_len; - pkh->attrs = 0; - if (rch->flags & RCPU_FLAG_MODHDR) { - pkh->attrs |= PDMA_TX_HIGIG_PKT; - } - if (rch->flags & RCPU_FLAG_PAUSE) { - pkh->attrs |= PDMA_TX_PAUSE_PKT; - } - if (rch->flags & RCPU_FLAG_PURGE) { - pkh->attrs |= PDMA_TX_PURGE_PKT; - } - if (rch->flags & RCPU_FLAG_BIND_QUE) { - pkh->attrs |= PDMA_TX_BIND_QUE; - } - if (rch->flags & RCPU_FLAG_NO_PAD) { - pkh->attrs |= PDMA_TX_NO_PAD; - } - } else { - /* Non-RCPU encapsulation packet */ - data_len = pkh->data_len; - pkt_len = PKT_HDR_SIZE + pkh->meta_len + data_len; - if (xskf->len == pkt_len && pkh->attrs & PDMA_TX_HDR_COOKED && - pkh->pkt_sig == dev->rcpu_ctrl.pkt_sig) { - /* Resumed packet */ - return SHR_E_NONE; - } - - /* Populate internal packet header and meta data if used */ - meta_len = 0; - if (priv->netif.type == NGKNET_NETIF_T_PORT || - priv->netif.type == NGKNET_NETIF_T_META) { - meta_len = priv->netif.meta_len; - if (!meta_len) { - printk(KERN_ERR "Tx abort: no metadata\n"); - return SHR_E_UNAVAIL; - } - } - memmove(xskf->data + PKT_HDR_SIZE + meta_len, xskf->data, xskf->len); - xskf->len += PKT_HDR_SIZE + meta_len + fcs_len; - memset(xskf->data, 0, PKT_HDR_SIZE + meta_len); - pkh->data_len = xskf->len - PKT_HDR_SIZE - meta_len; - pkh->meta_len = meta_len; - if (meta_len) { - /* Send to physical port using netif metadata */ - if (priv->netif.meta_off) { - memmove(xskf->data + PKT_HDR_SIZE, - xskf->data + PKT_HDR_SIZE + meta_len, - priv->netif.meta_off); - } - memcpy(xskf->data + PKT_HDR_SIZE + priv->netif.meta_off, - priv->netif.meta_data, priv->netif.meta_len); - pkh->attrs |= PDMA_TX_HIGIG_PKT; - } - pkh->pkt_sig = dev->rcpu_ctrl.pkt_sig; - } - - data = xskf->data + PKT_HDR_SIZE + pkh->meta_len; - tpid = data[12] << 8 | data[13]; - tag_len = (tpid == ETH_P_8021Q || tpid == ETH_P_8021AD) ? VLAN_HLEN : 0; - - /* Need to add VLAN tag if packet is untagged */ - if (tag_len == 0 && (priv->netif.vlan & 0xfff) != 0 && - (!(pkh->attrs & PDMA_TX_HIGIG_PKT) || - priv->netif.flags & NGKNET_NETIF_F_ADD_TAG)) { - memmove(&data[16], &data[12], pkh->data_len - ETH_ALEN * 2); - data[12] = 0x81; - data[13] = 0x00; - data[14] = priv->netif.vlan >> 8 & 0xf; - data[15] = priv->netif.vlan & 0xff; - pkh->data_len += VLAN_HLEN; - xskf->len += VLAN_HLEN; - } - - /* Packet header done here */ - pkh->attrs |= PDMA_TX_XSK_ZC | PDMA_TX_HDR_COOKED; - if (act) { - pkh->attrs |= PDMA_TX_XDP_ACT; - } - - return SHR_E_NONE; -} - -static int -ngknet_xsk_frame_xmit(struct net_device *ndev, void *desc, bool act) -{ - struct ngknet_private *priv = netdev_priv(ndev); - struct ngknet_dev *dev = priv->bkn_dev; - struct pdma_dev *pdev = &dev->pdma_dev; - struct xdp_frame *xdpf; - struct xdp_desc *xdpd; - struct pkt_buf *pkb; - struct xsk_frame xskf; - int rv, qi = -1; - - /* Convert buffer format to support both XSK Tx and XDP action Tx */ - if (act) { - xdpf = (struct xdp_frame *)desc; - xskf.data = xdpf->data; - xskf.len = xdpf->len; - xskf.desc = desc; - } else { - xdpd = (struct xdp_desc *)desc; - xskf.data = xsk_buff_raw_get_data(dev->xsk_pool, xdpd->addr); - xskf.len = xdpd->len; - xskf.desc = xdpd; - } - - /* Pre-process the Tx packet */ - rv = ngknet_xsk_tx_frame_process(ndev, &xskf, act); - if (SHR_FAILURE(rv)) { - return rv; - } - - /* Peek the packet for debugging */ - ngknet_xsk_pkt_peek(ndev, xskf.data, xskf.len, PDMA_Q_TX); - - if (act) { - xdpf->len = xskf.len; - } else { - xdpd->len = xskf.len; - } - - /* Do Tx */ - pkb = (struct pkt_buf *)xskf.data; - ngknet_tx_queue_schedule(dev, pkb, &qi); - if (qi >= 0) { - return pdev->pkt_xmit(pdev, qi, &xskf.data); - } - - return pdev->pkt_xmit(pdev, dev->xsk_queue, &xskf.data); -} - -static bool -ngknet_xsk_frame_get(struct xsk_buff_pool *pool, struct xdp_desc *desc) -{ - static struct xdp_desc desc_c, desc_n; - static bool pending = false; - - if (!pending) { - if (!xsk_tx_peek_desc(pool, &desc_c)) { - if (xsk_uses_need_wakeup(pool)) { - xsk_set_tx_need_wakeup(pool); - } - return false; - } - } - - if (!xsk_tx_peek_desc(pool, &desc_n)) { - if (xsk_uses_need_wakeup(pool)) { - xsk_set_tx_need_wakeup(pool); - } - pending = false; - } else { - pending = true; - } - - *desc = desc_c; - - if (pending) { - desc_c = desc_n; - } - - return true; -} - -static int -ngknet_xsk_xmit(void *data) -{ - struct net_device *ndev = (struct net_device *)data; - struct ngknet_private *priv = netdev_priv(ndev); - struct ngknet_dev *dev = priv->bkn_dev; - static struct xdp_desc desc = {0}; - int rv; - - while (!kthread_should_stop()) { - wait_event_interruptible(xsk_wq, atomic_read(&xsk_active) != 0); - atomic_set(&xsk_active, 0); - if (!dev->xsk_pool) { - break; - } - - while (desc.len || ngknet_xsk_frame_get(dev->xsk_pool, &desc)) { - rv = ngknet_xsk_frame_xmit(ndev, &desc, false); - if (SHR_FAILURE(rv)) { - if (rv == SHR_E_BUSY) { - break; - } else { - xsk_tx_completed(dev->xsk_pool, 1); - printk(KERN_ERR "Tx drop: XSK Tx error %d\n", rv); - } - } - desc.len = 0; - xsk_tx_release(dev->xsk_pool); - } - } - - return 0; -} - -static int -ngknet_xsk_thread_create(struct net_device *ndev) -{ - struct ngknet_private *priv = netdev_priv(ndev); - struct ngknet_dev *dev = priv->bkn_dev; - struct pdma_dev *pdev = &dev->pdma_dev; - struct cpumask mask; - - atomic_set(&xsk_active, 0); - init_waitqueue_head(&xsk_wq); - xsk_task = kthread_run(ngknet_xsk_xmit, ndev, pdev->name); - if (IS_ERR(xsk_task)) { - return -EINVAL; - } - - cpumask_clear(&mask); - cpumask_set_cpu(num_online_cpus() - 1, &mask); - set_cpus_allowed_ptr(xsk_task, &mask); - - return 0; -} - -static void -ngknet_xsk_thread_destroy(void) -{ - atomic_set(&xsk_active, 1); - wake_up_interruptible(&xsk_wq); - kthread_stop(xsk_task); - xsk_task = NULL; -} - -static int -ngknet_xsk_buffer_deploy(struct net_device *ndev, bool enable) -{ - struct ngknet_private *priv = netdev_priv(ndev); - struct ngknet_dev *dev = priv->bkn_dev; - struct pdma_dev *pdev = &dev->pdma_dev; - int rv; - - /* Suspend DMA operation for switching buffer mode */ - pdev->flags |= PDMA_ABORT; - rv = bcmcnet_pdma_dev_suspend(pdev); - if (SHR_FAILURE(rv)) { - return rv; - } - - if (enable) { - dev->flags |= NGKNET_XSK_ZC; - pdev->flags |= PDMA_RX_BATCHING; - } else { - pdev->flags &= ~PDMA_RX_BATCHING; - dev->flags &= ~NGKNET_XSK_ZC; - } - - /* Resume DMA operation and use new buffer mode */ - rv = bcmcnet_pdma_dev_resume(pdev); - if (SHR_FAILURE(rv)) { - return rv; - } - - return rv; -} - -static int -ngknet_xsk_pool_enable(struct net_device *ndev, struct xsk_buff_pool *pool, - uint32_t queue) -{ - struct ngknet_private *priv = netdev_priv(ndev); - struct ngknet_dev *dev = priv->bkn_dev; - struct pdma_dev *pdev = &dev->pdma_dev; - int rv; - - if (dev->xsk_pool) { - /* - * In KNET, all DMA channels are shared by all virtual netdevs, - * and only one common DMA buffer pool can be used. The buffer - * pool should be enabled only on one netdev/queue pair. - */ - printk(KERN_ERR "Only one netdev/queue can work in XSK zero-copy mode\n"); - return -EINVAL; - } - - if (queue >= pdev->ctrl.nb_rxq || queue >= pdev->ctrl.nb_txq) { - return -EINVAL; - } - - rv = xsk_pool_dma_map(pool, dev->dev, NGKNET_RX_DMA_ATTR); - if (rv) { - return rv; - } - - dev->xsk_pool = pool; - dev->xsk_queue = queue; - priv->xsk_zc = true; - - /* Create helper thread for Tx */ - if (!xsk_napi_tx) { - rv = ngknet_xsk_thread_create(ndev); - if (rv < 0) { - xsk_pool_dma_unmap(pool, NGKNET_RX_DMA_ATTR); - dev->xsk_pool = NULL; - return -EINVAL; - } - } - - /* Deploy new buffer pool for XSK ZC */ - rv = ngknet_xsk_buffer_deploy(ndev, true); - if (SHR_FAILURE(rv)) { - xsk_pool_dma_unmap(pool, NGKNET_RX_DMA_ATTR); - dev->xsk_pool = NULL; - return -EINVAL; - } - - /* Register XDP Rx info */ - if (!xdp_rxq_info_is_reg(&priv->xri)) { -#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5,11,0)) - if (xdp_rxq_info_reg(&priv->xri, ndev, 0, 0) < 0) { -#else - if (xdp_rxq_info_reg(&priv->xri, ndev, 0) < 0) { -#endif - ngknet_xsk_thread_destroy(); - xsk_pool_dma_unmap(pool, NGKNET_RX_DMA_ATTR); - dev->xsk_pool = NULL; - printk(KERN_ERR "XDP Rx info register failed\n"); - return -EINVAL; - } - } - - xdp_rxq_info_unreg_mem_model(&priv->xri); - xdp_rxq_info_reg_mem_model(&priv->xri, MEM_TYPE_XSK_BUFF_POOL, NULL); - xsk_pool_set_rxq_info(pool, &priv->xri); - - printk(KERN_CRIT "XSK buffer pool enabled.\n"); - - return 0; -} - -static int -ngknet_xsk_pool_disable(struct net_device *ndev, uint32_t queue) -{ - struct ngknet_private *priv = netdev_priv(ndev); - struct ngknet_dev *dev = priv->bkn_dev; - struct xsk_buff_pool *pool; - - if (!dev->xsk_pool) { - return 0; - } - - pool = xsk_get_pool_from_qid(ndev, queue); - if (!pool || pool != dev->xsk_pool) { - return -EINVAL; - } - - /* Restore old buffer mode */ - ngknet_xsk_buffer_deploy(ndev, false); - - xsk_pool_dma_unmap(pool, NGKNET_RX_DMA_ATTR); - - if (priv->xdp_prog) { - xdp_rxq_info_unreg_mem_model(&priv->xri); - xdp_rxq_info_reg_mem_model(&priv->xri, MEM_TYPE_PAGE_SHARED, NULL); - } else { - xdp_rxq_info_unreg(&priv->xri); - } - - dev->xsk_pool = NULL; - priv->xsk_zc = false; - - /* Destroy Tx helper thread */ - if (!xsk_napi_tx) { - ngknet_xsk_thread_destroy(); - } - - printk(KERN_CRIT "XSK buffer pool disabled.\n"); - - return 0; -} - -int -ngknet_xsk_pool_setup(struct net_device *ndev, struct xsk_buff_pool *pool, - uint32_t queue) -{ - return pool ? ngknet_xsk_pool_enable(ndev, pool, queue) : - ngknet_xsk_pool_disable(ndev, queue); -} - -int -ngknet_xsk_wakeup(struct net_device *ndev, uint32_t queue, uint32_t flags) -{ - struct ngknet_private *priv = netdev_priv(ndev); - struct ngknet_dev *dev = priv->bkn_dev; - struct pdma_dev *pdev = &dev->pdma_dev; - struct intr_handle *hdl; - struct napi_struct *napi; - unsigned long qbm; - int qi; - - if (xsk_uses_need_wakeup(dev->xsk_pool)) { - xsk_clear_rx_need_wakeup(dev->xsk_pool); - xsk_clear_tx_need_wakeup(dev->xsk_pool); - } - - /* Schedule NAPI to Tx or fill Rx buffers */ - qbm = pdev->ctrl.grp[0].bm_rxq | pdev->ctrl.grp[0].bm_txq; - for (qi = 0; qi < pdev->grp_queues; qi++) { - if (!(pdev->flags & PDMA_GROUP_INTR) && !(1 << qi & qbm)) { - continue; - } - hdl = &pdev->ctrl.grp[0].intr_hdl[qi]; - napi = (struct napi_struct *)hdl->priv; - if (!napi_if_scheduled_mark_missed(napi) && napi_schedule_prep(napi)) { - local_bh_disable(); - __napi_schedule(napi); - local_bh_enable(); - } - if (pdev->flags & PDMA_GROUP_INTR) { - break; - } - } - - /* Schedule helper thread for Tx */ - if (!xsk_napi_tx) { - atomic_set(&xsk_active, 1); - wake_up_interruptible(&xsk_wq); - } - - return 0; -} - -int -ngknet_xsk_napi_tx(struct ngknet_dev *dev, struct intr_handle *hdl, int budget) -{ - struct xsk_buff_pool *pool = dev->xsk_pool; - struct pdma_dev *pdev = &dev->pdma_dev; - static struct xdp_desc desc = {0}; - int queue = pdev->flags & PDMA_GROUP_INTR ? 0 : dev->xsk_queue; - int rv, done = 0; - - if (hdl->queue != queue || hdl->dir != PDMA_Q_TX) { - return 0; - } - - if (!desc.len) { - if (xsk_uses_need_wakeup(pool)) { - xsk_set_tx_need_wakeup(pool); - } - } - - while (done < budget) { - if (!desc.len && !xsk_tx_peek_desc(pool, &desc)) { - break; - } - rv = ngknet_xsk_frame_xmit(dev->net_dev, &desc, false); - if (SHR_FAILURE(rv) && rv != SHR_E_BUSY) { - xsk_tx_completed(pool, 1); - desc.len = 0; - printk(KERN_ERR "Tx drop: XSK Tx error %d\n", rv); - continue; - } else if (rv == SHR_E_BUSY) { - return done; - } - desc.len = 0; - done++; - } - - if (done) { - xsk_tx_release(pool); - } - - return done; -} - -int -ngknet_run_xdp_zc(struct net_device *ndev, struct xdp_buff *xdp) -{ - struct ngknet_private *priv = netdev_priv(ndev); - struct ngknet_dev *dev = priv->bkn_dev; - struct bpf_prog *xdp_prog = priv->xdp_prog; - struct xdp_frame *xdpf; - void *data = xdp->data; - uint32_t mlen; - uint32_t act, xv; - unsigned long flags; - int rv; - - if (!xdp_prog) { - return NGKNET_XDP_PASS; - } - - /* Pre-process the Rx packet */ - ngknet_xsk_rx_frame_process(ndev, xdp, &mlen); - - /* Peek the packet for debugging */ - ngknet_xsk_pkt_peek(ndev, xdp->data, xdp->data_end - xdp->data, PDMA_Q_RX); - - /* Run XDP program and take the action */ - act = bpf_prog_run_xdp(xdp_prog, xdp); - switch (act) { - case XDP_PASS: - xdp->data = data; - xv = NGKNET_XDP_PASS; - break; - case XDP_TX: - xdp->data = data + mlen; - xdp->data_meta = xdp->data; - xdpf = xdp_convert_buff_to_frame(xdp); - if (unlikely(!xdpf)) { - xv = NGKNET_XDP_DROP; - printk(KERN_ERR "Tx drop: XDP frame convert failed\n"); - goto fail; - } - xv = NGKNET_XDP_TX; - rv = ngknet_xsk_frame_xmit(ndev, xdpf, true); - if (SHR_FAILURE(rv)) { - printk(KERN_ERR "Tx drop: XDP action Tx error %d\n", rv); - xdp_return_frame(xdpf); - goto fail; - } - break; - case XDP_REDIRECT: - rv = xdp_do_redirect(ndev, xdp, xdp_prog); - if (rv) { - if (xsk_uses_need_wakeup(dev->xsk_pool) && - (rv == -ENOBUFS || rv == -ENOSPC)) { - xdp->data = data; -#ifdef XSK_RCV_ZC_NO_FREE_ON_ERR - xv = NGKNET_XDP_BUSY; -#else - xv = NGKNET_XDP_EXIT; - printk(KERN_INFO "Redir drop: Rx ring is full\n"); -#endif - } else { - xv = NGKNET_XDP_DROP; - printk(KERN_ERR "Redir drop: error %d\n", rv); - } - goto fail; - } - xdp_do_flush(); - xv = NGKNET_XDP_REDIR; - break; - case XDP_DROP: - xv = NGKNET_XDP_DROP; - break; - default: -#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5,17,0)) - bpf_warn_invalid_xdp_action(ndev, xdp_prog, act); -#else - bpf_warn_invalid_xdp_action(act); -#endif - fallthrough; - case XDP_ABORTED: - xv = NGKNET_XDP_DROP; -fail: - trace_xdp_exception(ndev, xdp_prog, act); - } - - if (xv != NGKNET_XDP_PASS) { - spin_lock_irqsave(&dev->lock, flags); - priv->users--; - if (!priv->users && priv->wait) { - wake_up(&dev->wq); - } - spin_unlock_irqrestore(&dev->lock, flags); - } - - return xv; -} - -#endif /* NGKNET_XDP_NATIVE */ diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_xsk.h b/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_xsk.h deleted file mode 100644 index 9fc84938acc..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/linux/knet/ngknet_xsk.h +++ /dev/null @@ -1,85 +0,0 @@ -/*! \file ngknet_xsk.h - * - * NGKNET AF_XDP Zero-copy driver header. - * - */ -/* - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - */ - -#ifndef NGKNET_XSK_H -#define NGKNET_XSK_H - -#ifdef NGKNET_XDP_NATIVE - -/*! - * \brief XSK frame. - */ -struct xsk_frame { - /*! Data buffer */ - void *data; - - /*! Data length */ - uint32_t len; - - /*! Original descriptor, struct xdp_desc or struct xdp_frame */ - void *desc; -}; - -/*! - * \brief Set up XSK buffer pool. - * - * \param [in] ndev Network device structure. - * \param [in] pool XSK buffer poll structure. - * \param [in] queue queue bound to XSK buffer bool. - */ -extern int -ngknet_xsk_pool_setup(struct net_device *ndev, struct xsk_buff_pool *pool, - uint32_t queue); - -/*! - * \brief Wake up Rx/Tx on queue. - * - * \param [in] ndev Network device structure. - * \param [in] queue queue bound to XSK buffer bool. - * \param [in] flags flags for Rx or Tx. - */ -extern int -ngknet_xsk_wakeup(struct net_device *ndev, uint32_t queue, uint32_t flags); - -/*! - * \brief XSK Tx by NAPI. - * - * \param [in] ndev NGKNET device structure. - * \param [in] hdl Interrupt handler. - * \param [in] budget budget for Rx or Tx. - */ -extern int -ngknet_xsk_napi_tx(struct ngknet_dev *dev, struct intr_handle *hdl, int budget); - -/*! - * \brief Run XDP program for XSK ZC. - * - * \param [in] ndev Network device structure. - * \param [in] xdp XDP buffer. - */ -extern int -ngknet_run_xdp_zc(struct net_device *ndev, struct xdp_buff *xdp); - -#endif /* NGKNET_XDP_NATIVE */ - -#endif /* NGKNET_XSK_H */ diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knetcb/Kbuild b/platform/broadcom/saibcm-modules/sdklt/linux/knetcb/Kbuild deleted file mode 100644 index 383aab45a14..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/linux/knetcb/Kbuild +++ /dev/null @@ -1,40 +0,0 @@ -# -*- Kbuild -*- -# -# Linux KNET Callback module. -# -# Copyright 2018-2025 Broadcom. All rights reserved. -# The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License -# version 2 as published by the Free Software Foundation. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# A copy of the GNU General Public License version 2 (GPLv2) can -# be found in the LICENSES folder. -# - -ifneq ($(OUTPUT_DIR),) -INCLUDES := -I$(OUTPUT_DIR)/knet/generated/include -I$(OUTPUT_DIR)/knet/generated -endif -obj-m := linux_ngknetcb.o - -ccflags-y := $(SDK_PMD_KFLAGS) $(LKM_CFLAGS) $(LKM_CPPFLAGS) \ - -I$(SDK)/shr/include \ - -I$(SDK)/bcmdrd/include \ - -I$(SDK)/bcmltd/include \ - -I$(SDK)/bcmlrd/include \ - -I$(SDK)/bcmcnet/include \ - -I$(SDK)/linux/include \ - -I$(SDK)/linux/knetcb \ - -I$(SDK)/linux/knet \ - -I$(SDK)/linux/knet/generated/include \ - -I$(SDK)/linux/knet/generated \ - $(INCLUDES) - -linux_ngknetcb-y := $(SDK_PMD_KOBJS) \ - ngknetcb_main.o diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/knetcb/Makefile b/platform/broadcom/saibcm-modules/sdklt/linux/knetcb/Makefile deleted file mode 100644 index 44e220ec19f..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/linux/knetcb/Makefile +++ /dev/null @@ -1,54 +0,0 @@ -# -# Copyright 2018-2025 Broadcom. All rights reserved. -# The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License -# version 2 as published by the Free Software Foundation. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# A copy of the GNU General Public License version 2 (GPLv2) can -# be found in the LICENSES folder. -# -# Linux KNET Callback module. -# - -# Include PMD library by default -ifneq (0,$(KPMD)) - -# Kernel module source directory -KMODDIR = $(CURDIR) - -# Avoid creating links in original kernel module source directory -GENDIR = $(KMODDIR)/generated -ifneq ($(OUTPUT_DIR),) -GENDIR = $(OUTPUT_DIR)/knet/generated/knetcb -endif -knetcb: kpmd - $(MAKE) -C $(GENDIR) all - -# SDK make helper for stand-alone PMD kernel module -include $(SDK)/make/kpmd.mk - -distclean:: - rm -rf $(GENDIR) - -endif # KPMD - -include Kbuild - -ifeq ($(KERNELRELEASE),) - -MOD_NAME = linux_ngknetcb - -include $(SDK)/make/lkm.mk - -endif - -.PHONY: distclean - -distclean:: diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/ptpclock/Kbuild b/platform/broadcom/saibcm-modules/sdklt/linux/ptpclock/Kbuild deleted file mode 100644 index 34d484be6e5..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/linux/ptpclock/Kbuild +++ /dev/null @@ -1,30 +0,0 @@ -# -*- Kbuild -*- -# -# Linux PTP Clock module. -# -# Copyright 2018-2025 Broadcom. All rights reserved. -# The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License -# version 2 as published by the Free Software Foundation. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# A copy of the GNU General Public License version 2 (GPLv2) can -# be found in the LICENSES folder. -# - -obj-m := linux_ngptpclock.o - -ccflags-y := $(LKM_CFLAGS) $(LKM_CPPFLAGS) \ - -I$(SDK)/shr/include \ - -I$(SDK)/bcmdrd/include \ - -I$(SDK)/linux/include \ - -I$(SDK)/linux/knet/include \ - -I$(SDK)/linux/knet - -linux_ngptpclock-y := ngptpclock_main.o diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/ptpclock/Makefile b/platform/broadcom/saibcm-modules/sdklt/linux/ptpclock/Makefile deleted file mode 100644 index ae866076f30..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/linux/ptpclock/Makefile +++ /dev/null @@ -1,32 +0,0 @@ -# -# Copyright 2018-2025 Broadcom. All rights reserved. -# The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License -# version 2 as published by the Free Software Foundation. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# A copy of the GNU General Public License version 2 (GPLv2) can -# be found in the LICENSES folder. -# -# Linux PTP clock module. -# - -include Kbuild - -ifeq ($(KERNELRELEASE),) - -MOD_NAME = linux_ngptpclock - -include $(SDK)/make/lkm.mk - -endif - -.PHONY: distclean - -distclean:: diff --git a/platform/broadcom/saibcm-modules/sdklt/linux/st/ngst_main.c b/platform/broadcom/saibcm-modules/sdklt/linux/st/ngst_main.c deleted file mode 100644 index d5f1132137c..00000000000 --- a/platform/broadcom/saibcm-modules/sdklt/linux/st/ngst_main.c +++ /dev/null @@ -1,269 +0,0 @@ -/*! \file ngst_main.c - * - * Streaming Telemetry support module entry. - * - */ -/* - * - * Copyright 2018-2025 Broadcom. All rights reserved. - * The term 'Broadcom' refers to Broadcom Inc. and/or its subsidiaries. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * A copy of the GNU General Public License version 2 (GPLv2) can - * be found in the LICENSES folder. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -/*! \cond */ -MODULE_AUTHOR("Broadcom"); -MODULE_DESCRIPTION("Streaming Telemetry Support Module"); -MODULE_LICENSE("GPL"); -/*! \endcond */ - -/*! Switch device descriptor. */ -typedef struct st_dev_s { - - /*! Logical address of DMA pool. */ - void *dma_vaddr; - - /*! Logical address of buffer pool. */ - void *dma_buff_addr_va; - - /*! Physical address of DMA pool. */ - dma_addr_t dma_handle; - - /*! Size of DMA memory (in bytes). */ - size_t dma_size; - - /*! Buffer chunk size (in bytes). */ - uint32_t buff_chunk_size; - - /*! Buffer chunk count. */ - uint32_t buff_chunk_cnt; - - /*! Buffer read pointer. */ - uint32_t buff_rd_ptr; - - /*! Buffer write pointer. */ - uint32_t buff_wr_ptr; - - /*! Linux DMA device associated with DMA pool. */ - struct device *dma_dev; - -} st_dev_t; - -static st_dev_t stdev; - -static struct task_struct *ngst_kthread; - -static const struct genl_multicast_group ngst_genl_mcgrps[] = { - { .name = NGST_GENL_MCGRP_NAME }, -}; - -static struct genl_family ngst_genl_family = { - .name = NGST_GENL_FAMILY_NAME, - .version = NGST_GENL_VERSION, - .module = THIS_MODULE, - .mcgrps = ngst_genl_mcgrps, - .n_mcgrps = ARRAY_SIZE(ngst_genl_mcgrps), -}; - -/*! Send netlink message to user-space. */ -static inline void -ngst_nl_msg_send(int cmd, const char *payload, uint32_t payload_size) -{ - void *gnlh; - struct sk_buff *skb_out; - - skb_out = genlmsg_new(payload_size, GFP_KERNEL); - if (!skb_out) { - printk(KERN_INFO "Failed genlmsg_new()\n"); - return; - } - gnlh = genlmsg_put(skb_out, 0, 0, &ngst_genl_family, 0, cmd); - memcpy(gnlh, payload, payload_size); - - genlmsg_multicast(&ngst_genl_family, skb_out, 0, 0, GFP_KERNEL); - return; -} - - -static int -ngst_send_msgs_to_user(void *data) -{ - void *cur_dma_vaddr = NULL; - - while (!kthread_should_stop()) { - if (!stdev.dma_vaddr) { - msleep(10); - continue; - } - stdev.buff_wr_ptr = *((uint32_t *)(stdev.dma_vaddr)); - - if (stdev.buff_wr_ptr != stdev.buff_rd_ptr) { - cur_dma_vaddr = stdev.dma_buff_addr_va + - (stdev.buff_rd_ptr * stdev.buff_chunk_size); - ngst_nl_msg_send(NGST_CMD_DATA_RSP, cur_dma_vaddr, stdev.buff_chunk_size); - if (++stdev.buff_rd_ptr == stdev.buff_chunk_cnt) { - stdev.buff_rd_ptr = 0; - } - memset(cur_dma_vaddr, 0, stdev.buff_chunk_size); - continue; - } - usleep_range(NGST_IDLE_USLEEP_MIN, NGST_IDLE_USLEEP_MAX); - } - return 0; -} - -/*! - * Generic module functions - */ - -static int -ngst_open(struct inode *inode, struct file *filp) -{ - return 0; -} - -static int -ngst_release(struct inode *inode, struct file *filp) -{ - return 0; -} - -static long -ngst_ioctl(struct file *file, unsigned int cmd, unsigned long arg) -{ - struct ngst_ioc_dma_info_s ioc; - - switch (cmd) { - case NGST_IOC_DMA_INFO: - if (copy_from_user(&ioc, - (struct ngst_ioc_dma_info_s __user *)arg, - sizeof(ioc))) - return -EFAULT; - - if (ioc.chunk_cnt == 0 || ioc.size == 0) { - return 0; - } - stdev.dma_dev = ngbde_kapi_dma_dev_get(ioc.unit); - if (!stdev.dma_dev) { - printk(KERN_INFO "Not Found ST dev %d\n", ioc.unit); - return -EFAULT; - } - - if (!stdev.dma_vaddr) { - stdev.buff_wr_ptr = 0; - stdev.buff_rd_ptr = 0; - /* Including write pointer size */ - stdev.dma_size = ioc.size + sizeof(uint32_t); - stdev.dma_vaddr = dma_alloc_coherent(stdev.dma_dev, - stdev.dma_size, - &stdev.dma_handle, - GFP_KERNEL); - if (!stdev.dma_vaddr) { - printk(KERN_ERR "Error allocating DMA buffer\n"); - return -ENOMEM; - } else { - printk(KERN_INFO "DMA buffer allocated successfully\n"); - } - memset(stdev.dma_vaddr, 0, stdev.dma_size); - stdev.dma_buff_addr_va = stdev.dma_vaddr + sizeof(uint32_t); - - stdev.buff_chunk_cnt = ioc.chunk_cnt; - stdev.buff_chunk_size = ioc.size / ioc.chunk_cnt; - ngst_genl_family.hdrsize = stdev.buff_chunk_size; - } else { - if ((stdev.buff_chunk_cnt != ioc.chunk_cnt) || - (stdev.buff_chunk_size != ioc.size / ioc.chunk_cnt)) { - printk(KERN_ERR "DMA buffer is already allocated\n"); - return -EFAULT; - } - } - - ioc.paddr = (uint64_t)stdev.dma_handle; - if (copy_to_user((struct ngst_ioc_dma_info_s __user *)arg, - &ioc, sizeof(ioc))) - return -EFAULT; - break; - - default: - return -EINVAL; - } - return 0; -} - -static struct file_operations ngst_fops = { - .open = ngst_open, - .release = ngst_release, - .unlocked_ioctl = ngst_ioctl, - .compat_ioctl = ngst_ioctl, -}; - -static void __exit -ngst_exit_module(void) -{ - if (ngst_kthread) { - kthread_stop(ngst_kthread); - ngst_kthread = NULL; - } - - unregister_chrdev(NGST_MODULE_MAJOR, NGST_MODULE_NAME); - - genl_unregister_family(&ngst_genl_family); - - if (stdev.dma_vaddr) { - dma_free_coherent(stdev.dma_dev, stdev.dma_size, - stdev.dma_vaddr, stdev.dma_handle); - } - printk(KERN_INFO "Broadcom NGST unloaded successfully\n"); -} - -static int __init -ngst_init_module(void) -{ - int rv; - - rv = register_chrdev(NGST_MODULE_MAJOR, NGST_MODULE_NAME, &ngst_fops); - if (rv < 0) { - printk(KERN_WARNING "%s: can't get major %d\n", - NGST_MODULE_NAME, NGST_MODULE_MAJOR); - return rv; - } - - rv = genl_register_family(&ngst_genl_family); - if (rv) { - printk(KERN_WARNING "%s: Unable to create netlink socket\n", - NGST_MODULE_NAME); - return -EFAULT; - } - - ngst_kthread = kthread_run(ngst_send_msgs_to_user, NULL, "ngst_send_msgs_to_user"); - if (IS_ERR(ngst_kthread)) { - return PTR_ERR(ngst_kthread); - } - - printk(KERN_INFO "Broadcom NGST loaded successfully\n"); - return 0; -} - -module_exit(ngst_exit_module); -module_init(ngst_init_module); diff --git a/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/Makefile b/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/Makefile deleted file mode 100644 index 320f7bc8d2e..00000000000 --- a/platform/broadcom/saibcm-modules/systems/bde/linux/kernel/Makefile +++ /dev/null @@ -1,154 +0,0 @@ -# -*- Makefile -*- -# $Id: Makefile,v 1.18 Broadcom SDK $ -# -# $Copyright: 2017-2025 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ -# -# -# -# Makefile for Linux kernel BDE -# -LOCALDIR = systems/bde/linux/kernel - -# Make sure we build for the kernel if this is a user-mode build -ifneq ($(platform), ) -override-target=linux-$(platform) -endif - -include $(SDK)/make/Make.config - -LIBS = $(LIBDIR)/libkern.a - -# need to add vpath sources -VPATH = ../shared - -# Add the srcs to be found by vpath -LSRCS += mpool.c - -# Add shared BDE sources -VPATH += ../../shared -LSRCS += shbde_pci.c shbde_iproc.c shbde_mdio.c -CFLAGS += -I../../shared/include - -ifeq (1,$(THREAD_SANITIZER_IS_ACTIVE)) -# { - $(warning ./systems/bde/linux/kernel/Makefile. Do not apply THREAD SANITIZER to kernel objects) - override CFLAGS := $(subst -fsanitize=thread, ,$(CFLAGS)) -# } -endif - -LHDRS += mpool.h -LOBJS = $(addsuffix .o, $(basename $(LSRCS))) -BOBJS = $(addprefix $(BLDDIR)/,$(LOBJS)) -# -# For 'NO_PRECOMPILED_MODULE', the first kernel compilation is done -# in systems/bde/linux/kernel (and not in systems/bde/linux/kernel/kernel_module, -# which is not even created). -# All the definitions above are for the first cycle of module compilation -# -PWD := $(shell pwd) - -KERNEL_MODULE_DIR = kernel_module - -THIS_MOD_NAME := linux-kernel-bde -MODULE = $(LIBDIR)/$(THIS_MOD_NAME).o -KMODULE = $(LIBDIR)/$(THIS_MOD_NAME).ko - -build: $(KMODULE) - -ifeq (1,$(NO_PRECOMPILED_MODULE)) -# { -# -# These are the objects which need to be compiled, in the kernel, to -# created the module object file. -# -SRCS_COMPOSING = linux_shbde.c linux_dma.c ../shared/mpool.o $(THIS_MOD_NAME).c ../../shared/shbde_pci.o ../../shared/shbde_iproc.o ../../shared/shbde_mdio.o ../../../linux/kernel/modules/shared/gmodule.o -OBJECTS_COMPOSING = "linux_shbde.o linux_dma.o mpool.o $(THIS_MOD_NAME)-file.o shbde_pci.o shbde_iproc.o shbde_mdio.o gmodule.o" - -module: $(KMODULE) - -# -# Note that for NO_PRECOMPILED_MODULE, the subdirectory 'systems/bde/linux/kernel/kernel_module' -# is not created and all action is done in systems/bde/linux/kernel -# -$(KMODULE): $(SRCS_COMPOSING) - mkdir -p $(BLDDIR) - rm -fr $(BLDDIR)/$(KERNEL_MODULE_DIR) - rm -f $(BLDDIR)/*.c - rm -f $(BLDDIR)/*.o - rm -f $(BLDDIR)/*.ko - cp ${SDK}/make/Makefile.linux-kmodule $(BLDDIR)/Makefile - # - # Here we copy all source files, which are required for the - # compilation of the module, into one directory. It seems that - # specifying path for 'remote' files is not acceptable for - # the module-creation mechanism in the kernel. - # - cp ./*.c $(BLDDIR)/ - cp ./*.h $(BLDDIR)/ - cp ../shared/*.c $(BLDDIR)/ - cp ../../shared/*.c $(BLDDIR)/ - cp ../../../linux/kernel/modules/shared/*.c $(BLDDIR)/ - # - # We change here the name of the 'base' file since, it seems, the module-creation - # mechanism does not add symbols when the name of one of the files is the same as - # the name of the module itself. - # - mv $(BLDDIR)/$(THIS_MOD_NAME).c $(BLDDIR)/$(THIS_MOD_NAME)-file.c - MOD_OBJS=$(OBJECTS_COMPOSING) MOD_NAME=$(THIS_MOD_NAME) $(MAKE) -C $(BLDDIR) $(THIS_MOD_NAME).ko LOC_BLDDIR=$(BLDDIR) LOC_SRCDIR=$(PWD) -# } -else -# { -module: $(MODULE) -# -# This is for the compilation of the 'precompiled' object. We keep it -# here for compatibility. -# -$(MODULE): $(BLDDIR)/.tree $(BOBJS) kernel_libs - mkdir -p $(@D) - $(LD) $(MODULE_LDFLAGS) -r -d $(BOBJS) $(LIBS) -o $@ -$(KMODULE): $(MODULE) - rm -fr $(BLDDIR)/$(KERNEL_MODULE_DIR) - mkdir $(BLDDIR)/$(KERNEL_MODULE_DIR) - cp ${SDK}/make/Makefile.linux-kmodule $(BLDDIR)/$(KERNEL_MODULE_DIR)/Makefile - MOD_NAME=$(THIS_MOD_NAME) $(MAKE) -C $(BLDDIR)/$(KERNEL_MODULE_DIR) $(THIS_MOD_NAME).ko - -include $(SDK)/make/Make.depend -# } -endif - -kernel_libs: - $(MAKE) -C $(SDK)/systems/linux/kernel/modules/shared - -# Make.depend is before clean:: so that Make.depend's clean:: runs first. - -clean:: - $(MAKE) -C $(SDK)/systems/linux/kernel/modules/shared $@ - $(RM) $(BOBJS) $(MODULE) - $(RM) $(BLDDIR)/$(KERNEL_MODULE_DIR) - -distclean:: - -.PHONY: build kernel_libs diff --git a/platform/broadcom/saibcm-modules/systems/bde/linux/user/kernel/Makefile b/platform/broadcom/saibcm-modules/systems/bde/linux/user/kernel/Makefile deleted file mode 100644 index def9206756c..00000000000 --- a/platform/broadcom/saibcm-modules/systems/bde/linux/user/kernel/Makefile +++ /dev/null @@ -1,138 +0,0 @@ -# -*- Makefile -*- -# $Id: Makefile,v 1.13 Broadcom SDK $ -# -# $Copyright: 2017-2025 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ -# -# -# -LOCALDIR = systems/bde/linux/user/kernel - -# Make sure we build for the kernel if this is a user-mode build -ifneq ($(platform), ) -override-target=linux-$(platform) -endif - -include $(SDK)/make/Make.config - -ifeq (1,$(THREAD_SANITIZER_IS_ACTIVE)) -# { - $(warning ./systems/bde/linux/user/kernel/Makefile. Do not apply THREAD SANITIZER to kernel objects) - CFLAGS := $(subst -fsanitize=thread, ,$(CFLAGS)) -# } -endif - -LIBS = $(LIBDIR)/libkern.a - -KERNEL_MODULE_DIR = kernel_module -THIS_MOD_NAME := linux-user-bde -MODULE = $(LIBDIR)/$(THIS_MOD_NAME).o -KMODULE = $(LIBDIR)/$(THIS_MOD_NAME).ko -build: module $(KMODULE) - -ifeq (1,$(NO_PRECOMPILED_MODULE)) -# { -# -# For 'NO_PRECOMPILED_MODULE', the first kernel compilation is done -# in systems/bde/linux/user/kernel (and not in systems/bde/linux/user/kernel/kernel_module, -# which is not even created). -# KBUILD_EXTRA_SYMBOLS exports the symbols created on the first module compilation to -# all other module compilations. -# -KBUILD_EXTRA_SYMBOLS := ${BLDDIR}/../../kernel/Module.symvers -export KBUILD_EXTRA_SYMBOLS -# -# These are the objects which need to be compiled, in the kernel, to -# created the module object file. -# -SRCS_COMPOSING = $(THIS_MOD_NAME).c ../../../../linux/kernel/modules/shared/gmodule.c -OBJECTS_COMPOSING = "$(THIS_MOD_NAME)-file.o gmodule.o" -# -# Note that for NO_PRECOMPILED_MODULE, the subdirectory 'systems/bde/linux/user/kernel/kernel_module' -# is not created and all action is done in systems/bde/linux/user/kernel -# -module: $(KMODULE) - -# -# Note that for NO_PRECOMPILED_MODULE, the subdirectory 'systems/bde/linux/kernel/kernel_module' -# is not created and all action is done in systems/bde/linux/kernel -# -$(KMODULE): $(SRCS_COMPOSING) - mkdir -p $(BLDDIR) - rm -fr $(BLDDIR)/$(KERNEL_MODULE_DIR) - rm -f $(BLDDIR)/*.c - rm -f $(BLDDIR)/*.o - rm -f $(BLDDIR)/*.ko - cp ${SDK}/make/Makefile.linux-kmodule $(BLDDIR)/Makefile - cp ./*.c $(BLDDIR)/ - cp ./*.h $(BLDDIR)/ - cp ../../../../linux/kernel/modules/shared/*.c $(BLDDIR)/ - cat ${KBUILD_EXTRA_SYMBOLS} > $(BLDDIR)/Module.symvers - # - # We change here the name of the 'base' file since, it seems, the module-creation - # mechanism does not add symbols when the name of one of the files is the same as - # the name of the module itself. - # - mv $(BLDDIR)/$(THIS_MOD_NAME).c $(BLDDIR)/$(THIS_MOD_NAME)-file.c - MOD_OBJS=$(OBJECTS_COMPOSING) MOD_NAME=$(THIS_MOD_NAME) $(MAKE) -C $(BLDDIR) $(THIS_MOD_NAME).ko LOC_BLDDIR=$(BLDDIR) LOC_SRCDIR=$(PWD) -# } -else -# { -KBUILD_EXTRA_SYMBOLS := ${BLDDIR}/../../kernel/kernel_module/Module.symvers -export KBUILD_EXTRA_SYMBOLS - -module: $(MODULE) - -# -# This is for the compilation of the 'precompiled' object. We keep it -# here for compatibility. -# -$(MODULE): $(BLDDIR)/.tree $(BOBJS) kernel_libs - $(LD) $(MODULE_LDFLAGS) -r -d $(BOBJS) $(LIBS) -o $@ - -$(KMODULE): $(MODULE) - rm -fr $(BLDDIR)/$(KERNEL_MODULE_DIR) - mkdir $(BLDDIR)/$(KERNEL_MODULE_DIR) - cp ${SDK}/make/Makefile.linux-kmodule $(BLDDIR)/$(KERNEL_MODULE_DIR)/Makefile - cat ${KBUILD_EXTRA_SYMBOLS} > $(BLDDIR)/$(KERNEL_MODULE_DIR)/Module.symvers - MOD_NAME=$(THIS_MOD_NAME) KBUILD_EXTRA_SYMBOLS="${KBUILD_EXTRA_SYMBOLS}" $(MAKE) -C $(BLDDIR)/$(KERNEL_MODULE_DIR) $(THIS_MOD_NAME).ko - -include $(SDK)/make/Make.depend -# } -endif - -kernel_libs: - $(MAKE) -C $(SDK)/systems/linux/kernel/modules/shared - -# Make.depend is before clean:: so that Make.depend's clean:: runs first. - -clean:: - $(MAKE) -C $(SDK)/systems/linux/kernel/modules/shared $@ - $(RM) $(BOBJS) $(MODULE) - $(RM) $(BLDDIR)/$(KERNEL_MODULE_DIR) - -distclean:: - -.PHONY: build kernel_libs diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/Makefile b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/Makefile deleted file mode 100644 index 99afe69ec1f..00000000000 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/Makefile +++ /dev/null @@ -1,41 +0,0 @@ -# -*- Makefile -*- -# $Id: Makefile,v 1.10 Broadcom SDK $ -# -# $Copyright: 2017-2025 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ -# -# -# -# Makefile for SOC SAL support -# -LOCALDIR = systems/linux/kernel/modules - -include ${SDK}/make/Make.config - -subdirs= - -include ${SDK}/make/Make.subdirs - -include ${SDK}/make/Make.depend diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/Makefile b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/Makefile deleted file mode 100644 index 4bbd759c418..00000000000 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-genl/Makefile +++ /dev/null @@ -1,99 +0,0 @@ -# -*- Makefile -*- -# $Id: Makefile,v 1.3 Broadcom SDK $ -# -# $Copyright: 2017-2025 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ -# -# -# -LOCALDIR = systems/linux/kernel/modules/bcm-genl - -include ${SDK}/make/Make.config - -LIBS = $(LIBDIR)/libkern.a - -ifndef DCBDIR -DCBDIR = $(SDK)/systems/linux/kernel/modules/dcb -# $(error 'The $$DCBDIR variable is not set') -endif -ifeq (1,$(NO_PRECOMPILED_MODULE)) -$(error 'DCB_LIB build is not supported if NO_PRECOMPILED_MODULE=1') -endif -LIBS += $(LIBDIR)/libdcb.a -CFLAGS += -DDCBLIB_SUPPORT -I$(DCBDIR)/include -ifeq (1,$(BUILD_GENL_PACKET)) -CFLAGS += -I${SDK}/systems/linux/kernel/modules/include/kernel -endif - -ifdef LTSW_CHIPS -# bcmdrd_config.h is required for enum_max.h when LTSW devices are included -CFLAGS += -I${SDKLT}/bcmdrd/include -endif - -KERNEL_MODULE_DIR = kernel_module - -THIS_MOD_NAME := linux-bcm-genl -MODULE = $(LIBDIR)/$(THIS_MOD_NAME).o -KMODULE = $(LIBDIR)/$(THIS_MOD_NAME).ko - -# BCM Network Device -# { -KBUILD_EXTRA_SYMBOLS := ${BLDDIR}/../bcm-knet/kernel_module/Module.symvers -ifeq (1,$(BUILD_GENL_PACKET)) -KBUILD_EXTRA_SYMBOLS += ${BLDDIR}/../genl-packet/kernel_module/Module.symvers -endif -export KBUILD_EXTRA_SYMBOLS - -build: $(MODULE) $(KMODULE) -# -# This is for the compilation of the 'precompiled' object. We keep it -# here for compatibility. -# -$(LIBDIR)/libdcb.a: - $(MAKE) -C $(DCBDIR)/make BLDDIR=$(LIBDIR) \ - KADD_CFLAGS="-I${SDK}/systems/linux/kernel/modules/include $(KFLAGS) -D$(ENDIAN)" \ - CROSS_COMPILE=$(CROSS_COMPILE) - -$(MODULE): $(BLDDIR)/.tree $(BOBJS) $(LIBS) - $(LD) $(MODULE_LDFLAGS) -r -d $(BOBJS) $(LIBS) -o $@ - -$(KMODULE): $(MODULE) - rm -fr $(BLDDIR)/$(KERNEL_MODULE_DIR) - mkdir $(BLDDIR)/$(KERNEL_MODULE_DIR) - cp ${SDK}/make/Makefile.linux-kmodule $(BLDDIR)/$(KERNEL_MODULE_DIR)/Makefile - cat ${KBUILD_EXTRA_SYMBOLS} > $(BLDDIR)/$(KERNEL_MODULE_DIR)/Module.symvers - MOD_NAME=$(THIS_MOD_NAME) $(MAKE) -C $(BLDDIR)/$(KERNEL_MODULE_DIR) $(THIS_MOD_NAME).ko -# } - -# Make.depend is before clean:: so that Make.depend's clean:: runs first. - -include ${SDK}/make/Make.depend - -clean:: - $(RM) $(BLDDIR)/version.c $(BLDDIR)/version.o - $(RM) $(BOBJS) $(MODULE) - $(MAKE) -C $(DCBDIR)/make BLDDIR=$(LIBDIR) clean - -.PHONY: build diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-knet/Makefile b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-knet/Makefile deleted file mode 100644 index 8adb98f26ab..00000000000 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-knet/Makefile +++ /dev/null @@ -1,111 +0,0 @@ -# -*- Makefile -*- -# $Id: Makefile,v 1.3 Broadcom SDK $ -# -# $Copyright: 2017-2025 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ -# -# -# -LOCALDIR = systems/linux/kernel/modules/bcm-knet - -include ${SDK}/make/Make.config - -LIBS = $(LIBDIR)/libkern.a - -KERNEL_MODULE_DIR = kernel_module - -THIS_MOD_NAME := linux-bcm-knet -MODULE = $(LIBDIR)/$(THIS_MOD_NAME).o -KMODULE = $(LIBDIR)/$(THIS_MOD_NAME).ko - -# BCM Network Device - -ifeq (1,$(NO_PRECOMPILED_MODULE)) -# { -# -# For 'NO_PRECOMPILED_MODULE', the first kernel compilation is done -# in systems/linux/kernel/modules/bcm-knet (and not in systems/linux/kernel/modules/bcm-knet/kernel_module, -# which is not even created). -# KBUILD_EXTRA_SYMBOLS exports the symbols created on the first module compilation to -# all other module compilations. -# -KBUILD_EXTRA_SYMBOLS := ${BLDDIR}/../../../../bde/linux/kernel/Module.symvers -export KBUILD_EXTRA_SYMBOLS -# -# These are the objects which need to be compiled, in the kernel, to -# created the module object file. -# -SRCS_COMPOSING = bcm-knet.c ../shared/gmodule.c -OBJECTS_COMPOSING = "bcm-knet.o gmodule.o" -# -# Note that for NO_PRECOMPILED_MODULE, the subdirectory 'systems/linux/kernel/modules/bcm-knet/kernel_module' -# is not created and all action is done in systems/linux/kernel/modules/bcm-knet -# - -build: $(KMODULE) - -$(KMODULE): $(SRCS_COMPOSING) - mkdir -p $(BLDDIR) - rm -fr $(BLDDIR)/$(KERNEL_MODULE_DIR) - rm -f $(BLDDIR)/*.c - rm -f $(BLDDIR)/*.o - rm -f $(BLDDIR)/*.ko - cp ${SDK}/make/Makefile.linux-kmodule $(BLDDIR)/Makefile - cp ./*.c $(BLDDIR)/ - cp ../shared/*.c $(BLDDIR)/ - cat ${KBUILD_EXTRA_SYMBOLS} > $(BLDDIR)/Module.symvers - MOD_OBJS=$(OBJECTS_COMPOSING) MOD_NAME=$(THIS_MOD_NAME) $(MAKE) -C $(BLDDIR) $(THIS_MOD_NAME).ko LOC_BLDDIR=$(BLDDIR) LOC_SRCDIR=$(PWD) -# } -else -# { -KBUILD_EXTRA_SYMBOLS := ${BLDDIR}/../../../../bde/linux/kernel/kernel_module/Module.symvers -export KBUILD_EXTRA_SYMBOLS - -build: $(MODULE) $(KMODULE) -# -# This is for the compilation of the 'precompiled' object. We keep it -# here for compatibility. -# -$(MODULE): $(BLDDIR)/.tree $(BOBJS) $(LIBS) - $(LD) $(MODULE_LDFLAGS) -r -d $(BOBJS) $(LIBS) -o $@ - -$(KMODULE): $(MODULE) - rm -fr $(BLDDIR)/$(KERNEL_MODULE_DIR) - mkdir $(BLDDIR)/$(KERNEL_MODULE_DIR) - cp ${SDK}/make/Makefile.linux-kmodule $(BLDDIR)/$(KERNEL_MODULE_DIR)/Makefile - cat ${KBUILD_EXTRA_SYMBOLS} > $(BLDDIR)/$(KERNEL_MODULE_DIR)/Module.symvers - MOD_NAME=$(THIS_MOD_NAME) KBUILD_EXTRA_SYMBOLS="${KBUILD_EXTRA_SYMBOLS}" $(MAKE) -C $(BLDDIR)/$(KERNEL_MODULE_DIR) $(THIS_MOD_NAME).ko - -# Make.depend is before clean:: so that Make.depend's clean:: runs first. -include ${SDK}/make/Make.depend -# } -endif - -clean:: - $(RM) $(BLDDIR)/version.c $(BLDDIR)/version.o - $(RM) $(BOBJS) $(MODULE) - -.PHONY: build - diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-ptp-clock/bcm-ptp-clock.c b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-ptp-clock/bcm-ptp-clock.c deleted file mode 100644 index c1748468547..00000000000 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/bcm-ptp-clock/bcm-ptp-clock.c +++ /dev/null @@ -1,5066 +0,0 @@ -/* - * Copyright 2017 Broadcom - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License, version 2, as - * published by the Free Software Foundation (the "GPL"). - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License version 2 (GPLv2) for more details. - * - * You should have received a copy of the GNU General Public License - * version 2 (GPLv2) along with this source code. - */ - -/* - * This module implements a Linux PTP Clock driver for Broadcom - * XGS switch devices. - * - * For a list of supported module parameters, please see below. - * debug: Debug level (default 0) - * network_transport : Transport Type (default 0 - Raw) - * base_dev_name: Base device name (default ptp0, ptp1, etc.) - * - * - All the data structures and functions work on the physical port. - * For array indexing purposes, we use (phy_port - 1). - */ - -#include /* Must be included first */ -/* Module Information */ -#define MODULE_MAJOR 125 -#define MODULE_NAME "linux-bcm-ptp-clock" - -MODULE_AUTHOR("Broadcom Corporation"); -MODULE_DESCRIPTION("PTP Clock Driver for Broadcom XGS/DNX Switch"); -MODULE_LICENSE("GPL"); - -#if (LINUX_VERSION_CODE > KERNEL_VERSION(3,17,0)) -#define PTPCLOCK_SUPPORTED -#endif - -#ifdef PTPCLOCK_SUPPORTED -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -/* Configuration Parameters */ -static int debug; -LKM_MOD_PARAM(debug, "i", int, 0); -MODULE_PARM_DESC(debug, - "Debug level (default 0)"); - -static int pci_cos; - -static int network_transport; -LKM_MOD_PARAM(network_transport, "i", int, 0); -MODULE_PARM_DESC(network_transport, - "Transport Type (default - Detect from packet)"); - -static char *base_dev_name = "ptp0"; -LKM_MOD_PARAM(base_dev_name, "s", charp, 0); -MODULE_PARM_DESC(base_dev_name, - "Base device name (default ptp0, ptp1, etc.)"); - -static int fw_core; -LKM_MOD_PARAM(fw_core, "i", int, 0); -MODULE_PARM_DESC(fw_core, - "Firmware core (default 0)"); - -static int vnptp_l2hdr_vlan_prio; -LKM_MOD_PARAM(vnptp_l2hdr_vlan_prio, "i", int, 0); -MODULE_PARM_DESC(vnptp_l2hdr_vlan_prio, - "L2 Hdr Vlan priority"); - -static int phc_update_intv_msec = 1000; -LKM_MOD_PARAM(phc_update_intv_msec, "i", int, 0); -MODULE_PARM_DESC(phc_update_intv_msec, - "PHC update interval in msec (default 1000)"); - -static int master_core = 0; -LKM_MOD_PARAM(master_core, "i", int, 0); -MODULE_PARM_DESC(master_core, - "Master Core ID, this is specific to Q3D (default - 0)"); - -static int shared_phc = 0; -LKM_MOD_PARAM(shared_phc, "i", int, 0); -MODULE_PARM_DESC(shared_phc, - "Single PHC instance of master_unit will shared with all units (default - 0)"); - -/* Debug levels */ -#define DBG_LVL_VERB 0x1 -#define DBG_LVL_WARN 0x2 -#define DBG_LVL_TXTS 0x4 -#define DBG_LVL_CMDS 0x8 -#define DBG_LVL_TX 0x10 -#define DBG_LVL_RX 0x20 -#define DBG_LVL_TX_DUMP 0x40 -#define DBG_LVL_RX_DUMP 0x80 - -#define DBG_VERB(_s) do { if (debug & DBG_LVL_VERB) gprintk _s; } while (0) -#define DBG_WARN(_s) do { if (debug & DBG_LVL_WARN) gprintk _s; } while (0) -#define DBG_TXTS(_s) do { if (debug & DBG_LVL_TXTS) gprintk _s; } while (0) -#define DBG_CMDS(_s) do { if (debug & DBG_LVL_CMDS) gprintk _s; } while (0) -#define DBG_TX(_s) do { if (debug & DBG_LVL_TX) gprintk _s; } while (0) -#define DBG_RX(_s) do { if (debug & DBG_LVL_RX) gprintk _s; } while (0) -#define DBG_TX_DUMP(_s) do { if (debug & DBG_LVL_TX_DUMP) gprintk _s; } while (0) -#define DBG_RX_DUMP(_s) do { if (debug & DBG_LVL_RX_DUMP) gprintk _s; } while (0) -#define DBG_ERR(_s) do { if (1) gprintk _s; } while (0) - - -#ifdef LINUX_BDE_DMA_DEVICE_SUPPORT -#define DMA_DEV device -#define DMA_ALLOC_COHERENT(d,s,h) dma_alloc_coherent(d,s,h,GFP_ATOMIC|GFP_DMA32) -#define DMA_FREE_COHERENT(d,s,a,h) dma_free_coherent(d,s,a,h) -#else -#define DMA_DEV pci_dev -#define DMA_ALLOC_COHERENT(d,s,h) pci_alloc_consistent(d,s,h) -#define DMA_FREE_COHERENT(d,s,a,h) pci_free_consistent(d,s,a,h) -#endif - -/* Type length in bytes */ -#define BKSYNC_PACKLEN_U8 1 -#define BKSYNC_PACKLEN_U16 2 -#define BKSYNC_PACKLEN_U24 3 -#define BKSYNC_PACKLEN_U32 4 - -#define BKSYNC_UNPACK_U8(_buf, _var) \ - _var = *_buf++ - -#define BKSYNC_UNPACK_U16(_buf, _var) \ - do { \ - (_var) = (((_buf)[0] << 8) | \ - (_buf)[1]); \ - (_buf) += BKSYNC_PACKLEN_U16; \ - } while (0) - -#define BKSYNC_UNPACK_U24(_buf, _var) \ - do { \ - (_var) = (((_buf)[0] << 16) | \ - ((_buf)[1] << 8) | \ - (_buf)[2]); \ - (_buf) += BKSYNC_PACKLEN_U24; \ - } while (0) - -#define BKSYNC_UNPACK_U32(_buf, _var) \ - do { \ - (_var) = (((_buf)[0] << 24) | \ - ((_buf)[1] << 16) | \ - ((_buf)[2] << 8) | \ - (_buf)[3]); \ - (_buf) += BKSYNC_PACKLEN_U32; \ - } while (0) - - -#define CMICX_DEV_TYPE \ - ((dev_info->dcb_type == 38) || \ - (dev_info->dcb_type == 36) || \ - (dev_info->dcb_type == 39)) \ - -/* Arad Series of DNX Devices */ -#define DEVICE_IS_DPP (dev_info->dcb_type == 28) - -/* JR2 and JR3 Series of DNX Devices */ -#define DEVICE_IS_DNX (dev_info->dcb_type == 39) - -/* CMIC MCS-0 SCHAN Messaging registers */ -/* Core0:CMC1 Core1:CMC2 */ -#define CMIC_CMC_BASE \ - (CMICX_DEV_TYPE ? (fw_core ? 0x10400 : 0x10300) : \ - (fw_core ? 0x33000 : 0x32000)) - -#define CMIC_CMC_SCHAN_MESSAGE_10r(BASE) (BASE + 0x00000034) -#define CMIC_CMC_SCHAN_MESSAGE_11r(BASE) (BASE + 0x00000038) -#define CMIC_CMC_SCHAN_MESSAGE_12r(BASE) (BASE + 0x0000003c) -#define CMIC_CMC_SCHAN_MESSAGE_13r(BASE) (BASE + 0x00000040) -#define CMIC_CMC_SCHAN_MESSAGE_14r(BASE) (BASE + 0x00000044) -#define CMIC_CMC_SCHAN_MESSAGE_15r(BASE) (BASE + 0x00000048) -#define CMIC_CMC_SCHAN_MESSAGE_16r(BASE) (BASE + 0x0000004c) -#define CMIC_CMC_SCHAN_MESSAGE_17r(BASE) (BASE + 0x00000050) -#define CMIC_CMC_SCHAN_MESSAGE_18r(BASE) (BASE + 0x00000054) -#define CMIC_CMC_SCHAN_MESSAGE_19r(BASE) (BASE + 0x00000058) -#define CMIC_CMC_SCHAN_MESSAGE_20r(BASE) (BASE + 0x0000005c) -#define CMIC_CMC_SCHAN_MESSAGE_21r(BASE) (BASE + 0x00000060) - -u32 hostcmd_regs[5] = { 0 }; - -#define BKSYNC_NUM_PORTS 128 /* NUM_PORTS where 2-step is supported. */ -#define BKSYNC_MAX_NUM_PORTS 512 /* Max ever NUM_PORTS in the system */ -#define BKSYNC_MAX_MTP_IDX 8 /* Max number of mtps in the system */ - -#define BKSYNC_DNX_PTCH_1_SIZE 3 /* PTCH_1 */ -#define BKSYNC_DNX_PTCH_2_SIZE 2 /* PTCH_2 */ -#define BKSYNC_DNX_ITMH_SIZE 5 /* ITMH */ - -/* Service request commands to Firmware. */ -enum { -#ifdef BDE_EDK_SUPPORT - BKSYNC_DONE = (0x0), - BKSYNC_INIT = (0x1), - BKSYNC_DEINIT = (0x2), - BKSYNC_GETTIME = (0x3), - BKSYNC_SETTIME = (0x4), - BKSYNC_FREQCOR = (0x5), - BKSYNC_PBM_UPDATE = (0x6), - BKSYNC_ADJTIME = (0x7), - BKSYNC_GET_TSTIME = (0x8), - BKSYNC_MTP_TS_UPDATE_ENABLE = (0x9), - BKSYNC_MTP_TS_UPDATE_DISABLE = (0xa), - BKSYNC_ACK_TSTIME = (0xb), - BKSYNC_SYSINFO = (0xc), - BKSYNC_BROADSYNC = (0xd), - BKSYNC_GPIO = (0xe), - BKSYNC_EVLOG = (0xf), - BKSYNC_EXTTSLOG = (0x10), - BKSYNC_GET_EXTTS_BUFF = (0x11), - BKSYNC_GPIO_PHASEOFFSET = (0x12), - BKSYNC_PTP_TOD = (0x13), - BKSYNC_NTP_TOD = (0x14), - BKSYNC_PTP_TOD_GET = (0x15), - BKSYNC_NTP_TOD_GET = (0x16), -#else - BKSYNC_DONE = (0x1), - BKSYNC_INIT = (0x2), - BKSYNC_DEINIT = (0x3), - BKSYNC_GETTIME = (0x4), - BKSYNC_SETTIME = (0x5), - BKSYNC_FREQCOR = (0x6), - BKSYNC_PBM_UPDATE = (0x7), - BKSYNC_ADJTIME = (0x8), - BKSYNC_GET_TSTIME = (0x9), - BKSYNC_MTP_TS_UPDATE_ENABLE = (0xa), - BKSYNC_MTP_TS_UPDATE_DISABLE = (0xb), - BKSYNC_ACK_TSTIME = (0xc), - BKSYNC_SYSINFO = (0xd), - BKSYNC_BROADSYNC = (0xe), - BKSYNC_GPIO = (0xf), - BKSYNC_EVLOG = (0x10), - BKSYNC_EXTTSLOG = (0x11), - BKSYNC_GPIO_PHASEOFFSET = (0x12), -#endif -}; - -enum { - BKSYNC_SYSINFO_UC_PORT_NUM = (0x1), - BKSYNC_SYSINFO_UC_PORT_SYSPORT = (0x2), - BKSYNC_SYSINFO_HOST_CPU_PORT = (0x3), - BKSYNC_SYSINFO_HOST_CPU_SYSPORT = (0x4), - BKSYNC_SYSINFO_UDH_LEN = (0x5), -}; - -enum { - BKSYNC_BROADSYNC_BS0_CONFIG = (0x1), - BKSYNC_BROADSYNC_BS1_CONFIG = (0x2), - BKSYNC_BROADSYNC_BS0_STATUS_GET = (0x3), - BKSYNC_BROADSYNC_BS1_STATUS_GET = (0x4), - BKSYNC_BROADSYNC_BS0_PHASE_OFFSET_SET = (0x5), - BKSYNC_BROADSYNC_BS1_PHASE_OFFSET_SET = (0x6), -}; - -enum { - BKSYNC_GPIO_0 = (0x1), - BKSYNC_GPIO_1 = (0x2), - BKSYNC_GPIO_2 = (0x3), - BKSYNC_GPIO_3 = (0x4), - BKSYNC_GPIO_4 = (0x5), - BKSYNC_GPIO_5 = (0x6), -}; - -/* 1588 message types. */ -enum -{ - IEEE1588_MSGTYPE_SYNC = (0x0), - IEEE1588_MSGTYPE_DELREQ = (0x1), - IEEE1588_MSGTYPE_PDELREQ = (0x2), - IEEE1588_MSGTYPE_PDELRESP = (0x3), - /* reserved (0x4) */ - /* reserved (0x5) */ - /* reserved (0x6) */ - /* reserved (0x7) */ - IEEE1588_MSGTYPE_GENERALMASK = (0x8), /* all non-event messages have this bit set */ - IEEE1588_MSGTYPE_FLWUP = (0x8), - IEEE1588_MSGTYPE_DELRESP = (0x9), - IEEE1588_MSGTYPE_PDELRES_FLWUP = (0xA), - IEEE1588_MSGTYPE_ANNOUNCE = (0xB), - IEEE1588_MSGTYPE_SGNLNG = (0xC), - IEEE1588_MSGTYPE_MNGMNT = (0xD) - /* reserved (0xE) */ - /* reserved (0xF) */ -}; - -/* Usage macros */ -#define ONE_BILLION (1000000000) - -#define BKSYNC_SKB_U16_GET(_skb, _pkt_offset) \ - ((_skb->data[_pkt_offset] << 8) | _skb->data[_pkt_offset + 1]) - -#define BKSYNC_PTP_EVENT_MSG(_ptp_msg_type) \ - ((_ptp_msg_type == IEEE1588_MSGTYPE_DELREQ) || \ - (_ptp_msg_type == IEEE1588_MSGTYPE_SYNC)) - -#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,30) -#define HWTSTAMP_TX_ONESTEP_SYNC 2 -#else -#include -#endif - -#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5,3,0)) -#define FREQ_CORR adjfine -#else -#define FREQ_CORR adjfreq -#endif - -/* - * Hardware specific information. - * 4 words of information used from this data set. - * 0 - 3: 2-step untagged. - * 4 - 7: 2-step tagged. - * 8 - 11: 1-step untagged. - * 12 - 15: 1-step tagged. - * 16 - 19: 1-step untagged with ITS-set. - * 20 - 23: 1-step tagged with ITS-set. - * - * Refer to device specific reg file for SOBMH header information. - * Below fields are considered: - * SOBMH => { - * IEEE1588_ONE_STEP_ENABLE - OneStep - * IEEE1588_REGEN_UDP_CHECKSUM - Regen UDP Checksum - * IEEE1588_INGRESS_TIMESTAMP_SIGN - ITS sign - * TX_TS - TwoStep - * IEEE1588_TIMESTAMP_HDR_OFFSET - 1588 header offset - * } - * - */ -uint32_t sobmhrawpkts_dcb26[24] = {0x00000000, 0x00020E00, 0x00000000, 0x00000000, 0x00000000, 0x00021200, 0x00000000, 0x00000000, - 0x00000000, 0x00100E00, 0x00000000, 0x00000000, 0x00000000, 0x00101200, 0x00000000, 0x00000000, - 0x00000000, 0x00140E00, 0x00000000, 0x00000000, 0x00000000, 0x00141200, 0x00000000, 0x00000000}; - -uint32_t sobmhudpipv4_dcb26[24] = {0x00000000, 0x00022A00, 0x00000000, 0x00000000, 0x00000000, 0x00022E00, 0x00000000, 0x00000000, - 0x00000000, 0x00182A00, 0x00000000, 0x00000000, 0x00000000, 0x00182E00, 0x00000000, 0x00000000, - 0x00000000, 0x001C2A00, 0x00000000, 0x00000000, 0x00000000, 0x001C2E00, 0x00000000, 0x00000000}; - -uint32_t sobmhudpipv6_dcb26[24] = {0x00000000, 0x00023E00, 0x00000000, 0x00000000, 0x00000000, 0x00024200, 0x00000000, 0x00000000, - 0x00000000, 0x00183E00, 0x00000000, 0x00000000, 0x00000000, 0x00184200, 0x00000000, 0x00000000, - 0x00000000, 0x001C3E00, 0x00000000, 0x00000000, 0x00000000, 0x001C4200, 0x00000000, 0x00000000}; - -uint32_t sobmhrawpkts_dcb32[24] = {0x00000000, 0x00010E00, 0x00000000, 0x00000000, 0x00000000, 0x00011200, 0x00000000, 0x00000000, - 0x00000000, 0x00080E00, 0x00000000, 0x00000000, 0x00000000, 0x00081200, 0x00000000, 0x00000000, - 0x00000000, 0x00080E00, 0x00000000, 0x00000000, 0x00000000, 0x00081200, 0x00000000, 0x00000000}; - -uint32_t sobmhudpipv4_dcb32[24] = {0x00000000, 0x00012A00, 0x00000000, 0x00000000, 0x00000000, 0x00012E00, 0x00000000, 0x00000000, - 0x00000000, 0x000C2A00, 0x00000000, 0x00000000, 0x00000000, 0x000C2E00, 0x00000000, 0x00000000, - 0x00000000, 0x000C2A00, 0x00000000, 0x00000000, 0x00000000, 0x000C2E00, 0x00000000, 0x00000000}; - -uint32_t sobmhudpipv6_dcb32[24] = {0x00000000, 0x00013E00, 0x00000000, 0x00000000, 0x00000000, 0x00014200, 0x00000000, 0x00000000, - 0x00000000, 0x000C3E00, 0x00000000, 0x00000000, 0x00000000, 0x000C4200, 0x00000000, 0x00000000, - 0x00000000, 0x000C3E00, 0x00000000, 0x00000000, 0x00000000, 0x000C4200, 0x00000000, 0x00000000}; - -uint32_t sobmhrawpkts_dcb35[24] = {0x00000000, 0x0020E000, 0x00000000, 0x00000000, 0x00000000, 0x00212000, 0x00000000, 0x00000000, - 0x00000000, 0x0100E000, 0x00000000, 0x00000000, 0x00000000, 0x01012000, 0x00000000, 0x00000000, - 0x00000000, 0x0140E000, 0x00000000, 0x00000000, 0x00000000, 0x01412000, 0x00000000, 0x00000000}; - -uint32_t sobmhudpipv4_dcb35[24] = {0x00000000, 0x0022A000, 0x00000000, 0x00000000, 0x00000000, 0x0022E000, 0x00000000, 0x00000000, - 0x00000000, 0x0182A000, 0x00000000, 0x00000000, 0x00000000, 0x0182E000, 0x00000000, 0x00000000, - 0x00000000, 0x01C2A000, 0x00000000, 0x00000000, 0x00000000, 0x01C2E000, 0x00000000, 0x00000000}; - -uint32_t sobmhudpipv6_dcb35[24] = {0x00000000, 0x0023E000, 0x00000000, 0x00000000, 0x00000000, 0x00242000, 0x00000000, 0x00000000, - 0x00000000, 0x0183E000, 0x00000000, 0x00000000, 0x00000000, 0x01842000, 0x00000000, 0x00000000, - 0x00000000, 0x01C3E000, 0x00000000, 0x00000000, 0x00000000, 0x01C42000, 0x00000000, 0x00000000}; - - -uint32_t sobmhrawpkts_dcb36[24] = {0x00000000, 0x00010E00, 0x00000000, 0x00000000, 0x00000000, 0x00011200, 0x00000000, 0x00000000, - 0x00000000, 0x00080E00, 0x00000000, 0x00000000, 0x00000000, 0x00081200, 0x00000000, 0x00000000, - 0x00000000, 0x00080E00, 0x00000000, 0x00000000, 0x00000000, 0x00081200, 0x00000000, 0x00000000}; - -uint32_t sobmhudpipv4_dcb36[24] = {0x00000000, 0x00012A00, 0x00000000, 0x00000000, 0x00000000, 0x00012E00, 0x00000000, 0x00000000, - 0x00000000, 0x000C2A00, 0x00000000, 0x00000000, 0x00000000, 0x000C2E00, 0x00000000, 0x00000000, - 0x00000000, 0x000C2A00, 0x00000000, 0x00000000, 0x00000000, 0x000C2E00, 0x00000000, 0x00000000}; - -uint32_t sobmhudpipv6_dcb36[24] = {0x00000000, 0x00013E00, 0x00000000, 0x00000000, 0x00000000, 0x00014200, 0x00000000, 0x00000000, - 0x00000000, 0x000C3E00, 0x00000000, 0x00000000, 0x00000000, 0x000C4200, 0x00000000, 0x00000000, - 0x00000000, 0x000C3E00, 0x00000000, 0x00000000, 0x00000000, 0x000C4200, 0x00000000, 0x00000000}; -/* th3: onestep only */ -uint32_t sobmhrawpkts_dcb38[24] = {0x00000000, 0x00080E00, 0x00000000, 0x00000000, 0x00000000, 0x00081200, 0x00000000, 0x00000000, - 0x00000000, 0x00080E00, 0x00000000, 0x00000000, 0x00000000, 0x00081200, 0x00000000, 0x00000000, - 0x00000000, 0x00080E00, 0x00000000, 0x00000000, 0x00000000, 0x00081200, 0x00000000, 0x00000000}; - -uint32_t sobmhudpipv4_dcb38[24] = {0x00000000, 0x00082A00, 0x00000000, 0x00000000, 0x00000000, 0x00082E00, 0x00000000, 0x00000000, - 0x00000000, 0x000C2A00, 0x00000000, 0x00000000, 0x00000000, 0x000C2E00, 0x00000000, 0x00000000, - 0x00000000, 0x000C2A00, 0x00000000, 0x00000000, 0x00000000, 0x000C2E00, 0x00000000, 0x00000000}; - -uint32_t sobmhudpipv6_dcb38[24] = {0x00000000, 0x00083E00, 0x00000000, 0x00000000, 0x00000000, 0x00084200, 0x00000000, 0x00000000, - 0x00000000, 0x000C3E00, 0x00000000, 0x00000000, 0x00000000, 0x000C4200, 0x00000000, 0x00000000, - 0x00000000, 0x000C3E00, 0x00000000, 0x00000000, 0x00000000, 0x000C4200, 0x00000000, 0x00000000}; - -/* HR3-MG/GH2 metadata */ -uint32_t sobmhrawpkts_dcb37[24] = {0x00000000, 0x00020E00, 0x00000000, 0x00000000, 0x00000000, 0x00021200, 0x00000000, 0x00000000, - 0x00000000, 0x00100E00, 0x00000000, 0x00000000, 0x00000000, 0x00101200, 0x00000000, 0x00000000, - 0x00000000, 0x00140E00, 0x00000000, 0x00000000, 0x00000000, 0x00141200, 0x00000000, 0x00000000}; - -uint32_t sobmhudpipv4_dcb37[24] = {0x00000000, 0x00022A00, 0x00000000, 0x00000000, 0x00000000, 0x00022E00, 0x00000000, 0x00000000, - 0x00000000, 0x00182A00, 0x00000000, 0x00000000, 0x00000000, 0x00182E00, 0x00000000, 0x00000000, - 0x00000000, 0x001C2A00, 0x00000000, 0x00000000, 0x00000000, 0x001C2E00, 0x00000000, 0x00000000}; - -uint32_t sobmhudpipv6_dcb37[24] = {0x00000000, 0x00023E00, 0x00000000, 0x00000000, 0x00000000, 0x00024200, 0x00000000, 0x00000000, - 0x00000000, 0x00183E00, 0x00000000, 0x00000000, 0x00000000, 0x00184200, 0x00000000, 0x00000000, - 0x00000000, 0x001C3E00, 0x00000000, 0x00000000, 0x00000000, 0x001C4200, 0x00000000, 0x00000000}; - -enum { - TS_EVENT_CPU = 0, - TS_EVENT_BSHB_0 = 1, - TS_EVENT_BSHB_1 = 2, - TS_EVENT_GPIO_1 = 3, - TS_EVENT_GPIO_2 = 4, - TS_EVENT_GPIO_3 = 5, - TS_EVENT_GPIO_4 = 6, - TS_EVENT_GPIO_5 = 7, - TS_EVENT_GPIO_6 = 8, -}; - -#define NUM_TS_EVENTS 14 - -#define __ATTRIBUTE_PACKED__ __attribute__ ((packed)) - -/* FW timestamps. - * This declaration has to match with HFT_t_TmStmp - * defined in the firmware. Otherwise, dma will fail. - */ -typedef struct fw_tstamp_s { - u64 sec; - u32 nsec; -} __ATTRIBUTE_PACKED__ fw_tstamp_t; - -typedef struct bksync_fw_debug_event_tstamps_s { - fw_tstamp_t prv_tstamp; - fw_tstamp_t cur_tstamp; -} __ATTRIBUTE_PACKED__ bksync_fw_debug_event_tstamps_t; - -#ifndef BDE_EDK_SUPPORT -typedef struct bksync_evlog_s { - bksync_fw_debug_event_tstamps_t event_timestamps[NUM_TS_EVENTS]; -} __ATTRIBUTE_PACKED__ bksync_evlog_t; -#endif - -/* Timestamps for EXTTS from Firmware */ -#define BKSYNC_NUM_GPIO_EVENTS 6 /* gpio0 = event0 ..... gpio5 = event5 on single device */ -#define BKSYNC_NUM_EVENT_TS 128 /* Directly mapped to PTP_MAX_TIMESTAMPS from ptp_private.h */ -typedef struct bksync_fw_extts_event_s { - u32 ts_event_id; - fw_tstamp_t tstamp; -} __ATTRIBUTE_PACKED__ bksync_fw_extts_event_t; - -typedef struct bksync_extts_log_s { - u32 head; /* Read pointer - Updated by HOST */ - u32 tail; /* Write pointer - Updated by FW */ - bksync_fw_extts_event_t event_ts[BKSYNC_NUM_EVENT_TS]; - u32 overflow; -} __ATTRIBUTE_PACKED__ bksync_fw_extts_log_t; - -struct bksync_extts_event { - int enable[BKSYNC_NUM_GPIO_EVENTS]; - int head; -}; - -typedef struct bksync_time_spec_s { - int sign; /* 0: positive, 1:negative */ - uint64_t sec; /* 47bit of secs */ - uint32_t nsec; /* 30bit of nsecs */ -} bksync_time_spec_t; - -/* DS for FW communication */ -typedef struct bksync_fw_comm_s { - u32 cmd; - u32 dw1[2]; - u32 dw2[2]; - u32 head; /* Read pointer - Updated by HOST */ - u32 tail; /* Write pointer - Updated by FW */ -} __ATTRIBUTE_PACKED__ bksync_fw_comm_t; - -typedef struct bksync_port_stats_s { - u32 pkt_rxctr; /* All ingress packets */ - u32 pkt_txctr; /* All egress packets */ - u32 pkt_txonestep; /* 1-step Tx packet counter */ - u32 tsts_match; /* 2-Step tstamp req match */ - u32 tsts_timeout; /* 2-Step tstamp req timeouts */ - u32 tsts_discard; /* 2-Step tstamp req discards */ - u32 osts_event_pkts; /* 1-step event packet counter */ - u32 osts_tstamp_reqs; /* 1-step events with tstamp request */ - u32 fifo_rxctr; /* 2-Step tstamp req match */ - u64 tsts_best_fetch_time; /* 1-step events with tstamp request */ - u64 tsts_worst_fetch_time; /* 1-step events with tstamp request */ - u32 tsts_avg_fetch_time; /* 1-step events with tstamp request */ -} bksync_port_stats_t; - -typedef struct bksync_init_info_s { - u32 pci_knetsync_cos; - u32 uc_port_num; - u32 uc_port_sysport; - u32 host_cpu_port; - u32 host_cpu_sysport; - u32 udh_len; - u8 application_v2; -} bksync_init_info_t; - -typedef struct bksync_bs_info_s { - u32 enable; - u32 mode; - u32 bc; - u32 hb; - bksync_time_spec_t offset; -} bksync_bs_info_t; - -typedef struct bksync_gpio_info_s { - u32 enable; - u32 mode; - u32 period; - int64_t phaseoffset; -} bksync_gpio_info_t; - -typedef struct bksync_ptp_tod_info_s { - bksync_time_spec_t offset; -} bksync_ptp_tod_info_t; - -typedef struct bksync_ntp_tod_info_s { - uint8_t leap_sec_ctrl_en; /* 1:enable, 0:disable */ - uint8_t leap_sec_op; /* 0:insert 1sec leap sec, 1:delete 1sec leap sec */ - uint64_t epoch_offset; /* 48bit epoch offset */ -} bksync_ntp_tod_info_t; - -#ifndef BDE_EDK_SUPPORT -typedef struct bksync_evlog_info_s { - u32 enable; -} bksync_evlog_info_t; -#endif - -typedef struct bksync_ptp_time_s { - int ptp_pair_lock; - u64 ptptime; - u64 reftime; - u64 ptptime_alt; - u64 reftime_alt; -} bksync_ptp_time_t; - -typedef struct bksync_2step_info_s { - u64 portmap[BKSYNC_MAX_NUM_PORTS/64]; /* Two-step enabled ports */ -} bksync_2step_info_t; - -/************************ DNX Header Information ************************/ -/* Contains information about parsed fields of RX packet header information */ -typedef struct bksync_dnx_rx_pkt_parse_info_s { - uint16_t src_sys_port; - uint64_t rx_hw_timestamp; - uint64_t pph_header_vlan; - uint8_t dnx_header_offset; - int rx_frame_len; -} bksync_dnx_rx_pkt_parse_info_t; - -/* DNX UDH DATA TYPE MAX */ -#define BKSYNC_DNXJER2_UDH_DATA_TYPE_MAX (4) - -/* PPH LIF Ext. 3 bit type */ -#define BKSYNC_DNXJER2_PPH_LIF_EXT_TYPE_MAX (8) - -typedef struct bksync_dnx_jr2_header_info_s { - /* dnx JR2 system header info */ - uint32_t ftmh_lb_key_ext_size; - uint32_t ftmh_stacking_ext_size; - uint32_t pph_base_size; - uint32_t pph_lif_ext_size[BKSYNC_DNXJER2_PPH_LIF_EXT_TYPE_MAX]; - uint32_t system_headers_mode; - uint32_t udh_enable; - uint32_t udh_data_lenght_per_type[BKSYNC_DNXJER2_UDH_DATA_TYPE_MAX]; - - /* CPU port information */ - uint32_t cosq_port_cpu_channel; - uint32_t cosq_port_pp_port; -} bksync_dnx_jr2_header_info_t; - -typedef enum bksync_dnx_jr2_system_headers_mode_e { - bksync_dnx_jr2_sys_hdr_mode_jericho = 0, - bksync_dnx_jr2_sys_hdr_mode_jericho2 = 1 -} bksync_dnx_jr2_system_headers_mode_t; - -/* DNX JR2 FTMH Header information */ -#define BKSYNC_DNXJR2_FTMH_HDR_LEN (10) -#define BKSYNC_DNXJR2_FTMH_TM_DEST_EXT_LEN (3) -#define BKSYNC_DNXJR2_FTMH_FLOWID_EXT_LEN (3) -#define BKSYNC_DNXJR2_FTMH_BEIR_BFR_EXT_LEN (3) -#define BKSYNC_DNXJR2_FTMH_APP_SPECIFIC_EXT_LEN (6) - -/* DNX FTMH PPH type */ -#define BKSYNC_DNXJR2_PPH_HEADER_LEN (12) -#define BKSYNC_DNXJR2_PPH_TYPE_NO_PPH (0) -#define BKSYNC_DNXJR2_PPH_TYPE_PPH_BASE (1) -#define BKSYNC_DNXJR2_PPH_TYPE_TSH_ONLY (2) -#define BKSYNC_DNXJR2_PPH_TYPE_PPH_BASE_TSH (3) - -typedef enum bksync_dnx_jr2_ftmh_tm_action_type_e { - bksync_dnx_jr2_ftmh_tm_action_type_forward = 0, /* TM action is forward */ - bksync_dnx_jr2_ftmh_tm_action_type_snoop = 1, /* TM action is snoop */ - bksync_dnx_jr2_ftmh_tm_action_type_inbound_mirror = 2, /* TM action is inbound mirror. */ - bksync_dnx_jr2_ftmh_tm_action_type_outbound_mirror = 3, /* TM action is outbound mirror. */ - bksync_dnx_jr2_ftmh_tm_action_type_mirror = 4, /* TM action is mirror. */ - bksync_dnx_jr2_ftmh_tm_action_type_statistical_sampling = 5 /* TM action is statistical sampling. */ -} bksync_dnx_jr2_ftmh_tm_action_type_t; - -typedef enum bksync_dnx_jr2_ftmh_app_spec_ext_type_e { - bksync_dnx_jr2_ftmh_app_spec_ext_type_none = 0, /* FTMH ASE type is None or OAM */ - bksync_dnx_jr2_ftmh_app_spec_ext_type_1588v2 = 1, /* FTMH ASE type is 1588v2 */ - bksync_dnx_jr2_ftmh_app_spec_ext_type_mirror = 3, /* FTMH ASE type is Mirror */ - bksync_dnx_jr2_ftmh_app_spec_ext_type_trajectory_trace = 4, /* FTMH ASE type is trajectory trace */ - bksync_dnx_jr2_ftmh_app_spec_ext_type_inband_telemetry = 5, /* FTMH ASE type is Inband telemetry */ -} bksync_dnx_jr2_ftmh_app_spec_ext_type_t; - -typedef union bksync_dnx_jr2_ftmh_base_header_s { - struct { - uint32_t words[2]; - uint8_t bytes[2]; - }; - struct { - uint32_t - src_sys_port_aggr_1:8, - src_sys_port_aggr_0:7, - traffic_class_1:1, - traffic_class_0:2, - packet_size_1:6, - packet_size_0:8; - uint32_t - unused_0:31, - src_sys_port_aggr_2:1; - uint8_t - unused_1:8; - uint8_t - reserved:1, - bier_bfr_ext_size:1, - flow_id_ext_size:1, - app_specific_ext_size:1, - tm_dest_ext_repsent:1, - pph_type:2, - visibility:1; - }; -} bksync_dnx_jr2_ftmh_base_header_t; - -typedef union bksync_dnx_jr2_ftmh_app_spec_ext_1588v2_s { - struct { - uint32_t word; - uint8_t bytes[2]; - }; - struct { - uint32_t - use_ingress_time_stamp:1, - use_ingress_time_compensation:1, - ingress_time_compensation:28, - time_stamp_lsbs:2; - uint8_t - offset_0:4, - ts_command:3, - ts_encapsulation:1; - uint8_t - offset_1:4, - type:4; - }; -} bksync_dnx_jr2_ftmh_app_spec_ext_1588v2_t; - -/* DNX TSH Header size */ -#define BKSYNC_DNXJR2_TSH_HDR_SIZE (4) - -typedef union bksync_dnx_jr2_timestamp_header_s { - struct { - uint32_t word; - }; - struct { - uint32_t timestamp; - }; -} bksync_dnx_jr2_timestamp_header_t; - -/* DNX PPH FHEI_TYPE */ -#define BKSYNC_DNXJR2_PPH_FHEI_TYPE_NONE (0) /* NO FHE1 */ -#define BKSYNC_DNXJR2_PPH_FHEI_TYPE_SZ0 (1) /* 3 byte */ -#define BKSYNC_DNXJR2_PPH_FHEI_TYPE_SZ1 (2) /* 5 byte */ -#define BKSYNC_DNXJR2_PPH_FHEI_TYPE_SZ2 (3) /* 8 byte */ - -#define BKSYNC_DNXJR2_PPH_FHEI_SZ0_SIZE (3) /* 3 byte */ -#define BKSYNC_DNXJR2_PPH_FHEI_SZ1_SIZE (5) /* 5 byte */ -#define BKSYNC_DNXJR2_PPH_FHEI_SZ2_SIZE (8) /* 8 byte */ - -/* PPH Learn Extension - PPH EXT3 */ -#define BKSYNC_DNXJR2_PPH_LEARN_EXT_SIZE (19) - -/* PPH LIF Ext. 3 bit type */ -#define BKSYNC_DNXJR2_PPH_LIF_EXT_TYPE_MAX (8) - -typedef enum bksync_dnx_jr2_pph_fheiext_type_e { - bksync_dnx_jr2_pph_fheiext_type_vlanedit = 0, - bksync_dnx_jr2_pph_fheiext_type_pop = 1, - bksync_dnx_jr2_pph_fheiext_type_swap = 3, - bksync_dnx_jr2_pph_fheiext_type_trap_snoop_mirror = 5, -} bksync_dnx_jr2_pph_fheiext_type_t; - -typedef union bksync_dnx_jr2_pph_base_12b_header_s { - struct { - uint32_t word[3]; - }; - struct { - uint32_t unused_1; - uint32_t unused_2; - uint32_t - forwarding_strenght:1, - parsing_start_type:5, - parsing_start_offset_1:2, - parsing_start_offset_0:5, - lif_ext_type:3, - fhei_size:2, - learn_ext_present:1, - ttl_1:5, - ttl_0:3, - netwrok_qos_0:5; - }; -} bksync_dnx_jr2_pph_base_12b_header_t; - -typedef union bksync_dnx_jr2_pph_fheiext_vlanedit_3b_header_s { - struct { - uint8_t byte[3]; - }; - struct { - uint8_t - edit_pcp1_0:1, - ingress_vlan_edit_cmd:7; - uint8_t - edit_vid1_0:5, - edit_dei1:1, - edit_pcp1_1:2; - uint8_t - type:1, - edit_vid1_1:7; - }; -} bksync_dnx_jr2_pph_fheiext_vlanedit_3b_header_t; - -typedef union bksync_dnx_jr2_pph_fheiext_vlanedit_5b_header_s { - struct { - uint8_t byte[5]; - }; - struct { - uint8_t - edit_vid2_0:4, - edit_dei2:1, - edit_pcp2:3; - uint8_t - edit_vid2_1; - uint8_t - edit_pcp1_0:1, - ingress_vlan_edit_cmd:7; - uint8_t - edit_vid1_0:5, - edit_dei1:1, - edit_pcp1_1:2; - uint8_t - type:1, - edit_vid1_1:7; - }; -} bksync_dnx_jr2_pph_fheiext_vlanedit_5b_header_t; - -typedef union bksync_dnx_jr2_pph_fheiext_trap_header_s { - struct { - uint8_t byte[5]; - }; - struct { - uint32_t - code_0:5, - qualifier:27; - uint8_t - type:4, - code_1:4; - }; -} bksync_dnx_jr2_pph_fheiext_trap_header_t; - -#define BKSYNC_DNXJR2_UDH_BASE_HEADER_LEN (1) -#define BKSYNC_DNXJR2_UDH_DATA_TYPE_MAX (4) - -typedef union bksync_dnx_jr2_udh_base_header_s { - struct { - uint8_t byte; - }; - struct { - uint8_t - udh_data_type_3:2, - udh_data_type_2:2, - udh_data_type_1:2, - udh_data_type_0:2; - }; -} bksync_dnx_jr2_udh_base_header_t; - -#define BKSYNC_DNXJR2_PTCH_TYPE2_HEADER_LEN 2 - -typedef union bksync_dnx_jr2_ptch_type2_header_s { - struct { - uint8_t bytes[BKSYNC_DNXJR2_PTCH_TYPE2_HEADER_LEN]; - }; - struct { - uint8_t - in_pp_port_0:2, - reserved:2, - opaque_pt_attributes:3, - parser_program_control:1; - uint8_t - in_pp_port_1:8; - }; -} bksync_dnx_jr2_ptch_type2_header_t; - -#define BKSYNC_DNXJR2_MODULE_HEADER_LEN 16 -#define BKSYNC_DNXJR2_ITMH_HEADER_LEN 5 - -/* Device specific data */ -typedef struct bksync_dev { - int dcb_type; - int dev_no; - uint16_t dev_id; - uint8_t max_core; /* FW cores */ - volatile int dev_init; /* Indicates if the associated core is initialized */ - volatile void *base_addr; /* address for PCI register access */ - struct DMA_DEV *dma_dev; /* Required for DMA memory control */ - dma_addr_t dma_mem; -#ifdef BDE_EDK_SUPPORT - volatile bksync_fw_comm_t *fw_comm; -#else - int evlog_dma_mem_size; - volatile bksync_evlog_t *evlog; /* dma-able address for fw updates */ - bksync_evlog_info_t evlog_info[NUM_TS_EVENTS]; - int extts_dma_mem_size; - dma_addr_t extts_dma_mem_addr; -#endif - bksync_gpio_info_t bksync_gpio_info[6]; - bksync_bs_info_t bksync_bs_info[2]; - volatile bksync_fw_extts_log_t *extts_log; /* dma-able/virtual address for fw updates */ - bksync_ptp_tod_info_t ptp_tod; /* PTP ToD configuration */ - bksync_ntp_tod_info_t ntp_tod; /* NTP ToD configuration */ - struct bksync_extts_event extts_event; - struct ptp_clock *ptp_clock; - struct ptp_clock_info ptp_info; - struct mutex ptp_lock; - int num_phys_ports; - bksync_ptp_time_t ptp_time; - bksync_2step_info_t two_step; - bksync_port_stats_t *port_stats; - bksync_init_info_t init_data; - bksync_dnx_jr2_header_info_t jr2_header_data; -}bksync_dev_t; - -/* Clock Private Data */ -struct bksync_ptp_priv { - int timekeep_status; - u32 mirror_encap_bmp; - struct delayed_work time_keep; - struct kobject *kobj; - int max_dev; - struct delayed_work extts_logging; - bksync_dev_t *dev_info; - bksync_dev_t *master_dev_info; -}; - -/************************ Local Variables ************************/ -static ibde_t *kernel_bde = NULL; -static struct bksync_ptp_priv *ptp_priv; -static int num_retries = 5; /* Retry count */ -/* Driver Proc Entry root */ -static struct proc_dir_entry *bksync_proc_root = NULL; - -/************************ Local Functions ************************/ -static void bksync_ptp_time_keep_init(void); -static void bksync_ptp_time_keep_deinit(void); - -static void bksync_dnx_jr2_parse_rxpkt_system_header(bksync_dev_t *dev_info, uint8_t *raw_frame, - bksync_dnx_rx_pkt_parse_info_t *rx_pkt_parse_info, int isfirsthdr); - -static int bksync_ptp_gettime(struct ptp_clock_info *ptp, struct timespec64 *ts); - -static void bksync_ptp_extts_logging_init(void); -static void bksync_ptp_extts_logging_deinit(void); - -static int bksync_ptp_remove(void); - -#if defined(CMIC_SOFT_BYTE_SWAP) - -#define CMIC_SWAP32(_x) ((((_x) & 0xff000000) >> 24) \ - | (((_x) & 0x00ff0000) >> 8) \ - | (((_x) & 0x0000ff00) << 8) \ - | (((_x) & 0x000000ff) << 24)) - -#define DEV_READ32(_d, _a, _p) \ - do { \ - uint32_t _data; \ - _data = (((volatile uint32_t *)(_d)->base_addr)[(_a)/4]); \ - *(_p) = CMIC_SWAP32(_data); \ - } while(0) - -#define DEV_WRITE32(_d, _a, _v) \ - do { \ - uint32_t _data = CMIC_SWAP32(_v); \ - ((volatile uint32_t *)(_d)->base_addr)[(_a)/4] = (_data); \ - } while(0) - -#else - -#define DEV_READ32(_d, _a, _p) \ - do { \ - *(_p) = (((volatile uint32_t *)(_d)->base_addr)[(_a)/4]); \ - } while(0) - -#define DEV_WRITE32(_d, _a, _v) \ - do { \ - ((volatile uint32_t *)(_d)->base_addr)[(_a)/4] = (_v); \ - } while(0) -#endif /* defined(CMIC_SOFT_BYTE_SWAP) */ - -#define BKSYNC_U_SLEEP(usec) \ - do { \ - if (DEVICE_IS_DNX) { \ - udelay(usec); \ - } else { \ - usleep_range(usec,usec+1); \ - } \ - } while (0) - -static void -ptp_sleep(int jiffies) -{ - wait_queue_head_t wq; - init_waitqueue_head(&wq); - - wait_event_timeout(wq, 0, jiffies); - -} - -#ifdef BDE_EDK_SUPPORT -static void bksync_hostcmd_data_op(int dev_no, int setget, u64 *d1, u64 *d2) -{ - bksync_dev_t *dev_info = &ptp_priv->dev_info[dev_no]; - u32 w0, w1; - u64 data; - - if (!d1) { - return; - } - - if (setget) { - if (d1) { - data = *d1; - dev_info->fw_comm->dw1[0] = (data & 0xFFFFFFFF); - dev_info->fw_comm->dw1[1] = (data >> 32); - } - - if (d2) { - data = *d2; - dev_info->fw_comm->dw2[0] = (data & 0xFFFFFFFF); - dev_info->fw_comm->dw2[1] = (data >> 32); - } - - } else { - if (d1) { - w0 = dev_info->fw_comm->dw1[0]; - w1 = dev_info->fw_comm->dw1[1]; - data = (((u64)w1 << 32) | (w0)); - *d1 = data; - } - - if (d2) { - w0 = dev_info->fw_comm->dw2[0]; - w1 = dev_info->fw_comm->dw2[1]; - data = (((u64)w1 << 32) | (w0)); - *d2 = data; - } - } -} -#else -static void bksync_hostcmd_data_op(int dev_no, int setget, u64 *d1, u64 *d2) -{ - bksync_dev_t *dev_info = &ptp_priv->dev_info[dev_no]; - u32 w0, w1; - u64 data; - - if (!d1) { - return; - } - - if (setget) { - if (d1) { - data = *d1; - w0 = (data & 0xFFFFFFFF); - w1 = (data >> 32); - DEV_WRITE32(dev_info, hostcmd_regs[1], w0); - DEV_WRITE32(dev_info, hostcmd_regs[2], w1); - } - - if (d2) { - data = *d2; - - w0 = (data & 0xFFFFFFFF); - w1 = (data >> 32); - DEV_WRITE32(dev_info, hostcmd_regs[3], w0); - DEV_WRITE32(dev_info, hostcmd_regs[4], w1); - } - } else { - if (d1) { - DEV_READ32(dev_info, hostcmd_regs[1], &w0); - DEV_READ32(dev_info, hostcmd_regs[2], &w1); - data = (((u64)w1 << 32) | (w0)); - *d1 = data; - } - - if (d2) { - DEV_READ32(dev_info, hostcmd_regs[3], &w0); - DEV_READ32(dev_info, hostcmd_regs[4], &w1); - data = (((u64)w1 << 32) | (w0)); - *d2 = data; - } - } -} -#endif - -static int bksync_cmd_go(bksync_dev_t *dev_info, u32 cmd, void *data0, void *data1) -{ - int ret = -1; - int retry_cnt = (1000); /* 1ms default timeout for hostcmd response */ - int port = 0; - char cmd_str[30]; - uint32_t cmd_status; - uint32_t seq_id = 0; - uint32_t subcmd = 0; - uint64_t freqcorr = 0; - uint64_t phase_offset = 0; - int dev_no = dev_info->dev_no; - ktime_t start, now; - - mutex_lock(&dev_info->ptp_lock); - - start = ktime_get(); - - /* init data */ -#ifdef BDE_EDK_SUPPORT - if (dev_info->fw_comm == NULL) { - DBG_ERR(("Device is not initialized\n")); - return -1; - } - - dev_info->fw_comm->dw1[0] = 0; - dev_info->fw_comm->dw1[1] = 0; - dev_info->fw_comm->dw2[0] = 0; - dev_info->fw_comm->dw2[1] = 0; -#else - DEV_WRITE32(dev_info, hostcmd_regs[1], 0x0); - DEV_WRITE32(dev_info, hostcmd_regs[2], 0x0); - DEV_WRITE32(dev_info, hostcmd_regs[3], 0x0); - DEV_WRITE32(dev_info, hostcmd_regs[4], 0x0); -#endif - - switch (cmd) { - case BKSYNC_INIT: - retry_cnt = (retry_cnt * 4); - snprintf(cmd_str, sizeof(cmd_str), "KSYNC_INIT"); - phase_offset = 0; - bksync_hostcmd_data_op(dev_no, 1, (u64 *)&(phase_offset), 0); - break; - case BKSYNC_FREQCOR: - snprintf(cmd_str, sizeof(cmd_str), "KSYNC_FREQCORR"); - freqcorr = *((s32 *)data0); - bksync_hostcmd_data_op(dev_no, 1, (u64 *)&(freqcorr), 0); - break; - case BKSYNC_ADJTIME: - snprintf(cmd_str, sizeof(cmd_str), "KSYNC_ADJTIME"); - phase_offset = *((s64 *)data0); - bksync_hostcmd_data_op(dev_no, 1, (u64 *)&(phase_offset), 0); - break; - case BKSYNC_GETTIME: - retry_cnt = (retry_cnt * 2); - snprintf(cmd_str, sizeof(cmd_str), "KSYNC_GETTIME"); - break; - case BKSYNC_GET_TSTIME: - snprintf(cmd_str, sizeof(cmd_str), "KSYNC_GET_TSTIME"); - bksync_hostcmd_data_op(dev_no, 1, (u64 *)data0, (u64 *)data1); - break; - case BKSYNC_ACK_TSTIME: - retry_cnt = (retry_cnt * 2); - snprintf(cmd_str, sizeof(cmd_str), "KSYNC_ACK_TSTIME"); - bksync_hostcmd_data_op(dev_no, 1, (u64 *)data0, (u64 *)data1); - break; - case BKSYNC_SETTIME: - snprintf(cmd_str, sizeof(cmd_str), "KSYNC_SETTIME"); - dev_info->ptp_time.ptptime = *((s64 *)data0); - phase_offset = 0; - bksync_hostcmd_data_op(dev_no, 1, (u64 *)&(dev_info->ptp_time.ptptime), (u64 *)&(phase_offset)); - break; - case BKSYNC_MTP_TS_UPDATE_ENABLE: - retry_cnt = (retry_cnt * 6); - snprintf(cmd_str, sizeof(cmd_str), "KSYNC_MTP_TS_UPDATE_ENABLE"); - bksync_hostcmd_data_op(dev_no, 1, (u64 *)data0, 0); - break; - case BKSYNC_MTP_TS_UPDATE_DISABLE: - retry_cnt = (retry_cnt * 6); - snprintf(cmd_str, sizeof(cmd_str), "KSYNC_MTP_TS_UPDATE_DISABLE"); - bksync_hostcmd_data_op(dev_no, 1, (u64 *)data0, 0); - break; - case BKSYNC_DEINIT: - retry_cnt = (retry_cnt * 4); - snprintf(cmd_str, sizeof(cmd_str), "KSYNC_DEINIT"); - break; - case BKSYNC_SYSINFO: - snprintf(cmd_str, sizeof(cmd_str), "KSYNC_SYSINFO"); - bksync_hostcmd_data_op(dev_no, 1, (u64 *)data0, (u64 *)data1); - break; - case BKSYNC_BROADSYNC: - subcmd = *((u32 *)data0); - snprintf(cmd_str, sizeof(cmd_str), "KSYNC_BROADSYNC"); - bksync_hostcmd_data_op(dev_no, 1, (u64 *)data0, (u64 *)data1); - break; - case BKSYNC_GPIO: - snprintf(cmd_str, sizeof(cmd_str), "KSYNC_GPIO"); - bksync_hostcmd_data_op(dev_no, 1, (u64 *)data0, (u64 *)data1); - break; - case BKSYNC_EVLOG: - snprintf(cmd_str, sizeof(cmd_str), "KSYNC_EVLOG"); - bksync_hostcmd_data_op(dev_no, 1, (u64 *)data0, (u64 *)data1); - break; - case BKSYNC_EXTTSLOG: - snprintf(cmd_str, sizeof(cmd_str), "KSYNC_EXTTSLOG"); - bksync_hostcmd_data_op(dev_no, 1, (u64 *)data0, (u64 *)data1); - break; -#ifdef BDE_EDK_SUPPORT - case BKSYNC_GET_EXTTS_BUFF: - snprintf(cmd_str, sizeof(cmd_str), "BKSYNC_GET_EXTTS_BUFF"); - bksync_hostcmd_data_op(dev_no, 1, (u64 *)data0, (u64 *)data1); - break; -#endif - case BKSYNC_GPIO_PHASEOFFSET: - snprintf(cmd_str, sizeof(cmd_str), "BKSYNC_GPIO_PHASEOFFSET"); - bksync_hostcmd_data_op(dev_no, 1, (u64 *)data0, (u64 *)data1); - break; -#ifdef BDE_EDK_SUPPORT - case BKSYNC_PTP_TOD: - snprintf(cmd_str, sizeof(cmd_str), "BKSYNC_PTP_TOD"); - bksync_hostcmd_data_op(dev_no, 1, (u64 *)data0, (u64 *)data1); - break; - case BKSYNC_NTP_TOD: - snprintf(cmd_str, sizeof(cmd_str), "BKSYNC_NTP_TOD"); - bksync_hostcmd_data_op(dev_no, 1, (u64 *)data0, (u64 *)data1); - break; - case BKSYNC_PTP_TOD_GET: - retry_cnt = (retry_cnt * 4); - snprintf(cmd_str, sizeof(cmd_str), "BKSYNC_PTP_TOD_GET"); - break; - case BKSYNC_NTP_TOD_GET: - retry_cnt = (retry_cnt * 4); - snprintf(cmd_str, sizeof(cmd_str), "BKSYNC_NTP_TOD_GET"); - break; -#endif - default: - snprintf(cmd_str, sizeof(cmd_str), "KSYNC_XXX"); - break; - } - -#ifdef BDE_EDK_SUPPORT - dev_info->fw_comm->cmd = cmd; -#else - DEV_WRITE32(dev_info, hostcmd_regs[0], cmd); -#endif - - do { -#ifdef BDE_EDK_SUPPORT - cmd_status = dev_info->fw_comm->cmd; -#else - DEV_READ32(dev_info, hostcmd_regs[0], &cmd_status); -#endif - - if (cmd_status == BKSYNC_DONE) { - ret = 0; - switch (cmd) { - case BKSYNC_GET_TSTIME: - case BKSYNC_GETTIME: -#ifdef BDE_EDK_SUPPORT - case BKSYNC_PTP_TOD_GET: - case BKSYNC_NTP_TOD_GET: -#endif -#ifndef BDE_EDK_SUPPORT - { - u64 d0 = 0ULL; - u64 d1 = 0ULL; - int retry2_cnt = 3; - *(u64 *)data0 = 0ULL; - *(u64 *)data1 = 0ULL; - do { - bksync_hostcmd_data_op(dev_no, 0, &d0, &d1); - *(u64 *)data0 |= d0; - *(u64 *)data1 |= d1; - if (((*(u64 *)data0) & 0xFFFFFFFF) && ((*(u64 *)data0)>>32) && - ((*(u64 *)data1) & 0xFFFFFFFF) && ((*(u64 *)data1)>>32)) { - break; - } - retry2_cnt--; - BKSYNC_U_SLEEP(1); - } while (retry2_cnt); - if (retry2_cnt == 0) - ret = -1; - } - break; -#else - bksync_hostcmd_data_op(dev_no, 0, (u64 *)data0, (u64 *)data1); - break; -#endif - case BKSYNC_BROADSYNC: - if ((subcmd == BKSYNC_BROADSYNC_BS0_STATUS_GET) || - (subcmd == BKSYNC_BROADSYNC_BS1_STATUS_GET)) { - bksync_hostcmd_data_op(dev_no, 0, (u64 *)data0, (u64 *)data1); - } - break; -#ifdef BDE_EDK_SUPPORT - /* Get the host ram address from fw.*/ - case BKSYNC_GET_EXTTS_BUFF: - bksync_hostcmd_data_op(dev_no, 0, (u64 *)data0, (u64 *)data1); - break; -#endif - default: - break; - } - break; - } - BKSYNC_U_SLEEP(100); - retry_cnt--; - } while (retry_cnt); - - now = ktime_get(); - mutex_unlock(&dev_info->ptp_lock); - - if (retry_cnt == 0) { - DBG_ERR(("bksync_cmd_go(dev_no:%d) Timeout on response from R5 to cmd %s time taken %lld us\n", dev_no, cmd_str, ktime_us_delta(now, start))); - - if (cmd == BKSYNC_GET_TSTIME || cmd == BKSYNC_ACK_TSTIME) { - port = *((uint64_t *)data0) & 0xFFF; - seq_id = *((uint64_t*)data0) >> 16; - DBG_ERR(("bksync_cmd_go(dev_no:%d) 2step timestamp get timeout for port:%d seq_id:%d\n", dev_no, port, seq_id)); - } - } - - if (debug & DBG_LVL_CMDS) { - if (ktime_us_delta(now, start) > 5000) - DBG_CMDS(("bksync_cmd_go(dev_no:%d) R5 Command %s exceeded time expected (%lld us)\n", dev_no, cmd_str, ktime_us_delta(now, start))); - } - - DBG_CMDS(("bksync_cmd_go(dev_no:%d): cmd:%s rv:%d\n", dev_no, cmd_str, ret)); - - return ret; -} - -#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5,3,0)) - -#if (LINUX_VERSION_CODE <= KERNEL_VERSION(5,13,0)) -#if (!(IS_REACHABLE(CONFIG_PTP_1588_CLOCK))) -static long scaled_ppm_to_ppb(long ppm) -{ - s64 ppb = 1 + ppm; - - ppb *= 125; - ppb >>= 13; - - return (long)ppb; -} -#endif -#endif - -/** - * bksync_ptp_freqcorr - * - * @ptp: pointer to ptp_clock_info structure - * @ppm: frequency correction value in ppm with 16bit binary - * fractional field. - * - * Description: this function will set the frequency correction - */ -static int bksync_ptp_freqcorr(struct ptp_clock_info *ptp, long ppm) -{ - bksync_dev_t *dev_info = container_of(ptp, bksync_dev_t, ptp_info); - int ret = -1; - int64_t ppb = 0; - - if (!dev_info->dev_init) { - return ret; - } - - ppb = scaled_ppm_to_ppb(ppm); - - ret = bksync_cmd_go(dev_info, BKSYNC_FREQCOR, &ppb, NULL); - DBG_VERB(("bksync_ptp_freqcorr: applying freq correction: ppm:0x%llx ppb:0x%llx; rv:%d\n", (int64_t)ppm, ppb, ret)); - - return ret; -} -#else -/** - * bksync_ptp_freqcorr - * - * @ptp: pointer to ptp_clock_info structure - * @ppb: frequency correction value in ppb - * - * Description: this function will set the frequency correction - */ -static int bksync_ptp_freqcorr(struct ptp_clock_info *ptp, s32 ppb) -{ - bksync_dev_t *dev_info = container_of(ptp, bksync_dev_t, ptp_info); - int ret = -1; - - if (!dev_info->dev_init) { - return ret; - } - - ret = bksync_cmd_go(dev_info, BKSYNC_FREQCOR, &ppb, NULL); - DBG_VERB(("bksync_ptp_freqcorr: applying freq correction: ppb:0%x; rv:%d\n", ppb, ret)); - - return ret; -} -#endif - -/** - * bksync_ptp_adjtime - * - * @ptp: pointer to ptp_clock_info structure - * @delta: desired change in nanoseconds - * - * Description: this function will shift/adjust the hardware clock time. - */ -static int bksync_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta) -{ - bksync_dev_t *dev_info = container_of(ptp, bksync_dev_t, ptp_info); - int ret = -1; - - if (!dev_info->dev_init) { - return ret; - } - - ret = bksync_cmd_go(dev_info, BKSYNC_ADJTIME, (void *)&delta, NULL); - DBG_VERB(("ptp_adjtime: adjtime: 0x%llx; rv:%d\n", delta, ret)); - - return ret; -} - -/** - * bksync_ptp_gettime - * - * @ptp: pointer to ptp_clock_info structure - * @ts: pointer to hold time/result - * - * Description: this function will read the current time from the - * hardware clock and store it in @ts. - */ -static int bksync_ptp_gettime(struct ptp_clock_info *ptp, struct timespec64 *ts) -{ - bksync_dev_t *dev_info = container_of(ptp, bksync_dev_t, ptp_info); - bksync_dev_t *master_dev_info = NULL; - int ret = -1; - s64 reftime = 0; - s64 refctr = 0; - static u64 prv_reftime = 0, prv_refctr = 0; - u64 diff_reftime = 0, diff_refctr = 0; - - if (!dev_info->dev_init) { - return ret; - } - - if ((shared_phc == 1) && (dev_info->dev_no != master_core)) { - master_dev_info = &ptp_priv->dev_info[master_core]; - - if (master_dev_info) { - dev_info->ptp_time.ptptime_alt = dev_info->ptp_time.ptptime; - dev_info->ptp_time.reftime_alt = dev_info->ptp_time.reftime; - - dev_info->ptp_time.ptp_pair_lock = 1; - dev_info->ptp_time.ptptime = master_dev_info->ptp_time.ptptime; - dev_info->ptp_time.reftime = master_dev_info->ptp_time.reftime; - dev_info->ptp_time.ptp_pair_lock = 0; - - *ts = ns_to_timespec64(dev_info->ptp_time.ptptime); - } - } else { - ret = bksync_cmd_go(dev_info, BKSYNC_GETTIME, (void *)&reftime, (void *)&refctr); - if (ret == 0) { - DBG_VERB(("ptp_gettime: gettime: 0x%llx refctr:0x%llx\n", reftime, refctr)); - - dev_info->ptp_time.ptptime_alt = dev_info->ptp_time.ptptime; - dev_info->ptp_time.reftime_alt = dev_info->ptp_time.reftime; - - dev_info->ptp_time.ptp_pair_lock = 1; - dev_info->ptp_time.ptptime = reftime; - dev_info->ptp_time.reftime = refctr; - dev_info->ptp_time.ptp_pair_lock = 0; - - diff_reftime = reftime - prv_reftime; - diff_refctr = refctr - prv_refctr; - - if (diff_reftime != diff_refctr) { - DBG_WARN(("ptp_gettime ptptime: 0x%llx reftime: 0x%llx prv_ptptime: 0x%llx prv_reftime: 0x%llx \n", - dev_info->ptp_time.ptptime, dev_info->ptp_time.reftime, diff_reftime, diff_refctr)); - } - prv_reftime = reftime; - prv_refctr = refctr; - - *ts = ns_to_timespec64(reftime); - } - } - return ret; -} - - -/** - * bksync_ptp_settime - * - * @ptp: pointer to ptp_clock_info structure - * @ts: time value to set - * - * Description: this function will set the current time on the - * hardware clock. - */ -static int bksync_ptp_settime(struct ptp_clock_info *ptp, - const struct timespec64 *ts) -{ - bksync_dev_t *dev_info = container_of(ptp, bksync_dev_t, ptp_info); - s64 reftime, phaseadj; - int ret = -1; - - if (!dev_info->dev_init) { - return ret; - } - - phaseadj = 0; - reftime = timespec64_to_ns(ts); - - ret = bksync_cmd_go(dev_info, BKSYNC_SETTIME, (void *)&reftime, (void *)&phaseadj); - DBG_VERB(("ptp_settime: settime: 0x%llx; rv:%d\n", reftime, ret)); - - return ret; -} - -static int bksync_exttslog_cmd(bksync_dev_t *dev_info, int event, int enable) -{ - int ret = 0; - u64 subcmd = 0, subcmd_data = 0; - -#ifdef BDE_EDK_SUPPORT - sal_vaddr_t vaddr = 0; - - if (NULL == dev_info->extts_log) { - ret = bksync_cmd_go(dev_info, BKSYNC_GET_EXTTS_BUFF, - &subcmd, &subcmd_data); - DBG_VERB((" EXTTS: phy_addr:0x%llx\n", subcmd_data)); - - ret = lkbde_get_phys_to_virt(dev_info->dev_no, (phys_addr_t)subcmd_data, &vaddr); - if ((ret != 0) || (vaddr == 0)) { - DBG_ERR(("EXTTS: failed to get virt_addr for the phy_addr\n")); - return ret; - } - dev_info->extts_log = (bksync_fw_extts_log_t *)vaddr; - DBG_VERB((" EXTTS: virt_addr:%p:0x%llx\n", dev_info->extts_log, (uint64_t)vaddr)); - subcmd_data = 0; - } -#else - subcmd_data = dev_info->extts_dma_mem_addr; -#endif - - /* upper 32b -> event - * lower 32b -> enable/disable */ - subcmd = (u64)event << 32 | enable; - - ret = bksync_cmd_go(dev_info, BKSYNC_EXTTSLOG, &subcmd, &subcmd_data); - DBG_VERB(("bksync_extts_cmd: subcmd: 0x%llx subcmd_data: 0x%llx rv:%d\n", subcmd, subcmd_data, ret)); - - return ret; -} - -static int bksync_ptp_enable(struct ptp_clock_info *ptp, - struct ptp_clock_request *rq, int on) -{ - bksync_dev_t *dev_info = container_of(ptp, bksync_dev_t, ptp_info); - int mapped_event = -1; - int enable = on ? 1 : 0; - int max_event_id = -1; - int event_id = -1; - int dev_no = -1; - - switch (rq->type) { - case PTP_CLK_REQ_EXTTS: - event_id = rq->extts.index; - max_event_id = ptp->n_ext_ts; - - if (event_id > (max_event_id - 1)) { - DBG_ERR(("bksync_ptp_enable: Event id %d not supported\n", event_id)); - return -EINVAL; - } - - /* Determine dev_no based on the user input */ - dev_no = event_id / BKSYNC_NUM_GPIO_EVENTS; - - if (dev_no != dev_info->dev_no) { - dev_info = &ptp_priv->dev_info[dev_no]; - } - - /* Determine actual event id as per device */ - event_id = (max_event_id + event_id) % BKSYNC_NUM_GPIO_EVENTS; - - switch (event_id) { - /* Map EXTTS event_id to FW event_id */ - case 0: - mapped_event = TS_EVENT_GPIO_1; - break; - case 1: - mapped_event = TS_EVENT_GPIO_2; - break; - case 2: - mapped_event = TS_EVENT_GPIO_3; - break; - case 3: - mapped_event = TS_EVENT_GPIO_4; - break; - case 4: - mapped_event = TS_EVENT_GPIO_5; - break; - case 5: - mapped_event = TS_EVENT_GPIO_6; - break; - default: - return -EINVAL; - } - - /* Reject request for unsupported flags */ - if (rq->extts.flags & ~(PTP_ENABLE_FEATURE | PTP_RISING_EDGE)) { - return -EOPNOTSUPP; - } - - dev_info->extts_event.enable[event_id] = enable; - - bksync_exttslog_cmd(dev_info, mapped_event, enable); - - DBG_VERB(("bksync_ptp_enable: Event state change req_index:%u (dev_n:%d event_id:%d) state:%d\n", - rq->extts.index, dev_no, event_id, enable)); - break; - default: - return -EOPNOTSUPP; - } - - return 0; -} - - -static int bksync_ptp_mirror_encap_update(bksync_dev_t *dev_info, struct ptp_clock_info *ptp, - int mtp_idx, int start) -{ - int ret = -1; - u64 mirror_encap_idx; - u32 cmd_status; - - if (mtp_idx > BKSYNC_MAX_MTP_IDX) { - return ret; - } - - mirror_encap_idx = mtp_idx; - if (start) { - cmd_status = BKSYNC_MTP_TS_UPDATE_ENABLE; - ptp_priv->mirror_encap_bmp |= (1 << mtp_idx); - } else { - if (!(ptp_priv->mirror_encap_bmp & mtp_idx)) { - /* Not running */ - return ret; - } - cmd_status = BKSYNC_MTP_TS_UPDATE_DISABLE; - ptp_priv->mirror_encap_bmp &= ~mtp_idx; - } - - ret = bksync_cmd_go(dev_info, cmd_status, &mirror_encap_idx, NULL); - DBG_VERB(("mirror_encap_update: %d, mpt_index: %d, ret:%d\n", start, mtp_idx, ret)); - - return ret; - -} - -/* structure describing a PTP hardware clock */ -static struct ptp_clock_info bksync_ptp_info = { - .owner = THIS_MODULE, - .name = "bksync_ptp_clock", - .max_adj = 200000, - .n_alarm = 0, - .n_ext_ts = 0, /* Determined during module init. */ - .n_per_out = 0, /* will be overwritten in bksync_ptp_register */ - .n_pins = 0, - .pps = 0, - .FREQ_CORR = bksync_ptp_freqcorr, - .adjtime = bksync_ptp_adjtime, - .gettime64 = bksync_ptp_gettime, - .settime64 = bksync_ptp_settime, - .enable = bksync_ptp_enable, -}; - -/** - * bksync_ptp_hw_tstamp_enable - * - * @dev_no: device number - * @port: port number - * - * Description: this is a callback function to enable the timestamping on - * a given port - */ -static int bksync_ptp_hw_tstamp_enable(int dev_no, int port, int tx_type) -{ - uint64_t portmap = 0; - int map = 0; - bksync_dev_t *dev_info = &ptp_priv->dev_info[dev_no]; - - if (!dev_info->dev_init) { - return -1; - } - - if (tx_type == HWTSTAMP_TX_ONESTEP_SYNC) { - DBG_VERB(("hw_tstamp_enable: Enabling 1-step(type:%d) TS on port:%d\n", tx_type, port)); - bksync_ptp_time_keep_init(); - return 0; - } - - DBG_VERB(("hw_tstamp_enable: Enabling 2-step(type:%d) TS on port:%d\n", tx_type, port)); - - if ((port > 0) && (port < dev_info->num_phys_ports)) { - port -= 1; - map = (port / 64); - port = (port % 64); - - portmap = dev_info->two_step.portmap[map]; - portmap |= (uint64_t)0x1 << port; - dev_info->two_step.portmap[map] = portmap; - } else { - DBG_ERR(("hw_tstamp_enable: Error enabling 2-step timestamp on port:%d\n", port)); - return -1; - } - - return 0; -} - -/** - * bksync_ptp_hw_tstamp_disable - * - * @dev_no: device number - * @port: port number - * - * Description: this is a callback function to disable the timestamping on - * a given port - */ -static int bksync_ptp_hw_tstamp_disable(int dev_no, int port, int tx_type) -{ - uint64_t portmap = 0; - int map = 0; - bksync_dev_t *dev_info = &ptp_priv->dev_info[dev_no]; - - if (!dev_info->dev_init) { - return -1; - } - - if (tx_type == HWTSTAMP_TX_ONESTEP_SYNC) { - DBG_VERB(("hw_tstamp_disable: Disable 1Step TS(type:%d) port = %d\n", tx_type, port)); - return 0; - } - - DBG_VERB(("hw_tstamp_disable: Disable 2Step TS(type:%d) port = %d\n", tx_type, port)); - - if ((port > 0) && (port < dev_info->num_phys_ports)) { - port -= 1; - map = (port / 64); - port = (port % 64); - - portmap = dev_info->two_step.portmap[map]; - portmap &= ~((uint64_t)0x1 << port); - dev_info->two_step.portmap[map]= portmap; - } else { - DBG_ERR(("hw_tstamp_disable: Error disabling timestamp on port:%d\n", port)); - return -1; - } - - return 0; -} - -static int bksync_ptp_transport_get(uint8_t *pkt) -{ - int transport = 0; - uint16_t ethertype; - uint16_t tpid; - int tpid_offset, ethype_offset; - - /* Need to check VLAN tag if packet is tagged */ - tpid_offset = 12; - tpid = pkt[tpid_offset] << 8 | pkt[tpid_offset + 1]; - if (tpid == 0x8100) { - ethype_offset = tpid_offset + 4; - } else { - ethype_offset = tpid_offset; - } - - ethertype = pkt[ethype_offset] << 8 | pkt[ethype_offset+1]; - - switch (ethertype) { - case 0x88f7: /* ETHERTYPE_PTPV2 */ - transport = 2; - break; - - case 0x0800: /* ETHERTYPE_IPV4 */ - transport = 4; - break; - - case 0x86DD: /* ETHERTYPE_IPV6 */ - transport = 6; - break; - - default: - transport = 0; - } - - return transport; -} - -static int -bksync_txpkt_tsts_tsamp_get(bksync_dev_t *dev_info, int port, uint32_t pkt_seq_id, uint32_t *ts_valid, uint32_t *seq_id, uint64_t *timestamp) -{ - int ret = 0; - uint64_t data=0ULL; - u32 fifo_rxctr = 0; - - *ts_valid = 0; - *timestamp = 0ULL; - *seq_id = 0; - - data = (port & 0xFFFF) | ((pkt_seq_id & 0xFFFF) << 16); - - ret = bksync_cmd_go(dev_info, BKSYNC_GET_TSTIME, &data, timestamp); - if (ret >= 0) { - *ts_valid = data & 0x1ULL; - *seq_id = (data >> 16) & 0xFFFF; - fifo_rxctr = (data >> 32) & 0xFFFFFFFF; - if (*ts_valid) { - data = (port & 0xFFFF) | ((pkt_seq_id & 0xFFFF) << 16); - ret = bksync_cmd_go(dev_info, BKSYNC_ACK_TSTIME, &data, 0ULL); - if (ret >= 0) { - if (fifo_rxctr != 0) { - if (fifo_rxctr != (dev_info->port_stats[port].fifo_rxctr + 1)) { - DBG_ERR(("FW reset or lost timestamp FIFO_RxCtr:" - "(Prev %u : Current %u) port:%d pkt_sn:%u hw_sn:%u \n", - dev_info->port_stats[port].fifo_rxctr, - fifo_rxctr, port, pkt_seq_id, *seq_id)); - } - dev_info->port_stats[port].fifo_rxctr = fifo_rxctr; - } - } else { - DBG_ERR(("BKSYNC_ACK_TSTIME failed on port:%d sn:%d\n", port, pkt_seq_id)); - } - } else { - DBG_ERR(("BKSYNC_GET_TSTIME invalid on port:%d pkt_sn:%d fw_sn:%d fifo:%d prev_fifo:%d\n", - port, pkt_seq_id, *seq_id, fifo_rxctr, - dev_info->port_stats[port].fifo_rxctr)); - } - } else { - DBG_ERR(("BKSYNC_GET_TSTIME failed on port:%d sn:%d\n", port, pkt_seq_id)); - } - return ret; -} - -/** - * bksync_ptp_hw_tstamp_tx_time_get - * - * @dev_no: device number - * @port: port number - * @pkt: packet address - * @ts: timestamp to be retrieved - * - * Description: this is a callback function to retrieve the timestamp on - * a given port - * NOTE: - * Two-step related - fetching the timestamp from portmacro, not needed for one-step - */ -static int bksync_ptp_hw_tstamp_tx_time_get(int dev_no, int port, uint8_t *pkt, uint64_t *ts, int tx_type) -{ - /* Get Timestamp from R5 or CLMAC */ - uint32_t ts_valid = 0; - uint32_t seq_id = 0; - uint32_t pktseq_id = 0; - uint64_t timestamp = 0; - uint16_t tpid = 0; - ktime_t start; - u64 delta; - int retry_cnt = num_retries; - int seq_id_offset, tpid_offset; - int transport = network_transport; - bksync_dev_t *dev_info = &ptp_priv->dev_info[dev_no]; - - if (!dev_info->dev_init) { - return -1; - } - - if (!pkt || !ts || port < 1 || port > 255) { - return -1; - } - - *ts = 0; - port -= 1; - - start = ktime_get(); - /* Linux 5.10.67 kernel complains about missing delay request timestamp for even if - * configuration is for one-step ptp, hence provided ptp time in skb timestamp - */ - if (tx_type == HWTSTAMP_TX_ONESTEP_SYNC) { - DBG_TXTS(("hw_tstamp_tx_time_get: ONESTEP port %d\n", port)); - if (dev_info->ptp_time.ptp_pair_lock == 1) { - /* use alternate pair when main dataset is being updated */ - *ts = dev_info->ptp_time.ptptime_alt; - } else { - *ts = dev_info->ptp_time.ptptime; - } - dev_info->port_stats[port].pkt_txctr += 1; - goto exit; - } - - tpid_offset = 12; - - /* Parse for nw transport */ - if (transport == 0) { - transport = bksync_ptp_transport_get(pkt); - } - - switch(transport) - { - case 2: - seq_id_offset = 0x2c; - break; - case 4: - seq_id_offset = 0x48; - break; - case 6: - seq_id_offset = 0x5c; - break; - default: - seq_id_offset = 0x2c; - break; - } - - /* Need to check VLAN tag if packet is tagged */ - tpid = pkt[tpid_offset] << 8 | pkt[tpid_offset + 1]; - if (tpid == 0x8100) { - seq_id_offset += 4; - } - - pktseq_id = pkt[seq_id_offset] << 8 | pkt[seq_id_offset + 1]; - - DBG_TXTS(("hw_tstamp_tx_time_get: port %d pktseq_id %u\n", port, pktseq_id)); - - /* Fetch the TX timestamp from shadow memory */ - do { - bksync_txpkt_tsts_tsamp_get(dev_info, port, pktseq_id, &ts_valid, &seq_id, ×tamp); - if (ts_valid) { - - if (seq_id == pktseq_id) { - *ts = timestamp; - dev_info->port_stats[port].tsts_match += 1; - - delta = ktime_us_delta(ktime_get(), start); - DBG_TXTS(("Port: %d Skb_SeqID %d FW_SeqId %d and TS:%llx FetchTime %lld retries:%d\n", - port, pktseq_id, seq_id, timestamp, delta, - (num_retries-retry_cnt))); - - if (delta < dev_info->port_stats[port].tsts_best_fetch_time || dev_info->port_stats[port].tsts_best_fetch_time == 0) { - dev_info->port_stats[port].tsts_best_fetch_time = delta; - } - if (delta > dev_info->port_stats[port].tsts_worst_fetch_time || dev_info->port_stats[port].tsts_worst_fetch_time == 0) { - dev_info->port_stats[port].tsts_worst_fetch_time = delta; - } - /* Calculate Moving Average*/ - dev_info->port_stats[port].tsts_avg_fetch_time = ((u32)delta + ((dev_info->port_stats[port].tsts_match - 1) * dev_info->port_stats[port].tsts_avg_fetch_time)) / dev_info->port_stats[port].tsts_match; - break; - } else { - DBG_TXTS(("Discard timestamp on port %d Skb_SeqID %d FW_SeqId %d RetryCnt %d TimeLapsed (%lld us)\n", - port, pktseq_id, seq_id, (num_retries - retry_cnt), ktime_us_delta(ktime_get(),start))); - - dev_info->port_stats[port].tsts_discard += 1; - continue; - } - } - BKSYNC_U_SLEEP(1000); - retry_cnt--; - } while(retry_cnt); - - - dev_info->port_stats[port].pkt_txctr += 1; - - if (retry_cnt == 0) { - dev_info->port_stats[port].tsts_timeout += 1; - DBG_ERR(("FW Response timeout: Tx TS on phy port:%d Skb_SeqID: %d TimeLapsed (%lld us)\n", - port, pktseq_id, ktime_us_delta(ktime_get(), start))); - } - -exit: - return 0; -} - - -enum { - bxconCustomEncapVersionInvalid = 0, - bxconCustomEncapVersionOne = 1, - - bxconCustomEncapVersionCurrent = bxconCustomEncapVersionOne, - bxconCustomEncapVersionReserved = 255 /* last */ -} bxconCustomEncapVersion; - -enum { - bxconCustomEncapOpcodeInvalid = 0, - bxconCustomEncapOpcodePtpRx = 1, - bxconCustomEncapOpcodeReserved = 255 /* last */ -} bxconCustomEncapOpcode; - -enum { - bxconCustomEncapPtpRxTlvInvalid = 0, - bxconCustomEncapPtpRxTlvPtpRxTime = 1, - bxconCustomEncapPtpRxTlvReserved = 255 /* last */ -} bxconCustomEncapPtpRxTlvType; - -static void -dbg_dump_pkt(uint8_t *data, int size) -{ - int idx; - char str[128]; - - for (idx = 0; idx < size; idx++) { - if ((idx & 0xf) == 0) { - sprintf(str, "%04x: ", idx); - } - sprintf(&str[strlen(str)], "%02x ", data[idx]); - if ((idx & 0xf) == 0xf) { - sprintf(&str[strlen(str)], "\n"); - gprintk("%s", str); - } - } - if ((idx & 0xf) != 0) { - sprintf(&str[strlen(str)], "\n"); - gprintk("%s", str); - } -} - -/* onesync_dnx_jr2_parse_rxpkt_system_header : This function parses DNX system headers based - * on JR2 system headers format - */ -static void bksync_dnx_jr2_parse_rxpkt_system_header(bksync_dev_t *dev_info, uint8_t *raw_pkt_frame, - bksync_dnx_rx_pkt_parse_info_t *rx_pkt_parse_info, int isfirsthdr) -{ - bksync_dnx_jr2_ftmh_base_header_t *ftmh_base_hdr = NULL; - bksync_dnx_jr2_timestamp_header_t *timestamp_hdr = NULL; - bksync_dnx_jr2_udh_base_header_t *udh_base_header = NULL; - bksync_dnx_jr2_ftmh_app_spec_ext_1588v2_t *ftmp_app_spec_ext_1588v2_hdr = NULL; - bksync_dnx_jr2_pph_fheiext_vlanedit_3b_header_t *fheiext_vlanedit_3b_hdr = NULL; - bksync_dnx_jr2_pph_fheiext_vlanedit_5b_header_t *fheiext_vlanedit_5b_hdr = NULL; - bksync_dnx_jr2_pph_base_12b_header_t *pph_base_12b_hdr = NULL; - uint8_t raw_frame[64]; - int tmp = 0; - - if ((raw_pkt_frame == NULL) || (rx_pkt_parse_info == NULL)) { - return; - } - - rx_pkt_parse_info->rx_frame_len = 0; - rx_pkt_parse_info->dnx_header_offset = 0; - rx_pkt_parse_info->pph_header_vlan = 0; - rx_pkt_parse_info->rx_hw_timestamp = 0; - rx_pkt_parse_info->src_sys_port = 0; - - for (tmp = 0; tmp < 64; tmp++) { - raw_frame[tmp] = raw_pkt_frame[tmp]; - } - - /* FTMH */ - ftmh_base_hdr = (bksync_dnx_jr2_ftmh_base_header_t *)(&raw_frame[rx_pkt_parse_info->dnx_header_offset]); - ftmh_base_hdr->words[0] = ntohl(ftmh_base_hdr->words[0]); - ftmh_base_hdr->words[1] = ntohl(ftmh_base_hdr->words[1]); - - rx_pkt_parse_info->src_sys_port = (uint16_t)(ftmh_base_hdr->src_sys_port_aggr_0 << 9 | ftmh_base_hdr->src_sys_port_aggr_1 << 1 | ftmh_base_hdr->src_sys_port_aggr_2); - rx_pkt_parse_info->rx_frame_len = (uint16_t)(ftmh_base_hdr->packet_size_0 << 6 | ftmh_base_hdr->packet_size_1); - - rx_pkt_parse_info->dnx_header_offset += BKSYNC_DNXJR2_FTMH_HDR_LEN; - - /* FTMH LB-Key Extension */ - if ((dev_info->jr2_header_data).ftmh_lb_key_ext_size > 0) { - rx_pkt_parse_info->dnx_header_offset += (dev_info->jr2_header_data).ftmh_lb_key_ext_size; - } - - /* FTMH Stacking Extension */ - if ((dev_info->jr2_header_data).ftmh_stacking_ext_size > 0) { - rx_pkt_parse_info->dnx_header_offset += (dev_info->jr2_header_data).ftmh_stacking_ext_size; - } - - /* FTMH BIER BFR Extension */ - if (ftmh_base_hdr->bier_bfr_ext_size > 0) { - rx_pkt_parse_info->dnx_header_offset += BKSYNC_DNXJR2_FTMH_BEIR_BFR_EXT_LEN; - - } - - /* FTMH TM Destination Extension */ - if (ftmh_base_hdr->tm_dest_ext_repsent > 0) { - rx_pkt_parse_info->dnx_header_offset += BKSYNC_DNXJR2_FTMH_TM_DEST_EXT_LEN; - - } - - /* FTMH Application Specific Extension */ - if (ftmh_base_hdr->app_specific_ext_size > 0) { - ftmp_app_spec_ext_1588v2_hdr = (bksync_dnx_jr2_ftmh_app_spec_ext_1588v2_t*)(&raw_frame[rx_pkt_parse_info->dnx_header_offset]); - ftmp_app_spec_ext_1588v2_hdr->word = ntohl(ftmp_app_spec_ext_1588v2_hdr->word); - - if (ftmp_app_spec_ext_1588v2_hdr->type == bksync_dnx_jr2_ftmh_app_spec_ext_type_1588v2) { - } - - rx_pkt_parse_info->dnx_header_offset += BKSYNC_DNXJR2_FTMH_APP_SPECIFIC_EXT_LEN; - - } - - /* FTMH Latency-Flow-ID Extension */ - if (ftmh_base_hdr->flow_id_ext_size > 0) { - rx_pkt_parse_info->dnx_header_offset += BKSYNC_DNXJR2_FTMH_FLOWID_EXT_LEN ; - - } - - /* Time-stamp Header */ - if ((ftmh_base_hdr->pph_type == BKSYNC_DNXJR2_PPH_TYPE_TSH_ONLY) || - (ftmh_base_hdr->pph_type == BKSYNC_DNXJR2_PPH_TYPE_PPH_BASE_TSH) ) { - - timestamp_hdr = (bksync_dnx_jr2_timestamp_header_t* )(&raw_frame[rx_pkt_parse_info->dnx_header_offset]); - timestamp_hdr->word = ntohl(timestamp_hdr->word); - - rx_pkt_parse_info->rx_hw_timestamp = timestamp_hdr->timestamp; - rx_pkt_parse_info->dnx_header_offset += BKSYNC_DNXJR2_TSH_HDR_SIZE; - - } - - /* PPH - internal header */ - if ((ftmh_base_hdr->pph_type == BKSYNC_DNXJR2_PPH_TYPE_PPH_BASE) || - (ftmh_base_hdr->pph_type == BKSYNC_DNXJR2_PPH_TYPE_PPH_BASE_TSH)) { - - pph_base_12b_hdr = (bksync_dnx_jr2_pph_base_12b_header_t*)(&raw_frame[rx_pkt_parse_info->dnx_header_offset]); - - pph_base_12b_hdr->word[0] = ntohl(pph_base_12b_hdr->word[0]); - pph_base_12b_hdr->word[1] = ntohl(pph_base_12b_hdr->word[1]); - pph_base_12b_hdr->word[2] = ntohl(pph_base_12b_hdr->word[2]); - - rx_pkt_parse_info->dnx_header_offset += (dev_info->jr2_header_data).pph_base_size; - - - /* PPH fhei_size handling */ - if (pph_base_12b_hdr->fhei_size > BKSYNC_DNXJR2_PPH_FHEI_TYPE_NONE) { - - switch(pph_base_12b_hdr->fhei_size) { - case BKSYNC_DNXJR2_PPH_FHEI_TYPE_SZ0: /* 3byte */ - fheiext_vlanedit_3b_hdr = (bksync_dnx_jr2_pph_fheiext_vlanedit_3b_header_t*)(&raw_frame[rx_pkt_parse_info->dnx_header_offset]); - - if(fheiext_vlanedit_3b_hdr->type == bksync_dnx_jr2_pph_fheiext_type_vlanedit) { - rx_pkt_parse_info->pph_header_vlan = fheiext_vlanedit_3b_hdr->edit_vid1_0 << 7 | fheiext_vlanedit_3b_hdr->edit_vid1_1; - } - rx_pkt_parse_info->dnx_header_offset += BKSYNC_DNXJR2_PPH_FHEI_SZ0_SIZE; - break; - case BKSYNC_DNXJR2_PPH_FHEI_TYPE_SZ1: /* 5byte */ - fheiext_vlanedit_5b_hdr = (bksync_dnx_jr2_pph_fheiext_vlanedit_5b_header_t*)(&raw_frame[rx_pkt_parse_info->dnx_header_offset]); - - if (fheiext_vlanedit_5b_hdr->type == bksync_dnx_jr2_pph_fheiext_type_vlanedit) { - rx_pkt_parse_info->pph_header_vlan = fheiext_vlanedit_5b_hdr->edit_vid1_0 << 7 | fheiext_vlanedit_5b_hdr->edit_vid1_1; - } else if (fheiext_vlanedit_5b_hdr->type == bksync_dnx_jr2_pph_fheiext_type_trap_snoop_mirror) { - } - rx_pkt_parse_info->dnx_header_offset += BKSYNC_DNXJR2_PPH_FHEI_SZ1_SIZE; - break; - case BKSYNC_DNXJR2_PPH_FHEI_TYPE_SZ2: /* 8byte */ - rx_pkt_parse_info->dnx_header_offset += BKSYNC_DNXJR2_PPH_FHEI_SZ2_SIZE; - break; - default: - break; - } - } - - /* PPH LIF Extension */ - if ((pph_base_12b_hdr->lif_ext_type > 0) && (pph_base_12b_hdr->lif_ext_type < BKSYNC_DNXJER2_PPH_LIF_EXT_TYPE_MAX)) { - rx_pkt_parse_info->dnx_header_offset += (dev_info->jr2_header_data).pph_lif_ext_size[pph_base_12b_hdr->lif_ext_type]; - } - - /* PPH Learn Extension */ - if (pph_base_12b_hdr->learn_ext_present) { - rx_pkt_parse_info->dnx_header_offset += BKSYNC_DNXJR2_PPH_LEARN_EXT_SIZE; - } - } - - /* UDH header */ - if (!isfirsthdr) { - if ((dev_info->jr2_header_data).udh_enable) { - udh_base_header = (bksync_dnx_jr2_udh_base_header_t* )(&raw_frame[rx_pkt_parse_info->dnx_header_offset]); - - rx_pkt_parse_info->dnx_header_offset += BKSYNC_DNXJR2_UDH_BASE_HEADER_LEN; - /* Need to understand more */ - rx_pkt_parse_info->dnx_header_offset += (dev_info->jr2_header_data).udh_data_lenght_per_type[udh_base_header->udh_data_type_0]; - rx_pkt_parse_info->dnx_header_offset += (dev_info->jr2_header_data).udh_data_lenght_per_type[udh_base_header->udh_data_type_1]; - rx_pkt_parse_info->dnx_header_offset += (dev_info->jr2_header_data).udh_data_lenght_per_type[udh_base_header->udh_data_type_2]; - rx_pkt_parse_info->dnx_header_offset += (dev_info->jr2_header_data).udh_data_lenght_per_type[udh_base_header->udh_data_type_3]; - } - } - - DBG_RX(("DNX PKT PARSE(dev_no:%d): src_sys_port %x rx_hw_timestamp %llx pph_header_vlan %llx dnx_header_offset %u rx_frame_len %d\n", - dev_info->dev_no, - rx_pkt_parse_info->src_sys_port, rx_pkt_parse_info->rx_hw_timestamp, rx_pkt_parse_info->pph_header_vlan, - rx_pkt_parse_info->dnx_header_offset, rx_pkt_parse_info->rx_frame_len)); - -} - - -static inline int -bksync_pkt_custom_encap_ptprx_get(uint8_t *pkt, uint64_t *ing_ptptime) -{ - uint8_t *custom_hdr; - uint8_t id[4]; - uint8_t ver, opc; - uint8_t nh_type, nh_rsvd; - uint16_t len, tot_len; - uint16_t nh_len; - uint32_t seq_id = 0; - uint32_t ptp_rx_time[2]; - uint64_t u64_ptp_rx_time = 0; - - custom_hdr = pkt; - - BKSYNC_UNPACK_U8(custom_hdr, id[0]); - BKSYNC_UNPACK_U8(custom_hdr, id[1]); - BKSYNC_UNPACK_U8(custom_hdr, id[2]); - BKSYNC_UNPACK_U8(custom_hdr, id[3]); - if (!((id[0] == 'B') && (id[1] == 'C') && (id[2] == 'M') && (id[3] == 'C'))) { - /* invalid signature */ - return -1; - } - - BKSYNC_UNPACK_U8(custom_hdr, ver); - switch (ver) { - case bxconCustomEncapVersionCurrent: - break; - default: - DBG_ERR(("custom_encap_ptprx_get: Invalid ver\n")); - return -1; - } - - BKSYNC_UNPACK_U8(custom_hdr, opc); - switch (opc) { - case bxconCustomEncapOpcodePtpRx: - break; - default: - DBG_ERR(("custom_encap_ptprx_get: Invalid opcode\n")); - return -1; - } - - BKSYNC_UNPACK_U16(custom_hdr, len); - tot_len = len; - - if (ing_ptptime != NULL) { - BKSYNC_UNPACK_U32(custom_hdr, seq_id); - - /* remaining length of custom encap */ - len = len - (custom_hdr - pkt); - - /* process tlv */ - while (len > 0) { - BKSYNC_UNPACK_U8(custom_hdr, nh_type); - BKSYNC_UNPACK_U8(custom_hdr, nh_rsvd); - BKSYNC_UNPACK_U16(custom_hdr, nh_len); - len = len - (nh_len); - if (nh_rsvd != 0x0) { - continue; /* invalid tlv */ - } - - switch (nh_type) { - case bxconCustomEncapPtpRxTlvPtpRxTime: - BKSYNC_UNPACK_U32(custom_hdr, ptp_rx_time[0]); - BKSYNC_UNPACK_U32(custom_hdr, ptp_rx_time[1]); - u64_ptp_rx_time = ((uint64_t)ptp_rx_time[1] << 32) | (uint64_t)ptp_rx_time[0]; - *ing_ptptime = u64_ptp_rx_time; - break; - default: - custom_hdr += nh_len; - break; - } - } - - DBG_RX_DUMP(("custom_encap_ptprx_get: Custom Encap header:\n")); - if (debug & DBG_LVL_RX_DUMP) dbg_dump_pkt(pkt, tot_len); - - DBG_RX(("custom_encap_ptprx_get: ver=%d opcode=%d tot_len=%d seq_id=0x%x\n", ver, opc, tot_len, seq_id)); - } - - return (tot_len); -} - -/** - * bksync_ptp_hw_tstamp_rx_pre_process - * - * @dev_no: device number - * - * Description: - */ -static int bksync_ptp_hw_tstamp_rx_pre_process(int dev_no, uint8_t *pkt, uint32_t sspa, uint8_t *pkt_offset) -{ - int ret = -1; - int custom_encap_len = 0; - bksync_dev_t *dev_info = &ptp_priv->dev_info[dev_no]; - - DBG_RX(("hw_tstamp_rx_pre_process(dev_no:%d): configured_sspa:0x%x recevied_sspa:0x%x\n", dev_no, (dev_info->init_data).uc_port_sysport, sspa)); - - if (sspa == (dev_info->init_data).uc_port_sysport) { - /* Packet is originating from uc, process next system header in KNET */ - ret = 0; - } else if (pkt_offset != NULL) { - /* Check for custom encap header */ - custom_encap_len = (int)bksync_pkt_custom_encap_ptprx_get(pkt, NULL); - - DBG_RX(("hw_tstamp_rx_pre_process(dev_no:%d): cust_encap_len=0x%x\n", dev_no, custom_encap_len)); - - if (custom_encap_len >= 0) { - *pkt_offset = (uint8_t)custom_encap_len; - ret = 0; - } - } else { - - bksync_dnx_jr2_parse_rxpkt_system_header(dev_info, NULL, NULL, 0); - } - - return ret; -} - - - -/** - * bksync_ptp_hw_tstamp_rx_time_upscale - * - * @dev_no: device number - * @ts: timestamp to be retrieved - * - * Description: this is a callback function to retrieve 64b equivalent of - * rx timestamp - */ -static int bksync_ptp_hw_tstamp_rx_time_upscale(int dev_no, int port, struct sk_buff *skb, uint32_t *meta, uint64_t *ts) -{ - int ret = 0; - int custom_encap_len = 0; - uint16_t tpid = 0; - uint16_t msgtype_offset = 0; - int transport = network_transport; - int ptp_hdr_offset = 0, ptp_message_len = 0; - bksync_dev_t *dev_info = &ptp_priv->dev_info[dev_no]; - - if (!dev_info->dev_init) { - return -1; - } - - DBG_RX_DUMP(("rxtime_upscale: Incoming packet: \n")); - if (debug & DBG_LVL_RX_DUMP) dbg_dump_pkt(skb->data, skb->len); - - switch (KNET_SKB_CB(skb)->dcb_type) { - case 28: /* dpp */ - case 39: /* DNX - Q2A, J2C */ - break; - case 26: - case 32: - case 35: - case 37: - if (pci_cos != (meta[4] & 0x3F)) { - return -1; - } - break; - case 38: - if (pci_cos != ((meta[12] >> 22) & 0x2F)) { - return -1; - } - break; - case 36: - if (pci_cos != ((meta[6] >> 22) & 0x2F)) { - return -1; - } - break; - default: - DBG_ERR(("rxtime_upscale: Invalid dcb type\n")); - return -1; - } - - /* parse custom encap header in pkt for ptp rxtime */ - custom_encap_len = bksync_pkt_custom_encap_ptprx_get((skb->data), ts); - - /* Remove the custom encap header from pkt */ - if (custom_encap_len > 0) { - - skb_pull(skb, custom_encap_len); - - DBG_RX_DUMP(("rxtime_upscale: After removing custom encap: \n")); - if (debug & DBG_LVL_RX_DUMP) dbg_dump_pkt(skb->data, skb->len); - - msgtype_offset = ptp_hdr_offset = 0; - tpid = BKSYNC_SKB_U16_GET(skb, (12)); - if (tpid == 0x8100) { - msgtype_offset += 4; - ptp_hdr_offset += 4; - } - - /* Parse for nw transport */ - transport = bksync_ptp_transport_get(skb->data); - - switch(transport) - { - case 2: /* IEEE 802.3 */ - ptp_hdr_offset += 14; - break; - case 4: /* UDP IPv4 */ - ptp_hdr_offset += 42; - break; - case 6: /* UDP IPv6 */ - ptp_hdr_offset += 62; - break; - default: - ptp_hdr_offset += 42; - break; - } - - ptp_message_len = BKSYNC_SKB_U16_GET(skb, (ptp_hdr_offset + 2)); - - DBG_RX(("rxtime_upscale: custom_encap_len %d tpid 0x%x transport %d skb->len %d ptp message type %d, ptp_message_len %d\n", - custom_encap_len, tpid, transport, skb->len, skb->data[msgtype_offset] & 0x0F, ptp_message_len)); - - /* Remove padding ,CRC from from L2 packet from returning to Linux Stack */ - if (DEVICE_IS_DNX && (transport == 2) ) { - skb_trim(skb, ptp_hdr_offset + ptp_message_len); - } - } - - if ((port > 0) && (port < dev_info->num_phys_ports)) { - port -= 1; - dev_info->port_stats[port].pkt_rxctr += 1; - } - - return ret; -} - - -static void bksync_hton64(u8 *buf, const uint64_t *data) -{ -#ifdef __LITTLE_ENDIAN - /* LITTLE ENDIAN */ - buf[0] = (*(((uint8_t*)(data)) + 7u)); - buf[1] = (*(((uint8_t*)(data)) + 6u)); - buf[2] = (*(((uint8_t*)(data)) + 5u)); - buf[3] = (*(((uint8_t*)(data)) + 4u)); - buf[4] = (*(((uint8_t*)(data)) + 3u)); - buf[5] = (*(((uint8_t*)(data)) + 2u)); - buf[6] = (*(((uint8_t*)(data)) + 1u)); - buf[7] = (*(((uint8_t*)(data)) + 0u)); -#else - memcpy(buf, data, 8); -#endif -} - -static void -bksync_dpp_otsh_update(struct sk_buff *skb, int hwts, int encap_type, int ptp_hdr_offset) -{ - - /* - * Type [47:46] type of OAM-TS extension. - * 0x0: OAM - * 0x1: 1588v2 - * 0x2: Latency-measurement - * 0x3: Reserved - * - * TP-Command [45:43] 1588v2 command - * 0x0: None - * 0x1: Stamp - * 0x2: Record (2 step, record Tx-TS in a FIFO) - * 0x3-0x7: Reserved - * - * TS-Encapsulation [42] 1588v2 Encapsulation - * 0x0: UDP - * 0x1: Non UDP - * - * OAM-TS-Data [33:32] OAM-TS-Data - * 0x1: In-PP-Port.External-BRCM-MAC - * - * OAM-TS-Data [31:0] - * Transparent or trapped 1588 events - * - * Rx-Time-Stamp - * Injected 1588v2 event from ARM/CPU: 0x0 - * - * Offset [7:0] ptp_hdr_offset - * Offset from end of System Headers to the start of the 1588v2 frame - * - */ - - /* PPH_TYPE = OAM-TS */ - skb->data[2] |= 0x80; - - /* OTSH.type = 1588v2 */ - skb->data[6] = 0x40; - - /* OTSH.tp_command = 1-step */ - switch (hwts) { - case HWTSTAMP_TX_ONESTEP_SYNC: - skb->data[6] |= ((0x1) << 3); - break; - default: - skb->data[6] |= ((0x2) << 3); - break; - } - - /* OTSH.encap_type = udp vs non-udp */ - skb->data[6] |= (((encap_type == 2) ? 1 : 0) << 2); - - /* In-PP-Port.External-BRCM-MAC = 1 */ - skb->data[6] |= (0x1 << 0); - - /* Timestamp: 0x0 */ - skb->data[7] = skb->data[8] = skb->data[9] = skb->data[10] = 0x0; - - skb->data[11] = ptp_hdr_offset; - - return; -} -/* IPv6 WAR to avoid H/W limitation of JR2x series devices */ -static void -bksync_dnx_ase1588_tsh_hdr_update_ipv6(bksync_dev_t *dev_info, struct sk_buff *skb, int hwts, int encap_type, int ptp_hdr_offset) -{ - int itmh_offset = 0, ftmh_ase_offset = 0, tse_offset = 0; - int pph_udh_present = 0; - /* Module Hdr [16] + PTCH [2] + ITMH [5] + ASE1588 [6] + TSH [4] + Internal Hdr [12] + UDH base [1] */ - - /* For DNX3 for CF update 1588v2_Offset should also have system_header length of except Module HDR [16] */ - if ((dev_info->init_data).application_v2) { - ptp_hdr_offset -= BKSYNC_DNXJR2_MODULE_HEADER_LEN; - } else { - ptp_hdr_offset -= BKSYNC_DNXJR2_MODULE_HEADER_LEN - 1; - } - - if (ptp_hdr_offset == 93) { - /* PTCH [3] + ITMH [5] + ASE1588 [6] + TSH [4] + Internal Hdr [12] + UDH base [1] = 31 + IPv6 [62] + VLAN [0] = 93 */ - /* Inserting TSH and ASE before PPH and UDH - shifted PPH and UDH by 13 bytes in skb->data */ - uint8_t pph_start[BKSYNC_DNXJR2_PPH_HEADER_LEN]; - uint8_t udh_start; - itmh_offset = BKSYNC_DNXJR2_MODULE_HEADER_LEN + BKSYNC_DNX_PTCH_1_SIZE; - - pph_udh_present = 1; - memcpy(pph_start, &skb->data[itmh_offset + BKSYNC_DNXJR2_ITMH_HEADER_LEN], BKSYNC_DNXJR2_PPH_HEADER_LEN); - udh_start = skb->data[itmh_offset + BKSYNC_DNXJR2_ITMH_HEADER_LEN + BKSYNC_DNXJR2_PPH_HEADER_LEN]; - /* copying pph after ase + tsh 34 = module + ptch + itmh + ase + tsh */ - memcpy(&skb->data[34], pph_start, BKSYNC_DNXJR2_PPH_HEADER_LEN); - /* copying udh after pph 46 = module + ptch + itmh + ase + tsh + pph */ - skb->data[46] = udh_start; - } - else { - /* PTCH [2] + ITMH [5] + ASE1588 [6] + TSH [4] + Internal Hdr [12] + UDH base [1] = 30 + IPv6 [62] + VLAN [4] = 96 */ - /* PTCH [2] + ITMH [5] + ASE1588 [6] + TSH [4] + Internal Hdr [12] + UDH base [1] = 30 + IPv6 [62] + VLAN [0] = 92 */ - itmh_offset = BKSYNC_DNXJR2_MODULE_HEADER_LEN + BKSYNC_DNX_PTCH_2_SIZE; - } - /* ITMH */ - /* App Specific Ext Present ASE 1588*/ - skb->data [itmh_offset] |= (0x1 << 3); - - /* PPH_TYPE - TSH + Internal Hdr */ - skb->data [itmh_offset] |= (0x3 << 1); /* TSH + PPH Only */ - - ftmh_ase_offset = itmh_offset + BKSYNC_DNXJR2_ITMH_HEADER_LEN; - /* ASE 1588 ext */ - memset(&skb->data[ftmh_ase_offset], 0x0, BKSYNC_DNXJR2_FTMH_APP_SPECIFIC_EXT_LEN); - - /* OTSH.encap_type = udp vs non-udp - 1bit (15:15) */ - /* encap type - 2 L2, 4 & 6 UDP */ - skb->data[ftmh_ase_offset + 4] |= (((encap_type == 2) ? 1 : 0) << 7); - - /* ASE1588 1588v2 command - one step or two step 3bit (14:12) */ - /* ASE1588 1588v2 command should be zero for CF update */ - - /* offset to start of 1588v2 frame - 8 bit (11:4) */ - skb->data [ftmh_ase_offset + 4] = skb->data [ftmh_ase_offset + 4] | ((ptp_hdr_offset) & 0xf0) >> 4; - skb->data [ftmh_ase_offset + 5] = ((ptp_hdr_offset) & 0xf) << 4; - - /* ASE1588 type = 1588v2 - 4 bit (0:3) */ - skb->data [ftmh_ase_offset + 5] = skb->data [ftmh_ase_offset + 5] | 0x01; - - tse_offset = ftmh_ase_offset + BKSYNC_DNXJR2_FTMH_APP_SPECIFIC_EXT_LEN; - memset(&skb->data[tse_offset], 0x0, BKSYNC_DNXJR2_TSH_HDR_SIZE); - - if(!pph_udh_present) { - /* Internal Header */ - skb->data [33] = skb->data [34] = skb->data [35] = skb->data [36] = 0x00; - skb->data [37] = skb->data [38] = skb->data [39] = skb->data [40] = 0x00; - skb->data [41] = skb->data [42] = skb->data [43] = skb->data [44] = 0x00; - - skb->data [44] = 0x42; - skb->data [43] = 0x07; - skb->data [42] = 0x10; - - /* UDH Base Hdr */ - skb->data [45] = 0; - } - return; -} - -static void -bksync_dnx_ase1588_tsh_hdr_update(bksync_dev_t *dev_info, struct sk_buff *skb, int hwts, int encap_type, int ptp_hdr_offset) -{ - int itmh_offset = 0, ftmh_ase_offset = 0, tse_offset = 0; - /* Module Hdr [16] + PTCH [2] + ITMH [5] + ASE1588 [6] + TSH [4] */ - - /* For JR3 for CF update 1588v2_Offset should also have system_header length of - * PTCH [2] + ITMH [5] + ASE1588 [6] + TSH [4] = 17. */ - if ((dev_info->init_data).application_v2) { - ptp_hdr_offset -= BKSYNC_DNXJR2_MODULE_HEADER_LEN; - } - else { - ptp_hdr_offset -= (BKSYNC_DNXJR2_MODULE_HEADER_LEN + BKSYNC_DNX_PTCH_2_SIZE + BKSYNC_DNXJR2_ITMH_HEADER_LEN); - } - - /* Inserting TSH and ASE before PPH and UDH - shifted PPH and UDH by 13 bytes in skb->data */ - if (ptp_hdr_offset >= 73) { /*PTCH1 + ITMH + ASE1588 + TSH + PPH + UDH + Upto start of PTP = 73*/ - uint8_t pph_start[BKSYNC_DNXJR2_PPH_HEADER_LEN]; - uint8_t udh_start; - itmh_offset = BKSYNC_DNXJR2_MODULE_HEADER_LEN + BKSYNC_DNX_PTCH_1_SIZE; - - memcpy(&pph_start[0], &skb->data[itmh_offset + BKSYNC_DNXJR2_ITMH_HEADER_LEN], BKSYNC_DNXJR2_PPH_HEADER_LEN); - udh_start = skb->data[BKSYNC_DNXJR2_ITMH_HEADER_LEN + BKSYNC_DNXJR2_PPH_HEADER_LEN]; - /* copying pph after ase + tsh 34 = module + ptch + itmh + ase + tsh */ - memcpy(&skb->data[34], pph_start, BKSYNC_DNXJR2_PPH_HEADER_LEN); - /* copying udh after pph 46 = module + ptch + itmh + ase + tsh + pph */ - skb->data[46] = udh_start; - } - else { - itmh_offset = BKSYNC_DNXJR2_MODULE_HEADER_LEN + BKSYNC_DNX_PTCH_2_SIZE; - } - /* ITMH */ - /* App Specific Ext Present */ - skb->data [itmh_offset] |= (1 << 3); - - /* PPH_TYPE - TSH */ - skb->data [itmh_offset] |= (0x2 << 1); - - ftmh_ase_offset = itmh_offset + BKSYNC_DNXJR2_ITMH_HEADER_LEN; - /* ASE 1588 ext */ - memset(&skb->data[ftmh_ase_offset], 0x0, BKSYNC_DNXJR2_FTMH_APP_SPECIFIC_EXT_LEN); - - /* OTSH.encap_type = udp vs non-udp - 1bit (15:15) */ - /* encap type - 2 L2, 4 & 6 UDP */ - skb->data[ftmh_ase_offset + 4] |= (((encap_type == 2) ? 1 : 0) << 7); - - /* ASE1588 1588v2 command - one step or two step 3bit (14:12) */ - switch (hwts) { - case HWTSTAMP_TX_ONESTEP_SYNC: - skb->data[ftmh_ase_offset + 4] |= ((0x1) << 4); - break; - default: - skb->data[ftmh_ase_offset + 4] |= ((0x2) << 4); - break; - } - - /* offset to start of 1588v2 frame - 8 bit (11:4) */ - skb->data [ftmh_ase_offset + 4] = skb->data [ftmh_ase_offset + 4] | ((ptp_hdr_offset) & 0xf0) >> 4; - skb->data [ftmh_ase_offset + 5] = ((ptp_hdr_offset) & 0xf) << 4; - - /* ASE1588 type = 1588v2 - 4 bit (0:3) */ - skb->data [ftmh_ase_offset + 5] = skb->data [ftmh_ase_offset + 5] | 0x01; - - tse_offset = ftmh_ase_offset + BKSYNC_DNXJR2_FTMH_APP_SPECIFIC_EXT_LEN; - /* TSH Timestamp: 0x0 */ - memset(&skb->data[tse_offset], 0x0, BKSYNC_DNXJR2_TSH_HDR_SIZE); - - return; -} - - - -static int bksync_ptp_hw_tstamp_tx_meta_get(int dev_no, - int hwts, int hdrlen, - struct sk_buff *skb, - uint64_t *tstamp, - u32 **md) -{ - uint16_t tpid = 0, ethertype; - int md_offset = 0; - int pkt_offset = 0; - int ptp_hdr_offset = 0; - int transport = network_transport; - s64 ptptime = 0; - s64 ptpcounter = 0; - int64_t corrField = 0; - int32_t negCurTS32; - int64_t negCurTS64; - bksync_dev_t *dev_info = &ptp_priv->dev_info[dev_no]; - - if (!dev_info->dev_init) { - return -1; - } - - if (dev_info->ptp_time.ptp_pair_lock == 1) { - /* use alternate pair when main dataset is being updated */ - ptptime = dev_info->ptp_time.ptptime_alt; - ptpcounter = dev_info->ptp_time.reftime_alt; - } else { - ptptime = dev_info->ptp_time.ptptime; - ptpcounter = dev_info->ptp_time.reftime; - } - - negCurTS32 = - (int32_t) ptpcounter; - negCurTS64 = - (int64_t)(ptpcounter); - - if (CMICX_DEV_TYPE || DEVICE_IS_DPP) { - pkt_offset = ptp_hdr_offset = hdrlen; - } - - /* Need to check VLAN tag if packet is tagged */ - tpid = BKSYNC_SKB_U16_GET(skb, (pkt_offset + 12)); - if (tpid == 0x8100) { - md_offset = 4; - ptp_hdr_offset += 4; - - if (DEVICE_IS_DNX && vnptp_l2hdr_vlan_prio != 0) { - ethertype = BKSYNC_SKB_U16_GET(skb, hdrlen + 12 + 4); - if (ethertype == 0x88F7 || ethertype == 0x0800 || ethertype == 0x86DD) { - if (skb->data[hdrlen + 14] == 0x00) { - skb->data[hdrlen + 14] |= (vnptp_l2hdr_vlan_prio << 5); - } - } - } - } - - /* One Step Meta Data */ - if (hwts == HWTSTAMP_TX_ONESTEP_SYNC) { - md_offset += 8; - switch (KNET_SKB_CB(skb)->dcb_type) { - case 26: - corrField = (((int64_t)negCurTS32) << 16); - if (negCurTS32 >= 0) { - md_offset += 8; - } - break; - default: - corrField = (((int64_t)negCurTS64) << 16); - break; - } - } - - - /* Parse for nw transport */ - if (transport == 0) { - transport = bksync_ptp_transport_get(skb->data + pkt_offset); - } - - switch(transport) - { - case 2: /* IEEE 802.3 */ - ptp_hdr_offset += 14; - if (KNET_SKB_CB(skb)->dcb_type == 32) { - if (md) *md = &sobmhrawpkts_dcb32[md_offset]; - } else if(KNET_SKB_CB(skb)->dcb_type == 26) { - if (md) *md = &sobmhrawpkts_dcb26[md_offset]; - } else if(KNET_SKB_CB(skb)->dcb_type == 35) { - if (md) *md = &sobmhrawpkts_dcb35[md_offset]; - } else if(KNET_SKB_CB(skb)->dcb_type == 36) { - if (md) *md = &sobmhrawpkts_dcb36[md_offset]; - } else if(KNET_SKB_CB(skb)->dcb_type == 38) { - if (md) *md = &sobmhrawpkts_dcb38[md_offset]; - } else if(KNET_SKB_CB(skb)->dcb_type == 37) { - if (md) *md = &sobmhrawpkts_dcb37[md_offset]; - } - break; - case 4: /* UDP IPv4 */ - ptp_hdr_offset += 42; - if (KNET_SKB_CB(skb)->dcb_type == 32) { - if (md) *md = &sobmhudpipv4_dcb32[md_offset]; - } else if(KNET_SKB_CB(skb)->dcb_type == 26) { - if (md) *md = &sobmhudpipv4_dcb26[md_offset]; - } else if(KNET_SKB_CB(skb)->dcb_type == 35) { - if (md) *md = &sobmhudpipv4_dcb35[md_offset]; - } else if(KNET_SKB_CB(skb)->dcb_type == 36) { - if (md) *md = &sobmhudpipv4_dcb36[md_offset]; - } else if(KNET_SKB_CB(skb)->dcb_type == 38) { - if (md) *md = &sobmhudpipv4_dcb38[md_offset]; - } else if(KNET_SKB_CB(skb)->dcb_type == 37) { - if (md) *md = &sobmhudpipv4_dcb37[md_offset]; - } - break; - case 6: /* UDP IPv6 */ - ptp_hdr_offset += 62; - if (KNET_SKB_CB(skb)->dcb_type == 32) { - if (md) *md = &sobmhudpipv6_dcb32[md_offset]; - } else if(KNET_SKB_CB(skb)->dcb_type == 26) { - if (md) *md = &sobmhudpipv6_dcb26[md_offset]; - } else if(KNET_SKB_CB(skb)->dcb_type == 35) { - if (md) *md = &sobmhudpipv6_dcb35[md_offset]; - } else if(KNET_SKB_CB(skb)->dcb_type == 36) { - if (md) *md = &sobmhudpipv6_dcb36[md_offset]; - } else if(KNET_SKB_CB(skb)->dcb_type == 38) { - if (md) *md = &sobmhudpipv6_dcb38[md_offset]; - } else if(KNET_SKB_CB(skb)->dcb_type == 37) { - if (md) *md = &sobmhudpipv6_dcb37[md_offset]; - } - break; - default: - ptp_hdr_offset += 42; - if (KNET_SKB_CB(skb)->dcb_type == 32) { - if (md) *md = &sobmhudpipv4_dcb32[md_offset]; - } else if(KNET_SKB_CB(skb)->dcb_type == 26) { - if (md) *md = &sobmhudpipv4_dcb26[md_offset]; - } else if(KNET_SKB_CB(skb)->dcb_type == 35) { - if (md) *md = &sobmhudpipv4_dcb35[md_offset]; - } else if(KNET_SKB_CB(skb)->dcb_type == 36) { - if (md) *md = &sobmhudpipv4_dcb36[md_offset]; - } else if(KNET_SKB_CB(skb)->dcb_type == 38) { - if (md) *md = &sobmhudpipv4_dcb38[md_offset]; - } else if(KNET_SKB_CB(skb)->dcb_type == 37) { - if (md) *md = &sobmhudpipv4_dcb37[md_offset]; - } - break; - } - - if (DEVICE_IS_DPP && (hdrlen > (BKSYNC_DNX_PTCH_2_SIZE))) { - DBG_TX_DUMP(("hw_tstamp_tx_meta_get(dev_no:%d): Before OTSH updates\n", dev_no)); - if (debug & DBG_LVL_TX_DUMP) dbg_dump_pkt(skb->data, skb->len); - - DBG_TX(("hw_tstamp_tx_meta_get(dev_no:%d): Before: ptch[0]: 0x%x ptch[1]: 0x%x itmh[0]: 0x%x " - "oam-ts[0]: 0x%x pkt[0]:0x%x\n", dev_no, skb->data[0], skb->data[1], skb->data[2], - skb->data[6], skb->data[12])); - - bksync_dpp_otsh_update(skb, hwts, transport, (ptp_hdr_offset - pkt_offset)); - - DBG_TX(("hw_tstamp_tx_meta_get(dev_no:%d): After : ptch[0]: 0x%x itmh[0]: 0x%x oam-ts[0]: 0x%x " - "pkt[0]:0x%x\n", dev_no, skb->data[0], skb->data[2], skb->data[6], skb->data[12])); - - DBG_TX_DUMP(("hw_tstamp_tx_meta_get(dev_no:%d): After OTSH updates\n", dev_no)); - if (debug & DBG_LVL_TX_DUMP) dbg_dump_pkt(skb->data, skb->len); - } else if (DEVICE_IS_DNX && (hdrlen > (BKSYNC_DNX_PTCH_2_SIZE))) { - - switch(transport) - { - case 6: /* UDP IPv6 */ - bksync_dnx_ase1588_tsh_hdr_update_ipv6(dev_info, skb, hwts, transport, ptp_hdr_offset); - break; - case 4: /* UDP IPv4 */ - case 2: /* IEEE 802.3 */ - default: - bksync_dnx_ase1588_tsh_hdr_update(dev_info, skb, hwts, transport, ptp_hdr_offset); - break; - } - } - - DBG_TX(("hw_tstamp_tx_meta_get(dev_no:%d): ptptime: 0x%llx ptpcounter: 0x%llx\n", dev_no, ptptime, ptpcounter)); - - DBG_TX(("hw_tstamp_tx_meta_get(dev_no:%d): ptpmessage type: 0x%x hwts: %d\n", dev_no, skb->data[ptp_hdr_offset] & 0x0f, hwts)); - - - if ((hwts == HWTSTAMP_TX_ONESTEP_SYNC) && - (BKSYNC_PTP_EVENT_MSG((skb->data[ptp_hdr_offset] & 0x0F)))) { - /* One Step Timestamp Field updation */ - int port; - int corr_offset = ptp_hdr_offset + 8; - int origin_ts_offset = ptp_hdr_offset + 34; - u32 tmp; - struct timespec64 ts = {0}; - int udp_csum_regen; - u32 udp_csum20; - u16 udp_csum; - - udp_csum = BKSYNC_SKB_U16_GET(skb, (ptp_hdr_offset - 2)); - - switch (transport) { - case 2: - udp_csum_regen = 0; - break; - case 6: - udp_csum_regen = 1; - break; - default: - udp_csum_regen = (udp_csum != 0x0); - break; - } - - /* Fill the correction field */ - bksync_hton64(&(skb->data[corr_offset]), (const u64 *)&corrField); - - /* Fill the Origin Timestamp Field */ - ts = ns_to_timespec64(ptptime); - - tmp = (ts.tv_sec >> 32); - skb->data[origin_ts_offset + 0] = ((tmp >> 8) & 0xFF); - skb->data[origin_ts_offset + 1] = ((tmp ) & 0xFF); - - tmp = (ts.tv_sec & 0xFFFFFFFFLL); - skb->data[origin_ts_offset + 2] = ((tmp >> 24) & 0xFF); - skb->data[origin_ts_offset + 3] = ((tmp >> 16) & 0xFF); - skb->data[origin_ts_offset + 4] = ((tmp >> 8) & 0xFF); - skb->data[origin_ts_offset + 5] = ((tmp ) & 0xFF); - - tmp = (ts.tv_nsec & 0xFFFFFFFFLL); - skb->data[origin_ts_offset + 6] = ((tmp >> 24) & 0xFF); - skb->data[origin_ts_offset + 7] = ((tmp >> 16) & 0xFF); - skb->data[origin_ts_offset + 8] = ((tmp >> 8) & 0xFF); - skb->data[origin_ts_offset + 9] = ((tmp ) & 0xFF); - - if (udp_csum_regen) { - udp_csum20 = (~udp_csum) & 0xFFFF; - - udp_csum20 += BKSYNC_SKB_U16_GET(skb, (corr_offset + 0)); - udp_csum20 += BKSYNC_SKB_U16_GET(skb, (corr_offset + 2)); - udp_csum20 += BKSYNC_SKB_U16_GET(skb, (corr_offset + 4)); - udp_csum20 += BKSYNC_SKB_U16_GET(skb, (corr_offset + 6)); - - udp_csum20 += BKSYNC_SKB_U16_GET(skb, (origin_ts_offset + 0)); - udp_csum20 += BKSYNC_SKB_U16_GET(skb, (origin_ts_offset + 2)); - udp_csum20 += BKSYNC_SKB_U16_GET(skb, (origin_ts_offset + 4)); - udp_csum20 += BKSYNC_SKB_U16_GET(skb, (origin_ts_offset + 6)); - udp_csum20 += BKSYNC_SKB_U16_GET(skb, (origin_ts_offset + 8)); - - /* Fold 20bit checksum into 16bit udp checksum */ - udp_csum20 = ((udp_csum20 & 0xFFFF) + (udp_csum20 >> 16)); - udp_csum = ((udp_csum20 & 0xFFFF) + (udp_csum20 >> 16)); - - /* invert again to get final checksum. */ - udp_csum = ~udp_csum; - if (udp_csum == 0) { - udp_csum = 0xFFFF; - } - - skb->data[ptp_hdr_offset - 2] = ((udp_csum >> 8) & 0xFF); - skb->data[ptp_hdr_offset - 1] = ((udp_csum ) & 0xFF); - } - - if ((skb->data[ptp_hdr_offset] & 0x0F) == IEEE1588_MSGTYPE_DELREQ) { - *tstamp = ptptime; - } - - port = KNET_SKB_CB(skb)->port; - DBG_TX(("hw_tstamp_tx_meta_get(dev_no:%d): ptp msg type %d packet tstamp : 0x%llx corrField: 0x%llx port:%d\n", - dev_no, (skb->data[ptp_hdr_offset] & 0x0F), ptptime, corrField, port)); - - if ((port > 0) && (port < dev_info->num_phys_ports)) { - port -= 1; - dev_info->port_stats[port].pkt_txonestep += 1; - } - } - - DBG_TX_DUMP(("hw_tstamp_tx_meta_get(dev_no:%d): PTP Packet\n", dev_no)); - if (debug & DBG_LVL_TX_DUMP) dbg_dump_pkt(skb->data, skb->len); - - return 0; -} - - -static int bksync_ptp_hw_tstamp_ptp_clock_index_get(int dev_no) -{ - int phc_index = -1; - bksync_dev_t *dev_info = &ptp_priv->dev_info[dev_no]; - - if (dev_info->ptp_clock) { - phc_index = ptp_clock_index(dev_info->ptp_clock); - } - - return phc_index; -} - - -/** -* bcm_ptp_time_keep - call timecounter_read every second to avoid timer overrun -* because a 32bit counter, will timeout in 4s -*/ -static void bksync_ptp_time_keep(struct work_struct *work) -{ - struct delayed_work *dwork = to_delayed_work(work); - struct bksync_ptp_priv *priv = - container_of(dwork, struct bksync_ptp_priv, time_keep); - struct timespec64 ts; - bksync_dev_t *dev_info; - int dev_no = 0; - - for (dev_no = 0; dev_no < priv->max_dev; dev_no++) { - dev_info = &priv->dev_info[dev_no]; - /* Call bcm_ptp_gettime function to keep the ref_time_64 and ref_counter_48 in sync */ - bksync_ptp_gettime(&(dev_info->ptp_info), &ts); - } - schedule_delayed_work(&priv->time_keep, __msecs_to_jiffies(phc_update_intv_msec)); -} - -static void bksync_ptp_time_keep_init(void) -{ - if (!ptp_priv->timekeep_status) { - INIT_DELAYED_WORK(&(ptp_priv->time_keep), bksync_ptp_time_keep); - schedule_delayed_work(&ptp_priv->time_keep, __msecs_to_jiffies(phc_update_intv_msec)); - - ptp_priv->timekeep_status = 1; - } - - return; -} - -static void bksync_ptp_time_keep_deinit(void) -{ - if (ptp_priv->timekeep_status) { - /* Cancel delayed work */ - cancel_delayed_work_sync(&(ptp_priv->time_keep)); - - ptp_priv->timekeep_status = 0; - } - - return; -} - -/* PTP_EXTTS logging */ -static void bksync_ptp_extts_logging(struct work_struct *work) -{ - struct delayed_work *dwork = to_delayed_work(work); - struct bksync_ptp_priv *priv = container_of(dwork, struct bksync_ptp_priv, extts_logging); - struct ptp_clock_event event; - int event_id = -1; - int head = -1, tail = -1; - int dev_no = 0; - bksync_dev_t *dev_info; - - for (dev_no = 0; dev_no < ptp_priv->max_dev; dev_no++) { - dev_info = &ptp_priv->dev_info[dev_no]; - - if (!dev_info->dev_init) { - continue; - } - - if (dev_info->extts_log == NULL) { - continue; - } - - if (dev_info->extts_log->overflow) { - DBG_VERB(("EXTTS queue overflow\n")); - } - - tail = (int)dev_info->extts_log->tail; - head = dev_info->extts_event.head; - - head = (head + 1) % BKSYNC_NUM_EVENT_TS; - while (tail != head) { - switch (dev_info->extts_log->event_ts[head].ts_event_id) { - /* Map FW event_id to EXTTS event_id */ - case TS_EVENT_GPIO_1: - event_id = 0; - break; - case TS_EVENT_GPIO_2: - event_id = 1; - break; - case TS_EVENT_GPIO_3: - event_id = 2; - break; - case TS_EVENT_GPIO_4: - event_id = 3; - break; - case TS_EVENT_GPIO_5: - event_id = 4; - break; - case TS_EVENT_GPIO_6: - event_id = 5; - break; - } - - if (event_id < 0 || dev_info->extts_event.enable[event_id] != 1) { - memset((void *)&(dev_info->extts_log->event_ts[head]), 0, sizeof(dev_info->extts_log->event_ts[head])); - - dev_info->extts_event.head = head; - dev_info->extts_log->head = head; - - head = (head + 1) % BKSYNC_NUM_EVENT_TS; - continue; - } - - event.type = PTP_CLOCK_EXTTS; - /* Determine the user event_id for the multi core devices */ - event.index = event_id + (dev_info->dev_no * BKSYNC_NUM_GPIO_EVENTS);; - event.timestamp = ((s64)dev_info->extts_log->event_ts[head].tstamp.sec * 1000000000) + dev_info->extts_log->event_ts[head].tstamp.nsec; - ptp_clock_event(dev_info->ptp_clock, &event); - - dev_info->extts_event.head = head; - dev_info->extts_log->head = head; - - head = (head + 1) % BKSYNC_NUM_EVENT_TS; - } - } - - schedule_delayed_work(&priv->extts_logging, __msecs_to_jiffies(100)); -} - -static void bksync_ptp_extts_logging_init(void) -{ - INIT_DELAYED_WORK(&(ptp_priv->extts_logging), bksync_ptp_extts_logging); - schedule_delayed_work(&ptp_priv->extts_logging, __msecs_to_jiffies(100)); -} - -static void bksync_ptp_extts_logging_deinit(void) -{ - cancel_delayed_work_sync(&(ptp_priv->extts_logging)); -} - -static int bksync_ptp_init(bksync_dev_t *dev_info, struct ptp_clock_info *ptp) -{ - int ret = -1; - u64 subcmd, subcmd_data; - - ret = bksync_cmd_go(dev_info, BKSYNC_INIT, NULL, NULL); - DBG_VERB(("bksync_ptp_init: BKSYNC_INIT; rv:%d\n", ret)); - if (ret < 0) goto err_exit; - ptp_sleep(1); - - if (!DEVICE_IS_DPP && !DEVICE_IS_DNX) { - return 0; - } - - subcmd = BKSYNC_SYSINFO_UC_PORT_NUM; - subcmd_data = (dev_info->init_data).uc_port_num; - ret = bksync_cmd_go(dev_info, BKSYNC_SYSINFO, &subcmd, &subcmd_data); - DBG_VERB(("bksync_ptp_init: subcmd: 0x%llx subcmd_data: 0x%llx; rv:%d\n", subcmd, subcmd_data, ret)); - if (ret < 0) goto err_exit; - - subcmd = BKSYNC_SYSINFO_UC_PORT_SYSPORT; - subcmd_data = (dev_info->init_data).uc_port_sysport; - ret = bksync_cmd_go(dev_info, BKSYNC_SYSINFO, &subcmd, &subcmd_data); - DBG_VERB(("bksync_ptp_init: subcmd: 0x%llx subcmd_data: 0x%llx; rv:%d\n", subcmd, subcmd_data, ret)); - if (ret < 0) goto err_exit; - - subcmd = BKSYNC_SYSINFO_HOST_CPU_PORT; - subcmd_data = (dev_info->init_data).host_cpu_port; - ret = bksync_cmd_go(dev_info, BKSYNC_SYSINFO, &subcmd, &subcmd_data); - DBG_VERB(("bksync_ptp_init: subcmd: 0x%llx subcmd_data: 0x%llx; rv:%d\n", subcmd, subcmd_data, ret)); - if (ret < 0) goto err_exit; - - subcmd = BKSYNC_SYSINFO_HOST_CPU_SYSPORT; - subcmd_data = (dev_info->init_data).host_cpu_sysport; - ret = bksync_cmd_go(dev_info, BKSYNC_SYSINFO, &subcmd, &subcmd_data); - DBG_VERB(("bksync_ptp_init: subcmd: 0x%llx subcmd_data: 0x%llx; rv:%d\n", subcmd, subcmd_data, ret)); - if (ret < 0) goto err_exit; - - subcmd = BKSYNC_SYSINFO_UDH_LEN; - subcmd_data = (dev_info->init_data).udh_len; - ret = bksync_cmd_go(dev_info, BKSYNC_SYSINFO, &subcmd, &subcmd_data); - DBG_VERB(("bksync_ptp_init: subcmd: 0x%llx subcmd_data: 0x%llx; rv:%d\n", subcmd, subcmd_data, ret)); - if (ret < 0) goto err_exit; - - -err_exit: - return ret; -} - -static int bksync_ptp_deinit(bksync_dev_t *dev_info) -{ - int ret = -1; - - ret = bksync_cmd_go(dev_info, BKSYNC_DEINIT, NULL, NULL); - DBG_VERB(("bksync_ptp_deinit: rv:%d\n", ret)); - - return ret; -} - -static int bksync_broadsync_cmd(bksync_dev_t *dev_info, int bs_id) -{ - int ret = -1; - u64 subcmd, subcmd_data; - - if (!dev_info->dev_init) { - return -1; - } - - subcmd = (bs_id == 0) ? BKSYNC_BROADSYNC_BS0_CONFIG : BKSYNC_BROADSYNC_BS1_CONFIG; - - subcmd_data = ((dev_info->bksync_bs_info[bs_id]).enable & 0x1); - subcmd_data |= (((dev_info->bksync_bs_info[bs_id]).mode & 0x1) << 8); - subcmd_data |= ((dev_info->bksync_bs_info[bs_id]).hb << 16); - subcmd_data |= (((u64)(dev_info->bksync_bs_info[bs_id]).bc) << 32); - - ret = bksync_cmd_go(dev_info, BKSYNC_BROADSYNC, &subcmd, &subcmd_data); - DBG_VERB(("bksync_broadsync_cmd: subcmd: 0x%llx subcmd_data: 0x%llx; rv:%d\n", subcmd, subcmd_data, ret)); - - return ret; -} - -static int bksync_broadsync_status_cmd(bksync_dev_t *dev_info, int bs_id, u64 *status) -{ - int ret = -1; - u64 subcmd; - - if (!dev_info->dev_init) { - return -1; - } - - subcmd = (bs_id == 0) ? BKSYNC_BROADSYNC_BS0_STATUS_GET : BKSYNC_BROADSYNC_BS1_STATUS_GET; - - ret = bksync_cmd_go(dev_info, BKSYNC_BROADSYNC, &subcmd, status); - DBG_VERB(("bksync_broadsync_status_cmd: subcmd: 0x%llx subcmd_data: 0x%llx; rv:%d\n", subcmd, *status, ret)); - - return ret; -} - -static int bksync_broadsync_phase_offset_cmd(bksync_dev_t *dev_info, int bs_id, bksync_time_spec_t offset) -{ - int ret = -1; - u64 data0, data1; - int64_t phase_offset = 0; - - if (!dev_info->dev_init) { - return -1; - } - - /* Only in input mode */ - if (dev_info->bksync_bs_info[bs_id].mode == 0) { - dev_info->bksync_bs_info[bs_id].offset = offset; - } else { - memset(&dev_info->bksync_bs_info[bs_id].offset, 0, sizeof(bksync_time_spec_t)); - } - - data0 = (bs_id == 0) ? BKSYNC_BROADSYNC_BS0_PHASE_OFFSET_SET : BKSYNC_BROADSYNC_BS1_PHASE_OFFSET_SET; - - phase_offset = dev_info->bksync_bs_info[bs_id].offset.sec * 1000000000 + dev_info->bksync_bs_info[bs_id].offset.nsec; - phase_offset *= (dev_info->bksync_bs_info[bs_id].offset.sign) ? -1 : 1; - - data1 = (uint64_t)phase_offset; - - ret = bksync_cmd_go(dev_info, BKSYNC_BROADSYNC, &data0, &data1); - DBG_VERB(("bksync_broadsync_phase_offset_cmd: subcmd: 0x%llx subcmd_data: 0x%llx; rv:%d\n", data0, data1, ret)); - - return ret; -} - -static int bksync_gpio_cmd(bksync_dev_t *dev_info, int gpio_num) -{ - int ret = -1; - u64 subcmd, subcmd_data; - - if (!dev_info->dev_init) { - return -1; - } - - switch (gpio_num) { - case 0: - subcmd = BKSYNC_GPIO_0; - break; - case 1: - subcmd = BKSYNC_GPIO_1; - break; - case 2: - subcmd = BKSYNC_GPIO_2; - break; - case 3: - subcmd = BKSYNC_GPIO_3; - break; - case 4: - subcmd = BKSYNC_GPIO_4; - break; - case 5: - subcmd = BKSYNC_GPIO_5; - break; - default: - return ret; - } - - subcmd_data = ((dev_info->bksync_gpio_info[gpio_num]).enable & 0x1); - subcmd_data |= (((dev_info->bksync_gpio_info[gpio_num]).mode & 0x1) << 8); - subcmd_data |= ((u64)((dev_info->bksync_gpio_info[gpio_num]).period) << 16); - - ret = bksync_cmd_go(dev_info, BKSYNC_GPIO, &subcmd, &subcmd_data); - DBG_VERB(("bksync_gpio_cmd: subcmd: 0x%llx subcmd_data: 0x%llx; rv:%d\n", subcmd, subcmd_data, ret)); - - return ret; -} - -static int bksync_gpio_phaseoffset_cmd(bksync_dev_t *dev_info, int gpio_num) -{ - int ret = -1; - u64 subcmd, subcmd_data; - - if (!dev_info->dev_init) { - return -1; - } - - switch (gpio_num) { - case 0: - subcmd = BKSYNC_GPIO_0; - break; - case 1: - subcmd = BKSYNC_GPIO_1; - break; - case 2: - subcmd = BKSYNC_GPIO_2; - break; - case 3: - subcmd = BKSYNC_GPIO_3; - break; - case 4: - subcmd = BKSYNC_GPIO_4; - break; - case 5: - subcmd = BKSYNC_GPIO_5; - break; - default: - return ret; - } - - subcmd_data = (dev_info->bksync_gpio_info[gpio_num]).phaseoffset; - ret = bksync_cmd_go(dev_info, BKSYNC_GPIO_PHASEOFFSET, &subcmd, &subcmd_data); - DBG_VERB(("bksync_gpio_phaseoffset_cmd: subcmd: 0x%llx " - "subcmd_data: 0x%llx; rv:%d\n", subcmd, subcmd_data, ret)); - - return ret; -} - -#ifdef BDE_EDK_SUPPORT -static int bksync_ptp_tod_cmd(bksync_dev_t *dev_info, int sign, uint64_t offset_sec, uint32_t offset_nsec) -{ - int ret = -1; - u64 data0 = 0, data1 = 0; - - if (!dev_info->dev_init) { - return -1; - } - - data0 = ((uint64_t)(sign & 0x1)) << 47; - data0 |= (offset_sec & 0x7FFFFFFFFFFF); - - data1 = offset_nsec; - - ret = bksync_cmd_go(dev_info, BKSYNC_PTP_TOD, &data0, &data1); - DBG_VERB(("bksync_ptp_tod_cmd: data0: 0x%llx data1: 0x%llx; rv:%d\n", data0, data1, ret)); - - return ret; -} - -static int bksync_ptp_tod_get_cmd(bksync_dev_t *dev_info, fw_tstamp_t *tod_time) -{ - int ret = -1; - u64 data0 = 0, data1 = 0; - - if (!dev_info->dev_init) { - return -1; - } - - ret = bksync_cmd_go(dev_info, BKSYNC_PTP_TOD_GET, &data0, &data1); - - tod_time->sec = data0; - tod_time->nsec = data1; - DBG_VERB(("bksync_ptp_tod_get_cmd: data0: 0x%llx data1: 0x%llx; rv:%d\n", data0, data1, ret)); - - return ret; -} - -static int bksync_ntp_tod_cmd(bksync_dev_t *dev_info, uint8_t leap_sec_ctrl_en, uint8_t leap_sec_op, uint64_t epoch_offset) -{ - int ret = -1; - u64 data0,data1; - - if (!dev_info->dev_init) { - return -1; - } - - data0 = ((uint64_t)(leap_sec_ctrl_en & 0x1) << 1); - data0 |= (leap_sec_op & 0x1); - - data1 = epoch_offset; - - ret = bksync_cmd_go(dev_info, BKSYNC_NTP_TOD, &data0, &data1); - DBG_VERB(("bksync_ntp_tod_cmd: data0: 0x%llx data1: 0x%llx; rv:%d\n", data0, data1, ret)); - - return ret; -} - -static int bksync_ntp_tod_get_cmd(bksync_dev_t *dev_info, fw_tstamp_t *tod_time) -{ - int ret = -1; - u64 data0, data1; - - if (!dev_info->dev_init) { - return -1; - } - - ret = bksync_cmd_go(dev_info, BKSYNC_NTP_TOD_GET, &data0, &data1); - - tod_time->sec = data0; - tod_time->nsec = data1; - DBG_VERB(("bksync_ntp_tod_get_cmd: data0: 0x%llx data1: 0x%llx; rv:%d\n", data0, data1, ret)); - - return ret; -} -#endif - -#ifndef BDE_EDK_SUPPORT -static int bksync_evlog_cmd(int event, int enable) -{ - int ret = -1; - int addr_offset; - u64 subcmd = 0, subcmd_data = 0; - bksync_evlog_t tmp; - int dev_no = master_core; - bksync_dev_t *dev_info = &ptp_priv->dev_info[dev_no]; - - if (!dev_info->dev_init) { - return ret; - } - - subcmd = event; - addr_offset = ((u8 *)&(tmp.event_timestamps[event]) - (u8 *)&(tmp.event_timestamps[0])); - - if (enable) { - subcmd_data = (dev_info->dma_mem + addr_offset); - } else { - subcmd_data = 0; - } - - ret = bksync_cmd_go(dev_info, BKSYNC_EVLOG, &subcmd, &subcmd_data); - DBG_VERB(("bksync_evlog_cmd: subcmd: 0x%llx subcmd_data: 0x%llx rv:%d\n", subcmd, subcmd_data, ret)); - - return ret; -} -#endif - -/* - * Device Debug Statistics Proc Entry - */ -/** -* This function is called at the beginning of a sequence. -* ie, when: -* - the /proc/bcm/ksync/stats file is read (first time) -* - after the function stop (end of sequence) -* -*/ -static void *bksync_proc_seq_start(struct seq_file *s, loff_t *pos) -{ - int dev_no = (int)*pos; - bksync_dev_t *dev_info = NULL; - - if (dev_no < ptp_priv->max_dev) { - dev_info = &ptp_priv->dev_info[dev_no]; - } else { - /* End of sequence */ - return NULL; - } - - if (dev_info == NULL) { - /* Init not done */ - return NULL; - } - - /* beginning a new sequence */ - if (dev_info->dev_no == 0) { - seq_printf(s, "Port PTP statistics\n"); - } - - seq_printf(s, "dev_no : %d\n", dev_info->dev_no); - seq_printf(s, " TwoStep Port Bitmap : %08llx%08llx\n", - (uint64_t)(dev_info->two_step.portmap[1]), - (uint64_t)(dev_info->two_step.portmap[0])); - seq_printf(s," %4s| %9s| %9s| %9s| %9s| %9s| %9s| %9s| %9s| %9s| %9s\n", - "Port", "RxCounter", "TxCounter", "TxOneStep", "TSRead", "TSMatch", "TSDiscard", - "TimeHi" , "TimeLo", "TimeAvg", "FIFORx"); - - return (void *) dev_info; -} - -/** -* This function is called after the beginning of a sequence. -* It's called untill the return is NULL (this ends the sequence). -* -*/ -static void *bksync_proc_seq_next(struct seq_file *s, void *v, loff_t *pos) -{ - (*pos)++; - return bksync_proc_seq_start(s, pos); -} -/** -* This function is called at the end of a sequence -* -*/ -static void bksync_proc_seq_stop(struct seq_file *s, void *v) -{ - /* nothing to do, we use a static value in bksync_proc_seq_start() */ -} - -/** -* This function is called for each "step" of a sequence -* -*/ -static int bksync_proc_seq_show(struct seq_file *s, void *v) -{ - bksync_dev_t *dev_info = (bksync_dev_t *)v; - unsigned long port = 0; - - if (dev_info != NULL) { - for (port = 0; port < dev_info->num_phys_ports; port++) { - if (dev_info->port_stats[port].pkt_rxctr || dev_info->port_stats[port].pkt_txctr || - dev_info->port_stats[port].pkt_txonestep|| - dev_info->port_stats[port].tsts_discard || dev_info->port_stats[port].tsts_timeout || - dev_info->port_stats[port].tsts_match) { - - seq_printf(s, " %4lu | %9d| %9d| %9d| %9d| %9d| %9d| %9lld| %9lld | %9d|%9d | %s\n", (port + 1), - dev_info->port_stats[port].pkt_rxctr, - dev_info->port_stats[port].pkt_txctr, - dev_info->port_stats[port].pkt_txonestep, - dev_info->port_stats[port].tsts_timeout, - dev_info->port_stats[port].tsts_match, - dev_info->port_stats[port].tsts_discard, - dev_info->port_stats[port].tsts_worst_fetch_time, - dev_info->port_stats[port].tsts_best_fetch_time, - dev_info->port_stats[port].tsts_avg_fetch_time, - dev_info->port_stats[port].fifo_rxctr, - dev_info->port_stats[port].pkt_txctr != dev_info->port_stats[port].tsts_match ? "***":""); - } - } - } - return 0; -} - -/** -* seq_operations for bsync_proc_*** entries -* -*/ -static struct seq_operations bksync_proc_seq_ops = { - .start = bksync_proc_seq_start, - .next = bksync_proc_seq_next, - .stop = bksync_proc_seq_stop, - .show = bksync_proc_seq_show -}; - -static int bksync_proc_txts_open(struct inode * inode, struct file * file) -{ - return seq_open(file, &bksync_proc_seq_ops); -} - -static ssize_t -bksync_proc_txts_write(struct file *file, const char *buf, - size_t count, loff_t *loff) -{ - char debug_str[40]; - char *ptr; - int port; - int dev_no; - bksync_dev_t *dev_info; - - if (copy_from_user(debug_str, buf, count)) { - return -EFAULT; - } - - if ((ptr = strstr(debug_str, "clear")) != NULL) { - - for (dev_no = 0; dev_no < ptp_priv->max_dev; dev_no++) { - dev_info = &ptp_priv->dev_info[dev_no]; - - for (port = 0; port < dev_info->num_phys_ports; port++) { - dev_info->port_stats[port].pkt_rxctr = 0; - dev_info->port_stats[port].pkt_txctr = 0; - dev_info->port_stats[port].pkt_txonestep = 0; - dev_info->port_stats[port].tsts_timeout = 0; - dev_info->port_stats[port].tsts_match = 0; - dev_info->port_stats[port].tsts_discard = 0; - } - } - } else { - DBG_ERR(("Warning: unknown input\n")); - } - - return count; -} - -struct proc_ops bksync_proc_txts_file_ops = { - PROC_OWNER(THIS_MODULE) - .proc_open = bksync_proc_txts_open, - .proc_read = seq_read, - .proc_lseek = seq_lseek, - .proc_write = bksync_proc_txts_write, - .proc_release = seq_release, -}; - -/* - * Driver Debug Proc Entry - */ -static int -bksync_proc_debug_show(struct seq_file *m, void *v) -{ - seq_printf(m, "Configuration:\n"); - seq_printf(m, " debug: 0x%x\n", debug); - return 0; -} - -static ssize_t -bksync_proc_debug_write(struct file *file, const char *buf, - size_t count, loff_t *loff) -{ - char debug_str[40]; - char *ptr; - - if (copy_from_user(debug_str, buf, count)) { - return -EFAULT; - } - - if ((ptr = strstr(debug_str, "debug=")) != NULL) { - ptr += 6; - debug = simple_strtol(ptr, NULL, 0); - } else { - DBG_ERR(("Warning: unknown configuration\n")); - } - - return count; -} - -static int bksync_proc_debug_open(struct inode * inode, struct file * file) -{ - return single_open(file, bksync_proc_debug_show, NULL); -} - -struct proc_ops bksync_proc_debug_file_ops = { - PROC_OWNER(THIS_MODULE) - .proc_open = bksync_proc_debug_open, - .proc_read = seq_read, - .proc_lseek = seq_lseek, - .proc_write = bksync_proc_debug_write, - .proc_release = single_release, -}; - -/* - * Device information Proc Entry - */ -/** -* This function is called at the beginning of a sequence. -* ie, when: -* - the /proc/bcm/ksync/dev_info file is read (first time) -* - after the function stop (end of sequence) -* -*/ -static void *bksync_proc_dev_info_seq_start(struct seq_file *s, loff_t *pos) -{ - int dev_no = (int)*pos; - bksync_dev_t *dev_info = NULL; - - if (dev_no < ptp_priv->max_dev) { - dev_info = &ptp_priv->dev_info[dev_no]; - } else { - /* End of sequence */ - return NULL; - } - - /* Beginning a new sequence */ - if (dev_info->dev_no == 0) { - seq_printf(s, "Device information:\n"); - } - - return (void *) dev_info; -} - -/** -* This function is called after the beginning of a sequence. -* It's called untill the return is NULL (this ends the sequence). -* -*/ -static void *bksync_proc_dev_info_seq_next(struct seq_file *s, void *v, loff_t *pos) -{ - (*pos)++; - return bksync_proc_dev_info_seq_start(s, pos); -} -/** -* This function is called at the end of a sequence -* -*/ -static void bksync_proc_dev_info_seq_stop(struct seq_file *s, void *v) -{ - /* nothing to do, we use a static value in bksync_proc_seq_start() */ - seq_printf(s, "\nShared PHC: %s\n", shared_phc ? "Yes" : "No"); - seq_printf(s, "Master Dev: %d\n", master_core); -} - -/** -* This function is called for each "step" of a sequence -* -*/ -static int bksync_proc_dev_info_seq_show(struct seq_file *s, void *v) -{ - bksync_dev_t *dev_info = (bksync_dev_t *)v; - - if (dev_info != NULL) { - seq_printf(s, " dev_no: %d\n", dev_info->dev_no); - seq_printf(s, " dev_id: 0x%x\n", dev_info->dev_id); - seq_printf(s, " dev_init: %d\n", dev_info->dev_init); - seq_printf(s, " dev_core: %d\n", dev_info->max_core); - seq_printf(s, " phc_index: /dev/ptp%d\n", bksync_ptp_hw_tstamp_ptp_clock_index_get(dev_info->dev_no)); - } - return 0; -} - -/** -* seq_operations for bsync_proc_*** entries -* -*/ -static struct seq_operations bksync_proc_dev_info_seq_ops = { - .start = bksync_proc_dev_info_seq_start, - .next = bksync_proc_dev_info_seq_next, - .stop = bksync_proc_dev_info_seq_stop, - .show = bksync_proc_dev_info_seq_show -}; - -static int bksync_proc_dev_info_open(struct inode * inode, struct file * file) -{ - return seq_open(file, &bksync_proc_dev_info_seq_ops); -} - -static ssize_t -bksync_proc_dev_info_write(struct file *file, const char *buf, - size_t count, loff_t *loff) -{ - return 0; -} - -struct proc_ops bksync_proc_dev_info_file_ops = { - PROC_OWNER(THIS_MODULE) - .proc_open = bksync_proc_dev_info_open, - .proc_read = seq_read, - .proc_lseek = seq_lseek, - .proc_write = bksync_proc_dev_info_write, - .proc_release = seq_release, -}; - -static int -bksync_proc_init(void) -{ - struct proc_dir_entry *entry; - - PROC_CREATE(entry, "stats", 0666, bksync_proc_root, &bksync_proc_txts_file_ops); - if (entry == NULL) { - return -1; - } - PROC_CREATE(entry, "debug", 0666, bksync_proc_root, &bksync_proc_debug_file_ops); - if (entry == NULL) { - return -1; - } - PROC_CREATE(entry, "dev_info", 0666, bksync_proc_root, &bksync_proc_dev_info_file_ops); - if (entry == NULL) { - return -1; - } - return 0; -} - -static int -bksync_proc_cleanup(void) -{ - remove_proc_entry("stats", bksync_proc_root); - remove_proc_entry("debug", bksync_proc_root); - remove_proc_entry("dev_info", bksync_proc_root); - remove_proc_entry("bcm/ksync", NULL); - return 0; -} - - -#define ATTRCMP(x) (0 == strcmp(attr->attr.name, #x)) - -static int rd_iter=0, wr_iter=0; -static ssize_t bs_attr_store(struct kobject *kobj, - struct kobj_attribute *attr, - const char *buf, - size_t bytes) -{ - ssize_t ret; - u32 enable, mode; - u32 bc, hb; - int bs_id = -1; - int dev_no = -1; - bksync_dev_t *dev_info = NULL; - bksync_time_spec_t offset = {0}; - - if (ATTRCMP(bs0)) { - bs_id = 0; - dev_no = 0; - } else if (ATTRCMP(bs1)) { - bs_id = 1; - dev_no = 0; - } else if (ATTRCMP(bs2)) { - bs_id = 0; - dev_no = 1; - } else if (ATTRCMP(bs3)) { - bs_id = 1; - dev_no = 1; - } else { - return -ENOENT; - } - - dev_info = &ptp_priv->dev_info[dev_no]; - - ret = sscanf(buf, "enable:%d mode:%d bc:%u hb:%u sign:%d offset:%llu.%u", &enable, &mode, &bc, &hb, &offset.sign, &offset.sec, &offset.nsec); - DBG_VERB(("rd:%d bs0: enable:%d mode:%d bc:%d hb:%d sign:%d offset:%llu.%u\n", rd_iter++, enable, mode, bc, hb, offset.sign, offset.sec, offset.nsec)); - - dev_info->bksync_bs_info[bs_id].enable = enable; - dev_info->bksync_bs_info[bs_id].mode = mode; - dev_info->bksync_bs_info[bs_id].bc = bc; - dev_info->bksync_bs_info[bs_id].hb = hb; - - (void)bksync_broadsync_cmd(dev_info, bs_id); - - (void)bksync_broadsync_phase_offset_cmd(dev_info, bs_id, offset); - - return (ret == -ENOENT) ? ret : bytes; -} - -static ssize_t bs_attr_show(struct kobject *kobj, - struct kobj_attribute *attr, - char *buf) -{ - ssize_t bytes; - u64 status = 0; - u32 variance = 0; - int bs_id = -1; - int dev_no = -1; - bksync_dev_t *dev_info = NULL; - - if (ATTRCMP(bs0)) { - bs_id = 0; - dev_no = 0; - } else if (ATTRCMP(bs1)) { - bs_id = 1; - dev_no = 0; - } else if (ATTRCMP(bs2)) { - bs_id = 0; - dev_no = 1; - } else if (ATTRCMP(bs3)) { - bs_id = 1; - dev_no = 1; - } else { - return -ENOENT; - } - - dev_info = &ptp_priv->dev_info[dev_no]; - - if(dev_info->bksync_bs_info[bs_id].enable) { - (void)bksync_broadsync_status_cmd(dev_info, bs_id, &status); - } - - variance = (status >> 32); - status = (status & 0xFFFFFFFF); - bytes = sprintf(buf, "enable:%d mode:%d bc:%u hb:%u sign:%d offset:%llu.%u status:%u(%u)\n", - dev_info->bksync_bs_info[bs_id].enable, - dev_info->bksync_bs_info[bs_id].mode, - dev_info->bksync_bs_info[bs_id].bc, - dev_info->bksync_bs_info[bs_id].hb, - dev_info->bksync_bs_info[bs_id].offset.sign, - dev_info->bksync_bs_info[bs_id].offset.sec, - dev_info->bksync_bs_info[bs_id].offset.nsec, - (u32)status, - variance); - DBG_VERB(("wr:%d bs1: enable:%d mode:%d bc:%u hb:%u sign:%d offset:%llu.%u status:%u(%u)\n", - wr_iter++, - dev_info->bksync_bs_info[bs_id].enable, - dev_info->bksync_bs_info[bs_id].mode, - dev_info->bksync_bs_info[bs_id].bc, - dev_info->bksync_bs_info[bs_id].hb, - dev_info->bksync_bs_info[bs_id].offset.sign, - dev_info->bksync_bs_info[bs_id].offset.sec, - dev_info->bksync_bs_info[bs_id].offset.nsec, - (u32)status, - variance)); - - return bytes; -} - -#define BS_ATTR(x) \ - static struct kobj_attribute x##_attribute = \ - __ATTR(x, 0664, bs_attr_show, bs_attr_store); - -BS_ATTR(bs0) -BS_ATTR(bs1) -BS_ATTR(bs2) -BS_ATTR(bs3) - -#define BS_ATTR_LIST(x) & x ## _attribute.attr -static struct attribute *bs_attrs[] = { - BS_ATTR_LIST(bs0), - BS_ATTR_LIST(bs1), - BS_ATTR_LIST(bs2), - BS_ATTR_LIST(bs3), - NULL, /* terminator */ -}; - -static struct attribute_group bs_attr_group = { - .name = "broadsync", - .attrs = bs_attrs, -}; - - -static int gpio_rd_iter=0, gpio_wr_iter=0; -static ssize_t gpio_attr_store(struct kobject *kobj, - struct kobj_attribute *attr, - const char *buf, - size_t bytes) -{ - ssize_t ret; - int gpio; - u32 enable, mode; - u32 period; - int64_t phaseoffset; - int dev_no = -1; - bksync_dev_t *dev_info = NULL; - - if (ATTRCMP(gpio0)) { - gpio = 0; - dev_no = 0; - } else if (ATTRCMP(gpio1)) { - gpio = 1; - dev_no = 0; - } else if (ATTRCMP(gpio2)) { - gpio = 2; - dev_no = 0; - } else if (ATTRCMP(gpio3)) { - gpio = 3; - dev_no = 0; - } else if (ATTRCMP(gpio4)) { - gpio = 4; - dev_no = 0; - } else if (ATTRCMP(gpio5)) { - gpio = 5; - dev_no = 0; - } else if (ATTRCMP(gpio6)) { - gpio = 0; - dev_no = 1; - } else if (ATTRCMP(gpio7)) { - gpio = 1; - dev_no = 1; - } else if (ATTRCMP(gpio8)) { - gpio = 2; - dev_no = 1; - } else if (ATTRCMP(gpio9)) { - gpio = 3; - dev_no = 1; - } else if (ATTRCMP(gpio10)) { - gpio = 4; - dev_no = 1; - } else if (ATTRCMP(gpio11)) { - gpio = 5; - dev_no = 1; - } else { - return -ENOENT; - } - - - ret = sscanf(buf, "enable:%d mode:%d period:%u phaseoffset:%lld", &enable, &mode, &period, &phaseoffset); - DBG_VERB(("rd:%d gpio%d: enable:%d mode:%d period:%d phaseoffset:%lld\n", gpio_rd_iter++, gpio, enable, mode, period, phaseoffset)); - - dev_info = &ptp_priv->dev_info[dev_no]; - dev_info->bksync_gpio_info[gpio].enable = enable; - dev_info->bksync_gpio_info[gpio].mode = mode; - dev_info->bksync_gpio_info[gpio].period = period; - - (void)bksync_gpio_cmd(dev_info, gpio); - - if (dev_info->bksync_gpio_info[gpio].phaseoffset != phaseoffset) { - dev_info->bksync_gpio_info[gpio].phaseoffset = phaseoffset; - (void)bksync_gpio_phaseoffset_cmd(dev_info, gpio); - } - - return (ret == -ENOENT) ? ret : bytes; -} - -static ssize_t gpio_attr_show(struct kobject *kobj, - struct kobj_attribute *attr, - char *buf) -{ - ssize_t bytes; - int gpio; - int dev_no; - bksync_dev_t *dev_info = NULL; - - if (ATTRCMP(gpio0)) { - gpio = 0; - dev_no = 0; - } else if (ATTRCMP(gpio1)) { - gpio = 1; - dev_no = 0; - } else if (ATTRCMP(gpio2)) { - gpio = 2; - dev_no = 0; - } else if (ATTRCMP(gpio3)) { - gpio = 3; - dev_no = 0; - } else if (ATTRCMP(gpio4)) { - gpio = 4; - dev_no = 0; - } else if (ATTRCMP(gpio5)) { - gpio = 5; - dev_no = 0; - } else if (ATTRCMP(gpio6)) { - gpio = 0; - dev_no = 1; - } else if (ATTRCMP(gpio7)) { - gpio = 1; - dev_no = 1; - } else if (ATTRCMP(gpio8)) { - gpio = 2; - dev_no = 1; - } else if (ATTRCMP(gpio9)) { - gpio = 3; - dev_no = 1; - } else if (ATTRCMP(gpio10)) { - gpio = 4; - dev_no = 1; - } else if (ATTRCMP(gpio11)) { - gpio = 5; - dev_no = 1; - } else { - return -ENOENT; - } - - dev_info = &ptp_priv->dev_info[dev_no]; - bytes = sprintf(buf, "enable:%d mode:%d period:%u phaseoffset:%lld\n", - dev_info->bksync_gpio_info[gpio].enable, - dev_info->bksync_gpio_info[gpio].mode, - dev_info->bksync_gpio_info[gpio].period, - dev_info->bksync_gpio_info[gpio].phaseoffset); - DBG_VERB(("wr:%d gpio%d: enable:%d mode:%d period:%u phaseoffset:%lld\n", - gpio_wr_iter++, gpio, - dev_info->bksync_gpio_info[gpio].enable, - dev_info->bksync_gpio_info[gpio].mode, - dev_info->bksync_gpio_info[gpio].period, - dev_info->bksync_gpio_info[gpio].phaseoffset)); - - return bytes; -} - -#define GPIO_ATTR(x) \ - static struct kobj_attribute x##_attribute = \ - __ATTR(x, 0664, gpio_attr_show, gpio_attr_store); - -GPIO_ATTR(gpio0) -GPIO_ATTR(gpio1) -GPIO_ATTR(gpio2) -GPIO_ATTR(gpio3) -GPIO_ATTR(gpio4) -GPIO_ATTR(gpio5) -GPIO_ATTR(gpio6) -GPIO_ATTR(gpio7) -GPIO_ATTR(gpio8) -GPIO_ATTR(gpio9) -GPIO_ATTR(gpio10) -GPIO_ATTR(gpio11) - -#define GPIO_ATTR_LIST(x) & x ## _attribute.attr -static struct attribute *gpio_attrs[] = { - GPIO_ATTR_LIST(gpio0), - GPIO_ATTR_LIST(gpio1), - GPIO_ATTR_LIST(gpio2), - GPIO_ATTR_LIST(gpio3), - GPIO_ATTR_LIST(gpio4), - GPIO_ATTR_LIST(gpio5), - GPIO_ATTR_LIST(gpio6), - GPIO_ATTR_LIST(gpio7), - GPIO_ATTR_LIST(gpio8), - GPIO_ATTR_LIST(gpio9), - GPIO_ATTR_LIST(gpio10), - GPIO_ATTR_LIST(gpio11), - NULL, /* terminator */ -}; - -static struct attribute_group gpio_attr_group = { - .name = "gpio", - .attrs = gpio_attrs, -}; - -#ifdef BDE_EDK_SUPPORT -static ssize_t ptp_tod_attr_store(struct kobject *kobj, - struct kobj_attribute *attr, - const char *buf, - size_t bytes) -{ - ssize_t ret; - int dev_no = -1; - bksync_dev_t *dev_info = NULL; - uint64_t offset_sec = 0; - uint32_t offset_nsec = 0; - int sign = 0; - - ret = sscanf(buf, "sign:%d offset_sec:%llu offset_ns:%u", &sign, &offset_sec, &offset_nsec); - - offset_sec = (offset_sec & 0x7FFFFFFFFFFF); - offset_nsec = (offset_nsec & 0x3FFFFFFF); - - dev_no = master_core; /* All ToD control should be sent to master_core in case of multidie device */ - dev_info = &ptp_priv->dev_info[dev_no]; - - if (!dev_info->dev_init) { - return -ENOENT; - } - - dev_info->ptp_tod.offset.sign = sign; - dev_info->ptp_tod.offset.sec = offset_sec; - dev_info->ptp_tod.offset.nsec = offset_nsec; - - (void)bksync_ptp_tod_cmd(dev_info, sign, offset_sec, offset_nsec); - - DBG_VERB(("sign:%d offset_sec:%llu offset_nsec:%u\n", sign, offset_sec, offset_nsec)); - - return (ret == -ENOENT) ? ret : bytes; -} - -static ssize_t ptp_tod_attr_show(struct kobject *kobj, - struct kobj_attribute *attr, - char *buf) -{ - ssize_t bytes; - int dev_no = -1; - bksync_dev_t *dev_info = NULL; - fw_tstamp_t ptp_tod_time; - - dev_no = master_core; /* All ToD control should be sent to master_core in case of multidie device */ - dev_info = &ptp_priv->dev_info[dev_no]; - - if (!dev_info->dev_init) { - return -ENOENT; - } - - (void)bksync_ptp_tod_get_cmd(dev_info, &ptp_tod_time); - - bytes = sprintf(buf, "sign:%d offset_sec:%llu offset_nsec:%u ptp_tod:%llusec:%unsec\n", - dev_info->ptp_tod.offset.sign, - dev_info->ptp_tod.offset.sec, - dev_info->ptp_tod.offset.nsec, - ptp_tod_time.sec, ptp_tod_time.nsec); - - DBG_VERB(("sign:%d offset_sec:%llu offset_nsec:%u ptp_tod:%llusec:%unsec\n", - dev_info->ptp_tod.offset.sign, - dev_info->ptp_tod.offset.sec, - dev_info->ptp_tod.offset.nsec, - ptp_tod_time.sec, ptp_tod_time.nsec)); - - return bytes; -} - -static struct kobj_attribute ptp_tod_attr = - __ATTR(ptp_tod, 0664, ptp_tod_attr_show, ptp_tod_attr_store); - -static ssize_t ntp_tod_attr_store(struct kobject *kobj, - struct kobj_attribute *attr, - const char *buf, - size_t bytes) -{ - ssize_t ret; - int dev_no = -1; - bksync_dev_t *dev_info = NULL; - uint64_t epoch_offset = 0; - uint32_t leap_sec_ctrl_en = 0; - uint32_t leap_sec_op = 0; - - ret = sscanf(buf, "leap_sec_ctrl_en:%u leap_sec_op:%u epoch_offset:%llu", &leap_sec_ctrl_en, &leap_sec_op, &epoch_offset); - - dev_no = master_core; /* All ToD control should be sent to master_core in case of multidie device */ - dev_info = &ptp_priv->dev_info[dev_no]; - - if (!dev_info->dev_init) { - return -ENOENT; - } - - dev_info->ntp_tod.leap_sec_ctrl_en = (uint8_t)leap_sec_ctrl_en; - dev_info->ntp_tod.leap_sec_op = (uint8_t)leap_sec_op; - - if (!leap_sec_ctrl_en) { - /* Either leap sec operation or offset can be set */ - dev_info->ntp_tod.epoch_offset = epoch_offset; - } - - (void)bksync_ntp_tod_cmd(dev_info, (uint8_t)leap_sec_ctrl_en, (uint8_t)leap_sec_op, epoch_offset); - DBG_VERB(("leap_sec_ctrl_en:%u leap_sec_op:%u epoch_offset:%llu\n", leap_sec_ctrl_en, leap_sec_op, epoch_offset)); - - return (ret == -ENOENT) ? ret : bytes; -} - -static ssize_t ntp_tod_attr_show(struct kobject *kobj, - struct kobj_attribute *attr, - char *buf) -{ - ssize_t bytes; - int dev_no = 0; - bksync_dev_t *dev_info = NULL; - fw_tstamp_t ntp_tod_time; - - dev_no = master_core; /* All ToD control should be sent to master_core in case of multidie device */ - dev_info = &ptp_priv->dev_info[dev_no]; - - if (!dev_info->dev_init) { - return -ENOENT; - } - - (void)bksync_ntp_tod_get_cmd(dev_info, &ntp_tod_time); - - bytes = sprintf(buf, "leap_sec_ctrl_en:%u leap_sec_op:%u epoch_offset:%llu ntp_tod:%llusec:%unsec\n", - (uint32_t)dev_info->ntp_tod.leap_sec_ctrl_en, - (uint32_t)dev_info->ntp_tod.leap_sec_op, - dev_info->ntp_tod.epoch_offset, - ntp_tod_time.sec, ntp_tod_time.nsec); - - DBG_VERB(("leap_sec_ctrl_en:%u leap_sec_op:%u epoch_offset:%llu ntp_tod:%llusec:%unsec\n", - (uint32_t)dev_info->ntp_tod.leap_sec_ctrl_en, - (uint32_t)dev_info->ntp_tod.leap_sec_op, - dev_info->ntp_tod.epoch_offset, - ntp_tod_time.sec, ntp_tod_time.nsec)); - - return bytes; -} - -static struct kobj_attribute ntp_tod_attr = - __ATTR(ntp_tod, 0664, ntp_tod_attr_show, ntp_tod_attr_store); -#endif - -#ifndef BDE_EDK_SUPPORT -/* Event logging is replaced with EXTTS logging */ -static ssize_t evlog_attr_store(struct kobject *kobj, - struct kobj_attribute *attr, - const char *buf, - size_t bytes) -{ - ssize_t ret; - int event, enable; - - if (ATTRCMP(cpu)) { - event = 0; - } else if (ATTRCMP(bs0)) { - event = 1; - } else if (ATTRCMP(bs1)) { - event = 2; - } else if (ATTRCMP(gpio0)) { - event = 3; - } else if (ATTRCMP(gpio1)) { - event = 4; - } else if (ATTRCMP(gpio2)) { - event = 5; - } else if (ATTRCMP(gpio3)) { - event = 6; - } else if (ATTRCMP(gpio4)) { - event = 7; - } else if (ATTRCMP(gpio5)) { - event = 8; - } else { - return -ENOENT; - } - - - ret = sscanf(buf, "enable:%d", &enable); - DBG_VERB(("event:%d: enable:%d\n", event, enable)); - - (void)bksync_evlog_cmd(event, enable); - ptp_priv->dev_info[0].evlog_info[event].enable = enable; - - return (ret == -ENOENT) ? ret : bytes; -} - -static ssize_t evlog_attr_show(struct kobject *kobj, - struct kobj_attribute *attr, - char *buf) -{ - ssize_t bytes; - int event; - int dev_no = master_core; - bksync_dev_t *dev_info = &ptp_priv->dev_info[dev_no]; - - if ((!dev_info->dev_init) || (dev_info->evlog == NULL)) { - return -ENOENT; - } - - if (ATTRCMP(cpu)) { - event = 0; - } else if (ATTRCMP(bs0)) { - event = 1; - } else if (ATTRCMP(bs1)) { - event = 2; - } else if (ATTRCMP(gpio0)) { - event = 3; - } else if (ATTRCMP(gpio1)) { - event = 4; - } else if (ATTRCMP(gpio2)) { - event = 5; - } else if (ATTRCMP(gpio3)) { - event = 6; - } else if (ATTRCMP(gpio4)) { - event = 7; - } else if (ATTRCMP(gpio5)) { - event = 8; - } else { - return -ENOENT; - } - - bytes = sprintf(buf, "enable:%d Previous Time:%llu.%09u Latest Time:%llu.%09u\n", - dev_info->evlog_info[event].enable, - dev_info->evlog->event_timestamps[event].prv_tstamp.sec, - dev_info->evlog->event_timestamps[event].prv_tstamp.nsec, - dev_info->evlog->event_timestamps[event].cur_tstamp.sec, - dev_info->evlog->event_timestamps[event].cur_tstamp.nsec); - DBG_VERB(("event%d: enable:%d Previous Time:%llu.%09u Latest Time:%llu.%09u\n", - event, - dev_info->evlog_info[event].enable, - dev_info->evlog->event_timestamps[event].prv_tstamp.sec, - dev_info->evlog->event_timestamps[event].prv_tstamp.nsec, - dev_info->evlog->event_timestamps[event].cur_tstamp.sec, - dev_info->evlog->event_timestamps[event].cur_tstamp.nsec)); - - memset((void *)&(dev_info->evlog->event_timestamps[event]), 0, sizeof(dev_info->evlog->event_timestamps[event])); - - return bytes; -} - -#define EVLOG_ATTR(x) \ - static struct kobj_attribute evlog_ ## x ##_attribute = \ - __ATTR(x, 0664, evlog_attr_show, evlog_attr_store); - -EVLOG_ATTR(bs0) -EVLOG_ATTR(bs1) -EVLOG_ATTR(gpio0) -EVLOG_ATTR(gpio1) -EVLOG_ATTR(gpio2) -EVLOG_ATTR(gpio3) -EVLOG_ATTR(gpio4) -EVLOG_ATTR(gpio5) - -#define EVLOG_ATTR_LIST(x) & evlog_ ## x ## _attribute.attr -static struct attribute *evlog_attrs[] = { - EVLOG_ATTR_LIST(bs0), - EVLOG_ATTR_LIST(bs1), - EVLOG_ATTR_LIST(gpio0), - EVLOG_ATTR_LIST(gpio1), - EVLOG_ATTR_LIST(gpio2), - EVLOG_ATTR_LIST(gpio3), - EVLOG_ATTR_LIST(gpio4), - EVLOG_ATTR_LIST(gpio5), - NULL, /* terminator */ -}; - -static struct attribute_group evlog_attr_group = { - .name = "evlog", - .attrs = evlog_attrs, -}; -#endif - -static int -bksync_sysfs_init(void) -{ - int ret = 0; - struct kobject *parent; - struct kobject *root = &((((struct module *)(THIS_MODULE))->mkobj).kobj); - - parent = root; - ptp_priv->kobj = kobject_create_and_add("io", parent); - - ret = sysfs_create_group(ptp_priv->kobj, &bs_attr_group); - - ret |= sysfs_create_group(ptp_priv->kobj, &gpio_attr_group); - -#ifdef BDE_EDK_SUPPORT - ret |= sysfs_create_file(ptp_priv->kobj, &ptp_tod_attr.attr); - - ret |= sysfs_create_file(ptp_priv->kobj, &ntp_tod_attr.attr); -#endif - -#ifndef BDE_EDK_SUPPORT - ret |= sysfs_create_group(ptp_priv->kobj, &evlog_attr_group); -#endif - - return ret; -} - -static int -bksync_sysfs_cleanup(void) -{ - int ret = 0; - struct kobject *parent; - - parent = ptp_priv->kobj; - - sysfs_remove_group(parent, &bs_attr_group); - sysfs_remove_group(parent, &gpio_attr_group); - -#ifdef BDE_EDK_SUPPORT - sysfs_remove_file(parent, &ptp_tod_attr.attr); - sysfs_remove_file(parent, &ntp_tod_attr.attr); -#endif - -#ifndef BDE_EDK_SUPPORT - sysfs_remove_group(parent, &evlog_attr_group); -#endif - - kobject_put(ptp_priv->kobj); - - return ret; -} - -static void bksync_ptp_fw_data_alloc(int dev_no) -{ - bksync_dev_t *dev_info = &ptp_priv->dev_info[dev_no]; -#ifndef BDE_EDK_SUPPORT - dma_addr_t dma_mem = 0; -#endif - - /* Initialize the Base address for CMIC and shared Memory access */ - dev_info->base_addr = lkbde_get_dev_virt(dev_no); - dev_info->dma_dev = lkbde_get_dma_dev(dev_no); - -#ifndef BDE_EDK_SUPPORT - dev_info->evlog_dma_mem_size = sizeof(bksync_evlog_t); /*sizeof(bksync_evlog_t);*/ - - if (dev_info->evlog == NULL) { - DBG_ERR(("Allocate memory for event log\n")); - dev_info->evlog = DMA_ALLOC_COHERENT(dev_info->dma_dev, - dev_info->evlog_dma_mem_size, - &dma_mem); - if (dev_info->evlog != NULL) { - dev_info->dma_mem = dma_mem; - } - } - - if (dev_info->evlog != NULL) { - /* Reset memory */ - memset((void *)dev_info->evlog, 0, dev_info->evlog_dma_mem_size); - - DBG_ERR(("Shared memory allocation (%d bytes) for event log successful at 0x%016lx.\n", - dev_info->evlog_dma_mem_size, (long unsigned int)dev_info->dma_mem)); - } - - /* Allocate dma for timestmap logging for extts */ - dma_mem = 0; - dev_info->extts_dma_mem_size = sizeof(bksync_fw_extts_log_t); - if (dev_info->extts_log == NULL) { - DBG_ERR(("Allocate memory for extts log\n")); - dev_info->extts_log = DMA_ALLOC_COHERENT(dev_info->dma_dev, - dev_info->extts_dma_mem_size, - &dma_mem); - if (dev_info->extts_log != NULL) { - dev_info->extts_dma_mem_addr = dma_mem; - } - } - - if (dev_info->extts_log != NULL) { - /* Reset memory */ - memset((void *)dev_info->extts_log, 0, dev_info->extts_dma_mem_size); - dev_info->extts_log->tail = 0; - dev_info->extts_event.head = -1; - dev_info->extts_log->head = -1; - - DBG_ERR(("Shared memory allocation (%d bytes) for extts log successful at 0x%016lx.\n", - dev_info->extts_dma_mem_size, (long unsigned int)dev_info->extts_dma_mem_addr)); - } -#endif - return; -} - -static void bksync_ptp_fw_data_free(void) -{ - int dev_no = 0; - bksync_dev_t *dev_info = NULL; - - for (dev_no = 0; dev_no < ptp_priv->max_dev; dev_no++) { - dev_info = &ptp_priv->dev_info[dev_no]; - - if (dev_info == NULL) { - continue; - } - -#ifdef BDE_EDK_SUPPORT - /* Do nothing */ -#else - if (dev_info->evlog != NULL) { - DMA_FREE_COHERENT(dev_info->dma_dev, dev_info->evlog_dma_mem_size, - (void *)dev_info->evlog, dev_info->dma_mem); - dev_info->evlog = NULL; - } - - if (dev_info->extts_log != NULL) { - DBG_ERR(("Free shared memory : extts log of %d bytes\n", dev_info->extts_dma_mem_size)); - DMA_FREE_COHERENT(dev_info->dma_dev, dev_info->extts_dma_mem_size, - (void *)dev_info->extts_log, dev_info->extts_dma_mem_addr); - dev_info->extts_log = NULL; - } -#endif - } - return; -} - -static void bksync_ptp_dma_init(bksync_dev_t *dev_info, int dcb_type) -{ - int endianess; - - dev_info->num_phys_ports = BKSYNC_MAX_NUM_PORTS; - - dev_info->port_stats = kzalloc((sizeof(bksync_port_stats_t) * (dev_info->num_phys_ports)), GFP_KERNEL); - if (dev_info->port_stats == NULL) { - DBG_ERR(("bksync_ptp_dma_init: port_stats memory allocation failed\n")); - } - -#ifdef __LITTLE_ENDIAN - endianess = 0; -#else - endianess = 1; -#endif - -#ifdef BDE_EDK_SUPPORT - /* Do nothing */ - (void)endianess; -#else - DEV_WRITE32(dev_info, CMIC_CMC_SCHAN_MESSAGE_14r(CMIC_CMC_BASE), ((pci_cos << 16) | endianess)); - - DEV_WRITE32(dev_info, CMIC_CMC_SCHAN_MESSAGE_15r(CMIC_CMC_BASE), 1); - DEV_WRITE32(dev_info, CMIC_CMC_SCHAN_MESSAGE_16r(CMIC_CMC_BASE), 1); -#endif - - bksync_ptp_fw_data_alloc(dev_info->dev_no); - - DBG_VERB(("%s %p dcb_type: %d\n", __FUNCTION__, dev_info->base_addr, dcb_type)); - - ptp_priv->mirror_encap_bmp = 0x0; - -#ifdef BDE_EDK_SUPPORT - /* Do Nothing */ -#else - hostcmd_regs[0] = CMIC_CMC_SCHAN_MESSAGE_21r(CMIC_CMC_BASE); - hostcmd_regs[1] = CMIC_CMC_SCHAN_MESSAGE_20r(CMIC_CMC_BASE); - hostcmd_regs[2] = CMIC_CMC_SCHAN_MESSAGE_19r(CMIC_CMC_BASE); - hostcmd_regs[3] = CMIC_CMC_SCHAN_MESSAGE_18r(CMIC_CMC_BASE); - hostcmd_regs[4] = CMIC_CMC_SCHAN_MESSAGE_17r(CMIC_CMC_BASE); -#endif - - return; -} - - -/** - * bksync_ioctl_cmd_handler - * @kmsg: kcom message - ptp clock ioctl command. - * Description: This function will handle ioctl commands - * from user mode. - */ -static int -bksync_ioctl_cmd_handler(kcom_msg_clock_cmd_t *kmsg, int len, int dcb_type, int dev_no) -{ - u32 fw_status; - bksync_dnx_jr2_header_info_t *header_data = NULL; - bksync_dev_t *dev_info = NULL; - bksync_time_spec_t bs_offset; - int tmp = 0; -#ifdef BDE_EDK_SUPPORT - uint64_t paddr = 0; - fw_tstamp_t tod_time; - int rv = 0; - sal_vaddr_t vaddr = 0; -#endif - int bs_id = -1; - int gpio; - u64 status = 0; - - dev_info = &ptp_priv->dev_info[dev_no]; - - kmsg->hdr.type = KCOM_MSG_TYPE_RSP; - - if (!dev_info->dev_init && kmsg->clock_info.cmd != KSYNC_M_HW_INIT) { - kmsg->hdr.status = KCOM_E_NOT_FOUND; - return sizeof(kcom_msg_hdr_t); - } - - if (!dev_info) { - kmsg->hdr.status = KCOM_E_NOT_FOUND; - DBG_ERR(("Device not found %d\n", dev_no)); - return sizeof(kcom_msg_hdr_t); - } - - switch(kmsg->clock_info.cmd) { - case KSYNC_M_HW_INIT: - pci_cos = kmsg->clock_info.data[0]; - fw_core = kmsg->clock_info.data[1]; - DBG_VERB(("Configuring pci_cosq:%d fw_core:%d\n", pci_cos, fw_core)); - if (fw_core >= 0 || fw_core <= dev_info->max_core) { - - /* Return success if the app is already initialized. */ - if (dev_info->dev_init) { - kmsg->hdr.status = KCOM_E_NONE; - return sizeof(kcom_msg_hdr_t); - } - -#ifdef BDE_EDK_SUPPORT - dev_info->fw_comm = NULL; - paddr = ((uint64_t)((uint32_t)kmsg->clock_info.data[7])) << 32; - paddr |= ((uint32_t)kmsg->clock_info.data[8]); - DBG_VERB((" HW_init: phy_addr:0x%llx \n", paddr)); - rv = lkbde_get_phys_to_virt(dev_no, (phys_addr_t)paddr, &vaddr); - if ((rv != 0) || (vaddr == 0)) { - DBG_ERR((" Address conversion failed. rv=%d\n", rv)); - kmsg->hdr.status = KCOM_E_RESOURCE; - return sizeof(kcom_msg_hdr_t); - } - dev_info->fw_comm = (bksync_fw_comm_t *)vaddr; - DBG_VERB((" HW_init: virt_addr:%p:0x%llx\n", dev_info->fw_comm, (uint64_t)vaddr)); -#endif - dev_info->dcb_type = dcb_type; - bksync_ptp_dma_init(dev_info, dcb_type); - -#ifdef BDE_EDK_SUPPORT - /* Data from FW, hence don't memset fw_comm after address converstion */ - fw_status = dev_info->fw_comm->cmd; -#else - DEV_READ32(dev_info, CMIC_CMC_SCHAN_MESSAGE_21r(CMIC_CMC_BASE), &fw_status); -#endif - /* Return error if the app is not ready yet. */ - if (fw_status != 0xBADC0DE1) { - kmsg->hdr.status = KCOM_E_RESOURCE; - return sizeof(kcom_msg_hdr_t); - } - - (dev_info->init_data).uc_port_num = kmsg->clock_info.data[2]; - (dev_info->init_data).uc_port_sysport = kmsg->clock_info.data[3]; - (dev_info->init_data).host_cpu_port = kmsg->clock_info.data[4]; - (dev_info->init_data).host_cpu_sysport = kmsg->clock_info.data[5]; - (dev_info->init_data).udh_len = kmsg->clock_info.data[6]; - (dev_info->init_data).application_v2 = kmsg->clock_info.data[9]; - - DBG_VERB(("fw_core:%d uc_port:%d uc_sysport:%d pci_port:%d pci_sysport:%d application_v2:%d\n", - kmsg->clock_info.data[1], kmsg->clock_info.data[2], kmsg->clock_info.data[3], - kmsg->clock_info.data[4], kmsg->clock_info.data[5], kmsg->clock_info.data[9])); - - DBG_VERB(("uc_port:%d uc_sysport:%d pci_port:%d pci_sysport:%d application_v2:%d\n", - (dev_info->init_data).uc_port_num, - (dev_info->init_data).uc_port_sysport, - (dev_info->init_data).host_cpu_port, - (dev_info->init_data).host_cpu_sysport, - (dev_info->init_data).application_v2)); - - if (bksync_ptp_init(dev_info, &(dev_info->ptp_info)) >= 0) { - dev_info->dev_init = 1; - } - } else { - DBG_ERR(("Invalid core number %d\n", fw_core)); - kmsg->hdr.status = KCOM_E_PARAM; - return sizeof(kcom_msg_hdr_t); - } - break; - case KSYNC_M_HW_DEINIT: - - /* If module is not init then don't call DEINIT */ - if (dev_info->dev_init) { -#ifndef BDE_EDK_SUPPORT - DEV_WRITE32(dev_info, CMIC_CMC_SCHAN_MESSAGE_15r(CMIC_CMC_BASE), 0); - DEV_WRITE32(dev_info, CMIC_CMC_SCHAN_MESSAGE_16r(CMIC_CMC_BASE), 0); -#endif - bksync_ptp_deinit(dev_info); - - dev_info->dev_init = 0; - } - break; - case KSYNC_M_HW_TS_DISABLE: - bksync_ptp_hw_tstamp_disable(0, kmsg->clock_info.data[0], 0); - break; - case KSYNC_M_MTP_TS_UPDATE_ENABLE: - bksync_ptp_mirror_encap_update(dev_info, NULL, kmsg->clock_info.data[0], TRUE); - break; - case KSYNC_M_MTP_TS_UPDATE_DISABLE: - bksync_ptp_mirror_encap_update(dev_info, NULL, kmsg->clock_info.data[0], FALSE); - break; - case KSYNC_M_VERSION: - break; - case KSYNC_M_DNX_JR2DEVS_SYS_CONFIG: - DBG_VERB(("bksync_ioctl_cmd_handler: KSYNC_M_DNX_JR2DEVS_SYS_CONFIG Rcvd.\n")); - - header_data = (bksync_dnx_jr2_header_info_t *)((char *)kmsg + sizeof(kcom_msg_clock_cmd_t)); - - (dev_info->jr2_header_data).ftmh_lb_key_ext_size = header_data->ftmh_lb_key_ext_size; - (dev_info->jr2_header_data).ftmh_stacking_ext_size = header_data->ftmh_stacking_ext_size; - (dev_info->jr2_header_data).pph_base_size = header_data->pph_base_size; - - for (tmp = 0; tmp < BKSYNC_DNXJER2_PPH_LIF_EXT_TYPE_MAX; tmp++) { - (dev_info->jr2_header_data).pph_lif_ext_size[tmp] = header_data->pph_lif_ext_size[tmp]; - } - - (dev_info->jr2_header_data).system_headers_mode = header_data->system_headers_mode; - (dev_info->jr2_header_data).udh_enable = header_data->udh_enable; - for (tmp = 0; tmp < BKSYNC_DNXJER2_UDH_DATA_TYPE_MAX; tmp++) { - (dev_info->jr2_header_data).udh_data_lenght_per_type[tmp] = header_data->udh_data_lenght_per_type[tmp]; - } - - (dev_info->jr2_header_data).cosq_port_cpu_channel = header_data->cosq_port_cpu_channel; - (dev_info->jr2_header_data).cosq_port_pp_port = header_data->cosq_port_pp_port; - - header_data = &(dev_info->jr2_header_data); - -#if 0 - DBG_VERB(("ftmh_lb_key_ext_size %u ftmh_stacking_ext_size %u pph_base_size %u\n", - header_data->ftmh_lb_key_ext_size, header_data->ftmh_stacking_ext_size, - header_data->pph_base_size)); - - for (tmp = 0; tmp < BKSYNC_DNXJER2_PPH_LIF_EXT_TYPE_MAX ; tmp++) { - DBG_VERB(("pph_lif_ext_size[%u] %u\n", - tmp, header_data->pph_lif_ext_size[tmp])); - } - - DBG_VERB(("system_headers_mode %u udh_enable %u\n", - header_data->system_headers_mode, header_data->udh_enable)); - - for (tmp = 0; tmp < BKSYNC_DNXJER2_UDH_DATA_TYPE_MAX; tmp++) { - DBG_VERB(("udh_data_lenght_per_type [%d] %u\n", - tmp, header_data->udh_data_lenght_per_type[tmp])); - } - - DBG_VERB(("cosq_port_cpu_channel :%u cosq_port_pp_port:%u\n", - header_data->cosq_port_cpu_channel, header_data->cosq_port_cpu_channel)); -#endif - break; - case KSYNC_M_BS_CONFIG_SET: - bs_id = kmsg->clock_info.data[0]; - - dev_info->bksync_bs_info[bs_id].enable = 1; - dev_info->bksync_bs_info[bs_id].mode = kmsg->clock_info.data[1]; - dev_info->bksync_bs_info[bs_id].bc = kmsg->clock_info.data[2]; - dev_info->bksync_bs_info[bs_id].hb = kmsg->clock_info.data[3]; - - (void)bksync_broadsync_cmd(dev_info, bs_id); - break; - - case KSYNC_M_BS_CONFIG_CLEAR: - bs_id = kmsg->clock_info.data[0]; - - dev_info->bksync_bs_info[bs_id].enable = 0; - - (void)bksync_broadsync_cmd(dev_info, bs_id); - break; - - case KSYNC_M_BS_STATUS: - bs_id = kmsg->clock_info.data[0]; - - kmsg->hdr.type = KCOM_MSG_TYPE_RSP; - (void)bksync_broadsync_status_cmd(dev_info, bs_id, &status); - - kmsg->clock_info.data[1] = (int)(status >> 32); /* Variance */ - kmsg->clock_info.data[2] = (int)(status & 0xFFFFFFFF); /* Status */ - break; - -#ifdef BDE_EDK_SUPPORT - case KSYNC_M_PTP_TOD_OFFSET_SET: - dev_info->ptp_tod.offset.sign = (int)kmsg->clock_info.data[0]; - dev_info->ptp_tod.offset.sec = (uint64_t)(((uint64_t)kmsg->clock_info.data[1]) << 32 | (uint32_t)kmsg->clock_info.data[2]); - dev_info->ptp_tod.offset.nsec = (uint32_t)kmsg->clock_info.data[3]; - - (void)bksync_ptp_tod_cmd(dev_info, dev_info->ptp_tod.offset.sign, dev_info->ptp_tod.offset.sec, - dev_info->ptp_tod.offset.nsec); - break; - - case KSYNC_M_NTP_TOD_OFFSET_SET: - dev_info->ntp_tod.epoch_offset = (uint64_t)(((uint64_t)kmsg->clock_info.data[0]) << 32 | (uint32_t)kmsg->clock_info.data[1]); - - (void)bksync_ntp_tod_cmd(dev_info, 0, 0 , dev_info->ntp_tod.epoch_offset); - break; - - case KSYNC_M_PTP_TOD_OFFSET_GET: - kmsg->hdr.type = KCOM_MSG_TYPE_RSP; - kmsg->clock_info.data[0] = dev_info->ptp_tod.offset.sign; - kmsg->clock_info.data[1] = (int32_t)(dev_info->ptp_tod.offset.sec >> 32); - kmsg->clock_info.data[2] = (int32_t)dev_info->ptp_tod.offset.sec; - kmsg->clock_info.data[3] = (int32_t)(dev_info->ptp_tod.offset.nsec); - break; - - case KSYNC_M_NTP_TOD_OFFSET_GET: - kmsg->hdr.type = KCOM_MSG_TYPE_RSP; - kmsg->clock_info.data[0] = (int32_t)(dev_info->ntp_tod.epoch_offset >> 32); - kmsg->clock_info.data[1] = (int32_t)dev_info->ntp_tod.epoch_offset; - break; - - case KSYNC_M_PTP_TOD_GET: - (void)bksync_ptp_tod_get_cmd(dev_info, &tod_time); - kmsg->hdr.type = KCOM_MSG_TYPE_RSP; - kmsg->clock_info.data[0] = (int32_t)(tod_time.sec >> 32); - kmsg->clock_info.data[1] = (int32_t)(tod_time.sec); - kmsg->clock_info.data[2] = (int32_t)(tod_time.nsec); - break; - - case KSYNC_M_NTP_TOD_GET: - (void)bksync_ntp_tod_get_cmd(dev_info, &tod_time); - kmsg->hdr.type = KCOM_MSG_TYPE_RSP; - kmsg->clock_info.data[0] = (int32_t)(tod_time.sec >> 32); - kmsg->clock_info.data[1] = (int32_t)(tod_time.sec); - kmsg->clock_info.data[2] = (int32_t)(tod_time.nsec); - break; - - case KSYNC_M_LEAP_SEC_SET: - dev_info->ntp_tod.leap_sec_ctrl_en = kmsg->clock_info.data[0]; - dev_info->ntp_tod.leap_sec_op = kmsg->clock_info.data[1]; - - (void)bksync_ntp_tod_cmd(dev_info, dev_info->ntp_tod.leap_sec_ctrl_en, - dev_info->ntp_tod.leap_sec_op, 0); - break; - - case KSYNC_M_LEAP_SEC_GET: - kmsg->hdr.type = KCOM_MSG_TYPE_RSP; - kmsg->clock_info.data[0] = dev_info->ntp_tod.leap_sec_ctrl_en; - kmsg->clock_info.data[1] = dev_info->ntp_tod.leap_sec_op; - break; - -#endif - - case KSYNC_M_GPIO_CONFIG_SET: - gpio = kmsg->clock_info.data[0]; - - dev_info->bksync_gpio_info[gpio].enable = (uint32_t)kmsg->clock_info.data[1]; - dev_info->bksync_gpio_info[gpio].mode = (uint32_t)kmsg->clock_info.data[2]; - dev_info->bksync_gpio_info[gpio].period = (uint32_t)kmsg->clock_info.data[3]; - - (void)bksync_gpio_cmd(dev_info, gpio); - - if (dev_info->bksync_gpio_info[gpio].phaseoffset != kmsg->clock_info.data[4]) { - dev_info->bksync_gpio_info[gpio].phaseoffset = (int64_t)kmsg->clock_info.data[4]; - (void)bksync_gpio_phaseoffset_cmd(dev_info, gpio); - } - break; - - case KSYNC_M_GPIO_CONFIG_GET: - dev_info = &ptp_priv->dev_info[dev_no]; - gpio = kmsg->clock_info.data[0]; - - kmsg->hdr.type = KCOM_MSG_TYPE_RSP; - kmsg->clock_info.data[1] = (int32_t)dev_info->bksync_gpio_info[gpio].mode; - kmsg->clock_info.data[2] = (int32_t)dev_info->bksync_gpio_info[gpio].period; - kmsg->clock_info.data[3] = (int32_t)dev_info->bksync_gpio_info[gpio].phaseoffset; - break; - - case KSYNC_M_BS_PHASE_OFFSET_SET: - bs_id = kmsg->clock_info.data[0]; - - bs_offset.sign = kmsg->clock_info.data[1]; - bs_offset.sec = (uint64_t)(((uint64_t)kmsg->clock_info.data[2] << 32) | - (uint32_t)kmsg->clock_info.data[3]); - bs_offset.nsec = (uint32_t)kmsg->clock_info.data[4]; - - (void)bksync_broadsync_phase_offset_cmd(dev_info, bs_id, bs_offset); - break; - - default: - kmsg->hdr.status = KCOM_E_NOT_FOUND; - return sizeof(kcom_msg_hdr_t); - } - - return sizeof(*kmsg); -} - -static int bksync_phc_create(int dev_no) -{ - bksync_dev_t *dev_info = &ptp_priv->dev_info[dev_no]; - int err = 0; - int no_ext_ts = 0; - - memset(dev_info, 0, sizeof(bksync_dev_t)); - - dev_info->port_stats = NULL; - - dev_info->dev_no = dev_no; - err = bkn_hw_device_get(dev_no, &dev_info->dev_id, NULL); - if (err) { - return -ENODEV; - } - - switch(dev_info->dev_id) { - case 0x8870: /* Q3D */ - case 0x8860: /* JR3 */ - case 0x8890: /* JRAI */ - case 0x8490: /* Q3A */ - dev_info->max_core = 6; - break; - default: - dev_info->max_core = 2; - break; - } - - switch(dev_info->dev_id) { - case 0x8870: /* Q3D */ - no_ext_ts = BKSYNC_NUM_GPIO_EVENTS * 2; - break; - default: - no_ext_ts = BKSYNC_NUM_GPIO_EVENTS; - break; - } - - /* Initialize the Base address for CMIC and shared Memory access */ - dev_info->base_addr = lkbde_get_dev_virt(dev_no); - dev_info->dma_dev = lkbde_get_dma_dev(dev_no); - - bksync_ptp_info.n_ext_ts = no_ext_ts; - - dev_info->ptp_info = bksync_ptp_info; - - mutex_init(&(dev_info->ptp_lock)); - - if ((shared_phc == 1) && (dev_no != master_core)) { - return 0; - } - - /* Register ptp clock driver with bksync_ptp_info */ - dev_info->ptp_clock = ptp_clock_register(&dev_info->ptp_info, NULL); - if (IS_ERR(dev_info->ptp_clock)) { - return -ENODEV; - } - - return 0; -} - - -/** - * bksync_ptp_register - * @priv: driver private structure - * Description: this function will register the ptp clock driver - * to kernel. It also does some house keeping work. - */ -static int bksync_ptp_register(void) -{ - int dev_no = 0, max_dev = 0; - int err = -ENODEV; - - /* Connect to the kernel bde */ - if ((linux_bde_create(NULL, &kernel_bde) < 0) || kernel_bde == NULL) { - return -ENODEV; - } - - max_dev = kernel_bde->num_devices(BDE_SWITCH_DEVICES); - - DBG_VERB(("Number of devices attached %d\n", max_dev)); - /* default transport is raw, ieee 802.3 */ - switch (network_transport) { - case 2: /* IEEE 802.3 */ - case 4: /* UDP IPv4 */ - case 6: /* UDP IPv6 */ - break; - default: - network_transport = 0; - } - - ptp_priv = kzalloc(sizeof(*ptp_priv), GFP_KERNEL); - if (!ptp_priv) { - err = -ENOMEM; - goto exit; - } - memset(ptp_priv, 0, sizeof(*ptp_priv)); - - ptp_priv->max_dev = max_dev; - - ptp_priv->dev_info = kzalloc((sizeof(bksync_dev_t) * max_dev), GFP_KERNEL); - if (!ptp_priv->dev_info) { - err = -ENOMEM; - goto exit; - } - - for (dev_no = 0; dev_no < max_dev; dev_no++) { - err = bksync_phc_create(dev_no); - if (err) { - goto exit; - } - } - - if (shared_phc == 1) { - for (dev_no = 0; dev_no < max_dev; dev_no++) { - if (dev_no == master_core) { - continue; - } - ptp_priv->dev_info[dev_no].ptp_clock = ptp_priv->dev_info[master_core].ptp_clock; - } - } - - - /* Register BCM-KNET HW Timestamp Callback Functions */ - bkn_hw_tstamp_enable_cb_register(bksync_ptp_hw_tstamp_enable); - bkn_hw_tstamp_disable_cb_register(bksync_ptp_hw_tstamp_disable); - bkn_hw_tstamp_tx_time_get_cb_register(bksync_ptp_hw_tstamp_tx_time_get); - bkn_hw_tstamp_tx_meta_get_cb_register(bksync_ptp_hw_tstamp_tx_meta_get); - bkn_hw_tstamp_rx_pre_process_cb_register(bksync_ptp_hw_tstamp_rx_pre_process); - bkn_hw_tstamp_rx_time_upscale_cb_register(bksync_ptp_hw_tstamp_rx_time_upscale); - bkn_hw_tstamp_ptp_clock_index_cb_register(bksync_ptp_hw_tstamp_ptp_clock_index_get); - bkn_hw_tstamp_ioctl_cmd_cb_register(bksync_ioctl_cmd_handler); - bkn_hw_tstamp_ptp_transport_get_cb_register(bksync_ptp_transport_get); - - /* Initialize proc files */ - bksync_proc_root = proc_mkdir("bcm/ksync", NULL); - - err = bksync_proc_init(); - if (err) { - err = -ENODEV; - DBG_ERR(("Failed to init proc files\n")); - goto exit; - } - - err = bksync_sysfs_init(); - if (err) { - err = -ENODEV; - DBG_ERR(("Failed to init sysfs files\n")); - goto exit; - } - - bksync_ptp_extts_logging_init(); -exit: - if (err < 0) { - bksync_ptp_remove(); - } - return err; -} - -static int bksync_ptp_remove(void) -{ - int dev_no; - bksync_dev_t *dev_info = NULL; - - if (!ptp_priv) - return 0; - - bksync_ptp_extts_logging_deinit(); - - bksync_ptp_time_keep_deinit(); - - bksync_proc_cleanup(); - bksync_sysfs_cleanup(); - - /* UnRegister BCM-KNET HW Timestamp Callback Functions */ - bkn_hw_tstamp_enable_cb_unregister(bksync_ptp_hw_tstamp_enable); - bkn_hw_tstamp_disable_cb_unregister(bksync_ptp_hw_tstamp_disable); - bkn_hw_tstamp_tx_time_get_cb_unregister(bksync_ptp_hw_tstamp_tx_time_get); - bkn_hw_tstamp_tx_meta_get_cb_unregister(bksync_ptp_hw_tstamp_tx_meta_get); - bkn_hw_tstamp_rx_pre_process_cb_unregister(bksync_ptp_hw_tstamp_rx_pre_process); - bkn_hw_tstamp_rx_time_upscale_cb_unregister(bksync_ptp_hw_tstamp_rx_time_upscale); - bkn_hw_tstamp_ptp_clock_index_cb_unregister(bksync_ptp_hw_tstamp_ptp_clock_index_get); - bkn_hw_tstamp_ioctl_cmd_cb_unregister(bksync_ioctl_cmd_handler); - bkn_hw_tstamp_ptp_transport_get_cb_unregister(bksync_ptp_transport_get); - - for (dev_no = 0; dev_no < ptp_priv->max_dev; dev_no++) { - dev_info = &ptp_priv->dev_info[dev_no]; - - if (dev_info->dev_init) { -#ifndef BDE_EDK_SUPPORT - /* reset handshaking info */ - DEV_WRITE32(dev_info, CMIC_CMC_SCHAN_MESSAGE_15r(CMIC_CMC_BASE), 0); - DEV_WRITE32(dev_info, CMIC_CMC_SCHAN_MESSAGE_16r(CMIC_CMC_BASE), 0); -#endif - /* Deinitialize */ - bksync_ptp_deinit(dev_info); - - dev_info->dev_init = 0; - } - - mutex_destroy(&dev_info->ptp_lock); - - if (dev_info->ptp_clock) { - /* Unregister the bcm ptp clock driver */ - if (shared_phc == 1) { - if (dev_no == master_core) { - ptp_clock_unregister(dev_info->ptp_clock); - } - } else { - ptp_clock_unregister(dev_info->ptp_clock); - } - dev_info->ptp_clock = NULL; - } - } - - bksync_ptp_fw_data_free(); - - for (dev_no = 0; dev_no < ptp_priv->max_dev; dev_no++) { - dev_info = &ptp_priv->dev_info[dev_no]; - - if (dev_info->port_stats != NULL) { - kfree((void *)dev_info->port_stats); - dev_info->port_stats = NULL; - } - } - - /* Free Memory */ - if (ptp_priv->dev_info) { - kfree(ptp_priv->dev_info); - } - kfree(ptp_priv); - - return 0; -} -#endif - - -/* - * Generic module functions - */ - -/* - * Function: _pprint - * - * Purpose: - * Print proc filesystem information. - * Parameters: - * None - * Returns: - * Always 0 - */ - static int -_pprint(struct seq_file *m) -{ -#ifdef PTPCLOCK_SUPPORTED - /* put some goodies here */ - pprintf(m, "Broadcom BCM PTP Hardware Clock Module\n"); -#else - pprintf(m, "Broadcom BCM PTP Hardware Clock Module not supported\n"); -#endif - return 0; -} - -/* - * Function: _init - * - * Purpose: - * Module initialization. - * Attached SOC all devices and optionally initializes these. - * Parameters: - * None - * Returns: - * 0 on success, otherwise -1 - */ - static int -_init(void) -{ -#ifdef PTPCLOCK_SUPPORTED - bksync_ptp_register(); - return 0; -#else - return -1; -#endif -} - -/* - * Function: _cleanup - * - * Purpose: - * Module cleanup function - * Parameters: - * None - * Returns: - * Always 0 - */ - static int -_cleanup(void) -{ -#ifdef PTPCLOCK_SUPPORTED - bksync_ptp_remove(); - return 0; -#else - return -1; -#endif -} - -static gmodule_t _gmodule = { - .name = MODULE_NAME, - .major = MODULE_MAJOR, - .init = _init, - .cleanup = _cleanup, - .pprint = _pprint, - .ioctl = NULL, - .open = NULL, - .close = NULL, -}; - - gmodule_t* -gmodule_get(void) -{ - EXPORT_NO_SYMBOLS; - return &_gmodule; -} diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/README b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/README deleted file mode 100644 index 6a9371f00d5..00000000000 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/README +++ /dev/null @@ -1,114 +0,0 @@ -$Id:$ -$Copyright: 2007-2025 Broadcom Inc. All rights reserved. - -Permission is granted to use, copy, modify and/or distribute this -software under either one of the licenses below. - -License Option 1: GPL - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License, version 2, as -published by the Free Software Foundation (the "GPL"). - -This program is distributed in the hope that it will be useful, but -WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -General Public License version 2 (GPLv2) for more details. - -You should have received a copy of the GNU General Public License -version 2 (GPLv2) along with this source code. - - -License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license - -This software is governed by the Broadcom Open Network Switch APIs license: -https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ - - -DCB Library - -The DCB Library is a stand-alone library that allows access to -DCB fields easily without bringing all the complexity of the -SDK source tree. - - -DCB Initialization - -The following routine initializes a DCB handle. A unique DCB handle -needs to be initialized for a given device ID and revision ID. - -This initialization function needs to be called before accessing -any DCB field. - -Function: -#include - - int dcb_handle_init(dcb_handle_t *handle, uint16 dev_id, uint8 rev_id); - -Parameters: - handle - (IN/OUT) Pointer to DCB library handle - device_id - (IN) Device ID - rev_id - (IN) Revision ID - -Returns: - DCB_OK Success - DCB_ERROR Failure - - -DCB Field GET - -Set of macros that return the value from a DCB field. - -The correct DCB structure needs to be allocated and -initialized prior to calling any of the get/set macros. - -Macro: - DCB__GET(handle, dcb) - -Parameters: - handle - (IN) Pointer to the handle for a given device; - type is dcb_handle_t * - dcb - (IN) Pointer to the DCB structure to get the field value from; - type is dcb_t * -Returns: - Value of DCB field - - -DCB Field SET - -Set of macros to set the value for a DCB field. - -The correct DCB structure needs to be allocated and -initialized prior to calling any of the get/set macros. - -Macro: - DCB__SET(handle, dcb, value) - -Parameters: - handle - (IN) Pointer to the handle for a given device; - type is dcb_handle_t * - dcb - (IN/OUT) Pointer to the DCB structure to set the field value to; - type is dcb_t * - value - (IN) Value to set for the DCB field; - type varies - -Returns: - None - - -Compiling the DCB Library - -To compile the DCB library, the DCBDIR environment variable needs -to be set to point to the location where the DCB library resides -and run make. If DCBDIR is not set, the default value of DCBDIR is the parent -directory of this README file. - -The DCB library output will be generated in $DCBDIR/build/ by default. -The output directory can be specified by setting the BLDDIR environment -variable. - -Example: - cd - export DCBDIR=`pwd` - cd make - make diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/sal/types.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/sal/types.h deleted file mode 100644 index 28384afaa41..00000000000 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/sal/types.h +++ /dev/null @@ -1,87 +0,0 @@ -/* - * $Id: types.h,v 1.1 Broadcom SDK $ - * - * $Copyright: 2017-2025 Broadcom Inc. All rights reserved. - * - * Permission is granted to use, copy, modify and/or distribute this - * software under either one of the licenses below. - * - * License Option 1: GPL - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License, version 2, as - * published by the Free Software Foundation (the "GPL"). - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License version 2 (GPLv2) for more details. - * - * You should have received a copy of the GNU General Public License - * version 2 (GPLv2) along with this source code. - * - * - * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license - * - * This software is governed by the Broadcom Open Network Switch APIs license: - * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ - * - * - * - * File: types.h - * Purpose: SAL Definitions - */ - -#ifndef _SAL_TYPES_H_ -#define _SAL_TYPES_H_ - -#ifdef DCB_CUSTOM_CONFIG -/* Allow application to override sal_sprintf, sal_memset, sal_memcpy */ -#include -#else -#ifdef __KERNEL__ -#include -#else -/* Needed for sprintf, memset */ -#include -#include -#endif -#endif - - -/* Booleans */ -#ifndef TRUE -#define TRUE 1 -#endif - -#ifndef FALSE -#define FALSE 0 -#endif - -/* Data types */ -typedef unsigned char uint8; /* 8-bit quantity */ -typedef unsigned short uint16; /* 16-bit quantity */ -typedef unsigned int uint32; /* 32-bit quantity */ -typedef uint64_t uint64; /* 64-bit quantity */ - -typedef signed char int8; /* 8-bit quantity */ -typedef signed short int16; /* 16-bit quantity */ -typedef signed int int32; /* 32-bit quantity */ - -typedef uint32 sal_paddr_t; /* Physical address (PCI address) */ -typedef uintptr_t sal_vaddr_t; /* Virtual address (Host address) */ - -#define PTR_TO_INT(x) ((uint32)(((uint64)(x))&0xFFFFFFFF)) -#define PTR_HI_TO_INT(x) ((uint32)((((uint64)(x))>>32)&0xFFFFFFFF)) - -typedef uint8 sal_mac_addr_t[6]; /* MAC address */ - -/* Macros */ -#define COMPILER_REFERENCE(_a) ((void)(_a)) - -/* Functions */ -#define sal_memset memset -#define sal_sprintf sprintf -#define sal_memcpy memcpy - -#endif /* _SAL_TYPES_H_ */ diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/sdk_config.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/sdk_config.h deleted file mode 100644 index c74d115d5b5..00000000000 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/sdk_config.h +++ /dev/null @@ -1,32 +0,0 @@ -/* - * $Id:$ - * - * $Copyright: 2017-2025 Broadcom Inc. All rights reserved. - * - * Permission is granted to use, copy, modify and/or distribute this - * software under either one of the licenses below. - * - * License Option 1: GPL - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License, version 2, as - * published by the Free Software Foundation (the "GPL"). - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License version 2 (GPLv2) for more details. - * - * You should have received a copy of the GNU General Public License - * version 2 (GPLv2) along with this source code. - * - * - * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license - * - * This software is governed by the Broadcom Open Network Switch APIs license: - * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ - * - * - * - * Stub header file - */ diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/shared/rx.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/shared/rx.h deleted file mode 100644 index 13dbf615ea2..00000000000 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/shared/rx.h +++ /dev/null @@ -1,623 +0,0 @@ -/* - * $Id: rx.h,v 1.35 Broadcom SDK $ - * - * $Copyright: 2017-2025 Broadcom Inc. All rights reserved. - * - * Permission is granted to use, copy, modify and/or distribute this - * software under either one of the licenses below. - * - * License Option 1: GPL - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License, version 2, as - * published by the Free Software Foundation (the "GPL"). - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License version 2 (GPLv2) for more details. - * - * You should have received a copy of the GNU General Public License - * version 2 (GPLv2) along with this source code. - * - * - * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license - * - * This software is governed by the Broadcom Open Network Switch APIs license: - * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ - * - * - * - * File: rx.h - * Purpose: Packet Receive Reason Types shared between BCM and SOC layers - */ - -#ifndef _SHR_RX_H_ -#define _SHR_RX_H_ - -/* - * PKT RX Packet Reasons; reason CPU received the packet. - * Notes: It is possible no reasons are set (directed to CPU from ARL - * for example), or multiple reasons may be set. - */ - -typedef enum _shr_rx_reason_e { - _SHR_RX_INVALID = 0, - _SHR_RX_ARP = 1, /* ARP Packet */ - _SHR_RX_BPDU = 2, /* BPDU Packet */ - _SHR_RX_BROADCAST = 3, /* Broadcast packet */ - _SHR_RX_CLASS_BASED_MOVE = 4, /* Class-based move prevented */ - _SHR_RX_CLASS_TAG_PACKETS = 5, /* Higig Header with PPD=1 */ - _SHR_RX_CONTROL = 6, /* Control frame or reserved addr */ - _SHR_RX_CPU_LEARN = 7, /* CPU Learned (or VLAN not found */ - /* on Strata devices) */ - _SHR_RX_DEST_LOOKUP_FAIL = 8, /* Destination lookup fail (or L3 */ - /* station move on Strata devices) */ - _SHR_RX_DHCP = 9, /* DHCP packets */ - _SHR_RX_DOS_ATTACK = 10, /* DOS Attack Packet */ - _SHR_RX_E2E_HOL_IBP = 11, /* E2E HOL or IBP Packet */ - _SHR_RX_ENCAP_HIGIG_ERROR = 12, /* Non-HG packets received on an */ - /* E-HG port */ - _SHR_RX_FILTER_MATCH = 13, /* Filter Match */ - _SHR_RX_GRE_CHECKSUM = 14, /* GRE checksum */ - _SHR_RX_GRE_SOURCE_ROUTE = 15, /* GRE source routing */ - _SHR_RX_HIGIG_CONTROL = 16, /* Higig Packet with Control Opcode */ - _SHR_RX_HIGIG_HDR_ERROR = 17, /* Higig+ header errors */ - _SHR_RX_ICMP_REDIRECT = 18, /* ICMP Recirect */ - _SHR_RX_IGMP = 19, /* IGMP packet */ - _SHR_RX_INGRESS_FILTER = 20, /* Ingress Filter (VLAN membership) */ - _SHR_RX_IP = 21, /* IP packet */ - _SHR_RX_IPFIX_RATE_VIOLATION = 22, /* IPFIX flows exceed metering */ - _SHR_RX_IP_MCAST_MISS = 23, /* IPMC miss */ - _SHR_RX_IP_OPTION_VERSION = 24, /* IP options present or IP ver != 4 */ - _SHR_RX_IPMC = 25, /* Class D IP multicast packet */ - _SHR_RX_IPMC_RSVD = 26, /* IPMC Reserved Packet */ - _SHR_RX_L2_CPU = 27, /* L2_TABLE - copy to CPU (on 5690) */ - _SHR_RX_L2_DEST_MISS = 28, /* L2 destination lookup failure */ - _SHR_RX_L2_LEARN_LIMIT = 29, /* L2 Learn Limit */ - _SHR_RX_L2_MOVE = 30, /* L2 Station Movement */ - _SHR_RX_L2_MTU_FAIL = 31, /* L2 MTU check fail */ - _SHR_RX_L2_NON_UNICAST_MISS = 32, /* L2 Non-Unicast lookup miss */ - _SHR_RX_L2_SOURCE_MISS = 33, /* L2 source lookup failure */ - _SHR_RX_L3_ADDR_BIND_FAIL = 34, /* MAC to IP bind check failure */ - _SHR_RX_L3_DEST_MISS = 35, /* L3 DIP Miss */ - _SHR_RX_L3_HEADER_ERROR = 36, /* L3 header - IP options, */ - _SHR_RX_L3_MTU_FAIL = 37, /* L3 MTU check fail */ - _SHR_RX_L3_SLOW_PATH = 38, /* L3 slow path processed pkt. */ - _SHR_RX_L3_SOURCE_MISS = 39, /* L3 SIP Miss */ - _SHR_RX_L3_SOUCE_MOVE = 40, /* L3 Station Movement */ - _SHR_RX_MARTIAN_ADDR = 41, /* Pkt. with Martian address */ - _SHR_RX_MCAST_IDX_ERROR = 42, /* Multicast index error */ - _SHR_RX_MCAST_MISS = 43, /* MC miss */ - _SHR_RX_MIM_SERVICE_ERROR = 44, /* MiM terminated unicast packets */ - /* that do not have a valid I-SID */ - _SHR_RX_MPLS_CTRL_WORD_ERROR = 45, /* MPLS Control Word type is not 0 */ - _SHR_RX_MPLS_ERROR = 46, /* MPLS error */ - _SHR_RX_MPLS_INVALID_ACTION = 47, /* MPLS Invalid Action */ - _SHR_RX_MPLS_INVALID_PAYLOAD = 48, /* MPLS Invalid Payload */ - _SHR_RX_MPLS_LABEL_MISS = 49, /* MPLS table miss */ - _SHR_RX_MPLS_SEQUENCE_NUMBER = 50, /* MPLS Sequence number */ - _SHR_RX_MPLS_TTL = 51, /* MPLS TTL */ - _SHR_RX_MULTICAST = 52, /* Multicast packet */ - _SHR_RX_NHOP = 53, /* Copy to CPU from NH Idx Tbl */ - _SHR_RX_OAM_ERROR = 54, /* OAM packets to CPU for error cases */ - _SHR_RX_OAM_SLOW_PATH = 55, /* OAM packets to CPU - slowpath */ - /* process */ - _SHR_RX_OAM_LMDM = 56, /* OAM LMM/LMR, DMM/DMR packets to CPU */ - _SHR_RX_PARITY_ERROR = 57, /* Parity error on IP tables */ - _SHR_RX_PROTOCOL = 58, /* Protocol Packet */ - _SHR_RX_SAMPLE_DEST = 59, /* Egress sFlow sampled */ - _SHR_RX_SAMPLE_SOURCE = 60, /* Ingress sFlow sampled */ - _SHR_RX_SHARED_VLAN_MISMATCH = 61, /* Private VLAN Mismatch */ - _SHR_RX_SOURCE_ROUTE = 62, /* Source routing bit set */ - _SHR_RX_TIME_STAMP = 63, /* Network time sync packet */ - _SHR_RX_TTL = 64, /* TTL <= 0 or TTL < IPMC threshold */ - _SHR_RX_TTL1 = 65, /* L3UC or IPMC packet with TTL */ - /* equal to 1 */ - _SHR_RX_TUNNEL_ERROR = 66, /* Tunnel error trap */ - _SHR_RX_UDP_CHECKSUM = 67, /* UDP checksum */ - _SHR_RX_UNKNOWN_VLAN = 68, /* Unknown VLAN; VID = 0xfff; */ - /* CPU Learn bit (on 5690 devices) */ - _SHR_RX_URPF_FAIL = 69, /* URPF Check Failed */ - _SHR_RX_VC_LABEL_MISS = 70, /* VPLS table miss */ - _SHR_RX_VLAN_FILTER_MATCH = 71, /* VLAN Filter Match */ - _SHR_RX_WLAN_CLIENT_ERROR = 72, /* ROC error packets to the CPU */ - _SHR_RX_WLAN_SLOW_PATH = 73, /* WLAN packets slowpath to the CPU */ - _SHR_RX_WLAN_DOT1X_DROP = 74, /* WLAN client is unauthenticated */ - _SHR_RX_EXCEPTION_FLOOD = 75, /* Exception processing or flooding */ - _SHR_RX_TIMESYNC = 76, /* Time Sync protocol packet */ - _SHR_RX_EAV_DATA = 77, /* Ethernet AV data packet */ - _SHR_RX_SAME_PORT_BRIDGE = 78, /* Hairpin or Same port */ - /* switching/bridging */ - _SHR_RX_SPLIT_HORIZON = 79, /* Basic bridging or VPLS Split */ - /* horizon */ - _SHR_RX_L4_ERROR = 80, /* TCP/UDP header or port number */ - /* errors */ - _SHR_RX_STP = 81, /* STP Ingress or Egress checks */ - _SHR_RX_EGRESS_FILTER_REDIRECT = 82, /* Vlan egress filter redirect */ - _SHR_RX_FILTER_REDIRECT = 83, /* Field processor redirect */ - _SHR_RX_LOOPBACK = 84, /* Loopbacked */ - _SHR_RX_VLAN_TRANSLATE = 85, /* VLAN translation table missed when */ - /* it is expected to hit */ - _SHR_RX_MMRP = 86, /* Packet of type MMRP */ - _SHR_RX_SRP = 87, /* Packet of type SRP */ - _SHR_RX_TUNNEL_CONTROL = 88, /* Tunnel control packet */ - _SHR_RX_L2_MARKED = 89, /* L2 table marked */ - _SHR_RX_WLAN_SLOWPATH_KEEPALIVE = 90, /* WLAN slowpath to the CPU, */ - /* otherwise dropped */ - _SHR_RX_STATION = 91, /* My Station packet to CPU */ - _SHR_RX_NIV = 92, /* NIV packet */ - _SHR_RX_NIV_PRIO_DROP = 93, /* NIV packet, priority drop */ - _SHR_RX_NIV_INTERFACE_MISS = 94, /* NIV packet, interface miss */ - _SHR_RX_NIV_RPF_FAIL = 95, /* NIV packet, RPF failed */ - _SHR_RX_NIV_TAG_INVALID = 96, /* NIV packet, invalid tag */ - _SHR_RX_NIV_TAG_DROP = 97, /* NIV packet, tag drop */ - _SHR_RX_NIV_UNTAG_DROP = 98, /* NIV packet, untagged drop */ - _SHR_RX_TRILL = 99, /* TRILL packet */ - _SHR_RX_TRILL_INVALID = 100, /* TRILL packet, header error */ - _SHR_RX_TRILL_MISS = 101, /* TRILL packet, lookup miss */ - _SHR_RX_TRILL_RPF_FAIL = 102, /* TRILL packet, RPF check failed */ - _SHR_RX_TRILL_SLOWPATH = 103, /* TRILL packet, slowpath to CPU */ - _SHR_RX_TRILL_CORE_IS_IS = 104, /* TRILL packet, Core IS-IS */ - _SHR_RX_TRILL_TTL = 105, /* TRILL packet, TTL check failed */ - _SHR_RX_BFD_SLOWPATH = 106, /* The BFD packet is being fwd to the */ - /* local uC for processing */ - _SHR_RX_BFD = 107, /* BFD Error */ - _SHR_RX_MIRROR = 108, /* Mirror packet */ - _SHR_RX_REGEX_ACTION = 109, /* Flow tracker */ - _SHR_RX_REGEX_MATCH = 110, /* Signature Match */ - _SHR_RX_FAILOVER_DROP = 111, /* Protection drop data */ - _SHR_RX_WLAN_TUNNEL_ERROR = 112, /* WLAN shim header error to CPU */ - _SHR_RX_CONGESTION_CNM_PROXY = 113, /* Congestion CNM Proxy */ - _SHR_RX_CONGESTION_CNM_PROXY_ERROR = 114, /* Congestion CNM Proxy Error */ - _SHR_RX_CONGESTION_CNM = 115, /* Congestion CNM Internal Packet */ - _SHR_RX_MPLS_UNKNOWN_ACH = 116, /* MPLS Unknown ACH */ - _SHR_RX_MPLS_LOOKUPS_EXCEEDED = 117, /* MPLS out of lookups */ - _SHR_RX_MPLS_RESERVED_ENTROPY_LABEL = 118, /* MPLS Entropy label in unallowed */ - /* range */ - _SHR_RX_MPLS_ILLEGAL_RESERVED_LABEL = 119, /* MPLS illegal reserved label */ - _SHR_RX_MPLS_ROUTER_ALERT_LABEL = 120, /* MPLS alert label */ - _SHR_RX_NIV_PRUNE = 121, /* NIV access port pruning (dst = src) */ - _SHR_RX_VIRTUAL_PORT_PRUNE = 122, /* SVP == DVP */ - _SHR_RX_NON_UNICAST_DROP = 123, /* Explicit multicast packet drop */ - _SHR_RX_TRILL_PACKET_PORT_MISMATCH = 124, /* TRILL packet vs Rbridge port */ - /* conflict */ - _SHR_RX_WLAN_CLIENT_MOVE = 125, /* WLAN client moved */ - _SHR_RX_WLAN_SOURCE_PORT_MISS = 126, /* WLAN SVP miss */ - _SHR_RX_WLAN_CLIENT_SOURCE_MISS = 127, /* WLAN client database SA miss */ - _SHR_RX_WLAN_CLIENT_DEST_MISS = 128, /* WLAN client database DA miss */ - _SHR_RX_WLAN_MTU = 129, /* WLAN MTU error */ - _SHR_RX_TRILL_NAME = 130, /* TRILL packet, Name check failed */ - _SHR_RX_L2GRE_SIP_MISS = 131, /* L2 GRE SIP miss */ - _SHR_RX_L2GRE_VPN_ID_MISS = 132, /* L2 GRE VPN id miss */ - _SHR_RX_TIMESYNC_UNKNOWN_VERSION = 133, /* Unknown version of IEEE1588 */ - _SHR_RX_BFD_ERROR = 134, /* BFD ERROR */ - _SHR_RX_BFD_UNKNOWN_VERSION = 135, /* BFD UNKNOWN VERSION */ - _SHR_RX_BFD_INVALID_VERSION = 136, /* BFD INVALID VERSION */ - _SHR_RX_BFD_LOOKUP_FAILURE = 137, /* BFD LOOKUP FAILURE */ - _SHR_RX_BFD_INVALID_PACKET = 138, /* BFD INVALID PACKET */ - _SHR_RX_VXLAN_SIP_MISS = 139, /* Vxlan SIP miss */ - _SHR_RX_VXLAN_VPN_ID_MISS = 140, /* Vxlan VPN id miss */ - _SHR_RX_FCOE_ZONE_CHECK_FAIL = 141, /* Fcoe zone check failed */ - _SHR_RX_IPMC_INTERFACE_MISMATCH = 142, /* IPMC input interface check failed */ - _SHR_RX_NAT = 143, /* NAT */ - _SHR_RX_TCP_UDP_NAT_MISS = 144, /* TCP/UDP packet NAT lookup miss */ - _SHR_RX_ICMP_NAT_MISS = 145, /* ICMP packet NAT lookup miss */ - _SHR_RX_NAT_FRAGMENT = 146, /* NAT lookup on fragmented packet */ - _SHR_RX_NAT_MISS = 147, /* Non TCP/UDP/ICMP packet NAT lookup */ - /* miss */ - _SHR_RX_UNKNOWN_SUBTENTING_PORT = 148, /* UNKNOWN_SUBTENTING_PORT */ - _SHR_RX_LLTAG_ABSENT_DROP = 149, /* LLTAG_ABSENT */ - _SHR_RX_LLTAG_PRESENT_DROP = 150, /* LLTAG_PRESENT */ - _SHR_RX_OAM_CCM_SLOWPATH = 151, /* OAM CCM packet copied to CPU */ - _SHR_RX_OAM_INCOMPLETE_OPCODE = 152, /* OAM INCOMPLETE_OPCODE */ - _SHR_RX_BHH_OAM_PACKET = 153, /* BHH OAM Packet */ - _SHR_RX_RESERVED_0 = 154, /* Broadcom Reserved */ - _SHR_RX_OAM_MPLS_LMDM = 155, /* MPLS LM/DM (RFC 6374) packet */ - _SHR_RX_SAT = 156, /* OAM SAT pkt */ - _SHR_RX_SAMPLE_SOURCE_FLEX = 157, /* Flexible sampled packets to CPU */ - _SHR_RX_FLEX_SFLOW = 158, /* Flex Sflow? */ - _SHR_RX_VXLT_MISS = 159, /* VLAN Translation miss packet */ - _SHR_RX_TUNNEL_DECAP_ECN_ERROR = 160, /* Tunnel decap ECN error */ - _SHR_RX_TUNNEL_OBJECT_VALIDATION_FAIL = 161, /* Tunnel Object Validation Fail */ - _SHR_RX_L3_CPU = 162, /* L3 Copy to CPU */ - _SHR_RX_TUNNEL_ADAPT_LOOKUP_MISS = 163, /* Tunnel Adapt Lookup Miss Drop */ - _SHR_RX_PACKET_FLOW_SELECT_MISS = 164, /* Packet Flow Select Miss */ - _SHR_RX_PROTECTION_DATA_DROP = 165, /* Protection Data Drop */ - _SHR_RX_PACKET_FLOW_SELECT = 166, /* Packet Flow Select */ - _SHR_RX_OTHER_LOOKUP_MISS = 167, /* Neither Source or Dest type of */ - /* Lookup Miss */ - _SHR_RX_INVALID_TPID = 168, /* Invalid TPID */ - _SHR_RX_MPLS_CONTROL_PACKET = 169, /* MPLS Control Packet */ - _SHR_RX_TUNNEL_TTL_ERROR = 170, /* Tunnel TTL Error */ - _SHR_RX_L2_HEADER_ERROR = 171, /* L2 header */ - _SHR_RX_OTHER_LOOKUP_HIT = 172, /* Neither Source or Dest type of */ - /* Lookup Hit */ - _SHR_RX_L2_SRC_LOOKUP_MISS = 173, /* L2 Source Lookup Miss */ - _SHR_RX_L2_SRC_LOOKUP_HIT = 174, /* L2 Source Lookup Hit */ - _SHR_RX_L2_DST_LOOKUP_MISS = 175, /* L2 Dest Lookup Miss */ - _SHR_RX_L2_DST_LOOKUP_HIT = 176, /* L2 Dest Lookup Hit */ - _SHR_RX_L3_SRC_ROUTE_LOOKUP_MISS = 177, /* L3 Source Route Lookup Miss */ - _SHR_RX_L3_SRC_HOST_LOOKUP_MISS = 178, /* L3 Source Host Lookup Miss */ - _SHR_RX_L3_SRC_ROUTE_LOOKUP_HIT = 179, /* L3 Source Route Lookup Hit */ - _SHR_RX_L3_SRC_HOST_LOOKUP_HIT = 180, /* L3 Source Host Lookup Hit */ - _SHR_RX_L3_DST_ROUTE_LOOKUP_MISS = 181, /* L3 Dest Route Lookup Miss */ - _SHR_RX_L3_DST_HOST_LOOKUP_MISS = 182, /* L3 Dest Host Lookup Miss */ - _SHR_RX_L3_DST_ROUTE_LOOKUP_HIT = 183, /* L3 Dest Route Lookup Hit */ - _SHR_RX_L3_DST_HOST_LOOKUP_HIT = 184, /* L3 Dest Host Lookup Hit */ - _SHR_RX_VLAN_TRANSLATE1_LOOKUP1_MISS = 185, /* VLAN Translate1 Lookup1 Miss */ - _SHR_RX_VLAN_TRANSLATE1_LOOKUP2_MISS = 186, /* VLAN Translate1 Lookup2 Miss */ - _SHR_RX_MPLS_LOOKUP1_MISS = 187, /* MPLS Lookup1 Miss */ - _SHR_RX_MPLS_LOOKUP2_MISS = 188, /* MPLS Lookup2 Miss */ - _SHR_RX_L3_TUNNEL_LOOKUP_MISS = 189, /* L3 Tunnel Lookup Miss */ - _SHR_RX_VLAN_TRANSLATE2_LOOKUP1_MISS = 190, /* VLAN Translate2 Lookup1 Miss */ - _SHR_RX_VLAN_TRANSLATE2_LOOKUP2_MISS = 191, /* VLAN Translate2 Lookup2 Miss */ - _SHR_RX_L2_STU_FAIL = 192, /* L2 STU check fail */ - _SHR_RX_SR_COUNTER_EXCEEDED = 193, /* Seamless Redundancy(SR) - */ - /* Counter Threshold Exceeded */ - _SHR_RX_SR_COPY_TO_CPU_BIT0 = 194, /* Seamless Redundancy(SR) copy to CPU */ - /* SR custom reason code bit 0 */ - _SHR_RX_SR_COPY_TO_CPU_BIT1 = 195, /* SR custom reason code bit 1 */ - _SHR_RX_SR_COPY_TO_CPU_BIT2 = 196, /* SR custom reason code bit 2 */ - _SHR_RX_SR_COPY_TO_CPU_BIT3 = 197, /* SR custom reason code bit 3 */ - _SHR_RX_SR_COPY_TO_CPU_BIT4 = 198, /* SR custom reason code bit 4 */ - _SHR_RX_SR_COPY_TO_CPU_BIT5 = 199, /* SR custom reason code bit 5 */ - _SHR_RX_L3_HEADER_MISMATCH = 200, /* L3 Header Mismatch */ - _SHR_RX_DLB_MONITOR = 201, /* DLB Monitor */ - _SHR_RX_ETRAP_MONITOR = 202, /* ETRAP Monitor */ - _SHR_RX_INT_TURNAROUND = 203, /* INT TurnAround */ - _SHR_RX_INT_HOP_LIMIT = 204, /* INT Hop Limit */ - _SHR_RX_PROTECTION_STATUS_DOWN = 205, /* Protection Status Down */ - _SHR_RX_SVTAG = 206, /* SVtag */ - _SHR_RX_SVTAG_LOOKUP_MISS = 207, /* SVtag Lookup Miss */ - _SHR_RX_PKT_DROP_ON_PORT_HIGIG3_CHECK = 208, /* Port HIGIG3 check fail */ - _SHR_RX_SRV6_PROCESS_ERROR = 209, /* SRV6 process error */ - _SHR_RX_SRV6_VALIDATION_ERROR = 210, /* SRV6 validation error */ - _SHR_RX_SRV6_UNKNOWN_RT_WITH_NONZERO_SL = 211, /* unknown routing type in SRV6 */ - /* packets with nonzero segment */ - /* left field */ - _SHR_RX_RCPU_TO_CPU = 212, /* RCPU copied to CPU */ - _SHR_RX_REASON_COUNT = 213 /* MUST BE LAST */ -} _shr_rx_reason_t; - -#define _SHR_RX_REASON_NAMES_INITIALIZER { \ - "Invalid", \ - "Arp", \ - "Bpdu", \ - "Broadcast", \ - "ClassBasedMove", \ - "ClassTagPackets", \ - "Control", \ - "CpuLearn", \ - "DestLookupFail", \ - "Dhcp", \ - "DosAttack", \ - "E2eHolIbp", \ - "EncapHiGigError", \ - "FilterMatch", \ - "GreChecksum", \ - "GreSourceRoute", \ - "HigigControl", \ - "HigigHdrError", \ - "IcmpRedirect", \ - "Igmp", \ - "IngressFilter", \ - "Ip", \ - "IpfixRateViolation", \ - "IpMcastMiss", \ - "IpOptionVersion", \ - "Ipmc", \ - "IpmcRsvd", \ - "L2Cpu", \ - "L2DestMiss", \ - "L2LearnLimit", \ - "L2Move", \ - "L2MtuFail", \ - "L2NonUnicastMiss", \ - "L2SourceMiss", \ - "L3AddrBindFail", \ - "L3DestMiss", \ - "L3HeaderError", \ - "L3MtuFail", \ - "L3Slowpath", \ - "L3SourceMiss", \ - "L3SourceMove", \ - "MartianAddr", \ - "McastIdxError", \ - "McastMiss", \ - "MimServiceError", \ - "MplsCtrlWordError", \ - "MplsError", \ - "MplsInvalidAction", \ - "MplsInvalidPayload", \ - "MplsLabelMiss", \ - "MplsSequenceNumber", \ - "MplsTtl", \ - "Multicast", \ - "Nhop", \ - "OamError", \ - "OamSlowPath", \ - "OamLMDM", \ - "ParityError", \ - "Protocol", \ - "SampleDest", \ - "SampleSource", \ - "SharedVlanMismatch", \ - "SourceRoute", \ - "TimeStamp", \ - "Ttl", \ - "Ttl1", \ - "TunnelError", \ - "UdpChecksum", \ - "UnknownVlan", \ - "UrpfFail", \ - "VcLabelMiss", \ - "VlanFilterMatch", \ - "WlanClientError", \ - "WlanSlowPath", \ - "WlanDot1xDrop", \ - "ExceptionFlood", \ - "Timesync", \ - "EavData", \ - "SamePortBridge", \ - "SplitHorizon", \ - "L4Error", \ - "Stp", \ - "EgressFilterRedirect", \ - "FilterRedirect", \ - "Loopback", \ - "VlanTranslate", \ - "Mmrp", \ - "Srp", \ - "TunnelControl", \ - "L2Marked", \ - "WlanSlowpathKeepalive", \ - "Station", \ - "Niv", \ - "NivPrioDrop", \ - "NivInterfaceMiss", \ - "NivRpfFail", \ - "NivTagInvalid", \ - "NivTagDrop", \ - "NivUntagDrop", \ - "Trill", \ - "TrillInvalid", \ - "TrillMiss", \ - "TrillRpfFail", \ - "TrillSlowpath", \ - "TrillCoreIsIs", \ - "TrillTtl", \ - "BfdSlowpath", \ - "Bfd", \ - "Mirror", \ - "RegexAction", \ - "RegexMatch", \ - "FailoverDrop", \ - "WlanTunnelError", \ - "CongestionCnmProxy", \ - "CongestionCnmProxyError", \ - "CongestionCnm", \ - "MplsUnknownAch", \ - "MplsLookupsExceeded", \ - "MplsReservedEntropyLabel", \ - "MplsIllegalReservedLabel", \ - "MplsRouterAlertLabel", \ - "NivPrune", \ - "VirtualPortPrune", \ - "NonUnicastDrop", \ - "TrillPacketPortMismatch", \ - "WlanClientMove", \ - "WlanSourcePortMiss", \ - "WlanClientSourceMiss", \ - "WlanClientDestMiss", \ - "WlanMtu", \ - "TrillName", \ - "L2GreSipMiss", \ - "L2GreVpnIdMiss", \ - "TimesyncUnknownVersion", \ - "BfdError", \ - "BfdUnknownVersion", \ - "BfdInvalidVersion", \ - "BfdLookupFailure", \ - "BfdInvalidPacket", \ - "VxlanSipMiss", \ - "VxlanVpnIdMiss", \ - "FcoeZoneCheckFail", \ - "IpmcInterfaceMismatch", \ - "Nat", \ - "TcpUdpNatMiss", \ - "IcmpNatMiss", \ - "NatFragment", \ - "NatMiss", \ - "UnknownSubtentingPort", \ - "LLTagAbsentDrop", \ - "LLTagpresenDrop", \ - "OAMCCMslowpath", \ - "OAMIncompleteOpcode", \ - "OAMCCMpacket", \ - "Reserved0", \ - "OAMMplsLmDM", \ - "SAT", \ - "SampleSourceFlex", \ - "FlexSflow", \ - "VxltMiss", \ - "TunnelDecapEcnError", \ - "TunnelObjectValidationFail", \ - "L3Cpu", \ - "TunnelAdaptLookupMiss", \ - "PacketFlowSelectMiss", \ - "ProtectionDataDrop", \ - "PacketFlowSelect", \ - "OtherLookupMiss", \ - "InvalidTpid", \ - "MplsControlPacket", \ - "TunnelTtlError", \ - "L2HeaderError", \ - "OtherLookupHit", \ - "L2SrcLookupMiss", \ - "L2SrcLookupHit", \ - "L2DstLookupMiss", \ - "L2DstLookupHit", \ - "L3SrcRouteLookupMiss", \ - "L3SrcHostLookupMiss", \ - "L3SrcRouteLookupHit", \ - "L3SrcHostLookupHit", \ - "L3DstRouteLookupMiss", \ - "L3DstHostLookupMiss", \ - "L3DstRouteLookupHit", \ - "L3DstHostLookupHit", \ - "MplsLookup1Miss", \ - "MplsLookup2Miss", \ - "L3TunnelLookupMiss", \ - "VlanTranslate1Lookup1Miss",\ - "VlanTranslate1Lookup2Miss",\ - "VlanTranslate2Lookup1Miss",\ - "VlanTranslate2Lookup2Miss",\ - "L2StuFail", \ - "SrCounterExceeded", \ - "SrCopyToCpuBit0", \ - "SrCopyToCpuBit1", \ - "SrCopyToCpuBit2", \ - "SrCopyToCpuBit3", \ - "SrCopyToCpuBit4", \ - "SrCopyToCpuBit5", \ - "L3HeaderMismatch", \ - "DlbMonitor", \ - "EtrapMonitor", \ - "IntTurnAround", \ - "IntHopLimit", \ - "ProtectionStatusDown", \ - "Svtag", \ - "SvtagLookupMiss", \ - "PktDropOnPortHigig3Check", \ - "Srv6ProcessError", \ - "Srv6ValidationError", \ - "Srv6UnknownRoutingTypeWithNonZeroSl", \ - "RcpuToCpu", \ -} - -/* Base type for declarations */ -#define SHR_BITDCL uint32 -#define SHR_BITWID 32 - -/* (internal) Number of SHR_BITDCLs needed to contain _max bits */ -#define _SHR_BITDCLSIZE(_max) (((_max) + SHR_BITWID - 1) / SHR_BITWID) - -/* - * Set of "reasons" (see _SHR_RX_*) why a packet came to the CPU. - */ -typedef struct _shr_rx_reasons_s { - SHR_BITDCL pbits[_SHR_BITDCLSIZE(_SHR_RX_REASON_COUNT)]; -} _shr_rx_reasons_t; - -/* - * Macro to add a reason (_SHR_RX_*) to a set of - * reasons (_shr_rx_reasons_t) - */ -#define _SHR_RX_REASON_SET(_reasons, _reason) \ - ((((_reasons).pbits)[(_reason) / SHR_BITWID]) |= (1U << ((_reason) % SHR_BITWID))) - -/* - * Macro to clear a set of reasons (_shr_rx_reasons_t). - */ -#define _SHR_RX_REASON_CLEAR_ALL(_reasons) \ -{ \ - SHR_BITDCL *_ptr; \ - int _c = _SHR_RX_REASON_COUNT; \ - \ - if (_c <= 0) { \ - return; \ - } \ - \ - _ptr = (((_reasons).pbits)); \ - \ - while (_c >= SHR_BITWID) { \ - *(_ptr++) = 0; \ - _c -= SHR_BITWID; \ - } \ - \ - if(_c > 0) { \ - SHR_BITDCL _mask = ~0; \ - _mask >>= (SHR_BITWID - _c); \ - *(_ptr) &= ~_mask; \ - } \ -} - -/* - * Macro to check if a reason (_SHR_RX_*) is included in a - * set of reasons (_shr_rx_reasons_t). Returns: - * zero => reason is not included in the set - * non-zero => reason is included in the set - */ -#define _SHR_RX_REASON_GET(_reasons, _reason) \ - ((((_reasons).pbits)[(_reason) / SHR_BITWID]) & (1U << ((_reason) % SHR_BITWID))) - -#define _SHR_RX_REASON_ITER(_reasons, reason) \ - for(reason = _SHR_RX_INVALID; reason < (int)_SHR_RX_REASON_COUNT; reason++) \ - if(_SHR_RX_REASON_GET(_reasons, reason)) - -typedef enum _shr_rx_redirect_e { - _SHR_RX_REDIRECT_NORMAL = 0, - _SHR_RX_REDIRECT_HIGIG = 1, - _SHR_RX_REDIRECT_TRUNCATED = 2, - _SHR_RX_REDIRECT_MAX = _SHR_RX_REDIRECT_TRUNCATED -} _shr_rx_redirect_e; - - -typedef enum _shr_rx_decap_tunnel_e { - _SHR_RX_DECAP_NONE = 0, /* No tunnel Decap */ - _SHR_RX_DECAP_ACCESS_SVP = 1, /* Packet ingress on Access SVP (No decap) */ - _SHR_RX_DECAP_MIM = 2, /* Decap Mac-in-Mac tunnel */ - _SHR_RX_DECAP_L2GRE = 3, /* Decap L2GRE tunnel */ - _SHR_RX_DECAP_VXLAN = 4, /* Decap VXLAN tunnel */ - _SHR_RX_DECAP_AMT = 5, /* Decap AMT tunnel */ - _SHR_RX_DECAP_IP = 6, /* Decap IP tunnel */ - _SHR_RX_DECAP_TRILL = 7, /* Decap TRILL tunnel */ - _SHR_RX_DECAP_L2MPLS_1LABEL = 8, /* Decap MPLS 1 Label, L2 payload, no - Control Word */ - _SHR_RX_DECAP_L2MPLS_2LABEL = 9, /* Decap MPLS 2 Label, L2 payload, no - Control Word */ - _SHR_RX_DECAP_L2MPLS_1LABELCW = 10, /* Decap MPLS 1 Label, L2 payload, Control - Word present */ - _SHR_RX_DECAP_L2MPLS_2LABELCW = 11, /* Decap MPLS 2 Label, L2 payload, Control - Word present */ - _SHR_RX_DECAP_L3MPLS_1LABEL = 12, /* Decap MPLS 1 Label, L3 payload, no - Control Word present */ - _SHR_RX_DECAP_L3MPLS_2LABEL = 13, /* Decap MPLS 2 Label, L3 payload, no - Control Word present */ - _SHR_RX_DECAP_L3MPLS_1LABELCW = 14, /* Decap MPLS 1 Label, L3 payload, Control - Word present */ - _SHR_RX_DECAP_L3MPLS_2LABELCW = 15, /* Decap MPLS 2 Label, L3 payload, Control - Word present */ - _SHR_RX_DECAP_WTP2AC = 16, /* Decap WTP2AC Tunnel */ - _SHR_RX_DECAP_AC2AC = 17, /* Decap AC2AC Tunnel */ - _SHR_RX_DECAP_MPLS_1LABELCW = 18, /* Decap MPLS 1 Label, Control - Word present */ - _SHR_RX_DECAP_MPLS_2LABELCW = 19, /* Decap MPLS 2 Label, Control - Word present */ - _SHR_RX_DECAP_MPLS_1LABEL = 20, /* Decap MPLS 1 Label, no - Control Word */ - _SHR_RX_DECAP_MPLS_2LABEL = 21, /* Decap MPLS 2 Label, no - Control Word */ - _SHR_RX_DECAP_MPLS_3LABEL = 22, /* Decap MPLS 3 Label, no Control - Word */ - _SHR_RX_DECAP_MPLS_3LABELCW = 23, /* Decap MPLS 3 Label, Control - Word present */ - _SHR_RX_DECAP_MPLS_3LABEL_ENTROPY = 25, /* Decap MPLS 3 Label + entropy, - no Control Word */ - _SHR_RX_DECAP_MPLS_3LABEL_ENTROPYCW = 26, /* Decap MPLS 3 Label + entropy, - Control Word present */ - _SHR_RX_DECAP_COUNT = 27 /* Decap Tunnel Max */ -} _shr_rx_decap_tunnel_t; - -typedef enum _shr_rx_decap_hdr_e { - _SHR_RX_DECAP_HDR_NONE = 0, /* No headers Decapped */ - _SHR_RX_DECAP_SYSTEM_HDR = 1, /* Decap System Header */ - _SHR_RX_DECAP_OUTER_L2_HDR = 2, /* Decap Outer L2 Header */ - _SHR_RX_DECAP_L3_L4_TUNNEL_HDR = 4, /* Decap Outer L3/L4/TUNNEL Header */ - _SHR_RX_DECAP_INNER_L2_HDR = 8, /* Decap Inner L2 Header */ - _SHR_RX_DECAP_INNER_L3_L4_HDR = 16, /* Decap Inner L3 and L4 Header */ - _SHR_RX_DECAP_HDR_MAX = _SHR_RX_DECAP_INNER_L3_L4_HDR /* Max Value */ -} _shr_rx_decap_hdr_t; - -#endif /* _SHR_RX_H_ */ diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/devids.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/devids.h deleted file mode 100644 index f2ced3230b5..00000000000 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/devids.h +++ /dev/null @@ -1,2259 +0,0 @@ -/* - * $Id:$ - * - * $Copyright: 2017-2025 Broadcom Inc. All rights reserved. - * - * Permission is granted to use, copy, modify and/or distribute this - * software under either one of the licenses below. - * - * License Option 1: GPL - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License, version 2, as - * published by the Free Software Foundation (the "GPL"). - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License version 2 (GPLv2) for more details. - * - * You should have received a copy of the GNU General Public License - * version 2 (GPLv2) along with this source code. - * - * - * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license - * - * This software is governed by the Broadcom Open Network Switch APIs license: - * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ - * - * - */ - -#ifndef _SOC_DEVIDS_H -#define _SOC_DEVIDS_H - - -#define BROADCOM_VENDOR_ID 0x14e4 - -#define BCM5690_DEVICE_ID 0x5690 -#define BCM5690_A0_REV_ID 1 -#define BCM5690_A1_REV_ID 2 -#define BCM5690_A2_REV_ID 3 - -#define BCM5691_DEVICE_ID 0x5691 -#define BCM5691_A0_REV_ID 1 -#define BCM5691_A1_REV_ID 2 -#define BCM5691_A2_REV_ID 3 - -#define BCM5692_DEVICE_ID 0x5692 -#define BCM5692_A0_REV_ID 1 -#define BCM5692_A1_REV_ID 2 -#define BCM5692_A2_REV_ID 3 - -#define BCM5693_DEVICE_ID 0x5693 -#define BCM5693_A0_REV_ID 1 -#define BCM5693_A1_REV_ID 2 -#define BCM5693_A2_REV_ID 3 - -#define BCM5695_DEVICE_ID 0x5695 -#define BCM5695_A0_REV_ID 1 -#define BCM5695_A1_REV_ID 2 -#define BCM5695_B0_REV_ID 0x11 - -#define BCM5696_DEVICE_ID 0x5696 -#define BCM5696_A0_REV_ID 1 -#define BCM5696_A1_REV_ID 2 -#define BCM5696_B0_REV_ID 0x11 - -#define BCM5697_DEVICE_ID 0x5697 -#define BCM5697_A0_REV_ID 1 -#define BCM5697_A1_REV_ID 2 -#define BCM5697_B0_REV_ID 0x11 - -#define BCM5698_DEVICE_ID 0x5698 -#define BCM5698_A0_REV_ID 1 -#define BCM5698_A1_REV_ID 2 -#define BCM5698_B0_REV_ID 0x11 - -#define BCM5670_DEVICE_ID 0x5670 -#define BCM5670_A0_REV_ID 1 -#define BCM5670_A1_REV_ID 2 - -#define BCM5671_DEVICE_ID 0x5671 -#define BCM5671_A0_REV_ID 1 -#define BCM5671_A1_REV_ID 2 -#define BCM5671_A2_REV_ID 3 - -#define BCM5675_DEVICE_ID 0x5675 -#define BCM5675_A0_REV_ID 1 -#define BCM5675_A1_REV_ID 2 - -#define BCM5676_DEVICE_ID 0x5676 -#define BCM5676_A0_REV_ID 1 -#define BCM5676_A1_REV_ID 2 - -#define BCM5673_DEVICE_ID 0x5673 -#define BCM5673_A0_REV_ID 1 -#define BCM5673_A1_REV_ID 2 -#define BCM5673_A2_REV_ID 3 - -#define BCM5674_DEVICE_ID 0x5674 -#define BCM5674_A0_REV_ID 1 - -#define BCM56100_DEVICE_ID 0xb100 -#define BCM56100_A0_REV_ID 1 -#define BCM56100_A1_REV_ID 2 -#define BCM56101_DEVICE_ID 0xb101 -#define BCM56101_A0_REV_ID 1 -#define BCM56101_A1_REV_ID 2 -#define BCM56102_DEVICE_ID 0xb102 -#define BCM56102_A0_REV_ID 1 -#define BCM56102_A1_REV_ID 2 -#define BCM56105_DEVICE_ID 0xb105 -#define BCM56105_A0_REV_ID 1 -#define BCM56105_A1_REV_ID 2 -#define BCM56106_DEVICE_ID 0xb106 -#define BCM56106_A0_REV_ID 1 -#define BCM56106_A1_REV_ID 2 -#define BCM56107_DEVICE_ID 0xb107 -#define BCM56107_A0_REV_ID 1 -#define BCM56107_A1_REV_ID 2 - -#define BCM56110_DEVICE_ID 0xb110 -#define BCM56110_A0_REV_ID 1 -#define BCM56111_DEVICE_ID 0xb111 -#define BCM56111_A0_REV_ID 1 -#define BCM56112_DEVICE_ID 0xb112 -#define BCM56112_A0_REV_ID 1 -#define BCM56115_DEVICE_ID 0xb115 -#define BCM56115_A0_REV_ID 1 -#define BCM56116_DEVICE_ID 0xb116 -#define BCM56116_A0_REV_ID 1 -#define BCM56117_DEVICE_ID 0xb117 -#define BCM56117_A0_REV_ID 1 - -#define BCM56300_DEVICE_ID 0xb300 -#define BCM56300_A0_REV_ID 1 -#define BCM56300_A1_REV_ID 2 -#define BCM56300_B0_REV_ID 0x11 -#define BCM56300_B1_REV_ID 0x12 -#define BCM56301_DEVICE_ID 0xb301 -#define BCM56301_A0_REV_ID 1 -#define BCM56301_A1_REV_ID 2 -#define BCM56301_B0_REV_ID 0x11 -#define BCM56301_B1_REV_ID 0x12 -#define BCM56302_DEVICE_ID 0xb302 -#define BCM56302_A0_REV_ID 1 -#define BCM56302_A1_REV_ID 2 -#define BCM56302_B0_REV_ID 0x11 -#define BCM56302_B1_REV_ID 0x12 -#define BCM56303_DEVICE_ID 0xb303 -#define BCM56303_A1_REV_ID 2 -#define BCM56303_A0_REV_ID 1 -#define BCM56303_B0_REV_ID 0x11 -#define BCM56303_B1_REV_ID 0x12 -#define BCM56304_DEVICE_ID 0xb304 -#define BCM56304_A0_REV_ID 1 -#define BCM56304_A1_REV_ID 2 -#define BCM56304_B0_REV_ID 0x11 -#define BCM56304_B1_REV_ID 0x12 -#define BCM56404_DEVICE_ID 0xb404 -#define BCM56404_A0_REV_ID 1 -#define BCM56404_A1_REV_ID 2 -#define BCM56305_DEVICE_ID 0xb305 -#define BCM56305_A0_REV_ID 1 -#define BCM56305_A1_REV_ID 2 -#define BCM56305_B0_REV_ID 0x11 -#define BCM56305_B1_REV_ID 0x12 -#define BCM56306_DEVICE_ID 0xb306 -#define BCM56306_A0_REV_ID 1 -#define BCM56306_A1_REV_ID 2 -#define BCM56306_B0_REV_ID 0x11 -#define BCM56306_B1_REV_ID 0x12 -#define BCM56307_DEVICE_ID 0xb307 -#define BCM56307_A0_REV_ID 1 -#define BCM56307_A1_REV_ID 2 -#define BCM56307_B0_REV_ID 0x11 -#define BCM56307_B1_REV_ID 0x12 -#define BCM56308_DEVICE_ID 0xb308 -#define BCM56308_A0_REV_ID 1 -#define BCM56308_A1_REV_ID 2 -#define BCM56308_B0_REV_ID 0x11 -#define BCM56308_B1_REV_ID 0x12 -#define BCM56309_DEVICE_ID 0xb309 -#define BCM56309_A0_REV_ID 1 -#define BCM56309_A1_REV_ID 2 -#define BCM56309_B0_REV_ID 0x11 -#define BCM56309_B1_REV_ID 0x12 - -#define BCM56310_DEVICE_ID 0xb310 -#define BCM56310_A0_REV_ID 1 -#define BCM56311_DEVICE_ID 0xb311 -#define BCM56311_A0_REV_ID 1 -#define BCM56312_DEVICE_ID 0xb312 -#define BCM56312_A0_REV_ID 1 -#define BCM56313_DEVICE_ID 0xb313 -#define BCM56313_A0_REV_ID 1 -#define BCM56314_DEVICE_ID 0xb314 -#define BCM56314_A0_REV_ID 1 -#define BCM56315_DEVICE_ID 0xb315 -#define BCM56315_A0_REV_ID 1 -#define BCM56316_DEVICE_ID 0xb316 -#define BCM56316_A0_REV_ID 1 -#define BCM56317_DEVICE_ID 0xb317 -#define BCM56317_A0_REV_ID 1 -#define BCM56318_DEVICE_ID 0xb318 -#define BCM56318_A0_REV_ID 1 -#define BCM56319_DEVICE_ID 0xb319 -#define BCM56319_A0_REV_ID 1 - -#ifndef EXCLUDE_BCM56324 -#define BCM56322_DEVICE_ID 0xb322 -#define BCM56322_A0_REV_ID 1 -#define BCM56324_DEVICE_ID 0xb324 -#define BCM56324_A0_REV_ID 1 -#endif - -#define BCM53300_DEVICE_ID 0xb006 -#define BCM53300_A0_REV_ID 0x11 -#define BCM53300_A1_REV_ID 0x12 -#define BCM53301_DEVICE_ID 0xb206 -#define BCM53301_A0_REV_ID 0x11 -#define BCM53301_A1_REV_ID 0x12 -#define BCM53302_DEVICE_ID 0xb008 -#define BCM53302_A0_REV_ID 0x11 -#define BCM53302_A1_REV_ID 0x12 - -#define BCM56500_DEVICE_ID 0xb500 -#define BCM56500_A0_REV_ID 1 -#define BCM56500_A1_REV_ID 2 -#define BCM56500_B0_REV_ID 0x11 -#define BCM56500_B1_REV_ID 0x12 -#define BCM56500_B2_REV_ID 0x13 -#define BCM56501_DEVICE_ID 0xb501 -#define BCM56501_A0_REV_ID 1 -#define BCM56501_A1_REV_ID 2 -#define BCM56501_B0_REV_ID 0x11 -#define BCM56501_B1_REV_ID 0x12 -#define BCM56501_B2_REV_ID 0x13 -#define BCM56502_DEVICE_ID 0xb502 -#define BCM56502_A0_REV_ID 1 -#define BCM56502_A1_REV_ID 2 -#define BCM56502_B0_REV_ID 0x11 -#define BCM56502_B1_REV_ID 0x12 -#define BCM56502_B2_REV_ID 0x13 -#define BCM56503_DEVICE_ID 0xb503 -#define BCM56503_A0_REV_ID 1 -#define BCM56503_A1_REV_ID 2 -#define BCM56503_B0_REV_ID 0x11 -#define BCM56503_B1_REV_ID 0x12 -#define BCM56503_B2_REV_ID 0x13 -#define BCM56504_DEVICE_ID 0xb504 -#define BCM56504_A0_REV_ID 1 -#define BCM56504_A1_REV_ID 2 -#define BCM56504_B0_REV_ID 0x11 -#define BCM56504_B1_REV_ID 0x12 -#define BCM56504_B2_REV_ID 0x13 -#define BCM56505_DEVICE_ID 0xb505 -#define BCM56505_A0_REV_ID 1 -#define BCM56505_A1_REV_ID 2 -#define BCM56505_B0_REV_ID 0x11 -#define BCM56505_B1_REV_ID 0x12 -#define BCM56505_B2_REV_ID 0x13 -#define BCM56506_DEVICE_ID 0xb506 -#define BCM56506_A0_REV_ID 1 -#define BCM56506_A1_REV_ID 2 -#define BCM56506_B0_REV_ID 0x11 -#define BCM56506_B1_REV_ID 0x12 -#define BCM56506_B2_REV_ID 0x13 -#define BCM56507_DEVICE_ID 0xb507 -#define BCM56507_A0_REV_ID 1 -#define BCM56507_A1_REV_ID 2 -#define BCM56507_B0_REV_ID 0x11 -#define BCM56507_B1_REV_ID 0x12 -#define BCM56507_B2_REV_ID 0x13 -#define BCM56508_DEVICE_ID 0xb508 -#define BCM56508_A0_REV_ID 1 -#define BCM56508_A1_REV_ID 2 -#define BCM56508_B0_REV_ID 0x11 -#define BCM56508_B1_REV_ID 0x12 -#define BCM56508_B2_REV_ID 0x13 -#define BCM56509_DEVICE_ID 0xb509 -#define BCM56509_A0_REV_ID 1 -#define BCM56509_A1_REV_ID 2 -#define BCM56509_B0_REV_ID 0x11 -#define BCM56509_B1_REV_ID 0x12 -#define BCM56509_B2_REV_ID 0x13 - -#define BCM56600_DEVICE_ID 0xb600 -#define BCM56600_A0_REV_ID 1 -#define BCM56600_B0_REV_ID 0x11 -#define BCM56600_C0_REV_ID 0x21 -#define BCM56601_DEVICE_ID 0xb601 -#define BCM56601_A0_REV_ID 1 -#define BCM56601_B0_REV_ID 0x11 -#define BCM56601_C0_REV_ID 0x21 -#define BCM56602_DEVICE_ID 0xb602 -#define BCM56602_A0_REV_ID 1 -#define BCM56602_B0_REV_ID 0x11 -#define BCM56602_C0_REV_ID 0x21 -#define BCM56603_DEVICE_ID 0xb603 -#define BCM56603_A0_REV_ID 1 -#define BCM56603_B0_REV_ID 0x11 -#define BCM56603_C0_REV_ID 0x21 -#define BCM56605_DEVICE_ID 0xb605 -#define BCM56605_A0_REV_ID 1 -#define BCM56605_B0_REV_ID 0x11 -#define BCM56605_C0_REV_ID 0x21 -#define BCM56606_DEVICE_ID 0xb606 -#define BCM56606_A0_REV_ID 1 -#define BCM56606_B0_REV_ID 0x11 -#define BCM56606_C0_REV_ID 0x21 -#define BCM56607_DEVICE_ID 0xb607 -#define BCM56607_A0_REV_ID 1 -#define BCM56607_B0_REV_ID 0x11 -#define BCM56607_C0_REV_ID 0x21 -#define BCM56608_DEVICE_ID 0xb608 -#define BCM56608_A0_REV_ID 1 -#define BCM56608_B0_REV_ID 0x11 -#define BCM56608_C0_REV_ID 0x21 - -#define BCM56580_DEVICE_ID 0xb580 -#define BCM56580_A0_REV_ID 1 - -#define BCM56700_DEVICE_ID 0xb700 -#define BCM56700_A0_REV_ID 1 -#define BCM56701_DEVICE_ID 0xb701 -#define BCM56701_A0_REV_ID 1 - -#define BCM56800_DEVICE_ID 0xb800 -#define BCM56800_A0_REV_ID 1 -#define BCM56801_DEVICE_ID 0xb801 -#define BCM56801_A0_REV_ID 1 -#define BCM56802_DEVICE_ID 0xb802 -#define BCM56802_A0_REV_ID 1 -#define BCM56803_DEVICE_ID 0xb803 -#define BCM56803_A0_REV_ID 1 - -#define BCM56224_DEVICE_ID 0xb224 -#define BCM56224_A0_REV_ID 1 -#define BCM56224_B0_REV_ID 0x11 -#define BCM56225_DEVICE_ID 0xb225 -#define BCM56225_A0_REV_ID 1 -#define BCM56225_B0_REV_ID 0x11 -#define BCM56226_DEVICE_ID 0xb226 -#define BCM56226_A0_REV_ID 1 -#define BCM56226_B0_REV_ID 0x11 -#define BCM56227_DEVICE_ID 0xb227 -#define BCM56227_A0_REV_ID 1 -#define BCM56227_B0_REV_ID 0x11 -#define BCM56228_DEVICE_ID 0xb228 -#define BCM56228_A0_REV_ID 1 -#define BCM56228_B0_REV_ID 0x11 -#define BCM56229_DEVICE_ID 0xb229 -#define BCM56229_A0_REV_ID 1 -#define BCM56229_B0_REV_ID 0x11 -#define BCM56024_DEVICE_ID 0xb024 -#define BCM56024_A0_REV_ID 1 -#define BCM56024_B0_REV_ID 0x11 -#define BCM56025_DEVICE_ID 0xb025 -#define BCM56025_A0_REV_ID 1 -#define BCM56025_B0_REV_ID 0x11 -#define BCM53724_DEVICE_ID 0xc724 -#define BCM53724_A0_REV_ID 1 -#define BCM53724_B0_REV_ID 0x11 -#define BCM53726_DEVICE_ID 0xc726 -#define BCM53726_A0_REV_ID 1 -#define BCM53726_B0_REV_ID 0x11 - -#define BCM53312_DEVICE_ID 0xc312 -#define BCM53312_A0_REV_ID 1 -#define BCM53312_B0_REV_ID 0x11 -#define BCM53313_DEVICE_ID 0xc313 -#define BCM53313_A0_REV_ID 1 -#define BCM53313_B0_REV_ID 0x11 -#define BCM53314_DEVICE_ID 0xc314 -#define BCM53314_A0_REV_ID 1 -#define BCM53314_B0_REV_ID 0x11 - -#define BCM53322_DEVICE_ID 0xc322 -#define BCM53322_A0_REV_ID 1 -#define BCM53323_DEVICE_ID 0xc323 -#define BCM53323_A0_REV_ID 1 -#define BCM53324_DEVICE_ID 0xc324 -#define BCM53324_A0_REV_ID 1 - - -#define BCM56218_DEVICE_ID 0xB218 -#define BCM56218_A0_REV_ID 1 -#define BCM56218_A1_REV_ID 2 -#define BCM56218_A2_REV_ID 3 -#define BCM56218X_DEVICE_ID 0xc710 -#define BCM56218X_A0_REV_ID 1 -#define BCM56218X_A1_REV_ID 2 -#define BCM56218X_A2_REV_ID 3 -#define BCM56219_DEVICE_ID 0xB219 -#define BCM56219_A0_REV_ID 1 -#define BCM56219_A1_REV_ID 2 -#define BCM56219_A2_REV_ID 3 -#define BCM56218R_DEVICE_ID 0xB21A -#define BCM56218R_A0_REV_ID 1 -#define BCM56218R_A1_REV_ID 2 -#define BCM56218R_A2_REV_ID 3 -#define BCM56219R_DEVICE_ID 0xB21B -#define BCM56219R_A0_REV_ID 1 -#define BCM56219R_A1_REV_ID 2 -#define BCM56219R_A2_REV_ID 3 -#define BCM56214_DEVICE_ID 0xB214 -#define BCM56214_A0_REV_ID 1 -#define BCM56214_A1_REV_ID 2 -#define BCM56214_A2_REV_ID 3 -#define BCM56215_DEVICE_ID 0xB215 -#define BCM56215_A0_REV_ID 1 -#define BCM56215_A1_REV_ID 2 -#define BCM56215_A2_REV_ID 3 -#define BCM56214R_DEVICE_ID 0xB21C -#define BCM56214R_A0_REV_ID 1 -#define BCM56214R_A1_REV_ID 2 -#define BCM56214R_A2_REV_ID 3 -#define BCM56215R_DEVICE_ID 0xB21D -#define BCM56215R_A0_REV_ID 1 -#define BCM56215R_A1_REV_ID 2 -#define BCM56215R_A2_REV_ID 3 -#define BCM56216_DEVICE_ID 0xB216 -#define BCM56216_A0_REV_ID 1 -#define BCM56216_A1_REV_ID 2 -#define BCM56216_A2_REV_ID 3 -#define BCM56217_DEVICE_ID 0xB217 -#define BCM56217_A0_REV_ID 1 -#define BCM56217_A1_REV_ID 2 -#define BCM56217_A2_REV_ID 3 -#define BCM56212_DEVICE_ID 0xB212 -#define BCM56212_A0_REV_ID 1 -#define BCM56212_A1_REV_ID 2 -#define BCM56212_A2_REV_ID 3 -#define BCM56213_DEVICE_ID 0xB213 -#define BCM56213_A0_REV_ID 1 -#define BCM56213_A1_REV_ID 2 -#define BCM56213_A2_REV_ID 3 -#define BCM53718_DEVICE_ID 0xC71A -#define BCM53718_A0_REV_ID 1 -#define BCM53718_A1_REV_ID 2 -#define BCM53718_A2_REV_ID 3 -#define BCM53714_DEVICE_ID 0xC71B -#define BCM53714_A0_REV_ID 1 -#define BCM53714_A1_REV_ID 2 -#define BCM53714_A2_REV_ID 3 -#define BCM53716_DEVICE_ID 0xC716 -#define BCM53716_A0_REV_ID 1 -#define BCM53716_A1_REV_ID 2 -#define BCM53716_A2_REV_ID 3 -#define BCM56018_DEVICE_ID 0xB018 -#define BCM56018_A0_REV_ID 1 -#define BCM56018_A1_REV_ID 2 -#define BCM56018_A2_REV_ID 3 -#define BCM56014_DEVICE_ID 0xB014 -#define BCM56014_A0_REV_ID 1 -#define BCM56014_A1_REV_ID 2 -#define BCM56014_A2_REV_ID 3 - -#define BCM56510_DEVICE_ID 0xb510 -#define BCM56510_A0_REV_ID 1 -#define BCM56511_DEVICE_ID 0xb511 -#define BCM56511_A0_REV_ID 1 -#define BCM56512_DEVICE_ID 0xb512 -#define BCM56512_A0_REV_ID 1 -#define BCM56513_DEVICE_ID 0xb513 -#define BCM56513_A0_REV_ID 1 -#define BCM56514_DEVICE_ID 0xb514 -#define BCM56514_A0_REV_ID 1 -#define BCM56516_DEVICE_ID 0xb516 -#define BCM56516_A0_REV_ID 1 -#define BCM56517_DEVICE_ID 0xb517 -#define BCM56517_A0_REV_ID 1 -#define BCM56518_DEVICE_ID 0xb518 -#define BCM56518_A0_REV_ID 1 -#define BCM56519_DEVICE_ID 0xb519 -#define BCM56519_A0_REV_ID 1 - -#define BCM56620_DEVICE_ID 0xb620 -#define BCM56620_A0_REV_ID 1 -#define BCM56620_A1_REV_ID 2 -#define BCM56620_B0_REV_ID 0x11 -#define BCM56620_B1_REV_ID 0x12 -#define BCM56620_B2_REV_ID 0x13 -#define BCM56624_DEVICE_ID 0xb624 -#define BCM56624_A0_REV_ID 1 -#define BCM56624_A1_REV_ID 2 -#define BCM56624_B0_REV_ID 0x11 -#define BCM56624_B1_REV_ID 0x12 -#define BCM56624_B2_REV_ID 0x13 -#define BCM56626_DEVICE_ID 0xb626 -#define BCM56626_A0_REV_ID 1 -#define BCM56626_A1_REV_ID 2 -#define BCM56626_B0_REV_ID 0x11 -#define BCM56626_B1_REV_ID 0x12 -#define BCM56626_B2_REV_ID 0x13 -#define BCM56628_DEVICE_ID 0xb628 -#define BCM56628_A0_REV_ID 1 -#define BCM56628_A1_REV_ID 2 -#define BCM56628_B0_REV_ID 0x11 -#define BCM56628_B1_REV_ID 0x12 -#define BCM56628_B2_REV_ID 0x13 -#define BCM56629_DEVICE_ID 0xb629 -#define BCM56629_A0_REV_ID 1 -#define BCM56629_A1_REV_ID 2 -#define BCM56629_B0_REV_ID 0x11 -#define BCM56629_B1_REV_ID 0x12 -#define BCM56629_B2_REV_ID 0x13 - -#define BCM56680_DEVICE_ID 0xb680 -#define BCM56680_A0_REV_ID 1 -#define BCM56680_A1_REV_ID 2 -#define BCM56680_B0_REV_ID 0x11 -#define BCM56680_B1_REV_ID 0x12 -#define BCM56680_B2_REV_ID 0x13 -#define BCM56684_DEVICE_ID 0xb684 -#define BCM56684_A0_REV_ID 1 -#define BCM56684_A1_REV_ID 2 -#define BCM56684_B0_REV_ID 0x11 -#define BCM56684_B1_REV_ID 0x12 -#define BCM56684_B2_REV_ID 0x13 -#define BCM56686_DEVICE_ID 0xb686 -#define BCM56686_B0_REV_ID 0x11 -#define BCM56686_B1_REV_ID 0x12 -#define BCM56686_B2_REV_ID 0x13 - -#define BCM56820_DEVICE_ID 0xb820 -#define BCM56820_A0_REV_ID 1 -#define BCM56820_B0_REV_ID 0x11 -#define BCM56821_DEVICE_ID 0xb821 -#define BCM56821_A0_REV_ID 1 -#define BCM56821_B0_REV_ID 0x11 -#define BCM56822_DEVICE_ID 0xb822 -#define BCM56822_A0_REV_ID 1 -#define BCM56822_B0_REV_ID 0x11 -#define BCM56823_DEVICE_ID 0xb823 -#define BCM56823_A0_REV_ID 1 -#define BCM56823_B0_REV_ID 0x11 -#define BCM56825_DEVICE_ID 0xb825 -#define BCM56825_B0_REV_ID 0x11 - -#define BCM56720_DEVICE_ID 0xb720 -#define BCM56720_A0_REV_ID 1 -#define BCM56720_B0_REV_ID 0x11 -#define BCM56721_DEVICE_ID 0xb721 -#define BCM56721_A0_REV_ID 1 -#define BCM56721_B0_REV_ID 0x11 - -#define BCM56725_DEVICE_ID 0xb725 -#define BCM56725_A0_REV_ID 1 -#define BCM56725_B0_REV_ID 0x11 - -#define BCM56630_DEVICE_ID 0xb630 -#define BCM56630_A0_REV_ID 1 -#define BCM56630_B0_REV_ID 0x11 -#define BCM56634_DEVICE_ID 0xb634 -#define BCM56634_A0_REV_ID 1 -#define BCM56634_B0_REV_ID 0x11 -#define BCM56636_DEVICE_ID 0xb636 -#define BCM56636_A0_REV_ID 1 -#define BCM56636_B0_REV_ID 0x11 -#define BCM56638_DEVICE_ID 0xb638 -#define BCM56638_A0_REV_ID 1 -#define BCM56638_B0_REV_ID 0x11 -#define BCM56639_DEVICE_ID 0xb639 -#define BCM56639_A0_REV_ID 1 -#define BCM56639_B0_REV_ID 0x11 - -#define BCM56685_DEVICE_ID 0xb685 -#define BCM56685_A0_REV_ID 1 -#define BCM56685_B0_REV_ID 0x11 -#define BCM56689_DEVICE_ID 0xb689 -#define BCM56689_A0_REV_ID 1 -#define BCM56689_B0_REV_ID 0x11 - -#define BCM56520_DEVICE_ID 0xb520 -#define BCM56520_A0_REV_ID 1 -#define BCM56520_B0_REV_ID 0x11 -#define BCM56521_DEVICE_ID 0xb521 -#define BCM56521_A0_REV_ID 1 -#define BCM56521_B0_REV_ID 0x11 -#define BCM56522_DEVICE_ID 0xb522 -#define BCM56522_A0_REV_ID 1 -#define BCM56522_B0_REV_ID 0x11 -#define BCM56524_DEVICE_ID 0xb524 -#define BCM56524_A0_REV_ID 1 -#define BCM56524_B0_REV_ID 0x11 -#define BCM56526_DEVICE_ID 0xb526 -#define BCM56526_A0_REV_ID 1 -#define BCM56526_B0_REV_ID 0x11 - -#define BCM56534_DEVICE_ID 0xb534 -#define BCM56534_B0_REV_ID 0x11 -#define BCM56538_DEVICE_ID 0xb538 -#define BCM56538_B0_REV_ID 0x11 - -#define BCM56331_DEVICE_ID 0xb331 -#define BCM56331_A0_REV_ID 1 -#define BCM56331_B0_REV_ID 0x11 -#define BCM56331_B1_REV_ID 0x12 -#define BCM56333_DEVICE_ID 0xb333 -#define BCM56333_A0_REV_ID 1 -#define BCM56333_B0_REV_ID 0x11 -#define BCM56333_B1_REV_ID 0x12 -#define BCM56334_DEVICE_ID 0xb334 -#define BCM56334_A0_REV_ID 1 -#define BCM56334_B0_REV_ID 0x11 -#define BCM56334_B1_REV_ID 0x12 -#define BCM56338_DEVICE_ID 0xb338 -#define BCM56338_A0_REV_ID 1 -#define BCM56338_B0_REV_ID 0x11 -#define BCM56338_B1_REV_ID 0x12 - -#define BCM56320_DEVICE_ID 0xb320 -#define BCM56320_A0_REV_ID 1 -#define BCM56320_B0_REV_ID 0x11 -#define BCM56320_B1_REV_ID 0x12 -#define BCM56321_DEVICE_ID 0xb321 -#define BCM56321_A0_REV_ID 1 -#define BCM56321_B0_REV_ID 0x11 -#define BCM56321_B1_REV_ID 0x12 - - -#define BCM56548H_DEVICE_ID 0xB54A -#define BCM56548H_A0_REV_ID 1 -#define BCM56548_DEVICE_ID 0xb548 -#define BCM56548_A0_REV_ID 1 -#define BCM56547_DEVICE_ID 0xb547 -#define BCM56547_A0_REV_ID 1 - -#define BCM56346_DEVICE_ID 0xb346 -#define BCM56346_A0_REV_ID 1 -#define BCM56345_DEVICE_ID 0xb345 -#define BCM56345_A0_REV_ID 1 -#define BCM56344_DEVICE_ID 0xb344 -#define BCM56344_A0_REV_ID 1 -#define BCM56342_DEVICE_ID 0xb342 -#define BCM56342_A0_REV_ID 1 -#define BCM56340_DEVICE_ID 0xb340 -#define BCM56340_A0_REV_ID 1 - -#define BCM56049_DEVICE_ID 0xb049 -#define BCM56049_A0_REV_ID 1 -#define BCM56048_DEVICE_ID 0xb048 -#define BCM56048_A0_REV_ID 1 -#define BCM56047_DEVICE_ID 0xb047 -#define BCM56047_A0_REV_ID 1 - -#define BCM56042_DEVICE_ID 0xb042 -#define BCM56042_A0_REV_ID 1 -#define BCM56041_DEVICE_ID 0xb041 -#define BCM56041_A0_REV_ID 1 -#define BCM56040_DEVICE_ID 0xb040 -#define BCM56040_A0_REV_ID 1 - -#define BCM56132_DEVICE_ID 0xb132 -#define BCM56132_A0_REV_ID 1 -#define BCM56132_B0_REV_ID 0x11 -#define BCM56132_B1_REV_ID 0x12 -#define BCM56134_DEVICE_ID 0xb134 -#define BCM56134_A0_REV_ID 1 -#define BCM56134_B0_REV_ID 0x11 -#define BCM56134_B1_REV_ID 0x12 - -#define BCM56230_DEVICE_ID 0xb230 -#define BCM56230_B1_REV_ID 0x12 -#define BCM56231_DEVICE_ID 0xb231 -#define BCM56231_B1_REV_ID 0x12 - -#define BCM56140_DEVICE_ID 0xb140 -#define BCM56140_A0_REV_ID 1 -#define BCM56142_DEVICE_ID 0xb142 -#define BCM56142_A0_REV_ID 1 -#define BCM56143_DEVICE_ID 0xb143 -#define BCM56143_A0_REV_ID 1 -#define BCM56144_DEVICE_ID 0xb144 -#define BCM56144_A0_REV_ID 1 -#define BCM56146_DEVICE_ID 0xb146 -#define BCM56146_A0_REV_ID 1 -#define BCM56147_DEVICE_ID 0xb147 -#define BCM56147_A0_REV_ID 1 -#define BCM56149_DEVICE_ID 0xb149 -#define BCM56149_A0_REV_ID 1 - -#define BCM56840_DEVICE_ID 0xb840 -#define BCM56840_A0_REV_ID 1 -#define BCM56840_A1_REV_ID 2 -#define BCM56840_A2_REV_ID 3 -#define BCM56840_A3_REV_ID 4 -#define BCM56840_A4_REV_ID 5 -#define BCM56840_B0_REV_ID 0x11 -#define BCM56840_B1_REV_ID 0x12 -#define BCM56841_DEVICE_ID 0xb841 -#define BCM56841_A0_REV_ID 1 -#define BCM56841_A1_REV_ID 2 -#define BCM56841_A2_REV_ID 3 -#define BCM56841_A3_REV_ID 4 -#define BCM56841_A4_REV_ID 5 -#define BCM56841_B0_REV_ID 0x11 -#define BCM56841_B1_REV_ID 0x12 -#define BCM56843_DEVICE_ID 0xb843 -#define BCM56843_A0_REV_ID 1 -#define BCM56843_A1_REV_ID 2 -#define BCM56843_A2_REV_ID 3 -#define BCM56843_A3_REV_ID 4 -#define BCM56843_A4_REV_ID 5 -#define BCM56843_B0_REV_ID 0x11 -#define BCM56843_B1_REV_ID 0x12 -#define BCM56845_DEVICE_ID 0xb845 -#define BCM56845_A0_REV_ID 1 -#define BCM56845_A1_REV_ID 2 -#define BCM56845_A2_REV_ID 3 -#define BCM56845_A3_REV_ID 4 -#define BCM56845_A4_REV_ID 5 -#define BCM56845_B0_REV_ID 0x11 -#define BCM56845_B1_REV_ID 0x12 - -#define BCM56743_DEVICE_ID 0xb743 -#define BCM56743_A0_REV_ID 1 -#define BCM56743_A1_REV_ID 2 -#define BCM56743_A2_REV_ID 3 -#define BCM56743_A3_REV_ID 4 -#define BCM56743_A4_REV_ID 5 -#define BCM56743_B0_REV_ID 0x11 -#define BCM56743_B1_REV_ID 0x12 -#define BCM56745_DEVICE_ID 0xb745 -#define BCM56745_A0_REV_ID 1 -#define BCM56745_A1_REV_ID 2 -#define BCM56745_A2_REV_ID 3 -#define BCM56745_A3_REV_ID 4 -#define BCM56745_A4_REV_ID 5 -#define BCM56745_B0_REV_ID 0x11 -#define BCM56745_B1_REV_ID 0x12 - -#define BCM56260_DEVICE_ID 0xb260 -#define BCM56260_A0_REV_ID 1 -#define BCM56260_B0_REV_ID 0x11 -#define BCM56261_DEVICE_ID 0xb261 -#define BCM56261_A0_REV_ID 1 -#define BCM56261_B0_REV_ID 0x11 -#define BCM56262_DEVICE_ID 0xb262 -#define BCM56262_A0_REV_ID 1 -#define BCM56262_B0_REV_ID 0x11 -#define BCM56263_DEVICE_ID 0xb263 -#define BCM56263_A0_REV_ID 1 -#define BCM56263_B0_REV_ID 0x11 - -#define BCM56265_DEVICE_ID 0xb265 -#define BCM56265_A0_REV_ID 1 -#define BCM56265_B0_REV_ID 0x11 -#define BCM56266_DEVICE_ID 0xb266 -#define BCM56266_A0_REV_ID 1 -#define BCM56266_B0_REV_ID 0x11 -#define BCM56267_DEVICE_ID 0xb267 -#define BCM56267_A0_REV_ID 1 -#define BCM56267_B0_REV_ID 0x11 -#define BCM56268_DEVICE_ID 0xb268 -#define BCM56268_A0_REV_ID 1 -#define BCM56268_B0_REV_ID 0x11 - -#define BCM56233_DEVICE_ID 0xb233 -#define BCM56233_B0_REV_ID 0x11 - -#define BCM56460_DEVICE_ID 0xb460 -#define BCM56460_A0_REV_ID 1 -#define BCM56460_B0_REV_ID 0x11 -#define BCM56461_DEVICE_ID 0xb461 -#define BCM56461_A0_REV_ID 1 -#define BCM56461_B0_REV_ID 0x11 -#define BCM56462_DEVICE_ID 0xb462 -#define BCM56462_A0_REV_ID 1 -#define BCM56462_B0_REV_ID 0x11 -#define BCM56463_DEVICE_ID 0xb463 -#define BCM56463_A0_REV_ID 1 -#define BCM56463_B0_REV_ID 0x11 - -#define BCM56465_DEVICE_ID 0xb465 -#define BCM56465_A0_REV_ID 1 -#define BCM56465_B0_REV_ID 0x11 -#define BCM56466_DEVICE_ID 0xb466 -#define BCM56466_A0_REV_ID 1 -#define BCM56466_B0_REV_ID 0x11 -#define BCM56467_DEVICE_ID 0xb467 -#define BCM56467_A0_REV_ID 1 -#define BCM56467_B0_REV_ID 0x11 -#define BCM56468_DEVICE_ID 0xb468 -#define BCM56468_A0_REV_ID 1 -#define BCM56468_B0_REV_ID 0x11 - -#define BCM56270_DEVICE_ID 0xb270 -#define BCM56270_A0_REV_ID 1 -#define BCM56271_DEVICE_ID 0xb271 -#define BCM56271_A0_REV_ID 1 -#define BCM56272_DEVICE_ID 0xb272 -#define BCM56272_A0_REV_ID 1 - -#define BCM53460_DEVICE_ID 0x8460 -#define BCM53460_A0_REV_ID 1 -#define BCM53461_DEVICE_ID 0x8461 -#define BCM53461_A0_REV_ID 1 - -#define BCM56842_DEVICE_ID 0xb842 -#define BCM56842_A0_REV_ID 1 -#define BCM56842_A1_REV_ID 2 -#define BCM56844_DEVICE_ID 0xb844 -#define BCM56844_A0_REV_ID 1 -#define BCM56844_A1_REV_ID 2 -#define BCM56846_DEVICE_ID 0xb846 -#define BCM56846_A0_REV_ID 1 -#define BCM56846_A1_REV_ID 2 -#define BCM56549_DEVICE_ID 0xb549 -#define BCM56549_A0_REV_ID 1 -#define BCM56549_A1_REV_ID 2 -#define BCM56053_DEVICE_ID 0xb053 -#define BCM56053_A0_REV_ID 1 -#define BCM56053_A1_REV_ID 2 -#define BCM56831_DEVICE_ID 0xb831 -#define BCM56831_A0_REV_ID 1 -#define BCM56831_A1_REV_ID 2 -#define BCM56835_DEVICE_ID 0xb835 -#define BCM56835_A0_REV_ID 1 -#define BCM56835_A1_REV_ID 2 -#define BCM56838_DEVICE_ID 0xb838 -#define BCM56838_A0_REV_ID 1 -#define BCM56838_A1_REV_ID 2 -#define BCM56847_DEVICE_ID 0xb847 -#define BCM56847_A0_REV_ID 1 -#define BCM56847_A1_REV_ID 2 -#define BCM56847_A2_REV_ID 3 -#define BCM56847_A3_REV_ID 4 -#define BCM56847_A4_REV_ID 5 -#define BCM56847_B0_REV_ID 0x11 -#define BCM56847_B1_REV_ID 0x12 -#define BCM56849_DEVICE_ID 0xb849 -#define BCM56849_A0_REV_ID 1 -#define BCM56849_A1_REV_ID 2 - -#define BCM56742_DEVICE_ID 0xb742 -#define BCM56742_A0_REV_ID 1 -#define BCM56742_A1_REV_ID 2 -#define BCM56742_A2_REV_ID 3 -#define BCM56744_DEVICE_ID 0xb744 -#define BCM56744_A0_REV_ID 1 -#define BCM56744_A1_REV_ID 2 -#define BCM56746_DEVICE_ID 0xb746 -#define BCM56746_A0_REV_ID 1 -#define BCM56746_A1_REV_ID 2 - - -#define BCM56640_DEVICE_ID 0xb640 -#define BCM56640_A0_REV_ID 1 -#define BCM56640_A1_REV_ID 2 -#define BCM56640_B0_REV_ID 0x11 -#define BCM56643_DEVICE_ID 0xb643 -#define BCM56643_A0_REV_ID 1 -#define BCM56643_A1_REV_ID 2 -#define BCM56643_B0_REV_ID 0x11 -#define BCM56644_DEVICE_ID 0xb644 -#define BCM56644_A0_REV_ID 1 -#define BCM56644_A1_REV_ID 2 -#define BCM56644_B0_REV_ID 0x11 -#define BCM56648_DEVICE_ID 0xb648 -#define BCM56648_A0_REV_ID 1 -#define BCM56648_A1_REV_ID 2 -#define BCM56648_B0_REV_ID 0x11 -#define BCM56649_DEVICE_ID 0xb649 -#define BCM56649_A0_REV_ID 1 -#define BCM56649_A1_REV_ID 2 -#define BCM56649_B0_REV_ID 0x11 - -#define BCM56540_DEVICE_ID 0xb540 -#define BCM56540_A0_REV_ID 1 -#define BCM56540_A1_REV_ID 2 -#define BCM56540_B0_REV_ID 0x11 -#define BCM56541_DEVICE_ID 0xb541 -#define BCM56541_A0_REV_ID 1 -#define BCM56541_A1_REV_ID 2 -#define BCM56541_B0_REV_ID 0x11 -#define BCM56542_DEVICE_ID 0xb542 -#define BCM56542_A0_REV_ID 1 -#define BCM56542_A1_REV_ID 2 -#define BCM56542_B0_REV_ID 0x11 -#define BCM56543_DEVICE_ID 0xb543 -#define BCM56543_A0_REV_ID 1 -#define BCM56543_A1_REV_ID 2 -#define BCM56543_B0_REV_ID 0x11 -#define BCM56544_DEVICE_ID 0xb544 -#define BCM56544_A0_REV_ID 1 -#define BCM56544_A1_REV_ID 2 -#define BCM56544_B0_REV_ID 0x11 - -#define BCM56545_DEVICE_ID 0xb545 -#define BCM56545_A0_REV_ID 1 -#define BCM56545_A1_REV_ID 2 -#define BCM56545_B0_REV_ID 0x11 -#define BCM56546_DEVICE_ID 0xb546 -#define BCM56546_A0_REV_ID 1 -#define BCM56546_A1_REV_ID 2 -#define BCM56546_B0_REV_ID 0x11 - -#define BCM56044_DEVICE_ID 0xb044 -#define BCM56044_B0_REV_ID 0x11 -#define BCM56045_DEVICE_ID 0xb045 -#define BCM56045_A0_REV_ID 1 -#define BCM56045_A1_REV_ID 2 -#define BCM56045_B0_REV_ID 0x11 -#define BCM56046_DEVICE_ID 0xb046 -#define BCM56046_A0_REV_ID 1 -#define BCM56046_A1_REV_ID 2 -#define BCM56046_B0_REV_ID 0x11 - - -#define BCM56440_DEVICE_ID 0xb440 -#define BCM56440_A0_REV_ID 1 -#define BCM56440_B0_REV_ID 0x11 -#define BCM56441_DEVICE_ID 0xb441 -#define BCM56441_A0_REV_ID 1 -#define BCM56441_B0_REV_ID 0x11 -#define BCM56442_DEVICE_ID 0xb442 -#define BCM56442_A0_REV_ID 1 -#define BCM56442_B0_REV_ID 0x11 -#define BCM56443_DEVICE_ID 0xb443 -#define BCM56443_A0_REV_ID 1 -#define BCM56443_B0_REV_ID 0x11 -#define BCM56445_DEVICE_ID 0xb445 -#define BCM56445_A0_REV_ID 1 -#define BCM56445_B0_REV_ID 0x11 -#define BCM56446_DEVICE_ID 0xb446 -#define BCM56446_A0_REV_ID 1 -#define BCM56446_B0_REV_ID 0x11 -#define BCM56447_DEVICE_ID 0xb447 -#define BCM56447_A0_REV_ID 1 -#define BCM56447_B0_REV_ID 0x11 -#define BCM56448_DEVICE_ID 0xb448 -#define BCM56448_A0_REV_ID 1 -#define BCM56448_B0_REV_ID 0x11 -#define BCM56449_DEVICE_ID 0xb449 -#define BCM56449_A0_REV_ID 1 -#define BCM56449_B0_REV_ID 0x11 -#define BCM56240_DEVICE_ID 0xb240 -#define BCM56240_A0_REV_ID 1 -#define BCM56240_B0_REV_ID 0x11 -#define BCM56241_DEVICE_ID 0xb241 -#define BCM56241_A0_REV_ID 1 -#define BCM56241_B0_REV_ID 0x11 -#define BCM56242_DEVICE_ID 0xb242 -#define BCM56242_A0_REV_ID 1 -#define BCM56242_B0_REV_ID 0x11 -#define BCM56243_DEVICE_ID 0xb243 -#define BCM56243_A0_REV_ID 1 -#define BCM56243_B0_REV_ID 0x11 -#define BCM56245_DEVICE_ID 0xb245 -#define BCM56245_A0_REV_ID 1 -#define BCM56245_B0_REV_ID 0x11 -#define BCM56246_DEVICE_ID 0xb246 -#define BCM56246_A0_REV_ID 1 -#define BCM56246_B0_REV_ID 0x11 -#define BCM55440_DEVICE_ID 0xa440 -#define BCM55440_A0_REV_ID 1 -#define BCM55440_B0_REV_ID 0x11 -#define BCM55441_DEVICE_ID 0xa441 -#define BCM55441_A0_REV_ID 1 -#define BCM55441_B0_REV_ID 0x11 - -#define BCM55450_DEVICE_ID 0xa450 -#define BCM55450_A0_REV_ID 1 -#define BCM55450_B0_REV_ID 0x11 -#define BCM55450_B1_REV_ID 0x12 - -#define BCM55455_DEVICE_ID 0xa455 -#define BCM55455_A0_REV_ID 1 -#define BCM55455_B0_REV_ID 0x11 -#define BCM55455_B1_REV_ID 0x12 - -#define BCM56248_DEVICE_ID 0xb248 -#define BCM56248_A0_REV_ID 1 -#define BCM56248_B0_REV_ID 0x11 -#define BCM56248_B1_REV_ID 0x12 - -#define BCM56450_DEVICE_ID 0xb450 -#define BCM56450_A0_REV_ID 1 -#define BCM56450_B0_REV_ID 0x11 -#define BCM56450_B1_REV_ID 0x12 - -#define BCM56452_DEVICE_ID 0xb452 -#define BCM56452_A0_REV_ID 1 -#define BCM56452_B0_REV_ID 0x11 -#define BCM56452_B1_REV_ID 0x12 - -#define BCM56454_DEVICE_ID 0xb454 -#define BCM56454_A0_REV_ID 1 -#define BCM56454_B0_REV_ID 0x11 -#define BCM56454_B1_REV_ID 0x12 - -#define BCM56455_DEVICE_ID 0xb455 -#define BCM56455_A0_REV_ID 1 -#define BCM56455_B0_REV_ID 0x11 -#define BCM56455_B1_REV_ID 0x12 - -#define BCM56456_DEVICE_ID 0xb456 -#define BCM56456_A0_REV_ID 1 -#define BCM56456_B0_REV_ID 0x11 -#define BCM56456_B1_REV_ID 0x12 - -#define BCM56457_DEVICE_ID 0xb457 -#define BCM56457_A0_REV_ID 1 -#define BCM56457_B0_REV_ID 0x11 -#define BCM56457_B1_REV_ID 0x12 - -#define BCM56458_DEVICE_ID 0xb458 -#define BCM56458_A0_REV_ID 1 -#define BCM56458_B0_REV_ID 0x11 -#define BCM56458_B1_REV_ID 0x12 - -#define BCM56850_DEVICE_ID 0xb850 -#define BCM56850_A0_REV_ID 1 -#define BCM56850_A1_REV_ID 2 -#define BCM56850_A2_REV_ID 3 -#define BCM56851_DEVICE_ID 0xb851 -#define BCM56851_A0_REV_ID 1 -#define BCM56851_A1_REV_ID 2 -#define BCM56851_A2_REV_ID 3 -#define BCM56852_DEVICE_ID 0xb852 -#define BCM56852_A0_REV_ID 1 -#define BCM56852_A1_REV_ID 2 -#define BCM56852_A2_REV_ID 3 -#define BCM56853_DEVICE_ID 0xb853 -#define BCM56853_A0_REV_ID 1 -#define BCM56853_A1_REV_ID 2 -#define BCM56853_A2_REV_ID 3 -#define BCM56854_DEVICE_ID 0xb854 -#define BCM56854_A0_REV_ID 1 -#define BCM56854_A1_REV_ID 2 -#define BCM56854_A2_REV_ID 3 -#define BCM56855_DEVICE_ID 0xb855 -#define BCM56855_A0_REV_ID 1 -#define BCM56855_A1_REV_ID 2 -#define BCM56855_A2_REV_ID 3 -#define BCM56834_DEVICE_ID 0xb834 -#define BCM56834_A0_REV_ID 1 -#define BCM56834_A1_REV_ID 2 -#define BCM56834_A2_REV_ID 3 - -#define BCM56860_DEVICE_ID 0xb860 -#define BCM56860_A0_REV_ID 1 -#define BCM56860_A1_REV_ID 2 -#define BCM56861_DEVICE_ID 0xb861 -#define BCM56861_A0_REV_ID 1 -#define BCM56861_A1_REV_ID 2 -#define BCM56862_DEVICE_ID 0xb862 -#define BCM56862_A0_REV_ID 1 -#define BCM56862_A1_REV_ID 2 -#define BCM56864_DEVICE_ID 0xb864 -#define BCM56864_A0_REV_ID 1 -#define BCM56864_A1_REV_ID 2 -#define BCM56865_DEVICE_ID 0xb865 -#define BCM56865_A0_REV_ID 1 -#define BCM56865_A1_REV_ID 2 -#define BCM56866_DEVICE_ID 0xb866 -#define BCM56866_A0_REV_ID 1 -#define BCM56866_A1_REV_ID 2 -#define BCM56867_DEVICE_ID 0xb867 -#define BCM56867_A0_REV_ID 1 -#define BCM56867_A1_REV_ID 2 -#define BCM56868_DEVICE_ID 0xb868 -#define BCM56868_A0_REV_ID 1 -#define BCM56868_A1_REV_ID 2 -#define BCM56832_DEVICE_ID 0xb832 -#define BCM56832_A0_REV_ID 1 -#define BCM56832_A1_REV_ID 2 -#define BCM56833_DEVICE_ID 0xb833 -#define BCM56833_A0_REV_ID 1 -#define BCM56833_A1_REV_ID 2 -#define BCM56836_DEVICE_ID 0xb836 -#define BCM56836_A0_REV_ID 1 -#define BCM56836_A1_REV_ID 2 - - -#define BCM56750_DEVICE_ID 0xb750 -#define BCM56750_A0_REV_ID 1 -#define BCM56750_A1_REV_ID 2 -#define BCM56750_A2_REV_ID 3 - -#define BCM56830_DEVICE_ID 0xb830 -#define BCM56830_A0_REV_ID 1 -#define BCM56830_A1_REV_ID 2 -#define BCM56830_A2_REV_ID 3 - -#define BCM56150_DEVICE_ID 0xb150 -#define BCM56150_A0_REV_ID 1 -#define BCM56151_DEVICE_ID 0xb151 -#define BCM56151_A0_REV_ID 1 -#define BCM56152_DEVICE_ID 0xb152 -#define BCM56152_A0_REV_ID 1 - -#define BCM53342_DEVICE_ID 0x8342 -#define BCM53342_A0_REV_ID 1 -#define BCM53343_DEVICE_ID 0x8343 -#define BCM53343_A0_REV_ID 1 -#define BCM53344_DEVICE_ID 0x8344 -#define BCM53344_A0_REV_ID 1 -#define BCM53346_DEVICE_ID 0x8346 -#define BCM53346_A0_REV_ID 1 -#define BCM53347_DEVICE_ID 0x8347 -#define BCM53347_A0_REV_ID 1 - -#define BCM53333_DEVICE_ID 0x8333 -#define BCM53333_A0_REV_ID 1 -#define BCM53334_DEVICE_ID 0x8334 -#define BCM53334_A0_REV_ID 1 - -#define BCM53393_DEVICE_ID 0x8393 -#define BCM53393_A0_REV_ID 1 -#define BCM53394_DEVICE_ID 0x8394 -#define BCM53394_A0_REV_ID 1 - -#define BCM53400_DEVICE_ID 0x8400 -#define BCM53400_A0_REV_ID 1 -#define BCM56060_DEVICE_ID 0xb060 -#define BCM56060_A0_REV_ID 1 -#define BCM56062_DEVICE_ID 0xb062 -#define BCM56062_A0_REV_ID 1 -#define BCM56063_DEVICE_ID 0xb063 -#define BCM56063_A0_REV_ID 1 -#define BCM56064_DEVICE_ID 0xb064 -#define BCM56064_A0_REV_ID 1 -#define BCM56065_DEVICE_ID 0xb065 -#define BCM56065_A0_REV_ID 1 -#define BCM56066_DEVICE_ID 0xb066 -#define BCM56066_A0_REV_ID 1 -#define BCM53401_DEVICE_ID 0x8401 -#define BCM53411_DEVICE_ID 0x8411 -#define BCM53401_A0_REV_ID 1 -#define BCM53402_DEVICE_ID 0x8402 -#define BCM53412_DEVICE_ID 0x8412 -#define BCM53402_A0_REV_ID 1 -#define BCM53403_DEVICE_ID 0x8403 -#define BCM53413_DEVICE_ID 0x8413 -#define BCM53403_A0_REV_ID 1 -#define BCM53404_DEVICE_ID 0x8404 -#define BCM53414_DEVICE_ID 0x8414 -#define BCM53404_A0_REV_ID 1 -#define BCM53405_DEVICE_ID 0x8405 -#define BCM53415_DEVICE_ID 0x8415 -#define BCM53405_A0_REV_ID 1 -#define BCM53406_DEVICE_ID 0x8406 -#define BCM53416_DEVICE_ID 0x8416 -#define BCM53406_A0_REV_ID 1 -#define BCM53408_DEVICE_ID 0x8408 -#define BCM53418_DEVICE_ID 0x8418 -#define BCM53408_A0_REV_ID 1 -#define BCM53365_DEVICE_ID 0x8365 -#define BCM53365_A0_REV_ID 1 -#define BCM53369_DEVICE_ID 0x8369 -#define BCM53369_A0_REV_ID 1 - -#define BCM53454_DEVICE_ID 0x8454 -#define BCM53455_DEVICE_ID 0x8455 -#define BCM53454_A0_REV_ID 1 -#define BCM53456_DEVICE_ID 0x8456 -#define BCM53457_DEVICE_ID 0x8457 -#define BCM53456_A0_REV_ID 1 - -#define BCM53422_DEVICE_ID 0x8422 -#define BCM53422_A0_REV_ID 1 -#define BCM53424_DEVICE_ID 0x8424 -#define BCM53424_A0_REV_ID 1 -#define BCM53426_DEVICE_ID 0x8426 -#define BCM53426_A0_REV_ID 1 - -#define BCM56960_DEVICE_ID 0xb960 -#define BCM56960_A0_REV_ID 1 -#define BCM56960_B0_REV_ID 0x11 -#define BCM56960_B1_REV_ID 0x12 -#define BCM56961_DEVICE_ID 0xb961 -#define BCM56961_A0_REV_ID 1 -#define BCM56961_B0_REV_ID 0x11 -#define BCM56961_B1_REV_ID 0x12 -#define BCM56962_DEVICE_ID 0xb962 -#define BCM56962_A0_REV_ID 1 -#define BCM56962_B0_REV_ID 0x11 -#define BCM56962_B1_REV_ID 0x12 -#define BCM56963_DEVICE_ID 0xb963 -#define BCM56963_A0_REV_ID 1 -#define BCM56963_B0_REV_ID 0x11 -#define BCM56963_B1_REV_ID 0x12 -#define BCM56930_DEVICE_ID 0xb930 -#define BCM56930_A0_REV_ID 1 -#define BCM56930_B0_REV_ID 0x11 -#define BCM56930_B1_REV_ID 0x12 -#define BCM56930_C0_REV_ID 0x21 -#define BCM56931_DEVICE_ID 0xb931 -#define BCM56931_A0_REV_ID 1 -#define BCM56931_B0_REV_ID 0x11 -#define BCM56931_C0_REV_ID 0x21 -#define BCM56935_DEVICE_ID 0xb935 -#define BCM56935_A0_REV_ID 1 -#define BCM56935_B0_REV_ID 0x11 -#define BCM56935_C0_REV_ID 0x21 -#define BCM56936_DEVICE_ID 0xb936 -#define BCM56936_A0_REV_ID 1 -#define BCM56936_B0_REV_ID 0x11 -#define BCM56936_C0_REV_ID 0x21 -#define BCM56939_DEVICE_ID 0xb939 -#define BCM56939_A0_REV_ID 1 -#define BCM56939_B0_REV_ID 0x11 -#define BCM56939_C0_REV_ID 0x21 - -#define BCM56168_DEVICE_ID 0xb168 -#define BCM56168_A0_REV_ID 1 -#define BCM56168_B0_REV_ID 0x11 -#define BCM56168_B1_REV_ID 0x12 -#define BCM56169_DEVICE_ID 0xb169 -#define BCM56169_A0_REV_ID 1 -#define BCM56169_B0_REV_ID 0x11 -#define BCM56169_B1_REV_ID 0x12 - -#define BCM56980_DEVICE_ID_MASK 0xFFF0 -#define BCM56980_DEVICE_ID 0xb980 -#define BCM56980_A0_REV_ID 1 -#define BCM56980_B0_REV_ID 0x11 -#define BCM56981_DEVICE_ID 0xb981 -#define BCM56981_A0_REV_ID 1 -#define BCM56981_B0_REV_ID 0x11 -#define BCM56982_DEVICE_ID 0xb982 -#define BCM56982_A0_REV_ID 1 -#define BCM56982_B0_REV_ID 0x11 -#define BCM56983_DEVICE_ID 0xb983 -#define BCM56983_A0_REV_ID 1 -#define BCM56983_B0_REV_ID 0x11 -#define BCM56984_DEVICE_ID 0xb984 -#define BCM56984_A0_REV_ID 1 -#define BCM56984_B0_REV_ID 0x11 - -#define BCM56968_DEVICE_ID 0xb968 -#define BCM56968_A0_REV_ID 1 -#define BCM56968_B0_REV_ID 0x11 -#define BCM56968_B1_REV_ID 0x12 - -#define BCM56160_DEVICE_ID 0xb160 -#define BCM56160_A0_REV_ID 1 -#define BCM56160_B0_REV_ID 0x11 -#define BCM56162_DEVICE_ID 0xb162 -#define BCM56162_A0_REV_ID 1 -#define BCM56162_B0_REV_ID 0x11 - -#define BCM56163_DEVICE_ID 0xb163 -#define BCM56163_A0_REV_ID 1 -#define BCM56163_B0_REV_ID 0x11 -#define BCM56164_DEVICE_ID 0xb164 -#define BCM56164_A0_REV_ID 1 -#define BCM56164_B0_REV_ID 0x11 -#define BCM56166_DEVICE_ID 0xb166 -#define BCM56166_A0_REV_ID 1 -#define BCM56166_B0_REV_ID 0x11 - -#define BCM56273_DEVICE_ID 0xb273 -#define BCM56273_A0_REV_ID 1 -#define BCM56273_A1_REV_ID 2 - -#define BCM56274_DEVICE_ID 0xb274 -#define BCM56274_A0_REV_ID 1 -#define BCM56274_A1_REV_ID 2 - -#define BCM56275_DEVICE_ID 0xb275 -#define BCM56275_A0_REV_ID 1 -#define BCM56275_A1_REV_ID 2 - -#define BCM56276_DEVICE_ID 0xb276 -#define BCM56276_A0_REV_ID 1 -#define BCM56276_A1_REV_ID 2 - -#define BCM56277_DEVICE_ID 0xb277 -#define BCM56277_A0_REV_ID 1 -#define BCM56277_A1_REV_ID 2 - -#define BCM56278_DEVICE_ID 0xb278 -#define BCM56278_A0_REV_ID 1 -#define BCM56278_A1_REV_ID 2 - -#define BCM56279_DEVICE_ID 0xb279 -#define BCM56279_A1_REV_ID 2 - -#define BCM56575_DEVICE_ID 0xb575 -#define BCM56575_A1_REV_ID 2 - -#define BCM56175_DEVICE_ID 0xb175 -#define BCM56175_A1_REV_ID 2 - -#define BCM56176_DEVICE_ID 0xb176 -#define BCM56176_A1_REV_ID 2 - -#define BCM53440_DEVICE_ID 0x8440 -#define BCM53440_A0_REV_ID 1 -#define BCM53440_B0_REV_ID 0x11 -#define BCM53442_DEVICE_ID 0x8442 -#define BCM53442_A0_REV_ID 1 -#define BCM53442_B0_REV_ID 0x11 -#define BCM53443_DEVICE_ID 0x8443 -#define BCM53443_A0_REV_ID 1 -#define BCM53443_B0_REV_ID 0x11 - -#define BCM53434_DEVICE_ID 0x8434 -#define BCM53434_A0_REV_ID 1 -#define BCM53434_B0_REV_ID 0x11 - -#define BCM56560_DEVICE_ID 0xb560 -#define BCM56560_A0_REV_ID 1 -#define BCM56560_B0_REV_ID 0x11 - -#define BCM56561_DEVICE_ID 0xb561 -#define BCM56561_A0_REV_ID 1 -#define BCM56561_B0_REV_ID 0x11 - -#define BCM56562_DEVICE_ID 0xb562 -#define BCM56562_A0_REV_ID 1 -#define BCM56562_B0_REV_ID 0x11 - -#define BCM56670_DEVICE_ID 0xb670 -#define BCM56670_A0_REV_ID 1 -#define BCM56670_B0_REV_ID 0x11 -#define BCM56670_C0_REV_ID 0x21 - - -#define BCM56671_DEVICE_ID 0xb671 -#define BCM56671_A0_REV_ID 1 -#define BCM56671_B0_REV_ID 0x11 -#define BCM56671_C0_REV_ID 0x21 - -#define BCM56672_DEVICE_ID 0xb672 -#define BCM56672_A0_REV_ID 1 -#define BCM56672_B0_REV_ID 0x11 -#define BCM56672_C0_REV_ID 0x21 - -#define BCM56675_DEVICE_ID 0xb675 -#define BCM56675_A0_REV_ID 1 -#define BCM56675_B0_REV_ID 0x11 -#define BCM56675_C0_REV_ID 0x21 - -#define BCM53650_DEVICE_ID 0x8650 -#define BCM53650_A0_REV_ID 1 -#define BCM53650_B0_REV_ID 0x11 -#define BCM53650_C0_REV_ID 0x21 - -#define BCM53651_DEVICE_ID 0x8651 -#define BCM53651_A0_REV_ID 1 -#define BCM53651_B0_REV_ID 0x11 -#define BCM53651_C0_REV_ID 0x21 - -#define BCM53652_DEVICE_ID 0x8652 -#define BCM53652_A0_REV_ID 1 -#define BCM53652_B0_REV_ID 0x11 -#define BCM53652_C0_REV_ID 0x21 - -#define BCM53653_DEVICE_ID 0x8653 -#define BCM53653_A0_REV_ID 1 -#define BCM53653_B0_REV_ID 0x11 -#define BCM53653_C0_REV_ID 0x21 - -#define BCM53654_DEVICE_ID 0x8654 -#define BCM53654_A0_REV_ID 1 -#define BCM53654_B0_REV_ID 0x11 -#define BCM53654_C0_REV_ID 0x21 - -#define BCM56565_DEVICE_ID 0xb565 -#define BCM56565_A0_REV_ID 1 -#define BCM56565_B0_REV_ID 0x11 - -#define BCM56566_DEVICE_ID 0xb566 -#define BCM56566_A0_REV_ID 1 -#define BCM56566_B0_REV_ID 0x11 - -#define BCM56567_DEVICE_ID 0xb567 -#define BCM56567_A0_REV_ID 1 -#define BCM56567_B0_REV_ID 0x11 - -#define BCM56568_DEVICE_ID 0xb568 -#define BCM56568_A0_REV_ID 1 -#define BCM56568_B0_REV_ID 0x11 - -#define BCM56760_DEVICE_ID 0xb760 -#define BCM56760_A0_REV_ID 1 -#define BCM56760_A1_REV_ID 2 -#define BCM56760_B0_REV_ID 0x11 - - -#define BCM56761_DEVICE_ID 0xb761 -#define BCM56761_A0_REV_ID 1 -#define BCM56761_A1_REV_ID 2 -#define BCM56761_B0_REV_ID 0x11 -#define BCM56761_B1_REV_ID 0x12 - -#define BCM56762_DEVICE_ID 0xb762 -#define BCM56762_A0_REV_ID 1 -#define BCM56762_B0_REV_ID 0x11 - -#define BCM56764_DEVICE_ID 0xb764 -#define BCM56764_A0_REV_ID 1 -#define BCM56764_B0_REV_ID 0x11 - -#define BCM56765_DEVICE_ID 0xb765 -#define BCM56765_A0_REV_ID 1 -#define BCM56765_B0_REV_ID 0x11 - -#define BCM56766_DEVICE_ID 0xb766 -#define BCM56766_A0_REV_ID 1 -#define BCM56766_B0_REV_ID 0x11 - -#define BCM56768_DEVICE_ID 0xb768 -#define BCM56768_A0_REV_ID 1 -#define BCM56768_B0_REV_ID 0x11 - -#define BCM56068_DEVICE_ID 0xb068 -#define BCM56068_A0_REV_ID 1 -#define BCM56068_B0_REV_ID 0x11 -#define BCM56068_B1_REV_ID 0x12 - -#define BCM56069_DEVICE_ID 0xb069 -#define BCM56069_A0_REV_ID 1 -#define BCM56069_B0_REV_ID 0x11 - -#define BCM56170_DEVICE_ID 0xb170 -#define BCM56170_A0_REV_ID 1 -#define BCM56170_B0_REV_ID 0x11 -#define BCM56172_DEVICE_ID 0xb172 -#define BCM56172_A0_REV_ID 1 -#define BCM56172_B0_REV_ID 0x11 -#define BCM56174_DEVICE_ID 0xb174 -#define BCM56174_A0_REV_ID 1 -#define BCM56174_B0_REV_ID 0x11 - -#define BCM53570_DEVICE_ID 0x8570 -#define BCM53570_A0_REV_ID 1 -#define BCM53570_B0_REV_ID 0x11 -#define BCM53575_DEVICE_ID 0x8575 -#define BCM53575_A0_REV_ID 1 -#define BCM53575_B0_REV_ID 0x11 - -#define BCM56070_DEVICE_ID 0xb070 -#define BCM56070_A0_REV_ID 1 -#define BCM56071_DEVICE_ID 0xb071 -#define BCM56071_A0_REV_ID 1 -#define BCM56072_DEVICE_ID 0xb072 -#define BCM56072_A0_REV_ID 1 - - -#define BCM56965_DEVICE_ID 0xb965 -#define BCM56965_A0_REV_ID 1 -#define BCM56965_A1_REV_ID 2 -#define BCM56969_DEVICE_ID 0xb969 -#define BCM56969_A0_REV_ID 1 -#define BCM56966_DEVICE_ID 0xb966 -#define BCM56966_A0_REV_ID 1 -#define BCM56967_DEVICE_ID 0xb967 -#define BCM56967_A0_REV_ID 1 - -#define BCM56970_DEVICE_ID 0xb970 -#define BCM56970_A0_REV_ID 1 -#define BCM56970_B0_REV_ID 0x11 -#define BCM56971_DEVICE_ID 0xb971 -#define BCM56971_A0_REV_ID 1 -#define BCM56971_B0_REV_ID 0x11 -#define BCM56972_DEVICE_ID 0xb972 -#define BCM56972_A0_REV_ID 1 -#define BCM56972_B0_REV_ID 0x11 -#define BCM56974_DEVICE_ID 0xb974 -#define BCM56974_A0_REV_ID 1 -#define BCM56974_B0_REV_ID 0x11 -#define BCM56975_DEVICE_ID 0xb975 -#define BCM56975_A0_REV_ID 1 -#define BCM56975_B0_REV_ID 0x11 - -#define BCM56870_DEVICE_ID 0xb870 -#define BCM56870_A0_REV_ID 1 -#define BCM56873_DEVICE_ID 0xb873 -#define BCM56873_A0_REV_ID 1 - -#define BCM56370_DEVICE_ID 0xb370 -#define BCM56370_A0_REV_ID 1 -#define BCM56370_A1_REV_ID 0x02 -#define BCM56370_A2_REV_ID 0x03 - -#define BCM56371_DEVICE_ID 0xb371 -#define BCM56371_A0_REV_ID 1 -#define BCM56371_A1_REV_ID 0x02 -#define BCM56371_A2_REV_ID 0x03 - -#define BCM56372_DEVICE_ID 0xb372 -#define BCM56372_A0_REV_ID 1 -#define BCM56372_A1_REV_ID 0x02 -#define BCM56372_A2_REV_ID 0x03 - -#define BCM56374_DEVICE_ID 0xb374 -#define BCM56374_A0_REV_ID 1 -#define BCM56374_A1_REV_ID 0x02 -#define BCM56374_A2_REV_ID 0x03 - -#define BCM56375_DEVICE_ID 0xb375 -#define BCM56375_A0_REV_ID 1 -#define BCM56375_A1_REV_ID 0x02 -#define BCM56375_A2_REV_ID 0x03 - -#define BCM56376_DEVICE_ID 0xb376 -#define BCM56376_A0_REV_ID 1 -#define BCM56376_A1_REV_ID 0x02 -#define BCM56376_A2_REV_ID 0x03 - -#define BCM56377_DEVICE_ID 0xb377 -#define BCM56377_A0_REV_ID 1 -#define BCM56377_A1_REV_ID 0x02 -#define BCM56377_A2_REV_ID 0x03 - -#define BCM56577_DEVICE_ID 0xb577 -#define BCM56577_A0_REV_ID 1 -#define BCM56577_A1_REV_ID 0x02 -#define BCM56577_A2_REV_ID 0x03 - -#define BCM56578_DEVICE_ID 0xb578 -#define BCM56578_A0_REV_ID 1 -#define BCM56578_A1_REV_ID 0x02 -#define BCM56578_A2_REV_ID 0x03 - -#define BCM56579_DEVICE_ID 0xb579 -#define BCM56579_A0_REV_ID 1 -#define BCM56579_A1_REV_ID 0x02 -#define BCM56579_A2_REV_ID 0x03 - -#define BCM56770_DEVICE_ID 0xb770 -#define BCM56770_A0_REV_ID 1 - -#define BCM56771_DEVICE_ID 0xb771 -#define BCM56771_A0_REV_ID 1 - -#define BCM56470_DEVICE_ID 0xb470 -#define BCM56470_A0_REV_ID 1 -#define BCM56471_DEVICE_ID 0xb471 -#define BCM56471_A0_REV_ID 1 -#define BCM56472_DEVICE_ID 0xb472 -#define BCM56472_A0_REV_ID 1 -#define BCM56475_DEVICE_ID 0xb475 -#define BCM56475_A0_REV_ID 1 -#define BCM56474_DEVICE_ID 0xb474 -#define BCM56474_A0_REV_ID 1 - -#define BCM56390_DEVICE_ID 0xb390 -#define BCM56390_A0_REV_ID 1 -#define BCM56391_DEVICE_ID 0xb391 -#define BCM56391_A0_REV_ID 1 -#define BCM56392_DEVICE_ID 0xb392 -#define BCM56392_A0_REV_ID 1 - -#define BCM53540_DEVICE_ID 0x8540 -#define BCM53540_A0_REV_ID 1 -#define BCM53547_DEVICE_ID 0x8547 -#define BCM53547_A0_REV_ID 1 -#define BCM53548_DEVICE_ID 0x8548 -#define BCM53548_A0_REV_ID 1 -#define BCM53549_DEVICE_ID 0x8549 -#define BCM53549_A0_REV_ID 1 - -#define BCM53642_DEVICE_ID 0x8642 -#define BCM53642_A0_REV_ID 1 - -#define BCM5665_DEVICE_ID 0x5665 -#define BCM5665_A0_REV_ID 1 -#define BCM5665_B0_REV_ID 0x11 - - -#define BCM5655_DEVICE_ID 0x5655 -#define BCM5655_A0_REV_ID 1 -#define BCM5655_B0_REV_ID 0x11 - - -#define BCM5650_DEVICE_ID 0x5650 -#define BCM5650_A0_REV_ID 1 -#define BCM5650_B0_REV_ID 0x11 -#define BCM5650_C0_REV_ID 0x21 - -#define BROADCOM_PHYID_HIGH 0x0040 - -#define ARAD_DEVICE_ID 0x8650 -#define ARAD_A0_REV_ID 0x0000 -#define ARAD_B0_REV_ID 0x0011 -#define ARAD_B1_REV_ID 0x0012 -#define BCM88770_DEVICE_ID 0x8770 -#define BCM88770_A1_REV_ID 0x0002 -#define BCM88773_DEVICE_ID 0x8773 -#define BCM88773_A1_REV_ID 0x0002 -#define BCM88774_DEVICE_ID 0x8774 -#define BCM88774_A1_REV_ID 0x0002 -#define BCM88775_DEVICE_ID 0x8775 -#define BCM88775_A1_REV_ID 0x0002 -#define BCM88776_DEVICE_ID 0x8776 -#define BCM88776_A1_REV_ID 0x0002 -#define BCM88777_DEVICE_ID 0x8777 -#define BCM88777_A1_REV_ID 0x0002 -#define BCM88950_DEVICE_ID 0x8950 -#define BCM88950_A0_REV_ID 0x0001 -#define BCM88950_A1_REV_ID 0x0002 -#define BCM88953_DEVICE_ID 0x8953 -#define BCM88953_A1_REV_ID 0x0002 -#define BCM88954_DEVICE_ID 0x8954 -#define BCM88954_A1_REV_ID 0x0002 -#define BCM88955_DEVICE_ID 0x8955 -#define BCM88955_A1_REV_ID 0x0002 -#define BCM88956_DEVICE_ID 0x8956 -#define BCM88956_A1_REV_ID 0x0002 -#define DNXC_REV_A_FAMILY 0 -#define DNXC_REV_B_FAMILY 0x10 -#define DNXC_REV_C_FAMILY 0x20 -#define DNXC_REV_D_FAMILY 0x30 -#define DNXC_REV_FAMILY_MASK 0xf0 -#define DNXC_A0_REV_ID 0x0001 -#define DNXC_A1_REV_ID 0x0002 -#define DNXC_A2_REV_ID 0x0003 -#define DNXC_B0_REV_ID 0x0011 -#define DNXC_B1_REV_ID 0x0012 -#define DNXC_B2_REV_ID 0x0013 -#define DNXC_C0_REV_ID 0x0021 -#define DNXC_C1_REV_ID 0x0022 -#define DNXC_C2_REV_ID 0x0023 -#define DNXC_D0_REV_ID 0x0031 -#define DNXC_D1_REV_ID 0x0032 -#define DNXC_DEVID_FAMILY_MASK 0xfff0 -#define BCM88790_DEVICE_ID 0x8790 -#define BCM88790_A0_REV_ID DNXC_A0_REV_ID -#define BCM88790_B0_REV_ID DNXC_B0_REV_ID -#define BCM88791_DEVICE_ID 0x8791 -#define BCM88792_DEVICE_ID 0x8792 -#define BCM88793_DEVICE_ID 0x8793 -#define BCM88794_DEVICE_ID 0x8794 -#define BCM88795_DEVICE_ID 0x8795 -#define BCM88796_DEVICE_ID 0x8796 -#define BCM88797_DEVICE_ID 0x8797 -#define BCM88798_DEVICE_ID 0x8798 -#define BCM88799_DEVICE_ID 0x8799 -#define BCM8879A_DEVICE_ID 0x879A -#define BCM8879B_DEVICE_ID 0x879B -#define BCM8879C_DEVICE_ID 0x879C -#define BCM8879D_DEVICE_ID 0x879D -#define BCM8879E_DEVICE_ID 0x879E -#define BCM8879F_DEVICE_ID 0x879F -#ifdef BCM_DNXF3_SUPPORT -#define RAMON2_DEVICE_ID 0x8910 -#define BCM8891F_DEVICE_ID 0x891F -#define RAMON3_DEVICE_ID 0x8920 -#endif -#ifdef BCM_DNXFE_SUPPORT -#ifdef BCM_RAMON_4_SUPPORT -#define RAMON4_DEVICE_ID 0x9470 -#endif -#endif -#define ARADPLUS_DEVICE_ID 0x8660 -#define ARADPLUS_A0_REV_ID 0x0001 -#define BCM88660_DEVICE_ID ARADPLUS_DEVICE_ID -#define BCM88660_A0_REV_ID ARADPLUS_A0_REV_ID -#define JERICHO_DEVICE_ID 0x8675 -#define JERICHO_A0_REV_ID 0x0001 -#define JERICHO_B0_REV_ID 0x0011 -#define JERICHO_A1_REV_ID 0x0002 -#define BCM88670_DEVICE_ID 0x8670 -#define BCM88670_A0_REV_ID JERICHO_A0_REV_ID -#define BCM88670_A1_REV_ID JERICHO_A1_REV_ID -#define BCM88671_DEVICE_ID 0x8671 -#define BCM88671_A0_REV_ID JERICHO_A0_REV_ID -#define BCM88671_A1_REV_ID JERICHO_A1_REV_ID -#define BCM88671M_DEVICE_ID 0x867A -#define BCM88671M_A0_REV_ID JERICHO_A0_REV_ID -#define BCM88671M_A1_REV_ID JERICHO_A1_REV_ID - -#define BCM88670_B0_REV_ID JERICHO_B0_REV_ID -#define BCM88671_B0_REV_ID JERICHO_B0_REV_ID -#define BCM88671M_B0_REV_ID JERICHO_B0_REV_ID - -#define BCM88672_DEVICE_ID 0x8672 -#define BCM88672_A0_REV_ID JERICHO_A0_REV_ID -#define BCM88672_A1_REV_ID JERICHO_A1_REV_ID - -#define BCM88672_B0_REV_ID JERICHO_B0_REV_ID - -#define BCM88673_DEVICE_ID 0x8673 -#define BCM88673_A0_REV_ID JERICHO_A0_REV_ID -#define BCM88673_A1_REV_ID JERICHO_A1_REV_ID -#define BCM88674_DEVICE_ID 0x8674 -#define BCM88674_A0_REV_ID JERICHO_A0_REV_ID -#define BCM88674_A1_REV_ID JERICHO_A1_REV_ID -#define BCM88675_DEVICE_ID JERICHO_DEVICE_ID -#define BCM88675_A0_REV_ID JERICHO_A0_REV_ID -#define BCM88675_A1_REV_ID JERICHO_A1_REV_ID -#define BCM88675M_DEVICE_ID 0x867B -#define BCM88675M_A0_REV_ID JERICHO_A0_REV_ID -#define BCM88675M_A1_REV_ID JERICHO_A1_REV_ID -#define BCM88676_DEVICE_ID 0x8676 -#define BCM88676_A0_REV_ID JERICHO_A0_REV_ID -#define BCM88676_A1_REV_ID JERICHO_A1_REV_ID -#define BCM88676M_DEVICE_ID 0x867C -#define BCM88676M_A0_REV_ID JERICHO_A0_REV_ID -#define BCM88676M_A1_REV_ID JERICHO_A1_REV_ID -#define BCM88677_DEVICE_ID 0x8677 -#define BCM88677_A0_REV_ID JERICHO_A0_REV_ID -#define BCM88677_A1_REV_ID JERICHO_A1_REV_ID -#define BCM88678_DEVICE_ID 0x8678 -#define BCM88678_A0_REV_ID JERICHO_A0_REV_ID -#define BCM88678_A1_REV_ID JERICHO_A1_REV_ID -#define BCM88679_DEVICE_ID 0x8679 -#define BCM88679_A0_REV_ID JERICHO_A0_REV_ID -#define BCM88679_A1_REV_ID JERICHO_A1_REV_ID - -#define BCM88673_B0_REV_ID JERICHO_B0_REV_ID -#define BCM88674_B0_REV_ID JERICHO_B0_REV_ID -#define BCM88675_B0_REV_ID JERICHO_B0_REV_ID -#define BCM88675M_B0_REV_ID JERICHO_B0_REV_ID -#define BCM88676_B0_REV_ID JERICHO_B0_REV_ID -#define BCM88676M_B0_REV_ID JERICHO_B0_REV_ID -#define BCM88677_B0_REV_ID JERICHO_B0_REV_ID -#define BCM88678_B0_REV_ID JERICHO_B0_REV_ID -#define BCM88679_B0_REV_ID JERICHO_B0_REV_ID -#define QMX_DEVICE_ID 0x8375 -#define QMX_A0_REV_ID 0x0001 -#define QMX_B0_REV_ID 0x0011 -#define QMX_A1_REV_ID 0x0002 -#define BCM88370_DEVICE_ID 0x8370 -#define BCM88370_A0_REV_ID QMX_A0_REV_ID -#define BCM88370_A1_REV_ID QMX_A1_REV_ID -#define BCM88371_DEVICE_ID 0x8371 -#define BCM88371_A0_REV_ID QMX_A0_REV_ID -#define BCM88371_A1_REV_ID QMX_A1_REV_ID -#define BCM88371M_DEVICE_ID 0x837A -#define BCM88371M_A0_REV_ID QMX_A0_REV_ID -#define BCM88371M_A1_REV_ID QMX_A1_REV_ID -#define BCM88375_DEVICE_ID QMX_DEVICE_ID -#define BCM88375_A0_REV_ID QMX_A0_REV_ID -#define BCM88375_A1_REV_ID QMX_A1_REV_ID -#define BCM88376_DEVICE_ID 0x8376 -#define BCM88376_A0_REV_ID QMX_A0_REV_ID -#define BCM88376_A1_REV_ID QMX_A1_REV_ID -#define BCM88376M_DEVICE_ID 0x837B -#define BCM88376M_A0_REV_ID QMX_A0_REV_ID -#define BCM88376M_A1_REV_ID QMX_A1_REV_ID -#define BCM88377_DEVICE_ID 0x8377 -#define BCM88377_A0_REV_ID QMX_A0_REV_ID -#define BCM88377_A1_REV_ID QMX_A1_REV_ID -#define BCM88378_DEVICE_ID 0x8378 -#define BCM88378_A0_REV_ID QMX_A0_REV_ID -#define BCM88378_A1_REV_ID QMX_A1_REV_ID -#define BCM88379_DEVICE_ID 0x8379 -#define BCM88379_A0_REV_ID QMX_A0_REV_ID -#define BCM88379_A1_REV_ID QMX_A1_REV_ID - -#define BCM88370_B0_REV_ID QMX_B0_REV_ID -#define BCM88371_B0_REV_ID QMX_B0_REV_ID -#define BCM88371M_B0_REV_ID QMX_B0_REV_ID -#define BCM88375_B0_REV_ID QMX_B0_REV_ID -#define BCM88376_B0_REV_ID QMX_B0_REV_ID -#define BCM88376M_B0_REV_ID QMX_B0_REV_ID -#define BCM88377_B0_REV_ID QMX_B0_REV_ID -#define BCM88378_B0_REV_ID QMX_B0_REV_ID -#define BCM88379_B0_REV_ID QMX_B0_REV_ID - - -#define JERICHO_PLUS_DEVICE_ID 0x8680 -#define JERICHO_PLUS_A0_REV_ID 0x0001 -#define BCM88680_DEVICE_ID JERICHO_PLUS_DEVICE_ID -#define BCM88680_A0_REV_ID JERICHO_PLUS_A0_REV_ID -#define BCM88680_A1_REV_ID 0x0002 - - -#define BCM88681_DEVICE_ID 0x8681 -#define BCM88681_A0_REV_ID JERICHO_PLUS_A0_REV_ID - -#define BCM88682_DEVICE_ID 0x8682 -#define BCM88682_A0_REV_ID JERICHO_PLUS_A0_REV_ID - -#define BCM88683_DEVICE_ID 0x8683 -#define BCM88683_A0_REV_ID JERICHO_PLUS_A0_REV_ID - -#define BCM88684_DEVICE_ID 0x8684 -#define BCM88684_A0_REV_ID JERICHO_PLUS_A0_REV_ID - -#define BCM88685_DEVICE_ID 0x8685 -#define BCM88685_A0_REV_ID JERICHO_PLUS_A0_REV_ID - -#define BCM88687_DEVICE_ID 0x8687 -#define BCM88687_A0_REV_ID JERICHO_PLUS_A0_REV_ID - -#define BCM88380_DEVICE_ID 0x8380 -#define BCM88380_A0_REV_ID JERICHO_PLUS_A0_REV_ID -#define BCM88381_DEVICE_ID 0x8381 -#define BCM88381_A0_REV_ID JERICHO_PLUS_A0_REV_ID - -#define JERICHO2_DEVICE_ID 0x8690 -#define JERICHO2_A0_REV_ID DNXC_A0_REV_ID -#define JERICHO2_B0_REV_ID DNXC_B0_REV_ID -#define JERICHO2_B1_REV_ID DNXC_B1_REV_ID -#define BCM88690_DEVICE_ID JERICHO2_DEVICE_ID -#define BCM88690_A0_REV_ID JERICHO2_A0_REV_ID -#define BCM88690_B0_REV_ID JERICHO2_B0_REV_ID -#define BCM88690_B1_REV_ID JERICHO2_B1_REV_ID -#define BCM88691_DEVICE_ID 0x8691 -#define BCM88692_DEVICE_ID 0x8692 -#define BCM88693_DEVICE_ID 0x8693 -#define BCM88694_DEVICE_ID 0x8694 -#define BCM88695_DEVICE_ID 0x8695 -#define BCM88696_DEVICE_ID 0x8696 -#define BCM88697_DEVICE_ID 0x8697 -#define BCM88698_DEVICE_ID 0x8698 -#define BCM88699_DEVICE_ID 0x8699 -#define BCM8869A_DEVICE_ID 0x869A -#define BCM8869B_DEVICE_ID 0x869B -#define BCM8869C_DEVICE_ID 0x869C -#define BCM8869D_DEVICE_ID 0x869D -#define BCM8869E_DEVICE_ID 0x869E -#define BCM8869F_DEVICE_ID 0x869F - -#define J2C_DEVICE_ID 0x8800 -#define J2C_2ND_DEVICE_ID 0x8820 -#define J2C_DEVID_FAMILY_MASK 0xffd0 -#define J2C_A0_REV_ID DNXC_A0_REV_ID -#define J2C_A1_REV_ID DNXC_A1_REV_ID -#define BCM88800_DEVICE_ID J2C_DEVICE_ID -#define BCM88820_DEVICE_ID J2C_2ND_DEVICE_ID -#define BCM88800_A0_REV_ID J2C_A0_REV_ID -#define BCM88800_A1_REV_ID J2C_A1_REV_ID -#define BCM88801_DEVICE_ID 0x8801 -#define BCM88802_DEVICE_ID 0x8802 -#define BCM88803_DEVICE_ID 0x8803 -#define BCM88804_DEVICE_ID 0x8804 -#define BCM88805_DEVICE_ID 0x8805 -#define BCM88806_DEVICE_ID 0x8806 -#define BCM88807_DEVICE_ID 0x8807 -#define BCM88808_DEVICE_ID 0x8808 -#define BCM88809_DEVICE_ID 0x8809 -#define BCM8880A_DEVICE_ID 0x880A -#define BCM8880B_DEVICE_ID 0x880B -#define BCM8880C_DEVICE_ID 0x880C -#define BCM8880D_DEVICE_ID 0x880D -#define BCM8880E_DEVICE_ID 0x880E -#define BCM8880F_DEVICE_ID 0x880F -#define BCM88821_DEVICE_ID 0x8821 -#define BCM88822_DEVICE_ID 0x8822 -#define BCM88823_DEVICE_ID 0x8823 -#define BCM88824_DEVICE_ID 0x8824 -#define BCM88825_DEVICE_ID 0x8825 -#define BCM88826_DEVICE_ID 0x8826 -#define BCM88827_DEVICE_ID 0x8827 -#define BCM88828_DEVICE_ID 0x8828 -#define BCM88829_DEVICE_ID 0x8829 -#define BCM8882A_DEVICE_ID 0x882A -#define BCM8882B_DEVICE_ID 0x882B -#define BCM8882C_DEVICE_ID 0x882C -#define BCM8882D_DEVICE_ID 0x882D -#define BCM8882E_DEVICE_ID 0x882E -#define BCM8882F_DEVICE_ID 0x882F - -#define J2P_DEVICE_ID 0x8850 -#define J2P_A0_REV_ID DNXC_A0_REV_ID -#define J2P_A1_REV_ID DNXC_A1_REV_ID -#define J2P_A2_REV_ID DNXC_A2_REV_ID -#define BCM88850_DEVICE_ID J2P_DEVICE_ID -#define BCM88850_A0_REV_ID J2P_A0_REV_ID -#define BCM88850_A1_REV_ID J2P_A1_REV_ID -#define BCM88850_A2_REV_ID J2P_A2_REV_ID -#define BCM88851_DEVICE_ID 0x8851 -#define BCM88852_DEVICE_ID 0x8852 -#define BCM88853_DEVICE_ID 0x8853 -#define BCM88854_DEVICE_ID 0x8854 -#define BCM88855_DEVICE_ID 0x8855 -#define BCM88856_DEVICE_ID 0x8856 -#define BCM88857_DEVICE_ID 0x8857 -#define BCM88858_DEVICE_ID 0x8858 -#define BCM88859_DEVICE_ID 0x8859 -#define BCM8885A_DEVICE_ID 0x885A -#define BCM8885B_DEVICE_ID 0x885B -#define BCM8885C_DEVICE_ID 0x885C -#define BCM8885D_DEVICE_ID 0x885D -#define BCM8885E_DEVICE_ID 0x885E -#define BCM8885F_DEVICE_ID 0x885F - -#define BCM88840_DEVICE_ID 0x8840 -#define BCM88841_DEVICE_ID 0x8841 -#define BCM88842_DEVICE_ID 0x8842 -#define BCM88843_DEVICE_ID 0x8843 -#define BCM88844_DEVICE_ID 0x8844 -#define BCM88845_DEVICE_ID 0x8845 -#define BCM88846_DEVICE_ID 0x8846 -#define BCM88847_DEVICE_ID 0x8847 -#define BCM88848_DEVICE_ID 0x8848 -#define BCM88849_DEVICE_ID 0x8849 -#define BCM8884A_DEVICE_ID 0x884A -#define BCM8884B_DEVICE_ID 0x884B -#define BCM8884C_DEVICE_ID 0x884C -#define BCM8884D_DEVICE_ID 0x884D -#define BCM8884E_DEVICE_ID 0x884E -#define BCM8884F_DEVICE_ID 0x884F - -#define BCM88810_DEVICE_ID 0x8810 -#define BCM88811_DEVICE_ID 0x8811 -#define BCM88812_DEVICE_ID 0x8812 -#define BCM88813_DEVICE_ID 0x8813 -#define BCM88814_DEVICE_ID 0x8814 -#define BCM88815_DEVICE_ID 0x8815 -#define BCM88816_DEVICE_ID 0x8816 -#define BCM88817_DEVICE_ID 0x8817 -#define BCM88818_DEVICE_ID 0x8818 -#define BCM88819_DEVICE_ID 0x8819 -#define BCM8881A_DEVICE_ID 0x881A -#define BCM8881B_DEVICE_ID 0x881B -#define BCM8881C_DEVICE_ID 0x881C -#define BCM8881D_DEVICE_ID 0x881D -#define BCM8881E_DEVICE_ID 0x881E -#define BCM8881F_DEVICE_ID 0x881F - -#define J2X_DEVICE_ID 0x8830 -#define J2X_A0_REV_ID DNXC_A0_REV_ID -#define BCM88830_DEVICE_ID J2X_DEVICE_ID -#define BCM88830_A0_REV_ID J2X_A0_REV_ID -#define BCM88831_DEVICE_ID 0x8831 -#define BCM88832_DEVICE_ID 0x8832 -#define BCM88833_DEVICE_ID 0x8833 -#define BCM88834_DEVICE_ID 0x8834 -#define BCM88835_DEVICE_ID 0x8835 -#define BCM88836_DEVICE_ID 0x8836 -#define BCM88837_DEVICE_ID 0x8837 -#define BCM88838_DEVICE_ID 0x8838 -#define BCM88839_DEVICE_ID 0x8839 -#define BCM8883A_DEVICE_ID 0x883A -#define BCM8883B_DEVICE_ID 0x883B -#define BCM8883C_DEVICE_ID 0x883C -#define BCM8883D_DEVICE_ID 0x883D -#define BCM8883E_DEVICE_ID 0x883E -#define BCM8883F_DEVICE_ID 0x883F - -#define J2Z_DEVICE_ID 0x216 -#define J2Z_A0_REV_ID DNXC_A0_REV_ID -#define BCM8216_DEVICE_ID J2Z_DEVICE_ID -#define BCM8216_A0_REV_ID J2Z_A0_REV_ID - -#ifdef BCM_DNX3_SUPPORT -#define JERICHO3_DEVICE_ID 0x8860 -#define J3_PLUS_DEVICE_ID 0x8867 -#define J3_PLUS_DEVICE_ID_START J3_PLUS_DEVICE_ID -#define J3_PLUS_DEVICE_ID_END 0x8869 -#define Q3_DEVICE_ID_START 0x886a -#define Q3_DEVICE_ID_END 0x886f -#define J3AI_DEVICE_ID 0x8890 -#define J3AI_PLUS_DEVICE_ID 0x8897 -#define J3AI_PLUS_DEVICE_ID_START J3AI_PLUS_DEVICE_ID -#define J3AI_PLUS_DEVICE_ID_END 0x889f -#define Q3D_DEVICE_ID 0x8870 -#ifdef BCM_Q3A_SUPPORT -#define Q3A_DEVICE_ID 0x8490 -#define Q3U_DEVICE_ID 0x84A0 -#define Q3N_DEVICE_ID 0x84A5 -#define Q3U_ORIG_DEVICE_ID 0x8400 -#define Q3N_ORIG_DEVICE_ID 0x8405 -#endif -#ifdef BCM_JERICHO_4_SUPPORT -#define JERICHO4_DEVICE_ID 0x9450 -#define Q4_DEVICE_ID 0x9420 -#endif - -#ifdef BCM_Q4D_SUPPORT -#define Q4D_DEVICE_ID 0x9430 -#define Q4D_PT200_START_DEVICE_ID 0x9436 -#define Q4D_PT200_END_DEVICE_ID 0x9439 -#endif - - -#ifdef BCM_J4L_SUPPORT -#define J4L_DEVICE_ID 0x9410 -#endif - - -#endif -#define Q2A_DEVICE_ID 0x8480 -#define Q2A_A0_REV_ID DNXC_A0_REV_ID -#define Q2A_B0_REV_ID DNXC_B0_REV_ID -#define Q2A_B1_REV_ID DNXC_B1_REV_ID -#define BCM88480_DEVICE_ID Q2A_DEVICE_ID -#define BCM88480_A0_REV_ID Q2A_A0_REV_ID -#define BCM88480_B0_REV_ID Q2A_B0_REV_ID -#define BCM88480_B1_REV_ID Q2A_B1_REV_ID -#define BCM88481_DEVICE_ID 0x8481 -#define BCM88482_DEVICE_ID 0x8482 -#define BCM88483_DEVICE_ID 0x8483 -#define BCM88484_DEVICE_ID 0x8484 -#define BCM88485_DEVICE_ID 0x8485 -#define BCM88486_DEVICE_ID 0x8486 -#define BCM88487_DEVICE_ID 0x8487 -#define BCM88488_DEVICE_ID 0x8488 -#define BCM88489_DEVICE_ID 0x8489 -#define BCM8848A_DEVICE_ID 0x848A -#define BCM8848B_DEVICE_ID 0x848B -#define BCM8848C_DEVICE_ID 0x848C -#define BCM8848D_DEVICE_ID 0x848D -#define BCM8848E_DEVICE_ID 0x848E -#define BCM8848F_DEVICE_ID 0x848F - -#define Q2U_DEVICE_ID 0x8280 -#define BCM88280_DEVICE_ID Q2U_DEVICE_ID -#define BCM88281_DEVICE_ID 0x8281 -#define BCM88282_DEVICE_ID 0x8282 -#define BCM88283_DEVICE_ID 0x8283 -#define BCM88284_DEVICE_ID 0x8284 -#define BCM88285_DEVICE_ID 0x8285 -#define BCM88286_DEVICE_ID 0x8286 -#define BCM88287_DEVICE_ID 0x8287 -#define BCM88288_DEVICE_ID 0x8288 -#define BCM88289_DEVICE_ID 0x8289 -#define BCM8828A_DEVICE_ID 0x828A -#define BCM8828B_DEVICE_ID 0x828B -#define BCM8828C_DEVICE_ID 0x828C -#define BCM8828D_DEVICE_ID 0x828D -#define BCM8828E_DEVICE_ID 0x828E -#define BCM8828F_DEVICE_ID 0x828F - -#define Q2N_DEVICE_ID 0x8290 -#define BCM88290_DEVICE_ID Q2N_DEVICE_ID -#define BCM88291_DEVICE_ID 0x8291 -#define BCM88292_DEVICE_ID 0x8292 -#define BCM88293_DEVICE_ID 0x8293 -#define BCM88294_DEVICE_ID 0x8294 -#define BCM88295_DEVICE_ID 0x8295 -#define BCM88296_DEVICE_ID 0x8296 -#define BCM88297_DEVICE_ID 0x8297 -#define BCM88298_DEVICE_ID 0x8298 -#define BCM88299_DEVICE_ID 0x8299 -#define BCM8829A_DEVICE_ID 0x829A -#define BCM8829B_DEVICE_ID 0x829B -#define BCM8829C_DEVICE_ID 0x829C -#define BCM8829D_DEVICE_ID 0x829D -#define BCM8829E_DEVICE_ID 0x829E -#define BCM8829F_DEVICE_ID 0x829F - -#define QAX_DEVICE_ID 0x8470 -#define QAX_A0_REV_ID 0x0001 -#define QAX_B0_REV_ID 0x0011 -#define BCM88470_DEVICE_ID QAX_DEVICE_ID -#define BCM88470_B0_REV_ID QAX_B0_REV_ID -#define BCM88470P_DEVICE_ID 0x847C -#define BCM88471_DEVICE_ID 0x8471 -#define BCM88473_DEVICE_ID 0x8473 -#define BCM88474_DEVICE_ID 0x8474 -#define BCM88474H_DEVICE_ID 0x847B -#define BCM88476_DEVICE_ID 0x8476 -#define BCM88477_DEVICE_ID 0x8477 - -#define BCM88479_DEVICE_ID 0x8479 - - - -#define BCM88470_A0_REV_ID QAX_A0_REV_ID - -#define QUX_DEVICE_ID 0x8270 -#define QUX_A0_REV_ID 0x0001 -#define QUX_A1_REV_ID 0x0002 -#define QUX_B0_REV_ID 0x0011 -#define BCM88270_DEVICE_ID QUX_DEVICE_ID -#define BCM88270_A0_REV_ID QUX_A0_REV_ID -#define BCM88270_A1_REV_ID QUX_A1_REV_ID -#define BCM88271_DEVICE_ID 0x8271 -#define BCM88272_DEVICE_ID 0x8272 -#define BCM88273_DEVICE_ID 0x8273 -#define BCM88274_DEVICE_ID 0x8274 -#define BCM88276_DEVICE_ID 0x8276 -#define BCM88278_DEVICE_ID 0x8278 -#define BCM88279_DEVICE_ID 0x8279 - -#define BCM88360_DEVICE_ID 0x8360 -#define BCM88360_A0_REV_ID ARADPLUS_A0_REV_ID -#define BCM88361_DEVICE_ID 0x8361 -#define BCM88361_A0_REV_ID ARADPLUS_A0_REV_ID -#define BCM88363_DEVICE_ID 0x8363 -#define BCM88363_A0_REV_ID ARADPLUS_A0_REV_ID -#define BCM88460_DEVICE_ID 0x8460 -#define BCM88460_A0_REV_ID ARADPLUS_A0_REV_ID -#define BCM88461_DEVICE_ID 0x8461 -#define BCM88461_A0_REV_ID ARADPLUS_A0_REV_ID -#define BCM88560_DEVICE_ID 0x8560 -#define BCM88560_A0_REV_ID ARADPLUS_A0_REV_ID -#define BCM88561_DEVICE_ID 0x8561 -#define BCM88561_A0_REV_ID ARADPLUS_A0_REV_ID -#define BCM88562_DEVICE_ID 0x8562 -#define BCM88562_A0_REV_ID ARADPLUS_A0_REV_ID -#define BCM88661_DEVICE_ID 0x8661 -#define BCM88661_A0_REV_ID ARADPLUS_A0_REV_ID -#define BCM88664_DEVICE_ID 0x8664 -#define BCM88664_A0_REV_ID ARADPLUS_A0_REV_ID - - -#define BCM88350_DEVICE_ID 0x8350 -#define BCM88350_B1_REV_ID ARAD_B1_REV_ID -#define BCM88351_DEVICE_ID 0x8351 -#define BCM88351_B1_REV_ID ARAD_B1_REV_ID -#define BCM88450_DEVICE_ID 0x8450 -#define BCM88450_B1_REV_ID ARAD_B1_REV_ID -#define BCM88451_DEVICE_ID 0x8451 -#define BCM88451_B1_REV_ID ARAD_B1_REV_ID -#define BCM88550_DEVICE_ID 0x8550 -#define BCM88550_B1_REV_ID ARAD_B0_REV_ID -#define BCM88551_DEVICE_ID 0x8551 -#define BCM88551_B1_REV_ID ARAD_B1_REV_ID -#define BCM88552_DEVICE_ID 0x8552 -#define BCM88552_B1_REV_ID ARAD_B1_REV_ID - -#define BCM88772_DEVICE_ID 0x8772 -#define BCM88952_DEVICE_ID 0x8952 -#define BCM88772_A1_REV_ID 0x0002 -#define BCM88952_A0_REV_ID 0x0001 -#define BCM88952_A1_REV_ID 0x0002 - -#define PLX9056_DEVICE_ID 0x9056 - -#define BCM78920_DEVICE_ID 0xf920 -#define BCM78920_A0_REV_ID 0x0001 -#define BCM78923_DEVICE_ID 0xf923 -#define BCM78923_A0_REV_ID 0x0001 -#define BCM78924_DEVICE_ID 0xf924 -#define BCM78924_A0_REV_ID 0x0001 -#define BCM78928_DEVICE_ID 0xf928 -#define BCM78928_A0_REV_ID 0x0001 - -#define BCM56890_DEVICE_ID 0xb890 -#define BCM56890_A0_REV_ID 0x0001 -#define BCM56891_DEVICE_ID 0xb891 -#define BCM56891_A0_REV_ID 0x0001 -#define BCM56892_DEVICE_ID 0xb892 -#define BCM56892_A0_REV_ID 0x0001 -#define BCM56895_DEVICE_ID 0xb895 -#define BCM56895_A0_REV_ID 0x0001 -#define BCM56896_DEVICE_ID 0xb896 -#define BCM56896_A0_REV_ID 0x0001 - -#define BCM56690_DEVICE_ID 0xb690 -#define BCM56690_A0_REV_ID 0x0001 -#define BCM56692_DEVICE_ID 0xb692 -#define BCM56692_A0_REV_ID 0x0001 - -#define BCM78800_DEVICE_ID 0xf800 -#define BCM78800_A0_REV_ID 0x0001 -#define BCM78808_DEVICE_ID 0xf808 -#define BCM78808_A0_REV_ID 0x0001 - -#define BCM56880_DEVICE_ID 0xb880 -#define BCM56880_A0_REV_ID 0x0001 -#define BCM56880_B0_REV_ID 0x0011 -#define BCM56881_DEVICE_ID 0xb881 -#define BCM56881_A0_REV_ID 0x0001 -#define BCM56881_B0_REV_ID 0x0011 -#define BCM56883_DEVICE_ID 0xb883 -#define BCM56883_A0_REV_ID 0x0001 -#define BCM56883_B0_REV_ID 0x0011 - -#define BCM56780_DEVICE_ID 0xb780 -#define BCM56780_A0_REV_ID 0x0001 -#define BCM56782_DEVICE_ID 0xb782 -#define BCM56782_A0_REV_ID 0x0001 -#define BCM56782_A1_REV_ID 0x0002 -#define BCM56784_DEVICE_ID 0xb784 -#define BCM56784_A0_REV_ID 0x0001 -#define BCM56785_DEVICE_ID 0xb785 -#define BCM56785_A0_REV_ID 0x0001 -#define BCM56786_DEVICE_ID 0xb786 -#define BCM56786_A0_REV_ID 0x0001 -#define BCM56786_A1_REV_ID 0x0002 -#define BCM56787_DEVICE_ID 0xb787 -#define BCM56787_A0_REV_ID 0x0001 -#define BCM56787_A1_REV_ID 0x0002 -#define BCM56788_DEVICE_ID 0xb788 -#define BCM56788_A0_REV_ID 0x0001 -#define BCM56788_A1_REV_ID 0x0002 -#define BCM56789_DEVICE_ID 0xb789 -#define BCM56789_A0_REV_ID 0x0001 -#define BCM56089_DEVICE_ID 0xb089 -#define BCM56089_A0_REV_ID 0x0001 -#define BCM56089_A1_REV_ID 0x0002 - -#define BCM56990_DEVICE_ID 0xb990 -#define BCM56990_A0_REV_ID 0x0001 - -#ifndef BCM56990_DEVICE_ID -#define BCM56990_DEVICE_ID 0xb990 -#define BCM56990_A0_REV_ID 0x0001 -#endif -#define BCM56990_B0_REV_ID 0x0011 -#define BCM56991_DEVICE_ID 0xb991 -#define BCM56991_B0_REV_ID 0x0011 -#define BCM56992_DEVICE_ID 0xb992 -#define BCM56992_B0_REV_ID 0x0011 -#define BCM56993_DEVICE_ID 0xb993 -#define BCM56993_B0_REV_ID 0x0011 - -#define BCM56996_DEVICE_ID 0xb996 -#define BCM56996_A0_REV_ID 0x0001 -#define BCM56997_DEVICE_ID 0xb997 -#define BCM56997_A0_REV_ID 0x0001 - -#ifndef BCM56996_DEVICE_ID -#define BCM56996_DEVICE_ID 0xb996 -#define BCM56996_A0_REV_ID 0x0001 -#define BCM56997_DEVICE_ID 0xb997 -#endif -#define BCM56996_B0_REV_ID 0x0011 -#define BCM56997_B0_REV_ID 0x0011 - -#define BCM56998_DEVICE_ID 0xb998 -#define BCM56998_A0_REV_ID 0x0001 - -#define BCM56999_DEVICE_ID 0xb999 -#define BCM56999_A0_REV_ID 0x0001 -#define BCM56999_B0_REV_ID 0x0011 -#define BCM56995_DEVICE_ID 0xb995 -#define BCM56995_A0_REV_ID 0x0001 -#define BCM56995_B0_REV_ID 0x0011 - -#define BCM78900_DEVICE_ID 0xf900 -#define BCM78900_B0_REV_ID 0x0011 -#define BCM78902_DEVICE_ID 0xf902 -#define BCM78902_B0_REV_ID 0x0011 -#define BCM78903_DEVICE_ID 0xf903 -#define BCM78903_B0_REV_ID 0x0011 - -#define BCM78905_DEVICE_ID 0xf905 -#define BCM78905_A0_REV_ID 0x0001 - -#define BCM78907_DEVICE_ID 0xf907 -#define BCM78907_A0_REV_ID 0x0001 - -#define BCM78910_DEVICE_ID 0xf910 -#define BCM78910_A0_REV_ID 0x0001 - -#define BCM78914_DEVICE_ID 0xf914 -#define BCM78914_B0_REV_ID 0x0011 - -#ifndef BCM78914_DEVICE_ID -#define BCM78914_DEVICE_ID 0xf914 -#endif -#define BCM78914_B1_REV_ID 0x0012 - -#define BCM56080_DEVICE_ID 0xb080 -#define BCM56080_A0_REV_ID 0x0001 -#define BCM56080_A1_REV_ID 0x0002 -#define BCM56081_DEVICE_ID 0xb081 -#define BCM56081_A0_REV_ID 0x0001 -#define BCM56081_A1_REV_ID 0x0002 -#define BCM56082_DEVICE_ID 0xb082 -#define BCM56082_A0_REV_ID 0x0001 -#define BCM56082_A1_REV_ID 0x0002 -#define BCM56083_DEVICE_ID 0xb083 -#define BCM56083_A0_REV_ID 0x0001 -#define BCM56083_A1_REV_ID 0x0002 -#define BCM56084_DEVICE_ID 0xb084 -#define BCM56084_A0_REV_ID 0x0001 -#define BCM56084_A1_REV_ID 0x0002 -#define BCM56085_DEVICE_ID 0xb085 -#define BCM56085_A0_REV_ID 0x0001 -#define BCM56085_A1_REV_ID 0x0002 - -#endif diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/rx.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/rx.h deleted file mode 100644 index b26b61f1e20..00000000000 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/rx.h +++ /dev/null @@ -1,271 +0,0 @@ -/* - * $Id: rx.h,v 1.16 Broadcom SDK $ - * - * $Copyright: 2017-2025 Broadcom Inc. All rights reserved. - * - * Permission is granted to use, copy, modify and/or distribute this - * software under either one of the licenses below. - * - * License Option 1: GPL - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License, version 2, as - * published by the Free Software Foundation (the "GPL"). - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License version 2 (GPLv2) for more details. - * - * You should have received a copy of the GNU General Public License - * version 2 (GPLv2) along with this source code. - * - * - * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license - * - * This software is governed by the Broadcom Open Network Switch APIs license: - * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ - * - * - */ - -#ifndef _SOC_RX_H -#define _SOC_RX_H - -#include - -#include - -/* - * PKT RX Packet Reasons; reason CPU received the packet. - * Notes: - * It is possible no reasons are set (directed to CPU from ARL - * for example), or multiple reasons may be set. - * - * See "include/shared/rx.h" for full description. - */ - -typedef enum soc_rx_reason_e { - socRxReasonInvalid = _SHR_RX_INVALID, - socRxReasonArp = _SHR_RX_ARP, - socRxReasonBpdu = _SHR_RX_BPDU, - socRxReasonBroadcast = _SHR_RX_BROADCAST, - socRxReasonClassBasedMove = _SHR_RX_CLASS_BASED_MOVE, - socRxReasonClassTagPackets = _SHR_RX_CLASS_TAG_PACKETS, - socRxReasonControl = _SHR_RX_CONTROL, - socRxReasonCpuLearn = _SHR_RX_CPU_LEARN, - socRxReasonDestLookupFail = _SHR_RX_DEST_LOOKUP_FAIL, - socRxReasonDhcp = _SHR_RX_DHCP, - socRxReasonDosAttack = _SHR_RX_DOS_ATTACK, - socRxReasonE2eHolIbp = _SHR_RX_E2E_HOL_IBP, - socRxReasonEncapHigigError = _SHR_RX_ENCAP_HIGIG_ERROR, - socRxReasonFilterMatch = _SHR_RX_FILTER_MATCH, - socRxReasonGreChecksum = _SHR_RX_GRE_CHECKSUM, - socRxReasonGreSourceRoute = _SHR_RX_GRE_SOURCE_ROUTE, - socRxReasonHigigControl = _SHR_RX_HIGIG_CONTROL, - socRxReasonHigigHdrError = _SHR_RX_HIGIG_HDR_ERROR, - socRxReasonIcmpRedirect = _SHR_RX_ICMP_REDIRECT, - socRxReasonIgmp = _SHR_RX_IGMP, - socRxReasonIngressFilter = _SHR_RX_INGRESS_FILTER, - socRxReasonIp = _SHR_RX_IP, - socRxReasonIpfixRateViolation = _SHR_RX_IPFIX_RATE_VIOLATION, - socRxReasonIpMcastMiss = _SHR_RX_IP_MCAST_MISS, - socRxReasonIpmcReserved = _SHR_RX_IPMC_RSVD, - socRxReasonIpOptionVersion = _SHR_RX_IP_OPTION_VERSION, - socRxReasonIpmc = _SHR_RX_IPMC, - socRxReasonL2Cpu = _SHR_RX_L2_CPU, - socRxReasonL2DestMiss = _SHR_RX_L2_DEST_MISS, - socRxReasonL2LearnLimit = _SHR_RX_L2_LEARN_LIMIT, - socRxReasonL2Move = _SHR_RX_L2_MOVE, - socRxReasonL2MtuFail = _SHR_RX_L2_MTU_FAIL, - socRxReasonL2NonUnicastMiss = _SHR_RX_L2_NON_UNICAST_MISS, - socRxReasonL2SourceMiss = _SHR_RX_L2_SOURCE_MISS, - socRxReasonL3AddrBindFail = _SHR_RX_L3_ADDR_BIND_FAIL, - socRxReasonL3DestMiss = _SHR_RX_L3_DEST_MISS, - socRxReasonL3HeaderError = _SHR_RX_L3_HEADER_ERROR, - socRxReasonL3MtuFail = _SHR_RX_L3_MTU_FAIL, - socRxReasonL3Slowpath = _SHR_RX_L3_SLOW_PATH, - socRxReasonL3SourceMiss = _SHR_RX_L3_SOURCE_MISS, - socRxReasonL3SourceMove = _SHR_RX_L3_SOUCE_MOVE, - socRxReasonMartianAddr = _SHR_RX_MARTIAN_ADDR, - socRxReasonMcastIdxError = _SHR_RX_MCAST_IDX_ERROR, - socRxReasonMcastMiss = _SHR_RX_MCAST_MISS, - socRxReasonMimServiceError = _SHR_RX_MIM_SERVICE_ERROR, - socRxReasonMplsCtrlWordError = _SHR_RX_MPLS_CTRL_WORD_ERROR, - socRxReasonMplsError = _SHR_RX_MPLS_ERROR, - socRxReasonMplsInvalidAction = _SHR_RX_MPLS_INVALID_ACTION, - socRxReasonMplsInvalidPayload = _SHR_RX_MPLS_INVALID_PAYLOAD, - socRxReasonMplsLabelMiss = _SHR_RX_MPLS_LABEL_MISS, - socRxReasonMplsSequenceNumber = _SHR_RX_MPLS_SEQUENCE_NUMBER, - socRxReasonMplsTtl = _SHR_RX_MPLS_TTL, - socRxReasonMulticast = _SHR_RX_MULTICAST, - socRxReasonNhop = _SHR_RX_NHOP, - socRxReasonOAMError = _SHR_RX_OAM_ERROR, - socRxReasonOAMSlowpath = _SHR_RX_OAM_SLOW_PATH, - socRxReasonOAMLMDM = _SHR_RX_OAM_LMDM, - socRxReasonParityError = _SHR_RX_PARITY_ERROR, - socRxReasonProtocol = _SHR_RX_PROTOCOL, - socRxReasonSampleDest = _SHR_RX_SAMPLE_DEST, - socRxReasonSampleSource = _SHR_RX_SAMPLE_SOURCE, - socRxReasonSharedVlanMismatch = _SHR_RX_SHARED_VLAN_MISMATCH, - socRxReasonSourceRoute = _SHR_RX_SOURCE_ROUTE, - socRxReasonTimeStamp = _SHR_RX_TIME_STAMP, - socRxReasonTtl = _SHR_RX_TTL, - socRxReasonTtl1 = _SHR_RX_TTL1, - socRxReasonTunnelError = _SHR_RX_TUNNEL_ERROR, - socRxReasonUdpChecksum = _SHR_RX_UDP_CHECKSUM, - socRxReasonUnknownVlan = _SHR_RX_UNKNOWN_VLAN, - socRxReasonUrpfFail = _SHR_RX_URPF_FAIL, - socRxReasonVcLabelMiss = _SHR_RX_VC_LABEL_MISS, - socRxReasonVlanFilterMatch = _SHR_RX_VLAN_FILTER_MATCH, - socRxReasonWlanClientError = _SHR_RX_WLAN_CLIENT_ERROR, - socRxReasonWlanSlowpath = _SHR_RX_WLAN_SLOW_PATH, - socRxReasonWlanDot1xDrop = _SHR_RX_WLAN_DOT1X_DROP, - socRxReasonExceptionFlood = _SHR_RX_EXCEPTION_FLOOD, - socRxReasonTimeSync = _SHR_RX_TIMESYNC, - socRxReasonEAVData = _SHR_RX_EAV_DATA, - socRxReasonSamePortBridge = _SHR_RX_SAME_PORT_BRIDGE, - socRxReasonSplitHorizon = _SHR_RX_SPLIT_HORIZON, - socRxReasonL4Error = _SHR_RX_L4_ERROR, - socRxReasonStp = _SHR_RX_STP, - socRxReasonEgressFilterRedirect = _SHR_RX_EGRESS_FILTER_REDIRECT, - socRxReasonFilterRedirect = _SHR_RX_FILTER_REDIRECT, - socRxReasonLoopback = _SHR_RX_LOOPBACK, - socRxReasonVlanTranslate = _SHR_RX_VLAN_TRANSLATE, - socRxReasonMmrp = _SHR_RX_MMRP, - socRxReasonSrp = _SHR_RX_SRP, - socRxReasonTunnelControl = _SHR_RX_TUNNEL_CONTROL, - socRxReasonL2Marked = _SHR_RX_L2_MARKED, - socRxReasonWlanSlowpathKeepalive = _SHR_RX_WLAN_SLOWPATH_KEEPALIVE, - socRxReasonStation = _SHR_RX_STATION, - socRxReasonNiv = _SHR_RX_NIV, - socRxReasonNivPrioDrop = _SHR_RX_NIV_PRIO_DROP, - socRxReasonNivInterfaceMiss = _SHR_RX_NIV_INTERFACE_MISS, - socRxReasonNivRpfFail = _SHR_RX_NIV_RPF_FAIL, - socRxReasonNivTagInvalid = _SHR_RX_NIV_TAG_INVALID, - socRxReasonNivTagDrop = _SHR_RX_NIV_TAG_DROP, - socRxReasonNivUntagDrop = _SHR_RX_NIV_UNTAG_DROP, - socRxReasonTrill = _SHR_RX_TRILL, - socRxReasonTrillInvalid = _SHR_RX_TRILL_INVALID, - socRxReasonTrillMiss = _SHR_RX_TRILL_MISS, - socRxReasonTrillRpfFail = _SHR_RX_TRILL_RPF_FAIL, - socRxReasonTrillSlowpath = _SHR_RX_TRILL_SLOWPATH, - socRxReasonTrillCoreIsIs = _SHR_RX_TRILL_CORE_IS_IS, - socRxReasonTrillTtl = _SHR_RX_TRILL_TTL, - socRxReasonTrillName = _SHR_RX_TRILL_NAME, - socRxReasonBfdSlowpath = _SHR_RX_BFD_SLOWPATH, - socRxReasonBfd = _SHR_RX_BFD, - socRxReasonMirror = _SHR_RX_MIRROR, - socRxReasonRegexAction = _SHR_RX_REGEX_ACTION, - socRxReasonFailoverDrop = _SHR_RX_FAILOVER_DROP, - socRxReasonWlanTunnelError = _SHR_RX_WLAN_TUNNEL_ERROR, - socRxReasonMplsReservedEntropyLabel = \ - _SHR_RX_MPLS_RESERVED_ENTROPY_LABEL, - socRxReasonCongestionCnmProxy = _SHR_RX_CONGESTION_CNM_PROXY, - socRxReasonCongestionCnmProxyError = _SHR_RX_CONGESTION_CNM_PROXY_ERROR, - socRxReasonCongestionCnm = _SHR_RX_CONGESTION_CNM, - socRxReasonMplsUnknownAch = _SHR_RX_MPLS_UNKNOWN_ACH, - socRxReasonMplsLookupsExceeded = _SHR_RX_MPLS_LOOKUPS_EXCEEDED, - socRxReasonMplsIllegalReservedLabel = \ - _SHR_RX_MPLS_ILLEGAL_RESERVED_LABEL, - socRxReasonMplsRouterAlertLabel = _SHR_RX_MPLS_ROUTER_ALERT_LABEL, - socRxReasonNivPrune = _SHR_RX_NIV_PRUNE, - socRxReasonVirtualPortPrune = _SHR_RX_VIRTUAL_PORT_PRUNE, - socRxReasonNonUnicastDrop = _SHR_RX_NON_UNICAST_DROP, - socRxReasonTrillPacketPortMismatch = _SHR_RX_TRILL_PACKET_PORT_MISMATCH, - socRxReasonRegexMatch = _SHR_RX_REGEX_MATCH, - socRxReasonWlanClientMove = _SHR_RX_WLAN_CLIENT_MOVE, - socRxReasonWlanSourcePortMiss = _SHR_RX_WLAN_SOURCE_PORT_MISS, - socRxReasonWlanClientSourceMiss = _SHR_RX_WLAN_CLIENT_SOURCE_MISS, - socRxReasonWlanClientDestMiss = _SHR_RX_WLAN_CLIENT_DEST_MISS, - socRxReasonWlanMtu = _SHR_RX_WLAN_MTU, - socRxReasonL2GreSipMiss = _SHR_RX_L2GRE_SIP_MISS, - socRxReasonL2GreVpnIdMiss = _SHR_RX_L2GRE_VPN_ID_MISS, - socRxReasonTimesyncUnknownVersion = _SHR_RX_TIMESYNC_UNKNOWN_VERSION, - socRxReasonVxlanSipMiss = _SHR_RX_VXLAN_SIP_MISS, - socRxReasonVxlanVpnIdMiss = _SHR_RX_VXLAN_VPN_ID_MISS, - socRxReasonFcoeZoneCheckFail = _SHR_RX_FCOE_ZONE_CHECK_FAIL, - socRxReasonIpmcInterfaceMismatch = _SHR_RX_IPMC_INTERFACE_MISMATCH, - socRxReasonNat = _SHR_RX_NAT, - socRxReasonTcpUdpNatMiss = _SHR_RX_TCP_UDP_NAT_MISS, - socRxReasonIcmpNatMiss = _SHR_RX_ICMP_NAT_MISS, - socRxReasonNatFragment = _SHR_RX_NAT_FRAGMENT, - socRxReasonNatMiss = _SHR_RX_NAT_MISS, - socRxReasonUnknownSubtendingPort = _SHR_RX_UNKNOWN_SUBTENTING_PORT, - socRxReasonLLTagAbsentDrop = _SHR_RX_LLTAG_ABSENT_DROP, - socRxReasonLLTagPresentDrop = _SHR_RX_LLTAG_PRESENT_DROP, - socRxReasonOAMCCMSlowPath = _SHR_RX_OAM_CCM_SLOWPATH, - socRxReasonOAMIncompleteOpcode = _SHR_RX_OAM_INCOMPLETE_OPCODE, - socRxReasonReserved0 = _SHR_RX_RESERVED_0, - socRxReasonOAMMplsLmDm = _SHR_RX_OAM_MPLS_LMDM, - socRxReasonSat = _SHR_RX_SAT, - socRxReasonSampleSourceFlex = _SHR_RX_SAMPLE_SOURCE_FLEX, - socRxReasonFlexSflow = _SHR_RX_FLEX_SFLOW, - socRxReasonVxltMiss = _SHR_RX_VXLT_MISS, - socRxReasonTunnelDecapEcnError = _SHR_RX_TUNNEL_DECAP_ECN_ERROR, - socRxReasonTunnelObjectValidationFail = _SHR_RX_TUNNEL_OBJECT_VALIDATION_FAIL, - socRxReasonL3Cpu = _SHR_RX_L3_CPU, - socRxReasonTunnelAdaptLookupMiss = _SHR_RX_TUNNEL_ADAPT_LOOKUP_MISS, - socRxReasonPacketFlowSelectMiss = _SHR_RX_PACKET_FLOW_SELECT_MISS, - socRxReasonProtectionDataDrop = _SHR_RX_PROTECTION_DATA_DROP, - socRxReasonPacketFlowSelect = _SHR_RX_PACKET_FLOW_SELECT, - socRxReasonOtherLookupMiss = _SHR_RX_OTHER_LOOKUP_MISS, - socRxReasonInvalidTpid = _SHR_RX_INVALID_TPID, - socRxReasonMplsControlPacket = _SHR_RX_MPLS_CONTROL_PACKET, - socRxReasonTunnelTtlError = _SHR_RX_TUNNEL_TTL_ERROR, - socRxReasonL2HeaderError = _SHR_RX_L2_HEADER_ERROR, - socRxReasonOtherLookupHit = _SHR_RX_OTHER_LOOKUP_HIT, - socRxReasonL2SrcLookupMiss = _SHR_RX_L2_SRC_LOOKUP_MISS, - socRxReasonL2SrcLookupHit = _SHR_RX_L2_SRC_LOOKUP_HIT, - socRxReasonL2DstLookupMiss = _SHR_RX_L2_DST_LOOKUP_MISS, - socRxReasonL2DstLookupHit = _SHR_RX_L2_DST_LOOKUP_HIT, - socRxReasonL3SrcRouteLookupMiss = _SHR_RX_L3_SRC_ROUTE_LOOKUP_MISS, - socRxReasonL3SrcHostLookupMiss = _SHR_RX_L3_SRC_HOST_LOOKUP_MISS, - socRxReasonL3SrcRouteLookupHit = _SHR_RX_L3_SRC_ROUTE_LOOKUP_HIT, - socRxReasonL3SrcHostLookupHit = _SHR_RX_L3_SRC_HOST_LOOKUP_HIT, - socRxReasonL3DstRouteLookupMiss = _SHR_RX_L3_DST_ROUTE_LOOKUP_MISS, - socRxReasonL3DstHostLookupMiss = _SHR_RX_L3_DST_HOST_LOOKUP_MISS, - socRxReasonL3DstRouteLookupHit = _SHR_RX_L3_DST_ROUTE_LOOKUP_HIT, - socRxReasonL3DstHostLookupHit = _SHR_RX_L3_DST_HOST_LOOKUP_HIT, - socRxReasonVlanTranslate1Lookup1Miss = _SHR_RX_VLAN_TRANSLATE1_LOOKUP1_MISS, - socRxReasonVlanTranslate1Lookup2Miss = _SHR_RX_VLAN_TRANSLATE1_LOOKUP2_MISS, - socRxReasonMplsLookup1Miss = _SHR_RX_MPLS_LOOKUP1_MISS, - socRxReasonMplsLookup2Miss = _SHR_RX_MPLS_LOOKUP2_MISS, - socRxReasonL3TunnelLookupMiss = _SHR_RX_L3_TUNNEL_LOOKUP_MISS, - socRxReasonVlanTranslate2Lookup1Miss = _SHR_RX_VLAN_TRANSLATE2_LOOKUP1_MISS, - socRxReasonVlanTranslate2Lookup2Miss = _SHR_RX_VLAN_TRANSLATE2_LOOKUP2_MISS, - socRxReasonL2StuFail = _SHR_RX_L2_STU_FAIL, - socReasonSrCounterExceeded = _SHR_RX_SR_COUNTER_EXCEEDED, - socRxReasonSrCopyToCpuBit0 = _SHR_RX_SR_COPY_TO_CPU_BIT0, - socRxReasonSrCopyToCpuBit1 = _SHR_RX_SR_COPY_TO_CPU_BIT1, - socRxReasonSrCopyToCpuBit2 = _SHR_RX_SR_COPY_TO_CPU_BIT2, - socRxReasonSrCopyToCpuBit3 = _SHR_RX_SR_COPY_TO_CPU_BIT3, - socRxReasonSrCopyToCpuBit4 = _SHR_RX_SR_COPY_TO_CPU_BIT4, - socRxReasonSrCopyToCpuBit5 = _SHR_RX_SR_COPY_TO_CPU_BIT5, - socRxReasonL3HeaderMismatch = _SHR_RX_L3_HEADER_MISMATCH, - socRxReasonEtrapMonitor = _SHR_RX_ETRAP_MONITOR, - socRxReasonDlbMonitor = _SHR_RX_DLB_MONITOR, - socRxReasonIntTurnAround = _SHR_RX_INT_TURNAROUND, - socRxReasonCount = _SHR_RX_REASON_COUNT /* MUST BE LAST */ -} soc_rx_reason_t; - - -/* - * Set of "reasons" (see socRxReason*) why a packet came to the CPU. - */ -typedef _shr_rx_reasons_t soc_rx_reasons_t; - -/* - * Macro to add a reason (socRxReason*) to a set of - * reasons (soc_rx_reasons_t) - */ -#define SOC_RX_REASON_SET(_reasons, _reason) \ - _SHR_RX_REASON_SET(_reasons, _reason) - -/* - * Macro to clear a set of reasons (soc_rx_reasons_t). - */ -#define SOC_RX_REASON_CLEAR_ALL(_reasons) \ - _SHR_RX_REASON_CLEAR_ALL(_reasons) - -#endif /* !_SOC_RX_H */ diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/types.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/types.h deleted file mode 100644 index aad22e512cc..00000000000 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/include/soc/types.h +++ /dev/null @@ -1,43 +0,0 @@ -/* - * $Id:$ - * - * $Copyright: 2017-2025 Broadcom Inc. All rights reserved. - * - * Permission is granted to use, copy, modify and/or distribute this - * software under either one of the licenses below. - * - * License Option 1: GPL - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License, version 2, as - * published by the Free Software Foundation (the "GPL"). - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License version 2 (GPLv2) for more details. - * - * You should have received a copy of the GNU General Public License - * version 2 (GPLv2) along with this source code. - * - * - * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license - * - * This software is governed by the Broadcom Open Network Switch APIs license: - * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ - * - * - * - * File: types.h - * Purpose: System-on-a-Chip data types - */ - -#ifndef _SOC_TYPES_H_ -#define _SOC_TYPES_H_ - -#include - -typedef uint32 soc_pbmp_t; -#define pbmp_t soc_pbmp_t - -#endif /* _SOC_TYPES_H_ */ diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/make/Makefile b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/make/Makefile deleted file mode 100644 index e5cbf51cbe1..00000000000 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/dcb/make/Makefile +++ /dev/null @@ -1,153 +0,0 @@ -# $Id: Makefile,v 1.2 Broadcom SDK $ -# -# $Copyright: 2017-2025 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ -# -# -# -# Makefile for DCB Library -# - -# General Compilation Flags -CC = $(CROSS_COMPILE)gcc -AR = $(CROSS_COMPILE)ar -CFLAGS = -c -Wall -Werror -ARFLAGS = cru - -# DCB Directory -ifndef DCBDIR -DCBDIR = .. -endif - -# Build Directory -ifndef BLDDIR -BLDDIR = $(DCBDIR)/build -endif - -# Kernel Build -ifdef KADD_CFLAGS -CFLAGS += $(KADD_CFLAGS) -# Prevent false GCC warnings when compiling dcb.c -CFLAGS += -Wno-error=array-bounds -endif - -# Include Directories -INCDIR = -I$(DCBDIR)/include - -# Sources -SOURCES = \ - $(DCBDIR)/src/soc/common/dcb.c \ - $(DCBDIR)/src/appl/dcb/dcb_handler.c - -# Objects -OBJECTS=$(subst .c,.o,$(subst $(DCBDIR),$(BLDDIR),$(SOURCES))) -OBJECTSDIR = $(dir $(OBJECTS)) - -# Library -LIB = $(BLDDIR)/libdcb.a - - -# Compilation Flags -CFLAGS += $(INCDIR) - -DFLAGS = -DFLAGS += -DBCM_53400_A0 # GREYHOUND -DFLAGS += -DBCM_53570_A0 # GREYHOUND2 -DFLAGS += -DBCM_56150_A0 # HURRICANE2 -DFLAGS += -DBCM_56160_A0 # HURRICANE3 -DFLAGS += -DBCM_56340_A0 # HELIX4 -DFLAGS += -DBCM_56450_A0 # KATANA2 -DFLAGS += -DBCM_56560_A0 # APACHE -DFLAGS += -DBCM_56850_A0 # TRIDENT2 -DFLAGS += -DBCM_56860_A0 # TRIDENT2+ -DFLAGS += -DBCM_56870_A0 # TRIDENT3 -DFLAGS += -DBCM_56770_A0 # MAVERICK2 -DFLAGS += -DBCM_56370_A0 # HELIX5 -DFLAGS += -DBCM_56960_A0 # TOMAHAWK -DFLAGS += -DBCM_56970_A0 # TOMAHAWK2 -DFLAGS += -DBCM_56980_A0 # TOMAHAWK3 -DFLAGS += -DBCM_56470_A0 # FIREBOLT6 -DFLAGS += -DBCM_56275_A0 # HURRICANE4 -DFLAGS += -DBCM_56175_A0 # TRIDENT3-X1 - -# -# Compiler Related Options -# - -# Define if pointers are 64 bits on your compiler; -# this is typically true ONLY for 64-bit processors. -# NOTE: This support works ONLY under conditions where the -# upper 32 bits for ALL pointers are ZERO. -#CFGFLAGS += -DPTRS_ARE_64BITS - -# Disable inlining of functions -#CFGFLAGS += -DCOMPILER_OVERRIDE_NO_INLINE - -# Disable use of const -#CFGFLAGS += -DCOMPILER_OVERRIDE_NO_CONST - -# Disable use of static functions -#CFGFLAGS += -DCOMPILER_OVERRIDE_NO_STATIC - - -# -# Rules -# -all: build_dir - $(MAKE) $(LIB) - -$(LIB): $(OBJECTS) - $(AR) $(ARFLAGS) $@ $^ - -define compile_rules -$(1): $(subst .o,.c,$(subst $(BLDDIR),$(DCBDIR),$(1))) - $(CC) $(CFLAGS) $(DFLAGS) $$< -o $$@ -endef - -$(foreach object,$(OBJECTS),$(eval $(call compile_rules,$(object)))) - -.PHONY: clean -clean: - rm -f $(OBJECTS) $(LIB) - -.PHONY: build_dir -build_dir: - mkdir -p $(BLDDIR) - mkdir -p $(OBJECTSDIR) - -.PHONY: print_vars -print_vars: - echo $(SOURCES) - echo $(OBJECTS) - -# -# -# Example -# -test: all $(DCBDIR)/src/appl/test/dcb_test.c - $(CC) -Wall -I$(DCBDIR)/include \ - $(DCBDIR)/src/appl/test/dcb_test.c $(LIB) \ - -o $(BLDDIR)/test.exe - diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/genl-packet/Makefile b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/genl-packet/Makefile deleted file mode 100644 index 188a85c555e..00000000000 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/genl-packet/Makefile +++ /dev/null @@ -1,98 +0,0 @@ -# -*- Makefile -*- -# $Id: Makefile,v 1.3 Broadcom SDK $ -# -# $Copyright: 2017-2025 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ -# -# -# -LOCALDIR = systems/linux/kernel/modules/genl-packet - -include ${SDK}/make/Make.config - -LIBS = - -CFLAGS += -I${SDK}/systems/linux/kernel/modules/include/kernel - -KERNEL_MODULE_DIR = kernel_module - -THIS_MOD_NAME := genl-packet -MODULE = $(LIBDIR)/$(THIS_MOD_NAME).o -KMODULE = $(LIBDIR)/$(THIS_MOD_NAME).ko - -# BCM Network Device - -ifeq (1,$(NO_PRECOMPILED_MODULE)) -# { -# -# These are the objects which need to be compiled, in the kernel, to -# created the module object file. -# -SRCS_COMPOSING = genl-packet.c -OBJECTS_COMPOSING = genl-packet.o -# -# Note that for NO_PRECOMPILED_MODULE, the subdirectory 'systems/linux/kernel/modules/genl-packet/kernel_module' -# is not created and all action is done in systems/linux/kernel/modules/genl-packet -# - -build: $(KMODULE) - -$(KMODULE): $(SRCS_COMPOSING) - rm -fr $(BLDDIR)/$(KERNEL_MODULE_DIR) - rm -f $(BLDDIR)/*.c - rm -f $(BLDDIR)/*.o - rm -f $(BLDDIR)/*.ko - cp ${SDK}/make/Makefile.linux-kmodule $(BLDDIR)/Makefile - cp ./*.c $(BLDDIR)/ - MOD_OBJS=$(OBJECTS_COMPOSING) MOD_NAME=$(THIS_MOD_NAME) $(MAKE) -C $(BLDDIR) $(THIS_MOD_NAME).ko LOC_BLDDIR=$(BLDDIR) LOC_SRCDIR=$(PWD) -# } -else -# { -build: $(MODULE) $(KMODULE) -# -# This is for the compilation of the 'precompiled' object. We keep it -# here for compatibility. -# -$(MODULE): $(BLDDIR)/.tree $(BOBJS) $(LIBS) - $(LD) $(MODULE_LDFLAGS) -r -d $(BOBJS) $(LIBS) -o $@ - -$(KMODULE): $(MODULE) - rm -fr $(BLDDIR)/$(KERNEL_MODULE_DIR) - mkdir $(BLDDIR)/$(KERNEL_MODULE_DIR) - cp ${SDK}/make/Makefile.linux-kmodule $(BLDDIR)/$(KERNEL_MODULE_DIR)/Makefile - MOD_NAME=$(THIS_MOD_NAME) $(MAKE) -C $(BLDDIR)/$(KERNEL_MODULE_DIR) $(THIS_MOD_NAME).ko -# } -endif - -# Make.depend is before clean:: so that Make.depend's clean:: runs first. - -include ${SDK}/make/Make.depend - -clean:: - $(RM) $(BLDDIR)/version.c $(BLDDIR)/version.o - $(RM) $(BOBJS) $(MODULE) - -.PHONY: build - diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/lkm.h b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/lkm.h deleted file mode 100644 index fa534656fd5..00000000000 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/include/lkm.h +++ /dev/null @@ -1,202 +0,0 @@ -/* - * $Id: lkm.h,v 1.22 Broadcom SDK $ - * - * $Copyright: 2017-2025 Broadcom Inc. All rights reserved. - * - * Permission is granted to use, copy, modify and/or distribute this - * software under either one of the licenses below. - * - * License Option 1: GPL - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License, version 2, as - * published by the Free Software Foundation (the "GPL"). - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License version 2 (GPLv2) for more details. - * - * You should have received a copy of the GNU General Public License - * version 2 (GPLv2) along with this source code. - * - * - * License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license - * - * This software is governed by the Broadcom Open Network Switch APIs license: - * https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ - * - * - */ - -#ifndef __COMMON_LINUX_KRN_LKM_H__ -#define __COMMON_LINUX_KRN_LKM_H__ - -#ifndef __KERNEL__ -# define __KERNEL__ -#endif -#ifndef MODULE -# define MODULE -#endif - -#include -#include -#if LINUX_VERSION_CODE < KERNEL_VERSION(3,1,0) -#error Kernel too old -#endif -#include -#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0) -#if defined(INCLUDE_KNET) && LINUX_VERSION_CODE >= KERNEL_VERSION(4,0,0) -#ifdef CONFIG_NF_CONNTRACK_MODULE -#include -#endif -#endif -#include -#endif -#include - -/* Helper defines for multi-version kernel support */ -#define LKM_2_6 - -#include /* printk() */ -#include /* everything... */ -#include /* error codes */ -#include /* size_t */ -#include -#include /* O_ACCMODE */ -#include -#include -#include -#include -#include -#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,11,0) -#include -#endif -#include - -#include -#include -#include - -#ifdef CONFIG_DEVFS_FS -#include -#endif - -#define PROC_INTERFACE_KERN_VER_3_10 (LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0)) - -/* Compatibility Macros */ - -#define LKM_MOD_PARAM(n,ot,nt,d) module_param(n,nt,d) -#define LKM_MOD_PARAM_ARRAY(n,ot,nt,c,d) module_param_array(n,nt,c,d) -#define LKM_EXPORT_SYM(s) EXPORT_SYMBOL(s) -#define _free_netdev free_netdev - -#ifndef list_for_each_safe -#define list_for_each_safe(l,t,i) t = 0; list_for_each((l),(i)) -#endif - -#ifndef reparent_to_init -#define reparent_to_init() -#endif - -#ifndef MODULE_LICENSE -#define MODULE_LICENSE(str) -#endif - -#ifndef EXPORT_NO_SYMBOLS -#define EXPORT_NO_SYMBOLS -#endif - -#ifndef DEFINE_SPINLOCK -#define DEFINE_SPINLOCK(_lock) spinlock_t _lock = SPIN_LOCK_UNLOCKED -#endif - -#ifndef __SPIN_LOCK_UNLOCKED -#define __SPIN_LOCK_UNLOCKED(_lock) SPIN_LOCK_UNLOCKED -#endif - -#ifndef lock_kernel -#ifdef preempt_disable -#define lock_kernel() preempt_disable() -#else -#define lock_kernel() -#endif -#endif - -#ifndef unlock_kernel -#ifdef preempt_enable -#define unlock_kernel() preempt_enable() -#else -#define unlock_kernel() -#endif -#endif - -#ifndef init_MUTEX_LOCKED -#define init_MUTEX_LOCKED(_sem) sema_init(_sem, 0) -#endif - -#ifdef CONFIG_BCM98245 -#define CONFIG_BMW -#endif - -#if LINUX_VERSION_CODE < KERNEL_VERSION(4,8,0) -#define DMA_FORCE_CONTIGUOUS NULL -#else -#define DMA_FORCE_CONTIGUOUS DMA_ATTR_FORCE_CONTIGUOUS -#endif - -#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,5,0) -#define PROC_OWNER(_m) -#else -#define PROC_OWNER(_m) .owner = _m, -#define proc_ops file_operations -#define proc_open open -#define proc_read read -#define proc_write write -#define proc_lseek llseek -#define proc_release release -#endif - -#if PROC_INTERFACE_KERN_VER_3_10 -#define PROC_CREATE(_entry, _name, _acc, _path, _fops) \ - do { \ - _entry = proc_create(_name, _acc, _path, _fops); \ - } while (0) - -#define PROC_CREATE_DATA(_entry, _name, _acc, _path, _fops, _data) \ - do { \ - _entry = proc_create_data(_name, _acc, _path, _fops, _data); \ - } while (0) - -#define PROC_PDE_DATA(_node) PDE_DATA(_node) - -#else -#define PROC_CREATE(_entry, _name, _acc, _path, _fops) \ - do { \ - _entry = create_proc_entry(_name, _acc, _path); \ - if (_entry) { \ - _entry->proc_fops = _fops; \ - } \ - } while (0) - -#define PROC_CREATE_DATA(_entry, _name, _acc, _path, _fops, _data) \ - do { \ - _entry = create_proc_entry(_name, _acc, _path); \ - if (_entry) { \ - _entry->proc_fops = _fops; \ - _entry->data=_data; \ - } \ - } while (0) - -#define PROC_PDE_DATA(_node) PROC_I(_node)->pde->data -#endif - -#if LINUX_VERSION_CODE < KERNEL_VERSION(4,19,0) -#define strscpy strlcpy -#endif - -#if LINUX_VERSION_CODE < KERNEL_VERSION(6,11,0) -#define kernel_ethtool_ts_info ethtool_ts_info -#endif - -#endif /* __COMMON_LINUX_KRN_LKM_H__ */ diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/knet-cb/Makefile b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/knet-cb/Makefile deleted file mode 100644 index 33c94b514d6..00000000000 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/knet-cb/Makefile +++ /dev/null @@ -1,127 +0,0 @@ -# -*- Makefile -*- -# $Id: Makefile,v 1.3 Broadcom SDK $ -# -# $Copyright: 2017-2025 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ -# -# -# -LOCALDIR = systems/linux/kernel/modules/knet-cb - -include ${SDK}/make/Make.config - -LIBS = $(LIBDIR)/libkern.a - -ifeq (1,$(BUILD_DCBLIB)) -ifndef DCBDIR -DCBDIR = $(SDK)/systems/linux/kernel/modules/dcb -# $(error 'The $$DCBDIR variable is not set') -endif -ifeq (1,$(NO_PRECOMPILED_MODULE)) -$(error 'DCB_LIB build is not supported if NO_PRECOMPILED_MODULE=1') -endif -LIBS += $(LIBDIR)/libdcb.a -CFLAGS += -DDCBLIB_SUPPORT -I$(DCBDIR)/include -endif - -KERNEL_MODULE_DIR = kernel_module - -THIS_MOD_NAME := linux-knet-cb -MODULE = $(LIBDIR)/$(THIS_MOD_NAME).o -KMODULE = $(LIBDIR)/$(THIS_MOD_NAME).ko - -# BCM Network Device - -ifeq (1,$(NO_PRECOMPILED_MODULE)) -# { -KBUILD_EXTRA_SYMBOLS := ${BLDDIR}/../bcm-knet/Module.symvers -export KBUILD_EXTRA_SYMBOLS -# -# These are the objects which need to be compiled, in the kernel, to -# created the module object file. -# -SRCS_COMPOSING = knet-cb.c ../shared/gmodule.c -OBJECTS_COMPOSING = "knet-cb.o gmodule.o" - -build: $(KMODULE) -# -# Note that for NO_PRECOMPILED_MODULE, the subdirectory 'systems/linux/kernel/modules/knet-cb/kernel_module' -# is not created and all action is done in systems/linux/kernel/modules/knet-cb -# -$(KMODULE): $(SRCS_COMPOSING) - mkdir -p $(BLDDIR) - rm -fr $(BLDDIR)/$(KERNEL_MODULE_DIR) - rm -f $(BLDDIR)/*.c - rm -f $(BLDDIR)/*.o - rm -f $(BLDDIR)/*.ko - cp ${SDK}/make/Makefile.linux-kmodule $(BLDDIR)/Makefile - cp ./*.c $(BLDDIR)/ - cp ../shared/*.c $(BLDDIR)/ - # - # Wait until bcm-knet compilation is over so that we can copy its resultant - # Module.symvers - # - if [ ! -f ${KBUILD_EXTRA_SYMBOLS} ]; then sleep 5; fi - cat ${KBUILD_EXTRA_SYMBOLS} > $(BLDDIR)/Module.symvers - MOD_OBJS=$(OBJECTS_COMPOSING) MOD_NAME=$(THIS_MOD_NAME) $(MAKE) -C $(BLDDIR) $(THIS_MOD_NAME).ko LOC_BLDDIR=$(BLDDIR) LOC_SRCDIR=$(PWD) -# } -else -# { -KBUILD_EXTRA_SYMBOLS := ${BLDDIR}/../bcm-knet/kernel_module/Module.symvers -export KBUILD_EXTRA_SYMBOLS - -build: $(MODULE) $(KMODULE) -# -# This is for the compilation of the 'precompiled' object. We keep it -# here for compatibility. -# -$(LIBDIR)/libdcb.a: - $(MAKE) -C $(DCBDIR)/make BLDDIR=$(LIBDIR) \ - KADD_CFLAGS="-I${SDK}/systems/linux/kernel/modules/include $(KFLAGS) -D$(ENDIAN)" \ - CROSS_COMPILE=$(CROSS_COMPILE) - -$(MODULE): $(BLDDIR)/.tree $(BOBJS) $(LIBS) - $(LD) $(MODULE_LDFLAGS) -r -d $(BOBJS) $(LIBS) -o $@ - -$(KMODULE): $(MODULE) - rm -fr $(BLDDIR)/$(KERNEL_MODULE_DIR) - mkdir $(BLDDIR)/$(KERNEL_MODULE_DIR) - cp ${SDK}/make/Makefile.linux-kmodule $(BLDDIR)/$(KERNEL_MODULE_DIR)/Makefile - cat ${KBUILD_EXTRA_SYMBOLS} > $(BLDDIR)/$(KERNEL_MODULE_DIR)/Module.symvers - MOD_NAME=$(THIS_MOD_NAME) $(MAKE) -C $(BLDDIR)/$(KERNEL_MODULE_DIR) $(THIS_MOD_NAME).ko - -# Make.depend is before clean:: so that Make.depend's clean:: runs first. -include ${SDK}/make/Make.depend -# } -endif - -clean:: - $(RM) $(BLDDIR)/version.c $(BLDDIR)/version.o - $(RM) $(BOBJS) $(MODULE) -ifeq (1,$(BUILD_DCBLIB)) - $(MAKE) -C $(DCBDIR)/make BLDDIR=$(LIBDIR) clean -endif - -.PHONY: build diff --git a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/shared/Makefile b/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/shared/Makefile deleted file mode 100644 index d87d0f64e98..00000000000 --- a/platform/broadcom/saibcm-modules/systems/linux/kernel/modules/shared/Makefile +++ /dev/null @@ -1,46 +0,0 @@ -# -*- Makefile -*- -# $Id: Makefile,v 1.2 Broadcom SDK $ -# -# $Copyright: 2017-2025 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ -# -# -# -LOCALDIR = systems/linux/kernel/modules/shared - -include ${SDK}/make/Make.config - -ifeq (1,$(THREAD_SANITIZER_IS_ACTIVE)) -# { - $(warning ./systems/linux/kernel/modules/shared/Makefile. Do not apply THREAD SANITIZER to kernel objects) - override CFLAGS := $(subst -fsanitize=thread, ,$(CFLAGS)) -# } -endif - -lib = libkern - -include ${SDK}/make/Make.kernlib - -include ${SDK}/make/Make.depend diff --git a/platform/broadcom/saibcm-modules/systems/linux/user/common/Makefile b/platform/broadcom/saibcm-modules/systems/linux/user/common/Makefile deleted file mode 100644 index 524b79fd2c4..00000000000 --- a/platform/broadcom/saibcm-modules/systems/linux/user/common/Makefile +++ /dev/null @@ -1,324 +0,0 @@ -# -*- Makefile -*- -# $Id: Makefile,v 1.4 Broadcom SDK $ -# -# $Copyright: 2017-2025 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ -# -# -# - -SDK :=$(shell if [ -n "$$SDK" ] ; then\ - echo $$SDK;\ - else\ - cd $(dir $(lastword $(MAKEFILE_LIST))); while /usr/bin/test ! -e RELEASE ; do \ - dir=`cd ../;pwd`; \ - if [ "$$dir" = "/" ] ; then \ - echo Cannot find SDK in $(lastword $(MAKEFILE_LIST)) 1>&2; \ - exit 1; \ - fi ; \ - cd $$dir; \ - done ; \ - pwd; \ - fi) - -ifeq ($(SDK),) -$(error Please run this in a tree) -endif - -export SDK - -override-target=linux-$(platform) - -ifeq ($(LINUX_MAKE_SHARED_LIB),1) -libext = so.$(SHAREDLIBVER) -else -libext = a -endif - -ifeq (,$(platform)) -$(error Internal error: platform variable is not set) -endif - -include $(SDK)/make/Make.config -LOCALDIR=systems/linux/user/common -include $(SDK)/make/Make.depend -kernel-override=linux-$(platform) -ifdef BLDCONFIG -KERN_BLDROOT=${SDK}/${SDKBUILD}/${BLDCONFIG}/$(kernel-override)$(bldroot_suffix) -else -ifdef SDK_OUTDIR -KERN_BLDROOT=${SDK_OUTDIR}/${SDKBUILD}/$(kernel-override)$(bldroot_suffix) -else -KERN_BLDROOT=${SDK}/${SDKBUILD}/$(kernel-override)$(bldroot_suffix) -endif -endif - -ifeq (,$(kernel_version)) -kernel_version=2_4 -endif - -ifneq ($(kernel_version),2_4) -KOBJ=ko -else -KOBJ=o -endif - -ifneq (,$(TOOLS_DIR)) -override PATH := $(TOOLS_DIR):$(PATH) -endif - -ifeq ($(DEST_DIR),) -DEST_DIR=${BLDDIR} -endif - -KERNEL_BDE_LOCAL := linux-kernel-bde.$(KOBJ) -KERNEL_BDE := $(DEST_DIR)/$(KERNEL_BDE_LOCAL) - -USER_BDE_LOCAL := linux-user-bde.$(KOBJ) -USER_BDE := $(DEST_DIR)/$(USER_BDE_LOCAL) - -KNET_CB_LOCAL := linux-knet-cb.$(KOBJ) -KNET_CB := $(DEST_DIR)/$(KNET_CB_LOCAL) - -export BUILD_BCM_GENL=1 -export BUILD_GENL_PACKET=0 -GENL_PACKET_LOCAL := genl-packet.$(KOBJ) -GENL_PACKET := $(DEST_DIR)/$(GENL_PACKET_LOCAL) -ifndef BUILD_GENL_PACKET -export BUILD_GENL_PACKET = 1 -endif - -BCM_GENL_LOCAL := linux-bcm-genl.$(KOBJ) -BCM_GENL := $(DEST_DIR)/$(BCM_GENL_LOCAL) - -BCM_KNET_LOCAL := linux-bcm-knet.$(KOBJ) -BCM_KNET := $(DEST_DIR)/$(BCM_KNET_LOCAL) - -BCM_PTP_LOCAL := linux-bcm-ptp-clock.$(KOBJ) -BCM_PTP := $(DEST_DIR)/$(BCM_PTP_LOCAL) - -ifeq (,$(findstring DELIVER,$(MAKECMDGOALS))) -.DEFAULT_GOAL := all -all_targets := kernel_modules $(KERNEL_BDE) $(USER_BDE) - -LOCAL_TARGETS := - -ifeq ($(NO_LOCAL_TARGETS),) -LOCAL_TARGETS +=$(patsubst %,$(realpath ..)/$(platform)/%,$(KERNEL_BDE_LOCAL) $(USER_BDE_LOCAL)) - -all_targets +=$(LOCAL_TARGETS) -endif - -# Build all by default -ifndef BUILD_KNET -BUILD_KNET = 1 -endif - -ifndef BUILD_PTP -BUILD_PTP = 1 -endif - -ifeq ($(BUILD_KNET),1) -# Kernel network support -all_targets += $(BCM_KNET) -knet_subdirs = bcm-knet - -ifeq ($(NO_LOCAL_TARGETS),) -LOCAL_TARGETS +=$(patsubst %,../$(platform)/%,$(BCM_KNET_LOCAL)) -all_targets +=$(LOCAL_TARGETS) -endif - -ifdef BUILD_KNET_CB -all_targets += $(KNET_CB) -knet_subdirs += knet-cb - -ifdef BUILD_PTP -all_targets += $(BCM_PTP) -knet_subdirs += bcm-ptp-clock -endif - -ifeq ($(NO_LOCAL_TARGETS),) -LOCAL_TARGETS +=$(patsubst %,../$(platform)/%,$(KNET_CB_LOCAL)) -all_targets +=$(LOCAL_TARGETS) -endif -endif - -ifeq ($(BUILD_BCM_GENL),1) -ifeq ($(BUILD_GENL_PACKET),1) -all_targets += $(GENL_PACKET) -knet_subdirs += genl-packet - -ifeq ($(NO_LOCAL_TARGETS),) -LOCAL_TARGETS +=$(patsubst %,../$(platform)/%,$(GENL_PACKET_LOCAL)) -all_targets +=$(LOCAL_TARGETS) -endif -endif -all_targets += $(BCM_GENL) -knet_subdirs += bcm-genl - -ifeq ($(NO_LOCAL_TARGETS),) -LOCAL_TARGETS +=$(patsubst %,../$(platform)/%,$(BCM_GENL_LOCAL)) -all_targets +=$(LOCAL_TARGETS) -endif -endif - -ADD_TO_CFLAGS += -I$(SDK)/systems/linux/kernel/modules/include -COND_KNET_LIBS = libuser.$(libext) -endif - -all: $(BLDDIR)/.tree $(all_targets) - -ifeq ($(NO_LOCAL_TARGETS),) -define LOCAL_TARGET_DEF -$(1) : $(DEST_DIR)/$(notdir $(1)) - cp $$? $$@ -endef -endif - -ifeq (1,$(USE_CLANG)) -OPT_KERNEL_TOOLCHAIN = CC=clang LD=ld.lld AR=llvm-ar -include $(SDK)/make/Make.clang -ADD_TO_KCFLAGS += $(CLANG_ADD_CFLAGS) -endif - -# User BDE libraries -ADD_TO_CFLAGS += -I$(SDK)/systems/bde/linux/include - -CFLAGS += $(ADD_TO_CFLAGS) - -#SAI_FIXUP -CFLAGS:=$(filter-out -fPIC, $(CFLAGS)) - -kernel_modules: - $(MAKE) -C $(SDK)/systems/bde/linux/kernel $(OPT_KERNEL_TOOLCHAIN) kernel_version=$(kernel_version) \ - OPT_CFLAGS="$(ADD_TO_KCFLAGS)" - $(MAKE) -C $(SDK)/systems/bde/linux/user/kernel $(OPT_KERNEL_TOOLCHAIN) kernel_version=$(kernel_version) \ - OPT_CFLAGS="$(ADD_TO_KCFLAGS)" -ifeq ($(BUILD_KNET),1) - $(MAKE) -C $(SDK)/systems/linux/kernel/modules/shared $(OPT_KERNEL_TOOLCHAIN) kernel_version=$(kernel_version) \ - OPT_CFLAGS="$(ADD_TO_KCFLAGS)" override-target=linux-$(platform) - $(MAKE) -C $(SDK)/systems/linux/kernel/modules/bcm-knet $(OPT_KERNEL_TOOLCHAIN) kernel_version=$(kernel_version) \ - OPT_CFLAGS="$(ADD_TO_KCFLAGS)" override-target=linux-$(platform) -ifneq (,$(filter knet-cb,$(knet_subdirs))) - $(MAKE) -C $(SDK)/systems/linux/kernel/modules/knet-cb $(OPT_KERNEL_TOOLCHAIN) kernel_version=$(kernel_version) \ - OPT_CFLAGS="$(ADD_TO_KCFLAGS)" override-target=linux-$(platform) -endif -ifneq (,$(filter bcm-ptp-clock,$(knet_subdirs))) - $(MAKE) -C $(SDK)/systems/linux/kernel/modules/bcm-ptp-clock $(OPT_KERNEL_TOOLCHAIN) kernel_version=$(kernel_version) \ - OPT_CFLAGS="$(ADD_TO_KCFLAGS)" override-target=linux-$(platform) -endif -ifneq (,$(filter bcm-genl,$(knet_subdirs))) -ifneq (,$(filter genl-packet,$(knet_subdirs))) - $(MAKE) -C $(SDK)/systems/linux/kernel/modules/genl-packet $(OPT_KERNEL_TOOLCHAIN) kernel_version=$(kernel_version) \ - OPT_CFLAGS="$(ADD_TO_KCFLAGS)" override-target=linux-$(platform) -endif - $(MAKE) -C $(SDK)/systems/linux/kernel/modules/bcm-genl $(OPT_KERNEL_TOOLCHAIN) kernel_version=$(kernel_version) \ - OPT_CFLAGS="$(ADD_TO_KCFLAGS)" override-target=linux-$(platform) -endif -endif - -$(KERNEL_BDE): $(KERN_BLDROOT)/$(KERNEL_BDE_LOCAL) - mkdir -p $(@D) - $(OBJCOPY) --strip-debug $< $@ - -$(USER_BDE): $(KERN_BLDROOT)/$(USER_BDE_LOCAL) - $(OBJCOPY) --strip-debug $< $@ - -$(BCM_KNET): $(KERN_BLDROOT)/$(BCM_KNET_LOCAL) - $(OBJCOPY) --strip-debug $< $@ - -$(KNET_CB): $(KERN_BLDROOT)/$(KNET_CB_LOCAL) - $(OBJCOPY) --strip-debug $< $@ - -$(BCM_PTP): $(KERN_BLDROOT)/$(BCM_PTP_LOCAL) - $(OBJCOPY) --strip-debug $< $@ - -$(GENL_PACKET): $(KERN_BLDROOT)/$(GENL_PACKET_LOCAL) - $(OBJCOPY) --strip-debug $< $@ - -$(BCM_GENL): $(KERN_BLDROOT)/$(BCM_GENL_LOCAL) - $(OBJCOPY) --strip-debug $< $@ - -$(KERN_BLDROOT)/%.$(KOBJ): kernel_modules - @echo Force execution of kernel_modules target > /dev/null - -ifeq ($(NO_LOCAL_TARGETS),) -$(foreach targ,$(LOCAL_TARGETS),$(eval $(call LOCAL_TARGET_DEF,$(targ)))) -endif - -clean:: - $(MAKE) -C $(SDK)/systems/bde/linux/kernel $@ - $(MAKE) -C $(SDK)/systems/bde/linux/user/kernel $@ - $(MAKE) -C $(SDK)/systems/linux/kernel/modules \ - subdirs="shared $(knet_subdirs)" \ - override-target=linux-$(platform) $@ - $(RM) $(KERNEL_BDE) $(USER_BDE) - $(RM) $(BCM_KNET) $(KNET_CB) $(GENL_PACKET) $(BCM_GENL) - $(RM) $(KERN_BLDROOT)/$(KERNEL_BDE_LOCAL) - $(RM) $(KERN_BLDROOT)/$(USER_BDE_LOCAL) - $(RM) $(KERN_BLDROOT)/$(BCM_KNET_LOCAL) - $(RM) $(KERN_BLDROOT)/$(KNET_CB_LOCAL) - $(RM) $(KERN_BLDROOT)/$(GENL_PACKET_LOCAL) - $(RM) $(KERN_BLDROOT)/$(BCM_GENL_LOCAL) - $(RM) $(KERN_BLDROOT)/$(BCM_PTP_LOCAL) - $(RM) $(LOCAL_TARGETS) - -distclean:: clean - -.PHONY: variable - -# -# Echo variable values used for configuration -# usage: make VAR=CC variable -# -variable:: - @echo $($(VAR)) - -else -ifndef DELIVERY -$(error DELIVERY required) -endif - -DELIVERABLES := $(KERNEL_BDE) $(USER_BDE) -# 1= source -define DELIVERY_RULE -_DEL_TARG += $(DELIVERY)/$(notdir $(1)) -$(DELIVERY)/$(notdir $(1)) : $(1) - @mkdir -p $(DELIVERY) -ifeq ($(filter $(notdir $(BCM)) $(notdir $(BCM).dbg),$(notdir $1)),) - $(OBJCOPY) --strip-debug $$< $$@ -else - $(CP) -p $$< $$@ -endif -endef - -$(foreach f,$(DELIVERABLES),$(eval $(call DELIVERY_RULE,$(f)))) - -DELIVER: $(_DEL_TARG) -endif - -# Make.config defines remaining phony targets -.PHONY: build kernel_modules DELIVER - diff --git a/platform/broadcom/saibcm-modules/systems/linux/user/gts/Makefile b/platform/broadcom/saibcm-modules/systems/linux/user/gts/Makefile deleted file mode 100644 index 46977648988..00000000000 --- a/platform/broadcom/saibcm-modules/systems/linux/user/gts/Makefile +++ /dev/null @@ -1,72 +0,0 @@ -# -*- Makefile -*- -# $Id: Makefile,v 0.1 Broadcom SDK $ -# -# $Copyright: 2017-2025 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ -# -# - -# -# This make job requires the following environment variables to be set: -# -# SDK - path to StrataXGS SDK root directory -# -# Optionally the following environment variables can be set to -# override the default build server configuration: -# -# TOOLS_DIR - path to build tools (if not in PATH already) -# CROSS_COMPILE - cross compile tools prefix -# LINUX_INCLUDE - path to Linux kernel include directory -# - -SDK :=$(shell if [ -n "$$SDK" ] ; then\ - echo $$SDK;\ - else\ - cd $(dir $(lastword $(MAKEFILE_LIST))); while /usr/bin/test ! -e RELEASE ; do \ - dir=`cd ../;pwd`; \ - if [ "$$dir" = "/" ] ; then \ - echo Cannot find SDK in $(lastword $(MAKEFILE_LIST)) 1>&2; \ - exit 1; \ - fi ; \ - cd $$dir; \ - done ; \ - pwd; \ - fi) - -ifeq ($(SDK),) -$(error Please run this in a tree) -endif - -export SDK - -override kernel_version=6_12 -platform=gts - -export LINKER_RELAX = 1 -export ADD_TO_CFLAGS -export BR_NO_CCACHE - -include ${SDK}/make/Make.linux - diff --git a/platform/broadcom/saibcm-modules/systems/linux/user/iproc-3_14/Makefile b/platform/broadcom/saibcm-modules/systems/linux/user/iproc-3_14/Makefile deleted file mode 100644 index 846dd74fcee..00000000000 --- a/platform/broadcom/saibcm-modules/systems/linux/user/iproc-3_14/Makefile +++ /dev/null @@ -1,74 +0,0 @@ -# -*- Makefile -*- -# $Id: Makefile,v 1.7 Broadcom SDK $ -# -# $Copyright: 2017-2025 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ -# -# - -# -# This make job requires the following environment variables to be set: -# -# SDK - path to StrataXGS SDK root directory -# -# Optionally the following environment variables can be set to -# override the default build server configuration: -# -# MIPS_TOOLS_DIR - path to build tools (if not in PATH already) -# MIPS_CROSS_COMPILE - cross compile tools prefix -# LINUX_INCLUDE - path to Linux kernel include directory -# - -SDK :=$(shell if [ -n "$$SDK" ] ; then\ - echo $$SDK;\ - else\ - cd $(dir $(lastword $(MAKEFILE_LIST))); while /usr/bin/test ! -e RELEASE ; do \ - dir=`cd ../;pwd`; \ - if [ "$$dir" = "/" ] ; then \ - echo Cannot find SDK in $(lastword $(MAKEFILE_LIST)) 1>&2; \ - exit 1; \ - fi ; \ - cd $$dir; \ - done ; \ - pwd; \ - fi) - -ifeq ($(SDK),) -$(error Please run this in a tree) -endif - -export SDK - -override kernel_version=3_14 -platform=iproc-$(kernel_version) - -IPROC_BUILD=1 -export IPROC_BUILD -export BUILD_PLATFORM -export ARM_LINUX_VERSION - -export ADD_TO_CFLAGS - -include ${SDK}/make/Make.linux diff --git a/platform/broadcom/saibcm-modules/systems/linux/user/iproc-4_4/Makefile b/platform/broadcom/saibcm-modules/systems/linux/user/iproc-4_4/Makefile deleted file mode 100644 index eff1890ec55..00000000000 --- a/platform/broadcom/saibcm-modules/systems/linux/user/iproc-4_4/Makefile +++ /dev/null @@ -1,68 +0,0 @@ -# -*- Makefile -*- -# $Id: Makefile,v 1.7 Broadcom SDK $ -# -# $Copyright: 2017-2025 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ -# -# - -# -# This make job requires the following environment variables to be set: -# -# SDK - path to StrataXGS SDK root directory -# - -SDK :=$(shell if [ -n "$$SDK" ] ; then\ - echo $$SDK;\ - else\ - cd $(dir $(lastword $(MAKEFILE_LIST))); while /usr/bin/test ! -e RELEASE ; do \ - dir=`cd ../;pwd`; \ - if [ "$$dir" = "/" ] ; then \ - echo Cannot find SDK in $(lastword $(MAKEFILE_LIST)) 1>&2; \ - exit 1; \ - fi ; \ - cd $$dir; \ - done ; \ - pwd; \ - fi) - -ifeq ($(SDK),) -$(error Please run this in a tree) -endif - -export SDK - -override kernel_version=4_4 -platform=iproc-$(kernel_version) - -IPROC_BUILD=1 -export IPROC_BUILD -export BUILD_PLATFORM -export ARM_LINUX_VERSION - -export ADD_TO_CFLAGS -export BR_NO_CCACHE - -include ${SDK}/make/Make.linux diff --git a/platform/broadcom/saibcm-modules/systems/linux/user/iproc/Makefile b/platform/broadcom/saibcm-modules/systems/linux/user/iproc/Makefile deleted file mode 100644 index 2b0c889fc45..00000000000 --- a/platform/broadcom/saibcm-modules/systems/linux/user/iproc/Makefile +++ /dev/null @@ -1,68 +0,0 @@ -# -*- Makefile -*- -# $Id: Makefile,v 1.7 Broadcom SDK $ -# -# $Copyright: 2017-2025 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ -# -# - -# -# This make job requires the following environment variables to be set: -# -# SDK - path to StrataXGS SDK root directory -# - -SDK :=$(shell if [ -n "$$SDK" ] ; then\ - echo $$SDK;\ - else\ - cd $(dir $(lastword $(MAKEFILE_LIST))); while /usr/bin/test ! -e RELEASE ; do \ - dir=`cd ../;pwd`; \ - if [ "$$dir" = "/" ] ; then \ - echo Cannot find SDK in $(lastword $(MAKEFILE_LIST)) 1>&2; \ - exit 1; \ - fi ; \ - cd $$dir; \ - done ; \ - pwd; \ - fi) - -ifeq ($(SDK),) -$(error Please run this in a tree) -endif - -export SDK - -override kernel_version=6_6 -platform=iproc - -IPROC_BUILD=1 -export IPROC_BUILD -export BUILD_PLATFORM -export ARM_LINUX_VERSION - -export ADD_TO_CFLAGS -export BR_NO_CCACHE - -include ${SDK}/make/Make.linux diff --git a/platform/broadcom/saibcm-modules/systems/linux/user/iproc_64/Makefile b/platform/broadcom/saibcm-modules/systems/linux/user/iproc_64/Makefile deleted file mode 100644 index 93c56df593b..00000000000 --- a/platform/broadcom/saibcm-modules/systems/linux/user/iproc_64/Makefile +++ /dev/null @@ -1,68 +0,0 @@ -# -*- Makefile -*- -# $Id: Makefile,v 1.7 Broadcom SDK $ -# -# $Copyright: 2017-2025 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ -# -# - -# -# This make job requires the following environment variables to be set: -# -# SDK - path to StrataXGS SDK root directory -# - -SDK :=$(shell if [ -n "$$SDK" ] ; then\ - echo $$SDK;\ - else\ - cd $(dir $(lastword $(MAKEFILE_LIST))); while /usr/bin/test ! -e RELEASE ; do \ - dir=`cd ../;pwd`; \ - if [ "$$dir" = "/" ] ; then \ - echo Cannot find SDK in $(lastword $(MAKEFILE_LIST)) 1>&2; \ - exit 1; \ - fi ; \ - cd $$dir; \ - done ; \ - pwd; \ - fi) - -ifeq ($(SDK),) -$(error Please run this in a tree) -endif - -export SDK - -override kernel_version=6_6 -platform=iproc_64 - -IPROC_BUILD=1 -export IPROC_BUILD -export BUILD_PLATFORM -export ARM_LINUX_VERSION - -export ADD_TO_CFLAGS -export BR_NO_CCACHE - -include ${SDK}/make/Make.linux diff --git a/platform/broadcom/saibcm-modules/systems/linux/user/slk/Makefile b/platform/broadcom/saibcm-modules/systems/linux/user/slk/Makefile deleted file mode 100644 index 0c052f3a962..00000000000 --- a/platform/broadcom/saibcm-modules/systems/linux/user/slk/Makefile +++ /dev/null @@ -1,72 +0,0 @@ -# -*- Makefile -*- -# $Id: Makefile,v 0.1 Broadcom SDK $ -# -# $Copyright: 2017-2025 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ -# -# - -# -# This make job requires the following environment variables to be set: -# -# SDK - path to StrataXGS SDK root directory -# -# Optionally the following environment variables can be set to -# override the default build server configuration: -# -# TOOLS_DIR - path to build tools (if not in PATH already) -# CROSS_COMPILE - cross compile tools prefix -# LINUX_INCLUDE - path to Linux kernel include directory -# - -SDK :=$(shell if [ -n "$$SDK" ] ; then\ - echo $$SDK;\ - else\ - cd $(dir $(lastword $(MAKEFILE_LIST))); while /usr/bin/test ! -e RELEASE ; do \ - dir=`cd ../;pwd`; \ - if [ "$$dir" = "/" ] ; then \ - echo Cannot find SDK in $(lastword $(MAKEFILE_LIST)) 1>&2; \ - exit 1; \ - fi ; \ - cd $$dir; \ - done ; \ - pwd; \ - fi) - -ifeq ($(SDK),) -$(error Please run this in a tree) -endif - -export SDK - -override kernel_version=6_6 -platform=slk - -export LINKER_RELAX = 1 -export ADD_TO_CFLAGS -export BR_NO_CCACHE - -include ${SDK}/make/Make.linux - diff --git a/platform/broadcom/saibcm-modules/systems/linux/user/x86-5_10/Makefile b/platform/broadcom/saibcm-modules/systems/linux/user/x86-5_10/Makefile deleted file mode 100644 index bdf30d5dcf9..00000000000 --- a/platform/broadcom/saibcm-modules/systems/linux/user/x86-5_10/Makefile +++ /dev/null @@ -1,82 +0,0 @@ -# -*- Makefile -*- -# $Id: Makefile,v 0.1 Broadcom SDK $ -# -# $Copyright: 2017-2025 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ -# -# - -# -# This make job requires the following environment variables to be set: -# -# SDK - path to StrataXGS SDK root directory -# -# Optionally the following environment variables can be set to -# override the default build server configuration: -# -# TOOLS_DIR - path to build tools (if not in PATH already) -# CROSS_COMPILE - cross compile tools prefix -# LINUX_INCLUDE - path to Linux kernel include directory -# - -# SHARED_LIBRARY_SUPPORT will enable the shared library creation - update the BINUTILSVER version. -ifneq ($(filter $(SHARED_LIBRARY_SUPPORT) $(COMPILE_OPENNSA_SUPPORT),1),) -# Newer GNU BINUTILS are neeed in order to avoid a known internal bug -# in GCC that results in a linker error when creating a .so library -export BINUTILSVER = 2.27 -endif - -SDK :=$(shell if [ -n "$$SDK" ] ; then\ - echo $$SDK;\ - else\ - cd $(dir $(lastword $(MAKEFILE_LIST))); while /usr/bin/test ! -e RELEASE ; do \ - dir=`cd ../;pwd`; \ - if [ "$$dir" = "/" ] ; then \ - echo Cannot find SDK in $(lastword $(MAKEFILE_LIST)) 1>&2; \ - exit 1; \ - fi ; \ - cd $$dir; \ - done ; \ - pwd; \ - fi) - -ifeq ($(SDK),) -$(error Please run this in a tree) -endif - -export SDK - -override kernel_version=5_10 -platform=x86-5_10 - -export LINKER_RELAX = 1 - -# SHARED_LIBRARY_SUPPORT will enable the shared library creation - add a PIC to the compilation flags. -ifneq ($(filter $(SHARED_LIBRARY_SUPPORT) $(COMPILE_OPENNSA_SUPPORT),1),) -ADD_TO_CFLAGS = -frecord-gcc-switches -DSAL_THREAD_STACK_MIN=8388608 -export ADD_TO_CFLAGS -endif - -include ${SDK}/make/Make.linux diff --git a/platform/broadcom/saibcm-modules/systems/linux/user/x86-64-fc28/Makefile b/platform/broadcom/saibcm-modules/systems/linux/user/x86-64-fc28/Makefile deleted file mode 100644 index 663755f0908..00000000000 --- a/platform/broadcom/saibcm-modules/systems/linux/user/x86-64-fc28/Makefile +++ /dev/null @@ -1,86 +0,0 @@ -# -*- Makefile -*- -# $Id: Makefile,v 0.1 Broadcom SDK $ -# -# $Copyright: 2017-2025 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ -# -# - -# -# This make job requires the following environment variables to be set: -# -# SDK - path to StrataXGS SDK root directory -# -# Optionally the following environment variables can be set to -# override the default build server configuration: -# -# TOOLS_DIR - path to build tools (if not in PATH already) -# CROSS_COMPILE - cross compile tools prefix -# LINUX_INCLUDE - path to Linux kernel include directory -# - -# SHARED_LIBRARY_SUPPORT will enable the shared library creation - update the BINUTILSVER version. -ifneq ($(filter $(SHARED_LIBRARY_SUPPORT) $(COMPILE_OPENNSA_SUPPORT),1),) -# Newer GNU BINUTILS are neeed in order to avoid a known internal bug -# in GCC that results in a linker error when creating a .so library -export BINUTILSVER = 2.27 -endif - -SDK :=$(shell if [ -n "$$SDK" ] ; then\ - echo $$SDK;\ - else\ - cd $(dir $(lastword $(MAKEFILE_LIST))); while /usr/bin/test ! -e RELEASE ; do \ - dir=`cd ../;pwd`; \ - if [ "$$dir" = "/" ] ; then \ - echo Cannot find SDK in $(lastword $(MAKEFILE_LIST)) 1>&2; \ - exit 1; \ - fi ; \ - cd $$dir; \ - done ; \ - pwd; \ - fi) - -ifeq ($(SDK),) -$(error Please run this in a tree) -endif - -export SDK - -ifeq (1,$(KERNEL_5_10)) -override kernel_version=5_10 -else -override kernel_version=4_18 -endif -platform=x86-64-fc28 - -export LINKER_RELAX = 1 - -# SHARED_LIBRARY_SUPPORT will enable the shared library creation - add a PIC to the compilation flags. -ifneq ($(filter $(SHARED_LIBRARY_SUPPORT) $(COMPILE_OPENNSA_SUPPORT),1),) -ADD_TO_CFLAGS = -frecord-gcc-switches -DSAL_THREAD_STACK_MIN=8388608 -export ADD_TO_CFLAGS -endif - -include ${SDK}/make/Make.linux diff --git a/platform/broadcom/saibcm-modules/systems/linux/user/x86-smp_generic_64-2_6/Makefile b/platform/broadcom/saibcm-modules/systems/linux/user/x86-smp_generic_64-2_6/Makefile deleted file mode 100644 index 0e831a6c782..00000000000 --- a/platform/broadcom/saibcm-modules/systems/linux/user/x86-smp_generic_64-2_6/Makefile +++ /dev/null @@ -1,54 +0,0 @@ -# -*- Makefile -*- -# $Id: Makefile,v 1.2 Broadcom SDK $ -# -# $Copyright: 2017-2025 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ -# -# - -SDK :=$(shell if [ -n "$$SDK" ] ; then\ - echo $$SDK;\ - else\ - cd $(dir $(lastword $(MAKEFILE_LIST))); while /usr/bin/test ! -e RELEASE ; do \ - dir=`cd ../;pwd`; \ - if [ "$$dir" = "/" ] ; then \ - echo Cannot find SDK in $(lastword $(MAKEFILE_LIST)) 1>&2; \ - exit 1; \ - fi ; \ - cd $$dir; \ - done ; \ - pwd; \ - fi) - -ifeq ($(SDK),) -$(error Please run this in a tree) -endif - -export SDK - -override kernel_version=2_6 -platform=x86-smp_generic_64-$(kernel_version) - -include ${SDK}/make/Make.linux diff --git a/platform/broadcom/saibcm-modules/systems/linux/user/xlr/Makefile b/platform/broadcom/saibcm-modules/systems/linux/user/xlr/Makefile deleted file mode 100644 index 7fa9ad27be8..00000000000 --- a/platform/broadcom/saibcm-modules/systems/linux/user/xlr/Makefile +++ /dev/null @@ -1,72 +0,0 @@ -# -*- Makefile -*- -# $Id: Makefile,v 0.1 Broadcom SDK $ -# -# $Copyright: 2017-2025 Broadcom Inc. All rights reserved. -# -# Permission is granted to use, copy, modify and/or distribute this -# software under either one of the licenses below. -# -# License Option 1: GPL -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License, version 2, as -# published by the Free Software Foundation (the "GPL"). -# -# This program is distributed in the hope that it will be useful, but -# WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -# General Public License version 2 (GPLv2) for more details. -# -# You should have received a copy of the GNU General Public License -# version 2 (GPLv2) along with this source code. -# -# -# License Option 2: Broadcom Open Network Switch APIs (OpenNSA) license -# -# This software is governed by the Broadcom Open Network Switch APIs license: -# https://www.broadcom.com/products/ethernet-connectivity/software/opennsa $ -# -# - -# -# This make job requires the following environment variables to be set: -# -# SDK - path to StrataXGS SDK root directory -# -# Optionally the following environment variables can be set to -# override the default build server configuration: -# -# TOOLS_DIR - path to build tools (if not in PATH already) -# CROSS_COMPILE - cross compile tools prefix -# LINUX_INCLUDE - path to Linux kernel include directory -# - -SDK :=$(shell if [ -n "$$SDK" ] ; then\ - echo $$SDK;\ - else\ - cd $(dir $(lastword $(MAKEFILE_LIST))); while /usr/bin/test ! -e RELEASE ; do \ - dir=`cd ../;pwd`; \ - if [ "$$dir" = "/" ] ; then \ - echo Cannot find SDK in $(lastword $(MAKEFILE_LIST)) 1>&2; \ - exit 1; \ - fi ; \ - cd $$dir; \ - done ; \ - pwd; \ - fi) - -ifeq ($(SDK),) -$(error Please run this in a tree) -endif - -export SDK - -override kernel_version=6_12 -platform=xlr - -export LINKER_RELAX = 1 -export ADD_TO_CFLAGS -export BR_NO_CCACHE - -include ${SDK}/make/Make.linux - diff --git a/platform/broadcom/sonic-platform-modules-accton/as4630-54pe/modules/x86-64-accton-as4630-54pe-cpld.c b/platform/broadcom/sonic-platform-modules-accton/as4630-54pe/modules/x86-64-accton-as4630-54pe-cpld.c index 8450b1f73bb..88376bd45be 100644 --- a/platform/broadcom/sonic-platform-modules-accton/as4630-54pe/modules/x86-64-accton-as4630-54pe-cpld.c +++ b/platform/broadcom/sonic-platform-modules-accton/as4630-54pe/modules/x86-64-accton-as4630-54pe-cpld.c @@ -711,14 +711,21 @@ static ssize_t show_power(struct device *dev, struct device_attribute *da, /* * I2C init/probing/exit functions */ +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int as4630_54pe_cpld_probe(struct i2c_client *client, const struct i2c_device_id *id) +#else +static int as4630_54pe_cpld_probe(struct i2c_client *client) +#endif { struct i2c_adapter *adap = to_i2c_adapter(client->dev.parent); struct as4630_54pe_cpld_data *data; int ret = -ENODEV; // int status; const struct attribute_group *group = NULL; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 3, 0) + const struct i2c_device_id *id = i2c_client_get_device_id(client); +#endif if (!i2c_check_functionality(adap, I2C_FUNC_SMBUS_BYTE)) goto exit; diff --git a/platform/broadcom/sonic-platform-modules-accton/as4630-54pe/modules/x86-64-accton-as4630-54pe-leds.c b/platform/broadcom/sonic-platform-modules-accton/as4630-54pe/modules/x86-64-accton-as4630-54pe-leds.c index e758dd5cc47..1a3976389f9 100644 --- a/platform/broadcom/sonic-platform-modules-accton/as4630-54pe/modules/x86-64-accton-as4630-54pe-leds.c +++ b/platform/broadcom/sonic-platform-modules-accton/as4630-54pe/modules/x86-64-accton-as4630-54pe-leds.c @@ -29,6 +29,7 @@ #include #include #include +#include extern int as4630_54pe_cpld_read (unsigned short cpld_addr, u8 reg); extern int as4630_54pe_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); @@ -512,7 +513,11 @@ static int accton_as4630_54pe_led_probe(struct platform_device *pdev) return ret; } +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int accton_as4630_54pe_led_remove(struct platform_device *pdev) +#else +static void accton_as4630_54pe_led_remove(struct platform_device *pdev) +#endif { int i; @@ -520,7 +525,9 @@ static int accton_as4630_54pe_led_remove(struct platform_device *pdev) led_classdev_unregister(&accton_as4630_54pe_leds[i]); } +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) return 0; +#endif } static struct platform_driver accton_as4630_54pe_led_driver = { diff --git a/platform/broadcom/sonic-platform-modules-accton/as4630-54pe/modules/x86-64-accton-as4630-54pe-psu.c b/platform/broadcom/sonic-platform-modules-accton/as4630-54pe/modules/x86-64-accton-as4630-54pe-psu.c index 20a00abb8d7..57955280af9 100644 --- a/platform/broadcom/sonic-platform-modules-accton/as4630-54pe/modules/x86-64-accton-as4630-54pe-psu.c +++ b/platform/broadcom/sonic-platform-modules-accton/as4630-54pe/modules/x86-64-accton-as4630-54pe-psu.c @@ -33,6 +33,7 @@ #include #include #include +#include #define MAX_MODEL_NAME 20 #define MAX_SERIAL_NUMBER 19 @@ -136,11 +137,18 @@ static const struct attribute_group as4630_54pe_psu_group = { .attrs = as4630_54pe_psu_attributes, }; +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int as4630_54pe_psu_probe(struct i2c_client *client, const struct i2c_device_id *dev_id) +#else +static int as4630_54pe_psu_probe(struct i2c_client *client) +#endif { struct as4630_54pe_psu_data *data; int status; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 3, 0) + const struct i2c_device_id *dev_id = i2c_client_get_device_id(client); +#endif if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) { status = -EIO; diff --git a/platform/broadcom/sonic-platform-modules-accton/as4630-54pe/setup.py b/platform/broadcom/sonic-platform-modules-accton/as4630-54pe/setup.py index 34e6bb59de5..22db82c0495 100755 --- a/platform/broadcom/sonic-platform-modules-accton/as4630-54pe/setup.py +++ b/platform/broadcom/sonic-platform-modules-accton/as4630-54pe/setup.py @@ -11,6 +11,6 @@ description='Module to initialize Accton AS4630-54PE platforms', packages=['as4630_54pe'], - package_dir={'as4630_54pe': 'as4630-54pe/classes'}, + package_dir={'as4630_54pe': 'classes'}, ) diff --git a/platform/broadcom/sonic-platform-modules-accton/as4630-54te/modules/x86-64-accton-as4630-54te-cpld.c b/platform/broadcom/sonic-platform-modules-accton/as4630-54te/modules/x86-64-accton-as4630-54te-cpld.c index ce733cdf74c..d799ce2ed64 100755 --- a/platform/broadcom/sonic-platform-modules-accton/as4630-54te/modules/x86-64-accton-as4630-54te-cpld.c +++ b/platform/broadcom/sonic-platform-modules-accton/as4630-54te/modules/x86-64-accton-as4630-54te-cpld.c @@ -714,14 +714,21 @@ static ssize_t show_power(struct device *dev, struct device_attribute *da, /* * I2C init/probing/exit functions */ +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int as4630_54te_cpld_probe(struct i2c_client *client, const struct i2c_device_id *id) +#else +static int as4630_54te_cpld_probe(struct i2c_client *client) +#endif { struct i2c_adapter *adap = to_i2c_adapter(client->dev.parent); struct as4630_54te_cpld_data *data; int ret = -ENODEV; // int status; const struct attribute_group *group = NULL; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 3, 0) + const struct i2c_device_id *id = i2c_client_get_device_id(client); +#endif if (!i2c_check_functionality(adap, I2C_FUNC_SMBUS_BYTE)) goto exit; diff --git a/platform/broadcom/sonic-platform-modules-accton/as4630-54te/modules/x86-64-accton-as4630-54te-leds.c b/platform/broadcom/sonic-platform-modules-accton/as4630-54te/modules/x86-64-accton-as4630-54te-leds.c old mode 100755 new mode 100644 index f4e2668348f..dec40c42e77 --- a/platform/broadcom/sonic-platform-modules-accton/as4630-54te/modules/x86-64-accton-as4630-54te-leds.c +++ b/platform/broadcom/sonic-platform-modules-accton/as4630-54te/modules/x86-64-accton-as4630-54te-leds.c @@ -29,6 +29,7 @@ #include #include #include +#include extern int as4630_54te_cpld_read (unsigned short cpld_addr, u8 reg); extern int as4630_54te_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); @@ -512,7 +513,11 @@ static int accton_as4630_54te_led_probe(struct platform_device *pdev) return ret; } +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int accton_as4630_54te_led_remove(struct platform_device *pdev) +#else +static void accton_as4630_54te_led_remove(struct platform_device *pdev) +#endif { int i; @@ -520,7 +525,9 @@ static int accton_as4630_54te_led_remove(struct platform_device *pdev) led_classdev_unregister(&accton_as4630_54te_leds[i]); } +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) return 0; +#endif } static struct platform_driver accton_as4630_54te_led_driver = { diff --git a/platform/broadcom/sonic-platform-modules-accton/as4630-54te/modules/x86-64-accton-as4630-54te-psu.c b/platform/broadcom/sonic-platform-modules-accton/as4630-54te/modules/x86-64-accton-as4630-54te-psu.c old mode 100755 new mode 100644 index cfd96377028..1ba911adb1c --- a/platform/broadcom/sonic-platform-modules-accton/as4630-54te/modules/x86-64-accton-as4630-54te-psu.c +++ b/platform/broadcom/sonic-platform-modules-accton/as4630-54te/modules/x86-64-accton-as4630-54te-psu.c @@ -33,6 +33,7 @@ #include #include #include +#include #define MAX_MODEL_NAME 20 #define MAX_SERIAL_NUMBER 18 @@ -137,11 +138,18 @@ static const struct attribute_group as4630_54te_psu_group = { .attrs = as4630_54te_psu_attributes, }; +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int as4630_54te_psu_probe(struct i2c_client *client, const struct i2c_device_id *dev_id) +#else +static int as4630_54te_psu_probe(struct i2c_client *client) +#endif { struct as4630_54te_psu_data *data; int status; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 3, 0) + const struct i2c_device_id *dev_id = i2c_client_get_device_id(client); +#endif if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) { status = -EIO; diff --git a/platform/broadcom/sonic-platform-modules-accton/as4630-54te/setup.py b/platform/broadcom/sonic-platform-modules-accton/as4630-54te/setup.py index 78b45368c79..1c80604e941 100755 --- a/platform/broadcom/sonic-platform-modules-accton/as4630-54te/setup.py +++ b/platform/broadcom/sonic-platform-modules-accton/as4630-54te/setup.py @@ -10,5 +10,5 @@ description='Module to initialize Accton AS4630-54TE platforms', packages=['as4630_54te'], - package_dir={'as4630_54te': 'as4630-54te/classes'}, + package_dir={'as4630_54te': 'classes'}, ) diff --git a/platform/broadcom/sonic-platform-modules-accton/as5712-54x/setup.py b/platform/broadcom/sonic-platform-modules-accton/as5712-54x/setup.py index f4cb5f960a4..61356a299ba 100755 --- a/platform/broadcom/sonic-platform-modules-accton/as5712-54x/setup.py +++ b/platform/broadcom/sonic-platform-modules-accton/as5712-54x/setup.py @@ -11,6 +11,6 @@ description='Module to initialize Accton AS5712-54X platforms', packages=['as5712_54x'], - package_dir={'as5712_54x': 'as5712-54x/classes'}, + package_dir={'as5712_54x': 'classes'}, ) diff --git a/platform/broadcom/sonic-platform-modules-accton/as5812-54t/modules/x86-64-accton-as5812-54t-cpld.c b/platform/broadcom/sonic-platform-modules-accton/as5812-54t/modules/x86-64-accton-as5812-54t-cpld.c old mode 100755 new mode 100644 index f7dc82f7193..e8bb9a6ff4a --- a/platform/broadcom/sonic-platform-modules-accton/as5812-54t/modules/x86-64-accton-as5812-54t-cpld.c +++ b/platform/broadcom/sonic-platform-modules-accton/as5812-54t/modules/x86-64-accton-as5812-54t-cpld.c @@ -33,6 +33,7 @@ #include #include #include +#include static LIST_HEAD(cpld_client_list); static struct mutex list_lock; @@ -389,8 +390,12 @@ static void as5812_54t_cpld_remove_client(struct i2c_client *client) mutex_unlock(&list_lock); } +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int as5812_54t_cpld_probe(struct i2c_client *client, const struct i2c_device_id *dev_id) +#else +static int as5812_54t_cpld_probe(struct i2c_client *client) +#endif { int status; struct as5812_54t_cpld_data *data = NULL; diff --git a/platform/broadcom/sonic-platform-modules-accton/as5812-54t/modules/x86-64-accton-as5812-54t-fan.c b/platform/broadcom/sonic-platform-modules-accton/as5812-54t/modules/x86-64-accton-as5812-54t-fan.c index 66370fb37ff..e661cde7104 100644 --- a/platform/broadcom/sonic-platform-modules-accton/as5812-54t/modules/x86-64-accton-as5812-54t-fan.c +++ b/platform/broadcom/sonic-platform-modules-accton/as5812-54t/modules/x86-64-accton-as5812-54t-fan.c @@ -32,6 +32,7 @@ #include #include #include +#include #define DRVNAME "as5812_54t_fan" @@ -394,12 +395,18 @@ static int accton_as5812_54t_fan_probe(struct platform_device *pdev) return status; } +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int accton_as5812_54t_fan_remove(struct platform_device *pdev) +#else +static void accton_as5812_54t_fan_remove(struct platform_device *pdev) +#endif { hwmon_device_unregister(fan_data->hwmon_dev); sysfs_remove_group(&fan_data->pdev->dev.kobj, &accton_as5812_54t_fan_group); +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) return 0; +#endif } diff --git a/platform/broadcom/sonic-platform-modules-accton/as5812-54t/modules/x86-64-accton-as5812-54t-leds.c b/platform/broadcom/sonic-platform-modules-accton/as5812-54t/modules/x86-64-accton-as5812-54t-leds.c index 39e553d2f54..6f346d9676a 100644 --- a/platform/broadcom/sonic-platform-modules-accton/as5812-54t/modules/x86-64-accton-as5812-54t-leds.c +++ b/platform/broadcom/sonic-platform-modules-accton/as5812-54t/modules/x86-64-accton-as5812-54t-leds.c @@ -28,6 +28,7 @@ #include #include #include +#include extern int as5812_54t_cpld_read(unsigned short cpld_addr, u8 reg); extern int as5812_54t_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); @@ -524,7 +525,11 @@ static int accton_as5812_54t_led_probe(struct platform_device *pdev) return ret; } +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int accton_as5812_54t_led_remove(struct platform_device *pdev) +#else +static void accton_as5812_54t_led_remove(struct platform_device *pdev) +#endif { int i; @@ -532,7 +537,9 @@ static int accton_as5812_54t_led_remove(struct platform_device *pdev) led_classdev_unregister(&accton_as5812_54t_leds[i]); } +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) return 0; +#endif } static struct platform_driver accton_as5812_54t_led_driver = { diff --git a/platform/broadcom/sonic-platform-modules-accton/as5812-54t/modules/x86-64-accton-as5812-54t-psu.c b/platform/broadcom/sonic-platform-modules-accton/as5812-54t/modules/x86-64-accton-as5812-54t-psu.c index 96f6bfcd22a..b2fb6659b5a 100644 --- a/platform/broadcom/sonic-platform-modules-accton/as5812-54t/modules/x86-64-accton-as5812-54t-psu.c +++ b/platform/broadcom/sonic-platform-modules-accton/as5812-54t/modules/x86-64-accton-as5812-54t-psu.c @@ -31,6 +31,7 @@ #include #include #include +#include #define PSU_STATUS_I2C_ADDR 0x60 @@ -140,11 +141,18 @@ static const struct attribute_group as5812_54t_psu_group = { .attrs = as5812_54t_psu_attributes, }; +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int as5812_54t_psu_probe(struct i2c_client *client, const struct i2c_device_id *dev_id) +#else +static int as5812_54t_psu_probe(struct i2c_client *client) +#endif { struct as5812_54t_psu_data *data; int status; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 3, 0) + const struct i2c_device_id *dev_id = i2c_client_get_device_id(client); +#endif if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) { status = -EIO; diff --git a/platform/broadcom/sonic-platform-modules-accton/as5812-54t/setup.py b/platform/broadcom/sonic-platform-modules-accton/as5812-54t/setup.py index 0af58ba919b..b009e573b65 100755 --- a/platform/broadcom/sonic-platform-modules-accton/as5812-54t/setup.py +++ b/platform/broadcom/sonic-platform-modules-accton/as5812-54t/setup.py @@ -11,6 +11,6 @@ description='Module to initialize Accton AS5812-54X platforms', packages=['as5812_54t'], - package_dir={'as5812_54t': 'as5812-54t/classes'}, + package_dir={'as5812_54t': 'classes'}, ) diff --git a/platform/broadcom/sonic-platform-modules-accton/as5812-54x/modules/accton_as5812_54x_fan.c b/platform/broadcom/sonic-platform-modules-accton/as5812-54x/modules/accton_as5812_54x_fan.c index deeabde23b2..de5576819a9 100644 --- a/platform/broadcom/sonic-platform-modules-accton/as5812-54x/modules/accton_as5812_54x_fan.c +++ b/platform/broadcom/sonic-platform-modules-accton/as5812-54x/modules/accton_as5812_54x_fan.c @@ -32,6 +32,7 @@ #include #include #include +#include #define DRVNAME "as5812_54x_fan" @@ -391,12 +392,18 @@ static int accton_as5812_54x_fan_probe(struct platform_device *pdev) return status; } +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int accton_as5812_54x_fan_remove(struct platform_device *pdev) +#else +static void accton_as5812_54x_fan_remove(struct platform_device *pdev) +#endif { hwmon_device_unregister(fan_data->hwmon_dev); sysfs_remove_group(&fan_data->pdev->dev.kobj, &accton_as5812_54x_fan_group); +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) return 0; +#endif } diff --git a/platform/broadcom/sonic-platform-modules-accton/as5812-54x/modules/accton_as5812_54x_psu.c b/platform/broadcom/sonic-platform-modules-accton/as5812-54x/modules/accton_as5812_54x_psu.c old mode 100755 new mode 100644 index f339e0fc3bd..d7d8bd0b6b6 --- a/platform/broadcom/sonic-platform-modules-accton/as5812-54x/modules/accton_as5812_54x_psu.c +++ b/platform/broadcom/sonic-platform-modules-accton/as5812-54x/modules/accton_as5812_54x_psu.c @@ -34,6 +34,7 @@ #include #include #include +#include #define PSU_STATUS_I2C_ADDR 0x60 @@ -143,11 +144,18 @@ static const struct attribute_group as5812_54x_psu_group = { .attrs = as5812_54x_psu_attributes, }; +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int as5812_54x_psu_probe(struct i2c_client *client, const struct i2c_device_id *dev_id) +#else +static int as5812_54x_psu_probe(struct i2c_client *client) +#endif { struct as5812_54x_psu_data *data; int status; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 3, 0) + const struct i2c_device_id *dev_id = i2c_client_get_device_id(client); +#endif if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) { status = -EIO; diff --git a/platform/broadcom/sonic-platform-modules-accton/as5812-54x/modules/accton_as5812_54x_sfp.c b/platform/broadcom/sonic-platform-modules-accton/as5812-54x/modules/accton_as5812_54x_sfp.c old mode 100755 new mode 100644 index 61cfed4eae1..f7661c26b26 --- a/platform/broadcom/sonic-platform-modules-accton/as5812-54x/modules/accton_as5812_54x_sfp.c +++ b/platform/broadcom/sonic-platform-modules-accton/as5812-54x/modules/accton_as5812_54x_sfp.c @@ -33,6 +33,7 @@ #include #include #include +#include #define NUM_OF_SFF_PORT 54 #define SFP_PORT_MAX 48 @@ -444,11 +445,18 @@ static const struct attribute_group as5812_54x_sfp_group = { .attrs = as5812_54x_sfp_attributes, }; +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int as5812_54x_sfp_probe(struct i2c_client *client, const struct i2c_device_id *dev_id) +#else +static int as5812_54x_sfp_probe(struct i2c_client *client) +#endif { struct as5812_54x_sfp_data *data; int status; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 3, 0) + const struct i2c_device_id *dev_id = i2c_client_get_device_id(client); +#endif extern int platform_accton_as5812_54x(void); if(!platform_accton_as5812_54x()) { diff --git a/platform/broadcom/sonic-platform-modules-accton/as5812-54x/modules/cpr_4011_4mxx.c b/platform/broadcom/sonic-platform-modules-accton/as5812-54x/modules/cpr_4011_4mxx.c old mode 100755 new mode 100644 index cdacf7d7e87..9272f89c7e8 --- a/platform/broadcom/sonic-platform-modules-accton/as5812-54x/modules/cpr_4011_4mxx.c +++ b/platform/broadcom/sonic-platform-modules-accton/as5812-54x/modules/cpr_4011_4mxx.c @@ -33,6 +33,7 @@ #include #include #include +#include #define MAX_FAN_DUTY_CYCLE 100 @@ -217,8 +218,12 @@ static const struct attribute_group cpr_4011_4mxx_group = { .attrs = cpr_4011_4mxx_attributes, }; +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int cpr_4011_4mxx_probe(struct i2c_client *client, const struct i2c_device_id *dev_id) +#else +static int cpr_4011_4mxx_probe(struct i2c_client *client) +#endif { struct cpr_4011_4mxx_data *data; int status; diff --git a/platform/broadcom/sonic-platform-modules-accton/as5812-54x/modules/i2c-mux-accton_as5812_54x_cpld.c b/platform/broadcom/sonic-platform-modules-accton/as5812-54x/modules/i2c-mux-accton_as5812_54x_cpld.c index 8d96352246c..bc4f483995a 100644 --- a/platform/broadcom/sonic-platform-modules-accton/as5812-54x/modules/i2c-mux-accton_as5812_54x_cpld.c +++ b/platform/broadcom/sonic-platform-modules-accton/as5812-54x/modules/i2c-mux-accton_as5812_54x_cpld.c @@ -1192,15 +1192,25 @@ static ssize_t show_version(struct device *dev, struct device_attribute *attr, c /* * I2C init/probing/exit functions */ +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int as5812_54x_cpld_mux_probe(struct i2c_client *client, const struct i2c_device_id *id) +#else +static int as5812_54x_cpld_mux_probe(struct i2c_client *client) +#endif { struct i2c_adapter *adap = to_i2c_adapter(client->dev.parent); - int num, force, class; + int num, force; +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) + int class; +#endif struct i2c_mux_core *muxc; struct as5812_54x_cpld_data *data; int ret = 0; const struct attribute_group *group = NULL; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 3, 0) + const struct i2c_device_id *id = i2c_client_get_device_id(client); +#endif if (!i2c_check_functionality(adap, I2C_FUNC_SMBUS_BYTE)) return -ENODEV; @@ -1221,10 +1231,14 @@ static int as5812_54x_cpld_mux_probe(struct i2c_client *client, /* Now create an adapter for each channel */ for (num = 0; num < chips[data->type].nchans; num++) { force = 0; /* dynamic adap number */ +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) class = 0; /* no class by default */ ret = i2c_mux_add_adapter(muxc, force, num, class); +#else + ret = i2c_mux_add_adapter(muxc, force, num); +#endif if (ret) { dev_err(&client->dev, "failed to register multiplexed adapter" diff --git a/platform/broadcom/sonic-platform-modules-accton/as5812-54x/modules/leds-accton_as5812_54x.c b/platform/broadcom/sonic-platform-modules-accton/as5812-54x/modules/leds-accton_as5812_54x.c old mode 100755 new mode 100644 index 430a16db11e..2515448adf1 --- a/platform/broadcom/sonic-platform-modules-accton/as5812-54x/modules/leds-accton_as5812_54x.c +++ b/platform/broadcom/sonic-platform-modules-accton/as5812-54x/modules/leds-accton_as5812_54x.c @@ -29,6 +29,7 @@ #include #include #include +#include extern int as5812_54x_cpld_read (unsigned short cpld_addr, u8 reg); extern int as5812_54x_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); @@ -526,7 +527,11 @@ static int accton_as5812_54x_led_probe(struct platform_device *pdev) return ret; } +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int accton_as5812_54x_led_remove(struct platform_device *pdev) +#else +static void accton_as5812_54x_led_remove(struct platform_device *pdev) +#endif { int i; @@ -534,7 +539,9 @@ static int accton_as5812_54x_led_remove(struct platform_device *pdev) led_classdev_unregister(&accton_as5812_54x_leds[i]); } +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) return 0; +#endif } static struct platform_driver accton_as5812_54x_led_driver = { diff --git a/platform/broadcom/sonic-platform-modules-accton/as5812-54x/modules/ym2651y.c b/platform/broadcom/sonic-platform-modules-accton/as5812-54x/modules/ym2651y.c old mode 100755 new mode 100644 index 3a5a1e73a48..2d5e1b01d33 --- a/platform/broadcom/sonic-platform-modules-accton/as5812-54x/modules/ym2651y.c +++ b/platform/broadcom/sonic-platform-modules-accton/as5812-54x/modules/ym2651y.c @@ -34,6 +34,7 @@ #include #include #include +#include #define MAX_FAN_DUTY_CYCLE 100 @@ -415,11 +416,18 @@ static const struct attribute_group ym2651y_group = { .attrs = ym2651y_attributes, }; +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int ym2651y_probe(struct i2c_client *client, const struct i2c_device_id *dev_id) +#else +static int ym2651y_probe(struct i2c_client *client) +#endif { struct ym2651y_data *data; int status; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 3, 0) + const struct i2c_device_id *dev_id = i2c_client_get_device_id(client); +#endif if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA | diff --git a/platform/broadcom/sonic-platform-modules-accton/as5812-54x/setup.py b/platform/broadcom/sonic-platform-modules-accton/as5812-54x/setup.py index aa8615fd8a8..8a2c42eb5d7 100755 --- a/platform/broadcom/sonic-platform-modules-accton/as5812-54x/setup.py +++ b/platform/broadcom/sonic-platform-modules-accton/as5812-54x/setup.py @@ -11,6 +11,6 @@ description='Module to initialize Accton AS5812-54X platforms', packages=['as5812_54x'], - package_dir={'as5812_54x': 'as5812-54x/classes'}, + package_dir={'as5812_54x': 'classes'}, ) diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54t/modules/accton_as5835_54t_cpld.c b/platform/broadcom/sonic-platform-modules-accton/as5835-54t/modules/accton_as5835_54t_cpld.c index 7e9a3eb06b9..893038eef2a 100755 --- a/platform/broadcom/sonic-platform-modules-accton/as5835-54t/modules/accton_as5835_54t_cpld.c +++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54t/modules/accton_as5835_54t_cpld.c @@ -410,13 +410,20 @@ static ssize_t show_version(struct device *dev, struct device_attribute *attr, c /* * I2C init/probing/exit functions */ +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int as5835_54t_cpld_probe(struct i2c_client *client, const struct i2c_device_id *id) +#else +static int as5835_54t_cpld_probe(struct i2c_client *client) +#endif { struct i2c_adapter *adap = to_i2c_adapter(client->dev.parent); struct as5835_54t_cpld_data *data; int ret = -ENODEV; const struct attribute_group *group = NULL; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 3, 0) + const struct i2c_device_id *id = i2c_client_get_device_id(client); +#endif if (!i2c_check_functionality(adap, I2C_FUNC_SMBUS_BYTE)) goto exit; diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54t/modules/accton_as5835_54t_fan.c b/platform/broadcom/sonic-platform-modules-accton/as5835-54t/modules/accton_as5835_54t_fan.c index 7e52ab2b17b..6f1bfa375bc 100644 --- a/platform/broadcom/sonic-platform-modules-accton/as5835-54t/modules/accton_as5835_54t_fan.c +++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54t/modules/accton_as5835_54t_fan.c @@ -30,6 +30,7 @@ #include #include #include +#include #define DRVNAME "as5835_54t_fan" #define MAX_FAN_SPEED_RPM 21500 @@ -398,8 +399,12 @@ static ssize_t show_version(struct device *dev, struct device_attribute *attr, c return sprintf(buf, "%d\n", val); } +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int as5835_54t_fan_probe(struct i2c_client *client, const struct i2c_device_id *dev_id) +#else +static int as5835_54t_fan_probe(struct i2c_client *client) +#endif { struct as5835_54t_fan_data *data; int status; diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54t/modules/accton_as5835_54t_leds.c b/platform/broadcom/sonic-platform-modules-accton/as5835-54t/modules/accton_as5835_54t_leds.c index e02930a2f6e..234c434356c 100644 --- a/platform/broadcom/sonic-platform-modules-accton/as5835-54t/modules/accton_as5835_54t_leds.c +++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54t/modules/accton_as5835_54t_leds.c @@ -26,6 +26,7 @@ #include #include #include +#include #define DRVNAME "as5835_54t_led" @@ -310,7 +311,11 @@ static int accton_as5835_54t_led_probe(struct platform_device *pdev) return ret; } +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int accton_as5835_54t_led_remove(struct platform_device *pdev) +#else +static void accton_as5835_54t_led_remove(struct platform_device *pdev) +#endif { int i; @@ -318,7 +323,9 @@ static int accton_as5835_54t_led_remove(struct platform_device *pdev) led_classdev_unregister(&accton_as5835_54t_leds[i]); } +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) return 0; +#endif } static struct platform_driver accton_as5835_54t_led_driver = { diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54t/modules/accton_as5835_54t_psu.c b/platform/broadcom/sonic-platform-modules-accton/as5835-54t/modules/accton_as5835_54t_psu.c index a52f543f235..ed737fc992a 100644 --- a/platform/broadcom/sonic-platform-modules-accton/as5835-54t/modules/accton_as5835_54t_psu.c +++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54t/modules/accton_as5835_54t_psu.c @@ -33,6 +33,7 @@ #include #include #include +#include #define PSU_STATUS_I2C_ADDR 0x60 @@ -138,11 +139,18 @@ static const struct attribute_group as5835_54t_psu_group = { .attrs = as5835_54t_psu_attributes, }; +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int as5835_54t_psu_probe(struct i2c_client *client, const struct i2c_device_id *dev_id) +#else +static int as5835_54t_psu_probe(struct i2c_client *client) +#endif { struct as5835_54t_psu_data *data; int status; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 3, 0) + const struct i2c_device_id *dev_id = i2c_client_get_device_id(client); +#endif if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) { status = -EIO; diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54t/setup.py b/platform/broadcom/sonic-platform-modules-accton/as5835-54t/setup.py index ac880c41e4e..d961724616f 100644 --- a/platform/broadcom/sonic-platform-modules-accton/as5835-54t/setup.py +++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54t/setup.py @@ -11,6 +11,6 @@ description='Module to initialize Accton AS5835-54T platforms', packages=['as5835_54t'], - package_dir={'as5835_54t': 'as5835-54t/classes'}, + package_dir={'as5835_54t': 'classes'}, ) diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/modules/accton_as5835_54x_cpld.c b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/modules/accton_as5835_54x_cpld.c index f4da03ac116..ea7ca9f1527 100755 --- a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/modules/accton_as5835_54x_cpld.c +++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/modules/accton_as5835_54x_cpld.c @@ -1003,13 +1003,20 @@ static ssize_t show_version(struct device *dev, struct device_attribute *attr, c /* * I2C init/probing/exit functions */ +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int as5835_54x_cpld_probe(struct i2c_client *client, const struct i2c_device_id *id) +#else +static int as5835_54x_cpld_probe(struct i2c_client *client) +#endif { struct i2c_adapter *adap = to_i2c_adapter(client->dev.parent); struct as5835_54x_cpld_data *data; int ret = -ENODEV; const struct attribute_group *group = NULL; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 3, 0) + const struct i2c_device_id *id = i2c_client_get_device_id(client); +#endif if (!i2c_check_functionality(adap, I2C_FUNC_SMBUS_BYTE)) goto exit; diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/modules/accton_as5835_54x_fan.c b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/modules/accton_as5835_54x_fan.c index 6d4ac73f651..585b9291661 100644 --- a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/modules/accton_as5835_54x_fan.c +++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/modules/accton_as5835_54x_fan.c @@ -30,6 +30,7 @@ #include #include #include +#include #define DRVNAME "as5835_54x_fan" #define MAX_FAN_SPEED_RPM 21500 @@ -398,8 +399,12 @@ static ssize_t show_version(struct device *dev, struct device_attribute *attr, c return sprintf(buf, "%d\n", val); } +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int as5835_54x_fan_probe(struct i2c_client *client, const struct i2c_device_id *dev_id) +#else +static int as5835_54x_fan_probe(struct i2c_client *client) +#endif { struct as5835_54x_fan_data *data; int status; diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/modules/accton_as5835_54x_leds.c b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/modules/accton_as5835_54x_leds.c index 3b9dce6a4cd..6691542d9f5 100644 --- a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/modules/accton_as5835_54x_leds.c +++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/modules/accton_as5835_54x_leds.c @@ -26,6 +26,7 @@ #include #include #include +#include #define DRVNAME "as5835_54x_led" @@ -310,7 +311,11 @@ static int accton_as5835_54x_led_probe(struct platform_device *pdev) return ret; } +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int accton_as5835_54x_led_remove(struct platform_device *pdev) +#else +static void accton_as5835_54x_led_remove(struct platform_device *pdev) +#endif { int i; @@ -318,7 +323,9 @@ static int accton_as5835_54x_led_remove(struct platform_device *pdev) led_classdev_unregister(&accton_as5835_54x_leds[i]); } +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) return 0; +#endif } static struct platform_driver accton_as5835_54x_led_driver = { diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/modules/accton_as5835_54x_psu.c b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/modules/accton_as5835_54x_psu.c index b07216c1c16..797bff44ae9 100644 --- a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/modules/accton_as5835_54x_psu.c +++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/modules/accton_as5835_54x_psu.c @@ -33,6 +33,7 @@ #include #include #include +#include #define PSU_STATUS_I2C_ADDR 0x60 @@ -138,11 +139,18 @@ static const struct attribute_group as5835_54x_psu_group = { .attrs = as5835_54x_psu_attributes, }; +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int as5835_54x_psu_probe(struct i2c_client *client, const struct i2c_device_id *dev_id) +#else +static int as5835_54x_psu_probe(struct i2c_client *client) +#endif { struct as5835_54x_psu_data *data; int status; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 3, 0) + const struct i2c_device_id *dev_id = i2c_client_get_device_id(client); +#endif if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) { status = -EIO; diff --git a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/setup.py b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/setup.py index af0320318ea..8e8029a2574 100644 --- a/platform/broadcom/sonic-platform-modules-accton/as5835-54x/setup.py +++ b/platform/broadcom/sonic-platform-modules-accton/as5835-54x/setup.py @@ -11,6 +11,6 @@ description='Module to initialize Accton AS5835-54X platforms', packages=['as5835_54x'], - package_dir={'as5835_54x': 'as5835-54x/classes'}, + package_dir={'as5835_54x': 'classes'}, ) diff --git a/platform/broadcom/sonic-platform-modules-accton/as6712-32x/modules/accton-as6712-32x-cpld.c b/platform/broadcom/sonic-platform-modules-accton/as6712-32x/modules/accton-as6712-32x-cpld.c index 33b57c93950..edd64aec9ca 100755 --- a/platform/broadcom/sonic-platform-modules-accton/as6712-32x/modules/accton-as6712-32x-cpld.c +++ b/platform/broadcom/sonic-platform-modules-accton/as6712-32x/modules/accton-as6712-32x-cpld.c @@ -630,16 +630,26 @@ static ssize_t show_version(struct device *dev, struct device_attribute *attr, c /* * I2C init/probing/exit functions */ +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int as6712_32x_cpld_mux_probe(struct i2c_client *client, const struct i2c_device_id *id) +#else +static int as6712_32x_cpld_mux_probe(struct i2c_client *client) +#endif { struct i2c_adapter *adap = to_i2c_adapter(client->dev.parent); - int force, class; + int force; +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) + int class; +#endif struct i2c_mux_core *muxc; struct as6712_32x_cpld_data *data; int chan = 0; int ret = -ENODEV; const struct attribute_group *group = NULL; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 3, 0) + const struct i2c_device_id *id = i2c_client_get_device_id(client); +#endif if (!i2c_check_functionality(adap, I2C_FUNC_SMBUS_BYTE)) return -ENODEV; @@ -664,10 +674,14 @@ static int as6712_32x_cpld_mux_probe(struct i2c_client *client, /* Now create an adapter for each channel */ for (chan = 0; chan < chips[data->type].nchans; chan++) { force = 0; /* dynamic adap number */ +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) class = 0; /* no class by default */ ret = i2c_mux_add_adapter(muxc, force, chan, class); +#else + ret = i2c_mux_add_adapter(muxc, force, chan); +#endif if (ret) { ret = -ENODEV; dev_err(&client->dev, "failed to register multiplexed adapter %d\n", chan); diff --git a/platform/broadcom/sonic-platform-modules-accton/as6712-32x/modules/accton_as6712_32x_fan.c b/platform/broadcom/sonic-platform-modules-accton/as6712-32x/modules/accton_as6712_32x_fan.c index 7033d8b7568..e103be45ae3 100644 --- a/platform/broadcom/sonic-platform-modules-accton/as6712-32x/modules/accton_as6712_32x_fan.c +++ b/platform/broadcom/sonic-platform-modules-accton/as6712-32x/modules/accton_as6712_32x_fan.c @@ -33,6 +33,7 @@ #include #include #include +#include #define DRVNAME "as6712_32x_fan" @@ -397,12 +398,18 @@ static int accton_as6712_32x_fan_probe(struct platform_device *pdev) return status; } +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int accton_as6712_32x_fan_remove(struct platform_device *pdev) +#else +static void accton_as6712_32x_fan_remove(struct platform_device *pdev) +#endif { hwmon_device_unregister(fan_data->hwmon_dev); sysfs_remove_group(&fan_data->pdev->dev.kobj, &accton_as6712_32x_fan_group); +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) return 0; +#endif } diff --git a/platform/broadcom/sonic-platform-modules-accton/as6712-32x/modules/accton_as6712_32x_psu.c b/platform/broadcom/sonic-platform-modules-accton/as6712-32x/modules/accton_as6712_32x_psu.c index 9ae5755956f..be02e638cda 100644 --- a/platform/broadcom/sonic-platform-modules-accton/as6712-32x/modules/accton_as6712_32x_psu.c +++ b/platform/broadcom/sonic-platform-modules-accton/as6712-32x/modules/accton_as6712_32x_psu.c @@ -31,6 +31,7 @@ #include #include #include +#include #define PSU_STATUS_I2C_ADDR 0x60 #define PSU_STATUS_I2C_REG_OFFSET 0x2 @@ -138,11 +139,18 @@ static const struct attribute_group as6712_32x_psu_group = { .attrs = as6712_32x_psu_attributes, }; +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int as6712_32x_psu_probe(struct i2c_client *client, const struct i2c_device_id *dev_id) +#else +static int as6712_32x_psu_probe(struct i2c_client *client) +#endif { struct as6712_32x_psu_data *data; int status; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 3, 0) + const struct i2c_device_id *dev_id = i2c_client_get_device_id(client); +#endif if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) { status = -EIO; diff --git a/platform/broadcom/sonic-platform-modules-accton/as6712-32x/modules/cpr_4011_4mxx.c b/platform/broadcom/sonic-platform-modules-accton/as6712-32x/modules/cpr_4011_4mxx.c index b18cba8c9db..893c0d7dbd6 100644 --- a/platform/broadcom/sonic-platform-modules-accton/as6712-32x/modules/cpr_4011_4mxx.c +++ b/platform/broadcom/sonic-platform-modules-accton/as6712-32x/modules/cpr_4011_4mxx.c @@ -33,6 +33,7 @@ #include #include #include +#include #define MAX_FAN_DUTY_CYCLE 100 @@ -250,8 +251,12 @@ static const struct attribute_group cpr_4011_4mxx_group = { .attrs = cpr_4011_4mxx_attributes, }; +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int cpr_4011_4mxx_probe(struct i2c_client *client, const struct i2c_device_id *dev_id) +#else +static int cpr_4011_4mxx_probe(struct i2c_client *client) +#endif { struct cpr_4011_4mxx_data *data; int status; diff --git a/platform/broadcom/sonic-platform-modules-accton/as6712-32x/modules/leds-accton_as6712_32x.c b/platform/broadcom/sonic-platform-modules-accton/as6712-32x/modules/leds-accton_as6712_32x.c index 6e5c1d2118e..ab9726426aa 100644 --- a/platform/broadcom/sonic-platform-modules-accton/as6712-32x/modules/leds-accton_as6712_32x.c +++ b/platform/broadcom/sonic-platform-modules-accton/as6712-32x/modules/leds-accton_as6712_32x.c @@ -28,6 +28,7 @@ #include #include #include +#include extern int as6712_32x_cpld_read (unsigned short cpld_addr, u8 reg); extern int as6712_32x_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); @@ -544,7 +545,11 @@ static int accton_as6712_32x_led_probe(struct platform_device *pdev) return ret; } +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int accton_as6712_32x_led_remove(struct platform_device *pdev) +#else +static void accton_as6712_32x_led_remove(struct platform_device *pdev) +#endif { int i; @@ -552,7 +557,9 @@ static int accton_as6712_32x_led_remove(struct platform_device *pdev) led_classdev_unregister(&accton_as6712_32x_leds[i]); } +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) return 0; +#endif } static struct platform_driver accton_as6712_32x_led_driver = { diff --git a/platform/broadcom/sonic-platform-modules-accton/as6712-32x/setup.py b/platform/broadcom/sonic-platform-modules-accton/as6712-32x/setup.py index 114b0837be6..28be6dfb88c 100644 --- a/platform/broadcom/sonic-platform-modules-accton/as6712-32x/setup.py +++ b/platform/broadcom/sonic-platform-modules-accton/as6712-32x/setup.py @@ -11,6 +11,6 @@ description='Module to initialize Accton AS6712-32X platforms', packages=['as6712_32x'], - package_dir={'as6712_32x': 'as6712-32x/classes'}, + package_dir={'as6712_32x': 'classes'}, ) diff --git a/platform/broadcom/sonic-platform-modules-accton/as7312-54x/modules/accton_as7312_54x_fan.c b/platform/broadcom/sonic-platform-modules-accton/as7312-54x/modules/accton_as7312_54x_fan.c old mode 100755 new mode 100644 index 8eceeef0d2a..61648a32dd7 --- a/platform/broadcom/sonic-platform-modules-accton/as7312-54x/modules/accton_as7312_54x_fan.c +++ b/platform/broadcom/sonic-platform-modules-accton/as7312-54x/modules/accton_as7312_54x_fan.c @@ -31,6 +31,7 @@ #include #include #include +#include #define DRVNAME "as7312_54x_fan" @@ -448,8 +449,12 @@ static struct as7312_54x_fan_data *as7312_54x_fan_update_device(struct device *d return data; } +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int as7312_54x_fan_probe(struct i2c_client *client, const struct i2c_device_id *dev_id) +#else +static int as7312_54x_fan_probe(struct i2c_client *client) +#endif { struct as7312_54x_fan_data *data; int status; diff --git a/platform/broadcom/sonic-platform-modules-accton/as7312-54x/modules/accton_as7312_54x_leds.c b/platform/broadcom/sonic-platform-modules-accton/as7312-54x/modules/accton_as7312_54x_leds.c index f5371644010..248415b8dff 100644 --- a/platform/broadcom/sonic-platform-modules-accton/as7312-54x/modules/accton_as7312_54x_leds.c +++ b/platform/broadcom/sonic-platform-modules-accton/as7312-54x/modules/accton_as7312_54x_leds.c @@ -29,6 +29,7 @@ #include #include #include +#include extern int as7312_54x_cpld_read (unsigned short cpld_addr, u8 reg); extern int as7312_54x_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); @@ -370,7 +371,11 @@ static int accton_as7312_54x_led_probe(struct platform_device *pdev) return ret; } +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int accton_as7312_54x_led_remove(struct platform_device *pdev) +#else +static void accton_as7312_54x_led_remove(struct platform_device *pdev) +#endif { int i; @@ -378,7 +383,9 @@ static int accton_as7312_54x_led_remove(struct platform_device *pdev) led_classdev_unregister(&accton_as7312_54x_leds[i]); } +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) return 0; +#endif } static struct platform_driver accton_as7312_54x_led_driver = { diff --git a/platform/broadcom/sonic-platform-modules-accton/as7312-54x/modules/accton_as7312_54x_psu.c b/platform/broadcom/sonic-platform-modules-accton/as7312-54x/modules/accton_as7312_54x_psu.c index 049c3dfa320..9956dd04e91 100644 --- a/platform/broadcom/sonic-platform-modules-accton/as7312-54x/modules/accton_as7312_54x_psu.c +++ b/platform/broadcom/sonic-platform-modules-accton/as7312-54x/modules/accton_as7312_54x_psu.c @@ -33,6 +33,7 @@ #include #include #include +#include static ssize_t show_status(struct device *dev, struct device_attribute *da, char *buf); static ssize_t show_model_name(struct device *dev, struct device_attribute *da, char *buf); @@ -105,11 +106,18 @@ static const struct attribute_group as7312_54x_psu_group = { .attrs = as7312_54x_psu_attributes, }; +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int as7312_54x_psu_probe(struct i2c_client *client, const struct i2c_device_id *dev_id) +#else +static int as7312_54x_psu_probe(struct i2c_client *client) +#endif { struct as7312_54x_psu_data *data; int status; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 3, 0) + const struct i2c_device_id *dev_id = i2c_client_get_device_id(client); +#endif if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) { status = -EIO; diff --git a/platform/broadcom/sonic-platform-modules-accton/as7312-54x/modules/accton_as7312_54x_sfp.c b/platform/broadcom/sonic-platform-modules-accton/as7312-54x/modules/accton_as7312_54x_sfp.c index 5261686874d..f55757f0f60 100644 --- a/platform/broadcom/sonic-platform-modules-accton/as7312-54x/modules/accton_as7312_54x_sfp.c +++ b/platform/broadcom/sonic-platform-modules-accton/as7312-54x/modules/accton_as7312_54x_sfp.c @@ -31,6 +31,7 @@ #include #include #include +#include #define DRIVER_NAME "as7312_54x_sfp" /* Platform dependent */ @@ -1788,11 +1789,18 @@ static int qsfp_probe(struct i2c_client *client, const struct i2c_device_id *dev } /* Platform dependent +++ */ +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int sfp_device_probe(struct i2c_client *client, const struct i2c_device_id *dev_id) +#else +static int sfp_device_probe(struct i2c_client *client) +#endif { int ret = 0; struct sfp_port_data *data = NULL; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 3, 0) + const struct i2c_device_id *dev_id = i2c_client_get_device_id(client); +#endif if (client->addr != SFP_EEPROM_A0_I2C_ADDR) { return -ENODEV; diff --git a/platform/broadcom/sonic-platform-modules-accton/as7312-54x/modules/accton_i2c_cpld.c b/platform/broadcom/sonic-platform-modules-accton/as7312-54x/modules/accton_i2c_cpld.c index 5900dfb10de..3a7365bd84c 100644 --- a/platform/broadcom/sonic-platform-modules-accton/as7312-54x/modules/accton_i2c_cpld.c +++ b/platform/broadcom/sonic-platform-modules-accton/as7312-54x/modules/accton_i2c_cpld.c @@ -1022,13 +1022,20 @@ static ssize_t show_version(struct device *dev, struct device_attribute *attr, c /* * I2C init/probing/exit functions */ +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int as7312_54x_cpld_probe(struct i2c_client *client, const struct i2c_device_id *id) +#else +static int as7312_54x_cpld_probe(struct i2c_client *client) +#endif { struct i2c_adapter *adap = to_i2c_adapter(client->dev.parent); struct as7312_54x_cpld_data *data; int ret = -ENODEV; const struct attribute_group *group = NULL; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 3, 0) + const struct i2c_device_id *id = i2c_client_get_device_id(client); +#endif if (!i2c_check_functionality(adap, I2C_FUNC_SMBUS_BYTE)) goto exit; diff --git a/platform/broadcom/sonic-platform-modules-accton/as7312-54x/setup.py b/platform/broadcom/sonic-platform-modules-accton/as7312-54x/setup.py index 5e862ce1504..8840f0f1eda 100755 --- a/platform/broadcom/sonic-platform-modules-accton/as7312-54x/setup.py +++ b/platform/broadcom/sonic-platform-modules-accton/as7312-54x/setup.py @@ -11,6 +11,6 @@ description='Module to initialize Accton AS7312-54X platforms', packages=['as7312_54x'], - package_dir={'as7312_54x': 'as7312-54x/classes'}, + package_dir={'as7312_54x': 'classes'}, ) diff --git a/platform/broadcom/sonic-platform-modules-accton/as7312-54xs/modules/accton_as7312_54x_fan.c b/platform/broadcom/sonic-platform-modules-accton/as7312-54xs/modules/accton_as7312_54x_fan.c old mode 100755 new mode 100644 index b0a6ad0630f..b2c4aaebb71 --- a/platform/broadcom/sonic-platform-modules-accton/as7312-54xs/modules/accton_as7312_54x_fan.c +++ b/platform/broadcom/sonic-platform-modules-accton/as7312-54xs/modules/accton_as7312_54x_fan.c @@ -31,6 +31,7 @@ #include #include #include +#include #define DRVNAME "as7312_54x_fan" @@ -446,8 +447,12 @@ static struct as7312_54x_fan_data *as7312_54x_fan_update_device(struct device *d return data; } +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int as7312_54x_fan_probe(struct i2c_client *client, const struct i2c_device_id *dev_id) +#else +static int as7312_54x_fan_probe(struct i2c_client *client) +#endif { struct as7312_54x_fan_data *data; int status; diff --git a/platform/broadcom/sonic-platform-modules-accton/as7312-54xs/modules/accton_as7312_54x_leds.c b/platform/broadcom/sonic-platform-modules-accton/as7312-54xs/modules/accton_as7312_54x_leds.c index f5371644010..248415b8dff 100644 --- a/platform/broadcom/sonic-platform-modules-accton/as7312-54xs/modules/accton_as7312_54x_leds.c +++ b/platform/broadcom/sonic-platform-modules-accton/as7312-54xs/modules/accton_as7312_54x_leds.c @@ -29,6 +29,7 @@ #include #include #include +#include extern int as7312_54x_cpld_read (unsigned short cpld_addr, u8 reg); extern int as7312_54x_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); @@ -370,7 +371,11 @@ static int accton_as7312_54x_led_probe(struct platform_device *pdev) return ret; } +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int accton_as7312_54x_led_remove(struct platform_device *pdev) +#else +static void accton_as7312_54x_led_remove(struct platform_device *pdev) +#endif { int i; @@ -378,7 +383,9 @@ static int accton_as7312_54x_led_remove(struct platform_device *pdev) led_classdev_unregister(&accton_as7312_54x_leds[i]); } +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) return 0; +#endif } static struct platform_driver accton_as7312_54x_led_driver = { diff --git a/platform/broadcom/sonic-platform-modules-accton/as7312-54xs/modules/accton_as7312_54x_psu.c b/platform/broadcom/sonic-platform-modules-accton/as7312-54xs/modules/accton_as7312_54x_psu.c index 049c3dfa320..9956dd04e91 100644 --- a/platform/broadcom/sonic-platform-modules-accton/as7312-54xs/modules/accton_as7312_54x_psu.c +++ b/platform/broadcom/sonic-platform-modules-accton/as7312-54xs/modules/accton_as7312_54x_psu.c @@ -33,6 +33,7 @@ #include #include #include +#include static ssize_t show_status(struct device *dev, struct device_attribute *da, char *buf); static ssize_t show_model_name(struct device *dev, struct device_attribute *da, char *buf); @@ -105,11 +106,18 @@ static const struct attribute_group as7312_54x_psu_group = { .attrs = as7312_54x_psu_attributes, }; +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int as7312_54x_psu_probe(struct i2c_client *client, const struct i2c_device_id *dev_id) +#else +static int as7312_54x_psu_probe(struct i2c_client *client) +#endif { struct as7312_54x_psu_data *data; int status; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 3, 0) + const struct i2c_device_id *dev_id = i2c_client_get_device_id(client); +#endif if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) { status = -EIO; diff --git a/platform/broadcom/sonic-platform-modules-accton/as7312-54xs/modules/accton_as7312_54x_sfp.c b/platform/broadcom/sonic-platform-modules-accton/as7312-54xs/modules/accton_as7312_54x_sfp.c index 5261686874d..f55757f0f60 100644 --- a/platform/broadcom/sonic-platform-modules-accton/as7312-54xs/modules/accton_as7312_54x_sfp.c +++ b/platform/broadcom/sonic-platform-modules-accton/as7312-54xs/modules/accton_as7312_54x_sfp.c @@ -31,6 +31,7 @@ #include #include #include +#include #define DRIVER_NAME "as7312_54x_sfp" /* Platform dependent */ @@ -1788,11 +1789,18 @@ static int qsfp_probe(struct i2c_client *client, const struct i2c_device_id *dev } /* Platform dependent +++ */ +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int sfp_device_probe(struct i2c_client *client, const struct i2c_device_id *dev_id) +#else +static int sfp_device_probe(struct i2c_client *client) +#endif { int ret = 0; struct sfp_port_data *data = NULL; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 3, 0) + const struct i2c_device_id *dev_id = i2c_client_get_device_id(client); +#endif if (client->addr != SFP_EEPROM_A0_I2C_ADDR) { return -ENODEV; diff --git a/platform/broadcom/sonic-platform-modules-accton/as7312-54xs/modules/accton_i2c_cpld.c b/platform/broadcom/sonic-platform-modules-accton/as7312-54xs/modules/accton_i2c_cpld.c index 5900dfb10de..3a7365bd84c 100644 --- a/platform/broadcom/sonic-platform-modules-accton/as7312-54xs/modules/accton_i2c_cpld.c +++ b/platform/broadcom/sonic-platform-modules-accton/as7312-54xs/modules/accton_i2c_cpld.c @@ -1022,13 +1022,20 @@ static ssize_t show_version(struct device *dev, struct device_attribute *attr, c /* * I2C init/probing/exit functions */ +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int as7312_54x_cpld_probe(struct i2c_client *client, const struct i2c_device_id *id) +#else +static int as7312_54x_cpld_probe(struct i2c_client *client) +#endif { struct i2c_adapter *adap = to_i2c_adapter(client->dev.parent); struct as7312_54x_cpld_data *data; int ret = -ENODEV; const struct attribute_group *group = NULL; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 3, 0) + const struct i2c_device_id *id = i2c_client_get_device_id(client); +#endif if (!i2c_check_functionality(adap, I2C_FUNC_SMBUS_BYTE)) goto exit; diff --git a/platform/broadcom/sonic-platform-modules-accton/as7312-54xs/setup.py b/platform/broadcom/sonic-platform-modules-accton/as7312-54xs/setup.py index d1351ab3e59..4370c41f1d5 100755 --- a/platform/broadcom/sonic-platform-modules-accton/as7312-54xs/setup.py +++ b/platform/broadcom/sonic-platform-modules-accton/as7312-54xs/setup.py @@ -11,6 +11,6 @@ description='Module to initialize Accton AS7312-54XS platforms', packages=['as7312_54xs'], - package_dir={'as7312_54xs': 'as7312-54xs/classes'}, + package_dir={'as7312_54xs': 'classes'}, ) diff --git a/platform/broadcom/sonic-platform-modules-accton/as7315-27xb/modules/accton_as7315_27xb_fan.c b/platform/broadcom/sonic-platform-modules-accton/as7315-27xb/modules/accton_as7315_27xb_fan.c index f924b962f3d..5c422da083d 100644 --- a/platform/broadcom/sonic-platform-modules-accton/as7315-27xb/modules/accton_as7315_27xb_fan.c +++ b/platform/broadcom/sonic-platform-modules-accton/as7315-27xb/modules/accton_as7315_27xb_fan.c @@ -34,6 +34,7 @@ #include #include #include +#include #define DRV_NAME "as5812_54x_fan" @@ -569,8 +570,12 @@ static int _add_attributes(struct i2c_client *client, return 0; } +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int fan_probe(struct i2c_client *client, const struct i2c_device_id *dev_id) +#else +static int fan_probe(struct i2c_client *client) +#endif { int status; struct i2c_adapter *adap = to_i2c_adapter(client->dev.parent); diff --git a/platform/broadcom/sonic-platform-modules-accton/as7315-27xb/modules/x86-64-accton-as7315-27xb-cpld.c b/platform/broadcom/sonic-platform-modules-accton/as7315-27xb/modules/x86-64-accton-as7315-27xb-cpld.c old mode 100755 new mode 100644 index 0ebeb637daf..bb65c88f158 --- a/platform/broadcom/sonic-platform-modules-accton/as7315-27xb/modules/x86-64-accton-as7315-27xb-cpld.c +++ b/platform/broadcom/sonic-platform-modules-accton/as7315-27xb/modules/x86-64-accton-as7315-27xb-cpld.c @@ -35,6 +35,7 @@ #include #include #include +#include #define DRV_NAME "as7315_i2c_cpld" @@ -834,7 +835,10 @@ static int _add_sysfs_attributes(struct i2c_client *client, static int _add_mux_channels(struct i2c_client *client, const struct i2c_device_id *id, struct cpld_data *data) { - int num, force, class; + int num, force; +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) + int class; +#endif int status; struct i2c_mux_core *muxc; struct i2c_adapter *adap = to_i2c_adapter(client->dev.parent); @@ -852,8 +856,12 @@ static int _add_mux_channels(struct i2c_client *client, muxc->priv = client; for (num = 0; num < chips[model].nchans; num++) { force = 0; /* dynamic adap number */ +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) class = 0; /* no class by default */ status = i2c_mux_add_adapter(muxc, force, num, class); +#else + status = i2c_mux_add_adapter(muxc, force, num); +#endif if (status) return status ; } @@ -864,13 +872,20 @@ static int _add_mux_channels(struct i2c_client *client, return 0; } +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int as7315_i2c_cpld_probe(struct i2c_client *client, const struct i2c_device_id *dev_id) +#else +static int as7315_i2c_cpld_probe(struct i2c_client *client) +#endif { struct i2c_adapter *adap = to_i2c_adapter(client->dev.parent); int status; struct cpld_data *data = NULL; struct device *dev = &client->dev; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 3, 0) + const struct i2c_device_id *dev_id = i2c_client_get_device_id(client); +#endif if (!i2c_check_functionality(adap, I2C_FUNC_SMBUS_BYTE_DATA)) return -ENODEV; diff --git a/platform/broadcom/sonic-platform-modules-accton/as7315-27xb/modules/x86-64-accton-as7315-27xb-led.c b/platform/broadcom/sonic-platform-modules-accton/as7315-27xb/modules/x86-64-accton-as7315-27xb-led.c old mode 100755 new mode 100644 index fefb44fad33..16323e52f4c --- a/platform/broadcom/sonic-platform-modules-accton/as7315-27xb/modules/x86-64-accton-as7315-27xb-led.c +++ b/platform/broadcom/sonic-platform-modules-accton/as7315-27xb/modules/x86-64-accton-as7315-27xb-led.c @@ -28,6 +28,7 @@ #include #include #include +#include #define DRVNAME "as7315_27xb_led" #define CPLD_I2C_ADDR 0x64 @@ -340,7 +341,11 @@ static int accton_as7315_27xb_led_probe(struct platform_device *pdev) return ret; } +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int accton_as7315_27xb_led_remove(struct platform_device *pdev) +#else +static void accton_as7315_27xb_led_remove(struct platform_device *pdev) +#endif { int i; @@ -348,7 +353,9 @@ static int accton_as7315_27xb_led_remove(struct platform_device *pdev) led_classdev_unregister(&accton_as7315_27xb_leds[i]); } +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) return 0; +#endif } static struct platform_driver accton_as7315_27xb_led_driver = { diff --git a/platform/broadcom/sonic-platform-modules-accton/as7315-27xb/modules/x86-64-accton-as7315-27xb-psu.c b/platform/broadcom/sonic-platform-modules-accton/as7315-27xb/modules/x86-64-accton-as7315-27xb-psu.c index 3fdbaca4376..2023588b157 100644 --- a/platform/broadcom/sonic-platform-modules-accton/as7315-27xb/modules/x86-64-accton-as7315-27xb-psu.c +++ b/platform/broadcom/sonic-platform-modules-accton/as7315-27xb/modules/x86-64-accton-as7315-27xb-psu.c @@ -32,6 +32,7 @@ #include #include #include +#include #define DRV_NAME "as7315_27xb_psu" #define PSU_STATUS_I2C_ADDR 0x64 @@ -213,11 +214,18 @@ static const struct attribute_group as7315_27xb_psu_group = { .attrs = as7315_27xb_psu_attributes, }; +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int as7315_27xb_psu_probe(struct i2c_client *client, const struct i2c_device_id *dev_id) +#else +static int as7315_27xb_psu_probe(struct i2c_client *client) +#endif { struct as7315_27xb_psu_data *data; int status; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 3, 0) + const struct i2c_device_id *dev_id = i2c_client_get_device_id(client); +#endif if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) { status = -EIO; diff --git a/platform/broadcom/sonic-platform-modules-accton/as7315-27xb/setup.py b/platform/broadcom/sonic-platform-modules-accton/as7315-27xb/setup.py index 09187900c7e..e17c72728ef 100755 --- a/platform/broadcom/sonic-platform-modules-accton/as7315-27xb/setup.py +++ b/platform/broadcom/sonic-platform-modules-accton/as7315-27xb/setup.py @@ -11,6 +11,6 @@ description='Module to initialize Accton AS7315-27XB platforms', packages=['as7315_27xb'], - package_dir={'as7315_27xb': 'as7315-27xb/classes'}, + package_dir={'as7315_27xb': 'classes'}, ) diff --git a/platform/broadcom/sonic-platform-modules-accton/as7326-56x/modules/accton_as7326_56x_fan.c b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/modules/accton_as7326_56x_fan.c old mode 100755 new mode 100644 index 2637d485ce8..86c6c8b48d3 --- a/platform/broadcom/sonic-platform-modules-accton/as7326-56x/modules/accton_as7326_56x_fan.c +++ b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/modules/accton_as7326_56x_fan.c @@ -31,6 +31,7 @@ #include #include #include +#include #define DRVNAME "as7326_56x_fan" @@ -447,8 +448,12 @@ static struct as7326_56x_fan_data *as7326_56x_fan_update_device(struct device *d return data; } +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int as7326_56x_fan_probe(struct i2c_client *client, const struct i2c_device_id *dev_id) +#else +static int as7326_56x_fan_probe(struct i2c_client *client) +#endif { struct as7326_56x_fan_data *data; int status; diff --git a/platform/broadcom/sonic-platform-modules-accton/as7326-56x/modules/accton_as7326_56x_leds.c b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/modules/accton_as7326_56x_leds.c index 035f9ad82ec..b75dcab8c77 100644 --- a/platform/broadcom/sonic-platform-modules-accton/as7326-56x/modules/accton_as7326_56x_leds.c +++ b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/modules/accton_as7326_56x_leds.c @@ -29,6 +29,7 @@ #include #include #include +#include extern int as7326_56x_cpld_read (unsigned short cpld_addr, u8 reg); extern int as7326_56x_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); @@ -390,7 +391,11 @@ static int accton_as7326_56x_led_probe(struct platform_device *pdev) return ret; } +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int accton_as7326_56x_led_remove(struct platform_device *pdev) +#else +static void accton_as7326_56x_led_remove(struct platform_device *pdev) +#endif { int i; @@ -398,7 +403,9 @@ static int accton_as7326_56x_led_remove(struct platform_device *pdev) led_classdev_unregister(&accton_as7326_56x_leds[i]); } +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) return 0; +#endif } static struct platform_driver accton_as7326_56x_led_driver = { diff --git a/platform/broadcom/sonic-platform-modules-accton/as7326-56x/modules/accton_as7326_56x_psu.c b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/modules/accton_as7326_56x_psu.c index 4b720512275..b7e43f92d58 100644 --- a/platform/broadcom/sonic-platform-modules-accton/as7326-56x/modules/accton_as7326_56x_psu.c +++ b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/modules/accton_as7326_56x_psu.c @@ -33,6 +33,7 @@ #include #include #include +#include static ssize_t show_status(struct device *dev, struct device_attribute *da, char *buf); static ssize_t show_model_name(struct device *dev, struct device_attribute *da, char *buf); @@ -105,11 +106,18 @@ static const struct attribute_group as7326_56x_psu_group = { .attrs = as7326_56x_psu_attributes, }; +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int as7326_56x_psu_probe(struct i2c_client *client, const struct i2c_device_id *dev_id) +#else +static int as7326_56x_psu_probe(struct i2c_client *client) +#endif { struct as7326_56x_psu_data *data; int status; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 3, 0) + const struct i2c_device_id *dev_id = i2c_client_get_device_id(client); +#endif if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) { status = -EIO; diff --git a/platform/broadcom/sonic-platform-modules-accton/as7326-56x/modules/accton_i2c_cpld.c b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/modules/accton_i2c_cpld.c index 00467b12e14..06b23975365 100644 --- a/platform/broadcom/sonic-platform-modules-accton/as7326-56x/modules/accton_i2c_cpld.c +++ b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/modules/accton_i2c_cpld.c @@ -979,13 +979,20 @@ static ssize_t show_version(struct device *dev, struct device_attribute *attr, c /* * I2C init/probing/exit functions */ +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int as7326_56x_cpld_probe(struct i2c_client *client, const struct i2c_device_id *id) +#else +static int as7326_56x_cpld_probe(struct i2c_client *client) +#endif { struct i2c_adapter *adap = to_i2c_adapter(client->dev.parent); struct as7326_56x_cpld_data *data; int ret = -ENODEV; const struct attribute_group *group = NULL; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 3, 0) + const struct i2c_device_id *id = i2c_client_get_device_id(client); +#endif if (!i2c_check_functionality(adap, I2C_FUNC_SMBUS_BYTE)) goto exit; diff --git a/platform/broadcom/sonic-platform-modules-accton/as7326-56x/setup.py b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/setup.py index 77114c71285..3b81bee1c97 100755 --- a/platform/broadcom/sonic-platform-modules-accton/as7326-56x/setup.py +++ b/platform/broadcom/sonic-platform-modules-accton/as7326-56x/setup.py @@ -11,6 +11,6 @@ description='Module to initialize Accton AS7326-56X platforms', packages=['as7326_56x'], - package_dir={'as7326_56x': 'as7326-56x/classes'}, + package_dir={'as7326_56x': 'classes'}, ) diff --git a/platform/broadcom/sonic-platform-modules-accton/as7712-32x/setup.py b/platform/broadcom/sonic-platform-modules-accton/as7712-32x/setup.py index 09c763c84f0..8d7435bbf73 100755 --- a/platform/broadcom/sonic-platform-modules-accton/as7712-32x/setup.py +++ b/platform/broadcom/sonic-platform-modules-accton/as7712-32x/setup.py @@ -11,6 +11,6 @@ description='Module to initialize Accton AS7712-32X platforms', packages=['as7712_32x'], - package_dir={'as7712_32x': 'as7712-32x/classes'}, + package_dir={'as7712_32x': 'classes'}, ) diff --git a/platform/broadcom/sonic-platform-modules-accton/as7716-32x/modules/accton_as7716_32x_cpld1.c b/platform/broadcom/sonic-platform-modules-accton/as7716-32x/modules/accton_as7716_32x_cpld1.c old mode 100755 new mode 100644 index 7d0117409a4..0ff080085e1 --- a/platform/broadcom/sonic-platform-modules-accton/as7716-32x/modules/accton_as7716_32x_cpld1.c +++ b/platform/broadcom/sonic-platform-modules-accton/as7716-32x/modules/accton_as7716_32x_cpld1.c @@ -33,6 +33,7 @@ #include #include #include +#include static LIST_HEAD(cpld_client_list); static struct mutex list_lock; @@ -521,11 +522,15 @@ static void as7716_32x_cpld_remove_client(struct i2c_client *client) mutex_unlock(&list_lock); } +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int as7716_32x_cpld_probe(struct i2c_client *client, const struct i2c_device_id *dev_id) +#else +static int as7716_32x_cpld_probe(struct i2c_client *client) +#endif { int status; - struct as7716_32x_cpld_data *data = NULL; + struct as7716_32x_cpld_data *data = NULL; if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA)) { dev_dbg(&client->dev, "i2c_check_functionality failed (0x%x)\n", client->addr); diff --git a/platform/broadcom/sonic-platform-modules-accton/as7716-32x/modules/accton_as7716_32x_fan.c b/platform/broadcom/sonic-platform-modules-accton/as7716-32x/modules/accton_as7716_32x_fan.c index f6aedcb2b80..07d5a87a553 100644 --- a/platform/broadcom/sonic-platform-modules-accton/as7716-32x/modules/accton_as7716_32x_fan.c +++ b/platform/broadcom/sonic-platform-modules-accton/as7716-32x/modules/accton_as7716_32x_fan.c @@ -31,6 +31,7 @@ #include #include #include +#include #define DRVNAME "as7716_32x_fan" @@ -438,8 +439,12 @@ static struct as7716_32x_fan_data *as7716_32x_fan_update_device(struct device *d return data; } +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int as7716_32x_fan_probe(struct i2c_client *client, const struct i2c_device_id *dev_id) +#else +static int as7716_32x_fan_probe(struct i2c_client *client) +#endif { struct as7716_32x_fan_data *data; int status; diff --git a/platform/broadcom/sonic-platform-modules-accton/as7716-32x/modules/accton_as7716_32x_leds.c b/platform/broadcom/sonic-platform-modules-accton/as7716-32x/modules/accton_as7716_32x_leds.c old mode 100755 new mode 100644 index cb08189e336..f963e34fd02 --- a/platform/broadcom/sonic-platform-modules-accton/as7716-32x/modules/accton_as7716_32x_leds.c +++ b/platform/broadcom/sonic-platform-modules-accton/as7716-32x/modules/accton_as7716_32x_leds.c @@ -29,6 +29,7 @@ #include #include #include +#include extern int as7716_32x_cpld_read (unsigned short cpld_addr, u8 reg); extern int as7716_32x_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); @@ -372,7 +373,11 @@ static int as7716_32x_led_probe(struct platform_device *pdev) return 0; } +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int as7716_32x_led_remove(struct platform_device *pdev) +#else +static void as7716_32x_led_remove(struct platform_device *pdev) +#endif { int i; @@ -380,7 +385,9 @@ static int as7716_32x_led_remove(struct platform_device *pdev) led_classdev_unregister(&as7716_32x_leds[i]); } +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) return 0; +#endif } static struct platform_driver as7716_32x_led_driver = { diff --git a/platform/broadcom/sonic-platform-modules-accton/as7716-32x/modules/accton_as7716_32x_psu.c b/platform/broadcom/sonic-platform-modules-accton/as7716-32x/modules/accton_as7716_32x_psu.c old mode 100755 new mode 100644 index 5e9b07b8946..b62ecbfb244 --- a/platform/broadcom/sonic-platform-modules-accton/as7716-32x/modules/accton_as7716_32x_psu.c +++ b/platform/broadcom/sonic-platform-modules-accton/as7716-32x/modules/accton_as7716_32x_psu.c @@ -33,6 +33,7 @@ #include #include #include +#include #define MAX_MODEL_NAME 16 @@ -131,11 +132,18 @@ static const struct attribute_group as7716_32x_psu_group = { .attrs = as7716_32x_psu_attributes, }; +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int as7716_32x_psu_probe(struct i2c_client *client, const struct i2c_device_id *dev_id) +#else +static int as7716_32x_psu_probe(struct i2c_client *client) +#endif { struct as7716_32x_psu_data *data; int status; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 3, 0) + const struct i2c_device_id *dev_id = i2c_client_get_device_id(client); +#endif if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) { status = -EIO; diff --git a/platform/broadcom/sonic-platform-modules-accton/as7716-32x/modules/accton_as7716_32x_sfp.c b/platform/broadcom/sonic-platform-modules-accton/as7716-32x/modules/accton_as7716_32x_sfp.c old mode 100755 new mode 100644 index 40435d17889..4abd21c997a --- a/platform/broadcom/sonic-platform-modules-accton/as7716-32x/modules/accton_as7716_32x_sfp.c +++ b/platform/broadcom/sonic-platform-modules-accton/as7716-32x/modules/accton_as7716_32x_sfp.c @@ -31,6 +31,7 @@ #include #include #include +#include #define BIT_INDEX(i) (1UL << (i)) #define I2C_ADDR_CPLD1 0x60 @@ -167,11 +168,18 @@ static const struct attribute_group as7716_32x_sfp_group = { .attrs = as7716_32x_sfp_attributes, }; +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int as7716_32x_sfp_probe(struct i2c_client *client, const struct i2c_device_id *dev_id) +#else +static int as7716_32x_sfp_probe(struct i2c_client *client) +#endif { struct as7716_32x_sfp_data *data; int status; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 3, 0) + const struct i2c_device_id *dev_id = i2c_client_get_device_id(client); +#endif if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) { status = -EIO; diff --git a/platform/broadcom/sonic-platform-modules-accton/as7716-32x/modules/accton_i2c_cpld.c b/platform/broadcom/sonic-platform-modules-accton/as7716-32x/modules/accton_i2c_cpld.c old mode 100755 new mode 100644 index 6e5e20f0083..d5b0bfd9807 --- a/platform/broadcom/sonic-platform-modules-accton/as7716-32x/modules/accton_i2c_cpld.c +++ b/platform/broadcom/sonic-platform-modules-accton/as7716-32x/modules/accton_i2c_cpld.c @@ -31,6 +31,7 @@ #include #include #include +#include #define CPLD_VERSION_REG 0x1 @@ -126,8 +127,12 @@ static void accton_i2c_cpld_remove_client(struct i2c_client *client) mutex_unlock(&list_lock); } +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int accton_i2c_cpld_probe(struct i2c_client *client, const struct i2c_device_id *dev_id) +#else +static int accton_i2c_cpld_probe(struct i2c_client *client) +#endif { int status; diff --git a/platform/broadcom/sonic-platform-modules-accton/as7716-32x/modules/cpr_4011_4mxx.c b/platform/broadcom/sonic-platform-modules-accton/as7716-32x/modules/cpr_4011_4mxx.c old mode 100755 new mode 100644 index cdacf7d7e87..9272f89c7e8 --- a/platform/broadcom/sonic-platform-modules-accton/as7716-32x/modules/cpr_4011_4mxx.c +++ b/platform/broadcom/sonic-platform-modules-accton/as7716-32x/modules/cpr_4011_4mxx.c @@ -33,6 +33,7 @@ #include #include #include +#include #define MAX_FAN_DUTY_CYCLE 100 @@ -217,8 +218,12 @@ static const struct attribute_group cpr_4011_4mxx_group = { .attrs = cpr_4011_4mxx_attributes, }; +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int cpr_4011_4mxx_probe(struct i2c_client *client, const struct i2c_device_id *dev_id) +#else +static int cpr_4011_4mxx_probe(struct i2c_client *client) +#endif { struct cpr_4011_4mxx_data *data; int status; diff --git a/platform/broadcom/sonic-platform-modules-accton/as7716-32x/modules/ym2651y.c b/platform/broadcom/sonic-platform-modules-accton/as7716-32x/modules/ym2651y.c old mode 100755 new mode 100644 index 2b6470a87dd..545bd61cb07 --- a/platform/broadcom/sonic-platform-modules-accton/as7716-32x/modules/ym2651y.c +++ b/platform/broadcom/sonic-platform-modules-accton/as7716-32x/modules/ym2651y.c @@ -31,6 +31,7 @@ #include #include #include +#include #define MAX_FAN_DUTY_CYCLE 100 @@ -362,8 +363,12 @@ static const struct attribute_group ym2651y_group = { .attrs = ym2651y_attributes, }; +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int ym2651y_probe(struct i2c_client *client, const struct i2c_device_id *dev_id) +#else +static int ym2651y_probe(struct i2c_client *client) +#endif { struct ym2651y_data *data; int status; diff --git a/platform/broadcom/sonic-platform-modules-accton/as7716-32x/setup.py b/platform/broadcom/sonic-platform-modules-accton/as7716-32x/setup.py index 7a3d784d326..be697951d9a 100755 --- a/platform/broadcom/sonic-platform-modules-accton/as7716-32x/setup.py +++ b/platform/broadcom/sonic-platform-modules-accton/as7716-32x/setup.py @@ -11,6 +11,6 @@ description='Module to initialize Accton AS7716-32X platforms', packages=['as7716_32x'], - package_dir={'as7716_32x': 'as7716-32x/classes'}, + package_dir={'as7716_32x': 'classes'}, ) diff --git a/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/modules/accton_as7716_32xb_cpld1.c b/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/modules/accton_as7716_32xb_cpld1.c index 23c1e8c1d75..af9b8832ead 100644 --- a/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/modules/accton_as7716_32xb_cpld1.c +++ b/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/modules/accton_as7716_32xb_cpld1.c @@ -33,6 +33,7 @@ #include #include #include +#include static LIST_HEAD(cpld_client_list); static struct mutex list_lock; @@ -760,8 +761,12 @@ static void as7716_32xb_cpld_remove_client(struct i2c_client *client) mutex_unlock(&list_lock); } +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int as7716_32xb_cpld_probe(struct i2c_client *client, const struct i2c_device_id *dev_id) +#else +static int as7716_32xb_cpld_probe(struct i2c_client *client) +#endif { int status; struct as7716_32xb_cpld_data *data = NULL; diff --git a/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/modules/accton_as7716_32xb_fan.c b/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/modules/accton_as7716_32xb_fan.c index 1b09578c5dd..e321ebe2e52 100644 --- a/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/modules/accton_as7716_32xb_fan.c +++ b/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/modules/accton_as7716_32xb_fan.c @@ -31,6 +31,7 @@ #include #include #include +#include #define DRVNAME "as7716_32xb_fan" @@ -614,8 +615,12 @@ static struct as7716_32xb_fan_data *as7716_32xb_fan_update_device(struct device return data; } +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int as7716_32xb_fan_probe(struct i2c_client *client, const struct i2c_device_id *dev_id) +#else +static int as7716_32xb_fan_probe(struct i2c_client *client) +#endif { struct as7716_32xb_fan_data *data; int status; diff --git a/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/modules/accton_as7716_32xb_leds.c b/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/modules/accton_as7716_32xb_leds.c old mode 100755 new mode 100644 index 4e2162843a9..d1ff48837c4 --- a/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/modules/accton_as7716_32xb_leds.c +++ b/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/modules/accton_as7716_32xb_leds.c @@ -29,6 +29,7 @@ #include #include #include +#include extern void led_classdev_unregister(struct led_classdev *led_cdev); extern void led_classdev_resume(struct led_classdev *led_cdev); @@ -372,7 +373,11 @@ static int as7716_32x_led_probe(struct platform_device *pdev) return 0; } +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int as7716_32x_led_remove(struct platform_device *pdev) +#else +static void as7716_32x_led_remove(struct platform_device *pdev) +#endif { int i; @@ -380,7 +385,9 @@ static int as7716_32x_led_remove(struct platform_device *pdev) led_classdev_unregister(&as7716_32x_leds[i]); } +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) return 0; +#endif } static struct platform_driver as7716_32x_led_driver = { diff --git a/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/modules/accton_as7716_32xb_oom.c b/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/modules/accton_as7716_32xb_oom.c old mode 100755 new mode 100644 index 3aed7b359bb..6220b928718 --- a/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/modules/accton_as7716_32xb_oom.c +++ b/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/modules/accton_as7716_32xb_oom.c @@ -9,6 +9,7 @@ #include #include #include +#include #define STRING_TO_DEC_VALUE 10 #define EEPROM_DATA_SIZE 512 @@ -154,11 +155,18 @@ static const struct attribute_group as7716_32xb_oom_group = { .attrs = as7716_32xb_oom_attributes, }; +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int as7716_32xb_oom_probe(struct i2c_client *client, const struct i2c_device_id *dev_id) +#else +static int as7716_32xb_oom_probe(struct i2c_client *client) +#endif { struct as7716_32xb_oom_data *data; int status; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 3, 0) + const struct i2c_device_id *dev_id = i2c_client_get_device_id(client); +#endif data = kzalloc(sizeof(struct as7716_32xb_oom_data), GFP_KERNEL); if (!data) { diff --git a/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/modules/accton_as7716_32xb_pmbus.c b/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/modules/accton_as7716_32xb_pmbus.c old mode 100755 new mode 100644 index 4d3e4226694..ad824a0a18e --- a/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/modules/accton_as7716_32xb_pmbus.c +++ b/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/modules/accton_as7716_32xb_pmbus.c @@ -9,6 +9,7 @@ #include #include #include +#include #define STRING_TO_DEC_VALUE 10 @@ -342,11 +343,18 @@ static const struct attribute_group as7716_32xb_pmbus_group = { .attrs = as7716_32xb_pmbus_attributes, }; +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int as7716_32xb_pmbus_probe(struct i2c_client *client, const struct i2c_device_id *dev_id) +#else +static int as7716_32xb_pmbus_probe(struct i2c_client *client) +#endif { struct as7716_32xb_pmbus_data *data; int status; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 3, 0) + const struct i2c_device_id *dev_id = i2c_client_get_device_id(client); +#endif data = kzalloc(sizeof(struct as7716_32xb_pmbus_data), GFP_KERNEL); if (!data) { diff --git a/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/modules/accton_as7716_32xb_psu.c b/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/modules/accton_as7716_32xb_psu.c old mode 100755 new mode 100644 index 8cb57e414b4..fb75f22b45f --- a/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/modules/accton_as7716_32xb_psu.c +++ b/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/modules/accton_as7716_32xb_psu.c @@ -33,6 +33,7 @@ #include #include #include +#include #define MAX_MODEL_NAME 16 #define DC12V_FAN_DIR_OFFSET 0x34 @@ -166,11 +167,18 @@ static const struct attribute_group as7716_32xb_psu_group = { .attrs = as7716_32xb_psu_attributes, }; +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int as7716_32xb_psu_probe(struct i2c_client *client, const struct i2c_device_id *dev_id) +#else +static int as7716_32xb_psu_probe(struct i2c_client *client) +#endif { struct as7716_32xb_psu_data *data; int status; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 3, 0) + const struct i2c_device_id *dev_id = i2c_client_get_device_id(client); +#endif data = kzalloc(sizeof(struct as7716_32xb_psu_data), GFP_KERNEL); if (!data) { diff --git a/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/modules/accton_as7716_32xb_sfp.c b/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/modules/accton_as7716_32xb_sfp.c old mode 100755 new mode 100644 index 4f39a14fba0..275afe92c56 --- a/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/modules/accton_as7716_32xb_sfp.c +++ b/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/modules/accton_as7716_32xb_sfp.c @@ -31,6 +31,7 @@ #include #include #include +#include #define BIT_INDEX(i) (1UL << (i)) #define I2C_ADDR_CPLD1 0x60 @@ -166,11 +167,18 @@ static const struct attribute_group as7716_32x_sfp_group = { .attrs = as7716_32x_sfp_attributes, }; +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int as7716_32x_sfp_probe(struct i2c_client *client, const struct i2c_device_id *dev_id) +#else +static int as7716_32x_sfp_probe(struct i2c_client *client) +#endif { struct as7716_32x_sfp_data *data; int status; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 3, 0) + const struct i2c_device_id *dev_id = i2c_client_get_device_id(client); +#endif if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) { status = -EIO; diff --git a/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/modules/accton_as7716_32xb_sys.c b/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/modules/accton_as7716_32xb_sys.c old mode 100755 new mode 100644 index 63b15f7e280..1957b625617 --- a/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/modules/accton_as7716_32xb_sys.c +++ b/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/modules/accton_as7716_32xb_sys.c @@ -9,6 +9,7 @@ #include #include #include +#include #define STRING_TO_DEC_VALUE 10 #define EEPROM_DATA_SIZE 256 @@ -106,11 +107,18 @@ static const struct attribute_group as7716_32xb_sys_group = { .attrs = as7716_32xb_sys_attributes, }; +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int as7716_32xb_sys_probe(struct i2c_client *client, const struct i2c_device_id *dev_id) +#else +static int as7716_32xb_sys_probe(struct i2c_client *client) +#endif { struct as7716_32xb_sys_data *data; int status; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 3, 0) + const struct i2c_device_id *dev_id = i2c_client_get_device_id(client); +#endif data = kzalloc(sizeof(struct as7716_32xb_sys_data), GFP_KERNEL); if (!data) { diff --git a/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/modules/accton_as7716_32xb_thermal.c b/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/modules/accton_as7716_32xb_thermal.c old mode 100755 new mode 100644 index b5977e0ea51..356540e2edd --- a/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/modules/accton_as7716_32xb_thermal.c +++ b/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/modules/accton_as7716_32xb_thermal.c @@ -9,6 +9,7 @@ #include #include #include +#include #define STRING_TO_DEC_VALUE 10 #define STRING_TO_HEX_VALUE 16 @@ -119,11 +120,18 @@ static const struct attribute_group as7716_32xb_thermal_group = { .attrs = as7716_32xb_thermal_attributes, }; +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int as7716_32xb_thermal_probe(struct i2c_client *client, const struct i2c_device_id *dev_id) +#else +static int as7716_32xb_thermal_probe(struct i2c_client *client) +#endif { struct as7716_32xb_thermal_data *data; int status; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 3, 0) + const struct i2c_device_id *dev_id = i2c_client_get_device_id(client); +#endif data = kzalloc(sizeof(struct as7716_32xb_thermal_data), GFP_KERNEL); if (!data) { diff --git a/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/modules/accton_i2c_cpld.c b/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/modules/accton_i2c_cpld.c old mode 100755 new mode 100644 index 1508a0223a5..590d5451fb9 --- a/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/modules/accton_i2c_cpld.c +++ b/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/modules/accton_i2c_cpld.c @@ -31,6 +31,7 @@ #include #include #include +#include #define CPLD_VERSION_REG 0x1 @@ -126,8 +127,12 @@ static void accton_i2c_cpld_remove_client(struct i2c_client *client) mutex_unlock(&list_lock); } +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int accton_i2c_cpld_probe(struct i2c_client *client, const struct i2c_device_id *dev_id) +#else +static int accton_i2c_cpld_probe(struct i2c_client *client) +#endif { int status; diff --git a/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/setup.py b/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/setup.py index 3edfc29b381..37debf8b163 100755 --- a/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/setup.py +++ b/platform/broadcom/sonic-platform-modules-accton/as7716-32xb/setup.py @@ -11,6 +11,6 @@ description='Module to initialize Accton AS7716-32XB platforms', packages=['as7716_32xb'], - package_dir={'as7716_32xb': 'as7716-32xb/classes'}, + package_dir={'as7716_32xb': 'classes'}, ) diff --git a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/modules/accton_as7726_32x_cpld.c b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/modules/accton_as7726_32x_cpld.c index cd0c5639aef..e29ac707cfc 100755 --- a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/modules/accton_as7726_32x_cpld.c +++ b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/modules/accton_as7726_32x_cpld.c @@ -726,13 +726,20 @@ static ssize_t show_version(struct device *dev, struct device_attribute *attr, c /* * I2C init/probing/exit functions */ +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int as7726_32x_cpld_probe(struct i2c_client *client, const struct i2c_device_id *id) +#else +static int as7726_32x_cpld_probe(struct i2c_client *client) +#endif { struct i2c_adapter *adap = to_i2c_adapter(client->dev.parent); struct as7726_32x_cpld_data *data; int ret = -ENODEV; const struct attribute_group *group = NULL; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 3, 0) + const struct i2c_device_id *id = i2c_client_get_device_id(client); +#endif if (!i2c_check_functionality(adap, I2C_FUNC_SMBUS_BYTE)) goto exit; diff --git a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/modules/accton_as7726_32x_fan.c b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/modules/accton_as7726_32x_fan.c old mode 100755 new mode 100644 index 3f7489de2b0..0af303dbfbe --- a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/modules/accton_as7726_32x_fan.c +++ b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/modules/accton_as7726_32x_fan.c @@ -31,6 +31,7 @@ #include #include #include +#include #define DRVNAME "as7726_32x_fan" @@ -407,8 +408,12 @@ static struct as7726_32x_fan_data *as7726_32x_fan_update_device(struct device *d return data; } +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int as7726_32x_fan_probe(struct i2c_client *client, const struct i2c_device_id *dev_id) +#else +static int as7726_32x_fan_probe(struct i2c_client *client) +#endif { struct as7726_32x_fan_data *data; int status; diff --git a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/modules/accton_as7726_32x_leds.c b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/modules/accton_as7726_32x_leds.c old mode 100755 new mode 100644 index c179fd855bd..9f516a8339f --- a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/modules/accton_as7726_32x_leds.c +++ b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/modules/accton_as7726_32x_leds.c @@ -29,6 +29,7 @@ #include #include #include +#include extern int as7726_32x_cpld_read (unsigned short cpld_addr, u8 reg); extern int as7726_32x_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); @@ -370,7 +371,11 @@ static int accton_as7726_32x_led_probe(struct platform_device *pdev) return ret; } +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int accton_as7726_32x_led_remove(struct platform_device *pdev) +#else +static void accton_as7726_32x_led_remove(struct platform_device *pdev) +#endif { int i; @@ -378,7 +383,9 @@ static int accton_as7726_32x_led_remove(struct platform_device *pdev) led_classdev_unregister(&accton_as7726_32x_leds[i]); } +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) return 0; +#endif } static struct platform_driver accton_as7726_32x_led_driver = { diff --git a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/modules/accton_as7726_32x_psu.c b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/modules/accton_as7726_32x_psu.c old mode 100755 new mode 100644 index 5bb63c6622e..555c3ad5084 --- a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/modules/accton_as7726_32x_psu.c +++ b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/modules/accton_as7726_32x_psu.c @@ -33,6 +33,7 @@ #include #include #include +#include static ssize_t show_status(struct device *dev, struct device_attribute *da, char *buf); static ssize_t show_model_name(struct device *dev, struct device_attribute *da, char *buf); @@ -105,11 +106,18 @@ static const struct attribute_group as7726_32x_psu_group = { .attrs = as7726_32x_psu_attributes, }; +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int as7726_32x_psu_probe(struct i2c_client *client, const struct i2c_device_id *dev_id) +#else +static int as7726_32x_psu_probe(struct i2c_client *client) +#endif { struct as7726_32x_psu_data *data; int status; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 3, 0) + const struct i2c_device_id *dev_id = i2c_client_get_device_id(client); +#endif if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) { status = -EIO; diff --git a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/modules/ym2651y.c b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/modules/ym2651y.c old mode 100755 new mode 100644 index 2b6470a87dd..545bd61cb07 --- a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/modules/ym2651y.c +++ b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/modules/ym2651y.c @@ -31,6 +31,7 @@ #include #include #include +#include #define MAX_FAN_DUTY_CYCLE 100 @@ -362,8 +363,12 @@ static const struct attribute_group ym2651y_group = { .attrs = ym2651y_attributes, }; +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int ym2651y_probe(struct i2c_client *client, const struct i2c_device_id *dev_id) +#else +static int ym2651y_probe(struct i2c_client *client) +#endif { struct ym2651y_data *data; int status; diff --git a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/setup.py b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/setup.py index 9841874dbd1..0c7d563297f 100755 --- a/platform/broadcom/sonic-platform-modules-accton/as7726-32x/setup.py +++ b/platform/broadcom/sonic-platform-modules-accton/as7726-32x/setup.py @@ -11,6 +11,6 @@ description='Module to initialize Accton AS7726-32X platforms', packages=['as7726_32x'], - package_dir={'as7726_32x': 'as7726-32x/classes'}, + package_dir={'as7726_32x': 'classes'}, ) diff --git a/platform/broadcom/sonic-platform-modules-accton/as7816-64x/modules/x86-64-accton-as7816-64x-fan.c b/platform/broadcom/sonic-platform-modules-accton/as7816-64x/modules/x86-64-accton-as7816-64x-fan.c index 10b4e3c77bb..a8e80beaf6b 100644 --- a/platform/broadcom/sonic-platform-modules-accton/as7816-64x/modules/x86-64-accton-as7816-64x-fan.c +++ b/platform/broadcom/sonic-platform-modules-accton/as7816-64x/modules/x86-64-accton-as7816-64x-fan.c @@ -29,6 +29,7 @@ #include #include #include +#include #define DRVNAME "as7816_64x_fan" @@ -375,8 +376,12 @@ static struct as7816_64x_fan_data *as7816_64x_fan_update_device(struct device *d return data; } +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int as7816_64x_fan_probe(struct i2c_client *client, const struct i2c_device_id *dev_id) +#else +static int as7816_64x_fan_probe(struct i2c_client *client) +#endif { struct as7816_64x_fan_data *data; int status; diff --git a/platform/broadcom/sonic-platform-modules-accton/as7816-64x/modules/x86-64-accton-as7816-64x-psu.c b/platform/broadcom/sonic-platform-modules-accton/as7816-64x/modules/x86-64-accton-as7816-64x-psu.c index b19567aee97..0b8dabbefe6 100644 --- a/platform/broadcom/sonic-platform-modules-accton/as7816-64x/modules/x86-64-accton-as7816-64x-psu.c +++ b/platform/broadcom/sonic-platform-modules-accton/as7816-64x/modules/x86-64-accton-as7816-64x-psu.c @@ -33,6 +33,7 @@ #include #include #include +#include #define PSU_STATUS_I2C_ADDR 0x60 #define PSU_STATUS_I2C_REG_OFFSET 0x03 @@ -100,11 +101,18 @@ static const struct attribute_group as7816_64x_psu_group = { .attrs = as7816_64x_psu_attributes, }; +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int as7816_64x_psu_probe(struct i2c_client *client, const struct i2c_device_id *dev_id) +#else +static int as7816_64x_psu_probe(struct i2c_client *client) +#endif { struct as7816_64x_psu_data *data; int status; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 3, 0) + const struct i2c_device_id *dev_id = i2c_client_get_device_id(client); +#endif if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) { status = -EIO; diff --git a/platform/broadcom/sonic-platform-modules-accton/as7816-64x/modules/x86-64-accton-as7816-64x-sfp.c b/platform/broadcom/sonic-platform-modules-accton/as7816-64x/modules/x86-64-accton-as7816-64x-sfp.c index 2a5d954cf39..dc62a7cc134 100644 --- a/platform/broadcom/sonic-platform-modules-accton/as7816-64x/modules/x86-64-accton-as7816-64x-sfp.c +++ b/platform/broadcom/sonic-platform-modules-accton/as7816-64x/modules/x86-64-accton-as7816-64x-sfp.c @@ -31,6 +31,7 @@ #include #include #include +#include #define DRIVER_NAME "as7816_64x_sfp" /* Platform dependent */ @@ -1418,11 +1419,18 @@ static int qsfp_probe(struct i2c_client *client, const struct i2c_device_id *dev } /* Platform dependent +++ */ +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int sfp_device_probe(struct i2c_client *client, const struct i2c_device_id *dev_id) +#else +static int sfp_device_probe(struct i2c_client *client) +#endif { int ret = 0; struct sfp_port_data *data = NULL; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 3, 0) + const struct i2c_device_id *dev_id = i2c_client_get_device_id(client); +#endif if (client->addr != SFP_EEPROM_A0_I2C_ADDR) { return -ENODEV; diff --git a/platform/broadcom/sonic-platform-modules-accton/as7816-64x/setup.py b/platform/broadcom/sonic-platform-modules-accton/as7816-64x/setup.py index 6633b9438b8..bdfbe0c57f5 100755 --- a/platform/broadcom/sonic-platform-modules-accton/as7816-64x/setup.py +++ b/platform/broadcom/sonic-platform-modules-accton/as7816-64x/setup.py @@ -11,6 +11,6 @@ description='Module to initialize Accton AS7816-64X platforms', packages=['as7816_64x'], - package_dir={'as7816_64x': 'as7816-64x/classes'}, + package_dir={'as7816_64x': 'classes'}, ) diff --git a/platform/broadcom/sonic-platform-modules-accton/as9716-32d/modules/accton_as9716_32d_cpld.c b/platform/broadcom/sonic-platform-modules-accton/as9716-32d/modules/accton_as9716_32d_cpld.c index 4cb51e301f2..cac6a892b3d 100755 --- a/platform/broadcom/sonic-platform-modules-accton/as9716-32d/modules/accton_as9716_32d_cpld.c +++ b/platform/broadcom/sonic-platform-modules-accton/as9716-32d/modules/accton_as9716_32d_cpld.c @@ -755,14 +755,21 @@ static ssize_t set_mode_reset(struct device *dev, struct device_attribute *da, /* * I2C init/probing/exit functions */ +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int as9716_32d_cpld_probe(struct i2c_client *client, const struct i2c_device_id *id) +#else +static int as9716_32d_cpld_probe(struct i2c_client *client) +#endif { struct i2c_adapter *adap = to_i2c_adapter(client->dev.parent); struct as9716_32d_cpld_data *data; int ret = -ENODEV; int status; const struct attribute_group *group = NULL; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 3, 0) + const struct i2c_device_id *id = i2c_client_get_device_id(client); +#endif if (!i2c_check_functionality(adap, I2C_FUNC_SMBUS_BYTE)) goto exit; diff --git a/platform/broadcom/sonic-platform-modules-accton/as9716-32d/modules/accton_as9716_32d_fan.c b/platform/broadcom/sonic-platform-modules-accton/as9716-32d/modules/accton_as9716_32d_fan.c old mode 100755 new mode 100644 index ac04fef9ce4..ee00b9c8eda --- a/platform/broadcom/sonic-platform-modules-accton/as9716-32d/modules/accton_as9716_32d_fan.c +++ b/platform/broadcom/sonic-platform-modules-accton/as9716-32d/modules/accton_as9716_32d_fan.c @@ -31,6 +31,7 @@ #include #include #include +#include #define DRVNAME "as9716_32d_fan" @@ -406,8 +407,12 @@ static struct as9716_32d_fan_data *as9716_32d_fan_update_device(struct device *d return data; } +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int as9716_32d_fan_probe(struct i2c_client *client, const struct i2c_device_id *dev_id) +#else +static int as9716_32d_fan_probe(struct i2c_client *client) +#endif { struct as9716_32d_fan_data *data; int status; diff --git a/platform/broadcom/sonic-platform-modules-accton/as9716-32d/modules/accton_as9716_32d_ioport.c b/platform/broadcom/sonic-platform-modules-accton/as9716-32d/modules/accton_as9716_32d_ioport.c index e6d9e8adf37..d25743af035 100644 --- a/platform/broadcom/sonic-platform-modules-accton/as9716-32d/modules/accton_as9716_32d_ioport.c +++ b/platform/broadcom/sonic-platform-modules-accton/as9716-32d/modules/accton_as9716_32d_ioport.c @@ -32,6 +32,7 @@ #include #include #include +#include #define DRVNAME "as9716_32d_ioport" #define IOPORT_I2C_MUX_RST 0x50D @@ -117,11 +118,17 @@ static int as9716_32d_ioport_probe(struct platform_device *pdev) return status; } +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int as9716_32d_ioport_remove(struct platform_device *pdev) +#else +static void as9716_32d_ioport_remove(struct platform_device *pdev) +#endif { sysfs_remove_group(&pdev->dev.kobj, &sys_group); release_region(IOPORT_I2C_MUX_RST, 1); +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) return 0; +#endif } static struct platform_driver as9716_32d_ioport_driver = { diff --git a/platform/broadcom/sonic-platform-modules-accton/as9716-32d/modules/accton_as9716_32d_leds.c b/platform/broadcom/sonic-platform-modules-accton/as9716-32d/modules/accton_as9716_32d_leds.c old mode 100755 new mode 100644 index 0fd28a4631b..8e1bb79b95d --- a/platform/broadcom/sonic-platform-modules-accton/as9716-32d/modules/accton_as9716_32d_leds.c +++ b/platform/broadcom/sonic-platform-modules-accton/as9716-32d/modules/accton_as9716_32d_leds.c @@ -29,6 +29,7 @@ #include #include #include +#include extern int as9716_32d_cpld_read (unsigned short cpld_addr, u8 reg); extern int as9716_32d_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); @@ -425,7 +426,11 @@ static int accton_as9716_32d_led_probe(struct platform_device *pdev) return ret; } +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int accton_as9716_32d_led_remove(struct platform_device *pdev) +#else +static void accton_as9716_32d_led_remove(struct platform_device *pdev) +#endif { int i; @@ -433,7 +438,9 @@ static int accton_as9716_32d_led_remove(struct platform_device *pdev) led_classdev_unregister(&accton_as9716_32d_leds[i]); } +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) return 0; +#endif } static struct platform_driver accton_as9716_32d_led_driver = { diff --git a/platform/broadcom/sonic-platform-modules-accton/as9716-32d/modules/accton_as9716_32d_psu.c b/platform/broadcom/sonic-platform-modules-accton/as9716-32d/modules/accton_as9716_32d_psu.c old mode 100755 new mode 100644 index 06c6b8e5e34..d65ecb4e7f4 --- a/platform/broadcom/sonic-platform-modules-accton/as9716-32d/modules/accton_as9716_32d_psu.c +++ b/platform/broadcom/sonic-platform-modules-accton/as9716-32d/modules/accton_as9716_32d_psu.c @@ -33,6 +33,7 @@ #include #include #include +#include #define MAX_MODEL_NAME 16 #define MAX_SERIAL_NUMBER 19 @@ -130,11 +131,18 @@ static const struct attribute_group as9716_32d_psu_group = { .attrs = as9716_32d_psu_attributes, }; +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int as9716_32d_psu_probe(struct i2c_client *client, const struct i2c_device_id *dev_id) +#else +static int as9716_32d_psu_probe(struct i2c_client *client) +#endif { struct as9716_32d_psu_data *data; int status; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 3, 0) + const struct i2c_device_id *dev_id = i2c_client_get_device_id(client); +#endif if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) { status = -EIO; diff --git a/platform/broadcom/sonic-platform-modules-accton/as9716-32d/modules/accton_i2c_psu.c b/platform/broadcom/sonic-platform-modules-accton/as9716-32d/modules/accton_i2c_psu.c old mode 100755 new mode 100644 index da2b39d367f..f1175b2d182 --- a/platform/broadcom/sonic-platform-modules-accton/as9716-32d/modules/accton_i2c_psu.c +++ b/platform/broadcom/sonic-platform-modules-accton/as9716-32d/modules/accton_i2c_psu.c @@ -13,6 +13,7 @@ #include #include #include +#include #define DRIVER_DESCRIPTION_NAME "accton i2c psu driver" /* PMBus Protocol. */ @@ -322,8 +323,12 @@ static const struct attribute_group accton_i2c_psu_group = { .attrs = accton_i2c_psu_attributes, }; +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int accton_i2c_psu_probe(struct i2c_client *client, const struct i2c_device_id *dev_id) +#else +static int accton_i2c_psu_probe(struct i2c_client *client) +#endif { struct accton_i2c_psu_data *data; int status; diff --git a/platform/broadcom/sonic-platform-modules-accton/as9716-32d/setup.py b/platform/broadcom/sonic-platform-modules-accton/as9716-32d/setup.py index 7c70492e5d6..f316de02288 100755 --- a/platform/broadcom/sonic-platform-modules-accton/as9716-32d/setup.py +++ b/platform/broadcom/sonic-platform-modules-accton/as9716-32d/setup.py @@ -11,6 +11,6 @@ description='Module to initialize Accton AS9716-32D platforms', packages=['as9716_32d'], - package_dir={'as9716_32d': 'as9716-32d/classes'}, + package_dir={'as9716_32d': 'classes'}, ) diff --git a/platform/broadcom/sonic-platform-modules-accton/as9726-32d/modules/x86-64-accton-as9726-32d-cpld.c b/platform/broadcom/sonic-platform-modules-accton/as9726-32d/modules/x86-64-accton-as9726-32d-cpld.c index cc1c32a68a7..c58bab01809 100755 --- a/platform/broadcom/sonic-platform-modules-accton/as9726-32d/modules/x86-64-accton-as9726-32d-cpld.c +++ b/platform/broadcom/sonic-platform-modules-accton/as9726-32d/modules/x86-64-accton-as9726-32d-cpld.c @@ -763,14 +763,21 @@ static ssize_t set_mode_reset(struct device *dev, struct device_attribute *da, /* * I2C init/probing/exit functions */ +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int as9726_32d_cpld_probe(struct i2c_client *client, const struct i2c_device_id *id) +#else +static int as9726_32d_cpld_probe(struct i2c_client *client) +#endif { struct i2c_adapter *adap = to_i2c_adapter(client->dev.parent); struct as9726_32d_cpld_data *data; int ret = -ENODEV; int status; const struct attribute_group *group = NULL; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 3, 0) + const struct i2c_device_id *id = i2c_client_get_device_id(client); +#endif if (!i2c_check_functionality(adap, I2C_FUNC_SMBUS_BYTE)) goto exit; diff --git a/platform/broadcom/sonic-platform-modules-accton/as9726-32d/modules/x86-64-accton-as9726-32d-fan.c b/platform/broadcom/sonic-platform-modules-accton/as9726-32d/modules/x86-64-accton-as9726-32d-fan.c old mode 100755 new mode 100644 index b220b137bf5..c6256ff2f39 --- a/platform/broadcom/sonic-platform-modules-accton/as9726-32d/modules/x86-64-accton-as9726-32d-fan.c +++ b/platform/broadcom/sonic-platform-modules-accton/as9726-32d/modules/x86-64-accton-as9726-32d-fan.c @@ -31,6 +31,7 @@ #include #include #include +#include #define DRVNAME "as9726_32d_fan" @@ -465,8 +466,12 @@ static struct as9726_32d_fan_data *as9726_32d_fan_update_device(struct device *d return data; } +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int as9726_32d_fan_probe(struct i2c_client *client, const struct i2c_device_id *dev_id) +#else +static int as9726_32d_fan_probe(struct i2c_client *client) +#endif { struct as9726_32d_fan_data *data; int status; diff --git a/platform/broadcom/sonic-platform-modules-accton/as9726-32d/modules/x86-64-accton-as9726-32d-psu.c b/platform/broadcom/sonic-platform-modules-accton/as9726-32d/modules/x86-64-accton-as9726-32d-psu.c old mode 100755 new mode 100644 index 13595fa1274..27e8a875c8a --- a/platform/broadcom/sonic-platform-modules-accton/as9726-32d/modules/x86-64-accton-as9726-32d-psu.c +++ b/platform/broadcom/sonic-platform-modules-accton/as9726-32d/modules/x86-64-accton-as9726-32d-psu.c @@ -33,6 +33,7 @@ #include #include #include +#include #define MAX_MODEL_NAME 20 #define MAX_SERIAL_NUMBER 19 @@ -137,11 +138,18 @@ static const struct attribute_group as9726_32d_psu_group = { .attrs = as9726_32d_psu_attributes, }; +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int as9726_32d_psu_probe(struct i2c_client *client, const struct i2c_device_id *dev_id) +#else +static int as9726_32d_psu_probe(struct i2c_client *client) +#endif { struct as9726_32d_psu_data *data; int status; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 3, 0) + const struct i2c_device_id *dev_id = i2c_client_get_device_id(client); +#endif if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) { status = -EIO; diff --git a/platform/broadcom/sonic-platform-modules-accton/as9726-32d/modules/ym2651y.c b/platform/broadcom/sonic-platform-modules-accton/as9726-32d/modules/ym2651y.c old mode 100755 new mode 100644 index f1e517e0a17..39da88d3671 --- a/platform/broadcom/sonic-platform-modules-accton/as9726-32d/modules/ym2651y.c +++ b/platform/broadcom/sonic-platform-modules-accton/as9726-32d/modules/ym2651y.c @@ -31,6 +31,7 @@ #include #include #include +#include #define MAX_FAN_DUTY_CYCLE 100 @@ -429,11 +430,18 @@ static const struct attribute_group ym2651y_group = { .attrs = ym2651y_attributes, }; +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int ym2651y_probe(struct i2c_client *client, const struct i2c_device_id *dev_id) +#else +static int ym2651y_probe(struct i2c_client *client) +#endif { struct ym2651y_data *data; int status; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 3, 0) + const struct i2c_device_id *dev_id = i2c_client_get_device_id(client); +#endif if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA | diff --git a/platform/broadcom/sonic-platform-modules-accton/as9726-32d/setup.py b/platform/broadcom/sonic-platform-modules-accton/as9726-32d/setup.py index 7b84a9cab7e..bc6bad7edfd 100755 --- a/platform/broadcom/sonic-platform-modules-accton/as9726-32d/setup.py +++ b/platform/broadcom/sonic-platform-modules-accton/as9726-32d/setup.py @@ -10,5 +10,5 @@ description='Module to initialize Accton AS9726_32D platforms', packages=['as9726_32d'], - package_dir={'as9726_32d': 'as9726-32d/classes'}, + package_dir={'as9726_32d': 'classes'}, ) diff --git a/platform/broadcom/sonic-platform-modules-accton/debian/rules b/platform/broadcom/sonic-platform-modules-accton/debian/rules index 3a4cce22a3e..a0e66bf1ba0 100755 --- a/platform/broadcom/sonic-platform-modules-accton/debian/rules +++ b/platform/broadcom/sonic-platform-modules-accton/debian/rules @@ -21,6 +21,7 @@ endif PACKAGE_PRE_NAME := sonic-platform-accton KVERSION ?= $(shell uname -r) KERNEL_SRC := /lib/modules/$(KVERSION) +export KERNEL_SRC MOD_SRC_DIR:= $(shell pwd) MODULE_DIRS := as7712-32x as5712-54x as7816-64x as7716-32x as7716-32xb as7312-54x MODULE_DIRS += as7326-56x as6712-32x as7726-32x as4630-54pe as4630-54te minipack as5812-54x @@ -56,6 +57,12 @@ override_dh_auto_build: if [ -f $(MOD_SRC_DIR)/$${mod}/setup.py ]; then \ PYBUILD_NAME=$${mod} pybuild --build -d $${mod}; \ fi; \ + if [ -f $(MOD_SRC_DIR)/$${mod}/sonic_platform_setup.py ]; then \ + cd $(MOD_SRC_DIR)/$${mod}; \ + python3 sonic_platform_setup.py bdist_wheel -d $(MOD_SRC_DIR)/$${mod}; \ + echo "Finished making sonic-platform whl package for $$mod"; \ + cd $(MOD_SRC_DIR); \ + fi; \ if [ -d $(MOD_SRC_DIR)/$${mod}/pddf ]; then \ cd $(MOD_SRC_DIR)/$${mod}/pddf; \ if [ -f sonic_platform_setup.py ]; then \ @@ -71,14 +78,21 @@ override_dh_auto_test: override_dh_auto_install: (set -e; for mod in $(MODULE_DIRS); do \ - $(MAKE) -C $(KERNEL_SRC)/build M=$(MOD_SRC_DIR) INSTALL_MOD_PATH=$(MOD_SRC_DIR)/debian/platform-modules-$${mod} modules_install; \ + $(MAKE) -C $(KERNEL_SRC)/build M=$(MOD_SRC_DIR)/$${mod}/modules INSTALL_MOD_PATH=$(MOD_SRC_DIR)/debian/$(PACKAGE_PRE_NAME)-$${mod} modules_install; \ dh_installdirs -p$(PACKAGE_PRE_NAME)-$${mod} usr/local/bin; \ cp $(MOD_SRC_DIR)/$${mod}/$(UTILS_DIR)/* debian/$(PACKAGE_PRE_NAME)-$${mod}/usr/local/bin/; \ dh_installdirs -p$(PACKAGE_PRE_NAME)-$${mod} lib/systemd/system; \ cp $(MOD_SRC_DIR)/$${mod}/$(SERVICE_DIR)/*.service debian/$(PACKAGE_PRE_NAME)-$${mod}/lib/systemd/system/; \ - dh_installdirs -p$(PACKAGE_PRE_NAME)-$${mod} etc/udev/rules.d; \ - cp $(MOD_SRC_DIR)/$${mod}/$(UDEV_DIR)/* debian/$(PACKAGE_PRE_NAME)-$${mod}/etc/udev/rules.d/; \ + if [ -d $(MOD_SRC_DIR)/$${mod}/$(UDEV_DIR) ]; then \ + dh_installdirs -p$(PACKAGE_PRE_NAME)-$${mod} etc/udev/rules.d; \ + cp -a $(MOD_SRC_DIR)/$${mod}/$(UDEV_DIR)/* debian/$(PACKAGE_PRE_NAME)-$${mod}/etc/udev/rules.d/; \ + fi; \ if [ -f $(MOD_SRC_DIR)/$${mod}/setup.py ]; then \ PYBUILD_NAME=$${mod} pybuild --install -d $${mod} --dest-dir debian/$(PACKAGE_PRE_NAME)-$${mod}; \ fi; \ done) + +override_dh_usrlocal: + # SONiC platform packages intentionally install files into /usr/local. + # Disable dh_usrlocal to avoid build failure. + true diff --git a/platform/broadcom/sonic-platform-modules-accton/minipack/modules/minipack_psensor.c b/platform/broadcom/sonic-platform-modules-accton/minipack/modules/minipack_psensor.c index 72826f46093..6fd6c8a298e 100755 --- a/platform/broadcom/sonic-platform-modules-accton/minipack/modules/minipack_psensor.c +++ b/platform/broadcom/sonic-platform-modules-accton/minipack/modules/minipack_psensor.c @@ -1178,12 +1178,18 @@ static int minipack_probe(struct platform_device *pdev) return status; } +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int minipack_remove(struct platform_device *pdev) +#else +static void minipack_remove(struct platform_device *pdev) +#endif { hwmon_device_unregister(mp_data->hwmon_dev); sysfs_remove_group(&pdev->dev.kobj, &mp_data->group); kfree(mp_data->group.attrs); +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) return 0; +#endif } static struct platform_driver minipack_driver = { diff --git a/platform/broadcom/sonic-platform-modules-accton/minipack/setup.py b/platform/broadcom/sonic-platform-modules-accton/minipack/setup.py index b5d08c090ba..ae350b71ba8 100755 --- a/platform/broadcom/sonic-platform-modules-accton/minipack/setup.py +++ b/platform/broadcom/sonic-platform-modules-accton/minipack/setup.py @@ -5,7 +5,7 @@ from setuptools import setup, Extension os.listdir -module1 = Extension("fbfpgaio", sources = ["minipack/lib/fbfpgaiomodule.c"]) +module1 = Extension("fbfpgaio", sources = ["lib/fbfpgaiomodule.c"]) setup( name='minipack', @@ -13,7 +13,7 @@ description='Module to initialize Accton MiniPack platforms', packages=['minipack'], - package_dir={'minipack': 'minipack/classes'}, + package_dir={'minipack': 'classes'}, ext_modules=[module1], ) diff --git a/platform/broadcom/sonic-platform-modules-arista b/platform/broadcom/sonic-platform-modules-arista index 90971a883d5..b60994d4666 160000 --- a/platform/broadcom/sonic-platform-modules-arista +++ b/platform/broadcom/sonic-platform-modules-arista @@ -1 +1 @@ -Subproject commit 90971a883d5da50a1eec22e2ca0dbd03ace60c08 +Subproject commit b60994d4666150faf5e22e32e9bcc4e84deeaed3 diff --git a/platform/broadcom/sonic-platform-modules-dell/common/load_optics_driver.py b/platform/broadcom/sonic-platform-modules-dell/common/load_optics_driver.py new file mode 100644 index 00000000000..34820543cc1 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/common/load_optics_driver.py @@ -0,0 +1,105 @@ +#!/usr/bin/env python3 +""" +DELLEMC + + This file contains helper routines to load SFP EEPROM drivers during bootup + for all platforms. + 1) Currently Z9432 and Z9332 platforms will be using this script to load + media drivers by reading SFP type. By Default, QSFP_DD "optoe3" driver + is loaded when no SFP is present + 2) In Future, for other platforms/newer SFPs (For e.g. SFP56-DD) these + routines can be extended to add SFP Types in media_xlate & media_driver + dictionary + Refer https://github.com/opencomputeproject/oom/blob/master/optoe/optoe.txt + for more details about optoe driver +""" +try: + import sys + import syslog + import subprocess + import errno + from contextlib import closing + from smbus2 import SMBus + +except ImportError as error: + raise ImportError(str(error) + "- required module not found") + +def get_media_type(sfp_type): + """ + Translates SFP Type to Transceiver Form Factor + """ + media_xlate = { + # SFP/SFP+/SFP28 and later + 0x03 : 'SFP', + # QSFP/QSFP+/QSFP28 and later + 0x0c : 'QSFP', 0x0d : 'QSFP', 0x11 : 'QSFP', + # QSFP_DD + 0x18 : 'QSFP_DD', + # SFP_DD + 0x1a : 'SFP_DD', + # OSFP + 0x19 : 'OSFP' + } + + media_type = media_xlate[sfp_type] if sfp_type in media_xlate else 'None' + return media_type + +def get_sfp_type_from_raw_eeprom(i2c_bus): + """ + Takes I2Bus number as input and return SFP Type from the EEPROM + """ + address = 0x50 + offset = 0 + sfp_type = 'None' + + try: + with closing(SMBus(i2c_bus)) as bus: + sfp_type = bus.read_byte_data(address, offset, force=True) + except OSError as error: + if error.args[0] != errno.EIO and error.args[0] != errno.ETIMEDOUT and error.args[0] != errno.EPERM: + syslog.syslog(syslog.LOG_ERR, + "Error : SFP Type get failed for I2C Bus %s" % i2c_bus) + return sfp_type + +def load_media_driver(i2c_bus, media_type, native_type): + """ + For All non Native SFP, load their respective drivers based on their type. + By default, select the Native driver based on the platform + """ + + sfp_path = "/sys/bus/i2c/devices/i2c-{0}/new_device".format(i2c_bus) + # Add new SFP Form Factors & Drivers in this dictionary & update media_xlate table + # as well + media_driver = {'SFP-CU' : 'copper', 'SFP' : 'optoe2', 'QSFP' : 'optoe1', + 'QSFP_DD' : 'optoe3', 'SFP_DD' : 'optoe3', 'OSFP' : "optoe3"} + + if media_type == 'None': + #Currently Z9432 and Z9332 platforms will be using this script to load drivers + #so using QSFP_DD 400G Native driver "optoe3" by default + driver_type = native_type + else: + driver_type = media_driver[media_type] + + #Create new device with inserted SFP media driver + driver_install_cmd = "{0} 0x50".format(driver_type) + try: + with open(sfp_path, 'w') as file_obj: + file_obj.write(driver_install_cmd) + except IOError as error: + syslog.syslog(syslog.LOG_ERR, + "Error : Driver load failed for I2C bus %s Errno %d" % + (i2c_bus, error.errno)) + return True + +def load_non_native_drivers(index, native_type): + """ + Takes I2Bus number as input and load driver based on SFP type presence + """ + sfp_type = get_sfp_type_from_raw_eeprom(index) + media_type = get_media_type(sfp_type) + load_media_driver(index, media_type, native_type) + +if __name__ == "__main__": + idx_range = sys.argv[1].split(':') + for idx in range(int(idx_range[0]), int(idx_range[1])+1): + load_non_native_drivers(idx, sys.argv[2]) diff --git a/platform/broadcom/sonic-platform-modules-dell/debian/control b/platform/broadcom/sonic-platform-modules-dell/debian/control index 298eaba859a..f7bbc88e985 100644 --- a/platform/broadcom/sonic-platform-modules-dell/debian/control +++ b/platform/broadcom/sonic-platform-modules-dell/debian/control @@ -48,7 +48,7 @@ Description: kernel modules for platform devices such as fan, led, sfp Package: platform-modules-s5448f Architecture: amd64 -Depends: linux-image-6.1.0-22-2-amd64-unsigned +Depends: linux-image-6.12.41+deb13-sonic-amd64-unsigned Description: kernel modules for platform devices such as fan, led, sfp Package: platform-modules-n3248te @@ -83,5 +83,15 @@ Description: kernel modules for platform devices such as fan, led, sfp Package: platform-modules-z9664f Architecture: amd64 -Depends: linux-image-6.1.0-22-2-amd64-unsigned +Depends: linux-image-6.12.41+deb13-sonic-amd64-unsigned +Description: kernel modules for platform devices such as fan, led, sfp + +Package: platform-modules-s3248t +Architecture: amd64 +Depends: linux-image-6.12.41+deb13-sonic-amd64-unsigned +Description: kernel modules for platform devices such as fan, led, sfp + +Package: platform-modules-z9864f +Architecture: amd64 +Depends: linux-image-6.12.41+deb13-sonic-amd64-unsigned Description: kernel modules for platform devices such as fan, led, sfp diff --git a/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-s3248t.init b/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-s3248t.init new file mode 100644 index 00000000000..f5d93ed79c0 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-s3248t.init @@ -0,0 +1,36 @@ +#!/bin/bash + +### BEGIN INIT INFO +# Provides: setup-board +# Required-Start: +# Required-Stop: +# Should-Start: +# Should-Stop: +# Default-Start: S +# Default-Stop: 0 6 +# Short-Description: Setup S3248T board. +### END INIT INFO + +case "$1" in +start) + echo -n "Setting up board... " + /usr/local/bin/s3248t_platform.sh init + echo "done." + ;; + +stop) + /usr/local/bin/s3248t_platform.sh deinit + echo "done." + ;; + +force-reload|restart) + echo "Not supported" + ;; + +*) + echo "Usage: /etc/init.d/platform-modules-s3248t.init {start|stop}" + exit 1 + ;; +esac + +exit 0 diff --git a/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-s3248t.install b/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-s3248t.install new file mode 100644 index 00000000000..a21a9cfc813 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-s3248t.install @@ -0,0 +1,14 @@ +s3248t/scripts/s3248t_platform.sh usr/local/bin +s3248t/scripts/mux_controller.sh usr/local/bin +s3248t/scripts/platform_sensors.py usr/local/bin +s3248t/scripts/sensors usr/bin +s3248t/scripts/portiocfg.py usr/local/bin +s3248t/systemd/platform-modules-s3248t.service etc/systemd/system +s3248t/systemd/mux-ctrl.service etc/systemd/system +s3248t/cfg/s3248t-modules.conf etc/modules-load.d +common/dell_i2c_utils.sh usr/local/bin +s3248t/modules/sonic_platform-1.0-py3-none-any.whl usr/share/sonic/device/x86_64-dell_s3248t-r0 +common/platform_reboot usr/share/sonic/device/x86_64-dell_s3248t-r0 +common/fw-updater /usr/local/bin +common/onie_mode_set usr/local/bin +s3248t/scripts/platform-modules-s3248t.sh usr/bin/ext/service/ diff --git a/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-s3248t.postinst b/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-s3248t.postinst new file mode 100644 index 00000000000..0998a12d3aa --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-s3248t.postinst @@ -0,0 +1,10 @@ +# postinst script for S3248T + +# Enable Dell-S3248T-platform-service +depmod -a +pip3 install /usr/share/sonic/device/x86_64-dell_s3248t-r0/sonic_platform-1.0-py3-none-any.whl --force-reinstall -q --root-user-action=ignore +systemctl enable platform-modules-s3248t.service +systemctl start platform-modules-s3248t.service +systemctl enable mux-ctrl.service +systemctl start --no-block mux-ctrl.service +#DEBHELPER# diff --git a/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-s3248t.prerm b/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-s3248t.prerm new file mode 100644 index 00000000000..3d24add8ca1 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-s3248t.prerm @@ -0,0 +1,9 @@ +# prerm script for S3248T + +systemctl stop mux-ctrl.service +systemctl disable mux-ctrl.service +systemctl stop platform-modules-s3248t.service +systemctl disable platform-modules-s3248t.service +pip3 uninstall -y sonic-platform + +#DEBHELPER# diff --git a/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-z9864f.install b/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-z9864f.install new file mode 100644 index 00000000000..8abd5de16b6 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-z9864f.install @@ -0,0 +1,15 @@ +z9864f/scripts/z9864f_platform.sh usr/local/bin +z9864f/scripts/check_qsfp.sh usr/local/bin +z9864f/scripts/platform_sensors.py usr/local/bin +z9864f/scripts/sensors usr/bin +z9864f/scripts/pcisysfs.py usr/bin +z9864f/cfg/z9864f-modules.conf etc/modules-load.d +z9864f/cfg/z9864f-params.conf etc/modprobe.d +z9864f/systemd/platform-modules-z9864f.service etc/systemd/system +build-z9864f/sonic_platform-1.0-py3-none-any.whl usr/share/sonic/device/x86_64-dell_z9864f-r0 +common/platform_reboot usr/share/sonic/device/x86_64-dell_z9864f-r0 +common/load_optics_driver.py usr/local/bin +z9864f/system_health_monitoring_config.json usr/share/sonic/device/x86_64-dell_z9864f-r0 +common/fw-updater usr/local/bin +common/onie_mode_set usr/local/bin +z9864f/scripts/platform-modules-z9864f.sh usr/bin/ext/service/ diff --git a/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-z9864f.postinst b/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-z9864f.postinst new file mode 100644 index 00000000000..b648e44a0e9 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/debian/platform-modules-z9864f.postinst @@ -0,0 +1,11 @@ +# postinst script for Z9864f + +# Enable Dell-Z9864f-platform-service +depmod -a +systemctl enable platform-modules-z9864f.service +systemctl start platform-modules-z9864f.service +systemctl enable system-health.service +systemctl start --no-block system-health.service + + +#DEBHELPER# diff --git a/platform/broadcom/sonic-platform-modules-dell/debian/rules b/platform/broadcom/sonic-platform-modules-dell/debian/rules index 13467041d5f..7cd771163c5 100755 --- a/platform/broadcom/sonic-platform-modules-dell/debian/rules +++ b/platform/broadcom/sonic-platform-modules-dell/debian/rules @@ -10,7 +10,7 @@ endif KVERSION ?= $(shell uname -r) KERNEL_SRC := /lib/modules/$(KVERSION) MOD_SRC_DIR:= $(shell pwd) -MODULE_DIRS:= s6000 z9100 s6100 z9264f s5212f s5224f s5232f s5248f s5448f z9332f z9432f s5296f n3248pxe n3248te e3224f z9664f +MODULE_DIRS:= s6000 z9100 s6100 z9264f s5212f s5224f s5232f s5248f s5448f z9332f z9432f s5296f n3248pxe n3248te e3224f s3248t z9664f z9864f COMMON_DIR := common %: @@ -54,6 +54,9 @@ override_dh_auto_configure: elif [ $$mod = "z9664f" ]; then \ cp $(COMMON_DIR)/dell_fpga_ocores.c $(MOD_SRC_DIR)/$${mod}/modules/dell_z9664f_fpga_ocores.c; \ cp $(COMMON_DIR)/ipmihelper.py $(MOD_SRC_DIR)/$${mod}/sonic_platform/ipmihelper.py; \ + elif [ $$mod = "z9864f" ]; then \ + cp $(COMMON_DIR)/dell_fpga_ocores.c $(MOD_SRC_DIR)/$${mod}/modules/dell_z9864f_fpga_ocores.c; \ + cp $(COMMON_DIR)/ipmihelper.py $(MOD_SRC_DIR)/$${mod}/sonic_platform/ipmihelper.py; \ fi; \ done) @@ -70,6 +73,10 @@ override_dh_auto_build: echo "Finished making pddf whl package for $$mod"; \ fi; \ cd $(MOD_SRC_DIR); \ + elif [ $$mod = "s3248t" ]; then \ + cd $(MOD_SRC_DIR)/$${mod}; \ + python3 -m build --wheel --no-isolation --outdir $(MOD_SRC_DIR)/$${mod}/modules; \ + cd $(MOD_SRC_DIR); \ fi; \ done) @@ -134,6 +141,9 @@ override_dh_auto_clean: elif [ $$mod = "z9664f" ]; then \ rm -f $(MOD_SRC_DIR)/$${mod}/modules/dell_z9664f_fpga_ocores.c; \ rm -f $(MOD_SRC_DIR)/$${mod}/sonic_platform/ipmihelper.py; \ + elif [ $$mod = "z9864f" ]; then \ + rm -f $(MOD_SRC_DIR)/$${mod}/modules/dell_z9864f_fpga_ocores.c; \ + rm -f $(MOD_SRC_DIR)/$${mod}/sonic_platform/ipmihelper.py; \ fi; \ make -C $(KERNEL_SRC)/build M=$(MOD_SRC_DIR)/$${mod}/modules clean; \ done) diff --git a/platform/broadcom/sonic-platform-modules-dell/s3248t/cfg/s3248t-modules.conf b/platform/broadcom/sonic-platform-modules-dell/s3248t/cfg/s3248t-modules.conf new file mode 100644 index 00000000000..668ef947b54 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s3248t/cfg/s3248t-modules.conf @@ -0,0 +1,14 @@ +# /etc/modules: kernel modules to load at boot time. +# +# This file contains the names of kernel modules that should be loaded +# at boot time, one per line. Lines beginning with "#" are ignored. + +i2c-isch +i2c-ismt +i2c-dev +i2c-mux +i2c-smbus + +i2c-mux-pca954x +dell_s3248t_platform + diff --git a/platform/broadcom/sonic-platform-modules-dell/s3248t/modules/Makefile b/platform/broadcom/sonic-platform-modules-dell/s3248t/modules/Makefile new file mode 100644 index 00000000000..6c4b6c744a5 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s3248t/modules/Makefile @@ -0,0 +1,2 @@ +obj-m := dell_s3248t_platform.o emc2305.o + diff --git a/platform/broadcom/sonic-platform-modules-dell/s3248t/modules/dell_s3248t_platform.c b/platform/broadcom/sonic-platform-modules-dell/s3248t/modules/dell_s3248t_platform.c new file mode 100644 index 00000000000..f296aee0fa7 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s3248t/modules/dell_s3248t_platform.c @@ -0,0 +1,1357 @@ +/* Copyright (c) 2020 Dell Inc. + * dell_s3248t_platform.c - Driver for S3248T switches + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + #include + #include + #include + #include + #include + #include + #include + #include + #include + #include + #include + + #define PSU_MODULE_BASE_NR 10 + #define FANTRAY_MODULE_BASE_NR 15 + #define SFP_MODULE_BASE_NR 20 + #define SFP_MUX_BASE_NR 8 + #define FANTRAY_MUX_BASE_NR 4 + #define PSU_MUX_BASE_NR 5 + + #define PHY_RESET_REG 0x40 + #define RESET_ALL_PHY 0x7F + #define SYS_CTRL_REG 0x15 + #define POWER_CYCLE_SYS 0x1 + #define CPLD_DEVICE_NUM 2 + #define PF_MUX_DEVICES 3 + #define SYS_MISC_CTRL_REG 0x0B + + #define FAN_0 0 + #define FAN_1 1 + #define FAN_2 2 + + static void device_release(struct device *dev) + { + return; + } + + /* + * S3248T CPLD + */ + + enum cpld_type { + cpu_cpld, + sys_cpld, + }; + + struct cpld_platform_data { + int reg_addr; + struct i2c_client *client; + }; + + static struct cpld_platform_data s3248t_cpld_platform_data[] = { + [cpu_cpld] = { + .reg_addr = 0x31, + }, + + [sys_cpld] = { + .reg_addr = 0x32, + }, + }; + + static struct platform_device s3248t_cpld = { + .name = "dell-s3248t-cpld", + .id = 0, + .dev = { + .platform_data = s3248t_cpld_platform_data, + .release = device_release + }, + }; + + /* + * S3248T MUX + */ + + struct mux_platform_data { + int parent; + int base_nr; + int reg_addr; + struct i2c_client *cpld; + int no_of_buses; + int mux_offset; + }; + + struct pf_mux { + struct mux_platform_data data; + }; + + static struct mux_platform_data s3248t_mux_platform_data[] = { + { + .parent = SFP_MUX_BASE_NR, + .base_nr = SFP_MODULE_BASE_NR, + .cpld = NULL, + .reg_addr = 0x11, + .no_of_buses = 6, + .mux_offset = 1, + }, + { + .parent = FANTRAY_MUX_BASE_NR, + .base_nr = FANTRAY_MODULE_BASE_NR, + .cpld = NULL, + .reg_addr = 0x13, + .no_of_buses = 3, + .mux_offset = 1, + }, + { + .parent = PSU_MUX_BASE_NR, + .base_nr = PSU_MODULE_BASE_NR, + .cpld = NULL, + .reg_addr = 0x12, + .no_of_buses = 2, + .mux_offset = 1, + }, + }; + + static struct platform_device s3248t_mux[] = { + { + .name = "dell-s3248t-mux", + .id = 0, + .dev = { + .platform_data = &s3248t_mux_platform_data[0], + .release = device_release, + }, + }, + { + .name = "dell-s3248t-mux", + .id = 1, + .dev = { + .platform_data = &s3248t_mux_platform_data[1], + .release = device_release, + }, + }, + { + .name = "dell-s3248t-mux", + .id = 2, + .dev = { + .platform_data = &s3248t_mux_platform_data[2], + .release = device_release, + }, + }, + }; + + static int cpld_reg_write_byte(struct i2c_client *client, u8 regaddr, u8 val) + { + union i2c_smbus_data data; + + data.byte = val; + return client->adapter->algo->smbus_xfer(client->adapter, client->addr, + client->flags, + I2C_SMBUS_WRITE, + regaddr, I2C_SMBUS_BYTE_DATA, &data); + } + + static int mux_select(struct i2c_mux_core *muxc, u32 chan) + { + struct pf_mux *mux = i2c_mux_priv(muxc); + u8 chan_data = chan + mux->data.mux_offset; + + return cpld_reg_write_byte(mux->data.cpld, mux->data.reg_addr, chan_data); + } + + static int __init mux_probe(struct platform_device *pdev) + { + struct i2c_mux_core *muxc; + struct pf_mux *mux; + struct mux_platform_data *pdata; + struct i2c_adapter *parent; + int i, ret; + + pdata = pdev->dev.platform_data; + if (!pdata) { + dev_err(&pdev->dev, "Missing platform data\n"); + return -ENODEV; + } + + mux = devm_kzalloc(&pdev->dev, sizeof(*mux), GFP_KERNEL); + if (!mux) { + return -ENOMEM; + } + + mux->data = *pdata; + + parent = i2c_get_adapter(pdata->parent); + if (!parent) { + dev_err(&pdev->dev, "Parent adapter (%d) not found\n", + pdata->parent); + return -EPROBE_DEFER; + } + + muxc = i2c_mux_alloc(parent, &pdev->dev, pdata->no_of_buses, 0, 0, + mux_select, NULL); + if (!muxc) { + ret = -ENOMEM; + goto alloc_failed; + } + muxc->priv = mux; + + platform_set_drvdata(pdev, muxc); + + for (i = 0; i < pdata->no_of_buses; i++) { + int nr = pdata->base_nr + i; + + ret = i2c_mux_add_adapter(muxc, nr, i); + if (ret) { + dev_err(&pdev->dev, "Failed to add adapter %d\n", i); + goto add_adapter_failed; + } + } + + return 0; + + add_adapter_failed: + i2c_mux_del_adapters(muxc); + alloc_failed: + i2c_put_adapter(parent); + + return ret; + } + + static void mux_remove(struct platform_device *pdev) + { + struct i2c_mux_core *muxc = platform_get_drvdata(pdev); + + i2c_mux_del_adapters(muxc); + + i2c_put_adapter(muxc->parent); + + } + + static struct platform_driver mux_driver = { + .probe = mux_probe, + .remove = mux_remove, + .driver = { + .owner = THIS_MODULE, + .name = "dell-s3248t-mux", + }, + }; + + static ssize_t sfp_txdis_show (struct device *dev, struct device_attribute *devattr, char *buf) + { + s32 ret = 0; + struct cpld_platform_data *pdata = dev->platform_data; + + ret = i2c_smbus_read_byte_data(pdata[sys_cpld].client, 0x31); + if (ret < 0) + return sprintf(buf, "read error"); + + return sprintf(buf, "0x%x\n", (u8)ret); + } + + static ssize_t sfp_txdis_store (struct device *dev, struct device_attribute *devattr, const char *buf, size_t size) + { + long value; + struct cpld_platform_data *pdata = dev->platform_data; + s32 ret; + u8 data; + ssize_t status; + + status = kstrtol(buf, 0, &value); + if (status == 0) { + ret = i2c_smbus_read_byte_data(pdata[sys_cpld].client, 0x31); + if (ret < 0) + return ret; + data = (u8)ret & ~(0x0F); + data = data | (value & 0x0F); + + ret = i2c_smbus_write_byte_data(pdata[sys_cpld].client, 0x31, data); + if (ret < 0) + return ret; + + status = size; + } + + return status; + } + + static ssize_t sfp_rxlos_show (struct device *dev, struct device_attribute *devattr, char *buf) + { + s32 ret = 0; + struct cpld_platform_data *pdata = dev->platform_data; + + ret = i2c_smbus_read_byte_data(pdata[sys_cpld].client, 0x32); + if (ret < 0) + return sprintf(buf, "read error"); + + return sprintf(buf, "0x%x\n", (u8)ret); + } + + static ssize_t sfp_txfault_show (struct device *dev, struct device_attribute *devattr, char *buf) + { + s32 ret = 0; + struct cpld_platform_data *pdata = dev->platform_data; + + ret = i2c_smbus_read_byte_data(pdata[sys_cpld].client, 0x33); + if (ret < 0) + return sprintf(buf, "read error"); + + return sprintf(buf, "0x%x\n", (u8)ret); + } + + static ssize_t sfp_modprs_show (struct device *dev, struct device_attribute *devattr, char *buf) + { + s32 ret = 0; + struct cpld_platform_data *pdata = dev->platform_data; + + ret = i2c_smbus_read_byte_data(pdata[sys_cpld].client, 0x30); + if (ret < 0) + return sprintf(buf, "read error"); + + return sprintf(buf, "0x%x\n", (u8)ret); + } + + static ssize_t qsfp_modprs_show (struct device *dev, struct device_attribute *devattr, char *buf) + { + s32 ret = 0; + struct cpld_platform_data *pdata = dev->platform_data; + + ret = i2c_smbus_read_byte_data(pdata[sys_cpld].client, 0x20); + if (ret < 0) + return sprintf(buf, "read error"); + + return sprintf(buf, "0x%x\n", (u8)ret); + } + + static ssize_t qsfp_rst_show (struct device *dev, struct device_attribute *devattr, char *buf) + { + s32 ret = 0; + struct cpld_platform_data *pdata = dev->platform_data; + + ret = i2c_smbus_read_byte_data(pdata[sys_cpld].client, 0x21); + if (ret < 0) + return sprintf(buf, "read error"); + + return sprintf(buf, "0x%x\n", (u8)ret); + } + + static ssize_t qsfp_rst_store (struct device *dev, struct device_attribute *devattr, const char *buf, size_t size) + { + long value; + struct cpld_platform_data *pdata = dev->platform_data; + s32 ret; + u8 data; + ssize_t status; + + status = kstrtol(buf, 0, &value); + if (status == 0) { + ret = i2c_smbus_read_byte_data(pdata[sys_cpld].client, 0x21); + if (ret < 0) + return ret; + data = (u8)ret & ~(0x0F); + data = data | (value & 0x0F); + + ret = i2c_smbus_write_byte_data(pdata[sys_cpld].client, 0x21, data); + if (ret < 0) + return ret; + + status = size; + } + + return status; + } + + static ssize_t qsfp_lpmode_show (struct device *dev, struct device_attribute *devattr, char *buf) + { + s32 ret = 0; + struct cpld_platform_data *pdata = dev->platform_data; + + ret = i2c_smbus_read_byte_data(pdata[sys_cpld].client, 0x22); + if (ret < 0) + return sprintf(buf, "read error"); + + return sprintf(buf, "0x%x\n", (u8)ret); + } + + static ssize_t qsfp_lpmode_store (struct device *dev, struct device_attribute *devattr, const char *buf, size_t size) + { + long value; + struct cpld_platform_data *pdata = dev->platform_data; + s32 ret; + u8 data; + ssize_t status; + + status = kstrtol(buf, 0, &value); + if (status == 0) { + ret = i2c_smbus_read_byte_data(pdata[sys_cpld].client, 0x22); + if (ret < 0) + return ret; + data = (u8)ret & ~(0x0F); + data = data | (value & 0x0F); + + ret = i2c_smbus_write_byte_data(pdata[sys_cpld].client, 0x22, data); + if (ret < 0) + return ret; + + status = size; + } + + return status; + } + + static ssize_t reboot_cause_show (struct device *dev, struct device_attribute *devattr, char *buf) + { + s32 ret = 0; + u8 data; + struct cpld_platform_data *pdata = dev->platform_data; + + ret = i2c_smbus_read_byte_data(pdata[sys_cpld].client, 0x10); + if (ret < 0) + return sprintf(buf, "read error"); + + data = (u8)ret; + return sprintf(buf, "0x%x\n", data); + } + + static ssize_t reboot_cause_store(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) + { + unsigned long data; + s32 status, ret; + struct cpld_platform_data *pdata = dev->platform_data; + + status = kstrtoul(buf, 0, &data); + ret = i2c_smbus_write_byte_data(pdata[sys_cpld].client, 0x10, (u8)(data)); + if (ret < 0) + return ret; + return count; + } + + static ssize_t power_reset_store(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) + { + unsigned long data; + s32 err; + struct cpld_platform_data *pdata = dev->platform_data; + + err = kstrtoul(buf, 10, &data); + if (err) + return err; + + if (data) + { + i2c_smbus_write_byte_data(pdata[sys_cpld].client, SYS_CTRL_REG, (u8)(POWER_CYCLE_SYS)); + } + + return count; + } + + static ssize_t power_reset_show(struct device *dev, struct device_attribute *devattr, char *buf) + { + s32 ret = 0; + struct cpld_platform_data *pdata = dev->platform_data; + + ret = i2c_smbus_read_byte_data(pdata[sys_cpld].client, SYS_CTRL_REG); + if (ret < 0) + return sprintf(buf, "read error"); + + return sprintf(buf, "0x%x\n", ret); + } + + static ssize_t fan_dir_show(struct device *dev, struct device_attribute *devattr, char *buf) + { + s32 ret; + u8 data = 0; + struct cpld_platform_data *pdata = dev->platform_data; + struct sensor_device_attribute *sa = to_sensor_dev_attr(devattr); + int index = sa->index; + u8 mask = 1 << (index+4); + + ret = i2c_smbus_read_byte_data(pdata[sys_cpld].client, 0xA); + if (ret < 0) + return sprintf(buf, "read error"); + data = (u8)((ret & mask) >> (index+4)); + + return sprintf(buf, "%s\n", data? "B2F" : "F2B"); +} + +static ssize_t fan_prs_show(struct device *dev, struct device_attribute *devattr, char *buf) +{ + s32 ret; + u8 data = 0; + struct cpld_platform_data *pdata = dev->platform_data; + struct sensor_device_attribute *sa = to_sensor_dev_attr(devattr); + int index = sa->index; + uint8_t mask = 1 << index; + + ret = i2c_smbus_read_byte_data(pdata[sys_cpld].client, 0xA); + if (ret < 0) + return sprintf(buf, "read error"); + data = (u32)((ret & mask) >> index); + + data = ~data & 0x1; + + return sprintf(buf, "0x%x\n", data); +} + +static ssize_t psu0_prs_show(struct device *dev, struct device_attribute *devattr, char *buf) +{ + s32 ret; + u8 data = 0; + struct cpld_platform_data *pdata = dev->platform_data; + + ret = i2c_smbus_read_byte_data(pdata[sys_cpld].client, 0xC); + if (ret < 0) + return sprintf(buf, "read error"); + + if (!(ret & 0x80)) + data = 1; + + return sprintf(buf, "%d\n", data); +} + +static ssize_t psu1_prs_show(struct device *dev, struct device_attribute *devattr, char *buf) +{ + s32 ret; + u8 data = 0; + struct cpld_platform_data *pdata = dev->platform_data; + + ret = i2c_smbus_read_byte_data(pdata[sys_cpld].client, 0xC); + if (ret < 0) + return sprintf(buf, "read error"); + + if (!(ret & 0x08)) + data = 1; + + return sprintf(buf, "%d\n", data); +} + +static ssize_t psu0_status_show(struct device *dev, struct device_attribute *devattr, char *buf) +{ + s32 ret; + u8 data = 0; + struct cpld_platform_data *pdata = dev->platform_data; + + ret = i2c_smbus_read_byte_data(pdata[sys_cpld].client, 0xC); + if (ret < 0) + return sprintf(buf, "read error"); + + if ((ret & 0x40)) + data = 1; + + return sprintf(buf, "%d\n", data); +} + +static ssize_t psu1_status_show(struct device *dev, struct device_attribute *devattr, char *buf) +{ + s32 ret; + u8 data = 0; + struct cpld_platform_data *pdata = dev->platform_data; + + ret = i2c_smbus_read_byte_data(pdata[sys_cpld].client, 0xC); + if (ret < 0) + return sprintf(buf, "read error"); + + if ((ret & 0x04)) + data = 1; + + return sprintf(buf, "%d\n", data); +} + +static ssize_t fani_led_show(struct device *dev, struct device_attribute *devattr, char *buf) +{ + s32 ret; + u8 data = 0; + struct cpld_platform_data *pdata = dev->platform_data; + struct sensor_device_attribute *sa = to_sensor_dev_attr(devattr); + int index = sa->index; + uint8_t mask = 3 << (index*2); + + ret = i2c_smbus_read_byte_data(pdata[sys_cpld].client, 0x9); + if (ret < 0) + return sprintf(buf, "read error"); + + data = (u32)(ret & mask) >> (index*2); + + switch (data) + { + case 0: + ret = sprintf(buf, "off\n"); + break; + case 1: + ret = sprintf(buf, "green\n"); + break; + case 2: + ret = sprintf(buf, "amber\n"); + break; + default: + ret = sprintf(buf, "unknown\n"); + } + + return ret; +} + +static ssize_t fani_led_store(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + s32 ret; + u8 mask, data = 0; + struct cpld_platform_data *pdata = dev->platform_data; + struct sensor_device_attribute *sa = to_sensor_dev_attr(devattr); + int index = sa->index; + + if (!strncmp(buf, "off", 3)) + { + data = 0; + } + else if (!strncmp(buf, "amber", 5)) + { + data = 2; + } + else if (!strncmp(buf, "green", 5)) + { + data = 1; + } + else + { + return -1; + } + + + mask = ~((uint8_t)(3 << (index*2))); + ret = i2c_smbus_read_byte_data(pdata[sys_cpld].client, 0x9); + if (ret < 0) + return ret; + + ret = i2c_smbus_write_byte_data(pdata[sys_cpld].client, 0x9, (u8)((ret & mask) | (data << (index * 2)))); + if (ret < 0) + return ret; + + return count; +} + +static ssize_t system_led_show(struct device *dev, struct device_attribute *devattr, char *buf) +{ + s32 ret; + u8 data = 0; + struct cpld_platform_data *pdata = dev->platform_data; + + ret = i2c_smbus_read_byte_data(pdata[sys_cpld].client, 0x7); + if (ret < 0) + return sprintf(buf, "read error"); + + data = (u8)(ret & 0x30) >> 4; + + switch (data) + { + case 0: + ret = sprintf(buf, "blink_green\n"); + break; + case 1: + ret = sprintf(buf, "green\n"); + break; + case 2: + ret = sprintf(buf, "yellow\n"); + break; + default: + ret = sprintf(buf, "blink_yellow\n"); + } + + return ret; +} + +static ssize_t system_led_store(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + s32 ret; + u8 data = 0; + struct cpld_platform_data *pdata = dev->platform_data; + + if (!strncmp(buf, "blink_green", 11)) + { + data = 0; + } + else if (!strncmp(buf, "green", 5)) + { + data = 1; + } + else if (!strncmp(buf, "yellow", 6)) + { + data = 2; + } + else if (!strncmp(buf, "blink_yellow", 12)) + { + data = 3; + } + else + { + return -1; + } + + ret = i2c_smbus_read_byte_data(pdata[sys_cpld].client, 0x7); + if (ret < 0) + return ret; + + ret = i2c_smbus_write_byte_data(pdata[sys_cpld].client, 0x7, (u8)((ret & 0xCF) | (data << 4))); + if (ret < 0) + return ret; + + return count; +} + +static ssize_t watchdog_show(struct device *dev, + struct device_attribute *devattr, char *buf) +{ + s32 ret; + u8 data = 0; + struct cpld_platform_data *pdata = dev->platform_data; + + ret = i2c_smbus_read_byte_data(pdata[cpu_cpld].client, 0x7); + if (ret < 0) + return sprintf(buf, "read error"); + data = ret; + + return sprintf(buf, "%x\n", data); +} + +static ssize_t watchdog_store(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + s32 ret, err; + unsigned long val; + u8 data = 0; + struct cpld_platform_data *pdata = dev->platform_data; + + err = kstrtoul(buf, 10, &val); + if (err) + return err; + + data = (u8) val; + if (data) + { + ret = i2c_smbus_write_byte_data(pdata[cpu_cpld].client, 0x7, data); + if (ret < 0) + return ret; + } + + return count; +} + +static ssize_t locator_led_show(struct device *dev, struct device_attribute *devattr, char *buf) +{ + s32 ret; + u8 data = 0; + struct cpld_platform_data *pdata = dev->platform_data; + + ret = i2c_smbus_read_byte_data(pdata[sys_cpld].client, 0x7); + if (ret < 0) + return sprintf(buf, "read error"); + + data = (u32)(ret & 0x08) >> 3; + + switch (data) + { + case 0: + ret = sprintf(buf, "off\n"); + break; + case 1: + ret = sprintf(buf, "blink_blue\n"); + break; + default: + ret = sprintf(buf, "invalid\n"); + } + + return ret; +} + +static ssize_t locator_led_store(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + s32 ret; + u8 data = 0; + struct cpld_platform_data *pdata = dev->platform_data; + + if (!strncmp(buf, "off", 3)) + { + data = 0; + } + else if (!strncmp(buf, "blink_blue", 10)) + { + data = 1; + } + else + { + return -1; + } + + ret = i2c_smbus_read_byte_data(pdata[sys_cpld].client, 0x7); + if (ret < 0) + return ret; + + ret = i2c_smbus_write_byte_data(pdata[sys_cpld].client, 0x7, (u8)((ret & 0xF7) | (data << 3))); + if (ret < 0) + return ret; + + return count; +} + +static ssize_t power_led_show(struct device *dev, struct device_attribute *devattr, char *buf) +{ + s32 ret; + u8 data = 0; + struct cpld_platform_data *pdata = dev->platform_data; + + ret = i2c_smbus_read_byte_data(pdata[sys_cpld].client, 0x7); + if (ret < 0) + return sprintf(buf, "read error"); + + data = (u32)(ret & 0x06) >> 1; + + switch (data) + { + case 0: + ret = sprintf(buf, "off\n"); + break; + case 1: + ret = sprintf(buf, "yellow\n"); + break; + case 2: + ret = sprintf(buf, "green\n"); + break; + default: + ret = sprintf(buf, "blink_yellow\n"); + } + + return ret; +} + +static ssize_t power_led_store(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + s32 ret; + u8 data = 0; + struct cpld_platform_data *pdata = dev->platform_data; + + if (!strncmp(buf, "off", 3)) + { + data = 0; + } + else if (!strncmp(buf, "yellow", 6)) + { + data = 1; + } + else if (!strncmp(buf, "green", 5)) + { + data = 2; + } + else if (!strncmp(buf, "blink_yellow", 12)) + { + data = 3; + } + else + { + return -1; + } + + ret = i2c_smbus_read_byte_data(pdata[sys_cpld].client, 0x7); + if (ret < 0) + return ret; + + ret = i2c_smbus_write_byte_data(pdata[sys_cpld].client, 0x7, (u8)((ret & 0xF9) | (data << 1))); + if (ret < 0) + return ret; + + return count; +} + +static ssize_t primary_led_show(struct device *dev, struct device_attribute *devattr, char *buf) +{ + s32 ret; + u8 data = 0; + struct cpld_platform_data *pdata = dev->platform_data; + + ret = i2c_smbus_read_byte_data(pdata[sys_cpld].client, 0x7); + if (ret < 0) + return sprintf(buf, "read error"); + + data = (u32)(ret & 0x1); + + switch (data) + { + case 0: + ret = sprintf(buf, "green\n"); + break; + default: + ret = sprintf(buf, "off\n"); + break; + } + + return ret; +} + +static ssize_t primary_led_store(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + s32 ret; + u8 data = 0; + struct cpld_platform_data *pdata = dev->platform_data; + + if (!strncmp(buf, "green", 5)) + { + data = 0; + } + else if (!strncmp(buf, "off", 3)) + { + data = 1; + } + else + { + return -1; + } + + ret = i2c_smbus_read_byte_data(pdata[sys_cpld].client, 0x7); + if (ret < 0) + return ret; + + ret = i2c_smbus_write_byte_data(pdata[sys_cpld].client, 0x7, (u8)((ret & 0xFE) | data)); + if (ret < 0) + return ret; + + return count; +} + +static ssize_t fan_led_show(struct device *dev, struct device_attribute *devattr, char *buf) +{ + s32 ret; + u8 data = 0; + struct cpld_platform_data *pdata = dev->platform_data; + + ret = i2c_smbus_read_byte_data(pdata[sys_cpld].client, 0x7); + if (ret < 0) + return sprintf(buf, "read error"); + + data = (u8)(ret & 0xC0) >> 6; + + switch (data) + { + case 0: + ret = sprintf(buf, "off\n"); + break; + case 1: + ret = sprintf(buf, "yellow\n"); + break; + case 2: + ret = sprintf(buf, "green\n"); + break; + default: + ret = sprintf(buf, "blink_yellow\n"); + } + + return ret; +} + +static ssize_t fan_led_store(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + s32 ret; + u8 data = 0; + struct cpld_platform_data *pdata = dev->platform_data; + + if (!strncmp(buf, "off", 3)) + { + data = 0; + } + else if (!strncmp(buf, "yellow", 6)) + { + data = 1; + } + else if (!strncmp(buf, "green", 5)) + { + data = 2; + } + else if (!strncmp(buf, "blink_yellow", 12)) + { + data = 3; + } + else + { + return -1; + } + + ret = i2c_smbus_read_byte_data(pdata[sys_cpld].client, 0x7); + if (ret < 0) + return ret; + + ret = i2c_smbus_write_byte_data(pdata[sys_cpld].client, 0x7, (u8)((ret & 0x3F) | (data << 6))); + if (ret < 0) + return ret; + + return count; +} + + +static ssize_t power_good_show(struct device *dev, + struct device_attribute *devattr, char *buf) +{ + s32 ret; + u8 pwr_good1 = 0; + u8 pwr_good2 = 0; + struct cpld_platform_data *pdata = dev->platform_data; + + ret = i2c_smbus_read_byte_data(pdata[cpu_cpld].client, 0xc); + if (ret < 0) + return sprintf(buf, "read error"); + pwr_good1 = ret; + + ret = i2c_smbus_read_byte_data(pdata[cpu_cpld].client, 0xd); + if (ret < 0) + return sprintf(buf, "read error"); + pwr_good2 = ret; + + return sprintf(buf, "0x%x\n", (pwr_good1 == 0xFF && (pwr_good2 & 0x1F) == 0x1F)); +} + +static ssize_t sys_cpld_mjr_ver_show(struct device *dev, + struct device_attribute *devattr, char *buf) +{ + s32 ret; + u8 data = 0; + struct cpld_platform_data *pdata = dev->platform_data; + + ret = i2c_smbus_read_byte_data(pdata[sys_cpld].client, 0x1); + if (ret < 0) + return sprintf(buf, "read error"); + data = ret; + + return sprintf(buf, "0x%x\n", data); +} + +static ssize_t sys_cpld_mnr_ver_show(struct device *dev, + struct device_attribute *devattr, char *buf) +{ + s32 ret; + u8 data = 0; + struct cpld_platform_data *pdata = dev->platform_data; + + ret = i2c_smbus_read_byte_data(pdata[sys_cpld].client, 0x0); + if (ret < 0) + return sprintf(buf, "read error"); + data = ret; + + return sprintf(buf, "0x%x\n", data); +} + +static ssize_t cpu_cpld_mjr_ver_show(struct device *dev, + struct device_attribute *devattr, char *buf) +{ + s32 ret; + u8 data = 0; + struct cpld_platform_data *pdata = dev->platform_data; + + ret = i2c_smbus_read_byte_data(pdata[cpu_cpld].client, 0x1); + if (ret < 0) + return sprintf(buf, "read error"); + data = ret; + + return sprintf(buf, "0x%x\n", data); +} + +static ssize_t cpu_cpld_mnr_ver_show(struct device *dev, + struct device_attribute *devattr, char *buf) +{ + s32 ret; + u8 data = 0; + struct cpld_platform_data *pdata = dev->platform_data; + + ret = i2c_smbus_read_byte_data(pdata[cpu_cpld].client, 0x0); + if (ret < 0) + return sprintf(buf, "read error"); + data = ret; + + return sprintf(buf, "0x%x\n", data); +} + +static DEVICE_ATTR_RO(sfp_txfault); +static DEVICE_ATTR_RO(sfp_modprs); +static DEVICE_ATTR_RO(qsfp_modprs); +static DEVICE_ATTR_RW(qsfp_rst); +static DEVICE_ATTR_RW(qsfp_lpmode); +static DEVICE_ATTR_RO(sfp_rxlos); +static DEVICE_ATTR_RW(sfp_txdis); +static DEVICE_ATTR_RW(reboot_cause); +static DEVICE_ATTR_RW(power_reset); +static DEVICE_ATTR_RO(psu0_prs); +static DEVICE_ATTR_RO(psu1_prs); +static DEVICE_ATTR_RO(psu0_status); +static DEVICE_ATTR_RO(psu1_status); +static DEVICE_ATTR_RW(system_led); +static DEVICE_ATTR_RW(watchdog); +static DEVICE_ATTR_RW(locator_led); +static DEVICE_ATTR_RW(power_led); +static DEVICE_ATTR_RW(primary_led); +static DEVICE_ATTR_RW(fan_led); +static DEVICE_ATTR_RO(power_good); +static DEVICE_ATTR_RO(sys_cpld_mjr_ver); +static DEVICE_ATTR_RO(sys_cpld_mnr_ver); +static DEVICE_ATTR_RO(cpu_cpld_mjr_ver); +static DEVICE_ATTR_RO(cpu_cpld_mnr_ver); + +static SENSOR_DEVICE_ATTR(fan0_dir, S_IRUGO, fan_dir_show, NULL, FAN_0); +static SENSOR_DEVICE_ATTR(fan1_dir, S_IRUGO, fan_dir_show, NULL, FAN_1); +static SENSOR_DEVICE_ATTR(fan2_dir, S_IRUGO, fan_dir_show, NULL, FAN_2); +static SENSOR_DEVICE_ATTR(fan0_prs, S_IRUGO, fan_prs_show, NULL, FAN_0); +static SENSOR_DEVICE_ATTR(fan1_prs, S_IRUGO, fan_prs_show, NULL, FAN_1); +static SENSOR_DEVICE_ATTR(fan2_prs, S_IRUGO, fan_prs_show, NULL, FAN_2); +static SENSOR_DEVICE_ATTR(fan0_led, S_IRUGO | S_IWUSR, fani_led_show, fani_led_store, FAN_0); +static SENSOR_DEVICE_ATTR(fan1_led, S_IRUGO | S_IWUSR, fani_led_show, fani_led_store, FAN_1); +static SENSOR_DEVICE_ATTR(fan2_led, S_IRUGO | S_IWUSR, fani_led_show, fani_led_store, FAN_2); + +static struct attribute *s3248t_cpld_attrs[] = { + &dev_attr_sfp_txdis.attr, + &dev_attr_sfp_rxlos.attr, + &dev_attr_sfp_txfault.attr, + &dev_attr_sfp_modprs.attr, + &dev_attr_qsfp_modprs.attr, + &dev_attr_qsfp_rst.attr, + &dev_attr_qsfp_lpmode.attr, + &dev_attr_reboot_cause.attr, + &dev_attr_power_reset.attr, + &sensor_dev_attr_fan0_dir.dev_attr.attr, + &sensor_dev_attr_fan1_dir.dev_attr.attr, + &sensor_dev_attr_fan2_dir.dev_attr.attr, + &sensor_dev_attr_fan0_prs.dev_attr.attr, + &sensor_dev_attr_fan1_prs.dev_attr.attr, + &sensor_dev_attr_fan2_prs.dev_attr.attr, + &sensor_dev_attr_fan0_led.dev_attr.attr, + &sensor_dev_attr_fan1_led.dev_attr.attr, + &sensor_dev_attr_fan2_led.dev_attr.attr, + &dev_attr_psu0_prs.attr, + &dev_attr_psu1_prs.attr, + &dev_attr_psu0_status.attr, + &dev_attr_psu1_status.attr, + &dev_attr_system_led.attr, + &dev_attr_watchdog.attr, + &dev_attr_locator_led.attr, + &dev_attr_power_led.attr, + &dev_attr_primary_led.attr, + &dev_attr_fan_led.attr, + &dev_attr_power_good.attr, + &dev_attr_sys_cpld_mjr_ver.attr, + &dev_attr_sys_cpld_mnr_ver.attr, + &dev_attr_cpu_cpld_mjr_ver.attr, + &dev_attr_cpu_cpld_mnr_ver.attr, + NULL, +}; + +static struct attribute_group s3248t_cpld_attr_grp = { + .attrs = s3248t_cpld_attrs, +}; + +static int get_ismt_base_nr(void) +{ + struct i2c_adapter *ismt_adap; + static int ismt_base_nr = -1; + + if (ismt_base_nr != -1) { + return ismt_base_nr; + } + for (ismt_base_nr = 0; ismt_base_nr < 2; ismt_base_nr++) { + ismt_adap = i2c_get_adapter(ismt_base_nr); + if (!ismt_adap) { + printk(KERN_WARNING "iSMT adapter (%d) not found\n", ismt_base_nr); + return -ENODEV; + } + if (!strstr(ismt_adap->name, "iSMT adapter")) { + i2c_put_adapter(ismt_adap); + printk("I2C %d adapter is %s\n", ismt_base_nr, ismt_adap->name); + } else { + i2c_put_adapter(ismt_adap); + return ismt_base_nr; + } + } + return -ENODEV; +} + +static int __init cpld_probe(struct platform_device *pdev) +{ + struct cpld_platform_data *pdata; + struct i2c_adapter *parent; + int i, cpld_bus; + int ret; + + pdata = pdev->dev.platform_data; + if (!pdata) { + dev_err(&pdev->dev, "Missing platform data\n"); + return -ENODEV; + } + + cpld_bus = get_ismt_base_nr(); + if (cpld_bus < 0) { + return -ENODEV; + } + parent = i2c_get_adapter(cpld_bus); + if (!parent) { + printk(KERN_WARNING "Parent adapter (%d) not found\n", cpld_bus); + return -ENODEV; + } + for (i = 0; i < CPLD_DEVICE_NUM; i++) { + pdata[i].client = i2c_new_dummy_device(parent, pdata[i].reg_addr); + if (!pdata[i].client) { + printk(KERN_WARNING "Fail to create dummy i2c client for addr %d\n", pdata[i].reg_addr); + goto error; + } + } + + ret = sysfs_create_group(&pdev->dev.kobj, &s3248t_cpld_attr_grp); + if (ret) + goto error; + + return 0; + +error: + i--; + for (; i >= 0; i--) { + if (pdata[i].client) { + i2c_unregister_device(pdata[i].client); + } + } + + i2c_put_adapter(parent); + + return -ENODEV; +} + +static void __exit cpld_remove(struct platform_device *pdev) +{ + int i; + struct i2c_adapter *parent = NULL; + struct cpld_platform_data *pdata = pdev->dev.platform_data; + + sysfs_remove_group(&pdev->dev.kobj, &s3248t_cpld_attr_grp); + + if (!pdata) { + dev_err(&pdev->dev, "Missing platform data\n"); + } else { + for (i = 0; i < CPLD_DEVICE_NUM; i++) { + if (pdata[i].client) { + if (!parent) { + parent = (pdata[i].client)->adapter; + } + i2c_unregister_device(pdata[i].client); + } + } + } + + i2c_put_adapter(parent); +} + +static struct platform_driver cpld_driver = { + .probe = cpld_probe, + .remove = __exit_p(cpld_remove), + .driver = { + .owner = THIS_MODULE, + .name = "dell-s3248t-cpld", + }, +}; + +static struct i2c_board_info sys_board_mux[] = { + { + I2C_BOARD_INFO("pca9548", 0x71) + } +}; + +static int __init dell_s3248t_platform_init(void) +{ + int ret = 0; + struct i2c_adapter *sys_i2c_adap; + struct i2c_client *mux_i2c_cli; + struct cpld_platform_data *cpld_pdata; + struct mux_platform_data *pdata; + int i, sys_i2c_bus; + + printk("dell_s3248t_platform module initialization\n"); + sys_i2c_bus = get_ismt_base_nr(); + if (sys_i2c_bus < 0) { + return -ENODEV; + } + + sys_i2c_adap = i2c_get_adapter(sys_i2c_bus); + mux_i2c_cli = i2c_new_client_device(sys_i2c_adap, sys_board_mux); + if (!mux_i2c_cli) + return PTR_ERR_OR_ZERO(mux_i2c_cli); + + ret = platform_driver_register(&cpld_driver); + if (ret) { + printk(KERN_WARNING "Fail to register cpld driver\n"); + goto error_cpld_driver; + } + + ret = platform_driver_register(&mux_driver); + if (ret) { + printk(KERN_WARNING "Fail to register mux driver\n"); + goto error_mux_driver; + } + + ret = platform_device_register(&s3248t_cpld); + if (ret) { + printk(KERN_WARNING "Fail to create cpld device\n"); + goto error_cpld; + } + + cpld_pdata = s3248t_cpld.dev.platform_data; + + for (i = 0; i < PF_MUX_DEVICES; i++) { + pdata = s3248t_mux[i].dev.platform_data; + pdata->cpld = cpld_pdata[sys_cpld].client; + ret = platform_device_register(&s3248t_mux[i]); + if (ret) { + printk(KERN_WARNING "fail to create mux %d\n", i); + goto error_mux; + } + } + ret = i2c_smbus_write_byte_data(cpld_pdata[sys_cpld].client, PHY_RESET_REG, RESET_ALL_PHY); + if (ret) + goto error_mux; + + /* To enable FAN set FAN_EN bit (Set bit 0 to 1) in SYS_MISC_CTRL: 0x0B by read modify write. */ + ret = i2c_smbus_read_byte_data(cpld_pdata[sys_cpld].client, SYS_MISC_CTRL_REG); + if (ret < 0) + goto error_mux; + ret = i2c_smbus_write_byte_data(cpld_pdata[sys_cpld].client, SYS_MISC_CTRL_REG, (u8)(ret | 0x01)); + if (ret) + goto error_mux; + + return 0; + +error_mux: + i--; + for (; i >= 0; i--) { + platform_device_unregister(&s3248t_mux[i]); + } + platform_device_unregister(&s3248t_cpld); +error_cpld: + platform_driver_unregister(&mux_driver); +error_mux_driver: + platform_driver_unregister(&cpld_driver); +error_cpld_driver: + return ret; +} + +static void __exit dell_s3248t_platform_exit(void) +{ + int i; + + for (i = 0; i < PF_MUX_DEVICES; i++) + platform_device_unregister(&s3248t_mux[i]); + platform_device_unregister(&s3248t_cpld); + platform_driver_unregister(&cpld_driver); + platform_driver_unregister(&mux_driver); +} + +module_init(dell_s3248t_platform_init); +module_exit(dell_s3248t_platform_exit); + +MODULE_DESCRIPTION("DELL S3248T Platform Support"); +MODULE_AUTHOR("Dhanakumar Subramanian "); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-dell/s3248t/modules/emc2305.c b/platform/broadcom/sonic-platform-modules-dell/s3248t/modules/emc2305.c new file mode 100644 index 00000000000..e49334073c0 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s3248t/modules/emc2305.c @@ -0,0 +1,1226 @@ +/* + * emc2305.c - hwmon driver for SMSC EMC2305 fan controller + * (C) Copyright 2013 + * Reinhard Pfau, Guntermann & Drunck GmbH + * + * Based on emc2103 driver by SMSC. + * + * Datasheet available at: + * http://www.smsc.com/Downloads/SMSC/Downloads_Public/Data_Sheets/2305.pdf + * + * Also supports the EMC2303 fan controller which has the same functionality + * and register layout as EMC2305, but supports only up to 3 fans instead of 5. + * + * Also supports EMC2302 (up to 2 fans) and EMC2301 (1 fan) fan controller. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* + * Addresses scanned. + * Listed in the same order as they appear in the EMC2305, EMC2303 data sheets. + * + * Note: these are the I2C adresses which are possible for EMC2305 and EMC2303 + * chips. + * The EMC2302 supports only 0x2e (EMC2302-1) and 0x2f (EMC2302-2). + * The EMC2301 supports only 0x2f. + */ +static const unsigned short i2c_adresses[] = { + 0x2E, + 0x2F, + 0x2C, + 0x2D, + 0x4C, + 0x4D, + I2C_CLIENT_END +}; + +/* + * global registers + */ +enum { + REG_INVALID = 0x0, + REG_CONFIGURATION = 0x20, + REG_FAN_STATUS = 0x24, + REG_FAN_STALL_STATUS = 0x25, + REG_FAN_SPIN_STATUS = 0x26, + REG_DRIVE_FAIL_STATUS = 0x27, + REG_FAN_INTERRUPT_ENABLE = 0x29, + REG_PWM_POLARITY_CONFIG = 0x2a, + REG_PWM_OUTPUT_CONFIG = 0x2b, + REG_PWM_BASE_FREQ_1 = 0x2c, + REG_PWM_BASE_FREQ_2 = 0x2d, + REG_SOFTWARE_LOCK = 0xef, + REG_PRODUCT_FEATURES = 0xfc, + REG_PRODUCT_ID = 0xfd, + REG_MANUFACTURER_ID = 0xfe, + REG_REVISION = 0xff +}; + +#define MAX_COMMON_REGS 16 + +/* + * fan specific registers + */ +enum { + REG_FAN_SETTING = 0x30, + REG_PWM_DIVIDE = 0x31, + REG_FAN_CONFIGURATION_1 = 0x32, + REG_FAN_CONFIGURATION_2 = 0x33, + REG_GAIN = 0x35, + REG_FAN_SPIN_UP_CONFIG = 0x36, + REG_FAN_MAX_STEP = 0x37, + REG_FAN_MINIMUM_DRIVE = 0x38, + REG_FAN_VALID_TACH_COUNT = 0x39, + REG_FAN_DRIVE_FAIL_BAND_LOW = 0x3a, + REG_FAN_DRIVE_FAIL_BAND_HIGH = 0x3b, + REG_TACH_TARGET_LOW = 0x3c, + REG_TACH_TARGET_HIGH = 0x3d, + REG_TACH_READ_HIGH = 0x3e, + REG_TACH_READ_LOW = 0x3f, +}; + +#define SEL_FAN(fan, reg) (reg + fan * 0x10) + +#define MAX_REG_PER_FAN 16 + +/* + * Factor by equations [2] and [3] from data sheet; valid for fans where the + * number of edges equals (poles * 2 + 1). + */ + +#define EMC2305_TACH_FREQ 32768 /* 32.768KHz */ +#define EMC2305_RPM_CONST_VAL 60 + +#define EMC2305_FAN_CONFIG_RANGE_MASK 0x60 +#define TACH_READING_DEFAULT_VAL 0xFFF8 +#define EMC2305_PERCENT_VAL 100 +#define EMC2305_FAN_SETTING_MAX_VAL 0xff +#define EMC2305_FAN_WATCHDOG_STATUS_MASK 0x80 + +#define FAN_INIT_RPM_SPEED 12000 +#define FAN_MAX_RPM_SPEED 28600 +#define TACH_VALUE_SHIFT_BITS 3 +#define SPEED_PWM_LEN_STRING 7 + +#define MAX_NUM_FANS 5 +#define DEFAULT_NUM_FANS 3 +#define DEFAULT_TACH_COUNT_MULTIPLIER 4 /* 2000 RPM : TACH count multiplier = 4*/ +#define DEFAULT_POLES 2 /* 2 pole FANs : 5 edges samples */ +#define MAX_FAN_FAULT_REG_COUNT 4 + +time64_t timestamp = 0; +bool fan_fault_status[MAX_NUM_FANS] = {false}; +static unsigned short mode = 1; +static unsigned short num_fans = DEFAULT_NUM_FANS; +static unsigned short tach_count_multiplier = DEFAULT_TACH_COUNT_MULTIPLIER; +static unsigned short poles = DEFAULT_POLES; +module_param(mode, ushort, 0); +module_param(num_fans, ushort, 0); +module_param(tach_count_multiplier, ushort, 0); +module_param(poles, ushort, 0); + +struct emc2305_fan_data { + bool enabled; + bool valid; + unsigned long last_updated; + bool rpm_control; /* RPM(FSC) mode or Direct Setting mode */ + uint8_t multiplier; + uint8_t poles; + uint32_t tach_target_rpm; + uint32_t driver_setting_rpm; + uint8_t pwm; + uint8_t ranges; + uint8_t edges; + uint16_t fanstop; +}; + +struct emc2305_data { + struct device *hwmon_dev; + struct mutex update_lock; + int fans; + struct emc2305_fan_data fan[MAX_NUM_FANS]; +}; + +/* Fault status registers */ +static const uint8_t emc2305_fault_status_reg[] = { REG_FAN_STATUS, + REG_FAN_STALL_STATUS, + REG_FAN_SPIN_STATUS, + REG_DRIVE_FAIL_STATUS }; + +/** + * @brief This function calculates the tach count based on the passed parameters. + * @param[in] fan_data - The fan details of the fan + * @param[in] rpm - The speed of the fan in RPM + * @returns tach value in tach counts + */ +uint16_t calculate_tach_count_emc23xx(struct emc2305_fan_data *fan_data, uint32_t rpm) +{ + uint16_t tachval = 0; + + if ((rpm == 0) || (fan_data->poles == 0)) { + return 0; + } + tachval = (((fan_data->edges - 1) * EMC2305_TACH_FREQ * EMC2305_RPM_CONST_VAL * fan_data->multiplier) / + (fan_data->poles * rpm)); + tachval = tachval << TACH_VALUE_SHIFT_BITS; + + return tachval; +} + +/** + * @brief This function calculates the fan rpm based on the TACH value (RPM based FSC Mode) + * @param[in] fan - fan details + * @param[in] tachval - The tach counts of the fan + * @returns speed of the fan in RPM + */ +uint32_t calculate_rpm_from_tach_emc23xx(struct emc2305_fan_data *fan, uint16_t tachval) +{ + uint32_t speed = 0; + + if ((tachval == 0) || (fan->poles == 0)) { + return 0; + } + + speed = (((fan->edges - 1) * EMC2305_TACH_FREQ * fan->multiplier * EMC2305_RPM_CONST_VAL) + / (tachval * fan->poles)); + + return speed; +} + +/** + * @brief This function calculates the fan rpm based on Driver Setting (Direct Setting Mode) + * @param[in] fan - fan details + * @param[in] setting - The direct setting value + * @returns speed of the fan in RPM + */ +uint32_t calculate_rpm_from_driver_setting_emc23xx(struct emc2305_fan_data *fan, uint8_t setting) +{ + uint8_t speed_percent = 0; + + speed_percent = (setting * EMC2305_PERCENT_VAL) / (EMC2305_FAN_SETTING_MAX_VAL); + return (FAN_MAX_RPM_SPEED * speed_percent) / EMC2305_PERCENT_VAL; +} + +static int read_u8_from_i2c(struct i2c_client *client, uint8_t i2c_reg, uint8_t *output) +{ + int status = i2c_smbus_read_byte_data(client, i2c_reg); + + if (status < 0) { + dev_warn(&client->dev, "reg 0x%02x, err %d\n", + i2c_reg, status); + } else { + *output = status; + } + return status; +} + +/* Clear the fan fault status in the EMC2305 Controller. + */ +static void emc2305_clear_fan_fault(struct i2c_client *client) +{ + uint8_t buf = 0, index = 0; + int rc = 0; + + for (index = 0; index < sizeof(emc2305_fault_status_reg); index++) { + /* All the status register are Read-On-Clear */ + rc = read_u8_from_i2c(client, emc2305_fault_status_reg[index], &buf); + if (rc < 0) { + return; + } + } +} + +/* + * TACH reading functions : common to both Direct Setting & FSC (RPM control) modes + */ +static void read_tach_registers(struct i2c_client *client, uint16_t *output, + uint8_t hi_addr, uint8_t lo_addr) +{ + uint8_t high_byte = 0, lo_byte = 0; + + if (read_u8_from_i2c (client, hi_addr, &high_byte) < 0) + return; + + if (read_u8_from_i2c (client, lo_addr, &lo_byte) < 0) + return; + + *output = (((uint16_t) high_byte << 8) | (lo_byte)); +} + +/* + * TACH Target write: applicable for FSC (RPM control) mode only + */ +static void write_fan_target(struct i2c_client *client, int fan, + uint32_t rpm) +{ + struct emc2305_data *data = i2c_get_clientdata (client); + struct emc2305_fan_data *fan_data = &data->fan[fan]; + const uint8_t lo_reg = SEL_FAN (fan, REG_TACH_TARGET_LOW); + const uint8_t hi_reg = SEL_FAN (fan, REG_TACH_TARGET_HIGH); + uint16_t tachval = 0; + uint8_t tach[2] = { 0, 0 }; + + // The Tach Target are in registers 3c/3d, 4c/4d, 5c/5d, 6c/6d & 7c/7d + tachval = calculate_tach_count_emc23xx (fan_data, rpm); + tach[1] = (tachval & 0xff00) >> 8; // High Byte + tach[0] = (tachval & 0xff); // Low Byte + + i2c_smbus_write_byte_data (client, lo_reg, tach[0]); + i2c_smbus_write_byte_data (client, hi_reg, tach[1]); + + fan_data->tach_target_rpm = rpm; +} + +/* + * FAN Driver Setting write: applicable for Direct Setting mode only + */ +static void write_fan_setting(struct i2c_client *client, int fan, + uint32_t rpm) +{ + struct emc2305_data *data = i2c_get_clientdata (client); + struct emc2305_fan_data *fan_data = &data->fan[fan]; + uint8_t speed_percent = 0, reg = 0, setting = 0; + + speed_percent = ((rpm * EMC2305_PERCENT_VAL) / FAN_MAX_RPM_SPEED); + setting = ((speed_percent * EMC2305_FAN_SETTING_MAX_VAL) / EMC2305_PERCENT_VAL); + reg = SEL_FAN (fan, REG_FAN_SETTING); + i2c_smbus_write_byte_data (client, reg, setting); + + fan_data->driver_setting_rpm = rpm; +} + +static struct emc2305_fan_data *emc2305_update_fan(struct i2c_client *client, int fan_idx) +{ + struct emc2305_data *data = i2c_get_clientdata(client); + struct emc2305_fan_data *fan_data = &data->fan[fan_idx]; + + mutex_lock(&data->update_lock); + + if (time_after(jiffies, fan_data->last_updated + HZ + HZ / 2) + || !fan_data->valid) { + fan_data->valid = true; + fan_data->last_updated = jiffies; + } + + mutex_unlock(&data->update_lock); + return fan_data; +} + +static void read_fan_fault(struct device *dev, struct device_attribute *da, bool *fault) +{ + struct i2c_client *client = to_i2c_client(dev); + struct emc2305_data *data = i2c_get_clientdata(client); + int fan_idx = to_sensor_dev_attr(da)->index; + uint8_t fault_regs[MAX_FAN_FAULT_REG_COUNT] = {0}; + int index = 0; + int rc = 0; + time64_t current_time = 0; + int fan_id = 0; + + *fault = false; + current_time = ktime_get_real_seconds(); + time64_t time_diff = current_time - timestamp; + + if ((time_diff >= 1) || (timestamp == 0)) { + for (index = 0; index < MAX_FAN_FAULT_REG_COUNT; index++) { + rc = read_u8_from_i2c(client, emc2305_fault_status_reg[index], &fault_regs[index]); + if (rc < 0) { + printk(KERN_INFO "Failed to read reg 0x%02x\n", emc2305_fault_status_reg[index]); + return; + } + } + timestamp = current_time; + for (fan_id = 0; fan_id < data->fans; ++fan_id) { + fan_fault_status[fan_id] = ((fault_regs[0] & EMC2305_FAN_WATCHDOG_STATUS_MASK) || + ((fault_regs[1] | fault_regs[2] | fault_regs[3]) & (1 << fan_id))) ? true : false; + } + } + + *fault = fan_fault_status[fan_idx]; + + return; +} + +/* + * set/ config functions + */ + +/* + * Note: we also update the fan target here, because its value is + * determined in part by the fan clock divider. This follows the principle + * of least surprise; the user doesn't expect the fan target to change just + * because the divider changed. + */ +static int emc2305_set_fan_div(struct i2c_client *client, int fan_idx, long new_div) +{ + struct emc2305_data *data = i2c_get_clientdata(client); + struct emc2305_fan_data *fan = &data->fan[fan_idx]; + const uint8_t reg_conf1 = SEL_FAN(fan_idx, REG_FAN_CONFIGURATION_1); + int new_range_bits, old_div = 8 / fan->multiplier; + int status = 0; + + if (new_div == old_div) /* No change */ + return 0; + + switch (new_div) { + case 1: + new_range_bits = 3; + break; + case 2: + new_range_bits = 2; + break; + case 4: + new_range_bits = 1; + break; + case 8: + new_range_bits = 0; + break; + default: + return -EINVAL; + } + + mutex_lock(&data->update_lock); + + status = i2c_smbus_read_byte_data(client, reg_conf1); + if (status < 0) { + dev_dbg(&client->dev, "reg 0x%02x, err %d\n", + reg_conf1, status); + status = -EIO; + goto exit_unlock; + } + status &= 0x9F; + status |= (new_range_bits << 5); + status = i2c_smbus_write_byte_data(client, reg_conf1, status); + if (status < 0) { + status = -EIO; + goto exit_invalidate; + } + + fan->multiplier = 8 / new_div; + + /* update fan target if high byte is not disabled */ + if ((fan->tach_target_rpm & 0x7fff) != 0x7fff) { + uint16_t new_target = (fan->tach_target_rpm * old_div) / new_div; + write_fan_target(client, fan_idx, min_t(uint16_t, new_target, FAN_MAX_RPM_SPEED)); + } + +exit_invalidate: + /* invalidate fan data to force re-read from hardware */ + fan->valid = false; +exit_unlock: + mutex_unlock(&data->update_lock); + return status; +} + +static int emc2305_set_fan_target(struct i2c_client *client, int fan_idx, long rpm_target) +{ + struct emc2305_data *data = i2c_get_clientdata (client); + struct emc2305_fan_data *fan = &data->fan[fan_idx]; + int status = 0; + + /* + * Datasheet states 16000 as maximum RPM target + * (table 2.2 and section 4.3) + */ + if (rpm_target < 0) { + return -EINVAL; + } + + mutex_lock (&data->update_lock); + + if ((rpm_target == 0) || (rpm_target > FAN_MAX_RPM_SPEED)) { + rpm_target = FAN_MAX_RPM_SPEED; + } + + if (fan->rpm_control) { + /* RPM mode */ + write_fan_target (client, fan_idx, (uint16_t) rpm_target); + } else { + /* Direct Method */ + write_fan_setting (client, fan_idx, (uint16_t) rpm_target); + } + + mutex_unlock (&data->update_lock); + return status; +} + +static int emc2305_set_pwm_enable(struct i2c_client *client, int fan_idx, long enable) +{ + struct emc2305_data *data = i2c_get_clientdata(client); + struct emc2305_fan_data *fan = &data->fan[fan_idx]; + const uint8_t reg_fan_conf1 = SEL_FAN(fan_idx, REG_FAN_CONFIGURATION_1); + int status = 0; + uint8_t conf_reg; + + mutex_lock(&data->update_lock); + switch (enable) { + case 0: + fan->rpm_control = false; + break; + case 3: + fan->rpm_control = true; + break; + default: + status = -EINVAL; + goto exit_unlock; + } + + status = read_u8_from_i2c(client, reg_fan_conf1, &conf_reg); + if (status < 0) { + status = -EIO; + goto exit_unlock; + } + + if (fan->rpm_control) + conf_reg |= 0x80; + else + conf_reg &= ~0x80; + + status = i2c_smbus_write_byte_data(client, reg_fan_conf1, conf_reg); + if (status < 0) + status = -EIO; + +exit_unlock: + mutex_unlock(&data->update_lock); + return status; +} + +static int emc2305_set_pwm(struct i2c_client *client, int fan_idx, long pwm) +{ + struct emc2305_data *data = i2c_get_clientdata(client); + struct emc2305_fan_data *fan = &data->fan[fan_idx]; + const uint8_t reg_fan_setting = SEL_FAN(fan_idx, REG_FAN_SETTING); + int status = 0; + + /* + * Datasheet states 255 as maximum PWM + * (section 5.7) + */ + if ((pwm < 0) || (pwm > 255)) { + return -EINVAL; + } + + fan->pwm = pwm; + + mutex_lock(&data->update_lock); + + status = i2c_smbus_write_byte_data(client, reg_fan_setting, fan->pwm); + + mutex_unlock(&data->update_lock); + return status; +} + +/* + * sysfs callback functions + * + * Note: + * Naming of the funcs is modelled after the naming scheme described in + * Documentation/hwmon/sysfs-interface: + * + * For a sysfs file _ the functions are named like this: + * the show function: show__ + * the store function: set__ + * For read only (RO) attributes of course only the show func is required. + * + * This convention allows us to define the sysfs attributes by using macros. + */ +static ssize_t show_fan_input(struct device *dev, struct device_attribute *da, char *buf) +{ + struct i2c_client *client = to_i2c_client (dev); + int fan_idx = to_sensor_dev_attr (da)->index; + struct emc2305_data *data = i2c_get_clientdata(client); + struct emc2305_fan_data *fan = &data->fan[fan_idx]; + uint32_t speed = 0; + uint16_t tachval =0; + + mutex_lock(&data->update_lock); + read_tach_registers(client, &tachval, + SEL_FAN(fan_idx, REG_TACH_READ_HIGH), + SEL_FAN(fan_idx, REG_TACH_READ_LOW)); + + // Mask off the lower bits which are indeterminate + tachval = tachval >> TACH_VALUE_SHIFT_BITS; + + /* Disable the fan speed in case of fanstop value */ + if (tachval == fan->fanstop) { + speed = 0; + } else { + speed = calculate_rpm_from_tach_emc23xx(fan, tachval); + } + + mutex_unlock(&data->update_lock); + return snprintf(buf, SPEED_PWM_LEN_STRING, "%d\n", speed); +} + +static ssize_t show_fan_fault(struct device *dev, struct device_attribute *da, char *buf) +{ + bool fault; + read_fan_fault(dev, da, &fault); + return snprintf(buf, SPEED_PWM_LEN_STRING, "%d\n", fault ? 1 : 0); +} + +static ssize_t show_fan_div(struct device *dev, struct device_attribute *da, char *buf) +{ + struct i2c_client *client = to_i2c_client (dev); + struct emc2305_data *data = i2c_get_clientdata(client); + int fan_idx = to_sensor_dev_attr(da)->index; + struct emc2305_fan_data *fan = &data->fan[fan_idx]; + + int fan_div = 8 / fan->multiplier; + return snprintf(buf, SPEED_PWM_LEN_STRING, "%d\n", fan_div); +} + +static ssize_t set_fan_div(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + int fan_idx = to_sensor_dev_attr(da)->index; + long new_div; + int status; + + status = kstrtol(buf, 10, &new_div); + if (status < 0) { + return -EINVAL; + } + + status = emc2305_set_fan_div(client, fan_idx, new_div); + if (status < 0) + return status; + + return count; +} + +static ssize_t show_fan_target(struct device *dev, struct device_attribute *da, char *buf) +{ + struct i2c_client *client = to_i2c_client (dev); + struct emc2305_data *data = i2c_get_clientdata(client); + int fan_idx = to_sensor_dev_attr (da)->index; + struct emc2305_fan_data *fan = &data->fan[fan_idx]; + uint8_t setting = 0; + uint32_t speed = 0; + uint16_t tachval =0; + + if (fan->rpm_control) { + /* RPM mode */ + read_tach_registers(client, &tachval, + SEL_FAN(fan_idx, REG_TACH_TARGET_HIGH), + SEL_FAN(fan_idx, REG_TACH_TARGET_LOW)); + tachval = tachval >> TACH_VALUE_SHIFT_BITS; + speed = calculate_rpm_from_tach_emc23xx(fan, tachval); + return snprintf(buf, SPEED_PWM_LEN_STRING, "%d\n", speed); + } else { + /* Direct Method */ + if (read_u8_from_i2c(client, SEL_FAN (fan_idx, REG_FAN_SETTING), &setting) < 0) { + return 0; + } + speed = calculate_rpm_from_driver_setting_emc23xx(fan, setting); + return snprintf (buf, SPEED_PWM_LEN_STRING, "%d\n", speed); + } +} + +static ssize_t set_fan_target(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + int fan_idx = to_sensor_dev_attr(da)->index; + long rpm_target = 0; + int status = 0; + + status = kstrtol(buf, 10, &rpm_target); + if (status < 0) { + return -EINVAL; + } + + status = emc2305_set_fan_target(client, fan_idx, rpm_target); + if (status < 0) + return status; + + return count; +} + +static ssize_t show_pwm_enable(struct device *dev, struct device_attribute *da, char *buf) +{ + struct i2c_client *client = to_i2c_client (dev); + struct emc2305_data *data = i2c_get_clientdata(client); + int fan_idx = to_sensor_dev_attr (da)->index; + struct emc2305_fan_data *fan = &data->fan[fan_idx]; + + return snprintf(buf, SPEED_PWM_LEN_STRING, "%d\n", fan->rpm_control ? 3 : 0); +} + +static ssize_t set_pwm_enable(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + int fan_idx = to_sensor_dev_attr(da)->index; + long new_value; + int status; + + status = kstrtol(buf, 10, &new_value); + if (status < 0) { + return -EINVAL; + } + status = emc2305_set_pwm_enable(client, fan_idx, new_value); + return count; +} + +static ssize_t show_pwm(struct device *dev, struct device_attribute *da, + char *buf) +{ + struct i2c_client *client = to_i2c_client (dev); + struct emc2305_data *data = i2c_get_clientdata(client); + int fan_idx = to_sensor_dev_attr (da)->index; + struct emc2305_fan_data *fan = &data->fan[fan_idx]; + + return snprintf(buf, SPEED_PWM_LEN_STRING, "%d\n", fan->pwm); +} + +static ssize_t set_pwm(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + int fan_idx = to_sensor_dev_attr(da)->index; + unsigned long val = 0; + int ret = 0; + int status = 0; + + ret = kstrtoul(buf, 10, &val); + if (ret) + return ret; + if (val > 255) { + return -EINVAL; + } + + status = emc2305_set_pwm(client, fan_idx, val); + return count; +} + +static ssize_t show_fan_dump(struct device *dev, struct device_attribute *da, char *buf) +{ + struct i2c_client *client = to_i2c_client (dev); + int fan_idx = to_sensor_dev_attr (da)->index; + uint8_t reg[MAX_REG_PER_FAN]; + int i, rc; + + for(i=0;ifans; ++fan_idx) { + read_tach_registers(client, &tachval, + SEL_FAN(fan_idx, REG_TACH_READ_HIGH), + SEL_FAN(fan_idx, REG_TACH_READ_LOW)); + tach_reading = calculate_rpm_from_tach_emc23xx(&data->fan[fan_idx],tachval >> TACH_VALUE_SHIFT_BITS); + + printk(KERN_NOTICE "FAN %d : Enabled %d Valid %d RPM Control %d multiplier %d poles %d", fan_idx, + data->fan[fan_idx].enabled, data->fan[fan_idx].valid, data->fan[fan_idx].rpm_control, + data->fan[fan_idx].multiplier,data->fan[fan_idx].poles); + printk(KERN_NOTICE " Tach Count (RPM) %5d ranges %d Edges %d fanstop 0x%04x", + tach_reading,data->fan[fan_idx].ranges,data->fan[fan_idx].edges,data->fan[fan_idx].fanstop); + printk(KERN_NOTICE " Tach Target (RPM) %5d Driver Setting (RPM) %5d pwm 0x%02x", + data->fan[fan_idx].tach_target_rpm, data->fan[fan_idx].driver_setting_rpm, data->fan[fan_idx].pwm); + } + + printk(KERN_NOTICE "\n"); + + return snprintf(buf, SPEED_PWM_LEN_STRING, "%s", ""); +} + +/* define a read only attribute */ +#define EMC2305_ATTR_RO(_type, _item, _num) \ + SENSOR_ATTR(_type ## _num ## _ ## _item, S_IRUGO, \ + show_## _type ## _ ## _item, NULL, _num - 1) + +/* define a read/write attribute */ +#define EMC2305_ATTR_RW(_type, _item, _num) \ + SENSOR_ATTR(_type ## _num ## _ ## _item, S_IRUGO | S_IWUSR, \ + show_## _type ##_ ## _item, \ + set_## _type ## _ ## _item, _num - 1) + +/* + * TODO: Ugly hack, but temporary as this whole logic needs + * to be rewritten as per standard HWMON sysfs registration + */ + +/* define a read/write attribute */ +#define EMC2305_ATTR_RW2(_type, _num) \ + SENSOR_ATTR(_type ## _num, S_IRUGO | S_IWUSR, \ + show_## _type, set_## _type, _num - 1) + +/* defines the attributes for a single fan */ +#define EMC2305_DEFINE_FAN_ATTRS(_num) \ + static const \ +struct sensor_device_attribute emc2305_attr_fan ## _num[] = { \ + EMC2305_ATTR_RO(fan, input, _num), \ + EMC2305_ATTR_RO(fan, fault, _num), \ + EMC2305_ATTR_RW(fan, div, _num), \ + EMC2305_ATTR_RW(fan, target, _num), \ + EMC2305_ATTR_RW(pwm, enable, _num), \ + EMC2305_ATTR_RW2(pwm, _num), \ + EMC2305_ATTR_RO(fan, dump, _num), \ +} + +#define EMC2305_NUM_FAN_ATTRS ARRAY_SIZE(emc2305_attr_fan1) + +/* fan attributes for the single fans */ +EMC2305_DEFINE_FAN_ATTRS(1); +EMC2305_DEFINE_FAN_ATTRS(2); +EMC2305_DEFINE_FAN_ATTRS(3); +EMC2305_DEFINE_FAN_ATTRS(4); +EMC2305_DEFINE_FAN_ATTRS(5); +EMC2305_DEFINE_FAN_ATTRS(6); + +/* fan attributes */ +static const struct sensor_device_attribute *emc2305_fan_attrs[] = { + emc2305_attr_fan1, + emc2305_attr_fan2, + emc2305_attr_fan3, + emc2305_attr_fan4, + emc2305_attr_fan5, +}; + +/* debug attributes for all fans */ +static struct sensor_device_attribute emc2305_debug_attrs[] = { + SENSOR_ATTR(debug_dump, S_IRUGO, show_debug_dump, NULL, 0), +}; + +#define MAX_DEBUG_ATTRS ARRAY_SIZE(emc2305_debug_attrs) + +static const struct sensor_device_attribute emc2305_attr_common[] = { +}; + +/* + * driver interface + */ + +static void emc2305_remove(struct i2c_client *client) +{ + struct emc2305_data *data = i2c_get_clientdata(client); + int fan_idx, i; + + hwmon_device_unregister(data->hwmon_dev); + + for (fan_idx = 0; fan_idx < data->fans; ++fan_idx) + for (i = 0; i < EMC2305_NUM_FAN_ATTRS; ++i) + device_remove_file( + &client->dev, + &emc2305_fan_attrs[fan_idx][i].dev_attr); + + for (i = 0; i < ARRAY_SIZE(emc2305_attr_common); ++i) + device_remove_file(&client->dev, + &emc2305_attr_common[i].dev_attr); + + for (i = 0; i < MAX_DEBUG_ATTRS; ++i) + device_remove_file(&client->dev, + &emc2305_debug_attrs[i].dev_attr); + + mutex_destroy(&data->update_lock); + kfree(data); +} + + +#ifdef CONFIG_OF +/* + * device tree support + */ + +struct of_fan_attribute { + const char *name; + int (*set)(struct i2c_client*, int, long); +}; + +struct of_fan_attribute of_fan_attributes[] = { + {"fan-div", emc2305_set_fan_div}, + {"fan-target", emc2305_set_fan_target}, + {"pwm-enable", emc2305_set_pwm_enable}, + {NULL, NULL} +}; + +static int emc2305_config_of(struct i2c_client *client) +{ + struct emc2305_data *data = i2c_get_clientdata(client); + struct device_node *node; + unsigned int fan_idx; + + if (!client->dev.of_node) + { + return -EINVAL; + } + if (!of_get_next_child(client->dev.of_node, NULL)) + return 0; + + for (fan_idx = 0; fan_idx < data->fans; ++fan_idx) + data->fan[fan_idx].enabled = false; + + for_each_child_of_node(client->dev.of_node, node) { + const __be32 *property; + int len; + struct of_fan_attribute *attr; + + property = of_get_property(node, "reg", &len); + if (!property || len != sizeof(int)) { + dev_err(&client->dev, "invalid reg on %s\n", + node->full_name); + continue; + } + + fan_idx = be32_to_cpup(property); + if (fan_idx >= data->fans) { + dev_err(&client->dev, + "invalid fan index %d on %s\n", + fan_idx, node->full_name); + continue; + } + + data->fan[fan_idx].enabled = true; + + for (attr = of_fan_attributes; attr->name; ++attr) { + int status = 0; + long value; + property = of_get_property(node, attr->name, &len); + if (!property) + continue; + if (len != sizeof(int)) { + dev_err(&client->dev, "invalid %s on %s\n", + attr->name, node->full_name); + continue; + } + value = be32_to_cpup(property); + status = attr->set(client, fan_idx, value); + if (status == -EINVAL) { + dev_err(&client->dev, + "invalid value for %s on %s\n", + attr->name, node->full_name); + } + } + } + + return 0; +} + +#endif + +static void emc2305_device_init(struct i2c_client *client) +{ + int fan_index; + uint16_t range = 0, edges = 0, fanstop = 0; + uint8_t conf = 0, value = 0; + struct emc2305_data *data = i2c_get_clientdata (client); + bool rpm_control; + + switch (tach_count_multiplier) { + case 1: + range = 0; + fanstop = (uint16_t)0xFFF8; + break; + case 2: + range = 1; + fanstop = (uint16_t)0xFFF0; + break; + case 4: + range = 2; + fanstop = (uint16_t)0xFFE0; + break; + case 8: + range = 3; + fanstop = (uint16_t)0xFFC0; + break; + default: + printk(KERN_ERR "Invalid tach_count_multiplier specified. Using default (%d).\n",DEFAULT_TACH_COUNT_MULTIPLIER); + tach_count_multiplier = DEFAULT_TACH_COUNT_MULTIPLIER; + range = 2; + fanstop = (uint16_t)0xFFE0; + } + + if(poles > 4) { + printk(KERN_ERR "Invalid poles specified. Using default (%d).\n",DEFAULT_POLES); + poles = DEFAULT_POLES; + edges = (poles * 2) + 1; + } + edges = (poles * 2) + 1; + + rpm_control = (mode == 0) ? false : true; + + for (fan_index = 0; fan_index < data->fans; ++fan_index) { + data->fan[fan_index].rpm_control = rpm_control; + data->fan[fan_index].ranges = range; + data->fan[fan_index].multiplier = tach_count_multiplier; + data->fan[fan_index].edges = edges; + data->fan[fan_index].poles = poles; + data->fan[fan_index].fanstop = fanstop; + } + + mutex_lock(&data->update_lock); + + /* Clear status registers */ + emc2305_clear_fan_fault (client); + + conf = REG_PWM_OUTPUT_CONFIG; + value = 0x1f; + i2c_smbus_write_byte_data (client, conf, value); + + conf = REG_PWM_BASE_FREQ_1; + value = 0x0f; + i2c_smbus_write_byte_data (client, conf, value); + + conf = REG_PWM_BASE_FREQ_2; + value = 0x3f; + i2c_smbus_write_byte_data (client, conf, value); + + + for (fan_index = 0; fan_index < data->fans; ++fan_index) { + conf = SEL_FAN (fan_index, REG_FAN_MAX_STEP); + value = 0x01; + i2c_smbus_write_byte_data (client, conf, value); + + conf = SEL_FAN (fan_index, REG_FAN_VALID_TACH_COUNT); + value = 0xfe; + i2c_smbus_write_byte_data (client, conf, value); + + if (data->fan[fan_index].rpm_control) { + write_fan_target (client, fan_index, FAN_INIT_RPM_SPEED); + } else { + write_fan_setting (client, fan_index, FAN_INIT_RPM_SPEED); + } + + conf = SEL_FAN (fan_index, REG_FAN_MINIMUM_DRIVE); + value = 0x01; + i2c_smbus_write_byte_data (client, conf, value); + + conf = SEL_FAN (fan_index, REG_PWM_DIVIDE); + value = 0x0; + i2c_smbus_write_byte_data (client, conf, value); + + /* Change to RPM Mode */ + conf = SEL_FAN (fan_index, REG_FAN_CONFIGURATION_1); + value = ((data->fan[fan_index].rpm_control & 0x1) << 7) | + (range << 5) | + ((data->fan[fan_index].poles - 1) << 3) | + 0x3; // 400 ms update interval. Refer to REGISTER 6-13: FAN CONFIG - FAN CONFIGURATION REGISTERS + i2c_smbus_write_byte_data (client, conf, value); + } + + mutex_unlock(&data->update_lock); +} + +static void emc2305_get_config(struct i2c_client *client) +{ + int i; + struct emc2305_data *data = i2c_get_clientdata(client); + + for (i = 0; i < data->fans; ++i) { + data->fan[i].enabled = true; + emc2305_update_fan(client, i); + } + +#ifdef CONFIG_OF + emc2305_config_of(client); +#endif + +} + +static int emc2305_probe(struct i2c_client *client) +{ + struct emc2305_data *data; + int status; + int i; + int fan_idx, debug_idx; + unsigned short max_fans_supported; + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA)) + return -EIO; + + data = kzalloc(sizeof(struct emc2305_data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + + status = i2c_smbus_read_byte_data(client, REG_PRODUCT_ID); + switch (status) { + case 0x34: /* EMC2305 */ + max_fans_supported = 5; + break; + case 0x35: /* EMC2303 */ + max_fans_supported = 3; + break; + case 0x36: /* EMC2302 */ + max_fans_supported = 2; + break; + case 0x37: /* EMC2301 */ + max_fans_supported = 1; + break; + default: + if (status >= 0) { + + status = -EINVAL; + } + goto exit_free; + } + + data->fans = max_fans_supported; + if(num_fans && (num_fans < max_fans_supported)) { + data->fans = num_fans; + } + + /* initialise EMC2305 driver */ + emc2305_device_init(client); + + emc2305_get_config(client); + + for (i = 0; i < ARRAY_SIZE(emc2305_attr_common); ++i) { + status = device_create_file(&client->dev, + &emc2305_attr_common[i].dev_attr); + if (status) + goto exit_remove; + } + for (fan_idx = 0; fan_idx < data->fans; ++fan_idx) + for (i = 0; i < EMC2305_NUM_FAN_ATTRS; ++i) { + if (!data->fan[fan_idx].enabled) + continue; + status = device_create_file( + &client->dev, + &emc2305_fan_attrs[fan_idx][i].dev_attr); + if (status) + goto exit_remove_fans; + } + + for (debug_idx = 0; debug_idx < MAX_DEBUG_ATTRS; ++debug_idx) { + status = device_create_file( + &client->dev, + &emc2305_debug_attrs[debug_idx].dev_attr); + if (status) + goto exit_remove; + } + + data->hwmon_dev = hwmon_device_register(&client->dev); + if (IS_ERR(data->hwmon_dev)) { + status = PTR_ERR(data->hwmon_dev); + goto exit_remove_fans; + } + + dev_info(&client->dev, "%s: sensor '%s'\n", + dev_name(data->hwmon_dev), client->name); + + return 0; + +exit_remove_fans: + for (fan_idx = 0; fan_idx < data->fans; ++fan_idx) + for (i = 0; i < EMC2305_NUM_FAN_ATTRS; ++i) + device_remove_file( + &client->dev, + &emc2305_fan_attrs[fan_idx][i].dev_attr); + +exit_remove: + for (i = 0; i < ARRAY_SIZE(emc2305_attr_common); ++i) + device_remove_file(&client->dev, + &emc2305_attr_common[i].dev_attr); + + for (i = 0; i < MAX_DEBUG_ATTRS; ++i) + device_remove_file(&client->dev, + &emc2305_debug_attrs[i].dev_attr); + +exit_free: + mutex_destroy(&data->update_lock); + kfree(data); + return status; +} + +static const struct i2c_device_id emc2305_id[] = { + { "emc2305", 0 }, + { "emc2303", 0 }, + { "emc2302", 0 }, + { "emc2301", 0 }, + { } +}; +MODULE_DEVICE_TABLE(i2c, emc2305_id); + +static struct i2c_driver emc2305_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "emc2305", + }, + .probe = emc2305_probe, + .remove = emc2305_remove, + .id_table = emc2305_id, +}; + +module_i2c_driver(emc2305_driver); + +MODULE_PARM_DESC(mode, "FAN Control Operating Mode: 0=Direct Setting, 1=RPM based FSC (default)"); +MODULE_PARM_DESC(num_fans, "Number of FANs in this platform <1..5>"); +MODULE_PARM_DESC(tach_count_multiplier, "FAN TACH count multiplier <1/2/4/8>"); +MODULE_PARM_DESC(poles, "FAN poles <1..4>"); + +MODULE_AUTHOR("Reinhard Pfau "); +MODULE_DESCRIPTION("SMSC EMC2305 hwmon driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-dell/s3248t/modules/pmbus.h b/platform/broadcom/sonic-platform-modules-dell/s3248t/modules/pmbus.h new file mode 100644 index 00000000000..521baf6da49 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s3248t/modules/pmbus.h @@ -0,0 +1,425 @@ +/* + * pmbus.h - Common defines and structures for PMBus devices + * + * Copyright (c) 2010, 2011 Ericsson AB. + * Copyright (c) 2012 Guenter Roeck + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#ifndef PMBUS_H +#define PMBUS_H + +#include +#include + +/* + * Registers + */ +enum pmbus_regs { + PMBUS_PAGE = 0x00, + PMBUS_OPERATION = 0x01, + PMBUS_ON_OFF_CONFIG = 0x02, + PMBUS_CLEAR_FAULTS = 0x03, + PMBUS_PHASE = 0x04, + + PMBUS_CAPABILITY = 0x19, + PMBUS_QUERY = 0x1A, + + PMBUS_VOUT_MODE = 0x20, + PMBUS_VOUT_COMMAND = 0x21, + PMBUS_VOUT_TRIM = 0x22, + PMBUS_VOUT_CAL_OFFSET = 0x23, + PMBUS_VOUT_MAX = 0x24, + PMBUS_VOUT_MARGIN_HIGH = 0x25, + PMBUS_VOUT_MARGIN_LOW = 0x26, + PMBUS_VOUT_TRANSITION_RATE = 0x27, + PMBUS_VOUT_DROOP = 0x28, + PMBUS_VOUT_SCALE_LOOP = 0x29, + PMBUS_VOUT_SCALE_MONITOR = 0x2A, + + PMBUS_COEFFICIENTS = 0x30, + PMBUS_POUT_MAX = 0x31, + + PMBUS_FAN_CONFIG_12 = 0x3A, + PMBUS_FAN_COMMAND_1 = 0x3B, + PMBUS_FAN_COMMAND_2 = 0x3C, + PMBUS_FAN_CONFIG_34 = 0x3D, + PMBUS_FAN_COMMAND_3 = 0x3E, + PMBUS_FAN_COMMAND_4 = 0x3F, + + PMBUS_VOUT_OV_FAULT_LIMIT = 0x40, + PMBUS_VOUT_OV_FAULT_RESPONSE = 0x41, + PMBUS_VOUT_OV_WARN_LIMIT = 0x42, + PMBUS_VOUT_UV_WARN_LIMIT = 0x43, + PMBUS_VOUT_UV_FAULT_LIMIT = 0x44, + PMBUS_VOUT_UV_FAULT_RESPONSE = 0x45, + PMBUS_IOUT_OC_FAULT_LIMIT = 0x46, + PMBUS_IOUT_OC_FAULT_RESPONSE = 0x47, + PMBUS_IOUT_OC_LV_FAULT_LIMIT = 0x48, + PMBUS_IOUT_OC_LV_FAULT_RESPONSE = 0x49, + PMBUS_IOUT_OC_WARN_LIMIT = 0x4A, + PMBUS_IOUT_UC_FAULT_LIMIT = 0x4B, + PMBUS_IOUT_UC_FAULT_RESPONSE = 0x4C, + + PMBUS_OT_FAULT_LIMIT = 0x4F, + PMBUS_OT_FAULT_RESPONSE = 0x50, + PMBUS_OT_WARN_LIMIT = 0x51, + PMBUS_UT_WARN_LIMIT = 0x52, + PMBUS_UT_FAULT_LIMIT = 0x53, + PMBUS_UT_FAULT_RESPONSE = 0x54, + PMBUS_VIN_OV_FAULT_LIMIT = 0x55, + PMBUS_VIN_OV_FAULT_RESPONSE = 0x56, + PMBUS_VIN_OV_WARN_LIMIT = 0x57, + PMBUS_VIN_UV_WARN_LIMIT = 0x58, + PMBUS_VIN_UV_FAULT_LIMIT = 0x59, + + PMBUS_IIN_OC_FAULT_LIMIT = 0x5B, + PMBUS_IIN_OC_WARN_LIMIT = 0x5D, + + PMBUS_POUT_OP_FAULT_LIMIT = 0x68, + PMBUS_POUT_OP_WARN_LIMIT = 0x6A, + PMBUS_PIN_OP_WARN_LIMIT = 0x6B, + + PMBUS_STATUS_BYTE = 0x78, + PMBUS_STATUS_WORD = 0x79, + PMBUS_STATUS_VOUT = 0x7A, + PMBUS_STATUS_IOUT = 0x7B, + PMBUS_STATUS_INPUT = 0x7C, + PMBUS_STATUS_TEMPERATURE = 0x7D, + PMBUS_STATUS_CML = 0x7E, + PMBUS_STATUS_OTHER = 0x7F, + PMBUS_STATUS_MFR_SPECIFIC = 0x80, + PMBUS_STATUS_FAN_12 = 0x81, + PMBUS_STATUS_FAN_34 = 0x82, + + PMBUS_READ_VIN = 0x88, + PMBUS_READ_IIN = 0x89, + PMBUS_READ_VCAP = 0x8A, + PMBUS_READ_VOUT = 0x8B, + PMBUS_READ_IOUT = 0x8C, + PMBUS_READ_TEMPERATURE_1 = 0x8D, + PMBUS_READ_TEMPERATURE_2 = 0x8E, + PMBUS_READ_TEMPERATURE_3 = 0x8F, + PMBUS_READ_FAN_SPEED_1 = 0x90, + PMBUS_READ_FAN_SPEED_2 = 0x91, + PMBUS_READ_FAN_SPEED_3 = 0x92, + PMBUS_READ_FAN_SPEED_4 = 0x93, + PMBUS_READ_DUTY_CYCLE = 0x94, + PMBUS_READ_FREQUENCY = 0x95, + PMBUS_READ_POUT = 0x96, + PMBUS_READ_PIN = 0x97, + + PMBUS_REVISION = 0x98, + PMBUS_MFR_ID = 0x99, + PMBUS_MFR_MODEL = 0x9A, + PMBUS_MFR_REVISION = 0x9B, + PMBUS_MFR_LOCATION = 0x9C, + PMBUS_MFR_DATE = 0x9D, + PMBUS_MFR_SERIAL = 0x9E, + +/* + * Virtual registers. + * Useful to support attributes which are not supported by standard PMBus + * registers but exist as manufacturer specific registers on individual chips. + * Must be mapped to real registers in device specific code. + * + * Semantics: + * Virtual registers are all word size. + * READ registers are read-only; writes are either ignored or return an error. + * RESET registers are read/write. Reading reset registers returns zero + * (used for detection), writing any value causes the associated history to be + * reset. + * Virtual registers have to be handled in device specific driver code. Chip + * driver code returns non-negative register values if a virtual register is + * supported, or a negative error code if not. The chip driver may return + * -ENODATA or any other error code in this case, though an error code other + * than -ENODATA is handled more efficiently and thus preferred. Either case, + * the calling PMBus core code will abort if the chip driver returns an error + * code when reading or writing virtual registers. + */ + PMBUS_VIRT_BASE = 0x100, + PMBUS_VIRT_READ_TEMP_AVG, + PMBUS_VIRT_READ_TEMP_MIN, + PMBUS_VIRT_READ_TEMP_MAX, + PMBUS_VIRT_RESET_TEMP_HISTORY, + PMBUS_VIRT_READ_VIN_AVG, + PMBUS_VIRT_READ_VIN_MIN, + PMBUS_VIRT_READ_VIN_MAX, + PMBUS_VIRT_RESET_VIN_HISTORY, + PMBUS_VIRT_READ_IIN_AVG, + PMBUS_VIRT_READ_IIN_MIN, + PMBUS_VIRT_READ_IIN_MAX, + PMBUS_VIRT_RESET_IIN_HISTORY, + PMBUS_VIRT_READ_PIN_AVG, + PMBUS_VIRT_READ_PIN_MIN, + PMBUS_VIRT_READ_PIN_MAX, + PMBUS_VIRT_RESET_PIN_HISTORY, + PMBUS_VIRT_READ_POUT_AVG, + PMBUS_VIRT_READ_POUT_MIN, + PMBUS_VIRT_READ_POUT_MAX, + PMBUS_VIRT_RESET_POUT_HISTORY, + PMBUS_VIRT_READ_VOUT_AVG, + PMBUS_VIRT_READ_VOUT_MIN, + PMBUS_VIRT_READ_VOUT_MAX, + PMBUS_VIRT_RESET_VOUT_HISTORY, + PMBUS_VIRT_READ_IOUT_AVG, + PMBUS_VIRT_READ_IOUT_MIN, + PMBUS_VIRT_READ_IOUT_MAX, + PMBUS_VIRT_RESET_IOUT_HISTORY, + PMBUS_VIRT_READ_TEMP2_AVG, + PMBUS_VIRT_READ_TEMP2_MIN, + PMBUS_VIRT_READ_TEMP2_MAX, + PMBUS_VIRT_RESET_TEMP2_HISTORY, + + PMBUS_VIRT_READ_VMON, + PMBUS_VIRT_VMON_UV_WARN_LIMIT, + PMBUS_VIRT_VMON_OV_WARN_LIMIT, + PMBUS_VIRT_VMON_UV_FAULT_LIMIT, + PMBUS_VIRT_VMON_OV_FAULT_LIMIT, + PMBUS_VIRT_STATUS_VMON, +}; + +/* + * OPERATION + */ +#define PB_OPERATION_CONTROL_ON BIT(7) + +/* + * CAPABILITY + */ +#define PB_CAPABILITY_SMBALERT BIT(4) +#define PB_CAPABILITY_ERROR_CHECK BIT(7) + +/* + * VOUT_MODE + */ +#define PB_VOUT_MODE_MODE_MASK 0xe0 +#define PB_VOUT_MODE_PARAM_MASK 0x1f + +#define PB_VOUT_MODE_LINEAR 0x00 +#define PB_VOUT_MODE_VID 0x20 +#define PB_VOUT_MODE_DIRECT 0x40 + +/* + * Fan configuration + */ +#define PB_FAN_2_PULSE_MASK (BIT(0) | BIT(1)) +#define PB_FAN_2_RPM BIT(2) +#define PB_FAN_2_INSTALLED BIT(3) +#define PB_FAN_1_PULSE_MASK (BIT(4) | BIT(5)) +#define PB_FAN_1_RPM BIT(6) +#define PB_FAN_1_INSTALLED BIT(7) + +/* + * STATUS_BYTE, STATUS_WORD (lower) + */ +#define PB_STATUS_NONE_ABOVE BIT(0) +#define PB_STATUS_CML BIT(1) +#define PB_STATUS_TEMPERATURE BIT(2) +#define PB_STATUS_VIN_UV BIT(3) +#define PB_STATUS_IOUT_OC BIT(4) +#define PB_STATUS_VOUT_OV BIT(5) +#define PB_STATUS_OFF BIT(6) +#define PB_STATUS_BUSY BIT(7) + +/* + * STATUS_WORD (upper) + */ +#define PB_STATUS_UNKNOWN BIT(8) +#define PB_STATUS_OTHER BIT(9) +#define PB_STATUS_FANS BIT(10) +#define PB_STATUS_POWER_GOOD_N BIT(11) +#define PB_STATUS_WORD_MFR BIT(12) +#define PB_STATUS_INPUT BIT(13) +#define PB_STATUS_IOUT_POUT BIT(14) +#define PB_STATUS_VOUT BIT(15) + +/* + * STATUS_IOUT + */ +#define PB_POUT_OP_WARNING BIT(0) +#define PB_POUT_OP_FAULT BIT(1) +#define PB_POWER_LIMITING BIT(2) +#define PB_CURRENT_SHARE_FAULT BIT(3) +#define PB_IOUT_UC_FAULT BIT(4) +#define PB_IOUT_OC_WARNING BIT(5) +#define PB_IOUT_OC_LV_FAULT BIT(6) +#define PB_IOUT_OC_FAULT BIT(7) + +/* + * STATUS_VOUT, STATUS_INPUT + */ +#define PB_VOLTAGE_UV_FAULT BIT(4) +#define PB_VOLTAGE_UV_WARNING BIT(5) +#define PB_VOLTAGE_OV_WARNING BIT(6) +#define PB_VOLTAGE_OV_FAULT BIT(7) + +/* + * STATUS_INPUT + */ +#define PB_PIN_OP_WARNING BIT(0) +#define PB_IIN_OC_WARNING BIT(1) +#define PB_IIN_OC_FAULT BIT(2) + +/* + * STATUS_TEMPERATURE + */ +#define PB_TEMP_UT_FAULT BIT(4) +#define PB_TEMP_UT_WARNING BIT(5) +#define PB_TEMP_OT_WARNING BIT(6) +#define PB_TEMP_OT_FAULT BIT(7) + +/* + * STATUS_FAN + */ +#define PB_FAN_AIRFLOW_WARNING BIT(0) +#define PB_FAN_AIRFLOW_FAULT BIT(1) +#define PB_FAN_FAN2_SPEED_OVERRIDE BIT(2) +#define PB_FAN_FAN1_SPEED_OVERRIDE BIT(3) +#define PB_FAN_FAN2_WARNING BIT(4) +#define PB_FAN_FAN1_WARNING BIT(5) +#define PB_FAN_FAN2_FAULT BIT(6) +#define PB_FAN_FAN1_FAULT BIT(7) + +/* + * CML_FAULT_STATUS + */ +#define PB_CML_FAULT_OTHER_MEM_LOGIC BIT(0) +#define PB_CML_FAULT_OTHER_COMM BIT(1) +#define PB_CML_FAULT_PROCESSOR BIT(3) +#define PB_CML_FAULT_MEMORY BIT(4) +#define PB_CML_FAULT_PACKET_ERROR BIT(5) +#define PB_CML_FAULT_INVALID_DATA BIT(6) +#define PB_CML_FAULT_INVALID_COMMAND BIT(7) + +enum pmbus_sensor_classes { + PSC_VOLTAGE_IN = 0, + PSC_VOLTAGE_OUT, + PSC_CURRENT_IN, + PSC_CURRENT_OUT, + PSC_POWER, + PSC_TEMPERATURE, + PSC_FAN, + PSC_NUM_CLASSES /* Number of power sensor classes */ +}; + +#define PMBUS_PAGES 32 /* Per PMBus specification */ + +/* Functionality bit mask */ +#define PMBUS_HAVE_VIN BIT(0) +#define PMBUS_HAVE_VCAP BIT(1) +#define PMBUS_HAVE_VOUT BIT(2) +#define PMBUS_HAVE_IIN BIT(3) +#define PMBUS_HAVE_IOUT BIT(4) +#define PMBUS_HAVE_PIN BIT(5) +#define PMBUS_HAVE_POUT BIT(6) +#define PMBUS_HAVE_FAN12 BIT(7) +#define PMBUS_HAVE_FAN34 BIT(8) +#define PMBUS_HAVE_TEMP BIT(9) +#define PMBUS_HAVE_TEMP2 BIT(10) +#define PMBUS_HAVE_TEMP3 BIT(11) +#define PMBUS_HAVE_STATUS_VOUT BIT(12) +#define PMBUS_HAVE_STATUS_IOUT BIT(13) +#define PMBUS_HAVE_STATUS_INPUT BIT(14) +#define PMBUS_HAVE_STATUS_TEMP BIT(15) +#define PMBUS_HAVE_STATUS_FAN12 BIT(16) +#define PMBUS_HAVE_STATUS_FAN34 BIT(17) +#define PMBUS_HAVE_VMON BIT(18) +#define PMBUS_HAVE_STATUS_VMON BIT(19) + +enum pmbus_data_format { linear = 0, direct, vid }; +enum vrm_version { vr11 = 0, vr12 }; + +struct pmbus_driver_info { + int pages; /* Total number of pages */ + enum pmbus_data_format format[PSC_NUM_CLASSES]; + enum vrm_version vrm_version; + /* + * Support one set of coefficients for each sensor type + * Used for chips providing data in direct mode. + */ + int m[PSC_NUM_CLASSES]; /* mantissa for direct data format */ + int b[PSC_NUM_CLASSES]; /* offset */ + int R[PSC_NUM_CLASSES]; /* exponent */ + + u32 func[PMBUS_PAGES]; /* Functionality, per page */ + /* + * The following functions map manufacturing specific register values + * to PMBus standard register values. Specify only if mapping is + * necessary. + * Functions return the register value (read) or zero (write) if + * successful. A return value of -ENODATA indicates that there is no + * manufacturer specific register, but that a standard PMBus register + * may exist. Any other negative return value indicates that the + * register does not exist, and that no attempt should be made to read + * the standard register. + */ + int (*read_byte_data)(struct i2c_client *client, int page, int reg); + int (*read_word_data)(struct i2c_client *client, int page, int reg); + int (*write_word_data)(struct i2c_client *client, int page, int reg, + u16 word); + int (*write_byte)(struct i2c_client *client, int page, u8 value); + /* + * The identify function determines supported PMBus functionality. + * This function is only necessary if a chip driver supports multiple + * chips, and the chip functionality is not pre-determined. + */ + int (*identify)(struct i2c_client *client, + struct pmbus_driver_info *info); + + /* Regulator functionality, if supported by this chip driver. */ + int num_regulators; + const struct regulator_desc *reg_desc; +}; + +/* Regulator ops */ + +extern const struct regulator_ops pmbus_regulator_ops; + +/* Macro for filling in array of struct regulator_desc */ +#define PMBUS_REGULATOR(_name, _id) \ + [_id] = { \ + .name = (_name # _id), \ + .id = (_id), \ + .of_match = of_match_ptr(_name # _id), \ + .regulators_node = of_match_ptr("regulators"), \ + .ops = &pmbus_regulator_ops, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + } + +/* Function declarations */ + +void pmbus_clear_cache(struct i2c_client *client); +int pmbus_set_page(struct i2c_client *client, u8 page); +int pmbus_read_word_data(struct i2c_client *client, u8 page, u8 reg); +int pmbus_write_word_data(struct i2c_client *client, u8 page, u8 reg, u16 word); +int pmbus_read_byte_data(struct i2c_client *client, int page, u8 reg); +int pmbus_write_byte(struct i2c_client *client, int page, u8 value); +int pmbus_write_byte_data(struct i2c_client *client, int page, u8 reg, + u8 value); +int pmbus_update_byte_data(struct i2c_client *client, int page, u8 reg, + u8 mask, u8 value); +void pmbus_clear_faults(struct i2c_client *client); +bool pmbus_check_byte_register(struct i2c_client *client, int page, int reg); +bool pmbus_check_word_register(struct i2c_client *client, int page, int reg); +int pmbus_do_probe(struct i2c_client *client, const struct i2c_device_id *id, + struct pmbus_driver_info *info); +int pmbus_do_remove(struct i2c_client *client); +const struct pmbus_driver_info *pmbus_get_driver_info(struct i2c_client + *client); + +#endif /* PMBUS_H */ \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-dell/s3248t/scripts/mux_controller.sh b/platform/broadcom/sonic-platform-modules-dell/s3248t/scripts/mux_controller.sh new file mode 100755 index 00000000000..f357b117998 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s3248t/scripts/mux_controller.sh @@ -0,0 +1,27 @@ +#!/bin/bash + +init_devnum() { + found=0 + for devnum in 0 1; do + devname=`cat /sys/bus/i2c/devices/i2c-${devnum}/name` + # iSMT adapter can be at dff5c000 + echo $devname + if [[ "$devname" == 'SMBus iSMT adapter at '* ]] ; then + found=1 + break + fi + done + + [ $found -eq 0 ] && echo "cannot find iSMT" && exit 0 +} + +init_devnum +while [ 1 ] +do + if [ ! -f /sys/class/i2c-adapter/i2c-${devnum}/${devnum}-0071/idle_state ]; then + sleep 1 + continue + fi + echo -2 > /sys/class/i2c-adapter/i2c-${devnum}/${devnum}-0071/idle_state + break +done diff --git a/platform/broadcom/sonic-platform-modules-dell/s3248t/scripts/platform-modules-s3248t.sh b/platform/broadcom/sonic-platform-modules-dell/s3248t/scripts/platform-modules-s3248t.sh new file mode 100755 index 00000000000..12804689a30 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s3248t/scripts/platform-modules-s3248t.sh @@ -0,0 +1,6 @@ +#!/bin/bash + +function platform-modules-s3248tServicePreStop() +{ + /usr/local/bin/s3248t_platform.sh media_down +} diff --git a/platform/broadcom/sonic-platform-modules-dell/s3248t/scripts/platform_sensors.py b/platform/broadcom/sonic-platform-modules-dell/s3248t/scripts/platform_sensors.py new file mode 100755 index 00000000000..f6c8dd0871c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s3248t/scripts/platform_sensors.py @@ -0,0 +1,162 @@ +#!/usr/bin/python3 +""" + This provides support for the following objects: + * Onboard temperature sensors + * FAN trays + * PSU +""" + +import subprocess + +output = "" +try: + rc = 0 + output = subprocess.check_output('/usr/bin/sensors', stderr=subprocess.STDOUT, \ + encoding="utf-8").splitlines() + + valid = False + for line in output: + if line.startswith('acpitz') or line.startswith('coretemp'): + valid = True + if valid: + print(line) + if line == '': + valid = False + + print("Onboard Temperature Sensors:") + idx = 0 + for line in output: + if line.startswith('tmp75'): + print('\t' + output[idx+2].split('(')[0]) + idx += 1 + + print("\nFan Trays:") + idx = 0 + found_emc = False + fan_status = [' Normal', ' Abnormal'] + for line in output: + if line.startswith('emc'): + found_emc = True + with open('/sys/devices/platform/dell-s3248t-cpld.0/fan0_prs') as f: + line = f.readline() + present = int(line, 0) + if present: + print('\t' + 'Fan Tray 1:') + with open('/sys/bus/i2c/devices/7-002c/fan1_fault') as f: + line = f.readline() + status = int(line, 0) + print('\t\t' + 'Fan State:' + fan_status[status]) + print('\t\t' + 'Fan Speed:' + (output[idx+2].split('(')[0]).split(':')[1]) + with open('/sys/devices/platform/dell-s3248t-cpld.0/fan0_dir') as f: + line = f.readline() + direction = 'Intake' if line[:-1] == 'B2F' else 'Exhaust' + print('\t\t' + 'Airflow:\t' + direction) + else: + print('\t' + 'Fan Tray 1:\tNot Present') + + with open('/sys/devices/platform/dell-s3248t-cpld.0/fan1_prs') as f: + line = f.readline() + present = int(line, 0) + if present: + print('\t' + 'Fan Tray 2:') + with open('/sys/bus/i2c/devices/7-002c/fan2_fault') as f: + line = f.readline() + status = int(line, 0) + print('\t\t' + 'Fan State:' + fan_status[status]) + print('\t\t' + 'Fan Speed:' + (output[idx+3].split('(')[0]).split(':')[1]) + with open('/sys/devices/platform/dell-s3248t-cpld.0/fan1_dir') as f: + line = f.readline() + direction = 'Intake' if line[:-1] == 'B2F' else 'Exhaust' + print('\t\t' + 'Airflow:\t' + direction) + else: + print('\t' + 'Fan Tray 2:\tNot Present') + + with open('/sys/devices/platform/dell-s3248t-cpld.0/fan2_prs') as f: + line = f.readline() + present = int(line, 0) + if present: + print('\t' + 'Fan Tray 3:') + with open('/sys/bus/i2c/devices/7-002c/fan3_fault') as f: + line = f.readline() + status = int(line, 0) + print('\t\t' + 'Fan State:' + fan_status[status]) + print('\t\t' + 'Fan Speed:' + (output[idx+4].split('(')[0]).split(':')[1]) + with open('/sys/devices/platform/dell-s3248t-cpld.0/fan2_dir') as f: + line = f.readline() + direction = 'Intake' if line[:-1] == 'B2F' else 'Exhaust' + print('\t\t' + 'Airflow:\t' + direction) + else: + print('\t' + 'Fan Tray 3:\tNot Present') + idx += 1 + if not found_emc: + print('\t' + 'Fan Tray 1:\tNot Present') + print('\t' + 'Fan Tray 2:\tNot Present') + print('\t' + 'Fan Tray 3:\tNot Present') + + print('\nPSUs:') + idx = 0 + with open('/sys/devices/platform/dell-s3248t-cpld.0/psu0_prs') as f: + line = f.readline() + found_psu1 = int(line, 0) + if not found_psu1: + print('\tPSU1:\tNot Present') + else: + for line in output: + if line.startswith('dps460-i2c-10'): + with open('/sys/devices/platform/dell-s3248t-cpld.0/psu0_status') as f: + line = f.readline() + status = int(line, 0) + if not status: + print('\tPSU1:\tNot OK') + break + with open('/sys/bus/i2c/devices/10-0056/eeprom', encoding="ISO-8859-1") as f: + line = f.readline() + direction = 'Exhaust' if 'FORWARD' in line else 'Intake' + print('\tPSU1:') + print('\t\t' + output[idx+2].split('(')[0]) + print('\t\t' + output[idx+4].split('(')[0]) + print('\t\t' + output[idx+6].split('(')[0]) + print('\t\t' + output[idx+7].split('(')[0]) + print('\t\t' + output[idx+9].split('(')[0]) + print('\t\t' + output[idx+11].split('(')[0]) + print('\t\t' + output[idx+13].split('(')[0]) + print('\t\t' + output[idx+14].split('(')[0]) + print('\t\t' + output[idx+16].split('(')[0]) + print('\t\t' + output[idx+17].split('(')[0]) + print('\t\t' + 'Airflow:\t\t ' + direction) + idx += 1 + idx = 0 + with open('/sys/devices/platform/dell-s3248t-cpld.0/psu1_prs') as f: + line = f.readline() + found_psu2 = int(line, 0) + if not found_psu2: + print('\tPSU2:\tNot Present') + else: + for line in output: + if line.startswith('dps460-i2c-11'): + with open('/sys/devices/platform/dell-s3248t-cpld.0/psu1_status') as f: + line = f.readline() + status = int(line, 0) + if not status: + print('\tPSU2:\tNot OK') + break + print('\tPSU2:') + with open('/sys/bus/i2c/devices/11-0056/eeprom', encoding="ISO-8859-1") as f: + line = f.readline() + direction = 'Exhaust' if 'FORWARD' in line else 'Intake' + print('\t\t' + output[idx+2].split('(')[0]) + print('\t\t' + output[idx+4].split('(')[0]) + print('\t\t' + output[idx+6].split('(')[0]) + print('\t\t' + output[idx+7].split('(')[0]) + print('\t\t' + output[idx+9].split('(')[0]) + print('\t\t' + output[idx+11].split('(')[0]) + print('\t\t' + output[idx+13].split('(')[0]) + print('\t\t' + output[idx+14].split('(')[0]) + print('\t\t' + output[idx+16].split('(')[0]) + print('\t\t' + output[idx+17].split('(')[0]) + print('\t\t' + 'Airflow:\t\t ' + direction) + idx += 1 + +except subprocess.CalledProcessError as err: + print("Exception when calling get_sonic_error -> %s\n" %(err)) + rc = err.returncode diff --git a/platform/broadcom/sonic-platform-modules-dell/s3248t/scripts/portiocfg.py b/platform/broadcom/sonic-platform-modules-dell/s3248t/scripts/portiocfg.py new file mode 100755 index 00000000000..757dd58515e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s3248t/scripts/portiocfg.py @@ -0,0 +1,110 @@ +#!/usr/bin/python3 +# Copyright (c) 2015 Dell Inc. +# +# Licensed under the Apache License, Version 2.0 (the "License"); you may +# not use this file except in compliance with the License. You may obtain +# a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 +# +# THIS CODE IS PROVIDED ON AN *AS IS* BASIS, WITHOUT WARRANTIES OR +# CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED, INCLUDING WITHOUT +# LIMITATION ANY IMPLIED WARRANTIES OR CONDITIONS OF TITLE, FITNESS +# FOR A PARTICULAR PURPOSE, MERCHANTABLITY OR NON-INFRINGEMENT. +# +# See the Apache Version 2.0 License for specific language governing +# permissions and limitations under the License. +# +""" + Script to read/write the portio based registers +""" + +import sys +import os +import getopt +import struct + +resource = '/dev/port' + +def usage(): + ''' This is the Usage Method ''' + + print('\t\t portiocfg.py --default') + print('\t\t portiocfg.py --get --offset ') + print('\t\t portiocfg.py --set --val --offset ') + sys.exit(1) + +def portio_reg_read(resource, offset): + """ Port IO register read """ + file_des = os.open(resource, os.O_RDONLY) + if file_des < 0: + print('file open failed %s"%resource') + return + if os.lseek(file_des, offset, os.SEEK_SET) != offset: + print('lseek failed on %s'%resource) + return + buf = os.read(file_des, 1) + reg_val1 = ord(buf) + print('reg value %x'%reg_val1) + os.close(file_des) + +def portio_reg_write(resource, offset, val): + """ Port IO register write """ + file_des = os.open(resource, os.O_RDWR) + if file_des < 0: + print('file open failed %s"%resource') + return + if os.lseek(file_des, offset, os.SEEK_SET) != offset: + print('lseek failed on %s'%resource) + return + ret = os.write(file_des, struct.pack('B', val)) + if ret != 1: + print('write failed %d'%ret) + return + os.close(file_des) + +def main(argv): + + ''' The main function will read the user input from the + command line argument and process the request ''' + + opts = '' + val = '' + choice = '' + resource = '' + offset = '' + + try: + opts, args = getopt.getopt(argv, "hgs:", \ + ["val=", "offset=", "help", "get", "set"]) + + except getopt.GetoptError: + usage() + + for opt, arg in opts: + + if opt in ('-h', '--help'): + choice = 'help' + + elif opt in ('-g', '--get'): + choice = 'get' + + elif opt in ('-s', '--set'): + choice = 'set' + + elif opt == '--offset': + offset = int(arg, 16) + + elif opt == '--val': + val = int(arg, 16) + + if choice == 'get' and offset != '': + portio_reg_read(resource, offset) + + elif choice == 'set' and offset != '' and val != '': + portio_reg_write(resource, offset, val) + + else: + usage() + +#Calling the main method +if __name__ == "__main__": + main(sys.argv[1:]) diff --git a/platform/broadcom/sonic-platform-modules-dell/s3248t/scripts/s3248t_platform.sh b/platform/broadcom/sonic-platform-modules-dell/s3248t/scripts/s3248t_platform.sh new file mode 100755 index 00000000000..f34de0aa051 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s3248t/scripts/s3248t_platform.sh @@ -0,0 +1,156 @@ +#!/bin/bash + +# Platform init script for Dell S3248T + +source dell_i2c_utils.sh + +SONIC_VERSION=$(cat /etc/sonic/sonic_version.yml | grep "build_version" | sed -e "s/build_version: //g;s/'//g") +FIRST_BOOT_FILE="/host/image-${SONIC_VERSION}/platform/firsttime" + +#Attach/Detach the system devices +sys_devices() { + case $1 in + "new_device") #syseeprom + i2c_config "echo 24c02 0x50 > /sys/bus/i2c/devices/i2c-2/$1" + #Attach Fan Controller + i2c_config "echo emc2305 0x2c > /sys/bus/i2c/devices/i2c-7/$1" + #Attach temperature monitor + i2c_config "echo tmp75 0x48 > /sys/bus/i2c/devices/i2c-7/$1" + i2c_config "echo tmp75 0x49 > /sys/bus/i2c/devices/i2c-7/$1" + i2c_config "echo tmp75 0x4a > /sys/bus/i2c/devices/i2c-7/$1" + i2c_config "echo tmp75 0x4b > /sys/bus/i2c/devices/i2c-7/$1" + i2c_config "echo tmp75 0x4c > /sys/bus/i2c/devices/i2c-7/$1" + i2c_config "echo tmp75 0x4f > /sys/bus/i2c/devices/i2c-7/$1" + ;; + "delete_device") i2c_config "echo 0x50 > /sys/bus/i2c/devices/i2c-2/$1" + i2c_config "echo 0x2c > /sys/bus/i2c/devices/i2c-7/$1" + i2c_config "echo 0x48 > /sys/bus/i2c/devices/i2c-7/$1" + i2c_config "echo 0x49 > /sys/bus/i2c/devices/i2c-7/$1" + i2c_config "echo 0x4a > /sys/bus/i2c/devices/i2c-7/$1" + i2c_config "echo 0x4b > /sys/bus/i2c/devices/i2c-7/$1" + i2c_config "echo 0x4c > /sys/bus/i2c/devices/i2c-7/$1" + i2c_config "echo 0x4f > /sys/bus/i2c/devices/i2c-7/$1" + ;; + *) echo "s3248t_platform: main_board_mux : invalid command !" + ;; + esac +} + +#Attach/Detach the SFP modules on PCA9548_2 +switch_board_sfp() { + case $1 in + "new_device") i2c_config "echo optoe2 0x50 > /sys/bus/i2c/devices/i2c-20/$1" + i2c_config "echo optoe2 0x50 > /sys/bus/i2c/devices/i2c-21/$1" + i2c_config "echo optoe2 0x50 > /sys/bus/i2c/devices/i2c-22/$1" + i2c_config "echo optoe2 0x50 > /sys/bus/i2c/devices/i2c-23/$1" + i2c_config "echo optoe1 0x50 > /sys/bus/i2c/devices/i2c-24/$1" + i2c_config "echo optoe1 0x50 > /sys/bus/i2c/devices/i2c-25/$1" + ;; + "delete_device") i2c_config "echo 0x50 > /sys/bus/i2c/devices/i2c-20/$1" + i2c_config "echo 0x50 > /sys/bus/i2c/devices/i2c-21/$1" + i2c_config "echo 0x50 > /sys/bus/i2c/devices/i2c-22/$1" + i2c_config "echo 0x50 > /sys/bus/i2c/devices/i2c-23/$1" + i2c_config "echo 0x50 > /sys/bus/i2c/devices/i2c-24/$1" + i2c_config "echo 0x50 > /sys/bus/i2c/devices/i2c-25/$1" + ;; + "media_down") + for ((i=20;i<=23;i++)); + do + # Tx disable for 10G BaseT copper optics + eeprom=/sys/bus/i2c/devices/i2c-$i/$i-0050/eeprom + + # Gen2 or Gen3 copper optics + # Check for F10 encoding (starts with '0f10' or 'df10') at offset 96 and 7 byte size + # and then compare the 'product id' but skip other part of F10 string + f10_encoding=`hexdump -n7 -s96 $eeprom -e'7/1 "%02x"' 2>&1` + if [[ $f10_encoding =~ ^[0d]f10....28....|^[0d]f10....29....|^[0d]f10..1111.... ]]; then + cmd="\x01\x00\x09\x00\x01\x02" + echo -n -e $cmd | dd bs=1 count=6 of=$eeprom seek=506 obs=1 status=none + fi + done + ;; + *) echo "s3248t_platform: switch_board_sfp: invalid command !" + ;; + esac +} + +#Forcibly bring quad-port phy out of reset for 48-1G port functionality + +platform_firmware_versions() { + +FIRMWARE_VERSION_FILE=/var/log/firmware_versions +rm -rf ${FIRMWARE_VERSION_FILE} +# Get BIOS version +echo "BIOS: `dmidecode -s system-version `" > $FIRMWARE_VERSION_FILE +# Get CPU CPLD version +echo "CPU CPLD: $((`cat /sys/devices/platform/dell-s3248t-cpld.0/cpu_cpld_mjr_ver`)).$((`cat /sys/devices/platform/dell-s3248t-cpld.0/cpu_cpld_mnr_ver`))" >> $FIRMWARE_VERSION_FILE +# Get SYS CPLD version +echo "SYS CPLD: $((`cat /sys/devices/platform/dell-s3248t-cpld.0/sys_cpld_mjr_ver`)).$((`cat /sys/devices/platform/dell-s3248t-cpld.0/sys_cpld_mnr_ver`))" >> $FIRMWARE_VERSION_FILE + +} + +install_python_api_package() { + device="/usr/share/sonic/device" + platform=$(/usr/local/bin/sonic-cfggen -H -v DEVICE_METADATA.localhost.platform) + + pip3 install $device/$platform/sonic_platform-1.0-py3-none-any.whl +} + +remove_python_api_package() { + rv=$(pip3 show sonic-platform > /dev/null 2>/dev/null) + if [ $? -eq 0 ]; then + rv=$(pip3 uninstall -y sonic-platform > /dev/null 2>/dev/null) + fi +} + +get_reboot_cause() { + REBOOT_REASON_FILE="/host/reboot-cause/platform/reboot_reason" + mkdir -p $(dirname $REBOOT_REASON_FILE) + + # Handle First Boot into software version with reboot cause determination support + if [[ ! -e $REBOOT_REASON_FILE ]]; then + echo "0x0" > $REBOOT_REASON_FILE + else + cat /sys/devices/platform/dell-s3248t-cpld.0/reboot_cause > $REBOOT_REASON_FILE + fi + echo "0x0" > /sys/devices/platform/dell-s3248t-cpld.0/reboot_cause +} + + +if [[ "$1" == "init" ]]; then + if [ -f $FIRST_BOOT_FILE ]; then + systemctl enable system-health.service + systemctl start --no-block system-health.service + fi + modprobe i2c-dev + modprobe i2c-mux-pca954x + modprobe pmbus + modprobe emc2305 + modprobe dell_s3248t_platform + + sys_devices "new_device" + get_reboot_cause + switch_board_sfp "new_device" + switch_board_sfp "media_down" + echo 0xf0 > /sys/devices/platform/dell-s3248t-cpld.0/sfp_txdis + echo 0xf3 > /sys/devices/platform/dell-s3248t-cpld.0/qsfp_rst + echo 0x00 > /sys/devices/platform/dell-s3248t-cpld.0/qsfp_lpmode + install_python_api_package + platform_firmware_versions +elif [[ "$1" == "deinit" ]]; then + switch_board_sfp "media_down" + switch_board_sfp "delete_device" + sys_devices "delete_device" + + modprobe -r dell_s3248t_platform + + modprobe -r emc2305 + modprobe -r pmbus + modprobe -r i2c-mux-pca954x + modprobe -r i2c-dev + remove_python_api_package +elif [ "$1" == "media_down" ]; then + switch_board_sfp $1 +else + echo "s3248t_platform : Invalid option !" +fi diff --git a/platform/broadcom/sonic-platform-modules-dell/s3248t/scripts/sensors b/platform/broadcom/sonic-platform-modules-dell/s3248t/scripts/sensors new file mode 100755 index 00000000000..572b9d45e9e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s3248t/scripts/sensors @@ -0,0 +1,8 @@ +#!/bin/bash +#docker exec -i pmon sensors "$@" +docker exec -i pmon /usr/bin/platform_sensors.py "$@" + +#To probe sensors not part of lm-sensors +#if [ -r /usr/local/bin/platform_sensors.py ]; then +# python /usr/local/bin/platform_sensors.py +#fi diff --git a/platform/broadcom/sonic-platform-modules-dell/s3248t/setup.py b/platform/broadcom/sonic-platform-modules-dell/s3248t/setup.py new file mode 120000 index 00000000000..4f6de9941d9 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s3248t/setup.py @@ -0,0 +1 @@ +../s6100/setup.py \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-dell/s3248t/sonic_platform/__init__.py b/platform/broadcom/sonic-platform-modules-dell/s3248t/sonic_platform/__init__.py new file mode 100644 index 00000000000..86021fd2f54 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s3248t/sonic_platform/__init__.py @@ -0,0 +1,8 @@ +""" + Module sonic_platform provides the platform dependent population of + platform.py, chassis.py, component.py, sfp.py, thermal.py, psu.py, + fan.py and watchdog.py +""" +__all__ = ["platform", "chassis", "sfp", "eeprom", "component", "thermal", + "psu", "fan", "watchdog", "fan_drawer"] +from sonic_platform import * diff --git a/platform/broadcom/sonic-platform-modules-dell/s3248t/sonic_platform/chassis.py b/platform/broadcom/sonic-platform-modules-dell/s3248t/sonic_platform/chassis.py new file mode 100644 index 00000000000..57e6f7e9560 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s3248t/sonic_platform/chassis.py @@ -0,0 +1,494 @@ +""" + DELL S3248T + + Module contains an implementation of SONiC Platform Base API and + provides the platform information + +""" + +try: + import os + import sys + import time + from sonic_platform_base.chassis_base import ChassisBase + from sonic_platform.sfp import Sfp + from sonic_platform.eeprom import Eeprom + from sonic_platform.component import Component + from sonic_platform.psu import Psu + from sonic_platform.thermal import Thermal + from sonic_platform.watchdog import Watchdog + from sonic_platform.fan_drawer import FanDrawer +except ImportError as err: + raise ImportError(str(err) + "- required module not found") + + +MAX_S3248T_FANTRAY = 3 +MAX_S3248T_FAN = 1 +MAX_S3248T_PSU = 2 +MAX_S3248T_THERMAL = 6 +MAX_S3248T_COMPONENT = 4 # BIOS, CPU CPLD, SYS CPLD and PCIe +MAX_THERMAL_LEVEL = 4 + +class Chassis(ChassisBase): + """ + DELL Platform-specific Chassis class + """ + REBOOT_CAUSE_PATH = "/host/reboot-cause/platform/reboot_reason" + CPLD_DIR = '/sys/devices/platform/dell-s3248t-cpld.0/' + + _global_port_pres_dict = {} + + _sfpp_port_to_i2c_mapping = { + 49: 20, + 50: 21, + 51: 22, + 52: 23, + 53: 24, + 54: 25, + } + + SYSTEM_LED_COLORS = { + "green", + "blink_green", + "yellow", + "blink_yellow" + } + + FAN_LED_COLORS = { + "off", + "green", + "blink_yellow" + } + + def __init__(self): + ChassisBase.__init__(self) + # sfp.py will read eeprom contents and retrive the eeprom data. + # We pass the eeprom path from chassis.py + self.PORT_START = 1 + self.PORT_END = 54 + self.PORTS_IN_BLOCK = (self.PORT_END + 1) + self.SFP_PORT_START = 49 + self._sfp_port = range(self.SFP_PORT_START, self.PORTS_IN_BLOCK) + eeprom_base = "/sys/class/i2c-adapter/i2c-{0}/{0}-0050/eeprom" + for index in range(self.PORT_START, self.PORTS_IN_BLOCK): + eeprom_path = '' + if index in self._sfp_port: + eeprom_path = eeprom_base.format(self._sfpp_port_to_i2c_mapping[index]) + + if index < self.SFP_PORT_START: + port_type = 'None' + elif self.SFP_PORT_START <= index < 53: + port_type = 'SFP' + else: + port_type = 'QSFP' + + sfp_node = Sfp(index, port_type, eeprom_path) + self._sfp_list.append(sfp_node) + + self._eeprom = Eeprom() + self._watchdog = Watchdog() + self._num_sfps = 54 + self._num_fans = MAX_S3248T_FANTRAY * MAX_S3248T_FAN + for k in range(MAX_S3248T_FANTRAY): + fandrawer = FanDrawer(k) + self._fan_drawer_list.append(fandrawer) + self._fan_list.extend(fandrawer._fan_list) + + for fan in self._fan_list: + if fan.get_presence(): + airflow_dir = fan.get_direction() + break + + self._psu_list = [Psu(i) for i in range(MAX_S3248T_PSU)] + self._thermal_list = [Thermal(i, airflow_dir) for i in range(MAX_S3248T_THERMAL)] + self._component_list = [Component(i) for i in range(MAX_S3248T_COMPONENT)] + + self._watchdog = Watchdog() + self.sys_ledcolor = None + self.status_led_reg = "system_led" + self.primary_led_reg = "primary_led" + self.fan_led_reg = "fan_led" + self.power_led_reg = "power_led" + self.locator_led_reg = "locator_led" + self.LOCATOR_LED_ON = "blink_blue" + self.LOCATOR_LED_OFF = self.STATUS_LED_COLOR_OFF + + #Initialize the primary led to green + self._set_cpld_register(self.primary_led_reg, "green") + + def _get_cpld_register(self, reg_name): + # On successful read, returns the value read from given + # reg name and on failure rethrns 'ERR' + cpld_reg_file = self.CPLD_DIR + '/' + reg_name + try: + with open(cpld_reg_file, 'r') as file_desc: + ret_val = file_desc.read() + except IOError: + return 'ERR' + return ret_val.strip('\r\n').lstrip(' ') + + def _set_cpld_register(self, reg_name, value): + # On successful write, returns the value will be written on + # reg_name and on failure returns 'ERR' + ret_val = 'ERR' + cpld_reg_file = self.CPLD_DIR + '/' + reg_name + + if not os.path.isfile(cpld_reg_file): + return ret_val + + try: + with open(cpld_reg_file, 'w') as file_desc: + ret_val = file_desc.write(str(value)) + except IOError: + ret_val = 'ERR' + + return ret_val + +# check for this event change for sfp / do we need to handle timeout/sleep + + def get_change_event(self, timeout=0): + """ + Returns a nested dictionary containing all devices which have + experienced a change at chassis level + """ + start_ms = time.time() * 1000 + port_dict = {} + change_dict = {} + change_dict['sfp'] = port_dict + if not self._global_port_pres_dict: + for port_num in self._sfp_port: + presence = self.get_sfp(port_num).get_presence() + self._global_port_pres_dict[port_num] = '1' if presence else '0' + + while True: + time.sleep(0.5) + for port_num in self._sfp_port: + # sfp get uses zero-indexing, but port numbers start from 1 + presence = self.get_sfp(port_num).get_presence() + if presence and self._global_port_pres_dict[port_num] == '0': + self._global_port_pres_dict[port_num] = '1' + port_dict[port_num] = '1' + elif not presence and self._global_port_pres_dict[port_num] == '1': + self._global_port_pres_dict[port_num] = '0' + port_dict[port_num] = '0' + + if len(port_dict) > 0: + return True, change_dict + + if timeout: + now_ms = time.time() * 1000 + if now_ms - start_ms >= timeout: + return True, change_dict + + def get_sfp(self, index): + """ + Retrieves sfp represented by (0-based) index + + Args: + index: An integer, the index (0-based) of the sfp to retrieve. + The index should be the sequence of a physical port in a chassis, + starting from 0. + For example, 0 for Ethernet0, 1 for Ethernet4 and so on. + + Returns: + An object dervied from SfpBase representing the specified sfp + """ + sfp = None + + try: + # The index will start from 0 + sfp = self._sfp_list[index-1] + except IndexError: + sys.stderr.write(f"SFP index {index} out of range (0-{len(self._sfp_list)})\n") + return sfp + + def initizalize_system_led(self): + """ Initialize system LED """ + self.sys_ledcolor = "green" + + def get_status_led(self): + """ + Gets the current system LED color + + Returns: + A string that represents the supported color + """ + color = self._get_cpld_register(self.status_led_reg) + + if color not in list(self.SYSTEM_LED_COLORS): + return self.sys_ledcolor + + return color + + def set_status_led(self, color): + """ + Set system LED status based on the color type passed in the argument. + Argument: Color to be set + Returns: + bool: True is specified color is set, Otherwise return False + """ + if color not in list(self.SYSTEM_LED_COLORS): + return False + if(not self._set_cpld_register(self.status_led_reg, color)): + return False + + self.sys_ledcolor = color + return True + + def get_fan_status_led(self): + """ + Gets the current fan status LED color + + Returns: + A string that represents the supported color + """ + color = self._get_cpld_register(self.fan_led_reg) + + return color + + def set_fan_status_led(self, color): + """ + Set fan status LED based on the color type passed in the argument. + Argument: Color to be set + Returns: + bool: True is specified color is set, Otherwise return False + """ + if color not in list(self.FAN_LED_COLORS): + return False + if(not self._set_cpld_register(self.fan_led_reg, color)): + return False + + return True + + @staticmethod + def get_thermal_manager(): + """ Returns thermal manager instance """ + from .thermal_manager import ThermalManager + return ThermalManager + + def set_thermal_shutdown_threshold(self): + """ Set the thermal shutdown threshold values """ + for thermal in self._thermal_list: + thermal.set_tlow_threshold() + thermal.set_thigh_threshold() + + def get_name(self): + """ + Retrieves the name of the chassis + Returns: + string: The name of the chassis + """ + return self._eeprom.modelstr() + + @staticmethod + def get_presence(): + """ + Retrieves the presence of the chassis + Returns: + bool: True if chassis is present, False if not + """ + return True + + def get_model(self): + """ + Retrieves the model number (or part number) of the chassis + Returns: + string: Model/part number of chassis + """ + return self._eeprom.part_number_str() + + def get_serial(self): + """ + Retrieves the serial number of the chassis (Service tag) + Returns: + string: Serial number of chassis + """ + return self._eeprom.serial_str() + + @staticmethod + def get_status(): + """ + Retrieves the operational status of the chassis + Returns: + bool: A boolean value, True if chassis is operating properly + False if not + """ + return True + + def get_base_mac(self): + """ + Retrieves the base MAC address for the chassis + Returns: + A string containing the MAC address in the format + 'XX:XX:XX:XX:XX:XX' + """ + return self._eeprom.base_mac_addr('') + + def get_serial_number(self): + """ + Retrieves the hardware serial number for the chassis + Returns: + A string containing the hardware serial number for this chassis. + """ + return self._eeprom.serial_number_str() + + def get_system_eeprom_info(self): + """ + Retrieves the full content of system EEPROM information for the chassis + Returns: + A dictionary where keys are the type code defined in + OCP ONIE TlvInfo EEPROM format and values are their corresponding + values. + """ + return self._eeprom.system_eeprom_info() + + def get_reboot_cause(self): + """ + Retrieves the cause of the previous reboot + The order of interpretation is important and it is as per the HW designer. + If you need to alter this please consult HW team before doing so. + Returns: + A tuple (string, string) where the first element is a string + containing the cause of the previous reboot. This string must be + one of the predefined strings in this class. If the first string + is "REBOOT_CAUSE_HARDWARE_OTHER", the second string can be used + to pass a description of the reboot cause. + """ + + try: + with open(self.REBOOT_CAUSE_PATH) as file_desc: + reset_reason = int(file_desc.read(), 16) + except IOError: + return(ChassisBase.REBOOT_CAUSE_NON_HARDWARE, None) + + if reset_reason & 0x01: + return (ChassisBase.REBOOT_CAUSE_POWER_LOSS, 'Power-On-Reset') + elif reset_reason & 0x02: + return (ChassisBase.REBOOT_CAUSE_POWER_LOSS, 'Power-Error-Reset') + elif reset_reason & 0x10: + return(ChassisBase.REBOOT_CAUSE_WATCHDOG, 'HW Watchdog Triggered') + elif reset_reason & 0x08: + return(ChassisBase.REBOOT_CAUSE_THERMAL_OVERLOAD_CPU, 'CPU Thermal Trip') + elif reset_reason & 0x20: + return(ChassisBase.REBOOT_CAUSE_THERMAL_OVERLOAD_OTHER, 'Thermal Shutdown') + elif reset_reason & 0x04: + return (ChassisBase.REBOOT_CAUSE_NON_HARDWARE, 'Shutdown by CPU') + elif reset_reason & 0x80: + return (ChassisBase.REBOOT_CAUSE_NON_HARDWARE, 'Cold Reset') + elif reset_reason & 0x40: + return (ChassisBase.REBOOT_CAUSE_NON_HARDWARE, 'Warm Reset') + else: + return (ChassisBase.REBOOT_CAUSE_NON_HARDWARE, None) + + def get_eeprom(self): + """ + Retrieves the Sys Eeprom instance for the chassis. + Returns : + The instance of the Sys Eeprom + """ + return self._eeprom + + def get_num_fans(self): + """ + Retrives the number of Fans on the chassis. + Returns : + An integer represents the number of Fans on the chassis. + """ + return self._num_fans + + def get_num_sfps(self): + """ + Retrives the number of media on the chassis. + Returns: + An integer represences the number of SFPs on the chassis. + """ + return self._num_sfps + + def set_locator_led(self, color): + """ + Sets the state of the Chassis Locator LED + + Args: + color: A string representing the color with which to set the Chassis Locator LED + + Returns: + bool: True if the Chassis Locator LED state is set successfully, False if not + + """ + if color in (self.LOCATOR_LED_ON, self.LOCATOR_LED_OFF): + ret_val = self._set_cpld_register(self.locator_led_reg, color) + if ret_val != 'ERR': + return True + return False + + def get_locator_led(self): + """ + Gets the state of the Chassis Locator LED + + Returns: + LOCATOR_LED_ON or LOCATOR_LED_OFF + """ + loc_led = self._get_cpld_register(self.locator_led_reg) + if loc_led != 'ERR': + # Actually driver returns the color code 'blink_blue' + # Returning "blue_blink" to make it common to all platforms output + if loc_led == self.LOCATOR_LED_ON: + self.LOCATOR_LED_ON = self.STATUS_LED_COLOR_BLUE_BLINK + return self.LOCATOR_LED_ON + return self.LOCATOR_LED_OFF + + @staticmethod + def is_over_temperature(thermal_level_list): + """ + Check the switch reaches its shutdown temperature + + Args: + thermal_level_list: Temperature sensors thermal level list + + Returns: + True if any of the thermal sensor reaches its thermal shutdown threshold + + """ + thermal_level = max(thermal_level_list) + return thermal_level == MAX_THERMAL_LEVEL + + @staticmethod + def thermal_shutdown(): + """ + Software initiated thermal shutdown + + Return: + None + """ + # For SW thermal shutdown case we need to set the SYS_CTRL (bit 1) register in + # system CPLD to power down the system. SW thermal shutdown initiated when the + # NPU internal thermal sensors exceeds the thermal shutdown threshold. + # NPU thermal monitoring needs to be implemented + return + + def get_position_in_parent(self): + """ + Retrieves 1-based relative physical position in parent device. + Returns: + integer: The 1-based relative physical position in parent + device or -1 if cannot determine the position + """ + return -1 + + def is_replaceable(self): + """ + Indicate whether Chassis is replaceable. + Returns: + bool: True if it is replaceable. + """ + return False + + def get_revision(self): + """ + Retrives the hardware revision of the device + + Returns: + string: Revision value of device + """ + return self._eeprom.revision_str() + diff --git a/platform/broadcom/sonic-platform-modules-dell/s3248t/sonic_platform/component.py b/platform/broadcom/sonic-platform-modules-dell/s3248t/sonic_platform/component.py new file mode 100644 index 00000000000..58287d1f051 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s3248t/sonic_platform/component.py @@ -0,0 +1,166 @@ +""" + DELL S3248T + + Module contains an implementation of SONiC Platform Base API and + provides the Components' (e.g., BIOS, CPLD, FPGA, etc.) available in + the platform +""" + +try: + import re + import subprocess + from sonic_platform_base.component_base import ComponentBase + +except ImportError as err: + raise ImportError(str(err) + "- required module not found") + +def get_bios_version(): + """ Returns BIOS Version """ + bios_ver = '' + try: + bios_ver = subprocess.check_output(['dmidecode', '-s', 'system-version'], + universal_newlines=True).strip() + except (FileNotFoundError, subprocess.CalledProcessError): + pass + return bios_ver + +def get_cpld_version(cpld): + """ Returns CPLD version """ + cpld_version = '' + try: + major = subprocess.check_output( + ['cat', '/sys/devices/platform/dell-s3248t-cpld.0/' + cpld + '_mjr_ver'] + ).decode('utf-8').strip()[2:] + minor = subprocess.check_output( + ['cat', '/sys/devices/platform/dell-s3248t-cpld.0/' + cpld + '_mnr_ver'] + ).decode('utf-8').strip()[2:] + cpld_version = major + '.' + minor + except (FileNotFoundError, subprocess.CalledProcessError): + pass + return cpld_version + +def _get_pcie_fw_version(): + """ Returns PCIe Firmware Version """ + pcie_ver = '' + try: + cmd_out = subprocess.check_output(['bcmcmd', "pciephy fw version"], + universal_newlines=True).strip() + result = re.search(r'(?<=PCIe FW loader version:).*', cmd_out) + if result is not None: + pcie_ver = result.group(0).strip() + except (FileNotFoundError, subprocess.CalledProcessError): + pass + + return pcie_ver + +class Component(ComponentBase): + """Dell Platform-specific Component class""" + + CHASSIS_COMPONENTS = [ + ['BIOS', + 'Performs initialization of hardware components during booting', + get_bios_version() + ], + ['CPU CPLD', + 'Used for managing the CPU power sequence and CPU states', + get_cpld_version('cpu_cpld') + ], + ['SYS CPLD', + 'Used for managing FAN, PSU, SFP modules (1-48) SFP Plus modules (49-52)', + get_cpld_version('sys_cpld') + ], + ['PCIe', + 'ASIC PCIe firmware', + _get_pcie_fw_version() + ] + ] + + def __init__(self, component_index=0): + self.index = component_index + self.name = self.CHASSIS_COMPONENTS[self.index][0] + self.description = self.CHASSIS_COMPONENTS[self.index][1] + self.version = self.CHASSIS_COMPONENTS[self.index][2] + + def get_name(self): + """ + Retrieves the name of the component + Returns: + A string containing the name of the component + """ + return self.name + + def get_description(self): + """ + Retrieves the description of the component + Returns: + A string containing the description of the component + """ + return self.description + + def get_firmware_version(self): + """ + Retrieves the firmware version of the component + Returns: + A string containing the firmware version of the component + """ + return self.version + + @staticmethod + def install_firmware(image_path): + """ + Installs firmware to the component + Args: + image_path: A string, path to firmware image + Returns: + A boolean, True if install was successful, False if not + """ + return False + + def get_presence(self): + """ + Retrieves the presence of the component + Returns: + bool: True if present, False if not + """ + return True + + def get_model(self): + """ + Retrieves the part number of the component + Returns: + string: Part number of component + """ + return 'NA' + + def get_serial(self): + """ + Retrieves the serial number of the component + Returns: + string: Serial number of component + """ + return 'NA' + + def get_status(self): + """ + Retrieves the operational status of the component + Returns: + bool: True if component is operating properly, False if not + """ + return True + + def get_position_in_parent(self): + """ + Retrieves 1-based relative physical position in parent device. + Returns: + integer: The 1-based relative physical position in parent + device or -1 if cannot determine the position + """ + return -1 + + def is_replaceable(self): + """ + Indicate whether component is replaceable. + Returns: + bool: True if it is replaceable. + """ + return False diff --git a/platform/broadcom/sonic-platform-modules-dell/s3248t/sonic_platform/eeprom.py b/platform/broadcom/sonic-platform-modules-dell/s3248t/sonic_platform/eeprom.py new file mode 100644 index 00000000000..f3017277179 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s3248t/sonic_platform/eeprom.py @@ -0,0 +1,125 @@ +""" + Dell S3248T + + Platform and model specific eeprom subclass, inherits from the base class, + and provides the followings: + - the eeprom format definition + - specific encoder/decoder if there is special need +""" + +try: + import os.path + import syslog + from sonic_eeprom import eeprom_tlvinfo +except ImportError as err: + raise ImportError(str(err) + "- required module not found") + + +class Eeprom(eeprom_tlvinfo.TlvInfoDecoder): + """ Platform-specific EEPROM class """ + _TLV_DISPLAY_VENDOR_EXT = True + + def __init__(self): + self.eeprom_path = None + file_path = '/sys/class/i2c-adapter/i2c-2/2-0050/eeprom' + if not os.path.exists(file_path): + return + self.eeprom_path = file_path + super(Eeprom, self).__init__(self.eeprom_path, 0, '', True) + self.eeprom_tlv_dict = dict() + try: + self.eeprom_data = self.read_eeprom() + except: + self.eeprom_data = "N/A" + raise RuntimeError("EEPROM is not Programmed") + + eeprom = self.eeprom_data + + if not self.is_valid_tlvinfo_header(eeprom): + syslog.syslog(syslog.LOG_ERR, "Not valid tlvinfo header") + return + + total_length = (eeprom[9] << 8) | eeprom[10] + tlv_index = self._TLV_INFO_HDR_LEN + tlv_end = self._TLV_INFO_HDR_LEN + total_length + + while (tlv_index + 2) < len(eeprom) and tlv_index < tlv_end: + if not self.is_valid_tlv(eeprom[tlv_index:]): + break + + tlv = eeprom[tlv_index:tlv_index + 2 + eeprom[tlv_index + 1]] + code = "0x%02X" % (tlv[0]) + name, value = self.decoder(None, tlv) + + self.eeprom_tlv_dict[code] = value + if eeprom[tlv_index] == self._TLV_CODE_CRC_32: + break + + tlv_index += eeprom[tlv_index+1] + 2 + + def serial_number_str(self): + """ + Returns the serial number + """ + (is_valid, results) = self.get_tlv_field(self.eeprom_data, self._TLV_CODE_SERIAL_NUMBER) + if not is_valid: + return "N/A" + return results[2].decode('ascii') + + def base_mac_addr(self, eeprom): + """ + Returns the base mac address found in the system EEPROM + """ + (is_valid, tlv) = self.get_tlv_field(self.eeprom_data, self._TLV_CODE_MAC_BASE) + if not is_valid or tlv[1] != 6: + return super(eeprom_tlvinfo.TlvInfoDecoder, self).switchaddrstr(tlv) + + return ":".join([f"{T:02x}" for T in tlv[2]]).upper() + + def modelstr(self): + """ + Returns the Model name + """ + (is_valid, results) = self.get_tlv_field(self.eeprom_data, self._TLV_CODE_PRODUCT_NAME) + if not is_valid: + return "N/A" + + return results[2].decode('ascii') + + def part_number_str(self): + """ + Returns the part number + """ + (is_valid, results) = self.get_tlv_field(self.eeprom_data, self._TLV_CODE_PART_NUMBER) + if not is_valid: + return "N/A" + + return results[2].decode('ascii') + + def serial_str(self): + """ + Returns the servicetag number + """ + (is_valid, results) = self.get_tlv_field(self.eeprom_data, self._TLV_CODE_SERIAL_NUMBER) + if not is_valid: + return "N/A" + + return results[2].decode('ascii') + + def revision_str(self): + """ + Returns the device revision + """ + (is_valid, results) = self.get_tlv_field(self.eeprom_data, self._TLV_CODE_LABEL_REVISION) + if not is_valid: + return "N/A" + + return results[2].decode('ascii') + + def system_eeprom_info(self): + """ + Returns a dictionary, where keys are the type code defined in + ONIE EEPROM format and values are their corresponding values + found in the system EEPROM. + """ + return self.eeprom_tlv_dict diff --git a/platform/broadcom/sonic-platform-modules-dell/s3248t/sonic_platform/fan.py b/platform/broadcom/sonic-platform-modules-dell/s3248t/sonic_platform/fan.py new file mode 100644 index 00000000000..a468dae1b38 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s3248t/sonic_platform/fan.py @@ -0,0 +1,378 @@ +""" + Dell S3248T + + Module contains an implementation of SONiC Platform Base API and + provides the Fans' information which are available in the platform. + +""" +try: + import os + import time + from sonic_platform_base.fan_base import FanBase +except ImportError as err: + raise ImportError(str(err) + "- required module not found") + +FAN_DIR_EEPROM_OFFSET = 0x4a +MAX_FANTRAY_FAN_SPEED = 28600 +MIN_FANTRAY_FAN_SPEED = 1920 +MAX_PSU_FAN_SPEED = 18000 +THERMAL_LEVEL_FAN_SPEED = (5720, 11440, 17160, 22880, 28600) +MAX_FAN_ON_RAMP_TIME = 90 # in seconds + +class Fan(FanBase): + """Dell Platform-specific Fan class""" + + def __init__(self, fantray_index=0, fan_index=0, psu_fan=False, dependency=None): + self.is_psu_fan = psu_fan + + if not self.is_psu_fan: + # API index is starting from 0, Dell platform index is + # starting from 1 + self.presence_reg = f"fan{fantray_index}_prs" + self.dir_reg = f"fan{fantray_index}_dir" + self.rpm_file = f"/sys/bus/i2c/devices/7-002c/fan{fantray_index+1}_input" + self.rpm_target_file = f"/sys/bus/i2c/devices/7-002c/fan{fantray_index+1}_target" + self.status_file = f"/sys/bus/i2c/devices/7-002c/fan{fantray_index+1}_fault" + self.eeprom = f"/sys/bus/i2c/devices/{15 + fantray_index}-0050/eeprom" + self.fantray_index = fantray_index + 1 + self.fan_index = fan_index + 1 + self.max_speed = MAX_FANTRAY_FAN_SPEED + self.thermal_level_to_speed = THERMAL_LEVEL_FAN_SPEED + self.last_speed_set_time = 0 + else: + self.psu_index = fan_index - 1 + self.presence_reg = f"psu{self.psu_index}_prs" + self.status_reg = f"psu{self.psu_index}_status" + self.dir_reg = "" + self.dps_hwmon = f"/sys/bus/i2c/devices/{self.psu_index + 10}-005e/hwmon/" + self.eeprom = f"/sys/bus/i2c/devices/{self.psu_index + 10}-0056/eeprom" + self.max_speed = MAX_PSU_FAN_SPEED + self.fan_index = fan_index + 1 + self.eeprom_exist = os.path.exists(self.eeprom) + + @staticmethod + def _get_cpld_register(reg_name): + # On successful read, returns the value read from given + # reg name and on failure rethrns 'ERR' + cpld_dir = "/sys/devices/platform/dell-s3248t-cpld.0/" + cpld_reg_file = cpld_dir + '/' + reg_name + try: + with open(cpld_reg_file, 'r') as file_desc: + buf = file_desc.read() + except (IOError, AttributeError): + return 'ERR' + return buf.strip('\r\n').lstrip(' ') + + def load_fan_module(self): + """ + Load fan driver module + """ + if not self.is_psu_fan: + drv_dir = "/sys/bus/i2c/devices/i2c-{0}/{0}-0050".format(15 + self.fantray_index - 1) + try: + if not os.path.exists(drv_dir): + file = "/sys/bus/i2c/devices/i2c-{}/new_device" \ + .format(15 + self.fantray_index - 1) + with open(file, 'w') as file_des: + file_des.write('24c02 0x50\n') + self.set_speed_rpm(MAX_FANTRAY_FAN_SPEED) + except (IOError, OSError): + pass + + def remove_fan_module(self): + """ + Remove fan driver module + """ + if not self.is_psu_fan: + drv_dir = "/sys/bus/i2c/devices/i2c-{0}/{0}-0050".format(15 + self.fantray_index - 1) + try: + if os.path.exists(drv_dir): + file = "/sys/bus/i2c/devices/i2c-{}/delete_device" \ + .format(15 + self.fantray_index - 1) + with open(file, 'w') as file_des: + file_des.write('0x50\n') + except (IOError, OSError): + pass + + def get_name(self): + """ + Retrieves the name of the device + Returns: + String: The name of the device + """ + if self.is_psu_fan: + return "PSU{} Fan".format(self.psu_index+1) + return "FanTray{}-Fan{}".format(self.fantray_index, self.fan_index) + + def get_model(self): + """ + Retrieves the part number of the FAN + Returns: + String: Part number of FAN + """ + try: + with open(self.eeprom, "rb") as file_desc: + val = file_desc.read()[13:19].decode("utf-8") + except IOError: + val = None + return val + + def get_serial(self): + """ + Retrieves the serial number of the FAN + Returns: + String: Serial number of FAN + """ + try: + with open(self.eeprom, "rb") as file_desc: + val = file_desc.read()[21:41].decode("utf-8") + except IOError: + val = None + return val + + def get_presence(self): + """ + Retrieves the presence of the FAN + Returns: + bool: True if fan is present, False if not + """ + presence = self._get_cpld_register(self.presence_reg) + if presence == 'ERR': + return False + status = self.get_status() + if int(presence, 0): + # Fan present but status not OK then remove fan driver module + if not status: + self.remove_fan_module() + self.eeprom_exist = False + return True + # Fan present but fan driver module not exist, load fan driver + if not self.eeprom_exist: + self.load_fan_module() + self.eeprom_exist = os.path.exists(self.eeprom) + return True + + # Fan absent but fan driver module exist, remove fan driver + if self.eeprom_exist: + self.remove_fan_module() + self.eeprom_exist = False + return False + + def get_status(self): + """ + Retrieves the operational status of the FAN + Returns: + bool: True if FAN is operating properly, False if not + """ + if not self.is_psu_fan: + with open(self.status_file, "rb") as file_desc: + status = file_desc.read() + if int(status, 0) == 1: + return False + return True + + status = self._get_cpld_register(self.status_reg) + if status == 'ERR': + return False + return bool(int(status, 0)) + + def get_direction(self): + """ + Retrieves the fan airfow direction + Returns: + A string, either FAN_DIRECTION_INTAKE or FAN_DIRECTION_EXHAUST + depending on fan direction + + Notes: + In DellEMC platforms, + - Forward/Exhaust : Air flows from Port side to Fan side. + - Reverse/Intake : Air flows from Fan side to Port side. + """ + try: + with open(self.eeprom, "rb") as filedes: + if not self.is_psu_fan: + val = filedes.read()[FAN_DIR_EEPROM_OFFSET] + # EEPROM is programmed with ASCII values. ASCII '0' (Decimal-48) + # means IO/PSU (Exhaust) and '1' means to PSU/IO (Intake) + direction = 'exhaust' if val == ord('0') else 'intake' + else: + val = filedes.read()[0xe1:0xe8].decode("utf-8") + direction = 'exhaust' if val == 'FORWARD' else 'intake' + + return direction + except IOError: + return None + + def get_speed(self): + """ + Retrieves the speed of the fan + Returns: + int: percentage of the max fan speed + """ + fan_speed = 0 + try: + if not self.is_psu_fan: + rpm_file = self.rpm_file + else: + dps_dir = self.dps_hwmon + '/' + os.listdir(self.dps_hwmon)[0] + rpm_file = dps_dir + '/' + 'fan1_input' + with open(rpm_file, "rb") as file_desc: + fan_speed = int(file_desc.read()) + except IOError: + return 0 + speed = (100 * fan_speed)//self.max_speed + return speed + + def get_speed_rpm(self): + """ + Retrieves the speed of the fan + Returns: + int: percentage of the max fan speed + """ + fan_speed = 0 + try: + fan_status = self.get_status() + if fan_status: + if not self.is_psu_fan: + rpm_file = self.rpm_file + else: + dps_dir = self.dps_hwmon + '/' + os.listdir(self.dps_hwmon)[0] + rpm_file = dps_dir + '/' + 'fan1_input' + with open(rpm_file, "rb") as file_desc: + fan_speed = int(file_desc.read()) + except IOError: + return 0 + return fan_speed + + def set_speed_rpm(self, speed): + """ + Set the speed of the fan + Returns: + bool: True in case of success. False otherwise + """ + try: + if not self.is_psu_fan: + rpm_file = self.rpm_target_file + with open(rpm_file, 'w') as fan_target: + fan_target.write(str(speed)) + self.last_speed_set_time = time.time() + + except IOError: + return False + return True + + @staticmethod + def set_status_led(color): + """ + S3248T switches doesn't have seperate LED for fan + """ + return False + + def get_target_speed(self): + """ + Retrieves the target speed of the fan + Returns: + int: percentage of the target fan speed + """ + fan_speed = 0 + try: + fan_status = self.get_status() + if fan_status: + if not self.is_psu_fan: + rpm_file = self.rpm_target_file + with open(rpm_file, "rb") as file_desc: + fan_speed = int(file_desc.read()) + else: + fan_speed = self.get_speed_rpm() + if fan_speed is None: + return 0 + else: + # Setting fan_speed to 0 is causing false fan high-speed alarm + # so set fan speed to minimum. + fan_speed = MIN_FANTRAY_FAN_SPEED + except IOError: + pass + + fan_speed = (100 * fan_speed)//self.max_speed + return fan_speed + + + def get_speed_tolerance(self): + """ + Retrieves the speed tolerance of the fan + + Returns: + An integer, the percentage of variance from target speed + which is considered tolerable + """ + if self.get_presence(): + tolerance = 10 + else: + tolerance = None + + return tolerance + + def _get_speed_to_percentage(self, speed): + """ + Convert speed value to speed percentage based on max fan speed + + Args: + speed - Fan speed + + Returns: + Fan speed percentage + """ + speed_percent = (100 * speed) // self.max_speed + return speed_percent if speed_percent <= 100 else 100 + + def set_speed_for_thermal_level(self, thermal_level): + """ + Set the fan speed based on the current system thermal level + + Args: + thermal_level - Current system thermal level + + Returns: + True + """ + req_speed_rpm = self.thermal_level_to_speed[thermal_level] + req_speed = self._get_speed_to_percentage(req_speed_rpm) + target_speed = self.get_target_speed() + + if req_speed != target_speed: + self.set_speed_rpm(req_speed_rpm) + + return True + + def is_on_ramp(self): + """ + Check whether the FAN is on ramp (up/down) after a speed set + + Returns: + bool: True if FAN is on ramp, False otherwise + """ + if not self.is_psu_fan: + time_diff = time.time() - self.last_speed_set_time + if time_diff < MAX_FAN_ON_RAMP_TIME: + return True + + return False + + def get_position_in_parent(self): + """ + Retrieves 1-based relative physical position in parent device. + + Returns: + integer: The 1-based relative physical position in parent + device or -1 if cannot determine the position + """ + return self.fan_index + + def is_replaceable(self): + """ + Indicate whether Fan is replaceable. + Returns: + bool: True if it is replaceable. + """ + return False + diff --git a/platform/broadcom/sonic-platform-modules-dell/s3248t/sonic_platform/fan_drawer.py b/platform/broadcom/sonic-platform-modules-dell/s3248t/sonic_platform/fan_drawer.py new file mode 100644 index 00000000000..044dd8206d0 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s3248t/sonic_platform/fan_drawer.py @@ -0,0 +1,160 @@ +""" + Dell S3248T + + Module contains an implementation of SONiC Platform Base API and + provides the Fan-Drawers' information available in the platform. + +""" + +try: + from sonic_platform_base.fan_drawer_base import FanDrawerBase + from sonic_platform.fan import Fan +except ImportError as err: + raise ImportError(str(err) + "- required module not found") + +S3248T_FANS_PER_FANTRAY = 1 + + +class FanDrawer(FanDrawerBase): + """Dell Platform-specific fan drawer class""" + + FANTRAY_LED_COLOR_MAPPING = { + "off" : "off", + "green" : "green", + "red" : "amber" + } + + def __init__(self, fantray_index): + + FanDrawerBase.__init__(self) + # FanTray is 1-based in Dell platforms + self.fantrayindex = fantray_index + 1 + self.fantray_led_reg = "fan{}_led".format(fantray_index) + for i in range(S3248T_FANS_PER_FANTRAY): + self._fan_list.append(Fan(fantray_index, i)) + + @staticmethod + def _get_cpld_register(reg_name): + # On successful read, returns the value read from given + # reg name and on failure rethrns 'ERR' + cpld_dir = "/sys/devices/platform/dell-s3248t-cpld.0/" + cpld_reg_file = cpld_dir + '/' + reg_name + try: + with open(cpld_reg_file, 'r') as file_desc: + ret_val = file_desc.read() + except IOError: + return 'ERR' + return ret_val.strip('\r\n').lstrip(' ') + + @staticmethod + def _set_cpld_register(reg_name, value): + # On successful write, returns the value will be written on + # reg_name and on failure returns 'ERR' + ret_val = 'ERR' + cpld_dir = "/sys/devices/platform/dell-s3248t-cpld.0/" + cpld_reg_file = cpld_dir + '/' + reg_name + + try: + with open(cpld_reg_file, 'w') as file_desc: + ret_val = file_desc.write(str(value)) + except IOError: + ret_val = 'ERR' + + return ret_val + + def get_name(self): + """ + Retrieves the fan drawer name + Returns: + string: The name of the device + """ + return "FanTray{}".format(self.fantrayindex) + + def get_status_led(self): + """ + Gets the current Fantray LED color + + Returns: + A string that represents the supported color + """ + + color = self._get_cpld_register(self.fantray_led_reg) + + return color + + def set_status_led(self, color): + """ + Set Fantray LED status based on the color type passed in the argument. + Argument: Color to be set + Returns: + bool: True is specified color is set, Otherwise return False + """ + + if (not self._set_cpld_register(self.fantray_led_reg, + self.FANTRAY_LED_COLOR_MAPPING.get(color))): + return False + + return True + + def get_presence(self): + """ + Retrives the presence of the fan drawer + Returns: + bool: True if fan_tray is present, False if not + """ + return self.get_fan(0).get_presence() + + def get_position_in_parent(self): + """ + Retrieves 1-based relative physical position in parent device. + Returns: + integer: The 1-based relative physical position in parent + device or -1 if cannot determine the position + """ + return self.fantrayindex + + @staticmethod + def get_model(): + """ + Retrieves the part number of the fan drawer + Returns: + string: Part number of fan drawer + """ + return "NA" + + @staticmethod + def get_serial(): + """ + Retrieves the serial number of the fan drawer + Returns: + string: Serial number of the fan drawer + """ + return "NA" + + @staticmethod + def get_status(): + """ + Retrieves the operational status of the fan drawer + Returns: + bool: True if fan drawer is operating properly, False if not + """ + return True + + @staticmethod + def is_replaceable(): + """ + Indicate whether this fan drawer is replaceable. + Returns: + bool: True if it is replaceable, False if not + """ + return True + + @staticmethod + def get_maximum_consumed_power(): + """ + Retrives the maximum power drawn by Fan Drawer + Returns: + A float, with value of the maximum consumable power of the + component. + """ + return 0.0 diff --git a/platform/broadcom/sonic-platform-modules-dell/s3248t/sonic_platform/platform.py b/platform/broadcom/sonic-platform-modules-dell/s3248t/sonic_platform/platform.py new file mode 100644 index 00000000000..697b0e8d07f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s3248t/sonic_platform/platform.py @@ -0,0 +1,20 @@ +""" + Module contains an implementation of SONiC Platform Base API and + provides the platform information +""" + +try: + from sonic_platform_base.platform_base import PlatformBase + from sonic_platform.chassis import Chassis +except ImportError as err: + raise ImportError(str(err) + "- required module not found") + + +class Platform(PlatformBase): + """ + DELL Platform-specific class + """ + + def __init__(self): + PlatformBase.__init__(self) + self._chassis = Chassis() diff --git a/platform/broadcom/sonic-platform-modules-dell/s3248t/sonic_platform/psu.py b/platform/broadcom/sonic-platform-modules-dell/s3248t/sonic_platform/psu.py new file mode 100644 index 00000000000..5af914e711d --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s3248t/sonic_platform/psu.py @@ -0,0 +1,367 @@ +""" + DELL S3248T + + Module contains an implementation of SONiC Platform Base API and + provides the PSUs' information which are available in the platform +""" + +try: + import os + from sonic_platform_base.psu_base import PsuBase + from sonic_platform.fan import Fan +except ImportError as err: + raise ImportError(str(err) + "- required module not found") + + +class Psu(PsuBase): + """Dell Platform-specific PSU class""" + + def __init__(self, psu_index): + PsuBase.__init__(self) + self.index = psu_index + 1 # PSU is 1-based in Dell platforms + self.psu_presence_reg = f"psu{psu_index}_prs" + self.psu_status = f"psu{psu_index}_status" + self.eeprom = f"/sys/bus/i2c/devices/{10 + psu_index}-0056/eeprom" + self.psu_voltage_reg = 'in3_input' + self.psu_current_reg = 'curr2_input' + self.psu_power_reg = 'power2_input' + self.dps_hwmon = f"/sys/bus/i2c/devices/{10 + psu_index}-005e/hwmon/" + self.dps_hwmon_exist = os.path.exists(self.dps_hwmon) + self._fan_list.append(Fan(fan_index=self.index, psu_fan=True, dependency=self)) + self.psu_input_voltage_reg = "in1_input" + self.psu_power_cap_reg = "power2_cap" + self.psu_input_current_reg = "curr1_input" + self.psu_input_power_reg = "power1_input" + self.psu_temp1_reg = 'temp1_input' + self.psu_temp1_max_reg = 'temp1_max' + + @staticmethod + def _get_cpld_register(reg_name): + # On successful read, returns the value read from given + # reg name and on failure rethrns 'ERR' + cpld_dir = "/sys/devices/platform/dell-s3248t-cpld.0/" + cpld_reg_file = cpld_dir + '/' + reg_name + try: + with open(cpld_reg_file, 'r') as file_desc: + ret_val = file_desc.read() + except IOError: + return 'ERR' + return ret_val.strip('\r\n').lstrip(' ') + + def _get_dps_register(self, reg_name): + try: + dps_dir = self.dps_hwmon + '/' + os.listdir(self.dps_hwmon)[0] + dps_reg_file = dps_dir + '/' + reg_name + with open(dps_reg_file, 'r') as file_desc: + ret_val = file_desc.read() + except (IOError, OSError): + return 'ERR' + return ret_val + + def get_name(self): + """ + Retrieves the name of the device + + Returns: + string: The name of the device + """ + return "PSU{}".format(self.index) + + def _reload_dps_module(self): + bus_id = 10 + self.index - 1 + drv_dir = f"/sys/bus/i2c/devices/i2c-{bus_id}/{bus_id}-0056" + dps460_drv_dir = f"/sys/bus/i2c/devices/i2c-{bus_id}/{bus_id}-005e" + try: + if os.path.exists(drv_dir): + file = "/sys/bus/i2c/devices/i2c-{}/delete_device".format(bus_id) + with open(file, 'w') as file_des: + file_des.write('0x56\n') + if not os.path.exists(drv_dir): + file = "/sys/bus/i2c/devices/i2c-{}/new_device".format(bus_id) + with open(file, 'w') as file_des: + file_des.write('24c02 0x56\n') + if os.path.exists(dps460_drv_dir): + file = "/sys/bus/i2c/devices/i2c-{}/delete_device".format(bus_id) + with open(file, 'w') as file_des: + file_des.write('0x5e\n') + if not os.path.exists(dps460_drv_dir): + file = "/sys/bus/i2c/devices/i2c-{}/new_device".format(bus_id) + with open(file, 'w') as file_des: + file_des.write('dps460 0x5e\n') + except (IOError, OSError): + pass + + def get_presence(self): + """ + Retrieves the presence of the Power Supply Unit (PSU) + + Returns: + bool: True if PSU is present, False if not + """ + presence = self._get_cpld_register(self.psu_presence_reg).strip() + status = self.get_status() + if presence == 'ERR': + return False + if int(presence, 0) and not status: + if int(presence, 0) == 1: + return True + return False + if not self.dps_hwmon_exist and int(presence, 0): + self.dps_hwmon_exist = os.path.exists(self.dps_hwmon) + if not self.dps_hwmon_exist: + self._reload_dps_module() + if int(presence, 0) == 1: + return True + return False + + def get_model(self): + """ + Retrieves the part number of the PSU + + Returns: + string: Part number of PSU + """ + try: + with open(self.eeprom, "rb") as file_desc: + val = file_desc.read()[0x50:0x62].decode("utf-8") + except IOError: + val = None + return val + + def get_serial(self): + """ + Retrieves the serial number of the PSU + + Returns: + string: Serial number of PSU + """ + try: + with open(self.eeprom, "rb") as file_desc: + val = file_desc.read()[0xc4:0xd9].decode("utf-8") + except IOError: + val = None + return val + + def get_revision(self): + """ + Retrieves the serial number of the PSU + + Returns: + string: Revision number of PSU + """ + try: + val = open(self.eeprom, "rb").read()[0xc4:0xd9] + except IOError: + val = None + if val is not None and val != "NA" and len(val) == 23: + return val[-3:] + return "NA" + + def get_status(self): + """ + Retrieves the operational status of the PSU + + Returns: + bool: True if PSU is operating properly, False if not + """ + status = self._get_cpld_register(self.psu_status).strip() + if status == 'ERR': + return False + if int(status, 0) == 1: + return True + return False + + def get_voltage(self): + """ + Retrieves current PSU voltage output + + Returns: + A float number, the output voltage in volts, + e.g. 12.1 + """ + voltage = 0.0 + volt_reading = self._get_dps_register(self.psu_voltage_reg) + try: + voltage = int(volt_reading)/1000 + except (ValueError, ArithmeticError): + return None + return float(voltage) + + def get_current(self): + """ + Retrieves present electric current supplied by PSU + + Returns: + A float number, electric current in amperes, + e.g. 15.4 + """ + current = 0.0 + curr_reading = self._get_dps_register(self.psu_current_reg) + try: + current = int(curr_reading)/1000 + except (ValueError, ArithmeticError): + return None + return float(current) + + def get_power(self): + """ + Retrieves current energy supplied by PSU + + Returns: + A float number, the power in watts, + e.g. 302.6 + """ + power = 0.0 + power_reading = self._get_dps_register(self.psu_power_reg) + try: + power = int(power_reading)/(1000*1000) + except (ValueError, ArithmeticError): + return None + return float(power) + + def get_powergood_status(self): + """ + Retrieves the powergood status of PSU + + Returns: + A boolean, True if PSU has stablized its output voltages and + passed all its internal self-tests, False if not. + """ + power_good = self._get_cpld_register(self.psu_status).strip() + if power_good == 'ERR': + return False + if int(power_good, 0) == 1: + return True + return False + + @staticmethod + def get_mfr_id(): + """ + Retrives the Manufacturer Id of PSU + + Returns: + A string, the manunfacturer id. + """ + return 'DELTA' + + def get_type(self): + """ + Retrives the Power Type of PSU + + Returns : + A string, PSU power type + """ + try: + with open(self.eeprom, "rb") as file_desc: + val = file_desc.read()[0xe8:0xea].decode("utf-8") + except IOError: + return None + return val + + def get_input_voltage(self): + """ + Retrieves PSU input voltage + + Returns: + returns input voltage in volts, + """ + voltage = 0 + volt_reading = self._get_dps_register(self.psu_input_voltage_reg) + try: + voltage = int(volt_reading)/1000 + except (ValueError, ArithmeticError): + return None + return f"{voltage:.1f}" + + def get_power_rating(self): + """ + Retrieves PSU power rating + + Returns: + returns power rating in watts + """ + power = 0 + power_rating = self._get_dps_register(self.psu_power_cap_reg) + try: + power = int(power_rating)/(1000 * 1000) + except (ValueError, ArithmeticError): + return None + return f"{power:.1f}" + + def get_input_current(self): + """ + Retrieves present electric current supplied to PSU + Returns: + A float number, electric current in amperes, + e.g. 15.4 + """ + input_current = 0.0 + curr_reading = self._get_dps_register(self.psu_input_current_reg) + try: + input_current = int(curr_reading) / 1000 + except (ValueError, ArithmeticError): + return None + return float(input_current) + + def get_input_power(self): + """ + Retrieves current energy supplied to PSU + Returns: + A float number, the power in watts, + e.g. 302.6 + """ + input_power = 0.0 + power_reading = self._get_dps_register(self.psu_input_power_reg) + try: + input_power = int(power_reading) / (1000*1000) + except (ValueError, ArithmeticError): + return None + return float(input_power) + + def get_temperature(self): + """ + Retrieves current temperature reading from thermal + Returns: + A float number of current temperature in Celcius up to + nearest thousandth of one degree celcius, e.g. 30.125 + """ + temperature = 0 + temp_reading = self._get_dps_register(self.psu_temp1_reg) + try: + temperature = int(temp_reading) / 1000 + except (ValueError, ArithmeticError): + return None + return float(temperature) + + def get_temperature_high_threshold(self): + """ + Retrieves the high threshold temperature of PSU + + Returns: + A float number, the high threshold temperature of PSU in Celsius + up to nearest thousandth of one degree Celsius, e.g. 30.125 + """ + high_threshold = 0 + temp_reading = self._get_dps_register(self.psu_temp1_max_reg) + try: + high_threshold = int(temp_reading) / 1000 + except (ValueError, ArithmeticError): + return None + return float(high_threshold) + + def get_position_in_parent(self): + """ + Retrieves 1-based relative physical position in parent device. + Returns: + integer: The 1-based relative physical position in parent + device or -1 if cannot determine the position + """ + return self.index + + def is_replaceable(self): + """ + Indicate whether this PSU is replaceable. + Returns: + bool: True if it is replaceable. + """ + return True diff --git a/platform/broadcom/sonic-platform-modules-dell/s3248t/sonic_platform/sfp.py b/platform/broadcom/sonic-platform-modules-dell/s3248t/sonic_platform/sfp.py new file mode 100644 index 00000000000..c321fdb7286 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s3248t/sonic_platform/sfp.py @@ -0,0 +1,176 @@ +""" + DELL S3248T + + Module contains an implementation of SONiC Platform Base API and + provides the platform information + +""" + +try: + from pathlib import Path + from sonic_platform_base.sonic_xcvr.sfp_optoe_base import SfpOptoeBase + +except ImportError as err: + raise ImportError(str(err) + "- required module not found") + +SFP_PORT_START = 49 +SFP_PORT_END = 52 +PORT_END = 54 + +class Sfp(SfpOptoeBase): + """ + DELL Platform-specific Sfp class + """ + def __init__(self, index, sfp_type, eeprom_path): + SfpOptoeBase.__init__(self) + self.sfp_type = sfp_type + self.index = index + self.eeprom_path = eeprom_path + + def get_eeprom_path(self): + """ + Returns media EEPROM path + """ + return self.eeprom_path + + def get_name(self): + """ + Returns media type + """ + return "SFP/SFP+" if self.index < 53 else "QSFP+/QSFP28" + + @staticmethod + def _get_cpld_register(reg): + reg_file = '/sys/devices/platform/dell-s3248t-cpld.0/' + reg + try: + rval = Path(reg_file).read_text() + except EnvironmentError: + return 'ERR' + return rval.strip('\r\n').lstrip(' ') + + @staticmethod + def _set_cpld_register(reg_name, value): + # On successful write, returns the value will be written on + # reg_name and on failure returns 'ERR' + + cpld_dir = "/sys/devices/platform/dell-s3248t-cpld.0/" + cpld_reg_file = cpld_dir + '/' + reg_name + + try: + with open(cpld_reg_file, 'w') as filed: + rval = filed.write(str(value)) + except EnvironmentError: + rval = 'ERR' + return rval + + def get_presence(self): + """ + Retrieves the presence of the sfp + Returns : True if sfp is present and false if it is absent + """ + # Check for invalid port_num + presence = False + if not (self.index >= SFP_PORT_START and self.index <= PORT_END): + return presence + try: + if self.index <= SFP_PORT_END: + bit_mask = 1 << (self.index - SFP_PORT_START) + sfp_mod_prs = self._get_cpld_register('sfp_modprs') + if sfp_mod_prs == 'ERR': + return presence + presence = ((int(sfp_mod_prs, 16) & bit_mask) == 0) + else: + bit_mask = (1 << (self.index - (SFP_PORT_START+4))) + qsfp_mod_prs = self._get_cpld_register('qsfp_modprs') + if qsfp_mod_prs == 'ERR': + return presence + presence = ((int(qsfp_mod_prs, 16) & bit_mask) == 0) + except TypeError: + pass + return presence + + @staticmethod + def get_reset_status(): + """ + Retrives the reset status of SFP + """ + return False + + @staticmethod + def reset(): + """ + Reset the SFP and returns all user settings to their default state + """ + return True + + @staticmethod + def set_lpmode(lpmode): + """ + Sets the lpmode(low power mode) of this SFP + """ + return True + + def hard_tx_disable(self, tx_disable): + """ + Disable SFP TX for all channels by pulling up hard TX_DISABLE pin + + Args: + tx_disable : A Boolean, True to enable tx_disable mode, False to disable + tx_disable mode. + + Returns: + A boolean, True if tx_disable is set successfully, False if not + """ + rval = False + if self.sfp_type == 'SFP': + sfp_txdis = int(self._get_cpld_register('sfp_txdis'), 16) + if sfp_txdis != 'ERR': + bit_mask = 1 << (self.index - SFP_PORT_START) + sfp_txdis = sfp_txdis | bit_mask if tx_disable \ + else sfp_txdis & ~bit_mask + rval = (self._set_cpld_register('sfp_txdis', sfp_txdis) != 'ERR') + return rval + + def get_max_port_power(self): + """ + Retrieves the maximumum power allowed on the port in watts + """ + return 5.0 if self.sfp_type == 'QSFP' else 2.5 + + def is_replaceable(self): + """ + Indicate whether this device is replaceable. + Returns: + bool: True if it is replaceable. + """ + return True + + def get_error_description(self): + """ + Retrives the error descriptions of the SFP module + Returns: + String that represents the current error descriptions of vendor specific errors + In case there are multiple errors, they should be joined by '|', + like: "Bad EEPROM|Unsupported cable" + """ + if not self.get_presence(): + return self.SFP_STATUS_UNPLUGGED + else: + if not os.path.isfile(self.eeprom_path): + return "EEPROM driver is not attached" + + if self.sfp_type == 'SFP': + offset = SFP_INFO_OFFSET + elif self.sfp_type == 'QSFP': + offset = QSFP_INFO_OFFSET + elif self.sfp_type == 'QSFP_DD': + offset = QSFP_DD_PAGE0 + + try: + with open(self.eeprom_path, mode="rb", buffering=0) as eeprom: + eeprom.seek(offset) + eeprom.read(1) + except OSError as e: + return "EEPROM read failed ({})".format(e.strerror) + + return self.SFP_STATUS_OK diff --git a/platform/broadcom/sonic-platform-modules-dell/s3248t/sonic_platform/thermal.py b/platform/broadcom/sonic-platform-modules-dell/s3248t/sonic_platform/thermal.py new file mode 100644 index 00000000000..893c46a90e0 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s3248t/sonic_platform/thermal.py @@ -0,0 +1,361 @@ +""" + Dell S3248T + + Module contains an implementation of SONiC Platform Base API and + provides the Thermals' information which are available in the platform + +""" + +try: + import os + from sonic_platform_base.thermal_base import ThermalBase +except ImportError as err: + raise ImportError(str(err) + "- required module not found") + + +class Thermal(ThermalBase): + """Dell Platform-specific Thermal class""" + + # { Sensor name, Sensor-ID, high threshold, high critical threshold, Tlow , Thigh } + SENSOR_MAPPING_NOR_AIRFLOW = { + 1: {"Sensor name": 'CPU On-board Temperature', "Id": '7-0048', + "high-thr": 50, "high-crit-thr": 52, "Tlow": 71, "Thigh": 76}, + 2: {"Sensor name": 'Main board Temperature', "Id": '7-0049', + "high-thr": 68, "high-crit-thr": 70, "Tlow": 78, "Thigh": 83}, + 3: {"Sensor name": 'Underneath CPU Temperature', "Id": '7-004a', + "high-thr": 56, "high-crit-thr": 58, "Tlow": 75, "Thigh": 80}, + 4: {"Sensor name": 'PSU inlet Temperature', "Id": '7-004b', + "high-thr": 46, "high-crit-thr": 52, "Tlow": 74, "Thigh": 79}, + 5: {"Sensor name": 'Front plate inlet Temperature', "Id": '7-004c', + "high-thr": 46, "high-crit-thr": 50, "Tlow": 71, "Thigh": 76}, + 6: {"Sensor name": 'Fan board Temperature', "Id": '7-004f', + "high-thr": 46, "high-crit-thr": 52, "Tlow": 74, "Thigh": 79} + } + + TEMP_LEVEL_UP_THRESHOLD_NOR_AIRFLOW = { + 1: {"LEVEL1": 46, "LEVEL2": 48, "LEVEL3": 50, "LEVEL4": 52}, + 2: {"LEVEL1": 64, "LEVEL2": 66, "LEVEL3": 68, "LEVEL4": 70}, + 3: {"LEVEL1": 52, "LEVEL2": 54, "LEVEL3": 56, "LEVEL4": 58}, + 4: {"LEVEL1": 42, "LEVEL2": 44, "LEVEL3": 46, "LEVEL4": 52}, + 5: {"LEVEL1": 42, "LEVEL2": 44, "LEVEL3": 46, "LEVEL4": 50}, + 6: {"LEVEL1": 42, "LEVEL2": 44, "LEVEL3": 46, "LEVEL4": 52} + } + + TEMP_LEVEL_DOWN_THRESHOLD_NOR_AIRFLOW = { + 1: {"LEVEL0": 34, "LEVEL1": 38, "LEVEL2": 41, "LEVEL3": 46}, + 2: {"LEVEL0": 45, "LEVEL1": 48, "LEVEL2": 50, "LEVEL3": 53}, + 3: {"LEVEL0": 40, "LEVEL1": 44, "LEVEL2": 47, "LEVEL3": 50}, + 4: {"LEVEL0": 36, "LEVEL1": 40, "LEVEL2": 45, "LEVEL3": 49}, + 5: {"LEVEL0": 33, "LEVEL1": 38, "LEVEL2": 42, "LEVEL3": 46}, + 6: {"LEVEL0": 34, "LEVEL1": 39, "LEVEL2": 44, "LEVEL3": 49} + } + + SENSOR_MAPPING_REV_AIRFLOW = { + 1: {"Sensor name": 'CPU On-board Temperature', "Id": '7-0048', + "high-thr": 44, "high-crit-thr": 48, "Tlow": 69, "Thigh": 74}, + 2: {"Sensor name": 'Main board Temperature', "Id": '7-0049', + "high-thr": 52, "high-crit-thr": 55, "Tlow": 74, "Thigh": 79}, + 3: {"Sensor name": 'Underneath CPU Temperature', "Id": '7-004a', + "high-thr": 44, "high-crit-thr": 49, "Tlow": 70, "Thigh": 75}, + 4: {"Sensor name": 'PSU inlet Temperature', "Id": '7-004b', + "high-thr": 52, "high-crit-thr": 56, "Tlow": 77, "Thigh": 82}, + 5: {"Sensor name": 'Front plate inlet Temperature', "Id": '7-004c', + "high-thr": 51, "high-crit-thr": 54, "Tlow": 73, "Thigh": 78}, + 6: {"Sensor name": 'Fan board Temperature', "Id": '7-004f', + "high-thr": 41, "high-crit-thr": 46, "Tlow": 68, "Thigh": 73} + } + + TEMP_LEVEL_UP_THRESHOLD_REV_AIRFLOW = { + 1: {"LEVEL1": 36, "LEVEL2": 39, "LEVEL3": 44, "LEVEL4": 48}, + 2: {"LEVEL1": 48, "LEVEL2": 50, "LEVEL3": 52, "LEVEL4": 55}, + 3: {"LEVEL1": 34, "LEVEL2": 40, "LEVEL3": 44, "LEVEL4": 49}, + 4: {"LEVEL1": 47, "LEVEL2": 50, "LEVEL3": 52, "LEVEL4": 56}, + 5: {"LEVEL1": 47, "LEVEL2": 49, "LEVEL3": 51, "LEVEL4": 54}, + 6: {"LEVEL1": 31, "LEVEL2": 36, "LEVEL3": 41, "LEVEL4": 46} + } + + TEMP_LEVEL_DOWN_THRESHOLD_REV_AIRFLOW = { + 1: {"LEVEL0": 29, "LEVEL1": 33, "LEVEL2": 38, "LEVEL3": 43}, + 2: {"LEVEL0": 37, "LEVEL1": 39, "LEVEL2": 45, "LEVEL3": 49}, + 3: {"LEVEL0": 29, "LEVEL1": 33, "LEVEL2": 38, "LEVEL3": 44}, + 4: {"LEVEL0": 40, "LEVEL1": 43, "LEVEL2": 47, "LEVEL3": 51}, + 5: {"LEVEL0": 36, "LEVEL1": 38, "LEVEL2": 42, "LEVEL3": 47}, + 6: {"LEVEL0": 26, "LEVEL1": 31, "LEVEL2": 37, "LEVEL3": 43} + } + + def __init__(self, thermal_index, airflow_dir): + ThermalBase.__init__(self) + self.index = thermal_index + 1 + + if airflow_dir == 'exhaust': + self.SENSOR_MAPPING = self.SENSOR_MAPPING_NOR_AIRFLOW + self.TEMP_LEVEL_UP_THRESHOLD = self.TEMP_LEVEL_UP_THRESHOLD_NOR_AIRFLOW + self.TEMP_LEVEL_DOWN_THRESHOLD = self.TEMP_LEVEL_DOWN_THRESHOLD_NOR_AIRFLOW + else: + self.SENSOR_MAPPING = self.SENSOR_MAPPING_REV_AIRFLOW + self.TEMP_LEVEL_UP_THRESHOLD = self.TEMP_LEVEL_UP_THRESHOLD_REV_AIRFLOW + self.TEMP_LEVEL_DOWN_THRESHOLD = self.TEMP_LEVEL_DOWN_THRESHOLD_REV_AIRFLOW + + self.is_driver_initialized = True + + temp_hwmon = '/sys/bus/i2c/devices/' + self.SENSOR_MAPPING[self.index]["Id"] + '/hwmon' + try: + hwmon_node = os.listdir(temp_hwmon)[0] + except OSError: + hwmon_node = "hwmon*" + self.is_driver_initialized = False + + self.temp_file = temp_hwmon + '/' + hwmon_node + '/' + 'temp1_input' + self.temp_max_file = temp_hwmon + '/' + hwmon_node + '/' + 'temp1_max' + self.temp_max_hyst_file = temp_hwmon + '/' + hwmon_node + '/' + 'temp1_max_hyst' + + def get_name(self): + """ + Retrieves the name of the thermal + + Returns: + string: The name of the thermal + """ + return self.SENSOR_MAPPING[self.index]["Sensor name"] + + @staticmethod + def get_presence(): + """ + Retrieves the presence of the thermal + + Returns: + bool: True if thermal is present, False if not + """ + return True + + @staticmethod + def get_model(): + """ + Retrieves the model number (or part number) of the Thermal + + Returns: + string: Model/part number of Thermal + """ + return 'NA' + + @staticmethod + def get_serial(): + """ + Retrieves the serial number of the Thermal + + Returns: + string: Serial number of Thermal + """ + return 'NA' + + def get_status(self): + """ + Retrieves the operational status of the thermal + + Returns: + A boolean value, True if thermal is operating properly, + False if not + """ + if self.get_presence() and self.get_temperature() > 0: + return True + + return False + + def get_temperature(self): + """ + Retrieves current temperature reading from thermal + + Returns: + A float number of current temperature in Celsius up to + nearest thousandth of one degree Celsius, e.g. 30.125 + """ + temperature = 0.0 + if not os.path.exists(self.temp_file): + return temperature + + try: + with open(self.temp_file, 'r') as file_desc: + temperature = float(file_desc.read()) / 1000.0 + except IOError: + pass + + return temperature + + def get_low_threshold(self): + """ + Retrieves the low threshold temperature of thermal + + Returns: + A float number, the low threshold temperature of thermal in + Celsius up to nearest thousandth of one degree Celsius, + e.g. 30.125 + """ + return 0.0 + + def get_high_threshold(self): + """ + Retrieves the high threshold temperature of thermal + + Returns: + A float number, the high threshold temperature of thermal in + Celsius up to nearest thousandth of one degree Celsius, + e.g. 30.125 + """ + return float(self.SENSOR_MAPPING[self.index]["high-thr"]) + + def get_high_critical_threshold(self): + """ + Retrieves the high critical threshold temperature of thermal + + Returns: + A float number, the high critical threshold temperature of thermal in + Celsius up to nearest thousandth of one degree Celsius, + e.g. 30.125 + """ + return float(self.SENSOR_MAPPING[self.index]["high-crit-thr"]) + + @staticmethod + def set_high_threshold(temperature): + """ + Sets the high threshold temperature of thermal + + Args : + temperature: A float number up to nearest thousandth of one + degree Celsius, e.g. 30.125 + Returns: + A boolean, True if threshold is set successfully, False if + not + """ + # Thermal threshold values are pre-defined based on HW. + return False + + @staticmethod + def set_low_threshold(temperature): + """ + Sets the low threshold temperature of thermal + + Args : + temperature: A float number up to nearest thousandth of one + degree Celsius, e.g. 30.125 + Returns: + A boolean, True if threshold is set successfully, False if + not + """ + # Thermal threshold values are pre-defined based on HW. + return False + + def get_num_of_thermals(self): + """ + Retrieves the number of thermal sensors + + Returns: number of thermal sensors + e.g. 5 + """ + return len(self.SENSOR_MAPPING) + + def set_tlow_threshold(self): + """ + Set the thermal sensor's TLow value + + """ + ret_val = 'ERR' + + if not os.path.exists(self.temp_max_hyst_file): + return ret_val + + value = int(self.SENSOR_MAPPING[self.index]["Tlow"]) * 1000 + + try: + with open(self.temp_max_hyst_file, 'w') as file_desc: + ret_val = file_desc.write(str(value)) + except IOError: + ret_val = 'ERR' + + return ret_val + + def set_thigh_threshold(self): + """ + Set the thermal sensor's THigh value + + """ + ret_val = 'ERR' + + if not os.path.exists(self.temp_max_file): + return ret_val + + value = int(self.SENSOR_MAPPING[self.index]["Thigh"]) * 1000 + + try: + with open(self.temp_max_file, 'w') as file_desc: + ret_val = file_desc.write(str(value)) + except IOError: + ret_val = 'ERR' + + return ret_val + + def get_system_thermal_level(self, system_temperature, temp_up): + """ + Get the system thermal level from the given thermal sensor reading + + Args: + system_temperature: Current temperature + temp_up : True - temperature increased + + Returns: + Thermal level for the given temperature sensor value + """ + index = self.index + if temp_up: + if system_temperature < self.TEMP_LEVEL_UP_THRESHOLD[index]["LEVEL1"]: + curr_thermal_level = 0 + elif self.TEMP_LEVEL_UP_THRESHOLD[index]["LEVEL1"] <= system_temperature < self.TEMP_LEVEL_UP_THRESHOLD[index]["LEVEL2"]: + curr_thermal_level = 1 + elif self.TEMP_LEVEL_UP_THRESHOLD[index]["LEVEL2"] <= system_temperature < self.TEMP_LEVEL_UP_THRESHOLD[index]["LEVEL3"]: + curr_thermal_level = 2 + elif self.TEMP_LEVEL_UP_THRESHOLD[index]["LEVEL3"] <= system_temperature < self.TEMP_LEVEL_UP_THRESHOLD[index]["LEVEL4"]: + curr_thermal_level = 3 + else: + curr_thermal_level = 4 + else: + if system_temperature <= self.TEMP_LEVEL_DOWN_THRESHOLD[index]["LEVEL0"]: + curr_thermal_level = 0 + elif self.TEMP_LEVEL_DOWN_THRESHOLD[index]["LEVEL0"] < system_temperature <= self.TEMP_LEVEL_DOWN_THRESHOLD[index]["LEVEL1"]: + curr_thermal_level = 1 + elif self.TEMP_LEVEL_DOWN_THRESHOLD[index]["LEVEL1"] < system_temperature <= self.TEMP_LEVEL_DOWN_THRESHOLD[index]["LEVEL2"]: + curr_thermal_level = 2 + elif self.TEMP_LEVEL_DOWN_THRESHOLD[index]["LEVEL2"] < system_temperature <= self.TEMP_LEVEL_DOWN_THRESHOLD[index]["LEVEL3"]: + curr_thermal_level = 3 + else: + curr_thermal_level = 4 + + return curr_thermal_level + + def is_thermal_level_lower_than(self, therm_lvl, temperature): + """ + Check sensor temperature value equal or below the lower threshold of the given thermal level value + + Args: + therm_lvl : Current maximum computed thermal level + temperature: Current temperature + + Returns: + True - Temperature value is equal or below the down thermal, otherwise False + """ + return temperature <= self.TEMP_LEVEL_DOWN_THRESHOLD[self.index]["LEVEL{}".format(therm_lvl)] + + def get_position_in_parent(self): + """ + Retrieves 1-based relative physical position in parent device. + Returns: + integer: The 1-based relative physical position in parent + device or -1 if cannot determine the position + """ + return self.index + + def is_replaceable(self): + """ + Indicate whether this Thermal is replaceable. + Returns: + bool: True if it is replaceable. + """ + return False diff --git a/platform/broadcom/sonic-platform-modules-dell/s3248t/sonic_platform/thermal_actions.py b/platform/broadcom/sonic-platform-modules-dell/s3248t/sonic_platform/thermal_actions.py new file mode 100644 index 00000000000..f6db4087b57 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s3248t/sonic_platform/thermal_actions.py @@ -0,0 +1,109 @@ +from sonic_platform_base.sonic_thermal_control.thermal_action_base import ThermalPolicyActionBase +from sonic_platform_base.sonic_thermal_control.thermal_json_object import thermal_json_object +from sonic_py_common.logger import Logger + +logger = Logger() + +__all__ = [ + "SetAllFanThermalLevelSpeedAction", + "SetAllFanMaxSpeedAction", + "SwitchShutdownAction", +] + +MAX_FAN_SPEED_RPM = 28600 + +class ThermalPolicyAction(ThermalPolicyActionBase): + + @staticmethod + def get_chassis_info(thermal_info_dict): + from .thermal_info import ChassisInfo + + chassis_info = thermal_info_dict.get(ChassisInfo.INFO_NAME) + return chassis_info if isinstance(chassis_info, ChassisInfo) else None + + @staticmethod + def get_fan_info(thermal_info_dict): + from .thermal_info import FanInfo + + fan_info = thermal_info_dict.get(FanInfo.INFO_NAME) + return fan_info if isinstance(fan_info, FanInfo) else None + + +@thermal_json_object('fan_all_set_thermal_level_speed') +class SetAllFanThermalLevelSpeedAction(ThermalPolicyAction): + """ + Action to set speed for all fans based on the system thermal level + """ + def execute(self, thermal_info_dict): + """ + Check thermal sensor temperature change status and set speed for all fans + :param thermal_info_dict: A dictionary stores all thermal information. + :return: + """ + chassis_info = self.get_chassis_info(thermal_info_dict) + fan_info = self.get_fan_info(thermal_info_dict) + + if chassis_info: + system_thermal_level = max(chassis_info._system_thermal_level_list) + + if chassis_info.initial_run: + logger.log_notice("System thermal level is at LEVEL {} (Range: 0-4)".format(system_thermal_level)) + if fan_info: + for fan in fan_info.non_fault_fans: + fan.set_speed_for_thermal_level(system_thermal_level) + + if chassis_info.is_status_changed: + logger.log_notice("System thermal level changed to LEVEL {} (Range: 0-4)".format(system_thermal_level)) + if fan_info: + for fan in fan_info.non_fault_fans: + fan.set_speed_for_thermal_level(system_thermal_level) + + if fan_info: + if fan_info.is_status_changed and not chassis_info.initial_run: + logger.log_notice("All fandrawer fans back to normal") + for fan in fan_info.non_fault_fans: + fan.set_speed_for_thermal_level(system_thermal_level) + + if not fan_info.fault: + chassis_info.get_chassis().set_fan_status_led("green") + + +@thermal_json_object('fan_all_set_max_speed') +class SetAllFanMaxSpeedAction(ThermalPolicyAction): + """ + Action to set all fandrawer fans to maximum speed + """ + def execute(self, thermal_info_dict): + fan_info = self.get_fan_info(thermal_info_dict) + + if fan_info: + if fan_info.is_status_changed and fan_info.is_new_fault: + logger.log_warning("Fandrawer fan fault detected. Setting all fandrawer fans to maximum speed") + + for fan in fan_info.non_fault_fans: + fan.set_speed_rpm(MAX_FAN_SPEED_RPM) + + if fan_info.fault: + chassis_info = self.get_chassis_info(thermal_info_dict) + if chassis_info: + chassis_info.get_chassis().set_fan_status_led("blink_yellow") + +@thermal_json_object('switch_thermal_shutdown') +class SwitchShutdownAction(ThermalPolicyAction): + """ + Action to shutdown switch. + """ + def execute(self, thermal_info_dict): + """ + Take action when thermal sensor temperature over high critical threshold. Shut + down the switch. + """ + + # Instead of shutdown the device, operating all the FANs in max speed. + chassis_info = self.get_chassis_info(thermal_info_dict) + + if chassis_info: + logger.log_warning("Shutting down due to over temperature - " + + ",".join("{} C".format(i) for i in chassis_info.temperature_list)) + chassis_info.chassis.thermal_shutdown() + diff --git a/platform/broadcom/sonic-platform-modules-dell/s3248t/sonic_platform/thermal_conditions.py b/platform/broadcom/sonic-platform-modules-dell/s3248t/sonic_platform/thermal_conditions.py new file mode 100644 index 00000000000..efc1012cef8 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s3248t/sonic_platform/thermal_conditions.py @@ -0,0 +1,58 @@ +""" + Dell fan and thermal conditions +""" + +from sonic_platform_base.sonic_thermal_control.thermal_condition_base import ThermalPolicyConditionBase +from sonic_platform_base.sonic_thermal_control.thermal_json_object import thermal_json_object + +__all__ = [ + "AnyFanAbsentOrFaultCondition", + "AllFanGoodCondition", + "ThermalOverHighCriticalCondition", +] + +class FanCondition(ThermalPolicyConditionBase): + """ Fan condition class """ + def get_fan_info(self, thermal_info_dict): + """ Get fan information from thermal info dictionary """ + from .thermal_info import FanInfo + + fan_info = thermal_info_dict.get(FanInfo.INFO_NAME) + return fan_info if isinstance(fan_info, FanInfo) else None + + +@thermal_json_object('fan_any_fault') +class AnyFanAbsentOrFaultCondition(FanCondition): + """ Fan absent or fault check class """ + def is_match(self, thermal_info_dict): + """ Check any fan fault or absent """ + fan_info = self.get_fan_info(thermal_info_dict) + return fan_info.fault if fan_info else False + + +@thermal_json_object('fan_all_normal') +class AllFanGoodCondition(FanCondition): + """ All fan good condition check class """ + def is_match(self, thermal_info_dict): + """ Check all fans are good """ + fan_info = self.get_fan_info(thermal_info_dict) + return not fan_info.fault if fan_info else False + + +class ThermalCondition(ThermalPolicyConditionBase): + """ Thermal condition class """ + def get_chassis_info(self, thermal_info_dict): + """ Get chassis information from thermal info dictionary """ + from .thermal_info import ChassisInfo + + chassis_info = thermal_info_dict.get(ChassisInfo.INFO_NAME) + return chassis_info if isinstance(chassis_info, ChassisInfo) else None + + +@thermal_json_object('switch_over_temperature') +class ThermalOverHighCriticalCondition(ThermalCondition): + """ Thermal over temperature check class """ + def is_match(self, thermal_info_dict): + """ Check for over temperature """ + chassis_info = self.get_chassis_info(thermal_info_dict) + return chassis_info.is_over_temperature if chassis_info else False diff --git a/platform/broadcom/sonic-platform-modules-dell/s3248t/sonic_platform/thermal_info.py b/platform/broadcom/sonic-platform-modules-dell/s3248t/sonic_platform/thermal_info.py new file mode 100644 index 00000000000..658bb4e377b --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s3248t/sonic_platform/thermal_info.py @@ -0,0 +1,203 @@ +""" + Dell Thermal Information +""" +from sonic_platform_base.sonic_thermal_control.thermal_info_base import ThermalPolicyInfoBase +from sonic_platform_base.sonic_thermal_control.thermal_json_object import thermal_json_object + + +__all__ = [ + "FanInfo", + "ChassisInfo", +] + +@thermal_json_object('fan_info') +class FanInfo(ThermalPolicyInfoBase): + """ + Fan information needed by thermal policy + """ + + # Fan information name + INFO_NAME = 'fan_info' + + def __init__(self): + self._fault_fans = set() + self._present_fans = set() + self._fault = False + self._is_new_fault = False + self._is_status_changed = False + + def collect(self, chassis): + """ + Collect absence and presence fans. + :param chassis: The chassis object + :return: + """ + fault = False + self._is_new_fault = False + self._is_status_changed = False + + for fandrawer in chassis.get_all_fan_drawers(): + for fan in fandrawer.get_all_fans(): + presence = fan.get_presence() + status = fan.get_status() + + if presence and (fan not in self._present_fans): + self._is_status_changed = True + self._present_fans.add(fan) + elif not presence and (fan in self._present_fans): + self._is_status_changed = True + self._present_fans.discard(fan) + + if status and (fan in self._fault_fans): + self._is_status_changed = True + self._fault_fans.discard(fan) + elif not status and (fan not in self._fault_fans): + self._is_status_changed = True + self._fault_fans.add(fan) + + if self._fault_fans or (chassis.get_num_fans() != len(self._present_fans)): + fault = True + + if self._is_status_changed: + if fault and not self._fault: + self._is_new_fault = True + + self._fault = fault + + @property + def fault_fans(self): + """ + Returns list of faulty fans + """ + return self._present_fans.intersection(self._fault_fans) + + @property + def non_fault_fans(self): + """ + Returns list of non faulty fans + """ + return self._present_fans.difference(self._fault_fans) + + @property + def fault(self): + """ + Returns True if any fault otherwise False + """ + return self._fault + + @property + def is_new_fault(self): + """ + Returns True if any new fault after init otherwise False + """ + return self._is_new_fault + + @property + def is_status_changed(self): + """ + Returns True if any changes in fan status otherwise False + """ + return self._is_status_changed + + +@thermal_json_object('chassis_info') +class ChassisInfo(ThermalPolicyInfoBase): + """ + Chassis information needed by thermal policy + """ + INFO_NAME = 'chassis_info' + + def __init__(self): + self._chassis = None + self._system_thermal_level_list = [] + self._prev_temp_list = [] + self._initial_run = True + self._is_over_temperature = False + self._is_status_changed = False + self._prev_thermal_state = 0 + self.num_of_thermals = 0 + + def collect(self, chassis): + """ + Collect platform chassis. + :param chassis: The chassis object + :return: + """ + self._initial_run = False + self._is_status_changed = False + + if not self._chassis: + self._initial_run = True + self._chassis = chassis + self.num_of_thermals = chassis.get_num_thermals() + self._prev_temp_list = [0] * self.num_of_thermals + self._system_thermal_level_list = [0] * self.num_of_thermals + + for index in range(self.num_of_thermals): + current_temp = chassis.get_thermal(index).get_temperature() + prev_temp = self._prev_temp_list[index] + temp_change = current_temp - prev_temp + if temp_change: + if temp_change > 0: + self._system_thermal_level_list[index] = chassis.get_thermal(index).get_system_thermal_level(current_temp, True) + elif current_temp < prev_temp: + current_thermal_state = chassis.get_thermal(index).get_system_thermal_level(current_temp, False) + if current_thermal_state < self._system_thermal_level_list[index]: + self._system_thermal_level_list[index] = current_thermal_state + + self._prev_temp_list[index] = current_temp + + current_thermal_state = max(self._system_thermal_level_list) + + if current_thermal_state > self._prev_thermal_state: + self._is_status_changed = True + self._prev_thermal_state = current_thermal_state + elif current_thermal_state < self._prev_thermal_state: + all_low = self._check_all_thermals_lower_than(current_thermal_state) + if all_low: + self._is_status_changed = True + self._prev_thermal_state = current_thermal_state + + # SW based thermal shutdown requires BRCM, AQ PHY thermal sensors + # self._is_over_temperature = chassis.is_over_temperature(self._system_thermal_level_list) + + def get_chassis(self): + """ + Retrieves platform chassis object + :return: A platform chassis object. + """ + return self._chassis + + @property + def is_over_temperature(self): + """ + Returns True if any sensor exceeds shutdown threshold otherwise False + """ + return self._is_over_temperature + + @property + def initial_run(self): + """ + Returns True if it is initial run otherwise False + """ + return self._initial_run + + @property + def is_status_changed(self): + """ + Returns True if any changes in system thermal status otherwise False + """ + return self._is_status_changed + + def _check_all_thermals_lower_than(self, cur_therm_lvl): + """ + Returns True if all the thermal sensor values are in down level otherwise False + """ + chassis = self.get_chassis() + all_low = False + for thermal_index in range(self.num_of_thermals): + cur_temp = self._prev_temp_list[thermal_index] + all_low = chassis.get_thermal(thermal_index).is_thermal_level_lower_than(cur_therm_lvl, cur_temp) + if not all_low: + return all_low + return all_low diff --git a/platform/broadcom/sonic-platform-modules-dell/s3248t/sonic_platform/thermal_manager.py b/platform/broadcom/sonic-platform-modules-dell/s3248t/sonic_platform/thermal_manager.py new file mode 100644 index 00000000000..c42d3a28e6e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s3248t/sonic_platform/thermal_manager.py @@ -0,0 +1,47 @@ +""" + Thermal Manager +""" +from sonic_platform_base.sonic_thermal_control.thermal_manager_base import ThermalManagerBase +from .thermal_info import * +from .thermal_conditions import * +from .thermal_actions import * + +class ThermalManager(ThermalManagerBase): + """ Thermal Manager class """ + _chassis = None + _fan_speed_default = 22880 + + @classmethod + def deinitialize(cls): + """ + Destroy thermal manager, including any vendor specific cleanup. + :return: + """ + cls.stop_thermal_algorithm() + + @classmethod + def stop_thermal_algorithm(cls): + """ + Stop vendor specific thermal control algorithm. + :return: + """ + if cls._chassis: + for fan in cls._chassis.get_all_fans(): + fan.set_speed_rpm(cls._fan_speed_default) + + @classmethod + def init_thermal_algorithm(cls, chassis): + """ + Initialize thermal algorithm according to policy file. + :param chassis: The chassis object. + :return: + """ + if cls._run_thermal_algorithm_at_boot_up is not None: + chassis.set_thermal_shutdown_threshold() + if cls._run_thermal_algorithm_at_boot_up: + cls.start_thermal_control_algorithm() + else: + cls.stop_thermal_control_algorithm() + if cls._fan_speed_when_suspend is not None: + for fan in chassis.get_all_fans(): + fan.set_speed_rpm(cls._fan_speed_default) diff --git a/platform/broadcom/sonic-platform-modules-dell/s3248t/sonic_platform/watchdog.py b/platform/broadcom/sonic-platform-modules-dell/s3248t/sonic_platform/watchdog.py new file mode 100644 index 00000000000..7a756307caa --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s3248t/sonic_platform/watchdog.py @@ -0,0 +1,207 @@ +""" + DELL S3248T + + Abstract base class for implementing a platform-specific class with + which to interact with a hardware watchdog module in SONiC + +""" + +try: + import ctypes + from sonic_platform_base.watchdog_base import WatchdogBase +except ImportError as err: + raise ImportError(str(err) + "- required module not found") + + +class _timespec(ctypes.Structure): + _fields_ = [ + ('tv_sec', ctypes.c_long), + ('tv_nsec', ctypes.c_long) + ] + + +class Watchdog(WatchdogBase): + """ + Abstract base class for interfacing with a hardware watchdog module + """ + + TIMERS = [15, 20, 30, 40, 50, 60, 65, 70, 80, 100, 120, 140, 160, 180, 210, 240] + + armed_time = 0 + timeout = 0 + CLOCK_MONOTONIC = 1 + + def __init__(self): + self._librt = ctypes.CDLL('librt.so.1', use_errno=True) + self._clock_gettime = self._librt.clock_gettime + self._clock_gettime.argtypes = [ctypes.c_int, ctypes.POINTER(_timespec)] + self.watchdog_reg = "watchdog" + + @staticmethod + def _get_cpld_register(reg_name): + # On successful read, returns the value read from given + # reg name and on failure rethrns 'ERR' + cpld_dir = "/sys/devices/platform/dell-s3248t-cpld.0/" + cpld_reg_file = cpld_dir + '/' + reg_name + try: + with open(cpld_reg_file, 'r') as file_des: + ret_val = file_des.read() + except IOError: + return 'ERR' + return ret_val.strip('\r\n').lstrip(' ') + + @staticmethod + def _set_cpld_register(reg_name, value): + # On successful write, returns the value will be written on + # reg_name and on failure returns 'ERR' + + cpld_dir = "/sys/devices/platform/dell-s3248t-cpld.0/" + cpld_reg_file = cpld_dir + '/' + reg_name + + try: + with open(cpld_reg_file, 'w') as file_des: + ret_val = file_des.write(str(value)) + except IOError: + ret_val = 'ERR' + + return ret_val + + def _get_reg_val(self): + value = self._get_cpld_register(self.watchdog_reg).strip() + if value == 'ERR': + return False + + return int(value, 16) + + def _set_reg_val(self, val): + value = self._set_cpld_register(self.watchdog_reg, val) + return value + + def _get_time(self): + """ + To get clock monotonic time + """ + t_spec = _timespec() + if self._clock_gettime(self.CLOCK_MONOTONIC, ctypes.pointer(t_spec)) != 0: + self._errno = ctypes.get_errno() + return 0 + return t_spec.tv_sec + t_spec.tv_nsec * 1e-9 + + def arm(self, seconds): + """ + Arm the hardware watchdog with a timeout of seconds. + If the watchdog is currently armed, calling this function will + simply reset the timer to the provided value. If the underlying + hardware does not support the value provided in , this + method should arm the watchdog with the *next greater* + available value. + + Returns: + An integer specifying the *actual* number of seconds the + watchdog was armed with. On failure returns -1. + """ + timer_offset = -1 + for key, timer_seconds in enumerate(self.TIMERS): + if 0 < seconds <= timer_seconds: + timer_offset = key + seconds = timer_seconds + break + + if timer_offset == -1: + return -1 + + # Extracting 5th to 8th bits for WD timer values + reg_val = self._get_reg_val() + wd_timer_offset = (reg_val >> 4) & 0xF + + if wd_timer_offset != timer_offset: + # Setting 5th to 8th bits + # value from timer_offset + self.disarm() + self._set_reg_val((reg_val & 0x07) | (timer_offset << 4)) + + if self.is_armed(): + # Setting last bit to WD Timer punch + # Last bit = WD Timer punch + self._set_reg_val(reg_val & 0xFE) + + else: + # Setting 4th bit to enable WD + # 4th bit = Enable WD + reg_val = self._get_reg_val() + self._set_reg_val(reg_val | 0x8) + + self.armed_time = self._get_time() + self.timeout = seconds + return seconds + + def disarm(self): + """ + Disarm the hardware watchdog + + Returns: + A boolean, True if watchdog is disarmed successfully, False + if not + """ + if self.is_armed(): + # Setting 4th bit to disable WD + # 4th bit = Disable WD + reg_val = self._get_reg_val() + self._set_reg_val(reg_val & 0xF7) + + self.armed_time = 0 + self.timeout = 0 + return True + + return False + + def is_armed(self): + """ + Retrieves the armed state of the hardware watchdog. + + Returns: + A boolean, True if watchdog is armed, False if not + """ + + # Extracting 4th bit to get WD Enable/Disable status + # 0 - Disabled WD + # 1 - Enabled WD + reg_val = self._get_reg_val() + wd_offset = (reg_val >> 3) & 1 + + return bool(wd_offset) + + def get_remaining_time(self): + """ + If the watchdog is armed, retrieve the number of seconds + remaining on the watchdog timer + + Returns: + An integer specifying the number of seconds remaining on + their watchdog timer. If the watchdog is not armed, returns + -1. + + S3248T doesnot have hardware support to show remaining time. + Due to this limitation, this API is implemented in software. + This API would return correct software time difference if it + is called from the process which armed the watchdog timer. + If this API called from any other process, it would return + 0. If the watchdog is not armed, this API would return -1. + """ + if not self.is_armed(): + return -1 + + if self.armed_time > 0 and self.timeout != 0: + cur_time = self._get_time() + + if cur_time <= 0: + return 0 + + diff_time = int(cur_time - self.armed_time) + + if diff_time > self.timeout: + return self.timeout + + return self.timeout - diff_time + + return 0 diff --git a/platform/broadcom/sonic-platform-modules-dell/s3248t/systemd/mux-ctrl.service b/platform/broadcom/sonic-platform-modules-dell/s3248t/systemd/mux-ctrl.service new file mode 100644 index 00000000000..b04314b1dc5 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s3248t/systemd/mux-ctrl.service @@ -0,0 +1,13 @@ +[Unit] +Description=Dell S3248T Platform MUX ctrl +Before=pmon.service +After=platform-modules-s3248t.service +DefaultDependencies=no + +[Service] +Type=oneshot +ExecStart=/usr/local/bin/mux_controller.sh +RemainAfterExit=yes + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-dell/s3248t/systemd/platform-modules-s3248t.service b/platform/broadcom/sonic-platform-modules-dell/s3248t/systemd/platform-modules-s3248t.service new file mode 100644 index 00000000000..def275ec469 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/s3248t/systemd/platform-modules-s3248t.service @@ -0,0 +1,14 @@ +[Unit] +Description=Dell S3248T Platform modules +Before=pmon.service +After=platform-init.service +DefaultDependencies=no + +[Service] +Type=oneshot +ExecStart=/usr/local/bin/s3248t_platform.sh init +ExecStop=/usr/local/bin/s3248t_platform.sh deinit +RemainAfterExit=yes + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-dell/z9864f/cfg/z9864f-modules.conf b/platform/broadcom/sonic-platform-modules-dell/z9864f/cfg/z9864f-modules.conf new file mode 100644 index 00000000000..c24537d9427 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/z9864f/cfg/z9864f-modules.conf @@ -0,0 +1,14 @@ +# /etc/modules: kernel modules to load at boot time. +# +# This file contains the names of kernel modules that should be loaded +# at boot time, one per line. Lines beginning with "#" are ignored. + +i2c-i801 +i2c-isch +i2c-ismt +i2c-dev +i2c-mux +i2c-smbus +i2c-mux-pca954x +ipmi_devintf +ipmi_si diff --git a/platform/broadcom/sonic-platform-modules-dell/z9864f/cfg/z9864f-params.conf b/platform/broadcom/sonic-platform-modules-dell/z9864f/cfg/z9864f-params.conf new file mode 100644 index 00000000000..621f3548a15 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/z9864f/cfg/z9864f-params.conf @@ -0,0 +1,2 @@ +options ipmi_si kipmid_max_busy_us=3000 +options i2c-smbus disable_spd=1 diff --git a/platform/broadcom/sonic-platform-modules-dell/z9864f/modules/Makefile b/platform/broadcom/sonic-platform-modules-dell/z9864f/modules/Makefile new file mode 100644 index 00000000000..bab11513f4a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/z9864f/modules/Makefile @@ -0,0 +1,4 @@ +MODULE_NAME = dell_z9864f_fpga +obj-m := $(MODULE_NAME).o +#$(MODULE_NAME)-y := fpga.o fpga_fileio.o +$(MODULE_NAME)-y := fpga.o fpga_attr.o fpga_gpio.o fpga_i2c.o fpga_reg.o diff --git a/platform/broadcom/sonic-platform-modules-dell/z9864f/modules/fpga.c b/platform/broadcom/sonic-platform-modules-dell/z9864f/modules/fpga.c new file mode 100644 index 00000000000..9ec7e1b4b70 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/z9864f/modules/fpga.c @@ -0,0 +1,179 @@ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "fpga.h" +#include "fpga_attr.h" +#include "fpga_gpio.h" +#include "fpga_i2c.h" +#include "fpga_reg.h" + +#define FPGA_PCA9548 +#define FPGA_GPIO +#define FPGA_ATTR + +#if 0 +struct file_operations fpga_fileops = { + .owner = THIS_MODULE, + .read = fpga_read, + .write = fpga_write, + .mmap = fpga_mmap, + /*.ioctl = fpga_ioctl,*/ + // .open = fpga_open, + .release = fpga_close, +}; +#endif + +static int dni_fpga_probe(struct pci_dev *dev, const struct pci_device_id *id) +{ + struct fpga_dev *fpga; + int error = -1; + int ret; + + dev_info(&dev->dev, "probe"); + + ret = pci_request_regions(dev, "delta-fpga"); + if (ret) + { + printk(KERN_ERR "Failed to request PCI region.\n"); + return ret; + } + + // enabling the device + ret = pci_enable_device(dev); + if (ret) + { + printk(KERN_ERR "Failed to enable PCI device.\n"); + return ret; + } + + if (!(pci_resource_flags(dev, 0) & IORESOURCE_MEM)) + { + printk(KERN_ERR "Incorrect BAR configuration.\n"); + ret = -ENODEV; + goto fail_map_bars; + } + + fpga = kzalloc(sizeof(struct fpga_dev), GFP_KERNEL); + if (!fpga) + { + dev_warn(&dev->dev, "Couldn't allocate memory for fpga!\n"); + return -ENOMEM; + } + fpga->dev = dev; + fpga->buffer = kmalloc(BUF_SIZE * sizeof(char), GFP_KERNEL); + if (!fpga->buffer) + { + dev_warn(&dev->dev, "Couldn't allocate memory for buffer!\n"); + return -ENOMEM; + } +#ifdef FPGA_GPIO + /* init gpiodev */ + ret = gpiodev_init(dev, fpga); + if (ret) + { + dev_err(&dev->dev, "Couldn't create gpiodev!\n"); + return ret; + } +#endif + + ret = i2c_adapter_init(dev, fpga); + if (ret) + { + dev_err(&dev->dev, "Couldn't create i2c_adapter!\n"); + goto out_release_region; + } +#ifdef FPGA_ATTR + /* init fpga attr */ + ret = fpga_attr_init(dev, fpga); + if (ret) + { + dev_err(&dev->dev, "Couldn't init fpga attr!\n"); + return ret; + } +#endif + return 0; + +fail_map_bars: + pci_disable_device(dev); +out_release_region: + release_region(fpga->pci_base, fpga->pci_size); + + kfree((fpga)); + return error; +} + +static void dni_fpga_remove(struct pci_dev *dev) +{ + /* release fpga-i2c */ + int i = 0; + struct fpga_dev *fpga = pci_get_drvdata(dev); + printk(KERN_INFO "fpga = %p\n", fpga); + + for (i = 0; i < num_i2c_adapter; i++) + { + i2c_del_adapter(&(fpga->i2c + i)->adapter); + printk(KERN_INFO "remove - FPGA-I2C-%d\n", i); + } +#ifdef FPGA_GPIO + /* remove gpio */ + gpiodev_exit(dev); +#endif + /* release pci */ + pci_disable_device(dev); + pci_release_regions(dev); + /*release attribute */ +#ifdef FPGA_ATTR + fpga_attr_exit(); +#endif + kfree(fpga); + ////printk(KERN_INFO "Goodbye\n"); +} + +enum chiptype +{ + LATTICE +}; + +static const struct of_device_id dni_fpga_of_match[] = { + {.compatible = "dni,fpga-i2c"}, + {/* sentinel */}}; + +static const struct pci_device_id dni_fpga_ids[] = { + {PCI_DEVICE(0x1204, 0x9c1d)}, + {0}, +}; + +MODULE_DEVICE_TABLE(pci, dni_fpga_ids); + +static struct pci_driver dni_fpga_driver = { + .name = "delta-fpga", + .id_table = dni_fpga_ids, + .probe = dni_fpga_probe, + .remove = dni_fpga_remove, +}; + +static int dni_fpga_init(void) +{ + printk(KERN_INFO "delta-fpga-init\n"); + return pci_register_driver(&dni_fpga_driver); +} + +static void dni_fpga_exit(void) +{ + pci_unregister_driver(&dni_fpga_driver); + printk(KERN_INFO "delta-fpga-exit\n"); +} + +MODULE_AUTHOR("amos.lin@deltaww.com"); +MODULE_DESCRIPTION("Delta FPGA Driver"); +MODULE_LICENSE("GPL"); + +module_init(dni_fpga_init); +module_exit(dni_fpga_exit); diff --git a/platform/broadcom/sonic-platform-modules-dell/z9864f/modules/fpga.h b/platform/broadcom/sonic-platform-modules-dell/z9864f/modules/fpga.h new file mode 100644 index 00000000000..5ae35bd436e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/z9864f/modules/fpga.h @@ -0,0 +1,92 @@ +#ifndef __FGPA_H__ +#define __FGPA_H__ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define FPGA_I2C_BUSNUM 5 +#define FPGA_I2C_MUX_DIS 0 +#define FPGA_I2C_MUX_EN 1 + +#define FPGA_JTAG_MUX_REG 0x100 +#define FPGA_JTAG_CTRL0_REG 0x104 +#define FPGA_JTAG_CTRL1_REG 0x108 +#define FPGA_JTAG_CTRL2_REG 0x10C + +typedef struct fpga_i2c +{ + char name[50]; + int bus; + int offset; + int mux_en; + int mux_addr; + int num_ch; +} fpga_i2c_s; + +typedef struct fpga_gpio +{ + int num; + char name[50]; + int reg; + int bit; +} fpga_gpio_s; + +struct i2c_bus_dev +{ + struct i2c_adapter adapter; + int offset; + int busnum; + int mux_ch; + int mux_en; + void *__iomem bar; +}; + +struct fpga_gpio_chip +{ + struct gpio_chip gpio_chip; + struct mutex lock; + void *__iomem bar; + u32 registers; + /* + * Since the registers are chained, every byte sent will make + * the previous byte shift to the next register in the + * chain. Thus, the first byte sent will end up in the last + * register at the end of the transfer. So, to have a logical + * numbering, store the bytes in reverse order. + */ + u8 buffer[0]; +}; + +struct fpga_dev +{ + char name[64]; + struct pci_dev *dev; + struct i2c_bus_dev *i2c; + struct fpga_gpio_chip *gpio; + int pci_base; + int pci_size; + struct semaphore sem; + char *buffer; +}; + +static const size_t BUF_SIZE = PAGE_SIZE; + +#endif /* __FGPA_H__ */ \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-dell/z9864f/modules/fpga_attr.c b/platform/broadcom/sonic-platform-modules-dell/z9864f/modules/fpga_attr.c new file mode 100755 index 00000000000..0ca15115c62 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/z9864f/modules/fpga_attr.c @@ -0,0 +1,148 @@ +#include +#include +#include +#include +#include "fpga.h" +#include "fpga_attr.h" +#include "fpga_reg.h" + +static struct kobject *delta_fpga; +struct attribute **attrs; +struct attribute_group attr_grp; +void *__iomem bar; + +struct mutex fpga_attr_lock; + +static ssize_t delta_fpga_reg_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + fpga_sysfs_attr_st *fpga_container = TO_FPGA_SYSFS_ATTR(attr); + const delta_fpga_reg_st *fpga_reg = fpga_container->fpga_reg; + int offset = fpga_reg->offset; + int bit_offset = fpga_reg->bit_offset; + int n_bits = fpga_reg->n_bits; + unsigned int val, val_mask, reg_val; + + if (!fpga_reg->show) { + return -EOPNOTSUPP; + } + + if (fpga_reg->show != I2C_DEV_ATTR_SHOW_DEFAULT) { + return fpga_reg->show(dev, attr, buf); + } + + mutex_lock(&fpga_attr_lock); + + val_mask = ((unsigned long long)1 << (n_bits)) - 1; + reg_val = ioread32(bar + offset); + val = (reg_val >> bit_offset) & val_mask; + + mutex_unlock(&fpga_attr_lock); + + return scnprintf(buf, PAGE_SIZE, + "%#x\n\nNote:\n%s\n" + "Bit[%d:%d] @ register %#x, register value %#x\n", + val, (fpga_reg->help) ? fpga_reg->help : "", + bit_offset + n_bits - 1, + bit_offset, offset, reg_val); + +} + +static ssize_t delta_fpga_reg_store(struct device *dev, + struct device_attribute *attr, const char *buf, + size_t count) +{ + fpga_sysfs_attr_st *fpga_container = TO_FPGA_SYSFS_ATTR(attr); + const delta_fpga_reg_st *fpga_reg = fpga_container->fpga_reg; + int offset = fpga_reg->offset; + int bit_offset = fpga_reg->bit_offset; + int n_bits = fpga_reg->n_bits; + unsigned int val; + int req_val; + unsigned int req_val_mask; + unsigned int max = (((unsigned long long)1<store) { + return -EOPNOTSUPP; + } + + if (fpga_reg->store != I2C_DEV_ATTR_STORE_DEFAULT) { + return fpga_reg->store(dev, attr, buf, count); + } + + if (sscanf(buf, "%i", &req_val) <= 0) { + return -EINVAL; + } + if (req_val > max) + { + printk(KERN_ERR "maximum data is = 0x%x, but input data is 0x%x\n", max, req_val); + return -EINVAL; + } + + mutex_lock(&fpga_attr_lock); + + req_val_mask = max; + req_val &= req_val_mask; + val = ioread32(bar + offset); + + /* mask out all bits for the value requested */ + val &= ~(req_val_mask << bit_offset); + val |= req_val << bit_offset; + iowrite32(val, bar + offset); + + mutex_unlock(&fpga_attr_lock); + //return sprintf(buf, "%d\n", val); + return count; + +} + +static int fpga_attr_create(void) +{ + fpga_sysfs_attr_st *fpga_container; + int i; + int len = sizeof(sysfpga_reg_table)/sizeof(delta_fpga_reg_st); + + fpga_container = kzalloc(sizeof(fpga_sysfs_attr_st) * len ,GFP_KERNEL); + + attrs = kzalloc(sizeof(struct attribute *) * len+1 ,GFP_KERNEL); + + for(i = 0; i < len; i++, fpga_container++) + { + fpga_container->dev_attr.attr.name = sysfpga_reg_table[i].name; + fpga_container->dev_attr.attr.mode = 0660; + fpga_container->dev_attr.show = (void *)delta_fpga_reg_show; + fpga_container->dev_attr.store = (void *)delta_fpga_reg_store; + attrs[i] = &fpga_container->dev_attr.attr; + fpga_container->fpga_reg = &sysfpga_reg_table[i]; + } + + attr_grp.attrs = attrs; + + return 0; +} + +int fpga_attr_init(struct pci_dev *dev, struct fpga_dev *fpga) +{ + int error; + bar = ioremap(pci_resource_start(dev, 0), pci_resource_len(dev, 0)); + delta_fpga = kobject_create_and_add("delta_fpga", kernel_kobj); + if (!delta_fpga) + return -ENOMEM; + fpga_attr_create(); + + mutex_init(&fpga_attr_lock); + error = sysfs_create_group(delta_fpga,&attr_grp); + if (error) + { + kobject_put(delta_fpga); + pr_info("failed to create the delta_fpga_reg file " + "in /sys/kernel/delta_fpga\n"); + } + return 0; +} +int fpga_attr_exit(void) +{ + kobject_put(delta_fpga); + return 0; +} + diff --git a/platform/broadcom/sonic-platform-modules-dell/z9864f/modules/fpga_attr.h b/platform/broadcom/sonic-platform-modules-dell/z9864f/modules/fpga_attr.h new file mode 100755 index 00000000000..26776b26887 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/z9864f/modules/fpga_attr.h @@ -0,0 +1,35 @@ +#ifndef __FGPA_ATTR_H__ +#define __FGPA_ATTR_H__ + +typedef ssize_t (*i2c_dev_attr_show_fn)(struct device *dev, + struct device_attribute *attr, + char *buf); +typedef ssize_t (*i2c_dev_attr_store_fn)(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count); + +#define I2C_DEV_ATTR_SHOW_DEFAULT (i2c_dev_attr_show_fn)(1) +#define I2C_DEV_ATTR_STORE_DEFAULT (i2c_dev_attr_store_fn)(1) + +typedef struct delta_fpga_reg_st_ { + const char *name; + const char *help; + i2c_dev_attr_show_fn show; + i2c_dev_attr_store_fn store; + int offset; + int bit_offset; + int n_bits; +} delta_fpga_reg_st; + +typedef struct fpga_sysfs_attr_st_{ + struct device_attribute dev_attr; + const delta_fpga_reg_st *fpga_reg; +} fpga_sysfs_attr_st; + +#define TO_FPGA_SYSFS_ATTR(_attr) \ + container_of(_attr, fpga_sysfs_attr_st, dev_attr) + +int fpga_attr_init(struct pci_dev *dev, struct fpga_dev *fpga); +int fpga_attr_exit(void); + +#endif /* __FGPA_ATTR_H__ */ \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-dell/z9864f/modules/fpga_gpio.c b/platform/broadcom/sonic-platform-modules-dell/z9864f/modules/fpga_gpio.c new file mode 100755 index 00000000000..22dd8c11356 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/z9864f/modules/fpga_gpio.c @@ -0,0 +1,101 @@ +#include +#include +#include +#include +#include +#include +#include "fpga.h" +#include "fpga_gpio.h" + + +fpga_gpio_s fpga_gpio_info[] = { + {0, "ENABLE JTAG_0", FPGA_JTAG_MUX_REG, 8}, + {1, "ENABLE JTAG_1", FPGA_JTAG_MUX_REG, 9}, + {2, "ENABLE JTAG_2", FPGA_JTAG_MUX_REG, 10}, + {3, "JTAG_0 FPGA_CPU_JTAG_TDI", FPGA_JTAG_CTRL0_REG, 3}, + {4, "JTAG_0 FPGA_CPU_JTAG_TDO", FPGA_JTAG_CTRL0_REG, 2}, + {5, "JTAG_0 FPGA_CPU_JTAG_TMS", FPGA_JTAG_CTRL0_REG, 1}, + {6, "JTAG_0 FPGA_CPU_JTAG_TCK", FPGA_JTAG_CTRL0_REG, 0}, + {7, "JTAG_1 FPGA_MB_JTAG_TDI", FPGA_JTAG_CTRL1_REG, 3}, + {8, "JTAG_1 FPGA_MB_JTAG_TDO", FPGA_JTAG_CTRL1_REG, 2}, + {9, "JTAG_1 FPGA_MB_JTAG_TMS", FPGA_JTAG_CTRL1_REG, 1}, + {10, "JTAG_1 FPGA_MB_JTAG_TCK", FPGA_JTAG_CTRL1_REG, 0}, + {11, "JTAG_2 FPGA_MB_JTAG_TRST_N", FPGA_JTAG_CTRL2_REG, 4}, + {12, "JTAG_2 FPGA_MB_JTAG_TDI", FPGA_JTAG_CTRL2_REG, 3}, + {13, "JTAG_2 FPGA_MB_JTAG_TDO", FPGA_JTAG_CTRL2_REG, 2}, + {14, "JTAG_2 FPGA_MB_JTAG_TMS", FPGA_JTAG_CTRL2_REG, 1}, + {15, "JTAG_2 FPGA_MB_JTAG_TCK", FPGA_JTAG_CTRL2_REG, 0}, +}; + +static int fpga_gpio_get(struct gpio_chip *gc, unsigned gpio) +{ + struct fpga_gpio_chip *chip = gpiochip_get_data(gc); + int rdata; + int ret; + int reg = fpga_gpio_info[gpio].reg; + int bit = fpga_gpio_info[gpio].bit; + + mutex_lock(&chip->lock); + //ret = (chip->buffer[bank] >> pin) & 0x1; + rdata = ioread32(chip->bar + reg); + ret = (rdata >> bit) & 0x1; + //printk(KERN_INFO "gpio = 0x%x chip->bar = 0x%x value = 0x%x", gpio, chip->bar, rdata); + + mutex_unlock(&chip->lock); + + return ret; +} + +static void fpga_gpio_set(struct gpio_chip *gc, + unsigned gpio, int val) +{ + struct fpga_gpio_chip *chip = gpiochip_get_data(gc); + int rdata, wdata; + int reg = fpga_gpio_info[gpio].reg; + int bit = fpga_gpio_info[gpio].bit; + + mutex_lock(&chip->lock); + + rdata = ioread32(chip->bar + reg); + + if (val) + wdata = rdata | (1 << bit); + else + wdata = rdata & ~(1 << bit); + + iowrite32(wdata, chip->bar + reg); + + mutex_unlock(&chip->lock); +} + +int gpiodev_init(struct pci_dev *dev, struct fpga_dev *fpga) +{ + char name[20] = "fpga-gpio chip"; + int err; + fpga->gpio = kzalloc(sizeof(struct fpga_gpio_chip), GFP_KERNEL); + if (!fpga->gpio) + return -ENOMEM; + + fpga->gpio->bar = ioremap(pci_resource_start(dev, 0), pci_resource_len(dev, 0)); + fpga->gpio->gpio_chip.base = -1; + fpga->gpio->gpio_chip.label = name; + fpga->gpio->gpio_chip.owner = THIS_MODULE; + fpga->gpio->gpio_chip.ngpio = 32; + fpga->gpio->gpio_chip.parent = &dev->dev; //(struct devices) fpga + + fpga->gpio->gpio_chip.get = fpga_gpio_get; + fpga->gpio->gpio_chip.set = fpga_gpio_set; + err = gpiochip_add_data(&fpga->gpio->gpio_chip, fpga->gpio); + if (err) + { + printk(KERN_INFO "GPIO registering failed "); + return err; + } + return 0; +} + +void gpiodev_exit(struct pci_dev *dev) +{ + struct fpga_dev *fpga = pci_get_drvdata(dev); + gpiochip_remove(&fpga->gpio->gpio_chip); +} \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-dell/z9864f/modules/fpga_gpio.h b/platform/broadcom/sonic-platform-modules-dell/z9864f/modules/fpga_gpio.h new file mode 100755 index 00000000000..6891e81948d --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/z9864f/modules/fpga_gpio.h @@ -0,0 +1,7 @@ +#ifndef __FGPA_GPIO_H__ +#define __FGPA_GPIO_H__ + +int gpiodev_init(struct pci_dev *dev, struct fpga_dev *fpga); +void gpiodev_exit(struct pci_dev *dev); + +#endif /* __FGPA_GPIO_H__ */ \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-dell/z9864f/modules/fpga_i2c.c b/platform/broadcom/sonic-platform-modules-dell/z9864f/modules/fpga_i2c.c new file mode 100755 index 00000000000..69041704636 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/z9864f/modules/fpga_i2c.c @@ -0,0 +1,514 @@ +#include +#include +#include +#include +#include "fpga.h" +#include "fpga_attr.h" +#include "fpga_gpio.h" +#include "fpga_i2c.h" + +int num_i2c_adapter; + +fpga_i2c_s fpga_i2c_info[] = { + {"FPGA SMBUS - PLD" , 0, DELTA_I2C_BASE(0), FPGA_I2C_MUX_DIS, 0x00, 0}, + {"FPGA SMBUS - MON" , 1, DELTA_I2C_BASE(1), FPGA_I2C_MUX_DIS, 0x00, 0}, + {"FPGA SMBUS - PORT_0" , 2, DELTA_I2C_BASE(2), FPGA_I2C_MUX_DIS, 0x00, 0}, + {"FPGA SMBUS - PORT_1" , 3, DELTA_I2C_BASE(3), FPGA_I2C_MUX_DIS, 0x00, 0}, + {"FPGA SMBUS - PORT_2" , 4, DELTA_I2C_BASE(4), FPGA_I2C_MUX_DIS, 0x00, 0}, + {"FPGA SMBUS - PORT_3" , 5, DELTA_I2C_BASE(5), FPGA_I2C_MUX_DIS, 0x00, 0}, + {"FPGA SMBUS - PORT_4" , 6, DELTA_I2C_BASE(6), FPGA_I2C_MUX_DIS, 0x00, 0}, + {"FPGA SMBUS - PORT_5" , 7, DELTA_I2C_BASE(7), FPGA_I2C_MUX_DIS, 0x00, 0}, + {"FPGA SMBUS - PORT_6" , 8, DELTA_I2C_BASE(8), FPGA_I2C_MUX_DIS, 0x00, 0}, + {"FPGA SMBUS - PORT_7" , 9, DELTA_I2C_BASE(9), FPGA_I2C_MUX_DIS, 0x00, 0}, + {"FPGA SMBUS - 1588 DPLL" , 10, DELTA_DPLL_I2C_BASE, FPGA_I2C_MUX_DIS, 0x00, 0}, + {"FPGA SMBUS - 1588 FPGA" , 11, DELTA_FPGA_I2C_BASE, FPGA_I2C_MUX_DIS, 0x00, 0}, +}; + +static int delta_wait_i2c_complete(struct i2c_bus_dev *i2c); +static void delta_fpga_i2c_data_reg_set(struct i2c_bus_dev *i2c, int addr, int data); +static void delta_fpga_i2c_addr_reg_set(struct i2c_bus_dev *i2c, int data); +static void delta_fpga_i2c_ctrl_set(struct i2c_bus_dev *i2c, int data); +static int delta_fpga_i2c_ctrl_get(struct i2c_bus_dev *i2c); + +static int dni_fpga_i2c_read(struct i2c_bus_dev *i2c, int addr, int raddr, int rsize, uint8_t *readout, int dsize); +static int dni_fpga_i2c_write(struct i2c_bus_dev *i2c, int addr, int raddr, int rsize, uint8_t *data, int dsize); +static int io_read(struct i2c_bus_dev *i2c, int offset); +static void io_write(struct i2c_bus_dev *i2c, int offset, int data); + +struct mutex fpga_i2c_lock; + +static s32 dni_fpga_i2c_access(struct i2c_adapter *adap, u16 addr, + unsigned short flags, char read_write, u8 command, int size, + union i2c_smbus_data *data) +{ + struct i2c_bus_dev *i2c = adap->algo_data; + int len; + uint8_t i2c_data; + int rv = 0; + + mutex_lock(&fpga_i2c_lock); + // printk(KERN_INFO "size=%d, read_write=%d addr=0x%x command=0x%x fpga_bus=%d \n",size,read_write,addr,command,i2c->busnum); + switch (size) + { + + case I2C_SMBUS_QUICK: + // printk(KERN_INFO "I2C_SMBUS_QUICK"); + rv = dni_fpga_i2c_write(i2c, addr, command, 0, &i2c_data, 0); + goto done; + break; + case I2C_SMBUS_BYTE: + // printk(KERN_INFO "I2C_SMBUS_BYTE"); + if (read_write == I2C_SMBUS_WRITE) + { + rv = dni_fpga_i2c_write(i2c, addr, command, 1, &i2c_data, 0); + goto done; + } + else + { + rv = dni_fpga_i2c_read(i2c, addr, command, 1, &data->byte, 1); + goto done; + } + + break; + case I2C_SMBUS_BYTE_DATA: + if (read_write == I2C_SMBUS_WRITE) + { + rv = dni_fpga_i2c_write(i2c, addr, command, 1, &data->byte, 1); + goto done; + } + else + { + rv = dni_fpga_i2c_read(i2c, addr, command, 1, &data->byte, 1); + goto done; + } + break; + case I2C_SMBUS_WORD_DATA: + if (read_write == I2C_SMBUS_WRITE) + { + /* TODO: not verify */ + rv = dni_fpga_i2c_write(i2c, addr, command, 1, (uint8_t *)&data->word, 2); + // printk(KERN_INFO "I2C_FUNC_SMBUS_WORD_DATA write"); + goto done; + } + else + { + rv = dni_fpga_i2c_read(i2c, addr, command, 1, (uint8_t *)&data->word, 2); + goto done; + } + break; + + case I2C_SMBUS_BLOCK_DATA: + if (read_write == I2C_SMBUS_WRITE) + { + + len = min_t(u8, data->block[0], I2C_SMBUS_BLOCK_MAX); + rv = dni_fpga_i2c_write(i2c, addr, command, 1, &data->block[0], len + 1); + goto done; + } + else + { + // dni_fpga_i2c_read(i2c, addr, command, 1, &data->byte, 1); + // len = min_t(u8, data->byte, I2C_SMBUS_BLOCK_MAX); + len = I2C_SMBUS_BLOCK_MAX; + rv = dni_fpga_i2c_read(i2c, addr, command, 1, &data->block[0], len + 1); + goto done; + } + break; + case I2C_SMBUS_I2C_BLOCK_DATA: + if (read_write == I2C_SMBUS_WRITE) + { + len = min_t(u8, data->block[0], I2C_SMBUS_BLOCK_MAX); + rv = dni_fpga_i2c_write(i2c, addr, command, 1, &data->block[1], len); + goto done; + } + else + { + len = min_t(u8, data->block[0], I2C_SMBUS_BLOCK_MAX); + rv = dni_fpga_i2c_read(i2c, addr, command, 1, &data->block[1], len); + goto done; + } + break; + case I2C_SMBUS_PROC_CALL: + + break; + case I2C_SMBUS_BLOCK_PROC_CALL: + break; + } + + mutex_unlock(&fpga_i2c_lock); + return -1; +done: + mutex_unlock(&fpga_i2c_lock); + return rv; + +} + +static int delta_wait_i2c_complete(struct i2c_bus_dev *i2c) +{ + unsigned long timeout = 0; + uint64_t status; + + while ((status = delta_fpga_i2c_ctrl_get(i2c)) & I2C_TRANS_ENABLE) + { + if (timeout > DELTA_I2C_WAIT_BUS_TIMEOUT) + { + printk(KERN_INFO "i2c wait for complete timeout: time=%lu us status=0x%llx", timeout, status); + return -ETIMEDOUT; + } + udelay(100); + timeout += 100; + } + + return 0; +} + +static void delta_fpga_i2c_data_reg_set(struct i2c_bus_dev *i2c, int addr, int data) +{ + + uint64_t hi_cmd, lo_cmd, i2c_cmd; + int offset; + hi_cmd = 0; + lo_cmd = data; + i2c_cmd = (hi_cmd << 32) | lo_cmd; + offset = DELTA_I2C_DATA(i2c->offset) + addr; + io_write(i2c, offset, i2c_cmd); +} + +static void delta_fpga_i2c_addr_reg_set(struct i2c_bus_dev *i2c, int data) +{ + uint64_t hi_cmd, lo_cmd, i2c_cmd; + int offset; + hi_cmd = 0; + lo_cmd = data; + i2c_cmd = (hi_cmd << 32) | lo_cmd; + offset = DELTA_I2C_ADDR(i2c->offset); + io_write(i2c, offset, i2c_cmd); +} +#ifdef FPGA_PCA9548 +static void delta_fpga_i2c_conf_reg_set(struct i2c_bus_dev *i2c, int data) +{ + uint64_t hi_cmd, lo_cmd, i2c_cmd; + int offset; + if (ch == 2) + { + hi_cmd = 0; + lo_cmd = (data << 25) | 0x5A; //100Khz + i2c_cmd = (hi_cmd << 32) | lo_cmd; + offset = DELTA_I2C_CONF(i2c->offset); + io_write(i2c, offset, i2c_cmd); + } +} +#endif +static void delta_fpga_i2c_ctrl_set(struct i2c_bus_dev *i2c, int data) +{ + uint64_t hi_cmd, lo_cmd, i2c_cmd; + int offset; + hi_cmd = 0; + lo_cmd = data; + i2c_cmd = (hi_cmd << 32) | lo_cmd; + offset = DELTA_I2C_CTRL(i2c->offset); + io_write(i2c, offset, i2c_cmd); +} + +static int delta_fpga_i2c_ctrl_get(struct i2c_bus_dev *i2c) +{ + int offset; + offset = DELTA_I2C_CTRL(i2c->offset); + return io_read(i2c, offset); +} + + +static int dni_fpga_i2c_write(struct i2c_bus_dev *i2c, int addr, int raddr, int rsize, uint8_t *data, int dsize) +{ + int status; + uint32_t ctrl_data, addr_data, rw_data; + + int rv = -1; + int offset, i; + int four_byte, one_byte; + + four_byte = dsize / 4; + one_byte = dsize % 4; + + if (i2c->mux_en == FPGA_I2C_MUX_EN) + { + if (addr < 0x50 || addr > 0x58) + goto fail; + } + + for (i = 0; i < four_byte; i++) + { + offset = i * 4; + rw_data = (data[i * 4 + 3] << 24) | (data[i * 4 + 2] << 16) | (data[i * 4 + 1] << 8) | data[i * 4 + 0]; + delta_fpga_i2c_data_reg_set(i2c, offset, rw_data); + } + // printk(KERN_INFO "four_byte : rw_data = 0x%lx",rw_data); + rw_data = 0; + for (i = 0; i < one_byte; i++) + { + rw_data |= (data[four_byte * 4 + i] << (i * 8)); + } + offset = four_byte * 4; + delta_fpga_i2c_data_reg_set(i2c, offset, rw_data); + + // printk(KERN_INFO "one_byte : rw_data = 0x%lx",rw_data); + + /* Set address register */ + if (rsize == 0) + addr_data = 0; + else if (rsize == 1) + { + addr = addr + (raddr / 0x100); + addr_data = (raddr & 0xff); + } + else if (rsize == 2) + addr_data = (raddr & 0xffff); + delta_fpga_i2c_addr_reg_set(i2c, addr_data); +#ifdef FPGA_PCA9548 + delta_fpga_i2c_conf_reg_set(i2c, ch, 0x70); +#endif + ctrl_data = 0; + /* Set ctrl reg */ + ctrl_data |= ((addr & 0x7f) << DELTA_FPGA_I2C_SLAVE_OFFSET); + ctrl_data |= ((rsize & 0x3) << DELTA_FPGA_I2C_REG_LEN_OFFSET); + ctrl_data |= ((dsize & 0x1ff) << DELTA_FPGA_I2C_DATA_LEN_OFFSET); + ctrl_data |= 1 << DELTA_FPGA_I2C_RW_OFFSET; + ctrl_data |= 1 << DELTA_FPGA_I2C_START_OFFSET; +#ifdef FPGA_PCA9548 + if (i2c->mux_en == FPGA_I2C_MUX_EN) + { + ctrl_data |= ((i2c->mux_ch & 0x7) << DELTA_FPGA_I2C_CH_SEL_OFFSET); + ctrl_data |= ((1 & 0x1) << DELTA_FPGA_I2C_CH_EN_OFFSET); + } +#endif + /* check rsize */ + if (rsize > 2) + { + return -1; + } + + delta_fpga_i2c_ctrl_set(i2c, ctrl_data); + /* wait for i2c transaction completion */ + if (delta_wait_i2c_complete(i2c)) + { + printk(KERN_INFO "i2c transaction completion timeout"); + rv = -EBUSY; + return rv; + } + /* check status */ + //DNI_LOG_INFO("check i2c transaction status ..."); + status = io_read(i2c, DELTA_I2C_CTRL(i2c->offset)); + // udelay(500); + if ((status & I2C_TRANS_FAIL)) + { + // printk(KERN_INFO "I2C read failed: status=0x%lx", status); + rv = -EIO; /* i2c transfer error */ + goto fail; + } + return 0; +fail: + + return rv; +} + +static int dni_fpga_i2c_read(struct i2c_bus_dev *i2c, int addr, int raddr, int rsize, uint8_t *readout, int dsize) +{ + int status; + uint32_t ctrl_data, addr_data, rw_data; + int offset; + int rv = -1; + int i; + + if (i2c->mux_en == FPGA_I2C_MUX_EN) + { + if (addr < 0x50 || addr > 0x58) + goto fail; + } + + /* Set address register */ + if (rsize == 0) + addr_data = 0; + else if (rsize == 1) + { + addr = addr + (raddr / 0x100); + addr_data = (raddr & 0xff); + } + else if (rsize == 2) + addr_data = (raddr & 0xffff); + delta_fpga_i2c_addr_reg_set(i2c, addr_data); +#ifdef FPGA_PCA9548 + delta_fpga_i2c_conf_reg_set(i2c, ch, 0x70); +#endif + ctrl_data = 0; + /* Set ctrl reg */ + ctrl_data |= ((addr & 0x7f) << DELTA_FPGA_I2C_SLAVE_OFFSET); + ctrl_data |= ((rsize & 0x3) << DELTA_FPGA_I2C_REG_LEN_OFFSET); + ctrl_data |= ((dsize & 0x1ff) << DELTA_FPGA_I2C_DATA_LEN_OFFSET); + ctrl_data |= 0 << DELTA_FPGA_I2C_RW_OFFSET; + ctrl_data |= 1 << DELTA_FPGA_I2C_START_OFFSET; +#ifdef FPGA_PCA9548 + if (i2c->mux_en == FPGA_I2C_MUX_EN) + { + ctrl_data |= ((i2c->mux_ch & 0x7) << DELTA_FPGA_I2C_CH_SEL_OFFSET); + ctrl_data |= ((1 & 0x1) << DELTA_FPGA_I2C_CH_EN_OFFSET); + } +#endif + /* check rsize */ + if (rsize > 2) + { + goto fail; + } + + delta_fpga_i2c_ctrl_set(i2c, ctrl_data); + /* wait for i2c transaction completion */ + if (delta_wait_i2c_complete(i2c)) + { + printk(KERN_ERR "i2c transaction completion timeout"); + rv = -EBUSY; + goto fail; + } + /* check status */ + //DNI_LOG_INFO("check i2c transaction status ...\n"); + udelay(100); + status = io_read(i2c, DELTA_I2C_CTRL(i2c->offset)); + if ((status & I2C_TRANS_FAIL)) + { + //printk(KERN_ERR "I2C read failed:addr_data=0x%lx, ctrl_data=0x%lx, status=0x%lx ",addr_data, ctrl_data ,status); + rv = -EIO; /* i2c transfer error */ + goto fail; + } + + for (i = 1; i <= dsize; i++) + { + if ((i - 1) % 4 == 0) + { + offset = DELTA_I2C_DATA(i2c->offset) + (i - 1); + rw_data = io_read(i2c, offset); + } + readout[i - 1] = (uint8_t)(rw_data >> (((i - 1) % 4) * 8)); + } + return 0; +fail: + return -1; +} + +static int io_read(struct i2c_bus_dev *i2c, int offset) +{ + return ioread32(i2c->bar + offset); +} +static void io_write(struct i2c_bus_dev *i2c, int offset, int data) +{ + iowrite32(data, i2c->bar + offset); +} + +static u32 dni_fpga_i2c_func(struct i2c_adapter *adapter) +{ + return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE | + I2C_FUNC_SMBUS_BYTE_DATA | + I2C_FUNC_SMBUS_WORD_DATA | I2C_FUNC_SMBUS_BLOCK_DATA | + I2C_FUNC_SMBUS_PROC_CALL | I2C_FUNC_SMBUS_BLOCK_PROC_CALL | + I2C_FUNC_SMBUS_I2C_BLOCK | I2C_FUNC_SMBUS_PEC; +} + +static const struct i2c_algorithm smbus_algorithm = { + .smbus_xfer = dni_fpga_i2c_access, + .functionality = dni_fpga_i2c_func, +}; + +int i2c_adapter_init(struct pci_dev *dev, struct fpga_dev *fpga) +{ + int pci_base, pci_size; + int i, j, error, bus = 0; + int num_i2c_master; + + num_i2c_master = sizeof(fpga_i2c_info) / sizeof(fpga_i2c_s); + for (i = 0; i < num_i2c_master; i++) + { + num_i2c_adapter++; + if (fpga_i2c_info[i].mux_en == FPGA_I2C_MUX_EN) + num_i2c_adapter += fpga_i2c_info[i].num_ch; + } + pci_base = pci_resource_start(dev, 0); + pci_size = pci_resource_len(dev, 0); + + fpga->i2c = kzalloc(sizeof(struct i2c_bus_dev) * num_i2c_adapter, GFP_KERNEL); + + if (!fpga) + return -ENOMEM; + + pci_set_drvdata(dev, fpga); + printk(KERN_INFO "fpga = %p, pci_size = 0x%x \n", fpga, pci_size); + mutex_init(&fpga_i2c_lock); + /* Create PCIE device */ + for (i = 0; i < num_i2c_master; i++) + { + fpga->dev = dev; + fpga->pci_base = pci_base; + fpga->pci_size = pci_size; + + (fpga->i2c + bus)->bar = ioremap(pci_resource_start(dev, 0), pci_resource_len(dev, 0)); + + printk(KERN_INFO "BAR0 Register[%p] = 0x%x\n", + (fpga->i2c + bus)->bar, ioread32((fpga->i2c + bus)->bar)); + /* Create I2C adapter */ + printk(KERN_INFO "dev-%d, pci_base = 0x%x, dev_offset = 0x%x", i, fpga->pci_base, fpga_i2c_info[i].offset); + (fpga->i2c + bus)->adapter.owner = THIS_MODULE; + snprintf((fpga->i2c + bus)->adapter.name, sizeof((fpga->i2c + bus)->adapter.name), + fpga_i2c_info[i].name, i); + (fpga->i2c + bus)->adapter.class = I2C_CLASS_HWMON; + (fpga->i2c + bus)->adapter.algo = &smbus_algorithm; + (fpga->i2c + bus)->adapter.algo_data = fpga->i2c + bus; + /* set up the sysfs linkage to our parent device */ + (fpga->i2c + bus)->adapter.dev.parent = &dev->dev; + /* set i2c adapter number */ + (fpga->i2c+bus)->adapter.nr = i+600; + /* set up the busnum */ + (fpga->i2c + bus)->busnum = i; + (fpga->i2c + bus)->offset = fpga_i2c_info[i].offset; + /* set up i2c mux */ + (fpga->i2c + bus)->mux_ch = 0; + (fpga->i2c + bus)->mux_en = FPGA_I2C_MUX_DIS; + + error = i2c_add_numbered_adapter(&(fpga->i2c+bus)->adapter); + //error = i2c_add_adapter(&(fpga->i2c + bus)->adapter); + if (error) + goto out_release_region; + + bus++; + if (fpga_i2c_info[i].mux_en == FPGA_I2C_MUX_EN) + { + for (j = 0; j < fpga_i2c_info[i].num_ch; j++) + { + (fpga->i2c + bus)->bar = ioremap(pci_resource_start(dev, 0), pci_resource_len(dev, 0)); + + printk(KERN_INFO "BAR0 Register[%p] = 0x%x\n", + (fpga->i2c + bus)->bar, ioread32((fpga->i2c + bus)->bar)); + + /* Create I2C adapter */ + printk(KERN_INFO "dev-%d, pci_base = 0x%x, dev_offset = 0x%x", i, fpga->pci_base, fpga_i2c_info[i].offset); + (fpga->i2c + bus)->adapter.owner = THIS_MODULE; + snprintf((fpga->i2c + bus)->adapter.name, sizeof((fpga->i2c + bus)->adapter.name), + fpga_i2c_info[i].name, i, j); + (fpga->i2c + bus)->adapter.class = I2C_CLASS_HWMON; + (fpga->i2c + bus)->adapter.algo = &smbus_algorithm; + (fpga->i2c + bus)->adapter.algo_data = fpga->i2c + bus; + /* set up the sysfs linkage to our parent device */ + (fpga->i2c + bus)->adapter.dev.parent = &dev->dev; + /* set i2c adapter number */ + // (fpga->i2c+bus)->adapter.nr = i+10; + /* set up the busnum */ + (fpga->i2c + bus)->busnum = i; + /* set up i2c mux */ + (fpga->i2c + bus)->mux_ch = j; + (fpga->i2c + bus)->mux_en = FPGA_I2C_MUX_EN; + error = i2c_add_adapter(&(fpga->i2c + bus)->adapter); + if (error) + goto out_release_region; + bus++; + } + } + } + return 0; +out_release_region: + return error; +} diff --git a/platform/broadcom/sonic-platform-modules-dell/z9864f/modules/fpga_i2c.h b/platform/broadcom/sonic-platform-modules-dell/z9864f/modules/fpga_i2c.h new file mode 100755 index 00000000000..30308d98db1 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/z9864f/modules/fpga_i2c.h @@ -0,0 +1,38 @@ +#ifndef __FGPA_I2C_H__ +#define __FGPA_I2C_H__ + +#include "fpga.h" + +extern int num_i2c_adapter; +int i2c_adapter_init(struct pci_dev *dev, struct fpga_dev *fpga); + +#define DELTA_I2C_WAIT_BUS_TIMEOUT 100000 /* 100000us = 100ms */ +#define DELTA_I2C_OFFSET 0x1000 +#define DELTA_I2C_BASE(s) ((DELTA_I2C_OFFSET) + ((0x300) * (s))) +#define DELTA_I2C_CONF(s) ((s) + 0x0 ) +#define DELTA_I2C_ADDR(s) ((s) + 0x8 ) +#define DELTA_I2C_CTRL(s) ((s) + 0x4 ) +#define DELTA_I2C_DATA(s) ((s) + 0x100 ) + +#define DELTA_DPLL_I2C_BASE 0x300 +#define DELTA_FPGA_I2C_BASE 0x600 + +#define DELTA_I2C_GRABBER_OFFSET 0x1000 +#define DELTA_I2C_GRABBER_CONF(s) ((DELTA_I2C_GRABBER_OFFSET) + ((0x300) * (s))) +#define DELTA_I2C_GRABBER_ADDR(s) ((DELTA_I2C_GRABBER_OFFSET) + ((0x300) * (s)) + 0x8) +#define DELTA_I2C_GRABBER_CTRL(s) ((DELTA_I2C_GRABBER_OFFSET) + ((0x300) * (s)) + 0x4) +#define DELTA_I2C_GRABBER_DATA(s) ((DELTA_I2C_GRABBER_OFFSET) + ((0x300) * (s)) + 0x100) + +#define I2C_BUS_READY 0x4 +#define I2C_TRANS_FAIL 0x2 +#define I2C_TRANS_ENABLE 0x1 +#define DELTA_FPGA_I2C_START_OFFSET 0 +#define DELTA_FPGA_I2C_RW_OFFSET 3 +#define DELTA_FPGA_I2C_REG_LEN_OFFSET 8 +#define DELTA_FPGA_I2C_CH_SEL_OFFSET 10 +#define DELTA_FPGA_I2C_CH_EN_OFFSET 13 +#define DELTA_FPGA_I2C_DATA_LEN_OFFSET 15 +#define DELTA_FPGA_I2C_SLAVE_OFFSET 25 + + +#endif /* __FGPA_I2C_H__ */ \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-dell/z9864f/modules/fpga_reg.c b/platform/broadcom/sonic-platform-modules-dell/z9864f/modules/fpga_reg.c new file mode 100755 index 00000000000..54ba50078c8 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/z9864f/modules/fpga_reg.c @@ -0,0 +1,34 @@ +/* # This file is automatically generated by x2c Tools. +# Do not modify this file -- YOUR CHANGES WILL BE ERASED!*/ +#include +#include +#include "fpga.h" +#include "fpga_attr.h" +#include "fpga_reg.h" + +const delta_fpga_reg_st sysfpga_reg_table[24] = { + { "sys-fpga-test", NULL, I2C_DEV_ATTR_SHOW_DEFAULT, I2C_DEV_ATTR_STORE_DEFAULT, 0x00, 0, 32 }, + { "sys-fpga-revision", NULL, I2C_DEV_ATTR_SHOW_DEFAULT, I2C_DEV_ATTR_STORE_DEFAULT, 0x08, 0, 32 }, + { "sys-fpga-board-id", NULL, I2C_DEV_ATTR_SHOW_DEFAULT, I2C_DEV_ATTR_STORE_DEFAULT, 0x0C, 0, 32 }, + { "psu-1-present", NULL, I2C_DEV_ATTR_SHOW_DEFAULT, I2C_DEV_ATTR_STORE_DEFAULT, 0x20, 16, 1 }, + { "psu-2-present", NULL, I2C_DEV_ATTR_SHOW_DEFAULT, I2C_DEV_ATTR_STORE_DEFAULT, 0x20, 20, 1 }, + { "psu-1-powergood", NULL, I2C_DEV_ATTR_SHOW_DEFAULT, I2C_DEV_ATTR_STORE_DEFAULT, 0x20, 17, 1 }, + { "psu-2-powergood", NULL, I2C_DEV_ATTR_SHOW_DEFAULT, I2C_DEV_ATTR_STORE_DEFAULT, 0x20, 21, 1 }, + { "uart-mux-control-reg", NULL, I2C_DEV_ATTR_SHOW_DEFAULT, I2C_DEV_ATTR_STORE_DEFAULT, 0x40, 0, 8 }, + { "sysled-sys-green-trigger", NULL, I2C_DEV_ATTR_SHOW_DEFAULT, I2C_DEV_ATTR_STORE_DEFAULT, 0x84, 1, 1 }, + { "sysled-sys-red-trigger", NULL, I2C_DEV_ATTR_SHOW_DEFAULT, I2C_DEV_ATTR_STORE_DEFAULT, 0x84, 0, 1 }, + { "sysled-sys-blink", NULL, I2C_DEV_ATTR_SHOW_DEFAULT, I2C_DEV_ATTR_STORE_DEFAULT, 0x84, 2, 1 }, + { "sysled-fan-green-trigger", NULL, I2C_DEV_ATTR_SHOW_DEFAULT, I2C_DEV_ATTR_STORE_DEFAULT, 0x88, 1, 1 }, + { "sysled-fan-red-trigger", NULL, I2C_DEV_ATTR_SHOW_DEFAULT, I2C_DEV_ATTR_STORE_DEFAULT, 0x88, 0, 1 }, + { "sysled-fan-blink", NULL, I2C_DEV_ATTR_SHOW_DEFAULT, I2C_DEV_ATTR_STORE_DEFAULT, 0x88, 2, 1 }, + { "sysled-power-green-trigger", NULL, I2C_DEV_ATTR_SHOW_DEFAULT, I2C_DEV_ATTR_STORE_DEFAULT, 0x8c, 1, 1 }, + { "sysled-power-red-trigger", NULL, I2C_DEV_ATTR_SHOW_DEFAULT, I2C_DEV_ATTR_STORE_DEFAULT, 0x8c, 0, 1 }, + { "sysled-power-blink", NULL, I2C_DEV_ATTR_SHOW_DEFAULT, I2C_DEV_ATTR_STORE_DEFAULT, 0x8c, 2, 1 }, + { "sysled-id1-blue-trigger", NULL, I2C_DEV_ATTR_SHOW_DEFAULT, I2C_DEV_ATTR_STORE_DEFAULT, 0x90, 0, 1 }, + { "sysled-id1-green-trigger", NULL, I2C_DEV_ATTR_SHOW_DEFAULT, I2C_DEV_ATTR_STORE_DEFAULT, 0x90, 1, 1 }, + { "sysled-id1-blink", NULL, I2C_DEV_ATTR_SHOW_DEFAULT, I2C_DEV_ATTR_STORE_DEFAULT, 0x90, 2, 1 }, + { "thermal-int", NULL, I2C_DEV_ATTR_SHOW_DEFAULT, I2C_DEV_ATTR_STORE_DEFAULT, 0x68, 3, 1 }, + { "port-cpld1-int", NULL, I2C_DEV_ATTR_SHOW_DEFAULT, I2C_DEV_ATTR_STORE_DEFAULT, 0x68, 5, 1 }, + { "port-cpld2-int", NULL, I2C_DEV_ATTR_SHOW_DEFAULT, I2C_DEV_ATTR_STORE_DEFAULT, 0x68, 9, 1 }, + { "sys-fpga-int-clean", NULL, I2C_DEV_ATTR_SHOW_DEFAULT, I2C_DEV_ATTR_STORE_DEFAULT, 0x60, 0, 1 }, +}; diff --git a/platform/broadcom/sonic-platform-modules-dell/z9864f/modules/fpga_reg.h b/platform/broadcom/sonic-platform-modules-dell/z9864f/modules/fpga_reg.h new file mode 100755 index 00000000000..505e7fc2f01 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/z9864f/modules/fpga_reg.h @@ -0,0 +1,6 @@ +#ifndef __FGPA_REG_H__ +#define __FGPA_REG_H__ + +extern const delta_fpga_reg_st sysfpga_reg_table[24]; + +#endif /* __FGPA_REG_H__ */ diff --git a/platform/broadcom/sonic-platform-modules-dell/z9864f/scripts/check_qsfp.sh b/platform/broadcom/sonic-platform-modules-dell/z9864f/scripts/check_qsfp.sh new file mode 100755 index 00000000000..4bde690b722 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/z9864f/scripts/check_qsfp.sh @@ -0,0 +1,3 @@ +# Temporary dummy file for Z9432F. +# Will be updated soon. + diff --git a/platform/broadcom/sonic-platform-modules-dell/z9864f/scripts/dpllupgrade_test b/platform/broadcom/sonic-platform-modules-dell/z9864f/scripts/dpllupgrade_test new file mode 100755 index 00000000000..76ceca4e995 Binary files /dev/null and b/platform/broadcom/sonic-platform-modules-dell/z9864f/scripts/dpllupgrade_test differ diff --git a/platform/broadcom/sonic-platform-modules-dell/z9864f/scripts/pcisysfs.py b/platform/broadcom/sonic-platform-modules-dell/z9864f/scripts/pcisysfs.py new file mode 100755 index 00000000000..9dd51bda5fc --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/z9864f/scripts/pcisysfs.py @@ -0,0 +1,103 @@ +#!/usr/bin/python3 +""" +# Copyright (c) 2015 Dell Inc. +# +# Licensed under the Apache License, Version 2.0 (the "License"); you may +# not use this file except in compliance with the License. You may obtain +# a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 +# +# THIS CODE IS PROVIDED ON AN *AS IS* BASIS, WITHOUT WARRANTIES OR +# CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED, INCLUDING WITHOUT +# LIMITATION ANY IMPLIED WARRANTIES OR CONDITIONS OF TITLE, FITNESS +# FOR A PARTICULAR PURPOSE, MERCHANTABLITY OR NON-INFRINGEMENT. +# +# See the Apache Version 2.0 License for specific language governing +# permissions and limitations under the License. +""" + +import struct +import sys +import getopt +import os +import mmap + +def usage(): + ''' This is the Usage Method ''' + + print('\t\t pcisysfs.py --get --offset --res ') + print('\t\t pcisysfs.py --set --val --offset --res ') + sys.exit(1) + +def pci_mem_read(mm, offset): + mm.seek(offset) + read_data_stream = mm.read(4) + print("") + reg_val = struct.unpack('I', read_data_stream) + print("reg_val read:%x"%reg_val) + return reg_val + +def pci_mem_write(mm, offset, data): + mm.seek(offset) + print("data to write:%x"%data) + mm.write(struct.pack('I', data)) + +def pci_set_value(resource, val, offset): + fd = os.open(resource, os.O_RDWR) + mm = mmap.mmap(fd, 0) + pci_mem_write(mm, offset, val) + +def pci_get_value(resource, offset): + fd = os.open(resource, os.O_RDWR) + mm = mmap.mmap(fd, 0) + pci_mem_read(mm, offset) + +def main(argv): + + ''' The main function will read the user input from the + command line argument and process the request ''' + + opts = '' + val = '' + choice = '' + resource = '' + offset = '' + + try: + opts, args = getopt.getopt(argv, "hgsv:", \ + ["val=", "res=", "offset=", "help", "get", "set"]) + + except getopt.GetoptError: + usage() + + for opt, arg in opts: + + if opt in ('-h', '--help'): + choice = 'help' + + elif opt in ('-g', '--get'): + choice = 'get' + + elif opt in ('-s', '--set'): + choice = 'set' + + elif opt == '--res': + resource = arg + + elif opt == '--val': + val = int(arg, 16) + + elif opt == '--offset': + offset = int(arg, 16) + + if choice == 'set' and val != '' and offset != '' and resource != '': + pci_set_value(resource, val, offset) + + elif choice == 'get' and offset != '' and resource != '': + pci_get_value(resource, offset) + + else: + usage() + +#Calling the main method +if __name__ == "__main__": + main(sys.argv[1:]) diff --git a/platform/broadcom/sonic-platform-modules-dell/z9864f/scripts/platform-modules-z9864f.sh b/platform/broadcom/sonic-platform-modules-dell/z9864f/scripts/platform-modules-z9864f.sh new file mode 100644 index 00000000000..0fe378af0a7 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/z9864f/scripts/platform-modules-z9864f.sh @@ -0,0 +1,8 @@ +#!/bin/bash + +function platform-modules-z9864fServicePreStop() +{ + docker exec -i pmon pkill -15 xcvrd_phy + sleep 3 + /usr/local/bin/z9864f_platform.sh media_down +} diff --git a/platform/broadcom/sonic-platform-modules-dell/z9864f/scripts/platform_sensors.py b/platform/broadcom/sonic-platform-modules-dell/z9864f/scripts/platform_sensors.py new file mode 100755 index 00000000000..25910a4e88f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/z9864f/scripts/platform_sensors.py @@ -0,0 +1,275 @@ +#!/usr/bin/python3 +""" +# Module on Z9864F, the BaseBoard Management Controller is an +# autonomous subsystem provides monitoring and management +# facility independent of the host CPU. IPMI standard +# protocol is used with ipmitool to fetch sensor details. +# This provides support for the following objects: +# * Onboard temperature sensors +# * FAN trays +# * PSU +""" + +import sys +import logging +import subprocess + +Z9864F_MAX_FAN_TRAYS = 4 +Z9864F_MAX_PSUS = 2 +IPMI_SENSOR_DATA = "ipmitool sdr elist" + +IPMI_FAN_PRESENCE = "ipmitool sensor get FAN{0}_prsnt" +IPMI_RAW_STORAGE_READ = "ipmitool raw 0x0a 0x11 {0} {1} 0 1" + +# Dump sensor registers +class SdrStatus(object): + """ Contains IPMI SDR List """ + def __init__(self): + ipmi_cmd = IPMI_SENSOR_DATA + try: + status, resp = subprocess.getstatusoutput(ipmi_cmd) + if status: + logging.error('Failed to execute: %s', ipmi_cmd) + sys.exit(0) + except Exception: + logging.error('Failed to execute: %s', ipmi_cmd) + sys.exit(0) + self.ipmi_sdr_dict = {} + for sdr_status in resp.split('\n'): + sdr_status_l = sdr_status.split('|') + sensor = sdr_status_l[0].strip() + value = sdr_status_l[4].strip() + self.ipmi_sdr_dict[sensor] = value + + + def get(self): + """ Returns SDR List """ + return self.ipmi_sdr_dict + +# Fetch a Fan Status +SDR_STATUS = SdrStatus() + + +# Fetch a BMC register + + +def _get_bmc_register(reg_name): + """ Returns the value of BMC Register """ + + output = None + sdr_status = SDR_STATUS.get() + if reg_name in sdr_status: + output = sdr_status[reg_name] + else: + print('\nFailed to fetch: ' + reg_name + ' sensor ') + sys.exit(0) + + logging.basicConfig(level=logging.DEBUG) + return output + +# Fetch FRU on given offset +def _fetch_raw_fru(dev_id, offset): + """ Fetch RAW value from FRU (dev_id) @ given offset """ + try: + status, cmd_ret = subprocess.getstatusoutput(IPMI_RAW_STORAGE_READ.format(dev_id, offset)) + if status != 0: + logging.error('Failed to execute ipmitool : %s', IPMI_RAW_STORAGE_READ.format(dev_id)) + sys.exit(0) + else: + return int(cmd_ret.strip().split(' ')[1]) + + except Exception: + logging.error('Failed to execute ipmitool : %s', IPMI_RAW_STORAGE_READ.format(dev_id)) + sys.exit(0) + + +def _get_fan_airflow(fan_id): + """ Return Airflow of direction of FANTRAY(fan_id) """ + airflow_direction = ['Exhaust', 'Intake'] + dir_idx = _fetch_raw_fru(fan_id+2, 0x45) + if dir_idx == -1: + return 'N/A' + return airflow_direction[dir_idx] + +#Fetch FRU Data for given fruid +def _get_psu_airflow(psu_id): + """ Return Airflow Direction of psu_id """ + airflow_direction = ['Exhaust', 'Intake'] + dir_idx = _fetch_raw_fru(psu_id, 0x2F) + if dir_idx == -1: + return 'N/A' + return airflow_direction[dir_idx] + +# Print the information for temperature sensors + + +def _print_temperature_sensors(): + """ Prints Temperature Sensor """ + + print("\nOnboard Temperature Sensors:") + + print(' CPU Temp: ',\ + (_get_bmc_register('CPU_temp'))) + print(' NPU Temp: ',\ + (_get_bmc_register('NPU_Temp'))) + print(' NPU Rear Temp: ',\ + (_get_bmc_register('NPU_Rear_temp'))) + print(' INLET Left Temp: ',\ + (_get_bmc_register('ILET_Left_temp'))) + print(' INLET Right Temp: ',\ + (_get_bmc_register('ILET_Right_temp'))) + print(' OUTLET Left Temp: ',\ + (_get_bmc_register('OLET_Left_temp'))) + print(' OUTLET Right Temp: ',\ + (_get_bmc_register('OLET_Right_temp'))) + print(' OSFP Rear Temp: ',\ + (_get_bmc_register('OSFP_Rear_temp'))) + print(' CPUCD Front Temp: ',\ + (_get_bmc_register('CPUCD_Front_temp'))) + print(' PSU1 AF Temp: ',\ + (_get_bmc_register('PSU1_AF_temp'))) + print(' PSU1 MID Temp: ',\ + (_get_bmc_register('PSU1_Mid_temp'))) + print(' PSU1 Rear Temp: ',\ + (_get_bmc_register('PSU1_Rear_temp'))) + print(' PSU2 AF Temp: ',\ + (_get_bmc_register('PSU2_AF_temp'))) + print(' PSU2 MID Temp: ',\ + (_get_bmc_register('PSU2_Mid_temp'))) + print(' PSU2 Rear Temp: ',\ + (_get_bmc_register('PSU2_Rear_temp'))) + +try: + RET_STATUS, IPMI_CMD_RET = \ + subprocess.getstatusoutput('echo 0 > /sys/module/ipmi_si/parameters/kipmid_max_busy_us') + if RET_STATUS: + logging.error('Failed to execute ipmitool : %d', RET_STATUS) + +except Exception: + logging.error('Failed to execute ipmitool : %d', RET_STATUS) + +_print_temperature_sensors() + +# Print the information for 1 Fan Tray + + +def _print_fan_tray(fan_tray): + """ Prints given Fan Tray information """ + fan_status = ['Abnormal', 'Normal'] + + print(' Fan Tray ' + str(fan_tray) + ':') + + fan_front_status = (_get_bmc_register('Fan{0}_Front_state'.format(str(fan_tray))) == '') + fan_rear_status = (_get_bmc_register('Fan{0}_Rear_state'.format(str(fan_tray))) == '') + print(' Fan1 Speed: ', \ + _get_bmc_register('FAN{0}_Front_rpm'.format(str(fan_tray)))) + print(' Fan2 Speed: ', \ + _get_bmc_register('FAN{0}_Rear_rpm'.format(str(fan_tray)))) + print(' Fan1 State: ', fan_status[fan_front_status]) + print(' Fan2 State: ', fan_status[fan_rear_status]) + print(' Airflow: ', _get_fan_airflow(fan_tray)) + + +print('\nFan Trays:') + +for tray in range(1, Z9864F_MAX_FAN_TRAYS + 1): + if _get_bmc_register('FAN{0}_prsnt'.format(str(tray))) == 'Present': + _print_fan_tray(tray) + else: + print(' Fan Tray {}: NOT PRESENT'.format(str(tray))) + +def _get_psu_status(index): + """ + Retrieves the presence status of power supply unit (PSU) defined + by index + :param index: An integer, index of the PSU of which to query status + :return: Boolean, True if PSU is plugged, False if not + """ + + status = _get_bmc_register('PSU{0}_state'.format(str(index))) + if len(status.split(',')) > 1: + return 'NOT OK' + if 'Presence' not in status: + return 'NOT PRESENT' + return None + + +# Print the information for PSU1, PSU2 +def _print_psu(psu_id): + """ Print PSU information od psu_id """ + + + # PSU FAN details + if psu_id == 1: + print(' PSU1:') + print(' AF Temperature: ',\ + _get_bmc_register('PSU1_AF_temp')) + print(' Mid Temperature: ',\ + _get_bmc_register('PSU1_Mid_temp')) + print(' Rear Temperature: ',\ + _get_bmc_register('PSU1_Rear_temp')) + print(' FAN RPM: ',\ + _get_bmc_register('PSU1_rpm')) + + # PSU input & output monitors + print(' Input Voltage: ',\ + _get_bmc_register('PSU1_In_volt')) + print(' Output Voltage: ',\ + _get_bmc_register('PSU1_Out_volt')) + print(' Input Power: ',\ + _get_bmc_register('PSU1_In_watt')) + print(' Output Power: ',\ + _get_bmc_register('PSU1_Out_watt')) + print(' Input Current: ',\ + _get_bmc_register('PSU1_In_amp')) + print(' Output Current: ',\ + _get_bmc_register('PSU1_Out_amp')) + + else: + + print(' PSU2:') + print(' AF Temperature: ',\ + _get_bmc_register('PSU2_AF_temp')) + print(' Mid Temperature: ',\ + _get_bmc_register('PSU2_Mid_temp')) + print(' Rear Temperature: ',\ + _get_bmc_register('PSU2_Rear_temp')) + print(' FAN RPM: ',\ + _get_bmc_register('PSU2_rpm')) + + # PSU input & output monitors + print(' Input Voltage: ',\ + _get_bmc_register('PSU2_In_volt')) + print(' Output Voltage: ',\ + _get_bmc_register('PSU2_Out_volt')) + print(' Input Power: ',\ + _get_bmc_register('PSU2_In_watt')) + print(' Output Power: ',\ + _get_bmc_register('PSU2_Out_watt')) + print(' Input Current: ',\ + _get_bmc_register('PSU2_In_amp')) + print(' Output Current: ',\ + _get_bmc_register('PSU2_Out_amp')) + print(' Airflow: ',\ + _get_psu_airflow(psu_id)) + + +print('\nPSUs:') +for psu in range(1, Z9864F_MAX_PSUS + 1): + psu_status = _get_psu_status(psu) + if psu_status is not None: + print(' PSU{0}: {1}'.format(psu, psu_status)) + else: + _print_psu(psu) + +print('\n Total Power: ',\ + _get_bmc_register('PSU_Total_watt')) + +try: + RET_STATUS, IPMI_CMD_RET = \ + subprocess.getstatusoutput('echo 3000 > /sys/module/ipmi_si/parameters/kipmid_max_busy_us') + if RET_STATUS: + logging.error('Failed to execute ipmitool : %d', RET_STATUS) + +except Exception: + logging.error('Failed to execute ipmitool : %d', RET_STATUS) diff --git a/platform/broadcom/sonic-platform-modules-dell/z9864f/scripts/ppm_config.sh b/platform/broadcom/sonic-platform-modules-dell/z9864f/scripts/ppm_config.sh new file mode 100755 index 00000000000..f28aabf4f14 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/z9864f/scripts/ppm_config.sh @@ -0,0 +1,15 @@ +set -e +echo "JA Setting" +echo "" + +echo "Register Configuration Start" + +if [ "$1" = "25PPM" ]; then + echo "Configuring 25PPM settings ..." + /usr/share/sonic/platform/dpllupgrade_test spi -w /usr/share/sonic/platform/z9864f_ZL30793_option-1_0811_HP-Synth1+20ppm_all.mfg +else + echo "Configuring 0 PPM settings ..." + /usr/share/sonic/platform/dpllupgrade_test spi -w /usr/share/sonic/platform/z9864f_ZL30793_option-1_0811.mfg +fi + +echo "Register Configuration End" \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-dell/z9864f/scripts/sensors b/platform/broadcom/sonic-platform-modules-dell/z9864f/scripts/sensors new file mode 100755 index 00000000000..7d3911813bf --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/z9864f/scripts/sensors @@ -0,0 +1,8 @@ +#!/bin/bash +docker exec -i pmon sensors "$@" +docker exec -i pmon /usr/bin/platform_sensors.py "$@" + +#To probe sensors not part of lm-sensors to re-enable during platform validation +#if [ -r /usr/local/bin/platform_sensors.py ]; then +# python /usr/local/bin/platform_sensors.py +#fi diff --git a/platform/broadcom/sonic-platform-modules-dell/z9864f/scripts/z9864f_ZL30793_option-1_0811.mfg b/platform/broadcom/sonic-platform-modules-dell/z9864f/scripts/z9864f_ZL30793_option-1_0811.mfg new file mode 100755 index 00000000000..e15030032ad --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/z9864f/scripts/z9864f_ZL30793_option-1_0811.mfg @@ -0,0 +1,1281 @@ +; Device Id : ZL30793 +; GUI Version : 1.2.1 +; File Generation Date : Wednesday, August 11, 2021 4:46:32 PM +;====================================================================== + +; NOTE: +; This is an incremental configuration script. +; For proper device operation, all register write and wait commands in +; this file must be performed in the sequence listed. + +;====================================================================== + +; Configuration script commands + +; 1. Register Write Command: +; X , , +; Both and are in hexadecimal +; format and must have the "0x" prefix. +; The register_address contains the page number and page offset. +; The page number is stored in register_address[14:7]. +; The page offset is stored in register_address[6:0]. + +; 2. Wait Command: +; W , +; The wait time is specified in microseconds. + +;====================================================================== + +; The following lines are used only for the evaluation board GUI configuration: + +; Master Clock Nominal Freq MHz = 25 +; VDDO01 = 3.3 V, VDDO23 = 3.3 V, VDDO45 = 3.3 V, VDDO67 = 3.3 V +; LoadCap HPOUT0=5.00, HPOUT1=5.00, HPOUT2=5.00, HPOUT3=5.00, HPOUT4=5.00, HPOUT5=5.00, HPOUT6=5.00, HPOUT7=5.00 + +;====================================================================== + +; Register Configuration Start + + +;====================================================================== +; Register Configuration Start + +X , 0x0480 , 0x10 ; hp_ctrl_1 +X , 0x04B0 , 0x00 ; hp_ctrl_2 + +X , 0x0582 , 0x00 ; ref_mb_mask +X , 0x0583 , 0x01 ; ref_mb_mask +X , 0x0584 , 0x02 ; ref_mb_sem +W , 20000 +X , 0x0585 , 0x61 ; ref0p_freq_base +X , 0x0586 , 0xA8 ; ref0p_freq_base +X , 0x0587 , 0x03 ; ref0p_freq_mult +X , 0x0588 , 0xE8 ; ref0p_freq_mult +X , 0x0589 , 0x00 ; ref0p_ratio_m +X , 0x058A , 0x01 ; ref0p_ratio_m +X , 0x058B , 0x00 ; ref0p_ratio_n +X , 0x058C , 0x01 ; ref0p_ratio_n +X , 0x058D , 0x05 ; ref0p_config +X , 0x0590 , 0x05 ; ref0p_scm +X , 0x0591 , 0x05 ; ref0p_cfm +X , 0x0592 , 0x00 ; ref0p_gst_disqual +X , 0x0593 , 0x05 ; ref0p_gst_disqual +X , 0x0594 , 0x00 ; ref0p_gst_qual +X , 0x0595 , 0x14 ; ref0p_gst_qual +X , 0x0596 , 0x00 ; ref0p_sfm +X , 0x0597 , 0x00 ; ref0p_pfm_ctrl +X , 0x0598 , 0xB3 ; ref0p_pfm_disqualify +X , 0x0599 , 0xB0 ; ref0p_pfm_disqualify +X , 0x059A , 0x9C ; ref0p_pfm_qualify +X , 0x059B , 0x40 ; ref0p_pfm_qualify +X , 0x059C , 0x00 ; ref0p_pfm_period +X , 0x059D , 0x00 ; ref0p_pfm_period +X , 0x059E , 0x28 ; ref0p_pfm_filter_limit +X , 0x05A0 , 0x00 ; ref0p_sync +X , 0x05A1 , 0x00 ; ref0p_sync_misc +X , 0x05A3 , 0x00 ; ref0p_phase_offset_compensation +X , 0x05A4 , 0x00 ; ref0p_phase_offset_compensation +X , 0x05A5 , 0x00 ; ref0p_phase_offset_compensation +X , 0x05A6 , 0x00 ; ref0p_phase_offset_compensation +X , 0x05A8 , 0x00 ; ref0p_scm_fine +X , 0x05A9 , 0x00 ; ref0p_scm_fine +X , 0x05AA , 0x00 ; ref0p_scm_fine +X , 0x05AB , 0x00 ; ref0p_scm_fine +X , 0x05AC , 0x01 ; ref0p_meas_freq_period +X , 0x0584 , 0x01 ; ref_mb_sem +W , 20000 + +X , 0x0582 , 0x00 ; ref_mb_mask +X , 0x0583 , 0x02 ; ref_mb_mask +X , 0x0584 , 0x02 ; ref_mb_sem +W , 20000 +X , 0x0585 , 0x1F ; ref0n_freq_base +X , 0x0586 , 0x40 ; ref0n_freq_base +X , 0x0587 , 0x09 ; ref0n_freq_mult +X , 0x0588 , 0x7E ; ref0n_freq_mult +X , 0x0589 , 0x00 ; ref0n_ratio_m +X , 0x058A , 0x01 ; ref0n_ratio_m +X , 0x058B , 0x00 ; ref0n_ratio_n +X , 0x058C , 0x01 ; ref0n_ratio_n +X , 0x058D , 0x01 ; ref0n_config +X , 0x0590 , 0x05 ; ref0n_scm +X , 0x0591 , 0x05 ; ref0n_cfm +X , 0x0592 , 0x00 ; ref0n_gst_disqual +X , 0x0593 , 0x05 ; ref0n_gst_disqual +X , 0x0594 , 0x00 ; ref0n_gst_qual +X , 0x0595 , 0x14 ; ref0n_gst_qual +X , 0x0596 , 0x00 ; ref0n_sfm +X , 0x0597 , 0x00 ; ref0n_pfm_ctrl +X , 0x0598 , 0xB3 ; ref0n_pfm_disqualify +X , 0x0599 , 0xB0 ; ref0n_pfm_disqualify +X , 0x059A , 0x9C ; ref0n_pfm_qualify +X , 0x059B , 0x40 ; ref0n_pfm_qualify +X , 0x059C , 0x00 ; ref0n_pfm_period +X , 0x059D , 0x00 ; ref0n_pfm_period +X , 0x059E , 0x28 ; ref0n_pfm_filter_limit +X , 0x05A0 , 0x00 ; ref0n_sync +X , 0x05A1 , 0x00 ; ref0n_sync_misc +X , 0x05A3 , 0x00 ; ref0n_phase_offset_compensation +X , 0x05A4 , 0x00 ; ref0n_phase_offset_compensation +X , 0x05A5 , 0x00 ; ref0n_phase_offset_compensation +X , 0x05A6 , 0x00 ; ref0n_phase_offset_compensation +X , 0x05A8 , 0x00 ; ref0n_scm_fine +X , 0x05A9 , 0x00 ; ref0n_scm_fine +X , 0x05AA , 0x00 ; ref0n_scm_fine +X , 0x05AB , 0x00 ; ref0n_scm_fine +X , 0x05AC , 0x01 ; ref0n_meas_freq_period +X , 0x0584 , 0x01 ; ref_mb_sem +W , 20000 + +X , 0x0582 , 0x00 ; ref_mb_mask +X , 0x0583 , 0x04 ; ref_mb_mask +X , 0x0584 , 0x02 ; ref_mb_sem +W , 20000 +X , 0x0585 , 0x61 ; ref1p_freq_base +X , 0x0586 , 0xA8 ; ref1p_freq_base +X , 0x0587 , 0x03 ; ref1p_freq_mult +X , 0x0588 , 0xE8 ; ref1p_freq_mult +X , 0x0589 , 0x00 ; ref1p_ratio_m +X , 0x058A , 0x01 ; ref1p_ratio_m +X , 0x058B , 0x00 ; ref1p_ratio_n +X , 0x058C , 0x01 ; ref1p_ratio_n +X , 0x058D , 0x05 ; ref1p_config +X , 0x0590 , 0x05 ; ref1p_scm +X , 0x0591 , 0x05 ; ref1p_cfm +X , 0x0592 , 0x00 ; ref1p_gst_disqual +X , 0x0593 , 0x05 ; ref1p_gst_disqual +X , 0x0594 , 0x00 ; ref1p_gst_qual +X , 0x0595 , 0x14 ; ref1p_gst_qual +X , 0x0596 , 0x00 ; ref1p_sfm +X , 0x0597 , 0x00 ; ref1p_pfm_ctrl +X , 0x0598 , 0xB3 ; ref1p_pfm_disqualify +X , 0x0599 , 0xB0 ; ref1p_pfm_disqualify +X , 0x059A , 0x9C ; ref1p_pfm_qualify +X , 0x059B , 0x40 ; ref1p_pfm_qualify +X , 0x059C , 0x00 ; ref1p_pfm_period +X , 0x059D , 0x00 ; ref1p_pfm_period +X , 0x059E , 0x28 ; ref1p_pfm_filter_limit +X , 0x05A0 , 0x00 ; ref1p_sync +X , 0x05A1 , 0x00 ; ref1p_sync_misc +X , 0x05A3 , 0x00 ; ref1p_phase_offset_compensation +X , 0x05A4 , 0x00 ; ref1p_phase_offset_compensation +X , 0x05A5 , 0x00 ; ref1p_phase_offset_compensation +X , 0x05A6 , 0x00 ; ref1p_phase_offset_compensation +X , 0x05A8 , 0x00 ; ref1p_scm_fine +X , 0x05A9 , 0x00 ; ref1p_scm_fine +X , 0x05AA , 0x00 ; ref1p_scm_fine +X , 0x05AB , 0x00 ; ref1p_scm_fine +X , 0x05AC , 0x01 ; ref1p_meas_freq_period +X , 0x0584 , 0x01 ; ref_mb_sem +W , 20000 + +X , 0x0582 , 0x00 ; ref_mb_mask +X , 0x0583 , 0x08 ; ref_mb_mask +X , 0x0584 , 0x02 ; ref_mb_sem +W , 20000 +X , 0x0585 , 0x1F ; ref1n_freq_base +X , 0x0586 , 0x40 ; ref1n_freq_base +X , 0x0587 , 0x09 ; ref1n_freq_mult +X , 0x0588 , 0x7E ; ref1n_freq_mult +X , 0x0589 , 0x00 ; ref1n_ratio_m +X , 0x058A , 0x01 ; ref1n_ratio_m +X , 0x058B , 0x00 ; ref1n_ratio_n +X , 0x058C , 0x01 ; ref1n_ratio_n +X , 0x058D , 0x01 ; ref1n_config +X , 0x0590 , 0x05 ; ref1n_scm +X , 0x0591 , 0x05 ; ref1n_cfm +X , 0x0592 , 0x00 ; ref1n_gst_disqual +X , 0x0593 , 0x05 ; ref1n_gst_disqual +X , 0x0594 , 0x00 ; ref1n_gst_qual +X , 0x0595 , 0x14 ; ref1n_gst_qual +X , 0x0596 , 0x00 ; ref1n_sfm +X , 0x0597 , 0x00 ; ref1n_pfm_ctrl +X , 0x0598 , 0xB3 ; ref1n_pfm_disqualify +X , 0x0599 , 0xB0 ; ref1n_pfm_disqualify +X , 0x059A , 0x9C ; ref1n_pfm_qualify +X , 0x059B , 0x40 ; ref1n_pfm_qualify +X , 0x059C , 0x00 ; ref1n_pfm_period +X , 0x059D , 0x00 ; ref1n_pfm_period +X , 0x059E , 0x28 ; ref1n_pfm_filter_limit +X , 0x05A0 , 0x00 ; ref1n_sync +X , 0x05A1 , 0x00 ; ref1n_sync_misc +X , 0x05A3 , 0x00 ; ref1n_phase_offset_compensation +X , 0x05A4 , 0x00 ; ref1n_phase_offset_compensation +X , 0x05A5 , 0x00 ; ref1n_phase_offset_compensation +X , 0x05A6 , 0x00 ; ref1n_phase_offset_compensation +X , 0x05A8 , 0x00 ; ref1n_scm_fine +X , 0x05A9 , 0x00 ; ref1n_scm_fine +X , 0x05AA , 0x00 ; ref1n_scm_fine +X , 0x05AB , 0x00 ; ref1n_scm_fine +X , 0x05AC , 0x01 ; ref1n_meas_freq_period +X , 0x0584 , 0x01 ; ref_mb_sem +W , 20000 + +X , 0x0582 , 0x00 ; ref_mb_mask +X , 0x0583 , 0x10 ; ref_mb_mask +X , 0x0584 , 0x02 ; ref_mb_sem +W , 20000 +X , 0x0585 , 0x61 ; ref2p_freq_base +X , 0x0586 , 0xA8 ; ref2p_freq_base +X , 0x0587 , 0x03 ; ref2p_freq_mult +X , 0x0588 , 0xE8 ; ref2p_freq_mult +X , 0x0589 , 0x00 ; ref2p_ratio_m +X , 0x058A , 0x01 ; ref2p_ratio_m +X , 0x058B , 0x00 ; ref2p_ratio_n +X , 0x058C , 0x01 ; ref2p_ratio_n +X , 0x058D , 0x01 ; ref2p_config +X , 0x0590 , 0x05 ; ref2p_scm +X , 0x0591 , 0x05 ; ref2p_cfm +X , 0x0592 , 0x00 ; ref2p_gst_disqual +X , 0x0593 , 0x05 ; ref2p_gst_disqual +X , 0x0594 , 0x00 ; ref2p_gst_qual +X , 0x0595 , 0x14 ; ref2p_gst_qual +X , 0x0596 , 0x00 ; ref2p_sfm +X , 0x0597 , 0x00 ; ref2p_pfm_ctrl +X , 0x0598 , 0xCB ; ref2p_pfm_disqualify +X , 0x0599 , 0x20 ; ref2p_pfm_disqualify +X , 0x059A , 0x9C ; ref2p_pfm_qualify +X , 0x059B , 0x40 ; ref2p_pfm_qualify +X , 0x059C , 0x00 ; ref2p_pfm_period +X , 0x059D , 0x00 ; ref2p_pfm_period +X , 0x059E , 0x28 ; ref2p_pfm_filter_limit +X , 0x05A0 , 0x00 ; ref2p_sync +X , 0x05A1 , 0x00 ; ref2p_sync_misc +X , 0x05A3 , 0x00 ; ref2p_phase_offset_compensation +X , 0x05A4 , 0x00 ; ref2p_phase_offset_compensation +X , 0x05A5 , 0x00 ; ref2p_phase_offset_compensation +X , 0x05A6 , 0x00 ; ref2p_phase_offset_compensation +X , 0x05A8 , 0x00 ; ref2p_scm_fine +X , 0x05A9 , 0x00 ; ref2p_scm_fine +X , 0x05AA , 0x00 ; ref2p_scm_fine +X , 0x05AB , 0x00 ; ref2p_scm_fine +X , 0x05AC , 0x01 ; ref2p_meas_freq_period +X , 0x0584 , 0x01 ; ref_mb_sem +W , 20000 + +X , 0x0582 , 0x00 ; ref_mb_mask +X , 0x0583 , 0x20 ; ref_mb_mask +X , 0x0584 , 0x02 ; ref_mb_sem +W , 20000 +X , 0x0585 , 0x61 ; ref2n_freq_base +X , 0x0586 , 0xA8 ; ref2n_freq_base +X , 0x0587 , 0x03 ; ref2n_freq_mult +X , 0x0588 , 0xE8 ; ref2n_freq_mult +X , 0x0589 , 0x00 ; ref2n_ratio_m +X , 0x058A , 0x01 ; ref2n_ratio_m +X , 0x058B , 0x00 ; ref2n_ratio_n +X , 0x058C , 0x01 ; ref2n_ratio_n +X , 0x058D , 0x01 ; ref2n_config +X , 0x0590 , 0x05 ; ref2n_scm +X , 0x0591 , 0x05 ; ref2n_cfm +X , 0x0592 , 0x00 ; ref2n_gst_disqual +X , 0x0593 , 0x05 ; ref2n_gst_disqual +X , 0x0594 , 0x00 ; ref2n_gst_qual +X , 0x0595 , 0x14 ; ref2n_gst_qual +X , 0x0596 , 0x00 ; ref2n_sfm +X , 0x0597 , 0x00 ; ref2n_pfm_ctrl +X , 0x0598 , 0xB3 ; ref2n_pfm_disqualify +X , 0x0599 , 0xB0 ; ref2n_pfm_disqualify +X , 0x059A , 0x9C ; ref2n_pfm_qualify +X , 0x059B , 0x40 ; ref2n_pfm_qualify +X , 0x059C , 0x00 ; ref2n_pfm_period +X , 0x059D , 0x00 ; ref2n_pfm_period +X , 0x059E , 0x28 ; ref2n_pfm_filter_limit +X , 0x05A0 , 0x00 ; ref2n_sync +X , 0x05A1 , 0x00 ; ref2n_sync_misc +X , 0x05A3 , 0x00 ; ref2n_phase_offset_compensation +X , 0x05A4 , 0x00 ; ref2n_phase_offset_compensation +X , 0x05A5 , 0x00 ; ref2n_phase_offset_compensation +X , 0x05A6 , 0x00 ; ref2n_phase_offset_compensation +X , 0x05A8 , 0x00 ; ref2n_scm_fine +X , 0x05A9 , 0x00 ; ref2n_scm_fine +X , 0x05AA , 0x00 ; ref2n_scm_fine +X , 0x05AB , 0x00 ; ref2n_scm_fine +X , 0x05AC , 0x01 ; ref2n_meas_freq_period +X , 0x0584 , 0x01 ; ref_mb_sem +W , 20000 + +X , 0x0582 , 0x00 ; ref_mb_mask +X , 0x0583 , 0x40 ; ref_mb_mask +X , 0x0584 , 0x02 ; ref_mb_sem +W , 20000 +X , 0x0585 , 0x61 ; ref3p_freq_base +X , 0x0586 , 0xA8 ; ref3p_freq_base +X , 0x0587 , 0x01 ; ref3p_freq_mult +X , 0x0588 , 0x90 ; ref3p_freq_mult +X , 0x0589 , 0x00 ; ref3p_ratio_m +X , 0x058A , 0x01 ; ref3p_ratio_m +X , 0x058B , 0x00 ; ref3p_ratio_n +X , 0x058C , 0x01 ; ref3p_ratio_n +X , 0x058D , 0x01 ; ref3p_config +X , 0x0590 , 0x05 ; ref3p_scm +X , 0x0591 , 0x05 ; ref3p_cfm +X , 0x0592 , 0x00 ; ref3p_gst_disqual +X , 0x0593 , 0x05 ; ref3p_gst_disqual +X , 0x0594 , 0x00 ; ref3p_gst_qual +X , 0x0595 , 0x14 ; ref3p_gst_qual +X , 0x0596 , 0x00 ; ref3p_sfm +X , 0x0597 , 0x00 ; ref3p_pfm_ctrl +X , 0x0598 , 0xB3 ; ref3p_pfm_disqualify +X , 0x0599 , 0xB0 ; ref3p_pfm_disqualify +X , 0x059A , 0x9C ; ref3p_pfm_qualify +X , 0x059B , 0x40 ; ref3p_pfm_qualify +X , 0x059C , 0x00 ; ref3p_pfm_period +X , 0x059D , 0x00 ; ref3p_pfm_period +X , 0x059E , 0x28 ; ref3p_pfm_filter_limit +X , 0x05A0 , 0x00 ; ref3p_sync +X , 0x05A1 , 0x00 ; ref3p_sync_misc +X , 0x05A3 , 0x00 ; ref3p_phase_offset_compensation +X , 0x05A4 , 0x00 ; ref3p_phase_offset_compensation +X , 0x05A5 , 0x00 ; ref3p_phase_offset_compensation +X , 0x05A6 , 0x00 ; ref3p_phase_offset_compensation +X , 0x05A8 , 0x00 ; ref3p_scm_fine +X , 0x05A9 , 0x00 ; ref3p_scm_fine +X , 0x05AA , 0x00 ; ref3p_scm_fine +X , 0x05AB , 0x00 ; ref3p_scm_fine +X , 0x05AC , 0x01 ; ref3p_meas_freq_period +X , 0x0584 , 0x01 ; ref_mb_sem +W , 20000 + +X , 0x0582 , 0x00 ; ref_mb_mask +X , 0x0583 , 0x80 ; ref_mb_mask +X , 0x0584 , 0x02 ; ref_mb_sem +W , 20000 +X , 0x0585 , 0x61 ; ref3n_freq_base +X , 0x0586 , 0xA8 ; ref3n_freq_base +X , 0x0587 , 0x01 ; ref3n_freq_mult +X , 0x0588 , 0x90 ; ref3n_freq_mult +X , 0x0589 , 0x00 ; ref3n_ratio_m +X , 0x058A , 0x01 ; ref3n_ratio_m +X , 0x058B , 0x00 ; ref3n_ratio_n +X , 0x058C , 0x01 ; ref3n_ratio_n +X , 0x058D , 0x01 ; ref3n_config +X , 0x0590 , 0x05 ; ref3n_scm +X , 0x0591 , 0x05 ; ref3n_cfm +X , 0x0592 , 0x00 ; ref3n_gst_disqual +X , 0x0593 , 0x05 ; ref3n_gst_disqual +X , 0x0594 , 0x00 ; ref3n_gst_qual +X , 0x0595 , 0x14 ; ref3n_gst_qual +X , 0x0596 , 0x00 ; ref3n_sfm +X , 0x0597 , 0x00 ; ref3n_pfm_ctrl +X , 0x0598 , 0xB3 ; ref3n_pfm_disqualify +X , 0x0599 , 0xB0 ; ref3n_pfm_disqualify +X , 0x059A , 0x9C ; ref3n_pfm_qualify +X , 0x059B , 0x40 ; ref3n_pfm_qualify +X , 0x059C , 0x00 ; ref3n_pfm_period +X , 0x059D , 0x00 ; ref3n_pfm_period +X , 0x059E , 0x28 ; ref3n_pfm_filter_limit +X , 0x05A0 , 0x00 ; ref3n_sync +X , 0x05A1 , 0x00 ; ref3n_sync_misc +X , 0x05A3 , 0x00 ; ref3n_phase_offset_compensation +X , 0x05A4 , 0x00 ; ref3n_phase_offset_compensation +X , 0x05A5 , 0x00 ; ref3n_phase_offset_compensation +X , 0x05A6 , 0x00 ; ref3n_phase_offset_compensation +X , 0x05A8 , 0x00 ; ref3n_scm_fine +X , 0x05A9 , 0x00 ; ref3n_scm_fine +X , 0x05AA , 0x00 ; ref3n_scm_fine +X , 0x05AB , 0x00 ; ref3n_scm_fine +X , 0x05AC , 0x01 ; ref3n_meas_freq_period +X , 0x0584 , 0x01 ; ref_mb_sem +W , 20000 + +X , 0x0582 , 0x01 ; ref_mb_mask +X , 0x0583 , 0x00 ; ref_mb_mask +X , 0x0584 , 0x02 ; ref_mb_sem +W , 20000 +X , 0x0585 , 0x00 ; ref4p_freq_base +X , 0x0586 , 0x01 ; ref4p_freq_base +X , 0x0587 , 0x00 ; ref4p_freq_mult +X , 0x0588 , 0x01 ; ref4p_freq_mult +X , 0x0589 , 0x00 ; ref4p_ratio_m +X , 0x058A , 0x01 ; ref4p_ratio_m +X , 0x058B , 0x00 ; ref4p_ratio_n +X , 0x058C , 0x01 ; ref4p_ratio_n +X , 0x058D , 0x01 ; ref4p_config +X , 0x0590 , 0x05 ; ref4p_scm +X , 0x0591 , 0x05 ; ref4p_cfm +X , 0x0592 , 0x00 ; ref4p_gst_disqual +X , 0x0593 , 0x05 ; ref4p_gst_disqual +X , 0x0594 , 0x00 ; ref4p_gst_qual +X , 0x0595 , 0x14 ; ref4p_gst_qual +X , 0x0596 , 0x00 ; ref4p_sfm +X , 0x0597 , 0x00 ; ref4p_pfm_ctrl +X , 0x0598 , 0xB3 ; ref4p_pfm_disqualify +X , 0x0599 , 0xB0 ; ref4p_pfm_disqualify +X , 0x059A , 0x9C ; ref4p_pfm_qualify +X , 0x059B , 0x40 ; ref4p_pfm_qualify +X , 0x059C , 0x00 ; ref4p_pfm_period +X , 0x059D , 0x00 ; ref4p_pfm_period +X , 0x059E , 0x28 ; ref4p_pfm_filter_limit +X , 0x05A0 , 0x00 ; ref4p_sync +X , 0x05A1 , 0x00 ; ref4p_sync_misc +X , 0x05A3 , 0x00 ; ref4p_phase_offset_compensation +X , 0x05A4 , 0x00 ; ref4p_phase_offset_compensation +X , 0x05A5 , 0x00 ; ref4p_phase_offset_compensation +X , 0x05A6 , 0x00 ; ref4p_phase_offset_compensation +X , 0x05A8 , 0x00 ; ref4p_scm_fine +X , 0x05A9 , 0x00 ; ref4p_scm_fine +X , 0x05AA , 0x00 ; ref4p_scm_fine +X , 0x05AB , 0x00 ; ref4p_scm_fine +X , 0x05AC , 0x01 ; ref4p_meas_freq_period +X , 0x0584 , 0x01 ; ref_mb_sem +W , 20000 + +X , 0x0582 , 0x02 ; ref_mb_mask +X , 0x0583 , 0x00 ; ref_mb_mask +X , 0x0584 , 0x02 ; ref_mb_sem +W , 20000 +X , 0x0585 , 0x61 ; ref4n_freq_base +X , 0x0586 , 0xA8 ; ref4n_freq_base +X , 0x0587 , 0x01 ; ref4n_freq_mult +X , 0x0588 , 0x90 ; ref4n_freq_mult +X , 0x0589 , 0x00 ; ref4n_ratio_m +X , 0x058A , 0x01 ; ref4n_ratio_m +X , 0x058B , 0x00 ; ref4n_ratio_n +X , 0x058C , 0x01 ; ref4n_ratio_n +X , 0x058D , 0x01 ; ref4n_config +X , 0x0590 , 0x05 ; ref4n_scm +X , 0x0591 , 0x05 ; ref4n_cfm +X , 0x0592 , 0x00 ; ref4n_gst_disqual +X , 0x0593 , 0x05 ; ref4n_gst_disqual +X , 0x0594 , 0x00 ; ref4n_gst_qual +X , 0x0595 , 0x14 ; ref4n_gst_qual +X , 0x0596 , 0x00 ; ref4n_sfm +X , 0x0597 , 0x00 ; ref4n_pfm_ctrl +X , 0x0598 , 0xB3 ; ref4n_pfm_disqualify +X , 0x0599 , 0xB0 ; ref4n_pfm_disqualify +X , 0x059A , 0x9C ; ref4n_pfm_qualify +X , 0x059B , 0x40 ; ref4n_pfm_qualify +X , 0x059C , 0x00 ; ref4n_pfm_period +X , 0x059D , 0x00 ; ref4n_pfm_period +X , 0x059E , 0x28 ; ref4n_pfm_filter_limit +X , 0x05A0 , 0x02 ; ref4n_sync +X , 0x05A1 , 0x00 ; ref4n_sync_misc +X , 0x05A3 , 0x00 ; ref4n_phase_offset_compensation +X , 0x05A4 , 0x00 ; ref4n_phase_offset_compensation +X , 0x05A5 , 0x00 ; ref4n_phase_offset_compensation +X , 0x05A6 , 0x00 ; ref4n_phase_offset_compensation +X , 0x05A8 , 0x00 ; ref4n_scm_fine +X , 0x05A9 , 0x00 ; ref4n_scm_fine +X , 0x05AA , 0x00 ; ref4n_scm_fine +X , 0x05AB , 0x00 ; ref4n_scm_fine +X , 0x05AC , 0x01 ; ref4n_meas_freq_period +X , 0x0584 , 0x01 ; ref_mb_sem +W , 20000 + +X , 0x0602 , 0x00 ; dpll_mb_mask +X , 0x0603 , 0x01 ; dpll_mb_mask +X , 0x0604 , 0x02 ; dpll_mb_sem +W , 20000 +X , 0x0605 , 0x07 ; dpll0_bw_fixed +X , 0x0606 , 0x4F ; dpll0_bw_var +X , 0x0607 , 0x00 ; dpll0_config +X , 0x0608 , 0x03 ; dpll0_psl +X , 0x0609 , 0x75 ; dpll0_psl +X , 0x060E , 0x0B ; dpll0_range +X , 0x060F , 0xB8 ; dpll0_range +X , 0x0610 , 0x1F ; dpll0_ref_sw_mask +X , 0x0611 , 0x1F ; dpll0_ref_ho_mask +X , 0x0614 , 0xFF ; dpll0_ref_prio_0 +X , 0x0615 , 0xFF ; dpll0_ref_prio_1 +X , 0x0616 , 0xFF ; dpll0_ref_prio_2 +X , 0x0617 , 0xFF ; dpll0_ref_prio_3 +X , 0x0618 , 0xFF ; dpll0_ref_prio_4 +X , 0x061C , 0x18 ; dpll0_ho_filter +X , 0x061D , 0x86 ; dpll0_ho_delay +X , 0x061E , 0x01 ; dpll0_split_xo_config +X , 0x0620 , 0x01 ; dpll0_fast_lock_ctrl +X , 0x0621 , 0xFF ; dpll0_fast_lock_phase_err +X , 0x0622 , 0x04 ; dpll0_fast_lock_freq_err +X , 0x0623 , 0x00 ; dpll0_fast_lock_ideal_time +X , 0x0624 , 0x00 ; dpll0_fast_lock_ideal_time +X , 0x0626 , 0x07 ; dpll0_fast_lock_fol +X , 0x0627 , 0xD0 ; dpll0_fast_lock_fol +X , 0x062E , 0x00 ; dpll0_damping +X , 0x0630 , 0x00 ; dpll0_phase_bad +X , 0x0631 , 0x0F ; dpll0_phase_bad +X , 0x0632 , 0x42 ; dpll0_phase_bad +X , 0x0633 , 0x40 ; dpll0_phase_bad +X , 0x0634 , 0x00 ; dpll0_phase_good +X , 0x0635 , 0x1E ; dpll0_phase_good +X , 0x0636 , 0x84 ; dpll0_phase_good +X , 0x0637 , 0x80 ; dpll0_phase_good +X , 0x0638 , 0x09 ; dpll0_duration_good +X , 0x0639 , 0x00 ; dpll0_lock_delay +X , 0x063A , 0x00 ; dpll0_tie +X , 0x063B , 0x00 ; dpll0_tie_wr_thresh +X , 0x063C , 0x02 ; dpll0_fp_first_realign +X , 0x063D , 0x82 ; dpll0_fp_realign_intvl +X , 0x063E , 0x00 ; dpll0_fp_lock_thresh +X , 0x0640 , 0x00 ; dpll0_step_time_thresh +X , 0x0641 , 0x00 ; dpll0_step_time_thresh +X , 0x0642 , 0x4E ; dpll0_step_time_thresh +X , 0x0643 , 0x20 ; dpll0_step_time_thresh +X , 0x0644 , 0x0E ; dpll0_step_time_reso +X , 0x0645 , 0xE6 ; dpll0_step_time_reso +X , 0x0646 , 0xB2 ; dpll0_step_time_reso +X , 0x0647 , 0x80 ; dpll0_step_time_reso +X , 0x0648 , 0x50 ; dpll0_bw_thresh_speedup +X , 0x0649 , 0x01 ; dpll0_freq_err_ctrl +X , 0x064A , 0x00 ; dpll0_freq_err_timer +X , 0x0604 , 0x01 ; dpll_mb_sem +W , 20000 + +X , 0x0602 , 0x00 ; dpll_mb_mask +X , 0x0603 , 0x02 ; dpll_mb_mask +X , 0x0604 , 0x02 ; dpll_mb_sem +W , 20000 +X , 0x0605 , 0x07 ; dpll1_bw_fixed +X , 0x0606 , 0x87 ; dpll1_bw_var +X , 0x0607 , 0x00 ; dpll1_config +X , 0x0608 , 0x00 ; dpll1_psl +X , 0x0609 , 0x00 ; dpll1_psl +X , 0x060E , 0x00 ; dpll1_range +X , 0x060F , 0x78 ; dpll1_range +X , 0x0610 , 0x1F ; dpll1_ref_sw_mask +X , 0x0611 , 0x1F ; dpll1_ref_ho_mask +X , 0x0614 , 0xF1 ; dpll1_ref_prio_0 +X , 0x0615 , 0xF2 ; dpll1_ref_prio_1 +X , 0x0616 , 0xFF ; dpll1_ref_prio_2 +X , 0x0617 , 0xFF ; dpll1_ref_prio_3 +X , 0x0618 , 0xFF ; dpll1_ref_prio_4 +X , 0x061C , 0x00 ; dpll1_ho_filter +X , 0x061D , 0x4C ; dpll1_ho_delay +X , 0x061E , 0x01 ; dpll1_split_xo_config +X , 0x0620 , 0x01 ; dpll1_fast_lock_ctrl +X , 0x0621 , 0xFF ; dpll1_fast_lock_phase_err +X , 0x0622 , 0x04 ; dpll1_fast_lock_freq_err +X , 0x0623 , 0x00 ; dpll1_fast_lock_ideal_time +X , 0x0624 , 0x00 ; dpll1_fast_lock_ideal_time +X , 0x0626 , 0x07 ; dpll1_fast_lock_fol +X , 0x0627 , 0xD0 ; dpll1_fast_lock_fol +X , 0x062E , 0x00 ; dpll1_damping +X , 0x0630 , 0x02 ; dpll1_phase_bad +X , 0x0631 , 0x25 ; dpll1_phase_bad +X , 0x0632 , 0x51 ; dpll1_phase_bad +X , 0x0633 , 0x00 ; dpll1_phase_bad +X , 0x0634 , 0x02 ; dpll1_phase_good +X , 0x0635 , 0x25 ; dpll1_phase_good +X , 0x0636 , 0x51 ; dpll1_phase_good +X , 0x0637 , 0x00 ; dpll1_phase_good +X , 0x0638 , 0x09 ; dpll1_duration_good +X , 0x0639 , 0x00 ; dpll1_lock_delay +X , 0x063A , 0x00 ; dpll1_tie +X , 0x063B , 0x00 ; dpll1_tie_wr_thresh +X , 0x063C , 0x7F ; dpll1_fp_first_realign +X , 0x063D , 0x80 ; dpll1_fp_realign_intvl +X , 0x063E , 0x00 ; dpll1_fp_lock_thresh +X , 0x0640 , 0x77 ; dpll1_step_time_thresh +X , 0x0641 , 0x35 ; dpll1_step_time_thresh +X , 0x0642 , 0x94 ; dpll1_step_time_thresh +X , 0x0643 , 0x00 ; dpll1_step_time_thresh +X , 0x0644 , 0xEE ; dpll1_step_time_reso +X , 0x0645 , 0x6B ; dpll1_step_time_reso +X , 0x0646 , 0x28 ; dpll1_step_time_reso +X , 0x0647 , 0x00 ; dpll1_step_time_reso +X , 0x0648 , 0x50 ; dpll1_bw_thresh_speedup +X , 0x0649 , 0x01 ; dpll1_freq_err_ctrl +X , 0x064A , 0x00 ; dpll1_freq_err_timer +X , 0x0604 , 0x01 ; dpll_mb_sem +W , 20000 + +X , 0x0602 , 0x00 ; dpll_mb_mask +X , 0x0603 , 0x04 ; dpll_mb_mask +X , 0x0604 , 0x02 ; dpll_mb_sem +W , 20000 +X , 0x0605 , 0x00 ; dpll2_bw_fixed +X , 0x0606 , 0x00 ; dpll2_bw_var +X , 0x0607 , 0x00 ; dpll2_config +X , 0x0608 , 0x00 ; dpll2_psl +X , 0x0609 , 0x00 ; dpll2_psl +X , 0x060E , 0x0B ; dpll2_range +X , 0x060F , 0xB8 ; dpll2_range +X , 0x0610 , 0x08 ; dpll2_ref_sw_mask +X , 0x0611 , 0x17 ; dpll2_ref_ho_mask +X , 0x0614 , 0x10 ; dpll2_ref_prio_0 +X , 0x0615 , 0x32 ; dpll2_ref_prio_1 +X , 0x0616 , 0x54 ; dpll2_ref_prio_2 +X , 0x0617 , 0x76 ; dpll2_ref_prio_3 +X , 0x0618 , 0x98 ; dpll2_ref_prio_4 +X , 0x061C , 0x00 ; dpll2_ho_filter +X , 0x061D , 0x4C ; dpll2_ho_delay +X , 0x061E , 0x00 ; dpll2_split_xo_config +X , 0x0620 , 0x01 ; dpll2_fast_lock_ctrl +X , 0x0621 , 0xFF ; dpll2_fast_lock_phase_err +X , 0x0622 , 0x04 ; dpll2_fast_lock_freq_err +X , 0x0623 , 0x00 ; dpll2_fast_lock_ideal_time +X , 0x0624 , 0x00 ; dpll2_fast_lock_ideal_time +X , 0x0626 , 0x07 ; dpll2_fast_lock_fol +X , 0x0627 , 0xD0 ; dpll2_fast_lock_fol +X , 0x062E , 0x00 ; dpll2_damping +X , 0x0630 , 0x02 ; dpll2_phase_bad +X , 0x0631 , 0x25 ; dpll2_phase_bad +X , 0x0632 , 0x51 ; dpll2_phase_bad +X , 0x0633 , 0x00 ; dpll2_phase_bad +X , 0x0634 , 0x02 ; dpll2_phase_good +X , 0x0635 , 0x25 ; dpll2_phase_good +X , 0x0636 , 0x51 ; dpll2_phase_good +X , 0x0637 , 0x00 ; dpll2_phase_good +X , 0x0638 , 0x09 ; dpll2_duration_good +X , 0x0639 , 0x00 ; dpll2_lock_delay +X , 0x063A , 0x00 ; dpll2_tie +X , 0x063B , 0x00 ; dpll2_tie_wr_thresh +X , 0x063C , 0x7F ; dpll2_fp_first_realign +X , 0x063D , 0x00 ; dpll2_fp_realign_intvl +X , 0x063E , 0x00 ; dpll2_fp_lock_thresh +X , 0x0640 , 0x77 ; dpll2_step_time_thresh +X , 0x0641 , 0x35 ; dpll2_step_time_thresh +X , 0x0642 , 0x94 ; dpll2_step_time_thresh +X , 0x0643 , 0x00 ; dpll2_step_time_thresh +X , 0x0644 , 0xEE ; dpll2_step_time_reso +X , 0x0645 , 0x6B ; dpll2_step_time_reso +X , 0x0646 , 0x28 ; dpll2_step_time_reso +X , 0x0647 , 0x00 ; dpll2_step_time_reso +X , 0x0648 , 0x50 ; dpll2_bw_thresh_speedup +X , 0x0649 , 0x01 ; dpll2_freq_err_ctrl +X , 0x064A , 0x00 ; dpll2_freq_err_timer +X , 0x0604 , 0x01 ; dpll_mb_sem +W , 20000 + +X , 0x0602 , 0x00 ; dpll_mb_mask +X , 0x0603 , 0x08 ; dpll_mb_mask +X , 0x0604 , 0x02 ; dpll_mb_sem +W , 20000 +X , 0x0605 , 0x07 ; dpll3_bw_fixed +X , 0x0606 , 0x81 ; dpll3_bw_var +X , 0x0607 , 0x00 ; dpll3_config +X , 0x0608 , 0x1D ; dpll3_psl +X , 0x0609 , 0x4C ; dpll3_psl +X , 0x060E , 0x0B ; dpll3_range +X , 0x060F , 0xB8 ; dpll3_range +X , 0x0610 , 0x1F ; dpll3_ref_sw_mask +X , 0x0611 , 0x1F ; dpll3_ref_ho_mask +X , 0x0614 , 0x10 ; dpll3_ref_prio_0 +X , 0x0615 , 0x32 ; dpll3_ref_prio_1 +X , 0x0616 , 0x54 ; dpll3_ref_prio_2 +X , 0x0617 , 0x76 ; dpll3_ref_prio_3 +X , 0x0618 , 0x98 ; dpll3_ref_prio_4 +X , 0x061C , 0x08 ; dpll3_ho_filter +X , 0x061D , 0x86 ; dpll3_ho_delay +X , 0x061E , 0x01 ; dpll3_split_xo_config +X , 0x0620 , 0x01 ; dpll3_fast_lock_ctrl +X , 0x0621 , 0xFF ; dpll3_fast_lock_phase_err +X , 0x0622 , 0x04 ; dpll3_fast_lock_freq_err +X , 0x0623 , 0x00 ; dpll3_fast_lock_ideal_time +X , 0x0624 , 0x00 ; dpll3_fast_lock_ideal_time +X , 0x0626 , 0x07 ; dpll3_fast_lock_fol +X , 0x0627 , 0xD0 ; dpll3_fast_lock_fol +X , 0x062E , 0x00 ; dpll3_damping +X , 0x0630 , 0x02 ; dpll3_phase_bad +X , 0x0631 , 0x25 ; dpll3_phase_bad +X , 0x0632 , 0x51 ; dpll3_phase_bad +X , 0x0633 , 0x00 ; dpll3_phase_bad +X , 0x0634 , 0x02 ; dpll3_phase_good +X , 0x0635 , 0x25 ; dpll3_phase_good +X , 0x0636 , 0x51 ; dpll3_phase_good +X , 0x0637 , 0x00 ; dpll3_phase_good +X , 0x0638 , 0x09 ; dpll3_duration_good +X , 0x0639 , 0x00 ; dpll3_lock_delay +X , 0x063A , 0x00 ; dpll3_tie +X , 0x063B , 0x00 ; dpll3_tie_wr_thresh +X , 0x063C , 0x02 ; dpll3_fp_first_realign +X , 0x063D , 0x82 ; dpll3_fp_realign_intvl +X , 0x063E , 0x00 ; dpll3_fp_lock_thresh +X , 0x0648 , 0x50 ; dpll3_bw_thresh_speedup +X , 0x0649 , 0x01 ; dpll3_freq_err_ctrl +X , 0x064A , 0x00 ; dpll3_freq_err_timer +X , 0x0604 , 0x01 ; dpll_mb_sem +W , 20000 + +X , 0x0602 , 0x00 ; dpll_mb_mask +X , 0x0603 , 0x10 ; dpll_mb_mask +X , 0x0604 , 0x02 ; dpll_mb_sem +W , 20000 +X , 0x0605 , 0x00 ; dpll4_bw_fixed +X , 0x0606 , 0x00 ; dpll4_bw_var +X , 0x0607 , 0x00 ; dpll4_config +X , 0x0608 , 0x00 ; dpll4_psl +X , 0x0609 , 0x00 ; dpll4_psl +X , 0x0611 , 0x17 ; dpll4_ref_ho_mask +X , 0x061C , 0x00 ; dpll4_ho_filter +X , 0x061D , 0x4C ; dpll4_ho_delay +X , 0x061E , 0x00 ; dpll4_split_xo_config +X , 0x0620 , 0x01 ; dpll4_fast_lock_ctrl +X , 0x0621 , 0xFF ; dpll4_fast_lock_phase_err +X , 0x0622 , 0x04 ; dpll4_fast_lock_freq_err +X , 0x0623 , 0x00 ; dpll4_fast_lock_ideal_time +X , 0x0624 , 0x00 ; dpll4_fast_lock_ideal_time +X , 0x0626 , 0x07 ; dpll4_fast_lock_fol +X , 0x0627 , 0xD0 ; dpll4_fast_lock_fol +X , 0x062E , 0x00 ; dpll4_damping +X , 0x0630 , 0x02 ; dpll4_phase_bad +X , 0x0631 , 0x25 ; dpll4_phase_bad +X , 0x0632 , 0x51 ; dpll4_phase_bad +X , 0x0633 , 0x00 ; dpll4_phase_bad +X , 0x0634 , 0x02 ; dpll4_phase_good +X , 0x0635 , 0x25 ; dpll4_phase_good +X , 0x0636 , 0x51 ; dpll4_phase_good +X , 0x0637 , 0x00 ; dpll4_phase_good +X , 0x0638 , 0x09 ; dpll4_duration_good +X , 0x0639 , 0x00 ; dpll4_lock_delay +X , 0x063A , 0x00 ; dpll4_tie +X , 0x063B , 0x00 ; dpll4_tie_wr_thresh +X , 0x063C , 0x7F ; dpll4_fp_first_realign +X , 0x063D , 0x00 ; dpll4_fp_realign_intvl +X , 0x063E , 0x00 ; dpll4_fp_lock_thresh +X , 0x0648 , 0x50 ; dpll4_bw_thresh_speedup +X , 0x0649 , 0x01 ; dpll4_freq_err_ctrl +X , 0x064A , 0x00 ; dpll4_freq_err_timer +X , 0x0604 , 0x01 ; dpll_mb_sem +W , 20000 + +X , 0x0602 , 0x00 ; dpll_mb_mask +X , 0x0603 , 0x20 ; dpll_mb_mask +X , 0x0604 , 0x02 ; dpll_mb_sem +W , 20000 +X , 0x0605 , 0x00 ; dpll5_bw_fixed +X , 0x0606 , 0x00 ; dpll5_bw_var +X , 0x0607 , 0x00 ; dpll5_config +X , 0x0608 , 0x00 ; dpll5_psl +X , 0x0609 , 0x00 ; dpll5_psl +X , 0x060E , 0x0B ; dpll5_range +X , 0x060F , 0xB8 ; dpll5_range +X , 0x0610 , 0x08 ; dpll5_ref_sw_mask +X , 0x0611 , 0x17 ; dpll5_ref_ho_mask +X , 0x0614 , 0x10 ; dpll5_ref_prio_0 +X , 0x0615 , 0x32 ; dpll5_ref_prio_1 +X , 0x0616 , 0x54 ; dpll5_ref_prio_2 +X , 0x0617 , 0x76 ; dpll5_ref_prio_3 +X , 0x0618 , 0x98 ; dpll5_ref_prio_4 +X , 0x061C , 0x00 ; dpll5_ho_filter +X , 0x061D , 0x4C ; dpll5_ho_delay +X , 0x061E , 0x00 ; dpll5_split_xo_config +X , 0x0620 , 0x01 ; dpll5_fast_lock_ctrl +X , 0x0621 , 0xFF ; dpll5_fast_lock_phase_err +X , 0x0622 , 0x04 ; dpll5_fast_lock_freq_err +X , 0x0623 , 0x00 ; dpll5_fast_lock_ideal_time +X , 0x0624 , 0x00 ; dpll5_fast_lock_ideal_time +X , 0x0626 , 0x07 ; dpll5_fast_lock_fol +X , 0x0627 , 0xD0 ; dpll5_fast_lock_fol +X , 0x062E , 0x00 ; dpll5_damping +X , 0x0630 , 0x02 ; dpll5_phase_bad +X , 0x0631 , 0x25 ; dpll5_phase_bad +X , 0x0632 , 0x51 ; dpll5_phase_bad +X , 0x0633 , 0x00 ; dpll5_phase_bad +X , 0x0634 , 0x02 ; dpll5_phase_good +X , 0x0635 , 0x25 ; dpll5_phase_good +X , 0x0636 , 0x51 ; dpll5_phase_good +X , 0x0637 , 0x00 ; dpll5_phase_good +X , 0x0638 , 0x09 ; dpll5_duration_good +X , 0x0639 , 0x00 ; dpll5_lock_delay +X , 0x063A , 0x00 ; dpll5_tie +X , 0x063B , 0x00 ; dpll5_tie_wr_thresh +X , 0x063C , 0x7F ; dpll5_fp_first_realign +X , 0x063D , 0x00 ; dpll5_fp_realign_intvl +X , 0x063E , 0x00 ; dpll5_fp_lock_thresh +X , 0x0640 , 0x77 ; dpll5_step_time_thresh +X , 0x0641 , 0x35 ; dpll5_step_time_thresh +X , 0x0642 , 0x94 ; dpll5_step_time_thresh +X , 0x0643 , 0x00 ; dpll5_step_time_thresh +X , 0x0644 , 0xEE ; dpll5_step_time_reso +X , 0x0645 , 0x6B ; dpll5_step_time_reso +X , 0x0646 , 0x28 ; dpll5_step_time_reso +X , 0x0647 , 0x00 ; dpll5_step_time_reso +X , 0x0648 , 0x50 ; dpll5_bw_thresh_speedup +X , 0x0649 , 0x01 ; dpll5_freq_err_ctrl +X , 0x064A , 0x00 ; dpll5_freq_err_timer +X , 0x0604 , 0x01 ; dpll_mb_sem +W , 20000 +X , 0x0007 , 0x20 ; custom_config_ver +X , 0x0008 , 0x20 ; custom_config_ver +X , 0x0009 , 0x04 ; custom_config_ver +X , 0x000A , 0x14 ; custom_config_ver +X , 0x000B , 0x04 ; central_freq_offset +X , 0x000C , 0x6A ; central_freq_offset +X , 0x000D , 0xAA ; central_freq_offset +X , 0x000E , 0xAB ; central_freq_offset +W , 100000 +X , 0x0012 , 0x00 ; warm_start +X , 0x0013 , 0x00 ; trap_status +X , 0x0014 , 0x00 ; trap_mask +X , 0x0026 , 0x00 ; master_clk_ofst +X , 0x0027 , 0x00 ; master_clk_ofst +X , 0x0028 , 0x00 ; master_clk_ofst +X , 0x0029 , 0x00 ; master_clk_ofst +X , 0x002A , 0x00 ; master_clk_ofst +X , 0x002C , 0x02 ; osci_ctrl +X , 0x0080 , 0x00 ; gpio_irq_config +X , 0x0082 , 0x00 ; gpio_out_2_0 +X , 0x0084 , 0x00 ; gpio_freeze_2_0 +X , 0x0088 , 0x00 ; gpio_select_0 +X , 0x0089 , 0x00 ; gpio_select_0 +X , 0x008A , 0x00 ; gpio_config_0 +X , 0x008B , 0x00 ; gpio_select_1 +X , 0x008C , 0x00 ; gpio_select_1 +X , 0x008D , 0x00 ; gpio_config_1 +X , 0x008E , 0x00 ; gpio_select_2 +X , 0x008F , 0x00 ; gpio_select_2 +X , 0x0090 , 0x00 ; gpio_config_2 +X , 0x0097 , 0x00 ; gpio_select_5 +X , 0x0098 , 0x00 ; gpio_config_5 +X , 0x0099 , 0x00 ; gpio_select_6 +X , 0x009A , 0x00 ; gpio_config_6 +X , 0x009B , 0x00 ; gpio_select_7 +X , 0x009C , 0x00 ; gpio_config_7 +X , 0x009D , 0x00 ; gpio_select_8 +X , 0x009E , 0x00 ; gpio_config_8 +X , 0x00A8 , 0x00 ; ref_irq_mask_3_0 +X , 0x00A9 , 0x00 ; ref_irq_mask_4 +X , 0x00AB , 0x00 ; dpll_irq_mask +X , 0x00AC , 0x00 ; synth_irq_mask +X , 0x00AD , 0x00 ; hp_out_irq_mask +X , 0x00B0 , 0x00 ; ref_mon_th_mask_0P +X , 0x00B1 , 0x00 ; ref_mon_tl_mask_0P +X , 0x00B2 , 0x00 ; ref_mon_th_mask_0N +X , 0x00B3 , 0x00 ; ref_mon_tl_mask_0N +X , 0x00B4 , 0x00 ; ref_mon_th_mask_1P +X , 0x00B5 , 0x00 ; ref_mon_tl_mask_1P +X , 0x00B6 , 0x00 ; ref_mon_th_mask_1N +X , 0x00B7 , 0x00 ; ref_mon_tl_mask_1N +X , 0x00B8 , 0x00 ; ref_mon_th_mask_2P +X , 0x00B9 , 0x00 ; ref_mon_tl_mask_2P +X , 0x00BA , 0x00 ; ref_mon_th_mask_2N +X , 0x00BB , 0x00 ; ref_mon_tl_mask_2N +X , 0x00BC , 0x00 ; ref_mon_th_mask_3P +X , 0x00BD , 0x00 ; ref_mon_tl_mask_3P +X , 0x00BE , 0x00 ; ref_mon_th_mask_3N +X , 0x00BF , 0x00 ; ref_mon_tl_mask_3N +X , 0x00C0 , 0x00 ; ref_mon_th_mask_4P +X , 0x00C1 , 0x00 ; ref_mon_tl_mask_4P +X , 0x00C2 , 0x00 ; ref_mon_th_mask_4N +X , 0x00C3 , 0x00 ; ref_mon_tl_mask_4N +X , 0x00D0 , 0x00 ; dpll_mon_th_mask_0 +X , 0x00D1 , 0x00 ; dpll_mon_tl_mask_0 +X , 0x00D2 , 0x00 ; dpll_mon_th_mask_1 +X , 0x00D3 , 0x00 ; dpll_mon_tl_mask_1 +X , 0x00D4 , 0x00 ; dpll_mon_th_mask_2 +X , 0x00D5 , 0x00 ; dpll_mon_tl_mask_2 +X , 0x00D6 , 0x00 ; dpll_mon_th_mask_3 +X , 0x00D7 , 0x00 ; dpll_mon_tl_mask_3 +X , 0x00D8 , 0x00 ; dpll_mon_th_mask_4 +X , 0x00D9 , 0x00 ; dpll_mon_tl_mask_4 +X , 0x00DA , 0x00 ; dpll_mon_th_mask_5 +X , 0x00DB , 0x00 ; dpll_mon_tl_mask_5 +X , 0x00E0 , 0x00 ; gp_mon_th_mask +X , 0x00E1 , 0x00 ; gp_mon_tl_mask +X , 0x00E2 , 0x00 ; hp_mon_th_mask_1 +X , 0x00E3 , 0x00 ; hp_mon_tl_mask_1 +X , 0x00E4 , 0x00 ; hp_mon_th_mask_2 +X , 0x00E5 , 0x00 ; hp_mon_tl_mask_2 +X , 0x00E6 , 0x00 ; hp_out_th_mask_0 +X , 0x00E7 , 0x00 ; hp_out_tl_mask_0 +X , 0x00E8 , 0x00 ; hp_out_th_mask_1 +X , 0x00E9 , 0x00 ; hp_out_tl_mask_1 +X , 0x00EA , 0x00 ; hp_out_th_mask_2 +X , 0x00EB , 0x00 ; hp_out_tl_mask_2 +X , 0x00EC , 0x00 ; hp_out_th_mask_3 +X , 0x00ED , 0x00 ; hp_out_tl_mask_3 +X , 0x00EE , 0x00 ; hp_out_th_mask_4 +X , 0x00EF , 0x00 ; hp_out_tl_mask_4 +X , 0x00F0 , 0x00 ; hp_out_th_mask_5 +X , 0x00F1 , 0x00 ; hp_out_tl_mask_5 +X , 0x00F2 , 0x00 ; hp_out_th_mask_6 +X , 0x00F3 , 0x00 ; hp_out_tl_mask_6 +X , 0x00F4 , 0x00 ; hp_out_th_mask_7 +X , 0x00F5 , 0x00 ; hp_out_tl_mask_7 +X , 0x0200 , 0x00 ; ref_los_3_0 +X , 0x0201 , 0x00 ; ref_los_4 +X , 0x0203 , 0x00 ; ref_sfm_clr_3_0 +X , 0x0204 , 0x00 ; ref_sfm_clr_4 +X , 0x0205 , 0x00 ; ref_freq_cmd +X , 0x0206 , 0x00 ; dpll_freq_cmd +X , 0x0207 , 0x00 ; split_xo_cmd +X , 0x0208 , 0x02 ; dpll_enable +X , 0x020A , 0x44 ; split_xo_ref +X , 0x020B , 0x00 ; ext_fb_ctrl +X , 0x020C , 0x00 ; ext_fb_sel +X , 0x020D , 0x41 ; dpll_meas_ref_freq_ctrl +X , 0x0211 , 0x03 ; dpll_ctrl_0 +X , 0x0212 , 0x00 ; dpll_cmd_0 +X , 0x0215 , 0x02 ; dpll_ctrl_1 +X , 0x0216 , 0x00 ; dpll_cmd_1 +X , 0x0219 , 0x02 ; dpll_ctrl_2 +X , 0x021A , 0x00 ; dpll_cmd_2 +X , 0x021D , 0x00 ; dpll_ctrl_3 +X , 0x021E , 0x00 ; dpll_cmd_3 +X , 0x0234 , 0x00 ; phase_step_data +X , 0x0235 , 0x00 ; phase_step_data +X , 0x0236 , 0x00 ; phase_step_data +X , 0x0237 , 0x00 ; phase_step_data +X , 0x0238 , 0x02 ; phase_step_mask_gp +X , 0x0239 , 0x00 ; phase_step_mask_hp +X , 0x023A , 0x03 ; step_time_mask_gp +X , 0x023B , 0x80 ; step_time_mask_hp +X , 0x023E , 0x31 ; phase_step_max +X , 0x0240 , 0x00 ; dpll_meas_ctrl +X , 0x0241 , 0x00 ; dpll_meas_idx +X , 0x0242 , 0x00 ; dpll_meas_ref_edge_3_0 +X , 0x0243 , 0x00 ; dpll_meas_ref_edge_4 +X , 0x024C , 0x00 ; out_squelch_ctrl +X , 0x024D , 0x00 ; gp_squelch_mask +X , 0x024E , 0x00 ; hp_squelch_mask +X , 0x025F , 0x00 ; pherr_read_rqst +X , 0x0260 , 0x00 ; dpll_phase_err_read_mask +X , 0x0306 , 0x08 ; dpll_df_ctrl_0 +X , 0x0307 , 0x00 ; dpll_df_manual_0 +X , 0x0308 , 0x00 ; dpll_df_manual_0 +X , 0x0309 , 0x00 ; dpll_df_manual_0 +X , 0x030A , 0x00 ; dpll_df_manual_0 +X , 0x030B , 0x00 ; dpll_df_manual_0 +X , 0x0313 , 0x00 ; dpll_tie_data_0 +X , 0x0314 , 0x00 ; dpll_tie_data_0 +X , 0x0315 , 0x00 ; dpll_tie_data_0 +X , 0x0316 , 0x01 ; dpll_tie_data_0 +X , 0x0317 , 0x00 ; dpll_tie_ctrl_0 +X , 0x0318 , 0x00 ; dpll_step_data_0 +X , 0x0319 , 0x00 ; dpll_step_data_0 +X , 0x031A , 0x00 ; dpll_step_data_0 +X , 0x031B , 0x00 ; dpll_step_data_0 +X , 0x031C , 0x00 ; dpll_step_data_0 +X , 0x031D , 0x00 ; dpll_step_data_0 +X , 0x031E , 0x00 ; dpll_step_ctrl_0 +X , 0x0326 , 0x18 ; dpll_df_ctrl_1 +X , 0x0327 , 0x00 ; dpll_df_manual_1 +X , 0x0328 , 0x00 ; dpll_df_manual_1 +X , 0x0329 , 0x00 ; dpll_df_manual_1 +X , 0x032A , 0x00 ; dpll_df_manual_1 +X , 0x032B , 0x00 ; dpll_df_manual_1 +X , 0x0333 , 0xFF ; dpll_tie_data_1 +X , 0x0334 , 0xFF ; dpll_tie_data_1 +X , 0x0335 , 0xFF ; dpll_tie_data_1 +X , 0x0336 , 0xF7 ; dpll_tie_data_1 +X , 0x0337 , 0x02 ; dpll_tie_ctrl_1 +X , 0x0338 , 0x00 ; dpll_step_data_1 +X , 0x0339 , 0x00 ; dpll_step_data_1 +X , 0x033A , 0x00 ; dpll_step_data_1 +X , 0x033B , 0x00 ; dpll_step_data_1 +X , 0x033C , 0x00 ; dpll_step_data_1 +X , 0x033D , 0x00 ; dpll_step_data_1 +X , 0x033E , 0x00 ; dpll_step_ctrl_1 +X , 0x0346 , 0x00 ; dpll_df_ctrl_2 +X , 0x0347 , 0x00 ; dpll_df_manual_2 +X , 0x0348 , 0x00 ; dpll_df_manual_2 +X , 0x0349 , 0x00 ; dpll_df_manual_2 +X , 0x034A , 0x00 ; dpll_df_manual_2 +X , 0x034B , 0x00 ; dpll_df_manual_2 +X , 0x0353 , 0x00 ; dpll_tie_data_2 +X , 0x0354 , 0x00 ; dpll_tie_data_2 +X , 0x0355 , 0x00 ; dpll_tie_data_2 +X , 0x0356 , 0x00 ; dpll_tie_data_2 +X , 0x0357 , 0x00 ; dpll_tie_ctrl_2 +X , 0x0358 , 0x00 ; dpll_step_data_2 +X , 0x0359 , 0x00 ; dpll_step_data_2 +X , 0x035A , 0x00 ; dpll_step_data_2 +X , 0x035B , 0x00 ; dpll_step_data_2 +X , 0x035C , 0x00 ; dpll_step_data_2 +X , 0x035D , 0x00 ; dpll_step_data_2 +X , 0x035E , 0x00 ; dpll_step_ctrl_2 +X , 0x0366 , 0x00 ; dpll_df_ctrl_3 +X , 0x036E , 0x00 ; dpll_df_ctrl_4 +X , 0x0376 , 0x00 ; dpll_df_ctrl_5 +X , 0x0380 , 0x00 ; dpll_tod_sec_0 +X , 0x0381 , 0x00 ; dpll_tod_sec_0 +X , 0x0382 , 0x00 ; dpll_tod_sec_0 +X , 0x0383 , 0x00 ; dpll_tod_sec_0 +X , 0x0384 , 0x00 ; dpll_tod_sec_0 +X , 0x0385 , 0x00 ; dpll_tod_sec_0 +X , 0x0386 , 0x00 ; dpll_tod_ns_0 +X , 0x0387 , 0x00 ; dpll_tod_ns_0 +X , 0x0388 , 0x00 ; dpll_tod_ns_0 +X , 0x0389 , 0x00 ; dpll_tod_ns_0 +X , 0x038A , 0x00 ; dpll_tod_ctrl_0 +X , 0x038C , 0x00 ; dpll_tod_sec_1 +X , 0x038D , 0x00 ; dpll_tod_sec_1 +X , 0x038E , 0x00 ; dpll_tod_sec_1 +X , 0x038F , 0x00 ; dpll_tod_sec_1 +X , 0x0390 , 0x00 ; dpll_tod_sec_1 +X , 0x0391 , 0x00 ; dpll_tod_sec_1 +X , 0x0392 , 0x00 ; dpll_tod_ns_1 +X , 0x0393 , 0x00 ; dpll_tod_ns_1 +X , 0x0394 , 0x00 ; dpll_tod_ns_1 +X , 0x0395 , 0x00 ; dpll_tod_ns_1 +X , 0x0396 , 0x00 ; dpll_tod_ctrl_1 +X , 0x0398 , 0x00 ; dpll_tod_sec_2 +X , 0x0399 , 0x00 ; dpll_tod_sec_2 +X , 0x039A , 0x00 ; dpll_tod_sec_2 +X , 0x039B , 0x00 ; dpll_tod_sec_2 +X , 0x039C , 0x00 ; dpll_tod_sec_2 +X , 0x039D , 0x00 ; dpll_tod_sec_2 +X , 0x039E , 0x00 ; dpll_tod_ns_2 +X , 0x039F , 0x00 ; dpll_tod_ns_2 +X , 0x03A0 , 0x00 ; dpll_tod_ns_2 +X , 0x03A1 , 0x00 ; dpll_tod_ns_2 +X , 0x03A2 , 0x00 ; dpll_tod_ctrl_2 +X , 0x0400 , 0x01 ; gp_ctrl +X , 0x0401 , 0x00 ; gp_cmd +X , 0x0404 , 0x61 ; gp_freq_base +X , 0x0405 , 0xA8 ; gp_freq_base +X , 0x0406 , 0x00 ; gp_freq_mult +X , 0x0407 , 0x75 ; gp_freq_mult +X , 0x0408 , 0x30 ; gp_freq_mult +X , 0x0409 , 0x00 ; gp_freq_m +X , 0x040A , 0x01 ; gp_freq_m +X , 0x040B , 0x00 ; gp_freq_n +X , 0x040C , 0x01 ; gp_freq_n +X , 0x040D , 0x00 ; gp_fine_shift +X , 0x040E , 0x00 ; gp_fine_shift +X , 0x040F , 0x01 ; gp_fine_shift_intvl +X , 0x0420 , 0x01 ; gp_out_ctrl_0 +X , 0x0422 , 0x00 ; gp_out_div_0 +X , 0x0423 , 0x00 ; gp_out_div_0 +X , 0x0424 , 0x00 ; gp_out_div_0 +X , 0x0425 , 0x4B ; gp_out_div_0 +X , 0x0426 , 0x00 ; gp_out_width_0 +X , 0x0427 , 0x00 ; gp_out_width_0 +X , 0x0428 , 0x00 ; gp_out_width_0 +X , 0x0429 , 0x00 ; gp_out_width_0 +X , 0x0430 , 0x01 ; gp_out_ctrl_1 +X , 0x0432 , 0x00 ; gp_out_div_1 +X , 0x0433 , 0x00 ; gp_out_div_1 +X , 0x0434 , 0x00 ; gp_out_div_1 +X , 0x0435 , 0x4B ; gp_out_div_1 +X , 0x0436 , 0x00 ; gp_out_width_1 +X , 0x0437 , 0x00 ; gp_out_width_1 +X , 0x0438 , 0x00 ; gp_out_width_1 +X , 0x0439 , 0x00 ; gp_out_width_1 +X , 0x0450 , 0x00 ; gp_out_en +X , 0x0451 , 0x0F ; gp_out_drive +X , 0x0481 , 0x03 ; hp_src_1 +X , 0x0482 , 0x00 ; hp_misc_1 +X , 0x0484 , 0xDF ; hp_freq_base_1 +X , 0x0485 , 0x84 ; hp_freq_base_1 +X , 0x0486 , 0x75 ; hp_freq_base_1 +X , 0x0487 , 0x80 ; hp_freq_base_1 +X , 0x0488 , 0x00 ; hp_freq_m_1 +X , 0x0489 , 0x00 ; hp_freq_m_1 +X , 0x048A , 0x00 ; hp_freq_m_1 +X , 0x048B , 0x01 ; hp_freq_m_1 +X , 0x048C , 0x00 ; hp_freq_n_1 +X , 0x048D , 0x00 ; hp_freq_n_1 +X , 0x048E , 0x00 ; hp_freq_n_1 +X , 0x048F , 0x01 ; hp_freq_n_1 +X , 0x0490 , 0x07 ; hp_hsdiv_1 +X , 0x0491 , 0x0B ; hp_fdiv_base_1 +X , 0x0492 , 0xEB ; hp_fdiv_base_1 +X , 0x0493 , 0xC2 ; hp_fdiv_base_1 +X , 0x0494 , 0x00 ; hp_fdiv_base_1 +X , 0x0495 , 0x00 ; hp_fdiv_num_1 +X , 0x0496 , 0x00 ; hp_fdiv_num_1 +X , 0x0497 , 0x00 ; hp_fdiv_num_1 +X , 0x0498 , 0x01 ; hp_fdiv_num_1 +X , 0x0499 , 0x00 ; hp_fdiv_den_1 +X , 0x049A , 0x00 ; hp_fdiv_den_1 +X , 0x049B , 0x00 ; hp_fdiv_den_1 +X , 0x049C , 0x01 ; hp_fdiv_den_1 +X , 0x04A4 , 0x00 ; hp_fine_shift_1 +X , 0x04A5 , 0x00 ; hp_fine_shift_1 +X , 0x04A6 , 0x00 ; hp_fine_shift_1 +X , 0x04A7 , 0x00 ; hp_fine_shift_1 +X , 0x04A8 , 0x00 ; hp_fb_msdiv_1 +X , 0x04A9 , 0x00 ; hp_fb_lsdiv_1 +X , 0x04AA , 0x00 ; hp_fb_lsdiv_1 +X , 0x04AB , 0x00 ; hp_fb_lsdiv_1 +X , 0x04AC , 0x00 ; hp_fb_lsdiv_1 +X , 0x04AD , 0x00 ; hp_fb_ref_1 +X , 0x04AE , 0x00 ; hp_fb_out_1 +X , 0x04B1 , 0x03 ; hp_src_2 +X , 0x04B2 , 0x00 ; hp_misc_2 +X , 0x04B4 , 0xDF ; hp_freq_base_2 +X , 0x04B5 , 0x84 ; hp_freq_base_2 +X , 0x04B6 , 0x75 ; hp_freq_base_2 +X , 0x04B7 , 0x80 ; hp_freq_base_2 +X , 0x04B8 , 0x00 ; hp_freq_m_2 +X , 0x04B9 , 0x00 ; hp_freq_m_2 +X , 0x04BA , 0x00 ; hp_freq_m_2 +X , 0x04BB , 0x01 ; hp_freq_m_2 +X , 0x04BC , 0x00 ; hp_freq_n_2 +X , 0x04BD , 0x00 ; hp_freq_n_2 +X , 0x04BE , 0x00 ; hp_freq_n_2 +X , 0x04BF , 0x01 ; hp_freq_n_2 +X , 0x04C0 , 0x07 ; hp_hsdiv_2 +X , 0x04C1 , 0x0B ; hp_fdiv_base_2 +X , 0x04C2 , 0xEB ; hp_fdiv_base_2 +X , 0x04C3 , 0xC2 ; hp_fdiv_base_2 +X , 0x04C4 , 0x00 ; hp_fdiv_base_2 +X , 0x04C5 , 0x00 ; hp_fdiv_num_2 +X , 0x04C6 , 0x00 ; hp_fdiv_num_2 +X , 0x04C7 , 0x00 ; hp_fdiv_num_2 +X , 0x04C8 , 0x01 ; hp_fdiv_num_2 +X , 0x04C9 , 0x00 ; hp_fdiv_den_2 +X , 0x04CA , 0x00 ; hp_fdiv_den_2 +X , 0x04CB , 0x00 ; hp_fdiv_den_2 +X , 0x04CC , 0x01 ; hp_fdiv_den_2 +X , 0x04D4 , 0x00 ; hp_fine_shift_2 +X , 0x04D5 , 0x00 ; hp_fine_shift_2 +X , 0x04D6 , 0x00 ; hp_fine_shift_2 +X , 0x04D7 , 0x00 ; hp_fine_shift_2 +X , 0x04D8 , 0x00 ; hp_fb_msdiv_2 +X , 0x04D9 , 0x00 ; hp_fb_lsdiv_2 +X , 0x04DA , 0x00 ; hp_fb_lsdiv_2 +X , 0x04DB , 0x00 ; hp_fb_lsdiv_2 +X , 0x04DC , 0x00 ; hp_fb_lsdiv_2 +X , 0x04DD , 0x00 ; hp_fb_ref_2 +X , 0x04DE , 0x00 ; hp_fb_out_2 +X , 0x04E2 , 0x00 ; hp_stop_ctrl +X , 0x04E3 , 0x00 ; hp_stopall_ctrl +X , 0x04E4 , 0x00 ; hp_align_bw_fixed_1 +X , 0x04E5 , 0x00 ; hp_align_bw_var_1 +X , 0x04E6 , 0x00 ; hp_align_bw_fixed_2 +X , 0x04E7 , 0x00 ; hp_align_bw_var_2 +X , 0x0500 , 0x14 ; hp_out_msdiv_0 +X , 0x0501 , 0x00 ; hp_out_lsdiv_0 +X , 0x0502 , 0x00 ; hp_out_lsdiv_0 +X , 0x0503 , 0x00 ; hp_out_lsdiv_0 +X , 0x0504 , 0x01 ; hp_out_lsdiv_0 +X , 0x0505 , 0x02 ; hp_out_ctrl_0 +X , 0x0506 , 0x05 ; hp_out_diff_0 +X , 0x0507 , 0x00 ; hp_out_reg_0 +X , 0x0508 , 0x00 ; hp_out_lsctrl_0 +X , 0x0509 , 0x00 ; hp_out_width_0 +X , 0x050A , 0x00 ; hp_out_shift_0 +X , 0x050B , 0x0C ; hp_out_stop_0 +X , 0x0510 , 0x32 ; hp_out_msdiv_1 +X , 0x0511 , 0x00 ; hp_out_lsdiv_1 +X , 0x0512 , 0x00 ; hp_out_lsdiv_1 +X , 0x0513 , 0x00 ; hp_out_lsdiv_1 +X , 0x0514 , 0x01 ; hp_out_lsdiv_1 +X , 0x0515 , 0x05 ; hp_out_ctrl_1 +X , 0x0516 , 0x05 ; hp_out_diff_1 +X , 0x0517 , 0x00 ; hp_out_reg_1 +X , 0x0518 , 0x00 ; hp_out_lsctrl_1 +X , 0x0519 , 0x00 ; hp_out_width_1 +X , 0x051A , 0x00 ; hp_out_shift_1 +X , 0x051B , 0x0C ; hp_out_stop_1 +X , 0x0520 , 0x04 ; hp_out_msdiv_2 +X , 0x0521 , 0x00 ; hp_out_lsdiv_2 +X , 0x0522 , 0x00 ; hp_out_lsdiv_2 +X , 0x0523 , 0x00 ; hp_out_lsdiv_2 +X , 0x0524 , 0x01 ; hp_out_lsdiv_2 +X , 0x0525 , 0x02 ; hp_out_ctrl_2 +X , 0x0526 , 0x05 ; hp_out_diff_2 +X , 0x0527 , 0x00 ; hp_out_reg_2 +X , 0x0528 , 0x00 ; hp_out_lsctrl_2 +X , 0x0529 , 0x00 ; hp_out_width_2 +X , 0x052A , 0x00 ; hp_out_shift_2 +X , 0x052B , 0x0C ; hp_out_stop_2 +X , 0x0530 , 0x14 ; hp_out_msdiv_3 +X , 0x0531 , 0x00 ; hp_out_lsdiv_3 +X , 0x0532 , 0x00 ; hp_out_lsdiv_3 +X , 0x0533 , 0x00 ; hp_out_lsdiv_3 +X , 0x0534 , 0x01 ; hp_out_lsdiv_3 +X , 0x0535 , 0x02 ; hp_out_ctrl_3 +X , 0x0536 , 0x05 ; hp_out_diff_3 +X , 0x0537 , 0x00 ; hp_out_reg_3 +X , 0x0538 , 0x00 ; hp_out_lsctrl_3 +X , 0x0539 , 0x00 ; hp_out_width_3 +X , 0x053A , 0x00 ; hp_out_shift_3 +X , 0x053B , 0x0C ; hp_out_stop_3 +X , 0x0540 , 0x0A ; hp_out_msdiv_4 +X , 0x0541 , 0x00 ; hp_out_lsdiv_4 +X , 0x0542 , 0x00 ; hp_out_lsdiv_4 +X , 0x0543 , 0x00 ; hp_out_lsdiv_4 +X , 0x0544 , 0x19 ; hp_out_lsdiv_4 +X , 0x0545 , 0x00 ; hp_out_ctrl_4 +X , 0x0546 , 0x05 ; hp_out_diff_4 +X , 0x0547 , 0x00 ; hp_out_reg_4 +X , 0x0548 , 0x00 ; hp_out_lsctrl_4 +X , 0x0549 , 0x00 ; hp_out_width_4 +X , 0x054A , 0x00 ; hp_out_shift_4 +X , 0x054B , 0x0C ; hp_out_stop_4 +X , 0x0550 , 0x32 ; hp_out_msdiv_5 +X , 0x0551 , 0x00 ; hp_out_lsdiv_5 +X , 0x0552 , 0x00 ; hp_out_lsdiv_5 +X , 0x0553 , 0x09 ; hp_out_lsdiv_5 +X , 0x0554 , 0xC4 ; hp_out_lsdiv_5 +X , 0x0555 , 0x05 ; hp_out_ctrl_5 +X , 0x0556 , 0x05 ; hp_out_diff_5 +X , 0x0557 , 0x00 ; hp_out_reg_5 +X , 0x0558 , 0x10 ; hp_out_lsctrl_5 +X , 0x0559 , 0x00 ; hp_out_width_5 +X , 0x055A , 0x00 ; hp_out_shift_5 +X , 0x055B , 0x0C ; hp_out_stop_5 +X , 0x0560 , 0x32 ; hp_out_msdiv_6 +X , 0x0561 , 0x00 ; hp_out_lsdiv_6 +X , 0x0562 , 0x00 ; hp_out_lsdiv_6 +X , 0x0563 , 0x00 ; hp_out_lsdiv_6 +X , 0x0564 , 0x01 ; hp_out_lsdiv_6 +X , 0x0565 , 0x04 ; hp_out_ctrl_6 +X , 0x0566 , 0x05 ; hp_out_diff_6 +X , 0x0567 , 0x00 ; hp_out_reg_6 +X , 0x0568 , 0x00 ; hp_out_lsctrl_6 +X , 0x0569 , 0x00 ; hp_out_width_6 +X , 0x056A , 0x00 ; hp_out_shift_6 +X , 0x056B , 0x0C ; hp_out_stop_6 +X , 0x0570 , 0x32 ; hp_out_msdiv_7 +X , 0x0571 , 0x00 ; hp_out_lsdiv_7 +X , 0x0572 , 0x98 ; hp_out_lsdiv_7 +X , 0x0573 , 0x96 ; hp_out_lsdiv_7 +X , 0x0574 , 0x80 ; hp_out_lsdiv_7 +X , 0x0575 , 0x04 ; hp_out_ctrl_7 +X , 0x0576 , 0x05 ; hp_out_diff_7 +X , 0x0577 , 0x00 ; hp_out_reg_7 +X , 0x0578 , 0x10 ; hp_out_lsctrl_7 +X , 0x0579 , 0x00 ; hp_out_width_7 +X , 0x057A , 0x00 ; hp_out_shift_7 +X , 0x057B , 0x0C ; hp_out_stop_7 +X , 0x0706 , 0x00 ; psrg_ctrl +X , 0x0480 , 0x11 ; hp_ctrl_1 +X , 0x04B0 , 0x01 ; hp_ctrl_2 + +W , 2000000 +X , 0x0210 , 0x80 ; dpll_mode_refsel_0 +X , 0x0214 , 0x63 ; dpll_mode_refsel_1 +X , 0x0218 , 0x00 ; dpll_mode_refsel_2 +X , 0x021C , 0x00 ; dpll_mode_refsel_3 +X , 0x0300 , 0x00 ; dpll_df_offset_0 +X , 0x0301 , 0x00 ; dpll_df_offset_0 +X , 0x0302 , 0x00 ; dpll_df_offset_0 +X , 0x0303 , 0x00 ; dpll_df_offset_0 +X , 0x0304 , 0xF1 ; dpll_df_offset_0 +X , 0x0305 , 0xBB ; dpll_df_offset_0 +X , 0x0320 , 0x00 ; dpll_df_offset_1 +X , 0x0321 , 0x00 ; dpll_df_offset_1 +X , 0x0322 , 0x00 ; dpll_df_offset_1 +X , 0x0323 , 0x00 ; dpll_df_offset_1 +X , 0x0324 , 0x21 ; dpll_df_offset_1 +X , 0x0325 , 0xC1 ; dpll_df_offset_1 +X , 0x0340 , 0x00 ; dpll_df_offset_2 +X , 0x0341 , 0x00 ; dpll_df_offset_2 +X , 0x0342 , 0x00 ; dpll_df_offset_2 +X , 0x0343 , 0x00 ; dpll_df_offset_2 +X , 0x0344 , 0x00 ; dpll_df_offset_2 +X , 0x0345 , 0x00 ; dpll_df_offset_2 +X , 0x0360 , 0x00 ; dpll_df_offset_3 +X , 0x0361 , 0x00 ; dpll_df_offset_3 +X , 0x0362 , 0x00 ; dpll_df_offset_3 +X , 0x0363 , 0x00 ; dpll_df_offset_3 +X , 0x0364 , 0x00 ; dpll_df_offset_3 +X , 0x0365 , 0x00 ; dpll_df_offset_3 +X , 0x0368 , 0x00 ; dpll_df_offset_4 +X , 0x0369 , 0x00 ; dpll_df_offset_4 +X , 0x036A , 0x00 ; dpll_df_offset_4 +X , 0x036B , 0x00 ; dpll_df_offset_4 +X , 0x036C , 0x00 ; dpll_df_offset_4 +X , 0x036D , 0x00 ; dpll_df_offset_4 +X , 0x0370 , 0x00 ; dpll_df_offset_5 +X , 0x0371 , 0x00 ; dpll_df_offset_5 +X , 0x0372 , 0x00 ; dpll_df_offset_5 +X , 0x0373 , 0x00 ; dpll_df_offset_5 +X , 0x0374 , 0x00 ; dpll_df_offset_5 +X , 0x0375 , 0x00 ; dpll_df_offset_5 +X , 0x0209 , 0x02 ; split_xo_ctrl +W , 2000000 +;====== +X , 0x04E0 , 0xEF ; hp_out_en +X , 0x04E1 , 0xA8 ; hp_out_mux +W , 2000000 +;====== +; Register Configuration End +; Register Write Count = 1180 + +;====================================================================== diff --git a/platform/broadcom/sonic-platform-modules-dell/z9864f/scripts/z9864f_ZL30793_option-1_0811_HP-Synth1+20ppm_all.mfg b/platform/broadcom/sonic-platform-modules-dell/z9864f/scripts/z9864f_ZL30793_option-1_0811_HP-Synth1+20ppm_all.mfg new file mode 100755 index 00000000000..77b9dfd7b9d --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/z9864f/scripts/z9864f_ZL30793_option-1_0811_HP-Synth1+20ppm_all.mfg @@ -0,0 +1,1164 @@ +; Device Id : ZL30793 +; GUI Version : 1.2.5 +; File Generation Date : Wednesday, January 22, 2025 3:53:17 PM +;====================================================================== + +; NOTE: +; This is an incremental configuration script. +; For proper device operation, all register write and wait commands in +; this file must be performed in the sequence listed. + +;====================================================================== + +; Configuration script commands + +; 1. Register Write Command: +; X , , +; Both and are in hexadecimal +; format and must have the "0x" prefix. +; The register_address contains the page number and page offset. +; The page number is stored in register_address[14:7]. +; The page offset is stored in register_address[6:0]. + +; 2. Wait Command: +; W , +; The wait time is specified in microseconds. + +;====================================================================== + +; The following lines are used only for the evaluation board GUI configuration: + +; Master Clock Nominal Freq MHz = 25 +; VDDO01 = 3.3 V, VDDO23 = 3.3 V, VDDO45 = 3.3 V, VDDO67 = 3.3 V +; LoadCap HPOUT0=5.00, HPOUT1=5.00, HPOUT2=5.00, HPOUT3=5.00, HPOUT4=5.00, HPOUT5=5.00, HPOUT6=5.00, HPOUT7=5.00 + +;====================================================================== + +; Register Configuration Start + + +;====================================================================== +; Register Configuration Start + +X , 0x0480 , 0x10 ; hp_ctrl_1 +X , 0x04B0 , 0x00 ; hp_ctrl_2 + +X , 0x0582 , 0x00 ; ref_mb_mask +X , 0x0583 , 0x01 ; ref_mb_mask +X , 0x0584 , 0x02 ; ref_mb_sem +W , 20000 +X , 0x0585 , 0x61 ; ref0p_freq_base +X , 0x0586 , 0xA8 ; ref0p_freq_base +X , 0x0587 , 0x03 ; ref0p_freq_mult +X , 0x0588 , 0xE8 ; ref0p_freq_mult +X , 0x0589 , 0x00 ; ref0p_ratio_m +X , 0x058A , 0x01 ; ref0p_ratio_m +X , 0x058B , 0x00 ; ref0p_ratio_n +X , 0x058C , 0x01 ; ref0p_ratio_n +X , 0x058D , 0x05 ; ref0p_config +X , 0x0590 , 0x05 ; ref0p_scm +X , 0x0591 , 0x05 ; ref0p_cfm +X , 0x0592 , 0x00 ; ref0p_gst_disqual +X , 0x0593 , 0x05 ; ref0p_gst_disqual +X , 0x0594 , 0x00 ; ref0p_gst_qual +X , 0x0595 , 0x14 ; ref0p_gst_qual +X , 0x0596 , 0x00 ; ref0p_sfm +X , 0x0597 , 0x00 ; ref0p_pfm_ctrl +X , 0x0598 , 0xB3 ; ref0p_pfm_disqualify +X , 0x0599 , 0xB0 ; ref0p_pfm_disqualify +X , 0x059A , 0x9C ; ref0p_pfm_qualify +X , 0x059B , 0x40 ; ref0p_pfm_qualify +X , 0x059C , 0x00 ; ref0p_pfm_period +X , 0x059D , 0x00 ; ref0p_pfm_period +X , 0x059E , 0x28 ; ref0p_pfm_filter_limit +X , 0x05A0 , 0x00 ; ref0p_sync +X , 0x05A1 , 0x00 ; ref0p_sync_misc +X , 0x05A3 , 0x00 ; ref0p_phase_offset_compensation +X , 0x05A4 , 0x00 ; ref0p_phase_offset_compensation +X , 0x05A5 , 0x00 ; ref0p_phase_offset_compensation +X , 0x05A6 , 0x00 ; ref0p_phase_offset_compensation +X , 0x05A8 , 0x00 ; ref0p_scm_fine +X , 0x05A9 , 0x00 ; ref0p_scm_fine +X , 0x05AA , 0x00 ; ref0p_scm_fine +X , 0x05AB , 0x00 ; ref0p_scm_fine +X , 0x05AC , 0x01 ; ref0p_meas_freq_period +X , 0x0584 , 0x01 ; ref_mb_sem +W , 20000 + +X , 0x0582 , 0x00 ; ref_mb_mask +X , 0x0583 , 0x02 ; ref_mb_mask +X , 0x0584 , 0x02 ; ref_mb_sem +W , 20000 +X , 0x0585 , 0x1F ; ref0n_freq_base +X , 0x0586 , 0x40 ; ref0n_freq_base +X , 0x0587 , 0x09 ; ref0n_freq_mult +X , 0x0588 , 0x7E ; ref0n_freq_mult +X , 0x0589 , 0x00 ; ref0n_ratio_m +X , 0x058A , 0x01 ; ref0n_ratio_m +X , 0x058B , 0x00 ; ref0n_ratio_n +X , 0x058C , 0x01 ; ref0n_ratio_n +X , 0x058D , 0x01 ; ref0n_config +X , 0x0590 , 0x05 ; ref0n_scm +X , 0x0591 , 0x05 ; ref0n_cfm +X , 0x0592 , 0x00 ; ref0n_gst_disqual +X , 0x0593 , 0x05 ; ref0n_gst_disqual +X , 0x0594 , 0x00 ; ref0n_gst_qual +X , 0x0595 , 0x14 ; ref0n_gst_qual +X , 0x0596 , 0x00 ; ref0n_sfm +X , 0x0597 , 0x00 ; ref0n_pfm_ctrl +X , 0x0598 , 0xB3 ; ref0n_pfm_disqualify +X , 0x0599 , 0xB0 ; ref0n_pfm_disqualify +X , 0x059A , 0x9C ; ref0n_pfm_qualify +X , 0x059B , 0x40 ; ref0n_pfm_qualify +X , 0x059C , 0x00 ; ref0n_pfm_period +X , 0x059D , 0x00 ; ref0n_pfm_period +X , 0x059E , 0x28 ; ref0n_pfm_filter_limit +X , 0x05A0 , 0x00 ; ref0n_sync +X , 0x05A1 , 0x00 ; ref0n_sync_misc +X , 0x05A3 , 0x00 ; ref0n_phase_offset_compensation +X , 0x05A4 , 0x00 ; ref0n_phase_offset_compensation +X , 0x05A5 , 0x00 ; ref0n_phase_offset_compensation +X , 0x05A6 , 0x00 ; ref0n_phase_offset_compensation +X , 0x05A8 , 0x00 ; ref0n_scm_fine +X , 0x05A9 , 0x00 ; ref0n_scm_fine +X , 0x05AA , 0x00 ; ref0n_scm_fine +X , 0x05AB , 0x00 ; ref0n_scm_fine +X , 0x05AC , 0x01 ; ref0n_meas_freq_period +X , 0x0584 , 0x01 ; ref_mb_sem +W , 20000 + +X , 0x0582 , 0x00 ; ref_mb_mask +X , 0x0583 , 0x04 ; ref_mb_mask +X , 0x0584 , 0x02 ; ref_mb_sem +W , 20000 +X , 0x0585 , 0x61 ; ref1p_freq_base +X , 0x0586 , 0xA8 ; ref1p_freq_base +X , 0x0587 , 0x03 ; ref1p_freq_mult +X , 0x0588 , 0xE8 ; ref1p_freq_mult +X , 0x0589 , 0x00 ; ref1p_ratio_m +X , 0x058A , 0x01 ; ref1p_ratio_m +X , 0x058B , 0x00 ; ref1p_ratio_n +X , 0x058C , 0x01 ; ref1p_ratio_n +X , 0x058D , 0x05 ; ref1p_config +X , 0x0590 , 0x05 ; ref1p_scm +X , 0x0591 , 0x05 ; ref1p_cfm +X , 0x0592 , 0x00 ; ref1p_gst_disqual +X , 0x0593 , 0x05 ; ref1p_gst_disqual +X , 0x0594 , 0x00 ; ref1p_gst_qual +X , 0x0595 , 0x14 ; ref1p_gst_qual +X , 0x0596 , 0x00 ; ref1p_sfm +X , 0x0597 , 0x00 ; ref1p_pfm_ctrl +X , 0x0598 , 0xB3 ; ref1p_pfm_disqualify +X , 0x0599 , 0xB0 ; ref1p_pfm_disqualify +X , 0x059A , 0x9C ; ref1p_pfm_qualify +X , 0x059B , 0x40 ; ref1p_pfm_qualify +X , 0x059C , 0x00 ; ref1p_pfm_period +X , 0x059D , 0x00 ; ref1p_pfm_period +X , 0x059E , 0x28 ; ref1p_pfm_filter_limit +X , 0x05A0 , 0x00 ; ref1p_sync +X , 0x05A1 , 0x00 ; ref1p_sync_misc +X , 0x05A3 , 0x00 ; ref1p_phase_offset_compensation +X , 0x05A4 , 0x00 ; ref1p_phase_offset_compensation +X , 0x05A5 , 0x00 ; ref1p_phase_offset_compensation +X , 0x05A6 , 0x00 ; ref1p_phase_offset_compensation +X , 0x05A8 , 0x00 ; ref1p_scm_fine +X , 0x05A9 , 0x00 ; ref1p_scm_fine +X , 0x05AA , 0x00 ; ref1p_scm_fine +X , 0x05AB , 0x00 ; ref1p_scm_fine +X , 0x05AC , 0x01 ; ref1p_meas_freq_period +X , 0x0584 , 0x01 ; ref_mb_sem +W , 20000 + +X , 0x0582 , 0x00 ; ref_mb_mask +X , 0x0583 , 0x08 ; ref_mb_mask +X , 0x0584 , 0x02 ; ref_mb_sem +W , 20000 +X , 0x0585 , 0x1F ; ref1n_freq_base +X , 0x0586 , 0x40 ; ref1n_freq_base +X , 0x0587 , 0x09 ; ref1n_freq_mult +X , 0x0588 , 0x7E ; ref1n_freq_mult +X , 0x0589 , 0x00 ; ref1n_ratio_m +X , 0x058A , 0x01 ; ref1n_ratio_m +X , 0x058B , 0x00 ; ref1n_ratio_n +X , 0x058C , 0x01 ; ref1n_ratio_n +X , 0x058D , 0x01 ; ref1n_config +X , 0x0590 , 0x05 ; ref1n_scm +X , 0x0591 , 0x05 ; ref1n_cfm +X , 0x0592 , 0x00 ; ref1n_gst_disqual +X , 0x0593 , 0x05 ; ref1n_gst_disqual +X , 0x0594 , 0x00 ; ref1n_gst_qual +X , 0x0595 , 0x14 ; ref1n_gst_qual +X , 0x0596 , 0x00 ; ref1n_sfm +X , 0x0597 , 0x00 ; ref1n_pfm_ctrl +X , 0x0598 , 0xB3 ; ref1n_pfm_disqualify +X , 0x0599 , 0xB0 ; ref1n_pfm_disqualify +X , 0x059A , 0x9C ; ref1n_pfm_qualify +X , 0x059B , 0x40 ; ref1n_pfm_qualify +X , 0x059C , 0x00 ; ref1n_pfm_period +X , 0x059D , 0x00 ; ref1n_pfm_period +X , 0x059E , 0x28 ; ref1n_pfm_filter_limit +X , 0x05A0 , 0x00 ; ref1n_sync +X , 0x05A1 , 0x00 ; ref1n_sync_misc +X , 0x05A3 , 0x00 ; ref1n_phase_offset_compensation +X , 0x05A4 , 0x00 ; ref1n_phase_offset_compensation +X , 0x05A5 , 0x00 ; ref1n_phase_offset_compensation +X , 0x05A6 , 0x00 ; ref1n_phase_offset_compensation +X , 0x05A8 , 0x00 ; ref1n_scm_fine +X , 0x05A9 , 0x00 ; ref1n_scm_fine +X , 0x05AA , 0x00 ; ref1n_scm_fine +X , 0x05AB , 0x00 ; ref1n_scm_fine +X , 0x05AC , 0x01 ; ref1n_meas_freq_period +X , 0x0584 , 0x01 ; ref_mb_sem +W , 20000 + +X , 0x0582 , 0x00 ; ref_mb_mask +X , 0x0583 , 0x10 ; ref_mb_mask +X , 0x0584 , 0x02 ; ref_mb_sem +W , 20000 +X , 0x0585 , 0x61 ; ref2p_freq_base +X , 0x0586 , 0xA8 ; ref2p_freq_base +X , 0x0587 , 0x03 ; ref2p_freq_mult +X , 0x0588 , 0xE8 ; ref2p_freq_mult +X , 0x0589 , 0x00 ; ref2p_ratio_m +X , 0x058A , 0x01 ; ref2p_ratio_m +X , 0x058B , 0x00 ; ref2p_ratio_n +X , 0x058C , 0x01 ; ref2p_ratio_n +X , 0x058D , 0x01 ; ref2p_config +X , 0x0590 , 0x05 ; ref2p_scm +X , 0x0591 , 0x05 ; ref2p_cfm +X , 0x0592 , 0x00 ; ref2p_gst_disqual +X , 0x0593 , 0x05 ; ref2p_gst_disqual +X , 0x0594 , 0x00 ; ref2p_gst_qual +X , 0x0595 , 0x14 ; ref2p_gst_qual +X , 0x0596 , 0x00 ; ref2p_sfm +X , 0x0597 , 0x00 ; ref2p_pfm_ctrl +X , 0x0598 , 0xCB ; ref2p_pfm_disqualify +X , 0x0599 , 0x20 ; ref2p_pfm_disqualify +X , 0x059A , 0x9C ; ref2p_pfm_qualify +X , 0x059B , 0x40 ; ref2p_pfm_qualify +X , 0x059C , 0x00 ; ref2p_pfm_period +X , 0x059D , 0x00 ; ref2p_pfm_period +X , 0x059E , 0x28 ; ref2p_pfm_filter_limit +X , 0x05A0 , 0x00 ; ref2p_sync +X , 0x05A1 , 0x00 ; ref2p_sync_misc +X , 0x05A3 , 0x00 ; ref2p_phase_offset_compensation +X , 0x05A4 , 0x00 ; ref2p_phase_offset_compensation +X , 0x05A5 , 0x00 ; ref2p_phase_offset_compensation +X , 0x05A6 , 0x00 ; ref2p_phase_offset_compensation +X , 0x05A8 , 0x00 ; ref2p_scm_fine +X , 0x05A9 , 0x00 ; ref2p_scm_fine +X , 0x05AA , 0x00 ; ref2p_scm_fine +X , 0x05AB , 0x00 ; ref2p_scm_fine +X , 0x05AC , 0x01 ; ref2p_meas_freq_period +X , 0x0584 , 0x01 ; ref_mb_sem +W , 20000 + +X , 0x0582 , 0x00 ; ref_mb_mask +X , 0x0583 , 0x20 ; ref_mb_mask +X , 0x0584 , 0x02 ; ref_mb_sem +W , 20000 +X , 0x0585 , 0x61 ; ref2n_freq_base +X , 0x0586 , 0xA8 ; ref2n_freq_base +X , 0x0587 , 0x03 ; ref2n_freq_mult +X , 0x0588 , 0xE8 ; ref2n_freq_mult +X , 0x0589 , 0x00 ; ref2n_ratio_m +X , 0x058A , 0x01 ; ref2n_ratio_m +X , 0x058B , 0x00 ; ref2n_ratio_n +X , 0x058C , 0x01 ; ref2n_ratio_n +X , 0x058D , 0x01 ; ref2n_config +X , 0x0590 , 0x05 ; ref2n_scm +X , 0x0591 , 0x05 ; ref2n_cfm +X , 0x0592 , 0x00 ; ref2n_gst_disqual +X , 0x0593 , 0x05 ; ref2n_gst_disqual +X , 0x0594 , 0x00 ; ref2n_gst_qual +X , 0x0595 , 0x14 ; ref2n_gst_qual +X , 0x0596 , 0x00 ; ref2n_sfm +X , 0x0597 , 0x00 ; ref2n_pfm_ctrl +X , 0x0598 , 0xB3 ; ref2n_pfm_disqualify +X , 0x0599 , 0xB0 ; ref2n_pfm_disqualify +X , 0x059A , 0x9C ; ref2n_pfm_qualify +X , 0x059B , 0x40 ; ref2n_pfm_qualify +X , 0x059C , 0x00 ; ref2n_pfm_period +X , 0x059D , 0x00 ; ref2n_pfm_period +X , 0x059E , 0x28 ; ref2n_pfm_filter_limit +X , 0x05A0 , 0x00 ; ref2n_sync +X , 0x05A1 , 0x00 ; ref2n_sync_misc +X , 0x05A3 , 0x00 ; ref2n_phase_offset_compensation +X , 0x05A4 , 0x00 ; ref2n_phase_offset_compensation +X , 0x05A5 , 0x00 ; ref2n_phase_offset_compensation +X , 0x05A6 , 0x00 ; ref2n_phase_offset_compensation +X , 0x05A8 , 0x00 ; ref2n_scm_fine +X , 0x05A9 , 0x00 ; ref2n_scm_fine +X , 0x05AA , 0x00 ; ref2n_scm_fine +X , 0x05AB , 0x00 ; ref2n_scm_fine +X , 0x05AC , 0x01 ; ref2n_meas_freq_period +X , 0x0584 , 0x01 ; ref_mb_sem +W , 20000 + +X , 0x0582 , 0x00 ; ref_mb_mask +X , 0x0583 , 0x40 ; ref_mb_mask +X , 0x0584 , 0x02 ; ref_mb_sem +W , 20000 +X , 0x0585 , 0x61 ; ref3p_freq_base +X , 0x0586 , 0xA8 ; ref3p_freq_base +X , 0x0587 , 0x01 ; ref3p_freq_mult +X , 0x0588 , 0x90 ; ref3p_freq_mult +X , 0x0589 , 0x00 ; ref3p_ratio_m +X , 0x058A , 0x01 ; ref3p_ratio_m +X , 0x058B , 0x00 ; ref3p_ratio_n +X , 0x058C , 0x01 ; ref3p_ratio_n +X , 0x058D , 0x01 ; ref3p_config +X , 0x0590 , 0x05 ; ref3p_scm +X , 0x0591 , 0x05 ; ref3p_cfm +X , 0x0592 , 0x00 ; ref3p_gst_disqual +X , 0x0593 , 0x05 ; ref3p_gst_disqual +X , 0x0594 , 0x00 ; ref3p_gst_qual +X , 0x0595 , 0x14 ; ref3p_gst_qual +X , 0x0596 , 0x00 ; ref3p_sfm +X , 0x0597 , 0x00 ; ref3p_pfm_ctrl +X , 0x0598 , 0xB3 ; ref3p_pfm_disqualify +X , 0x0599 , 0xB0 ; ref3p_pfm_disqualify +X , 0x059A , 0x9C ; ref3p_pfm_qualify +X , 0x059B , 0x40 ; ref3p_pfm_qualify +X , 0x059C , 0x00 ; ref3p_pfm_period +X , 0x059D , 0x00 ; ref3p_pfm_period +X , 0x059E , 0x28 ; ref3p_pfm_filter_limit +X , 0x05A0 , 0x00 ; ref3p_sync +X , 0x05A1 , 0x00 ; ref3p_sync_misc +X , 0x05A3 , 0x00 ; ref3p_phase_offset_compensation +X , 0x05A4 , 0x00 ; ref3p_phase_offset_compensation +X , 0x05A5 , 0x00 ; ref3p_phase_offset_compensation +X , 0x05A6 , 0x00 ; ref3p_phase_offset_compensation +X , 0x05A8 , 0x00 ; ref3p_scm_fine +X , 0x05A9 , 0x00 ; ref3p_scm_fine +X , 0x05AA , 0x00 ; ref3p_scm_fine +X , 0x05AB , 0x00 ; ref3p_scm_fine +X , 0x05AC , 0x01 ; ref3p_meas_freq_period +X , 0x0584 , 0x01 ; ref_mb_sem +W , 20000 + +X , 0x0582 , 0x00 ; ref_mb_mask +X , 0x0583 , 0x80 ; ref_mb_mask +X , 0x0584 , 0x02 ; ref_mb_sem +W , 20000 +X , 0x0585 , 0x61 ; ref3n_freq_base +X , 0x0586 , 0xA8 ; ref3n_freq_base +X , 0x0587 , 0x01 ; ref3n_freq_mult +X , 0x0588 , 0x90 ; ref3n_freq_mult +X , 0x0589 , 0x00 ; ref3n_ratio_m +X , 0x058A , 0x01 ; ref3n_ratio_m +X , 0x058B , 0x00 ; ref3n_ratio_n +X , 0x058C , 0x01 ; ref3n_ratio_n +X , 0x058D , 0x01 ; ref3n_config +X , 0x0590 , 0x05 ; ref3n_scm +X , 0x0591 , 0x05 ; ref3n_cfm +X , 0x0592 , 0x00 ; ref3n_gst_disqual +X , 0x0593 , 0x05 ; ref3n_gst_disqual +X , 0x0594 , 0x00 ; ref3n_gst_qual +X , 0x0595 , 0x14 ; ref3n_gst_qual +X , 0x0596 , 0x00 ; ref3n_sfm +X , 0x0597 , 0x00 ; ref3n_pfm_ctrl +X , 0x0598 , 0xB3 ; ref3n_pfm_disqualify +X , 0x0599 , 0xB0 ; ref3n_pfm_disqualify +X , 0x059A , 0x9C ; ref3n_pfm_qualify +X , 0x059B , 0x40 ; ref3n_pfm_qualify +X , 0x059C , 0x00 ; ref3n_pfm_period +X , 0x059D , 0x00 ; ref3n_pfm_period +X , 0x059E , 0x28 ; ref3n_pfm_filter_limit +X , 0x05A0 , 0x00 ; ref3n_sync +X , 0x05A1 , 0x00 ; ref3n_sync_misc +X , 0x05A3 , 0x00 ; ref3n_phase_offset_compensation +X , 0x05A4 , 0x00 ; ref3n_phase_offset_compensation +X , 0x05A5 , 0x00 ; ref3n_phase_offset_compensation +X , 0x05A6 , 0x00 ; ref3n_phase_offset_compensation +X , 0x05A8 , 0x00 ; ref3n_scm_fine +X , 0x05A9 , 0x00 ; ref3n_scm_fine +X , 0x05AA , 0x00 ; ref3n_scm_fine +X , 0x05AB , 0x00 ; ref3n_scm_fine +X , 0x05AC , 0x01 ; ref3n_meas_freq_period +X , 0x0584 , 0x01 ; ref_mb_sem +W , 20000 + +X , 0x0582 , 0x01 ; ref_mb_mask +X , 0x0583 , 0x00 ; ref_mb_mask +X , 0x0584 , 0x02 ; ref_mb_sem +W , 20000 +X , 0x0585 , 0x00 ; ref4p_freq_base +X , 0x0586 , 0x01 ; ref4p_freq_base +X , 0x0587 , 0x00 ; ref4p_freq_mult +X , 0x0588 , 0x01 ; ref4p_freq_mult +X , 0x0589 , 0x00 ; ref4p_ratio_m +X , 0x058A , 0x01 ; ref4p_ratio_m +X , 0x058B , 0x00 ; ref4p_ratio_n +X , 0x058C , 0x01 ; ref4p_ratio_n +X , 0x058D , 0x01 ; ref4p_config +X , 0x0590 , 0x05 ; ref4p_scm +X , 0x0591 , 0x05 ; ref4p_cfm +X , 0x0592 , 0x00 ; ref4p_gst_disqual +X , 0x0593 , 0x05 ; ref4p_gst_disqual +X , 0x0594 , 0x00 ; ref4p_gst_qual +X , 0x0595 , 0x14 ; ref4p_gst_qual +X , 0x0596 , 0x00 ; ref4p_sfm +X , 0x0597 , 0x00 ; ref4p_pfm_ctrl +X , 0x0598 , 0xB3 ; ref4p_pfm_disqualify +X , 0x0599 , 0xB0 ; ref4p_pfm_disqualify +X , 0x059A , 0x9C ; ref4p_pfm_qualify +X , 0x059B , 0x40 ; ref4p_pfm_qualify +X , 0x059C , 0x00 ; ref4p_pfm_period +X , 0x059D , 0x00 ; ref4p_pfm_period +X , 0x059E , 0x28 ; ref4p_pfm_filter_limit +X , 0x05A0 , 0x00 ; ref4p_sync +X , 0x05A1 , 0x00 ; ref4p_sync_misc +X , 0x05A3 , 0x00 ; ref4p_phase_offset_compensation +X , 0x05A4 , 0x00 ; ref4p_phase_offset_compensation +X , 0x05A5 , 0x00 ; ref4p_phase_offset_compensation +X , 0x05A6 , 0x00 ; ref4p_phase_offset_compensation +X , 0x05A8 , 0x00 ; ref4p_scm_fine +X , 0x05A9 , 0x00 ; ref4p_scm_fine +X , 0x05AA , 0x00 ; ref4p_scm_fine +X , 0x05AB , 0x00 ; ref4p_scm_fine +X , 0x05AC , 0x01 ; ref4p_meas_freq_period +X , 0x0584 , 0x01 ; ref_mb_sem +W , 20000 + +X , 0x0582 , 0x02 ; ref_mb_mask +X , 0x0583 , 0x00 ; ref_mb_mask +X , 0x0584 , 0x02 ; ref_mb_sem +W , 20000 +X , 0x0585 , 0x61 ; ref4n_freq_base +X , 0x0586 , 0xA8 ; ref4n_freq_base +X , 0x0587 , 0x01 ; ref4n_freq_mult +X , 0x0588 , 0x90 ; ref4n_freq_mult +X , 0x0589 , 0x00 ; ref4n_ratio_m +X , 0x058A , 0x01 ; ref4n_ratio_m +X , 0x058B , 0x00 ; ref4n_ratio_n +X , 0x058C , 0x01 ; ref4n_ratio_n +X , 0x058D , 0x01 ; ref4n_config +X , 0x0590 , 0x05 ; ref4n_scm +X , 0x0591 , 0x05 ; ref4n_cfm +X , 0x0592 , 0x00 ; ref4n_gst_disqual +X , 0x0593 , 0x05 ; ref4n_gst_disqual +X , 0x0594 , 0x00 ; ref4n_gst_qual +X , 0x0595 , 0x14 ; ref4n_gst_qual +X , 0x0596 , 0x00 ; ref4n_sfm +X , 0x0597 , 0x00 ; ref4n_pfm_ctrl +X , 0x0598 , 0xB3 ; ref4n_pfm_disqualify +X , 0x0599 , 0xB0 ; ref4n_pfm_disqualify +X , 0x059A , 0x9C ; ref4n_pfm_qualify +X , 0x059B , 0x40 ; ref4n_pfm_qualify +X , 0x059C , 0x00 ; ref4n_pfm_period +X , 0x059D , 0x00 ; ref4n_pfm_period +X , 0x059E , 0x28 ; ref4n_pfm_filter_limit +X , 0x05A0 , 0x02 ; ref4n_sync +X , 0x05A1 , 0x00 ; ref4n_sync_misc +X , 0x05A3 , 0x00 ; ref4n_phase_offset_compensation +X , 0x05A4 , 0x00 ; ref4n_phase_offset_compensation +X , 0x05A5 , 0x00 ; ref4n_phase_offset_compensation +X , 0x05A6 , 0x00 ; ref4n_phase_offset_compensation +X , 0x05A8 , 0x00 ; ref4n_scm_fine +X , 0x05A9 , 0x00 ; ref4n_scm_fine +X , 0x05AA , 0x00 ; ref4n_scm_fine +X , 0x05AB , 0x00 ; ref4n_scm_fine +X , 0x05AC , 0x01 ; ref4n_meas_freq_period +X , 0x0584 , 0x01 ; ref_mb_sem +W , 20000 + +X , 0x0602 , 0x00 ; dpll_mb_mask +X , 0x0603 , 0x01 ; dpll_mb_mask +X , 0x0604 , 0x02 ; dpll_mb_sem +W , 20000 +X , 0x0605 , 0x07 ; dpll0_bw_fixed +X , 0x0606 , 0x4F ; dpll0_bw_var +X , 0x0607 , 0x00 ; dpll0_config +X , 0x0608 , 0x03 ; dpll0_psl +X , 0x0609 , 0x75 ; dpll0_psl +X , 0x060E , 0x0B ; dpll0_range +X , 0x060F , 0xB8 ; dpll0_range +X , 0x0610 , 0x1F ; dpll0_ref_sw_mask +X , 0x0611 , 0x1F ; dpll0_ref_ho_mask +X , 0x0614 , 0xFF ; dpll0_ref_prio_0 +X , 0x0615 , 0xFF ; dpll0_ref_prio_1 +X , 0x0616 , 0xFF ; dpll0_ref_prio_2 +X , 0x0617 , 0xFF ; dpll0_ref_prio_3 +X , 0x0618 , 0xFF ; dpll0_ref_prio_4 +X , 0x061C , 0x18 ; dpll0_ho_filter +X , 0x061D , 0x86 ; dpll0_ho_delay +X , 0x061E , 0x01 ; dpll0_split_xo_config +X , 0x0620 , 0x01 ; dpll0_fast_lock_ctrl +X , 0x0621 , 0xFF ; dpll0_fast_lock_phase_err +X , 0x0622 , 0x04 ; dpll0_fast_lock_freq_err +X , 0x0623 , 0x00 ; dpll0_fast_lock_ideal_time +X , 0x0624 , 0x00 ; dpll0_fast_lock_ideal_time +X , 0x0626 , 0x07 ; dpll0_fast_lock_fol +X , 0x0627 , 0xD0 ; dpll0_fast_lock_fol +X , 0x062E , 0x00 ; dpll0_damping +X , 0x0630 , 0x00 ; dpll0_phase_bad +X , 0x0631 , 0x0F ; dpll0_phase_bad +X , 0x0632 , 0x42 ; dpll0_phase_bad +X , 0x0633 , 0x40 ; dpll0_phase_bad +X , 0x0634 , 0x00 ; dpll0_phase_good +X , 0x0635 , 0x1E ; dpll0_phase_good +X , 0x0636 , 0x84 ; dpll0_phase_good +X , 0x0637 , 0x80 ; dpll0_phase_good +X , 0x0638 , 0x09 ; dpll0_duration_good +X , 0x0639 , 0x00 ; dpll0_lock_delay +X , 0x063A , 0x00 ; dpll0_tie +X , 0x063B , 0x00 ; dpll0_tie_wr_thresh +X , 0x063C , 0x02 ; dpll0_fp_first_realign +X , 0x063D , 0x82 ; dpll0_fp_realign_intvl +X , 0x063E , 0x00 ; dpll0_fp_lock_thresh +X , 0x0640 , 0x00 ; dpll0_step_time_thresh +X , 0x0641 , 0x00 ; dpll0_step_time_thresh +X , 0x0642 , 0x4E ; dpll0_step_time_thresh +X , 0x0643 , 0x20 ; dpll0_step_time_thresh +X , 0x0644 , 0x0E ; dpll0_step_time_reso +X , 0x0645 , 0xE6 ; dpll0_step_time_reso +X , 0x0646 , 0xB2 ; dpll0_step_time_reso +X , 0x0647 , 0x80 ; dpll0_step_time_reso +X , 0x0648 , 0x50 ; dpll0_bw_thresh_speedup +X , 0x0649 , 0x01 ; dpll0_freq_err_ctrl +X , 0x064A , 0x00 ; dpll0_freq_err_timer +X , 0x0604 , 0x01 ; dpll_mb_sem +W , 20000 + +X , 0x0602 , 0x00 ; dpll_mb_mask +X , 0x0603 , 0x02 ; dpll_mb_mask +X , 0x0604 , 0x02 ; dpll_mb_sem +W , 20000 +X , 0x0605 , 0x07 ; dpll1_bw_fixed +X , 0x0606 , 0x87 ; dpll1_bw_var +X , 0x0607 , 0x00 ; dpll1_config +X , 0x0608 , 0x00 ; dpll1_psl +X , 0x0609 , 0x00 ; dpll1_psl +X , 0x060E , 0x00 ; dpll1_range +X , 0x060F , 0x78 ; dpll1_range +X , 0x0610 , 0x1F ; dpll1_ref_sw_mask +X , 0x0611 , 0x1F ; dpll1_ref_ho_mask +X , 0x0614 , 0xF1 ; dpll1_ref_prio_0 +X , 0x0615 , 0xF2 ; dpll1_ref_prio_1 +X , 0x0616 , 0xFF ; dpll1_ref_prio_2 +X , 0x0617 , 0xFF ; dpll1_ref_prio_3 +X , 0x0618 , 0xFF ; dpll1_ref_prio_4 +X , 0x061C , 0x00 ; dpll1_ho_filter +X , 0x061D , 0x4C ; dpll1_ho_delay +X , 0x061E , 0x01 ; dpll1_split_xo_config +X , 0x0620 , 0x01 ; dpll1_fast_lock_ctrl +X , 0x0621 , 0xFF ; dpll1_fast_lock_phase_err +X , 0x0622 , 0x04 ; dpll1_fast_lock_freq_err +X , 0x0623 , 0x00 ; dpll1_fast_lock_ideal_time +X , 0x0624 , 0x00 ; dpll1_fast_lock_ideal_time +X , 0x0626 , 0x07 ; dpll1_fast_lock_fol +X , 0x0627 , 0xD0 ; dpll1_fast_lock_fol +X , 0x062E , 0x00 ; dpll1_damping +X , 0x0630 , 0x02 ; dpll1_phase_bad +X , 0x0631 , 0x25 ; dpll1_phase_bad +X , 0x0632 , 0x51 ; dpll1_phase_bad +X , 0x0633 , 0x00 ; dpll1_phase_bad +X , 0x0634 , 0x02 ; dpll1_phase_good +X , 0x0635 , 0x25 ; dpll1_phase_good +X , 0x0636 , 0x51 ; dpll1_phase_good +X , 0x0637 , 0x00 ; dpll1_phase_good +X , 0x0638 , 0x09 ; dpll1_duration_good +X , 0x0639 , 0x00 ; dpll1_lock_delay +X , 0x063A , 0x00 ; dpll1_tie +X , 0x063B , 0x00 ; dpll1_tie_wr_thresh +X , 0x063C , 0x7F ; dpll1_fp_first_realign +X , 0x063D , 0x80 ; dpll1_fp_realign_intvl +X , 0x063E , 0x00 ; dpll1_fp_lock_thresh +X , 0x0640 , 0x77 ; dpll1_step_time_thresh +X , 0x0641 , 0x35 ; dpll1_step_time_thresh +X , 0x0642 , 0x94 ; dpll1_step_time_thresh +X , 0x0643 , 0x00 ; dpll1_step_time_thresh +X , 0x0644 , 0xEE ; dpll1_step_time_reso +X , 0x0645 , 0x6B ; dpll1_step_time_reso +X , 0x0646 , 0x28 ; dpll1_step_time_reso +X , 0x0647 , 0x00 ; dpll1_step_time_reso +X , 0x0648 , 0x50 ; dpll1_bw_thresh_speedup +X , 0x0649 , 0x01 ; dpll1_freq_err_ctrl +X , 0x064A , 0x00 ; dpll1_freq_err_timer +X , 0x0604 , 0x01 ; dpll_mb_sem +W , 20000 + +X , 0x0602 , 0x00 ; dpll_mb_mask +X , 0x0603 , 0x04 ; dpll_mb_mask +X , 0x0604 , 0x02 ; dpll_mb_sem +W , 20000 +X , 0x0605 , 0x00 ; dpll2_bw_fixed +X , 0x0606 , 0x00 ; dpll2_bw_var +X , 0x0607 , 0x00 ; dpll2_config +X , 0x0608 , 0x00 ; dpll2_psl +X , 0x0609 , 0x00 ; dpll2_psl +X , 0x060E , 0x0B ; dpll2_range +X , 0x060F , 0xB8 ; dpll2_range +X , 0x0610 , 0x08 ; dpll2_ref_sw_mask +X , 0x0611 , 0x17 ; dpll2_ref_ho_mask +X , 0x0614 , 0x10 ; dpll2_ref_prio_0 +X , 0x0615 , 0x32 ; dpll2_ref_prio_1 +X , 0x0616 , 0x54 ; dpll2_ref_prio_2 +X , 0x0617 , 0x76 ; dpll2_ref_prio_3 +X , 0x0618 , 0x98 ; dpll2_ref_prio_4 +X , 0x061C , 0x00 ; dpll2_ho_filter +X , 0x061D , 0x4C ; dpll2_ho_delay +X , 0x061E , 0x00 ; dpll2_split_xo_config +X , 0x0620 , 0x01 ; dpll2_fast_lock_ctrl +X , 0x0621 , 0xFF ; dpll2_fast_lock_phase_err +X , 0x0622 , 0x04 ; dpll2_fast_lock_freq_err +X , 0x0623 , 0x00 ; dpll2_fast_lock_ideal_time +X , 0x0624 , 0x00 ; dpll2_fast_lock_ideal_time +X , 0x0626 , 0x07 ; dpll2_fast_lock_fol +X , 0x0627 , 0xD0 ; dpll2_fast_lock_fol +X , 0x062E , 0x00 ; dpll2_damping +X , 0x0630 , 0x02 ; dpll2_phase_bad +X , 0x0631 , 0x25 ; dpll2_phase_bad +X , 0x0632 , 0x51 ; dpll2_phase_bad +X , 0x0633 , 0x00 ; dpll2_phase_bad +X , 0x0634 , 0x02 ; dpll2_phase_good +X , 0x0635 , 0x25 ; dpll2_phase_good +X , 0x0636 , 0x51 ; dpll2_phase_good +X , 0x0637 , 0x00 ; dpll2_phase_good +X , 0x0638 , 0x09 ; dpll2_duration_good +X , 0x0639 , 0x00 ; dpll2_lock_delay +X , 0x063A , 0x00 ; dpll2_tie +X , 0x063B , 0x00 ; dpll2_tie_wr_thresh +X , 0x063C , 0x7F ; dpll2_fp_first_realign +X , 0x063D , 0x00 ; dpll2_fp_realign_intvl +X , 0x063E , 0x00 ; dpll2_fp_lock_thresh +X , 0x0640 , 0x77 ; dpll2_step_time_thresh +X , 0x0641 , 0x35 ; dpll2_step_time_thresh +X , 0x0642 , 0x94 ; dpll2_step_time_thresh +X , 0x0643 , 0x00 ; dpll2_step_time_thresh +X , 0x0644 , 0xEE ; dpll2_step_time_reso +X , 0x0645 , 0x6B ; dpll2_step_time_reso +X , 0x0646 , 0x28 ; dpll2_step_time_reso +X , 0x0647 , 0x00 ; dpll2_step_time_reso +X , 0x0648 , 0x50 ; dpll2_bw_thresh_speedup +X , 0x0649 , 0x01 ; dpll2_freq_err_ctrl +X , 0x064A , 0x00 ; dpll2_freq_err_timer +X , 0x0604 , 0x01 ; dpll_mb_sem +W , 20000 + +X , 0x0602 , 0x00 ; dpll_mb_mask +X , 0x0603 , 0x08 ; dpll_mb_mask +X , 0x0604 , 0x02 ; dpll_mb_sem +W , 20000 +X , 0x0605 , 0x07 ; dpll3_bw_fixed +X , 0x0606 , 0x81 ; dpll3_bw_var +X , 0x0607 , 0x00 ; dpll3_config +X , 0x0608 , 0x1D ; dpll3_psl +X , 0x0609 , 0x4C ; dpll3_psl +X , 0x060E , 0x0B ; dpll3_range +X , 0x060F , 0xB8 ; dpll3_range +X , 0x0610 , 0x1F ; dpll3_ref_sw_mask +X , 0x0611 , 0x1F ; dpll3_ref_ho_mask +X , 0x0614 , 0x10 ; dpll3_ref_prio_0 +X , 0x0615 , 0x32 ; dpll3_ref_prio_1 +X , 0x0616 , 0x54 ; dpll3_ref_prio_2 +X , 0x0617 , 0x76 ; dpll3_ref_prio_3 +X , 0x0618 , 0x98 ; dpll3_ref_prio_4 +X , 0x061C , 0x08 ; dpll3_ho_filter +X , 0x061D , 0x86 ; dpll3_ho_delay +X , 0x061E , 0x01 ; dpll3_split_xo_config +X , 0x0620 , 0x01 ; dpll3_fast_lock_ctrl +X , 0x0621 , 0xFF ; dpll3_fast_lock_phase_err +X , 0x0622 , 0x04 ; dpll3_fast_lock_freq_err +X , 0x0623 , 0x00 ; dpll3_fast_lock_ideal_time +X , 0x0624 , 0x00 ; dpll3_fast_lock_ideal_time +X , 0x0626 , 0x07 ; dpll3_fast_lock_fol +X , 0x0627 , 0xD0 ; dpll3_fast_lock_fol +X , 0x062E , 0x00 ; dpll3_damping +X , 0x0630 , 0x02 ; dpll3_phase_bad +X , 0x0631 , 0x25 ; dpll3_phase_bad +X , 0x0632 , 0x51 ; dpll3_phase_bad +X , 0x0633 , 0x00 ; dpll3_phase_bad +X , 0x0634 , 0x02 ; dpll3_phase_good +X , 0x0635 , 0x25 ; dpll3_phase_good +X , 0x0636 , 0x51 ; dpll3_phase_good +X , 0x0637 , 0x00 ; dpll3_phase_good +X , 0x0638 , 0x09 ; dpll3_duration_good +X , 0x0639 , 0x00 ; dpll3_lock_delay +X , 0x063A , 0x00 ; dpll3_tie +X , 0x063B , 0x00 ; dpll3_tie_wr_thresh +X , 0x063C , 0x02 ; dpll3_fp_first_realign +X , 0x063D , 0x82 ; dpll3_fp_realign_intvl +X , 0x063E , 0x00 ; dpll3_fp_lock_thresh +X , 0x0648 , 0x50 ; dpll3_bw_thresh_speedup +X , 0x0649 , 0x01 ; dpll3_freq_err_ctrl +X , 0x064A , 0x00 ; dpll3_freq_err_timer +X , 0x0604 , 0x01 ; dpll_mb_sem +W , 20000 + +X , 0x0602 , 0x00 ; dpll_mb_mask +X , 0x0603 , 0x10 ; dpll_mb_mask +X , 0x0604 , 0x02 ; dpll_mb_sem +W , 20000 +X , 0x0605 , 0x00 ; dpll4_bw_fixed +X , 0x0606 , 0x00 ; dpll4_bw_var +X , 0x0607 , 0x00 ; dpll4_config +X , 0x0608 , 0x00 ; dpll4_psl +X , 0x0609 , 0x00 ; dpll4_psl +X , 0x0611 , 0x17 ; dpll4_ref_ho_mask +X , 0x061C , 0x00 ; dpll4_ho_filter +X , 0x061D , 0x4C ; dpll4_ho_delay +X , 0x061E , 0x00 ; dpll4_split_xo_config +X , 0x0620 , 0x01 ; dpll4_fast_lock_ctrl +X , 0x0621 , 0xFF ; dpll4_fast_lock_phase_err +X , 0x0622 , 0x04 ; dpll4_fast_lock_freq_err +X , 0x0623 , 0x00 ; dpll4_fast_lock_ideal_time +X , 0x0624 , 0x00 ; dpll4_fast_lock_ideal_time +X , 0x0626 , 0x07 ; dpll4_fast_lock_fol +X , 0x0627 , 0xD0 ; dpll4_fast_lock_fol +X , 0x062E , 0x00 ; dpll4_damping +X , 0x0630 , 0x02 ; dpll4_phase_bad +X , 0x0631 , 0x25 ; dpll4_phase_bad +X , 0x0632 , 0x51 ; dpll4_phase_bad +X , 0x0633 , 0x00 ; dpll4_phase_bad +X , 0x0634 , 0x02 ; dpll4_phase_good +X , 0x0635 , 0x25 ; dpll4_phase_good +X , 0x0636 , 0x51 ; dpll4_phase_good +X , 0x0637 , 0x00 ; dpll4_phase_good +X , 0x0638 , 0x09 ; dpll4_duration_good +X , 0x0639 , 0x00 ; dpll4_lock_delay +X , 0x063A , 0x00 ; dpll4_tie +X , 0x063B , 0x00 ; dpll4_tie_wr_thresh +X , 0x063C , 0x7F ; dpll4_fp_first_realign +X , 0x063D , 0x00 ; dpll4_fp_realign_intvl +X , 0x063E , 0x00 ; dpll4_fp_lock_thresh +X , 0x0648 , 0x50 ; dpll4_bw_thresh_speedup +X , 0x0649 , 0x01 ; dpll4_freq_err_ctrl +X , 0x064A , 0x00 ; dpll4_freq_err_timer +X , 0x0604 , 0x01 ; dpll_mb_sem +W , 20000 + +X , 0x0602 , 0x00 ; dpll_mb_mask +X , 0x0603 , 0x20 ; dpll_mb_mask +X , 0x0604 , 0x02 ; dpll_mb_sem +W , 20000 +X , 0x0605 , 0x00 ; dpll5_bw_fixed +X , 0x0606 , 0x00 ; dpll5_bw_var +X , 0x0607 , 0x00 ; dpll5_config +X , 0x0608 , 0x00 ; dpll5_psl +X , 0x0609 , 0x00 ; dpll5_psl +X , 0x0611 , 0x17 ; dpll5_ref_ho_mask +X , 0x061C , 0x00 ; dpll5_ho_filter +X , 0x061D , 0x4C ; dpll5_ho_delay +X , 0x061E , 0x00 ; dpll5_split_xo_config +X , 0x0620 , 0x01 ; dpll5_fast_lock_ctrl +X , 0x0621 , 0xFF ; dpll5_fast_lock_phase_err +X , 0x0622 , 0x04 ; dpll5_fast_lock_freq_err +X , 0x0623 , 0x00 ; dpll5_fast_lock_ideal_time +X , 0x0624 , 0x00 ; dpll5_fast_lock_ideal_time +X , 0x0626 , 0x07 ; dpll5_fast_lock_fol +X , 0x0627 , 0xD0 ; dpll5_fast_lock_fol +X , 0x062E , 0x00 ; dpll5_damping +X , 0x0630 , 0x02 ; dpll5_phase_bad +X , 0x0631 , 0x25 ; dpll5_phase_bad +X , 0x0632 , 0x51 ; dpll5_phase_bad +X , 0x0633 , 0x00 ; dpll5_phase_bad +X , 0x0634 , 0x02 ; dpll5_phase_good +X , 0x0635 , 0x25 ; dpll5_phase_good +X , 0x0636 , 0x51 ; dpll5_phase_good +X , 0x0637 , 0x00 ; dpll5_phase_good +X , 0x0638 , 0x09 ; dpll5_duration_good +X , 0x0639 , 0x00 ; dpll5_lock_delay +X , 0x063A , 0x00 ; dpll5_tie +X , 0x063B , 0x00 ; dpll5_tie_wr_thresh +X , 0x063C , 0x7F ; dpll5_fp_first_realign +X , 0x063D , 0x00 ; dpll5_fp_realign_intvl +X , 0x063E , 0x00 ; dpll5_fp_lock_thresh +X , 0x0648 , 0x50 ; dpll5_bw_thresh_speedup +X , 0x0649 , 0x01 ; dpll5_freq_err_ctrl +X , 0x064A , 0x00 ; dpll5_freq_err_timer +X , 0x0604 , 0x01 ; dpll_mb_sem +W , 20000 +X , 0x0007 , 0x20 ; custom_config_ver +X , 0x0008 , 0x20 ; custom_config_ver +X , 0x0009 , 0x04 ; custom_config_ver +X , 0x000A , 0x14 ; custom_config_ver +X , 0x000B , 0x04 ; central_freq_offset +X , 0x000C , 0x6A ; central_freq_offset +X , 0x000D , 0xAA ; central_freq_offset +X , 0x000E , 0xAB ; central_freq_offset +W , 100000 +X , 0x0012 , 0x00 ; warm_start +X , 0x0013 , 0x00 ; trap_status +X , 0x0014 , 0x00 ; trap_mask +X , 0x0026 , 0x00 ; master_clk_ofst +X , 0x0027 , 0x00 ; master_clk_ofst +X , 0x0028 , 0x00 ; master_clk_ofst +X , 0x0029 , 0x00 ; master_clk_ofst +X , 0x002A , 0x00 ; master_clk_ofst +X , 0x002C , 0x02 ; osci_ctrl +X , 0x0080 , 0x00 ; gpio_irq_config +X , 0x0082 , 0x00 ; gpio_out_2_0 +X , 0x0084 , 0x00 ; gpio_freeze_2_0 +X , 0x0088 , 0x00 ; gpio_select_0 +X , 0x0089 , 0x00 ; gpio_select_0 +X , 0x008A , 0x00 ; gpio_config_0 +X , 0x008B , 0x00 ; gpio_select_1 +X , 0x008C , 0x00 ; gpio_select_1 +X , 0x008D , 0x00 ; gpio_config_1 +X , 0x008E , 0x00 ; gpio_select_2 +X , 0x008F , 0x00 ; gpio_select_2 +X , 0x0090 , 0x00 ; gpio_config_2 +X , 0x0097 , 0x00 ; gpio_select_5 +X , 0x0098 , 0x00 ; gpio_config_5 +X , 0x0099 , 0x00 ; gpio_select_6 +X , 0x009A , 0x00 ; gpio_config_6 +X , 0x009B , 0x00 ; gpio_select_7 +X , 0x009C , 0x00 ; gpio_config_7 +X , 0x009D , 0x00 ; gpio_select_8 +X , 0x009E , 0x00 ; gpio_config_8 +X , 0x00A8 , 0x00 ; ref_irq_mask_3_0 +X , 0x00A9 , 0x00 ; ref_irq_mask_4 +X , 0x00AB , 0x00 ; dpll_irq_mask +X , 0x00AC , 0x00 ; synth_irq_mask +X , 0x00AD , 0x00 ; hp_out_irq_mask +X , 0x00B0 , 0x00 ; ref_mon_th_mask_0P +X , 0x00B1 , 0x00 ; ref_mon_tl_mask_0P +X , 0x00B2 , 0x00 ; ref_mon_th_mask_0N +X , 0x00B3 , 0x00 ; ref_mon_tl_mask_0N +X , 0x00B4 , 0x00 ; ref_mon_th_mask_1P +X , 0x00B5 , 0x00 ; ref_mon_tl_mask_1P +X , 0x00B6 , 0x00 ; ref_mon_th_mask_1N +X , 0x00B7 , 0x00 ; ref_mon_tl_mask_1N +X , 0x00B8 , 0x00 ; ref_mon_th_mask_2P +X , 0x00B9 , 0x00 ; ref_mon_tl_mask_2P +X , 0x00BA , 0x00 ; ref_mon_th_mask_2N +X , 0x00BB , 0x00 ; ref_mon_tl_mask_2N +X , 0x00BC , 0x00 ; ref_mon_th_mask_3P +X , 0x00BD , 0x00 ; ref_mon_tl_mask_3P +X , 0x00BE , 0x00 ; ref_mon_th_mask_3N +X , 0x00BF , 0x00 ; ref_mon_tl_mask_3N +X , 0x00C0 , 0x00 ; ref_mon_th_mask_4P +X , 0x00C1 , 0x00 ; ref_mon_tl_mask_4P +X , 0x00C2 , 0x00 ; ref_mon_th_mask_4N +X , 0x00C3 , 0x00 ; ref_mon_tl_mask_4N +X , 0x00D0 , 0x00 ; dpll_mon_th_mask_0 +X , 0x00D1 , 0x00 ; dpll_mon_tl_mask_0 +X , 0x00D2 , 0x00 ; dpll_mon_th_mask_1 +X , 0x00D3 , 0x00 ; dpll_mon_tl_mask_1 +X , 0x00D4 , 0x00 ; dpll_mon_th_mask_2 +X , 0x00D5 , 0x00 ; dpll_mon_tl_mask_2 +X , 0x00D6 , 0x00 ; dpll_mon_th_mask_3 +X , 0x00D7 , 0x00 ; dpll_mon_tl_mask_3 +X , 0x00D8 , 0x00 ; dpll_mon_th_mask_4 +X , 0x00D9 , 0x00 ; dpll_mon_tl_mask_4 +X , 0x00DA , 0x00 ; dpll_mon_th_mask_5 +X , 0x00DB , 0x00 ; dpll_mon_tl_mask_5 +X , 0x00E0 , 0x00 ; gp_mon_th_mask +X , 0x00E1 , 0x00 ; gp_mon_tl_mask +X , 0x00E2 , 0x00 ; hp_mon_th_mask_1 +X , 0x00E3 , 0x00 ; hp_mon_tl_mask_1 +X , 0x00E4 , 0x00 ; hp_mon_th_mask_2 +X , 0x00E5 , 0x00 ; hp_mon_tl_mask_2 +X , 0x00E6 , 0x00 ; hp_out_th_mask_0 +X , 0x00E7 , 0x00 ; hp_out_tl_mask_0 +X , 0x00E8 , 0x00 ; hp_out_th_mask_1 +X , 0x00E9 , 0x00 ; hp_out_tl_mask_1 +X , 0x00EA , 0x00 ; hp_out_th_mask_2 +X , 0x00EB , 0x00 ; hp_out_tl_mask_2 +X , 0x00EC , 0x00 ; hp_out_th_mask_3 +X , 0x00ED , 0x00 ; hp_out_tl_mask_3 +X , 0x00EE , 0x00 ; hp_out_th_mask_4 +X , 0x00EF , 0x00 ; hp_out_tl_mask_4 +X , 0x00F0 , 0x00 ; hp_out_th_mask_5 +X , 0x00F1 , 0x00 ; hp_out_tl_mask_5 +X , 0x00F2 , 0x00 ; hp_out_th_mask_6 +X , 0x00F3 , 0x00 ; hp_out_tl_mask_6 +X , 0x00F4 , 0x00 ; hp_out_th_mask_7 +X , 0x00F5 , 0x00 ; hp_out_tl_mask_7 +X , 0x0200 , 0x00 ; ref_los_3_0 +X , 0x0201 , 0x00 ; ref_los_4 +X , 0x0203 , 0x00 ; ref_sfm_clr_3_0 +X , 0x0204 , 0x00 ; ref_sfm_clr_4 +X , 0x0205 , 0x00 ; ref_freq_cmd +X , 0x0206 , 0x00 ; dpll_freq_cmd +X , 0x0207 , 0x00 ; split_xo_cmd +X , 0x0208 , 0x02 ; dpll_enable +X , 0x020A , 0x44 ; split_xo_ref +X , 0x020B , 0x00 ; ext_fb_ctrl +X , 0x020C , 0x00 ; ext_fb_sel +X , 0x020D , 0x41 ; dpll_meas_ref_freq_ctrl +X , 0x0211 , 0x03 ; dpll_ctrl_0 +X , 0x0212 , 0x00 ; dpll_cmd_0 +X , 0x0215 , 0x02 ; dpll_ctrl_1 +X , 0x0216 , 0x00 ; dpll_cmd_1 +X , 0x0219 , 0x02 ; dpll_ctrl_2 +X , 0x021A , 0x00 ; dpll_cmd_2 +X , 0x021D , 0x00 ; dpll_ctrl_3 +X , 0x021E , 0x00 ; dpll_cmd_3 +X , 0x0238 , 0x02 ; phase_step_mask_gp +X , 0x0239 , 0x00 ; phase_step_mask_hp +X , 0x023A , 0x03 ; step_time_mask_gp +X , 0x023B , 0x80 ; step_time_mask_hp +X , 0x023E , 0x31 ; phase_step_max +X , 0x0240 , 0x00 ; dpll_meas_ctrl +X , 0x0241 , 0x00 ; dpll_meas_idx +X , 0x0242 , 0x00 ; dpll_meas_ref_edge_3_0 +X , 0x0243 , 0x00 ; dpll_meas_ref_edge_4 +X , 0x024C , 0x00 ; out_squelch_ctrl +X , 0x024D , 0x00 ; gp_squelch_mask +X , 0x024E , 0x00 ; hp_squelch_mask +X , 0x025F , 0x00 ; pherr_read_rqst +X , 0x0260 , 0x00 ; dpll_phase_err_read_mask +X , 0x0306 , 0x08 ; dpll_df_ctrl_0 +X , 0x0307 , 0x00 ; dpll_df_manual_0 +X , 0x0308 , 0x00 ; dpll_df_manual_0 +X , 0x0309 , 0x00 ; dpll_df_manual_0 +X , 0x030A , 0x00 ; dpll_df_manual_0 +X , 0x030B , 0x00 ; dpll_df_manual_0 +X , 0x0317 , 0x00 ; dpll_tie_ctrl_0 +X , 0x031E , 0x00 ; dpll_step_ctrl_0 +X , 0x0326 , 0x18 ; dpll_df_ctrl_1 +X , 0x0327 , 0x00 ; dpll_df_manual_1 +X , 0x0328 , 0x00 ; dpll_df_manual_1 +X , 0x0329 , 0x00 ; dpll_df_manual_1 +X , 0x032A , 0x00 ; dpll_df_manual_1 +X , 0x032B , 0x00 ; dpll_df_manual_1 +X , 0x0337 , 0x02 ; dpll_tie_ctrl_1 +X , 0x033E , 0x00 ; dpll_step_ctrl_1 +X , 0x0346 , 0x00 ; dpll_df_ctrl_2 +X , 0x0347 , 0x00 ; dpll_df_manual_2 +X , 0x0348 , 0x00 ; dpll_df_manual_2 +X , 0x0349 , 0x00 ; dpll_df_manual_2 +X , 0x034A , 0x00 ; dpll_df_manual_2 +X , 0x034B , 0x00 ; dpll_df_manual_2 +X , 0x0357 , 0x00 ; dpll_tie_ctrl_2 +X , 0x035E , 0x00 ; dpll_step_ctrl_2 +X , 0x0366 , 0x00 ; dpll_df_ctrl_3 +X , 0x036E , 0x00 ; dpll_df_ctrl_4 +X , 0x0376 , 0x00 ; dpll_df_ctrl_5 +X , 0x038A , 0x00 ; dpll_tod_ctrl_0 +X , 0x0396 , 0x00 ; dpll_tod_ctrl_1 +X , 0x03A2 , 0x00 ; dpll_tod_ctrl_2 +X , 0x0400 , 0x01 ; gp_ctrl +X , 0x0401 , 0x00 ; gp_cmd +X , 0x0404 , 0x61 ; gp_freq_base +X , 0x0405 , 0xA8 ; gp_freq_base +X , 0x0406 , 0x00 ; gp_freq_mult +X , 0x0407 , 0x75 ; gp_freq_mult +X , 0x0408 , 0x30 ; gp_freq_mult +X , 0x0409 , 0x00 ; gp_freq_m +X , 0x040A , 0x01 ; gp_freq_m +X , 0x040B , 0x00 ; gp_freq_n +X , 0x040C , 0x01 ; gp_freq_n +X , 0x040D , 0x00 ; gp_fine_shift +X , 0x040E , 0x00 ; gp_fine_shift +X , 0x040F , 0x01 ; gp_fine_shift_intvl +X , 0x0420 , 0x01 ; gp_out_ctrl_0 +X , 0x0422 , 0x00 ; gp_out_div_0 +X , 0x0423 , 0x00 ; gp_out_div_0 +X , 0x0424 , 0x00 ; gp_out_div_0 +X , 0x0425 , 0x4B ; gp_out_div_0 +X , 0x0426 , 0x00 ; gp_out_width_0 +X , 0x0427 , 0x00 ; gp_out_width_0 +X , 0x0428 , 0x00 ; gp_out_width_0 +X , 0x0429 , 0x00 ; gp_out_width_0 +X , 0x0430 , 0x01 ; gp_out_ctrl_1 +X , 0x0432 , 0x00 ; gp_out_div_1 +X , 0x0433 , 0x00 ; gp_out_div_1 +X , 0x0434 , 0x00 ; gp_out_div_1 +X , 0x0435 , 0x4B ; gp_out_div_1 +X , 0x0436 , 0x00 ; gp_out_width_1 +X , 0x0437 , 0x00 ; gp_out_width_1 +X , 0x0438 , 0x00 ; gp_out_width_1 +X , 0x0439 , 0x00 ; gp_out_width_1 +X , 0x0450 , 0x00 ; gp_out_en +X , 0x0451 , 0x0F ; gp_out_drive +X , 0x0481 , 0x03 ; hp_src_1 +X , 0x0482 , 0x00 ; hp_misc_1 +X , 0x0484 , 0xDF ; hp_freq_base_1 +X , 0x0485 , 0x84 ; hp_freq_base_1 +X , 0x0486 , 0x75 ; hp_freq_base_1 +X , 0x0487 , 0x80 ; hp_freq_base_1 +X , 0x0488 , 0x00 ; hp_freq_m_1 +X , 0x0489 , 0x00 ; hp_freq_m_1 +X , 0x048A , 0xC3 ; hp_freq_m_1 +X , 0x048B , 0x51 ; hp_freq_m_1 +X , 0x048C , 0x00 ; hp_freq_n_1 +X , 0x048D , 0x00 ; hp_freq_n_1 +X , 0x048E , 0xC3 ; hp_freq_n_1 +X , 0x048F , 0x50 ; hp_freq_n_1 +X , 0x0490 , 0x07 ; hp_hsdiv_1 +X , 0x0491 , 0x0B ; hp_fdiv_base_1 +X , 0x0492 , 0xEB ; hp_fdiv_base_1 +X , 0x0493 , 0xC2 ; hp_fdiv_base_1 +X , 0x0494 , 0x00 ; hp_fdiv_base_1 +X , 0x0495 , 0x00 ; hp_fdiv_num_1 +X , 0x0496 , 0x00 ; hp_fdiv_num_1 +X , 0x0497 , 0x00 ; hp_fdiv_num_1 +X , 0x0498 , 0x01 ; hp_fdiv_num_1 +X , 0x0499 , 0x00 ; hp_fdiv_den_1 +X , 0x049A , 0x00 ; hp_fdiv_den_1 +X , 0x049B , 0x00 ; hp_fdiv_den_1 +X , 0x049C , 0x01 ; hp_fdiv_den_1 +X , 0x04A4 , 0x00 ; hp_fine_shift_1 +X , 0x04A5 , 0x00 ; hp_fine_shift_1 +X , 0x04A6 , 0x00 ; hp_fine_shift_1 +X , 0x04A7 , 0x00 ; hp_fine_shift_1 +X , 0x04A8 , 0x00 ; hp_fb_msdiv_1 +X , 0x04A9 , 0x00 ; hp_fb_lsdiv_1 +X , 0x04AA , 0x00 ; hp_fb_lsdiv_1 +X , 0x04AB , 0x00 ; hp_fb_lsdiv_1 +X , 0x04AC , 0x00 ; hp_fb_lsdiv_1 +X , 0x04AD , 0x00 ; hp_fb_ref_1 +X , 0x04AE , 0x00 ; hp_fb_out_1 +X , 0x04B1 , 0x03 ; hp_src_2 +X , 0x04B2 , 0x00 ; hp_misc_2 +X , 0x04B4 , 0xDF ; hp_freq_base_2 +X , 0x04B5 , 0x84 ; hp_freq_base_2 +X , 0x04B6 , 0x75 ; hp_freq_base_2 +X , 0x04B7 , 0x80 ; hp_freq_base_2 +X , 0x04B8 , 0x00 ; hp_freq_m_2 +X , 0x04B9 , 0x00 ; hp_freq_m_2 +X , 0x04BA , 0x00 ; hp_freq_m_2 +X , 0x04BB , 0x01 ; hp_freq_m_2 +X , 0x04BC , 0x00 ; hp_freq_n_2 +X , 0x04BD , 0x00 ; hp_freq_n_2 +X , 0x04BE , 0x00 ; hp_freq_n_2 +X , 0x04BF , 0x01 ; hp_freq_n_2 +X , 0x04C0 , 0x07 ; hp_hsdiv_2 +X , 0x04C1 , 0x0B ; hp_fdiv_base_2 +X , 0x04C2 , 0xEB ; hp_fdiv_base_2 +X , 0x04C3 , 0xC2 ; hp_fdiv_base_2 +X , 0x04C4 , 0x00 ; hp_fdiv_base_2 +X , 0x04C5 , 0x00 ; hp_fdiv_num_2 +X , 0x04C6 , 0x00 ; hp_fdiv_num_2 +X , 0x04C7 , 0x00 ; hp_fdiv_num_2 +X , 0x04C8 , 0x01 ; hp_fdiv_num_2 +X , 0x04C9 , 0x00 ; hp_fdiv_den_2 +X , 0x04CA , 0x00 ; hp_fdiv_den_2 +X , 0x04CB , 0x00 ; hp_fdiv_den_2 +X , 0x04CC , 0x01 ; hp_fdiv_den_2 +X , 0x04D4 , 0x00 ; hp_fine_shift_2 +X , 0x04D5 , 0x00 ; hp_fine_shift_2 +X , 0x04D6 , 0x00 ; hp_fine_shift_2 +X , 0x04D7 , 0x00 ; hp_fine_shift_2 +X , 0x04D8 , 0x00 ; hp_fb_msdiv_2 +X , 0x04D9 , 0x00 ; hp_fb_lsdiv_2 +X , 0x04DA , 0x00 ; hp_fb_lsdiv_2 +X , 0x04DB , 0x00 ; hp_fb_lsdiv_2 +X , 0x04DC , 0x00 ; hp_fb_lsdiv_2 +X , 0x04DD , 0x00 ; hp_fb_ref_2 +X , 0x04DE , 0x00 ; hp_fb_out_2 +X , 0x04E0 , 0xEF ; hp_out_en +X , 0x04E1 , 0xA8 ; hp_out_mux +X , 0x04E2 , 0x00 ; hp_stop_ctrl +X , 0x04E3 , 0x00 ; hp_stopall_ctrl +X , 0x04E4 , 0x00 ; hp_align_bw_fixed_1 +X , 0x04E5 , 0x00 ; hp_align_bw_var_1 +X , 0x04E6 , 0x00 ; hp_align_bw_fixed_2 +X , 0x04E7 , 0x00 ; hp_align_bw_var_2 +X , 0x04E8 , 0x01 ; hp_max_simul_steps +X , 0x0500 , 0x14 ; hp_out_msdiv_0 +X , 0x0501 , 0x00 ; hp_out_lsdiv_0 +X , 0x0502 , 0x00 ; hp_out_lsdiv_0 +X , 0x0503 , 0x00 ; hp_out_lsdiv_0 +X , 0x0504 , 0x01 ; hp_out_lsdiv_0 +X , 0x0505 , 0x02 ; hp_out_ctrl_0 +X , 0x0506 , 0x05 ; hp_out_diff_0 +X , 0x0507 , 0x00 ; hp_out_reg_0 +X , 0x0508 , 0x00 ; hp_out_lsctrl_0 +X , 0x0509 , 0x00 ; hp_out_width_0 +X , 0x050A , 0x00 ; hp_out_shift_0 +X , 0x050B , 0x0C ; hp_out_stop_0 +X , 0x0510 , 0x32 ; hp_out_msdiv_1 +X , 0x0511 , 0x00 ; hp_out_lsdiv_1 +X , 0x0512 , 0x00 ; hp_out_lsdiv_1 +X , 0x0513 , 0x00 ; hp_out_lsdiv_1 +X , 0x0514 , 0x01 ; hp_out_lsdiv_1 +X , 0x0515 , 0x05 ; hp_out_ctrl_1 +X , 0x0516 , 0x05 ; hp_out_diff_1 +X , 0x0517 , 0x00 ; hp_out_reg_1 +X , 0x0518 , 0x00 ; hp_out_lsctrl_1 +X , 0x0519 , 0x00 ; hp_out_width_1 +X , 0x051A , 0x00 ; hp_out_shift_1 +X , 0x051B , 0x0C ; hp_out_stop_1 +X , 0x0520 , 0x04 ; hp_out_msdiv_2 +X , 0x0521 , 0x00 ; hp_out_lsdiv_2 +X , 0x0522 , 0x00 ; hp_out_lsdiv_2 +X , 0x0523 , 0x00 ; hp_out_lsdiv_2 +X , 0x0524 , 0x01 ; hp_out_lsdiv_2 +X , 0x0525 , 0x02 ; hp_out_ctrl_2 +X , 0x0526 , 0x05 ; hp_out_diff_2 +X , 0x0527 , 0x00 ; hp_out_reg_2 +X , 0x0528 , 0x00 ; hp_out_lsctrl_2 +X , 0x0529 , 0x00 ; hp_out_width_2 +X , 0x052A , 0x00 ; hp_out_shift_2 +X , 0x052B , 0x0C ; hp_out_stop_2 +X , 0x0530 , 0x14 ; hp_out_msdiv_3 +X , 0x0531 , 0x00 ; hp_out_lsdiv_3 +X , 0x0532 , 0x00 ; hp_out_lsdiv_3 +X , 0x0533 , 0x00 ; hp_out_lsdiv_3 +X , 0x0534 , 0x01 ; hp_out_lsdiv_3 +X , 0x0535 , 0x02 ; hp_out_ctrl_3 +X , 0x0536 , 0x05 ; hp_out_diff_3 +X , 0x0537 , 0x00 ; hp_out_reg_3 +X , 0x0538 , 0x00 ; hp_out_lsctrl_3 +X , 0x0539 , 0x00 ; hp_out_width_3 +X , 0x053A , 0x00 ; hp_out_shift_3 +X , 0x053B , 0x0C ; hp_out_stop_3 +X , 0x0540 , 0x0A ; hp_out_msdiv_4 +X , 0x0541 , 0x00 ; hp_out_lsdiv_4 +X , 0x0542 , 0x00 ; hp_out_lsdiv_4 +X , 0x0543 , 0x00 ; hp_out_lsdiv_4 +X , 0x0544 , 0x19 ; hp_out_lsdiv_4 +X , 0x0545 , 0x00 ; hp_out_ctrl_4 +X , 0x0546 , 0x05 ; hp_out_diff_4 +X , 0x0547 , 0x00 ; hp_out_reg_4 +X , 0x0548 , 0x00 ; hp_out_lsctrl_4 +X , 0x0549 , 0x00 ; hp_out_width_4 +X , 0x054A , 0x00 ; hp_out_shift_4 +X , 0x054B , 0x0C ; hp_out_stop_4 +X , 0x0550 , 0x32 ; hp_out_msdiv_5 +X , 0x0551 , 0x00 ; hp_out_lsdiv_5 +X , 0x0552 , 0x00 ; hp_out_lsdiv_5 +X , 0x0553 , 0x09 ; hp_out_lsdiv_5 +X , 0x0554 , 0xC4 ; hp_out_lsdiv_5 +X , 0x0555 , 0x05 ; hp_out_ctrl_5 +X , 0x0556 , 0x05 ; hp_out_diff_5 +X , 0x0557 , 0x00 ; hp_out_reg_5 +X , 0x0558 , 0x10 ; hp_out_lsctrl_5 +X , 0x0559 , 0x00 ; hp_out_width_5 +X , 0x055A , 0x00 ; hp_out_shift_5 +X , 0x055B , 0x0C ; hp_out_stop_5 +X , 0x0560 , 0x32 ; hp_out_msdiv_6 +X , 0x0561 , 0x00 ; hp_out_lsdiv_6 +X , 0x0562 , 0x00 ; hp_out_lsdiv_6 +X , 0x0563 , 0x00 ; hp_out_lsdiv_6 +X , 0x0564 , 0x01 ; hp_out_lsdiv_6 +X , 0x0565 , 0x04 ; hp_out_ctrl_6 +X , 0x0566 , 0x05 ; hp_out_diff_6 +X , 0x0567 , 0x00 ; hp_out_reg_6 +X , 0x0568 , 0x00 ; hp_out_lsctrl_6 +X , 0x0569 , 0x00 ; hp_out_width_6 +X , 0x056A , 0x00 ; hp_out_shift_6 +X , 0x056B , 0x0C ; hp_out_stop_6 +X , 0x0570 , 0x32 ; hp_out_msdiv_7 +X , 0x0571 , 0x00 ; hp_out_lsdiv_7 +X , 0x0572 , 0x98 ; hp_out_lsdiv_7 +X , 0x0573 , 0x96 ; hp_out_lsdiv_7 +X , 0x0574 , 0x80 ; hp_out_lsdiv_7 +X , 0x0575 , 0x04 ; hp_out_ctrl_7 +X , 0x0576 , 0x05 ; hp_out_diff_7 +X , 0x0577 , 0x00 ; hp_out_reg_7 +X , 0x0578 , 0x10 ; hp_out_lsctrl_7 +X , 0x0579 , 0x00 ; hp_out_width_7 +X , 0x057A , 0x00 ; hp_out_shift_7 +X , 0x057B , 0x0C ; hp_out_stop_7 +X , 0x0706 , 0x00 ; psrg_ctrl +X , 0x0480 , 0x11 ; hp_ctrl_1 +X , 0x04B0 , 0x01 ; hp_ctrl_2 + +W , 2000000 +X , 0x0210 , 0x80 ; dpll_mode_refsel_0 +X , 0x0214 , 0x63 ; dpll_mode_refsel_1 +X , 0x0218 , 0x00 ; dpll_mode_refsel_2 +X , 0x021C , 0x00 ; dpll_mode_refsel_3 +X , 0x0209 , 0x02 ; split_xo_ctrl +W , 2000000 + +; Register Configuration End +; Register Write Count = 1065 + +;====================================================================== diff --git a/platform/broadcom/sonic-platform-modules-dell/z9864f/scripts/z9864f_platform.sh b/platform/broadcom/sonic-platform-modules-dell/z9864f/scripts/z9864f_platform.sh new file mode 100755 index 00000000000..70abde1a9dc --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/z9864f/scripts/z9864f_platform.sh @@ -0,0 +1,324 @@ +#!/bin/bash + +init_devnum() { + found=0 + for devnum in 0 1; do + devname=`cat /sys/bus/i2c/devices/i2c-${devnum}/name` + # I801 adapter + if [[ $devname == 'SMBus I801 adapter at '* ]]; then + found=1 + break + fi + done + + [ $found -eq 0 ] && echo "cannot find I801" && exit 1 +} + +# Function to detect pci bus number for FPGA + +init_fpga_busnum() { + found=0 + for fpga_busnum in 1 2; do + fpga_vendorid=`cat /sys/bus/pci/devices/0000:0$fpga_busnum:00.0/subsystem_vendor` + if [[ $fpga_vendorid == '0x1204' ]]; then + found=1 + break + fi + done + + [ $found -eq 0 ] && echo "Cannot read pcie device bus for fpga" && exit 1 +} + +# Attach/Detach syseeprom on CPU board +sys_eeprom() { + case $1 in + "new_device") echo 24c08 0x50 > /sys/bus/i2c/devices/i2c-${devnum}/$1 + ;; + "delete_device") echo 0x50 > /sys/bus/i2c/devices/i2c-${devnum}/$1 + ;; + *) echo "z9864f_platform: sys_eeprom : invalid command !" + ;; + esac +} + +#Attach/Detach the MUX connecting all QSFPs +switch_board_qsfp_sfp_mux() { + case $1 in + "new_device") + #OSFP 1 to 32 I2C mux bus # 602,603,604,605 + #OSFP 33 to 64 I2C mux bus # 606,607,608,609 + #SFP+ port I2C mux bus # 601 + for i in 602 603 604 605 606 607 608 609 601 + do + sleep 0.5 + if [[ $i == 601 ]]; then + echo "Attaching PCA9546 @ 0x71" + echo pca9548 0x71 > /sys/bus/i2c/devices/i2c-$i/$1 + sleep 0.1 + if [ ! -d /sys/bus/i2c/devices/i2c-$i/$i-0071/channel-0 ]; then + echo 0x71 > /sys/bus/i2c/devices/i2c-$i/$1 + sleep 3 + echo pca9548 0x71 > /sys/bus/i2c/devices/i2c-$i/$1 + fi + break + fi + echo "Attaching PCA9548 @ 0x70" + echo pca9548 0x70 > /sys/bus/i2c/devices/i2c-$i/$1 + sleep 0.2 + if [ ! -d /sys/bus/i2c/devices/i2c-$i/$i-0070/channel-0 ]; then + echo 0x70 > /sys/bus/i2c/devices/i2c-$i/$1 + sleep 3 + echo pca9548 0x70 > /sys/bus/i2c/devices/i2c-$i/$1 + fi + done + sleep 1 + + for i in 602 603 604 605 606 607 608 609 601 + do + if [[ $i == 601 ]]; then + if [ ! -d /sys/bus/i2c/devices/i2c-$i/$i-0071/channel-0 ]; then + logger -p syslog.err "*******H/W Error : i2c mux $i failed to populate******" + fi + break + fi + if [ ! -d /sys/bus/i2c/devices/i2c-$i/$i-0070/channel-0 ]; then + logger -p syslog.err "*******H/W Error : i2c mux $i failed to populate******" + fi + done + ;; + + "delete_device") + #OSFP 1 to 32 I2C mux bus # 602,603,604,605 + #OSFP 33 to 64 I2C mux bus # 606,607,608,609 + #SFP+ port I2C mux bus # 601 + for i in 602 603 604 605 606 607 608 609 601 + do + if [[ $i == 601 ]]; then + echo "Detaching PCA95468 @ 0x71" + echo 0x71 > /sys/bus/i2c/devices/i2c-$i/$1 + fi + echo "Detaching PCA9548 @ 0x70" + echo 0x70 > /sys/bus/i2c/devices/i2c-$i/$1 + done + ;; + *) echo "z9864f_platform: switch_board_qsfp_sfp_mux: invalid command !" + ;; + esac + sleep 2 +} + +#Attach/Detach 2 instances of EEPROM driver SFP+ ports +#eeprom can dump data using below command +switch_board_sfp() { + case $1 in + "new_device") + for ((i=66;i<=67;i++)); + do + echo optoe2 0x50 > /sys/bus/i2c/devices/i2c-$i/$1 + done + ;; + + "delete_device") + for ((i=66;i<=67;i++)); + do + echo 0x50 > /sys/bus/i2c/devices/i2c-$i/$1 + done + ;; + + *) echo "z9864f_platform: switch_board_sfp: invalid command !" + ;; + esac +} + +#Attach/Detach 32 instances of EEPROM driver QSFP ports +#eeprom can dump data using below command +switch_board_qsfp() { + case $1 in + "new_device") + /usr/bin/python3 /usr/local/bin/load_optics_driver.py "02:65" "optoe3" + ;; + + "delete_device") + for ((i=2;i<=65;i++)); + do + echo 0x50 > /sys/bus/i2c/devices/i2c-$i/$1 + done + ;; + + *) echo "z9864f_platform: switch_board_qsfp: invalid command !" + ;; + esac +} + +BOOT_TYPE="" +get_boot_type() +{ + file="/proc/cmdline" + sub="SONIC_BOOT_TYPE" + while read -r line; do + if grep -q "$sub" <<< "$line"; then + for word in $line + do + if [[ $word == SONIC_BOOT_TYPE* ]]; then + BOOT_TYPE="$(cut -d'=' -f2 <<<"$word")" + fi + done + fi + done <$file +} + +switch_board_module_reset() { + # setting low power mode to support 100G QSFP via adapter + /usr/sbin/i2cset -y 600 0x41 0x44 0x00 + /usr/sbin/i2cset -y 600 0x41 0x45 0x00 + /usr/sbin/i2cset -y 600 0x41 0x46 0x00 + /usr/sbin/i2cset -y 600 0x41 0x47 0x00 + /usr/sbin/i2cset -y 600 0x45 0x44 0x00 + /usr/sbin/i2cset -y 600 0x45 0x45 0x00 + /usr/sbin/i2cset -y 600 0x45 0x46 0x00 + /usr/sbin/i2cset -y 600 0x45 0x47 0x00 + + # set reset bits + /usr/sbin/i2cset -y 600 0x41 0x40 0xff + /usr/sbin/i2cset -y 600 0x41 0x41 0xff + /usr/sbin/i2cset -y 600 0x41 0x42 0xff + /usr/sbin/i2cset -y 600 0x41 0x43 0xff + /usr/sbin/i2cset -y 600 0x45 0x40 0xff + /usr/sbin/i2cset -y 600 0x45 0x41 0xff + /usr/sbin/i2cset -y 600 0x45 0x42 0xff + /usr/sbin/i2cset -y 600 0x45 0x43 0xff + /usr/sbin/i2cset -y 600 0x41 0x50 0x00 + echo "z9864f_platform: switch_board_module_reset" +} + +switch_board_modenable() { + #enable reset logic for i2c + /usr/sbin/i2cset -y 600 0x41 0x40 0x00 + /usr/sbin/i2cset -y 600 0x41 0x41 0x00 + /usr/sbin/i2cset -y 600 0x41 0x42 0x00 + /usr/sbin/i2cset -y 600 0x41 0x43 0x00 + /usr/sbin/i2cset -y 600 0x45 0x40 0x00 + /usr/sbin/i2cset -y 600 0x45 0x41 0x00 + /usr/sbin/i2cset -y 600 0x45 0x42 0x00 + /usr/sbin/i2cset -y 600 0x45 0x43 0x00 + /usr/sbin/i2cset -y 600 0x41 0x50 0x00 + +} + +platform_firmware_versions() { + FIRMWARE_VERSION_FILE=/var/log/firmware_versions + rm -rf ${FIRMWARE_VERSION_FILE} + + #echo "BIOS: `dmidecode -s system-version `" > $FIRMWARE_VERSION_FILE + echo "BIOS: `dmidecode -s bios-version`" > $FIRMWARE_VERSION_FILE + + ## Get FPGA version, Only Maj version available + r=`/usr/bin/pcisysfs.py --get --offset 0x04 --res /sys/bus/pci/devices/0000\:0$fpga_busnum\:00.0/resource0 | sed '1d; s/.*\(....\)$/\1/;'` + r_maj=$(echo $r | sed 's/.*\(..\)$/0x\1/') + r_min=0 + echo "FPGA: $((r_maj)).$((r_min))" >> $FIRMWARE_VERSION_FILE + + ## Get BMC Firmware Revision + r=`ipmitool mc info | awk '/Firmware Revision/ { print $NF }'` + echo "BMC: $r" >> $FIRMWARE_VERSION_FILE + + #System CPLD 0x3d on i2c bus 1 ( physical FPGA I2C-1) + r_maj=`/usr/sbin/i2cget -y $devnum 0x3d 0x1 | sed ' s/.*\(.\)$/\1/'` + r_min=0 + echo "System CPLD: $r_maj.$((r_min))" >> $FIRMWARE_VERSION_FILE + + #PortA CPLD 1 0x41 on i2c bus 600 ( physical FPGA I2C-600) + r_maj=`/usr/sbin/i2cget -y 600 0x41 0x0 | sed ' s/.*\(0x..\)$/\1/'` + r_min=0 + echo "Secondary CPLD 1: $((r_maj)).$((r_min))" >> $FIRMWARE_VERSION_FILE + + #PortB CPLD 2 0x45 on i2c bus 600 ( physical FPGA I2C-600) + r_maj=`/usr/sbin/i2cget -y 600 0x45 0x0 | sed ' s/.*\(0x..\)$/\1/'` + r_min=0 + echo "Secondary CPLD 2: $((r_maj)).$((r_min))" >> $FIRMWARE_VERSION_FILE +} + +#This enables the led control for CPU and default states +switch_board_led_default() { + resource="/sys/bus/pci/devices/0000:0$fpga_busnum:00.0/resource0" + python /usr/bin/pcisysfs.py --set --offset 0x24 --val 0x94 --res $resource > /dev/null 2>&1 +} + +install_python_api_package() { + device="/usr/share/sonic/device" + platform=$(/usr/local/bin/sonic-cfggen -H -v DEVICE_METADATA.localhost.platform) + + pip3 install $device/$platform/sonic_platform-1.0-py3-none-any.whl +} + +remove_python_api_package() { + rv=$(pip3 show sonic-platform > /dev/null 2>/dev/null) + if [ $? -eq 0 ]; then + rv=$(pip3 uninstall -y sonic-platform > /dev/null 2>/dev/null) + fi +} + +get_reboot_cause() { + REBOOT_REASON_FILE="/host/reboot-cause/platform/reboot_reason" + mkdir -p $(dirname $REBOOT_REASON_FILE) + + # Handle First Boot into software version with reboot cause determination support + if [[ ! -e $REBOOT_REASON_FILE ]]; then + echo "0x0" > $REBOOT_REASON_FILE + else + /usr/sbin/i2cget -y $devnum 0x3d 0x28 > $REBOOT_REASON_FILE + fi + /usr/sbin/i2cset -y $devnum 0x3d 0x28 0x0 +} + +init_devnum +init_fpga_busnum +PLATFORM_READY_CHECK=/var/run/platform_ready + +if [ "$1" == "init" ]; then + modprobe i2c-dev + modprobe i2c-mux-pca954x + modprobe ipmi_devintf + modprobe ipmi_si kipmid_max_busy_us=3000 + modprobe dell_z9864f_fpga + sys_eeprom "new_device" + sleep 1 + # Create a flag file to denote the platform is ready + touch $PLATFORM_READY_CHECK + switch_board_qsfp_sfp_mux "new_device" + switch_board_qsfp "new_device" + switch_board_sfp "new_device" + sleep 1 + get_reboot_cause + get_boot_type + switch_board_module_reset + sleep 1 + switch_board_modenable + sleep 1 + #switch_board_led_default + install_python_api_package + platform_firmware_versions + sleep 1 + echo 3000 > /sys/module/ipmi_si/parameters/kipmid_max_busy_us + echo -2 > /sys/bus/i2c/drivers/pca954x/603-0070/idle_state + echo -2 > /sys/bus/i2c/drivers/pca954x/605-0070/idle_state + echo -2 > /sys/bus/i2c/drivers/pca954x/607-0070/idle_state + echo -2 > /sys/bus/i2c/drivers/pca954x/602-0070/idle_state + echo -2 > /sys/bus/i2c/drivers/pca954x/604-0070/idle_state + echo -2 > /sys/bus/i2c/drivers/pca954x/606-0070/idle_state + echo -2 > /sys/bus/i2c/drivers/pca954x/608-0070/idle_state + echo -2 > /sys/bus/i2c/drivers/pca954x/609-0070/idle_state + echo -2 > /sys/bus/i2c/drivers/pca954x/601-0071/idle_state + +elif [ "$1" == "deinit" ]; then + if [ ! -f "/tmp/warm-reboot-progress" ]; then + switch_board_module_reset + fi + # Remove the flag file to denote the platform is no more ready + rm -f $PLATFORM_READY_CHECK +elif [ "$1" == "media_down" ]; then + switch_board_module_reset +else + echo "z9864f_platform : Invalid option !" +fi + diff --git a/platform/broadcom/sonic-platform-modules-dell/z9864f/setup.py b/platform/broadcom/sonic-platform-modules-dell/z9864f/setup.py new file mode 100755 index 00000000000..3582706b70a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/z9864f/setup.py @@ -0,0 +1,36 @@ +from setuptools import setup + +setup( + name='sonic-platform', + version='1.0', + description='SONiC platform API implementation on DellEmc Platforms', + license='Apache 2.0', + author='SONiC Team', + author_email='linuxnetdev@microsoft.com', + url='https://github.com/Azure/sonic-buildimage', + maintainer='DellEMC', + maintainer_email='dell-sonic@dell.com', + packages=[ + 'sonic_platform', + ], + classifiers=[ + 'Development Status :: 3 - Alpha', + 'Environment :: Plugins', + 'Intended Audience :: Developers', + 'Intended Audience :: Information Technology', + 'Intended Audience :: System Administrators', + 'License :: OSI Approved :: Apache Software License', + 'Natural Language :: English', + 'Operating System :: POSIX :: Linux', + 'Programming Language :: Python :: 2.7', + 'Programming Language :: Python :: 3.7', + 'Topic :: Utilities', + ], + keywords='sonic SONiC platform PLATFORM', + entry_points={ + 'console_scripts': [ + 'portutil = sonic_platform.portutil:cli' + ] + } +) + diff --git a/platform/broadcom/sonic-platform-modules-dell/z9864f/sonic_platform/__init__.py b/platform/broadcom/sonic-platform-modules-dell/z9864f/sonic_platform/__init__.py new file mode 100644 index 00000000000..da0795ffeac --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/z9864f/sonic_platform/__init__.py @@ -0,0 +1,18 @@ +from . import platform +from . import chassis +from . import eeprom +from . import component +from . import thermal +from . import psu +from . import fan +from . import fan_drawer +from . import watchdog +from . import hwaccess +from .platform import Platform +from .chassis import Chassis + +__all__ = [ + "platform", "chassis", "sfp", "eeprom", "component", "thermal", + "psu", "fan", "fan_drawer", "watchdog", "hwaccess", + "Platform", "Chassis", +] diff --git a/platform/broadcom/sonic-platform-modules-dell/z9864f/sonic_platform/chassis.py b/platform/broadcom/sonic-platform-modules-dell/z9864f/sonic_platform/chassis.py new file mode 100644 index 00000000000..91e759e7abb --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/z9864f/sonic_platform/chassis.py @@ -0,0 +1,354 @@ +#!/usr/bin/env python3 +""" +############################################################################# +# DELL Z9864F +# +# Module contains an implementation of SONiC Platform Base API and +# provides the platform information +# +############################################################################# +""" +try: + import time + import sys + import os + from sonic_platform_base.chassis_base import ChassisBase + from sonic_platform.sfp import Sfp,_port_to_i2c_mapping + from sonic_platform.eeprom import Eeprom + from sonic_platform.component import Component + from sonic_platform.psu import Psu + from sonic_platform.thermal import Thermal + from sonic_platform.watchdog import Watchdog + from sonic_platform.fan import Fan + from sonic_platform.fan_drawer import FanDrawer + from sonic_platform.hwaccess import pci_get_value, pci_set_value, get_fpga_buspath +except ImportError as err: + raise ImportError(str(err) + "- required module not found") + +MAX_Z9864F_COMPONENT = 7 # BIOS,BMC,FPGA,SYSTEM CPLD,2 SECONDARY CPLDs, PCIe +MAX_Z9864F_FANTRAY = 4 +MAX_Z9864F_PSU = 2 +MAX_Z9864F_THERMAL = 15 +SYSTEM_LED_REG = 0x84 +SYSTEM_BEACON_LED_REG = 0x90 +SYSTEM_BEACON_LED_SET = 0x9 +SYSTEM_BEACON_LED_CLEAR = 0x0 + +PORT_START = 1 +PORT_END = 66 +PORTS_IN_BLOCK = (PORT_END + 1) +REBOOT_CAUSE_PATH = "/host/reboot-cause/platform/reboot_reason" +PLATFORM_ROOT = '/usr/share/sonic/platform' + +class Chassis(ChassisBase): + """ + DELL Platform-specific Chassis class + """ + + + _global_port_pres_dict = {} + + SYSLED_COLOR_TO_REG = { + "blinking_green": 0x6, + "green" : 0x2, + "amber" : 0x1, + "blinking_amber": 0x5 + } + + REG_TO_SYSLED_COLOR = { + 0x6 : "blinking_green", + 0x2 : "green", + 0x1 : "amber", + 0x5 : "blinking_amber" + } + + def __init__(self): + ChassisBase.__init__(self) + self.STATUS_LED_COLOR_BLUE_BLINK = "blue_blink" + # sfp.py will read eeprom contents and retrive the eeprom data. + # We pass the eeprom path from chassis.py + _sfp_port = list(range(65, PORTS_IN_BLOCK)) + i2c_bus_for_port = 1 + i2c_mux_to_populate = 602 + i2c_qsfp_mux_address = 70 + i2c_sfp_mux_address = 71 + i2c_mux_is_good = False + eeprom_base = "/sys/bus/i2c/devices/i2c-{0}/{0}-0050/eeprom" + mux_channel = "/sys/bus/i2c/devices/i2c-{0}/{0}-00{1}/channel-0" + self._psu_list = [Psu(i) for i in range(MAX_Z9864F_PSU)] + self.psu_fan_direction_reverse = False + for psu in self._psu_list: + if psu._fan_list[0].get_direction() == "intake": + self.psu_fan_direction_reverse = True + for index in range(PORT_START, PORTS_IN_BLOCK): + eeprom_path = eeprom_base.format((_port_to_i2c_mapping[index])) + port_type = 'OSFP' if index not in _sfp_port else 'SFP' + sfp_node = Sfp(index, port_type, eeprom_path) + self._global_port_pres_dict[index] = '0' + self._sfp_list.append(sfp_node) + + # Platform components to be enabled in later commits. + self._eeprom = Eeprom() + #self._watchdog = Watchdog() + self._num_sfps = PORT_END + self._fan_list = [] + for k in range(MAX_Z9864F_FANTRAY): + fandrawer = FanDrawer(k) + self._fan_drawer_list.append(fandrawer) + self._fan_list.extend(fandrawer._fan_list) + self._num_fans = len(self._fan_list) + self._thermal_list = [Thermal(i) for i in range(MAX_Z9864F_THERMAL)] + self._component_list = [Component(i) for i in range(MAX_Z9864F_COMPONENT)] + + watchdog_spec = {} + watchdog_spec['timers'] = [10, 30, 60, 120, 180, 240, 360, 480] + watchdog_spec['check_cpld_version'] = False + watchdog_spec['mode'] = 'MODE_I2C' + watchdog_spec['i2c_bus'] = 1 + watchdog_spec['i2c_addr'] = 0x3d + watchdog_spec['wd_reg'] = 0x07 + self._watchdog = Watchdog(watchdog_spec) + self.LOCATOR_LED_ON = self.STATUS_LED_COLOR_BLUE_BLINK + self.LOCATOR_LED_OFF = self.STATUS_LED_COLOR_OFF + +# check for this event change for sfp / do we need to handle timeout/sleep + + def get_change_event(self, timeout=0): + """ + Returns a nested dictionary containing all devices which have + experienced a change at chassis level + """ + start_ms = time.time() * 1000 + port_dict = {} + change_dict = {} + change_dict['sfp'] = port_dict + while True: + time.sleep(0.5) + for port_num in range(PORT_START, (PORT_END + 1)): + presence = self.get_sfp(port_num).get_presence() + if presence and self._global_port_pres_dict[port_num] == '0': + self._global_port_pres_dict[port_num] = '1' + port_dict[port_num] = '1' + elif(not presence and + self._global_port_pres_dict[port_num] == '1'): + self._global_port_pres_dict[port_num] = '0' + port_dict[port_num] = '0' + + if len(port_dict) > 0: + return True, change_dict + + if timeout: + now_ms = time.time() * 1000 + if now_ms - start_ms >= timeout: + return True, change_dict + + def get_sfp(self, index): + """ + Retrieves sfp represented by (0-based) index + + Args: + index: An integer, the index (0-based) of the sfp to retrieve. + The index should be the sequence of a physical port in a chassis, + starting from 0. + For example, 0 for Ethernet0, 1 for Ethernet4 and so on. + + Returns: + An object dervied from SfpBase representing the specified sfp + """ + sfp = None + + try: + # The 'index' is 1-based + sfp = self._sfp_list[index-1] + except IndexError: + sys.stderr.write("SFP index {} out of range (1-{})\n".format( + index, len(self._sfp_list))) + return sfp + + def initizalize_system_led(self): + self.sys_ledcolor = "green" + + def get_status_led(self, *args): + """ + Gets the state of the system LED + Returns: + A string, one of the valid LED color strings which could be + vendor specified. + """ + if len(args) != 0: + return False + + val = pci_get_value(get_fpga_buspath(), SYSTEM_LED_REG) + if val != -1: + return self.REG_TO_SYSLED_COLOR.get(val) + return self.sys_ledcolor + + def set_status_led(self, *args): + """ + Sets the state of the system LED + Args: + color: A string representing the color with which to set the + system LED + Returns: + bool: True if system LED state is set successfully, False if not + """ + if len(args) == 1: + color = args[0] + else: + return True + + if color not in list(self.SYSLED_COLOR_TO_REG.keys()): + return False + res_path = get_fpga_buspath() + val = self.SYSLED_COLOR_TO_REG[color] + + pci_set_value(res_path, val, SYSTEM_LED_REG) + self.sys_ledcolor = color + return True + + def get_name(self): + """ + Retrieves the name of the chassis + Returns: + string: The name of the chassis + """ + return self._eeprom.modelstr() + + def get_model(self): + """ + Retrieves the model number (or part number) of the chassis + Returns: + string: Model/part number of chassis + """ + return self._eeprom.part_number_str().decode() + + def get_serial(self): + """ + Retrieves the serial number of the chassis (Service tag) + Returns: + string: Serial number of chassis + """ + return self._eeprom.serial_str() + + def get_base_mac(self): + """ + Retrieves the base MAC address for the chassis + Returns: + A string containing the MAC address in the format + 'XX:XX:XX:XX:XX:XX' + """ + return self._eeprom.base_mac_addr('') + + def get_serial_number(self): + """ + Retrieves the hardware serial number for the chassis + Returns: + A string containing the hardware serial number for this chassis. + """ + return self._eeprom.serial_number_str() + + def get_system_eeprom_info(self): + """ + Retrieves the full content of system EEPROM information for the chassis + Returns: + A dictionary where keys are the type code defined in + OCP ONIE TlvInfo EEPROM format and values are their corresponding + values. + """ + return self._eeprom.system_eeprom_info() + + def get_eeprom(self): + """ + Retrieves the Sys Eeprom instance for the chassis. + Returns : + The instance of the Sys Eeprom + """ + return self._eeprom + + def get_num_fans(self): + """ + Retrives the number of Fans on the chassis. + Returns : + An integer represents the number of Fans on the chassis. + """ + return self._num_fans + + def get_num_sfps(self): + """ + Retrives the numnber of Media on the chassis. + Returns: + An integer represences the number of SFPs on the chassis. + """ + return self._num_sfps + + def get_reboot_cause(self): + """ + Retrieves the cause of the previous reboot + Returns: + A tuple (string, string) where the first element is a string + containing the cause of the previous reboot. This string must be + one of the predefined strings in this class. If the first string + is "REBOOT_CAUSE_HARDWARE_OTHER", the second string can be used + to pass a description of the reboot cause. + """ + try: + with open(REBOOT_CAUSE_PATH) as filed: + reboot_cause = hex(int(filed.read(), 16)) + except EnvironmentError: + return (self.REBOOT_CAUSE_NON_HARDWARE, None) + + if reboot_cause == "0xc3": + retval = (self.REBOOT_CAUSE_POWER_LOSS, "Power on reset") + elif reboot_cause == "0x40": + retval = (self.REBOOT_CAUSE_NON_HARDWARE, "CPU Warm Reset") + elif reboot_cause == "0x80": + retval = (self.REBOOT_CAUSE_NON_HARDWARE, "CPU Cold Reset") + elif reboot_cause == "0x42": + retval = (self.REBOOT_CAUSE_NON_HARDWARE, "CPU Shutdown") + elif reboot_cause == "0xe2": + retval = (self.REBOOT_CAUSE_THERMAL_OVERLOAD_CPU, None) + elif reboot_cause == "0xd2": + retval = (self.REBOOT_CAUSE_WATCHDOG, None) + else: + retval = (self.REBOOT_CAUSE_NON_HARDWARE, None) + return retval + + def set_locator_led(self, color): + """ + Sets the state of the Chassis Locator LED + + Args: + color: A string representing the color with which to set the Chassis Locator LED + + Returns: + bool: True if the Chassis Locator LED state is set successfully, False if not + + """ + resource = get_fpga_buspath() + val = SYSTEM_BEACON_LED_CLEAR + if self.LOCATOR_LED_ON == color: + val = SYSTEM_BEACON_LED_SET + elif self.LOCATOR_LED_OFF == color: + val = SYSTEM_BEACON_LED_CLEAR + else: + return False + pci_set_value(resource, val, SYSTEM_BEACON_LED_REG) + return True + + def get_locator_led(self): + """ + Gets the state of the Chassis Locator LED + + Returns: + LOCATOR_LED_ON or LOCATOR_LED_OFF + """ + resource = get_fpga_buspath() + val = pci_get_value(resource, SYSTEM_BEACON_LED_REG) + if not val: + return self.LOCATOR_LED_OFF + else: + return self.LOCATOR_LED_ON + + def phy_manager(self): + from sonic_platform.phy_manager import PhyManager + return PhyManager(self) diff --git a/platform/broadcom/sonic-platform-modules-dell/z9864f/sonic_platform/component.py b/platform/broadcom/sonic-platform-modules-dell/z9864f/sonic_platform/component.py new file mode 100644 index 00000000000..380a5b29761 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/z9864f/sonic_platform/component.py @@ -0,0 +1,163 @@ +#!/usr/bin/env python +""" +######################################################################## +# DELL Z9864F +# +# Module contains an implementation of SONiC Platform Base API and +# provides the Components' (e.g., BIOS, CPLD, FPGA, BMC etc.) available in +# the platform +# +######################################################################## +""" + +try: + import re + import subprocess + from sonic_platform_base.component_base import ComponentBase + import sonic_platform.hwaccess as hwaccess + +except ImportError as err: + raise ImportError(str(err) + "- required module not found") + + +def get_bios_version(): + """ Returns BIOS Version """ + bios_ver = '' + try: + bios_ver = subprocess.check_output(['dmidecode', '-s', 'system-version']).strip() + if type(bios_ver) == bytes: + bios_ver = bios_ver.decode() + except (FileNotFoundError, subprocess.CalledProcessError): + pass + return bios_ver + + +def get_fpga_version(): + """ Returns FPGA Version """ + val = hwaccess.pci_get_value(hwaccess.get_fpga_buspath(), 4) + return '{}.{}'.format((val & 0xff),0) + +def get_bmc_version(): + """ Returns BMC Version """ + bmc_ver = '' + try: + bmc_ver = subprocess.check_output( + "ipmitool mc info | awk '/Firmware Revision/ { print $NF }'", + shell=True, text=True).strip() + except (FileNotFoundError, subprocess.CalledProcessError): + pass + return bmc_ver + +def get_cpld_version(bus, i2caddr, regaddr): + """ Returns CPLD Major.Minor Version at Byte1.Byte0 @ given i2c address """ + major = hwaccess.i2c_get(bus, i2caddr, regaddr) + if major != -1: + return '{}.{}'.format(major, 0) + return '' + +def get_cpld0_version(): + """ Returns System CPLD Version """ + return get_cpld_version(hwaccess.get_smbus_i801_devnum(), 0x3d,1) + +def get_cpld1_version(): + """ Returns Secondary CPLD1 Version """ + return get_cpld_version(600, 0x41,0) + +def get_cpld2_version(): + """ Returns Secondary CPLD2 Version """ + return get_cpld_version(600, 0x45,0) + +def _get_pcie_fw_version(): + """ Returns PCIe Firmware Version """ + pcie_ver = '' + try: + cmd_out = subprocess.check_output(['bcmcmd', "dsh -c \"pciephy fwinfo\""], text=True).strip() + result = re.search(r'(?<=PCIe FW loader version:).*', cmd_out) + if result is not None: + pcie_ver = result.group(0).strip() + except (FileNotFoundError, subprocess.CalledProcessError): + pass + + return pcie_ver + +class Component(ComponentBase): + """DELL Platform-specific Component class""" + + CHASSIS_COMPONENTS = [ + ['BIOS', + 'Performs initialization of hardware components during booting', + get_bios_version + ], + + ['FPGA', + 'Used for managing the system LEDs', + get_fpga_version + ], + + ['BMC', + 'Platform management controller for on-board temperature ' + 'monitoring, in-chassis power, Fan and LED control', + get_bmc_version + ], + + ['System CPLD', + 'Used for managing the CPU power sequence and CPU states', + get_cpld0_version + ], + + ['Secondary CPLD 1', + 'Used for managing OSFP112 port transceivers (OSFP112 1-32)', + get_cpld1_version + ], + + ['Secondary CPLD 2', + 'Used for managing OSFP112 port transceivers (OSFP112 33-64)', + get_cpld2_version + ], + ['PCIe', + 'ASIC PCIe firmware', + _get_pcie_fw_version + ] + ] + + def __init__(self, component_index=0): + self.index = component_index + self.name = self.CHASSIS_COMPONENTS[self.index][0] + self.description = self.CHASSIS_COMPONENTS[self.index][1] + self.version = self.CHASSIS_COMPONENTS[self.index][2]() + + def get_name(self): + """ + Retrieves the name of the component + Returns: + A string containing the name of the component + """ + return self.name + + def get_description(self): + """ + Retrieves the description of the component + Returns: + A string containing the description of the component + """ + return self.description + + def get_firmware_version(self): + """ + Retrieves the firmware version of the component + Returns: + A string containing the firmware version of the component + """ + return self.version + + @staticmethod + def install_firmware(image_path): + """ + Installs firmware to the component + Args: + image_path: A string, path to firmware image + Returns: + A boolean, True if install was successful, False if not + """ + del image_path + return False diff --git a/platform/broadcom/sonic-platform-modules-dell/z9864f/sonic_platform/eeprom.py b/platform/broadcom/sonic-platform-modules-dell/z9864f/sonic_platform/eeprom.py new file mode 100644 index 00000000000..ce53bb04ff2 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/z9864f/sonic_platform/eeprom.py @@ -0,0 +1,148 @@ +#!/usr/bin/env python +""" +############################################################################# +# Dell Z9864F +# +# Platform and model specific eeprom subclass, inherits from the base class, +# and provides the followings: +# - the eeprom format definition +# - specific encoder/decoder if there is special need +############################################################################# +""" +try: + import os.path + import binascii + import syslog + from sonic_eeprom import eeprom_tlvinfo +except ImportError as err: + raise ImportError(str(err) + "- required module not found") + + +class Eeprom(eeprom_tlvinfo.TlvInfoDecoder): + """ System EEPROM Class """ + _TLV_DISPLAY_VENDOR_EXT = True + + def __init__(self): + self.eeprom_path = None + for bus in (0, 1): + filed = '/sys/bus/i2c/devices/i2c-{0}/{0}-0050/eeprom'.format(bus) + dev_name_file = '/sys/bus/i2c/devices/i2c-{0}/name'.format(bus) + if os.path.exists(filed) and os.path.exists(dev_name_file): + try: + with open(dev_name_file, 'r') as file_desc: + dev_name = file_desc.read() + except IOError: + return + if dev_name.startswith('SMBus I801 adapter at ') > 0: + self.eeprom_path = filed + break + if self.eeprom_path is None: + return + super(Eeprom, self).__init__(self.eeprom_path, 0, '', True) + self.eeprom_tlv_dict = dict() + try: + self.eeprom_data = self.read_eeprom() + except: + self.eeprom_data = "N/A" + raise RuntimeError("Eeprom is not Programmed") + + eeprom = self.eeprom_data + + if not self.is_valid_tlvinfo_header(eeprom): + syslog.syslog(syslog.LOG_ERR, "Not valid tlvinfo header") + return + + total_length = (eeprom[9] << 8) | eeprom[10] + tlv_index = self._TLV_INFO_HDR_LEN + tlv_end = self._TLV_INFO_HDR_LEN + total_length + + while (tlv_index + 2) < len(eeprom) and tlv_index < tlv_end: + if not self.is_valid_tlv(eeprom[tlv_index:]): + break + + tlv = eeprom[tlv_index:tlv_index + 2 + + eeprom[tlv_index + 1]] + code = "0x%02X" % tlv[0] + + _, value = self.decoder(None, tlv) + + self.eeprom_tlv_dict[code] = value + if eeprom[tlv_index] == self._TLV_CODE_CRC_32: + break + + tlv_index += eeprom[tlv_index+1] + 2 + + def serial_number_str(self): + """ + Returns the serial number + """ + (is_valid, results) = self.get_tlv_field( + self.eeprom_data, self._TLV_CODE_SERIAL_NUMBER) + if not is_valid: + return "N/A" + return results[2].decode('ascii') + + def base_mac_addr(self, _): + """ + Returns the base mac address found in the system EEPROM + """ + (is_valid, tlv) = self.get_tlv_field( + self.eeprom_data, self._TLV_CODE_MAC_BASE) + if not is_valid or tlv[1] != 6: + return super(Eeprom, self).switchaddrstr(tlv) + + return ":".join(["{:02x}".format(T) for T in tlv[2]]).upper() + + def modelstr(self): + """ + Returns the Model name + """ + (is_valid, results) = self.get_tlv_field( + self.eeprom_data, self._TLV_CODE_PRODUCT_NAME) + if not is_valid: + return "N/A" + + return results[2].decode('ascii') + + def part_number_str(self): + """ + Returns the part number + """ + (is_valid, results) = self.get_tlv_field( + self.eeprom_data, self._TLV_CODE_PART_NUMBER) + if not is_valid: + return "N/A" + + return results[2] + + def serial_str(self): + """ + Returns the servicetag number + """ + (is_valid, results) = self.get_tlv_field( + self.eeprom_data, self._TLV_CODE_SERVICE_TAG) + if not is_valid: + return "N/A" + + return results[2].decode('ascii') + + def revision_str(self): + """ + Returns the device revision + """ + (is_valid, results) = self.get_tlv_field( + self.eeprom_data, self._TLV_CODE_DEVICE_VERSION) + if not is_valid: + return "N/A" + + return results[2] + + def system_eeprom_info(self): + """ + Returns a dictionary, where keys are the type code defined in + ONIE EEPROM format and values are their corresponding values + found in the system EEPROM. + """ + return self.eeprom_tlv_dict + + diff --git a/platform/broadcom/sonic-platform-modules-dell/z9864f/sonic_platform/fan.py b/platform/broadcom/sonic-platform-modules-dell/z9864f/sonic_platform/fan.py new file mode 100644 index 00000000000..809e0bd8484 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/z9864f/sonic_platform/fan.py @@ -0,0 +1,204 @@ +#!/usr/bin/env python +""" +######################################################################## +# DELL Z9864F +# +# Module contains an implementation of SONiC Platform Base API and +# provides the Fans' information which are available in the platform. +# +######################################################################## +""" + +try: + from sonic_platform_base.fan_base import FanBase + from sonic_platform.ipmihelper import IpmiSensor, IpmiFru +except ImportError as err: + raise ImportError(str(err) + "- required module not found") + +FAN_DIRECTION_OFFSET = 69 +PSU_FAN_DIRECTION_OFFSET = 47 +PSU_FAN_FAULT = 0x03 +FAN_FAULT = 0x07 + +class Fan(FanBase): + """DELL Platform-specific Fan class""" + # { FAN-ID: { Sensor-Name: Sensor-ID } } + FAN_SENSOR_MAPPING = {1: {"Prsnt": 0x51, "State": 0x20, "Speed": 0x1A}, + 2: {"Prsnt": 0x51, "State": 0x21, "Speed": 0x1B}, + 3: {"Prsnt": 0x52, "State": 0x22, "Speed": 0x1C}, + 4: {"Prsnt": 0x52, "State": 0x23, "Speed": 0x1D}, + 5: {"Prsnt": 0x53, "State": 0x24, "Speed": 0x17}, + 6: {"Prsnt": 0x53, "State": 0x25, "Speed": 0x14}, + 7: {"Prsnt": 0x54, "State": 0x26, "Speed": 0x19}, + 8: {"Prsnt": 0x54, "State": 0x27, "Speed": 0x16}} + PSU_FAN_SENSOR_MAPPING = {1: {"State": 0x41, "Speed": 0x45}, + 2: {"State": 0x31, "Speed": 0x35}} + + # { FANTRAY-ID: FRU-ID } + FAN_FRU_MAPPING = {1: 3, 2: 4, 3: 5, 4: 6} + PSU_FRU_MAPPING = {1: 1, 2: 2} + + def __init__(self, fantray_index=1, fan_index=1, psu_fan=False, + dependency=None): + self.is_psu_fan = psu_fan + if not self.is_psu_fan: + # API index is starting from 0, DELL platform index is + # starting from 1 + self.fantrayindex = fantray_index + 1 + self.fanindex = fan_index + 1 + self.fan_direction_offset = FAN_DIRECTION_OFFSET + self.index = (self.fantrayindex - 1) * 2 + self.fanindex + self.prsnt_sensor = IpmiSensor(self.FAN_SENSOR_MAPPING[self.index]["Prsnt"], + is_discrete=True) + self.state_sensor = IpmiSensor(self.FAN_SENSOR_MAPPING[self.index]["State"], + is_discrete=True) + self.speed_sensor = IpmiSensor(self.FAN_SENSOR_MAPPING[self.index]["Speed"]) + self.fru = IpmiFru(self.FAN_FRU_MAPPING[self.fantrayindex]) + self.max_speed = 14600 + else: + self.dependency = dependency + self.fanindex = fan_index + self.state_sensor = IpmiSensor(self.PSU_FAN_SENSOR_MAPPING[self.fanindex]["State"], + is_discrete=True) + self.speed_sensor = IpmiSensor(self.PSU_FAN_SENSOR_MAPPING[self.fanindex]["Speed"]) + self.fru = IpmiFru(self.PSU_FRU_MAPPING[self.fanindex]) + self.fan_direction_offset = PSU_FAN_DIRECTION_OFFSET + self.max_speed = 29500 + + def get_name(self): + """ + Retrieves the name of the device + Returns: + String: The name of the device + """ + if self.is_psu_fan: + return "PSU{} Fan".format(self.fanindex) + else: + return "FanTray{}-Fan{}".format(self.fantrayindex, self.fanindex) + + def get_model(self): + """ + Retrieves the part number of the FAN + Returns: + String: Part number of FAN + """ + if self.is_psu_fan: + return None + else: + return self.fru.get_board_part_number() + + def get_serial(self): + """ + Retrieves the serial number of the FAN + Returns: + String: Serial number of FAN + """ + if self.is_psu_fan: + return None + else: + return self.fru.get_board_serial() + + def _get_tray_presence(self): + if self.is_psu_fan: + return self.dependency.get_presence() + else: + is_valid, state = self.prsnt_sensor.get_reading() + return ((state & 0b1) == 1) if is_valid else False + + def get_presence(self): + """ + Retrieves the presence of the FAN + Returns: + bool: True if fan is present, False if not + """ + return self._get_tray_presence() + + def get_status(self): + """ + Retrieves the operational status of the FAN + Returns: + bool: True if FAN is operating properly, False if not + """ + status = False + fan_speed_rpm = self.get_speed_rpm() + + if self.is_psu_fan and not self.dependency.get_status() or \ + fan_speed_rpm == 0: + return status + + is_valid, state = self.state_sensor.get_reading() + if is_valid: + if self.is_psu_fan and state & PSU_FAN_FAULT == 0: + status = True + elif state & FAN_FAULT == 0: + status = True + return status + + def get_direction(self): + """ + Retrieves the fan airfow direction + Returns: + A string, either FAN_DIRECTION_INTAKE or FAN_DIRECTION_EXHAUST + depending on fan direction + + Notes: + In DELL platforms, + - Forward/Exhaust : Air flows from Port side to Fan side. + - Reverse/Intake : Air flows from Fan side to Port side. + """ + direction = [self.FAN_DIRECTION_EXHAUST, self.FAN_DIRECTION_INTAKE] + fan_presence = self.get_presence() + if not fan_presence: + return None + is_valid, fan_direction = self.fru.get_fru_data(self.fan_direction_offset) + if is_valid: + try: + return direction[fan_direction[0]] + except IndexError: + pass + return None + + def get_speed(self): + """ + Retrieves the speed of the fan + Returns: + int: percentage of the max fan speed. + """ + is_valid, fan_speed = self.speed_sensor.get_reading() + if not is_valid: + return None + else: + speed = (100 * fan_speed)//self.max_speed + + return int(speed) + + def get_speed_rpm(self): + """ + Retrieves the speed of the fan + Returns: + int: fan speed in RPM + """ + is_valid, fan_speed = self.speed_sensor.get_reading() + return fan_speed if is_valid else None + + def set_status_led(self, color): + """ + Set led to expected color + Args: + color: A string representing the color with which to set the + fan module status LED + Returns: + bool: True if set success, False if fail. + """ + # Fan status LED controlled by BMC + # Return True to avoid thermalctld alarm + return True + + def get_status_led(self): + """ + Gets the state of the fan LED + Returns: + A string, one of the predefined STATUS_LED_COLOR_* strings above + """ + # Fan tray status LED controlled by BMC + return self.STATUS_LED_COLOR_OFF diff --git a/platform/broadcom/sonic-platform-modules-dell/z9864f/sonic_platform/fan_drawer.py b/platform/broadcom/sonic-platform-modules-dell/z9864f/sonic_platform/fan_drawer.py new file mode 100644 index 00000000000..42b6811b117 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/z9864f/sonic_platform/fan_drawer.py @@ -0,0 +1,114 @@ +#!/usr/bin/env python + +######################################################################## +# DELL Z9864F +# +# Module contains an implementation of SONiC Platform Base API and +# provides the Fan-Drawers' information available in the platform. +# +######################################################################## + +try: + from sonic_platform_base.fan_drawer_base import FanDrawerBase + from sonic_platform.fan import Fan + from sonic_platform.ipmihelper import IpmiFru +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +Z9864F_FANS_PER_FANTRAY = 2 + + +class FanDrawer(FanDrawerBase): + """DELL Platform-specific Fan class""" + + FAN_FRU_MAPPING = {1: 3, 2: 4, 3: 5, 4: 6} + def __init__(self, fantray_index): + + FanDrawerBase.__init__(self) + # FanTray is 1-based in DELL platforms + self.fantrayindex = fantray_index + 1 + for i in range(Z9864F_FANS_PER_FANTRAY): + self._fan_list.append(Fan(fantray_index, i)) + self.fru = IpmiFru(self.FAN_FRU_MAPPING[self.fantrayindex]) + + def get_name(self): + """ + Retrieves the fan drawer name + Returns: + string: The name of the device + """ + return "FanTray{}".format(self.fantrayindex) + + def get_presence(self): + """ + Retrieves the presence of the fan drawer + Returns: + bool: True if fan_tray is present, False if not + """ + return self.get_fan(0).get_presence() + + def get_model(self): + """ + Retrieves the part number of the fan drawer + Returns: + string: Part number of fan drawer + """ + return self.fru.get_board_part_number() + + def get_serial(self): + """ + Retrieves the serial number of the fan drawer + Returns: + string: Serial number of the fan drawer + """ + return self.fru.get_board_serial() + + def get_status(self): + """ + Retrieves the operational status of the fan drawer + Returns: + bool: True if fan drawer is operating properly, False if not + """ + status = True + for fan in self.get_all_fans(): + status &= fan.get_status() + return status + + def get_position_in_parent(self): + """ + Retrieves 1-based relative physical position in parent device. + Returns: + integer: The 1-based relative physical position in parent + device or -1 if cannot determine the position + """ + return self.fantrayindex + + def is_replaceable(self): + """ + Indicate whether this fan drawer is replaceable. + Returns: + bool: True if it is replaceable, False if not + """ + return True + + def set_status_led(self, color): + """ + Set led to expected color + Args: + color: A string representing the color with which to set the + fan module status LED + Returns: + bool: True if set success, False if fail. + """ + # Fan tray status LED controlled by BMC + # Return True to avoid thermalctld alarm + return True + + def get_maximum_consumed_power(self): + """ + Retrives the maximum power drawn by Fan Drawer + Returns: + A float, with value of the maximum consumable power of the + component. + """ + return 36.0 diff --git a/platform/broadcom/sonic-platform-modules-dell/z9864f/sonic_platform/hwaccess.py b/platform/broadcom/sonic-platform-modules-dell/z9864f/sonic_platform/hwaccess.py new file mode 100644 index 00000000000..2bf40ce00e3 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/z9864f/sonic_platform/hwaccess.py @@ -0,0 +1,112 @@ +# Helper functions to access hardware + +import os +import struct +import mmap +import subprocess + +PCI_VENDOR_LIST = ['0x1172', '0x1204'] + + +# Read FPGA sysfs + +def get_fpga_buspath(): + """ Get FPGA Bus Path """ + try: + return get_fpga_buspath.resource + except AttributeError: + for bus in (1, 2): + fname = '/sys/bus/pci/devices/0000:0{0}:00.0/subsystem_vendor'.format(bus) + if os.path.exists(fname): + try: + with open(fname, 'r') as source: + if source.read().strip() in PCI_VENDOR_LIST: + get_fpga_buspath.resource = \ + '/sys/bus/pci/devices/0000:0{0}:00.0/resource0'.format(bus) + return get_fpga_buspath.resource + except EnvironmentError: + pass + return None + +def get_smbus_i801_devnum(): + found = False + for devnum in range(2): + try: + with open(f"/sys/bus/i2c/devices/i2c-{devnum}/name", "r") as f: + devname = f.read().strip() + if devname.startswith("SMBus I801 adapter at "): + found = True + return devnum + except FileNotFoundError: + pass + + if not found: + print("Cannot find SMBus I801 number") + + +# Read PCI device + +def pci_mem_read(mm, offset): + mm.seek(offset) + read_data_stream = mm.read(4) + return struct.unpack('I',read_data_stream)[0] + +def pci_get_value(resource, offset): + with open(resource, 'r+b') as fd: + mm = mmap.mmap(fd.fileno(), 0) + val = pci_mem_read(mm, offset) + mm.close() + return val + +def pci_mem_write(memmap, offset, data): + """ Write PCI device """ + memmap.seek(offset) + memmap.write(struct.pack('I', data)) + +def pci_set_value(resource, val, offset): + """ Set a value to PCI device """ + with open(resource, 'w+b') as filed: + memmap = None + try: + memmap = mmap.mmap(filed.fileno(), 0) + pci_mem_write(memmap, offset, val) + except EnvironmentError: + pass + if memmap is not None: + memmap.close() + +# Read I2C device + +def i2c_get(bus, i2caddr, ofs): + try: + return int(subprocess.check_output(['/usr/sbin/i2cget', '-y', str(bus), str(i2caddr), str(ofs)]), 16) + except (FileNotFoundError, subprocess.CalledProcessError): + return -1 + +def io_reg_read(io_resource, offset): + fd = os.open(io_resource, os.O_RDONLY) + if fd < 0: + print('file open failed %s' % io_resource) + return -1 + if os.lseek(fd, offset, os.SEEK_SET) != offset: + print('lseek failed on %s' % io_resource) + return -1 + buf = os.read(fd, 1) + reg_val1 = ord(buf) + os.close(fd) + return reg_val1 + +def io_reg_write(io_resource, offset, val): + fd = os.open(io_resource, os.O_RDWR) + if fd < 0: + print('file open failed %s' % io_resource) + return False + if os.lseek(fd, offset, os.SEEK_SET) != offset: + print('lseek failed on %s' % io_resource) + return False + ret = os.write(fd, struct.pack('B', val)) + if ret != 1: + print('write failed %d' % ret) + return False + os.close(fd) + return True diff --git a/platform/broadcom/sonic-platform-modules-dell/z9864f/sonic_platform/platform.py b/platform/broadcom/sonic-platform-modules-dell/z9864f/sonic_platform/platform.py new file mode 100644 index 00000000000..fb2ea8abb48 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/z9864f/sonic_platform/platform.py @@ -0,0 +1,24 @@ +#!/usr/bin/env python +""" +############################################################################# +# +# Module contains an implementation of SONiC Platform Base API and +# provides the platform information +# +############################################################################# +""" +try: + from sonic_platform_base.platform_base import PlatformBase + from sonic_platform.chassis import Chassis +except ImportError as err: + raise ImportError(str(err) + "- required module not found") + + +class Platform(PlatformBase): + """ + DELL Platform-specific class + """ + + def __init__(self): + PlatformBase.__init__(self) + self._chassis = Chassis() diff --git a/platform/broadcom/sonic-platform-modules-dell/z9864f/sonic_platform/psu.py b/platform/broadcom/sonic-platform-modules-dell/z9864f/sonic_platform/psu.py new file mode 100644 index 00000000000..be7fe995e6d --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/z9864f/sonic_platform/psu.py @@ -0,0 +1,266 @@ +#!/usr/bin/env python +""" +######################################################################## +# DellEMC Z9864F +# +# Module contains an implementation of SONiC Platform Base API and +# provides the PSUs' information which are available in the platform +# +######################################################################## +""" + +try: + from sonic_platform_base.psu_base import PsuBase + from sonic_platform.ipmihelper import IpmiSensor, IpmiFru + from sonic_platform.fan import Fan +except ImportError as err: + raise ImportError(str(err) + "- required module not found") + +PSU_TYPE_OFFSET = 48 + +class Psu(PsuBase): + """DellEMC Platform-specific PSU class""" + + # { PSU-ID: { Sensor-Name: Sensor-ID } } + SENSOR_MAPPING = {1: {"State": 0x40, "Current": 0x4a, + "Power": 0x4b, "Voltage": 0x49, + "InCurrent": 0x43, "InPower": 0x44, + "InVoltage": 0x42, "Temperature": 0x48 }, + 2: {"State": 0x30, "Current": 0x3a, + "Power": 0x3b, "Voltage": 0x39, + "InCurrent": 0x33, "InPower": 0x34, + "InVoltage": 0x32, "Temperature": 0x38 } } + # ( PSU-ID: FRU-ID } + FRU_MAPPING = {1: 1, 2: 2} + + def __init__(self, psu_index): + PsuBase.__init__(self) + # PSU is 1-based in DellEMC platforms + self.index = psu_index + 1 + self.state_sensor = IpmiSensor(self.SENSOR_MAPPING[self.index]["State"], + is_discrete=True) + self.voltage_sensor = IpmiSensor(self.SENSOR_MAPPING[self.index]["Voltage"]) + self.current_sensor = IpmiSensor(self.SENSOR_MAPPING[self.index]["Current"]) + self.power_sensor = IpmiSensor(self.SENSOR_MAPPING[self.index]["Power"]) + self.input_voltage_sensor = IpmiSensor(self.SENSOR_MAPPING[self.index]["InVoltage"]) + self.input_current_sensor = IpmiSensor(self.SENSOR_MAPPING[self.index]["InCurrent"]) + self.input_power_sensor = IpmiSensor(self.SENSOR_MAPPING[self.index]["InPower"]) + self.temp_sensor = IpmiSensor(self.SENSOR_MAPPING[self.index]["Temperature"]) + self.psu_type_offset = PSU_TYPE_OFFSET + self.fru = IpmiFru(self.FRU_MAPPING[self.index]) + + self._fan_list.append(Fan(fan_index=self.index, psu_fan=True, + dependency=self)) + + def get_name(self): + """ + Retrieves the name of the device + + Returns: + string: The name of the device + """ + return "PSU{}".format(self.index) + + def get_presence(self): + """ + Retrieves the presence of the Power Supply Unit (PSU) + + Returns: + bool: True if PSU is present, False if not + """ + presence = False + is_valid, state = self.state_sensor.get_reading() + if is_valid: + if state & 0b1: + presence = True + + return presence + + def get_temperature(self): + """ + Retrieves current temperature reading from thermal + + Returns: + A float number of current temperature in Celcius up to + nearest thousandth of one degree celcius, e.g. 30.125 + """ + is_valid, temperature = self.temp_sensor.get_reading() + if not is_valid: + temperature = 0 + + return float(temperature) + + def get_model(self): + """ + Retrieves the part number of the PSU + + Returns: + string: Part number of PSU + """ + return self.fru.get_board_part_number() + + def get_serial(self): + """ + Retrieves the serial number of the PSU + + Returns: + string: Serial number of PSU + """ + return self.fru.get_board_serial() + + def get_status(self): + """ + Retrieves the operational status of the PSU + + Returns: + bool: True if PSU is operating properly, False if not + """ + status = False + is_valid, state = self.state_sensor.get_reading() + if is_valid: + if (state <= 0x01): + status = True + return status + + def get_voltage(self): + """ + Retrieves current PSU voltage output + + Returns: + A float number, the output voltage in volts, + e.g. 12.1 + """ + is_valid, voltage = self.voltage_sensor.get_reading() + if not is_valid: + return None + + return "{:.1f}".format(voltage) + + def get_current(self): + """ + Retrieves present electric current supplied by PSU + + Returns: + A float number, electric current in amperes, + e.g. 15.4 + """ + is_valid, current = self.current_sensor.get_reading() + if not is_valid: + return None + + return "{:.1f}".format(current) + + def get_power(self): + """ + Retrieves current energy supplied by PSU + + Returns: + A float number, the power in watts, + e.g. 302.6 + """ + is_valid, power = self.power_sensor.get_reading() + if not is_valid: + return None + + return "{:.1f}".format(power) + + def get_input_voltage(self): + """ + Retrieves current PSU voltage input + + Returns: + A float number, the input voltage in volts, + e.g. 12.1 + """ + is_valid, input_voltage = self.input_voltage_sensor.get_reading() + if not is_valid: + return None + + return "{:.1f}".format(input_voltage) + + def get_input_current(self): + """ + Retrieves present electric current supplied to PSU + + Returns: + A float number, electric current in amperes, + e.g. 15.4 + """ + is_valid, input_current = self.input_current_sensor.get_reading() + if not is_valid: + return None + + return "{:.1f}".format(input_current) + + def get_input_power(self): + """ + Retrieves current energy supplied to PSU + + Returns: + A float number, the power in watts, + e.g. 302.6 + """ + is_valid, input_power = self.input_power_sensor.get_reading() + if not is_valid: + return None + + return "{:.1f}".format(input_power) + + def get_powergood_status(self): + """ + Retrieves the powergood status of PSU + + Returns: + A boolean, True if PSU has stablized its output voltages and + passed all its internal self-tests, False if not. + """ + status = False + is_valid, state = self.state_sensor.get_reading() + if is_valid: + if state == 0x01: + status = True + + return status + + def get_mfr_id(self): + """ + Retrives the Manufacturer Id of PSU + + Returns: + A string, the manunfacturer id. + """ + return self.fru.get_board_mfr_id() + + def get_type(self): + """ + Retrives the Power Type of PSU + + Returns : + A string, PSU power type + """ + if not self.get_presence(): + return None + + psu_type = ['AC', 'DC'] + try: + is_valid, ct_psu_type = self.fru.get_fru_data(self.psu_type_offset) + if is_valid: + return psu_type[ct_psu_type[0]] + except IndexError: + pass + + return None + + def get_status_led(self): + """ + Gets the state of the PSU LED + Returns: + A string, one of the predefined STATUS_LED_COLOR_* strings + """ + if self.get_presence() == True: + if self.get_status() == True: + return self.STATUS_LED_COLOR_GREEN + else: + return self.STATUS_LED_COLOR_AMBER + + return 'N/A' diff --git a/platform/broadcom/sonic-platform-modules-dell/z9864f/sonic_platform/sfp.py b/platform/broadcom/sonic-platform-modules-dell/z9864f/sonic_platform/sfp.py new file mode 100644 index 00000000000..3ca6a9256b9 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/z9864f/sonic_platform/sfp.py @@ -0,0 +1,546 @@ +#!/usr/bin/env python +""" +############################################################################# +# DELLEMC Z9864F +# +# Module contains an implementation of SONiC Platform Base API and +# provides the platform information +# +############################################################################# +""" + +try: + import os + import sys + import smbus2 + import time + import mmap + from sonic_platform_base.sonic_xcvr.sfp_optoe_base import SfpOptoeBase + from sonic_platform.hwaccess import get_fpga_buspath + +except ImportError as err: + raise ImportError(str(err) + "- required module not found") + +QSFP_INFO_OFFSET = 128 +SFP_INFO_OFFSET = 0 +QSFP_DD_PAGE0 = 0 + +SFP_TYPE_LIST = [ + '0x3' # SFP/SFP+/SFP28 and later +] +QSFP_TYPE_LIST = [ + '0x0c', # QSFP + '0x0d', # QSFP+ or later + '0x11' # QSFP28 or later +] +QSFP_DD_TYPE_LIST = [ + '0x18' #QSFP_DD Type +] + +OSFP_TYPE_LIST = [ + '0x19' # OSFP 8X Type +] + +PORT_CPLD_I2C_BUS = 600 + +PORT_CPLD_A_ADDR = 0x41 +PORT_PRES_01_08_OFFSET = 0x10 +PORT_PRES_09_16_OFFSET = 0x11 +PORT_PRES_33_40_OFFSET = 0x12 +PORT_PRES_41_48_OFFSET = 0x13 + +PORT_CPLD_B_ADDR = 0x45 +PORT_PRES_17_24_OFFSET = 0x10 +PORT_PRES_25_32_OFFSET = 0x11 +PORT_PRES_49_56_OFFSET = 0x12 +PORT_PRES_57_64_OFFSET = 0x13 + +PORT_PRES_01_08_VAL = 0xff +PORT_PRES_09_16_VAL = 0xff +PORT_PRES_17_24_VAL = 0xff +PORT_PRES_25_32_VAL = 0xff +PORT_PRES_33_40_VAL = 0xff +PORT_PRES_41_48_VAL = 0xff +PORT_PRES_49_56_VAL = 0xff +PORT_PRES_57_64_VAL = 0xff + +PORT_PRES_65_66_VAL = 0xff +PORT_PRES_65_66_OFFSET = 0x18 + +PORT_START = 1 +PORT_END = 66 +AUX_PORT_START = 65 + +''' +holds CPLD locations for LPmode configuration. each item is range of ports address is for, +the other two are cpld address and offset to the byte for the port +''' +LPMODE_MAP = [ + (range(1, 9), PORT_CPLD_A_ADDR, 0x44), + (range(9, 17), PORT_CPLD_A_ADDR, 0x45), + (range(17, 25), PORT_CPLD_B_ADDR, 0x44), + (range(25, 33), PORT_CPLD_B_ADDR, 0x45), + (range(33, 41), PORT_CPLD_A_ADDR, 0x46), + (range(41, 49), PORT_CPLD_A_ADDR, 0x47), + (range(49, 57), PORT_CPLD_B_ADDR, 0x46), + (range(57, AUX_PORT_START), PORT_CPLD_B_ADDR, 0x47), +] + +_port_to_i2c_mapping = { + 1: 2, + 2: 3, + 3: 4, + 4: 5, + 5: 6, + 6: 7, + 7: 8, + 8: 9, + 9: 10, + 10: 11, + 11: 12, + 12: 13, + 13: 14, + 14: 15, + 15: 16, + 16: 17, + 17: 18, + 18: 19, + 19: 20, + 20: 21, + 21: 22, + 22: 23, + 23: 24, + 24: 25, + 25: 26, + 26: 27, + 27: 28, + 28: 29, + 29: 30, + 30: 31, + 31: 32, + 32: 33, + 33: 35, + 34: 34, + 35: 37, + 36: 36, + 37: 39, + 38: 38, + 39: 41, + 40: 40, + 41: 43, + 42: 42, + 43: 45, + 44: 44, + 45: 47, + 46: 46, + 47: 49, + 48: 48, + 49: 51, + 50: 50, + 51: 53, + 52: 52, + 53: 55, + 54: 54, + 55: 57, + 56: 56, + 57: 59, + 58: 58, + 59: 61, + 60: 60, + 61: 63, + 62: 62, + 63: 65, + 64: 64, + 65: 66, + 66: 67, + } + + + +class Sfp(SfpOptoeBase): + """ + DELLEMC Platform-specific Sfp class + """ + BASE_RES_PATH = get_fpga_buspath() + + def __init__(self, index, sfp_type, eeprom_path): + """ + SFP Dunder init + """ + SfpOptoeBase.__init__(self) + self.index = index + self.eeprom_path = eeprom_path + #port_type is the native port type and sfp_type is the transceiver type + #sfp_type will be detected in get_transceiver_info + self.port_type = sfp_type + self.sfp_type = self.port_type + self.bus = smbus2.SMBus(PORT_CPLD_I2C_BUS) + self._initialize_media(delay=False) + + def get_eeprom_path(self): + """ + Returns SFP eeprom path + """ + return self.eeprom_path + + def get_name(self): + """ + Returns native transceiver type + """ + return "QSFP-DD Double Density 8X Pluggable Transceiver" if self.index < 65 else "SFP/SFP+/SFP28" + + @staticmethod + def pci_mem_read(mem, offset): + """ + Returns the desired byte in PCI memory space + """ + mem.seek(offset) + return mem.read_byte() + + + @staticmethod + def pci_mem_write(mem, offset, data): + """ + Writes the desired byte in PCI memory space + """ + mem.seek(offset) + # print "data to write:%x"%data + mem.write_byte(data) + + def pci_set_value(self, resource, val, offset): + """ + Sets the value in PCI memory space + """ + filed = os.open(resource, os.O_RDWR) + mem = mmap.mmap(filed, 0) + self.pci_mem_write(mem, offset, val) + mem.close() + os.close(filed) + return val + + def pci_get_value(self, resource, offset): + """ + Retrieves the value from PCI memory space + """ + filed = os.open(resource, os.O_RDWR) + mem = mmap.mmap(filed, 0) + val = self.pci_mem_read(mem, offset) + mem.close() + os.close(filed) + return val + + def _initialize_media(self, delay=False): + """ + Initialize the media type and eeprom driver for SFP + """ + if delay: + time.sleep(1) + self._xcvr_api = None + self.get_xcvr_api() + + self.set_media_type() + self.reinit_sfp_driver() + + def get_presence(self): + + try: + port_offset = 0xff + mask = 0 + if self.index in range(PORT_START, 9): + port_offset = self.bus.read_byte_data(PORT_CPLD_A_ADDR, PORT_PRES_01_08_OFFSET) + elif self.index in range(9, 17): + port_offset = self.bus.read_byte_data(PORT_CPLD_A_ADDR, PORT_PRES_09_16_OFFSET) + elif self.index in range(17, 25): + port_offset = self.bus.read_byte_data(PORT_CPLD_B_ADDR, PORT_PRES_17_24_OFFSET) + elif self.index in range(25, 33): + port_offset = self.bus.read_byte_data(PORT_CPLD_B_ADDR, PORT_PRES_25_32_OFFSET) + elif self.index in range(33, 41): + port_offset = self.bus.read_byte_data(PORT_CPLD_A_ADDR, PORT_PRES_33_40_OFFSET) + elif self.index in range(41, 49): + port_offset = self.bus.read_byte_data(PORT_CPLD_A_ADDR, PORT_PRES_41_48_OFFSET) + elif self.index in range(49, 57): + port_offset = self.bus.read_byte_data(PORT_CPLD_B_ADDR, PORT_PRES_49_56_OFFSET) + elif self.index in range(57, AUX_PORT_START): + port_offset = self.bus.read_byte_data(PORT_CPLD_B_ADDR, PORT_PRES_57_64_OFFSET) + elif self.index in range(AUX_PORT_START, PORT_END+1): + port_offset = self.bus.read_byte_data(PORT_CPLD_A_ADDR, PORT_PRES_65_66_OFFSET) + else: + sys.stderr.write("Port index {} out of range (1-{})\n".format(self.index, PORT_END)) + return False + + reg_value = port_offset + if self.index in range(PORT_START, AUX_PORT_START): + mask = (1 << ((self.index - 1) % 8)) + elif self.index in range(AUX_PORT_START, PORT_END+1): + if self.index == AUX_PORT_START: + mask = (1 << 0) + else: + mask = (1 << 4) + else: + sys.stderr.write("Port index {} out of range (1-{})\n".format(self.index, PORT_END)) + return False + + if (reg_value & mask) == 0: + return True + + return False + except Exception as e: + sys.stderr.write(f"Error reading port presence: {e}\n") + return False + + def get_reset_status(self): + """ + Retrives the reset status of SFP + """ + reset_status = False + try: + if self.port_type == 'QSFP_DD': + # Port offset starts with 0x4000 + port_offset = 16384 + ((self.index-1) * 16) + + status = self.pci_get_value(self.BASE_RES_PATH, port_offset) + reg_value = int(status) + + # Mask off 4th bit for reset status + mask = (1 << 4) + reset_status = not (reg_value & mask) + except ValueError: + pass + + return reset_status + + def reset(self): + """ + Reset the SFP and returns all user settings to their default state + """ + try: + if self.port_type == 'QSFP_DD': + # Port offset starts with 0x4000 + port_offset = 16384 + ((self.index-1) * 16) + + status = self.pci_get_value(self.BASE_RES_PATH, port_offset) + reg_value = int(status) + + # Mask off 4th bit for reset + mask = (1 << 4) + + # ResetL is active low + reg_value = reg_value & ~mask + + # Convert our register value back to a hex string and write back + self.pci_set_value(self.BASE_RES_PATH, reg_value, port_offset) + + # Sleep 1 second to allow it to settle + time.sleep(1) + + reg_value = reg_value | mask + + # Convert our register value back to a hex string and write back + self.pci_set_value(self.BASE_RES_PATH, reg_value, port_offset) + else: + return False + except ValueError: + return False + return True + + + def get_intl_state(self): + """ Sets the intL (interrupt; active low) pin of this SFP """ + intl_state = True + try: + if self.sfp_type in ['QSFP_DD', 'OSFP']: + # Port offset starts with 0x4004 + port_offset = 16388 + ((self.index-1) * 16) + + status = self.pci_get_value(self.BASE_RES_PATH, port_offset) + reg_value = int(status) + + # Mask off 4th bit for intL + mask = (1 << 4) + + intl_state = (reg_value & mask) + except ValueError: + pass + return intl_state + + def set_media_type(self): + """ + Reads optic eeprom byte to determine media type inserted + """ + eeprom_raw = [] + eeprom_raw = self._xcvr_api_factory._get_id() + if eeprom_raw is not None: + eeprom_raw = hex(eeprom_raw) + if eeprom_raw in SFP_TYPE_LIST: + self.sfp_type = 'SFP' + elif eeprom_raw in QSFP_TYPE_LIST: + self.sfp_type = 'QSFP' + elif eeprom_raw in QSFP_DD_TYPE_LIST: + self.sfp_type = 'QSFP_DD' + elif eeprom_raw in OSFP_TYPE_LIST: + self.sfp_type = 'OSFP' + else: + #Set native port type if EEPROM type is not recognized/readable + self.sfp_type = self.port_type + else: + self.sfp_type = self.port_type + + return self.sfp_type + + def reinit_sfp_driver(self): + """ + Changes the driver based on media type detected + """ + + i2c_bus = _port_to_i2c_mapping[self.index] + del_sfp_path = "/sys/bus/i2c/devices/i2c-{0}/delete_device".format(i2c_bus) + new_sfp_path = "/sys/bus/i2c/devices/i2c-{0}/new_device".format(i2c_bus) + driver_path = "/sys/bus/i2c/devices/i2c-{0}/{0}-0050/name".format(i2c_bus) + + if not os.path.isfile(driver_path): + print(driver_path, "does not exist") + return False + + try: + with os.fdopen(os.open(driver_path, os.O_RDONLY)) as filed: + driver_name = filed.read() + driver_name = driver_name.rstrip('\r\n') + driver_name = driver_name.lstrip(" ") + + #Avoid re-initialization of the QSFP/SFP optic on QSFP/SFP port. + if self.sfp_type == 'SFP' and driver_name in ['optoe1', 'optoe3']: + with open(del_sfp_path, 'w') as f: + f.write('0x50\n') + time.sleep(0.2) + with open(new_sfp_path, 'w') as f: + f.write('optoe2 0x50\n') + time.sleep(2) + elif self.sfp_type == 'QSFP' and driver_name in ['optoe2', 'optoe3']: + with open(del_sfp_path, 'w') as f: + f.write('0x50\n') + time.sleep(0.2) + with open(new_sfp_path, 'w') as f: + f.write('optoe1 0x50\n') + time.sleep(2) + elif self.sfp_type == 'QSFP_DD' and driver_name in ['optoe1', 'optoe2']: + with open(del_sfp_path, 'w') as f: + f.write('0x50\n') + time.sleep(0.2) + with open(new_sfp_path, 'w') as f: + f.write('optoe3 0x50\n') + time.sleep(2) + + except IOError as err: + print("Error: Unable to open file: %s" %str(err)) + return False + + return True + + def get_position_in_parent(self): + """ + Retrieves 1-based relative physical position in parent device. + Returns: + integer: The 1-based relative physical position in parent + device or -1 if cannot determine the position + """ + return self.index + + @staticmethod + def is_replaceable(): + """ + Indicate whether this device is replaceable. + Returns: + bool: True if it is replaceable. + """ + return True + + def get_error_description(self): + """ + Retrives the error descriptions of the SFP module + + Returns: + String that represents the current error descriptions of vendor specific errors + In case there are multiple errors, they should be joined by '|', + like: "Bad EEPROM|Unsupported cable" + """ + if not self.get_presence(): + return self.SFP_STATUS_UNPLUGGED + else: + if not os.path.isfile(self.eeprom_path): + return "EEPROM driver is not attached" + + if self.sfp_type == 'SFP': + offset = SFP_INFO_OFFSET + elif self.sfp_type == 'QSFP': + offset = QSFP_INFO_OFFSET + elif self.sfp_type == 'QSFP_DD': + offset = QSFP_DD_PAGE0 + + try: + with open(self.eeprom_path, mode="rb", buffering=0) as eeprom: + eeprom.seek(offset) + eeprom.read(1) + except OSError as e: + return "EEPROM read failed ({})".format(e.strerror) + + return self.SFP_STATUS_OK + + def get_cpld_lpmode_location(self): + ''' + Returns the location for this SFP's low power mode setting in CPLD registers. + Returns: + A tuple of (cpld_addr, register_offset, port_offset). the CLPD device address, + the offset to the byte that contains this port, and the offset within that byte + ''' + + for port_range, cpld_addr, register_offset in LPMODE_MAP: + if self.index in port_range: + return cpld_addr, register_offset, (self.index - 1) % 8 + sys.stderr.write("Port index {} out of range (1-{})\n".format(self.index, AUX_PORT_START)) + return None, None, None + + def set_lpmode(self, lpmode): + ''' + Sets low power mode bit in CPLD for this port's transceiver. + :param bool lpmode: True to enable low power mode, False to disable + Returns: + A boolean, True if lpmode is set successfully, False if not + ''' + cpld_addr, register_offset, port_offset = self.get_cpld_lpmode_location() + if cpld_addr is None: + return False + try: + # cpld and offset are found, and port index is validated in range + existing_val = self.bus.read_byte_data(cpld_addr, register_offset) + mask = (1 << port_offset) + + # 9864 specs, low power mode on means set to 0 + reg_value = (existing_val & ~mask) if lpmode else (existing_val | mask) + + self.bus.write_byte_data(cpld_addr, register_offset, reg_value) + return True + except IOError: + sys.stderr.write("Error accessing I2C device for Port index {} )\n".format(self.index)) + return False + + def get_lpmode(self): + ''' + Returns whether this SFP is in low power mode from CPLD. False if there's any exceptions. + Returns: + A boolean, True if lpmode is true, False if not + ''' + try: + cpld_addr, register_offset, port_offset = self.get_cpld_lpmode_location() + if cpld_addr is None: + return False + + existing_byte = self.bus.read_byte_data(cpld_addr, register_offset) + mask = (1 << port_offset) + + # 9864 specs, low power mode on means set to 0 + if (existing_byte & mask) == 0: + return True + return False + except Exception as e: + sys.stderr.write(f"Error reading port presence: {e}\n") + return False diff --git a/platform/broadcom/sonic-platform-modules-dell/z9864f/sonic_platform/thermal.py b/platform/broadcom/sonic-platform-modules-dell/z9864f/sonic_platform/thermal.py new file mode 100644 index 00000000000..ff7b6d5ed51 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/z9864f/sonic_platform/thermal.py @@ -0,0 +1,187 @@ +#!/usr/bin/env python +""" +######################################################################## +# DELL Z9864F +# +# Module contains an implementation of SONiC Platform Base API and +# provides the Thermals' information which are available in the platform +# +######################################################################## +""" + +try: + from sonic_platform_base.thermal_base import ThermalBase + from sonic_platform.ipmihelper import IpmiSensor +except ImportError as err: + raise ImportError(str(err) + "- required module not found") + + +class Thermal(ThermalBase): + """DELL Platform-specific Thermal class""" + + # [ Sensor-Name, Sensor-ID ] + SENSOR_MAPPING = [ + ['CPU Temp', 0xd], + ['NPU Temp', 0xb], + ['NPU Rear Temp', 0x0], + ['INLET Left Temp', 0x4], + ['INLET Right Temp', 0x1], + ['OUTLET Left Temp', 0x5], + ['OUTLET Right Temp', 0x7], + ['OSFP Rear Temp', 0x2], + ['CPUCD Front Temp', 0x6], + ['PSU1 AF Temp', 0x46], + ['PSU1 MID Temp', 0x47], + ['PSU1 Rear Temp', 0x48], + ['PSU2 AF Temp', 0x36], + ['PSU2 MID Temp', 0x37], + ['PSU2 Rear Temp', 0x38], + ] + + def __init__(self, thermal_index, name=None, parent=None): + ThermalBase.__init__(self) + self.index = thermal_index + 1 + self.sensor = None + if name is None: + self.sensor = IpmiSensor(self.SENSOR_MAPPING[self.index - 1][1]) + self.sensor_name = name + self.parent = parent + self.sensor_val = 0 + self.sensor_fail_count = 0 + + def get_name(self): + """ + Retrieves the name of the thermal + + Returns: + string: The name of the thermal + """ + if self.sensor_name is not None: + return self.sensor_name + return self.SENSOR_MAPPING[self.index - 1][0] + + def get_temperature(self): + """ + Retrieves current temperature reading from thermal + + Returns: + A float number of current temperature in Celsius up to + nearest thousandth of one degree Celsius, e.g. 30.125 + """ + temperature = 0 + # checking to see if SFP and getting its temperature + if self.parent is not None: + if self.parent.get_presence(): + data = self.parent.get_transceiver_temperature() + temperature = data.replace("C", "") + if temperature == 'N/A': + temperature = float(0) + else: + is_valid, temperature = self.sensor.get_reading() + if not is_valid or float(temperature) == float(0): + if self.sensor_fail_count < 2: + self.sensor_fail_count = (self.sensor_fail_count + 1) + temperature = self.sensor_val + else: + temperature = 0 + else: + self.sensor_fail_count = 0 + self.sensor_val = temperature + + return float(temperature) + + def get_high_threshold(self): + """ + Retrieves the high threshold temperature of thermal + + Returns: + A float number, the high threshold temperature of thermal in + Celsius up to nearest thousandth of one degree Celsius, + e.g. 30.125 + """ + # checking to see if SFP and reading its high threshold value + if self.parent is not None: + data = self.parent.get_transceiver_threshold_info() + high_threshold = data.get("temphighwarning", "0").replace("C", "") + if high_threshold == 'N/A': + high_threshold = float(100) + return float(high_threshold) + + is_valid, high_threshold = self.sensor.get_threshold("UpperNonCritical") + if not is_valid: + return super(Thermal, self).get_high_threshold() + + return float(high_threshold) + + def get_high_critical_threshold(self): + """ + Retrieves the high critical threshold temperature of thermal + + Returns: + A float number, the high critical threshold temperature of thermal in + Celsius up to nearest thousandth of one degree Celsius, + e.g. 30.125 + """ + # checking to see if SFP and getting its high critical threshold value + if self.parent is not None: + data = self.parent.get_transceiver_threshold_info() + high_crit_threshold = data.get("temphighalarm", "0").replace("C", "") + if high_crit_threshold == 'N/A': + high_crit_threshold = float(1000) + return float(high_crit_threshold) + + is_valid, high_crit_threshold = self.sensor.get_threshold("UpperCritical") + if not is_valid: + return super(Thermal, self).get_high_critical_threshold() + + return float(high_crit_threshold) + + def get_low_threshold(self): + """ + Retrieves the low threshold temperature of thermal + + Returns: + A float number, the low threshold temperature of thermal in + Celsius up to nearest thousandth of one degree Celsius, + e.g. 30.125 + """ + if self.sensor is None: + return float(0) + + is_valid, low_threshold = self.sensor.get_threshold("LowerNonRecoverable") + if not is_valid: + low_threshold = 0 + + return float(low_threshold) + + @staticmethod + def set_high_threshold(temperature): + """ + Sets the high threshold temperature of thermal + + Args : + temperature: A float number up to nearest thousandth of one + degree Celsius, e.g. 30.125 + Returns: + A boolean, True if threshold is set successfully, False if + not + """ + del temperature + # Thermal threshold values are pre-defined based on HW. + return False + + @staticmethod + def set_low_threshold(temperature): + """ + Sets the low threshold temperature of thermal + + Args : + temperature: A float number up to nearest thousandth of one + degree Celsius, e.g. 30.125 + Returns: + A boolean, True if threshold is set successfully, False if + not + """ + del temperature + # Thermal threshold values are pre-defined based on HW. + return False diff --git a/platform/broadcom/sonic-platform-modules-dell/z9864f/sonic_platform/watchdog.py b/platform/broadcom/sonic-platform-modules-dell/z9864f/sonic_platform/watchdog.py new file mode 100644 index 00000000000..eeca792b55f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/z9864f/sonic_platform/watchdog.py @@ -0,0 +1,509 @@ +#!/usr/bin/env python3 + +######################################################################################### +# +# This module implements the Watchdog APIs for Dell Platforms in SONiC +# +# A Dell Watchdog is instantiated in one of the 3 modes: +# MODE_I2C where the WD register is accessed Directly over I2C +# (Z9XXX/S52XX Programmable logic Design Doc Section 3.1.2.8 SYS_WD: Offset: 0x07) +# MODE_CPLD where the WD register is accessed via a CPLD driver +# (N16XX/N22XX/N32XX CPLD Register Specification Section 3.1.1.8 SYS_WD: Offset: 0x07) +# MODE_PCIE where the WD register is accessed over PCIe IO mapped registers +# (Z9332 Base Board CPLD Design Specification : WD registers Sections 7.2.40-43) +# +# Chassis init for a platform (which typically instantiates the Watchdog), is required to +# provide a watchdog_spec that contain common and mode specific keys: +# Common Keys: +# timers : A list of supported timers on the Platform in seconds (float) +# check_cpld_version : check a minimum CPLD version that supports a Watchdog (boolean) +# mode : MODE_I2C/MODE_CPLD/MODE_PCIE +# Keys specific to MODE_I2C: +# i2c_bus : the i2c bus on which the CPLD (with WD register) is to be found (int) +# i2c_addr : the i2c address of the CPLD (with WD register) (hex) +# wd_reg : The WD register address (hex) +# Keys specific to MODE_CPLD: +# cpld_dir : The sysfs path to the CPLD registers (string) +# cpld_reg_name : The WD CPLD register name (string) +# Keys specific to MODE_PCIE: +# io_resource : The dev path to the IO mapped resource (string) +# io_wd_timer_offset_reg : WD timer register address (hex) +# io_wd_status_offset_reg : WD status register address (hex) +# io_wd_timer_punch_offset_reg : WD punch register address (hex) +# +######################################################################################### + +try: + import ctypes + import subprocess + import syslog + import logging + import logging.handlers + from logging import DEBUG, INFO, WARNING, ERROR + import time + import inspect + from multiprocessing import Lock + import sonic_platform.component as Component + from sonic_platform_base.watchdog_base import WatchdogBase +except ImportError as err: + raise ImportError(str(err) + "- required module not found") + +try: + from sonic_platform.hwaccess import io_reg_read, io_reg_write +except ImportError as err: + pass + +MODE_INVALID = 0 +MODE_I2C = 1 +MODE_CPLD = 2 +MODE_PCIE = 3 + +MAX_WD_SOCK_BUFSIZE = 1024 +SET_CONFIRM_DELAY = 0.01 # in seconds + +WATCHDOG_LOG_FILE = "/var/log/watchdog.log" +WATCHDOG_LOG_PUNCH_INTERVAL = 6 # log every 30 secs + +class _timespec(ctypes.Structure): + _fields_ = [ + ('tv_sec', ctypes.c_long), + ('tv_nsec', ctypes.c_long) + ] + +# Functions to get the Watchdog timer, enable and punch fields from a single SYS_WD register +# Supports access directly over I2C (MODE_I2C) or thru a CPLD (MODE_CPLD) + +class HwAccessFields(): + mode = MODE_INVALID + # MODE_I2C access specification: + i2c_get_cmd = "" + i2c_set_cmd = "" + # MODE_CPLD access specification: + cpld_reg_file = "" + + def __init__(self, watchdog_spec): + if watchdog_spec['mode'] == 'MODE_I2C': + self.mode = MODE_I2C + self.i2c_get_cmd = "/usr/sbin/i2cget -y {0} {1} {2}".format(watchdog_spec['i2c_bus'], hex(watchdog_spec['i2c_addr']), hex(watchdog_spec['wd_reg'])) + self.i2c_set_cmd = "/usr/sbin/i2cset -y {0} {1} {2} %s".format(watchdog_spec['i2c_bus'], hex(watchdog_spec['i2c_addr']), hex(watchdog_spec['wd_reg'])) + elif watchdog_spec['mode'] == 'MODE_CPLD': + self.mode = MODE_CPLD + self.cpld_reg_file = watchdog_spec['cpld_dir'] + '/' + watchdog_spec['cpld_reg_name'] + + def _get_i2c_command_result(self, cmdline): + try: + proc = subprocess.Popen(cmdline.split(), stdout=subprocess.PIPE, + stderr=subprocess.STDOUT, universal_newlines=True) + stdout = proc.communicate()[0] + proc.wait() + return stdout.rstrip('\n') + except OSError: + return -1 + + def _get_cpld_register(self, reg_file): + try: + with open(reg_file, 'r') as file_desc: + ret_val = file_desc.read() + except IOError: + return -1 + + return ret_val.strip('\r\n').lstrip(' ') + + def _get_reg_val(self): + if self.mode == MODE_I2C: + value = self._get_i2c_command_result(self.i2c_get_cmd) + elif self.mode == MODE_CPLD: + value = self._get_cpld_register(self.cpld_reg_file).strip() + + return int(value, 16) + + def get_wd_timer(self): + ret = self._get_reg_val() + return -1 if ret == -1 else (ret >> 4) & 0xf + + def get_wd_en(self): + ret = self._get_reg_val() + return -1 if ret == -1 else (ret >> 3) & 1 + + def _set_cpld_register(self, reg_file, value): + try: + with open(reg_file, 'w') as file_desc: + return file_desc.write(str(value)) + except IOError: + return -1 + + def _set_reg_val(self, val): + if self.mode == MODE_I2C: + return self._get_i2c_command_result(self.i2c_set_cmd % (val)) + + if self.mode == MODE_CPLD: + return self._set_cpld_register(self.cpld_reg_file, val) + + return -1 + + def set_wd_timer(self, timer): + reg = self._get_reg_val() + return self._set_reg_val((reg & 0xF) | ((timer & 0xF) << 4)) + + def set_wd_en(self, enable): + reg = self._get_reg_val() + return self._set_reg_val((reg & 0xF7) | ((enable & 0x1) << 3)) + + def set_wd_punch(self, punch): + reg = self._get_reg_val() + return self._set_reg_val((reg & 0xFE) | (punch & 0x1)) + + def dump(self): + resp = "mode: {}\n".format(self.mode) + if self.mode == MODE_I2C: + resp += "i2c_get_cmd: {}\n".format(self.i2c_get_cmd) + resp += "i2c_set_cmd: {}\n".format(self.i2c_set_cmd) + elif self.mode == MODE_CPLD: + resp += "cpld_reg_file: {}\n".format(self.cpld_reg_file) + + resp += "wd reg: {}\n".format(bin(self._get_reg_val())) + return resp + +# Functions to get the Watchdog timer, enable and punch from individual watchdog function registers +# Supports register access over PCIe io mapped registers (MODE_PCIE) + +class HwAccessRegisters(): + # MODE_PCIE access specification: + io_resource = "" + io_wd_timer_offset_reg = 0x0 + io_wd_status_offset_reg = 0x0 + io_wd_timer_punch_offset_reg = 0x0 + + def __init__(self, watchdog_spec): + self.mode = MODE_PCIE + self.io_resource = watchdog_spec['io_resource'] + self.io_wd_timer_offset_reg = watchdog_spec['io_wd_timer_offset_reg'] + self.io_wd_status_offset_reg = watchdog_spec['io_wd_status_offset_reg'] + self.io_wd_timer_punch_offset_reg = watchdog_spec['io_wd_timer_punch_offset_reg'] + + def get_wd_timer(self): + return io_reg_read(self.io_resource, self.io_wd_timer_offset_reg) + + def get_wd_en(self): + return io_reg_read(self.io_resource, self.io_wd_status_offset_reg) + + def set_wd_timer(self, timer): + ret = io_reg_write(self.io_resource, self.io_wd_timer_offset_reg, timer & 0xF) + return -1 if ret == False else ret + + def set_wd_en(self, enable): + ret = io_reg_write(self.io_resource, self.io_wd_status_offset_reg, enable & 0x1) + return -1 if ret == False else ret + + def set_wd_punch(self, punch): + ret = io_reg_write(self.io_resource, self.io_wd_timer_punch_offset_reg, punch & 0x1) + return -1 if ret == False else ret + + def dump(self): + resp = "mode: {}\n".format(self.mode) + resp += "io_resource: {}\n".format(self.io_resource) + resp += "io_wd_timer_offset_reg: {} io_wd_status_offset_reg: {}\n".format(hex(self.io_wd_timer_offset_reg), hex(self.io_wd_status_offset_reg)) + resp += "io_wd_timer_punch_offset_reg: {}\n".format(hex(self.io_wd_timer_punch_offset_reg)) + resp += "wd timer ({}): {}\n".format(hex(self.io_wd_timer_offset_reg), bin(io_reg_read(self.io_resource, self.io_wd_timer_offset_reg))) + resp += "wd en ({}): {}\n".format(hex(self.io_wd_status_offset_reg), bin(io_reg_read(self.io_resource, self.io_wd_status_offset_reg))) + resp += "wd timer punch ({}): {}\n".format(hex(self.io_wd_timer_punch_offset_reg), bin(io_reg_read(self.io_resource, self.io_wd_timer_punch_offset_reg))) + return resp + +# Logger to track if Watchdog is active +class WdLogger(): + + logger = None + log_file = None + + def __init__(self): + self.logger = logging.getLogger('watchdog') + self.logger.setLevel(logging.DEBUG) + self.logger.propagate = False + self.log_file = logging.FileHandler(WATCHDOG_LOG_FILE) + self.log_file.setFormatter(logging.Formatter('%(asctime)s %(levelname)s: %(message)s')) + self.log_file.setLevel(DEBUG) + self.logger.addHandler(self.log_file) + + def log(self, level, msg, *args, **kwargs): + self.logger.log(level, msg, *args, **kwargs) + + def debug(self, msg, *args, **kwargs): + self.log(DEBUG, msg, *args, **kwargs) + + def info(self, msg, *args, **kwargs): + self.log(INFO, msg, *args, **kwargs) + + def warning(self, msg, *args, **kwargs): + self.log(WARNING, msg, *args, **kwargs) + + def error(self, msg, *args, **kwargs): + self.log(ERROR, msg, *args, **kwargs) + +class Watchdog(WatchdogBase): + """Dell Platform-specific Watchdog class""" + + timers = [] + # some platforms need a minimum CPLD version: + check_cpld_version = False + wd_capable_cpld_version = True + wd_lock = Lock() + + # Counters to track wd register writes: + wd_set_timer_count = [] # A counter for each timer offset + wd_set_enable_count = 0 # Arms + wd_set_disable_count = 0 # Disarms + wd_set_punch_count = 0 # Punches + wd_set_timer_failed = [] # A failed counter for each timer offset + wd_set_enable_failed = 0 # Arms failed + wd_set_disable_failed = 0 # Disarms failed + wd_set_punch_failed = 0 # Punches failed + + armed_time = 0 + timeout = 0 + CLOCK_MONOTONIC = 1 + _errno = 0 + + def __init__(self, watchdog_spec): + self._librt = ctypes.CDLL('librt.so.1', use_errno=True) + self._clock_gettime = self._librt.clock_gettime + self._clock_gettime.argtypes = [ctypes.c_int, ctypes.POINTER(_timespec)] + + self.timers = watchdog_spec['timers'] + self.wd_set_timer_count = [0] * len(self.timers) + self.wd_set_timer_failed = [0] * len(self.timers) + + self.check_cpld_version = watchdog_spec['check_cpld_version'] + if self.check_cpld_version: + cpld_version = Component.get_cpld0_version() + wd_enabled_version = "0.8" + + if cpld_version < wd_enabled_version: + syslog.syslog(syslog.LOG_ERR, 'Watchdog: Older System CPLD ver, Update to 0.8 to support watchdog ') + self.wd_capable_cpld_version = False + + if (watchdog_spec['mode'] == 'MODE_I2C' or watchdog_spec['mode'] == 'MODE_CPLD'): + self.hwaccess = HwAccessFields(watchdog_spec) + elif watchdog_spec['mode'] == 'MODE_PCIE': + self.hwaccess = HwAccessRegisters(watchdog_spec) + else: + syslog.syslog(syslog.LOG_ERR, "Watchdog: watchdog_spec not set! \n") + + self.logger = WdLogger() + +# Functions to set the Watchdog timer, enable and punch registers/fields + + def _set_confirm_wd_timer(self, timer): + """ + This function will set the wd timer, wait for a specific time and confirm if the set was successful + """ + caller_frame = inspect.stack()[1][0] + frame_info = inspect.getframeinfo(caller_frame) + + self.wd_lock.acquire() + ret = self.hwaccess.set_wd_timer(timer & 0xF) + time.sleep(SET_CONFIRM_DELAY) + curr_timer = self.hwaccess.get_wd_timer() + self.wd_lock.release() + + if((ret == -1) or (timer != curr_timer)): + syslog.syslog(syslog.LOG_ERR, "Watchdog: [{}:{}] set {} failed for WD_TIMER ret {} read back {} \n".format(frame_info.function, frame_info.lineno, timer, ret, curr_timer)) + self.wd_set_timer_failed[timer & 0xF] += 1 + return -1 + + self.wd_set_timer_count[timer & 0xF] += 1 + return 0 + + def _set_confirm_wd_en(self, enable): + """ + This function will set the wd enable, wait for a specific time and confirm if the set was successful + """ + caller_frame = inspect.stack()[1][0] + frame_info = inspect.getframeinfo(caller_frame) + + self.wd_lock.acquire() + ret = self.hwaccess.set_wd_en(enable & 0x1) + time.sleep(SET_CONFIRM_DELAY) + curr_enable = self.hwaccess.get_wd_en() + self.wd_lock.release() + + if((ret == -1) or (enable != curr_enable)): + syslog.syslog(syslog.LOG_ERR, "Watchdog: [{}:{}] set {} failed for WD_EN ret {} read back {} \n".format(frame_info.function, frame_info.lineno, enable, ret, curr_enable)) + if enable == 1: + self.wd_set_enable_failed += 1 + else: + self.wd_set_disable_failed += 1 + return -1 + + if enable == 1: + self.wd_set_enable_count += 1 + else: + self.wd_set_disable_count += 1 + return 0 + + def set_wd_punch(self, punch): + """ + This function will set the punch + """ + + self.wd_lock.acquire() + ret = self.hwaccess.set_wd_punch(punch & 0x1) + self.wd_lock.release() + + if ret == -1: + syslog.syslog(syslog.LOG_ERR, "Watchdog: set {} failed for WD_PUNCH \n".format(punch)) + self.wd_set_punch_failed += 1 + return -1 + + self.wd_set_punch_count += 1 + return 0 + +# Helper functions + + def _get_time(self): + """ + To get clock monotonic time + """ + time_spec = _timespec() + if self._clock_gettime(self.CLOCK_MONOTONIC, ctypes.pointer(time_spec)) != 0: + self._errno = ctypes.get_errno() + return 0 + return time_spec.tv_sec + time_spec.tv_nsec * 1e-9 + +# Watchdog APIs + + def arm(self, seconds): + """ + Arm the hardware watchdog with a timeout of seconds. + If the watchdog is currently armed, calling this function will + simply reset the timer to the provided value. If the underlying + hardware does not support the value provided in , this + method should arm the watchdog with the *next greater* + available value. + + Returns: + An integer specifying the *actual* number of seconds the + watchdog was armed with. On failure returns -1. + """ + timer = -1 + for key, timer_seconds in enumerate(self.timers): + if 0 < seconds <= timer_seconds: + timer = key + seconds = timer_seconds + break + + if timer == -1: + syslog.syslog(syslog.LOG_ERR, "Watchdog: platform does not support watchdog for {} seconds\n".format(seconds)) + return -1 + + if not self.wd_capable_cpld_version: + syslog.syslog(syslog.LOG_ERR, 'Watchdog: Older System CPLD ver, Update to 0.8 to support watchdog') + return -1 + + curr_timer = self.hwaccess.get_wd_timer() + if curr_timer != timer: + self.disarm() + ret = self._set_confirm_wd_timer(timer) + if ret == -1: + return -1 + + if self.is_armed(): + # Setting WD Timer punch + ret = self.set_wd_punch(0) + if ret == -1: + self.logger.info("Arm FAILED") + return -1 + self.armed_time = self._get_time() + if ((self.wd_set_punch_count + self.wd_set_punch_failed) % WATCHDOG_LOG_PUNCH_INTERVAL) == 0: + self.logger.info("Arm OK") + self.timeout = seconds + return seconds + + ret = self._set_confirm_wd_en(1) + if ret == -1: + return -1 + self.armed_time = self._get_time() + self.timeout = seconds + return seconds + + def disarm(self): + """ + Disarm the hardware watchdog + + Returns: + A boolean, True if watchdog is disarmed successfully, False + if not + """ + if self.is_armed(): + ret = self._set_confirm_wd_en(0) + if ret == -1: + return -1 + self.armed_time = 0 + self.timeout = 0 + return True + + return False + + def is_armed(self): + """ + Retrieves the armed state of the hardware watchdog. + + Returns: + A boolean, True if watchdog is armed, False if not + """ + + return bool(self.hwaccess.get_wd_en()) + + def get_remaining_time(self): + """ + If the watchdog is armed, retrieve the number of seconds + remaining on the watchdog timer + + Returns: + An integer specifying the number of seconds remaining on + their watchdog timer. If the watchdog is not armed, returns + -1. + + Currently, we do not have hardware support to show remaining time. + Due to this limitation, this API is implemented in software. + This API would return correct software time difference if it + is called from the process which armed the watchdog timer. + If this API called from any other process, it would return + 0. If the watchdog is not armed, this API would return -1. + """ + if not self.is_armed(): + return -1 + + if self.armed_time > 0 and self.timeout != 0: + cur_time = self._get_time() + + if cur_time <= 0: + return 0 + + diff_time = int(cur_time - self.armed_time) + + if diff_time > self.timeout: + return self.timeout + + return self.timeout - diff_time + + return 0 + + def dump(self): + """ + Dump the access specs for retrieving the Watchdog registers, the registers as well as the counters + """ + resp = "timers: {}\n".format(self.timers) + resp += "check_cpld_version: {}\n".format(self.check_cpld_version) + + # Get the mode specific dump + resp += self.hwaccess.dump() + + resp += "wd set counts : timer {}\n".format(self.wd_set_timer_count) + resp += "wd set failed : timer {}\n".format(self.wd_set_timer_failed) + resp += "wd set counts : enable {} disable {} punch {}\n".format(self.wd_set_enable_count, self.wd_set_disable_count, self.wd_set_punch_count) + resp += "wd set failed : enable {} disable {} punch {}".format(self.wd_set_enable_failed, self.wd_set_disable_failed, self.wd_set_punch_failed) + + if len(resp) > MAX_WD_SOCK_BUFSIZE: + return "dump output too long! Maximum is {} bytes".format(MAX_WD_SOCK_BUFSIZE) + + return resp diff --git a/platform/broadcom/sonic-platform-modules-dell/z9864f/system_health_monitoring_config.json b/platform/broadcom/sonic-platform-modules-dell/z9864f/system_health_monitoring_config.json new file mode 100644 index 00000000000..4d158d6f5ca --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/z9864f/system_health_monitoring_config.json @@ -0,0 +1,11 @@ +{ + "services_to_ignore": [], + "devices_to_ignore": ["fan.speed","psu.temperature","psu.voltage","asic"], + "user_defined_checkers": [], + "polling_interval": 60, + "led_color": { + "fault" : "blinking_amber", + "normal" : "green", + "booting": "blinking_green" + } +} diff --git a/platform/broadcom/sonic-platform-modules-dell/z9864f/systemd/platform-adjust-txrx-freq-z9864f.service b/platform/broadcom/sonic-platform-modules-dell/z9864f/systemd/platform-adjust-txrx-freq-z9864f.service new file mode 100644 index 00000000000..b8fe43b6d59 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/z9864f/systemd/platform-adjust-txrx-freq-z9864f.service @@ -0,0 +1,16 @@ +[Unit] +Description=Dell Z9864F Platform Rx/Tx clock frequency adjustment +Before=pmon.service +Requires=database.service +After=platform-init.service database.service +Before=platform-ready.service +DefaultDependencies=no + +[Service] +Type=simple +ExecStart=/usr/share/sonic/platform/txrx_ppmd +Restart=always +RestartSec=30 + +[Install] +WantedBy=sonic.target diff --git a/platform/broadcom/sonic-platform-modules-dell/z9864f/systemd/platform-modules-z9864f.service b/platform/broadcom/sonic-platform-modules-dell/z9864f/systemd/platform-modules-z9864f.service new file mode 100644 index 00000000000..22106b6632b --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-dell/z9864f/systemd/platform-modules-z9864f.service @@ -0,0 +1,15 @@ +[Unit] +Description=Dell Z9864F Platform modules +Before=pmon.service +After=platform-init.service +Before=platform-ready.service +DefaultDependencies=no + +[Service] +Type=oneshot +ExecStart=/usr/local/bin/z9864f_platform.sh init +ExecStop=/usr/local/bin/z9864f_platform.sh deinit +RemainAfterExit=yes + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-micas/common/Makefile b/platform/broadcom/sonic-platform-modules-micas/common/Makefile index 385dae0884f..67650d7434a 100755 --- a/platform/broadcom/sonic-platform-modules-micas/common/Makefile +++ b/platform/broadcom/sonic-platform-modules-micas/common/Makefile @@ -30,6 +30,7 @@ all: @if [ ! -d ${INSTALL_LIB_DIR} ]; then mkdir -p ${INSTALL_LIB_DIR} ;fi @if [ -d $(PWD)/lib/ ]; then cp -r $(PWD)/lib/* ${INSTALL_LIB_DIR} ;fi @if [ -d $(PWD)/sonic_platform/ ]; then cp -rf $(PWD)/sonic_platform ${INSTALL_LIB_DIR} ;fi + cp -r $(app_build_dir)/module/*.ko $(INSTALL_MODULE_DIR) cp -r $(modules_build_dir)/*.ko $(INSTALL_MODULE_DIR) cp -r $(app_dir)/build/app/* $(INSTALL_SCRIPT_DIR) cp -r $(SCRIPT_DIR)/* $(INSTALL_SCRIPT_DIR) @@ -37,5 +38,6 @@ all: @if [ -d $(INSTALL_SCRIPT_DIR) ]; then chmod +x $(INSTALL_SCRIPT_DIR)/* ;fi @if [ ! -d ${INSTALL_BLACK_DRIVER} ]; then mkdir -p ${INSTALL_BLACK_DRIVER} ;fi cp -r $(BLACK_DRIVER_CONF_DIR)/* $(INSTALL_BLACK_DRIVER) + clean: rm -rf $(SUB_BUILD_DIR) diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/Makefile b/platform/broadcom/sonic-platform-modules-micas/common/app/Makefile index 25ba3c5a915..7931ec70e77 100644 --- a/platform/broadcom/sonic-platform-modules-micas/common/app/Makefile +++ b/platform/broadcom/sonic-platform-modules-micas/common/app/Makefile @@ -7,7 +7,8 @@ INC = -I./inc COMMON_OUT_PUT := $(shell pwd)/build common_out_put_dir := $(COMMON_OUT_PUT)/app common_module_dir := $(COMMON_OUT_PUT)/module/ -export common_out_put_dir common_module_dir +port_out_put_dir := $(COMMON_OUT_PUT)/app +export common_out_put_dir common_module_dir port_out_put_dir all : CHECK $(SUBDIRS) CHECK : diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/dev_util/Makefile b/platform/broadcom/sonic-platform-modules-micas/common/app/dev_util/Makefile index e4078716eb3..ee4e4946b57 100644 --- a/platform/broadcom/sonic-platform-modules-micas/common/app/dev_util/Makefile +++ b/platform/broadcom/sonic-platform-modules-micas/common/app/dev_util/Makefile @@ -25,6 +25,7 @@ install: @mkdir -p $(common_out_put_dir) cp -p $(BUILD_OUTPUT)/$(PROGRAM) $(common_out_put_dir) + rebuild: clean all clean: @rm -rf $(BUILD_OUTPUT)/* diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/fw_upgrade/fw_upgrade/fw_upgrade.c b/platform/broadcom/sonic-platform-modules-micas/common/app/fw_upgrade/fw_upgrade/fw_upgrade.c index 7141ef08be5..ff653acf737 100644 --- a/platform/broadcom/sonic-platform-modules-micas/common/app/fw_upgrade/fw_upgrade/fw_upgrade.c +++ b/platform/broadcom/sonic-platform-modules-micas/common/app/fw_upgrade/fw_upgrade/fw_upgrade.c @@ -210,7 +210,25 @@ static flash_info_t flash_info[] = { }, }; +#define TYPE_AST2500 (1) +#define TYPE_AST2600 (2) + +static bmc_id_list_t g_bmc_id_list[] = { + { + .bmc_ids = {AST2500_A0, AST2510_A0, AST2520_A0, AST2530_A0, AST2500_A1, AST2510_A1, AST2520_A1,\ + AST2530_A1, AST2500_A2, AST2510_A2, AST2520_A2, AST2530_A2}, + .bmc_type = TYPE_AST2500, + .bmc_id_reg = AST25_SILICON_REVISION_ID_REGISTER, + }, + { + .bmc_ids = {AST2600_A0, AST2600_A1, AST2600_A2, AST2600_A3, AST2620_A1, AST2620_A2, AST2620_A3}, + .bmc_type = TYPE_AST2600, + .bmc_id_reg = AST26_SILICON_REVISION_ID_REGISTER, + } +}; + static int debug_on; +static int g_bmc_type = TYPE_AST2500; static void help(void) { @@ -496,13 +514,23 @@ static void disable_ilpc2ahb(void) /* Enable CPU */ static void enable_cpu(void) { - /* unlock SCU register */ - write_bmc_reg(SCU_ADDR, UNLOCK_SCU_KEY); - /* enable ARM */ - write_bmc_reg(REBOOT_CPU_REGISTER, SET_BMC_CPU_BOOT); - /* lock SCU register */ - write_bmc_reg(SCU_ADDR, LOCK_SCU_KEY); - + if (g_bmc_type == TYPE_AST2600) { + /* unlock SCU register */ + write_bmc_reg(AST26_PROTECTION_KEY_REGISTER_1, UNLOCK_SCU_KEY); + write_bmc_reg(AST26_PROTECTION_KEY_REGISTER_2, UNLOCK_SCU_KEY); + /* enable ARM */ + write_bmc_reg(AST26_HARDWARE_STRAP_REGISTER_CLEAR, 0x1); + /* lock SCU register */ + write_bmc_reg(AST26_PROTECTION_KEY_REGISTER_1, LOCK_SCU_KEY); + write_bmc_reg(AST26_PROTECTION_KEY_REGISTER_2, LOCK_SCU_KEY); + } else { + /* unlock SCU register */ + write_bmc_reg(SCU_ADDR, UNLOCK_SCU_KEY); + /* enable ARM */ + write_bmc_reg(AST25_REBOOT_CPU_REGISTER, SET_BMC_CPU_BOOT); + /* lock SCU register */ + write_bmc_reg(SCU_ADDR, LOCK_SCU_KEY); + } return; } @@ -511,14 +539,25 @@ static void disable_cpu(void) { uint32_t scu_hw_strap_val; - /* unlock SCU register */ - write_bmc_reg(SCU_ADDR, UNLOCK_SCU_KEY); - /* disable ARM */ - scu_hw_strap_val = read_bmc_reg(HARDWARE_STRAP_REGISTER); - write_bmc_reg(HARDWARE_STRAP_REGISTER, scu_hw_strap_val |0x01); - /* lock SCU register */ - write_bmc_reg(SCU_ADDR, LOCK_SCU_KEY); - + if (g_bmc_type == TYPE_AST2600) { + /* unlock SCU register */ + write_bmc_reg(AST26_PROTECTION_KEY_REGISTER_1, UNLOCK_SCU_KEY); + write_bmc_reg(AST26_PROTECTION_KEY_REGISTER_2, UNLOCK_SCU_KEY); + /* disable ARM */ + scu_hw_strap_val = read_bmc_reg(AST26_HARDWARE_STRAP_REGISTER); + write_bmc_reg(AST26_HARDWARE_STRAP_REGISTER, scu_hw_strap_val |0x01); + /* lock SCU register */ + write_bmc_reg(AST26_PROTECTION_KEY_REGISTER_1, LOCK_SCU_KEY); + write_bmc_reg(AST26_PROTECTION_KEY_REGISTER_2, LOCK_SCU_KEY); + } else { + /* unlock SCU register */ + write_bmc_reg(SCU_ADDR, UNLOCK_SCU_KEY); + /* disable ARM */ + scu_hw_strap_val = read_bmc_reg(AST25_HARDWARE_STRAP_REGISTER); + write_bmc_reg(AST25_HARDWARE_STRAP_REGISTER, scu_hw_strap_val |0x01); + /* lock SCU register */ + write_bmc_reg(SCU_ADDR, LOCK_SCU_KEY); + } return; } @@ -532,7 +571,12 @@ static void enable_upgrade(void) write_bmc_reg(CE0_CONTROL_REGISTER, 0); write_bmc_reg(CE1_CONTROL_REGISTER, 0); /* disable WDT2 */ - write_bmc_reg(WATCHDOG2_CONTROL, DISABLE_WATCHDOG); + if (g_bmc_type == TYPE_AST2500) { + write_bmc_reg(WATCHDOG2_CONTROL, DISABLE_WATCHDOG); + } else { + write_bmc_reg(FMC_WDT2_CONTROL_STATUS_REGISTER, AST26_FMC_WATCHDOG_DISABLE); + write_bmc_reg(AST26_WATCHDOG2_CONTROL, DISABLE_AST26_WATCHDOG); + } return; } @@ -540,12 +584,49 @@ static void enable_upgrade(void) static void disable_upgrade(void) { enable_cpu(); - dbg_print(debug_on, "DEBUG 0x%x\n", read_bmc_reg(HARDWARE_STRAP_REGISTER)); + if (g_bmc_type == TYPE_AST2600) { + dbg_print(debug_on, "DEBUG 0x%x\n", read_bmc_reg(AST26_HARDWARE_STRAP_REGISTER)); + } else { + dbg_print(debug_on, "DEBUG 0x%x\n", read_bmc_reg(AST25_HARDWARE_STRAP_REGISTER)); + } disable_ilpc2ahb(); return; } +static int get_bmc_type(void) +{ + int i, j, size_1, size_2, ret; + uint32_t read_val; + + ret = set_ioport_rw_access(); + if (ret < 0) { + printf("IO ERROR\n"); + return -1; + } + + enable_ilpc2ahb(); + + size_1 = sizeof(g_bmc_id_list) / sizeof((g_bmc_id_list)[0]); + for (i = 0; i < size_1 ; i++) { + read_val = read_bmc_reg(g_bmc_id_list[i].bmc_id_reg); + dbg_print(debug_on, "get_bmc_type: read reg: 0x%x\n", g_bmc_id_list[i].bmc_id_reg); + dbg_print(debug_on, "get_bmc_type: reg value 0x%x\n", read_val); + size_2 = sizeof(g_bmc_id_list[i].bmc_ids) / sizeof((g_bmc_id_list[i].bmc_ids)[0]); + for (j = 0; j < size_2; j++) { + if ((read_val != 0) && (read_val == g_bmc_id_list[i].bmc_ids[j])) { + g_bmc_type = g_bmc_id_list[i].bmc_type; + dbg_print(debug_on, "get_bmc_type: success, g_bmc_type = %d\n", g_bmc_type); + disable_ilpc2ahb(); + return 0; + } + } + } + + disable_ilpc2ahb(); + return -1; +} + static void watchdog_status_debug(void) { uint32_t watchdog_reg; @@ -739,8 +820,47 @@ static void fmc_debug(void) return; } -/* Enable WatchDog to reset BMC*/ -static void enable_watchdog(int cs) +static int get_current_bmc(void) +{ + if (g_bmc_type == TYPE_AST2600) { + return (read_bmc_reg(FMC_WDT2_CONTROL_STATUS_REGISTER) & 0x010) >> 4; + } else { + return (read_bmc_reg(WATCHDOG2_TSR) & 0x02) >> 1; + } +} + +#if 0 +/* Enable WatchDog to reset 2600 BMC*/ +static void enable_ast26_watchdog(int cs) { + + if (cs == get_current_bmc()) { + /* reset to current chip by wdt2*/ + write_bmc_reg(AST26_WATCHDOG2_CLEAR_STATUS, CLEAR_WATCHDOG_STATUS); + write_bmc_reg(AST26_WATCHDOG2_RESET_FUN_MASK_2, AST26_WATCHDOG_GATEMASK_2); + write_bmc_reg(AST26_WATCHDOG2_RELOAD_VALUE, WATCHDOG_NEW_COUNT); + write_bmc_reg(AST26_WATCHDOG2_COUNTER_RST, WATCHDOG_RELOAD_COUNTER); + write_bmc_reg(AST26_WATCHDOG2_CONTROL, AST26_ENABLE_WATCH_CMD); + } else { + /* reset to another chip by fmt_wdt*/ + write_bmc_reg(FMC_WDT2_TIMER_RELOAD_VALUE_REGISTER, AST26_FMT_WATCHDOG_NEW_COUNT); + write_bmc_reg(FMC_WDT2_CONTROL_STATUS_REGISTER, AST26_ENABLE_FMC_WATCH_CMD); + } + + return; +} +#endif + +/* Enable WatchDog to reset 2600 BMC*/ +/* 2600 BMC WDT2 full chip reset is invalid , so use this funtion to reset bmc by fmc_wdt */ +static void enable_ast26_watchdog(int cs) { + dbg_print(debug_on, "enable_ast26_watchdog cs: %d\n", cs); + write_bmc_reg(FMC_WDT2_TIMER_RELOAD_VALUE_REGISTER, AST26_FMT_WATCHDOG_NEW_COUNT); + write_bmc_reg(FMC_WDT2_CONTROL_STATUS_REGISTER, AST26_ENABLE_FMC_WATCH_CMD); + return; +} + +/* Enable WatchDog to reset 2500 BMC*/ +static void enable_ast25_watchdog(int cs) { uint32_t enable_watch_cmd; @@ -756,7 +876,11 @@ static void enable_watchdog(int cs) static void bmc_reboot(int cs) { - enable_watchdog(cs); + if (g_bmc_type == TYPE_AST2600) { + enable_ast26_watchdog(cs); + } else { + enable_ast25_watchdog(cs); + } watchdog_status_debug(); disable_upgrade(); printf("Upgrade-Complete, BMC rebooting...\n"); @@ -764,20 +888,20 @@ static void bmc_reboot(int cs) return; } -static int get_current_bmc(void) -{ - return (read_bmc_reg(WATCHDOG2_TSR) & 0x02) >> 1; -} - static void get_flash_base_and_ce_ctrl(int current_bmc, int cs, uint32_t *flash_base_addr, uint32_t *ce_ctrl_addr) { uint32_t ce0_addr_range_reg_val, ce0_decode_addr; uint32_t ce1_addr_range_reg_val, ce1_decode_addr; ce0_addr_range_reg_val = read_bmc_reg(CE0_ADDRESS_RANGE_REGISTER); - ce0_decode_addr = SEGMENT_ADDR_START(ce0_addr_range_reg_val); ce1_addr_range_reg_val = read_bmc_reg(CE1_ADDRESS_RANGE_REGISTER); - ce1_decode_addr = SEGMENT_ADDR_START(ce1_addr_range_reg_val); + if (g_bmc_type == TYPE_AST2600) { + ce0_decode_addr = AST26_SEGMENT_ADDR_START(ce0_addr_range_reg_val); + ce1_decode_addr = AST26_SEGMENT_ADDR_START(ce1_addr_range_reg_val); + } else { + ce0_decode_addr = AST25_SEGMENT_ADDR_START(ce0_addr_range_reg_val); + ce1_decode_addr = AST25_SEGMENT_ADDR_START(ce1_addr_range_reg_val); + } dbg_print(debug_on,"CE0 addr decode range reg value:0x%08x, decode addr:0x%08x.\n", ce0_addr_range_reg_val, ce0_decode_addr); dbg_print(debug_on,"CE1 addr decode range reg value:0x%08x, decode addr:0x%08x.\n", @@ -1509,7 +1633,6 @@ static int program_flash_main(int argc, char* argv[]) { int cs, erase_way, ret; char *stopstring; - char tmp[128]; if (argc != 5) { printf("Input invalid.\n"); @@ -1519,8 +1642,7 @@ static int program_flash_main(int argc, char* argv[]) cs = strtol(argv[3], &stopstring, 10); if ((strlen(stopstring) != 0) || cs < 0 || cs > 2) { - snprintf(tmp, sizeof(tmp), "%s", argv[3]); - printf("Incorrect chip select %s\n", tmp); + printf("Incorrect chip select %s\n", argv[3]); help(); return -1; } @@ -1530,12 +1652,17 @@ static int program_flash_main(int argc, char* argv[]) } else if (strcmp(argv[4], "block") == 0) { erase_way = BLOCK_ERASE; } else { - snprintf(tmp, sizeof(tmp), "%s", argv[4]); - printf("Incorrect erase type %s\n", tmp); + printf("Incorrect erase type %s\n", argv[4]); help(); return -1; } + ret = get_bmc_type(); + if (ret < 0) { + printf("get bmc type fail\n"); + return ret; + } + printf("============BMC Upgrade Tool=============\n"); ret = upgrade_bmc(argv[2], cs, erase_way); return ret; @@ -1546,7 +1673,6 @@ static int read_bmc_flash_main(int argc, char* argv[]) int cs, ret, read_size, is_print; uint32_t start_addr; char *stopstring; - char tmp[128]; if (argc != 6) { printf("Input invalid.\n"); @@ -1556,8 +1682,7 @@ static int read_bmc_flash_main(int argc, char* argv[]) cs = strtol(argv[2], &stopstring, 10); if ((strlen(stopstring) != 0) || cs < 0 || cs > 1) { - snprintf(tmp, sizeof(tmp), "%s", argv[2]); - printf("Incorrect chip select %s\n", tmp); + printf("Incorrect chip select %s\n", argv[2]); help(); return -1; } @@ -1582,6 +1707,12 @@ static int read_bmc_flash_main(int argc, char* argv[]) is_print = 0; } + ret = get_bmc_type(); + if (ret < 0) { + printf("get bmc type fail\n"); + return ret; + } + printf("============READ BMC FLASH=============\n"); ret = read_bmc_flash(cs, start_addr, read_size, is_print); return ret; diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/fw_upgrade/fw_upgrade/include/fw_upgrade.h b/platform/broadcom/sonic-platform-modules-micas/common/app/fw_upgrade/fw_upgrade/include/fw_upgrade.h index aa012b8ab6d..7fa988104b2 100644 --- a/platform/broadcom/sonic-platform-modules-micas/common/app/fw_upgrade/fw_upgrade/include/fw_upgrade.h +++ b/platform/broadcom/sonic-platform-modules-micas/common/app/fw_upgrade/fw_upgrade/include/fw_upgrade.h @@ -41,11 +41,22 @@ #define CE1_CONTROL_REGISTER (FMC_BASE_ADDR + 0x14) #define CE0_ADDRESS_RANGE_REGISTER (FMC_BASE_ADDR + 0x30) #define CE1_ADDRESS_RANGE_REGISTER (FMC_BASE_ADDR + 0x34) +#define FMC_WDT2_CONTROL_STATUS_REGISTER (FMC_BASE_ADDR + 0x64) +#define FMC_WDT2_TIMER_RELOAD_VALUE_REGISTER (FMC_BASE_ADDR + 0x68) /* SCU REGISTER ADDR */ #define SCU_ADDR (0x1E6E2000) -#define HARDWARE_STRAP_REGISTER (SCU_ADDR + 0x70) -#define REBOOT_CPU_REGISTER (SCU_ADDR + 0x7C) +/* AST25 */ +#define AST25_HARDWARE_STRAP_REGISTER (SCU_ADDR + 0x70) +#define AST25_REBOOT_CPU_REGISTER (SCU_ADDR + 0x7C) +#define AST25_SILICON_REVISION_ID_REGISTER (SCU_ADDR + 0x7C) + +/* AST26 */ +#define AST26_PROTECTION_KEY_REGISTER_1 (SCU_ADDR + 0) +#define AST26_SILICON_REVISION_ID_REGISTER (SCU_ADDR + 0x04) +#define AST26_PROTECTION_KEY_REGISTER_2 (SCU_ADDR + 0x10) +#define AST26_HARDWARE_STRAP_REGISTER (SCU_ADDR + 0x500) +#define AST26_HARDWARE_STRAP_REGISTER_CLEAR (SCU_ADDR + 0x504) /* SCU KEY */ #define UNLOCK_SCU_KEY (0x1688A8A8) @@ -67,6 +78,17 @@ #define WATCHDOG2_CLEAR_STATUS (WATCHDOG_ADDR + 0x34) #define WATCHDOG2_RESET_FUN_MASK (WATCHDOG_ADDR + 0x3C) +#define AST26_WATCHDOG2_ADDR_BASE (0x1E785040) +#define AST26_WATCHDOG2_RELOAD_VALUE (AST26_WATCHDOG2_ADDR_BASE + 0x04) +#define AST26_WATCHDOG2_COUNTER_RST (AST26_WATCHDOG2_ADDR_BASE + 0x08) +#define AST26_WATCHDOG2_CONTROL (AST26_WATCHDOG2_ADDR_BASE + 0x0C) +#define AST26_WATCHDOG2_TSR (AST26_WATCHDOG2_ADDR_BASE + 0x10) +#define AST26_WATCHDOG2_CLEAR_STATUS (AST26_WATCHDOG2_ADDR_BASE + 0x14) +#define AST26_WATCHDOG2_RESET_FUN_MASK_1 (AST26_WATCHDOG2_ADDR_BASE + 0x1C) +#define AST26_WATCHDOG2_RESET_FUN_MASK_2 (AST26_WATCHDOG2_ADDR_BASE + 0x20) +#define AST26_FMC_WATCHDOG_DISABLE (0x0) +#define DISABLE_AST26_WATCHDOG (0x00000000) + /* User Mode Command */ #define WRITE_STATUS (0x01) #define COMMON_PAGE_PROGRAM (0x02) @@ -164,6 +186,11 @@ #define WATCHDOG_NEW_COUNT (0x00050000) #define WATCHDOG_RELOAD_COUNTER (0x4755) +#define AST26_WATCHDOG_GATEMASK_2 (0x03FFFFF3) +#define AST26_ENABLE_WATCH_CMD (0x33) +#define AST26_ENABLE_FMC_WATCH_CMD (0x1) +#define AST26_FMT_WATCHDOG_NEW_COUNT (0x3) + #define CE0_SPI_TYPE (0x00000002) #define CE1_SPI_TYPE (0x00000008) #define ERROR_COMMAND (0x00000400) @@ -190,7 +217,9 @@ #define REGISTER_HEAD (0x1e000000) #define DEFAULT_WIDTH (16) #define MAX_FILENAME_LENGTH (64) -#define SEGMENT_ADDR_START(_r) ((((_r) >> 16) & 0xFF) << 23) +#define AST26_AHB_BASE_PHY_ADDR (0x20000000) +#define AST25_SEGMENT_ADDR_START(_r) ((((_r) >> 16) & 0xFF) << 23) +#define AST26_SEGMENT_ADDR_START(_r) ((((_r) & 0xFFFF) << 16) | AST26_AHB_BASE_PHY_ADDR) typedef struct flash_info { uint32_t flash_size; @@ -247,4 +276,39 @@ typedef enum flash_size { M128 = 0x08000000, /* 128M */ } flash_size_t; +typedef enum ast25_bmc_id_list { + AST2500_A0 = 0x04000303, + AST2510_A0 = 0x04000103, + AST2520_A0 = 0x04000203, + AST2530_A0 = 0x04000403, + + AST2500_A1 = 0x04010303, + AST2510_A1 = 0x04010103, + AST2520_A1 = 0x04010203, + AST2530_A1 = 0x04010403, + + AST2500_A2 = 0x04030303, + AST2510_A2 = 0x04030103, + AST2520_A2 = 0x04030203, + AST2530_A2 = 0x04030403, + + AST2600_A0 = 0x05000303, + AST2600_A1 = 0x05010303, + AST2600_A2 = 0x05010303, + AST2600_A3 = 0x05030303, + + AST2620_A1 = 0x05010203, + AST2620_A2 = 0x05010203, + AST2620_A3 = 0x05030203, +} ast25_bmc_id_list_t; + + +typedef struct bmc_id_list_s { + uint32_t bmc_ids[64]; + int bmc_type; + uint32_t bmc_id_reg; +} bmc_id_list_t; + + + #endif /*_FW_UPGRADE_H_*/ diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/hw_test/Makefile b/platform/broadcom/sonic-platform-modules-micas/common/app/hw_test/Makefile new file mode 100644 index 00000000000..3c9049c2db5 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/app/hw_test/Makefile @@ -0,0 +1,15 @@ +pes_parent_dir:=$(shell pwd)/$(lastword $(MAKEFILE_LIST)) +pes_parent_dir:=$(shell dirname $(pes_parent_dir)) + +SUBDIRS=$(shell ls -l | grep ^d | awk '{if($$9 != "build") print $$9}') +INC = -I./inc + +all : CHECK $(SUBDIRS) +CHECK : + @echo $(pes_parent_dir) + +$(SUBDIRS):ECHO + make -C $@ + +ECHO: + @echo $(SUBDIRS) diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/hw_test/hw_test_app/Makefile b/platform/broadcom/sonic-platform-modules-micas/common/app/hw_test/hw_test_app/Makefile new file mode 100644 index 00000000000..13c99a29514 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/app/hw_test/hw_test_app/Makefile @@ -0,0 +1,31 @@ +top_srcdir:=$(shell pwd) +#include $(top_srcdir)/Rules.mk +DIR=$(shell pwd) +BUILD_OUTPUT=$(DIR)/tmp +SRCS=$(wildcard *.c) +OBJS=$(patsubst %.c, $(BUILD_OUTPUT)/%.o, $(SRCS)) +DEPS=$(patsubst %.o, %.d, $(OBJS)) +CFLAGS+=-Wall -W -g -I$(DIR)/include +LDFLAGS= +PROGRAM=hw_test.bin + +.PHONY: all + +all:$(OBJS) + $(CC) $(OBJS) $(LDFLAGS) -o $(BUILD_OUTPUT)/$(PROGRAM) + @if [ ! -d ${common_out_put_dir} ]; then mkdir -p ${common_out_put_dir} ;fi + cp -p $(BUILD_OUTPUT)/$(PROGRAM) $(common_out_put_dir) + +$(OBJS):$(SRCS) + @if [ ! -d ${BUILD_OUTPUT} ]; then mkdir -p ${BUILD_OUTPUT} ;fi + $(CC) -c $(CFLAGS) $(INCLUDE) $(*F).c -o $@ + +.PHONY: install +install: + @mkdir -p $(install_sbin_dir) + cp -p $(BUILD_OUTPUT)/$(PROGRAM) $(common_out_put_dir) + + +rebuild: clean all +clean: + @rm -rf $(BUILD_OUTPUT)/* \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/hw_test/hw_test_app/ft_ddr_test.c b/platform/broadcom/sonic-platform-modules-micas/common/app/hw_test/hw_test_app/ft_ddr_test.c new file mode 100644 index 00000000000..3f9f80c3de3 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/app/hw_test/hw_test_app/ft_ddr_test.c @@ -0,0 +1,2074 @@ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#undef USE_DMA /* Disable DMA */ +typedef unsigned int uint32; +#define MEMORY_SIZE_1G (1024 * 1024 * 1024ul) + +volatile uint32 *pp = 0; +uint32 p1 = 0, p2 = 0, p0 = 0; +int fail = 0; +int segs = 0; +struct vars variables = { }; +struct vars *v = &variables; +//dma_tx_data_t g_dma_tx_data[MAX_DMA_CHAN][NUM_LINK_DESC]; +static unsigned int SEED_X = 521288629; +static unsigned int SEED_Y = 362436069; + +/* Memory block size at dma transfer time */ +int blk_size_array[BLK_SIZE_NUM_MAX] = { + 0x2000000, /* 32MB */ + 0x1800000, /* 24MB */ + 0x1000000, /* 16MB */ + 0xA00000, /* 10MB */ + 0x800000, /* 8MB */ + 0x600000, /* 6MB */ + 0x500000, /* 5MB */ + 0x300000, /* 3MB */ + 0x200000, /* 2MB */ +}; + +#if 0 +extern int dma_mov_addr(int engine, int from_addr, int to_addr, int size); +#endif +static int ddr_half_mov_inv_random_pat(char *desc); +static int ddr_mov_inv_random_pat(char *desc); +static int ddr_mov_inv_0_1(char *desc); +static int ddr_mov_inv_8_pat(char *desc); +static int ddr_mov_inv_32_pat(char *desc); +static int ddr_mod20_random_pat(char *desc); +static int ddr_mod20_0_1_pat(char *desc); +static int ddr_mod20_8_pat(char *desc); +static int ddr_addr_walking(char *desc); +static int ddr_march_c(char *desc); +static int ddr_march_g(char *desc); +static int ddr_galloping(char *desc); +static int ddr_column_operate(char *desc); +static int ddr_swap_blocks(char *desc); + +ft_ddr_test_interface_t ft_ddr_test_fun[TETS_TOTAL_NUMBER] = { + {0, ddr_half_mov_inv_random_pat, "Half move inversion - random number test"}, /* Half move inversion - random number test, no copying */ + {1, ddr_mov_inv_random_pat, "Move inversion - random number test"}, /* Move inversion - random number test */ + {0, ddr_mov_inv_0_1, "Move inversion -0&1 test"}, /* Move inversion -0&1 test, no copying */ + {1, ddr_mov_inv_8_pat, "Move inversion -8bit test"}, /* Move inversion -8bit test */ + {0, ddr_mov_inv_32_pat, "Move inversion -32bit test"}, /* Move inversion -32bit test, no copying */ + {0, ddr_mod20_random_pat, "Mode 20- Random number test"}, /* Mode 20- Random number test, no copying */ + {1, ddr_mod20_0_1_pat, "Mode 20-0&1 test"}, /* Mode 20-0&1 test*/ + {1, ddr_mod20_8_pat, "Mode 20-8bit test"}, /* Mode 20-8bit test */ + {1, ddr_addr_walking, "Go 1 address test"}, /* Go 1 address test*/ + {0, ddr_march_c, "March C test"}, /* March Ctest, no copying */ + {1, ddr_march_g, "March G test"}, /* March G test */ + {1, ddr_galloping, "Galloping test "}, /* Galloping test */ + {1, ddr_column_operate, "Column operate test"}, /* Column operate test */ + {0, ddr_swap_blocks, " block move test"}, /* block move test, no copying */ +}; + +static inline ulong roundup(ulong value, ulong mask) +{ + return (value + mask) & ~mask; +} + +#if 0 +static inline void set_vars(ulong start, ulong end) +{ + int i = 0; + + for (i = 0; i < v->msegs; i++) { + v->pmap[i].start = (uint)start; + v->pmap[i].end = (uint)end; + v->map[i].start = (ulong *)start; + v->map[i].end = (ulong *)end; + } +} +#endif + +#if 1 +void rand_seed(unsigned int seed1, unsigned int seed2) +{ + if (seed1) + SEED_X = seed1; /* use default seeds if parameter is 0 */ + if (seed2) + SEED_Y = seed2; +} + +static inline unsigned int ft_rand() +{ + static unsigned int a = 18000, b = 30903; + + SEED_X = a * (SEED_X & 65535) + (SEED_X >> 16); + SEED_Y = b * (SEED_Y & 65535) + (SEED_Y >> 16); + + return ((SEED_X << 16) + (SEED_Y & 65535)); +} +#else +static inline unsigned long ft_rand() +{ + if (sizeof(ulong) == 8) { + return ((ulong)rand() << 32) | rand(); + } + + return rand(); +} + +#endif +/** + * addrress_walking + * + * Use the "address test" algorithm + * The address translation rules for writing data are as follows: + * address = initial address | (mask << 1) + * + * No return value + */ +static int addrress_walking(char *desc) +{ + int i, j, k; + uint32 *pt, *end, mask, bank; + + if (fail) { + sprintf(desc, "No test."); + return FT_DDR_ERR; + } + + /* Test the global address bits */ + for (p1 = 0, j = 0; j < 2; j++) { + /* Set the initial address 0x20000 to align */ + pp = (uint32 *)roundup((ulong)v->map[0].start, 0x1ffff); + *pp = p1; + + /* Now write pattern compliment */ + p1 = ~p1; + end = v->map[segs - 1].end; + for (i = 0; i < 1000; i++) { + mask = 4; + do { + pt = (uint32 *) ((ulong) pp | mask); + if (pt == pp) { + mask = mask << 1; + continue; + } + if (pt >= end) { + break; + } + *pt = p1; + if (*pp != ~p1) { + sprintf(desc, "[%p] should be 0x%x,but is 0x%x.\n", pp, ~p1, *pp); + fail = 1; + return FT_DDR_ERR; + } + mask = mask << 1; + } while (mask); + } + FT_DDR_SHOW(); + } + + /* Now check the address bits in each bank + * If we have more than 8mb of memory then the bank size must be + * bigger than 256k. If so use 1mb for the bank size. + */ + if (v->pmap[v->msegs - 1].end > (0x800000 >> 12)) { + bank = 0x100000; + } else { + bank = 0x40000; + } + + for (p1 = 0, k = 0; k < 2; k++) { + for (j = 0; j < segs; j++) { + pp = v->map[j].start; + /* Set the initial address to 256k alignment */ + pp = (uint32 *) roundup((ulong) pp, bank - 1); + end = v->map[j].end; + while (pp < end) { + *pp = p1; + p1 = ~p1; + for (i = 0; i < 200; i++) { + mask = 4; + do { + pt = (uint32 *)((ulong) pp | mask); + if (pt == pp) { + mask = mask << 1; + continue; + } + if (pt >= end) { + break; + } + *pt = p1; + if (*pp != ~p1) { + sprintf(desc, "[%p] should be 0x%x,but is 0x%x.\n", pp, ~p1, *pp); + fail = 1; + return FT_DDR_ERR; + } + mask = mask << 1; + } while (mask); + } + if (pp + bank > pp) { + pp += bank; + } else { + pp = end; + } + p1 = ~p1; + } + } + p1 = ~p1; + FT_DDR_SHOW(); + } + + return FT_DDR_SUCCESS; +} + +/** + * moving_inversions + * @iter: number of repetitions + * @p1: The data is written for pattern1 + * @p2: The data is written for pattern2 + * + * Use the "move inversion" algorithm to write memory addresses from low to high and from high to address; + * First write p1 data format to the test memory area, and verify that the written data is correct; + * Write ~p1 data format to the test memory area, and verify that the written data is correct; + * + * Returns 0 on success; Return 1 on failure + */ +static int moving_inversions(char * desc, int iter, uint32 p1, uint32 p2) +{ + int i, j, done; + uint32 *pe; + uint32 *start, *end; + + if (fail) { + sprintf(desc, "No test."); + return FT_DDR_ERR; + } + + FAC_LOG_DBG(GRTD_LOG_DEBUG, "Iter:%d P1:0x%x P2:0x%x.\n", iter, p1, p2); + /* From the low address to the high address, write p1 values to the test memory area */ + for (j = 0; j < segs; j++) { + start = v->map[j].start; + end = v->map[j].end; + pe = start; + pp = start; + done = 0; + do { + /* Check for overflow */ + if (pe + SPINSZ > pe) { + pe += SPINSZ; + } else { + pe = end; + } + if (pe >= end) { + pe = end; + done++; + } + if (pp == pe) { + break; + } + + for (; pp < pe; pp++) { + *pp = p1; + } + } while (!done); + FT_DDR_SHOW(); + } + + for (i = 0; i < iter; i++) { + /* Validate write data, from low to high address, write p2 value to test memory area */ + for (j = 0; j < segs; j++) { + start = v->map[j].start; + end = v->map[j].end; + pe = start; + pp = start; + done = 0; + do { + /* Check for overflow */ + if (pe + SPINSZ > pe) { + pe += SPINSZ; + } else { + pe = end; + } + if (pe >= end) { + pe = end; + done++; + } + if (pp == pe) { + break; + } + + for (; pp < pe; pp++) { + if (*pp != p1) { + FAC_LOG_DBG(GRTD_LOG_ERR, "[%p] should be 0x%x,but is 0x%x.\n", pp, p1, *pp); + sprintf(desc, "[%p] should be 0x%x,but is 0x%x.\n", pp, p1, *pp); + fail = 1; + return FT_DDR_ERR; + } + *pp = p2; + } + } while (!done); + FT_DDR_SHOW(); + } + + /* Verify the write data, from the high address to the low address, write p1 value to the test memory area */ + for (j = segs - 1; j >= 0; j--) { + start = v->map[j].start; + end = v->map[j].end; + pe = end - 1; + pp = end - 1; + done = 0; + do { + /* Check for underflow */ + if (pe - SPINSZ < pe) { + pe -= SPINSZ; + } else { + pe = start; + } + if (pe <= start) { + pe = start; + done++; + } + if (pp == pe) { + break; + } + + do { + if (*pp != p2) { + FAC_LOG_DBG(GRTD_LOG_ERR, "[%p] should be 0x%x,but is 0x%x.\n", pp, p2, *pp); + sprintf(desc, "[%p] should be 0x%x,but is 0x%x.\n", pp, p2, *pp); + fail = 1; + return FT_DDR_ERR; + } + *pp = p1; + } while (pp-- > pe); + } while (!done); + FT_DDR_SHOW(); + } + } + + return FT_DDR_SUCCESS; +} + +/** + * moving_inversions32 + * @iter: number of repetitions + * @p1: indicates the pattern of data written to memory for the first time + * @low_pattern: indicates the initial data pattern for writing data from low addresses to high addresses + * @high_pattern: indicates the initial data pattern for writing data from high addresses to low addresses + * @sval: The value required or on the data pattern for each modification + * @offset: indicates the bit offset when the memory is written for the first time. low_pattern = p1 >> offset + * + * Use the "move inverse-32bit" algorithm, which takes 32 write operations as a cycle, each write operation + * After doing, for low address to high address write memory, write data pattern needs to move 1 bit left; + * For high address to low address write memory, write data pattern needs to be shifted 1 bit to the right. + * + * Returns 0 on success; Return 1 on failure + */ +static int moving_inversions32(char *desc, int iter, uint32 p1, uint32 low_pattern, uint32 high_pattern, int sval, int offset) +{ + int i, j, k = 0, done; + uint32 *pe; + uint32 *start, *end; + uint32 pattern = 0; + uint32 p3 = sval << 31; + + if (fail) { + sprintf(desc, "No test."); + return FT_DDR_ERR; + } + + FAC_LOG_DBG(GRTD_LOG_DEBUG, "Iter:%d P1:0x%x low_pattern:0x%x high_pattern:0x%x sval:%d offset:%d.\n", + iter, p1, low_pattern, high_pattern, sval, offset); + /* Writes pattern values to the test memory area from low to high addresses */ + for (j = 0; j < segs; j++) { + start = v->map[j].start; + end = v->map[j].end; + pe = start; + pp = start; + done = 0; + k = offset; + pattern = p1; + do { + /* Check for overflow */ + if (pe + SPINSZ > pe) { + pe += SPINSZ; + } else { + pe = end; + } + if (pe >= end) { + pe = end; + done++; + } + if (pp == pe) { + break; + } + while (pp < pe) { + *pp = pattern; + if (++k >= 32) { + pattern = low_pattern; + k = 0; + } else { + pattern = pattern << 1; + pattern |= sval; + } + pp++; + } + } while (!done); + FT_DDR_SHOW(); + } + + for (i = 0; i < iter; i++) { + /* Validate write data, from low address to high address, write pattern value to test memory area */ + for (j = 0; j < segs; j++) { + start = v->map[j].start; + end = v->map[j].end; + pe = start; + pp = start; + done = 0; + k = offset; + pattern = p1; + do { + /* Check for overflow */ + if (pe + SPINSZ > pe) { + pe += SPINSZ; + } else { + pe = end; + } + if (pe >= end) { + pe = end; + done++; + } + if (pp == pe) { + break; + } + + while (pp < pe) { + if (*pp != pattern) { + FAC_LOG_DBG(GRTD_LOG_ERR, "[%p] should be 0x%x,but is 0x%x.\n", pp, pattern, *pp); + sprintf(desc, "[%p] should be 0x%x,but is 0x%x.\n", pp, pattern, *pp); + fail = 1; + return FT_DDR_ERR; + } + *pp = ~pattern; + if (++k >= 32) { + pattern = low_pattern; + k = 0; + } else { + pattern = pattern << 1; + pattern |= sval; + } + pp++; + } + } while (!done); + FT_DDR_SHOW(); + } + + /* Validate write data, from high address to low address, write pattern value to test memory area */ + pattern = low_pattern; + if (0 != (k = (k - 1) & 31)) { + pattern = (pattern << k); + if (sval) + pattern |= ((sval << k) - 1); + } + k++; + for (j = segs - 1; j >= 0; j--) { + start = v->map[j].start; + end = v->map[j].end; + pp = end - 1; + pe = end - 1; + done = 0; + do { + /* Check for underflow */ + if (pe - SPINSZ < pe) { + pe -= SPINSZ; + } else { + pe = start; + } + if (pe <= start) { + pe = start; + done++; + } + if (pp == pe) { + break; + } + + do { + if (*pp != ~pattern) { + FAC_LOG_DBG(GRTD_LOG_ERR, "[%p] should be 0x%x,but is 0x%x.\n", pp, ~pattern, *pp); + sprintf(desc, "[%p] should be 0x%x,but is 0x%x.\n", pp, ~pattern, *pp); + fail = 1; + return FT_DDR_ERR; + } + *pp = pattern; + if (--k <= 0) { + pattern = high_pattern; + k = 32; + } else { + pattern = pattern >> 1; + pattern |= p3; + } + } while (pp-- > pe); + } while (!done); + FT_DDR_SHOW(); + } + } + + return FT_DDR_SUCCESS; +} + +/** + * modtst + * @offset: indicates the offset address of the P1 value + * @iter: number of times to write P2 + * @p1: indicates written data 1 + * @p2: indicates written data 2 + * + * Write p1 data to the offset address of 20 * n + offset in the test memory area; To other + * Offset address write p2 data, repeat iter times; Verify the offset address of 20 * n + offset + * Whether the data written is correct. + * + * Returns 0 on success; Return 1 on failure + */ +static int modtst(char *desc, int offset, int iter, uint32 p1, uint32 p2) +{ + int j, k, l, done; + uint32 *pe; + uint32 *start, *end; + + if (fail) { + sprintf(desc, "No test."); + return FT_DDR_ERR; + } + + FAC_LOG_DBG(GRTD_LOG_DEBUG, "offset:%d Iter:%d P1:0x%x p2:0x%x.\n", offset, iter, p1, p2); + /* Write p1 data to the offset address of 20 * n + offset in the test memory area*/ + for (j = 0; j < segs; j++) { + start = v->map[j].start; + end = v->map[j].end; + pe = (uint32 *) start; + pp = start + offset; + done = 0; + do { + /* Check for overflow */ + if (pe + SPINSZ > pe) { + pe += SPINSZ; + } else { + pe = end; + } + if (pe >= end) { + pe = end; + done++; + } + if (pp == pe) { + break; + } + + for (; pp < pe; pp += MOD_SZ) { + *pp = p1; + } + + } while (!done); + FT_DDR_SHOW(); + } + + /* Write p2 data to other offset addresses, repeat iter times */ + for (l = 0; l < iter; l++) { + for (j = 0; j < segs; j++) { + start = v->map[j].start; + end = v->map[j].end; + pe = (uint32 *) start; + pp = start; + done = 0; + k = 0; + do { + /* Check for overflow */ + if (pe + SPINSZ > pe) { + pe += SPINSZ; + } else { + pe = end; + } + if (pe >= end) { + pe = end; + done++; + } + if (pp == pe) { + break; + } + + for (; pp < pe; pp++) { + if (k != offset) { + *pp = p2; + } + if (++k > MOD_SZ - 1) { + k = 0; + } + } + + } while (!done); + FT_DDR_SHOW(); + } + } + + /* Now check every nth location */ + for (j = 0; j < segs; j++) { + start = v->map[j].start; + end = v->map[j].end; + pe = (uint32 *) start; + pp = start + offset; + done = 0; + do { + /* Check for overflow */ + if (pe + SPINSZ > pe) { + pe += SPINSZ; + } else { + pe = end; + } + if (pe >= end) { + pe = end; + done++; + } + if (pp == pe) { + break; + } + + for (; pp < pe; pp += MOD_SZ) { + if (*pp != p1) { + FAC_LOG_DBG(GRTD_LOG_ERR, "[%p] should be 0x%x,but is 0x%x.\n", pp, p1, *pp); + sprintf(desc, "[%p] should be 0x%x,but is 0x%x.\n", pp, p1, *pp); + fail = 1; + return FT_DDR_ERR; + } + } + + } while (!done); + FT_DDR_SHOW(); + } + + return FT_DDR_SUCCESS; +} + +/** + * march_c + * @iter: number of repetitions + * @p1: The data is written for pattern1 + * @p2: The data is written for pattern2 + * + * Low address to high address, read p1, write p2, read p2, write p1 + * High address to low address, read p1, write p2, read p2, write p1 + * + * No return value + */ +static int march_c(char *desc, int iter, uint32 p1, uint32 p2) +{ + int i, j, done; + uint32 *pe; + uint32 *start, *end; + uint32 p_temp; + + if (fail) { + sprintf(desc, "No test."); + return FT_DDR_ERR; + } + + FAC_LOG_DBG(GRTD_LOG_DEBUG, "Iter:%d P1:0x%x p2:0x%x.\n", iter, p1, p2); + /* From low address to high address, write p1 */ + for (j = 0; j < segs; j++) { + start = v->map[j].start; + end = v->map[j].end; + pe = start; + pp = start; + done = 0; + do { + /* Check for overflow */ + if (pe + SPINSZ > pe) { + pe += SPINSZ; + } else { + pe = end; + } + if (pe >= end) { + pe = end; + done++; + } + if (pp == pe) { + break; + } + for (; pp < pe; pp++) { + *pp = p1; + } + } while (!done); + FT_DDR_SHOW(); + } + + /* From low address to high address, read p1, write p2, read p2 again, write p1 */ + for (i = 0; i < 2; i++) { + for (j = 0; j < segs; j++) { + start = v->map[j].start; + end = v->map[j].end; + pe = start; + pp = start; + done = 0; + do { + if (pe + SPINSZ > pe) { + pe += SPINSZ; + } else { + pe = end; + } + if (pe >= end) { + pe = end; + done++; + } + if (pp == pe) { + break; + } + for (; pp < pe; pp++) { + if (*pp != p1) { + FAC_LOG_DBG(GRTD_LOG_ERR, "[%p] should be 0x%x,but is 0x%x.\n", pp, p1, *pp); + sprintf(desc, "[%p] should be 0x%x,but is 0x%x.\n", pp, p1, *pp); + fail = 1; + return FT_DDR_ERR; + } + *pp = p2; + } + + } while (!done); + FT_DDR_SHOW(); + } + /* p1 and p2 values are exchanged */ + p_temp = p1; + p1 = p2; + p2 = p_temp; + } + + /* High address to low address, read p1, write p2, read p2, write p1 */ + for (i = 0; i < 2; i++) { + for (j = 0; j < segs; j++) { + start = v->map[j].start; + end = v->map[j].end; + pe = end - 1; + pp = end - 1; + done = 0; + do { + /* Check for underflow */ + if (pe - SPINSZ < pe) { + pe -= SPINSZ; + } else { + pe = start; + } + if (pe <= start) { + pe = start; + done++; + } + if (pp == pe) { + break; + } + + do { + if (*pp != p1) { + FAC_LOG_DBG(GRTD_LOG_ERR, "[%p] should be 0x%x,but is 0x%x.\n", pp, p1, *pp); + sprintf(desc, "[%p] should be 0x%x,but is 0x%x.\n", pp, p1, *pp); + fail = 1; + return FT_DDR_ERR; + } + *pp = p2; + } while (pp-- > pe); + + } while (!done); + FT_DDR_SHOW(); + } + + /* p1 and p2 values are exchanged */ + p_temp = p1; + p1 = p2; + p2 = p_temp; + } + + /* Verify the last p1 value written */ + for (j = 0; j < segs; j++) { + start = v->map[j].start; + end = v->map[j].end; + pe = start; + pp = start; + done = 0; + do { + if (pe + SPINSZ > pe) { + pe += SPINSZ; + } else { + pe = end; + } + if (pe >= end) { + pe = end; + done++; + } + if (pp == pe) { + break; + } + for (; pp < pe; pp++) { + if (*pp != p1) { + FAC_LOG_DBG(GRTD_LOG_ERR, "[%p] should be 0x%x,but is 0x%x.\n", pp, p1, *pp); + sprintf(desc, "[%p] should be 0x%x,but is 0x%x.\n", pp, p1, *pp); + fail = 1; + return FT_DDR_ERR; + } + } + + } while (!done); + FT_DDR_SHOW(); + } + + return FT_DDR_SUCCESS; +} + +/** + * march_g + * @iter: number of repetitions + * @p1: The data is written for pattern1 + * @p2: The data is written for pattern2 + * + * From low address to high address, for the same address: read p1, write p2, read p2, write p1 + * From low address to high address, for the same address: read p2, write p1 and then p2 + * High address to low address, for the same address: read p2, write p1 first, write p2, then write p1 + * High address to low address, for the same address: read p1, first write p2, then write p1 + * + * No return value + */ +static int march_g(char *desc, int iter, uint32 p1, uint32 p2) +{ + int j, done; + uint32 *pe; + uint32 *start, *end; + + if (fail) { + sprintf(desc, "No test."); + return FT_DDR_ERR; + } + + FAC_LOG_DBG(GRTD_LOG_DEBUG, "Iter:%d P1:0x%x p2:0x%x.\n", iter, p1, p2); + /* From low address to high address, write p1 */ + for (j = 0; j < segs; j++) { + start = v->map[j].start; + end = v->map[j].end; + pe = start; + pp = start; + done = 0; + do { + /* Check for overflow */ + if (pe + SPINSZ > pe) { + pe += SPINSZ; + } else { + pe = end; + } + if (pe >= end) { + pe = end; + done++; + } + if (pp == pe) { + break; + } + for (; pp < pe; pp++) { + *pp = p1; + } + } while (!done); + FT_DDR_SHOW(); + } + + /* From low address to high address, read p1, write p2, read p2, and write p1 to the same address */ + for (j = 0; j < segs; j++) { + start = v->map[j].start; + end = v->map[j].end; + pe = start; + pp = start; + done = 0; + do { + if (pe + SPINSZ > pe) { + pe += SPINSZ; + } else { + pe = end; + } + if (pe >= end) { + pe = end; + done++; + } + if (pp == pe) { + break; + } + for (; pp < pe; pp++) { + if (*pp != p1) { + FAC_LOG_DBG(GRTD_LOG_ERR, "[%p] should be 0x%x,but is 0x%x.\n", pp, p1, *pp); + sprintf(desc, "[%p] should be 0x%x,but is 0x%x.\n", pp, p1, *pp); + fail = 1; + return FT_DDR_ERR; + } + *pp = p2; + if (*pp != p2) { + FAC_LOG_DBG(GRTD_LOG_ERR, "[%p] should be 0x%x,but is 0x%x.\n", pp, p2, *pp); + sprintf(desc, "[%p] should be 0x%x,but is 0x%x.\n", pp, p2, *pp); + fail = 1; + return FT_DDR_ERR; + } + *pp = p1; + if (*pp != p1) { + FAC_LOG_DBG(GRTD_LOG_ERR, "[%p] should be 0x%x,but is 0x%x.\n", pp, p1, *pp); + sprintf(desc, "[%p] should be 0x%x,but is 0x%x.\n", pp, p1, *pp); + fail = 1; + return FT_DDR_ERR; + } + *pp = p2; + } + } while (!done); + FT_DDR_SHOW(); + } + + /* From low address to high address, read p2, write p1 and then p2 to the same address */ + for (j = 0; j < segs; j++) { + start = v->map[j].start; + end = v->map[j].end; + pe = start; + pp = start; + done = 0; + do { + if (pe + SPINSZ > pe) { + pe += SPINSZ; + } else { + pe = end; + } + if (pe >= end) { + pe = end; + done++; + } + if (pp == pe) { + break; + } + for (; pp < pe; pp++) { + if (*pp != p2) { + FAC_LOG_DBG(GRTD_LOG_ERR, "[%p] should be 0x%x,but is 0x%x.\n", pp, p2, *pp); + sprintf(desc, "[%p] should be 0x%x,but is 0x%x.\n", pp, p2, *pp); + fail = 1; + return FT_DDR_ERR; + } + *pp = p1; + *pp = p2; + } + } while (!done); + FT_DDR_SHOW(); + } + + /* From high address to low address, for the same address: read p2, write p1 first, write p2, and then write p1 */ + for (j = 0; j < segs; j++) { + start = v->map[j].start; + end = v->map[j].end; + pe = end - 1; + pp = end - 1; + done = 0; + do { + /* Check for underflow */ + if (pe - SPINSZ < pe) { + pe -= SPINSZ; + } else { + pe = start; + } + if (pe <= start) { + pe = start; + done++; + } + if (pp == pe) { + break; + } + + do { + if (*pp != p2) { + FAC_LOG_DBG(GRTD_LOG_ERR, "[%p] should be 0x%x,but is 0x%x.\n", pp, p2, *pp); + sprintf(desc, "[%p] should be 0x%x,but is 0x%x.\n", pp, p2, *pp); + fail = 1; + return FT_DDR_ERR; + } + *pp = p1; + *pp = p2; + *pp = p1; + } while (pp-- > pe); + + } while (!done); + FT_DDR_SHOW(); + } + + /* From high address to low address, for the same address: read p1, write p2, and then write p1 */ + for (j = 0; j < segs; j++) { + start = v->map[j].start; + end = v->map[j].end; + pe = end - 1; + pp = end - 1; + done = 0; + do { + /* Check for underflow */ + if (pe - SPINSZ < pe) { + pe -= SPINSZ; + } else { + pe = start; + } + if (pe <= start) { + pe = start; + done++; + } + if (pp == pe) { + break; + } + + do { + if (*pp != p1) { + FAC_LOG_DBG(GRTD_LOG_ERR, "[%p] should be 0x%x,but is 0x%x.\n", pp, p1, *pp); + sprintf(desc, "[%p] should be 0x%x,but is 0x%x.\n", pp, p1, *pp); + fail = 1; + return FT_DDR_ERR; + } + *pp = p2; + *pp = p1; + } while (pp-- > pe); + + } while (!done); + FT_DDR_SHOW(); + } + + /* From high address to low address, read p1 for the same address */ + for (j = 0; j < segs; j++) { + start = v->map[j].start; + end = v->map[j].end; + pe = start; + pp = start; + done = 0; + do { + if (pe + SPINSZ > pe) { + pe += SPINSZ; + } else { + pe = end; + } + if (pe >= end) { + pe = end; + done++; + } + if (pp == pe) { + break; + } + for (; pp < pe; pp++) { + if (*pp != p1) { + FAC_LOG_DBG(GRTD_LOG_ERR, "[%p] should be 0x%x,but is 0x%x.\n", pp, p1, *pp); + sprintf(desc, "[%p] should be 0x%x,but is 0x%x.\n", pp, p1, *pp); + fail = 1; + return FT_DDR_ERR; + } + } + + } while (!done); + FT_DDR_SHOW(); + } + + return FT_DDR_SUCCESS; +} + +/** + * column_operate + * @iter: number of repetitions + * @p1: The data is written for pattern1 + * @col_num: indicates the column address offset + * + * Adopts the "column operation" algorithm + * From the low address to the high address, write p1 to the (n * step + col_addr) address + * + * No return value + */ +static int column_operate(char *desc, int iter, uint32 p1, uint32 col_num) +{ + int j, k, done; + uint32 *pe; + uint32 *start, *end; + ulong n; + ulong step = 0x2000; + ulong addr; + ulong col_addr; + + if (fail) { + sprintf(desc, "No test."); + return FT_DDR_ERR; + } + + /* From the low address to the high address, write p1 to the (n * step + col_addr) address */ + for (k = 0; k < iter; k++) { + + for (j = 0; j < segs; j++) { + start = v->map[j].start; + end = v->map[j].end; + pe = start; + pp = start; + done = 0; + + if (((ulong) start % step) <= (col_num & 0x3FF) << 3) { + n = (ulong) start / step; + } else { + n = (ulong) start / step + 1; + } + do { + /* Check for overflow */ + if (pe + SPINSZ > pe) { + pe += SPINSZ; + } else { + pe = end; + } + if (pe >= end) { + pe = end; + done++; + } + if (pp >= pe) { + break; + } + do { + col_addr = (col_num & 0x3FF) << 3; + addr = n * step + col_addr; + pp = (uint32 *) addr; + if (pp >= end) + break; + *pp = p1; + n++; + } while (pp < pe); + } while (!done); + } + //FT_DDR_SHOW(); + + /* From low address to high address, verify the (n * step + col_addr) address value */ + for (j = 0; j < segs; j++) { + start = v->map[j].start; + end = v->map[j].end; + pe = start; + pp = start; + done = 0; + if (((ulong) start % step) < (col_num & 0x3FF) << 3) { + n = (ulong) start / step; + } else { + n = (ulong) start / step + 1; + } + do { + /* Check for overflow */ + if (pe + SPINSZ > pe) { + pe += SPINSZ; + } else { + pe = end; + } + if (pe >= end) { + pe = end; + done++; + } + if (pp >= pe) { + break; + } + do { + col_addr = (col_num & 0x3FF) << 3; + addr = n * step + col_addr; + pp = (uint32 *) addr; + if (pp >= end) + break; + if (*pp != p1) { + FAC_LOG_DBG(GRTD_LOG_ERR, "[%p] should be 0x%x,but is 0x%x.\n", pp, p1, *pp); + sprintf(desc, "[%p] should be 0x%x,but is 0x%x.\n", pp, p1, *pp); + fail = 1; + return FT_DDR_ERR; + } + n++; + } while (pp < pe); + } while (!done); + } + //FT_DDR_SHOW(); + } + + return FT_DDR_SUCCESS; +} + +/** + * galloping + * @p1: The data is written for pattern1 + * @p2: The data is written for pattern2 + * + * From low address to high address, write p2 to addr, read addr+1, and p1 to addr+1 + * From high address to low address, write p2 to addr, read ADDR-1, read addr, and write p1 to ADDR-1 + * + * No return value + */ +static int galloping(char *desc, uint32 p1, uint32 p2) +{ + int j, done; + uint32 *pe; + uint32 *start, *end; + + if (fail) { + sprintf(desc, "No test."); + return FT_DDR_ERR; + } + + /* From low address to high address, write p1 */ + for (j = 0; j < segs; j++) { + start = v->map[j].start; + end = v->map[j].end; + pe = start; + pp = start; + done = 0; + do { + /* Check for overflow */ + if (pe + SPINSZ > pe) { + pe += SPINSZ; + } else { + pe = end; + } + if (pe >= end) { + pe = end; + done++; + } + if (pp == pe) { + break; + } + for (; pp < pe; pp++) { + *pp = p1; + } + } while (!done); + FT_DDR_SHOW(); + } + + /* From low address to high address, write p2 to addr, read addr+1, read addr, and write p1 to addr+1 */ + for (j = 0; j < segs; j++) { + start = v->map[j].start; + end = v->map[j].end; + pe = start; + pp = start; + done = 0; + do { + if (pe + SPINSZ > pe) { + pe += SPINSZ; + } else { + pe = end; + } + if (pe >= end) { + pe = end; + done++; + } + if (pp == pe) { + break; + } + for (; pp < pe; pp++) { + if (pp + 1 >= pe) + break; + *pp = p2; + *(pp + 1) = p1; + } + *pp = p2; + + } while (!done); + FT_DDR_SHOW(); + } + + /* From low address to high address, read p2 */ + for (j = 0; j < segs; j++) { + start = v->map[j].start; + end = v->map[j].end; + pe = start; + pp = start; + done = 0; + do { + if (pe + SPINSZ > pe) { + pe += SPINSZ; + } else { + pe = end; + } + if (pe >= end) { + pe = end; + done++; + } + if (pp == pe) { + break; + } + for (; pp < pe; pp++) { + if (*pp != p2) { + FAC_LOG_DBG(GRTD_LOG_ERR, "[%p] should be 0x%x,but is 0x%x.\n", pp, p2, *pp); + sprintf(desc, "[%p] should be 0x%x,but is 0x%x.\n", pp, p2, *pp); + fail = 1; + return FT_DDR_ERR; + } + } + } while (!done); + FT_DDR_SHOW(); + } + + /* From high address to low address, write p2 to addr, read ADDR-1, read addr, and write p1 to ADDR-1 */ + for (j = 0; j < segs; j++) { + start = v->map[j].start; + end = v->map[j].end; + pe = end - 1; + pp = end - 1; + done = 0; + do { + /* Check for underflow */ + if (pe - SPINSZ < pe) { + pe -= SPINSZ; + } else { + pe = start; + } + if (pe <= start) { + pe = start; + done++; + } + if (pp == pe) { + break; + } + + do { + if (pp - 1 <= pe) + break; + *pp = p2; + *(pp - 1) = p1; + } while (pp-- > pe); + *pp = p2; + } while (!done); + FT_DDR_SHOW(); + } + + /* From high address to low address, read p2 */ + for (j = 0; j < segs; j++) { + start = v->map[j].start; + end = v->map[j].end; + pe = end - 1; + pp = end - 1; + done = 0; + do { + /* Check for underflow */ + if (pe - SPINSZ < pe) { + pe -= SPINSZ; + } else { + pe = start; + } + if (pe <= start) { + pe = start; + done++; + } + if (pp == pe) { + break; + } + + do { + if (*pp != p2) { + FAC_LOG_DBG(GRTD_LOG_ERR, "[%p] should be 0x%x,but is 0x%x.\n", pp, p2, *pp); + sprintf(desc, "[%p] should be 0x%x,but is 0x%x.\n", pp, p2, *pp); + fail = 1; + return FT_DDR_ERR; + } + } while (pp-- > pe); + + } while (!done); + FT_DDR_SHOW(); + } + + return FT_DDR_SUCCESS; +} + +#if 0 +void dma_mov_addr(int chan_id, int from_addr, int to_addr, int size) +{ + dma_tx_data_init(); + get_dma_chan_cb(chan_id); + g_dma_tx_data[chan_id][0].src_addr = from_addr; + g_dma_tx_data[chan_id][0].dest_addr = to_addr; + g_dma_tx_data[chan_id][0].size = size; + dma_move(chan_id, 1); +} +#endif + +static void block_move_use_long_type(ulong *s, ulong *d, int blk_size) +{ + uint32 k; + + for (k = 0; k < blk_size / sizeof(ulong); k++) { + *(d++) = *(s++); + } +} + +/** + * swap_blocks + * @iter: Number of repetitions + * @swap_times: indicates the number of block exchange repetitions + * @blk_size: indicates the size of each memory block + * + * The memory area to be tested is divided into n+1 blocks, with the n+1 block as a temporary swap block + * From block 1 to block n, exchange the data of two adjacent blocks + * From block n to block 1, exchange the data of two adjacent blocks + * + * No return value + */ +static int swap_blocks(char *desc, int iter, int swap_times, ulong blk_size) +{ + int i, j, done; + uint32 *pe; + uint32 *start, *end; + uint32 *ptemp; + uint32 *pprev; + uint32 *pnext; + ulong n; + int t; + int seed1, seed2; + int times; + uint32 num; + uint32 *pend; + ulong test_size; + + if (fail) { + sprintf(desc, "No test."); + return FT_DDR_ERR; + } + + iter = 1; + for (times = 0; times < iter; times++) { + start = v->map[0].start; + end = v->map[0].end; + pe = start; + pp = start; + done = 0; + seed1 = 521288629; + seed2 = 362436069; + + rand_seed(seed1, seed2); + + /* From low address to high address, write rand() */ + do { + /* Check for overflow */ + if (pe + SPINSZ > pe) { + pe += SPINSZ; + } else { + pe = end; + } + if (pe >= end) { + pe = end; + done++; + } + if (pp == pe) { + break; + } + for (; pp < pe; pp++) { + *pp = ft_rand(); + } + } while (!done); + FT_DDR_SHOW(); + + start = v->map[0].start; + end = v->map[0].end; + pe = start; + pp = start; + done = 0; + + for (t = 0; t < swap_times; t++) { + test_size = (ulong)end - (ulong)start; + n = test_size / blk_size; + FAC_LOG_DBG(GRTD_LOG_DEBUG,"start = %p, end = %p, test_size:0x%lx n = %lu\r\n", start, end, test_size, n); + + /* The last full block serves as the swap block */ + while (1) { + ptemp = (uint32 *)((ulong)start + (n + 1) * blk_size); + pend = (uint32 *)((ulong)ptemp + blk_size); + if (pend >= end) { + n--; + } else { + break; + } + } + FT_DDR_SHOW(); + FAC_LOG_DBG(GRTD_LOG_DEBUG,"n = %lu\r\n", n); + + FAC_LOG_DBG(GRTD_LOG_DEBUG,"Test form 1 to %lu.\r\n", n); + /* From the first block to the n block, the data of the two adjacent blocks is exchanged */ + for (i = 0; (ulong)i < n; i++) { + pprev = (uint32 *) ((ulong) start + i * blk_size); + for (j = i + 1; (ulong)j <= n; j++) { + /* All data of the current block i is written to the swap block */ + pprev = (uint32 *) ((ulong) start + i * blk_size); + ptemp = (uint32 *) ((ulong) start + (n + 1) * blk_size); + //FAC_LOG_DBG(GRTD_LOG_DEBUG,"pprev:%p ptemp:%p.\r\n", pprev, ptemp); +#ifndef USE_DMA + block_move_use_long_type((ulong *)pprev, (ulong *)ptemp, blk_size); +#else + ret = dma_mov_addr(0, (ulong)pprev, (ulong)ptemp, blk_size); + if (ret) { + fail = 1; + return FT_DDR_ERR; + } + //return; +#endif + + /* All the data of the current i+1 block is written to the current i block */ + pprev = (uint32 *)((ulong) start + i * blk_size); + pnext = (uint32 *)((ulong) start + j * blk_size); + //FAC_LOG_DBG(GRTD_LOG_DEBUG,"pprev:%p pnext:%p.\r\n", pprev, pnext); +#ifndef USE_DMA + block_move_use_long_type((ulong *)pnext, (ulong *)pprev, blk_size); +#else + ret = dma_mov_addr(0, (ulong) pnext, (ulong) pprev, blk_size); + if (ret) { + fail = 1; + return FT_DDR_ERR; + } + +#endif + /* All the data of the current switch block is written to the current i+1 block */ + pnext = (uint32 *) ((ulong) start + j * blk_size); + ptemp = (uint32 *) ((ulong) start + (n + 1) * blk_size); + //FAC_LOG_DBG(GRTD_LOG_DEBUG,"pnext:%p ptemp:%p.\r\n", pnext, ptemp); +#ifndef USE_DMA + block_move_use_long_type((ulong *)ptemp, (ulong *)pnext, blk_size); +#else + ret = dma_mov_addr(0, (ulong) ptemp, (ulong) pnext, blk_size); + if (ret) { + fail = 1; + return FT_DDR_ERR; + } + +#endif + //FAC_LOG_DBG(GRTD_LOG_DEBUG,"test time %d-%d\r\n", i, j); + } + FT_DDR_SHOW(); + } + + FAC_LOG_DBG(GRTD_LOG_DEBUG,"Test form %lu to 1.\r\n", n); + ptemp = (uint32 *) ((ulong) start + (n + 1) * blk_size); + /* From block n to block 1, the data of the two adjacent blocks is exchanged */ + for (i = n; i > 0; i--) { + pprev = (uint32 *) ((ulong) start + i * blk_size); + for (j = i - 1; j >= 0; j--) { + /* All data of the current block i is written to the swap block */ + pprev = (uint32 *) ((ulong) start + i * blk_size); + ptemp = (uint32 *) ((ulong) start + (n + 1) * blk_size); + //FAC_LOG_DBG(GRTD_LOG_DEBUG,"pprev:%p ptemp:%p.\r\n", pprev, ptemp); +#ifndef USE_DMA + block_move_use_long_type((ulong *)pprev, (ulong *)ptemp, blk_size); +#else + ret = dma_mov_addr(0, (ulong) pprev, (ulong) ptemp, blk_size); + if (ret) { + fail = 1; + return FT_DDR_ERR; + } + +#endif + /* All the data of the current block I-1 is written to the current block i */ + pnext = (uint32 *) ((ulong) start + j * blk_size); + pprev = (uint32 *) ((ulong) start + i * blk_size); + //FAC_LOG_DBG(GRTD_LOG_DEBUG,"pnext:%p pprev:%p.\r\n", pnext, pprev); +#ifndef USE_DMA + block_move_use_long_type((ulong *)pnext, (ulong *)pprev, blk_size); +#else + ret = dma_mov_addr(0, (ulong) pnext, (ulong) pprev, blk_size); + if (ret) { + fail = 1; + return FT_DDR_ERR; + } + +#endif + /* All the data of the current switch block is written to the current block i-1 */ + pnext = (uint32 *) ((ulong) start + j * blk_size); + ptemp = (uint32 *) ((ulong) start + (n + 1) * blk_size); + //FAC_LOG_DBG(GRTD_LOG_DEBUG,"pnext:%p ptemp:%p.\r\n", pnext, ptemp); +#ifndef USE_DMA + block_move_use_long_type((ulong *)ptemp, (ulong *)pnext, blk_size); +#else + ret = dma_mov_addr(0, (ulong) ptemp, (ulong) pnext, blk_size); + if (ret) { + fail = 1; + return FT_DDR_ERR; + } + +#endif + //FAC_LOG_DBG(GRTD_LOG_DEBUG,"test time %d-%d\r\n", i, j); + } + FT_DDR_SHOW(); + } + + /* Low address to high address, read rand() */ + pe = start; + pp = start; + done = 0; + end = (uint32 *) ((ulong)pend - blk_size); + rand_seed(seed1, seed2); + do { + /* Check for overflow */ + if (pe + SPINSZ > pe) { + pe += SPINSZ; + } else { + pe = end; + } + if (pe >= end) { + pe = end; + done++; + } + if (pp == pe) { + break; + } + for (; pp < pe; pp++) { + num = ft_rand(); + if (*pp != num) { + FAC_LOG_DBG(GRTD_LOG_ERR, "[%p] should be 0x%x,but is 0x%x.\n", pp, num, *pp); + sprintf(desc, "[%p] should be 0x%x,but is 0x%x.\n", pp, num, *pp); + fail = 1; + return FT_DDR_ERR; + } + } + } while (!done); + FT_DDR_SHOW(); + } + } + + return FT_DDR_SUCCESS; +} + +/** + * ft_ddr_test_init + * + * Initializes the area of memory to be tested, defaulting to all ranges allowed by the factory test + * + * No return valu + */ +void ft_ddr_test_init(void *start, size_t size) +{ + int i; + + v->rdtsc = 1; + v->msegs = 1; /* The number of memory areas currently set for testing is 1 */ + fail = 0; + segs = 1; + + FAC_LOG_DBG(GRTD_LOG_ERR, "star:%p size:0x%lx(%lu MB).\n", start, size, size / 1024 / 1024); + for (i = 0; i < v->msegs; i++) { + v->pmap[i].start = (ulong)start; + v->pmap[i].end = ((ulong)start + size); + v->map[i].start = (uint32 *)start; + v->map[i].end = (uint32 *)((ulong)start + size); + } +} + +/** + * ddr_half_mov_inv_random_pat + * + * Use "half-move inversion" algorithm to write memory address from low address to high address; + * First write p1 data format to the test memory area, and verify that the written data is correct; + * Write ~p1 data format to the test memory area, and verify that the written data is correct; + * + * Returns 0 on success; Return 1 on failure + */ +static int ddr_half_mov_inv_random_pat(char *desc) +{ + int i, j, done, seed1, seed2; + uint32 *pe; + uint32 *start, *end; + uint32 num; + + FAC_LOG_DBG(GRTD_LOG_DEBUG, "ddr_half_mov_inv_random_pat test.\n"); + if (fail) { + sprintf(desc, "No test."); + return FT_DDR_ERR; + } + /* Initialize memory with initial sequence of random numbers. */ + seed1 = 521288629 + v->pass; + seed2 = 362436069 - v->pass; + rand_seed(seed1, seed2); + + for (j = 0; j < segs; j++) { + start = v->map[j].start; + end = v->map[j].end; + pe = start; + pp = start; + done = 0; + do { + /* Check for overflow */ + if (pe + SPINSZ > pe) { + pe += SPINSZ; + } else { + pe = end; + } + if (pe >= end) { + pe = end; + done++; + } + if (pp == pe) { + break; + } + for (; pp < pe; pp++) { + *pp = ft_rand(); + } + } while (!done); + printf("."); + } + + /* Do moving inversions test. Check for initial pattern and then + * write the complement for each memory location. Test from bottom + * up and then from the top down. + */ + for (i = 0; i < 2; i++) { + rand_seed(seed1, seed2); + for (j = 0; j < segs; j++) { + start = v->map[j].start; + end = v->map[j].end; + pe = start; + pp = start; + done = 0; + do { + /* Check for overflow */ + if (pe + SPINSZ > pe) { + pe += SPINSZ; + } else { + pe = end; + } + if (pe >= end) { + pe = end; + done++; + } + if (pp == pe) { + break; + } + + for (; pp < pe; pp++) { + num = ft_rand(); + if (i) { + num = ~num; + } + if (*pp != num) { + FAC_LOG_DBG(GRTD_LOG_ERR, "[%p] should be 0x%x,but is 0x%x.\n", pp, num, *pp); + sprintf(desc, "[%p] should be 0x%x,but is 0x%x.\n", pp, num, *pp); + fail = 1; + return FT_DDR_ERR; + } + *pp = ~num; + } + } while (!done); + } + } + + return FT_DDR_SUCCESS; +} + +/** + * ddr_mov_inv_random_pat + * + * Use the "move inversion" algorithm to write memory addresses from low to high and from high to address; + * First write p1 data format to the test memory area, and verify that the written data is correct; + * Write ~p1 data format to the test memory area, and verify that the written data is correct; + * + * Returns 0 on success; Return 1 on failure + */ +static int ddr_mov_inv_random_pat(char *desc) +{ + /* Random Data */ + p1 = ft_rand(); + p2 = ~p1; + FAC_LOG_DBG(GRTD_LOG_DEBUG, "ddr_mov_inv_random_pat test.\n"); + return moving_inversions(desc, 2, p1, p2); +} + +/** + * ddr_mov_inv_0_1 + * @show: indicates the information output control parameter + * + * Use the "move reversal" algorithm + * Data format :p1 = 0; p2 = ~0; Or p1 = ~0; p2 = 0; + * + * Returns 0 on success; Return 1 on failure + */ +static int ddr_mov_inv_0_1(char *desc) +{ + static unsigned int test_times = 0; + + test_times++; + + FAC_LOG_DBG(GRTD_LOG_DEBUG, "ddr_mov_inv_0_1 test.\n"); + /* Moving inversions, all ones and zeros */ + if (test_times % 2 == 1) { + p1 = 0; + p2 = ~p1; + } else { + /* Switch patterns */ + p2 = p1; + p1 = ~p2; + } + + return moving_inversions(desc, 3, p1, p2); +} + +/** + * ddr_mov_inv_8_pat + * @show: indicates the information output control parameter + * + * Use the "move reversal" algorithm + * Data format: + * After each call to this function, p0 moves 1 bit to the left + * p1 = p0; p2 = ~p0; Or p1 = ~p0; p2 = p0; + * + * Returns 0 on success; Return 1 on failure + */ +static int ddr_mov_inv_8_pat(char *desc) +{ + static int times = 0; + + FAC_LOG_DBG(GRTD_LOG_DEBUG, "ddr_mov_inv_8_pat test.\n"); + /* Moving inversions, 8 bit wide walking ones and zeros. */ + if (times == 0) { + p0 = 0x80; + } else { + p0 = p0 >> 1; + } + p1 = p0 | (p0 << 8) | (p0 << 16) | (p0 << 24); + + if (times % 2 == 0) { + p2 = ~p1; + } else { + /* Switch patterns */ + p2 = p1; + p1 = ~p2; + } + times++; + + if (times >= 8) { + times = 0; + } + + return moving_inversions(desc, 3, p1, p2); +} + +/** + * ddr_mov_inv_32_pat + * @show: indicates the information output control parameter + * + * Use the "Move inversion 32" algorithm + * + * Returns 0 on success; Return 1 on failure + */ +static int ddr_mov_inv_32_pat(char *desc) +{ + static int times = 0; + static unsigned int test_times = 0; + + FAC_LOG_DBG(GRTD_LOG_DEBUG, "ddr_mov_inv_32_pat test.\n"); + test_times++; + if (times == 0) { + p1 = 1; + } else { + p1 = p1 << 1; + times ++; + if (times >= 32) + times = 0; + } + + if (moving_inversions32(desc, 2, p1, 1, 0x80000000, 0, times) || + moving_inversions32(desc, 2, ~p1, 0xfffffffe, 0x7fffffff, 1, times)) { + return FT_DDR_ERR; + } + + return FT_DDR_SUCCESS; +} + +/** + * ddr_mod20_random_pat + * @show: indicates the information output control parameter + * + * Adopts the "module 20" algorithm + * Data format: + * p1 = ft_rand(); p2 = ~ft_rand(); Or p1 = ~ft_rand(); p2 = ft_rand(); + * + * Returns 0 on success; Return 1 on failure + */ +static int ddr_mod20_random_pat(char *desc) +{ + static int mod20_rand_times = 0; + + FAC_LOG_DBG(GRTD_LOG_DEBUG, "ddr_mod20_random_pat test.\n"); + /* Modulo 20 check, Random pattern */ + if (mod20_rand_times % 40 == 0) { + p1 = ft_rand(); + mod20_rand_times = 0; + } else { + mod20_rand_times++; + } + + if (mod20_rand_times % 2 == 0) { + p2 = ~p1; + } else { + /* Switch patterns */ + p2 = p1; + p1 = ~p2; + } + + return modtst(desc, mod20_rand_times, 3, p1, p2); +} + +/** + * ddr_mod20_0_1_pat + * @show: indicates the information output control parameter + * + * Adopts the "module 20" algorithm + * Data format :p1 = 0; p2 = ~0; Or p1 = ~0; p2 = 0; + * + * Returns 0 on success; Return 1 on failure + */ +static int ddr_mod20_0_1_pat(char *desc) +{ + static int ddr_mod20_0_1_times = 0; + int times; + + FAC_LOG_DBG(GRTD_LOG_DEBUG, "ddr_mod20_0_1_pat test.\n"); + /* Modulo 20 check, all ones and zeros */ + p1 = 0; + times = ddr_mod20_0_1_times % MOD_SZ; + ddr_mod20_0_1_times++; + + if (times % 2 == 0) { + p2 = ~p1; + /* modtst(times, 3, p1, p2); */ + } else { + /* Switch patterns */ + p2 = p1; + p1 = ~p2; + /* modtst(times, 3, p1, p2); */ + } + + return modtst(desc, times, 3, p1, p2); +} + +/** + * ddr_mod20_8_pat + * @show: indicates the information output control parameter + * + * Adopts the "module 20" algorithm + * Data format: + * After each call to this function, p0 moves 1 bit to the left + * p1 = p0; p2 = ~p0; Or p1 = ~p0; p2 = p0; + * + * Returns 0 on success; Return 1 on failure + */ +static int ddr_mod20_8_pat(char *desc) +{ + static int pass = 0; + static int ddr_mod20_8_pat_times = 0; + int times; + + FAC_LOG_DBG(GRTD_LOG_DEBUG, "ddr_mod20_8_pat test.\n"); + /* Modulo 20 check, 8 bit pattern */ + pass = ddr_mod20_8_pat_times / MOD_SZ; + pass = pass % 8; + if (pass == 0) { + p0 = 0x80; + } else { + p0 = p0 >> 1; + } + + p1 = p0 | (p0 << 8) | (p0 << 16) | (p0 << 24); + + times = ddr_mod20_8_pat_times % MOD_SZ; + if (times % 2 == 0) { + p2 = ~p1; + } else { + /* Switch patterns */ + p2 = p1; + p1 = ~p2; + } + ddr_mod20_8_pat_times ++; + + return modtst(desc, times, 2, p1, p2); +} + +static int ddr_addr_walking(char *desc) +{ + FAC_LOG_DBG(GRTD_LOG_DEBUG, "ddr_addr_walking test.\n"); + return addrress_walking(desc); +} + +static int ddr_march_c(char *desc) +{ + static unsigned int test_times = 0; + + FAC_LOG_DBG(GRTD_LOG_DEBUG, "ddr_march_c test.\n"); + test_times++; + if (test_times == 1) { + p1 = 0; + } else { + p1 = ft_rand(); + } + p2 = ~p1; + + return march_c(desc, 1, p1, p2); +} + +static int ddr_march_g(char *desc) +{ + static unsigned int test_times = 0; + + FAC_LOG_DBG(GRTD_LOG_DEBUG, "ddr_march_g test.\n"); + test_times++; + if (test_times == 1) { + p1 = 0; + } else { + p1 = ft_rand(); + } + p2 = ~p1; + + return march_g(desc, 1, p1, p2); +} + +static int ddr_galloping(char *desc) +{ + static unsigned int test_times=0; + + FAC_LOG_DBG(GRTD_LOG_DEBUG, "ddr_galloping test.\n"); + test_times ++; + if (test_times == 1) { + p1 = 0; + } else { + p1 = ft_rand(); + } + p2 = ~p1; + + return galloping(desc, p1, p2); +} + +static int ddr_column_operate(char *desc) +{ + int i; + + FAC_LOG_DBG(GRTD_LOG_DEBUG, "ddr_column_operate test.\n"); + for (i = 0; i < 1023; i++) { + p1 = ~i; + /* column_operate(1, p1, i); */ + if (column_operate(desc, 1, p1, i)) { + return FT_DDR_ERR; + } + if (i % 100 == 0) { + FT_DDR_SHOW(); + } + } + + return FT_DDR_SUCCESS; +} + +static int ddr_swap_blocks(char *desc) +{ + static unsigned int test_times = 0; + ulong blk_size; + int ret; + int swap_times = 1; + struct vars v_tmp; + + FAC_LOG_DBG(GRTD_LOG_DEBUG, "ddr_swap_blocks test.\n"); + test_times++; + blk_size = (ulong)blk_size_array[1]; /* 24MB */ + + memcpy(&v_tmp, v, sizeof(struct vars)); + if (((ulong)v->map[0].end - (ulong)v->map[0].start) > MEMORY_SIZE_1G) { + FAC_LOG_DBG(GRTD_LOG_DEBUG, "set memory size to 0x%lx.\n", MEMORY_SIZE_1G); + v->map[0].end = (unsigned int *)((ulong)v->map[0].start + MEMORY_SIZE_1G); + } + ret = swap_blocks(desc, test_times, swap_times, blk_size); + memcpy(v, &v_tmp, sizeof(struct vars)); + + return ret; +} diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/hw_test/hw_test_app/hw_dram.c b/platform/broadcom/sonic-platform-modules-micas/common/app/hw_test/hw_test_app/hw_dram.c new file mode 100644 index 00000000000..16f24042650 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/app/hw_test/hw_test_app/hw_dram.c @@ -0,0 +1,804 @@ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +int platform_fac_dbg = GRTD_LOG_NONE; +static int do_mlock = 1; +static ulong mem_test_data1 = sizeof(ulong) == 4 ? 0x55555555UL : 0x5555555555555555ULL; +static ulong mem_test_data2 = sizeof(ulong) == 4 ? 0xAAAAAAAAUL : 0xAAAAAAAAAAAAAAAAULL; + +int dram_wr_main(int argc, char **argv) +{ + printf("%s, %d, %d, %s\r\n", __FUNCTION__, __LINE__, argc, argv[0]); + return 0; +} + +int dram_rd_main(int argc, char **argv) +{ + int fd, i, ret; + unsigned char buffer[1024]; + memset(buffer, 0, 1024); + argc = argc; + argv = argv; + if ((fd = open("/dev/mem",O_RDONLY, S_IRWXU | S_IRWXG | S_IRWXO)) < 0 ) { + printf("xxxx:%s\r\n", strerror(errno)); + return fd; + } + + if ((ret = lseek(fd, 0x1f400000, SEEK_SET)) < 0) { + printf("llseek:%s\r\n", strerror(errno)); + close(fd); + return ret; + } + if ((ret = read(fd, buffer, 1024)) < 0) { + printf("read:%s\r\n", strerror(errno)); + close(fd); + return ret; + } + + for (i = 0; i < 1024; i++) { + printf("%02x ", buffer[i]); + if ((i + 1) % 16 == 0) { + printf("\r\n"); + } + } + printf("\r\n"); + + close(fd); + return 0; +} + +int dram_chk_main(int argc, char **argv) +{ + printf("%s, %d, %d, %s\r\n", __FUNCTION__, __LINE__, argc, argv[0]); + return 0; +} + +static int dram_test_arg_pars(int argc, char **argv, int *simple, int *all, int *debug) +{ + switch(argc) { + case 1: + *simple = 1; + *all = 0; + *debug = 0; + return 0; + case 2: + if (strcmp(argv[1], "simple") == 0) { + *simple = 1; + *all = 0; + *debug = 0; + } else if (strcmp(argv[1], "complex") == 0) { + *simple = 0; + *all = 0; + *debug = 0; + } else if (strcmp(argv[1], "debug") == 0) { + *simple = 1; + *all = 0; + *debug = 1; + } else { + break; + } + return 0; + case 3: + if (strcmp(argv[1], "simple") == 0 && strcmp(argv[2], "debug") == 0) { + *simple = 1; + *all = 0; + *debug = 1; + } else if (strcmp(argv[1], "complex") == 0) { + if (strcmp(argv[2], "some") == 0) { + *simple = 0; + *all = 0; + *debug = 0; + } else if (strcmp(argv[2], "all") == 0) { + *simple = 0; + *all = 1; + *debug = 0; + } else if (strcmp(argv[2], "debug") == 0) { + *simple = 0; + *all = 0; + *debug = 1; + } + } else { + break; + } + return 0; + case 4: + if (strcmp(argv[1], "complex") == 0) { + if (strcmp(argv[2], "some") == 0 && strcmp(argv[3], "debug") == 0) { + *simple = 0; + *all = 0; + *debug = 1; + } else if (strcmp(argv[2], "all") == 0 && strcmp(argv[3], "debug") == 0) { + *simple = 0; + *all = 1; + *debug = 1; + } else { + break; + } + } else { + break; + } + return 0; + default: + break; + } + + return -1; +} + +int platform_devfile_read(const char *filename, char *buf, int size, int offset) +{ + int fd; + int nread; + int ret; + + if (filename == NULL || buf == NULL) { + FAC_LOG_DBG(GRTD_LOG_ERR, "param is error!\n"); + return FAC_TEST_FAIL; + } + ret = FAC_TEST_OK; + if ((fd = open(filename, O_RDONLY | O_SYNC)) < 0) { + FAC_LOG_DBG(GRTD_LOG_ERR, "ERROR: Open file[%s] failed(%s)!\n", filename, strerror(errno)); + return FAC_TEST_FAIL; + } + + ret = lseek(fd, offset, SEEK_SET); + if (ret < 0) { + FAC_LOG_DBG(GRTD_LOG_ERR, "ERROR: lseek file[%s] error(%s)!\n", filename, strerror(errno)); + ret = FAC_TEST_FAIL; + goto error; + } + + nread = read(fd, buf, size); + if (nread < 0) { + FAC_LOG_DBG(GRTD_LOG_ERR, "ERROR: Read file[%s] error(%s)!\n", filename, strerror(errno)); + ret = FAC_TEST_FAIL; + goto error; + } + + FAC_LOG_DBG(GRTD_LOG_DEBUG, "%s read data(off:0x%x):0x%x\n", filename, offset, buf[0]); +error: + close(fd); + return ret; +} + +int platform_devfile_write(const char *filename, char *buf, int size, int offset) +{ + int fd; + int nwrite; + int ret; + + if (filename == NULL || buf == NULL) { + FAC_LOG_DBG(GRTD_LOG_ERR, "param is error!\n"); + return FAC_TEST_FAIL; + } + ret = FAC_TEST_OK; + if ((fd = open(filename, O_CREAT | O_RDWR | O_TRUNC | O_SYNC, 0)) < 0) { + FAC_LOG_DBG(GRTD_LOG_ERR, "ERROR: Open file[%s] failed(%s)!\n", filename, strerror(errno)); + return FAC_TEST_FAIL; + } + + ret = lseek(fd, offset, SEEK_SET); + if (ret < 0) { + FAC_LOG_DBG(GRTD_LOG_ERR, "ERROR: lseek file[%s] error(%s)!\n", filename, strerror(errno)); + ret = FAC_TEST_FAIL; + goto error; + } + + nwrite = write(fd, buf, size); + if (nwrite != size) { + FAC_LOG_DBG(GRTD_LOG_ERR, "ERROR: Write file[%s] error(%s)!\n", filename, strerror(errno)); + ret = FAC_TEST_FAIL; + goto error; + } + +error: + close(fd); + sync(); + return ret; +} + +int platform_get_sys_memory_size_form_cmdline(unsigned int *sys_memory_size) +{ + int ret; + char *start; + char *mem_start_string; + char mem_size_buf[FAC_MEM_SIZE_BUF_LEN]; + + /* MEMORY information area start string */ + mem_start_string = "RAMSZ="; + /* Get memory size from the /proc/octeon_info file */ + memset(mem_size_buf, 0, FAC_MEM_SIZE_BUF_LEN); + ret = platform_devfile_read("/proc/cmdline", mem_size_buf, FAC_MEM_SIZE_BUF_LEN - 1, 0); + if (ret) { + FAC_LOG_DBG(GRTD_LOG_ERR, "MEM ERROR:Read mem info fail!\n"); + return FAC_TEST_FAIL; + } + FAC_LOG_DBG(GRTD_LOG_DEBUG, "MEM:mem info[%s]\n", mem_size_buf); + + /* Extract the memory size information from the read information */ + start = strstr(mem_size_buf, mem_start_string); + if (start != NULL) { + start = start + strlen(mem_start_string); + *sys_memory_size = strtoul(start, NULL, 10); + FAC_LOG_DBG(GRTD_LOG_DEBUG, "MEM:Mem size[%d MB]\n", *sys_memory_size); + return FAC_TEST_OK; + } else { + FAC_LOG_DBG(GRTD_LOG_ERR, "MEM ERROR:Get mem size fail!\n"); + return FAC_TEST_FAIL; + } +} + +/* + * platform_simple_get_mem_space - Gets the space for the memory test + * @buf: pointer to the start address + * @size: indicates the space size + * + * return: FAC_TEST_FAIL | FAC_TEST_OK + */ +static int platform_simple_get_mem_space(void **buf, size_t *size) +{ + size_t pagesize, wantsize, alignedsize; + void *start, *aligned; + int done_mem; + ptrdiff_t pagesizemask; + + start = NULL; + done_mem = 0; + wantsize = FAC_MEM_TEST_SIZE; + pagesize = 4096; + pagesizemask = (ptrdiff_t) ~(pagesize - 1); + + while (!done_mem) { + while (!start && wantsize) { + start = (void *) malloc(wantsize); + if (!start) wantsize -= pagesize; + } + + if (!wantsize) { + FAC_LOG_DBG(GRTD_LOG_ERR, "MEM ERROR:Malloc simple space failed\n"); + return FAC_TEST_FAIL; + } + + memset(start, 0, wantsize); + *size = wantsize; + alignedsize = wantsize; + + fflush(stdout); + if (do_mlock && wantsize) { + fflush(stdout); + + if ((size_t) start % pagesize) { + aligned = (void *) ((size_t) start & pagesizemask) + pagesize; + alignedsize -= ((size_t) aligned - (size_t) start); + } else { + aligned = start; + } + + FAC_LOG_DBG(GRTD_LOG_DEBUG, "trying mlock ...start[0x%lx], size[0x%x]", (ulong)start, + (int)alignedsize); + /* Try mlock */ + if (mlock(aligned, alignedsize) < 0) { + switch(errno) { + case EAGAIN: + FAC_LOG_DBG(GRTD_LOG_ERR, "over system/pre-process limit, reducing...\n"); + free(start); + start = NULL; + wantsize -= pagesize; + break; + case ENOMEM: + FAC_LOG_DBG(GRTD_LOG_ERR, "too many pages, reducing...\n"); + free(start); + start = NULL; + wantsize -= pagesize; + break; + case EPERM: + FAC_LOG_DBG(GRTD_LOG_ERR, "insufficient permission.\n"); + FAC_LOG_DBG(GRTD_LOG_ERR, "Trying again, unlocked:\n"); + do_mlock = 0; + free(start); + start = NULL; + wantsize = FAC_MEM_TEST_SIZE; + break; + default: + FAC_LOG_DBG(GRTD_LOG_ERR, "failed for unknown reason.\n"); + do_mlock = 0; + done_mem = 1; + } + } else { + FAC_LOG_DBG(GRTD_LOG_DEBUG, "locked.\n"); + done_mem = 1; + } + } else { + done_mem = 1; + } + } + + if (!wantsize) { + FAC_LOG_DBG(GRTD_LOG_ERR, "MEM ERROR:Malloc space failed\n"); + return FAC_TEST_FAIL; + } + if (!do_mlock) { + FAC_LOG_DBG(GRTD_LOG_ERR, "MEM ERROR:Mlock mmap'ed space failed\n"); + FAC_LOG_DBG(GRTD_LOG_DEBUG, "MEM WARNING:Continuing with unlocked memory;" + " testing will be slower and less reliable.\n"); + } + *buf = start; + return FAC_TEST_OK; +} + +static int platform_simple_check_addrline(ulong *start, size_t size, char *desc) +{ + ulong *p1; + ulong j; + size_t i; + size_t physaddr; + + FAC_LOG_DBG(GRTD_LOG_DEBUG, "MEM:addr line check START[0x%lx] SIZE[0x%lx]!\n", + (ulong)start, (ulong)size); + fflush(stdout); + for (j = 0; j < 2; j++) { + p1 = start; + + fflush(stdout); + for (i = 0; i < size; i += sizeof(ulong), p1++) { + *((volatile ulong *)p1) = ((((j + i) % 2) == 0) ? (ulong)p1 : ~((ulong)p1)); + } + + fflush(stdout); + + p1 = start; + for (i = 0; i < size; i += sizeof(ulong), p1++) { + if (*((volatile ulong *)p1) != (((j + i) % 2) == 0 ? (ulong)p1 : ~((ulong)p1))) { + physaddr = (size_t)start + (i * sizeof(ulong)); + FAC_LOG_DBG(GRTD_LOG_ERR, "MEM ERROR:Possible bad address line at physical " + "address 0x%08lx.\n", physaddr); + sprintf(desc, "MEM ERROR:Possible bad address line at physical " + "address 0x%08lx.\n", physaddr); + fflush(stdout); + return FAC_TEST_FAIL; + } + } + } + fflush(stdout); + + FAC_LOG_DBG(GRTD_LOG_DEBUG, "MEM:addr line check OK!\n"); + return FAC_TEST_OK; +} +static int platform_simple_check_data(ulong *start, size_t size, char *desc) +{ + int i; + size_t j; + ulong data = 0; + ulong *p1; + ulong check_error = 0; + + /* Walking 1's Test */ + FAC_LOG_DBG(GRTD_LOG_DEBUG, "MEM:Walking 1's Test START[0x%lx] SIZE[0x%lx]!\n", + (ulong)start, (ulong)size); + for (i = 0; i < 8; i++) { + data = (data << 1) + 1; + p1 = start; + fflush(stdout); + for (j = 0; j < size; j += sizeof(ulong), p1++) { + *((volatile ulong *)p1) = data; + } + fflush(stdout); + p1 = start; + for (j = 0; j < size; j += sizeof(ulong), p1++) { + if (*((volatile ulong *)p1) != data) { + FAC_LOG_DBG(GRTD_LOG_ERR, "MEM ERROR:[0x%lx] should be 0x%lx,but is 0x%lx.\n", + (ulong)p1, data, *((volatile ulong *)p1)); + check_error++; + sprintf(desc, "MEM ERROR:[0x%lx] should be 0x%lx,but is 0x%lx.\n", + (ulong)p1, data, *((volatile ulong *)p1)); + return FAC_TEST_FAIL; + } + } + } + FAC_LOG_DBG(GRTD_LOG_DEBUG, "MEM:Walking 1's Test END!\n"); + FAC_LOG_DBG(GRTD_LOG_DEBUG, "MEM:Bus Noise Test START[0x%lx] SIZE[0x%lx]!\n", + (ulong)start, (ulong)size); + + /* Bus Noise Test */ + fflush(stdout); + p1 = start; + for (j = 0; j < size; j += sizeof(ulong), p1++) { + *((volatile ulong *)p1) = (j % 2) ? mem_test_data1 : mem_test_data2; + } + fflush(stdout); + p1 = start; + for (j = 0; j < size; j += sizeof(ulong), p1++) { + if (*((volatile ulong *)p1) != ((j % 2) ? mem_test_data1 : mem_test_data2)) { + FAC_LOG_DBG(GRTD_LOG_ERR, "MEM ERROR:[0x%lx] should be 0x%lx,but is 0x%lx.\n", + (ulong)p1, ((j % 2) ? mem_test_data1 : mem_test_data2), *((volatile ulong *)p1)); + check_error++; + sprintf(desc, "MEM ERROR:[0x%lx] should be 0x%lx,but is 0x%lx.\n", + (ulong)p1, ((j % 2) ? mem_test_data1 : mem_test_data2), *((volatile ulong *)p1)); + return FAC_TEST_FAIL; + } + } + fflush(stdout); + FAC_LOG_DBG(GRTD_LOG_DEBUG, "MEM:Bus Noise Test END!\n"); + return check_error; +} + +static void platform_simple_free_mem_space(void *buf, size_t size) +{ + if (do_mlock) { + munlock(buf, size); + } + free(buf); +} + +static int platform_simple_sdram_ecc_detect() +{ + char c; + char *loc, *next; + FILE *fp; + char file_line[FAC_FILE_LINE_LEN]; + int i, core_num, temp, ecc_error; + + i = 0; + core_num = 0; + ecc_error = 0; + + /* Open the MTD device file */ + if ((fp = fopen("/proc/interrupts", "r")) == NULL) { + FAC_LOG_DBG(GRTD_LOG_ERR, "Fopen /proc/interrupts fail!\t err_no[%d]\n", errno); + return FAC_TEST_FAIL; + } + + memset(file_line, 0, FAC_FILE_LINE_LEN); + /* Find the MTD device name available for production testing on each line in the MTD file */ + while (fgets(file_line, FAC_FILE_LINE_LEN, fp) != NULL) { + if (i == 0) { + loc = strrchr(file_line, 'U'); + core_num = strtoul(loc + 1, NULL, 10); + } + i++; + if (strstr(file_line, "LMC") != NULL) { + goto find; + } + } + FAC_LOG_DBG(GRTD_LOG_ERR, "ECC: Not find lmc info in file\n"); + fclose(fp); + return ecc_error; +find: + FAC_LOG_DBG(GRTD_LOG_DEBUG, "ECC: Get ecc info[%s]\n", file_line); + /* Gets the number of the MTD device name that can be production-tested, with the device name and device partition size delimiters as colons */ + c = ':'; + if ((loc = strchr(file_line, c))!= NULL) { + i = 0; + loc++; + while (i <= core_num) { + temp = strtoul(loc, &next, 10); + loc = next; + ecc_error += temp; + FAC_LOG_DBG(GRTD_LOG_DEBUG, "ECC: cpu %d ecc error num: %d\n", i, temp); + i++; + } + + } + + fclose(fp); + FAC_LOG_DBG(GRTD_LOG_DEBUG, "ECC: ecc error num: %d\n", ecc_error); + return ecc_error; + +} + +int platform_simple_sys_memory_test(char *desc) +{ + void *buf, *aligned; + size_t size, alignedsize, pagesize; + ptrdiff_t pagesizemask; + int ret = FAC_TEST_OK; + + /* Gets the memory space available for testing */ + if (platform_simple_get_mem_space(&buf, &size) != FAC_TEST_OK) { + ret = GRTD_SDRAM_WR_ERR; + goto ecctest; + } + FAC_LOG_DBG(GRTD_LOG_DEBUG, "MEM:Get test space success, start at [0x%lx] size[0x%lx]\n", + (ulong)buf, (ulong)size); + + /* Align 4K */ + pagesize = 4096; + pagesizemask = (ptrdiff_t) ~(pagesize - 1); + alignedsize = size; + if ((size_t) buf % pagesize) { + aligned = (void *) ((size_t) buf & pagesizemask) + pagesize; + alignedsize -= ((size_t) aligned - (size_t) buf); + } else { + aligned = buf; + } + + /* Check address line */ + if (platform_simple_check_addrline((ulong *)aligned, alignedsize, desc) != FAC_TEST_OK) { + FAC_LOG_DBG(GRTD_LOG_ERR, "MEM ERROR:Check address line failed!\n"); + ret = GRTD_SDRAM_WR_ERR; + goto _error; + } + + /* Memory read/write check */ + if (platform_simple_check_data((ulong *)aligned, alignedsize, desc)) { + FAC_LOG_DBG(GRTD_LOG_ERR, "MEM ERROR:Check data failed!\n"); + ret = GRTD_SDRAM_WR_ERR; + goto _error; + } + +_error: + platform_simple_free_mem_space(buf, size); +ecctest: + /* Memory ECC error detection */ + if (platform_simple_sdram_ecc_detect()) { + FAC_LOG_DBG(GRTD_LOG_ERR, "ERROR: ECC error occured!\n"); + ret = GRTD_SDRAM_ECC_ERR; + } + return ret; +} + +static int platform_get_system_free_mem(size_t *free_size) +{ + int len; + FILE *fp; + char *loc; + char mem_file_line[FAC_FILE_LINE_LEN]; + char mem_size[FAC_FILE_LINE_LEN]; + size_t all_free_size; + + if ((fp = fopen("/proc/meminfo", "r")) == NULL) { + FAC_LOG_DBG(GRTD_LOG_ERR, "Open meminfo fail(%s)!\n", strerror(errno)); + return FAC_TEST_FAIL; + } + + /* Gets the path to the mount */ + memset(mem_file_line, 0, sizeof(mem_file_line)); + while (fgets(mem_file_line, FAC_FILE_LINE_LEN, fp) != NULL) { + FAC_LOG_DBG(GRTD_LOG_DEBUG, "meminfo file content:%s \n", mem_file_line); + loc = strstr(mem_file_line, "MemFree:"); + if (loc == NULL) { + continue; + } + + loc = loc + strlen("MemFree:"); + while (*loc == ' ') { + loc++; + } + len = 0; + while (*(loc + len) != ' ') { + len++; + } + FAC_LOG_DBG(GRTD_LOG_DEBUG, "free mem info:%s, len:%d \n", loc, len); + snprintf(mem_size, len, "%s", loc); + mem_size[len] = 0; + all_free_size = strtoul(mem_size, NULL, 10); + /* Use 90% to test */ + *free_size = all_free_size / 4 / 10 * 9 * 4096; + goto getok; + } + + FAC_LOG_DBG(GRTD_LOG_ERR, "MEM free info get failed!\n"); + fclose(fp); + return FAC_TEST_FAIL; + +getok: + FAC_LOG_DBG(GRTD_LOG_DEBUG, "free mem: total--0x%lx use--0x%lx\n", all_free_size * 1024, *free_size); + fclose(fp); + return FAC_TEST_OK; +} + +/* + * platform_get_mem_space - Gets the space for the memory test + * @buf: pointer to the obtained start address + * @size: indicates the space size + * + * Return int: FAC_TEST_FAIL | FAC_TEST_OK + */ +static int platform_get_mem_space(void **buf, size_t *size) +{ + void *start; + size_t pagesize, wantsize; + + start = NULL; + if (platform_get_system_free_mem(&wantsize)) { + FAC_LOG_DBG(GRTD_LOG_DEBUG, "Get free mem info fail,use defaul size(0x%x)\n", FAC_MEM_TEST_SIZE); + wantsize = FAC_MEM_TEST_SIZE; + } + pagesize = 4096; /* The page size is 4K*/ + +retry: + while (!start && wantsize) { + start = (void *) malloc(wantsize); + if (!start) wantsize -= pagesize; + } + if (!wantsize) { + FAC_LOG_DBG(GRTD_LOG_ERR, "MEM ERROR:Malloc space failed\n"); + return FAC_TEST_FAIL; + } + memset(start, 0, wantsize); + *size = wantsize; + FAC_LOG_DBG(GRTD_LOG_DEBUG, "trying mlock ...start[%p], size[0x%lx]\n", start, wantsize); + /* mlock Memory space */ + if (mlock(start, wantsize) < 0) { + FAC_LOG_DBG(GRTD_LOG_ERR, "failed for mlock(%s), retry.\n", strerror(errno)); + free(start); + start = NULL; + wantsize -= pagesize; + goto retry; + } + + *buf = start; + return FAC_TEST_OK; +} + +/* + * platform_free_mem_space - Release the memory required for the memory test + * + * Return void: + */ +static void platform_free_mem_space(void *buf, size_t size) +{ + munlock(buf, size); + free(buf); +} + +/** + * platform_complex_sys_memory_test - Memory test + * @sdram_test: Output details of memory test results + * @kaoji: Enter, is the machine currently copied * + * Return int: FAC_TEST_FAIL | FAC_TEST_OK + */ +int platform_complex_sys_memory_test(char *desc, int kaoji) +{ + int ret; + void *buf; + size_t size, autotest_size; + int i; + char desc_tmp[128]; + + if (desc == NULL) { + FAC_LOG_DBG(GRTD_LOG_ERR, "param is error!\n"); + return FAC_TEST_FAIL; + } + + ret = FAC_TEST_OK; + /* Gets the memory space available for testing */ + if (platform_get_mem_space(&buf, &size) != FAC_TEST_OK) { + return FAC_TEST_FAIL; + } + + FAC_LOG_DBG(GRTD_LOG_DEBUG, "MEM:Get test space success, start at [0x%lx] size[0x%lx]\n", + (ulong)buf, (ulong)size); + + autotest_size = size; +#if 0 + /* Init ddr test. */ + if (kaoji && autotest_size > FAC_MEM_AUTOTEST_SIZE) { + autotest_size = FAC_MEM_AUTOTEST_SIZE; + } else if (autotest_size > FAC_MEM_MAX_SIZE) { + autotest_size = FAC_MEM_MAX_SIZE; + } +#endif + ft_ddr_test_init(buf, autotest_size); + /* init memory */ + memset((char *)buf, 0, autotest_size); + + /* Test memory */ + memset((char *)desc_tmp, 0, 128); + for (i = 0 ; i < TETS_TOTAL_NUMBER; i++) { + if (ft_ddr_test_fun[i].always == 0 && kaoji) { + /* In the copy state, some test items are not tested */ + continue; + } + + if (ft_ddr_test_fun[i].ddr_test != NULL) { + if (ft_ddr_test_fun[i].ddr_test(desc_tmp) != FT_DDR_SUCCESS) { + sprintf(desc, "%s:%s", ft_ddr_test_fun[i].name, desc_tmp); + ret = GRTD_SDRAM_WR_ERR; + break; + } + } + } + FT_DDR_SHOW_END(); + + FAC_LOG_DBG(GRTD_LOG_DEBUG, "TEST ok(ret:%d).\n", ret); + /* Free memory */ + platform_free_mem_space(buf, size); + return ret; +} + +static int memory_test(int simple, int all) +{ + unsigned int memory_size; + char desc[128]; + int ret; + + if (platform_get_sys_memory_size_form_cmdline(&memory_size)) { + printf("Get memory size fail\n"); + return FAC_TEST_FAIL; + } + + if (simple) { + ret = platform_simple_sys_memory_test(desc); + } else { + if (all) { + ret = platform_complex_sys_memory_test(desc, 0); + } else { + ret = platform_complex_sys_memory_test(desc, 1); + } + } + + if (simple) { + printf("\n[Simple Algorithm]\n"); + } else { + if (all) { + printf("\n[Complex All Algorithm]\n"); + } else { + printf("\n[Complex Some Algorithm]\n"); + } + } + printf(" SDRAM Space: %d(MB)\n", memory_size); + if (ret != FAC_TEST_OK) { + switch (ret) { + case GRTD_SDRAM_ECC_ERR: + printf(" ECC check error\r\n"); + break; + case GRTD_SDRAM_WR_ERR: + printf(" Error type: Memory read/write error\r\n"); + break; + case GRTD_SDRAM_GET_MEM_SIZE_ERR: + printf(" Error type: Failed to obtain memory capacity\r\n"); + break; + default: + printf(" Unknown cause of failure(%d)\r\n", ret); + break; + } + printf(" %s", desc); + printf(" Test Result: Fail\n\n"); + } else { + printf(" Test Result: Pass\n\n"); + } + return ret; +} + +int dram_test_main(int argc, char **argv) +{ + int simple,all,debug; + int ret; + + printf("\r\n" + "********************** dram test **********************\r\n"); + + debug = 0; + simple = 0; + all = 0; + ret = dram_test_arg_pars(argc, argv, &simple, &all, &debug); + if (ret < 0) { + fprintf(stderr, + "Usage: dram_test [simple|complex some|complex all] \r\n" + " simple Use the simple Algorithm \r\n" + " complex some Use some the complex Algorithm \r\n" + " complex all Use all the complex Algorithm \r\n"); + exit(1); + return -1; + } + if (debug) { + platform_fac_dbg = GRTD_LOG_DEBUG; + } + + return memory_test(simple, all); +} diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/hw_test/hw_test_app/hw_emmc.c b/platform/broadcom/sonic-platform-modules-micas/common/app/hw_test/hw_test_app/hw_emmc.c new file mode 100644 index 00000000000..229bb268228 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/app/hw_test/hw_test_app/hw_emmc.c @@ -0,0 +1,115 @@ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#define EMMC_SYS_BLOCK_PATH "/sys/block/emmcblk0/size" +#define EMMC_DEV_FACTEST_PATH "/dev/emmcblk0p7" +#define EMMC_BLK_SIZE 512 +#if 0 +/* The test values are the same as nandflash, and the emmc factory_test partition is nearly 16MB */ +static char emmc_test_ch[] = { + 0x00, 0xFF, 0x01, 0x02, 0x04, 0x08, 0x10, 0x20, + 0x40, 0x80, 0xFE, 0xFD, 0xFB, 0xF7, 0xEF, 0xDF, + 0xBF, 0x7F +}; +#endif +int emmc_test_main(int argc, char **argv) +{ +#if 1 + argc = argc; + argv = argv; + return -1; +#else + char *buf; + int fd, i, j, ret; + + if (argc != 1) { + fprintf(stderr, "Error: Wrong input!\n"); + return -1; + } + argv = argv; + + ret = posix_memalign((void **) &buf, EMMC_BLK_SIZE, EMMC_BLK_SIZE); + if (ret != 0) { + fprintf(stderr, "Error: Alloc memory failed(%d,%s)!\n", + ret, strerror(ret)); + return -1; + } + + fd = open(EMMC_DEV_FACTEST_PATH, O_RDWR | O_DIRECT, S_IRWXU); + if (fd < 0) { + fprintf(stderr, "ERROR: Open file[rw,%s] failed(%s)!\n", + EMMC_DEV_FACTEST_PATH, strerror(errno)); + goto out_free; + } + + for (i = 0; i < (int) sizeof(emmc_test_ch); i++) { + memset(buf, emmc_test_ch[i], EMMC_BLK_SIZE); + ret = write(fd, buf, EMMC_BLK_SIZE); + if (ret != EMMC_BLK_SIZE) { + fprintf(stderr, "ERROR: Write file error(%d,%d,%s)!\n", + ret, i, strerror(errno)); + goto out_close; + } + } + + ret = fsync(fd); + if (ret != 0) { + fprintf(stderr, "ERROR: Fsync file error(%d,%s)!\n", + ret, strerror(errno)); + goto out_close; + } + + close(fd); + + fd = open(EMMC_DEV_FACTEST_PATH, O_RDONLY | O_DIRECT, S_IRWXU); + if (fd < 0) { + fprintf(stderr, "ERROR: Open file[rd,%s] failed(%s)!\n", + EMMC_DEV_FACTEST_PATH, strerror(errno)); + goto out_free; + } + + for (i = 0; i < (int) sizeof(emmc_test_ch); i++) { + memset(buf, 0x11, EMMC_BLK_SIZE); /* 0x11 does not belong to any test value */ + ret = read(fd, buf, EMMC_BLK_SIZE); + if (ret != EMMC_BLK_SIZE) { + fprintf(stderr, "ERROR: Read file error(%d,%d,%s)!\n", + ret, i, strerror(errno)); + goto out_close; + } + + for (j = 0; j < EMMC_BLK_SIZE; j++) { + if (buf[j] != emmc_test_ch[i]) { + fprintf(stderr, "ERROR: Check error(%d,%d,%d,%d)!\n", + i, j, buf[j], emmc_test_ch[i]); + goto out_close; + } + } + } + + close(fd); + + free(buf); + + printf("SUCCESS: eMMC test pass!\n"); + + return 0; + +out_close: + close(fd); + +out_free: + free(buf); + + return -1; +#endif +} diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/hw_test/hw_test_app/hw_i2c.c b/platform/broadcom/sonic-platform-modules-micas/common/app/hw_test/hw_test_app/hw_i2c.c new file mode 100644 index 00000000000..be04e59a2a3 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/app/hw_test/hw_test_app/hw_i2c.c @@ -0,0 +1,692 @@ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static void rtc_help(char *name) +{ + fprintf(stderr, + "Usage: %s rtc year month day hour minute second \r\n" + " rtc rtc number(default 0) \r\n" + " year \r\n" + " month \r\n" + " day \r\n" + " hour \r\n" + " minute \r\n" + " second \r\n", + name); + exit(1); +} + +static void i2c_help(char *name) +{ + fprintf(stderr, + "Usage: %s i2c_bus slave_addr offset data [data_len] [times] [offset_len] \r\n" + " i2c_bus controller integer or an I2C bus name \r\n" + " slave_addr i2c device address \r\n" + " offset The relative offset within the device \r\n" + " data Test data(8bit) \r\n" + " [data_len] The length of test data(default 1) \r\n" + " [times} \r\n", + name); + exit(1); +} + +static int lookup_i2c_bus(const char *i2cbus_arg) +{ + unsigned long i2cbus; + char *end; + + i2cbus = strtoul(i2cbus_arg, &end, 0); + if (*end || !*i2cbus_arg) { + /* Not a number, maybe a name? */ + //return lookup_i2c_bus_by_name(i2cbus_arg); + return -EINVAL; + } + if (i2cbus > 0xFFFFF) { + fprintf(stderr, "Error: I2C bus out of range!\n"); + return -EINVAL; + } + + return i2cbus; +} + +static int parse_i2c_address(const char *address_arg) +{ + long address; + char *end; + + address = strtol(address_arg, &end, 0); + if (*end || !*address_arg) { + fprintf(stderr, "Error: slave address is not a number!\n"); + return -EINVAL; + } + if (address < 0x03 || address > 0x255) { + fprintf(stderr, "Error: save address out of range " + "(0x03-0x77)!\n"); + return -EINVAL; + } + + return address; +} + +static int i2c_arg_check(int argc, char **argv, struct i2c_dev_priv *i2c_priv, int min_arg) +{ + int i2cbus, address, offset = 0, data = 0, data_len = 1, times = 1; + int offset_len = 1; + char *end; + int flags = 0; + + if (argc < min_arg) { + return -EINVAL; + } + + i2cbus = lookup_i2c_bus(argv[flags + 1]); + if (i2cbus < 0) { + return -EINVAL; + } + + address = parse_i2c_address(argv[flags + 2]); + if (address < 0) { + return -EINVAL; + } + + offset = strtol(argv[flags + 3], &end, 0); + if (*end || offset < 0 || offset > 0xffff) { + fprintf(stderr, "Error: Data offset invalid!\n"); + return -EINVAL; + } + + if (argc > 4) { + data = strtol(argv[flags + 4], &end, 0); + if (*end || data < 0) { + fprintf(stderr, "Error: Data invalid!\n"); + return -EINVAL; + } + } + + if (argc > 5) { + data_len = strtol(argv[flags + 5], &end, 0); + if (*end || data_len < 0) { + fprintf(stderr, "Error: Data length invalid!\n"); + return -EINVAL; + } + } + + if (argc > 6) { + times = strtol(argv[flags + 6], &end, 0); + if (*end || times < 0) { + fprintf(stderr, "Error: times invalid!\n"); + return -EINVAL; + } + } + + if (argc > 7) { + offset_len = strtol(argv[flags + 7], &end, 0); + if (*end || offset_len < 0) { + fprintf(stderr, "Error: offset_len invalid!\n"); + return -EINVAL; + } + } + + i2c_priv->i2cbus = i2cbus; + i2c_priv->save_addr = address; + i2c_priv->offset = offset; + i2c_priv->offset_len = offset_len; + i2c_priv->data = data; + i2c_priv->data_len = data_len; + i2c_priv->times = times; + return 0; +} + +static int open_i2c_dev(int i2cbus) +{ + int file, ret; + char filename[I2C_MAX_NAME_SIZE]; + + ret = snprintf(filename, I2C_MAX_NAME_SIZE, "/dev/i2c-%d", i2cbus); + filename[ret] = '\0'; + if ((file = open(filename, O_RDWR, S_IRWXU | S_IRWXG | S_IRWXO)) < 0) { + fprintf(stderr, "Error: Could not open file " + "`%s': %s\n", filename, strerror(errno)); + } + + return file; +} + +#if 0 +static int set_slave_addr(int file, int address, int force) +{ + /* With force, let the user read from/write to the registers + even when a driver is also running */ + if (ioctl(file, force ? I2C_SLAVE_FORCE : I2C_SLAVE, address) < 0) { + fprintf(stderr, + "Error: Could not set address to 0x%02x: %s\n", + address, strerror(errno)); + return -errno; + } + + return 0; +} +#endif + +/** + * + * i2c_transfer + * + * + * @param file + * @param i2c_priv + * @param read_write 0:write 1:read + * @param num_msgs + * + * @return int + */ +static int i2c_transfer(int file, struct i2c_dev_priv *i2c_priv, int read_write, int num_msgs) +{ + int i; + unsigned char offset[2]; + struct i2c_msg msgs[2]; + struct i2c_rdwr_ioctl_data ioctl_data; + int len; + + if (i2c_priv->buffer == NULL) { + i2c_priv->buffer = malloc(i2c_priv->data_len); + if (i2c_priv->buffer == NULL) { + fprintf(stderr, + "Error: Could not malloc memory %s\n", + strerror(errno)); + return -ENOMEM; + } + } + + for (i = 0; i < i2c_priv->data_len && !read_write; i++) { + i2c_priv->buffer[i] = i2c_priv->data; + } + + if (i2c_priv->offset_len == 1) { + offset[0] = (i2c_priv->offset & 0xFF); + len = 1; + } else { + offset[0] = ((i2c_priv->offset & 0xFF00) >> 8); + offset[1] = (i2c_priv->offset & 0xFF); + len = 2; + } + + switch (num_msgs) { + case 1: + msgs[0].addr = i2c_priv->save_addr; + msgs[0].flags = read_write; + msgs[0].buf = i2c_priv->buffer; + msgs[0].len = i2c_priv->data_len; + + ioctl_data.msgs = msgs; + ioctl_data.nmsgs = 1; + break; + case 2: + msgs[0].addr = i2c_priv->save_addr; + msgs[0].flags = 0; + msgs[0].buf = offset; + msgs[0].len = len; + + msgs[1].addr = i2c_priv->save_addr; + msgs[1].flags = read_write; + msgs[1].buf = i2c_priv->buffer; + msgs[1].len = i2c_priv->data_len; + + ioctl_data.msgs = msgs; + ioctl_data.nmsgs = 2; + break; + default: + break; + } + + if (ioctl(file, I2C_RDWR, &ioctl_data) < 0) { + fprintf(stderr, + "Error: i2c_transfer error %s\n", + strerror(errno)); + return -1; + } + + return 0; +} + +static void print_arg(struct i2c_dev_priv *i2c_priv) +{ + printf("I2C Controller %d, Slave addr: 0x%02X, Offset: 0x%02X", + i2c_priv->i2cbus, i2c_priv->save_addr, i2c_priv->offset); + + if (i2c_priv->data) { + printf(", Data = 0x%02X", i2c_priv->data); + } + + if (i2c_priv->data_len) { + printf(", Data_len = %d", i2c_priv->data_len); + } + + if (i2c_priv->times) { + printf(", Times = %u", i2c_priv->times); + } + + if (i2c_priv->offset_len) { + printf(", Offset_len = %u", i2c_priv->offset_len); + } + + printf("\r\n"); +} + +static int i2c_check_data(unsigned char *buffer, struct i2c_dev_priv *i2c_priv) +{ + int i; + for (i = 0; i < i2c_priv->data_len; i++) { + if (buffer[i] != i2c_priv->buffer[i]) { + return (-1); + } + } + + return (0); +} + +int i2c_wr_main(int argc, char **argv) +{ + int ret, fd; + struct i2c_dev_priv i2c_priv; + + memset(&i2c_priv, 0, sizeof(struct i2c_dev_priv)); + + ret = i2c_arg_check(argc, argv, &i2c_priv, 5); + if (ret < 0) { + i2c_help("i2c_wr"); + return -1; + } + + printf("\r\n" + "********************** I2C write test **********************\r\n"); + print_arg(&i2c_priv); + + if ((fd = open_i2c_dev(i2c_priv.i2cbus)) < 0) { + return -1; + } + +#if 0 + if ((ret = set_slave_addr(fd, i2c_priv.save_addr, 0)) < 0) { + close(fd); + return -1; + } +#endif + + while (i2c_priv.times--) { + if ((ret = i2c_transfer(fd, &i2c_priv, 0, 2)) < 0) { + goto error_out; + } + } + +error_out: + printf("\r\n******************** I2C read test End ********************\r\n\r\n"); + if (i2c_priv.buffer) { + free(i2c_priv.buffer); + } + close(fd); + return ret; +} + +int i2c_rd_main(int argc, char **argv) +{ + int i, ret, fd; + struct i2c_dev_priv i2c_priv; + + memset(&i2c_priv, 0, sizeof(struct i2c_dev_priv)); + ret = i2c_arg_check(argc, argv, &i2c_priv, 4); + if (ret < 0) { + i2c_help("i2c_rd"); + return -1; + } + + if ((fd = open_i2c_dev(i2c_priv.i2cbus)) < 0) { + return -1; + } + + printf("\r\n" + "********************** I2C read test **********************\r\n"); + print_arg(&i2c_priv); + +#if 0 + if ((ret = set_slave_addr(fd, i2c_priv.save_addr, 0)) < 0) { + close(fd); + return -1; + } +#endif + + while (i2c_priv.times--) { + if ((ret = i2c_transfer(fd, &i2c_priv, I2C_M_RD, 2)) < 0) { + goto error_out; + } + } + printf("Last Read: \r\n"); + /* dump data */ + for (i = 0; i < i2c_priv.data_len; i++) { + printf("%02X ", i2c_priv.buffer[i]); + if ((i + 1) % 16 == 0) { + printf("\r\n"); + } + } + +error_out: + printf("\r\n******************** I2C read test End ********************\r\n\r\n"); + if (i2c_priv.buffer) { + free(i2c_priv.buffer); + } + close(fd); + return ret; +} + +int i2c_chk_main(int argc, char **argv) +{ + int ret, fd; + struct i2c_dev_priv i2c_priv; + unsigned char *buffer; + + memset(&i2c_priv, 0, sizeof(struct i2c_dev_priv)); + + ret = i2c_arg_check(argc, argv, &i2c_priv, 5); + if (ret < 0) { + i2c_help("i2c_chk"); + return -1; + } + + printf("\r\n" + "********************** I2C write test **********************\r\n"); + print_arg(&i2c_priv); + + if ((fd = open_i2c_dev(i2c_priv.i2cbus)) < 0) { + return -1; + } + +#if 0 + if ((ret = set_slave_addr(fd, i2c_priv.save_addr, 0)) < 0) { + close(fd); + return -1; + } +#endif + + buffer = malloc(i2c_priv.data_len); + if (buffer == NULL) { + fprintf(stderr, + "Error: Could not malloc memory %s\n", + strerror(errno)); + ret = -ENOMEM; + goto error_out; + } + while (i2c_priv.times--) { + if ((ret = i2c_transfer(fd, &i2c_priv, 0, 2)) < 0) { + goto error_out; + } + memcpy(buffer, i2c_priv.buffer, i2c_priv.data_len); + if ((ret = i2c_transfer(fd, &i2c_priv, I2C_M_RD, 2)) < 0) { + goto error_out; + } + if ((ret = i2c_check_data(buffer, &i2c_priv)) < 0) { + i2c_priv.check_test_errors++; + } + } + printf("Check test errors = %u\r\n", i2c_priv.check_test_errors); + +error_out: + printf("\r\n******************** I2C read test End ********************\r\n\r\n"); + if (i2c_priv.buffer) { + free(i2c_priv.buffer); + } + if (buffer) { + free(buffer); + } + close(fd); + return ret; +} + +int i2c_reset_main(int argc, char **argv) +{ + printf("not support %s argc:%d, \r\n", argv[0], argc); + return 0; +} + +int pca9548_rd_main(int argc, char **argv) +{ + int i, ret, fd; + struct i2c_dev_priv i2c_priv; + + memset(&i2c_priv, 0, sizeof(struct i2c_dev_priv)); + ret = i2c_arg_check(argc, argv, &i2c_priv, 4); + if (ret < 0) { + i2c_help("pca9548_rd"); + return -1; + } + + printf("\r\n" + "********************** I2C multiplexer read test **********************\r\n"); + print_arg(&i2c_priv); + + if ((fd = open_i2c_dev(i2c_priv.i2cbus)) < 0) { + return -1; + } + +#if 0 + if ((ret = set_slave_addr(fd, i2c_priv.save_addr, 0)) < 0) { + close(fd); + return -1; + } +#endif + + while (i2c_priv.times--) { + if ((ret = i2c_transfer(fd, &i2c_priv, I2C_M_RD, 1)) < 0) { + goto error_out; + } + } + printf("Last Read: \r\n"); + /* dump data */ + for (i = 0; i < i2c_priv.data_len; i++) { + printf("%02X ", i2c_priv.buffer[i]); + if ((i + 1) % 16 == 0) { + printf("\r\n"); + } + } + +error_out: + printf("\r\n******************** I2C multiplexer read test End ********************\r\n\r\n"); + if (i2c_priv.buffer) { + free(i2c_priv.buffer); + } + close(fd); + return ret; +} + +int pca9548_wr_main(int argc, char **argv) +{ + int ret, fd; + struct i2c_dev_priv i2c_priv; + + memset(&i2c_priv, 0, sizeof(struct i2c_dev_priv)); + + ret = i2c_arg_check(argc, argv, &i2c_priv, 5); + if (ret < 0) { + i2c_help("pca9548_wr"); + return -1; + } + + printf("\r\n" + "********************** I2C multiplexer write test **********************\r\n"); + print_arg(&i2c_priv); + + if ((fd = open_i2c_dev(i2c_priv.i2cbus)) < 0) { + return -1; + } + +#if 0 + if ((ret = set_slave_addr(fd, i2c_priv.save_addr, 0)) < 0) { + close(fd); + return -1; + } +#endif + + while (i2c_priv.times--) { + if ((ret = i2c_transfer(fd, &i2c_priv, 0, 1)) < 0) { + goto error_out; + } + } + +error_out: + printf("\r\n******************** I2C multiplexer read test End ********************\r\n\r\n"); + if (i2c_priv.buffer) { + free(i2c_priv.buffer); + } + close(fd); + return ret; +} + +int rtc_rd_main(int argc, char **argv) +{ + int ret, fd; + struct rtc_time rtc; + int rtc_num; + char *end, filename[I2C_MAX_NAME_SIZE]; + + if (argc < 2) { + rtc_help("rtc_rd"); + } + + rtc_num = strtol(argv[1], &end, 0); + if (*end || rtc_num < 0 || rtc_num > 0xff) { + fprintf(stderr, "Error: Invalid argument!\n"); + rtc_help("rtc_rd"); + return -EINVAL; + } + + ret = snprintf(filename, I2C_MAX_NAME_SIZE, "/dev/rtc%d", rtc_num); + filename[ret] = '\0'; + if ((fd = open(filename, O_RDWR, S_IRWXU | S_IRWXG | S_IRWXO)) < 0) { + fprintf(stderr, "Error: Could not open file " + "`%s': %s\n", filename, strerror(errno)); + return -1; + } + + if (ioctl(fd, RTC_RD_TIME, &rtc) < 0) { + fprintf(stderr, + "Error: get rtc error %s\n", + strerror(errno)); + close(fd); + return -1; + } + + close(fd); + + printf("\r\n******************** RTC read test ********************\r\n"); + + printf("Read RTC: %d-%d-%d, %d:%d:%d\n", + rtc.tm_year + 1900, rtc.tm_mon + 1, rtc.tm_mday, + rtc.tm_hour, rtc.tm_min, rtc.tm_sec); + printf("\r\n******************** RTC read test End ********************\r\n\r\n"); + + return 0; +} + +int rtc_wr_main(int argc, char **argv) +{ + int ret, fd, year; + struct rtc_time rtc; + int rtc_num; + char *end, filename[I2C_MAX_NAME_SIZE]; + + if (argc < 8) { + rtc_help("rtc_wr"); + } + + rtc_num = strtol(argv[1], &end, 0); + if (*end || rtc_num < 0 || rtc_num > 0xff) { + fprintf(stderr, "Error: Invalid argument!\n"); + rtc_help("rtc_wr"); + return -EINVAL; + } + + year = strtol(argv[2], &end, 0); + if (*end || year < 0) { + fprintf(stderr, "Error: Invalid argument!\n"); + rtc_help("rtc_wr"); + return -EINVAL; + } + + rtc.tm_year = year - 1900; + + rtc.tm_mon = strtol(argv[3], &end, 0); + if (*end || rtc.tm_mon <= 0 || rtc.tm_mon > 12) { + fprintf(stderr, "Error: Invalid argument!\n"); + rtc_help("rtc_wr"); + return -EINVAL; + } + + rtc.tm_mon = rtc.tm_mon - 1; + + rtc.tm_mday = strtol(argv[4], &end, 0); + if (*end || rtc.tm_mday < 0 || rtc.tm_mday > 31) { + fprintf(stderr, "Error: Invalid argument!\n"); + rtc_help("rtc_wr"); + return -EINVAL; + } + + rtc.tm_hour = strtol(argv[5], &end, 0); + if (*end || rtc.tm_hour < 0 || rtc.tm_hour > 23) { + fprintf(stderr, "Error: Invalid argument!\n"); + rtc_help("rtc_wr"); + return -EINVAL; + } + + rtc.tm_min = strtol(argv[6], &end, 0); + if (*end || rtc.tm_min < 0 || rtc.tm_min > 59) { + fprintf(stderr, "Error: Invalid argument!\n"); + rtc_help("rtc_wr"); + return -EINVAL; + } + + rtc.tm_sec = strtol(argv[7], &end, 0); + if (*end || rtc.tm_sec < 0 || rtc.tm_sec > 59) { + fprintf(stderr, "Error: Invalid argument!\n"); + rtc_help("rtc_wr"); + return -EINVAL; + } + + ret = snprintf(filename, I2C_MAX_NAME_SIZE, "/dev/rtc%d", rtc_num); + filename[ret] = '\0'; + if ((fd = open(filename, O_RDWR, S_IRWXU | S_IRWXG | S_IRWXO)) < 0) { + fprintf(stderr, "Error: Could not open file " + "`%s': %s\n", filename, strerror(errno)); + return -1; + } + + if (ioctl(fd, RTC_SET_TIME, &rtc) < 0) { + fprintf(stderr, + "Error: get rtc error %s\n", + strerror(errno)); + close(fd); + return -1; + } + + close(fd); + + printf("\r\n******************** RTC write test ********************\r\n"); + + printf("Set RTC: %d-%d-%d, %d:%d:%d\n", + year, rtc.tm_mon + 1, rtc.tm_mday, + rtc.tm_hour, rtc.tm_min, rtc.tm_sec); + printf("\r\n******************** RTC write test End ********************\r\n\r\n"); + + return 0; +} \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/hw_test/hw_test_app/hw_misc.c b/platform/broadcom/sonic-platform-modules-micas/common/app/hw_test/hw_test_app/hw_misc.c new file mode 100644 index 00000000000..37baa383f68 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/app/hw_test/hw_test_app/hw_misc.c @@ -0,0 +1,712 @@ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static void dram_help(char *name) +{ + fprintf(stderr, + "Usage: %s reg_addr [reg_data] \r\n" + " reg_addr \r\n" + " reg_data \r\n", + name); + exit(1); +} + +static void phy_help(char *name) +{ + fprintf(stderr, + "Usage: %s phy_index(dec) regnum(hex) [regval(hex)] \r\n" + " phy_index phydev index \r\n" + " regnum phydev register address \r\n" + " regval phydev register value \r\n", + name); + exit(1); +} + +static void mdio_help(char *name) +{ + fprintf(stderr, + "Usage: %s mdio_index(dec) phyaddr(hex) regnum(hex) [regval(hex)] \r\n" + " mdio_index mdiodev index \r\n" + " phyaddr phydev address \r\n" + " regnum phydev register address \r\n" + " regval phydev register value \r\n", + name); + exit(1); +} + +static int dram_arg_parse(int argc, char **argv, + u64 *reg_addr, u64 *reg_data, + int min_arg) +{ + u64 reg_addr_tmp, reg_data_tmp = 0; + char *end; + int flags = 0; + + if (argc < min_arg) { + return -EINVAL; + } + + reg_addr_tmp = strtoul(argv[flags + 1], &end, 0); + if (*end) { + fprintf(stderr, "Error: reg addr invalid!\n"); + return -EINVAL; + } + + if (argc > 2) { + reg_data_tmp = strtoul(argv[flags + 2], &end, 0); + if (*end) { + fprintf(stderr, "Error: reg data invalid!\n"); + return -EINVAL; + } + } + + *reg_addr = reg_addr_tmp; + *reg_data = reg_data_tmp; + + return 0; +} + +static int phydev_arg_parse(int argc, char **argv, + int *phy_index, u32 *regnum, u32 *regval, + int min_arg) +{ + + unsigned long index, regaddr, value; + char *end; + + if (argc < min_arg) { + return -EINVAL; + } + + index = strtoul(argv[1], &end, 0); + if (*end) { + fprintf(stderr, "Error: index invalid!\n"); + return -EINVAL; + } + + regaddr = strtoul(argv[2], &end, 16); + if (*end || regaddr > 0xffff) { + fprintf(stderr, "Error: regaddr invalid!\n"); + return -EINVAL; + } + + if (argc > 3) { + value = strtoul(argv[3], &end, 16); + if (*end) { + fprintf(stderr, "Error: reg data invalid!\n"); + return -EINVAL; + } + + *regval = (u32)value; + } + + *phy_index = (u32)index; + *regnum = (u32)regaddr; + + return 0; +} + +static int mdiodev_arg_parse(int argc, char **argv, + int *mdio_index, int *phyaddr, u32 *regnum, u32 *regval, + int min_arg) +{ + + unsigned long index, addr, regaddr, value; + char *end; + + if (argc < min_arg) { + return -EINVAL; + } + + index = strtoul(argv[1], &end, 0); + if (*end) { + fprintf(stderr, "Error: index invalid!\n"); + return -EINVAL; + } + + addr = strtoul(argv[2], &end, 16); + if (*end || addr > 0x1f) { + fprintf(stderr, "Error: phyaddr invalid!\n"); + return -EINVAL; + } + + regaddr = strtoul(argv[3], &end, 16); + if (*end || regaddr > 0xffff) { + fprintf(stderr, "Error: regaddr invalid!\n"); + return -EINVAL; + } + + if (argc > 4) { + value = strtoul(argv[4], &end, 16); + if (*end) { + fprintf(stderr, "Error: reg data invalid!\n"); + return -EINVAL; + } + + *regval = (u32)value; + } + + *mdio_index = (u32)index; + *phyaddr = (int)addr; + *regnum = (u32)regaddr; + + return 0; +} + +int reload_main(int argc, char **argv) +{ + printf("%s, %d, %d, %s\r\n", __FUNCTION__, __LINE__, argc, argv[0]); + return 0; +} + +int sys_info_main(int argc, char **argv) +{ + printf("%s, %d, %d, %s\r\n", __FUNCTION__, __LINE__, argc, argv[0]); + return 0; +} + +int mem_dump_main(int argc, char **argv) +{ + printf("%s, %d, %d, %s\r\n", __FUNCTION__, __LINE__, argc, argv[0]); + return 0; +} + +int cache_flush_main(int argc, char **argv) +{ + printf("%s, %d, %d, %s\r\n", __FUNCTION__, __LINE__, argc, argv[0]); + return 0; +} + +int reg_wr64_main(int argc, char **argv) +{ + u64 reg_addr, reg_data; + unsigned int reg_data1, reg_data2; + int fd; + long int ret; + unsigned char buf[MAX_DATA_SIZE]; + + ret = dram_arg_parse(argc, argv, ®_addr, ®_data, 3); + if (ret < 0) { + dram_help("reg_wr64"); + return -1; + } + + if ((fd = open("/dev/dram_test", O_RDWR, S_IRWXU | S_IRWXG | S_IRWXO)) < 0) { + fprintf(stderr, "Error: Could not open file " + "/dev/dram: %s\n", strerror(errno)); + return -1; + } + + if ((ret = lseek(fd, reg_addr, SEEK_SET)) < 0) { + fprintf(stderr, "Error: Could not llseek :%s\n", strerror(errno)); + close(fd); + return -1; + } + reg_data2 = (unsigned int)(((u64)reg_data) >> 32) & 0xFFFFFFFF; + reg_data1 = (unsigned int)reg_data & 0xFFFFFFFF; + buf[0] = (reg_data1 >> 0) & 0xFF; + buf[1] = (reg_data1 >> 8) & 0xFF; + buf[2] = (reg_data1 >> 16) & 0xFF; + buf[3] = (reg_data1 >> 24) & 0xFF; + + buf[4] = (reg_data2 >> 0) & 0xFF; + buf[5] = (reg_data2 >> 8) & 0xFF; + buf[6] = (reg_data2 >> 16) & 0xFF; + buf[7] = (reg_data2 >> 24) & 0xFF; + + if ((ret = write(fd, buf, 8)) < 0) { + fprintf(stderr, "Error: Could not write file : %s\n", strerror(errno)); + close(fd); + return -1; + } + + close(fd); + + printf("Write quad-word 0x%16llX to address 0x%16llX.\n\n", reg_data, reg_addr); + return 0; +} + +int reg_rd64_main(int argc, char **argv) +{ + u64 reg_addr, reg_data; + unsigned int reg_data1, reg_data2; + int fd; + long int ret; + unsigned char buf[MAX_DATA_SIZE]; + + ret = dram_arg_parse(argc, argv, ®_addr, ®_data, 2); + if (ret < 0) { + dram_help("reg_rd64"); + return -1; + } + + if ((fd = open("/dev/dram_test", O_RDWR, S_IRWXU | S_IRWXG | S_IRWXO)) < 0) { + fprintf(stderr, "Error: Could not open file " + "/dev/dram: %s\n", strerror(errno)); + return -1; + } + + if ((ret = lseek(fd, reg_addr, SEEK_SET)) < 0) { + fprintf(stderr, "Error: Could not llseek : %s\n", strerror(errno)); + close(fd); + return -1; + } + + if ((ret = read(fd, buf, 8)) < 0) { + fprintf(stderr, "Error: Could not read file : %s\n", strerror(errno)); + close(fd); + return -1; + } + + close(fd); + reg_data1 = (buf[0] | (buf[1] << 8) | (buf[2] << 16) | (buf[3] << 24)); + reg_data2 = (buf[4] | (buf[5] << 8) | (buf[6] << 16) | (buf[7] << 24)); + + printf("Read quad-word from address 0x%16llX: 0x%08X%08X\n\n", reg_addr, reg_data2, reg_data1); + return 0; +} + +int reg_wr32_main(int argc, char **argv) +{ + u64 reg_addr, reg_data; + unsigned int reg_data1, reg_data2; + int fd; + long int ret; + unsigned char buf[MAX_DATA_SIZE]; + + ret = dram_arg_parse(argc, argv, ®_addr, ®_data, 3); + if (ret < 0) { + dram_help("reg_wr32"); + return -1; + } + + if ((fd = open("/dev/dram_test", O_RDWR, S_IRWXU | S_IRWXG | S_IRWXO)) < 0) { + fprintf(stderr, "Error: Could not open file " + "/dev/dram: %s\n", strerror(errno)); + return -1; + } + + if ((ret = lseek(fd, reg_addr, SEEK_SET)) < 0) { + fprintf(stderr, "Error: Could not llseek :%s\n", strerror(errno)); + close(fd); + return -1; + } + reg_data2 = (unsigned int)(((u64)reg_data) >> 32) & 0xFFFFFFFF; + reg_data1 = (unsigned int)reg_data & 0xFFFFFFFF; + buf[0] = (reg_data1 >> 0) & 0xFF; + buf[1] = (reg_data1 >> 8) & 0xFF; + buf[2] = (reg_data1 >> 16) & 0xFF; + buf[3] = (reg_data1 >> 24) & 0xFF; + + buf[4] = (reg_data2 >> 0) & 0xFF; + buf[5] = (reg_data2 >> 8) & 0xFF; + buf[6] = (reg_data2 >> 16) & 0xFF; + buf[7] = (reg_data2 >> 24) & 0xFF; + + if ((ret = write(fd, buf, 4)) < 0) { + fprintf(stderr, "Error: Could not write file : %s\n", strerror(errno)); + close(fd); + return -1; + } + + close(fd); + + printf("Write word 0x%08X to address 0x%16llX.\n\n", reg_data1, reg_addr); + return 0; +} + +int reg_rd32_main(int argc, char **argv) +{ + u64 reg_addr, reg_data; + unsigned int reg_data1; + int fd; + long int ret; + unsigned char buf[MAX_DATA_SIZE]; + + ret = dram_arg_parse(argc, argv, ®_addr, ®_data, 2); + if (ret < 0) { + dram_help("reg_rd32"); + return -1; + } + + if ((fd = open("/dev/dram_test", O_RDWR, S_IRWXU | S_IRWXG | S_IRWXO)) < 0) { + fprintf(stderr, "Error: Could not open file " + "/dev/dram: %s\n", strerror(errno)); + return -1; + } + + if ((ret = lseek(fd, reg_addr, SEEK_SET)) < 0) { + fprintf(stderr, "Error: Could not llseek : %s\n", strerror(errno)); + close(fd); + return -1; + } + + if ((ret = read(fd, buf, 4)) < 0) { + fprintf(stderr, "Error: Could not read file : %s\n", strerror(errno)); + close(fd); + return -1; + } + + close(fd); + reg_data1 = (buf[0] | (buf[1] << 8) | (buf[2] << 16) | (buf[3] << 24)); + + printf("Read word from address 0x%16llX: 0x%08X\n\n", reg_addr, reg_data1); + return 0; +} + +int reg_wr16_main(int argc, char **argv) +{ + u64 reg_addr, reg_data; + unsigned int reg_data1, reg_data2; + int fd; + long int ret; + unsigned char buf[MAX_DATA_SIZE]; + + ret = dram_arg_parse(argc, argv, ®_addr, ®_data, 3); + if (ret < 0) { + dram_help("reg_wr16"); + return -1; + } + + if ((fd = open("/dev/dram_test", O_RDWR, S_IRWXU | S_IRWXG | S_IRWXO)) < 0) { + fprintf(stderr, "Error: Could not open file " + "/dev/dram: %s\n", strerror(errno)); + return -1; + } + + if ((ret = lseek(fd, reg_addr, SEEK_SET)) < 0) { + fprintf(stderr, "Error: Could not llseek :%s\n", strerror(errno)); + close(fd); + return -1; + } + reg_data2 = (unsigned int)(((u64)reg_data) >> 32) & 0xFFFFFFFF; + reg_data1 = (unsigned int)reg_data & 0xFFFFFFFF; + buf[0] = (reg_data1 >> 0) & 0xFF; + buf[1] = (reg_data1 >> 8) & 0xFF; + buf[2] = (reg_data1 >> 16) & 0xFF; + buf[3] = (reg_data1 >> 24) & 0xFF; + + buf[4] = (reg_data2 >> 0) & 0xFF; + buf[5] = (reg_data2 >> 8) & 0xFF; + buf[6] = (reg_data2 >> 16) & 0xFF; + buf[7] = (reg_data2 >> 24) & 0xFF; + + if ((ret = write(fd, buf, 2)) < 0) { + fprintf(stderr, "Error: Could not write file : %s\n", strerror(errno)); + close(fd); + return -1; + } + + close(fd); + + printf("Write half-word 0x%02X%02X to address 0x%16llX.\n\n", buf[1], buf[0], reg_addr); + return 0; +} + +int reg_rd16_main(int argc, char **argv) +{ + u64 reg_addr, reg_data; + int fd; + long int ret; + unsigned char buf[MAX_DATA_SIZE]; + + ret = dram_arg_parse(argc, argv, ®_addr, ®_data, 2); + if (ret < 0) { + dram_help("reg_rd16"); + return -1; + } + + if ((fd = open("/dev/dram_test", O_RDWR, S_IRWXU | S_IRWXG | S_IRWXO)) < 0) { + fprintf(stderr, "Error: Could not open file " + "/dev/dram: %s\n", strerror(errno)); + return -1; + } + + if ((ret = lseek(fd, reg_addr, SEEK_SET)) < 0) { + fprintf(stderr, "Error: Could not llseek : %s\n", strerror(errno)); + close(fd); + return -1; + } + + if ((ret = read(fd, buf, 2)) < 0) { + fprintf(stderr, "Error: Could not read file : %s\n", strerror(errno)); + close(fd); + return -1; + } + + close(fd); + + printf("Read half-word from address 0x%16llX: 0x%02X%02X\n\n", reg_addr, buf[1], buf[0]); + return 0; +} + +int reg_wr8_main(int argc, char **argv) +{ + u64 reg_addr, reg_data; + unsigned int reg_data1, reg_data2; + int fd; + long int ret; + unsigned char buf[MAX_DATA_SIZE]; + + ret = dram_arg_parse(argc, argv, ®_addr, ®_data, 3); + if (ret < 0) { + dram_help("reg_wr8"); + return -1; + } + + if ((fd = open("/dev/dram_test", O_RDWR, S_IRWXU | S_IRWXG | S_IRWXO)) < 0) { + fprintf(stderr, "Error: Could not open file " + "/dev/dram: %s\n", strerror(errno)); + return -1; + } + + if ((ret = lseek(fd, reg_addr, SEEK_SET)) < 0) { + fprintf(stderr, "Error: Could not llseek :%s\n", strerror(errno)); + close(fd); + return -1; + } + reg_data2 = (unsigned int)(((u64)reg_data) >> 32) & 0xFFFFFFFF; + reg_data1 = (unsigned int)reg_data & 0xFFFFFFFF; + buf[0] = (reg_data1 >> 0) & 0xFF; + buf[1] = (reg_data1 >> 8) & 0xFF; + buf[2] = (reg_data1 >> 16) & 0xFF; + buf[3] = (reg_data1 >> 24) & 0xFF; + + buf[4] = (reg_data2 >> 0) & 0xFF; + buf[5] = (reg_data2 >> 8) & 0xFF; + buf[6] = (reg_data2 >> 16) & 0xFF; + buf[7] = (reg_data2 >> 24) & 0xFF; + + if ((ret = write(fd, buf, 1)) < 0) { + fprintf(stderr, "Error: Could not write file : %s\n", strerror(errno)); + close(fd); + return -1; + } + + close(fd); + + printf("Write byte 0x%02X to address 0x%16llX.\n\n", buf[0], reg_addr); + return 0; +} + +int reg_rd8_main(int argc, char **argv) +{ + u64 reg_addr, reg_data; + int fd; + long int ret; + unsigned char buf[MAX_DATA_SIZE]; + + ret = dram_arg_parse(argc, argv, ®_addr, ®_data, 2); + if (ret < 0) { + dram_help("reg_rd8"); + return -1; + } + + if ((fd = open("/dev/dram_test", O_RDWR, S_IRWXU | S_IRWXG | S_IRWXO)) < 0) { + fprintf(stderr, "Error: Could not open file " + "/dev/dram: %s\n", strerror(errno)); + return -1; + } + + if ((ret = lseek(fd, reg_addr, SEEK_SET)) < 0) { + fprintf(stderr, "Error: Could not llseek : %s\n", strerror(errno)); + close(fd); + return -1; + } + + if ((ret = read(fd, buf, 1)) < 0) { + fprintf(stderr, "Error: Could not read file : %s\n", strerror(errno)); + close(fd); + return -1; + } + + close(fd); + + printf("Read byte from address 0x%16llX: 0x%02X\n\n", reg_addr, buf[0]); + return 0; +} + +int phydev_list_main(int argc, char **argv) +{ + int fd; + + argc = argc; + argv = argv; + fd = open("/dev/dram_test", O_RDWR, S_IRWXU | S_IRWXG | S_IRWXO); + if (fd < 0) { + fprintf(stderr, "Error: Could not open file " + "/dev/dram: %s\n", strerror(errno)); + return -1; + } + + (void)ioctl(fd, CMD_PHY_LIST, NULL); + + close(fd); + + return 0; +} + +int phydev_rd_main(int argc, char **argv) +{ + struct phydev_user_info phy_info; + int fd; + long int ret; + + ret = phydev_arg_parse(argc, argv, &phy_info.phy_index, &phy_info.regnum, &phy_info.regval, 3); + if (ret < 0) { + phy_help("phydev_rd"); + return -1; + } + + fd = open("/dev/dram_test", O_RDWR, S_IRWXU | S_IRWXG | S_IRWXO); + if (fd < 0) { + fprintf(stderr, "Error: Could not open file " + "/dev/dram: %s\n", strerror(errno)); + return -1; + } + + ret = ioctl(fd, CMD_PHY_READ, &phy_info); + if (ret < 0) { + fprintf(stderr, "Error: phy read error : %s\n", strerror(errno)); + close(fd); + return -1; + } + + close(fd); + + printf("Read success --- phydev%d regnum: 0x%x, value: 0x%x\n",phy_info.phy_index, phy_info.regnum, phy_info.regval); + + return 0; +} + +int phydev_wr_main(int argc, char **argv) +{ + struct phydev_user_info phy_info; + int fd; + long int ret; + + ret = phydev_arg_parse(argc, argv, &phy_info.phy_index, &phy_info.regnum, &phy_info.regval, 4); + if (ret < 0) { + phy_help("phydev_wr"); + return -1; + } + + fd = open("/dev/dram_test", O_RDWR, S_IRWXU | S_IRWXG | S_IRWXO); + if (fd < 0) { + fprintf(stderr, "Error: Could not open file " + "/dev/dram: %s\n", strerror(errno)); + return -1; + } + + ret = ioctl(fd, CMD_PHY_WRITE, &phy_info); + if (ret < 0) { + fprintf(stderr, "Error: phy write error : %s\n", strerror(errno)); + close(fd); + return -1; + } + + close(fd); + + printf("write success --- phydev%d regnum: 0x%x, value: 0x%x\n",phy_info.phy_index, phy_info.regnum, phy_info.regval); + + return 0; +} + +int mdiodev_list_main(int argc, char **argv) +{ + int fd; + + argc = argc; + argv = argv; + fd = open("/dev/dram_test", O_RDWR, S_IRWXU | S_IRWXG | S_IRWXO); + if (fd < 0) { + fprintf(stderr, "Error: Could not open file " + "/dev/dram: %s\n", strerror(errno)); + return -1; + } + + (void)ioctl(fd, CMD_MDIO_LIST, NULL); + + close(fd); + + return 0; +} + +int mdiodev_rd_main(int argc, char **argv) +{ + struct mdio_dev_user_info mdio_info; + int fd; + long int ret; + + ret = mdiodev_arg_parse(argc, argv, &mdio_info.mdio_index, &mdio_info.phyaddr, &mdio_info.regnum, &mdio_info.regval, 4); + if (ret < 0) { + mdio_help("mdiodev_rd"); + return -1; + } + + fd = open("/dev/dram_test", O_RDWR, S_IRWXU | S_IRWXG | S_IRWXO); + if (fd < 0) { + fprintf(stderr, "Error: Could not open file " + "/dev/dram: %s\n", strerror(errno)); + return -1; + } + + ret = ioctl(fd, CMD_MDIO_READ, &mdio_info); + if (ret < 0) { + fprintf(stderr, "Error: mdio read error : %s\n", strerror(errno)); + close(fd); + return -1; + } + + close(fd); + + printf("Read success\n mdio_index phyaddr regnum value\n"); + printf(" %-10d %#-10x %#-10x %#-10x\n", mdio_info.mdio_index, mdio_info.phyaddr, mdio_info.regnum, mdio_info.regval); + + return 0; +} + +int mdiodev_wr_main(int argc, char **argv) +{ + struct mdio_dev_user_info mdio_info; + int fd; + long int ret; + + ret = mdiodev_arg_parse(argc, argv, &mdio_info.mdio_index, &mdio_info.phyaddr, &mdio_info.regnum, &mdio_info.regval, 5); + if (ret < 0) { + mdio_help("mdiodev_wr"); + return -1; + } + + fd = open("/dev/dram_test", O_RDWR, S_IRWXU | S_IRWXG | S_IRWXO); + if (fd < 0) { + fprintf(stderr, "Error: Could not open file " + "/dev/dram: %s\n", strerror(errno)); + return -1; + } + + ret = ioctl(fd, CMD_MDIO_WRITE, &mdio_info); + if (ret < 0) { + fprintf(stderr, "Error: mdio write error : %s\n", strerror(errno)); + close(fd); + return -1; + } + + close(fd); + + printf("write success\n mdio_index phyaddr regnum value\n"); + printf(" %-10d %#-10x %#-10x %#-10x\n", mdio_info.mdio_index, mdio_info.phyaddr, mdio_info.regnum, mdio_info.regval); + + return 0; +} diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/hw_test/hw_test_app/hw_mtdflash.c b/platform/broadcom/sonic-platform-modules-micas/common/app/hw_test/hw_test_app/hw_mtdflash.c new file mode 100644 index 00000000000..c754480bad5 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/app/hw_test/hw_test_app/hw_mtdflash.c @@ -0,0 +1,699 @@ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static void mtdflash_help(char *name) +{ + fprintf(stderr, + "Usage: %s start_addr end_addr data1 data2 [times] \r\n" + " start_addr Flash start address \r\n" + " end_addr Flash end address \r\n" + " data1 Test data1(8bit) \r\n" + " data2 Test data2(8bit) \r\n" + " [times} \r\n", + name); + exit(1); +} + +static int mtd_arg_get(int argc, char **argv, struct mtd_dev_priv *mtd_priv, int min_arg) +{ + unsigned int start_addr, end_addr, data1 = 0, data2 = 0, times = 1; + char *end; + int flags = 0; + + if (argc < min_arg) { + return -EINVAL; + } + + start_addr = strtol(argv[flags + 1], &end, 0); + if (*end) { + fprintf(stderr, "Error: start addr invalid!\n"); + return -EINVAL; + } + + end_addr = strtol(argv[flags + 2], &end, 0); + if (*end) { + fprintf(stderr, "Error: end addr invalid!\n"); + return -EINVAL; + } + + if (argc > 3) { + data1 = strtol(argv[flags + 3], &end, 0); + if (*end) { + fprintf(stderr, "Error: data1 invalid!\n"); + return -EINVAL; + } + } + + if (argc > 4) { + data2 = strtol(argv[flags + 4], &end, 0); + if (*end) { + fprintf(stderr, "Error: data2 invalid!\n"); + return -EINVAL; + } + } + + if (argc > 5) { + times = strtol(argv[flags + 5], &end, 0); + if (*end) { + fprintf(stderr, "Error: times invalid!\n"); + return -EINVAL; + } + } + + mtd_priv->start_addr = start_addr; + mtd_priv->end_addr = end_addr; + mtd_priv->data1 = data1; + mtd_priv->data2 = data2; + mtd_priv->times = times; + return 0; +} + +static void print_arg(struct mtd_dev_priv *mtd_priv) +{ + printf("Start: 0x%08X, End: 0x%08X\n", + mtd_priv->start_addr, mtd_priv->end_addr); + printf("Data1 = 0x%02X, Data2 = 0x%02X", + mtd_priv->data1, mtd_priv->data2); + + printf(", Times = %u", mtd_priv->times); + + printf("\r\n"); +} + +static int open_mtd_dev(char *test_name) +{ + FILE *fd; + int file, ret; + char buffer[MAX_BUFFER_SIZE], filename[MAX_BUFFER_SIZE], *ptr; + + if ((fd = fopen("/proc/mtd", "r")) == NULL) { + fprintf(stderr, "Error: Could not open file " + "/proc/mtd: %s\n", strerror(errno)); + return -1; + } + + while (fgets(buffer, MAX_BUFFER_SIZE, fd)) { + if ((ptr = strstr(buffer, test_name)) != NULL) { + break; + } + } + fclose(fd); + + if ((ptr = strstr(buffer, ":")) == NULL) { + return -1; + } + *ptr = '\0'; + + ret = snprintf(filename, MAX_BUFFER_SIZE, "/dev/%s", buffer); + filename[ret] = '\0'; + + printf("....................%s\r\n", filename); + + if ((file = open(filename, O_RDWR, S_IRWXU | S_IRWXG | S_IRWXO)) < 0) { + fprintf(stderr, "Error: Could not open file " + "`%s': %s\n", filename, strerror(errno)); + } + + return file; +} + +static int mtd_arg_check(int fd, + struct mtd_dev_priv *mtd_priv, + unsigned int *nand_erasesize) +{ + int ret; + struct mtd_info_user mtd; + + if ((ret = ioctl(fd, MEMGETINFO, &mtd)) < 0) { + perror("MEMGETINFO"); + return -1; + } + + if ((mtd.type != MTD_NANDFLASH && mtd.type != MTD_NORFLASH) || + (mtd.flags != MTD_CAP_NANDFLASH && mtd.flags != MTD_CAP_NORFLASH)) { + printf("Error, Not NandFlash or NorFlash!\r\n"); + return -1; + } + + if ((mtd_priv->start_addr & (mtd.writesize - 1)) || + (mtd_priv->end_addr & (mtd.writesize -1))) { + printf("Error, Address must be %d bytes aligned!\r\n", mtd.writesize); + return -1; + } + + if (mtd_priv->end_addr > mtd.size) { + printf("Error, Address out of test range!\r\n"); + return -1; + } + + if (mtd_priv->start_addr >= mtd_priv->end_addr) { + printf("Error, start address is higher than end address!\r\n"); + return -1; + } + + *nand_erasesize = mtd.erasesize; + + return 0; +} + +static int mtd_check_data(unsigned char *buffer, + struct mtd_dev_priv *mtd_priv, + unsigned long len) +{ + unsigned int i; + len = mtd_priv->end_addr - mtd_priv->start_addr; + for (i = 0; i < len; i++) { + if (buffer[i] != mtd_priv->buffer[i]) { + return (-1); + } + } + + return (0); +} + +int nand_wr_main(int argc, char **argv) +{ + int ret, fd; + unsigned long i, len; + unsigned int nand_erasesize; + struct mtd_dev_priv nand_priv; + struct erase_info_user erase; + + memset(&nand_priv, 0, sizeof(struct mtd_dev_priv)); + + ret = mtd_arg_get(argc, argv, &nand_priv, 5); + if (ret < 0) { + mtdflash_help("nand_wr"); + return -1; + } + + if ((fd = open_mtd_dev(NAND_TEST_PARTITION)) < 0) { + return -1; + } + + if ((ret = mtd_arg_check(fd, &nand_priv, &nand_erasesize)) < 0) { + close(fd); + return -1; + } + + len = nand_priv.end_addr - nand_priv.start_addr; + if (nand_priv.buffer == NULL) { + nand_priv.buffer = malloc(len); + if (nand_priv.buffer == NULL) { + fprintf(stderr, + "Error: Could not malloc memory %s\n", + strerror(errno)); + close(fd); + return -ENOMEM; + } + } + + printf("\r\n********************** NANDFLASH write test **********************\r\n"); + print_arg(&nand_priv); + + while (nand_priv.times--) { + erase.start = (nand_priv.start_addr / nand_erasesize) * nand_erasesize; + erase.length = ((len + nand_erasesize) / nand_erasesize) * nand_erasesize; + if ((ret = ioctl(fd, MEMERASE, &erase)) < 0) { + perror("MEMERASE"); + goto error_out; + } + if (nand_priv.times % 2) { + for (i = 0; i < len;) { + nand_priv.buffer[i++] = nand_priv.data1; + nand_priv.buffer[i++] = nand_priv.data2; + } + } else { + for (i = 0; i < len;) { + nand_priv.buffer[i++] = nand_priv.data2; + nand_priv.buffer[i++] = nand_priv.data1; + } + } + + if ((ret = lseek(fd, nand_priv.start_addr, SEEK_SET)) < 0) { + perror("lseek"); + goto error_out; + } + + if ((ret = write(fd, nand_priv.buffer, len)) < 0) { + fprintf(stderr, "%s: write, size %ld, %d\n", __func__, len, ret); + perror("write"); + goto error_out; + } + } + +error_out: + printf("\r\n******************** NANDFLASH write test End ********************\r\n\r\n"); + close(fd); + if (nand_priv.buffer) { + free(nand_priv.buffer); + } + return ret; +} + +int nand_rd_main(int argc, char **argv) +{ + int ret, fd; + unsigned long len; + unsigned int nand_erasesize; + struct mtd_dev_priv nand_priv; + + memset(&nand_priv, 0, sizeof(struct mtd_dev_priv)); + + ret = mtd_arg_get(argc, argv, &nand_priv, 3); + if (ret < 0) { + mtdflash_help("nand_rd"); + return -1; + } + + if ((fd = open_mtd_dev(NAND_TEST_PARTITION)) < 0) { + return -1; + } + + if ((ret = mtd_arg_check(fd, &nand_priv, &nand_erasesize)) < 0) { + close(fd); + return -1; + } + + len = nand_priv.end_addr - nand_priv.start_addr; + if (nand_priv.buffer == NULL) { + nand_priv.buffer = malloc(len); + if (nand_priv.buffer == NULL) { + fprintf(stderr, + "Error: Could not malloc memory %s\n", + strerror(errno)); + close(fd); + return -ENOMEM; + } + } + + printf("\r\n********************** NANDFLASH read test **********************\r\n"); + print_arg(&nand_priv); + + while (nand_priv.times--) { + if ((ret = lseek(fd, nand_priv.start_addr, SEEK_SET)) < 0) { + perror("lseek"); + goto error_out; + } + if ((ret = read(fd, nand_priv.buffer, len)) < 0) { + fprintf(stderr, "%s: read, size %ld, %d\n", __func__, len, ret); + perror("read"); + goto error_out; + } + } +#if 0 + printf("Last Read: \r\n"); + /* dump data */ + for (i = 0; i < len; i++) { + printf("%02X ", nand_priv.buffer[i]); + if ((i + 1) % 16 == 0) { + printf("\r\n"); + } + } +#endif + +error_out: + printf("\r\n******************** NANDFLASH read test End ********************\r\n\r\n"); + close(fd); + if (nand_priv.buffer) { + free(nand_priv.buffer); + } + return ret; +} + +int nand_chk_main(int argc, char **argv) +{ + int ret, fd; + unsigned long i, len; + unsigned int nand_erasesize; + struct mtd_dev_priv nand_priv; + struct erase_info_user erase; + unsigned char *buffer = NULL; + + memset(&nand_priv, 0, sizeof(struct mtd_dev_priv)); + + ret = mtd_arg_get(argc, argv, &nand_priv, 5); + if (ret < 0) { + mtdflash_help("nand_chk"); + return -1; + } + + if ((fd = open_mtd_dev(NAND_TEST_PARTITION)) < 0) { + return -1; + } + + if ((ret = mtd_arg_check(fd, &nand_priv, &nand_erasesize)) < 0) { + close(fd); + return -1; + } + + len = nand_priv.end_addr - nand_priv.start_addr; + if (nand_priv.buffer == NULL) { + nand_priv.buffer = malloc(len); + if (nand_priv.buffer == NULL) { + fprintf(stderr, + "Error: Could not malloc memory %s\n", + strerror(errno)); + ret = -ENOMEM; + goto error_out; + } + } + buffer = malloc(len); + if (buffer == NULL) { + fprintf(stderr, + "Error: Could not malloc memory %s\n", + strerror(errno)); + ret = -ENOMEM; + goto error_out; + } + memset(buffer, 0, len); + + printf("\r\n********************** NANDFLASH write test **********************\r\n"); + print_arg(&nand_priv); + + while (nand_priv.times--) { + erase.start = (nand_priv.start_addr / nand_erasesize) * nand_erasesize; + erase.length = ((len + nand_erasesize) / nand_erasesize) * nand_erasesize; + if ((ret = ioctl(fd, MEMERASE, &erase)) < 0) { + perror("MEMERASE"); + goto error_out; + } + if (nand_priv.times % 2) { + for (i = 0; i < len;) { + nand_priv.buffer[i++] = nand_priv.data1; + nand_priv.buffer[i++] = nand_priv.data2; + } + } else { + for (i = 0; i < len;) { + nand_priv.buffer[i++] = nand_priv.data2; + nand_priv.buffer[i++] = nand_priv.data1; + } + } + + if ((ret = lseek(fd, nand_priv.start_addr, SEEK_SET)) < 0) { + perror("lseek"); + goto error_out; + } + + if ((ret = write(fd, nand_priv.buffer, len)) < 0) { + fprintf(stderr, "%s: write, size %ld, %d\n", __func__, len, ret); + perror("write"); + goto error_out; + } + + if ((ret = lseek(fd, nand_priv.start_addr, SEEK_SET)) < 0) { + perror("lseek"); + goto error_out; + } + + if ((ret = read(fd, buffer, len)) < 0) { + fprintf(stderr, "%s: write, size %ld, %d\n", __func__, len, ret); + perror("write"); + goto error_out; + } + if ((ret = mtd_check_data(buffer, &nand_priv, len)) < 0) { + nand_priv.check_test_errors++; + } + } + +error_out: + printf("Check test errors = %u\r\n", nand_priv.check_test_errors); + printf("\r\n******************** NANDFLASH write test End ********************\r\n\r\n"); + close(fd); + if (nand_priv.buffer) { + free(nand_priv.buffer); + } + if (buffer) { + free(buffer); + } + return ret; +} + +int nor_wr_main(int argc, char **argv) +{ + int ret, fd; + unsigned long i, len; + unsigned int nor_erasesize; + struct mtd_dev_priv nor_priv; + struct erase_info_user erase; + + memset(&nor_priv, 0, sizeof(struct mtd_dev_priv)); + + ret = mtd_arg_get(argc, argv, &nor_priv, 5); + if (ret < 0) { + mtdflash_help("nor_wr"); + return -1; + } + + if ((fd = open_mtd_dev(NOR_TEST_PARTITION)) < 0) { + return -1; + } + + if ((ret = mtd_arg_check(fd, &nor_priv, &nor_erasesize)) < 0) { + close(fd); + return -1; + } + + len = nor_priv.end_addr - nor_priv.start_addr; + if (nor_priv.buffer == NULL) { + nor_priv.buffer = malloc(len); + if (nor_priv.buffer == NULL) { + fprintf(stderr, + "Error: Could not malloc memory %s\n", + strerror(errno)); + close(fd); + return -ENOMEM; + } + } + + printf("\r\n********************** NORFLASH write test **********************\r\n"); + print_arg(&nor_priv); + + while (nor_priv.times--) { + erase.start = (nor_priv.start_addr / nor_erasesize) * nor_erasesize; + erase.length = ((len + nor_erasesize) / nor_erasesize) * nor_erasesize; + if ((ret = ioctl(fd, MEMERASE, &erase)) < 0) { + perror("MEMERASE"); + goto error_out; + } + if (nor_priv.times % 2) { + for (i = 0; i < len;) { + nor_priv.buffer[i++] = nor_priv.data1; + nor_priv.buffer[i++] = nor_priv.data2; + } + } else { + for (i = 0; i < len;) { + nor_priv.buffer[i++] = nor_priv.data2; + nor_priv.buffer[i++] = nor_priv.data1; + } + } + + if ((ret = lseek(fd, nor_priv.start_addr, SEEK_SET)) < 0) { + perror("lseek"); + goto error_out; + } + + if ((ret = write(fd, nor_priv.buffer, len)) < 0) { + fprintf(stderr, "%s: write, size %ld, %d\n", __func__, len, ret); + perror("write"); + goto error_out; + } + } + +error_out: + printf("\r\n******************** NORFLASH write test End ********************\r\n\r\n"); + close(fd); + if (nor_priv.buffer) { + free(nor_priv.buffer); + } + return ret; +} + +int nor_rd_main(int argc, char **argv) +{ + int ret, fd; + unsigned long i, len; + unsigned int nor_erasesize; + struct mtd_dev_priv nor_priv; + + memset(&nor_priv, 0, sizeof(struct mtd_dev_priv)); + + ret = mtd_arg_get(argc, argv, &nor_priv, 3); + if (ret < 0) { + mtdflash_help("nor_rd"); + return -1; + } + + if ((fd = open_mtd_dev(NOR_TEST_PARTITION)) < 0) { + return -1; + } + + if ((ret = mtd_arg_check(fd, &nor_priv, &nor_erasesize)) < 0) { + close(fd); + return -1; + } + + len = nor_priv.end_addr - nor_priv.start_addr; + if (nor_priv.buffer == NULL) { + nor_priv.buffer = malloc(len); + if (nor_priv.buffer == NULL) { + fprintf(stderr, + "Error: Could not malloc memory %s\n", + strerror(errno)); + close(fd); + return -ENOMEM; + } + } + + printf("\r\n********************** NORFLASH read test **********************\r\n"); + print_arg(&nor_priv); + + while (nor_priv.times--) { + if ((ret = lseek(fd, nor_priv.start_addr, SEEK_SET)) < 0) { + perror("lseek"); + goto error_out; + } + if ((ret = read(fd, nor_priv.buffer, len)) < 0) { + fprintf(stderr, "%s: read, size %ld, %d\n", __func__, len, ret); + perror("read"); + goto error_out; + } + } +#if 1 + printf("Last Read: \r\n"); + /* dump data */ + for (i = 0; i < len; i++) { + printf("%02X ", nor_priv.buffer[i]); + if ((i + 1) % 16 == 0) { + printf("\r\n"); + } + } +#endif + +error_out: + printf("\r\n******************** NORFLASH read test End ********************\r\n\r\n"); + close(fd); + if (nor_priv.buffer) { + free(nor_priv.buffer); + } + return ret; +} + +int nor_chk_main(int argc, char **argv) +{ + int ret, fd; + unsigned long i, len; + unsigned int nor_erasesize; + struct mtd_dev_priv nor_priv; + struct erase_info_user erase; + unsigned char *buffer = NULL; + + memset(&nor_priv, 0, sizeof(struct mtd_dev_priv)); + + ret = mtd_arg_get(argc, argv, &nor_priv, 5); + if (ret < 0) { + mtdflash_help("nand_chk"); + return -1; + } + + if ((fd = open_mtd_dev(NOR_TEST_PARTITION)) < 0) { + return -1; + } + + if ((ret = mtd_arg_check(fd, &nor_priv, &nor_erasesize)) < 0) { + close(fd); + return -1; + } + + len = nor_priv.end_addr - nor_priv.start_addr; + if (nor_priv.buffer == NULL) { + nor_priv.buffer = malloc(len); + if (nor_priv.buffer == NULL) { + fprintf(stderr, + "Error: Could not malloc memory %s\n", + strerror(errno)); + ret = -ENOMEM; + goto error_out; + } + } + buffer = malloc(len); + if (buffer == NULL) { + fprintf(stderr, + "Error: Could not malloc memory %s\n", + strerror(errno)); + ret = -ENOMEM; + goto error_out; + } + memset(buffer, 0, len); + + printf("\r\n********************** NORFLASH write test **********************\r\n"); + print_arg(&nor_priv); + + while (nor_priv.times--) { + erase.start = (nor_priv.start_addr / nor_erasesize) * nor_erasesize; + erase.length = ((len + nor_erasesize) / nor_erasesize) * nor_erasesize; + if ((ret = ioctl(fd, MEMERASE, &erase)) < 0) { + perror("MEMERASE"); + goto error_out; + } + if (nor_priv.times % 2) { + for (i = 0; i < len;) { + nor_priv.buffer[i++] = nor_priv.data1; + nor_priv.buffer[i++] = nor_priv.data2; + } + } else { + for (i = 0; i < len;) { + nor_priv.buffer[i++] = nor_priv.data2; + nor_priv.buffer[i++] = nor_priv.data1; + } + } + + if ((ret = lseek(fd, nor_priv.start_addr, SEEK_SET)) < 0) { + perror("lseek"); + goto error_out; + } + + if ((ret = write(fd, nor_priv.buffer, len)) < 0) { + fprintf(stderr, "%s: write, size %ld, %d\n", __func__, len, ret); + perror("write"); + goto error_out; + } + + if ((ret = lseek(fd, nor_priv.start_addr, SEEK_SET)) < 0) { + perror("lseek"); + goto error_out; + } + + if ((ret = read(fd, buffer, len)) < 0) { + fprintf(stderr, "%s: write, size %ld, %d\n", __func__, len, ret); + perror("write"); + goto error_out; + } + if ((ret = mtd_check_data(buffer, &nor_priv, len)) < 0) { + nor_priv.check_test_errors++; + } + } + +error_out: + printf("Check test errors = %u\r\n", nor_priv.check_test_errors); + printf("\r\n******************** NORFLASH write test End ********************\r\n\r\n"); + close(fd); + if (nor_priv.buffer) { + free(nor_priv.buffer); + } + if (buffer) { + free(buffer); + } + return ret; +} diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/hw_test/hw_test_app/hw_pci.c b/platform/broadcom/sonic-platform-modules-micas/common/app/hw_test/hw_test_app/hw_pci.c new file mode 100644 index 00000000000..7140b80dbe9 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/app/hw_test/hw_test_app/hw_pci.c @@ -0,0 +1,469 @@ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static void pci_help(char *name) +{ + fprintf(stderr, + "Usage: %s bus slot fn bar offset data [times] \r\n" + " bus pci bus number \r\n" + " slot pci slot number \r\n" + " fn pci device function number \r\n" + " bar pci resource bar number \r\n" + " offset pci register offset \r\n" + " data pci test data[32bit] \r\n" + " [times] \r\n", + name); + exit(1); +} + +static void pci_cfg_help(char *name) +{ + fprintf(stderr, + "Usage: %s bus slot fn offset data [times] \r\n" + " bus pci bus number \r\n" + " slot pci slot number \r\n" + " fn pci device function number \r\n" + " offset pci register offset \r\n" + " data pci test data[8bit] \r\n" + " [times] \r\n", + name); + exit(1); +} + +static int pci_arg_parse(int argc, char **argv, + struct pci_dev_priv *pci_priv, int min_arg, int is_cfg) +{ + int pcibus, slot, fn, bar = 0, offset = 0, times = 1; + unsigned long int data = 0; + char *end; + int flags = 0; + + if (argc < min_arg) { + return -EINVAL; + } + + pcibus = strtol(argv[flags + 1], &end, 0); + if (*end || pcibus < 0 || pcibus > 255) { + fprintf(stderr, "Error: pci bus number invalid!\n"); + return -EINVAL; + } + + slot = strtol(argv[flags + 2], &end, 0); + if (*end || slot < 0 || slot > 255) { + fprintf(stderr, "Error: pci slot number invalid!\n"); + return -EINVAL; + } + + fn = strtol(argv[flags + 3], &end, 0); + if (*end || fn < 0 || fn > 32) { + fprintf(stderr, "Error: pci device function number invalid!\n"); + return -EINVAL; + } + + if (!is_cfg) { + bar = strtol(argv[flags + 4], &end, 0); + if (*end || bar < 0 || bar > 12) { + fprintf(stderr, "Error: pci resource bar number invalid!\n"); + return -EINVAL; + } + flags++; + } + + offset = strtol(argv[flags + 4], &end, 0); + if (*end || offset < 0 || (offset & 0x3)) { + fprintf(stderr, "Error: pci register offset invalid!\n"); + return -EINVAL; + } + + if ((argc - flags) > 5) { + data = strtoul(argv[flags + 5], &end, 0); + if (*end) { + fprintf(stderr, "Error: data invalid!\n"); + return -EINVAL; + } + } + + if ((argc - flags) > 6) { + times = strtol(argv[flags + 6], &end, 0); + if (*end || times < 0) { + fprintf(stderr, "Error: times invalid!\n"); + return -EINVAL; + } + } + + pci_priv->pcibus = pcibus; + pci_priv->slot = slot; + pci_priv->fn = fn; + pci_priv->bar = bar; + pci_priv->offset = offset; + pci_priv->data = (unsigned int)data; + pci_priv->times = times; + return 0; +} + +static void print_arg(struct pci_dev_priv *pci_priv, int is_cfg) +{ + printf("Bus: %d, Slot: %d/%d", + pci_priv->pcibus, pci_priv->slot, pci_priv->fn); + + if (!is_cfg) { + printf(", Bar: %d", pci_priv->bar); + } + printf(", offset: 0x%X", pci_priv->offset); + + if (pci_priv->data) { + printf(", Data = 0x%08X", pci_priv->data); + } + + if (pci_priv->times) { + printf(", Times = %u", pci_priv->times); + } + + printf("\r\n"); +} + +static int open_pci_dev(struct pci_dev_priv *pci_priv, int is_cfg) +{ + int file, ret; + char filename[PCI_MAX_NAME_SIZE]; + + if (is_cfg) { + ret = snprintf(filename, PCI_MAX_NAME_SIZE, + "/sys/class/pci_bus/%04x:%02x/device/%04x:%02x:%02x.%d/config", + 0, pci_priv->pcibus, 0, pci_priv->pcibus, pci_priv->slot, pci_priv->fn); + } else { + ret = snprintf(filename, PCI_MAX_NAME_SIZE, + "/sys/class/pci_bus/%04x:%02x/device/%04x:%02x:%02x.%d/resource%d", + 0, pci_priv->pcibus, 0, pci_priv->pcibus, pci_priv->slot, pci_priv->fn, + pci_priv->bar); + } + + filename[ret] = '\0'; + if ((file = open(filename, O_RDWR, S_IRWXU | S_IRWXG | S_IRWXO)) < 0) { + fprintf(stderr, "Error: Could not open file " + "`%s': %s\n", filename, strerror(errno)); + } + + printf("file;%s\r\n", filename); + return file; +} + +int pci_wr_main(int argc, char **argv) +{ + int ret, fd; + struct pci_dev_priv pci_priv; + unsigned int *ptr; + struct stat sb; + + memset(&pci_priv, 0, sizeof(struct pci_dev_priv)); + ret = pci_arg_parse(argc, argv, &pci_priv, 6, 0); + if (ret < 0) { + pci_help("pci_wr"); + return -1; + } + + if ((fd = open_pci_dev(&pci_priv, 0)) < 0) { + return -1; + } + + if ((ret = fstat(fd, &sb)) == -1) { + fprintf(stderr, "Error: Could not fstat : %s\n", strerror(errno)); + close(fd); + return -1; + } + + if (pci_priv.offset >= sb.st_size) { + fprintf(stderr, "Error: offset is out of range\n"); + close(fd); + return -1; + } + + if ((ptr = mmap(NULL, sb.st_size, PROT_READ | PROT_WRITE, + MAP_SHARED, fd, 0)) == MAP_FAILED) { + fprintf(stderr, "Error: Could not mmap : %s or resource is IO\n", strerror(errno)); + close(fd); + return -1; + } + + printf("\r\n" + "********************** PCI write test **********************\r\n"); + print_arg(&pci_priv, 1); + + while (pci_priv.times--) { + *((volatile unsigned int *)(ptr + pci_priv.offset / sizeof(unsigned int))) = pci_priv.data; + } + printf("Write 0x%08X to offset 0x%08X.\n\n", pci_priv.data, pci_priv.offset); + + printf("\r\n******************** PCI write test End ********************\r\n\r\n"); + munmap(ptr, sb.st_size); + close(fd); + return ret; +} + +int pci_rd_main(int argc, char **argv) +{ + int ret, fd; + struct pci_dev_priv pci_priv; + unsigned int data; + unsigned int *ptr; + struct stat sb; + + memset(&pci_priv, 0, sizeof(struct pci_dev_priv)); + ret = pci_arg_parse(argc, argv, &pci_priv, 6, 0); + if (ret < 0) { + pci_help("pci_rd"); + return -1; + } + + if ((fd = open_pci_dev(&pci_priv, 0)) < 0) { + return -1; + } + + if ((ret = fstat(fd, &sb)) == -1) { + fprintf(stderr, "Error: Could not fstat : %s\n", strerror(errno)); + close(fd); + return -1; + } + + if (pci_priv.offset >= sb.st_size) { + fprintf(stderr, "Error: offset is out of range\n"); + close(fd); + return -1; + } + + if ((ptr = mmap(NULL, sb.st_size, PROT_READ | PROT_WRITE, + MAP_SHARED, fd, 0)) == MAP_FAILED) { + fprintf(stderr, "Error: Could not mmap : %s or resource is IO\n", strerror(errno)); + close(fd); + return -1; + } + + printf("\r\n" + "********************** PCI read test **********************\r\n"); + print_arg(&pci_priv, 1); + + data = 0; + while (pci_priv.times--) { + data = *((volatile unsigned int *)(ptr + pci_priv.offset / sizeof(unsigned int))); + } + printf("Last Read: Data = 0x%08X\n", data); + + printf("\r\n******************** PCI read test End ********************\r\n\r\n"); + munmap(ptr, sb.st_size); + close(fd); + return ret; +} + +int pci_cfg_wr_main(int argc, char **argv) +{ + int ret, fd; + struct pci_dev_priv pci_priv; + char buf[16]; + + memset(&pci_priv, 0, sizeof(struct pci_dev_priv)); + ret = pci_arg_parse(argc, argv, &pci_priv, 6, 1); + if (ret < 0) { + pci_cfg_help("pci_cfg_wr"); + return -1; + } + + if ((fd = open_pci_dev(&pci_priv, 1)) < 0) { + return -1; + } + + printf("\r\n" + "********************** PCI config write test **********************\r\n"); + print_arg(&pci_priv, 1); + + while (pci_priv.times--) { + if ((ret = lseek(fd, pci_priv.offset, SEEK_SET)) < 0) { + fprintf(stderr, "Error: Could not llseek : %s\n", strerror(errno)); + goto error_out; + } + + buf[0] = (pci_priv.data >> 0) & 0xFF; + buf[1] = (pci_priv.data >> 8) & 0xFF; + buf[2] = (pci_priv.data >> 16) & 0xFF; + buf[3] = (pci_priv.data >> 24) & 0xFF; + if ((ret = write(fd, buf, sizeof(unsigned int))) < 0) { + fprintf(stderr, "Error: Could not read file : %s\n", strerror(errno)); + goto error_out; + } + } + printf("Write 0x%08X to offset 0x%08X.\n\n", pci_priv.data, pci_priv.offset); + +error_out: + printf("\r\n******************** PCI config write test End ********************\r\n\r\n"); + close(fd); + return ret; +} + +int pci_cfg_rd_main(int argc, char **argv) +{ + int ret, fd; + struct pci_dev_priv pci_priv; + unsigned int data; + + memset(&pci_priv, 0, sizeof(struct pci_dev_priv)); + ret = pci_arg_parse(argc, argv, &pci_priv, 5, 1); + if (ret < 0) { + pci_cfg_help("pci_cfg_rd"); + return -1; + } + + if ((fd = open_pci_dev(&pci_priv, 1)) < 0) { + return -1; + } + + printf("\r\n" + "********************** PCI config read test **********************\r\n"); + print_arg(&pci_priv, 1); + + while (pci_priv.times--) { + if ((ret = lseek(fd, pci_priv.offset, SEEK_SET)) < 0) { + fprintf(stderr, "Error: Could not llseek : %s\n", strerror(errno)); + goto error_out; + } + + if ((ret = read(fd, &data, sizeof(unsigned int))) < 0) { + fprintf(stderr, "Error: Could not read file : %s\n", strerror(errno)); + goto error_out; + } + } + printf("Last Read: Data = 0x%08X\n", data); + +error_out: + printf("\r\n******************** PCI config read test End ********************\r\n\r\n"); + close(fd); + return ret; +} + +int pci_chk_main(int argc, char **argv) +{ + int ret, fd; + struct pci_dev_priv pci_priv; + unsigned int data; + unsigned int *ptr; + struct stat sb; + + memset(&pci_priv, 0, sizeof(struct pci_dev_priv)); + ret = pci_arg_parse(argc, argv, &pci_priv, 6, 0); + if (ret < 0) { + pci_help("pci_wr"); + return -1; + } + + if ((fd = open_pci_dev(&pci_priv, 0)) < 0) { + return -1; + } + + if ((ret = fstat(fd, &sb)) == -1) { + fprintf(stderr, "Error: Could not fstat : %s\n", strerror(errno)); + close(fd); + return -1; + } + + if (pci_priv.offset >= sb.st_size) { + fprintf(stderr, "Error: offset is out of range\n"); + close(fd); + return -1; + } + + if ((ptr = mmap(NULL, sb.st_size, PROT_READ | PROT_WRITE, + MAP_SHARED, fd, 0)) == MAP_FAILED) { + fprintf(stderr, "Error: Could not mmap : %s or resource is IO\n", strerror(errno)); + close(fd); + return -1; + } + + printf("\r\n" + "********************** PCI Check test **********************\r\n"); + print_arg(&pci_priv, 1); + + while (pci_priv.times--) { + *((volatile unsigned int *)(ptr + pci_priv.offset / sizeof(unsigned int))) = pci_priv.data; + data = *((volatile unsigned int *)(ptr + pci_priv.offset / sizeof(unsigned int))); + if (pci_priv.data != data) { + pci_priv.check_test_errors++; + } + } + printf("Check test errors = %u\r\n", pci_priv.check_test_errors); + + printf("\r\n******************** PCI Check test End ********************\r\n\r\n"); + munmap(ptr, sb.st_size); + close(fd); + return ret; +} + +int pci_dump_main(int argc, char **argv) +{ + int ret, fd, i; + struct pci_dev_priv pci_priv; + unsigned int *ptr; + unsigned char *p; + struct stat sb; + + memset(&pci_priv, 0, sizeof(struct pci_dev_priv)); + ret = pci_arg_parse(argc, argv, &pci_priv, 6, 0); + if (ret < 0) { + pci_help("pci_dump"); + return -1; + } + + if ((fd = open_pci_dev(&pci_priv, 0)) < 0) { + return -1; + } + + if ((ret = fstat(fd, &sb)) == -1) { + fprintf(stderr, "Error: Could not fstat : %s\n", strerror(errno)); + close(fd); + return -1; + } + + if (pci_priv.offset >= sb.st_size) { + fprintf(stderr, "Error: offset is out of range\n"); + close(fd); + return -1; + } + + if ((ptr = mmap(NULL, sb.st_size, PROT_READ | PROT_WRITE, + MAP_SHARED, fd, 0)) == MAP_FAILED) { + fprintf(stderr, "Error: Could not mmap : %s or resource is IO\n", strerror(errno)); + close(fd); + return -1; + } + + printf("\r\n" + "********************** PCI dump test **********************\r\n"); + print_arg(&pci_priv, 1); + + printf(" Address | 0 1 2 3 4 5 6 7 8 9 A B C D E F\r\n"); + while (pci_priv.times--) { + p = (unsigned char *)ptr; + for (i = 0; i < pci_priv.offset; i++, p++) { + if (i % 16 == 0) { + printf("%08X | ", (unsigned int)((unsigned long)p - (unsigned long)ptr)); + } + printf("%02X ", *p); + if ((i + 1) % 16 == 0) { + printf("\r\n"); + } + } + } + + printf("\r\n******************** PCI dump test End ********************\r\n\r\n"); + munmap(ptr, sb.st_size); + close(fd); + return ret; +} diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/hw_test/hw_test_app/hw_test.c b/platform/broadcom/sonic-platform-modules-micas/common/app/hw_test/hw_test_app/hw_test.c new file mode 100644 index 00000000000..1cfaa225050 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/app/hw_test/hw_test_app/hw_test.c @@ -0,0 +1,163 @@ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static struct hw_applet hw_applets[] = { + /* I2C */ + HWTEST_APPLET(i2c_wr, "i2c_wr slave_addr offset data [data_len] [times] [offset_len]"), + HWTEST_APPLET(i2c_rd, "i2c_rd slave_addr offset [data_len] [times] [offset_len]"), + HWTEST_APPLET(i2c_chk, "i2c_chk slave_addr offset data [data_len] [times]"), + HWTEST_APPLET(i2c_reset, "not support"), + HWTEST_APPLET(pca9548_rd, "pca9548 i2c_bus slave_addr offset data [data_len] [times]"), + HWTEST_APPLET(pca9548_wr, "pca9548 i2c_bus slave_addr offset data [data_len] [times]"), + HWTEST_APPLET(rtc_rd, "rtc_rd rtc year month day hour minute second"), + HWTEST_APPLET(rtc_wr, "rtc_wr rtc year month day hour minute second"), + /* NorFlash */ + HWTEST_APPLET(nor_wr, "nor_wr start_addr end_addr data1 data2 [times]"), + HWTEST_APPLET(nor_rd, "nor_rd start_addr end_addr data1 data2 [times]"), + HWTEST_APPLET(nor_chk, "nor_chk start_addr end_addr data1 data2 [times]"), + /* NandFlash */ + HWTEST_APPLET(nand_wr, "nand_wr start_addr end_addr data1 data2 [times]"), + HWTEST_APPLET(nand_rd, "nand_rd start_addr end_addr data1 data2 [times]"), + HWTEST_APPLET(nand_chk, "nand_chk start_addr end_addr data1 data2 [times]"), + /* Dram */ + HWTEST_APPLET(dram_wr, "not support"), + HWTEST_APPLET(dram_rd, "not support"), + HWTEST_APPLET(dram_chk, "not support"), + HWTEST_APPLET(dram_test, "dram_test [simple|complex some|complex all]"), + /* PCI */ + HWTEST_APPLET(pci_wr, "pci_wr bus slot fn bar offset data [times]"), + HWTEST_APPLET(pci_rd, "pci_rd bus slot fn bar offset data [times]"), + HWTEST_APPLET(pci_dump, "pci_dump bus slot fn bar offset data [times]"), + HWTEST_APPLET(pci_cfg_wr, "pci_cfg_wr bus slot fn offset data [times]"), + HWTEST_APPLET(pci_cfg_rd, "pci_cfg_rd bus slot fn offset data [times]"), + HWTEST_APPLET(pci_chk, "pci_chk bus slot fn bar offset data [times]"), + /* USB */ + HWTEST_APPLET(usb_write, "not support"), + HWTEST_APPLET(usb_read, "not support"), + HWTEST_APPLET(usb_check, "not support"), + /* eMMC */ + HWTEST_APPLET(emmc_test, "emmc_test"), + /* MISC */ + HWTEST_APPLET(reload, "not support"), + HWTEST_APPLET(sys_info, "not support"), + HWTEST_APPLET(mem_dump, "not support"), + HWTEST_APPLET(cache_flush, "not support"), + HWTEST_APPLET(reg_wr64, "reg_wr64 reg_addr [reg_data]"), + HWTEST_APPLET(reg_rd64, "reg_rd64 reg_addr [reg_data]"), + HWTEST_APPLET(reg_wr32, "reg_wr32 reg_addr [reg_data]"), + HWTEST_APPLET(reg_rd32, "reg_rd32 reg_addr [reg_data]"), + HWTEST_APPLET(reg_wr16, "reg_wr16 reg_addr [reg_data]"), + HWTEST_APPLET(reg_rd16, "reg_rd16 reg_addr [reg_data]"), + HWTEST_APPLET(reg_wr8, "reg_wr8 reg_addr [reg_data]"), + HWTEST_APPLET(reg_rd8, "reg_rd8 reg_addr [reg_data]"), + /* phydev */ + HWTEST_APPLET(phydev_list, "phydev_list"), + HWTEST_APPLET(phydev_rd, "phydev_rd phy_index reg_addr"), + HWTEST_APPLET(phydev_wr, "phydev_wr phy_index reg_addr reg_data"), + /* mdio bus */ + HWTEST_APPLET(mdiodev_list, "mdiodev_list"), + HWTEST_APPLET(mdiodev_rd, "mdiodev_rd mdio_index phyaddr reg_addr"), + HWTEST_APPLET(mdiodev_wr, "mdiodev_wr mdio_index phyaddr reg_addr reg_data"), + /* hw help */ + HWTEST_APPLET(hw_help, "help") +}; + +static size_t hw_num_applets = (sizeof(hw_applets) / sizeof(struct hw_applet)); + +static void error_msg_and_die(const char *s, ...) +{ + va_list p; + + va_start(p, s); + fflush(stdout); + vfprintf(stderr, s, p); + va_end(p); + fputs("\r\n", stderr); + exit(1); +} + +static int applet_name_compare (const void *x, const void *y) +{ + const char *name = x; + const struct hw_applet *applet = y; + + return strcmp (name, applet->name); +} + +struct hw_applet *find_applet_by_name (const char *name) +{ + return lfind(name, hw_applets, &hw_num_applets, sizeof(struct hw_applet), + applet_name_compare); +} + +static void show_usage () +{ + size_t i; + for (i = 0; i < hw_num_applets; i++) { + printf("%-20s\t\t\t%s\r\n", hw_applets[i].name, hw_applets[i].help); + } + exit (0); +} + +int hw_help_main(int argc, char **argv) +{ + argc = argc; + argv = argv; + show_usage(); + return 0; +} + +static void run_applet_by_name (const char *name, int argc, char **argv) +{ + struct hw_applet *applet_using; + + if (argc == 0) { + show_usage (); + } + + if(!strncmp(name, "hw_test", 7)) { + run_applet_by_name(argv[1], argc - 1, argv + 1); + } + + applet_using = find_applet_by_name(name); + if(applet_using) { + if(argc == 2 && !strcmp(argv[1], "--help")) { + show_usage (); + } + exit ((*(applet_using->main)) (argc, argv)); + } +} + +int main(int argc, char **argv) +{ + char *applet_name, *s; + applet_name = argv[0]; + + for (s = applet_name; *s; ) { + if (*(s++) == '/') { + applet_name = s; + } + } + + run_applet_by_name(applet_name, argc, argv); + error_msg_and_die("%s: applet not found", applet_name); + return 0; +} \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/hw_test/hw_test_app/hw_usb.c b/platform/broadcom/sonic-platform-modules-micas/common/app/hw_test/hw_test_app/hw_usb.c new file mode 100644 index 00000000000..7f33c383966 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/app/hw_test/hw_test_app/hw_usb.c @@ -0,0 +1,28 @@ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +int usb_write_main(int argc, char **argv) +{ + printf("%s, %d, %d, %s\r\n", __FUNCTION__, __LINE__, argc, argv[0]); + return 0; +} + +int usb_read_main(int argc, char **argv) +{ + printf("%s, %d, %d, %s\r\n", __FUNCTION__, __LINE__, argc, argv[0]); + return 0; +} + +int usb_check_main(int argc, char **argv) +{ + printf("%s, %d, %d, %s\r\n", __FUNCTION__, __LINE__, argc, argv[0]); + return 0; +} diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/hw_test/hw_test_app/include/hw_dram/fac_common.h b/platform/broadcom/sonic-platform-modules-micas/common/app/hw_test/hw_test_app/include/hw_dram/fac_common.h new file mode 100644 index 00000000000..2fb6ee417a7 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/app/hw_test/hw_test_app/include/hw_dram/fac_common.h @@ -0,0 +1,32 @@ +#ifndef _FAC_AC_COMMON_H_ +#define _FAC_AC_COMMON_H_ + +#define FAC_TEST_OK 0 +#define FAC_TEST_FAIL 1 +#define GRTD_LOG_DEBUG 2 +#define GRTD_LOG_ERR 1 +#define GRTD_LOG_NONE 0 +#define FAC_MEM_SIZE_BUF_LEN 1024 /* Save the length of the memory size */ +#define FAC_MEM_TEST_SIZE (1024*1024*32) /* Memory test size */ +#define FAC_MEM_AUTOTEST_SIZE (1024*1024*2048ULL) /* Memory test size */ +#define FAC_MEM_MAX_SIZE (1024*1024*4096ULL) /* Memory test size */ +#define FAC_MEM_TEST_PAGESIZE 8192 /* pagesize for memory tests */ +#define FAC_FILENAME_LEN 128 /* Device file name length */ +#define FAC_FILE_LINE_LEN 128 /* The length of each line of the file */ +#define FAC_FILE_SIZE_LEN 16 /* Length that represents size in a file */ +#define GRTD_SDRAM_ECC_ERR 1 /* ECC check error */ +#define GRTD_SDRAM_WR_ERR 2 /* Read/write erro */ +#define GRTD_SDRAM_GET_MEM_SIZE_ERR 3 /* Failed to obtain the memory capacity */ +#define GRTD_SDRAM_UNKNOW_ERR 4 /* Other unknown errors */ + +extern int platform_fac_dbg; +/* The production test module tracks debugging information */ +#define FAC_LOG_DBG(dbg, fmt, arg...) \ + do { \ + if (dbg <= platform_fac_dbg) { \ + printf("[FACTORY <%s>:<%d>] " fmt, \ + __FUNCTION__, __LINE__, ##arg); \ + } \ + } while (0) + +#endif /* _FAC_AC_COMMON_H_ */ diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/hw_test/hw_test_app/include/hw_dram/ft_ddr_test.h b/platform/broadcom/sonic-platform-modules-micas/common/app/hw_test/hw_test_app/include/hw_dram/ft_ddr_test.h new file mode 100644 index 00000000000..1381b4386cb --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/app/hw_test/hw_test_app/include/hw_dram/ft_ddr_test.h @@ -0,0 +1,104 @@ +#ifndef __FT_DDR_TEST_H__ +#define __FT_DDR_TEST_H__ + +#include + +#define FT_DDR_SUCCESS 0 +#define FT_DDR_ERR 1 +#define SPINSZ 0x800000 +#define MOD_SZ 20 +#define MAX_MEM_SEGMENTS 32 +#define BLK_SIZE_NUM_MAX 9 +#define BADRAM_MAXPATNS 10 +#define LOW_TEST_ADR 0x00002000 /* Final adrs for test code */ +#define HIGH_TEST_ADR 0x00180000 /* Relocation base address */ +#define USE_DMA +#define TETS_TOTAL_NUMBER 14 + +#define FT_SHOW_PROCESS +#ifdef FT_SHOW_PROCESS +#define FT_DDR_SHOW() do {printf("."); fflush(stdout);}while (0) +#define FT_DDR_SHOW_END() do {printf("\n"); fflush(stdout);}while (0) +#else +#define FT_DDR_SHOW() do {}while (0) +#define FT_DDR_SHOW_END() do {}while (0) +#endif + +typedef struct data_seg_s { + int seq; + ulong start_addr; + ulong end_addr; + ulong size; + int use_dma; +} data_seg_t; + +struct pair { + ulong adr; + ulong mask; +}; + +struct mmap { + ulong pbase_addr; + unsigned int *start; + unsigned int *end; +}; + +struct pmap { + ulong start; + ulong end; +}; + +/* Define common variables accross relocations of memtest86 */ +struct vars { + int test; + int pass; + unsigned long *eadr; + unsigned long exor; + int msg_line; + int ecount; + int ecc_ecount; + int msegs; /* The number of memory areas to test */ + int testsel; + int scroll_start; + int rdtsc; + int pae; + int pass_ticks; + int total_ticks; + int pptr; + int tptr; + struct pmap pmap[MAX_MEM_SEGMENTS]; + struct mmap map[MAX_MEM_SEGMENTS]; + ulong plim_lower; + ulong plim_upper; + ulong clks_msec; + ulong starth; + ulong startl; + ulong snaph; + ulong snapl; + int printmode; + int numpatn; + struct pair patn [BADRAM_MAXPATNS]; + ulong test_pages; + ulong selected_pages; + ulong reserved_pages; +}; + +struct tseq { + short cache; + short pat; + short iter; + short ticks; + short errors; + char *msg; +}; + +typedef struct ft_ddr_test_interface_s { + int always; /* Copy machine test 0: No test 1: test */ + int (*ddr_test)(char *desc); + char name[64]; +} ft_ddr_test_interface_t; + +extern void ft_ddr_test_init(void *start, size_t size); +extern ft_ddr_test_interface_t ft_ddr_test_fun[TETS_TOTAL_NUMBER]; + +#endif /* __FT_DDR_TEST_H__ */ diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/hw_test/hw_test_app/include/hw_dram/hw_dram.h b/platform/broadcom/sonic-platform-modules-micas/common/app/hw_test/hw_test_app/include/hw_dram/hw_dram.h new file mode 100644 index 00000000000..0d4e5349ec3 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/app/hw_test/hw_test_app/include/hw_dram/hw_dram.h @@ -0,0 +1,9 @@ +#ifndef _HW_DRAM_H +#define _HW_DRAM_H + +extern int dram_wr_main(int argc, char **argv); +extern int dram_rd_main(int argc, char **argv); +extern int dram_chk_main(int argc, char **argv); +extern int dram_test_main(int argc, char **argv); + +#endif /* _HW_DRAM_H */ diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/hw_test/hw_test_app/include/hw_emmc/hw_emmc.h b/platform/broadcom/sonic-platform-modules-micas/common/app/hw_test/hw_test_app/include/hw_emmc/hw_emmc.h new file mode 100644 index 00000000000..40b19ba4b79 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/app/hw_test/hw_test_app/include/hw_emmc/hw_emmc.h @@ -0,0 +1,6 @@ +#ifndef _HW_EMMC_H +#define _HW_EMMC_H + +extern int emmc_test_main(int argc, char **argv); + +#endif /* _HW_EMMC_H */ diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/hw_test/hw_test_app/include/hw_i2c/hw_i2c.h b/platform/broadcom/sonic-platform-modules-micas/common/app/hw_test/hw_test_app/include/hw_i2c/hw_i2c.h new file mode 100644 index 00000000000..62a31c6ae1f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/app/hw_test/hw_test_app/include/hw_i2c/hw_i2c.h @@ -0,0 +1,27 @@ +#ifndef _HW_I2C_H +#define _HW_I2C_H + +struct i2c_dev_priv { + int i2cbus; + int save_addr; + int offset; + int offset_len; + unsigned char data; + int data_len; + int times; + unsigned int check_test_errors; + unsigned char *buffer; +}; + +#define I2C_MAX_NAME_SIZE 128 + +extern int i2c_wr_main(int argc, char **argv); +extern int i2c_rd_main(int argc, char **argv); +extern int i2c_chk_main(int argc, char **argv); +extern int i2c_reset_main(int argc, char **argv); +extern int pca9548_rd_main(int argc, char **argv); +extern int pca9548_wr_main(int argc, char **argv); +extern int rtc_rd_main(int argc, char **argv); +extern int rtc_wr_main(int argc, char **argv); + +#endif /* _HW_I2C_H */ diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/hw_test/hw_test_app/include/hw_i2c/i2c-dev.h b/platform/broadcom/sonic-platform-modules-micas/common/app/hw_test/hw_test_app/include/hw_i2c/i2c-dev.h new file mode 100644 index 00000000000..2585944c77e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/app/hw_test/hw_test_app/include/hw_i2c/i2c-dev.h @@ -0,0 +1,69 @@ +/* + i2c-dev.h - i2c-bus driver, char device interface + + Copyright (C) 1995-97 Simon G. Vogl + Copyright (C) 1998-99 Frodo Looijaard + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + MA 02110-1301 USA. +*/ + +#ifndef _LINUX_I2C_DEV_H +#define _LINUX_I2C_DEV_H + +#include + +/* /dev/i2c-X ioctl commands. The ioctl's parameter is always an + * unsigned long, except for: + * - I2C_FUNCS, takes pointer to an unsigned long + * - I2C_RDWR, takes pointer to struct i2c_rdwr_ioctl_data + * - I2C_SMBUS, takes pointer to struct i2c_smbus_ioctl_data + */ +#define I2C_RETRIES 0x0701 /* number of times a device address should + be polled when not acknowledging */ +#define I2C_TIMEOUT 0x0702 /* set timeout in units of 10 ms */ + +/* NOTE: Slave address is 7 or 10 bits, but 10-bit addresses + * are NOT supported! (due to code brokenness) + */ +#define I2C_SLAVE 0x0703 /* Use this slave address */ +#define I2C_SLAVE_FORCE 0x0706 /* Use this slave address, even if it + is already in use by a driver! */ +#define I2C_TENBIT 0x0704 /* 0 for 7 bit addrs, != 0 for 10 bit */ + +#define I2C_FUNCS 0x0705 /* Get the adapter functionality mask */ + +#define I2C_RDWR 0x0707 /* Combined R/W transfer (one STOP only) */ + +#define I2C_PEC 0x0708 /* != 0 to use PEC with SMBus */ +#define I2C_SMBUS 0x0720 /* SMBus transfer */ + +/* This is the structure as used in the I2C_SMBUS ioctl call */ +struct i2c_smbus_ioctl_data { + __u8 read_write; + __u8 command; + __u32 size; + union i2c_smbus_data *data; +}; + +/* This is the structure as used in the I2C_RDWR ioctl call */ +struct i2c_rdwr_ioctl_data { + struct i2c_msg *msgs; /* pointers to i2c_msgs */ + __u32 nmsgs; /* number of i2c_msgs */ +}; + +#define I2C_RDRW_IOCTL_MAX_MSGS 42 + +#endif /* _LINUX_I2C_DEV_H */ diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/hw_test/hw_test_app/include/hw_i2c/i2c.h b/platform/broadcom/sonic-platform-modules-micas/common/app/hw_test/hw_test_app/include/hw_i2c/i2c.h new file mode 100644 index 00000000000..4498740ddca --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/app/hw_test/hw_test_app/include/hw_i2c/i2c.h @@ -0,0 +1,734 @@ +/* ------------------------------------------------------------------------- */ +/* */ +/* i2c.h - definitions for the i2c-bus interface */ +/* */ +/* ------------------------------------------------------------------------- */ +/* Copyright (C) 1995-2000 Simon G. Vogl + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ +/* ------------------------------------------------------------------------- */ + +#ifndef _LINUX_I2C_H +#define _LINUX_I2C_H + +#include +#ifdef __KERNEL__ +#include +#include +#include +#include /* for struct device */ +#include /* for completion */ +#include + +extern struct bus_type i2c_bus_type; +extern struct device_type i2c_adapter_type; + +/* --- General options ------------------------------------------------ */ + +struct i2c_msg; +struct i2c_algorithm; +struct i2c_adapter; +struct i2c_client; +struct i2c_driver; +union i2c_smbus_data; +struct i2c_board_info; + +#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) +/* + * The master routines are the ones normally used to transmit data to devices + * on a bus (or read from them). Apart from two basic transfer functions to + * transmit one message at a time, a more complex version can be used to + * transmit an arbitrary number of messages without interruption. + */ +extern int i2c_master_send(struct i2c_client *client, const char *buf, + int count); +extern int i2c_master_recv(struct i2c_client *client, char *buf, int count); + +/* Transfer num messages. + */ +extern int i2c_transfer(struct i2c_adapter *adap, struct i2c_msg *msgs, + int num); + +/* This is the very generalized SMBus access routine. You probably do not + want to use this, though; one of the functions below may be much easier, + and probably just as fast. + Note that we use i2c_adapter here, because you do not need a specific + smbus adapter to call this function. */ +extern s32 i2c_smbus_xfer(struct i2c_adapter *adapter, u16 addr, + unsigned short flags, char read_write, u8 command, + int size, union i2c_smbus_data *data); + +/* Now follow the 'nice' access routines. These also document the calling + conventions of i2c_smbus_xfer. */ + +extern s32 i2c_smbus_read_byte(struct i2c_client *client); +extern s32 i2c_smbus_write_byte(struct i2c_client *client, u8 value); +extern s32 i2c_smbus_read_byte_data(struct i2c_client *client, u8 command); +extern s32 i2c_smbus_write_byte_data(struct i2c_client *client, + u8 command, u8 value); +extern s32 i2c_smbus_read_word_data(struct i2c_client *client, u8 command); +extern s32 i2c_smbus_write_word_data(struct i2c_client *client, + u8 command, u16 value); +/* Returns the number of read bytes */ +extern s32 i2c_smbus_read_block_data(struct i2c_client *client, + u8 command, u8 *values); +extern s32 i2c_smbus_write_block_data(struct i2c_client *client, + u8 command, u8 length, const u8 *values); +/* Returns the number of read bytes */ +extern s32 i2c_smbus_read_i2c_block_data(struct i2c_client *client, + u8 command, u8 length, u8 *values); +extern s32 i2c_smbus_write_i2c_block_data(struct i2c_client *client, + u8 command, u8 length, + const u8 *values); +#endif /* I2C */ + +/** + * struct i2c_driver - represent an I2C device driver + * @class: What kind of i2c device we instantiate (for detect) + * @attach_adapter: Callback for bus addition (for legacy drivers) + * @detach_adapter: Callback for bus removal (for legacy drivers) + * @probe: Callback for device binding + * @remove: Callback for device unbinding + * @shutdown: Callback for device shutdown + * @suspend: Callback for device suspend + * @resume: Callback for device resume + * @command: Callback for bus-wide signaling (optional) + * @driver: Device driver model driver + * @id_table: List of I2C devices supported by this driver + * @detect: Callback for device detection + * @address_data: The I2C addresses to probe, ignore or force (for detect) + * @clients: List of detected clients we created (for i2c-core use only) + * + * The driver.owner field should be set to the module owner of this driver. + * The driver.name field should be set to the name of this driver. + * + * For automatic device detection, both @detect and @address_data must + * be defined. @class should also be set, otherwise only devices forced + * with module parameters will be created. The detect function must + * fill at least the name field of the i2c_board_info structure it is + * handed upon successful detection, and possibly also the flags field. + * + * If @detect is missing, the driver will still work fine for enumerated + * devices. Detected devices simply won't be supported. This is expected + * for the many I2C/SMBus devices which can't be detected reliably, and + * the ones which can always be enumerated in practice. + * + * The i2c_client structure which is handed to the @detect callback is + * not a real i2c_client. It is initialized just enough so that you can + * call i2c_smbus_read_byte_data and friends on it. Don't do anything + * else with it. In particular, calling dev_dbg and friends on it is + * not allowed. + */ +struct i2c_driver { + unsigned int class; + + /* Notifies the driver that a new bus has appeared or is about to be + * removed. You should avoid using this if you can, it will probably + * be removed in a near future. + */ + int (*attach_adapter)(struct i2c_adapter *); + int (*detach_adapter)(struct i2c_adapter *); + + /* Standard driver model interfaces */ + int (*probe)(struct i2c_client *, const struct i2c_device_id *); + int (*remove)(struct i2c_client *); + + /* driver model interfaces that don't relate to enumeration */ + void (*shutdown)(struct i2c_client *); + int (*suspend)(struct i2c_client *, pm_message_t mesg); + int (*resume)(struct i2c_client *); + + /* a ioctl like command that can be used to perform specific functions + * with the device. + */ + int (*command)(struct i2c_client *client, unsigned int cmd, void *arg); + + struct device_driver driver; + const struct i2c_device_id *id_table; + + /* Device detection callback for automatic device creation */ + int (*detect)(struct i2c_client *, int kind, struct i2c_board_info *); + const struct i2c_client_address_data *address_data; + struct list_head clients; +}; +#define to_i2c_driver(d) container_of(d, struct i2c_driver, driver) + +/** + * struct i2c_client - represent an I2C slave device + * @flags: I2C_CLIENT_TEN indicates the device uses a ten bit chip address; + * I2C_CLIENT_PEC indicates it uses SMBus Packet Error Checking + * @addr: Address used on the I2C bus connected to the parent adapter. + * @name: Indicates the type of the device, usually a chip name that's + * generic enough to hide second-sourcing and compatible revisions. + * @adapter: manages the bus segment hosting this I2C device + * @driver: device's driver, hence pointer to access routines + * @dev: Driver model device node for the slave. + * @irq: indicates the IRQ generated by this device (if any) + * @detected: member of an i2c_driver.clients list or i2c-core's + * userspace_devices list + * + * An i2c_client identifies a single device (i.e. chip) connected to an + * i2c bus. The behaviour exposed to Linux is defined by the driver + * managing the device. + */ +struct i2c_client { + unsigned short flags; /* div., see below */ + unsigned short addr; /* chip address - NOTE: 7bit */ + /* addresses are stored in the */ + /* _LOWER_ 7 bits */ + char name[I2C_NAME_SIZE]; + struct i2c_adapter *adapter; /* the adapter we sit on */ + struct i2c_driver *driver; /* and our access routines */ + struct device dev; /* the device structure */ + int irq; /* irq issued by device */ + struct list_head detected; +}; +#define to_i2c_client(d) container_of(d, struct i2c_client, dev) + +extern struct i2c_client *i2c_verify_client(struct device *dev); + +static inline struct i2c_client *kobj_to_i2c_client(struct kobject *kobj) +{ + struct device * const dev = container_of(kobj, struct device, kobj); + return to_i2c_client(dev); +} + +static inline void *i2c_get_clientdata(const struct i2c_client *dev) +{ + return dev_get_drvdata(&dev->dev); +} + +static inline void i2c_set_clientdata(struct i2c_client *dev, void *data) +{ + dev_set_drvdata(&dev->dev, data); +} + +/** + * struct i2c_board_info - template for device creation + * @type: chip type, to initialize i2c_client.name + * @flags: to initialize i2c_client.flags + * @addr: stored in i2c_client.addr + * @platform_data: stored in i2c_client.dev.platform_data + * @archdata: copied into i2c_client.dev.archdata + * @irq: stored in i2c_client.irq + * + * I2C doesn't actually support hardware probing, although controllers and + * devices may be able to use I2C_SMBUS_QUICK to tell whether or not there's + * a device at a given address. Drivers commonly need more information than + * that, such as chip type, configuration, associated IRQ, and so on. + * + * i2c_board_info is used to build tables of information listing I2C devices + * that are present. This information is used to grow the driver model tree. + * For mainboards this is done statically using i2c_register_board_info(); + * bus numbers identify adapters that aren't yet available. For add-on boards, + * i2c_new_device() does this dynamically with the adapter already known. + */ +struct i2c_board_info { + char type[I2C_NAME_SIZE]; + unsigned short flags; + unsigned short addr; + void *platform_data; + struct dev_archdata *archdata; + struct device_node *of_node; + int irq; +}; + +/** + * I2C_BOARD_INFO - macro used to list an i2c device and its address + * @dev_type: identifies the device type + * @dev_addr: the device's address on the bus. + * + * This macro initializes essential fields of a struct i2c_board_info, + * declaring what has been provided on a particular board. Optional + * fields (such as associated irq, or device-specific platform_data) + * are provided using conventional syntax. + */ +#define I2C_BOARD_INFO(dev_type, dev_addr) \ + .type = dev_type, .addr = (dev_addr) + +#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) +/* Add-on boards should register/unregister their devices; e.g. a board + * with integrated I2C, a config eeprom, sensors, and a codec that's + * used in conjunction with the primary hardware. + */ +extern struct i2c_client * +i2c_new_device(struct i2c_adapter *adap, struct i2c_board_info const *info); + +/* If you don't know the exact address of an I2C device, use this variant + * instead, which can probe for device presence in a list of possible + * addresses. + */ +extern struct i2c_client * +i2c_new_probed_device(struct i2c_adapter *adap, + struct i2c_board_info *info, + unsigned short const *addr_list); + +/* For devices that use several addresses, use i2c_new_dummy() to make + * client handles for the extra addresses. + */ +extern struct i2c_client * +i2c_new_dummy(struct i2c_adapter *adap, u16 address); + +extern void i2c_unregister_device(struct i2c_client *); +#endif /* I2C */ + +/* Mainboard arch_initcall() code should register all its I2C devices. + * This is done at arch_initcall time, before declaring any i2c adapters. + * Modules for add-on boards must use other calls. + */ +#ifdef CONFIG_I2C_BOARDINFO +extern int +i2c_register_board_info(int busnum, struct i2c_board_info const *info, + unsigned n); +#else +static inline int +i2c_register_board_info(int busnum, struct i2c_board_info const *info, + unsigned n) +{ + return 0; +} +#endif /* I2C_BOARDINFO */ + +/* + * The following structs are for those who like to implement new bus drivers: + * i2c_algorithm is the interface to a class of hardware solutions which can + * be addressed using the same bus algorithms - i.e. bit-banging or the PCF8584 + * to name two of the most common. + */ +struct i2c_algorithm { + /* If an adapter algorithm can't do I2C-level access, set master_xfer + to NULL. If an adapter algorithm can do SMBus access, set + smbus_xfer. If set to NULL, the SMBus protocol is simulated + using common I2C messages */ + /* master_xfer should return the number of messages successfully + processed, or a negative value on error */ + int (*master_xfer)(struct i2c_adapter *adap, struct i2c_msg *msgs, + int num); + int (*smbus_xfer) (struct i2c_adapter *adap, u16 addr, + unsigned short flags, char read_write, + u8 command, int size, union i2c_smbus_data *data); + + /* To determine what the adapter supports */ + u32 (*functionality) (struct i2c_adapter *); +}; + +/* + * i2c_adapter is the structure used to identify a physical i2c bus along + * with the access algorithms necessary to access it. + */ +struct i2c_adapter { + struct module *owner; + unsigned int id; + unsigned int class; /* classes to allow probing for */ + const struct i2c_algorithm *algo; /* the algorithm to access the bus */ + void *algo_data; + + /* data fields that are valid for all devices */ + u8 level; /* nesting level for lockdep */ + struct mutex bus_lock; + + int timeout; /* in jiffies */ + int retries; + struct device dev; /* the adapter device */ + + int nr; + char name[48]; + struct completion dev_released; +}; +#define to_i2c_adapter(d) container_of(d, struct i2c_adapter, dev) + +static inline void *i2c_get_adapdata(const struct i2c_adapter *dev) +{ + return dev_get_drvdata(&dev->dev); +} + +static inline void i2c_set_adapdata(struct i2c_adapter *dev, void *data) +{ + dev_set_drvdata(&dev->dev, data); +} + +static inline int i2c_parent_is_i2c_adapter(const struct i2c_adapter *adapter) +{ + return adapter->dev.parent != NULL + && adapter->dev.parent->bus == &i2c_bus_type + && adapter->dev.parent->type == &i2c_adapter_type; +} + +/* Adapter locking functions, exported for shared pin cases */ +void i2c_lock_adapter(struct i2c_adapter *); +void i2c_unlock_adapter(struct i2c_adapter *); + +/*flags for the client struct: */ +#define I2C_CLIENT_PEC 0x04 /* Use Packet Error Checking */ +#define I2C_CLIENT_TEN 0x10 /* we have a ten bit chip address */ + /* Must equal I2C_M_TEN below */ +#define I2C_CLIENT_WAKE 0x80 /* for board_info; true iff can wake */ + +/* i2c adapter classes (bitmask) */ +#define I2C_CLASS_HWMON (1<<0) /* lm_sensors, ... */ +#define I2C_CLASS_TV_ANALOG (1<<1) /* bttv + friends */ +#define I2C_CLASS_TV_DIGITAL (1<<2) /* dvb cards */ +#define I2C_CLASS_DDC (1<<3) /* DDC bus on graphics adapters */ +#define I2C_CLASS_SPD (1<<7) /* SPD EEPROMs and similar */ + +/* i2c_client_address_data is the struct for holding default client + * addresses for a driver and for the parameters supplied on the + * command line + */ +struct i2c_client_address_data { + const unsigned short *normal_i2c; + const unsigned short *probe; + const unsigned short *ignore; + const unsigned short * const *forces; +}; + +/* Internal numbers to terminate lists */ +#define I2C_CLIENT_END 0xfffeU + +/* The numbers to use to set I2C bus address */ +#define ANY_I2C_BUS 0xffff + +/* Construct an I2C_CLIENT_END-terminated array of i2c addresses */ +#define I2C_ADDRS(addr, addrs...) \ + ((const unsigned short []){ addr, ## addrs, I2C_CLIENT_END }) + +/* ----- functions exported by i2c.o */ + +/* administration... + */ +#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) +extern int i2c_add_adapter(struct i2c_adapter *); +extern int i2c_del_adapter(struct i2c_adapter *); +extern int i2c_add_numbered_adapter(struct i2c_adapter *); + +extern int i2c_register_driver(struct module *, struct i2c_driver *); +extern void i2c_del_driver(struct i2c_driver *); + +static inline int i2c_add_driver(struct i2c_driver *driver) +{ + return i2c_register_driver(THIS_MODULE, driver); +} + +extern struct i2c_client *i2c_use_client(struct i2c_client *client); +extern void i2c_release_client(struct i2c_client *client); + +/* call the i2c_client->command() of all attached clients with + * the given arguments */ +extern void i2c_clients_command(struct i2c_adapter *adap, + unsigned int cmd, void *arg); + +extern struct i2c_adapter *i2c_get_adapter(int id); +extern void i2c_put_adapter(struct i2c_adapter *adap); + +/* Return the functionality mask */ +static inline u32 i2c_get_functionality(struct i2c_adapter *adap) +{ + return adap->algo->functionality(adap); +} + +/* Return 1 if adapter supports everything we need, 0 if not. */ +static inline int i2c_check_functionality(struct i2c_adapter *adap, u32 func) +{ + return (func & i2c_get_functionality(adap)) == func; +} + +/* Return the adapter number for a specific adapter */ +static inline int i2c_adapter_id(struct i2c_adapter *adap) +{ + return adap->nr; +} +#endif /* I2C */ +#endif /* __KERNEL__ */ + +/** + * struct i2c_msg - an I2C transaction segment beginning with START + * @addr: Slave address, either seven or ten bits. When this is a ten + * bit address, I2C_M_TEN must be set in @flags and the adapter + * must support I2C_FUNC_10BIT_ADDR. + * @flags: I2C_M_RD is handled by all adapters. No other flags may be + * provided unless the adapter exported the relevant I2C_FUNC_* + * flags through i2c_check_functionality(). + * @len: Number of data bytes in @buf being read from or written to the + * I2C slave address. For read transactions where I2C_M_RECV_LEN + * is set, the caller guarantees that this buffer can hold up to + * 32 bytes in addition to the initial length byte sent by the + * slave (plus, if used, the SMBus PEC); and this value will be + * incremented by the number of block data bytes received. + * @buf: The buffer into which data is read, or from which it's written. + * + * An i2c_msg is the low level representation of one segment of an I2C + * transaction. It is visible to drivers in the @i2c_transfer() procedure, + * to userspace from i2c-dev, and to I2C adapter drivers through the + * @i2c_adapter.@master_xfer() method. + * + * Except when I2C "protocol mangling" is used, all I2C adapters implement + * the standard rules for I2C transactions. Each transaction begins with a + * START. That is followed by the slave address, and a bit encoding read + * versus write. Then follow all the data bytes, possibly including a byte + * with SMBus PEC. The transfer terminates with a NAK, or when all those + * bytes have been transferred and ACKed. If this is the last message in a + * group, it is followed by a STOP. Otherwise it is followed by the next + * @i2c_msg transaction segment, beginning with a (repeated) START. + * + * Alternatively, when the adapter supports I2C_FUNC_PROTOCOL_MANGLING then + * passing certain @flags may have changed those standard protocol behaviors. + * Those flags are only for use with broken/nonconforming slaves, and with + * adapters which are known to support the specific mangling options they + * need (one or more of IGNORE_NAK, NO_RD_ACK, NOSTART, and REV_DIR_ADDR). + */ +struct i2c_msg { + __u16 addr; /* slave address */ + __u16 flags; +#define I2C_M_TEN 0x0010 /* this is a ten bit chip address */ +#define I2C_M_RD 0x0001 /* read data, from slave to master */ +#define I2C_M_NOSTART 0x4000 /* if I2C_FUNC_PROTOCOL_MANGLING */ +#define I2C_M_REV_DIR_ADDR 0x2000 /* if I2C_FUNC_PROTOCOL_MANGLING */ +#define I2C_M_IGNORE_NAK 0x1000 /* if I2C_FUNC_PROTOCOL_MANGLING */ +#define I2C_M_NO_RD_ACK 0x0800 /* if I2C_FUNC_PROTOCOL_MANGLING */ +#define I2C_M_RECV_LEN 0x0400 /* length will be first received byte */ + __u16 len; /* msg length */ + __u8 *buf; /* pointer to msg data */ +}; + +/* To determine what functionality is present */ + +#define I2C_FUNC_I2C 0x00000001 +#define I2C_FUNC_10BIT_ADDR 0x00000002 +#define I2C_FUNC_PROTOCOL_MANGLING 0x00000004 /* I2C_M_NOSTART etc. */ +#define I2C_FUNC_SMBUS_PEC 0x00000008 +#define I2C_FUNC_SMBUS_BLOCK_PROC_CALL 0x00008000 /* SMBus 2.0 */ +#define I2C_FUNC_SMBUS_QUICK 0x00010000 +#define I2C_FUNC_SMBUS_READ_BYTE 0x00020000 +#define I2C_FUNC_SMBUS_WRITE_BYTE 0x00040000 +#define I2C_FUNC_SMBUS_READ_BYTE_DATA 0x00080000 +#define I2C_FUNC_SMBUS_WRITE_BYTE_DATA 0x00100000 +#define I2C_FUNC_SMBUS_READ_WORD_DATA 0x00200000 +#define I2C_FUNC_SMBUS_WRITE_WORD_DATA 0x00400000 +#define I2C_FUNC_SMBUS_PROC_CALL 0x00800000 +#define I2C_FUNC_SMBUS_READ_BLOCK_DATA 0x01000000 +#define I2C_FUNC_SMBUS_WRITE_BLOCK_DATA 0x02000000 +#define I2C_FUNC_SMBUS_READ_I2C_BLOCK 0x04000000 /* I2C-like block xfer */ +#define I2C_FUNC_SMBUS_WRITE_I2C_BLOCK 0x08000000 /* w/ 1-byte reg. addr. */ + +#define I2C_FUNC_SMBUS_BYTE (I2C_FUNC_SMBUS_READ_BYTE | \ + I2C_FUNC_SMBUS_WRITE_BYTE) +#define I2C_FUNC_SMBUS_BYTE_DATA (I2C_FUNC_SMBUS_READ_BYTE_DATA | \ + I2C_FUNC_SMBUS_WRITE_BYTE_DATA) +#define I2C_FUNC_SMBUS_WORD_DATA (I2C_FUNC_SMBUS_READ_WORD_DATA | \ + I2C_FUNC_SMBUS_WRITE_WORD_DATA) +#define I2C_FUNC_SMBUS_BLOCK_DATA (I2C_FUNC_SMBUS_READ_BLOCK_DATA | \ + I2C_FUNC_SMBUS_WRITE_BLOCK_DATA) +#define I2C_FUNC_SMBUS_I2C_BLOCK (I2C_FUNC_SMBUS_READ_I2C_BLOCK | \ + I2C_FUNC_SMBUS_WRITE_I2C_BLOCK) + +#define I2C_FUNC_SMBUS_EMUL (I2C_FUNC_SMBUS_QUICK | \ + I2C_FUNC_SMBUS_BYTE | \ + I2C_FUNC_SMBUS_BYTE_DATA | \ + I2C_FUNC_SMBUS_WORD_DATA | \ + I2C_FUNC_SMBUS_PROC_CALL | \ + I2C_FUNC_SMBUS_WRITE_BLOCK_DATA | \ + I2C_FUNC_SMBUS_I2C_BLOCK | \ + I2C_FUNC_SMBUS_PEC) + +/* + * Data for SMBus Messages + */ +#define I2C_SMBUS_BLOCK_MAX 32 /* As specified in SMBus standard */ +union i2c_smbus_data { + __u8 byte; + __u16 word; + __u8 block[I2C_SMBUS_BLOCK_MAX + 2]; /* block[0] is used for length */ + /* and one more for user-space compatibility */ +}; + +/* i2c_smbus_xfer read or write markers */ +#define I2C_SMBUS_READ 1 +#define I2C_SMBUS_WRITE 0 + +/* SMBus transaction types (size parameter in the above functions) + Note: these no longer correspond to the (arbitrary) PIIX4 internal codes! */ +#define I2C_SMBUS_QUICK 0 +#define I2C_SMBUS_BYTE 1 +#define I2C_SMBUS_BYTE_DATA 2 +#define I2C_SMBUS_WORD_DATA 3 +#define I2C_SMBUS_PROC_CALL 4 +#define I2C_SMBUS_BLOCK_DATA 5 +#define I2C_SMBUS_I2C_BLOCK_BROKEN 6 +#define I2C_SMBUS_BLOCK_PROC_CALL 7 /* SMBus 2.0 */ +#define I2C_SMBUS_I2C_BLOCK_DATA 8 + +#ifdef __KERNEL__ + +/* These defines are used for probing i2c client addresses */ +/* The length of the option lists */ +#define I2C_CLIENT_MAX_OPTS 48 + +/* Default fill of many variables */ +#define I2C_CLIENT_DEFAULTS {I2C_CLIENT_END, I2C_CLIENT_END, I2C_CLIENT_END, \ + I2C_CLIENT_END, I2C_CLIENT_END, I2C_CLIENT_END, \ + I2C_CLIENT_END, I2C_CLIENT_END, I2C_CLIENT_END, \ + I2C_CLIENT_END, I2C_CLIENT_END, I2C_CLIENT_END, \ + I2C_CLIENT_END, I2C_CLIENT_END, I2C_CLIENT_END, \ + I2C_CLIENT_END, I2C_CLIENT_END, I2C_CLIENT_END, \ + I2C_CLIENT_END, I2C_CLIENT_END, I2C_CLIENT_END, \ + I2C_CLIENT_END, I2C_CLIENT_END, I2C_CLIENT_END, \ + I2C_CLIENT_END, I2C_CLIENT_END, I2C_CLIENT_END, \ + I2C_CLIENT_END, I2C_CLIENT_END, I2C_CLIENT_END, \ + I2C_CLIENT_END, I2C_CLIENT_END, I2C_CLIENT_END, \ + I2C_CLIENT_END, I2C_CLIENT_END, I2C_CLIENT_END, \ + I2C_CLIENT_END, I2C_CLIENT_END, I2C_CLIENT_END, \ + I2C_CLIENT_END, I2C_CLIENT_END, I2C_CLIENT_END, \ + I2C_CLIENT_END, I2C_CLIENT_END, I2C_CLIENT_END, \ + I2C_CLIENT_END, I2C_CLIENT_END, I2C_CLIENT_END} + +/* I2C_CLIENT_MODULE_PARM creates a module parameter, and puts it in the + module header */ + +#define I2C_CLIENT_MODULE_PARM(var,desc) \ + static unsigned short var[I2C_CLIENT_MAX_OPTS] = I2C_CLIENT_DEFAULTS; \ + static unsigned int var##_num; \ + module_param_array(var, short, &var##_num, 0); \ + MODULE_PARM_DESC(var, desc) + +#define I2C_CLIENT_MODULE_PARM_FORCE(name) \ +I2C_CLIENT_MODULE_PARM(force_##name, \ + "List of adapter,address pairs which are " \ + "unquestionably assumed to contain a `" \ + # name "' chip") + +#define I2C_CLIENT_INSMOD_COMMON \ +I2C_CLIENT_MODULE_PARM(probe, "List of adapter,address pairs to scan " \ + "additionally"); \ +I2C_CLIENT_MODULE_PARM(ignore, "List of adapter,address pairs not to " \ + "scan"); \ +static const struct i2c_client_address_data addr_data = { \ + .normal_i2c = normal_i2c, \ + .probe = probe, \ + .ignore = ignore, \ + .forces = forces, \ +} + +#define I2C_CLIENT_FORCE_TEXT \ + "List of adapter,address pairs to boldly assume to be present" + +/* These are the ones you want to use in your own drivers. Pick the one + which matches the number of devices the driver differenciates between. */ +#define I2C_CLIENT_INSMOD \ +I2C_CLIENT_MODULE_PARM(force, I2C_CLIENT_FORCE_TEXT); \ +static const unsigned short * const forces[] = { force, NULL }; \ +I2C_CLIENT_INSMOD_COMMON + +#define I2C_CLIENT_INSMOD_1(chip1) \ +enum chips { any_chip, chip1 }; \ +I2C_CLIENT_MODULE_PARM(force, I2C_CLIENT_FORCE_TEXT); \ +I2C_CLIENT_MODULE_PARM_FORCE(chip1); \ +static const unsigned short * const forces[] = { force, \ + force_##chip1, NULL }; \ +I2C_CLIENT_INSMOD_COMMON + +#define I2C_CLIENT_INSMOD_2(chip1, chip2) \ +enum chips { any_chip, chip1, chip2 }; \ +I2C_CLIENT_MODULE_PARM(force, I2C_CLIENT_FORCE_TEXT); \ +I2C_CLIENT_MODULE_PARM_FORCE(chip1); \ +I2C_CLIENT_MODULE_PARM_FORCE(chip2); \ +static const unsigned short * const forces[] = { force, \ + force_##chip1, force_##chip2, NULL }; \ +I2C_CLIENT_INSMOD_COMMON + +#define I2C_CLIENT_INSMOD_3(chip1, chip2, chip3) \ +enum chips { any_chip, chip1, chip2, chip3 }; \ +I2C_CLIENT_MODULE_PARM(force, I2C_CLIENT_FORCE_TEXT); \ +I2C_CLIENT_MODULE_PARM_FORCE(chip1); \ +I2C_CLIENT_MODULE_PARM_FORCE(chip2); \ +I2C_CLIENT_MODULE_PARM_FORCE(chip3); \ +static const unsigned short * const forces[] = { force, \ + force_##chip1, force_##chip2, force_##chip3, NULL }; \ +I2C_CLIENT_INSMOD_COMMON + +#define I2C_CLIENT_INSMOD_4(chip1, chip2, chip3, chip4) \ +enum chips { any_chip, chip1, chip2, chip3, chip4 }; \ +I2C_CLIENT_MODULE_PARM(force, I2C_CLIENT_FORCE_TEXT); \ +I2C_CLIENT_MODULE_PARM_FORCE(chip1); \ +I2C_CLIENT_MODULE_PARM_FORCE(chip2); \ +I2C_CLIENT_MODULE_PARM_FORCE(chip3); \ +I2C_CLIENT_MODULE_PARM_FORCE(chip4); \ +static const unsigned short * const forces[] = { force, \ + force_##chip1, force_##chip2, force_##chip3, \ + force_##chip4, NULL}; \ +I2C_CLIENT_INSMOD_COMMON + +#define I2C_CLIENT_INSMOD_5(chip1, chip2, chip3, chip4, chip5) \ +enum chips { any_chip, chip1, chip2, chip3, chip4, chip5 }; \ +I2C_CLIENT_MODULE_PARM(force, I2C_CLIENT_FORCE_TEXT); \ +I2C_CLIENT_MODULE_PARM_FORCE(chip1); \ +I2C_CLIENT_MODULE_PARM_FORCE(chip2); \ +I2C_CLIENT_MODULE_PARM_FORCE(chip3); \ +I2C_CLIENT_MODULE_PARM_FORCE(chip4); \ +I2C_CLIENT_MODULE_PARM_FORCE(chip5); \ +static const unsigned short * const forces[] = { force, \ + force_##chip1, force_##chip2, force_##chip3, \ + force_##chip4, force_##chip5, NULL }; \ +I2C_CLIENT_INSMOD_COMMON + +#define I2C_CLIENT_INSMOD_6(chip1, chip2, chip3, chip4, chip5, chip6) \ +enum chips { any_chip, chip1, chip2, chip3, chip4, chip5, chip6 }; \ +I2C_CLIENT_MODULE_PARM(force, I2C_CLIENT_FORCE_TEXT); \ +I2C_CLIENT_MODULE_PARM_FORCE(chip1); \ +I2C_CLIENT_MODULE_PARM_FORCE(chip2); \ +I2C_CLIENT_MODULE_PARM_FORCE(chip3); \ +I2C_CLIENT_MODULE_PARM_FORCE(chip4); \ +I2C_CLIENT_MODULE_PARM_FORCE(chip5); \ +I2C_CLIENT_MODULE_PARM_FORCE(chip6); \ +static const unsigned short * const forces[] = { force, \ + force_##chip1, force_##chip2, force_##chip3, \ + force_##chip4, force_##chip5, force_##chip6, NULL }; \ +I2C_CLIENT_INSMOD_COMMON + +#define I2C_CLIENT_INSMOD_7(chip1, chip2, chip3, chip4, chip5, chip6, chip7) \ +enum chips { any_chip, chip1, chip2, chip3, chip4, chip5, chip6, \ + chip7 }; \ +I2C_CLIENT_MODULE_PARM(force, I2C_CLIENT_FORCE_TEXT); \ +I2C_CLIENT_MODULE_PARM_FORCE(chip1); \ +I2C_CLIENT_MODULE_PARM_FORCE(chip2); \ +I2C_CLIENT_MODULE_PARM_FORCE(chip3); \ +I2C_CLIENT_MODULE_PARM_FORCE(chip4); \ +I2C_CLIENT_MODULE_PARM_FORCE(chip5); \ +I2C_CLIENT_MODULE_PARM_FORCE(chip6); \ +I2C_CLIENT_MODULE_PARM_FORCE(chip7); \ +static const unsigned short * const forces[] = { force, \ + force_##chip1, force_##chip2, force_##chip3, \ + force_##chip4, force_##chip5, force_##chip6, \ + force_##chip7, NULL }; \ +I2C_CLIENT_INSMOD_COMMON + +#define I2C_CLIENT_INSMOD_8(chip1, chip2, chip3, chip4, chip5, chip6, chip7, chip8) \ +enum chips { any_chip, chip1, chip2, chip3, chip4, chip5, chip6, \ + chip7, chip8 }; \ +I2C_CLIENT_MODULE_PARM(force, I2C_CLIENT_FORCE_TEXT); \ +I2C_CLIENT_MODULE_PARM_FORCE(chip1); \ +I2C_CLIENT_MODULE_PARM_FORCE(chip2); \ +I2C_CLIENT_MODULE_PARM_FORCE(chip3); \ +I2C_CLIENT_MODULE_PARM_FORCE(chip4); \ +I2C_CLIENT_MODULE_PARM_FORCE(chip5); \ +I2C_CLIENT_MODULE_PARM_FORCE(chip6); \ +I2C_CLIENT_MODULE_PARM_FORCE(chip7); \ +I2C_CLIENT_MODULE_PARM_FORCE(chip8); \ +static const unsigned short * const forces[] = { force, \ + force_##chip1, force_##chip2, force_##chip3, \ + force_##chip4, force_##chip5, force_##chip6, \ + force_##chip7, force_##chip8, NULL }; \ +I2C_CLIENT_INSMOD_COMMON +#endif /* __KERNEL__ */ +#endif /* _LINUX_I2C_H */ diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/hw_test/hw_test_app/include/hw_i2c/rtc.h b/platform/broadcom/sonic-platform-modules-micas/common/app/hw_test/hw_test_app/include/hw_i2c/rtc.h new file mode 100644 index 00000000000..1c2d08d6907 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/app/hw_test/hw_test_app/include/hw_i2c/rtc.h @@ -0,0 +1,100 @@ +/* + * Generic RTC interface. + * This version contains the part of the user interface to the Real Time Clock + * service. It is used with both the legacy mc146818 and also EFI + * Struct rtc_time and first 12 ioctl by Paul Gortmaker, 1996 - separated out + * from to this file for 2.4 kernels. + * + * Copyright (C) 1999 Hewlett-Packard Co. + * Copyright (C) 1999 Stephane Eranian + */ +#ifndef _LINUX_RTC_H_ +#define _LINUX_RTC_H_ + +/* + * The struct used to pass data via the following ioctl. Similar to the + * struct tm in , but it needs to be here so that the kernel + * source is self contained, allowing cross-compiles, etc. etc. + */ + +struct rtc_time { + int tm_sec; + int tm_min; + int tm_hour; + int tm_mday; + int tm_mon; + int tm_year; + int tm_wday; + int tm_yday; + int tm_isdst; +}; + +/* + * This data structure is inspired by the EFI (v0.92) wakeup + * alarm API. + */ +struct rtc_wkalrm { + unsigned char enabled; /* 0 = alarm disabled, 1 = alarm enabled */ + unsigned char pending; /* 0 = alarm not pending, 1 = alarm pending */ + struct rtc_time time; /* time the alarm is set to */ +}; + +/* + * Data structure to control PLL correction some better RTC feature + * pll_value is used to get or set current value of correction, + * the rest of the struct is used to query HW capabilities. + * This is modeled after the RTC used in Q40/Q60 computers but + * should be sufficiently flexible for other devices + * + * +ve pll_value means clock will run faster by + * pll_value*pll_posmult/pll_clock + * -ve pll_value means clock will run slower by + * pll_value*pll_negmult/pll_clock + */ + +struct rtc_pll_info { + int pll_ctrl; /* placeholder for fancier control */ + int pll_value; /* get/set correction value */ + int pll_max; /* max +ve (faster) adjustment value */ + int pll_min; /* max -ve (slower) adjustment value */ + int pll_posmult; /* factor for +ve correction */ + int pll_negmult; /* factor for -ve correction */ + long pll_clock; /* base PLL frequency */ +}; + +/* + * ioctl calls that are permitted to the /dev/rtc interface, if + * any of the RTC drivers are enabled. + */ + +#define RTC_AIE_ON _IO('p', 0x01) /* Alarm int. enable on */ +#define RTC_AIE_OFF _IO('p', 0x02) /* ... off */ +#define RTC_UIE_ON _IO('p', 0x03) /* Update int. enable on */ +#define RTC_UIE_OFF _IO('p', 0x04) /* ... off */ +#define RTC_PIE_ON _IO('p', 0x05) /* Periodic int. enable on */ +#define RTC_PIE_OFF _IO('p', 0x06) /* ... off */ +#define RTC_WIE_ON _IO('p', 0x0f) /* Watchdog int. enable on */ +#define RTC_WIE_OFF _IO('p', 0x10) /* ... off */ + +#define RTC_ALM_SET _IOW('p', 0x07, struct rtc_time) /* Set alarm time */ +#define RTC_ALM_READ _IOR('p', 0x08, struct rtc_time) /* Read alarm time */ +#define RTC_RD_TIME _IOR('p', 0x09, struct rtc_time) /* Read RTC time */ +#define RTC_SET_TIME _IOW('p', 0x0a, struct rtc_time) /* Set RTC time */ +#define RTC_IRQP_READ _IOR('p', 0x0b, unsigned long) /* Read IRQ rate */ +#define RTC_IRQP_SET _IOW('p', 0x0c, unsigned long) /* Set IRQ rate */ +#define RTC_EPOCH_READ _IOR('p', 0x0d, unsigned long) /* Read epoch */ +#define RTC_EPOCH_SET _IOW('p', 0x0e, unsigned long) /* Set epoch */ + +#define RTC_WKALM_SET _IOW('p', 0x0f, struct rtc_wkalrm)/* Set wakeup alarm*/ +#define RTC_WKALM_RD _IOR('p', 0x10, struct rtc_wkalrm)/* Get wakeup alarm*/ + +#define RTC_PLL_GET _IOR('p', 0x11, struct rtc_pll_info) /* Get PLL correction */ +#define RTC_PLL_SET _IOW('p', 0x12, struct rtc_pll_info) /* Set PLL correction */ + +/* interrupt flags */ +#define RTC_IRQF 0x80 /* any of the following is active */ +#define RTC_PF 0x40 +#define RTC_AF 0x20 +#define RTC_UF 0x10 + +#endif /* _LINUX_RTC_H_ */ diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/hw_test/hw_test_app/include/hw_misc/dram_driver.h b/platform/broadcom/sonic-platform-modules-micas/common/app/hw_test/hw_test_app/include/hw_misc/dram_driver.h new file mode 100644 index 00000000000..eaa34bfa5c9 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/app/hw_test/hw_test_app/include/hw_misc/dram_driver.h @@ -0,0 +1,28 @@ +#ifndef _LINUX_DRAM_DRIVER_H +#define _LINUX_DRAM_DRIVER_H + +#include +typedef unsigned int u32; + +struct phydev_user_info { + int phy_index; /* Indicates which phydev to operate on */ + u32 regnum; /* Register address */ + u32 regval; /* Register value */ +}; + +#define CMD_PHY_LIST _IOR('P', 0, struct phydev_user_info) +#define CMD_PHY_READ _IOR('P', 1, struct phydev_user_info) +#define CMD_PHY_WRITE _IOR('P', 2, struct phydev_user_info) + +struct mdio_dev_user_info { + int mdio_index; /* Indicates which mdio dev to operate on */ + int phyaddr; /* phy device address */ + u32 regnum; /* Register address */ + u32 regval; /* Register value */ +}; + +#define CMD_MDIO_LIST _IOR('M', 0, struct mdio_dev_user_info) +#define CMD_MDIO_READ _IOR('M', 1, struct mdio_dev_user_info) +#define CMD_MDIO_WRITE _IOR('M', 2, struct mdio_dev_user_info) + +#endif diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/hw_test/hw_test_app/include/hw_misc/hw_misc.h b/platform/broadcom/sonic-platform-modules-micas/common/app/hw_test/hw_test_app/include/hw_misc/hw_misc.h new file mode 100644 index 00000000000..ebbe9120694 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/app/hw_test/hw_test_app/include/hw_misc/hw_misc.h @@ -0,0 +1,26 @@ +#ifndef _HW_MISC_H +#define _HW_MISC_H + +typedef unsigned long long u64; +#define MAX_DATA_SIZE 16 + +extern int reload_main(int argc, char **argv); +extern int sys_info_main(int argc, char **argv); +extern int mem_dump_main(int argc, char **argv); +extern int cache_flush_main(int argc, char **argv); +extern int reg_wr64_main(int argc, char **argv); +extern int reg_rd64_main(int argc, char **argv); +extern int reg_wr32_main(int argc, char **argv); +extern int reg_rd32_main(int argc, char **argv); +extern int reg_wr16_main(int argc, char **argv); +extern int reg_rd16_main(int argc, char **argv); +extern int reg_wr8_main(int argc, char **argv); +extern int reg_rd8_main(int argc, char **argv); +extern int phydev_list_main(int argc, char **argv); +extern int phydev_rd_main(int argc, char **argv); +extern int phydev_wr_main(int argc, char **argv); +extern int mdiodev_list_main(int argc, char **argv); +extern int mdiodev_rd_main(int argc, char **argv); +extern int mdiodev_wr_main(int argc, char **argv); + +#endif /* _HW_MISC_H */ diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/hw_test/hw_test_app/include/hw_mtd/hw_mtdflash.h b/platform/broadcom/sonic-platform-modules-micas/common/app/hw_test/hw_test_app/include/hw_mtd/hw_mtdflash.h new file mode 100644 index 00000000000..2d5f7414ccf --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/app/hw_test/hw_test_app/include/hw_mtd/hw_mtdflash.h @@ -0,0 +1,25 @@ +#ifndef _HW_NANDFLASH_H +#define _HW_NANDFLASH_H + +struct mtd_dev_priv { + unsigned int start_addr; + unsigned int end_addr; + unsigned char data1; + unsigned char data2; + int times; + unsigned int check_test_errors; + unsigned char *buffer; +}; + +#define MAX_BUFFER_SIZE 128 +#define NAND_TEST_PARTITION "factory_test1" +#define NOR_TEST_PARTITION "factory_test0" + +extern int nand_wr_main(int argc, char **argv); +extern int nand_rd_main(int argc, char **argv); +extern int nand_chk_main(int argc, char **argv); +extern int nor_wr_main(int argc, char **argv); +extern int nor_rd_main(int argc, char **argv); +extern int nor_chk_main(int argc, char **argv); + +#endif /* _HW_NANDFLASH_H */ diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/hw_test/hw_test_app/include/hw_mtd/mtd-abi.h b/platform/broadcom/sonic-platform-modules-micas/common/app/hw_test/hw_test_app/include/hw_mtd/mtd-abi.h new file mode 100644 index 00000000000..afd0022396f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/app/hw_test/hw_test_app/include/hw_mtd/mtd-abi.h @@ -0,0 +1,199 @@ +/* + * Portions of MTD ABI definition which are shared by kernel and user space + */ + +#ifndef __MTD_ABI_H__ +#define __MTD_ABI_H__ + +#include + +struct erase_info_user { + __u32 start; + __u32 length; +}; + +struct erase_info_user64 { + __u64 start; + __u64 length; +}; + +struct mtd_oob_buf { + __u32 start; + __u32 length; + unsigned char *ptr; +}; + +struct mtd_oob_buf64 { + __u64 start; + __u32 pad; + __u32 length; + __u64 usr_ptr; +}; + +/** + * struct mtd_write_req - data structure for requesting a write operation + * + * @start: start address + * @len: length of data buffer + * @ooblen: length of OOB buffer + * @usr_data: user-provided data buffer + * @usr_oob: user-provided OOB buffer + * @mode: MTD mode (see "MTD operation modes") + * @padding: reserved, must be set to 0 + * + * This structure supports ioctl(MEMWRITE) operations, allowing data and/or OOB + * writes in various modes. To write to OOB-only, set @usr_data == NULL, and to + * write data-only, set @usr_oob == NULL. However, setting both @usr_data and + * @usr_oob to NULL is not allowed. + */ +struct mtd_write_req { + __u64 start; + __u64 len; + __u64 ooblen; + __u64 usr_data; + __u64 usr_oob; + __u8 mode; + __u8 padding[7]; +}; + +#define MTD_ABSENT 0 +#define MTD_RAM 1 +#define MTD_ROM 2 +#define MTD_NORFLASH 3 +#define MTD_NANDFLASH 4 +#define MTD_DATAFLASH 6 +#define MTD_UBIVOLUME 7 + +#define MTD_WRITEABLE 0x400 /* Device is writeable */ +#define MTD_BIT_WRITEABLE 0x800 /* Single bits can be flipped */ +#define MTD_NO_ERASE 0x1000 /* No erase necessary */ +#define MTD_POWERUP_LOCK 0x2000 /* Always locked after reset */ + +// Some common devices / combinations of capabilities +#define MTD_CAP_ROM 0 +#define MTD_CAP_RAM (MTD_WRITEABLE | MTD_BIT_WRITEABLE | MTD_NO_ERASE) +#define MTD_CAP_NORFLASH (MTD_WRITEABLE | MTD_BIT_WRITEABLE) +#define MTD_CAP_NANDFLASH (MTD_WRITEABLE) + +/* ECC byte placement */ +#define MTD_NANDECC_OFF 0 // Switch off ECC (Not recommended) +#define MTD_NANDECC_PLACE 1 // Use the given placement in the structure (YAFFS1 legacy mode) +#define MTD_NANDECC_AUTOPLACE 2 // Use the default placement scheme +#define MTD_NANDECC_PLACEONLY 3 // Use the given placement in the structure (Do not store ecc result on read) +#define MTD_NANDECC_AUTOPL_USR 4 // Use the given autoplacement scheme rather than using the default + +/* OTP mode selection */ +#define MTD_OTP_OFF 0 +#define MTD_OTP_FACTORY 1 +#define MTD_OTP_USER 2 + +struct mtd_info_user { + __u8 type; + __u32 flags; + __u32 size; // Total size of the MTD + __u32 erasesize; + __u32 writesize; + __u32 oobsize; // Amount of OOB data per block (e.g. 16) + /* The below two fields are obsolete and broken, do not use them + * (TODO: remove at some point) */ + __u32 ecctype; + __u32 eccsize; +}; + +struct region_info_user { + __u32 offset; /* At which this region starts, + * from the beginning of the MTD */ + __u32 erasesize; /* For this region */ + __u32 numblocks; /* Number of blocks in this region */ + __u32 regionindex; +}; + +struct otp_info { + __u32 start; + __u32 length; + __u32 locked; +}; + +#define MEMGETINFO _IOR('M', 1, struct mtd_info_user) +#define MEMERASE _IOW('M', 2, struct erase_info_user) +#define MEMWRITEOOB _IOWR('M', 3, struct mtd_oob_buf) +#define MEMREADOOB _IOWR('M', 4, struct mtd_oob_buf) +#define MEMLOCK _IOW('M', 5, struct erase_info_user) +#define MEMUNLOCK _IOW('M', 6, struct erase_info_user) +#define MEMGETREGIONCOUNT _IOR('M', 7, int) +#define MEMGETREGIONINFO _IOWR('M', 8, struct region_info_user) +#define MEMSETOOBSEL _IOW('M', 9, struct nand_oobinfo) +#define MEMGETOOBSEL _IOR('M', 10, struct nand_oobinfo) +#define MEMGETBADBLOCK _IOW('M', 11, __kernel_loff_t) +#define MEMSETBADBLOCK _IOW('M', 12, __kernel_loff_t) +#define OTPSELECT _IOR('M', 13, int) +#define OTPGETREGIONCOUNT _IOW('M', 14, int) +#define OTPGETREGIONINFO _IOW('M', 15, struct otp_info) +#define OTPLOCK _IOR('M', 16, struct otp_info) +#define ECCGETLAYOUT _IOR('M', 17, struct nand_ecclayout) +#define ECCGETSTATS _IOR('M', 18, struct mtd_ecc_stats) +#define MTDFILEMODE _IO('M', 19) +#define MEMERASE64 _IOW('M', 20, struct erase_info_user64) +#define MEMWRITEOOB64 _IOWR('M', 21, struct mtd_oob_buf64) +#define MEMREADOOB64 _IOWR('M', 22, struct mtd_oob_buf64) +/* Check if chip is locked (for MTD that supports it) */ +#define MEMISLOCKED _IOR('M', 23, struct erase_info_user) +/* + * Most generic write interface; can write in-band and/or out-of-band in various + * modes (see "struct mtd_write_req") + */ +#define MEMWRITE _IOWR('M', 24, struct mtd_write_req) +/* + * Obsolete legacy interface. Keep it in order not to break userspace + * interfaces + */ +struct nand_oobinfo { + __u32 useecc; + __u32 eccbytes; + __u32 oobfree[8][2]; + __u32 eccpos[32]; +}; + +struct nand_oobfree { + __u32 offset; + __u32 length; +}; + +#define MTD_MAX_OOBFREE_ENTRIES 8 +/* + * ECC layout control structure. Exported to userspace for + * diagnosis and to allow creation of raw images + */ +struct nand_ecclayout { + __u32 eccbytes; + __u32 eccpos[64]; + __u32 oobavail; + struct nand_oobfree oobfree[MTD_MAX_OOBFREE_ENTRIES]; +}; + +/** + * struct mtd_ecc_stats - error correction stats + * + * @corrected: number of corrected bits + * @failed: number of uncorrectable errors + * @badblocks: number of bad blocks in this partition + * @bbtblocks: number of blocks reserved for bad block tables + */ +struct mtd_ecc_stats { + __u32 corrected; + __u32 failed; + __u32 badblocks; + __u32 bbtblocks; +}; + +/* + * Read/write file modes for access to MTD + */ +enum mtd_file_modes { + MTD_MODE_NORMAL = MTD_OTP_OFF, + MTD_MODE_OTP_FACTORY = MTD_OTP_FACTORY, + MTD_MODE_OTP_USER = MTD_OTP_USER, + MTD_MODE_RAW, +}; + +#endif /* __MTD_ABI_H__ */ diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/hw_test/hw_test_app/include/hw_pci/hw_pci.h b/platform/broadcom/sonic-platform-modules-micas/common/app/hw_test/hw_test_app/include/hw_pci/hw_pci.h new file mode 100644 index 00000000000..27a2ff15b6d --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/app/hw_test/hw_test_app/include/hw_pci/hw_pci.h @@ -0,0 +1,24 @@ +#ifndef _HW_PCI_H +#define _HW_PCI_H + +struct pci_dev_priv { + int pcibus; + int slot; + int fn; + int bar; + int offset; + unsigned int data; + int times; + unsigned int check_test_errors; +}; + +#define PCI_MAX_NAME_SIZE 256 + +extern int pci_wr_main(int argc, char **argv); +extern int pci_rd_main(int argc, char **argv); +extern int pci_dump_main(int argc, char **argv); +extern int pci_cfg_wr_main(int argc, char **argv); +extern int pci_cfg_rd_main(int argc, char **argv); +extern int pci_chk_main(int argc, char **argv); + +#endif /* _HW_PCI_H */ diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/hw_test/hw_test_app/include/hw_test.h b/platform/broadcom/sonic-platform-modules-micas/common/app/hw_test/hw_test_app/include/hw_test.h new file mode 100644 index 00000000000..97378e76636 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/app/hw_test/hw_test_app/include/hw_test.h @@ -0,0 +1,14 @@ +#ifndef _HW_TEST_H +#define _HW_TEST_H + +struct hw_applet { + const char *name; + const char *help; + int (*main) (int argc, char **argv); +}; + +#define HWTEST_APPLET(a, b) {#a, b, a##_main} + +extern int hw_help_main(int argc, char **argv); + +#endif /* _HW_TEST_H */ diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/hw_test/hw_test_app/include/hw_usb/hw_usb.h b/platform/broadcom/sonic-platform-modules-micas/common/app/hw_test/hw_test_app/include/hw_usb/hw_usb.h new file mode 100644 index 00000000000..8666fca923c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/app/hw_test/hw_test_app/include/hw_usb/hw_usb.h @@ -0,0 +1,8 @@ +#ifndef _HW_USB_H +#define _HW_USB_H + +extern int usb_write_main(int argc, char **argv); +extern int usb_read_main(int argc, char **argv); +extern int usb_check_main(int argc, char **argv); + +#endif /* _HW_USB_H */ diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/hw_test/hw_test_driver/Makefile b/platform/broadcom/sonic-platform-modules-micas/common/app/hw_test/hw_test_driver/Makefile new file mode 100644 index 00000000000..975987f87fa --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/app/hw_test/hw_test_driver/Makefile @@ -0,0 +1,17 @@ +PWD = $(shell pwd) +EXTRA_CFLAGS:= -I$(M)/include +EXTRA_CFLAGS+= -Wall +KVERSION ?= $(shell uname -r) +KERNEL_SRC ?= /lib/modules/$(KVERSION) + +obj-m += hw_test.o + +all : + $(MAKE) -C $(KERNEL_SRC)/build M=$(PWD) modules + @if [ ! -d $(common_module_dir) ]; then mkdir -p $(common_module_dir) ;fi + cp -p $(PWD)/*.ko $(common_module_dir) + +clean : + rm -f ${PWD}/*.o ${PWD}/*.ko ${PWD}/*.mod.c ${PWD}/.*.cmd ${PWD}/.*.o.d + rm -f ${PWD}/Module.markers ${PWD}/Module.symvers ${PWD}/modules.order + rm -rf ${PWD}/.tmp_versions \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/hw_test/hw_test_driver/hw_test.c b/platform/broadcom/sonic-platform-modules-micas/common/app/hw_test/hw_test_driver/hw_test.c new file mode 100644 index 00000000000..35e7bde7430 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/app/hw_test/hw_test_driver/hw_test.c @@ -0,0 +1,728 @@ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "hw_test.h" + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(6,9,0) +extern const struct bus_type mdio_bus_type; +typedef const struct class *mdio_bus_class_t; +#define mdio_class_find_device(_class, _start, _data, _match) \ + class_find_device((struct class *)(_class), (_start), (_data), (_match)) +#else +extern struct bus_type mdio_bus_type; +typedef struct class *mdio_bus_class_t; +#define mdio_class_find_device(_class, _start, _data, _match) \ + class_find_device((_class), (_start), (_data), (_match)) +#endif + +#ifndef MII_ADDR_C45 +#define MII_ADDR_C45 (1U << 30) +#endif + +struct board_mdio_dev { + struct list_head list; + struct mii_bus *mdio_bus; + int mdio_index; +}; + +struct board_phy_dev { + struct list_head list; + struct phy_device *phydev; + int phy_index; +}; + +static LIST_HEAD(mdio_dev_list); /* All mdio devices are managed through a linked list */ +static LIST_HEAD(phydev_list); /* All phy devices are managed through a linked list */ +static mdio_bus_class_t class_mdio_bus = NULL; /* The address used to temporarily store the mdio_bus_class global in the kernel */ +static dev_t dram_devno; +static struct cdev dram_cdev; +static struct class *dram_class; +static struct device *dram_device; + +#define PRINT_BUF_SIZE (256) +#define INVALID_PHY_ADDR (0xFF) +#define MAX_MDIO_DEVICE_NUMS (1000) +#define MAX_PHY_DEVICE_NUMS (1000) +#define DRAM_DEV_NAME "dram_test" +#define DRAM_CLASS_NAME "hw_test" + +#define dram_debug(fmt, ...) \ + printk(KERN_NOTICE pr_fmt(fmt), ##__VA_ARGS__) + +static ssize_t dram_dev_read (struct file *file, char __user *buf, size_t count, + loff_t *offset) +{ + u8 value8; + u16 value16; + u32 value32; + u64 value64; + + if (file->private_data != NULL) { + return -EINVAL; + } + + file->private_data = ioremap(file->f_pos, count); + + if (!file->private_data) { + pr_notice("%s, %d\r\n", __FUNCTION__, __LINE__); + return -ENODEV; + } + + rmb(); + switch (count) { + case 1: + value8 = readb(file->private_data); + if (copy_to_user(buf, &value8, sizeof(u8))) { + return -EFAULT; + } + break; + case 2: + value16 = readw(file->private_data); + if (copy_to_user(buf, &value16, sizeof(u16))) { + return -EFAULT; + } + break; + case 4: + value32 = readl(file->private_data); + if (copy_to_user(buf, &value32, sizeof(u32))) { + return -EFAULT; + } + break; + case 8: +#ifdef CONFIG_64BIT + value64 = readq(file->private_data); + if (copy_to_user(buf, &value64, sizeof(u64))) { + return -EFAULT; + } +#else + return -EOPNOTSUPP; +#endif + break; + default: + return -EINVAL; + } + + iounmap(file->private_data); + file->private_data = NULL; + return count; + +} + +static ssize_t dram_dev_write (struct file *file, const char __user *buf, size_t count, + loff_t *offset) +{ + u8 value8; + u16 value16; + u32 value32; + u64 value64; + + if (file->private_data != NULL) { + return -EINVAL; + } + + file->private_data = ioremap(file->f_pos, count); + + if (!file->private_data) { + pr_err("%s, %d\r\n", __FUNCTION__, __LINE__); + return -ENODEV; + } + + switch (count) { + case 1: + if (copy_from_user(&value8, buf, sizeof(u8))) { + return -EFAULT; + } + writeb(value8, file->private_data); + break; + case 2: + if (copy_from_user(&value16, buf, sizeof(u16))) { + return -EFAULT; + } + writew(value16, file->private_data); + break; + case 4: + if (copy_from_user(&value32, buf, sizeof(u32))) { + return -EFAULT; + } + writel(value32, file->private_data); + break; + case 8: +#ifdef CONFIG_64BIT + if (copy_from_user(&value64, buf, sizeof(u64))) { + return -EFAULT; + } + writeq(value64, file->private_data); +#else + return -EOPNOTSUPP; +#endif + break; + default: + return -EINVAL; + } + + wmb(); + iounmap(file->private_data); + file->private_data = NULL; + return count; +} + +static loff_t dram_dev_llseek(struct file *file, loff_t offset, int origin) +{ + loff_t ret; + + switch (origin) { + case 0: + file->f_pos = offset; + ret = file->f_pos; + break; + case 1: + file->f_pos += offset; + ret = file->f_pos; + break; + default: + ret = -EINVAL; + } + return ret; +} + +static int temp_mdiobus_read(struct mii_bus *bus, int phy_addr, int regnum) +{ + return 0; +} + +static int temp_mdiobus_write(struct mii_bus *bus, int phy_addr, int regnum, u16 value) +{ + return 0; +} + +static int init_class_mdio_bus(void) +{ + struct mii_bus *bus; + int err = 0; + + bus = mdiobus_alloc(); + + bus->name = "temp_mdio_bus"; + snprintf(bus->id, MII_BUS_ID_SIZE, "temp_mdio_bus0"); + bus->read = temp_mdiobus_read; + bus->write = temp_mdiobus_write; + + err = mdiobus_register(bus); + if (err) { + printk(KERN_ERR "temp mdio bus register fail\n"); + return -1; + } + + class_mdio_bus = bus->dev.class; + mdiobus_unregister(bus); + + return 0; +} + +static int mdio_match_success(struct device *dev, const void * data) +{ + /* Returns a non-0 number, which guarantees that the match succeeds.*/ + return 1; +} + +/* Traverse the bus class, find all the mdio devs, and attach the found mdio devs to the linked list for management.*/ +static int add_all_mdio_devices_to_list(void) +{ + struct device *dev, *dev_start = NULL; + struct board_mdio_dev *mdio_dev = NULL; + int i = 0; + mdio_bus_class_t bus_class = class_mdio_bus; + + for (i = 0; i < MAX_MDIO_DEVICE_NUMS; i++) { + dev = mdio_class_find_device(bus_class, dev_start, NULL, mdio_match_success); + if (dev != NULL) { + mdio_dev = kzalloc(sizeof(struct board_mdio_dev), GFP_KERNEL); + if (mdio_dev == NULL) { + printk(KERN_ERR "%s: alloc fail\n", __func__); + return -EFAULT; + } + + mdio_dev->mdio_index = i; + mdio_dev->mdio_bus = to_mii_bus(dev); + list_add_tail(&mdio_dev->list, &mdio_dev_list); + + dev_start = dev; + } else { + break; + } + } + + printk(KERN_INFO "mdio dev numbers = %d\n", i); + + return 0; +} + +/* Remove the attached mdio dev from the linked list.*/ +static void delete_all_mdio_devices_from_list(void) +{ + struct list_head *n, *pos; + struct board_mdio_dev *mdio_dev; + + list_for_each_safe(pos, n, &mdio_dev_list) { + list_del(pos); + mdio_dev = list_entry(pos, struct board_mdio_dev, list); + kfree(mdio_dev); + } + + return; +} + +/* Lists information about all mdio devices */ +static void list_all_mdio_devices_info(void) +{ + struct board_mdio_dev *mdio_dev; + unsigned char phyaddr[PHY_MAX_ADDR]; + int i = 0, j = 0; + int phydev_num = 0; + char buf[PRINT_BUF_SIZE]; + int len = 0; + + printk(KERN_INFO "all the mdio devs info:\n"); + printk(KERN_INFO "index busid name phy_num phyaddr \n"); + list_for_each_entry(mdio_dev, &mdio_dev_list, list) { + i = 0; + j = 0; + phydev_num = 0; + memset(phyaddr, INVALID_PHY_ADDR, sizeof(phyaddr)); + memset(buf, 0, sizeof(buf)); + + for (i = 0; i < PHY_MAX_ADDR; i++) { + if (mdio_dev->mdio_bus->mdio_map[i]) { + phydev_num++; + phyaddr[j] = (unsigned char)i; + j++; + } + } + + len = snprintf(buf, sizeof(buf), " %-10d %-20s %-20s %-10d ", mdio_dev->mdio_index, + mdio_dev->mdio_bus->id, mdio_dev->mdio_bus->name, phydev_num); + + for (i = 0; i < PHY_MAX_ADDR; i++) { + if (phyaddr[i] == INVALID_PHY_ADDR) { + break; + } + + len += snprintf(&buf[len], sizeof(buf) - len, " %#x", phyaddr[i]); + } + + printk(KERN_INFO "%s\n", buf); + } + + return; +} + +/* Find the corresponding mdio according to the mdio dev index */ +static struct mii_bus *get_mdio_dev_according_to_index(int mdio_index) +{ + struct board_mdio_dev *mdio_dev; + list_for_each_entry(mdio_dev, &mdio_dev_list, list) { + if (mdio_dev->mdio_index == mdio_index) { + return mdio_dev->mdio_bus; + } + } + + printk(KERN_ERR "no exist the mdio dev it's mdio_index = %d, please exec cmd [hw_test.bin mdiodev_list] to view mdiodev info\n", + mdio_index); + + return NULL; +} + +static int board_mdio_read(int mdio_index, int phyaddr, u32 regnum) +{ + struct mii_bus *bus; + int reg_val; + int devad; + + bus = get_mdio_dev_according_to_index(mdio_index); + if (bus == NULL) { + return -1; + } + + if ((regnum & MII_ADDR_C45)) { + devad = (regnum >> 16) & 0x1F; + regnum = regnum & 0xFFFF; + reg_val = mdiobus_c45_read(bus, phyaddr, devad, regnum); + } else { + reg_val = mdiobus_read(bus, phyaddr, regnum); + } + + return reg_val; +} + +static int board_mdio_write(int mdio_index, int phyaddr, u32 regnum, u16 val) +{ + struct mii_bus *bus; + int ret; + int devad; + + bus = get_mdio_dev_according_to_index(mdio_index); + if (bus == NULL) { + return -1; + } + + if ((regnum & MII_ADDR_C45)) { + devad = (regnum >> 16) & 0x1F; + regnum = regnum & 0xFFFF; + ret = mdiobus_c45_write(bus, phyaddr, devad, regnum, val); + } else { + ret = mdiobus_write(bus, phyaddr, regnum, val); + } + + return ret; +} + +static int phy_match_success(struct device *dev, const void * data) +{ + /* Returns a non-0 number, which guarantees that the match succeeds.*/ + return 1; +} + +/* Traverse the mdio bus, find all the phydev, and manage the found phydev by attaching it to the linked list.*/ +static int add_all_phydevs_to_list(void) +{ + struct device *dev, *dev_start = NULL; + struct board_phy_dev *board_phydev = NULL; + int i = 0; + + for (i = 0; i < MAX_PHY_DEVICE_NUMS; i++) { + dev = bus_find_device(&mdio_bus_type, dev_start, NULL, phy_match_success); + if (dev != NULL) { + board_phydev = kzalloc(sizeof(struct board_phy_dev), GFP_KERNEL); + if (board_phydev == NULL) { + printk(KERN_ERR "%s: alloc fail\n", __func__); + return -EFAULT; + } + + board_phydev->phy_index = i; + board_phydev->phydev = to_phy_device(dev); + list_add_tail(&board_phydev->list, &phydev_list); + + dev_start = dev; + } else { + break; + } + } + + printk(KERN_INFO "phydev num = %d\n", i); + + return 0; +} + +/* Removes the attached phydev from the linked list.*/ +static void delete_all_phydevs_from_list(void) +{ + struct list_head *n, *pos; + struct board_phy_dev *board_phydev; + + list_for_each_safe(pos, n, &phydev_list) { + list_del(pos); + board_phydev = list_entry(pos, struct board_phy_dev, list); + kfree(board_phydev); + } + + return; +} + +/* Lists information about all phy devices */ +static void list_all_phydevs_info(void) +{ + struct board_phy_dev *board_phydev; + + printk(KERN_INFO "all the phydevs info:\n"); + printk(KERN_INFO "index phyaddr phyId phydev_name\n"); + list_for_each_entry(board_phydev, &phydev_list, list) { + printk(KERN_INFO " %-10d %#-10x %#-10x %-20s\n", board_phydev->phy_index, board_phydev->phydev->mdio.addr,\ + board_phydev->phydev->phy_id, dev_name(&board_phydev->phydev->mdio.dev)); + } + + return; +} + +/* Find the corresponding phydev based on the phy index */ +static struct phy_device *get_phy_dev_according_to_index(int phy_index) +{ + struct board_phy_dev *board_phydev; + list_for_each_entry(board_phydev, &phydev_list, list) { + if (board_phydev->phy_index == phy_index) { + return board_phydev->phydev; + } + } + + printk(KERN_ERR "no exist the phydev it's phy_index = %d, please exec cmd [hw_test.bin phydev_list] to view phydev info\n", phy_index); + + return NULL; +} + +/* Read regnum, the phydev register whose phy index is phy_index.*/ +static int board_phy_read(int phy_index, u32 regnum) +{ + struct phy_device *phydev; + int reg_val; + + phydev = get_phy_dev_according_to_index(phy_index); + if (phydev == NULL) { + return -1; + } + + reg_val = phy_read(phydev, regnum); + + return reg_val; +} + +/* Write the register value val to the phydev register regnum whose phy index is phy_index.*/ +static int board_phy_write(int phy_index, u32 regnum, u16 val) +{ + struct phy_device *phydev; + int ret; + + phydev = get_phy_dev_according_to_index(phy_index); + if (phydev == NULL) { + return -1; + } + + ret = phy_write(phydev, regnum, val); + + return ret; +} + +/* The ioctl. Implement phydev enumeration and read and write */ +static long dram_dev_ioctl(struct file *file, unsigned int cmd, unsigned long arg) +{ + void __user *argp = (void __user *)arg; + int ret = 0; + struct phydev_user_info phy_user_info; + struct mdio_dev_user_info mdio_user_info; + + switch (cmd) { + case CMD_PHY_LIST: + list_all_phydevs_info(); + break; + + case CMD_PHY_READ: + if (copy_from_user(&phy_user_info, argp, sizeof(struct phydev_user_info))) + return -EFAULT; + + ret = board_phy_read(phy_user_info.phy_index, phy_user_info.regnum); + if (ret < 0) { + return -EFAULT; + } + + phy_user_info.regval = (u32)ret; + + if (copy_to_user(argp, &phy_user_info, sizeof(struct phydev_user_info))) + return -EFAULT; + + break; + + case CMD_PHY_WRITE: + if (copy_from_user(&phy_user_info, argp, sizeof(struct phydev_user_info))) + return -EFAULT; + + ret = board_phy_write(phy_user_info.phy_index, phy_user_info.regnum, (u16)phy_user_info.regval); + if (ret < 0) { + return -EFAULT; + } + + break; + + case CMD_MDIO_LIST: + list_all_mdio_devices_info(); + break; + + case CMD_MDIO_READ: + if (copy_from_user(&mdio_user_info, argp, sizeof(struct mdio_dev_user_info))) + return -EFAULT; + + ret = board_mdio_read(mdio_user_info.mdio_index, mdio_user_info.phyaddr, mdio_user_info.regnum); + if (ret < 0) { + return -EFAULT; + } + + mdio_user_info.regval = (u32)ret; + + if (copy_to_user(argp, &mdio_user_info, sizeof(struct mdio_dev_user_info))) + return -EFAULT; + + break; + + case CMD_MDIO_WRITE: + if (copy_from_user(&mdio_user_info, argp, sizeof(struct mdio_dev_user_info))) + return -EFAULT; + + ret = board_mdio_write(mdio_user_info.mdio_index, mdio_user_info.phyaddr, mdio_user_info.regnum, (u16)mdio_user_info.regval); + if (ret < 0) { + return -EFAULT; + } + + break; + + default: + printk("unknown ioctl cmd\n"); + break; + } + + return 0; +} + +static int dram_dev_open(struct inode *inode, struct file *file) +{ + file->private_data = NULL; + file->f_pos = 0; + return 0; + +} + +static int dram_dev_release(struct inode *inode, struct file *file) +{ + if (file->private_data) { + iounmap(file->private_data); + } + return 0; +} + +static const struct file_operations dram_dev_fops = { + .owner = THIS_MODULE, + .llseek = dram_dev_llseek, + .read = dram_dev_read, + .write = dram_dev_write, + .unlocked_ioctl = dram_dev_ioctl, + .open = dram_dev_open, + .release = dram_dev_release, +}; + +static int register_dram_cdev(void) +{ + int ret; + + ret = alloc_chrdev_region(&dram_devno, 0, 1, DRAM_DEV_NAME); + if (ret < 0) { + return ret; + } + + cdev_init(&dram_cdev, &dram_dev_fops); + dram_cdev.owner = THIS_MODULE; + + ret = cdev_add(&dram_cdev, dram_devno, 1); + if (ret < 0) { + goto err_unregister_chrdev; + } + + #if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 4, 0) + dram_class = class_create(DRAM_CLASS_NAME); + #else + dram_class = class_create(THIS_MODULE, DRAM_CLASS_NAME); + #endif + if (IS_ERR(dram_class)) { + ret = PTR_ERR(dram_class); + dram_class = NULL; + goto err_del_cdev; + } + + dram_device = device_create(dram_class, NULL, dram_devno, NULL, DRAM_DEV_NAME); + if (IS_ERR(dram_device)) { + ret = PTR_ERR(dram_device); + dram_device = NULL; + goto err_destroy_class; + } + + return 0; + +err_destroy_class: + class_destroy(dram_class); + dram_class = NULL; +err_del_cdev: + cdev_del(&dram_cdev); +err_unregister_chrdev: + unregister_chrdev_region(dram_devno, 1); + dram_devno = 0; + return ret; +} + +static void unregister_dram_cdev(void) +{ + if (dram_device != NULL) { + device_destroy(dram_class, dram_devno); + dram_device = NULL; + } + + if (dram_class != NULL) { + class_destroy(dram_class); + dram_class = NULL; + } + + cdev_del(&dram_cdev); + unregister_chrdev_region(dram_devno, 1); + dram_devno = 0; +} + +static int __init dram_init(void) +{ + int ret; + + if (add_all_phydevs_to_list() != 0) { + printk(KERN_ERR "add all phydev to list fail\n"); + delete_all_phydevs_from_list(); + return -ENXIO; + } + + if (init_class_mdio_bus() == 0) { + if (add_all_mdio_devices_to_list() == -EFAULT) { + printk(KERN_ERR "add all mdiodev to list fail\n"); + delete_all_mdio_devices_from_list(); + delete_all_phydevs_from_list(); + return -ENXIO; + } + } + + ret = register_dram_cdev(); + if (ret != 0) { + pr_notice("Register %s failed, ret=%d.\r\n", DRAM_DEV_NAME, ret); + delete_all_mdio_devices_from_list(); + delete_all_phydevs_from_list(); + return ret; + } + + return 0; +} + +static void __exit dram_exit(void) +{ + unregister_dram_cdev(); + + delete_all_mdio_devices_from_list(); + delete_all_phydevs_from_list(); +} + +module_init(dram_init); +module_exit(dram_exit); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("support"); diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/hw_test/hw_test_driver/hw_test.h b/platform/broadcom/sonic-platform-modules-micas/common/app/hw_test/hw_test_driver/hw_test.h new file mode 100644 index 00000000000..270a65c3487 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/app/hw_test/hw_test_driver/hw_test.h @@ -0,0 +1,28 @@ +#ifndef _LINUX_DRAM_DRIVER_H +#define _LINUX_DRAM_DRIVER_H + +#include +#include + +struct phydev_user_info { + int phy_index; /* Indicates which phydev to operate on */ + u32 regnum; /* Register address */ + u32 regval; /* Register value */ +}; + +#define CMD_PHY_LIST _IOR('P', 0, struct phydev_user_info) +#define CMD_PHY_READ _IOR('P', 1, struct phydev_user_info) +#define CMD_PHY_WRITE _IOR('P', 2, struct phydev_user_info) + +struct mdio_dev_user_info { + int mdio_index; /* Indicates which mdio dev to operate on */ + int phyaddr; /* phy device address */ + u32 regnum; /* Register address */ + u32 regval; /* Register value */ +}; + +#define CMD_MDIO_LIST _IOR('M', 0, struct mdio_dev_user_info) +#define CMD_MDIO_READ _IOR('M', 1, struct mdio_dev_user_info) +#define CMD_MDIO_WRITE _IOR('M', 2, struct mdio_dev_user_info) + +#endif diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/eepromutil/wedge_v5.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/eepromutil/wedge_v5.py index 4d42865f619..c48ab9acd0b 100755 --- a/platform/broadcom/sonic-platform-modules-micas/common/lib/eepromutil/wedge_v5.py +++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/eepromutil/wedge_v5.py @@ -59,6 +59,11 @@ class WedgeV5(): FBWV5_SWITCH_ASIC_MAC_LEN = 8 FBWV5_META_RESERVED_MAC = 0x14 FBWV5_META_RESERVED_MAC_LEN = 8 + FBWV6_META_RMA = 0x15 + FBWV6_META_RMA_LEN = 1 + FBWV6_META_VENDOR_DEFINED_FIELD_1 = 0x65 + FBWV6_META_VENDOR_DEFINED_FIELD_2 = 0x66 + FBWV6_META_VENDOR_DEFINED_FIELD_3 = 0x67 FBWV5_CRC16 = 0xFA @@ -158,6 +163,22 @@ def meta_reserved_mac(self): def meta_reserved_mac_size(self): return self._MetaReservedMAC_SIZE + @property + def rma(self): + return self._RMA + + @property + def vendor_defined_field_1(self): + return self._VendorDefinedField1 + + @property + def vendor_defined_field_2(self): + return self._VendorDefinedField2 + + @property + def vendor_defined_field_3(self): + return self._VendorDefinedField3 + @property def crc16(self): return self._crc16 @@ -188,6 +209,10 @@ def __init__(self): self._SWITCH_ASIC_MAC_SIZE = "" self._MetaReservedMAC = "" self._MetaReservedMAC_SIZE = "" + self._RMA = "" + self._VendorDefinedField1 = "" + self._VendorDefinedField2 = "" + self._VendorDefinedField3 = "" self._crc16 = "" def crc_ccitt(self, data, crc_init=0xFFFF, poly=0x1021): @@ -488,13 +513,40 @@ def decoder(self, t): _len = ord(t[1]) value = "0x%04X" % ((ord(t[2]) << 8) | (ord(t[3]))) self._crc16 = value + elif ord(t[0]) == self.FBWV6_META_RMA: + name = "RMA" + _len = ord(t[1]) + if _len != self.FBWV6_META_RMA_LEN: + raise WedgeException("Invalid RMA len: %d" % _len, -1) + value = ord(t[2]) + self._RMA = value + elif ord(t[0]) == self.FBWV6_META_VENDOR_DEFINED_FIELD_1: + name = "Vendor Defined Field 1" + _len = ord(t[1]) + value = "" + for c in t[2:2 + ord(t[1])]: + value += "0x%02X " % (ord(c),) + self._VendorDefinedField1 = value + elif ord(t[0]) == self.FBWV6_META_VENDOR_DEFINED_FIELD_2: + name = "Vendor Defined Field 2" + _len = ord(t[1]) + value = "" + for c in t[2:2 + ord(t[1])]: + value += "0x%02X " % (ord(c),) + self._VendorDefinedField2 = value + elif ord(t[0]) == self.FBWV6_META_VENDOR_DEFINED_FIELD_3: + name = "Vendor Defined Field 3" + _len = ord(t[1]) + value = "" + for c in t[2:2 + ord(t[1])]: + value += "0x%02X " % (ord(c),) + self._VendorDefinedField3 = value else: name = "Unknown" _len = ord(t[1]) value = "" for c in t[2:2 + ord(t[1])]: value += "0x%02X " % (ord(c),) - raise WedgeException("Unknown Wedge EEPROM Format V5 TLV type: 0x%02x, len: %d, value: %s" % (ord(t[0]), ord(t[1]), value), -1) ret.append({"name": name, "code": ord(t[0]), "value": value, "lens": _len}) return ret @@ -519,7 +571,7 @@ def decode(self, e2): e2_index += 2 # E2 Version check - if ord(e2[e2_index]) != self.VERSION: + if ord(e2[e2_index]) < self.VERSION: raise WedgeException("Wedge eeprom version: 0x%02x, not V5 format" % ord(e2[e2_index]), -10) e2_index += 1 @@ -588,4 +640,4 @@ def __str__(self): self.switch_asic_mac_size, self.meta_reserved_mac, self.meta_reserved_mac_size, - self.crc16) \ No newline at end of file + self.crc16) diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/baseutil.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/baseutil.py index 12f9aa881da..ffe32fbd806 100644 --- a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/baseutil.py +++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/baseutil.py @@ -28,6 +28,7 @@ CONFIG_DB_PATH = "/etc/sonic/config_db.json" BOARD_ID_PATH = "/sys/module/platform_common/parameters/dfd_my_type" BOARD_AIRFLOW_PATH = "/etc/sonic/.airflow" +SUB_VERSION_FILE = "/etc/sonic/.subversion" def getonieplatform(path): @@ -61,6 +62,14 @@ def getboardairflow(): return airflow +def get_sub_version(): + if not os.path.exists(SUB_VERSION_FILE): + return "NA" + with open(SUB_VERSION_FILE) as fd: + sub_ver = fd.read().strip() + return sub_ver + + def getplatform_config_db(): if not os.path.isfile(CONFIG_DB_PATH): return "" @@ -81,6 +90,7 @@ def getplatform_name(): platform = (getplatform_name()).replace("-", "_") boardid = getboardid() boardairflow = getboardairflow() +sub_ver = (get_sub_version()).replace("-", "_") CONFIG_FILE_PATH_LIST = [ @@ -90,6 +100,8 @@ def getplatform_name(): DEVICE_CONFIG_FILE_LIST = [ + platform + "_" + boardid + "_" + sub_ver + "_" + boardairflow + "_device.py", + platform + "_" + boardid + "_" + sub_ver + "_device.py", platform + "_" + boardid + "_" + boardairflow + "_device.py", platform + "_" + boardid + "_device.py", platform + "_" + boardairflow + "_device.py", @@ -98,6 +110,8 @@ def getplatform_name(): MONITOR_CONFIG_FILE_LIST = [ + platform + "_" + boardid + "_" + sub_ver + "_" + boardairflow + "_monitor.py", + platform + "_" + boardid + "_" + sub_ver + "_monitor.py", platform + "_" + boardid + "_" + boardairflow + "_monitor.py", platform + "_" + boardid + "_monitor.py", platform + "_" + boardairflow + "_monitor.py", diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/chassisbase.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/chassisbase.py index ea1ef4930a1..9c90b317347 100644 --- a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/chassisbase.py +++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/chassisbase.py @@ -36,6 +36,8 @@ class chassisbase(object): __card_list = [] __sensor_list = [] __dcdc_list = [] + __dcdc_vol_list = [] + __dcdc_curr_list = [] __cpld_list = [] __comp_list = [] __bios_list = [] @@ -154,12 +156,17 @@ def __init__(self, conftype=0, conf=None): self.fan_list = fantemp # dcdc - dcdctemp = [] dcdcconfig = __confTemp.get('dcdc', []) for item in dcdcconfig: - dcdc1 = dcdc(item) - dcdctemp.append(dcdc1) - self.dcdc_list = dcdctemp + Unit = item.get("Unit", None) + if Unit == "V" or Unit == "mV": + dcdc1 = dcdc(item) + self.dcdc_vol_list.append(dcdc1) + elif Unit == "A" or Unit == "mA": + dcdc1 = dcdc(item) + self.dcdc_curr_list.append(dcdc1) + self.dcdc_list = self.dcdc_vol_list + self.dcdc_curr_list + # dcdc_data_source. the following is example: ''' @@ -204,10 +211,14 @@ def __init__(self, conftype=0, conf=None): s3ip_conf = item.copy() s3ip_conf["sensor_dir"] = sensor_dir dcdc_obj = dcdc(s3ip_conf = s3ip_conf) - tmp_list.append(dcdc_obj) + Unit = item.get("Unit", None) + if Unit == "V" or Unit == "mV": + self.dcdc_vol_list.append(dcdc_obj) + elif Unit == "A" or Unit == "mA": + self.dcdc_curr_list.append(dcdc_obj) except Exception: pass - self.dcdc_list.extend(tmp_list) + self.dcdc_list = self.dcdc_vol_list + self.dcdc_curr_list # cpld cpldtemp = [] @@ -249,6 +260,24 @@ def dcdc_list(self): def dcdc_list(self, val): self.__dcdc_list = val + # vol dcdc + @property + def dcdc_vol_list(self): + return self.__dcdc_vol_list + + @dcdc_vol_list.setter + def dcdc_vol_list(self, val): + self.__dcdc_vol_list = val + + # curr dcdc + @property + def dcdc_curr_list(self): + return self.__dcdc_curr_list + + @dcdc_curr_list.setter + def dcdc_curr_list(self, val): + self.__dcdc_curr_list = val + # sensor @property def sensor_list(self): diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/dcdc.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/dcdc.py index 719680f878b..6045ef8ede1 100644 --- a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/dcdc.py +++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/dcdc.py @@ -27,4 +27,10 @@ def __init__(self, conf = None, s3ip_conf = None): if s3ip_conf is not None: self.sensor = sensor_s3ip(s3ip_conf) self.name = self.sensor.name - self.dcdc_id = self.sensor.sensor_id + self.dcdc_type = s3ip_conf.get("type", None) + if self.dcdc_type == "vol": + dcdc_index = s3ip_conf["sensor_dir"][3:] + self.dcdc_id = "DCDC" + str(dcdc_index) + if self.dcdc_type == "curr": + dcdc_index = int(s3ip_conf["sensor_dir"][4:]) + int(self.sensor.vol_num) + self.dcdc_id = "DCDC" + str(dcdc_index) diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/interface.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/interface.py index e12c469e612..8fbe1643145 100644 --- a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/interface.py +++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/interface.py @@ -863,24 +863,42 @@ def get_dcdc_by_id(self, dcdc_id): dic["Unit"] = dcdctmp.sensor.Unit return dic - def get_dcdc_all_info(self): - val_list = collections.OrderedDict() + def get_dcdc_unit_by_id(self, dcdc_id): dcdclist = self.chas.dcdc_list + dcdctmp = None + for dcdc in dcdclist: + if dcdc.dcdc_id == dcdc_id: + dcdctmp = dcdc + dic = collections.OrderedDict() + if dcdctmp is None: + return self.na_ret + return dcdctmp.sensor.Unit + + + def get_dcdc_all_info(self, dcdc_type=""): + val_list = collections.OrderedDict() + if dcdc_type == "vol": + dcdclist = self.chas.dcdc_vol_list + elif dcdc_type == "curr": + dcdclist = self.chas.dcdc_curr_list + else: + dcdclist = self.chas.dcdc_list for dcdc in dcdclist: dicttmp = {} sensorname = "%s" % (dcdc.name) dicttmp['Min'] = dcdc.sensor.Min dicttmp['Max'] = dcdc.sensor.Max tmp = dcdc.sensor.Value + if tmp is None: + dicttmp['Value'] = self.error_ret + dicttmp["Status"] = "NOT OK" + continue if tmp is not None: dicttmp['Value'] = tmp if tmp > float(dicttmp['Max']) or tmp < float(dicttmp['Min']): dicttmp["Status"] = "NOT OK" else: dicttmp["Status"] = "OK" - else: - dicttmp['Value'] = self.error_ret - dicttmp["Status"] = "NOT OK" dicttmp['Unit'] = dcdc.sensor.Unit val_list[sensorname] = dicttmp return val_list @@ -1373,4 +1391,3 @@ def get_sensor_print_src(self): @return string of sensor data source """ return self.chas.sensor_print_src - diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/psu.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/psu.py index c62da1929d3..3231d2b2d75 100644 --- a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/psu.py +++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/psu.py @@ -17,9 +17,12 @@ from eepromutil.fru import ipmifru from eepromutil.cust_fru import CustFru +from eepromutil.wedge_v5 import WedgeV5 from plat_hal.devicebase import devicebase from plat_hal.sensor import sensor +PSU_SUPPORT_E2_TYPE = ["fru", "custfru", "wedge_v5"] + class psu(devicebase): __pmbus = None @@ -608,14 +611,9 @@ def get_fru_info_by_sysfs(self): return False return True - def get_fru_info_by_decode(self): + def get_fru_info_by_decode(self, eeprom): try: - eeprom = self.get_eeprom_info(self.e2loc) - if eeprom is None: - raise Exception("%s:value is none" % self.name) fru = ipmifru() - if isinstance(eeprom, bytes): - eeprom = self.byteTostr(eeprom) fru.decodeBin(eeprom) if fru.productInfoArea is not None: self.productManufacturer = fru.productInfoArea.productManufacturer.strip() @@ -632,14 +630,9 @@ def get_fru_info_by_decode(self): return False return True - def get_custfru_info_by_decode(self): + def get_custfru_info_by_decode(self, eeprom): try: - eeprom = self.get_eeprom_info(self.e2loc) - if eeprom is None: - raise Exception("%s:value is none" % self.name) custfru = CustFru() - if isinstance(eeprom, bytes): - eeprom = self.byteTostr(eeprom) custfru.decode(eeprom) self.productManufacturer = custfru.manufacturer.strip() self.productName = custfru.product_name.strip() @@ -655,6 +648,51 @@ def get_custfru_info_by_decode(self): return False return True + def get_wedge_v5_info_by_decode(self, eeprom): + try: + wegdev5 = WedgeV5() + rets = wegdev5.decode(eeprom) + self.productVersion = None + production_state = None + production_version = None + production_sub_version = None + for item in rets: + if item["code"] == wegdev5.FBWV5_PRODUCT_SERIAL_NUMBER: + self.productSerialNumber = item["value"].replace("\x00", "").strip() + if item["code"] == wegdev5.FBWV5_ODM_PCBA_PART_NUMBER: + self.productPartModelName = item["value"].replace("\x00", "").strip() + if item["code"] == wegdev5.FBWV5_PRODUCT_NAME: + self.productName = item["value"].replace("\x00", "").strip() + if item["code"] == wegdev5.FBWV5_SYSTEM_MANUFACTURER: + self.productManufacturer = item["value"].replace("\x00", "").strip() + if item["code"] == wegdev5.FBWV5_PRODUCT_PRODUCTION_STATE: + production_state = "%d" % item["value"] + if item["code"] == wegdev5.FBWV5_PRODUCT_VERSION: + production_version = "%d" % item["value"] + if item["code"] == wegdev5.FBWV5_PRODUCT_SUB_VERSION: + production_sub_version = "%d" % item["value"] + if production_state is not None and production_version is not None and production_sub_version is not None: + self.productVersion = "{}.{}.{}".format(production_state, production_version, production_sub_version) + else: + self.productVersion = None + except Exception: + self.productManufacturer = None + self.productName = None + self.productPartModelName = None + self.productVersion = None + self.productSerialNumber = None + return False + return True + + def get_fru_info_by_type(self, e2_type, eeprom): + if e2_type == "fru": + return self.get_fru_info_by_decode(eeprom) + if e2_type == "custfru": + return self.get_custfru_info_by_decode(eeprom) + if e2_type == "wedge_v5": + return self.get_wedge_v5_info_by_decode(eeprom) + return False + def get_fru_info(self): try: if self.present is not True: @@ -663,11 +701,23 @@ def get_fru_info(self): if self.get_fru_info_by_sysfs() is True: return True - if self.e2_type == "fru": - return self.get_fru_info_by_decode() + eeprom = self.get_eeprom_info(self.e2loc) + if eeprom is None: + raise Exception("%s:value is none" % self.name) + if isinstance(eeprom, bytes): + eeprom = self.byteTostr(eeprom) + + if isinstance(self.e2_type, str): + return self.get_fru_info_by_type(self.e2_type, eeprom) - if self.e2_type == "custfru": - return self.get_custfru_info_by_decode() + if isinstance(self.e2_type, list): + for e2_type in self.e2_type: + if self.get_fru_info_by_type(e2_type, eeprom): + return True + else: + for e2_type in PSU_SUPPORT_E2_TYPE: + if self.get_fru_info_by_type(e2_type, eeprom): + return True raise Exception("%s: unsupport e2_type: %s" % (self.name, self.e2_type)) except Exception: diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/sensor.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/sensor.py index 99396923c41..7d47d462541 100644 --- a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/sensor.py +++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/sensor.py @@ -299,13 +299,18 @@ def __init__(self, s3ip_conf): self.max_path = "%s/%s/%s" % (self.s3ip_conf.get("path"), self.s3ip_conf.get("sensor_dir"), "max") self.alias = "%s/%s/%s" % (self.s3ip_conf.get("path"), self.s3ip_conf.get("sensor_dir"), "alias") self.sensor_id = self.s3ip_conf.get("type").upper() + self.vol_num_path = "/sys/s3ip/vol_sensor/number" + self.Unit = self.s3ip_conf.get("Unit") @property def Min(self): try: ret, val = self.get_sysfs(self.min_path) if ret is True: - return val + self.__Min = val + if self.format is not None: + self.__Min = self.get_format_value(self.format % self.__Min) + return self.__Min except Exception: pass return None @@ -322,7 +327,10 @@ def Max(self): try: ret, val = self.get_sysfs(self.max_path) if ret is True: - return val + self.__Max = val + if self.format is not None: + self.__Max = self.get_format_value(self.format % self.__Max) + return self.__Max except Exception: pass return None @@ -343,4 +351,13 @@ def name(self): except Exception: pass return None - + + @property + def vol_num(self): + try: + ret, val = self.get_sysfs(self.vol_num_path) + if ret is True: + return val + except Exception: + pass + return None diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/wbutil/baseutil.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/wbutil/baseutil.py index fdc4410e2c2..4548b4716e9 100644 --- a/platform/broadcom/sonic-platform-modules-micas/common/lib/wbutil/baseutil.py +++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/wbutil/baseutil.py @@ -17,6 +17,8 @@ import os +SUB_VERSION_FILE = "/etc/sonic/.subversion" + def get_machine_info(): if not os.path.isfile('/host/machine.conf'): @@ -52,3 +54,11 @@ def get_onie_machine(machine_info): if 'onie_machine' in machine_info: return machine_info['onie_machine'] return None + + +def get_sub_version(): + if not os.path.exists(SUB_VERSION_FILE): + return "NA" + with open(SUB_VERSION_FILE) as fd: + sub_ver = fd.read().strip() + return sub_ver diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/Makefile b/platform/broadcom/sonic-platform-modules-micas/common/modules/Makefile index 0b3ed8b66f1..0f178c2edfa 100644 --- a/platform/broadcom/sonic-platform-modules-micas/common/modules/Makefile +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/Makefile @@ -1,5 +1,6 @@ PWD = $(shell pwd) EXTRA_CFLAGS:= -I$(M)/include +EXTRA_CFLAGS+= -I$(M) EXTRA_CFLAGS+= -Wall KVERSION ?= $(shell uname -r) KERNEL_SRC ?= /lib/modules/$(KVERSION) @@ -9,6 +10,10 @@ export module_out_put_dir PLAT_SYSFS_DIR = $(PWD)/plat_sysfs S3IP_SYSFS_DIR = $(PWD)/s3ip_sysfs +MAKEFILE_FILE_PATH = $(abspath $(lastword $(MAKEFILE_LIST))) +BSP_KERNEL_DEBUG_PATH = $(abspath $(MAKEFILE_FILE_PATH)/../../public/include) + +EXTRA_CFLAGS+= -I$(BSP_KERNEL_DEBUG_PATH) export PLAT_SYSFS_DIR export S3IP_SYSFS_DIR @@ -33,16 +38,35 @@ obj-m += wb_wdt.o obj-m += wb_spi_gpio_device.o obj-m += wb_xdpe132g5c.o obj-m += wb_uio_irq.o -obj-m += hw_test.o obj-m += wb_mdio_gpio_device.o obj-m += wb_csu550.o obj-m += wb_i2c_mux_pca9641.o obj-m += wb_i2c_mux_pca954x.o +obj-m += wb_i2c_i801.o +obj-m += wb_i2c_algo_bit.o +obj-m += wb_i2c_gpio.o obj-m += wb_xdpe132g5c_pmbus.o obj-m += wb_i2c_gpio_device.o +obj-m += wb_pmbus_core.o +obj-m += wb_xdpe12284.o +obj-m += wb_ina3221.o +obj-m += wb_ucd9000.o +obj-m += wb_rc32312.o +obj-m += wb_lm75.o +obj-m += wb_at24.o +obj-m += wb_spd.o +obj-m += wb_lpc_bmc.o obj-m += ct7148.o obj-m += wb_ucd9081.o obj-m += wb_indirect_dev.o +obj-m += wb_vr_common.o +obj-m += wb_spi_master.o +obj-m += wb_rc32312.o +obj-m += wb_logic_dev_common.o +obj-m += ixgbe/ +obj-m += i2c-designware/ +obj-m += wb_mdio_dev.o +obj-m += wb_switch_dev.o all : $(MAKE) -C $(PLAT_SYSFS_DIR) @@ -50,6 +74,8 @@ all : $(MAKE) -C $(KERNEL_SRC)/build M=$(PWD) modules @if [ ! -d $(module_out_put_dir) ]; then mkdir -p $(module_out_put_dir) ;fi cp -p $(PWD)/*.ko $(module_out_put_dir) + cp -p $(PWD)/ixgbe/*.ko $(module_out_put_dir) + cp -p $(PWD)/i2c-designware/*.ko $(module_out_put_dir) clean : rm -rf $(module_out_put_dir) diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/ct7148.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/ct7148.c index fff4b0e0eec..9719e763d85 100644 --- a/platform/broadcom/sonic-platform-modules-micas/common/modules/ct7148.c +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/ct7148.c @@ -29,6 +29,7 @@ #include #include #include +#include /* debug switch level */ typedef enum { @@ -187,7 +188,11 @@ static const struct hwmon_ops ct7318_ops = { .is_visible = ct7318_is_visible, }; +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) +static int ct7318_probe(struct i2c_client *client, const struct i2c_device_id *id) +#else static int ct7318_probe(struct i2c_client *client) +#endif { struct device *dev = &client->dev; struct device *hwmon_dev; @@ -201,7 +206,11 @@ static int ct7318_probe(struct i2c_client *client) mutex_init(&data->update_lock); +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) + data->channels = id->driver_data; +#else data->channels = i2c_match_id(ct7318_id, client)->driver_data; +#endif data->client = client; for (i = 0; i < data->channels; i++) { @@ -226,7 +235,7 @@ static struct i2c_driver ct7318_driver = { .name = "ct7318", .of_match_table = of_match_ptr(ct7318_of_match), }, - .probe_new = ct7318_probe, + .probe = ct7318_probe, .id_table = ct7318_id, }; diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/hw_test.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/hw_test.c index 84d3f54943f..7ab6dfdc01e 100644 --- a/platform/broadcom/sonic-platform-modules-micas/common/modules/hw_test.c +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/hw_test.c @@ -48,7 +48,7 @@ #include "hw_test.h" -extern struct bus_type mdio_bus_type; +extern const struct bus_type mdio_bus_type; struct board_mdio_dev { struct list_head list; diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/i2c-designware/Makefile b/platform/broadcom/sonic-platform-modules-micas/common/modules/i2c-designware/Makefile new file mode 100644 index 00000000000..9ee82ebe0ed --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/i2c-designware/Makefile @@ -0,0 +1,19 @@ +PWD = $(shell pwd) + +obj-m += wb_i2c_designware_core.o +wb_i2c_designware_core-y := i2c-designware-common.o +wb_i2c_designware_core-y += i2c-designware-master.o +wb_i2c_designware_core-$(CONFIG_I2C_DESIGNWARE_SLAVE) += i2c-designware-slave.o +obj-m += wb_i2c_designware_platform.o +wb_i2c_designware_platform-y := i2c-designware-platdrv.o +wb_i2c_designware_platform-$(CONFIG_I2C_DESIGNWARE_AMDPSP) += i2c-designware-amdpsp.o +wb_i2c_designware_platform-$(CONFIG_I2C_DESIGNWARE_BAYTRAIL) += i2c-designware-baytrail.o +obj-$(CONFIG_I2C_DESIGNWARE_PCI) += wb_i2c_designware_pci.o +wb_i2c_designware_pci-y := i2c-designware-pcidrv.o + +all: + $(MAKE) -C $(KERNEL_SRC)/build M=$(PWD) modules + @if [ ! -d $(module_out_put_dir) ]; then mkdir -p $(module_out_put_dir) ;fi + cp -p $(PWD)/*.ko $(module_out_put_dir) +clean: + rm -f $(PWD)/*.o $(PWD)/*.ko $(PWD)/*.mod.c $(PWD)/.*.cmd $(PWD)/*.order $(PWD)/*.symvers $(PWD)/*.mod diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/i2c-designware/i2c-ccgx-ucsi.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/i2c-designware/i2c-ccgx-ucsi.h new file mode 100644 index 00000000000..739ac7a4b11 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/i2c-designware/i2c-ccgx-ucsi.h @@ -0,0 +1,11 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +#ifndef __I2C_CCGX_UCSI_H_ +#define __I2C_CCGX_UCSI_H_ + +struct i2c_adapter; +struct i2c_client; +struct software_node; + +struct i2c_client *i2c_new_ccgx_ucsi(struct i2c_adapter *adapter, int irq, + const struct software_node *swnode); +#endif /* __I2C_CCGX_UCSI_H_ */ diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/i2c-designware/i2c-designware-amdpsp.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/i2c-designware/i2c-designware-amdpsp.c new file mode 100644 index 00000000000..63454b06e5d --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/i2c-designware/i2c-designware-amdpsp.c @@ -0,0 +1,318 @@ +// SPDX-License-Identifier: GPL-2.0 + +#include +#include +#include +#include +#include + +#include "i2c-designware-core.h" + +#define PSP_I2C_RESERVATION_TIME_MS 100 + +#define PSP_I2C_REQ_RETRY_CNT 400 +#define PSP_I2C_REQ_RETRY_DELAY_US (25 * USEC_PER_MSEC) +#define PSP_I2C_REQ_STS_OK 0x0 +#define PSP_I2C_REQ_STS_BUS_BUSY 0x1 +#define PSP_I2C_REQ_STS_INV_PARAM 0x3 + +enum psp_i2c_req_type { + PSP_I2C_REQ_ACQUIRE, + PSP_I2C_REQ_RELEASE, + PSP_I2C_REQ_MAX +}; + +struct psp_i2c_req { + struct psp_req_buffer_hdr hdr; + enum psp_i2c_req_type type; +}; + +static DEFINE_MUTEX(psp_i2c_access_mutex); +static unsigned long psp_i2c_sem_acquired; +static u32 psp_i2c_access_count; +static bool psp_i2c_mbox_fail; +static struct device *psp_i2c_dev; + +static int (*_psp_send_i2c_req)(struct psp_i2c_req *req); + +/* Helper to verify status returned by PSP */ +static int check_i2c_req_sts(struct psp_i2c_req *req) +{ + u32 status; + + /* Status field in command-response buffer is updated by PSP */ + status = READ_ONCE(req->hdr.status); + + switch (status) { + case PSP_I2C_REQ_STS_OK: + return 0; + case PSP_I2C_REQ_STS_BUS_BUSY: + return -EBUSY; + case PSP_I2C_REQ_STS_INV_PARAM: + default: + return -EIO; + } +} + +/* + * Errors in x86-PSP i2c-arbitration protocol may occur at two levels: + * 1. mailbox communication - PSP is not operational or some IO errors with + * basic communication had happened. + * 2. i2c-requests - PSP refuses to grant i2c arbitration to x86 for too long. + * + * In order to distinguish between these in error handling code all mailbox + * communication errors on the first level (from CCP symbols) will be passed + * up and if -EIO is returned the second level will be checked. + */ +static int psp_send_i2c_req_cezanne(struct psp_i2c_req *req) +{ + int ret; + + ret = psp_send_platform_access_msg(PSP_I2C_REQ_BUS_CMD, (struct psp_request *)req); + if (ret == -EIO) + return check_i2c_req_sts(req); + + return ret; +} + +static int psp_send_i2c_req_doorbell(struct psp_i2c_req *req) +{ + int ret; + + ret = psp_ring_platform_doorbell(req->type, &req->hdr.status); + if (ret == -EIO) + return check_i2c_req_sts(req); + + return ret; +} + +static int psp_send_i2c_req(enum psp_i2c_req_type i2c_req_type) +{ + struct psp_i2c_req *req; + unsigned long start; + int status, ret; + + /* Allocate command-response buffer */ + req = kzalloc(sizeof(*req), GFP_KERNEL); + if (!req) + return -ENOMEM; + + req->hdr.payload_size = sizeof(*req); + req->type = i2c_req_type; + + start = jiffies; + ret = read_poll_timeout(_psp_send_i2c_req, status, + (status != -EBUSY), + PSP_I2C_REQ_RETRY_DELAY_US, + PSP_I2C_REQ_RETRY_CNT * PSP_I2C_REQ_RETRY_DELAY_US, + 0, req); + if (ret) { + dev_err(psp_i2c_dev, "Timed out waiting for PSP to %s I2C bus\n", + (i2c_req_type == PSP_I2C_REQ_ACQUIRE) ? + "release" : "acquire"); + goto cleanup; + } + + ret = status; + if (ret) { + dev_err(psp_i2c_dev, "PSP communication error\n"); + goto cleanup; + } + + dev_dbg(psp_i2c_dev, "Request accepted by PSP after %ums\n", + jiffies_to_msecs(jiffies - start)); + +cleanup: + if (ret) { + dev_err(psp_i2c_dev, "Assume i2c bus is for exclusive host usage\n"); + psp_i2c_mbox_fail = true; + } + + kfree(req); + return ret; +} + +static void release_bus(void) +{ + int status; + + if (!psp_i2c_sem_acquired) + return; + + status = psp_send_i2c_req(PSP_I2C_REQ_RELEASE); + if (status) + return; + + dev_dbg(psp_i2c_dev, "PSP semaphore held for %ums\n", + jiffies_to_msecs(jiffies - psp_i2c_sem_acquired)); + + psp_i2c_sem_acquired = 0; +} + +static void psp_release_i2c_bus_deferred(struct work_struct *work) +{ + mutex_lock(&psp_i2c_access_mutex); + + /* + * If there is any pending transaction, cannot release the bus here. + * psp_release_i2c_bus will take care of this later. + */ + if (psp_i2c_access_count) + goto cleanup; + + release_bus(); + +cleanup: + mutex_unlock(&psp_i2c_access_mutex); +} +static DECLARE_DELAYED_WORK(release_queue, psp_release_i2c_bus_deferred); + +static int psp_acquire_i2c_bus(void) +{ + int status; + + mutex_lock(&psp_i2c_access_mutex); + + /* Return early if mailbox malfunctioned */ + if (psp_i2c_mbox_fail) + goto cleanup; + + psp_i2c_access_count++; + + /* + * No need to request bus arbitration once we are inside semaphore + * reservation period. + */ + if (psp_i2c_sem_acquired) + goto cleanup; + + status = psp_send_i2c_req(PSP_I2C_REQ_ACQUIRE); + if (status) + goto cleanup; + + psp_i2c_sem_acquired = jiffies; + + schedule_delayed_work(&release_queue, + msecs_to_jiffies(PSP_I2C_RESERVATION_TIME_MS)); + + /* + * In case of errors with PSP arbitrator psp_i2c_mbox_fail variable is + * set above. As a consequence consecutive calls to acquire will bypass + * communication with PSP. At any case i2c bus is granted to the caller, + * thus always return success. + */ +cleanup: + mutex_unlock(&psp_i2c_access_mutex); + return 0; +} + +static void psp_release_i2c_bus(void) +{ + mutex_lock(&psp_i2c_access_mutex); + + /* Return early if mailbox was malfunctional */ + if (psp_i2c_mbox_fail) + goto cleanup; + + /* + * If we are last owner of PSP semaphore, need to release aribtration + * via mailbox. + */ + psp_i2c_access_count--; + if (psp_i2c_access_count) + goto cleanup; + + /* + * Send a release command to PSP if the semaphore reservation timeout + * elapsed but x86 still owns the controller. + */ + if (!delayed_work_pending(&release_queue)) + release_bus(); + +cleanup: + mutex_unlock(&psp_i2c_access_mutex); +} + +/* + * Locking methods are based on the default implementation from + * drivers/i2c/i2c-core-base.c, but with psp acquire and release operations + * added. With this in place we can ensure that i2c clients on the bus shared + * with psp are able to lock HW access to the bus for arbitrary number of + * operations - that is e.g. write-wait-read. + */ +static void i2c_adapter_dw_psp_lock_bus(struct i2c_adapter *adapter, + unsigned int flags) +{ + psp_acquire_i2c_bus(); + rt_mutex_lock_nested(&adapter->bus_lock, i2c_adapter_depth(adapter)); +} + +static int i2c_adapter_dw_psp_trylock_bus(struct i2c_adapter *adapter, + unsigned int flags) +{ + int ret; + + ret = rt_mutex_trylock(&adapter->bus_lock); + if (ret) + return ret; + + psp_acquire_i2c_bus(); + + return ret; +} + +static void i2c_adapter_dw_psp_unlock_bus(struct i2c_adapter *adapter, + unsigned int flags) +{ + psp_release_i2c_bus(); + rt_mutex_unlock(&adapter->bus_lock); +} + +static const struct i2c_lock_operations i2c_dw_psp_lock_ops = { + .lock_bus = i2c_adapter_dw_psp_lock_bus, + .trylock_bus = i2c_adapter_dw_psp_trylock_bus, + .unlock_bus = i2c_adapter_dw_psp_unlock_bus, +}; + +int i2c_dw_amdpsp_probe_lock_support(struct dw_i2c_dev *dev) +{ + struct pci_dev *rdev; + + if (!IS_REACHABLE(CONFIG_CRYPTO_DEV_CCP_DD)) + return -ENODEV; + + if (!dev) + return -ENODEV; + + if (!(dev->flags & ARBITRATION_SEMAPHORE)) + return -ENODEV; + + /* Allow to bind only one instance of a driver */ + if (psp_i2c_dev) + return -EEXIST; + + /* Cezanne uses platform mailbox, Mendocino and later use doorbell */ + rdev = pci_get_domain_bus_and_slot(0, 0, PCI_DEVFN(0, 0)); + if (rdev->device == 0x1630) + _psp_send_i2c_req = psp_send_i2c_req_cezanne; + else + _psp_send_i2c_req = psp_send_i2c_req_doorbell; + pci_dev_put(rdev); + + if (psp_check_platform_access_status()) + return -EPROBE_DEFER; + + psp_i2c_dev = dev->dev; + + dev_info(psp_i2c_dev, "I2C bus managed by AMD PSP\n"); + + /* + * Install global locking callbacks for adapter as well as internal i2c + * controller locks. + */ + dev->adapter.lock_ops = &i2c_dw_psp_lock_ops; + dev->acquire_lock = psp_acquire_i2c_bus; + dev->release_lock = psp_release_i2c_bus; + + return 0; +} diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/i2c-designware/i2c-designware-baytrail.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/i2c-designware/i2c-designware-baytrail.c new file mode 100644 index 00000000000..45774aa47c2 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/i2c-designware/i2c-designware-baytrail.c @@ -0,0 +1,44 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Intel BayTrail PMIC I2C bus semaphore implementation + * Copyright (c) 2014, Intel Corporation. + */ +#include +#include +#include +#include + +#include + +#include "i2c-designware-core.h" + +int i2c_dw_baytrail_probe_lock_support(struct dw_i2c_dev *dev) +{ + acpi_status status; + unsigned long long shared_host = 0; + acpi_handle handle; + + if (!dev) + return -ENODEV; + + handle = ACPI_HANDLE(dev->dev); + if (!handle) + return -ENODEV; + + status = acpi_evaluate_integer(handle, "_SEM", NULL, &shared_host); + if (ACPI_FAILURE(status)) + return -ENODEV; + + if (!shared_host) + return -ENODEV; + + if (!iosf_mbi_available()) + return -EPROBE_DEFER; + + dev_info(dev->dev, "I2C bus managed by PUNIT\n"); + dev->acquire_lock = iosf_mbi_block_punit_i2c_access; + dev->release_lock = iosf_mbi_unblock_punit_i2c_access; + dev->shared_with_punit = true; + + return 0; +} diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/i2c-designware/i2c-designware-common.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/i2c-designware/i2c-designware-common.c new file mode 100644 index 00000000000..b3282785523 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/i2c-designware/i2c-designware-common.c @@ -0,0 +1,835 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Synopsys DesignWare I2C adapter driver. + * + * Based on the TI DAVINCI I2C adapter driver. + * + * Copyright (C) 2006 Texas Instruments. + * Copyright (C) 2007 MontaVista Software Inc. + * Copyright (C) 2009 Provigent Ltd. + */ + +#define DEFAULT_SYMBOL_NAMESPACE "I2C_DW_COMMON" + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "i2c-designware-core.h" + +static char *abort_sources[] = { + [ABRT_7B_ADDR_NOACK] = + "slave address not acknowledged (7bit mode)", + [ABRT_10ADDR1_NOACK] = + "first address byte not acknowledged (10bit mode)", + [ABRT_10ADDR2_NOACK] = + "second address byte not acknowledged (10bit mode)", + [ABRT_TXDATA_NOACK] = + "data not acknowledged", + [ABRT_GCALL_NOACK] = + "no acknowledgement for a general call", + [ABRT_GCALL_READ] = + "read after general call", + [ABRT_SBYTE_ACKDET] = + "start byte acknowledged", + [ABRT_SBYTE_NORSTRT] = + "trying to send start byte when restart is disabled", + [ABRT_10B_RD_NORSTRT] = + "trying to read when restart is disabled (10bit mode)", + [ABRT_MASTER_DIS] = + "trying to use disabled adapter", + [ARB_LOST] = + "lost arbitration", + [ABRT_SLAVE_FLUSH_TXFIFO] = + "read command so flush old data in the TX FIFO", + [ABRT_SLAVE_ARBLOST] = + "slave lost the bus while transmitting data to a remote master", + [ABRT_SLAVE_RD_INTX] = + "incorrect slave-transmitter mode configuration", +}; + +static int dw_reg_read(void *context, unsigned int reg, unsigned int *val) +{ + struct dw_i2c_dev *dev = context; + + *val = readl(dev->base + reg); + + return 0; +} + +static int dw_reg_write(void *context, unsigned int reg, unsigned int val) +{ + struct dw_i2c_dev *dev = context; + + writel(val, dev->base + reg); + + return 0; +} + +static int dw_reg_read_swab(void *context, unsigned int reg, unsigned int *val) +{ + struct dw_i2c_dev *dev = context; + + *val = swab32(readl(dev->base + reg)); + + return 0; +} + +static int dw_reg_write_swab(void *context, unsigned int reg, unsigned int val) +{ + struct dw_i2c_dev *dev = context; + + writel(swab32(val), dev->base + reg); + + return 0; +} + +static int dw_reg_read_word(void *context, unsigned int reg, unsigned int *val) +{ + struct dw_i2c_dev *dev = context; + + *val = readw(dev->base + reg) | + (readw(dev->base + reg + 2) << 16); + + return 0; +} + +static int dw_reg_write_word(void *context, unsigned int reg, unsigned int val) +{ + struct dw_i2c_dev *dev = context; + + writew(val, dev->base + reg); + writew(val >> 16, dev->base + reg + 2); + + return 0; +} + +/** + * i2c_dw_init_regmap() - Initialize registers map + * @dev: device private data + * + * Autodetects needed register access mode and creates the regmap with + * corresponding read/write callbacks. This must be called before doing any + * other register access. + */ +int i2c_dw_init_regmap(struct dw_i2c_dev *dev) +{ + struct regmap_config map_cfg = { + .reg_bits = 32, + .val_bits = 32, + .reg_stride = 4, + .disable_locking = true, + .reg_read = dw_reg_read, + .reg_write = dw_reg_write, + .max_register = DW_IC_COMP_TYPE, + }; + u32 reg; + int ret; + + /* + * Skip detecting the registers map configuration if the regmap has + * already been provided by a higher code. + */ + if (dev->map) + return 0; + + ret = i2c_dw_acquire_lock(dev); + if (ret) + return ret; + + reg = readl(dev->base + DW_IC_COMP_TYPE); + i2c_dw_release_lock(dev); + + if ((dev->flags & MODEL_MASK) == MODEL_AMD_NAVI_GPU) + map_cfg.max_register = AMD_UCSI_INTR_REG; + + if (reg == swab32(DW_IC_COMP_TYPE_VALUE)) { + map_cfg.reg_read = dw_reg_read_swab; + map_cfg.reg_write = dw_reg_write_swab; + } else if (reg == (DW_IC_COMP_TYPE_VALUE & 0x0000ffff)) { + map_cfg.reg_read = dw_reg_read_word; + map_cfg.reg_write = dw_reg_write_word; + } else if (reg != DW_IC_COMP_TYPE_VALUE) { + dev_err(dev->dev, + "Unknown Synopsys component type: 0x%08x\n", reg); + return -ENODEV; + } + + /* + * Note we'll check the return value of the regmap IO accessors only + * at the probe stage. The rest of the code won't do this because + * basically we have MMIO-based regmap so non of the read/write methods + * can fail. + */ + dev->map = devm_regmap_init(dev->dev, NULL, dev, &map_cfg); + if (IS_ERR(dev->map)) { + dev_err(dev->dev, "Failed to init the registers map\n"); + return PTR_ERR(dev->map); + } + + return 0; +} + +static const u32 supported_speeds[] = { + I2C_MAX_HIGH_SPEED_MODE_FREQ, + I2C_MAX_FAST_MODE_PLUS_FREQ, + I2C_MAX_FAST_MODE_FREQ, + I2C_MAX_STANDARD_MODE_FREQ, +}; + +static int i2c_dw_validate_speed(struct dw_i2c_dev *dev) +{ + struct i2c_timings *t = &dev->timings; + unsigned int i; + + /* + * Only standard mode at 100kHz, fast mode at 400kHz, + * fast mode plus at 1MHz and high speed mode at 3.4MHz are supported. + */ + for (i = 0; i < ARRAY_SIZE(supported_speeds); i++) { + if (t->bus_freq_hz == supported_speeds[i]) + return 0; + } + + dev_err(dev->dev, + "%d Hz is unsupported, only 100kHz, 400kHz, 1MHz and 3.4MHz are supported\n", + t->bus_freq_hz); + + return -EINVAL; +} + +#ifdef CONFIG_OF + +#include + +#define MSCC_ICPU_CFG_TWI_DELAY 0x0 +#define MSCC_ICPU_CFG_TWI_DELAY_ENABLE BIT(0) +#define MSCC_ICPU_CFG_TWI_SPIKE_FILTER 0x4 + +static int mscc_twi_set_sda_hold_time(struct dw_i2c_dev *dev) +{ + writel((dev->sda_hold_time << 1) | MSCC_ICPU_CFG_TWI_DELAY_ENABLE, + dev->ext + MSCC_ICPU_CFG_TWI_DELAY); + + return 0; +} + +static void i2c_dw_of_configure(struct device *device) +{ + struct platform_device *pdev = to_platform_device(device); + struct dw_i2c_dev *dev = dev_get_drvdata(device); + + switch (dev->flags & MODEL_MASK) { + case MODEL_MSCC_OCELOT: + dev->ext = devm_platform_ioremap_resource(pdev, 1); + if (!IS_ERR(dev->ext)) + dev->set_sda_hold_time = mscc_twi_set_sda_hold_time; + break; + default: + break; + } +} + +#else /* CONFIG_OF */ + +static inline void i2c_dw_of_configure(struct device *device) { } + +#endif /* CONFIG_OF */ + +#ifdef CONFIG_ACPI + +#include + +/* + * The HCNT/LCNT information coming from ACPI should be the most accurate + * for given platform. However, some systems get it wrong. On such systems + * we get better results by calculating those based on the input clock. + */ +static const struct dmi_system_id i2c_dw_no_acpi_params[] = { + { + .ident = "Dell Inspiron 7348", + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), + DMI_MATCH(DMI_PRODUCT_NAME, "Inspiron 7348"), + }, + }, + {} +}; + +static void i2c_dw_acpi_params(struct device *device, char method[], + u16 *hcnt, u16 *lcnt, u32 *sda_hold) +{ + struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER }; + acpi_handle handle = ACPI_HANDLE(device); + union acpi_object *obj; + + if (dmi_check_system(i2c_dw_no_acpi_params)) + return; + + if (ACPI_FAILURE(acpi_evaluate_object(handle, method, NULL, &buf))) + return; + + obj = (union acpi_object *)buf.pointer; + if (obj->type == ACPI_TYPE_PACKAGE && obj->package.count == 3) { + const union acpi_object *objs = obj->package.elements; + + *hcnt = (u16)objs[0].integer.value; + *lcnt = (u16)objs[1].integer.value; + *sda_hold = (u32)objs[2].integer.value; + } + + kfree(buf.pointer); +} + +static void i2c_dw_acpi_configure(struct device *device) +{ + struct dw_i2c_dev *dev = dev_get_drvdata(device); + struct i2c_timings *t = &dev->timings; + u32 ss_ht = 0, fp_ht = 0, hs_ht = 0, fs_ht = 0; + + /* + * Try to get SDA hold time and *CNT values from an ACPI method for + * selected speed modes. + */ + i2c_dw_acpi_params(device, "SSCN", &dev->ss_hcnt, &dev->ss_lcnt, &ss_ht); + i2c_dw_acpi_params(device, "FMCN", &dev->fs_hcnt, &dev->fs_lcnt, &fs_ht); + i2c_dw_acpi_params(device, "FPCN", &dev->fp_hcnt, &dev->fp_lcnt, &fp_ht); + i2c_dw_acpi_params(device, "HSCN", &dev->hs_hcnt, &dev->hs_lcnt, &hs_ht); + + switch (t->bus_freq_hz) { + case I2C_MAX_STANDARD_MODE_FREQ: + dev->sda_hold_time = ss_ht; + break; + case I2C_MAX_FAST_MODE_PLUS_FREQ: + dev->sda_hold_time = fp_ht; + break; + case I2C_MAX_HIGH_SPEED_MODE_FREQ: + dev->sda_hold_time = hs_ht; + break; + case I2C_MAX_FAST_MODE_FREQ: + default: + dev->sda_hold_time = fs_ht; + break; + } +} + +static u32 i2c_dw_acpi_round_bus_speed(struct device *device) +{ + u32 acpi_speed; + int i; + + acpi_speed = i2c_acpi_find_bus_speed(device); + /* + * Some DSTDs use a non standard speed, round down to the lowest + * standard speed. + */ + for (i = 0; i < ARRAY_SIZE(supported_speeds); i++) { + if (acpi_speed >= supported_speeds[i]) + return supported_speeds[i]; + } + + return 0; +} + +#else /* CONFIG_ACPI */ + +static inline void i2c_dw_acpi_configure(struct device *device) { } + +static inline u32 i2c_dw_acpi_round_bus_speed(struct device *device) { return 0; } + +#endif /* CONFIG_ACPI */ + +static void i2c_dw_adjust_bus_speed(struct dw_i2c_dev *dev) +{ + u32 acpi_speed = i2c_dw_acpi_round_bus_speed(dev->dev); + struct i2c_timings *t = &dev->timings; + + /* + * Find bus speed from the "clock-frequency" device property, ACPI + * or by using fast mode if neither is set. + */ + if (acpi_speed && t->bus_freq_hz) + t->bus_freq_hz = min(t->bus_freq_hz, acpi_speed); + else if (acpi_speed || t->bus_freq_hz) + t->bus_freq_hz = max(t->bus_freq_hz, acpi_speed); + else + t->bus_freq_hz = I2C_MAX_FAST_MODE_FREQ; +} + +int i2c_dw_fw_parse_and_configure(struct dw_i2c_dev *dev) +{ + struct i2c_timings *t = &dev->timings; + struct device *device = dev->dev; + struct fwnode_handle *fwnode = dev_fwnode(device); + + i2c_parse_fw_timings(device, t, false); + + i2c_dw_adjust_bus_speed(dev); + + if (is_of_node(fwnode)) + i2c_dw_of_configure(device); + else if (is_acpi_node(fwnode)) + i2c_dw_acpi_configure(device); + + return i2c_dw_validate_speed(dev); +} +EXPORT_SYMBOL_GPL(i2c_dw_fw_parse_and_configure); + +static u32 i2c_dw_read_scl_reg(struct dw_i2c_dev *dev, u32 reg) +{ + u32 val; + int ret; + + ret = i2c_dw_acquire_lock(dev); + if (ret) + return 0; + + ret = regmap_read(dev->map, reg, &val); + i2c_dw_release_lock(dev); + + return ret ? 0 : val; +} + +u32 i2c_dw_scl_hcnt(struct dw_i2c_dev *dev, unsigned int reg, u32 ic_clk, + u32 tSYMBOL, u32 tf, int cond, int offset) +{ + if (!ic_clk) + return i2c_dw_read_scl_reg(dev, reg); + + /* + * DesignWare I2C core doesn't seem to have solid strategy to meet + * the tHD;STA timing spec. Configuring _HCNT based on tHIGH spec + * will result in violation of the tHD;STA spec. + */ + if (cond) + /* + * Conditional expression: + * + * IC_[FS]S_SCL_HCNT + (1+4+3) >= IC_CLK * tHIGH + * + * This is based on the DW manuals, and represents an ideal + * configuration. The resulting I2C bus speed will be + * faster than any of the others. + * + * If your hardware is free from tHD;STA issue, try this one. + */ + return DIV_ROUND_CLOSEST_ULL((u64)ic_clk * tSYMBOL, MICRO) - + 8 + offset; + else + /* + * Conditional expression: + * + * IC_[FS]S_SCL_HCNT + 3 >= IC_CLK * (tHD;STA + tf) + * + * This is just experimental rule; the tHD;STA period turned + * out to be proportinal to (_HCNT + 3). With this setting, + * we could meet both tHIGH and tHD;STA timing specs. + * + * If unsure, you'd better to take this alternative. + * + * The reason why we need to take into account "tf" here, + * is the same as described in i2c_dw_scl_lcnt(). + */ + return DIV_ROUND_CLOSEST_ULL((u64)ic_clk * (tSYMBOL + tf), MICRO) - + 3 + offset; +} + +u32 i2c_dw_scl_lcnt(struct dw_i2c_dev *dev, unsigned int reg, u32 ic_clk, + u32 tLOW, u32 tf, int offset) +{ + if (!ic_clk) + return i2c_dw_read_scl_reg(dev, reg); + + /* + * Conditional expression: + * + * IC_[FS]S_SCL_LCNT + 1 >= IC_CLK * (tLOW + tf) + * + * DW I2C core starts counting the SCL CNTs for the LOW period + * of the SCL clock (tLOW) as soon as it pulls the SCL line. + * In order to meet the tLOW timing spec, we need to take into + * account the fall time of SCL signal (tf). Default tf value + * should be 0.3 us, for safety. + */ + return DIV_ROUND_CLOSEST_ULL((u64)ic_clk * (tLOW + tf), MICRO) - + 1 + offset; +} + +int i2c_dw_set_sda_hold(struct dw_i2c_dev *dev) +{ + unsigned int reg; + int ret; + + ret = i2c_dw_acquire_lock(dev); + if (ret) + return ret; + + /* Configure SDA Hold Time if required */ + ret = regmap_read(dev->map, DW_IC_COMP_VERSION, ®); + if (ret) + goto err_release_lock; + + if (reg >= DW_IC_SDA_HOLD_MIN_VERS) { + if (!dev->sda_hold_time) { + /* Keep previous hold time setting if no one set it */ + ret = regmap_read(dev->map, DW_IC_SDA_HOLD, + &dev->sda_hold_time); + if (ret) + goto err_release_lock; + } + + /* + * Workaround for avoiding TX arbitration lost in case I2C + * slave pulls SDA down "too quickly" after falling edge of + * SCL by enabling non-zero SDA RX hold. Specification says it + * extends incoming SDA low to high transition while SCL is + * high but it appears to help also above issue. + */ + if (!(dev->sda_hold_time & DW_IC_SDA_HOLD_RX_MASK)) + dev->sda_hold_time |= 1 << DW_IC_SDA_HOLD_RX_SHIFT; + + dev_dbg(dev->dev, "SDA Hold Time TX:RX = %d:%d\n", + dev->sda_hold_time & ~(u32)DW_IC_SDA_HOLD_RX_MASK, + dev->sda_hold_time >> DW_IC_SDA_HOLD_RX_SHIFT); + } else if (dev->set_sda_hold_time) { + dev->set_sda_hold_time(dev); + } else if (dev->sda_hold_time) { + dev_warn(dev->dev, + "Hardware too old to adjust SDA hold time.\n"); + dev->sda_hold_time = 0; + } + +err_release_lock: + i2c_dw_release_lock(dev); + + return ret; +} + +void __i2c_dw_disable(struct dw_i2c_dev *dev) +{ + struct i2c_timings *t = &dev->timings; + unsigned int raw_intr_stats, ic_stats; + unsigned int enable; + int timeout = 100; + bool abort_needed; + unsigned int status; + int ret; + + regmap_read(dev->map, DW_IC_RAW_INTR_STAT, &raw_intr_stats); + regmap_read(dev->map, DW_IC_STATUS, &ic_stats); + regmap_read(dev->map, DW_IC_ENABLE, &enable); + + abort_needed = (raw_intr_stats & DW_IC_INTR_MST_ON_HOLD) || + (ic_stats & DW_IC_STATUS_MASTER_HOLD_TX_FIFO_EMPTY); + if (abort_needed) { + if (!(enable & DW_IC_ENABLE_ENABLE)) { + regmap_write(dev->map, DW_IC_ENABLE, DW_IC_ENABLE_ENABLE); + /* + * Wait 10 times the signaling period of the highest I2C + * transfer supported by the driver (for 400KHz this is + * 25us) to ensure the I2C ENABLE bit is already set + * as described in the DesignWare I2C databook. + */ + fsleep(DIV_ROUND_CLOSEST_ULL(10 * MICRO, t->bus_freq_hz)); + /* Set ENABLE bit before setting ABORT */ + enable |= DW_IC_ENABLE_ENABLE; + } + + regmap_write(dev->map, DW_IC_ENABLE, enable | DW_IC_ENABLE_ABORT); + ret = regmap_read_poll_timeout(dev->map, DW_IC_ENABLE, enable, + !(enable & DW_IC_ENABLE_ABORT), 10, + 100); + if (ret) + dev_err(dev->dev, "timeout while trying to abort current transfer\n"); + } + + do { + __i2c_dw_disable_nowait(dev); + /* + * The enable status register may be unimplemented, but + * in that case this test reads zero and exits the loop. + */ + regmap_read(dev->map, DW_IC_ENABLE_STATUS, &status); + if ((status & 1) == 0) + return; + + /* + * Wait 10 times the signaling period of the highest I2C + * transfer supported by the driver (for 400KHz this is + * 25us) as described in the DesignWare I2C databook. + */ + usleep_range(25, 250); + } while (timeout--); + + dev_warn(dev->dev, "timeout in disabling adapter\n"); +} + +u32 i2c_dw_clk_rate(struct dw_i2c_dev *dev) +{ + /* + * Clock is not necessary if we got LCNT/HCNT values directly from + * the platform code. + */ + if (WARN_ON_ONCE(!dev->get_clk_rate_khz)) + return 0; + return dev->get_clk_rate_khz(dev); +} + +int i2c_dw_prepare_clk(struct dw_i2c_dev *dev, bool prepare) +{ + int ret; + + if (prepare) { + /* Optional interface clock */ + ret = clk_prepare_enable(dev->pclk); + if (ret) + return ret; + + ret = clk_prepare_enable(dev->clk); + if (ret) + clk_disable_unprepare(dev->pclk); + + return ret; + } + + clk_disable_unprepare(dev->clk); + clk_disable_unprepare(dev->pclk); + + return 0; +} +EXPORT_SYMBOL_GPL(i2c_dw_prepare_clk); + +int i2c_dw_acquire_lock(struct dw_i2c_dev *dev) +{ + int ret; + + if (!dev->acquire_lock) + return 0; + + ret = dev->acquire_lock(); + if (!ret) + return 0; + + dev_err(dev->dev, "couldn't acquire bus ownership\n"); + + return ret; +} + +void i2c_dw_release_lock(struct dw_i2c_dev *dev) +{ + if (dev->release_lock) + dev->release_lock(); +} + +/* + * Waiting for bus not busy + */ +int i2c_dw_wait_bus_not_busy(struct dw_i2c_dev *dev) +{ + unsigned int status; + int ret; + + ret = regmap_read_poll_timeout(dev->map, DW_IC_STATUS, status, + !(status & DW_IC_STATUS_ACTIVITY), + 1100, 20000); + if (ret) { + dev_warn(dev->dev, "timeout waiting for bus ready\n"); + + i2c_recover_bus(&dev->adapter); + + regmap_read(dev->map, DW_IC_STATUS, &status); + if (!(status & DW_IC_STATUS_ACTIVITY)) + ret = 0; + } + + return ret; +} + +int i2c_dw_handle_tx_abort(struct dw_i2c_dev *dev) +{ + unsigned long abort_source = dev->abort_source; + int i; + + if (abort_source & DW_IC_TX_ABRT_NOACK) { + for_each_set_bit(i, &abort_source, ARRAY_SIZE(abort_sources)) + dev_dbg(dev->dev, + "%s: %s\n", __func__, abort_sources[i]); + return -EREMOTEIO; + } + + for_each_set_bit(i, &abort_source, ARRAY_SIZE(abort_sources)) + dev_err(dev->dev, "%s: %s\n", __func__, abort_sources[i]); + + if (abort_source & DW_IC_TX_ARB_LOST) + return -EAGAIN; + else if (abort_source & DW_IC_TX_ABRT_GCALL_READ) + return -EINVAL; /* wrong msgs[] data */ + else + return -EIO; +} + +int i2c_dw_set_fifo_size(struct dw_i2c_dev *dev) +{ + u32 tx_fifo_depth, rx_fifo_depth; + unsigned int param; + int ret; + + /* DW_IC_COMP_PARAM_1 not implement for IP issue */ + if ((dev->flags & MODEL_MASK) == MODEL_WANGXUN_SP) { + dev->tx_fifo_depth = TXGBE_TX_FIFO_DEPTH; + dev->rx_fifo_depth = TXGBE_RX_FIFO_DEPTH; + + return 0; + } + + /* + * Try to detect the FIFO depth if not set by interface driver, + * the depth could be from 2 to 256 from HW spec. + */ + ret = i2c_dw_acquire_lock(dev); + if (ret) + return ret; + + ret = regmap_read(dev->map, DW_IC_COMP_PARAM_1, ¶m); + i2c_dw_release_lock(dev); + if (ret) + return ret; + + tx_fifo_depth = ((param >> 16) & 0xff) + 1; + rx_fifo_depth = ((param >> 8) & 0xff) + 1; + if (!dev->tx_fifo_depth) { + dev->tx_fifo_depth = tx_fifo_depth; + dev->rx_fifo_depth = rx_fifo_depth; + } else if (tx_fifo_depth >= 2) { + dev->tx_fifo_depth = min_t(u32, dev->tx_fifo_depth, + tx_fifo_depth); + dev->rx_fifo_depth = min_t(u32, dev->rx_fifo_depth, + rx_fifo_depth); + } + + return 0; +} + +u32 i2c_dw_func(struct i2c_adapter *adap) +{ + struct dw_i2c_dev *dev = i2c_get_adapdata(adap); + + return dev->functionality; +} + +void i2c_dw_disable(struct dw_i2c_dev *dev) +{ + unsigned int dummy; + int ret; + + ret = i2c_dw_acquire_lock(dev); + if (ret) + return; + + /* Disable controller */ + __i2c_dw_disable(dev); + + /* Disable all interrupts */ + __i2c_dw_write_intr_mask(dev, 0); + regmap_read(dev->map, DW_IC_CLR_INTR, &dummy); + + i2c_dw_release_lock(dev); +} +EXPORT_SYMBOL_GPL(i2c_dw_disable); + +int i2c_dw_probe(struct dw_i2c_dev *dev) +{ + device_set_node(&dev->adapter.dev, dev_fwnode(dev->dev)); + + switch (dev->mode) { + case DW_IC_SLAVE: + return i2c_dw_probe_slave(dev); + case DW_IC_MASTER: + return i2c_dw_probe_master(dev); + default: + dev_err(dev->dev, "Wrong operation mode: %d\n", dev->mode); + return -EINVAL; + } +} +EXPORT_SYMBOL_GPL(i2c_dw_probe); + +static int i2c_dw_prepare(struct device *device) +{ + /* + * If the ACPI companion device object is present for this device, + * it may be accessed during suspend and resume of other devices via + * I2C operation regions, so tell the PM core and middle layers to + * avoid skipping system suspend/resume callbacks for it in that case. + */ + return !has_acpi_companion(device); +} + +static int i2c_dw_runtime_suspend(struct device *device) +{ + struct dw_i2c_dev *dev = dev_get_drvdata(device); + + if (dev->shared_with_punit) + return 0; + + i2c_dw_disable(dev); + i2c_dw_prepare_clk(dev, false); + + return 0; +} + +static int i2c_dw_suspend(struct device *device) +{ + struct dw_i2c_dev *dev = dev_get_drvdata(device); + + i2c_mark_adapter_suspended(&dev->adapter); + + return i2c_dw_runtime_suspend(device); +} + +static int i2c_dw_runtime_resume(struct device *device) +{ + struct dw_i2c_dev *dev = dev_get_drvdata(device); + + if (!dev->shared_with_punit) + i2c_dw_prepare_clk(dev, true); + + dev->init(dev); + + return 0; +} + +static int i2c_dw_resume(struct device *device) +{ + struct dw_i2c_dev *dev = dev_get_drvdata(device); + + i2c_dw_runtime_resume(device); + i2c_mark_adapter_resumed(&dev->adapter); + + return 0; +} + +EXPORT_GPL_DEV_PM_OPS(i2c_dw_dev_pm_ops) = { + .prepare = pm_sleep_ptr(i2c_dw_prepare), + LATE_SYSTEM_SLEEP_PM_OPS(i2c_dw_suspend, i2c_dw_resume) + RUNTIME_PM_OPS(i2c_dw_runtime_suspend, i2c_dw_runtime_resume, NULL) +}; + +MODULE_DESCRIPTION("Synopsys DesignWare I2C bus adapter core"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/i2c-designware/i2c-designware-core.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/i2c-designware/i2c-designware-core.h new file mode 100644 index 00000000000..2d32896d067 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/i2c-designware/i2c-designware-core.h @@ -0,0 +1,409 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * Synopsys DesignWare I2C adapter driver. + * + * Based on the TI DAVINCI I2C adapter driver. + * + * Copyright (C) 2006 Texas Instruments. + * Copyright (C) 2007 MontaVista Software Inc. + * Copyright (C) 2009 Provigent Ltd. + */ + +#include +#include +#include +#include +#include +#include +#include + +#define DW_IC_DEFAULT_FUNCTIONALITY (I2C_FUNC_I2C | \ + I2C_FUNC_SMBUS_BYTE | \ + I2C_FUNC_SMBUS_BYTE_DATA | \ + I2C_FUNC_SMBUS_WORD_DATA | \ + I2C_FUNC_SMBUS_BLOCK_DATA | \ + I2C_FUNC_SMBUS_I2C_BLOCK) + +#define DW_IC_CON_MASTER BIT(0) +#define DW_IC_CON_SPEED_STD (1 << 1) +#define DW_IC_CON_SPEED_FAST (2 << 1) +#define DW_IC_CON_SPEED_HIGH (3 << 1) +#define DW_IC_CON_SPEED_MASK GENMASK(2, 1) +#define DW_IC_CON_10BITADDR_SLAVE BIT(3) +#define DW_IC_CON_10BITADDR_MASTER BIT(4) +#define DW_IC_CON_RESTART_EN BIT(5) +#define DW_IC_CON_SLAVE_DISABLE BIT(6) +#define DW_IC_CON_STOP_DET_IFADDRESSED BIT(7) +#define DW_IC_CON_TX_EMPTY_CTRL BIT(8) +#define DW_IC_CON_RX_FIFO_FULL_HLD_CTRL BIT(9) +#define DW_IC_CON_BUS_CLEAR_CTRL BIT(11) + +#define DW_IC_DATA_CMD_DAT GENMASK(7, 0) +#define DW_IC_DATA_CMD_FIRST_DATA_BYTE BIT(11) + +/* + * Registers offset + */ +#define DW_IC_CON 0x00 +#define DW_IC_TAR 0x04 +#define DW_IC_SAR 0x08 +#define DW_IC_DATA_CMD 0x10 +#define DW_IC_SS_SCL_HCNT 0x14 +#define DW_IC_SS_SCL_LCNT 0x18 +#define DW_IC_FS_SCL_HCNT 0x1c +#define DW_IC_FS_SCL_LCNT 0x20 +#define DW_IC_HS_SCL_HCNT 0x24 +#define DW_IC_HS_SCL_LCNT 0x28 +#define DW_IC_INTR_STAT 0x2c +#define DW_IC_INTR_MASK 0x30 +#define DW_IC_RAW_INTR_STAT 0x34 +#define DW_IC_RX_TL 0x38 +#define DW_IC_TX_TL 0x3c +#define DW_IC_CLR_INTR 0x40 +#define DW_IC_CLR_RX_UNDER 0x44 +#define DW_IC_CLR_RX_OVER 0x48 +#define DW_IC_CLR_TX_OVER 0x4c +#define DW_IC_CLR_RD_REQ 0x50 +#define DW_IC_CLR_TX_ABRT 0x54 +#define DW_IC_CLR_RX_DONE 0x58 +#define DW_IC_CLR_ACTIVITY 0x5c +#define DW_IC_CLR_STOP_DET 0x60 +#define DW_IC_CLR_START_DET 0x64 +#define DW_IC_CLR_GEN_CALL 0x68 +#define DW_IC_ENABLE 0x6c +#define DW_IC_STATUS 0x70 +#define DW_IC_TXFLR 0x74 +#define DW_IC_RXFLR 0x78 +#define DW_IC_SDA_HOLD 0x7c +#define DW_IC_TX_ABRT_SOURCE 0x80 +#define DW_IC_ENABLE_STATUS 0x9c +#define DW_IC_CLR_RESTART_DET 0xa8 +#define DW_IC_COMP_PARAM_1 0xf4 +#define DW_IC_COMP_VERSION 0xf8 +#define DW_IC_SDA_HOLD_MIN_VERS 0x3131312A /* "111*" == v1.11* */ +#define DW_IC_COMP_TYPE 0xfc +#define DW_IC_COMP_TYPE_VALUE 0x44570140 /* "DW" + 0x0140 */ + +#define DW_IC_INTR_RX_UNDER BIT(0) +#define DW_IC_INTR_RX_OVER BIT(1) +#define DW_IC_INTR_RX_FULL BIT(2) +#define DW_IC_INTR_TX_OVER BIT(3) +#define DW_IC_INTR_TX_EMPTY BIT(4) +#define DW_IC_INTR_RD_REQ BIT(5) +#define DW_IC_INTR_TX_ABRT BIT(6) +#define DW_IC_INTR_RX_DONE BIT(7) +#define DW_IC_INTR_ACTIVITY BIT(8) +#define DW_IC_INTR_STOP_DET BIT(9) +#define DW_IC_INTR_START_DET BIT(10) +#define DW_IC_INTR_GEN_CALL BIT(11) +#define DW_IC_INTR_RESTART_DET BIT(12) +#define DW_IC_INTR_MST_ON_HOLD BIT(13) + +#define DW_IC_INTR_DEFAULT_MASK (DW_IC_INTR_RX_FULL | \ + DW_IC_INTR_TX_ABRT | \ + DW_IC_INTR_STOP_DET) +#define DW_IC_INTR_MASTER_MASK (DW_IC_INTR_DEFAULT_MASK | \ + DW_IC_INTR_TX_EMPTY) +#define DW_IC_INTR_SLAVE_MASK (DW_IC_INTR_DEFAULT_MASK | \ + DW_IC_INTR_RX_UNDER | \ + DW_IC_INTR_RD_REQ) + +#define DW_IC_ENABLE_ENABLE BIT(0) +#define DW_IC_ENABLE_ABORT BIT(1) + +#define DW_IC_STATUS_ACTIVITY BIT(0) +#define DW_IC_STATUS_TFE BIT(2) +#define DW_IC_STATUS_RFNE BIT(3) +#define DW_IC_STATUS_MASTER_ACTIVITY BIT(5) +#define DW_IC_STATUS_SLAVE_ACTIVITY BIT(6) +#define DW_IC_STATUS_MASTER_HOLD_TX_FIFO_EMPTY BIT(7) + +#define DW_IC_SDA_HOLD_RX_SHIFT 16 +#define DW_IC_SDA_HOLD_RX_MASK GENMASK(23, 16) + +#define DW_IC_ERR_TX_ABRT 0x1 + +#define DW_IC_TAR_10BITADDR_MASTER BIT(12) + +#define DW_IC_COMP_PARAM_1_SPEED_MODE_HIGH (BIT(2) | BIT(3)) +#define DW_IC_COMP_PARAM_1_SPEED_MODE_MASK GENMASK(3, 2) + +/* + * Sofware status flags + */ +#define STATUS_ACTIVE BIT(0) +#define STATUS_WRITE_IN_PROGRESS BIT(1) +#define STATUS_READ_IN_PROGRESS BIT(2) +#define STATUS_MASK GENMASK(2, 0) + +/* + * operation modes + */ +#define DW_IC_MASTER 0 +#define DW_IC_SLAVE 1 + +/* + * Hardware abort codes from the DW_IC_TX_ABRT_SOURCE register + * + * Only expected abort codes are listed here + * refer to the datasheet for the full list + */ +#define ABRT_7B_ADDR_NOACK 0 +#define ABRT_10ADDR1_NOACK 1 +#define ABRT_10ADDR2_NOACK 2 +#define ABRT_TXDATA_NOACK 3 +#define ABRT_GCALL_NOACK 4 +#define ABRT_GCALL_READ 5 +#define ABRT_SBYTE_ACKDET 7 +#define ABRT_SBYTE_NORSTRT 9 +#define ABRT_10B_RD_NORSTRT 10 +#define ABRT_MASTER_DIS 11 +#define ARB_LOST 12 +#define ABRT_SLAVE_FLUSH_TXFIFO 13 +#define ABRT_SLAVE_ARBLOST 14 +#define ABRT_SLAVE_RD_INTX 15 + +#define DW_IC_TX_ABRT_7B_ADDR_NOACK BIT(ABRT_7B_ADDR_NOACK) +#define DW_IC_TX_ABRT_10ADDR1_NOACK BIT(ABRT_10ADDR1_NOACK) +#define DW_IC_TX_ABRT_10ADDR2_NOACK BIT(ABRT_10ADDR2_NOACK) +#define DW_IC_TX_ABRT_TXDATA_NOACK BIT(ABRT_TXDATA_NOACK) +#define DW_IC_TX_ABRT_GCALL_NOACK BIT(ABRT_GCALL_NOACK) +#define DW_IC_TX_ABRT_GCALL_READ BIT(ABRT_GCALL_READ) +#define DW_IC_TX_ABRT_SBYTE_ACKDET BIT(ABRT_SBYTE_ACKDET) +#define DW_IC_TX_ABRT_SBYTE_NORSTRT BIT(ABRT_SBYTE_NORSTRT) +#define DW_IC_TX_ABRT_10B_RD_NORSTRT BIT(ABRT_10B_RD_NORSTRT) +#define DW_IC_TX_ABRT_MASTER_DIS BIT(ABRT_MASTER_DIS) +#define DW_IC_TX_ARB_LOST BIT(ARB_LOST) +#define DW_IC_RX_ABRT_SLAVE_RD_INTX BIT(ABRT_SLAVE_RD_INTX) +#define DW_IC_RX_ABRT_SLAVE_ARBLOST BIT(ABRT_SLAVE_ARBLOST) +#define DW_IC_RX_ABRT_SLAVE_FLUSH_TXFIFO BIT(ABRT_SLAVE_FLUSH_TXFIFO) + +#define DW_IC_TX_ABRT_NOACK (DW_IC_TX_ABRT_7B_ADDR_NOACK | \ + DW_IC_TX_ABRT_10ADDR1_NOACK | \ + DW_IC_TX_ABRT_10ADDR2_NOACK | \ + DW_IC_TX_ABRT_TXDATA_NOACK | \ + DW_IC_TX_ABRT_GCALL_NOACK) + +struct clk; +struct device; +struct reset_control; + +/** + * struct dw_i2c_dev - private i2c-designware data + * @dev: driver model device node + * @map: IO registers map + * @sysmap: System controller registers map + * @base: IO registers pointer + * @ext: Extended IO registers pointer + * @cmd_complete: tx completion indicator + * @clk: input reference clock + * @pclk: clock required to access the registers + * @rst: optional reset for the controller + * @slave: represent an I2C slave device + * @get_clk_rate_khz: callback to retrieve IP specific bus speed + * @cmd_err: run time hadware error code + * @msgs: points to an array of messages currently being transferred + * @msgs_num: the number of elements in msgs + * @msg_write_idx: the element index of the current tx message in the msgs array + * @tx_buf_len: the length of the current tx buffer + * @tx_buf: the current tx buffer + * @msg_read_idx: the element index of the current rx message in the msgs array + * @rx_buf_len: the length of the current rx buffer + * @rx_buf: the current rx buffer + * @msg_err: error status of the current transfer + * @status: i2c master status, one of STATUS_* + * @abort_source: copy of the TX_ABRT_SOURCE register + * @sw_mask: SW mask of DW_IC_INTR_MASK used in polling mode + * @irq: interrupt number for the i2c master + * @flags: platform specific flags like type of IO accessors or model + * @adapter: i2c subsystem adapter node + * @functionality: I2C_FUNC_* ORed bits to reflect what controller does support + * @master_cfg: configuration for the master device + * @slave_cfg: configuration for the slave device + * @tx_fifo_depth: depth of the hardware tx fifo + * @rx_fifo_depth: depth of the hardware rx fifo + * @rx_outstanding: current master-rx elements in tx fifo + * @timings: bus clock frequency, SDA hold and other timings + * @sda_hold_time: SDA hold value + * @ss_hcnt: standard speed HCNT value + * @ss_lcnt: standard speed LCNT value + * @fs_hcnt: fast speed HCNT value + * @fs_lcnt: fast speed LCNT value + * @fp_hcnt: fast plus HCNT value + * @fp_lcnt: fast plus LCNT value + * @hs_hcnt: high speed HCNT value + * @hs_lcnt: high speed LCNT value + * @acquire_lock: function to acquire a hardware lock on the bus + * @release_lock: function to release a hardware lock on the bus + * @semaphore_idx: Index of table with semaphore type attached to the bus. It's + * -1 if there is no semaphore. + * @shared_with_punit: true if this bus is shared with the SoCs PUNIT + * @init: function to initialize the I2C hardware + * @set_sda_hold_time: callback to retrieve IP specific SDA hold timing + * @mode: operation mode - DW_IC_MASTER or DW_IC_SLAVE + * @rinfo: I²C GPIO recovery information + * + * HCNT and LCNT parameters can be used if the platform knows more accurate + * values than the one computed based only on the input clock frequency. + * Leave them to be %0 if not used. + */ +struct dw_i2c_dev { + struct device *dev; + struct regmap *map; + struct regmap *sysmap; + void __iomem *base; + void __iomem *ext; + struct completion cmd_complete; + struct clk *clk; + struct clk *pclk; + struct reset_control *rst; + struct i2c_client *slave; + u32 (*get_clk_rate_khz) (struct dw_i2c_dev *dev); + int cmd_err; + struct i2c_msg *msgs; + int msgs_num; + int msg_write_idx; + u32 tx_buf_len; + u8 *tx_buf; + int msg_read_idx; + u32 rx_buf_len; + u8 *rx_buf; + int msg_err; + unsigned int status; + unsigned int abort_source; + unsigned int sw_mask; + int irq; + u32 flags; + struct i2c_adapter adapter; + u32 functionality; + u32 master_cfg; + u32 slave_cfg; + unsigned int tx_fifo_depth; + unsigned int rx_fifo_depth; + int rx_outstanding; + struct i2c_timings timings; + u32 sda_hold_time; + u16 ss_hcnt; + u16 ss_lcnt; + u16 fs_hcnt; + u16 fs_lcnt; + u16 fp_hcnt; + u16 fp_lcnt; + u16 hs_hcnt; + u16 hs_lcnt; + int (*acquire_lock)(void); + void (*release_lock)(void); + int semaphore_idx; + bool shared_with_punit; + int (*init)(struct dw_i2c_dev *dev); + int (*set_sda_hold_time)(struct dw_i2c_dev *dev); + int mode; + struct i2c_bus_recovery_info rinfo; +}; + +#define ACCESS_INTR_MASK BIT(0) +#define ACCESS_NO_IRQ_SUSPEND BIT(1) +#define ARBITRATION_SEMAPHORE BIT(2) +#define ACCESS_POLLING BIT(3) + +#define MODEL_MSCC_OCELOT BIT(8) +#define MODEL_BAIKAL_BT1 BIT(9) +#define MODEL_AMD_NAVI_GPU BIT(10) +#define MODEL_WANGXUN_SP BIT(11) +#define MODEL_MASK GENMASK(11, 8) + +/* + * Enable UCSI interrupt by writing 0xd at register + * offset 0x474 specified in hardware specification. + */ +#define AMD_UCSI_INTR_REG 0x474 +#define AMD_UCSI_INTR_EN 0xd + +#define TXGBE_TX_FIFO_DEPTH 4 +#define TXGBE_RX_FIFO_DEPTH 1 + +struct i2c_dw_semaphore_callbacks { + int (*probe)(struct dw_i2c_dev *dev); + void (*remove)(struct dw_i2c_dev *dev); +}; + +int i2c_dw_init_regmap(struct dw_i2c_dev *dev); +u32 i2c_dw_scl_hcnt(struct dw_i2c_dev *dev, unsigned int reg, u32 ic_clk, + u32 tSYMBOL, u32 tf, int cond, int offset); +u32 i2c_dw_scl_lcnt(struct dw_i2c_dev *dev, unsigned int reg, u32 ic_clk, + u32 tLOW, u32 tf, int offset); +int i2c_dw_set_sda_hold(struct dw_i2c_dev *dev); +u32 i2c_dw_clk_rate(struct dw_i2c_dev *dev); +int i2c_dw_prepare_clk(struct dw_i2c_dev *dev, bool prepare); +int i2c_dw_acquire_lock(struct dw_i2c_dev *dev); +void i2c_dw_release_lock(struct dw_i2c_dev *dev); +int i2c_dw_wait_bus_not_busy(struct dw_i2c_dev *dev); +int i2c_dw_handle_tx_abort(struct dw_i2c_dev *dev); +int i2c_dw_set_fifo_size(struct dw_i2c_dev *dev); +u32 i2c_dw_func(struct i2c_adapter *adap); + +extern const struct dev_pm_ops i2c_dw_dev_pm_ops; + +static inline void __i2c_dw_enable(struct dw_i2c_dev *dev) +{ + dev->status |= STATUS_ACTIVE; + regmap_write(dev->map, DW_IC_ENABLE, 1); +} + +static inline void __i2c_dw_disable_nowait(struct dw_i2c_dev *dev) +{ + regmap_write(dev->map, DW_IC_ENABLE, 0); + dev->status &= ~STATUS_ACTIVE; +} + +static inline void __i2c_dw_write_intr_mask(struct dw_i2c_dev *dev, + unsigned int intr_mask) +{ + unsigned int val = dev->flags & ACCESS_POLLING ? 0 : intr_mask; + + regmap_write(dev->map, DW_IC_INTR_MASK, val); + dev->sw_mask = intr_mask; +} + +static inline void __i2c_dw_read_intr_mask(struct dw_i2c_dev *dev, + unsigned int *intr_mask) +{ + if (!(dev->flags & ACCESS_POLLING)) + regmap_read(dev->map, DW_IC_INTR_MASK, intr_mask); + else + *intr_mask = dev->sw_mask; +} + +void __i2c_dw_disable(struct dw_i2c_dev *dev); +void i2c_dw_disable(struct dw_i2c_dev *dev); + +extern void i2c_dw_configure_master(struct dw_i2c_dev *dev); +extern int i2c_dw_probe_master(struct dw_i2c_dev *dev); + +#if IS_ENABLED(CONFIG_I2C_DESIGNWARE_SLAVE) +extern void i2c_dw_configure_slave(struct dw_i2c_dev *dev); +extern int i2c_dw_probe_slave(struct dw_i2c_dev *dev); +#else +static inline void i2c_dw_configure_slave(struct dw_i2c_dev *dev) { } +static inline int i2c_dw_probe_slave(struct dw_i2c_dev *dev) { return -EINVAL; } +#endif + +static inline void i2c_dw_configure(struct dw_i2c_dev *dev) +{ + if (i2c_detect_slave_mode(dev->dev)) + i2c_dw_configure_slave(dev); + else + i2c_dw_configure_master(dev); +} + +int i2c_dw_probe(struct dw_i2c_dev *dev); + +#if IS_ENABLED(CONFIG_I2C_DESIGNWARE_BAYTRAIL) +int i2c_dw_baytrail_probe_lock_support(struct dw_i2c_dev *dev); +#endif + +#if IS_ENABLED(CONFIG_I2C_DESIGNWARE_AMDPSP) +int i2c_dw_amdpsp_probe_lock_support(struct dw_i2c_dev *dev); +#endif + +int i2c_dw_fw_parse_and_configure(struct dw_i2c_dev *dev); diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/i2c-designware/i2c-designware-master.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/i2c-designware/i2c-designware-master.c new file mode 100644 index 00000000000..52dc666c3ef --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/i2c-designware/i2c-designware-master.c @@ -0,0 +1,1081 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Synopsys DesignWare I2C adapter driver (master only). + * + * Based on the TI DAVINCI I2C adapter driver. + * + * Copyright (C) 2006 Texas Instruments. + * Copyright (C) 2007 MontaVista Software Inc. + * Copyright (C) 2009 Provigent Ltd. + */ + +#define DEFAULT_SYMBOL_NAMESPACE "I2C_DW" + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "i2c-designware-core.h" + +#define AMD_TIMEOUT_MIN_US 25 +#define AMD_TIMEOUT_MAX_US 250 +#define AMD_MASTERCFG_MASK GENMASK(15, 0) + +static void i2c_dw_configure_fifo_master(struct dw_i2c_dev *dev) +{ + /* Configure Tx/Rx FIFO threshold levels */ + regmap_write(dev->map, DW_IC_TX_TL, dev->tx_fifo_depth / 2); + regmap_write(dev->map, DW_IC_RX_TL, 0); + + /* Configure the I2C master */ + regmap_write(dev->map, DW_IC_CON, dev->master_cfg); +} + +static int i2c_dw_set_timings_master(struct dw_i2c_dev *dev) +{ + unsigned int comp_param1; + u32 sda_falling_time, scl_falling_time; + struct i2c_timings *t = &dev->timings; + const char *fp_str = ""; + u32 ic_clk; + int ret; + + ret = i2c_dw_acquire_lock(dev); + if (ret) + return ret; + + ret = regmap_read(dev->map, DW_IC_COMP_PARAM_1, &comp_param1); + i2c_dw_release_lock(dev); + if (ret) + return ret; + + /* Set standard and fast speed dividers for high/low periods */ + sda_falling_time = t->sda_fall_ns ?: 300; /* ns */ + scl_falling_time = t->scl_fall_ns ?: 300; /* ns */ + + /* Calculate SCL timing parameters for standard mode if not set */ + if (!dev->ss_hcnt || !dev->ss_lcnt) { + ic_clk = i2c_dw_clk_rate(dev); + dev->ss_hcnt = + i2c_dw_scl_hcnt(dev, + DW_IC_SS_SCL_HCNT, + ic_clk, + 4000, /* tHD;STA = tHIGH = 4.0 us */ + sda_falling_time, + 0, /* 0: DW default, 1: Ideal */ + 0); /* No offset */ + dev->ss_lcnt = + i2c_dw_scl_lcnt(dev, + DW_IC_SS_SCL_LCNT, + ic_clk, + 4700, /* tLOW = 4.7 us */ + scl_falling_time, + 0); /* No offset */ + } + dev_dbg(dev->dev, "Standard Mode HCNT:LCNT = %d:%d\n", + dev->ss_hcnt, dev->ss_lcnt); + + /* + * Set SCL timing parameters for fast mode or fast mode plus. Only + * difference is the timing parameter values since the registers are + * the same. + */ + if (t->bus_freq_hz == I2C_MAX_FAST_MODE_PLUS_FREQ) { + /* + * Check are Fast Mode Plus parameters available. Calculate + * SCL timing parameters for Fast Mode Plus if not set. + */ + if (dev->fp_hcnt && dev->fp_lcnt) { + dev->fs_hcnt = dev->fp_hcnt; + dev->fs_lcnt = dev->fp_lcnt; + } else { + ic_clk = i2c_dw_clk_rate(dev); + dev->fs_hcnt = + i2c_dw_scl_hcnt(dev, + DW_IC_FS_SCL_HCNT, + ic_clk, + 260, /* tHIGH = 260 ns */ + sda_falling_time, + 0, /* DW default */ + 0); /* No offset */ + dev->fs_lcnt = + i2c_dw_scl_lcnt(dev, + DW_IC_FS_SCL_LCNT, + ic_clk, + 500, /* tLOW = 500 ns */ + scl_falling_time, + 0); /* No offset */ + } + fp_str = " Plus"; + } + /* + * Calculate SCL timing parameters for fast mode if not set. They are + * needed also in high speed mode. + */ + if (!dev->fs_hcnt || !dev->fs_lcnt) { + ic_clk = i2c_dw_clk_rate(dev); + dev->fs_hcnt = + i2c_dw_scl_hcnt(dev, + DW_IC_FS_SCL_HCNT, + ic_clk, + 600, /* tHD;STA = tHIGH = 0.6 us */ + sda_falling_time, + 0, /* 0: DW default, 1: Ideal */ + 0); /* No offset */ + dev->fs_lcnt = + i2c_dw_scl_lcnt(dev, + DW_IC_FS_SCL_LCNT, + ic_clk, + 1300, /* tLOW = 1.3 us */ + scl_falling_time, + 0); /* No offset */ + } + dev_dbg(dev->dev, "Fast Mode%s HCNT:LCNT = %d:%d\n", + fp_str, dev->fs_hcnt, dev->fs_lcnt); + + /* Check is high speed possible and fall back to fast mode if not */ + if ((dev->master_cfg & DW_IC_CON_SPEED_MASK) == + DW_IC_CON_SPEED_HIGH) { + if ((comp_param1 & DW_IC_COMP_PARAM_1_SPEED_MODE_MASK) + != DW_IC_COMP_PARAM_1_SPEED_MODE_HIGH) { + dev_err(dev->dev, "High Speed not supported!\n"); + t->bus_freq_hz = I2C_MAX_FAST_MODE_FREQ; + dev->master_cfg &= ~DW_IC_CON_SPEED_MASK; + dev->master_cfg |= DW_IC_CON_SPEED_FAST; + dev->hs_hcnt = 0; + dev->hs_lcnt = 0; + } else if (!dev->hs_hcnt || !dev->hs_lcnt) { + ic_clk = i2c_dw_clk_rate(dev); + dev->hs_hcnt = + i2c_dw_scl_hcnt(dev, + DW_IC_HS_SCL_HCNT, + ic_clk, + 160, /* tHIGH = 160 ns */ + sda_falling_time, + 0, /* DW default */ + 0); /* No offset */ + dev->hs_lcnt = + i2c_dw_scl_lcnt(dev, + DW_IC_HS_SCL_LCNT, + ic_clk, + 320, /* tLOW = 320 ns */ + scl_falling_time, + 0); /* No offset */ + } + dev_dbg(dev->dev, "High Speed Mode HCNT:LCNT = %d:%d\n", + dev->hs_hcnt, dev->hs_lcnt); + } + + ret = i2c_dw_set_sda_hold(dev); + if (ret) + return ret; + + dev_dbg(dev->dev, "Bus speed: %s\n", i2c_freq_mode_string(t->bus_freq_hz)); + return 0; +} + +/** + * i2c_dw_init_master() - Initialize the designware I2C master hardware + * @dev: device private data + * + * This functions configures and enables the I2C master. + * This function is called during I2C init function, and in case of timeout at + * run time. + */ +static int i2c_dw_init_master(struct dw_i2c_dev *dev) +{ + int ret; + + ret = i2c_dw_acquire_lock(dev); + if (ret) + return ret; + + /* Disable the adapter */ + __i2c_dw_disable(dev); + + /* Write standard speed timing parameters */ + regmap_write(dev->map, DW_IC_SS_SCL_HCNT, dev->ss_hcnt); + regmap_write(dev->map, DW_IC_SS_SCL_LCNT, dev->ss_lcnt); + + /* Write fast mode/fast mode plus timing parameters */ + regmap_write(dev->map, DW_IC_FS_SCL_HCNT, dev->fs_hcnt); + regmap_write(dev->map, DW_IC_FS_SCL_LCNT, dev->fs_lcnt); + + /* Write high speed timing parameters if supported */ + if (dev->hs_hcnt && dev->hs_lcnt) { + regmap_write(dev->map, DW_IC_HS_SCL_HCNT, dev->hs_hcnt); + regmap_write(dev->map, DW_IC_HS_SCL_LCNT, dev->hs_lcnt); + } + + /* Write SDA hold time if supported */ + if (dev->sda_hold_time) + regmap_write(dev->map, DW_IC_SDA_HOLD, dev->sda_hold_time); + + i2c_dw_configure_fifo_master(dev); + i2c_dw_release_lock(dev); + + return 0; +} + +static void i2c_dw_xfer_init(struct dw_i2c_dev *dev) +{ + struct i2c_msg *msgs = dev->msgs; + u32 ic_con = 0, ic_tar = 0; + unsigned int dummy; + + /* Disable the adapter */ + __i2c_dw_disable(dev); + + /* If the slave address is ten bit address, enable 10BITADDR */ + if (msgs[dev->msg_write_idx].flags & I2C_M_TEN) { + ic_con = DW_IC_CON_10BITADDR_MASTER; + /* + * If I2C_DYNAMIC_TAR_UPDATE is set, the 10-bit addressing + * mode has to be enabled via bit 12 of IC_TAR register. + * We set it always as I2C_DYNAMIC_TAR_UPDATE can't be + * detected from registers. + */ + ic_tar = DW_IC_TAR_10BITADDR_MASTER; + } + + regmap_update_bits(dev->map, DW_IC_CON, DW_IC_CON_10BITADDR_MASTER, + ic_con); + + /* + * Set the slave (target) address and enable 10-bit addressing mode + * if applicable. + */ + regmap_write(dev->map, DW_IC_TAR, + msgs[dev->msg_write_idx].addr | ic_tar); + + /* Enforce disabled interrupts (due to HW issues) */ + __i2c_dw_write_intr_mask(dev, 0); + + /* Enable the adapter */ + __i2c_dw_enable(dev); + + /* Dummy read to avoid the register getting stuck on Bay Trail */ + regmap_read(dev->map, DW_IC_ENABLE_STATUS, &dummy); + + /* Clear and enable interrupts */ + regmap_read(dev->map, DW_IC_CLR_INTR, &dummy); + __i2c_dw_write_intr_mask(dev, DW_IC_INTR_MASTER_MASK); +} + +/* + * This function waits for the controller to be idle before disabling I2C + * When the controller is not in the IDLE state, the MST_ACTIVITY bit + * (IC_STATUS[5]) is set. + * + * Values: + * 0x1 (ACTIVE): Controller not idle + * 0x0 (IDLE): Controller is idle + * + * The function is called after completing the current transfer. + * + * Returns: + * False when the controller is in the IDLE state. + * True when the controller is in the ACTIVE state. + */ +static bool i2c_dw_is_controller_active(struct dw_i2c_dev *dev) +{ + u32 status; + + regmap_read(dev->map, DW_IC_STATUS, &status); + if (!(status & DW_IC_STATUS_MASTER_ACTIVITY)) + return false; + + return regmap_read_poll_timeout(dev->map, DW_IC_STATUS, status, + !(status & DW_IC_STATUS_MASTER_ACTIVITY), + 1100, 20000) != 0; +} + +static int i2c_dw_check_stopbit(struct dw_i2c_dev *dev) +{ + u32 val; + int ret; + + ret = regmap_read_poll_timeout(dev->map, DW_IC_INTR_STAT, val, + !(val & DW_IC_INTR_STOP_DET), + 1100, 20000); + if (ret) + dev_err(dev->dev, "i2c timeout error %d\n", ret); + + return ret; +} + +static int i2c_dw_status(struct dw_i2c_dev *dev) +{ + int status; + + status = i2c_dw_wait_bus_not_busy(dev); + if (status) + return status; + + return i2c_dw_check_stopbit(dev); +} + +/* + * Initiate and continue master read/write transaction with polling + * based transfer routine afterward write messages into the Tx buffer. + */ +static int amd_i2c_dw_xfer_quirk(struct i2c_adapter *adap, struct i2c_msg *msgs, int num_msgs) +{ + struct dw_i2c_dev *dev = i2c_get_adapdata(adap); + int msg_wrt_idx, msg_itr_lmt, buf_len, data_idx; + int cmd = 0, status; + u8 *tx_buf; + unsigned int val; + + /* + * In order to enable the interrupt for UCSI i.e. AMD NAVI GPU card, + * it is mandatory to set the right value in specific register + * (offset:0x474) as per the hardware IP specification. + */ + regmap_write(dev->map, AMD_UCSI_INTR_REG, AMD_UCSI_INTR_EN); + + dev->msgs = msgs; + dev->msgs_num = num_msgs; + dev->msg_write_idx = 0; + i2c_dw_xfer_init(dev); + + /* Initiate messages read/write transaction */ + for (msg_wrt_idx = 0; msg_wrt_idx < num_msgs; msg_wrt_idx++) { + tx_buf = msgs[msg_wrt_idx].buf; + buf_len = msgs[msg_wrt_idx].len; + + if (!(msgs[msg_wrt_idx].flags & I2C_M_RD)) + regmap_write(dev->map, DW_IC_TX_TL, buf_len - 1); + /* + * Initiate the i2c read/write transaction of buffer length, + * and poll for bus busy status. For the last message transfer, + * update the command with stopbit enable. + */ + for (msg_itr_lmt = buf_len; msg_itr_lmt > 0; msg_itr_lmt--) { + if (msg_wrt_idx == num_msgs - 1 && msg_itr_lmt == 1) + cmd |= BIT(9); + + if (msgs[msg_wrt_idx].flags & I2C_M_RD) { + /* Due to hardware bug, need to write the same command twice. */ + regmap_write(dev->map, DW_IC_DATA_CMD, 0x100); + regmap_write(dev->map, DW_IC_DATA_CMD, 0x100 | cmd); + if (cmd) { + regmap_write(dev->map, DW_IC_TX_TL, 2 * (buf_len - 1)); + regmap_write(dev->map, DW_IC_RX_TL, 2 * (buf_len - 1)); + /* + * Need to check the stop bit. However, it cannot be + * detected from the registers so we check it always + * when read/write the last byte. + */ + status = i2c_dw_status(dev); + if (status) + return status; + + for (data_idx = 0; data_idx < buf_len; data_idx++) { + regmap_read(dev->map, DW_IC_DATA_CMD, &val); + tx_buf[data_idx] = val; + } + status = i2c_dw_check_stopbit(dev); + if (status) + return status; + } + } else { + regmap_write(dev->map, DW_IC_DATA_CMD, *tx_buf++ | cmd); + usleep_range(AMD_TIMEOUT_MIN_US, AMD_TIMEOUT_MAX_US); + } + } + status = i2c_dw_check_stopbit(dev); + if (status) + return status; + } + + return 0; +} + +/* + * Initiate (and continue) low level master read/write transaction. + * This function is only called from i2c_dw_isr, and pumping i2c_msg + * messages into the tx buffer. Even if the size of i2c_msg data is + * longer than the size of the tx buffer, it handles everything. + */ +static void +i2c_dw_xfer_msg(struct dw_i2c_dev *dev) +{ + struct i2c_msg *msgs = dev->msgs; + u32 intr_mask; + int tx_limit, rx_limit; + u32 addr = msgs[dev->msg_write_idx].addr; + u32 buf_len = dev->tx_buf_len; + u8 *buf = dev->tx_buf; + bool need_restart = false; + unsigned int flr; + + intr_mask = DW_IC_INTR_MASTER_MASK; + + for (; dev->msg_write_idx < dev->msgs_num; dev->msg_write_idx++) { + u32 flags = msgs[dev->msg_write_idx].flags; + + /* + * If target address has changed, we need to + * reprogram the target address in the I2C + * adapter when we are done with this transfer. + */ + if (msgs[dev->msg_write_idx].addr != addr) { + dev_err(dev->dev, + "%s: invalid target address\n", __func__); + dev->msg_err = -EINVAL; + break; + } + + if (!(dev->status & STATUS_WRITE_IN_PROGRESS)) { + /* new i2c_msg */ + buf = msgs[dev->msg_write_idx].buf; + buf_len = msgs[dev->msg_write_idx].len; + + /* If both IC_EMPTYFIFO_HOLD_MASTER_EN and + * IC_RESTART_EN are set, we must manually + * set restart bit between messages. + */ + if ((dev->master_cfg & DW_IC_CON_RESTART_EN) && + (dev->msg_write_idx > 0)) + need_restart = true; + } + + regmap_read(dev->map, DW_IC_TXFLR, &flr); + tx_limit = dev->tx_fifo_depth - flr; + + regmap_read(dev->map, DW_IC_RXFLR, &flr); + rx_limit = dev->rx_fifo_depth - flr; + + while (buf_len > 0 && tx_limit > 0 && rx_limit > 0) { + u32 cmd = 0; + + /* + * If IC_EMPTYFIFO_HOLD_MASTER_EN is set we must + * manually set the stop bit. However, it cannot be + * detected from the registers so we set it always + * when writing/reading the last byte. + */ + + /* + * i2c-core always sets the buffer length of + * I2C_FUNC_SMBUS_BLOCK_DATA to 1. The length will + * be adjusted when receiving the first byte. + * Thus we can't stop the transaction here. + */ + if (dev->msg_write_idx == dev->msgs_num - 1 && + buf_len == 1 && !(flags & I2C_M_RECV_LEN)) + cmd |= BIT(9); + + if (need_restart) { + cmd |= BIT(10); + need_restart = false; + } + + if (msgs[dev->msg_write_idx].flags & I2C_M_RD) { + + /* Avoid rx buffer overrun */ + if (dev->rx_outstanding >= dev->rx_fifo_depth) + break; + + regmap_write(dev->map, DW_IC_DATA_CMD, + cmd | 0x100); + rx_limit--; + dev->rx_outstanding++; + } else { + regmap_write(dev->map, DW_IC_DATA_CMD, + cmd | *buf++); + } + tx_limit--; buf_len--; + } + + dev->tx_buf = buf; + dev->tx_buf_len = buf_len; + + /* + * Because we don't know the buffer length in the + * I2C_FUNC_SMBUS_BLOCK_DATA case, we can't stop the + * transaction here. Also disable the TX_EMPTY IRQ + * while waiting for the data length byte to avoid the + * bogus interrupts flood. + */ + if (flags & I2C_M_RECV_LEN) { + dev->status |= STATUS_WRITE_IN_PROGRESS; + intr_mask &= ~DW_IC_INTR_TX_EMPTY; + break; + } else if (buf_len > 0) { + /* more bytes to be written */ + dev->status |= STATUS_WRITE_IN_PROGRESS; + break; + } else + dev->status &= ~STATUS_WRITE_IN_PROGRESS; + } + + /* + * If i2c_msg index search is completed, we don't need TX_EMPTY + * interrupt any more. + */ + if (dev->msg_write_idx == dev->msgs_num) + intr_mask &= ~DW_IC_INTR_TX_EMPTY; + + if (dev->msg_err) + intr_mask = 0; + + __i2c_dw_write_intr_mask(dev, intr_mask); +} + +static u8 +i2c_dw_recv_len(struct dw_i2c_dev *dev, u8 len) +{ + struct i2c_msg *msgs = dev->msgs; + u32 flags = msgs[dev->msg_read_idx].flags; + unsigned int intr_mask; + + /* + * Adjust the buffer length and mask the flag + * after receiving the first byte. + */ + len += (flags & I2C_CLIENT_PEC) ? 2 : 1; + dev->tx_buf_len = len - min_t(u8, len, dev->rx_outstanding); + msgs[dev->msg_read_idx].len = len; + msgs[dev->msg_read_idx].flags &= ~I2C_M_RECV_LEN; + + /* + * Received buffer length, re-enable TX_EMPTY interrupt + * to resume the SMBUS transaction. + */ + __i2c_dw_read_intr_mask(dev, &intr_mask); + intr_mask |= DW_IC_INTR_TX_EMPTY; + __i2c_dw_write_intr_mask(dev, intr_mask); + + return len; +} + +static void +i2c_dw_read(struct dw_i2c_dev *dev) +{ + struct i2c_msg *msgs = dev->msgs; + unsigned int rx_valid; + + for (; dev->msg_read_idx < dev->msgs_num; dev->msg_read_idx++) { + unsigned int tmp; + u32 len; + u8 *buf; + + if (!(msgs[dev->msg_read_idx].flags & I2C_M_RD)) + continue; + + if (!(dev->status & STATUS_READ_IN_PROGRESS)) { + len = msgs[dev->msg_read_idx].len; + buf = msgs[dev->msg_read_idx].buf; + } else { + len = dev->rx_buf_len; + buf = dev->rx_buf; + } + + regmap_read(dev->map, DW_IC_RXFLR, &rx_valid); + + for (; len > 0 && rx_valid > 0; len--, rx_valid--) { + u32 flags = msgs[dev->msg_read_idx].flags; + + regmap_read(dev->map, DW_IC_DATA_CMD, &tmp); + tmp &= DW_IC_DATA_CMD_DAT; + /* Ensure length byte is a valid value */ + if (flags & I2C_M_RECV_LEN) { + /* + * if IC_EMPTYFIFO_HOLD_MASTER_EN is set, which cannot be + * detected from the registers, the controller can be + * disabled if the STOP bit is set. But it is only set + * after receiving block data response length in + * I2C_FUNC_SMBUS_BLOCK_DATA case. That needs to read + * another byte with STOP bit set when the block data + * response length is invalid to complete the transaction. + */ + if (!tmp || tmp > I2C_SMBUS_BLOCK_MAX) + tmp = 1; + + len = i2c_dw_recv_len(dev, tmp); + } + *buf++ = tmp; + dev->rx_outstanding--; + } + + if (len > 0) { + dev->status |= STATUS_READ_IN_PROGRESS; + dev->rx_buf_len = len; + dev->rx_buf = buf; + return; + } else + dev->status &= ~STATUS_READ_IN_PROGRESS; + } +} + +static u32 i2c_dw_read_clear_intrbits(struct dw_i2c_dev *dev) +{ + unsigned int stat, dummy; + + /* + * The IC_INTR_STAT register just indicates "enabled" interrupts. + * The unmasked raw version of interrupt status bits is available + * in the IC_RAW_INTR_STAT register. + * + * That is, + * stat = readl(IC_INTR_STAT); + * equals to, + * stat = readl(IC_RAW_INTR_STAT) & readl(IC_INTR_MASK); + * + * The raw version might be useful for debugging purposes. + */ + if (!(dev->flags & ACCESS_POLLING)) { + regmap_read(dev->map, DW_IC_INTR_STAT, &stat); + } else { + regmap_read(dev->map, DW_IC_RAW_INTR_STAT, &stat); + stat &= dev->sw_mask; + } + + /* + * Do not use the IC_CLR_INTR register to clear interrupts, or + * you'll miss some interrupts, triggered during the period from + * readl(IC_INTR_STAT) to readl(IC_CLR_INTR). + * + * Instead, use the separately-prepared IC_CLR_* registers. + */ + if (stat & DW_IC_INTR_RX_UNDER) + regmap_read(dev->map, DW_IC_CLR_RX_UNDER, &dummy); + if (stat & DW_IC_INTR_RX_OVER) + regmap_read(dev->map, DW_IC_CLR_RX_OVER, &dummy); + if (stat & DW_IC_INTR_TX_OVER) + regmap_read(dev->map, DW_IC_CLR_TX_OVER, &dummy); + if (stat & DW_IC_INTR_RD_REQ) + regmap_read(dev->map, DW_IC_CLR_RD_REQ, &dummy); + if (stat & DW_IC_INTR_TX_ABRT) { + /* + * The IC_TX_ABRT_SOURCE register is cleared whenever + * the IC_CLR_TX_ABRT is read. Preserve it beforehand. + */ + regmap_read(dev->map, DW_IC_TX_ABRT_SOURCE, &dev->abort_source); + regmap_read(dev->map, DW_IC_CLR_TX_ABRT, &dummy); + } + if (stat & DW_IC_INTR_RX_DONE) + regmap_read(dev->map, DW_IC_CLR_RX_DONE, &dummy); + if (stat & DW_IC_INTR_ACTIVITY) + regmap_read(dev->map, DW_IC_CLR_ACTIVITY, &dummy); + if ((stat & DW_IC_INTR_STOP_DET) && + ((dev->rx_outstanding == 0) || (stat & DW_IC_INTR_RX_FULL))) + regmap_read(dev->map, DW_IC_CLR_STOP_DET, &dummy); + if (stat & DW_IC_INTR_START_DET) + regmap_read(dev->map, DW_IC_CLR_START_DET, &dummy); + if (stat & DW_IC_INTR_GEN_CALL) + regmap_read(dev->map, DW_IC_CLR_GEN_CALL, &dummy); + + return stat; +} + +static void i2c_dw_process_transfer(struct dw_i2c_dev *dev, unsigned int stat) +{ + if (stat & DW_IC_INTR_TX_ABRT) { + dev->cmd_err |= DW_IC_ERR_TX_ABRT; + dev->status &= ~STATUS_MASK; + dev->rx_outstanding = 0; + + /* + * Anytime TX_ABRT is set, the contents of the tx/rx + * buffers are flushed. Make sure to skip them. + */ + __i2c_dw_write_intr_mask(dev, 0); + goto tx_aborted; + } + + if (stat & DW_IC_INTR_RX_FULL) + i2c_dw_read(dev); + + if (stat & DW_IC_INTR_TX_EMPTY) + i2c_dw_xfer_msg(dev); + + /* + * No need to modify or disable the interrupt mask here. + * i2c_dw_xfer_msg() will take care of it according to + * the current transmit status. + */ + +tx_aborted: + if (((stat & (DW_IC_INTR_TX_ABRT | DW_IC_INTR_STOP_DET)) || dev->msg_err) && + (dev->rx_outstanding == 0)) + complete(&dev->cmd_complete); + else if (unlikely(dev->flags & ACCESS_INTR_MASK)) { + /* Workaround to trigger pending interrupt */ + __i2c_dw_read_intr_mask(dev, &stat); + __i2c_dw_write_intr_mask(dev, 0); + __i2c_dw_write_intr_mask(dev, stat); + } +} + +/* + * Interrupt service routine. This gets called whenever an I2C master interrupt + * occurs. + */ +static irqreturn_t i2c_dw_isr(int this_irq, void *dev_id) +{ + struct dw_i2c_dev *dev = dev_id; + unsigned int stat, enabled; + + regmap_read(dev->map, DW_IC_ENABLE, &enabled); + regmap_read(dev->map, DW_IC_RAW_INTR_STAT, &stat); + if (!enabled || !(stat & ~DW_IC_INTR_ACTIVITY)) + return IRQ_NONE; + if (pm_runtime_suspended(dev->dev) || stat == GENMASK(31, 0)) + return IRQ_NONE; + dev_dbg(dev->dev, "enabled=%#x stat=%#x\n", enabled, stat); + + stat = i2c_dw_read_clear_intrbits(dev); + + if (!(dev->status & STATUS_ACTIVE)) { + /* + * Unexpected interrupt in driver point of view. State + * variables are either unset or stale so acknowledge and + * disable interrupts for suppressing further interrupts if + * interrupt really came from this HW (E.g. firmware has left + * the HW active). + */ + __i2c_dw_write_intr_mask(dev, 0); + return IRQ_HANDLED; + } + + i2c_dw_process_transfer(dev, stat); + + return IRQ_HANDLED; +} + +static int i2c_dw_wait_transfer(struct dw_i2c_dev *dev) +{ + unsigned long timeout = dev->adapter.timeout; + unsigned int stat; + int ret; + + if (!(dev->flags & ACCESS_POLLING)) { + ret = wait_for_completion_timeout(&dev->cmd_complete, timeout); + } else { + timeout += jiffies; + do { + ret = try_wait_for_completion(&dev->cmd_complete); + if (ret) + break; + + stat = i2c_dw_read_clear_intrbits(dev); + if (stat) + i2c_dw_process_transfer(dev, stat); + else + /* Try save some power */ + usleep_range(3, 25); + } while (time_before(jiffies, timeout)); + } + + return ret ? 0 : -ETIMEDOUT; +} + +/* + * Prepare controller for a transaction and call i2c_dw_xfer_msg. + */ +static int +i2c_dw_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num) +{ + struct dw_i2c_dev *dev = i2c_get_adapdata(adap); + int ret; + + dev_dbg(dev->dev, "%s: msgs: %d\n", __func__, num); + + pm_runtime_get_sync(dev->dev); + + switch (dev->flags & MODEL_MASK) { + case MODEL_AMD_NAVI_GPU: + ret = amd_i2c_dw_xfer_quirk(adap, msgs, num); + goto done_nolock; + default: + break; + } + + reinit_completion(&dev->cmd_complete); + dev->msgs = msgs; + dev->msgs_num = num; + dev->cmd_err = 0; + dev->msg_write_idx = 0; + dev->msg_read_idx = 0; + dev->msg_err = 0; + dev->status = 0; + dev->abort_source = 0; + dev->rx_outstanding = 0; + + ret = i2c_dw_acquire_lock(dev); + if (ret) + goto done_nolock; + + ret = i2c_dw_wait_bus_not_busy(dev); + if (ret < 0) + goto done; + + /* Start the transfers */ + i2c_dw_xfer_init(dev); + + /* Wait for tx to complete */ + ret = i2c_dw_wait_transfer(dev); + if (ret) { + dev_err(dev->dev, "controller timed out\n"); + /* i2c_dw_init_master() implicitly disables the adapter */ + i2c_recover_bus(&dev->adapter); + i2c_dw_init_master(dev); + goto done; + } + + /* + * This happens rarely (~1:500) and is hard to reproduce. Debug trace + * showed that IC_STATUS had value of 0x23 when STOP_DET occurred, + * if disable IC_ENABLE.ENABLE immediately that can result in + * IC_RAW_INTR_STAT.MASTER_ON_HOLD holding SCL low. Check if + * controller is still ACTIVE before disabling I2C. + */ + if (i2c_dw_is_controller_active(dev)) + dev_err(dev->dev, "controller active\n"); + + /* + * We must disable the adapter before returning and signaling the end + * of the current transfer. Otherwise the hardware might continue + * generating interrupts which in turn causes a race condition with + * the following transfer. Needs some more investigation if the + * additional interrupts are a hardware bug or this driver doesn't + * handle them correctly yet. + */ + __i2c_dw_disable_nowait(dev); + + if (dev->msg_err) { + ret = dev->msg_err; + goto done; + } + + /* No error */ + if (likely(!dev->cmd_err && !dev->status)) { + ret = num; + goto done; + } + + /* We have an error */ + if (dev->cmd_err == DW_IC_ERR_TX_ABRT) { + ret = i2c_dw_handle_tx_abort(dev); + goto done; + } + + if (dev->status) + dev_err(dev->dev, + "transfer terminated early - interrupt latency too high?\n"); + + ret = -EIO; + +done: + i2c_dw_release_lock(dev); + +done_nolock: + pm_runtime_mark_last_busy(dev->dev); + pm_runtime_put_autosuspend(dev->dev); + + return ret; +} + +static const struct i2c_algorithm i2c_dw_algo = { + .master_xfer = i2c_dw_xfer, + .functionality = i2c_dw_func, +}; + +static const struct i2c_adapter_quirks i2c_dw_quirks = { + .flags = I2C_AQ_NO_ZERO_LEN, +}; + +void i2c_dw_configure_master(struct dw_i2c_dev *dev) +{ + struct i2c_timings *t = &dev->timings; + + dev->functionality = I2C_FUNC_10BIT_ADDR | DW_IC_DEFAULT_FUNCTIONALITY; + + dev->master_cfg = DW_IC_CON_MASTER | DW_IC_CON_SLAVE_DISABLE | + DW_IC_CON_RESTART_EN; + + dev->mode = DW_IC_MASTER; + + switch (t->bus_freq_hz) { + case I2C_MAX_STANDARD_MODE_FREQ: + dev->master_cfg |= DW_IC_CON_SPEED_STD; + break; + case I2C_MAX_HIGH_SPEED_MODE_FREQ: + dev->master_cfg |= DW_IC_CON_SPEED_HIGH; + break; + default: + dev->master_cfg |= DW_IC_CON_SPEED_FAST; + } +} +EXPORT_SYMBOL_GPL(i2c_dw_configure_master); + +static void i2c_dw_prepare_recovery(struct i2c_adapter *adap) +{ + struct dw_i2c_dev *dev = i2c_get_adapdata(adap); + + i2c_dw_disable(dev); + reset_control_assert(dev->rst); + i2c_dw_prepare_clk(dev, false); +} + +static void i2c_dw_unprepare_recovery(struct i2c_adapter *adap) +{ + struct dw_i2c_dev *dev = i2c_get_adapdata(adap); + + i2c_dw_prepare_clk(dev, true); + reset_control_deassert(dev->rst); + i2c_dw_init_master(dev); +} + +static int i2c_dw_init_recovery_info(struct dw_i2c_dev *dev) +{ + struct i2c_bus_recovery_info *rinfo = &dev->rinfo; + struct i2c_adapter *adap = &dev->adapter; + struct gpio_desc *gpio; + + gpio = devm_gpiod_get_optional(dev->dev, "scl", GPIOD_OUT_HIGH); + if (IS_ERR_OR_NULL(gpio)) + return PTR_ERR_OR_ZERO(gpio); + + rinfo->scl_gpiod = gpio; + + gpio = devm_gpiod_get_optional(dev->dev, "sda", GPIOD_IN); + if (IS_ERR(gpio)) + return PTR_ERR(gpio); + rinfo->sda_gpiod = gpio; + + rinfo->pinctrl = devm_pinctrl_get(dev->dev); + if (IS_ERR(rinfo->pinctrl)) { + if (PTR_ERR(rinfo->pinctrl) == -EPROBE_DEFER) + return PTR_ERR(rinfo->pinctrl); + + rinfo->pinctrl = NULL; + dev_err(dev->dev, "getting pinctrl info failed: bus recovery might not work\n"); + } else if (!rinfo->pinctrl) { + dev_dbg(dev->dev, "pinctrl is disabled, bus recovery might not work\n"); + } + + rinfo->recover_bus = i2c_generic_scl_recovery; + rinfo->prepare_recovery = i2c_dw_prepare_recovery; + rinfo->unprepare_recovery = i2c_dw_unprepare_recovery; + adap->bus_recovery_info = rinfo; + + dev_info(dev->dev, "running with gpio recovery mode! scl%s", + rinfo->sda_gpiod ? ",sda" : ""); + + return 0; +} + +int i2c_dw_probe_master(struct dw_i2c_dev *dev) +{ + struct i2c_adapter *adap = &dev->adapter; + unsigned long irq_flags; + unsigned int ic_con; + int ret; + + init_completion(&dev->cmd_complete); + + dev->init = i2c_dw_init_master; + + ret = i2c_dw_init_regmap(dev); + if (ret) + return ret; + + ret = i2c_dw_set_timings_master(dev); + if (ret) + return ret; + + ret = i2c_dw_set_fifo_size(dev); + if (ret) + return ret; + + /* Lock the bus for accessing DW_IC_CON */ + ret = i2c_dw_acquire_lock(dev); + if (ret) + return ret; + + /* + * On AMD platforms BIOS advertises the bus clear feature + * and enables the SCL/SDA stuck low. SMU FW does the + * bus recovery process. Driver should not ignore this BIOS + * advertisement of bus clear feature. + */ + ret = regmap_read(dev->map, DW_IC_CON, &ic_con); + i2c_dw_release_lock(dev); + if (ret) + return ret; + + if (ic_con & DW_IC_CON_BUS_CLEAR_CTRL) + dev->master_cfg |= DW_IC_CON_BUS_CLEAR_CTRL; + + ret = dev->init(dev); + if (ret) + return ret; + + snprintf(adap->name, sizeof(adap->name), + "Synopsys DesignWare I2C adapter"); + adap->retries = 3; + adap->algo = &i2c_dw_algo; + adap->quirks = &i2c_dw_quirks; + adap->dev.parent = dev->dev; + i2c_set_adapdata(adap, dev); + + if (dev->flags & ACCESS_NO_IRQ_SUSPEND) { + irq_flags = IRQF_NO_SUSPEND; + } else { + irq_flags = IRQF_SHARED | IRQF_COND_SUSPEND; + } + + ret = i2c_dw_acquire_lock(dev); + if (ret) + return ret; + + __i2c_dw_write_intr_mask(dev, 0); + i2c_dw_release_lock(dev); + + if (!(dev->flags & ACCESS_POLLING)) { + ret = devm_request_irq(dev->dev, dev->irq, i2c_dw_isr, + irq_flags, dev_name(dev->dev), dev); + if (ret) { + dev_err(dev->dev, "failure requesting irq %i: %d\n", + dev->irq, ret); + return ret; + } + } + + ret = i2c_dw_init_recovery_info(dev); + if (ret) + return ret; + + /* + * Increment PM usage count during adapter registration in order to + * avoid possible spurious runtime suspend when adapter device is + * registered to the device core and immediate resume in case bus has + * registered I2C slaves that do I2C transfers in their probe. + */ + pm_runtime_get_noresume(dev->dev); + ret = i2c_add_numbered_adapter(adap); + if (ret) + dev_err(dev->dev, "failure adding adapter: %d\n", ret); + pm_runtime_put_noidle(dev->dev); + + return ret; +} +EXPORT_SYMBOL_GPL(i2c_dw_probe_master); + +MODULE_DESCRIPTION("Synopsys DesignWare I2C bus master adapter"); +MODULE_LICENSE("GPL"); +MODULE_IMPORT_NS(I2C_DW_COMMON); diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/i2c-designware/i2c-designware-pcidrv.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/i2c-designware/i2c-designware-pcidrv.c new file mode 100644 index 00000000000..5ea6d40373e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/i2c-designware/i2c-designware-pcidrv.c @@ -0,0 +1,374 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Synopsys DesignWare I2C adapter driver (master only). + * + * Based on the TI DAVINCI I2C adapter driver. + * + * Copyright (C) 2006 Texas Instruments. + * Copyright (C) 2007 MontaVista Software Inc. + * Copyright (C) 2009 Provigent Ltd. + * Copyright (C) 2011, 2015, 2016 Intel Corporation. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "i2c-designware-core.h" +#include "i2c-ccgx-ucsi.h" + +#define DRIVER_NAME "i2c-designware-pci" + +enum dw_pci_ctl_id_t { + medfield, + merrifield, + baytrail, + cherrytrail, + haswell, + elkhartlake, + navi_amd, +}; + +/* + * This is a legacy structure to describe the hardware counters + * to configure signal timings on the bus. For Device Tree platforms + * one should use the respective properties and for ACPI there is + * a set of ACPI methods that provide these counters. No new + * platform should use this structure. + */ +struct dw_scl_sda_cfg { + u16 ss_hcnt; + u16 fs_hcnt; + u16 ss_lcnt; + u16 fs_lcnt; + u32 sda_hold; +}; + +struct dw_pci_controller { + u32 bus_num; + u32 flags; + struct dw_scl_sda_cfg *scl_sda_cfg; + int (*setup)(struct pci_dev *pdev, struct dw_pci_controller *c); + u32 (*get_clk_rate_khz)(struct dw_i2c_dev *dev); +}; + +/* Merrifield HCNT/LCNT/SDA hold time */ +static struct dw_scl_sda_cfg mrfld_config = { + .ss_hcnt = 0x2f8, + .fs_hcnt = 0x87, + .ss_lcnt = 0x37b, + .fs_lcnt = 0x10a, +}; + +/* BayTrail HCNT/LCNT/SDA hold time */ +static struct dw_scl_sda_cfg byt_config = { + .ss_hcnt = 0x200, + .fs_hcnt = 0x55, + .ss_lcnt = 0x200, + .fs_lcnt = 0x99, + .sda_hold = 0x6, +}; + +/* Haswell HCNT/LCNT/SDA hold time */ +static struct dw_scl_sda_cfg hsw_config = { + .ss_hcnt = 0x01b0, + .fs_hcnt = 0x48, + .ss_lcnt = 0x01fb, + .fs_lcnt = 0xa0, + .sda_hold = 0x9, +}; + +/* NAVI-AMD HCNT/LCNT/SDA hold time */ +static struct dw_scl_sda_cfg navi_amd_config = { + .ss_hcnt = 0x1ae, + .ss_lcnt = 0x23a, + .sda_hold = 0x9, +}; + +static u32 mfld_get_clk_rate_khz(struct dw_i2c_dev *dev) +{ + return 25000; +} + +static int mfld_setup(struct pci_dev *pdev, struct dw_pci_controller *c) +{ + struct dw_i2c_dev *dev = pci_get_drvdata(pdev); + + switch (pdev->device) { + case 0x0817: + dev->timings.bus_freq_hz = I2C_MAX_STANDARD_MODE_FREQ; + fallthrough; + case 0x0818: + case 0x0819: + c->bus_num = pdev->device - 0x817 + 3; + return 0; + case 0x082C: + case 0x082D: + case 0x082E: + c->bus_num = pdev->device - 0x82C + 0; + return 0; + } + return -ENODEV; +} + +static int mrfld_setup(struct pci_dev *pdev, struct dw_pci_controller *c) +{ + /* + * On Intel Merrifield the user visible i2c buses are enumerated + * [1..7]. So, we add 1 to shift the default range. Besides that the + * first PCI slot provides 4 functions, that's why we have to add 0 to + * the first slot and 4 to the next one. + */ + switch (PCI_SLOT(pdev->devfn)) { + case 8: + c->bus_num = PCI_FUNC(pdev->devfn) + 0 + 1; + return 0; + case 9: + c->bus_num = PCI_FUNC(pdev->devfn) + 4 + 1; + return 0; + } + return -ENODEV; +} + +static u32 ehl_get_clk_rate_khz(struct dw_i2c_dev *dev) +{ + return 100000; +} + +static u32 navi_amd_get_clk_rate_khz(struct dw_i2c_dev *dev) +{ + return 100000; +} + +static int navi_amd_setup(struct pci_dev *pdev, struct dw_pci_controller *c) +{ + struct dw_i2c_dev *dev = pci_get_drvdata(pdev); + + dev->flags |= MODEL_AMD_NAVI_GPU | ACCESS_POLLING; + dev->timings.bus_freq_hz = I2C_MAX_STANDARD_MODE_FREQ; + return 0; +} + +static struct dw_pci_controller dw_pci_controllers[] = { + [medfield] = { + .bus_num = -1, + .setup = mfld_setup, + .get_clk_rate_khz = mfld_get_clk_rate_khz, + }, + [merrifield] = { + .bus_num = -1, + .scl_sda_cfg = &mrfld_config, + .setup = mrfld_setup, + }, + [baytrail] = { + .bus_num = -1, + .scl_sda_cfg = &byt_config, + }, + [haswell] = { + .bus_num = -1, + .scl_sda_cfg = &hsw_config, + }, + [cherrytrail] = { + .bus_num = -1, + .scl_sda_cfg = &byt_config, + }, + [elkhartlake] = { + .bus_num = -1, + .get_clk_rate_khz = ehl_get_clk_rate_khz, + }, + [navi_amd] = { + .bus_num = -1, + .scl_sda_cfg = &navi_amd_config, + .setup = navi_amd_setup, + .get_clk_rate_khz = navi_amd_get_clk_rate_khz, + }, +}; + +static const struct property_entry dgpu_properties[] = { + /* USB-C doesn't power the system */ + PROPERTY_ENTRY_U8("scope", POWER_SUPPLY_SCOPE_DEVICE), + {} +}; + +static const struct software_node dgpu_node = { + .properties = dgpu_properties, +}; + +static int i2c_dw_pci_probe(struct pci_dev *pdev, + const struct pci_device_id *id) +{ + struct device *device = &pdev->dev; + struct dw_i2c_dev *dev; + struct i2c_adapter *adap; + int r; + struct dw_pci_controller *controller; + struct dw_scl_sda_cfg *cfg; + + if (id->driver_data >= ARRAY_SIZE(dw_pci_controllers)) + return dev_err_probe(device, -EINVAL, "Invalid driver data %ld\n", + id->driver_data); + + controller = &dw_pci_controllers[id->driver_data]; + + r = pcim_enable_device(pdev); + if (r) + return dev_err_probe(device, r, "Failed to enable I2C PCI device\n"); + + pci_set_master(pdev); + + r = pcim_iomap_regions(pdev, 1 << 0, pci_name(pdev)); + if (r) + return dev_err_probe(device, r, "I/O memory remapping failed\n"); + + dev = devm_kzalloc(device, sizeof(*dev), GFP_KERNEL); + if (!dev) + return -ENOMEM; + + r = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_ALL_TYPES); + if (r < 0) + return r; + + dev->get_clk_rate_khz = controller->get_clk_rate_khz; + dev->base = pcim_iomap_table(pdev)[0]; + dev->dev = device; + dev->irq = pci_irq_vector(pdev, 0); + dev->flags |= controller->flags; + + pci_set_drvdata(pdev, dev); + + if (controller->setup) { + r = controller->setup(pdev, controller); + if (r) + return r; + } + + r = i2c_dw_fw_parse_and_configure(dev); + if (r) + return r; + + i2c_dw_configure(dev); + + if (controller->scl_sda_cfg) { + cfg = controller->scl_sda_cfg; + dev->ss_hcnt = cfg->ss_hcnt; + dev->fs_hcnt = cfg->fs_hcnt; + dev->ss_lcnt = cfg->ss_lcnt; + dev->fs_lcnt = cfg->fs_lcnt; + dev->sda_hold_time = cfg->sda_hold; + } + + adap = &dev->adapter; + adap->owner = THIS_MODULE; + adap->class = 0; + adap->nr = controller->bus_num; + + r = i2c_dw_probe(dev); + if (r) + return r; + + if ((dev->flags & MODEL_MASK) == MODEL_AMD_NAVI_GPU) { + dev->slave = i2c_new_ccgx_ucsi(&dev->adapter, dev->irq, &dgpu_node); + if (IS_ERR(dev->slave)) { + i2c_del_adapter(&dev->adapter); + return dev_err_probe(device, PTR_ERR(dev->slave), + "register UCSI failed\n"); + } + } + + pm_runtime_set_autosuspend_delay(device, 1000); + pm_runtime_use_autosuspend(device); + pm_runtime_put_autosuspend(device); + pm_runtime_allow(device); + + return 0; +} + +static void i2c_dw_pci_remove(struct pci_dev *pdev) +{ + struct dw_i2c_dev *dev = pci_get_drvdata(pdev); + struct device *device = &pdev->dev; + + i2c_dw_disable(dev); + + pm_runtime_forbid(device); + pm_runtime_get_noresume(device); + + i2c_del_adapter(&dev->adapter); +} + +static const struct pci_device_id i2c_designware_pci_ids[] = { + /* Medfield */ + { PCI_VDEVICE(INTEL, 0x0817), medfield }, + { PCI_VDEVICE(INTEL, 0x0818), medfield }, + { PCI_VDEVICE(INTEL, 0x0819), medfield }, + { PCI_VDEVICE(INTEL, 0x082C), medfield }, + { PCI_VDEVICE(INTEL, 0x082D), medfield }, + { PCI_VDEVICE(INTEL, 0x082E), medfield }, + /* Merrifield */ + { PCI_VDEVICE(INTEL, 0x1195), merrifield }, + { PCI_VDEVICE(INTEL, 0x1196), merrifield }, + /* Baytrail */ + { PCI_VDEVICE(INTEL, 0x0F41), baytrail }, + { PCI_VDEVICE(INTEL, 0x0F42), baytrail }, + { PCI_VDEVICE(INTEL, 0x0F43), baytrail }, + { PCI_VDEVICE(INTEL, 0x0F44), baytrail }, + { PCI_VDEVICE(INTEL, 0x0F45), baytrail }, + { PCI_VDEVICE(INTEL, 0x0F46), baytrail }, + { PCI_VDEVICE(INTEL, 0x0F47), baytrail }, + /* Haswell */ + { PCI_VDEVICE(INTEL, 0x9c61), haswell }, + { PCI_VDEVICE(INTEL, 0x9c62), haswell }, + /* Braswell / Cherrytrail */ + { PCI_VDEVICE(INTEL, 0x22C1), cherrytrail }, + { PCI_VDEVICE(INTEL, 0x22C2), cherrytrail }, + { PCI_VDEVICE(INTEL, 0x22C3), cherrytrail }, + { PCI_VDEVICE(INTEL, 0x22C4), cherrytrail }, + { PCI_VDEVICE(INTEL, 0x22C5), cherrytrail }, + { PCI_VDEVICE(INTEL, 0x22C6), cherrytrail }, + { PCI_VDEVICE(INTEL, 0x22C7), cherrytrail }, + /* Elkhart Lake (PSE I2C) */ + { PCI_VDEVICE(INTEL, 0x4bb9), elkhartlake }, + { PCI_VDEVICE(INTEL, 0x4bba), elkhartlake }, + { PCI_VDEVICE(INTEL, 0x4bbb), elkhartlake }, + { PCI_VDEVICE(INTEL, 0x4bbc), elkhartlake }, + { PCI_VDEVICE(INTEL, 0x4bbd), elkhartlake }, + { PCI_VDEVICE(INTEL, 0x4bbe), elkhartlake }, + { PCI_VDEVICE(INTEL, 0x4bbf), elkhartlake }, + { PCI_VDEVICE(INTEL, 0x4bc0), elkhartlake }, + /* AMD NAVI */ + { PCI_VDEVICE(ATI, 0x7314), navi_amd }, + { PCI_VDEVICE(ATI, 0x73a4), navi_amd }, + { PCI_VDEVICE(ATI, 0x73e4), navi_amd }, + { PCI_VDEVICE(ATI, 0x73c4), navi_amd }, + { PCI_VDEVICE(ATI, 0x7444), navi_amd }, + { PCI_VDEVICE(ATI, 0x7464), navi_amd }, + {} +}; +MODULE_DEVICE_TABLE(pci, i2c_designware_pci_ids); + +static struct pci_driver dw_i2c_driver = { + .name = DRIVER_NAME, + .probe = i2c_dw_pci_probe, + .remove = i2c_dw_pci_remove, + .driver = { + .pm = pm_ptr(&i2c_dw_dev_pm_ops), + }, + .id_table = i2c_designware_pci_ids, +}; +module_pci_driver(dw_i2c_driver); + +MODULE_AUTHOR("Baruch Siach "); +MODULE_DESCRIPTION("Synopsys DesignWare PCI I2C bus adapter"); +MODULE_LICENSE("GPL"); +MODULE_IMPORT_NS(I2C_DW); +MODULE_IMPORT_NS(I2C_DW_COMMON); diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/i2c-designware/i2c-designware-platdrv.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/i2c-designware/i2c-designware-platdrv.c new file mode 100644 index 00000000000..afa4d729dbb --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/i2c-designware/i2c-designware-platdrv.c @@ -0,0 +1,418 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Synopsys DesignWare I2C adapter driver. + * + * Based on the TI DAVINCI I2C adapter driver. + * + * Copyright (C) 2006 Texas Instruments. + * Copyright (C) 2007 MontaVista Software Inc. + * Copyright (C) 2009 Provigent Ltd. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "i2c-designware-core.h" + +static int sda_fall_ns = 0; +module_param(sda_fall_ns, int, S_IRUGO); +static int scl_fall_ns = 0; +module_param(scl_fall_ns, int, S_IRUGO); +static int bus_freq_hz = 0; +module_param(bus_freq_hz, int, S_IRUGO); + +static u32 i2c_dw_get_clk_rate_khz(struct dw_i2c_dev *dev) +{ + return clk_get_rate(dev->clk) / KILO; +} + +#ifdef CONFIG_OF +#define BT1_I2C_CTL 0x100 +#define BT1_I2C_CTL_ADDR_MASK GENMASK(7, 0) +#define BT1_I2C_CTL_WR BIT(8) +#define BT1_I2C_CTL_GO BIT(31) +#define BT1_I2C_DI 0x104 +#define BT1_I2C_DO 0x108 + +static int bt1_i2c_read(void *context, unsigned int reg, unsigned int *val) +{ + struct dw_i2c_dev *dev = context; + int ret; + + /* + * Note these methods shouldn't ever fail because the system controller + * registers are memory mapped. We check the return value just in case. + */ + ret = regmap_write(dev->sysmap, BT1_I2C_CTL, + BT1_I2C_CTL_GO | (reg & BT1_I2C_CTL_ADDR_MASK)); + if (ret) + return ret; + + return regmap_read(dev->sysmap, BT1_I2C_DO, val); +} + +static int bt1_i2c_write(void *context, unsigned int reg, unsigned int val) +{ + struct dw_i2c_dev *dev = context; + int ret; + + ret = regmap_write(dev->sysmap, BT1_I2C_DI, val); + if (ret) + return ret; + + return regmap_write(dev->sysmap, BT1_I2C_CTL, + BT1_I2C_CTL_GO | BT1_I2C_CTL_WR | (reg & BT1_I2C_CTL_ADDR_MASK)); +} + +static const struct regmap_config bt1_i2c_cfg = { + .reg_bits = 32, + .val_bits = 32, + .reg_stride = 4, + .fast_io = true, + .reg_read = bt1_i2c_read, + .reg_write = bt1_i2c_write, + .max_register = DW_IC_COMP_TYPE, +}; + +static int bt1_i2c_request_regs(struct dw_i2c_dev *dev) +{ + dev->sysmap = syscon_node_to_regmap(dev->dev->of_node->parent); + if (IS_ERR(dev->sysmap)) + return PTR_ERR(dev->sysmap); + + dev->map = devm_regmap_init(dev->dev, NULL, dev, &bt1_i2c_cfg); + return PTR_ERR_OR_ZERO(dev->map); +} +#else +static int bt1_i2c_request_regs(struct dw_i2c_dev *dev) +{ + return -ENODEV; +} +#endif + +static int txgbe_i2c_request_regs(struct dw_i2c_dev *dev) +{ + dev->map = dev_get_regmap(dev->dev->parent, NULL); + if (!dev->map) + return -ENODEV; + + return 0; +} + +static void dw_i2c_plat_pm_cleanup(struct dw_i2c_dev *dev) +{ + pm_runtime_disable(dev->dev); + + if (dev->shared_with_punit) + pm_runtime_put_noidle(dev->dev); +} + +static int dw_i2c_plat_request_regs(struct dw_i2c_dev *dev) +{ + struct platform_device *pdev = to_platform_device(dev->dev); + int ret; + + switch (dev->flags & MODEL_MASK) { + case MODEL_BAIKAL_BT1: + ret = bt1_i2c_request_regs(dev); + break; + case MODEL_WANGXUN_SP: + ret = txgbe_i2c_request_regs(dev); + break; + default: + dev->base = devm_platform_ioremap_resource(pdev, 0); + ret = PTR_ERR_OR_ZERO(dev->base); + break; + } + + return ret; +} + +static const struct dmi_system_id dw_i2c_hwmon_class_dmi[] = { + { + .ident = "Qtechnology QT5222", + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "Qtechnology"), + DMI_MATCH(DMI_PRODUCT_NAME, "QT5222"), + }, + }, + { } /* terminate list */ +}; + +static const struct i2c_dw_semaphore_callbacks i2c_dw_semaphore_cb_table[] = { +#if 0//def CONFIG_I2C_DESIGNWARE_BAYTRAIL + { + .probe = i2c_dw_baytrail_probe_lock_support, + }, +#endif +#ifdef CONFIG_I2C_DESIGNWARE_AMDPSP + { + .probe = i2c_dw_amdpsp_probe_lock_support, + }, +#endif + {} +}; + +static int i2c_dw_probe_lock_support(struct dw_i2c_dev *dev) +{ + const struct i2c_dw_semaphore_callbacks *ptr; + int i = 0; + int ret; + + dev->semaphore_idx = -1; + + for (ptr = i2c_dw_semaphore_cb_table; ptr->probe; ptr++) { + ret = ptr->probe(dev); + if (ret) { + /* + * If there is no semaphore device attached to this + * controller, we shouldn't abort general i2c_controller + * probe. + */ + if (ret != -ENODEV) + return ret; + + i++; + continue; + } + + dev->semaphore_idx = i; + break; + } + + return 0; +} + +static void i2c_dw_remove_lock_support(struct dw_i2c_dev *dev) +{ + if (dev->semaphore_idx < 0) + return; + + if (i2c_dw_semaphore_cb_table[dev->semaphore_idx].remove) + i2c_dw_semaphore_cb_table[dev->semaphore_idx].remove(dev); +} + +static int dw_i2c_plat_probe(struct platform_device *pdev) +{ + struct device *device = &pdev->dev; + struct i2c_adapter *adap; + struct dw_i2c_dev *dev; + int irq, ret; + + irq = platform_get_irq(pdev, 0); + if (irq < 0) + return irq; + + dev = devm_kzalloc(device, sizeof(*dev), GFP_KERNEL); + if (!dev) + return -ENOMEM; + + dev->flags = (uintptr_t)device_get_match_data(device); + if (device_property_present(device, "wx,i2c-snps-model")) + dev->flags = MODEL_WANGXUN_SP | ACCESS_POLLING; + + dev->dev = device; + dev->irq = irq; + platform_set_drvdata(pdev, dev); + + ret = dw_i2c_plat_request_regs(dev); + if (ret) + return ret; + + dev->rst = devm_reset_control_get_optional_exclusive(device, NULL); + if (IS_ERR(dev->rst)) + return PTR_ERR(dev->rst); + + reset_control_deassert(dev->rst); + + ret = i2c_dw_fw_parse_and_configure(dev); + if (ret) + goto exit_reset; + + ret = i2c_dw_probe_lock_support(dev); + if (ret) + goto exit_reset; + + if (bus_freq_hz) { + struct i2c_timings *t = &dev->timings; + t->bus_freq_hz = bus_freq_hz; + } + + i2c_dw_configure(dev); + + /* Optional interface clock */ + dev->pclk = devm_clk_get_optional(device, "pclk"); + if (IS_ERR(dev->pclk)) { + ret = PTR_ERR(dev->pclk); + goto exit_reset; + } + + dev->clk = devm_clk_get_optional(device, NULL); + if (IS_ERR(dev->clk)) { + ret = PTR_ERR(dev->clk); + goto exit_reset; + } + + ret = i2c_dw_prepare_clk(dev, true); + if (ret) + goto exit_reset; + + if (dev->clk) { + struct i2c_timings *t = &dev->timings; + u64 clk_khz; + + dev->get_clk_rate_khz = i2c_dw_get_clk_rate_khz; + clk_khz = dev->get_clk_rate_khz(dev); + + if (!dev->sda_hold_time && t->sda_hold_ns) + dev->sda_hold_time = + DIV_S64_ROUND_CLOSEST(clk_khz * t->sda_hold_ns, MICRO); + } + + adap = &dev->adapter; + adap->owner = THIS_MODULE; + adap->class = dmi_check_system(dw_i2c_hwmon_class_dmi) ? + I2C_CLASS_HWMON : I2C_CLASS_DEPRECATED; + adap->nr = -1; + + if (dev->flags & ACCESS_NO_IRQ_SUSPEND) + dev_pm_set_driver_flags(device, DPM_FLAG_SMART_PREPARE); + else + dev_pm_set_driver_flags(device, DPM_FLAG_SMART_PREPARE | DPM_FLAG_SMART_SUSPEND); + + device_enable_async_suspend(device); + + /* The code below assumes runtime PM to be disabled. */ + WARN_ON(pm_runtime_enabled(device)); + + pm_runtime_set_autosuspend_delay(device, 1000); + pm_runtime_use_autosuspend(device); + pm_runtime_set_active(device); + + if (dev->shared_with_punit) + pm_runtime_get_noresume(device); + + pm_runtime_enable(device); + + /* Override default fall timeouts if specified by platform data or device tree */ + if (sda_fall_ns || scl_fall_ns) { + struct i2c_timings *t = &dev->timings; + t->sda_fall_ns = sda_fall_ns; + t->scl_fall_ns = scl_fall_ns; + } + + ret = i2c_dw_probe(dev); + if (ret) + goto exit_probe; + + return ret; + +exit_probe: + dw_i2c_plat_pm_cleanup(dev); +exit_reset: + reset_control_assert(dev->rst); + return ret; +} + +static void dw_i2c_plat_remove(struct platform_device *pdev) +{ + struct dw_i2c_dev *dev = platform_get_drvdata(pdev); + struct device *device = &pdev->dev; + + pm_runtime_get_sync(device); + + i2c_del_adapter(&dev->adapter); + + i2c_dw_disable(dev); + + pm_runtime_dont_use_autosuspend(device); + pm_runtime_put_sync(device); + dw_i2c_plat_pm_cleanup(dev); + + i2c_dw_remove_lock_support(dev); + + reset_control_assert(dev->rst); +} + +static const struct of_device_id dw_i2c_of_match[] = { + { .compatible = "snps,designware-i2c", }, + { .compatible = "mscc,ocelot-i2c", .data = (void *)MODEL_MSCC_OCELOT }, + { .compatible = "baikal,bt1-sys-i2c", .data = (void *)MODEL_BAIKAL_BT1 }, + {} +}; +MODULE_DEVICE_TABLE(of, dw_i2c_of_match); + +static const struct acpi_device_id dw_i2c_acpi_match[] = { + { "80860F41", ACCESS_NO_IRQ_SUSPEND }, + { "808622C1", ACCESS_NO_IRQ_SUSPEND }, + { "AMD0010", ACCESS_INTR_MASK }, + { "AMDI0010", ACCESS_INTR_MASK }, + { "AMDI0019", ACCESS_INTR_MASK | ARBITRATION_SEMAPHORE }, + { "AMDI0510", 0 }, + { "APMC0D0F", 0 }, + { "HISI02A1", 0 }, + { "HISI02A2", 0 }, + { "HISI02A3", 0 }, + { "HYGO0010", ACCESS_INTR_MASK }, + { "INT33C2", 0 }, + { "INT33C3", 0 }, + { "INT3432", 0 }, + { "INT3433", 0 }, + { "INTC10EF", 0 }, + {} +}; +MODULE_DEVICE_TABLE(acpi, dw_i2c_acpi_match); + +static const struct platform_device_id dw_i2c_platform_ids[] = { + { "i2c_designware" }, + {} +}; +MODULE_DEVICE_TABLE(platform, dw_i2c_platform_ids); + +static struct platform_driver dw_i2c_driver = { + .probe = dw_i2c_plat_probe, + .remove_new = dw_i2c_plat_remove, + .driver = { + .name = "i2c_designware", + .of_match_table = dw_i2c_of_match, + .acpi_match_table = dw_i2c_acpi_match, + .pm = pm_ptr(&i2c_dw_dev_pm_ops), + }, + .id_table = dw_i2c_platform_ids, +}; + +static int __init dw_i2c_init_driver(void) +{ + return platform_driver_register(&dw_i2c_driver); +} +subsys_initcall(dw_i2c_init_driver); + +static void __exit dw_i2c_exit_driver(void) +{ + platform_driver_unregister(&dw_i2c_driver); +} +module_exit(dw_i2c_exit_driver); + +MODULE_AUTHOR("Baruch Siach "); +MODULE_DESCRIPTION("Synopsys DesignWare I2C bus adapter"); +MODULE_LICENSE("GPL"); +MODULE_IMPORT_NS(I2C_DW); +MODULE_IMPORT_NS(I2C_DW_COMMON); diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/i2c-designware/i2c-designware-slave.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/i2c-designware/i2c-designware-slave.c new file mode 100644 index 00000000000..602e98e61cc --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/i2c-designware/i2c-designware-slave.c @@ -0,0 +1,284 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Synopsys DesignWare I2C adapter driver (slave only). + * + * Based on the Synopsys DesignWare I2C adapter driver (master). + * + * Copyright (C) 2016 Synopsys Inc. + */ + +#define DEFAULT_SYMBOL_NAMESPACE "I2C_DW" + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "i2c-designware-core.h" + +static void i2c_dw_configure_fifo_slave(struct dw_i2c_dev *dev) +{ + /* Configure Tx/Rx FIFO threshold levels. */ + regmap_write(dev->map, DW_IC_TX_TL, 0); + regmap_write(dev->map, DW_IC_RX_TL, 0); + + /* Configure the I2C slave. */ + regmap_write(dev->map, DW_IC_CON, dev->slave_cfg); + regmap_write(dev->map, DW_IC_INTR_MASK, DW_IC_INTR_SLAVE_MASK); +} + +/** + * i2c_dw_init_slave() - Initialize the designware i2c slave hardware + * @dev: device private data + * + * This function configures and enables the I2C in slave mode. + * This function is called during I2C init function, and in case of timeout at + * run time. + */ +static int i2c_dw_init_slave(struct dw_i2c_dev *dev) +{ + int ret; + + ret = i2c_dw_acquire_lock(dev); + if (ret) + return ret; + + /* Disable the adapter. */ + __i2c_dw_disable(dev); + + /* Write SDA hold time if supported */ + if (dev->sda_hold_time) + regmap_write(dev->map, DW_IC_SDA_HOLD, dev->sda_hold_time); + + i2c_dw_configure_fifo_slave(dev); + i2c_dw_release_lock(dev); + + return 0; +} + +static int i2c_dw_reg_slave(struct i2c_client *slave) +{ + struct dw_i2c_dev *dev = i2c_get_adapdata(slave->adapter); + + if (dev->slave) + return -EBUSY; + if (slave->flags & I2C_CLIENT_TEN) + return -EAFNOSUPPORT; + pm_runtime_get_sync(dev->dev); + + /* + * Set slave address in the IC_SAR register, + * the address to which the DW_apb_i2c responds. + */ + __i2c_dw_disable_nowait(dev); + regmap_write(dev->map, DW_IC_SAR, slave->addr); + dev->slave = slave; + + __i2c_dw_enable(dev); + + dev->status = 0; + + return 0; +} + +static int i2c_dw_unreg_slave(struct i2c_client *slave) +{ + struct dw_i2c_dev *dev = i2c_get_adapdata(slave->adapter); + + regmap_write(dev->map, DW_IC_INTR_MASK, 0); + i2c_dw_disable(dev); + synchronize_irq(dev->irq); + dev->slave = NULL; + pm_runtime_put_sync_suspend(dev->dev); + + return 0; +} + +static u32 i2c_dw_read_clear_intrbits_slave(struct dw_i2c_dev *dev) +{ + unsigned int stat, dummy; + + /* + * The IC_INTR_STAT register just indicates "enabled" interrupts. + * The unmasked raw version of interrupt status bits is available + * in the IC_RAW_INTR_STAT register. + * + * That is, + * stat = readl(IC_INTR_STAT); + * equals to, + * stat = readl(IC_RAW_INTR_STAT) & readl(IC_INTR_MASK); + * + * The raw version might be useful for debugging purposes. + */ + regmap_read(dev->map, DW_IC_INTR_STAT, &stat); + + /* + * Do not use the IC_CLR_INTR register to clear interrupts, or + * you'll miss some interrupts, triggered during the period from + * readl(IC_INTR_STAT) to readl(IC_CLR_INTR). + * + * Instead, use the separately-prepared IC_CLR_* registers. + */ + if (stat & DW_IC_INTR_TX_ABRT) + regmap_read(dev->map, DW_IC_CLR_TX_ABRT, &dummy); + if (stat & DW_IC_INTR_RX_UNDER) + regmap_read(dev->map, DW_IC_CLR_RX_UNDER, &dummy); + if (stat & DW_IC_INTR_RX_OVER) + regmap_read(dev->map, DW_IC_CLR_RX_OVER, &dummy); + if (stat & DW_IC_INTR_TX_OVER) + regmap_read(dev->map, DW_IC_CLR_TX_OVER, &dummy); + if (stat & DW_IC_INTR_RX_DONE) + regmap_read(dev->map, DW_IC_CLR_RX_DONE, &dummy); + if (stat & DW_IC_INTR_ACTIVITY) + regmap_read(dev->map, DW_IC_CLR_ACTIVITY, &dummy); + if (stat & DW_IC_INTR_STOP_DET) + regmap_read(dev->map, DW_IC_CLR_STOP_DET, &dummy); + if (stat & DW_IC_INTR_START_DET) + regmap_read(dev->map, DW_IC_CLR_START_DET, &dummy); + if (stat & DW_IC_INTR_GEN_CALL) + regmap_read(dev->map, DW_IC_CLR_GEN_CALL, &dummy); + + return stat; +} + +/* + * Interrupt service routine. This gets called whenever an I2C slave interrupt + * occurs. + */ +static irqreturn_t i2c_dw_isr_slave(int this_irq, void *dev_id) +{ + struct dw_i2c_dev *dev = dev_id; + unsigned int raw_stat, stat, enabled, tmp; + u8 val = 0, slave_activity; + + regmap_read(dev->map, DW_IC_ENABLE, &enabled); + regmap_read(dev->map, DW_IC_RAW_INTR_STAT, &raw_stat); + regmap_read(dev->map, DW_IC_STATUS, &tmp); + slave_activity = ((tmp & DW_IC_STATUS_SLAVE_ACTIVITY) >> 6); + + if (!enabled || !(raw_stat & ~DW_IC_INTR_ACTIVITY) || !dev->slave) + return IRQ_NONE; + + stat = i2c_dw_read_clear_intrbits_slave(dev); + dev_dbg(dev->dev, + "%#x STATUS SLAVE_ACTIVITY=%#x : RAW_INTR_STAT=%#x : INTR_STAT=%#x\n", + enabled, slave_activity, raw_stat, stat); + + if (stat & DW_IC_INTR_RX_FULL) { + if (!(dev->status & STATUS_WRITE_IN_PROGRESS)) { + dev->status |= STATUS_WRITE_IN_PROGRESS; + dev->status &= ~STATUS_READ_IN_PROGRESS; + i2c_slave_event(dev->slave, I2C_SLAVE_WRITE_REQUESTED, + &val); + } + + do { + regmap_read(dev->map, DW_IC_DATA_CMD, &tmp); + if (tmp & DW_IC_DATA_CMD_FIRST_DATA_BYTE) + i2c_slave_event(dev->slave, + I2C_SLAVE_WRITE_REQUESTED, + &val); + val = tmp; + i2c_slave_event(dev->slave, I2C_SLAVE_WRITE_RECEIVED, + &val); + regmap_read(dev->map, DW_IC_STATUS, &tmp); + } while (tmp & DW_IC_STATUS_RFNE); + } + + if (stat & DW_IC_INTR_RD_REQ) { + if (slave_activity) { + regmap_read(dev->map, DW_IC_CLR_RD_REQ, &tmp); + + if (!(dev->status & STATUS_READ_IN_PROGRESS)) { + i2c_slave_event(dev->slave, + I2C_SLAVE_READ_REQUESTED, + &val); + dev->status |= STATUS_READ_IN_PROGRESS; + dev->status &= ~STATUS_WRITE_IN_PROGRESS; + } else { + i2c_slave_event(dev->slave, + I2C_SLAVE_READ_PROCESSED, + &val); + } + regmap_write(dev->map, DW_IC_DATA_CMD, val); + } + } + + if (stat & DW_IC_INTR_STOP_DET) + i2c_slave_event(dev->slave, I2C_SLAVE_STOP, &val); + + return IRQ_HANDLED; +} + +static const struct i2c_algorithm i2c_dw_algo = { + .functionality = i2c_dw_func, + .reg_slave = i2c_dw_reg_slave, + .unreg_slave = i2c_dw_unreg_slave, +}; + +void i2c_dw_configure_slave(struct dw_i2c_dev *dev) +{ + dev->functionality = I2C_FUNC_SLAVE; + + dev->slave_cfg = DW_IC_CON_RX_FIFO_FULL_HLD_CTRL | + DW_IC_CON_RESTART_EN | DW_IC_CON_STOP_DET_IFADDRESSED; + + dev->mode = DW_IC_SLAVE; +} +EXPORT_SYMBOL_GPL(i2c_dw_configure_slave); + +int i2c_dw_probe_slave(struct dw_i2c_dev *dev) +{ + struct i2c_adapter *adap = &dev->adapter; + int ret; + + dev->init = i2c_dw_init_slave; + + ret = i2c_dw_init_regmap(dev); + if (ret) + return ret; + + ret = i2c_dw_set_sda_hold(dev); + if (ret) + return ret; + + ret = i2c_dw_set_fifo_size(dev); + if (ret) + return ret; + + ret = dev->init(dev); + if (ret) + return ret; + + snprintf(adap->name, sizeof(adap->name), + "Synopsys DesignWare I2C Slave adapter"); + adap->retries = 3; + adap->algo = &i2c_dw_algo; + adap->dev.parent = dev->dev; + i2c_set_adapdata(adap, dev); + + ret = devm_request_irq(dev->dev, dev->irq, i2c_dw_isr_slave, + IRQF_SHARED, dev_name(dev->dev), dev); + if (ret) { + dev_err(dev->dev, "failure requesting irq %i: %d\n", + dev->irq, ret); + return ret; + } + + ret = i2c_add_numbered_adapter(adap); + if (ret) + dev_err(dev->dev, "failure adding adapter: %d\n", ret); + + return ret; +} +EXPORT_SYMBOL_GPL(i2c_dw_probe_slave); + +MODULE_AUTHOR("Luis Oliveira "); +MODULE_DESCRIPTION("Synopsys DesignWare I2C bus slave adapter"); +MODULE_LICENSE("GPL v2"); +MODULE_IMPORT_NS(I2C_DW_COMMON); diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/i2c-designware/math.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/i2c-designware/math.h new file mode 100644 index 00000000000..e3585758829 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/i2c-designware/math.h @@ -0,0 +1,148 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef _LINUX_MATH_H +#define _LINUX_MATH_H + +#include +#include + +/* + * This looks more complex than it should be. But we need to + * get the type for the ~ right in round_down (it needs to be + * as wide as the result!), and we want to evaluate the macro + * arguments just once each. + */ +#define __round_mask(x, y) ((__typeof__(x))((y)-1)) + +/** + * round_up - round up to next specified power of 2 + * @x: the value to round + * @y: multiple to round up to (must be a power of 2) + * + * Rounds @x up to next multiple of @y (which must be a power of 2). + * To perform arbitrary rounding up, use roundup() below. + */ +#define round_up(x, y) ((((x)-1) | __round_mask(x, y))+1) + +/** + * round_down - round down to next specified power of 2 + * @x: the value to round + * @y: multiple to round down to (must be a power of 2) + * + * Rounds @x down to next multiple of @y (which must be a power of 2). + * To perform arbitrary rounding down, use rounddown() below. + */ +#define round_down(x, y) ((x) & ~__round_mask(x, y)) + +#define DIV_ROUND_UP __KERNEL_DIV_ROUND_UP + +#define DIV_ROUND_DOWN_ULL(ll, d) \ + ({ unsigned long long _tmp = (ll); do_div(_tmp, d); _tmp; }) + +#define DIV_ROUND_UP_ULL(ll, d) \ + DIV_ROUND_DOWN_ULL((unsigned long long)(ll) + (d) - 1, (d)) + +#if BITS_PER_LONG == 32 +# define DIV_ROUND_UP_SECTOR_T(ll,d) DIV_ROUND_UP_ULL(ll, d) +#else +# define DIV_ROUND_UP_SECTOR_T(ll,d) DIV_ROUND_UP(ll,d) +#endif + +/** + * roundup - round up to the next specified multiple + * @x: the value to up + * @y: multiple to round up to + * + * Rounds @x up to next multiple of @y. If @y will always be a power + * of 2, consider using the faster round_up(). + */ +#define roundup(x, y) ( \ +{ \ + typeof(y) __y = y; \ + (((x) + (__y - 1)) / __y) * __y; \ +} \ +) +/** + * rounddown - round down to next specified multiple + * @x: the value to round + * @y: multiple to round down to + * + * Rounds @x down to next multiple of @y. If @y will always be a power + * of 2, consider using the faster round_down(). + */ +#define rounddown(x, y) ( \ +{ \ + typeof(x) __x = (x); \ + __x - (__x % (y)); \ +} \ +) + +/* + * Divide positive or negative dividend by positive or negative divisor + * and round to closest integer. Result is undefined for negative + * divisors if the dividend variable type is unsigned and for negative + * dividends if the divisor variable type is unsigned. + */ +#define DIV_ROUND_CLOSEST(x, divisor)( \ +{ \ + typeof(x) __x = x; \ + typeof(divisor) __d = divisor; \ + (((typeof(x))-1) > 0 || \ + ((typeof(divisor))-1) > 0 || \ + (((__x) > 0) == ((__d) > 0))) ? \ + (((__x) + ((__d) / 2)) / (__d)) : \ + (((__x) - ((__d) / 2)) / (__d)); \ +} \ +) +/* + * Same as above but for u64 dividends. divisor must be a 32-bit + * number. + */ +#define DIV_ROUND_CLOSEST_ULL(x, divisor)( \ +{ \ + typeof(divisor) __d = divisor; \ + unsigned long long _tmp = (x) + (__d) / 2; \ + do_div(_tmp, __d); \ + _tmp; \ +} \ +) + +/* + * Multiplies an integer by a fraction, while avoiding unnecessary + * overflow or loss of precision. + */ +#define mult_frac(x, numer, denom)( \ +{ \ + typeof(x) quot = (x) / (denom); \ + typeof(x) rem = (x) % (denom); \ + (quot * (numer)) + ((rem * (numer)) / (denom)); \ +} \ +) + +#define sector_div(a, b) do_div(a, b) + +/** + * abs - return absolute value of an argument + * @x: the value. If it is unsigned type, it is converted to signed type first. + * char is treated as if it was signed (regardless of whether it really is) + * but the macro's return type is preserved as char. + * + * Return: an absolute value of x. + */ +#define abs(x) __abs_choose_expr(x, long long, \ + __abs_choose_expr(x, long, \ + __abs_choose_expr(x, int, \ + __abs_choose_expr(x, short, \ + __abs_choose_expr(x, char, \ + __builtin_choose_expr( \ + __builtin_types_compatible_p(typeof(x), char), \ + (char)({ signed char __x = (x); __x<0?-__x:__x; }), \ + ((void)0))))))) + +#define __abs_choose_expr(x, type, other) __builtin_choose_expr( \ + __builtin_types_compatible_p(typeof(x), signed type) || \ + __builtin_types_compatible_p(typeof(x), unsigned type), \ + ({ signed type __x = (x); __x < 0 ? -__x : __x; }), other) + +u64 int_pow(u64 base, unsigned int exp); + +#endif /* _LINUX_MATH_H */ diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/i2c-designware/units.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/i2c-designware/units.h new file mode 100644 index 00000000000..8f71e500540 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/i2c-designware/units.h @@ -0,0 +1,108 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef _LINUX_UNITS_H +#define _LINUX_UNITS_H + +#include "math.h" + +/* Metric prefixes in accordance with Système international (d'unités) */ +#define PETA 1000000000000000ULL +#define TERA 1000000000000ULL +#define GIGA 1000000000UL +#define MEGA 1000000UL +#define KILO 1000UL +#define HECTO 100UL +#define DECA 10UL +#define DECI 10UL +#define CENTI 100UL +#define MILLI 1000UL +#define MICRO 1000000UL +#define NANO 1000000000UL +#define PICO 1000000000000ULL +#define FEMTO 1000000000000000ULL + +#define HZ_PER_KHZ 1000UL +#define KHZ_PER_MHZ 1000UL +#define HZ_PER_MHZ 1000000UL + +#define MILLIWATT_PER_WATT 1000UL +#define MICROWATT_PER_MILLIWATT 1000UL +#define MICROWATT_PER_WATT 1000000UL + +#define ABSOLUTE_ZERO_MILLICELSIUS -273150 + +static inline long milli_kelvin_to_millicelsius(long t) +{ + return t + ABSOLUTE_ZERO_MILLICELSIUS; +} + +static inline long millicelsius_to_milli_kelvin(long t) +{ + return t - ABSOLUTE_ZERO_MILLICELSIUS; +} + +#define MILLIDEGREE_PER_DEGREE 1000 +#define MILLIDEGREE_PER_DECIDEGREE 100 + +static inline long kelvin_to_millicelsius(long t) +{ + return milli_kelvin_to_millicelsius(t * MILLIDEGREE_PER_DEGREE); +} + +static inline long millicelsius_to_kelvin(long t) +{ + t = millicelsius_to_milli_kelvin(t); + + return DIV_ROUND_CLOSEST(t, MILLIDEGREE_PER_DEGREE); +} + +static inline long deci_kelvin_to_celsius(long t) +{ + t = milli_kelvin_to_millicelsius(t * MILLIDEGREE_PER_DECIDEGREE); + + return DIV_ROUND_CLOSEST(t, MILLIDEGREE_PER_DEGREE); +} + +static inline long celsius_to_deci_kelvin(long t) +{ + t = millicelsius_to_milli_kelvin(t * MILLIDEGREE_PER_DEGREE); + + return DIV_ROUND_CLOSEST(t, MILLIDEGREE_PER_DECIDEGREE); +} + +/** + * deci_kelvin_to_millicelsius_with_offset - convert Kelvin to Celsius + * @t: temperature value in decidegrees Kelvin + * @offset: difference between Kelvin and Celsius in millidegrees + * + * Return: temperature value in millidegrees Celsius + */ +static inline long deci_kelvin_to_millicelsius_with_offset(long t, long offset) +{ + return t * MILLIDEGREE_PER_DECIDEGREE - offset; +} + +static inline long deci_kelvin_to_millicelsius(long t) +{ + return milli_kelvin_to_millicelsius(t * MILLIDEGREE_PER_DECIDEGREE); +} + +static inline long millicelsius_to_deci_kelvin(long t) +{ + t = millicelsius_to_milli_kelvin(t); + + return DIV_ROUND_CLOSEST(t, MILLIDEGREE_PER_DECIDEGREE); +} + +static inline long kelvin_to_celsius(long t) +{ + return t + DIV_ROUND_CLOSEST(ABSOLUTE_ZERO_MILLICELSIUS, + MILLIDEGREE_PER_DEGREE); +} + +static inline long celsius_to_kelvin(long t) +{ + return t - DIV_ROUND_CLOSEST(ABSOLUTE_ZERO_MILLICELSIUS, + MILLIDEGREE_PER_DEGREE); +} + +#endif /* _LINUX_UNITS_H */ diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/Makefile b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/Makefile new file mode 100644 index 00000000000..f32a305383d --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/Makefile @@ -0,0 +1,87 @@ +# SPDX-License-Identifier: GPL-2.0-only +# Copyright (C) 1999 - 2026 Intel Corporation + +src := $(realpath $(dir $(lastword $(MAKEFILE_LIST)))) + +KCOMPAT_KSRC := $(KERNEL_SRC)/source +KCOMPAT_KOBJ := $(KERNEL_SRC)/build +KCOMPAT_OUT := $(src)/kcompat_generated_defs.h +KCOMPAT_CONFIG_FILE := $(KCOMPAT_KOBJ)/include/generated/autoconf.h +PWD = $(shell pwd) + +ccflags-y += -I$(src) + +.PHONY: prepare all clean + +prepare: $(KCOMPAT_OUT) + +# kbuild part of makefile +# +# Makefile for the Intel(R) 10GbE PCI Express Linux Network Driver +# + +obj-m += wb_ixgbe.o + +define ixgbe-y + ixgbe_main.o + ixgbe_api.o + ixgbe_common.o + ixgbe_dcb.o + ixgbe_dcb_82598.o + ixgbe_dcb_82599.o + ixgbe_ethtool.o + ixgbe_lib.o + ixgbe_mbx.o + ixgbe_sriov.o + ixgbe_param.o + ixgbe_phy.o + ixgbe_procfs.o + ixgbe_xsk.o + ixgbe_82598.o + ixgbe_82599.o + ixgbe_x540.o + ixgbe_x550.o + ixgbe_e610.o + ixgbe_devlink.o + ixgbe_fw_update.o +endef +wb_ixgbe-y := $(strip ${ixgbe-y}) + +wb_ixgbe-${CONFIG_DCB} += ixgbe_dcb_nl.o + +wb_ixgbe-${CONFIG_DEBUG_FS} += ixgbe_debugfs.o + +wb_ixgbe-${CONFIG_FCOE:m=y} += ixgbe_fcoe.o + +wb_ixgbe-$(CONFIG_PTP_1588_CLOCK:m=y) += ixgbe_ptp.o +wb_ixgbe-$(CONFIG_PTP_1588_CLOCK:m=y) += ixgbe_ptp_e600.o + +wb_ixgbe-${CONFIG_SYSFS} += ixgbe_sysfs.o + +# Use kcompat pldmfw.c if kernel does not provide CONFIG_PLDMFW +ifndef CONFIG_PLDMFW +wb_ixgbe-y += kcompat_pldmfw.o +endif + +wb_ixgbe-y += kcompat.o + +# Force generation of kcompat_generated_defs.h before any ixgbe objects build +$(foreach f,$(wb_ixgbe-y) ixgbe_dcb_nl.o ixgbe_debugfs.o ixgbe_fcoe.o ixgbe_ptp.o ixgbe_ptp_e600.o ixgbe_sysfs.o kcompat_pldmfw.o, \ + $(eval $(obj)/$(f): $(KCOMPAT_OUT))) + +all: prepare + $(MAKE) -C $(KERNEL_SRC)/build M=$(PWD) modules + @if [ ! -d $(module_out_put_dir) ]; then mkdir -p $(module_out_put_dir) ;fi + cp -p $(PWD)/*.ko $(module_out_put_dir) + +$(KCOMPAT_OUT): $(src)/kcompat-generator.sh $(KCOMPAT_CONFIG_FILE) + @echo " GEN $@" + @echo " KSRC $(KCOMPAT_KSRC)" + @echo " KOBJ $(KCOMPAT_KOBJ)" + @echo " CONFIG $(KCOMPAT_CONFIG_FILE)" + @KSRC=$(KCOMPAT_KSRC) KOBJ=$(KCOMPAT_KOBJ) OUT=$(KCOMPAT_OUT) CONFIG_FILE=$(KCOMPAT_CONFIG_FILE) \ + bash $(src)/kcompat-generator.sh + + +clean: + rm -f $(PWD)/*.o $(PWD)/*.ko $(PWD)/*.mod.c $(PWD)/.*.cmd $(PWD)/*.order $(PWD)/*.mod $(PWD)/*.txt $(PWD)/*.symvers $(PWD)/kcompat_generated_defs.h diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/Module.supported b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/Module.supported new file mode 100644 index 00000000000..af247964795 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/Module.supported @@ -0,0 +1 @@ +ixgbe.ko external diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/auxiliary_compat.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/auxiliary_compat.h new file mode 100644 index 00000000000..a39cbf6a71b --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/auxiliary_compat.h @@ -0,0 +1,122 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 1999 - 2026 Intel Corporation */ + +#ifndef _AUXILIARY_COMPAT_H_ +#define _AUXILIARY_COMPAT_H_ + +/* This file contains only the minimal set of kernel compatibility backports + * required by auxiliary.c to build. It is similar to the kcompat.h file, but + * reduced to an absolute minimum in order to reduce the risk of generating + * different kernel symbol CRC values at build time. + * + * For a detailed discussion of kernel symbol CRCs, please read: + * + * Documentation/kernel-symbol-crc.rst + * + * Include only the minimum required kernel compatibility implementations from + * kcompat_generated_defs.h and kcompat_impl.h. If a new fix is required, + * please first implement it as part of the kcompat project before porting it + * to this file. + * + * The current list of required implementations is: + * + * NEED_BUS_FIND_DEVICE_CONST_DATA + * NEED_DEV_PM_DOMAIN_ATTACH + * NEED_DEV_PM_DOMAIN_DETACH + * + * Note that kernels since v5.11 support auxiliary as a built-in config + * option. Using this is always preferred to using an out-of-tree module when + * available. + */ + +#include "kcompat_generated_defs.h" + +/**************************** + * Backport implementations * + ****************************/ + +#ifdef NEED_BUS_FIND_DEVICE_CONST_DATA +/* NEED_BUS_FIND_DEVICE_CONST_DATA + * + * bus_find_device() was updated in upstream commit 418e3ea157ef + * ("bus_find_device: Unify the match callback with class_find_device") + * to take a const void *data parameter and also have the match() function + * passed in take a const void *data parameter. + * + * all of the kcompat below makes it so the caller can always just call + * bus_find_device() according to the upstream kernel without having to worry + * about const vs. non-const arguments. + */ +struct _kc_bus_find_device_custom_data { + const void *real_data; + int (*real_match)(struct device *dev, const void *data); +}; + +static inline int _kc_bus_find_device_wrapped_match(struct device *dev, void *data) +{ + struct _kc_bus_find_device_custom_data *custom_data = data; + + return custom_data->real_match(dev, custom_data->real_data); +} + +static inline struct device * +_kc_bus_find_device(struct bus_type *type, struct device *start, + const void *data, + int (*match)(struct device *dev, const void *data)) +{ + struct _kc_bus_find_device_custom_data custom_data = {}; + + custom_data.real_data = data; + custom_data.real_match = match; + + return bus_find_device(type, start, &custom_data, + _kc_bus_find_device_wrapped_match); +} + +/* force callers of bus_find_device() to call _kc_bus_find_device() on kernels + * where NEED_BUS_FIND_DEVICE_CONST_DATA is defined + */ +#define bus_find_device(type, start, data, match) \ + _kc_bus_find_device(type, start, data, match) +#endif /* NEED_BUS_FIND_DEVICE_CONST_DATA */ + +#if defined(NEED_DEV_PM_DOMAIN_ATTACH) && defined(NEED_DEV_PM_DOMAIN_DETACH) +#include +/* NEED_DEV_PM_DOMAIN_ATTACH and NEED_DEV_PM_DOMAIN_DETACH + * + * dev_pm_domain_attach() and dev_pm_domain_detach() were added in upstream + * commit 46420dd73b80 ("PM / Domains: Add APIs to attach/detach a PM domain for + * a device"). To support older kernels and OSVs that don't have these API, just + * implement how older versions worked by directly calling acpi_dev_pm_attach() + * and acpi_dev_pm_detach(). + */ +static inline int dev_pm_domain_attach(struct device *dev, bool power_on) +{ + if (dev->pm_domain) + return 0; + + if (ACPI_HANDLE(dev)) + return acpi_dev_pm_attach(dev, true); + + return 0; +} + +static inline void dev_pm_domain_detach(struct device *dev, bool power_off) +{ + if (ACPI_HANDLE(dev)) + acpi_dev_pm_detach(dev, true); +} +#else /* NEED_DEV_PM_DOMAIN_ATTACH && NEED_DEV_PM_DOMAIN_DETACH */ +/* it doesn't make sense to compat only one of these functions, and it is + * likely either a failure in kcompat-generator.sh or a failed distribution + * backport if this occurs. Don't try to support it. + */ +#ifdef NEED_DEV_PM_DOMAIN_ATTACH +#error "NEED_DEV_PM_DOMAIN_ATTACH defined but NEED_DEV_PM_DOMAIN_DETACH not defined???" +#endif /* NEED_DEV_PM_DOMAIN_ATTACH */ +#ifdef NEED_DEV_PM_DOMAIN_DETACH +#error "NEED_DEV_PM_DOMAIN_DETACH defined but NEED_DEV_PM_DOMAIN_ATTACH not defined???" +#endif /* NEED_DEV_PM_DOMAIN_DETACH */ +#endif /* NEED_DEV_PM_DOMAIN_ATTACH && NEED_DEV_PM_DOMAIN_DETACH */ + +#endif /* _AUXILIARY_COMPAT_H_ */ diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/common.mk b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/common.mk new file mode 100644 index 00000000000..92c5d3f517e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/common.mk @@ -0,0 +1,463 @@ +# SPDX-License-Identifier: GPL-2.0-only +# Copyright (C) 1999 - 2026 Intel Corporation + +# +# common Makefile rules useful for out-of-tree Linux driver builds +# +# Usage: include common.mk +# +# After including, you probably want to add a minimum_kver_check call +# +# Required Variables: +# DRIVER +# -- Set to the lowercase driver name + +##################### +# Helpful functions # +##################### + +SHELL := $(shell which bash) +src ?= $(dir $(realpath $(lastword $(MAKEFILE_LIST)))) +readlink = $(shell readlink -f ${1}) + +# helper functions for converting kernel version to version codes +get_kver = $(or $(word ${2},$(subst ., ,${1})),0) +get_kvercode = $(shell [ "${1}" -ge 0 -a "${1}" -le 255 2>/dev/null ] && \ + [ "${2}" -ge 0 -a "${2}" -le 255 2>/dev/null ] && \ + [ "${3}" -ge 0 -a "${3}" -le 255 2>/dev/null ] && \ + printf %d $$(( ( ${1} << 16 ) + ( ${2} << 8 ) + ( ${3} ) )) ) + +################ +# depmod Macro # +################ + +cmd_depmod = /sbin/depmod $(if ${SYSTEM_MAP_FILE},-e -F ${SYSTEM_MAP_FILE}) \ + $(if $(strip ${INSTALL_MOD_PATH}),-b ${INSTALL_MOD_PATH}) \ + -a ${KVER} + +##################### +# Environment tests # +##################### + +DRIVER_UPPERCASE := $(shell echo ${DRIVER} | tr "[:lower:]" "[:upper:]") + +ifeq (,${BUILD_KERNEL}) +BUILD_KERNEL=$(shell uname -r) +endif + +# Kernel Search Path +# All the places we look for kernel source +KSP := /lib/modules/${BUILD_KERNEL}/source \ + /lib/modules/${BUILD_KERNEL}/build \ + /usr/src/linux-${BUILD_KERNEL} \ + /usr/src/kernel-headers-${BUILD_KERNEL} \ + /usr/src/kernel-source-${BUILD_KERNEL} \ + /usr/src/linux \ + /usr/src/kernels/${BUILD_KERNEL} \ + /usr/src/kernels + +# prune the list down to only values that exist and have an include/linux +# sub-directory. We can't use include/config because some older kernels don't +# have this. +test_dir = $(shell [ -e ${dir}/include/linux ] && echo ${dir}) +KSP := $(foreach dir, ${KSP}, ${test_dir}) + +# we will use this first valid entry in the search path +ifeq (,${KSRC}) + KSRC := $(firstword ${KSP}) +endif + +ifeq (,${KSRC}) + $(warning *** Kernel header files not in any of the expected locations.) + $(warning *** Install the appropriate kernel development package, e.g.) + $(error kernel-devel, for building kernel modules and try again) +else +ifeq (/lib/modules/${BUILD_KERNEL}/source, ${KSRC}) + KOBJ := /lib/modules/${BUILD_KERNEL}/build +else + KOBJ := ${KSRC} +endif +endif + +SCRIPT_PATH := ${KSRC}/scripts +info_signed_modules = + +ifeq (,${SCRIPT_PATH}) + info_signed_modules += echo "*** Could not find sign-file script. Cannot sign driver." ; +else + SIGN_FILE_EXISTS := $(or $(and $(wildcard $(SCRIPT_PATH)/sign-file),1),) + PRIV_KEY_EXISTS := $(or $(and $(wildcard intel-linux-key.key),1),) + PUB_KEY_EXISTS := $(or $(and $(wildcard intel-linux-key.crt),1),) +ifneq ($(and $(SIGN_FILE_EXISTS),$(PRIV_KEY_EXISTS),$(PUB_KEY_EXISTS)),) + info_signed_modules += \ + echo "*** Is sign-file present: ${SIGN_FILE_EXISTS}" ; \ + echo "*** Is private key present: ${PRIV_KEY_EXISTS}" ; \ + echo "*** Is public key present: ${PUB_KEY_EXISTS}" ; + info_signed_modules += echo "*** All files are present, signing driver." ; + sign_driver = $(shell ${SCRIPT_PATH}/sign-file sha256 intel-linux-key.key \ + intel-linux-key.crt ${DRIVER}.ko) +else + info_signed_modules += echo "*** Files are missing, cannot sign driver." ; + sign_driver = +endif +endif + +# Version file Search Path +VSP := ${KOBJ}/include/generated/utsrelease.h \ + ${KOBJ}/include/linux/utsrelease.h \ + ${KOBJ}/include/linux/version.h \ + ${KOBJ}/include/generated/uapi/linux/version.h \ + /boot/vmlinuz.version.h + +# Config file Search Path +CSP := ${KOBJ}/include/generated/autoconf.h \ + ${KOBJ}/include/linux/autoconf.h \ + /boot/vmlinuz.autoconf.h + +# System.map Search Path (for depmod) +MSP := ${KSRC}/System.map \ + /usr/lib/debug/boot/System.map-${BUILD_KERNEL} \ + /boot/System.map-${BUILD_KERNEL} + +# prune the lists down to only files that exist +test_file = $(shell [ -f ${1} ] && echo ${1}) +VSP := $(foreach file, ${VSP}, $(call test_file,${file})) +CSP := $(foreach file, ${CSP}, $(call test_file,${file})) +MSP := $(foreach file, ${MSP}, $(call test_file,${file})) + + +# and use the first valid entry in the Search Paths +ifeq (,${VERSION_FILE}) + VERSION_FILE := $(firstword ${VSP}) +endif + +ifeq (,${CONFIG_FILE}) + CONFIG_FILE := $(firstword ${CSP}) +endif + +ifeq (,${SYSTEM_MAP_FILE}) + SYSTEM_MAP_FILE := $(firstword ${MSP}) +endif + +ifeq (,$(wildcard ${VERSION_FILE})) + $(error Linux kernel source not configured - missing version header file) +endif + +ifeq (,$(wildcard ${CONFIG_FILE})) + $(error Linux kernel source not configured - missing autoconf.h) +endif + +ifeq (,$(wildcard ${SYSTEM_MAP_FILE})) + $(warning Missing System.map file - depmod will not check for missing symbols during module installation) +endif + +ifneq ($(words $(subst :, ,$(CURDIR))), 1) + $(error Sources directory '$(CURDIR)' cannot contain spaces nor colons. Rename directory or move sources to another path) +endif + +######################## +# Extract config value # +######################## + +get_config_value = $(shell ${CC} -E -dM ${CONFIG_FILE} 2> /dev/null |\ + grep -m 1 ${1} | awk '{ print $$3 }') + +################ +# dracut Macro # +################ + +cmd_initrd := $(shell \ + if [[ ${KOBJ} != /lib/modules/${BUILD_KERNEL}/* ]]; then \ + echo ""; \ + elif which dracut > /dev/null 2>&1 ; then \ + echo "dracut --force --kver ${BUILD_KERNEL}"; \ + elif which update-initramfs > /dev/null 2>&1 ; then \ + echo "update-initramfs -u -k ${BUILD_KERNEL}"; \ + fi ) + +######################## +# Check module signing # +######################## + +CONFIG_MODULE_SIG_ALL := $(call get_config_value,CONFIG_MODULE_SIG_ALL) +CONFIG_MODULE_SIG_FORCE := $(call get_config_value,CONFIG_MODULE_SIG_FORCE) +CONFIG_MODULE_SIG_KEY := $(call get_config_value,CONFIG_MODULE_SIG_KEY) + +SIG_KEY_SP := ${KOBJ}/${CONFIG_MODULE_SIG_KEY} \ + ${KOBJ}/certs/signing_key.pem + +SIG_KEY_FILE := $(firstword $(foreach file, ${SIG_KEY_SP}, $(call test_file,${file}))) + +# print a warning if the kernel configuration attempts to sign modules but +# the signing key can't be found. +ifneq (${SIG_KEY_FILE},) +warn_signed_modules := : ; +else +warn_signed_modules := +ifeq (${CONFIG_MODULE_SIG_ALL},1) +warn_signed_modules += \ + echo "*** The target kernel has CONFIG_MODULE_SIG_ALL enabled, but" ; \ + echo "*** the signing key cannot be found. Module signing has been" ; \ + echo "*** disabled for this build." ; +endif # CONFIG_MODULE_SIG_ALL=y +ifeq (${CONFIG_MODULE_SIG_FORCE},1) + warn_signed_modules += \ + echo "warning: The target kernel has CONFIG_MODULE_SIG_FORCE enabled," ; \ + echo "warning: but the signing key cannot be found. The module must" ; \ + echo "warning: be signed manually using 'scripts/sign-file'." ; +endif # CONFIG_MODULE_SIG_FORCE +DISABLE_MODULE_SIGNING := Yes +endif + +####################### +# Linux Version Setup # +####################### + +# The following command line parameter is intended for development of KCOMPAT +# against upstream kernels such as net-next which have broken or non-updated +# version codes in their Makefile. They are intended for debugging and +# development purpose only so that we can easily test new KCOMPAT early. If you +# don't know what this means, you do not need to set this flag. There is no +# arcane magic here. + +# Convert LINUX_VERSION into LINUX_VERSION_CODE +ifneq (${LINUX_VERSION},) + LINUX_VERSION_CODE=$(call get_kvercode,$(call get_kver,${LINUX_VERSION},1),$(call get_kver,${LINUX_VERSION},2),$(call get_kver,${LINUX_VERSION},3)) +endif + +# Honor LINUX_VERSION_CODE +ifneq (${LINUX_VERSION_CODE},) + $(warning Forcing target kernel to build with LINUX_VERSION_CODE of ${LINUX_VERSION_CODE}$(if ${LINUX_VERSION}, from LINUX_VERSION=${LINUX_VERSION}). Do this at your own risk.) + KVER_CODE := ${LINUX_VERSION_CODE} + EXTRA_CFLAGS += -DLINUX_VERSION_CODE=${LINUX_VERSION_CODE} +endif + +# Determine SLE_KERNEL_REVISION for SuSE SLE >= 11 (needed by kcompat) +# This assumes SuSE will continue setting CONFIG_LOCALVERSION to the string +# appended to the stable kernel version on which their kernel is based with +# additional versioning information (up to 3 numbers), a possible abbreviated +# git SHA1 commit id and a kernel type, e.g. CONFIG_LOCALVERSION=-1.2.3-default +# or CONFIG_LOCALVERSION=-999.gdeadbee-default +# SLE >= 15SP3 added additional information about version and service pack +# to their kernel version e.g CONFIG_LOCALVERSION=-150300.59.43.1-default +# +# SLE_LOCALVERSION_CODE is also exported to support legacy kcompat.h +# definitions. +ifeq (1,$(call get_config_value,CONFIG_SUSE_KERNEL)) + +ifneq (10,$(call get_config_value,CONFIG_SLE_VERSION)) + + CONFIG_LOCALVERSION := $(call get_config_value,CONFIG_LOCALVERSION) + LOCALVERSION := $(shell echo ${CONFIG_LOCALVERSION} | \ + cut -d'-' -f2 | sed 's/\.g[[:xdigit:]]\{7\}//') + LOCALVER_A := $(shell echo ${LOCALVERSION} | cut -d'.' -f1) +ifeq ($(shell test ${LOCALVER_A} -gt 65535; echo $$?),0) + LOCAL_VER_MAJOR := $(shell echo ${LOCALVER_A:0:3}) + LOCAL_VER_MINOR := $(shell echo ${LOCALVER_A:3:3}) + LOCALVER_B := $(shell echo ${LOCALVERSION} | cut -s -d'.' -f2) + LOCALVER_C := $(shell echo ${LOCALVERSION} | cut -s -d'.' -f3) + LOCALVER_D := $(shell echo ${LOCALVERSION} | cut -s -d'.' -f4) + SLE_LOCALVERSION_CODE := $(shell expr ${LOCALVER_B} \* 65536 + \ + 0${LOCALVER_C} \* 256 + 0${LOCALVER_D}) + EXTRA_CFLAGS += -DSLE_LOCALVERSION_CODE=${SLE_LOCALVERSION_CODE} + EXTRA_CFLAGS += -DSLE_KERNEL_REVISION=${LOCALVER_B} +else + LOCALVER_B := $(shell echo ${LOCALVERSION} | cut -s -d'.' -f2) + LOCALVER_C := $(shell echo ${LOCALVERSION} | cut -s -d'.' -f3) + SLE_LOCALVERSION_CODE := $(shell expr ${LOCALVER_A} \* 65536 + \ + 0${LOCALVER_B} \* 256 + 0${LOCALVER_C}) + EXTRA_CFLAGS += -DSLE_LOCALVERSION_CODE=${SLE_LOCALVERSION_CODE} + EXTRA_CFLAGS += -DSLE_KERNEL_REVISION=${LOCALVER_A} +endif +endif +endif + +EXTRA_CFLAGS += -std=gnu11 +EXTRA_CFLAGS += ${CFLAGS_EXTRA} + +# get the kernel version - we use this to find the correct install path +KVER := $(shell ${CC} ${EXTRA_CFLAGS} -E -dM ${VERSION_FILE} | grep UTS_RELEASE | \ + awk '{ print $$3 }' | sed 's/\"//g') + +# assume source symlink is the same as build, otherwise adjust KOBJ +ifneq (,$(wildcard /lib/modules/${KVER}/build)) + ifneq (${KSRC},$(call readlink,/lib/modules/${KVER}/build)) + KOBJ=/lib/modules/${KVER}/build + endif +endif + +ifeq (${KVER_CODE},) + KVER_CODE := $(shell ${CC} ${EXTRA_CFLAGS} -E -dM ${VSP} 2> /dev/null |\ + grep -m 1 LINUX_VERSION_CODE | awk '{ print $$3 }' | sed 's/\"//g') +endif + +# minimum_kver_check +# +# helper function to provide uniform output for different drivers to abort the +# build based on kernel version check. Usage: "$(call minimum_kver_check,2,6,XX)". +define _minimum_kver_check +ifeq (0,$(shell [ ${KVER_CODE} -lt $(call get_kvercode,${1},${2},${3}) ]; echo "$$?")) + $$(warning *** Aborting the build.) + $$(error This driver is not supported on kernel versions older than ${1}.${2}.${3}) +endif +endef +minimum_kver_check = $(eval $(call _minimum_kver_check,${1},${2},${3})) + +############################# +# kcompat definitions setup # +############################# + +# In most cases, kcompat flags can be checked within the driver source files +# using simple CPP checks. However, it may be necessary to check for a flag +# value within the Makefile for some specific edge cases. For example, if an +# entire feature ought to be excluded on some kernels due to missing +# functionality. +# +# To support this, kcompat_defs.h is preprocessed and converted into a word list +# that can be checked to determine whether a given kcompat feature flag will +# be defined for this kernel. +# + +# call script that populates defines automatically +$(if $(shell \ + $(if $(findstring 1,${V}),,QUIET_COMPAT=1) \ + KSRC=${KSRC} OUT=${src}/kcompat_generated_defs.h CONFIG_FILE=${CONFIG_FILE} \ + bash ${src}/kcompat-generator.sh && echo ok), , $(error kcompat-generator.sh failed)) + +################ +# Manual Pages # +################ + +MANSECTION = 7 + +ifeq (,${MANDIR}) + # find the best place to install the man page + MANPATH := $(shell (manpath 2>/dev/null || echo $MANPATH) | sed 's/:/ /g') + ifneq (,${MANPATH}) + # test based on inclusion in MANPATH + test_dir = $(findstring ${dir}, ${MANPATH}) + else + # no MANPATH, test based on directory existence + test_dir = $(shell [ -e ${dir} ] && echo ${dir}) + endif + # our preferred install path + # should /usr/local/man be in here ? + MANDIR := /usr/share/man /usr/man + MANDIR := $(foreach dir, ${MANDIR}, ${test_dir}) + MANDIR := $(firstword ${MANDIR}) +endif +ifeq (,${MANDIR}) + # fallback to /usr/man + MANDIR := /usr/man +endif + +#################### +# CCFLAGS variable # +#################### + +# set correct CCFLAGS variable for kernels older than 2.6.24 +ifeq (0,$(shell [ ${KVER_CODE} -lt $(call get_kvercode,2,6,24) ]; echo $$?)) +CCFLAGS_VAR := EXTRA_CFLAGS +else +CCFLAGS_VAR := ccflags-y +endif + +################# +# KBUILD_OUTPUT # +################# + +# Only set KBUILD_OUTPUT if the real paths of KOBJ and KSRC differ +ifneq ($(call readlink,${KSRC}),$(call readlink,${KOBJ})) +export KBUILD_OUTPUT ?= ${KOBJ} +endif + +############################ +# Module Install Directory # +############################ + +# Default to using updates/drivers/net/ethernet/intel/ path, since depmod since +# v3.1 defaults to checking updates folder first, and only checking kernels/ +# and extra afterwards. We use updates instead of kernel/* due to desire to +# prevent over-writing built-in modules files. +export INSTALL_MOD_DIR ?= updates/drivers/net/ethernet/intel/${DRIVER} + +################# +# Auxiliary Bus # +################# + +# If the check_aux_bus script exists, then this driver depends on the +# auxiliary module. Run the script to determine if we need to include +# auxiliary files with this build. +CHECK_AUX_BUS ?= ../scripts/check_aux_bus +ifneq ($(call test_file,${CHECK_AUX_BUS}),) +NEED_AUX_BUS := $(shell ${CHECK_AUX_BUS} --ksrc="${KSRC}" --build-kernel="${BUILD_KERNEL}" >/dev/null 2>&1; echo $$?) +endif # check_aux_bus exists + +# The out-of-tree auxiliary module we ship should be moved into this +# directory as part of installation. +export INSTALL_AUX_DIR ?= updates/drivers/net/ethernet/intel/auxiliary + +# If we're installing auxiliary bus out-of-tree, the following steps are +# necessary to ensure the relevant files get put in place. +AUX_BUS_HEADERS ?= linux/auxiliary_bus.h auxiliary_compat.h kcompat_generated_defs.h +ifeq (${NEED_AUX_BUS},2) +define auxiliary_post_install + install -D -m 644 Module.symvers ${INSTALL_MOD_PATH}/lib/modules/${KVER}/extern-symvers/intel_auxiliary.symvers + install -d ${INSTALL_MOD_PATH}/lib/modules/${KVER}/${INSTALL_AUX_DIR} + mv -f ${INSTALL_MOD_PATH}/lib/modules/${KVER}/${INSTALL_MOD_DIR}/intel_auxiliary.ko* \ + ${INSTALL_MOD_PATH}/lib/modules/${KVER}/${INSTALL_AUX_DIR}/ + install -d ${INSTALL_MOD_PATH}/${KSRC}/include/linux + install -D -m 644 ${AUX_BUS_HEADERS} -t ${INSTALL_MOD_PATH}/${KSRC}/include/linux +endef +else +auxiliary_post_install = +endif + +ifeq (${NEED_AUX_BUS},2) +define auxiliary_post_uninstall + rm -f ${INSTALL_MOD_PATH}/lib/modules/${KVER}/extern-symvers/intel_auxiliary.symvers + rm -f ${INSTALL_MOD_PATH}/lib/modules/${KVER}/${INSTALL_AUX_DIR}/intel_auxiliary.ko* + rm -f ${INSTALL_MOD_PATH}/${KSRC}/include/linux/auxiliary_bus.h + rm -f ${INSTALL_MOD_PATH}/${KSRC}/include/linux/auxiliary_compat.h + rm -f ${INSTALL_MOD_PATH}/${KSRC}/include/linux/kcompat_generated_defs.h +endef +else +auxiliary_post_uninstall = +endif + +ifeq (${NEED_AUX_BUS},2) +EXTRA_CFLAGS += -DUSE_INTEL_AUX_BUS +endif +###################### +# Kernel Build Macro # +###################### + +# kernel build function +# ${1} is the kernel build target +# ${2} may contain any extra rules to pass directly to the sub-make process +# +# This function is expected to be executed by +# @+$(call kernelbuild,,) +# from within a Makefile recipe. +# +# The following variables are expected to be defined for its use: +# GCC_I_SYS -- if set it will enable use of gcc-i-sys.sh wrapper to use -isystem +# CCFLAGS_VAR -- the CCFLAGS variable to set extra CFLAGS +# EXTRA_CFLAGS -- a set of extra CFLAGS to pass into the ccflags-y variable +# KSRC -- the location of the kernel source tree to build against +# DRIVER_UPPERCASE -- the uppercase name of the kernel module, set from DRIVER +# W -- if set, enables the W= kernel warnings options +# C -- if set, enables the C= kernel sparse build options +# +kernelbuild = ${Q}$(call warn_signed_modules) \ + ${MAKE} $(if ${GCC_I_SYS},CC="${GCC_I_SYS}") \ + ${CCFLAGS_VAR}="${EXTRA_CFLAGS}" \ + -C "${KSRC}" \ + CONFIG_${DRIVER_UPPERCASE}=m \ + $(if ${DISABLE_MODULE_SIGNING},CONFIG_MODULE_SIG=n) \ + $(if ${DISABLE_MODULE_SIGNING},CONFIG_MODULE_SIG_ALL=) \ + M="${CURDIR}" \ + $(if ${W},W="${W}") \ + $(if ${C},C="${C}") \ + $(if ${NEED_AUX_BUS},NEED_AUX_BUS="${NEED_AUX_BUS}") \ + ${2} ${1} diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe.h new file mode 100644 index 00000000000..00c072a1df9 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe.h @@ -0,0 +1,1547 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 1999 - 2026 Intel Corporation */ + +#ifndef _IXGBE_H_ +#define _IXGBE_H_ + +#include "kcompat.h" +#include "kcompat_kthread.h" + +#include +#include + +#include +#include +#include +#include +#ifdef SIOCETHTOOL +#include +#endif +#if defined(NETIF_F_HW_VLAN_TX) || defined(NETIF_F_HW_VLAN_CTAG_TX) +#include +#endif +/* Can't use IS_ENABLED until after kcompat is loaded */ +#if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE) +#define IXGBE_DCA +#include +#endif +#include +#include "ixgbe_dcb.h" + +#ifdef HAVE_XDP_BUFF_RXQ +#include +#endif + +#ifdef HAVE_NDO_BUSY_POLL +#include +#define BP_EXTENDED_STATS +#endif + +#ifdef HAVE_SCTP +#include +#endif + +#ifdef HAVE_INCLUDE_LINUX_MDIO_H +#include +#endif + +#if IS_ENABLED(CONFIG_FCOE) +#include "ixgbe_fcoe.h" +#endif /* CONFIG_FCOE */ + +#include "ixgbe_api.h" + +#if IS_ENABLED(CONFIG_NET_DEVLINK) +#include +#endif /* CONFIG_NET_DEVLINK */ + +#include "ixgbe_e610.h" +#include "ixgbe_common.h" + +#define DPRINTK(nlevel, klevel, fmt, args...) \ + ((NETIF_MSG_##nlevel & adapter->msg_enable) ? \ + (void)(netdev_printk(KERN_##klevel, adapter->netdev, \ + "%s: " fmt, __func__, ## args)) : NULL) + +#ifdef HAVE_PTP_1588_CLOCK +#ifdef HAVE_INCLUDE_LINUX_TIMECOUNTER_H +#include +#endif /* HAVE_INCLUDE_TIMECOUNTER_H */ +#include +#include +#include +#endif + +/* Features advertised by PF driver */ +#define IXGBE_SUPPORTED_FEATURES 0 + +/* TX/RX descriptor defines */ +#define IXGBE_DEFAULT_TXD 512 +#define IXGBE_DEFAULT_TX_WORK 256 + +#define IXGBE_DEFAULT_RXD 512 + +#define IXGBE_MAX_NUM_DESCRIPTORS 4096 +#define IXGBE_MIN_NUM_DESCRIPTORS 64 + +#define IXGBE_ETH_P_LLDP 0x88CC + + +/* flow control */ +#define IXGBE_MIN_FCRTL 0x40 +#define IXGBE_MAX_FCRTL 0x7FF80 +#define IXGBE_MIN_FCRTH 0x600 +#define IXGBE_MAX_FCRTH 0x7FFF0 +#define IXGBE_DEFAULT_FCPAUSE 0xFFFF +#define IXGBE_MIN_FCPAUSE 0 +#define IXGBE_MAX_FCPAUSE 0xFFFF + +/* Supported Rx Buffer Sizes */ +#define IXGBE_RXBUFFER_256 256 /* Used for skb receive header */ +#define IXGBE_RXBUFFER_1536 1536 +#define IXGBE_RXBUFFER_2K 2048 +#define IXGBE_RXBUFFER_3K 3072 +#define IXGBE_RXBUFFER_4K 4096 +#ifdef CONFIG_IXGBE_DISABLE_PACKET_SPLIT +#define IXGBE_RXBUFFER_7K 7168 +#define IXGBE_RXBUFFER_8K 8192 +#define IXGBE_RXBUFFER_15K 15360 +#endif /* CONFIG_IXGBE_DISABLE_PACKET_SPLIT */ +#define IXGBE_MAX_RXBUFFER 16384 /* largest size for single descriptor */ + +/* Attempt to maximize the headroom available for incoming frames. We + * use a 2K buffer for receives and need 1536/1534 to store the data for + * the frame. This leaves us with 512 bytes of room. From that we need + * to deduct the space needed for the shared info and the padding needed + * to IP align the frame. + * + * Note: For cache line sizes 256 or larger this value is going to end + * up negative. In these cases we should fall back to the 3K + * buffers. + */ +#if (PAGE_SIZE < 8192) +#define IXGBE_MAX_2K_FRAME_BUILD_SKB (IXGBE_RXBUFFER_1536 - NET_IP_ALIGN) +#define IXGBE_2K_TOO_SMALL_WITH_PADDING \ +((NET_SKB_PAD + IXGBE_RXBUFFER_1536) > SKB_WITH_OVERHEAD(IXGBE_RXBUFFER_2K)) + +static inline int ixgbe_compute_pad(int rx_buf_len) +{ + int page_size, pad_size; + + page_size = ALIGN(rx_buf_len, PAGE_SIZE / 2); + pad_size = SKB_WITH_OVERHEAD(page_size) - rx_buf_len; + + return pad_size; +} + +static inline int ixgbe_skb_pad(void) +{ + int rx_buf_len; + + /* If a 2K buffer cannot handle a standard Ethernet frame then + * optimize padding for a 3K buffer instead of a 1.5K buffer. + * + * For a 3K buffer we need to add enough padding to allow for + * tailroom due to NET_IP_ALIGN possibly shifting us out of + * cache-line alignment. + */ + if (IXGBE_2K_TOO_SMALL_WITH_PADDING) + rx_buf_len = IXGBE_RXBUFFER_3K + SKB_DATA_ALIGN(NET_IP_ALIGN); + else + rx_buf_len = IXGBE_RXBUFFER_1536; + + /* if needed make room for NET_IP_ALIGN */ + rx_buf_len -= NET_IP_ALIGN; + + return ixgbe_compute_pad(rx_buf_len); +} + +#define IXGBE_SKB_PAD ixgbe_skb_pad() +#else +#define IXGBE_SKB_PAD (NET_SKB_PAD + NET_IP_ALIGN) +#endif + +/* + * NOTE: netdev_alloc_skb reserves up to 64 bytes, NET_IP_ALIGN means we + * reserve 64 more, and skb_shared_info adds an additional 320 bytes more, + * this adds up to 448 bytes of extra data. + * + * Since netdev_alloc_skb now allocates a page fragment we can use a value + * of 256 and the resultant skb will have a truesize of 960 or less. + */ +#define IXGBE_RX_HDR_SIZE IXGBE_RXBUFFER_256 + +#define MAXIMUM_ETHERNET_VLAN_SIZE (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN) + +/* How many Rx Buffers do we bundle into one write to the hardware ? */ +#define IXGBE_RX_BUFFER_WRITE 16 /* Must be power of 2 */ + +#ifdef HAVE_STRUCT_DMA_ATTRS +#define IXGBE_RX_DMA_ATTR NULL +#else +#define IXGBE_RX_DMA_ATTR \ + (DMA_ATTR_SKIP_CPU_SYNC | DMA_ATTR_WEAK_ORDERING) +#endif + +/* assume the kernel supports 8021p to avoid stripping vlan tags */ +#ifdef IXGBE_DISABLE_8021P_SUPPORT +#ifndef HAVE_8021P_SUPPORT +#define HAVE_8021P_SUPPORT +#endif +#endif /* IXGBE_DISABLE_8021P_SUPPORT */ + +enum ixgbe_tx_flags { + /* cmd_type flags */ + IXGBE_TX_FLAGS_HW_VLAN = 0x01, + IXGBE_TX_FLAGS_TSO = 0x02, + IXGBE_TX_FLAGS_TSTAMP = 0x04, + + /* olinfo flags */ + IXGBE_TX_FLAGS_CC = 0x08, + IXGBE_TX_FLAGS_IPV4 = 0x10, + IXGBE_TX_FLAGS_CSUM = 0x20, + + /* software defined flags */ + IXGBE_TX_FLAGS_SW_VLAN = 0x40, + IXGBE_TX_FLAGS_FCOE = 0x80, +}; + +/* VLAN info */ +#define IXGBE_TX_FLAGS_VLAN_MASK 0xffff0000 +#define IXGBE_TX_FLAGS_VLAN_PRIO_MASK 0xe0000000 +#define IXGBE_TX_FLAGS_VLAN_PRIO_SHIFT 29 +#define IXGBE_TX_FLAGS_VLAN_SHIFT 16 + +#define IXGBE_MAX_RX_DESC_POLL 10 + +#define IXGBE_MAX_VF_MC_ENTRIES 30 +#define IXGBE_MAX_VF_FUNCTIONS 64 +#define IXGBE_MAX_VFTA_ENTRIES 128 +#define MAX_EMULATION_MAC_ADDRS 16 +#define IXGBE_MAX_PF_MACVLANS 15 + +/* must account for pools assigned to VFs. */ +#ifdef CONFIG_PCI_IOV +#define VMDQ_P(p) ((p) + adapter->ring_feature[RING_F_VMDQ].offset) +#else +#define VMDQ_P(p) (p) +#endif + +#define UPDATE_VF_COUNTER_32bit(reg, last_counter, counter) \ + { \ + u32 current_counter = IXGBE_READ_REG(hw, reg); \ + if (current_counter < last_counter) \ + counter += 0x100000000LL; \ + last_counter = current_counter; \ + counter &= 0xFFFFFFFF00000000LL; \ + counter |= current_counter; \ + } + +#define UPDATE_VF_COUNTER_36bit(reg_lsb, reg_msb, last_counter, counter) \ + { \ + u64 current_counter_lsb = IXGBE_READ_REG(hw, reg_lsb); \ + u64 current_counter_msb = IXGBE_READ_REG(hw, reg_msb); \ + u64 current_counter = (current_counter_msb << 32) | \ + current_counter_lsb; \ + if (current_counter < last_counter) \ + counter += 0x1000000000LL; \ + last_counter = current_counter; \ + counter &= 0xFFFFFFF000000000LL; \ + counter |= current_counter; \ + } + +struct vf_stats { + u64 gprc; + u64 gorc; + u64 gptc; + u64 gotc; + u64 mprc; +}; + +struct vf_data_storage { + struct pci_dev *vfdev; + unsigned char vf_mac_addresses[ETH_ALEN]; + u16 vf_mc_hashes[IXGBE_MAX_VF_MC_ENTRIES]; + u16 num_vf_mc_hashes; + bool clear_to_send; + struct vf_stats vfstats; + struct vf_stats last_vfstats; + struct vf_stats saved_rst_vfstats; + bool pf_set_mac; + u16 pf_vlan; /* When set, guest VLAN config not allowed. */ + u16 pf_qos; + u16 tx_rate; + int link_enable; +#ifdef HAVE_NDO_SET_VF_LINK_STATE + int link_state; +#endif + u8 spoofchk_enabled; +#ifdef HAVE_NDO_SET_VF_RSS_QUERY_EN + bool rss_query_enabled; +#endif + u8 trusted; + int xcast_mode; + unsigned int vf_api; + u8 primary_abort_count; +}; + +struct vf_macvlans { + struct list_head l; + int vf; + bool free; + bool is_macvlan; + u8 vf_macvlan[ETH_ALEN]; +}; + +#define IXGBE_MAX_TXD_PWR 14 +#define IXGBE_MAX_DATA_PER_TXD (1 << IXGBE_MAX_TXD_PWR) + +/* Tx Descriptors needed, worst case */ +#define TXD_USE_COUNT(S) DIV_ROUND_UP((S), IXGBE_MAX_DATA_PER_TXD) +#ifndef MAX_SKB_FRAGS +#define DESC_NEEDED 4 +#elif (MAX_SKB_FRAGS < 16) +#define DESC_NEEDED ((MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE)) + 4) +#else +#define DESC_NEEDED (MAX_SKB_FRAGS + 4) +#endif + +/* wrapper around a pointer to a socket buffer, + * so a DMA handle can be stored along with the buffer */ +struct ixgbe_tx_buffer { + union ixgbe_adv_tx_desc *next_to_watch; + unsigned long time_stamp; + union { + struct sk_buff *skb; +#ifdef HAVE_XDP_FRAME_STRUCT + struct xdp_frame *xdpf; +#else + /* XDP uses address ptr on irq_clean */ + void *data; +#endif + }; + unsigned int bytecount; + unsigned short gso_segs; + __be16 protocol; + DEFINE_DMA_UNMAP_ADDR(dma); + DEFINE_DMA_UNMAP_LEN(len); + u32 tx_flags; +}; + +struct ixgbe_rx_buffer { +#ifndef HAVE_MEM_TYPE_XSK_BUFF_POOL + struct sk_buff *skb; + dma_addr_t dma; +#endif +#ifndef CONFIG_IXGBE_DISABLE_PACKET_SPLIT + union { + struct { +#ifdef HAVE_MEM_TYPE_XSK_BUFF_POOL + struct sk_buff *skb; + dma_addr_t dma; +#endif + struct page *page; + __u32 page_offset; + __u16 pagecnt_bias; + }; +#ifdef HAVE_AF_XDP_ZC_SUPPORT + struct { +#ifndef HAVE_MEM_TYPE_XSK_BUFF_POOL + void *addr; + u64 handle; +#else + bool discard; + struct xdp_buff *xdp; +#endif + }; +#endif + }; +#endif /* CONFIG_IXGBE_DISABLE_PACKET_SPLIT */ +}; + +struct ixgbe_queue_stats { + u64 packets; + u64 bytes; +#ifdef BP_EXTENDED_STATS + u64 yields; + u64 misses; + u64 cleaned; +#endif /* BP_EXTENDED_STATS */ +}; + +struct ixgbe_tx_queue_stats { + u64 restart_queue; + u64 tx_busy; + u64 tx_done_old; +}; + +struct ixgbe_rx_queue_stats { + u64 rsc_count; + u64 rsc_flush; + u64 non_eop_descs; + u64 alloc_rx_page; + u64 alloc_rx_page_failed; + u64 alloc_rx_buff_failed; + u64 csum_err; +}; + +#define IXGBE_TS_HDR_LEN 8 +enum ixgbe_ring_state_t { +#ifndef CONFIG_IXGBE_DISABLE_PACKET_SPLIT + __IXGBE_RX_3K_BUFFER, + __IXGBE_RX_BUILD_SKB_ENABLED, +#endif + __IXGBE_RX_RSC_ENABLED, + __IXGBE_RX_CSUM_UDP_ZERO_ERR, +#if IS_ENABLED(CONFIG_FCOE) + __IXGBE_RX_FCOE, +#endif + __IXGBE_TX_FDIR_INIT_DONE, + __IXGBE_TX_XPS_INIT_DONE, + __IXGBE_TX_DETECT_HANG, + __IXGBE_HANG_CHECK_ARMED, + __IXGBE_TX_XDP_RING, +#ifdef HAVE_AF_XDP_ZC_SUPPORT + __IXGBE_TX_DISABLED, +#endif +}; +#ifndef CONFIG_IXGBE_DISABLE_PACKET_SPLIT + +#define ring_uses_build_skb(ring) \ + test_bit(__IXGBE_RX_BUILD_SKB_ENABLED, &(ring)->state) +#endif + +#define check_for_tx_hang(ring) \ + test_bit(__IXGBE_TX_DETECT_HANG, &(ring)->state) +#define set_check_for_tx_hang(ring) \ + set_bit(__IXGBE_TX_DETECT_HANG, &(ring)->state) +#define clear_check_for_tx_hang(ring) \ + clear_bit(__IXGBE_TX_DETECT_HANG, &(ring)->state) +#define ring_is_rsc_enabled(ring) \ + test_bit(__IXGBE_RX_RSC_ENABLED, &(ring)->state) +#define set_ring_rsc_enabled(ring) \ + set_bit(__IXGBE_RX_RSC_ENABLED, &(ring)->state) +#define clear_ring_rsc_enabled(ring) \ + clear_bit(__IXGBE_RX_RSC_ENABLED, &(ring)->state) +#define ring_is_xdp(ring) \ + test_bit(__IXGBE_TX_XDP_RING, &(ring)->state) +#define set_ring_xdp(ring) \ + set_bit(__IXGBE_TX_XDP_RING, &(ring)->state) +#define clear_ring_xdp(ring) \ + clear_bit(__IXGBE_TX_XDP_RING, &(ring)->state) +#define netdev_ring(ring) (ring->netdev) +#define ring_queue_index(ring) (ring->queue_index) + + +struct ixgbe_ring { + struct ixgbe_ring *next; /* pointer to next ring in q_vector */ + struct ixgbe_q_vector *q_vector; /* backpointer to host q_vector */ + struct net_device *netdev; /* netdev ring belongs to */ + struct bpf_prog *xdp_prog; + struct device *dev; /* device for DMA mapping */ + void *desc; /* descriptor ring memory */ + union { + struct ixgbe_tx_buffer *tx_buffer_info; + struct ixgbe_rx_buffer *rx_buffer_info; + }; + unsigned long state; + u8 __iomem *tail; + dma_addr_t dma; /* phys. address of descriptor ring */ + unsigned int size; /* length in bytes */ + + u16 count; /* amount of descriptors */ + + u8 queue_index; /* needed for multiqueue queue management */ + u8 reg_idx; /* holds the special value that gets + * the hardware register offset + * associated with this ring, which is + * different for DCB and RSS modes + */ + u16 next_to_use; + u16 next_to_clean; + +#ifdef HAVE_PTP_1588_CLOCK + unsigned long last_rx_timestamp; + +#endif + union { +#ifdef CONFIG_IXGBE_DISABLE_PACKET_SPLIT + u16 rx_buf_len; +#else + union { + u16 next_to_alloc; + u16 next_rs_idx; + }; +#endif + struct { + u8 atr_sample_rate; + u8 atr_count; + }; + }; + +#ifdef HAVE_XDP_SUPPORT +#ifdef HAVE_AF_XDP_ZC_SUPPORT + u16 xdp_tx_active; +#endif /* HAVE_AF_XDP_ZC_SUPPORT */ +#endif /* HAVE_XDP_SUPPORT */ + + u8 dcb_tc; + struct ixgbe_queue_stats stats; +#ifdef HAVE_NDO_GET_STATS64 + struct u64_stats_sync syncp; +#endif + union { + struct ixgbe_tx_queue_stats tx_stats; + struct ixgbe_rx_queue_stats rx_stats; + }; + u16 rx_offset; + spinlock_t tx_lock; /* used in XDP mode */ +#ifdef HAVE_XDP_BUFF_RXQ + struct xdp_rxq_info xdp_rxq; +#ifdef HAVE_AF_XDP_ZC_SUPPORT +#ifdef HAVE_NETDEV_BPF_XSK_POOL + struct xsk_buff_pool *xsk_pool; +#else + struct xdp_umem *xsk_pool; +#endif +#ifndef HAVE_MEM_TYPE_XSK_BUFF_POOL + struct zero_copy_allocator zca; /* ZC allocator anchor */ +#endif + u16 ring_idx; /* {rx,tx,xdp}_ring back reference idx */ + u16 rx_buf_len; +#endif +#endif +} ____cacheline_internodealigned_in_smp; + +enum ixgbe_ring_f_enum { + RING_F_NONE = 0, + RING_F_VMDQ, /* SR-IOV uses the same ring feature */ + RING_F_RSS, + RING_F_FDIR, +#if IS_ENABLED(CONFIG_FCOE) + RING_F_FCOE, +#endif /* CONFIG_FCOE */ + RING_F_ARRAY_SIZE /* must be last in enum set */ +}; + +#define IXGBE_MAX_DCB_INDICES 8 +#define IXGBE_MAX_RSS_INDICES 16 +#define IXGBE_MAX_RSS_INDICES_X550 63 +#define IXGBE_MAX_RSS_INDICES_E610 63 +#define IXGBE_MAX_VMDQ_INDICES 64 +#define IXGBE_MAX_FDIR_INDICES 63 +#if IS_ENABLED(CONFIG_FCOE) +#define IXGBE_MAX_FCOE_INDICES 8 +#define MAX_RX_QUEUES (IXGBE_MAX_FDIR_INDICES + IXGBE_MAX_FCOE_INDICES) +#define MAX_TX_QUEUES (IXGBE_MAX_FDIR_INDICES + IXGBE_MAX_FCOE_INDICES) +#else +#define MAX_RX_QUEUES (IXGBE_MAX_FDIR_INDICES + 1) +#define MAX_TX_QUEUES (IXGBE_MAX_FDIR_INDICES + 1) +#endif /* CONFIG_FCOE */ +#define IXGBE_MAX_XDP_QS (IXGBE_MAX_FDIR_INDICES + 1) + +#define IXGBE_MAX_TX_QUEUES 128 +#define IXGBE_MAX_TX_DESCRIPTORS 40 +#define IXGBE_MAX_TX_VF_HANGS 4 + +DECLARE_STATIC_KEY_FALSE(ixgbe_xdp_locking_key); + +struct ixgbe_ring_feature { + u16 limit; /* upper limit on feature indices */ + u16 indices; /* current value of indices */ + u16 mask; /* Mask used for feature to ring mapping */ + u16 offset; /* offset to start of feature */ +}; + +#define IXGBE_82599_VMDQ_8Q_MASK 0x78 +#define IXGBE_82599_VMDQ_4Q_MASK 0x7C +#define IXGBE_82599_VMDQ_2Q_MASK 0x7E + +#ifndef CONFIG_IXGBE_DISABLE_PACKET_SPLIT +/* + * FCoE requires that all Rx buffers be over 2200 bytes in length. Since + * this is twice the size of a half page we need to double the page order + * for FCoE enabled Rx queues. + */ +static inline unsigned int ixgbe_rx_bufsz(struct ixgbe_ring __maybe_unused *ring) +{ +#if MAX_SKB_FRAGS < 8 + return ALIGN(IXGBE_MAX_RXBUFFER / MAX_SKB_FRAGS, 1024); +#else + if (test_bit(__IXGBE_RX_3K_BUFFER, &ring->state)) + return IXGBE_RXBUFFER_3K; +#if (PAGE_SIZE < 8192) + if (ring_uses_build_skb(ring)) + return IXGBE_MAX_2K_FRAME_BUILD_SKB; +#endif + return IXGBE_RXBUFFER_2K; +#endif +} + +static inline unsigned int ixgbe_rx_pg_order(struct ixgbe_ring __maybe_unused *ring) +{ +#if (PAGE_SIZE < 8192) + if (test_bit(__IXGBE_RX_3K_BUFFER, &ring->state)) + return 1; +#endif + return 0; +} +#define ixgbe_rx_pg_size(_ring) (PAGE_SIZE << ixgbe_rx_pg_order(_ring)) + +#else +static inline unsigned int ixgbe_rx_bufsz(struct ixgbe_ring *ring) +{ + return ring->rx_buf_len; +} +#endif +#define IXGBE_ITR_ADAPTIVE_MIN_INC 2 +#define IXGBE_ITR_ADAPTIVE_MIN_USECS 10 +#define IXGBE_ITR_ADAPTIVE_MAX_USECS 84 +#define IXGBE_ITR_ADAPTIVE_LATENCY 0x80 +#define IXGBE_ITR_ADAPTIVE_BULK 0x00 +#define IXGBE_ITR_ADAPTIVE_MASK_USECS (IXGBE_ITR_ADAPTIVE_LATENCY - \ + IXGBE_ITR_ADAPTIVE_MIN_INC) + +struct ixgbe_ring_container { + struct ixgbe_ring *ring; /* pointer to linked list of rings */ + unsigned long next_update; /* jiffies value of last update */ + unsigned int total_bytes; /* total bytes processed this int */ + unsigned int total_packets; /* total packets processed this int */ + u16 work_limit; /* total work allowed per interrupt */ + u8 count; /* total number of rings in vector */ + u8 itr; /* current ITR setting for ring */ +}; + +#define ixgbe_pf_to_dev(pf) (&((pf)->pdev->dev)) + +/* iterator for handling rings in ring container */ +#define ixgbe_for_each_ring(pos, head) \ + for (pos = (head).ring; pos != NULL; pos = pos->next) + +#define MAX_RX_PACKET_BUFFERS ((adapter->flags & IXGBE_FLAG_DCB_ENABLED) \ + ? 8 : 1) +#define MAX_TX_PACKET_BUFFERS MAX_RX_PACKET_BUFFERS + +#define IXGBE_IFNAMSIZ (IFNAMSIZ + 9) + +/* MAX_MSIX_Q_VECTORS of these are allocated, + * but we only use one per queue-specific vector. + */ +struct ixgbe_q_vector { + struct ixgbe_adapter *adapter; + int cpu; /* CPU for DCA */ + u16 v_idx; /* index of q_vector within array, also used for + * finding the bit in EICR and friends that + * represents the vector for this ring */ + u16 itr; /* Interrupt throttle rate written to EITR */ + struct ixgbe_ring_container rx, tx; + + struct napi_struct napi; +#ifndef HAVE_NETDEV_NAPI_LIST + struct net_device poll_dev; +#endif +#ifdef HAVE_IRQ_AFFINITY_HINT + cpumask_t affinity_mask; +#endif + int node; + struct rcu_head rcu; /* to avoid race with update stats on free */ + char name[IXGBE_IFNAMSIZ]; + bool netpoll_rx; + +#ifdef HAVE_NDO_BUSY_POLL + atomic_t state; +#endif /* HAVE_NDO_BUSY_POLL */ +#ifdef HAVE_PTP_1588_CLOCK + struct list_head ptp_skbs_e600; + spinlock_t ptp_skbs_lock_e600; /* Protects ptp_skbs_e600 access. */ + bool ptp_hold_rx_skb : 1; +#endif /* HAVE_PTP_1588_CLOCK */ + + /* for dynamic allocation of rings associated with this q_vector */ + struct ixgbe_ring ring[0] ____cacheline_internodealigned_in_smp; +}; + +#ifdef HAVE_NDO_BUSY_POLL +enum ixgbe_qv_state_t { + IXGBE_QV_STATE_IDLE = 0, + IXGBE_QV_STATE_NAPI, + IXGBE_QV_STATE_POLL, + IXGBE_QV_STATE_DISABLE +}; + +static inline void ixgbe_qv_init_lock(struct ixgbe_q_vector *q_vector) +{ + /* reset state to idle */ + atomic_set(&q_vector->state, IXGBE_QV_STATE_IDLE); +} + +/* called from the device poll routine to get ownership of a q_vector */ +static inline bool ixgbe_qv_lock_napi(struct ixgbe_q_vector *q_vector) +{ + int rc = atomic_cmpxchg(&q_vector->state, IXGBE_QV_STATE_IDLE, + IXGBE_QV_STATE_NAPI); +#ifdef BP_EXTENDED_STATS + if (rc != IXGBE_QV_STATE_IDLE) + q_vector->tx.ring->stats.yields++; +#endif + + return rc == IXGBE_QV_STATE_IDLE; +} + +/* returns true is someone tried to get the qv while napi had it */ +static inline void ixgbe_qv_unlock_napi(struct ixgbe_q_vector *q_vector) +{ + WARN_ON(atomic_read(&q_vector->state) != IXGBE_QV_STATE_NAPI); + + /* flush any outstanding Rx frames */ + if (q_vector->napi.gro_list) + napi_gro_flush(&q_vector->napi, false); + + /* reset state to idle */ + atomic_set(&q_vector->state, IXGBE_QV_STATE_IDLE); +} + +/* called from ixgbe_low_latency_poll() */ +static inline bool ixgbe_qv_lock_poll(struct ixgbe_q_vector *q_vector) +{ + int rc = atomic_cmpxchg(&q_vector->state, IXGBE_QV_STATE_IDLE, + IXGBE_QV_STATE_POLL); +#ifdef BP_EXTENDED_STATS + if (rc != IXGBE_QV_STATE_IDLE) + q_vector->rx.ring->stats.yields++; +#endif + return rc == IXGBE_QV_STATE_IDLE; +} + +/* returns true if someone tried to get the qv while it was locked */ +static inline void ixgbe_qv_unlock_poll(struct ixgbe_q_vector *q_vector) +{ + WARN_ON(atomic_read(&q_vector->state) != IXGBE_QV_STATE_POLL); + + /* reset state to idle */ + atomic_set(&q_vector->state, IXGBE_QV_STATE_IDLE); +} + +/* true if a socket is polling, even if it did not get the lock */ +static inline bool ixgbe_qv_busy_polling(struct ixgbe_q_vector *q_vector) +{ + return atomic_read(&q_vector->state) == IXGBE_QV_STATE_POLL; +} + +/* false if QV is currently owned */ +static inline bool ixgbe_qv_disable(struct ixgbe_q_vector *q_vector) +{ + int rc = atomic_cmpxchg(&q_vector->state, IXGBE_QV_STATE_IDLE, + IXGBE_QV_STATE_DISABLE); + + return rc == IXGBE_QV_STATE_IDLE; +} + +#endif /* HAVE_NDO_BUSY_POLL */ +#ifdef IXGBE_HWMON + +#define IXGBE_HWMON_TYPE_LOC 0 +#define IXGBE_HWMON_TYPE_TEMP 1 +#define IXGBE_HWMON_TYPE_CAUTION 2 +#define IXGBE_HWMON_TYPE_MAX 3 + +struct hwmon_attr { + struct device_attribute dev_attr; + struct ixgbe_hw *hw; + struct ixgbe_thermal_diode_data *sensor; + char name[12]; +}; + +struct hwmon_buff { +#ifdef HAVE_HWMON_DEVICE_REGISTER_WITH_GROUPS + struct attribute_group group; + const struct attribute_group *groups[2]; + struct attribute *attrs[IXGBE_MAX_SENSORS * 4 + 1]; + struct hwmon_attr hwmon_list[IXGBE_MAX_SENSORS * 4]; +#else + struct device *device; + struct hwmon_attr *hwmon_list; +#endif /* HAVE_HWMON_DEVICE_REGISTER_WITH_GROUPS */ + unsigned int n_hwmon; +}; +#endif /* IXGBE_HWMON */ + +struct ixgbe_fwlog_user_input { + unsigned long events; +#define IXGBE_FWLOG_METHOD_ARQ 0 +#define IXGBE_FWLOG_METHOD_UART 1 + u8 log_method; + u8 log_level; +}; + +/* + * microsecond values for various ITR rates shifted by 2 to fit itr register + * with the first 3 bits reserved 0 + */ +#define IXGBE_MIN_RSC_ITR 24 +#define IXGBE_100K_ITR 40 +#define IXGBE_20K_ITR 200 +#define IXGBE_16K_ITR 248 +#define IXGBE_12K_ITR 336 + +/* ixgbe_test_staterr - tests bits in Rx descriptor status and error fields */ +static inline __le32 ixgbe_test_staterr(union ixgbe_adv_rx_desc *rx_desc, + const u32 stat_err_bits) +{ + return rx_desc->wb.upper.status_error & cpu_to_le32(stat_err_bits); +} + +/* ixgbe_desc_unused - calculate if we have unused descriptors */ +static inline u16 ixgbe_desc_unused(struct ixgbe_ring *ring) +{ + u16 ntc = ring->next_to_clean; + u16 ntu = ring->next_to_use; + + return ((ntc > ntu) ? 0 : ring->count) + ntc - ntu - 1; +} + +#define IXGBE_RX_DESC(R, i) \ + (&(((union ixgbe_adv_rx_desc *)((R)->desc))[i])) +#define IXGBE_TX_DESC(R, i) \ + (&(((union ixgbe_adv_tx_desc *)((R)->desc))[i])) +#define IXGBE_TX_CTXTDESC(R, i) \ + (&(((struct ixgbe_adv_tx_context_desc *)((R)->desc))[i])) + +#define IXGBE_MAX_JUMBO_FRAME_SIZE 9728 +#if IS_ENABLED(CONFIG_FCOE) +/* use 3K as the baby jumbo frame size for FCoE */ +#define IXGBE_FCOE_JUMBO_FRAME_SIZE 3072 +#endif /* CONFIG_FCOE */ + +#define TCP_TIMER_VECTOR 0 +#define OTHER_VECTOR 1 +#define NON_Q_VECTORS (OTHER_VECTOR + TCP_TIMER_VECTOR) + +#define IXGBE_MAX_MSIX_Q_VECTORS_82599 64 +#define IXGBE_MAX_MSIX_Q_VECTORS_82598 16 + +struct ixgbe_mac_addr { + u8 addr[ETH_ALEN]; + u16 pool; + u16 state; /* bitmask */ +}; + +#define IXGBE_MAC_STATE_DEFAULT 0x1 +#define IXGBE_MAC_STATE_MODIFIED 0x2 +#define IXGBE_MAC_STATE_IN_USE 0x4 + +#ifdef IXGBE_PROCFS +struct ixgbe_therm_proc_data { + struct ixgbe_hw *hw; + struct ixgbe_thermal_diode_data *sensor_data; +}; + +#endif /* IXGBE_PROCFS */ +/* + * Only for array allocations in our adapter struct. On 82598, there will be + * unused entries in the array, but that's not a big deal. Also, in 82599, + * we can actually assign 64 queue vectors based on our extended-extended + * interrupt registers. This is different than 82598, which is limited to 16. + */ +#define MAX_MSIX_Q_VECTORS IXGBE_MAX_MSIX_Q_VECTORS_82599 +#define MAX_MSIX_COUNT IXGBE_MAX_MSIX_VECTORS_82599 + + +#define MIN_MSIX_Q_VECTORS 1 +#define MIN_MSIX_COUNT (MIN_MSIX_Q_VECTORS + NON_Q_VECTORS) + +/* default to trying for four seconds */ +#define IXGBE_TRY_LINK_TIMEOUT (4 * HZ) +#define IXGBE_SFP_POLL_JIFFIES (2 * HZ) /* SFP poll every 2 seconds */ + +#define IXGBE_PRIMARY_ABORT_LIMIT 5 + +enum ixgbe_state_t { + __IXGBE_TESTING, + __IXGBE_RESETTING, + __IXGBE_DOWN, + __IXGBE_DISABLED, + __IXGBE_REMOVING, + __IXGBE_SERVICE_SCHED, + __IXGBE_SERVICE_INITED, + __IXGBE_IN_SFP_INIT, +#ifdef HAVE_PTP_1588_CLOCK + __IXGBE_PTP_RUNNING, + __IXGBE_PTP_TX_IN_PROGRESS, +#endif + __IXGBE_RESET_REQUESTED, + __IXGBE_STATE_T_NUM /* Must be last */ +}; + +#ifdef HAVE_PTP_1588_CLOCK +/** struct ixgbe_rx_phy_ts_skb_e610 - tracker for E610 PHY Rx timestamps or Rx + * PTP skbs + * + * This structure contains data for tracking Rx PTP packets. It's used either + * for a single Rx PTP skb or for a single Rx timestamp from the PHY. + * + * @list: list member structure + * @ns: Rx timestamp in nanoseconds + * @skb: Rx PTP skb + * @acquired: time when TS/skb was acquired in jiffies + * @seq_id: Rx TS/skb sequence ID + */ +struct ixgbe_rx_phy_ts_skb_e610 { + struct list_head list; + union { + u64 ns; + struct sk_buff *skb; + }; + unsigned long acquired; + u16 seq_id; +}; + +struct ixgbe_ptp_e600 { + bool ptp_by_phy_ena : 1; + bool vlan_ena : 1; + atomic_t vlan_change; + atomic_t reinit_phy_tod; + u16 ptp_seq_id; + u16 max_drift_threshold; + struct ptp_pin_desc pin_config[1]; + struct list_head rx_tstamps; + spinlock_t rx_tstamps_lock; /* Protects rx_tstamps access. */ +#ifndef HAVE_PTP_CANCEL_WORKER_SYNC + struct kthread_worker *ptp_kworker; + struct kthread_delayed_work ptp_aux_work; +#endif /* !HAVE_PTP_CANCEL_WORKER_SYNC */ +}; +#endif /* HAVE_PTP_1588_CLOCK */ +enum ixgbe_eee_state { + IXGBE_EEE_DISABLED, /* EEE explicitly disabled by user */ + IXGBE_EEE_ENABLED, /* EEE enabled under condition that link + * requirements are met; for E610 it's the + * default state. + */ + IXGBE_EEE_FORCED_DOWN, /* EEE disabled by link conditions, try to + * restore when possible + */ +}; + +/* board specific private data structure */ +struct ixgbe_adapter { +#if defined(NETIF_F_HW_VLAN_TX) || defined(NETIF_F_HW_VLAN_CTAG_TX) +#ifdef HAVE_VLAN_RX_REGISTER + struct vlan_group *vlgrp; /* must be first, see ixgbe_receive_skb */ +#else + unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)]; +#endif +#endif /* NETIF_F_HW_VLAN_TX || NETIF_F_HW_VLAN_CTAG_TX */ + /* OS defined structs */ + struct net_device *netdev; + struct bpf_prog *xdp_prog; + struct pci_dev *pdev; + + DECLARE_BITMAP(state, __IXGBE_STATE_T_NUM); + enum ixgbe_eee_state eee_state; + /* Some features need tri-state capability, + * thus the additional *_CAPABLE flags. + */ + u32 flags; +#define IXGBE_FLAG_MSI_CAPABLE (u32)(1 << 0) +#define IXGBE_FLAG_MSI_ENABLED (u32)(1 << 1) +#define IXGBE_FLAG_MSIX_CAPABLE (u32)(1 << 2) +#define IXGBE_FLAG_MSIX_ENABLED (u32)(1 << 3) +#ifndef IXGBE_NO_LLI +#define IXGBE_FLAG_LLI_PUSH (u32)(1 << 4) +#endif + +#if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE) +#define IXGBE_FLAG_DCA_ENABLED (u32)(1 << 6) +#define IXGBE_FLAG_DCA_CAPABLE (u32)(1 << 7) +#define IXGBE_FLAG_DCA_ENABLED_DATA (u32)(1 << 8) +#else +#define IXGBE_FLAG_DCA_ENABLED (u32)0 +#define IXGBE_FLAG_DCA_CAPABLE (u32)0 +#define IXGBE_FLAG_DCA_ENABLED_DATA (u32)0 +#endif +#define IXGBE_FLAG_MQ_CAPABLE (u32)(1 << 9) +#define IXGBE_FLAG_DCB_ENABLED (u32)(1 << 10) +#define IXGBE_FLAG_VMDQ_ENABLED (u32)(1 << 11) +#define IXGBE_FLAG_FAN_FAIL_CAPABLE (u32)(1 << 12) +#define IXGBE_FLAG_NEED_LINK_UPDATE (u32)(1 << 13) +#define IXGBE_FLAG_NEED_LINK_CONFIG (u32)(1 << 14) +#define IXGBE_FLAG_FDIR_HASH_CAPABLE (u32)(1 << 15) +#define IXGBE_FLAG_FDIR_PERFECT_CAPABLE (u32)(1 << 16) +#if IS_ENABLED(CONFIG_FCOE) +#define IXGBE_FLAG_FCOE_CAPABLE (u32)(1 << 17) +#define IXGBE_FLAG_FCOE_ENABLED (u32)(1 << 18) +#endif /* CONFIG_FCOE */ +#define IXGBE_FLAG_SRIOV_CAPABLE (u32)(1 << 19) +#define IXGBE_FLAG_SRIOV_ENABLED (u32)(1 << 20) +#define IXGBE_FLAG_SRIOV_REPLICATION_ENABLE (u32)(1 << 21) +#define IXGBE_FLAG_SRIOV_L2SWITCH_ENABLE (u32)(1 << 22) +#define IXGBE_FLAG_SRIOV_VEPA_BRIDGE_MODE (u32)(1 << 23) +#define IXGBE_FLAG_RX_HWTSTAMP_ENABLED (u32)(1 << 24) +#define IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE (u32)(1 << 25) +#define IXGBE_FLAG_VXLAN_OFFLOAD_ENABLE (u32)(1 << 26) +#define IXGBE_FLAG_RX_HWTSTAMP_IN_REGISTER (u32)(1 << 27) +#define IXGBE_FLAG_MDD_ENABLED (u32)(1 << 29) +#define IXGBE_FLAG_DCB_CAPABLE (u32)(1 << 30) +#define IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE BIT(31) + +/* preset defaults */ +#define IXGBE_FLAGS_82598_INIT (IXGBE_FLAG_MSI_CAPABLE | \ + IXGBE_FLAG_MSIX_CAPABLE | \ + IXGBE_FLAG_MQ_CAPABLE) + +#define IXGBE_FLAGS_82599_INIT (IXGBE_FLAGS_82598_INIT | \ + IXGBE_FLAG_SRIOV_CAPABLE) + +#define IXGBE_FLAGS_X540_INIT IXGBE_FLAGS_82599_INIT + +#define IXGBE_FLAGS_X550_INIT (IXGBE_FLAGS_82599_INIT | \ + IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE) + + u32 flags2; +#define IXGBE_FLAG2_RSC_CAPABLE (u32)(1 << 0) +#define IXGBE_FLAG2_RSC_ENABLED (u32)(1 << 1) +#define IXGBE_FLAG2_TEMP_SENSOR_CAPABLE (u32)(1 << 3) +#define IXGBE_FLAG2_TEMP_SENSOR_EVENT (u32)(1 << 4) +#define IXGBE_FLAG2_SEARCH_FOR_SFP (u32)(1 << 5) +#define IXGBE_FLAG2_SFP_NEEDS_RESET (u32)(1 << 6) +#define IXGBE_FLAG2_FDIR_REQUIRES_REINIT (u32)(1 << 8) +#define IXGBE_FLAG2_RSS_FIELD_IPV4_UDP (u32)(1 << 9) +#define IXGBE_FLAG2_RSS_FIELD_IPV6_UDP (u32)(1 << 10) +#define IXGBE_FLAG2_PTP_PPS_ENABLED (u32)(1 << 11) +#define IXGBE_FLAG2_FW_ASYNC_EVENT BIT(12) +#define IXGBE_FLAG2_MOD_POWER_UNSUPPORTED BIT(13) +#define IXGBE_FLAG2_EEE_CAPABLE (u32)(1 << 14) +#define IXGBE_FLAG2_UDP_TUN_REREG_NEEDED (u32)(1 << 16) +#define IXGBE_FLAG2_PHY_INTERRUPT (u32)(1 << 17) +#define IXGBE_FLAG2_VLAN_PROMISC (u32)(1 << 18) +#define IXGBE_FLAG2_RX_LEGACY (u32)(1 << 19) +#define IXGBE_FLAG2_AUTO_DISABLE_VF BIT(20) +#define IXGBE_FLAG2_PHY_FW_LOAD_FAILED BIT(24) +#define IXGBE_FLAG2_NO_MEDIA BIT(25) +#define IXGBE_FLAG2_FWLOG_CAPABLE BIT(26) + + /* Tx fast path data */ + int num_tx_queues; + u16 tx_itr_setting; + u16 tx_work_limit; + +#if defined(HAVE_UDP_ENC_RX_OFFLOAD) || defined(HAVE_VXLAN_RX_OFFLOAD) + __be16 vxlan_port; +#endif /* HAVE_UDP_ENC_RX_OFFLAD || HAVE_VXLAN_RX_OFFLOAD */ +#ifdef HAVE_UDP_ENC_RX_OFFLOAD + __be16 geneve_port; +#endif /* HAVE_UDP_ENC_RX_OFFLOAD */ + + /* Rx fast path data */ + int num_rx_queues; + u16 rx_itr_setting; + + /* XDP */ + int num_xdp_queues; + struct ixgbe_ring *xdp_ring[IXGBE_MAX_XDP_QS]; + unsigned long *af_xdp_zc_qps; /* tracks AF_XDP ZC enabled rings */ + + /* TX */ + struct ixgbe_ring *tx_ring[MAX_TX_QUEUES] ____cacheline_aligned_in_smp; + + u64 restart_queue; + u64 lsc_int; + u32 tx_timeout_count; + + /* RX */ + struct ixgbe_ring *rx_ring[MAX_RX_QUEUES]; + int num_rx_pools; /* does not include pools assigned to VFs */ + int num_rx_queues_per_pool; + u64 hw_csum_rx_error; + u64 hw_rx_no_dma_resources; + u64 rsc_total_count; + u64 rsc_total_flush; + u64 non_eop_descs; + u32 alloc_rx_page; + u32 alloc_rx_page_failed; + u32 alloc_rx_buff_failed; + + struct ixgbe_q_vector *q_vector[MAX_MSIX_Q_VECTORS]; + +#ifdef HAVE_DCBNL_IEEE + struct ieee_pfc *ixgbe_ieee_pfc; + struct ieee_ets *ixgbe_ieee_ets; +#endif + struct ixgbe_dcb_config dcb_cfg; + struct ixgbe_dcb_config temp_dcb_cfg; + u8 dcb_set_bitmap; + u8 dcbx_cap; +#ifndef HAVE_MQPRIO + u8 dcb_tc; +#endif + enum ixgbe_fc_mode last_lfc_mode; + + int num_q_vectors; /* current number of q_vectors for device */ + int max_q_vectors; /* upper limit of q_vectors for device */ + struct ixgbe_ring_feature ring_feature[RING_F_ARRAY_SIZE]; + struct msix_entry *msix_entries; + +#ifndef HAVE_NETDEV_STATS_IN_NETDEV + struct net_device_stats net_stats; +#endif + +#ifdef ETHTOOL_TEST + u32 test_icr; + struct ixgbe_ring test_tx_ring; + struct ixgbe_ring test_rx_ring; +#endif + + /* structs defined in ixgbe_hw.h */ + struct ixgbe_hw hw; + u16 msg_enable; + struct ixgbe_hw_stats stats; +#ifndef IXGBE_NO_LLI + u32 lli_port; + u32 lli_size; + u32 lli_etype; + u32 lli_vlan_pri; +#endif /* IXGBE_NO_LLI */ + + u32 *config_space; + u64 tx_busy; + unsigned int tx_ring_count; + unsigned int xdp_ring_count; + unsigned int rx_ring_count; + + u32 link_speed; + bool link_up; + + bool cloud_mode; + + unsigned long sfp_poll_time; + unsigned long link_check_timeout; + + struct timer_list service_timer; + struct work_struct service_task; + + struct hlist_head fdir_filter_list; + unsigned long fdir_overflow; /* number of times ATR was backed off */ + union ixgbe_atr_input fdir_mask; + int fdir_filter_count; + u32 fdir_pballoc; + u32 atr_sample_rate; + spinlock_t fdir_perfect_lock; + +#if IS_ENABLED(CONFIG_FCOE) + struct ixgbe_fcoe fcoe; +#endif /* CONFIG_FCOE */ + u8 __iomem *io_addr; /* Mainly for iounmap use */ + u32 wol; + + u16 bd_number; + +#ifdef HAVE_BRIDGE_ATTRIBS + u16 bridge_mode; +#endif + + char eeprom_id[32]; + u16 eeprom_cap; + bool netdev_registered; + u32 interrupt_event; +#ifdef HAVE_ETHTOOL_SET_PHYS_ID + u32 led_reg; +#endif + +#ifdef HAVE_PTP_1588_CLOCK + struct ptp_clock *ptp_clock; + struct ptp_clock_info ptp_caps; + struct work_struct ptp_tx_work; + struct sk_buff *ptp_tx_skb; + struct hwtstamp_config tstamp_config; + unsigned long ptp_tx_start; + unsigned long last_overflow_check; + unsigned long last_rx_ptp_check; + spinlock_t tmreg_lock; + struct cyclecounter hw_cc; + struct timecounter hw_tc; + u32 base_incval; + u32 tx_hwtstamp_timeouts; + u32 tx_hwtstamp_skipped; + u32 rx_hwtstamp_cleared; + void (*ptp_setup_sdp) (struct ixgbe_adapter *); + struct ixgbe_ptp_e600 ptp; +#endif /* HAVE_PTP_1588_CLOCK */ + + DECLARE_BITMAP(active_vfs, IXGBE_MAX_VF_FUNCTIONS); + unsigned int num_vfs; + unsigned int max_vfs; + struct vf_data_storage *vfinfo; + int vf_rate_link_speed; + struct vf_macvlans vf_mvs; + struct vf_macvlans *mv_list; +#ifdef CONFIG_PCI_IOV + u32 timer_event_accumulator; + u32 vferr_refcount; +#endif + struct ixgbe_mac_addr *mac_table; + u16 tx_hang_count[IXGBE_MAX_TX_QUEUES]; + u16 lse_mask; +#ifdef IXGBE_SYSFS +#ifdef IXGBE_HWMON +#ifdef HAVE_HWMON_DEVICE_REGISTER_WITH_GROUPS + struct hwmon_buff *ixgbe_hwmon_buff; +#else + struct hwmon_buff ixgbe_hwmon_buff; +#endif /* HAVE_HWMON_DEVICE_REGISTER_WITH_GROUPS */ +#endif /* IXGBE_HWMON */ +#else /* IXGBE_SYSFS */ +#ifdef IXGBE_PROCFS + struct proc_dir_entry *eth_dir; + struct proc_dir_entry *info_dir; + u64 old_lsc; + struct proc_dir_entry *therm_dir[IXGBE_MAX_SENSORS]; + struct ixgbe_therm_proc_data therm_data[IXGBE_MAX_SENSORS]; +#endif /* IXGBE_PROCFS */ +#endif /* IXGBE_SYSFS */ + +#ifdef HAVE_IXGBE_DEBUG_FS + struct dentry *ixgbe_dbg_adapter_pf; + struct dentry *ixgbe_dbg_adapter_fw; + struct dentry *ixgbe_dbg_adapter_fw_cluster; + void *ixgbe_cluster_blk; + u16 fw_dump_cluster_id; +#endif /*HAVE_IXGBE_DEBUG_FS*/ + u8 default_up; +#ifdef HAVE_TC_SETUP_CLSU32 +#define IXGBE_MAX_LINK_HANDLE 10 + struct ixgbe_jump_table *jump_tables[IXGBE_MAX_LINK_HANDLE]; + unsigned long tables; +#endif /* NETIF_F_HW_TC */ + +/* maximum number of RETA entries among all devices supported by ixgbe + * driver: currently it's x550 device in non-SRIOV mode + */ +#define IXGBE_MAX_RETA_ENTRIES 512 + u8 rss_indir_tbl[IXGBE_MAX_RETA_ENTRIES]; + +#define IXGBE_RSS_KEY_SIZE 40 /* size of RSS Hash Key in bytes */ + u32 *rss_key; + +#ifdef HAVE_TX_MQ +#ifndef HAVE_NETDEV_SELECT_QUEUE + unsigned int indices; +#endif +#endif +#ifdef HAVE_AF_XDP_ZC_SUPPORT + /* AF_XDP zero-copy */ +#ifndef HAVE_NETDEV_BPF_XSK_POOL + struct xdp_umem **xsk_pools; + u16 num_xsk_pools_used; + u16 num_xsk_pools; +#endif /* HAVE_NETDEV_BPF_XSK_POOL */ +#endif + struct devlink *devlink; + struct devlink_port devlink_port; +#ifdef HAVE_DEVLINK_REGIONS + struct devlink_region *nvm_region; + struct devlink_region *sram_region; + struct devlink_region *devcaps_region; +#endif /* HAVE_DEVLINK_REGIONS */ + bool fw_emp_reset_disabled; + +}; + +static inline unsigned int ixgbe_determine_xdp_q_idx(unsigned int cpu) +{ + if (static_key_enabled((struct static_key *)&ixgbe_xdp_locking_key)) + return cpu % IXGBE_MAX_XDP_QS; + else + return cpu; +} + +static inline +struct ixgbe_ring *ixgbe_determine_xdp_ring(struct ixgbe_adapter *adapter) +{ + unsigned int index = ixgbe_determine_xdp_q_idx(smp_processor_id()); + + return adapter->xdp_ring[index]; +} + +static inline u8 ixgbe_max_rss_indices(struct ixgbe_adapter *adapter) +{ + switch (adapter->hw.mac.type) { + case ixgbe_mac_82598EB: + case ixgbe_mac_82599EB: + case ixgbe_mac_X540: + return IXGBE_MAX_RSS_INDICES; + break; + case ixgbe_mac_X550: + case ixgbe_mac_X550EM_x: + case ixgbe_mac_X550EM_a: + case ixgbe_mac_E610: + return IXGBE_MAX_RSS_INDICES_X550; + default: + return 0; + break; + } +} + +struct ixgbe_fdir_filter { + struct hlist_node fdir_node; + union ixgbe_atr_input filter; + u16 sw_idx; + u64 action; +}; + +struct ixgbe_cb { +#ifdef CONFIG_IXGBE_DISABLE_PACKET_SPLIT + union { /* Union defining head/tail partner */ + struct sk_buff *head; + struct sk_buff *tail; + }; +#endif + dma_addr_t dma; +#ifdef HAVE_VLAN_RX_REGISTER + u16 vid; /* VLAN tag */ +#endif + u16 append_cnt; /* number of skb's appended */ +#ifndef CONFIG_IXGBE_DISABLE_PACKET_SPLIT + bool page_released; +#endif +}; +#define IXGBE_CB(skb) ((struct ixgbe_cb *)(skb)->cb) + +#ifdef IXGBE_SYSFS +void ixgbe_sysfs_exit(struct ixgbe_adapter *adapter); +int ixgbe_sysfs_init(struct ixgbe_adapter *adapter); +#endif /* IXGBE_SYSFS */ +#ifdef IXGBE_PROCFS +void ixgbe_procfs_exit(struct ixgbe_adapter *adapter); +int ixgbe_procfs_init(struct ixgbe_adapter *adapter); +int ixgbe_procfs_topdir_init(void); +void ixgbe_procfs_topdir_exit(void); +#endif /* IXGBE_PROCFS */ + +extern struct dcbnl_rtnl_ops ixgbe_dcbnl_ops; +int ixgbe_copy_dcb_cfg(struct ixgbe_adapter *adapter, int tc_max); + +u8 ixgbe_dcb_txq_to_tc(struct ixgbe_adapter *adapter, u8 index); + +/* needed by ixgbe_main.c */ +int ixgbe_validate_mac_addr(u8 *mc_addr); +void ixgbe_check_options(struct ixgbe_adapter *adapter); +void ixgbe_assign_netdev_ops(struct net_device *netdev); + +/* needed by ixgbe_ethtool.c */ +#ifdef HAVE_NON_CONST_PCI_DRIVER_NAME +extern char ixgbe_driver_name[]; +#else +extern const char ixgbe_driver_name[]; +#endif +extern const char ixgbe_driver_version[]; + +int ixgbe_open(struct net_device *netdev); +int ixgbe_close(struct net_device *netdev); +void ixgbe_up(struct ixgbe_adapter *adapter); +void ixgbe_down(struct ixgbe_adapter *adapter); +void ixgbe_reinit_locked(struct ixgbe_adapter *adapter); +void ixgbe_reset(struct ixgbe_adapter *adapter); +void ixgbe_set_ethtool_ops(struct net_device *netdev); +int ixgbe_setup_rx_resources(struct ixgbe_adapter *, struct ixgbe_ring *); +int ixgbe_setup_tx_resources(struct ixgbe_ring *); +void ixgbe_free_rx_resources(struct ixgbe_ring *); +void ixgbe_free_tx_resources(struct ixgbe_ring *); +void ixgbe_configure_rx_ring(struct ixgbe_adapter *, + struct ixgbe_ring *); +void ixgbe_configure_tx_ring(struct ixgbe_adapter *, + struct ixgbe_ring *); +void ixgbe_update_stats(struct ixgbe_adapter *adapter); +int ixgbe_init_interrupt_scheme(struct ixgbe_adapter *adapter); +void ixgbe_reset_interrupt_capability(struct ixgbe_adapter *adapter); +void ixgbe_set_interrupt_capability(struct ixgbe_adapter *adapter); +void ixgbe_clear_interrupt_scheme(struct ixgbe_adapter *adapter); +bool ixgbe_is_ixgbe(struct pci_dev *pcidev); +netdev_tx_t ixgbe_xmit_frame_ring(struct sk_buff *, + struct ixgbe_adapter *, + struct ixgbe_ring *); +void ixgbe_unmap_and_free_tx_resource(struct ixgbe_ring *, + struct ixgbe_tx_buffer *); +void ixgbe_alloc_rx_buffers(struct ixgbe_ring *, u16); +void ixgbe_configure_rscctl(struct ixgbe_adapter *adapter, + struct ixgbe_ring *); +void ixgbe_clear_rscctl(struct ixgbe_adapter *adapter, + struct ixgbe_ring *); +#if defined(HAVE_UDP_ENC_RX_OFFLOAD) || defined(HAVE_VXLAN_RX_OFFLOAD) +void ixgbe_clear_udp_tunnel_port(struct ixgbe_adapter *, u32); +#endif +int ixgbe_update_ethtool_fdir_entry(struct ixgbe_adapter *adapter, + struct ixgbe_fdir_filter *input, + u16 sw_idx); +void ixgbe_set_rx_mode(struct net_device *netdev); +int ixgbe_write_mc_addr_list(struct net_device *netdev); +int ixgbe_setup_tc(struct net_device *dev, u8 tc); +void ixgbe_tx_ctxtdesc(struct ixgbe_ring *, u32, u32, u32, u32); +void ixgbe_do_reset(struct net_device *netdev); +void ixgbe_write_eitr(struct ixgbe_q_vector *q_vector); +int ixgbe_poll(struct napi_struct *napi, int budget); +void ixgbe_disable_rx_queue(struct ixgbe_adapter *adapter); +void ixgbe_disable_tx_queue(struct ixgbe_adapter *adapter); +void ixgbe_vlan_strip_enable(struct ixgbe_adapter *adapter); +void ixgbe_vlan_strip_disable(struct ixgbe_adapter *adapter); +#ifdef ETHTOOL_OPS_COMPAT +int ethtool_ioctl(struct ifreq *ifr); +#endif +#if IS_ENABLED(CONFIG_FCOE) +void ixgbe_configure_fcoe(struct ixgbe_adapter *adapter); +int ixgbe_fso(struct ixgbe_ring *tx_ring, + struct ixgbe_tx_buffer *first, + u8 *hdr_len); +int ixgbe_fcoe_ddp(struct ixgbe_adapter *adapter, + union ixgbe_adv_rx_desc *rx_desc, + struct sk_buff *skb); +int ixgbe_fcoe_ddp_get(struct net_device *netdev, u16 xid, + struct scatterlist *sgl, unsigned int sgc); +#ifdef HAVE_NETDEV_OPS_FCOE_DDP_TARGET +int ixgbe_fcoe_ddp_target(struct net_device *netdev, u16 xid, + struct scatterlist *sgl, unsigned int sgc); +#endif /* HAVE_NETDEV_OPS_FCOE_DDP_TARGET */ +int ixgbe_fcoe_ddp_put(struct net_device *netdev, u16 xid); +int ixgbe_setup_fcoe_ddp_resources(struct ixgbe_adapter *adapter); +void ixgbe_free_fcoe_ddp_resources(struct ixgbe_adapter *adapter); +#ifdef HAVE_NETDEV_OPS_FCOE_ENABLE +int ixgbe_fcoe_enable(struct net_device *netdev); +int ixgbe_fcoe_disable(struct net_device *netdev); +#else +int ixgbe_fcoe_ddp_enable(struct ixgbe_adapter *adapter); +void ixgbe_fcoe_ddp_disable(struct ixgbe_adapter *adapter); +#endif /* HAVE_NETDEV_OPS_FCOE_ENABLE */ +#if IS_ENABLED(CONFIG_DCB) +#ifdef HAVE_DCBNL_OPS_GETAPP +u8 ixgbe_fcoe_getapp(struct net_device *netdev); +#endif /* HAVE_DCBNL_OPS_GETAPP */ +u8 ixgbe_fcoe_setapp(struct ixgbe_adapter *adapter, u8 up); +#endif /* CONFIG_DCB */ +u8 ixgbe_fcoe_get_tc(struct ixgbe_adapter *adapter); +#ifdef HAVE_NETDEV_OPS_FCOE_GETWWN +int ixgbe_fcoe_get_wwn(struct net_device *netdev, u64 *wwn, int type); +#endif +#endif /* CONFIG_FCOE */ + +#ifdef HAVE_IXGBE_DEBUG_FS +void ixgbe_dbg_adapter_init(struct ixgbe_adapter *adapter); +void ixgbe_dbg_adapter_exit(struct ixgbe_adapter *adapter); +void ixgbe_dbg_init(void); +void ixgbe_dbg_exit(void); +#endif /* HAVE_IXGBE_DEBUG_FS */ + +static inline struct netdev_queue *txring_txq(const struct ixgbe_ring *ring) +{ + return netdev_get_tx_queue(ring->netdev, ring->queue_index); +} + +#if IS_ENABLED(CONFIG_DCB) +#ifdef HAVE_DCBNL_IEEE +s32 ixgbe_dcb_hw_ets(struct ixgbe_hw *hw, struct ieee_ets *ets, int max_frame); +#endif /* HAVE_DCBNL_IEEE */ +#endif /* CONFIG_DCB */ + +int ixgbe_pf_fwlog_update_modules(struct ixgbe_adapter *adapter, u8 log_level, + unsigned long events); +bool ixgbe_wol_supported(struct ixgbe_adapter *adapter, u16 device_id, + u16 subdevice_id); +void ixgbe_full_sync_mac_table(struct ixgbe_adapter *adapter); +int ixgbe_add_mac_filter(struct ixgbe_adapter *adapter, + const u8 *addr, u16 queue); +int ixgbe_del_mac_filter(struct ixgbe_adapter *adapter, + const u8 *addr, u16 queue); +int ixgbe_available_rars(struct ixgbe_adapter *adapter, u16 pool); +void ixgbe_update_pf_promisc_vlvf(struct ixgbe_adapter *adapter, u32 vid); +bool ixgbe_check_link_for_eee_e610(struct ixgbe_adapter *adapter, + bool print_msg); +#ifndef HAVE_VLAN_RX_REGISTER +void ixgbe_vlan_mode(struct net_device *, u32); +#else +#ifdef CONFIG_PCI_IOV +int ixgbe_find_vlvf_entry(struct ixgbe_hw *hw, u32 vlan); +#endif +#endif +#ifdef HAVE_PTP_1588_CLOCK +#ifdef IXGBE_SYSFS +#endif /* IXGBE_SYSFS */ +int ixgbe_ptp_fw_intr_e600(struct ixgbe_adapter *adapter); +void ixgbe_ptp_rx_phytstamp_e600(struct ixgbe_q_vector *q_vector, + struct sk_buff *skb, unsigned int ptp_class); +void ixgbe_ptp_init(struct ixgbe_adapter *adapter); +void ixgbe_ptp_stop(struct ixgbe_adapter *adapter); +void ixgbe_ptp_suspend(struct ixgbe_adapter *adapter); +void ixgbe_ptp_overflow_check(struct ixgbe_adapter *adapter); +void ixgbe_ptp_rx_hang(struct ixgbe_adapter *adapter); +void ixgbe_ptp_tx_hang(struct ixgbe_adapter *adapter); +void ixgbe_ptp_tx_hwtstamp_work(struct work_struct *work); +void ixgbe_ptp_check_pps_event(struct ixgbe_adapter *adapter); +static inline void ixgbe_ptp_eicr_timesync(struct ixgbe_adapter *adapter) { + int err = -EINTR; + + if (adapter->ptp.ptp_by_phy_ena) + err = ixgbe_ptp_fw_intr_e600(adapter); + + if (err == -EINTR) + ixgbe_ptp_check_pps_event(adapter); + else if (err) + e_dbg(link, "PTP by PHY Tx TS err=%d\n", err); +} + +void ixgbe_ptp_rx_pktstamp(struct ixgbe_q_vector *q_vector, + struct sk_buff *skb); +void ixgbe_ptp_rx_rgtstamp(struct ixgbe_q_vector *q_vector, + struct sk_buff *skb); +static inline void ixgbe_ptp_rx_hwtstamp(struct ixgbe_ring *rx_ring, + union ixgbe_adv_rx_desc *rx_desc, + struct sk_buff *skb) +{ + if (unlikely(ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_TSIP))) { + struct ixgbe_adapter *adapter = rx_ring->q_vector->adapter; + unsigned int ptp_class = PTP_CLASS_NONE; + + if (unlikely(adapter->ptp.ptp_by_phy_ena)) + ptp_class = ptp_classify_raw(skb); + + if (unlikely(ptp_class != PTP_CLASS_NONE)) { + ixgbe_ptp_rx_phytstamp_e600(rx_ring->q_vector, skb, + ptp_class); + return; + } + + ixgbe_ptp_rx_pktstamp(rx_ring->q_vector, skb); + return; + } + + if (unlikely(!ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_STAT_TS))) + return; + + ixgbe_ptp_rx_rgtstamp(rx_ring->q_vector, skb); + + /* Update the last_rx_timestamp timer in order to enable watchdog check + * for error case of latched timestamp on a dropped packet. + */ + rx_ring->last_rx_timestamp = jiffies; +} + +int ixgbe_ptp_get_ts_config(struct ixgbe_adapter *adapter, struct ifreq *ifr); +int ixgbe_ptp_set_ts_config(struct ixgbe_adapter *adapter, struct ifreq *ifr); +void ixgbe_ptp_start_cyclecounter(struct ixgbe_adapter *adapter); +void ixgbe_ptp_reset(struct ixgbe_adapter *adapter); +#endif /* HAVE_PTP_1588_CLOCK */ +#ifdef CONFIG_PCI_IOV +void ixgbe_sriov_reinit(struct ixgbe_adapter *adapter); +#endif +u32 ixgbe_rss_indir_tbl_entries(struct ixgbe_adapter *adapter); +void ixgbe_store_key(struct ixgbe_adapter *adapter); +void ixgbe_store_reta(struct ixgbe_adapter *adapter); + +void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter); + +bool ixgbe_fwlog_ring_full(struct ixgbe_fwlog_ring *rings); +bool ixgbe_fwlog_ring_empty(struct ixgbe_fwlog_ring *rings); +void ixgbe_fwlog_ring_increment(u16 *item, u16 size); +void ixgbe_fwlog_realloc_rings(struct ixgbe_hw *hw, int ring_size); +s32 ixgbe_fwlog_init(struct ixgbe_hw *hw); +int ixgbe_refresh_fw_version(struct ixgbe_adapter *adapter); + +#endif /* _IXGBE_H_ */ diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_82598.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_82598.c new file mode 100644 index 00000000000..3aa937cf9a6 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_82598.c @@ -0,0 +1,1379 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 1999 - 2026 Intel Corporation */ + +#include "ixgbe_type.h" +#include "ixgbe_82598.h" +#include "ixgbe_api.h" +#include "ixgbe_common.h" +#include "ixgbe_phy.h" + +#define IXGBE_82598_MAX_TX_QUEUES 32 +#define IXGBE_82598_MAX_RX_QUEUES 64 +#define IXGBE_82598_RAR_ENTRIES 16 +#define IXGBE_82598_MC_TBL_SIZE 128 +#define IXGBE_82598_VFT_TBL_SIZE 128 +#define IXGBE_82598_RX_PB_SIZE 512 + +STATIC s32 ixgbe_get_link_capabilities_82598(struct ixgbe_hw *hw, + ixgbe_link_speed *speed, + bool *autoneg); +STATIC enum ixgbe_media_type ixgbe_get_media_type_82598(struct ixgbe_hw *hw); +STATIC s32 ixgbe_start_mac_link_82598(struct ixgbe_hw *hw, + bool autoneg_wait_to_complete); +STATIC s32 ixgbe_check_mac_link_82598(struct ixgbe_hw *hw, + ixgbe_link_speed *speed, bool *link_up, + bool link_up_wait_to_complete); +STATIC s32 ixgbe_setup_mac_link_82598(struct ixgbe_hw *hw, + ixgbe_link_speed speed, + bool autoneg_wait_to_complete); +STATIC s32 ixgbe_setup_copper_link_82598(struct ixgbe_hw *hw, + ixgbe_link_speed speed, + bool autoneg_wait_to_complete); +STATIC s32 ixgbe_reset_hw_82598(struct ixgbe_hw *hw); +STATIC s32 ixgbe_clear_vmdq_82598(struct ixgbe_hw *hw, u32 rar, u32 vmdq); +STATIC s32 ixgbe_clear_vfta_82598(struct ixgbe_hw *hw); +STATIC void ixgbe_set_rxpba_82598(struct ixgbe_hw *hw, int num_pb, + u32 headroom, int strategy); +STATIC s32 ixgbe_read_i2c_sff8472_82598(struct ixgbe_hw *hw, u8 byte_offset, + u8 *sff8472_data); +/** + * ixgbe_set_pcie_completion_timeout - set pci-e completion timeout + * @hw: pointer to the HW structure + * + * The defaults for 82598 should be in the range of 50us to 50ms, + * however the hardware default for these parts is 500us to 1ms which is less + * than the 10ms recommended by the pci-e spec. To address this we need to + * increase the value to either 10ms to 250ms for capability version 1 config, + * or 16ms to 55ms for version 2. + **/ +void ixgbe_set_pcie_completion_timeout(struct ixgbe_hw *hw) +{ + u32 gcr = IXGBE_READ_REG(hw, IXGBE_GCR); + u16 pcie_devctl2; + + /* only take action if timeout value is defaulted to 0 */ + if (gcr & IXGBE_GCR_CMPL_TMOUT_MASK) + goto out; + + /* + * if capababilities version is type 1 we can write the + * timeout of 10ms to 250ms through the GCR register + */ + if (!(gcr & IXGBE_GCR_CAP_VER2)) { + gcr |= IXGBE_GCR_CMPL_TMOUT_10ms; + goto out; + } + + /* + * for version 2 capabilities we need to write the config space + * directly in order to set the completion timeout value for + * 16ms to 55ms + */ + pcie_devctl2 = IXGBE_READ_PCIE_WORD(hw, IXGBE_PCI_DEVICE_CONTROL2); + pcie_devctl2 |= IXGBE_PCI_DEVICE_CONTROL2_16ms; + IXGBE_WRITE_PCIE_WORD(hw, IXGBE_PCI_DEVICE_CONTROL2, pcie_devctl2); +out: + /* disable completion timeout resend */ + gcr &= ~IXGBE_GCR_CMPL_TMOUT_RESEND; + IXGBE_WRITE_REG(hw, IXGBE_GCR, gcr); +} + +/** + * ixgbe_init_ops_82598 - Inits func ptrs and MAC type + * @hw: pointer to hardware structure + * + * Initialize the function pointers and assign the MAC type for 82598. + * Does not touch the hardware. + **/ +s32 ixgbe_init_ops_82598(struct ixgbe_hw *hw) +{ + struct ixgbe_mac_info *mac = &hw->mac; + struct ixgbe_phy_info *phy = &hw->phy; + s32 ret_val; + + DEBUGFUNC("ixgbe_init_ops_82598"); + + ret_val = ixgbe_init_phy_ops_generic(hw); + ret_val = ixgbe_init_ops_generic(hw); + + /* PHY */ + phy->ops.init = ixgbe_init_phy_ops_82598; + + /* MAC */ + mac->ops.start_hw = ixgbe_start_hw_82598; + mac->ops.reset_hw = ixgbe_reset_hw_82598; + mac->ops.get_media_type = ixgbe_get_media_type_82598; + mac->ops.get_supported_physical_layer = + ixgbe_get_supported_physical_layer_82598; + mac->ops.read_analog_reg8 = ixgbe_read_analog_reg8_82598; + mac->ops.write_analog_reg8 = ixgbe_write_analog_reg8_82598; + mac->ops.set_lan_id = ixgbe_set_lan_id_multi_port_pcie_82598; + mac->ops.enable_rx_dma = ixgbe_enable_rx_dma_82598; + + /* RAR, Multicast, VLAN */ + mac->ops.set_vmdq = ixgbe_set_vmdq_82598; + mac->ops.clear_vmdq = ixgbe_clear_vmdq_82598; + mac->ops.set_vfta = ixgbe_set_vfta_82598; + mac->ops.set_vlvf = NULL; + mac->ops.clear_vfta = ixgbe_clear_vfta_82598; + + /* Flow Control */ + mac->ops.fc_enable = ixgbe_fc_enable_82598; + + mac->mcft_size = IXGBE_82598_MC_TBL_SIZE; + mac->vft_size = IXGBE_82598_VFT_TBL_SIZE; + mac->num_rar_entries = IXGBE_82598_RAR_ENTRIES; + mac->rx_pb_size = IXGBE_82598_RX_PB_SIZE; + mac->max_rx_queues = IXGBE_82598_MAX_RX_QUEUES; + mac->max_tx_queues = IXGBE_82598_MAX_TX_QUEUES; + mac->max_msix_vectors = ixgbe_get_pcie_msix_count_generic(hw); + + /* SFP+ Module */ + phy->ops.read_i2c_eeprom = ixgbe_read_i2c_eeprom_82598; + phy->ops.read_i2c_sff8472 = ixgbe_read_i2c_sff8472_82598; + + /* Link */ + mac->ops.check_link = ixgbe_check_mac_link_82598; + mac->ops.setup_link = ixgbe_setup_mac_link_82598; + mac->ops.flap_tx_laser = NULL; + mac->ops.get_link_capabilities = ixgbe_get_link_capabilities_82598; + mac->ops.setup_rxpba = ixgbe_set_rxpba_82598; + + /* Manageability interface */ + mac->ops.set_fw_drv_ver = NULL; + + mac->ops.get_rtrup2tc = NULL; + + return ret_val; +} + +/** + * ixgbe_init_phy_ops_82598 - PHY/SFP specific init + * @hw: pointer to hardware structure + * + * Initialize any function pointers that were not able to be + * set during init_shared_code because the PHY/SFP type was + * not known. Perform the SFP init if necessary. + * + **/ +s32 ixgbe_init_phy_ops_82598(struct ixgbe_hw *hw) +{ + struct ixgbe_mac_info *mac = &hw->mac; + struct ixgbe_phy_info *phy = &hw->phy; + s32 ret_val = IXGBE_SUCCESS; + u16 list_offset, data_offset; + + DEBUGFUNC("ixgbe_init_phy_ops_82598"); + + /* Identify the PHY */ + phy->ops.identify(hw); + + /* Overwrite the link function pointers if copper PHY */ + if (mac->ops.get_media_type(hw) == ixgbe_media_type_copper) { + mac->ops.setup_link = ixgbe_setup_copper_link_82598; + mac->ops.get_link_capabilities = + ixgbe_get_copper_link_capabilities_generic; + } + + switch (hw->phy.type) { + case ixgbe_phy_tn: + phy->ops.setup_link = ixgbe_setup_phy_link_tnx; + phy->ops.check_link = ixgbe_check_phy_link_tnx; + phy->ops.get_firmware_version = + ixgbe_get_phy_firmware_version_tnx; + break; + case ixgbe_phy_nl: + phy->ops.reset = ixgbe_reset_phy_nl; + + /* Call SFP+ identify routine to get the SFP+ module type */ + ret_val = phy->ops.identify_sfp(hw); + if (ret_val != IXGBE_SUCCESS) + goto out; + else if (hw->phy.sfp_type == ixgbe_sfp_type_unknown) { + ret_val = IXGBE_ERR_SFP_NOT_SUPPORTED; + goto out; + } + + /* Check to see if SFP+ module is supported */ + ret_val = ixgbe_get_sfp_init_sequence_offsets(hw, + &list_offset, + &data_offset); + if (ret_val != IXGBE_SUCCESS) { + ret_val = IXGBE_ERR_SFP_NOT_SUPPORTED; + goto out; + } + break; + default: + break; + } + +out: + return ret_val; +} + +/** + * ixgbe_start_hw_82598 - Prepare hardware for Tx/Rx + * @hw: pointer to hardware structure + * + * Starts the hardware using the generic start_hw function. + * Disables relaxed ordering Then set pcie completion timeout + * + **/ +s32 ixgbe_start_hw_82598(struct ixgbe_hw *hw) +{ + u32 regval; + u32 i; + s32 ret_val = IXGBE_SUCCESS; + + DEBUGFUNC("ixgbe_start_hw_82598"); + + ret_val = ixgbe_start_hw_generic(hw); + if (ret_val) + return ret_val; + + /* Disable relaxed ordering */ + for (i = 0; ((i < hw->mac.max_tx_queues) && + (i < IXGBE_DCA_MAX_QUEUES_82598)); i++) { + regval = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(i)); + regval &= ~IXGBE_DCA_TXCTRL_DESC_WRO_EN; + IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL(i), regval); + } + + for (i = 0; ((i < hw->mac.max_rx_queues) && + (i < IXGBE_DCA_MAX_QUEUES_82598)); i++) { + regval = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i)); + regval &= ~(IXGBE_DCA_RXCTRL_DATA_WRO_EN | + IXGBE_DCA_RXCTRL_HEAD_WRO_EN); + IXGBE_WRITE_REG(hw, IXGBE_DCA_RXCTRL(i), regval); + } + + /* set the completion timeout for interface */ + ixgbe_set_pcie_completion_timeout(hw); + + return ret_val; +} + +/** + * ixgbe_get_link_capabilities_82598 - Determines link capabilities + * @hw: pointer to hardware structure + * @speed: pointer to link speed + * @autoneg: boolean auto-negotiation value + * + * Determines the link capabilities by reading the AUTOC register. + **/ +STATIC s32 ixgbe_get_link_capabilities_82598(struct ixgbe_hw *hw, + ixgbe_link_speed *speed, + bool *autoneg) +{ + s32 status = IXGBE_SUCCESS; + u32 autoc = 0; + + DEBUGFUNC("ixgbe_get_link_capabilities_82598"); + + /* + * Determine link capabilities based on the stored value of AUTOC, + * which represents EEPROM defaults. If AUTOC value has not been + * stored, use the current register value. + */ + if (hw->mac.orig_link_settings_stored) + autoc = hw->mac.orig_autoc; + else + autoc = IXGBE_READ_REG(hw, IXGBE_AUTOC); + + switch (autoc & IXGBE_AUTOC_LMS_MASK) { + case IXGBE_AUTOC_LMS_1G_LINK_NO_AN: + *speed = IXGBE_LINK_SPEED_1GB_FULL; + *autoneg = false; + break; + + case IXGBE_AUTOC_LMS_10G_LINK_NO_AN: + *speed = IXGBE_LINK_SPEED_10GB_FULL; + *autoneg = false; + break; + + case IXGBE_AUTOC_LMS_1G_AN: + *speed = IXGBE_LINK_SPEED_1GB_FULL; + *autoneg = true; + break; + + case IXGBE_AUTOC_LMS_KX4_AN: + case IXGBE_AUTOC_LMS_KX4_AN_1G_AN: + *speed = IXGBE_LINK_SPEED_UNKNOWN; + if (autoc & IXGBE_AUTOC_KX4_SUPP) + *speed |= IXGBE_LINK_SPEED_10GB_FULL; + if (autoc & IXGBE_AUTOC_KX_SUPP) + *speed |= IXGBE_LINK_SPEED_1GB_FULL; + *autoneg = true; + break; + + default: + status = IXGBE_ERR_LINK_SETUP; + break; + } + + return status; +} + +/** + * ixgbe_get_media_type_82598 - Determines media type + * @hw: pointer to hardware structure + * + * Returns the media type (fiber, copper, backplane) + **/ +STATIC enum ixgbe_media_type ixgbe_get_media_type_82598(struct ixgbe_hw *hw) +{ + enum ixgbe_media_type media_type; + + DEBUGFUNC("ixgbe_get_media_type_82598"); + + /* Detect if there is a copper PHY attached. */ + switch (hw->phy.type) { + case ixgbe_phy_cu_unknown: + case ixgbe_phy_tn: + media_type = ixgbe_media_type_copper; + goto out; + default: + break; + } + + /* Media type for I82598 is based on device ID */ + switch (hw->device_id) { + case IXGBE_DEV_ID_82598: + case IXGBE_DEV_ID_82598_BX: + /* Default device ID is mezzanine card KX/KX4 */ + media_type = ixgbe_media_type_backplane; + break; + case IXGBE_DEV_ID_82598AF_DUAL_PORT: + case IXGBE_DEV_ID_82598AF_SINGLE_PORT: + case IXGBE_DEV_ID_82598_DA_DUAL_PORT: + case IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM: + case IXGBE_DEV_ID_82598EB_XF_LR: + case IXGBE_DEV_ID_82598EB_SFP_LOM: + media_type = ixgbe_media_type_fiber; + break; + case IXGBE_DEV_ID_82598EB_CX4: + case IXGBE_DEV_ID_82598_CX4_DUAL_PORT: + media_type = ixgbe_media_type_cx4; + break; + case IXGBE_DEV_ID_82598AT: + case IXGBE_DEV_ID_82598AT2: + media_type = ixgbe_media_type_copper; + break; + default: + media_type = ixgbe_media_type_unknown; + break; + } +out: + return media_type; +} + +/** + * ixgbe_fc_enable_82598 - Enable flow control + * @hw: pointer to hardware structure + * + * Enable flow control according to the current settings. + **/ +s32 ixgbe_fc_enable_82598(struct ixgbe_hw *hw) +{ + s32 ret_val = IXGBE_SUCCESS; + u32 fctrl_reg; + u32 rmcs_reg; + u32 reg; + u32 fcrtl, fcrth; + u32 link_speed = 0; + int i; + bool link_up; + + DEBUGFUNC("ixgbe_fc_enable_82598"); + + /* Validate the water mark configuration */ + if (!hw->fc.pause_time) { + ret_val = IXGBE_ERR_INVALID_LINK_SETTINGS; + goto out; + } + + /* Low water mark of zero causes XOFF floods */ + for (i = 0; i < IXGBE_DCB_MAX_TRAFFIC_CLASS; i++) { + if ((hw->fc.current_mode & ixgbe_fc_tx_pause) && + hw->fc.high_water[i]) { + if (!hw->fc.low_water[i] || + hw->fc.low_water[i] >= hw->fc.high_water[i]) { + hw_dbg(hw, "Invalid water mark configuration\n"); + ret_val = IXGBE_ERR_INVALID_LINK_SETTINGS; + goto out; + } + } + } + + /* + * On 82598 having Rx FC on causes resets while doing 1G + * so if it's on turn it off once we know link_speed. For + * more details see 82598 Specification update. + */ + hw->mac.ops.check_link(hw, &link_speed, &link_up, false); + if (link_up && link_speed == IXGBE_LINK_SPEED_1GB_FULL) { + switch (hw->fc.requested_mode) { + case ixgbe_fc_full: + hw->fc.requested_mode = ixgbe_fc_tx_pause; + break; + case ixgbe_fc_rx_pause: + hw->fc.requested_mode = ixgbe_fc_none; + break; + default: + /* no change */ + break; + } + } + + /* Negotiate the fc mode to use */ + ixgbe_fc_autoneg(hw); + + /* Disable any previous flow control settings */ + fctrl_reg = IXGBE_READ_REG(hw, IXGBE_FCTRL); + fctrl_reg &= ~(IXGBE_FCTRL_RFCE | IXGBE_FCTRL_RPFCE); + + rmcs_reg = IXGBE_READ_REG(hw, IXGBE_RMCS); + rmcs_reg &= ~(IXGBE_RMCS_TFCE_PRIORITY | IXGBE_RMCS_TFCE_802_3X); + + /* + * The possible values of fc.current_mode are: + * 0: Flow control is completely disabled + * 1: Rx flow control is enabled (we can receive pause frames, + * but not send pause frames). + * 2: Tx flow control is enabled (we can send pause frames but + * we do not support receiving pause frames). + * 3: Both Rx and Tx flow control (symmetric) are enabled. + * other: Invalid. + */ + switch (hw->fc.current_mode) { + case ixgbe_fc_none: + /* + * Flow control is disabled by software override or autoneg. + * The code below will actually disable it in the HW. + */ + break; + case ixgbe_fc_rx_pause: + /* + * Rx Flow control is enabled and Tx Flow control is + * disabled by software override. Since there really + * isn't a way to advertise that we are capable of RX + * Pause ONLY, we will advertise that we support both + * symmetric and asymmetric Rx PAUSE. Later, we will + * disable the adapter's ability to send PAUSE frames. + */ + fctrl_reg |= IXGBE_FCTRL_RFCE; + break; + case ixgbe_fc_tx_pause: + /* + * Tx Flow control is enabled, and Rx Flow control is + * disabled by software override. + */ + rmcs_reg |= IXGBE_RMCS_TFCE_802_3X; + break; + case ixgbe_fc_full: + /* Flow control (both Rx and Tx) is enabled by SW override. */ + fctrl_reg |= IXGBE_FCTRL_RFCE; + rmcs_reg |= IXGBE_RMCS_TFCE_802_3X; + break; + default: + hw_dbg(hw, "Flow control param set incorrectly\n"); + ret_val = IXGBE_ERR_CONFIG; + goto out; + break; + } + + /* Set 802.3x based flow control settings. */ + fctrl_reg |= IXGBE_FCTRL_DPF; + IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl_reg); + IXGBE_WRITE_REG(hw, IXGBE_RMCS, rmcs_reg); + + /* Set up and enable Rx high/low water mark thresholds, enable XON. */ + for (i = 0; i < IXGBE_DCB_MAX_TRAFFIC_CLASS; i++) { + if ((hw->fc.current_mode & ixgbe_fc_tx_pause) && + hw->fc.high_water[i]) { + fcrtl = (hw->fc.low_water[i] << 10) | IXGBE_FCRTL_XONE; + fcrth = (hw->fc.high_water[i] << 10) | IXGBE_FCRTH_FCEN; + IXGBE_WRITE_REG(hw, IXGBE_FCRTL(i), fcrtl); + IXGBE_WRITE_REG(hw, IXGBE_FCRTH(i), fcrth); + } else { + IXGBE_WRITE_REG(hw, IXGBE_FCRTL(i), 0); + IXGBE_WRITE_REG(hw, IXGBE_FCRTH(i), 0); + } + + } + + /* Configure pause time (2 TCs per register) */ + reg = hw->fc.pause_time * 0x00010001; + for (i = 0; i < (IXGBE_DCB_MAX_TRAFFIC_CLASS / 2); i++) + IXGBE_WRITE_REG(hw, IXGBE_FCTTV(i), reg); + + /* Configure flow control refresh threshold value */ + IXGBE_WRITE_REG(hw, IXGBE_FCRTV, hw->fc.pause_time / 2); + +out: + return ret_val; +} + +/** + * ixgbe_start_mac_link_82598 - Configures MAC link settings + * @hw: pointer to hardware structure + * @autoneg_wait_to_complete: true when waiting for completion is needed + * + * Configures link settings based on values in the ixgbe_hw struct. + * Restarts the link. Performs autonegotiation if needed. + **/ +STATIC s32 ixgbe_start_mac_link_82598(struct ixgbe_hw *hw, + bool autoneg_wait_to_complete) +{ + u32 autoc_reg; + u32 links_reg; + u32 i; + s32 status = IXGBE_SUCCESS; + + DEBUGFUNC("ixgbe_start_mac_link_82598"); + + /* Restart link */ + autoc_reg = IXGBE_READ_REG(hw, IXGBE_AUTOC); + autoc_reg |= IXGBE_AUTOC_AN_RESTART; + IXGBE_WRITE_REG(hw, IXGBE_AUTOC, autoc_reg); + + /* Only poll for autoneg to complete if specified to do so */ + if (autoneg_wait_to_complete) { + if ((autoc_reg & IXGBE_AUTOC_LMS_MASK) == + IXGBE_AUTOC_LMS_KX4_AN || + (autoc_reg & IXGBE_AUTOC_LMS_MASK) == + IXGBE_AUTOC_LMS_KX4_AN_1G_AN) { + links_reg = 0; /* Just in case Autoneg time = 0 */ + for (i = 0; i < IXGBE_AUTO_NEG_TIME; i++) { + links_reg = IXGBE_READ_REG(hw, IXGBE_LINKS); + if (links_reg & IXGBE_LINKS_KX_AN_COMP) + break; + msec_delay(100); + } + if (!(links_reg & IXGBE_LINKS_KX_AN_COMP)) { + status = IXGBE_ERR_AUTONEG_NOT_COMPLETE; + hw_dbg(hw, "Autonegotiation did not complete.\n"); + } + } + } + + /* Add delay to filter out noises during initial link setup */ + msec_delay(50); + + return status; +} + +/** + * ixgbe_validate_link_ready - Function looks for phy link + * @hw: pointer to hardware structure + * + * Function indicates success when phy link is available. If phy is not ready + * within 5 seconds of MAC indicating link, the function returns error. + **/ +STATIC s32 ixgbe_validate_link_ready(struct ixgbe_hw *hw) +{ + u32 timeout; + u16 an_reg; + + if (hw->device_id != IXGBE_DEV_ID_82598AT2) + return IXGBE_SUCCESS; + + for (timeout = 0; + timeout < IXGBE_VALIDATE_LINK_READY_TIMEOUT; timeout++) { + hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_STATUS, + IXGBE_MDIO_AUTO_NEG_DEV_TYPE, &an_reg); + + if ((an_reg & IXGBE_MII_AUTONEG_COMPLETE) && + (an_reg & IXGBE_MII_AUTONEG_LINK_UP)) + break; + + msec_delay(100); + } + + if (timeout == IXGBE_VALIDATE_LINK_READY_TIMEOUT) { + hw_dbg(hw, "Link was indicated but link is down\n"); + return IXGBE_ERR_LINK_SETUP; + } + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_check_mac_link_82598 - Get link/speed status + * @hw: pointer to hardware structure + * @speed: pointer to link speed + * @link_up: true is link is up, false otherwise + * @link_up_wait_to_complete: bool used to wait for link up or not + * + * Reads the links register to determine if link is up and the current speed + **/ +STATIC s32 ixgbe_check_mac_link_82598(struct ixgbe_hw *hw, + ixgbe_link_speed *speed, bool *link_up, + bool link_up_wait_to_complete) +{ + u32 links_reg; + u32 i; + u16 link_reg, adapt_comp_reg; + + DEBUGFUNC("ixgbe_check_mac_link_82598"); + + /* + * SERDES PHY requires us to read link status from undocumented + * register 0xC79F. Bit 0 set indicates link is up/ready; clear + * indicates link down. OxC00C is read to check that the XAUI lanes + * are active. Bit 0 clear indicates active; set indicates inactive. + */ + if (hw->phy.type == ixgbe_phy_nl) { + hw->phy.ops.read_reg(hw, 0xC79F, IXGBE_TWINAX_DEV, &link_reg); + hw->phy.ops.read_reg(hw, 0xC79F, IXGBE_TWINAX_DEV, &link_reg); + hw->phy.ops.read_reg(hw, 0xC00C, IXGBE_TWINAX_DEV, + &adapt_comp_reg); + if (link_up_wait_to_complete) { + for (i = 0; i < hw->mac.max_link_up_time; i++) { + if ((link_reg & 1) && + ((adapt_comp_reg & 1) == 0)) { + *link_up = true; + break; + } else { + *link_up = false; + } + msec_delay(100); + hw->phy.ops.read_reg(hw, 0xC79F, + IXGBE_TWINAX_DEV, + &link_reg); + hw->phy.ops.read_reg(hw, 0xC00C, + IXGBE_TWINAX_DEV, + &adapt_comp_reg); + } + } else { + if ((link_reg & 1) && ((adapt_comp_reg & 1) == 0)) + *link_up = true; + else + *link_up = false; + } + + if (*link_up == false) + goto out; + } + + links_reg = IXGBE_READ_REG(hw, IXGBE_LINKS); + if (link_up_wait_to_complete) { + for (i = 0; i < hw->mac.max_link_up_time; i++) { + if (links_reg & IXGBE_LINKS_UP) { + *link_up = true; + break; + } else { + *link_up = false; + } + msec_delay(100); + links_reg = IXGBE_READ_REG(hw, IXGBE_LINKS); + } + } else { + if (links_reg & IXGBE_LINKS_UP) + *link_up = true; + else + *link_up = false; + } + + if (links_reg & IXGBE_LINKS_SPEED) + *speed = IXGBE_LINK_SPEED_10GB_FULL; + else + *speed = IXGBE_LINK_SPEED_1GB_FULL; + + if ((hw->device_id == IXGBE_DEV_ID_82598AT2) && (*link_up == true) && + (ixgbe_validate_link_ready(hw) != IXGBE_SUCCESS)) + *link_up = false; + +out: + return IXGBE_SUCCESS; +} + +/** + * ixgbe_setup_mac_link_82598 - Set MAC link speed + * @hw: pointer to hardware structure + * @speed: new link speed + * @autoneg_wait_to_complete: true when waiting for completion is needed + * + * Set the link speed in the AUTOC register and restarts link. + **/ +STATIC s32 ixgbe_setup_mac_link_82598(struct ixgbe_hw *hw, + ixgbe_link_speed speed, + bool autoneg_wait_to_complete) +{ + bool autoneg = false; + s32 status = IXGBE_SUCCESS; + ixgbe_link_speed link_capabilities = IXGBE_LINK_SPEED_UNKNOWN; + u32 curr_autoc = IXGBE_READ_REG(hw, IXGBE_AUTOC); + u32 autoc = curr_autoc; + u32 link_mode = autoc & IXGBE_AUTOC_LMS_MASK; + + DEBUGFUNC("ixgbe_setup_mac_link_82598"); + + /* Check to see if speed passed in is supported. */ + ixgbe_get_link_capabilities(hw, &link_capabilities, &autoneg); + speed &= link_capabilities; + + if (speed == IXGBE_LINK_SPEED_UNKNOWN) + status = IXGBE_ERR_LINK_SETUP; + + /* Set KX4/KX support according to speed requested */ + else if (link_mode == IXGBE_AUTOC_LMS_KX4_AN || + link_mode == IXGBE_AUTOC_LMS_KX4_AN_1G_AN) { + autoc &= ~IXGBE_AUTOC_KX4_KX_SUPP_MASK; + if (speed & IXGBE_LINK_SPEED_10GB_FULL) + autoc |= IXGBE_AUTOC_KX4_SUPP; + if (speed & IXGBE_LINK_SPEED_1GB_FULL) + autoc |= IXGBE_AUTOC_KX_SUPP; + if (autoc != curr_autoc) + IXGBE_WRITE_REG(hw, IXGBE_AUTOC, autoc); + } + + if (status == IXGBE_SUCCESS) { + /* + * Setup and restart the link based on the new values in + * ixgbe_hw This will write the AUTOC register based on the new + * stored values + */ + status = ixgbe_start_mac_link_82598(hw, + autoneg_wait_to_complete); + } + + return status; +} + + +/** + * ixgbe_setup_copper_link_82598 - Set the PHY autoneg advertised field + * @hw: pointer to hardware structure + * @speed: new link speed + * @autoneg_wait_to_complete: true if waiting is needed to complete + * + * Sets the link speed in the AUTOC register in the MAC and restarts link. + **/ +STATIC s32 ixgbe_setup_copper_link_82598(struct ixgbe_hw *hw, + ixgbe_link_speed speed, + bool autoneg_wait_to_complete) +{ + s32 status; + + DEBUGFUNC("ixgbe_setup_copper_link_82598"); + + /* Setup the PHY according to input speed */ + status = hw->phy.ops.setup_link_speed(hw, speed, + autoneg_wait_to_complete); + /* Set up MAC */ + ixgbe_start_mac_link_82598(hw, autoneg_wait_to_complete); + + return status; +} + +/** + * ixgbe_reset_hw_82598 - Performs hardware reset + * @hw: pointer to hardware structure + * + * Resets the hardware by resetting the transmit and receive units, masks and + * clears all interrupts, performing a PHY reset, and performing a link (MAC) + * reset. + **/ +STATIC s32 ixgbe_reset_hw_82598(struct ixgbe_hw *hw) +{ + s32 status = IXGBE_SUCCESS; + s32 phy_status = IXGBE_SUCCESS; + u32 ctrl; + u32 gheccr; + u32 i; + u32 autoc; + u8 analog_val; + + DEBUGFUNC("ixgbe_reset_hw_82598"); + + /* Call adapter stop to disable tx/rx and clear interrupts */ + status = hw->mac.ops.stop_adapter(hw); + if (status != IXGBE_SUCCESS) + goto reset_hw_out; + + /* + * Power up the Atlas Tx lanes if they are currently powered down. + * Atlas Tx lanes are powered down for MAC loopback tests, but + * they are not automatically restored on reset. + */ + hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, &analog_val); + if (analog_val & IXGBE_ATLAS_PDN_TX_REG_EN) { + /* Enable Tx Atlas so packets can be transmitted again */ + hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, + &analog_val); + analog_val &= ~IXGBE_ATLAS_PDN_TX_REG_EN; + hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, + analog_val); + + hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_10G, + &analog_val); + analog_val &= ~IXGBE_ATLAS_PDN_TX_10G_QL_ALL; + hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_10G, + analog_val); + + hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_1G, + &analog_val); + analog_val &= ~IXGBE_ATLAS_PDN_TX_1G_QL_ALL; + hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_1G, + analog_val); + + hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_AN, + &analog_val); + analog_val &= ~IXGBE_ATLAS_PDN_TX_AN_QL_ALL; + hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_AN, + analog_val); + } + + /* Reset PHY */ + if (hw->phy.reset_disable == false) { + /* PHY ops must be identified and initialized prior to reset */ + + /* Init PHY and function pointers, perform SFP setup */ + phy_status = hw->phy.ops.init(hw); + if (phy_status == IXGBE_ERR_SFP_NOT_SUPPORTED) + goto reset_hw_out; + if (phy_status == IXGBE_ERR_SFP_NOT_PRESENT) + goto mac_reset_top; + + hw->phy.ops.reset(hw); + } + +mac_reset_top: + /* + * Issue global reset to the MAC. This needs to be a SW reset. + * If link reset is used, it might reset the MAC when mng is using it + */ + ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL) | IXGBE_CTRL_RST; + IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl); + IXGBE_WRITE_FLUSH(hw); + + /* Poll for reset bit to self-clear indicating reset is complete */ + for (i = 0; i < 10; i++) { + usec_delay(1); + ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL); + if (!(ctrl & IXGBE_CTRL_RST)) + break; + } + if (ctrl & IXGBE_CTRL_RST) { + status = IXGBE_ERR_RESET_FAILED; + hw_dbg(hw, "Reset polling failed to complete.\n"); + } + + msec_delay(50); + + /* + * Double resets are required for recovery from certain error + * conditions. Between resets, it is necessary to stall to allow time + * for any pending HW events to complete. + */ + if (hw->mac.flags & IXGBE_FLAGS_DOUBLE_RESET_REQUIRED) { + hw->mac.flags &= ~IXGBE_FLAGS_DOUBLE_RESET_REQUIRED; + goto mac_reset_top; + } + + gheccr = IXGBE_READ_REG(hw, IXGBE_GHECCR); + gheccr &= ~((1 << 21) | (1 << 18) | (1 << 9) | (1 << 6)); + IXGBE_WRITE_REG(hw, IXGBE_GHECCR, gheccr); + + /* + * Store the original AUTOC value if it has not been + * stored off yet. Otherwise restore the stored original + * AUTOC value since the reset operation sets back to deaults. + */ + autoc = IXGBE_READ_REG(hw, IXGBE_AUTOC); + if (hw->mac.orig_link_settings_stored == false) { + hw->mac.orig_autoc = autoc; + hw->mac.orig_link_settings_stored = true; + } else if (autoc != hw->mac.orig_autoc) { + IXGBE_WRITE_REG(hw, IXGBE_AUTOC, hw->mac.orig_autoc); + } + + /* Store the permanent mac address */ + hw->mac.ops.get_mac_addr(hw, hw->mac.perm_addr); + + /* + * Store MAC address from RAR0, clear receive address registers, and + * clear the multicast table + */ + hw->mac.ops.init_rx_addrs(hw); + +reset_hw_out: + if (phy_status != IXGBE_SUCCESS) + status = phy_status; + + return status; +} + +/** + * ixgbe_set_vmdq_82598 - Associate a VMDq set index with a rx address + * @hw: pointer to hardware struct + * @rar: receive address register index to associate with a VMDq index + * @vmdq: VMDq set index + **/ +s32 ixgbe_set_vmdq_82598(struct ixgbe_hw *hw, u32 rar, u32 vmdq) +{ + u32 rar_high; + u32 rar_entries = hw->mac.num_rar_entries; + + DEBUGFUNC("ixgbe_set_vmdq_82598"); + + /* Make sure we are using a valid rar index range */ + if (rar >= rar_entries) { + hw_dbg(hw, "RAR index %d is out of range.\n", rar); + return IXGBE_ERR_INVALID_ARGUMENT; + } + + rar_high = IXGBE_READ_REG(hw, IXGBE_RAH(rar)); + rar_high &= ~IXGBE_RAH_VIND_MASK; + rar_high |= ((vmdq << IXGBE_RAH_VIND_SHIFT) & IXGBE_RAH_VIND_MASK); + IXGBE_WRITE_REG(hw, IXGBE_RAH(rar), rar_high); + return IXGBE_SUCCESS; +} + +/** + * ixgbe_clear_vmdq_82598 - Disassociate a VMDq set index from an rx address + * @hw: pointer to hardware struct + * @rar: receive address register index to associate with a VMDq index + * @vmdq: VMDq clear index (not used in 82598, but elsewhere) + **/ +STATIC s32 ixgbe_clear_vmdq_82598(struct ixgbe_hw *hw, u32 rar, u32 vmdq) +{ + u32 rar_high; + u32 rar_entries = hw->mac.num_rar_entries; + + UNREFERENCED_1PARAMETER(vmdq); + + /* Make sure we are using a valid rar index range */ + if (rar >= rar_entries) { + hw_dbg(hw, "RAR index %d is out of range.\n", rar); + return IXGBE_ERR_INVALID_ARGUMENT; + } + + rar_high = IXGBE_READ_REG(hw, IXGBE_RAH(rar)); + if (rar_high & IXGBE_RAH_VIND_MASK) { + rar_high &= ~IXGBE_RAH_VIND_MASK; + IXGBE_WRITE_REG(hw, IXGBE_RAH(rar), rar_high); + } + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_set_vfta_82598 - Set VLAN filter table + * @hw: pointer to hardware structure + * @vlan: VLAN id to write to VLAN filter + * @vind: VMDq output index that maps queue to VLAN id in VFTA + * @vlan_on: boolean flag to turn on/off VLAN in VFTA + * @vlvf_bypass: boolean flag - unused + * + * Turn on/off specified VLAN in the VLAN filter table. + **/ +s32 ixgbe_set_vfta_82598(struct ixgbe_hw *hw, u32 vlan, u32 vind, + bool vlan_on, bool vlvf_bypass) +{ + u32 regindex; + u32 bitindex; + u32 bits; + u32 vftabyte; + + UNREFERENCED_1PARAMETER(vlvf_bypass); + + DEBUGFUNC("ixgbe_set_vfta_82598"); + + if (vlan > 4095) + return IXGBE_ERR_PARAM; + + /* Determine 32-bit word position in array */ + regindex = (vlan >> 5) & 0x7F; /* upper seven bits */ + + /* Determine the location of the (VMD) queue index */ + vftabyte = ((vlan >> 3) & 0x03); /* bits (4:3) indicating byte array */ + bitindex = (vlan & 0x7) << 2; /* lower 3 bits indicate nibble */ + + /* Set the nibble for VMD queue index */ + bits = IXGBE_READ_REG(hw, IXGBE_VFTAVIND(vftabyte, regindex)); + bits &= (~(0x0F << bitindex)); + bits |= (vind << bitindex); + IXGBE_WRITE_REG(hw, IXGBE_VFTAVIND(vftabyte, regindex), bits); + + /* Determine the location of the bit for this VLAN id */ + bitindex = vlan & 0x1F; /* lower five bits */ + + bits = IXGBE_READ_REG(hw, IXGBE_VFTA(regindex)); + if (vlan_on) + /* Turn on this VLAN id */ + bits |= (1 << bitindex); + else + /* Turn off this VLAN id */ + bits &= ~(1 << bitindex); + IXGBE_WRITE_REG(hw, IXGBE_VFTA(regindex), bits); + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_clear_vfta_82598 - Clear VLAN filter table + * @hw: pointer to hardware structure + * + * Clears the VLAN filer table, and the VMDq index associated with the filter + **/ +STATIC s32 ixgbe_clear_vfta_82598(struct ixgbe_hw *hw) +{ + u32 offset; + u32 vlanbyte; + + DEBUGFUNC("ixgbe_clear_vfta_82598"); + + for (offset = 0; offset < hw->mac.vft_size; offset++) + IXGBE_WRITE_REG(hw, IXGBE_VFTA(offset), 0); + + for (vlanbyte = 0; vlanbyte < 4; vlanbyte++) + for (offset = 0; offset < hw->mac.vft_size; offset++) + IXGBE_WRITE_REG(hw, IXGBE_VFTAVIND(vlanbyte, offset), + 0); + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_read_analog_reg8_82598 - Reads 8 bit Atlas analog register + * @hw: pointer to hardware structure + * @reg: analog register to read + * @val: read value + * + * Performs read operation to Atlas analog register specified. + **/ +s32 ixgbe_read_analog_reg8_82598(struct ixgbe_hw *hw, u32 reg, u8 *val) +{ + u32 atlas_ctl; + + DEBUGFUNC("ixgbe_read_analog_reg8_82598"); + + IXGBE_WRITE_REG(hw, IXGBE_ATLASCTL, + IXGBE_ATLASCTL_WRITE_CMD | (reg << 8)); + IXGBE_WRITE_FLUSH(hw); + usec_delay(10); + atlas_ctl = IXGBE_READ_REG(hw, IXGBE_ATLASCTL); + *val = (u8)atlas_ctl; + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_write_analog_reg8_82598 - Writes 8 bit Atlas analog register + * @hw: pointer to hardware structure + * @reg: atlas register to write + * @val: value to write + * + * Performs write operation to Atlas analog register specified. + **/ +s32 ixgbe_write_analog_reg8_82598(struct ixgbe_hw *hw, u32 reg, u8 val) +{ + u32 atlas_ctl; + + DEBUGFUNC("ixgbe_write_analog_reg8_82598"); + + atlas_ctl = (reg << 8) | val; + IXGBE_WRITE_REG(hw, IXGBE_ATLASCTL, atlas_ctl); + IXGBE_WRITE_FLUSH(hw); + usec_delay(10); + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_read_i2c_phy_82598 - Reads 8 bit word over I2C interface. + * @hw: pointer to hardware structure + * @dev_addr: address to read from + * @byte_offset: byte offset to read from dev_addr + * @eeprom_data: value read + * + * Performs 8 byte read operation to SFP module's EEPROM over I2C interface. + **/ +STATIC s32 ixgbe_read_i2c_phy_82598(struct ixgbe_hw *hw, u8 dev_addr, + u8 byte_offset, u8 *eeprom_data) +{ + s32 status = IXGBE_SUCCESS; + u16 sfp_addr = 0; + u16 sfp_data = 0; + u16 sfp_stat = 0; + u16 gssr; + u32 i; + + DEBUGFUNC("ixgbe_read_i2c_phy_82598"); + + if (IXGBE_READ_REG(hw, IXGBE_STATUS) & IXGBE_STATUS_LAN_ID_1) + gssr = IXGBE_GSSR_PHY1_SM; + else + gssr = IXGBE_GSSR_PHY0_SM; + + if (hw->mac.ops.acquire_swfw_sync(hw, gssr) != IXGBE_SUCCESS) + return IXGBE_ERR_SWFW_SYNC; + + if (hw->phy.type == ixgbe_phy_nl) { + /* + * NetLogic phy SDA/SCL registers are at addresses 0xC30A to + * 0xC30D. These registers are used to talk to the SFP+ + * module's EEPROM through the SDA/SCL (I2C) interface. + */ + sfp_addr = (dev_addr << 8) + byte_offset; + sfp_addr = (sfp_addr | IXGBE_I2C_EEPROM_READ_MASK); + hw->phy.ops.write_reg_mdi(hw, + IXGBE_MDIO_PMA_PMD_SDA_SCL_ADDR, + IXGBE_MDIO_PMA_PMD_DEV_TYPE, + sfp_addr); + + /* Poll status */ + for (i = 0; i < 100; i++) { + hw->phy.ops.read_reg_mdi(hw, + IXGBE_MDIO_PMA_PMD_SDA_SCL_STAT, + IXGBE_MDIO_PMA_PMD_DEV_TYPE, + &sfp_stat); + sfp_stat = sfp_stat & IXGBE_I2C_EEPROM_STATUS_MASK; + if (sfp_stat != IXGBE_I2C_EEPROM_STATUS_IN_PROGRESS) + break; + msec_delay(10); + } + + if (sfp_stat != IXGBE_I2C_EEPROM_STATUS_PASS) { + hw_dbg(hw, "EEPROM read did not pass.\n"); + status = IXGBE_ERR_SFP_NOT_PRESENT; + goto out; + } + + /* Read data */ + hw->phy.ops.read_reg_mdi(hw, IXGBE_MDIO_PMA_PMD_SDA_SCL_DATA, + IXGBE_MDIO_PMA_PMD_DEV_TYPE, &sfp_data); + + *eeprom_data = (u8)(sfp_data >> 8); + } else { + status = IXGBE_ERR_PHY; + } + +out: + hw->mac.ops.release_swfw_sync(hw, gssr); + return status; +} + +/** + * ixgbe_read_i2c_eeprom_82598 - Reads 8 bit word over I2C interface. + * @hw: pointer to hardware structure + * @byte_offset: EEPROM byte offset to read + * @eeprom_data: value read + * + * Performs 8 byte read operation to SFP module's EEPROM over I2C interface. + **/ +s32 ixgbe_read_i2c_eeprom_82598(struct ixgbe_hw *hw, u8 byte_offset, + u8 *eeprom_data) +{ + return ixgbe_read_i2c_phy_82598(hw, IXGBE_I2C_EEPROM_DEV_ADDR, + byte_offset, eeprom_data); +} + +/** + * ixgbe_read_i2c_sff8472_82598 - Reads 8 bit word over I2C interface. + * @hw: pointer to hardware structure + * @byte_offset: byte offset at address 0xA2 + * @sff8472_data: value read + * + * Performs 8 byte read operation to SFP module's SFF-8472 data over I2C + **/ +STATIC s32 ixgbe_read_i2c_sff8472_82598(struct ixgbe_hw *hw, u8 byte_offset, + u8 *sff8472_data) +{ + return ixgbe_read_i2c_phy_82598(hw, IXGBE_I2C_EEPROM_DEV_ADDR2, + byte_offset, sff8472_data); +} + +/** + * ixgbe_get_supported_physical_layer_82598 - Returns physical layer type + * @hw: pointer to hardware structure + * + * Determines physical layer capabilities of the current configuration. + **/ +u64 ixgbe_get_supported_physical_layer_82598(struct ixgbe_hw *hw) +{ + u64 physical_layer = IXGBE_PHYSICAL_LAYER_UNKNOWN; + u32 autoc = IXGBE_READ_REG(hw, IXGBE_AUTOC); + u32 pma_pmd_10g = autoc & IXGBE_AUTOC_10G_PMA_PMD_MASK; + u32 pma_pmd_1g = autoc & IXGBE_AUTOC_1G_PMA_PMD_MASK; + u16 ext_ability = 0; + + DEBUGFUNC("ixgbe_get_supported_physical_layer_82598"); + + hw->phy.ops.identify(hw); + + /* Copper PHY must be checked before AUTOC LMS to determine correct + * physical layer because 10GBase-T PHYs use LMS = KX4/KX */ + switch (hw->phy.type) { + case ixgbe_phy_tn: + case ixgbe_phy_cu_unknown: + hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_EXT_ABILITY, + IXGBE_MDIO_PMA_PMD_DEV_TYPE, &ext_ability); + if (ext_ability & IXGBE_MDIO_PHY_10GBASET_ABILITY) + physical_layer |= IXGBE_PHYSICAL_LAYER_10GBASE_T; + if (ext_ability & IXGBE_MDIO_PHY_1000BASET_ABILITY) + physical_layer |= IXGBE_PHYSICAL_LAYER_1000BASE_T; + if (ext_ability & IXGBE_MDIO_PHY_100BASETX_ABILITY) + physical_layer |= IXGBE_PHYSICAL_LAYER_100BASE_TX; + goto out; + default: + break; + } + + switch (autoc & IXGBE_AUTOC_LMS_MASK) { + case IXGBE_AUTOC_LMS_1G_AN: + case IXGBE_AUTOC_LMS_1G_LINK_NO_AN: + if (pma_pmd_1g == IXGBE_AUTOC_1G_KX) + physical_layer = IXGBE_PHYSICAL_LAYER_1000BASE_KX; + else + physical_layer = IXGBE_PHYSICAL_LAYER_1000BASE_BX; + break; + case IXGBE_AUTOC_LMS_10G_LINK_NO_AN: + if (pma_pmd_10g == IXGBE_AUTOC_10G_CX4) + physical_layer = IXGBE_PHYSICAL_LAYER_10GBASE_CX4; + else if (pma_pmd_10g == IXGBE_AUTOC_10G_KX4) + physical_layer = IXGBE_PHYSICAL_LAYER_10GBASE_KX4; + else /* XAUI */ + physical_layer = IXGBE_PHYSICAL_LAYER_UNKNOWN; + break; + case IXGBE_AUTOC_LMS_KX4_AN: + case IXGBE_AUTOC_LMS_KX4_AN_1G_AN: + if (autoc & IXGBE_AUTOC_KX_SUPP) + physical_layer |= IXGBE_PHYSICAL_LAYER_1000BASE_KX; + if (autoc & IXGBE_AUTOC_KX4_SUPP) + physical_layer |= IXGBE_PHYSICAL_LAYER_10GBASE_KX4; + break; + default: + break; + } + + if (hw->phy.type == ixgbe_phy_nl) { + hw->phy.ops.identify_sfp(hw); + + switch (hw->phy.sfp_type) { + case ixgbe_sfp_type_da_cu: + physical_layer = IXGBE_PHYSICAL_LAYER_SFP_PLUS_CU; + break; + case ixgbe_sfp_type_sr: + physical_layer = IXGBE_PHYSICAL_LAYER_10GBASE_SR; + break; + case ixgbe_sfp_type_lr: + physical_layer = IXGBE_PHYSICAL_LAYER_10GBASE_LR; + break; + default: + physical_layer = IXGBE_PHYSICAL_LAYER_UNKNOWN; + break; + } + } + + switch (hw->device_id) { + case IXGBE_DEV_ID_82598_DA_DUAL_PORT: + physical_layer = IXGBE_PHYSICAL_LAYER_SFP_PLUS_CU; + break; + case IXGBE_DEV_ID_82598AF_DUAL_PORT: + case IXGBE_DEV_ID_82598AF_SINGLE_PORT: + case IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM: + physical_layer = IXGBE_PHYSICAL_LAYER_10GBASE_SR; + break; + case IXGBE_DEV_ID_82598EB_XF_LR: + physical_layer = IXGBE_PHYSICAL_LAYER_10GBASE_LR; + break; + default: + break; + } + +out: + return physical_layer; +} + +/** + * ixgbe_set_lan_id_multi_port_pcie_82598 - Set LAN id for PCIe multiple + * port devices. + * @hw: pointer to the HW structure + * + * Calls common function and corrects issue with some single port devices + * that enable LAN1 but not LAN0. + **/ +void ixgbe_set_lan_id_multi_port_pcie_82598(struct ixgbe_hw *hw) +{ + struct ixgbe_bus_info *bus = &hw->bus; + u16 pci_gen = 0; + u16 pci_ctrl2 = 0; + + DEBUGFUNC("ixgbe_set_lan_id_multi_port_pcie_82598"); + + ixgbe_set_lan_id_multi_port_pcie(hw); + + /* check if LAN0 is disabled */ + hw->eeprom.ops.read(hw, IXGBE_PCIE_GENERAL_PTR, &pci_gen); + if ((pci_gen != 0) && (pci_gen != 0xFFFF)) { + + hw->eeprom.ops.read(hw, pci_gen + IXGBE_PCIE_CTRL2, &pci_ctrl2); + + /* if LAN0 is completely disabled force function to 0 */ + if ((pci_ctrl2 & IXGBE_PCIE_CTRL2_LAN_DISABLE) && + !(pci_ctrl2 & IXGBE_PCIE_CTRL2_DISABLE_SELECT) && + !(pci_ctrl2 & IXGBE_PCIE_CTRL2_DUMMY_ENABLE)) { + + bus->func = 0; + } + } +} + +/** + * ixgbe_set_rxpba_82598 - Initialize RX packet buffer + * @hw: pointer to hardware structure + * @num_pb: number of packet buffers to allocate + * @headroom: reserve n KB of headroom + * @strategy: packet buffer allocation strategy + **/ +STATIC void ixgbe_set_rxpba_82598(struct ixgbe_hw *hw, int num_pb, + u32 headroom, int strategy) +{ + u32 rxpktsize = IXGBE_RXPBSIZE_64KB; + u8 i = 0; + UNREFERENCED_1PARAMETER(headroom); + + if (!num_pb) + return; + + /* Setup Rx packet buffer sizes */ + switch (strategy) { + case PBA_STRATEGY_WEIGHTED: + /* Setup the first four at 80KB */ + rxpktsize = IXGBE_RXPBSIZE_80KB; + for (; i < 4; i++) + IXGBE_WRITE_REG(hw, IXGBE_RXPBSIZE(i), rxpktsize); + /* Setup the last four at 48KB...don't re-init i */ + rxpktsize = IXGBE_RXPBSIZE_48KB; + /* Fall Through */ + case PBA_STRATEGY_EQUAL: + default: + /* Divide the remaining Rx packet buffer evenly among the TCs */ + for (; i < IXGBE_MAX_PACKET_BUFFERS; i++) + IXGBE_WRITE_REG(hw, IXGBE_RXPBSIZE(i), rxpktsize); + break; + } + + /* Setup Tx packet buffer sizes */ + for (i = 0; i < IXGBE_MAX_PACKET_BUFFERS; i++) + IXGBE_WRITE_REG(hw, IXGBE_TXPBSIZE(i), IXGBE_TXPBSIZE_40KB); +} + +/** + * ixgbe_enable_rx_dma_82598 - Enable the Rx DMA unit + * @hw: pointer to hardware structure + * @regval: register value to write to RXCTRL + * + * Enables the Rx DMA unit + **/ +s32 ixgbe_enable_rx_dma_82598(struct ixgbe_hw *hw, u32 regval) +{ + DEBUGFUNC("ixgbe_enable_rx_dma_82598"); + + IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, regval); + + return IXGBE_SUCCESS; +} diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_82598.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_82598.h new file mode 100644 index 00000000000..0e66bd3d868 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_82598.h @@ -0,0 +1,22 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 1999 - 2026 Intel Corporation */ + +#ifndef _IXGBE_82598_H_ +#define _IXGBE_82598_H_ + +u32 ixgbe_get_pcie_msix_count_82598(struct ixgbe_hw *hw); +s32 ixgbe_fc_enable_82598(struct ixgbe_hw *hw); +s32 ixgbe_start_hw_82598(struct ixgbe_hw *hw); +s32 ixgbe_set_vmdq_82598(struct ixgbe_hw *hw, u32 rar, u32 vmdq); +s32 ixgbe_set_vfta_82598(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on, + bool vlvf_bypass); +s32 ixgbe_read_analog_reg8_82598(struct ixgbe_hw *hw, u32 reg, u8 *val); +s32 ixgbe_write_analog_reg8_82598(struct ixgbe_hw *hw, u32 reg, u8 val); +s32 ixgbe_read_i2c_eeprom_82598(struct ixgbe_hw *hw, u8 byte_offset, + u8 *eeprom_data); +u64 ixgbe_get_supported_physical_layer_82598(struct ixgbe_hw *hw); +s32 ixgbe_init_phy_ops_82598(struct ixgbe_hw *hw); +void ixgbe_set_lan_id_multi_port_pcie_82598(struct ixgbe_hw *hw); +void ixgbe_set_pcie_completion_timeout(struct ixgbe_hw *hw); +s32 ixgbe_enable_rx_dma_82598(struct ixgbe_hw *hw, u32 regval); +#endif /* _IXGBE_82598_H_ */ diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_82599.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_82599.c new file mode 100644 index 00000000000..36e387c9eba --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_82599.c @@ -0,0 +1,2537 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 1999 - 2026 Intel Corporation */ + +#include "ixgbe_type.h" +#include "ixgbe_82599.h" +#include "ixgbe_api.h" +#include "ixgbe_common.h" +#include "ixgbe_phy.h" + +#define IXGBE_82599_MAX_TX_QUEUES 128 +#define IXGBE_82599_MAX_RX_QUEUES 128 +#define IXGBE_82599_RAR_ENTRIES 128 +#define IXGBE_82599_MC_TBL_SIZE 128 +#define IXGBE_82599_VFT_TBL_SIZE 128 +#define IXGBE_82599_RX_PB_SIZE 512 + +STATIC s32 ixgbe_setup_copper_link_82599(struct ixgbe_hw *hw, + ixgbe_link_speed speed, + bool autoneg_wait_to_complete); +STATIC s32 ixgbe_verify_fw_version_82599(struct ixgbe_hw *hw); +STATIC s32 ixgbe_read_eeprom_82599(struct ixgbe_hw *hw, + u16 offset, u16 *data); +STATIC s32 ixgbe_read_eeprom_buffer_82599(struct ixgbe_hw *hw, u16 offset, + u16 words, u16 *data); +STATIC s32 ixgbe_read_i2c_byte_82599(struct ixgbe_hw *hw, u8 byte_offset, + u8 dev_addr, u8 *data); +STATIC s32 ixgbe_write_i2c_byte_82599(struct ixgbe_hw *hw, u8 byte_offset, + u8 dev_addr, u8 data); + +void ixgbe_init_mac_link_ops_82599(struct ixgbe_hw *hw) +{ + struct ixgbe_mac_info *mac = &hw->mac; + + DEBUGFUNC("ixgbe_init_mac_link_ops_82599"); + + /* + * enable the laser control functions for SFP+ fiber + * and MNG not enabled + */ + if ((mac->ops.get_media_type(hw) == ixgbe_media_type_fiber) && + !ixgbe_mng_enabled(hw)) { + mac->ops.disable_tx_laser = + ixgbe_disable_tx_laser_multispeed_fiber; + mac->ops.enable_tx_laser = + ixgbe_enable_tx_laser_multispeed_fiber; + mac->ops.flap_tx_laser = ixgbe_flap_tx_laser_multispeed_fiber; + + } else { + mac->ops.disable_tx_laser = NULL; + mac->ops.enable_tx_laser = NULL; + mac->ops.flap_tx_laser = NULL; + } + + if (hw->phy.multispeed_fiber) { + /* Set up dual speed SFP+ support */ + mac->ops.setup_link = ixgbe_setup_mac_link_multispeed_fiber; + mac->ops.setup_mac_link = ixgbe_setup_mac_link_82599; + mac->ops.set_rate_select_speed = + ixgbe_set_hard_rate_select_speed; + } else { + if ((ixgbe_get_media_type(hw) == ixgbe_media_type_backplane) && + (hw->phy.smart_speed == ixgbe_smart_speed_auto || + hw->phy.smart_speed == ixgbe_smart_speed_on) && + !ixgbe_verify_lesm_fw_enabled_82599(hw)) { + mac->ops.setup_link = ixgbe_setup_mac_link_smartspeed; + } else { + mac->ops.setup_link = ixgbe_setup_mac_link_82599; + } + } +} + +/** + * ixgbe_init_phy_ops_82599 - PHY/SFP specific init + * @hw: pointer to hardware structure + * + * Initialize any function pointers that were not able to be + * set during init_shared_code because the PHY/SFP type was + * not known. Perform the SFP init if necessary. + * + **/ +s32 ixgbe_init_phy_ops_82599(struct ixgbe_hw *hw) +{ + struct ixgbe_mac_info *mac = &hw->mac; + struct ixgbe_phy_info *phy = &hw->phy; + s32 ret_val = IXGBE_SUCCESS; + u32 esdp; + + DEBUGFUNC("ixgbe_init_phy_ops_82599"); + + if (hw->device_id == IXGBE_DEV_ID_82599_QSFP_SF_QP) { + /* Store flag indicating I2C bus access control unit. */ + hw->phy.qsfp_shared_i2c_bus = TRUE; + + /* Initialize access to QSFP+ I2C bus */ + esdp = IXGBE_READ_REG(hw, IXGBE_ESDP); + esdp |= IXGBE_ESDP_SDP0_DIR; + esdp &= ~IXGBE_ESDP_SDP1_DIR; + esdp &= ~IXGBE_ESDP_SDP0; + esdp &= ~IXGBE_ESDP_SDP0_NATIVE; + esdp &= ~IXGBE_ESDP_SDP1_NATIVE; + IXGBE_WRITE_REG(hw, IXGBE_ESDP, esdp); + IXGBE_WRITE_FLUSH(hw); + + phy->ops.read_i2c_byte = ixgbe_read_i2c_byte_82599; + phy->ops.write_i2c_byte = ixgbe_write_i2c_byte_82599; + } + /* Identify the PHY or SFP module */ + ret_val = phy->ops.identify(hw); + if (ret_val == IXGBE_ERR_SFP_NOT_SUPPORTED) + goto init_phy_ops_out; + + /* Setup function pointers based on detected SFP module and speeds */ + ixgbe_init_mac_link_ops_82599(hw); + if (hw->phy.sfp_type != ixgbe_sfp_type_unknown) + hw->phy.ops.reset = NULL; + + /* If copper media, overwrite with copper function pointers */ + if (mac->ops.get_media_type(hw) == ixgbe_media_type_copper) { + mac->ops.setup_link = ixgbe_setup_copper_link_82599; + mac->ops.get_link_capabilities = + ixgbe_get_copper_link_capabilities_generic; + } + + /* Set necessary function pointers based on PHY type */ + switch (hw->phy.type) { + case ixgbe_phy_tn: + phy->ops.setup_link = ixgbe_setup_phy_link_tnx; + phy->ops.check_link = ixgbe_check_phy_link_tnx; + phy->ops.get_firmware_version = + ixgbe_get_phy_firmware_version_tnx; + break; + default: + break; + } +init_phy_ops_out: + return ret_val; +} + +s32 ixgbe_setup_sfp_modules_82599(struct ixgbe_hw *hw) +{ + s32 ret_val = IXGBE_SUCCESS; + u16 list_offset, data_offset, data_value; + + DEBUGFUNC("ixgbe_setup_sfp_modules_82599"); + + if (hw->phy.sfp_type != ixgbe_sfp_type_unknown) { + ixgbe_init_mac_link_ops_82599(hw); + + hw->phy.ops.reset = NULL; + + ret_val = ixgbe_get_sfp_init_sequence_offsets(hw, &list_offset, + &data_offset); + if (ret_val != IXGBE_SUCCESS) + goto setup_sfp_out; + + /* PHY config will finish before releasing the semaphore */ + ret_val = hw->mac.ops.acquire_swfw_sync(hw, + IXGBE_GSSR_MAC_CSR_SM); + if (ret_val != IXGBE_SUCCESS) { + ret_val = IXGBE_ERR_SWFW_SYNC; + goto setup_sfp_out; + } + + if (hw->eeprom.ops.read(hw, ++data_offset, &data_value)) + goto setup_sfp_err; + while (data_value != 0xffff) { + IXGBE_WRITE_REG(hw, IXGBE_CORECTL, data_value); + IXGBE_WRITE_FLUSH(hw); + if (hw->eeprom.ops.read(hw, ++data_offset, &data_value)) + goto setup_sfp_err; + } + + /* Release the semaphore */ + hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_MAC_CSR_SM); + /* Delay obtaining semaphore again to allow FW access + * prot_autoc_write uses the semaphore too. + */ + msec_delay(hw->eeprom.semaphore_delay); + + /* Restart DSP and set SFI mode */ + ret_val = hw->mac.ops.prot_autoc_write(hw, + hw->mac.orig_autoc | IXGBE_AUTOC_LMS_10G_SERIAL, + false); + + if (ret_val) { + hw_dbg(hw, "sfp module setup not complete\n"); + ret_val = IXGBE_ERR_SFP_SETUP_NOT_COMPLETE; + goto setup_sfp_out; + } + + } + +setup_sfp_out: + return ret_val; + +setup_sfp_err: + /* Release the semaphore */ + hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_MAC_CSR_SM); + /* Delay obtaining semaphore again to allow FW access */ + msec_delay(hw->eeprom.semaphore_delay); + ERROR_REPORT2(IXGBE_ERROR_INVALID_STATE, + "eeprom read at offset %d failed", data_offset); + return IXGBE_ERR_PHY; +} + +/** + * prot_autoc_read_82599 - Hides MAC differences needed for AUTOC read + * @hw: pointer to hardware structure + * @locked: Return the if we locked for this read. + * @reg_val: Value we read from AUTOC + * + * For this part (82599) we need to wrap read-modify-writes with a possible + * FW/SW lock. It is assumed this lock will be freed with the next + * prot_autoc_write_82599(). + */ +s32 prot_autoc_read_82599(struct ixgbe_hw *hw, bool *locked, u32 *reg_val) +{ + s32 ret_val; + + *locked = false; + /* If LESM is on then we need to hold the SW/FW semaphore. */ + if (ixgbe_verify_lesm_fw_enabled_82599(hw)) { + ret_val = hw->mac.ops.acquire_swfw_sync(hw, + IXGBE_GSSR_MAC_CSR_SM); + if (ret_val != IXGBE_SUCCESS) + return IXGBE_ERR_SWFW_SYNC; + + *locked = true; + } + + *reg_val = IXGBE_READ_REG(hw, IXGBE_AUTOC); + return IXGBE_SUCCESS; +} + +/** + * prot_autoc_write_82599 - Hides MAC differences needed for AUTOC write + * @hw: pointer to hardware structure + * @autoc: value to write to AUTOC + * @locked: bool to indicate whether the SW/FW lock was already taken by + * previous proc_autoc_read_82599. + * + * This part (82599) may need to hold the SW/FW lock around all writes to + * AUTOC. Likewise after a write we need to do a pipeline reset. + */ +s32 prot_autoc_write_82599(struct ixgbe_hw *hw, u32 autoc, bool locked) +{ + s32 ret_val = IXGBE_SUCCESS; + + /* Blocked by MNG FW so bail */ + if (ixgbe_check_reset_blocked(hw)) + goto out; + + /* We only need to get the lock if: + * - We didn't do it already (in the read part of a read-modify-write) + * - LESM is enabled. + */ + if (!locked && ixgbe_verify_lesm_fw_enabled_82599(hw)) { + ret_val = hw->mac.ops.acquire_swfw_sync(hw, + IXGBE_GSSR_MAC_CSR_SM); + if (ret_val != IXGBE_SUCCESS) + return IXGBE_ERR_SWFW_SYNC; + + locked = true; + } + + IXGBE_WRITE_REG(hw, IXGBE_AUTOC, autoc); + ret_val = ixgbe_reset_pipeline_82599(hw); + +out: + /* Free the SW/FW semaphore as we either grabbed it here or + * already had it when this function was called. + */ + if (locked) + hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_MAC_CSR_SM); + + return ret_val; +} + +/** + * ixgbe_init_ops_82599 - Inits func ptrs and MAC type + * @hw: pointer to hardware structure + * + * Initialize the function pointers and assign the MAC type for 82599. + * Does not touch the hardware. + **/ + +s32 ixgbe_init_ops_82599(struct ixgbe_hw *hw) +{ + struct ixgbe_mac_info *mac = &hw->mac; + struct ixgbe_phy_info *phy = &hw->phy; + struct ixgbe_eeprom_info *eeprom = &hw->eeprom; + s32 ret_val; + u16 i; + + DEBUGFUNC("ixgbe_init_ops_82599"); + + ixgbe_init_phy_ops_generic(hw); + ret_val = ixgbe_init_ops_generic(hw); + + /* PHY */ + phy->ops.identify = ixgbe_identify_phy_82599; + phy->ops.init = ixgbe_init_phy_ops_82599; + + /* MAC */ + mac->ops.reset_hw = ixgbe_reset_hw_82599; + mac->ops.get_media_type = ixgbe_get_media_type_82599; + mac->ops.get_supported_physical_layer = + ixgbe_get_supported_physical_layer_82599; + mac->ops.disable_sec_rx_path = ixgbe_disable_sec_rx_path_generic; + mac->ops.enable_sec_rx_path = ixgbe_enable_sec_rx_path_generic; + mac->ops.enable_rx_dma = ixgbe_enable_rx_dma_82599; + mac->ops.read_analog_reg8 = ixgbe_read_analog_reg8_82599; + mac->ops.write_analog_reg8 = ixgbe_write_analog_reg8_82599; + mac->ops.start_hw = ixgbe_start_hw_82599; + mac->ops.get_san_mac_addr = ixgbe_get_san_mac_addr_generic; + mac->ops.set_san_mac_addr = ixgbe_set_san_mac_addr_generic; + mac->ops.get_device_caps = ixgbe_get_device_caps_generic; + mac->ops.get_wwn_prefix = ixgbe_get_wwn_prefix_generic; + mac->ops.get_fcoe_boot_status = ixgbe_get_fcoe_boot_status_generic; + mac->ops.prot_autoc_read = prot_autoc_read_82599; + mac->ops.prot_autoc_write = prot_autoc_write_82599; + + /* RAR, Multicast, VLAN */ + mac->ops.set_vmdq = ixgbe_set_vmdq_generic; + mac->ops.set_vmdq_san_mac = ixgbe_set_vmdq_san_mac_generic; + mac->ops.clear_vmdq = ixgbe_clear_vmdq_generic; + mac->ops.insert_mac_addr = ixgbe_insert_mac_addr_generic; + mac->rar_highwater = 1; + mac->ops.set_vfta = ixgbe_set_vfta_generic; + mac->ops.set_vlvf = ixgbe_set_vlvf_generic; + mac->ops.clear_vfta = ixgbe_clear_vfta_generic; + mac->ops.init_uta_tables = ixgbe_init_uta_tables_generic; + mac->ops.setup_sfp = ixgbe_setup_sfp_modules_82599; + mac->ops.set_mac_anti_spoofing = ixgbe_set_mac_anti_spoofing; + mac->ops.set_vlan_anti_spoofing = ixgbe_set_vlan_anti_spoofing; + + /* Link */ + mac->ops.get_link_capabilities = ixgbe_get_link_capabilities_82599; + mac->ops.check_link = ixgbe_check_mac_link_generic; + mac->ops.setup_rxpba = ixgbe_set_rxpba_generic; + ixgbe_init_mac_link_ops_82599(hw); + + mac->mcft_size = IXGBE_82599_MC_TBL_SIZE; + mac->vft_size = IXGBE_82599_VFT_TBL_SIZE; + mac->num_rar_entries = IXGBE_82599_RAR_ENTRIES; + mac->rx_pb_size = IXGBE_82599_RX_PB_SIZE; + mac->max_rx_queues = IXGBE_82599_MAX_RX_QUEUES; + mac->max_tx_queues = IXGBE_82599_MAX_TX_QUEUES; + mac->max_msix_vectors = ixgbe_get_pcie_msix_count_generic(hw); + + mac->arc_subsystem_valid = !!(IXGBE_READ_REG(hw, IXGBE_FWSM_BY_MAC(hw)) + & IXGBE_FWSM_MODE_MASK); + + for (i = 0; i < 64; i++) + hw->mbx.ops[i].init_params = ixgbe_init_mbx_params_pf; + + /* EEPROM */ + eeprom->ops.read = ixgbe_read_eeprom_82599; + eeprom->ops.read_buffer = ixgbe_read_eeprom_buffer_82599; + + /* Manageability interface */ + mac->ops.set_fw_drv_ver = ixgbe_set_fw_drv_ver_generic; + + mac->ops.get_thermal_sensor_data = + ixgbe_get_thermal_sensor_data_generic; + mac->ops.init_thermal_sensor_thresh = + ixgbe_init_thermal_sensor_thresh_generic; + + mac->ops.get_rtrup2tc = ixgbe_dcb_get_rtrup2tc_generic; + + return ret_val; +} + +/** + * ixgbe_get_link_capabilities_82599 - Determines link capabilities + * @hw: pointer to hardware structure + * @speed: pointer to link speed + * @autoneg: true when autoneg or autotry is enabled + * + * Determines the link capabilities by reading the AUTOC register. + **/ +s32 ixgbe_get_link_capabilities_82599(struct ixgbe_hw *hw, + ixgbe_link_speed *speed, + bool *autoneg) +{ + s32 status = IXGBE_SUCCESS; + u32 autoc = 0; + + DEBUGFUNC("ixgbe_get_link_capabilities_82599"); + + + /* Check if 1G SFP module. */ + if (hw->phy.sfp_type == ixgbe_sfp_type_1g_cu_core0 || + hw->phy.sfp_type == ixgbe_sfp_type_1g_cu_core1 || + hw->phy.sfp_type == ixgbe_sfp_type_1g_lx_core0 || + hw->phy.sfp_type == ixgbe_sfp_type_1g_lx_core1 || + hw->phy.sfp_type == ixgbe_sfp_type_1g_sx_core0 || + hw->phy.sfp_type == ixgbe_sfp_type_1g_sx_core1) { + *speed = IXGBE_LINK_SPEED_1GB_FULL; + *autoneg = true; + goto out; + } + + /* + * Determine link capabilities based on the stored value of AUTOC, + * which represents EEPROM defaults. If AUTOC value has not + * been stored, use the current register values. + */ + if (hw->mac.orig_link_settings_stored) + autoc = hw->mac.orig_autoc; + else + autoc = IXGBE_READ_REG(hw, IXGBE_AUTOC); + + switch (autoc & IXGBE_AUTOC_LMS_MASK) { + case IXGBE_AUTOC_LMS_1G_LINK_NO_AN: + *speed = IXGBE_LINK_SPEED_1GB_FULL; + *autoneg = false; + break; + + case IXGBE_AUTOC_LMS_10G_LINK_NO_AN: + *speed = IXGBE_LINK_SPEED_10GB_FULL; + *autoneg = false; + break; + + case IXGBE_AUTOC_LMS_1G_AN: + *speed = IXGBE_LINK_SPEED_1GB_FULL; + *autoneg = true; + break; + + case IXGBE_AUTOC_LMS_10G_SERIAL: + *speed = IXGBE_LINK_SPEED_10GB_FULL; + *autoneg = false; + break; + + case IXGBE_AUTOC_LMS_KX4_KX_KR: + case IXGBE_AUTOC_LMS_KX4_KX_KR_1G_AN: + *speed = IXGBE_LINK_SPEED_UNKNOWN; + if (autoc & IXGBE_AUTOC_KR_SUPP) + *speed |= IXGBE_LINK_SPEED_10GB_FULL; + if (autoc & IXGBE_AUTOC_KX4_SUPP) + *speed |= IXGBE_LINK_SPEED_10GB_FULL; + if (autoc & IXGBE_AUTOC_KX_SUPP) + *speed |= IXGBE_LINK_SPEED_1GB_FULL; + *autoneg = true; + break; + + case IXGBE_AUTOC_LMS_KX4_KX_KR_SGMII: + *speed = IXGBE_LINK_SPEED_100_FULL; + if (autoc & IXGBE_AUTOC_KR_SUPP) + *speed |= IXGBE_LINK_SPEED_10GB_FULL; + if (autoc & IXGBE_AUTOC_KX4_SUPP) + *speed |= IXGBE_LINK_SPEED_10GB_FULL; + if (autoc & IXGBE_AUTOC_KX_SUPP) + *speed |= IXGBE_LINK_SPEED_1GB_FULL; + *autoneg = true; + break; + + case IXGBE_AUTOC_LMS_SGMII_1G_100M: + *speed = IXGBE_LINK_SPEED_1GB_FULL | IXGBE_LINK_SPEED_100_FULL; + *autoneg = false; + break; + + default: + status = IXGBE_ERR_LINK_SETUP; + goto out; + break; + } + + if (hw->phy.multispeed_fiber) { + *speed |= IXGBE_LINK_SPEED_10GB_FULL | + IXGBE_LINK_SPEED_1GB_FULL; + + /* QSFP must not enable full auto-negotiation + * Limited autoneg is enabled at 1G + */ + if (hw->phy.media_type == ixgbe_media_type_fiber_qsfp) + *autoneg = false; + else + *autoneg = true; + } + +out: + return status; +} + +/** + * ixgbe_get_media_type_82599 - Get media type + * @hw: pointer to hardware structure + * + * Returns the media type (fiber, copper, backplane) + **/ +enum ixgbe_media_type ixgbe_get_media_type_82599(struct ixgbe_hw *hw) +{ + enum ixgbe_media_type media_type; + + DEBUGFUNC("ixgbe_get_media_type_82599"); + + /* Detect if there is a copper PHY attached. */ + switch (hw->phy.type) { + case ixgbe_phy_cu_unknown: + case ixgbe_phy_tn: + media_type = ixgbe_media_type_copper; + goto out; + default: + break; + } + + switch (hw->device_id) { + case IXGBE_DEV_ID_82599_KX4: + case IXGBE_DEV_ID_82599_KX4_MEZZ: + case IXGBE_DEV_ID_82599_COMBO_BACKPLANE: + case IXGBE_DEV_ID_82599_KR: + case IXGBE_DEV_ID_82599_BACKPLANE_FCOE: + case IXGBE_DEV_ID_82599_XAUI_LOM: + /* Default device ID is mezzanine card KX/KX4 */ + media_type = ixgbe_media_type_backplane; + break; + case IXGBE_DEV_ID_82599_SFP: + case IXGBE_DEV_ID_82599_SFP_FCOE: + case IXGBE_DEV_ID_82599_SFP_EM: + case IXGBE_DEV_ID_82599_SFP_SF2: + case IXGBE_DEV_ID_82599_SFP_SF_QP: + case IXGBE_DEV_ID_82599EN_SFP: + media_type = ixgbe_media_type_fiber; + break; + case IXGBE_DEV_ID_82599_CX4: + media_type = ixgbe_media_type_cx4; + break; + case IXGBE_DEV_ID_82599_T3_LOM: + media_type = ixgbe_media_type_copper; + break; + case IXGBE_DEV_ID_82599_QSFP_SF_QP: + media_type = ixgbe_media_type_fiber_qsfp; + break; + default: + media_type = ixgbe_media_type_unknown; + break; + } +out: + return media_type; +} + +/** + * ixgbe_stop_mac_link_on_d3_82599 - Disables link on D3 + * @hw: pointer to hardware structure + * + * Disables link during D3 power down sequence. + * + **/ +void ixgbe_stop_mac_link_on_d3_82599(struct ixgbe_hw *hw) +{ + u16 ee_ctrl_2 = 0; + u32 autoc2_reg; + u32 status; + + DEBUGFUNC("ixgbe_stop_mac_link_on_d3_82599"); + status = ixgbe_read_eeprom(hw, IXGBE_EEPROM_CTRL_2, &ee_ctrl_2); + + if (status == IXGBE_SUCCESS && + !ixgbe_mng_present(hw) && !hw->wol_enabled && + ee_ctrl_2 & IXGBE_EEPROM_CCD_BIT) { + autoc2_reg = IXGBE_READ_REG(hw, IXGBE_AUTOC2); + autoc2_reg |= IXGBE_AUTOC2_LINK_DISABLE_ON_D3_MASK; + IXGBE_WRITE_REG(hw, IXGBE_AUTOC2, autoc2_reg); + } +} + +/** + * ixgbe_start_mac_link_82599 - Setup MAC link settings + * @hw: pointer to hardware structure + * @autoneg_wait_to_complete: true when waiting for completion is needed + * + * Configures link settings based on values in the ixgbe_hw struct. + * Restarts the link. Performs autonegotiation if needed. + **/ +s32 ixgbe_start_mac_link_82599(struct ixgbe_hw *hw, + bool autoneg_wait_to_complete) +{ + u32 autoc_reg; + u32 links_reg; + u32 i; + s32 status = IXGBE_SUCCESS; + bool got_lock = false; + + DEBUGFUNC("ixgbe_start_mac_link_82599"); + + /* reset_pipeline requires us to hold this lock as it writes to + * AUTOC. + */ + if (ixgbe_verify_lesm_fw_enabled_82599(hw)) { + status = hw->mac.ops.acquire_swfw_sync(hw, + IXGBE_GSSR_MAC_CSR_SM); + if (status != IXGBE_SUCCESS) + goto out; + + got_lock = true; + } + + /* Restart link */ + ixgbe_reset_pipeline_82599(hw); + + if (got_lock) + hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_MAC_CSR_SM); + + /* Only poll for autoneg to complete if specified to do so */ + if (autoneg_wait_to_complete) { + autoc_reg = IXGBE_READ_REG(hw, IXGBE_AUTOC); + if ((autoc_reg & IXGBE_AUTOC_LMS_MASK) == + IXGBE_AUTOC_LMS_KX4_KX_KR || + (autoc_reg & IXGBE_AUTOC_LMS_MASK) == + IXGBE_AUTOC_LMS_KX4_KX_KR_1G_AN || + (autoc_reg & IXGBE_AUTOC_LMS_MASK) == + IXGBE_AUTOC_LMS_KX4_KX_KR_SGMII) { + links_reg = 0; /* Just in case Autoneg time = 0 */ + for (i = 0; i < IXGBE_AUTO_NEG_TIME; i++) { + links_reg = IXGBE_READ_REG(hw, IXGBE_LINKS); + if (links_reg & IXGBE_LINKS_KX_AN_COMP) + break; + msec_delay(100); + } + if (!(links_reg & IXGBE_LINKS_KX_AN_COMP)) { + status = IXGBE_ERR_AUTONEG_NOT_COMPLETE; + hw_dbg(hw, "Autoneg did not complete.\n"); + } + } + } + + /* Add delay to filter out noises during initial link setup */ + msec_delay(50); + +out: + return status; +} + +/** + * ixgbe_disable_tx_laser_multispeed_fiber - Disable Tx laser + * @hw: pointer to hardware structure + * + * The base drivers may require better control over SFP+ module + * PHY states. This includes selectively shutting down the Tx + * laser on the PHY, effectively halting physical link. + **/ +void ixgbe_disable_tx_laser_multispeed_fiber(struct ixgbe_hw *hw) +{ + u32 esdp_reg = IXGBE_READ_REG(hw, IXGBE_ESDP); + + /* Blocked by MNG FW so bail */ + if (ixgbe_check_reset_blocked(hw)) + return; + + /* Disable Tx laser; allow 100us to go dark per spec */ + esdp_reg |= IXGBE_ESDP_SDP3; + IXGBE_WRITE_REG(hw, IXGBE_ESDP, esdp_reg); + IXGBE_WRITE_FLUSH(hw); + usec_delay(100); +} + +/** + * ixgbe_enable_tx_laser_multispeed_fiber - Enable Tx laser + * @hw: pointer to hardware structure + * + * The base drivers may require better control over SFP+ module + * PHY states. This includes selectively turning on the Tx + * laser on the PHY, effectively starting physical link. + **/ +void ixgbe_enable_tx_laser_multispeed_fiber(struct ixgbe_hw *hw) +{ + u32 esdp_reg = IXGBE_READ_REG(hw, IXGBE_ESDP); + + /* Enable Tx laser; allow 100ms to light up */ + esdp_reg &= ~IXGBE_ESDP_SDP3; + IXGBE_WRITE_REG(hw, IXGBE_ESDP, esdp_reg); + IXGBE_WRITE_FLUSH(hw); + msec_delay(100); +} + +/** + * ixgbe_flap_tx_laser_multispeed_fiber - Flap Tx laser + * @hw: pointer to hardware structure + * + * When the driver changes the link speeds that it can support, + * it sets autotry_restart to true to indicate that we need to + * initiate a new autotry session with the link partner. To do + * so, we set the speed then disable and re-enable the Tx laser, to + * alert the link partner that it also needs to restart autotry on its + * end. This is consistent with true clause 37 autoneg, which also + * involves a loss of signal. + **/ +void ixgbe_flap_tx_laser_multispeed_fiber(struct ixgbe_hw *hw) +{ + DEBUGFUNC("ixgbe_flap_tx_laser_multispeed_fiber"); + + /* Blocked by MNG FW so bail */ + if (ixgbe_check_reset_blocked(hw)) + return; + + if (hw->mac.autotry_restart) { + ixgbe_disable_tx_laser_multispeed_fiber(hw); + ixgbe_enable_tx_laser_multispeed_fiber(hw); + hw->mac.autotry_restart = false; + } +} + +/** + * ixgbe_set_hard_rate_select_speed - Set module link speed + * @hw: pointer to hardware structure + * @speed: link speed to set + * + * Set module link speed via RS0/RS1 rate select pins. + */ +void ixgbe_set_hard_rate_select_speed(struct ixgbe_hw *hw, + ixgbe_link_speed speed) +{ + u32 esdp_reg = IXGBE_READ_REG(hw, IXGBE_ESDP); + + switch (speed) { + case IXGBE_LINK_SPEED_10GB_FULL: + esdp_reg |= (IXGBE_ESDP_SDP5_DIR | IXGBE_ESDP_SDP5); + break; + case IXGBE_LINK_SPEED_1GB_FULL: + esdp_reg &= ~IXGBE_ESDP_SDP5; + esdp_reg |= IXGBE_ESDP_SDP5_DIR; + break; + default: + hw_dbg(hw, "Invalid fixed module speed\n"); + return; + } + + IXGBE_WRITE_REG(hw, IXGBE_ESDP, esdp_reg); + IXGBE_WRITE_FLUSH(hw); +} + +/** + * ixgbe_setup_mac_link_smartspeed - Set MAC link speed using SmartSpeed + * @hw: pointer to hardware structure + * @speed: new link speed + * @autoneg_wait_to_complete: true when waiting for completion is needed + * + * Implements the Intel SmartSpeed algorithm. + **/ +s32 ixgbe_setup_mac_link_smartspeed(struct ixgbe_hw *hw, + ixgbe_link_speed speed, + bool autoneg_wait_to_complete) +{ + s32 status = IXGBE_SUCCESS; + ixgbe_link_speed link_speed = IXGBE_LINK_SPEED_UNKNOWN; + s32 i, j; + bool link_up = false; + u32 autoc_reg = IXGBE_READ_REG(hw, IXGBE_AUTOC); + + DEBUGFUNC("ixgbe_setup_mac_link_smartspeed"); + + /* Set autoneg_advertised value based on input link speed */ + hw->phy.autoneg_advertised = 0; + + if (speed & IXGBE_LINK_SPEED_10GB_FULL) + hw->phy.autoneg_advertised |= IXGBE_LINK_SPEED_10GB_FULL; + + if (speed & IXGBE_LINK_SPEED_1GB_FULL) + hw->phy.autoneg_advertised |= IXGBE_LINK_SPEED_1GB_FULL; + + if (speed & IXGBE_LINK_SPEED_100_FULL) + hw->phy.autoneg_advertised |= IXGBE_LINK_SPEED_100_FULL; + + /* + * Implement Intel SmartSpeed algorithm. SmartSpeed will reduce the + * autoneg advertisement if link is unable to be established at the + * highest negotiated rate. This can sometimes happen due to integrity + * issues with the physical media connection. + */ + + /* First, try to get link with full advertisement */ + hw->phy.smart_speed_active = false; + for (j = 0; j < IXGBE_SMARTSPEED_MAX_RETRIES; j++) { + status = ixgbe_setup_mac_link_82599(hw, speed, + autoneg_wait_to_complete); + if (status != IXGBE_SUCCESS) + goto out; + + /* + * Wait for the controller to acquire link. Per IEEE 802.3ap, + * Section 73.10.2, we may have to wait up to 500ms if KR is + * attempted, or 200ms if KX/KX4/BX/BX4 is attempted, per + * Table 9 in the AN MAS. + */ + for (i = 0; i < 5; i++) { + msec_delay(100); + + /* If we have link, just jump out */ + status = ixgbe_check_link(hw, &link_speed, &link_up, + false); + if (status != IXGBE_SUCCESS) + goto out; + + if (link_up) + goto out; + } + } + + /* + * We didn't get link. If we advertised KR plus one of KX4/KX + * (or BX4/BX), then disable KR and try again. + */ + if (((autoc_reg & IXGBE_AUTOC_KR_SUPP) == 0) || + ((autoc_reg & IXGBE_AUTOC_KX4_KX_SUPP_MASK) == 0)) + goto out; + + /* Turn SmartSpeed on to disable KR support */ + hw->phy.smart_speed_active = true; + status = ixgbe_setup_mac_link_82599(hw, speed, + autoneg_wait_to_complete); + if (status != IXGBE_SUCCESS) + goto out; + + /* + * Wait for the controller to acquire link. 600ms will allow for + * the AN link_fail_inhibit_timer as well for multiple cycles of + * parallel detect, both 10g and 1g. This allows for the maximum + * connect attempts as defined in the AN MAS table 73-7. + */ + for (i = 0; i < 6; i++) { + msec_delay(100); + + /* If we have link, just jump out */ + status = ixgbe_check_link(hw, &link_speed, &link_up, false); + if (status != IXGBE_SUCCESS) + goto out; + + if (link_up) + goto out; + } + + /* We didn't get link. Turn SmartSpeed back off. */ + hw->phy.smart_speed_active = false; + status = ixgbe_setup_mac_link_82599(hw, speed, + autoneg_wait_to_complete); + +out: + if (link_up && (link_speed == IXGBE_LINK_SPEED_1GB_FULL)) + hw_dbg(hw, "Smartspeed has downgraded the link speed " + "from the maximum advertised\n"); + return status; +} + +/** + * ixgbe_setup_mac_link_82599 - Set MAC link speed + * @hw: pointer to hardware structure + * @speed: new link speed + * @autoneg_wait_to_complete: true when waiting for completion is needed + * + * Set the link speed in the AUTOC register and restarts link. + **/ +s32 ixgbe_setup_mac_link_82599(struct ixgbe_hw *hw, + ixgbe_link_speed speed, + bool autoneg_wait_to_complete) +{ + bool autoneg = false; + s32 status = IXGBE_SUCCESS; + u32 pma_pmd_1g, link_mode; + u32 current_autoc = IXGBE_READ_REG(hw, IXGBE_AUTOC); /* holds the value of AUTOC register at this current point in time */ + u32 orig_autoc = 0; /* holds the cached value of AUTOC register */ + u32 autoc = current_autoc; /* Temporary variable used for comparison purposes */ + u32 autoc2 = IXGBE_READ_REG(hw, IXGBE_AUTOC2); + u32 pma_pmd_10g_serial = autoc2 & IXGBE_AUTOC2_10G_SERIAL_PMA_PMD_MASK; + u32 links_reg; + u32 i; + ixgbe_link_speed link_capabilities = IXGBE_LINK_SPEED_UNKNOWN; + + DEBUGFUNC("ixgbe_setup_mac_link_82599"); + + /* Check to see if speed passed in is supported. */ + status = ixgbe_get_link_capabilities(hw, &link_capabilities, &autoneg); + if (status) + goto out; + + speed &= link_capabilities; + + if (speed == IXGBE_LINK_SPEED_UNKNOWN) { + status = IXGBE_ERR_LINK_SETUP; + goto out; + } + + /* Use stored value (EEPROM defaults) of AUTOC to find KR/KX4 support*/ + if (hw->mac.orig_link_settings_stored) + orig_autoc = hw->mac.orig_autoc; + else + orig_autoc = autoc; + + link_mode = autoc & IXGBE_AUTOC_LMS_MASK; + pma_pmd_1g = autoc & IXGBE_AUTOC_1G_PMA_PMD_MASK; + + if (link_mode == IXGBE_AUTOC_LMS_KX4_KX_KR || + link_mode == IXGBE_AUTOC_LMS_KX4_KX_KR_1G_AN || + link_mode == IXGBE_AUTOC_LMS_KX4_KX_KR_SGMII) { + /* Set KX4/KX/KR support according to speed requested */ + autoc &= ~(IXGBE_AUTOC_KX4_KX_SUPP_MASK | IXGBE_AUTOC_KR_SUPP); + if (speed & IXGBE_LINK_SPEED_10GB_FULL) { + if (orig_autoc & IXGBE_AUTOC_KX4_SUPP) + autoc |= IXGBE_AUTOC_KX4_SUPP; + if ((orig_autoc & IXGBE_AUTOC_KR_SUPP) && + (hw->phy.smart_speed_active == false)) + autoc |= IXGBE_AUTOC_KR_SUPP; + } + if (speed & IXGBE_LINK_SPEED_1GB_FULL) + autoc |= IXGBE_AUTOC_KX_SUPP; + } else if ((pma_pmd_1g == IXGBE_AUTOC_1G_SFI) && + (link_mode == IXGBE_AUTOC_LMS_1G_LINK_NO_AN || + link_mode == IXGBE_AUTOC_LMS_1G_AN)) { + /* Switch from 1G SFI to 10G SFI if requested */ + if ((speed == IXGBE_LINK_SPEED_10GB_FULL) && + (pma_pmd_10g_serial == IXGBE_AUTOC2_10G_SFI)) { + autoc &= ~IXGBE_AUTOC_LMS_MASK; + autoc |= IXGBE_AUTOC_LMS_10G_SERIAL; + } + } else if ((pma_pmd_10g_serial == IXGBE_AUTOC2_10G_SFI) && + (link_mode == IXGBE_AUTOC_LMS_10G_SERIAL)) { + /* Switch from 10G SFI to 1G SFI if requested */ + if ((speed == IXGBE_LINK_SPEED_1GB_FULL) && + (pma_pmd_1g == IXGBE_AUTOC_1G_SFI)) { + autoc &= ~IXGBE_AUTOC_LMS_MASK; + if (autoneg || hw->phy.type == ixgbe_phy_qsfp_intel) + autoc |= IXGBE_AUTOC_LMS_1G_AN; + else + autoc |= IXGBE_AUTOC_LMS_1G_LINK_NO_AN; + } + } + + if (autoc != current_autoc) { + /* Restart link */ + status = hw->mac.ops.prot_autoc_write(hw, autoc, false); + if (status != IXGBE_SUCCESS) + goto out; + + /* Only poll for autoneg to complete if specified to do so */ + if (autoneg_wait_to_complete) { + if (link_mode == IXGBE_AUTOC_LMS_KX4_KX_KR || + link_mode == IXGBE_AUTOC_LMS_KX4_KX_KR_1G_AN || + link_mode == IXGBE_AUTOC_LMS_KX4_KX_KR_SGMII) { + links_reg = 0; /*Just in case Autoneg time=0*/ + for (i = 0; i < IXGBE_AUTO_NEG_TIME; i++) { + links_reg = + IXGBE_READ_REG(hw, IXGBE_LINKS); + if (links_reg & IXGBE_LINKS_KX_AN_COMP) + break; + msec_delay(100); + } + if (!(links_reg & IXGBE_LINKS_KX_AN_COMP)) { + status = + IXGBE_ERR_AUTONEG_NOT_COMPLETE; + hw_dbg(hw, "Autoneg did not complete.\n"); + } + } + } + + /* Add delay to filter out noises during initial link setup */ + msec_delay(50); + } + +out: + return status; +} + +/** + * ixgbe_setup_copper_link_82599 - Set the PHY autoneg advertised field + * @hw: pointer to hardware structure + * @speed: new link speed + * @autoneg_wait_to_complete: true if waiting is needed to complete + * + * Restarts link on PHY and MAC based on settings passed in. + **/ +STATIC s32 ixgbe_setup_copper_link_82599(struct ixgbe_hw *hw, + ixgbe_link_speed speed, + bool autoneg_wait_to_complete) +{ + s32 status; + + DEBUGFUNC("ixgbe_setup_copper_link_82599"); + + /* Setup the PHY according to input speed */ + status = hw->phy.ops.setup_link_speed(hw, speed, + autoneg_wait_to_complete); + /* Set up MAC */ + ixgbe_start_mac_link_82599(hw, autoneg_wait_to_complete); + + return status; +} + +/** + * ixgbe_reset_hw_82599 - Perform hardware reset + * @hw: pointer to hardware structure + * + * Resets the hardware by resetting the transmit and receive units, masks + * and clears all interrupts, perform a PHY reset, and perform a link (MAC) + * reset. + **/ +s32 ixgbe_reset_hw_82599(struct ixgbe_hw *hw) +{ + ixgbe_link_speed link_speed; + s32 status; + u32 ctrl = 0; + u32 i, autoc, autoc2; + u32 curr_lms; + bool link_up = false; + + DEBUGFUNC("ixgbe_reset_hw_82599"); + + /* Call adapter stop to disable tx/rx and clear interrupts */ + status = hw->mac.ops.stop_adapter(hw); + if (status != IXGBE_SUCCESS) + goto reset_hw_out; + + /* flush pending Tx transactions */ + ixgbe_clear_tx_pending(hw); + + /* PHY ops must be identified and initialized prior to reset */ + + /* Identify PHY and related function pointers */ + status = hw->phy.ops.init(hw); + + if (status == IXGBE_ERR_SFP_NOT_SUPPORTED) + goto reset_hw_out; + + /* Setup SFP module if there is one present. */ + if (hw->phy.sfp_setup_needed) { + status = hw->mac.ops.setup_sfp(hw); + hw->phy.sfp_setup_needed = false; + } + + if (status == IXGBE_ERR_SFP_NOT_SUPPORTED) + goto reset_hw_out; + + /* Reset PHY */ + if (hw->phy.reset_disable == false && hw->phy.ops.reset != NULL) + hw->phy.ops.reset(hw); + + /* remember AUTOC from before we reset */ + curr_lms = IXGBE_READ_REG(hw, IXGBE_AUTOC) & IXGBE_AUTOC_LMS_MASK; + +mac_reset_top: + /* + * Issue global reset to the MAC. Needs to be SW reset if link is up. + * If link reset is used when link is up, it might reset the PHY when + * mng is using it. If link is down or the flag to force full link + * reset is set, then perform link reset. + */ + ctrl = IXGBE_CTRL_LNK_RST; + if (!hw->force_full_reset) { + hw->mac.ops.check_link(hw, &link_speed, &link_up, false); + if (link_up) + ctrl = IXGBE_CTRL_RST; + } + + ctrl |= IXGBE_READ_REG(hw, IXGBE_CTRL); + IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl); + IXGBE_WRITE_FLUSH(hw); + + /* Poll for reset bit to self-clear meaning reset is complete */ + for (i = 0; i < 10; i++) { + usec_delay(1); + ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL); + if (!(ctrl & IXGBE_CTRL_RST_MASK)) + break; + } + + if (ctrl & IXGBE_CTRL_RST_MASK) { + status = IXGBE_ERR_RESET_FAILED; + hw_dbg(hw, "Reset polling failed to complete.\n"); + } + + msec_delay(50); + + /* + * Double resets are required for recovery from certain error + * conditions. Between resets, it is necessary to stall to + * allow time for any pending HW events to complete. + */ + if (hw->mac.flags & IXGBE_FLAGS_DOUBLE_RESET_REQUIRED) { + hw->mac.flags &= ~IXGBE_FLAGS_DOUBLE_RESET_REQUIRED; + goto mac_reset_top; + } + + /* + * Store the original AUTOC/AUTOC2 values if they have not been + * stored off yet. Otherwise restore the stored original + * values since the reset operation sets back to defaults. + */ + autoc = IXGBE_READ_REG(hw, IXGBE_AUTOC); + autoc2 = IXGBE_READ_REG(hw, IXGBE_AUTOC2); + + /* Enable link if disabled in NVM */ + if (autoc2 & IXGBE_AUTOC2_LINK_DISABLE_MASK) { + autoc2 &= ~IXGBE_AUTOC2_LINK_DISABLE_MASK; + IXGBE_WRITE_REG(hw, IXGBE_AUTOC2, autoc2); + IXGBE_WRITE_FLUSH(hw); + } + + if (hw->mac.orig_link_settings_stored == false) { + hw->mac.orig_autoc = autoc; + hw->mac.orig_autoc2 = autoc2; + hw->mac.orig_link_settings_stored = true; + } else { + + /* If MNG FW is running on a multi-speed device that + * doesn't autoneg with out driver support we need to + * leave LMS in the state it was before we MAC reset. + * Likewise if we support WoL we don't want change the + * LMS state. + */ + if ((hw->phy.multispeed_fiber && ixgbe_mng_enabled(hw)) || + hw->wol_enabled) + hw->mac.orig_autoc = + (hw->mac.orig_autoc & ~IXGBE_AUTOC_LMS_MASK) | + curr_lms; + + if (autoc != hw->mac.orig_autoc) { + status = hw->mac.ops.prot_autoc_write(hw, + hw->mac.orig_autoc, + false); + if (status != IXGBE_SUCCESS) + goto reset_hw_out; + } + + if ((autoc2 & IXGBE_AUTOC2_UPPER_MASK) != + (hw->mac.orig_autoc2 & IXGBE_AUTOC2_UPPER_MASK)) { + autoc2 &= ~IXGBE_AUTOC2_UPPER_MASK; + autoc2 |= (hw->mac.orig_autoc2 & + IXGBE_AUTOC2_UPPER_MASK); + IXGBE_WRITE_REG(hw, IXGBE_AUTOC2, autoc2); + } + } + + /* Store the permanent mac address */ + hw->mac.ops.get_mac_addr(hw, hw->mac.perm_addr); + + /* + * Store MAC address from RAR0, clear receive address registers, and + * clear the multicast table. Also reset num_rar_entries to 128, + * since we modify this value when programming the SAN MAC address. + */ + hw->mac.num_rar_entries = 128; + hw->mac.ops.init_rx_addrs(hw); + + /* Store the permanent SAN mac address */ + hw->mac.ops.get_san_mac_addr(hw, hw->mac.san_addr); + + /* Add the SAN MAC address to the RAR only if it's a valid address */ + if (ixgbe_validate_mac_addr(hw->mac.san_addr) == 0) { + /* Save the SAN MAC RAR index */ + hw->mac.san_mac_rar_index = hw->mac.num_rar_entries - 1; + + hw->mac.ops.set_rar(hw, hw->mac.san_mac_rar_index, + hw->mac.san_addr, 0, IXGBE_RAH_AV); + + /* clear VMDq pool/queue selection for this RAR */ + hw->mac.ops.clear_vmdq(hw, hw->mac.san_mac_rar_index, + IXGBE_CLEAR_VMDQ_ALL); + + /* Reserve the last RAR for the SAN MAC address */ + hw->mac.num_rar_entries--; + } + + /* Store the alternative WWNN/WWPN prefix */ + hw->mac.ops.get_wwn_prefix(hw, &hw->mac.wwnn_prefix, + &hw->mac.wwpn_prefix); + +reset_hw_out: + return status; +} + +/** + * ixgbe_fdir_check_cmd_complete - poll to check whether FDIRCMD is complete + * @hw: pointer to hardware structure + * @fdircmd: current value of FDIRCMD register + */ +STATIC s32 ixgbe_fdir_check_cmd_complete(struct ixgbe_hw *hw, u32 *fdircmd) +{ + int i; + + for (i = 0; i < IXGBE_FDIRCMD_CMD_POLL; i++) { + *fdircmd = IXGBE_READ_REG(hw, IXGBE_FDIRCMD); + if (!(*fdircmd & IXGBE_FDIRCMD_CMD_MASK)) + return IXGBE_SUCCESS; + usec_delay(10); + } + + return IXGBE_ERR_FDIR_CMD_INCOMPLETE; +} + +/** + * ixgbe_reinit_fdir_tables_82599 - Reinitialize Flow Director tables. + * @hw: pointer to hardware structure + **/ +s32 ixgbe_reinit_fdir_tables_82599(struct ixgbe_hw *hw) +{ + s32 err; + int i; + u32 fdirctrl = IXGBE_READ_REG(hw, IXGBE_FDIRCTRL); + u32 fdircmd; + fdirctrl &= ~IXGBE_FDIRCTRL_INIT_DONE; + + DEBUGFUNC("ixgbe_reinit_fdir_tables_82599"); + + /* + * Before starting reinitialization process, + * FDIRCMD.CMD must be zero. + */ + err = ixgbe_fdir_check_cmd_complete(hw, &fdircmd); + if (err) { + hw_dbg(hw, "Flow Director previous command did not complete, aborting table re-initialization.\n"); + return err; + } + + IXGBE_WRITE_REG(hw, IXGBE_FDIRFREE, 0); + IXGBE_WRITE_FLUSH(hw); + /* + * 82599 adapters flow director init flow cannot be restarted, + * Workaround 82599 silicon errata by performing the following steps + * before re-writing the FDIRCTRL control register with the same value. + * - write 1 to bit 8 of FDIRCMD register & + * - write 0 to bit 8 of FDIRCMD register + */ + IXGBE_WRITE_REG(hw, IXGBE_FDIRCMD, + (IXGBE_READ_REG(hw, IXGBE_FDIRCMD) | + IXGBE_FDIRCMD_CLEARHT)); + IXGBE_WRITE_FLUSH(hw); + IXGBE_WRITE_REG(hw, IXGBE_FDIRCMD, + (IXGBE_READ_REG(hw, IXGBE_FDIRCMD) & + ~IXGBE_FDIRCMD_CLEARHT)); + IXGBE_WRITE_FLUSH(hw); + /* + * Clear FDIR Hash register to clear any leftover hashes + * waiting to be programmed. + */ + IXGBE_WRITE_REG(hw, IXGBE_FDIRHASH, 0x00); + IXGBE_WRITE_FLUSH(hw); + + IXGBE_WRITE_REG(hw, IXGBE_FDIRCTRL, fdirctrl); + IXGBE_WRITE_FLUSH(hw); + + /* Poll init-done after we write FDIRCTRL register */ + for (i = 0; i < IXGBE_FDIR_INIT_DONE_POLL; i++) { + if (IXGBE_READ_REG(hw, IXGBE_FDIRCTRL) & + IXGBE_FDIRCTRL_INIT_DONE) + break; + msec_delay(1); + } + if (i >= IXGBE_FDIR_INIT_DONE_POLL) { + hw_dbg(hw, "Flow Director Signature poll time exceeded!\n"); + return IXGBE_ERR_FDIR_REINIT_FAILED; + } + + /* Clear FDIR statistics registers (read to clear) */ + IXGBE_READ_REG(hw, IXGBE_FDIRUSTAT); + IXGBE_READ_REG(hw, IXGBE_FDIRFSTAT); + IXGBE_READ_REG(hw, IXGBE_FDIRMATCH); + IXGBE_READ_REG(hw, IXGBE_FDIRMISS); + IXGBE_READ_REG(hw, IXGBE_FDIRLEN); + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_fdir_enable_82599 - Initialize Flow Director control registers + * @hw: pointer to hardware structure + * @fdirctrl: value to write to flow director control register + **/ +STATIC void ixgbe_fdir_enable_82599(struct ixgbe_hw *hw, u32 fdirctrl) +{ + int i; + + DEBUGFUNC("ixgbe_fdir_enable_82599"); + + /* Prime the keys for hashing */ + IXGBE_WRITE_REG(hw, IXGBE_FDIRHKEY, IXGBE_ATR_BUCKET_HASH_KEY); + IXGBE_WRITE_REG(hw, IXGBE_FDIRSKEY, IXGBE_ATR_SIGNATURE_HASH_KEY); + + /* + * Poll init-done after we write the register. Estimated times: + * 10G: PBALLOC = 11b, timing is 60us + * 1G: PBALLOC = 11b, timing is 600us + * 100M: PBALLOC = 11b, timing is 6ms + * + * Multiple these timings by 4 if under full Rx load + * + * So we'll poll for IXGBE_FDIR_INIT_DONE_POLL times, sleeping for + * 1 msec per poll time. If we're at line rate and drop to 100M, then + * this might not finish in our poll time, but we can live with that + * for now. + */ + IXGBE_WRITE_REG(hw, IXGBE_FDIRCTRL, fdirctrl); + IXGBE_WRITE_FLUSH(hw); + for (i = 0; i < IXGBE_FDIR_INIT_DONE_POLL; i++) { + if (IXGBE_READ_REG(hw, IXGBE_FDIRCTRL) & + IXGBE_FDIRCTRL_INIT_DONE) + break; + msec_delay(1); + } + + if (i >= IXGBE_FDIR_INIT_DONE_POLL) + hw_dbg(hw, "Flow Director poll time exceeded!\n"); +} + +/** + * ixgbe_init_fdir_signature_82599 - Initialize Flow Director signature filters + * @hw: pointer to hardware structure + * @fdirctrl: value to write to flow director control register, initially + * contains just the value of the Rx packet buffer allocation + **/ +s32 ixgbe_init_fdir_signature_82599(struct ixgbe_hw *hw, u32 fdirctrl) +{ + DEBUGFUNC("ixgbe_init_fdir_signature_82599"); + + /* + * Continue setup of fdirctrl register bits: + * Move the flexible bytes to use the ethertype - shift 6 words + * Set the maximum length per hash bucket to 0xA filters + * Send interrupt when 64 filters are left + */ + fdirctrl |= (0x6 << IXGBE_FDIRCTRL_FLEX_SHIFT) | + (0xA << IXGBE_FDIRCTRL_MAX_LENGTH_SHIFT) | + (4 << IXGBE_FDIRCTRL_FULL_THRESH_SHIFT); + + /* write hashes and fdirctrl register, poll for completion */ + ixgbe_fdir_enable_82599(hw, fdirctrl); + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_init_fdir_perfect_82599 - Initialize Flow Director perfect filters + * @hw: pointer to hardware structure + * @fdirctrl: value to write to flow director control register, initially + * contains just the value of the Rx packet buffer allocation + * @cloud_mode: true - cloud mode, false - other mode + **/ +s32 ixgbe_init_fdir_perfect_82599(struct ixgbe_hw *hw, u32 fdirctrl, + bool cloud_mode) +{ + UNREFERENCED_1PARAMETER(cloud_mode); + DEBUGFUNC("ixgbe_init_fdir_perfect_82599"); + + /* + * Continue setup of fdirctrl register bits: + * Turn perfect match filtering on + * Report hash in RSS field of Rx wb descriptor + * Initialize the drop queue to queue 127 + * Move the flexible bytes to use the ethertype - shift 6 words + * Set the maximum length per hash bucket to 0xA filters + * Send interrupt when 64 (0x4 * 16) filters are left + */ + fdirctrl |= IXGBE_FDIRCTRL_PERFECT_MATCH | + IXGBE_FDIRCTRL_REPORT_STATUS | + (IXGBE_FDIR_DROP_QUEUE << IXGBE_FDIRCTRL_DROP_Q_SHIFT) | + (0x6 << IXGBE_FDIRCTRL_FLEX_SHIFT) | + (0xA << IXGBE_FDIRCTRL_MAX_LENGTH_SHIFT) | + (4 << IXGBE_FDIRCTRL_FULL_THRESH_SHIFT); + + if (cloud_mode) + fdirctrl |=(IXGBE_FDIRCTRL_FILTERMODE_CLOUD << + IXGBE_FDIRCTRL_FILTERMODE_SHIFT); + + /* write hashes and fdirctrl register, poll for completion */ + ixgbe_fdir_enable_82599(hw, fdirctrl); + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_set_fdir_drop_queue_82599 - Set Flow Director drop queue + * @hw: pointer to hardware structure + * @dropqueue: Rx queue index used for the dropped packets + **/ +void ixgbe_set_fdir_drop_queue_82599(struct ixgbe_hw *hw, u8 dropqueue) +{ + u32 fdirctrl; + + DEBUGFUNC("ixgbe_set_fdir_drop_queue_82599"); + /* Clear init done bit and drop queue field */ + fdirctrl = IXGBE_READ_REG(hw, IXGBE_FDIRCTRL); + fdirctrl &= ~(IXGBE_FDIRCTRL_DROP_Q_MASK | IXGBE_FDIRCTRL_INIT_DONE); + + /* Set drop queue */ + fdirctrl |= (dropqueue << IXGBE_FDIRCTRL_DROP_Q_SHIFT); + if (hw->mac.type == ixgbe_mac_X550 || + hw->mac.type == ixgbe_mac_X550EM_x || + hw->mac.type == ixgbe_mac_X550EM_a || + ixgbe_is_mac_E6xx(hw->mac.type)) + fdirctrl |= IXGBE_FDIRCTRL_DROP_NO_MATCH; + + IXGBE_WRITE_REG(hw, IXGBE_FDIRCMD, + (IXGBE_READ_REG(hw, IXGBE_FDIRCMD) | + IXGBE_FDIRCMD_CLEARHT)); + IXGBE_WRITE_FLUSH(hw); + IXGBE_WRITE_REG(hw, IXGBE_FDIRCMD, + (IXGBE_READ_REG(hw, IXGBE_FDIRCMD) & + ~IXGBE_FDIRCMD_CLEARHT)); + IXGBE_WRITE_FLUSH(hw); + + /* write hashes and fdirctrl register, poll for completion */ + ixgbe_fdir_enable_82599(hw, fdirctrl); +} + +/* + * These defines allow us to quickly generate all of the necessary instructions + * in the function below by simply calling out IXGBE_COMPUTE_SIG_HASH_ITERATION + * for values 0 through 15 + */ +#define IXGBE_ATR_COMMON_HASH_KEY \ + (IXGBE_ATR_BUCKET_HASH_KEY & IXGBE_ATR_SIGNATURE_HASH_KEY) +#define IXGBE_COMPUTE_SIG_HASH_ITERATION(_n) \ +do { \ + u32 n = (_n); \ + if (IXGBE_ATR_COMMON_HASH_KEY & (0x01 << n)) \ + common_hash ^= lo_hash_dword >> n; \ + else if (IXGBE_ATR_BUCKET_HASH_KEY & (0x01 << n)) \ + bucket_hash ^= lo_hash_dword >> n; \ + else if (IXGBE_ATR_SIGNATURE_HASH_KEY & (0x01 << n)) \ + sig_hash ^= lo_hash_dword << (16 - n); \ + if (IXGBE_ATR_COMMON_HASH_KEY & (0x01 << (n + 16))) \ + common_hash ^= hi_hash_dword >> n; \ + else if (IXGBE_ATR_BUCKET_HASH_KEY & (0x01 << (n + 16))) \ + bucket_hash ^= hi_hash_dword >> n; \ + else if (IXGBE_ATR_SIGNATURE_HASH_KEY & (0x01 << (n + 16))) \ + sig_hash ^= hi_hash_dword << (16 - n); \ +} while (0) + +/** + * ixgbe_atr_compute_sig_hash_82599 - Compute the signature hash + * @input: input bitstream to compute the hash on + * @common: compressed common input dword + * + * This function is almost identical to the function above but contains + * several optimizations such as unwinding all of the loops, letting the + * compiler work out all of the conditional ifs since the keys are static + * defines, and computing two keys at once since the hashed dword stream + * will be the same for both keys. + **/ +u32 ixgbe_atr_compute_sig_hash_82599(union ixgbe_atr_hash_dword input, + union ixgbe_atr_hash_dword common) +{ + u32 hi_hash_dword, lo_hash_dword, flow_vm_vlan; + u32 sig_hash = 0, bucket_hash = 0, common_hash = 0; + + /* record the flow_vm_vlan bits as they are a key part to the hash */ + flow_vm_vlan = IXGBE_NTOHL(input.dword); + + /* generate common hash dword */ + hi_hash_dword = IXGBE_NTOHL(common.dword); + + /* low dword is word swapped version of common */ + lo_hash_dword = (hi_hash_dword >> 16) | (hi_hash_dword << 16); + + /* apply flow ID/VM pool/VLAN ID bits to hash words */ + hi_hash_dword ^= flow_vm_vlan ^ (flow_vm_vlan >> 16); + + /* Process bits 0 and 16 */ + IXGBE_COMPUTE_SIG_HASH_ITERATION(0); + + /* + * apply flow ID/VM pool/VLAN ID bits to lo hash dword, we had to + * delay this because bit 0 of the stream should not be processed + * so we do not add the VLAN until after bit 0 was processed + */ + lo_hash_dword ^= flow_vm_vlan ^ (flow_vm_vlan << 16); + + /* Process remaining 30 bit of the key */ + IXGBE_COMPUTE_SIG_HASH_ITERATION(1); + IXGBE_COMPUTE_SIG_HASH_ITERATION(2); + IXGBE_COMPUTE_SIG_HASH_ITERATION(3); + IXGBE_COMPUTE_SIG_HASH_ITERATION(4); + IXGBE_COMPUTE_SIG_HASH_ITERATION(5); + IXGBE_COMPUTE_SIG_HASH_ITERATION(6); + IXGBE_COMPUTE_SIG_HASH_ITERATION(7); + IXGBE_COMPUTE_SIG_HASH_ITERATION(8); + IXGBE_COMPUTE_SIG_HASH_ITERATION(9); + IXGBE_COMPUTE_SIG_HASH_ITERATION(10); + IXGBE_COMPUTE_SIG_HASH_ITERATION(11); + IXGBE_COMPUTE_SIG_HASH_ITERATION(12); + IXGBE_COMPUTE_SIG_HASH_ITERATION(13); + IXGBE_COMPUTE_SIG_HASH_ITERATION(14); + IXGBE_COMPUTE_SIG_HASH_ITERATION(15); + + /* combine common_hash result with signature and bucket hashes */ + bucket_hash ^= common_hash; + bucket_hash &= IXGBE_ATR_HASH_MASK; + + sig_hash ^= common_hash << 16; + sig_hash &= IXGBE_ATR_HASH_MASK << 16; + + /* return completed signature hash */ + return sig_hash ^ bucket_hash; +} + +/** + * ixgbe_fdir_add_signature_filter_82599 - Adds a signature hash filter + * @hw: pointer to hardware structure + * @input: unique input dword + * @common: compressed common input dword + * @queue: queue index to direct traffic to + * + * Note that the tunnel bit in input must not be set when the hardware + * tunneling support does not exist. + **/ +void ixgbe_fdir_add_signature_filter_82599(struct ixgbe_hw *hw, + union ixgbe_atr_hash_dword input, + union ixgbe_atr_hash_dword common, + u8 queue) +{ + u64 fdirhashcmd; + u8 flow_type; + bool tunnel; + u32 fdircmd; + + DEBUGFUNC("ixgbe_fdir_add_signature_filter_82599"); + + /* + * Get the flow_type in order to program FDIRCMD properly + * lowest 2 bits are FDIRCMD.L4TYPE, third lowest bit is FDIRCMD.IPV6 + * fifth is FDIRCMD.TUNNEL_FILTER + */ + tunnel = !!(input.formatted.flow_type & IXGBE_ATR_L4TYPE_TUNNEL_MASK); + flow_type = input.formatted.flow_type & + (IXGBE_ATR_L4TYPE_TUNNEL_MASK - 1); + switch (flow_type) { + case IXGBE_ATR_FLOW_TYPE_TCPV4: + case IXGBE_ATR_FLOW_TYPE_UDPV4: + case IXGBE_ATR_FLOW_TYPE_SCTPV4: + case IXGBE_ATR_FLOW_TYPE_TCPV6: + case IXGBE_ATR_FLOW_TYPE_UDPV6: + case IXGBE_ATR_FLOW_TYPE_SCTPV6: + break; + default: + hw_dbg(hw, " Error on flow type input\n"); + return; + } + + /* configure FDIRCMD register */ + fdircmd = IXGBE_FDIRCMD_CMD_ADD_FLOW | IXGBE_FDIRCMD_FILTER_UPDATE | + IXGBE_FDIRCMD_LAST | IXGBE_FDIRCMD_QUEUE_EN; + fdircmd |= (u32)flow_type << IXGBE_FDIRCMD_FLOW_TYPE_SHIFT; + fdircmd |= (u32)queue << IXGBE_FDIRCMD_RX_QUEUE_SHIFT; + if (tunnel) + fdircmd |= IXGBE_FDIRCMD_TUNNEL_FILTER; + + /* + * The lower 32-bits of fdirhashcmd is for FDIRHASH, the upper 32-bits + * is for FDIRCMD. Then do a 64-bit register write from FDIRHASH. + */ + fdirhashcmd = (u64)fdircmd << 32; + fdirhashcmd |= (u64)ixgbe_atr_compute_sig_hash_82599(input, common); + IXGBE_WRITE_REG64(hw, IXGBE_FDIRHASH, fdirhashcmd); + + hw_dbg(hw, "Tx Queue=%x hash=%x\n", queue, (u32)fdirhashcmd); + + return; +} + +#define IXGBE_COMPUTE_BKT_HASH_ITERATION(_n) \ +do { \ + u32 n = (_n); \ + if (IXGBE_ATR_BUCKET_HASH_KEY & (0x01 << n)) \ + bucket_hash ^= lo_hash_dword >> n; \ + if (IXGBE_ATR_BUCKET_HASH_KEY & (0x01 << (n + 16))) \ + bucket_hash ^= hi_hash_dword >> n; \ +} while (0) + +/** + * ixgbe_atr_compute_perfect_hash_82599 - Compute the perfect filter hash + * @input: input bitstream to compute the hash on + * @input_mask: mask for the input bitstream + * + * This function serves two main purposes. First it applies the input_mask + * to the atr_input resulting in a cleaned up atr_input data stream. + * Secondly it computes the hash and stores it in the bkt_hash field at + * the end of the input byte stream. This way it will be available for + * future use without needing to recompute the hash. + **/ +void ixgbe_atr_compute_perfect_hash_82599(union ixgbe_atr_input *input, + union ixgbe_atr_input *input_mask) +{ + + u32 hi_hash_dword, lo_hash_dword, flow_vm_vlan; + u32 bucket_hash = 0; + u32 hi_dword = 0; + u32 i = 0; + + /* Apply masks to input data */ + for (i = 0; i < 14; i++) + input->dword_stream[i] &= input_mask->dword_stream[i]; + + /* record the flow_vm_vlan bits as they are a key part to the hash */ + flow_vm_vlan = IXGBE_NTOHL(input->dword_stream[0]); + + /* generate common hash dword */ + for (i = 1; i <= 13; i++) + hi_dword ^= input->dword_stream[i]; + hi_hash_dword = IXGBE_NTOHL(hi_dword); + + /* low dword is word swapped version of common */ + lo_hash_dword = (hi_hash_dword >> 16) | (hi_hash_dword << 16); + + /* apply flow ID/VM pool/VLAN ID bits to hash words */ + hi_hash_dword ^= flow_vm_vlan ^ (flow_vm_vlan >> 16); + + /* Process bits 0 and 16 */ + IXGBE_COMPUTE_BKT_HASH_ITERATION(0); + + /* + * apply flow ID/VM pool/VLAN ID bits to lo hash dword, we had to + * delay this because bit 0 of the stream should not be processed + * so we do not add the VLAN until after bit 0 was processed + */ + lo_hash_dword ^= flow_vm_vlan ^ (flow_vm_vlan << 16); + + /* Process remaining 30 bit of the key */ + for (i = 1; i <= 15; i++) + IXGBE_COMPUTE_BKT_HASH_ITERATION(i); + + /* + * Limit hash to 13 bits since max bucket count is 8K. + * Store result at the end of the input stream. + */ + input->formatted.bkt_hash = bucket_hash & 0x1FFF; +} + +/** + * ixgbe_get_fdirtcpm_82599 - generate a TCP port from atr_input_masks + * @input_mask: mask to be bit swapped + * + * The source and destination port masks for flow director are bit swapped + * in that bit 15 effects bit 0, 14 effects 1, 13, 2 etc. In order to + * generate a correctly swapped value we need to bit swap the mask and that + * is what is accomplished by this function. + **/ +STATIC u32 ixgbe_get_fdirtcpm_82599(union ixgbe_atr_input *input_mask) +{ + u32 mask = IXGBE_NTOHS(input_mask->formatted.dst_port); + mask <<= IXGBE_FDIRTCPM_DPORTM_SHIFT; + mask |= (u32)IXGBE_NTOHS(input_mask->formatted.src_port); + mask = ((mask & 0x55555555) << 1) | ((mask & 0xAAAAAAAA) >> 1); + mask = ((mask & 0x33333333) << 2) | ((mask & 0xCCCCCCCC) >> 2); + mask = ((mask & 0x0F0F0F0F) << 4) | ((mask & 0xF0F0F0F0) >> 4); + return ((mask & 0x00FF00FF) << 8) | ((mask & 0xFF00FF00) >> 8); +} + +/* + * These two macros are meant to address the fact that we have registers + * that are either all or in part big-endian. As a result on big-endian + * systems we will end up byte swapping the value to little-endian before + * it is byte swapped again and written to the hardware in the original + * big-endian format. + */ +#define IXGBE_STORE_AS_BE32(_value) \ + (((u32)(_value) >> 24) | (((u32)(_value) & 0x00FF0000) >> 8) | \ + (((u32)(_value) & 0x0000FF00) << 8) | ((u32)(_value) << 24)) + +#define IXGBE_WRITE_REG_BE32(a, reg, value) \ + IXGBE_WRITE_REG((a), (reg), IXGBE_STORE_AS_BE32(IXGBE_NTOHL(value))) + +#define IXGBE_STORE_AS_BE16(_value) \ + IXGBE_NTOHS(((u16)(_value) >> 8) | ((u16)(_value) << 8)) + +s32 ixgbe_fdir_set_input_mask_82599(struct ixgbe_hw *hw, + union ixgbe_atr_input *input_mask, bool cloud_mode) +{ + /* mask IPv6 since it is currently not supported */ + u32 fdirm = IXGBE_FDIRM_DIPv6; + u32 fdirtcpm; + u32 fdirip6m; + UNREFERENCED_1PARAMETER(cloud_mode); + DEBUGFUNC("ixgbe_fdir_set_atr_input_mask_82599"); + + /* + * Program the relevant mask registers. If src/dst_port or src/dst_addr + * are zero, then assume a full mask for that field. Also assume that + * a VLAN of 0 is unspecified, so mask that out as well. L4type + * cannot be masked out in this implementation. + * + * This also assumes IPv4 only. IPv6 masking isn't supported at this + * point in time. + */ + + /* verify bucket hash is cleared on hash generation */ + if (input_mask->formatted.bkt_hash) + hw_dbg(hw, " bucket hash should always be 0 in mask\n"); + + /* Program FDIRM and verify partial masks */ + switch (input_mask->formatted.vm_pool & 0x7F) { + case 0x0: + fdirm |= IXGBE_FDIRM_POOL; + case 0x7F: + break; + default: + hw_dbg(hw, " Error on vm pool mask\n"); + return IXGBE_ERR_CONFIG; + } + + switch (input_mask->formatted.flow_type & IXGBE_ATR_L4TYPE_MASK) { + case 0x0: + fdirm |= IXGBE_FDIRM_L4P; + if (input_mask->formatted.dst_port || + input_mask->formatted.src_port) { + hw_dbg(hw, " Error on src/dst port mask\n"); + return IXGBE_ERR_CONFIG; + } + case IXGBE_ATR_L4TYPE_MASK: + break; + default: + hw_dbg(hw, " Error on flow type mask\n"); + return IXGBE_ERR_CONFIG; + } + + switch (IXGBE_NTOHS(input_mask->formatted.vlan_id) & 0xEFFF) { + case 0x0000: + /* mask VLAN ID */ + fdirm |= IXGBE_FDIRM_VLANID; + fallthrough; + case 0x0FFF: + /* mask VLAN priority */ + fdirm |= IXGBE_FDIRM_VLANP; + break; + case 0xE000: + /* mask VLAN ID only */ + fdirm |= IXGBE_FDIRM_VLANID; + fallthrough; + case 0xEFFF: + /* no VLAN fields masked */ + break; + default: + hw_dbg(hw, " Error on VLAN mask\n"); + return IXGBE_ERR_CONFIG; + } + + switch (input_mask->formatted.flex_bytes & 0xFFFF) { + case 0x0000: + /* Mask Flex Bytes */ + fdirm |= IXGBE_FDIRM_FLEX; + fallthrough; + case 0xFFFF: + break; + default: + hw_dbg(hw, " Error on flexible byte mask\n"); + return IXGBE_ERR_CONFIG; + } + + if (cloud_mode) { + fdirm |= IXGBE_FDIRM_L3P; + fdirip6m = ((u32) 0xFFFFU << IXGBE_FDIRIP6M_DIPM_SHIFT); + fdirip6m |= IXGBE_FDIRIP6M_ALWAYS_MASK; + + switch (input_mask->formatted.inner_mac[0] & 0xFF) { + case 0x00: + /* Mask inner MAC, fall through */ + fdirip6m |= IXGBE_FDIRIP6M_INNER_MAC; + case 0xFF: + break; + default: + hw_dbg(hw, " Error on inner_mac byte mask\n"); + return IXGBE_ERR_CONFIG; + } + + switch (input_mask->formatted.tni_vni & 0xFFFFFFFF) { + case 0x0: + /* Mask vxlan id */ + fdirip6m |= IXGBE_FDIRIP6M_TNI_VNI; + break; + case 0x00FFFFFF: + fdirip6m |= IXGBE_FDIRIP6M_TNI_VNI_24; + break; + case 0xFFFFFFFF: + break; + default: + hw_dbg(hw, " Error on TNI/VNI byte mask\n"); + return IXGBE_ERR_CONFIG; + } + + switch (input_mask->formatted.tunnel_type & 0xFFFF) { + case 0x0: + /* Mask turnnel type, fall through */ + fdirip6m |= IXGBE_FDIRIP6M_TUNNEL_TYPE; + case 0xFFFF: + break; + default: + hw_dbg(hw, " Error on tunnel type byte mask\n"); + return IXGBE_ERR_CONFIG; + } + IXGBE_WRITE_REG_BE32(hw, IXGBE_FDIRIP6M, fdirip6m); + + /* Set all bits in FDIRTCPM, FDIRUDPM, FDIRSCTPM, + * FDIRSIP4M and FDIRDIP4M in cloud mode to allow + * L3/L3 packets to tunnel. + */ + IXGBE_WRITE_REG(hw, IXGBE_FDIRTCPM, 0xFFFFFFFF); + IXGBE_WRITE_REG(hw, IXGBE_FDIRUDPM, 0xFFFFFFFF); + IXGBE_WRITE_REG_BE32(hw, IXGBE_FDIRDIP4M, 0xFFFFFFFF); + IXGBE_WRITE_REG_BE32(hw, IXGBE_FDIRSIP4M, 0xFFFFFFFF); + switch (hw->mac.type) { + case ixgbe_mac_X550: + case ixgbe_mac_X550EM_x: + case ixgbe_mac_X550EM_a: + case ixgbe_mac_E610: + IXGBE_WRITE_REG(hw, IXGBE_FDIRSCTPM, 0xFFFFFFFF); + break; + default: + break; + } + } + + /* Now mask VM pool and destination IPv6 - bits 5 and 2 */ + IXGBE_WRITE_REG(hw, IXGBE_FDIRM, fdirm); + + if (!cloud_mode) { + /* store the TCP/UDP port masks, bit reversed from port + * layout */ + fdirtcpm = ixgbe_get_fdirtcpm_82599(input_mask); + + /* write both the same so that UDP and TCP use the same mask */ + IXGBE_WRITE_REG(hw, IXGBE_FDIRTCPM, ~fdirtcpm); + IXGBE_WRITE_REG(hw, IXGBE_FDIRUDPM, ~fdirtcpm); + /* also use it for SCTP */ + switch (hw->mac.type) { + case ixgbe_mac_X550: + case ixgbe_mac_X550EM_x: + case ixgbe_mac_X550EM_a: + case ixgbe_mac_E610: + IXGBE_WRITE_REG(hw, IXGBE_FDIRSCTPM, ~fdirtcpm); + break; + default: + break; + } + + /* store source and destination IP masks (big-enian) */ + IXGBE_WRITE_REG_BE32(hw, IXGBE_FDIRSIP4M, + ~input_mask->formatted.src_ip[0]); + IXGBE_WRITE_REG_BE32(hw, IXGBE_FDIRDIP4M, + ~input_mask->formatted.dst_ip[0]); + IXGBE_WRITE_REG_BE32(hw, IXGBE_FDIRIP6M, 0xFFFFFFFF); + } + return IXGBE_SUCCESS; +} + +s32 ixgbe_fdir_write_perfect_filter_82599(struct ixgbe_hw *hw, + union ixgbe_atr_input *input, + u16 soft_id, u8 queue, bool cloud_mode) +{ + u32 fdirport, fdirvlan, fdirhash, fdircmd; + u32 addr_low, addr_high; + u32 cloud_type = 0; + s32 err; + UNREFERENCED_1PARAMETER(cloud_mode); + + DEBUGFUNC("ixgbe_fdir_write_perfect_filter_82599"); + if (!cloud_mode) { + /* currently IPv6 is not supported, must be programmed with 0 */ + IXGBE_WRITE_REG_BE32(hw, IXGBE_FDIRSIPv6(0), + input->formatted.src_ip[0]); + IXGBE_WRITE_REG_BE32(hw, IXGBE_FDIRSIPv6(1), + input->formatted.src_ip[1]); + IXGBE_WRITE_REG_BE32(hw, IXGBE_FDIRSIPv6(2), + input->formatted.src_ip[2]); + + /* record the source address (big-endian) */ + IXGBE_WRITE_REG_BE32(hw, IXGBE_FDIRIPSA, + input->formatted.src_ip[0]); + + /* record the first 32 bits of the destination address + * (big-endian) */ + IXGBE_WRITE_REG_BE32(hw, IXGBE_FDIRIPDA, + input->formatted.dst_ip[0]); + + /* record source and destination port (little-endian)*/ + fdirport = IXGBE_NTOHS(input->formatted.dst_port); + fdirport <<= IXGBE_FDIRPORT_DESTINATION_SHIFT; + fdirport |= (u32)IXGBE_NTOHS(input->formatted.src_port); + IXGBE_WRITE_REG(hw, IXGBE_FDIRPORT, fdirport); + } + + /* record VLAN (little-endian) and flex_bytes(big-endian) */ + fdirvlan = IXGBE_STORE_AS_BE16(input->formatted.flex_bytes); + fdirvlan <<= IXGBE_FDIRVLAN_FLEX_SHIFT; + fdirvlan |= (u32)IXGBE_NTOHS(input->formatted.vlan_id); + IXGBE_WRITE_REG(hw, IXGBE_FDIRVLAN, fdirvlan); + + if (cloud_mode) { + if (input->formatted.tunnel_type != 0) + cloud_type = 0x80000000; + + addr_low = ((u32)input->formatted.inner_mac[0] | + ((u32)input->formatted.inner_mac[1] << 8) | + ((u32)input->formatted.inner_mac[2] << 16) | + ((u32)input->formatted.inner_mac[3] << 24)); + addr_high = ((u32)input->formatted.inner_mac[4] | + ((u32)input->formatted.inner_mac[5] << 8)); + cloud_type |= addr_high; + IXGBE_WRITE_REG_BE32(hw, IXGBE_FDIRSIPv6(0), addr_low); + IXGBE_WRITE_REG_BE32(hw, IXGBE_FDIRSIPv6(1), cloud_type); + IXGBE_WRITE_REG_BE32(hw, IXGBE_FDIRSIPv6(2), input->formatted.tni_vni); + } + + /* configure FDIRHASH register */ + fdirhash = input->formatted.bkt_hash; + fdirhash |= soft_id << IXGBE_FDIRHASH_SIG_SW_INDEX_SHIFT; + IXGBE_WRITE_REG(hw, IXGBE_FDIRHASH, fdirhash); + + /* + * flush all previous writes to make certain registers are + * programmed prior to issuing the command + */ + IXGBE_WRITE_FLUSH(hw); + + /* configure FDIRCMD register */ + fdircmd = IXGBE_FDIRCMD_CMD_ADD_FLOW | IXGBE_FDIRCMD_FILTER_UPDATE | + IXGBE_FDIRCMD_LAST | IXGBE_FDIRCMD_QUEUE_EN; + if (queue == IXGBE_FDIR_DROP_QUEUE) + fdircmd |= IXGBE_FDIRCMD_DROP; + if (input->formatted.flow_type & IXGBE_ATR_L4TYPE_TUNNEL_MASK) + fdircmd |= IXGBE_FDIRCMD_TUNNEL_FILTER; + fdircmd |= input->formatted.flow_type << IXGBE_FDIRCMD_FLOW_TYPE_SHIFT; + fdircmd |= (u32)queue << IXGBE_FDIRCMD_RX_QUEUE_SHIFT; + fdircmd |= (u32)input->formatted.vm_pool << IXGBE_FDIRCMD_VT_POOL_SHIFT; + + IXGBE_WRITE_REG(hw, IXGBE_FDIRCMD, fdircmd); + err = ixgbe_fdir_check_cmd_complete(hw, &fdircmd); + if (err) { + hw_dbg(hw, "Flow Director command did not complete!\n"); + return err; + } + + return IXGBE_SUCCESS; +} + +s32 ixgbe_fdir_erase_perfect_filter_82599(struct ixgbe_hw *hw, + union ixgbe_atr_input *input, + u16 soft_id) +{ + u32 fdirhash; + u32 fdircmd; + s32 err; + + /* configure FDIRHASH register */ + fdirhash = input->formatted.bkt_hash; + fdirhash |= soft_id << IXGBE_FDIRHASH_SIG_SW_INDEX_SHIFT; + IXGBE_WRITE_REG(hw, IXGBE_FDIRHASH, fdirhash); + + /* flush hash to HW */ + IXGBE_WRITE_FLUSH(hw); + + /* Query if filter is present */ + IXGBE_WRITE_REG(hw, IXGBE_FDIRCMD, IXGBE_FDIRCMD_CMD_QUERY_REM_FILT); + + err = ixgbe_fdir_check_cmd_complete(hw, &fdircmd); + if (err) { + hw_dbg(hw, "Flow Director command did not complete!\n"); + return err; + } + + /* if filter exists in hardware then remove it */ + if (fdircmd & IXGBE_FDIRCMD_FILTER_VALID) { + IXGBE_WRITE_REG(hw, IXGBE_FDIRHASH, fdirhash); + IXGBE_WRITE_FLUSH(hw); + IXGBE_WRITE_REG(hw, IXGBE_FDIRCMD, + IXGBE_FDIRCMD_CMD_REMOVE_FLOW); + } + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_read_analog_reg8_82599 - Reads 8 bit Omer analog register + * @hw: pointer to hardware structure + * @reg: analog register to read + * @val: read value + * + * Performs read operation to Omer analog register specified. + **/ +s32 ixgbe_read_analog_reg8_82599(struct ixgbe_hw *hw, u32 reg, u8 *val) +{ + u32 core_ctl; + + DEBUGFUNC("ixgbe_read_analog_reg8_82599"); + + IXGBE_WRITE_REG(hw, IXGBE_CORECTL, IXGBE_CORECTL_WRITE_CMD | + (reg << 8)); + IXGBE_WRITE_FLUSH(hw); + usec_delay(10); + core_ctl = IXGBE_READ_REG(hw, IXGBE_CORECTL); + *val = (u8)core_ctl; + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_write_analog_reg8_82599 - Writes 8 bit Omer analog register + * @hw: pointer to hardware structure + * @reg: atlas register to write + * @val: value to write + * + * Performs write operation to Omer analog register specified. + **/ +s32 ixgbe_write_analog_reg8_82599(struct ixgbe_hw *hw, u32 reg, u8 val) +{ + u32 core_ctl; + + DEBUGFUNC("ixgbe_write_analog_reg8_82599"); + + core_ctl = (reg << 8) | val; + IXGBE_WRITE_REG(hw, IXGBE_CORECTL, core_ctl); + IXGBE_WRITE_FLUSH(hw); + usec_delay(10); + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_start_hw_82599 - Prepare hardware for Tx/Rx + * @hw: pointer to hardware structure + * + * Starts the hardware using the generic start_hw function + * and the generation start_hw function. + * Then performs revision-specific operations, if any. + **/ +s32 ixgbe_start_hw_82599(struct ixgbe_hw *hw) +{ + s32 ret_val = IXGBE_SUCCESS; + + DEBUGFUNC("ixgbe_start_hw_82599"); + + ret_val = ixgbe_start_hw_generic(hw); + if (ret_val != IXGBE_SUCCESS) + goto out; + + ixgbe_start_hw_gen2(hw); + + /* We need to run link autotry after the driver loads */ + hw->mac.autotry_restart = true; + + if (ret_val == IXGBE_SUCCESS) + ret_val = ixgbe_verify_fw_version_82599(hw); +out: + return ret_val; +} + +/** + * ixgbe_identify_phy_82599 - Get physical layer module + * @hw: pointer to hardware structure + * + * Determines the physical layer module found on the current adapter. + * If PHY already detected, maintains current PHY type in hw struct, + * otherwise executes the PHY detection routine. + **/ +s32 ixgbe_identify_phy_82599(struct ixgbe_hw *hw) +{ + s32 status; + + DEBUGFUNC("ixgbe_identify_phy_82599"); + + /* Detect PHY if not unknown - returns success if already detected. */ + status = ixgbe_identify_phy_generic(hw); + if (status != IXGBE_SUCCESS) { + /* 82599 10GBASE-T requires an external PHY */ + if (hw->mac.ops.get_media_type(hw) == ixgbe_media_type_copper) + return status; + else + status = ixgbe_identify_module_generic(hw); + } + + /* Set PHY type none if no PHY detected */ + if (hw->phy.type == ixgbe_phy_unknown) { + hw->phy.type = ixgbe_phy_none; + return IXGBE_SUCCESS; + } + + /* Return error if SFP module has been detected but is not supported */ + if (hw->phy.type == ixgbe_phy_sfp_unsupported) + return IXGBE_ERR_SFP_NOT_SUPPORTED; + + return status; +} + +/** + * ixgbe_get_supported_physical_layer_82599 - Returns physical layer type + * @hw: pointer to hardware structure + * + * Determines physical layer capabilities of the current configuration. + **/ +u64 ixgbe_get_supported_physical_layer_82599(struct ixgbe_hw *hw) +{ + u64 physical_layer = IXGBE_PHYSICAL_LAYER_UNKNOWN; + u32 autoc = IXGBE_READ_REG(hw, IXGBE_AUTOC); + u32 autoc2 = IXGBE_READ_REG(hw, IXGBE_AUTOC2); + u32 pma_pmd_10g_serial = autoc2 & IXGBE_AUTOC2_10G_SERIAL_PMA_PMD_MASK; + u32 pma_pmd_10g_parallel = autoc & IXGBE_AUTOC_10G_PMA_PMD_MASK; + u32 pma_pmd_1g = autoc & IXGBE_AUTOC_1G_PMA_PMD_MASK; + u16 ext_ability = 0; + + DEBUGFUNC("ixgbe_get_support_physical_layer_82599"); + + hw->phy.ops.identify(hw); + + switch (hw->phy.type) { + case ixgbe_phy_tn: + case ixgbe_phy_cu_unknown: + hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_EXT_ABILITY, + IXGBE_MDIO_PMA_PMD_DEV_TYPE, &ext_ability); + if (ext_ability & IXGBE_MDIO_PHY_10GBASET_ABILITY) + physical_layer |= IXGBE_PHYSICAL_LAYER_10GBASE_T; + if (ext_ability & IXGBE_MDIO_PHY_1000BASET_ABILITY) + physical_layer |= IXGBE_PHYSICAL_LAYER_1000BASE_T; + if (ext_ability & IXGBE_MDIO_PHY_100BASETX_ABILITY) + physical_layer |= IXGBE_PHYSICAL_LAYER_100BASE_TX; + goto out; + default: + break; + } + + switch (autoc & IXGBE_AUTOC_LMS_MASK) { + case IXGBE_AUTOC_LMS_1G_AN: + case IXGBE_AUTOC_LMS_1G_LINK_NO_AN: + if (pma_pmd_1g == IXGBE_AUTOC_1G_KX_BX) { + physical_layer = IXGBE_PHYSICAL_LAYER_1000BASE_KX | + IXGBE_PHYSICAL_LAYER_1000BASE_BX; + goto out; + } else + /* SFI mode so read SFP module */ + goto sfp_check; + break; + case IXGBE_AUTOC_LMS_10G_LINK_NO_AN: + if (pma_pmd_10g_parallel == IXGBE_AUTOC_10G_CX4) + physical_layer = IXGBE_PHYSICAL_LAYER_10GBASE_CX4; + else if (pma_pmd_10g_parallel == IXGBE_AUTOC_10G_KX4) + physical_layer = IXGBE_PHYSICAL_LAYER_10GBASE_KX4; + else if (pma_pmd_10g_parallel == IXGBE_AUTOC_10G_XAUI) + physical_layer = IXGBE_PHYSICAL_LAYER_10GBASE_XAUI; + goto out; + break; + case IXGBE_AUTOC_LMS_10G_SERIAL: + if (pma_pmd_10g_serial == IXGBE_AUTOC2_10G_KR) { + physical_layer = IXGBE_PHYSICAL_LAYER_10GBASE_KR; + goto out; + } else if (pma_pmd_10g_serial == IXGBE_AUTOC2_10G_SFI) + goto sfp_check; + break; + case IXGBE_AUTOC_LMS_KX4_KX_KR: + case IXGBE_AUTOC_LMS_KX4_KX_KR_1G_AN: + if (autoc & IXGBE_AUTOC_KX_SUPP) + physical_layer |= IXGBE_PHYSICAL_LAYER_1000BASE_KX; + if (autoc & IXGBE_AUTOC_KX4_SUPP) + physical_layer |= IXGBE_PHYSICAL_LAYER_10GBASE_KX4; + if (autoc & IXGBE_AUTOC_KR_SUPP) + physical_layer |= IXGBE_PHYSICAL_LAYER_10GBASE_KR; + goto out; + break; + default: + goto out; + break; + } + +sfp_check: + /* SFP check must be done last since DA modules are sometimes used to + * test KR mode - we need to id KR mode correctly before SFP module. + * Call identify_sfp because the pluggable module may have changed */ + physical_layer = ixgbe_get_supported_phy_sfp_layer_generic(hw); +out: + return physical_layer; +} + +/** + * ixgbe_enable_rx_dma_82599 - Enable the Rx DMA unit on 82599 + * @hw: pointer to hardware structure + * @regval: register value to write to RXCTRL + * + * Enables the Rx DMA unit for 82599 + **/ +s32 ixgbe_enable_rx_dma_82599(struct ixgbe_hw *hw, u32 regval) +{ + + DEBUGFUNC("ixgbe_enable_rx_dma_82599"); + + /* + * Workaround for 82599 silicon errata when enabling the Rx datapath. + * If traffic is incoming before we enable the Rx unit, it could hang + * the Rx DMA unit. Therefore, make sure the security engine is + * completely disabled prior to enabling the Rx unit. + */ + + hw->mac.ops.disable_sec_rx_path(hw); + + if (regval & IXGBE_RXCTRL_RXEN) + ixgbe_enable_rx(hw); + else + ixgbe_disable_rx(hw); + + hw->mac.ops.enable_sec_rx_path(hw); + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_verify_fw_version_82599 - verify FW version for 82599 + * @hw: pointer to hardware structure + * + * Verifies that installed the firmware version is 0.6 or higher + * for SFI devices. All 82599 SFI devices should have version 0.6 or higher. + * + * Returns IXGBE_ERR_EEPROM_VERSION if the FW is not present or + * if the FW version is not supported. + **/ +STATIC s32 ixgbe_verify_fw_version_82599(struct ixgbe_hw *hw) +{ + s32 status = IXGBE_ERR_EEPROM_VERSION; + u16 fw_offset, fw_ptp_cfg_offset; + u16 fw_version; + + DEBUGFUNC("ixgbe_verify_fw_version_82599"); + + /* firmware check is only necessary for SFI devices */ + if (hw->phy.media_type != ixgbe_media_type_fiber) { + status = IXGBE_SUCCESS; + goto fw_version_out; + } + + /* get the offset to the Firmware Module block */ + if (hw->eeprom.ops.read(hw, IXGBE_FW_PTR, &fw_offset)) { + ERROR_REPORT2(IXGBE_ERROR_INVALID_STATE, + "eeprom read at offset %d failed", IXGBE_FW_PTR); + return IXGBE_ERR_EEPROM_VERSION; + } + + if ((fw_offset == 0) || (fw_offset == 0xFFFF)) + goto fw_version_out; + + /* get the offset to the Pass Through Patch Configuration block */ + if (hw->eeprom.ops.read(hw, (fw_offset + + IXGBE_FW_PASSTHROUGH_PATCH_CONFIG_PTR), + &fw_ptp_cfg_offset)) { + ERROR_REPORT2(IXGBE_ERROR_INVALID_STATE, + "eeprom read at offset %d failed", + fw_offset + + IXGBE_FW_PASSTHROUGH_PATCH_CONFIG_PTR); + return IXGBE_ERR_EEPROM_VERSION; + } + + if ((fw_ptp_cfg_offset == 0) || (fw_ptp_cfg_offset == 0xFFFF)) + goto fw_version_out; + + /* get the firmware version */ + if (hw->eeprom.ops.read(hw, (fw_ptp_cfg_offset + + IXGBE_FW_PATCH_VERSION_4), &fw_version)) { + ERROR_REPORT2(IXGBE_ERROR_INVALID_STATE, + "eeprom read at offset %d failed", + fw_ptp_cfg_offset + IXGBE_FW_PATCH_VERSION_4); + return IXGBE_ERR_EEPROM_VERSION; + } + + if (fw_version > 0x5) + status = IXGBE_SUCCESS; + +fw_version_out: + return status; +} + +/** + * ixgbe_verify_lesm_fw_enabled_82599 - Checks LESM FW module state. + * @hw: pointer to hardware structure + * + * Returns true if the LESM FW module is present and enabled. Otherwise + * returns false. Smart Speed must be disabled if LESM FW module is enabled. + **/ +bool ixgbe_verify_lesm_fw_enabled_82599(struct ixgbe_hw *hw) +{ + bool lesm_enabled = false; + u16 fw_offset, fw_lesm_param_offset, fw_lesm_state; + s32 status; + + DEBUGFUNC("ixgbe_verify_lesm_fw_enabled_82599"); + + /* get the offset to the Firmware Module block */ + status = hw->eeprom.ops.read(hw, IXGBE_FW_PTR, &fw_offset); + + if ((status != IXGBE_SUCCESS) || + (fw_offset == 0) || (fw_offset == 0xFFFF)) + goto out; + + /* get the offset to the LESM Parameters block */ + status = hw->eeprom.ops.read(hw, (fw_offset + + IXGBE_FW_LESM_PARAMETERS_PTR), + &fw_lesm_param_offset); + + if ((status != IXGBE_SUCCESS) || + (fw_lesm_param_offset == 0) || (fw_lesm_param_offset == 0xFFFF)) + goto out; + + /* get the LESM state word */ + status = hw->eeprom.ops.read(hw, (fw_lesm_param_offset + + IXGBE_FW_LESM_STATE_1), + &fw_lesm_state); + + if ((status == IXGBE_SUCCESS) && + (fw_lesm_state & IXGBE_FW_LESM_STATE_ENABLED)) + lesm_enabled = true; + +out: + return lesm_enabled; +} + +/** + * ixgbe_read_eeprom_buffer_82599 - Read EEPROM word(s) using + * fastest available method + * + * @hw: pointer to hardware structure + * @offset: offset of word in EEPROM to read + * @words: number of words + * @data: word(s) read from the EEPROM + * + * Retrieves 16 bit word(s) read from EEPROM + **/ +STATIC s32 ixgbe_read_eeprom_buffer_82599(struct ixgbe_hw *hw, u16 offset, + u16 words, u16 *data) +{ + struct ixgbe_eeprom_info *eeprom = &hw->eeprom; + s32 ret_val = IXGBE_ERR_CONFIG; + + DEBUGFUNC("ixgbe_read_eeprom_buffer_82599"); + + /* + * If EEPROM is detected and can be addressed using 14 bits, + * use EERD otherwise use bit bang + */ + if ((eeprom->type == ixgbe_eeprom_spi) && + (offset + (words - 1) <= IXGBE_EERD_MAX_ADDR)) + ret_val = ixgbe_read_eerd_buffer_generic(hw, offset, words, + data); + else + ret_val = ixgbe_read_eeprom_buffer_bit_bang_generic(hw, offset, + words, + data); + + return ret_val; +} + +/** + * ixgbe_read_eeprom_82599 - Read EEPROM word using + * fastest available method + * + * @hw: pointer to hardware structure + * @offset: offset of word in the EEPROM to read + * @data: word read from the EEPROM + * + * Reads a 16 bit word from the EEPROM + **/ +STATIC s32 ixgbe_read_eeprom_82599(struct ixgbe_hw *hw, + u16 offset, u16 *data) +{ + struct ixgbe_eeprom_info *eeprom = &hw->eeprom; + s32 ret_val = IXGBE_ERR_CONFIG; + + DEBUGFUNC("ixgbe_read_eeprom_82599"); + + /* + * If EEPROM is detected and can be addressed using 14 bits, + * use EERD otherwise use bit bang + */ + if ((eeprom->type == ixgbe_eeprom_spi) && + (offset <= IXGBE_EERD_MAX_ADDR)) + ret_val = ixgbe_read_eerd_generic(hw, offset, data); + else + ret_val = ixgbe_read_eeprom_bit_bang_generic(hw, offset, data); + + return ret_val; +} + +/** + * ixgbe_reset_pipeline_82599 - perform pipeline reset + * + * @hw: pointer to hardware structure + * + * Reset pipeline by asserting Restart_AN together with LMS change to ensure + * full pipeline reset. This function assumes the SW/FW lock is held. + **/ +s32 ixgbe_reset_pipeline_82599(struct ixgbe_hw *hw) +{ + s32 ret_val; + u32 anlp1_reg = 0; + u32 i, autoc_reg, autoc2_reg; + + /* Enable link if disabled in NVM */ + autoc2_reg = IXGBE_READ_REG(hw, IXGBE_AUTOC2); + if (autoc2_reg & IXGBE_AUTOC2_LINK_DISABLE_MASK) { + autoc2_reg &= ~IXGBE_AUTOC2_LINK_DISABLE_MASK; + IXGBE_WRITE_REG(hw, IXGBE_AUTOC2, autoc2_reg); + IXGBE_WRITE_FLUSH(hw); + } + + autoc_reg = IXGBE_READ_REG(hw, IXGBE_AUTOC); + autoc_reg |= IXGBE_AUTOC_AN_RESTART; + /* Write AUTOC register with toggled LMS[2] bit and Restart_AN */ + IXGBE_WRITE_REG(hw, IXGBE_AUTOC, + autoc_reg ^ (0x4 << IXGBE_AUTOC_LMS_SHIFT)); + /* Wait for AN to leave state 0 */ + for (i = 0; i < 10; i++) { + msec_delay(4); + anlp1_reg = IXGBE_READ_REG(hw, IXGBE_ANLP1); + if (anlp1_reg & IXGBE_ANLP1_AN_STATE_MASK) + break; + } + + if (!(anlp1_reg & IXGBE_ANLP1_AN_STATE_MASK)) { + hw_dbg(hw, "auto negotiation not completed\n"); + ret_val = IXGBE_ERR_RESET_FAILED; + goto reset_pipeline_out; + } + + ret_val = IXGBE_SUCCESS; + +reset_pipeline_out: + /* Write AUTOC register with original LMS field and Restart_AN */ + IXGBE_WRITE_REG(hw, IXGBE_AUTOC, autoc_reg); + IXGBE_WRITE_FLUSH(hw); + + return ret_val; +} + +/** + * ixgbe_read_i2c_byte_82599 - Reads 8 bit word over I2C + * @hw: pointer to hardware structure + * @byte_offset: byte offset to read + * @dev_addr: address to read from + * @data: value read + * + * Performs byte read operation to SFP module's EEPROM over I2C interface at + * a specified device address. + **/ +STATIC s32 ixgbe_read_i2c_byte_82599(struct ixgbe_hw *hw, u8 byte_offset, + u8 dev_addr, u8 *data) +{ + u32 esdp; + s32 status; + s32 timeout = 200; + + DEBUGFUNC("ixgbe_read_i2c_byte_82599"); + + if (hw->phy.qsfp_shared_i2c_bus == TRUE) { + /* Acquire I2C bus ownership. */ + esdp = IXGBE_READ_REG(hw, IXGBE_ESDP); + esdp |= IXGBE_ESDP_SDP0; + IXGBE_WRITE_REG(hw, IXGBE_ESDP, esdp); + IXGBE_WRITE_FLUSH(hw); + + while (timeout) { + esdp = IXGBE_READ_REG(hw, IXGBE_ESDP); + if (esdp & IXGBE_ESDP_SDP1) + break; + + msec_delay(5); + timeout--; + } + + if (!timeout) { + hw_dbg(hw, "Driver can't access resource," + " acquiring I2C bus timeout.\n"); + status = IXGBE_ERR_I2C; + goto release_i2c_access; + } + } + + status = ixgbe_read_i2c_byte_generic(hw, byte_offset, dev_addr, data); + +release_i2c_access: + + if (hw->phy.qsfp_shared_i2c_bus == TRUE) { + /* Release I2C bus ownership. */ + esdp = IXGBE_READ_REG(hw, IXGBE_ESDP); + esdp &= ~IXGBE_ESDP_SDP0; + IXGBE_WRITE_REG(hw, IXGBE_ESDP, esdp); + IXGBE_WRITE_FLUSH(hw); + } + + return status; +} + +/** + * ixgbe_write_i2c_byte_82599 - Writes 8 bit word over I2C + * @hw: pointer to hardware structure + * @byte_offset: byte offset to write + * @dev_addr: address to read from + * @data: value to write + * + * Performs byte write operation to SFP module's EEPROM over I2C interface at + * a specified device address. + **/ +STATIC s32 ixgbe_write_i2c_byte_82599(struct ixgbe_hw *hw, u8 byte_offset, + u8 dev_addr, u8 data) +{ + u32 esdp; + s32 status; + s32 timeout = 200; + + DEBUGFUNC("ixgbe_write_i2c_byte_82599"); + + if (hw->phy.qsfp_shared_i2c_bus == TRUE) { + /* Acquire I2C bus ownership. */ + esdp = IXGBE_READ_REG(hw, IXGBE_ESDP); + esdp |= IXGBE_ESDP_SDP0; + IXGBE_WRITE_REG(hw, IXGBE_ESDP, esdp); + IXGBE_WRITE_FLUSH(hw); + + while (timeout) { + esdp = IXGBE_READ_REG(hw, IXGBE_ESDP); + if (esdp & IXGBE_ESDP_SDP1) + break; + + msec_delay(5); + timeout--; + } + + if (!timeout) { + hw_dbg(hw, "Driver can't access resource," + " acquiring I2C bus timeout.\n"); + status = IXGBE_ERR_I2C; + goto release_i2c_access; + } + } + + status = ixgbe_write_i2c_byte_generic(hw, byte_offset, dev_addr, data); + +release_i2c_access: + + if (hw->phy.qsfp_shared_i2c_bus == TRUE) { + /* Release I2C bus ownership. */ + esdp = IXGBE_READ_REG(hw, IXGBE_ESDP); + esdp &= ~IXGBE_ESDP_SDP0; + IXGBE_WRITE_REG(hw, IXGBE_ESDP, esdp); + IXGBE_WRITE_FLUSH(hw); + } + + return status; +} diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_82599.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_82599.h new file mode 100644 index 00000000000..68ae5087cf0 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_82599.h @@ -0,0 +1,34 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 1999 - 2026 Intel Corporation */ + +#ifndef _IXGBE_82599_H_ +#define _IXGBE_82599_H_ + +s32 ixgbe_get_link_capabilities_82599(struct ixgbe_hw *hw, + ixgbe_link_speed *speed, bool *autoneg); +enum ixgbe_media_type ixgbe_get_media_type_82599(struct ixgbe_hw *hw); +void ixgbe_disable_tx_laser_multispeed_fiber(struct ixgbe_hw *hw); +void ixgbe_enable_tx_laser_multispeed_fiber(struct ixgbe_hw *hw); +void ixgbe_flap_tx_laser_multispeed_fiber(struct ixgbe_hw *hw); +void ixgbe_set_hard_rate_select_speed(struct ixgbe_hw *hw, + ixgbe_link_speed speed); +s32 ixgbe_setup_mac_link_smartspeed(struct ixgbe_hw *hw, + ixgbe_link_speed speed, + bool autoneg_wait_to_complete); +s32 ixgbe_start_mac_link_82599(struct ixgbe_hw *hw, + bool autoneg_wait_to_complete); +s32 ixgbe_setup_mac_link_82599(struct ixgbe_hw *hw, ixgbe_link_speed speed, + bool autoneg_wait_to_complete); +s32 ixgbe_setup_sfp_modules_82599(struct ixgbe_hw *hw); +void ixgbe_init_mac_link_ops_82599(struct ixgbe_hw *hw); +s32 ixgbe_reset_hw_82599(struct ixgbe_hw *hw); +s32 ixgbe_read_analog_reg8_82599(struct ixgbe_hw *hw, u32 reg, u8 *val); +s32 ixgbe_write_analog_reg8_82599(struct ixgbe_hw *hw, u32 reg, u8 val); +s32 ixgbe_start_hw_82599(struct ixgbe_hw *hw); +s32 ixgbe_identify_phy_82599(struct ixgbe_hw *hw); +s32 ixgbe_init_phy_ops_82599(struct ixgbe_hw *hw); +u64 ixgbe_get_supported_physical_layer_82599(struct ixgbe_hw *hw); +s32 ixgbe_enable_rx_dma_82599(struct ixgbe_hw *hw, u32 regval); +s32 prot_autoc_read_82599(struct ixgbe_hw *hw, bool *locked, u32 *reg_val); +s32 prot_autoc_write_82599(struct ixgbe_hw *hw, u32 reg_val, bool locked); +#endif /* _IXGBE_82599_H_ */ diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_api.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_api.c new file mode 100644 index 00000000000..dffcecd47ed --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_api.c @@ -0,0 +1,1721 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 1999 - 2026 Intel Corporation */ + +#include "ixgbe_api.h" +#include "ixgbe_common.h" + +#define IXGBE_EMPTY_PARAM + +static const u32 ixgbe_mvals_base[IXGBE_MVALS_IDX_LIMIT] = { + IXGBE_MVALS_INIT(IXGBE_EMPTY_PARAM) +}; + +static const u32 ixgbe_mvals_X540[IXGBE_MVALS_IDX_LIMIT] = { + IXGBE_MVALS_INIT(_X540) +}; + +static const u32 ixgbe_mvals_X550[IXGBE_MVALS_IDX_LIMIT] = { + IXGBE_MVALS_INIT(_X550) +}; + +static const u32 ixgbe_mvals_X550EM_x[IXGBE_MVALS_IDX_LIMIT] = { + IXGBE_MVALS_INIT(_X550EM_x) +}; + +static const u32 ixgbe_mvals_X550EM_a[IXGBE_MVALS_IDX_LIMIT] = { + IXGBE_MVALS_INIT(_X550EM_a) +}; + +/** + * ixgbe_dcb_get_rtrup2tc - read rtrup2tc reg + * @hw: pointer to hardware structure + * @map: pointer to u8 arr for returning map + * + * Read the rtrup2tc HW register and resolve its content into map + **/ +void ixgbe_dcb_get_rtrup2tc(struct ixgbe_hw *hw, u8 *map) +{ + if (hw->mac.ops.get_rtrup2tc) + hw->mac.ops.get_rtrup2tc(hw, map); +} + +/** + * ixgbe_init_shared_code - Initialize the shared code + * @hw: pointer to hardware structure + * + * This will assign function pointers and assign the MAC type and PHY code. + * Does not touch the hardware. This function must be called prior to any + * other function in the shared code. The ixgbe_hw structure should be + * memset to 0 prior to calling this function. The following fields in + * hw structure should be filled in prior to calling this function: + * hw_addr, back, device_id, vendor_id, subsystem_device_id, + * subsystem_vendor_id, and revision_id + **/ +s32 ixgbe_init_shared_code(struct ixgbe_hw *hw) +{ + s32 status; + + DEBUGFUNC("ixgbe_init_shared_code"); + + /* + * Set the mac type + */ + ixgbe_set_mac_type(hw); + + switch (hw->mac.type) { + case ixgbe_mac_82598EB: + status = ixgbe_init_ops_82598(hw); + break; + case ixgbe_mac_82599EB: + status = ixgbe_init_ops_82599(hw); + break; + case ixgbe_mac_X540: + status = ixgbe_init_ops_X540(hw); + break; + case ixgbe_mac_X550: + status = ixgbe_init_ops_X550(hw); + break; + case ixgbe_mac_X550EM_x: + status = ixgbe_init_ops_X550EM_x(hw); + break; + case ixgbe_mac_X550EM_a: + status = ixgbe_init_ops_X550EM_a(hw); + break; + case ixgbe_mac_E610: + status = ixgbe_init_ops_E610(hw); + break; + default: + status = IXGBE_ERR_DEVICE_NOT_SUPPORTED; + break; + } + hw->mac.max_link_up_time = IXGBE_LINK_UP_TIME; + + /* NVM Update features structure initialization */ + hw->nvmupd_features.major = IXGBE_NVMUPD_FEATURES_API_VER_MAJOR; + hw->nvmupd_features.minor = IXGBE_NVMUPD_FEATURES_API_VER_MINOR; + hw->nvmupd_features.size = sizeof(hw->nvmupd_features); + memset(hw->nvmupd_features.features, 0x0, + IXGBE_NVMUPD_FEATURES_API_FEATURES_ARRAY_LEN * + sizeof(*hw->nvmupd_features.features)); + + hw->nvmupd_features.features[0] = + IXGBE_NVMUPD_FEATURE_REGISTER_ACCESS_SUPPORT; + + return status; +} + +/** + * ixgbe_set_mac_type - Sets MAC type + * @hw: pointer to the HW structure + * + * This function sets the mac type of the adapter based on the + * vendor ID and device ID stored in the hw structure. + **/ +s32 ixgbe_set_mac_type(struct ixgbe_hw *hw) +{ + s32 ret_val = IXGBE_SUCCESS; + + DEBUGFUNC("ixgbe_set_mac_type\n"); + + if (hw->vendor_id != IXGBE_INTEL_VENDOR_ID) { + ERROR_REPORT2(IXGBE_ERROR_UNSUPPORTED, + "Unsupported vendor id: %x", hw->vendor_id); + return IXGBE_ERR_DEVICE_NOT_SUPPORTED; + } + + hw->mvals = ixgbe_mvals_base; + + switch (hw->device_id) { + case IXGBE_DEV_ID_82598: + case IXGBE_DEV_ID_82598_BX: + case IXGBE_DEV_ID_82598AF_SINGLE_PORT: + case IXGBE_DEV_ID_82598AF_DUAL_PORT: + case IXGBE_DEV_ID_82598AT: + case IXGBE_DEV_ID_82598AT2: + case IXGBE_DEV_ID_82598EB_CX4: + case IXGBE_DEV_ID_82598_CX4_DUAL_PORT: + case IXGBE_DEV_ID_82598_DA_DUAL_PORT: + case IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM: + case IXGBE_DEV_ID_82598EB_XF_LR: + case IXGBE_DEV_ID_82598EB_SFP_LOM: + hw->mac.type = ixgbe_mac_82598EB; + break; + case IXGBE_DEV_ID_82599_KX4: + case IXGBE_DEV_ID_82599_KX4_MEZZ: + case IXGBE_DEV_ID_82599_XAUI_LOM: + case IXGBE_DEV_ID_82599_COMBO_BACKPLANE: + case IXGBE_DEV_ID_82599_KR: + case IXGBE_DEV_ID_82599_SFP: + case IXGBE_DEV_ID_82599_BACKPLANE_FCOE: + case IXGBE_DEV_ID_82599_SFP_FCOE: + case IXGBE_DEV_ID_82599_SFP_EM: + case IXGBE_DEV_ID_82599_SFP_SF2: + case IXGBE_DEV_ID_82599_SFP_SF_QP: + case IXGBE_DEV_ID_82599_QSFP_SF_QP: + case IXGBE_DEV_ID_82599EN_SFP: + case IXGBE_DEV_ID_82599_CX4: + case IXGBE_DEV_ID_82599_T3_LOM: + hw->mac.type = ixgbe_mac_82599EB; + break; + case IXGBE_DEV_ID_X540T: + case IXGBE_DEV_ID_X540T1: + hw->mac.type = ixgbe_mac_X540; + hw->mvals = ixgbe_mvals_X540; + break; + case IXGBE_DEV_ID_X550T: + case IXGBE_DEV_ID_X550T1: + hw->mac.type = ixgbe_mac_X550; + hw->mvals = ixgbe_mvals_X550; + break; + case IXGBE_DEV_ID_X550EM_X_KX4: + case IXGBE_DEV_ID_X550EM_X_KR: + case IXGBE_DEV_ID_X550EM_X_10G_T: + case IXGBE_DEV_ID_X550EM_X_1G_T: + case IXGBE_DEV_ID_X550EM_X_SFP: + case IXGBE_DEV_ID_X550EM_X_XFI: + hw->mac.type = ixgbe_mac_X550EM_x; + hw->mvals = ixgbe_mvals_X550EM_x; + break; + case IXGBE_DEV_ID_X550EM_A_KR: + case IXGBE_DEV_ID_X550EM_A_KR_L: + case IXGBE_DEV_ID_X550EM_A_SFP_N: + case IXGBE_DEV_ID_X550EM_A_SGMII: + case IXGBE_DEV_ID_X550EM_A_SGMII_L: + case IXGBE_DEV_ID_X550EM_A_1G_T: + case IXGBE_DEV_ID_X550EM_A_1G_T_L: + case IXGBE_DEV_ID_X550EM_A_10G_T: + case IXGBE_DEV_ID_X550EM_A_QSFP: + case IXGBE_DEV_ID_X550EM_A_QSFP_N: + case IXGBE_DEV_ID_X550EM_A_SFP: + hw->mac.type = ixgbe_mac_X550EM_a; + hw->mvals = ixgbe_mvals_X550EM_a; + break; + case IXGBE_DEV_ID_E610_BACKPLANE: + case IXGBE_DEV_ID_E610_SFP: + case IXGBE_DEV_ID_E610_10G_T: + case IXGBE_DEV_ID_E610_2_5G_T: + case IXGBE_DEV_ID_E610_SGMII: + hw->mac.type = ixgbe_mac_E610; + hw->mvals = ixgbe_mvals_X550EM_a; + break; + default: + ret_val = IXGBE_ERR_DEVICE_NOT_SUPPORTED; + ERROR_REPORT2(IXGBE_ERROR_UNSUPPORTED, + "Unsupported device id: %x", + hw->device_id); + break; + } + + return ret_val; +} + +/** + * ixgbe_init_hw - Initialize the hardware + * @hw: pointer to hardware structure + * + * Initialize the hardware by resetting and then starting the hardware + **/ +s32 ixgbe_init_hw(struct ixgbe_hw *hw) +{ + return ixgbe_call_func(hw, hw->mac.ops.init_hw, (hw), + IXGBE_NOT_IMPLEMENTED); +} + +/** + * ixgbe_reset_hw - Performs a hardware reset + * @hw: pointer to hardware structure + * + * Resets the hardware by resetting the transmit and receive units, masks and + * clears all interrupts, performs a PHY reset, and performs a MAC reset + **/ +s32 ixgbe_reset_hw(struct ixgbe_hw *hw) +{ + return ixgbe_call_func(hw, hw->mac.ops.reset_hw, (hw), + IXGBE_NOT_IMPLEMENTED); +} + +/** + * ixgbe_start_hw - Prepares hardware for Rx/Tx + * @hw: pointer to hardware structure + * + * Starts the hardware by filling the bus info structure and media type, + * clears all on chip counters, initializes receive address registers, + * multicast table, VLAN filter table, calls routine to setup link and + * flow control settings, and leaves transmit and receive units disabled + * and uninitialized. + **/ +s32 ixgbe_start_hw(struct ixgbe_hw *hw) +{ + return ixgbe_call_func(hw, hw->mac.ops.start_hw, (hw), + IXGBE_NOT_IMPLEMENTED); +} + +/** + * ixgbe_clear_hw_cntrs - Clear hardware counters + * @hw: pointer to hardware structure + * + * Clears all hardware statistics counters by reading them from the hardware + * Statistics counters are clear on read. + **/ +s32 ixgbe_clear_hw_cntrs(struct ixgbe_hw *hw) +{ + return ixgbe_call_func(hw, hw->mac.ops.clear_hw_cntrs, (hw), + IXGBE_NOT_IMPLEMENTED); +} + +/** + * ixgbe_get_media_type - Get media type + * @hw: pointer to hardware structure + * + * Returns the media type (fiber, copper, backplane) + **/ +enum ixgbe_media_type ixgbe_get_media_type(struct ixgbe_hw *hw) +{ + return ixgbe_call_func(hw, hw->mac.ops.get_media_type, (hw), + ixgbe_media_type_unknown); +} + +/** + * ixgbe_get_mac_addr - Get MAC address + * @hw: pointer to hardware structure + * @mac_addr: Adapter MAC address + * + * Reads the adapter's MAC address from the first Receive Address Register + * (RAR0) A reset of the adapter must have been performed prior to calling + * this function in order for the MAC address to have been loaded from the + * EEPROM into RAR0 + **/ +s32 ixgbe_get_mac_addr(struct ixgbe_hw *hw, u8 *mac_addr) +{ + return ixgbe_call_func(hw, hw->mac.ops.get_mac_addr, + (hw, mac_addr), IXGBE_NOT_IMPLEMENTED); +} + +/** + * ixgbe_get_san_mac_addr - Get SAN MAC address + * @hw: pointer to hardware structure + * @san_mac_addr: SAN MAC address + * + * Reads the SAN MAC address from the EEPROM, if it's available. This is + * per-port, so set_lan_id() must be called before reading the addresses. + **/ +s32 ixgbe_get_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr) +{ + return ixgbe_call_func(hw, hw->mac.ops.get_san_mac_addr, + (hw, san_mac_addr), IXGBE_NOT_IMPLEMENTED); +} + +/** + * ixgbe_set_san_mac_addr - Write a SAN MAC address + * @hw: pointer to hardware structure + * @san_mac_addr: SAN MAC address + * + * Writes A SAN MAC address to the EEPROM. + **/ +s32 ixgbe_set_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr) +{ + return ixgbe_call_func(hw, hw->mac.ops.set_san_mac_addr, + (hw, san_mac_addr), IXGBE_NOT_IMPLEMENTED); +} + +/** + * ixgbe_get_device_caps - Get additional device capabilities + * @hw: pointer to hardware structure + * @device_caps: the EEPROM word for device capabilities + * + * Reads the extra device capabilities from the EEPROM + **/ +s32 ixgbe_get_device_caps(struct ixgbe_hw *hw, u16 *device_caps) +{ + return ixgbe_call_func(hw, hw->mac.ops.get_device_caps, + (hw, device_caps), IXGBE_NOT_IMPLEMENTED); +} + +/** + * ixgbe_get_wwn_prefix - Get alternative WWNN/WWPN prefix from the EEPROM + * @hw: pointer to hardware structure + * @wwnn_prefix: the alternative WWNN prefix + * @wwpn_prefix: the alternative WWPN prefix + * + * This function will read the EEPROM from the alternative SAN MAC address + * block to check the support for the alternative WWNN/WWPN prefix support. + **/ +s32 ixgbe_get_wwn_prefix(struct ixgbe_hw *hw, u16 *wwnn_prefix, + u16 *wwpn_prefix) +{ + return ixgbe_call_func(hw, hw->mac.ops.get_wwn_prefix, + (hw, wwnn_prefix, wwpn_prefix), + IXGBE_NOT_IMPLEMENTED); +} + +/** + * ixgbe_get_fcoe_boot_status - Get FCOE boot status from EEPROM + * @hw: pointer to hardware structure + * @bs: the fcoe boot status + * + * This function will read the FCOE boot status from the iSCSI FCOE block + **/ +s32 ixgbe_get_fcoe_boot_status(struct ixgbe_hw *hw, u16 *bs) +{ + return ixgbe_call_func(hw, hw->mac.ops.get_fcoe_boot_status, + (hw, bs), + IXGBE_NOT_IMPLEMENTED); +} + +/** + * ixgbe_get_bus_info - Set PCI bus info + * @hw: pointer to hardware structure + * + * Sets the PCI bus info (speed, width, type) within the ixgbe_hw structure + **/ +s32 ixgbe_get_bus_info(struct ixgbe_hw *hw) +{ + return ixgbe_call_func(hw, hw->mac.ops.get_bus_info, (hw), + IXGBE_NOT_IMPLEMENTED); +} + +/** + * ixgbe_get_num_of_tx_queues - Get Tx queues + * @hw: pointer to hardware structure + * + * Returns the number of transmit queues for the given adapter. + **/ +u32 ixgbe_get_num_of_tx_queues(struct ixgbe_hw *hw) +{ + return hw->mac.max_tx_queues; +} + +/** + * ixgbe_get_num_of_rx_queues - Get Rx queues + * @hw: pointer to hardware structure + * + * Returns the number of receive queues for the given adapter. + **/ +u32 ixgbe_get_num_of_rx_queues(struct ixgbe_hw *hw) +{ + return hw->mac.max_rx_queues; +} + +/** + * ixgbe_stop_adapter - Disable Rx/Tx units + * @hw: pointer to hardware structure + * + * Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts, + * disables transmit and receive units. The adapter_stopped flag is used by + * the shared code and drivers to determine if the adapter is in a stopped + * state and should not touch the hardware. + **/ +s32 ixgbe_stop_adapter(struct ixgbe_hw *hw) +{ + return ixgbe_call_func(hw, hw->mac.ops.stop_adapter, (hw), + IXGBE_NOT_IMPLEMENTED); +} + +/** + * ixgbe_read_pba_string - Reads part number string from EEPROM + * @hw: pointer to hardware structure + * @pba_num: stores the part number string from the EEPROM + * @pba_num_size: part number string buffer length + * + * Reads the part number string from the EEPROM. + **/ +s32 ixgbe_read_pba_string(struct ixgbe_hw *hw, u8 *pba_num, u32 pba_num_size) +{ + return ixgbe_call_func(hw, hw->eeprom.ops.read_pba_string, (hw, pba_num, + pba_num_size), IXGBE_NOT_IMPLEMENTED); +} + +/** + * ixgbe_identify_phy - Get PHY type + * @hw: pointer to hardware structure + * + * Determines the physical layer module found on the current adapter. + **/ +s32 ixgbe_identify_phy(struct ixgbe_hw *hw) +{ + s32 status = IXGBE_SUCCESS; + + if (hw->phy.type == ixgbe_phy_unknown) { + status = ixgbe_call_func(hw, hw->phy.ops.identify, (hw), + IXGBE_NOT_IMPLEMENTED); + } + + return status; +} + +/** + * ixgbe_reset_phy - Perform a PHY reset + * @hw: pointer to hardware structure + **/ +s32 ixgbe_reset_phy(struct ixgbe_hw *hw) +{ + s32 status = IXGBE_SUCCESS; + + if (hw->phy.type == ixgbe_phy_unknown) { + if (ixgbe_identify_phy(hw) != IXGBE_SUCCESS) + status = IXGBE_ERR_PHY; + } + + if (status == IXGBE_SUCCESS) { + status = ixgbe_call_func(hw, hw->phy.ops.reset, (hw), + IXGBE_NOT_IMPLEMENTED); + } + return status; +} + +/** + * ixgbe_get_phy_firmware_version - + * @hw: pointer to hardware structure + * @firmware_version: pointer to firmware version + **/ +s32 ixgbe_get_phy_firmware_version(struct ixgbe_hw *hw, u16 *firmware_version) +{ + s32 status = IXGBE_SUCCESS; + + status = ixgbe_call_func(hw, hw->phy.ops.get_firmware_version, + (hw, firmware_version), + IXGBE_NOT_IMPLEMENTED); + return status; +} + +/** + * ixgbe_read_phy_reg - Read PHY register + * @hw: pointer to hardware structure + * @reg_addr: 32 bit address of PHY register to read + * @device_type: type of device you want to communicate with + * @phy_data: Pointer to read data from PHY register + * + * Reads a value from a specified PHY register + **/ +s32 ixgbe_read_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, + u16 *phy_data) +{ + if (hw->phy.id == 0) + ixgbe_identify_phy(hw); + + return ixgbe_call_func(hw, hw->phy.ops.read_reg, (hw, reg_addr, + device_type, phy_data), IXGBE_NOT_IMPLEMENTED); +} + +/** + * ixgbe_write_phy_reg - Write PHY register + * @hw: pointer to hardware structure + * @reg_addr: 32 bit PHY register to write + * @device_type: type of device you want to communicate with + * @phy_data: Data to write to the PHY register + * + * Writes a value to specified PHY register + **/ +s32 ixgbe_write_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, + u16 phy_data) +{ + if (hw->phy.id == 0) + ixgbe_identify_phy(hw); + + return ixgbe_call_func(hw, hw->phy.ops.write_reg, (hw, reg_addr, + device_type, phy_data), IXGBE_NOT_IMPLEMENTED); +} + +/** + * ixgbe_setup_phy_link - Restart PHY autoneg + * @hw: pointer to hardware structure + * + * Restart autonegotiation and PHY and waits for completion. + **/ +s32 ixgbe_setup_phy_link(struct ixgbe_hw *hw) +{ + return ixgbe_call_func(hw, hw->phy.ops.setup_link, (hw), + IXGBE_NOT_IMPLEMENTED); +} + +/** + * ixgbe_setup_internal_phy - Configure integrated PHY + * @hw: pointer to hardware structure + * + * Reconfigure the integrated PHY in order to enable talk to the external PHY. + * Returns success if not implemented, since nothing needs to be done in this + * case. + */ +s32 ixgbe_setup_internal_phy(struct ixgbe_hw *hw) +{ + return ixgbe_call_func(hw, hw->phy.ops.setup_internal_link, (hw), + IXGBE_SUCCESS); +} + +/** + * ixgbe_check_phy_link - Determine link and speed status + * @hw: pointer to hardware structure + * @speed: link speed + * @link_up: true when link is up + * + * Reads a PHY register to determine if link is up and the current speed for + * the PHY. + **/ +s32 ixgbe_check_phy_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed, + bool *link_up) +{ + return ixgbe_call_func(hw, hw->phy.ops.check_link, (hw, speed, + link_up), IXGBE_NOT_IMPLEMENTED); +} + +/** + * ixgbe_setup_phy_link_speed - Set auto advertise + * @hw: pointer to hardware structure + * @speed: new link speed + * @autoneg_wait_to_complete: true when waiting for completion is needed + * + * Sets the auto advertised capabilities + **/ +s32 ixgbe_setup_phy_link_speed(struct ixgbe_hw *hw, ixgbe_link_speed speed, + bool autoneg_wait_to_complete) +{ + return ixgbe_call_func(hw, hw->phy.ops.setup_link_speed, (hw, speed, + autoneg_wait_to_complete), + IXGBE_NOT_IMPLEMENTED); +} + +/** + * ixgbe_set_phy_power - Control the phy power state + * @hw: pointer to hardware structure + * @on: true for on, false for off + */ +s32 ixgbe_set_phy_power(struct ixgbe_hw *hw, bool on) +{ + return ixgbe_call_func(hw, hw->phy.ops.set_phy_power, (hw, on), + IXGBE_NOT_IMPLEMENTED); +} + +/** + * ixgbe_check_link - Get link and speed status + * @hw: pointer to hardware structure + * @speed: pointer to link speed + * @link_up: true when link is up + * @link_up_wait_to_complete: bool used to wait for link up or not + * + * Reads the links register to determine if link is up and the current speed + **/ +s32 ixgbe_check_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed, + bool *link_up, bool link_up_wait_to_complete) +{ + return ixgbe_call_func(hw, hw->mac.ops.check_link, (hw, speed, + link_up, link_up_wait_to_complete), + IXGBE_NOT_IMPLEMENTED); +} + +/** + * ixgbe_disable_tx_laser - Disable Tx laser + * @hw: pointer to hardware structure + * + * If the driver needs to disable the laser on SFI optics. + **/ +void ixgbe_disable_tx_laser(struct ixgbe_hw *hw) +{ + if (hw->mac.ops.disable_tx_laser) + hw->mac.ops.disable_tx_laser(hw); +} + +/** + * ixgbe_enable_tx_laser - Enable Tx laser + * @hw: pointer to hardware structure + * + * If the driver needs to enable the laser on SFI optics. + **/ +void ixgbe_enable_tx_laser(struct ixgbe_hw *hw) +{ + if (hw->mac.ops.enable_tx_laser) + hw->mac.ops.enable_tx_laser(hw); +} + +/** + * ixgbe_flap_tx_laser - flap Tx laser to start autotry process + * @hw: pointer to hardware structure + * + * When the driver changes the link speeds that it can support then + * flap the tx laser to alert the link partner to start autotry + * process on its end. + **/ +void ixgbe_flap_tx_laser(struct ixgbe_hw *hw) +{ + if (hw->mac.ops.flap_tx_laser) + hw->mac.ops.flap_tx_laser(hw); +} + +/** + * ixgbe_setup_link - Set link speed + * @hw: pointer to hardware structure + * @speed: new link speed + * @autoneg_wait_to_complete: true when waiting for completion is needed + * + * Configures link settings. Restarts the link. + * Performs autonegotiation if needed. + **/ +s32 ixgbe_setup_link(struct ixgbe_hw *hw, ixgbe_link_speed speed, + bool autoneg_wait_to_complete) +{ + return ixgbe_call_func(hw, hw->mac.ops.setup_link, (hw, speed, + autoneg_wait_to_complete), + IXGBE_NOT_IMPLEMENTED); +} + +/** + * ixgbe_setup_mac_link - Set link speed + * @hw: pointer to hardware structure + * @speed: new link speed + * @autoneg_wait_to_complete: true when waiting for completion is needed + * + * Configures link settings. Restarts the link. + * Performs autonegotiation if needed. + **/ +s32 ixgbe_setup_mac_link(struct ixgbe_hw *hw, ixgbe_link_speed speed, + bool autoneg_wait_to_complete) +{ + return ixgbe_call_func(hw, hw->mac.ops.setup_mac_link, (hw, speed, + autoneg_wait_to_complete), + IXGBE_NOT_IMPLEMENTED); +} + +/** + * ixgbe_get_link_capabilities - Returns link capabilities + * @hw: pointer to hardware structure + * @speed: link speed capabilities + * @autoneg: true when autoneg or autotry is enabled + * + * Determines the link capabilities of the current configuration. + **/ +s32 ixgbe_get_link_capabilities(struct ixgbe_hw *hw, ixgbe_link_speed *speed, + bool *autoneg) +{ + return ixgbe_call_func(hw, hw->mac.ops.get_link_capabilities, (hw, + speed, autoneg), IXGBE_NOT_IMPLEMENTED); +} + +/** + * ixgbe_led_on - Turn on LEDs + * @hw: pointer to hardware structure + * @index: led number to turn on + * + * Turns on the software controllable LEDs. + **/ +s32 ixgbe_led_on(struct ixgbe_hw *hw, u32 index) +{ + return ixgbe_call_func(hw, hw->mac.ops.led_on, (hw, index), + IXGBE_NOT_IMPLEMENTED); +} + +/** + * ixgbe_led_off - Turn off LEDs + * @hw: pointer to hardware structure + * @index: led number to turn off + * + * Turns off the software controllable LEDs. + **/ +s32 ixgbe_led_off(struct ixgbe_hw *hw, u32 index) +{ + return ixgbe_call_func(hw, hw->mac.ops.led_off, (hw, index), + IXGBE_NOT_IMPLEMENTED); +} + +/** + * ixgbe_blink_led_start - Blink LEDs + * @hw: pointer to hardware structure + * @index: led number to blink + * + * Blink LED based on index. + **/ +s32 ixgbe_blink_led_start(struct ixgbe_hw *hw, u32 index) +{ + return ixgbe_call_func(hw, hw->mac.ops.blink_led_start, (hw, index), + IXGBE_NOT_IMPLEMENTED); +} + +/** + * ixgbe_blink_led_stop - Stop blinking LEDs + * @hw: pointer to hardware structure + * @index: led number to stop + * + * Stop blinking LED based on index. + **/ +s32 ixgbe_blink_led_stop(struct ixgbe_hw *hw, u32 index) +{ + return ixgbe_call_func(hw, hw->mac.ops.blink_led_stop, (hw, index), + IXGBE_NOT_IMPLEMENTED); +} + +/** + * ixgbe_init_eeprom_params - Initialize EEPROM parameters + * @hw: pointer to hardware structure + * + * Initializes the EEPROM parameters ixgbe_eeprom_info within the + * ixgbe_hw struct in order to set up EEPROM access. + **/ +s32 ixgbe_init_eeprom_params(struct ixgbe_hw *hw) +{ + return ixgbe_call_func(hw, hw->eeprom.ops.init_params, (hw), + IXGBE_NOT_IMPLEMENTED); +} + + +/** + * ixgbe_write_eeprom - Write word to EEPROM + * @hw: pointer to hardware structure + * @offset: offset within the EEPROM to be written to + * @data: 16 bit word to be written to the EEPROM + * + * Writes 16 bit value to EEPROM. If ixgbe_eeprom_update_checksum is not + * called after this function, the EEPROM will most likely contain an + * invalid checksum. + **/ +s32 ixgbe_write_eeprom(struct ixgbe_hw *hw, u16 offset, u16 data) +{ + return ixgbe_call_func(hw, hw->eeprom.ops.write, (hw, offset, data), + IXGBE_NOT_IMPLEMENTED); +} + +/** + * ixgbe_write_eeprom_buffer - Write word(s) to EEPROM + * @hw: pointer to hardware structure + * @offset: offset within the EEPROM to be written to + * @data: 16 bit word(s) to be written to the EEPROM + * @words: number of words + * + * Writes 16 bit word(s) to EEPROM. If ixgbe_eeprom_update_checksum is not + * called after this function, the EEPROM will most likely contain an + * invalid checksum. + **/ +s32 ixgbe_write_eeprom_buffer(struct ixgbe_hw *hw, u16 offset, u16 words, + u16 *data) +{ + return ixgbe_call_func(hw, hw->eeprom.ops.write_buffer, + (hw, offset, words, data), + IXGBE_NOT_IMPLEMENTED); +} + +/** + * ixgbe_read_eeprom - Read word from EEPROM + * @hw: pointer to hardware structure + * @offset: offset within the EEPROM to be read + * @data: read 16 bit value from EEPROM + * + * Reads 16 bit value from EEPROM + **/ +s32 ixgbe_read_eeprom(struct ixgbe_hw *hw, u16 offset, u16 *data) +{ + return ixgbe_call_func(hw, hw->eeprom.ops.read, (hw, offset, data), + IXGBE_NOT_IMPLEMENTED); +} + +/** + * ixgbe_read_eeprom_buffer - Read word(s) from EEPROM + * @hw: pointer to hardware structure + * @offset: offset within the EEPROM to be read + * @data: read 16 bit word(s) from EEPROM + * @words: number of words + * + * Reads 16 bit word(s) from EEPROM + **/ +s32 ixgbe_read_eeprom_buffer(struct ixgbe_hw *hw, u16 offset, + u16 words, u16 *data) +{ + return ixgbe_call_func(hw, hw->eeprom.ops.read_buffer, + (hw, offset, words, data), + IXGBE_NOT_IMPLEMENTED); +} + +/** + * ixgbe_validate_eeprom_checksum - Validate EEPROM checksum + * @hw: pointer to hardware structure + * @checksum_val: calculated checksum + * + * Performs checksum calculation and validates the EEPROM checksum + **/ +s32 ixgbe_validate_eeprom_checksum(struct ixgbe_hw *hw, u16 *checksum_val) +{ + return ixgbe_call_func(hw, hw->eeprom.ops.validate_checksum, + (hw, checksum_val), IXGBE_NOT_IMPLEMENTED); +} + +/** + * ixgbe_update_eeprom_checksum - Updates the EEPROM checksum + * @hw: pointer to hardware structure + **/ +s32 ixgbe_update_eeprom_checksum(struct ixgbe_hw *hw) +{ + return ixgbe_call_func(hw, hw->eeprom.ops.update_checksum, (hw), + IXGBE_NOT_IMPLEMENTED); +} + +/** + * ixgbe_insert_mac_addr - Find a RAR for this mac address + * @hw: pointer to hardware structure + * @addr: Address to put into receive address register + * @vmdq: VMDq pool to assign + * + * Puts an ethernet address into a receive address register, or + * finds the rar that it is aleady in; adds to the pool list + **/ +s32 ixgbe_insert_mac_addr(struct ixgbe_hw *hw, u8 *addr, u32 vmdq) +{ + return ixgbe_call_func(hw, hw->mac.ops.insert_mac_addr, + (hw, addr, vmdq), + IXGBE_NOT_IMPLEMENTED); +} + +/** + * ixgbe_set_rar - Set Rx address register + * @hw: pointer to hardware structure + * @index: Receive address register to write + * @addr: Address to put into receive address register + * @vmdq: VMDq "set" + * @enable_addr: set flag that address is active + * + * Puts an ethernet address into a receive address register. + **/ +s32 ixgbe_set_rar(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq, + u32 enable_addr) +{ + return ixgbe_call_func(hw, hw->mac.ops.set_rar, (hw, index, addr, vmdq, + enable_addr), IXGBE_NOT_IMPLEMENTED); +} + +/** + * ixgbe_clear_rar - Clear Rx address register + * @hw: pointer to hardware structure + * @index: Receive address register to write + * + * Puts an ethernet address into a receive address register. + **/ +s32 ixgbe_clear_rar(struct ixgbe_hw *hw, u32 index) +{ + return ixgbe_call_func(hw, hw->mac.ops.clear_rar, (hw, index), + IXGBE_NOT_IMPLEMENTED); +} + +/** + * ixgbe_set_vmdq - Associate a VMDq index with a receive address + * @hw: pointer to hardware structure + * @rar: receive address register index to associate with VMDq index + * @vmdq: VMDq set or pool index + **/ +s32 ixgbe_set_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq) +{ + return ixgbe_call_func(hw, hw->mac.ops.set_vmdq, (hw, rar, vmdq), + IXGBE_NOT_IMPLEMENTED); + +} + +/** + * ixgbe_set_vmdq_san_mac - Associate VMDq index 127 with a receive address + * @hw: pointer to hardware structure + * @vmdq: VMDq default pool index + **/ +s32 ixgbe_set_vmdq_san_mac(struct ixgbe_hw *hw, u32 vmdq) +{ + return ixgbe_call_func(hw, hw->mac.ops.set_vmdq_san_mac, + (hw, vmdq), IXGBE_NOT_IMPLEMENTED); +} + +/** + * ixgbe_clear_vmdq - Disassociate a VMDq index from a receive address + * @hw: pointer to hardware structure + * @rar: receive address register index to disassociate with VMDq index + * @vmdq: VMDq set or pool index + **/ +s32 ixgbe_clear_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq) +{ + return ixgbe_call_func(hw, hw->mac.ops.clear_vmdq, (hw, rar, vmdq), + IXGBE_NOT_IMPLEMENTED); +} + +/** + * ixgbe_init_rx_addrs - Initializes receive address filters. + * @hw: pointer to hardware structure + * + * Places the MAC address in receive address register 0 and clears the rest + * of the receive address registers. Clears the multicast table. Assumes + * the receiver is in reset when the routine is called. + **/ +s32 ixgbe_init_rx_addrs(struct ixgbe_hw *hw) +{ + return ixgbe_call_func(hw, hw->mac.ops.init_rx_addrs, (hw), + IXGBE_NOT_IMPLEMENTED); +} + +/** + * ixgbe_get_num_rx_addrs - Returns the number of RAR entries. + * @hw: pointer to hardware structure + **/ +u32 ixgbe_get_num_rx_addrs(struct ixgbe_hw *hw) +{ + return hw->mac.num_rar_entries; +} + +/** + * ixgbe_update_uc_addr_list - Updates the MAC's list of secondary addresses + * @hw: pointer to hardware structure + * @addr_list: the list of new multicast addresses + * @addr_count: number of addresses + * @func: iterator function to walk the multicast address list + * + * The given list replaces any existing list. Clears the secondary addrs from + * receive address registers. Uses unused receive address registers for the + * first secondary addresses, and falls back to promiscuous mode as needed. + **/ +s32 ixgbe_update_uc_addr_list(struct ixgbe_hw *hw, u8 *addr_list, + u32 addr_count, ixgbe_mc_addr_itr func) +{ + return ixgbe_call_func(hw, hw->mac.ops.update_uc_addr_list, (hw, + addr_list, addr_count, func), + IXGBE_NOT_IMPLEMENTED); +} + +/** + * ixgbe_update_mc_addr_list - Updates the MAC's list of multicast addresses + * @hw: pointer to hardware structure + * @mc_addr_list: the list of new multicast addresses + * @mc_addr_count: number of addresses + * @func: iterator function to walk the multicast address list + * @clear: flag, when set clears the table beforehand + * + * The given list replaces any existing list. Clears the MC addrs from receive + * address registers and the multicast table. Uses unused receive address + * registers for the first multicast addresses, and hashes the rest into the + * multicast table. + **/ +s32 ixgbe_update_mc_addr_list(struct ixgbe_hw *hw, u8 *mc_addr_list, + u32 mc_addr_count, ixgbe_mc_addr_itr func, + bool clear) +{ + return ixgbe_call_func(hw, hw->mac.ops.update_mc_addr_list, (hw, + mc_addr_list, mc_addr_count, func, clear), + IXGBE_NOT_IMPLEMENTED); +} + +/** + * ixgbe_enable_mc - Enable multicast address in RAR + * @hw: pointer to hardware structure + * + * Enables multicast address in RAR and the use of the multicast hash table. + **/ +s32 ixgbe_enable_mc(struct ixgbe_hw *hw) +{ + return ixgbe_call_func(hw, hw->mac.ops.enable_mc, (hw), + IXGBE_NOT_IMPLEMENTED); +} + +/** + * ixgbe_disable_mc - Disable multicast address in RAR + * @hw: pointer to hardware structure + * + * Disables multicast address in RAR and the use of the multicast hash table. + **/ +s32 ixgbe_disable_mc(struct ixgbe_hw *hw) +{ + return ixgbe_call_func(hw, hw->mac.ops.disable_mc, (hw), + IXGBE_NOT_IMPLEMENTED); +} + +/** + * ixgbe_clear_vfta - Clear VLAN filter table + * @hw: pointer to hardware structure + * + * Clears the VLAN filer table, and the VMDq index associated with the filter + **/ +s32 ixgbe_clear_vfta(struct ixgbe_hw *hw) +{ + return ixgbe_call_func(hw, hw->mac.ops.clear_vfta, (hw), + IXGBE_NOT_IMPLEMENTED); +} + +/** + * ixgbe_set_vfta - Set VLAN filter table + * @hw: pointer to hardware structure + * @vlan: VLAN id to write to VLAN filter + * @vind: VMDq output index that maps queue to VLAN id in VLVFB + * @vlan_on: boolean flag to turn on/off VLAN + * @vlvf_bypass: boolean flag indicating updating the default pool is okay + * + * Turn on/off specified VLAN in the VLAN filter table. + **/ +s32 ixgbe_set_vfta(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on, + bool vlvf_bypass) +{ + return ixgbe_call_func(hw, hw->mac.ops.set_vfta, (hw, vlan, vind, + vlan_on, vlvf_bypass), IXGBE_NOT_IMPLEMENTED); +} + +/** + * ixgbe_set_vlvf - Set VLAN Pool Filter + * @hw: pointer to hardware structure + * @vlan: VLAN id to write to VLAN filter + * @vind: VMDq output index that maps queue to VLAN id in VLVFB + * @vlan_on: boolean flag to turn on/off VLAN in VLVF + * @vfta_delta: pointer to the difference between the current value of VFTA + * and the desired value + * @vfta: the desired value of the VFTA + * @vlvf_bypass: boolean flag indicating updating the default pool is okay + * + * Turn on/off specified bit in VLVF table. + **/ +s32 ixgbe_set_vlvf(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on, + u32 *vfta_delta, u32 vfta, bool vlvf_bypass) +{ + return ixgbe_call_func(hw, hw->mac.ops.set_vlvf, (hw, vlan, vind, + vlan_on, vfta_delta, vfta, vlvf_bypass), + IXGBE_NOT_IMPLEMENTED); +} + +/** + * ixgbe_toggle_txdctl - Toggle VF's queues + * @hw: pointer to hardware structure + * @vind: VMDq pool index + * + * Enable and disable each queue in VF. + */ +s32 ixgbe_toggle_txdctl(struct ixgbe_hw *hw, u32 vind) +{ + return ixgbe_call_func(hw, hw->mac.ops.toggle_txdctl, (hw, + vind), IXGBE_NOT_IMPLEMENTED); +} + +/** + * ixgbe_fc_enable - Enable flow control + * @hw: pointer to hardware structure + * + * Configures the flow control settings based on SW configuration. + **/ +s32 ixgbe_fc_enable(struct ixgbe_hw *hw) +{ + return ixgbe_call_func(hw, hw->mac.ops.fc_enable, (hw), + IXGBE_NOT_IMPLEMENTED); +} + +/** + * ixgbe_setup_fc - Set up flow control + * @hw: pointer to hardware structure + * + * Called at init time to set up flow control. + **/ +s32 ixgbe_setup_fc(struct ixgbe_hw *hw) +{ + return ixgbe_call_func(hw, hw->mac.ops.setup_fc, (hw), + IXGBE_NOT_IMPLEMENTED); +} + +/** + * ixgbe_set_fw_drv_ver - Try to send the driver version number FW + * @hw: pointer to hardware structure + * @maj: driver major number to be sent to firmware + * @min: driver minor number to be sent to firmware + * @build: driver build number to be sent to firmware + * @ver: driver version number to be sent to firmware + * @len: length of driver_ver string + * @driver_ver: driver string + **/ +s32 ixgbe_set_fw_drv_ver(struct ixgbe_hw *hw, u8 maj, u8 min, u8 build, + u8 ver, u16 len, char *driver_ver) +{ + return ixgbe_call_func(hw, hw->mac.ops.set_fw_drv_ver, (hw, maj, min, + build, ver, len, driver_ver), + IXGBE_NOT_IMPLEMENTED); +} + +/** + * ixgbe_get_fw_tsam_mode - Returns information whether TSAM is enabled + * @hw: pointer to hardware structure + * + * Checks Thermal Sensor Autonomous Mode by reading the value of the + * dedicated register. + * Returns True if TSAM is enabled, False if TSAM is disabled. + */ +bool ixgbe_get_fw_tsam_mode(struct ixgbe_hw *hw) +{ + if (hw->mac.ops.get_fw_tsam_mode) + return hw->mac.ops.get_fw_tsam_mode(hw); + return false; +} + +/** + * ixgbe_get_thermal_sensor_data - Gathers thermal sensor data + * @hw: pointer to hardware structure + * + * Updates the temperatures in mac.thermal_sensor_data + **/ +s32 ixgbe_get_thermal_sensor_data(struct ixgbe_hw *hw) +{ + return ixgbe_call_func(hw, hw->mac.ops.get_thermal_sensor_data, (hw), + IXGBE_NOT_IMPLEMENTED); +} + +/** + * ixgbe_init_thermal_sensor_thresh - Inits thermal sensor thresholds + * @hw: pointer to hardware structure + * + * Inits the thermal sensor thresholds according to the NVM map + **/ +s32 ixgbe_init_thermal_sensor_thresh(struct ixgbe_hw *hw) +{ + return ixgbe_call_func(hw, hw->mac.ops.init_thermal_sensor_thresh, (hw), + IXGBE_NOT_IMPLEMENTED); +} + +/** + * ixgbe_dmac_config - Configure DMA Coalescing registers. + * @hw: pointer to hardware structure + * + * Configure DMA coalescing. If enabling dmac, dmac is activated. + * When disabling dmac, dmac enable dmac bit is cleared. + **/ +s32 ixgbe_dmac_config(struct ixgbe_hw *hw) +{ + return ixgbe_call_func(hw, hw->mac.ops.dmac_config, (hw), + IXGBE_NOT_IMPLEMENTED); +} + +/** + * ixgbe_dmac_update_tcs - Configure DMA Coalescing registers. + * @hw: pointer to hardware structure + * + * Disables dmac, updates per TC settings, and then enable dmac. + **/ +s32 ixgbe_dmac_update_tcs(struct ixgbe_hw *hw) +{ + return ixgbe_call_func(hw, hw->mac.ops.dmac_update_tcs, (hw), + IXGBE_NOT_IMPLEMENTED); +} + +/** + * ixgbe_dmac_config_tcs - Configure DMA Coalescing registers. + * @hw: pointer to hardware structure + * + * Configure DMA coalescing threshold per TC and set high priority bit for + * FCOE TC. The dmac enable bit must be cleared before configuring. + **/ +s32 ixgbe_dmac_config_tcs(struct ixgbe_hw *hw) +{ + return ixgbe_call_func(hw, hw->mac.ops.dmac_config_tcs, (hw), + IXGBE_NOT_IMPLEMENTED); +} + +/** + * ixgbe_setup_eee - Enable/disable EEE support + * @hw: pointer to the HW structure + * @enable_eee: boolean flag to enable EEE + * + * Enable/disable EEE based on enable_ee flag. + * Auto-negotiation must be started after BASE-T EEE bits in PHY register 7.3C + * are modified. + * + **/ +s32 ixgbe_setup_eee(struct ixgbe_hw *hw, bool enable_eee) +{ + return ixgbe_call_func(hw, hw->mac.ops.setup_eee, (hw, enable_eee), + IXGBE_NOT_IMPLEMENTED); +} + +/** + * ixgbe_set_source_address_pruning - Enable/Disable source address pruning + * @hw: pointer to hardware structure + * @enable: enable or disable source address pruning + * @pool: Rx pool - Rx pool to toggle source address pruning + **/ +void ixgbe_set_source_address_pruning(struct ixgbe_hw *hw, bool enable, + unsigned int pool) +{ + if (hw->mac.ops.set_source_address_pruning) + hw->mac.ops.set_source_address_pruning(hw, enable, pool); +} + +/** + * ixgbe_set_ethertype_anti_spoofing - Enable/Disable Ethertype anti-spoofing + * @hw: pointer to hardware structure + * @enable: enable or disable switch for Ethertype anti-spoofing + * @vf: Virtual Function pool - VF Pool to set for Ethertype anti-spoofing + * + **/ +void ixgbe_set_ethertype_anti_spoofing(struct ixgbe_hw *hw, bool enable, int vf) +{ + if (hw->mac.ops.set_ethertype_anti_spoofing) + hw->mac.ops.set_ethertype_anti_spoofing(hw, enable, vf); +} + +/** + * ixgbe_read_iosf_sb_reg - Read 32 bit PHY register + * @hw: pointer to hardware structure + * @reg_addr: 32 bit address of PHY register to read + * @device_type: type of device you want to communicate with + * @phy_data: Pointer to read data from PHY register + * + * Reads a value from a specified PHY register + **/ +s32 ixgbe_read_iosf_sb_reg(struct ixgbe_hw *hw, u32 reg_addr, + u32 device_type, u32 *phy_data) +{ + return ixgbe_call_func(hw, hw->mac.ops.read_iosf_sb_reg, (hw, reg_addr, + device_type, phy_data), IXGBE_NOT_IMPLEMENTED); +} + +/** + * ixgbe_write_iosf_sb_reg - Write 32 bit register through IOSF Sideband + * @hw: pointer to hardware structure + * @reg_addr: 32 bit PHY register to write + * @device_type: type of device you want to communicate with + * @phy_data: Data to write to the PHY register + * + * Writes a value to specified PHY register + **/ +s32 ixgbe_write_iosf_sb_reg(struct ixgbe_hw *hw, u32 reg_addr, + u32 device_type, u32 phy_data) +{ + return ixgbe_call_func(hw, hw->mac.ops.write_iosf_sb_reg, (hw, reg_addr, + device_type, phy_data), IXGBE_NOT_IMPLEMENTED); +} + +/** + * ixgbe_disable_mdd - Disable malicious driver detection + * @hw: pointer to hardware structure + * + **/ +void ixgbe_disable_mdd(struct ixgbe_hw *hw) +{ + if (hw->mac.ops.disable_mdd) + hw->mac.ops.disable_mdd(hw); +} + +/** + * ixgbe_enable_mdd - Enable malicious driver detection + * @hw: pointer to hardware structure + * + **/ +void ixgbe_enable_mdd(struct ixgbe_hw *hw) +{ + if (hw->mac.ops.enable_mdd) + hw->mac.ops.enable_mdd(hw); +} + +/** + * ixgbe_mdd_event - Handle malicious driver detection event + * @hw: pointer to hardware structure + * @vf_bitmap: vf bitmap of malicious vfs + * + **/ +void ixgbe_mdd_event(struct ixgbe_hw *hw, u32 *vf_bitmap) +{ + if (hw->mac.ops.mdd_event) + hw->mac.ops.mdd_event(hw, vf_bitmap); +} + +/** + * ixgbe_restore_mdd_vf - Restore VF that was disabled during malicious driver + * detection event + * @hw: pointer to hardware structure + * @vf: vf index + * + **/ +void ixgbe_restore_mdd_vf(struct ixgbe_hw *hw, u32 vf) +{ + if (hw->mac.ops.restore_mdd_vf) + hw->mac.ops.restore_mdd_vf(hw, vf); +} + +/** + * ixgbe_fw_recovery_mode - Check if in FW NVM recovery mode + * @hw: pointer to hardware structure + * + **/ +bool ixgbe_fw_recovery_mode(struct ixgbe_hw *hw) +{ + if (hw->mac.ops.fw_recovery_mode) + return hw->mac.ops.fw_recovery_mode(hw); + return false; +} + +/** + * ixgbe_fw_rollback_mode - Check if in FW NVM rollback mode + * @hw: pointer to hardware structure + * + * Return: true if the FW NVM is in rollback mode, otherwise false. + */ +bool ixgbe_fw_rollback_mode(struct ixgbe_hw *hw) +{ + if (hw->mac.ops.fw_rollback_mode) + return hw->mac.ops.fw_rollback_mode(hw); + return false; +} + +/** + * ixgbe_enter_lplu - Transition to low power states + * @hw: pointer to hardware structure + * + * Configures Low Power Link Up on transition to low power states + * (from D0 to non-D0). + **/ +s32 ixgbe_enter_lplu(struct ixgbe_hw *hw) +{ + return ixgbe_call_func(hw, hw->phy.ops.enter_lplu, (hw), + IXGBE_NOT_IMPLEMENTED); +} + +/** + * ixgbe_handle_lasi - Handle external Base T PHY interrupt + * @hw: pointer to hardware structure + * + * Handle external Base T PHY interrupt. If high temperature + * failure alarm then return error, else if link status change + * then setup internal/external PHY link + * + * Return IXGBE_ERR_OVERTEMP if interrupt is high temperature + * failure alarm, else return PHY access status. + */ +s32 ixgbe_handle_lasi(struct ixgbe_hw *hw) +{ + return ixgbe_call_func(hw, hw->phy.ops.handle_lasi, (hw), + IXGBE_NOT_IMPLEMENTED); +} + +/** + * ixgbe_read_analog_reg8 - Reads 8 bit analog register + * @hw: pointer to hardware structure + * @reg: analog register to read + * @val: read value + * + * Performs write operation to analog register specified. + **/ +s32 ixgbe_read_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 *val) +{ + return ixgbe_call_func(hw, hw->mac.ops.read_analog_reg8, (hw, reg, + val), IXGBE_NOT_IMPLEMENTED); +} + +/** + * ixgbe_write_analog_reg8 - Writes 8 bit analog register + * @hw: pointer to hardware structure + * @reg: analog register to write + * @val: value to write + * + * Performs write operation to Atlas analog register specified. + **/ +s32 ixgbe_write_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 val) +{ + return ixgbe_call_func(hw, hw->mac.ops.write_analog_reg8, (hw, reg, + val), IXGBE_NOT_IMPLEMENTED); +} + +/** + * ixgbe_init_uta_tables - Initializes Unicast Table Arrays. + * @hw: pointer to hardware structure + * + * Initializes the Unicast Table Arrays to zero on device load. This + * is part of the Rx init addr execution path. + **/ +s32 ixgbe_init_uta_tables(struct ixgbe_hw *hw) +{ + return ixgbe_call_func(hw, hw->mac.ops.init_uta_tables, (hw), + IXGBE_NOT_IMPLEMENTED); +} + +/** + * ixgbe_read_i2c_byte - Reads 8 bit word over I2C at specified device address + * @hw: pointer to hardware structure + * @byte_offset: byte offset to read + * @dev_addr: I2C bus address to read from + * @data: value read + * + * Performs byte read operation to SFP module's EEPROM over I2C interface. + **/ +s32 ixgbe_read_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr, + u8 *data) +{ + return ixgbe_call_func(hw, hw->phy.ops.read_i2c_byte, (hw, byte_offset, + dev_addr, data), IXGBE_NOT_IMPLEMENTED); +} + +/** + * ixgbe_read_i2c_byte_unlocked - Reads 8 bit word via I2C from device address + * @hw: pointer to hardware structure + * @byte_offset: byte offset to read + * @dev_addr: I2C bus address to read from + * @data: value read + * + * Performs byte read operation to SFP module's EEPROM over I2C interface. + **/ +s32 ixgbe_read_i2c_byte_unlocked(struct ixgbe_hw *hw, u8 byte_offset, + u8 dev_addr, u8 *data) +{ + return ixgbe_call_func(hw, hw->phy.ops.read_i2c_byte_unlocked, + (hw, byte_offset, dev_addr, data), + IXGBE_NOT_IMPLEMENTED); +} + +/** + * ixgbe_read_link - Perform read operation on link device + * @hw: pointer to the hardware structure + * @addr: bus address to read from + * @reg: device register to read from + * @val: pointer to location to receive read value + * + * Returns an error code on error. + */ +s32 ixgbe_read_link(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 *val) +{ + return ixgbe_call_func(hw, hw->link.ops.read_link, (hw, addr, + reg, val), IXGBE_NOT_IMPLEMENTED); +} + +/** + * ixgbe_read_link_unlocked - Perform read operation on link device + * @hw: pointer to the hardware structure + * @addr: bus address to read from + * @reg: device register to read from + * @val: pointer to location to receive read value + * + * Returns an error code on error. + **/ +s32 ixgbe_read_link_unlocked(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 *val) +{ + return ixgbe_call_func(hw, hw->link.ops.read_link_unlocked, + (hw, addr, reg, val), IXGBE_NOT_IMPLEMENTED); +} + +/** + * ixgbe_write_i2c_byte - Writes 8 bit word over I2C + * @hw: pointer to hardware structure + * @byte_offset: byte offset to write + * @dev_addr: I2C bus address to write to + * @data: value to write + * + * Performs byte write operation to SFP module's EEPROM over I2C interface + * at a specified device address. + **/ +s32 ixgbe_write_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr, + u8 data) +{ + return ixgbe_call_func(hw, hw->phy.ops.write_i2c_byte, (hw, byte_offset, + dev_addr, data), IXGBE_NOT_IMPLEMENTED); +} + +/** + * ixgbe_write_i2c_byte_unlocked - Writes 8 bit word over I2C + * @hw: pointer to hardware structure + * @byte_offset: byte offset to write + * @dev_addr: I2C bus address to write to + * @data: value to write + * + * Performs byte write operation to SFP module's EEPROM over I2C interface + * at a specified device address. + **/ +s32 ixgbe_write_i2c_byte_unlocked(struct ixgbe_hw *hw, u8 byte_offset, + u8 dev_addr, u8 data) +{ + return ixgbe_call_func(hw, hw->phy.ops.write_i2c_byte_unlocked, + (hw, byte_offset, dev_addr, data), + IXGBE_NOT_IMPLEMENTED); +} + +/** + * ixgbe_write_link - Perform write operation on link device + * @hw: pointer to the hardware structure + * @addr: bus address to write to + * @reg: device register to write to + * @val: value to write + * + * Returns an error code on error. + */ +s32 ixgbe_write_link(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 val) +{ + return ixgbe_call_func(hw, hw->link.ops.write_link, + (hw, addr, reg, val), IXGBE_NOT_IMPLEMENTED); +} + +/** + * ixgbe_write_link_unlocked - Perform write operation on link device + * @hw: pointer to the hardware structure + * @addr: bus address to write to + * @reg: device register to write to + * @val: value to write + * + * Returns an error code on error. + **/ +s32 ixgbe_write_link_unlocked(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 val) +{ + return ixgbe_call_func(hw, hw->link.ops.write_link_unlocked, + (hw, addr, reg, val), IXGBE_NOT_IMPLEMENTED); +} + +/** + * ixgbe_write_i2c_eeprom - Writes 8 bit EEPROM word over I2C interface + * @hw: pointer to hardware structure + * @byte_offset: EEPROM byte offset to write + * @eeprom_data: value to write + * + * Performs byte write operation to SFP module's EEPROM over I2C interface. + **/ +s32 ixgbe_write_i2c_eeprom(struct ixgbe_hw *hw, + u8 byte_offset, u8 eeprom_data) +{ + return ixgbe_call_func(hw, hw->phy.ops.write_i2c_eeprom, + (hw, byte_offset, eeprom_data), + IXGBE_NOT_IMPLEMENTED); +} + +/** + * ixgbe_read_i2c_eeprom - Reads 8 bit EEPROM word over I2C interface + * @hw: pointer to hardware structure + * @byte_offset: EEPROM byte offset to read + * @eeprom_data: value read + * + * Performs byte read operation to SFP module's EEPROM over I2C interface. + **/ +s32 ixgbe_read_i2c_eeprom(struct ixgbe_hw *hw, u8 byte_offset, u8 *eeprom_data) +{ + return ixgbe_call_func(hw, hw->phy.ops.read_i2c_eeprom, + (hw, byte_offset, eeprom_data), + IXGBE_NOT_IMPLEMENTED); +} + +/** + * ixgbe_get_supported_physical_layer - Returns physical layer type + * @hw: pointer to hardware structure + * + * Determines physical layer capabilities of the current configuration. + **/ +u64 ixgbe_get_supported_physical_layer(struct ixgbe_hw *hw) +{ + return ixgbe_call_func(hw, hw->mac.ops.get_supported_physical_layer, + (hw), IXGBE_PHYSICAL_LAYER_UNKNOWN); +} + +/** + * ixgbe_enable_rx_dma - Enables Rx DMA unit, dependent on device specifics + * @hw: pointer to hardware structure + * @regval: bitfield to write to the Rx DMA register + * + * Enables the Rx DMA unit of the device. + **/ +s32 ixgbe_enable_rx_dma(struct ixgbe_hw *hw, u32 regval) +{ + return ixgbe_call_func(hw, hw->mac.ops.enable_rx_dma, + (hw, regval), IXGBE_NOT_IMPLEMENTED); +} + +/** + * ixgbe_disable_sec_rx_path - Stops the receive data path + * @hw: pointer to hardware structure + * + * Stops the receive data path. + **/ +s32 ixgbe_disable_sec_rx_path(struct ixgbe_hw *hw) +{ + return ixgbe_call_func(hw, hw->mac.ops.disable_sec_rx_path, + (hw), IXGBE_NOT_IMPLEMENTED); +} + +/** + * ixgbe_enable_sec_rx_path - Enables the receive data path + * @hw: pointer to hardware structure + * + * Enables the receive data path. + **/ +s32 ixgbe_enable_sec_rx_path(struct ixgbe_hw *hw) +{ + return ixgbe_call_func(hw, hw->mac.ops.enable_sec_rx_path, + (hw), IXGBE_NOT_IMPLEMENTED); +} + +/** + * ixgbe_acquire_swfw_semaphore - Acquire SWFW semaphore + * @hw: pointer to hardware structure + * @mask: Mask to specify which semaphore to acquire + * + * Acquires the SWFW semaphore through SW_FW_SYNC register for the specified + * function (CSR, PHY0, PHY1, EEPROM, Flash) + **/ +s32 ixgbe_acquire_swfw_semaphore(struct ixgbe_hw *hw, u32 mask) +{ + return ixgbe_call_func(hw, hw->mac.ops.acquire_swfw_sync, + (hw, mask), IXGBE_NOT_IMPLEMENTED); +} + +/** + * ixgbe_release_swfw_semaphore - Release SWFW semaphore + * @hw: pointer to hardware structure + * @mask: Mask to specify which semaphore to release + * + * Releases the SWFW semaphore through SW_FW_SYNC register for the specified + * function (CSR, PHY0, PHY1, EEPROM, Flash) + **/ +void ixgbe_release_swfw_semaphore(struct ixgbe_hw *hw, u32 mask) +{ + if (hw->mac.ops.release_swfw_sync) + hw->mac.ops.release_swfw_sync(hw, mask); +} + +/** + * ixgbe_init_swfw_semaphore - Clean up SWFW semaphore + * @hw: pointer to hardware structure + * + * Attempts to acquire the SWFW semaphore through SW_FW_SYNC register. + * Regardless of whether is succeeds or not it then release the semaphore. + * This is function is called to recover from catastrophic failures that + * may have left the semaphore locked. + **/ +void ixgbe_init_swfw_semaphore(struct ixgbe_hw *hw) +{ + if (hw->mac.ops.init_swfw_sync) + hw->mac.ops.init_swfw_sync(hw); +} + +void ixgbe_disable_rx(struct ixgbe_hw *hw) +{ + if (hw->mac.ops.disable_rx) + hw->mac.ops.disable_rx(hw); +} + +void ixgbe_enable_rx(struct ixgbe_hw *hw) +{ + if (hw->mac.ops.enable_rx) + hw->mac.ops.enable_rx(hw); +} + +/** + * ixgbe_set_rate_select_speed - Set module link speed + * @hw: pointer to hardware structure + * @speed: link speed to set + * + * Set module link speed via the rate select. + */ +void ixgbe_set_rate_select_speed(struct ixgbe_hw *hw, ixgbe_link_speed speed) +{ + if (hw->mac.ops.set_rate_select_speed) + hw->mac.ops.set_rate_select_speed(hw, speed); +} + +/** + * ixgbe_get_fw_version - get FW version + * @hw: pointer to hardware structure + * + * Get the current FW version. + * + * Return: the exit code of the operation or IXGBE_NOT_IMPLEMENTED + * if the function is not implemented. + */ +s32 ixgbe_get_fw_version(struct ixgbe_hw *hw) +{ + return ixgbe_call_func(hw, hw->mac.ops.get_fw_version, + (hw), IXGBE_NOT_IMPLEMENTED); +} + +/** + * ixgbe_get_nvm_ver - get NVM version + * @hw: pointer to hardware structure + * @nvm: pointer to NVM info structure + * + * Get the current NVM version. + * + * Return: the exit code of the operation or IXGBE_NOT_IMPLEMENTED + * if the function is not implemented. + */ +s32 ixgbe_get_nvm_ver(struct ixgbe_hw* hw, struct ixgbe_nvm_info *nvm) +{ + return ixgbe_call_func(hw, hw->mac.ops.get_nvm_version, + (hw, nvm), IXGBE_NOT_IMPLEMENTED); +} diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_api.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_api.h new file mode 100644 index 00000000000..6e92eff8fff --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_api.h @@ -0,0 +1,197 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 1999 - 2026 Intel Corporation */ + +#ifndef _IXGBE_API_H_ +#define _IXGBE_API_H_ + +#include "ixgbe_type.h" + +void ixgbe_dcb_get_rtrup2tc(struct ixgbe_hw *hw, u8 *map); + +s32 ixgbe_init_shared_code(struct ixgbe_hw *hw); + +extern s32 ixgbe_init_ops_82598(struct ixgbe_hw *hw); +extern s32 ixgbe_init_ops_82599(struct ixgbe_hw *hw); +extern s32 ixgbe_init_ops_X540(struct ixgbe_hw *hw); +extern s32 ixgbe_init_ops_X550(struct ixgbe_hw *hw); +extern s32 ixgbe_init_ops_X550EM(struct ixgbe_hw *hw); +extern s32 ixgbe_init_ops_X550EM_x(struct ixgbe_hw *hw); +extern s32 ixgbe_init_ops_X550EM_a(struct ixgbe_hw *hw); +extern s32 ixgbe_init_ops_E610(struct ixgbe_hw *hw); + +s32 ixgbe_set_mac_type(struct ixgbe_hw *hw); +s32 ixgbe_init_hw(struct ixgbe_hw *hw); +s32 ixgbe_reset_hw(struct ixgbe_hw *hw); +s32 ixgbe_start_hw(struct ixgbe_hw *hw); +s32 ixgbe_clear_hw_cntrs(struct ixgbe_hw *hw); +enum ixgbe_media_type ixgbe_get_media_type(struct ixgbe_hw *hw); +s32 ixgbe_get_mac_addr(struct ixgbe_hw *hw, u8 *mac_addr); +s32 ixgbe_get_bus_info(struct ixgbe_hw *hw); +u32 ixgbe_get_num_of_tx_queues(struct ixgbe_hw *hw); +u32 ixgbe_get_num_of_rx_queues(struct ixgbe_hw *hw); +s32 ixgbe_stop_adapter(struct ixgbe_hw *hw); +s32 ixgbe_read_pba_string(struct ixgbe_hw *hw, u8 *pba_num, u32 pba_num_size); + +s32 ixgbe_identify_phy(struct ixgbe_hw *hw); +s32 ixgbe_reset_phy(struct ixgbe_hw *hw); +s32 ixgbe_read_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, + u16 *phy_data); +s32 ixgbe_write_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, + u16 phy_data); + +s32 ixgbe_setup_phy_link(struct ixgbe_hw *hw); +s32 ixgbe_setup_internal_phy(struct ixgbe_hw *hw); +s32 ixgbe_check_phy_link(struct ixgbe_hw *hw, + ixgbe_link_speed *speed, + bool *link_up); +s32 ixgbe_setup_phy_link_speed(struct ixgbe_hw *hw, + ixgbe_link_speed speed, + bool autoneg_wait_to_complete); +s32 ixgbe_set_phy_power(struct ixgbe_hw *, bool on); +void ixgbe_disable_tx_laser(struct ixgbe_hw *hw); +void ixgbe_enable_tx_laser(struct ixgbe_hw *hw); +void ixgbe_flap_tx_laser(struct ixgbe_hw *hw); +s32 ixgbe_setup_link(struct ixgbe_hw *hw, ixgbe_link_speed speed, + bool autoneg_wait_to_complete); +s32 ixgbe_setup_mac_link(struct ixgbe_hw *hw, ixgbe_link_speed speed, + bool autoneg_wait_to_complete); +s32 ixgbe_check_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed, + bool *link_up, bool link_up_wait_to_complete); +s32 ixgbe_get_link_capabilities(struct ixgbe_hw *hw, ixgbe_link_speed *speed, + bool *autoneg); +s32 ixgbe_led_on(struct ixgbe_hw *hw, u32 index); +s32 ixgbe_led_off(struct ixgbe_hw *hw, u32 index); +s32 ixgbe_blink_led_start(struct ixgbe_hw *hw, u32 index); +s32 ixgbe_blink_led_stop(struct ixgbe_hw *hw, u32 index); + +s32 ixgbe_init_eeprom_params(struct ixgbe_hw *hw); +s32 ixgbe_write_eeprom(struct ixgbe_hw *hw, u16 offset, u16 data); +s32 ixgbe_write_eeprom_buffer(struct ixgbe_hw *hw, u16 offset, + u16 words, u16 *data); +s32 ixgbe_read_eeprom(struct ixgbe_hw *hw, u16 offset, u16 *data); +s32 ixgbe_read_eeprom_buffer(struct ixgbe_hw *hw, u16 offset, + u16 words, u16 *data); + +s32 ixgbe_validate_eeprom_checksum(struct ixgbe_hw *hw, u16 *checksum_val); +s32 ixgbe_update_eeprom_checksum(struct ixgbe_hw *hw); + +s32 ixgbe_insert_mac_addr(struct ixgbe_hw *hw, u8 *addr, u32 vmdq); +s32 ixgbe_set_rar(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq, + u32 enable_addr); +s32 ixgbe_clear_rar(struct ixgbe_hw *hw, u32 index); +s32 ixgbe_set_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq); +s32 ixgbe_set_vmdq_san_mac(struct ixgbe_hw *hw, u32 vmdq); +s32 ixgbe_clear_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq); +s32 ixgbe_init_rx_addrs(struct ixgbe_hw *hw); +u32 ixgbe_get_num_rx_addrs(struct ixgbe_hw *hw); +s32 ixgbe_update_uc_addr_list(struct ixgbe_hw *hw, u8 *addr_list, + u32 addr_count, ixgbe_mc_addr_itr func); +s32 ixgbe_update_mc_addr_list(struct ixgbe_hw *hw, u8 *mc_addr_list, + u32 mc_addr_count, ixgbe_mc_addr_itr func, + bool clear); +void ixgbe_add_uc_addr(struct ixgbe_hw *hw, u8 *addr_list, u32 vmdq); +s32 ixgbe_enable_mc(struct ixgbe_hw *hw); +s32 ixgbe_disable_mc(struct ixgbe_hw *hw); +s32 ixgbe_clear_vfta(struct ixgbe_hw *hw); +s32 ixgbe_set_vfta(struct ixgbe_hw *hw, u32 vlan, + u32 vind, bool vlan_on, bool vlvf_bypass); +s32 ixgbe_set_vlvf(struct ixgbe_hw *hw, u32 vlan, u32 vind, + bool vlan_on, u32 *vfta_delta, u32 vfta, + bool vlvf_bypass); +s32 ixgbe_toggle_txdctl(struct ixgbe_hw *hw, u32 vind); +s32 ixgbe_fc_enable(struct ixgbe_hw *hw); +s32 ixgbe_setup_fc(struct ixgbe_hw *hw); +s32 ixgbe_set_fw_drv_ver(struct ixgbe_hw *hw, u8 maj, u8 min, u8 build, + u8 ver, u16 len, char *driver_ver); +bool ixgbe_get_fw_tsam_mode(struct ixgbe_hw *hw); +s32 ixgbe_get_thermal_sensor_data(struct ixgbe_hw *hw); +s32 ixgbe_init_thermal_sensor_thresh(struct ixgbe_hw *hw); +void ixgbe_set_mta(struct ixgbe_hw *hw, u8 *mc_addr); +s32 ixgbe_get_phy_firmware_version(struct ixgbe_hw *hw, + u16 *firmware_version); +s32 ixgbe_read_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 *val); +s32 ixgbe_write_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 val); +s32 ixgbe_init_uta_tables(struct ixgbe_hw *hw); +s32 ixgbe_read_i2c_eeprom(struct ixgbe_hw *hw, u8 byte_offset, u8 *eeprom_data); +u64 ixgbe_get_supported_physical_layer(struct ixgbe_hw *hw); +s32 ixgbe_enable_rx_dma(struct ixgbe_hw *hw, u32 regval); +s32 ixgbe_disable_sec_rx_path(struct ixgbe_hw *hw); +s32 ixgbe_enable_sec_rx_path(struct ixgbe_hw *hw); +s32 ixgbe_reinit_fdir_tables_82599(struct ixgbe_hw *hw); +s32 ixgbe_init_fdir_signature_82599(struct ixgbe_hw *hw, u32 fdirctrl); +s32 ixgbe_init_fdir_perfect_82599(struct ixgbe_hw *hw, u32 fdirctrl, + bool cloud_mode); +void ixgbe_fdir_add_signature_filter_82599(struct ixgbe_hw *hw, + union ixgbe_atr_hash_dword input, + union ixgbe_atr_hash_dword common, + u8 queue); +s32 ixgbe_fdir_set_input_mask_82599(struct ixgbe_hw *hw, + union ixgbe_atr_input *input_mask, bool cloud_mode); +s32 ixgbe_fdir_write_perfect_filter_82599(struct ixgbe_hw *hw, + union ixgbe_atr_input *input, + u16 soft_id, u8 queue, bool cloud_mode); +s32 ixgbe_fdir_erase_perfect_filter_82599(struct ixgbe_hw *hw, + union ixgbe_atr_input *input, + u16 soft_id); +s32 ixgbe_fdir_add_perfect_filter_82599(struct ixgbe_hw *hw, + union ixgbe_atr_input *input, + union ixgbe_atr_input *mask, + u16 soft_id, + u8 queue, + bool cloud_mode); +void ixgbe_atr_compute_perfect_hash_82599(union ixgbe_atr_input *input, + union ixgbe_atr_input *mask); +u32 ixgbe_atr_compute_sig_hash_82599(union ixgbe_atr_hash_dword input, + union ixgbe_atr_hash_dword common); +bool ixgbe_verify_lesm_fw_enabled_82599(struct ixgbe_hw *hw); +s32 ixgbe_read_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr, + u8 *data); +s32 ixgbe_read_i2c_byte_unlocked(struct ixgbe_hw *hw, u8 byte_offset, + u8 dev_addr, u8 *data); +s32 ixgbe_read_link(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 *val); +s32 ixgbe_read_link_unlocked(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 *val); +s32 ixgbe_write_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr, + u8 data); +void ixgbe_set_fdir_drop_queue_82599(struct ixgbe_hw *hw, u8 dropqueue); +s32 ixgbe_write_i2c_byte_unlocked(struct ixgbe_hw *hw, u8 byte_offset, + u8 dev_addr, u8 data); +s32 ixgbe_write_link(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 val); +s32 ixgbe_write_link_unlocked(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 val); +s32 ixgbe_write_i2c_eeprom(struct ixgbe_hw *hw, u8 byte_offset, u8 eeprom_data); +s32 ixgbe_get_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr); +s32 ixgbe_set_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr); +s32 ixgbe_get_device_caps(struct ixgbe_hw *hw, u16 *device_caps); +s32 ixgbe_acquire_swfw_semaphore(struct ixgbe_hw *hw, u32 mask); +void ixgbe_release_swfw_semaphore(struct ixgbe_hw *hw, u32 mask); +void ixgbe_init_swfw_semaphore(struct ixgbe_hw *hw); +s32 ixgbe_get_wwn_prefix(struct ixgbe_hw *hw, u16 *wwnn_prefix, + u16 *wwpn_prefix); +s32 ixgbe_get_fcoe_boot_status(struct ixgbe_hw *hw, u16 *bs); +s32 ixgbe_dmac_config(struct ixgbe_hw *hw); +s32 ixgbe_dmac_update_tcs(struct ixgbe_hw *hw); +s32 ixgbe_dmac_config_tcs(struct ixgbe_hw *hw); +s32 ixgbe_setup_eee(struct ixgbe_hw *hw, bool enable_eee); +void ixgbe_set_source_address_pruning(struct ixgbe_hw *hw, bool enable, + unsigned int vf); +void ixgbe_set_ethertype_anti_spoofing(struct ixgbe_hw *hw, bool enable, + int vf); +s32 ixgbe_read_iosf_sb_reg(struct ixgbe_hw *hw, u32 reg_addr, + u32 device_type, u32 *phy_data); +s32 ixgbe_write_iosf_sb_reg(struct ixgbe_hw *hw, u32 reg_addr, + u32 device_type, u32 phy_data); +void ixgbe_disable_mdd(struct ixgbe_hw *hw); +void ixgbe_enable_mdd(struct ixgbe_hw *hw); +void ixgbe_mdd_event(struct ixgbe_hw *hw, u32 *vf_bitmap); +void ixgbe_restore_mdd_vf(struct ixgbe_hw *hw, u32 vf); +bool ixgbe_fw_recovery_mode(struct ixgbe_hw *hw); +bool ixgbe_fw_rollback_mode(struct ixgbe_hw *hw); +s32 ixgbe_enter_lplu(struct ixgbe_hw *hw); +s32 ixgbe_handle_lasi(struct ixgbe_hw *hw); +void ixgbe_set_rate_select_speed(struct ixgbe_hw *hw, ixgbe_link_speed speed); +void ixgbe_disable_rx(struct ixgbe_hw *hw); +void ixgbe_enable_rx(struct ixgbe_hw *hw); +s32 ixgbe_negotiate_fc(struct ixgbe_hw *hw, u32 adv_reg, u32 lp_reg, + u32 adv_sym, u32 adv_asm, u32 lp_sym, u32 lp_asm); +s32 ixgbe_get_fw_version(struct ixgbe_hw *hw); +s32 ixgbe_get_nvm_ver(struct ixgbe_hw *hw, struct ixgbe_nvm_info *nvm); +#endif /* _IXGBE_API_H_ */ diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_common.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_common.c new file mode 100644 index 00000000000..33918d20bed --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_common.c @@ -0,0 +1,5239 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 1999 - 2026 Intel Corporation */ + +#include "ixgbe_common.h" +#include "ixgbe_phy.h" +#include "ixgbe_dcb.h" +#include "ixgbe_dcb_82599.h" +#include "ixgbe_api.h" + +STATIC s32 ixgbe_acquire_eeprom(struct ixgbe_hw *hw); +STATIC s32 ixgbe_get_eeprom_semaphore(struct ixgbe_hw *hw); +STATIC void ixgbe_release_eeprom_semaphore(struct ixgbe_hw *hw); +STATIC s32 ixgbe_ready_eeprom(struct ixgbe_hw *hw); +STATIC void ixgbe_standby_eeprom(struct ixgbe_hw *hw); +STATIC void ixgbe_shift_out_eeprom_bits(struct ixgbe_hw *hw, u16 data, + u16 count); +STATIC u16 ixgbe_shift_in_eeprom_bits(struct ixgbe_hw *hw, u16 count); +STATIC void ixgbe_raise_eeprom_clk(struct ixgbe_hw *hw, u32 *eec); +STATIC void ixgbe_lower_eeprom_clk(struct ixgbe_hw *hw, u32 *eec); +STATIC void ixgbe_release_eeprom(struct ixgbe_hw *hw); + +STATIC s32 ixgbe_mta_vector(struct ixgbe_hw *hw, u8 *mc_addr); +STATIC s32 ixgbe_get_san_mac_addr_offset(struct ixgbe_hw *hw, + u16 *san_mac_offset); +STATIC s32 ixgbe_read_eeprom_buffer_bit_bang(struct ixgbe_hw *hw, u16 offset, + u16 words, u16 *data); +STATIC s32 ixgbe_write_eeprom_buffer_bit_bang(struct ixgbe_hw *hw, u16 offset, + u16 words, u16 *data); +STATIC s32 ixgbe_detect_eeprom_page_size_generic(struct ixgbe_hw *hw, + u16 offset); + +/** + * ixgbe_init_ops_generic - Inits function ptrs + * @hw: pointer to the hardware structure + * + * Initialize the function pointers. + **/ +s32 ixgbe_init_ops_generic(struct ixgbe_hw *hw) +{ + struct ixgbe_eeprom_info *eeprom = &hw->eeprom; + struct ixgbe_mac_info *mac = &hw->mac; + u32 eec = IXGBE_READ_REG(hw, IXGBE_EEC_BY_MAC(hw)); + + DEBUGFUNC("ixgbe_init_ops_generic"); + + /* EEPROM */ + eeprom->ops.init_params = ixgbe_init_eeprom_params_generic; + /* If EEPROM is valid (bit 8 = 1), use EERD otherwise use bit bang */ + if (eec & IXGBE_EEC_PRES) { + eeprom->ops.read = ixgbe_read_eerd_generic; + eeprom->ops.read_buffer = ixgbe_read_eerd_buffer_generic; + } else { + eeprom->ops.read = ixgbe_read_eeprom_bit_bang_generic; + eeprom->ops.read_buffer = + ixgbe_read_eeprom_buffer_bit_bang_generic; + } + eeprom->ops.write = ixgbe_write_eeprom_generic; + eeprom->ops.write_buffer = ixgbe_write_eeprom_buffer_bit_bang_generic; + eeprom->ops.validate_checksum = + ixgbe_validate_eeprom_checksum_generic; + eeprom->ops.update_checksum = ixgbe_update_eeprom_checksum_generic; + eeprom->ops.calc_checksum = ixgbe_calc_eeprom_checksum_generic; + eeprom->ops.read_pba_string = ixgbe_read_pba_string_generic; + + /* MAC */ + mac->ops.init_hw = ixgbe_init_hw_generic; + mac->ops.reset_hw = NULL; + mac->ops.start_hw = ixgbe_start_hw_generic; + mac->ops.clear_hw_cntrs = ixgbe_clear_hw_cntrs_generic; + mac->ops.get_media_type = NULL; + mac->ops.get_supported_physical_layer = NULL; + mac->ops.enable_rx_dma = ixgbe_enable_rx_dma_generic; + mac->ops.get_mac_addr = ixgbe_get_mac_addr_generic; + mac->ops.stop_adapter = ixgbe_stop_adapter_generic; + mac->ops.get_bus_info = ixgbe_get_bus_info_generic; + mac->ops.set_lan_id = ixgbe_set_lan_id_multi_port_pcie; + mac->ops.acquire_swfw_sync = ixgbe_acquire_swfw_sync; + mac->ops.release_swfw_sync = ixgbe_release_swfw_sync; + mac->ops.prot_autoc_read = prot_autoc_read_generic; + mac->ops.prot_autoc_write = prot_autoc_write_generic; + + /* LEDs */ + mac->ops.led_on = ixgbe_led_on_generic; + mac->ops.led_off = ixgbe_led_off_generic; + mac->ops.blink_led_start = ixgbe_blink_led_start_generic; + mac->ops.blink_led_stop = ixgbe_blink_led_stop_generic; + mac->ops.init_led_link_act = ixgbe_init_led_link_act_generic; + + /* RAR, Multicast, VLAN */ + mac->ops.set_rar = ixgbe_set_rar_generic; + mac->ops.clear_rar = ixgbe_clear_rar_generic; + mac->ops.insert_mac_addr = NULL; + mac->ops.set_vmdq = NULL; + mac->ops.clear_vmdq = NULL; + mac->ops.init_rx_addrs = ixgbe_init_rx_addrs_generic; + mac->ops.update_uc_addr_list = ixgbe_update_uc_addr_list_generic; + mac->ops.update_mc_addr_list = ixgbe_update_mc_addr_list_generic; + mac->ops.enable_mc = ixgbe_enable_mc_generic; + mac->ops.disable_mc = ixgbe_disable_mc_generic; + mac->ops.clear_vfta = NULL; + mac->ops.set_vfta = NULL; + mac->ops.set_vlvf = NULL; + mac->ops.init_uta_tables = NULL; + mac->ops.enable_rx = ixgbe_enable_rx_generic; + mac->ops.disable_rx = ixgbe_disable_rx_generic; + mac->ops.toggle_txdctl = ixgbe_toggle_txdctl_generic; + + /* Flow Control */ + mac->ops.fc_enable = ixgbe_fc_enable_generic; + mac->ops.setup_fc = ixgbe_setup_fc_generic; + mac->ops.fc_autoneg = ixgbe_fc_autoneg; + + /* Link */ + mac->ops.get_link_capabilities = NULL; + mac->ops.setup_link = NULL; + mac->ops.check_link = NULL; + mac->ops.dmac_config = NULL; + mac->ops.dmac_update_tcs = NULL; + mac->ops.dmac_config_tcs = NULL; + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_device_supports_autoneg_fc - Check if device supports autonegotiation + * of flow control + * @hw: pointer to hardware structure + * + * This function returns true if the device supports flow control + * autonegotiation, and false if it does not. + * + **/ +bool ixgbe_device_supports_autoneg_fc(struct ixgbe_hw *hw) +{ + bool supported = false; + ixgbe_link_speed speed; + bool link_up; + + DEBUGFUNC("ixgbe_device_supports_autoneg_fc"); + + switch (hw->phy.media_type) { + case ixgbe_media_type_fiber_qsfp: + case ixgbe_media_type_fiber: + /* flow control autoneg block list */ + switch (hw->device_id) { + case IXGBE_DEV_ID_X550EM_A_SFP: + case IXGBE_DEV_ID_X550EM_A_SFP_N: + case IXGBE_DEV_ID_X550EM_A_QSFP: + case IXGBE_DEV_ID_X550EM_A_QSFP_N: + case IXGBE_DEV_ID_E610_SFP: + supported = false; + break; + default: + hw->mac.ops.check_link(hw, &speed, &link_up, false); + /* if link is down, assume supported */ + if (link_up) + supported = speed == IXGBE_LINK_SPEED_1GB_FULL ? + true : false; + else + supported = true; + } + + break; + case ixgbe_media_type_backplane: + if (hw->device_id == IXGBE_DEV_ID_X550EM_X_XFI) + supported = false; + else + supported = true; + break; + case ixgbe_media_type_copper: + /* only some copper devices support flow control autoneg */ + switch (hw->device_id) { + case IXGBE_DEV_ID_82599_T3_LOM: + case IXGBE_DEV_ID_X540T: + case IXGBE_DEV_ID_X540T1: + case IXGBE_DEV_ID_X550T: + case IXGBE_DEV_ID_X550T1: + case IXGBE_DEV_ID_X550EM_X_10G_T: + case IXGBE_DEV_ID_X550EM_A_10G_T: + case IXGBE_DEV_ID_X550EM_A_1G_T: + case IXGBE_DEV_ID_X550EM_A_1G_T_L: + case IXGBE_DEV_ID_E610_10G_T: + case IXGBE_DEV_ID_E610_2_5G_T: + supported = true; + break; + default: + supported = false; + } + default: + break; + } + + return supported; +} + +/** + * ixgbe_setup_fc_generic - Set up flow control + * @hw: pointer to hardware structure + * + * Called at init time to set up flow control. + **/ +s32 ixgbe_setup_fc_generic(struct ixgbe_hw *hw) +{ + s32 ret_val = IXGBE_SUCCESS; + u32 reg = 0, reg_bp = 0; + u16 reg_cu = 0; + bool locked = false; + + DEBUGFUNC("ixgbe_setup_fc_generic"); + + /* Validate the requested mode */ + if (hw->fc.strict_ieee && hw->fc.requested_mode == ixgbe_fc_rx_pause) { + ERROR_REPORT1(IXGBE_ERROR_UNSUPPORTED, + "ixgbe_fc_rx_pause not valid in strict IEEE mode\n"); + ret_val = IXGBE_ERR_INVALID_LINK_SETTINGS; + goto out; + } + + /* + * 10gig parts do not have a word in the EEPROM to determine the + * default flow control setting, so we explicitly set it to full. + */ + if (hw->fc.requested_mode == ixgbe_fc_default) + hw->fc.requested_mode = ixgbe_fc_full; + + /* + * Set up the 1G and 10G flow control advertisement registers so the + * HW will be able to do fc autoneg once the cable is plugged in. If + * we link at 10G, the 1G advertisement is harmless and vice versa. + */ + switch (hw->phy.media_type) { + case ixgbe_media_type_backplane: + /* some MAC's need RMW protection on AUTOC */ + ret_val = hw->mac.ops.prot_autoc_read(hw, &locked, ®_bp); + if (ret_val != IXGBE_SUCCESS) + goto out; + + fallthrough; /* only backplane uses autoc */ + case ixgbe_media_type_fiber_qsfp: + case ixgbe_media_type_fiber: + reg = IXGBE_READ_REG(hw, IXGBE_PCS1GANA); + + break; + case ixgbe_media_type_copper: + hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_ADVT, + IXGBE_MDIO_AUTO_NEG_DEV_TYPE, ®_cu); + break; + default: + break; + } + + /* + * The possible values of fc.requested_mode are: + * 0: Flow control is completely disabled + * 1: Rx flow control is enabled (we can receive pause frames, + * but not send pause frames). + * 2: Tx flow control is enabled (we can send pause frames but + * we do not support receiving pause frames). + * 3: Both Rx and Tx flow control (symmetric) are enabled. + * other: Invalid. + */ + switch (hw->fc.requested_mode) { + case ixgbe_fc_none: + /* Flow control completely disabled by software override. */ + reg &= ~(IXGBE_PCS1GANA_SYM_PAUSE | IXGBE_PCS1GANA_ASM_PAUSE); + if (hw->phy.media_type == ixgbe_media_type_backplane) + reg_bp &= ~(IXGBE_AUTOC_SYM_PAUSE | + IXGBE_AUTOC_ASM_PAUSE); + else if (hw->phy.media_type == ixgbe_media_type_copper) + reg_cu &= ~(IXGBE_TAF_SYM_PAUSE | IXGBE_TAF_ASM_PAUSE); + break; + case ixgbe_fc_tx_pause: + /* + * Tx Flow control is enabled, and Rx Flow control is + * disabled by software override. + */ + reg |= IXGBE_PCS1GANA_ASM_PAUSE; + reg &= ~IXGBE_PCS1GANA_SYM_PAUSE; + if (hw->phy.media_type == ixgbe_media_type_backplane) { + reg_bp |= IXGBE_AUTOC_ASM_PAUSE; + reg_bp &= ~IXGBE_AUTOC_SYM_PAUSE; + } else if (hw->phy.media_type == ixgbe_media_type_copper) { + reg_cu |= IXGBE_TAF_ASM_PAUSE; + reg_cu &= ~IXGBE_TAF_SYM_PAUSE; + } + break; + case ixgbe_fc_rx_pause: + /* + * Rx Flow control is enabled and Tx Flow control is + * disabled by software override. Since there really + * isn't a way to advertise that we are capable of RX + * Pause ONLY, we will advertise that we support both + * symmetric and asymmetric Rx PAUSE, as such we fall + * through to the fc_full statement. Later, we will + * disable the adapter's ability to send PAUSE frames. + */ + case ixgbe_fc_full: + /* Flow control (both Rx and Tx) is enabled by SW override. */ + reg |= IXGBE_PCS1GANA_SYM_PAUSE | IXGBE_PCS1GANA_ASM_PAUSE; + if (hw->phy.media_type == ixgbe_media_type_backplane) + reg_bp |= IXGBE_AUTOC_SYM_PAUSE | + IXGBE_AUTOC_ASM_PAUSE; + else if (hw->phy.media_type == ixgbe_media_type_copper) + reg_cu |= IXGBE_TAF_SYM_PAUSE | IXGBE_TAF_ASM_PAUSE; + break; + default: + ERROR_REPORT1(IXGBE_ERROR_ARGUMENT, + "Flow control param set incorrectly\n"); + ret_val = IXGBE_ERR_CONFIG; + goto out; + break; + } + + if (hw->mac.type < ixgbe_mac_X540) { + /* + * Enable auto-negotiation between the MAC & PHY; + * the MAC will advertise clause 37 flow control. + */ + IXGBE_WRITE_REG(hw, IXGBE_PCS1GANA, reg); + reg = IXGBE_READ_REG(hw, IXGBE_PCS1GLCTL); + + /* Disable AN timeout */ + if (hw->fc.strict_ieee) + reg &= ~IXGBE_PCS1GLCTL_AN_1G_TIMEOUT_EN; + + IXGBE_WRITE_REG(hw, IXGBE_PCS1GLCTL, reg); + hw_dbg(hw, "Set up FC; PCS1GLCTL = 0x%08X\n", reg); + } + + /* + * AUTOC restart handles negotiation of 1G and 10G on backplane + * and copper. There is no need to set the PCS1GCTL register. + * + */ + if (hw->phy.media_type == ixgbe_media_type_backplane) { + reg_bp |= IXGBE_AUTOC_AN_RESTART; + ret_val = hw->mac.ops.prot_autoc_write(hw, reg_bp, locked); + if (ret_val) + goto out; + } else if ((hw->phy.media_type == ixgbe_media_type_copper) && + (ixgbe_device_supports_autoneg_fc(hw))) { + hw->phy.ops.write_reg(hw, IXGBE_MDIO_AUTO_NEG_ADVT, + IXGBE_MDIO_AUTO_NEG_DEV_TYPE, reg_cu); + } + + hw_dbg(hw, "Set up FC; PCS1GLCTL = 0x%08X\n", reg); +out: + return ret_val; +} + +/** + * ixgbe_start_hw_generic - Prepare hardware for Tx/Rx + * @hw: pointer to hardware structure + * + * Starts the hardware by filling the bus info structure and media type, clears + * all on chip counters, initializes receive address registers, multicast + * table, VLAN filter table, calls routine to set up link and flow control + * settings, and leaves transmit and receive units disabled and uninitialized + **/ +s32 ixgbe_start_hw_generic(struct ixgbe_hw *hw) +{ + s32 ret_val; + u32 ctrl_ext; + u16 device_caps; + + DEBUGFUNC("ixgbe_start_hw_generic"); + + /* Set the media type */ + hw->phy.media_type = hw->mac.ops.get_media_type(hw); + + /* PHY ops initialization must be done in reset_hw() */ + + /* Clear the VLAN filter table */ + hw->mac.ops.clear_vfta(hw); + + /* Clear statistics registers */ + hw->mac.ops.clear_hw_cntrs(hw); + + /* Set No Snoop Disable */ + ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT); + ctrl_ext |= IXGBE_CTRL_EXT_NS_DIS; + IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext); + IXGBE_WRITE_FLUSH(hw); + + /* Setup flow control */ + ret_val = ixgbe_setup_fc(hw); + if (ret_val != IXGBE_SUCCESS && ret_val != IXGBE_NOT_IMPLEMENTED) { + hw_dbg(hw, "Flow control setup failed, returning %d\n", ret_val); + return ret_val; + } + + /* Cache bit indicating need for crosstalk fix */ + switch (hw->mac.type) { + case ixgbe_mac_82599EB: + case ixgbe_mac_X550EM_x: + case ixgbe_mac_X550EM_a: + hw->mac.ops.get_device_caps(hw, &device_caps); + if (device_caps & IXGBE_DEVICE_CAPS_NO_CROSSTALK_WR) + hw->need_crosstalk_fix = false; + else + hw->need_crosstalk_fix = true; + break; + default: + hw->need_crosstalk_fix = false; + break; + } + + /* Clear adapter stopped flag */ + hw->adapter_stopped = false; + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_start_hw_gen2 - Init sequence for common device family + * @hw: pointer to hw structure + * + * Performs the init sequence common to the second generation + * of 10 GbE devices. + * Devices in the second generation: + * 82599 + * X540 + **/ +void ixgbe_start_hw_gen2(struct ixgbe_hw *hw) +{ + u32 i; + u32 regval; + + /* Clear the rate limiters */ + for (i = 0; i < hw->mac.max_tx_queues; i++) { + IXGBE_WRITE_REG(hw, IXGBE_RTTDQSEL, i); + IXGBE_WRITE_REG(hw, IXGBE_RTTBCNRC, 0); + } + IXGBE_WRITE_FLUSH(hw); + + /* Disable relaxed ordering */ + for (i = 0; i < hw->mac.max_tx_queues; i++) { + regval = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL_82599(i)); + regval &= ~IXGBE_DCA_TXCTRL_DESC_WRO_EN; + IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL_82599(i), regval); + } + + for (i = 0; i < hw->mac.max_rx_queues; i++) { + regval = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i)); + regval &= ~(IXGBE_DCA_RXCTRL_DATA_WRO_EN | + IXGBE_DCA_RXCTRL_HEAD_WRO_EN); + IXGBE_WRITE_REG(hw, IXGBE_DCA_RXCTRL(i), regval); + } +} + +/** + * ixgbe_init_hw_generic - Generic hardware initialization + * @hw: pointer to hardware structure + * + * Initialize the hardware by resetting the hardware, filling the bus info + * structure and media type, clears all on chip counters, initializes receive + * address registers, multicast table, VLAN filter table, calls routine to set + * up link and flow control settings, and leaves transmit and receive units + * disabled and uninitialized + **/ +s32 ixgbe_init_hw_generic(struct ixgbe_hw *hw) +{ + s32 status; + + DEBUGFUNC("ixgbe_init_hw_generic"); + + /* Reset the hardware */ + status = hw->mac.ops.reset_hw(hw); + + if (status == IXGBE_SUCCESS || status == IXGBE_ERR_SFP_NOT_PRESENT) { + /* Start the HW */ + status = hw->mac.ops.start_hw(hw); + } + + /* Initialize the LED link active for LED blink support */ + if (hw->mac.ops.init_led_link_act) + hw->mac.ops.init_led_link_act(hw); + + if (status != IXGBE_SUCCESS) + hw_dbg(hw, "Failed to initialize HW, STATUS = %d\n", status); + + return status; +} + +/** + * ixgbe_clear_hw_cntrs_generic - Generic clear hardware counters + * @hw: pointer to hardware structure + * + * Clears all hardware statistics counters by reading them from the hardware + * Statistics counters are clear on read. + **/ +s32 ixgbe_clear_hw_cntrs_generic(struct ixgbe_hw *hw) +{ + u16 i = 0; + + DEBUGFUNC("ixgbe_clear_hw_cntrs_generic"); + + IXGBE_READ_REG(hw, IXGBE_CRCERRS); + IXGBE_READ_REG(hw, IXGBE_ILLERRC); + IXGBE_READ_REG(hw, IXGBE_ERRBC); + IXGBE_READ_REG(hw, IXGBE_MSPDC); + for (i = 0; i < 8; i++) + IXGBE_READ_REG(hw, IXGBE_MPC(i)); + + IXGBE_READ_REG(hw, IXGBE_MLFC); + IXGBE_READ_REG(hw, IXGBE_MRFC); + IXGBE_READ_REG(hw, IXGBE_RLEC); + IXGBE_READ_REG(hw, IXGBE_LXONTXC); + IXGBE_READ_REG(hw, IXGBE_LXOFFTXC); + if (hw->mac.type >= ixgbe_mac_82599EB) { + IXGBE_READ_REG(hw, IXGBE_LXONRXCNT); + IXGBE_READ_REG(hw, IXGBE_LXOFFRXCNT); + } else { + IXGBE_READ_REG(hw, IXGBE_LXONRXC); + IXGBE_READ_REG(hw, IXGBE_LXOFFRXC); + } + + for (i = 0; i < 8; i++) { + IXGBE_READ_REG(hw, IXGBE_PXONTXC(i)); + IXGBE_READ_REG(hw, IXGBE_PXOFFTXC(i)); + if (hw->mac.type >= ixgbe_mac_82599EB) { + IXGBE_READ_REG(hw, IXGBE_PXONRXCNT(i)); + IXGBE_READ_REG(hw, IXGBE_PXOFFRXCNT(i)); + } else { + IXGBE_READ_REG(hw, IXGBE_PXONRXC(i)); + IXGBE_READ_REG(hw, IXGBE_PXOFFRXC(i)); + } + } + if (hw->mac.type >= ixgbe_mac_82599EB) + for (i = 0; i < 8; i++) + IXGBE_READ_REG(hw, IXGBE_PXON2OFFCNT(i)); + IXGBE_READ_REG(hw, IXGBE_PRC64); + IXGBE_READ_REG(hw, IXGBE_PRC127); + IXGBE_READ_REG(hw, IXGBE_PRC255); + IXGBE_READ_REG(hw, IXGBE_PRC511); + IXGBE_READ_REG(hw, IXGBE_PRC1023); + IXGBE_READ_REG(hw, IXGBE_PRC1522); + IXGBE_READ_REG(hw, IXGBE_GPRC); + IXGBE_READ_REG(hw, IXGBE_BPRC); + IXGBE_READ_REG(hw, IXGBE_MPRC); + IXGBE_READ_REG(hw, IXGBE_GPTC); + IXGBE_READ_REG(hw, IXGBE_GORCL); + IXGBE_READ_REG(hw, IXGBE_GORCH); + IXGBE_READ_REG(hw, IXGBE_GOTCL); + IXGBE_READ_REG(hw, IXGBE_GOTCH); + if (hw->mac.type == ixgbe_mac_82598EB) + for (i = 0; i < 8; i++) + IXGBE_READ_REG(hw, IXGBE_RNBC(i)); + IXGBE_READ_REG(hw, IXGBE_RUC); + IXGBE_READ_REG(hw, IXGBE_RFC); + IXGBE_READ_REG(hw, IXGBE_ROC); + IXGBE_READ_REG(hw, IXGBE_RJC); + IXGBE_READ_REG(hw, IXGBE_MNGPRC); + IXGBE_READ_REG(hw, IXGBE_MNGPDC); + IXGBE_READ_REG(hw, IXGBE_MNGPTC); + IXGBE_READ_REG(hw, IXGBE_TORL); + IXGBE_READ_REG(hw, IXGBE_TORH); + IXGBE_READ_REG(hw, IXGBE_TPR); + IXGBE_READ_REG(hw, IXGBE_TPT); + IXGBE_READ_REG(hw, IXGBE_PTC64); + IXGBE_READ_REG(hw, IXGBE_PTC127); + IXGBE_READ_REG(hw, IXGBE_PTC255); + IXGBE_READ_REG(hw, IXGBE_PTC511); + IXGBE_READ_REG(hw, IXGBE_PTC1023); + IXGBE_READ_REG(hw, IXGBE_PTC1522); + IXGBE_READ_REG(hw, IXGBE_MPTC); + IXGBE_READ_REG(hw, IXGBE_BPTC); + for (i = 0; i < 16; i++) { + IXGBE_READ_REG(hw, IXGBE_QPRC(i)); + IXGBE_READ_REG(hw, IXGBE_QPTC(i)); + if (hw->mac.type >= ixgbe_mac_82599EB) { + IXGBE_READ_REG(hw, IXGBE_QBRC_L(i)); + IXGBE_READ_REG(hw, IXGBE_QBRC_H(i)); + IXGBE_READ_REG(hw, IXGBE_QBTC_L(i)); + IXGBE_READ_REG(hw, IXGBE_QBTC_H(i)); + IXGBE_READ_REG(hw, IXGBE_QPRDC(i)); + } else { + IXGBE_READ_REG(hw, IXGBE_QBRC(i)); + IXGBE_READ_REG(hw, IXGBE_QBTC(i)); + } + } + + if (hw->mac.type == ixgbe_mac_X540 || + hw->mac.type == ixgbe_mac_X550 || + ixgbe_is_mac_E6xx(hw->mac.type)) { + if (!hw->phy.id) + ixgbe_identify_phy(hw); + if (hw->mac.type < ixgbe_mac_E610) { + hw->phy.ops.read_reg(hw, IXGBE_PCRC8ECL, + IXGBE_MDIO_PCS_DEV_TYPE, &i); + hw->phy.ops.read_reg(hw, IXGBE_PCRC8ECH, + IXGBE_MDIO_PCS_DEV_TYPE, &i); + hw->phy.ops.read_reg(hw, IXGBE_LDPCECL, + IXGBE_MDIO_PCS_DEV_TYPE, &i); + hw->phy.ops.read_reg(hw, IXGBE_LDPCECH, + IXGBE_MDIO_PCS_DEV_TYPE, &i); + } + } + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_read_pba_string_generic - Reads part number string from EEPROM + * @hw: pointer to hardware structure + * @pba_num: stores the part number string from the EEPROM + * @pba_num_size: part number string buffer length + * + * Reads the part number string from the EEPROM. + **/ +s32 ixgbe_read_pba_string_generic(struct ixgbe_hw *hw, u8 *pba_num, + u32 pba_num_size) +{ + s32 ret_val; + u16 data; + u16 pba_ptr; + u16 offset; + u16 length; + + DEBUGFUNC("ixgbe_read_pba_string_generic"); + + if (pba_num == NULL) { + hw_dbg(hw, "PBA string buffer was null\n"); + return IXGBE_ERR_INVALID_ARGUMENT; + } + + ret_val = hw->eeprom.ops.read(hw, IXGBE_PBANUM0_PTR, &data); + if (ret_val) { + hw_dbg(hw, "NVM Read Error\n"); + return ret_val; + } + + ret_val = hw->eeprom.ops.read(hw, IXGBE_PBANUM1_PTR, &pba_ptr); + if (ret_val) { + hw_dbg(hw, "NVM Read Error\n"); + return ret_val; + } + + /* + * if data is not ptr guard the PBA must be in legacy format which + * means pba_ptr is actually our second data word for the PBA number + * and we can decode it into an ascii string + */ + if (data != IXGBE_PBANUM_PTR_GUARD) { + hw_dbg(hw, "NVM PBA number is not stored as string\n"); + + /* we will need 11 characters to store the PBA */ + if (pba_num_size < 11) { + hw_dbg(hw, "PBA string buffer too small\n"); + return IXGBE_ERR_NO_SPACE; + } + + /* extract hex string from data and pba_ptr */ + pba_num[0] = (data >> 12) & 0xF; + pba_num[1] = (data >> 8) & 0xF; + pba_num[2] = (data >> 4) & 0xF; + pba_num[3] = data & 0xF; + pba_num[4] = (pba_ptr >> 12) & 0xF; + pba_num[5] = (pba_ptr >> 8) & 0xF; + pba_num[6] = '-'; + pba_num[7] = 0; + pba_num[8] = (pba_ptr >> 4) & 0xF; + pba_num[9] = pba_ptr & 0xF; + + /* put a null character on the end of our string */ + pba_num[10] = '\0'; + + /* switch all the data but the '-' to hex char */ + for (offset = 0; offset < 10; offset++) { + if (pba_num[offset] < 0xA) + pba_num[offset] += '0'; + else if (pba_num[offset] < 0x10) + pba_num[offset] += 'A' - 0xA; + } + + return IXGBE_SUCCESS; + } + + ret_val = hw->eeprom.ops.read(hw, pba_ptr, &length); + if (ret_val) { + hw_dbg(hw, "NVM Read Error\n"); + return ret_val; + } + + if (length == 0xFFFF || length == 0 || length > hw->eeprom.word_size) { + hw_dbg(hw, "NVM PBA number section invalid length\n"); + return IXGBE_ERR_PBA_SECTION; + } + + /* check if pba_num buffer is big enough */ + if (pba_num_size < (((u32)length * 2) - 1)) { + hw_dbg(hw, "PBA string buffer too small\n"); + return IXGBE_ERR_NO_SPACE; + } + + /* trim pba length from start of string */ + pba_ptr++; + length--; + + for (offset = 0; offset < length; offset++) { + ret_val = hw->eeprom.ops.read(hw, pba_ptr + offset, &data); + if (ret_val) { + hw_dbg(hw, "NVM Read Error\n"); + return ret_val; + } + pba_num[offset * 2] = (u8)(data >> 8); + pba_num[(offset * 2) + 1] = (u8)(data & 0xFF); + } + pba_num[offset * 2] = '\0'; + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_get_mac_addr_generic - Generic get MAC address + * @hw: pointer to hardware structure + * @mac_addr: Adapter MAC address + * + * Reads the adapter's MAC address from first Receive Address Register (RAR0) + * A reset of the adapter must be performed prior to calling this function + * in order for the MAC address to have been loaded from the EEPROM into RAR0 + **/ +s32 ixgbe_get_mac_addr_generic(struct ixgbe_hw *hw, u8 *mac_addr) +{ + u32 rar_high; + u32 rar_low; + u16 i; + + DEBUGFUNC("ixgbe_get_mac_addr_generic"); + + rar_high = IXGBE_READ_REG(hw, IXGBE_RAH(0)); + rar_low = IXGBE_READ_REG(hw, IXGBE_RAL(0)); + + for (i = 0; i < 4; i++) + mac_addr[i] = (u8)(rar_low >> (i*8)); + + for (i = 0; i < 2; i++) + mac_addr[i+4] = (u8)(rar_high >> (i*8)); + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_set_pci_config_data_generic - Generic store PCI bus info + * @hw: pointer to hardware structure + * @link_status: the link status returned by the PCI config space + * + * Stores the PCI bus info (speed, width, type) within the ixgbe_hw structure + **/ +void ixgbe_set_pci_config_data_generic(struct ixgbe_hw *hw, u16 link_status) +{ + struct ixgbe_mac_info *mac = &hw->mac; + + if (hw->bus.type == ixgbe_bus_type_unknown) + hw->bus.type = ixgbe_bus_type_pci_express; + + switch (link_status & IXGBE_PCI_LINK_WIDTH) { + case IXGBE_PCI_LINK_WIDTH_1: + hw->bus.width = ixgbe_bus_width_pcie_x1; + break; + case IXGBE_PCI_LINK_WIDTH_2: + hw->bus.width = ixgbe_bus_width_pcie_x2; + break; + case IXGBE_PCI_LINK_WIDTH_4: + hw->bus.width = ixgbe_bus_width_pcie_x4; + break; + case IXGBE_PCI_LINK_WIDTH_8: + hw->bus.width = ixgbe_bus_width_pcie_x8; + break; + default: + hw->bus.width = ixgbe_bus_width_unknown; + break; + } + + switch (link_status & IXGBE_PCI_LINK_SPEED) { + case IXGBE_PCI_LINK_SPEED_2500: + hw->bus.speed = ixgbe_bus_speed_2500; + break; + case IXGBE_PCI_LINK_SPEED_5000: + hw->bus.speed = ixgbe_bus_speed_5000; + break; + case IXGBE_PCI_LINK_SPEED_8000: + hw->bus.speed = ixgbe_bus_speed_8000; + break; + case IXGBE_PCI_LINK_SPEED_16000: + hw->bus.speed = ixgbe_bus_speed_16000; + break; + default: + hw->bus.speed = ixgbe_bus_speed_unknown; + break; + } + + mac->ops.set_lan_id(hw); +} + +/** + * ixgbe_get_bus_info_generic - Generic set PCI bus info + * @hw: pointer to hardware structure + * + * Gets the PCI bus info (speed, width, type) then calls helper function to + * store this data within the ixgbe_hw structure. + **/ +s32 ixgbe_get_bus_info_generic(struct ixgbe_hw *hw) +{ + u16 link_status; + + DEBUGFUNC("ixgbe_get_bus_info_generic"); + + /* Get the negotiated link width and speed from PCI config space */ + link_status = IXGBE_READ_PCIE_WORD(hw, ixgbe_is_mac_E6xx(hw->mac.type) ? + IXGBE_PCI_LINK_STATUS_E610 : + IXGBE_PCI_LINK_STATUS); + + ixgbe_set_pci_config_data_generic(hw, link_status); + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_set_lan_id_multi_port_pcie - Set LAN id for PCIe multiple port devices + * @hw: pointer to the HW structure + * + * Determines the LAN function id by reading memory-mapped registers and swaps + * the port value if requested, and set MAC instance for devices that share + * CS4227. + **/ +void ixgbe_set_lan_id_multi_port_pcie(struct ixgbe_hw *hw) +{ + struct ixgbe_bus_info *bus = &hw->bus; + u32 reg; + u16 ee_ctrl_4; + + DEBUGFUNC("ixgbe_set_lan_id_multi_port_pcie"); + + reg = IXGBE_READ_REG(hw, IXGBE_STATUS); + bus->func = (reg & IXGBE_STATUS_LAN_ID) >> IXGBE_STATUS_LAN_ID_SHIFT; + bus->lan_id = (u8)bus->func; + + /* check for a port swap */ + reg = IXGBE_READ_REG(hw, IXGBE_FACTPS_BY_MAC(hw)); + if (reg & IXGBE_FACTPS_LFS) + bus->func ^= 0x1; + + /* Get MAC instance from EEPROM for configuring CS4227 */ + if (hw->device_id == IXGBE_DEV_ID_X550EM_A_SFP) { + hw->eeprom.ops.read(hw, IXGBE_EEPROM_CTRL_4, &ee_ctrl_4); + bus->instance_id = (ee_ctrl_4 & IXGBE_EE_CTRL_4_INST_ID) >> + IXGBE_EE_CTRL_4_INST_ID_SHIFT; + } +} + +/** + * ixgbe_stop_adapter_generic - Generic stop Tx/Rx units + * @hw: pointer to hardware structure + * + * Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts, + * disables transmit and receive units. The adapter_stopped flag is used by + * the shared code and drivers to determine if the adapter is in a stopped + * state and should not touch the hardware. + **/ +s32 ixgbe_stop_adapter_generic(struct ixgbe_hw *hw) +{ + u32 reg_val; + u16 i; + + DEBUGFUNC("ixgbe_stop_adapter_generic"); + + /* + * Set the adapter_stopped flag so other driver functions stop touching + * the hardware + */ + hw->adapter_stopped = true; + + /* Disable the receive unit */ + ixgbe_disable_rx(hw); + + /* Clear interrupt mask to stop interrupts from being generated */ + IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_IRQ_CLEAR_MASK); + + /* Clear any pending interrupts, flush previous writes */ + IXGBE_READ_REG(hw, IXGBE_EICR); + + /* Disable the transmit unit. Each queue must be disabled. */ + for (i = 0; i < hw->mac.max_tx_queues; i++) + IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(i), IXGBE_TXDCTL_SWFLSH); + + /* Disable the receive unit by stopping each queue */ + for (i = 0; i < hw->mac.max_rx_queues; i++) { + reg_val = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i)); + reg_val &= ~IXGBE_RXDCTL_ENABLE; + reg_val |= IXGBE_RXDCTL_SWFLSH; + IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(i), reg_val); + } + + /* flush all queues disables */ + IXGBE_WRITE_FLUSH(hw); + msec_delay(2); + + /* + * Prevent the PCI-E bus from hanging by disabling PCI-E primary + * access and verify no pending requests + */ + return ixgbe_disable_pcie_primary(hw); +} + +/** + * ixgbe_init_led_link_act_generic - Store the LED index link/activity. + * @hw: pointer to hardware structure + * + * Store the index for the link active LED. This will be used to support + * blinking the LED. + **/ +s32 ixgbe_init_led_link_act_generic(struct ixgbe_hw *hw) +{ + struct ixgbe_mac_info *mac = &hw->mac; + u32 led_reg, led_mode; + u8 i; + + led_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL); + + /* Get LED link active from the LEDCTL register */ + for (i = 0; i < 4; i++) { + led_mode = led_reg >> IXGBE_LED_MODE_SHIFT(i); + + if ((led_mode & IXGBE_LED_MODE_MASK_BASE) == + IXGBE_LED_LINK_ACTIVE) { + mac->led_link_act = i; + return IXGBE_SUCCESS; + } + } + + /* + * If LEDCTL register does not have the LED link active set, then use + * known MAC defaults. + */ + switch (hw->mac.type) { + case ixgbe_mac_X550EM_a: + case ixgbe_mac_X550EM_x: + mac->led_link_act = 1; + break; + default: + mac->led_link_act = 2; + } + return IXGBE_SUCCESS; +} + +/** + * ixgbe_led_on_generic - Turns on the software controllable LEDs. + * @hw: pointer to hardware structure + * @index: led number to turn on + **/ +s32 ixgbe_led_on_generic(struct ixgbe_hw *hw, u32 index) +{ + u32 led_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL); + + DEBUGFUNC("ixgbe_led_on_generic"); + + if (index > 3) + return IXGBE_ERR_PARAM; + + /* To turn on the LED, set mode to ON. */ + led_reg &= ~IXGBE_LED_MODE_MASK(index); + led_reg |= IXGBE_LED_ON << IXGBE_LED_MODE_SHIFT(index); + IXGBE_WRITE_REG(hw, IXGBE_LEDCTL, led_reg); + IXGBE_WRITE_FLUSH(hw); + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_led_off_generic - Turns off the software controllable LEDs. + * @hw: pointer to hardware structure + * @index: led number to turn off + **/ +s32 ixgbe_led_off_generic(struct ixgbe_hw *hw, u32 index) +{ + u32 led_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL); + + DEBUGFUNC("ixgbe_led_off_generic"); + + if (index > 3) + return IXGBE_ERR_PARAM; + + /* To turn off the LED, set mode to OFF. */ + led_reg &= ~IXGBE_LED_MODE_MASK(index); + led_reg |= IXGBE_LED_OFF << IXGBE_LED_MODE_SHIFT(index); + IXGBE_WRITE_REG(hw, IXGBE_LEDCTL, led_reg); + IXGBE_WRITE_FLUSH(hw); + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_init_eeprom_params_generic - Initialize EEPROM params + * @hw: pointer to hardware structure + * + * Initializes the EEPROM parameters ixgbe_eeprom_info within the + * ixgbe_hw struct in order to set up EEPROM access. + **/ +s32 ixgbe_init_eeprom_params_generic(struct ixgbe_hw *hw) +{ + struct ixgbe_eeprom_info *eeprom = &hw->eeprom; + u32 eec; + u16 eeprom_size; + + DEBUGFUNC("ixgbe_init_eeprom_params_generic"); + + if (eeprom->type == ixgbe_eeprom_uninitialized) { + eeprom->type = ixgbe_eeprom_none; + /* Set default semaphore delay to 10ms which is a well + * tested value */ + eeprom->semaphore_delay = 10; + /* Clear EEPROM page size, it will be initialized as needed */ + eeprom->word_page_size = 0; + + /* + * Check for EEPROM present first. + * If not present leave as none + */ + eec = IXGBE_READ_REG(hw, IXGBE_EEC_BY_MAC(hw)); + if (eec & IXGBE_EEC_PRES) { + eeprom->type = ixgbe_eeprom_spi; + + /* + * SPI EEPROM is assumed here. This code would need to + * change if a future EEPROM is not SPI. + */ + eeprom_size = (u16)((eec & IXGBE_EEC_SIZE) >> + IXGBE_EEC_SIZE_SHIFT); + eeprom->word_size = 1 << (eeprom_size + + IXGBE_EEPROM_WORD_SIZE_SHIFT); + } + + if (eec & IXGBE_EEC_ADDR_SIZE) + eeprom->address_bits = 16; + else + eeprom->address_bits = 8; + hw_dbg(hw, "Eeprom params: type = %d, size = %d, address bits: " + "%d\n", eeprom->type, eeprom->word_size, + eeprom->address_bits); + } + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_write_eeprom_buffer_bit_bang_generic - Write EEPROM using bit-bang + * @hw: pointer to hardware structure + * @offset: offset within the EEPROM to write + * @words: number of word(s) + * @data: 16 bit word(s) to write to EEPROM + * + * Reads 16 bit word(s) from EEPROM through bit-bang method + **/ +s32 ixgbe_write_eeprom_buffer_bit_bang_generic(struct ixgbe_hw *hw, u16 offset, + u16 words, u16 *data) +{ + s32 status = IXGBE_SUCCESS; + u16 i, count; + + DEBUGFUNC("ixgbe_write_eeprom_buffer_bit_bang_generic"); + + hw->eeprom.ops.init_params(hw); + + if (words == 0) { + status = IXGBE_ERR_INVALID_ARGUMENT; + goto out; + } + + if ((u32)words > hw->eeprom.word_size - (u32)offset) { + status = IXGBE_ERR_EEPROM; + goto out; + } + + /* + * The EEPROM page size cannot be queried from the chip. We do lazy + * initialization. It is worth to do that when we write large buffer. + */ + if ((hw->eeprom.word_page_size == 0) && + (words > IXGBE_EEPROM_PAGE_SIZE_MAX)) + ixgbe_detect_eeprom_page_size_generic(hw, offset); + + /* + * We cannot hold synchronization semaphores for too long + * to avoid other entity starvation. However it is more efficient + * to read in bursts than synchronizing access for each word. + */ + for (i = 0; i < words; i += IXGBE_EEPROM_RD_BUFFER_MAX_COUNT) { + count = (words - i) / IXGBE_EEPROM_RD_BUFFER_MAX_COUNT > 0 ? + IXGBE_EEPROM_RD_BUFFER_MAX_COUNT : (words - i); + status = ixgbe_write_eeprom_buffer_bit_bang(hw, offset + i, + count, &data[i]); + + if (status != IXGBE_SUCCESS) + break; + } + +out: + return status; +} + +/** + * ixgbe_write_eeprom_buffer_bit_bang - Writes 16 bit word(s) to EEPROM + * @hw: pointer to hardware structure + * @offset: offset within the EEPROM to be written to + * @words: number of word(s) + * @data: 16 bit word(s) to be written to the EEPROM + * + * If ixgbe_eeprom_update_checksum is not called after this function, the + * EEPROM will most likely contain an invalid checksum. + **/ +STATIC s32 ixgbe_write_eeprom_buffer_bit_bang(struct ixgbe_hw *hw, u16 offset, + u16 words, u16 *data) +{ + s32 status; + u16 word; + u16 page_size; + u16 i; + u8 write_opcode = IXGBE_EEPROM_WRITE_OPCODE_SPI; + + DEBUGFUNC("ixgbe_write_eeprom_buffer_bit_bang"); + + /* Prepare the EEPROM for writing */ + status = ixgbe_acquire_eeprom(hw); + + if (status == IXGBE_SUCCESS) { + if (ixgbe_ready_eeprom(hw) != IXGBE_SUCCESS) { + ixgbe_release_eeprom(hw); + status = IXGBE_ERR_EEPROM; + } + } + + if (status == IXGBE_SUCCESS) { + for (i = 0; i < words; i++) { + ixgbe_standby_eeprom(hw); + + /* Send the WRITE ENABLE command (8 bit opcode ) */ + ixgbe_shift_out_eeprom_bits(hw, + IXGBE_EEPROM_WREN_OPCODE_SPI, + IXGBE_EEPROM_OPCODE_BITS); + + ixgbe_standby_eeprom(hw); + + /* + * Some SPI eeproms use the 8th address bit embedded + * in the opcode + */ + if ((hw->eeprom.address_bits == 8) && + ((offset + i) >= 128)) + write_opcode |= IXGBE_EEPROM_A8_OPCODE_SPI; + + /* Send the Write command (8-bit opcode + addr) */ + ixgbe_shift_out_eeprom_bits(hw, write_opcode, + IXGBE_EEPROM_OPCODE_BITS); + ixgbe_shift_out_eeprom_bits(hw, (u16)((offset + i) * 2), + hw->eeprom.address_bits); + + page_size = hw->eeprom.word_page_size; + + /* Send the data in burst via SPI*/ + do { + word = data[i]; + word = (word >> 8) | (word << 8); + ixgbe_shift_out_eeprom_bits(hw, word, 16); + + if (page_size == 0) + break; + + /* do not wrap around page */ + if (((offset + i) & (page_size - 1)) == + (page_size - 1)) + break; + } while (++i < words); + + ixgbe_standby_eeprom(hw); + msec_delay(10); + } + /* Done with writing - release the EEPROM */ + ixgbe_release_eeprom(hw); + } + + return status; +} + +/** + * ixgbe_write_eeprom_generic - Writes 16 bit value to EEPROM + * @hw: pointer to hardware structure + * @offset: offset within the EEPROM to be written to + * @data: 16 bit word to be written to the EEPROM + * + * If ixgbe_eeprom_update_checksum is not called after this function, the + * EEPROM will most likely contain an invalid checksum. + **/ +s32 ixgbe_write_eeprom_generic(struct ixgbe_hw *hw, u16 offset, u16 data) +{ + s32 status; + + DEBUGFUNC("ixgbe_write_eeprom_generic"); + + hw->eeprom.ops.init_params(hw); + + if (offset >= hw->eeprom.word_size) { + status = IXGBE_ERR_EEPROM; + goto out; + } + + status = ixgbe_write_eeprom_buffer_bit_bang(hw, offset, 1, &data); + +out: + return status; +} + +/** + * ixgbe_read_eeprom_buffer_bit_bang_generic - Read EEPROM using bit-bang + * @hw: pointer to hardware structure + * @offset: offset within the EEPROM to be read + * @data: read 16 bit words(s) from EEPROM + * @words: number of word(s) + * + * Reads 16 bit word(s) from EEPROM through bit-bang method + **/ +s32 ixgbe_read_eeprom_buffer_bit_bang_generic(struct ixgbe_hw *hw, u16 offset, + u16 words, u16 *data) +{ + s32 status = IXGBE_SUCCESS; + u16 i, count; + + DEBUGFUNC("ixgbe_read_eeprom_buffer_bit_bang_generic"); + + hw->eeprom.ops.init_params(hw); + + if (words == 0) { + status = IXGBE_ERR_INVALID_ARGUMENT; + goto out; + } + + if ((u32)words > hw->eeprom.word_size - (u32)offset) { + status = IXGBE_ERR_EEPROM; + goto out; + } + + /* + * We cannot hold synchronization semaphores for too long + * to avoid other entity starvation. However it is more efficient + * to read in bursts than synchronizing access for each word. + */ + for (i = 0; i < words; i += IXGBE_EEPROM_RD_BUFFER_MAX_COUNT) { + count = (words - i) / IXGBE_EEPROM_RD_BUFFER_MAX_COUNT > 0 ? + IXGBE_EEPROM_RD_BUFFER_MAX_COUNT : (words - i); + + status = ixgbe_read_eeprom_buffer_bit_bang(hw, offset + i, + count, &data[i]); + + if (status != IXGBE_SUCCESS) + break; + } + +out: + return status; +} + +/** + * ixgbe_read_eeprom_buffer_bit_bang - Read EEPROM using bit-bang + * @hw: pointer to hardware structure + * @offset: offset within the EEPROM to be read + * @words: number of word(s) + * @data: read 16 bit word(s) from EEPROM + * + * Reads 16 bit word(s) from EEPROM through bit-bang method + **/ +STATIC s32 ixgbe_read_eeprom_buffer_bit_bang(struct ixgbe_hw *hw, u16 offset, + u16 words, u16 *data) +{ + s32 status; + u16 word_in; + u8 read_opcode = IXGBE_EEPROM_READ_OPCODE_SPI; + u16 i; + + DEBUGFUNC("ixgbe_read_eeprom_buffer_bit_bang"); + + /* Prepare the EEPROM for reading */ + status = ixgbe_acquire_eeprom(hw); + + if (status == IXGBE_SUCCESS) { + if (ixgbe_ready_eeprom(hw) != IXGBE_SUCCESS) { + ixgbe_release_eeprom(hw); + status = IXGBE_ERR_EEPROM; + } + } + + if (status == IXGBE_SUCCESS) { + for (i = 0; i < words; i++) { + ixgbe_standby_eeprom(hw); + /* + * Some SPI eeproms use the 8th address bit embedded + * in the opcode + */ + if ((hw->eeprom.address_bits == 8) && + ((offset + i) >= 128)) + read_opcode |= IXGBE_EEPROM_A8_OPCODE_SPI; + + /* Send the READ command (opcode + addr) */ + ixgbe_shift_out_eeprom_bits(hw, read_opcode, + IXGBE_EEPROM_OPCODE_BITS); + ixgbe_shift_out_eeprom_bits(hw, (u16)((offset + i) * 2), + hw->eeprom.address_bits); + + /* Read the data. */ + word_in = ixgbe_shift_in_eeprom_bits(hw, 16); + data[i] = (word_in >> 8) | (word_in << 8); + } + + /* End this read operation */ + ixgbe_release_eeprom(hw); + } + + return status; +} + +/** + * ixgbe_read_eeprom_bit_bang_generic - Read EEPROM word using bit-bang + * @hw: pointer to hardware structure + * @offset: offset within the EEPROM to be read + * @data: read 16 bit value from EEPROM + * + * Reads 16 bit value from EEPROM through bit-bang method + **/ +s32 ixgbe_read_eeprom_bit_bang_generic(struct ixgbe_hw *hw, u16 offset, + u16 *data) +{ + s32 status; + + DEBUGFUNC("ixgbe_read_eeprom_bit_bang_generic"); + + hw->eeprom.ops.init_params(hw); + + if (offset >= hw->eeprom.word_size) { + status = IXGBE_ERR_EEPROM; + goto out; + } + + status = ixgbe_read_eeprom_buffer_bit_bang(hw, offset, 1, data); + +out: + return status; +} + +/** + * ixgbe_read_eerd_buffer_generic - Read EEPROM word(s) using EERD + * @hw: pointer to hardware structure + * @offset: offset of word in the EEPROM to read + * @words: number of word(s) + * @data: 16 bit word(s) from the EEPROM + * + * Reads a 16 bit word(s) from the EEPROM using the EERD register. + **/ +s32 ixgbe_read_eerd_buffer_generic(struct ixgbe_hw *hw, u16 offset, + u16 words, u16 *data) +{ + u32 eerd; + s32 status = IXGBE_SUCCESS; + u32 i; + + DEBUGFUNC("ixgbe_read_eerd_buffer_generic"); + + hw->eeprom.ops.init_params(hw); + + if (words == 0) { + status = IXGBE_ERR_INVALID_ARGUMENT; + ERROR_REPORT1(IXGBE_ERROR_ARGUMENT, "Invalid EEPROM words"); + goto out; + } + + if (offset >= hw->eeprom.word_size) { + status = IXGBE_ERR_EEPROM; + ERROR_REPORT1(IXGBE_ERROR_ARGUMENT, "Invalid EEPROM offset"); + goto out; + } + + for (i = 0; i < words; i++) { + eerd = ((offset + i) << IXGBE_EEPROM_RW_ADDR_SHIFT) | + IXGBE_EEPROM_RW_REG_START; + + IXGBE_WRITE_REG(hw, IXGBE_EERD, eerd); + status = ixgbe_poll_eerd_eewr_done(hw, IXGBE_NVM_POLL_READ); + + if (status == IXGBE_SUCCESS) { + data[i] = (IXGBE_READ_REG(hw, IXGBE_EERD) >> + IXGBE_EEPROM_RW_REG_DATA); + } else { + hw_dbg(hw, "Eeprom read timed out\n"); + goto out; + } + } +out: + return status; +} + +/** + * ixgbe_detect_eeprom_page_size_generic - Detect EEPROM page size + * @hw: pointer to hardware structure + * @offset: offset within the EEPROM to be used as a scratch pad + * + * Discover EEPROM page size by writing marching data at given offset. + * This function is called only when we are writing a new large buffer + * at given offset so the data would be overwritten anyway. + **/ +STATIC s32 ixgbe_detect_eeprom_page_size_generic(struct ixgbe_hw *hw, + u16 offset) +{ + u16 data[IXGBE_EEPROM_PAGE_SIZE_MAX]; + s32 status = IXGBE_SUCCESS; + u16 i; + + DEBUGFUNC("ixgbe_detect_eeprom_page_size_generic"); + + for (i = 0; i < IXGBE_EEPROM_PAGE_SIZE_MAX; i++) + data[i] = i; + + hw->eeprom.word_page_size = IXGBE_EEPROM_PAGE_SIZE_MAX; + status = ixgbe_write_eeprom_buffer_bit_bang(hw, offset, + IXGBE_EEPROM_PAGE_SIZE_MAX, data); + hw->eeprom.word_page_size = 0; + if (status != IXGBE_SUCCESS) + goto out; + + status = ixgbe_read_eeprom_buffer_bit_bang(hw, offset, 1, data); + if (status != IXGBE_SUCCESS) + goto out; + + /* + * When writing in burst more than the actual page size + * EEPROM address wraps around current page. + */ + hw->eeprom.word_page_size = IXGBE_EEPROM_PAGE_SIZE_MAX - data[0]; + + hw_dbg(hw, "Detected EEPROM page size = %d words.", + hw->eeprom.word_page_size); +out: + return status; +} + +/** + * ixgbe_read_eerd_generic - Read EEPROM word using EERD + * @hw: pointer to hardware structure + * @offset: offset of word in the EEPROM to read + * @data: word read from the EEPROM + * + * Reads a 16 bit word from the EEPROM using the EERD register. + **/ +s32 ixgbe_read_eerd_generic(struct ixgbe_hw *hw, u16 offset, u16 *data) +{ + return ixgbe_read_eerd_buffer_generic(hw, offset, 1, data); +} + +/** + * ixgbe_write_eewr_buffer_generic - Write EEPROM word(s) using EEWR + * @hw: pointer to hardware structure + * @offset: offset of word in the EEPROM to write + * @words: number of word(s) + * @data: word(s) write to the EEPROM + * + * Write a 16 bit word(s) to the EEPROM using the EEWR register. + **/ +s32 ixgbe_write_eewr_buffer_generic(struct ixgbe_hw *hw, u16 offset, + u16 words, u16 *data) +{ + u32 eewr; + s32 status = IXGBE_SUCCESS; + u16 i; + + DEBUGFUNC("ixgbe_write_eewr_generic"); + + hw->eeprom.ops.init_params(hw); + + if (words == 0) { + status = IXGBE_ERR_INVALID_ARGUMENT; + ERROR_REPORT1(IXGBE_ERROR_ARGUMENT, "Invalid EEPROM words"); + goto out; + } + + if (offset >= hw->eeprom.word_size) { + status = IXGBE_ERR_EEPROM; + ERROR_REPORT1(IXGBE_ERROR_ARGUMENT, "Invalid EEPROM offset"); + goto out; + } + + for (i = 0; i < words; i++) { + eewr = ((offset + i) << IXGBE_EEPROM_RW_ADDR_SHIFT) | + (data[i] << IXGBE_EEPROM_RW_REG_DATA) | + IXGBE_EEPROM_RW_REG_START; + + status = ixgbe_poll_eerd_eewr_done(hw, IXGBE_NVM_POLL_WRITE); + if (status != IXGBE_SUCCESS) { + hw_dbg(hw, "Eeprom write EEWR timed out\n"); + goto out; + } + + IXGBE_WRITE_REG(hw, IXGBE_EEWR, eewr); + + status = ixgbe_poll_eerd_eewr_done(hw, IXGBE_NVM_POLL_WRITE); + if (status != IXGBE_SUCCESS) { + hw_dbg(hw, "Eeprom write EEWR timed out\n"); + goto out; + } + } + +out: + return status; +} + +/** + * ixgbe_write_eewr_generic - Write EEPROM word using EEWR + * @hw: pointer to hardware structure + * @offset: offset of word in the EEPROM to write + * @data: word write to the EEPROM + * + * Write a 16 bit word to the EEPROM using the EEWR register. + **/ +s32 ixgbe_write_eewr_generic(struct ixgbe_hw *hw, u16 offset, u16 data) +{ + return ixgbe_write_eewr_buffer_generic(hw, offset, 1, &data); +} + +/** + * ixgbe_poll_eerd_eewr_done - Poll EERD read or EEWR write status + * @hw: pointer to hardware structure + * @ee_reg: EEPROM flag for polling + * + * Polls the status bit (bit 1) of the EERD or EEWR to determine when the + * read or write is done respectively. + **/ +s32 ixgbe_poll_eerd_eewr_done(struct ixgbe_hw *hw, u32 ee_reg) +{ + u32 i; + u32 reg; + s32 status = IXGBE_ERR_EEPROM; + + DEBUGFUNC("ixgbe_poll_eerd_eewr_done"); + + for (i = 0; i < IXGBE_EERD_EEWR_ATTEMPTS; i++) { + if (ee_reg == IXGBE_NVM_POLL_READ) + reg = IXGBE_READ_REG(hw, IXGBE_EERD); + else + reg = IXGBE_READ_REG(hw, IXGBE_EEWR); + + if (reg & IXGBE_EEPROM_RW_REG_DONE) { + status = IXGBE_SUCCESS; + break; + } + usec_delay(5); + } + + if (i == IXGBE_EERD_EEWR_ATTEMPTS) + ERROR_REPORT1(IXGBE_ERROR_POLLING, + "EEPROM read/write done polling timed out"); + + return status; +} + +/** + * ixgbe_acquire_eeprom - Acquire EEPROM using bit-bang + * @hw: pointer to hardware structure + * + * Prepares EEPROM for access using bit-bang method. This function should + * be called before issuing a command to the EEPROM. + **/ +STATIC s32 ixgbe_acquire_eeprom(struct ixgbe_hw *hw) +{ + s32 status = IXGBE_SUCCESS; + u32 eec; + u32 i; + + DEBUGFUNC("ixgbe_acquire_eeprom"); + + if (hw->mac.ops.acquire_swfw_sync(hw, IXGBE_GSSR_EEP_SM) + != IXGBE_SUCCESS) + status = IXGBE_ERR_SWFW_SYNC; + + if (status == IXGBE_SUCCESS) { + eec = IXGBE_READ_REG(hw, IXGBE_EEC_BY_MAC(hw)); + + /* Request EEPROM Access */ + eec |= IXGBE_EEC_REQ; + IXGBE_WRITE_REG(hw, IXGBE_EEC_BY_MAC(hw), eec); + + for (i = 0; i < IXGBE_EEPROM_GRANT_ATTEMPTS; i++) { + eec = IXGBE_READ_REG(hw, IXGBE_EEC_BY_MAC(hw)); + if (eec & IXGBE_EEC_GNT) + break; + usec_delay(5); + } + + /* Release if grant not acquired */ + if (!(eec & IXGBE_EEC_GNT)) { + eec &= ~IXGBE_EEC_REQ; + IXGBE_WRITE_REG(hw, IXGBE_EEC_BY_MAC(hw), eec); + hw_dbg(hw, "Could not acquire EEPROM grant\n"); + + hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_EEP_SM); + status = IXGBE_ERR_EEPROM; + } + + /* Setup EEPROM for Read/Write */ + if (status == IXGBE_SUCCESS) { + /* Clear CS and SK */ + eec &= ~(IXGBE_EEC_CS | IXGBE_EEC_SK); + IXGBE_WRITE_REG(hw, IXGBE_EEC_BY_MAC(hw), eec); + IXGBE_WRITE_FLUSH(hw); + usec_delay(1); + } + } + return status; +} + +/** + * ixgbe_get_eeprom_semaphore - Get hardware semaphore + * @hw: pointer to hardware structure + * + * Sets the hardware semaphores so EEPROM access can occur for bit-bang method + **/ +STATIC s32 ixgbe_get_eeprom_semaphore(struct ixgbe_hw *hw) +{ + s32 status = IXGBE_ERR_EEPROM; + u32 timeout = 2000; + u32 i; + u32 swsm; + + DEBUGFUNC("ixgbe_get_eeprom_semaphore"); + + /* Get SMBI software semaphore between device drivers first */ + for (i = 0; i < timeout; i++) { + /* + * If the SMBI bit is 0 when we read it, then the bit will be + * set and we have the semaphore + */ + swsm = IXGBE_READ_REG(hw, IXGBE_SWSM_BY_MAC(hw)); + if (!(swsm & IXGBE_SWSM_SMBI)) { + status = IXGBE_SUCCESS; + break; + } + usec_delay(50); + } + + if (i == timeout) { + hw_dbg(hw, "Driver can't access the Eeprom - SMBI Semaphore " + "not granted.\n"); + /* + * this release is particularly important because our attempts + * above to get the semaphore may have succeeded, and if there + * was a timeout, we should unconditionally clear the semaphore + * bits to free the driver to make progress + */ + ixgbe_release_eeprom_semaphore(hw); + + usec_delay(50); + /* + * one last try + * If the SMBI bit is 0 when we read it, then the bit will be + * set and we have the semaphore + */ + swsm = IXGBE_READ_REG(hw, IXGBE_SWSM_BY_MAC(hw)); + if (!(swsm & IXGBE_SWSM_SMBI)) + status = IXGBE_SUCCESS; + } + + /* Now get the semaphore between SW/FW through the SWESMBI bit */ + if (status == IXGBE_SUCCESS) { + for (i = 0; i < timeout; i++) { + swsm = IXGBE_READ_REG(hw, IXGBE_SWSM_BY_MAC(hw)); + + /* Set the SW EEPROM semaphore bit to request access */ + swsm |= IXGBE_SWSM_SWESMBI; + IXGBE_WRITE_REG(hw, IXGBE_SWSM_BY_MAC(hw), swsm); + + /* + * If we set the bit successfully then we got the + * semaphore. + */ + swsm = IXGBE_READ_REG(hw, IXGBE_SWSM_BY_MAC(hw)); + if (swsm & IXGBE_SWSM_SWESMBI) + break; + + usec_delay(50); + } + + /* + * Release semaphores and return error if SW EEPROM semaphore + * was not granted because we don't have access to the EEPROM + */ + if (i >= timeout) { + ERROR_REPORT1(IXGBE_ERROR_POLLING, + "SWESMBI Software EEPROM semaphore not granted.\n"); + ixgbe_release_eeprom_semaphore(hw); + status = IXGBE_ERR_EEPROM; + } + } else { + ERROR_REPORT1(IXGBE_ERROR_POLLING, + "Software semaphore SMBI between device drivers " + "not granted.\n"); + } + + return status; +} + +/** + * ixgbe_release_eeprom_semaphore - Release hardware semaphore + * @hw: pointer to hardware structure + * + * This function clears hardware semaphore bits. + **/ +STATIC void ixgbe_release_eeprom_semaphore(struct ixgbe_hw *hw) +{ + u32 swsm; + + DEBUGFUNC("ixgbe_release_eeprom_semaphore"); + + swsm = IXGBE_READ_REG(hw, IXGBE_SWSM); + + /* Release both semaphores by writing 0 to the bits SWESMBI and SMBI */ + swsm &= ~(IXGBE_SWSM_SWESMBI | IXGBE_SWSM_SMBI); + IXGBE_WRITE_REG(hw, IXGBE_SWSM, swsm); + IXGBE_WRITE_FLUSH(hw); +} + +/** + * ixgbe_ready_eeprom - Polls for EEPROM ready + * @hw: pointer to hardware structure + **/ +STATIC s32 ixgbe_ready_eeprom(struct ixgbe_hw *hw) +{ + s32 status = IXGBE_SUCCESS; + u16 i; + u8 spi_stat_reg; + + DEBUGFUNC("ixgbe_ready_eeprom"); + + /* + * Read "Status Register" repeatedly until the LSB is cleared. The + * EEPROM will signal that the command has been completed by clearing + * bit 0 of the internal status register. If it's not cleared within + * 5 milliseconds, then error out. + */ + for (i = 0; i < IXGBE_EEPROM_MAX_RETRY_SPI; i += 5) { + ixgbe_shift_out_eeprom_bits(hw, IXGBE_EEPROM_RDSR_OPCODE_SPI, + IXGBE_EEPROM_OPCODE_BITS); + spi_stat_reg = (u8)ixgbe_shift_in_eeprom_bits(hw, 8); + if (!(spi_stat_reg & IXGBE_EEPROM_STATUS_RDY_SPI)) + break; + + usec_delay(5); + ixgbe_standby_eeprom(hw); + }; + + /* + * On some parts, SPI write time could vary from 0-20mSec on 3.3V + * devices (and only 0-5mSec on 5V devices) + */ + if (i >= IXGBE_EEPROM_MAX_RETRY_SPI) { + hw_dbg(hw, "SPI EEPROM Status error\n"); + status = IXGBE_ERR_EEPROM; + } + + return status; +} + +/** + * ixgbe_standby_eeprom - Returns EEPROM to a "standby" state + * @hw: pointer to hardware structure + **/ +STATIC void ixgbe_standby_eeprom(struct ixgbe_hw *hw) +{ + u32 eec; + + DEBUGFUNC("ixgbe_standby_eeprom"); + + eec = IXGBE_READ_REG(hw, IXGBE_EEC_BY_MAC(hw)); + + /* Toggle CS to flush commands */ + eec |= IXGBE_EEC_CS; + IXGBE_WRITE_REG(hw, IXGBE_EEC_BY_MAC(hw), eec); + IXGBE_WRITE_FLUSH(hw); + usec_delay(1); + eec &= ~IXGBE_EEC_CS; + IXGBE_WRITE_REG(hw, IXGBE_EEC_BY_MAC(hw), eec); + IXGBE_WRITE_FLUSH(hw); + usec_delay(1); +} + +/** + * ixgbe_shift_out_eeprom_bits - Shift data bits out to the EEPROM. + * @hw: pointer to hardware structure + * @data: data to send to the EEPROM + * @count: number of bits to shift out + **/ +STATIC void ixgbe_shift_out_eeprom_bits(struct ixgbe_hw *hw, u16 data, + u16 count) +{ + u32 eec; + u32 mask; + u32 i; + + DEBUGFUNC("ixgbe_shift_out_eeprom_bits"); + + eec = IXGBE_READ_REG(hw, IXGBE_EEC_BY_MAC(hw)); + + /* + * Mask is used to shift "count" bits of "data" out to the EEPROM + * one bit at a time. Determine the starting bit based on count + */ + mask = 0x01 << (count - 1); + + for (i = 0; i < count; i++) { + /* + * A "1" is shifted out to the EEPROM by setting bit "DI" to a + * "1", and then raising and then lowering the clock (the SK + * bit controls the clock input to the EEPROM). A "0" is + * shifted out to the EEPROM by setting "DI" to "0" and then + * raising and then lowering the clock. + */ + if (data & mask) + eec |= IXGBE_EEC_DI; + else + eec &= ~IXGBE_EEC_DI; + + IXGBE_WRITE_REG(hw, IXGBE_EEC_BY_MAC(hw), eec); + IXGBE_WRITE_FLUSH(hw); + + usec_delay(1); + + ixgbe_raise_eeprom_clk(hw, &eec); + ixgbe_lower_eeprom_clk(hw, &eec); + + /* + * Shift mask to signify next bit of data to shift in to the + * EEPROM + */ + mask = mask >> 1; + }; + + /* We leave the "DI" bit set to "0" when we leave this routine. */ + eec &= ~IXGBE_EEC_DI; + IXGBE_WRITE_REG(hw, IXGBE_EEC_BY_MAC(hw), eec); + IXGBE_WRITE_FLUSH(hw); +} + +/** + * ixgbe_shift_in_eeprom_bits - Shift data bits in from the EEPROM + * @hw: pointer to hardware structure + * @count: number of bits to shift + **/ +STATIC u16 ixgbe_shift_in_eeprom_bits(struct ixgbe_hw *hw, u16 count) +{ + u32 eec; + u32 i; + u16 data = 0; + + DEBUGFUNC("ixgbe_shift_in_eeprom_bits"); + + /* + * In order to read a register from the EEPROM, we need to shift + * 'count' bits in from the EEPROM. Bits are "shifted in" by raising + * the clock input to the EEPROM (setting the SK bit), and then reading + * the value of the "DO" bit. During this "shifting in" process the + * "DI" bit should always be clear. + */ + eec = IXGBE_READ_REG(hw, IXGBE_EEC_BY_MAC(hw)); + + eec &= ~(IXGBE_EEC_DO | IXGBE_EEC_DI); + + for (i = 0; i < count; i++) { + data = data << 1; + ixgbe_raise_eeprom_clk(hw, &eec); + + eec = IXGBE_READ_REG(hw, IXGBE_EEC_BY_MAC(hw)); + + eec &= ~(IXGBE_EEC_DI); + if (eec & IXGBE_EEC_DO) + data |= 1; + + ixgbe_lower_eeprom_clk(hw, &eec); + } + + return data; +} + +/** + * ixgbe_raise_eeprom_clk - Raises the EEPROM's clock input. + * @hw: pointer to hardware structure + * @eec: EEC register's current value + **/ +STATIC void ixgbe_raise_eeprom_clk(struct ixgbe_hw *hw, u32 *eec) +{ + DEBUGFUNC("ixgbe_raise_eeprom_clk"); + + /* + * Raise the clock input to the EEPROM + * (setting the SK bit), then delay + */ + *eec = *eec | IXGBE_EEC_SK; + IXGBE_WRITE_REG(hw, IXGBE_EEC_BY_MAC(hw), *eec); + IXGBE_WRITE_FLUSH(hw); + usec_delay(1); +} + +/** + * ixgbe_lower_eeprom_clk - Lowers the EEPROM's clock input. + * @hw: pointer to hardware structure + * @eec: EEC's current value + **/ +STATIC void ixgbe_lower_eeprom_clk(struct ixgbe_hw *hw, u32 *eec) +{ + DEBUGFUNC("ixgbe_lower_eeprom_clk"); + + /* + * Lower the clock input to the EEPROM (clearing the SK bit), then + * delay + */ + *eec = *eec & ~IXGBE_EEC_SK; + IXGBE_WRITE_REG(hw, IXGBE_EEC_BY_MAC(hw), *eec); + IXGBE_WRITE_FLUSH(hw); + usec_delay(1); +} + +/** + * ixgbe_release_eeprom - Release EEPROM, release semaphores + * @hw: pointer to hardware structure + **/ +STATIC void ixgbe_release_eeprom(struct ixgbe_hw *hw) +{ + u32 eec; + + DEBUGFUNC("ixgbe_release_eeprom"); + + eec = IXGBE_READ_REG(hw, IXGBE_EEC_BY_MAC(hw)); + + eec |= IXGBE_EEC_CS; /* Pull CS high */ + eec &= ~IXGBE_EEC_SK; /* Lower SCK */ + + IXGBE_WRITE_REG(hw, IXGBE_EEC_BY_MAC(hw), eec); + IXGBE_WRITE_FLUSH(hw); + + usec_delay(1); + + /* Stop requesting EEPROM access */ + eec &= ~IXGBE_EEC_REQ; + IXGBE_WRITE_REG(hw, IXGBE_EEC_BY_MAC(hw), eec); + + hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_EEP_SM); + + /* Delay before attempt to obtain semaphore again to allow FW access */ + msec_delay(hw->eeprom.semaphore_delay); +} + +/** + * ixgbe_calc_eeprom_checksum_generic - Calculates and returns the checksum + * @hw: pointer to hardware structure + * + * Returns a negative error code on error, or the 16-bit checksum + **/ +s32 ixgbe_calc_eeprom_checksum_generic(struct ixgbe_hw *hw) +{ + u16 i; + u16 j; + u16 checksum = 0; + u16 length = 0; + u16 pointer = 0; + u16 word = 0; + + DEBUGFUNC("ixgbe_calc_eeprom_checksum_generic"); + + /* Include 0x0-0x3F in the checksum */ + for (i = 0; i < IXGBE_EEPROM_CHECKSUM; i++) { + if (hw->eeprom.ops.read(hw, i, &word)) { + hw_dbg(hw, "EEPROM read failed\n"); + return IXGBE_ERR_EEPROM; + } + checksum += word; + } + + /* Include all data from pointers except for the fw pointer */ + for (i = IXGBE_PCIE_ANALOG_PTR; i < IXGBE_FW_PTR; i++) { + if (hw->eeprom.ops.read(hw, i, &pointer)) { + hw_dbg(hw, "EEPROM read failed\n"); + return IXGBE_ERR_EEPROM; + } + + /* If the pointer seems invalid */ + if (pointer == 0xFFFF || pointer == 0) + continue; + + if (hw->eeprom.ops.read(hw, pointer, &length)) { + hw_dbg(hw, "EEPROM read failed\n"); + return IXGBE_ERR_EEPROM; + } + + if (length == 0xFFFF || length == 0) + continue; + + for (j = pointer + 1; j <= pointer + length; j++) { + if (hw->eeprom.ops.read(hw, j, &word)) { + hw_dbg(hw, "EEPROM read failed\n"); + return IXGBE_ERR_EEPROM; + } + checksum += word; + } + } + + checksum = (u16)IXGBE_EEPROM_SUM - checksum; + + return (s32)checksum; +} + +/** + * ixgbe_validate_eeprom_checksum_generic - Validate EEPROM checksum + * @hw: pointer to hardware structure + * @checksum_val: calculated checksum + * + * Performs checksum calculation and validates the EEPROM checksum. If the + * caller does not need checksum_val, the value can be NULL. + **/ +s32 ixgbe_validate_eeprom_checksum_generic(struct ixgbe_hw *hw, + u16 *checksum_val) +{ + s32 status; + u16 checksum; + u16 read_checksum = 0; + + DEBUGFUNC("ixgbe_validate_eeprom_checksum_generic"); + + /* Read the first word from the EEPROM. If this times out or fails, do + * not continue or we could be in for a very long wait while every + * EEPROM read fails + */ + status = hw->eeprom.ops.read(hw, 0, &checksum); + if (status) { + hw_dbg(hw, "EEPROM read failed\n"); + return status; + } + + status = hw->eeprom.ops.calc_checksum(hw); + if (status < 0) + return status; + + checksum = (u16)(status & 0xffff); + + status = hw->eeprom.ops.read(hw, IXGBE_EEPROM_CHECKSUM, &read_checksum); + if (status) { + hw_dbg(hw, "EEPROM read failed\n"); + return status; + } + + /* Verify read checksum from EEPROM is the same as + * calculated checksum + */ + if (read_checksum != checksum) + status = IXGBE_ERR_EEPROM_CHECKSUM; + + /* If the user cares, return the calculated checksum */ + if (checksum_val) + *checksum_val = checksum; + + return status; +} + +/** + * ixgbe_update_eeprom_checksum_generic - Updates the EEPROM checksum + * @hw: pointer to hardware structure + **/ +s32 ixgbe_update_eeprom_checksum_generic(struct ixgbe_hw *hw) +{ + s32 status; + u16 checksum; + + DEBUGFUNC("ixgbe_update_eeprom_checksum_generic"); + + /* Read the first word from the EEPROM. If this times out or fails, do + * not continue or we could be in for a very long wait while every + * EEPROM read fails + */ + status = hw->eeprom.ops.read(hw, 0, &checksum); + if (status) { + hw_dbg(hw, "EEPROM read failed\n"); + return status; + } + + status = hw->eeprom.ops.calc_checksum(hw); + if (status < 0) + return status; + + checksum = (u16)(status & 0xffff); + + status = hw->eeprom.ops.write(hw, IXGBE_EEPROM_CHECKSUM, checksum); + + return status; +} + +/** + * ixgbe_validate_mac_addr - Validate MAC address + * @mac_addr: pointer to MAC address. + * + * Tests a MAC address to ensure it is a valid Individual Address. + **/ +s32 ixgbe_validate_mac_addr(u8 *mac_addr) +{ + s32 status = IXGBE_SUCCESS; + + DEBUGFUNC("ixgbe_validate_mac_addr"); + + /* Make sure it is not a multicast address */ + if (IXGBE_IS_MULTICAST(mac_addr)) { + status = IXGBE_ERR_INVALID_MAC_ADDR; + /* Not a broadcast address */ + } else if (IXGBE_IS_BROADCAST(mac_addr)) { + status = IXGBE_ERR_INVALID_MAC_ADDR; + /* Reject the zero address */ + } else if (mac_addr[0] == 0 && mac_addr[1] == 0 && mac_addr[2] == 0 && + mac_addr[3] == 0 && mac_addr[4] == 0 && mac_addr[5] == 0) { + status = IXGBE_ERR_INVALID_MAC_ADDR; + } + return status; +} + +/** + * ixgbe_set_rar_generic - Set Rx address register + * @hw: pointer to hardware structure + * @index: Receive address register to write + * @addr: Address to put into receive address register + * @vmdq: VMDq "set" or "pool" index + * @enable_addr: set flag that address is active + * + * Puts an ethernet address into a receive address register. + **/ +s32 ixgbe_set_rar_generic(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq, + u32 enable_addr) +{ + u32 rar_low, rar_high; + u32 rar_entries = hw->mac.num_rar_entries; + + DEBUGFUNC("ixgbe_set_rar_generic"); + + /* Make sure we are using a valid rar index range */ + if (index >= rar_entries) { + ERROR_REPORT2(IXGBE_ERROR_ARGUMENT, + "RAR index %d is out of range.\n", index); + return IXGBE_ERR_INVALID_ARGUMENT; + } + + /* setup VMDq pool selection before this RAR gets enabled */ + hw->mac.ops.set_vmdq(hw, index, vmdq); + + /* + * HW expects these in little endian so we reverse the byte + * order from network order (big endian) to little endian + */ + rar_low = ((u32)addr[0] | + ((u32)addr[1] << 8) | + ((u32)addr[2] << 16) | + ((u32)addr[3] << 24)); + /* + * Some parts put the VMDq setting in the extra RAH bits, + * so save everything except the lower 16 bits that hold part + * of the address and the address valid bit. + */ + rar_high = IXGBE_READ_REG(hw, IXGBE_RAH(index)); + rar_high &= ~(0x0000FFFF | IXGBE_RAH_AV); + rar_high |= ((u32)addr[4] | ((u32)addr[5] << 8)); + + if (enable_addr != 0) + rar_high |= IXGBE_RAH_AV; + + IXGBE_WRITE_REG(hw, IXGBE_RAL(index), rar_low); + IXGBE_WRITE_REG(hw, IXGBE_RAH(index), rar_high); + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_clear_rar_generic - Remove Rx address register + * @hw: pointer to hardware structure + * @index: Receive address register to write + * + * Clears an ethernet address from a receive address register. + **/ +s32 ixgbe_clear_rar_generic(struct ixgbe_hw *hw, u32 index) +{ + u32 rar_high; + u32 rar_entries = hw->mac.num_rar_entries; + + DEBUGFUNC("ixgbe_clear_rar_generic"); + + /* Make sure we are using a valid rar index range */ + if (index >= rar_entries) { + ERROR_REPORT2(IXGBE_ERROR_ARGUMENT, + "RAR index %d is out of range.\n", index); + return IXGBE_ERR_INVALID_ARGUMENT; + } + + /* + * Some parts put the VMDq setting in the extra RAH bits, + * so save everything except the lower 16 bits that hold part + * of the address and the address valid bit. + */ + rar_high = IXGBE_READ_REG(hw, IXGBE_RAH(index)); + rar_high &= ~(0x0000FFFF | IXGBE_RAH_AV); + + IXGBE_WRITE_REG(hw, IXGBE_RAL(index), 0); + IXGBE_WRITE_REG(hw, IXGBE_RAH(index), rar_high); + + /* clear VMDq pool/queue selection for this RAR */ + hw->mac.ops.clear_vmdq(hw, index, IXGBE_CLEAR_VMDQ_ALL); + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_init_rx_addrs_generic - Initializes receive address filters. + * @hw: pointer to hardware structure + * + * Places the MAC address in receive address register 0 and clears the rest + * of the receive address registers. Clears the multicast table. Assumes + * the receiver is in reset when the routine is called. + **/ +s32 ixgbe_init_rx_addrs_generic(struct ixgbe_hw *hw) +{ + u32 i; + u32 rar_entries = hw->mac.num_rar_entries; + + DEBUGFUNC("ixgbe_init_rx_addrs_generic"); + + /* + * If the current mac address is valid, assume it is a software override + * to the permanent address. + * Otherwise, use the permanent address from the eeprom. + */ + if (ixgbe_validate_mac_addr(hw->mac.addr) == + IXGBE_ERR_INVALID_MAC_ADDR) { + /* Get the MAC address from the RAR0 for later reference */ + hw->mac.ops.get_mac_addr(hw, hw->mac.addr); + + hw_dbg(hw, " Keeping Current RAR0 Addr =%.2X %.2X %.2X ", + hw->mac.addr[0], hw->mac.addr[1], + hw->mac.addr[2]); + hw_dbg(hw, "%.2X %.2X %.2X\n", hw->mac.addr[3], + hw->mac.addr[4], hw->mac.addr[5]); + } else { + /* Setup the receive address. */ + hw_dbg(hw, "Overriding MAC Address in RAR[0]\n"); + hw_dbg(hw, " New MAC Addr =%.2X %.2X %.2X ", + hw->mac.addr[0], hw->mac.addr[1], + hw->mac.addr[2]); + hw_dbg(hw, "%.2X %.2X %.2X\n", hw->mac.addr[3], + hw->mac.addr[4], hw->mac.addr[5]); + + hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0, IXGBE_RAH_AV); + } + + /* clear VMDq pool/queue selection for RAR 0 */ + hw->mac.ops.clear_vmdq(hw, 0, IXGBE_CLEAR_VMDQ_ALL); + + hw->addr_ctrl.overflow_promisc = 0; + + hw->addr_ctrl.rar_used_count = 1; + + /* Zero out the other receive addresses. */ + hw_dbg(hw, "Clearing RAR[1-%d]\n", rar_entries - 1); + for (i = 1; i < rar_entries; i++) { + IXGBE_WRITE_REG(hw, IXGBE_RAL(i), 0); + IXGBE_WRITE_REG(hw, IXGBE_RAH(i), 0); + } + + /* Clear the MTA */ + hw->addr_ctrl.mta_in_use = 0; + IXGBE_WRITE_REG(hw, IXGBE_MCSTCTRL, hw->mac.mc_filter_type); + + hw_dbg(hw, " Clearing MTA\n"); + for (i = 0; i < hw->mac.mcft_size; i++) + IXGBE_WRITE_REG(hw, IXGBE_MTA(i), 0); + + ixgbe_init_uta_tables(hw); + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_add_uc_addr - Adds a secondary unicast address. + * @hw: pointer to hardware structure + * @addr: new address + * @vmdq: VMDq "set" or "pool" index + * + * Adds it to unused receive address register or goes into promiscuous mode. + **/ +void ixgbe_add_uc_addr(struct ixgbe_hw *hw, u8 *addr, u32 vmdq) +{ + u32 rar_entries = hw->mac.num_rar_entries; + u32 rar; + + DEBUGFUNC("ixgbe_add_uc_addr"); + + hw_dbg(hw, " UC Addr = %.2X %.2X %.2X %.2X %.2X %.2X\n", + addr[0], addr[1], addr[2], addr[3], addr[4], addr[5]); + + /* + * Place this address in the RAR if there is room, + * else put the controller into promiscuous mode + */ + if (hw->addr_ctrl.rar_used_count < rar_entries) { + rar = hw->addr_ctrl.rar_used_count; + hw->mac.ops.set_rar(hw, rar, addr, vmdq, IXGBE_RAH_AV); + hw_dbg(hw, "Added a secondary address to RAR[%d]\n", rar); + hw->addr_ctrl.rar_used_count++; + } else { + hw->addr_ctrl.overflow_promisc++; + } + + hw_dbg(hw, "ixgbe_add_uc_addr Complete\n"); +} + +/** + * ixgbe_update_uc_addr_list_generic - Updates MAC list of secondary addresses + * @hw: pointer to hardware structure + * @addr_list: the list of new addresses + * @addr_count: number of addresses + * @next: iterator function to walk the address list + * + * The given list replaces any existing list. Clears the secondary addrs from + * receive address registers. Uses unused receive address registers for the + * first secondary addresses, and falls back to promiscuous mode as needed. + * + * Drivers using secondary unicast addresses must set user_set_promisc when + * manually putting the device into promiscuous mode. + **/ +s32 ixgbe_update_uc_addr_list_generic(struct ixgbe_hw *hw, u8 *addr_list, + u32 addr_count, ixgbe_mc_addr_itr next) +{ + u8 *addr; + u32 i; + u32 old_promisc_setting = hw->addr_ctrl.overflow_promisc; + u32 uc_addr_in_use; + u32 fctrl; + u32 vmdq; + + DEBUGFUNC("ixgbe_update_uc_addr_list_generic"); + + /* + * Clear accounting of old secondary address list, + * don't count RAR[0] + */ + uc_addr_in_use = hw->addr_ctrl.rar_used_count - 1; + hw->addr_ctrl.rar_used_count -= uc_addr_in_use; + hw->addr_ctrl.overflow_promisc = 0; + + /* Zero out the other receive addresses */ + hw_dbg(hw, "Clearing RAR[1-%d]\n", uc_addr_in_use+1); + for (i = 0; i < uc_addr_in_use; i++) { + IXGBE_WRITE_REG(hw, IXGBE_RAL(1+i), 0); + IXGBE_WRITE_REG(hw, IXGBE_RAH(1+i), 0); + } + + /* Add the new addresses */ + for (i = 0; i < addr_count; i++) { + hw_dbg(hw, " Adding the secondary addresses:\n"); + addr = next(hw, &addr_list, &vmdq); + ixgbe_add_uc_addr(hw, addr, vmdq); + } + + if (hw->addr_ctrl.overflow_promisc) { + /* enable promisc if not already in overflow or set by user */ + if (!old_promisc_setting && !hw->addr_ctrl.user_set_promisc) { + hw_dbg(hw, " Entering address overflow promisc mode\n"); + fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL); + fctrl |= IXGBE_FCTRL_UPE; + IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl); + } + } else { + /* only disable if set by overflow, not by user */ + if (old_promisc_setting && !hw->addr_ctrl.user_set_promisc) { + hw_dbg(hw, " Leaving address overflow promisc mode\n"); + fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL); + fctrl &= ~IXGBE_FCTRL_UPE; + IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl); + } + } + + hw_dbg(hw, "ixgbe_update_uc_addr_list_generic Complete\n"); + return IXGBE_SUCCESS; +} + +/** + * ixgbe_mta_vector - Determines bit-vector in multicast table to set + * @hw: pointer to hardware structure + * @mc_addr: the multicast address + * + * Extracts the 12 bits, from a multicast address, to determine which + * bit-vector to set in the multicast table. The hardware uses 12 bits, from + * incoming rx multicast addresses, to determine the bit-vector to check in + * the MTA. Which of the 4 combination, of 12-bits, the hardware uses is set + * by the MO field of the MCSTCTRL. The MO field is set during initialization + * to mc_filter_type. + **/ +STATIC s32 ixgbe_mta_vector(struct ixgbe_hw *hw, u8 *mc_addr) +{ + u32 vector = 0; + + DEBUGFUNC("ixgbe_mta_vector"); + + switch (hw->mac.mc_filter_type) { + case 0: /* use bits [47:36] of the address */ + vector = ((mc_addr[4] >> 4) | (((u16)mc_addr[5]) << 4)); + break; + case 1: /* use bits [46:35] of the address */ + vector = ((mc_addr[4] >> 3) | (((u16)mc_addr[5]) << 5)); + break; + case 2: /* use bits [45:34] of the address */ + vector = ((mc_addr[4] >> 2) | (((u16)mc_addr[5]) << 6)); + break; + case 3: /* use bits [43:32] of the address */ + vector = ((mc_addr[4]) | (((u16)mc_addr[5]) << 8)); + break; + default: /* Invalid mc_filter_type */ + hw_dbg(hw, "MC filter type param set incorrectly\n"); + ASSERT(0); + break; + } + + /* vector can only be 12-bits or boundary will be exceeded */ + vector &= 0xFFF; + return vector; +} + +/** + * ixgbe_set_mta - Set bit-vector in multicast table + * @hw: pointer to hardware structure + * @mc_addr: Multicast address + * + * Sets the bit-vector in the multicast table. + **/ +void ixgbe_set_mta(struct ixgbe_hw *hw, u8 *mc_addr) +{ + u32 vector; + u32 vector_bit; + u32 vector_reg; + + DEBUGFUNC("ixgbe_set_mta"); + + hw->addr_ctrl.mta_in_use++; + + vector = ixgbe_mta_vector(hw, mc_addr); + hw_dbg(hw, " bit-vector = 0x%03X\n", vector); + + /* + * The MTA is a register array of 128 32-bit registers. It is treated + * like an array of 4096 bits. We want to set bit + * BitArray[vector_value]. So we figure out what register the bit is + * in, read it, OR in the new bit, then write back the new value. The + * register is determined by the upper 7 bits of the vector value and + * the bit within that register are determined by the lower 5 bits of + * the value. + */ + vector_reg = (vector >> 5) & 0x7F; + vector_bit = vector & 0x1F; + hw->mac.mta_shadow[vector_reg] |= (1 << vector_bit); +} + +/** + * ixgbe_update_mc_addr_list_generic - Updates MAC list of multicast addresses + * @hw: pointer to hardware structure + * @mc_addr_list: the list of new multicast addresses + * @mc_addr_count: number of addresses + * @next: iterator function to walk the multicast address list + * @clear: flag, when set clears the table beforehand + * + * When the clear flag is set, the given list replaces any existing list. + * Hashes the given addresses into the multicast table. + **/ +s32 ixgbe_update_mc_addr_list_generic(struct ixgbe_hw *hw, u8 *mc_addr_list, + u32 mc_addr_count, ixgbe_mc_addr_itr next, + bool clear) +{ + u32 i; + u32 vmdq; + + DEBUGFUNC("ixgbe_update_mc_addr_list_generic"); + + /* + * Set the new number of MC addresses that we are being requested to + * use. + */ + hw->addr_ctrl.num_mc_addrs = mc_addr_count; + hw->addr_ctrl.mta_in_use = 0; + + /* Clear mta_shadow */ + if (clear) { + hw_dbg(hw, " Clearing MTA\n"); + memset(&hw->mac.mta_shadow, 0, sizeof(hw->mac.mta_shadow)); + } + + /* Update mta_shadow */ + for (i = 0; i < mc_addr_count; i++) { + hw_dbg(hw, " Adding the multicast addresses:\n"); + ixgbe_set_mta(hw, next(hw, &mc_addr_list, &vmdq)); + } + + /* Enable mta */ + for (i = 0; i < hw->mac.mcft_size; i++) + IXGBE_WRITE_REG_ARRAY(hw, IXGBE_MTA(0), i, + hw->mac.mta_shadow[i]); + + if (hw->addr_ctrl.mta_in_use > 0) + IXGBE_WRITE_REG(hw, IXGBE_MCSTCTRL, + IXGBE_MCSTCTRL_MFE | hw->mac.mc_filter_type); + + hw_dbg(hw, "ixgbe_update_mc_addr_list_generic Complete\n"); + return IXGBE_SUCCESS; +} + +/** + * ixgbe_enable_mc_generic - Enable multicast address in RAR + * @hw: pointer to hardware structure + * + * Enables multicast address in RAR and the use of the multicast hash table. + **/ +s32 ixgbe_enable_mc_generic(struct ixgbe_hw *hw) +{ + struct ixgbe_addr_filter_info *a = &hw->addr_ctrl; + + DEBUGFUNC("ixgbe_enable_mc_generic"); + + if (a->mta_in_use > 0) + IXGBE_WRITE_REG(hw, IXGBE_MCSTCTRL, IXGBE_MCSTCTRL_MFE | + hw->mac.mc_filter_type); + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_disable_mc_generic - Disable multicast address in RAR + * @hw: pointer to hardware structure + * + * Disables multicast address in RAR and the use of the multicast hash table. + **/ +s32 ixgbe_disable_mc_generic(struct ixgbe_hw *hw) +{ + struct ixgbe_addr_filter_info *a = &hw->addr_ctrl; + + DEBUGFUNC("ixgbe_disable_mc_generic"); + + if (a->mta_in_use > 0) + IXGBE_WRITE_REG(hw, IXGBE_MCSTCTRL, hw->mac.mc_filter_type); + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_fc_enable_generic - Enable flow control + * @hw: pointer to hardware structure + * + * Enable flow control according to the current settings. + **/ +s32 ixgbe_fc_enable_generic(struct ixgbe_hw *hw) +{ + s32 ret_val = IXGBE_SUCCESS; + u32 mflcn_reg, fccfg_reg; + u32 reg; + u32 fcrtl, fcrth; + int i; + + DEBUGFUNC("ixgbe_fc_enable_generic"); + + /* Validate the water mark configuration */ + if (!hw->fc.pause_time) { + ret_val = IXGBE_ERR_INVALID_LINK_SETTINGS; + goto out; + } + + /* Low water mark of zero causes XOFF floods */ + for (i = 0; i < IXGBE_DCB_MAX_TRAFFIC_CLASS; i++) { + if ((hw->fc.current_mode & ixgbe_fc_tx_pause) && + hw->fc.high_water[i]) { + if (!hw->fc.low_water[i] || + hw->fc.low_water[i] >= hw->fc.high_water[i]) { + hw_dbg(hw, "Invalid water mark configuration\n"); + ret_val = IXGBE_ERR_INVALID_LINK_SETTINGS; + goto out; + } + } + } + + /* Negotiate the fc mode to use */ + hw->mac.ops.fc_autoneg(hw); + + /* Disable any previous flow control settings */ + mflcn_reg = IXGBE_READ_REG(hw, IXGBE_MFLCN); + mflcn_reg &= ~(IXGBE_MFLCN_RPFCE_MASK | IXGBE_MFLCN_RFCE); + + fccfg_reg = IXGBE_READ_REG(hw, IXGBE_FCCFG); + fccfg_reg &= ~(IXGBE_FCCFG_TFCE_802_3X | IXGBE_FCCFG_TFCE_PRIORITY); + + /* + * The possible values of fc.current_mode are: + * 0: Flow control is completely disabled + * 1: Rx flow control is enabled (we can receive pause frames, + * but not send pause frames). + * 2: Tx flow control is enabled (we can send pause frames but + * we do not support receiving pause frames). + * 3: Both Rx and Tx flow control (symmetric) are enabled. + * other: Invalid. + */ + switch (hw->fc.current_mode) { + case ixgbe_fc_none: + /* + * Flow control is disabled by software override or autoneg. + * The code below will actually disable it in the HW. + */ + break; + case ixgbe_fc_rx_pause: + /* + * Rx Flow control is enabled and Tx Flow control is + * disabled by software override. Since there really + * isn't a way to advertise that we are capable of RX + * Pause ONLY, we will advertise that we support both + * symmetric and asymmetric Rx PAUSE. Later, we will + * disable the adapter's ability to send PAUSE frames. + */ + mflcn_reg |= IXGBE_MFLCN_RFCE; + break; + case ixgbe_fc_tx_pause: + /* + * Tx Flow control is enabled, and Rx Flow control is + * disabled by software override. + */ + fccfg_reg |= IXGBE_FCCFG_TFCE_802_3X; + break; + case ixgbe_fc_full: + /* Flow control (both Rx and Tx) is enabled by SW override. */ + mflcn_reg |= IXGBE_MFLCN_RFCE; + fccfg_reg |= IXGBE_FCCFG_TFCE_802_3X; + break; + default: + ERROR_REPORT1(IXGBE_ERROR_ARGUMENT, + "Flow control param set incorrectly\n"); + ret_val = IXGBE_ERR_CONFIG; + goto out; + break; + } + + /* Set 802.3x based flow control settings. */ + mflcn_reg |= IXGBE_MFLCN_DPF; + IXGBE_WRITE_REG(hw, IXGBE_MFLCN, mflcn_reg); + IXGBE_WRITE_REG(hw, IXGBE_FCCFG, fccfg_reg); + + + /* Set up and enable Rx high/low water mark thresholds, enable XON. */ + for (i = 0; i < IXGBE_DCB_MAX_TRAFFIC_CLASS; i++) { + if ((hw->fc.current_mode & ixgbe_fc_tx_pause) && + hw->fc.high_water[i]) { + fcrtl = (hw->fc.low_water[i] << 10) | IXGBE_FCRTL_XONE; + IXGBE_WRITE_REG(hw, IXGBE_FCRTL_82599(i), fcrtl); + fcrth = (hw->fc.high_water[i] << 10) | IXGBE_FCRTH_FCEN; + } else { + IXGBE_WRITE_REG(hw, IXGBE_FCRTL_82599(i), 0); + /* + * In order to prevent Tx hangs when the internal Tx + * switch is enabled we must set the high water mark + * to the Rx packet buffer size - 24KB. This allows + * the Tx switch to function even under heavy Rx + * workloads. + */ + fcrth = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(i)) - 24576; + } + + IXGBE_WRITE_REG(hw, IXGBE_FCRTH_82599(i), fcrth); + } + + /* Configure pause time (2 TCs per register) */ + reg = hw->fc.pause_time * 0x00010001; + for (i = 0; i < (IXGBE_DCB_MAX_TRAFFIC_CLASS / 2); i++) + IXGBE_WRITE_REG(hw, IXGBE_FCTTV(i), reg); + + /* Configure flow control refresh threshold value */ + IXGBE_WRITE_REG(hw, IXGBE_FCRTV, hw->fc.pause_time / 2); + +out: + return ret_val; +} + +/** + * ixgbe_negotiate_fc - Negotiate flow control + * @hw: pointer to hardware structure + * @adv_reg: flow control advertised settings + * @lp_reg: link partner's flow control settings + * @adv_sym: symmetric pause bit in advertisement + * @adv_asm: asymmetric pause bit in advertisement + * @lp_sym: symmetric pause bit in link partner advertisement + * @lp_asm: asymmetric pause bit in link partner advertisement + * + * Find the intersection between advertised settings and link partner's + * advertised settings + **/ +s32 ixgbe_negotiate_fc(struct ixgbe_hw *hw, u32 adv_reg, u32 lp_reg, + u32 adv_sym, u32 adv_asm, u32 lp_sym, u32 lp_asm) +{ + if ((!(adv_reg)) || (!(lp_reg))) { + ERROR_REPORT3(IXGBE_ERROR_UNSUPPORTED, + "Local or link partner's advertised flow control " + "settings are NULL. Local: %x, link partner: %x\n", + adv_reg, lp_reg); + return IXGBE_ERR_FC_NOT_NEGOTIATED; + } + + if ((adv_reg & adv_sym) && (lp_reg & lp_sym)) { + /* + * Now we need to check if the user selected Rx ONLY + * of pause frames. In this case, we had to advertise + * FULL flow control because we could not advertise RX + * ONLY. Hence, we must now check to see if we need to + * turn OFF the TRANSMISSION of PAUSE frames. + */ + if (hw->fc.requested_mode == ixgbe_fc_full) { + hw->fc.current_mode = ixgbe_fc_full; + hw_dbg(hw, "Flow Control = FULL.\n"); + } else { + hw->fc.current_mode = ixgbe_fc_rx_pause; + hw_dbg(hw, "Flow Control=RX PAUSE frames only\n"); + } + } else if (!(adv_reg & adv_sym) && (adv_reg & adv_asm) && + (lp_reg & lp_sym) && (lp_reg & lp_asm)) { + hw->fc.current_mode = ixgbe_fc_tx_pause; + hw_dbg(hw, "Flow Control = TX PAUSE frames only.\n"); + } else if ((adv_reg & adv_sym) && (adv_reg & adv_asm) && + !(lp_reg & lp_sym) && (lp_reg & lp_asm)) { + hw->fc.current_mode = ixgbe_fc_rx_pause; + hw_dbg(hw, "Flow Control = RX PAUSE frames only.\n"); + } else { + hw->fc.current_mode = ixgbe_fc_none; + hw_dbg(hw, "Flow Control = NONE.\n"); + } + return IXGBE_SUCCESS; +} + +/** + * ixgbe_fc_autoneg_fiber - Enable flow control on 1 gig fiber + * @hw: pointer to hardware structure + * + * Enable flow control according on 1 gig fiber. + **/ +STATIC s32 ixgbe_fc_autoneg_fiber(struct ixgbe_hw *hw) +{ + u32 pcs_anadv_reg, pcs_lpab_reg, linkstat; + s32 ret_val = IXGBE_ERR_FC_NOT_NEGOTIATED; + + /* + * On multispeed fiber at 1g, bail out if + * - link is up but AN did not complete, or if + * - link is up and AN completed but timed out + */ + + linkstat = IXGBE_READ_REG(hw, IXGBE_PCS1GLSTA); + if ((!!(linkstat & IXGBE_PCS1GLSTA_AN_COMPLETE) == 0) || + (!!(linkstat & IXGBE_PCS1GLSTA_AN_TIMED_OUT) == 1)) { + hw_dbg(hw, "Auto-Negotiation did not complete or timed out\n"); + goto out; + } + + pcs_anadv_reg = IXGBE_READ_REG(hw, IXGBE_PCS1GANA); + pcs_lpab_reg = IXGBE_READ_REG(hw, IXGBE_PCS1GANLP); + + ret_val = ixgbe_negotiate_fc(hw, pcs_anadv_reg, + pcs_lpab_reg, IXGBE_PCS1GANA_SYM_PAUSE, + IXGBE_PCS1GANA_ASM_PAUSE, + IXGBE_PCS1GANA_SYM_PAUSE, + IXGBE_PCS1GANA_ASM_PAUSE); + +out: + return ret_val; +} + +/** + * ixgbe_fc_autoneg_backplane - Enable flow control IEEE clause 37 + * @hw: pointer to hardware structure + * + * Enable flow control according to IEEE clause 37. + **/ +STATIC s32 ixgbe_fc_autoneg_backplane(struct ixgbe_hw *hw) +{ + u32 links2, anlp1_reg, autoc_reg, links; + s32 ret_val = IXGBE_ERR_FC_NOT_NEGOTIATED; + + /* + * On backplane, bail out if + * - backplane autoneg was not completed, or if + * - we are 82599 and link partner is not AN enabled + */ + links = IXGBE_READ_REG(hw, IXGBE_LINKS); + if ((links & IXGBE_LINKS_KX_AN_COMP) == 0) { + hw_dbg(hw, "Auto-Negotiation did not complete\n"); + goto out; + } + + if (hw->mac.type == ixgbe_mac_82599EB) { + links2 = IXGBE_READ_REG(hw, IXGBE_LINKS2); + if ((links2 & IXGBE_LINKS2_AN_SUPPORTED) == 0) { + hw_dbg(hw, "Link partner is not AN enabled\n"); + goto out; + } + } + /* + * Read the 10g AN autoc and LP ability registers and resolve + * local flow control settings accordingly + */ + autoc_reg = IXGBE_READ_REG(hw, IXGBE_AUTOC); + anlp1_reg = IXGBE_READ_REG(hw, IXGBE_ANLP1); + + ret_val = ixgbe_negotiate_fc(hw, autoc_reg, + anlp1_reg, IXGBE_AUTOC_SYM_PAUSE, IXGBE_AUTOC_ASM_PAUSE, + IXGBE_ANLP1_SYM_PAUSE, IXGBE_ANLP1_ASM_PAUSE); + +out: + return ret_val; +} + +/** + * ixgbe_fc_autoneg_copper - Enable flow control IEEE clause 37 + * @hw: pointer to hardware structure + * + * Enable flow control according to IEEE clause 37. + **/ +STATIC s32 ixgbe_fc_autoneg_copper(struct ixgbe_hw *hw) +{ + u16 technology_ability_reg = 0; + u16 lp_technology_ability_reg = 0; + + hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_ADVT, + IXGBE_MDIO_AUTO_NEG_DEV_TYPE, + &technology_ability_reg); + hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_LP, + IXGBE_MDIO_AUTO_NEG_DEV_TYPE, + &lp_technology_ability_reg); + + return ixgbe_negotiate_fc(hw, (u32)technology_ability_reg, + (u32)lp_technology_ability_reg, + IXGBE_TAF_SYM_PAUSE, IXGBE_TAF_ASM_PAUSE, + IXGBE_TAF_SYM_PAUSE, IXGBE_TAF_ASM_PAUSE); +} + +/** + * ixgbe_fc_autoneg - Configure flow control + * @hw: pointer to hardware structure + * + * Compares our advertised flow control capabilities to those advertised by + * our link partner, and determines the proper flow control mode to use. + **/ +void ixgbe_fc_autoneg(struct ixgbe_hw *hw) +{ + s32 ret_val = IXGBE_ERR_FC_NOT_NEGOTIATED; + ixgbe_link_speed speed; + bool link_up; + + DEBUGFUNC("ixgbe_fc_autoneg"); + + /* + * AN should have completed when the cable was plugged in. + * Look for reasons to bail out. Bail out if: + * - FC autoneg is disabled, or if + * - link is not up. + */ + if (hw->fc.disable_fc_autoneg) { + /* TODO: This should be just an informative log */ + ERROR_REPORT1(IXGBE_ERROR_CAUTION, + "Flow control autoneg is disabled"); + goto out; + } + + hw->mac.ops.check_link(hw, &speed, &link_up, false); + if (!link_up) { + ERROR_REPORT1(IXGBE_ERROR_SOFTWARE, "The link is down"); + goto out; + } + + switch (hw->phy.media_type) { + /* Autoneg flow control on fiber adapters */ + case ixgbe_media_type_fiber_qsfp: + case ixgbe_media_type_fiber: + if (speed == IXGBE_LINK_SPEED_1GB_FULL) + ret_val = ixgbe_fc_autoneg_fiber(hw); + break; + + /* Autoneg flow control on backplane adapters */ + case ixgbe_media_type_backplane: + ret_val = ixgbe_fc_autoneg_backplane(hw); + break; + + /* Autoneg flow control on copper adapters */ + case ixgbe_media_type_copper: + if (ixgbe_device_supports_autoneg_fc(hw)) + ret_val = ixgbe_fc_autoneg_copper(hw); + break; + + default: + break; + } + +out: + if (ret_val == IXGBE_SUCCESS) { + hw->fc.fc_was_autonegged = true; + } else { + hw->fc.fc_was_autonegged = false; + hw->fc.current_mode = hw->fc.requested_mode; + } +} + +/* + * ixgbe_pcie_timeout_poll - Return number of times to poll for completion + * @hw: pointer to hardware structure + * + * System-wide timeout range is encoded in PCIe Device Control2 register. + * + * Add 10% to specified maximum and return the number of times to poll for + * completion timeout, in units of 100 microsec. Never return less than + * 800 = 80 millisec. + */ +STATIC u32 ixgbe_pcie_timeout_poll(struct ixgbe_hw *hw) +{ + s16 devctl2; + u32 pollcnt; + + devctl2 = IXGBE_READ_PCIE_WORD(hw, IXGBE_PCI_DEVICE_CONTROL2); + devctl2 &= IXGBE_PCIDEVCTRL2_TIMEO_MASK; + + switch (devctl2) { + case IXGBE_PCIDEVCTRL2_65_130ms: + pollcnt = 1300; /* 130 millisec */ + break; + case IXGBE_PCIDEVCTRL2_260_520ms: + pollcnt = 5200; /* 520 millisec */ + break; + case IXGBE_PCIDEVCTRL2_1_2s: + pollcnt = 20000; /* 2 sec */ + break; + case IXGBE_PCIDEVCTRL2_4_8s: + pollcnt = 80000; /* 8 sec */ + break; + case IXGBE_PCIDEVCTRL2_17_34s: + pollcnt = 34000; /* 34 sec */ + break; + case IXGBE_PCIDEVCTRL2_50_100us: /* 100 microsecs */ + case IXGBE_PCIDEVCTRL2_1_2ms: /* 2 millisecs */ + case IXGBE_PCIDEVCTRL2_16_32ms: /* 32 millisec */ + case IXGBE_PCIDEVCTRL2_16_32ms_def: /* 32 millisec default */ + default: + pollcnt = 800; /* 80 millisec minimum */ + break; + } + + /* add 10% to spec maximum */ + return (pollcnt * 11) / 10; +} + +/** + * ixgbe_disable_pcie_primary - Disable PCI-express primary access + * @hw: pointer to hardware structure + * + * Disables PCI-Express primary access and verifies there are no pending + * requests. IXGBE_ERR_PRIMARY_REQUESTS_PENDING is returned if primary disable + * bit hasn't caused the primary requests to be disabled, else IXGBE_SUCCESS + * is returned signifying primary requests disabled. + **/ +s32 ixgbe_disable_pcie_primary(struct ixgbe_hw *hw) +{ + s32 status = IXGBE_SUCCESS; + u32 i, poll; + u16 value; + + DEBUGFUNC("ixgbe_disable_pcie_primary"); + + /* Always set this bit to ensure any future transactions are blocked */ + IXGBE_WRITE_REG(hw, IXGBE_CTRL, IXGBE_CTRL_GIO_DIS); + + /* Exit if primary requests are blocked */ + if (!(IXGBE_READ_REG(hw, IXGBE_STATUS) & IXGBE_STATUS_GIO) || + IXGBE_REMOVED(hw->hw_addr)) + goto out; + + /* Poll for primary request bit to clear */ + for (i = 0; i < IXGBE_PCI_PRIMARY_DISABLE_TIMEOUT; i++) { + usec_delay(100); + if (!(IXGBE_READ_REG(hw, IXGBE_STATUS) & IXGBE_STATUS_GIO)) + goto out; + } + + /* + * Two consecutive resets are required via CTRL.RST per datasheet + * 5.2.5.3.2 Primary Disable. We set a flag to inform the reset routine + * of this need. The first reset prevents new primary requests from + * being issued by our device. We then must wait 1usec or more for any + * remaining completions from the PCIe bus to trickle in, and then reset + * again to clear out any effects they may have had on our device. + */ + hw_dbg(hw, "GIO Primary Disable bit didn't clear - requesting resets\n"); + hw->mac.flags |= IXGBE_FLAGS_DOUBLE_RESET_REQUIRED; + + if (hw->mac.type >= ixgbe_mac_X550) + goto out; + + /* + * Before proceeding, make sure that the PCIe block does not have + * transactions pending. + */ + poll = ixgbe_pcie_timeout_poll(hw); + for (i = 0; i < poll; i++) { + usec_delay(100); + value = IXGBE_READ_PCIE_WORD(hw, IXGBE_PCI_DEVICE_STATUS); + if (IXGBE_REMOVED(hw->hw_addr)) + goto out; + if (!(value & IXGBE_PCI_DEVICE_STATUS_TRANSACTION_PENDING)) + goto out; + } + + ERROR_REPORT1(IXGBE_ERROR_POLLING, + "PCIe transaction pending bit also did not clear.\n"); + status = IXGBE_ERR_PRIMARY_REQUESTS_PENDING; + +out: + return status; +} + +/** + * ixgbe_acquire_swfw_sync - Acquire SWFW semaphore + * @hw: pointer to hardware structure + * @mask: Mask to specify which semaphore to acquire + * + * Acquires the SWFW semaphore through the GSSR register for the specified + * function (CSR, PHY0, PHY1, EEPROM, Flash) + **/ +s32 ixgbe_acquire_swfw_sync(struct ixgbe_hw *hw, u32 mask) +{ + u32 gssr = 0; + u32 swmask = mask; + u32 fwmask = mask << 5; + u32 timeout = 200; + u32 i; + + DEBUGFUNC("ixgbe_acquire_swfw_sync"); + + for (i = 0; i < timeout; i++) { + /* + * SW NVM semaphore bit is used for access to all + * SW_FW_SYNC bits (not just NVM) + */ + if (ixgbe_get_eeprom_semaphore(hw)) + return IXGBE_ERR_SWFW_SYNC; + + gssr = IXGBE_READ_REG(hw, IXGBE_GSSR); + if (!(gssr & (fwmask | swmask))) { + gssr |= swmask; + IXGBE_WRITE_REG(hw, IXGBE_GSSR, gssr); + ixgbe_release_eeprom_semaphore(hw); + return IXGBE_SUCCESS; + } else { + /* Resource is currently in use by FW or SW */ + ixgbe_release_eeprom_semaphore(hw); + msec_delay(5); + } + } + + /* If time expired clear the bits holding the lock and retry */ + if (gssr & (fwmask | swmask)) + ixgbe_release_swfw_sync(hw, gssr & (fwmask | swmask)); + + msec_delay(5); + return IXGBE_ERR_SWFW_SYNC; +} + +/** + * ixgbe_release_swfw_sync - Release SWFW semaphore + * @hw: pointer to hardware structure + * @mask: Mask to specify which semaphore to release + * + * Releases the SWFW semaphore through the GSSR register for the specified + * function (CSR, PHY0, PHY1, EEPROM, Flash) + **/ +void ixgbe_release_swfw_sync(struct ixgbe_hw *hw, u32 mask) +{ + u32 gssr; + u32 swmask = mask; + + DEBUGFUNC("ixgbe_release_swfw_sync"); + + ixgbe_get_eeprom_semaphore(hw); + + gssr = IXGBE_READ_REG(hw, IXGBE_GSSR); + gssr &= ~swmask; + IXGBE_WRITE_REG(hw, IXGBE_GSSR, gssr); + + ixgbe_release_eeprom_semaphore(hw); +} + +/** + * ixgbe_disable_sec_rx_path_generic - Stops the receive data path + * @hw: pointer to hardware structure + * + * Stops the receive data path and waits for the HW to internally empty + * the Rx security block + **/ +s32 ixgbe_disable_sec_rx_path_generic(struct ixgbe_hw *hw) +{ +#define IXGBE_MAX_SECRX_POLL 4000 + + int i; + int secrxreg; + + DEBUGFUNC("ixgbe_disable_sec_rx_path_generic"); + + secrxreg = IXGBE_READ_REG(hw, IXGBE_SECRXCTRL); + secrxreg |= IXGBE_SECRXCTRL_RX_DIS; + IXGBE_WRITE_REG(hw, IXGBE_SECRXCTRL, secrxreg); + for (i = 0; i < IXGBE_MAX_SECRX_POLL; i++) { + secrxreg = IXGBE_READ_REG(hw, IXGBE_SECRXSTAT); + if (secrxreg & IXGBE_SECRXSTAT_SECRX_RDY) + break; + else + /* Use interrupt-safe sleep just in case */ + usec_delay(10); + } + + /* For informational purposes only */ + if (i >= IXGBE_MAX_SECRX_POLL) + hw_dbg(hw, "Rx unit being enabled before security " + "path fully disabled. Continuing with init.\n"); + + return IXGBE_SUCCESS; +} + +/** + * prot_autoc_read_generic - Hides MAC differences needed for AUTOC read + * @hw: pointer to hardware structure + * @locked: bool to indicate whether the SW/FW lock was taken + * @reg_val: Value we read from AUTOC + * + * The default case requires no protection so just to the register read. + */ +s32 prot_autoc_read_generic(struct ixgbe_hw *hw, bool *locked, u32 *reg_val) +{ + *locked = false; + *reg_val = IXGBE_READ_REG(hw, IXGBE_AUTOC); + return IXGBE_SUCCESS; +} + +/** + * prot_autoc_write_generic - Hides MAC differences needed for AUTOC write + * @hw: pointer to hardware structure + * @reg_val: value to write to AUTOC + * @locked: bool to indicate whether the SW/FW lock was already taken by + * previous read. + * + * The default case requires no protection so just to the register write. + */ +s32 prot_autoc_write_generic(struct ixgbe_hw *hw, u32 reg_val, bool locked) +{ + UNREFERENCED_1PARAMETER(locked); + + IXGBE_WRITE_REG(hw, IXGBE_AUTOC, reg_val); + return IXGBE_SUCCESS; +} + +/** + * ixgbe_enable_sec_rx_path_generic - Enables the receive data path + * @hw: pointer to hardware structure + * + * Enables the receive data path. + **/ +s32 ixgbe_enable_sec_rx_path_generic(struct ixgbe_hw *hw) +{ + u32 secrxreg; + + DEBUGFUNC("ixgbe_enable_sec_rx_path_generic"); + + secrxreg = IXGBE_READ_REG(hw, IXGBE_SECRXCTRL); + secrxreg &= ~IXGBE_SECRXCTRL_RX_DIS; + IXGBE_WRITE_REG(hw, IXGBE_SECRXCTRL, secrxreg); + IXGBE_WRITE_FLUSH(hw); + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_enable_rx_dma_generic - Enable the Rx DMA unit + * @hw: pointer to hardware structure + * @regval: register value to write to RXCTRL + * + * Enables the Rx DMA unit + **/ +s32 ixgbe_enable_rx_dma_generic(struct ixgbe_hw *hw, u32 regval) +{ + DEBUGFUNC("ixgbe_enable_rx_dma_generic"); + + if (regval & IXGBE_RXCTRL_RXEN) + ixgbe_enable_rx(hw); + else + ixgbe_disable_rx(hw); + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_blink_led_start_generic - Blink LED based on index. + * @hw: pointer to hardware structure + * @index: led number to blink + **/ +s32 ixgbe_blink_led_start_generic(struct ixgbe_hw *hw, u32 index) +{ + ixgbe_link_speed speed = 0; + bool link_up = 0; + u32 autoc_reg = 0; + u32 led_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL); + s32 ret_val = IXGBE_SUCCESS; + bool locked = false; + + DEBUGFUNC("ixgbe_blink_led_start_generic"); + + if (index > 3) + return IXGBE_ERR_PARAM; + + /* + * Link must be up to auto-blink the LEDs; + * Force it if link is down. + */ + hw->mac.ops.check_link(hw, &speed, &link_up, false); + + if (!link_up) { + ret_val = hw->mac.ops.prot_autoc_read(hw, &locked, &autoc_reg); + if (ret_val != IXGBE_SUCCESS) + goto out; + + autoc_reg |= IXGBE_AUTOC_AN_RESTART; + autoc_reg |= IXGBE_AUTOC_FLU; + + ret_val = hw->mac.ops.prot_autoc_write(hw, autoc_reg, locked); + if (ret_val != IXGBE_SUCCESS) + goto out; + + IXGBE_WRITE_FLUSH(hw); + msec_delay(10); + } + + led_reg &= ~IXGBE_LED_MODE_MASK(index); + led_reg |= IXGBE_LED_BLINK(index); + IXGBE_WRITE_REG(hw, IXGBE_LEDCTL, led_reg); + IXGBE_WRITE_FLUSH(hw); + +out: + return ret_val; +} + +/** + * ixgbe_blink_led_stop_generic - Stop blinking LED based on index. + * @hw: pointer to hardware structure + * @index: led number to stop blinking + **/ +s32 ixgbe_blink_led_stop_generic(struct ixgbe_hw *hw, u32 index) +{ + u32 autoc_reg = 0; + u32 led_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL); + s32 ret_val = IXGBE_SUCCESS; + bool locked = false; + + DEBUGFUNC("ixgbe_blink_led_stop_generic"); + + if (index > 3) + return IXGBE_ERR_PARAM; + + ret_val = hw->mac.ops.prot_autoc_read(hw, &locked, &autoc_reg); + if (ret_val != IXGBE_SUCCESS) + goto out; + + autoc_reg &= ~IXGBE_AUTOC_FLU; + autoc_reg |= IXGBE_AUTOC_AN_RESTART; + + ret_val = hw->mac.ops.prot_autoc_write(hw, autoc_reg, locked); + if (ret_val != IXGBE_SUCCESS) + goto out; + + led_reg &= ~IXGBE_LED_MODE_MASK(index); + led_reg &= ~IXGBE_LED_BLINK(index); + led_reg |= IXGBE_LED_LINK_ACTIVE << IXGBE_LED_MODE_SHIFT(index); + IXGBE_WRITE_REG(hw, IXGBE_LEDCTL, led_reg); + IXGBE_WRITE_FLUSH(hw); + +out: + return ret_val; +} + +/** + * ixgbe_get_san_mac_addr_offset - Get SAN MAC address offset from the EEPROM + * @hw: pointer to hardware structure + * @san_mac_offset: SAN MAC address offset + * + * This function will read the EEPROM location for the SAN MAC address + * pointer, and returns the value at that location. This is used in both + * get and set mac_addr routines. + **/ +STATIC s32 ixgbe_get_san_mac_addr_offset(struct ixgbe_hw *hw, + u16 *san_mac_offset) +{ + s32 ret_val; + + DEBUGFUNC("ixgbe_get_san_mac_addr_offset"); + + /* + * First read the EEPROM pointer to see if the MAC addresses are + * available. + */ + ret_val = hw->eeprom.ops.read(hw, IXGBE_SAN_MAC_ADDR_PTR, + san_mac_offset); + if (ret_val) { + ERROR_REPORT2(IXGBE_ERROR_INVALID_STATE, + "eeprom at offset %d failed", + IXGBE_SAN_MAC_ADDR_PTR); + } + + return ret_val; +} + +/** + * ixgbe_get_san_mac_addr_generic - SAN MAC address retrieval from the EEPROM + * @hw: pointer to hardware structure + * @san_mac_addr: SAN MAC address + * + * Reads the SAN MAC address from the EEPROM, if it's available. This is + * per-port, so set_lan_id() must be called before reading the addresses. + * set_lan_id() is called by identify_sfp(), but this cannot be relied + * upon for non-SFP connections, so we must call it here. + **/ +s32 ixgbe_get_san_mac_addr_generic(struct ixgbe_hw *hw, u8 *san_mac_addr) +{ + u16 san_mac_data, san_mac_offset; + u8 i; + s32 ret_val; + + DEBUGFUNC("ixgbe_get_san_mac_addr_generic"); + + /* + * First read the EEPROM pointer to see if the MAC addresses are + * available. If they're not, no point in calling set_lan_id() here. + */ + ret_val = ixgbe_get_san_mac_addr_offset(hw, &san_mac_offset); + if (ret_val || san_mac_offset == 0 || san_mac_offset == 0xFFFF) + goto san_mac_addr_out; + + /* make sure we know which port we need to program */ + hw->mac.ops.set_lan_id(hw); + /* apply the port offset to the address offset */ + (hw->bus.func) ? (san_mac_offset += IXGBE_SAN_MAC_ADDR_PORT1_OFFSET) : + (san_mac_offset += IXGBE_SAN_MAC_ADDR_PORT0_OFFSET); + for (i = 0; i < 3; i++) { + ret_val = hw->eeprom.ops.read(hw, san_mac_offset, + &san_mac_data); + if (ret_val) { + ERROR_REPORT2(IXGBE_ERROR_INVALID_STATE, + "eeprom read at offset %d failed", + san_mac_offset); + goto san_mac_addr_out; + } + san_mac_addr[i * 2] = (u8)(san_mac_data); + san_mac_addr[i * 2 + 1] = (u8)(san_mac_data >> 8); + san_mac_offset++; + } + return IXGBE_SUCCESS; + +san_mac_addr_out: + /* + * No addresses available in this EEPROM. It's not an + * error though, so just wipe the local address and return. + */ + for (i = 0; i < 6; i++) + san_mac_addr[i] = 0xFF; + return IXGBE_SUCCESS; +} + +/** + * ixgbe_set_san_mac_addr_generic - Write the SAN MAC address to the EEPROM + * @hw: pointer to hardware structure + * @san_mac_addr: SAN MAC address + * + * Write a SAN MAC address to the EEPROM. + **/ +s32 ixgbe_set_san_mac_addr_generic(struct ixgbe_hw *hw, u8 *san_mac_addr) +{ + s32 ret_val; + u16 san_mac_data, san_mac_offset; + u8 i; + + DEBUGFUNC("ixgbe_set_san_mac_addr_generic"); + + /* Look for SAN mac address pointer. If not defined, return */ + ret_val = ixgbe_get_san_mac_addr_offset(hw, &san_mac_offset); + if (ret_val || san_mac_offset == 0 || san_mac_offset == 0xFFFF) + return IXGBE_ERR_NO_SAN_ADDR_PTR; + + /* Make sure we know which port we need to write */ + hw->mac.ops.set_lan_id(hw); + /* Apply the port offset to the address offset */ + (hw->bus.func) ? (san_mac_offset += IXGBE_SAN_MAC_ADDR_PORT1_OFFSET) : + (san_mac_offset += IXGBE_SAN_MAC_ADDR_PORT0_OFFSET); + + for (i = 0; i < 3; i++) { + san_mac_data = (u16)((u16)(san_mac_addr[i * 2 + 1]) << 8); + san_mac_data |= (u16)(san_mac_addr[i * 2]); + hw->eeprom.ops.write(hw, san_mac_offset, san_mac_data); + san_mac_offset++; + } + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_get_pcie_msix_count_generic - Gets MSI-X vector count + * @hw: pointer to hardware structure + * + * Read PCIe configuration space, and get the MSI-X vector count from + * the capabilities table. + **/ +u16 ixgbe_get_pcie_msix_count_generic(struct ixgbe_hw *hw) +{ + u16 msix_count = 1; + u16 max_msix_count; + u16 pcie_offset; + + switch (hw->mac.type) { + case ixgbe_mac_82598EB: + pcie_offset = IXGBE_PCIE_MSIX_82598_CAPS; + max_msix_count = IXGBE_MAX_MSIX_VECTORS_82598; + break; + case ixgbe_mac_82599EB: + case ixgbe_mac_X540: + case ixgbe_mac_X550: + case ixgbe_mac_X550EM_x: + case ixgbe_mac_X550EM_a: + pcie_offset = IXGBE_PCIE_MSIX_82599_CAPS; + max_msix_count = IXGBE_MAX_MSIX_VECTORS_82599; + break; + case ixgbe_mac_E610: + pcie_offset = IXGBE_PCIE_MSIX_LKV_CAPS; + max_msix_count = IXGBE_MAX_MSIX_VECTORS_82599; + break; + default: + return msix_count; + } + + DEBUGFUNC("ixgbe_get_pcie_msix_count_generic"); + msix_count = IXGBE_READ_PCIE_WORD(hw, pcie_offset); + if (IXGBE_REMOVED(hw->hw_addr)) + msix_count = 0; + msix_count &= IXGBE_PCIE_MSIX_TBL_SZ_MASK; + + /* MSI-X count is zero-based in HW */ + msix_count++; + + if (msix_count > max_msix_count) + msix_count = max_msix_count; + + return msix_count; +} + +/** + * ixgbe_insert_mac_addr_generic - Find a RAR for this mac address + * @hw: pointer to hardware structure + * @addr: Address to put into receive address register + * @vmdq: VMDq pool to assign + * + * Puts an ethernet address into a receive address register, or + * finds the rar that it is aleady in; adds to the pool list + **/ +s32 ixgbe_insert_mac_addr_generic(struct ixgbe_hw *hw, u8 *addr, u32 vmdq) +{ + static const u32 NO_EMPTY_RAR_FOUND = 0xFFFFFFFF; + u32 first_empty_rar = NO_EMPTY_RAR_FOUND; + u32 rar; + u32 rar_low, rar_high; + u32 addr_low, addr_high; + + DEBUGFUNC("ixgbe_insert_mac_addr_generic"); + + /* swap bytes for HW little endian */ + addr_low = addr[0] | (addr[1] << 8) + | (addr[2] << 16) + | (addr[3] << 24); + addr_high = addr[4] | (addr[5] << 8); + + /* + * Either find the mac_id in rar or find the first empty space. + * rar_highwater points to just after the highest currently used + * rar in order to shorten the search. It grows when we add a new + * rar to the top. + */ + for (rar = 0; rar < hw->mac.rar_highwater; rar++) { + rar_high = IXGBE_READ_REG(hw, IXGBE_RAH(rar)); + + if (((IXGBE_RAH_AV & rar_high) == 0) + && first_empty_rar == NO_EMPTY_RAR_FOUND) { + first_empty_rar = rar; + } else if ((rar_high & 0xFFFF) == addr_high) { + rar_low = IXGBE_READ_REG(hw, IXGBE_RAL(rar)); + if (rar_low == addr_low) + break; /* found it already in the rars */ + } + } + + if (rar < hw->mac.rar_highwater) { + /* already there so just add to the pool bits */ + ixgbe_set_vmdq(hw, rar, vmdq); + } else if (first_empty_rar != NO_EMPTY_RAR_FOUND) { + /* stick it into first empty RAR slot we found */ + rar = first_empty_rar; + ixgbe_set_rar(hw, rar, addr, vmdq, IXGBE_RAH_AV); + } else if (rar == hw->mac.rar_highwater) { + /* add it to the top of the list and inc the highwater mark */ + ixgbe_set_rar(hw, rar, addr, vmdq, IXGBE_RAH_AV); + hw->mac.rar_highwater++; + } else if (rar >= hw->mac.num_rar_entries) { + return IXGBE_ERR_INVALID_MAC_ADDR; + } + + /* + * If we found rar[0], make sure the default pool bit (we use pool 0) + * remains cleared to be sure default pool packets will get delivered + */ + if (rar == 0) + ixgbe_clear_vmdq(hw, rar, 0); + + return rar; +} + +/** + * ixgbe_clear_vmdq_generic - Disassociate a VMDq pool index from a rx address + * @hw: pointer to hardware struct + * @rar: receive address register index to disassociate + * @vmdq: VMDq pool index to remove from the rar + **/ +s32 ixgbe_clear_vmdq_generic(struct ixgbe_hw *hw, u32 rar, u32 vmdq) +{ + u32 mpsar_lo, mpsar_hi; + u32 rar_entries = hw->mac.num_rar_entries; + + DEBUGFUNC("ixgbe_clear_vmdq_generic"); + + /* Make sure we are using a valid rar index range */ + if (rar >= rar_entries) { + ERROR_REPORT2(IXGBE_ERROR_ARGUMENT, + "RAR index %d is out of range.\n", rar); + return IXGBE_ERR_INVALID_ARGUMENT; + } + + mpsar_lo = IXGBE_READ_REG(hw, IXGBE_MPSAR_LO(rar)); + mpsar_hi = IXGBE_READ_REG(hw, IXGBE_MPSAR_HI(rar)); + + if (IXGBE_REMOVED(hw->hw_addr)) + goto done; + + if (!mpsar_lo && !mpsar_hi) + goto done; + + if (vmdq == IXGBE_CLEAR_VMDQ_ALL) { + if (mpsar_lo) { + IXGBE_WRITE_REG(hw, IXGBE_MPSAR_LO(rar), 0); + mpsar_lo = IXGBE_READ_REG(hw, IXGBE_MPSAR_LO(rar)); + } + if (mpsar_hi) { + IXGBE_WRITE_REG(hw, IXGBE_MPSAR_HI(rar), 0); + mpsar_hi = IXGBE_READ_REG(hw, IXGBE_MPSAR_HI(rar)); + } + } else if (vmdq < 32) { + mpsar_lo &= ~(1 << vmdq); + IXGBE_WRITE_REG(hw, IXGBE_MPSAR_LO(rar), mpsar_lo); + } else { + mpsar_hi &= ~(1 << (vmdq - 32)); + IXGBE_WRITE_REG(hw, IXGBE_MPSAR_HI(rar), mpsar_hi); + } + + /* was that the last pool using this rar? */ + if (mpsar_lo == 0 && mpsar_hi == 0 && + rar != 0 && rar != hw->mac.san_mac_rar_index) + hw->mac.ops.clear_rar(hw, rar); +done: + return IXGBE_SUCCESS; +} + +/** + * ixgbe_set_vmdq_generic - Associate a VMDq pool index with a rx address + * @hw: pointer to hardware struct + * @rar: receive address register index to associate with a VMDq index + * @vmdq: VMDq pool index + **/ +s32 ixgbe_set_vmdq_generic(struct ixgbe_hw *hw, u32 rar, u32 vmdq) +{ + u32 mpsar; + u32 rar_entries = hw->mac.num_rar_entries; + + DEBUGFUNC("ixgbe_set_vmdq_generic"); + + /* Make sure we are using a valid rar index range */ + if (rar >= rar_entries) { + ERROR_REPORT2(IXGBE_ERROR_ARGUMENT, + "RAR index %d is out of range.\n", rar); + return IXGBE_ERR_INVALID_ARGUMENT; + } + + if (vmdq < 32) { + mpsar = IXGBE_READ_REG(hw, IXGBE_MPSAR_LO(rar)); + mpsar |= 1 << vmdq; + IXGBE_WRITE_REG(hw, IXGBE_MPSAR_LO(rar), mpsar); + } else { + mpsar = IXGBE_READ_REG(hw, IXGBE_MPSAR_HI(rar)); + mpsar |= 1 << (vmdq - 32); + IXGBE_WRITE_REG(hw, IXGBE_MPSAR_HI(rar), mpsar); + } + return IXGBE_SUCCESS; +} + +/** + * ixgbe_set_vmdq_san_mac_generic - Associate default VMDq pool index with + * a rx address + * @hw: pointer to hardware struct + * @vmdq: VMDq pool index + * + * This function should only be involved in the IOV mode. + * In IOV mode, Default pool is next pool after the number of + * VFs advertized and not 0. + * MPSAR table needs to be updated for SAN_MAC RAR [hw->mac.san_mac_rar_index] + **/ +s32 ixgbe_set_vmdq_san_mac_generic(struct ixgbe_hw *hw, u32 vmdq) +{ + u32 rar = hw->mac.san_mac_rar_index; + + DEBUGFUNC("ixgbe_set_vmdq_san_mac"); + + if (vmdq < 32) { + IXGBE_WRITE_REG(hw, IXGBE_MPSAR_LO(rar), 1 << vmdq); + IXGBE_WRITE_REG(hw, IXGBE_MPSAR_HI(rar), 0); + } else { + IXGBE_WRITE_REG(hw, IXGBE_MPSAR_LO(rar), 0); + IXGBE_WRITE_REG(hw, IXGBE_MPSAR_HI(rar), 1 << (vmdq - 32)); + } + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_init_uta_tables_generic - Initialize the Unicast Table Array + * @hw: pointer to hardware structure + **/ +s32 ixgbe_init_uta_tables_generic(struct ixgbe_hw *hw) +{ + int i; + + DEBUGFUNC("ixgbe_init_uta_tables_generic"); + hw_dbg(hw, " Clearing UTA\n"); + + for (i = 0; i < 128; i++) + IXGBE_WRITE_REG(hw, IXGBE_UTA(i), 0); + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_find_vlvf_slot - find the vlanid or the first empty slot + * @hw: pointer to hardware structure + * @vlan: VLAN id to write to VLAN filter + * @vlvf_bypass: true to find vlanid only, false returns first empty slot if + * vlanid not found + * + * + * return the VLVF index where this VLAN id should be placed + * + **/ +s32 ixgbe_find_vlvf_slot(struct ixgbe_hw *hw, u32 vlan, bool vlvf_bypass) +{ + s32 regindex, first_empty_slot; + u32 bits; + + /* short cut the special case */ + if (vlan == 0) + return 0; + + /* if vlvf_bypass is set we don't want to use an empty slot, we + * will simply bypass the VLVF if there are no entries present in the + * VLVF that contain our VLAN + */ + first_empty_slot = vlvf_bypass ? IXGBE_ERR_NO_SPACE : 0; + + /* add VLAN enable bit for comparison */ + vlan |= IXGBE_VLVF_VIEN; + + /* Search for the vlan id in the VLVF entries. Save off the first empty + * slot found along the way. + * + * pre-decrement loop covering (IXGBE_VLVF_ENTRIES - 1) .. 1 + */ + for (regindex = IXGBE_VLVF_ENTRIES; --regindex;) { + bits = IXGBE_READ_REG(hw, IXGBE_VLVF(regindex)); + if (bits == vlan) + return regindex; + if (!first_empty_slot && !bits) + first_empty_slot = regindex; + } + + /* If we are here then we didn't find the VLAN. Return first empty + * slot we found during our search, else error. + */ + if (!first_empty_slot) + ERROR_REPORT1(IXGBE_ERROR_SOFTWARE, "No space in VLVF.\n"); + + return first_empty_slot ? first_empty_slot : IXGBE_ERR_NO_SPACE; +} + +/** + * ixgbe_set_vfta_generic - Set VLAN filter table + * @hw: pointer to hardware structure + * @vlan: VLAN id to write to VLAN filter + * @vind: VMDq output index that maps queue to VLAN id in VLVFB + * @vlan_on: boolean flag to turn on/off VLAN + * @vlvf_bypass: boolean flag indicating updating default pool is okay + * + * Turn on/off specified VLAN in the VLAN filter table. + **/ +s32 ixgbe_set_vfta_generic(struct ixgbe_hw *hw, u32 vlan, u32 vind, + bool vlan_on, bool vlvf_bypass) +{ + u32 regidx, vfta_delta, vfta; + s32 ret_val; + + DEBUGFUNC("ixgbe_set_vfta_generic"); + + if (vlan > 4095 || vind > 63) + return IXGBE_ERR_PARAM; + + /* + * this is a 2 part operation - first the VFTA, then the + * VLVF and VLVFB if VT Mode is set + * We don't write the VFTA until we know the VLVF part succeeded. + */ + + /* Part 1 + * The VFTA is a bitstring made up of 128 32-bit registers + * that enable the particular VLAN id, much like the MTA: + * bits[11-5]: which register + * bits[4-0]: which bit in the register + */ + regidx = vlan / 32; + vfta_delta = 1 << (vlan % 32); + vfta = IXGBE_READ_REG(hw, IXGBE_VFTA(regidx)); + + /* + * vfta_delta represents the difference between the current value + * of vfta and the value we want in the register. Since the diff + * is an XOR mask we can just update the vfta using an XOR + */ + vfta_delta &= vlan_on ? ~vfta : vfta; + vfta ^= vfta_delta; + + /* Part 2 + * Call ixgbe_set_vlvf_generic to set VLVFB and VLVF + */ + ret_val = ixgbe_set_vlvf_generic(hw, vlan, vind, vlan_on, &vfta_delta, + vfta, vlvf_bypass); + if (ret_val != IXGBE_SUCCESS) { + if (vlvf_bypass) + goto vfta_update; + return ret_val; + } + +vfta_update: + /* Update VFTA now that we are ready for traffic */ + if (vfta_delta) + IXGBE_WRITE_REG(hw, IXGBE_VFTA(regidx), vfta); + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_set_vlvf_generic - Set VLAN Pool Filter + * @hw: pointer to hardware structure + * @vlan: VLAN id to write to VLAN filter + * @vind: VMDq output index that maps queue to VLAN id in VLVFB + * @vlan_on: boolean flag to turn on/off VLAN in VLVF + * @vfta_delta: pointer to the difference between the current value of VFTA + * and the desired value + * @vfta: the desired value of the VFTA + * @vlvf_bypass: boolean flag indicating updating default pool is okay + * + * Turn on/off specified bit in VLVF table. + **/ +s32 ixgbe_set_vlvf_generic(struct ixgbe_hw *hw, u32 vlan, u32 vind, + bool vlan_on, u32 *vfta_delta, u32 vfta, + bool vlvf_bypass) +{ + u32 bits; + s32 vlvf_index; + + DEBUGFUNC("ixgbe_set_vlvf_generic"); + + if (vlan > 4095 || vind > 63) + return IXGBE_ERR_PARAM; + + /* If VT Mode is set + * Either vlan_on + * make sure the vlan is in VLVF + * set the vind bit in the matching VLVFB + * Or !vlan_on + * clear the pool bit and possibly the vind + */ + if (!(IXGBE_READ_REG(hw, IXGBE_VT_CTL) & IXGBE_VT_CTL_VT_ENABLE)) + return IXGBE_SUCCESS; + + vlvf_index = ixgbe_find_vlvf_slot(hw, vlan, vlvf_bypass); + if (vlvf_index < 0) + return vlvf_index; + + bits = IXGBE_READ_REG(hw, IXGBE_VLVFB(vlvf_index * 2 + vind / 32)); + + /* set the pool bit */ + bits |= 1 << (vind % 32); + if (vlan_on) + goto vlvf_update; + + /* clear the pool bit */ + bits ^= 1 << (vind % 32); + + if (!bits && + !IXGBE_READ_REG(hw, IXGBE_VLVFB(vlvf_index * 2 + 1 - vind / 32))) { + /* Clear VFTA first, then disable VLVF. Otherwise + * we run the risk of stray packets leaking into + * the PF via the default pool + */ + if (*vfta_delta) + IXGBE_WRITE_REG(hw, IXGBE_VFTA(vlan / 32), vfta); + + /* disable VLVF and clear remaining bit from pool */ + IXGBE_WRITE_REG(hw, IXGBE_VLVF(vlvf_index), 0); + IXGBE_WRITE_REG(hw, IXGBE_VLVFB(vlvf_index * 2 + vind / 32), 0); + + return IXGBE_SUCCESS; + } + + /* If there are still bits set in the VLVFB registers + * for the VLAN ID indicated we need to see if the + * caller is requesting that we clear the VFTA entry bit. + * If the caller has requested that we clear the VFTA + * entry bit but there are still pools/VFs using this VLAN + * ID entry then ignore the request. We're not worried + * about the case where we're turning the VFTA VLAN ID + * entry bit on, only when requested to turn it off as + * there may be multiple pools and/or VFs using the + * VLAN ID entry. In that case we cannot clear the + * VFTA bit until all pools/VFs using that VLAN ID have also + * been cleared. This will be indicated by "bits" being + * zero. + */ + *vfta_delta = 0; + +vlvf_update: + /* record pool change and enable VLAN ID if not already enabled */ + IXGBE_WRITE_REG(hw, IXGBE_VLVFB(vlvf_index * 2 + vind / 32), bits); + IXGBE_WRITE_REG(hw, IXGBE_VLVF(vlvf_index), IXGBE_VLVF_VIEN | vlan); + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_clear_vfta_generic - Clear VLAN filter table + * @hw: pointer to hardware structure + * + * Clears the VLAN filer table, and the VMDq index associated with the filter + **/ +s32 ixgbe_clear_vfta_generic(struct ixgbe_hw *hw) +{ + u32 offset; + + DEBUGFUNC("ixgbe_clear_vfta_generic"); + + for (offset = 0; offset < hw->mac.vft_size; offset++) + IXGBE_WRITE_REG(hw, IXGBE_VFTA(offset), 0); + + for (offset = 0; offset < IXGBE_VLVF_ENTRIES; offset++) { + IXGBE_WRITE_REG(hw, IXGBE_VLVF(offset), 0); + IXGBE_WRITE_REG(hw, IXGBE_VLVFB(offset * 2), 0); + IXGBE_WRITE_REG(hw, IXGBE_VLVFB(offset * 2 + 1), 0); + } + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_toggle_txdctl_generic - Toggle VF's queues + * @hw: pointer to hardware structure + * @vf_number: VF index + * + * Enable and disable each queue in VF. + */ +s32 ixgbe_toggle_txdctl_generic(struct ixgbe_hw *hw, u32 vf_number) +{ + u8 queue_count, i; + u32 offset, reg; + + if (vf_number > 63) + return IXGBE_ERR_PARAM; + + /* + * Determine number of queues by checking + * number of virtual functions + */ + reg = IXGBE_READ_REG(hw, IXGBE_GCR_EXT); + switch (reg & IXGBE_GCR_EXT_VT_MODE_MASK) { + case IXGBE_GCR_EXT_VT_MODE_64: + queue_count = 2; + break; + case IXGBE_GCR_EXT_VT_MODE_32: + queue_count = 4; + break; + case IXGBE_GCR_EXT_VT_MODE_16: + queue_count = 8; + break; + default: + return IXGBE_ERR_CONFIG; + } + + /* Toggle queues */ + for (i = 0; i < queue_count; ++i) { + /* Calculate offset of current queue */ + offset = queue_count * vf_number + i; + + /* Enable queue */ + reg = IXGBE_READ_REG(hw, IXGBE_PVFTXDCTL(offset)); + reg |= IXGBE_TXDCTL_ENABLE; + IXGBE_WRITE_REG(hw, IXGBE_PVFTXDCTL(offset), reg); + IXGBE_WRITE_FLUSH(hw); + + /* Disable queue */ + reg = IXGBE_READ_REG(hw, IXGBE_PVFTXDCTL(offset)); + reg &= ~IXGBE_TXDCTL_ENABLE; + IXGBE_WRITE_REG(hw, IXGBE_PVFTXDCTL(offset), reg); + IXGBE_WRITE_FLUSH(hw); + } + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_need_crosstalk_fix - Determine if we need to do cross talk fix + * @hw: pointer to hardware structure + * + * Contains the logic to identify if we need to verify link for the + * crosstalk fix + **/ +static bool ixgbe_need_crosstalk_fix(struct ixgbe_hw *hw) +{ + + /* Does FW say we need the fix */ + if (!hw->need_crosstalk_fix) + return false; + + /* Only consider SFP+ PHYs i.e. media type fiber */ + switch (hw->mac.ops.get_media_type(hw)) { + case ixgbe_media_type_fiber: + case ixgbe_media_type_fiber_qsfp: + break; + default: + return false; + } + + return true; +} + +/** + * ixgbe_check_mac_link_generic - Determine link and speed status + * @hw: pointer to hardware structure + * @speed: pointer to link speed + * @link_up: true when link is up + * @link_up_wait_to_complete: bool used to wait for link up or not + * + * Reads the links register to determine if link is up and the current speed + **/ +s32 ixgbe_check_mac_link_generic(struct ixgbe_hw *hw, ixgbe_link_speed *speed, + bool *link_up, bool link_up_wait_to_complete) +{ + u32 links_reg, links_orig; + u32 i; + + DEBUGFUNC("ixgbe_check_mac_link_generic"); + + /* If Crosstalk fix enabled do the sanity check of making sure + * the SFP+ cage is full. + */ + if (ixgbe_need_crosstalk_fix(hw)) { + u32 sfp_cage_full; + + switch (hw->mac.type) { + case ixgbe_mac_82599EB: + sfp_cage_full = IXGBE_READ_REG(hw, IXGBE_ESDP) & + IXGBE_ESDP_SDP2; + break; + case ixgbe_mac_X550EM_x: + case ixgbe_mac_X550EM_a: + sfp_cage_full = IXGBE_READ_REG(hw, IXGBE_ESDP) & + IXGBE_ESDP_SDP0; + break; + default: + /* sanity check - No SFP+ devices here */ + sfp_cage_full = false; + break; + } + + if (!sfp_cage_full) { + *link_up = false; + *speed = IXGBE_LINK_SPEED_UNKNOWN; + return IXGBE_SUCCESS; + } + } + + /* clear the old state */ + links_orig = IXGBE_READ_REG(hw, IXGBE_LINKS); + + links_reg = IXGBE_READ_REG(hw, IXGBE_LINKS); + + if (links_orig != links_reg) { + hw_dbg(hw, "LINKS changed from %08X to %08X\n", + links_orig, links_reg); + } + + if (link_up_wait_to_complete) { + for (i = 0; i < hw->mac.max_link_up_time; i++) { + if (links_reg & IXGBE_LINKS_UP) { + *link_up = true; + break; + } else { + *link_up = false; + } + msec_delay(100); + links_reg = IXGBE_READ_REG(hw, IXGBE_LINKS); + } + } else { + if (links_reg & IXGBE_LINKS_UP) { + if (ixgbe_need_crosstalk_fix(hw)) { + /* Check the link state again after a delay + * to filter out spurious link up + * notifications. + */ + msec_delay(5); + links_reg = IXGBE_READ_REG(hw, IXGBE_LINKS); + if (!(links_reg & IXGBE_LINKS_UP)) { + *link_up = false; + *speed = IXGBE_LINK_SPEED_UNKNOWN; + return IXGBE_SUCCESS; + } + + } + *link_up = true; + } else { + *link_up = false; + } + } + + switch (links_reg & IXGBE_LINKS_SPEED_82599) { + case IXGBE_LINKS_SPEED_10G_82599: + *speed = IXGBE_LINK_SPEED_10GB_FULL; + if (hw->mac.type >= ixgbe_mac_X550) { + if (links_reg & IXGBE_LINKS_SPEED_NON_STD) + *speed = IXGBE_LINK_SPEED_2_5GB_FULL; + } + break; + case IXGBE_LINKS_SPEED_1G_82599: + *speed = IXGBE_LINK_SPEED_1GB_FULL; + break; + case IXGBE_LINKS_SPEED_100_82599: + if (links_reg & IXGBE_LINKS_SPEED_NON_STD && + (hw->mac.type == ixgbe_mac_X550 || + ixgbe_is_mac_E6xx(hw->mac.type))) + *speed = IXGBE_LINK_SPEED_5GB_FULL; + else + *speed = IXGBE_LINK_SPEED_100_FULL; + break; + case IXGBE_LINKS_SPEED_10_X550EM_A: + *speed = IXGBE_LINK_SPEED_UNKNOWN; + if (hw->device_id == IXGBE_DEV_ID_X550EM_A_1G_T || + hw->device_id == IXGBE_DEV_ID_X550EM_A_1G_T_L) + *speed = IXGBE_LINK_SPEED_10_FULL; + break; + default: + *speed = IXGBE_LINK_SPEED_UNKNOWN; + } + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_get_wwn_prefix_generic - Get alternative WWNN/WWPN prefix from + * the EEPROM + * @hw: pointer to hardware structure + * @wwnn_prefix: the alternative WWNN prefix + * @wwpn_prefix: the alternative WWPN prefix + * + * This function will read the EEPROM from the alternative SAN MAC address + * block to check the support for the alternative WWNN/WWPN prefix support. + **/ +s32 ixgbe_get_wwn_prefix_generic(struct ixgbe_hw *hw, u16 *wwnn_prefix, + u16 *wwpn_prefix) +{ + u16 offset, caps; + u16 alt_san_mac_blk_offset; + + DEBUGFUNC("ixgbe_get_wwn_prefix_generic"); + + /* clear output first */ + *wwnn_prefix = 0xFFFF; + *wwpn_prefix = 0xFFFF; + + /* check if alternative SAN MAC is supported */ + offset = IXGBE_ALT_SAN_MAC_ADDR_BLK_PTR; + if (hw->eeprom.ops.read(hw, offset, &alt_san_mac_blk_offset)) + goto wwn_prefix_err; + + if ((alt_san_mac_blk_offset == 0) || + (alt_san_mac_blk_offset == 0xFFFF)) + goto wwn_prefix_out; + + /* check capability in alternative san mac address block */ + offset = alt_san_mac_blk_offset + IXGBE_ALT_SAN_MAC_ADDR_CAPS_OFFSET; + if (hw->eeprom.ops.read(hw, offset, &caps)) + goto wwn_prefix_err; + if (!(caps & IXGBE_ALT_SAN_MAC_ADDR_CAPS_ALTWWN)) + goto wwn_prefix_out; + + /* get the corresponding prefix for WWNN/WWPN */ + offset = alt_san_mac_blk_offset + IXGBE_ALT_SAN_MAC_ADDR_WWNN_OFFSET; + if (hw->eeprom.ops.read(hw, offset, wwnn_prefix)) { + ERROR_REPORT2(IXGBE_ERROR_INVALID_STATE, + "eeprom read at offset %d failed", offset); + } + + offset = alt_san_mac_blk_offset + IXGBE_ALT_SAN_MAC_ADDR_WWPN_OFFSET; + if (hw->eeprom.ops.read(hw, offset, wwpn_prefix)) + goto wwn_prefix_err; + +wwn_prefix_out: + return IXGBE_SUCCESS; + +wwn_prefix_err: + ERROR_REPORT2(IXGBE_ERROR_INVALID_STATE, + "eeprom read at offset %d failed", offset); + return IXGBE_SUCCESS; +} + +/** + * ixgbe_get_fcoe_boot_status_generic - Get FCOE boot status from EEPROM + * @hw: pointer to hardware structure + * @bs: the fcoe boot status + * + * This function will read the FCOE boot status from the iSCSI FCOE block + **/ +s32 ixgbe_get_fcoe_boot_status_generic(struct ixgbe_hw *hw, u16 *bs) +{ + u16 offset, caps, flags; + s32 status; + + DEBUGFUNC("ixgbe_get_fcoe_boot_status_generic"); + + /* clear output first */ + *bs = ixgbe_fcoe_bootstatus_unavailable; + + /* check if FCOE IBA block is present */ + offset = IXGBE_FCOE_IBA_CAPS_BLK_PTR; + status = hw->eeprom.ops.read(hw, offset, &caps); + if (status != IXGBE_SUCCESS) + goto out; + + if (!(caps & IXGBE_FCOE_IBA_CAPS_FCOE)) + goto out; + + /* check if iSCSI FCOE block is populated */ + status = hw->eeprom.ops.read(hw, IXGBE_ISCSI_FCOE_BLK_PTR, &offset); + if (status != IXGBE_SUCCESS) + goto out; + + if ((offset == 0) || (offset == 0xFFFF)) + goto out; + + /* read fcoe flags in iSCSI FCOE block */ + offset = offset + IXGBE_ISCSI_FCOE_FLAGS_OFFSET; + status = hw->eeprom.ops.read(hw, offset, &flags); + if (status != IXGBE_SUCCESS) + goto out; + + if (flags & IXGBE_ISCSI_FCOE_FLAGS_ENABLE) + *bs = ixgbe_fcoe_bootstatus_enabled; + else + *bs = ixgbe_fcoe_bootstatus_disabled; + +out: + return status; +} + +/** + * ixgbe_set_mac_anti_spoofing - Enable/Disable MAC anti-spoofing + * @hw: pointer to hardware structure + * @enable: enable or disable switch for MAC anti-spoofing + * @vf: Virtual Function pool - VF Pool to set for MAC anti-spoofing + * + **/ +void ixgbe_set_mac_anti_spoofing(struct ixgbe_hw *hw, bool enable, int vf) +{ + int vf_target_reg = vf >> 3; + int vf_target_shift = vf % 8; + u32 pfvfspoof; + + if (hw->mac.type == ixgbe_mac_82598EB) + return; + + pfvfspoof = IXGBE_READ_REG(hw, IXGBE_PFVFSPOOF(vf_target_reg)); + if (enable) + pfvfspoof |= (1 << vf_target_shift); + else + pfvfspoof &= ~(1 << vf_target_shift); + IXGBE_WRITE_REG(hw, IXGBE_PFVFSPOOF(vf_target_reg), pfvfspoof); +} + +/** + * ixgbe_set_vlan_anti_spoofing - Enable/Disable VLAN anti-spoofing + * @hw: pointer to hardware structure + * @enable: enable or disable switch for VLAN anti-spoofing + * @vf: Virtual Function pool - VF Pool to set for VLAN anti-spoofing + * + **/ +void ixgbe_set_vlan_anti_spoofing(struct ixgbe_hw *hw, bool enable, int vf) +{ + int vf_target_reg = vf >> 3; + int vf_target_shift = vf % 8 + IXGBE_SPOOF_VLANAS_SHIFT; + u32 pfvfspoof; + + if (hw->mac.type == ixgbe_mac_82598EB) + return; + + pfvfspoof = IXGBE_READ_REG(hw, IXGBE_PFVFSPOOF(vf_target_reg)); + if (enable) + pfvfspoof |= (1 << vf_target_shift); + else + pfvfspoof &= ~(1 << vf_target_shift); + IXGBE_WRITE_REG(hw, IXGBE_PFVFSPOOF(vf_target_reg), pfvfspoof); +} + +/** + * ixgbe_get_device_caps_generic - Get additional device capabilities + * @hw: pointer to hardware structure + * @device_caps: the EEPROM word with the extra device capabilities + * + * This function will read the EEPROM location for the device capabilities, + * and return the word through device_caps. + **/ +s32 ixgbe_get_device_caps_generic(struct ixgbe_hw *hw, u16 *device_caps) +{ + DEBUGFUNC("ixgbe_get_device_caps_generic"); + + hw->eeprom.ops.read(hw, IXGBE_DEVICE_CAPS, device_caps); + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_calculate_checksum - Calculate checksum for buffer + * @buffer: pointer to EEPROM + * @length: size of EEPROM to calculate a checksum for + * Calculates the checksum for some buffer on a specified length. The + * checksum calculated is returned. + **/ +u8 ixgbe_calculate_checksum(u8 *buffer, u32 length) +{ + u32 i; + u8 sum = 0; + + DEBUGFUNC("ixgbe_calculate_checksum"); + + if (!buffer) + return 0; + + for (i = 0; i < length; i++) + sum += buffer[i]; + + return (u8) (0 - sum); +} + +/** + * ixgbe_hic_unlocked - Issue command to manageability block unlocked + * @hw: pointer to the HW structure + * @buffer: command to write and where the return status will be placed + * @length: length of buffer, must be multiple of 4 bytes + * @timeout: time in ms to wait for command completion + * + * Communicates with the manageability block. On success return IXGBE_SUCCESS + * else returns semaphore error when encountering an error acquiring + * semaphore or IXGBE_ERR_HOST_INTERFACE_COMMAND when command fails. + * + * This function assumes that the IXGBE_GSSR_SW_MNG_SM semaphore is held + * by the caller. + **/ +s32 ixgbe_hic_unlocked(struct ixgbe_hw *hw, u32 *buffer, u32 length, + u32 timeout) +{ + u32 hicr, i, fwsts; + u16 dword_len; + + DEBUGFUNC("ixgbe_hic_unlocked"); + + if (!length || length > IXGBE_HI_MAX_BLOCK_BYTE_LENGTH) { + hw_dbg(hw, "Buffer length failure buffersize=%d.\n", length); + return IXGBE_ERR_HOST_INTERFACE_COMMAND; + } + + /* Set bit 9 of FWSTS clearing FW reset indication */ + fwsts = IXGBE_READ_REG(hw, IXGBE_FWSTS); + IXGBE_WRITE_REG(hw, IXGBE_FWSTS, fwsts | IXGBE_FWSTS_FWRI); + + /* Check that the host interface is enabled. */ + hicr = IXGBE_READ_REG(hw, IXGBE_HICR); + if (!(hicr & IXGBE_HICR_EN)) { + hw_dbg(hw, "IXGBE_HOST_EN bit disabled.\n"); + return IXGBE_ERR_HOST_INTERFACE_COMMAND; + } + + /* Calculate length in DWORDs. We must be DWORD aligned */ + if (length % sizeof(u32)) { + hw_dbg(hw, "Buffer length failure, not aligned to dword"); + return IXGBE_ERR_INVALID_ARGUMENT; + } + + dword_len = length >> 2; + + /* The device driver writes the relevant command block + * into the ram area. + */ + for (i = 0; i < dword_len; i++) + IXGBE_WRITE_REG_ARRAY(hw, IXGBE_FLEX_MNG, + i, IXGBE_CPU_TO_LE32(buffer[i])); + + /* Setting this bit tells the ARC that a new command is pending. */ + IXGBE_WRITE_REG(hw, IXGBE_HICR, hicr | IXGBE_HICR_C); + + for (i = 0; i < timeout; i++) { + hicr = IXGBE_READ_REG(hw, IXGBE_HICR); + if (!(hicr & IXGBE_HICR_C)) + break; + msec_delay(1); + } + + /* For each command except "Apply Update" perform + * status checks in the HICR registry. + */ + if ((buffer[0] & IXGBE_HOST_INTERFACE_MASK_CMD) == + IXGBE_HOST_INTERFACE_APPLY_UPDATE_CMD) + return IXGBE_SUCCESS; + + /* Check command completion */ + if ((timeout && i == timeout) || + !(IXGBE_READ_REG(hw, IXGBE_HICR) & IXGBE_HICR_SV)) { + ERROR_REPORT1(IXGBE_ERROR_CAUTION, + "Command has failed with no status valid.\n"); + return IXGBE_ERR_HOST_INTERFACE_COMMAND; + } + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_host_interface_command - Issue command to manageability block + * @hw: pointer to the HW structure + * @buffer: contains the command to write and where the return status will + * be placed + * @length: length of buffer, must be multiple of 4 bytes + * @timeout: time in ms to wait for command completion + * @return_data: read and return data from the buffer (true) or not (false) + * Needed because FW structures are big endian and decoding of + * these fields can be 8 bit or 16 bit based on command. Decoding + * is not easily understood without making a table of commands. + * So we will leave this up to the caller to read back the data + * in these cases. + * + * Communicates with the manageability block. On success return IXGBE_SUCCESS + * else returns semaphore error when encountering an error acquiring + * semaphore or IXGBE_ERR_HOST_INTERFACE_COMMAND when command fails. + **/ +s32 ixgbe_host_interface_command(struct ixgbe_hw *hw, u32 *buffer, + u32 length, u32 timeout, bool return_data) +{ + u32 hdr_size = sizeof(struct ixgbe_hic_hdr); + struct ixgbe_hic_hdr *resp = (struct ixgbe_hic_hdr *)buffer; + u16 buf_len; + s32 status; + u32 bi; + u32 dword_len; + + DEBUGFUNC("ixgbe_host_interface_command"); + + if (length == 0 || length > IXGBE_HI_MAX_BLOCK_BYTE_LENGTH) { + hw_dbg(hw, "Buffer length failure buffersize=%d.\n", length); + return IXGBE_ERR_HOST_INTERFACE_COMMAND; + } + + /* Take management host interface semaphore */ + status = hw->mac.ops.acquire_swfw_sync(hw, IXGBE_GSSR_SW_MNG_SM); + if (status) + return status; + + status = ixgbe_hic_unlocked(hw, buffer, length, timeout); + if (status) + goto rel_out; + + if (!return_data) + goto rel_out; + + /* Calculate length in DWORDs */ + dword_len = hdr_size >> 2; + + /* first pull in the header so we know the buffer length */ + for (bi = 0; bi < dword_len; bi++) { + buffer[bi] = IXGBE_READ_REG_ARRAY(hw, IXGBE_FLEX_MNG, bi); + IXGBE_LE32_TO_CPUS(&buffer[bi]); + } + + /* + * If there is any thing in data position pull it in + * Read Flash command requires reading buffer length from + * two byes instead of one byte + */ + if (resp->cmd == 0x30 || resp->cmd == 0x31) { + for (; bi < dword_len + 2; bi++) { + buffer[bi] = IXGBE_READ_REG_ARRAY(hw, IXGBE_FLEX_MNG, + bi); + IXGBE_LE32_TO_CPUS(&buffer[bi]); + } + buf_len = (((u16)(resp->cmd_or_resp.ret_status) << 3) + & 0xF00) | resp->buf_len; + hdr_size += (2 << 2); + } else { + buf_len = resp->buf_len; + } + if (!buf_len) + goto rel_out; + + if (length < buf_len + hdr_size) { + hw_dbg(hw, "Buffer not large enough for reply message.\n"); + status = IXGBE_ERR_HOST_INTERFACE_COMMAND; + goto rel_out; + } + + /* Calculate length in DWORDs, add 3 for odd lengths */ + dword_len = (buf_len + 3) >> 2; + + /* Pull in the rest of the buffer (bi is where we left off) */ + for (; bi <= dword_len; bi++) { + buffer[bi] = IXGBE_READ_REG_ARRAY(hw, IXGBE_FLEX_MNG, bi); + IXGBE_LE32_TO_CPUS(&buffer[bi]); + } + +rel_out: + hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_SW_MNG_SM); + + return status; +} + +/** + * ixgbe_set_fw_drv_ver_generic - Sends driver version to firmware + * @hw: pointer to the HW structure + * @maj: driver version major number + * @min: driver version minor number + * @build: driver version build number + * @sub: driver version sub build number + * @len: unused + * @driver_ver: unused + * + * Sends driver version number to firmware through the manageability + * block. On success return IXGBE_SUCCESS + * else returns IXGBE_ERR_SWFW_SYNC when encountering an error acquiring + * semaphore or IXGBE_ERR_HOST_INTERFACE_COMMAND when command fails. + **/ +s32 ixgbe_set_fw_drv_ver_generic(struct ixgbe_hw *hw, u8 maj, u8 min, + u8 build, u8 sub, u16 len, + const char *driver_ver) +{ + struct ixgbe_hic_drv_info fw_cmd; + int i; + s32 ret_val = IXGBE_SUCCESS; + + DEBUGFUNC("ixgbe_set_fw_drv_ver_generic"); + UNREFERENCED_2PARAMETER(len, driver_ver); + + fw_cmd.hdr.cmd = FW_CEM_CMD_DRIVER_INFO; + fw_cmd.hdr.buf_len = FW_CEM_CMD_DRIVER_INFO_LEN; + fw_cmd.hdr.cmd_or_resp.cmd_resv = FW_CEM_CMD_RESERVED; + fw_cmd.port_num = (u8)hw->bus.func; + fw_cmd.ver_maj = maj; + fw_cmd.ver_min = min; + fw_cmd.ver_build = build; + fw_cmd.ver_sub = sub; + fw_cmd.hdr.checksum = 0; + fw_cmd.pad = 0; + fw_cmd.pad2 = 0; + fw_cmd.hdr.checksum = ixgbe_calculate_checksum((u8 *)&fw_cmd, + (FW_CEM_HDR_LEN + fw_cmd.hdr.buf_len)); + + for (i = 0; i <= FW_CEM_MAX_RETRIES; i++) { + ret_val = ixgbe_host_interface_command(hw, (u32 *)&fw_cmd, + sizeof(fw_cmd), + IXGBE_HI_COMMAND_TIMEOUT, + true); + if (ret_val != IXGBE_SUCCESS) + continue; + + if (fw_cmd.hdr.cmd_or_resp.ret_status == + FW_CEM_RESP_STATUS_SUCCESS) + ret_val = IXGBE_SUCCESS; + else + ret_val = IXGBE_ERR_HOST_INTERFACE_COMMAND; + + break; + } + + return ret_val; +} + +/** + * ixgbe_set_rxpba_generic - Initialize Rx packet buffer + * @hw: pointer to hardware structure + * @num_pb: number of packet buffers to allocate + * @headroom: reserve n KB of headroom + * @strategy: packet buffer allocation strategy + **/ +void ixgbe_set_rxpba_generic(struct ixgbe_hw *hw, int num_pb, u32 headroom, + int strategy) +{ + u32 pbsize = hw->mac.rx_pb_size; + int i = 0; + u32 rxpktsize, txpktsize, txpbthresh; + + /* Reserve headroom */ + pbsize -= headroom; + + if (!num_pb) + num_pb = 1; + + /* Divide remaining packet buffer space amongst the number of packet + * buffers requested using supplied strategy. + */ + switch (strategy) { + case PBA_STRATEGY_WEIGHTED: + /* ixgbe_dcb_pba_80_48 strategy weight first half of packet + * buffer with 5/8 of the packet buffer space. + */ + rxpktsize = (pbsize * 5) / (num_pb * 4); + pbsize -= rxpktsize * (num_pb / 2); + rxpktsize <<= IXGBE_RXPBSIZE_SHIFT; + for (; i < (num_pb / 2); i++) + IXGBE_WRITE_REG(hw, IXGBE_RXPBSIZE(i), rxpktsize); + fallthrough; /* configure remaining packet buffers */ + case PBA_STRATEGY_EQUAL: + rxpktsize = (pbsize / (num_pb - i)) << IXGBE_RXPBSIZE_SHIFT; + for (; i < num_pb; i++) + IXGBE_WRITE_REG(hw, IXGBE_RXPBSIZE(i), rxpktsize); + break; + default: + break; + } + + /* Only support an equally distributed Tx packet buffer strategy. */ + txpktsize = IXGBE_TXPBSIZE_MAX / num_pb; + txpbthresh = (txpktsize / 1024) - IXGBE_TXPKT_SIZE_MAX; + for (i = 0; i < num_pb; i++) { + IXGBE_WRITE_REG(hw, IXGBE_TXPBSIZE(i), txpktsize); + IXGBE_WRITE_REG(hw, IXGBE_TXPBTHRESH(i), txpbthresh); + } + + /* Clear unused TCs, if any, to zero buffer size*/ + for (; i < IXGBE_MAX_PB; i++) { + IXGBE_WRITE_REG(hw, IXGBE_RXPBSIZE(i), 0); + IXGBE_WRITE_REG(hw, IXGBE_TXPBSIZE(i), 0); + IXGBE_WRITE_REG(hw, IXGBE_TXPBTHRESH(i), 0); + } +} + +/** + * ixgbe_clear_tx_pending - Clear pending TX work from the PCIe fifo + * @hw: pointer to the hardware structure + * + * The 82599 and x540 MACs can experience issues if TX work is still pending + * when a reset occurs. This function prevents this by flushing the PCIe + * buffers on the system. + **/ +void ixgbe_clear_tx_pending(struct ixgbe_hw *hw) +{ + u32 gcr_ext, hlreg0, i, poll; + u16 value; + + /* + * If double reset is not requested then all transactions should + * already be clear and as such there is no work to do + */ + if (!(hw->mac.flags & IXGBE_FLAGS_DOUBLE_RESET_REQUIRED)) + return; + + /* + * Set loopback enable to prevent any transmits from being sent + * should the link come up. This assumes that the RXCTRL.RXEN bit + * has already been cleared. + */ + hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0); + IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0 | IXGBE_HLREG0_LPBK); + + /* Wait for a last completion before clearing buffers */ + IXGBE_WRITE_FLUSH(hw); + msec_delay(3); + + /* + * Before proceeding, make sure that the PCIe block does not have + * transactions pending. + */ + poll = ixgbe_pcie_timeout_poll(hw); + for (i = 0; i < poll; i++) { + usec_delay(100); + value = IXGBE_READ_PCIE_WORD(hw, IXGBE_PCI_DEVICE_STATUS); + if (IXGBE_REMOVED(hw->hw_addr)) + goto out; + if (!(value & IXGBE_PCI_DEVICE_STATUS_TRANSACTION_PENDING)) + goto out; + } + +out: + /* initiate cleaning flow for buffers in the PCIe transaction layer */ + gcr_ext = IXGBE_READ_REG(hw, IXGBE_GCR_EXT); + IXGBE_WRITE_REG(hw, IXGBE_GCR_EXT, + gcr_ext | IXGBE_GCR_EXT_BUFFERS_CLEAR); + + /* Flush all writes and allow 20usec for all transactions to clear */ + IXGBE_WRITE_FLUSH(hw); + usec_delay(20); + + /* restore previous register values */ + IXGBE_WRITE_REG(hw, IXGBE_GCR_EXT, gcr_ext); + IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0); +} + +STATIC const u8 ixgbe_emc_temp_data[4] = { + IXGBE_EMC_INTERNAL_DATA, + IXGBE_EMC_DIODE1_DATA, + IXGBE_EMC_DIODE2_DATA, + IXGBE_EMC_DIODE3_DATA +}; +STATIC const u8 ixgbe_emc_therm_limit[4] = { + IXGBE_EMC_INTERNAL_THERM_LIMIT, + IXGBE_EMC_DIODE1_THERM_LIMIT, + IXGBE_EMC_DIODE2_THERM_LIMIT, + IXGBE_EMC_DIODE3_THERM_LIMIT +}; + +/** + * ixgbe_get_thermal_sensor_data_generic - Gathers thermal sensor data + * @hw: pointer to hardware structure + * + * Returns the thermal sensor data structure + **/ +s32 ixgbe_get_thermal_sensor_data_generic(struct ixgbe_hw *hw) +{ + s32 status = IXGBE_SUCCESS; + u16 ets_offset; + u16 ets_cfg; + u16 ets_sensor; + u8 num_sensors; + u8 sensor_index; + u8 sensor_location; + u8 i; + struct ixgbe_thermal_sensor_data *data = &hw->mac.thermal_sensor_data; + + DEBUGFUNC("ixgbe_get_thermal_sensor_data_generic"); + + /* Only support thermal sensors attached to 82599 physical port 0 */ + if ((hw->mac.type != ixgbe_mac_82599EB) || + (IXGBE_READ_REG(hw, IXGBE_STATUS) & IXGBE_STATUS_LAN_ID_1)) { + status = IXGBE_NOT_IMPLEMENTED; + goto out; + } + + status = hw->eeprom.ops.read(hw, IXGBE_ETS_CFG, &ets_offset); + if (status) + goto out; + + if ((ets_offset == 0x0000) || (ets_offset == 0xFFFF)) { + status = IXGBE_NOT_IMPLEMENTED; + goto out; + } + + status = hw->eeprom.ops.read(hw, ets_offset, &ets_cfg); + if (status) + goto out; + + if (((ets_cfg & IXGBE_ETS_TYPE_MASK) >> IXGBE_ETS_TYPE_SHIFT) + != IXGBE_ETS_TYPE_EMC) { + status = IXGBE_NOT_IMPLEMENTED; + goto out; + } + + num_sensors = (ets_cfg & IXGBE_ETS_NUM_SENSORS_MASK); + if (num_sensors > IXGBE_MAX_SENSORS) + num_sensors = IXGBE_MAX_SENSORS; + + for (i = 0; i < num_sensors; i++) { + status = hw->eeprom.ops.read(hw, (ets_offset + 1 + i), + &ets_sensor); + if (status) + goto out; + + sensor_index = ((ets_sensor & IXGBE_ETS_DATA_INDEX_MASK) >> + IXGBE_ETS_DATA_INDEX_SHIFT); + sensor_location = ((ets_sensor & IXGBE_ETS_DATA_LOC_MASK) >> + IXGBE_ETS_DATA_LOC_SHIFT); + + if (sensor_location != 0) { + status = hw->phy.ops.read_i2c_byte(hw, + ixgbe_emc_temp_data[sensor_index], + IXGBE_I2C_THERMAL_SENSOR_ADDR, + &data->sensor[i].temp); + if (status) + goto out; + } + } +out: + return status; +} + +/** + * ixgbe_init_thermal_sensor_thresh_generic - Inits thermal sensor thresholds + * @hw: pointer to hardware structure + * + * Inits the thermal sensor thresholds according to the NVM map + * and save off the threshold and location values into mac.thermal_sensor_data + **/ +s32 ixgbe_init_thermal_sensor_thresh_generic(struct ixgbe_hw *hw) +{ + s32 status = IXGBE_SUCCESS; + u16 offset; + u16 ets_offset; + u16 ets_cfg; + u16 ets_sensor; + u8 low_thresh_delta; + u8 num_sensors; + u8 sensor_index; + u8 sensor_location; + u8 therm_limit; + u8 i; + struct ixgbe_thermal_sensor_data *data = &hw->mac.thermal_sensor_data; + + DEBUGFUNC("ixgbe_init_thermal_sensor_thresh_generic"); + + memset(data, 0, sizeof(struct ixgbe_thermal_sensor_data)); + + /* Only support thermal sensors attached to 82599 physical port 0 */ + if ((hw->mac.type != ixgbe_mac_82599EB) || + (IXGBE_READ_REG(hw, IXGBE_STATUS) & IXGBE_STATUS_LAN_ID_1)) + return IXGBE_NOT_IMPLEMENTED; + + offset = IXGBE_ETS_CFG; + if (hw->eeprom.ops.read(hw, offset, &ets_offset)) + goto eeprom_err; + if ((ets_offset == 0x0000) || (ets_offset == 0xFFFF)) + return IXGBE_NOT_IMPLEMENTED; + + offset = ets_offset; + if (hw->eeprom.ops.read(hw, offset, &ets_cfg)) + goto eeprom_err; + if (((ets_cfg & IXGBE_ETS_TYPE_MASK) >> IXGBE_ETS_TYPE_SHIFT) + != IXGBE_ETS_TYPE_EMC) + return IXGBE_NOT_IMPLEMENTED; + + low_thresh_delta = ((ets_cfg & IXGBE_ETS_LTHRES_DELTA_MASK) >> + IXGBE_ETS_LTHRES_DELTA_SHIFT); + num_sensors = (ets_cfg & IXGBE_ETS_NUM_SENSORS_MASK); + + for (i = 0; i < num_sensors; i++) { + offset = ets_offset + 1 + i; + if (hw->eeprom.ops.read(hw, offset, &ets_sensor)) { + ERROR_REPORT2(IXGBE_ERROR_INVALID_STATE, + "eeprom read at offset %d failed", + offset); + continue; + } + sensor_index = ((ets_sensor & IXGBE_ETS_DATA_INDEX_MASK) >> + IXGBE_ETS_DATA_INDEX_SHIFT); + sensor_location = ((ets_sensor & IXGBE_ETS_DATA_LOC_MASK) >> + IXGBE_ETS_DATA_LOC_SHIFT); + therm_limit = ets_sensor & IXGBE_ETS_DATA_HTHRESH_MASK; + + hw->phy.ops.write_i2c_byte(hw, + ixgbe_emc_therm_limit[sensor_index], + IXGBE_I2C_THERMAL_SENSOR_ADDR, therm_limit); + + if ((i < IXGBE_MAX_SENSORS) && (sensor_location != 0)) { + data->sensor[i].location = sensor_location; + data->sensor[i].caution_thresh = therm_limit; + data->sensor[i].max_op_thresh = therm_limit - + low_thresh_delta; + } + } + return status; + +eeprom_err: + ERROR_REPORT2(IXGBE_ERROR_INVALID_STATE, + "eeprom read at offset %d failed", offset); + return IXGBE_NOT_IMPLEMENTED; +} + +/** + * ixgbe_get_orom_version - Return option ROM from EEPROM + * + * @hw: pointer to hardware structure + * @nvm_ver: pointer to output structure + * + * if valid option ROM version, nvm_ver->or_valid set to true + * else nvm_ver->or_valid is false. + **/ +void ixgbe_get_orom_version(struct ixgbe_hw *hw, + struct ixgbe_nvm_version *nvm_ver) +{ + u16 offset, eeprom_cfg_blkh, eeprom_cfg_blkl; + + nvm_ver->or_valid = false; + /* Option Rom may or may not be present. Start with pointer */ + hw->eeprom.ops.read(hw, NVM_OROM_OFFSET, &offset); + + /* make sure offset is valid */ + if ((offset == 0x0) || (offset == NVM_INVALID_PTR)) + return; + + hw->eeprom.ops.read(hw, offset + NVM_OROM_BLK_HI, &eeprom_cfg_blkh); + hw->eeprom.ops.read(hw, offset + NVM_OROM_BLK_LOW, &eeprom_cfg_blkl); + + /* option rom exists and is valid */ + if ((eeprom_cfg_blkl | eeprom_cfg_blkh) == 0x0 || + eeprom_cfg_blkl == NVM_VER_INVALID || + eeprom_cfg_blkh == NVM_VER_INVALID) + return; + + nvm_ver->or_valid = true; + nvm_ver->or_major = eeprom_cfg_blkl >> NVM_OROM_SHIFT; + nvm_ver->or_build = (eeprom_cfg_blkl << NVM_OROM_SHIFT) | + (eeprom_cfg_blkh >> NVM_OROM_SHIFT); + nvm_ver->or_patch = eeprom_cfg_blkh & NVM_OROM_PATCH_MASK; +} + +/** + * ixgbe_get_oem_prod_version - Return OEM Product version + * + * @hw: pointer to hardware structure + * @nvm_ver: pointer to output structure + * + * if valid OEM product version, nvm_ver->oem_valid set to true + * else nvm_ver->oem_valid is false. + **/ +void ixgbe_get_oem_prod_version(struct ixgbe_hw *hw, + struct ixgbe_nvm_version *nvm_ver) +{ + u16 rel_num, prod_ver, mod_len, cap, offset; + + nvm_ver->oem_valid = false; + hw->eeprom.ops.read(hw, NVM_OEM_PROD_VER_PTR, &offset); + + /* Return is offset to OEM Product Version block is invalid */ + if (offset == 0x0 || offset == NVM_INVALID_PTR) + return; + + /* Read product version block */ + hw->eeprom.ops.read(hw, offset, &mod_len); + hw->eeprom.ops.read(hw, offset + NVM_OEM_PROD_VER_CAP_OFF, &cap); + + /* Return if OEM product version block is invalid */ + if (mod_len != NVM_OEM_PROD_VER_MOD_LEN || + (cap & NVM_OEM_PROD_VER_CAP_MASK) != 0x0) + return; + + hw->eeprom.ops.read(hw, offset + NVM_OEM_PROD_VER_OFF_L, &prod_ver); + hw->eeprom.ops.read(hw, offset + NVM_OEM_PROD_VER_OFF_H, &rel_num); + + /* Return if version is invalid */ + if ((rel_num | prod_ver) == 0x0 || + rel_num == NVM_VER_INVALID || prod_ver == NVM_VER_INVALID) + return; + + nvm_ver->oem_major = prod_ver >> NVM_VER_SHIFT; + nvm_ver->oem_minor = prod_ver & NVM_VER_MASK; + nvm_ver->oem_release = rel_num; + nvm_ver->oem_valid = true; +} + +/** + * ixgbe_get_etk_id() - Read ETK ID from NVM and store it into @nvm_ver + * @hw: device hardware handle + * @nvm_ver: output container; fills @etk_id field + * + * Reads two 16-bit words from NVM, determines the word order using + * NVM_ETK_VALID, and assembles the 32-bit ETK ID. + */ +void ixgbe_get_etk_id(struct ixgbe_hw *hw, struct ixgbe_nvm_version *nvm_ver) +{ + u16 etk_id_l, etk_id_h; + u32 lo, hi; + + if (hw->eeprom.ops.read(hw, NVM_ETK_OFF_LOW, &etk_id_l)) + etk_id_l = NVM_VER_INVALID; + if (hw->eeprom.ops.read(hw, NVM_ETK_OFF_HI, &etk_id_h)) + etk_id_h = NVM_VER_INVALID; + + /* The word order for the version format is determined by high order + * word bit 15. + */ + lo = (etk_id_h & NVM_ETK_VALID) ? etk_id_l : etk_id_h; + hi = (etk_id_h & NVM_ETK_VALID) ? etk_id_h : etk_id_l; + + /* Ensure LHS is u32 so shift occurs in unsigned 32-bit + * to avoid implicit u16 -> int promotion by compiler. + */ + nvm_ver->etk_id = (hi << NVM_ETK_SHIFT) | lo; +} + +/** + * ixgbe_dcb_get_rtrup2tc_generic - read rtrup2tc reg + * @hw: pointer to hardware structure + * @map: pointer to u8 arr for returning map + * + * Read the rtrup2tc HW register and resolve its content into map + **/ +void ixgbe_dcb_get_rtrup2tc_generic(struct ixgbe_hw *hw, u8 *map) +{ + u32 reg, i; + + reg = IXGBE_READ_REG(hw, IXGBE_RTRUP2TC); + for (i = 0; i < IXGBE_DCB_MAX_USER_PRIORITY; i++) + map[i] = IXGBE_RTRUP2TC_UP_MASK & + (reg >> (i * IXGBE_RTRUP2TC_UP_SHIFT)); + return; +} + +void ixgbe_disable_rx_generic(struct ixgbe_hw *hw) +{ + u32 pfdtxgswc; + u32 rxctrl; + + rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL); + if (rxctrl & IXGBE_RXCTRL_RXEN) { + if (hw->mac.type != ixgbe_mac_82598EB) { + pfdtxgswc = IXGBE_READ_REG(hw, IXGBE_PFDTXGSWC); + if (pfdtxgswc & IXGBE_PFDTXGSWC_VT_LBEN) { + pfdtxgswc &= ~IXGBE_PFDTXGSWC_VT_LBEN; + IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, pfdtxgswc); + hw->mac.set_lben = true; + } else { + hw->mac.set_lben = false; + } + } + rxctrl &= ~IXGBE_RXCTRL_RXEN; + IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl); + } +} + +void ixgbe_enable_rx_generic(struct ixgbe_hw *hw) +{ + u32 pfdtxgswc; + u32 rxctrl; + + rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL); + IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, (rxctrl | IXGBE_RXCTRL_RXEN)); + + if (hw->mac.type != ixgbe_mac_82598EB) { + if (hw->mac.set_lben) { + pfdtxgswc = IXGBE_READ_REG(hw, IXGBE_PFDTXGSWC); + pfdtxgswc |= IXGBE_PFDTXGSWC_VT_LBEN; + IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, pfdtxgswc); + hw->mac.set_lben = false; + } + } +} + +/** + * ixgbe_mng_present - returns true when management capability is present + * @hw: pointer to hardware structure + */ +bool ixgbe_mng_present(struct ixgbe_hw *hw) +{ + u32 fwsm; + + if (hw->mac.type < ixgbe_mac_82599EB) + return false; + + fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM_BY_MAC(hw)); + + return !!(fwsm & IXGBE_FWSM_FW_MODE_PT); +} + +/** + * ixgbe_mng_enabled - Is the manageability engine enabled? + * @hw: pointer to hardware structure + * + * Returns true if the manageability engine is enabled. + **/ +bool ixgbe_mng_enabled(struct ixgbe_hw *hw) +{ + u32 fwsm, manc, factps; + + fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM_BY_MAC(hw)); + if ((fwsm & IXGBE_FWSM_MODE_MASK) != IXGBE_FWSM_FW_MODE_PT) + return false; + + manc = IXGBE_READ_REG(hw, IXGBE_MANC); + if (!(manc & IXGBE_MANC_RCV_TCO_EN)) + return false; + + if (hw->mac.type <= ixgbe_mac_X540) { + factps = IXGBE_READ_REG(hw, IXGBE_FACTPS_BY_MAC(hw)); + if (factps & IXGBE_FACTPS_MNGCG) + return false; + } + + return true; +} + +/** + * ixgbe_setup_mac_link_multispeed_fiber - Set MAC link speed + * @hw: pointer to hardware structure + * @speed: new link speed + * @autoneg_wait_to_complete: true when waiting for completion is needed + * + * Set the link speed in the MAC and/or PHY register and restarts link. + **/ +s32 ixgbe_setup_mac_link_multispeed_fiber(struct ixgbe_hw *hw, + ixgbe_link_speed speed, + bool autoneg_wait_to_complete) +{ + ixgbe_link_speed link_speed = IXGBE_LINK_SPEED_UNKNOWN; + ixgbe_link_speed highest_link_speed = IXGBE_LINK_SPEED_UNKNOWN; + s32 status = IXGBE_SUCCESS; + u32 speedcnt = 0; + u32 i = 0; + bool autoneg, link_up = false; + + DEBUGFUNC("ixgbe_setup_mac_link_multispeed_fiber"); + + /* Mask off requested but non-supported speeds */ + status = ixgbe_get_link_capabilities(hw, &link_speed, &autoneg); + if (status != IXGBE_SUCCESS) + return status; + + speed &= link_speed; + + /* Try each speed one by one, highest priority first. We do this in + * software because 10Gb fiber doesn't support speed autonegotiation. + */ + if (speed & IXGBE_LINK_SPEED_10GB_FULL) { + speedcnt++; + highest_link_speed = IXGBE_LINK_SPEED_10GB_FULL; + + /* Set the module link speed */ + switch (hw->phy.media_type) { + case ixgbe_media_type_fiber: + ixgbe_set_rate_select_speed(hw, + IXGBE_LINK_SPEED_10GB_FULL); + break; + case ixgbe_media_type_fiber_qsfp: + /* QSFP module automatically detects MAC link speed */ + break; + default: + hw_dbg(hw, "Unexpected media type.\n"); + break; + } + + /* Allow module to change analog characteristics (1G->10G) */ + msec_delay(40); + + status = ixgbe_setup_mac_link(hw, + IXGBE_LINK_SPEED_10GB_FULL, + autoneg_wait_to_complete); + if (status != IXGBE_SUCCESS) + return status; + + /* Flap the Tx laser if it has not already been done */ + ixgbe_flap_tx_laser(hw); + + /* Wait for the controller to acquire link. Per IEEE 802.3ap, + * Section 73.10.2, we may have to wait up to 500ms if KR is + * attempted. 82599 uses the same timing for 10g SFI. + */ + for (i = 0; i < 5; i++) { + /* Wait for the link partner to also set speed */ + msec_delay(100); + + /* If we have link, just jump out */ + status = ixgbe_check_link(hw, &link_speed, + &link_up, false); + if (status != IXGBE_SUCCESS) + return status; + + if (link_up) + goto out; + } + } + + if (speed & IXGBE_LINK_SPEED_1GB_FULL) { + speedcnt++; + if (highest_link_speed == IXGBE_LINK_SPEED_UNKNOWN) + highest_link_speed = IXGBE_LINK_SPEED_1GB_FULL; + + /* Set the module link speed */ + switch (hw->phy.media_type) { + case ixgbe_media_type_fiber: + ixgbe_set_rate_select_speed(hw, + IXGBE_LINK_SPEED_1GB_FULL); + break; + case ixgbe_media_type_fiber_qsfp: + /* QSFP module automatically detects link speed */ + break; + default: + hw_dbg(hw, "Unexpected media type.\n"); + break; + } + + /* Allow module to change analog characteristics (10G->1G) */ + msec_delay(40); + + status = ixgbe_setup_mac_link(hw, + IXGBE_LINK_SPEED_1GB_FULL, + autoneg_wait_to_complete); + if (status != IXGBE_SUCCESS) + return status; + + /* Flap the Tx laser if it has not already been done */ + ixgbe_flap_tx_laser(hw); + + /* Wait for the link partner to also set speed */ + msec_delay(100); + + /* If we have link, just jump out */ + status = ixgbe_check_link(hw, &link_speed, &link_up, false); + if (status != IXGBE_SUCCESS) + return status; + + if (link_up) + goto out; + } + + /* We didn't get link. Configure back to the highest speed we tried, + * (if there was more than one). We call ourselves back with just the + * single highest speed that the user requested. + */ + if (speedcnt > 1) + status = ixgbe_setup_mac_link_multispeed_fiber(hw, + highest_link_speed, + autoneg_wait_to_complete); + +out: + /* Set autoneg_advertised value based on input link speed */ + hw->phy.autoneg_advertised = 0; + + if (speed & IXGBE_LINK_SPEED_10GB_FULL) + hw->phy.autoneg_advertised |= IXGBE_LINK_SPEED_10GB_FULL; + + if (speed & IXGBE_LINK_SPEED_1GB_FULL) + hw->phy.autoneg_advertised |= IXGBE_LINK_SPEED_1GB_FULL; + + return status; +} + +/** + * ixgbe_set_soft_rate_select_speed - Set module link speed + * @hw: pointer to hardware structure + * @speed: link speed to set + * + * Set module link speed via the soft rate select. + */ +void ixgbe_set_soft_rate_select_speed(struct ixgbe_hw *hw, + ixgbe_link_speed speed) +{ + s32 status; + u8 rs, eeprom_data; + + switch (speed) { + case IXGBE_LINK_SPEED_10GB_FULL: + /* one bit mask same as setting on */ + rs = IXGBE_SFF_SOFT_RS_SELECT_10G; + break; + case IXGBE_LINK_SPEED_1GB_FULL: + rs = IXGBE_SFF_SOFT_RS_SELECT_1G; + break; + default: + hw_dbg(hw, "Invalid fixed module speed\n"); + return; + } + + /* Set RS0 */ + status = hw->phy.ops.read_i2c_byte(hw, IXGBE_SFF_SFF_8472_OSCB, + IXGBE_I2C_EEPROM_DEV_ADDR2, + &eeprom_data); + if (status) { + hw_dbg(hw, "Failed to read Rx Rate Select RS0\n"); + goto out; + } + + eeprom_data = (eeprom_data & ~IXGBE_SFF_SOFT_RS_SELECT_MASK) | rs; + + status = hw->phy.ops.write_i2c_byte(hw, IXGBE_SFF_SFF_8472_OSCB, + IXGBE_I2C_EEPROM_DEV_ADDR2, + eeprom_data); + if (status) { + hw_dbg(hw, "Failed to write Rx Rate Select RS0\n"); + goto out; + } + + /* Set RS1 */ + status = hw->phy.ops.read_i2c_byte(hw, IXGBE_SFF_SFF_8472_ESCB, + IXGBE_I2C_EEPROM_DEV_ADDR2, + &eeprom_data); + if (status) { + hw_dbg(hw, "Failed to read Rx Rate Select RS1\n"); + goto out; + } + + eeprom_data = (eeprom_data & ~IXGBE_SFF_SOFT_RS_SELECT_MASK) | rs; + + status = hw->phy.ops.write_i2c_byte(hw, IXGBE_SFF_SFF_8472_ESCB, + IXGBE_I2C_EEPROM_DEV_ADDR2, + eeprom_data); + if (status) { + hw_dbg(hw, "Failed to write Rx Rate Select RS1\n"); + goto out; + } +out: + return; +} diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_common.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_common.h new file mode 100644 index 00000000000..a9101b2c76f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_common.h @@ -0,0 +1,151 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 1999 - 2026 Intel Corporation */ + +#ifndef _IXGBE_COMMON_H_ +#define _IXGBE_COMMON_H_ + +#include "ixgbe_type.h" + +void ixgbe_dcb_get_rtrup2tc_generic(struct ixgbe_hw *hw, u8 *map); + +u16 ixgbe_get_pcie_msix_count_generic(struct ixgbe_hw *hw); +s32 ixgbe_init_ops_generic(struct ixgbe_hw *hw); +s32 ixgbe_init_hw_generic(struct ixgbe_hw *hw); +s32 ixgbe_start_hw_generic(struct ixgbe_hw *hw); +void ixgbe_start_hw_gen2(struct ixgbe_hw *hw); +s32 ixgbe_clear_hw_cntrs_generic(struct ixgbe_hw *hw); +s32 ixgbe_read_pba_string_generic(struct ixgbe_hw *hw, u8 *pba_num, + u32 pba_num_size); +s32 ixgbe_get_mac_addr_generic(struct ixgbe_hw *hw, u8 *mac_addr); +s32 ixgbe_get_bus_info_generic(struct ixgbe_hw *hw); +void ixgbe_set_pci_config_data_generic(struct ixgbe_hw *hw, u16 link_status); +void ixgbe_set_lan_id_multi_port_pcie(struct ixgbe_hw *hw); +s32 ixgbe_stop_adapter_generic(struct ixgbe_hw *hw); + +s32 ixgbe_led_on_generic(struct ixgbe_hw *hw, u32 index); +s32 ixgbe_led_off_generic(struct ixgbe_hw *hw, u32 index); +s32 ixgbe_init_led_link_act_generic(struct ixgbe_hw *hw); + +s32 ixgbe_init_eeprom_params_generic(struct ixgbe_hw *hw); +s32 ixgbe_write_eeprom_generic(struct ixgbe_hw *hw, u16 offset, u16 data); +s32 ixgbe_write_eeprom_buffer_bit_bang_generic(struct ixgbe_hw *hw, u16 offset, + u16 words, u16 *data); +s32 ixgbe_read_eerd_generic(struct ixgbe_hw *hw, u16 offset, u16 *data); +s32 ixgbe_read_eerd_buffer_generic(struct ixgbe_hw *hw, u16 offset, + u16 words, u16 *data); +s32 ixgbe_write_eewr_generic(struct ixgbe_hw *hw, u16 offset, u16 data); +s32 ixgbe_write_eewr_buffer_generic(struct ixgbe_hw *hw, u16 offset, + u16 words, u16 *data); +s32 ixgbe_read_eeprom_bit_bang_generic(struct ixgbe_hw *hw, u16 offset, + u16 *data); +s32 ixgbe_read_eeprom_buffer_bit_bang_generic(struct ixgbe_hw *hw, u16 offset, + u16 words, u16 *data); +s32 ixgbe_calc_eeprom_checksum_generic(struct ixgbe_hw *hw); +s32 ixgbe_validate_eeprom_checksum_generic(struct ixgbe_hw *hw, + u16 *checksum_val); +s32 ixgbe_update_eeprom_checksum_generic(struct ixgbe_hw *hw); +s32 ixgbe_poll_eerd_eewr_done(struct ixgbe_hw *hw, u32 ee_reg); + +s32 ixgbe_set_rar_generic(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq, + u32 enable_addr); +s32 ixgbe_clear_rar_generic(struct ixgbe_hw *hw, u32 index); +s32 ixgbe_init_rx_addrs_generic(struct ixgbe_hw *hw); +s32 ixgbe_update_mc_addr_list_generic(struct ixgbe_hw *hw, u8 *mc_addr_list, + u32 mc_addr_count, + ixgbe_mc_addr_itr func, bool clear); +s32 ixgbe_update_uc_addr_list_generic(struct ixgbe_hw *hw, u8 *addr_list, + u32 addr_count, ixgbe_mc_addr_itr func); +s32 ixgbe_enable_mc_generic(struct ixgbe_hw *hw); +s32 ixgbe_disable_mc_generic(struct ixgbe_hw *hw); +s32 ixgbe_enable_rx_dma_generic(struct ixgbe_hw *hw, u32 regval); +s32 ixgbe_disable_sec_rx_path_generic(struct ixgbe_hw *hw); +s32 ixgbe_enable_sec_rx_path_generic(struct ixgbe_hw *hw); + +s32 ixgbe_fc_enable_generic(struct ixgbe_hw *hw); +bool ixgbe_device_supports_autoneg_fc(struct ixgbe_hw *hw); +void ixgbe_fc_autoneg(struct ixgbe_hw *hw); +s32 ixgbe_setup_fc_generic(struct ixgbe_hw *hw); + +s32 ixgbe_validate_mac_addr(u8 *mac_addr); +s32 ixgbe_acquire_swfw_sync(struct ixgbe_hw *hw, u32 mask); +void ixgbe_release_swfw_sync(struct ixgbe_hw *hw, u32 mask); +s32 ixgbe_disable_pcie_primary(struct ixgbe_hw *hw); + +s32 prot_autoc_read_generic(struct ixgbe_hw *hw, bool *, u32 *reg_val); +s32 prot_autoc_write_generic(struct ixgbe_hw *hw, u32 reg_val, bool locked); + +s32 ixgbe_blink_led_start_generic(struct ixgbe_hw *hw, u32 index); +s32 ixgbe_blink_led_stop_generic(struct ixgbe_hw *hw, u32 index); + +s32 ixgbe_get_san_mac_addr_generic(struct ixgbe_hw *hw, u8 *san_mac_addr); +s32 ixgbe_set_san_mac_addr_generic(struct ixgbe_hw *hw, u8 *san_mac_addr); + +s32 ixgbe_set_vmdq_generic(struct ixgbe_hw *hw, u32 rar, u32 vmdq); +s32 ixgbe_set_vmdq_san_mac_generic(struct ixgbe_hw *hw, u32 vmdq); +s32 ixgbe_clear_vmdq_generic(struct ixgbe_hw *hw, u32 rar, u32 vmdq); +s32 ixgbe_insert_mac_addr_generic(struct ixgbe_hw *hw, u8 *addr, u32 vmdq); +s32 ixgbe_init_uta_tables_generic(struct ixgbe_hw *hw); +s32 ixgbe_set_vfta_generic(struct ixgbe_hw *hw, u32 vlan, + u32 vind, bool vlan_on, bool vlvf_bypass); +s32 ixgbe_set_vlvf_generic(struct ixgbe_hw *hw, u32 vlan, u32 vind, + bool vlan_on, u32 *vfta_delta, u32 vfta, + bool vlvf_bypass); +s32 ixgbe_clear_vfta_generic(struct ixgbe_hw *hw); +s32 ixgbe_find_vlvf_slot(struct ixgbe_hw *hw, u32 vlan, bool vlvf_bypass); +s32 ixgbe_toggle_txdctl_generic(struct ixgbe_hw *hw, u32 vind); + +s32 ixgbe_check_mac_link_generic(struct ixgbe_hw *hw, + ixgbe_link_speed *speed, + bool *link_up, bool link_up_wait_to_complete); + +s32 ixgbe_get_wwn_prefix_generic(struct ixgbe_hw *hw, u16 *wwnn_prefix, + u16 *wwpn_prefix); + +s32 ixgbe_get_fcoe_boot_status_generic(struct ixgbe_hw *hw, u16 *bs); +void ixgbe_set_mac_anti_spoofing(struct ixgbe_hw *hw, bool enable, int vf); +void ixgbe_set_vlan_anti_spoofing(struct ixgbe_hw *hw, bool enable, int vf); +s32 ixgbe_get_device_caps_generic(struct ixgbe_hw *hw, u16 *device_caps); +void ixgbe_set_rxpba_generic(struct ixgbe_hw *hw, int num_pb, u32 headroom, + int strategy); +s32 ixgbe_set_fw_drv_ver_generic(struct ixgbe_hw *hw, u8 maj, u8 min, + u8 build, u8 ver, u16 len, const char *str); +u8 ixgbe_calculate_checksum(u8 *buffer, u32 length); +s32 ixgbe_host_interface_command(struct ixgbe_hw *hw, u32 *buffer, + u32 length, u32 timeout, bool return_data); +s32 ixgbe_hic_unlocked(struct ixgbe_hw *, u32 *buffer, u32 length, u32 timeout); +s32 ixgbe_shutdown_fw_phy(struct ixgbe_hw *); +s32 ixgbe_fw_phy_activity(struct ixgbe_hw *, u16 activity, + u32 (*data)[FW_PHY_ACT_DATA_COUNT]); +void ixgbe_clear_tx_pending(struct ixgbe_hw *hw); + +extern s32 ixgbe_reset_pipeline_82599(struct ixgbe_hw *hw); +extern void ixgbe_stop_mac_link_on_d3_82599(struct ixgbe_hw *hw); +bool ixgbe_mng_present(struct ixgbe_hw *hw); +bool ixgbe_mng_enabled(struct ixgbe_hw *hw); + +#define IXGBE_I2C_THERMAL_SENSOR_ADDR 0xF8 +#define IXGBE_EMC_INTERNAL_DATA 0x00 +#define IXGBE_EMC_INTERNAL_THERM_LIMIT 0x20 +#define IXGBE_EMC_DIODE1_DATA 0x01 +#define IXGBE_EMC_DIODE1_THERM_LIMIT 0x19 +#define IXGBE_EMC_DIODE2_DATA 0x23 +#define IXGBE_EMC_DIODE2_THERM_LIMIT 0x1A +#define IXGBE_EMC_DIODE3_DATA 0x2A +#define IXGBE_EMC_DIODE3_THERM_LIMIT 0x30 + +s32 ixgbe_get_thermal_sensor_data_generic(struct ixgbe_hw *hw); +s32 ixgbe_init_thermal_sensor_thresh_generic(struct ixgbe_hw *hw); + +void ixgbe_get_etk_id(struct ixgbe_hw *hw, struct ixgbe_nvm_version *nvm_ver); +void ixgbe_get_oem_prod_version(struct ixgbe_hw *hw, + struct ixgbe_nvm_version *nvm_ver); +void ixgbe_get_orom_version(struct ixgbe_hw *hw, + struct ixgbe_nvm_version *nvm_ver); +void ixgbe_disable_rx_generic(struct ixgbe_hw *hw); +void ixgbe_enable_rx_generic(struct ixgbe_hw *hw); +s32 ixgbe_setup_mac_link_multispeed_fiber(struct ixgbe_hw *hw, + ixgbe_link_speed speed, + bool autoneg_wait_to_complete); +void ixgbe_set_soft_rate_select_speed(struct ixgbe_hw *hw, + ixgbe_link_speed speed); +#endif /* IXGBE_COMMON */ diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_dcb.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_dcb.c new file mode 100644 index 00000000000..00fecdbe23e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_dcb.c @@ -0,0 +1,702 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 1999 - 2026 Intel Corporation */ + +#include "ixgbe_type.h" +#include "ixgbe_dcb.h" +#include "ixgbe_dcb_82598.h" +#include "ixgbe_dcb_82599.h" + +/** + * ixgbe_dcb_calculate_tc_credits - This calculates the ieee traffic class + * credits from the configured bandwidth percentages. Credits + * are the smallest unit programmable into the underlying + * hardware. The IEEE 802.1Qaz specification do not use bandwidth + * groups so this is much simplified from the CEE case. + * @bw: bandwidth index by traffic class + * @refill: refill credits index by traffic class + * @max: max credits by traffic class + * @max_frame_size: maximum frame size + */ +s32 ixgbe_dcb_calculate_tc_credits(u8 *bw, u16 *refill, u16 *max, + int max_frame_size) +{ + int min_percent = 100; + int min_credit, multiplier; + int i; + + min_credit = ((max_frame_size / 2) + IXGBE_DCB_CREDIT_QUANTUM - 1) / + IXGBE_DCB_CREDIT_QUANTUM; + + for (i = 0; i < IXGBE_DCB_MAX_TRAFFIC_CLASS; i++) { + if (bw[i] < min_percent && bw[i]) + min_percent = bw[i]; + } + + multiplier = (min_credit / min_percent) + 1; + + /* Find out the hw credits for each TC */ + for (i = 0; i < IXGBE_DCB_MAX_TRAFFIC_CLASS; i++) { + int val = min(bw[i] * multiplier, IXGBE_DCB_MAX_CREDIT_REFILL); + + if (val < min_credit) + val = min_credit; + refill[i] = (u16)val; + + max[i] = bw[i] ? (bw[i]*IXGBE_DCB_MAX_CREDIT)/100 : min_credit; + } + + return 0; +} + +/** + * ixgbe_dcb_calculate_tc_credits_cee - Calculates traffic class credits + * @hw: pointer to hardware structure + * @dcb_config: Struct containing DCB settings + * @max_frame_size: Maximum frame size + * @direction: Configuring either Tx or Rx + * + * This function calculates the credits allocated to each traffic class. + * It should be called only after the rules are checked by + * ixgbe_dcb_check_config_cee(). + */ +s32 ixgbe_dcb_calculate_tc_credits_cee(struct ixgbe_hw *hw, + struct ixgbe_dcb_config *dcb_config, + u32 max_frame_size, u8 direction) +{ + struct ixgbe_dcb_tc_path *p; + u32 min_multiplier = 0; + u16 min_percent = 100; + s32 ret_val = IXGBE_SUCCESS; + /* Initialization values default for Tx settings */ + u32 min_credit = 0; + u32 credit_refill = 0; + u32 credit_max = 0; + u16 link_percentage = 0; + u8 bw_percent = 0; + u8 i; + + if (dcb_config == NULL) { + ret_val = IXGBE_ERR_CONFIG; + goto out; + } + + min_credit = ((max_frame_size / 2) + IXGBE_DCB_CREDIT_QUANTUM - 1) / + IXGBE_DCB_CREDIT_QUANTUM; + + /* Find smallest link percentage */ + for (i = 0; i < IXGBE_DCB_MAX_TRAFFIC_CLASS; i++) { + p = &dcb_config->tc_config[i].path[direction]; + bw_percent = dcb_config->bw_percentage[direction][p->bwg_id]; + link_percentage = p->bwg_percent; + + link_percentage = (link_percentage * bw_percent) / 100; + + if (link_percentage && link_percentage < min_percent) + min_percent = link_percentage; + } + + /* + * The ratio between traffic classes will control the bandwidth + * percentages seen on the wire. To calculate this ratio we use + * a multiplier. It is required that the refill credits must be + * larger than the max frame size so here we find the smallest + * multiplier that will allow all bandwidth percentages to be + * greater than the max frame size. + */ + min_multiplier = (min_credit / min_percent) + 1; + + /* Find out the link percentage for each TC first */ + for (i = 0; i < IXGBE_DCB_MAX_TRAFFIC_CLASS; i++) { + p = &dcb_config->tc_config[i].path[direction]; + bw_percent = dcb_config->bw_percentage[direction][p->bwg_id]; + + link_percentage = p->bwg_percent; + /* Must be careful of integer division for very small nums */ + link_percentage = (link_percentage * bw_percent) / 100; + if (p->bwg_percent > 0 && link_percentage == 0) + link_percentage = 1; + + /* Save link_percentage for reference */ + p->link_percent = (u8)link_percentage; + + /* Calculate credit refill ratio using multiplier */ + credit_refill = min(link_percentage * min_multiplier, + (u32)IXGBE_DCB_MAX_CREDIT_REFILL); + + /* Refill at least minimum credit */ + if (credit_refill < min_credit) + credit_refill = min_credit; + + p->data_credits_refill = (u16)credit_refill; + + /* Calculate maximum credit for the TC */ + credit_max = (link_percentage * IXGBE_DCB_MAX_CREDIT) / 100; + + /* + * Adjustment based on rule checking, if the percentage + * of a TC is too small, the maximum credit may not be + * enough to send out a jumbo frame in data plane arbitration. + */ + if (credit_max < min_credit) + credit_max = min_credit; + + if (direction == IXGBE_DCB_TX_CONFIG) { + /* + * Adjustment based on rule checking, if the + * percentage of a TC is too small, the maximum + * credit may not be enough to send out a TSO + * packet in descriptor plane arbitration. + */ + if (credit_max && (credit_max < + IXGBE_DCB_MIN_TSO_CREDIT) + && (hw->mac.type == ixgbe_mac_82598EB)) + credit_max = IXGBE_DCB_MIN_TSO_CREDIT; + + dcb_config->tc_config[i].desc_credits_max = + (u16)credit_max; + } + + p->data_credits_max = (u16)credit_max; + } + +out: + return ret_val; +} + +/** + * ixgbe_dcb_unpack_pfc_cee - Unpack dcb_config PFC info + * @cfg: dcb configuration to unpack into hardware consumable fields + * @map: user priority to traffic class map + * @pfc_up: u8 to store user priority PFC bitmask + * + * This unpacks the dcb configuration PFC info which is stored per + * traffic class into a 8bit user priority bitmask that can be + * consumed by hardware routines. The priority to tc map must be + * updated before calling this routine to use current up-to maps. + */ +void ixgbe_dcb_unpack_pfc_cee(struct ixgbe_dcb_config *cfg, u8 *map, u8 *pfc_up) +{ + struct ixgbe_dcb_tc_config *tc_config = &cfg->tc_config[0]; + int up; + + /* + * If the TC for this user priority has PFC enabled then set the + * matching bit in 'pfc_up' to reflect that PFC is enabled. + */ + for (*pfc_up = 0, up = 0; up < IXGBE_DCB_MAX_USER_PRIORITY; up++) { + if (tc_config[map[up]].pfc != ixgbe_dcb_pfc_disabled) + *pfc_up |= 1 << up; + } +} + +void ixgbe_dcb_unpack_refill_cee(struct ixgbe_dcb_config *cfg, int direction, + u16 *refill) +{ + struct ixgbe_dcb_tc_config *tc_config = &cfg->tc_config[0]; + int tc; + + for (tc = 0; tc < IXGBE_DCB_MAX_TRAFFIC_CLASS; tc++) + refill[tc] = tc_config[tc].path[direction].data_credits_refill; +} + +void ixgbe_dcb_unpack_max_cee(struct ixgbe_dcb_config *cfg, u16 *max) +{ + struct ixgbe_dcb_tc_config *tc_config = &cfg->tc_config[0]; + int tc; + + for (tc = 0; tc < IXGBE_DCB_MAX_TRAFFIC_CLASS; tc++) + max[tc] = tc_config[tc].desc_credits_max; +} + +void ixgbe_dcb_unpack_bwgid_cee(struct ixgbe_dcb_config *cfg, int direction, + u8 *bwgid) +{ + struct ixgbe_dcb_tc_config *tc_config = &cfg->tc_config[0]; + int tc; + + for (tc = 0; tc < IXGBE_DCB_MAX_TRAFFIC_CLASS; tc++) + bwgid[tc] = tc_config[tc].path[direction].bwg_id; +} + +void ixgbe_dcb_unpack_tsa_cee(struct ixgbe_dcb_config *cfg, int direction, + u8 *tsa) +{ + struct ixgbe_dcb_tc_config *tc_config = &cfg->tc_config[0]; + int tc; + + for (tc = 0; tc < IXGBE_DCB_MAX_TRAFFIC_CLASS; tc++) + tsa[tc] = tc_config[tc].path[direction].tsa; +} + +u8 ixgbe_dcb_get_tc_from_up(struct ixgbe_dcb_config *cfg, int direction, u8 up) +{ + struct ixgbe_dcb_tc_config *tc_config = &cfg->tc_config[0]; + u8 prio_mask = 1 << up; + u8 tc = cfg->num_tcs.pg_tcs; + + /* If tc is 0 then DCB is likely not enabled or supported */ + if (!tc) + goto out; + + /* + * Test from maximum TC to 1 and report the first match we find. If + * we find no match we can assume that the TC is 0 since the TC must + * be set for all user priorities + */ + for (tc--; tc; tc--) { + if (prio_mask & tc_config[tc].path[direction].up_to_tc_bitmap) + break; + } +out: + return tc; +} + +void ixgbe_dcb_unpack_map_cee(struct ixgbe_dcb_config *cfg, int direction, + u8 *map) +{ + u8 up; + + for (up = 0; up < IXGBE_DCB_MAX_USER_PRIORITY; up++) + map[up] = ixgbe_dcb_get_tc_from_up(cfg, direction, up); +} + +/** + * ixgbe_dcb_check_config_cee - Struct containing DCB settings. + * @dcb_config: Pointer to DCB config structure + * + * This function checks DCB rules for DCB settings. + * The following rules are checked: + * 1. The sum of bandwidth percentages of all Bandwidth Groups must total 100%. + * 2. The sum of bandwidth percentages of all Traffic Classes within a Bandwidth + * Group must total 100. + * 3. A Traffic Class should not be set to both Link Strict Priority + * and Group Strict Priority. + * 4. Link strict Bandwidth Groups can only have link strict traffic classes + * with zero bandwidth. + */ +s32 ixgbe_dcb_check_config_cee(struct ixgbe_dcb_config *dcb_config) +{ + struct ixgbe_dcb_tc_path *p; + s32 ret_val = IXGBE_SUCCESS; + u8 i, j, bw = 0, bw_id; + u8 bw_sum[2][IXGBE_DCB_MAX_BW_GROUP]; + bool link_strict[2][IXGBE_DCB_MAX_BW_GROUP]; + + memset(bw_sum, 0, sizeof(bw_sum)); + memset(link_strict, 0, sizeof(link_strict)); + + /* First Tx, then Rx */ + for (i = 0; i < 2; i++) { + /* Check each traffic class for rule violation */ + for (j = 0; j < IXGBE_DCB_MAX_TRAFFIC_CLASS; j++) { + p = &dcb_config->tc_config[j].path[i]; + + bw = p->bwg_percent; + bw_id = p->bwg_id; + + if (bw_id >= IXGBE_DCB_MAX_BW_GROUP) { + ret_val = IXGBE_ERR_CONFIG; + goto err_config; + } + if (p->tsa == ixgbe_dcb_tsa_strict) { + link_strict[i][bw_id] = true; + /* Link strict should have zero bandwidth */ + if (bw) { + ret_val = IXGBE_ERR_CONFIG; + goto err_config; + } + } else if (!bw) { + /* + * Traffic classes without link strict + * should have non-zero bandwidth. + */ + ret_val = IXGBE_ERR_CONFIG; + goto err_config; + } + bw_sum[i][bw_id] += bw; + } + + bw = 0; + + /* Check each bandwidth group for rule violation */ + for (j = 0; j < IXGBE_DCB_MAX_BW_GROUP; j++) { + bw += dcb_config->bw_percentage[i][j]; + /* + * Sum of bandwidth percentages of all traffic classes + * within a Bandwidth Group must total 100 except for + * link strict group (zero bandwidth). + */ + if (link_strict[i][j]) { + if (bw_sum[i][j]) { + /* + * Link strict group should have zero + * bandwidth. + */ + ret_val = IXGBE_ERR_CONFIG; + goto err_config; + } + } else if (bw_sum[i][j] != IXGBE_DCB_BW_PERCENT && + bw_sum[i][j] != 0) { + ret_val = IXGBE_ERR_CONFIG; + goto err_config; + } + } + + if (bw != IXGBE_DCB_BW_PERCENT) { + ret_val = IXGBE_ERR_CONFIG; + goto err_config; + } + } + +err_config: + + return ret_val; +} + +/** + * ixgbe_dcb_get_tc_stats - Returns status of each traffic class + * @hw: pointer to hardware structure + * @stats: pointer to statistics structure + * @tc_count: Number of elements in bwg_array. + * + * This function returns the status data for each of the Traffic Classes in use. + */ +s32 ixgbe_dcb_get_tc_stats(struct ixgbe_hw *hw, struct ixgbe_hw_stats *stats, + u8 tc_count) +{ + s32 ret = IXGBE_NOT_IMPLEMENTED; + switch (hw->mac.type) { + case ixgbe_mac_82598EB: + ret = ixgbe_dcb_get_tc_stats_82598(hw, stats, tc_count); + break; + case ixgbe_mac_82599EB: + case ixgbe_mac_X540: + case ixgbe_mac_X550: + case ixgbe_mac_X550EM_x: + case ixgbe_mac_X550EM_a: + ret = ixgbe_dcb_get_tc_stats_82599(hw, stats, tc_count); + break; + default: + break; + } + return ret; +} + +/** + * ixgbe_dcb_get_pfc_stats - Returns CBFC status of each traffic class + * @hw: pointer to hardware structure + * @stats: pointer to statistics structure + * @tc_count: Number of elements in bwg_array. + * + * This function returns the CBFC status data for each of the Traffic Classes. + */ +s32 ixgbe_dcb_get_pfc_stats(struct ixgbe_hw *hw, struct ixgbe_hw_stats *stats, + u8 tc_count) +{ + s32 ret = IXGBE_NOT_IMPLEMENTED; + switch (hw->mac.type) { + case ixgbe_mac_82598EB: + ret = ixgbe_dcb_get_pfc_stats_82598(hw, stats, tc_count); + break; + case ixgbe_mac_82599EB: + case ixgbe_mac_X540: + case ixgbe_mac_X550: + case ixgbe_mac_X550EM_x: + case ixgbe_mac_X550EM_a: + ret = ixgbe_dcb_get_pfc_stats_82599(hw, stats, tc_count); + break; + default: + break; + } + return ret; +} + +/** + * ixgbe_dcb_config_rx_arbiter_cee - Config Rx arbiter + * @hw: pointer to hardware structure + * @dcb_config: pointer to ixgbe_dcb_config structure + * + * Configure Rx Data Arbiter and credits for each traffic class. + */ +s32 ixgbe_dcb_config_rx_arbiter_cee(struct ixgbe_hw *hw, + struct ixgbe_dcb_config *dcb_config) +{ + s32 ret = IXGBE_NOT_IMPLEMENTED; + u8 tsa[IXGBE_DCB_MAX_TRAFFIC_CLASS] = { 0 }; + u8 bwgid[IXGBE_DCB_MAX_TRAFFIC_CLASS] = { 0 }; + u8 map[IXGBE_DCB_MAX_USER_PRIORITY] = { 0 }; + u16 refill[IXGBE_DCB_MAX_TRAFFIC_CLASS] = { 0 }; + u16 max[IXGBE_DCB_MAX_TRAFFIC_CLASS] = { 0 }; + + ixgbe_dcb_unpack_refill_cee(dcb_config, IXGBE_DCB_TX_CONFIG, refill); + ixgbe_dcb_unpack_max_cee(dcb_config, max); + ixgbe_dcb_unpack_bwgid_cee(dcb_config, IXGBE_DCB_TX_CONFIG, bwgid); + ixgbe_dcb_unpack_tsa_cee(dcb_config, IXGBE_DCB_TX_CONFIG, tsa); + ixgbe_dcb_unpack_map_cee(dcb_config, IXGBE_DCB_TX_CONFIG, map); + + switch (hw->mac.type) { + case ixgbe_mac_82598EB: + ret = ixgbe_dcb_config_rx_arbiter_82598(hw, refill, max, tsa); + break; + case ixgbe_mac_82599EB: + case ixgbe_mac_X540: + case ixgbe_mac_X550: + case ixgbe_mac_X550EM_x: + case ixgbe_mac_X550EM_a: + ret = ixgbe_dcb_config_rx_arbiter_82599(hw, refill, max, bwgid, + tsa, map); + break; + default: + break; + } + return ret; +} + +/** + * ixgbe_dcb_config_tx_desc_arbiter_cee - Config Tx Desc arbiter + * @hw: pointer to hardware structure + * @dcb_config: pointer to ixgbe_dcb_config structure + * + * Configure Tx Descriptor Arbiter and credits for each traffic class. + */ +s32 ixgbe_dcb_config_tx_desc_arbiter_cee(struct ixgbe_hw *hw, + struct ixgbe_dcb_config *dcb_config) +{ + s32 ret = IXGBE_NOT_IMPLEMENTED; + u8 tsa[IXGBE_DCB_MAX_TRAFFIC_CLASS]; + u8 bwgid[IXGBE_DCB_MAX_TRAFFIC_CLASS]; + u16 refill[IXGBE_DCB_MAX_TRAFFIC_CLASS]; + u16 max[IXGBE_DCB_MAX_TRAFFIC_CLASS]; + + ixgbe_dcb_unpack_refill_cee(dcb_config, IXGBE_DCB_TX_CONFIG, refill); + ixgbe_dcb_unpack_max_cee(dcb_config, max); + ixgbe_dcb_unpack_bwgid_cee(dcb_config, IXGBE_DCB_TX_CONFIG, bwgid); + ixgbe_dcb_unpack_tsa_cee(dcb_config, IXGBE_DCB_TX_CONFIG, tsa); + + switch (hw->mac.type) { + case ixgbe_mac_82598EB: + ret = ixgbe_dcb_config_tx_desc_arbiter_82598(hw, refill, max, + bwgid, tsa); + break; + case ixgbe_mac_82599EB: + case ixgbe_mac_X540: + case ixgbe_mac_X550: + case ixgbe_mac_X550EM_x: + case ixgbe_mac_X550EM_a: + ret = ixgbe_dcb_config_tx_desc_arbiter_82599(hw, refill, max, + bwgid, tsa); + break; + default: + break; + } + return ret; +} + +/** + * ixgbe_dcb_config_tx_data_arbiter_cee - Config Tx data arbiter + * @hw: pointer to hardware structure + * @dcb_config: pointer to ixgbe_dcb_config structure + * + * Configure Tx Data Arbiter and credits for each traffic class. + */ +s32 ixgbe_dcb_config_tx_data_arbiter_cee(struct ixgbe_hw *hw, + struct ixgbe_dcb_config *dcb_config) +{ + s32 ret = IXGBE_NOT_IMPLEMENTED; + u8 tsa[IXGBE_DCB_MAX_TRAFFIC_CLASS]; + u8 bwgid[IXGBE_DCB_MAX_TRAFFIC_CLASS]; + u8 map[IXGBE_DCB_MAX_USER_PRIORITY] = { 0 }; + u16 refill[IXGBE_DCB_MAX_TRAFFIC_CLASS]; + u16 max[IXGBE_DCB_MAX_TRAFFIC_CLASS]; + + ixgbe_dcb_unpack_refill_cee(dcb_config, IXGBE_DCB_TX_CONFIG, refill); + ixgbe_dcb_unpack_max_cee(dcb_config, max); + ixgbe_dcb_unpack_bwgid_cee(dcb_config, IXGBE_DCB_TX_CONFIG, bwgid); + ixgbe_dcb_unpack_tsa_cee(dcb_config, IXGBE_DCB_TX_CONFIG, tsa); + ixgbe_dcb_unpack_map_cee(dcb_config, IXGBE_DCB_TX_CONFIG, map); + + switch (hw->mac.type) { + case ixgbe_mac_82598EB: + ret = ixgbe_dcb_config_tx_data_arbiter_82598(hw, refill, max, + bwgid, tsa); + break; + case ixgbe_mac_82599EB: + case ixgbe_mac_X540: + case ixgbe_mac_X550: + case ixgbe_mac_X550EM_x: + case ixgbe_mac_X550EM_a: + ret = ixgbe_dcb_config_tx_data_arbiter_82599(hw, refill, max, + bwgid, tsa, + map); + break; + default: + break; + } + return ret; +} + +/** + * ixgbe_dcb_config_pfc_cee - Config priority flow control + * @hw: pointer to hardware structure + * @dcb_config: pointer to ixgbe_dcb_config structure + * + * Configure Priority Flow Control for each traffic class. + */ +s32 ixgbe_dcb_config_pfc_cee(struct ixgbe_hw *hw, + struct ixgbe_dcb_config *dcb_config) +{ + s32 ret = IXGBE_NOT_IMPLEMENTED; + u8 pfc_en; + u8 map[IXGBE_DCB_MAX_USER_PRIORITY] = { 0 }; + + ixgbe_dcb_unpack_map_cee(dcb_config, IXGBE_DCB_TX_CONFIG, map); + ixgbe_dcb_unpack_pfc_cee(dcb_config, map, &pfc_en); + + switch (hw->mac.type) { + case ixgbe_mac_82598EB: + ret = ixgbe_dcb_config_pfc_82598(hw, pfc_en); + break; + case ixgbe_mac_82599EB: + case ixgbe_mac_X540: + case ixgbe_mac_X550: + case ixgbe_mac_X550EM_x: + case ixgbe_mac_X550EM_a: + ret = ixgbe_dcb_config_pfc_82599(hw, pfc_en, map); + break; + default: + break; + } + return ret; +} + +/** + * ixgbe_dcb_config_tc_stats - Config traffic class statistics + * @hw: pointer to hardware structure + * + * Configure queue statistics registers, all queues belonging to same traffic + * class uses a single set of queue statistics counters. + */ +s32 ixgbe_dcb_config_tc_stats(struct ixgbe_hw *hw) +{ + s32 ret = IXGBE_NOT_IMPLEMENTED; + switch (hw->mac.type) { + case ixgbe_mac_82598EB: + ret = ixgbe_dcb_config_tc_stats_82598(hw); + break; + case ixgbe_mac_82599EB: + case ixgbe_mac_X540: + case ixgbe_mac_X550: + case ixgbe_mac_X550EM_x: + case ixgbe_mac_X550EM_a: + ret = ixgbe_dcb_config_tc_stats_82599(hw, NULL); + break; + default: + break; + } + return ret; +} + +/** + * ixgbe_dcb_hw_config_cee - Config and enable DCB + * @hw: pointer to hardware structure + * @dcb_config: pointer to ixgbe_dcb_config structure + * + * Configure dcb settings and enable dcb mode. + */ +s32 ixgbe_dcb_hw_config_cee(struct ixgbe_hw *hw, + struct ixgbe_dcb_config *dcb_config) +{ + s32 ret = IXGBE_NOT_IMPLEMENTED; + u8 pfc_en; + u8 tsa[IXGBE_DCB_MAX_TRAFFIC_CLASS]; + u8 bwgid[IXGBE_DCB_MAX_TRAFFIC_CLASS]; + u8 map[IXGBE_DCB_MAX_USER_PRIORITY] = { 0 }; + u16 refill[IXGBE_DCB_MAX_TRAFFIC_CLASS]; + u16 max[IXGBE_DCB_MAX_TRAFFIC_CLASS]; + + /* Unpack CEE standard containers */ + ixgbe_dcb_unpack_refill_cee(dcb_config, IXGBE_DCB_TX_CONFIG, refill); + ixgbe_dcb_unpack_max_cee(dcb_config, max); + ixgbe_dcb_unpack_bwgid_cee(dcb_config, IXGBE_DCB_TX_CONFIG, bwgid); + ixgbe_dcb_unpack_tsa_cee(dcb_config, IXGBE_DCB_TX_CONFIG, tsa); + ixgbe_dcb_unpack_map_cee(dcb_config, IXGBE_DCB_TX_CONFIG, map); + + switch (hw->mac.type) { + case ixgbe_mac_82598EB: + ret = ixgbe_dcb_hw_config_82598(hw, dcb_config->link_speed, + refill, max, bwgid, tsa); + break; + case ixgbe_mac_82599EB: + case ixgbe_mac_X540: + case ixgbe_mac_X550: + case ixgbe_mac_X550EM_x: + case ixgbe_mac_X550EM_a: + ixgbe_dcb_config_82599(hw, dcb_config); + ret = ixgbe_dcb_hw_config_82599(hw, dcb_config->link_speed, + refill, max, bwgid, + tsa, map); + + ixgbe_dcb_config_tc_stats_82599(hw, dcb_config); + break; + default: + break; + } + + if (!ret && dcb_config->pfc_mode_enable) { + ixgbe_dcb_unpack_pfc_cee(dcb_config, map, &pfc_en); + ret = ixgbe_dcb_config_pfc(hw, pfc_en, map); + } + + return ret; +} + +/* Helper routines to abstract HW specifics from DCB netlink ops */ +s32 ixgbe_dcb_config_pfc(struct ixgbe_hw *hw, u8 pfc_en, u8 *map) +{ + int ret = IXGBE_ERR_PARAM; + + switch (hw->mac.type) { + case ixgbe_mac_82598EB: + ret = ixgbe_dcb_config_pfc_82598(hw, pfc_en); + break; + case ixgbe_mac_82599EB: + case ixgbe_mac_X540: + case ixgbe_mac_X550: + case ixgbe_mac_X550EM_x: + case ixgbe_mac_X550EM_a: + ret = ixgbe_dcb_config_pfc_82599(hw, pfc_en, map); + break; + default: + break; + } + return ret; +} + +s32 ixgbe_dcb_hw_config(struct ixgbe_hw *hw, u16 *refill, u16 *max, + u8 *bwg_id, u8 *tsa, u8 *map) +{ + switch (hw->mac.type) { + case ixgbe_mac_82598EB: + ixgbe_dcb_config_rx_arbiter_82598(hw, refill, max, tsa); + ixgbe_dcb_config_tx_desc_arbiter_82598(hw, refill, max, bwg_id, + tsa); + ixgbe_dcb_config_tx_data_arbiter_82598(hw, refill, max, bwg_id, + tsa); + break; + case ixgbe_mac_82599EB: + case ixgbe_mac_X540: + case ixgbe_mac_X550: + case ixgbe_mac_X550EM_x: + case ixgbe_mac_X550EM_a: + ixgbe_dcb_config_rx_arbiter_82599(hw, refill, max, bwg_id, + tsa, map); + ixgbe_dcb_config_tx_desc_arbiter_82599(hw, refill, max, bwg_id, + tsa); + ixgbe_dcb_config_tx_data_arbiter_82599(hw, refill, max, bwg_id, + tsa, map); + break; + default: + break; + } + return 0; +} diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_dcb.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_dcb.h new file mode 100644 index 00000000000..08ce6c8dd62 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_dcb.h @@ -0,0 +1,144 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 1999 - 2026 Intel Corporation */ + +#ifndef _IXGBE_DCB_H_ +#define _IXGBE_DCB_H_ + +#include "ixgbe_type.h" + +/* DCB defines */ +/* DCB credit calculation defines */ +#define IXGBE_DCB_CREDIT_QUANTUM 64 +#define IXGBE_DCB_MAX_CREDIT_REFILL 511 /* 0x1FF * 64B = 32704B */ +#define IXGBE_DCB_MAX_TSO_SIZE (32 * 1024) /* Max TSO pkt size in DCB*/ +#define IXGBE_DCB_MAX_CREDIT 4095 /* Maximum credit supported: 256KB * 1024 / 64B */ + +/* 513 for 32KB TSO packet */ +#define IXGBE_DCB_MIN_TSO_CREDIT \ + ((IXGBE_DCB_MAX_TSO_SIZE / IXGBE_DCB_CREDIT_QUANTUM) + 1) + +/* DCB configuration defines */ +#define IXGBE_DCB_MAX_USER_PRIORITY 8 +#define IXGBE_DCB_MAX_BW_GROUP 8 +#define IXGBE_DCB_BW_PERCENT 100 + +#define IXGBE_DCB_TX_CONFIG 0 +#define IXGBE_DCB_RX_CONFIG 1 + +/* DCB capability defines */ +#define IXGBE_DCB_PG_SUPPORT 0x00000001 +#define IXGBE_DCB_PFC_SUPPORT 0x00000002 +#define IXGBE_DCB_BCN_SUPPORT 0x00000004 +#define IXGBE_DCB_UP2TC_SUPPORT 0x00000008 +#define IXGBE_DCB_GSP_SUPPORT 0x00000010 + +struct ixgbe_dcb_support { + u32 capabilities; /* DCB capabilities */ + + /* Each bit represents a number of TCs configurable in the hw. + * If 8 traffic classes can be configured, the value is 0x80. */ + u8 traffic_classes; + u8 pfc_traffic_classes; +}; + +enum ixgbe_dcb_tsa { + ixgbe_dcb_tsa_ets = 0, + ixgbe_dcb_tsa_group_strict_cee, + ixgbe_dcb_tsa_strict +}; + +/* Traffic class bandwidth allocation per direction */ +struct ixgbe_dcb_tc_path { + u8 bwg_id; /* Bandwidth Group (BWG) ID */ + u8 bwg_percent; /* % of BWG's bandwidth */ + u8 link_percent; /* % of link bandwidth */ + u8 up_to_tc_bitmap; /* User Priority to Traffic Class mapping */ + u16 data_credits_refill; /* Credit refill amount in 64B granularity */ + u16 data_credits_max; /* Max credits for a configured packet buffer + * in 64B granularity.*/ + enum ixgbe_dcb_tsa tsa; /* Link or Group Strict Priority */ +}; + +enum ixgbe_dcb_pfc { + ixgbe_dcb_pfc_disabled = 0, + ixgbe_dcb_pfc_enabled, + ixgbe_dcb_pfc_enabled_txonly, + ixgbe_dcb_pfc_enabled_rxonly +}; + +/* Traffic class configuration */ +struct ixgbe_dcb_tc_config { + struct ixgbe_dcb_tc_path path[2]; /* One each for Tx/Rx */ + enum ixgbe_dcb_pfc pfc; /* Class based flow control setting */ + + u16 desc_credits_max; /* For Tx Descriptor arbitration */ + u8 tc; /* Traffic class (TC) */ +}; + +enum ixgbe_dcb_pba { + /* PBA[0-7] each use 64KB FIFO */ + ixgbe_dcb_pba_equal = PBA_STRATEGY_EQUAL, + /* PBA[0-3] each use 80KB, PBA[4-7] each use 48KB */ + ixgbe_dcb_pba_80_48 = PBA_STRATEGY_WEIGHTED +}; + +struct ixgbe_dcb_num_tcs { + u8 pg_tcs; + u8 pfc_tcs; +}; + +struct ixgbe_dcb_config { + struct ixgbe_dcb_tc_config tc_config[IXGBE_DCB_MAX_TRAFFIC_CLASS]; + struct ixgbe_dcb_support support; + struct ixgbe_dcb_num_tcs num_tcs; + u8 bw_percentage[2][IXGBE_DCB_MAX_BW_GROUP]; /* One each for Tx/Rx */ + bool pfc_mode_enable; + bool round_robin_enable; + + enum ixgbe_dcb_pba rx_pba_cfg; + + u32 dcb_cfg_version; /* Not used...OS-specific? */ + u32 link_speed; /* For bandwidth allocation validation purpose */ + bool vt_mode; +}; + +/* DCB driver APIs */ + +/* DCB rule checking */ +s32 ixgbe_dcb_check_config_cee(struct ixgbe_dcb_config *); + +/* DCB credits calculation */ +s32 ixgbe_dcb_calculate_tc_credits(u8 *, u16 *, u16 *, int); +s32 ixgbe_dcb_calculate_tc_credits_cee(struct ixgbe_hw *, + struct ixgbe_dcb_config *, u32, u8); + +/* DCB PFC */ +s32 ixgbe_dcb_config_pfc(struct ixgbe_hw *, u8, u8 *); +s32 ixgbe_dcb_config_pfc_cee(struct ixgbe_hw *, struct ixgbe_dcb_config *); + +/* DCB stats */ +s32 ixgbe_dcb_config_tc_stats(struct ixgbe_hw *); +s32 ixgbe_dcb_get_tc_stats(struct ixgbe_hw *, struct ixgbe_hw_stats *, u8); +s32 ixgbe_dcb_get_pfc_stats(struct ixgbe_hw *, struct ixgbe_hw_stats *, u8); + +/* DCB config arbiters */ +s32 ixgbe_dcb_config_tx_desc_arbiter_cee(struct ixgbe_hw *, + struct ixgbe_dcb_config *); +s32 ixgbe_dcb_config_tx_data_arbiter_cee(struct ixgbe_hw *, + struct ixgbe_dcb_config *); +s32 ixgbe_dcb_config_rx_arbiter_cee(struct ixgbe_hw *, + struct ixgbe_dcb_config *); + +/* DCB unpack routines */ +void ixgbe_dcb_unpack_pfc_cee(struct ixgbe_dcb_config *, u8 *, u8 *); +void ixgbe_dcb_unpack_refill_cee(struct ixgbe_dcb_config *, int, u16 *); +void ixgbe_dcb_unpack_max_cee(struct ixgbe_dcb_config *, u16 *); +void ixgbe_dcb_unpack_bwgid_cee(struct ixgbe_dcb_config *, int, u8 *); +void ixgbe_dcb_unpack_tsa_cee(struct ixgbe_dcb_config *, int, u8 *); +void ixgbe_dcb_unpack_map_cee(struct ixgbe_dcb_config *, int, u8 *); +u8 ixgbe_dcb_get_tc_from_up(struct ixgbe_dcb_config *, int, u8); + +/* DCB initialization */ +s32 ixgbe_dcb_hw_config(struct ixgbe_hw *, u16 *, u16 *, u8 *, u8 *, u8 *); +s32 ixgbe_dcb_hw_config_cee(struct ixgbe_hw *, struct ixgbe_dcb_config *); +#endif /* _IXGBE_DCB_H_ */ diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_dcb_82598.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_dcb_82598.c new file mode 100644 index 00000000000..afb9a5e0891 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_dcb_82598.c @@ -0,0 +1,340 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 1999 - 2026 Intel Corporation */ + +#include "ixgbe_type.h" +#include "ixgbe_dcb.h" +#include "ixgbe_dcb_82598.h" + +/** + * ixgbe_dcb_get_tc_stats_82598 - Return status data for each traffic class + * @hw: pointer to hardware structure + * @stats: pointer to statistics structure + * @tc_count: Number of elements in bwg_array. + * + * This function returns the status data for each of the Traffic Classes in use. + */ +s32 ixgbe_dcb_get_tc_stats_82598(struct ixgbe_hw *hw, + struct ixgbe_hw_stats *stats, + u8 tc_count) +{ + int tc; + + DEBUGFUNC("dcb_get_tc_stats"); + + if (tc_count > IXGBE_DCB_MAX_TRAFFIC_CLASS) + return IXGBE_ERR_PARAM; + + /* Statistics pertaining to each traffic class */ + for (tc = 0; tc < tc_count; tc++) { + /* Transmitted Packets */ + stats->qptc[tc] += IXGBE_READ_REG(hw, IXGBE_QPTC(tc)); + /* Transmitted Bytes */ + stats->qbtc[tc] += IXGBE_READ_REG(hw, IXGBE_QBTC(tc)); + /* Received Packets */ + stats->qprc[tc] += IXGBE_READ_REG(hw, IXGBE_QPRC(tc)); + /* Received Bytes */ + stats->qbrc[tc] += IXGBE_READ_REG(hw, IXGBE_QBRC(tc)); + +#if 0 + /* Can we get rid of these?? Consequently, getting rid + * of the tc_stats structure. + */ + tc_stats_array[up]->in_overflow_discards = 0; + tc_stats_array[up]->out_overflow_discards = 0; +#endif + } + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_dcb_get_pfc_stats_82598 - Returns CBFC status data + * @hw: pointer to hardware structure + * @stats: pointer to statistics structure + * @tc_count: Number of elements in bwg_array. + * + * This function returns the CBFC status data for each of the Traffic Classes. + */ +s32 ixgbe_dcb_get_pfc_stats_82598(struct ixgbe_hw *hw, + struct ixgbe_hw_stats *stats, + u8 tc_count) +{ + int tc; + + DEBUGFUNC("dcb_get_pfc_stats"); + + if (tc_count > IXGBE_DCB_MAX_TRAFFIC_CLASS) + return IXGBE_ERR_PARAM; + + for (tc = 0; tc < tc_count; tc++) { + /* Priority XOFF Transmitted */ + stats->pxofftxc[tc] += IXGBE_READ_REG(hw, IXGBE_PXOFFTXC(tc)); + /* Priority XOFF Received */ + stats->pxoffrxc[tc] += IXGBE_READ_REG(hw, IXGBE_PXOFFRXC(tc)); + } + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_dcb_config_rx_arbiter_82598 - Config Rx data arbiter + * @hw: pointer to hardware structure + * @refill: refill credits index by traffic class + * @max: max credits index by traffic class + * @tsa: transmission selection algorithm indexed by traffic class + * + * Configure Rx Data Arbiter and credits for each traffic class. + */ +s32 ixgbe_dcb_config_rx_arbiter_82598(struct ixgbe_hw *hw, u16 *refill, + u16 *max, u8 *tsa) +{ + u32 reg = 0; + u32 credit_refill = 0; + u32 credit_max = 0; + u8 i = 0; + + reg = IXGBE_READ_REG(hw, IXGBE_RUPPBMR) | IXGBE_RUPPBMR_MQA; + IXGBE_WRITE_REG(hw, IXGBE_RUPPBMR, reg); + + reg = IXGBE_READ_REG(hw, IXGBE_RMCS); + /* Enable Arbiter */ + reg &= ~IXGBE_RMCS_ARBDIS; + /* Enable Receive Recycle within the BWG */ + reg |= IXGBE_RMCS_RRM; + /* Enable Deficit Fixed Priority arbitration*/ + reg |= IXGBE_RMCS_DFP; + + IXGBE_WRITE_REG(hw, IXGBE_RMCS, reg); + + /* Configure traffic class credits and priority */ + for (i = 0; i < IXGBE_DCB_MAX_TRAFFIC_CLASS; i++) { + credit_refill = refill[i]; + credit_max = max[i]; + + reg = credit_refill | (credit_max << IXGBE_RT2CR_MCL_SHIFT); + + if (tsa[i] == ixgbe_dcb_tsa_strict) + reg |= IXGBE_RT2CR_LSP; + + IXGBE_WRITE_REG(hw, IXGBE_RT2CR(i), reg); + } + + reg = IXGBE_READ_REG(hw, IXGBE_RDRXCTL); + reg |= IXGBE_RDRXCTL_RDMTS_1_2; + reg |= IXGBE_RDRXCTL_MPBEN; + reg |= IXGBE_RDRXCTL_MCEN; + IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, reg); + + reg = IXGBE_READ_REG(hw, IXGBE_RXCTRL); + /* Make sure there is enough descriptors before arbitration */ + reg &= ~IXGBE_RXCTRL_DMBYPS; + IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, reg); + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_dcb_config_tx_desc_arbiter_82598 - Config Tx Desc. arbiter + * @hw: pointer to hardware structure + * @refill: refill credits index by traffic class + * @max: max credits index by traffic class + * @bwg_id: bandwidth grouping indexed by traffic class + * @tsa: transmission selection algorithm indexed by traffic class + * + * Configure Tx Descriptor Arbiter and credits for each traffic class. + */ +s32 ixgbe_dcb_config_tx_desc_arbiter_82598(struct ixgbe_hw *hw, + u16 *refill, u16 *max, u8 *bwg_id, + u8 *tsa) +{ + u32 reg, max_credits; + u8 i; + + reg = IXGBE_READ_REG(hw, IXGBE_DPMCS); + + /* Enable arbiter */ + reg &= ~IXGBE_DPMCS_ARBDIS; + reg |= IXGBE_DPMCS_TSOEF; + + /* Configure Max TSO packet size 34KB including payload and headers */ + reg |= (0x4 << IXGBE_DPMCS_MTSOS_SHIFT); + + IXGBE_WRITE_REG(hw, IXGBE_DPMCS, reg); + + /* Configure traffic class credits and priority */ + for (i = 0; i < IXGBE_DCB_MAX_TRAFFIC_CLASS; i++) { + max_credits = max[i]; + reg = max_credits << IXGBE_TDTQ2TCCR_MCL_SHIFT; + reg |= (u32)(refill[i]); + reg |= (u32)(bwg_id[i]) << IXGBE_TDTQ2TCCR_BWG_SHIFT; + + if (tsa[i] == ixgbe_dcb_tsa_group_strict_cee) + reg |= IXGBE_TDTQ2TCCR_GSP; + + if (tsa[i] == ixgbe_dcb_tsa_strict) + reg |= IXGBE_TDTQ2TCCR_LSP; + + IXGBE_WRITE_REG(hw, IXGBE_TDTQ2TCCR(i), reg); + } + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_dcb_config_tx_data_arbiter_82598 - Config Tx data arbiter + * @hw: pointer to hardware structure + * @refill: refill credits index by traffic class + * @max: max credits index by traffic class + * @bwg_id: bandwidth grouping indexed by traffic class + * @tsa: transmission selection algorithm indexed by traffic class + * + * Configure Tx Data Arbiter and credits for each traffic class. + */ +s32 ixgbe_dcb_config_tx_data_arbiter_82598(struct ixgbe_hw *hw, + u16 *refill, u16 *max, u8 *bwg_id, + u8 *tsa) +{ + u32 reg; + u8 i; + + reg = IXGBE_READ_REG(hw, IXGBE_PDPMCS); + /* Enable Data Plane Arbiter */ + reg &= ~IXGBE_PDPMCS_ARBDIS; + /* Enable DFP and Transmit Recycle Mode */ + reg |= (IXGBE_PDPMCS_TPPAC | IXGBE_PDPMCS_TRM); + + IXGBE_WRITE_REG(hw, IXGBE_PDPMCS, reg); + + /* Configure traffic class credits and priority */ + for (i = 0; i < IXGBE_DCB_MAX_TRAFFIC_CLASS; i++) { + reg = refill[i]; + reg |= (u32)(max[i]) << IXGBE_TDPT2TCCR_MCL_SHIFT; + reg |= (u32)(bwg_id[i]) << IXGBE_TDPT2TCCR_BWG_SHIFT; + + if (tsa[i] == ixgbe_dcb_tsa_group_strict_cee) + reg |= IXGBE_TDPT2TCCR_GSP; + + if (tsa[i] == ixgbe_dcb_tsa_strict) + reg |= IXGBE_TDPT2TCCR_LSP; + + IXGBE_WRITE_REG(hw, IXGBE_TDPT2TCCR(i), reg); + } + + /* Enable Tx packet buffer division */ + reg = IXGBE_READ_REG(hw, IXGBE_DTXCTL); + reg |= IXGBE_DTXCTL_ENDBUBD; + IXGBE_WRITE_REG(hw, IXGBE_DTXCTL, reg); + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_dcb_config_pfc_82598 - Config priority flow control + * @hw: pointer to hardware structure + * @pfc_en: enabled pfc bitmask + * + * Configure Priority Flow Control for each traffic class. + */ +s32 ixgbe_dcb_config_pfc_82598(struct ixgbe_hw *hw, u8 pfc_en) +{ + u32 fcrtl, reg; + u8 i; + + /* Enable Transmit Priority Flow Control */ + reg = IXGBE_READ_REG(hw, IXGBE_RMCS); + reg &= ~IXGBE_RMCS_TFCE_802_3X; + reg |= IXGBE_RMCS_TFCE_PRIORITY; + IXGBE_WRITE_REG(hw, IXGBE_RMCS, reg); + + /* Enable Receive Priority Flow Control */ + reg = IXGBE_READ_REG(hw, IXGBE_FCTRL); + reg &= ~(IXGBE_FCTRL_RPFCE | IXGBE_FCTRL_RFCE); + + if (pfc_en) + reg |= IXGBE_FCTRL_RPFCE; + + IXGBE_WRITE_REG(hw, IXGBE_FCTRL, reg); + + /* Configure PFC Tx thresholds per TC */ + for (i = 0; i < IXGBE_DCB_MAX_TRAFFIC_CLASS; i++) { + if (!(pfc_en & (1 << i))) { + IXGBE_WRITE_REG(hw, IXGBE_FCRTL(i), 0); + IXGBE_WRITE_REG(hw, IXGBE_FCRTH(i), 0); + continue; + } + + fcrtl = (hw->fc.low_water[i] << 10) | IXGBE_FCRTL_XONE; + reg = (hw->fc.high_water[i] << 10) | IXGBE_FCRTH_FCEN; + IXGBE_WRITE_REG(hw, IXGBE_FCRTL(i), fcrtl); + IXGBE_WRITE_REG(hw, IXGBE_FCRTH(i), reg); + } + + /* Configure pause time */ + reg = hw->fc.pause_time | (hw->fc.pause_time << 16); + for (i = 0; i < (IXGBE_DCB_MAX_TRAFFIC_CLASS / 2); i++) + IXGBE_WRITE_REG(hw, IXGBE_FCTTV(i), reg); + + /* Configure flow control refresh threshold value */ + IXGBE_WRITE_REG(hw, IXGBE_FCRTV, hw->fc.pause_time / 2); + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_dcb_config_tc_stats_82598 - Configure traffic class statistics + * @hw: pointer to hardware structure + * + * Configure queue statistics registers, all queues belonging to same traffic + * class uses a single set of queue statistics counters. + */ +s32 ixgbe_dcb_config_tc_stats_82598(struct ixgbe_hw *hw) +{ + u32 reg = 0; + u8 i = 0; + u8 j = 0; + + /* Receive Queues stats setting - 8 queues per statistics reg */ + for (i = 0, j = 0; i < 15 && j < 8; i = i + 2, j++) { + reg = IXGBE_READ_REG(hw, IXGBE_RQSMR(i)); + reg |= ((0x1010101) * j); + IXGBE_WRITE_REG(hw, IXGBE_RQSMR(i), reg); + reg = IXGBE_READ_REG(hw, IXGBE_RQSMR(i + 1)); + reg |= ((0x1010101) * j); + IXGBE_WRITE_REG(hw, IXGBE_RQSMR(i + 1), reg); + } + /* Transmit Queues stats setting - 4 queues per statistics reg*/ + for (i = 0; i < 8; i++) { + reg = IXGBE_READ_REG(hw, IXGBE_TQSMR(i)); + reg |= ((0x1010101) * i); + IXGBE_WRITE_REG(hw, IXGBE_TQSMR(i), reg); + } + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_dcb_hw_config_82598 - Config and enable DCB + * @hw: pointer to hardware structure + * @link_speed: unused + * @refill: refill credits index by traffic class + * @max: max credits index by traffic class + * @bwg_id: bandwidth grouping indexed by traffic class + * @tsa: transmission selection algorithm indexed by traffic class + * + * Configure dcb settings and enable dcb mode. + */ +s32 ixgbe_dcb_hw_config_82598(struct ixgbe_hw *hw, int link_speed, + u16 *refill, u16 *max, u8 *bwg_id, + u8 *tsa) +{ + UNREFERENCED_1PARAMETER(link_speed); + + ixgbe_dcb_config_rx_arbiter_82598(hw, refill, max, tsa); + ixgbe_dcb_config_tx_desc_arbiter_82598(hw, refill, max, bwg_id, + tsa); + ixgbe_dcb_config_tx_data_arbiter_82598(hw, refill, max, bwg_id, + tsa); + ixgbe_dcb_config_tc_stats_82598(hw); + + return IXGBE_SUCCESS; +} diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_dcb_82598.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_dcb_82598.h new file mode 100644 index 00000000000..d457c291380 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_dcb_82598.h @@ -0,0 +1,69 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 1999 - 2026 Intel Corporation */ + +#ifndef _IXGBE_DCB_82598_H_ +#define _IXGBE_DCB_82598_H_ + +/* DCB register definitions */ + +#define IXGBE_DPMCS_MTSOS_SHIFT 16 +#define IXGBE_DPMCS_TDPAC 0x00000001 /* 0 Round Robin, + * 1 DFP - Deficit Fixed Priority */ +#define IXGBE_DPMCS_TRM 0x00000010 /* Transmit Recycle Mode */ +#define IXGBE_DPMCS_ARBDIS 0x00000040 /* DCB arbiter disable */ +#define IXGBE_DPMCS_TSOEF 0x00080000 /* TSO Expand Factor: 0=x4, 1=x2 */ + +#define IXGBE_RUPPBMR_MQA 0x80000000 /* Enable UP to queue mapping */ + +#define IXGBE_RT2CR_MCL_SHIFT 12 /* Offset to Max Credit Limit setting */ +#define IXGBE_RT2CR_LSP 0x80000000 /* LSP enable bit */ + +#define IXGBE_RDRXCTL_MPBEN 0x00000010 /* DMA config for multiple packet + * buffers enable */ +#define IXGBE_RDRXCTL_MCEN 0x00000040 /* DMA config for multiple cores + * (RSS) enable */ + +#define IXGBE_TDTQ2TCCR_MCL_SHIFT 12 +#define IXGBE_TDTQ2TCCR_BWG_SHIFT 9 +#define IXGBE_TDTQ2TCCR_GSP 0x40000000 +#define IXGBE_TDTQ2TCCR_LSP 0x80000000 + +#define IXGBE_TDPT2TCCR_MCL_SHIFT 12 +#define IXGBE_TDPT2TCCR_BWG_SHIFT 9 +#define IXGBE_TDPT2TCCR_GSP 0x40000000 +#define IXGBE_TDPT2TCCR_LSP 0x80000000 + +#define IXGBE_PDPMCS_TPPAC 0x00000020 /* 0 Round Robin, + * 1 DFP - Deficit Fixed Priority */ +#define IXGBE_PDPMCS_ARBDIS 0x00000040 /* Arbiter disable */ +#define IXGBE_PDPMCS_TRM 0x00000100 /* Transmit Recycle Mode enable */ + +#define IXGBE_DTXCTL_ENDBUBD 0x00000004 /* Enable DBU buffer division */ + +#define IXGBE_TXPBSIZE_40KB 0x0000A000 /* 40KB Packet Buffer */ +#define IXGBE_RXPBSIZE_48KB 0x0000C000 /* 48KB Packet Buffer */ +#define IXGBE_RXPBSIZE_64KB 0x00010000 /* 64KB Packet Buffer */ +#define IXGBE_RXPBSIZE_80KB 0x00014000 /* 80KB Packet Buffer */ + +/* DCB driver APIs */ + +/* DCB PFC */ +s32 ixgbe_dcb_config_pfc_82598(struct ixgbe_hw *, u8); + +/* DCB stats */ +s32 ixgbe_dcb_config_tc_stats_82598(struct ixgbe_hw *); +s32 ixgbe_dcb_get_tc_stats_82598(struct ixgbe_hw *, + struct ixgbe_hw_stats *, u8); +s32 ixgbe_dcb_get_pfc_stats_82598(struct ixgbe_hw *, + struct ixgbe_hw_stats *, u8); + +/* DCB config arbiters */ +s32 ixgbe_dcb_config_tx_desc_arbiter_82598(struct ixgbe_hw *, u16 *, u16 *, + u8 *, u8 *); +s32 ixgbe_dcb_config_tx_data_arbiter_82598(struct ixgbe_hw *, u16 *, u16 *, + u8 *, u8 *); +s32 ixgbe_dcb_config_rx_arbiter_82598(struct ixgbe_hw *, u16 *, u16 *, u8 *); + +/* DCB initialization */ +s32 ixgbe_dcb_hw_config_82598(struct ixgbe_hw *, int, u16 *, u16 *, u8 *, u8 *); +#endif /* _IXGBE_DCB_82958_H_ */ diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_dcb_82599.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_dcb_82599.c new file mode 100644 index 00000000000..a65d04223e1 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_dcb_82599.c @@ -0,0 +1,578 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 1999 - 2026 Intel Corporation */ + +#include "ixgbe_type.h" +#include "ixgbe_dcb.h" +#include "ixgbe_dcb_82599.h" + +/** + * ixgbe_dcb_get_tc_stats_82599 - Returns status for each traffic class + * @hw: pointer to hardware structure + * @stats: pointer to statistics structure + * @tc_count: Number of elements in bwg_array. + * + * This function returns the status data for each of the Traffic Classes in use. + */ +s32 ixgbe_dcb_get_tc_stats_82599(struct ixgbe_hw *hw, + struct ixgbe_hw_stats *stats, + u8 tc_count) +{ + int tc; + + DEBUGFUNC("dcb_get_tc_stats"); + + if (tc_count > IXGBE_DCB_MAX_TRAFFIC_CLASS) + return IXGBE_ERR_PARAM; + + /* Statistics pertaining to each traffic class */ + for (tc = 0; tc < tc_count; tc++) { + /* Transmitted Packets */ + stats->qptc[tc] += IXGBE_READ_REG(hw, IXGBE_QPTC(tc)); + /* Transmitted Bytes (read low first to prevent missed carry) */ + stats->qbtc[tc] += IXGBE_READ_REG(hw, IXGBE_QBTC_L(tc)); + stats->qbtc[tc] += + (((u64)(IXGBE_READ_REG(hw, IXGBE_QBTC_H(tc)))) << 32); + /* Received Packets */ + stats->qprc[tc] += IXGBE_READ_REG(hw, IXGBE_QPRC(tc)); + /* Received Bytes (read low first to prevent missed carry) */ + stats->qbrc[tc] += IXGBE_READ_REG(hw, IXGBE_QBRC_L(tc)); + stats->qbrc[tc] += + (((u64)(IXGBE_READ_REG(hw, IXGBE_QBRC_H(tc)))) << 32); + + /* Received Dropped Packet */ + stats->qprdc[tc] += IXGBE_READ_REG(hw, IXGBE_QPRDC(tc)); + } + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_dcb_get_pfc_stats_82599 - Return CBFC status data + * @hw: pointer to hardware structure + * @stats: pointer to statistics structure + * @tc_count: Number of elements in bwg_array. + * + * This function returns the CBFC status data for each of the Traffic Classes. + */ +s32 ixgbe_dcb_get_pfc_stats_82599(struct ixgbe_hw *hw, + struct ixgbe_hw_stats *stats, + u8 tc_count) +{ + int tc; + + DEBUGFUNC("dcb_get_pfc_stats"); + + if (tc_count > IXGBE_DCB_MAX_TRAFFIC_CLASS) + return IXGBE_ERR_PARAM; + + for (tc = 0; tc < tc_count; tc++) { + /* Priority XOFF Transmitted */ + stats->pxofftxc[tc] += IXGBE_READ_REG(hw, IXGBE_PXOFFTXC(tc)); + /* Priority XOFF Received */ + stats->pxoffrxc[tc] += IXGBE_READ_REG(hw, IXGBE_PXOFFRXCNT(tc)); + } + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_dcb_config_rx_arbiter_82599 - Config Rx Data arbiter + * @hw: pointer to hardware structure + * @refill: refill credits index by traffic class + * @max: max credits index by traffic class + * @bwg_id: bandwidth grouping indexed by traffic class + * @tsa: transmission selection algorithm indexed by traffic class + * @map: priority to tc assignments indexed by priority + * + * Configure Rx Packet Arbiter and credits for each traffic class. + */ +s32 ixgbe_dcb_config_rx_arbiter_82599(struct ixgbe_hw *hw, u16 *refill, + u16 *max, u8 *bwg_id, u8 *tsa, + u8 *map) +{ + u32 reg = 0; + u32 credit_refill = 0; + u32 credit_max = 0; + u8 i = 0; + + /* + * Disable the arbiter before changing parameters + * (always enable recycle mode; WSP) + */ + reg = IXGBE_RTRPCS_RRM | IXGBE_RTRPCS_RAC | IXGBE_RTRPCS_ARBDIS; + IXGBE_WRITE_REG(hw, IXGBE_RTRPCS, reg); + + /* + * map all UPs to TCs. up_to_tc_bitmap for each TC has corresponding + * bits sets for the UPs that needs to be mappped to that TC. + * e.g if priorities 6 and 7 are to be mapped to a TC then the + * up_to_tc_bitmap value for that TC will be 11000000 in binary. + */ + reg = 0; + for (i = 0; i < IXGBE_DCB_MAX_USER_PRIORITY; i++) + reg |= (map[i] << (i * IXGBE_RTRUP2TC_UP_SHIFT)); + + IXGBE_WRITE_REG(hw, IXGBE_RTRUP2TC, reg); + + /* Configure traffic class credits and priority */ + for (i = 0; i < IXGBE_DCB_MAX_TRAFFIC_CLASS; i++) { + credit_refill = refill[i]; + credit_max = max[i]; + reg = credit_refill | (credit_max << IXGBE_RTRPT4C_MCL_SHIFT); + + reg |= (u32)(bwg_id[i]) << IXGBE_RTRPT4C_BWG_SHIFT; + + if (tsa[i] == ixgbe_dcb_tsa_strict) + reg |= IXGBE_RTRPT4C_LSP; + + IXGBE_WRITE_REG(hw, IXGBE_RTRPT4C(i), reg); + } + + /* + * Configure Rx packet plane (recycle mode; WSP) and + * enable arbiter + */ + reg = IXGBE_RTRPCS_RRM | IXGBE_RTRPCS_RAC; + IXGBE_WRITE_REG(hw, IXGBE_RTRPCS, reg); + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_dcb_config_tx_desc_arbiter_82599 - Config Tx Desc. arbiter + * @hw: pointer to hardware structure + * @refill: refill credits index by traffic class + * @max: max credits index by traffic class + * @bwg_id: bandwidth grouping indexed by traffic class + * @tsa: transmission selection algorithm indexed by traffic class + * + * Configure Tx Descriptor Arbiter and credits for each traffic class. + */ +s32 ixgbe_dcb_config_tx_desc_arbiter_82599(struct ixgbe_hw *hw, u16 *refill, + u16 *max, u8 *bwg_id, u8 *tsa) +{ + u32 reg, max_credits; + u8 i; + + /* Clear the per-Tx queue credits; we use per-TC instead */ + for (i = 0; i < 128; i++) { + IXGBE_WRITE_REG(hw, IXGBE_RTTDQSEL, i); + IXGBE_WRITE_REG(hw, IXGBE_RTTDT1C, 0); + } + + /* Configure traffic class credits and priority */ + for (i = 0; i < IXGBE_DCB_MAX_TRAFFIC_CLASS; i++) { + max_credits = max[i]; + reg = max_credits << IXGBE_RTTDT2C_MCL_SHIFT; + reg |= (u32)(refill[i]); + reg |= (u32)(bwg_id[i]) << IXGBE_RTTDT2C_BWG_SHIFT; + + if (tsa[i] == ixgbe_dcb_tsa_group_strict_cee) + reg |= IXGBE_RTTDT2C_GSP; + + if (tsa[i] == ixgbe_dcb_tsa_strict) + reg |= IXGBE_RTTDT2C_LSP; + + IXGBE_WRITE_REG(hw, IXGBE_RTTDT2C(i), reg); + } + + /* + * Configure Tx descriptor plane (recycle mode; WSP) and + * enable arbiter + */ + reg = IXGBE_RTTDCS_TDPAC | IXGBE_RTTDCS_TDRM; + IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, reg); + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_dcb_config_tx_data_arbiter_82599 - Config Tx Data arbiter + * @hw: pointer to hardware structure + * @refill: refill credits index by traffic class + * @max: max credits index by traffic class + * @bwg_id: bandwidth grouping indexed by traffic class + * @tsa: transmission selection algorithm indexed by traffic class + * @map: priority to tc assignments indexed by priority + * + * Configure Tx Packet Arbiter and credits for each traffic class. + */ +s32 ixgbe_dcb_config_tx_data_arbiter_82599(struct ixgbe_hw *hw, u16 *refill, + u16 *max, u8 *bwg_id, u8 *tsa, + u8 *map) +{ + u32 reg; + u8 i; + + /* + * Disable the arbiter before changing parameters + * (always enable recycle mode; SP; arb delay) + */ + reg = IXGBE_RTTPCS_TPPAC | IXGBE_RTTPCS_TPRM | + (IXGBE_RTTPCS_ARBD_DCB << IXGBE_RTTPCS_ARBD_SHIFT) | + IXGBE_RTTPCS_ARBDIS; + IXGBE_WRITE_REG(hw, IXGBE_RTTPCS, reg); + + /* + * map all UPs to TCs. up_to_tc_bitmap for each TC has corresponding + * bits sets for the UPs that needs to be mappped to that TC. + * e.g if priorities 6 and 7 are to be mapped to a TC then the + * up_to_tc_bitmap value for that TC will be 11000000 in binary. + */ + reg = 0; + for (i = 0; i < IXGBE_DCB_MAX_USER_PRIORITY; i++) + reg |= (map[i] << (i * IXGBE_RTTUP2TC_UP_SHIFT)); + + IXGBE_WRITE_REG(hw, IXGBE_RTTUP2TC, reg); + + /* Configure traffic class credits and priority */ + for (i = 0; i < IXGBE_DCB_MAX_TRAFFIC_CLASS; i++) { + reg = refill[i]; + reg |= (u32)(max[i]) << IXGBE_RTTPT2C_MCL_SHIFT; + reg |= (u32)(bwg_id[i]) << IXGBE_RTTPT2C_BWG_SHIFT; + + if (tsa[i] == ixgbe_dcb_tsa_group_strict_cee) + reg |= IXGBE_RTTPT2C_GSP; + + if (tsa[i] == ixgbe_dcb_tsa_strict) + reg |= IXGBE_RTTPT2C_LSP; + + IXGBE_WRITE_REG(hw, IXGBE_RTTPT2C(i), reg); + } + + /* + * Configure Tx packet plane (recycle mode; SP; arb delay) and + * enable arbiter + */ + reg = IXGBE_RTTPCS_TPPAC | IXGBE_RTTPCS_TPRM | + (IXGBE_RTTPCS_ARBD_DCB << IXGBE_RTTPCS_ARBD_SHIFT); + IXGBE_WRITE_REG(hw, IXGBE_RTTPCS, reg); + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_dcb_config_pfc_82599 - Configure priority flow control + * @hw: pointer to hardware structure + * @pfc_en: enabled pfc bitmask + * @map: priority to tc assignments indexed by priority + * + * Configure Priority Flow Control (PFC) for each traffic class. + */ +s32 ixgbe_dcb_config_pfc_82599(struct ixgbe_hw *hw, u8 pfc_en, u8 *map) +{ + u32 i, j, fcrtl, reg; + u8 max_tc = 0; + + /* Enable Transmit Priority Flow Control */ + IXGBE_WRITE_REG(hw, IXGBE_FCCFG, IXGBE_FCCFG_TFCE_PRIORITY); + + /* Enable Receive Priority Flow Control */ + reg = IXGBE_READ_REG(hw, IXGBE_MFLCN); + reg |= IXGBE_MFLCN_DPF; + + /* + * X540 supports per TC Rx priority flow control. So + * clear all TCs and only enable those that should be + * enabled. + */ + reg &= ~(IXGBE_MFLCN_RPFCE_MASK | IXGBE_MFLCN_RFCE); + + if (hw->mac.type >= ixgbe_mac_X540) + reg |= pfc_en << IXGBE_MFLCN_RPFCE_SHIFT; + + if (pfc_en) + reg |= IXGBE_MFLCN_RPFCE; + + IXGBE_WRITE_REG(hw, IXGBE_MFLCN, reg); + + for (i = 0; i < IXGBE_DCB_MAX_USER_PRIORITY; i++) { + if (map[i] > max_tc) + max_tc = map[i]; + } + + + /* Configure PFC Tx thresholds per TC */ + for (i = 0; i <= max_tc; i++) { + int enabled = 0; + + for (j = 0; j < IXGBE_DCB_MAX_USER_PRIORITY; j++) { + if ((map[j] == i) && (pfc_en & (1 << j))) { + enabled = 1; + break; + } + } + + if (enabled) { + reg = (hw->fc.high_water[i] << 10) | IXGBE_FCRTH_FCEN; + fcrtl = (hw->fc.low_water[i] << 10) | IXGBE_FCRTL_XONE; + IXGBE_WRITE_REG(hw, IXGBE_FCRTL_82599(i), fcrtl); + } else { + /* + * In order to prevent Tx hangs when the internal Tx + * switch is enabled we must set the high water mark + * to the Rx packet buffer size - 24KB. This allows + * the Tx switch to function even under heavy Rx + * workloads. + */ + reg = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(i)) - 24576; + IXGBE_WRITE_REG(hw, IXGBE_FCRTL_82599(i), 0); + } + + IXGBE_WRITE_REG(hw, IXGBE_FCRTH_82599(i), reg); + } + + for (; i < IXGBE_DCB_MAX_TRAFFIC_CLASS; i++) { + IXGBE_WRITE_REG(hw, IXGBE_FCRTL_82599(i), 0); + IXGBE_WRITE_REG(hw, IXGBE_FCRTH_82599(i), 0); + } + + /* Configure pause time (2 TCs per register) */ + reg = hw->fc.pause_time | (hw->fc.pause_time << 16); + for (i = 0; i < (IXGBE_DCB_MAX_TRAFFIC_CLASS / 2); i++) + IXGBE_WRITE_REG(hw, IXGBE_FCTTV(i), reg); + + /* Configure flow control refresh threshold value */ + IXGBE_WRITE_REG(hw, IXGBE_FCRTV, hw->fc.pause_time / 2); + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_dcb_config_tc_stats_82599 - Config traffic class statistics + * @hw: pointer to hardware structure + * @dcb_config: pointer to ixgbe_dcb_config structure + * + * Configure queue statistics registers, all queues belonging to same traffic + * class uses a single set of queue statistics counters. + */ +s32 ixgbe_dcb_config_tc_stats_82599(struct ixgbe_hw *hw, + struct ixgbe_dcb_config *dcb_config) +{ + u32 reg = 0; + u8 i = 0; + u8 tc_count = 8; + bool vt_mode = false; + + if (dcb_config != NULL) { + tc_count = dcb_config->num_tcs.pg_tcs; + vt_mode = dcb_config->vt_mode; + } + + if (!((tc_count == 8 && vt_mode == false) || tc_count == 4)) + return IXGBE_ERR_PARAM; + + if (tc_count == 8 && vt_mode == false) { + /* + * Receive Queues stats setting + * 32 RQSMR registers, each configuring 4 queues. + * + * Set all 16 queues of each TC to the same stat + * with TC 'n' going to stat 'n'. + */ + for (i = 0; i < 32; i++) { + reg = 0x01010101 * (i / 4); + IXGBE_WRITE_REG(hw, IXGBE_RQSMR(i), reg); + } + /* + * Transmit Queues stats setting + * 32 TQSM registers, each controlling 4 queues. + * + * Set all queues of each TC to the same stat + * with TC 'n' going to stat 'n'. + * Tx queues are allocated non-uniformly to TCs: + * 32, 32, 16, 16, 8, 8, 8, 8. + */ + for (i = 0; i < 32; i++) { + if (i < 8) + reg = 0x00000000; + else if (i < 16) + reg = 0x01010101; + else if (i < 20) + reg = 0x02020202; + else if (i < 24) + reg = 0x03030303; + else if (i < 26) + reg = 0x04040404; + else if (i < 28) + reg = 0x05050505; + else if (i < 30) + reg = 0x06060606; + else + reg = 0x07070707; + IXGBE_WRITE_REG(hw, IXGBE_TQSM(i), reg); + } + } else if (tc_count == 4 && vt_mode == false) { + /* + * Receive Queues stats setting + * 32 RQSMR registers, each configuring 4 queues. + * + * Set all 16 queues of each TC to the same stat + * with TC 'n' going to stat 'n'. + */ + for (i = 0; i < 32; i++) { + if (i % 8 > 3) + /* In 4 TC mode, odd 16-queue ranges are + * not used. + */ + continue; + reg = 0x01010101 * (i / 8); + IXGBE_WRITE_REG(hw, IXGBE_RQSMR(i), reg); + } + /* + * Transmit Queues stats setting + * 32 TQSM registers, each controlling 4 queues. + * + * Set all queues of each TC to the same stat + * with TC 'n' going to stat 'n'. + * Tx queues are allocated non-uniformly to TCs: + * 64, 32, 16, 16. + */ + for (i = 0; i < 32; i++) { + if (i < 16) + reg = 0x00000000; + else if (i < 24) + reg = 0x01010101; + else if (i < 28) + reg = 0x02020202; + else + reg = 0x03030303; + IXGBE_WRITE_REG(hw, IXGBE_TQSM(i), reg); + } + } else if (tc_count == 4 && vt_mode == true) { + /* + * Receive Queues stats setting + * 32 RQSMR registers, each configuring 4 queues. + * + * Queue Indexing in 32 VF with DCB mode maps 4 TC's to each + * pool. Set all 32 queues of each TC across pools to the same + * stat with TC 'n' going to stat 'n'. + */ + for (i = 0; i < 32; i++) + IXGBE_WRITE_REG(hw, IXGBE_RQSMR(i), 0x03020100); + /* + * Transmit Queues stats setting + * 32 TQSM registers, each controlling 4 queues. + * + * Queue Indexing in 32 VF with DCB mode maps 4 TC's to each + * pool. Set all 32 queues of each TC across pools to the same + * stat with TC 'n' going to stat 'n'. + */ + for (i = 0; i < 32; i++) + IXGBE_WRITE_REG(hw, IXGBE_TQSM(i), 0x03020100); + } + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_dcb_config_82599 - Configure general DCB parameters + * @hw: pointer to hardware structure + * @dcb_config: pointer to ixgbe_dcb_config structure + * + * Configure general DCB parameters. + */ +s32 ixgbe_dcb_config_82599(struct ixgbe_hw *hw, + struct ixgbe_dcb_config *dcb_config) +{ + u32 reg; + u32 q; + + /* Disable the Tx desc arbiter so that MTQC can be changed */ + reg = IXGBE_READ_REG(hw, IXGBE_RTTDCS); + reg |= IXGBE_RTTDCS_ARBDIS; + IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, reg); + + reg = IXGBE_READ_REG(hw, IXGBE_MRQC); + if (dcb_config->num_tcs.pg_tcs == 8) { + /* Enable DCB for Rx with 8 TCs */ + switch (reg & IXGBE_MRQC_MRQE_MASK) { + case 0: + case IXGBE_MRQC_RT4TCEN: + /* RSS disabled cases */ + reg = (reg & ~IXGBE_MRQC_MRQE_MASK) | + IXGBE_MRQC_RT8TCEN; + break; + case IXGBE_MRQC_RSSEN: + case IXGBE_MRQC_RTRSS4TCEN: + /* RSS enabled cases */ + reg = (reg & ~IXGBE_MRQC_MRQE_MASK) | + IXGBE_MRQC_RTRSS8TCEN; + break; + default: + /* + * Unsupported value, assume stale data, + * overwrite no RSS + */ + ASSERT(0); + reg = (reg & ~IXGBE_MRQC_MRQE_MASK) | + IXGBE_MRQC_RT8TCEN; + } + } + if (dcb_config->num_tcs.pg_tcs == 4) { + /* We support both VT-on and VT-off with 4 TCs. */ + if (dcb_config->vt_mode) + reg = (reg & ~IXGBE_MRQC_MRQE_MASK) | + IXGBE_MRQC_VMDQRT4TCEN; + else + reg = (reg & ~IXGBE_MRQC_MRQE_MASK) | + IXGBE_MRQC_RTRSS4TCEN; + } + IXGBE_WRITE_REG(hw, IXGBE_MRQC, reg); + + /* Enable DCB for Tx with 8 TCs */ + if (dcb_config->num_tcs.pg_tcs == 8) + reg = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ; + else { + /* We support both VT-on and VT-off with 4 TCs. */ + reg = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ; + if (dcb_config->vt_mode) + reg |= IXGBE_MTQC_VT_ENA; + } + IXGBE_WRITE_REG(hw, IXGBE_MTQC, reg); + + /* Disable drop for all queues */ + for (q = 0; q < 128; q++) + IXGBE_WRITE_REG(hw, IXGBE_QDE, + (IXGBE_QDE_WRITE | (q << IXGBE_QDE_IDX_SHIFT))); + + /* Enable the Tx desc arbiter */ + reg = IXGBE_READ_REG(hw, IXGBE_RTTDCS); + reg &= ~IXGBE_RTTDCS_ARBDIS; + IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, reg); + + /* Enable Security TX Buffer IFG for DCB */ + reg = IXGBE_READ_REG(hw, IXGBE_SECTXMINIFG); + reg |= IXGBE_SECTX_DCB; + IXGBE_WRITE_REG(hw, IXGBE_SECTXMINIFG, reg); + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_dcb_hw_config_82599 - Configure and enable DCB + * @hw: pointer to hardware structure + * @link_speed: unused + * @refill: refill credits index by traffic class + * @max: max credits index by traffic class + * @bwg_id: bandwidth grouping indexed by traffic class + * @tsa: transmission selection algorithm indexed by traffic class + * @map: priority to tc assignments indexed by priority + * + * Configure dcb settings and enable dcb mode. + */ +s32 ixgbe_dcb_hw_config_82599(struct ixgbe_hw *hw, int link_speed, + u16 *refill, u16 *max, u8 *bwg_id, u8 *tsa, + u8 *map) +{ + UNREFERENCED_1PARAMETER(link_speed); + + ixgbe_dcb_config_rx_arbiter_82599(hw, refill, max, bwg_id, tsa, + map); + ixgbe_dcb_config_tx_desc_arbiter_82599(hw, refill, max, bwg_id, + tsa); + ixgbe_dcb_config_tx_data_arbiter_82599(hw, refill, max, bwg_id, + tsa, map); + + return IXGBE_SUCCESS; +} diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_dcb_82599.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_dcb_82599.h new file mode 100644 index 00000000000..f430a67b2dd --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_dcb_82599.h @@ -0,0 +1,97 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 1999 - 2026 Intel Corporation */ + +#ifndef _IXGBE_DCB_82599_H_ +#define _IXGBE_DCB_82599_H_ + +/* DCB register definitions */ +#define IXGBE_RTTDCS_TDPAC 0x00000001 /* 0 Round Robin, + * 1 WSP - Weighted Strict Priority + */ +#define IXGBE_RTTDCS_VMPAC 0x00000002 /* 0 Round Robin, + * 1 WRR - Weighted Round Robin + */ +#define IXGBE_RTTDCS_TDRM 0x00000010 /* Transmit Recycle Mode */ +#define IXGBE_RTTDCS_BDPM 0x00400000 /* Bypass Data Pipe - must clear! */ +#define IXGBE_RTTDCS_BPBFSM 0x00800000 /* Bypass PB Free Space - must + * clear! + */ +#define IXGBE_RTTDCS_SPEED_CHG 0x80000000 /* Link speed change */ + +/* Receive UP2TC mapping */ +#define IXGBE_RTRUP2TC_UP_SHIFT 3 +#define IXGBE_RTRUP2TC_UP_MASK 7 +/* Transmit UP2TC mapping */ +#define IXGBE_RTTUP2TC_UP_SHIFT 3 + +#define IXGBE_RTRPT4C_MCL_SHIFT 12 /* Offset to Max Credit Limit setting */ +#define IXGBE_RTRPT4C_BWG_SHIFT 9 /* Offset to BWG index */ +#define IXGBE_RTRPT4C_GSP 0x40000000 /* GSP enable bit */ +#define IXGBE_RTRPT4C_LSP 0x80000000 /* LSP enable bit */ + +#define IXGBE_RDRXCTL_MPBEN 0x00000010 /* DMA config for multiple packet + * buffers enable + */ +#define IXGBE_RDRXCTL_MCEN 0x00000040 /* DMA config for multiple cores + * (RSS) enable + */ + +/* RTRPCS Bit Masks */ +#define IXGBE_RTRPCS_RRM 0x00000002 /* Receive Recycle Mode enable */ +/* Receive Arbitration Control: 0 Round Robin, 1 DFP */ +#define IXGBE_RTRPCS_RAC 0x00000004 +#define IXGBE_RTRPCS_ARBDIS 0x00000040 /* Arbitration disable bit */ + +/* RTTDT2C Bit Masks */ +#define IXGBE_RTTDT2C_MCL_SHIFT 12 +#define IXGBE_RTTDT2C_BWG_SHIFT 9 +#define IXGBE_RTTDT2C_GSP 0x40000000 +#define IXGBE_RTTDT2C_LSP 0x80000000 + +#define IXGBE_RTTPT2C_MCL_SHIFT 12 +#define IXGBE_RTTPT2C_BWG_SHIFT 9 +#define IXGBE_RTTPT2C_GSP 0x40000000 +#define IXGBE_RTTPT2C_LSP 0x80000000 + +/* RTTPCS Bit Masks */ +#define IXGBE_RTTPCS_TPPAC 0x00000020 /* 0 Round Robin, + * 1 SP - Strict Priority + */ +#define IXGBE_RTTPCS_ARBDIS 0x00000040 /* Arbiter disable */ +#define IXGBE_RTTPCS_TPRM 0x00000100 /* Transmit Recycle Mode enable */ +#define IXGBE_RTTPCS_ARBD_SHIFT 22 +#define IXGBE_RTTPCS_ARBD_DCB 0x4 /* Arbitration delay in DCB mode */ + +#define IXGBE_TXPBTHRESH_DCB 0xA /* THRESH value for DCB mode */ + +/* SECTXMINIFG DCB */ +#define IXGBE_SECTX_DCB 0x00001F00 /* DCB TX Buffer SEC IFG */ + +/* DCB driver APIs */ + +/* DCB PFC */ +s32 ixgbe_dcb_config_pfc_82599(struct ixgbe_hw *, u8, u8 *); + +/* DCB stats */ +s32 ixgbe_dcb_config_tc_stats_82599(struct ixgbe_hw *, + struct ixgbe_dcb_config *); +s32 ixgbe_dcb_get_tc_stats_82599(struct ixgbe_hw *, + struct ixgbe_hw_stats *, u8); +s32 ixgbe_dcb_get_pfc_stats_82599(struct ixgbe_hw *, + struct ixgbe_hw_stats *, u8); + +/* DCB config arbiters */ +s32 ixgbe_dcb_config_tx_desc_arbiter_82599(struct ixgbe_hw *, u16 *, u16 *, + u8 *, u8 *); +s32 ixgbe_dcb_config_tx_data_arbiter_82599(struct ixgbe_hw *, u16 *, u16 *, + u8 *, u8 *, u8 *); +s32 ixgbe_dcb_config_rx_arbiter_82599(struct ixgbe_hw *, u16 *, u16 *, u8 *, + u8 *, u8 *); + +/* DCB initialization */ +s32 ixgbe_dcb_config_82599(struct ixgbe_hw *, + struct ixgbe_dcb_config *); + +s32 ixgbe_dcb_hw_config_82599(struct ixgbe_hw *, int, u16 *, u16 *, u8 *, + u8 *, u8 *); +#endif /* _IXGBE_DCB_82959_H_ */ diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_dcb_nl.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_dcb_nl.c new file mode 100644 index 00000000000..3bcd3f433a2 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_dcb_nl.c @@ -0,0 +1,1406 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 1999 - 2026 Intel Corporation */ + +#include "ixgbe.h" + +#if IS_ENABLED(CONFIG_DCB) +#include +#include "ixgbe_dcb_82598.h" +#include "ixgbe_dcb_82599.h" + +/* Callbacks for DCB netlink in the kernel */ +#define BIT_DCB_MODE 0x01 +#define BIT_PFC 0x02 +#define BIT_PG_RX 0x04 +#define BIT_PG_TX 0x08 +#define BIT_APP_UPCHG 0x10 +#define BIT_RESETLINK 0x40 +#define BIT_LINKSPEED 0x80 + +/* Responses for the DCB_C_SET_ALL command */ +#define DCB_HW_CHG_RST 0 /* DCB configuration changed with reset */ +#define DCB_NO_HW_CHG 1 /* DCB configuration did not change */ +#define DCB_HW_CHG 2 /* DCB configuration changed, no reset */ + +int ixgbe_copy_dcb_cfg(struct ixgbe_adapter *adapter, int tc_max) +{ + struct ixgbe_dcb_config *scfg = &adapter->temp_dcb_cfg; + struct ixgbe_dcb_config *dcfg = &adapter->dcb_cfg; + struct ixgbe_dcb_tc_config *src = NULL; + struct ixgbe_dcb_tc_config *dst = NULL; + int i, j; + int tx = IXGBE_DCB_TX_CONFIG; + int rx = IXGBE_DCB_RX_CONFIG; + int changes = 0; + +#if IS_ENABLED(CONFIG_FCOE) + if (adapter->fcoe.up_set != adapter->fcoe.up) + changes |= BIT_APP_UPCHG; +#endif /* CONFIG_FCOE */ + + for (i = DCB_PG_ATTR_TC_0; i < tc_max + DCB_PG_ATTR_TC_0; i++) { + src = &scfg->tc_config[i - DCB_PG_ATTR_TC_0]; + dst = &dcfg->tc_config[i - DCB_PG_ATTR_TC_0]; + + if (dst->path[tx].tsa != src->path[tx].tsa) { + dst->path[tx].tsa = src->path[tx].tsa; + changes |= BIT_PG_TX; + } + + if (dst->path[tx].bwg_id != src->path[tx].bwg_id) { + dst->path[tx].bwg_id = src->path[tx].bwg_id; + changes |= BIT_PG_TX; + } + + if (dst->path[tx].bwg_percent != src->path[tx].bwg_percent) { + dst->path[tx].bwg_percent = src->path[tx].bwg_percent; + changes |= BIT_PG_TX; + } + + if (dst->path[tx].up_to_tc_bitmap != + src->path[tx].up_to_tc_bitmap) { + dst->path[tx].up_to_tc_bitmap = + src->path[tx].up_to_tc_bitmap; + changes |= (BIT_PG_TX | BIT_PFC | BIT_APP_UPCHG); + } + + if (dst->path[rx].tsa != src->path[rx].tsa) { + dst->path[rx].tsa = src->path[rx].tsa; + changes |= BIT_PG_RX; + } + + if (dst->path[rx].bwg_id != src->path[rx].bwg_id) { + dst->path[rx].bwg_id = src->path[rx].bwg_id; + changes |= BIT_PG_RX; + } + + if (dst->path[rx].bwg_percent != src->path[rx].bwg_percent) { + dst->path[rx].bwg_percent = src->path[rx].bwg_percent; + changes |= BIT_PG_RX; + } + + if (dst->path[rx].up_to_tc_bitmap != + src->path[rx].up_to_tc_bitmap) { + dst->path[rx].up_to_tc_bitmap = + src->path[rx].up_to_tc_bitmap; + changes |= (BIT_PG_RX | BIT_PFC | BIT_APP_UPCHG); + } + } + + for (i = DCB_PG_ATTR_BW_ID_0; i < DCB_PG_ATTR_BW_ID_MAX; i++) { + j = i - DCB_PG_ATTR_BW_ID_0; + + if (dcfg->bw_percentage[tx][j] != scfg->bw_percentage[tx][j]) { + dcfg->bw_percentage[tx][j] = scfg->bw_percentage[tx][j]; + changes |= BIT_PG_TX; + } + if (dcfg->bw_percentage[rx][j] != scfg->bw_percentage[rx][j]) { + dcfg->bw_percentage[rx][j] = scfg->bw_percentage[rx][j]; + changes |= BIT_PG_RX; + } + } + + for (i = DCB_PFC_UP_ATTR_0; i < DCB_PFC_UP_ATTR_MAX; i++) { + j = i - DCB_PFC_UP_ATTR_0; + if (dcfg->tc_config[j].pfc != scfg->tc_config[j].pfc) { + dcfg->tc_config[j].pfc = scfg->tc_config[j].pfc; + changes |= BIT_PFC; + } + } + + if (dcfg->pfc_mode_enable != scfg->pfc_mode_enable) { + dcfg->pfc_mode_enable = scfg->pfc_mode_enable; + changes |= BIT_PFC; + } + + return changes; +} + +/** + * ixgbe_dcbnl_get_state - Retrieve the DCB state of the network device + * @netdev: Network device structure + * + * This function checks whether Data Center Bridging (DCB) is enabled on the + * specified network device. It accesses the adapter's flags to determine the + * DCB state and returns a boolean value indicating the result. The function + * returns `1` if DCB is enabled and `0` otherwise. + * + * Return: A boolean value (`1` or `0`) indicating whether DCB is enabled. + */ +static u8 ixgbe_dcbnl_get_state(struct net_device *netdev) +{ + struct ixgbe_adapter *adapter = netdev_priv(netdev); + + return !!(adapter->flags & IXGBE_FLAG_DCB_ENABLED); +} + +/** + * ixgbe_dcbnl_set_state - Set the DCB state of the network device + * @netdev: Network device structure + * @state: Desired state for DCB (0 to disable, non-zero to enable) + * + * This function sets the Data Center Bridging (DCB) state of the specified + * network device. It checks if the device is in CEE (Converged Enhanced Ethernet) + * mode and proceeds to update the DCB state if applicable. + * + * The function verifies if there is a change in the DCB state. If the desired + * state matches the current state, the function exits without making changes. + * Otherwise, it calls `ixgbe_setup_tc` to configure the traffic classes based + * on the desired state. If enabling DCB, it uses the number of priority groups + * configured in the device; if disabling, it sets the number of traffic classes + * to zero. + * + * Return: 0 on success, or 1 if the device is not in CEE mode or if an error + * occurs during the process. + */ +static u8 ixgbe_dcbnl_set_state(struct net_device *netdev, u8 state) +{ + struct ixgbe_adapter *adapter = netdev_priv(netdev); + int err = 0; + + /* Fail command if not in CEE mode */ + if (!(adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE)) + return 1; + + /* verify there is something to do, if not then exit */ + if (!state == !(adapter->flags & IXGBE_FLAG_DCB_ENABLED)) + goto out; + + err = ixgbe_setup_tc(netdev, + state ? adapter->dcb_cfg.num_tcs.pg_tcs : 0); +out: + return !!err; +} + +/** + * ixgbe_dcbnl_get_perm_hw_addr - Retrieve the permanent hardware address + * @netdev: Network device structure + * @perm_addr: Buffer to store the permanent hardware address + * + * This function retrieves the permanent hardware address (MAC address) of the + * specified network device and stores it in the provided buffer `perm_addr`. + * The function first initializes the buffer with a default value of 0xff for + * each byte, then copies the permanent MAC address from the adapter's hardware + * structure. + * + * For certain MAC types, such as ixgbe_mac_82599EB and ixgbe_mac_X540, the + * function also appends the SAN (Storage Area Network) address to the buffer. + * This is conditional based on the hardware type and specific compile-time + * flags (e.g. MAGNOLIA_PARK_HW). + * + * This function is useful for obtaining the original hardware address of the + * device, which may be needed for various network configuration and management + * tasks. + */ +static void ixgbe_dcbnl_get_perm_hw_addr(struct net_device *netdev, + u8 *perm_addr) +{ + struct ixgbe_adapter *adapter = netdev_priv(netdev); + int i, j; + + memset(perm_addr, 0xff, MAX_ADDR_LEN); + + for (i = 0; i < netdev->addr_len; i++) + perm_addr[i] = adapter->hw.mac.perm_addr[i]; + + switch (adapter->hw.mac.type) { + case ixgbe_mac_82599EB: + case ixgbe_mac_X540: + case ixgbe_mac_X550: + case ixgbe_mac_E610: + for (j = 0; j < netdev->addr_len; j++, i++) + perm_addr[i] = adapter->hw.mac.san_addr[j]; + break; + default: + break; + } +} + +/** + * ixgbe_dcbnl_set_pg_tc_cfg_tx - Set TX traffic class configuration + * @netdev: Network device structure + * @tc: Traffic class identifier for which to set the configuration + * @prio: Priority assignment for the traffic class + * @bwg_id: Bandwidth group identifier for the traffic class + * @bw_pct: Bandwidth percentage for the traffic class + * @up_map: User priority to traffic class mapping + * + * This function sets the transmit (TX) configuration for a specified traffic + * class (TC) on the given network device. It updates the temporary DCB + * configuration with the provided parameters, including the priority assignment + * (`tsa`), bandwidth group identifier (`bwg_id`), bandwidth percentage + * (`bwg_percent`), and user priority to traffic class mapping (`up_to_tc_bitmap`). + * + * The function first checks if the provided traffic class identifier is within + * the valid range. If the identifier is out of range, it logs an error message + * and returns without making any changes. + * + * Each parameter is only updated if it is not equal to `DCB_ATTR_VALUE_UNDEFINED`, + * allowing for selective updates of the traffic class configuration. + */ +static void ixgbe_dcbnl_set_pg_tc_cfg_tx(struct net_device *netdev, int tc, + u8 prio, u8 bwg_id, u8 bw_pct, + u8 up_map) +{ + struct ixgbe_adapter *adapter = netdev_priv(netdev); + + if (tc < 0 || tc >= IXGBE_DCB_MAX_TRAFFIC_CLASS) { + netdev_err(netdev, "Traffic class out of range.\n"); + return; + } + + if (prio != DCB_ATTR_VALUE_UNDEFINED) + adapter->temp_dcb_cfg.tc_config[tc].path[0].tsa = prio; + if (bwg_id != DCB_ATTR_VALUE_UNDEFINED) + adapter->temp_dcb_cfg.tc_config[tc].path[0].bwg_id = bwg_id; + if (bw_pct != DCB_ATTR_VALUE_UNDEFINED) + adapter->temp_dcb_cfg.tc_config[tc].path[0].bwg_percent = + bw_pct; + if (up_map != DCB_ATTR_VALUE_UNDEFINED) + adapter->temp_dcb_cfg.tc_config[tc].path[0].up_to_tc_bitmap = + up_map; +} + +/** + * ixgbe_dcbnl_set_pg_bwg_cfg_tx - Set TX bandwidth percentage for a BWG + * @netdev: Network device structure + * @bwg_id: Bandwidth group identifier for which to set the configuration + * @bw_pct: Bandwidth percentage to be set for the specified bandwidth group + * + * This function sets the transmit (TX) bandwidth percentage for a specified + * bandwidth group (BWG) on the given network device. It updates the temporary + * DCB configuration with the provided bandwidth percentage for the specified + * BWG identifier. + * + * The function first checks if the provided BWG identifier is within the valid + * range. If the identifier is out of range, it logs an error message and + * returns without making any changes. + */ +static void ixgbe_dcbnl_set_pg_bwg_cfg_tx(struct net_device *netdev, int bwg_id, + u8 bw_pct) +{ + struct ixgbe_adapter *adapter = netdev_priv(netdev); + + if (bwg_id < 0 || bwg_id >= IXGBE_DCB_MAX_BW_GROUP) { + netdev_err(netdev, + "BWG index out of range.\n"); + return; + } + + adapter->temp_dcb_cfg.bw_percentage[0][bwg_id] = bw_pct; +} + +/** + * ixgbe_dcbnl_set_pg_tc_cfg_rx - Set RX traffic class configuration + * @netdev: Network device structure + * @tc: Traffic class identifier for which to set the configuration + * @prio: Priority assignment for the traffic class + * @bwg_id: Bandwidth group identifier for the traffic class + * @bw_pct: Bandwidth percentage for the traffic class + * @up_map: User priority to traffic class mapping + * + * This function sets the receive (RX) configuration for a specified traffic + * class (TC) on the given network device. It updates the temporary DCB + * configuration with the provided parameters, including the priority assignment + * (`tsa`), bandwidth group identifier (`bwg_id`), bandwidth percentage + * (`bwg_percent`), and user priority to traffic class mapping (`up_to_tc_bitmap`). + * + * The function first checks if the provided traffic class identifier is within + * the valid range. If the identifier is out of range, it logs an error message + * and returns without making any changes. + * + * Each parameter is only updated if it is not equal to `DCB_ATTR_VALUE_UNDEFINED`, + * allowing for selective updates of the traffic class configuration. + */ +static void ixgbe_dcbnl_set_pg_tc_cfg_rx(struct net_device *netdev, int tc, + u8 prio, u8 bwg_id, u8 bw_pct, + u8 up_map) +{ + struct ixgbe_adapter *adapter = netdev_priv(netdev); + + if (tc < 0 || tc >= IXGBE_DCB_MAX_TRAFFIC_CLASS) { + netdev_err(netdev, "Traffic class out of range.\n"); + return; + } + + if (prio != DCB_ATTR_VALUE_UNDEFINED) + adapter->temp_dcb_cfg.tc_config[tc].path[1].tsa = prio; + if (bwg_id != DCB_ATTR_VALUE_UNDEFINED) + adapter->temp_dcb_cfg.tc_config[tc].path[1].bwg_id = bwg_id; + if (bw_pct != DCB_ATTR_VALUE_UNDEFINED) + adapter->temp_dcb_cfg.tc_config[tc].path[1].bwg_percent = + bw_pct; + if (up_map != DCB_ATTR_VALUE_UNDEFINED) + adapter->temp_dcb_cfg.tc_config[tc].path[1].up_to_tc_bitmap = + up_map; +} + +/** + * ixgbe_dcbnl_set_pg_bwg_cfg_rx - Set RX bandwidth percentage for a BWG + * @netdev: Network device structure + * @bwg_id: Bandwidth group identifier for which to set the configuration + * @bw_pct: Bandwidth percentage to be set for the specified bandwidth group + * + * This function sets the receive (RX) bandwidth percentage for a specified + * bandwidth group (BWG) on the given network device. It updates the temporary + * DCB configuration with the provided bandwidth percentage for the specified + * BWG identifier. + * + * The function first checks if the provided BWG identifier is within the valid + * range. If the identifier is out of range, it logs an error message and + * returns without making any changes. + */ +static void ixgbe_dcbnl_set_pg_bwg_cfg_rx(struct net_device *netdev, int bwg_id, + u8 bw_pct) +{ + struct ixgbe_adapter *adapter = netdev_priv(netdev); + + if (bwg_id < 0 || bwg_id >= IXGBE_DCB_MAX_BW_GROUP) { + netdev_err(netdev, + "BWG index out of range.\n"); + return; + } + + adapter->temp_dcb_cfg.bw_percentage[1][bwg_id] = bw_pct; +} + +/** + * ixgbe_dcbnl_get_pg_tc_cfg_tx - Retrieve TX traffic class configuration + * @netdev: Network device structure + * @tc: Traffic class identifier for which to retrieve the configuration + * @prio: Pointer to store the priority assignment for the traffic class + * @bwg_id: Pointer to store the bandwidth group identifier for the traffic class + * @bw_pct: Pointer to store the bandwidth percentage for the traffic class + * @up_map: Pointer to store the user priority to traffic class mapping + * + * This function retrieves the transmit (TX) configuration for a specified traffic + * class (TC) on the given network device. It accesses the adapter's DCB + * configuration to obtain various parameters for the specified traffic class, + * including the priority assignment (`tsa`), bandwidth group identifier (`bwg_id`), + * bandwidth percentage (`bwg_percent`), and user priority to traffic class mapping + * (`up_to_tc_bitmap`). These values are stored in the provided pointers. + */ +static void ixgbe_dcbnl_get_pg_tc_cfg_tx(struct net_device *netdev, int tc, + u8 *prio, u8 *bwg_id, u8 *bw_pct, + u8 *up_map) +{ + struct ixgbe_adapter *adapter = netdev_priv(netdev); + + *prio = adapter->dcb_cfg.tc_config[tc].path[0].tsa; + *bwg_id = adapter->dcb_cfg.tc_config[tc].path[0].bwg_id; + *bw_pct = adapter->dcb_cfg.tc_config[tc].path[0].bwg_percent; + *up_map = adapter->dcb_cfg.tc_config[tc].path[0].up_to_tc_bitmap; +} + +/** + * ixgbe_dcbnl_get_pg_bwg_cfg_tx - Retrieve TX bandwidth percentage for a BWG + * @netdev: Network device structure + * @bwg_id: Bandwidth group identifier for which to retrieve the configuration + * @bw_pct: Pointer to a buffer where the bandwidth percentage will be stored + * + * This function retrieves the bandwidth percentage configuration for a specified + * bandwidth group (BWG) on the transmit (TX) side of the given network device. + * The function accesses the adapter's DCB configuration to obtain the bandwidth + * percentage for the specified BWG identifier and stores it in the provided + * buffer `bw_pct`. The TX side configuration is indexed by `0` in the + * `bw_percentage` array. + */ +static void ixgbe_dcbnl_get_pg_bwg_cfg_tx(struct net_device *netdev, int bwg_id, + u8 *bw_pct) +{ + struct ixgbe_adapter *adapter = netdev_priv(netdev); + + *bw_pct = adapter->dcb_cfg.bw_percentage[0][bwg_id]; +} + +/** + * ixgbe_dcbnl_get_pg_tc_cfg_rx - Retrieve RX traffic class configuration + * @netdev: Network device structure + * @tc: Traffic class identifier for which to retrieve the configuration + * @prio: Pointer to store the priority assignment for the traffic class + * @bwg_id: Pointer to store the bandwidth group identifier for the traffic class + * @bw_pct: Pointer to store the bandwidth percentage for the traffic class + * @up_map: Pointer to store the user priority to traffic class mapping + * + * This function retrieves the receive (RX) configuration for a specified traffic + * class (TC) on the given network device. It accesses the adapter's DCB + * configuration to obtain various parameters for the specified traffic class, + * including the priority assignment (`tsa`), bandwidth group identifier (`bwg_id`), + * bandwidth percentage (`bwg_percent`), and user priority to traffic class mapping + * (`up_to_tc_bitmap`). These values are stored in the provided pointers. + */ +static void ixgbe_dcbnl_get_pg_tc_cfg_rx(struct net_device *netdev, int tc, + u8 *prio, u8 *bwg_id, u8 *bw_pct, + u8 *up_map) +{ + struct ixgbe_adapter *adapter = netdev_priv(netdev); + + *prio = adapter->dcb_cfg.tc_config[tc].path[1].tsa; + *bwg_id = adapter->dcb_cfg.tc_config[tc].path[1].bwg_id; + *bw_pct = adapter->dcb_cfg.tc_config[tc].path[1].bwg_percent; + *up_map = adapter->dcb_cfg.tc_config[tc].path[1].up_to_tc_bitmap; +} + +/** + * ixgbe_dcbnl_get_pg_bwg_cfg_rx - Retrieve RX bandwidth percentage for a BWG + * @netdev: Network device structure + * @bwg_id: Bandwidth group identifier for which to retrieve the configuration + * @bw_pct: Pointer to a buffer where the bandwidth percentage will be stored + * + * This function retrieves the bandwidth percentage configuration for a specified + * bandwidth group (BWG) on the receive (RX) side of the given network device. + * The function accesses the adapter's DCB configuration to obtain the bandwidth + * percentage for the specified BWG identifier and stores it in the provided + * buffer `bw_pct`. The RX side configuration is indexed by `1` in the + * `bw_percentage` array. + */ +static void ixgbe_dcbnl_get_pg_bwg_cfg_rx(struct net_device *netdev, int bwg_id, + u8 *bw_pct) +{ + struct ixgbe_adapter *adapter = netdev_priv(netdev); + + *bw_pct = adapter->dcb_cfg.bw_percentage[1][bwg_id]; +} + +/** + * ixgbe_dcbnl_set_pfc_cfg - Set the PFC configuration for a specific user priority + * @netdev: Network device structure + * @up: User priority for which to set the PFC configuration + * @pfc: PFC configuration value to be set + * + * This function sets the Priority Flow Control (PFC) configuration for a + * specified user priority (UP) on the given network device. It determines the + * traffic class (TC) associated with the specified user priority and updates + * the temporary DCB configuration with the provided PFC value. + * + * If the new PFC configuration differs from the current configuration, the + * function enables the PFC mode in the temporary DCB configuration, indicating + * that a change has been made and may need to be applied to the hardware. + */ +static void ixgbe_dcbnl_set_pfc_cfg(struct net_device *netdev, int up, u8 pfc) +{ + struct ixgbe_adapter *adapter = netdev_priv(netdev); + u8 tc = ixgbe_dcb_get_tc_from_up(&adapter->temp_dcb_cfg, 0, up); + + adapter->temp_dcb_cfg.tc_config[tc].pfc = pfc; + if (adapter->temp_dcb_cfg.tc_config[tc].pfc != + adapter->dcb_cfg.tc_config[tc].pfc) + adapter->temp_dcb_cfg.pfc_mode_enable = true; +} + +/** + * ixgbe_dcbnl_get_pfc_cfg - Retrieve the PFC configuration for a given user priority + * @netdev: Network device structure + * @up: User priority for which to retrieve the PFC configuration + * @pfc: Pointer to a buffer where the PFC configuration will be stored + * + * This function retrieves the Priority Flow Control (PFC) configuration for a + * specified user priority (UP) on the given network device. The PFC configuration + * is part of the Data Center Bridging (DCB) feature, which provides enhanced + * Ethernet capabilities for data center environments. + * + * The function first determines the traffic class (TC) associated with the + * specified user priority by calling `ixgbe_dcb_get_tc_from_up`. It then + * retrieves the PFC configuration for that traffic class from the adapter's + * DCB configuration and stores it in the provided buffer `pfc`. + * + * This function is useful for network management tools and applications that + * need to query the PFC settings of a network device to ensure proper traffic + * prioritization and flow control in a data center network. + */ +static void ixgbe_dcbnl_get_pfc_cfg(struct net_device *netdev, int up, u8 *pfc) +{ + struct ixgbe_adapter *adapter = netdev_priv(netdev); + u8 tc = ixgbe_dcb_get_tc_from_up(&adapter->dcb_cfg, 0, up); + *pfc = adapter->dcb_cfg.tc_config[tc].pfc; +} + +/** + * ixgbe_dcbnl_devreset - Reset the network device for DCB changes + * @dev: Network device to reset + * + * This function resets the ixgbe network adapter to apply changes related + * to Data Center Bridging (DCB) configurations. It ensures that the device + * is not already in the process of resetting and stops the network + * interface if it is running. The function clears and reinitializes the + * interrupt scheme, then restarts the network interface if it was + * previously running. It manages the resetting state to prevent concurrent + * resets. + */ +static void ixgbe_dcbnl_devreset(struct net_device *dev) +{ + struct ixgbe_adapter *adapter = netdev_priv(dev); + + while (test_and_set_bit(__IXGBE_RESETTING, adapter->state)) + usleep_range(1000, 2000); + + if (netif_running(dev)) +#ifdef HAVE_NET_DEVICE_OPS + dev->netdev_ops->ndo_stop(dev); +#else + dev->stop(dev); +#endif + + ixgbe_clear_interrupt_scheme(adapter); + ixgbe_init_interrupt_scheme(adapter); + + if (netif_running(dev)) +#ifdef HAVE_NET_DEVICE_OPS + dev->netdev_ops->ndo_open(dev); +#else + dev->open(dev); +#endif + + clear_bit(__IXGBE_RESETTING, adapter->state); +} + +/** + * ixgbe_dcbnl_set_all - Apply all DCB configurations to the hardware + * @netdev: Network device structure + * + * This function applies all Data Center Bridging (DCB) configurations to the + * hardware for the specified network device. It checks if the device is in CEE + * (Converged Enhanced Ethernet) mode and proceeds to update the DCB settings + * if applicable. The function handles Priority Group (PG) and Priority Flow + * Control (PFC) configurations, as well as application priority mappings. + * + * The function calculates traffic class credits and configures the hardware + * accordingly. It also manages the enabling and disabling of Malicious Driver + * Detection (MDD) around updates to ensure proper operation. + * + * If Fibre Channel over Ethernet (FCoE) is enabled, the function reprograms + * FCoE hardware offloads when necessary. + * + * Return: A status code indicating whether a hardware change was made and + * whether a reset is required. Possible return values are: + * - DCB_NO_HW_CHG: No hardware change was made. + * - DCB_HW_CHG: A hardware change was made. + * - DCB_HW_CHG_RST: A hardware change was made and a reset is required. + */ +static u8 ixgbe_dcbnl_set_all(struct net_device *netdev) +{ + struct ixgbe_adapter *adapter = netdev_priv(netdev); + struct ixgbe_dcb_config *dcb_cfg = &adapter->dcb_cfg; + struct ixgbe_hw *hw = &adapter->hw; + int ret = DCB_NO_HW_CHG; + u8 prio_tc[IXGBE_DCB_MAX_USER_PRIORITY] = { 0 }; + + /* Fail command if not in CEE mode */ + if (!(adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE)) + return ret; + + adapter->dcb_set_bitmap |= ixgbe_copy_dcb_cfg(adapter, + IXGBE_DCB_MAX_TRAFFIC_CLASS); + if (!adapter->dcb_set_bitmap) + return ret; + + ixgbe_dcb_unpack_map_cee(dcb_cfg, IXGBE_DCB_TX_CONFIG, prio_tc); + + if (adapter->dcb_set_bitmap & (BIT_PG_TX | BIT_PG_RX)) { + /* Priority to TC mapping in CEE case default to 1:1 */ + int max_frame = adapter->netdev->mtu + ETH_HLEN + ETH_FCS_LEN; +#ifdef HAVE_MQPRIO + int i; +#endif + +#if IS_ENABLED(CONFIG_FCOE) +#ifdef HAVE_NETDEV_FCOE_MTU + if (adapter->netdev->fcoe_mtu) +#else + if (adapter->netdev->features & NETIF_F_FCOE_MTU) +#endif + max_frame = max(max_frame, IXGBE_FCOE_JUMBO_FRAME_SIZE); +#endif + + ixgbe_dcb_calculate_tc_credits_cee(hw, dcb_cfg, max_frame, + IXGBE_DCB_TX_CONFIG); + + ixgbe_dcb_calculate_tc_credits_cee(hw, dcb_cfg, max_frame, + IXGBE_DCB_RX_CONFIG); + + ixgbe_dcb_hw_config_cee(hw, dcb_cfg); + +#ifdef HAVE_MQPRIO + for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) + netdev_set_prio_tc_map(netdev, i, prio_tc[i]); +#endif /* HAVE_MQPRIO */ + ret = DCB_HW_CHG_RST; + } + + if (adapter->dcb_set_bitmap & BIT_PFC) { + if (dcb_cfg->pfc_mode_enable) { + u8 pfc_en; + ixgbe_dcb_unpack_pfc_cee(dcb_cfg, prio_tc, &pfc_en); + ixgbe_dcb_config_pfc(hw, pfc_en, prio_tc); + } else { + hw->mac.ops.fc_enable(hw); + } + /* This is known driver so disable MDD before updating SRRCTL */ + if (hw->mac.ops.disable_mdd && + (adapter->flags & IXGBE_FLAG_MDD_ENABLED)) + hw->mac.ops.disable_mdd(hw); + + ixgbe_set_rx_drop_en(adapter); + + if (hw->mac.ops.enable_mdd && + (adapter->flags & IXGBE_FLAG_MDD_ENABLED)) + hw->mac.ops.enable_mdd(hw); + + if (ret != DCB_HW_CHG_RST) + ret = DCB_HW_CHG; + } + +#if IS_ENABLED(CONFIG_FCOE) + /* Reprogam FCoE hardware offloads when the traffic class + * FCoE is using changes. This happens if the APP info + * changes or the up2tc mapping is updated. + */ + if (adapter->dcb_set_bitmap & BIT_APP_UPCHG) { + adapter->fcoe.up_set = adapter->fcoe.up; + ixgbe_dcbnl_devreset(netdev); + ret = DCB_HW_CHG_RST; + } +#endif /* CONFIG_FCOE */ + + adapter->dcb_set_bitmap = 0x00; + return ret; +} + +/** + * ixgbe_dcbnl_getcap - Retrieve DCB capability for a given attribute + * @netdev: Network device structure + * @capid: Capability identifier for which to retrieve the configuration + * @cap: Pointer to a buffer where the capability value will be stored + * + * This function retrieves the Data Center Bridging (DCB) capability for a + * specified attribute identified by `capid` on the given network device. The + * function sets the capability value in the provided buffer `cap` based on the + * attribute requested. It supports various DCB capabilities, such as Priority + * Groups (PG), Priority Flow Control (PFC), User Priority to Traffic Class + * mapping (UP2TC), and others. + * + * The function uses a switch statement to determine the capability value for + * each supported attribute. If the attribute is not recognized, the capability + * is set to `false`. + * + * Return: Always returns 0. + */ +static u8 ixgbe_dcbnl_getcap(struct net_device *netdev, int capid, u8 *cap) +{ +#ifdef HAVE_DCBNL_IEEE + struct ixgbe_adapter *adapter = netdev_priv(netdev); +#endif + + switch (capid) { + case DCB_CAP_ATTR_PG: + *cap = true; + break; + case DCB_CAP_ATTR_PFC: + *cap = true; + break; + case DCB_CAP_ATTR_UP2TC: + *cap = false; + break; + case DCB_CAP_ATTR_PG_TCS: + *cap = 0x80; + break; + case DCB_CAP_ATTR_PFC_TCS: + *cap = 0x80; + break; + case DCB_CAP_ATTR_GSP: + *cap = true; + break; + case DCB_CAP_ATTR_BCN: + *cap = false; + break; +#ifdef HAVE_DCBNL_IEEE + case DCB_CAP_ATTR_DCBX: + *cap = adapter->dcbx_cap; + break; +#endif + default: + *cap = false; + break; + } + + return 0; +} + +/** + * ixgbe_dcbnl_getnumtcs - Retrieve the number of traffic classes for a given attribute + * @netdev: Network device structure + * @tcid: Traffic class identifier attribute for which to retrieve the number of TCs + * @num: Pointer to a buffer where the number of traffic classes will be stored + * + * This function retrieves the number of traffic classes (TCs) for a specified + * attribute identified by `tcid` on the given network device. It checks if Data + * Center Bridging (DCB) is enabled and then accesses the adapter's DCB + * configuration to obtain the number of TCs for the specified attribute. The + * result is stored in the provided buffer `num`. + * + * The function supports attributes such as Priority Groups (PG) and Priority + * Flow Control (PFC). If DCB is not enabled or the attribute is not recognized, + * the function returns an error value. + * + * Return: 0 on success, or a negative error code (-EINVAL) if DCB is not enabled + * or the attribute is invalid. The return type is `u8` or `int` based on + * the `NUMTCS_RETURNS_U8` preprocessor directive. + */ +#ifdef NUMTCS_RETURNS_U8 +static u8 ixgbe_dcbnl_getnumtcs(struct net_device *netdev, int tcid, u8 *num) +#else +static int ixgbe_dcbnl_getnumtcs(struct net_device *netdev, int tcid, u8 *num) +#endif +{ + struct ixgbe_adapter *adapter = netdev_priv(netdev); + u8 rval = 0; + + if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) { + switch (tcid) { + case DCB_NUMTCS_ATTR_PG: + *num = adapter->dcb_cfg.num_tcs.pg_tcs; + break; + case DCB_NUMTCS_ATTR_PFC: + *num = adapter->dcb_cfg.num_tcs.pfc_tcs; + break; + default: + rval = -EINVAL; + break; + } + } else { + rval = -EINVAL; + } + + return rval; +} + +/** + * ixgbe_dcbnl_setnumtcs - Set the number of traffic classes for a given attribute + * @netdev: Network device structure + * @tcid: Traffic class identifier attribute for which to set the number of TCs + * @num: Number of traffic classes to be set for the specified attribute + * + * This function sets the number of traffic classes (TCs) for a specified + * attribute identified by `tcid` on the given network device. It updates the + * adapter's DCB configuration with the provided number of TCs for the specified + * attribute, such as Priority Groups (PG) or Priority Flow Control (PFC). + * + * The function first checks if DCB is enabled on the device. If not, or if the + * attribute is not recognized, it returns an error value. + * + * Return: 0 on success, or a negative error code (-EINVAL) if DCB is not enabled + * or the attribute is invalid. The return type is `u8` or `int` based on + * the `NUMTCS_RETURNS_U8` preprocessor directive. + */ +#ifdef NUMTCS_RETURNS_U8 +static u8 ixgbe_dcbnl_setnumtcs(struct net_device *netdev, int tcid, u8 num) +#else +static int ixgbe_dcbnl_setnumtcs(struct net_device *netdev, int tcid, u8 num) +#endif +{ + struct ixgbe_adapter *adapter = netdev_priv(netdev); + u8 rval = 0; + + if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) { + switch (tcid) { + case DCB_NUMTCS_ATTR_PG: + adapter->dcb_cfg.num_tcs.pg_tcs = num; + break; + case DCB_NUMTCS_ATTR_PFC: + adapter->dcb_cfg.num_tcs.pfc_tcs = num; + break; + default: + rval = -EINVAL; + break; + } + } else { + rval = -EINVAL; + } + + return rval; +} + +/** + * ixgbe_dcbnl_getpfcstate - Retrieve the PFC state of the network device + * @netdev: Network device structure + * + * This function retrieves the Priority Flow Control (PFC) state of the specified + * network device. It accesses the adapter's DCB configuration to obtain the PFC + * mode enable status and returns it. The PFC state indicates whether PFC is + * enabled or disabled on the device. + * + * Return: The PFC mode enable status of the network device. + */ +static u8 ixgbe_dcbnl_getpfcstate(struct net_device *netdev) +{ + struct ixgbe_adapter *adapter = netdev_priv(netdev); + + return adapter->dcb_cfg.pfc_mode_enable; +} + +/** + * ixgbe_dcbnl_setpfcstate - Set the PFC state of the network device + * @netdev: Network device structure + * @state: Desired state for PFC (0 to disable, non-zero to enable) + * + * This function sets the Priority Flow Control (PFC) state for the specified + * network device. It updates the temporary DCB configuration to reflect the + * desired PFC state, enabling or disabling PFC as specified by the `state` + * parameter. + * + * The function directly modifies the `pfc_mode_enable` field in the temporary + * DCB configuration, which may later be applied to the hardware. + */ +static void ixgbe_dcbnl_setpfcstate(struct net_device *netdev, u8 state) +{ + struct ixgbe_adapter *adapter = netdev_priv(netdev); + + adapter->temp_dcb_cfg.pfc_mode_enable = state; + return; +} + +#ifdef HAVE_DCBNL_OPS_GETAPP +/** + * ixgbe_dcbnl_getapp - retrieve the DCBX application user priority + * @netdev : the corresponding netdev + * @idtype : identifies the id as ether type or TCP/UDP port number + * @id: id is either ether type or TCP/UDP port number + * + * Returns : on success, returns a non-zero 802.1p user priority bitmap + * otherwise returns 0 as the invalid user priority bitmap to indicate an + * error. + */ +#ifdef HAVE_DCBNL_OPS_SETAPP_RETURN_INT +static int ixgbe_dcbnl_getapp(struct net_device *netdev, u8 idtype, u16 id) +#else +static u8 ixgbe_dcbnl_getapp(struct net_device *netdev, u8 idtype, u16 id) +#endif +{ + u8 rval = 0; +#ifdef HAVE_DCBNL_IEEE + struct dcb_app app = { + .selector = idtype, + .protocol = id, + }; + + rval = dcb_getapp(netdev, &app); +#endif + + switch (idtype) { + case DCB_APP_IDTYPE_ETHTYPE: +#if IS_ENABLED(CONFIG_FCOE) + if (id == ETH_P_FCOE) + rval = ixgbe_fcoe_getapp(netdev); +#endif + break; + case DCB_APP_IDTYPE_PORTNUM: + break; + default: + break; + } + + return rval; +} + +/** + * ixgbe_dcbnl_setapp - set the DCBX application user priority + * @netdev: the corresponding netdev + * @idtype: identifies the id as ether type or TCP/UDP port number + * @id: id is either ether type or TCP/UDP port number + * @up: the 802.1p user priority bitmap + * + * Returns : 0 on success or 1 on error + */ +#ifdef HAVE_DCBNL_OPS_SETAPP_RETURN_INT +static int ixgbe_dcbnl_setapp(struct net_device *netdev, + u8 idtype, u16 id, u8 up) +#else +static u8 ixgbe_dcbnl_setapp(struct net_device *netdev, + u8 idtype, u16 id, u8 up) +#endif +{ + int err = 0; +#ifdef HAVE_DCBNL_IEEE + struct dcb_app app; + + app.selector = idtype; + app.protocol = id; + app.priority = up; + err = dcb_setapp(netdev, &app); +#endif + + switch (idtype) { + case DCB_APP_IDTYPE_ETHTYPE: +#if IS_ENABLED(CONFIG_FCOE) + if (id == ETH_P_FCOE) { + struct ixgbe_adapter *adapter = netdev_priv(netdev); + + adapter->fcoe.up = up ? ffs(up) - 1 : IXGBE_FCOE_DEFUP; + } +#endif + break; + case DCB_APP_IDTYPE_PORTNUM: + break; + default: + break; + } + + return err; +} +#endif /* HAVE_DCBNL_OPS_GETAPP */ + +#ifdef HAVE_DCBNL_IEEE +/** + * ixgbe_dcbnl_ieee_getets - Retrieve IEEE ETS configuration + * @dev: Network device structure + * @ets: Pointer to the IEEE ETS structure where the configuration will be stored + * + * This function retrieves the Enhanced Transmission Selection (ETS) configuration + * for the specified network device according to the IEEE 802.1Qaz standard. It + * accesses the adapter's stored ETS configuration and copies it into the provided + * `ets` structure. + * + * The function sets the ETS capability (`ets_cap`) based on the number of priority + * groups configured in the device. It also copies the Class-Based Shaping (CBS) + * settings, transmit and receive bandwidth allocations (`tc_tx_bw` and `tc_rx_bw`), + * traffic selection algorithms (`tc_tsa`), and priority to traffic class mappings + * (`prio_tc`) from the adapter's ETS configuration. + * + * If no IEEE ETS settings are available, the function returns an error. + * + * Return: 0 on success, or a negative error code (-EINVAL) if no ETS settings are + * available. + */ +static int ixgbe_dcbnl_ieee_getets(struct net_device *dev, + struct ieee_ets *ets) +{ + struct ixgbe_adapter *adapter = netdev_priv(dev); + struct ieee_ets *my_ets = adapter->ixgbe_ieee_ets; + + /* No IEEE PFC settings available */ + if (!my_ets) + return -EINVAL; + + ets->ets_cap = adapter->dcb_cfg.num_tcs.pg_tcs; + ets->cbs = my_ets->cbs; + memcpy(ets->tc_tx_bw, my_ets->tc_tx_bw, sizeof(ets->tc_tx_bw)); + memcpy(ets->tc_rx_bw, my_ets->tc_rx_bw, sizeof(ets->tc_rx_bw)); + memcpy(ets->tc_tsa, my_ets->tc_tsa, sizeof(ets->tc_tsa)); + memcpy(ets->prio_tc, my_ets->prio_tc, sizeof(ets->prio_tc)); + return 0; +} + +/** + * ixgbe_dcbnl_ieee_setets - Set IEEE ETS configuration + * @dev: Network device structure + * @ets: Pointer to the IEEE ETS structure containing the configuration to be set + * + * This function sets the Enhanced Transmission Selection (ETS) configuration + * for the specified network device according to the IEEE 802.1Qaz standard. It + * first checks if the device supports IEEE DCBX (Data Center Bridging Exchange) + * version. If not, it returns an error. + * + * The function allocates memory for the ETS configuration if it hasn't been + * initialized yet and attempts to update the User Priority to Traffic Class + * (UP2TC) mappings from hardware if possible. It then updates the ETS + * configuration with the provided settings and checks for changes in the + * traffic class mappings. + * + * If the number of traffic classes (`max_tc`) changes, the function calls + * `ixgbe_setup_tc` to reconfigure the traffic classes. If only the mappings + * change, it resets the device's DCB configuration. + * + * Finally, the function updates the hardware ETS settings using + * `ixgbe_dcb_hw_ets`. + * + * Return: 0 on success, or a negative error code (-EINVAL, -ENOMEM) if an error + * occurs during the process. + */ +static int ixgbe_dcbnl_ieee_setets(struct net_device *dev, + struct ieee_ets *ets) +{ + struct ixgbe_adapter *adapter = netdev_priv(dev); + int max_frame = dev->mtu + ETH_HLEN + ETH_FCS_LEN; + int i, err = 0; + __u8 max_tc = 0; + __u8 map_chg = 0; + + if (!(adapter->dcbx_cap & DCB_CAP_DCBX_VER_IEEE)) + return -EINVAL; + + if (!adapter->ixgbe_ieee_ets) { + adapter->ixgbe_ieee_ets = kzalloc(sizeof(struct ieee_ets), + GFP_KERNEL); + if (!adapter->ixgbe_ieee_ets) + return -ENOMEM; + /* initialize UP2TC mappings to invalid value */ + for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) + adapter->ixgbe_ieee_ets->prio_tc[i] = + IEEE_8021QAZ_MAX_TCS; + /* if possible update UP2TC mappings from HW */ + if (adapter->hw.mac.ops.get_rtrup2tc) + adapter->hw.mac.ops.get_rtrup2tc(&adapter->hw, + adapter->ixgbe_ieee_ets->prio_tc); + } + + for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) { + if (ets->prio_tc[i] > max_tc) + max_tc = ets->prio_tc[i]; + if (ets->prio_tc[i] != adapter->ixgbe_ieee_ets->prio_tc[i]) + map_chg = 1; + } + + memcpy(adapter->ixgbe_ieee_ets, ets, sizeof(*adapter->ixgbe_ieee_ets)); + + if (max_tc) + max_tc++; + + if (max_tc > adapter->dcb_cfg.num_tcs.pg_tcs) + return -EINVAL; + + if (max_tc != netdev_get_num_tc(dev)) + err = ixgbe_setup_tc(dev, max_tc); + else if (map_chg) + ixgbe_dcbnl_devreset(dev); + + if (err) + goto err_out; + + err = ixgbe_dcb_hw_ets(&adapter->hw, ets, max_frame); +err_out: + return err; +} + +/** + * ixgbe_dcbnl_ieee_getpfc - Retrieve IEEE PFC configuration + * @dev: Network device structure + * @pfc: Pointer to the IEEE PFC structure where the configuration will be stored + * + * This function retrieves the Priority Flow Control (PFC) configuration for the + * specified network device according to the IEEE 802.1Qaz standard. It accesses + * the adapter's stored PFC configuration and copies it into the provided `pfc` + * structure. + * + * The function sets the PFC capability (`pfc_cap`) based on the number of traffic + * classes configured for PFC in the device. It also copies the PFC enable mask + * (`pfc_en`), the MAC control frame support (`mbc`), and the delay time for PFC + * frames (`delay`) from the adapter's PFC configuration. + * + * Additionally, the function populates the `requests` and `indications` arrays + * with the number of PFC requests and indications for each traffic class, using + * statistics from the adapter. + * + * If no IEEE PFC settings are available, the function returns an error. + * + * Return: 0 on success, or a negative error code (-EINVAL) if no PFC settings are + * available. + */ +static int ixgbe_dcbnl_ieee_getpfc(struct net_device *dev, + struct ieee_pfc *pfc) +{ + struct ixgbe_adapter *adapter = netdev_priv(dev); + struct ieee_pfc *my_pfc = adapter->ixgbe_ieee_pfc; + int i; + + /* No IEEE PFC settings available */ + if (!my_pfc) + return -EINVAL; + + pfc->pfc_cap = adapter->dcb_cfg.num_tcs.pfc_tcs; + pfc->pfc_en = my_pfc->pfc_en; + pfc->mbc = my_pfc->mbc; + pfc->delay = my_pfc->delay; + + for (i = 0; i < IXGBE_DCB_MAX_TRAFFIC_CLASS; i++) { + pfc->requests[i] = adapter->stats.pxoffrxc[i]; + pfc->indications[i] = adapter->stats.pxofftxc[i]; + } + + return 0; +} + +/** + * ixgbe_dcbnl_ieee_setpfc - Set IEEE PFC configuration + * @dev: Network device structure + * @pfc: Pointer to the IEEE PFC structure containing the configuration to be set + * + * This function sets the Priority Flow Control (PFC) configuration for the + * specified network device according to the IEEE 802.1Qaz standard. It first + * checks if the device supports IEEE DCBX (Data Center Bridging Exchange) + * version. If not, it returns an error. + * + * The function allocates memory for the PFC configuration if it hasn't been + * initialized yet. It then updates the adapter's PFC configuration with the + * provided settings. + * + * If PFC is enabled, the function configures the PFC settings using + * `ixgbe_dcb_config_pfc`, passing the PFC enable mask and the priority to + * traffic class mapping. If PFC is disabled, it enables standard link flow + * control using the hardware's `fc_enable` operation. + * + * The function also handles the disabling and enabling of Malicious Driver + * Detection (MDD) around the update of the SRRCTL register to ensure proper + * operation. + * + * Return: 0 on success, or a negative error code (-EINVAL, -ENOMEM) if an error + * occurs during the process. + */ +static int ixgbe_dcbnl_ieee_setpfc(struct net_device *dev, + struct ieee_pfc *pfc) +{ + struct ixgbe_adapter *adapter = netdev_priv(dev); + struct ixgbe_hw *hw = &adapter->hw; + u8 *prio_tc; + int err; + + if (!(adapter->dcbx_cap & DCB_CAP_DCBX_VER_IEEE)) + return -EINVAL; + + if (!adapter->ixgbe_ieee_pfc) { + adapter->ixgbe_ieee_pfc = kzalloc(sizeof(struct ieee_pfc), + GFP_KERNEL); + if (!adapter->ixgbe_ieee_pfc) + return -ENOMEM; + } + + prio_tc = adapter->ixgbe_ieee_ets->prio_tc; + memcpy(adapter->ixgbe_ieee_pfc, pfc, sizeof(*adapter->ixgbe_ieee_pfc)); + + + /* Enable link flow control parameters if PFC is disabled */ + if (pfc->pfc_en) + err = ixgbe_dcb_config_pfc(hw, pfc->pfc_en, prio_tc); + else + err = hw->mac.ops.fc_enable(hw); + + /* This is known driver so disable MDD before updating SRRCTL */ + if (hw->mac.ops.disable_mdd && + (adapter->flags & IXGBE_FLAG_MDD_ENABLED)) + hw->mac.ops.disable_mdd(hw); + + ixgbe_set_rx_drop_en(adapter); + + if (hw->mac.ops.enable_mdd && + (adapter->flags & IXGBE_FLAG_MDD_ENABLED)) + hw->mac.ops.enable_mdd(hw); + + return err; +} + +/** + * ixgbe_dcbnl_ieee_setapp - Set an IEEE DCB application priority mapping + * @dev: Network device structure + * @app: Pointer to the DCB application structure to be set + * + * This function sets an IEEE Data Center Bridging (DCB) application priority + * mapping for the specified network device. It first checks if the device + * supports IEEE DCBX (Data Center Bridging Exchange) version. If not, it returns + * an error. The function then calls `dcb_ieee_setapp` to apply the application + * mapping. + * + * If Fibre Channel over Ethernet (FCoE) is enabled in the kernel configuration + * and the application being set is related to FCoE, the function updates the + * FCoE user priority (UP) and resets the device's DCB configuration if necessary. + * + * Return: 0 on success, or a negative error code (-EINVAL) if IEEE DCBX is not + * supported or if the setting fails. + */ +static int ixgbe_dcbnl_ieee_setapp(struct net_device *dev, + struct dcb_app *app) +{ + struct ixgbe_adapter *adapter = netdev_priv(dev); + int err = -EINVAL; + + if (!(adapter->dcbx_cap & DCB_CAP_DCBX_VER_IEEE)) + return err; + + err = dcb_ieee_setapp(dev, app); + +#if IS_ENABLED(CONFIG_FCOE) + if (!err && app->selector == IEEE_8021QAZ_APP_SEL_ETHERTYPE && + app->protocol == ETH_P_FCOE) { + u8 app_mask = dcb_ieee_getapp_mask(dev, app); + + if (app_mask & (1 << adapter->fcoe.up)) + return err; + + adapter->fcoe.up = app->priority; + adapter->fcoe.up_set = adapter->fcoe.up; + ixgbe_dcbnl_devreset(dev); + } +#endif + return 0; +} + +#ifdef HAVE_DCBNL_IEEE_DELAPP +/** + * ixgbe_dcbnl_ieee_delapp - Delete an IEEE DCB application priority mapping + * @dev: Network device structure + * @app: Pointer to the DCB application structure to be deleted + * + * This function deletes an IEEE Data Center Bridging (DCB) application priority + * mapping from the specified network device. It first checks if the device + * supports IEEE DCBX (Data Center Bridging Exchange) version. If not, it returns + * an error. The function then calls `dcb_ieee_delapp` to remove the application + * mapping. + * + * If Fibre Channel over Ethernet (FCoE) is enabled in the kernel configuration + * and the application being deleted is related to FCoE, the function updates the + * FCoE user priority (UP) if necessary and resets the device's DCB configuration. + * + * Return: 0 on success, or a negative error code (-EINVAL) if IEEE DCBX is not + * supported or if the deletion fails. + */ +static int ixgbe_dcbnl_ieee_delapp(struct net_device *dev, + struct dcb_app *app) +{ + struct ixgbe_adapter *adapter = netdev_priv(dev); + int err; + + if (!(adapter->dcbx_cap & DCB_CAP_DCBX_VER_IEEE)) + return -EINVAL; + + err = dcb_ieee_delapp(dev, app); + +#if IS_ENABLED(CONFIG_FCOE) + if (!err && app->selector == IEEE_8021QAZ_APP_SEL_ETHERTYPE && + app->protocol == ETH_P_FCOE) { + u8 app_mask = dcb_ieee_getapp_mask(dev, app); + + if (app_mask & (1 << adapter->fcoe.up)) + return err; + + adapter->fcoe.up = app_mask ? + ffs(app_mask) - 1 : IXGBE_FCOE_DEFUP; + ixgbe_dcbnl_devreset(dev); + } +#endif + return err; +} +#endif /* HAVE_DCBNL_IEEE_DELAPP */ + +/** + * ixgbe_dcbnl_getdcbx - Retrieve the DCBX capability of the network device + * @dev: Network device structure + * + * This function retrieves the Data Center Bridging Exchange (DCBX) capability + * of the specified network device. It accesses the adapter's configuration to + * obtain the DCBX capability value and returns it. The DCBX capability + * indicates the level of DCBX support provided by the device. + * + * Return: The DCBX capability value of the network device. + */ +static u8 ixgbe_dcbnl_getdcbx(struct net_device *dev) +{ + struct ixgbe_adapter *adapter = netdev_priv(dev); + return adapter->dcbx_cap; +} + +/** + * ixgbe_dcbnl_setdcbx - Set the DCBX mode of the network device + * @dev: Network device structure + * @mode: Desired DCBX mode to be set + * + * This function sets the Data Center Bridging Exchange (DCBX) mode for the + * specified network device. It checks for unsupported configurations, such as + * LLD_MANAGED modes or simultaneous CEE and IEEE modes, and returns an error + * if any are detected. The function also ensures that the mode includes + * DCB_CAP_DCBX_HOST. + * + * If the desired mode is already set, the function exits without making changes. + * Otherwise, it updates the adapter's DCBX capability and applies default + * Enhanced Transmission Selection (ETS) and Priority Flow Control (PFC) + * configurations. + * + * Depending on the mode, the function configures the device for IEEE or CEE + * DCBX. For IEEE, it sets ETS and PFC using the respective functions. For CEE, + * it sets a bitmap for DCB configuration and applies all settings. If both CEE + * and IEEE are disabled, the function configures the device for single traffic + * class mode with strict priority. + * + * Return: 0 on success, or 1 if an unsupported configuration is detected. + */ +static u8 ixgbe_dcbnl_setdcbx(struct net_device *dev, u8 mode) +{ + struct ixgbe_adapter *adapter = netdev_priv(dev); + struct ieee_ets ets = { .ets_cap = 0 }; + struct ieee_pfc pfc = { .pfc_en = 0 }; + + /* no support for LLD_MANAGED modes or CEE+IEEE */ + if ((mode & DCB_CAP_DCBX_LLD_MANAGED) || + ((mode & DCB_CAP_DCBX_VER_IEEE) && (mode & DCB_CAP_DCBX_VER_CEE)) || + !(mode & DCB_CAP_DCBX_HOST)) + return 1; + + if (mode == adapter->dcbx_cap) + return 0; + + adapter->dcbx_cap = mode; + + /* ETS and PFC defaults */ + ets.ets_cap = 8; + pfc.pfc_cap = 8; + + if (mode & DCB_CAP_DCBX_VER_IEEE) { + ixgbe_dcbnl_ieee_setets(dev, &ets); + ixgbe_dcbnl_ieee_setpfc(dev, &pfc); + } else if (mode & DCB_CAP_DCBX_VER_CEE) { + u8 mask = (BIT_PFC | BIT_PG_TX | BIT_PG_RX | BIT_APP_UPCHG); + + adapter->dcb_set_bitmap |= mask; + ixgbe_dcbnl_set_all(dev); + } else { + /* Drop into single TC mode strict priority as this + * indicates CEE and IEEE versions are disabled + */ + ixgbe_dcbnl_ieee_setets(dev, &ets); + ixgbe_dcbnl_ieee_setpfc(dev, &pfc); + ixgbe_setup_tc(dev, 0); + } + + return 0; +} + +#endif + +struct dcbnl_rtnl_ops ixgbe_dcbnl_ops = { +#ifdef HAVE_DCBNL_IEEE + .ieee_getets = ixgbe_dcbnl_ieee_getets, + .ieee_setets = ixgbe_dcbnl_ieee_setets, + .ieee_getpfc = ixgbe_dcbnl_ieee_getpfc, + .ieee_setpfc = ixgbe_dcbnl_ieee_setpfc, + .ieee_setapp = ixgbe_dcbnl_ieee_setapp, +#ifdef HAVE_DCBNL_IEEE_DELAPP + .ieee_delapp = ixgbe_dcbnl_ieee_delapp, +#endif +#endif + .getstate = ixgbe_dcbnl_get_state, + .setstate = ixgbe_dcbnl_set_state, + .getpermhwaddr = ixgbe_dcbnl_get_perm_hw_addr, + .setpgtccfgtx = ixgbe_dcbnl_set_pg_tc_cfg_tx, + .setpgbwgcfgtx = ixgbe_dcbnl_set_pg_bwg_cfg_tx, + .setpgtccfgrx = ixgbe_dcbnl_set_pg_tc_cfg_rx, + .setpgbwgcfgrx = ixgbe_dcbnl_set_pg_bwg_cfg_rx, + .getpgtccfgtx = ixgbe_dcbnl_get_pg_tc_cfg_tx, + .getpgbwgcfgtx = ixgbe_dcbnl_get_pg_bwg_cfg_tx, + .getpgtccfgrx = ixgbe_dcbnl_get_pg_tc_cfg_rx, + .getpgbwgcfgrx = ixgbe_dcbnl_get_pg_bwg_cfg_rx, + .setpfccfg = ixgbe_dcbnl_set_pfc_cfg, + .getpfccfg = ixgbe_dcbnl_get_pfc_cfg, + .setall = ixgbe_dcbnl_set_all, + .getcap = ixgbe_dcbnl_getcap, + .getnumtcs = ixgbe_dcbnl_getnumtcs, + .setnumtcs = ixgbe_dcbnl_setnumtcs, + .getpfcstate = ixgbe_dcbnl_getpfcstate, + .setpfcstate = ixgbe_dcbnl_setpfcstate, +#ifdef HAVE_DCBNL_OPS_GETAPP + .getapp = ixgbe_dcbnl_getapp, + .setapp = ixgbe_dcbnl_setapp, +#endif +#ifdef HAVE_DCBNL_IEEE + .getdcbx = ixgbe_dcbnl_getdcbx, + .setdcbx = ixgbe_dcbnl_setdcbx, +#endif +}; + +#endif /* CONFIG_DCB */ diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_debugfs.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_debugfs.c new file mode 100644 index 00000000000..a2923f6b12a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_debugfs.c @@ -0,0 +1,1447 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 1999 - 2026 Intel Corporation */ + +#include "ixgbe.h" + +#ifdef HAVE_IXGBE_DEBUG_FS +#include +#include + +static struct dentry *ixgbe_dbg_root; + +#define IXGBE_FW_DUMP_BLK_MAX 0xFFFF +#define IXGBE_FW_DUMP_DATA_SIZE 4096 +#define IXGBE_FW_DUMP_HDR_SIZE 24 +/* dump blk = Cluster header + dump data */ +#define IXGBE_FW_DUMP_BLK_SIZE (IXGBE_FW_DUMP_DATA_SIZE + IXGBE_FW_DUMP_HDR_SIZE) +#define IXGBE_FW_DUMP_FILENAME "debug_dump" +#define IXGBE_FW_DUMP_LAST_IDX 0xFFFFFFFF +#define IXGBE_FW_DUMP_LAST_ID 0xFF +#define IXGBE_FW_DUMP_LAST_ID2 0xFFFF + +static char ixgbe_dbg_reg_ops_buf[256] = ""; + +/* the ordering in this array is important. it matches the ordering of the + * values in the FW so the index is the same value as in ice_aqc_fw_logging_mod + */ +static const char * const ixgbe_fwlog_module_string[] = { + "GENERAL", + "CTRL", + "LINK", + "LINK_TOPO", + "DNL", + "I2C", + "SDP", + "MDIO", + "ADMINQ", + "HDMA", + "LLDP", + "DCBX", + "DCB", + "XLR", + "NVM", + "AUTH", + "VPD", + "IOSF", + "PARSER", + "SW", + "SCHEDULER", + "TXQ", + "RSVD", + "POST", + "WATCHDOG", + "TASK_DISPATCH", + "MNG", + "SYNCE", + "HEALTH", + "TSDRV", + "PFREG", + "MDLVER", + "ALL", +}; + +/* the ordering in this array is important. it matches the ordering of the + * values in the FW so the index is the same value as in ice_fwlog_level + */ +static const char * const ixgbe_fwlog_level_string[] = { + "NONE", + "ERROR", + "WARNING", + "NORMAL", + "VERBOSE", +}; + +static void ixgbe_print_fwlog_config(struct ixgbe_hw *hw, struct ixgbe_fwlog_cfg *cfg, + char **buff, int *size) +{ + char *tmp = *buff; + int used = *size; + u16 i, len; + + len = snprintf(tmp, used, "Log_resolution: %d\n", cfg->log_resolution); + tmp = tmp + len; + used -= len; + len = snprintf(tmp, used, "Options: 0x%04x\n", cfg->options); + tmp = tmp + len; + used -= len; + len = snprintf(tmp, used, "\tarq_ena: %s\n", + (cfg->options & + IXGBE_FWLOG_OPTION_ARQ_ENA) ? "true" : "false"); + tmp = tmp + len; + used -= len; + len = snprintf(tmp, used, "\tuart_ena: %s\n", + (cfg->options & + IXGBE_FWLOG_OPTION_UART_ENA) ? "true" : "false"); + tmp = tmp + len; + used -= len; + len = snprintf(tmp, used, "\trunning: %s\n", + (cfg->options & + IXGBE_FWLOG_OPTION_IS_REGISTERED) ? "true" : "false"); + tmp = tmp + len; + used -= len; + len = snprintf(tmp, used, "Module Entries:\n"); + tmp = tmp + len; + used -= len; + + for (i = 0; i < IXGBE_ACI_FW_LOG_ID_MAX; i++) { + struct ixgbe_fwlog_module_entry *entry = + &cfg->module_entries[i]; + + /* TODO: Remove this hack when SyncE gets turned on always */ + if (i == IXGBE_ACI_FW_LOG_ID_SYNCE) + continue; + + len = snprintf(tmp, used, "\tModule: %s, Log Level: %s\n", + ixgbe_fwlog_module_string[entry->module_id], + ixgbe_fwlog_level_string[entry->log_level]); + tmp = tmp + len; + used -= len; + } + + len = snprintf(tmp, used, "Valid log levels:\n"); + tmp = tmp + len; + used -= len; + + for (i = 0; i < IXGBE_FWLOG_LEVEL_INVALID; i++) { + len = snprintf(tmp, used, "\t%s\n", ixgbe_fwlog_level_string[i]); + tmp = tmp + len; + used -= len; + } + + *buff = tmp; + *size = used; +} + +/** + * ixgbe_fwlog_dump_cfg - Dump current FW logging configuration + * @hw: pointer to the HW structure + * @buff: pointer to a buffer to hold the config strings + * @buff_size: size of the buffer in bytes + */ +static void ixgbe_fwlog_dump_cfg(struct ixgbe_hw *hw, char *buff, int buff_size) +{ + int len; + + len = snprintf(buff, buff_size, "FWLOG Configuration:\n"); + buff = buff + len; + buff_size -= len; + + ixgbe_print_fwlog_config(hw, &hw->fwlog_cfg, &buff, &buff_size); +} + +/** + * ixgbe_debugfs_parse_cmd_line - Parse the command line that was passed in + * @src: pointer to a buffer holding the command line + * @len: size of the buffer in bytes + * @argv: pointer to store the command line items + * @argc: pointer to store the number of command line items + */ +static ssize_t ixgbe_debugfs_parse_cmd_line(const char __user *src, size_t len, + char ***argv, int *argc) +{ + char *cmd_buf, *cmd_buf_tmp; + + cmd_buf = memdup_user(src, len + 1); + if (IS_ERR(cmd_buf)) + return PTR_ERR(cmd_buf); + cmd_buf[len] = '\0'; + + /** the cmd_buf has a newline at the end of the command so + * remove it + */ + cmd_buf_tmp = strchr(cmd_buf, '\n'); + if (cmd_buf_tmp) { + *cmd_buf_tmp = '\0'; + len = (size_t)cmd_buf_tmp - (size_t)cmd_buf + 1; + } + + *argv = argv_split(GFP_KERNEL, cmd_buf, argc); + if (!*argv) + return -ENOMEM; + + kfree(cmd_buf); + return 0; +} + +/** + * ixgbe_dbg_reg_ops_read - Read reg_ops data for debugging + * @filp: The opened file + * @buffer: Buffer where the data is written for the user to read + * @count: Size of the user's buffer + * @ppos: File position offset + * + * This function reads the reg_ops data for debugging purposes from the + * ixgbe network adapter. It formats the data into a string and writes it to + * the user's buffer. The function does not allow partial reads and returns + * an error if the user's buffer is too small to hold the data. + * + * Return: Number of bytes read on success, or a negative error code on + * failure. + */ +static ssize_t ixgbe_dbg_reg_ops_read(struct file *filp, char __user *buffer, + size_t count, loff_t *ppos) +{ + struct ixgbe_adapter *adapter = filp->private_data; + char *buf; + int len; + + /* don't allow partial reads */ + if (*ppos != 0) + return 0; + + buf = kasprintf(GFP_KERNEL, "%s: %s\n", + adapter->netdev->name, + ixgbe_dbg_reg_ops_buf); + if (!buf) + return -ENOMEM; + + if (count < strlen(buf)) { + kfree(buf); + return -ENOSPC; + } + + len = simple_read_from_buffer(buffer, count, ppos, buf, strlen(buf)); + + kfree(buf); + return len; +} + +/** + * ixgbe_dbg_reg_ops_write - Write data to reg_ops for debugging + * @filp: The opened file + * @buffer: Buffer containing the user's data + * @count: Length of the user's data + * @ppos: File position offset + * + * This function writes user-provided data to the reg_ops buffer for + * debugging purposes. It processes specific commands, such as "read" and + * "write", to perform register operations on the ixgbe network adapter. The + * function does not allow partial writes and returns an error if the data + * exceeds the buffer size. If an unknown command is received, it logs + * available commands. + * + * Return: Number of bytes written on success, or a negative error code on + * failure. + */ +static ssize_t ixgbe_dbg_reg_ops_write(struct file *filp, + const char __user *buffer, + size_t count, loff_t *ppos) +{ + struct ixgbe_adapter *adapter = filp->private_data; + int len; + + /* don't allow partial writes */ + if (*ppos != 0) + return 0; + if (count >= sizeof(ixgbe_dbg_reg_ops_buf)) + return -ENOSPC; + + len = simple_write_to_buffer(ixgbe_dbg_reg_ops_buf, + sizeof(ixgbe_dbg_reg_ops_buf)-1, + ppos, + buffer, + count); + if (len < 0) + return len; + + ixgbe_dbg_reg_ops_buf[len] = '\0'; + + if (strncmp(ixgbe_dbg_reg_ops_buf, "write", 5) == 0) { + u32 reg, value; + int cnt; + cnt = sscanf(&ixgbe_dbg_reg_ops_buf[5], "%x %x", ®, &value); + /* check format and bounds check register access */ + if (cnt == 2 && reg <= IXGBE_HFDR) { + IXGBE_WRITE_REG(&adapter->hw, reg, value); + value = IXGBE_READ_REG(&adapter->hw, reg); + e_dev_info("write: 0x%08x = 0x%08x\n", reg, value); + } else { + e_dev_info("write \n"); + } + } else if (strncmp(ixgbe_dbg_reg_ops_buf, "read", 4) == 0) { + u32 reg, value; + int cnt; + cnt = sscanf(&ixgbe_dbg_reg_ops_buf[4], "%x", ®); + /* check format and bounds check register access */ + if (cnt == 1 && reg <= IXGBE_HFDR) { + value = IXGBE_READ_REG(&adapter->hw, reg); + e_dev_info("read 0x%08x = 0x%08x\n", reg, value); + } else { + e_dev_info("read \n"); + } + } else { + e_dev_info("Unknown command %s\n", ixgbe_dbg_reg_ops_buf); + e_dev_info("Available commands:\n"); + e_dev_info(" read \n"); + e_dev_info(" write \n"); + } + return count; +} + +static const struct file_operations ixgbe_dbg_reg_ops_fops = { + .owner = THIS_MODULE, + .open = simple_open, + .read = ixgbe_dbg_reg_ops_read, + .write = ixgbe_dbg_reg_ops_write, +}; + +static char ixgbe_dbg_netdev_ops_buf[256] = ""; + +/** + * ixgbe_dbg_netdev_ops_read - Read netdev_ops data for debugging + * @filp: The opened file + * @buffer: Buffer where the data is written for the user to read + * @count: Size of the user's buffer + * @ppos: File position offset + * + * This function reads the netdev_ops data for debugging purposes from the + * ixgbe network adapter. It formats the data into a string and writes it to + * the user's buffer. The function does not allow partial reads and returns + * an error if the user's buffer is too small to hold the data. + * + * Return: Number of bytes read on success, or a negative error code on + * failure. + */ +static ssize_t ixgbe_dbg_netdev_ops_read(struct file *filp, + char __user *buffer, + size_t count, loff_t *ppos) +{ + struct ixgbe_adapter *adapter = filp->private_data; + char *buf; + int len; + + /* don't allow partial reads */ + if (*ppos != 0) + return 0; + + buf = kasprintf(GFP_KERNEL, "%s: %s\n", + adapter->netdev->name, + ixgbe_dbg_netdev_ops_buf); + if (!buf) + return -ENOMEM; + + if (count < strlen(buf)) { + kfree(buf); + return -ENOSPC; + } + + len = simple_read_from_buffer(buffer, count, ppos, buf, strlen(buf)); + + kfree(buf); + return len; +} + +/** + * ixgbe_dbg_netdev_ops_write - Write data to netdev_ops for debugging + * @filp: The opened file + * @buffer: Buffer containing the user's data + * @count: Length of the user's data + * @ppos: File position offset + * + * This function writes user-provided data to the netdev_ops buffer for + * debugging purposes. It processes specific commands, such as "tx_timeout", + * to trigger corresponding network device operations. The function does not + * allow partial writes and returns an error if the data exceeds the buffer + * size. If an unknown command is received, it logs available commands. + * + * Return: Number of bytes written on success, or a negative error code on + * failure. + */ +static ssize_t ixgbe_dbg_netdev_ops_write(struct file *filp, + const char __user *buffer, + size_t count, loff_t *ppos) +{ + struct ixgbe_adapter *adapter = filp->private_data; + int len; + + /* don't allow partial writes */ + if (*ppos != 0) + return 0; + if (count >= sizeof(ixgbe_dbg_netdev_ops_buf)) + return -ENOSPC; + + len = simple_write_to_buffer(ixgbe_dbg_netdev_ops_buf, + sizeof(ixgbe_dbg_netdev_ops_buf)-1, + ppos, + buffer, + count); + if (len < 0) + return len; + + ixgbe_dbg_netdev_ops_buf[len] = '\0'; + + if (strncmp(ixgbe_dbg_netdev_ops_buf, "tx_timeout", 10) == 0) { +#ifdef HAVE_NET_DEVICE_OPS +#ifdef HAVE_TX_TIMEOUT_TXQUEUE + adapter->netdev->netdev_ops->ndo_tx_timeout(adapter->netdev, + UINT_MAX); +#else + adapter->netdev->netdev_ops->ndo_tx_timeout(adapter->netdev); +#endif +#else + adapter->netdev->tx_timeout(adapter->netdev); +#endif /* HAVE_NET_DEVICE_OPS */ + e_dev_info("tx_timeout called\n"); + } else { + e_dev_info("Unknown command: %s\n", ixgbe_dbg_netdev_ops_buf); + e_dev_info("Available commands:\n"); + e_dev_info(" tx_timeout\n"); + } + return count; +} + +static struct file_operations ixgbe_dbg_netdev_ops_fops = { + .owner = THIS_MODULE, + .open = simple_open, + .read = ixgbe_dbg_netdev_ops_read, + .write = ixgbe_dbg_netdev_ops_write, +}; + +struct ixgbe_cluster_header { + u32 cluster_id; + u32 table_id; + u32 table_len; + u32 table_offset; + u32 reserved[2]; +}; + +/** + * ixgbe_get_last_table_id - get a value that should be used as End of Table + * @adapter: pointer to adapter struct + * + * Different versions of FW may indicate End Of Table by different value. Read + * FW capabilities and decide what value to use as End of Table. + * + * Return: end of table identifier. + */ +static u16 ixgbe_get_last_table_id(struct ixgbe_adapter *adapter) +{ + if (adapter->hw.func_caps.common_cap.next_cluster_id_support || + adapter->hw.dev_caps.common_cap.next_cluster_id_support) + return IXGBE_FW_DUMP_LAST_ID2; + else + return IXGBE_FW_DUMP_LAST_ID; +} + +/** + * ixgbe_debugfs_fw_dump - send request to FW to dump cluster and save to file + * @adapter: pointer to adapter struct + * @cluster_id: number or FW cluster to be dumped + * @read_all_clusters: ignore cluster_id and dump all clusters + * + * Create FW configuration binary snapshot. Repeatedly send ACI requests to dump + * FW cluster, FW responds in 4KB blocks and sets new values for table_id + * and table_idx. Repeat until all tables in given cluster were read. + * + * Return: 0 on success or error code on failure. + */ +static int ixgbe_debugfs_fw_dump(struct ixgbe_adapter *adapter, + u16 cluster_id, bool read_all_clusters) +{ + u16 buf_len, next_tbl_id, next_cluster_id, last_tbl_id, tbl_id = 0; + u32 next_blk_idx, blk_idx = 0, ntw = 0, ctw = 0, offset = 0; + struct debugfs_blob_wrapper *desc_blob; + struct device *dev = ixgbe_pf_to_dev(adapter); + struct ixgbe_cluster_header header = {}; + struct dentry *pfile; + u8 *vblk; + int i; + + desc_blob = devm_kzalloc(dev, sizeof(*desc_blob), GFP_KERNEL); + if (!desc_blob) + return -ENOMEM; + + vfree(adapter->ixgbe_cluster_blk); + adapter->ixgbe_cluster_blk = NULL; + + vblk = vmalloc(IXGBE_FW_DUMP_BLK_MAX * IXGBE_FW_DUMP_BLK_SIZE); + if (!vblk) + return -ENOMEM; + + last_tbl_id = ixgbe_get_last_table_id(adapter); + + for (i = 0; i < IXGBE_FW_DUMP_BLK_MAX; i++) { + int res; + + /* Skip the header bytes */ + ntw += sizeof(struct ixgbe_cluster_header); + + res = ixgbe_aci_get_internal_data(&adapter->hw, cluster_id, + tbl_id, blk_idx, vblk + ntw, + IXGBE_FW_DUMP_DATA_SIZE, + &buf_len, &next_cluster_id, + &next_tbl_id, &next_blk_idx); + + if (res) { + dev_err(dev, "Internal FW error %d while dumping cluster %d\n", + res, cluster_id); + devm_kfree(dev, desc_blob); + vfree(vblk); + return -EINVAL; + } + ntw += buf_len; + + header.cluster_id = cluster_id; + header.table_id = tbl_id; + header.table_len = buf_len; + header.table_offset = offset; + + memcpy(vblk + ctw, &header, sizeof(header)); + ctw = ntw; + memset(&header, 0, sizeof(header)); + + offset += buf_len; + + if (blk_idx == next_blk_idx) + blk_idx = IXGBE_FW_DUMP_LAST_IDX; + else + blk_idx = next_blk_idx; + + if (blk_idx != IXGBE_FW_DUMP_LAST_IDX) + continue; + + blk_idx = 0; + offset = 0; + + if (next_cluster_id == IXGBE_FW_DUMP_LAST_ID2) + break; + + if (next_tbl_id != last_tbl_id) + tbl_id = next_tbl_id; + + /* End of cluster */ + if (cluster_id != next_cluster_id) { + if (read_all_clusters) { + dev_info(dev, "All FW clusters dump - cluster %d appended", + cluster_id); + cluster_id = next_cluster_id; + tbl_id = 0; + } else { + break; + } + } + } + + desc_blob->size = (unsigned long)ntw; + desc_blob->data = vblk; + + pfile = debugfs_create_blob(IXGBE_FW_DUMP_FILENAME, 0400, + adapter->ixgbe_dbg_adapter_fw_cluster, desc_blob); + if (!pfile) + return -ENODEV; + + adapter->ixgbe_cluster_blk = vblk; + + if (read_all_clusters) + dev_info(dev, "Created FW dump of all available clusters in file %s\n", + IXGBE_FW_DUMP_FILENAME); + else + dev_info(dev, "Created FW dump of cluster %d in file %s\n", + cluster_id, IXGBE_FW_DUMP_FILENAME); + + return 0; +} + +/** + * dump_cluster_id_read - show currently set FW cluster id to dump + * @file: kernel file struct + * @buf: user space buffer to fill with correct data + * @len: buf's length + * @offset: current position in buf + */ +static ssize_t dump_cluster_id_read(struct file *file, char __user *buf, + size_t len, loff_t *offset) +{ + struct ixgbe_adapter *adapter = file->private_data; + char tmp_buf[11]; + int ret; + + ret = snprintf(tmp_buf, sizeof(tmp_buf), "%u\n", + adapter->fw_dump_cluster_id); + + return simple_read_from_buffer(buf, len, offset, tmp_buf, ret); +} + +/** + * dump_cluster_id_write - set FW cluster id to dump + * @file: kernel file struct + * @buf: user space buffer containing data to read + * @len: buf's length + * @offset: current position in buf + */ +static ssize_t dump_cluster_id_write(struct file *file, const char __user *buf, + size_t len, loff_t *offset) +{ + struct ixgbe_adapter *adapter = file->private_data; + bool read_all_clusters = false; + char kbuf[11] = { 0 }; + int bytes_read, err; + u16 cluster_id; + + bytes_read = simple_write_to_buffer(kbuf, sizeof(kbuf), offset, buf, + len); + + if (bytes_read < 0) + return -EINVAL; + + if (bytes_read == 1 && kbuf[0] == '\n') { + cluster_id = 0; + read_all_clusters = true; + } else { + err = kstrtou16(kbuf, 10, &cluster_id); + if (err) + return err; + } + + debugfs_lookup_and_remove(IXGBE_FW_DUMP_FILENAME, adapter->ixgbe_dbg_adapter_fw_cluster); + err = ixgbe_debugfs_fw_dump(adapter, cluster_id, read_all_clusters); + if (err) + return err; + + /* Not all cluster IDs are supported in every FW version, save + * the value only when FW returned success + */ + adapter->fw_dump_cluster_id = cluster_id; + + return bytes_read; +} + +static const struct file_operations dump_cluster_id_fops = { + .owner = THIS_MODULE, + .open = simple_open, + .read = dump_cluster_id_read, + .write = dump_cluster_id_write, +}; + +/** + * ixgbe_debugfs_enable_read - read from 'enable' file + * @file: the opened file + * @buffer: where to write the data for the user to read + * @count: the size of the user's buffer + * @ppos: file position offset + */ +static ssize_t ixgbe_debugfs_enable_read(struct file *file, + char __user *buffer, size_t count, + loff_t *ppos) +{ + struct ixgbe_adapter *adapter = file->private_data; + struct ixgbe_hw *hw = &adapter->hw; + char buff[32] = {}; + int status; + + /* don't allow commands if the FW doesn't support it */ + if (!ixgbe_fwlog_supported(hw)) + return -EOPNOTSUPP; + + snprintf(buff, sizeof(buff), "%u\n", + (u16)(hw->fwlog_cfg.options & + IXGBE_FWLOG_OPTION_IS_REGISTERED) >> 3); + + status = simple_read_from_buffer(buffer, count, ppos, buff, + strlen(buff)); + + return status; +} + +/** + * ixgbe_debugfs_enable_write - write into 'enable' file + * @file: the opened file + * @buf: where to find the user's data + * @count: the length of the user's data + * @ppos: file position offset + */ +static ssize_t ixgbe_debugfs_enable_write(struct file *file, const char __user *buf, + size_t count, loff_t *ppos) +{ + struct ixgbe_adapter *adapter = file->private_data; + struct device *dev = ixgbe_pf_to_dev(adapter); + struct ixgbe_hw *hw = &adapter->hw; + ssize_t ret; + char **argv; + int argc; + + /* don't allow commands if the FW doesn't support it */ + if (!ixgbe_fwlog_supported(hw)) + return -EOPNOTSUPP; + + /* don't allow partial writes */ + if (*ppos != 0) + return 0; + + ret = ixgbe_debugfs_parse_cmd_line(buf, count, &argv, &argc); + if (ret) + goto err_copy_from_user; + + if (argc == 1) { + bool enable; + + ret = kstrtobool(argv[0], &enable); + if (ret) + goto enable_write_error; + + if (enable) + hw->fwlog_cfg.options |= IXGBE_FWLOG_OPTION_ARQ_ENA; + else + hw->fwlog_cfg.options &= ~IXGBE_FWLOG_OPTION_ARQ_ENA; + + ret = ixgbe_fwlog_set(hw, &hw->fwlog_cfg); + if (ret) + goto enable_write_error; + + if (enable) + ret = ixgbe_fwlog_register(hw); + else + ret = ixgbe_fwlog_unregister(hw); + + if (ret) + goto enable_write_error; + } else { + dev_info(dev, "unknown or invalid command '%s'\n", argv[0]); + ret = -EINVAL; + goto enable_write_error; + } + + /* if we get here, nothing went wrong; return bytes copied */ + ret = (ssize_t)count; + +enable_write_error: + argv_free(argv); +err_copy_from_user: + /* This function always consumes all of the written input, or produces + * an error. Check and enforce this. Otherwise, the write operation + * won't complete properly. + */ + if (WARN_ON(ret != (ssize_t)count && ret >= 0)) + ret = -EIO; + + return ret; +} + +static const struct file_operations ixgbe_debugfs_enable_fops = { + .owner = THIS_MODULE, + .open = simple_open, + .read = ixgbe_debugfs_enable_read, + .write = ixgbe_debugfs_enable_write, +}; + +/** + * ixgbe_debugfs_data_read - Read data from the 'data' debugfs file + * @file: The opened file + * @buffer: Buffer where the data is written for the user to read + * @count: Size of the user's buffer + * @ppos: File position offset + * + * This function reads firmware log data from the 'data' debugfs file for + * the ixgbe network adapter. It checks if the firmware supports logging and + * if there is data available in the log ring. The function copies available + * log data to the user's buffer, handling partial reads and errors + * gracefully. It updates the file position and returns the number of bytes + * copied. + * + * Return: Number of bytes read on success, or a negative error code if + * unsupported. + */ +static ssize_t ixgbe_debugfs_data_read(struct file *file, char __user *buffer, + size_t count, loff_t *ppos) +{ + struct ixgbe_adapter *adapter = file->private_data; + struct ixgbe_hw *hw = &adapter->hw; + int data_copied = 0; + bool done = false; + + /* don't allow commands if the FW doesn't support it */ + if (!ixgbe_fwlog_supported(hw)) + return -EOPNOTSUPP; + + if (ixgbe_fwlog_ring_empty(&hw->fwlog_ring)) + return 0; + + while (!ixgbe_fwlog_ring_empty(&hw->fwlog_ring) && !done) { + struct ixgbe_fwlog_data *log; + u16 cur_buf_len; + + log = &hw->fwlog_ring.rings[hw->fwlog_ring.head]; + cur_buf_len = log->data_size; + + if (cur_buf_len >= count) { + done = true; + continue; + } + + if (copy_to_user(buffer, log->data, cur_buf_len)) { + /* if there is an error then bail and return whatever + * the driver has copied so far + */ + done = true; + continue; + } + + data_copied += cur_buf_len; + buffer += cur_buf_len; + count -= cur_buf_len; + *ppos += cur_buf_len; + ixgbe_fwlog_ring_increment(&hw->fwlog_ring.head, + hw->fwlog_ring.size); + } + + return data_copied; +} + +/** + * ixgbe_debugfs_data_write - Write data to the 'data' debugfs file + * @file: The opened file + * @buf: Buffer containing the user's data + * @count: Length of the user's data + * @ppos: File position offset + * + * This function writes user-provided data to the 'data' debugfs file for + * the ixgbe network adapter. It processes commands related to firmware log + * management, such as clearing the log if the firmware log is not running. + * The function does not allow partial writes and returns an error if the + * command is invalid or unsupported. It ensures that all input is consumed + * or an error is returned. + * + * Return: Number of bytes written on success, or a negative error code on + * failure. + */ +static ssize_t ixgbe_debugfs_data_write(struct file *file, const char __user *buf, size_t count, + loff_t *ppos) +{ + struct ixgbe_adapter *adapter = file->private_data; + struct device *dev = ixgbe_pf_to_dev(adapter); + struct ixgbe_hw *hw = &adapter->hw; + ssize_t ret; + char **argv; + int argc; + + /* don't allow commands if the FW doesn't support it */ + if (!ixgbe_fwlog_supported(hw)) + return -EOPNOTSUPP; + + /* don't allow partial writes */ + if (*ppos != 0) + return 0; + + ret = ixgbe_debugfs_parse_cmd_line(buf, count, &argv, &argc); + if (ret) + goto err_copy_from_user; + + if (argc == 1) { + if (!(hw->fwlog_cfg.options & IXGBE_FWLOG_OPTION_IS_REGISTERED)) { + hw->fwlog_ring.head = 0; + hw->fwlog_ring.tail = 0; + } else { + dev_info(dev, "Can't clear FW log data while FW log running\n"); + ret = -EINVAL; + goto nr_buffs_write_error; + } + } else { + dev_info(dev, "unknown or invalid command '%s'\n", argv[0]); + ret = -EINVAL; + goto nr_buffs_write_error; + } + + /* if we get here, nothing went wrong; return bytes copied */ + ret = (ssize_t)count; + +nr_buffs_write_error: + argv_free(argv); +err_copy_from_user: + /* This function always consumes all of the written input, or produces + * an error. Check and enforce this. Otherwise, the write operation + * won't complete properly. + */ + if (WARN_ON(ret != (ssize_t)count && ret >= 0)) + ret = -EIO; + + return ret; +} + +static const struct file_operations ixgbe_debugfs_data_fops = { + .owner = THIS_MODULE, + .open = simple_open, + .read = ixgbe_debugfs_data_read, + .write = ixgbe_debugfs_data_write, +}; + +/** + * ixgbe_debugfs_nr_buffs_read - Read from the 'nr_buffs' debugfs file + * @file: The opened file + * @buffer: Buffer where the data is written for the user to read + * @count: Size of the user's buffer + * @ppos: File position offset + * + * This function reads the number of buffers from the 'nr_buffs' debugfs + * file for the ixgbe network adapter. It checks if the firmware supports + * logging and formats the buffer size into a string for the user to read. + * The function returns an error if the firmware does not support logging. + * + * Return: Number of bytes read on success, or a negative error code if + * unsupported. + */ +static ssize_t ixgbe_debugfs_nr_buffs_read(struct file *file, + char __user *buffer, size_t count, + loff_t *ppos) +{ + struct ixgbe_adapter *adapter = file->private_data; + struct ixgbe_hw *hw = &adapter->hw; + char buff[32] = {}; + int status; + + /* don't allow commands if the FW doesn't support it */ + if (!ixgbe_fwlog_supported(hw)) + return -EOPNOTSUPP; + + snprintf(buff, sizeof(buff), "%d\n", hw->fwlog_ring.size); + + status = simple_read_from_buffer(buffer, count, ppos, buff, + strlen(buff)); + + return status; +} + +/** + * ixgbe_debugfs_nr_buffs_write - Write data to the 'nr_buffs' debugfs file + * @file: The opened file + * @buf: Buffer containing the user's data + * @count: Length of the user's data + * @ppos: File position offset + * + * This function writes user-provided data to the 'nr_buffs' debugfs file for + * the ixgbe network adapter. It processes commands to set the number of + * buffers for firmware logging, ensuring the value is within bounds and a + * power of two. The function does not allow partial writes and returns an + * error if the command is invalid or if firmware logging is active. It + * ensures that all input is consumed or an error is returned. + * + * Return: Number of bytes written on success, or a negative error code on + * failure. + */ +static ssize_t ixgbe_debugfs_nr_buffs_write(struct file *file, const char __user *buf, + size_t count, loff_t *ppos) +{ + struct ixgbe_adapter *adapter = file->private_data; + struct device *dev = ixgbe_pf_to_dev(adapter); + struct ixgbe_hw *hw = &adapter->hw; + ssize_t ret; + char **argv; + int argc; + + /* don't allow commands if the FW doesn't support it */ + if (!ixgbe_fwlog_supported(hw)) + return -EOPNOTSUPP; + + /* don't allow partial writes */ + if (*ppos != 0) + return 0; + + ret = ixgbe_debugfs_parse_cmd_line(buf, count, &argv, &argc); + if (ret) + goto err_copy_from_user; + + if (argc == 1) { + s16 nr_buffs; + + ret = kstrtos16(argv[0], 0, &nr_buffs); + if (ret) + goto nr_buffs_write_error; + + if (nr_buffs <= 0 || nr_buffs > IXGBE_FWLOG_RING_SIZE_MAX) { + dev_info(dev, "nr_buffs '%d' is not within bounds. Please use a value between 1 and %d\n", + nr_buffs, IXGBE_FWLOG_RING_SIZE_MAX); + ret = -EINVAL; + goto nr_buffs_write_error; + } else if (hweight16(nr_buffs) > 1) { + dev_info(dev, "nr_buffs '%d' is not a power of 2. Please use a value that is a power of 2.\n", + nr_buffs); + ret = -EINVAL; + goto nr_buffs_write_error; + } else if (hw->fwlog_cfg.options & + IXGBE_FWLOG_OPTION_IS_REGISTERED) { + dev_info(dev, "FW logging is currently running. Please disable FW logging to change nr_buffs\n"); + ret = -EINVAL; + goto nr_buffs_write_error; + } + + /* free all the buffers and the tracking info and resize */ + ixgbe_fwlog_realloc_rings(hw, nr_buffs); + } else { + dev_info(dev, "unknown or invalid command '%s'\n", argv[0]); + ret = -EINVAL; + goto nr_buffs_write_error; + } + + /* if we get here, nothing went wrong; return bytes copied */ + ret = (ssize_t)count; + +nr_buffs_write_error: + argv_free(argv); +err_copy_from_user: + /* This function always consumes all of the written input, or produces + * an error. Check and enforce this. Otherwise, the write operation + * won't complete properly. + */ + if (WARN_ON(ret != (ssize_t)count && ret >= 0)) + ret = -EIO; + + return ret; +} + +static const struct file_operations ixgbe_debugfs_nr_buffs_fops = { + .owner = THIS_MODULE, + .open = simple_open, + .read = ixgbe_debugfs_nr_buffs_read, + .write = ixgbe_debugfs_nr_buffs_write, +}; + +/** + * ixgbe_debugfs_module_read - Read from the 'module' debugfs file + * @file: The opened file + * @buffer: Buffer where the data is written for the user to read + * @count: Size of the user's buffer + * @ppos: File position offset + * + * This function reads firmware module configuration data from the 'module' + * debugfs file for the ixgbe network adapter. It checks if the firmware + * supports logging and allocates memory to store the configuration data. + * The function writes the data to the user's buffer and returns an error if + * the buffer is too small or if memory allocation fails. + * + * Return: Number of bytes read on success, or a negative error code on + * failure. + */ +static ssize_t ixgbe_debugfs_module_read(struct file *file, char __user *buffer, + size_t count, loff_t *ppos) +{ + struct ixgbe_adapter *adapter = file->private_data; + struct device *dev = ixgbe_pf_to_dev(adapter); + struct ixgbe_hw *hw = &adapter->hw; + char *data = NULL; + int status; + + /* don't allow commands if the FW doesn't support it */ + if (!ixgbe_fwlog_supported(hw)) + return -EOPNOTSUPP; + + data = vzalloc(PAGE_SIZE); + if (!data) { + dev_warn(dev, "Unable to allocate memory for FW configuration!\n"); + return -ENOMEM; + } + + ixgbe_fwlog_dump_cfg(hw, data, PAGE_SIZE); + + if (count < strlen(data)) + return -ENOSPC; + + status = simple_read_from_buffer(buffer, count, ppos, data, + strlen(data)); + vfree(data); + + return status; +} + +/** + * ixgbe_debugfs_module_write - Write data to the 'module' debugfs file + * @file: The opened file + * @buf: Buffer containing the user's data + * @count: Length of the user's data + * @ppos: File position offset + * + * This function writes user-provided data to the 'module' debugfs file for + * the ixgbe network adapter. It processes commands to set the log level for + * specific firmware modules, ensuring the module and log level are valid. + * The function does not allow partial writes and returns an error if the + * command is invalid or unsupported. It ensures that all input is consumed + * or an error is returned. + * + * Return: Number of bytes written on success, or a negative error code on + * failure. + */ +static ssize_t ixgbe_debugfs_module_write(struct file *file, const char __user *buf, + size_t count, loff_t *ppos) +{ + struct ixgbe_adapter *adapter = file->private_data; + struct device *dev = ixgbe_pf_to_dev(adapter); + struct ixgbe_hw *hw = &adapter->hw; + ssize_t ret; + char **argv; + int argc; + + /* don't allow commands if the FW doesn't support it */ + if (!ixgbe_fwlog_supported(hw)) + return -EOPNOTSUPP; + + /* don't allow partial writes */ + if (*ppos != 0) + return 0; + + ret = ixgbe_debugfs_parse_cmd_line(buf, count, &argv, &argc); + if (ret) + goto err_copy_from_user; + + if (argc == 2) { + int module, log_level; + + module = sysfs_match_string(ixgbe_fwlog_module_string, argv[0]); + if (module < 0) { + dev_info(dev, "unknown module '%s'\n", argv[0]); + ret = -EINVAL; + goto module_write_error; + } + + /* TODO: remove this hack when SyncE gets turned on always */ + if (module == IXGBE_ACI_FW_LOG_ID_SYNCE) { + ret = -EINVAL; + goto module_write_error; + } + + log_level = sysfs_match_string(ixgbe_fwlog_level_string, argv[1]); + if (log_level < 0) { + dev_info(dev, "unknown log level '%s'\n", argv[1]); + ret = -EINVAL; + goto module_write_error; + } + + /* module is valid because it was range checked using + * sysfs_match_string() + */ + if (module != IXGBE_ACI_FW_LOG_ID_MAX) { + ixgbe_pf_fwlog_update_modules(adapter, log_level, 1 << module); + } else { + /* the module 'ALL' is a shortcut so that we can set + * all of the modules to the same level quickly + */ + int i; + + for (i = 0; i < IXGBE_ACI_FW_LOG_ID_MAX; i++) + ixgbe_pf_fwlog_update_modules(adapter, log_level, 1 << i); + } + } else { + dev_info(dev, "unknown or invalid command '%s'\n", argv[0]); + ret = -EINVAL; + goto module_write_error; + } + + /* if we get here, nothing went wrong; return bytes copied */ + ret = (ssize_t)count; + +module_write_error: + argv_free(argv); +err_copy_from_user: + /* This function always consumes all of the written input, or produces + * an error. Check and enforce this. Otherwise, the write operation + * won't complete properly. + */ + if (WARN_ON(ret != (ssize_t)count && ret >= 0)) + ret = -EIO; + + return ret; +} + +static const struct file_operations ixgbe_dbg_module_fops = { + .owner = THIS_MODULE, + .open = simple_open, + .read = ixgbe_debugfs_module_read, + .write = ixgbe_debugfs_module_write, +}; + +/** + * ixgbe_debugfs_resolution_read - Read from the 'resolution' debugfs file + * @file: The opened file + * @buffer: Buffer where the data is written for the user to read + * @count: Size of the user's buffer + * @ppos: File position offset + * + * This function reads the log resolution from the 'resolution' debugfs file + * for the ixgbe network adapter. It checks if the firmware supports logging + * and formats the log resolution into a string for the user to read. The + * function returns an error if the firmware does not support logging. + * + * Return: Number of bytes read on success, or a negative error code if + * unsupported. + */ +static ssize_t ixgbe_debugfs_resolution_read(struct file *file, + char __user *buffer, size_t count, + loff_t *ppos) +{ + struct ixgbe_adapter *adapter = file->private_data; + struct ixgbe_hw *hw = &adapter->hw; + char buff[32] = {}; + int status; + + /* don't allow commands if the FW doesn't support it */ + if (!ixgbe_fwlog_supported(hw)) + return -EOPNOTSUPP; + + snprintf(buff, sizeof(buff), "%d\n", + hw->fwlog_cfg.log_resolution); + + status = simple_read_from_buffer(buffer, count, ppos, buff, + strlen(buff)); + + return status; +} + +/** + * ixgbe_debugfs_resolution_write - Write data to the 'resolution' debugfs file + * @file: The opened file + * @buf: Buffer containing the user's data + * @count: Length of the user's data + * @ppos: File position offset + * + * This function writes user-provided data to the 'resolution' debugfs file + * for the ixgbe network adapter. It processes commands to set the firmware + * log resolution, ensuring the value is within valid bounds. The function + * does not allow partial writes and returns an error if the command is + * invalid or unsupported. It ensures that all input is consumed or an error + * is returned. + * + * Return: Number of bytes written on success, or a negative error code on + * failure. + */ +static ssize_t +ixgbe_debugfs_resolution_write(struct file *file, const char __user *buf, + size_t count, loff_t *ppos) +{ + struct ixgbe_adapter *adapter = file->private_data; + struct device *dev = ixgbe_pf_to_dev(adapter); + struct ixgbe_hw *hw = &adapter->hw; + ssize_t ret; + char **argv; + int argc; + + /* don't allow commands if the FW doesn't support it */ + if (!ixgbe_fwlog_supported(hw)) + return -EOPNOTSUPP; + + /* don't allow partial writes */ + if (*ppos != 0) + return 0; + + ret = ixgbe_debugfs_parse_cmd_line(buf, count, &argv, &argc); + if (ret) + goto err_copy_from_user; + + if (argc == 1) { + s16 resolution; + + ret = kstrtos16(argv[0], 0, &resolution); + if (ret) + goto resolution_write_error; + + if (resolution < IXGBE_ACI_FW_LOG_MIN_RESOLUTION || + resolution > IXGBE_ACI_FW_LOG_MAX_RESOLUTION) { + dev_err(dev, "Invalid FW log resolution %d, value must be between %d - %d\n", + resolution, IXGBE_ACI_FW_LOG_MIN_RESOLUTION, + IXGBE_ACI_FW_LOG_MAX_RESOLUTION); + ret = -EINVAL; + goto resolution_write_error; + } + + hw->fwlog_cfg.log_resolution = resolution; + } else { + dev_info(dev, "unknown or invalid command '%s'\n", argv[0]); + ret = -EINVAL; + goto resolution_write_error; + } + + /* if we get here, nothing went wrong; return bytes copied */ + ret = (ssize_t)count; + +resolution_write_error: + argv_free(argv); +err_copy_from_user: + /* This function always consumes all of the written input, or produces + * an error. Check and enforce this. Otherwise, the write operation + * won't complete properly. + */ + if (WARN_ON(ret != (ssize_t)count && ret >= 0)) + ret = -EIO; + + return ret; +} + +static const struct file_operations ixgbe_dbg_resolution_fops = { + .owner = THIS_MODULE, + .open = simple_open, + .read = ixgbe_debugfs_resolution_read, + .write = ixgbe_debugfs_resolution_write, +}; + +/** + * ixgbe_dbg_adapter_init - Set up the debugfs directory for the adapter + * @adapter: The adapter that is starting up + * + * This function initializes the debugfs directory structure for the given + * ixgbe network adapter. It creates various debugfs entries for monitoring + * and controlling the adapter, including firmware logs, module settings, + * and register operations. The function handles errors in creating these + * entries and cleans up if any creation fails. + */ +void ixgbe_dbg_adapter_init(struct ixgbe_adapter *adapter) +{ + const char *name = pci_name(adapter->pdev); + + adapter->ixgbe_dbg_adapter_pf = debugfs_create_dir(name, ixgbe_dbg_root); + if (!adapter->ixgbe_dbg_adapter_pf) { + e_dev_err("debugfs pf entry for %s failed\n", name); + return; + } + + if (ixgbe_is_mac_E6xx(adapter->hw.mac.type)) { + adapter->ixgbe_dbg_adapter_fw = + debugfs_create_dir("fwlog", adapter->ixgbe_dbg_adapter_pf); + if (!adapter->ixgbe_dbg_adapter_fw) { + e_dev_err("debugfs fwlog entry for %s failed\n", name); + return; + } + + adapter->ixgbe_dbg_adapter_fw_cluster = + debugfs_create_dir("fw", adapter->ixgbe_dbg_adapter_pf); + if (!adapter->ixgbe_dbg_adapter_fw_cluster) { + e_dev_err("debugfs fw entry for %s failed\n", name); + return; + } + + if (!debugfs_create_file("dump_cluster_id", 0600, + adapter->ixgbe_dbg_adapter_fw_cluster, + adapter, + &dump_cluster_id_fops)) { + e_dev_err("debugfs dump_cluster_id for %s failed\n", name); + goto create_failed; + } + + if (!debugfs_create_file("enable", 0600, + adapter->ixgbe_dbg_adapter_fw, + adapter, + &ixgbe_debugfs_enable_fops)) { + e_dev_err("debugfs enable for %s failed\n", name); + goto create_failed; + } + + if (!debugfs_create_file("data", 0600, + adapter->ixgbe_dbg_adapter_fw, + adapter, + &ixgbe_debugfs_data_fops)) { + e_dev_err("debugfs data for %s failed\n", name); + goto create_failed; + } + + if (!debugfs_create_file("modules", 0600, + adapter->ixgbe_dbg_adapter_fw, + adapter, + &ixgbe_dbg_module_fops)) { + e_dev_err("debugfs modules for %s failed\n", name); + goto create_failed; + } + + if (!debugfs_create_file("resolution", 0600, + adapter->ixgbe_dbg_adapter_fw, + adapter, + &ixgbe_dbg_resolution_fops)) { + e_dev_err("debugfs resolution for %s failed\n", name); + goto create_failed; + } + + if (!debugfs_create_file("nr_buffs", 0600, + adapter->ixgbe_dbg_adapter_fw, + adapter, + &ixgbe_debugfs_nr_buffs_fops)) { + e_dev_err("debugfs nr_buffs for %s failed\n", name); + goto create_failed; + } + } + + if (!debugfs_create_file("reg", 0600, + adapter->ixgbe_dbg_adapter_pf, + adapter, + &ixgbe_dbg_reg_ops_fops)) { + e_dev_err("debugfs reg for %s failed\n", name); + goto create_failed; + } + + if (!debugfs_create_file("netdev", 0600, + adapter->ixgbe_dbg_adapter_pf, + adapter, + &ixgbe_dbg_netdev_ops_fops)) { + e_dev_err("debugfs netdev for %s failed\n", name); + goto create_failed; + } + + return; + +create_failed: + debugfs_remove_recursive(adapter->ixgbe_dbg_adapter_pf); + adapter->ixgbe_dbg_adapter_pf = NULL; +} + +/** + * ixgbe_dbg_adapter_exit - Clear the adapter's debugfs entries + * @adapter: Board private structure + * + * This function removes the debugfs entries associated with the given ixgbe + * network adapter. It recursively deletes the debugfs directory and frees + * any allocated memory for cluster blocks. This ensures that all debugfs + * resources are properly cleaned up when the adapter is being shut down or + * removed. + */ +void ixgbe_dbg_adapter_exit(struct ixgbe_adapter *adapter) +{ + if (adapter->ixgbe_dbg_adapter_pf) + debugfs_remove_recursive(adapter->ixgbe_dbg_adapter_pf); + adapter->ixgbe_dbg_adapter_pf = NULL; + + vfree(adapter->ixgbe_cluster_blk); + adapter->ixgbe_cluster_blk = NULL; +} + +/** + * ixgbe_dbg_init - Create root directory for debugfs entries + * + * This function initializes the root directory for debugfs entries related + * to the ixgbe network driver. It creates a directory named after the + * driver, which serves as the root for all subsequent debugfs entries. If + * the directory creation fails, an error message is logged. + */ +void ixgbe_dbg_init(void) +{ + ixgbe_dbg_root = debugfs_create_dir(ixgbe_driver_name, NULL); + if (ixgbe_dbg_root == NULL) + pr_err("init of debugfs failed\n"); +} + +/** + * ixgbe_dbg_exit - Clean out the driver's debugfs entries + * + * This function removes the root directory and all associated debugfs + * entries for the ixgbe network driver. It ensures that all debugfs + * resources are properly cleaned up when the driver is being unloaded or + * shut down. + */ +void ixgbe_dbg_exit(void) +{ + debugfs_remove_recursive(ixgbe_dbg_root); +} + +#endif /* HAVE_IXGBE_DEBUG_FS */ diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_devlink.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_devlink.c new file mode 100644 index 00000000000..32ec84d44ab --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_devlink.c @@ -0,0 +1,1534 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 1999 - 2026 Intel Corporation */ + +#include "ixgbe.h" +#include "ixgbe_devlink.h" +#include "ixgbe_fw_update.h" + +#if IS_ENABLED(CONFIG_NET_DEVLINK) + +#ifdef HAVE_DEVLINK_INFO_GET + +/* context for devlink info version reporting */ +struct ixgbe_info_ctx { + char buf[128]; + struct ixgbe_orom_info pending_orom; + struct ixgbe_nvm_info pending_nvm; + struct ixgbe_netlist_info pending_netlist; + struct ixgbe_hw_dev_caps dev_caps; +}; + +/* The following functions are used to format specific strings for various + * devlink info versions. The ctx parameter is used to provide the storage + * buffer, as well as any ancillary information calculated when the info + * request was made. + * + * If a version does not exist, for example when attempting to get the + * inactive version of flash when there is no pending update, the function + * should leave the buffer in the ctx structure empty. + */ + +/** + * ixgbe_info_get_dsn - get Device-Serial-Number + * @adapter: adapter instance + * @ctx: context providing buffer and additional information for the request + * + * Format DSN string and put it into the context buffer + * in the Big Endian format. + */ +static void ixgbe_info_get_dsn(struct ixgbe_adapter *adapter, + struct ixgbe_info_ctx *ctx) +{ + u8 dsn[8]; + + /* Copy the DSN into an array in Big Endian format */ + put_unaligned_be64(pci_get_dsn(adapter->pdev), dsn); + + snprintf(ctx->buf, sizeof(ctx->buf), "%8phD", dsn); +} + +/** + * ixgbe_info_pba - get Product Board Assemby + * @adapter: adapter instance + * @ctx: context providing buffer and additional information for the request + * + * Format PBA string and put it into the context buffer + * in the Big Endian format. + */ +static void ixgbe_info_pba(struct ixgbe_adapter *adapter, + struct ixgbe_info_ctx *ctx) +{ + struct ixgbe_hw *hw = &adapter->hw; + u32 status; + + status = ixgbe_read_pba_string(hw, (u8 *)ctx->buf, sizeof(ctx->buf)); + if (status) + /* We failed to locate the PBA, so just skip this entry */ + dev_dbg(ixgbe_pf_to_dev(adapter), + "Failed to read Product Board Assembly string, status %d\n", + status); +} + +/** + * ixgbe_info_fw_mgmt - get Firmware version + * @adapter: adapter instance + * @ctx: context providing buffer and additional information for the request + * + * Format Firmware major, minor and patch versions string + * and put it into the context buffer. + */ +static void ixgbe_info_fw_mgmt(struct ixgbe_adapter *adapter, + struct ixgbe_info_ctx *ctx) +{ + struct ixgbe_hw *hw = &adapter->hw; + + snprintf(ctx->buf, sizeof(ctx->buf), "%u.%u.%u", + hw->fw_maj_ver, hw->fw_min_ver, hw->fw_patch); +} + +/** + * ixgbe_info_fw_api - get Firmware API version + * @adapter: adapter instance + * @ctx: context providing buffer and additional information for the request + * + * Format Firmware API major, minor and patch versions string + * and put it into the context buffer. + */ +static void ixgbe_info_fw_api(struct ixgbe_adapter *adapter, + struct ixgbe_info_ctx *ctx) +{ + struct ixgbe_hw *hw = &adapter->hw; + + snprintf(ctx->buf, sizeof(ctx->buf), "%u.%u.%u", + hw->api_maj_ver, hw->api_min_ver, hw->api_patch); +} + +/** + * ixgbe_info_fw_build - get Firmware build + * @adapter: adapter instance + * @ctx: context providing buffer and additional information for the request + * + * Format Firmware build string and put it into + * the context buffer. + */ +static void ixgbe_info_fw_build(struct ixgbe_adapter *adapter, + struct ixgbe_info_ctx *ctx) +{ + struct ixgbe_hw *hw = &adapter->hw; + + snprintf(ctx->buf, sizeof(ctx->buf), "0x%08x", hw->fw_build); +} + +/** + * ixgbe_info_fw_srev - get Firmware Serial Revision + * @adapter: adapter instance + * @ctx: context providing buffer and additional information for the request + * + * Format Firmware serial revision string and put it + * into the context buffer. + */ +static void ixgbe_info_fw_srev(struct ixgbe_adapter *adapter, + struct ixgbe_info_ctx *ctx) +{ + struct ixgbe_nvm_info *nvm = &adapter->hw.flash.nvm; + + snprintf(ctx->buf, sizeof(ctx->buf), "%u", nvm->srev); +} + +/** + * ixgbe_info_pending_fw_srev - get pending Firmware Serial Revision + * @adapter: adapter instance + * @ctx: context providing buffer and additional information for the request + * + * Format Firmware serial revision string and + * put it into the context buffer if there is a pending update. + */ +static void ixgbe_info_pending_fw_srev(struct ixgbe_adapter *adapter, + struct ixgbe_info_ctx *ctx) +{ + struct ixgbe_nvm_info *nvm = &ctx->pending_nvm; + + if (ctx->dev_caps.common_cap.nvm_update_pending_nvm) + snprintf(ctx->buf, sizeof(ctx->buf), "%u", nvm->srev); +} + +/** + * ixgbe_info_orom_ver - get OROM version + * @adapter: adapter instance + * @ctx: context providing buffer and additional information for the request + * + * Format OROM major version, build and patch string and + * put it into the context buffer. + */ +static void ixgbe_info_orom_ver(struct ixgbe_adapter *adapter, + struct ixgbe_info_ctx *ctx) +{ + struct ixgbe_orom_info *orom = &adapter->hw.flash.orom; + + snprintf(ctx->buf, sizeof(ctx->buf), "%u.%u.%u", + orom->major, orom->build, orom->patch); +} + +/** + * ixgbe_info_pending_orom_ver - get pending OROM version + * @adapter: adapter instance + * @ctx: context providing buffer and additional information for the request + * + * Format OROM major version, build and patch string and + * put it into the context buffer if there is a pending update. + */ +static void ixgbe_info_pending_orom_ver(struct ixgbe_adapter *adapter, + struct ixgbe_info_ctx *ctx) +{ + struct ixgbe_orom_info *orom = &ctx->pending_orom; + + if (ctx->dev_caps.common_cap.nvm_update_pending_orom) + snprintf(ctx->buf, sizeof(ctx->buf), "%u.%u.%u", + orom->major, orom->build, orom->patch); +} + +/** + * ixgbe_info_orom_srev - get OROM Serial Revision + * @adapter: adapter instance + * @ctx: context providing buffer and additional information for the request + * + * Format OROM string and put it into the context buffer. + */ +static void ixgbe_info_orom_srev(struct ixgbe_adapter *adapter, + struct ixgbe_info_ctx *ctx) +{ + struct ixgbe_orom_info *orom = &adapter->hw.flash.orom; + + snprintf(ctx->buf, sizeof(ctx->buf), "%u", orom->srev); +} + +/** + * ixgbe_info_pending_orom_srev - get pending OROM Serial Revision + * @adapter: adapter instance + * @ctx: context providing buffer and additional information for the request + * + * Format OROM serial revision string and put + * it into the context buffer if there is a pending update. + */ +static void ixgbe_info_pending_orom_srev(struct ixgbe_adapter *adapter, + struct ixgbe_info_ctx *ctx) +{ + struct ixgbe_orom_info *orom = &ctx->pending_orom; + + if (ctx->dev_caps.common_cap.nvm_update_pending_orom) + snprintf(ctx->buf, sizeof(ctx->buf), "%u", orom->srev); +} + +/** + * ixgbe_info_nvm_ver - get NVM version + * @adapter: adapter instance + * @ctx: context providing buffer and additional information for the request + * + * Format NVM major and minor versions string and put + * it into the context buffer. + */ +static void ixgbe_info_nvm_ver(struct ixgbe_adapter *adapter, + struct ixgbe_info_ctx *ctx) +{ + struct ixgbe_nvm_info *nvm = &adapter->hw.flash.nvm; + + snprintf(ctx->buf, sizeof(ctx->buf), "%x.%02x", nvm->major, nvm->minor); +} + +/** + * ixgbe_info_pending_nvm_ver - get pending NVM version + * @adapter: adapter instance + * @ctx: context providing buffer and additional information for the request + * + * Format NVM major and minor versions string and put + * it into the context buffer if there is a pending update. + */ +static void ixgbe_info_pending_nvm_ver(struct ixgbe_adapter *adapter, + struct ixgbe_info_ctx *ctx) +{ + struct ixgbe_nvm_info *nvm = &ctx->pending_nvm; + + if (ctx->dev_caps.common_cap.nvm_update_pending_nvm) + snprintf(ctx->buf, sizeof(ctx->buf), "%x.%02x", + nvm->major, nvm->minor); +} + +/** + * ixgbe_info_eetrack - get NVM EEtrack ID + * @adapter: adapter instance + * @ctx: context providing buffer and additional information for the request + * + * Format NVM EEtrack ID string and put + * it into the context buffer. + */ +static void ixgbe_info_eetrack(struct ixgbe_adapter *adapter, + struct ixgbe_info_ctx *ctx) +{ + struct ixgbe_nvm_info *nvm = &adapter->hw.flash.nvm; + + snprintf(ctx->buf, sizeof(ctx->buf), "0x%08x", nvm->eetrack); +} + +/** + * ixgbe_info_pending_eetrack - get pending NVM EEtrack ID + * @adapter: adapter instance + * @ctx: context providing buffer and additional information for the request + * + * Format NVM EEtrack ID and put it into + * the context buffer if there is a pending update. + */ +static void ixgbe_info_pending_eetrack(struct ixgbe_adapter *adapter, + struct ixgbe_info_ctx *ctx) +{ + struct ixgbe_nvm_info *nvm = &ctx->pending_nvm; + + if (ctx->dev_caps.common_cap.nvm_update_pending_nvm) + snprintf(ctx->buf, sizeof(ctx->buf), "0x%08x", nvm->eetrack); +} + +/** + * ixgbe_info_netlist_ver - get Netlist version + * @adapter: adapter instance + * @ctx: context providing buffer and additional information for the request + * + * Format Netlist major version, minor version, + * type, revision and customer version string and put it + * into the context buffer. + */ +static void ixgbe_info_netlist_ver(struct ixgbe_adapter *adapter, + struct ixgbe_info_ctx *ctx) +{ + struct ixgbe_netlist_info *netlist = &adapter->hw.flash.netlist; + + /* The netlist version fields are BCD formatted */ + snprintf(ctx->buf, sizeof(ctx->buf), "%x.%x.%x-%x.%x.%x", + netlist->major, netlist->minor, + netlist->type >> 16, netlist->type & 0xFFFF, + netlist->rev, netlist->cust_ver); +} + +/** + * ixgbe_info_netlist_build - get Netlist build + * @adapter: adapter instance + * @ctx: context providing buffer and additional information for the request + * + * Format Netlist hash (build) and puts it into the context buffer. + */ +static void ixgbe_info_netlist_build(struct ixgbe_adapter *adapter, + struct ixgbe_info_ctx *ctx) +{ + struct ixgbe_netlist_info *netlist = &adapter->hw.flash.netlist; + + snprintf(ctx->buf, sizeof(ctx->buf), "0x%08x", netlist->hash); +} + +/** + * ixgbe_info_pending_netlist_ver - get pending Netlist version + * @adapter: adapter instance + * @ctx: context providing buffer and additional information for the request + * + * Format Netlist major version, minor version, + * type, revision and customer version string and put it + * into the context buffer if there is a pending update. + */ +static void ixgbe_info_pending_netlist_ver(struct ixgbe_adapter *adapter, + struct ixgbe_info_ctx *ctx) +{ + struct ixgbe_netlist_info *netlist = &adapter->hw.flash.netlist; + + /* The netlist version fields are BCD formatted */ + if (ctx->dev_caps.common_cap.nvm_update_pending_netlist) + snprintf(ctx->buf, sizeof(ctx->buf), "%x.%x.%x-%x.%x.%x", + netlist->major, netlist->minor, + netlist->type >> 16, netlist->type & 0xFFFF, + netlist->rev, netlist->cust_ver); +} + +/** + * ixgbe_info_pending_netlist_build - get Netlist build + * @adapter: adapter instance + * @ctx: context providing buffer and additional information for the request + * + * Format Netlist hash (build) and put it into the context buffer + * if there is a pending update. + */ +static void ixgbe_info_pending_netlist_build(struct ixgbe_adapter *adapter, + struct ixgbe_info_ctx *ctx) +{ + struct ixgbe_netlist_info *netlist = &ctx->pending_netlist; + + if (ctx->dev_caps.common_cap.nvm_update_pending_netlist) + snprintf(ctx->buf, sizeof(ctx->buf), "0x%08x", netlist->hash); +} + +#define fixed(key, getter) { IXGBE_VERSION_FIXED, key, getter, NULL } +#define running(key, getter) { IXGBE_VERSION_RUNNING, key, getter, NULL } +#define stored(key, getter, fallback) \ + { IXGBE_VERSION_STORED, key, getter, fallback } + +enum ixgbe_version_type { + IXGBE_VERSION_FIXED, + IXGBE_VERSION_RUNNING, + IXGBE_VERSION_STORED, +}; + +static const struct ixgbe_devlink_version { + enum ixgbe_version_type type; + const char *key; + void (*getter)(struct ixgbe_adapter *adapter, + struct ixgbe_info_ctx *ctx); + void (*fallback)(struct ixgbe_adapter *adapter, + struct ixgbe_info_ctx *ctx); +} ixgbe_devlink_versions[] = { + fixed(DEVLINK_INFO_VERSION_GENERIC_BOARD_ID, + ixgbe_info_pba), + running(DEVLINK_INFO_VERSION_GENERIC_FW_MGMT, + ixgbe_info_fw_mgmt), + running("fw.mgmt.api", + ixgbe_info_fw_api), + running("fw.mgmt.build", + ixgbe_info_fw_build), + + running("fw.mgmt.srev", ixgbe_info_fw_srev), + stored("fw.mgmt.srev", + ixgbe_info_pending_fw_srev, ixgbe_info_fw_srev), + running(DEVLINK_INFO_VERSION_GENERIC_FW_UNDI, ixgbe_info_orom_ver), + stored(DEVLINK_INFO_VERSION_GENERIC_FW_UNDI, + ixgbe_info_pending_orom_ver, ixgbe_info_orom_ver), + running("fw.undi.srev", ixgbe_info_orom_srev), + stored("fw.undi.srev", + ixgbe_info_pending_orom_srev, ixgbe_info_orom_srev), + running("fw.psid.api", ixgbe_info_nvm_ver), + stored("fw.psid.api", + ixgbe_info_pending_nvm_ver, ixgbe_info_nvm_ver), + running(DEVLINK_INFO_VERSION_GENERIC_FW_BUNDLE_ID, ixgbe_info_eetrack), + stored(DEVLINK_INFO_VERSION_GENERIC_FW_BUNDLE_ID, + ixgbe_info_pending_eetrack, ixgbe_info_eetrack), + running("fw.netlist", ixgbe_info_netlist_ver), + stored("fw.netlist", + ixgbe_info_pending_netlist_ver, ixgbe_info_netlist_ver), + running("fw.netlist.build", ixgbe_info_netlist_build), + stored("fw.netlist.build", + ixgbe_info_pending_netlist_build, ixgbe_info_netlist_build), +}; + +/** + * ixgbe_devlink_info_get - Devlink handler for retrieving device info + * @devlink: Devlink instance structure + * @req: The devlink info request + * @extack: Extended netdev ack structure + * + * This function serves as a callback for the devlink .info_get operation, + * providing detailed information about the ixgbe network adapter. It + * discovers device capabilities, retrieves version information, and reports + * it through the devlink interface. The function handles errors in + * retrieving data and sets appropriate error messages in the extack + * structure. + * + * Return: 0 on success, or an error code on failure. + */ +static int ixgbe_devlink_info_get(struct devlink *devlink, + struct devlink_info_req *req, + struct netlink_ext_ack *extack) +{ + struct ixgbe_adapter *adapter; + struct ixgbe_info_ctx *ctx; + struct ixgbe_hw *hw; + struct device *dev; + s32 status; + size_t i; + int err; + + adapter = *(struct ixgbe_adapter **)devlink_priv(devlink); + dev = ixgbe_pf_to_dev(adapter); + hw = &adapter->hw; + + ctx = kzalloc(sizeof(*ctx), GFP_KERNEL); + if (!ctx) + return -ENOMEM; + + /* discover capabilities first */ + status = ixgbe_discover_dev_caps(hw, &ctx->dev_caps); + if (status) { + dev_dbg(dev, + "Failed to discover device capabilities, status %d aq_err %d\n", + status, hw->aci.last_status); + NL_SET_ERR_MSG_MOD(extack, + "Unable to discover device capabilities"); + err = -EIO; + goto out_free_ctx; + } + if (ctx->dev_caps.common_cap.nvm_update_pending_orom) { + status = ixgbe_get_inactive_orom_ver(hw, &ctx->pending_orom); + if (status) { + dev_dbg(dev, + "Unable to read inactive Option ROM version data, status %d aq_err %d\n", + status, hw->aci.last_status); + + /* disable display of pending Option ROM */ + ctx->dev_caps.common_cap.nvm_update_pending_orom = + false; + } + } + + if (ctx->dev_caps.common_cap.nvm_update_pending_nvm) { + status = ixgbe_get_inactive_nvm_ver(hw, &ctx->pending_nvm); + if (status) { + dev_dbg(dev, + "Unable to read inactive NVM version data, status %d aq_err %d\n", + status, hw->aci.last_status); + + /* disable display of pending Option ROM */ + ctx->dev_caps.common_cap.nvm_update_pending_nvm = false; + } + } + + if (ctx->dev_caps.common_cap.nvm_update_pending_netlist) { + status = ixgbe_get_inactive_netlist_ver(hw, + &ctx->pending_netlist); + if (status) { + dev_dbg(dev, + "Unable to read inactive Netlist version data, status %d aq_err %d\n", + status, hw->aci.last_status); + + /* disable display of pending Option ROM */ + ctx->dev_caps.common_cap.nvm_update_pending_netlist = + false; + } + } + +#ifdef HAVE_DEVLINK_INFO_DRIVER_NAME_PUT + err = devlink_info_driver_name_put(req, KBUILD_MODNAME); + if (err) { + NL_SET_ERR_MSG_MOD(extack, "Unable to set driver name"); + goto out_free_ctx; + } +#endif /* HAVE_DEVLINK_INFO_DRIVER_NAME_PUT */ + + ixgbe_info_get_dsn(adapter, ctx); + + err = devlink_info_serial_number_put(req, ctx->buf); + if (err) { + NL_SET_ERR_MSG_MOD(extack, "Unable to set serial number"); + goto out_free_ctx; + } + + for (i = 0; i < ARRAY_SIZE(ixgbe_devlink_versions); i++) { + enum ixgbe_version_type type = ixgbe_devlink_versions[i].type; + const char *key = ixgbe_devlink_versions[i].key; + + memset(ctx->buf, 0, sizeof(ctx->buf)); + + ixgbe_devlink_versions[i].getter(adapter, ctx); + + /* If the default getter doesn't report a version, use the + * fallback function. This is primarily useful in the case of + * "stored" versions that want to report the same value as the + * running version in the normal case of no pending update. + */ + if (ctx->buf[0] == '\0' && ixgbe_devlink_versions[i].fallback) + ixgbe_devlink_versions[i].fallback(adapter, ctx); + + /* Do not report missing versions */ + if (ctx->buf[0] == '\0') + continue; + + switch (type) { + case IXGBE_VERSION_FIXED: + err = devlink_info_version_fixed_put(req, key, + ctx->buf); + if (err) { + NL_SET_ERR_MSG_MOD(extack, + "Unable to set fixed version"); + goto out_free_ctx; + } + break; + case IXGBE_VERSION_RUNNING: + err = devlink_info_version_running_put(req, key, + ctx->buf); + if (err) { + NL_SET_ERR_MSG_MOD(extack, + "Unable to set running version"); + goto out_free_ctx; + } + break; + case IXGBE_VERSION_STORED: + err = devlink_info_version_stored_put(req, key, + ctx->buf); + if (err) { + NL_SET_ERR_MSG_MOD(extack, + "Unable to set stored version"); + goto out_free_ctx; + } + break; + } + } +out_free_ctx: + kfree(ctx); + return err; +} +#endif /* HAVE_DEVLINK_INFO_GET */ + +#ifdef HAVE_DEVLINK_PARAMS +enum ixgbe_devlink_param_id { + IXGBE_DEVLINK_PARAM_ID_BASE = DEVLINK_PARAM_GENERIC_ID_MAX, + IXGBE_DEVLINK_PARAM_ID_FW_MGMT_MINSREV, + IXGBE_DEVLINK_PARAM_ID_FW_UNDI_MINSREV, +}; + +/** + * ixgbe_devlink_minsrev_get - Get the current minimum security revision + * @devlink: pointer to the devlink instance + * @id: the parameter ID to get + * @ctx: context to return the parameter value + * + * Returns: zero on success, or an error code on failure. + */ +static int ixgbe_devlink_minsrev_get(struct devlink *devlink, u32 id, + struct devlink_param_gset_ctx *ctx) +{ + struct ixgbe_minsrev_info minsrevs = {}; + struct ixgbe_adapter *adapter; + struct device *dev; + s32 status; + + adapter = *(struct ixgbe_adapter **)devlink_priv(devlink); + dev = ixgbe_pf_to_dev(adapter); + + if (id != IXGBE_DEVLINK_PARAM_ID_FW_MGMT_MINSREV && + id != IXGBE_DEVLINK_PARAM_ID_FW_UNDI_MINSREV) + return -EINVAL; + + status = ixgbe_get_nvm_minsrevs(&adapter->hw, &minsrevs); + + if (status == IXGBE_ERR_ACI_ERROR) { + ixgbe_release_nvm(&adapter->hw); + status = ixgbe_get_nvm_minsrevs(&adapter->hw, &minsrevs); + } + + if (status) { + dev_warn(dev, + "Failed to read minimum security revision data from flash\n"); + return -EIO; + } + + /* We report zero if the device has not yet had a valid minimum + * security revision programmed for the associated module. This makes + * sense because it is not possible to have a security revision of + * less than zero. Thus, all images will be able to load if the + * minimum security revision is zero, the same as the case where the + * minimum value is indicated as invalid. + */ + + switch (id) { + case IXGBE_DEVLINK_PARAM_ID_FW_MGMT_MINSREV: + if (minsrevs.nvm_valid) + ctx->val.vu32 = minsrevs.nvm; + else + ctx->val.vu32 = 0; + break; + case IXGBE_DEVLINK_PARAM_ID_FW_UNDI_MINSREV: + if (minsrevs.orom_valid) + ctx->val.vu32 = minsrevs.orom; + else + ctx->val.vu32 = 0; + break; + } + + return 0; +} + +#ifdef HAVE_DEVLINK_PARAMS_SET_EXTACK +/** + * ixgbe_devlink_minsrev_set - Set the minimum security revision + * @devlink: pointer to the devlink instance + * @id: the parameter ID to set + * @ctx: context to return the parameter value + * @extack: netlink extended ACK structure + * + * Set the minimum security revision value for fw.mgmt or fw.undi. The kernel + * calls the validate handler before calling this, so we do not need to + * duplicate those checks here. + * + * Returns: zero on success, or an error code on failure. + */ +static int ixgbe_devlink_minsrev_set(struct devlink *devlink, u32 id, + struct devlink_param_gset_ctx *ctx, + struct netlink_ext_ack *extack) +#else +static int ixgbe_devlink_minsrev_set(struct devlink *devlink, u32 id, + struct devlink_param_gset_ctx *ctx) +#endif +{ + struct ixgbe_minsrev_info minsrevs = {}; + struct ixgbe_adapter *adapter; + struct device *dev; + s32 status; + + adapter = *(struct ixgbe_adapter **)devlink_priv(devlink); + dev = ixgbe_pf_to_dev(adapter); + + switch (id) { + case IXGBE_DEVLINK_PARAM_ID_FW_MGMT_MINSREV: + minsrevs.nvm_valid = true; + minsrevs.nvm = ctx->val.vu32; + break; + case IXGBE_DEVLINK_PARAM_ID_FW_UNDI_MINSREV: + minsrevs.orom_valid = true; + minsrevs.orom = ctx->val.vu32; + break; + default: + return -EINVAL; + } + + status = ixgbe_update_nvm_minsrevs(&adapter->hw, &minsrevs); + if (status) { + dev_warn(dev, + "Failed to update minimum security revision data\n"); + return -EIO; + } + + return 0; +} + +/** + * ixgbe_devlink_minsrev_validate - Validate a minimum security revision update + * @devlink: unused pointer to devlink instance + * @id: the parameter ID to validate + * @val: value to validate + * @extack: netlink extended ACK structure + * + * Check that a proposed update to a minimum security revision field is valid. + * Each minimum security revision can only be increased, not decreased. + * Additionally, we verify that the value is never set higher than the + * security revision of the active flash component. + * + * Returns: zero if the value is valid, -ERANGE if it is out of range, and + * -EINVAL if this function is called with the wrong ID. + */ +static int ixgbe_devlink_minsrev_validate(struct devlink *devlink, u32 id, + union devlink_param_value val, + struct netlink_ext_ack *extack) +{ + struct ixgbe_minsrev_info minsrevs = {}; + struct ixgbe_adapter *adapter; + struct device *dev; + s32 status; + + adapter = *(struct ixgbe_adapter **)devlink_priv(devlink); + dev = ixgbe_pf_to_dev(adapter); + + if (id != IXGBE_DEVLINK_PARAM_ID_FW_MGMT_MINSREV && + id != IXGBE_DEVLINK_PARAM_ID_FW_UNDI_MINSREV) + return -EINVAL; + + status = ixgbe_get_nvm_minsrevs(&adapter->hw, &minsrevs); + + if (status == IXGBE_ERR_ACI_ERROR) { + ixgbe_release_nvm(&adapter->hw); + status = ixgbe_get_nvm_minsrevs(&adapter->hw, &minsrevs); + } + if (status) { + NL_SET_ERR_MSG_MOD(extack, + "Failed to read minimum security revision data from flash"); + return -EIO; + } + + switch (id) { + case IXGBE_DEVLINK_PARAM_ID_FW_MGMT_MINSREV: + if (val.vu32 > adapter->hw.flash.nvm.srev) { + NL_SET_ERR_MSG_MOD(extack, + "Cannot update fw.mgmt minimum security revision higher than the currently running firmware"); + dev_dbg(dev, + "Attempted to set fw.mgmt.minsrev to %u, but running firmware has srev %u\n", + val.vu32, adapter->hw.flash.nvm.srev); + return -EPERM; + } + + if (minsrevs.nvm_valid && val.vu32 < minsrevs.nvm) { + NL_SET_ERR_MSG_MOD(extack, + "Cannot lower the minimum security revision for fw.mgmt flash section"); + dev_dbg(dev, + "Attempted to set fw.mgmt.minsrev to %u, but current minsrev is %u\n", + val.vu32, minsrevs.nvm); + return -EPERM; + } + break; + case IXGBE_DEVLINK_PARAM_ID_FW_UNDI_MINSREV: + if (val.vu32 > adapter->hw.flash.orom.srev) { + NL_SET_ERR_MSG_MOD(extack, + "Cannot update fw.undi minimum security revision higher than the currently running firmware"); + dev_dbg(dev, + "Attempted to set fw.undi.minsrev to %u, but running firmware has srev %u\n", + val.vu32, adapter->hw.flash.orom.srev); + return -EPERM; + } + + if (minsrevs.orom_valid && val.vu32 < minsrevs.orom) { + NL_SET_ERR_MSG_MOD(extack, + "Cannot lower the minimum security revision for fw.undi flash section"); + dev_dbg(dev, + "Attempted to set fw.undi.minsrev to %u, but current minsrev is %u\n", + val.vu32, minsrevs.orom); + return -EPERM; + } + break; + } + + return 0; +} + +/* devlink parameters for the driver */ +static const struct devlink_param ixgbe_devlink_params[] = { + DEVLINK_PARAM_DRIVER(IXGBE_DEVLINK_PARAM_ID_FW_MGMT_MINSREV, + "fw.mgmt.minsrev", + DEVLINK_PARAM_TYPE_U32, + BIT(DEVLINK_PARAM_CMODE_PERMANENT), + ixgbe_devlink_minsrev_get, + ixgbe_devlink_minsrev_set, + ixgbe_devlink_minsrev_validate), + DEVLINK_PARAM_DRIVER(IXGBE_DEVLINK_PARAM_ID_FW_UNDI_MINSREV, + "fw.undi.minsrev", + DEVLINK_PARAM_TYPE_U32, + BIT(DEVLINK_PARAM_CMODE_PERMANENT), + ixgbe_devlink_minsrev_get, + ixgbe_devlink_minsrev_set, + ixgbe_devlink_minsrev_validate), +}; +#endif /* HAVE_DEVLINK_PARAMS */ + +#ifdef HAVE_DEVLINK_FLASH_UPDATE +#ifdef HAVE_DEVLINK_FLASH_UPDATE_BEGIN_END_NOTIFY +/** + * ixgbe_devlink_flash_update_notify - Compatibility for begin/end notify + * @devlink: pointer to the devlink instance for this device + * @params: flash update parameters + * @extack: netlink extended ACK message structure + * + * Compatibility wrapper which handles calling + * devlink_flash_update_begin_notify and devlink_flash_update_end_notify when + * the kernel does not do this for us. + * + * Return: 0 on success or negative error code on failure. + */ +static int ixgbe_devlink_flash_update_notify(struct devlink *devlink, + struct devlink_flash_update_params + *params, + struct netlink_ext_ack *extack) +{ + int err; + + devlink_flash_update_begin_notify(devlink); + err = ixgbe_flash_pldm_image(devlink, params, extack); + devlink_flash_update_end_notify(devlink); + + return err; +} +#endif /* HAVE_DEVLINK_FLASH_UPDATE_BEGIN_END_NOTIFY */ + +#ifndef HAVE_DEVLINK_FLASH_UPDATE_PARAMS +/** + * ixgbe_devlink_flash_update_params - Compatibility for params argument + * @devlink: pointer to the devlink instance for this device + * @file_name: the file name to request the firmware from + * @component: the flash component to update + * @extack: netlink extended ACK message structure + * + * Compatibility wrapper which handles creating the flash update parameters + * structure for kernels which do not have this structure defined yet. + * + * Return: 0 on success or negative error code on failure. + */ +static int ixgbe_devlink_flash_update_params(struct devlink *devlink, + const char *file_name, + const char *component, + struct netlink_ext_ack *extack) +{ + struct devlink_flash_update_params params = {}; + struct ixgbe_adapter *adapter; + struct device *dev; + int ret; + + adapter = *(struct ixgbe_adapter **)devlink_priv(devlink); + dev = ixgbe_pf_to_dev(adapter); + + /* individual component update is not yet supported, and older kernels + * did not check this for us. + */ + if (component) + return -EOPNOTSUPP; + + params.file_name = file_name; + +#ifdef HAVE_DEVLINK_FLASH_UPDATE_BEGIN_END_NOTIFY + ret = ixgbe_devlink_flash_update_notify(devlink, ¶ms, extack); + + if (ret) + dev_dbg(dev, + "ixgbe_devlink_flash_update_notify() returned %d\n", + ret); +#else + ret = ixgbe_flash_pldm_image(devlink, ¶ms, extack); + + if (ret) + dev_dbg(dev, "ixgbe_flash_pldm_image() returned %d\n", ret); +#endif + return ret; +} +#endif /* !HAVE_DEVLINK_FLASH_UPDATE_PARAMS */ +#endif /* HAVE_DEVLINK_FLASH_UPDATE */ + +#ifdef HAVE_DEVLINK_RELOAD_ACTION_AND_LIMIT +/** + * ixgbe_devlink_reload_empr_start - Start EMP reset to activate new firmware + * @devlink: pointer to the devlink instance to reload + * @netns_change: if true, the network namespace is changing + * @action: the action to perform. Must be DEVLINK_RELOAD_ACTION_FW_ACTIVATE + * @limit: limits on what reload should do, such as not resetting + * @extack: netlink extended ACK structure + * + * Allow user to activate new Embedded Management Processor firmware by + * issuing device specific EMP reset. Called in response to + * a DEVLINK_CMD_RELOAD with the DEVLINK_RELOAD_ACTION_FW_ACTIVATE. + * + * Note that teardown and rebuild of the driver state happens automatically as + * part of an interrupt and watchdog task. This is because all physical + * functions on the device must be able to reset when an EMP reset occurs from + * any source. + * + * Return: the exit code of the operation. + */ +static int ixgbe_devlink_reload_empr_start(struct devlink *devlink, + bool netns_change, + enum devlink_reload_action action, + enum devlink_reload_limit limit, + struct netlink_ext_ack *extack) +{ + struct ixgbe_adapter *adapter; + struct ixgbe_hw *hw; + struct device *dev; + s32 status; + u8 pending; + int err; + + adapter = *(struct ixgbe_adapter **)devlink_priv(devlink); + dev = ixgbe_pf_to_dev(adapter); + hw = &adapter->hw; + + err = ixgbe_get_pending_updates(adapter, &pending, extack); + if (err) + return err; + + /* pending is a bitmask of which flash banks have a pending update, + * including the main NVM bank, the Option ROM bank, and the netlist + * bank. If any of these bits are set, then there is a pending update + * waiting to be activated. + */ + if (!pending) { + NL_SET_ERR_MSG_MOD(extack, "No pending firmware update"); + return -ECANCELED; + } + + if (adapter->fw_emp_reset_disabled) { + NL_SET_ERR_MSG_MOD(extack, + "EMP reset is not available. To activate firmware, a reboot or power cycle is needed\n"); + return -ECANCELED; + } + + dev_dbg(dev, "Issuing device EMP reset to activate firmware\n"); + + status = ixgbe_aci_nvm_update_empr(hw); + if (status) { + dev_err(dev, + "Failed to trigger EMP device reset to reload firmware, err %d\n", + status); + NL_SET_ERR_MSG_MOD(extack, + "Failed to trigger EMP device reset to reload firmware"); + return -EIO; + } + + return 0; +} + +/* Wait for 10 sec with 0.5 sec tic. EMPR takes no less than half of a sec */ +#define IXGBE_DEVLINK_RELOAD_TICK_L 400000 +#define IXGBE_DEVLINK_RELOAD_TICK_H 500000 +#define IXGBE_DEVLINK_RELOAD_TIMEOUT 20 + +/** + * ixgbe_devlink_reload_empr_finish - Complete EMP reset process + * @devlink: Pointer to the devlink instance + * @action: The action to perform + * @limit: Limits on what reload should do + * @actions_performed: Actions performed + * @extack: Netlink extended ACK structure + * + * This function completes the EMP reset process for the ixgbe network + * adapter. It updates the actions performed to indicate firmware activation + * and waits for the device and driver to finish the reset and rebuild + * process. The function currently includes a temporary 10-second wait to + * ensure completion. + * + * Return: Always returns 0, what means success. + */ +static int ixgbe_devlink_reload_empr_finish(struct devlink *devlink, + enum devlink_reload_action action, + enum devlink_reload_limit limit, + u32 *actions_performed, + struct netlink_ext_ack *extack) +{ + struct ixgbe_adapter *adapter = + *(struct ixgbe_adapter **)devlink_priv(devlink); + struct ixgbe_hw *hw = &adapter->hw; + int i = 0; + u32 fwsm; + + do { + if (i++ >= IXGBE_DEVLINK_RELOAD_TIMEOUT) + return -ETIME; + + /* Just right away after triggering EMP reset the FWSM register + * may be not cleared yet, so begin the loop with the delay + * in order to not check the not updated register. + */ + usleep_range(IXGBE_DEVLINK_RELOAD_TICK_L, + IXGBE_DEVLINK_RELOAD_TICK_H); + fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM_BY_MAC(hw)); + + } while (!(fwsm & IXGBE_FWSM_FW_VAL_BIT)); + + *actions_performed = BIT(DEVLINK_RELOAD_ACTION_FW_ACTIVATE); + + return ixgbe_refresh_fw_version(adapter); +} +#endif /* HAVE_DEVLINK_RELOAD_ACTION_AND_LIMIT */ + + +static const struct devlink_ops ixgbe_devlink_ops = { +#ifdef HAVE_DEVLINK_FLASH_UPDATE_PARAMS + .supported_flash_update_params = + DEVLINK_SUPPORT_FLASH_UPDATE_OVERWRITE_MASK, +#endif /* HAVE_DEVLINK_FLASH_UPDATE_PARAMS */ +#ifdef HAVE_DEVLINK_RELOAD_ACTION_AND_LIMIT + .reload_actions = BIT(DEVLINK_RELOAD_ACTION_FW_ACTIVATE), + /* The ixgbe driver currently does not support driver reinit */ + .reload_down = ixgbe_devlink_reload_empr_start, + .reload_up = ixgbe_devlink_reload_empr_finish, +#endif +#ifdef HAVE_DEVLINK_INFO_GET + .info_get = ixgbe_devlink_info_get, +#endif /* HAVE_DEVLINK_INFO_GET */ + +#ifdef HAVE_DEVLINK_FLASH_UPDATE +#if !defined(HAVE_DEVLINK_FLASH_UPDATE_PARAMS) + .flash_update = ixgbe_devlink_flash_update_params, +#elif defined(HAVE_DEVLINK_FLASH_UPDATE_BEGIN_END_NOTIFY) + .flash_update = ixgbe_devlink_flash_update_notify, +#else + .flash_update = ixgbe_flash_pldm_image, +#endif +#endif /* HAVE_DEVLINK_FLASH_UPDATE */ +}; + +/** + * ixgbe_allocate_devlink - Allocate devlink and return adapter pointer + * @adapter: pointer to the device adapter structure + * + * Allocate a devlink instance for this device and return the private area as + * the pointer to the adapter structure. + * + * Return: the pointer to adapter structure is returned + */ +struct ixgbe_adapter **ixgbe_allocate_devlink(struct ixgbe_adapter *adapter) +{ + struct device *dev = ixgbe_pf_to_dev(adapter); + struct ixgbe_adapter **padapter; + struct devlink *devlink; + + devlink = devlink_alloc(&ixgbe_devlink_ops, + sizeof(struct ixgbe_adapter *), dev); + if (!devlink) + return NULL; +#ifdef HAVE_DEVLINK_REGISTER_SETS_DEV + /* On older kernels, eg. 4.12, + * devlink->dev is not set during devlink_alloc. + * Assign it here just to be sure. + */ + devlink->dev = dev; +#endif /* HAVE_DEVLINK_REGISTER_SETS_DEV */ + + padapter = (struct ixgbe_adapter **)devlink_priv(devlink); + /* The adapter pointer is assigned to the indicated place in devlink */ + *padapter = adapter; + /* Add pointer to devlink to the adapter structure */ + adapter->devlink = devlink; + + return padapter; +} + +/** + * ixgbe_devlink_register - Register devlink interface for this adapter + * @adapter: pointer to the device adapter structure + * + * Register the devlink instance associated with this physical function. + */ +void ixgbe_devlink_register(struct ixgbe_adapter *adapter) +{ + struct devlink *devlink = adapter->devlink; + +#ifdef HAVE_DEVLINK_SET_FEATURES + devlink_set_features(devlink, DEVLINK_F_RELOAD); +#endif /* HAVE_DEVLINK_SET_FEATURES */ +#ifdef HAVE_DEVLINK_REGISTER_SETS_DEV + devlink_register(devlink, ixgbe_pf_to_dev(adapter)); +#else + devlink_register(devlink); +#endif + +#ifdef HAVE_DEVLINK_RELOAD_ACTION_AND_LIMIT +#ifndef HAVE_DEVLINK_SET_FEATURES +#ifdef HAVE_DEVLINK_RELOAD_ENABLE_DISABLE + devlink_reload_enable(devlink); +#endif /* HAVE_DEVLINK_RELOAD_ENABLE_DISABLE */ +#endif /* !HAVE_DEVLINK_SET_FEATURES */ +#endif /* HAVE_DEVLINK_RELOAD_ACTION_AND_LIMIT */ +} + +/** + * ixgbe_devlink_unregister - Unregister devlink resources for this adapter. + * @adapter: pointer to the device adapter structure + * + * Releases resources used by devlink and cleans up associated memory. + */ +void ixgbe_devlink_unregister(struct ixgbe_adapter *adapter) +{ + struct devlink *devlink = adapter->devlink; + +#ifdef HAVE_DEVLINK_RELOAD_ACTION_AND_LIMIT +#ifndef HAVE_DEVLINK_SET_FEATURES +#ifdef HAVE_DEVLINK_RELOAD_ENABLE_DISABLE + devlink_reload_disable(devlink); +#endif /* HAVE_DEVLINK_RELOAD_ENABLE_DISABLE */ +#endif /* !HAVE_DEVLINK_SET_FEATURES */ +#endif /* HAVE_DEVLINK_RELOAD_ACTION_AND_LIMIT */ + + devlink_unregister(devlink); +} + +/** + * ixgbe_devlink_register_params - Register devlink parameters + * @adapter: pointer to the device adapter structure + * + * Registers the parameters associated with this adapter. + * + * Return: the exit code of the operation. + */ +int ixgbe_devlink_register_params(struct ixgbe_adapter *adapter) +{ +#ifdef HAVE_DEVLINK_PARAMS + struct device *dev = ixgbe_pf_to_dev(adapter); + struct devlink *devlink = adapter->devlink; + int err; + + err = devlink_params_register(devlink, ixgbe_devlink_params, + ARRAY_SIZE(ixgbe_devlink_params)); + if (err) { + dev_err(dev, + "devlink params registration failed, err %d\n", + err); + return err; + } + +#ifdef HAVE_DEVLINK_PARAMS_PUBLISH + devlink_params_publish(devlink); +#endif /* HAVE_DEVLINK_PARAMS_PUBLISH */ + +#endif /* HAVE_DEVLINK_PARAMS */ + return 0; +} + +/** + * ixgbe_devlink_unregister_params - Unregister devlink parameters + * @adapter: pointer to the device adapter structure + * + * Removes the main devlink parameters associated with this adapter. + */ +void ixgbe_devlink_unregister_params(struct ixgbe_adapter *adapter) +{ +#ifdef HAVE_DEVLINK_PARAMS + struct devlink *devlink = adapter->devlink; + +#ifdef HAVE_DEVLINK_PARAMS_PUBLISH + devlink_params_unpublish(devlink); +#endif /* HAVE_DEVLINK_PARAMS_PUBLISH */ + + devlink_params_unregister(devlink, ixgbe_devlink_params, + ARRAY_SIZE(ixgbe_devlink_params)); +#endif /* HAVE_DEVLINK_PARAMS */ +} + +/** + * ixgbe_devlink_register_port - Register a devlink port for the adapter + * @adapter: pointer to the device adapter structure + * + * Create and register a devlink_port for this adapter. + * + * Return: zero on success or an error code on failure. + */ +int ixgbe_devlink_register_port(struct ixgbe_adapter *adapter) +{ + struct devlink_port *devlink_port = &adapter->devlink_port; + struct device *dev = ixgbe_pf_to_dev(adapter); + struct devlink *devlink = adapter->devlink; + struct devlink_port_attrs attrs = {}; + int err; + + attrs.flavour = DEVLINK_PORT_FLAVOUR_PHYSICAL; + attrs.phys.port_number = adapter->hw.bus.func; + + devlink_port_attrs_set(devlink_port, &attrs); + + err = devlink_port_register(devlink, devlink_port, 0); + if (err) { + dev_err(dev, + "devlink port registration failed, err %d\n", + err); + } + + return err; +} + +/** + * ixgbe_devlink_unregister_port - Unregister the devlink port + * @adapter: pointer to the device adapter structure + * + * Unregisters the devlink_port structure associated with this adapter. + */ +void ixgbe_devlink_unregister_port(struct ixgbe_adapter *adapter) +{ + struct devlink_port *devlink_port = &adapter->devlink_port; + + devlink_port_unregister(devlink_port); +} + +#ifdef HAVE_DEVLINK_REGIONS +#define IXGBE_ACI_MAX_BUF_LEN 4096 + +#ifdef HAVE_DEVLINK_REGION_OPS_SNAPSHOT +#define IXGBE_DEVLINK_READ_BLK_SIZE (1024 * 1024) + +#ifdef HAVE_DEVLINK_REGION_OPS_SNAPSHOT_OPS + +/** + * ixgbe_devlink_nvm_snapshot - Capture a snapshot of the NVM flash contents + * @devlink: the devlink instance + * @ops: the devlink region being snapshotted + * @extack: extended ACK response structure + * @data: on exit points to snapshot data buffer + * + * This function is called in response to the DEVLINK_CMD_REGION_TRIGGER for + * the nvm-flash devlink region. It captures a snapshot of the full NVM flash + * contents, including both banks of flash. This snapshot can later be viewed + * via the devlink-region interface. + * + * It captures the flash using the FLASH_ONLY bit set when reading via + * firmware, so it does not read the current Shadow RAM contents. For that, + * use the shadow-ram region. + * + * @returns zero on success, and updates the data pointer. Returns a non-zero + * error code on failure. + */ +#endif /* HAVE_DEVLINK_REGION_OPS_SNAPSHOT_OPS */ +static int ixgbe_devlink_nvm_snapshot(struct devlink *devlink, +#ifdef HAVE_DEVLINK_REGION_OPS_SNAPSHOT_OPS + const struct devlink_region_ops + __always_unused *ops, +#endif /* HAVE_DEVLINK_REGION_OPS_SNAPSHOT_OPS */ + struct netlink_ext_ack *extack, u8 **data) +{ + struct ixgbe_adapter *adapter; + struct ixgbe_hw *hw; + struct device *dev; + u8 *nvm_data, *tmp; + u32 nvm_size, left; + s8 num_blks, i; + s32 status; + + adapter = *(struct ixgbe_adapter **)devlink_priv(devlink); + dev = ixgbe_pf_to_dev(adapter); + hw = &adapter->hw; + + nvm_size = hw->flash.flash_size; + nvm_data = vzalloc(nvm_size); + if (!nvm_data) + return -ENOMEM; + + num_blks = DIV_ROUND_UP(nvm_size, IXGBE_DEVLINK_READ_BLK_SIZE); + tmp = nvm_data; + left = nvm_size; + + /* some systems take longer to read the nvm than others which causes the + * fw to reclaim the nvm lock before the entire nvm has been read. fix + * this by breaking the reads of the nvm into smaller chunks that will + * probably not take as long. this has some overhead since we are + * increasing the number of AQ commands, but it should always work + */ + for (i = 0; i < num_blks; i++) { + u32 read_sz = min_t(u32, IXGBE_DEVLINK_READ_BLK_SIZE, left); + + status = ixgbe_acquire_nvm(hw, IXGBE_RES_READ); + if (status) { + dev_dbg(dev, + "ixgbe_acquire_nvm failed, err %d aq_err %d\n", + status, hw->aci.last_status); + NL_SET_ERR_MSG_MOD(extack, + "Failed to acquire NVM semaphore"); + vfree(nvm_data); + return -EIO; + } + + status = ixgbe_read_flat_nvm(hw, + i * IXGBE_DEVLINK_READ_BLK_SIZE, + &read_sz, tmp, false); + if (status) { + dev_dbg(dev, + "ixgbe_read_flat_nvm failed after reading %u bytes, err %d aq_err %d\n", + read_sz, status, hw->aci.last_status); + NL_SET_ERR_MSG_MOD(extack, + "Failed to read RAM contents"); + ixgbe_release_nvm(hw); + vfree(nvm_data); + return -EIO; + } + + ixgbe_release_nvm(hw); + + tmp += read_sz; + left -= read_sz; + } + + *data = nvm_data; + + return 0; +} + +#ifdef HAVE_DEVLINK_REGION_OPS_SNAPSHOT_OPS +/** + * ixgbe_devlink_sram_snapshot - Capture a snapshot of the Shadow RAM contents + * @devlink: the devlink instance + * @ops: the devlink region being snapshotted + * @extack: extended ACK response structure + * @data: on exit points to snapshot data buffer + * + * This function is called in response to the DEVLINK_CMD_REGION_TRIGGER for + * the shadow-ram devlink region. It captures a snapshot of the shadow ram + * contents. This snapshot can later be viewed via the devlink-region + * interface. + * + * @returns zero on success, and updates the data pointer. Returns a non-zero + * error code on failure. + */ +#endif /* HAVE_DEVLINK_REGION_OPS_SNAPSHOT_OPS */ +static int ixgbe_devlink_sram_snapshot(struct devlink *devlink, +#ifdef HAVE_DEVLINK_REGION_OPS_SNAPSHOT_OPS + const struct devlink_region_ops + __always_unused *ops, +#endif /* HAVE_DEVLINK_REGION_OPS_SNAPSHOT_OPS */ + struct netlink_ext_ack *extack, + u8 **data) +{ + struct ixgbe_adapter *adapter; + struct ixgbe_hw *hw; + struct device *dev; + u32 sram_size; + u8 *sram_data; + int status; + + adapter = *(struct ixgbe_adapter **)devlink_priv(devlink); + dev = ixgbe_pf_to_dev(adapter); + hw = &adapter->hw; + + sram_size = hw->flash.sr_words * 2u; + sram_data = vzalloc(sram_size); + if (!sram_data) + return -ENOMEM; + + status = ixgbe_acquire_nvm(hw, IXGBE_RES_READ); + if (status) { + dev_dbg(dev, + "ixgbe_acquire_nvm failed, err %d aq_err %d\n", + status, hw->aci.last_status); + NL_SET_ERR_MSG_MOD(extack, "Failed to acquire NVM semaphore"); + vfree(sram_data); + return (int)status; + } + + /* Read from the Shadow RAM, rather than directly from NVM */ + status = ixgbe_read_flat_nvm(hw, 0, &sram_size, sram_data, true); + if (status) { + dev_dbg(dev, + "ixgbe_read_flat_nvm failed after reading %u bytes, err %d aq_err %d\n", + sram_size, status, hw->aci.last_status); + NL_SET_ERR_MSG_MOD(extack, + "Failed to read Shadow RAM contents"); + ixgbe_release_nvm(hw); + vfree(sram_data); + return (int)status; + } + + ixgbe_release_nvm(hw); + + *data = sram_data; + + return 0; +} + +#ifdef HAVE_DEVLINK_REGION_OPS_SNAPSHOT_OPS +/** + * ixgbe_devlink_devcaps_snapshot - Capture snapshot of device capabilities + * @devlink: the devlink instance + * @ops: the devlink region being snapshotted + * @extack: extended ACK response structure + * @data: on exit points to snapshot data buffer + * + * This function is called in response to the DEVLINK_CMD_REGION_TRIGGER for + * the device-caps devlink region. It captures a snapshot of the device + * capabilities reported by firmware. + * + * @returns zero on success, and updates the data pointer. Returns a non-zero + * error code on failure. + */ +#endif /* HAVE_DEVLINK_REGION_OPS_SNAPSHOT_OPS */ +static int ixgbe_devlink_devcaps_snapshot(struct devlink *devlink, +#ifdef HAVE_DEVLINK_REGION_OPS_SNAPSHOT_OPS + const struct devlink_region_ops + __always_unused *ops, +#endif /* HAVE_DEVLINK_REGION_OPS_SNAPSHOT_OPS */ + struct netlink_ext_ack *extack, + u8 **data) +{ + struct ixgbe_adapter *adapter; + struct ixgbe_hw *hw; + struct device *dev; + void *devcaps; + s32 status; + + adapter = *(struct ixgbe_adapter **)devlink_priv(devlink); + dev = ixgbe_pf_to_dev(adapter); + hw = &adapter->hw; + + devcaps = vzalloc(IXGBE_ACI_MAX_BUF_LEN); + if (!devcaps) + return -ENOMEM; + + status = ixgbe_aci_list_caps(hw, devcaps, IXGBE_ACI_MAX_BUF_LEN, NULL, + ixgbe_aci_opc_list_dev_caps); + if (status) { + dev_dbg(dev, + "ixgbe_aci_list_caps: failed to read device capabilities, err %d aci_err %d\n", + status, hw->aci.last_status); + NL_SET_ERR_MSG_MOD(extack, + "Failed to read device capabilities"); + vfree(devcaps); + return status; + } + + *data = (u8 *)devcaps; + + return 0; +} +#endif /* HAVE_DEVLINK_REGION_OPS_SNAPSHOT */ + +static const struct devlink_region_ops ixgbe_nvm_region_ops = { + .name = "nvm-flash", + .destructor = vfree, +#ifdef HAVE_DEVLINK_REGION_OPS_SNAPSHOT + .snapshot = ixgbe_devlink_nvm_snapshot, +#endif +}; + +static const struct devlink_region_ops ixgbe_sram_region_ops = { + .name = "shadow-ram", + .destructor = vfree, +#ifdef HAVE_DEVLINK_REGION_OPS_SNAPSHOT + .snapshot = ixgbe_devlink_sram_snapshot, +#endif +}; + +static const struct devlink_region_ops ixgbe_devcaps_region_ops = { + .name = "device-caps", + .destructor = vfree, +#ifdef HAVE_DEVLINK_REGION_OPS_SNAPSHOT + .snapshot = ixgbe_devlink_devcaps_snapshot, +#endif +}; + +/** + * ixgbe_devlink_init_regions - Initialize devlink regions + * @adapter: adapter instance + * + * Create devlink regions used to enable access to dump the contents of the + * flash memory on the device. + */ +void ixgbe_devlink_init_regions(struct ixgbe_adapter *adapter) +{ + struct device *dev = ixgbe_pf_to_dev(adapter); + struct devlink *devlink = adapter->devlink; + u64 nvm_size, sram_size; + + nvm_size = adapter->hw.flash.flash_size; + adapter->nvm_region = + devlink_region_create(devlink, + &ixgbe_nvm_region_ops, + 1, nvm_size); + if (IS_ERR(adapter->nvm_region)) { + dev_err(dev, + "Failed to create NVM devlink region, err %ld\n", + PTR_ERR(adapter->nvm_region)); + adapter->nvm_region = NULL; + } + + sram_size = adapter->hw.flash.sr_words * 2u; + adapter->sram_region = + devlink_region_create(devlink, + &ixgbe_sram_region_ops, + 1, sram_size); + if (IS_ERR(adapter->sram_region)) { + dev_err(dev, + "Failed to create shadow-ram devlink region, err %ld\n", + PTR_ERR(adapter->sram_region)); + adapter->sram_region = NULL; + } + + adapter->devcaps_region = + devlink_region_create(devlink, + &ixgbe_devcaps_region_ops, + 10, IXGBE_ACI_MAX_BUF_LEN); + if (IS_ERR(adapter->devcaps_region)) { + dev_err(dev, + "Failed to create device-caps devlink region, err %ld\n", + PTR_ERR(adapter->devcaps_region)); + adapter->devcaps_region = NULL; + } +} + +/** + * ixgbe_devlink_destroy_regions - Destroy devlink regions + * @adapter: adapter instance + * + * Remove previously created regions for this PF. + */ +void ixgbe_devlink_destroy_regions(struct ixgbe_adapter *adapter) +{ + if (adapter->nvm_region) + devlink_region_destroy(adapter->nvm_region); + + if (adapter->sram_region) + devlink_region_destroy(adapter->sram_region); + + if (adapter->devcaps_region) + devlink_region_destroy(adapter->devcaps_region); +} +#endif /* HAVE_DEVLINK_REGIONS */ + +#endif /* CONFIG_NET_DEVLINK */ diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_devlink.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_devlink.h new file mode 100644 index 00000000000..5bfa522694f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_devlink.h @@ -0,0 +1,50 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 1999 - 2026 Intel Corporation */ + +#ifndef _IXGBE_DEVLINK_H_ +#define _IXGBE_DEVLINK_H_ + +#if IS_ENABLED(CONFIG_NET_DEVLINK) + +struct ixgbe_adapter **ixgbe_allocate_devlink(struct ixgbe_adapter *adapter); + +void ixgbe_devlink_register(struct ixgbe_adapter *adapter); +void ixgbe_devlink_unregister(struct ixgbe_adapter *adapter); + +int ixgbe_devlink_register_params(struct ixgbe_adapter *adapter); +void ixgbe_devlink_unregister_params(struct ixgbe_adapter *adapter); + +int ixgbe_devlink_register_port(struct ixgbe_adapter *adapter); +void ixgbe_devlink_unregister_port(struct ixgbe_adapter *adapter); + +#else /* CONFIG_NET_DEVLINK */ + +struct ixgbe_adapter **ixgbe_allocate_devlink(struct ixgbe_adapter *adapter) +{ + return NULL +} + +static inline void ixgbe_devlink_register(struct ixgbe_adapter *adapter) { } +static inline void ixgbe_devlink_unregister(struct ixgbe_adapter *adapter) { } + +static inline int ixgbe_devlink_register_params(struct ixgbe_adapter *adapter) { return 0; } +static inline void ixgbe_devlink_unregister_params(struct ixgbe_adapter *adapter) { } + +static inline int ixgbe_devlink_register_port(struct ixgbe_adapter *adapter) { return 0; } +static inline void ixgbe_devlink_unregister_port(struct ixgbe_adapter *adapter) { } + +#endif /* !CONFIG_NET_DEVLINK */ + +#if IS_ENABLED(CONFIG_NET_DEVLINK) && defined(HAVE_DEVLINK_REGIONS) + +void ixgbe_devlink_init_regions(struct ixgbe_adapter *adapter); +void ixgbe_devlink_destroy_regions(struct ixgbe_adapter *adapter); + +#else + +static inline void ixgbe_devlink_init_regions(struct ixgbe_adapter *adapter) { } +static inline void ixgbe_devlink_destroy_regions(struct ixgbe_adapter *adapter) { } + +#endif + +#endif /* _IXGBE_DEVLINK_H_ */ diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_e610.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_e610.c new file mode 100644 index 00000000000..4fa600f60f1 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_e610.c @@ -0,0 +1,6282 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 1999 - 2026 Intel Corporation */ + +#include "ixgbe_type.h" +#include "ixgbe_e610.h" +#include "ixgbe_x550.h" +#include "ixgbe_common.h" +#include "ixgbe_phy.h" +#include "ixgbe_api.h" + +/** + * ixgbe_init_aci - initialization routine for Admin Command Interface + * @hw: pointer to the hardware structure + * + * Initialize the ACI lock. + */ +void ixgbe_init_aci(struct ixgbe_hw *hw) +{ + ixgbe_init_lock(&hw->aci.lock); +} + +/** + * ixgbe_shutdown_aci - shutdown routine for Admin Command Interface + * @hw: pointer to the hardware structure + * + * Destroy the ACI lock. + */ +void ixgbe_shutdown_aci(struct ixgbe_hw *hw) +{ + ixgbe_destroy_lock(&hw->aci.lock); +} + +#define IXGBE_ACI_DEBUG_PREFIX "ixgbe " +#define ixgbe_aci_debug_array(hw, rowsize, buf, len) \ + print_hex_dump_debug(IXGBE_ACI_DEBUG_PREFIX, DUMP_PREFIX_OFFSET, \ + rowsize, 1, buf, len, false) + +/** + * ixgbe_aci_debug - dump the ACI data with the descriptor contents. + * @hw: pointer to the hardware structure + * @desc: pointer to control queue descriptor + * @buf: pointer to command buffer + * @buf_len: max length of buf + * + * Debug function for dumping logs about ACI command with descriptor contents. + */ +void ixgbe_aci_debug(struct ixgbe_hw *hw, void *desc, void *buf, u16 buf_len) +{ + struct ixgbe_aci_desc *aci_desc = (struct ixgbe_aci_desc *)desc; + u16 datalen, flags; + + if (!hw || !desc) + return; + + datalen = IXGBE_LE16_TO_CPU(aci_desc->datalen); + flags = IXGBE_LE16_TO_CPU(aci_desc->flags); + + hw_dbg(hw, "CQ CMD: opcode 0x%04X, flags 0x%04X, datalen 0x%04X, retval 0x%04X\n", + IXGBE_LE16_TO_CPU(aci_desc->opcode), flags, datalen, + IXGBE_LE16_TO_CPU(aci_desc->retval)); + hw_dbg(hw, "\tcookie (h,l) 0x%08X 0x%08X\n", + IXGBE_LE32_TO_CPU(aci_desc->cookie_high), + IXGBE_LE32_TO_CPU(aci_desc->cookie_low)); + hw_dbg(hw, "\tparam (0,1) 0x%08X 0x%08X\n", + IXGBE_LE32_TO_CPU(aci_desc->params.generic.param0), + IXGBE_LE32_TO_CPU(aci_desc->params.generic.param1)); + hw_dbg(hw, "\taddr (h,l) 0x%08X 0x%08X\n", + IXGBE_LE32_TO_CPU(aci_desc->params.generic.addr_high), + IXGBE_LE32_TO_CPU(aci_desc->params.generic.addr_low)); + + /* Dump buffer if 1) one exists and 2) is either a response indicated + * by the DD and/or CMP flag set or a command with the RD flag set. + */ + if (buf && aci_desc->datalen != 0 && + (flags & (IXGBE_ACI_FLAG_DD | IXGBE_ACI_FLAG_CMP) || + flags & IXGBE_ACI_FLAG_RD)) { + hw_dbg(hw, "Buffer:\n"); + ixgbe_aci_debug_array(hw, 16, (u8 *)buf, min(buf_len, datalen)); + } +} + +/** + * ixgbe_should_retry_aci_send_cmd_execute - decide if ACI command should + * be resent + * @opcode: ACI opcode + * + * Check if ACI command should be sent again depending on the provided opcode. + * + * Return: true if the sending command routine should be repeated, + * otherwise false. + */ +STATIC bool ixgbe_should_retry_aci_send_cmd_execute(u16 opcode) +{ + + switch (opcode) { + case ixgbe_aci_opc_disable_rxen: + case ixgbe_aci_opc_get_phy_caps: + case ixgbe_aci_opc_get_link_status: + case ixgbe_aci_opc_get_link_topo: + return true; + } + + return false; +} + +/** + * ixgbe_aci_send_cmd_execute - execute sending FW Admin Command to FW Admin + * Command Interface + * @hw: pointer to the HW struct + * @desc: descriptor describing the command + * @buf: buffer to use for indirect commands (NULL for direct commands) + * @buf_size: size of buffer for indirect commands (0 for direct commands) + * + * Admin Command is sent using CSR by setting descriptor and buffer in specific + * registers. + * + * Return: the exit code of the operation. + * * - IXGBE_SUCCESS - success. + * * - IXGBE_ERR_ACI_DISABLED - CSR mechanism is not enabled. + * * - IXGBE_ERR_ACI_BUSY - CSR mechanism is busy. + * * - IXGBE_ERR_PARAM - buf_size is too big or + * invalid argument buf or buf_size. + * * - IXGBE_ERR_ACI_TIMEOUT - Admin Command X command timeout. + * * - IXGBE_ERR_ACI_ERROR - Admin Command X invalid state of HICR register or + * Admin Command failed because of bad opcode was returned or + * Admin Command failed with error Y. + */ +STATIC s32 +ixgbe_aci_send_cmd_execute(struct ixgbe_hw *hw, struct ixgbe_aci_desc *desc, + void *buf, u16 buf_size) +{ + u32 hicr = 0, tmp_buf_size = 0, i = 0; + u32 *raw_desc = (u32 *)desc; + s32 status = IXGBE_SUCCESS; + bool valid_buf = false; + u32 *tmp_buf = NULL; + u16 opcode = 0; + + do { + hw->aci.last_status = IXGBE_ACI_RC_OK; + + /* It's necessary to check if mechanism is enabled */ + hicr = IXGBE_READ_REG(hw, PF_HICR); + if (!(hicr & PF_HICR_EN)) { + hw_dbg(hw, "CSR mechanism is not enabled\n"); + status = IXGBE_ERR_ACI_DISABLED; + break; + } + if (hicr & PF_HICR_C) { + hw_dbg(hw, "CSR mechanism is busy\n"); + hw->aci.last_status = IXGBE_ACI_RC_EBUSY; + status = IXGBE_ERR_ACI_BUSY; + break; + } + opcode = desc->opcode; + + if (buf_size > IXGBE_ACI_MAX_BUFFER_SIZE) { + hw_dbg(hw, "buf_size is too big\n"); + status = IXGBE_ERR_PARAM; + break; + } + + if (buf) + desc->flags |= IXGBE_CPU_TO_LE16(IXGBE_ACI_FLAG_BUF); + + /* Check if buf and buf_size are proper params */ + if (desc->flags & IXGBE_CPU_TO_LE16(IXGBE_ACI_FLAG_BUF)) { + if ((buf && buf_size == 0) || + (buf == NULL && buf_size)) { + status = IXGBE_ERR_PARAM; + hw_dbg(hw, "Error: Invalid argument buf or buf_size\n"); + break; + } + if (buf && buf_size) + valid_buf = true; + } + + if (valid_buf == true) { + if (buf_size % 4 == 0) + tmp_buf_size = buf_size; + else + tmp_buf_size = (buf_size & (u16)(~0x03)) + 4; + + tmp_buf = (u32*)ixgbe_malloc(hw, tmp_buf_size); + if (!tmp_buf) + return IXGBE_ERR_OUT_OF_MEM; + + /* tmp_buf will be firstly filled with 0xFF and after + * that the content of buf will be written into it. + * This approach lets us use valid buf_size and + * prevents us from reading past buf area + * when buf_size mod 4 not equal to 0. + */ + memset(tmp_buf, 0xFF, tmp_buf_size); + memcpy(tmp_buf, buf, buf_size); + + if (tmp_buf_size > IXGBE_ACI_LG_BUF) + desc->flags |= + IXGBE_CPU_TO_LE16(IXGBE_ACI_FLAG_LB); + + desc->datalen = IXGBE_CPU_TO_LE16(buf_size); + + if (desc->flags & IXGBE_CPU_TO_LE16(IXGBE_ACI_FLAG_RD)) { + for (i = 0; i < tmp_buf_size / 4; i++) { + IXGBE_WRITE_REG(hw, PF_HIBA(i), + IXGBE_LE32_TO_CPU(tmp_buf[i])); + } + } + } + + ixgbe_aci_debug(hw, (void *)desc, tmp_buf, (u16)tmp_buf_size); + + /* Descriptor is written to specific registers */ + for (i = 0; i < IXGBE_ACI_DESC_SIZE_IN_DWORDS; i++) + IXGBE_WRITE_REG(hw, PF_HIDA(i), + IXGBE_LE32_TO_CPU(raw_desc[i])); + + /* SW has to set PF_HICR.C bit and clear PF_HICR.SV and + * PF_HICR_EV + */ + hicr = IXGBE_READ_REG(hw, PF_HICR); + hicr = (hicr | PF_HICR_C) & ~(PF_HICR_SV | PF_HICR_EV); + IXGBE_WRITE_REG(hw, PF_HICR, hicr); + + /* Wait for sync Admin Command response */ + for (i = 0; i < IXGBE_ACI_SYNC_RESPONSE_TIMEOUT; i += 1) { + hicr = IXGBE_READ_REG(hw, PF_HICR); + if ((hicr & PF_HICR_SV) || !(hicr & PF_HICR_C)) + break; + + msec_delay(1); + } + + /* Wait for async Admin Command response */ + if ((hicr & PF_HICR_SV) && (hicr & PF_HICR_C)) { + for (i = 0; i < IXGBE_ACI_ASYNC_RESPONSE_TIMEOUT; + i += 1) { + hicr = IXGBE_READ_REG(hw, PF_HICR); + if ((hicr & PF_HICR_EV) || !(hicr & PF_HICR_C)) + break; + + msec_delay(1); + } + } + + /* Read sync Admin Command response */ + if ((hicr & PF_HICR_SV)) { + for (i = 0; i < IXGBE_ACI_DESC_SIZE_IN_DWORDS; i++) { + raw_desc[i] = IXGBE_READ_REG(hw, PF_HIDA(i)); + raw_desc[i] = IXGBE_CPU_TO_LE32(raw_desc[i]); + } + ixgbe_aci_debug(hw, (void *)raw_desc, NULL, 0); + } + + /* Read async Admin Command response */ + if ((hicr & PF_HICR_EV) && !(hicr & PF_HICR_C)) { + for (i = 0; i < IXGBE_ACI_DESC_SIZE_IN_DWORDS; i++) { + raw_desc[i] = IXGBE_READ_REG(hw, PF_HIDA_2(i)); + raw_desc[i] = IXGBE_CPU_TO_LE32(raw_desc[i]); + } + ixgbe_aci_debug(hw, (void *)raw_desc, NULL, 0); + } + + /* Handle timeout and invalid state of HICR register */ + if (hicr & PF_HICR_C) { + hw_dbg(hw, "Error: Admin Command 0x%X command timeout\n", + desc->opcode); + status = IXGBE_ERR_ACI_TIMEOUT; + break; + } else if (!(hicr & PF_HICR_SV) && !(hicr & PF_HICR_EV)) { + hw_dbg(hw, "Error: Admin Command 0x%X invalid state of HICR register\n", + desc->opcode); + status = IXGBE_ERR_ACI_ERROR; + break; + } + + /* For every command other than 0x0014 treat opcode mismatch + * as an error. Response to 0x0014 command read from HIDA_2 + * is a descriptor of an event which is expected to contain + * different opcode than the command. + */ + if (desc->opcode != opcode && + opcode != IXGBE_CPU_TO_LE16(ixgbe_aci_opc_get_fw_event)) { + hw_dbg(hw, "Error: Admin Command failed because of bad opcode was returned\n"); + status = IXGBE_ERR_ACI_ERROR; + break; + } + + if (desc->retval != IXGBE_ACI_RC_OK) { + hw_dbg(hw, "Error: Admin Command failed with error %x\n", + desc->retval); + hw->aci.last_status = (enum ixgbe_aci_err)desc->retval; + status = IXGBE_ERR_ACI_ERROR; + break; + } + + /* Write a response values to a buf */ + if (valid_buf && (desc->flags & + IXGBE_CPU_TO_LE16(IXGBE_ACI_FLAG_BUF))) { + for (i = 0; i < tmp_buf_size / 4; i++) { + tmp_buf[i] = IXGBE_R32_Q(hw, PF_HIBA(i)); + tmp_buf[i] = IXGBE_CPU_TO_LE32(tmp_buf[i]); + } + memcpy(buf, tmp_buf, buf_size); + ixgbe_aci_debug(hw, (void *)raw_desc, tmp_buf, + (u16)tmp_buf_size); + } + } while (0); + + if (tmp_buf) + ixgbe_free(hw, tmp_buf); + + return status; +} + +/** + * ixgbe_aci_send_cmd - send FW Admin Command to FW Admin Command Interface + * @hw: pointer to the HW struct + * @desc: descriptor describing the command + * @buf: buffer to use for indirect commands (NULL for direct commands) + * @buf_size: size of buffer for indirect commands (0 for direct commands) + * + * Helper function to send FW Admin Commands to the FW Admin Command Interface. + * + * Retry sending the FW Admin Command multiple times to the FW ACI + * if the EBUSY Admin Command error is returned. + * + * Return: the exit code of the operation. + */ +s32 ixgbe_aci_send_cmd(struct ixgbe_hw *hw, struct ixgbe_aci_desc *desc, + void *buf, u16 buf_size) +{ + struct ixgbe_aci_desc desc_cpy; + enum ixgbe_aci_err last_status; + bool is_cmd_for_retry; + u8 *buf_cpy = NULL; + s32 status; + u16 opcode; + u8 idx = 0; + + opcode = IXGBE_LE16_TO_CPU(desc->opcode); + is_cmd_for_retry = ixgbe_should_retry_aci_send_cmd_execute(opcode); + memset(&desc_cpy, 0, sizeof(desc_cpy)); + + if (is_cmd_for_retry) { + if (buf) { + buf_cpy = (u8 *)ixgbe_malloc(hw, buf_size); + if (!buf_cpy) + return IXGBE_ERR_OUT_OF_MEM; + memcpy(buf_cpy, buf, buf_size); + } + memcpy(&desc_cpy, desc, sizeof(desc_cpy)); + } + + do { + ixgbe_acquire_lock(&hw->aci.lock); + status = ixgbe_aci_send_cmd_execute(hw, desc, buf, buf_size); + last_status = hw->aci.last_status; + ixgbe_release_lock(&hw->aci.lock); + + if (!is_cmd_for_retry || status == IXGBE_SUCCESS || + (last_status != IXGBE_ACI_RC_EBUSY && status != IXGBE_ERR_ACI_ERROR)) + break; + + if (buf) + memcpy(buf, buf_cpy, buf_size); + memcpy(desc, &desc_cpy, sizeof(desc_cpy)); + + msec_delay(IXGBE_ACI_SEND_DELAY_TIME_MS); + } while (++idx < IXGBE_ACI_SEND_MAX_EXECUTE); + + if (buf_cpy) + ixgbe_free(hw, buf_cpy); + + return status; +} + +/** + * ixgbe_aci_check_event_pending - check if there are any pending events + * @hw: pointer to the HW struct + * + * Determine if there are any pending events. + * + * Return: true if there are any currently pending events + * otherwise false. + */ +bool ixgbe_aci_check_event_pending(struct ixgbe_hw *hw) +{ + u32 ep_bit_mask; + u32 fwsts; + + ep_bit_mask = hw->bus.func ? GL_FWSTS_EP_PF1 : GL_FWSTS_EP_PF0; + + /* Check state of Event Pending (EP) bit */ + fwsts = IXGBE_READ_REG(hw, GL_FWSTS); + return (fwsts & ep_bit_mask) ? true : false; +} + +/** + * ixgbe_aci_get_event - get an event from ACI + * @hw: pointer to the HW struct + * @e: event information structure + * @pending: optional flag signaling that there are more pending events + * + * Obtain an event from ACI and return its content + * through 'e' using ACI command (0x0014). + * Provide information if there are more events + * to retrieve through 'pending'. + * + * Return: the exit code of the operation. + */ +s32 ixgbe_aci_get_event(struct ixgbe_hw *hw, struct ixgbe_aci_event *e, + bool *pending) +{ + struct ixgbe_aci_desc desc; + s32 status; + + if (!e || (!e->msg_buf && e->buf_len) || (e->msg_buf && !e->buf_len)) + return IXGBE_ERR_PARAM; + + ixgbe_acquire_lock(&hw->aci.lock); + + /* Check if there are any events pending */ + if (!ixgbe_aci_check_event_pending(hw)) { + status = IXGBE_ERR_ACI_NO_EVENTS; + goto aci_get_event_exit; + } + + /* Obtain pending event */ + ixgbe_fill_dflt_direct_cmd_desc(&desc, ixgbe_aci_opc_get_fw_event); + status = ixgbe_aci_send_cmd_execute(hw, &desc, e->msg_buf, e->buf_len); + if (status) + goto aci_get_event_exit; + + /* Returned 0x0014 opcode indicates that no event was obtained */ + if (desc.opcode == IXGBE_CPU_TO_LE16(ixgbe_aci_opc_get_fw_event)) { + status = IXGBE_ERR_ACI_NO_EVENTS; + goto aci_get_event_exit; + } + + /* Determine size of event data */ + e->msg_len = MIN_T(u16, IXGBE_LE16_TO_CPU(desc.datalen), e->buf_len); + /* Write event descriptor to event info structure */ + memcpy(&e->desc, &desc, sizeof(e->desc)); + + /* Check if there are any further events pending */ + if (pending) { + *pending = ixgbe_aci_check_event_pending(hw); + } + +aci_get_event_exit: + ixgbe_release_lock(&hw->aci.lock); + + return status; +} + +/** + * ixgbe_fill_dflt_direct_cmd_desc - fill ACI descriptor with default values. + * @desc: pointer to the temp descriptor (non DMA mem) + * @opcode: the opcode can be used to decide which flags to turn off or on + * + * Helper function to fill the descriptor desc with default values + * and the provided opcode. + */ +void ixgbe_fill_dflt_direct_cmd_desc(struct ixgbe_aci_desc *desc, u16 opcode) +{ + /* zero out the desc */ + memset(desc, 0, sizeof(*desc)); + desc->opcode = IXGBE_CPU_TO_LE16(opcode); + desc->flags = IXGBE_CPU_TO_LE16(IXGBE_ACI_FLAG_SI); +} + +/** + * ixgbe_aci_get_fw_ver - get the firmware version + * @hw: pointer to the HW struct + * + * Get the firmware version using ACI command (0x0001). + * + * Return: the exit code of the operation. + */ +s32 ixgbe_aci_get_fw_ver(struct ixgbe_hw *hw) +{ + struct ixgbe_aci_cmd_get_ver *resp; + struct ixgbe_aci_desc desc; + s32 status; + + resp = &desc.params.get_ver; + + ixgbe_fill_dflt_direct_cmd_desc(&desc, ixgbe_aci_opc_get_ver); + + status = ixgbe_aci_send_cmd(hw, &desc, NULL, 0); + + if (!status) { + hw->fw_branch = resp->fw_branch; + hw->fw_maj_ver = resp->fw_major; + hw->fw_min_ver = resp->fw_minor; + hw->fw_patch = resp->fw_patch; + hw->fw_build = IXGBE_LE32_TO_CPU(resp->fw_build); + hw->api_branch = resp->api_branch; + hw->api_maj_ver = resp->api_major; + hw->api_min_ver = resp->api_minor; + hw->api_patch = resp->api_patch; + } + + return status; +} + +/** + * ixgbe_aci_send_driver_ver - send the driver version to firmware + * @hw: pointer to the HW struct + * @dv: driver's major, minor version + * + * Send the driver version to the firmware + * using the ACI command (0x0002). + * + * Return: the exit code of the operation. + * Returns IXGBE_ERR_PARAM, if dv is NULL. + */ +s32 ixgbe_aci_send_driver_ver(struct ixgbe_hw *hw, struct ixgbe_driver_ver *dv) +{ + struct ixgbe_aci_cmd_driver_ver *cmd; + struct ixgbe_aci_desc desc; + u16 len; + + cmd = &desc.params.driver_ver; + + if (!dv) + return IXGBE_ERR_PARAM; + + ixgbe_fill_dflt_direct_cmd_desc(&desc, ixgbe_aci_opc_driver_ver); + + desc.flags |= IXGBE_CPU_TO_LE16(IXGBE_ACI_FLAG_RD); + cmd->major_ver = dv->major_ver; + cmd->minor_ver = dv->minor_ver; + cmd->build_ver = dv->build_ver; + cmd->subbuild_ver = dv->subbuild_ver; + + len = 0; + while (len < sizeof(dv->driver_string) && + IS_ASCII(dv->driver_string[len]) && dv->driver_string[len]) + len++; + + return ixgbe_aci_send_cmd(hw, &desc, dv->driver_string, len); +} + +/** + * ixgbe_aci_req_res - request a common resource + * @hw: pointer to the HW struct + * @res: resource ID + * @access: access type + * @sdp_number: resource number + * @timeout: the maximum time in ms that the driver may hold the resource + * + * Requests a common resource using the ACI command (0x0008). + * Specifies the maximum time the driver may hold the resource. + * If the requested resource is currently occupied by some other driver, + * a busy return value is returned and the timeout field value indicates the + * maximum time the current owner has to free it. + * + * Return: the exit code of the operation. + */ +static s32 +ixgbe_aci_req_res(struct ixgbe_hw *hw, enum ixgbe_aci_res_ids res, + enum ixgbe_aci_res_access_type access, u8 sdp_number, + u32 *timeout) +{ + struct ixgbe_aci_cmd_req_res *cmd_resp; + struct ixgbe_aci_desc desc; + s32 status; + + cmd_resp = &desc.params.res_owner; + + ixgbe_fill_dflt_direct_cmd_desc(&desc, ixgbe_aci_opc_req_res); + + cmd_resp->res_id = IXGBE_CPU_TO_LE16(res); + cmd_resp->access_type = IXGBE_CPU_TO_LE16(access); + cmd_resp->res_number = IXGBE_CPU_TO_LE32(sdp_number); + cmd_resp->timeout = IXGBE_CPU_TO_LE32(*timeout); + *timeout = 0; + + status = ixgbe_aci_send_cmd(hw, &desc, NULL, 0); + + /* The completion specifies the maximum time in ms that the driver + * may hold the resource in the Timeout field. + */ + + /* If the resource is held by some other driver, the command completes + * with a busy return value and the timeout field indicates the maximum + * time the current owner of the resource has to free it. + */ + if (!status || hw->aci.last_status == IXGBE_ACI_RC_EBUSY) + *timeout = IXGBE_LE32_TO_CPU(cmd_resp->timeout); + + return status; +} + +/** + * ixgbe_aci_release_res - release a common resource using ACI + * @hw: pointer to the HW struct + * @res: resource ID + * @sdp_number: resource number + * + * Release a common resource using ACI command (0x0009). + * + * Return: the exit code of the operation. + */ +static s32 +ixgbe_aci_release_res(struct ixgbe_hw *hw, enum ixgbe_aci_res_ids res, + u8 sdp_number) +{ + struct ixgbe_aci_cmd_req_res *cmd; + struct ixgbe_aci_desc desc; + + cmd = &desc.params.res_owner; + + ixgbe_fill_dflt_direct_cmd_desc(&desc, ixgbe_aci_opc_release_res); + + cmd->res_id = IXGBE_CPU_TO_LE16(res); + cmd->res_number = IXGBE_CPU_TO_LE32(sdp_number); + + return ixgbe_aci_send_cmd(hw, &desc, NULL, 0); +} + +/** + * ixgbe_acquire_res - acquire the ownership of a resource + * @hw: pointer to the HW structure + * @res: resource ID + * @access: access type (read or write) + * @timeout: timeout in milliseconds + * + * Make an attempt to acquire the ownership of a resource using + * the ixgbe_aci_req_res to utilize ACI. + * In case if some other driver has previously acquired the resource and + * performed any necessary updates, the IXGBE_ERR_ACI_NO_WORK is returned, + * and the caller does not obtain the resource and has no further work to do. + * If needed, the function will poll until the current lock owner timeouts. + * + * Return: the exit code of the operation. + */ +s32 ixgbe_acquire_res(struct ixgbe_hw *hw, enum ixgbe_aci_res_ids res, + enum ixgbe_aci_res_access_type access, u32 timeout) +{ +#define IXGBE_RES_POLLING_DELAY_MS 10 + u32 delay = IXGBE_RES_POLLING_DELAY_MS; + u32 res_timeout = timeout; + u32 retry_timeout = 0; + s32 status; + + status = ixgbe_aci_req_res(hw, res, access, 0, &res_timeout); + + /* A return code of IXGBE_ERR_ACI_NO_WORK means that another driver has + * previously acquired the resource and performed any necessary updates; + * in this case the caller does not obtain the resource and has no + * further work to do. + */ + if (status == IXGBE_ERR_ACI_NO_WORK) + goto ixgbe_acquire_res_exit; + + /* If necessary, poll until the current lock owner timeouts. + * Set retry_timeout to the timeout value reported by the FW in the + * response to the "Request Resource Ownership" (0x0008) Admin Command + * as it indicates the maximum time the current owner of the resource + * is allowed to hold it. + */ + retry_timeout = res_timeout; + while (status && retry_timeout && res_timeout) { + msec_delay(delay); + retry_timeout = (retry_timeout > delay) ? + retry_timeout - delay : 0; + status = ixgbe_aci_req_res(hw, res, access, 0, &res_timeout); + + if (status == IXGBE_ERR_ACI_NO_WORK) + /* lock free, but no work to do */ + break; + + if (!status) + /* lock acquired */ + break; + } + +ixgbe_acquire_res_exit: + return status; +} + +/** + * ixgbe_release_res - release a common resource + * @hw: pointer to the HW structure + * @res: resource ID + * + * Release a common resource using ixgbe_aci_release_res. + */ +void ixgbe_release_res(struct ixgbe_hw *hw, enum ixgbe_aci_res_ids res) +{ + u32 total_delay = 0; + s32 status; + + status = ixgbe_aci_release_res(hw, res, 0); + + /* There are some rare cases when trying to release the resource + * results in an admin command timeout, so handle them correctly. + */ + while ((status == IXGBE_ERR_ACI_TIMEOUT) && + (total_delay < IXGBE_ACI_RELEASE_RES_TIMEOUT)) { + msec_delay(1); + status = ixgbe_aci_release_res(hw, res, 0); + total_delay++; + } +} + +/** + * ixgbe_parse_common_caps - Parse common device/function capabilities + * @hw: pointer to the HW struct + * @caps: pointer to common capabilities structure + * @elem: the capability element to parse + * @prefix: message prefix for tracing capabilities + * + * Given a capability element, extract relevant details into the common + * capability structure. + * + * Return: true if the capability matches one of the common capability ids, + * false otherwise. + */ +static bool +ixgbe_parse_common_caps(struct ixgbe_hw *hw, struct ixgbe_hw_common_caps *caps, + struct ixgbe_aci_cmd_list_caps_elem *elem, + const char *prefix) +{ + u32 logical_id = IXGBE_LE32_TO_CPU(elem->logical_id); + u32 phys_id = IXGBE_LE32_TO_CPU(elem->phys_id); + u32 number = IXGBE_LE32_TO_CPU(elem->number); + u16 cap = IXGBE_LE16_TO_CPU(elem->cap); + bool found = true; + + UNREFERENCED_1PARAMETER(hw); + + switch (cap) { + case IXGBE_ACI_CAPS_VALID_FUNCTIONS: + caps->valid_functions = number; + break; + case IXGBE_ACI_CAPS_VMDQ: + caps->vmdq = (number == 1); + break; + case IXGBE_ACI_CAPS_DCB: + caps->dcb = (number == 1); + caps->active_tc_bitmap = logical_id; + caps->maxtc = phys_id; + break; + case IXGBE_ACI_CAPS_RSS: + caps->rss_table_size = number; + caps->rss_table_entry_width = logical_id; + break; + case IXGBE_ACI_CAPS_RXQS: + caps->num_rxq = number; + caps->rxq_first_id = phys_id; + break; + case IXGBE_ACI_CAPS_TXQS: + caps->num_txq = number; + caps->txq_first_id = phys_id; + break; + case IXGBE_ACI_CAPS_MSIX: + caps->num_msix_vectors = number; + caps->msix_vector_first_id = phys_id; + break; + case IXGBE_ACI_CAPS_NVM_VER: + break; + case IXGBE_ACI_CAPS_PENDING_NVM_VER: + caps->nvm_update_pending_nvm = true; + break; + case IXGBE_ACI_CAPS_PENDING_OROM_VER: + caps->nvm_update_pending_orom = true; + break; + case IXGBE_ACI_CAPS_PENDING_NET_VER: + caps->nvm_update_pending_netlist = true; + break; + case IXGBE_ACI_CAPS_NVM_MGMT: + caps->sec_rev_disabled = + (number & IXGBE_NVM_MGMT_SEC_REV_DISABLED) ? + true : false; + caps->update_disabled = + (number & IXGBE_NVM_MGMT_UPDATE_DISABLED) ? + true : false; + caps->nvm_unified_update = + (number & IXGBE_NVM_MGMT_UNIFIED_UPD_SUPPORT) ? + true : false; + caps->netlist_auth = + (number & IXGBE_NVM_MGMT_NETLIST_AUTH_SUPPORT) ? + true : false; + break; + case IXGBE_ACI_CAPS_MAX_MTU: + caps->max_mtu = number; + break; + case IXGBE_ACI_CAPS_PCIE_RESET_AVOIDANCE: + caps->pcie_reset_avoidance = (number > 0); + break; + case IXGBE_ACI_CAPS_POST_UPDATE_RESET_RESTRICT: + caps->reset_restrict_support = (number == 1); + break; + case IXGBE_ACI_CAPS_EXT_TOPO_DEV_IMG0: + case IXGBE_ACI_CAPS_EXT_TOPO_DEV_IMG1: + case IXGBE_ACI_CAPS_EXT_TOPO_DEV_IMG2: + case IXGBE_ACI_CAPS_EXT_TOPO_DEV_IMG3: + { + u8 index = cap - IXGBE_ACI_CAPS_EXT_TOPO_DEV_IMG0; + + caps->ext_topo_dev_img_ver_high[index] = number; + caps->ext_topo_dev_img_ver_low[index] = logical_id; + caps->ext_topo_dev_img_part_num[index] = + (phys_id & IXGBE_EXT_TOPO_DEV_IMG_PART_NUM_M) >> + IXGBE_EXT_TOPO_DEV_IMG_PART_NUM_S; + caps->ext_topo_dev_img_load_en[index] = + (phys_id & IXGBE_EXT_TOPO_DEV_IMG_LOAD_EN) != 0; + caps->ext_topo_dev_img_prog_en[index] = + (phys_id & IXGBE_EXT_TOPO_DEV_IMG_PROG_EN) != 0; + break; + } + case IXGBE_ACI_CAPS_OROM_RECOVERY_UPDATE: + caps->orom_recovery_update = (number == 1); + break; + + case IXGBE_ACI_CAPS_NEXT_CLUSTER_ID: + caps->next_cluster_id_support = (number == 1); + hw_dbg(hw, "%s: next_cluster_id_support = %d\n", + prefix, caps->next_cluster_id_support); + break; +#ifndef NO_PTP_SUPPORT + case IXGBE_ACI_CAPS_PTP_BY_PHY: + caps->ptp_by_phy_support = + (number & IXGBE_ACI_CAPS_PTP_BY_PHY_SUPP) ? true : + false; + caps->ptp_by_phy_ll = + (number & IXGBE_ACI_CAPS_PTP_BY_PHY_LL) ? true : false; + hw_dbg(hw, "%s: ptp_by_phy_support = %d, low_latency = %d\n", + prefix, caps->ptp_by_phy_support, + caps->ptp_by_phy_ll); + break; +#endif /* !NO_PTP_SUPPORT */ + case IXGBE_ACI_CAPS_EEE: + caps->eee_support = (u8)number; + hw_dbg(hw, "%s: eee_support = %x\n", prefix, caps->eee_support); + break; + default: + /* Not one of the recognized common capabilities */ + found = false; + } + + return found; +} + +/** + * ixgbe_hweight8 - count set bits among the 8 lowest bits + * @w: variable storing set bits to count + * + * Return: the number of set bits among the 8 lowest bits in the provided value. + */ +static u8 ixgbe_hweight8(u32 w) +{ + u8 hweight = 0, i; + + for (i = 0; i < 8; i++) + if (w & (1 << i)) + hweight++; + + return hweight; +} + +/** + * ixgbe_hweight32 - count set bits among the 32 lowest bits + * @w: variable storing set bits to count + * + * Return: the number of set bits among the 32 lowest bits in the + * provided value. + */ +static u8 ixgbe_hweight32(u32 w) +{ + return (u8)hweight32(w); /* narrow at the leaf if needed */ +} + +/** + * ixgbe_parse_valid_functions_cap - Parse IXGBE_ACI_CAPS_VALID_FUNCTIONS caps + * @hw: pointer to the HW struct + * @dev_p: pointer to device capabilities structure + * @cap: capability element to parse + * + * Parse IXGBE_ACI_CAPS_VALID_FUNCTIONS for device capabilities. + */ +static void +ixgbe_parse_valid_functions_cap(struct ixgbe_hw *hw, + struct ixgbe_hw_dev_caps *dev_p, + struct ixgbe_aci_cmd_list_caps_elem *cap) +{ + u32 number = IXGBE_LE32_TO_CPU(cap->number); + + UNREFERENCED_1PARAMETER(hw); + + dev_p->num_funcs = ixgbe_hweight32(number); + +} + +/** + * ixgbe_parse_vsi_dev_caps - Parse IXGBE_ACI_CAPS_VSI device caps + * @hw: pointer to the HW struct + * @dev_p: pointer to device capabilities structure + * @cap: capability element to parse + * + * Parse IXGBE_ACI_CAPS_VSI for device capabilities. + */ +static void ixgbe_parse_vsi_dev_caps(struct ixgbe_hw *hw, + struct ixgbe_hw_dev_caps *dev_p, + struct ixgbe_aci_cmd_list_caps_elem *cap) +{ + u32 number = IXGBE_LE32_TO_CPU(cap->number); + + UNREFERENCED_1PARAMETER(hw); + + dev_p->num_vsi_allocd_to_host = number; +} + +#ifndef NO_PTP_SUPPORT +/** + * ixgbe_parse_1588_dev_caps - Parse IXGBE_ACI_CAPS_1588 device caps + * @hw: pointer to the HW struct + * @dev_p: pointer to device capabilities structure + * @cap: capability element to parse + * + * Parse IXGBE_ACI_CAPS_1588 for device capabilities. + */ +static void ixgbe_parse_1588_dev_caps(struct ixgbe_hw *hw, + struct ixgbe_hw_dev_caps *dev_p, + struct ixgbe_aci_cmd_list_caps_elem *cap) +{ + struct ixgbe_ts_dev_info *info = &dev_p->ts_dev_info; + u32 logical_id = IXGBE_LE32_TO_CPU(cap->logical_id); + u32 phys_id = IXGBE_LE32_TO_CPU(cap->phys_id); + u32 number = IXGBE_LE32_TO_CPU(cap->number); + + UNREFERENCED_1PARAMETER(hw); + + info->ena = ((number & IXGBE_TS_DEV_ENA_M) != 0); + dev_p->common_cap.ieee_1588 = info->ena; + + info->tmr0_owner = number & IXGBE_TS_TMR0_OWNR_M; + info->tmr0_owned = ((number & IXGBE_TS_TMR0_OWND_M) != 0); + info->tmr0_ena = ((number & IXGBE_TS_TMR0_ENA_M) != 0); + + info->tmr1_owner = (number & IXGBE_TS_TMR1_OWNR_M) >> + IXGBE_TS_TMR1_OWNR_S; + info->tmr1_owned = ((number & IXGBE_TS_TMR1_OWND_M) != 0); + info->tmr1_ena = ((number & IXGBE_TS_TMR1_ENA_M) != 0); + + info->ena_ports = logical_id; + info->tmr_own_map = phys_id; + +} +#endif /* NO_PTP_SUPPORT */ + +/** + * ixgbe_parse_fdir_dev_caps - Parse IXGBE_ACI_CAPS_FD device caps + * @hw: pointer to the HW struct + * @dev_p: pointer to device capabilities structure + * @cap: capability element to parse + * + * Parse IXGBE_ACI_CAPS_FD for device capabilities. + */ +static void ixgbe_parse_fdir_dev_caps(struct ixgbe_hw *hw, + struct ixgbe_hw_dev_caps *dev_p, + struct ixgbe_aci_cmd_list_caps_elem *cap) +{ + u32 number = IXGBE_LE32_TO_CPU(cap->number); + + UNREFERENCED_1PARAMETER(hw); + + dev_p->num_flow_director_fltr = number; +} + +/** + * ixgbe_parse_dev_caps - Parse device capabilities + * @hw: pointer to the HW struct + * @dev_p: pointer to device capabilities structure + * @buf: buffer containing the device capability records + * @cap_count: the number of capabilities + * + * Helper device to parse device (0x000B) capabilities list. For + * capabilities shared between device and function, this relies on + * ixgbe_parse_common_caps. + * + * Loop through the list of provided capabilities and extract the relevant + * data into the device capabilities structured. + */ +static void ixgbe_parse_dev_caps(struct ixgbe_hw *hw, + struct ixgbe_hw_dev_caps *dev_p, + void *buf, u32 cap_count) +{ + struct ixgbe_aci_cmd_list_caps_elem *cap_resp; + u32 i; + + cap_resp = (struct ixgbe_aci_cmd_list_caps_elem *)buf; + + memset(dev_p, 0, sizeof(*dev_p)); + + for (i = 0; i < cap_count; i++) { + u16 cap = IXGBE_LE16_TO_CPU(cap_resp[i].cap); + bool found; + + found = ixgbe_parse_common_caps(hw, &dev_p->common_cap, + &cap_resp[i], "dev caps"); + + switch (cap) { + case IXGBE_ACI_CAPS_VALID_FUNCTIONS: + ixgbe_parse_valid_functions_cap(hw, dev_p, + &cap_resp[i]); + break; + case IXGBE_ACI_CAPS_VSI: + ixgbe_parse_vsi_dev_caps(hw, dev_p, &cap_resp[i]); + break; +#ifndef NO_PTP_SUPPORT + case IXGBE_ACI_CAPS_1588: + ixgbe_parse_1588_dev_caps(hw, dev_p, &cap_resp[i]); + break; +#endif /* !NO_PTP_SUPPORT */ + case IXGBE_ACI_CAPS_FD: + ixgbe_parse_fdir_dev_caps(hw, dev_p, &cap_resp[i]); + break; + default: + /* Don't list common capabilities as unknown */ + if (!found) + break; + } + } + +} + +/** + * ixgbe_get_num_per_func - determine number of resources per PF + * @hw: pointer to the HW structure + * @max: value to be evenly split between each PF + * + * Determine the number of valid functions by going through the bitmap returned + * from parsing capabilities and use this to calculate the number of resources + * per PF based on the max value passed in. + * + * Return: the number of resources per PF or 0, if no PH are available. + */ +static u32 ixgbe_get_num_per_func(struct ixgbe_hw *hw, u32 max) +{ + u8 funcs; + +#define IXGBE_CAPS_VALID_FUNCS_M 0xFF + funcs = ixgbe_hweight8(hw->dev_caps.common_cap.valid_functions & + IXGBE_CAPS_VALID_FUNCS_M); + + if (!funcs) + return 0; + + return max / funcs; +} + +/** + * ixgbe_parse_vsi_func_caps - Parse IXGBE_ACI_CAPS_VSI function caps + * @hw: pointer to the HW struct + * @func_p: pointer to function capabilities structure + * @cap: pointer to the capability element to parse + * + * Extract function capabilities for IXGBE_ACI_CAPS_VSI. + */ +static void ixgbe_parse_vsi_func_caps(struct ixgbe_hw *hw, + struct ixgbe_hw_func_caps *func_p, + struct ixgbe_aci_cmd_list_caps_elem *cap) +{ + func_p->guar_num_vsi = ixgbe_get_num_per_func(hw, IXGBE_MAX_VSI); +} + +#ifndef NO_PTP_SUPPORT +/** + * ixgbe_parse_1588_func_caps - Parse IXGBE_ACI_CAPS_1588 function caps + * @hw: pointer to the HW struct + * @func_p: pointer to function capabilities structure + * @cap: pointer to the capability element to parse + * + * Extract function capabilities for IXGBE_ACI_CAPS_1588. + */ +static void ixgbe_parse_1588_func_caps(struct ixgbe_hw *hw, + struct ixgbe_hw_func_caps *func_p, + struct ixgbe_aci_cmd_list_caps_elem *cap) +{ + struct ixgbe_ts_func_info *info = &func_p->ts_func_info; + u32 number = IXGBE_LE32_TO_CPU(cap->number); + + UNREFERENCED_1PARAMETER(hw); + + info->ena = ((number & IXGBE_TS_FUNC_ENA_M) != 0); + func_p->common_cap.ieee_1588 = info->ena; + + info->src_tmr_owned = ((number & IXGBE_TS_SRC_TMR_OWND_M) != 0); + info->tmr_ena = ((number & IXGBE_TS_TMR_ENA_M) != 0); + info->tmr_index_owned = ((number & IXGBE_TS_TMR_IDX_OWND_M) != 0); + info->tmr_index_assoc = ((number & IXGBE_TS_TMR_IDX_ASSOC_M) != 0); + + info->clk_freq = (number & IXGBE_TS_CLK_FREQ_M) >> IXGBE_TS_CLK_FREQ_S; + info->clk_src = ((number & IXGBE_TS_CLK_SRC_M) != 0); + + if (info->clk_freq < NUM_IXGBE_TIME_REF_FREQ) { + info->time_ref = (enum ixgbe_time_ref_freq)info->clk_freq; + } else { + /* Unknown clock frequency, so assume a (probably incorrect) + * default to avoid out-of-bounds look ups of frequency + * related information. + */ + info->time_ref = IXGBE_TIME_REF_FREQ_25_000; + } + +} +#endif /* NO_PTP_SUPPORT */ +/** + * ixgbe_parse_func_caps - Parse function capabilities + * @hw: pointer to the HW struct + * @func_p: pointer to function capabilities structure + * @buf: buffer containing the function capability records + * @cap_count: the number of capabilities + * + * Helper function to parse function (0x000A) capabilities list. For + * capabilities shared between device and function, this relies on + * ixgbe_parse_common_caps. + * + * Loop through the list of provided capabilities and extract the relevant + * data into the function capabilities structured. + */ +static void ixgbe_parse_func_caps(struct ixgbe_hw *hw, + struct ixgbe_hw_func_caps *func_p, + void *buf, u32 cap_count) +{ + struct ixgbe_aci_cmd_list_caps_elem *cap_resp; + u32 i; + + cap_resp = (struct ixgbe_aci_cmd_list_caps_elem *)buf; + + memset(func_p, 0, sizeof(*func_p)); + + for (i = 0; i < cap_count; i++) { + u16 cap = IXGBE_LE16_TO_CPU(cap_resp[i].cap); + + ixgbe_parse_common_caps(hw, &func_p->common_cap, + &cap_resp[i], "func caps"); + + switch (cap) { + case IXGBE_ACI_CAPS_VSI: + ixgbe_parse_vsi_func_caps(hw, func_p, &cap_resp[i]); + break; +#ifndef NO_PTP_SUPPORT + case IXGBE_ACI_CAPS_1588: + ixgbe_parse_1588_func_caps(hw, func_p, &cap_resp[i]); + break; +#endif /* NO_PTP_SUPPORT */ + default: + /* Don't list common capabilities as unknown */ + break; + } + } + +} + +/** + * ixgbe_aci_list_caps - query function/device capabilities + * @hw: pointer to the HW struct + * @buf: a buffer to hold the capabilities + * @buf_size: size of the buffer + * @cap_count: if not NULL, set to the number of capabilities reported + * @opc: capabilities type to discover, device or function + * + * Get the function (0x000A) or device (0x000B) capabilities description from + * firmware and store it in the buffer. + * + * If the cap_count pointer is not NULL, then it is set to the number of + * capabilities firmware will report. Note that if the buffer size is too + * small, it is possible the command will return IXGBE_ERR_OUT_OF_MEM. The + * cap_count will still be updated in this case. It is recommended that the + * buffer size be set to IXGBE_ACI_MAX_BUFFER_SIZE (the largest possible + * buffer that firmware could return) to avoid this. + * + * Return: the exit code of the operation. + * Exit code of IXGBE_ERR_OUT_OF_MEM means the buffer size is too small. + */ +s32 ixgbe_aci_list_caps(struct ixgbe_hw *hw, void *buf, u16 buf_size, + u32 *cap_count, enum ixgbe_aci_opc opc) +{ + struct ixgbe_aci_cmd_list_caps *cmd; + struct ixgbe_aci_desc desc; + s32 status; + + cmd = &desc.params.get_cap; + + if (opc != ixgbe_aci_opc_list_func_caps && + opc != ixgbe_aci_opc_list_dev_caps) + return IXGBE_ERR_PARAM; + + ixgbe_fill_dflt_direct_cmd_desc(&desc, opc); + status = ixgbe_aci_send_cmd(hw, &desc, buf, buf_size); + + if (cap_count) + *cap_count = IXGBE_LE32_TO_CPU(cmd->count); + + return status; +} + +/** + * ixgbe_discover_dev_caps - Read and extract device capabilities + * @hw: pointer to the hardware structure + * @dev_caps: pointer to device capabilities structure + * + * Read the device capabilities and extract them into the dev_caps structure + * for later use. + * + * Return: the exit code of the operation. + */ +s32 ixgbe_discover_dev_caps(struct ixgbe_hw *hw, + struct ixgbe_hw_dev_caps *dev_caps) +{ + u32 cap_count = 0; + u8 *cbuf = NULL; + s32 status; + + cbuf = (u8*)ixgbe_malloc(hw, IXGBE_ACI_MAX_BUFFER_SIZE); + if (!cbuf) + return IXGBE_ERR_OUT_OF_MEM; + /* Although the driver doesn't know the number of capabilities the + * device will return, we can simply send a 4KB buffer, the maximum + * possible size that firmware can return. + */ + cap_count = IXGBE_ACI_MAX_BUFFER_SIZE / + sizeof(struct ixgbe_aci_cmd_list_caps_elem); + + status = ixgbe_aci_list_caps(hw, cbuf, IXGBE_ACI_MAX_BUFFER_SIZE, + &cap_count, + ixgbe_aci_opc_list_dev_caps); + if (!status) + ixgbe_parse_dev_caps(hw, dev_caps, cbuf, cap_count); + + if (cbuf) + ixgbe_free(hw, cbuf); + + return status; +} + +/** + * ixgbe_discover_func_caps - Read and extract function capabilities + * @hw: pointer to the hardware structure + * @func_caps: pointer to function capabilities structure + * + * Read the function capabilities and extract them into the func_caps structure + * for later use. + * + * Return: the exit code of the operation. + */ +s32 ixgbe_discover_func_caps(struct ixgbe_hw *hw, + struct ixgbe_hw_func_caps *func_caps) +{ + u32 cap_count = 0; + u8 *cbuf = NULL; + s32 status; + + cbuf = (u8*)ixgbe_malloc(hw, IXGBE_ACI_MAX_BUFFER_SIZE); + if(!cbuf) + return IXGBE_ERR_OUT_OF_MEM; + /* Although the driver doesn't know the number of capabilities the + * device will return, we can simply send a 4KB buffer, the maximum + * possible size that firmware can return. + */ + cap_count = IXGBE_ACI_MAX_BUFFER_SIZE / + sizeof(struct ixgbe_aci_cmd_list_caps_elem); + + status = ixgbe_aci_list_caps(hw, cbuf, IXGBE_ACI_MAX_BUFFER_SIZE, + &cap_count, + ixgbe_aci_opc_list_func_caps); + if (!status) + ixgbe_parse_func_caps(hw, func_caps, cbuf, cap_count); + + if (cbuf) + ixgbe_free(hw, cbuf); + + return status; +} + +/** + * ixgbe_get_caps - get info about the HW + * @hw: pointer to the hardware structure + * + * Retrieve both device and function capabilities. + * + * Return: the exit code of the operation. + */ +s32 ixgbe_get_caps(struct ixgbe_hw *hw) +{ + s32 status; + + status = ixgbe_discover_dev_caps(hw, &hw->dev_caps); + if (status) + return status; + + return ixgbe_discover_func_caps(hw, &hw->func_caps); +} + +/** + * ixgbe_aci_disable_rxen - disable RX + * @hw: pointer to the HW struct + * + * Request a safe disable of Receive Enable using ACI command (0x000C). + * + * Return: the exit code of the operation. + */ +s32 ixgbe_aci_disable_rxen(struct ixgbe_hw *hw) +{ + struct ixgbe_aci_cmd_disable_rxen *cmd; + struct ixgbe_aci_desc desc; + + UNREFERENCED_1PARAMETER(hw); + + cmd = &desc.params.disable_rxen; + + ixgbe_fill_dflt_direct_cmd_desc(&desc, ixgbe_aci_opc_disable_rxen); + + cmd->lport_num = (u8)hw->bus.func; + + return ixgbe_aci_send_cmd(hw, &desc, NULL, 0); +} + +/** + * ixgbe_aci_get_phy_caps - returns PHY capabilities + * @hw: pointer to the HW struct + * @qual_mods: report qualified modules + * @report_mode: report mode capabilities + * @pcaps: structure for PHY capabilities to be filled + * + * Returns the various PHY capabilities supported on the Port + * using ACI command (0x0600). + * + * Return: the exit code of the operation. + */ +s32 ixgbe_aci_get_phy_caps(struct ixgbe_hw *hw, bool qual_mods, u8 report_mode, + struct ixgbe_aci_cmd_get_phy_caps_data *pcaps) +{ + struct ixgbe_aci_cmd_get_phy_caps *cmd; + u16 pcaps_size = sizeof(*pcaps); + struct ixgbe_aci_desc desc; + s32 status; + + cmd = &desc.params.get_phy; + + if (!pcaps || (report_mode & ~IXGBE_ACI_REPORT_MODE_M)) + return IXGBE_ERR_PARAM; + + ixgbe_fill_dflt_direct_cmd_desc(&desc, ixgbe_aci_opc_get_phy_caps); + + if (qual_mods) + cmd->param0 |= IXGBE_CPU_TO_LE16(IXGBE_ACI_GET_PHY_RQM); + + cmd->param0 |= IXGBE_CPU_TO_LE16(report_mode); + status = ixgbe_aci_send_cmd(hw, &desc, pcaps, pcaps_size); + + if (status == IXGBE_SUCCESS && + report_mode == IXGBE_ACI_REPORT_TOPO_CAP_MEDIA) { + hw->phy.phy_type_low = IXGBE_LE64_TO_CPU(pcaps->phy_type_low); + hw->phy.phy_type_high = IXGBE_LE64_TO_CPU(pcaps->phy_type_high); + memcpy(hw->link.link_info.module_type, &pcaps->module_type, + sizeof(hw->link.link_info.module_type)); + } + + return status; +} + +/** + * ixgbe_phy_caps_equals_cfg - check if capabilities match the PHY config + * @phy_caps: PHY capabilities + * @phy_cfg: PHY configuration + * + * Helper function to determine if PHY capabilities match PHY + * configuration + * + * Return: true if PHY capabilities match PHY configuration. + */ +bool +ixgbe_phy_caps_equals_cfg(struct ixgbe_aci_cmd_get_phy_caps_data *phy_caps, + struct ixgbe_aci_cmd_set_phy_cfg_data *phy_cfg) +{ + u8 caps_mask, cfg_mask; + + if (!phy_caps || !phy_cfg) + return false; + + /* These bits are not common between capabilities and configuration. + * Do not use them to determine equality. + */ + caps_mask = IXGBE_ACI_PHY_CAPS_MASK & ~(IXGBE_ACI_PHY_AN_MODE | + IXGBE_ACI_PHY_EN_MOD_QUAL); + cfg_mask = IXGBE_ACI_PHY_ENA_VALID_MASK & + ~IXGBE_ACI_PHY_ENA_AUTO_LINK_UPDT; + + if (phy_caps->phy_type_low != phy_cfg->phy_type_low || + phy_caps->phy_type_high != phy_cfg->phy_type_high || + ((phy_caps->caps & caps_mask) != (phy_cfg->caps & cfg_mask)) || + phy_caps->low_power_ctrl_an != phy_cfg->low_power_ctrl_an || + phy_caps->eee_cap != phy_cfg->eee_cap || + phy_caps->eeer_value != phy_cfg->eeer_value || + phy_caps->link_fec_options != phy_cfg->link_fec_opt) + return false; + + return true; +} + +/** + * ixgbe_copy_phy_caps_to_cfg - Copy PHY ability data to configuration data + * @caps: PHY ability structure to copy data from + * @cfg: PHY configuration structure to copy data to + * + * Helper function to copy data from PHY capabilities data structure + * to PHY configuration data structure + */ +void ixgbe_copy_phy_caps_to_cfg(struct ixgbe_aci_cmd_get_phy_caps_data *caps, + struct ixgbe_aci_cmd_set_phy_cfg_data *cfg) +{ + if (!caps || !cfg) + return; + + memset(cfg, 0, sizeof(*cfg)); + cfg->phy_type_low = caps->phy_type_low; + cfg->phy_type_high = caps->phy_type_high; + cfg->caps = caps->caps; + cfg->low_power_ctrl_an = caps->low_power_ctrl_an; + cfg->eee_cap = caps->eee_cap; + cfg->eeer_value = caps->eeer_value; + cfg->link_fec_opt = caps->link_fec_options; + cfg->module_compliance_enforcement = + caps->module_compliance_enforcement; + cfg->eee_entry_delay = caps->eee_entry_delay; +} + +/** + * ixgbe_aci_set_phy_cfg - set PHY configuration + * @hw: pointer to the HW struct + * @cfg: structure with PHY configuration data to be set + * + * Set the various PHY configuration parameters supported on the Port + * using ACI command (0x0601). + * One or more of the Set PHY config parameters may be ignored in an MFP + * mode as the PF may not have the privilege to set some of the PHY Config + * parameters. + * + * Return: the exit code of the operation. + */ +s32 ixgbe_aci_set_phy_cfg(struct ixgbe_hw *hw, + struct ixgbe_aci_cmd_set_phy_cfg_data *cfg) +{ + struct ixgbe_aci_desc desc; + bool use_1p40_buff; + s32 status; + + if (!cfg) + return IXGBE_ERR_PARAM; + use_1p40_buff = hw->dev_caps.common_cap.eee_support ? true : false; + + /* Ensure that only valid bits of cfg->caps can be turned on. */ + if (cfg->caps & ~IXGBE_ACI_PHY_ENA_VALID_MASK) { + cfg->caps &= IXGBE_ACI_PHY_ENA_VALID_MASK; + } + + ixgbe_fill_dflt_direct_cmd_desc(&desc, ixgbe_aci_opc_set_phy_cfg); + desc.flags |= IXGBE_CPU_TO_LE16(IXGBE_ACI_FLAG_RD); + + if (use_1p40_buff) { + status = ixgbe_aci_send_cmd(hw, &desc, cfg, sizeof(*cfg)); + } else { + struct ixgbe_aci_cmd_set_phy_cfg_data_pre_1_40 cfg_obsolete; + + memcpy(&cfg_obsolete, cfg, sizeof(cfg_obsolete)); + + status = ixgbe_aci_send_cmd(hw, &desc, &cfg_obsolete, + sizeof(cfg_obsolete)); + } + + /* even if the old buffer is used no need to worry about conversion */ + if (!status) + hw->phy.curr_user_phy_cfg = *cfg; + + return status; +} + +/** + * ixgbe_aci_set_link_restart_an - set up link and restart AN + * @hw: pointer to the HW struct + * @ena_link: if true: enable link, if false: disable link + * + * Function sets up the link and restarts the Auto-Negotiation over the link. + * + * Return: the exit code of the operation. + */ +s32 ixgbe_aci_set_link_restart_an(struct ixgbe_hw *hw, bool ena_link) +{ + struct ixgbe_aci_cmd_restart_an *cmd; + struct ixgbe_aci_desc desc; + + cmd = &desc.params.restart_an; + + ixgbe_fill_dflt_direct_cmd_desc(&desc, ixgbe_aci_opc_restart_an); + + cmd->cmd_flags = IXGBE_ACI_RESTART_AN_LINK_RESTART; + if (ena_link) + cmd->cmd_flags |= IXGBE_ACI_RESTART_AN_LINK_ENABLE; + else + cmd->cmd_flags &= ~IXGBE_ACI_RESTART_AN_LINK_ENABLE; + + return ixgbe_aci_send_cmd(hw, &desc, NULL, 0); +} + +/** + * ixgbe_is_media_cage_present - check if media cage is present + * @hw: pointer to the HW struct + * + * Identify presence of media cage using the ACI command (0x06E0). + * + * Return: true if media cage is present, else false. If no cage, then + * media type is backplane or BASE-T. + */ +static bool ixgbe_is_media_cage_present(struct ixgbe_hw *hw) +{ + struct ixgbe_aci_cmd_get_link_topo *cmd; + struct ixgbe_aci_desc desc; + + cmd = &desc.params.get_link_topo; + + ixgbe_fill_dflt_direct_cmd_desc(&desc, ixgbe_aci_opc_get_link_topo); + + cmd->addr.topo_params.node_type_ctx = + (IXGBE_ACI_LINK_TOPO_NODE_CTX_PORT << + IXGBE_ACI_LINK_TOPO_NODE_CTX_S); + + /* set node type */ + cmd->addr.topo_params.node_type_ctx |= + (IXGBE_ACI_LINK_TOPO_NODE_TYPE_M & + IXGBE_ACI_LINK_TOPO_NODE_TYPE_CAGE); + + /* Node type cage can be used to determine if cage is present. If AQC + * returns error (ENOENT), then no cage present. If no cage present then + * connection type is backplane or BASE-T. + */ + return ixgbe_aci_get_netlist_node(hw, cmd, NULL, NULL); +} + +/** + * ixgbe_get_media_type_from_phy_type - Gets media type based on phy type + * @hw: pointer to the HW struct + * + * Try to identify the media type based on the phy type. + * If more than one media type, the ixgbe_media_type_unknown is returned. + * First, phy_type_low is checked, then phy_type_high. + * If none are identified, the ixgbe_media_type_unknown is returned + * + * Return: type of a media based on phy type in form of enum. + */ +static enum ixgbe_media_type +ixgbe_get_media_type_from_phy_type(struct ixgbe_hw *hw) +{ + struct ixgbe_link_status *hw_link_info; + + if (!hw) + return ixgbe_media_type_unknown; + + hw_link_info = &hw->link.link_info; + if (hw_link_info->phy_type_low && hw_link_info->phy_type_high) + /* If more than one media type is selected, report unknown */ + return ixgbe_media_type_unknown; + + if (hw_link_info->phy_type_low) { + /* 1G SGMII is a special case where some DA cable PHYs + * may show this as an option when it really shouldn't + * be since SGMII is meant to be between a MAC and a PHY + * in a backplane. Try to detect this case and handle it + */ + if (hw_link_info->phy_type_low == IXGBE_PHY_TYPE_LOW_1G_SGMII && + (hw_link_info->module_type[IXGBE_ACI_MOD_TYPE_IDENT] == + IXGBE_ACI_MOD_TYPE_BYTE1_SFP_PLUS_CU_ACTIVE || + hw_link_info->module_type[IXGBE_ACI_MOD_TYPE_IDENT] == + IXGBE_ACI_MOD_TYPE_BYTE1_SFP_PLUS_CU_PASSIVE)) + return ixgbe_media_type_da; + + switch (hw_link_info->phy_type_low) { + case IXGBE_PHY_TYPE_LOW_1000BASE_SX: + case IXGBE_PHY_TYPE_LOW_1000BASE_LX: + case IXGBE_PHY_TYPE_LOW_10GBASE_SR: + case IXGBE_PHY_TYPE_LOW_10GBASE_LR: + case IXGBE_PHY_TYPE_LOW_25GBASE_SR: + case IXGBE_PHY_TYPE_LOW_25GBASE_LR: + return ixgbe_media_type_fiber; + case IXGBE_PHY_TYPE_LOW_10G_SFI_AOC_ACC: + case IXGBE_PHY_TYPE_LOW_25G_AUI_AOC_ACC: + return ixgbe_media_type_fiber; + case IXGBE_PHY_TYPE_LOW_100BASE_TX: + case IXGBE_PHY_TYPE_LOW_1000BASE_T: + case IXGBE_PHY_TYPE_LOW_2500BASE_T: + case IXGBE_PHY_TYPE_LOW_5GBASE_T: + case IXGBE_PHY_TYPE_LOW_10GBASE_T: + case IXGBE_PHY_TYPE_LOW_25GBASE_T: + return ixgbe_media_type_copper; + case IXGBE_PHY_TYPE_LOW_10G_SFI_DA: + case IXGBE_PHY_TYPE_LOW_25GBASE_CR: + case IXGBE_PHY_TYPE_LOW_25GBASE_CR_S: + case IXGBE_PHY_TYPE_LOW_25GBASE_CR1: + return ixgbe_media_type_da; + case IXGBE_PHY_TYPE_LOW_25G_AUI_C2C: + if (ixgbe_is_media_cage_present(hw)) + return ixgbe_media_type_aui; + fallthrough; + case IXGBE_PHY_TYPE_LOW_1000BASE_KX: + case IXGBE_PHY_TYPE_LOW_2500BASE_KX: + case IXGBE_PHY_TYPE_LOW_2500BASE_X: + case IXGBE_PHY_TYPE_LOW_5GBASE_KR: + case IXGBE_PHY_TYPE_LOW_10GBASE_KR_CR1: + case IXGBE_PHY_TYPE_LOW_10G_SFI_C2C: + case IXGBE_PHY_TYPE_LOW_25GBASE_KR: + case IXGBE_PHY_TYPE_LOW_25GBASE_KR1: + case IXGBE_PHY_TYPE_LOW_25GBASE_KR_S: + return ixgbe_media_type_backplane; + } + } else { + switch (hw_link_info->phy_type_high) { + case IXGBE_PHY_TYPE_HIGH_10BASE_T: + return ixgbe_media_type_copper; + } + } + return ixgbe_media_type_unknown; +} + +/** + * ixgbe_update_link_info - update status of the HW network link + * @hw: pointer to the HW struct + * + * Update the status of the HW network link. + * + * Return: the exit code of the operation. + */ +s32 ixgbe_update_link_info(struct ixgbe_hw *hw) +{ + struct ixgbe_aci_cmd_get_phy_caps_data *pcaps; + struct ixgbe_link_status *li; + s32 status; + + if (!hw) + return IXGBE_ERR_PARAM; + + li = &hw->link.link_info; + + status = ixgbe_aci_get_link_info(hw, true, NULL); + if (status) + return status; + + if (li->link_info & IXGBE_ACI_MEDIA_AVAILABLE) { + pcaps = (struct ixgbe_aci_cmd_get_phy_caps_data *) + ixgbe_malloc(hw, sizeof(*pcaps)); + if (!pcaps) + return IXGBE_ERR_OUT_OF_MEM; + + status = ixgbe_aci_get_phy_caps(hw, false, + IXGBE_ACI_REPORT_TOPO_CAP_MEDIA, + pcaps); + + if (status == IXGBE_SUCCESS) + memcpy(li->module_type, &pcaps->module_type, + sizeof(li->module_type)); + + ixgbe_free(hw, pcaps); + } + + return status; +} + +/** + * ixgbe_get_link_status - get status of the HW network link + * @hw: pointer to the HW struct + * @link_up: pointer to bool (true/false = linkup/linkdown) + * + * Variable link_up is true if link is up, false if link is down. + * The variable link_up is invalid if status is non zero. As a + * result of this call, link status reporting becomes enabled + * + * Return: the exit code of the operation. + */ +s32 ixgbe_get_link_status(struct ixgbe_hw *hw, bool *link_up) +{ + s32 status = IXGBE_SUCCESS; + + if (!hw || !link_up) + return IXGBE_ERR_PARAM; + + if (hw->link.get_link_info) { + status = ixgbe_update_link_info(hw); + if (status) { + return status; + } + } + + *link_up = hw->link.link_info.link_info & IXGBE_ACI_LINK_UP; + + return status; +} + +/** + * ixgbe_aci_get_link_info - get the link status + * @hw: pointer to the HW struct + * @ena_lse: enable/disable LinkStatusEvent reporting + * @link: pointer to link status structure - optional + * + * Get the current Link Status using ACI command (0x607). + * The current link can be optionally provided to update + * the status. + * + * Return: the link status of the adapter. + */ +s32 ixgbe_aci_get_link_info(struct ixgbe_hw *hw, bool ena_lse, + struct ixgbe_link_status *link) +{ + struct ixgbe_aci_cmd_get_link_status_data link_data = { 0 }; + struct ixgbe_aci_cmd_get_link_status *resp; + struct ixgbe_link_status *li_old, *li; + struct ixgbe_fc_info *hw_fc_info; + struct ixgbe_aci_desc desc; + bool tx_pause, rx_pause; + u8 cmd_flags; + s32 status; + + if (!hw) + return IXGBE_ERR_PARAM; + + li_old = &hw->link.link_info_old; + li = &hw->link.link_info; + hw_fc_info = &hw->fc; + + ixgbe_fill_dflt_direct_cmd_desc(&desc, ixgbe_aci_opc_get_link_status); + cmd_flags = (ena_lse) ? IXGBE_ACI_LSE_ENA : IXGBE_ACI_LSE_DIS; + resp = &desc.params.get_link_status; + resp->cmd_flags = cmd_flags; + + status = ixgbe_aci_send_cmd(hw, &desc, &link_data, sizeof(link_data)); + + if (status != IXGBE_SUCCESS) + return status; + + /* save off old link status information */ + *li_old = *li; + + /* update current link status information */ + li->link_speed = IXGBE_LE16_TO_CPU(link_data.link_speed); + li->phy_type_low = IXGBE_LE64_TO_CPU(link_data.phy_type_low); + li->phy_type_high = IXGBE_LE64_TO_CPU(link_data.phy_type_high); + li->link_info = link_data.link_info; + li->link_cfg_err = link_data.link_cfg_err; + li->an_info = link_data.an_info; + li->ext_info = link_data.ext_info; + li->max_frame_size = IXGBE_LE16_TO_CPU(link_data.max_frame_size); + li->fec_info = link_data.cfg & IXGBE_ACI_FEC_MASK; + li->topo_media_conflict = link_data.topo_media_conflict; + li->pacing = link_data.cfg & (IXGBE_ACI_CFG_PACING_M | + IXGBE_ACI_CFG_PACING_TYPE_M); + li->eee_status = link_data.eee_status; + + /* update fc info */ + tx_pause = !!(link_data.an_info & IXGBE_ACI_LINK_PAUSE_TX); + rx_pause = !!(link_data.an_info & IXGBE_ACI_LINK_PAUSE_RX); + if (tx_pause && rx_pause) + hw_fc_info->current_mode = ixgbe_fc_full; + else if (tx_pause) + hw_fc_info->current_mode = ixgbe_fc_tx_pause; + else if (rx_pause) + hw_fc_info->current_mode = ixgbe_fc_rx_pause; + else + hw_fc_info->current_mode = ixgbe_fc_none; + + li->lse_ena = !!(resp->cmd_flags & IXGBE_ACI_LSE_IS_ENABLED); + + /* save link status information */ + if (link) + *link = *li; + + /* flag cleared so calling functions don't call AQ again */ + hw->link.get_link_info = false; + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_aci_set_event_mask - set event mask + * @hw: pointer to the HW struct + * @port_num: port number of the physical function + * @mask: event mask to be set + * + * Set the event mask using ACI command (0x0613). + * + * Return: the exit code of the operation. + */ +s32 ixgbe_aci_set_event_mask(struct ixgbe_hw *hw, u8 port_num, u16 mask) +{ + struct ixgbe_aci_cmd_set_event_mask *cmd; + struct ixgbe_aci_desc desc; + + cmd = &desc.params.set_event_mask; + + ixgbe_fill_dflt_direct_cmd_desc(&desc, ixgbe_aci_opc_set_event_mask); + + cmd->event_mask = IXGBE_CPU_TO_LE16(mask); + return ixgbe_aci_send_cmd(hw, &desc, NULL, 0); +} + +/** + * ixgbe_configure_lse - enable/disable link status events + * @hw: pointer to the HW struct + * @activate: bool value deciding if lse should be enabled nor disabled + * @mask: event mask to be set; a set bit means deactivation of the + * corresponding event + * + * Set the event mask and then enable or disable link status events + * + * Return: the exit code of the operation. + */ +s32 ixgbe_configure_lse(struct ixgbe_hw *hw, bool activate, u16 mask) +{ + s32 rc; + + rc = ixgbe_aci_set_event_mask(hw, (u8)hw->bus.func, mask); + if (rc) { + return rc; + } + + /* Enabling link status events generation by fw */ + rc = ixgbe_aci_get_link_info(hw, activate, NULL); + if (rc) { + return rc; + } + return IXGBE_SUCCESS; +} + +#ifndef NO_PTP_SUPPORT +/** + * ixgbe_set_ptp_by_phy - Set PTP timestamping by PHY + * @hw: pointer to the HW struct + * @ptp_request: timestamp mode request + * @flags: timestamp mode flags + * + * Set PTP by PHY using ACI command (0x0634). + * + * Return: 0 on success, negative error code otherwise + */ +s32 ixgbe_set_ptp_by_phy(struct ixgbe_hw *hw, u8 ptp_request, u8 flags) +{ + struct ixgbe_aci_cmd_set_ptp_by_phy *cmd; + struct ixgbe_aci_desc desc; + + ixgbe_fill_dflt_direct_cmd_desc(&desc, ixgbe_aci_opc_set_ptp_by_phy); + cmd = &desc.params.set_ptp_by_phy; + cmd->ptp_request = ptp_request; + cmd->flags = flags; + + return ixgbe_aci_send_cmd(hw, &desc, NULL, 0); +} + +/** + * ixgbe_get_ptp_by_phy - Get PTP timestamping by PHY + * @hw: pointer to the HW struct + * @ptp_config: timestamp mode config + * @flags: timestamp mode flags + * @max_drift_thresh: maximal PHY clock drift threshold + * + * Get PTP by PHY using ACI command (0x0635). + * + * Return: 0 on success, negative error code otherwise + */ +s32 ixgbe_get_ptp_by_phy(struct ixgbe_hw *hw, u8 *ptp_config, u8 *flags, + u16 *max_drift_thresh) +{ + struct ixgbe_aci_cmd_get_ptp_by_phy_resp *resp; + struct ixgbe_aci_desc desc; + s32 status; + + ixgbe_fill_dflt_direct_cmd_desc(&desc, ixgbe_aci_opc_get_ptp_by_phy); + resp = &desc.params.get_ptp_by_phy_resp; + + status = ixgbe_aci_send_cmd(hw, &desc, NULL, 0); + if (!status) { + *ptp_config = resp->ptp_config; + *flags = resp->flags; + *max_drift_thresh = IXGBE_LE16_TO_CPU(resp->maxDriftThreshold); + } + + return status; +} + +#endif /* !NO_PTP_SUPPORT */ +/** + * ixgbe_aci_get_netlist_node - get a node handle + * @hw: pointer to the hw struct + * @cmd: get_link_topo AQ structure + * @node_part_number: output node part number if node found + * @node_handle: output node handle parameter if node found + * + * Get the netlist node and assigns it to + * the provided handle using ACI command (0x06E0). + * + * Return: the exit code of the operation. + */ +s32 ixgbe_aci_get_netlist_node(struct ixgbe_hw *hw, + struct ixgbe_aci_cmd_get_link_topo *cmd, + u8 *node_part_number, u16 *node_handle) +{ + struct ixgbe_aci_desc desc; + + ixgbe_fill_dflt_direct_cmd_desc(&desc, ixgbe_aci_opc_get_link_topo); + desc.params.get_link_topo = *cmd; + + if (ixgbe_aci_send_cmd(hw, &desc, NULL, 0)) + return IXGBE_ERR_NOT_SUPPORTED; + + if (node_handle) + *node_handle = + IXGBE_LE16_TO_CPU(desc.params.get_link_topo.addr.handle); + if (node_part_number) + *node_part_number = desc.params.get_link_topo.node_part_num; + + return IXGBE_SUCCESS; +} + +#if !defined(NO_PTP_SUPPORT) +/** + * ixgbe_aci_get_netlist_node_pin - get a node pin handle + * @hw: pointer to the hw struct + * @cmd: get_link_topo_pin AQ structure + * @node_handle: output node handle parameter if node found + * + * Get the netlist node pin and assign it to + * the provided handle using ACI command (0x06E1). + * + * Return: the exit code of the operation. + */ +s32 ixgbe_aci_get_netlist_node_pin(struct ixgbe_hw *hw, + struct ixgbe_aci_cmd_get_link_topo_pin *cmd, + u16 *node_handle) +{ + struct ixgbe_aci_desc desc; + + ixgbe_fill_dflt_direct_cmd_desc(&desc, ixgbe_aci_opc_get_link_topo_pin); + desc.params.get_link_topo_pin = *cmd; + + if (ixgbe_aci_send_cmd(hw, &desc, NULL, 0)) + return IXGBE_ERR_NOT_SUPPORTED; + + if (node_handle) + *node_handle = + IXGBE_LE16_TO_CPU(desc.params.get_link_topo_pin.addr.handle); + + return IXGBE_SUCCESS; +} +#endif /* !NO_PTP_SUPPORT */ + +/** + * ixgbe_find_netlist_node - find a node handle + * @hw: pointer to the hw struct + * @node_type_ctx: type of netlist node to look for + * @node_part_number: node part number to look for + * @node_handle: output parameter if node found - optional + * + * Find and return the node handle for a given node type and part number in the + * netlist. When found IXGBE_SUCCESS is returned, IXGBE_ERR_NOT_SUPPORTED + * otherwise. If @node_handle provided, it would be set to found node handle. + * + * Return: the exit code of the operation. + */ +s32 ixgbe_find_netlist_node(struct ixgbe_hw *hw, u8 node_type_ctx, + u8 node_part_number, u16 *node_handle) +{ + struct ixgbe_aci_cmd_get_link_topo cmd; + u8 rec_node_part_number; + u16 rec_node_handle; + s32 status; + u8 idx; + + for (idx = 0; idx < IXGBE_MAX_NETLIST_SIZE; idx++) { + memset(&cmd, 0, sizeof(cmd)); + + cmd.addr.topo_params.node_type_ctx = + (node_type_ctx << IXGBE_ACI_LINK_TOPO_NODE_TYPE_S); + cmd.addr.topo_params.index = idx; + + status = ixgbe_aci_get_netlist_node(hw, &cmd, + &rec_node_part_number, + &rec_node_handle); + if (status) + return status; + + if (rec_node_part_number == node_part_number) { + if (node_handle) + *node_handle = rec_node_handle; + return IXGBE_SUCCESS; + } + } + + return IXGBE_ERR_NOT_SUPPORTED; +} + +/** + * ixgbe_aci_read_i2c - read I2C register value + * @hw: pointer to the hw struct + * @topo_addr: topology address for a device to communicate with + * @bus_addr: 7-bit I2C bus address + * @addr: I2C memory address (I2C offset) with up to 16 bits + * @params: I2C parameters: bit [7] - Repeated start, + * bits [6:5] data offset size, + * bit [4] - I2C address type, bits [3:0] - data size + * to read (0-16 bytes) + * @data: pointer to data (0 to 16 bytes) to be read from the I2C device + * + * Read the value of the I2C pin register using ACI command (0x06E2). + * + * Return: the exit code of the operation. + */ +s32 ixgbe_aci_read_i2c(struct ixgbe_hw *hw, + struct ixgbe_aci_cmd_link_topo_addr topo_addr, + u16 bus_addr, __le16 addr, u8 params, u8 *data) +{ + struct ixgbe_aci_desc desc = { 0 }; + struct ixgbe_aci_cmd_i2c *cmd; + u8 data_size; + s32 status; + + ixgbe_fill_dflt_direct_cmd_desc(&desc, ixgbe_aci_opc_read_i2c); + cmd = &desc.params.read_write_i2c; + + if (!data) + return IXGBE_ERR_PARAM; + + data_size = (params & IXGBE_ACI_I2C_DATA_SIZE_M) >> + IXGBE_ACI_I2C_DATA_SIZE_S; + + cmd->i2c_bus_addr = IXGBE_CPU_TO_LE16(bus_addr); + cmd->topo_addr = topo_addr; + cmd->i2c_params = params; + cmd->i2c_addr = addr; + + status = ixgbe_aci_send_cmd(hw, &desc, NULL, 0); + if (!status) { + struct ixgbe_aci_cmd_read_i2c_resp *resp; + u8 i; + + resp = &desc.params.read_i2c_resp; + for (i = 0; i < data_size; i++) { + *data = resp->i2c_data[i]; + data++; + } + } + + return status; +} + +/** + * ixgbe_aci_write_i2c - write a value to I2C register + * @hw: pointer to the hw struct + * @topo_addr: topology address for a device to communicate with + * @bus_addr: 7-bit I2C bus address + * @addr: I2C memory address (I2C offset) with up to 16 bits + * @params: I2C parameters: bit [4] - I2C address type, bits [3:0] - data size + * to write (0-7 bytes) + * @data: pointer to data (0 to 4 bytes) to be written to the I2C device + * + * Write a value to the I2C pin register using ACI command (0x06E3). + * + * Return: the exit code of the operation. + */ +s32 ixgbe_aci_write_i2c(struct ixgbe_hw *hw, + struct ixgbe_aci_cmd_link_topo_addr topo_addr, + u16 bus_addr, __le16 addr, u8 params, u8 *data) +{ + struct ixgbe_aci_desc desc = { 0 }; + struct ixgbe_aci_cmd_i2c *cmd; + u8 i, data_size; + + ixgbe_fill_dflt_direct_cmd_desc(&desc, ixgbe_aci_opc_write_i2c); + cmd = &desc.params.read_write_i2c; + + data_size = (params & IXGBE_ACI_I2C_DATA_SIZE_M) >> + IXGBE_ACI_I2C_DATA_SIZE_S; + + /* data_size limited to 4 */ + if (data_size > 4) + return IXGBE_ERR_PARAM; + + cmd->i2c_bus_addr = IXGBE_CPU_TO_LE16(bus_addr); + cmd->topo_addr = topo_addr; + cmd->i2c_params = params; + cmd->i2c_addr = addr; + + for (i = 0; i < data_size; i++) { + cmd->i2c_data[i] = *data; + data++; + } + + return ixgbe_aci_send_cmd(hw, &desc, NULL, 0); +} + +/** + * ixgbe_aci_set_port_id_led - set LED value for the given port + * @hw: pointer to the HW struct + * @orig_mode: set LED original mode + * + * Set LED value for the given port (0x06E9) + * + * Return: the exit code of the operation. + */ +s32 ixgbe_aci_set_port_id_led(struct ixgbe_hw *hw, bool orig_mode) +{ + struct ixgbe_aci_cmd_set_port_id_led *cmd; + struct ixgbe_aci_desc desc; + + cmd = &desc.params.set_port_id_led; + + ixgbe_fill_dflt_direct_cmd_desc(&desc, ixgbe_aci_opc_set_port_id_led); + + cmd->lport_num = (u8)hw->bus.func; + cmd->lport_num_valid = IXGBE_ACI_PORT_ID_PORT_NUM_VALID; + + if (orig_mode) + cmd->ident_mode = IXGBE_ACI_PORT_IDENT_LED_ORIG; + else + cmd->ident_mode = IXGBE_ACI_PORT_IDENT_LED_BLINK; + + return ixgbe_aci_send_cmd(hw, &desc, NULL, 0); +} + +/** + * ixgbe_aci_set_gpio - set GPIO pin state + * @hw: pointer to the hw struct + * @gpio_ctrl_handle: GPIO controller node handle + * @pin_idx: IO Number of the GPIO that needs to be set + * @value: SW provide IO value to set in the LSB + * + * Set the GPIO pin state that is a part of the topology + * using ACI command (0x06EC). + * + * Return: the exit code of the operation. + */ +s32 ixgbe_aci_set_gpio(struct ixgbe_hw *hw, u16 gpio_ctrl_handle, u8 pin_idx, + bool value) +{ + struct ixgbe_aci_cmd_gpio *cmd; + struct ixgbe_aci_desc desc; + + ixgbe_fill_dflt_direct_cmd_desc(&desc, ixgbe_aci_opc_set_gpio); + cmd = &desc.params.read_write_gpio; + cmd->gpio_ctrl_handle = IXGBE_CPU_TO_LE16(gpio_ctrl_handle); + cmd->gpio_num = pin_idx; + cmd->gpio_val = value ? 1 : 0; + + return ixgbe_aci_send_cmd(hw, &desc, NULL, 0); +} + +/** + * ixgbe_aci_get_gpio - get GPIO pin state + * @hw: pointer to the hw struct + * @gpio_ctrl_handle: GPIO controller node handle + * @pin_idx: IO Number of the GPIO that needs to be set + * @value: IO value read + * + * Get the value of a GPIO signal which is part of the topology + * using ACI command (0x06ED). + * + * Return: the exit code of the operation. + */ +s32 ixgbe_aci_get_gpio(struct ixgbe_hw *hw, u16 gpio_ctrl_handle, u8 pin_idx, + bool *value) +{ + struct ixgbe_aci_cmd_gpio *cmd; + struct ixgbe_aci_desc desc; + s32 status; + + ixgbe_fill_dflt_direct_cmd_desc(&desc, ixgbe_aci_opc_get_gpio); + cmd = &desc.params.read_write_gpio; + cmd->gpio_ctrl_handle = IXGBE_CPU_TO_LE16(gpio_ctrl_handle); + cmd->gpio_num = pin_idx; + + status = ixgbe_aci_send_cmd(hw, &desc, NULL, 0); + if (status) + return status; + + *value = !!cmd->gpio_val; + return IXGBE_SUCCESS; +} + +/** + * ixgbe_aci_sff_eeprom - read/write SFF EEPROM + * @hw: pointer to the HW struct + * @lport: bits [7:0] = logical port, bit [8] = logical port valid + * @bus_addr: I2C bus address of the eeprom (typically 0xA0, 0=topo default) + * @mem_addr: I2C offset. lower 8 bits for address, 8 upper bits zero padding. + * @page: QSFP page + * @page_bank_ctrl: configuration of SFF/CMIS paging and banking control + * @data: pointer to data buffer to be read/written to the I2C device. + * @length: 1-16 for read, 1 for write. + * @write: 0 read, 1 for write. + * + * Read/write SFF EEPROM using ACI command (0x06EE). + * + * Return: the exit code of the operation. + */ +s32 ixgbe_aci_sff_eeprom(struct ixgbe_hw *hw, u16 lport, u8 bus_addr, + u16 mem_addr, u8 page, u8 page_bank_ctrl, u8 *data, + u8 length, bool write) +{ + struct ixgbe_aci_cmd_sff_eeprom *cmd; + struct ixgbe_aci_desc desc; + s32 status; + + if (!data || (mem_addr & 0xff00)) + return IXGBE_ERR_PARAM; + + ixgbe_fill_dflt_direct_cmd_desc(&desc, ixgbe_aci_opc_sff_eeprom); + cmd = &desc.params.read_write_sff_param; + desc.flags = IXGBE_CPU_TO_LE16(IXGBE_ACI_FLAG_RD); + cmd->lport_num = (u8)(lport & 0xff); + cmd->lport_num_valid = (u8)((lport >> 8) & 0x01); + cmd->i2c_bus_addr = IXGBE_CPU_TO_LE16(((bus_addr >> 1) & + IXGBE_ACI_SFF_I2CBUS_7BIT_M) | + ((page_bank_ctrl << + IXGBE_ACI_SFF_PAGE_BANK_CTRL_S) & + IXGBE_ACI_SFF_PAGE_BANK_CTRL_M)); + cmd->i2c_offset = IXGBE_CPU_TO_LE16(mem_addr & 0xff); + cmd->module_page = page; + if (write) + cmd->i2c_bus_addr |= IXGBE_CPU_TO_LE16(IXGBE_ACI_SFF_IS_WRITE); + + status = ixgbe_aci_send_cmd(hw, &desc, data, length); + return status; +} + +/** + * ixgbe_aci_prog_topo_dev_nvm - program Topology Device NVM + * @hw: pointer to the hardware structure + * @topo_params: pointer to structure storing topology parameters for a device + * + * Program Topology Device NVM using ACI command (0x06F2). + * + * Return: the exit code of the operation. + */ +s32 ixgbe_aci_prog_topo_dev_nvm(struct ixgbe_hw *hw, + struct ixgbe_aci_cmd_link_topo_params *topo_params) +{ + struct ixgbe_aci_cmd_prog_topo_dev_nvm *cmd; + struct ixgbe_aci_desc desc; + + cmd = &desc.params.prog_topo_dev_nvm; + + ixgbe_fill_dflt_direct_cmd_desc(&desc, ixgbe_aci_opc_prog_topo_dev_nvm); + + memcpy(&cmd->topo_params, topo_params, sizeof(*topo_params)); + + return ixgbe_aci_send_cmd(hw, &desc, NULL, 0); +} + +/** + * ixgbe_aci_read_topo_dev_nvm - read Topology Device NVM + * @hw: pointer to the hardware structure + * @topo_params: pointer to structure storing topology parameters for a device + * @start_address: byte offset in the topology device NVM + * @data: pointer to data buffer + * @data_size: number of bytes to be read from the topology device NVM + * Read Topology Device NVM (0x06F3) + * + * Read Topology of Device NVM using ACI command (0x06F3). + * + * Return: the exit code of the operation. + */ +s32 ixgbe_aci_read_topo_dev_nvm(struct ixgbe_hw *hw, + struct ixgbe_aci_cmd_link_topo_params *topo_params, + u32 start_address, u8 *data, u8 data_size) +{ + struct ixgbe_aci_cmd_read_topo_dev_nvm *cmd; + struct ixgbe_aci_desc desc; + s32 status; + + if (!data || data_size == 0 || + data_size > IXGBE_ACI_READ_TOPO_DEV_NVM_DATA_READ_SIZE) + return IXGBE_ERR_PARAM; + + cmd = &desc.params.read_topo_dev_nvm; + + ixgbe_fill_dflt_direct_cmd_desc(&desc, ixgbe_aci_opc_read_topo_dev_nvm); + + desc.datalen = IXGBE_CPU_TO_LE16(data_size); + memcpy(&cmd->topo_params, topo_params, sizeof(*topo_params)); + cmd->start_address = IXGBE_CPU_TO_LE32(start_address); + + status = ixgbe_aci_send_cmd(hw, &desc, NULL, 0); + if (status) + return status; + + memcpy(data, cmd->data_read, data_size); + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_acquire_nvm - Generic request for acquiring the NVM ownership + * @hw: pointer to the HW structure + * @access: NVM access type (read or write) + * + * Request NVM ownership. + * + * Return: the exit code of the operation. + */ +s32 ixgbe_acquire_nvm(struct ixgbe_hw *hw, + enum ixgbe_aci_res_access_type access) +{ + u32 fla; + + /* Skip if we are in blank NVM programming mode */ + fla = IXGBE_READ_REG(hw, GLNVM_FLA); + if ((fla & GLNVM_FLA_LOCKED_M) == 0) + return IXGBE_SUCCESS; + + return ixgbe_acquire_res(hw, IXGBE_NVM_RES_ID, access, + IXGBE_NVM_TIMEOUT); +} + +/** + * ixgbe_release_nvm - Generic request for releasing the NVM ownership + * @hw: pointer to the HW structure + * + * Release NVM ownership. + */ +void ixgbe_release_nvm(struct ixgbe_hw *hw) +{ + u32 fla; + + /* Skip if we are in blank NVM programming mode */ + fla = IXGBE_READ_REG(hw, GLNVM_FLA); + if ((fla & GLNVM_FLA_LOCKED_M) == 0) + return; + + ixgbe_release_res(hw, IXGBE_NVM_RES_ID); +} + + +/** + * ixgbe_aci_read_nvm - read NVM + * @hw: pointer to the HW struct + * @module_typeid: module pointer location in words from the NVM beginning + * @offset: byte offset from the module beginning + * @length: length of the section to be read (in bytes from the offset) + * @data: command buffer (size [bytes] = length) + * @last_command: tells if this is the last command in a series + * @read_shadow_ram: tell if this is a shadow RAM read + * + * Read the NVM using ACI command (0x0701). + * + * Return: the exit code of the operation. + */ +s32 ixgbe_aci_read_nvm(struct ixgbe_hw *hw, u16 module_typeid, u32 offset, + u16 length, void *data, bool last_command, + bool read_shadow_ram) +{ + struct ixgbe_aci_desc desc; + struct ixgbe_aci_cmd_nvm *cmd; + + cmd = &desc.params.nvm; + + if (offset > IXGBE_ACI_NVM_MAX_OFFSET) + return IXGBE_ERR_PARAM; + + ixgbe_fill_dflt_direct_cmd_desc(&desc, ixgbe_aci_opc_nvm_read); + + if (!read_shadow_ram && module_typeid == IXGBE_ACI_NVM_START_POINT) + cmd->cmd_flags |= IXGBE_ACI_NVM_FLASH_ONLY; + + /* If this is the last command in a series, set the proper flag. */ + if (last_command) + cmd->cmd_flags |= IXGBE_ACI_NVM_LAST_CMD; + cmd->module_typeid = IXGBE_CPU_TO_LE16(module_typeid); + cmd->offset_low = IXGBE_CPU_TO_LE16(offset & 0xFFFF); + cmd->offset_high = (offset >> 16) & 0xFF; + cmd->length = IXGBE_CPU_TO_LE16(length); + + return ixgbe_aci_send_cmd(hw, &desc, data, length); +} + +/** + * ixgbe_aci_erase_nvm - erase NVM sector + * @hw: pointer to the HW struct + * @module_typeid: module pointer location in words from the NVM beginning + * + * Erase the NVM sector using the ACI command (0x0702). + * + * Return: the exit code of the operation. + */ +s32 ixgbe_aci_erase_nvm(struct ixgbe_hw *hw, u16 module_typeid) +{ + struct ixgbe_aci_desc desc; + struct ixgbe_aci_cmd_nvm *cmd; + s32 status; + __le16 len; + + /* read a length value from SR, so module_typeid is equal to 0 */ + /* calculate offset where module size is placed from bytes to words */ + /* set last command and read from SR values to true */ + status = ixgbe_aci_read_nvm(hw, 0, 2 * module_typeid + 2, 2, &len, true, + true); + if (status) + return status; + + cmd = &desc.params.nvm; + + ixgbe_fill_dflt_direct_cmd_desc(&desc, ixgbe_aci_opc_nvm_erase); + + cmd->module_typeid = IXGBE_CPU_TO_LE16(module_typeid); + cmd->length = len; + cmd->offset_low = 0; + cmd->offset_high = 0; + + return ixgbe_aci_send_cmd(hw, &desc, NULL, 0); +} + +/** + * ixgbe_aci_update_nvm - update NVM + * @hw: pointer to the HW struct + * @module_typeid: module pointer location in words from the NVM beginning + * @offset: byte offset from the module beginning + * @length: length of the section to be written (in bytes from the offset) + * @data: command buffer (size [bytes] = length) + * @last_command: tells if this is the last command in a series + * @command_flags: command parameters + * + * Update the NVM using the ACI command (0x0703). + * + * Return: the exit code of the operation. + */ +s32 ixgbe_aci_update_nvm(struct ixgbe_hw *hw, u16 module_typeid, + u32 offset, u16 length, void *data, + bool last_command, u8 command_flags) +{ + struct ixgbe_aci_desc desc; + struct ixgbe_aci_cmd_nvm *cmd; + + cmd = &desc.params.nvm; + + /* In offset the highest byte must be zeroed. */ + if (offset & 0xFF000000) + return IXGBE_ERR_PARAM; + + ixgbe_fill_dflt_direct_cmd_desc(&desc, ixgbe_aci_opc_nvm_write); + + cmd->cmd_flags |= command_flags; + + /* If this is the last command in a series, set the proper flag. */ + if (last_command) + cmd->cmd_flags |= IXGBE_ACI_NVM_LAST_CMD; + cmd->module_typeid = IXGBE_CPU_TO_LE16(module_typeid); + cmd->offset_low = IXGBE_CPU_TO_LE16(offset & 0xFFFF); + cmd->offset_high = (offset >> 16) & 0xFF; + cmd->length = IXGBE_CPU_TO_LE16(length); + + desc.flags |= IXGBE_CPU_TO_LE16(IXGBE_ACI_FLAG_RD); + + return ixgbe_aci_send_cmd(hw, &desc, data, length); +} + +/** + * ixgbe_nvm_validate_checksum - validate checksum + * @hw: pointer to the HW struct + * + * Verify NVM PFA checksum validity using ACI command (0x0706). + * If the checksum verification failed, IXGBE_ERR_NVM_CHECKSUM is returned. + * The function acquires and then releases the NVM ownership. + * + * Return: the exit code of the operation. + */ +s32 ixgbe_nvm_validate_checksum(struct ixgbe_hw *hw) +{ + struct ixgbe_aci_cmd_nvm_checksum *cmd; + struct ixgbe_aci_desc desc; + s32 status; + + status = ixgbe_acquire_nvm(hw, IXGBE_RES_READ); + if (status) + return status; + + cmd = &desc.params.nvm_checksum; + + ixgbe_fill_dflt_direct_cmd_desc(&desc, ixgbe_aci_opc_nvm_checksum); + cmd->flags = IXGBE_ACI_NVM_CHECKSUM_VERIFY; + + status = ixgbe_aci_send_cmd(hw, &desc, NULL, 0); + + ixgbe_release_nvm(hw); + + if (!status) + if (IXGBE_LE16_TO_CPU(cmd->checksum) != + IXGBE_ACI_NVM_CHECKSUM_CORRECT) { + ERROR_REPORT1(IXGBE_ERROR_INVALID_STATE, + "Invalid Shadow Ram checksum"); + status = IXGBE_ERR_NVM_CHECKSUM; + } + + return status; +} + +/** + * ixgbe_nvm_recalculate_checksum - recalculate checksum + * @hw: pointer to the HW struct + * + * Recalculate NVM PFA checksum using ACI command (0x0706). + * The function acquires and then releases the NVM ownership. + * + * Return: the exit code of the operation. + */ +s32 ixgbe_nvm_recalculate_checksum(struct ixgbe_hw *hw) +{ + struct ixgbe_aci_cmd_nvm_checksum *cmd; + struct ixgbe_aci_desc desc; + s32 status; + + status = ixgbe_acquire_nvm(hw, IXGBE_RES_WRITE); + if (status) + return status; + + cmd = &desc.params.nvm_checksum; + + ixgbe_fill_dflt_direct_cmd_desc(&desc, ixgbe_aci_opc_nvm_checksum); + cmd->flags = IXGBE_ACI_NVM_CHECKSUM_RECALC; + + status = ixgbe_aci_send_cmd(hw, &desc, NULL, 0); + + ixgbe_release_nvm(hw); + + return status; +} + +/** + * ixgbe_nvm_write_activate - NVM activate write + * @hw: pointer to the HW struct + * @cmd_flags: flags for write activate command + * @response_flags: response indicators from firmware + * + * Update the control word with the required banks' validity bits + * and dumps the Shadow RAM to flash using ACI command (0x0707). + * + * cmd_flags controls which banks to activate, the preservation level to use + * when activating the NVM bank, and whether an EMP reset is required for + * activation. + * + * Note that the 16bit cmd_flags value is split between two separate 1 byte + * flag values in the descriptor. + * + * On successful return of the firmware command, the response_flags variable + * is updated with the flags reported by firmware indicating certain status, + * such as whether EMP reset is enabled. + * + * Return: the exit code of the operation. + */ +s32 ixgbe_nvm_write_activate(struct ixgbe_hw *hw, u16 cmd_flags, + u8 *response_flags) +{ + struct ixgbe_aci_desc desc; + struct ixgbe_aci_cmd_nvm *cmd; + s32 status; + + cmd = &desc.params.nvm; + ixgbe_fill_dflt_direct_cmd_desc(&desc, + ixgbe_aci_opc_nvm_write_activate); + + cmd->cmd_flags = LO_BYTE(cmd_flags); + cmd->offset_high = HI_BYTE(cmd_flags); + + status = ixgbe_aci_send_cmd(hw, &desc, NULL, 0); + if (!status && response_flags) + *response_flags = cmd->cmd_flags; + + return status; +} + +/** + * ixgbe_get_flash_bank_offset - Get offset into requested flash bank + * @hw: pointer to the HW structure + * @bank: whether to read from the active or inactive flash bank + * @module: the module to read from + * + * Based on the module, lookup the module offset from the beginning of the + * flash. + * + * Return: the flash offset. Note that a value of zero is invalid and must be + * treated as an error. + */ +static u32 ixgbe_get_flash_bank_offset(struct ixgbe_hw *hw, + enum ixgbe_bank_select bank, + u16 module) +{ + struct ixgbe_bank_info *banks = &hw->flash.banks; + enum ixgbe_flash_bank active_bank; + bool second_bank_active; + u32 offset, size; + + switch (module) { + case E610_SR_1ST_NVM_BANK_PTR: + offset = banks->nvm_ptr; + size = banks->nvm_size; + active_bank = banks->nvm_bank; + break; + case E610_SR_1ST_OROM_BANK_PTR: + offset = banks->orom_ptr; + size = banks->orom_size; + active_bank = banks->orom_bank; + break; + case E610_SR_NETLIST_BANK_PTR: + offset = banks->netlist_ptr; + size = banks->netlist_size; + active_bank = banks->netlist_bank; + break; + default: + return 0; + } + + switch (active_bank) { + case IXGBE_1ST_FLASH_BANK: + second_bank_active = false; + break; + case IXGBE_2ND_FLASH_BANK: + second_bank_active = true; + break; + default: + return 0; + } + + /* The second flash bank is stored immediately following the first + * bank. Based on whether the 1st or 2nd bank is active, and whether + * we want the active or inactive bank, calculate the desired offset. + */ + switch (bank) { + case IXGBE_ACTIVE_FLASH_BANK: + return offset + (second_bank_active ? size : 0); + case IXGBE_INACTIVE_FLASH_BANK: + return offset + (second_bank_active ? 0 : size); + } + + return 0; +} + +/** + * ixgbe_read_flash_module - Read a word from one of the main NVM modules + * @hw: pointer to the HW structure + * @bank: which bank of the module to read + * @module: the module to read + * @offset: the offset into the module in bytes + * @data: storage for the word read from the flash + * @length: bytes of data to read + * + * Read data from the specified flash module. The bank parameter indicates + * whether or not to read from the active bank or the inactive bank of that + * module. + * + * The word will be read using flat NVM access, and relies on the + * hw->flash.banks data being setup by ixgbe_determine_active_flash_banks() + * during initialization. + * + * Return: the exit code of the operation. + */ +static s32 ixgbe_read_flash_module(struct ixgbe_hw *hw, + enum ixgbe_bank_select bank, + u16 module, u32 offset, u8 *data, u32 length) +{ + s32 status; + u32 start; + + start = ixgbe_get_flash_bank_offset(hw, bank, module); + if (!start) { + return IXGBE_ERR_PARAM; + } + + status = ixgbe_acquire_nvm(hw, IXGBE_RES_READ); + if (status) + return status; + + status = ixgbe_read_flat_nvm(hw, start + offset, &length, data, false); + + ixgbe_release_nvm(hw); + + return status; +} + +/** + * ixgbe_read_netlist_module - Read data from the netlist module area + * @hw: pointer to the HW structure + * @bank: whether to read from the active or inactive module + * @offset: offset into the netlist to read from + * @data: storage for returned word value + * + * Read a word from the specified netlist bank. + * + * Return: the exit code of the operation. + */ +static s32 ixgbe_read_netlist_module(struct ixgbe_hw *hw, + enum ixgbe_bank_select bank, + u32 offset, u16 *data) +{ + __le16 data_local; + s32 status; + + status = ixgbe_read_flash_module(hw, bank, E610_SR_NETLIST_BANK_PTR, + offset * sizeof(u16), + (u8 *)&data_local, + sizeof(u16)); + if (!status) + *data = IXGBE_LE16_TO_CPU(data_local); + + return status; +} + +/** + * ixgbe_read_nvm_module - Read from the active main NVM module + * @hw: pointer to the HW structure + * @bank: whether to read from active or inactive NVM module + * @offset: offset into the NVM module to read, in words + * @data: storage for returned word value + * + * Read the specified word from the active NVM module. This includes the CSS + * header at the start of the NVM module. + * + * Return: the exit code of the operation. + */ +static s32 ixgbe_read_nvm_module(struct ixgbe_hw *hw, + enum ixgbe_bank_select bank, + u32 offset, u16 *data) +{ + __le16 data_local; + s32 status; + + status = ixgbe_read_flash_module(hw, bank, E610_SR_1ST_NVM_BANK_PTR, + offset * sizeof(u16), + (u8 *)&data_local, + sizeof(u16)); + if (!status) + *data = IXGBE_LE16_TO_CPU(data_local); + + return status; +} + +/** + * ixgbe_read_orom_module - Read from the active Option ROM module + * @hw: pointer to the HW structure + * @bank: whether to read from active or inactive OROM module + * @offset: offset into the OROM module to read, in words + * @data: storage for returned word value + * + * Read the specified word from the active Option ROM module of the flash. + * Note that unlike the NVM module, the CSS data is stored at the end of the + * module instead of at the beginning. + * + * Return: the exit code of the operation. + */ +static s32 ixgbe_read_orom_module(struct ixgbe_hw *hw, + enum ixgbe_bank_select bank, + u32 offset, u16 *data) +{ + __le16 data_local; + s32 status; + + status = ixgbe_read_flash_module(hw, bank, E610_SR_1ST_OROM_BANK_PTR, + offset * sizeof(u16), + (u8 *)&data_local, + sizeof(u16)); + if (!status) + *data = IXGBE_LE16_TO_CPU(data_local); + + return status; +} + +/** + * ixgbe_get_nvm_css_hdr_len - Read the CSS header length from the + * NVM CSS header + * @hw: pointer to the HW struct + * @bank: whether to read from the active or inactive flash bank + * @hdr_len: storage for header length in words + * + * Read the CSS header length from the NVM CSS header and add the + * Authentication header size, and then convert to words. + * + * Return: the exit code of the operation. + */ +static s32 ixgbe_get_nvm_css_hdr_len(struct ixgbe_hw *hw, + enum ixgbe_bank_select bank, + u32 *hdr_len) +{ + u16 hdr_len_l, hdr_len_h; + u32 hdr_len_dword; + s32 status; + + status = ixgbe_read_nvm_module(hw, bank, IXGBE_NVM_CSS_HDR_LEN_L, + &hdr_len_l); + if (status) + return status; + + status = ixgbe_read_nvm_module(hw, bank, IXGBE_NVM_CSS_HDR_LEN_H, + &hdr_len_h); + if (status) + return status; + + /* CSS header length is in DWORD, so convert to words and add + * authentication header size + */ + hdr_len_dword = hdr_len_h << 16 | hdr_len_l; + *hdr_len = (hdr_len_dword * 2) + IXGBE_NVM_AUTH_HEADER_LEN; + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_read_nvm_sr_copy - Read a word from the Shadow RAM copy in the NVM bank + * @hw: pointer to the HW structure + * @bank: whether to read from the active or inactive NVM module + * @offset: offset into the Shadow RAM copy to read, in words + * @data: storage for returned word value + * + * Read the specified word from the copy of the Shadow RAM found in the + * specified NVM module. + * + * Return: the exit code of the operation. + */ +static s32 ixgbe_read_nvm_sr_copy(struct ixgbe_hw *hw, + enum ixgbe_bank_select bank, + u32 offset, u16 *data) +{ + u32 hdr_len; + s32 status; + + status = ixgbe_get_nvm_css_hdr_len(hw, bank, &hdr_len); + if (status) + return status; + + hdr_len = ROUND_UP(hdr_len, 32); + + return ixgbe_read_nvm_module(hw, bank, hdr_len + offset, data); +} + +/** + * ixgbe_get_nvm_minsrevs - Get the minsrevs values from flash + * @hw: pointer to the HW struct + * @minsrevs: structure to store NVM and OROM minsrev values + * + * Read the Minimum Security Revision TLV and extract + * the revision values from the flash image + * into a readable structure for processing. + * + * Return: the exit code of the operation. + */ +s32 ixgbe_get_nvm_minsrevs(struct ixgbe_hw *hw, + struct ixgbe_minsrev_info *minsrevs) +{ + struct ixgbe_aci_cmd_nvm_minsrev data; + s32 status; + u16 valid; + + status = ixgbe_acquire_nvm(hw, IXGBE_RES_READ); + if (status) + return status; + + status = ixgbe_aci_read_nvm(hw, IXGBE_ACI_NVM_MINSREV_MOD_ID, + 0, sizeof(data), &data, + true, false); + + ixgbe_release_nvm(hw); + + if (status) + return status; + + valid = IXGBE_LE16_TO_CPU(data.validity); + + /* Extract NVM minimum security revision */ + if (valid & IXGBE_ACI_NVM_MINSREV_NVM_VALID) { + u16 minsrev_l = IXGBE_LE16_TO_CPU(data.nvm_minsrev_l); + u16 minsrev_h = IXGBE_LE16_TO_CPU(data.nvm_minsrev_h); + + minsrevs->nvm = minsrev_h << 16 | minsrev_l; + minsrevs->nvm_valid = true; + } + + /* Extract the OROM minimum security revision */ + if (valid & IXGBE_ACI_NVM_MINSREV_OROM_VALID) { + u16 minsrev_l = IXGBE_LE16_TO_CPU(data.orom_minsrev_l); + u16 minsrev_h = IXGBE_LE16_TO_CPU(data.orom_minsrev_h); + + minsrevs->orom = minsrev_h << 16 | minsrev_l; + minsrevs->orom_valid = true; + } + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_update_nvm_minsrevs - Update minsrevs TLV data in flash + * @hw: pointer to the HW struct + * @minsrevs: minimum security revision information + * + * Update the NVM or Option ROM minimum security revision fields in the PFA + * area of the flash. Reads the minsrevs->nvm_valid and minsrevs->orom_valid + * fields to determine what update is being requested. If the valid bit is not + * set for that module, then the associated minsrev will be left as is. + * + * Return: the exit code of the operation. + */ +s32 ixgbe_update_nvm_minsrevs(struct ixgbe_hw *hw, + struct ixgbe_minsrev_info *minsrevs) +{ + struct ixgbe_aci_cmd_nvm_minsrev data; + s32 status; + + if (!minsrevs->nvm_valid && !minsrevs->orom_valid) { + return IXGBE_ERR_PARAM; + } + + status = ixgbe_acquire_nvm(hw, IXGBE_RES_WRITE); + if (status) + return status; + + /* Get current data */ + status = ixgbe_aci_read_nvm(hw, IXGBE_ACI_NVM_MINSREV_MOD_ID, 0, + sizeof(data), &data, true, false); + if (status) + goto exit_release_res; + + if (minsrevs->nvm_valid) { + data.nvm_minsrev_l = IXGBE_CPU_TO_LE16(minsrevs->nvm & 0xFFFF); + data.nvm_minsrev_h = IXGBE_CPU_TO_LE16(minsrevs->nvm >> 16); + data.validity |= + IXGBE_CPU_TO_LE16(IXGBE_ACI_NVM_MINSREV_NVM_VALID); + } + + if (minsrevs->orom_valid) { + data.orom_minsrev_l = IXGBE_CPU_TO_LE16(minsrevs->orom & 0xFFFF); + data.orom_minsrev_h = IXGBE_CPU_TO_LE16(minsrevs->orom >> 16); + data.validity |= + IXGBE_CPU_TO_LE16(IXGBE_ACI_NVM_MINSREV_OROM_VALID); + } + + /* Update flash data */ + status = ixgbe_aci_update_nvm(hw, IXGBE_ACI_NVM_MINSREV_MOD_ID, 0, + sizeof(data), &data, false, + IXGBE_ACI_NVM_SPECIAL_UPDATE); + if (status) + goto exit_release_res; + + /* Dump the Shadow RAM to the flash */ + status = ixgbe_nvm_write_activate(hw, 0, NULL); + +exit_release_res: + ixgbe_release_nvm(hw); + + return status; +} + +/** + * ixgbe_get_nvm_srev - Read the security revision from the NVM CSS header + * @hw: pointer to the HW struct + * @bank: whether to read from the active or inactive flash bank + * @srev: storage for security revision + * + * Read the security revision out of the CSS header of the active NVM module + * bank. + * + * Return: the exit code of the operation. + */ +static s32 ixgbe_get_nvm_srev(struct ixgbe_hw *hw, + enum ixgbe_bank_select bank, u32 *srev) +{ + u16 srev_l, srev_h; + s32 status; + + status = ixgbe_read_nvm_module(hw, bank, IXGBE_NVM_CSS_SREV_L, &srev_l); + if (status) + return status; + + status = ixgbe_read_nvm_module(hw, bank, IXGBE_NVM_CSS_SREV_H, &srev_h); + if (status) + return status; + + *srev = srev_h << 16 | srev_l; + + return IXGBE_SUCCESS; +} + +#define IXGBE_OROM_STEP 512U + +/** + * ixgbe_get_orom_civd_data - Get the combo version information from Option ROM + * @hw: pointer to the HW struct + * @bank: whether to read from the active or inactive flash module + * @civd: storage for the Option ROM CIVD data. + * + * Searches through the Option ROM flash contents to locate the CIVD data for + * the image. + * + * Return: the exit code of the operation. + */ +static s32 +ixgbe_get_orom_civd_data(struct ixgbe_hw *hw, enum ixgbe_bank_select bank, + struct ixgbe_orom_civd_info *civd) +{ + u32 offset, orom_size = hw->flash.banks.orom_size; + u8 *orom_data; + s32 status; + + if (!orom_size) + return IXGBE_ERR_PARAM; + + orom_data = ixgbe_malloc(hw, orom_size); + if (!orom_data) + return IXGBE_ERR_OUT_OF_MEM; + + status = ixgbe_read_flash_module(hw, bank, + E610_SR_1ST_OROM_BANK_PTR, 0, + orom_data, orom_size); + if (status) { + status = IXGBE_ERR_NVM; + goto exit; + } + + /* The CIVD section is located in the Option ROM aligned to 512 bytes. + * The first 4 bytes must contain the ASCII characters "$CIV". + * A simple modulo 256 sum of all of the bytes of the structure must + * equal 0. + */ + for (offset = 0; offset + IXGBE_OROM_STEP <= orom_size; + offset += IXGBE_OROM_STEP) { + struct ixgbe_orom_civd_info *tmp; + u8 sum = 0, i; + + tmp = (struct ixgbe_orom_civd_info *)&orom_data[offset]; + + /* Skip forward until we find a matching signature */ + if (memcmp("$CIV", tmp->signature, sizeof(tmp->signature)) != 0) + continue; + + /* Verify that the simple checksum is zero */ + for (i = 0; i < sizeof(*tmp); i++) + sum += ((u8 *)tmp)[i]; + + if (sum) { + status = IXGBE_ERR_NVM; + goto exit; + } + + *civd = *tmp; + status = IXGBE_SUCCESS; + goto exit; + } + status = IXGBE_ERR_DOES_NOT_EXIST; +exit: + ixgbe_free(hw, orom_data); + return status; +} + +/** + * ixgbe_get_orom_srev - Read the security revision from the OROM CSS header + * @hw: pointer to the HW struct + * @bank: whether to read from active or inactive flash module + * @srev: storage for security revision + * + * Read the security revision out of the CSS header of the active OROM module + * bank. + * + * Return: the exit code of the operation. + */ +static s32 ixgbe_get_orom_srev(struct ixgbe_hw *hw, + enum ixgbe_bank_select bank, + u32 *srev) +{ + u32 orom_size_word = hw->flash.banks.orom_size / 2; + u32 css_start, hdr_len; + u16 srev_l, srev_h; + s32 status; + + status = ixgbe_get_nvm_css_hdr_len(hw, bank, &hdr_len); + if (status) + return status; + + if (orom_size_word < hdr_len) { + return IXGBE_ERR_CONFIG; + } + + /* calculate how far into the Option ROM the CSS header starts. Note + * that ixgbe_read_orom_module takes a word offset + */ + css_start = orom_size_word - hdr_len; + status = ixgbe_read_orom_module(hw, bank, + css_start + IXGBE_NVM_CSS_SREV_L, + &srev_l); + if (status) + return status; + + status = ixgbe_read_orom_module(hw, bank, + css_start + IXGBE_NVM_CSS_SREV_H, + &srev_h); + if (status) + return status; + + *srev = srev_h << 16 | srev_l; + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_get_orom_ver_info - Read Option ROM version information + * @hw: pointer to the HW struct + * @bank: whether to read from the active or inactive flash module + * @orom: pointer to Option ROM info structure + * + * Read Option ROM version and security revision from the Option ROM flash + * section. + * + * Return: the exit code of the operation. + */ +static s32 ixgbe_get_orom_ver_info(struct ixgbe_hw *hw, + enum ixgbe_bank_select bank, + struct ixgbe_orom_info *orom) +{ + struct ixgbe_orom_civd_info civd; + u32 combo_ver; + s32 status; + + status = ixgbe_get_orom_civd_data(hw, bank, &civd); + if (status) { + return status; + } + + combo_ver = IXGBE_LE32_TO_CPU(civd.combo_ver); + + orom->major = (u8)((combo_ver & IXGBE_OROM_VER_MASK) >> + IXGBE_OROM_VER_SHIFT); + orom->patch = (u8)(combo_ver & IXGBE_OROM_VER_PATCH_MASK); + orom->build = (u16)((combo_ver & IXGBE_OROM_VER_BUILD_MASK) >> + IXGBE_OROM_VER_BUILD_SHIFT); + + status = ixgbe_get_orom_srev(hw, bank, &orom->srev); + if (status) { + return status; + } + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_get_inactive_orom_ver - Read Option ROM version from the inactive bank + * @hw: pointer to the HW structure + * @orom: storage for Option ROM version information + * + * Reads the Option ROM version and security revision data for the inactive + * section of flash. Used to access version data for a pending update that has + * not yet been activated. + * + * Return: the exit code of the operation. + */ +s32 ixgbe_get_inactive_orom_ver(struct ixgbe_hw *hw, + struct ixgbe_orom_info *orom) +{ + return ixgbe_get_orom_ver_info(hw, IXGBE_INACTIVE_FLASH_BANK, orom); +} + +/** + * ixgbe_get_nvm_ver_info - Read NVM version information + * @hw: pointer to the HW struct + * @bank: whether to read from the active or inactive flash bank + * @nvm: pointer to NVM info structure + * + * Read the NVM EETRACK ID and map version of the main NVM image bank, filling + * in the nvm info structure. + * + * Return: the exit code of the operation. + */ +static s32 ixgbe_get_nvm_ver_info(struct ixgbe_hw *hw, + enum ixgbe_bank_select bank, + struct ixgbe_nvm_info *nvm) +{ + u16 eetrack_lo, eetrack_hi, ver; + s32 status; + + status = ixgbe_read_nvm_sr_copy(hw, bank, + E610_SR_NVM_DEV_STARTER_VER, &ver); + if (status) { + return status; + } + + nvm->major = (ver & E610_NVM_VER_HI_MASK) >> E610_NVM_VER_HI_SHIFT; + nvm->minor = (ver & E610_NVM_VER_LO_MASK) >> E610_NVM_VER_LO_SHIFT; + + status = ixgbe_read_nvm_sr_copy(hw, bank, E610_SR_NVM_EETRACK_LO, + &eetrack_lo); + if (status) { + return status; + } + status = ixgbe_read_nvm_sr_copy(hw, bank, E610_SR_NVM_EETRACK_HI, + &eetrack_hi); + if (status) { + return status; + } + + nvm->eetrack = (eetrack_hi << 16) | eetrack_lo; + + status = ixgbe_get_nvm_srev(hw, bank, &nvm->srev); + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_get_inactive_nvm_ver - Read Option ROM version from the inactive bank + * @hw: pointer to the HW structure + * @nvm: storage for Option ROM version information + * + * Reads the NVM EETRACK ID, Map version, and security revision of the + * inactive NVM bank. Used to access version data for a pending update that + * has not yet been activated. + * + * Return: the exit code of the operation. + */ +s32 ixgbe_get_inactive_nvm_ver(struct ixgbe_hw *hw, struct ixgbe_nvm_info *nvm) +{ + return ixgbe_get_nvm_ver_info(hw, IXGBE_INACTIVE_FLASH_BANK, nvm); +} + +/** + * ixgbe_get_active_nvm_ver - Read Option ROM version from the active bank + * @hw: pointer to the HW structure + * @nvm: storage for Option ROM version information + * + * Reads the NVM EETRACK ID, Map version, and security revision of the + * active NVM bank. + * + * Return: the exit code of the operation. + */ +s32 ixgbe_get_active_nvm_ver(struct ixgbe_hw *hw, struct ixgbe_nvm_info *nvm) +{ + return ixgbe_get_nvm_ver_info(hw, IXGBE_ACTIVE_FLASH_BANK, nvm); +} + +/** + * ixgbe_get_netlist_info + * @hw: pointer to the HW struct + * @bank: whether to read from the active or inactive flash bank + * @netlist: pointer to netlist version info structure + * + * Get the netlist version information from the requested bank. Reads the Link + * Topology section to find the Netlist ID block and extract the relevant + * information into the netlist version structure. + * + * Return: the exit code of the operation. + */ +static s32 ixgbe_get_netlist_info(struct ixgbe_hw *hw, + enum ixgbe_bank_select bank, + struct ixgbe_netlist_info *netlist) +{ + u16 module_id, length, node_count, i; + u16 *id_blk; + s32 status; + + status = ixgbe_read_netlist_module(hw, bank, IXGBE_NETLIST_TYPE_OFFSET, + &module_id); + if (status) + return status; + + if (module_id != IXGBE_NETLIST_LINK_TOPO_MOD_ID) { + return IXGBE_ERR_NVM; + } + + status = ixgbe_read_netlist_module(hw, bank, IXGBE_LINK_TOPO_MODULE_LEN, + &length); + if (status) + return status; + + /* sanity check that we have at least enough words to store the + * netlist ID block + */ + if (length < IXGBE_NETLIST_ID_BLK_SIZE) { + return IXGBE_ERR_NVM; + } + + status = ixgbe_read_netlist_module(hw, bank, IXGBE_LINK_TOPO_NODE_COUNT, + &node_count); + if (status) + return status; + node_count &= IXGBE_LINK_TOPO_NODE_COUNT_M; + + id_blk = (u16 *)ixgbe_calloc(hw, IXGBE_NETLIST_ID_BLK_SIZE, + sizeof(*id_blk)); + if (!id_blk) + return IXGBE_ERR_NO_SPACE; + + /* Read out the entire Netlist ID Block at once. */ + status = ixgbe_read_flash_module(hw, bank, E610_SR_NETLIST_BANK_PTR, + IXGBE_NETLIST_ID_BLK_OFFSET(node_count) * sizeof(u16), + (u8 *)id_blk, + IXGBE_NETLIST_ID_BLK_SIZE * sizeof(u16)); + if (status) + goto exit_error; + + for (i = 0; i < IXGBE_NETLIST_ID_BLK_SIZE; i++) + id_blk[i] = IXGBE_LE16_TO_CPU(((__le16 *)id_blk)[i]); + + netlist->major = id_blk[IXGBE_NETLIST_ID_BLK_MAJOR_VER_HIGH] << 16 | + id_blk[IXGBE_NETLIST_ID_BLK_MAJOR_VER_LOW]; + netlist->minor = id_blk[IXGBE_NETLIST_ID_BLK_MINOR_VER_HIGH] << 16 | + id_blk[IXGBE_NETLIST_ID_BLK_MINOR_VER_LOW]; + netlist->type = id_blk[IXGBE_NETLIST_ID_BLK_TYPE_HIGH] << 16 | + id_blk[IXGBE_NETLIST_ID_BLK_TYPE_LOW]; + netlist->rev = id_blk[IXGBE_NETLIST_ID_BLK_REV_HIGH] << 16 | + id_blk[IXGBE_NETLIST_ID_BLK_REV_LOW]; + netlist->cust_ver = id_blk[IXGBE_NETLIST_ID_BLK_CUST_VER]; + /* Read the left most 4 bytes of SHA */ + netlist->hash = id_blk[IXGBE_NETLIST_ID_BLK_SHA_HASH_WORD(15)] << 16 | + id_blk[IXGBE_NETLIST_ID_BLK_SHA_HASH_WORD(14)]; + +exit_error: + ixgbe_free(hw, id_blk); + + return status; +} + +/** + * ixgbe_get_inactive_netlist_ver + * @hw: pointer to the HW struct + * @netlist: pointer to netlist version info structure + * + * Read the netlist version data from the inactive netlist bank. Used to + * extract version data of a pending flash update in order to display the + * version data. + * + * Return: the exit code of the operation. + */ +s32 ixgbe_get_inactive_netlist_ver(struct ixgbe_hw *hw, + struct ixgbe_netlist_info *netlist) +{ + return ixgbe_get_netlist_info(hw, IXGBE_INACTIVE_FLASH_BANK, netlist); +} + +/** + * ixgbe_read_sr_pointer - Read the value of a Shadow RAM pointer word + * @hw: pointer to the HW structure + * @offset: the word offset of the Shadow RAM word to read + * @pointer: pointer value read from Shadow RAM + * + * Read the given Shadow RAM word, and convert it to a pointer value specified + * in bytes. This function assumes the specified offset is a valid pointer + * word. + * + * Each pointer word specifies whether it is stored in word size or 4KB + * sector size by using the highest bit. The reported pointer value will be in + * bytes, intended for flat NVM reads. + * + * Return: the exit code of the operation. + */ +static s32 ixgbe_read_sr_pointer(struct ixgbe_hw *hw, u16 offset, u32 *pointer) +{ + s32 status; + u16 value; + + status = ixgbe_read_ee_aci_E610(hw, offset, &value); + if (status) + return status; + + /* Determine if the pointer is in 4KB or word units */ + if (value & IXGBE_SR_NVM_PTR_4KB_UNITS) + *pointer = (value & ~IXGBE_SR_NVM_PTR_4KB_UNITS) * 4 * 1024; + else + *pointer = value * 2; + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_read_sr_area_size - Read an area size from a Shadow RAM word + * @hw: pointer to the HW structure + * @offset: the word offset of the Shadow RAM to read + * @size: size value read from the Shadow RAM + * + * Read the given Shadow RAM word, and convert it to an area size value + * specified in bytes. This function assumes the specified offset is a valid + * area size word. + * + * Each area size word is specified in 4KB sector units. This function reports + * the size in bytes, intended for flat NVM reads. + * + * Return: the exit code of the operation. + */ +static s32 ixgbe_read_sr_area_size(struct ixgbe_hw *hw, u16 offset, u32 *size) +{ + s32 status; + u16 value; + + status = ixgbe_read_ee_aci_E610(hw, offset, &value); + if (status) + return status; + + /* Area sizes are always specified in 4KB units */ + *size = value * 4 * 1024; + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_discover_flash_size - Discover the available flash size. + * @hw: pointer to the HW struct + * + * The device flash could be up to 16MB in size. However, it is possible that + * the actual size is smaller. Use bisection to determine the accessible size + * of flash memory. + * + * Return: the exit code of the operation. + */ +static s32 ixgbe_discover_flash_size(struct ixgbe_hw *hw) +{ + u32 min_size = 0, max_size = IXGBE_ACI_NVM_MAX_OFFSET + 1; + s32 status; + + status = ixgbe_acquire_nvm(hw, IXGBE_RES_READ); + if (status) + return status; + + while ((max_size - min_size) > 1) { + u32 offset = (max_size + min_size) / 2; + u32 len = 1; + u8 data; + + status = ixgbe_read_flat_nvm(hw, offset, &len, &data, false); + if (status == IXGBE_ERR_ACI_ERROR && + hw->aci.last_status == IXGBE_ACI_RC_EINVAL) { + status = IXGBE_SUCCESS; + max_size = offset; + } else if (!status) { + min_size = offset; + } else { + /* an unexpected error occurred */ + goto err_read_flat_nvm; + } + } + + hw->flash.flash_size = max_size; + +err_read_flat_nvm: + ixgbe_release_nvm(hw); + + return status; +} + +/** + * ixgbe_determine_active_flash_banks - Discover active bank for each module + * @hw: pointer to the HW struct + * + * Read the Shadow RAM control word and determine which banks are active for + * the NVM, OROM, and Netlist modules. Also read and calculate the associated + * pointer and size. These values are then cached into the ixgbe_flash_info + * structure for later use in order to calculate the correct offset to read + * from the active module. + * + * Return: the exit code of the operation. + */ +static s32 ixgbe_determine_active_flash_banks(struct ixgbe_hw *hw) +{ + struct ixgbe_bank_info *banks = &hw->flash.banks; + u16 ctrl_word; + s32 status; + + status = ixgbe_read_ee_aci_E610(hw, E610_SR_NVM_CTRL_WORD, &ctrl_word); + if (status) { + return status; + } + + /* Check that the control word indicates validity */ + if ((ctrl_word & IXGBE_SR_CTRL_WORD_1_M) >> IXGBE_SR_CTRL_WORD_1_S != + IXGBE_SR_CTRL_WORD_VALID) { + return IXGBE_ERR_CONFIG; + } + + if (!(ctrl_word & IXGBE_SR_CTRL_WORD_NVM_BANK)) + banks->nvm_bank = IXGBE_1ST_FLASH_BANK; + else + banks->nvm_bank = IXGBE_2ND_FLASH_BANK; + + if (!(ctrl_word & IXGBE_SR_CTRL_WORD_OROM_BANK)) + banks->orom_bank = IXGBE_1ST_FLASH_BANK; + else + banks->orom_bank = IXGBE_2ND_FLASH_BANK; + + if (!(ctrl_word & IXGBE_SR_CTRL_WORD_NETLIST_BANK)) + banks->netlist_bank = IXGBE_1ST_FLASH_BANK; + else + banks->netlist_bank = IXGBE_2ND_FLASH_BANK; + + status = ixgbe_read_sr_pointer(hw, E610_SR_1ST_NVM_BANK_PTR, + &banks->nvm_ptr); + if (status) { + return status; + } + + status = ixgbe_read_sr_area_size(hw, E610_SR_NVM_BANK_SIZE, + &banks->nvm_size); + if (status) { + return status; + } + + status = ixgbe_read_sr_pointer(hw, E610_SR_1ST_OROM_BANK_PTR, + &banks->orom_ptr); + if (status) { + return status; + } + + status = ixgbe_read_sr_area_size(hw, E610_SR_OROM_BANK_SIZE, + &banks->orom_size); + if (status) { + return status; + } + + status = ixgbe_read_sr_pointer(hw, E610_SR_NETLIST_BANK_PTR, + &banks->netlist_ptr); + if (status) { + return status; + } + + status = ixgbe_read_sr_area_size(hw, E610_SR_NETLIST_BANK_SIZE, + &banks->netlist_size); + if (status) { + return status; + } + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_init_nvm - initializes NVM setting + * @hw: pointer to the HW struct + * + * Read and populate NVM settings such as Shadow RAM size, + * max_timeout, and blank_nvm_mode + * + * Return: the exit code of the operation. + */ +s32 ixgbe_init_nvm(struct ixgbe_hw *hw) +{ + struct ixgbe_flash_info *flash = &hw->flash; + u32 fla, gens_stat; + s32 status; + u8 sr_size; + + /* The SR size is stored regardless of the NVM programming mode + * as the blank mode may be used in the factory line. + */ + gens_stat = IXGBE_READ_REG(hw, GLNVM_GENS); + sr_size = (gens_stat & GLNVM_GENS_SR_SIZE_M) >> GLNVM_GENS_SR_SIZE_S; + + /* Switching to words (sr_size contains power of 2) */ + flash->sr_words = BIT(sr_size) * IXGBE_SR_WORDS_IN_1KB; + + /* Check if we are in the normal or blank NVM programming mode */ + fla = IXGBE_READ_REG(hw, GLNVM_FLA); + if (fla & GLNVM_FLA_LOCKED_M) { /* Normal programming mode */ + flash->blank_nvm_mode = false; + } else { + /* Blank programming mode */ + flash->blank_nvm_mode = true; + return IXGBE_ERR_NVM_BLANK_MODE; + } + + status = ixgbe_discover_flash_size(hw); + if (status) { + return status; + } + + status = ixgbe_determine_active_flash_banks(hw); + if (status) { + return status; + } + + status = ixgbe_get_nvm_ver_info(hw, IXGBE_ACTIVE_FLASH_BANK, + &flash->nvm); + if (status) { + return status; + } + status = ixgbe_get_orom_ver_info(hw, IXGBE_ACTIVE_FLASH_BANK, + &flash->orom); + + /* read the netlist version information */ + status = ixgbe_get_netlist_info(hw, IXGBE_ACTIVE_FLASH_BANK, + &flash->netlist); + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_aci_nvm_update_empr - NVM update EMPR + * @hw: pointer to the HW struct + * + * Update empr using ACI command (0x0709). This command allows SW to + * request an EMPR to activate new FW. + * + * Return: the exit code of the operation. + */ +s32 ixgbe_aci_nvm_update_empr(struct ixgbe_hw *hw) +{ + struct ixgbe_aci_desc desc; + + ixgbe_fill_dflt_direct_cmd_desc(&desc, ixgbe_aci_opc_nvm_update_empr); + + return ixgbe_aci_send_cmd(hw, &desc, NULL, 0); +} + +/* ixgbe_nvm_set_pkg_data - NVM set package data + * @hw: pointer to the HW struct + * @del_pkg_data_flag: If is set then the current pkg_data store by FW + * is deleted. + * If bit is set to 1, then buffer should be size 0. + * @data: pointer to buffer + * @length: length of the buffer + * + * Set package data using ACI command (0x070A). + * This command is equivalent to the reception of + * a PLDM FW Update GetPackageData cmd. This command should be sent + * as part of the NVM update as the first cmd in the flow. + * + * Return: the exit code of the operation. + */ +s32 ixgbe_nvm_set_pkg_data(struct ixgbe_hw *hw, bool del_pkg_data_flag, + u8 *data, u16 length) +{ + struct ixgbe_aci_cmd_nvm_pkg_data *cmd; + struct ixgbe_aci_desc desc; + + if (length != 0 && !data) + return IXGBE_ERR_PARAM; + + cmd = &desc.params.pkg_data; + + ixgbe_fill_dflt_direct_cmd_desc(&desc, ixgbe_aci_opc_nvm_pkg_data); + desc.flags |= IXGBE_CPU_TO_LE16(IXGBE_ACI_FLAG_RD); + + if (del_pkg_data_flag) + cmd->cmd_flags |= IXGBE_ACI_NVM_PKG_DELETE; + + return ixgbe_aci_send_cmd(hw, &desc, data, length); +} + +/* ixgbe_nvm_pass_component_tbl - NVM pass component table + * @hw: pointer to the HW struct + * @data: pointer to buffer + * @length: length of the buffer + * @transfer_flag: parameter for determining stage of the update + * @comp_response: a pointer to the response from the 0x070B AQC. + * @comp_response_code: a pointer to the response code from the 0x070B AQC. + * + * Pass component table using ACI command (0x070B). This command is equivalent + * to the reception of a PLDM FW Update PassComponentTable cmd. + * This command should be sent once per component. It can be only sent after + * Set Package Data cmd and before actual update. FW will assume these + * commands are going to be sent until the TransferFlag is set to End or + * StartAndEnd. + * + * Return: the exit code of the operation. + */ +s32 ixgbe_nvm_pass_component_tbl(struct ixgbe_hw *hw, u8 *data, u16 length, + u8 transfer_flag, u8 *comp_response, + u8 *comp_response_code) +{ + struct ixgbe_aci_cmd_nvm_pass_comp_tbl *cmd; + struct ixgbe_aci_desc desc; + s32 status; + + if (!data || !comp_response || !comp_response_code) + return IXGBE_ERR_PARAM; + + cmd = &desc.params.pass_comp_tbl; + + ixgbe_fill_dflt_direct_cmd_desc(&desc, + ixgbe_aci_opc_nvm_pass_component_tbl); + desc.flags |= IXGBE_CPU_TO_LE16(IXGBE_ACI_FLAG_RD); + + cmd->transfer_flag = transfer_flag; + status = ixgbe_aci_send_cmd(hw, &desc, data, length); + + if (!status) { + *comp_response = cmd->component_response; + *comp_response_code = cmd->component_response_code; + } + return status; +} + +/** + * ixgbe_sanitize_operate - Clear the user data + * @hw: pointer to the HW struct + * + * Clear user data from NVM using ACI command (0x070C). + * + * Return: the exit code of the operation. + */ +s32 ixgbe_sanitize_operate(struct ixgbe_hw *hw) +{ + s32 status; + u8 values; + + u8 cmd_flags = IXGBE_ACI_SANITIZE_REQ_OPERATE | + IXGBE_ACI_SANITIZE_OPERATE_SUBJECT_CLEAR; + + status = ixgbe_sanitize_nvm(hw, cmd_flags, &values); + if (status) + return status; + if ((!(values & IXGBE_ACI_SANITIZE_OPERATE_HOST_CLEAN_DONE) && + !(values & IXGBE_ACI_SANITIZE_OPERATE_BMC_CLEAN_DONE)) || + ((values & IXGBE_ACI_SANITIZE_OPERATE_HOST_CLEAN_DONE) && + !(values & IXGBE_ACI_SANITIZE_OPERATE_HOST_CLEAN_SUCCESS)) || + ((values & IXGBE_ACI_SANITIZE_OPERATE_BMC_CLEAN_DONE) && + !(values & IXGBE_ACI_SANITIZE_OPERATE_BMC_CLEAN_SUCCESS))) + return IXGBE_ERR_ACI_ERROR; + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_sanitize_nvm - Sanitize NVM + * @hw: pointer to the HW struct + * @cmd_flags: flag to the ACI command + * @values: values returned from the command + * + * Sanitize NVM using ACI command (0x070C). + * + * Return: the exit code of the operation. + */ +s32 ixgbe_sanitize_nvm(struct ixgbe_hw *hw, u8 cmd_flags, u8 *values) +{ + struct ixgbe_aci_desc desc; + struct ixgbe_aci_cmd_nvm_sanitization *cmd; + s32 status; + + cmd = &desc.params.nvm_sanitization; + ixgbe_fill_dflt_direct_cmd_desc(&desc, ixgbe_aci_opc_nvm_sanitization); + cmd->cmd_flags = cmd_flags; + + status = ixgbe_aci_send_cmd(hw, &desc, NULL, 0); + if (values) + *values = cmd->values; + + return status; +} + +/** + * ixgbe_read_sr_word_aci - Reads Shadow RAM via ACI + * @hw: pointer to the HW structure + * @offset: offset of the Shadow RAM word to read (0x000000 - 0x001FFF) + * @data: word read from the Shadow RAM + * + * Reads one 16 bit word from the Shadow RAM using ixgbe_read_flat_nvm. + * + * Return: the exit code of the operation. + */ +s32 ixgbe_read_sr_word_aci(struct ixgbe_hw *hw, u16 offset, u16 *data) +{ + u32 bytes = sizeof(u16); + __le16 data_local; + s32 status; + + status = ixgbe_read_flat_nvm(hw, offset * sizeof(u16), &bytes, + (u8 *)&data_local, true); + if (status) + return status; + + *data = IXGBE_LE16_TO_CPU(data_local); + return IXGBE_SUCCESS; +} + +/** + * ixgbe_read_sr_buf_aci - Reads Shadow RAM buf via ACI + * @hw: pointer to the HW structure + * @offset: offset of the Shadow RAM word to read (0x000000 - 0x001FFF) + * @words: (in) number of words to read; (out) number of words actually read + * @data: words read from the Shadow RAM + * + * Reads 16 bit words (data buf) from the Shadow RAM. Ownership of the NVM is + * taken before reading the buffer and later released. + * + * Return: the exit code of the operation. + */ +s32 ixgbe_read_sr_buf_aci(struct ixgbe_hw *hw, u16 offset, u16 *words, + u16 *data) +{ + u32 bytes = *words * 2, i; + s32 status; + + status = ixgbe_read_flat_nvm(hw, offset * 2, &bytes, (u8 *)data, true); + + *words = bytes / 2; + + for (i = 0; i < *words; i++) + data[i] = IXGBE_LE16_TO_CPU(((__le16 *)data)[i]); + + return status; +} + +/** + * ixgbe_read_flat_nvm - Read portion of NVM by flat offset + * @hw: pointer to the HW struct + * @offset: offset from beginning of NVM + * @length: (in) number of bytes to read; (out) number of bytes actually read + * @data: buffer to return data in (sized to fit the specified length) + * @read_shadow_ram: if true, read from shadow RAM instead of NVM + * + * Reads a portion of the NVM, as a flat memory space. This function correctly + * breaks read requests across Shadow RAM sectors, prevents Shadow RAM size + * from being exceeded in case of Shadow RAM read requests and ensures that no + * single read request exceeds the maximum 4KB read for a single admin command. + * + * Returns a status code on failure. Note that the data pointer may be + * partially updated if some reads succeed before a failure. + * + * Return: the exit code of the operation. + */ +s32 ixgbe_read_flat_nvm(struct ixgbe_hw *hw, u32 offset, u32 *length, + u8 *data, bool read_shadow_ram) +{ + u32 inlen = *length; + u32 bytes_read = 0; + bool last_cmd; + s32 status; + + *length = 0; + + /* Verify the length of the read if this is for the Shadow RAM */ + if (read_shadow_ram && ((offset + inlen) > + (hw->eeprom.word_size * 2u))) { + return IXGBE_ERR_PARAM; + } + + do { + u32 read_size, sector_offset; + + /* ixgbe_aci_read_nvm cannot read more than 4KB at a time. + * Additionally, a read from the Shadow RAM may not cross over + * a sector boundary. Conveniently, the sector size is also 4KB. + */ + sector_offset = offset % IXGBE_ACI_MAX_BUFFER_SIZE; + read_size = MIN_T(u32, + IXGBE_ACI_MAX_BUFFER_SIZE - sector_offset, + inlen - bytes_read); + + last_cmd = !(bytes_read + read_size < inlen); + + /* ixgbe_aci_read_nvm takes the length as a u16. Our read_size + * is calculated using a u32, but the IXGBE_ACI_MAX_BUFFER_SIZE + * maximum size guarantees that it will fit within the 2 bytes. + */ + status = ixgbe_aci_read_nvm(hw, IXGBE_ACI_NVM_START_POINT, + offset, (u16)read_size, + data + bytes_read, last_cmd, + read_shadow_ram); + if (status) + break; + + bytes_read += read_size; + offset += read_size; + } while (!last_cmd); + + *length = bytes_read; + return status; +} + +/** + * ixgbe_aci_alternate_write - write to alternate structure + * @hw: pointer to the hardware structure + * @reg_addr0: address of first dword to be written + * @reg_val0: value to be written under 'reg_addr0' + * @reg_addr1: address of second dword to be written + * @reg_val1: value to be written under 'reg_addr1' + * + * Write one or two dwords to alternate structure using ACI command (0x0900). + * Fields are indicated by 'reg_addr0' and 'reg_addr1' register numbers. + * + * Return: 0 on success and error code on failure. + */ +s32 ixgbe_aci_alternate_write(struct ixgbe_hw *hw, u32 reg_addr0, + u32 reg_val0, u32 reg_addr1, u32 reg_val1) +{ + struct ixgbe_aci_cmd_read_write_alt_direct *cmd; + struct ixgbe_aci_desc desc; + s32 status; + + cmd = &desc.params.read_write_alt_direct; + + ixgbe_fill_dflt_direct_cmd_desc(&desc, ixgbe_aci_opc_write_alt_direct); + cmd->dword0_addr = IXGBE_CPU_TO_LE32(reg_addr0); + cmd->dword1_addr = IXGBE_CPU_TO_LE32(reg_addr1); + cmd->dword0_value = IXGBE_CPU_TO_LE32(reg_val0); + cmd->dword1_value = IXGBE_CPU_TO_LE32(reg_val1); + + status = ixgbe_aci_send_cmd(hw, &desc, NULL, 0); + + return status; +} + +/** + * ixgbe_aci_alternate_read - read from alternate structure + * @hw: pointer to the hardware structure + * @reg_addr0: address of first dword to be read + * @reg_val0: pointer for data read from 'reg_addr0' + * @reg_addr1: address of second dword to be read + * @reg_val1: pointer for data read from 'reg_addr1' + * + * Read one or two dwords from alternate structure using ACI command (0x0902). + * Fields are indicated by 'reg_addr0' and 'reg_addr1' register numbers. + * If 'reg_val1' pointer is not passed then only register at 'reg_addr0' + * is read. + * + * Return: 0 on success and error code on failure. + */ +s32 ixgbe_aci_alternate_read(struct ixgbe_hw *hw, u32 reg_addr0, + u32 *reg_val0, u32 reg_addr1, u32 *reg_val1) +{ + struct ixgbe_aci_cmd_read_write_alt_direct *cmd; + struct ixgbe_aci_desc desc; + s32 status; + + cmd = &desc.params.read_write_alt_direct; + + if (!reg_val0) + return IXGBE_ERR_PARAM; + + ixgbe_fill_dflt_direct_cmd_desc(&desc, ixgbe_aci_opc_read_alt_direct); + cmd->dword0_addr = IXGBE_CPU_TO_LE32(reg_addr0); + cmd->dword1_addr = IXGBE_CPU_TO_LE32(reg_addr1); + + status = ixgbe_aci_send_cmd(hw, &desc, NULL, 0); + + if (status == IXGBE_SUCCESS) { + *reg_val0 = IXGBE_LE32_TO_CPU(cmd->dword0_value); + + if (reg_val1) + *reg_val1 = IXGBE_LE32_TO_CPU(cmd->dword1_value); + } + + return status; +} + +/** + * ixgbe_aci_alternate_write_done - check if writing to alternate structure + * is done + * @hw: pointer to the HW structure. + * @bios_mode: indicates whether the command is executed by UEFI or legacy BIOS + * @reset_needed: indicates the SW should trigger GLOBAL reset + * + * Indicates to the FW that alternate structures have been changed. + * + * Return: 0 on success and error code on failure. + */ +s32 ixgbe_aci_alternate_write_done(struct ixgbe_hw *hw, u8 bios_mode, + bool *reset_needed) +{ + struct ixgbe_aci_cmd_done_alt_write *cmd; + struct ixgbe_aci_desc desc; + s32 status; + + cmd = &desc.params.done_alt_write; + + if (!reset_needed) + return IXGBE_ERR_PARAM; + + ixgbe_fill_dflt_direct_cmd_desc(&desc, ixgbe_aci_opc_done_alt_write); + cmd->flags = bios_mode; + + status = ixgbe_aci_send_cmd(hw, &desc, NULL, 0); + if (!status) + *reset_needed = (IXGBE_LE16_TO_CPU(cmd->flags) & + IXGBE_ACI_RESP_RESET_NEEDED) != 0; + + return status; +} + +/** + * ixgbe_aci_alternate_clear - clear alternate structure + * @hw: pointer to the HW structure. + * + * Clear the alternate structures of the port from which the function + * is called. + * + * Return: 0 on success and error code on failure. + */ +s32 ixgbe_aci_alternate_clear(struct ixgbe_hw *hw) +{ + struct ixgbe_aci_desc desc; + s32 status; + + ixgbe_fill_dflt_direct_cmd_desc(&desc, + ixgbe_aci_opc_clear_port_alt_write); + + status = ixgbe_aci_send_cmd(hw, &desc, NULL, 0); + + return status; +} + +/** + * ixgbe_aci_get_internal_data - get internal FW/HW data + * @hw: pointer to the hardware structure + * @cluster_id: specific cluster to dump + * @table_id: table ID within cluster + * @start: index of line in the block to read + * @buf: dump buffer + * @buf_size: dump buffer size + * @ret_buf_size: return buffer size (returned by FW) + * @ret_next_cluster: next cluster to read (returned by FW) + * @ret_next_table: next block to read (returned by FW) + * @ret_next_index: next index to read (returned by FW) + * + * Get internal FW/HW data using ACI command (0xFF08) for debug purposes. + * + * Return: the exit code of the operation. + */ +s32 ixgbe_aci_get_internal_data(struct ixgbe_hw *hw, u16 cluster_id, + u16 table_id, u32 start, void *buf, + u16 buf_size, u16 *ret_buf_size, + u16 *ret_next_cluster, u16 *ret_next_table, + u32 *ret_next_index) +{ + struct ixgbe_aci_cmd_debug_dump_internals *cmd; + struct ixgbe_aci_desc desc; + s32 status; + + cmd = &desc.params.debug_dump; + + if (buf_size == 0 || !buf) + return IXGBE_ERR_PARAM; + + ixgbe_fill_dflt_direct_cmd_desc(&desc, + ixgbe_aci_opc_debug_dump_internals); + + cmd->cluster_id = IXGBE_CPU_TO_LE16(cluster_id); + cmd->table_id = IXGBE_CPU_TO_LE16(table_id); + cmd->idx = IXGBE_CPU_TO_LE32(start); + + status = ixgbe_aci_send_cmd(hw, &desc, buf, buf_size); + + if (!status) { + if (ret_buf_size) + *ret_buf_size = IXGBE_LE16_TO_CPU(desc.datalen); + if (ret_next_cluster) + *ret_next_cluster = IXGBE_LE16_TO_CPU(cmd->cluster_id); + if (ret_next_table) + *ret_next_table = IXGBE_LE16_TO_CPU(cmd->table_id); + if (ret_next_index) + *ret_next_index = IXGBE_LE32_TO_CPU(cmd->idx); + } + + return status; +} + +/** + * ixgbe_validate_nvm_rw_reg - Check that an NVM access request is valid + * @cmd: NVM access command structure + * + * Validates that an NVM access structure is request to read or write a valid + * register offset. First validates that the module and flags are correct, and + * then ensures that the register offset is one of the accepted registers. + * + * Return: 0 if the register access is valid, out of range error code otherwise. + */ +static s32 +ixgbe_validate_nvm_rw_reg(struct ixgbe_nvm_access_cmd *cmd) +{ + u16 i; + + switch (cmd->offset) { + case GL_HICR: + case GL_HICR_EN: /* Note, this register is read only */ + case GL_FWSTS: + case GL_MNG_FWSM: + case GLNVM_GENS: + case GLNVM_FLA: + case GL_FWRESETCNT: + return 0; + default: + break; + } + + for (i = 0; i <= GL_HIDA_MAX_INDEX; i++) + if (cmd->offset == (u32)GL_HIDA(i)) + return 0; + + for (i = 0; i <= GL_HIBA_MAX_INDEX; i++) + if (cmd->offset == (u32)GL_HIBA(i)) + return 0; + + /* All other register offsets are not valid */ + return IXGBE_ERR_OUT_OF_RANGE; +} + +/** + * ixgbe_nvm_access_read - Handle an NVM read request + * @hw: pointer to the HW struct + * @cmd: NVM access command to process + * @data: storage for the register value read + * + * Process an NVM access request to read a register. + * + * Return: 0 if the register read is valid and successful, + * out of range error code otherwise. + */ +static s32 ixgbe_nvm_access_read(struct ixgbe_hw *hw, + struct ixgbe_nvm_access_cmd *cmd, + struct ixgbe_nvm_access_data *data) +{ + s32 status; + + /* Always initialize the output data, even on failure */ + memset(&data->regval, 0, cmd->data_size); + + /* Make sure this is a valid read/write access request */ + status = ixgbe_validate_nvm_rw_reg(cmd); + if (status) + return status; + + hw_dbg(hw, "NVM access: reading register %08x\n", cmd->offset); + + /* Read the register and store the contents in the data field */ + data->regval = IXGBE_READ_REG(hw, cmd->offset); + + return 0; +} + +/** + * ixgbe_nvm_access_write - Handle an NVM write request + * @hw: pointer to the HW struct + * @cmd: NVM access command to process + * @data: NVM access data to write + * + * Process an NVM access request to write a register. + * + * Return: 0 if the register write is valid and successful, + * out of range error code otherwise. + */ +static s32 ixgbe_nvm_access_write(struct ixgbe_hw *hw, + struct ixgbe_nvm_access_cmd *cmd, + struct ixgbe_nvm_access_data *data) +{ + s32 status; + + /* Make sure this is a valid read/write access request */ + status = ixgbe_validate_nvm_rw_reg(cmd); + if (status) + return status; + + /* Reject requests to write to read-only registers */ + switch (cmd->offset) { + case GL_HICR_EN: + return IXGBE_ERR_OUT_OF_RANGE; + default: + break; + } + + hw_dbg(hw, "NVM access: writing register %08x with value %08x\n", + cmd->offset, data->regval); + + /* Write the data field to the specified register */ + IXGBE_WRITE_REG(hw, cmd->offset, data->regval); + + return 0; +} + +/** + * ixgbe_handle_nvm_access - Handle an NVM access request + * @hw: pointer to the HW struct + * @cmd: NVM access command info + * @data: pointer to read or return data + * + * Process an NVM access request. Read the command structure information and + * determine if it is valid. If not, report an error indicating the command + * was invalid. + * + * For valid commands, perform the necessary function, copying the data into + * the provided data buffer. + * + * Return: 0 if the nvm access request is valid and successful, + * error code otherwise. + */ +s32 ixgbe_handle_nvm_access(struct ixgbe_hw *hw, + struct ixgbe_nvm_access_cmd *cmd, + struct ixgbe_nvm_access_data *data) +{ + switch (cmd->command) { + case IXGBE_NVM_CMD_READ: + return ixgbe_nvm_access_read(hw, cmd, data); + case IXGBE_NVM_CMD_WRITE: + return ixgbe_nvm_access_write(hw, cmd, data); + default: + return IXGBE_ERR_PARAM; + } +} + +/** + * ixgbe_aci_set_health_status_config - Configure FW health events + * @hw: pointer to the HW struct + * @event_source: type of diagnostic events to enable + * + * Configure the health status event types that the firmware will send to this + * PF using ACI command (0xFF20). The supported event types are: PF-specific, + * all PFs, and global. + * + * Return: the exit code of the operation. + */ +s32 ixgbe_aci_set_health_status_config(struct ixgbe_hw *hw, u8 event_source) +{ + struct ixgbe_aci_cmd_set_health_status_config *cmd; + struct ixgbe_aci_desc desc; + + cmd = &desc.params.set_health_status_config; + + ixgbe_fill_dflt_direct_cmd_desc(&desc, + ixgbe_aci_opc_set_health_status_config); + + cmd->event_source = event_source; + + return ixgbe_aci_send_cmd(hw, &desc, NULL, 0); +} + +/** + * ixgbe_fwlog_cache_cfg - Cache FW logging config + * @hw: pointer to the HW structure + * @cfg: config to cache + * + * Cache FW logging config. + */ +static void ixgbe_fwlog_cache_cfg(struct ixgbe_hw *hw, + struct ixgbe_fwlog_cfg *cfg) +{ + hw->fwlog_cfg = *cfg; +} + +/** + * ixgbe_fwlog_valid_module_entries - validate all the module entry IDs and + * log levels + * @hw: pointer to the HW structure + * @entries: entries to validate + * @num_entries: number of entries to validate + * + * Checks if all the module entry IDs and log levels are valid. + * + * Return: true if all the module entry IDs and log levels are valid, + * otherwise false. + */ +static bool ixgbe_fwlog_valid_module_entries(struct ixgbe_hw *hw, + struct ixgbe_fwlog_module_entry *entries, + u16 num_entries) +{ + u16 i; + + UNREFERENCED_1PARAMETER(hw); + + if (!entries) { + return false; + } + + if (!num_entries) { + return false; + } + + for (i = 0; i < num_entries; i++) { + struct ixgbe_fwlog_module_entry *entry = &entries[i]; + + if (entry->module_id >= IXGBE_ACI_FW_LOG_ID_MAX) { + return false; + } + + if (entry->log_level >= IXGBE_FWLOG_LEVEL_INVALID) { + return false; + } + } + + return true; +} + +/** + * ixgbe_fwlog_valid_cfg - validate configuration + * @hw: pointer to the HW structure + * @cfg: config to validate + * + * Validate the entire configuration. + * + * Return: true if the entire configuration is valid, otherwise false. + */ +static bool ixgbe_fwlog_valid_cfg(struct ixgbe_hw *hw, + struct ixgbe_fwlog_cfg *cfg) +{ + if (!cfg) { + return false; + } + + if (cfg->log_resolution < IXGBE_ACI_FW_LOG_MIN_RESOLUTION || + cfg->log_resolution > IXGBE_ACI_FW_LOG_MAX_RESOLUTION) { + return false; + } + + if (!ixgbe_fwlog_valid_module_entries(hw, cfg->module_entries, + IXGBE_ACI_FW_LOG_ID_MAX)) + return false; + + return true; +} + +/** + * ixgbe_aci_fwlog_set - Set FW logging configuration + * @hw: pointer to the HW structure + * @entries: entries to configure + * @num_entries: number of @entries + * @options: options from ixgbe_fwlog_cfg->options structure + * @log_resolution: logging resolution + * + * Set FW logging configuration using ACI command (0xFF30). + * + * Return: the exit code of the operation. + */ +static s32 ixgbe_aci_fwlog_set(struct ixgbe_hw *hw, + struct ixgbe_fwlog_module_entry *entries, + u16 num_entries, u16 options, u16 log_resolution) +{ + struct ixgbe_aci_cmd_fw_log_cfg_resp fw_modules[IXGBE_ACI_FW_LOG_ID_MAX]; + struct ixgbe_aci_cmd_fw_log *cmd; + struct ixgbe_aci_desc desc; + s32 status; + u16 i; + + if (num_entries > IXGBE_ACI_FW_LOG_ID_MAX) + return IXGBE_ERR_PARAM; + + for (i = 0; i < num_entries; i++) { + fw_modules[i].module_identifier = + IXGBE_CPU_TO_LE16(entries[i].module_id); + fw_modules[i].log_level = entries[i].log_level; + } + + ixgbe_fill_dflt_direct_cmd_desc(&desc, ixgbe_aci_opc_fw_logs_config); + desc.flags |= IXGBE_CPU_TO_LE16(IXGBE_ACI_FLAG_RD); + + cmd = &desc.params.fw_log; + + cmd->cmd_flags = IXGBE_ACI_FW_LOG_CONF_SET_VALID; + cmd->ops.cfg.log_resolution = IXGBE_CPU_TO_LE16(log_resolution); + cmd->ops.cfg.mdl_cnt = IXGBE_CPU_TO_LE16(num_entries); + + if (options & IXGBE_FWLOG_OPTION_ARQ_ENA) + cmd->cmd_flags |= IXGBE_ACI_FW_LOG_CONF_AQ_EN; + if (options & IXGBE_FWLOG_OPTION_UART_ENA) + cmd->cmd_flags |= IXGBE_ACI_FW_LOG_CONF_UART_EN; + + status = ixgbe_aci_send_cmd(hw, &desc, fw_modules, + sizeof(*fw_modules) * num_entries); + + return status; +} + +/** + * ixgbe_fwlog_supported - Cached for whether FW supports FW logging or not + * @hw: pointer to the HW structure + * + * This will always return false if called before ixgbe_init_hw(), so it must be + * called after ixgbe_init_hw(). + * + * Return: true if FW supports FW logging. + * If this function is called before ixgbe_init_hw(), return false. + */ +bool ixgbe_fwlog_supported(struct ixgbe_hw *hw) +{ + return hw->fwlog_support_ena; +} + +/** + * ixgbe_fwlog_set - Set the firmware logging settings + * @hw: pointer to the HW structure + * @cfg: config used to set firmware logging + * + * Call this function whenever the driver needs to set the firmware + * logging configuration. It can be called on initialization, reset, or during + * runtime. + * + * If the PF wishes to receive FW logging then it must register via + * ixgbe_fwlog_register. Note, that ixgbe_fwlog_register does not need to + * be called for init. + * + * Return: the exit code of the operation. + */ +s32 ixgbe_fwlog_set(struct ixgbe_hw *hw, struct ixgbe_fwlog_cfg *cfg) +{ + s32 status; + + if (!ixgbe_fwlog_supported(hw)) + return IXGBE_ERR_NOT_SUPPORTED; + + if (!ixgbe_fwlog_valid_cfg(hw, cfg)) + return IXGBE_ERR_PARAM; + + status = ixgbe_aci_fwlog_set(hw, cfg->module_entries, + IXGBE_ACI_FW_LOG_ID_MAX, cfg->options, + cfg->log_resolution); + if (!status) + ixgbe_fwlog_cache_cfg(hw, cfg); + + return status; +} + +/** + * ixgbe_fwlog_update_cached_entries - Update module entries in cached + * FW logging config + * @hw: pointer to the HW structure + * @entries: entries to cache + * @num_entries: number of @entries + * + * Update module entries in cached FW logging config. + */ +static void ixgbe_fwlog_update_cached_entries(struct ixgbe_hw *hw, + struct ixgbe_fwlog_module_entry *entries, + u16 num_entries) +{ + u16 i; + + for (i = 0; i < num_entries; i++) { + struct ixgbe_fwlog_module_entry *updated = &entries[i]; + u16 j; + + for (j = 0; j < IXGBE_ACI_FW_LOG_ID_MAX; j++) { + struct ixgbe_fwlog_module_entry *cached = + &hw->fwlog_cfg.module_entries[j]; + + if (cached->module_id == updated->module_id) { + cached->log_level = updated->log_level; + break; + } + } + } +} + +/** + * ixgbe_fwlog_update_modules - Update the log level 1 or more + * FW logging modules + * @hw: pointer to the HW structure + * @entries: array of ixgbe_fwlog_module_entry(s) + * @num_entries: number of entries + * + * Update the log level of 1 or more FW logging modules via module ID. + * + * Only the entries passed in will be affected. All other firmware logging + * settings will be unaffected. + * + * Return: the exit code of the operation. + */ +s32 ixgbe_fwlog_update_modules(struct ixgbe_hw *hw, + struct ixgbe_fwlog_module_entry *entries, + u16 num_entries) +{ + struct ixgbe_fwlog_cfg cfg; + s32 status; + + if (!ixgbe_fwlog_supported(hw)) + return IXGBE_ERR_NOT_SUPPORTED; + + if (num_entries > IXGBE_ACI_FW_LOG_ID_MAX) + return IXGBE_ERR_PARAM; + + if (!ixgbe_fwlog_valid_module_entries(hw, entries, num_entries)) + return IXGBE_ERR_PARAM; + + status = ixgbe_fwlog_get(hw, &cfg); + if (status) + goto status_out; + + status = ixgbe_aci_fwlog_set(hw, entries, num_entries, cfg.options, + cfg.log_resolution); + if (!status) + ixgbe_fwlog_update_cached_entries(hw, entries, num_entries); + +status_out: + return status; +} + +/** + * ixgbe_aci_fwlog_register - Register PF for firmware logging events. + * @hw: pointer to the HW structure + * @reg: true to register and false to unregister + * + * Register a PF for firmware logging events using ACI command (0xFF31). + * + * Return: the exit code of the operation. + */ +static s32 ixgbe_aci_fwlog_register(struct ixgbe_hw *hw, bool reg) +{ + struct ixgbe_aci_desc desc; + + ixgbe_fill_dflt_direct_cmd_desc(&desc, ixgbe_aci_opc_fw_logs_register); + + if (reg) + desc.params.fw_log.cmd_flags = IXGBE_ACI_FW_LOG_AQ_REGISTER; + + return ixgbe_aci_send_cmd(hw, &desc, NULL, 0); +} + +/** + * ixgbe_fwlog_register - Register the PF for firmware logging + * @hw: pointer to the HW structure + * + * After this call the PF will start to receive firmware logging based on the + * configuration set in ixgbe_fwlog_set. + * + * Return: the exit code of the operation. + */ +s32 ixgbe_fwlog_register(struct ixgbe_hw *hw) +{ + s32 status; + + if (!ixgbe_fwlog_supported(hw)) + return IXGBE_ERR_NOT_SUPPORTED; + + status = ixgbe_aci_fwlog_register(hw, true); + + if (!status) + hw->fwlog_cfg.options |= IXGBE_FWLOG_OPTION_IS_REGISTERED; + + return status; +} + +/** + * ixgbe_fwlog_unregister - Unregister the PF from firmware logging + * @hw: pointer to the HW structure + * + * Make an attempt to unregister the PF from firmware logging. + * + * Return: the exit code of the operation. + */ +s32 ixgbe_fwlog_unregister(struct ixgbe_hw *hw) +{ + s32 status; + + if (!ixgbe_fwlog_supported(hw)) + return IXGBE_ERR_NOT_SUPPORTED; + + status = ixgbe_aci_fwlog_register(hw, false); + if (!status) + hw->fwlog_cfg.options &= ~IXGBE_FWLOG_OPTION_IS_REGISTERED; + + return status; +} + +/** + * ixgbe_aci_fwlog_get - Get the current firmware logging configuration + * @hw: pointer to the HW structure + * @cfg: firmware logging configuration to populate + * + * Make an attempt to get the current firmware logging + * configuration using ACI command (0xFF32). + * + * Return: the exit code of the operation. + */ +static s32 ixgbe_aci_fwlog_get(struct ixgbe_hw *hw, struct ixgbe_fwlog_cfg *cfg) +{ + struct ixgbe_aci_cmd_fw_log_cfg_resp *fw_modules; + struct ixgbe_aci_cmd_fw_log *cmd; + struct ixgbe_aci_desc desc; + u16 i, module_id_cnt; + u8 *buf = NULL; + s32 status; + + memset(cfg, 0, sizeof(*cfg)); + + ixgbe_fill_dflt_direct_cmd_desc(&desc, ixgbe_aci_opc_fw_logs_query); + cmd = &desc.params.fw_log; + + cmd->cmd_flags = IXGBE_ACI_FW_LOG_AQ_QUERY; + + buf = (u8*)ixgbe_malloc(hw, IXGBE_ACI_MAX_BUFFER_SIZE); + if (!buf) + return IXGBE_ERR_OUT_OF_MEM; + + status = ixgbe_aci_send_cmd(hw, &desc, buf, IXGBE_ACI_MAX_BUFFER_SIZE); + if (status) { + goto status_out; + } + + module_id_cnt = IXGBE_LE16_TO_CPU(cmd->ops.cfg.mdl_cnt); + if (module_id_cnt >= IXGBE_ACI_FW_LOG_ID_MAX) { + module_id_cnt = IXGBE_ACI_FW_LOG_ID_MAX; + } + + cfg->log_resolution = (u8)IXGBE_LE16_TO_CPU(cmd->ops.cfg.log_resolution); + if (cmd->cmd_flags & IXGBE_ACI_FW_LOG_CONF_AQ_EN) + cfg->options |= IXGBE_FWLOG_OPTION_ARQ_ENA; + if (cmd->cmd_flags & IXGBE_ACI_FW_LOG_CONF_UART_EN) + cfg->options |= IXGBE_FWLOG_OPTION_UART_ENA; + if (cmd->cmd_flags & IXGBE_ACI_FW_LOG_QUERY_REGISTERED) + cfg->options |= IXGBE_FWLOG_OPTION_IS_REGISTERED; + + fw_modules = (struct ixgbe_aci_cmd_fw_log_cfg_resp *)buf; + + for (i = 0; i < module_id_cnt; i++) { + struct ixgbe_aci_cmd_fw_log_cfg_resp *fw_module = &fw_modules[i]; + + cfg->module_entries[i].module_id = + IXGBE_LE16_TO_CPU(fw_module->module_identifier); + cfg->module_entries[i].log_level = fw_module->log_level; + } + +status_out: + if (buf) + ixgbe_free(hw, buf); + return status; +} + +/** + * ixgbe_fwlog_set_support_ena - Set if FW logging is supported by FW + * @hw: pointer to the HW struct + * + * If FW returns success to the ixgbe_aci_fwlog_get call then it supports FW + * logging, else it doesn't. Set the fwlog_support_ena flag accordingly. + * + * This function is only meant to be called during driver init to determine if + * the FW support FW logging. + * + * Return: the exit code of the operation. + */ +void ixgbe_fwlog_set_support_ena(struct ixgbe_hw *hw) +{ + struct ixgbe_fwlog_cfg cfg; + s32 status; + + hw->fwlog_support_ena = false; + + /* don't call ixgbe_fwlog_get() because that would overwrite the cached + * configuration from the call to ixgbe_fwlog_init(), which is expected + * to be called prior to this function + */ + status = ixgbe_aci_fwlog_get(hw, &cfg); + if (!status) + hw->fwlog_support_ena = true; +} + +/** + * ixgbe_fwlog_get - Get the firmware logging settings + * @hw: pointer to the HW structure + * @cfg: config to populate based on current firmware logging settings + * + * Get the current firmware logging settings. + * + * Return: the exit code of the operation. + */ +s32 ixgbe_fwlog_get(struct ixgbe_hw *hw, struct ixgbe_fwlog_cfg *cfg) +{ + s32 status; + + if (!ixgbe_fwlog_supported(hw)) + return IXGBE_ERR_NOT_SUPPORTED; + + if (!cfg) + return IXGBE_ERR_PARAM; + + status = ixgbe_aci_fwlog_get(hw, cfg); + if (status) + return status; + + ixgbe_fwlog_cache_cfg(hw, cfg); + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_fwlog_event_dump - Dump the event received over the Admin Receive Queue + * @hw: pointer to the HW structure + * @desc: Admin Receive Queue descriptor + * @buf: buffer that contains the FW log event data + * + * If the driver receives the ixgbe_aci_opc_fw_logs_event on the Admin Receive + * Queue, then it should call this function to dump the FW log data. + */ +void ixgbe_fwlog_event_dump(struct ixgbe_hw *hw, + struct ixgbe_aci_desc *desc, void *buf) +{ + if (!ixgbe_fwlog_supported(hw)) + return; + + ixgbe_info_fwlog(hw, 32, 1, (u8 *)buf, + IXGBE_LE16_TO_CPU(desc->datalen)); +} + +/** + * ixgbe_init_ops_E610 - Inits func ptrs and MAC type + * @hw: pointer to hardware structure + * + * Initialize the function pointers and assign the MAC type for E610. + * Does not touch the hardware. + * + * Return: the exit code of the operation. + */ +s32 ixgbe_init_ops_E610(struct ixgbe_hw *hw) +{ + struct ixgbe_eeprom_info *eeprom = &hw->eeprom; + struct ixgbe_mac_info *mac = &hw->mac; + struct ixgbe_phy_info *phy = &hw->phy; + s32 ret_val; + + ret_val = ixgbe_init_ops_X550(hw); + /* TODO Additional ops overrides for e610 to go here */ + + /* MAC */ + mac->ops.reset_hw = ixgbe_reset_hw_E610; + mac->ops.start_hw = ixgbe_start_hw_E610; + mac->ops.get_media_type = ixgbe_get_media_type_E610; + mac->ops.get_supported_physical_layer = + ixgbe_get_supported_physical_layer_E610; + mac->ops.get_san_mac_addr = NULL; + mac->ops.set_san_mac_addr = NULL; + mac->ops.get_wwn_prefix = NULL; + mac->ops.setup_link = ixgbe_setup_link_E610; + mac->ops.check_link = ixgbe_check_link_E610; + mac->ops.get_link_capabilities = ixgbe_get_link_capabilities_E610; + mac->ops.setup_fc = ixgbe_setup_fc_E610; + mac->ops.fc_autoneg = ixgbe_fc_autoneg_E610; + mac->ops.set_fw_drv_ver = ixgbe_set_fw_drv_ver_E610; + mac->ops.disable_rx = ixgbe_disable_rx_E610; + mac->ops.setup_eee = ixgbe_setup_eee_E610; + mac->ops.fw_recovery_mode = ixgbe_fw_recovery_mode_E610; + mac->ops.fw_rollback_mode = ixgbe_fw_rollback_mode_E610; + mac->ops.get_fw_tsam_mode = ixgbe_get_fw_tsam_mode_E610; + mac->ops.get_fw_version = ixgbe_aci_get_fw_ver; + mac->ops.get_nvm_version = ixgbe_get_active_nvm_ver; + mac->ops.get_thermal_sensor_data = NULL; + mac->ops.init_thermal_sensor_thresh = NULL; + + /* PHY */ + phy->ops.init = ixgbe_init_phy_ops_E610; + phy->ops.identify = ixgbe_identify_phy_E610; + + if (hw->device_id == IXGBE_DEV_ID_E610_2_5G_T) + phy->eee_speeds_supported = IXGBE_LINK_SPEED_2_5GB_FULL; + else + phy->eee_speeds_supported = IXGBE_LINK_SPEED_2_5GB_FULL | + IXGBE_LINK_SPEED_5GB_FULL | + IXGBE_LINK_SPEED_10GB_FULL; + + phy->eee_speeds_advertised = phy->eee_speeds_supported; + + /* Additional ops overrides for e610 to go here */ + eeprom->ops.init_params = ixgbe_init_eeprom_params_E610; + eeprom->ops.read = ixgbe_read_ee_aci_E610; + eeprom->ops.read_buffer = ixgbe_read_ee_aci_buffer_E610; + eeprom->ops.write = NULL; + eeprom->ops.write_buffer = NULL; + eeprom->ops.calc_checksum = ixgbe_calc_eeprom_checksum_E610; + eeprom->ops.update_checksum = ixgbe_update_eeprom_checksum_E610; + eeprom->ops.validate_checksum = ixgbe_validate_eeprom_checksum_E610; + eeprom->ops.read_pba_string = ixgbe_read_pba_string_E610; + + /* Initialize bus function number */ + hw->mac.ops.set_lan_id(hw); + + return ret_val; +} + +/** + * ixgbe_reset_hw_E610 - Perform hardware reset + * @hw: pointer to hardware structure + * + * Resets the hardware by resetting the transmit and receive units, masks + * and clears all interrupts, and perform a reset. + * + * Return: the exit code of the operation. + */ +s32 ixgbe_reset_hw_E610(struct ixgbe_hw *hw) +{ + u32 swfw_mask = hw->phy.phy_semaphore_mask; + u32 ctrl, i; + s32 status; + + DEBUGFUNC("ixgbe_reset_hw_E610"); + + /* Call adapter stop to disable tx/rx and clear interrupts */ + status = hw->mac.ops.stop_adapter(hw); + if (status != IXGBE_SUCCESS) + goto reset_hw_out; + + /* flush pending Tx transactions */ + ixgbe_clear_tx_pending(hw); + + status = hw->phy.ops.init(hw); + if (status != IXGBE_SUCCESS) + hw_dbg(hw, "Failed to initialize PHY ops, STATUS = %d\n", + status); +mac_reset_top: + status = hw->mac.ops.acquire_swfw_sync(hw, swfw_mask); + if (status != IXGBE_SUCCESS) { + ERROR_REPORT2(IXGBE_ERROR_CAUTION, + "semaphore failed with %d", status); + return IXGBE_ERR_SWFW_SYNC; + } + ctrl = IXGBE_CTRL_RST; + ctrl |= IXGBE_READ_REG(hw, IXGBE_CTRL); + IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl); + IXGBE_WRITE_FLUSH(hw); + hw->mac.ops.release_swfw_sync(hw, swfw_mask); + + /* Poll for reset bit to self-clear indicating reset is complete */ + for (i = 0; i < 10; i++) { + usec_delay(1); + ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL); + if (!(ctrl & IXGBE_CTRL_RST_MASK)) + break; + } + + if (ctrl & IXGBE_CTRL_RST_MASK) { + status = IXGBE_ERR_RESET_FAILED; + ERROR_REPORT1(IXGBE_ERROR_POLLING, + "Reset polling failed to complete.\n"); + } + msec_delay(100); + + /* + * Double resets are required for recovery from certain error + * conditions. Between resets, it is necessary to stall to allow time + * for any pending HW events to complete. + */ + if (hw->mac.flags & IXGBE_FLAGS_DOUBLE_RESET_REQUIRED) { + hw->mac.flags &= ~IXGBE_FLAGS_DOUBLE_RESET_REQUIRED; + goto mac_reset_top; + } + + /* Set the Rx packet buffer size. */ + IXGBE_WRITE_REG(hw, IXGBE_RXPBSIZE(0), 384 << IXGBE_RXPBSIZE_SHIFT); + + /* Store the permanent mac address */ + hw->mac.ops.get_mac_addr(hw, hw->mac.perm_addr); + + /* + * Store MAC address from RAR0, clear receive address registers, and + * clear the multicast table. Also reset num_rar_entries to 128, + * since we modify this value when programming the SAN MAC address. + */ + hw->mac.num_rar_entries = 128; + hw->mac.ops.init_rx_addrs(hw); + +reset_hw_out: + return status; +} +/** + * ixgbe_start_hw_E610 - Prepare hardware for Tx/Rx + * @hw: pointer to hardware structure + * + * Gets firmware version and if API version matches it + * starts the hardware using the generic start_hw function + * and the generation start_hw function. + * Then performs revision-specific operations, if any. + **/ +s32 ixgbe_start_hw_E610(struct ixgbe_hw *hw) +{ + s32 ret_val = IXGBE_SUCCESS; + + ret_val = hw->mac.ops.get_fw_version(hw); + if (ret_val) + goto out; + + ret_val = ixgbe_start_hw_generic(hw); + if (ret_val != IXGBE_SUCCESS) + goto out; + + ixgbe_start_hw_gen2(hw); + +out: + return ret_val; +} + +/** + * ixgbe_get_media_type_E610 - Gets media type + * @hw: pointer to the HW struct + * + * In order to get the media type, the function gets PHY + * capabilities and later on use them to identify the PHY type + * checking phy_type_high and phy_type_low. + * + * Return: the type of media in form of ixgbe_media_type enum + * or ixgbe_media_type_unknown in case of an error. + */ +enum ixgbe_media_type ixgbe_get_media_type_E610(struct ixgbe_hw *hw) +{ + struct ixgbe_aci_cmd_get_phy_caps_data pcaps; + u64 phy_mask = 0; + s32 rc; + u8 i; + + rc = ixgbe_update_link_info(hw); + if (rc) { + return ixgbe_media_type_unknown; + } + + /* If there is no link but PHY (dongle) is available SW should use + * Get PHY Caps admin command instead of Get Link Status, find most + * significant bit that is set in PHY types reported by the command + * and use it to discover media type. + */ + if (!(hw->link.link_info.link_info & IXGBE_ACI_LINK_UP) && + (hw->link.link_info.link_info & IXGBE_ACI_MEDIA_AVAILABLE)) { + /* Get PHY Capabilities */ + rc = ixgbe_aci_get_phy_caps(hw, false, + IXGBE_ACI_REPORT_TOPO_CAP_MEDIA, + &pcaps); + if (rc) { + return ixgbe_media_type_unknown; + } + + /* Check if there is some bit set in phy_type_high */ + for (i = 64; i > 0; i--) { + phy_mask = (u64)((u64)1 << (i - 1)); + if ((pcaps.phy_type_high & phy_mask) != 0) { + /* If any bit is set treat it as PHY type */ + hw->link.link_info.phy_type_high = phy_mask; + hw->link.link_info.phy_type_low = 0; + break; + } + phy_mask = 0; + } + + /* If nothing found in phy_type_high search in phy_type_low */ + if (phy_mask == 0) { + for (i = 64; i > 0; i--) { + phy_mask = (u64)((u64)1 << (i - 1)); + if ((pcaps.phy_type_low & phy_mask) != 0) { + /* If any bit is set treat it as PHY type */ + hw->link.link_info.phy_type_high = 0; + hw->link.link_info.phy_type_low = phy_mask; + break; + } + } + } + + } + + /* Based on link status or search above try to discover media type */ + hw->phy.media_type = ixgbe_get_media_type_from_phy_type(hw); + + return hw->phy.media_type; +} + +/** + * ixgbe_get_supported_physical_layer_E610 - Returns physical layer type + * @hw: pointer to hardware structure + * + * Determines physical layer capabilities of the current configuration. + * + * Return: the exit code of the operation. + **/ +u64 ixgbe_get_supported_physical_layer_E610(struct ixgbe_hw *hw) +{ + u64 physical_layer = IXGBE_PHYSICAL_LAYER_UNKNOWN; + struct ixgbe_aci_cmd_get_phy_caps_data pcaps; + u64 phy_type; + s32 rc; + + rc = ixgbe_aci_get_phy_caps(hw, false, IXGBE_ACI_REPORT_TOPO_CAP_MEDIA, + &pcaps); + if (rc) + return IXGBE_PHYSICAL_LAYER_UNKNOWN; + + phy_type = IXGBE_LE64_TO_CPU(pcaps.phy_type_low); + if(phy_type & IXGBE_PHY_TYPE_LOW_10GBASE_T) + physical_layer |= IXGBE_PHYSICAL_LAYER_10GBASE_T; + if(phy_type & IXGBE_PHY_TYPE_LOW_1000BASE_T) + physical_layer |= IXGBE_PHYSICAL_LAYER_1000BASE_T; + if(phy_type & IXGBE_PHY_TYPE_LOW_100BASE_TX) + physical_layer |= IXGBE_PHYSICAL_LAYER_100BASE_TX; + if(phy_type & IXGBE_PHY_TYPE_LOW_10GBASE_LR) + physical_layer |= IXGBE_PHYSICAL_LAYER_10GBASE_LR; + if(phy_type & IXGBE_PHY_TYPE_LOW_10GBASE_SR) + physical_layer |= IXGBE_PHYSICAL_LAYER_10GBASE_SR; + if(phy_type & IXGBE_PHY_TYPE_LOW_1000BASE_KX) + physical_layer |= IXGBE_PHYSICAL_LAYER_1000BASE_KX; + if(phy_type & IXGBE_PHY_TYPE_LOW_10GBASE_KR_CR1) + physical_layer |= IXGBE_PHYSICAL_LAYER_10GBASE_KR; + if(phy_type & IXGBE_PHY_TYPE_LOW_1000BASE_SX) + physical_layer |= IXGBE_PHYSICAL_LAYER_1000BASE_SX; + if(phy_type & IXGBE_PHY_TYPE_LOW_2500BASE_KX) + physical_layer |= IXGBE_PHYSICAL_LAYER_2500BASE_KX; + if(phy_type & IXGBE_PHY_TYPE_LOW_2500BASE_T) + physical_layer |= IXGBE_PHYSICAL_LAYER_2500BASE_T; + if(phy_type & IXGBE_PHY_TYPE_LOW_5GBASE_T) + physical_layer |= IXGBE_PHYSICAL_LAYER_5000BASE_T; + + phy_type = IXGBE_LE64_TO_CPU(pcaps.phy_type_high); + if(phy_type & IXGBE_PHY_TYPE_HIGH_10BASE_T) + physical_layer |= IXGBE_PHYSICAL_LAYER_10BASE_T; + + return physical_layer; +} + +/** + * ixgbe_setup_link_E610 - Set up link + * @hw: pointer to hardware structure + * @speed: new link speed + * @autoneg_wait: true when waiting for completion is needed + * + * Set up the link with the specified speed. + * + * Return: the exit code of the operation. + */ +s32 ixgbe_setup_link_E610(struct ixgbe_hw *hw, ixgbe_link_speed speed, + bool autoneg_wait) +{ + + /* Simply request FW to perform proper PHY setup */ + return hw->phy.ops.setup_link_speed(hw, speed, autoneg_wait); +} + +/** + * ixgbe_check_link_E610 - Determine link and speed status + * @hw: pointer to hardware structure + * @speed: pointer to link speed + * @link_up: true when link is up + * @link_up_wait_to_complete: bool used to wait for link up or not + * + * Determine if the link is up and the current link speed + * using ACI command (0x0607). + * + * Return: the exit code of the operation. + */ +s32 ixgbe_check_link_E610(struct ixgbe_hw *hw, ixgbe_link_speed *speed, + bool *link_up, bool link_up_wait_to_complete) +{ + s32 rc; + u32 i; + + if (!speed || !link_up) + return IXGBE_ERR_PARAM; + + /* Set get_link_info flag to ensure that fresh + * link information will be obtained from FW + * by sending Get Link Status admin command. */ + hw->link.get_link_info = true; + + /* Update link information in adapter context. */ + rc = ixgbe_get_link_status(hw, link_up); + if (rc) + return rc; + + /* Wait for link up if it was requested. */ + if (link_up_wait_to_complete && *link_up == false) { + for (i = 0; i < hw->mac.max_link_up_time; i++) { + msec_delay(100); + hw->link.get_link_info = true; + rc = ixgbe_get_link_status(hw, link_up); + if (rc) + return rc; + if (*link_up) + break; + } + } + + /* Use link information in adapter context updated by the call + * to ixgbe_get_link_status() to determine current link speed. + * Link speed information is valid only when link up was + * reported by FW. */ + if (*link_up) { + switch (hw->link.link_info.link_speed) { + case IXGBE_ACI_LINK_SPEED_10MB: + *speed = IXGBE_LINK_SPEED_10_FULL; + break; + case IXGBE_ACI_LINK_SPEED_100MB: + *speed = IXGBE_LINK_SPEED_100_FULL; + break; + case IXGBE_ACI_LINK_SPEED_1000MB: + *speed = IXGBE_LINK_SPEED_1GB_FULL; + break; + case IXGBE_ACI_LINK_SPEED_2500MB: + *speed = IXGBE_LINK_SPEED_2_5GB_FULL; + break; + case IXGBE_ACI_LINK_SPEED_5GB: + *speed = IXGBE_LINK_SPEED_5GB_FULL; + break; + case IXGBE_ACI_LINK_SPEED_10GB: + *speed = IXGBE_LINK_SPEED_10GB_FULL; + break; + default: + *speed = IXGBE_LINK_SPEED_UNKNOWN; + break; + } + } else { + *speed = IXGBE_LINK_SPEED_UNKNOWN; + } + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_get_link_capabilities_E610 - Determine link capabilities + * @hw: pointer to hardware structure + * @speed: pointer to link speed + * @autoneg: true when autoneg or autotry is enabled + * + * Determine speed and AN parameters of a link. + * + * Return: the exit code of the operation. + */ +s32 ixgbe_get_link_capabilities_E610(struct ixgbe_hw *hw, + ixgbe_link_speed *speed, + bool *autoneg) +{ + + if (!speed || !autoneg) + return IXGBE_ERR_PARAM; + + *autoneg = true; + *speed = hw->phy.speeds_supported; + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_cfg_phy_fc - Configure PHY Flow Control (FC) data based on FC mode + * @hw: pointer to hardware structure + * @cfg: PHY configuration data to set FC mode + * @req_mode: FC mode to configure + * + * Configures PHY Flow Control according to the provided configuration. + * + * Return: the exit code of the operation. + */ +s32 ixgbe_cfg_phy_fc(struct ixgbe_hw *hw, + struct ixgbe_aci_cmd_set_phy_cfg_data *cfg, + enum ixgbe_fc_mode req_mode) +{ + struct ixgbe_aci_cmd_get_phy_caps_data* pcaps = NULL; + s32 status = IXGBE_SUCCESS; + u8 pause_mask = 0x0; + + if (!cfg) + return IXGBE_ERR_PARAM; + + switch (req_mode) { + case ixgbe_fc_full: + pause_mask |= IXGBE_ACI_PHY_EN_TX_LINK_PAUSE; + pause_mask |= IXGBE_ACI_PHY_EN_RX_LINK_PAUSE; + break; + case ixgbe_fc_rx_pause: + pause_mask |= IXGBE_ACI_PHY_EN_RX_LINK_PAUSE; + break; + case ixgbe_fc_tx_pause: + pause_mask |= IXGBE_ACI_PHY_EN_TX_LINK_PAUSE; + break; + default: + break; + } + + /* clear the old pause settings */ + cfg->caps &= ~(IXGBE_ACI_PHY_EN_TX_LINK_PAUSE | + IXGBE_ACI_PHY_EN_RX_LINK_PAUSE); + + /* set the new capabilities */ + cfg->caps |= pause_mask; + + if (pcaps) + ixgbe_free(hw, pcaps); + return status; +} + +/** + * ixgbe_setup_fc_E610 - Set up flow control + * @hw: pointer to hardware structure + * + * Set up flow control. This has to be done during init time. + * + * Return: the exit code of the operation. + */ +s32 ixgbe_setup_fc_E610(struct ixgbe_hw *hw) +{ + struct ixgbe_aci_cmd_get_phy_caps_data pcaps = { 0 }; + struct ixgbe_aci_cmd_set_phy_cfg_data cfg = { 0 }; + s32 status; + + /* Get the current PHY config */ + status = ixgbe_aci_get_phy_caps(hw, false, + IXGBE_ACI_REPORT_ACTIVE_CFG, &pcaps); + if (status) + return status; + + ixgbe_copy_phy_caps_to_cfg(&pcaps, &cfg); + + /* Configure the set PHY data */ + status = ixgbe_cfg_phy_fc(hw, &cfg, hw->fc.requested_mode); + if (status) + return status; + + /* If the capabilities have changed, then set the new config */ + if (cfg.caps != pcaps.caps) { + cfg.caps |= IXGBE_ACI_PHY_ENA_AUTO_LINK_UPDT; + + status = ixgbe_aci_set_phy_cfg(hw, &cfg); + if (status) + return status; + } + + return status; +} + +/** + * ixgbe_fc_autoneg_E610 - Configure flow control + * @hw: pointer to hardware structure + * + * Configure Flow Control. + */ +void ixgbe_fc_autoneg_E610(struct ixgbe_hw *hw) +{ + s32 status; + + /* Get current link status. + * Current FC mode will be stored in the hw context. */ + status = ixgbe_aci_get_link_info(hw, false, NULL); + if (status) { + goto out; + } + + /* Check if the link is up */ + if (!(hw->link.link_info.link_info & IXGBE_ACI_LINK_UP)) { + status = IXGBE_ERR_FC_NOT_NEGOTIATED; + goto out; + } + + /* Check if auto-negotiation has completed */ + if (!(hw->link.link_info.an_info & IXGBE_ACI_AN_COMPLETED)) { + status = IXGBE_ERR_FC_NOT_NEGOTIATED; + goto out; + } + +out: + if (status == IXGBE_SUCCESS) { + hw->fc.fc_was_autonegged = true; + } else { + hw->fc.fc_was_autonegged = false; + hw->fc.current_mode = hw->fc.requested_mode; + } +} + +/** + * ixgbe_set_fw_drv_ver_E610 - Send driver version to FW + * @hw: pointer to the HW structure + * @maj: driver version major number + * @minor: driver version minor number + * @build: driver version build number + * @sub: driver version sub build number + * @len: length of driver_ver string + * @driver_ver: driver string + * + * Send driver version number to Firmware using ACI command (0x0002). + * + * Return: the exit code of the operation. + * IXGBE_SUCCESS - OK + * IXGBE_ERR_PARAM - incorrect parameters were given + * IXGBE_ERR_ACI_ERROR - encountered an error during sending the command + * IXGBE_ERR_ACI_TIMEOUT - a timeout occurred + * IXGBE_ERR_OUT_OF_MEM - ran out of memory + */ +s32 ixgbe_set_fw_drv_ver_E610(struct ixgbe_hw *hw, u8 maj, u8 minor, u8 build, + u8 sub, u16 len, const char *driver_ver) +{ + size_t limited_len = min(len, (u16)IXGBE_DRV_VER_STR_LEN_E610); + struct ixgbe_driver_ver dv; + + DEBUGFUNC("ixgbe_set_fw_drv_ver_E610"); + + if (!len || !driver_ver) + return IXGBE_ERR_PARAM; + + dv.major_ver = maj; + dv.minor_ver = minor; + dv.build_ver = build; + dv.subbuild_ver = sub; + + memset(dv.driver_string, 0, IXGBE_DRV_VER_STR_LEN_E610); + memcpy(dv.driver_string, driver_ver, limited_len); + + return ixgbe_aci_send_driver_ver(hw, &dv); +} + +/** + * ixgbe_disable_rx_E610 - Disable RX unit + * @hw: pointer to hardware structure + * + * Disable RX DMA unit on E610 with use of ACI command (0x000C). + * + * Return: the exit code of the operation. + */ +void ixgbe_disable_rx_E610(struct ixgbe_hw *hw) +{ + u32 rxctrl; + + DEBUGFUNC("ixgbe_disable_rx_E610"); + + rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL); + if (rxctrl & IXGBE_RXCTRL_RXEN) { + u32 pfdtxgswc; + s32 status; + + pfdtxgswc = IXGBE_READ_REG(hw, IXGBE_PFDTXGSWC); + if (pfdtxgswc & IXGBE_PFDTXGSWC_VT_LBEN) { + pfdtxgswc &= ~IXGBE_PFDTXGSWC_VT_LBEN; + IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, pfdtxgswc); + hw->mac.set_lben = true; + } else { + hw->mac.set_lben = false; + } + + status = ixgbe_aci_disable_rxen(hw); + + /* If we fail - disable RX using register write */ + if (status) { + rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL); + if (rxctrl & IXGBE_RXCTRL_RXEN) { + rxctrl &= ~IXGBE_RXCTRL_RXEN; + IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl); + } + } + } +} + +/** + * ixgbe_setup_eee_E610 - Enable/disable EEE support + * @hw: pointer to the HW structure + * @enable_eee: boolean flag to enable EEE + * + * Enables/disable EEE based on enable_eee flag. + * + * Return: the exit code of the operation. + */ +s32 ixgbe_setup_eee_E610(struct ixgbe_hw *hw, bool enable_eee) +{ + struct ixgbe_aci_cmd_get_phy_caps_data phy_caps = { 0 }; + struct ixgbe_aci_cmd_set_phy_cfg_data phy_cfg = { 0 }; + u16 eee_cap = 0; + s32 status; + + status = ixgbe_aci_get_phy_caps(hw, false, + IXGBE_ACI_REPORT_ACTIVE_CFG, &phy_caps); + if (status != IXGBE_SUCCESS) + return status; + + ixgbe_copy_phy_caps_to_cfg(&phy_caps, &phy_cfg); + + phy_cfg.caps |= IXGBE_ACI_PHY_ENA_LINK; + phy_cfg.caps |= IXGBE_ACI_PHY_ENA_AUTO_LINK_UPDT; + + /* setup only speeds which are defined for [0x0601/0x0600].eee_cap */ + if (enable_eee) { + if (hw->phy.eee_speeds_advertised & IXGBE_LINK_SPEED_100_FULL) + eee_cap |= IXGBE_ACI_PHY_EEE_EN_100BASE_TX; + if (hw->phy.eee_speeds_advertised & IXGBE_LINK_SPEED_1GB_FULL) + eee_cap |= IXGBE_ACI_PHY_EEE_EN_1000BASE_T; + if (hw->phy.eee_speeds_advertised & IXGBE_LINK_SPEED_2_5GB_FULL) + eee_cap |= IXGBE_ACI_PHY_EEE_EN_2_5GBASE_T; + if (hw->phy.eee_speeds_advertised & IXGBE_LINK_SPEED_5GB_FULL) + eee_cap |= IXGBE_ACI_PHY_EEE_EN_5GBASE_T; + if (hw->phy.eee_speeds_advertised & IXGBE_LINK_SPEED_10GB_FULL) + eee_cap |= IXGBE_ACI_PHY_EEE_EN_10GBASE_T; + } + + phy_cfg.eee_cap = IXGBE_CPU_TO_LE16(eee_cap); + + status = ixgbe_aci_set_phy_cfg(hw, &phy_cfg); + + return status; +} + +/** + * ixgbe_fw_recovery_mode_E610 - Check FW NVM recovery mode + * @hw: pointer to hardware structure + * + * Checks FW NVM recovery mode by + * reading the value of the dedicated register. + * + * Return: true if FW is in recovery mode, otherwise false. + */ +bool ixgbe_fw_recovery_mode_E610(struct ixgbe_hw *hw) +{ + u32 fwsm = IXGBE_READ_REG(hw, GL_MNG_FWSM); + + return !!(fwsm & GL_MNG_FWSM_FW_MODES_RECOVERY_M); +} + +/** + * ixgbe_fw_rollback_mode_E610 - Check FW NVM Rollback + * @hw: pointer to hardware structure + * + * Checks FW NVM Rollback mode by reading the + * value of the dedicated register. + * + * Return: true if FW is in Rollback mode, otherwise false. + */ +bool ixgbe_fw_rollback_mode_E610(struct ixgbe_hw *hw) +{ + u32 fwsm = IXGBE_READ_REG(hw, GL_MNG_FWSM); + + return !!(fwsm & GL_MNG_FWSM_FW_MODES_ROLLBACK_M); +} + +/** + * ixgbe_get_fw_tsam_mode_E610 - Check FW NVM Thermal Sensor Autonomous Mode + * @hw: pointer to hardware structure + * + * Checks Thermal Sensor Autonomous Mode by reading the + * value of the dedicated register. + * + * Return: true if FW is in TSAM, otherwise false. + */ +bool ixgbe_get_fw_tsam_mode_E610(struct ixgbe_hw *hw) +{ + u32 fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM_X550EM_a); + + return !!(fwsm & IXGBE_FWSM_TS_ENABLED); +} + +/** + * ixgbe_init_phy_ops_E610 - PHY specific init + * @hw: pointer to hardware structure + * + * Initialize any function pointers that were not able to be + * set during init_shared_code because the PHY type was not known. + * + * Return: the exit code of the operation. + */ +s32 ixgbe_init_phy_ops_E610(struct ixgbe_hw *hw) +{ + struct ixgbe_mac_info *mac = &hw->mac; + struct ixgbe_phy_info *phy = &hw->phy; + s32 ret_val; + + phy->ops.identify_sfp = ixgbe_identify_module_E610; + phy->ops.read_reg = NULL; /* PHY reg access is not required */ + phy->ops.write_reg = NULL; + phy->ops.read_reg_mdi = NULL; + phy->ops.write_reg_mdi = NULL; + phy->ops.setup_link = ixgbe_setup_phy_link_E610; + phy->ops.get_firmware_version = ixgbe_get_phy_firmware_version_E610; + phy->ops.read_i2c_byte = NULL; /* disabled for E610 */ + phy->ops.write_i2c_byte = NULL; /* disabled for E610 */ + phy->ops.read_i2c_sff8472 = ixgbe_read_i2c_sff8472_E610; + phy->ops.read_i2c_eeprom = ixgbe_read_i2c_eeprom_E610; + phy->ops.write_i2c_eeprom = ixgbe_write_i2c_eeprom_E610; + phy->ops.i2c_bus_clear = NULL; /* do not use generic implementation */ + phy->ops.check_overtemp = ixgbe_check_overtemp_E610; + if (mac->ops.get_media_type(hw) == ixgbe_media_type_copper) + phy->ops.set_phy_power = ixgbe_set_phy_power_E610; + else + phy->ops.set_phy_power = NULL; + phy->ops.enter_lplu = ixgbe_enter_lplu_E610; + phy->ops.handle_lasi = NULL; /* no implementation for E610 */ + phy->ops.read_i2c_byte_unlocked = NULL; /* disabled for E610 */ + phy->ops.write_i2c_byte_unlocked = NULL; /* disabled for E610 */ + + /* TODO: Set functions pointers based on device ID */ + + /* Identify the PHY */ + ret_val = phy->ops.identify(hw); + if (ret_val != IXGBE_SUCCESS) + return ret_val; + + /* TODO: Set functions pointers based on PHY type */ + + return ret_val; +} + +/** + * ixgbe_identify_phy_E610 - Identify PHY + * @hw: pointer to hardware structure + * + * Determine PHY type, supported speeds and PHY ID. + * + * Return: the exit code of the operation. + */ +s32 ixgbe_identify_phy_E610(struct ixgbe_hw *hw) +{ + struct ixgbe_aci_cmd_get_phy_caps_data pcaps; + s32 rc; + + /* Set PHY type */ + hw->phy.type = ixgbe_phy_fw; + + rc = ixgbe_aci_get_phy_caps(hw, false, IXGBE_ACI_REPORT_TOPO_CAP_MEDIA, + &pcaps); + if (rc) + return rc; + + if (!(pcaps.module_compliance_enforcement & + IXGBE_ACI_MOD_ENFORCE_STRICT_MODE)) { + /* Handle lenient mode */ + rc = ixgbe_aci_get_phy_caps(hw, false, + IXGBE_ACI_REPORT_TOPO_CAP_NO_MEDIA, + &pcaps); + if (rc) + return rc; + } + + /* Determine supported speeds */ + hw->phy.speeds_supported = IXGBE_LINK_SPEED_UNKNOWN; + + if (pcaps.phy_type_high & IXGBE_PHY_TYPE_HIGH_10BASE_T || + pcaps.phy_type_high & IXGBE_PHY_TYPE_HIGH_10M_SGMII) + hw->phy.speeds_supported |= IXGBE_LINK_SPEED_10_FULL; + if (pcaps.phy_type_low & IXGBE_PHY_TYPE_LOW_100BASE_TX || + pcaps.phy_type_low & IXGBE_PHY_TYPE_LOW_100M_SGMII || + pcaps.phy_type_high & IXGBE_PHY_TYPE_HIGH_100M_USXGMII) + hw->phy.speeds_supported |= IXGBE_LINK_SPEED_100_FULL; + if (pcaps.phy_type_low & IXGBE_PHY_TYPE_LOW_1000BASE_T || + pcaps.phy_type_low & IXGBE_PHY_TYPE_LOW_1000BASE_SX || + pcaps.phy_type_low & IXGBE_PHY_TYPE_LOW_1000BASE_LX || + pcaps.phy_type_low & IXGBE_PHY_TYPE_LOW_1000BASE_KX || + pcaps.phy_type_low & IXGBE_PHY_TYPE_LOW_1G_SGMII || + pcaps.phy_type_high & IXGBE_PHY_TYPE_HIGH_1G_USXGMII) + hw->phy.speeds_supported |= IXGBE_LINK_SPEED_1GB_FULL; + if (pcaps.phy_type_low & IXGBE_PHY_TYPE_LOW_2500BASE_T || + pcaps.phy_type_low & IXGBE_PHY_TYPE_LOW_2500BASE_X || + pcaps.phy_type_low & IXGBE_PHY_TYPE_LOW_2500BASE_KX || + pcaps.phy_type_high & IXGBE_PHY_TYPE_HIGH_2500M_SGMII || + pcaps.phy_type_high & IXGBE_PHY_TYPE_HIGH_2500M_USXGMII) + hw->phy.speeds_supported |= IXGBE_LINK_SPEED_2_5GB_FULL; + if (pcaps.phy_type_low & IXGBE_PHY_TYPE_LOW_5GBASE_T || + pcaps.phy_type_low & IXGBE_PHY_TYPE_LOW_5GBASE_KR || + pcaps.phy_type_high & IXGBE_PHY_TYPE_HIGH_5G_USXGMII) + hw->phy.speeds_supported |= IXGBE_LINK_SPEED_5GB_FULL; + if (pcaps.phy_type_low & IXGBE_PHY_TYPE_LOW_10GBASE_T || + pcaps.phy_type_low & IXGBE_PHY_TYPE_LOW_10G_SFI_DA || + pcaps.phy_type_low & IXGBE_PHY_TYPE_LOW_10GBASE_SR || + pcaps.phy_type_low & IXGBE_PHY_TYPE_LOW_10GBASE_LR || + pcaps.phy_type_low & IXGBE_PHY_TYPE_LOW_10GBASE_KR_CR1 || + pcaps.phy_type_low & IXGBE_PHY_TYPE_LOW_10G_SFI_AOC_ACC || + pcaps.phy_type_low & IXGBE_PHY_TYPE_LOW_10G_SFI_C2C || + pcaps.phy_type_high & IXGBE_PHY_TYPE_HIGH_10G_USXGMII) + hw->phy.speeds_supported |= IXGBE_LINK_SPEED_10GB_FULL; + + /* Initialize autoneg speeds */ + if (!hw->phy.autoneg_advertised) + hw->phy.autoneg_advertised = hw->phy.speeds_supported; + + /* Set PHY ID */ + memcpy(&hw->phy.id, pcaps.phy_id_oui, sizeof(u32)); + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_identify_module_E610 - Identify SFP module type + * @hw: pointer to hardware structure + * + * Identify the SFP module type. + * + * Return: the exit code of the operation. + */ +s32 ixgbe_identify_module_E610(struct ixgbe_hw *hw) +{ + bool media_available; + u8 module_type; + s32 rc; + + rc = ixgbe_update_link_info(hw); + if (rc) + goto err; + + media_available = + (hw->link.link_info.link_info & + IXGBE_ACI_MEDIA_AVAILABLE) ? true : false; + + if (media_available) { + hw->phy.sfp_type = ixgbe_sfp_type_unknown; + + /* Get module type from hw context updated by ixgbe_update_link_info() */ + module_type = hw->link.link_info.module_type[IXGBE_ACI_MOD_TYPE_IDENT]; + + if ((module_type & IXGBE_ACI_MOD_TYPE_BYTE1_SFP_PLUS_CU_PASSIVE) || + (module_type & IXGBE_ACI_MOD_TYPE_BYTE1_SFP_PLUS_CU_ACTIVE)) { + hw->phy.sfp_type = ixgbe_sfp_type_da_cu; + } else if (module_type & IXGBE_ACI_MOD_TYPE_BYTE1_10G_BASE_SR) { + hw->phy.sfp_type = ixgbe_sfp_type_sr; + } else if ((module_type & IXGBE_ACI_MOD_TYPE_BYTE1_10G_BASE_LR) || + (module_type & IXGBE_ACI_MOD_TYPE_BYTE1_10G_BASE_LRM)) { + hw->phy.sfp_type = ixgbe_sfp_type_lr; + } + rc = IXGBE_SUCCESS; + } else { + hw->phy.sfp_type = ixgbe_sfp_type_not_present; + rc = IXGBE_ERR_SFP_NOT_PRESENT; + } +err: + return rc; +} + +/** + * ixgbe_setup_phy_link_E610 - Sets up firmware-controlled PHYs + * @hw: pointer to hardware structure + * + * Set the parameters for the firmware-controlled PHYs. + * + * Return: the exit code of the operation. + */ +s32 ixgbe_setup_phy_link_E610(struct ixgbe_hw *hw) +{ + struct ixgbe_aci_cmd_get_phy_caps_data pcaps; + struct ixgbe_aci_cmd_set_phy_cfg_data pcfg; + u8 rmode = IXGBE_ACI_REPORT_TOPO_CAP_MEDIA; + u64 sup_phy_type_low, sup_phy_type_high; + s32 rc; + + rc = ixgbe_aci_get_link_info(hw, false, NULL); + if (rc) { + goto err; + } + + /* If media is not available get default config */ + if (!(hw->link.link_info.link_info & IXGBE_ACI_MEDIA_AVAILABLE)) + rmode = IXGBE_ACI_REPORT_DFLT_CFG; + + rc = ixgbe_aci_get_phy_caps(hw, false, rmode, &pcaps); + if (rc) { + goto err; + } + + sup_phy_type_low = pcaps.phy_type_low; + sup_phy_type_high = pcaps.phy_type_high; + + /* Get Active configuration to avoid unintended changes */ + rc = ixgbe_aci_get_phy_caps(hw, false, IXGBE_ACI_REPORT_ACTIVE_CFG, + &pcaps); + if (rc) { + goto err; + } + ixgbe_copy_phy_caps_to_cfg(&pcaps, &pcfg); + + /* Set default PHY types for a given speed */ + pcfg.phy_type_low = 0; + pcfg.phy_type_high = 0; + + if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_10_FULL) { + pcfg.phy_type_high |= IXGBE_PHY_TYPE_HIGH_10BASE_T; + pcfg.phy_type_high |= IXGBE_PHY_TYPE_HIGH_10M_SGMII; + } + if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_100_FULL) { + pcfg.phy_type_low |= IXGBE_PHY_TYPE_LOW_100BASE_TX; + pcfg.phy_type_low |= IXGBE_PHY_TYPE_LOW_100M_SGMII; + pcfg.phy_type_high |= IXGBE_PHY_TYPE_HIGH_100M_USXGMII; + } + if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_1GB_FULL) { + pcfg.phy_type_low |= IXGBE_PHY_TYPE_LOW_1000BASE_T; + pcfg.phy_type_low |= IXGBE_PHY_TYPE_LOW_1000BASE_SX; + pcfg.phy_type_low |= IXGBE_PHY_TYPE_LOW_1000BASE_LX; + pcfg.phy_type_low |= IXGBE_PHY_TYPE_LOW_1000BASE_KX; + pcfg.phy_type_low |= IXGBE_PHY_TYPE_LOW_1G_SGMII; + pcfg.phy_type_high |= IXGBE_PHY_TYPE_HIGH_1G_USXGMII; + } + if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_2_5GB_FULL) { + pcfg.phy_type_low |= IXGBE_PHY_TYPE_LOW_2500BASE_T; + pcfg.phy_type_low |= IXGBE_PHY_TYPE_LOW_2500BASE_X; + pcfg.phy_type_low |= IXGBE_PHY_TYPE_LOW_2500BASE_KX; + pcfg.phy_type_high |= IXGBE_PHY_TYPE_HIGH_2500M_SGMII; + pcfg.phy_type_high |= IXGBE_PHY_TYPE_HIGH_2500M_USXGMII; + } + if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_5GB_FULL) { + pcfg.phy_type_low |= IXGBE_PHY_TYPE_LOW_5GBASE_T; + pcfg.phy_type_low |= IXGBE_PHY_TYPE_LOW_5GBASE_KR; + pcfg.phy_type_high |= IXGBE_PHY_TYPE_HIGH_5G_USXGMII; + } + if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_10GB_FULL) { + pcfg.phy_type_low |= IXGBE_PHY_TYPE_LOW_10GBASE_T; + pcfg.phy_type_low |= IXGBE_PHY_TYPE_LOW_10G_SFI_DA; + pcfg.phy_type_low |= IXGBE_PHY_TYPE_LOW_10GBASE_SR; + pcfg.phy_type_low |= IXGBE_PHY_TYPE_LOW_10GBASE_LR; + pcfg.phy_type_low |= IXGBE_PHY_TYPE_LOW_10GBASE_KR_CR1; + pcfg.phy_type_low |= IXGBE_PHY_TYPE_LOW_10G_SFI_AOC_ACC; + pcfg.phy_type_low |= IXGBE_PHY_TYPE_LOW_10G_SFI_C2C; + pcfg.phy_type_high |= IXGBE_PHY_TYPE_HIGH_10G_USXGMII; + } + + /* Mask the set values to avoid requesting unsupported link types */ + pcfg.phy_type_low &= sup_phy_type_low; + pcfg.phy_type_high &= sup_phy_type_high; + + if (pcfg.phy_type_high != pcaps.phy_type_high || + pcfg.phy_type_low != pcaps.phy_type_low || + pcfg.caps != pcaps.caps) { + pcfg.caps |= IXGBE_ACI_PHY_ENA_LINK; + pcfg.caps |= IXGBE_ACI_PHY_ENA_AUTO_LINK_UPDT; + + rc = ixgbe_aci_set_phy_cfg(hw, &pcfg); + } + +err: + return rc; +} + +/** + * ixgbe_get_phy_firmware_version_E610 - Gets the PHY Firmware Version + * @hw: pointer to hardware structure + * @firmware_version: pointer to the PHY Firmware Version + * + * Determines PHY FW version based on response to Get PHY Capabilities + * admin command (0x0600). + * + * Return: the exit code of the operation. + */ +s32 ixgbe_get_phy_firmware_version_E610(struct ixgbe_hw *hw, + u16 *firmware_version) +{ + struct ixgbe_aci_cmd_get_phy_caps_data pcaps; + s32 status; + + if (!firmware_version) + return IXGBE_ERR_PARAM; + + status = ixgbe_aci_get_phy_caps(hw, false, + IXGBE_ACI_REPORT_ACTIVE_CFG, + &pcaps); + if (status) + return status; + + /* TODO: determine which bytes of the 8-byte phy_fw_ver + * field should be written to the 2-byte firmware_version + * output argument. */ + memcpy(firmware_version, pcaps.phy_fw_ver, sizeof(u16)); + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_read_i2c_sff8472_E610 - Reads 8 bit word over I2C interface + * @hw: pointer to hardware structure + * @byte_offset: byte offset at address 0xA2 + * @sff8472_data: value read + * + * Performs byte read operation from SFP module's SFF-8472 data over I2C. + * + * Return: the exit code of the operation. + **/ +s32 ixgbe_read_i2c_sff8472_E610(struct ixgbe_hw *hw, u8 byte_offset, + u8 *sff8472_data) +{ + return ixgbe_aci_sff_eeprom(hw, 0, IXGBE_I2C_EEPROM_DEV_ADDR2, + byte_offset, 0, + IXGBE_ACI_SFF_NO_PAGE_BANK_UPDATE, + sff8472_data, 1, false); +} + +/** + * ixgbe_read_i2c_eeprom_E610 - Reads 8 bit EEPROM word over I2C interface + * @hw: pointer to hardware structure + * @byte_offset: EEPROM byte offset to read + * @eeprom_data: value read + * + * Performs byte read operation from SFP module's EEPROM over I2C interface. + * + * Return: the exit code of the operation. + **/ +s32 ixgbe_read_i2c_eeprom_E610(struct ixgbe_hw *hw, u8 byte_offset, + u8 *eeprom_data) +{ + return ixgbe_aci_sff_eeprom(hw, 0, IXGBE_I2C_EEPROM_DEV_ADDR, + byte_offset, 0, + IXGBE_ACI_SFF_NO_PAGE_BANK_UPDATE, + eeprom_data, 1, false); +} + +/** + * ixgbe_write_i2c_eeprom_E610 - Writes 8 bit EEPROM word over I2C interface + * @hw: pointer to hardware structure + * @byte_offset: EEPROM byte offset to write + * @eeprom_data: value to write + * + * Performs byte write operation to SFP module's EEPROM over I2C interface. + * + * Return: the exit code of the operation. + **/ +s32 ixgbe_write_i2c_eeprom_E610(struct ixgbe_hw *hw, u8 byte_offset, + u8 eeprom_data) +{ + return ixgbe_aci_sff_eeprom(hw, 0, IXGBE_I2C_EEPROM_DEV_ADDR, + byte_offset, 0, + IXGBE_ACI_SFF_NO_PAGE_BANK_UPDATE, + &eeprom_data, 1, true); +} + +/** + * ixgbe_check_overtemp_E610 - Check firmware-controlled PHYs for overtemp + * @hw: pointer to hardware structure + * + * Get the link status and check if the PHY temperature alarm detected. + * + * Return: the exit code of the operation. + */ +s32 ixgbe_check_overtemp_E610(struct ixgbe_hw *hw) +{ + struct ixgbe_aci_cmd_get_link_status_data link_data = { 0 }; + struct ixgbe_aci_cmd_get_link_status *resp; + struct ixgbe_aci_desc desc; + s32 status = IXGBE_SUCCESS; + + if (!hw) + return IXGBE_ERR_PARAM; + + ixgbe_fill_dflt_direct_cmd_desc(&desc, ixgbe_aci_opc_get_link_status); + resp = &desc.params.get_link_status; + resp->cmd_flags = IXGBE_CPU_TO_LE16(IXGBE_ACI_LSE_NOP); + + status = ixgbe_aci_send_cmd(hw, &desc, &link_data, sizeof(link_data)); + if (status != IXGBE_SUCCESS) + return status; + + if (link_data.ext_info & IXGBE_ACI_LINK_PHY_TEMP_ALARM) { + ERROR_REPORT1(IXGBE_ERROR_CAUTION, + "PHY Temperature Alarm detected"); + status = IXGBE_ERR_OVERTEMP; + } + + return status; +} + +/** + * ixgbe_set_phy_power_E610 - Control power for copper PHY + * @hw: pointer to hardware structure + * @on: true for on, false for off + * + * Set the power on/off of the PHY + * by getting its capabilities and setting the appropriate + * configuration parameters. + * + * Return: the exit code of the operation. + */ +s32 ixgbe_set_phy_power_E610(struct ixgbe_hw *hw, bool on) +{ + struct ixgbe_aci_cmd_get_phy_caps_data phy_caps = { 0 }; + struct ixgbe_aci_cmd_set_phy_cfg_data phy_cfg = { 0 }; + s32 status; + + status = ixgbe_aci_get_phy_caps(hw, false, + IXGBE_ACI_REPORT_ACTIVE_CFG, &phy_caps); + if (status != IXGBE_SUCCESS) + return status; + + ixgbe_copy_phy_caps_to_cfg(&phy_caps, &phy_cfg); + + if (on) { + phy_cfg.caps &= ~IXGBE_ACI_PHY_ENA_LOW_POWER; + } else { + phy_cfg.caps |= IXGBE_ACI_PHY_ENA_LOW_POWER; + } + + /* PHY is already in requested power mode */ + if (phy_caps.caps == phy_cfg.caps) + return IXGBE_SUCCESS; + + phy_cfg.caps |= IXGBE_ACI_PHY_ENA_LINK; + phy_cfg.caps |= IXGBE_ACI_PHY_ENA_AUTO_LINK_UPDT; + + status = ixgbe_aci_set_phy_cfg(hw, &phy_cfg); + + return status; +} + +/** + * ixgbe_enter_lplu_E610 - Transition to low power states + * @hw: pointer to hardware structure + * + * Configures Low Power Link Up on transition to low power states + * (from D0 to non-D0). Link is required to enter LPLU so avoid resetting the + * X557 PHY immediately prior to entering LPLU. + * + * Return: the exit code of the operation. + */ +s32 ixgbe_enter_lplu_E610(struct ixgbe_hw *hw) +{ + struct ixgbe_aci_cmd_get_phy_caps_data phy_caps = { 0 }; + struct ixgbe_aci_cmd_set_phy_cfg_data phy_cfg = { 0 }; + s32 status; + + status = ixgbe_aci_get_phy_caps(hw, false, + IXGBE_ACI_REPORT_ACTIVE_CFG, &phy_caps); + if (status != IXGBE_SUCCESS) + return status; + + ixgbe_copy_phy_caps_to_cfg(&phy_caps, &phy_cfg); + + phy_cfg.low_power_ctrl_an |= IXGBE_ACI_PHY_EN_D3COLD_LOW_POWER_AUTONEG; + + status = ixgbe_aci_set_phy_cfg(hw, &phy_cfg); + + return status; +} + +/** + * ixgbe_init_eeprom_params_E610 - Initialize EEPROM params + * @hw: pointer to hardware structure + * + * Initializes the EEPROM parameters ixgbe_eeprom_info within the + * ixgbe_hw struct in order to set up EEPROM access. + * + * Return: the exit code of the operation. + */ +s32 ixgbe_init_eeprom_params_E610(struct ixgbe_hw *hw) +{ + struct ixgbe_eeprom_info *eeprom = &hw->eeprom; + u32 gens_stat; + u8 sr_size; + + if (eeprom->type == ixgbe_eeprom_uninitialized) { + eeprom->type = ixgbe_flash; + + gens_stat = IXGBE_READ_REG(hw, GLNVM_GENS); + sr_size = (gens_stat & GLNVM_GENS_SR_SIZE_M) >> + GLNVM_GENS_SR_SIZE_S; + + /* Switching to words (sr_size contains power of 2) */ + eeprom->word_size = BIT(sr_size) * IXGBE_SR_WORDS_IN_1KB; + + hw_dbg(hw, "Eeprom params: type = %d, size = %d\n", + eeprom->type, eeprom->word_size); + } + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_read_ee_aci_E610 - Read EEPROM word using the admin command. + * @hw: pointer to hardware structure + * @offset: offset of word in the EEPROM to read + * @data: word read from the EEPROM + * + * Reads a 16 bit word from the EEPROM using the ACI. + * If the EEPROM params are not initialized, the function + * initialize them before proceeding with reading. + * The function acquires and then releases the NVM ownership. + * + * Return: the exit code of the operation. + */ +s32 ixgbe_read_ee_aci_E610(struct ixgbe_hw *hw, u16 offset, u16 *data) +{ + s32 status; + + if (hw->eeprom.type == ixgbe_eeprom_uninitialized) { + status = ixgbe_init_eeprom_params(hw); + if (status) + return status; + } + + status = ixgbe_acquire_nvm(hw, IXGBE_RES_READ); + if (status) + return status; + + status = ixgbe_read_sr_word_aci(hw, offset, data); + ixgbe_release_nvm(hw); + + return status; +} + +/** + * ixgbe_read_ee_aci_buffer_E610- Read EEPROM word(s) using admin commands. + * @hw: pointer to hardware structure + * @offset: offset of word in the EEPROM to read + * @words: number of words + * @data: word(s) read from the EEPROM + * + * Reads a 16 bit word(s) from the EEPROM using the ACI. + * If the EEPROM params are not initialized, the function + * initialize them before proceeding with reading. + * The function acquires and then releases the NVM ownership. + * + * Return: the exit code of the operation. + */ +s32 ixgbe_read_ee_aci_buffer_E610(struct ixgbe_hw *hw, u16 offset, + u16 words, u16 *data) +{ + s32 status; + + if (hw->eeprom.type == ixgbe_eeprom_uninitialized) { + status = ixgbe_init_eeprom_params(hw); + if (status) + return status; + } + + status = ixgbe_acquire_nvm(hw, IXGBE_RES_READ); + if (status) + return status; + + status = ixgbe_read_sr_buf_aci(hw, offset, &words, data); + ixgbe_release_nvm(hw); + + return status; +} + +/** + * ixgbe_calc_eeprom_checksum_E610 - Calculates and returns the checksum + * @hw: pointer to hardware structure + * + * Calculate SW Checksum that covers the whole 64kB shadow RAM + * except the VPD and PCIe ALT Auto-load modules. The structure and size of VPD + * is customer specific and unknown. Therefore, this function skips all maximum + * possible size of VPD (1kB). + * If the EEPROM params are not initialized, the function + * initializes them before proceeding. + * The function acquires and then releases the NVM ownership. + * + * Return: the negative error code on error, or the 16-bit checksum + */ +s32 ixgbe_calc_eeprom_checksum_E610(struct ixgbe_hw *hw) +{ + bool nvm_acquired = false; + u16 pcie_alt_module = 0; + u16 checksum_local = 0; + u16 checksum = 0; + u16 vpd_module; + void *vmem; + s32 status; + u16 *data; + u16 i; + + if (hw->eeprom.type == ixgbe_eeprom_uninitialized) { + status = ixgbe_init_eeprom_params(hw); + if (status) + return status; + } + + vmem = ixgbe_calloc(hw, IXGBE_SR_SECTOR_SIZE_IN_WORDS, sizeof(u16)); + if (!vmem) + return IXGBE_ERR_OUT_OF_MEM; + data = (u16 *)vmem; + status = ixgbe_acquire_nvm(hw, IXGBE_RES_READ); + if (status) + goto ixgbe_calc_sr_checksum_exit; + nvm_acquired = true; + + /* read pointer to VPD area */ + status = ixgbe_read_sr_word_aci(hw, E610_SR_VPD_PTR, &vpd_module); + if (status) + goto ixgbe_calc_sr_checksum_exit; + + /* read pointer to PCIe Alt Auto-load module */ + status = ixgbe_read_sr_word_aci(hw, E610_SR_PCIE_ALT_AUTO_LOAD_PTR, + &pcie_alt_module); + if (status) + goto ixgbe_calc_sr_checksum_exit; + + /* Calculate SW checksum that covers the whole 64kB shadow RAM + * except the VPD and PCIe ALT Auto-load modules + */ + for (i = 0; i < hw->eeprom.word_size; i++) { + /* Read SR page */ + if ((i % IXGBE_SR_SECTOR_SIZE_IN_WORDS) == 0) { + u16 words = IXGBE_SR_SECTOR_SIZE_IN_WORDS; + + status = ixgbe_read_sr_buf_aci(hw, i, &words, data); + if (status != IXGBE_SUCCESS) + goto ixgbe_calc_sr_checksum_exit; + } + + /* Skip Checksum word */ + if (i == E610_SR_SW_CHECKSUM_WORD) + continue; + /* Skip VPD module (convert byte size to word count) */ + if (i >= (u32)vpd_module && + i < ((u32)vpd_module + E610_SR_VPD_SIZE_WORDS)) + continue; + /* Skip PCIe ALT module (convert byte size to word count) */ + if (i >= (u32)pcie_alt_module && + i < ((u32)pcie_alt_module + E610_SR_PCIE_ALT_SIZE_WORDS)) + continue; + + checksum_local += data[i % IXGBE_SR_SECTOR_SIZE_IN_WORDS]; + } + + checksum = (u16)IXGBE_SR_SW_CHECKSUM_BASE - checksum_local; + +ixgbe_calc_sr_checksum_exit: + if(nvm_acquired) + ixgbe_release_nvm(hw); + ixgbe_free(hw, vmem); + + if(!status) + return (s32)checksum; + else + return status; +} + +/** + * ixgbe_update_eeprom_checksum_E610 - Updates the EEPROM checksum and flash + * @hw: pointer to hardware structure + * + * After writing EEPROM to Shadow RAM, software sends the admin command + * to recalculate and update EEPROM checksum and instructs the hardware + * to update the flash. + * If the EEPROM params are not initialized, the function + * initialize them before proceeding. + * The function acquires and then releases the NVM ownership. + * + * Return: the exit code of the operation. + */ +s32 ixgbe_update_eeprom_checksum_E610(struct ixgbe_hw *hw) +{ + s32 status; + + if (hw->eeprom.type == ixgbe_eeprom_uninitialized) { + status = ixgbe_init_eeprom_params(hw); + if (status) + return status; + } + + status = ixgbe_nvm_recalculate_checksum(hw); + if (status) + return status; + status = ixgbe_acquire_nvm(hw, IXGBE_RES_WRITE); + if (status) + return status; + + status = ixgbe_nvm_write_activate(hw, IXGBE_ACI_NVM_ACTIV_REQ_EMPR, + NULL); + ixgbe_release_nvm(hw); + + return status; +} + +/** + * ixgbe_validate_eeprom_checksum_E610 - Validate EEPROM checksum + * @hw: pointer to hardware structure + * @checksum_val: calculated checksum + * + * Performs checksum calculation and validates the EEPROM checksum. If the + * caller does not need checksum_val, the value can be NULL. + * If the EEPROM params are not initialized, the function + * initialize them before proceeding. + * The function acquires and then releases the NVM ownership. + * + * Return: the exit code of the operation. + */ +s32 ixgbe_validate_eeprom_checksum_E610(struct ixgbe_hw *hw, u16 *checksum_val) +{ + u32 status; + + if (hw->eeprom.type == ixgbe_eeprom_uninitialized) { + status = ixgbe_init_eeprom_params(hw); + if (status) + return status; + } + + status = ixgbe_nvm_validate_checksum(hw); + + if (status) + return status; + + if (checksum_val) { + u16 tmp_checksum; + status = ixgbe_acquire_nvm(hw, IXGBE_RES_READ); + if (status) + return status; + + status = ixgbe_read_sr_word_aci(hw, E610_SR_SW_CHECKSUM_WORD, + &tmp_checksum); + ixgbe_release_nvm(hw); + + if (!status) + *checksum_val = tmp_checksum; + } + + return status; +} + +/** + * ixgbe_get_pfa_module_tlv - Reads sub module TLV from NVM PFA + * @hw: pointer to hardware structure + * @module_tlv: pointer to module TLV to return + * @module_tlv_len: pointer to module TLV length to return + * @module_type: module type requested + * + * Finds the requested sub module TLV type from the Preserved Field + * Area (PFA) and returns the TLV pointer and length. The caller can + * use these to read the variable length TLV value. + * + * Return: the exit code of the operation. + */ +STATIC s32 ixgbe_get_pfa_module_tlv(struct ixgbe_hw *hw, u16 *module_tlv, + u16 *module_tlv_len, u16 module_type) +{ + u16 pfa_len, pfa_ptr, pfa_end_ptr; + u16 next_tlv; + s32 status; + + status = ixgbe_read_ee_aci_E610(hw, E610_SR_PFA_PTR, &pfa_ptr); + if (status != IXGBE_SUCCESS) { + return status; + } + status = ixgbe_read_ee_aci_E610(hw, pfa_ptr, &pfa_len); + if (status != IXGBE_SUCCESS) { + return status; + } + /* Starting with first TLV after PFA length, iterate through the list + * of TLVs to find the requested one. + */ + next_tlv = pfa_ptr + 1; + pfa_end_ptr = pfa_ptr + pfa_len; + while (next_tlv < pfa_end_ptr) { + u16 tlv_sub_module_type, tlv_len; + + /* Read TLV type */ + status = ixgbe_read_ee_aci_E610(hw, next_tlv, + &tlv_sub_module_type); + if (status != IXGBE_SUCCESS) { + break; + } + /* Read TLV length */ + status = ixgbe_read_ee_aci_E610(hw, next_tlv + 1, &tlv_len); + if (status != IXGBE_SUCCESS) { + break; + } + if (tlv_sub_module_type == module_type) { + if (tlv_len) { + *module_tlv = next_tlv; + *module_tlv_len = tlv_len; + return IXGBE_SUCCESS; + } + return IXGBE_ERR_INVAL_SIZE; + } + /* Check next TLV, i.e. current TLV pointer + length + 2 words + * (for current TLV's type and length) + */ + next_tlv = next_tlv + tlv_len + 2; + } + /* Module does not exist */ + return IXGBE_ERR_DOES_NOT_EXIST; +} + +/** + * ixgbe_read_pba_string_E610 - Reads part number string from NVM + * @hw: pointer to hardware structure + * @pba_num: stores the part number string from the NVM + * @pba_num_size: part number string buffer length + * + * Reads the part number string from the NVM. + * + * Return: the exit code of the operation. + */ +s32 ixgbe_read_pba_string_E610(struct ixgbe_hw *hw, u8 *pba_num, + u32 pba_num_size) +{ + u16 pba_tlv, pba_tlv_len; + u16 pba_word, pba_size; + s32 status; + u16 i; + + status = ixgbe_get_pfa_module_tlv(hw, &pba_tlv, &pba_tlv_len, + E610_SR_PBA_BLOCK_PTR); + if (status != IXGBE_SUCCESS) { + return status; + } + + /* pba_size is the next word */ + status = ixgbe_read_ee_aci_E610(hw, (pba_tlv + 2), &pba_size); + if (status != IXGBE_SUCCESS) { + return status; + } + + if (pba_tlv_len < pba_size) { + return IXGBE_ERR_INVAL_SIZE; + } + + /* Subtract one to get PBA word count (PBA Size word is included in + * total size) + */ + pba_size--; + if (pba_num_size < (((u32)pba_size * 2) + 1)) { + return IXGBE_ERR_PARAM; + } + + for (i = 0; i < pba_size; i++) { + status = ixgbe_read_ee_aci_E610(hw, (pba_tlv + 2 + 1) + i, + &pba_word); + if (status != IXGBE_SUCCESS) { + return status; + } + + pba_num[(i * 2)] = (pba_word >> 8) & 0xFF; + pba_num[(i * 2) + 1] = pba_word & 0xFF; + } + pba_num[(pba_size * 2)] = '\0'; + + return status; +} diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_e610.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_e610.h new file mode 100644 index 00000000000..18b97234705 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_e610.h @@ -0,0 +1,210 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 1999 - 2026 Intel Corporation */ + +#ifndef _IXGBE_E610_H_ +#define _IXGBE_E610_H_ + +#include "ixgbe_type.h" + +void ixgbe_init_aci(struct ixgbe_hw *hw); +void ixgbe_shutdown_aci(struct ixgbe_hw *hw); + +void ixgbe_aci_debug(struct ixgbe_hw *hw, void *desc, void *buf, u16 buf_len); + +s32 ixgbe_aci_send_cmd(struct ixgbe_hw *hw, struct ixgbe_aci_desc *desc, + void *buf, u16 buf_size); +bool ixgbe_aci_check_event_pending(struct ixgbe_hw *hw); +s32 ixgbe_aci_get_event(struct ixgbe_hw *hw, struct ixgbe_aci_event *e, + bool *pending); + +void ixgbe_fill_dflt_direct_cmd_desc(struct ixgbe_aci_desc *desc, u16 opcode); + +s32 ixgbe_aci_get_fw_ver(struct ixgbe_hw *hw); +s32 ixgbe_aci_send_driver_ver(struct ixgbe_hw *hw, struct ixgbe_driver_ver *dv); +s32 ixgbe_aci_set_pf_context(struct ixgbe_hw *hw, u8 pf_id); + +s32 ixgbe_acquire_res(struct ixgbe_hw *hw, enum ixgbe_aci_res_ids res, + enum ixgbe_aci_res_access_type access, u32 timeout); +void ixgbe_release_res(struct ixgbe_hw *hw, enum ixgbe_aci_res_ids res); +s32 ixgbe_aci_list_caps(struct ixgbe_hw *hw, void *buf, u16 buf_size, + u32 *cap_count, enum ixgbe_aci_opc opc); +s32 ixgbe_discover_dev_caps(struct ixgbe_hw *hw, + struct ixgbe_hw_dev_caps *dev_caps); +s32 ixgbe_discover_func_caps(struct ixgbe_hw* hw, + struct ixgbe_hw_func_caps* func_caps); +s32 ixgbe_get_caps(struct ixgbe_hw *hw); +s32 ixgbe_aci_disable_rxen(struct ixgbe_hw *hw); +s32 ixgbe_aci_get_phy_caps(struct ixgbe_hw *hw, bool qual_mods, u8 report_mode, + struct ixgbe_aci_cmd_get_phy_caps_data *pcaps); +bool ixgbe_phy_caps_equals_cfg(struct ixgbe_aci_cmd_get_phy_caps_data *caps, + struct ixgbe_aci_cmd_set_phy_cfg_data *cfg); +void ixgbe_copy_phy_caps_to_cfg(struct ixgbe_aci_cmd_get_phy_caps_data *caps, + struct ixgbe_aci_cmd_set_phy_cfg_data *cfg); +s32 ixgbe_aci_set_phy_cfg(struct ixgbe_hw *hw, + struct ixgbe_aci_cmd_set_phy_cfg_data *cfg); +s32 ixgbe_aci_set_link_restart_an(struct ixgbe_hw *hw, bool ena_link); +s32 ixgbe_update_link_info(struct ixgbe_hw *hw); +s32 ixgbe_get_link_status(struct ixgbe_hw *hw, bool *link_up); +s32 ixgbe_aci_get_link_info(struct ixgbe_hw *hw, bool ena_lse, + struct ixgbe_link_status *link); +s32 ixgbe_aci_set_event_mask(struct ixgbe_hw *hw, u8 port_num, u16 mask); +s32 ixgbe_configure_lse(struct ixgbe_hw *hw, bool activate, u16 mask); + +#ifndef NO_PTP_SUPPORT +s32 ixgbe_set_ptp_by_phy(struct ixgbe_hw *hw, u8 ptp_request, u8 flags); +s32 ixgbe_get_ptp_by_phy(struct ixgbe_hw *hw, u8 *ptp_config, u8 *flags, + u16 *max_drift_thresh); +#endif /* !NO_PTP_SUPPORT */ + +s32 ixgbe_aci_get_netlist_node(struct ixgbe_hw *hw, + struct ixgbe_aci_cmd_get_link_topo *cmd, + u8 *node_part_number, u16 *node_handle); +#if !defined(NO_PTP_SUPPORT) +s32 ixgbe_aci_get_netlist_node_pin(struct ixgbe_hw *hw, + struct ixgbe_aci_cmd_get_link_topo_pin *cmd, + u16 *node_handle); +#endif /* !NO_PTP_SUPPORT */ +s32 ixgbe_find_netlist_node(struct ixgbe_hw *hw, u8 node_type_ctx, + u8 node_part_number, u16 *node_handle); +s32 ixgbe_aci_read_i2c(struct ixgbe_hw *hw, + struct ixgbe_aci_cmd_link_topo_addr topo_addr, + u16 bus_addr, __le16 addr, u8 params, u8 *data); +s32 ixgbe_aci_write_i2c(struct ixgbe_hw *hw, + struct ixgbe_aci_cmd_link_topo_addr topo_addr, + u16 bus_addr, __le16 addr, u8 params, u8 *data); +s32 ixgbe_aci_set_port_id_led(struct ixgbe_hw *hw, bool orig_mode); +s32 ixgbe_aci_set_gpio(struct ixgbe_hw *hw, u16 gpio_ctrl_handle, u8 pin_idx, + bool value); +s32 ixgbe_aci_get_gpio(struct ixgbe_hw *hw, u16 gpio_ctrl_handle, u8 pin_idx, + bool *value); +s32 ixgbe_aci_sff_eeprom(struct ixgbe_hw *hw, u16 lport, u8 bus_addr, + u16 mem_addr, u8 page, u8 page_bank_ctrl, u8 *data, + u8 length, bool write); +s32 ixgbe_aci_prog_topo_dev_nvm(struct ixgbe_hw *hw, + struct ixgbe_aci_cmd_link_topo_params *topo_params); +s32 ixgbe_aci_read_topo_dev_nvm(struct ixgbe_hw *hw, + struct ixgbe_aci_cmd_link_topo_params *topo_params, + u32 start_address, u8 *data, u8 data_size); + +s32 ixgbe_acquire_nvm(struct ixgbe_hw *hw, + enum ixgbe_aci_res_access_type access); +void ixgbe_release_nvm(struct ixgbe_hw *hw); + +s32 ixgbe_aci_read_nvm(struct ixgbe_hw *hw, u16 module_typeid, u32 offset, + u16 length, void *data, bool last_command, + bool read_shadow_ram); + +s32 ixgbe_aci_erase_nvm(struct ixgbe_hw *hw, u16 module_typeid); +s32 ixgbe_aci_update_nvm(struct ixgbe_hw *hw, u16 module_typeid, + u32 offset, u16 length, void *data, + bool last_command, u8 command_flags); + +s32 ixgbe_nvm_validate_checksum(struct ixgbe_hw *hw); +s32 ixgbe_nvm_recalculate_checksum(struct ixgbe_hw *hw); + +s32 ixgbe_nvm_write_activate(struct ixgbe_hw *hw, u16 cmd_flags, + u8 *response_flags); + +s32 ixgbe_get_nvm_minsrevs(struct ixgbe_hw *hw, struct ixgbe_minsrev_info *minsrevs); +s32 ixgbe_update_nvm_minsrevs(struct ixgbe_hw *hw, struct ixgbe_minsrev_info *minsrevs); +s32 ixgbe_get_inactive_orom_ver(struct ixgbe_hw *hw, struct ixgbe_orom_info *orom); +s32 ixgbe_get_inactive_nvm_ver(struct ixgbe_hw *hw, struct ixgbe_nvm_info *nvm); +s32 ixgbe_get_active_nvm_ver(struct ixgbe_hw *hw, struct ixgbe_nvm_info *nvm); +s32 ixgbe_get_inactive_netlist_ver(struct ixgbe_hw *hw, struct ixgbe_netlist_info *netlist); +s32 ixgbe_init_nvm(struct ixgbe_hw *hw); + +s32 ixgbe_aci_nvm_update_empr(struct ixgbe_hw *hw); +s32 ixgbe_nvm_set_pkg_data(struct ixgbe_hw *hw, bool del_pkg_data_flag, + u8 *data, u16 length); +s32 ixgbe_nvm_pass_component_tbl(struct ixgbe_hw *hw, u8 *data, u16 length, + u8 transfer_flag, u8 *comp_response, + u8 *comp_response_code); + +s32 ixgbe_sanitize_operate(struct ixgbe_hw *hw); +s32 ixgbe_sanitize_nvm(struct ixgbe_hw *hw, u8 cmd_flags, u8 *values); + +s32 ixgbe_read_sr_word_aci(struct ixgbe_hw *hw, u16 offset, u16 *data); +s32 ixgbe_read_sr_buf_aci(struct ixgbe_hw *hw, u16 offset, u16 *words, u16 *data); +s32 ixgbe_read_flat_nvm(struct ixgbe_hw *hw, u32 offset, u32 *length, + u8 *data, bool read_shadow_ram); + +s32 ixgbe_aci_alternate_write(struct ixgbe_hw *hw, u32 reg_addr0, + u32 reg_val0, u32 reg_addr1, u32 reg_val1); +s32 ixgbe_aci_alternate_read(struct ixgbe_hw *hw, u32 reg_addr0, + u32 *reg_val0, u32 reg_addr1, u32 *reg_val1); +s32 ixgbe_aci_alternate_write_done(struct ixgbe_hw *hw, u8 bios_mode, + bool *reset_needed); +s32 ixgbe_aci_alternate_clear(struct ixgbe_hw *hw); + +s32 ixgbe_aci_get_internal_data(struct ixgbe_hw *hw, u16 cluster_id, + u16 table_id, u32 start, void *buf, + u16 buf_size, u16 *ret_buf_size, + u16 *ret_next_cluster, u16 *ret_next_table, + u32 *ret_next_index); + +s32 ixgbe_handle_nvm_access(struct ixgbe_hw *hw, + struct ixgbe_nvm_access_cmd *cmd, + struct ixgbe_nvm_access_data *data); + +s32 ixgbe_aci_set_health_status_config(struct ixgbe_hw *hw, u8 event_source); +bool ixgbe_fwlog_supported(struct ixgbe_hw *hw); +s32 ixgbe_fwlog_set(struct ixgbe_hw *hw, struct ixgbe_fwlog_cfg *cfg); +s32 ixgbe_fwlog_update_modules(struct ixgbe_hw *hw, + struct ixgbe_fwlog_module_entry *entries, + u16 num_entries); +s32 ixgbe_fwlog_register(struct ixgbe_hw *hw); +s32 ixgbe_fwlog_unregister(struct ixgbe_hw *hw); +void ixgbe_fwlog_set_support_ena(struct ixgbe_hw *hw); +s32 ixgbe_fwlog_get(struct ixgbe_hw *hw, struct ixgbe_fwlog_cfg *cfg); +void ixgbe_fwlog_event_dump(struct ixgbe_hw *hw, + struct ixgbe_aci_desc *desc, void *buf); + +/* E610 operations */ +s32 ixgbe_reset_hw_E610(struct ixgbe_hw *hw); +s32 ixgbe_start_hw_E610(struct ixgbe_hw *hw); +enum ixgbe_media_type ixgbe_get_media_type_E610(struct ixgbe_hw *hw); +u64 ixgbe_get_supported_physical_layer_E610(struct ixgbe_hw *hw); +s32 ixgbe_setup_link_E610(struct ixgbe_hw *hw, ixgbe_link_speed speed, + bool autoneg_wait); +s32 ixgbe_check_link_E610(struct ixgbe_hw *hw, ixgbe_link_speed *speed, + bool *link_up, bool link_up_wait_to_complete); +s32 ixgbe_get_link_capabilities_E610(struct ixgbe_hw *hw, + ixgbe_link_speed *speed, + bool *autoneg); +s32 ixgbe_cfg_phy_fc(struct ixgbe_hw *hw, + struct ixgbe_aci_cmd_set_phy_cfg_data *cfg, + enum ixgbe_fc_mode req_mode); +s32 ixgbe_setup_fc_E610(struct ixgbe_hw *hw); +void ixgbe_fc_autoneg_E610(struct ixgbe_hw *hw); +s32 ixgbe_set_fw_drv_ver_E610(struct ixgbe_hw *hw, u8 maj, u8 min, u8 build, + u8 sub, u16 len, const char *driver_ver); +void ixgbe_disable_rx_E610(struct ixgbe_hw *hw); +s32 ixgbe_setup_eee_E610(struct ixgbe_hw *hw, bool enable_eee); +bool ixgbe_fw_recovery_mode_E610(struct ixgbe_hw *hw); +bool ixgbe_fw_rollback_mode_E610(struct ixgbe_hw *hw); +bool ixgbe_get_fw_tsam_mode_E610(struct ixgbe_hw *hw); +s32 ixgbe_init_phy_ops_E610(struct ixgbe_hw *hw); +s32 ixgbe_identify_phy_E610(struct ixgbe_hw *hw); +s32 ixgbe_identify_module_E610(struct ixgbe_hw *hw); +s32 ixgbe_setup_phy_link_E610(struct ixgbe_hw *hw); +s32 ixgbe_get_phy_firmware_version_E610(struct ixgbe_hw *hw, + u16 *firmware_version); +s32 ixgbe_read_i2c_sff8472_E610(struct ixgbe_hw *hw, u8 byte_offset, + u8 *sff8472_data); +s32 ixgbe_read_i2c_eeprom_E610(struct ixgbe_hw *hw, u8 byte_offset, + u8 *eeprom_data); +s32 ixgbe_write_i2c_eeprom_E610(struct ixgbe_hw *hw, u8 byte_offset, + u8 eeprom_data); +s32 ixgbe_check_overtemp_E610(struct ixgbe_hw *hw); +s32 ixgbe_set_phy_power_E610(struct ixgbe_hw *hw, bool on); +s32 ixgbe_enter_lplu_E610(struct ixgbe_hw *hw); +s32 ixgbe_init_eeprom_params_E610(struct ixgbe_hw *hw); +s32 ixgbe_read_ee_aci_E610(struct ixgbe_hw *hw, u16 offset, u16 *data); +s32 ixgbe_read_ee_aci_buffer_E610(struct ixgbe_hw *hw, u16 offset, + u16 words, u16 *data); +s32 ixgbe_calc_eeprom_checksum_E610(struct ixgbe_hw *hw); +s32 ixgbe_update_eeprom_checksum_E610(struct ixgbe_hw *hw); +s32 ixgbe_validate_eeprom_checksum_E610(struct ixgbe_hw *hw, u16 *checksum_val); +s32 ixgbe_read_pba_string_E610(struct ixgbe_hw *hw, u8 *pba_num, u32 pba_num_size); + +#endif /* _IXGBE_E610_H_ */ diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_ethtool.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_ethtool.c new file mode 100644 index 00000000000..4c15ac31c2d --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_ethtool.c @@ -0,0 +1,6144 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 1999 - 2026 Intel Corporation */ + +/* ethtool support for ixgbe */ + +#include "ixgbe.h" + +#include +#include +#include +#include +#include +#include +#include + +#ifdef SIOCETHTOOL +#include + +#ifdef ETHTOOL_GMODULEINFO +#include "ixgbe_phy.h" +#endif +#ifdef HAVE_ETHTOOL_GET_TS_INFO +#include +#endif + +#ifndef ETH_GSTRING_LEN +#define ETH_GSTRING_LEN 32 +#endif + +#define IXGBE_ALL_RAR_ENTRIES 16 + +#ifdef HAVE_XDP_SUPPORT +#include +#endif +#include "ixgbe_txrx_common.h" +#ifdef ETHTOOL_OPS_COMPAT +#include "kcompat_ethtool.c" +#endif +#ifdef ETHTOOL_GSTATS +struct ixgbe_stats { + char stat_string[ETH_GSTRING_LEN]; + int sizeof_stat; + int stat_offset; +}; + +#define IXGBE_NETDEV_STAT(_net_stat) { \ + .stat_string = #_net_stat, \ + .sizeof_stat = sizeof_field(struct net_device_stats, _net_stat), \ + .stat_offset = offsetof(struct net_device_stats, _net_stat) \ +} +static const struct ixgbe_stats ixgbe_gstrings_net_stats[] = { + IXGBE_NETDEV_STAT(rx_packets), + IXGBE_NETDEV_STAT(tx_packets), + IXGBE_NETDEV_STAT(rx_bytes), + IXGBE_NETDEV_STAT(tx_bytes), + IXGBE_NETDEV_STAT(rx_errors), + IXGBE_NETDEV_STAT(tx_errors), + IXGBE_NETDEV_STAT(rx_dropped), + IXGBE_NETDEV_STAT(tx_dropped), + IXGBE_NETDEV_STAT(multicast), + IXGBE_NETDEV_STAT(collisions), + IXGBE_NETDEV_STAT(rx_over_errors), + IXGBE_NETDEV_STAT(rx_crc_errors), + IXGBE_NETDEV_STAT(rx_frame_errors), + IXGBE_NETDEV_STAT(rx_fifo_errors), + IXGBE_NETDEV_STAT(rx_missed_errors), + IXGBE_NETDEV_STAT(tx_aborted_errors), + IXGBE_NETDEV_STAT(tx_carrier_errors), + IXGBE_NETDEV_STAT(tx_fifo_errors), + IXGBE_NETDEV_STAT(tx_heartbeat_errors), +}; + +#define IXGBE_STAT(_name, _stat) { \ + .stat_string = _name, \ + .sizeof_stat = sizeof_field(struct ixgbe_adapter, _stat), \ + .stat_offset = offsetof(struct ixgbe_adapter, _stat) \ +} +static struct ixgbe_stats ixgbe_gstrings_stats[] = { + IXGBE_STAT("rx_pkts_nic", stats.gprc), + IXGBE_STAT("tx_pkts_nic", stats.gptc), + IXGBE_STAT("rx_bytes_nic", stats.gorc), + IXGBE_STAT("tx_bytes_nic", stats.gotc), + IXGBE_STAT("lsc_int", lsc_int), + IXGBE_STAT("tx_busy", tx_busy), + IXGBE_STAT("non_eop_descs", non_eop_descs), + IXGBE_STAT("broadcast", stats.bprc), + IXGBE_STAT("rx_no_buffer_count", stats.rnbc[0]) , + IXGBE_STAT("tx_timeout_count", tx_timeout_count), + IXGBE_STAT("tx_restart_queue", restart_queue), + IXGBE_STAT("rx_length_errors", stats.rlec), + IXGBE_STAT("rx_long_length_errors", stats.roc), + IXGBE_STAT("rx_short_length_errors", stats.ruc), + IXGBE_STAT("tx_flow_control_xon", stats.lxontxc), + IXGBE_STAT("rx_flow_control_xon", stats.lxonrxc), + IXGBE_STAT("tx_flow_control_xoff", stats.lxofftxc), + IXGBE_STAT("rx_flow_control_xoff", stats.lxoffrxc), + IXGBE_STAT("rx_csum_offload_errors", hw_csum_rx_error), + IXGBE_STAT("alloc_rx_page", alloc_rx_page), + IXGBE_STAT("alloc_rx_page_failed", alloc_rx_page_failed), + IXGBE_STAT("alloc_rx_buff_failed", alloc_rx_buff_failed), + IXGBE_STAT("rx_no_dma_resources", hw_rx_no_dma_resources), + IXGBE_STAT("hw_rsc_aggregated", rsc_total_count), + IXGBE_STAT("hw_rsc_flushed", rsc_total_flush), +#ifdef HAVE_TX_MQ + IXGBE_STAT("fdir_match", stats.fdirmatch), + IXGBE_STAT("fdir_miss", stats.fdirmiss), + IXGBE_STAT("fdir_overflow", fdir_overflow), +#endif /* HAVE_TX_MQ */ +#if IS_ENABLED(CONFIG_FCOE) + IXGBE_STAT("fcoe_bad_fccrc", stats.fccrc), + IXGBE_STAT("fcoe_last_errors", stats.fclast), + IXGBE_STAT("rx_fcoe_dropped", stats.fcoerpdc), + IXGBE_STAT("rx_fcoe_packets", stats.fcoeprc), + IXGBE_STAT("rx_fcoe_dwords", stats.fcoedwrc), + IXGBE_STAT("fcoe_noddp", stats.fcoe_noddp), + IXGBE_STAT("fcoe_noddp_ext_buff", stats.fcoe_noddp_ext_buff), + IXGBE_STAT("tx_fcoe_packets", stats.fcoeptc), + IXGBE_STAT("tx_fcoe_dwords", stats.fcoedwtc), +#endif /* CONFIG_FCOE */ + IXGBE_STAT("os2bmc_rx_by_bmc", stats.o2bgptc), + IXGBE_STAT("os2bmc_tx_by_bmc", stats.b2ospc), + IXGBE_STAT("os2bmc_tx_by_host", stats.o2bspc), + IXGBE_STAT("os2bmc_rx_by_host", stats.b2ogprc), +#ifdef HAVE_PTP_1588_CLOCK + IXGBE_STAT("tx_hwtstamp_timeouts", tx_hwtstamp_timeouts), + IXGBE_STAT("tx_hwtstamp_skipped", tx_hwtstamp_skipped), + IXGBE_STAT("rx_hwtstamp_cleared", rx_hwtstamp_cleared), +#endif /* HAVE_PTP_1588_CLOCK */ +}; + +/* ixgbe allocates num_tx_queues and num_rx_queues symmetrically so + * we set the num_rx_queues to evaluate to num_tx_queues. This is + * used because we do not have a good way to get the max number of + * rx queues with CONFIG_RPS disabled. + */ +#ifdef HAVE_TX_MQ +#ifdef HAVE_NETDEV_SELECT_QUEUE +#define IXGBE_NUM_RX_QUEUES netdev->num_tx_queues +#define IXGBE_NUM_TX_QUEUES netdev->num_tx_queues +#else +#define IXGBE_NUM_RX_QUEUES adapter->indices +#define IXGBE_NUM_TX_QUEUES adapter->indices +#endif /* HAVE_NETDEV_SELECT_QUEUE */ +#else /* HAVE_TX_MQ */ +#define IXGBE_NUM_TX_QUEUES 1 +#define IXGBE_NUM_RX_QUEUES ( \ + ((struct ixgbe_adapter *)netdev_priv(netdev))->num_rx_queues) +#endif /* HAVE_TX_MQ */ + +#define IXGBE_QUEUE_STATS_LEN ( \ + (IXGBE_NUM_TX_QUEUES + IXGBE_NUM_RX_QUEUES) * \ + (sizeof(struct ixgbe_queue_stats) / sizeof(u64))) +#define IXGBE_GLOBAL_STATS_LEN ARRAY_SIZE(ixgbe_gstrings_stats) +#define IXGBE_NETDEV_STATS_LEN ARRAY_SIZE(ixgbe_gstrings_net_stats) +#define IXGBE_PB_STATS_LEN ( \ + (sizeof(((struct ixgbe_adapter *)0)->stats.pxonrxc) + \ + sizeof(((struct ixgbe_adapter *)0)->stats.pxontxc) + \ + sizeof(((struct ixgbe_adapter *)0)->stats.pxoffrxc) + \ + sizeof(((struct ixgbe_adapter *)0)->stats.pxofftxc)) \ + / sizeof(u64)) +#define IXGBE_VF_STATS_LEN \ + ((((struct ixgbe_adapter *)netdev_priv(netdev))->num_vfs) * \ + (sizeof(struct vf_stats) / sizeof(u64))) +#define IXGBE_STATS_LEN (IXGBE_GLOBAL_STATS_LEN + \ + IXGBE_NETDEV_STATS_LEN + \ + IXGBE_PB_STATS_LEN + \ + IXGBE_QUEUE_STATS_LEN + \ + IXGBE_VF_STATS_LEN) + +#endif /* ETHTOOL_GSTATS */ +#ifdef ETHTOOL_TEST +static const char ixgbe_gstrings_test[][ETH_GSTRING_LEN] = { + "Register test (offline)", "Eeprom test (offline)", + "Interrupt test (offline)", "Loopback test (offline)", + "Link test (on/offline)" +}; +#define IXGBE_TEST_LEN (sizeof(ixgbe_gstrings_test) / ETH_GSTRING_LEN) +#endif /* ETHTOOL_TEST */ + +#ifdef HAVE_ETHTOOL_GET_SSET_COUNT +static const char ixgbe_priv_flags_strings[][ETH_GSTRING_LEN] = { +#define IXGBE_PRIV_FLAGS_FD_ATR BIT(0) + "flow-director-atr", +#ifdef HAVE_SWIOTLB_SKIP_CPU_SYNC +#define IXGBE_PRIV_FLAGS_LEGACY_RX BIT(1) + "legacy-rx", +#endif +#define IXGBE_PRIV_FLAGS_AUTO_DISABLE_VF BIT(2) + "mdd-disable-vf", +}; + +#define IXGBE_PRIV_FLAGS_STR_LEN ARRAY_SIZE(ixgbe_priv_flags_strings) + +#endif /* HAVE_ETHTOOL_GET_SSET_COUNT */ +/* currently supported speeds for 10G */ +#define ADVERTISED_MASK_10G (SUPPORTED_10000baseT_Full | SUPPORTED_10000baseKX4_Full | SUPPORTED_10000baseKR_Full) + +#define ixgbe_isbackplane(type) ((type == ixgbe_media_type_backplane)? true : false) + + +#ifdef ETHTOOL_GLINKSETTINGS +static void ixgbe_set_supported_10gtypes(struct ixgbe_hw *hw, + struct ethtool_link_ksettings *cmd) +{ + if (!ixgbe_isbackplane(hw->phy.media_type)) { + ethtool_link_ksettings_add_link_mode + (cmd, supported, 10000baseT_Full); + return; + } + + switch (hw->device_id) { + case IXGBE_DEV_ID_82598: + case IXGBE_DEV_ID_82599_KX4: + case IXGBE_DEV_ID_82599_KX4_MEZZ: + case IXGBE_DEV_ID_X550EM_X_KX4: + ethtool_link_ksettings_add_link_mode + (cmd, supported, 10000baseKX4_Full); + break; + case IXGBE_DEV_ID_82598_BX: + case IXGBE_DEV_ID_82599_KR: + case IXGBE_DEV_ID_X550EM_X_KR: + case IXGBE_DEV_ID_X550EM_X_XFI: + ethtool_link_ksettings_add_link_mode + (cmd, supported, 10000baseKR_Full); + break; + default: + ethtool_link_ksettings_add_link_mode + (cmd, supported, 10000baseKX4_Full); + ethtool_link_ksettings_add_link_mode + (cmd, supported, 10000baseKR_Full); + break; + } +} + +static void ixgbe_set_advertising_10gtypes(struct ixgbe_hw *hw, + struct ethtool_link_ksettings *cmd) +{ + if (!ixgbe_isbackplane(hw->phy.media_type)) { + ethtool_link_ksettings_add_link_mode + (cmd, advertising, 10000baseT_Full); + return; + } + + switch (hw->device_id) { + case IXGBE_DEV_ID_82598: + case IXGBE_DEV_ID_82599_KX4: + case IXGBE_DEV_ID_82599_KX4_MEZZ: + case IXGBE_DEV_ID_X550EM_X_KX4: + ethtool_link_ksettings_add_link_mode + (cmd, advertising, 10000baseKX4_Full); + break; + case IXGBE_DEV_ID_82598_BX: + case IXGBE_DEV_ID_82599_KR: + case IXGBE_DEV_ID_X550EM_X_KR: + case IXGBE_DEV_ID_X550EM_X_XFI: + ethtool_link_ksettings_add_link_mode + (cmd, advertising, 10000baseKR_Full); + break; + default: + ethtool_link_ksettings_add_link_mode + (cmd, advertising, 10000baseKX4_Full); + ethtool_link_ksettings_add_link_mode + (cmd, advertising, 10000baseKR_Full); + break; + } +} + +/** + * ixgbe_get_link_ksettings - Retrieve link settings for the network device + * @netdev: Network device structure + * @cmd: Pointer to ethtool_link_ksettings structure to be filled with link settings + * + * This function populates the `ethtool_link_ksettings` structure with the + * supported and advertised link modes, port type, and speed for the specified + * network device. It considers the device's capabilities, PHY type, and + * current link status to determine the appropriate settings. + * + * Return: 0 on success. + */ +static int ixgbe_get_link_ksettings(struct net_device *netdev, + struct ethtool_link_ksettings *cmd) +{ + struct ixgbe_adapter *adapter = netdev_priv(netdev); + struct ixgbe_hw *hw = &adapter->hw; + ixgbe_link_speed supported_link; + bool autoneg = false; + + ethtool_link_ksettings_zero_link_mode(cmd, supported); + ethtool_link_ksettings_zero_link_mode(cmd, advertising); + + hw->mac.ops.get_link_capabilities(hw, &supported_link, &autoneg); + /* set the supported link speeds */ + if (supported_link & IXGBE_LINK_SPEED_10GB_FULL) { + ixgbe_set_supported_10gtypes(hw, cmd); + ixgbe_set_advertising_10gtypes(hw, cmd); + } +#ifdef HAVE_ETHTOOL_5G_BITS + if (supported_link & IXGBE_LINK_SPEED_5GB_FULL) + ethtool_link_ksettings_add_link_mode(cmd, supported, + 5000baseT_Full); +#endif +#ifdef HAVE_ETHTOOL_NEW_2500MB_BITS + if (supported_link & IXGBE_LINK_SPEED_2_5GB_FULL) + ethtool_link_ksettings_add_link_mode(cmd, supported, + 2500baseT_Full); +#endif + if (supported_link & IXGBE_LINK_SPEED_1GB_FULL) { + if (ixgbe_isbackplane(hw->phy.media_type)) { + ethtool_link_ksettings_add_link_mode(cmd, supported, + 1000baseKX_Full); + ethtool_link_ksettings_add_link_mode(cmd, advertising, + 1000baseKX_Full); + } else { + ethtool_link_ksettings_add_link_mode(cmd, supported, + 1000baseT_Full); + ethtool_link_ksettings_add_link_mode(cmd, advertising, + 1000baseT_Full); + } + } + if (supported_link & IXGBE_LINK_SPEED_100_FULL) { + ethtool_link_ksettings_add_link_mode(cmd, supported, + 100baseT_Full); + ethtool_link_ksettings_add_link_mode(cmd, advertising, + 100baseT_Full); + } + if (supported_link & IXGBE_LINK_SPEED_10_FULL) { + ethtool_link_ksettings_add_link_mode(cmd, supported, + 10baseT_Full); + ethtool_link_ksettings_add_link_mode(cmd, advertising, + 10baseT_Full); + } + + /* set the advertised speeds */ + if (hw->phy.autoneg_advertised) { + ethtool_link_ksettings_zero_link_mode(cmd, advertising); + if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_10_FULL) + ethtool_link_ksettings_add_link_mode(cmd, advertising, + 10baseT_Full); + if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_100_FULL) + ethtool_link_ksettings_add_link_mode(cmd, advertising, + 100baseT_Full); + if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_10GB_FULL) + ixgbe_set_advertising_10gtypes(hw, cmd); + if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_1GB_FULL) { + if (ethtool_link_ksettings_test_link_mode + (cmd, supported, 1000baseKX_Full)) + ethtool_link_ksettings_add_link_mode + (cmd, advertising, 1000baseKX_Full); + else + ethtool_link_ksettings_add_link_mode + (cmd, advertising, 1000baseT_Full); + } +#ifdef HAVE_ETHTOOL_5G_BITS + if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_5GB_FULL) { + ethtool_link_ksettings_add_link_mode(cmd, advertising, + 5000baseT_Full); + } +#endif +#ifdef HAVE_ETHTOOL_NEW_2500MB_BITS + if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_2_5GB_FULL) { + ethtool_link_ksettings_add_link_mode(cmd, advertising, + 2500baseT_Full); + } +#endif + } else { + if (hw->phy.multispeed_fiber && !autoneg) { + if (supported_link & IXGBE_LINK_SPEED_10GB_FULL) + ethtool_link_ksettings_add_link_mode + (cmd, advertising, 10000baseT_Full); + } + } + + if (autoneg) { + ethtool_link_ksettings_add_link_mode(cmd, supported, Autoneg); + ethtool_link_ksettings_add_link_mode(cmd, advertising, Autoneg); + cmd->base.autoneg = AUTONEG_ENABLE; + } else { + cmd->base.autoneg = AUTONEG_DISABLE; + } + + /* Determine the remaining settings based on the PHY type. */ + switch (adapter->hw.phy.type) { + case ixgbe_phy_tn: + case ixgbe_phy_aq: + case ixgbe_phy_x550em_ext_t: + case ixgbe_phy_fw: + case ixgbe_phy_cu_unknown: + ethtool_link_ksettings_add_link_mode(cmd, supported, TP); + ethtool_link_ksettings_add_link_mode(cmd, advertising, TP); + cmd->base.port = PORT_TP; + break; + case ixgbe_phy_qt: + ethtool_link_ksettings_add_link_mode(cmd, supported, FIBRE); + ethtool_link_ksettings_add_link_mode(cmd, advertising, FIBRE); + cmd->base.port = PORT_FIBRE; + break; + case ixgbe_phy_nl: + case ixgbe_phy_sfp_passive_tyco: + case ixgbe_phy_sfp_passive_unknown: + case ixgbe_phy_sfp_ftl: + case ixgbe_phy_sfp_avago: + case ixgbe_phy_sfp_intel: + case ixgbe_phy_sfp_unknown: + case ixgbe_phy_qsfp_passive_unknown: + case ixgbe_phy_qsfp_active_unknown: + case ixgbe_phy_qsfp_intel: + case ixgbe_phy_qsfp_unknown: + switch (adapter->hw.phy.sfp_type) { + /* SFP+ devices, further checking needed */ + case ixgbe_sfp_type_da_cu: + case ixgbe_sfp_type_da_cu_core0: + case ixgbe_sfp_type_da_cu_core1: + ethtool_link_ksettings_add_link_mode(cmd, supported, + FIBRE); + ethtool_link_ksettings_add_link_mode(cmd, advertising, + FIBRE); + cmd->base.port = PORT_DA; + break; + case ixgbe_sfp_type_sr: + case ixgbe_sfp_type_lr: + case ixgbe_sfp_type_srlr_core0: + case ixgbe_sfp_type_srlr_core1: + case ixgbe_sfp_type_1g_sx_core0: + case ixgbe_sfp_type_1g_sx_core1: + case ixgbe_sfp_type_1g_lx_core0: + case ixgbe_sfp_type_1g_lx_core1: + ethtool_link_ksettings_add_link_mode(cmd, supported, + FIBRE); + ethtool_link_ksettings_add_link_mode(cmd, advertising, + FIBRE); + cmd->base.port = PORT_FIBRE; + break; + case ixgbe_sfp_type_not_present: + ethtool_link_ksettings_add_link_mode(cmd, supported, + FIBRE); + ethtool_link_ksettings_add_link_mode(cmd, advertising, + FIBRE); + cmd->base.port = PORT_NONE; + break; + case ixgbe_sfp_type_1g_cu_core0: + case ixgbe_sfp_type_1g_cu_core1: + ethtool_link_ksettings_add_link_mode(cmd, supported, + TP); + ethtool_link_ksettings_add_link_mode(cmd, advertising, + TP); + cmd->base.port = PORT_TP; + break; + case ixgbe_sfp_type_unknown: + default: + ethtool_link_ksettings_add_link_mode(cmd, supported, + FIBRE); + ethtool_link_ksettings_add_link_mode(cmd, advertising, + FIBRE); + cmd->base.port = PORT_OTHER; + break; + } + break; + case ixgbe_phy_xaui: + ethtool_link_ksettings_add_link_mode(cmd, supported, FIBRE); + ethtool_link_ksettings_add_link_mode(cmd, advertising, FIBRE); + cmd->base.port = PORT_NONE; + break; + case ixgbe_phy_unknown: + case ixgbe_phy_generic: + case ixgbe_phy_sfp_unsupported: + default: + ethtool_link_ksettings_add_link_mode(cmd, supported, FIBRE); + ethtool_link_ksettings_add_link_mode(cmd, advertising, FIBRE); + cmd->base.port = PORT_OTHER; + break; + } + + /* Indicate pause support */ + ethtool_link_ksettings_add_link_mode(cmd, supported, Pause); + + switch (hw->fc.requested_mode) { + case ixgbe_fc_full: + ethtool_link_ksettings_add_link_mode(cmd, advertising, Pause); + break; + case ixgbe_fc_rx_pause: + ethtool_link_ksettings_add_link_mode(cmd, advertising, Pause); + ethtool_link_ksettings_add_link_mode(cmd, advertising, + Asym_Pause); + break; + case ixgbe_fc_tx_pause: + ethtool_link_ksettings_add_link_mode(cmd, advertising, + Asym_Pause); + break; + default: + ethtool_link_ksettings_del_link_mode(cmd, advertising, Pause); + ethtool_link_ksettings_del_link_mode(cmd, advertising, + Asym_Pause); + } + + if (netif_carrier_ok(netdev)) { + switch (adapter->link_speed) { + case IXGBE_LINK_SPEED_10GB_FULL: + cmd->base.speed = SPEED_10000; + break; + case IXGBE_LINK_SPEED_5GB_FULL: + cmd->base.speed = SPEED_5000; + break; +#ifdef SUPPORTED_2500baseX_Full + case IXGBE_LINK_SPEED_2_5GB_FULL: + cmd->base.speed = SPEED_2500; + break; +#endif /* SUPPORTED_2500baseX_Full */ + case IXGBE_LINK_SPEED_1GB_FULL: + cmd->base.speed = SPEED_1000; + break; + case IXGBE_LINK_SPEED_100_FULL: + cmd->base.speed = SPEED_100; + break; + case IXGBE_LINK_SPEED_10_FULL: + cmd->base.speed = SPEED_10; + break; + default: + break; + } + cmd->base.duplex = DUPLEX_FULL; + } else { + cmd->base.speed = SPEED_UNKNOWN; + cmd->base.duplex = DUPLEX_UNKNOWN; + } + + return 0; +} +#else /* ETHTOOL_GLINKSETTINGS */ +static __u32 ixgbe_backplane_type(struct ixgbe_hw *hw) +{ + __u32 mode = 0x00; + + switch (hw->device_id) { + case IXGBE_DEV_ID_82598: + case IXGBE_DEV_ID_82599_KX4: + case IXGBE_DEV_ID_82599_KX4_MEZZ: + case IXGBE_DEV_ID_X550EM_X_KX4: + mode = SUPPORTED_10000baseKX4_Full; + break; + case IXGBE_DEV_ID_82598_BX: + case IXGBE_DEV_ID_82599_KR: + case IXGBE_DEV_ID_X550EM_X_KR: + case IXGBE_DEV_ID_X550EM_X_XFI: + mode = SUPPORTED_10000baseKR_Full; + break; + default: + mode = (SUPPORTED_10000baseKX4_Full | + SUPPORTED_10000baseKR_Full); + break; + } + return mode; +} + +/** + * ixgbe_get_settings - Retrieve link settings for the network device + * @netdev: Network device structure + * @ecmd: Pointer to ethtool_cmd structure to be filled with link settings + * + * This function populates the `ethtool_cmd` structure with the supported and + * advertised link modes, port type, speed, and duplex settings for the specified + * network device. It considers the device's capabilities, PHY type, and current + * link status to determine the appropriate settings. + * + * Return: 0 on success. + */ +static int ixgbe_get_settings(struct net_device *netdev, + struct ethtool_cmd *ecmd) +{ + struct ixgbe_adapter *adapter = netdev_priv(netdev); + struct ixgbe_hw *hw = &adapter->hw; + ixgbe_link_speed supported_link; + bool autoneg = false; + + hw->mac.ops.get_link_capabilities(hw, &supported_link, &autoneg); + + /* set the supported link speeds */ + if (supported_link & IXGBE_LINK_SPEED_10GB_FULL) + ecmd->supported |= (ixgbe_isbackplane(hw->phy.media_type)) ? + ixgbe_backplane_type(hw) : + SUPPORTED_10000baseT_Full; + if (supported_link & IXGBE_LINK_SPEED_1GB_FULL) + ecmd->supported |= (ixgbe_isbackplane(hw->phy.media_type)) ? + SUPPORTED_1000baseKX_Full : + SUPPORTED_1000baseT_Full; + if (supported_link & IXGBE_LINK_SPEED_100_FULL) + ecmd->supported |= SUPPORTED_100baseT_Full; + if (supported_link & IXGBE_LINK_SPEED_10_FULL) + ecmd->supported |= SUPPORTED_10baseT_Full; + + /* default advertised speed if phy.autoneg_advertised isn't set */ + ecmd->advertising = ecmd->supported; + + /* set the advertised speeds */ + if (hw->phy.autoneg_advertised) { + ecmd->advertising = 0; + if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_10_FULL) + ecmd->advertising |= ADVERTISED_10baseT_Full; + if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_100_FULL) + ecmd->advertising |= ADVERTISED_100baseT_Full; + if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_10GB_FULL) + ecmd->advertising |= (ecmd->supported & ADVERTISED_MASK_10G); + if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_1GB_FULL) { + if (ecmd->supported & SUPPORTED_1000baseKX_Full) + ecmd->advertising |= ADVERTISED_1000baseKX_Full; + else + ecmd->advertising |= ADVERTISED_1000baseT_Full; + } + } else { + if (hw->phy.multispeed_fiber && !autoneg) { + if (supported_link & IXGBE_LINK_SPEED_10GB_FULL) + ecmd->advertising = ADVERTISED_10000baseT_Full; + } + } + + if (autoneg) { + ecmd->supported |= SUPPORTED_Autoneg; + ecmd->advertising |= ADVERTISED_Autoneg; + ecmd->autoneg = AUTONEG_ENABLE; + } else { + ecmd->autoneg = AUTONEG_DISABLE; + } + + ecmd->transceiver = XCVR_EXTERNAL; + + /* Determine the remaining settings based on the PHY type. */ + switch (adapter->hw.phy.type) { + case ixgbe_phy_tn: + case ixgbe_phy_aq: + case ixgbe_phy_x550em_ext_t: + case ixgbe_phy_fw: + case ixgbe_phy_cu_unknown: + ecmd->supported |= SUPPORTED_TP; + ecmd->advertising |= ADVERTISED_TP; + ecmd->port = PORT_TP; + break; + case ixgbe_phy_qt: + ecmd->supported |= SUPPORTED_FIBRE; + ecmd->advertising |= ADVERTISED_FIBRE; + ecmd->port = PORT_FIBRE; + break; + case ixgbe_phy_nl: + case ixgbe_phy_sfp_passive_tyco: + case ixgbe_phy_sfp_passive_unknown: + case ixgbe_phy_sfp_ftl: + case ixgbe_phy_sfp_avago: + case ixgbe_phy_sfp_intel: + case ixgbe_phy_sfp_unknown: + case ixgbe_phy_qsfp_passive_unknown: + case ixgbe_phy_qsfp_active_unknown: + case ixgbe_phy_qsfp_intel: + case ixgbe_phy_qsfp_unknown: + switch (adapter->hw.phy.sfp_type) { + /* SFP+ devices, further checking needed */ + case ixgbe_sfp_type_da_cu: + case ixgbe_sfp_type_da_cu_core0: + case ixgbe_sfp_type_da_cu_core1: + ecmd->supported |= SUPPORTED_FIBRE; + ecmd->advertising |= ADVERTISED_FIBRE; + ecmd->port = PORT_DA; + break; + case ixgbe_sfp_type_sr: + case ixgbe_sfp_type_lr: + case ixgbe_sfp_type_srlr_core0: + case ixgbe_sfp_type_srlr_core1: + case ixgbe_sfp_type_1g_sx_core0: + case ixgbe_sfp_type_1g_sx_core1: + case ixgbe_sfp_type_1g_lx_core0: + case ixgbe_sfp_type_1g_lx_core1: + ecmd->supported |= SUPPORTED_FIBRE; + ecmd->advertising |= ADVERTISED_FIBRE; + ecmd->port = PORT_FIBRE; + break; + case ixgbe_sfp_type_not_present: + ecmd->supported |= SUPPORTED_FIBRE; + ecmd->advertising |= ADVERTISED_FIBRE; + ecmd->port = PORT_NONE; + break; + case ixgbe_sfp_type_1g_cu_core0: + case ixgbe_sfp_type_1g_cu_core1: + ecmd->supported |= SUPPORTED_TP; + ecmd->advertising |= ADVERTISED_TP; + ecmd->port = PORT_TP; + break; + case ixgbe_sfp_type_unknown: + default: + ecmd->supported |= SUPPORTED_FIBRE; + ecmd->advertising |= ADVERTISED_FIBRE; + ecmd->port = PORT_OTHER; + break; + } + break; + case ixgbe_phy_xaui: + ecmd->supported |= SUPPORTED_FIBRE; + ecmd->advertising |= ADVERTISED_FIBRE; + ecmd->port = PORT_NONE; + break; + case ixgbe_phy_unknown: + case ixgbe_phy_generic: + case ixgbe_phy_sfp_unsupported: + default: + ecmd->supported |= SUPPORTED_FIBRE; + ecmd->advertising |= ADVERTISED_FIBRE; + ecmd->port = PORT_OTHER; + break; + } + + /* Indicate pause support */ + ecmd->supported |= SUPPORTED_Pause; + + switch (hw->fc.requested_mode) { + case ixgbe_fc_full: + ecmd->advertising |= ADVERTISED_Pause; + break; + case ixgbe_fc_rx_pause: + ecmd->advertising |= ADVERTISED_Pause | + ADVERTISED_Asym_Pause; + break; + case ixgbe_fc_tx_pause: + ecmd->advertising |= ADVERTISED_Asym_Pause; + break; + default: + ecmd->advertising &= ~(ADVERTISED_Pause | + ADVERTISED_Asym_Pause); + } + + if (netif_carrier_ok(netdev)) { + switch (adapter->link_speed) { + case IXGBE_LINK_SPEED_10GB_FULL: + ethtool_cmd_speed_set(ecmd, SPEED_10000); + break; + case IXGBE_LINK_SPEED_5GB_FULL: + ethtool_cmd_speed_set(ecmd, SPEED_5000); + break; +#ifdef SUPPORTED_2500baseX_Full + case IXGBE_LINK_SPEED_2_5GB_FULL: + ethtool_cmd_speed_set(ecmd, SPEED_2500); + break; +#endif /* SUPPORTED_2500baseX_Full */ + case IXGBE_LINK_SPEED_1GB_FULL: + ethtool_cmd_speed_set(ecmd, SPEED_1000); + break; + case IXGBE_LINK_SPEED_100_FULL: + ethtool_cmd_speed_set(ecmd, SPEED_100); + break; + case IXGBE_LINK_SPEED_10_FULL: + ethtool_cmd_speed_set(ecmd, SPEED_10); + break; + default: + break; + } + ecmd->duplex = DUPLEX_FULL; + } else { + ethtool_cmd_speed_set(ecmd, SPEED_UNKNOWN); + ecmd->duplex = DUPLEX_UNKNOWN; + } + + return 0; +} +#endif /* !ETHTOOL_GLINKSETTINGS */ + +#ifdef ETHTOOL_GLINKSETTINGS +/** + * ixgbe_set_link_ksettings - Set link settings for the network device + * @netdev: Network device structure + * @cmd: Pointer to ethtool_link_ksettings structure with desired link settings + * + * This function configures the link settings for the specified network device + * based on the provided `ethtool_link_ksettings` structure. It validates the + * requested settings, updates the advertised link speeds, and restarts + * auto-negotiation if necessary. The function supports both copper and + * multispeed fiber media types. + * + * Return: 0 on success, or a negative error code on failure. + */ +static int ixgbe_set_link_ksettings(struct net_device *netdev, + const struct ethtool_link_ksettings *cmd) +{ + struct ixgbe_adapter *adapter = netdev_priv(netdev); + struct ixgbe_hw *hw = &adapter->hw; + u32 advertised, old; + s32 err = 0; + + if (hw->phy.media_type == ixgbe_media_type_copper || + hw->phy.multispeed_fiber) { + /* + * this function does not support duplex forcing, but can + * limit the advertising of the adapter to the specified speed + */ + if (!bitmap_subset(cmd->link_modes.advertising, + cmd->link_modes.supported, + __ETHTOOL_LINK_MODE_MASK_NBITS)) + return -EINVAL; + + /* only allow one speed at a time if no autoneg */ + if (!cmd->base.autoneg && hw->phy.multispeed_fiber) { + if (ethtool_link_ksettings_test_link_mode + (cmd, advertising, 10000baseT_Full) && + ethtool_link_ksettings_test_link_mode + (cmd, advertising, 1000baseT_Full)) + return -EINVAL; + } + + old = hw->phy.autoneg_advertised; + advertised = 0; + if (ethtool_link_ksettings_test_link_mode(cmd, advertising, + 10000baseT_Full)) + advertised |= IXGBE_LINK_SPEED_10GB_FULL; +#ifdef HAVE_ETHTOOL_5G_BITS + if (ethtool_link_ksettings_test_link_mode(cmd, advertising, + 5000baseT_Full)) + advertised |= IXGBE_LINK_SPEED_5GB_FULL; +#endif +#ifdef HAVE_ETHTOOL_NEW_2500MB_BITS + if (ethtool_link_ksettings_test_link_mode(cmd, advertising, + 2500baseT_Full)) + advertised |= IXGBE_LINK_SPEED_2_5GB_FULL; +#endif + if (ethtool_link_ksettings_test_link_mode(cmd, advertising, + 1000baseT_Full)) + advertised |= IXGBE_LINK_SPEED_1GB_FULL; + if (ethtool_link_ksettings_test_link_mode(cmd, advertising, + 100baseT_Full)) + advertised |= IXGBE_LINK_SPEED_100_FULL; + if (ethtool_link_ksettings_test_link_mode(cmd, advertising, + 10baseT_Full)) + advertised |= IXGBE_LINK_SPEED_10_FULL; + + if (old == advertised) + return err; + /* this sets the link speed and restarts auto-neg */ + while (test_and_set_bit(__IXGBE_IN_SFP_INIT, adapter->state)) + usleep_range(1000, 2000); + + hw->mac.autotry_restart = true; + err = hw->mac.ops.setup_link(hw, advertised, true); + if (err) { + e_info(probe, "setup link failed with code %d\n", err); + hw->mac.ops.setup_link(hw, old, true); + } + clear_bit(__IXGBE_IN_SFP_INIT, adapter->state); + } else { + /* in this case we currently only support 10Gb/FULL */ + u32 speed = cmd->base.speed; + + if (cmd->base.autoneg == AUTONEG_ENABLE || + (!ethtool_link_ksettings_test_link_mode(cmd, advertising, + 10000baseT_Full)) || + (speed + cmd->base.duplex != SPEED_10000 + DUPLEX_FULL)) + return -EINVAL; + } + + return err; +} +#else +/** + * ixgbe_set_settings - Set link settings for the network device + * @netdev: Network device structure + * @ecmd: Pointer to ethtool_cmd structure with desired link settings + * + * This function configures the link settings for the specified network device + * based on the provided `ethtool_cmd` structure. It validates the requested + * settings, updates the advertised link speeds, and restarts auto-negotiation + * if necessary. The function supports both copper and multispeed fiber media + * types, but does not support duplex forcing. + * + * Return: 0 on success, or a negative error code on failure. + */ +static int ixgbe_set_settings(struct net_device *netdev, + struct ethtool_cmd *ecmd) +{ + struct ixgbe_adapter *adapter = netdev_priv(netdev); + struct ixgbe_hw *hw = &adapter->hw; + u32 advertised, old; + s32 err = 0; + + if ((hw->phy.media_type == ixgbe_media_type_copper) || + (hw->phy.multispeed_fiber)) { + /* + * this function does not support duplex forcing, but can + * limit the advertising of the adapter to the specified speed + */ + if (ecmd->advertising & ~ecmd->supported) + return -EINVAL; + + /* only allow one speed at a time if no autoneg */ + if (!ecmd->autoneg && hw->phy.multispeed_fiber) { + if (ecmd->advertising == + (ADVERTISED_10000baseT_Full | + ADVERTISED_1000baseT_Full)) + return -EINVAL; + } + + old = hw->phy.autoneg_advertised; + advertised = 0; + if (ecmd->advertising & ADVERTISED_10000baseT_Full) + advertised |= IXGBE_LINK_SPEED_10GB_FULL; + + if (ecmd->advertising & ADVERTISED_1000baseT_Full) + advertised |= IXGBE_LINK_SPEED_1GB_FULL; + + if (ecmd->advertising & ADVERTISED_100baseT_Full) + advertised |= IXGBE_LINK_SPEED_100_FULL; + + if (ecmd->advertising & ADVERTISED_10baseT_Full) + advertised |= IXGBE_LINK_SPEED_10_FULL; + + if (old == advertised) + return err; + /* this sets the link speed and restarts auto-neg */ + while (test_and_set_bit(__IXGBE_IN_SFP_INIT, adapter->state)) + usleep_range(1000, 2000); + + hw->mac.autotry_restart = true; + err = hw->mac.ops.setup_link(hw, advertised, true); + if (err) { + e_info(probe, "setup link failed with code %d\n", err); + hw->mac.ops.setup_link(hw, old, true); + } + clear_bit(__IXGBE_IN_SFP_INIT, adapter->state); + } + else { + /* in this case we currently only support 10Gb/FULL */ + u32 speed = ethtool_cmd_speed(ecmd); + + if ((ecmd->autoneg == AUTONEG_ENABLE) || + (ecmd->advertising != ADVERTISED_10000baseT_Full) || + (speed + ecmd->duplex != SPEED_10000 + DUPLEX_FULL)) + return -EINVAL; + } + + return err; +} +#endif /* !ETHTOOL_GLINKSETTINGS */ + +/** + * ixgbe_get_pauseparam - Retrieve pause parameters for the network device + * @netdev: Network device structure + * @pause: Pointer to ethtool_pauseparam structure to be filled with pause settings + * + * This function populates the `ethtool_pauseparam` structure with the current + * pause frame settings for the specified network device. It sets the receive + * and transmit pause parameters based on the device's current flow control mode + * and indicates whether autonegotiation of flow control is enabled. + */ +static void ixgbe_get_pauseparam(struct net_device *netdev, + struct ethtool_pauseparam *pause) +{ + struct ixgbe_adapter *adapter = netdev_priv(netdev); + struct ixgbe_hw *hw = &adapter->hw; + + pause->rx_pause = 0; + pause->tx_pause = 0; + + if (ixgbe_device_supports_autoneg_fc(hw) && + !hw->fc.disable_fc_autoneg) + pause->autoneg = 1; + else + pause->autoneg = 0; + + if (hw->fc.current_mode == ixgbe_fc_rx_pause) { + pause->rx_pause = 1; + } else if (hw->fc.current_mode == ixgbe_fc_tx_pause) { + pause->tx_pause = 1; + } else if (hw->fc.current_mode == ixgbe_fc_full) { + pause->rx_pause = 1; + pause->tx_pause = 1; + } +} + +/** + * ixgbe_set_pauseparam_E610 - Set pause parameters for E610 hardware + * @netdev: Network device structure + * @pause: Pointer to ethtool_pauseparam structure with desired pause settings + * + * This function configures the pause frame settings for E610 hardware based on + * the provided `ethtool_pauseparam` structure. It validates the settings, + * updates the flow control mode, and applies changes if necessary. The function + * does not support disabling autonegotiation for flow control. + * + * Return: 0 on success, or -EOPNOTSUPP if the configuration is not supported. + */ +static int ixgbe_set_pauseparam_E610(struct net_device *netdev, + struct ethtool_pauseparam *pause) +{ + struct ixgbe_adapter *adapter = + netdev_priv(netdev); + struct ixgbe_hw *hw = &adapter->hw; + struct ixgbe_fc_info fc = hw->fc; + + + if (pause->autoneg == AUTONEG_DISABLE) { + netdev_info(netdev, + "Cannot disable autonegotiation for this device.\n"); + return -EOPNOTSUPP; + } + + /* some devices do not support autoneg of flow control */ + if ((pause->autoneg == AUTONEG_ENABLE) && + !ixgbe_device_supports_autoneg_fc(hw)) + return -EOPNOTSUPP; + + fc.disable_fc_autoneg = (pause->autoneg != AUTONEG_ENABLE); + + if (pause->rx_pause && pause->tx_pause) + fc.requested_mode = ixgbe_fc_full; + else if (pause->rx_pause) + fc.requested_mode = ixgbe_fc_rx_pause; + else if (pause->tx_pause) + fc.requested_mode = ixgbe_fc_tx_pause; + else + fc.requested_mode = ixgbe_fc_none; + + /* if the thing changed then we'll update and use new autoneg */ + if (memcmp(&fc, &hw->fc, sizeof(struct ixgbe_fc_info))) { + hw->fc = fc; + if (netif_running(netdev)) + ixgbe_reinit_locked(adapter); + else + ixgbe_reset(adapter); + } + + return 0; +} + +/** + * ixgbe_set_pauseparam - Set pause frame parameters for the network device + * @netdev: Network device structure + * @pause: Pointer to ethtool_pauseparam structure with desired pause settings + * + * This function configures the pause frame settings for the specified network + * device based on the provided `ethtool_pauseparam` structure. It validates + * the settings, updates the flow control mode, and applies changes if necessary. + * The function does not support enabling autonegotiation of flow control on + * certain devices or when DCB is enabled on 82598 hardware. + * + * Return: 0 on success, or -EINVAL if the configuration is not supported. + */ +static int ixgbe_set_pauseparam(struct net_device *netdev, + struct ethtool_pauseparam *pause) +{ + struct ixgbe_adapter *adapter = netdev_priv(netdev); + struct ixgbe_hw *hw = &adapter->hw; + struct ixgbe_fc_info fc = hw->fc; + + /* 82598 does no support link flow control with DCB enabled */ + if ((hw->mac.type == ixgbe_mac_82598EB) && + (adapter->flags & IXGBE_FLAG_DCB_ENABLED)) + return -EINVAL; + + /* some devices do not support autoneg of flow control */ + if ((pause->autoneg == AUTONEG_ENABLE) && + !ixgbe_device_supports_autoneg_fc(hw)) + return -EINVAL; + + fc.disable_fc_autoneg = (pause->autoneg != AUTONEG_ENABLE); + + if ((pause->rx_pause && pause->tx_pause) || pause->autoneg) + fc.requested_mode = ixgbe_fc_full; + else if (pause->rx_pause) + fc.requested_mode = ixgbe_fc_rx_pause; + else if (pause->tx_pause) + fc.requested_mode = ixgbe_fc_tx_pause; + else + fc.requested_mode = ixgbe_fc_none; + + /* if the thing changed then we'll update and use new autoneg */ + if (memcmp(&fc, &hw->fc, sizeof(struct ixgbe_fc_info))) { + hw->fc = fc; + if (netif_running(netdev)) + ixgbe_reinit_locked(adapter); + else + ixgbe_reset(adapter); + } + + return 0; +} + +/** + * ixgbe_get_msglevel - Retrieve the message level for the network device + * @netdev: Network device structure + * + * This function returns the current message level for the specified network + * device, which controls the verbosity of the driver's logging output. + * + * Return: The current message level. + */ +static u32 ixgbe_get_msglevel(struct net_device *netdev) +{ + struct ixgbe_adapter *adapter = netdev_priv(netdev); + return adapter->msg_enable; +} + +/** + * ixgbe_set_msglevel - Set the message level for the network device + * @netdev: Network device structure + * @data: New message level to be set + * + * This function sets the message level for the specified network device, + * which controls the verbosity of the driver's logging output. + */ +static void ixgbe_set_msglevel(struct net_device *netdev, u32 data) +{ + struct ixgbe_adapter *adapter = netdev_priv(netdev); + adapter->msg_enable = data; +} + +/** + * ixgbe_get_regs_len - Get the length of the hardware registers data + * @netdev: Network device structure (unused) + * + * This function returns the total length, in bytes, of the hardware registers + * data for the network device. The length is defined by the constant + * `IXGBE_REGS_LEN` multiplied by the size of a 32-bit integer. + * + * Return: The length of the hardware registers data in bytes. + */ +static int ixgbe_get_regs_len(struct net_device __always_unused *netdev) +{ +#define IXGBE_REGS_LEN 1145 + return IXGBE_REGS_LEN * sizeof(u32); +} + +#define IXGBE_GET_STAT(_A_, _R_) (_A_->stats._R_) + +/** + * ixgbe_get_regs - Retrieve hardware registers for the network device + * @netdev: Network device structure + * @regs: Pointer to ethtool_regs structure to be filled with register info + * @p: Buffer to store the retrieved register values + * + * This function populates the provided buffer with the current values of + * various hardware registers for the specified network device. It organizes + * the registers into categories such as general, NVM, interrupt, flow control, + * and more, and fills the `ethtool_regs` structure with version information. + */ +static void ixgbe_get_regs(struct net_device *netdev, struct ethtool_regs *regs, + void *p) +{ + struct ixgbe_adapter *adapter = netdev_priv(netdev); + struct ixgbe_hw *hw = &adapter->hw; + u32 *regs_buff = p; + u8 i; + + memset(p, 0, IXGBE_REGS_LEN * sizeof(u32)); + + regs->version = hw->mac.type << 24 | hw->revision_id << 16 | + hw->device_id; + + /* General Registers */ + regs_buff[0] = IXGBE_R32_Q(hw, IXGBE_CTRL); + regs_buff[1] = IXGBE_R32_Q(hw, IXGBE_STATUS); + regs_buff[2] = IXGBE_R32_Q(hw, IXGBE_CTRL_EXT); + regs_buff[3] = IXGBE_R32_Q(hw, IXGBE_ESDP); + regs_buff[4] = IXGBE_R32_Q(hw, IXGBE_EODSDP); + regs_buff[5] = IXGBE_R32_Q(hw, IXGBE_LEDCTL); + regs_buff[6] = IXGBE_R32_Q(hw, IXGBE_FRTIMER); + regs_buff[7] = IXGBE_R32_Q(hw, IXGBE_TCPTIMER); + + /* NVM Register */ + regs_buff[8] = IXGBE_R32_Q(hw, IXGBE_EEC); + regs_buff[9] = IXGBE_R32_Q(hw, IXGBE_EERD); + regs_buff[10] = IXGBE_R32_Q(hw, IXGBE_FLA); + regs_buff[11] = IXGBE_R32_Q(hw, IXGBE_EEMNGCTL); + regs_buff[12] = IXGBE_R32_Q(hw, IXGBE_EEMNGDATA); + regs_buff[13] = IXGBE_R32_Q(hw, IXGBE_FLMNGCTL); + regs_buff[14] = IXGBE_R32_Q(hw, IXGBE_FLMNGDATA); + regs_buff[15] = IXGBE_R32_Q(hw, IXGBE_FLMNGCNT); + regs_buff[16] = IXGBE_R32_Q(hw, IXGBE_FLOP); + regs_buff[17] = IXGBE_R32_Q(hw, IXGBE_GRC); + + /* Interrupt */ + /* don't read EICR because it can clear interrupt causes, instead + * read EICS which is a shadow but doesn't clear EICR */ + regs_buff[18] = IXGBE_R32_Q(hw, IXGBE_EICS); + regs_buff[19] = IXGBE_R32_Q(hw, IXGBE_EICS); + regs_buff[20] = IXGBE_R32_Q(hw, IXGBE_EIMS); + regs_buff[21] = IXGBE_R32_Q(hw, IXGBE_EIMC); + regs_buff[22] = IXGBE_R32_Q(hw, IXGBE_EIAC); + regs_buff[23] = IXGBE_R32_Q(hw, IXGBE_EIAM); + regs_buff[24] = IXGBE_R32_Q(hw, IXGBE_EITR(0)); + regs_buff[25] = IXGBE_R32_Q(hw, IXGBE_IVAR(0)); + regs_buff[26] = IXGBE_R32_Q(hw, IXGBE_MSIXT); + regs_buff[27] = IXGBE_R32_Q(hw, IXGBE_MSIXPBA); + regs_buff[28] = IXGBE_R32_Q(hw, IXGBE_PBACL(0)); + regs_buff[29] = IXGBE_R32_Q(hw, IXGBE_GPIE); + + /* Flow Control */ + regs_buff[30] = IXGBE_R32_Q(hw, IXGBE_PFCTOP); + regs_buff[31] = IXGBE_R32_Q(hw, IXGBE_FCTTV(0)); + regs_buff[32] = IXGBE_R32_Q(hw, IXGBE_FCTTV(1)); + regs_buff[33] = IXGBE_R32_Q(hw, IXGBE_FCTTV(2)); + regs_buff[34] = IXGBE_R32_Q(hw, IXGBE_FCTTV(3)); + for (i = 0; i < 8; i++) { + switch (hw->mac.type) { + case ixgbe_mac_82598EB: + regs_buff[35 + i] = IXGBE_R32_Q(hw, IXGBE_FCRTL(i)); + regs_buff[43 + i] = IXGBE_R32_Q(hw, IXGBE_FCRTH(i)); + break; + case ixgbe_mac_82599EB: + case ixgbe_mac_X540: + case ixgbe_mac_X550: + case ixgbe_mac_X550EM_x: + case ixgbe_mac_E610: + regs_buff[35 + i] = IXGBE_R32_Q(hw, + IXGBE_FCRTL_82599(i)); + regs_buff[43 + i] = IXGBE_R32_Q(hw, + IXGBE_FCRTH_82599(i)); + break; + default: + break; + } + } + regs_buff[51] = IXGBE_R32_Q(hw, IXGBE_FCRTV); + regs_buff[52] = IXGBE_R32_Q(hw, IXGBE_TFCS); + + /* Receive DMA */ + for (i = 0; i < 64; i++) + regs_buff[53 + i] = IXGBE_R32_Q(hw, IXGBE_RDBAL(i)); + for (i = 0; i < 64; i++) + regs_buff[117 + i] = IXGBE_R32_Q(hw, IXGBE_RDBAH(i)); + for (i = 0; i < 64; i++) + regs_buff[181 + i] = IXGBE_R32_Q(hw, IXGBE_RDLEN(i)); + for (i = 0; i < 64; i++) + regs_buff[245 + i] = IXGBE_R32_Q(hw, IXGBE_RDH(i)); + for (i = 0; i < 64; i++) + regs_buff[309 + i] = IXGBE_R32_Q(hw, IXGBE_RDT(i)); + for (i = 0; i < 64; i++) + regs_buff[373 + i] = IXGBE_R32_Q(hw, IXGBE_RXDCTL(i)); + for (i = 0; i < 16; i++) + regs_buff[437 + i] = IXGBE_R32_Q(hw, IXGBE_SRRCTL(i)); + for (i = 0; i < 16; i++) + regs_buff[453 + i] = IXGBE_R32_Q(hw, IXGBE_DCA_RXCTRL(i)); + regs_buff[469] = IXGBE_R32_Q(hw, IXGBE_RDRXCTL); + for (i = 0; i < 8; i++) + regs_buff[470 + i] = IXGBE_R32_Q(hw, IXGBE_RXPBSIZE(i)); + regs_buff[478] = IXGBE_R32_Q(hw, IXGBE_RXCTRL); + regs_buff[479] = IXGBE_R32_Q(hw, IXGBE_DROPEN); + + /* Receive */ + regs_buff[480] = IXGBE_R32_Q(hw, IXGBE_RXCSUM); + regs_buff[481] = IXGBE_R32_Q(hw, IXGBE_RFCTL); + for (i = 0; i < 16; i++) + regs_buff[482 + i] = IXGBE_R32_Q(hw, IXGBE_RAL(i)); + for (i = 0; i < 16; i++) + regs_buff[498 + i] = IXGBE_R32_Q(hw, IXGBE_RAH(i)); + regs_buff[514] = IXGBE_R32_Q(hw, IXGBE_PSRTYPE(0)); + regs_buff[515] = IXGBE_R32_Q(hw, IXGBE_FCTRL); + regs_buff[516] = IXGBE_R32_Q(hw, IXGBE_VLNCTRL); + regs_buff[517] = IXGBE_R32_Q(hw, IXGBE_MCSTCTRL); + regs_buff[518] = IXGBE_R32_Q(hw, IXGBE_MRQC); + regs_buff[519] = IXGBE_R32_Q(hw, IXGBE_VMD_CTL); + for (i = 0; i < 8; i++) + regs_buff[520 + i] = IXGBE_R32_Q(hw, IXGBE_IMIR(i)); + for (i = 0; i < 8; i++) + regs_buff[528 + i] = IXGBE_R32_Q(hw, IXGBE_IMIREXT(i)); + regs_buff[536] = IXGBE_R32_Q(hw, IXGBE_IMIRVP); + + /* Transmit */ + for (i = 0; i < 32; i++) + regs_buff[537 + i] = IXGBE_R32_Q(hw, IXGBE_TDBAL(i)); + for (i = 0; i < 32; i++) + regs_buff[569 + i] = IXGBE_R32_Q(hw, IXGBE_TDBAH(i)); + for (i = 0; i < 32; i++) + regs_buff[601 + i] = IXGBE_R32_Q(hw, IXGBE_TDLEN(i)); + for (i = 0; i < 32; i++) + regs_buff[633 + i] = IXGBE_R32_Q(hw, IXGBE_TDH(i)); + for (i = 0; i < 32; i++) + regs_buff[665 + i] = IXGBE_R32_Q(hw, IXGBE_TDT(i)); + for (i = 0; i < 32; i++) + regs_buff[697 + i] = IXGBE_R32_Q(hw, IXGBE_TXDCTL(i)); + for (i = 0; i < 32; i++) + regs_buff[729 + i] = IXGBE_R32_Q(hw, IXGBE_TDWBAL(i)); + for (i = 0; i < 32; i++) + regs_buff[761 + i] = IXGBE_R32_Q(hw, IXGBE_TDWBAH(i)); + regs_buff[793] = IXGBE_R32_Q(hw, IXGBE_DTXCTL); + for (i = 0; i < 16; i++) + regs_buff[794 + i] = IXGBE_R32_Q(hw, IXGBE_DCA_TXCTRL(i)); + regs_buff[810] = IXGBE_R32_Q(hw, IXGBE_TIPG); + for (i = 0; i < 8; i++) + regs_buff[811 + i] = IXGBE_R32_Q(hw, IXGBE_TXPBSIZE(i)); + regs_buff[819] = IXGBE_R32_Q(hw, IXGBE_MNGTXMAP); + + /* Wake Up */ + regs_buff[820] = IXGBE_R32_Q(hw, IXGBE_WUC); + regs_buff[821] = IXGBE_R32_Q(hw, IXGBE_WUFC); + regs_buff[822] = IXGBE_R32_Q(hw, IXGBE_WUS); + regs_buff[823] = IXGBE_R32_Q(hw, IXGBE_IPAV); + regs_buff[824] = IXGBE_R32_Q(hw, IXGBE_IP4AT); + regs_buff[825] = IXGBE_R32_Q(hw, IXGBE_IP6AT); + regs_buff[826] = IXGBE_R32_Q(hw, IXGBE_WUPL); + regs_buff[827] = IXGBE_R32_Q(hw, IXGBE_WUPM); + regs_buff[828] = IXGBE_R32_Q(hw, IXGBE_FHFT(0)); + + /* DCB */ + regs_buff[829] = IXGBE_R32_Q(hw, IXGBE_RMCS); /* same as FCCFG */ + regs_buff[831] = IXGBE_R32_Q(hw, IXGBE_PDPMCS); /* same as RTTPCS */ + + switch (hw->mac.type) { + case ixgbe_mac_82598EB: + regs_buff[830] = IXGBE_R32_Q(hw, IXGBE_DPMCS); + regs_buff[832] = IXGBE_R32_Q(hw, IXGBE_RUPPBMR); + for (i = 0; i < 8; i++) + regs_buff[833 + i] = + IXGBE_R32_Q(hw, IXGBE_RT2CR(i)); + for (i = 0; i < 8; i++) + regs_buff[841 + i] = + IXGBE_R32_Q(hw, IXGBE_RT2SR(i)); + for (i = 0; i < 8; i++) + regs_buff[849 + i] = + IXGBE_R32_Q(hw, IXGBE_TDTQ2TCCR(i)); + for (i = 0; i < 8; i++) + regs_buff[857 + i] = + IXGBE_R32_Q(hw, IXGBE_TDTQ2TCSR(i)); + break; + case ixgbe_mac_82599EB: + case ixgbe_mac_X540: + regs_buff[830] = IXGBE_R32_Q(hw, IXGBE_RTTDCS); + regs_buff[832] = IXGBE_R32_Q(hw, IXGBE_RTRPCS); + for (i = 0; i < 8; i++) + regs_buff[833 + i] = + IXGBE_R32_Q(hw, IXGBE_RTRPT4C(i)); + for (i = 0; i < 8; i++) + regs_buff[841 + i] = + IXGBE_R32_Q(hw, IXGBE_RTRPT4S(i)); + for (i = 0; i < 8; i++) + regs_buff[849 + i] = + IXGBE_R32_Q(hw, IXGBE_RTTDT2C(i)); + for (i = 0; i < 8; i++) + regs_buff[857 + i] = + IXGBE_R32_Q(hw, IXGBE_RTTDT2S(i)); + break; + default: + break; + } + + for (i = 0; i < 8; i++) + regs_buff[865 + i] = + IXGBE_R32_Q(hw, IXGBE_TDPT2TCCR(i)); /* same as RTTPT2C */ + for (i = 0; i < 8; i++) + regs_buff[873 + i] = + IXGBE_R32_Q(hw, IXGBE_TDPT2TCSR(i)); /* same as RTTPT2S */ + + /* Statistics */ + regs_buff[881] = IXGBE_GET_STAT(adapter, crcerrs); + regs_buff[882] = IXGBE_GET_STAT(adapter, illerrc); + regs_buff[883] = IXGBE_GET_STAT(adapter, errbc); + regs_buff[884] = IXGBE_GET_STAT(adapter, mspdc); + for (i = 0; i < 8; i++) + regs_buff[885 + i] = IXGBE_GET_STAT(adapter, mpc[i]); + regs_buff[893] = IXGBE_GET_STAT(adapter, mlfc); + regs_buff[894] = IXGBE_GET_STAT(adapter, mrfc); + regs_buff[895] = IXGBE_GET_STAT(adapter, rlec); + regs_buff[896] = IXGBE_GET_STAT(adapter, lxontxc); + regs_buff[897] = IXGBE_GET_STAT(adapter, lxonrxc); + regs_buff[898] = IXGBE_GET_STAT(adapter, lxofftxc); + regs_buff[899] = IXGBE_GET_STAT(adapter, lxoffrxc); + for (i = 0; i < 8; i++) + regs_buff[900 + i] = IXGBE_GET_STAT(adapter, pxontxc[i]); + for (i = 0; i < 8; i++) + regs_buff[908 + i] = IXGBE_GET_STAT(adapter, pxonrxc[i]); + for (i = 0; i < 8; i++) + regs_buff[916 + i] = IXGBE_GET_STAT(adapter, pxofftxc[i]); + for (i = 0; i < 8; i++) + regs_buff[924 + i] = IXGBE_GET_STAT(adapter, pxoffrxc[i]); + regs_buff[932] = IXGBE_GET_STAT(adapter, prc64); + regs_buff[933] = IXGBE_GET_STAT(adapter, prc127); + regs_buff[934] = IXGBE_GET_STAT(adapter, prc255); + regs_buff[935] = IXGBE_GET_STAT(adapter, prc511); + regs_buff[936] = IXGBE_GET_STAT(adapter, prc1023); + regs_buff[937] = IXGBE_GET_STAT(adapter, prc1522); + regs_buff[938] = IXGBE_GET_STAT(adapter, gprc); + regs_buff[939] = IXGBE_GET_STAT(adapter, bprc); + regs_buff[940] = IXGBE_GET_STAT(adapter, mprc); + regs_buff[941] = IXGBE_GET_STAT(adapter, gptc); + regs_buff[942] = IXGBE_GET_STAT(adapter, gorc); + regs_buff[944] = IXGBE_GET_STAT(adapter, gotc); + for (i = 0; i < 8; i++) + regs_buff[946 + i] = IXGBE_GET_STAT(adapter, rnbc[i]); + regs_buff[954] = IXGBE_GET_STAT(adapter, ruc); + regs_buff[955] = IXGBE_GET_STAT(adapter, rfc); + regs_buff[956] = IXGBE_GET_STAT(adapter, roc); + regs_buff[957] = IXGBE_GET_STAT(adapter, rjc); + regs_buff[958] = IXGBE_GET_STAT(adapter, mngprc); + regs_buff[959] = IXGBE_GET_STAT(adapter, mngpdc); + regs_buff[960] = IXGBE_GET_STAT(adapter, mngptc); + regs_buff[961] = IXGBE_GET_STAT(adapter, tor); + regs_buff[963] = IXGBE_GET_STAT(adapter, tpr); + regs_buff[964] = IXGBE_GET_STAT(adapter, tpt); + regs_buff[965] = IXGBE_GET_STAT(adapter, ptc64); + regs_buff[966] = IXGBE_GET_STAT(adapter, ptc127); + regs_buff[967] = IXGBE_GET_STAT(adapter, ptc255); + regs_buff[968] = IXGBE_GET_STAT(adapter, ptc511); + regs_buff[969] = IXGBE_GET_STAT(adapter, ptc1023); + regs_buff[970] = IXGBE_GET_STAT(adapter, ptc1522); + regs_buff[971] = IXGBE_GET_STAT(adapter, mptc); + regs_buff[972] = IXGBE_GET_STAT(adapter, bptc); + regs_buff[973] = IXGBE_GET_STAT(adapter, xec); + for (i = 0; i < 16; i++) + regs_buff[974 + i] = IXGBE_GET_STAT(adapter, qprc[i]); + for (i = 0; i < 16; i++) + regs_buff[990 + i] = IXGBE_GET_STAT(adapter, qptc[i]); + for (i = 0; i < 16; i++) + regs_buff[1006 + i] = IXGBE_GET_STAT(adapter, qbrc[i]); + for (i = 0; i < 16; i++) + regs_buff[1022 + i] = IXGBE_GET_STAT(adapter, qbtc[i]); + + /* MAC */ + regs_buff[1038] = IXGBE_R32_Q(hw, IXGBE_PCS1GCFIG); + regs_buff[1039] = IXGBE_R32_Q(hw, IXGBE_PCS1GLCTL); + regs_buff[1040] = IXGBE_R32_Q(hw, IXGBE_PCS1GLSTA); + regs_buff[1041] = IXGBE_R32_Q(hw, IXGBE_PCS1GDBG0); + regs_buff[1042] = IXGBE_R32_Q(hw, IXGBE_PCS1GDBG1); + regs_buff[1043] = IXGBE_R32_Q(hw, IXGBE_PCS1GANA); + regs_buff[1044] = IXGBE_R32_Q(hw, IXGBE_PCS1GANLP); + regs_buff[1045] = IXGBE_R32_Q(hw, IXGBE_PCS1GANNP); + regs_buff[1046] = IXGBE_R32_Q(hw, IXGBE_PCS1GANLPNP); + regs_buff[1047] = IXGBE_R32_Q(hw, IXGBE_HLREG0); + regs_buff[1048] = IXGBE_R32_Q(hw, IXGBE_HLREG1); + regs_buff[1049] = IXGBE_R32_Q(hw, IXGBE_PAP); + regs_buff[1050] = IXGBE_R32_Q(hw, IXGBE_MACA); + regs_buff[1051] = IXGBE_R32_Q(hw, IXGBE_APAE); + regs_buff[1052] = IXGBE_R32_Q(hw, IXGBE_ARD); + regs_buff[1053] = IXGBE_R32_Q(hw, IXGBE_AIS); + regs_buff[1054] = IXGBE_R32_Q(hw, IXGBE_MSCA); + regs_buff[1055] = IXGBE_R32_Q(hw, IXGBE_MSRWD); + regs_buff[1056] = IXGBE_R32_Q(hw, IXGBE_MLADD); + regs_buff[1057] = IXGBE_R32_Q(hw, IXGBE_MHADD); + regs_buff[1058] = IXGBE_R32_Q(hw, IXGBE_TREG); + regs_buff[1059] = IXGBE_R32_Q(hw, IXGBE_PCSS1); + regs_buff[1060] = IXGBE_R32_Q(hw, IXGBE_PCSS2); + regs_buff[1061] = IXGBE_R32_Q(hw, IXGBE_XPCSS); + regs_buff[1062] = IXGBE_R32_Q(hw, IXGBE_SERDESC); + regs_buff[1063] = IXGBE_R32_Q(hw, IXGBE_MACS); + regs_buff[1064] = IXGBE_R32_Q(hw, IXGBE_AUTOC); + regs_buff[1065] = IXGBE_R32_Q(hw, IXGBE_LINKS); + regs_buff[1066] = IXGBE_R32_Q(hw, IXGBE_AUTOC2); + regs_buff[1067] = IXGBE_R32_Q(hw, IXGBE_AUTOC3); + regs_buff[1068] = IXGBE_R32_Q(hw, IXGBE_ANLP1); + regs_buff[1069] = IXGBE_R32_Q(hw, IXGBE_ANLP2); + regs_buff[1070] = IXGBE_R32_Q(hw, IXGBE_ATLASCTL); + + /* Diagnostic */ + regs_buff[1071] = IXGBE_R32_Q(hw, IXGBE_RDSTATCTL); + for (i = 0; i < 8; i++) + regs_buff[1072 + i] = IXGBE_R32_Q(hw, IXGBE_RDSTAT(i)); + regs_buff[1080] = IXGBE_R32_Q(hw, IXGBE_RDHMPN); + for (i = 0; i < 4; i++) + regs_buff[1081 + i] = IXGBE_R32_Q(hw, IXGBE_RIC_DW(i)); + regs_buff[1085] = IXGBE_R32_Q(hw, IXGBE_RDPROBE); + regs_buff[1095] = IXGBE_R32_Q(hw, IXGBE_TDHMPN); + for (i = 0; i < 4; i++) + regs_buff[1096 + i] = IXGBE_R32_Q(hw, IXGBE_TIC_DW(i)); + regs_buff[1100] = IXGBE_R32_Q(hw, IXGBE_TDPROBE); + regs_buff[1101] = IXGBE_R32_Q(hw, IXGBE_TXBUFCTRL); + regs_buff[1102] = IXGBE_R32_Q(hw, IXGBE_TXBUFDATA0); + regs_buff[1103] = IXGBE_R32_Q(hw, IXGBE_TXBUFDATA1); + regs_buff[1104] = IXGBE_R32_Q(hw, IXGBE_TXBUFDATA2); + regs_buff[1105] = IXGBE_R32_Q(hw, IXGBE_TXBUFDATA3); + regs_buff[1106] = IXGBE_R32_Q(hw, IXGBE_RXBUFCTRL); + regs_buff[1107] = IXGBE_R32_Q(hw, IXGBE_RXBUFDATA0); + regs_buff[1108] = IXGBE_R32_Q(hw, IXGBE_RXBUFDATA1); + regs_buff[1109] = IXGBE_R32_Q(hw, IXGBE_RXBUFDATA2); + regs_buff[1110] = IXGBE_R32_Q(hw, IXGBE_RXBUFDATA3); + for (i = 0; i < 8; i++) + regs_buff[1111 + i] = IXGBE_R32_Q(hw, IXGBE_PCIE_DIAG(i)); + regs_buff[1119] = IXGBE_R32_Q(hw, IXGBE_RFVAL); + regs_buff[1120] = IXGBE_R32_Q(hw, IXGBE_MDFTC1); + regs_buff[1121] = IXGBE_R32_Q(hw, IXGBE_MDFTC2); + regs_buff[1122] = IXGBE_R32_Q(hw, IXGBE_MDFTFIFO1); + regs_buff[1123] = IXGBE_R32_Q(hw, IXGBE_MDFTFIFO2); + regs_buff[1124] = IXGBE_R32_Q(hw, IXGBE_MDFTS); + regs_buff[1125] = IXGBE_R32_Q(hw, IXGBE_PCIEECCCTL); + regs_buff[1126] = IXGBE_R32_Q(hw, IXGBE_PBTXECC); + regs_buff[1127] = IXGBE_R32_Q(hw, IXGBE_PBRXECC); + + /* 82599 X540 specific registers */ + regs_buff[1128] = IXGBE_R32_Q(hw, IXGBE_MFLCN); + + /* 82599 X540 specific DCB registers */ + regs_buff[1129] = IXGBE_R32_Q(hw, IXGBE_RTRUP2TC); + regs_buff[1130] = IXGBE_R32_Q(hw, IXGBE_RTTUP2TC); + for (i = 0; i < 4; i++) + regs_buff[1131 + i] = IXGBE_R32_Q(hw, IXGBE_TXLLQ(i)); + regs_buff[1135] = IXGBE_R32_Q(hw, IXGBE_RTTBCNRM); + /* same as RTTQCNRM */ + regs_buff[1136] = IXGBE_R32_Q(hw, IXGBE_RTTBCNRD); + /* same as RTTQCNRR */ + + /* X540 specific DCB registers */ + regs_buff[1137] = IXGBE_R32_Q(hw, IXGBE_RTTQCNCR); + regs_buff[1138] = IXGBE_R32_Q(hw, IXGBE_RTTQCNTG); + + /* Security config registers */ + regs_buff[1139] = IXGBE_R32_Q(hw, IXGBE_SECTXCTRL); + regs_buff[1140] = IXGBE_R32_Q(hw, IXGBE_SECTXSTAT); + regs_buff[1141] = IXGBE_R32_Q(hw, IXGBE_SECTXBUFFAF); + regs_buff[1142] = IXGBE_R32_Q(hw, IXGBE_SECTXMINIFG); + regs_buff[1143] = IXGBE_R32_Q(hw, IXGBE_SECRXCTRL); + regs_buff[1144] = IXGBE_R32_Q(hw, IXGBE_SECRXSTAT); + +} + +/** + * ixgbe_get_eeprom_len_E610 - Get EEPROM length for E610 hardware + * @netdev: Network device structure + * + * This function returns the length of the EEPROM for E610 hardware by + * calculating the total size in bytes based on the word size. + * + * Return: The EEPROM length in bytes. + */ +static int ixgbe_get_eeprom_len_E610(struct net_device *netdev) +{ + struct ixgbe_adapter *adapter = + netdev_priv(netdev); + + return adapter->hw.eeprom.word_size * 2; +} + +/** + * ixgbe_get_eeprom_len - Get EEPROM length for the network device + * @netdev: Network device structure + * + * This function returns the length of the EEPROM for the specified network + * device. If `IXGBE_NVMUPD_SUPPORT` is defined, it returns the length of the + * PCI resource. Otherwise, it calculates the EEPROM size in bytes based on + * the word size. + * + * Return: The EEPROM length in bytes. + */ +static int ixgbe_get_eeprom_len(struct net_device *netdev) +{ + struct ixgbe_adapter *adapter = netdev_priv(netdev); + + return pci_resource_len(adapter->pdev, 0); +} + +static u8 ixgbe_nvmupd_get_module(u32 val) +{ + return (u8)(val & IXGBE_NVMUPD_MOD_PNT_MASK); +} + +static int ixgbe_nvmupd_validate_offset(struct ixgbe_adapter *adapter, + u32 offset) +{ + struct net_device *netdev = adapter->netdev; + + switch (offset) { + case IXGBE_STATUS: + case IXGBE_ESDP: + case IXGBE_MSCA: + case IXGBE_MSRWD: + case IXGBE_EEC: + case IXGBE_FLA: + case IXGBE_FLOP: + case IXGBE_SWSM: + case IXGBE_FWSM: + case IXGBE_FACTPS: + case IXGBE_GSSR: + case IXGBE_HICR: + case IXGBE_FWSTS: + return 0; + default: + if ((offset >= IXGBE_MAVTV(0) && offset <= IXGBE_MAVTV(7)) || + (offset >= IXGBE_RAL(0) && offset <= IXGBE_RAH(15))) + return 0; + } + + switch (adapter->hw.mac.type) { + case ixgbe_mac_82599EB: + switch (offset) { + case IXGBE_AUTOC: + case IXGBE_EERD: + case IXGBE_BARCTRL: + return 0; + default: + if (offset >= 0x00020000 && + offset <= ixgbe_get_eeprom_len(netdev)) + return 0; + } + break; + case ixgbe_mac_X540: + switch (offset) { + case IXGBE_EERD: + case IXGBE_EEWR: + case IXGBE_SRAMREL: + case IXGBE_BARCTRL: + return 0; + default: + if ((offset >= 0x00020000 && + offset <= ixgbe_get_eeprom_len(netdev))) + return 0; + } + break; + case ixgbe_mac_X550: + fallthrough; + case ixgbe_mac_E610: + switch (offset) { + case IXGBE_EEWR: + case IXGBE_SRAMREL: + case IXGBE_PHYCTL_82599: + case IXGBE_FWRESETCNT: + return 0; + default: + if (offset >= IXGBE_FLEX_MNG_PTR(0) && + offset <= IXGBE_FLEX_MNG_PTR(447)) + return 0; + } + break; + case ixgbe_mac_X550EM_x: + switch (offset) { + case IXGBE_PHYCTL_82599: + case IXGBE_NW_MNG_IF_SEL: + case IXGBE_FWRESETCNT: + case IXGBE_I2CCTL_X550: + return 0; + default: + if ((offset >= IXGBE_FLEX_MNG_PTR(0) && + offset <= IXGBE_FLEX_MNG_PTR(447)) || + (offset >= IXGBE_FUSES0_GROUP(0) && + offset <= IXGBE_FUSES0_GROUP(7))) + return 0; + } + break; + case ixgbe_mac_X550EM_a: + switch (offset) { + case IXGBE_PHYCTL_82599: + case IXGBE_NW_MNG_IF_SEL: + case IXGBE_FWRESETCNT: + case IXGBE_I2CCTL_X550: + case IXGBE_FLA_X550EM_a: + case IXGBE_SWSM_X550EM_a: + case IXGBE_FWSM_X550EM_a: + case IXGBE_SWFW_SYNC_X550EM_a: + case IXGBE_FACTPS_X550EM_a: + case IXGBE_EEC_X550EM_a: + return 0; + default: + if (offset >= IXGBE_FLEX_MNG_PTR(0) && + offset <= IXGBE_FLEX_MNG_PTR(447)) + return 0; + } + default: + break; + } + + return -ENOTTY; +} + +static int ixgbe_nvmupd_command(struct ixgbe_hw *hw, + struct ixgbe_nvm_access *nvm, + u8 *bytes) +{ + u32 command; + int ret_val = 0; + u8 module; + + command = nvm->command; + module = ixgbe_nvmupd_get_module(nvm->config); + + switch (command) { + case IXGBE_NVMUPD_CMD_REG_READ: + switch (module) { + case IXGBE_NVMUPD_EXEC_FEATURES: + if (nvm->data_size == hw->nvmupd_features.size) + memcpy(bytes, &hw->nvmupd_features, + hw->nvmupd_features.size); + else + ret_val = -ENOMEM; + break; + default: + if (ixgbe_nvmupd_validate_offset(hw->back, nvm->offset)) + return -ENOTTY; + + if (nvm->data_size == 1) + *((u8 *)bytes) = IXGBE_R8_Q(hw, nvm->offset); + else + *((u32 *)bytes) = IXGBE_R32_Q(hw, nvm->offset); + break; + } + break; + case IXGBE_NVMUPD_CMD_REG_WRITE: + if (ixgbe_nvmupd_validate_offset(hw->back, nvm->offset)) + return -ENOTTY; + + IXGBE_WRITE_REG(hw, nvm->offset, *((u32 *)bytes)); + break; + } + + return ret_val; +} + +/** + * ixgbe_get_eeprom - Retrieve EEPROM data for the network device + * @netdev: Network device structure + * @eeprom: Pointer to ethtool_eeprom structure specifying the EEPROM section + * @bytes: Buffer to store the retrieved EEPROM data + * + * This function retrieves a specified section of the EEPROM data for the + * network device. It calculates the range of EEPROM words to read based on + * the offset and length provided in the `eeprom` structure. The function + * supports both standard EEPROM access and, if enabled, NVM update commands. + * + * Return: 0 on success, or a negative error code on failure. + */ +static int ixgbe_get_eeprom(struct net_device *netdev, + struct ethtool_eeprom *eeprom, u8 *bytes) +{ + struct ixgbe_adapter *adapter = netdev_priv(netdev); + struct ixgbe_hw *hw = &adapter->hw; + u16 *eeprom_buff; + int first_word, last_word, eeprom_len; + struct ixgbe_nvm_access *nvm; + u32 magic; + int ret_val = 0; + u16 i; + + if (eeprom->len == 0) + return -EINVAL; + + magic = hw->vendor_id | (hw->device_id << 16); + if (eeprom->magic && eeprom->magic != magic) { + nvm = (struct ixgbe_nvm_access *)eeprom; + ret_val = ixgbe_nvmupd_command(hw, nvm, bytes); + return ret_val; + } + + /* normal ethtool get_eeprom support */ + eeprom->magic = hw->vendor_id | (hw->device_id << 16); + + first_word = eeprom->offset >> 1; + last_word = (eeprom->offset + eeprom->len - 1) >> 1; + eeprom_len = last_word - first_word + 1; + + eeprom_buff = kzalloc(sizeof(u16) * eeprom_len, GFP_KERNEL); + if (!eeprom_buff) + return -ENOMEM; + + ret_val = hw->eeprom.ops.read_buffer(hw, first_word, eeprom_len, + eeprom_buff); + + /* Device's eeprom is always little-endian, word addressable */ + for (i = 0; i < eeprom_len; i++) + eeprom_buff[i] = le16_to_cpu(eeprom_buff[i]); + + memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1), eeprom->len); + kfree(eeprom_buff); + + return ret_val; +} + +/** + * ixgbe_set_eeprom - Write data to the EEPROM of the network device + * @netdev: Network device structure + * @eeprom: Pointer to ethtool_eeprom structure specifying the EEPROM section + * @bytes: Buffer containing the data to be written to the EEPROM + * + * This function writes the specified data to the EEPROM of the network device. + * It handles read-modify-write operations for unaligned offsets and updates + * the EEPROM checksum after writing. The function supports both standard + * EEPROM access and, if enabled, NVM update commands. + * + * Return: 0 on success, or a negative error code on failure. + */ +static int ixgbe_set_eeprom(struct net_device *netdev, + struct ethtool_eeprom *eeprom, u8 *bytes) +{ + struct ixgbe_adapter *adapter = netdev_priv(netdev); + struct ixgbe_hw *hw = &adapter->hw; + int max_len, first_word, last_word, ret_val = 0; + struct ixgbe_nvm_access *nvm; + u32 magic; + u16 *eeprom_buff, i; + u8 *ptr; + + if (eeprom->len == 0) + return -EINVAL; + + magic = hw->vendor_id | (hw->device_id << 16); + if (eeprom->magic && eeprom->magic != magic) { + nvm = (struct ixgbe_nvm_access *)eeprom; + ret_val = ixgbe_nvmupd_command(hw, nvm, bytes); + return ret_val; + } + + /* normal ethtool set_eeprom support */ + + if (eeprom->magic != (hw->vendor_id | (hw->device_id << 16))) + return -EINVAL; + + max_len = hw->eeprom.word_size * 2; + + first_word = eeprom->offset >> 1; + last_word = (eeprom->offset + eeprom->len - 1) >> 1; + eeprom_buff = kzalloc(max_len, GFP_KERNEL); + if (!eeprom_buff) + return -ENOMEM; + + ptr = (u8 *)eeprom_buff; + + if (eeprom->offset & 1) { + /* + * need read/modify/write of first changed EEPROM word + * only the second byte of the word is being modified + */ + ret_val = hw->eeprom.ops.read(hw, first_word, &eeprom_buff[0]); + if (ret_val) + goto err; + + ptr++; + } + if (((eeprom->offset + eeprom->len) & 1) && (ret_val == 0)) { + /* + * need read/modify/write of last changed EEPROM word + * only the first byte of the word is being modified + */ + ret_val = hw->eeprom.ops.read(hw, last_word, + &eeprom_buff[last_word - first_word]); + if (ret_val) + goto err; + } + + /* Device's eeprom is always little-endian, word addressable */ + for (i = 0; i < last_word - first_word + 1; i++) + eeprom_buff[i] = le16_to_cpu(eeprom_buff[i]); + + memcpy(ptr, bytes, eeprom->len); + + for (i = 0; i < last_word - first_word + 1; i++) + eeprom_buff[i] = cpu_to_le16(eeprom_buff[i]); + + ret_val = hw->eeprom.ops.write_buffer(hw, first_word, + last_word - first_word + 1, + eeprom_buff); + + /* Update the checksum */ + if (ret_val == 0) + hw->eeprom.ops.update_checksum(hw); + +err: + kfree(eeprom_buff); + return ret_val; +} + +/** + * ixgbe_get_drvinfo - Provide driver information for the network device + * @netdev: Network device structure + * @drvinfo: Pointer to ethtool_drvinfo to be filled with driver info + * + * This function fills the `ethtool_drvinfo` structure with the driver name, + * version, firmware version, and bus information for the specified network + * device. It uses `strscpy` for safe string copying. + */ +static void ixgbe_get_drvinfo(struct net_device *netdev, + struct ethtool_drvinfo *drvinfo) +{ + struct ixgbe_adapter *adapter = netdev_priv(netdev); + + strscpy(drvinfo->driver, ixgbe_driver_name, + sizeof(drvinfo->driver)); + strscpy(drvinfo->version, ixgbe_driver_version, + sizeof(drvinfo->version)); + + strscpy(drvinfo->fw_version, adapter->eeprom_id, + sizeof(drvinfo->fw_version)); + strscpy(drvinfo->bus_info, pci_name(adapter->pdev), + sizeof(drvinfo->bus_info)); + +#ifdef HAVE_ETHTOOL_GET_SSET_COUNT + drvinfo->n_priv_flags = IXGBE_PRIV_FLAGS_STR_LEN; +#endif +} + +#ifdef HAVE_ETHTOOL_EXTENDED_RINGPARAMS +/** + * ixgbe_get_ringparam - Retrieve ring parameters for the network device + * @netdev: Network device structure + * @ring: Pointer to ethtool_ringparam structure to be filled with ring parameters + * @ker: (Optional) Kernel-specific ring parameters (unused) + * @extack: (Optional) Netlink extended acknowledgment structure (unused) + * + * This function populates the `ethtool_ringparam` structure with the current + * and maximum ring parameters for the specified network device, including + * receive and transmit ring sizes. + */ +static void +ixgbe_get_ringparam(struct net_device *netdev, + struct ethtool_ringparam *ring, + struct kernel_ethtool_ringparam __always_unused *ker, + struct netlink_ext_ack __always_unused *extack) +#else +static void ixgbe_get_ringparam(struct net_device *netdev, + struct ethtool_ringparam *ring) +#endif /* HAVE_ETHTOOL_EXTENDED_RINGPARAMS */ +{ + struct ixgbe_adapter *adapter = netdev_priv(netdev); + + ring->rx_max_pending = IXGBE_MAX_NUM_DESCRIPTORS; + ring->tx_max_pending = IXGBE_MAX_NUM_DESCRIPTORS; + ring->rx_mini_max_pending = 0; + ring->rx_jumbo_max_pending = 0; + ring->rx_pending = adapter->rx_ring_count; + ring->tx_pending = adapter->tx_ring_count; + ring->rx_mini_pending = 0; + ring->rx_jumbo_pending = 0; +} + +#ifdef HAVE_ETHTOOL_EXTENDED_RINGPARAMS +/** + * ixgbe_set_ringparam - Set ring parameters for the network device + * @netdev: Network device structure + * @ring: Pointer to ethtool_ringparam structure with desired ring settings + * @ker: (Optional) Kernel-specific ring parameters (unused) + * @extack: (Optional) Netlink extended acknowledgment structure (unused) + * + * This function configures the ring parameters for the specified network device + * based on the provided `ethtool_ringparam` structure. It validates the settings, + * updates the ring sizes, and reallocates resources if necessary. The function + * handles both transmit and receive rings, and supports XDP if enabled. + * + * Return: 0 on success, or a negative error code on failure. + */ +static int +ixgbe_set_ringparam(struct net_device *netdev, + struct ethtool_ringparam *ring, + struct kernel_ethtool_ringparam __always_unused *ker, + struct netlink_ext_ack __always_unused *extack) +#else +static int ixgbe_set_ringparam(struct net_device *netdev, + struct ethtool_ringparam *ring) +#endif /* HAVE_ETHTOOL_EXTENDED_RINGPARAMS */ +{ + struct ixgbe_adapter *adapter = netdev_priv(netdev); + struct ixgbe_ring *temp_ring; + int i, j, err = 0; + u32 new_rx_count, new_tx_count; + + if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending)) + return -EINVAL; + + if (ring->tx_pending > IXGBE_MAX_NUM_DESCRIPTORS || + ring->tx_pending < IXGBE_MIN_NUM_DESCRIPTORS || + ring->rx_pending > IXGBE_MAX_NUM_DESCRIPTORS || + ring->rx_pending < IXGBE_MIN_NUM_DESCRIPTORS) { + netdev_info(netdev, + "Descriptors requested (Tx: %d / Rx: %d) out of range [%d-%d]\n", + ring->tx_pending, ring->rx_pending, + IXGBE_MIN_NUM_DESCRIPTORS, + IXGBE_MAX_NUM_DESCRIPTORS); + return -EINVAL; + } + + new_tx_count = ALIGN(ring->tx_pending, + IXGBE_REQ_TX_DESCRIPTOR_MULTIPLE); + new_rx_count = ALIGN(ring->rx_pending, + IXGBE_REQ_RX_DESCRIPTOR_MULTIPLE); + + if ((new_tx_count == adapter->tx_ring_count) && + (new_rx_count == adapter->rx_ring_count)) { + /* nothing to do */ + return 0; + } + +#ifdef HAVE_AF_XDP_ZC_SUPPORT + /* If there is a AF_XDP UMEM attached to any of Rx rings, + * disallow changing the number of descriptors -- regardless + * if the netdev is running or not. + */ + if (ixgbe_xsk_any_rx_ring_enabled(adapter)) + return -EBUSY; +#endif /* HAVE_AF_XDP_ZC_SUPPORT */ + + while (test_and_set_bit(__IXGBE_RESETTING, adapter->state)) + usleep_range(1000, 2000); + + if (!netif_running(adapter->netdev)) { + for (i = 0; i < adapter->num_tx_queues; i++) + adapter->tx_ring[i]->count = new_tx_count; + for (i = 0; i < adapter->num_xdp_queues; i++) + adapter->xdp_ring[i]->count = new_tx_count; + for (i = 0; i < adapter->num_rx_queues; i++) + adapter->rx_ring[i]->count = new_rx_count; + adapter->tx_ring_count = new_tx_count; + adapter->xdp_ring_count = new_tx_count; + adapter->rx_ring_count = new_rx_count; + goto clear_reset; + } + + /* allocate temporary buffer to store rings in */ + i = max_t(int, adapter->num_tx_queues + adapter->num_xdp_queues, + adapter->num_rx_queues); + temp_ring = vmalloc(i * sizeof(struct ixgbe_ring)); + + if (!temp_ring) { + err = -ENOMEM; + goto clear_reset; + } + + ixgbe_down(adapter); + + /* + * Setup new Tx resources and free the old Tx resources in that order. + * We can then assign the new resources to the rings via a memcpy. + * The advantage to this approach is that we are guaranteed to still + * have resources even in the case of an allocation failure. + */ + if (new_tx_count != adapter->tx_ring_count) { + for (i = 0; i < adapter->num_tx_queues; i++) { + memcpy(&temp_ring[i], adapter->tx_ring[i], + sizeof(struct ixgbe_ring)); + + temp_ring[i].count = new_tx_count; + err = ixgbe_setup_tx_resources(&temp_ring[i]); + if (err) { + while (i) { + i--; + ixgbe_free_tx_resources(&temp_ring[i]); + } + goto err_setup; + } + } + + for (j = 0; j < adapter->num_xdp_queues; j++, i++) { + memcpy(&temp_ring[i], adapter->xdp_ring[j], + sizeof(struct ixgbe_ring)); + + temp_ring[i].count = new_tx_count; + err = ixgbe_setup_tx_resources(&temp_ring[i]); + if (err) { + while (i) { + i--; + ixgbe_free_tx_resources(&temp_ring[i]); + } + goto err_setup; + } + } + + for (i = 0; i < adapter->num_tx_queues; i++) { + ixgbe_free_tx_resources(adapter->tx_ring[i]); + + memcpy(adapter->tx_ring[i], &temp_ring[i], + sizeof(struct ixgbe_ring)); + } + for (j = 0; j < adapter->num_xdp_queues; j++, i++) { + ixgbe_free_tx_resources(adapter->xdp_ring[j]); + + memcpy(adapter->xdp_ring[j], &temp_ring[i], + sizeof(struct ixgbe_ring)); + } + + adapter->tx_ring_count = new_tx_count; + } + + /* Repeat the process for the Rx rings if needed */ + if (new_rx_count != adapter->rx_ring_count) { + for (i = 0; i < adapter->num_rx_queues; i++) { + memcpy(&temp_ring[i], adapter->rx_ring[i], + sizeof(struct ixgbe_ring)); +#ifdef HAVE_XDP_BUFF_RXQ + + /* Clear copied XDP RX-queue info */ + memset(&temp_ring[i].xdp_rxq, 0, + sizeof(temp_ring[i].xdp_rxq)); +#endif + + temp_ring[i].count = new_rx_count; + err = ixgbe_setup_rx_resources(adapter, &temp_ring[i]); + if (err) { + while (i) { + i--; + ixgbe_free_rx_resources(&temp_ring[i]); + } + goto err_setup; + } + } + + + for (i = 0; i < adapter->num_rx_queues; i++) { + ixgbe_free_rx_resources(adapter->rx_ring[i]); + + memcpy(adapter->rx_ring[i], &temp_ring[i], + sizeof(struct ixgbe_ring)); + } + + adapter->rx_ring_count = new_rx_count; + } + +err_setup: + ixgbe_up(adapter); + vfree(temp_ring); +clear_reset: + clear_bit(__IXGBE_RESETTING, adapter->state); + return err; +} + +#ifndef HAVE_ETHTOOL_GET_SSET_COUNT +/** + * ixgbe_get_stats_count - Get the number of statistics available + * @netdev: Network device structure + * + * This function returns the total number of statistics available for the + * specified network device. The count is defined by the constant + * `IXGBE_STATS_LEN`. + * + * Return: The number of available statistics. + */ +static int ixgbe_get_stats_count(struct net_device *netdev) +{ + return IXGBE_STATS_LEN; +} + +#else /* HAVE_ETHTOOL_GET_SSET_COUNT */ +/** + * ixgbe_get_sset_count - Get the number of strings in a specified set + * @netdev: Network device structure + * @sset: String set identifier + * + * This function returns the number of strings in the specified string set for + * the network device. It supports test, statistics, and private flags string + * sets. If the string set is not supported, it returns an error. + * + * Return: The number of strings in the specified set, or -EOPNOTSUPP if the set + * is not supported. + */ +static int ixgbe_get_sset_count(struct net_device *netdev, int sset) +{ +#ifdef HAVE_TX_MQ +#ifndef HAVE_NETDEV_SELECT_QUEUE + struct ixgbe_adapter *adapter = netdev_priv(netdev); +#endif +#endif + + switch (sset) { + case ETH_SS_TEST: + return IXGBE_TEST_LEN; + case ETH_SS_STATS: + return IXGBE_STATS_LEN; + case ETH_SS_PRIV_FLAGS: + return IXGBE_PRIV_FLAGS_STR_LEN; + default: + return -EOPNOTSUPP; + } +} +#endif /* HAVE_ETHTOOL_GET_SSET_COUNT */ + +/** + * ixgbe_get_ethtool_stats - Retrieve ethtool statistics for the network device + * @netdev: Network device structure + * @stats: Unused ethtool_stats structure + * @data: Buffer to store the retrieved statistics + * + * This function populates the provided `data` buffer with various statistics + * for the network device, including network, global, and per-queue statistics. + * It updates the adapter's statistics and iterates over transmit and receive + * queues to gather packet and byte counts, among other metrics. + */ +static void ixgbe_get_ethtool_stats(struct net_device *netdev, + struct ethtool_stats __always_unused *stats, u64 *data) +{ + struct ixgbe_adapter *adapter = netdev_priv(netdev); + +#ifdef HAVE_NDO_GET_STATS64 + const struct rtnl_link_stats64 *net_stats; + struct rtnl_link_stats64 temp; + unsigned int start; +#else +#ifdef HAVE_NETDEV_STATS_IN_NETDEV + struct net_device_stats *net_stats = &netdev->stats; +#else + struct net_device_stats *net_stats = &adapter->net_stats; +#endif +#endif + u64 *queue_stat; + int stat_count, k; + struct ixgbe_ring *ring; + int i, data_index = 0; + char *p; + + ixgbe_update_stats(adapter); +#ifdef HAVE_NDO_GET_STATS64 + net_stats = dev_get_stats(netdev, &temp); +#endif + + for (i = 0; i < IXGBE_NETDEV_STATS_LEN; i++) { + p = (char *)net_stats + ixgbe_gstrings_net_stats[i].stat_offset; + data[data_index++] = (ixgbe_gstrings_net_stats[i].sizeof_stat == + sizeof(u64)) ? *(u64 *)p : *(u32 *)p; + } + for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) { + p = (char *)adapter + ixgbe_gstrings_stats[i].stat_offset; + data[data_index++] = (ixgbe_gstrings_stats[i].sizeof_stat == + sizeof(u64)) ? *(u64 *)p : *(u32 *)p; + } + for (i = 0; i < IXGBE_NUM_TX_QUEUES; i++) { + ring = adapter->tx_ring[i]; + if (!ring) { + data[data_index++] = 0; + data[data_index++] = 0; +#ifdef BP_EXTENDED_STATS + data[data_index++] = 0; + data[data_index++] = 0; + data[data_index++] = 0; +#endif + continue; + } + +#ifdef HAVE_NDO_GET_STATS64 + do { + start = u64_stats_fetch_begin(&ring->syncp); +#endif + data[data_index] = ring->stats.packets; + data[data_index+1] = ring->stats.bytes; +#ifdef HAVE_NDO_GET_STATS64 + } while (u64_stats_fetch_retry(&ring->syncp, start)); +#endif + data_index += 2; +#ifdef BP_EXTENDED_STATS + data[data_index] = ring->stats.yields; + data[data_index+1] = ring->stats.misses; + data[data_index+2] = ring->stats.cleaned; + data_index += 3; +#endif + } + for (i = 0; i < IXGBE_NUM_RX_QUEUES; i++) { + ring = adapter->rx_ring[i]; + if (!ring) { + data[data_index++] = 0; + data[data_index++] = 0; +#ifdef BP_EXTENDED_STATS + data[data_index++] = 0; + data[data_index++] = 0; + data[data_index++] = 0; +#endif + continue; + } + +#ifdef HAVE_NDO_GET_STATS64 + do { + start = u64_stats_fetch_begin(&ring->syncp); +#endif + data[data_index] = ring->stats.packets; + data[data_index+1] = ring->stats.bytes; +#ifdef HAVE_NDO_GET_STATS64 + } while (u64_stats_fetch_retry(&ring->syncp, start)); +#endif + data_index += 2; +#ifdef BP_EXTENDED_STATS + data[data_index] = ring->stats.yields; + data[data_index+1] = ring->stats.misses; + data[data_index+2] = ring->stats.cleaned; + data_index += 3; +#endif + } + for (i = 0; i < IXGBE_MAX_PACKET_BUFFERS; i++) { + data[data_index++] = adapter->stats.pxontxc[i]; + data[data_index++] = adapter->stats.pxofftxc[i]; + } + for (i = 0; i < IXGBE_MAX_PACKET_BUFFERS; i++) { + data[data_index++] = adapter->stats.pxonrxc[i]; + data[data_index++] = adapter->stats.pxoffrxc[i]; + } + stat_count = sizeof(struct vf_stats) / sizeof(u64); + for (i = 0; i < adapter->num_vfs; i++) { + queue_stat = (u64 *)&adapter->vfinfo[i].vfstats; + for (k = 0; k < stat_count; k++) + data[data_index + k] = queue_stat[k]; + queue_stat = (u64 *)&adapter->vfinfo[i].saved_rst_vfstats; + for (k = 0; k < stat_count; k++) + data[data_index + k] += queue_stat[k]; + data_index += k; + } +} + +/** + * ixgbe_get_strings - Retrieve string set for the network device + * @netdev: Network device structure + * @stringset: Identifier for the string set to retrieve + * @data: Buffer to store the retrieved strings + * + * This function populates the provided buffer with strings corresponding to + * the specified string set for the network device. It supports test strings, + * statistics strings, and private flags strings, depending on the string set + * identifier. + */ +static void ixgbe_get_strings(struct net_device *netdev, u32 stringset, + u8 *data) +{ + struct ixgbe_adapter *adapter = netdev_priv(netdev); + char *p = (char *)data; + unsigned int i; + + switch (stringset) { + case ETH_SS_TEST: + memcpy(data, *ixgbe_gstrings_test, + IXGBE_TEST_LEN * ETH_GSTRING_LEN); + break; + case ETH_SS_STATS: + for (i = 0; i < IXGBE_NETDEV_STATS_LEN; i++) { + memcpy(p, ixgbe_gstrings_net_stats[i].stat_string, + ETH_GSTRING_LEN); + p += ETH_GSTRING_LEN; + } + for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) { + memcpy(p, ixgbe_gstrings_stats[i].stat_string, + ETH_GSTRING_LEN); + p += ETH_GSTRING_LEN; + } + for (i = 0; i < IXGBE_NUM_TX_QUEUES; i++) { + snprintf(p, ETH_GSTRING_LEN, + "tx_queue_%u_packets", i); + p += ETH_GSTRING_LEN; + snprintf(p, ETH_GSTRING_LEN, + "tx_queue_%u_bytes", i); + p += ETH_GSTRING_LEN; +#ifdef BP_EXTENDED_STATS + snprintf(p, ETH_GSTRING_LEN, + "tx_queue_%u_bp_napi_yield", i); + p += ETH_GSTRING_LEN; + snprintf(p, ETH_GSTRING_LEN, + "tx_queue_%u_bp_misses", i); + p += ETH_GSTRING_LEN; + snprintf(p, ETH_GSTRING_LEN, + "tx_queue_%u_bp_cleaned", i); + p += ETH_GSTRING_LEN; +#endif /* BP_EXTENDED_STATS */ + } + for (i = 0; i < IXGBE_NUM_RX_QUEUES; i++) { + snprintf(p, ETH_GSTRING_LEN, + "rx_queue_%u_packets", i); + p += ETH_GSTRING_LEN; + snprintf(p, ETH_GSTRING_LEN, + "rx_queue_%u_bytes", i); + p += ETH_GSTRING_LEN; +#ifdef BP_EXTENDED_STATS + snprintf(p, ETH_GSTRING_LEN, + "rx_queue_%u_bp_poll_yield", i); + p += ETH_GSTRING_LEN; + snprintf(p, ETH_GSTRING_LEN, + "rx_queue_%u_bp_misses", i); + p += ETH_GSTRING_LEN; + snprintf(p, ETH_GSTRING_LEN, + "rx_queue_%u_bp_cleaned", i); + p += ETH_GSTRING_LEN; +#endif /* BP_EXTENDED_STATS */ + } + for (i = 0; i < IXGBE_MAX_PACKET_BUFFERS; i++) { + snprintf(p, ETH_GSTRING_LEN, "tx_pb_%u_pxon", i); + p += ETH_GSTRING_LEN; + snprintf(p, ETH_GSTRING_LEN, "tx_pb_%u_pxoff", i); + p += ETH_GSTRING_LEN; + } + for (i = 0; i < IXGBE_MAX_PACKET_BUFFERS; i++) { + snprintf(p, ETH_GSTRING_LEN, "rx_pb_%u_pxon", i); + p += ETH_GSTRING_LEN; + snprintf(p, ETH_GSTRING_LEN, "rx_pb_%u_pxoff", i); + p += ETH_GSTRING_LEN; + } + for (i = 0; i < adapter->num_vfs; i++) { + snprintf(p, ETH_GSTRING_LEN, "VF %u Rx Packets", i); + p += ETH_GSTRING_LEN; + snprintf(p, ETH_GSTRING_LEN, "VF %u Rx Bytes", i); + p += ETH_GSTRING_LEN; + snprintf(p, ETH_GSTRING_LEN, "VF %u Tx Packets", i); + p += ETH_GSTRING_LEN; + snprintf(p, ETH_GSTRING_LEN, "VF %u Tx Bytes", i); + p += ETH_GSTRING_LEN; + snprintf(p, ETH_GSTRING_LEN, "VF %u MC Packets", i); + p += ETH_GSTRING_LEN; + } + /* BUG_ON(p - data != IXGBE_STATS_LEN * ETH_GSTRING_LEN); */ + break; +#ifdef HAVE_ETHTOOL_GET_SSET_COUNT + case ETH_SS_PRIV_FLAGS: + memcpy(data, ixgbe_priv_flags_strings, + IXGBE_PRIV_FLAGS_STR_LEN * ETH_GSTRING_LEN); + break; +#endif /* HAVE_ETHTOOL_GET_SSET_COUNT */ + } +} + +static int ixgbe_link_test(struct ixgbe_adapter *adapter, u64 *data) +{ + struct ixgbe_hw *hw = &adapter->hw; + bool link_up; + u32 link_speed = 0; + + if (IXGBE_REMOVED(hw->hw_addr)) { + *data = 1; + return 1; + } + *data = 0; + hw->mac.ops.check_link(hw, &link_speed, &link_up, true); + if (link_up) + return *data; + else + *data = 1; + return *data; +} + +/* ethtool register test data */ +struct ixgbe_reg_test { + u16 reg; + u8 array_len; + u8 test_type; + u32 mask; + u32 write; +}; + +/* In the hardware, registers are laid out either singly, in arrays + * spaced 0x40 bytes apart, or in contiguous tables. We assume + * most tests take place on arrays or single registers (handled + * as a single-element array) and special-case the tables. + * Table tests are always pattern tests. + * + * We also make provision for some required setup steps by specifying + * registers to be written without any read-back testing. + */ + +#define PATTERN_TEST 1 +#define SET_READ_TEST 2 +#define WRITE_NO_TEST 3 +#define TABLE32_TEST 4 +#define TABLE64_TEST_LO 5 +#define TABLE64_TEST_HI 6 + +/* default 82599 register test */ +static struct ixgbe_reg_test reg_test_82599[] = { + { IXGBE_FCRTL_82599(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 }, + { IXGBE_FCRTH_82599(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 }, + { IXGBE_PFCTOP, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF }, + { IXGBE_VLNCTRL, 1, PATTERN_TEST, 0x00000000, 0x00000000 }, + { IXGBE_RDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFF80 }, + { IXGBE_RDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF }, + { IXGBE_RDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF }, + { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, IXGBE_RXDCTL_ENABLE }, + { IXGBE_RDT(0), 4, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF }, + { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, 0 }, + { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 }, + { IXGBE_FCTTV(0), 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF }, + { IXGBE_TDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF }, + { IXGBE_TDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF }, + { IXGBE_TDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFF80 }, + { IXGBE_RXCTRL, 1, SET_READ_TEST, 0x00000001, 0x00000001 }, + { IXGBE_RAL(0), 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF }, + { IXGBE_RAL(0), 16, TABLE64_TEST_HI, 0x8001FFFF, 0x800CFFFF }, + { IXGBE_MTA(0), 128, TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF }, + { .reg = 0 } +}; + +/* default 82598 register test */ +static struct ixgbe_reg_test reg_test_82598[] = { + { IXGBE_FCRTL(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 }, + { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 }, + { IXGBE_PFCTOP, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF }, + { IXGBE_VLNCTRL, 1, PATTERN_TEST, 0x00000000, 0x00000000 }, + { IXGBE_RDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF }, + { IXGBE_RDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF }, + { IXGBE_RDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF }, + /* Enable all four RX queues before testing. */ + { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, IXGBE_RXDCTL_ENABLE }, + /* RDH is read-only for 82598, only test RDT. */ + { IXGBE_RDT(0), 4, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF }, + { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, 0 }, + { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 }, + { IXGBE_FCTTV(0), 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF }, + { IXGBE_TIPG, 1, PATTERN_TEST, 0x000000FF, 0x000000FF }, + { IXGBE_TDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF }, + { IXGBE_TDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF }, + { IXGBE_TDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF }, + { IXGBE_RXCTRL, 1, SET_READ_TEST, 0x00000003, 0x00000003 }, + { IXGBE_DTXCTL, 1, SET_READ_TEST, 0x00000005, 0x00000005 }, + { IXGBE_RAL(0), 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF }, + { IXGBE_RAL(0), 16, TABLE64_TEST_HI, 0x800CFFFF, 0x800CFFFF }, + { IXGBE_MTA(0), 128, TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF }, + { .reg = 0 } +}; + + +static bool reg_pattern_test(struct ixgbe_adapter *adapter, u64 *data, int reg, + u32 mask, u32 write) +{ + u32 pat, val, before; + static const u32 test_pattern[] = { + 0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF + }; + + if (IXGBE_REMOVED(adapter->hw.hw_addr)) { + *data = 1; + return true; + } + for (pat = 0; pat < ARRAY_SIZE(test_pattern); pat++) { + before = IXGBE_READ_REG(&adapter->hw, reg); + IXGBE_WRITE_REG(&adapter->hw, reg, test_pattern[pat] & write); + val = IXGBE_READ_REG(&adapter->hw, reg); + if (val != (test_pattern[pat] & write & mask)) { + e_err(drv, + "pattern test reg %04X failed: got 0x%08X expected 0x%08X\n", + reg, val, test_pattern[pat] & write & mask); + *data = reg; + IXGBE_WRITE_REG(&adapter->hw, reg, before); + return true; + } + IXGBE_WRITE_REG(&adapter->hw, reg, before); + } + return false; +} + +static bool reg_set_and_check(struct ixgbe_adapter *adapter, u64 *data, int reg, + u32 mask, u32 write) +{ + u32 val, before; + + if (IXGBE_REMOVED(adapter->hw.hw_addr)) { + *data = 1; + return true; + } + before = IXGBE_READ_REG(&adapter->hw, reg); + IXGBE_WRITE_REG(&adapter->hw, reg, write & mask); + val = IXGBE_READ_REG(&adapter->hw, reg); + if ((write & mask) != (val & mask)) { + e_err(drv, + "set/check reg %04X test failed: got 0x%08X expected 0x%08X\n", + reg, (val & mask), (write & mask)); + *data = reg; + IXGBE_WRITE_REG(&adapter->hw, reg, before); + return true; + } + IXGBE_WRITE_REG(&adapter->hw, reg, before); + return false; +} + +static bool ixgbe_reg_test(struct ixgbe_adapter *adapter, u64 *data) +{ + struct ixgbe_reg_test *test; + struct ixgbe_hw *hw = &adapter->hw; + u32 value, before, after; + u32 i, toggle; + + if (IXGBE_REMOVED(hw->hw_addr)) { + e_err(drv, "Adapter removed - register test blocked\n"); + *data = 1; + return true; + } + switch (hw->mac.type) { + case ixgbe_mac_82598EB: + toggle = 0x7FFFF3FF; + test = reg_test_82598; + break; + case ixgbe_mac_82599EB: + case ixgbe_mac_X540: + case ixgbe_mac_X550: + case ixgbe_mac_X550EM_x: + case ixgbe_mac_X550EM_a: + case ixgbe_mac_E610: + toggle = 0x7FFFF30F; + test = reg_test_82599; + break; + default: + *data = 1; + return true; + } + + /* + * Because the status register is such a special case, + * we handle it separately from the rest of the register + * tests. Some bits are read-only, some toggle, and some + * are writeable on newer MACs. + */ + before = IXGBE_READ_REG(hw, IXGBE_STATUS); + value = IXGBE_READ_REG(hw, IXGBE_STATUS) & toggle; + IXGBE_WRITE_REG(hw, IXGBE_STATUS, toggle); + after = IXGBE_READ_REG(hw, IXGBE_STATUS) & toggle; + if (value != after) { + e_err(drv, + "failed STATUS register test got: 0x%08X expected: 0x%08X\n", + after, value); + *data = 1; + return true; + } + /* restore previous status */ + IXGBE_WRITE_REG(hw, IXGBE_STATUS, before); + + /* + * Perform the remainder of the register test, looping through + * the test table until we either fail or reach the null entry. + */ + while (test->reg) { + for (i = 0; i < test->array_len; i++) { + bool b = false; + + switch (test->test_type) { + case PATTERN_TEST: + b = reg_pattern_test(adapter, data, + test->reg + (i * 0x40), + test->mask, + test->write); + break; + case SET_READ_TEST: + b = reg_set_and_check(adapter, data, + test->reg + (i * 0x40), + test->mask, + test->write); + break; + case WRITE_NO_TEST: + IXGBE_WRITE_REG(hw, test->reg + (i * 0x40), + test->write); + break; + case TABLE32_TEST: + b = reg_pattern_test(adapter, data, + test->reg + (i * 4), + test->mask, + test->write); + break; + case TABLE64_TEST_LO: + b = reg_pattern_test(adapter, data, + test->reg + (i * 8), + test->mask, + test->write); + break; + case TABLE64_TEST_HI: + b = reg_pattern_test(adapter, data, + (test->reg + 4) + (i * 8), + test->mask, + test->write); + break; + } + if (b) + return true; + } + test++; + } + + *data = 0; + return false; +} + +static bool ixgbe_eeprom_test(struct ixgbe_adapter *adapter, u64 *data) +{ + struct ixgbe_hw *hw = &adapter->hw; + + if (hw->eeprom.ops.validate_checksum(hw, NULL)) { + *data = 1; + return true; + } else { + *data = 0; + return false; + } +} + +static irqreturn_t ixgbe_test_intr(int __always_unused irq, void *data) +{ + struct net_device *netdev = (struct net_device *) data; + struct ixgbe_adapter *adapter = netdev_priv(netdev); + + adapter->test_icr |= IXGBE_READ_REG(&adapter->hw, IXGBE_EICR); + + return IRQ_HANDLED; +} + +static int ixgbe_intr_test(struct ixgbe_adapter *adapter, u64 *data) +{ + struct net_device *netdev = adapter->netdev; + u32 mask, i = 0, shared_int = true; + u32 irq = adapter->pdev->irq; + + if (IXGBE_REMOVED(adapter->hw.hw_addr)) { + *data = 1; + return -1; + } + *data = 0; + + /* Hook up test interrupt handler just for this test */ + if (adapter->msix_entries) { + /* NOTE: we don't test MSI-X interrupts here, yet */ + return 0; + } else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) { + shared_int = false; + if (request_irq(irq, &ixgbe_test_intr, 0, netdev->name, + netdev)) { + *data = 1; + return -1; + } + } else if (!request_irq(irq, &ixgbe_test_intr, IRQF_PROBE_SHARED, + netdev->name, netdev)) { + shared_int = false; + } else if (request_irq(irq, &ixgbe_test_intr, IRQF_SHARED, + netdev->name, netdev)) { + *data = 1; + return -1; + } + e_info(hw, "testing %s interrupt\n", + (shared_int ? "shared" : "unshared")); + + /* Disable all the interrupts */ + IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFFFFFF); + IXGBE_WRITE_FLUSH(&adapter->hw); + usleep_range(10000, 20000); + + /* Test each interrupt */ + for (; i < 10; i++) { + /* Interrupt to test */ + mask = 1 << i; + + if (!shared_int) { + /* + * Disable the interrupts to be reported in + * the cause register and then force the same + * interrupt and see if one gets posted. If + * an interrupt was posted to the bus, the + * test failed. + */ + adapter->test_icr = 0; + IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, + ~mask & 0x00007FFF); + IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, + ~mask & 0x00007FFF); + IXGBE_WRITE_FLUSH(&adapter->hw); + usleep_range(10000, 20000); + + if (adapter->test_icr & mask) { + *data = 3; + break; + } + } + + /* + * Enable the interrupt to be reported in the cause + * register and then force the same interrupt and see + * if one gets posted. If an interrupt was not posted + * to the bus, the test failed. + */ + adapter->test_icr = 0; + IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask); + IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask); + IXGBE_WRITE_FLUSH(&adapter->hw); + usleep_range(10000, 20000); + + if (!(adapter->test_icr & mask)) { + *data = 4; + break; + } + + if (!shared_int) { + /* + * Disable the other interrupts to be reported in + * the cause register and then force the other + * interrupts and see if any get posted. If + * an interrupt was posted to the bus, the + * test failed. + */ + adapter->test_icr = 0; + IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, + ~mask & 0x00007FFF); + IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, + ~mask & 0x00007FFF); + IXGBE_WRITE_FLUSH(&adapter->hw); + usleep_range(10000, 20000); + + if (adapter->test_icr) { + *data = 5; + break; + } + } + } + + /* Disable all the interrupts */ + IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFFFFFF); + IXGBE_WRITE_FLUSH(&adapter->hw); + usleep_range(10000, 20000); + + /* Unhook test interrupt handler */ + free_irq(irq, netdev); + + return *data; +} + +static void ixgbe_free_desc_rings(struct ixgbe_adapter *adapter) +{ + /* Shut down the DMA engines now so they can be reinitialized later, + * since the test rings and normally used rings should overlap on + * queue 0 we can just use the standard disable Rx/Tx calls and they + * will take care of disabling the test rings for us. + */ + + /* first Rx */ + ixgbe_disable_rx_queue(adapter); + + /* now Tx */ + ixgbe_disable_tx_queue(adapter); + + ixgbe_reset(adapter); + + ixgbe_free_tx_resources(&adapter->test_tx_ring); + ixgbe_free_rx_resources(&adapter->test_rx_ring); +} + +static int ixgbe_setup_desc_rings(struct ixgbe_adapter *adapter) +{ + struct ixgbe_ring *tx_ring = &adapter->test_tx_ring; + struct ixgbe_ring *rx_ring = &adapter->test_rx_ring; + u32 rctl, reg_data; + int ret_val; + int err; + + /* Setup Tx descriptor ring and Tx buffers */ + tx_ring->count = IXGBE_DEFAULT_TXD; + tx_ring->queue_index = 0; + tx_ring->dev = ixgbe_pf_to_dev(adapter); + tx_ring->netdev = adapter->netdev; + tx_ring->reg_idx = adapter->tx_ring[0]->reg_idx; + + err = ixgbe_setup_tx_resources(tx_ring); + if (err) + return 1; + + switch (adapter->hw.mac.type) { + case ixgbe_mac_82599EB: + case ixgbe_mac_X540: + case ixgbe_mac_X550: + case ixgbe_mac_X550EM_x: + case ixgbe_mac_X550EM_a: + case ixgbe_mac_E610: + reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_DMATXCTL); + reg_data |= IXGBE_DMATXCTL_TE; + IXGBE_WRITE_REG(&adapter->hw, IXGBE_DMATXCTL, reg_data); + break; + default: + break; + } + + ixgbe_configure_tx_ring(adapter, tx_ring); + + /* Setup Rx Descriptor ring and Rx buffers */ + rx_ring->count = IXGBE_DEFAULT_RXD; + rx_ring->queue_index = 0; + rx_ring->dev = ixgbe_pf_to_dev(adapter); + rx_ring->netdev = adapter->netdev; + rx_ring->reg_idx = adapter->rx_ring[0]->reg_idx; +#ifdef CONFIG_IXGBE_DISABLE_PACKET_SPLIT + rx_ring->rx_buf_len = IXGBE_RXBUFFER_2K; +#endif + + err = ixgbe_setup_rx_resources(adapter, rx_ring); + if (err) { + ret_val = 4; + goto err_nomem; + } + + ixgbe_disable_rx(&adapter->hw); + + ixgbe_configure_rx_ring(adapter, rx_ring); + + rctl = IXGBE_READ_REG(&adapter->hw, IXGBE_RXCTRL); + rctl |= IXGBE_RXCTRL_DMBYPS; + IXGBE_WRITE_REG(&adapter->hw, IXGBE_RXCTRL, rctl); + ixgbe_enable_rx(&adapter->hw); + + return 0; + +err_nomem: + ixgbe_free_desc_rings(adapter); + return ret_val; +} + +static int ixgbe_setup_loopback_test(struct ixgbe_adapter *adapter) +{ + struct ixgbe_hw *hw = &adapter->hw; + u32 reg_data; + + + /* Setup MAC loopback */ + reg_data = IXGBE_READ_REG(hw, IXGBE_HLREG0); + reg_data |= IXGBE_HLREG0_LPBK; + IXGBE_WRITE_REG(hw, IXGBE_HLREG0, reg_data); + + reg_data = IXGBE_READ_REG(hw, IXGBE_FCTRL); + reg_data |= IXGBE_FCTRL_BAM | IXGBE_FCTRL_SBP | IXGBE_FCTRL_MPE; + IXGBE_WRITE_REG(hw, IXGBE_FCTRL, reg_data); + + /* X540 needs to set the MACC.FLU bit to force link up */ + switch (adapter->hw.mac.type) { + case ixgbe_mac_X550: + case ixgbe_mac_X550EM_x: + case ixgbe_mac_X550EM_a: + case ixgbe_mac_E610: + case ixgbe_mac_X540: + reg_data = IXGBE_READ_REG(hw, IXGBE_MACC); + reg_data |= IXGBE_MACC_FLU; + IXGBE_WRITE_REG(hw, IXGBE_MACC, reg_data); + break; + default: + if (hw->mac.orig_autoc) { + reg_data = hw->mac.orig_autoc | IXGBE_AUTOC_FLU; + IXGBE_WRITE_REG(hw, IXGBE_AUTOC, reg_data); + } else { + return 10; + } + } + IXGBE_WRITE_FLUSH(hw); + usleep_range(10000, 20000); + + /* Disable Atlas Tx lanes; re-enabled in reset path */ + if (hw->mac.type == ixgbe_mac_82598EB) { + u8 atlas; + + hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, &atlas); + atlas |= IXGBE_ATLAS_PDN_TX_REG_EN; + hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, atlas); + + hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_10G, &atlas); + atlas |= IXGBE_ATLAS_PDN_TX_10G_QL_ALL; + hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_10G, atlas); + + hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_1G, &atlas); + atlas |= IXGBE_ATLAS_PDN_TX_1G_QL_ALL; + hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_1G, atlas); + + hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_AN, &atlas); + atlas |= IXGBE_ATLAS_PDN_TX_AN_QL_ALL; + hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_AN, atlas); + } + + return 0; +} + +static void ixgbe_loopback_cleanup(struct ixgbe_adapter *adapter) +{ + u32 reg_data; + + reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_HLREG0); + reg_data &= ~IXGBE_HLREG0_LPBK; + IXGBE_WRITE_REG(&adapter->hw, IXGBE_HLREG0, reg_data); +} + +static void ixgbe_create_lbtest_frame(struct sk_buff *skb, + unsigned int frame_size) +{ + memset(skb->data, 0xFF, frame_size); + frame_size >>= 1; + memset(&skb->data[frame_size], 0xAA, frame_size / 2 - 1); + memset(&skb->data[frame_size + 10], 0xBE, 1); + memset(&skb->data[frame_size + 12], 0xAF, 1); +} + +static bool ixgbe_check_lbtest_frame(struct ixgbe_rx_buffer *rx_buffer, + unsigned int frame_size) +{ + unsigned char *data; + bool match = true; + + frame_size >>= 1; + +#ifdef CONFIG_IXGBE_DISABLE_PACKET_SPLIT + data = rx_buffer->skb->data; +#else + data = kmap(rx_buffer->page) + rx_buffer->page_offset; +#endif + + if (data[3] != 0xFF || + data[frame_size + 10] != 0xBE || + data[frame_size + 12] != 0xAF) + match = false; + +#ifndef CONFIG_IXGBE_DISABLE_PACKET_SPLIT + kunmap(rx_buffer->page); + +#endif + return match; +} + +static u16 ixgbe_clean_test_rings(struct ixgbe_ring *rx_ring, + struct ixgbe_ring *tx_ring, + unsigned int size) +{ + union ixgbe_adv_rx_desc *rx_desc; +#ifdef CONFIG_IXGBE_DISABLE_PACKET_SPLIT + const int bufsz = rx_ring->rx_buf_len; +#else + const int bufsz = ixgbe_rx_bufsz(rx_ring); +#endif + u16 rx_ntc, tx_ntc, count = 0; + + /* initialize next to clean and descriptor values */ + rx_ntc = rx_ring->next_to_clean; + tx_ntc = tx_ring->next_to_clean; + rx_desc = IXGBE_RX_DESC(rx_ring, rx_ntc); + + while (tx_ntc != tx_ring->next_to_use) { + union ixgbe_adv_tx_desc *tx_desc; + struct ixgbe_tx_buffer *tx_buffer; + + tx_desc = IXGBE_TX_DESC(tx_ring, tx_ntc); + + /* if DD is not set transmit has not completed */ + if (!(tx_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD))) + return count; + + /* unmap buffer on Tx side */ + tx_buffer = &tx_ring->tx_buffer_info[tx_ntc]; + + /* Free all the Tx ring sk_buffs */ + dev_kfree_skb_any(tx_buffer->skb); + + /* unmap skb header data */ + dma_unmap_single(tx_ring->dev, + dma_unmap_addr(tx_buffer, dma), + dma_unmap_len(tx_buffer, len), + DMA_TO_DEVICE); + dma_unmap_len_set(tx_buffer, len, 0); + + /* increment Tx next to clean counter */ + tx_ntc++; + if (tx_ntc == tx_ring->count) + tx_ntc = 0; + } + + while (rx_desc->wb.upper.length) { + struct ixgbe_rx_buffer *rx_buffer; + + /* check Rx buffer */ + rx_buffer = &rx_ring->rx_buffer_info[rx_ntc]; + + /* sync Rx buffer for CPU read */ + dma_sync_single_for_cpu(rx_ring->dev, + rx_buffer->dma, + bufsz, + DMA_FROM_DEVICE); + + /* verify contents of skb */ + if (ixgbe_check_lbtest_frame(rx_buffer, size)) + count++; + else + break; + + /* sync Rx buffer for device write */ + dma_sync_single_for_device(rx_ring->dev, + rx_buffer->dma, + bufsz, + DMA_FROM_DEVICE); + + /* increment Rx next to clean counter */ + rx_ntc++; + if (rx_ntc == rx_ring->count) + rx_ntc = 0; + + /* fetch next descriptor */ + rx_desc = IXGBE_RX_DESC(rx_ring, rx_ntc); + } + + /* re-map buffers to ring, store next to clean values */ + ixgbe_alloc_rx_buffers(rx_ring, count); + rx_ring->next_to_clean = rx_ntc; + tx_ring->next_to_clean = tx_ntc; + + return count; +} + +static int ixgbe_run_loopback_test(struct ixgbe_adapter *adapter) +{ + struct ixgbe_ring *tx_ring = &adapter->test_tx_ring; + struct ixgbe_ring *rx_ring = &adapter->test_rx_ring; + int i, j, lc, ret_val = 0; + unsigned int size = 1024; + netdev_tx_t tx_ret_val; + struct sk_buff *skb; + u32 flags_orig = adapter->flags; + + /* DCB can modify the frames on Tx */ + adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED; + + /* allocate test skb */ + skb = alloc_skb(size, GFP_KERNEL); + if (!skb) + return 11; + + /* place data into test skb */ + ixgbe_create_lbtest_frame(skb, size); + skb_put(skb, size); + + /* + * Calculate the loop count based on the largest descriptor ring + * The idea is to wrap the largest ring a number of times using 64 + * send/receive pairs during each loop + */ + + if (rx_ring->count <= tx_ring->count) + lc = ((tx_ring->count / 64) * 2) + 1; + else + lc = ((rx_ring->count / 64) * 2) + 1; + + for (j = 0; j <= lc; j++) { + unsigned int good_cnt; + + /* reset count of good packets */ + good_cnt = 0; + + /* place 64 packets on the transmit queue*/ + for (i = 0; i < 64; i++) { + skb_get(skb); + tx_ret_val = ixgbe_xmit_frame_ring(skb, + adapter, + tx_ring); + if (tx_ret_val == NETDEV_TX_OK) + good_cnt++; + } + + if (good_cnt != 64) { + ret_val = 12; + break; + } + + /* allow 200 milliseconds for packets to go from Tx to Rx */ + msleep(200); + + good_cnt = ixgbe_clean_test_rings(rx_ring, tx_ring, size); + if (good_cnt != 64) { + ret_val = 13; + break; + } + } + + /* free the original skb */ + kfree_skb(skb); + adapter->flags = flags_orig; + + return ret_val; +} + +static int ixgbe_loopback_test(struct ixgbe_adapter *adapter, u64 *data) +{ + *data = ixgbe_setup_desc_rings(adapter); + if (*data) + goto out; + *data = ixgbe_setup_loopback_test(adapter); + if (*data) + goto err_loopback; + *data = ixgbe_run_loopback_test(adapter); + ixgbe_loopback_cleanup(adapter); + +err_loopback: + ixgbe_free_desc_rings(adapter); +out: + return *data; +} + +#ifndef HAVE_ETHTOOL_GET_SSET_COUNT +/** + * ixgbe_diag_test_count - Get the number of diagnostic tests available + * @netdev: Network device structure (unused) + * + * This function returns the number of diagnostic tests available for the + * network device. The `netdev` parameter is marked as unused, indicating that + * it is not utilized within the function. The function simply returns a + * constant value, `IXGBE_TEST_LEN`, which represents the number of diagnostic + * tests that can be performed on the device. + * + * Return: The number of diagnostic tests available, as defined by + * `IXGBE_TEST_LEN`. + */ +static int ixgbe_diag_test_count(struct net_device __always_unused *netdev) +{ + return IXGBE_TEST_LEN; +} +#endif /* HAVE_ETHTOOL_GET_SSET_COUNT */ + +/** + * ixgbe_diag_test - Perform diagnostic tests on the network device + * @netdev: Network device structure + * @eth_test: Ethtool test structure containing test flags + * @data: Array to store the results of the diagnostic tests + * + * This function performs a series of diagnostic tests on the specified network + * device. It supports both offline and online tests, depending on the flags set + * in the `eth_test` structure. The function checks if the device is in a + * removable state and blocks the test if the adapter is removed. + * + * For offline tests, the function performs the following diagnostics: + * - Link test + * - Register test + * - EEPROM test + * - Interrupt test + * - MAC loopback test (skipped if SR-IOV or VMDq is enabled) + * + * The function handles the device state appropriately, closing and resetting + * the device as needed during offline tests. It also ensures that the device + * returns to its previous state after testing. + * + * For online tests, only the link test is performed, and other tests are + * skipped with default pass results. + * + * The results of each test are stored in the `data` array, and the function + * sets the `ETH_TEST_FL_FAILED` flag in `eth_test` if any test fails. + */ +static void ixgbe_diag_test(struct net_device *netdev, + struct ethtool_test *eth_test, u64 *data) +{ + struct ixgbe_adapter *adapter = netdev_priv(netdev); + bool if_running = netif_running(netdev); + struct ixgbe_hw *hw = &adapter->hw; + + if (IXGBE_REMOVED(hw->hw_addr)) { + e_err(hw, "Adapter removed - test blocked\n"); + data[0] = 1; + data[1] = 1; + data[2] = 1; + data[3] = 1; + data[4] = 1; + eth_test->flags |= ETH_TEST_FL_FAILED; + return; + } + set_bit(__IXGBE_TESTING, adapter->state); + if (eth_test->flags == ETH_TEST_FL_OFFLINE) { + if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) { + int i; + for (i = 0; i < adapter->num_vfs; i++) { + if (adapter->vfinfo[i].clear_to_send) { + e_warn(drv, "Please take active VFS " + "offline and restart the " + "adapter before running NIC " + "diagnostics\n"); + data[0] = 1; + data[1] = 1; + data[2] = 1; + data[3] = 1; + data[4] = 1; + eth_test->flags |= ETH_TEST_FL_FAILED; + clear_bit(__IXGBE_TESTING, + adapter->state); + goto skip_ol_tests; + } + } + } + + /* Offline tests */ + e_info(hw, "offline testing starting\n"); + + /* Link test performed before hardware reset so autoneg doesn't + * interfere with test result */ + if (ixgbe_link_test(adapter, &data[4])) + eth_test->flags |= ETH_TEST_FL_FAILED; + + if (if_running) + /* indicate we're in test mode */ + ixgbe_close(netdev); + else + ixgbe_reset(adapter); + + e_info(hw, "register testing starting\n"); + if (ixgbe_reg_test(adapter, &data[0])) + eth_test->flags |= ETH_TEST_FL_FAILED; + + ixgbe_reset(adapter); + e_info(hw, "eeprom testing starting\n"); + if (ixgbe_eeprom_test(adapter, &data[1])) + eth_test->flags |= ETH_TEST_FL_FAILED; + + ixgbe_reset(adapter); + e_info(hw, "interrupt testing starting\n"); + if (ixgbe_intr_test(adapter, &data[2])) + eth_test->flags |= ETH_TEST_FL_FAILED; + + /* If SRIOV or VMDq is enabled then skip MAC + * loopback diagnostic. */ + if (adapter->flags & (IXGBE_FLAG_SRIOV_ENABLED | + IXGBE_FLAG_VMDQ_ENABLED)) { + e_info(hw, "skip MAC loopback diagnostic in VT mode\n"); + data[3] = 0; + goto skip_loopback; + } + + ixgbe_reset(adapter); + e_info(hw, "loopback testing starting\n"); + if (ixgbe_loopback_test(adapter, &data[3])) + eth_test->flags |= ETH_TEST_FL_FAILED; + +skip_loopback: + ixgbe_reset(adapter); + + /* clear testing bit and return adapter to previous state */ + clear_bit(__IXGBE_TESTING, adapter->state); + if (if_running) + ixgbe_open(netdev); + else if (hw->mac.ops.disable_tx_laser) + hw->mac.ops.disable_tx_laser(hw); + } else { + e_info(hw, "online testing starting\n"); + + /* Online tests */ + if (ixgbe_link_test(adapter, &data[4])) + eth_test->flags |= ETH_TEST_FL_FAILED; + + /* Offline tests aren't run; pass by default */ + data[0] = 0; + data[1] = 0; + data[2] = 0; + data[3] = 0; + + clear_bit(__IXGBE_TESTING, adapter->state); + } + +skip_ol_tests: + msleep_interruptible(4 * 1000); +} + +static int ixgbe_wol_exclusion(struct ixgbe_adapter *adapter, + struct ethtool_wolinfo *wol) +{ + struct ixgbe_hw *hw = &adapter->hw; + int retval = 0; + + /* WOL not supported for all devices */ + if (!ixgbe_wol_supported(adapter, hw->device_id, + hw->subsystem_device_id)) { + retval = 1; + wol->supported = 0; + } + + return retval; +} + +/** + * ixgbe_get_wol - Retrieve Wake-on-LAN settings for the network device + * @netdev: Network device structure + * @wol: Pointer to ethtool_wolinfo structure to be filled with WoL settings + * + * This function populates the `ethtool_wolinfo` structure with the supported + * and enabled Wake-on-LAN (WoL) options for the specified network device. It + * checks for WoL exclusions and device wakeup capability before setting the + * enabled options. + */ +static void ixgbe_get_wol(struct net_device *netdev, + struct ethtool_wolinfo *wol) +{ + struct ixgbe_adapter *adapter = netdev_priv(netdev); + + wol->supported = WAKE_UCAST | WAKE_MCAST | + WAKE_BCAST | WAKE_MAGIC; + wol->wolopts = 0; + + if (ixgbe_wol_exclusion(adapter, wol) || + !device_can_wakeup(ixgbe_pf_to_dev(adapter))) + return; + + if (adapter->wol & IXGBE_WUFC_EX) + wol->wolopts |= WAKE_UCAST; + if (adapter->wol & IXGBE_WUFC_MC) + wol->wolopts |= WAKE_MCAST; + if (adapter->wol & IXGBE_WUFC_BC) + wol->wolopts |= WAKE_BCAST; + if (adapter->wol & IXGBE_WUFC_MAG) + wol->wolopts |= WAKE_MAGIC; +} + +/** + * ixgbe_set_wol - Set Wake-on-LAN settings for the network device + * @netdev: Network device structure + * @wol: Pointer to ethtool_wolinfo structure containing desired WoL settings + * + * This function sets the Wake-on-LAN (WoL) options for the specified network + * device based on the provided `ethtool_wolinfo` structure. It checks for + * unsupported WoL options and exclusions before updating the device's WoL + * configuration and enabling or disabling device wakeup. + * + * Return: 0 on success, or -EOPNOTSUPP if unsupported options are specified. + */ +static int ixgbe_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol) +{ + struct ixgbe_adapter *adapter = netdev_priv(netdev); + struct ixgbe_hw *hw = &adapter->hw; + + if (wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE | + WAKE_FILTER)) + return -EOPNOTSUPP; + + if (ixgbe_wol_exclusion(adapter, wol)) + return wol->wolopts ? -EOPNOTSUPP : 0; + + adapter->wol = 0; + + if (wol->wolopts & WAKE_UCAST) + adapter->wol |= IXGBE_WUFC_EX; + if (wol->wolopts & WAKE_MCAST) + adapter->wol |= IXGBE_WUFC_MC; + if (wol->wolopts & WAKE_BCAST) + adapter->wol |= IXGBE_WUFC_BC; + if (wol->wolopts & WAKE_MAGIC) + adapter->wol |= IXGBE_WUFC_MAG; + + hw->wol_enabled = !!(adapter->wol); + + device_set_wakeup_enable(ixgbe_pf_to_dev(adapter), adapter->wol); + + return 0; +} + +/** + * ixgbe_set_wol_acpi - Set ACPI Wake-on-LAN settings for the network device + * @netdev: Network device structure + * @wol: Pointer to ethtool_wolinfo structure containing desired WoL settings + * + * This function configures the ACPI Wake-on-LAN (WoL) options for the specified + * network device based on the provided `ethtool_wolinfo` structure. It disables + * APM wakeup, updates the device's WoL configuration, and enables or disables + * device wakeup. Unsupported WoL options and exclusions are checked before + * applying the settings. + * + * Return: 0 on success, or -EOPNOTSUPP if unsupported options are specified. + */ +static int ixgbe_set_wol_acpi(struct net_device *netdev, + struct ethtool_wolinfo *wol) +{ + struct ixgbe_adapter *adapter = + netdev_priv(netdev); + struct ixgbe_hw *hw = &adapter->hw; + u32 grc; + + if (ixgbe_wol_exclusion(adapter, wol)) + return wol->wolopts ? -EOPNOTSUPP : 0; + + /* disable APM wakeup */ + grc = IXGBE_READ_REG(hw, IXGBE_GRC_X550EM_a); + grc &= ~IXGBE_GRC_APME; + IXGBE_WRITE_REG(hw, IXGBE_GRC_X550EM_a, grc); + + IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0); + + adapter->wol = 0; + if (wol->wolopts & WAKE_UCAST) + adapter->wol |= IXGBE_WUFC_EX; + if (wol->wolopts & WAKE_MCAST) + adapter->wol |= IXGBE_WUFC_MC; + if (wol->wolopts & WAKE_BCAST) + adapter->wol |= IXGBE_WUFC_BC; + + IXGBE_WRITE_REG(hw, IXGBE_WUC, IXGBE_WUC_PME_EN); + IXGBE_WRITE_REG(hw, IXGBE_WUFC, adapter->wol); + + hw->wol_enabled = !!(adapter->wol); + + device_set_wakeup_enable(ixgbe_pf_to_dev(adapter), adapter->wol); + + return 0; +} + +/** + * ixgbe_set_wol_E610 - Set Wake-on-LAN settings for E610 hardware + * @netdev: Network device structure + * @wol: Pointer to ethtool_wolinfo structure containing desired WoL settings + * + * This function sets the Wake-on-LAN (WoL) options for E610 hardware. It + * delegates to `ixgbe_set_wol_acpi` if unicast, multicast, or broadcast WoL + * options are specified, otherwise it uses `ixgbe_set_wol`. + * + * Return: 0 on success, or a negative error code if unsupported options are specified. + */ +static int ixgbe_set_wol_E610(struct net_device *netdev, + struct ethtool_wolinfo *wol) +{ + if (wol->wolopts & (WAKE_UCAST | WAKE_MCAST | WAKE_BCAST)) + return ixgbe_set_wol_acpi(netdev, wol); + else + return ixgbe_set_wol(netdev, wol); +} + +/** + * ixgbe_nway_reset - Perform a N-Way reset on the network device + * @netdev: Network device structure + * + * This function performs a N-Way reset on the specified network device. If the + * network interface is running, it reinitializes the adapter to apply the reset. + * + * Return: 0 on success. + */ +static int ixgbe_nway_reset(struct net_device *netdev) +{ + struct ixgbe_adapter *adapter = netdev_priv(netdev); + + if (netif_running(netdev)) + ixgbe_reinit_locked(adapter); + + return 0; +} + +#ifdef HAVE_ETHTOOL_SET_PHYS_ID +/** + * ixgbe_set_phys_id_E610 - Control the physical identification LED for E610 hardware + * @netdev: Network device structure + * @state: Desired state for the LED (active or inactive) + * + * This function controls the physical identification LED for E610 hardware + * based on the specified state. It turns the LED on or off to help identify + * the physical location of the network device. + * + * Return: 0 on success, -EIO if an error occurs, or -EOPNOTSUPP if the state is unsupported. + */ +static int ixgbe_set_phys_id_E610(struct net_device *netdev, + enum ethtool_phys_id_state state) +{ + struct ixgbe_adapter *adapter = + netdev_priv(netdev); + bool led_active; + int err; + + switch (state) { + case ETHTOOL_ID_ACTIVE: + led_active = true; + break; + case ETHTOOL_ID_INACTIVE: + led_active = false; + break; + default: + return -EOPNOTSUPP; + } + + err = ixgbe_aci_set_port_id_led(&adapter->hw, !led_active); + if (err) + err = -EIO; + + return err; +} + +/** + * ixgbe_set_phys_id - Control the physical identification LED for the network device + * @netdev: Network device structure + * @state: Desired state for the LED (active, on, off, or inactive) + * + * This function controls the physical identification LED for the network device + * based on the specified state. It can turn the LED on or off, activate it for + * identification, or restore its previous settings. + * + * Return: 0 on success, 2 if the LED is activated for identification, -EINVAL if + * an error occurs, or -EOPNOTSUPP if LED operations are not supported. + */ +static int ixgbe_set_phys_id(struct net_device *netdev, + enum ethtool_phys_id_state state) +{ + struct ixgbe_adapter *adapter = netdev_priv(netdev); + struct ixgbe_hw *hw = &adapter->hw; + + if (!hw->mac.ops.led_on || !hw->mac.ops.led_off) + return -EOPNOTSUPP; + + switch (state) { + case ETHTOOL_ID_ACTIVE: + adapter->led_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL); + return 2; + + case ETHTOOL_ID_ON: + if (hw->mac.ops.led_on(hw, hw->mac.led_link_act)) + return -EINVAL; + break; + + case ETHTOOL_ID_OFF: + if (hw->mac.ops.led_off(hw, hw->mac.led_link_act)) + return -EINVAL; + break; + + case ETHTOOL_ID_INACTIVE: + /* Restore LED settings */ + IXGBE_WRITE_REG(&adapter->hw, IXGBE_LEDCTL, adapter->led_reg); + break; + } + + return 0; +} +#else +/** + * ixgbe_phys_id - Identify the physical location of the network device + * @netdev: Network device structure + * @data: Duration in seconds to blink the LED for identification + * + * This function blinks the LED on the network device to help identify its + * physical location. It uses the device's LED on and off operations to blink + * the LED for the specified duration. If the duration is not specified or + * exceeds 300 seconds, it defaults to 300 seconds. The function restores the + * original LED settings after blinking. + * + * Return: 0 on success, or a negative error code if LED operations are not supported. + */ +static int ixgbe_phys_id(struct net_device *netdev, u32 data) +{ + struct ixgbe_adapter *adapter = netdev_priv(netdev); + struct ixgbe_hw *hw = &adapter->hw; + u32 led_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL); + u32 i; + + if (!hw->mac.ops.led_on || !hw->mac.ops.led_off) + return -EOPNOTSUPP; + + if (!data || data > 300) + data = 300; + + for (i = 0; i < (data * 1000); i += 400) { + if (hw->mac.ops.led_on(hw, hw->mac.led_link_act)) + return -EINVAL; + msleep_interruptible(200); + if (hw->mac.ops.led_off(hw, hw->mac.led_link_act)) + return -EINVAL; + msleep_interruptible(200); + } + + /* Restore LED settings */ + IXGBE_WRITE_REG(hw, IXGBE_LEDCTL, led_reg); + + return IXGBE_SUCCESS; +} +#endif /* HAVE_ETHTOOL_SET_PHYS_ID */ + +/** + * ixgbe_get_coalesce - Retrieve interrupt coalescing settings for the network device + * @netdev: Network device structure + * @ec: Pointer to the ethtool_coalesce structure to be filled with coalescing info + * @kernel_coal: (Optional) Pointer to kernel-specific coalescing settings (unused) + * @extack: (Optional) Pointer to netlink extended acknowledgment structure (unused) + * + * This function retrieves the interrupt coalescing settings for the specified + * network device and populates the provided `ethtool_coalesce` structure with + * the relevant information. It reports the maximum number of coalesced frames + * for transmit interrupts and the coalescing time for receive and transmit + * interrupts based on the device's configuration. + * + * Return: 0 on success. + */ +static int ixgbe_get_coalesce(struct net_device *netdev, +#ifdef HAVE_ETHTOOL_COALESCE_EXTACK + struct ethtool_coalesce *ec, + struct kernel_ethtool_coalesce *kernel_coal, + struct netlink_ext_ack *extack) +#else + struct ethtool_coalesce *ec) +#endif +{ + struct ixgbe_adapter *adapter = netdev_priv(netdev); + + ec->tx_max_coalesced_frames_irq = adapter->tx_work_limit; + /* only valid if in constant ITR mode */ + if (adapter->rx_itr_setting <= 1) + ec->rx_coalesce_usecs = adapter->rx_itr_setting; + else + ec->rx_coalesce_usecs = adapter->rx_itr_setting >> 2; + + /* if in mixed tx/rx queues per vector mode, report only rx settings */ + if (adapter->q_vector[0]->tx.count && adapter->q_vector[0]->rx.count) + return 0; + + /* only valid if in constant ITR mode */ + if (adapter->tx_itr_setting <= 1) + ec->tx_coalesce_usecs = adapter->tx_itr_setting; + else + ec->tx_coalesce_usecs = adapter->tx_itr_setting >> 2; + + return 0; +} + +/* + * this function must be called before setting the new value of + * rx_itr_setting + */ +static bool ixgbe_update_rsc(struct ixgbe_adapter *adapter) +{ + struct net_device *netdev = adapter->netdev; + + /* nothing to do if LRO or RSC are not enabled */ + if (!(adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) || + !(netdev->features & NETIF_F_LRO)) + return false; + + /* check the feature flag value and enable RSC if necessary */ + if (adapter->rx_itr_setting == 1 || + adapter->rx_itr_setting > IXGBE_MIN_RSC_ITR) { + if (!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) { + adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED; + e_info(probe, "rx-usecs value high enough " + "to re-enable RSC\n"); + return true; + } + /* if interrupt rate is too high then disable RSC */ + } else if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) { + adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED; + e_info(probe, "rx-usecs set too low, disabling RSC\n"); + return true; + } + return false; +} + +/** + * ixgbe_set_coalesce - Configure interrupt coalescing settings + * @netdev: Network device structure + * @ec: Pointer to ethtool_coalesce structure with desired coalescing settings + * @kernel_coal: (Optional) Kernel-specific coalescing settings (unused) + * @extack: (Optional) Netlink extended acknowledgment structure (unused) + * + * This function sets the interrupt coalescing parameters for the specified + * network device based on the provided `ethtool_coalesce` structure. It + * validates the settings, updates the adapter's configuration, and applies + * changes to the interrupt throttle rate (ITR) settings. If necessary, it + * triggers a device reset to apply the changes. + * + * Return: 0 on success, or -EINVAL if the configuration is invalid. + */ +static int ixgbe_set_coalesce(struct net_device *netdev, +#ifdef HAVE_ETHTOOL_COALESCE_EXTACK + struct ethtool_coalesce *ec, + struct kernel_ethtool_coalesce *kernel_coal, + struct netlink_ext_ack *extack) +#else + struct ethtool_coalesce *ec) +#endif +{ + struct ixgbe_adapter *adapter = netdev_priv(netdev); + int i; + u16 tx_itr_param, rx_itr_param; + u16 tx_itr_prev; + bool need_reset = false; + + if (adapter->q_vector[0]->tx.count && adapter->q_vector[0]->rx.count) { + /* reject Tx specific changes in case of mixed RxTx vectors */ + if (ec->tx_coalesce_usecs) + return -EINVAL; + tx_itr_prev = adapter->rx_itr_setting; + } else { + tx_itr_prev = adapter->tx_itr_setting; + } + + if (ec->tx_max_coalesced_frames_irq) + adapter->tx_work_limit = ec->tx_max_coalesced_frames_irq; + + if ((ec->rx_coalesce_usecs > (IXGBE_MAX_EITR >> 2)) || + (ec->tx_coalesce_usecs > (IXGBE_MAX_EITR >> 2))) + return -EINVAL; + + if (ec->rx_coalesce_usecs > 1) + adapter->rx_itr_setting = ec->rx_coalesce_usecs << 2; + else + adapter->rx_itr_setting = ec->rx_coalesce_usecs; + + if (adapter->rx_itr_setting == 1) + rx_itr_param = IXGBE_20K_ITR; + else + rx_itr_param = adapter->rx_itr_setting; + + if (ec->tx_coalesce_usecs > 1) + adapter->tx_itr_setting = ec->tx_coalesce_usecs << 2; + else + adapter->tx_itr_setting = ec->tx_coalesce_usecs; + + if (adapter->tx_itr_setting == 1) + tx_itr_param = IXGBE_12K_ITR; + else + tx_itr_param = adapter->tx_itr_setting; + + /* mixed Rx/Tx */ + if (adapter->q_vector[0]->tx.count && adapter->q_vector[0]->rx.count) + adapter->tx_itr_setting = adapter->rx_itr_setting; + + /* detect ITR changes that require update of TXDCTL.WTHRESH */ + if ((adapter->tx_itr_setting != 1) && + (adapter->tx_itr_setting < IXGBE_100K_ITR)) { + if ((tx_itr_prev == 1) || + (tx_itr_prev >= IXGBE_100K_ITR)) + need_reset = true; + } else { + if ((tx_itr_prev != 1) && + (tx_itr_prev < IXGBE_100K_ITR)) + need_reset = true; + } + + /* check the old value and enable RSC if necessary */ + need_reset |= ixgbe_update_rsc(adapter); + + if (adapter->hw.mac.dmac_config.watchdog_timer && + (!adapter->rx_itr_setting && !adapter->tx_itr_setting)) { + e_info(probe, + "Disabling DMA coalescing because interrupt throttling is disabled\n"); + adapter->hw.mac.dmac_config.watchdog_timer = 0; + ixgbe_dmac_config(&adapter->hw); + } + + for (i = 0; i < adapter->num_q_vectors; i++) { + struct ixgbe_q_vector *q_vector = adapter->q_vector[i]; + + q_vector->tx.work_limit = adapter->tx_work_limit; + if (q_vector->tx.count && !q_vector->rx.count) + /* tx only */ + q_vector->itr = tx_itr_param; + else + /* rx only or mixed */ + q_vector->itr = rx_itr_param; + ixgbe_write_eitr(q_vector); + } + + /* + * do reset here at the end to make sure EITR==0 case is handled + * correctly w.r.t stopping tx, and changing TXDCTL.WTHRESH settings + * also locks in RSC enable/disable which requires reset + */ + if (need_reset) + ixgbe_do_reset(netdev); + + return 0; +} + +#ifndef HAVE_NDO_SET_FEATURES +/** + * ixgbe_get_rx_csum - Check if RX checksum offload is enabled + * @netdev: Network device structure + * + * This function returns a boolean value indicating whether receive checksum + * offload is enabled for the specified network device. + * + * Return: 1 if RX checksum offload is enabled, 0 otherwise. + */ +static u32 ixgbe_get_rx_csum(struct net_device *netdev) +{ + return !!(netdev->features & NETIF_F_RXCSUM); +} + +/** + * ixgbe_set_rx_csum - Enable or disable RX checksum offload + * @netdev: Network device structure + * @data: Boolean value to enable (non-zero) or disable (zero) RX checksum offload + * + * This function sets the receive checksum offload feature for the specified + * network device. It also adjusts related features such as LRO (Large Receive + * Offload) and RSC (Receive Side Coalescing) based on the RX checksum setting. + * If necessary, it triggers a device reset to apply changes. + * + * Return: 0 on success. + */ +static int ixgbe_set_rx_csum(struct net_device *netdev, u32 data) +{ + struct ixgbe_adapter *adapter = netdev_priv(netdev); + bool need_reset = false; + + if (data) + netdev->features |= NETIF_F_RXCSUM; + else + netdev->features &= ~NETIF_F_RXCSUM; + + /* LRO and RSC both depend on RX checksum to function */ + if (!data && (netdev->features & NETIF_F_LRO)) { + netdev->features &= ~NETIF_F_LRO; + + if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) { + adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED; + need_reset = true; + } + } + +#ifdef HAVE_VXLAN_RX_OFFLOAD + if (adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE && data) { + netdev->hw_enc_features |= NETIF_F_RXCSUM | + NETIF_F_IP_CSUM | + NETIF_F_IPV6_CSUM; + if (!need_reset) + adapter->flags2 |= IXGBE_FLAG2_VXLAN_REREG_NEEDED; + } else { + netdev->hw_enc_features &= ~(NETIF_F_RXCSUM | + NETIF_F_IP_CSUM | + NETIF_F_IPV6_CSUM); + ixgbe_clear_udp_tunnel_port(adapter, + IXGBE_VXLANCTRL_ALL_UDPPORT_MASK); + } +#endif /* HAVE_VXLAN_RX_OFFLOAD */ + + if (need_reset) + ixgbe_do_reset(netdev); + + return 0; +} + +/** + * ixgbe_set_tx_csum - Enable or disable TX checksum offload + * @netdev: Network device structure + * @data: Boolean value to enable (non-zero) or disable (zero) TX checksum offload + * + * This function sets the transmit checksum offload feature for the specified + * network device. It updates the device's features to enable or disable checksum + * offload for IP, IPv6, SCTP, and UDP tunnels, depending on the hardware type + * and capabilities. + * + * Return: 0 on success. + */ +static int ixgbe_set_tx_csum(struct net_device *netdev, u32 data) +{ + struct ixgbe_adapter *adapter = netdev_priv(netdev); +#ifdef NETIF_F_IPV6_CSUM + u32 feature_list = NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM; +#else + u32 feature_list = NETIF_F_IP_CSUM; +#endif + + switch (adapter->hw.mac.type) { + case ixgbe_mac_82599EB: + case ixgbe_mac_X540: + case ixgbe_mac_X550: + case ixgbe_mac_X550EM_x: + case ixgbe_mac_X550EM_a: + case ixgbe_mac_E610: +#ifdef HAVE_ENCAP_TSO_OFFLOAD + if (data) + netdev->hw_enc_features |= NETIF_F_GSO_UDP_TUNNEL; + else + netdev->hw_enc_features &= ~NETIF_F_GSO_UDP_TUNNEL; + feature_list |= NETIF_F_GSO_UDP_TUNNEL; +#endif /* HAVE_ENCAP_TSO_OFFLOAD */ + feature_list |= NETIF_F_SCTP_CSUM; + break; + default: + break; + } + + if (data) + netdev->features |= feature_list; + else + netdev->features &= ~feature_list; + + return 0; +} + +#ifdef NETIF_F_TSO +/** + * ixgbe_set_tso - Enable or disable TCP Segmentation Offload (TSO) + * @netdev: Network device structure + * @data: Boolean value to enable (non-zero) or disable (zero) TSO + * + * This function sets the TCP Segmentation Offload (TSO) feature for the + * specified network device. It updates the device's features to enable or + * disable TSO, and if VLANs are present and TSO is being disabled, it also + * disables TSO on all associated VLAN devices. + * + * Return: 0 on success. + */ +static int ixgbe_set_tso(struct net_device *netdev, u32 data) +{ +#ifdef NETIF_F_TSO6 + u32 feature_list = NETIF_F_TSO | NETIF_F_TSO6; +#else + u32 feature_list = NETIF_F_TSO; +#endif + + if (data) + netdev->features |= feature_list; + else + netdev->features &= ~feature_list; + +#ifndef HAVE_NETDEV_VLAN_FEATURES + if (!data) { + struct ixgbe_adapter *adapter = netdev_priv(netdev); + struct net_device *v_netdev; + int i; + + /* disable TSO on all VLANs if they're present */ + if (!adapter->vlgrp) + goto tso_out; + + for (i = 0; i < VLAN_GROUP_ARRAY_LEN; i++) { + v_netdev = vlan_group_get_device(adapter->vlgrp, i); + if (!v_netdev) + continue; + + v_netdev->features &= ~feature_list; + vlan_group_set_device(adapter->vlgrp, i, v_netdev); + } + } + +tso_out: + +#endif /* HAVE_NETDEV_VLAN_FEATURES */ + return 0; +} +#endif /* NETIF_F_TSO */ + +#ifdef ETHTOOL_GFLAGS +/** + * ixgbe_set_flags - Set device flags for the network device + * @netdev: Network device structure + * @data: New flags to be set + * + * This function sets various device flags for the specified network device + * based on the provided `data`. It validates the flags against supported + * options and updates the device's configuration accordingly. If necessary, + * it triggers a device reset to apply changes. + * + * Return: 0 on success, or a negative error code if the configuration is invalid. + */ +static int ixgbe_set_flags(struct net_device *netdev, u32 data) +{ + struct ixgbe_adapter *adapter = netdev_priv(netdev); + u32 supported_flags = ETH_FLAG_RXVLAN | ETH_FLAG_TXVLAN; + u32 changed = netdev->features ^ data; + bool need_reset = false; + int rc; + +#ifndef HAVE_VLAN_RX_REGISTER + if ((adapter->flags & IXGBE_FLAG_DCB_ENABLED) && + !(data & ETH_FLAG_RXVLAN)) + return -EINVAL; + +#endif + if (adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) + supported_flags |= ETH_FLAG_LRO; + +#ifdef ETHTOOL_GRXRINGS + switch (adapter->hw.mac.type) { + case ixgbe_mac_X550: + case ixgbe_mac_X550EM_x: + case ixgbe_mac_X550EM_a: + case ixgbe_mac_E610: + case ixgbe_mac_X540: + case ixgbe_mac_82599EB: + supported_flags |= ETH_FLAG_NTUPLE; + default: + break; + } + +#endif +#ifdef NETIF_F_RXHASH + supported_flags |= ETH_FLAG_RXHASH; + +#endif + rc = ethtool_op_set_flags(netdev, data, supported_flags); + if (rc) + return rc; + +#ifndef HAVE_VLAN_RX_REGISTER + if (changed & ETH_FLAG_RXVLAN) + ixgbe_vlan_mode(netdev, netdev->features); +#endif + +#ifdef HAVE_VXLAN_RX_OFFLOAD + if (adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE && + netdev->features & NETIF_F_RXCSUM) { + vxlan_get_rx_port(netdev); + else + ixgbe_clear_udp_tunnel_port(adapter, + IXGBE_VXLANCTRL_ALL_UDPPORT_MASK); + } +#endif /* HAVE_VXLAN_RX_OFFLOAD */ + + /* if state changes we need to update adapter->flags and reset */ + if (!(netdev->features & NETIF_F_LRO)) { + if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) + need_reset = true; + adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED; + } else if ((adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) && + !(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) { + if (adapter->rx_itr_setting == 1 || + adapter->rx_itr_setting > IXGBE_MIN_RSC_ITR) { + adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED; + need_reset = true; + } else if (changed & ETH_FLAG_LRO) { + e_info(probe, "rx-usecs set too low, " + "disabling RSC\n"); + } + } + +#ifdef ETHTOOL_GRXRINGS + /* + * Check if Flow Director n-tuple support was enabled or disabled. If + * the state changed, we need to reset. + */ + switch (netdev->features & NETIF_F_NTUPLE) { + case NETIF_F_NTUPLE: + /* turn off ATR, enable perfect filters and reset */ + if (!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)) + need_reset = true; + + adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE; + adapter->flags |= IXGBE_FLAG_FDIR_PERFECT_CAPABLE; + break; + default: + /* turn off perfect filters, enable ATR and reset */ + if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE) + need_reset = true; + + adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE; + + /* We cannot enable ATR if VMDq is enabled */ + if (adapter->flags & IXGBE_FLAG_VMDQ_ENABLED) + break; + + /* We cannot enable ATR if we have 2 or more traffic classes */ + if (netdev_get_num_tc(netdev) > 1) + break; + + /* We cannot enable ATR if RSS is disabled */ + if (adapter->ring_feature[RING_F_RSS].limit <= 1) + break; + + /* A sample rate of 0 indicates ATR disabled */ + if (!adapter->atr_sample_rate) + break; + + adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE; + break; + } + +#endif /* ETHTOOL_GRXRINGS */ + if (need_reset) + ixgbe_do_reset(netdev); + + return 0; +} + +#endif /* ETHTOOL_GFLAGS */ +#endif /* HAVE_NDO_SET_FEATURES */ +#ifdef ETHTOOL_GRXRINGS +static int ixgbe_get_ethtool_fdir_entry(struct ixgbe_adapter *adapter, + struct ethtool_rxnfc *cmd) +{ + struct ethtool_rx_flow_spec *fsp = + (struct ethtool_rx_flow_spec *)&cmd->fs; + struct ixgbe_fdir_filter *rule = NULL; + union ixgbe_atr_input *mask; + struct hlist_node *node2; + int ret; + + /* report total rule count */ + cmd->data = (1024 << adapter->fdir_pballoc) - 2; + + spin_lock(&adapter->fdir_perfect_lock); + + hlist_for_each_entry_safe(rule, node2, + &adapter->fdir_filter_list, fdir_node) { + if (fsp->location <= rule->sw_idx) + break; + } + + if (!rule || fsp->location != rule->sw_idx) { + ret = -EINVAL; + goto err_out; + } + + /* fill out the flow spec entry */ + + /* set flow type field */ + switch (rule->filter.formatted.flow_type) { + case IXGBE_ATR_FLOW_TYPE_TCPV4: + fsp->flow_type = TCP_V4_FLOW; + break; + case IXGBE_ATR_FLOW_TYPE_UDPV4: + fsp->flow_type = UDP_V4_FLOW; + break; + case IXGBE_ATR_FLOW_TYPE_TCPV6: + fsp->flow_type = TCP_V6_FLOW; + break; + case IXGBE_ATR_FLOW_TYPE_UDPV6: + fsp->flow_type = UDP_V6_FLOW; + break; + case IXGBE_ATR_FLOW_TYPE_SCTPV4: + fsp->flow_type = SCTP_V4_FLOW; + break; + case IXGBE_ATR_FLOW_TYPE_IPV4: + fsp->flow_type = IP_USER_FLOW; + fsp->h_u.usr_ip4_spec.ip_ver = ETH_RX_NFC_IP4; + fsp->h_u.usr_ip4_spec.proto = 0; + fsp->m_u.usr_ip4_spec.proto = 0; + break; + default: + ret = -EINVAL; + goto err_out; + } + + mask = &adapter->fdir_mask; +#ifdef HAVE_ETHTOOL_FLOW_UNION_IP6_SPEC + if (rule->filter.formatted.flow_type & IXGBE_ATR_L4TYPE_IPV6_MASK) { + fsp->h_u.tcp_ip6_spec.psrc = rule->filter.formatted.src_port; + fsp->m_u.tcp_ip6_spec.psrc = mask->formatted.src_port; + fsp->h_u.tcp_ip6_spec.pdst = rule->filter.formatted.dst_port; + fsp->m_u.tcp_ip6_spec.pdst = mask->formatted.dst_port; + } else { +#endif + fsp->h_u.tcp_ip4_spec.psrc = rule->filter.formatted.src_port; + fsp->m_u.tcp_ip4_spec.psrc = mask->formatted.src_port; + fsp->h_u.tcp_ip4_spec.pdst = rule->filter.formatted.dst_port; + fsp->m_u.tcp_ip4_spec.pdst = mask->formatted.dst_port; + fsp->h_u.tcp_ip4_spec.ip4src = rule->filter.formatted.src_ip[0]; + fsp->m_u.tcp_ip4_spec.ip4src = mask->formatted.src_ip[0]; + fsp->h_u.tcp_ip4_spec.ip4dst = rule->filter.formatted.dst_ip[0]; + fsp->m_u.tcp_ip4_spec.ip4dst = mask->formatted.dst_ip[0]; +#ifdef HAVE_ETHTOOL_FLOW_UNION_IP6_SPEC + } +#endif + + fsp->h_ext.vlan_tci = rule->filter.formatted.vlan_id; + fsp->m_ext.vlan_tci = mask->formatted.vlan_id; + fsp->h_ext.vlan_etype = rule->filter.formatted.flex_bytes; + fsp->m_ext.vlan_etype = mask->formatted.flex_bytes; + fsp->h_ext.data[1] = htonl(rule->filter.formatted.vm_pool); + fsp->m_ext.data[1] = htonl(mask->formatted.vm_pool); + fsp->flow_type |= FLOW_EXT; + + /* record action */ + if (rule->action == IXGBE_FDIR_DROP_QUEUE) + fsp->ring_cookie = RX_CLS_FLOW_DISC; + else + fsp->ring_cookie = rule->action; + + spin_unlock(&adapter->fdir_perfect_lock); + return 0; + +err_out: + spin_unlock(&adapter->fdir_perfect_lock); + return ret; +} + +static int ixgbe_get_ethtool_fdir_all(struct ixgbe_adapter *adapter, + struct ethtool_rxnfc *cmd, + u32 *rule_locs) +{ + struct hlist_node *node2; + struct ixgbe_fdir_filter *rule; + int cnt = 0; + + /* report total rule count */ + cmd->data = (1024 << adapter->fdir_pballoc) - 2; + + hlist_for_each_entry_safe(rule, node2, + &adapter->fdir_filter_list, fdir_node) { + if (cnt == cmd->rule_cnt) + return -EMSGSIZE; + rule_locs[cnt] = rule->sw_idx; + cnt++; + } + + cmd->rule_cnt = cnt; + + return 0; +} + +static int ixgbe_get_rss_hash_opts(struct ixgbe_adapter *adapter, + struct ethtool_rxnfc *cmd) +{ + cmd->data = 0; + + /* Report default options for RSS on ixgbe */ + switch (cmd->flow_type) { + case TCP_V4_FLOW: + cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; + fallthrough; + case UDP_V4_FLOW: + if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP) + cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; + fallthrough; + case SCTP_V4_FLOW: + case AH_ESP_V4_FLOW: + case AH_V4_FLOW: + case ESP_V4_FLOW: + case IPV4_FLOW: + cmd->data |= RXH_IP_SRC | RXH_IP_DST; + break; + case TCP_V6_FLOW: + cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; + fallthrough; + case UDP_V6_FLOW: + if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP) + cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; + fallthrough; + case SCTP_V6_FLOW: + case AH_ESP_V6_FLOW: + case AH_V6_FLOW: + case ESP_V6_FLOW: + case IPV6_FLOW: + cmd->data |= RXH_IP_SRC | RXH_IP_DST; + break; + default: + return -EINVAL; + } + + return 0; +} + +/** + * ixgbe_get_rxnfc - Retrieve RX network flow classification settings + * @dev: Network device structure + * @cmd: Pointer to ethtool_rxnfc structure specifying the command and data + * @rule_locs: Buffer to store rule locations (optional, type depends on kernel) + * + * This function handles various ethtool commands related to RX network flow + * classification for the specified network device. It supports commands to + * get the number of RX rings, flow director rule count, specific flow director + * rules, all flow director rules, and RSS hash options. + * + * Return: 0 on success, or a negative error code if the command is not supported. + */ +static int ixgbe_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd, +#ifdef HAVE_ETHTOOL_GET_RXNFC_VOID_RULE_LOCS + void *rule_locs) +#else + u32 *rule_locs) +#endif +{ + struct ixgbe_adapter *adapter = netdev_priv(dev); + int ret = -EOPNOTSUPP; + + switch (cmd->cmd) { + case ETHTOOL_GRXRINGS: + cmd->data = adapter->num_rx_queues; + ret = 0; + break; + case ETHTOOL_GRXCLSRLCNT: + cmd->rule_cnt = adapter->fdir_filter_count; + ret = 0; + break; + case ETHTOOL_GRXCLSRULE: + ret = ixgbe_get_ethtool_fdir_entry(adapter, cmd); + break; + case ETHTOOL_GRXCLSRLALL: + ret = ixgbe_get_ethtool_fdir_all(adapter, cmd, + (u32 *)rule_locs); + break; + case ETHTOOL_GRXFH: + ret = ixgbe_get_rss_hash_opts(adapter, cmd); + break; + default: + break; + } + + return ret; +} + +int ixgbe_update_ethtool_fdir_entry(struct ixgbe_adapter *adapter, + struct ixgbe_fdir_filter *input, + u16 sw_idx) +{ + struct ixgbe_hw *hw = &adapter->hw; + struct hlist_node *node2; + struct ixgbe_fdir_filter *rule, *parent; + bool deleted = false; + s32 err; + + parent = NULL; + rule = NULL; + + hlist_for_each_entry_safe(rule, node2, + &adapter->fdir_filter_list, fdir_node) { + /* hash found, or no matching entry */ + if (rule->sw_idx >= sw_idx) + break; + parent = rule; + } + + /* if there is an old rule occupying our place remove it */ + if (rule && (rule->sw_idx == sw_idx)) { + /* hardware filters are only configured when interface is up, + * and we should not issue filter commands while the interface + * is down + */ + if (netif_running(adapter->netdev) && + (!input || (rule->filter.formatted.bkt_hash != + input->filter.formatted.bkt_hash))) { + err = ixgbe_fdir_erase_perfect_filter_82599(hw, + &rule->filter, + sw_idx); + if (err) + return -EINVAL; + } + + hlist_del(&rule->fdir_node); + kfree(rule); + adapter->fdir_filter_count--; + deleted = true; + } + + /* If we weren't given an input, then this was a request to delete a + * filter. We should return -EINVAL if the filter wasn't found, but + * return 0 if the rule was successfully deleted. + */ + if (!input) + return deleted ? 0 : -EINVAL; + + /* initialize node and set software index */ + INIT_HLIST_NODE(&input->fdir_node); + + /* add filter to the list */ + if (parent) + hlist_add_behind(&input->fdir_node, &parent->fdir_node); + else + hlist_add_head(&input->fdir_node, + &adapter->fdir_filter_list); + + /* update counts */ + adapter->fdir_filter_count++; + + return 0; +} + +static int ixgbe_flowspec_to_flow_type(struct ethtool_rx_flow_spec *fsp, + u8 *flow_type) +{ + switch (fsp->flow_type & ~FLOW_EXT) { + case TCP_V4_FLOW: + *flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4; + break; + case UDP_V4_FLOW: + *flow_type = IXGBE_ATR_FLOW_TYPE_UDPV4; + break; + case TCP_V6_FLOW: + *flow_type = IXGBE_ATR_FLOW_TYPE_TCPV6; + break; + case UDP_V6_FLOW: + *flow_type = IXGBE_ATR_FLOW_TYPE_UDPV6; + break; + case SCTP_V4_FLOW: + *flow_type = IXGBE_ATR_FLOW_TYPE_SCTPV4; + break; + case IP_USER_FLOW: + switch (fsp->h_u.usr_ip4_spec.proto) { + case IPPROTO_TCP: + *flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4; + break; + case IPPROTO_UDP: + *flow_type = IXGBE_ATR_FLOW_TYPE_UDPV4; + break; + case IPPROTO_SCTP: + *flow_type = IXGBE_ATR_FLOW_TYPE_SCTPV4; + break; + case 0: + if (!fsp->m_u.usr_ip4_spec.proto) { + *flow_type = IXGBE_ATR_FLOW_TYPE_IPV4; + break; + } + fallthrough; + default: + return 0; + } + break; + default: + return 0; + } + + return 1; +} + +static bool ixgbe_match_ethtool_fdir_entry(struct ixgbe_adapter *adapter, + struct ixgbe_fdir_filter *input) +{ + struct hlist_node *node2; + struct ixgbe_fdir_filter *rule = NULL; + + hlist_for_each_entry_safe(rule, node2, + &adapter->fdir_filter_list, fdir_node) { + if (rule->filter.formatted.bkt_hash == + input->filter.formatted.bkt_hash && + rule->action == input->action) { + e_info(drv, "FDIR entry already exist\n"); + return true; + } + } + return false; +} + +static int ixgbe_add_ethtool_fdir_entry(struct ixgbe_adapter *adapter, + struct ethtool_rxnfc *cmd) +{ + struct ethtool_rx_flow_spec *fsp = + (struct ethtool_rx_flow_spec *)&cmd->fs; + struct ixgbe_hw *hw = &adapter->hw; + struct ixgbe_fdir_filter *input; + union ixgbe_atr_input mask; + u8 queue; + int err; + + if (!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)) + return -EOPNOTSUPP; + + /* ring_cookie is a masked into a set of queues and ixgbe pools or + * we use drop index + */ + if (fsp->ring_cookie == RX_CLS_FLOW_DISC) { + queue = IXGBE_FDIR_DROP_QUEUE; + } else { + u32 ring = ethtool_get_flow_spec_ring(fsp->ring_cookie); + u8 vf = ethtool_get_flow_spec_ring_vf(fsp->ring_cookie); + + if (!vf && ring >= adapter->num_rx_queues) + return -EINVAL; + else if (vf && + ((vf > adapter->num_vfs) || + ring >= adapter->num_rx_queues_per_pool)) + return -EINVAL; + + /* Map the ring onto the absolute queue index */ + if (!vf) + queue = adapter->rx_ring[ring]->reg_idx; + else + queue = ((vf - 1) * + adapter->num_rx_queues_per_pool) + ring; + } + + /* Don't allow indexes to exist outside of available space */ + if (fsp->location >= ((1024 << adapter->fdir_pballoc) - 2)) { + e_err(drv, "Location out of range\n"); + return -EINVAL; + } + + input = kzalloc(sizeof(*input), GFP_ATOMIC); + if (!input) + return -ENOMEM; + + memset(&mask, 0, sizeof(union ixgbe_atr_input)); + + /* set SW index */ + input->sw_idx = fsp->location; + + spin_lock(&adapter->fdir_perfect_lock); + /* record flow type */ + if (!ixgbe_flowspec_to_flow_type(fsp, + &input->filter.formatted.flow_type)) { + e_err(drv, "Unrecognized flow type\n"); + goto err_out_w_lock; + } + + mask.formatted.flow_type = IXGBE_ATR_L4TYPE_IPV6_MASK | + IXGBE_ATR_L4TYPE_MASK; + + if (input->filter.formatted.flow_type == IXGBE_ATR_FLOW_TYPE_IPV4) + mask.formatted.flow_type &= IXGBE_ATR_L4TYPE_IPV6_MASK; + +#ifdef HAVE_ETHTOOL_FLOW_UNION_IP6_SPEC + /* not support full IPV6 address filtering */ + if (input->filter.formatted.flow_type & IXGBE_ATR_L4TYPE_IPV6_MASK) { + if (fsp->m_u.tcp_ip6_spec.ip6src[0] || + fsp->m_u.tcp_ip6_spec.ip6src[1] || + fsp->m_u.tcp_ip6_spec.ip6src[2] || + fsp->m_u.tcp_ip6_spec.ip6src[3] || + fsp->m_u.tcp_ip6_spec.ip6dst[0] || + fsp->m_u.tcp_ip6_spec.ip6dst[1] || + fsp->m_u.tcp_ip6_spec.ip6dst[2] || + fsp->m_u.tcp_ip6_spec.ip6dst[3]) { + e_err(drv, "Error not support IPv6 address fitlers\n"); + goto err_out_w_lock; + } + input->filter.formatted.src_port = fsp->h_u.tcp_ip6_spec.psrc; + mask.formatted.src_port = fsp->m_u.tcp_ip6_spec.psrc; + input->filter.formatted.dst_port = fsp->h_u.tcp_ip6_spec.pdst; + mask.formatted.dst_port = fsp->m_u.tcp_ip6_spec.pdst; + } else { +#endif + /* Copy input into formatted structures */ + input->filter.formatted.src_ip[0] = + fsp->h_u.tcp_ip4_spec.ip4src; + mask.formatted.src_ip[0] = + fsp->m_u.tcp_ip4_spec.ip4src; + input->filter.formatted.dst_ip[0] = + fsp->h_u.tcp_ip4_spec.ip4dst; + mask.formatted.dst_ip[0] = + fsp->m_u.tcp_ip4_spec.ip4dst; + input->filter.formatted.src_port = + fsp->h_u.tcp_ip4_spec.psrc; + mask.formatted.src_port = + fsp->m_u.tcp_ip4_spec.psrc; + input->filter.formatted.dst_port = + fsp->h_u.tcp_ip4_spec.pdst; + mask.formatted.dst_port = + fsp->m_u.tcp_ip4_spec.pdst; +#ifdef HAVE_ETHTOOL_FLOW_UNION_IP6_SPEC + } +#endif + + if (fsp->flow_type & FLOW_EXT) { + input->filter.formatted.vm_pool = + (unsigned char)ntohl(fsp->h_ext.data[1]); + mask.formatted.vm_pool = + (unsigned char)ntohl(fsp->m_ext.data[1]); + input->filter.formatted.vlan_id = fsp->h_ext.vlan_tci; + mask.formatted.vlan_id = fsp->m_ext.vlan_tci; + input->filter.formatted.flex_bytes = + fsp->h_ext.vlan_etype; + mask.formatted.flex_bytes = fsp->m_ext.vlan_etype; + } + + /* determine if we need to drop or route the packet */ + if (fsp->ring_cookie == RX_CLS_FLOW_DISC) + input->action = IXGBE_FDIR_DROP_QUEUE; + else + input->action = fsp->ring_cookie; + + if (hlist_empty(&adapter->fdir_filter_list)) { + /* save mask and program input mask into HW */ + memcpy(&adapter->fdir_mask, &mask, sizeof(mask)); + err = ixgbe_fdir_set_input_mask_82599(hw, &mask, adapter->cloud_mode); + if (err) { + e_err(drv, "Error writing mask\n"); + goto err_out_w_lock; + } + } else if (memcmp(&adapter->fdir_mask, &mask, sizeof(mask))) { + e_err(drv, "Hardware only supports one mask per port. To change the mask you must first delete all the rules.\n"); + goto err_out_w_lock; + } + + /* apply mask and compute/store hash */ + ixgbe_atr_compute_perfect_hash_82599(&input->filter, &mask); + + /* check if new entry does not exist on filter list */ + if (ixgbe_match_ethtool_fdir_entry(adapter, input)) + goto err_out_w_lock; + + /* only program filters to hardware if the net device is running, as + * we store the filters in the Rx buffer which is not allocated when + * the device is down + */ + if (netif_running(adapter->netdev)) { + err = ixgbe_fdir_write_perfect_filter_82599(hw, + &input->filter, input->sw_idx, queue, + adapter->cloud_mode); + if (err) + goto err_out_w_lock; + } + + ixgbe_update_ethtool_fdir_entry(adapter, input, input->sw_idx); + + spin_unlock(&adapter->fdir_perfect_lock); + + return 0; +err_out_w_lock: + spin_unlock(&adapter->fdir_perfect_lock); + kfree(input); + return -EINVAL; +} + +static int ixgbe_del_ethtool_fdir_entry(struct ixgbe_adapter *adapter, + struct ethtool_rxnfc *cmd) +{ + struct ethtool_rx_flow_spec *fsp = + (struct ethtool_rx_flow_spec *)&cmd->fs; + int err; + + spin_lock(&adapter->fdir_perfect_lock); + err = ixgbe_update_ethtool_fdir_entry(adapter, NULL, fsp->location); + spin_unlock(&adapter->fdir_perfect_lock); + + return err; +} + +#ifdef ETHTOOL_SRXNTUPLE +/** + * ixgbe_set_rx_ntuple - Stub function for setting RX n-tuple filters + * @dev: Network device structure (unused) + * @cmd: RX n-tuple command structure (unused) + * + * This function is a stub for setting RX n-tuple filters and always returns + * -EOPNOTSUPP. It is retained for compatibility with older kernel versions + * (2.6.33 - 2.6.39) to prevent null pointer dereferences when the + * NETIF_F_NTUPLE flag is defined. + * + * Return: -EOPNOTSUPP, indicating the operation is not supported. + */ +static int ixgbe_set_rx_ntuple(struct net_device __always_unused *dev, + struct ethtool_rx_ntuple __always_unused *cmd) +{ + return -EOPNOTSUPP; +} + +#endif +#define UDP_RSS_FLAGS (IXGBE_FLAG2_RSS_FIELD_IPV4_UDP | \ + IXGBE_FLAG2_RSS_FIELD_IPV6_UDP) +static int ixgbe_set_rss_hash_opt(struct ixgbe_adapter *adapter, + struct ethtool_rxnfc *nfc) +{ + u32 flags2 = adapter->flags2; + + /* + * RSS does not support anything other than hashing + * to queues on src and dst IPs and ports + */ + if (nfc->data & ~(RXH_IP_SRC | RXH_IP_DST | + RXH_L4_B_0_1 | RXH_L4_B_2_3)) + return -EINVAL; + + switch (nfc->flow_type) { + case TCP_V4_FLOW: + case TCP_V6_FLOW: + if (!(nfc->data & RXH_IP_SRC) || + !(nfc->data & RXH_IP_DST) || + !(nfc->data & RXH_L4_B_0_1) || + !(nfc->data & RXH_L4_B_2_3)) + return -EINVAL; + break; + case UDP_V4_FLOW: + if (!(nfc->data & RXH_IP_SRC) || + !(nfc->data & RXH_IP_DST)) + return -EINVAL; + switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) { + case 0: + flags2 &= ~IXGBE_FLAG2_RSS_FIELD_IPV4_UDP; + break; + case (RXH_L4_B_0_1 | RXH_L4_B_2_3): + flags2 |= IXGBE_FLAG2_RSS_FIELD_IPV4_UDP; + break; + default: + return -EINVAL; + } + break; + case UDP_V6_FLOW: + if (!(nfc->data & RXH_IP_SRC) || + !(nfc->data & RXH_IP_DST)) + return -EINVAL; + switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) { + case 0: + flags2 &= ~IXGBE_FLAG2_RSS_FIELD_IPV6_UDP; + break; + case (RXH_L4_B_0_1 | RXH_L4_B_2_3): + flags2 |= IXGBE_FLAG2_RSS_FIELD_IPV6_UDP; + break; + default: + return -EINVAL; + } + break; + case AH_ESP_V4_FLOW: + case AH_V4_FLOW: + case ESP_V4_FLOW: + case SCTP_V4_FLOW: + case AH_ESP_V6_FLOW: + case AH_V6_FLOW: + case ESP_V6_FLOW: + case SCTP_V6_FLOW: + if (!(nfc->data & RXH_IP_SRC) || + !(nfc->data & RXH_IP_DST) || + (nfc->data & RXH_L4_B_0_1) || + (nfc->data & RXH_L4_B_2_3)) + return -EINVAL; + break; + default: + return -EINVAL; + } + + /* if we changed something we need to update flags */ + if (flags2 != adapter->flags2) { + struct ixgbe_hw *hw = &adapter->hw; + u32 mrqc; + unsigned int pf_pool = adapter->num_vfs; + + if ((hw->mac.type >= ixgbe_mac_X550) && + (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)) + mrqc = IXGBE_READ_REG(hw, IXGBE_PFVFMRQC(pf_pool)); + else + mrqc = IXGBE_READ_REG(hw, IXGBE_MRQC); + + if ((flags2 & UDP_RSS_FLAGS) && + !(adapter->flags2 & UDP_RSS_FLAGS)) + e_warn(drv, "enabling UDP RSS: fragmented packets" + " may arrive out of order to the stack above\n"); + + adapter->flags2 = flags2; + + /* Perform hash on these packet types */ + mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4 + | IXGBE_MRQC_RSS_FIELD_IPV4_TCP + | IXGBE_MRQC_RSS_FIELD_IPV6 + | IXGBE_MRQC_RSS_FIELD_IPV6_TCP; + + mrqc &= ~(IXGBE_MRQC_RSS_FIELD_IPV4_UDP | + IXGBE_MRQC_RSS_FIELD_IPV6_UDP); + + if (flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP) + mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP; + + if (flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP) + mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP; + + if ((hw->mac.type >= ixgbe_mac_X550) && + (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)) + IXGBE_WRITE_REG(hw, IXGBE_PFVFMRQC(pf_pool), mrqc); + else + IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc); + } + + return 0; +} + +/** + * ixgbe_set_rxnfc - Configure RX network flow classification + * @dev: Network device structure + * @cmd: Pointer to ethtool_rxnfc structure specifying the command and data + * + * This function handles various ethtool commands related to RX network flow + * classification for the specified network device. It supports adding and + * deleting flow director entries and setting RSS hash options. + * + * Return: 0 on success, or -EOPNOTSUPP if the command is not supported. + */ +static int ixgbe_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd) +{ + struct ixgbe_adapter *adapter = netdev_priv(dev); + int ret = -EOPNOTSUPP; + + switch (cmd->cmd) { + case ETHTOOL_SRXCLSRLINS: + ret = ixgbe_add_ethtool_fdir_entry(adapter, cmd); + break; + case ETHTOOL_SRXCLSRLDEL: + ret = ixgbe_del_ethtool_fdir_entry(adapter, cmd); + break; + case ETHTOOL_SRXFH: + ret = ixgbe_set_rss_hash_opt(adapter, cmd); + break; + default: + break; + } + + return ret; +} + +#if defined(ETHTOOL_GRSSH) && defined(ETHTOOL_SRSSH) +/** + * ixgbe_rss_indir_tbl_max - Get the maximum size of the RSS indirection table + * @adapter: Pointer to the ixgbe adapter structure + * + * This function returns the maximum size of the Receive Side Scaling (RSS) + * indirection table for the specified adapter. The size depends on the + * hardware type, with older models supporting up to 16 entries and newer + * models (X550 and above) supporting up to 64 entries. + * + * Return: The maximum number of entries in the RSS indirection table. + */ +static int ixgbe_rss_indir_tbl_max(struct ixgbe_adapter *adapter) +{ + if (adapter->hw.mac.type < ixgbe_mac_X550) + return 16; + else + return 64; +} + +/** + * ixgbe_get_rxfh_key_size - Get the size of the RX flow hash key + * @netdev: Network device structure + * + * This function returns the size of the receive flow hash key for the specified + * network device. The key size is defined by the constant `IXGBE_RSS_KEY_SIZE`. + * + * Return: The size of the RX flow hash key. + */ +static u32 ixgbe_get_rxfh_key_size(struct net_device *netdev) +{ + return IXGBE_RSS_KEY_SIZE; +} + +/** + * ixgbe_rss_indir_size - Get the size of the RSS indirection table + * @netdev: Network device structure + * + * This function returns the size of the Receive Side Scaling (RSS) indirection + * table for the specified network device. The size is determined by the number + * of entries in the indirection table. + * + * Return: The size of the RSS indirection table. + */ +static u32 ixgbe_rss_indir_size(struct net_device *netdev) +{ + struct ixgbe_adapter *adapter = netdev_priv(netdev); + + return ixgbe_rss_indir_tbl_entries(adapter); +} + +/** + * ixgbe_get_reta - Retrieve the RSS indirection table + * @adapter: Pointer to the ixgbe adapter structure + * @indir: Buffer to store the retrieved indirection table entries + * + * This function populates the provided buffer with the current entries of the + * Receive Side Scaling (RSS) indirection table for the specified adapter. It + * considers the RSS mask and adjusts for SR-IOV if enabled. + */ +static void ixgbe_get_reta(struct ixgbe_adapter *adapter, u32 *indir) +{ + int i, reta_size = ixgbe_rss_indir_tbl_entries(adapter); + u16 rss_m = adapter->ring_feature[RING_F_RSS].mask; + + if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) + rss_m = adapter->ring_feature[RING_F_RSS].indices - 1; + + for (i = 0; i < reta_size; i++) + indir[i] = adapter->rss_indir_tbl[i] & rss_m; +} + +/** + * ixgbe_get_rxfh - Retrieve RX flow hash configuration + * @netdev: Network device structure + * @rxfh: (Optional) Pointer to ethtool_rxfh_param structure for RX flow hash + * @indir: (Optional) Buffer to store the indirection table + * @key: (Optional) Buffer to store the RSS key + * @hfunc: (Optional) Buffer to store the hash function + * + * This function retrieves the RX flow hash configuration for the specified + * network device. It populates the indirection table, RSS key, and hash + * function based on the device's current settings. The function supports + * different parameter configurations based on kernel capabilities. + * + * Return: 0 on success. + */ +#ifdef HAVE_RXFH_HASHFUNC +#ifdef HAVE_ETHTOOL_RXFH_PARAM +static int ixgbe_get_rxfh(struct net_device *netdev, + struct ethtool_rxfh_param *rxfh) +#else +static int ixgbe_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key, + u8 *hfunc) +#endif /* HAVE_ETHTOOL_RXFH_PARAM */ +#else +static int ixgbe_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key) +#endif +{ + struct ixgbe_adapter *adapter = netdev_priv(netdev); +#ifdef HAVE_ETHTOOL_RXFH_PARAM + u32 *indir = rxfh->indir; + u8 *key = rxfh->key; +#endif /* HAVE_ETHTOOL_RXFH_PARAM */ + +#ifdef HAVE_RXFH_HASHFUNC +#ifdef HAVE_ETHTOOL_RXFH_PARAM + rxfh->hfunc = ETH_RSS_HASH_TOP; +#else + if (hfunc) + *hfunc = ETH_RSS_HASH_TOP; +#endif /* HAVE_ETHTOOL_RXFH_PARAM */ +#endif + + if (indir) + ixgbe_get_reta(adapter, indir); + + if (key) + memcpy(key, adapter->rss_key, ixgbe_get_rxfh_key_size(netdev)); + + return 0; +} + +#ifdef HAVE_RXFH_HASHFUNC +#ifdef HAVE_ETHTOOL_RXFH_PARAM +/** + * ixgbe_set_rxfh - Set RX flow hash configuration + * @netdev: Network device structure + * @rxfh: (Optional) Pointer to ethtool_rxfh_param structure for RX flow hash + * @extack: (Optional) Netlink extended acknowledgment structure (unused) + * @indir: (Optional) Indirection table + * @key: (Optional) RSS key + * @hfunc: (Optional) Hash function (unused) + * + * This function sets the RX flow hash configuration for the specified network + * device. It updates the indirection table and RSS key based on the provided + * parameters. The function supports different parameter configurations based + * on kernel capabilities. + * + * Return: 0 on success, or -EINVAL if the configuration is invalid. + */ +static int ixgbe_set_rxfh(struct net_device *netdev, + struct ethtool_rxfh_param *rxfh, + struct netlink_ext_ack *extack) +#else +static int ixgbe_set_rxfh(struct net_device *netdev, const u32 *indir, + const u8 *key, const u8 hfunc) +#endif /* HAVE_ETHTOOL_RXFH_PARAM */ +#else +#ifdef HAVE_RXFH_NONCONST +static int ixgbe_set_rxfh(struct net_device *netdev, u32 *indir, u8 *key) +#else +static int ixgbe_set_rxfh(struct net_device *netdev, const u32 *indir, + const u8 *key) +#endif /* HAVE_RXFH_NONCONST */ +#endif /* HAVE_RXFH_HASHFUNC */ +{ + struct ixgbe_adapter *adapter = netdev_priv(netdev); +#ifdef HAVE_ETHTOOL_RXFH_PARAM + u32 *indir = rxfh->indir; + u8 *key = rxfh->key; +#endif /* HAVE_ETHTOOL_RXFH_PARAM */ + int i; + u32 reta_entries = ixgbe_rss_indir_tbl_entries(adapter); + +#ifdef HAVE_RXFH_HASHFUNC +#ifndef HAVE_ETHTOOL_RXFH_PARAM + if (hfunc) + return -EINVAL; +#endif /* !HAVE_ETHTOOL_RXFH_PARAM */ +#endif + + /* Fill out the redirection table */ + if (indir) { + int max_queues = min_t(int, adapter->num_rx_queues, + ixgbe_rss_indir_tbl_max(adapter)); + + /*Allow at least 2 queues w/ SR-IOV.*/ + if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) && + (max_queues < 2)) + max_queues = 2; + + /* Verify user input. */ + for (i = 0; i < reta_entries; i++) + if (indir[i] >= max_queues) + return -EINVAL; + + for (i = 0; i < reta_entries; i++) + adapter->rss_indir_tbl[i] = indir[i]; + + ixgbe_store_reta(adapter); + } + + /* Fill out the rss hash key */ + if (key) { + memcpy(adapter->rss_key, key, ixgbe_get_rxfh_key_size(netdev)); + ixgbe_store_key(adapter); + } + + return 0; +} +#endif /* ETHTOOL_GRSSH && ETHTOOL_SRSSH */ + +/** + * ixgbe_get_ts_info - Retrieve timestamping capabilities for the network device + * @dev: Network device structure + * @info: Pointer to ethtool_ts_info or kernel_ethtool_ts_info structure + * + * This function populates the provided structure with the timestamping + * capabilities of the network device. It sets the supported receive filters, + * timestamping modes, and PTP hardware clock index based on the device's + * hardware type and capabilities. + * + * Return: 0 on success, or a negative error code if the operation is not supported. + */ +#ifdef HAVE_ETHTOOL_GET_TS_INFO +#ifdef HAVE_ETHTOOL_KERNEL_TS_INFO +static int ixgbe_get_ts_info(struct net_device *dev, + struct kernel_ethtool_ts_info *info) +#else +static int ixgbe_get_ts_info(struct net_device *dev, + struct ethtool_ts_info *info) +#endif /* HAVE_ETHTOOL_KERNEL_TS_INFO */ +{ + struct ixgbe_adapter *adapter = netdev_priv(dev); + + /* we always support timestamping disabled */ + info->rx_filters = BIT(HWTSTAMP_FILTER_NONE); + + switch (adapter->hw.mac.type) { +#ifdef HAVE_PTP_1588_CLOCK + case ixgbe_mac_X550: + case ixgbe_mac_X550EM_x: + case ixgbe_mac_X550EM_a: + info->rx_filters |= BIT(HWTSTAMP_FILTER_ALL); + break; + case ixgbe_mac_E610: + info->rx_filters |= BIT(HWTSTAMP_FILTER_ALL); + break; + case ixgbe_mac_X540: + case ixgbe_mac_82599EB: + info->rx_filters |= + BIT(HWTSTAMP_FILTER_PTP_V1_L4_SYNC) | + BIT(HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) | + BIT(HWTSTAMP_FILTER_PTP_V2_EVENT); + break; +#endif /* HAVE_PTP_1588_CLOCK */ + default: + return ethtool_op_get_ts_info(dev, info); + } +#ifdef HAVE_PTP_1588_CLOCK + + info->so_timestamping = + SOF_TIMESTAMPING_TX_SOFTWARE | + SOF_TIMESTAMPING_RX_SOFTWARE | + SOF_TIMESTAMPING_SOFTWARE | + SOF_TIMESTAMPING_TX_HARDWARE | + SOF_TIMESTAMPING_RX_HARDWARE | + SOF_TIMESTAMPING_RAW_HARDWARE; + + if (adapter->ptp_clock) + info->phc_index = ptp_clock_index(adapter->ptp_clock); + else + info->phc_index = -1; + + info->tx_types = + BIT(HWTSTAMP_TX_OFF) | + BIT(HWTSTAMP_TX_ON); + + return 0; +#endif /* HAVE_PTP_1588_CLOCK */ +} +#endif /* HAVE_ETHTOOL_GET_TS_INFO */ + +#endif /* ETHTOOL_GRXRINGS */ +#ifdef ETHTOOL_SCHANNELS +static unsigned int ixgbe_max_channels(struct ixgbe_adapter *adapter) +{ + unsigned int max_combined; + u8 tcs = netdev_get_num_tc(adapter->netdev); + + if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) { + /* We only support one q_vector without MSI-X */ + max_combined = 1; + } else if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) { + /* Limit value based on the queue mask */ + max_combined = adapter->ring_feature[RING_F_RSS].mask + 1; + } else if (tcs > 1) { + /* For DCB report channels per traffic class */ + if (adapter->hw.mac.type == ixgbe_mac_82598EB) { + /* 8 TC w/ 4 queues per TC */ + max_combined = 4; + } else if (tcs > 4) { + /* 8 TC w/ 8 queues per TC */ + max_combined = 8; + } else { + /* 4 TC w/ 16 queues per TC */ + max_combined = 16; + } + } else if (adapter->atr_sample_rate) { + /* support up to MAX FDIR or num proc queues with ATR */ + u8 numcpus = num_possible_cpus(); + + if (numcpus > IXGBE_MAX_FDIR_INDICES) { + max_combined = IXGBE_MAX_FDIR_INDICES; + } else { + max_combined = numcpus; + } + } else { + /* support up to max allowed queues with RSS */ + max_combined = ixgbe_max_rss_indices(adapter); + } + + return max_combined; +} + +/** + * ixgbe_get_channels - Retrieve channel configuration for the network device + * @dev: Network device structure + * @ch: Pointer to the ethtool_channels structure to be filled with channel info + * + * This function retrieves the channel configuration for the specified network + * device and populates the provided `ethtool_channels` structure with the + * relevant information. It reports the maximum number of combined channels, + * the number of other channels, and the current count of combined channels + * based on the device's configuration. + * + * The function is used to provide information about the device's channel + * capabilities and current configuration, which can be useful for network + * management and optimization. + */ +static void ixgbe_get_channels(struct net_device *dev, + struct ethtool_channels *ch) +{ + struct ixgbe_adapter *adapter = netdev_priv(dev); + + /* report maximum channels */ + ch->max_combined = ixgbe_max_channels(adapter); + + /* report info for other vector */ + if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) { + ch->max_other = NON_Q_VECTORS; + ch->other_count = NON_Q_VECTORS; + } + + /* record RSS queues */ + ch->combined_count = adapter->ring_feature[RING_F_RSS].indices; + + /* nothing else to report if RSS is disabled */ + if (ch->combined_count == 1) + return; + + /* we do not support ATR queueing if SR-IOV is enabled */ + if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) + return; + + /* same thing goes for being DCB enabled */ + if (netdev_get_num_tc(dev) > 1) + return; + + /* if ATR is disabled we can exit */ + if (!adapter->atr_sample_rate) + return; + + /* report flow director queues as maximum channels */ + ch->combined_count = adapter->ring_feature[RING_F_FDIR].indices; +} + +/** + * ixgbe_set_channels - Configure the number of channels for the network device + * @dev: Network device structure + * @ch: Pointer to ethtool_channels structure containing desired channel configuration + * + * This function sets the number of combined channels for the specified network + * device based on the provided `ethtool_channels` structure. It verifies that + * the requested configuration does not exceed hardware limits and that separate + * RX and TX vectors are not requested. The function updates the adapter's + * feature limits and adjusts RSS and FCoE limits as necessary. + * + * Return: 0 on success, or -EINVAL if the configuration is invalid. + */ +static int ixgbe_set_channels(struct net_device *dev, + struct ethtool_channels *ch) +{ + struct ixgbe_adapter *adapter = netdev_priv(dev); + unsigned int count = ch->combined_count; + u8 max_rss_indices = ixgbe_max_rss_indices(adapter); + + /* verify they are not requesting separate vectors */ + if (!count || ch->rx_count || ch->tx_count) + return -EINVAL; + + /* verify other_count has not changed */ + if (ch->other_count != NON_Q_VECTORS) + return -EINVAL; + + /* verify the number of channels does not exceed hardware limits */ + if (count > ixgbe_max_channels(adapter)) + return -EINVAL; + + /* update feature limits from largest to smallest supported values */ + adapter->ring_feature[RING_F_FDIR].limit = count; + + /* cap RSS limit */ + if (count > max_rss_indices) + count = max_rss_indices; + adapter->ring_feature[RING_F_RSS].limit = count; + +#if IS_ENABLED(CONFIG_FCOE) + /* cap FCoE limit at 8 */ + if (count > IXGBE_FCRETA_SIZE) + count = IXGBE_FCRETA_SIZE; + adapter->ring_feature[RING_F_FCOE].limit = count; +#endif /* CONFIG_FCOE */ + + /* use setup TC to update any traffic class queue mapping */ + return ixgbe_setup_tc(dev, netdev_get_num_tc(dev)); +} +#endif /* ETHTOOL_SCHANNELS */ + +#ifdef ETHTOOL_GMODULEINFO +/** + * ixgbe_get_module_info - Retrieve module information + * @dev: Network device structure + * @modinfo: Pointer to ethtool_modinfo structure to be filled with module info + * + * This function retrieves information about the network module (e.g., SFP) for + * the specified network device. It checks if the module supports SFF-8472 and + * determines the EEPROM length and type. If the module requires an unsupported + * addressing mode, it logs an error and defaults to SFF-8079. + * + * Return: 0 on success, or a negative error code on failure. + */ +static int ixgbe_get_module_info(struct net_device *dev, + struct ethtool_modinfo *modinfo) +{ + struct ixgbe_adapter *adapter = netdev_priv(dev); + struct ixgbe_hw *hw = &adapter->hw; + u32 status; + u8 sff8472_rev, addr_mode; + bool page_swap = false; + + /* Check whether we support SFF-8472 or not */ + status = hw->phy.ops.read_i2c_eeprom(hw, + IXGBE_SFF_SFF_8472_COMP, + &sff8472_rev); + if (status != 0) + return -EIO; + + /* addressing mode is not supported */ + status = hw->phy.ops.read_i2c_eeprom(hw, + IXGBE_SFF_SFF_8472_SWAP, + &addr_mode); + if (status != 0) + return -EIO; + + if (addr_mode & IXGBE_SFF_ADDRESSING_MODE) { + e_err(drv, "Address change required to access page 0xA2, but not supported. Please report the module type to the driver maintainers.\n"); + page_swap = true; + } + + if (sff8472_rev == IXGBE_SFF_SFF_8472_UNSUP || page_swap) { + /* We have a SFP, but it does not support SFF-8472 */ + modinfo->type = ETH_MODULE_SFF_8079; + modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN; + } else { + /* We have a SFP which supports a revision of SFF-8472. */ + modinfo->type = ETH_MODULE_SFF_8472; + modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN; + } + + return 0; +} + +/** + * ixgbe_get_module_eeprom - Retrieve module EEPROM data + * @dev: Network device structure + * @ee: Pointer to ethtool_eeprom structure specifying the EEPROM section + * @data: Buffer to store the retrieved EEPROM data + * + * This function reads EEPROM data from a network module (e.g., SFP) for the + * specified network device. It supports reading both standard and extended + * EEPROM data, depending on the offset. The function checks if the device is + * busy with SFP initialization and returns an error if so. + * + * Return: 0 on success, or a negative error code on failure. + */ +static int ixgbe_get_module_eeprom(struct net_device *dev, + struct ethtool_eeprom *ee, + u8 *data) +{ + struct ixgbe_adapter *adapter = netdev_priv(dev); + struct ixgbe_hw *hw = &adapter->hw; + u32 status = IXGBE_ERR_PHY_ADDR_INVALID; + u8 databyte = 0xFF; + int i = 0; + + if (ee->len == 0) + return -EINVAL; + + for (i = ee->offset; i < ee->offset + ee->len; i++) { + /* I2C reads can take long time */ + if (test_bit(__IXGBE_IN_SFP_INIT, adapter->state)) + return -EBUSY; + + if (i < ETH_MODULE_SFF_8079_LEN) + status = hw->phy.ops.read_i2c_eeprom(hw, i, &databyte); + else + status = hw->phy.ops.read_i2c_sff8472(hw, i, &databyte); + + if (status != 0) + return -EIO; + + data[i - ee->offset] = databyte; + } + + return 0; +} +#endif /* ETHTOOL_GMODULEINFO */ + +#ifdef ETHTOOL_GEEE + +static const struct { + ixgbe_link_speed mac_speed; + u32 link_mode; +} ixgbe_ls_map[] = { + { IXGBE_LINK_SPEED_10_FULL, ETHTOOL_LINK_MODE_10baseT_Full_BIT }, + { IXGBE_LINK_SPEED_100_FULL, ETHTOOL_LINK_MODE_100baseT_Full_BIT }, + { IXGBE_LINK_SPEED_1GB_FULL, ETHTOOL_LINK_MODE_1000baseT_Full_BIT }, + { IXGBE_LINK_SPEED_2_5GB_FULL, ETHTOOL_LINK_MODE_2500baseT_Full_BIT }, + { IXGBE_LINK_SPEED_10GB_FULL, ETHTOOL_LINK_MODE_10000baseT_Full_BIT }, +}; + +static const struct { + u32 lp_advertised; + u32 link_mode; +} ixgbe_lp_map[] = { + { FW_PHY_ACT_UD_2_100M_TX_EEE, ETHTOOL_LINK_MODE_100baseT_Full_BIT }, + { FW_PHY_ACT_UD_2_1G_T_EEE, ETHTOOL_LINK_MODE_1000baseT_Full_BIT }, + { FW_PHY_ACT_UD_2_10G_T_EEE, ETHTOOL_LINK_MODE_10000baseT_Full_BIT }, + { FW_PHY_ACT_UD_2_1G_KX_EEE, ETHTOOL_LINK_MODE_1000baseKX_Full_BIT }, + { FW_PHY_ACT_UD_2_10G_KX4_EEE, ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT }, + { FW_PHY_ACT_UD_2_10G_KR_EEE, ETHTOOL_LINK_MODE_10000baseKR_Full_BIT}, +}; + +static int +ixgbe_get_keee_fw(struct ixgbe_adapter *adapter, struct ethtool_keee *kedata) +{ + __ETHTOOL_DECLARE_LINK_MODE_MASK(common); + u32 info[FW_PHY_ACT_DATA_COUNT] = { 0 }; + struct ixgbe_hw *hw = &adapter->hw; + s32 rc; + u16 i; + + rc = ixgbe_fw_phy_activity(hw, FW_PHY_ACT_UD_2, &info); + if (rc) + return rc; + + linkmode_zero(kedata->lp_advertised); + for (i = 0; i < ARRAY_SIZE(ixgbe_lp_map); ++i) { + if (info[0] & ixgbe_lp_map[i].lp_advertised) + linkmode_set_bit(ixgbe_lp_map[i].link_mode, + kedata->lp_advertised); + } + + linkmode_zero(kedata->supported); + for (i = 0; i < ARRAY_SIZE(ixgbe_ls_map); ++i) { + if (hw->phy.eee_speeds_supported & ixgbe_ls_map[i].mac_speed) + linkmode_set_bit(ixgbe_lp_map[i].link_mode, + kedata->supported); + } + + linkmode_zero(kedata->advertised); + for (i = 0; i < ARRAY_SIZE(ixgbe_ls_map); ++i) { + if (hw->phy.eee_speeds_advertised & ixgbe_ls_map[i].mac_speed) + linkmode_set_bit(ixgbe_lp_map[i].link_mode, + kedata->advertised); + } + + kedata->eee_enabled = !linkmode_empty(kedata->advertised); + kedata->tx_lpi_enabled = kedata->eee_enabled; + linkmode_and(common, kedata->advertised, kedata->lp_advertised); + kedata->eee_active = !linkmode_empty(common); + + return 0; +} +#ifdef HAVE_ETHTOOL_KEEE +static const struct { + __le16 eee_cap_bit; + u32 mac_speed; +} ixgbe_eee_cap_map[] = { + { IXGBE_ACI_PHY_EEE_EN_100BASE_TX, ETHTOOL_LINK_MODE_100baseT_Full_BIT }, + { IXGBE_ACI_PHY_EEE_EN_1000BASE_T, ETHTOOL_LINK_MODE_1000baseT_Full_BIT }, + { IXGBE_ACI_PHY_EEE_EN_10GBASE_T, ETHTOOL_LINK_MODE_10000baseT_Full_BIT }, + { IXGBE_ACI_PHY_EEE_EN_5GBASE_T, ETHTOOL_LINK_MODE_5000baseT_Full_BIT }, + { IXGBE_ACI_PHY_EEE_EN_2_5GBASE_T, ETHTOOL_LINK_MODE_2500baseX_Full_BIT }, +}; + +static const struct { + ixgbe_link_speed shared_speed; + u32 kernel_speed; +} ixgbe_kernel_map[] = { + { IXGBE_LINK_SPEED_100_FULL, ETHTOOL_LINK_MODE_100baseT_Full_BIT }, + { IXGBE_LINK_SPEED_1GB_FULL, ETHTOOL_LINK_MODE_1000baseT_Full_BIT }, + { IXGBE_LINK_SPEED_2_5GB_FULL, ETHTOOL_LINK_MODE_2500baseX_Full_BIT }, + { IXGBE_LINK_SPEED_5GB_FULL, ETHTOOL_LINK_MODE_5000baseT_Full_BIT }, + { IXGBE_LINK_SPEED_10GB_FULL, ETHTOOL_LINK_MODE_10000baseT_Full_BIT }, +}; + +/** + * ixgbe_get_keee_E610 - Retrieve EEE settings for E610 hardware + * @netdev: Network device structure + * @kedata: Pointer to ethtool_keee structure to be filled with EEE settings + * + * This function retrieves Energy Efficient Ethernet (EEE) settings for E610 + * hardware. It populates the `kedata` structure with supported, advertised, + * and link partner advertised EEE capabilities. It also checks if EEE is + * active and enabled, and sets the LPI (Low Power Idle) timer if applicable. + * + * Return: 0 on success, or a negative error code on failure. + */ +static s32 +ixgbe_get_keee_E610(struct net_device *netdev, struct ethtool_keee *kedata) +{ + struct ixgbe_adapter *adapter = + netdev_priv(netdev); + struct ixgbe_aci_cmd_get_phy_caps_data pcaps; + struct ixgbe_hw *hw = &adapter->hw; + struct ixgbe_link_status link; + u16 eee_cap; + s32 status; + int i; + + if (!(adapter->flags2 & IXGBE_FLAG2_EEE_CAPABLE)) + return -EOPNOTSUPP; + + linkmode_zero(kedata->lp_advertised); + linkmode_zero(kedata->supported); + linkmode_zero(kedata->advertised); + + status = ixgbe_aci_get_link_info(hw, true, &link); + if (status) + return status; + + kedata->eee_active = link.eee_status & IXGBE_ACI_LINK_EEE_ACTIVE; + kedata->eee_enabled = link.eee_status & IXGBE_ACI_LINK_EEE_ENABLED; + + /* for E610 devices EEE enablement implies TX LPI enablement */ + kedata->tx_lpi_enabled = kedata->eee_enabled; + + status = ixgbe_aci_get_phy_caps(hw, false, + IXGBE_ACI_REPORT_ACTIVE_CFG, &pcaps); + if (status) + return status; + + if (kedata->eee_enabled) + kedata->tx_lpi_timer = IXGBE_LE16_TO_CPU(pcaps.eee_entry_delay); + + eee_cap = IXGBE_LE16_TO_CPU(pcaps.eee_cap); + + for (i = 0; i < ARRAY_SIZE(ixgbe_eee_cap_map); i++) { + if (eee_cap & ixgbe_eee_cap_map[i].eee_cap_bit) + linkmode_set_bit(ixgbe_eee_cap_map[i].mac_speed, + kedata->lp_advertised); + } + + for (i = 0; i < ARRAY_SIZE(ixgbe_kernel_map); i++) { + if (hw->phy.eee_speeds_supported & + ixgbe_kernel_map[i].shared_speed) + linkmode_set_bit(ixgbe_kernel_map[i].kernel_speed, + kedata->supported); + + if (hw->phy.eee_speeds_advertised & + ixgbe_kernel_map[i].shared_speed) + linkmode_set_bit(ixgbe_kernel_map[i].kernel_speed, + kedata->advertised); + } + + return 0; +} +#endif /* HAVE_ETHTOOL_KEEE */ + +/** + * ixgbe_get_keee - Retrieve EEE settings for the network device + * @netdev: Network device structure + * @kedata: Pointer to ethtool_keee structure to be filled with EEE settings + * + * This function retrieves Energy Efficient Ethernet (EEE) settings for the + * specified network device. It checks if EEE is supported and, if so, populates + * the `kedata` structure with supported, advertised, and active EEE capabilities. + * If the device uses firmware-based EEE, it delegates to `ixgbe_get_keee_fw`. + * + * Return: 0 on success, or -EOPNOTSUPP if EEE is not supported. + */ +static int ixgbe_get_keee(struct net_device *netdev, struct ethtool_keee *kedata) +{ + struct ixgbe_adapter *adapter = netdev_priv(netdev); + struct ixgbe_hw *hw = &adapter->hw; + + if (!hw->mac.ops.setup_eee) + return -EOPNOTSUPP; + + if (!(adapter->flags2 & IXGBE_FLAG2_EEE_CAPABLE)) + return -EOPNOTSUPP; + + if (hw->phy.eee_speeds_supported && hw->phy.type == ixgbe_phy_fw) { + return ixgbe_get_keee_fw(adapter, kedata); + } + + return -EOPNOTSUPP; +} + +#ifndef HAVE_ETHTOOL_KEEE + +#define IXGBE_LINK_MODE_MASK 0xFFFFFFFF + +/** + * ixgbe_get_eee - Retrieve Energy Efficient Ethernet (EEE) settings + * @netdev: Network device structure + * @edata: Pointer to ethtool_eee structure to be filled with EEE settings + * + * This function retrieves the Energy Efficient Ethernet (EEE) settings for the + * specified network device. It converts the EEE settings to a kernel-specific + * format, calls `ixgbe_get_keee` to get the settings, and then converts them + * back. It also applies a workaround for kernels with limited link mode support. + * + * Return: 0 on success, or a negative error code on failure. + */ +static int ixgbe_get_eee(struct net_device *netdev, struct ethtool_eee *edata) +{ + __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, }; + struct ethtool_keee kedata; + int ret; + + eee_to_keee(&kedata, edata); + ret = ixgbe_get_keee(netdev, &kedata); + + /* workaround for kernels limiting linkmode up to 32 bits */ + ethtool_convert_legacy_u32_to_link_mode(mask, IXGBE_LINK_MODE_MASK); + linkmode_and(kedata.supported, kedata.supported, mask); + + keee_to_eee(edata, &kedata); + + return ret; +} +#endif /* !HAVE_ETHTOOL_KEEE */ +#endif /* ETHTOOL_GEEE */ + +#ifdef ETHTOOL_SEEE +static int ixgbe_validate_keee(struct net_device *netdev, + struct ethtool_keee *keee_requested) +{ + struct ixgbe_adapter *adapter = + netdev_priv(netdev); + struct ethtool_keee keee_stored = {}; + struct ixgbe_hw *hw = &adapter->hw; +#ifndef HAVE_ETHTOOL_KEEE + struct ethtool_eee eee_stored = {}; +#endif + int ret_val; + + if (!(hw->mac.ops.setup_eee && + (adapter->flags2 & IXGBE_FLAG2_EEE_CAPABLE))) + return -EOPNOTSUPP; + +#ifndef HAVE_ETHTOOL_KEEE + ret_val = netdev->ethtool_ops->get_eee(netdev, &eee_stored); +#else + ret_val = netdev->ethtool_ops->get_eee(netdev, &keee_stored); +#endif + if (ret_val) + return ret_val; + +#ifndef HAVE_ETHTOOL_KEEE + eee_to_keee(&keee_stored, &eee_stored); +#endif + if (keee_stored.tx_lpi_enabled != keee_requested->tx_lpi_enabled) { + e_dev_err("Setting EEE Tx LPI is not supported\n"); + return -EINVAL; + } + + if (keee_stored.tx_lpi_timer != keee_requested->tx_lpi_timer) { + e_dev_err("Setting EEE Tx LPI timer is not supported\n"); + return -EINVAL; + } + + if (*keee_stored.advertised != *keee_requested->advertised) { + e_dev_err("Setting EEE advertised speeds is not supported\n"); + return -EINVAL; + } + + if (keee_stored.eee_enabled == keee_requested->eee_enabled) + return -EALREADY; + + return 0; +} + +/** + * ixgbe_check_link_for_eee_e610 - Check if EEE can be enabled + * @adapter - pointer to the adapter struct + * @print_msg - indicate whether to print info msg when EEE cannot be supported + * + * Check whether current link configuration is capable of enabling EEE feature. + * + * E610 specific function - for other adapters supporting EEE there might be + * no such limitation. + * + * Return: true if EEE can be enabled, false otherwise. + */ +bool ixgbe_check_link_for_eee_e610(struct ixgbe_adapter *adapter, + bool print_msg) +{ + switch (adapter->link_speed) { + case IXGBE_LINK_SPEED_10GB_FULL: + case IXGBE_LINK_SPEED_2_5GB_FULL: + case IXGBE_LINK_SPEED_5GB_FULL: + return true; + case IXGBE_LINK_SPEED_10_FULL: + case IXGBE_LINK_SPEED_100_FULL: + case IXGBE_LINK_SPEED_1GB_FULL: + if (print_msg) + e_dev_info("Energy Efficient Ethernet (EEE) feature is not supported on link speeds equal to or below 1Gbps. EEE is supported on speeds above 1Gbps.\n"); + fallthrough; + default: + return false; + } +} + +#ifdef HAVE_ETHTOOL_KEEE +/** + * ixgbe_set_keee_E610 - Configure EEE settings for E610 hardware + * @netdev: Network device structure + * @kedata: Pointer to ethtool_keee structure with desired EEE settings + * + * This function sets the Energy Efficient Ethernet (EEE) parameters for E610 + * hardware based on the provided `ethtool_keee` structure. It validates the + * settings, updates the adapter's configuration, and applies the changes. If + * necessary, it reinitializes or resets the device to apply the new settings. + * + * Return: 0 on success, or a negative error code on failure. + */ +static int ixgbe_set_keee_E610(struct net_device *netdev, + struct ethtool_keee *kedata) +{ + struct ixgbe_adapter *adapter = + netdev_priv(netdev); + struct ixgbe_hw *hw = &adapter->hw; + s32 ret_val; + + ret_val = ixgbe_validate_keee(netdev, kedata); + if (ret_val == -EALREADY) + return 0; + else if (ret_val) + return ret_val; + + if (!ixgbe_check_link_for_eee_e610(adapter, true) && + kedata->eee_enabled) + return -EOPNOTSUPP; + + hw->phy.eee_speeds_advertised = kedata->eee_enabled ? + hw->phy.eee_speeds_supported : 0; + + ret_val = hw->mac.ops.setup_eee(hw, kedata->eee_enabled); + if (ret_val) { + e_dev_err("Setting EEE %s failed.\n", + (kedata->eee_enabled ? "on" : "off")); + return ret_val; + } + + if (kedata->eee_enabled) + adapter->eee_state = IXGBE_EEE_ENABLED; + else + adapter->eee_state = IXGBE_EEE_DISABLED; + + if (netif_running(netdev)) + ixgbe_reinit_locked(adapter); + else + ixgbe_reset(adapter); + + return 0; +} +#endif /* HAVE_ETHTOOL_KEEE */ + +/** + * ixgbe_set_keee - Configure EEE settings for the network device + * @netdev: Network device structure + * @kedata: Pointer to ethtool_keee structure with desired EEE settings + * + * This function sets the Energy Efficient Ethernet (EEE) parameters for the + * specified network device based on the provided `ethtool_keee` structure. It + * validates the settings, updates the adapter's configuration, and applies the + * changes. If necessary, it reinitializes or resets the device to apply the new + * settings. + * + * Return: 0 on success, or a negative error code on failure. + */ +static int ixgbe_set_keee(struct net_device *netdev, struct ethtool_keee *kedata) +{ + struct ixgbe_adapter *adapter = netdev_priv(netdev); + struct ixgbe_hw *hw = &adapter->hw; + s32 ret_val; + + ret_val = ixgbe_validate_keee(netdev, kedata); + if (ret_val == -EALREADY) + return 0; + else if (ret_val) + return ret_val; + + hw->phy.eee_speeds_advertised = kedata->eee_enabled ? + hw->phy.eee_speeds_supported : 0; + + if (kedata->eee_enabled) + adapter->eee_state = IXGBE_EEE_ENABLED; + else + adapter->eee_state = IXGBE_EEE_DISABLED; + + /* reset link */ + if (netif_running(netdev)) + ixgbe_reinit_locked(adapter); + else + ixgbe_reset(adapter); + + return 0; +} + +#ifndef HAVE_ETHTOOL_KEEE +/** + * ixgbe_set_eee - Configure Energy Efficient Ethernet (EEE) settings + * @netdev: Network device structure + * @edata: Pointer to ethtool_eee structure with desired EEE settings + * + * This function sets the Energy Efficient Ethernet (EEE) parameters for the + * specified network device based on the provided `ethtool_eee` structure. It + * converts the EEE settings to a kernel-specific format, applies the settings, + * and then converts them back. It includes a workaround for kernels with + * limited link mode support. + * + * Return: 0 on success, or a negative error code on failure. + */ +static int ixgbe_set_eee(struct net_device *netdev, struct ethtool_eee *edata) +{ + __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, }; + struct ethtool_keee kedata; + int ret; + + eee_to_keee(&kedata, edata); + ret = ixgbe_set_keee(netdev, &kedata); + + /* workaround for kernels limiting linkmode up to 32 bits */ + ethtool_convert_legacy_u32_to_link_mode(mask, IXGBE_LINK_MODE_MASK); + linkmode_and(kedata.supported, kedata.supported, mask); + + keee_to_eee(edata, &kedata); + + return ret; +} +#endif /* !HAVE_ETHTOOL_KEEE */ +#endif /* ETHTOOL_SEEE */ + +#ifdef HAVE_ETHTOOL_GET_SSET_COUNT +/** + * ixgbe_get_priv_flags - Report device private flags + * @netdev: Network interface device structure + * + * This function retrieves the private flags for the ixgbe network adapter. + * It checks the adapter's configuration and sets the corresponding flags in + * a bitmap. The function ensures that the flags returned match the string + * set count and the string set in the `ixgbe_priv_flags_strings` array. + * + * Return: A u32 bitmap of private flags. + */ +static u32 ixgbe_get_priv_flags(struct net_device *netdev) +{ + struct ixgbe_adapter *adapter = netdev_priv(netdev); + u32 priv_flags = 0; + + if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) + priv_flags |= IXGBE_PRIV_FLAGS_FD_ATR; +#ifdef HAVE_SWIOTLB_SKIP_CPU_SYNC + + if (adapter->flags2 & IXGBE_FLAG2_RX_LEGACY) + priv_flags |= IXGBE_PRIV_FLAGS_LEGACY_RX; +#endif + if (adapter->flags2 & IXGBE_FLAG2_AUTO_DISABLE_VF) + priv_flags |= IXGBE_PRIV_FLAGS_AUTO_DISABLE_VF; + + return priv_flags; +} + +/** + * ixgbe_set_priv_flags - Set private flags for the network device + * @netdev: Network interface device structure + * @priv_flags: Bit flags to be set + * + * This function sets the private flags for the ixgbe network adapter based + * on the provided bit flags. It allows control over features such as Flow + * Director ATR (Application Targeted Routing) and legacy receive mode. The + * function checks for compatibility and constraints before setting the + * flags, and performs necessary resets or reinitializations if the flags + * change. It returns an error if the requested flags are not supported or + * cannot be enabled due to current configuration. + * + * Return: 0 on success, or a negative error code on failure. + */ +static int ixgbe_set_priv_flags(struct net_device *netdev, u32 priv_flags) +{ + struct ixgbe_adapter *adapter = netdev_priv(netdev); + unsigned int flags2 = adapter->flags2; + unsigned int flags = adapter->flags; + unsigned int i; + + /* allow the user to control the state of the Flow + * Director ATR (Application Targeted Routing) feature + * of the driver + */ + flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE; + if (priv_flags & IXGBE_PRIV_FLAGS_FD_ATR) { + /* We cannot enable ATR if VMDq is enabled */ + if (flags & IXGBE_FLAG_VMDQ_ENABLED) + return -EINVAL; + /* We cannot enable ATR if we have 2 or more traffic classes */ + if (netdev_get_num_tc(netdev) > 1) + return -EINVAL; + /* We cannot enable ATR if RSS is disabled */ + if (adapter->ring_feature[RING_F_RSS].limit <= 1) + return -EINVAL; + /* A sample rate of 0 indicates ATR disabled */ + if (!adapter->atr_sample_rate) + return -EINVAL; + flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE; + } +#ifdef HAVE_SWIOTLB_SKIP_CPU_SYNC + + flags2 &= ~IXGBE_FLAG2_RX_LEGACY; + if (priv_flags & IXGBE_PRIV_FLAGS_LEGACY_RX) + flags2 |= IXGBE_FLAG2_RX_LEGACY; +#endif + + flags2 &= ~IXGBE_FLAG2_AUTO_DISABLE_VF; + if (priv_flags & IXGBE_PRIV_FLAGS_AUTO_DISABLE_VF) { + if (adapter->hw.mac.type == ixgbe_mac_82599EB) { + /* Reset primary abort counter */ + for (i = 0; i < adapter->num_vfs; i++) + adapter->vfinfo[i].primary_abort_count = 0; + + flags2 |= IXGBE_FLAG2_AUTO_DISABLE_VF; + } else { + e_info(probe, + "Cannot set private flags: Operation not supported\n"); + return -EOPNOTSUPP; + } + } + + if (flags != adapter->flags) { + adapter->flags = flags; + + /* ATR state change requires a reset */ + ixgbe_do_reset(netdev); + } else if (flags2 != adapter->flags2) { + adapter->flags2 = flags2; + + /* reset interface to repopulate queues */ + if (netif_running(netdev)) + ixgbe_reinit_locked(adapter); + } + + return 0; +} + +#endif /* HAVE_ETHTOOL_GET_SSET_COUNT */ +static struct ethtool_ops ixgbe_ethtool_ops = { +#ifdef ETHTOOL_GLINKSETTINGS + .get_link_ksettings = ixgbe_get_link_ksettings, + .set_link_ksettings = ixgbe_set_link_ksettings, +#else + .get_settings = ixgbe_get_settings, + .set_settings = ixgbe_set_settings, +#endif + .get_drvinfo = ixgbe_get_drvinfo, + .get_regs_len = ixgbe_get_regs_len, + .get_regs = ixgbe_get_regs, + .get_wol = ixgbe_get_wol, + .set_wol = ixgbe_set_wol, + .nway_reset = ixgbe_nway_reset, + .get_link = ethtool_op_get_link, + .get_eeprom_len = ixgbe_get_eeprom_len, + .get_eeprom = ixgbe_get_eeprom, + .set_eeprom = ixgbe_set_eeprom, + .get_ringparam = ixgbe_get_ringparam, + .set_ringparam = ixgbe_set_ringparam, + .get_pauseparam = ixgbe_get_pauseparam, + .set_pauseparam = ixgbe_set_pauseparam, + .get_msglevel = ixgbe_get_msglevel, + .set_msglevel = ixgbe_set_msglevel, +#ifndef HAVE_ETHTOOL_GET_SSET_COUNT + .self_test_count = ixgbe_diag_test_count, +#endif /* HAVE_ETHTOOL_GET_SSET_COUNT */ + .self_test = ixgbe_diag_test, + .get_strings = ixgbe_get_strings, +#ifndef HAVE_RHEL6_ETHTOOL_OPS_EXT_STRUCT +#ifdef HAVE_ETHTOOL_SET_PHYS_ID + .set_phys_id = ixgbe_set_phys_id, +#else + .phys_id = ixgbe_phys_id, +#endif /* HAVE_ETHTOOL_SET_PHYS_ID */ +#endif /* HAVE_RHEL6_ETHTOOL_OPS_EXT_STRUCT */ +#ifndef HAVE_ETHTOOL_GET_SSET_COUNT + .get_stats_count = ixgbe_get_stats_count, +#else /* HAVE_ETHTOOL_GET_SSET_COUNT */ + .get_sset_count = ixgbe_get_sset_count, + .get_priv_flags = ixgbe_get_priv_flags, + .set_priv_flags = ixgbe_set_priv_flags, +#endif /* HAVE_ETHTOOL_GET_SSET_COUNT */ + .get_ethtool_stats = ixgbe_get_ethtool_stats, +#ifdef HAVE_ETHTOOL_GET_PERM_ADDR + .get_perm_addr = ethtool_op_get_perm_addr, +#endif + .get_coalesce = ixgbe_get_coalesce, + .set_coalesce = ixgbe_set_coalesce, +#ifdef ETHTOOL_COALESCE_USECS + .supported_coalesce_params = ETHTOOL_COALESCE_USECS, +#endif +#ifndef HAVE_NDO_SET_FEATURES + .get_rx_csum = ixgbe_get_rx_csum, + .set_rx_csum = ixgbe_set_rx_csum, + .get_tx_csum = ethtool_op_get_tx_csum, + .set_tx_csum = ixgbe_set_tx_csum, + .get_sg = ethtool_op_get_sg, + .set_sg = ethtool_op_set_sg, +#ifdef NETIF_F_TSO + .get_tso = ethtool_op_get_tso, + .set_tso = ixgbe_set_tso, +#endif +#ifdef ETHTOOL_GFLAGS + .get_flags = ethtool_op_get_flags, + .set_flags = ixgbe_set_flags, +#endif +#endif /* HAVE_NDO_SET_FEATURES */ +#ifdef ETHTOOL_GRXRINGS + .get_rxnfc = ixgbe_get_rxnfc, + .set_rxnfc = ixgbe_set_rxnfc, +#ifdef ETHTOOL_SRXNTUPLE + .set_rx_ntuple = ixgbe_set_rx_ntuple, +#endif +#endif /* ETHTOOL_GRXRINGS */ +#ifndef HAVE_RHEL6_ETHTOOL_OPS_EXT_STRUCT +#ifdef ETHTOOL_GEEE +#ifdef HAVE_ETHTOOL_KEEE + .get_eee = ixgbe_get_keee, +#else + .get_eee = ixgbe_get_eee, +#endif /* HAVE_ETHTOOL_KEEE */ +#endif /* ETHTOOL_GEEE */ +#ifdef ETHTOOL_SEEE +#ifdef HAVE_ETHTOOL_KEEE + .set_eee = ixgbe_set_keee, +#else + .set_eee = ixgbe_set_eee, +#endif /* HAVE_ETHTOOL_KEEE */ +#endif /* ETHTOOL_SEEE */ +#ifdef ETHTOOL_SCHANNELS + .get_channels = ixgbe_get_channels, + .set_channels = ixgbe_set_channels, +#endif +#ifdef ETHTOOL_GMODULEINFO + .get_module_info = ixgbe_get_module_info, + .get_module_eeprom = ixgbe_get_module_eeprom, +#endif +#ifdef HAVE_ETHTOOL_GET_TS_INFO + .get_ts_info = ixgbe_get_ts_info, +#endif +#if defined(ETHTOOL_GRSSH) && defined(ETHTOOL_SRSSH) + .get_rxfh_indir_size = ixgbe_rss_indir_size, + .get_rxfh_key_size = ixgbe_get_rxfh_key_size, + .get_rxfh = ixgbe_get_rxfh, + .set_rxfh = ixgbe_set_rxfh, +#endif /* ETHTOOL_GRSSH && ETHTOOL_SRSSH */ +#endif /* HAVE_RHEL6_ETHTOOL_OPS_EXT_STRUCT */ +}; + +static struct ethtool_ops ixgbe_ethtool_ops_E610 = { +#ifdef ETHTOOL_GLINKSETTINGS + .get_link_ksettings = ixgbe_get_link_ksettings, + .set_link_ksettings = ixgbe_set_link_ksettings, +#else + .get_settings = ixgbe_get_settings, + .set_settings = ixgbe_set_settings, +#endif + .get_drvinfo = ixgbe_get_drvinfo, + .get_regs_len = ixgbe_get_regs_len, + .get_regs = ixgbe_get_regs, + .get_wol = ixgbe_get_wol, + .set_wol = ixgbe_set_wol_E610, + .nway_reset = ixgbe_nway_reset, + .get_link = ethtool_op_get_link, + .get_eeprom_len = ixgbe_get_eeprom_len_E610, + .get_eeprom = ixgbe_get_eeprom, + .set_eeprom = ixgbe_set_eeprom, + .get_ringparam = ixgbe_get_ringparam, + .set_ringparam = ixgbe_set_ringparam, + .get_pauseparam = ixgbe_get_pauseparam, + .set_pauseparam = ixgbe_set_pauseparam_E610, + .get_msglevel = ixgbe_get_msglevel, + .set_msglevel = ixgbe_set_msglevel, +#ifndef HAVE_ETHTOOL_GET_SSET_COUNT + .self_test_count = ixgbe_diag_test_count, +#endif /* HAVE_ETHTOOL_GET_SSET_COUNT */ + .self_test = ixgbe_diag_test, + .get_strings = ixgbe_get_strings, +#ifndef HAVE_RHEL6_ETHTOOL_OPS_EXT_STRUCT +#ifdef HAVE_ETHTOOL_SET_PHYS_ID + .set_phys_id = ixgbe_set_phys_id_E610, +#else + .phys_id = ixgbe_phys_id, +#endif /* HAVE_ETHTOOL_SET_PHYS_ID */ +#endif /* HAVE_RHEL6_ETHTOOL_OPS_EXT_STRUCT */ +#ifndef HAVE_ETHTOOL_GET_SSET_COUNT + .get_stats_count = ixgbe_get_stats_count, +#else /* HAVE_ETHTOOL_GET_SSET_COUNT */ + .get_sset_count = ixgbe_get_sset_count, + .get_priv_flags = ixgbe_get_priv_flags, + .set_priv_flags = ixgbe_set_priv_flags, +#endif /* HAVE_ETHTOOL_GET_SSET_COUNT */ + .get_ethtool_stats = ixgbe_get_ethtool_stats, +#ifdef HAVE_ETHTOOL_GET_PERM_ADDR + .get_perm_addr = ethtool_op_get_perm_addr, +#endif + .get_coalesce = ixgbe_get_coalesce, + .set_coalesce = ixgbe_set_coalesce, +#ifdef ETHTOOL_COALESCE_USECS + .supported_coalesce_params = ETHTOOL_COALESCE_USECS, +#endif +#ifndef HAVE_NDO_SET_FEATURES + .get_rx_csum = ixgbe_get_rx_csum, + .set_rx_csum = ixgbe_set_rx_csum, + .get_tx_csum = ethtool_op_get_tx_csum, + .set_tx_csum = ixgbe_set_tx_csum, + .get_sg = ethtool_op_get_sg, + .set_sg = ethtool_op_set_sg, +#ifdef NETIF_F_TSO + .get_tso = ethtool_op_get_tso, + .set_tso = ixgbe_set_tso, +#endif +#ifdef ETHTOOL_GFLAGS + .get_flags = ethtool_op_get_flags, + .set_flags = ixgbe_set_flags, +#endif +#endif /* HAVE_NDO_SET_FEATURES */ +#ifdef ETHTOOL_GRXRINGS + .get_rxnfc = ixgbe_get_rxnfc, + .set_rxnfc = ixgbe_set_rxnfc, +#ifdef ETHTOOL_SRXNTUPLE + .set_rx_ntuple = ixgbe_set_rx_ntuple, +#endif +#endif /* ETHTOOL_GRXRINGS */ +#ifndef HAVE_RHEL6_ETHTOOL_OPS_EXT_STRUCT +#ifdef HAVE_ETHTOOL_KEEE +#ifdef ETHTOOL_GEEE + .get_eee = ixgbe_get_keee_E610, +#endif /* ETHTOOL_GEEE */ +#ifdef ETHTOOL_SEEE + .set_eee = ixgbe_set_keee_E610, +#endif /* ETHTOOL_SEEE */ +#endif /* HAVE_ETHTOOL_KEEE */ +#ifdef ETHTOOL_SCHANNELS + .get_channels = ixgbe_get_channels, + .set_channels = ixgbe_set_channels, +#endif +#ifdef ETHTOOL_GMODULEINFO + .get_module_info = ixgbe_get_module_info, + .get_module_eeprom = ixgbe_get_module_eeprom, +#endif +#ifdef HAVE_ETHTOOL_GET_TS_INFO + .get_ts_info = ixgbe_get_ts_info, +#endif +#if defined(ETHTOOL_GRSSH) && defined(ETHTOOL_SRSSH) + .get_rxfh_indir_size = ixgbe_rss_indir_size, + .get_rxfh_key_size = ixgbe_get_rxfh_key_size, + .get_rxfh = ixgbe_get_rxfh, + .set_rxfh = ixgbe_set_rxfh, +#endif /* ETHTOOL_GRSSH && ETHTOOL_SRSSH */ +#endif /* HAVE_RHEL6_ETHTOOL_OPS_EXT_STRUCT */ +}; + +#ifdef HAVE_RHEL6_ETHTOOL_OPS_EXT_STRUCT +static const struct ethtool_ops_ext ixgbe_ethtool_ops_ext = { + .size = sizeof(struct ethtool_ops_ext), + .get_ts_info = ixgbe_get_ts_info, + .set_phys_id = ixgbe_set_phys_id, + .get_channels = ixgbe_get_channels, + .set_channels = ixgbe_set_channels, +#ifdef ETHTOOL_GMODULEINFO + .get_module_info = ixgbe_get_module_info, + .get_module_eeprom = ixgbe_get_module_eeprom, +#endif +#if defined(ETHTOOL_GRSSH) && defined(ETHTOOL_SRSSH) + .get_rxfh_indir_size = ixgbe_rss_indir_size, + .get_rxfh_key_size = ixgbe_get_rxfh_key_size, + .get_rxfh = ixgbe_get_rxfh, + .set_rxfh = ixgbe_set_rxfh, +#endif /* ETHTOOL_GRSSH && ETHTOOL_SRSSH */ +#ifdef ETHTOOL_GEEE + .get_eee = ixgbe_get_eee, +#endif /* ETHTOOL_GEEE */ +#ifdef ETHTOOL_SEEE + .set_eee = ixgbe_set_eee, +#endif /* ETHTOOL_SEEE */ +}; + +#endif /* HAVE_RHEL6_ETHTOOL_OPS_EXT_STRUCT */ +void ixgbe_set_ethtool_ops(struct net_device *netdev) +{ + struct ixgbe_adapter *adapter = + netdev_priv(netdev); +#ifndef ETHTOOL_OPS_COMPAT + switch (adapter->hw.mac.type) { + case ixgbe_mac_E610: + netdev->ethtool_ops = &ixgbe_ethtool_ops_E610; + break; + default: + netdev->ethtool_ops = &ixgbe_ethtool_ops; + break; + } +#else + switch (adapter->hw.mac.type) { + case ixgbe_mac_E610: + SET_ETHTOOL_OPS(netdev, &ixgbe_ethtool_ops_E610); + break; + default: + SET_ETHTOOL_OPS(netdev, &ixgbe_ethtool_ops); + break; + } +#endif + +#ifdef HAVE_RHEL6_ETHTOOL_OPS_EXT_STRUCT + set_ethtool_ops_ext(netdev, &ixgbe_ethtool_ops_ext); +#endif /* HAVE_RHEL6_ETHTOOL_OPS_EXT_STRUCT */ +} +#endif /* SIOCETHTOOL */ diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_fcoe.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_fcoe.c new file mode 100644 index 00000000000..379cd671561 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_fcoe.c @@ -0,0 +1,1059 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 1999 - 2026 Intel Corporation */ + +#include "ixgbe.h" + + +#if IS_ENABLED(CONFIG_FCOE) +#if IS_ENABLED(CONFIG_DCB) +#include "ixgbe_dcb_82599.h" +#endif /* CONFIG_DCB */ +#include +#include +#include +#include +#include +#include +#include + +/** + * ixgbe_fcoe_clear_ddp - clear the given ddp context + * @ddp: ptr to the ixgbe_fcoe_ddp + * + * Returns : none + * + */ +static inline void ixgbe_fcoe_clear_ddp(struct ixgbe_fcoe_ddp *ddp) +{ + ddp->len = 0; + ddp->err = 1; + ddp->udl = NULL; + ddp->udp = 0UL; + ddp->sgl = NULL; + ddp->sgc = 0; +} + +/** + * ixgbe_fcoe_ddp_put - free the ddp context for a given xid + * @netdev: the corresponding net_device + * @xid: the xid that corresponding ddp will be freed + * + * This is the implementation of net_device_ops.ndo_fcoe_ddp_done + * and it is expected to be called by ULD, i.e., FCP layer of libfc + * to release the corresponding ddp context when the I/O is done. + * + * Returns : data length already ddp-ed in bytes + */ +int ixgbe_fcoe_ddp_put(struct net_device *netdev, u16 xid) +{ + int len = 0; + struct ixgbe_fcoe *fcoe; + struct ixgbe_adapter *adapter; + struct ixgbe_hw *hw; + struct ixgbe_fcoe_ddp *ddp; + u32 fcbuff; + + if (!netdev) + goto out_ddp_put; + + if (xid > netdev->fcoe_ddp_xid) + goto out_ddp_put; + + adapter = netdev_priv(netdev); + hw = &adapter->hw; + fcoe = &adapter->fcoe; + ddp = &fcoe->ddp[xid]; + if (!ddp->udl) + goto out_ddp_put; + + len = ddp->len; + /* if there an error, force to invalidate ddp context */ + if (ddp->err) { + switch (hw->mac.type) { + case ixgbe_mac_X550: + /* X550 does not require DDP FCoE lock */ + + IXGBE_WRITE_REG(hw, IXGBE_FCDFC(0, xid), 0); + IXGBE_WRITE_REG(hw, IXGBE_FCDFC(3, xid), + (xid | IXGBE_FCFLTRW_WE)); + + /* program FCBUFF */ + IXGBE_WRITE_REG(hw, IXGBE_FCDDC(2, xid), 0); + + /* program FCDMARW */ + IXGBE_WRITE_REG(hw, IXGBE_FCDDC(3, xid), + (xid | IXGBE_FCDMARW_WE)); + + /* read FCBUFF to check context invalidated */ + IXGBE_WRITE_REG(hw, IXGBE_FCDDC(3, xid), + (xid | IXGBE_FCDMARW_RE)); + fcbuff = IXGBE_READ_REG(hw, + IXGBE_FCDDC(2, xid)); + break; + default: + /* other hardware requires DDP FCoE lock */ + spin_lock_bh(&fcoe->lock); + + IXGBE_WRITE_REG(hw, IXGBE_FCFLT, 0); + IXGBE_WRITE_REG(hw, IXGBE_FCFLTRW, + (xid | IXGBE_FCFLTRW_WE)); + IXGBE_WRITE_REG(hw, IXGBE_FCBUFF, 0); + IXGBE_WRITE_REG(hw, IXGBE_FCDMARW, + (xid | IXGBE_FCDMARW_WE)); + + /* read FCBUFF to check context invalidated */ + IXGBE_WRITE_REG(hw, IXGBE_FCDMARW, + (xid | IXGBE_FCDMARW_RE)); + fcbuff = IXGBE_READ_REG(hw, IXGBE_FCBUFF); + + spin_unlock_bh(&fcoe->lock); + break; + } + + /* guaranteed to be invalidated after 100us */ + if (fcbuff & IXGBE_FCBUFF_VALID) + udelay(100); + } + if (ddp->sgl) + dma_unmap_sg(ixgbe_pf_to_dev(adapter), ddp->sgl, ddp->sgc, + DMA_FROM_DEVICE); + if (ddp->pool) { + dma_pool_free(ddp->pool, ddp->udl, ddp->udp); + ddp->pool = NULL; + } + + ixgbe_fcoe_clear_ddp(ddp); + +out_ddp_put: + return len; +} + +/** + * ixgbe_fcoe_ddp_setup - called to set up ddp context + * @netdev: the corresponding net_device + * @xid: the exchange id requesting ddp + * @sgl: the scatter-gather list for this request + * @sgc: the number of scatter-gather items + * @target_mode: 1 to setup target mode, 0 to setup initiator mode + * + * Returns : 1 for success and 0 for no ddp + */ +static int ixgbe_fcoe_ddp_setup(struct net_device *netdev, u16 xid, + struct scatterlist *sgl, unsigned int sgc, + int target_mode) +{ + struct ixgbe_adapter *adapter; + struct ixgbe_hw *hw; + struct ixgbe_fcoe *fcoe; + struct ixgbe_fcoe_ddp *ddp; + struct ixgbe_fcoe_ddp_pool *ddp_pool; + struct scatterlist *sg; + unsigned int i, j, dmacount; + unsigned int len; + static const unsigned int bufflen = IXGBE_FCBUFF_MIN; + unsigned int firstoff = 0; + unsigned int lastsize; + unsigned int thisoff = 0; + unsigned int thislen = 0; + u32 fcbuff, fcdmarw, fcfltrw, fcrxctl; + dma_addr_t addr = 0; + + if (!netdev || !sgl || !sgc) + return 0; + + adapter = netdev_priv(netdev); + if (xid > netdev->fcoe_ddp_xid) { + e_warn(drv, "xid=0x%x out-of-range\n", xid); + return 0; + } + + /* no DDP if we are already down or resetting */ + if (test_bit(__IXGBE_DOWN, adapter->state) || + test_bit(__IXGBE_RESETTING, adapter->state)) + return 0; + + fcoe = &adapter->fcoe; + ddp = &fcoe->ddp[xid]; + if (ddp->sgl) { + e_err(drv, "xid 0x%x w/ non-null sgl=%p nents=%d\n", + xid, ddp->sgl, ddp->sgc); + return 0; + } + ixgbe_fcoe_clear_ddp(ddp); + + + if (!fcoe->ddp_pool) { + e_warn(drv, "No ddp_pool resources allocated\n"); + return 0; + } + + ddp_pool = per_cpu_ptr(fcoe->ddp_pool, get_cpu()); + if (!ddp_pool->pool) { + e_warn(drv, "xid=0x%x no ddp pool for fcoe\n", xid); + goto out_noddp; + } + + /* setup dma from scsi command sgl */ + dmacount = dma_map_sg(ixgbe_pf_to_dev(adapter), sgl, sgc, DMA_FROM_DEVICE); + if (dmacount == 0) { + e_err(drv, "xid 0x%x DMA map error\n", xid); + goto out_noddp; + } + + /* alloc the udl from per cpu ddp pool */ + ddp->udl = dma_pool_alloc(ddp_pool->pool, GFP_KERNEL, &ddp->udp); + if (!ddp->udl) { + e_err(drv, "failed allocated ddp context\n"); + goto out_noddp_unmap; + } + ddp->pool = ddp_pool->pool; + ddp->sgl = sgl; + ddp->sgc = sgc; + + j = 0; + for_each_sg(sgl, sg, dmacount, i) { + addr = sg_dma_address(sg); + len = sg_dma_len(sg); + while (len) { + /* max number of buffers allowed in one DDP context */ + if (j >= IXGBE_BUFFCNT_MAX) { + ddp_pool->noddp++; + goto out_noddp_free; + } + + /* get the offset of length of current buffer */ + thisoff = addr & ((dma_addr_t)bufflen - 1); + thislen = min((bufflen - thisoff), len); + /* + * all but the 1st buffer (j == 0) + * must be aligned on bufflen + */ + if ((j != 0) && (thisoff)) + goto out_noddp_free; + /* + * all but the last buffer + * ((i == (dmacount - 1)) && (thislen == len)) + * must end at bufflen + */ + if (((i != (dmacount - 1)) || (thislen != len)) + && ((thislen + thisoff) != bufflen)) + goto out_noddp_free; + + ddp->udl[j] = (u64)(addr - thisoff); + /* only the first buffer may have none-zero offset */ + if (j == 0) + firstoff = thisoff; + len -= thislen; + addr += thislen; + j++; + } + } + /* only the last buffer may have non-full bufflen */ + lastsize = thisoff + thislen; + + /* + * lastsize can not be bufflen. + * If it is then adding another buffer with lastsize = 1. + * Since lastsize is 1 there will be no HW access to this buffer. + */ + if (lastsize == bufflen) { + if (j >= IXGBE_BUFFCNT_MAX) { + ddp_pool->noddp_ext_buff++; + goto out_noddp_free; + } + + ddp->udl[j] = (u64)(fcoe->extra_ddp_buffer_dma); + j++; + lastsize = 1; + } + put_cpu(); + + fcbuff = (IXGBE_FCBUFF_4KB << IXGBE_FCBUFF_BUFFSIZE_SHIFT); + fcbuff |= ((j & 0xff) << IXGBE_FCBUFF_BUFFCNT_SHIFT); + fcbuff |= (firstoff << IXGBE_FCBUFF_OFFSET_SHIFT); + /* Set WRCONTX bit to allow DDP for target */ + if (target_mode) + fcbuff |= (IXGBE_FCBUFF_WRCONTX); + fcbuff |= (IXGBE_FCBUFF_VALID); + + fcdmarw = xid; + fcdmarw |= IXGBE_FCDMARW_WE; + fcdmarw |= (lastsize << IXGBE_FCDMARW_LASTSIZE_SHIFT); + + fcfltrw = xid; + fcfltrw |= IXGBE_FCFLTRW_WE; + + /* program DMA context */ + hw = &adapter->hw; + + /* turn on last frame indication for target mode as FCP_RSPtarget is + * supposed to send FCP_RSP when it is done. */ + if (target_mode && !test_bit(__IXGBE_FCOE_TARGET, &fcoe->mode)) { + set_bit(__IXGBE_FCOE_TARGET, &fcoe->mode); + fcrxctl = IXGBE_READ_REG(hw, IXGBE_FCRXCTRL); + fcrxctl |= IXGBE_FCRXCTRL_LASTSEQH; + IXGBE_WRITE_REG(hw, IXGBE_FCRXCTRL, fcrxctl); + } + + switch (hw->mac.type) { + case ixgbe_mac_X550: + /* X550 does not require DDP lock */ + + IXGBE_WRITE_REG(hw, IXGBE_FCDDC(0, xid), + ddp->udp & DMA_BIT_MASK(32)); + IXGBE_WRITE_REG(hw, IXGBE_FCDDC(1, xid), (u64)ddp->udp >> 32); + IXGBE_WRITE_REG(hw, IXGBE_FCDDC(2, xid), fcbuff); + IXGBE_WRITE_REG(hw, IXGBE_FCDDC(3, xid), fcdmarw); + /* program filter context */ + IXGBE_WRITE_REG(hw, IXGBE_FCDFC(0, xid), IXGBE_FCFLT_VALID); + IXGBE_WRITE_REG(hw, IXGBE_FCDFC(1, xid), 0); + IXGBE_WRITE_REG(hw, IXGBE_FCDFC(3, xid), fcfltrw); + /* + * TBD: SMAC and FCID info not available with current + * netdev APIs, add code to pull that from skb later + * and then program that here before enabling DDP context. + */ + break; + default: + /* other devices require DDP lock with direct DDP context access */ + spin_lock_bh(&fcoe->lock); + + IXGBE_WRITE_REG(hw, IXGBE_FCPTRL, ddp->udp & DMA_BIT_MASK(32)); + IXGBE_WRITE_REG(hw, IXGBE_FCPTRH, (u64)ddp->udp >> 32); + IXGBE_WRITE_REG(hw, IXGBE_FCBUFF, fcbuff); + IXGBE_WRITE_REG(hw, IXGBE_FCDMARW, fcdmarw); + /* program filter context */ + IXGBE_WRITE_REG(hw, IXGBE_FCPARAM, 0); + IXGBE_WRITE_REG(hw, IXGBE_FCFLT, IXGBE_FCFLT_VALID); + IXGBE_WRITE_REG(hw, IXGBE_FCFLTRW, fcfltrw); + + spin_unlock_bh(&fcoe->lock); + break; + } + + return 1; + +out_noddp_free: + dma_pool_free(ddp->pool, ddp->udl, ddp->udp); + ixgbe_fcoe_clear_ddp(ddp); + +out_noddp_unmap: + dma_unmap_sg(ixgbe_pf_to_dev(adapter), sgl, sgc, DMA_FROM_DEVICE); +out_noddp: + put_cpu(); + return 0; +} + +/** + * ixgbe_fcoe_ddp_get - Set up DDP context in initiator mode + * @netdev: The corresponding network device + * @xid: The exchange ID requesting DDP + * @sgl: The scatter-gather list for this request + * @sgc: The number of scatter-gather items + * + * This function implements the `ndo_fcoe_ddp_setup` operation for the + * ixgbe network adapter. It is called from the Upper Layer Driver (ULD), + * such as the FCP layer of libfc, to set up Direct Data Placement (DDP) + * for the specified exchange ID (xid) using the provided scatter-gather + * list (sgl) for the corresponding I/O operation. + * + * Return: 1 for success, or 0 if DDP is not set up. + */ +int ixgbe_fcoe_ddp_get(struct net_device *netdev, u16 xid, + struct scatterlist *sgl, unsigned int sgc) +{ + return ixgbe_fcoe_ddp_setup(netdev, xid, sgl, sgc, 0); +} + +#ifdef HAVE_NETDEV_OPS_FCOE_DDP_TARGET +/** + * ixgbe_fcoe_ddp_target - Set up DDP context in target mode + * @netdev: The corresponding network device + * @xid: The exchange ID requesting DDP + * @sgl: The scatter-gather list for this request + * @sgc: The number of scatter-gather items + * + * This function implements the `ndo_fcoe_ddp_target` operation for the + * ixgbe network adapter. It is called from the Upper Layer Driver (ULD), + * such as the FCP layer of libfc, to set up Direct Data Placement (DDP) + * for the specified exchange ID (xid) using the provided scatter-gather + * list (sgl) for the corresponding I/O operation. In target mode, DDP + * handles write I/O requests from the initiator. + * + * Return: 1 for success, or 0 if DDP is not set up. + */ +int ixgbe_fcoe_ddp_target(struct net_device *netdev, u16 xid, + struct scatterlist *sgl, unsigned int sgc) +{ + return ixgbe_fcoe_ddp_setup(netdev, xid, sgl, sgc, 1); +} +#endif /* HAVE_NETDEV_OPS_FCOE_DDP_TARGET */ + +/** + * ixgbe_fcoe_ddp - Check DDP status and mark it done + * @adapter: ixgbe adapter structure + * @rx_desc: Advanced Rx descriptor + * @skb: The socket buffer holding the received data + * + * This function checks the Direct Data Placement (DDP) status for Fibre + * Channel over Ethernet (FCoE) frames and marks the DDP context as done. + * It verifies the DDP status, updates the length of DDPed data, and + * determines whether to pass the skb to the Upper Layer Driver (ULD). The + * function handles different FCoE statuses and errors, and returns the + * length of DDPed data if applicable. + * + * Return: < 0 indicates an error or not a FCoE DDP, 0 indicates not passing + * the skb to ULD, > 0 indicates the length of data being DDPed. + */ +int ixgbe_fcoe_ddp(struct ixgbe_adapter *adapter, + union ixgbe_adv_rx_desc *rx_desc, + struct sk_buff *skb) +{ + struct ixgbe_fcoe *fcoe = &adapter->fcoe; + struct ixgbe_fcoe_ddp *ddp; + struct fc_frame_header *fh; + int rc = -EINVAL, ddp_max; + __le32 fcerr = ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_FCERR); + __le32 ddp_err; + u32 fctl; + u16 xid; + + if (fcerr == cpu_to_le32(IXGBE_FCERR_BADCRC)) + skb->ip_summed = CHECKSUM_NONE; + else + skb->ip_summed = CHECKSUM_UNNECESSARY; + + /* verify header contains at least the FCOE header */ + BUG_ON(skb_headlen(skb) < FCOE_HEADER_LEN); + + fh = (struct fc_frame_header *)(skb->data + sizeof(struct fcoe_hdr)); + + if (skb->protocol == htons(ETH_P_8021Q)) + fh = (struct fc_frame_header *)((char *)fh + VLAN_HLEN); + + fctl = ntoh24(fh->fh_f_ctl); + if (fctl & FC_FC_EX_CTX) + xid = ntohs(fh->fh_ox_id); + else + xid = ntohs(fh->fh_rx_id); + + ddp_max = IXGBE_FCOE_DDP_MAX; + /* X550 has different DDP Max limit */ + if (adapter->hw.mac.type == ixgbe_mac_X550) + ddp_max = IXGBE_FCOE_DDP_MAX_X550; + + if (xid >= ddp_max) + goto ddp_out; + + ddp = &fcoe->ddp[xid]; + if (!ddp->udl) + goto ddp_out; + + ddp_err = ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_FCEOFE | + IXGBE_RXDADV_ERR_FCERR); + if (ddp_err) + goto ddp_out; + + switch (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_STAT_FCSTAT)) { + /* return 0 to bypass going to ULD for DDPed data */ + case cpu_to_le32(IXGBE_RXDADV_STAT_FCSTAT_DDP): + /* update length of DDPed data */ + ddp->len = le32_to_cpu(rx_desc->wb.lower.hi_dword.rss); + rc = 0; + break; + /* unmap the sg list when FCPRSP is received */ + case cpu_to_le32(IXGBE_RXDADV_STAT_FCSTAT_FCPRSP): + dma_unmap_sg(ixgbe_pf_to_dev(adapter), ddp->sgl, + ddp->sgc, DMA_FROM_DEVICE); + ddp->err = ddp_err; + ddp->sgl = NULL; + ddp->sgc = 0; + fallthrough; + /* if DDP length is present pass it through to ULD */ + case cpu_to_le32(IXGBE_RXDADV_STAT_FCSTAT_NODDP): + /* update length of DDPed data */ + ddp->len = le32_to_cpu(rx_desc->wb.lower.hi_dword.rss); + if (ddp->len) + rc = ddp->len; + break; + /* no match will return as an error */ + case cpu_to_le32(IXGBE_RXDADV_STAT_FCSTAT_NOMTCH): + default: + break; + } + + /* In target mode, check the last data frame of the sequence. + * For DDP in target mode, data is already DDPed but the header + * indication of the last data frame ould allow is to tell if we + * got all the data and the ULP can send FCP_RSP back, as this is + * not a full fcoe frame, we fill the trailer here so it won't be + * dropped by the ULP stack. + */ + if ((fh->fh_r_ctl == FC_RCTL_DD_SOL_DATA) && + (fctl & FC_FC_END_SEQ)) { + struct fcoe_crc_eof *crc; + skb_linearize(skb); + crc = (struct fcoe_crc_eof *)skb_put(skb, sizeof(*crc)); + crc->fcoe_eof = FC_EOF_T; + } +ddp_out: + return rc; +} + +/** + * ixgbe_fso - ixgbe FCoE Sequence Offload (FSO) + * @tx_ring: tx desc ring + * @first: first tx_buffer structure containing skb, tx_flags, and protocol + * @hdr_len: hdr_len to be returned + * + * This sets up large send offload for FCoE + * + * Returns : 0 indicates success, < 0 for error + */ +int ixgbe_fso(struct ixgbe_ring *tx_ring, + struct ixgbe_tx_buffer *first, + u8 *hdr_len) +{ + struct sk_buff *skb = first->skb; + struct fc_frame_header *fh; + u32 vlan_macip_lens; + u32 fcoe_sof_eof = 0; + u32 mss_l4len_idx; + u8 sof, eof; + u32 type_tucmd = IXGBE_ADVTXT_TUCMD_FCOE; + +#ifdef NETIF_F_FSO + if (skb_is_gso(skb) && skb_shinfo(skb)->gso_type != SKB_GSO_FCOE) { + dev_err(tx_ring->dev, "Wrong gso type %d:expecting " + "SKB_GSO_FCOE\n", skb_shinfo(skb)->gso_type); + return -EINVAL; + } + +#endif + /* resets the header to point fcoe/fc */ + skb_set_network_header(skb, skb->mac_len); + skb_set_transport_header(skb, skb->mac_len + + sizeof(struct fcoe_hdr)); + + /* sets up SOF and ORIS */ + sof = ((struct fcoe_hdr *)skb_network_header(skb))->fcoe_sof; + switch (sof) { + case FC_SOF_I2: + fcoe_sof_eof = IXGBE_ADVTXD_FCOEF_ORIS; + break; + case FC_SOF_I3: + fcoe_sof_eof = IXGBE_ADVTXD_FCOEF_SOF | + IXGBE_ADVTXD_FCOEF_ORIS; + break; + case FC_SOF_N2: + break; + case FC_SOF_N3: + fcoe_sof_eof = IXGBE_ADVTXD_FCOEF_SOF; + break; + default: + dev_warn(tx_ring->dev, "unknown sof = 0x%x\n", sof); + return -EINVAL; + } + + /* the first byte of the last dword is EOF */ + skb_copy_bits(skb, skb->len - 4, &eof, 1); + /* sets up EOF and ORIE */ + switch (eof) { + case FC_EOF_N: + fcoe_sof_eof |= IXGBE_ADVTXD_FCOEF_EOF_N; + break; + case FC_EOF_T: + /* lso needs ORIE */ + if (skb_is_gso(skb)) + fcoe_sof_eof |= IXGBE_ADVTXD_FCOEF_EOF_N | + IXGBE_ADVTXD_FCOEF_ORIE; + else + fcoe_sof_eof |= IXGBE_ADVTXD_FCOEF_EOF_T; + break; + case FC_EOF_NI: + fcoe_sof_eof |= IXGBE_ADVTXD_FCOEF_EOF_NI; + break; + case FC_EOF_A: + fcoe_sof_eof |= IXGBE_ADVTXD_FCOEF_EOF_A; + break; + default: + dev_warn(tx_ring->dev, "unknown eof = 0x%x\n", eof); + return -EINVAL; + } + + /* sets up PARINC indicating data offset */ + fh = (struct fc_frame_header *)skb_transport_header(skb); + if (fh->fh_f_ctl[2] & FC_FC_REL_OFF) + fcoe_sof_eof |= IXGBE_ADVTXD_FCOEF_PARINC; + + /* include trailer in headlen as it is replicated per frame */ + *hdr_len = sizeof(struct fcoe_crc_eof); + + /* hdr_len includes fc_hdr if FCoE LSO is enabled */ + if (skb_is_gso(skb)) { + *hdr_len += skb_transport_offset(skb) + + sizeof(struct fc_frame_header); + /* update gso_segs and bytecount */ + first->gso_segs = DIV_ROUND_UP(skb->len - *hdr_len, + skb_shinfo(skb)->gso_size); + first->bytecount += (first->gso_segs - 1) * *hdr_len; + first->tx_flags |= IXGBE_TX_FLAGS_TSO; + /* Hardware expects L4T to be RSV for FCoE TSO */ + type_tucmd |= IXGBE_ADVTXD_TUCMD_L4T_RSV; + } + + /* set flag indicating FCOE to ixgbe_tx_map call */ + first->tx_flags |= IXGBE_TX_FLAGS_FCOE | IXGBE_TX_FLAGS_CC; + + /* mss_l4len_id: use 0 for FSO as TSO, no need for L4LEN */ + mss_l4len_idx = skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT; + + /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */ + vlan_macip_lens = skb_transport_offset(skb) + + sizeof(struct fc_frame_header); + vlan_macip_lens |= (skb_transport_offset(skb) - 4) + << IXGBE_ADVTXD_MACLEN_SHIFT; + vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK; + + /* write context desc */ + ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, fcoe_sof_eof, + type_tucmd, mss_l4len_idx); + + return 0; +} + +static void ixgbe_fcoe_dma_pool_free(struct ixgbe_fcoe *fcoe, unsigned int cpu) +{ + struct ixgbe_fcoe_ddp_pool *ddp_pool; + + ddp_pool = per_cpu_ptr(fcoe->ddp_pool, cpu); + dma_pool_destroy(ddp_pool->pool); + ddp_pool->pool = NULL; +} + +static int ixgbe_fcoe_dma_pool_alloc(struct ixgbe_fcoe *fcoe, + struct device *dev, + unsigned int cpu) +{ + struct ixgbe_fcoe_ddp_pool *ddp_pool; + struct dma_pool *pool; + char pool_name[32]; + + snprintf(pool_name, 32, "ixgbe_fcoe_ddp_%d", cpu); + + pool = dma_pool_create(pool_name, dev, IXGBE_FCPTR_MAX, + IXGBE_FCPTR_ALIGN, PAGE_SIZE); + if (!pool) + return -ENOMEM; + + ddp_pool = per_cpu_ptr(fcoe->ddp_pool, cpu); + ddp_pool->pool = pool; + ddp_pool->noddp = 0; + ddp_pool->noddp_ext_buff = 0; + + return 0; +} + +/** + * ixgbe_configure_fcoe - configures registers for fcoe at start + * @adapter: ptr to ixgbe adapter + * + * This sets up FCoE related registers + * + * Returns : none + */ +void ixgbe_configure_fcoe(struct ixgbe_adapter *adapter) +{ + struct ixgbe_ring_feature *fcoe = &adapter->ring_feature[RING_F_FCOE]; + struct ixgbe_hw *hw = &adapter->hw; + int i, fcoe_i; + u32 fcoe_q, fcoe_q_h = 0; + u32 etqf; + int fcreta_size; + + /* Minimal funcionality for FCoE requires at least CRC offloads */ + if (!(adapter->netdev->features & NETIF_F_FCOE_CRC)) + return; + + /* Enable L2 EtherType filter for FCoE, needed for FCoE CRC and DDP */ + etqf = ETH_P_FCOE | IXGBE_ETQF_FCOE | IXGBE_ETQF_FILTER_EN; + if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) { + etqf |= IXGBE_ETQF_POOL_ENABLE; + etqf |= VMDQ_P(0) << IXGBE_ETQF_POOL_SHIFT; + } + IXGBE_WRITE_REG(hw, IXGBE_ETQF(IXGBE_ETQF_FILTER_FCOE), etqf); + IXGBE_WRITE_REG(hw, IXGBE_ETQS(IXGBE_ETQF_FILTER_FCOE), 0); + + /* leave remaining registers unconfigued if FCoE is disabled */ + if (!(adapter->flags & IXGBE_FLAG_FCOE_ENABLED)) + return; + + /* Use one or more Rx queues for FCoE by redirection table */ + fcreta_size = IXGBE_FCRETA_SIZE; + if (adapter->hw.mac.type == ixgbe_mac_X550) + fcreta_size = IXGBE_FCRETA_SIZE_X550; + + for (i = 0; i < fcreta_size; i++) { + if (adapter->hw.mac.type == ixgbe_mac_X550) { + int fcoe_i_h = fcoe->offset + ((i + fcreta_size) % + fcoe->indices); + fcoe_q_h = adapter->rx_ring[fcoe_i_h]->reg_idx; + fcoe_q_h = (fcoe_q_h << IXGBE_FCRETA_ENTRY_HIGH_SHIFT) & + IXGBE_FCRETA_ENTRY_HIGH_MASK; + } + fcoe_i = fcoe->offset + (i % fcoe->indices); + if (fcoe_i >= MAX_RX_QUEUES) + fcoe_i = MAX_RX_QUEUES - 1; + fcoe_q = adapter->rx_ring[fcoe_i]->reg_idx; + fcoe_q |= fcoe_q_h; + IXGBE_WRITE_REG(hw, IXGBE_FCRETA(i), fcoe_q); + } + IXGBE_WRITE_REG(hw, IXGBE_FCRECTL, IXGBE_FCRECTL_ENA); + + /* Enable L2 EtherType filter for FIP */ + etqf = ETH_P_FIP | IXGBE_ETQF_FILTER_EN; + if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) { + etqf |= IXGBE_ETQF_POOL_ENABLE; + etqf |= VMDQ_P(0) << IXGBE_ETQF_POOL_SHIFT; + } + IXGBE_WRITE_REG(hw, IXGBE_ETQF(IXGBE_ETQF_FILTER_FIP), etqf); + + /* Send FIP frames to the first FCoE queue */ + fcoe_q = adapter->rx_ring[fcoe->offset]->reg_idx; + IXGBE_WRITE_REG(hw, IXGBE_ETQS(IXGBE_ETQF_FILTER_FIP), + IXGBE_ETQS_QUEUE_EN | + (fcoe_q << IXGBE_ETQS_RX_QUEUE_SHIFT)); + + /* Configure FCoE Rx control */ + IXGBE_WRITE_REG(hw, IXGBE_FCRXCTRL, + IXGBE_FCRXCTRL_FCCRCBO | + (FC_FCOE_VER << IXGBE_FCRXCTRL_FCOEVER_SHIFT)); +} + +/** + * ixgbe_free_fcoe_ddp_resources - release all fcoe ddp context resources + * @adapter : ixgbe adapter + * + * Cleans up outstanding ddp context resources + * + * Returns : none + */ +void ixgbe_free_fcoe_ddp_resources(struct ixgbe_adapter *adapter) +{ + struct ixgbe_fcoe *fcoe = &adapter->fcoe; + int cpu, i, ddp_max; + + /* do nothing if no DDP pools were allocated */ + if (!fcoe->ddp_pool) + return; + + ddp_max = IXGBE_FCOE_DDP_MAX; + /* X550 has different DDP Max limit */ + if (adapter->hw.mac.type == ixgbe_mac_X550) + ddp_max = IXGBE_FCOE_DDP_MAX_X550; + + for (i = 0; i < ddp_max; i++) + ixgbe_fcoe_ddp_put(adapter->netdev, i); + + for_each_possible_cpu(cpu) + ixgbe_fcoe_dma_pool_free(fcoe, cpu); + + dma_unmap_single(ixgbe_pf_to_dev(adapter), + fcoe->extra_ddp_buffer_dma, + IXGBE_FCBUFF_MIN, + DMA_FROM_DEVICE); + kfree(fcoe->extra_ddp_buffer); + + fcoe->extra_ddp_buffer = NULL; + fcoe->extra_ddp_buffer_dma = 0; +} + +/** + * ixgbe_setup_fcoe_ddp_resources - setup all fcoe ddp context resources + * @adapter: ixgbe adapter + * + * Sets up ddp context resouces + * + * Returns : 0 indicates success or -EINVAL on failure + */ +int ixgbe_setup_fcoe_ddp_resources(struct ixgbe_adapter *adapter) +{ + struct ixgbe_fcoe *fcoe = &adapter->fcoe; + struct device *dev = ixgbe_pf_to_dev(adapter); + void *buffer; + dma_addr_t dma; + unsigned int cpu; + + /* do nothing if no DDP pools were allocated */ + if (!fcoe->ddp_pool) + return 0; + + /* Extra buffer to be shared by all DDPs for HW work around */ + buffer = kmalloc(IXGBE_FCBUFF_MIN, GFP_KERNEL); + if (!buffer) { + e_err(drv, "failed to allocate extra DDP buffer\n"); + return -ENOMEM; + } + + dma = dma_map_single(dev, buffer, IXGBE_FCBUFF_MIN, DMA_FROM_DEVICE); + if (dma_mapping_error(dev, dma)) { + e_err(drv, "failed to map extra DDP buffer\n"); + kfree(buffer); + return -ENOMEM; + } + + fcoe->extra_ddp_buffer = buffer; + fcoe->extra_ddp_buffer_dma = dma; + + /* allocate pci pool for each cpu */ + for_each_possible_cpu(cpu) { + int err = ixgbe_fcoe_dma_pool_alloc(fcoe, dev, cpu); + if (!err) + continue; + + e_err(drv, "failed to alloc DDP pool on cpu:%d\n", cpu); + ixgbe_free_fcoe_ddp_resources(adapter); + return -ENOMEM; + } + + return 0; +} + +#ifndef HAVE_NETDEV_OPS_FCOE_ENABLE +int ixgbe_fcoe_ddp_enable(struct ixgbe_adapter *adapter) +#else +static int ixgbe_fcoe_ddp_enable(struct ixgbe_adapter *adapter) +#endif +{ + struct ixgbe_fcoe *fcoe = &adapter->fcoe; + + if (!(adapter->flags & IXGBE_FLAG_FCOE_CAPABLE)) + return -EINVAL; + + fcoe->ddp_pool = alloc_percpu(struct ixgbe_fcoe_ddp_pool); + + if (!fcoe->ddp_pool) { + e_err(drv, "failed to allocate percpu DDP resources\n"); + return -ENOMEM; + } + + adapter->netdev->fcoe_ddp_xid = IXGBE_FCOE_DDP_MAX - 1; + + /* X550 has different DDP Max limit */ + if (adapter->hw.mac.type == ixgbe_mac_X550) + adapter->netdev->fcoe_ddp_xid = IXGBE_FCOE_DDP_MAX_X550 - 1; + + return 0; +} + +#ifndef HAVE_NETDEV_OPS_FCOE_ENABLE +void ixgbe_fcoe_ddp_disable(struct ixgbe_adapter *adapter) +#else +static void ixgbe_fcoe_ddp_disable(struct ixgbe_adapter *adapter) +#endif +{ + struct ixgbe_fcoe *fcoe = &adapter->fcoe; + + adapter->netdev->fcoe_ddp_xid = 0; + + if (!fcoe->ddp_pool) + return; + + free_percpu(fcoe->ddp_pool); + fcoe->ddp_pool = NULL; +} + +#ifdef HAVE_NETDEV_OPS_FCOE_ENABLE +/** + * ixgbe_fcoe_enable - Turn on FCoE offload feature + * @netdev: The corresponding network device + * + * This function enables the Fibre Channel over Ethernet (FCoE) offload + * feature on the ixgbe network adapter, specifically for the 82599 model. + * It increments the FCoE reference count, checks for FCoE capability, and + * ensures that FCoE is not already enabled. The function allocates memory + * for DDP pools, updates network device features, and reinitializes + * interrupt schemes. It returns an error if FCoE is not capable or already + * enabled. + * + * Return: 0 on success, or -EINVAL on failure. + */ +int ixgbe_fcoe_enable(struct net_device *netdev) +{ + struct ixgbe_adapter *adapter = netdev_priv(netdev); + struct ixgbe_fcoe *fcoe = &adapter->fcoe; + + atomic_inc(&fcoe->refcnt); + + if (!(adapter->flags & IXGBE_FLAG_FCOE_CAPABLE)) + return -EINVAL; + + if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED) + return -EINVAL; + + e_info(drv, "Enabling FCoE offload features.\n"); + + if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) + e_warn(probe, "Enabling FCoE on PF will disable legacy VFs\n"); + + if (netif_running(netdev)) + netdev->netdev_ops->ndo_stop(netdev); + + /* Allocate per CPU memory to track DDP pools */ + ixgbe_fcoe_ddp_enable(adapter); + + /* enable FCoE and notify stack */ + adapter->flags |= IXGBE_FLAG_FCOE_ENABLED; +#ifdef HAVE_NETDEV_FCOE_MTU + netdev->fcoe_mtu = true; +#else + netdev->features |= NETIF_F_FCOE_MTU; +#endif + netdev_features_change(netdev); + + /* release existing queues and reallocate them */ + ixgbe_clear_interrupt_scheme(adapter); + ixgbe_init_interrupt_scheme(adapter); + + if (netif_running(netdev)) + netdev->netdev_ops->ndo_open(netdev); + + return 0; +} + +/** + * ixgbe_fcoe_disable - Turn off FCoE offload feature + * @netdev: The corresponding network device + * + * This function disables the Fibre Channel over Ethernet (FCoE) offload + * feature on the ixgbe network adapter, specifically for the 82599 model. + * It decrements the reference count for FCoE, stops the network device if + * it is running, and frees per-CPU memory used for tracking DDP pools. The + * function also updates the network device's features and reinitializes + * interrupt schemes. It returns an error if FCoE is not enabled or if the + * reference count is not zero. + * + * Return: 0 on success, or -EINVAL on failure. + */ +int ixgbe_fcoe_disable(struct net_device *netdev) +{ + struct ixgbe_adapter *adapter = netdev_priv(netdev); + + if (!atomic_dec_and_test(&adapter->fcoe.refcnt)) + return -EINVAL; + + if (!(adapter->flags & IXGBE_FLAG_FCOE_ENABLED)) + return -EINVAL; + + e_info(drv, "Disabling FCoE offload features.\n"); + if (netif_running(netdev)) + netdev->netdev_ops->ndo_stop(netdev); + + /* Free per CPU memory to track DDP pools */ + ixgbe_fcoe_ddp_disable(adapter); + + /* disable FCoE and notify stack */ + adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED; +#ifdef HAVE_NETDEV_FCOE_MTU + netdev->fcoe_mtu = false; +#else + netdev->features &= ~NETIF_F_FCOE_MTU; +#endif + + netdev_features_change(netdev); + + /* release existing queues and reallocate them */ + ixgbe_clear_interrupt_scheme(adapter); + ixgbe_init_interrupt_scheme(adapter); + + if (netif_running(netdev)) + netdev->netdev_ops->ndo_open(netdev); + + return 0; +} +#endif /* HAVE_NETDEV_OPS_FCOE_ENABLE */ + +#if IS_ENABLED(CONFIG_DCB) +#ifdef HAVE_DCBNL_OPS_GETAPP +/** + * ixgbe_fcoe_getapp - retrieves current user priority bitmap for FCoE + * @netdev: the corresponding net_device + * + * Finds out the corresponding user priority bitmap from the current + * traffic class that FCoE belongs to. Returns 0 as the invalid user + * priority bitmap to indicate an error. + * + * Returns : 802.1p user priority bitmap for FCoE + */ +u8 ixgbe_fcoe_getapp(struct net_device *netdev) +{ + struct ixgbe_adapter *adapter = netdev_priv(netdev); + return 1 << adapter->fcoe.up; +} +#endif /* HAVE_DCBNL_OPS_GETAPP */ +#endif /* CONFIG_DCB */ +#ifdef HAVE_NETDEV_OPS_FCOE_GETWWN +/** + * ixgbe_fcoe_get_wwn - Get World Wide Name (WWN) for the node or port + * @netdev: The ixgbe network device + * @wwn: Pointer to store the World Wide Name + * @type: The type of World Wide Name (node or port) + * + * This function retrieves the World Wide Name (WWN) for either the node or + * the port of the ixgbe network adapter. It checks if both the prefix and + * the SAN MAC address are valid, and then forms the WWN based on the NAA-2 + * format for IEEE Extended name identifiers, as specified in the T10 FC-LS + * Specification, Section 15.3. The function returns an error if the prefix + * or SAN MAC address is invalid. + * + * Return: 0 on success, or -EINVAL on failure. + */ +int ixgbe_fcoe_get_wwn(struct net_device *netdev, u64 *wwn, int type) +{ + int rc = -EINVAL; + u16 prefix = 0xffff; + struct ixgbe_adapter *adapter = netdev_priv(netdev); + struct ixgbe_mac_info *mac = &adapter->hw.mac; + + switch (type) { + case NETDEV_FCOE_WWNN: + prefix = mac->wwnn_prefix; + break; + case NETDEV_FCOE_WWPN: + prefix = mac->wwpn_prefix; + break; + default: + break; + } + + if ((prefix != 0xffff) && + is_valid_ether_addr(mac->san_addr)) { + *wwn = ((u64) prefix << 48) | + ((u64) mac->san_addr[0] << 40) | + ((u64) mac->san_addr[1] << 32) | + ((u64) mac->san_addr[2] << 24) | + ((u64) mac->san_addr[3] << 16) | + ((u64) mac->san_addr[4] << 8) | + ((u64) mac->san_addr[5]); + rc = 0; + } + return rc; +} +#endif /* HAVE_NETDEV_OPS_FCOE_GETWWN */ + +/** + * ixgbe_fcoe_get_tc - Get the current Traffic Class (TC) for FCoE + * @adapter: Pointer to the device adapter structure + * + * This function retrieves the current Traffic Class (TC) that Fibre Channel + * over Ethernet (FCoE) is mapped to for the ixgbe network adapter. It uses + * the priority-to-TC mapping of the network device to determine the TC + * associated with the FCoE user priority (UP). + * + * Return: The Traffic Class (TC) that FCoE is mapped to. + */ +u8 ixgbe_fcoe_get_tc(struct ixgbe_adapter *adapter) +{ + return netdev_get_prio_tc_map(adapter->netdev, adapter->fcoe.up); +} +#endif /* CONFIG_FCOE */ diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_fcoe.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_fcoe.h new file mode 100644 index 00000000000..ed631fac326 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_fcoe.h @@ -0,0 +1,72 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 1999 - 2026 Intel Corporation */ + +#ifndef _IXGBE_FCOE_H_ +#define _IXGBE_FCOE_H_ + +#if IS_ENABLED(CONFIG_FCOE) + +#include +#include + +/* shift bits within STAT fo FCSTAT */ +#define IXGBE_RXDADV_FCSTAT_SHIFT 4 + +/* ddp user buffer */ +#define IXGBE_BUFFCNT_MAX 256 /* 8 bits bufcnt */ +#define IXGBE_FCPTR_ALIGN 16 +#define IXGBE_FCPTR_MAX (IXGBE_BUFFCNT_MAX * sizeof(dma_addr_t)) +#define IXGBE_FCBUFF_4KB 0x0 +#define IXGBE_FCBUFF_8KB 0x1 +#define IXGBE_FCBUFF_16KB 0x2 +#define IXGBE_FCBUFF_64KB 0x3 +#define IXGBE_FCBUFF_MAX 65536 /* 64KB max */ +#define IXGBE_FCBUFF_MIN 4096 /* 4KB min */ +#define IXGBE_FCOE_DDP_MAX 512 /* 9 bits xid */ +#define IXGBE_FCOE_DDP_MAX_X550 2048 /* 11 bits xid */ + +/* Default user priority to use for FCoE */ +#define IXGBE_FCOE_DEFUP 3 + +/* fcerr */ +#define IXGBE_FCERR_BADCRC 0x00100000 +#define IXGBE_FCERR_EOFSOF 0x00200000 +#define IXGBE_FCERR_NOFIRST 0x00300000 +#define IXGBE_FCERR_OOOSEQ 0x00400000 +#define IXGBE_FCERR_NODMA 0x00500000 +#define IXGBE_FCERR_PKTLOST 0x00600000 + +/* FCoE DDP for target mode */ +#define __IXGBE_FCOE_TARGET 1 + +struct ixgbe_fcoe_ddp { + int len; + u32 err; + unsigned int sgc; + struct scatterlist *sgl; + dma_addr_t udp; + u64 *udl; + struct dma_pool *pool; +}; + +/* per cpu variables */ +struct ixgbe_fcoe_ddp_pool { + struct dma_pool *pool; + u64 noddp; + u64 noddp_ext_buff; +}; + +struct ixgbe_fcoe { + struct ixgbe_fcoe_ddp_pool __percpu *ddp_pool; + atomic_t refcnt; + spinlock_t lock; + struct ixgbe_fcoe_ddp ddp[IXGBE_FCOE_DDP_MAX_X550]; + void *extra_ddp_buffer; + dma_addr_t extra_ddp_buffer_dma; + unsigned long mode; + u8 up; + u8 up_set; +}; +#endif /* CONFIG_FCOE */ + +#endif /* _IXGBE_FCOE_H */ diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_fw_update.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_fw_update.c new file mode 100644 index 00000000000..da45f4bc0ca --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_fw_update.c @@ -0,0 +1,945 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 1999 - 2026 Intel Corporation */ + +#include "ixgbe.h" + +#include +#include +#if IS_ENABLED(CONFIG_PLDMFW) +#include +#else +#include "kcompat_pldmfw.h" +#endif + +#include "ixgbe_fw_update.h" + +struct ixgbe_fwu_priv { + struct pldmfw context; + + struct ixgbe_adapter *adapter; + struct netlink_ext_ack *extack; + + /* Track which NVM banks to activate at the end of the update */ + u8 activate_flags; + + /* Track the firmware response of the required reset to complete the + * flash update. + * + * 0 - IXGBE_ACI_NVM_POR_FLAG - A full power on is required + * 1 - IXGBE_ACI_NVM_PERST_FLAG - A cold PCIe reset is required + * 2 - IXGBE_ACI_NVM_EMPR_FLAG - An EMP reset is required + */ + u8 reset_level; + + /* Track if EMP reset is available */ + u8 emp_reset_available; +}; + +/** + * ixgbe_send_package_data - Send record package data to firmware + * @context: PLDM fw update structure + * @data: pointer to the package data + * @length: length of the package data + * + * Send a copy of the package data associated with the PLDM record matching + * this device to the firmware. + * + * Note that this function sends an ACI command that will fail unless the + * NVM resource has been acquired. + * + * Return: 0 on success, or a negative error code on failure. + */ +static int ixgbe_send_package_data(struct pldmfw *context, + const u8 *data, u16 length) +{ + struct ixgbe_fwu_priv *priv = container_of(context, + struct ixgbe_fwu_priv, + context); + struct netlink_ext_ack *extack = priv->extack; + struct ixgbe_adapter *adapter = priv->adapter; + struct ixgbe_hw *hw = &adapter->hw; + struct device *dev = context->dev; + u8 *package_data; + s32 status; + + dev_dbg(dev, "Sending PLDM record package data to firmware\n"); + + package_data = kmemdup(data, length, GFP_KERNEL); + if (!package_data) + return -ENOMEM; + + status = ixgbe_nvm_set_pkg_data(hw, false, package_data, length); + + kfree(package_data); + + if (status) { + dev_err(dev, + "Failed to send record package data to firmware, err %d aci_err %d\n", + status, hw->aci.last_status); + NL_SET_ERR_MSG_MOD(extack, + "Failed to record package data to firmware"); + return -EIO; + } + + return 0; +} + +/** + * ixgbe_check_component_response - Report firmware response to a component + * @adapter: device private data structure + * @id: component id being checked + * @response: indicates whether this component can be updated + * @code: code indicating reason for response + * @extack: netlink extended ACK structure + * + * Check whether firmware indicates if this component can be updated. Report + * a suitable error message over the netlink extended ACK if the component + * cannot be updated. + * + * Return: 0 if the component can be updated, or -ECANCELED of the + * firmware indicates the component cannot be updated. + */ +static int ixgbe_check_component_response(struct ixgbe_adapter *adapter, + u16 id, u8 response, u8 code, + struct netlink_ext_ack *extack) +{ + struct device *dev = ixgbe_pf_to_dev(adapter); + const char *component; + + switch (id) { + case NVM_COMP_ID_OROM: + component = "fw.undi"; + break; + case NVM_COMP_ID_NVM: + component = "fw.mgmt"; + break; + case NVM_COMP_ID_NETLIST: + component = "fw.netlist"; + break; + default: + WARN(1, "Unexpected unknown component identifier 0x%02x", id); + return -EINVAL; + } + + dev_dbg(dev, "%s: firmware response 0x%x, code 0x%x\n", + component, response, code); + + switch (response) { + case IXGBE_ACI_NVM_PASS_COMP_CAN_BE_UPDATED: + /* firmware indicated this update is good to proceed */ + return 0; + case IXGBE_ACI_NVM_PASS_COMP_CAN_MAY_BE_UPDATEABLE: + dev_warn(dev, + "firmware recommends not updating %s, as it may result in a downgrade. Continuing anyways\n", + component); + return 0; + case IXGBE_ACI_NVM_PASS_COMP_CAN_NOT_BE_UPDATED: + dev_info(dev, "firmware has rejected updating %s\n", component); + break; + case IXGBE_ACI_NVM_PASS_COMP_PARTIAL_CHECK: + if (ixgbe_fw_recovery_mode(&adapter->hw)) + return 0; + break; + } + + switch (code) { + case IXGBE_ACI_NVM_PASS_COMP_STAMP_IDENTICAL_CODE: + dev_err(dev, + "Component comparison stamp for %s is identical to the running image\n", + component); + NL_SET_ERR_MSG_MOD(extack, + "Component comparison stamp is identical to running image"); + break; + case IXGBE_ACI_NVM_PASS_COMP_STAMP_LOWER: + dev_err(dev, + "Component comparison stamp for %s is lower than the running image\n", + component); + NL_SET_ERR_MSG_MOD(extack, + "Component comparison stamp is lower than running image"); + break; + case IXGBE_ACI_NVM_PASS_COMP_INVALID_STAMP_CODE: + dev_err(dev, + "Component comparison stamp for %s is invalid\n", + component); + NL_SET_ERR_MSG_MOD(extack, + "Component comparison stamp is invalid"); + break; + case IXGBE_ACI_NVM_PASS_COMP_CONFLICT_CODE: + dev_err(dev, + "%s conflicts with a previous component table\n", + component); + NL_SET_ERR_MSG_MOD(extack, + "Component table conflict occurred"); + break; + case IXGBE_ACI_NVM_PASS_COMP_PRE_REQ_NOT_MET_CODE: + dev_err(dev, + "Pre-requisites for component %s have not been met\n", + component); + NL_SET_ERR_MSG_MOD(extack, "Component pre-requisites not met"); + break; + case IXGBE_ACI_NVM_PASS_COMP_NOT_SUPPORTED_CODE: + dev_err(dev, "%s is not a supported component\n", + component); + NL_SET_ERR_MSG_MOD(extack, "Component not supported"); + break; + case IXGBE_ACI_NVM_PASS_COMP_CANNOT_DOWNGRADE_CODE: + dev_err(dev, + "Security restrictions prevent %s from being downgraded\n", + component); + NL_SET_ERR_MSG_MOD(extack, "Component cannot be downgraded"); + break; + case IXGBE_ACI_NVM_PASS_COMP_INCOMPLETE_IMAGE_CODE: + dev_err(dev, "Received an incomplete component image for %s\n", + component); + NL_SET_ERR_MSG_MOD(extack, "Incomplete component image"); + break; + case IXGBE_ACI_NVM_PASS_COMP_VER_STR_IDENTICAL_CODE: + dev_err(dev, + "Component version for %s is identical to the running image\n", + component); + NL_SET_ERR_MSG_MOD(extack, + "Component version is identical to running image"); + break; + case IXGBE_ACI_NVM_PASS_COMP_VER_STR_LOWER_CODE: + dev_err(dev, + "Component version for %s is lower than the running image\n", + component); + NL_SET_ERR_MSG_MOD(extack, + "Component version is lower than the running image"); + break; + default: + dev_err(dev, "Unexpected response code 0x02%x for %s\n", + code, component); + NL_SET_ERR_MSG_MOD(extack, + "Received unexpected response code from firmware"); + break; + } + + return -ECANCELED; +} + +/** + * ixgbe_send_component_table - Send PLDM component table to firmware + * @context: PLDM fw update structure + * @component: the component to process + * @transfer_flag: relative transfer order of this component + * + * Read relevant data from the component and forward it to the device + * firmware. Check the response to determine if the firmware indicates that + * the update can proceed. + * + * Send ACI commands related to the NVM, and assume + * the NVM resource has been acquired. + * + * Return: 0 on success, or a negative error code on failure. + */ +static int ixgbe_send_component_table(struct pldmfw *context, + struct pldmfw_component *component, + u8 transfer_flag) +{ + struct ixgbe_fwu_priv *priv = container_of(context, + struct ixgbe_fwu_priv, + context); + struct ixgbe_adapter *adapter = priv->adapter; + struct netlink_ext_ack *extack = priv->extack; + struct ixgbe_aci_cmd_nvm_comp_tbl *comp_tbl; + u8 comp_response, comp_response_code; + struct ixgbe_hw *hw = &adapter->hw; + struct device *dev = context->dev; + size_t length; + s32 status; + + switch (component->identifier) { + case NVM_COMP_ID_OROM: + case NVM_COMP_ID_NVM: + case NVM_COMP_ID_NETLIST: + break; + default: + dev_err(dev, + "Unable to update due to a firmware component with unknown ID %u\n", + component->identifier); + NL_SET_ERR_MSG_MOD(extack, + "Unable to update due to unknown firmware component"); + return -EOPNOTSUPP; + } + + length = struct_size(comp_tbl, cvs, component->version_len); + comp_tbl = (struct ixgbe_aci_cmd_nvm_comp_tbl *) + ixgbe_malloc(hw, length); + if (!comp_tbl) + return -ENOMEM; + + comp_tbl->comp_class = cpu_to_le16(component->classification); + comp_tbl->comp_id = cpu_to_le16(component->identifier); + comp_tbl->comp_class_idx = FWU_COMP_CLASS_IDX_NOT_USE; + comp_tbl->comp_cmp_stamp = cpu_to_le32(component->comparison_stamp); + comp_tbl->cvs_type = component->version_type; + comp_tbl->cvs_len = component->version_len; + + memcpy(comp_tbl->cvs, component->version_string, + component->version_len); + + dev_dbg(dev, "Sending component table to firmware\n"); + + status = ixgbe_nvm_pass_component_tbl(hw, (u8 *)comp_tbl, length, + transfer_flag, &comp_response, + &comp_response_code); + + ixgbe_free(hw, comp_tbl); + + if (status) { + dev_err(dev, + "Failed to transfer component table to firmware, err %d\n", + status); + NL_SET_ERR_MSG_MOD(extack, + "Failed to transfer component table to firmware"); + return -EIO; + } + + return ixgbe_check_component_response(adapter, + component->identifier, + comp_response, + comp_response_code, extack); +} + +/** + * ixgbe_write_one_nvm_block - Write an NVM block and await completion response + * @adapter: the PF data structure + * @module: the module to write to + * @offset: offset in bytes + * @block_size: size of the block to write, up to 4k + * @block: pointer to block of data to write + * @last_cmd: whether this is the last command + * @reset_level: storage for reset level required + * @extack: netlink extended ACK structure + * + * Write a block of data to a flash module, and await for the completion + * response message from firmware. + * + * Note this function assumes the caller has acquired the NVM resource. + * + * On successful return, reset level indicates the device reset required to + * complete the update. + * + * 0 - IXGBE_ACI_NVM_POR_FLAG - A full power on is required + * 1 - IXGBE_ACI_NVM_PERST_FLAG - A cold PCIe reset is required + * 2 - IXGBE_ACI_NVM_EMPR_FLAG - An EMP reset is required + * + * Return: 0 on success, or a negative error code on failure. + */ +int ixgbe_write_one_nvm_block(struct ixgbe_adapter *adapter, + u16 module, u32 offset, + u16 block_size, u8 *block, bool last_cmd, + u8 *reset_level, + struct netlink_ext_ack *extack) +{ + struct device *dev = ixgbe_pf_to_dev(adapter); + struct ixgbe_hw *hw = &adapter->hw; + s32 status; + + dev_dbg(dev, "Writing block of %u bytes for module 0x%02x at offset %u\n", + block_size, module, offset); + status = ixgbe_aci_update_nvm(hw, module, offset, block_size, block, + last_cmd, 0); + if (status) { + dev_err(dev, "Failed to flash module 0x%02x with block of size %u at offset %u, err %d\n", + module, block_size, offset, status); + NL_SET_ERR_MSG_MOD(extack, "Failed to program flash module"); + return -EIO; + } + /* For the last command to write the NVM bank, newer versions of + * firmware indicate the required level of reset to complete + * activation of firmware. If the firmware supports this, cache the + * response for indicating to the user later. Otherwise, assume that + * a full power cycle is required. + */ + if (reset_level && last_cmd && module == E610_SR_1ST_NVM_BANK_PTR) { + if (hw->dev_caps.common_cap.pcie_reset_avoidance) { + *reset_level = IXGBE_ACI_NVM_RESET_LVL_M; + dev_dbg(dev, "Required reset level is %u\n", + *reset_level); + } else { + *reset_level = IXGBE_ACI_NVM_POR_FLAG; + dev_dbg(dev, "Firmware doesn't support indicating required reset level. Assuming a power cycle is required\n"); + } + } + + return 0; +} + +/** + * ixgbe_write_nvm_module - Write data to an NVM module + * @adapter: the PF driver structure + * @module: the module id to program + * @component: the name of the component being updated + * @image: buffer of image data to write to the NVM + * @length: length of the buffer + * @reset_level: storage for reset level required + * @extack: netlink extended ACK structure + * + * Loop over the data for a given NVM module and program it in 4 Kb + * blocks. Notify devlink core of progress after each block is programmed. + * Loops over a block of data and programs the NVM in 4k block chunks. + * + * Note this function assumes the caller has acquired the NVM resource. + * + * Return: 0 on success, or a negative error code on failure. + */ +static int ixgbe_write_nvm_module(struct ixgbe_adapter *adapter, u16 module, + const char *component, const u8 *image, + u32 length, u8 *reset_level, + struct netlink_ext_ack *extack) +{ + struct device *dev = ixgbe_pf_to_dev(adapter); + struct devlink *devlink = adapter->devlink; + u32 offset = 0; + bool last_cmd; + u8 *block; + int err; + + dev_dbg(dev, "Beginning write of flash component '%s', module 0x%02x\n", + component, module); + + devlink_flash_update_status_notify(devlink, "Flashing", + component, 0, length); + + block = ixgbe_malloc(hw, IXGBE_ACI_MAX_BUFFER_SIZE); + if (!block) + return -ENOMEM; + + do { + u32 block_size; + + block_size = min_t(u32, IXGBE_ACI_MAX_BUFFER_SIZE, + length - offset); + last_cmd = !(offset + block_size < length); + + memcpy(block, image + offset, block_size); + + err = ixgbe_write_one_nvm_block(adapter, module, offset, + block_size, block, last_cmd, + reset_level, extack); + if (err) + break; + + offset += block_size; + + devlink_flash_update_status_notify(devlink, "Flashing", + component, offset, length); + } while (!last_cmd); + + dev_dbg(dev, "Completed write of flash component '%s' module 0x%02x\n", + component, module); + + if (err) + devlink_flash_update_status_notify(devlink, "Flashing failed", + component, length, length); + else + devlink_flash_update_status_notify(devlink, "Flashing done", + component, length, length); + + ixgbe_free(hw, block); + + return err; +} + +/* Length in seconds to wait before timing out when erasing a flash module. + * Yes, erasing really can take minutes to complete. + */ +#define IXGBE_FW_ERASE_TIMEOUT 300 + +/** + * ixgbe_erase_nvm_module - Erase an NVM module and await firmware completion + * @adapter: the PF data structure + * @module: the module to erase + * @component: name of the component being updated + * @extack: netlink extended ACK structure + * + * Erase the inactive NVM bank associated with this module, and await for + * a completion response message from firmware. + * + * Note this function assumes the caller has acquired the NVM resource. + * + * Return: 0 on success, or a negative error code on failure. + */ +static int ixgbe_erase_nvm_module(struct ixgbe_adapter *adapter, u16 module, + const char *component, + struct netlink_ext_ack *extack) +{ + struct device *dev = ixgbe_pf_to_dev(adapter); + struct devlink *devlink = adapter->devlink; + struct ixgbe_hw *hw = &adapter->hw; + s32 status; + int err; + + dev_dbg(dev, "Beginning erase of flash component '%s', module 0x%02x\n", + component, module); + + devlink_flash_update_timeout_notify(devlink, "Erasing", component, + IXGBE_FW_ERASE_TIMEOUT); + + status = ixgbe_aci_erase_nvm(hw, module); + if (status) { + dev_err(dev, "Failed to erase %s (module 0x%02x), err %d\n", + component, module, status); + NL_SET_ERR_MSG_MOD(extack, "Failed to erase flash module"); + err = -EIO; + + devlink_flash_update_status_notify(devlink, "Erasing failed", + component, 0, 0); + } else { + err = 0; + + devlink_flash_update_status_notify(devlink, "Erasing done", + component, 0, 0); + } + + return err; +} + +/** + * ixgbe_switch_flash_banks - Tell firmware to switch NVM banks + * @adapter: Pointer to the PF data structure + * @activate_flags: flags used for the activation command + * @emp_reset_available: on return, indicates if EMP reset is available + * @extack: netlink extended ACK structure + * + * Notify firmware to activate the newly written flash banks, and wait for the + * firmware response. + * + * Return: 0 on success or an error code on failure. + */ +static int ixgbe_switch_flash_banks(struct ixgbe_adapter *adapter, + u8 activate_flags, + u8 *emp_reset_available, + struct netlink_ext_ack *extack) +{ + struct device *dev = ixgbe_pf_to_dev(adapter); + struct ixgbe_hw *hw = &adapter->hw; + u8 response_flags; + s32 status; + + status = ixgbe_nvm_write_activate(hw, activate_flags, &response_flags); + if (status) { + dev_err(dev, "Failed to switch active flash banks, err %d\n", + status); + NL_SET_ERR_MSG_MOD(extack, + "Failed to switch active flash banks"); + return -EIO; + } + /* Newer versions of firmware have support to indicate whether an EMP + * reset to reload firmware is available. For older firmware, EMP + * reset is always available. + */ + if (emp_reset_available) { + if (hw->dev_caps.common_cap.reset_restrict_support) { + *emp_reset_available = + response_flags & IXGBE_ACI_NVM_EMPR_ENA; + dev_dbg(dev, + "Firmware indicated that EMP reset is %s\n", + *emp_reset_available ? + "available" : "not available"); + } else { + *emp_reset_available = IXGBE_ACI_NVM_EMPR_ENA; + dev_dbg(dev, + "Firmware does not support restricting EMP reset availability\n"); + } + } + + return 0; +} + +/** + * ixgbe_flash_component - Flash a component of the NVM + * @context: PLDM fw update structure + * @component: the component table to program + * + * Program the flash contents for a given component. First, determine the + * module id. Then, erase the secondary bank for this module. Finally, write + * the contents of the component to the NVM. + * + * Note this function assumes the caller has acquired the NVM resource. + * + * Return: 0 on success, or a negative error code on failure. + */ +static int ixgbe_flash_component(struct pldmfw *context, + struct pldmfw_component *component) +{ + struct ixgbe_fwu_priv *priv = container_of(context, + struct ixgbe_fwu_priv, + context); + struct netlink_ext_ack *extack = priv->extack; + struct ixgbe_adapter *adapter = priv->adapter; + const char *name; + u8 *reset_level; + u16 module; + int err; + u8 flag; + + switch (component->identifier) { + case NVM_COMP_ID_OROM: + module = E610_SR_1ST_OROM_BANK_PTR; + flag = IXGBE_ACI_NVM_ACTIV_SEL_OROM; + reset_level = NULL; + name = "fw.undi"; + break; + case NVM_COMP_ID_NVM: + module = E610_SR_1ST_NVM_BANK_PTR; + flag = IXGBE_ACI_NVM_ACTIV_SEL_NVM; + reset_level = &priv->reset_level; + name = "fw.mgmt"; + break; + case NVM_COMP_ID_NETLIST: + module = E610_SR_NETLIST_BANK_PTR; + flag = IXGBE_ACI_NVM_ACTIV_SEL_NETLIST; + reset_level = NULL; + name = "fw.netlist"; + break; + + default: + /* This should not trigger, since we check the id before + * sending the component table to firmware. + */ + WARN(1, "Unexpected unknown component identifier 0x%02x", + component->identifier); + return -EINVAL; + } + + /* Mark this component for activating at the end */ + priv->activate_flags |= flag; + + err = ixgbe_erase_nvm_module(adapter, module, name, extack); + if (err) + return err; + + return ixgbe_write_nvm_module(adapter, module, name, + component->component_data, + component->component_size, reset_level, + extack); +} + +/** + * ixgbe_finalize_update - Perform last steps to complete device update + * @context: PLDM fw update structure + * + * Called as the last step of the update process. Complete the update by + * telling the firmware to switch active banks, and perform a reset of + * configured. + * + * Return: 0 on success, or an error code on failure. + */ +static int ixgbe_finalize_update(struct pldmfw *context) +{ + struct ixgbe_fwu_priv *priv = container_of(context, + struct ixgbe_fwu_priv, + context); + struct ixgbe_adapter *adapter = priv->adapter; + struct netlink_ext_ack *extack = priv->extack; + struct devlink *devlink; + struct device *dev; + int err; + + /* Finally, notify firmware to activate the written NVM banks */ + err = ixgbe_switch_flash_banks(adapter, priv->activate_flags, + &priv->emp_reset_available, extack); + if (err) + return err; + + devlink = adapter->devlink; + dev = ixgbe_pf_to_dev(adapter); + + /* If the required reset is EMPR, but EMPR is disabled, report that + * a reboot is required instead. + */ + if (priv->reset_level == IXGBE_ACI_NVM_EMPR_FLAG && + !priv->emp_reset_available) { + dev_dbg(dev, + "Firmware indicated EMP reset as sufficient, but EMP reset is disabled\n"); + priv->reset_level = IXGBE_ACI_NVM_PERST_FLAG; + } + + switch (priv->reset_level) { + case IXGBE_ACI_NVM_EMPR_FLAG: + devlink_flash_update_status_notify(devlink, + "Activate new firmware by devlink reload", + NULL, 0, 0); + break; + case IXGBE_ACI_NVM_PERST_FLAG: + devlink_flash_update_status_notify(devlink, + "Activate new firmware by rebooting the system", + NULL, 0, 0); + break; + case IXGBE_ACI_NVM_POR_FLAG: + devlink_flash_update_status_notify(devlink, + "Activate new firmware by power cycling the system", + NULL, 0, 0); + break; + default: + devlink_flash_update_status_notify(devlink, + "Suggested is to activate new firmware by devlink reload, if it doesn't work then a power cycle is required", + NULL, 0, 0); + break; + } + + adapter->fw_emp_reset_disabled = !priv->emp_reset_available; + + return 0; +} + +static const struct pldmfw_ops ixgbe_fwu_ops_e610 = { + .match_record = &pldmfw_op_pci_match_record, + .send_package_data = &ixgbe_send_package_data, + .send_component_table = &ixgbe_send_component_table, + .flash_component = &ixgbe_flash_component, + .finalize_update = &ixgbe_finalize_update, +}; + +/** + * ixgbe_get_pending_updates - Check if the component has a pending update + * @adapter: the PF driver structure + * @pending: on return, bitmap of updates pending + * @extack: Netlink extended ACK + * + * Check if the device has any pending updates on any flash components. + * + * Return: 0 on success, or a negative error code on failure. + * Updates pending with the bitmap of pending updates. + */ +int ixgbe_get_pending_updates(struct ixgbe_adapter *adapter, u8 *pending, + struct netlink_ext_ack *extack) +{ + struct device *dev = ixgbe_pf_to_dev(adapter); + struct ixgbe_hw_dev_caps *dev_caps; + struct ixgbe_hw *hw = &adapter->hw; + s32 status; + + dev_caps = ixgbe_malloc(hw, sizeof(*dev_caps)); + if (!dev_caps) + return -ENOMEM; + + status = ixgbe_discover_dev_caps(hw, dev_caps); + if (status) { + NL_SET_ERR_MSG_MOD(extack, + "Unable to read device capabilities"); + ixgbe_free(hw, dev_caps); + return -EIO; + } + + *pending = 0; + + if (dev_caps->common_cap.nvm_update_pending_nvm) { + dev_info(dev, + "The fw.mgmt flash component has a pending update\n"); + *pending |= IXGBE_ACI_NVM_ACTIV_SEL_NVM; + } + + if (dev_caps->common_cap.nvm_update_pending_orom) { + dev_info(dev, + "The fw.undi flash component has a pending update\n"); + *pending |= IXGBE_ACI_NVM_ACTIV_SEL_OROM; + } + + if (dev_caps->common_cap.nvm_update_pending_netlist) { + dev_info(dev, + "The fw.netlist flash component has a pending update\n"); + *pending |= IXGBE_ACI_NVM_ACTIV_SEL_NETLIST; + } + + ixgbe_free(hw, dev_caps); + + return 0; +} + +/** + * ixgbe_cancel_pending_update - Cancel any pending update for a component + * @adapter: the PF driver structure + * @component: if not NULL, the name of the component being updated + * @extack: Netlink extended ACK structure + * + * Cancel any pending update for the specified component. If component is + * NULL, all device updates will be canceled. + * + * Return: 0 on success, or a negative error code on failure. + */ +static int ixgbe_cancel_pending_update(struct ixgbe_adapter *adapter, + const char *component, + struct netlink_ext_ack *extack) +{ + struct devlink *devlink = adapter->devlink; + struct ixgbe_hw *hw = &adapter->hw; + s32 status; + u8 pending; + int err; + + err = ixgbe_get_pending_updates(adapter, &pending, extack); + if (err) + return err; + + /* If the flash_update request is for a specific component, ignore all + * of the other components. + */ + if (component) { + if (strcmp(component, "fw.mgmt") == 0) + pending &= IXGBE_ACI_NVM_ACTIV_SEL_NVM; + else if (strcmp(component, "fw.undi") == 0) + pending &= IXGBE_ACI_NVM_ACTIV_SEL_OROM; + else if (strcmp(component, "fw.netlist") == 0) + pending &= IXGBE_ACI_NVM_ACTIV_SEL_NETLIST; + else + WARN(1, "Unexpected flash component %s", component); + } + + /* There is no previous pending update, so this request may continue */ + if (!pending) + return 0; + + /* In order to allow overwriting a previous pending update, notify + * firmware to cancel that update by issuing the appropriate command. + */ + devlink_flash_update_status_notify(devlink, + "Canceling previous pending update", + component, 0, 0); + + status = ixgbe_acquire_nvm(hw, IXGBE_RES_WRITE); + if (status) { + dev_err(ixgbe_pf_to_dev(adapter), + "Failed to acquire device flash lock, err %d\n", + status); + NL_SET_ERR_MSG_MOD(extack, + "Failed to acquire device flash lock"); + return -EIO; + } + + pending |= IXGBE_ACI_NVM_REVERT_LAST_ACTIV; + err = ixgbe_switch_flash_banks(adapter, pending, NULL, extack); + + ixgbe_release_nvm(hw); + + /* Since we've canceled the pending update, we no longer know if EMP + * reset is restricted. + */ + adapter->fw_emp_reset_disabled = false; + + return err; +} + +/** + * ixgbe_flash_pldm_image - Write a PLDM-formatted firmware image to the device + * @devlink: pointer to devlink associated with the device to update + * @params: devlink flash update parameters + * @extack: netlink extended ACK structure + * + * Parse the data for a given firmware file, verifying that it is a valid PLDM + * formatted image that matches this device. + * + * Extract the device record Package Data and Component Tables and send them + * to the firmware. Extract and write the flash data for each of the three + * main flash components, "fw.mgmt", "fw.undi", and "fw.netlist". Notify + * firmware once the data is written to the inactive banks. + * + * Return: 0 on success or a negative error code on failure. + */ +int ixgbe_flash_pldm_image(struct devlink *devlink, + struct devlink_flash_update_params *params, + struct netlink_ext_ack *extack) +{ + struct ixgbe_adapter *adapter; + struct ixgbe_fwu_priv priv; +#ifndef HAVE_DEVLINK_FLASH_UPDATE_PARAMS_FW + const struct firmware *fw; +#endif + struct ixgbe_hw *hw; + struct device *dev; + u8 preservation; + s32 status; + int err; + + adapter = *(struct ixgbe_adapter **)devlink_priv(devlink); + dev = ixgbe_pf_to_dev(adapter); + hw = &adapter->hw; + + switch (params->overwrite_mask) { + case 0: + /* preserve all settings and identifiers */ + preservation = IXGBE_ACI_NVM_PRESERVE_ALL; + break; + case DEVLINK_FLASH_OVERWRITE_SETTINGS: + /* overwrite settings, but preserve vital information such as + * device identifiers. + */ + preservation = IXGBE_ACI_NVM_PRESERVE_SELECTED; + break; + case (DEVLINK_FLASH_OVERWRITE_SETTINGS | + DEVLINK_FLASH_OVERWRITE_IDENTIFIERS): + /* overwrite both settings and identifiers, preserve nothing */ + preservation = IXGBE_ACI_NVM_NO_PRESERVATION; + break; + default: + NL_SET_ERR_MSG_MOD(extack, + "Requested overwrite mask is not supported"); + return -EOPNOTSUPP; + } + + if (!hw->dev_caps.common_cap.nvm_unified_update && + !ixgbe_fw_recovery_mode(hw)) { + NL_SET_ERR_MSG_MOD(extack, + "Current firmware does not support unified update"); + return -EOPNOTSUPP; + } + + memset(&priv, 0, sizeof(priv)); + + priv.context.ops = &ixgbe_fwu_ops_e610; + priv.context.dev = dev; + priv.extack = extack; + priv.adapter = adapter; + priv.activate_flags = preservation; + + devlink_flash_update_status_notify(devlink, + "Preparing to flash", NULL, 0, 0); + + err = ixgbe_cancel_pending_update(adapter, NULL, extack); + if (err) + return err; + + status = ixgbe_acquire_nvm(hw, IXGBE_RES_WRITE); + if (status) { + dev_err(dev, + "Failed to acquire device flash lock, err %d aci_err %d\n", + status, hw->aci.last_status); + NL_SET_ERR_MSG_MOD(extack, + "Failed to acquire device flash lock"); + return -EIO; + } + +#ifdef HAVE_DEVLINK_FLASH_UPDATE_PARAMS_FW + err = pldmfw_flash_image(&priv.context, params->fw); +#else + err = request_firmware(&fw, params->file_name, dev); + if (err) { + NL_SET_ERR_MSG_MOD(extack, "Unable to read file from disk"); + ixgbe_release_nvm(hw); + return err; + } + + err = pldmfw_flash_image(&priv.context, fw); + + release_firmware(fw); +#endif + if (err == -ENOENT) { + dev_err(dev, + "Firmware image has no record matching this device\n"); + NL_SET_ERR_MSG_MOD(extack, + "Firmware image has no record matching this device"); + } else if (err) { + /* Do not set a generic extended ACK message here. A more + * specific message may already have been set by one of our + * ops. + */ + dev_err(dev, "Failed to flash PLDM image, err %d", err); + } + + ixgbe_release_nvm(hw); + + return err; +} diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_fw_update.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_fw_update.h new file mode 100644 index 00000000000..c395a494382 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_fw_update.h @@ -0,0 +1,18 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 1999 - 2026 Intel Corporation */ + +#ifndef _IXGBE_FW_UPDATE_H_ +#define _IXGBE_FW_UPDATE_H_ + +int ixgbe_flash_pldm_image(struct devlink *devlink, + struct devlink_flash_update_params *params, + struct netlink_ext_ack *extack); +int ixgbe_get_pending_updates(struct ixgbe_adapter *adapter, u8 *pending, + struct netlink_ext_ack *extack); +int ixgbe_write_one_nvm_block(struct ixgbe_adapter *adapter, + u16 module, u32 offset, + u16 block_size, u8 *block, bool last_cmd, + u8 *reset_level, + struct netlink_ext_ack *extack); + +#endif diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_lib.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_lib.c new file mode 100644 index 00000000000..6758c864cfe --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_lib.c @@ -0,0 +1,1407 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 1999 - 2026 Intel Corporation */ + +#include "ixgbe.h" +#include "ixgbe_sriov.h" + +#ifdef HAVE_TX_MQ +/** + * ixgbe_cache_ring_dcb_vmdq - Descriptor ring to register mapping for VMDq + * @adapter: board private structure to initialize + * + * Cache the descriptor ring offsets for VMDq to the assigned rings. It + * will also try to cache the proper offsets if RSS/FCoE are enabled along + * with VMDq. + * + **/ +static bool ixgbe_cache_ring_dcb_vmdq(struct ixgbe_adapter *adapter) +{ +#if IS_ENABLED(CONFIG_FCOE) + struct ixgbe_ring_feature *fcoe = &adapter->ring_feature[RING_F_FCOE]; +#endif /* CONFIG_FCOE */ + struct ixgbe_ring_feature *vmdq = &adapter->ring_feature[RING_F_VMDQ]; + int i; + u16 reg_idx; + u8 tcs = netdev_get_num_tc(adapter->netdev); + + /* verify we have DCB enabled before proceeding */ + if (tcs <= 1) + return false; + + /* verify we have VMDq enabled before proceeding */ + if (!(adapter->flags & IXGBE_FLAG_VMDQ_ENABLED)) + return false; + + switch (adapter->hw.mac.type) { + case ixgbe_mac_82598EB: + /* + * The bits on the 82598 are reversed compared to the other + * adapters. The DCB bits are the higher order bits and the + * lower bits belong to the VMDq pool. In order to sort + * this out we have to swap the bits to get the correct layout + */ + for (i = 0; i < adapter->num_rx_queues; i++) { + reg_idx = ((i >> 3) | (i << 3)) & 0x3F; + adapter->rx_ring[i]->reg_idx = reg_idx; + } + for (i = 0; i < adapter->num_tx_queues; i++) { + reg_idx = ((i >> 4) | (i << 2)) & 0x1F; + adapter->tx_ring[i]->reg_idx = reg_idx; + } + break; + case ixgbe_mac_82599EB: + case ixgbe_mac_X540: + case ixgbe_mac_X550: + case ixgbe_mac_X550EM_x: + case ixgbe_mac_X550EM_a: + case ixgbe_mac_E610: + /* start at VMDq register offset for SR-IOV enabled setups */ + reg_idx = vmdq->offset * __ALIGN_MASK(1, ~vmdq->mask); + for (i = 0; i < adapter->num_rx_queues; i++, reg_idx++) { + /* If we are greater than indices move to next pool */ + if ((reg_idx & ~vmdq->mask) >= tcs) { + reg_idx = __ALIGN_MASK(reg_idx, ~vmdq->mask); + } + adapter->rx_ring[i]->reg_idx = reg_idx; + } + + reg_idx = vmdq->offset * __ALIGN_MASK(1, ~vmdq->mask); + for (i = 0; i < adapter->num_tx_queues; i++, reg_idx++) { + /* If we are greater than indices move to next pool */ + if ((reg_idx & ~vmdq->mask) >= tcs) + reg_idx = __ALIGN_MASK(reg_idx, ~vmdq->mask); + adapter->tx_ring[i]->reg_idx = reg_idx; + } + + break; + default: + break; + } + +#if IS_ENABLED(CONFIG_FCOE) + /* nothing to do if FCoE is disabled */ + if (!(adapter->flags & IXGBE_FLAG_FCOE_ENABLED)) + return true; + + /* The work is already done if the FCoE ring is shared */ + if (fcoe->offset < tcs) + return true; + + /* The FCoE rings exist separately, we need to move their reg_idx */ + if (fcoe->indices) { + u16 queues_per_pool = __ALIGN_MASK(1, ~vmdq->mask); + u8 fcoe_tc = ixgbe_fcoe_get_tc(adapter); + + reg_idx = (vmdq->offset + vmdq->indices) * queues_per_pool; + for (i = fcoe->offset; i < adapter->num_rx_queues; i++) { + reg_idx = __ALIGN_MASK(reg_idx, ~vmdq->mask) + fcoe_tc; + adapter->rx_ring[i]->reg_idx = reg_idx; + reg_idx++; + } + + reg_idx = (vmdq->offset + vmdq->indices) * queues_per_pool; + for (i = fcoe->offset; i < adapter->num_tx_queues; i++) { + reg_idx = __ALIGN_MASK(reg_idx, ~vmdq->mask) + fcoe_tc; + adapter->tx_ring[i]->reg_idx = reg_idx; + reg_idx++; + } + } +#endif /* CONFIG_FCOE */ + + return true; +} + +/* ixgbe_get_first_reg_idx - Return first register index associated with ring */ +static void ixgbe_get_first_reg_idx(struct ixgbe_adapter *adapter, u8 tc, + unsigned int *tx, unsigned int *rx) +{ + struct ixgbe_hw *hw = &adapter->hw; + struct net_device *dev = adapter->netdev; + u8 num_tcs = netdev_get_num_tc(dev); + + *tx = 0; + *rx = 0; + + switch (hw->mac.type) { + case ixgbe_mac_82598EB: + /* TxQs/TC: 4 RxQs/TC: 8 */ + *tx = tc << 2; /* 0, 4, 8, 12, 16, 20, 24, 28 */ + *rx = tc << 3; /* 0, 8, 16, 24, 32, 40, 48, 56 */ + break; + case ixgbe_mac_82599EB: + case ixgbe_mac_X540: + case ixgbe_mac_X550: + case ixgbe_mac_X550EM_x: + case ixgbe_mac_X550EM_a: + case ixgbe_mac_E610: + if (num_tcs > 4) { + /* + * TCs : TC0/1 TC2/3 TC4-7 + * TxQs/TC: 32 16 8 + * RxQs/TC: 16 16 16 + */ + *rx = tc << 4; + if (tc < 3) + *tx = tc << 5; /* 0, 32, 64 */ + else if (tc < 5) + *tx = (tc + 2) << 4; /* 80, 96 */ + else + *tx = (tc + 8) << 3; /* 104, 112, 120 */ + } else { + /* + * TCs : TC0 TC1 TC2/3 + * TxQs/TC: 64 32 16 + * RxQs/TC: 32 32 32 + */ + *rx = tc << 5; + if (tc < 2) + *tx = tc << 6; /* 0, 64 */ + else + *tx = (tc + 4) << 4; /* 96, 112 */ + } + default: + break; + } +} + +/** + * ixgbe_cache_ring_dcb - Descriptor ring to register mapping for DCB + * @adapter: board private structure to initialize + * + * Cache the descriptor ring offsets for DCB to the assigned rings. + * + **/ +static bool ixgbe_cache_ring_dcb(struct ixgbe_adapter *adapter) +{ + int tc, offset, rss_i, i; + unsigned int tx_idx, rx_idx; + struct net_device *dev = adapter->netdev; + u8 num_tcs = netdev_get_num_tc(dev); + + if (num_tcs <= 1) + return false; + + rss_i = adapter->ring_feature[RING_F_RSS].indices; + + for (tc = 0, offset = 0; tc < num_tcs; tc++, offset += rss_i) { + ixgbe_get_first_reg_idx(adapter, tc, &tx_idx, &rx_idx); + for (i = 0; i < rss_i; i++, tx_idx++, rx_idx++) { + adapter->tx_ring[offset + i]->reg_idx = tx_idx; + adapter->rx_ring[offset + i]->reg_idx = rx_idx; + adapter->tx_ring[offset + i]->dcb_tc = tc; + adapter->rx_ring[offset + i]->dcb_tc = tc; + } + } + + return true; +} + +#endif /* HAVE_TX_MQ */ +/** + * ixgbe_cache_ring_vmdq - Descriptor ring to register mapping for VMDq + * @adapter: board private structure to initialize + * + * Cache the descriptor ring offsets for VMDq to the assigned rings. It + * will also try to cache the proper offsets if RSS/FCoE/SRIOV are enabled along + * with VMDq. + * + **/ +static bool ixgbe_cache_ring_vmdq(struct ixgbe_adapter *adapter) +{ +#if IS_ENABLED(CONFIG_FCOE) + struct ixgbe_ring_feature *fcoe = &adapter->ring_feature[RING_F_FCOE]; +#endif /* CONFIG_FCOE */ + struct ixgbe_ring_feature *vmdq = &adapter->ring_feature[RING_F_VMDQ]; + struct ixgbe_ring_feature *rss = &adapter->ring_feature[RING_F_RSS]; + u16 reg_idx; + int i; + + /* only proceed if VMDq is enabled */ + if (!(adapter->flags & IXGBE_FLAG_VMDQ_ENABLED)) + return false; + + /* start at VMDq register offset for SR-IOV enabled setups */ + reg_idx = vmdq->offset * __ALIGN_MASK(1, ~vmdq->mask); + for (i = 0; i < adapter->num_rx_queues; i++, reg_idx++) { +#if IS_ENABLED(CONFIG_FCOE) + /* Allow first FCoE queue to be mapped as RSS */ + if (fcoe->offset && (i > fcoe->offset)) + break; +#endif /* CONFIG_FCOE */ + /* If we are greater than indices move to next pool */ + if ((reg_idx & ~vmdq->mask) >= rss->indices) { + reg_idx = __ALIGN_MASK(reg_idx, ~vmdq->mask); + } + adapter->rx_ring[i]->reg_idx = reg_idx; + } + +#if IS_ENABLED(CONFIG_FCOE) + /* FCoE uses a linear block of queues so just assigning 1:1 */ + for (; i < adapter->num_rx_queues; i++, reg_idx++) { + adapter->rx_ring[i]->reg_idx = reg_idx; + } +#endif /* CONFIG_FCOE */ + + reg_idx = vmdq->offset * __ALIGN_MASK(1, ~vmdq->mask); + for (i = 0; i < adapter->num_tx_queues; i++, reg_idx++) { +#if IS_ENABLED(CONFIG_FCOE) + /* Allow first FCoE queue to be mapped as RSS */ + if (fcoe->offset && (i > fcoe->offset)) + break; +#endif + /* If we are greater than indices move to next pool */ + if ((reg_idx & rss->mask) >= rss->indices) + reg_idx = __ALIGN_MASK(reg_idx, ~vmdq->mask); + adapter->tx_ring[i]->reg_idx = reg_idx; + } + +#if IS_ENABLED(CONFIG_FCOE) + /* FCoE uses a linear block of queues so just assigning 1:1 */ + for (; i < adapter->num_tx_queues; i++, reg_idx++) + adapter->tx_ring[i]->reg_idx = reg_idx; +#endif /* CONFIG_FCOE */ + + + return true; +} + +/** + * ixgbe_cache_ring_rss - Descriptor ring to register mapping for RSS + * @adapter: board private structure to initialize + * + * Cache the descriptor ring offsets for RSS, ATR, FCoE, and SR-IOV. + * + **/ +static bool ixgbe_cache_ring_rss(struct ixgbe_adapter *adapter) +{ + int i, reg_idx; + + for (i = 0; i < adapter->num_rx_queues; i++) { + adapter->rx_ring[i]->reg_idx = i; + } + for (i = 0, reg_idx = 0; i < adapter->num_tx_queues; i++, reg_idx++) + adapter->tx_ring[i]->reg_idx = reg_idx; + for (i = 0; i < adapter->num_xdp_queues; i++, reg_idx++) + adapter->xdp_ring[i]->reg_idx = reg_idx; + + return true; +} + +/** + * ixgbe_cache_ring_register - Descriptor ring to register mapping + * @adapter: board private structure to initialize + * + * Once we know the feature-set enabled for the device, we'll cache + * the register offset the descriptor ring is assigned to. + * + * Note, the order the various feature calls is important. It must start with + * the "most" features enabled at the same time, then trickle down to the + * least amount of features turned on at once. + **/ +static void ixgbe_cache_ring_register(struct ixgbe_adapter *adapter) +{ +#ifdef HAVE_TX_MQ + if (ixgbe_cache_ring_dcb_vmdq(adapter)) + return; + + if (ixgbe_cache_ring_dcb(adapter)) + return; + +#endif + if (ixgbe_cache_ring_vmdq(adapter)) + return; + + ixgbe_cache_ring_rss(adapter); +} + +static int ixgbe_xdp_queues(struct ixgbe_adapter *adapter) +{ +#ifdef HAVE_XDP_SUPPORT + int queues = min_t(int, IXGBE_MAX_XDP_QS, nr_cpu_ids); + + return adapter->xdp_prog ? queues : 0; +#else + return 0; +#endif +} + +#define IXGBE_RSS_64Q_MASK 0x3F +#define IXGBE_RSS_16Q_MASK 0xF +#define IXGBE_RSS_8Q_MASK 0x7 +#define IXGBE_RSS_4Q_MASK 0x3 +#define IXGBE_RSS_2Q_MASK 0x1 +#define IXGBE_RSS_DISABLED_MASK 0x0 + +#ifdef HAVE_TX_MQ +/** + * ixgbe_set_dcb_vmdq_queues: Allocate queues for VMDq devices w/ DCB + * @adapter: board private structure to initialize + * + * When VMDq (Virtual Machine Devices queue) is enabled, allocate queues + * and VM pools where appropriate. Also assign queues based on DCB + * priorities and map accordingly.. + * + **/ +static bool ixgbe_set_dcb_vmdq_queues(struct ixgbe_adapter *adapter) +{ + int i; + u16 vmdq_i = adapter->ring_feature[RING_F_VMDQ].limit; + u16 vmdq_m = 0; +#if IS_ENABLED(CONFIG_FCOE) + u16 fcoe_i = 0; +#endif + u8 tcs = netdev_get_num_tc(adapter->netdev); + + /* verify we have DCB enabled before proceeding */ + if (tcs <= 1) + return false; + + /* verify we have VMDq enabled before proceeding */ + if (!(adapter->flags & IXGBE_FLAG_VMDQ_ENABLED)) + return false; + + switch (adapter->hw.mac.type) { + case ixgbe_mac_82598EB: + /* 4 pools w/ 8TC per pool */ + vmdq_i = min_t(u16, vmdq_i, 4); + vmdq_m = 0x7; + break; + case ixgbe_mac_82599EB: + case ixgbe_mac_X540: + case ixgbe_mac_X550: + case ixgbe_mac_X550EM_x: + case ixgbe_mac_X550EM_a: + case ixgbe_mac_E610: + + /* Add starting offset to total pool count */ + vmdq_i += adapter->ring_feature[RING_F_VMDQ].offset; + + /* 16 pools w/ 8 TC per pool */ + if (tcs > 4) { + vmdq_i = min_t(u16, vmdq_i, 16); + vmdq_m = IXGBE_82599_VMDQ_8Q_MASK; + /* 32 pools w/ 4 TC per pool */ + } else { + vmdq_i = min_t(u16, vmdq_i, 32); + vmdq_m = IXGBE_82599_VMDQ_4Q_MASK; + } + +#if IS_ENABLED(CONFIG_FCOE) + /* queues in the remaining pools are available for FCoE */ + fcoe_i = (128 / __ALIGN_MASK(1, ~vmdq_m)) - vmdq_i; +#endif /* CONFIG_FCOE */ + + /* remove the starting offset from the pool count */ + vmdq_i -= adapter->ring_feature[RING_F_VMDQ].offset; + + break; + default: + /* unknown hardware, only support one pool w/ one queue */ + vmdq_i = 1; + tcs = 1; + break; + } + + /* save features for later use */ + adapter->ring_feature[RING_F_VMDQ].indices = vmdq_i; + adapter->ring_feature[RING_F_VMDQ].mask = vmdq_m; + + /* + * We do not support DCB, VMDq, and RSS all simultaneously + * so we will disable RSS since it is the lowest priority + */ + adapter->ring_feature[RING_F_RSS].indices = 1; + adapter->ring_feature[RING_F_RSS].mask = IXGBE_RSS_DISABLED_MASK; + + adapter->num_rx_pools = vmdq_i; + adapter->num_rx_queues_per_pool = tcs; + + adapter->num_tx_queues = vmdq_i * tcs; + adapter->num_xdp_queues = 0; + adapter->num_rx_queues = vmdq_i * tcs; + + /* disable ATR as it is not supported when VMDq is enabled */ + adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE; + +#if IS_ENABLED(CONFIG_FCOE) + if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED) { + struct ixgbe_ring_feature *fcoe; + + fcoe = &adapter->ring_feature[RING_F_FCOE]; + + /* limit ourselves based on feature limits */ + fcoe_i = min_t(u16, fcoe_i, fcoe->limit); + + if (fcoe_i) { + /* alloc queues for FCoE separately */ + fcoe->indices = fcoe_i; + fcoe->offset = vmdq_i * tcs; + + /* add queues to adapter */ + adapter->num_tx_queues += fcoe_i; + adapter->num_rx_queues += fcoe_i; + } else if (tcs > 1) { + /* use queue belonging to FcoE TC */ + fcoe->indices = 1; + fcoe->offset = ixgbe_fcoe_get_tc(adapter); + } else { + adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED; + + fcoe->indices = 0; + fcoe->offset = 0; + } + } +#endif /* CONFIG_FCOE */ + + /* configure TC to queue mapping */ + for (i = 0; i < tcs; i++) + netdev_set_tc_queue(adapter->netdev, i, 1, i); + + return true; +} + +/** + * ixgbe_set_dcb_queues: Allocate queues for a DCB-enabled device + * @adapter: board private structure to initialize + * + * When DCB (Data Center Bridging) is enabled, allocate queues for + * each traffic class. If multiqueue isn't available,then abort DCB + * initialization. + * + * This function handles all combinations of DCB, RSS, and FCoE. + * + **/ +static bool ixgbe_set_dcb_queues(struct ixgbe_adapter *adapter) +{ + struct net_device *dev = adapter->netdev; + struct ixgbe_ring_feature *f; + int rss_i, rss_m, i; + int tcs; + + /* Map queue offset and counts onto allocated tx queues */ + tcs = netdev_get_num_tc(dev); + + if (tcs <= 1) + return false; + + /* determine the upper limit for our current DCB mode */ +#ifndef HAVE_NETDEV_SELECT_QUEUE + rss_i = adapter->indices; +#else + rss_i = dev->num_tx_queues / tcs; +#endif + if (adapter->hw.mac.type == ixgbe_mac_82598EB) { + /* 8 TC w/ 4 queues per TC */ + rss_i = min_t(u16, rss_i, 4); + rss_m = IXGBE_RSS_4Q_MASK; + } else if (tcs > 4) { + /* 8 TC w/ 8 queues per TC */ + rss_i = min_t(u16, rss_i, 8); + rss_m = IXGBE_RSS_8Q_MASK; + } else { + /* 4 TC w/ 16 queues per TC */ + rss_i = min_t(u16, rss_i, 16); + rss_m = IXGBE_RSS_16Q_MASK; + } + + /* set RSS mask and indices */ + f = &adapter->ring_feature[RING_F_RSS]; + rss_i = min_t(u16, rss_i, f->limit); + f->indices = rss_i; + f->mask = rss_m; + + /* disable ATR as it is not supported when DCB is enabled */ + adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE; + +#if IS_ENABLED(CONFIG_FCOE) + /* + * FCoE enabled queues require special configuration indexed + * by feature specific indices and mask. Here we map FCoE + * indices onto the DCB queue pairs allowing FCoE to own + * configuration later. + */ + if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED) { + u8 tc = ixgbe_fcoe_get_tc(adapter); + + f = &adapter->ring_feature[RING_F_FCOE]; + f->indices = min_t(u16, rss_i, f->limit); + f->offset = rss_i * tc; + } +#endif /* CONFIG_FCOE */ + + for (i = 0; i < tcs; i++) + netdev_set_tc_queue(dev, i, rss_i, rss_i * i); + + adapter->num_tx_queues = rss_i * tcs; + adapter->num_xdp_queues = 0; + adapter->num_rx_queues = rss_i * tcs; + + return true; +} + +#endif +/** + * ixgbe_set_vmdq_queues: Allocate queues for VMDq devices + * @adapter: board private structure to initialize + * + * When VMDq (Virtual Machine Devices queue) is enabled, allocate queues + * and VM pools where appropriate. If RSS is available, then also try and + * enable RSS and map accordingly. + * + **/ +static bool ixgbe_set_vmdq_queues(struct ixgbe_adapter *adapter) +{ + u16 vmdq_i = adapter->ring_feature[RING_F_VMDQ].limit; + u16 vmdq_m = 0; + u16 rss_i = adapter->ring_feature[RING_F_RSS].limit; + u16 rss_m = IXGBE_RSS_DISABLED_MASK; +#if IS_ENABLED(CONFIG_FCOE) + u16 fcoe_i = 0; +#endif + + /* only proceed if VMDq is enabled */ + if (!(adapter->flags & IXGBE_FLAG_VMDQ_ENABLED)) + return false; + + + switch (adapter->hw.mac.type) { + case ixgbe_mac_82598EB: + vmdq_i = min_t(u16, vmdq_i, 16); + /* 16 pool mode with 1 queue per pool */ + if ((vmdq_i > 4) || (rss_i == 1)) { + vmdq_m = 0x0F; + rss_i = 1; + /* 4 pool mode with 8 queue per pool */ + } else { + vmdq_m = 0x18; + rss_m = IXGBE_RSS_8Q_MASK; + rss_i = min_t(u16, rss_i, 8); + } + break; + case ixgbe_mac_82599EB: + case ixgbe_mac_X540: + case ixgbe_mac_X550: + case ixgbe_mac_X550EM_x: + case ixgbe_mac_X550EM_a: + case ixgbe_mac_E610: + + /* Add starting offset to total pool count */ + vmdq_i += adapter->ring_feature[RING_F_VMDQ].offset; + + /* double check we are limited to maximum pools */ + vmdq_i = min_t(u16, IXGBE_MAX_VMDQ_INDICES, vmdq_i); + + /* 64 pool mode with 2 queues per pool */ + if (vmdq_i > 32) { + vmdq_m = IXGBE_82599_VMDQ_2Q_MASK; + rss_m = IXGBE_RSS_2Q_MASK; + rss_i = min_t(u16, rss_i, 2); + /* 32 pool mode with up to 4 queues per pool */ + } else { + vmdq_m = IXGBE_82599_VMDQ_4Q_MASK; + rss_m = IXGBE_RSS_4Q_MASK; + /* We can support 4, 2, or 1 queues */ + rss_i = (rss_i > 3) ? 4 : (rss_i > 1) ? 2 : 1; + } + +#if IS_ENABLED(CONFIG_FCOE) + /* queues in the remaining pools are available for FCoE */ + fcoe_i = 128 - (vmdq_i * __ALIGN_MASK(1, ~vmdq_m)); +#endif + + /* remove the starting offset from the pool count */ + vmdq_i -= adapter->ring_feature[RING_F_VMDQ].offset; + + break; + default: + /* unknown hardware, support one pool w/ one queue */ + vmdq_i = 1; + rss_i = 1; + break; + } + + /* save features for later use */ + adapter->ring_feature[RING_F_VMDQ].indices = vmdq_i; + adapter->ring_feature[RING_F_VMDQ].mask = vmdq_m; + + /* limit RSS based on user input and save for later use */ + adapter->ring_feature[RING_F_RSS].indices = rss_i; + adapter->ring_feature[RING_F_RSS].mask = rss_m; + + adapter->num_rx_pools = vmdq_i; + adapter->num_rx_queues_per_pool = rss_i; + + adapter->num_rx_queues = vmdq_i * rss_i; +#ifdef HAVE_TX_MQ + adapter->num_tx_queues = vmdq_i * rss_i; +#else + adapter->num_tx_queues = vmdq_i; +#endif /* HAVE_TX_MQ */ + adapter->num_xdp_queues = 0; + + /* disable ATR as it is not supported when VMDq is enabled */ + adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE; + +#if IS_ENABLED(CONFIG_FCOE) + /* + * FCoE can use rings from adjacent buffers to allow RSS + * like behavior. To account for this we need to add the + * FCoE indices to the total ring count. + */ + if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED) { + struct ixgbe_ring_feature *fcoe; + + fcoe = &adapter->ring_feature[RING_F_FCOE]; + + /* limit ourselves based on feature limits */ + fcoe_i = min_t(u16, fcoe_i, fcoe->limit); + + if (vmdq_i > 1 && fcoe_i) { + /* alloc queues for FCoE separately */ + fcoe->indices = fcoe_i; + fcoe->offset = vmdq_i * rss_i; + } else { + /* merge FCoE queues with RSS queues */ + fcoe_i = min_t(u16, fcoe_i + rss_i, num_online_cpus()); + + /* limit indices to rss_i if MSI-X is disabled */ + if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) + fcoe_i = rss_i; + + /* attempt to reserve some queues for just FCoE */ + fcoe->indices = min_t(u16, fcoe_i, fcoe->limit); + fcoe->offset = fcoe_i - fcoe->indices; + fcoe_i -= rss_i; + } + + /* add queues to adapter */ + adapter->num_tx_queues += fcoe_i; + adapter->num_rx_queues += fcoe_i; + } +#endif /* CONFIG_FCOE */ + return true; +} + +/** + * ixgbe_set_rss_queues: Allocate queues for RSS + * @adapter: board private structure to initialize + * + * This is our "base" multiqueue mode. RSS (Receive Side Scaling) will try + * to allocate one Rx queue per CPU, and if available, one Tx queue per CPU. + * + **/ +static bool ixgbe_set_rss_queues(struct ixgbe_adapter *adapter) +{ + struct ixgbe_hw *hw = &adapter->hw; + struct ixgbe_ring_feature *f; + u16 rss_i; + + /* set mask for 16 queue limit of RSS */ + f = &adapter->ring_feature[RING_F_RSS]; + rss_i = f->limit; + + f->indices = rss_i; + if (hw->mac.type < ixgbe_mac_X550) + f->mask = IXGBE_RSS_16Q_MASK; + else + f->mask = IXGBE_RSS_64Q_MASK; + + /* disable ATR by default, it will be configured below */ + adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE; + + /* + * Use Flow Director in addition to RSS to ensure the best + * distribution of flows across cores, even when an FDIR flow + * isn't matched. + */ + if (rss_i > 1 && adapter->atr_sample_rate) { + f = &adapter->ring_feature[RING_F_FDIR]; + + rss_i = f->indices = f->limit; + + if (!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)) + adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE; + } + +#if IS_ENABLED(CONFIG_FCOE) + /* + * FCoE can exist on the same rings as standard network traffic + * however it is preferred to avoid that if possible. In order + * to get the best performance we allocate as many FCoE queues + * as we can and we place them at the end of the ring array to + * avoid sharing queues with standard RSS on systems with 24 or + * more CPUs. + */ + if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED) { + struct net_device *dev = adapter->netdev; + u16 fcoe_i; + + f = &adapter->ring_feature[RING_F_FCOE]; + + /* merge FCoE queues with RSS queues */ + fcoe_i = min_t(u16, f->limit + rss_i, num_online_cpus()); + fcoe_i = min_t(u16, fcoe_i, dev->num_tx_queues); + + /* limit indices to rss_i if MSI-X is disabled */ + if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) + fcoe_i = rss_i; + + /* attempt to reserve some queues for just FCoE */ + f->indices = min_t(u16, fcoe_i, f->limit); + f->offset = fcoe_i - f->indices; + rss_i = max_t(u16, fcoe_i, rss_i); + } +#endif /* CONFIG_FCOE */ + + adapter->num_rx_queues = rss_i; +#ifdef HAVE_TX_MQ + adapter->num_tx_queues = rss_i; +#endif + adapter->num_xdp_queues = ixgbe_xdp_queues(adapter); + + return true; +} + +/* + * ixgbe_set_num_queues: Allocate queues for device, feature dependent + * @adapter: board private structure to initialize + * + * This is the top level queue allocation routine. The order here is very + * important, starting with the "most" number of features turned on at once, + * and ending with the smallest set of features. This way large combinations + * can be allocated if they're turned on, and smaller combinations are the + * fallthrough conditions. + * + **/ +static void ixgbe_set_num_queues(struct ixgbe_adapter *adapter) +{ + /* Start with base case */ + adapter->num_rx_queues = 1; + adapter->num_tx_queues = 1; + adapter->num_xdp_queues = 0; + adapter->num_rx_pools = adapter->num_rx_queues; + adapter->num_rx_queues_per_pool = 1; + +#ifdef HAVE_TX_MQ + if (ixgbe_set_dcb_vmdq_queues(adapter)) + return; + + if (ixgbe_set_dcb_queues(adapter)) + return; + +#endif + if (ixgbe_set_vmdq_queues(adapter)) + return; + + ixgbe_set_rss_queues(adapter); +} + +/** + * ixgbe_acquire_msix_vectors - acquire MSI-X vectors + * @adapter: board private structure + * + * Attempts to acquire a suitable range of MSI-X vector interrupts. Will + * return a negative error code if unable to acquire MSI-X vectors for any + * reason. + */ +static int ixgbe_acquire_msix_vectors(struct ixgbe_adapter *adapter) +{ + struct ixgbe_hw *hw = &adapter->hw; + int i, vectors, vector_threshold; + + if (!(adapter->flags & IXGBE_FLAG_MSIX_CAPABLE)) + return -EOPNOTSUPP; + + /* We start by asking for one vector per queue pair with XDP queues + * being stacked with TX queues. + */ + vectors = max(adapter->num_rx_queues, adapter->num_tx_queues); + vectors = max(vectors, adapter->num_xdp_queues); + + /* It is easy to be greedy for MSI-X vectors. However, it really + * doesn't do much good if we have a lot more vectors than CPUs. We'll + * be somewhat conservative and only ask for (roughly) the same number + * of vectors as there are CPUs. + */ + vectors = min_t(int, vectors, num_online_cpus()); + + /* Some vectors are necessary for non-queue interrupts */ + vectors += NON_Q_VECTORS; + + /* Hardware can only support a maximum of hw.mac->max_msix_vectors. + * With features such as RSS and VMDq, we can easily surpass the + * number of Rx and Tx descriptor queues supported by our device. + * Thus, we cap the maximum in the rare cases where the CPU count also + * exceeds our vector limit + */ + vectors = min_t(int, vectors, hw->mac.max_msix_vectors); + + /* We want a minimum of two MSI-X vectors for (1) a TxQ[0] + RxQ[0] + * handler, and (2) an Other (Link Status Change, etc.) handler. + */ + vector_threshold = MIN_MSIX_COUNT; + + adapter->msix_entries = kcalloc(vectors, + sizeof(struct msix_entry), + GFP_KERNEL); + if (!adapter->msix_entries) + return -ENOMEM; + + for (i = 0; i < vectors; i++) + adapter->msix_entries[i].entry = i; + + vectors = pci_enable_msix_range(adapter->pdev, adapter->msix_entries, + vector_threshold, vectors); + + if (vectors < 0) { + /* A negative count of allocated vectors indicates an error in + * acquiring within the specified range of MSI-X vectors */ + e_dev_warn("Failed to allocate MSI-X interrupts. Err: %d\n", + vectors); + + adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED; + kfree(adapter->msix_entries); + adapter->msix_entries = NULL; + + return vectors; + } + + /* we successfully allocated some number of vectors within our + * requested range. + */ + adapter->flags |= IXGBE_FLAG_MSIX_ENABLED; + + /* Adjust for only the vectors we'll use, which is minimum + * of max_q_vectors, or the number of vectors we were allocated. + */ + vectors -= NON_Q_VECTORS; + adapter->num_q_vectors = min_t(int, vectors, adapter->max_q_vectors); + + return 0; +} + +static void ixgbe_add_ring(struct ixgbe_ring *ring, + struct ixgbe_ring_container *head) +{ + ring->next = head->ring; + head->ring = ring; + head->count++; +} + +/** + * ixgbe_alloc_q_vector - Allocate memory for a single interrupt vector + * @adapter: board private structure to initialize + * @v_count: q_vectors allocated on adapter, used for ring interleaving + * @v_idx: index of vector in adapter struct + * @txr_count: total number of Tx rings to allocate + * @txr_idx: index of first Tx ring to allocate + * @xdp_count: total number of XDP rings to allocate + * @xdp_idx: index of first XDP ring to allocate + * @rxr_count: total number of Rx rings to allocate + * @rxr_idx: index of first Rx ring to allocate + * + * We allocate one q_vector. If allocation fails we return -ENOMEM. + **/ +static int ixgbe_alloc_q_vector(struct ixgbe_adapter *adapter, + unsigned int v_count, unsigned int v_idx, + unsigned int txr_count, unsigned int txr_idx, + unsigned int xdp_count, unsigned int xdp_idx, + unsigned int rxr_count, unsigned int rxr_idx) +{ + struct ixgbe_q_vector *q_vector; + struct ixgbe_ring *ring; + int node = -1; +#ifdef HAVE_IRQ_AFFINITY_HINT + int cpu = -1; + u8 tcs = netdev_get_num_tc(adapter->netdev); +#endif + int ring_count; + + /* note this will allocate space for the ring structure as well! */ + ring_count = txr_count + rxr_count + xdp_count; + +#ifdef HAVE_IRQ_AFFINITY_HINT + /* customize cpu for Flow Director mapping */ + if ((tcs <= 1) && !(adapter->flags & IXGBE_FLAG_VMDQ_ENABLED)) { + u16 rss_i = adapter->ring_feature[RING_F_RSS].indices; + if (rss_i > 1 && adapter->atr_sample_rate) { + if (cpu_online(v_idx)) { + cpu = v_idx; + node = cpu_to_node(cpu); + } + } + } + +#endif + /* allocate q_vector and rings */ + q_vector = kzalloc_node(struct_size(q_vector, ring, ring_count), + GFP_KERNEL, node); + + if (!q_vector) + q_vector = kzalloc(struct_size(q_vector, ring, ring_count), + GFP_KERNEL); + if (!q_vector) + return -ENOMEM; + + /* setup affinity mask and node */ +#ifdef HAVE_IRQ_AFFINITY_HINT + if (cpu != -1) + cpumask_set_cpu(cpu, &q_vector->affinity_mask); +#endif + q_vector->node = node; + + /* initialize CPU for DCA */ + q_vector->cpu = -1; + + /* initialize NAPI */ + netif_napi_add(adapter->netdev, &q_vector->napi, ixgbe_poll); +#ifndef HAVE_NETIF_NAPI_ADD_CALLS_NAPI_HASH_ADD +#ifdef HAVE_NDO_BUSY_POLL + napi_hash_add(&q_vector->napi); +#endif +#endif + +#ifdef HAVE_NDO_BUSY_POLL + /* initialize busy poll */ + atomic_set(&q_vector->state, IXGBE_QV_STATE_DISABLE); + +#endif + /* tie q_vector and adapter together */ + adapter->q_vector[v_idx] = q_vector; + q_vector->adapter = adapter; + q_vector->v_idx = v_idx; + + /* initialize work limits */ + q_vector->tx.work_limit = adapter->tx_work_limit; + + /* Initialize setting for adaptive ITR */ + q_vector->tx.itr = IXGBE_ITR_ADAPTIVE_MAX_USECS | + IXGBE_ITR_ADAPTIVE_LATENCY; + q_vector->rx.itr = IXGBE_ITR_ADAPTIVE_MAX_USECS | + IXGBE_ITR_ADAPTIVE_LATENCY; + + /* intialize ITR */ + if (txr_count && !rxr_count) { + /* tx only vector */ + if (adapter->tx_itr_setting == 1) + q_vector->itr = IXGBE_12K_ITR; + else + q_vector->itr = adapter->tx_itr_setting; + } else { + /* rx or rx/tx vector */ + if (adapter->rx_itr_setting == 1) + q_vector->itr = IXGBE_20K_ITR; + else + q_vector->itr = adapter->rx_itr_setting; + } + + /* initialize pointer to rings */ + ring = q_vector->ring; + + while (txr_count) { + /* assign generic ring traits */ + ring->dev = ixgbe_pf_to_dev(adapter); + ring->netdev = adapter->netdev; + + /* configure backlink on ring */ + ring->q_vector = q_vector; + + /* update q_vector Tx values */ + ixgbe_add_ring(ring, &q_vector->tx); + + /* apply Tx specific ring traits */ + ring->count = adapter->tx_ring_count; + ring->queue_index = txr_idx; + + /* assign ring to adapter */ + adapter->tx_ring[txr_idx] = ring; + + /* update count and index */ + txr_count--; + txr_idx += v_count; + + /* push pointer to next ring */ + ring++; + } + + while (xdp_count) { + /* assign generic ring traits */ + ring->dev = &adapter->pdev->dev; + ring->netdev = adapter->netdev; + + /* configure backlink on ring */ + ring->q_vector = q_vector; + + /* update q_vector Tx values */ + ixgbe_add_ring(ring, &q_vector->tx); + + /* apply Tx specific ring traits */ + ring->count = adapter->tx_ring_count; + ring->queue_index = xdp_idx; + set_ring_xdp(ring); + + spin_lock_init(&ring->tx_lock); + + /* assign ring to adapter */ + adapter->xdp_ring[xdp_idx] = ring; + + /* update count and index */ + xdp_count--; + xdp_idx++; + + /* push pointer to next ring */ + ring++; + } + while (rxr_count) { + /* assign generic ring traits */ + ring->dev = ixgbe_pf_to_dev(adapter); + ring->netdev = adapter->netdev; + + /* configure backlink on ring */ + ring->q_vector = q_vector; + + /* update q_vector Rx values */ + ixgbe_add_ring(ring, &q_vector->rx); + + /* + * 82599 errata, UDP frames with a 0 checksum + * can be marked as checksum errors. + */ + if (adapter->hw.mac.type == ixgbe_mac_82599EB) + set_bit(__IXGBE_RX_CSUM_UDP_ZERO_ERR, &ring->state); + +#if IS_ENABLED(CONFIG_FCOE) + if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED) { + struct ixgbe_ring_feature *f; + f = &adapter->ring_feature[RING_F_FCOE]; + + if ((rxr_idx >= f->offset) && + (rxr_idx < f->offset + f->indices)) { + set_bit(__IXGBE_RX_FCOE, &ring->state); + } + } +#endif /* CONFIG_FCOE */ + + /* apply Rx specific ring traits */ + ring->count = adapter->rx_ring_count; + ring->queue_index = rxr_idx; + + /* assign ring to adapter */ + adapter->rx_ring[rxr_idx] = ring; + + /* update count and index */ + rxr_count--; + rxr_idx += v_count; + + /* push pointer to next ring */ + ring++; + } + +#ifdef HAVE_PTP_1588_CLOCK + /* Init PTP structures. */ + INIT_LIST_HEAD(&q_vector->ptp_skbs_e600); + spin_lock_init(&q_vector->ptp_skbs_lock_e600); + +#endif /* HAVE_PTP_1588_CLOCK */ + return 0; +} + +/** + * ixgbe_free_q_vector - Free memory allocated for specific interrupt vector + * @adapter: board private structure to initialize + * @v_idx: Index of vector to be freed + * + * This function frees the memory allocated to the q_vector. In addition if + * NAPI is enabled it will delete any references to the NAPI struct prior + * to freeing the q_vector. + **/ +static void ixgbe_free_q_vector(struct ixgbe_adapter *adapter, int v_idx) +{ + struct ixgbe_q_vector *q_vector = adapter->q_vector[v_idx]; + struct ixgbe_ring *ring; + + ixgbe_for_each_ring(ring, q_vector->tx) { + if (ring_is_xdp(ring)) + adapter->xdp_ring[ring->queue_index] = NULL; + else + adapter->tx_ring[ring->queue_index] = NULL; + } + + ixgbe_for_each_ring(ring, q_vector->rx) + adapter->rx_ring[ring->queue_index] = NULL; + + adapter->q_vector[v_idx] = NULL; +#ifdef HAVE_NDO_BUSY_POLL + napi_hash_del(&q_vector->napi); +#endif + netif_napi_del(&q_vector->napi); + kfree_rcu(q_vector, rcu); +} + +/** + * ixgbe_alloc_q_vectors - Allocate memory for interrupt vectors + * @adapter: board private structure to initialize + * + * We allocate one q_vector per queue interrupt. If allocation fails we + * return -ENOMEM. + **/ +static int ixgbe_alloc_q_vectors(struct ixgbe_adapter *adapter) +{ + unsigned int q_vectors = adapter->num_q_vectors; + unsigned int rxr_remaining = adapter->num_rx_queues; + unsigned int txr_remaining = adapter->num_tx_queues; + unsigned int xdp_remaining = adapter->num_xdp_queues; + unsigned int rxr_idx = 0, txr_idx = 0, xdp_idx = 0, v_idx = 0; + int err; +#ifdef HAVE_AF_XDP_ZC_SUPPORT + int i; +#endif + + if (q_vectors >= (rxr_remaining + txr_remaining + xdp_remaining)) { + for (; rxr_remaining; v_idx++) { + err = ixgbe_alloc_q_vector(adapter, q_vectors, v_idx, + 0, 0, 0, 0, 1, rxr_idx); + if (err) + goto err_out; + + /* update counts and index */ + rxr_remaining--; + rxr_idx++; + } + } + + for (; v_idx < q_vectors; v_idx++) { + int rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - v_idx); + int tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - v_idx); + int xqpv = DIV_ROUND_UP(xdp_remaining, q_vectors - v_idx); + + err = ixgbe_alloc_q_vector(adapter, q_vectors, v_idx, + tqpv, txr_idx, + xqpv, xdp_idx, + rqpv, rxr_idx); + + if (err) + goto err_out; + + /* update counts and index */ + rxr_remaining -= rqpv; + txr_remaining -= tqpv; + xdp_remaining -= xqpv; + rxr_idx++; + txr_idx++; + xdp_idx += xqpv; + } + +#ifdef HAVE_AF_XDP_ZC_SUPPORT + for (i = 0; i < adapter->num_rx_queues; i++) { + if (adapter->rx_ring[i]) + adapter->rx_ring[i]->ring_idx = i; + } + + for (i = 0; i < adapter->num_tx_queues; i++) { + if (adapter->tx_ring[i]) + adapter->tx_ring[i]->ring_idx = i; + } + + for (i = 0; i < adapter->num_xdp_queues; i++) { + if (adapter->xdp_ring[i]) + adapter->xdp_ring[i]->ring_idx = i; + } + +#endif /* HAVE_AF_XDP_ZC_SUPPORT */ + return IXGBE_SUCCESS; + +err_out: + adapter->num_tx_queues = 0; + adapter->num_xdp_queues = 0; + adapter->num_rx_queues = 0; + adapter->num_q_vectors = 0; + + while (v_idx--) + ixgbe_free_q_vector(adapter, v_idx); + + return -ENOMEM; +} + +/** + * ixgbe_free_q_vectors - Free memory allocated for interrupt vectors + * @adapter: board private structure to initialize + * + * This function frees the memory allocated to the q_vectors. In addition if + * NAPI is enabled it will delete any references to the NAPI struct prior + * to freeing the q_vector. + **/ +static void ixgbe_free_q_vectors(struct ixgbe_adapter *adapter) +{ + int v_idx = adapter->num_q_vectors; + + adapter->num_tx_queues = 0; + adapter->num_xdp_queues = 0; + adapter->num_rx_queues = 0; + adapter->num_q_vectors = 0; + + while (v_idx--) + ixgbe_free_q_vector(adapter, v_idx); +} + +void ixgbe_reset_interrupt_capability(struct ixgbe_adapter *adapter) +{ + if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) { + adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED; + pci_disable_msix(adapter->pdev); + kfree(adapter->msix_entries); + adapter->msix_entries = NULL; + } else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) { + adapter->flags &= ~IXGBE_FLAG_MSI_ENABLED; + pci_disable_msi(adapter->pdev); + } +} + +/** + * ixgbe_set_interrupt_capability - set MSI-X or MSI if supported + * @adapter: board private structure to initialize + * + * Attempt to configure the interrupts using the best available + * capabilities of the hardware and the kernel. + **/ +void ixgbe_set_interrupt_capability(struct ixgbe_adapter *adapter) +{ + int err; + + /* We will try to get MSI-X interrupts first */ + if (!ixgbe_acquire_msix_vectors(adapter)) + return; + + /* At this point, we do not have MSI-X capabilities. We need to + * reconfigure or disable various features which require MSI-X + * capability. + */ + + /* Disable DCB unless we only have a single traffic class */ + if (netdev_get_num_tc(adapter->netdev) > 1) { + e_dev_warn("Number of DCB TCs exceeds number of available queues. Disabling DCB support.\n"); + netdev_reset_tc(adapter->netdev); + + if (adapter->hw.mac.type == ixgbe_mac_82598EB) + adapter->hw.fc.requested_mode = adapter->last_lfc_mode; + + adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED; + adapter->temp_dcb_cfg.pfc_mode_enable = false; + adapter->dcb_cfg.pfc_mode_enable = false; + } + + adapter->dcb_cfg.num_tcs.pg_tcs = 1; + adapter->dcb_cfg.num_tcs.pfc_tcs = 1; + + /* Disable VMDq support */ + e_dev_warn("Disabling VMQd support\n"); + adapter->flags &= ~IXGBE_FLAG_VMDQ_ENABLED; + +#ifdef CONFIG_PCI_IOV + /* Disable SR-IOV support */ + e_dev_warn("Disabling SR-IOV support\n"); + ixgbe_disable_sriov(adapter); +#endif /* CONFIG_PCI_IOV */ + + /* Disable RSS */ + e_dev_warn("Disabling RSS support\n"); + adapter->ring_feature[RING_F_RSS].limit = 1; + + /* recalculate number of queues now that many features have been + * changed or disabled. + */ + ixgbe_set_num_queues(adapter); + adapter->num_q_vectors = 1; + + if (!(adapter->flags & IXGBE_FLAG_MSI_CAPABLE)) + return; + + err = pci_enable_msi(adapter->pdev); + if (err) + e_dev_warn("Failed to allocate MSI interrupt, falling back to legacy. Error: %d\n", + err); + else + adapter->flags |= IXGBE_FLAG_MSI_ENABLED; +} + +/** + * ixgbe_init_interrupt_scheme - Determine proper interrupt scheme + * @adapter: board private structure to initialize + * + * We determine which interrupt scheme to use based on... + * - Kernel support (MSI, MSI-X) + * - which can be user-defined (via MODULE_PARAM) + * - Hardware queue count (num_*_queues) + * - defined by miscellaneous hardware support/features (RSS, etc.) + **/ +int ixgbe_init_interrupt_scheme(struct ixgbe_adapter *adapter) +{ + int err; + + /* Number of supported queues */ + ixgbe_set_num_queues(adapter); + + /* Set interrupt mode */ + ixgbe_set_interrupt_capability(adapter); + + /* Allocate memory for queues */ + err = ixgbe_alloc_q_vectors(adapter); + if (err) { + e_err(probe, "Unable to allocate memory for queue vectors\n"); + ixgbe_reset_interrupt_capability(adapter); + return err; + } + + ixgbe_cache_ring_register(adapter); + +#ifdef HAVE_XDP_SUPPORT + e_dev_info("Multiqueue %s: Rx Queue count = %u, Tx Queue count = %u XDP Queue count = %u\n", + (adapter->num_rx_queues > 1) ? "Enabled" : "Disabled", + adapter->num_rx_queues, adapter->num_tx_queues, + adapter->num_xdp_queues); +#else + e_dev_info("Multiqueue %s: Rx Queue count = %u, Tx Queue count = %u\n", + (adapter->num_rx_queues > 1) ? "Enabled" : "Disabled", + adapter->num_rx_queues, adapter->num_tx_queues); +#endif + set_bit(__IXGBE_DOWN, adapter->state); + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_clear_interrupt_scheme - Clear the current interrupt scheme settings + * @adapter: board private structure to clear interrupt scheme on + * + * We go through and clear interrupt specific resources and reset the structure + * to pre-load conditions + **/ +void ixgbe_clear_interrupt_scheme(struct ixgbe_adapter *adapter) +{ + adapter->num_tx_queues = 0; + adapter->num_xdp_queues = 0; + adapter->num_rx_queues = 0; + + ixgbe_free_q_vectors(adapter); + ixgbe_reset_interrupt_capability(adapter); +} + +void ixgbe_tx_ctxtdesc(struct ixgbe_ring *tx_ring, u32 vlan_macip_lens, + u32 fcoe_sof_eof, u32 type_tucmd, u32 mss_l4len_idx) +{ + struct ixgbe_adv_tx_context_desc *context_desc; + u16 i = tx_ring->next_to_use; + + context_desc = IXGBE_TX_CTXTDESC(tx_ring, i); + + i++; + tx_ring->next_to_use = (i < tx_ring->count) ? i : 0; + + /* set bits to identify this as an advanced context descriptor */ + type_tucmd |= IXGBE_TXD_CMD_DEXT | IXGBE_ADVTXD_DTYP_CTXT; + + context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens); + context_desc->seqnum_seed = cpu_to_le32(fcoe_sof_eof); + context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd); + context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx); +} diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_main.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_main.c new file mode 100644 index 00000000000..ff4e305b1c5 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_main.c @@ -0,0 +1,15931 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 1999 - 2026 Intel Corporation */ + +/****************************************************************************** + Copyright (c)2006 - 2007 Myricom, Inc. for some LRO specific code +******************************************************************************/ +#include "ixgbe.h" + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#ifdef NETIF_F_TSO +#include +#ifdef NETIF_F_TSO6 +#include +#include +#endif /* NETIF_F_TSO6 */ +#endif /* NETIF_F_TSO */ +#ifdef SIOCETHTOOL +#include +#endif + +#include +#include "kcompat_generated_defs.h" +#ifdef HAVE_XDP_SUPPORT +#include +#include +#include +#endif +#ifdef HAVE_AF_XDP_ZC_SUPPORT +#ifndef HAVE_MEM_TYPE_XSK_BUFF_POOL +#include +#else +#include +#endif +#endif /* HAVE_AF_XDP_ZC_SUPPORT */ +#ifdef HAVE_UDP_ENC_RX_OFFLOAD +#include +#include +#endif /* HAVE_UDP_ENC_RX_OFFLOAD */ +#ifdef HAVE_VXLAN_RX_OFFLOAD +#include +#endif /* HAVE_VXLAN_RX_OFFLOAD */ +#ifdef NETIF_F_HW_TC +#include +#include +#include +#endif /* NETIF_F_HW_TC */ + + +#include "ixgbe_devlink.h" +#include "ixgbe_dcb_82599.h" +#include "ixgbe_sriov.h" +#include "ixgbe_txrx_common.h" +#ifdef HAVE_TC_SETUP_CLSU32 +#include "ixgbe_model.h" +#endif /* HAVE_TC_SETUP_CLSU32 */ +#ifdef HAVE_PTP_1588_CLOCK +#include "ixgbe_ptp_e600.h" +#endif /* HAVE_PTP_1588_CLOCK */ + +#define DRV_HW_PERF + +#define FPGA + +#define DRIVERIOV + +#define BYPASS_TAG + +#define RELEASE_TAG + +#define DRV_VERSION "6.3.6" \ + DRIVERIOV DRV_HW_PERF FPGA \ + BYPASS_TAG RELEASE_TAG +#define DRV_SUMMARY "Intel(R) 10GbE PCI Express Linux Network Driver" +const char ixgbe_driver_version[] = DRV_VERSION; +#ifdef HAVE_NON_CONST_PCI_DRIVER_NAME +char ixgbe_driver_name[] = "ixgbe"; +#else +const char ixgbe_driver_name[] = "ixgbe"; +#endif +static const char ixgbe_driver_string[] = DRV_SUMMARY; +static const char ixgbe_copyright[] = "Copyright (C) 1999 - 2026 Intel Corporation"; +static const char ixgbe_overheat_msg[] = + "Network adapter has been stopped because it has over heated. " + "Restart the computer. If the problem persists, " + "power off the system and replace the adapter"; + +/* ixgbe_pci_tbl - PCI Device ID Table + * + * Wildcard entries (PCI_ANY_ID) should come last + * Last entry must be all 0s + * + * { Vendor ID, Device ID, SubVendor ID, SubDevice ID, + * Class, Class Mask, private data (not used) } + */ +static const struct pci_device_id ixgbe_pci_tbl[] = { + {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598), 0}, + {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT), 0}, + {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT), 0}, + {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT), 0}, + {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT2), 0}, + {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4), 0}, + {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT), 0}, + {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_DA_DUAL_PORT), 0}, + {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM), 0}, + {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_XF_LR), 0}, + {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_SFP_LOM), 0}, + {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_BX), 0}, + {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4), 0}, + {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_XAUI_LOM), 0}, + {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KR), 0}, + {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP), 0}, + {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_EM), 0}, + {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4_MEZZ), 0}, + {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_CX4), 0}, + {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_BACKPLANE_FCOE), 0}, + {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_FCOE), 0}, + {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_T3_LOM), 0}, + {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_COMBO_BACKPLANE), 0}, + {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T), 0}, + {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF2), 0}, + {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599EN_SFP), 0}, + {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF_QP), 0}, + {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_QSFP_SF_QP), 0}, + {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T1), 0}, + {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550T), 0}, + {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550T1), 0}, + {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_KX4), 0}, + {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_XFI), 0}, + {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_KR), 0}, + {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_SFP), 0}, + {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_10G_T), 0}, + {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_1G_T), 0}, + {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_KR), 0}, + {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_KR_L), 0}, + {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SFP_N), 0}, + {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SGMII), 0}, + {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SGMII_L), 0}, + {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_10G_T), 0}, + {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_QSFP), 0}, + {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_QSFP_N), 0}, + {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SFP), 0}, + {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_1G_T), 0}, + {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_1G_T_L), 0}, + {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_E610_BACKPLANE), 0}, + {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_E610_SFP), 0}, + {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_E610_10G_T), 0}, + {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_E610_2_5G_T), 0}, + {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_E610_SGMII), 0}, + /* required last entry */ + { .device = 0 } +}; +MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl); + +#if IS_ENABLED(CONFIG_DCA) +static int ixgbe_notify_dca(struct notifier_block *, unsigned long event, + void *p); +static struct notifier_block dca_notifier = { + .notifier_call = ixgbe_notify_dca, + .next = NULL, + .priority = 0 +}; +#endif /* CONFIG_DCA */ +static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter *); +static void ixgbe_watchdog_link_is_up(struct ixgbe_adapter *); +static void ixgbe_watchdog_update_link(struct ixgbe_adapter *); + +MODULE_AUTHOR("Intel Corporation, "); +MODULE_DESCRIPTION(DRV_SUMMARY); +MODULE_LICENSE("GPL"); +MODULE_VERSION(DRV_VERSION); + +DEFINE_STATIC_KEY_FALSE(ixgbe_xdp_locking_key); +EXPORT_SYMBOL(ixgbe_xdp_locking_key); + +#define DEFAULT_DEBUG_LEVEL_SHIFT 3 + +static ushort fwlog_method = IXGBE_FWLOG_METHOD_ARQ; +module_param(fwlog_method, ushort, 0644); +MODULE_PARM_DESC(fwlog_method, "FW event logging method. 0=ARQ event logging, 1=UART event logging\n"); + +static struct workqueue_struct *ixgbe_wq; + +static bool ixgbe_is_sfp(struct ixgbe_hw *hw); +static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev); + +static int ixgbe_read_pci_cfg_word_parent(struct ixgbe_hw *hw, + u32 reg, u16 *value) +{ + struct ixgbe_adapter *adapter = hw->back; + struct pci_dev *parent_dev; + struct pci_bus *parent_bus; + int pos; + + parent_bus = adapter->pdev->bus->parent; + if (!parent_bus) + return IXGBE_ERR_FEATURE_NOT_SUPPORTED; + + parent_dev = parent_bus->self; + if (!parent_dev) + return IXGBE_ERR_FEATURE_NOT_SUPPORTED; + + pos = pci_find_capability(parent_dev, PCI_CAP_ID_EXP); + if (!pos) + return IXGBE_ERR_FEATURE_NOT_SUPPORTED; + + pci_read_config_word(parent_dev, pos + reg, value); + if (*value == IXGBE_FAILED_READ_CFG_WORD && + ixgbe_check_cfg_remove(hw, parent_dev)) + return IXGBE_ERR_FEATURE_NOT_SUPPORTED; + return IXGBE_SUCCESS; +} + +/** + * ixgbe_get_parent_bus_info - Set PCI bus info for devices behind a switch + * @hw: Pointer to the hardware structure + * + * This function sets the PCI bus information, including speed, width, and + * type, within the ixgbe_hw structure for devices located behind a switch. + * It retrieves the negotiated link width and speed from the PCI configuration + * space of the parent device. If the read operation fails, it falls back to + * default values. + * + * Return: IXGBE_SUCCESS on successful execution. + */ +static s32 ixgbe_get_parent_bus_info(struct ixgbe_hw *hw) +{ + u16 link_status = 0; + int err; + + hw->bus.type = ixgbe_bus_type_pci_express; + + /* Get the negotiated link width and speed from PCI config space of the + * parent, as this device is behind a switch + */ + err = ixgbe_read_pci_cfg_word_parent(hw, 18, &link_status); + + /* If the read fails, fallback to default */ + if (err) + link_status = IXGBE_READ_PCIE_WORD(hw, IXGBE_PCI_LINK_STATUS); + + ixgbe_set_pci_config_data_generic(hw, link_status); + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_pcie_from_parent - determine whether to use parent for PCIe info + * @hw: hw specific details + * + * This function is used by probe to determine whether a device's PCIe info + * (speed, width, etc) should be obtained from the parent bus or directly. This + * is useful for specialized device configurations containing PCIe bridges. + */ +static inline bool ixgbe_pcie_from_parent(struct ixgbe_hw *hw) +{ + switch (hw->device_id) { + case IXGBE_DEV_ID_82599_QSFP_SF_QP: + case IXGBE_DEV_ID_82599_SFP_SF_QP: + return true; + default: + return false; + } +} + +static void ixgbe_check_minimum_link(struct ixgbe_adapter *adapter) +{ + struct ixgbe_hw *hw = &adapter->hw; + struct pci_dev *pdev; + + /* Some devices are not connected over PCIe and thus do not negotiate + * speed. These devices do not have valid bus info, and thus any report + * we generate may not be correct. + */ + if (hw->bus.type == ixgbe_bus_type_internal) + return; + + /* determine whether to use the parent device */ + if (ixgbe_pcie_from_parent(&adapter->hw)) + pdev = adapter->pdev->bus->parent->self; + else + pdev = adapter->pdev; + + pcie_print_link_status(pdev); +} + +/** + * ixgbe_enumerate_functions - Determine the number of ports on the device + * @adapter: Pointer to the adapter structure + * + * This function enumerates the physical functions co-located on a single slot + * to determine the number of ports a device has. This information is useful + * for assessing the PCIe bandwidth required for optimal performance. The + * function handles cases where devices are behind a parent switch by using a + * hardcoded number of ports. It also accounts for virtual functions and + * mismatched device IDs, returning -1 if the number of functions cannot be + * reliably determined. + * + * Return: Number of physical functions (ports) on success, or -1 if the + * number cannot be determined. + */ +static inline int ixgbe_enumerate_functions(struct ixgbe_adapter *adapter) +{ + struct pci_dev *entry, *pdev = adapter->pdev; + int physfns = 0; + + /* Some cards can not use the generic count PCIe functions method, + * because they are behind a parent switch, so we hardcode these to + * correct number of ports. + */ + if (ixgbe_pcie_from_parent(&adapter->hw)) { + physfns = 4; + } else { + list_for_each_entry(entry, &pdev->bus->devices, bus_list) { +#ifdef CONFIG_PCI_IOV + /* don't count virtual functions */ + if (entry->is_virtfn) + continue; +#endif + + /* When the devices on the bus don't all match our device ID, + * we can't reliably determine the correct number of + * functions. This can occur if a function has been direct + * attached to a virtual machine using VT-d, for example. In + * this case, simply return -1 to indicate this. + */ + if ((entry->vendor != pdev->vendor) || + (entry->device != pdev->device)) + return -1; + + physfns++; + } + } + + return physfns; +} + +static void ixgbe_service_event_schedule(struct ixgbe_adapter *adapter) +{ + if (!test_bit(__IXGBE_DOWN, adapter->state) && + !test_bit(__IXGBE_REMOVING, adapter->state) && + !test_and_set_bit(__IXGBE_SERVICE_SCHED, adapter->state)) + queue_work(ixgbe_wq, &adapter->service_task); +} + +static void ixgbe_service_event_complete(struct ixgbe_adapter *adapter) +{ + /* In case something went really wrong with scheduling, trigger BUG. */ + BUG_ON(!test_bit(__IXGBE_SERVICE_SCHED, adapter->state)); + + /* flush memory to make sure state is correct before next watchog */ + smp_mb__before_atomic(); + clear_bit(__IXGBE_SERVICE_SCHED, adapter->state); +} + +static void ixgbe_remove_adapter(struct ixgbe_hw *hw) +{ + struct ixgbe_adapter *adapter = hw->back; + + if (!hw->hw_addr) + return; + hw->hw_addr = NULL; + e_dev_err("Adapter removed\n"); + if (test_bit(__IXGBE_SERVICE_INITED, adapter->state)) + ixgbe_service_event_schedule(adapter); +} + +static u32 +ixgbe_check_remove(struct ixgbe_hw *hw, u32 reg) +{ + u8 __iomem *reg_addr; + u32 value; + int i; + + reg_addr = READ_ONCE(hw->hw_addr); + if (IXGBE_REMOVED(reg_addr)) + return IXGBE_FAILED_READ_REG; + + /* Register read of 0xFFFFFFFF can indicate the adapter has been + * removed, so perform several status register reads to determine if + * the adapter has been removed. + */ + for (i = 0; i < IXGBE_FAILED_READ_RETRIES; ++i) { + value = readl(reg_addr + IXGBE_STATUS); + if (value != IXGBE_FAILED_READ_REG) + break; + mdelay(3); + } + + if (value == IXGBE_FAILED_READ_REG) + ixgbe_remove_adapter(hw); + else + value = readl(reg_addr + reg); + return value; +} + +static u32 +ixgbe_validate_register_read(struct ixgbe_hw *_hw, u32 reg, bool quiet) +{ + int i; + u32 value; + u8 __iomem *reg_addr; + struct ixgbe_adapter *adapter = _hw->back; + + reg_addr = READ_ONCE(_hw->hw_addr); + if (IXGBE_REMOVED(reg_addr)) + return IXGBE_FAILED_READ_REG; + for (i = 0; i < IXGBE_DEAD_READ_RETRIES; ++i) { + value = readl(reg_addr + reg); + if (value != IXGBE_DEAD_READ_REG) + break; + } + if (quiet) + return value; + if (value == IXGBE_DEAD_READ_REG) + e_err(drv, "%s: register %x read unchanged\n", __func__, reg); + else + e_warn(hw, "%s: register %x read recovered after %d retries\n", + __func__, reg, i + 1); + return value; +} + +u32 ixgbe_read_reg(struct ixgbe_hw *hw, u32 reg, bool quiet) +{ + u32 value; + u8 __iomem *reg_addr; + + reg_addr = READ_ONCE(hw->hw_addr); + if (IXGBE_REMOVED(reg_addr)) + return IXGBE_FAILED_READ_REG; + if (unlikely(hw->phy.nw_mng_if_sel & + IXGBE_NW_MNG_IF_SEL_SGMII_ENABLE)) { + struct ixgbe_adapter *adapter; + int i; + + for (i = 0; i < 200; ++i) { + value = readl(reg_addr + IXGBE_MAC_SGMII_BUSY); + if (likely(!value)) + goto writes_completed; + if (value == IXGBE_FAILED_READ_REG) { + ixgbe_remove_adapter(hw); + return IXGBE_FAILED_READ_REG; + } + udelay(5); + } + + adapter = hw->back; + e_warn(hw, "register writes incomplete %08x\n", value); + } + +writes_completed: + value = readl(reg_addr + reg); + if (unlikely(value == IXGBE_FAILED_READ_REG)) + value = ixgbe_check_remove(hw, reg); + if (unlikely(value == IXGBE_DEAD_READ_REG)) + value = ixgbe_validate_register_read(hw, reg, quiet); + return value; +} + +static void ixgbe_release_hw_control(struct ixgbe_adapter *adapter) +{ + u32 ctrl_ext; + + /* Let firmware take over control of h/w */ + ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT); + IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT, + ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD); +} + +static void ixgbe_get_hw_control(struct ixgbe_adapter *adapter) +{ + u32 ctrl_ext; + + /* Let firmware know the driver has taken over */ + ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT); + IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT, + ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD); +} + +/* + * ixgbe_set_ivar - set the IVAR registers, mapping interrupt causes to vectors + * @adapter: pointer to adapter struct + * @direction: 0 for Rx, 1 for Tx, -1 for other causes + * @queue: queue to map the corresponding interrupt to + * @msix_vector: the vector to map to the corresponding queue + * + */ +static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, s8 direction, + u8 queue, u8 msix_vector) +{ + u32 ivar, index; + struct ixgbe_hw *hw = &adapter->hw; + switch (hw->mac.type) { + case ixgbe_mac_82598EB: + msix_vector |= IXGBE_IVAR_ALLOC_VAL; + if (direction == -1) + direction = 0; + index = (((direction * 64) + queue) >> 2) & 0x1F; + ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(index)); + ivar &= ~(0xFF << (8 * (queue & 0x3))); + ivar |= (msix_vector << (8 * (queue & 0x3))); + IXGBE_WRITE_REG(hw, IXGBE_IVAR(index), ivar); + break; + case ixgbe_mac_82599EB: + case ixgbe_mac_X540: + case ixgbe_mac_X550: + case ixgbe_mac_X550EM_x: + case ixgbe_mac_X550EM_a: + case ixgbe_mac_E610: + if (direction == -1) { + /* other causes */ + msix_vector |= IXGBE_IVAR_ALLOC_VAL; + index = ((queue & 1) * 8); + ivar = IXGBE_READ_REG(&adapter->hw, IXGBE_IVAR_MISC); + ivar &= ~(0xFF << index); + ivar |= (msix_vector << index); + IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR_MISC, ivar); + break; + } else { + /* tx or rx causes */ + msix_vector |= IXGBE_IVAR_ALLOC_VAL; + index = ((16 * (queue & 1)) + (8 * direction)); + ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(queue >> 1)); + ivar &= ~(0xFF << index); + ivar |= (msix_vector << index); + IXGBE_WRITE_REG(hw, IXGBE_IVAR(queue >> 1), ivar); + break; + } + default: + break; + } +} + +void ixgbe_irq_rearm_queues(struct ixgbe_adapter *adapter, + u64 qmask) +{ + u32 mask; + + switch (adapter->hw.mac.type) { + case ixgbe_mac_82598EB: + mask = (IXGBE_EIMS_RTX_QUEUE & qmask); + IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask); + break; + case ixgbe_mac_82599EB: + case ixgbe_mac_X540: + case ixgbe_mac_X550: + case ixgbe_mac_X550EM_x: + case ixgbe_mac_X550EM_a: + case ixgbe_mac_E610: + mask = (qmask & 0xFFFFFFFF); + IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(0), mask); + mask = (qmask >> 32); + IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(1), mask); + break; + default: + break; + } +} + +static void ixgbe_update_xoff_rx_lfc(struct ixgbe_adapter *adapter) +{ + struct ixgbe_hw *hw = &adapter->hw; + struct ixgbe_hw_stats *hwstats = &adapter->stats; + int i; + u32 data; + + if ((hw->fc.current_mode != ixgbe_fc_full) && + (hw->fc.current_mode != ixgbe_fc_rx_pause)) + return; + + switch (hw->mac.type) { + case ixgbe_mac_82598EB: + data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXC); + break; + default: + data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXCNT); + } + hwstats->lxoffrxc += data; + + /* refill credits (no tx hang) if we received xoff */ + if (!data) + return; + + for (i = 0; i < adapter->num_tx_queues; i++) + clear_bit(__IXGBE_HANG_CHECK_ARMED, + &adapter->tx_ring[i]->state); + for (i = 0; i < adapter->num_xdp_queues; i++) + clear_bit(__IXGBE_HANG_CHECK_ARMED, + &adapter->xdp_ring[i]->state); +} + +static void ixgbe_update_xoff_received(struct ixgbe_adapter *adapter) +{ + struct ixgbe_hw *hw = &adapter->hw; + struct ixgbe_hw_stats *hwstats = &adapter->stats; + u32 xoff[8] = {0}; + u8 tc; + int i; + bool pfc_en = adapter->dcb_cfg.pfc_mode_enable; + +#ifdef HAVE_DCBNL_IEEE + if (adapter->ixgbe_ieee_pfc) + pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en); + +#endif + if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED) || !pfc_en) { + ixgbe_update_xoff_rx_lfc(adapter); + return; + } + + /* update stats for each tc, only valid with PFC enabled */ + for (i = 0; i < MAX_TX_PACKET_BUFFERS; i++) { + u32 pxoffrxc; + + switch (hw->mac.type) { + case ixgbe_mac_82598EB: + pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXC(i)); + break; + default: + pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXCNT(i)); + } + hwstats->pxoffrxc[i] += pxoffrxc; + /* Get the TC for given UP */ + tc = netdev_get_prio_tc_map(adapter->netdev, i); + xoff[tc] += pxoffrxc; + } + + /* disarm tx queues that have received xoff frames */ + for (i = 0; i < adapter->num_tx_queues; i++) { + struct ixgbe_ring *tx_ring = adapter->tx_ring[i]; + + tc = tx_ring->dcb_tc; + if ((tc <= 7) && (xoff[tc])) + clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state); + } + for (i = 0; i < adapter->num_xdp_queues; i++) { + struct ixgbe_ring *xdp_ring = adapter->xdp_ring[i]; + + tc = xdp_ring->dcb_tc; + if (tc <= 7 && xoff[tc]) + clear_bit(__IXGBE_HANG_CHECK_ARMED, &xdp_ring->state); + } +} + +static u64 ixgbe_get_tx_completed(struct ixgbe_ring *ring) +{ + return ring->stats.packets; +} + +static u64 ixgbe_get_tx_pending(struct ixgbe_ring *ring) +{ + unsigned int head, tail; + + head = ring->next_to_clean; + tail = ring->next_to_use; + + return ((head <= tail) ? tail : tail + ring->count) - head; +} + +/** + * ixgbe_get_vf_idx - provide vf index number of defined queue + * @adapter: pointer to the adpter struct + * @queue: tx queue identifier + * @vf: output vf index + * + * Returns : IXGBE_SUCCESS if vf provided or error number + * + * This function provide vf index number associated to the input queue + */ +static s32 ixgbe_get_vf_idx(struct ixgbe_adapter *adapter, u16 queue, u16 *vf) +{ + struct ixgbe_hw *hw = &adapter->hw; + u8 queue_count; + u32 reg; + + if (queue > adapter->num_tx_queues - 1) + return IXGBE_ERR_PARAM; + + /* + * Determine number of queues by checking + * number of virtual functions + */ + reg = IXGBE_READ_REG(hw, IXGBE_GCR_EXT); + switch (reg & IXGBE_GCR_EXT_VT_MODE_MASK) { + case IXGBE_GCR_EXT_VT_MODE_64: + queue_count = 2; + break; + case IXGBE_GCR_EXT_VT_MODE_32: + queue_count = 4; + break; + case IXGBE_GCR_EXT_VT_MODE_16: + queue_count = 8; + break; + default: + return IXGBE_ERR_CONFIG; + } + + *vf = queue / queue_count; + + return IXGBE_SUCCESS; +} + +static bool ixgbe_check_tx_hang(struct ixgbe_ring *tx_ring) +{ + u32 tx_done = ixgbe_get_tx_completed(tx_ring); + u32 tx_done_old = tx_ring->tx_stats.tx_done_old; + u32 tx_pending = ixgbe_get_tx_pending(tx_ring); + bool ret = false; + + clear_check_for_tx_hang(tx_ring); + + /* + * Check for a hung queue, but be thorough. This verifies + * that a transmit has been completed since the previous + * check AND there is at least one packet pending. The + * ARMED bit is set to indicate a potential hang. The + * bit is cleared if a pause frame is received to remove + * false hang detection due to PFC or 802.3x frames. By + * requiring this to fail twice we avoid races with + * PFC clearing the ARMED bit and conditions where we + * run the check_tx_hang logic with a transmit completion + * pending but without time to complete it yet. + */ + if ((tx_done_old == tx_done) && tx_pending) { + /* make sure it is true for two checks in a row */ + ret = test_and_set_bit(__IXGBE_HANG_CHECK_ARMED, + &tx_ring->state); + } else { + /* update completed stats and continue */ + tx_ring->tx_stats.tx_done_old = tx_done; + /* reset the countdown */ + clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state); + } + + return ret; +} + +/** + * ixgbe_tx_timeout_reset - Initiate a reset due to a Tx timeout + * @adapter: Pointer to the driver private structure + * + * This function initiates a reset of the ixgbe network adapter in response + * to a transmit (Tx) timeout. It sets a reset request flag and schedules a + * service event to handle the reset, ensuring that the operation occurs + * outside of interrupt context. The function checks if the adapter is not + * already marked as down before proceeding with the reset request. + */static void ixgbe_tx_timeout_reset(struct ixgbe_adapter *adapter) +{ + + /* Do the reset outside of interrupt context */ + if (!test_bit(__IXGBE_DOWN, adapter->state)) { + set_bit(__IXGBE_RESET_REQUESTED, adapter->state); + ixgbe_service_event_schedule(adapter); + } +} + +/** + * ixgbe_tx_timeout - Respond to a Tx hang event + * @netdev: Network interface device structure pointer + * @txqueue: Specific Tx queue (used if HAVE_TX_TIMEOUT_TXQUEUE is defined) + * + * This function responds to a transmit (Tx) hang event on the ixgbe network + * adapter. It checks each Tx queue for a real Tx hang and initiates a reset + * if a hang is detected. If no real hang is found, it logs a message about + * a fake Tx hang and increases the kernel's watchdog timeout to prevent + * premature timeout events. + */ +#ifdef HAVE_TX_TIMEOUT_TXQUEUE +static void ixgbe_tx_timeout(struct net_device *netdev, unsigned int txqueue) +#else +static void ixgbe_tx_timeout(struct net_device *netdev) +#endif +{ + struct ixgbe_adapter *adapter = netdev_priv(netdev); + bool real_tx_hang = false; + int i; + +#define TX_TIMEO_LIMIT 16000 + for (i = 0; i < adapter->num_tx_queues; i++) { + struct ixgbe_ring *tx_ring = adapter->tx_ring[i]; + if (check_for_tx_hang(tx_ring) && ixgbe_check_tx_hang(tx_ring)) + real_tx_hang = true; + } + + if (real_tx_hang) { + ixgbe_tx_timeout_reset(adapter); + } else { + e_info(drv, "Fake Tx hang detected with timeout of %d " + "seconds\n", netdev->watchdog_timeo/HZ); + + /* fake Tx hang - increase the kernel timeout */ + if (netdev->watchdog_timeo < TX_TIMEO_LIMIT) + netdev->watchdog_timeo *= 2; + } +} + +/** + * ixgbe_reset_pf_report - reset pf and print reset report + * @tx_ring: tx ring number + * @next: next ring + * + * Prints a message containing details about the tx hang. + * Then reset the current PF adapter. + */ +static void ixgbe_reset_pf_report(struct ixgbe_ring *tx_ring, + unsigned int next) +{ + struct ixgbe_adapter *adapter = netdev_priv(tx_ring->netdev); + struct ixgbe_hw *hw = &adapter->hw; + + e_err(drv, "Detected Tx Unit Hang%s\n" + " Tx Queue <%d>\n" + " TDH, TDT <%x>, <%x>\n" + " next_to_use <%x>\n" + " next_to_clean <%x>\n" + "tx_buffer_info[next_to_clean]\n" + " time_stamp <%lx>\n" + " jiffies <%lx>\n", + ring_is_xdp(tx_ring) ? " (XDP)" : "", + tx_ring->queue_index, + IXGBE_READ_REG(hw, IXGBE_TDH(tx_ring->reg_idx)), + IXGBE_READ_REG(hw, IXGBE_TDT(tx_ring->reg_idx)), + tx_ring->next_to_use, next, + tx_ring->tx_buffer_info[next].time_stamp, jiffies); + + if (!ring_is_xdp(tx_ring)) + netif_stop_subqueue(tx_ring->netdev, + tx_ring->queue_index); +} + +/** + * ixgbe_reset_vf_report - reset vf and print reset report + * @adapter: structure containing ring specific data + * @vf: vf index + * + * Print a message containing details about maliciuos driver detection. + * Disable malicious VF driver if the detection happened several times. + */ +static void ixgbe_reset_vf_report(struct ixgbe_adapter *adapter, u16 vf) +{ + struct ixgbe_hw *hw = &adapter->hw; + + if (ixgbe_is_mac_E6xx(hw->mac.type)) { + e_info(drv, + "Malicious Driver Detection tx hang detected on PF %d VF %d MAC: %pM mdd-disable-vf=on", + hw->bus.func, vf, + adapter->vfinfo[vf].vf_mac_addresses); + + adapter->tx_hang_count[vf]++; + if (adapter->tx_hang_count[vf] == IXGBE_MAX_TX_VF_HANGS) { + ixgbe_set_vf_link_state(adapter, vf, + IFLA_VF_LINK_STATE_DISABLE); + adapter->tx_hang_count[vf] = 0; + } + } +} + +/** + * ixgbe_check_illegal_queue - check illegality packet + * @adapter: structure containing ring specific data + * @queue: queue index + * + * Returns : true if queue contain illegality packet + * + * Check if tx descriptor connected with input queue + * contain illegal packet. + */ +static bool ixgbe_check_illegal_queue(struct ixgbe_adapter *adapter, + u16 queue) +{ + struct ixgbe_adv_tx_context_desc cd; + struct ixgbe_hw *hw = &adapter->hw; + u32 mss_len, header_len, reg; + u16 i; + + for (i = 0; i < IXGBE_MAX_TX_DESCRIPTORS; i++) { + /* + * HW will clear bit IXGBE_TXDESCIC_READY when address + * is written to “Address” field. HW will set this bit + * when iCache read is done, and data is ready at TIC_DWx. + * Set descriptor address. + */ + IXGBE_WRITE_REG(hw, IXGBE_TXDESCIC, queue*i); + do { + reg = IXGBE_READ_REG(hw, IXGBE_TXDESCIC); + } while (!(reg & IXGBE_TXDESCIC_READY)); + + /* read tx descriptor access registers */ + cd.vlan_macip_lens = IXGBE_READ_REG(hw, IXGBE_TIC_DW2(0)); + cd.seqnum_seed = IXGBE_READ_REG(hw, IXGBE_TIC_DW2(1)); + cd.type_tucmd_mlhl = IXGBE_READ_REG(hw, IXGBE_TIC_DW2(2)); + cd.mss_l4len_idx = IXGBE_READ_REG(hw, IXGBE_TIC_DW2(3)); + + /* check if Advanced Context Descriptor */ + if ((cd.type_tucmd_mlhl & 0x00F00000 >> 20) == 2) { + /* Determine legality */ + /* check for illegal MSS and Header length */ + mss_len = cd.mss_l4len_idx & 0xFFFF0000 >> 16; + header_len = cd.vlan_macip_lens & 0x000001FF; + if ((mss_len + header_len) > 16384) { + e_info(probe, + "mss len + header len too long\n"); + return true; + } + } + } + + return false; +} + +/** + * ixgbe_handle_mdd_event - handle mdd event + * @adapter: structure containing ring specific data + * @tx_ring: tx descriptor ring to handle + * + * Reset VF driver if malicious vf detected or + * illegal packet in an any queue detected. + */ +static void ixgbe_handle_mdd_event(struct ixgbe_adapter *adapter, + struct ixgbe_ring *tx_ring) +{ + u16 vf, q; + + if (adapter->flags & IXGBE_FLAG_MDD_ENABLED && + adapter->vfinfo && ixgbe_check_mdd_event(adapter)) { + /* vf mdd info and malicious vf detected */ + if (!ixgbe_get_vf_idx(adapter, tx_ring->queue_index, + &vf)) { + ixgbe_reset_vf_report(adapter, vf); + } + } else { + /* malicious vf not detected */ + for (q = 0; q < IXGBE_MAX_TX_QUEUES; q++) { + if (ixgbe_check_illegal_queue(adapter, q) && + !ixgbe_get_vf_idx(adapter, q, &vf)) { + /* illegal queue detected */ + ixgbe_reset_vf_report(adapter, vf); + } + } + } +} + +/** + * ixgbe_clean_tx_irq - Reclaim resources after transmit completes + * @q_vector: Structure containing interrupt and ring information + * @tx_ring: Transmit ring to clean + * @napi_budget: Used to determine if we are in netpoll + * + * This function reclaims resources after a transmit (Tx) operation completes + * on the ixgbe network adapter. It processes completed Tx descriptors, frees + * associated buffers, updates statistics, and checks for Tx hangs. If a Tx + * hang is detected, it initiates a reset. The function also manages queue + * wake-up conditions based on available descriptors and network carrier + * status. + * + * Return: true if the budget is exhausted or a reset is needed, false + * otherwise. + */ +static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector *q_vector, + struct ixgbe_ring *tx_ring, int napi_budget) +{ + struct ixgbe_adapter *adapter = q_vector->adapter; + struct ixgbe_tx_buffer *tx_buffer; + union ixgbe_adv_tx_desc *tx_desc; + unsigned int total_bytes = 0, total_packets = 0; + unsigned int budget = q_vector->tx.work_limit; + unsigned int i = tx_ring->next_to_clean; + + if (test_bit(__IXGBE_DOWN, adapter->state)) + return true; + + tx_buffer = &tx_ring->tx_buffer_info[i]; + tx_desc = IXGBE_TX_DESC(tx_ring, i); + i -= tx_ring->count; + + do { + union ixgbe_adv_tx_desc *eop_desc = tx_buffer->next_to_watch; + + /* if next_to_watch is not set then there is no work pending */ + if (!eop_desc) + break; + + /* prevent any other reads prior to eop_desc */ + smp_rmb(); + + /* if DD is not set pending work has not been completed */ + if (!(eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD))) + break; + + /* clear next_to_watch to prevent false hangs */ + tx_buffer->next_to_watch = NULL; + + /* update the statistics for this packet */ + total_bytes += tx_buffer->bytecount; + total_packets += tx_buffer->gso_segs; + + /* free the skb */ +#ifdef HAVE_XDP_SUPPORT + if (ring_is_xdp(tx_ring)) +#ifdef HAVE_XDP_FRAME_STRUCT + xdp_return_frame(tx_buffer->xdpf); +#else + page_frag_free(tx_buffer->data); +#endif + else + napi_consume_skb(tx_buffer->skb, napi_budget); +#else + napi_consume_skb(tx_buffer->skb, napi_budget); +#endif + + /* unmap skb header data */ + dma_unmap_single(tx_ring->dev, + dma_unmap_addr(tx_buffer, dma), + dma_unmap_len(tx_buffer, len), + DMA_TO_DEVICE); + + /* clear tx_buffer data */ + dma_unmap_len_set(tx_buffer, len, 0); + + /* unmap remaining buffers */ + while (tx_desc != eop_desc) { + tx_buffer++; + tx_desc++; + i++; + if (unlikely(!i)) { + i -= tx_ring->count; + tx_buffer = tx_ring->tx_buffer_info; + tx_desc = IXGBE_TX_DESC(tx_ring, 0); + } + + /* unmap any remaining paged data */ + if (dma_unmap_len(tx_buffer, len)) { + dma_unmap_page(tx_ring->dev, + dma_unmap_addr(tx_buffer, dma), + dma_unmap_len(tx_buffer, len), + DMA_TO_DEVICE); + dma_unmap_len_set(tx_buffer, len, 0); + } + } + + /* move us one more past the eop_desc for start of next pkt */ + tx_buffer++; + tx_desc++; + i++; + if (unlikely(!i)) { + i -= tx_ring->count; + tx_buffer = tx_ring->tx_buffer_info; + tx_desc = IXGBE_TX_DESC(tx_ring, 0); + } + + /* issue prefetch for next Tx descriptor */ + prefetch(tx_desc); + + /* update budget accounting */ + budget--; + } while (likely(budget)); + + i += tx_ring->count; + tx_ring->next_to_clean = i; + u64_stats_update_begin(&tx_ring->syncp); + tx_ring->stats.bytes += total_bytes; + tx_ring->stats.packets += total_packets; + u64_stats_update_end(&tx_ring->syncp); + q_vector->tx.total_bytes += total_bytes; + q_vector->tx.total_packets += total_packets; + + if (check_for_tx_hang(tx_ring) && ixgbe_check_tx_hang(tx_ring)) { + if (ixgbe_is_mac_E6xx(adapter->hw.mac.type)) + ixgbe_handle_mdd_event(adapter, tx_ring); + /* reset PF */ + ixgbe_reset_pf_report(tx_ring, i); + + e_info(probe, + "tx hang %d detected on queue %d, resetting adapter\n", + adapter->tx_timeout_count + 1, tx_ring->queue_index); + + ixgbe_tx_timeout_reset(adapter); + + /* the adapter is about to reset, no point in enabling stuff */ + return true; + } + + if (ring_is_xdp(tx_ring)) + return !!budget; + netdev_tx_completed_queue(txring_txq(tx_ring), + total_packets, total_bytes); + +#define TX_WAKE_THRESHOLD (DESC_NEEDED * 2) + if (unlikely(total_packets && netif_carrier_ok(netdev_ring(tx_ring)) && + (ixgbe_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD))) { + /* Make sure that anybody stopping the queue after this + * sees the new next_to_clean. + */ + smp_mb(); +#ifdef HAVE_TX_MQ + if (__netif_subqueue_stopped(netdev_ring(tx_ring), + ring_queue_index(tx_ring)) && + !test_bit(__IXGBE_DOWN, q_vector->adapter->state)) { + netif_wake_subqueue(netdev_ring(tx_ring), + ring_queue_index(tx_ring)); + ++tx_ring->tx_stats.restart_queue; + } +#else + if (netif_queue_stopped(netdev_ring(tx_ring)) && + !test_bit(__IXGBE_DOWN, q_vector->adapter->state)) { + netif_wake_queue(netdev_ring(tx_ring)); + ++tx_ring->tx_stats.restart_queue; + } +#endif + } + + return !!budget; +} + +#if IS_ENABLED(CONFIG_DCA) +static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter, + struct ixgbe_ring *tx_ring, + int cpu) +{ + struct ixgbe_hw *hw = &adapter->hw; + u32 txctrl = 0; + u16 reg_offset; + + if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) + txctrl = dca3_get_tag(tx_ring->dev, cpu); + + switch (hw->mac.type) { + case ixgbe_mac_82598EB: + reg_offset = IXGBE_DCA_TXCTRL(tx_ring->reg_idx); + break; + case ixgbe_mac_82599EB: + case ixgbe_mac_X540: + reg_offset = IXGBE_DCA_TXCTRL_82599(tx_ring->reg_idx); + txctrl <<= IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599; + break; + default: + /* for unknown hardware do not write register */ + return; + } + + /* + * We can enable relaxed ordering for reads, but not writes when + * DCA is enabled. This is due to a known issue in some chipsets + * which will cause the DCA tag to be cleared. + */ + txctrl |= IXGBE_DCA_TXCTRL_DESC_RRO_EN | + IXGBE_DCA_TXCTRL_DATA_RRO_EN | + IXGBE_DCA_TXCTRL_DESC_DCA_EN; + + IXGBE_WRITE_REG(hw, reg_offset, txctrl); +} + +static void ixgbe_update_rx_dca(struct ixgbe_adapter *adapter, + struct ixgbe_ring *rx_ring, + int cpu) +{ + struct ixgbe_hw *hw = &adapter->hw; + u32 rxctrl = 0; + u8 reg_idx = rx_ring->reg_idx; + + if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) + rxctrl = dca3_get_tag(rx_ring->dev, cpu); + + switch (hw->mac.type) { + case ixgbe_mac_82599EB: + case ixgbe_mac_X540: + rxctrl <<= IXGBE_DCA_RXCTRL_CPUID_SHIFT_82599; + break; + default: + break; + } + + /* + * We can enable relaxed ordering for reads, but not writes when + * DCA is enabled. This is due to a known issue in some chipsets + * which will cause the DCA tag to be cleared. + */ + rxctrl |= IXGBE_DCA_RXCTRL_DESC_RRO_EN | + IXGBE_DCA_RXCTRL_DATA_DCA_EN | + IXGBE_DCA_RXCTRL_DESC_DCA_EN; + + IXGBE_WRITE_REG(hw, IXGBE_DCA_RXCTRL(reg_idx), rxctrl); +} + +static void ixgbe_update_dca(struct ixgbe_q_vector *q_vector) +{ + struct ixgbe_adapter *adapter = q_vector->adapter; + struct ixgbe_ring *ring; + int cpu = get_cpu(); + + if (q_vector->cpu == cpu) + goto out_no_update; + + ixgbe_for_each_ring(ring, q_vector->tx) + ixgbe_update_tx_dca(adapter, ring, cpu); + + ixgbe_for_each_ring(ring, q_vector->rx) + ixgbe_update_rx_dca(adapter, ring, cpu); + + q_vector->cpu = cpu; +out_no_update: + put_cpu(); +} + +static void ixgbe_setup_dca(struct ixgbe_adapter *adapter) +{ + int v_idx; + + /* always use CB2 mode, difference is masked in the CB driver */ + if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) + IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, + IXGBE_DCA_CTRL_DCA_MODE_CB2); + else + IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, + IXGBE_DCA_CTRL_DCA_DISABLE); + + for (v_idx = 0; v_idx < adapter->num_q_vectors; v_idx++) { + adapter->q_vector[v_idx]->cpu = -1; + ixgbe_update_dca(adapter->q_vector[v_idx]); + } +} + +static int __ixgbe_notify_dca(struct device *dev, void *data) +{ + struct ixgbe_adapter *adapter = dev_get_drvdata(dev); + unsigned long event = *(unsigned long *)data; + + if (!(adapter->flags & IXGBE_FLAG_DCA_CAPABLE)) + return 0; + + switch (event) { + case DCA_PROVIDER_ADD: + /* if we're already enabled, don't do it again */ + if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) + break; + if (dca_add_requester(dev) == IXGBE_SUCCESS) { + adapter->flags |= IXGBE_FLAG_DCA_ENABLED; + IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, + IXGBE_DCA_CTRL_DCA_MODE_CB2); + break; + } + /* fall through - DCA is disabled */ + fallthrough; + case DCA_PROVIDER_REMOVE: + if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) { + dca_remove_requester(dev); + adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED; + IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, + IXGBE_DCA_CTRL_DCA_DISABLE); + } + break; + } + + return IXGBE_SUCCESS; +} +#endif /* CONFIG_DCA */ + +#ifdef NETIF_F_RXHASH +#define IXGBE_RSS_L4_TYPES_MASK \ + ((1ul << IXGBE_RXDADV_RSSTYPE_IPV4_TCP) | \ + (1ul << IXGBE_RXDADV_RSSTYPE_IPV4_UDP) | \ + (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_TCP) | \ + (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_UDP) | \ + (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_TCP_EX) | \ + (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_UDP_EX)) + +static inline void ixgbe_rx_hash(struct ixgbe_ring *ring, + union ixgbe_adv_rx_desc *rx_desc, + struct sk_buff *skb) +{ + u16 rss_type; + + if (!(netdev_ring(ring)->features & NETIF_F_RXHASH)) + return; + + rss_type = le16_to_cpu(rx_desc->wb.lower.lo_dword.hs_rss.pkt_info) & + IXGBE_RXDADV_RSSTYPE_MASK; + + if (!rss_type) + return; + + skb_set_hash(skb, le32_to_cpu(rx_desc->wb.lower.hi_dword.rss), + (IXGBE_RSS_L4_TYPES_MASK & (1ul << rss_type)) ? + PKT_HASH_TYPE_L4 : PKT_HASH_TYPE_L3); +} +#endif /* NETIF_F_RXHASH */ + +#if IS_ENABLED(CONFIG_FCOE) +/** + * ixgbe_rx_is_fcoe - check the rx desc for incoming pkt type + * @ring: structure containing ring specific data + * @rx_desc: advanced rx descriptor + * + * Returns : true if it is FCoE pkt + */ +static inline bool ixgbe_rx_is_fcoe(struct ixgbe_ring *ring, + union ixgbe_adv_rx_desc *rx_desc) +{ + __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info; + + return test_bit(__IXGBE_RX_FCOE, &ring->state) && + ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_ETQF_MASK)) == + (cpu_to_le16(IXGBE_ETQF_FILTER_FCOE << + IXGBE_RXDADV_PKTTYPE_ETQF_SHIFT))); +} +#endif /* CONFIG_FCOE */ + +/** + * ixgbe_rx_checksum - Indicate in skb if hardware indicated a good checksum + * @ring: Structure containing ring-specific data + * @rx_desc: Current Rx descriptor being processed + * @skb: Socket buffer currently being received and modified + * + * This function checks the receive (Rx) descriptor for checksum status and + * updates the socket buffer (skb) accordingly. It verifies if the checksum + * offload is enabled and processes the checksum status for IP, TCP, and UDP + * packets. The function handles special cases for encapsulated packets and + * known hardware errata, marking the skb with the appropriate checksum + * status. + */ +static inline void ixgbe_rx_checksum(struct ixgbe_ring *ring, + union ixgbe_adv_rx_desc *rx_desc, + struct sk_buff *skb) +{ + __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info; + bool encap_pkt = false; + + skb_checksum_none_assert(skb); + + /* Rx csum disabled */ + if (!(netdev_ring(ring)->features & NETIF_F_RXCSUM)) + return; + + /* check for VXLAN or Geneve packet type */ + if (pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_VXLAN)) { + encap_pkt = true; +#if defined(HAVE_UDP_ENC_RX_OFFLOAD) || defined(HAVE_VXLAN_RX_OFFLOAD) + skb->encapsulation = 1; +#endif /* HAVE_UDP_ENC_RX_OFFLOAD || HAVE_VXLAN_RX_OFFLOAD */ + skb->ip_summed = CHECKSUM_NONE; + } + + /* if IP and error */ + if (ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_IPCS) && + ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_IPE)) { + ring->rx_stats.csum_err++; + return; + } + + if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_L4CS)) + return; + + if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_TCPE)) { + + /* + * 82599 errata, UDP frames with a 0 checksum can be marked as + * checksum errors. + */ + if ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_UDP)) && + test_bit(__IXGBE_RX_CSUM_UDP_ZERO_ERR, &ring->state)) + return; + + ring->rx_stats.csum_err++; + return; + } + + /* It must be a TCP or UDP packet with a valid checksum */ + skb->ip_summed = CHECKSUM_UNNECESSARY; + if (encap_pkt) { + if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_OUTERIPCS)) + return; + + if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_OUTERIPER)) { + skb->ip_summed = CHECKSUM_NONE; + return; + } +#ifdef HAVE_SKBUFF_CSUM_LEVEL + /* If we checked the outer header let the stack know */ + skb->csum_level = 1; +#endif /* HAVE_SKBUFF_CSUM_LEVEL */ + } +} + +static inline void ixgbe_release_rx_desc(struct ixgbe_ring *rx_ring, u32 val) +{ + rx_ring->next_to_use = val; +#ifndef CONFIG_IXGBE_DISABLE_PACKET_SPLIT + + /* update next to alloc since we have filled the ring */ + rx_ring->next_to_alloc = val; +#endif + /* + * Force memory writes to complete before letting h/w + * know there are new descriptors to fetch. (Only + * applicable for weak-ordered memory model archs, + * such as IA-64). + */ + wmb(); + writel(val, rx_ring->tail); +} + +#ifdef CONFIG_IXGBE_DISABLE_PACKET_SPLIT +static bool ixgbe_alloc_mapped_skb(struct ixgbe_ring *rx_ring, + struct ixgbe_rx_buffer *bi) +{ + struct sk_buff *skb = bi->skb; + dma_addr_t dma = bi->dma; + + if (unlikely(dma)) + return true; + + if (likely(!skb)) { + skb = netdev_alloc_skb_ip_align(netdev_ring(rx_ring), + rx_ring->rx_buf_len); + if (unlikely(!skb)) { + rx_ring->rx_stats.alloc_rx_buff_failed++; + return false; + } + + bi->skb = skb; + + } + + dma = dma_map_single(rx_ring->dev, skb->data, + rx_ring->rx_buf_len, DMA_FROM_DEVICE); + + /* + * if mapping failed free memory back to system since + * there isn't much point in holding memory we can't use + */ + if (dma_mapping_error(rx_ring->dev, dma)) { + dev_kfree_skb_any(skb); + bi->skb = NULL; + + rx_ring->rx_stats.alloc_rx_buff_failed++; + return false; + } + + bi->dma = dma; + return true; +} + +#else /* !CONFIG_IXGBE_DISABLE_PACKET_SPLIT */ +static unsigned int ixgbe_rx_offset(struct ixgbe_ring *rx_ring) +{ + return ring_uses_build_skb(rx_ring) ? IXGBE_SKB_PAD : 0; +} + +static bool ixgbe_alloc_mapped_page(struct ixgbe_ring *rx_ring, + struct ixgbe_rx_buffer *bi) +{ + struct page *page = bi->page; + dma_addr_t dma; +#if defined(HAVE_STRUCT_DMA_ATTRS) && defined(HAVE_SWIOTLB_SKIP_CPU_SYNC) + DEFINE_DMA_ATTRS(attrs); + + dma_set_attr(DMA_ATTR_SKIP_CPU_SYNC, &attrs); + dma_set_attr(DMA_ATTR_WEAK_ORDERING, &attrs); +#endif + + /* since we are recycling buffers we should seldom need to alloc */ + if (likely(page)) + return true; + + /* alloc new page for storage */ + page = dev_alloc_pages(ixgbe_rx_pg_order(rx_ring)); + if (unlikely(!page)) { + rx_ring->rx_stats.alloc_rx_page_failed++; + return false; + } + + /* map page for use */ + dma = dma_map_page_attrs(rx_ring->dev, page, 0, + ixgbe_rx_pg_size(rx_ring), + DMA_FROM_DEVICE, +#if defined(HAVE_STRUCT_DMA_ATTRS) && defined(HAVE_SWIOTLB_SKIP_CPU_SYNC) + &attrs); +#else + IXGBE_RX_DMA_ATTR); +#endif + + /* + * if mapping failed free memory back to system since + * there isn't much point in holding memory we can't use + */ + if (dma_mapping_error(rx_ring->dev, dma)) { + __free_pages(page, ixgbe_rx_pg_order(rx_ring)); + + rx_ring->rx_stats.alloc_rx_page_failed++; + return false; + } + + bi->dma = dma; + bi->page = page; + bi->page_offset = ixgbe_rx_offset(rx_ring); +#ifdef HAVE_PAGE_COUNT_BULK_UPDATE + page_ref_add(page, USHRT_MAX - 1); + bi->pagecnt_bias = USHRT_MAX; +#else + bi->pagecnt_bias = 1; +#endif + rx_ring->rx_stats.alloc_rx_page++; + + return true; +} +#endif /* !CONFIG_IXGBE_DISABLE_PACKET_SPLIT */ + +/** + * ixgbe_alloc_rx_buffers - Replace used receive buffers + * @rx_ring: Ring to place buffers on + * @cleaned_count: Number of buffers to replace + * + * This function replaces used receive buffers on the specified Rx ring of + * the ixgbe network adapter. It allocates new buffers and updates the Rx + * descriptors with the addresses of these buffers. The function handles + * both packet split and non-packet split modes, ensuring that the buffers + * are properly synchronized for device use. It also refreshes the descriptor + * information and releases the Rx descriptors if necessary. + */ +void ixgbe_alloc_rx_buffers(struct ixgbe_ring *rx_ring, u16 cleaned_count) +{ + union ixgbe_adv_rx_desc *rx_desc; + struct ixgbe_rx_buffer *bi; + u16 i = rx_ring->next_to_use; +#ifndef CONFIG_IXGBE_DISABLE_PACKET_SPLIT + u16 bufsz; +#endif + + /* nothing to do */ + if (!cleaned_count) + return; + + rx_desc = IXGBE_RX_DESC(rx_ring, i); + bi = &rx_ring->rx_buffer_info[i]; + i -= rx_ring->count; +#ifndef CONFIG_IXGBE_DISABLE_PACKET_SPLIT + + bufsz = ixgbe_rx_bufsz(rx_ring); +#endif + + do { +#ifdef CONFIG_IXGBE_DISABLE_PACKET_SPLIT + if (!ixgbe_alloc_mapped_skb(rx_ring, bi)) + break; +#else + if (!ixgbe_alloc_mapped_page(rx_ring, bi)) + break; + + /* sync the buffer for use by the device */ + dma_sync_single_range_for_device(rx_ring->dev, bi->dma, + bi->page_offset, bufsz, + DMA_FROM_DEVICE); +#endif + + /* + * Refresh the desc even if buffer_addrs didn't change + * because each write-back erases this info. + */ +#ifdef CONFIG_IXGBE_DISABLE_PACKET_SPLIT + rx_desc->read.pkt_addr = cpu_to_le64(bi->dma); +#else + rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset); +#endif + + rx_desc++; + bi++; + i++; + if (unlikely(!i)) { + rx_desc = IXGBE_RX_DESC(rx_ring, 0); + bi = rx_ring->rx_buffer_info; + i -= rx_ring->count; + } + + /* clear the length for the next_to_use descriptor */ + rx_desc->wb.upper.length = 0; + + cleaned_count--; + } while (cleaned_count); + + i += rx_ring->count; + + if (rx_ring->next_to_use != i) + ixgbe_release_rx_desc(rx_ring, i); +} + +#ifdef CONFIG_IXGBE_DISABLE_PACKET_SPLIT +/** + * ixgbe_merge_active_tail - Merge active tail into LRO skb + * @tail: Pointer to the active tail in the frag_list + * + * This function merges the length and data of an active tail into the + * socket buffer (skb) containing the frag_list. It updates the length, + * data length, and true size of the head skb to include the tail's + * attributes. The function then resets the tail's head pointer to NULL, + * effectively merging the tail into the head while leaving the head's + * pointer to the tail intact. + * + * Return: Pointer to the head skb after merging. + */ +static inline struct sk_buff *ixgbe_merge_active_tail(struct sk_buff *tail) +{ + struct sk_buff *head = IXGBE_CB(tail)->head; + + if (!head) + return tail; + + head->len += tail->len; + head->data_len += tail->len; + head->truesize += tail->truesize; + + IXGBE_CB(tail)->head = NULL; + + return head; +} + +/** + * ixgbe_add_active_tail - Add an active tail to the skb frag_list + * @head: Pointer to the start of the skb + * @tail: Pointer to the active tail to add to the frag_list + * + * This function adds an active tail to the end of the frag_list of the + * specified socket buffer (skb). The tail is still receiving data, so its + * statistics are not yet added to the main skb. This is handled later by + * the `ixgbe_merge_active_tail` function. If there is an existing tail, + * it is merged before adding the new tail. + */ +static inline void ixgbe_add_active_tail(struct sk_buff *head, + struct sk_buff *tail) +{ + struct sk_buff *old_tail = IXGBE_CB(head)->tail; + + if (old_tail) { + ixgbe_merge_active_tail(old_tail); + old_tail->next = tail; + } else { + skb_shinfo(head)->frag_list = tail; + } + + IXGBE_CB(tail)->head = head; + IXGBE_CB(head)->tail = tail; +} + +/** + * ixgbe_close_active_frag_list - Clean up pointers on a frag_list skb + * @head: Pointer to the head of an active frag_list + * + * This function clears the `frag_tail_tracker` pointer on an active + * frag_list within the specified socket buffer (skb). It merges the active + * tail into the head and resets the tail pointer to NULL. The function + * returns true if the tail pointer was set and successfully cleared. + * + * Return: true if the tail pointer was set and cleared, false otherwise. + */ +static inline bool ixgbe_close_active_frag_list(struct sk_buff *head) +{ + struct sk_buff *tail = IXGBE_CB(head)->tail; + + if (!tail) + return false; + + ixgbe_merge_active_tail(tail); + + IXGBE_CB(head)->tail = NULL; + + return true; +} +#endif + +#ifdef HAVE_VLAN_RX_REGISTER +/** + * ixgbe_receive_skb - Send a completed packet up the network stack + * @q_vector: Structure containing interrupt and ring information + * @skb: Packet to send up the stack + * + * This function processes a completed packet (skb) and sends it up the + * network stack. It handles VLAN-tagged packets by checking for a VLAN + * group and using appropriate VLAN handling functions. For non-VLAN packets, + * it uses standard network stack functions to pass the packet up. The + * function also considers whether netpoll is enabled for the queue vector. + */ +static void ixgbe_receive_skb(struct ixgbe_q_vector *q_vector, + struct sk_buff *skb) +{ + u16 vlan_tag = IXGBE_CB(skb)->vid; + +#if defined(NETIF_F_HW_VLAN_TX) || defined(NETIF_F_HW_VLAN_CTAG_TX) + if (vlan_tag & VLAN_VID_MASK) { + /* by placing vlgrp at start of structure we can alias it */ + struct vlan_group **vlgrp = netdev_priv(skb->dev); + if (!*vlgrp) + dev_kfree_skb_any(skb); + else if (q_vector->netpoll_rx) + vlan_hwaccel_rx(skb, *vlgrp, vlan_tag); + else + vlan_gro_receive(&q_vector->napi, + *vlgrp, vlan_tag, skb); + } else { +#endif /* NETIF_F_HW_VLAN_TX || NETIF_F_HW_VLAN_CTAG_TX */ + if (q_vector->netpoll_rx) + netif_rx(skb); + else + napi_gro_receive(&q_vector->napi, skb); +#if defined(NETIF_F_HW_VLAN_TX) || defined(NETIF_F_HW_VLAN_CTAG_TX) + } +#endif /* NETIF_F_HW_VLAN_TX || NETIF_F_HW_VLAN_CTAG_TX */ +} +#endif /* HAVE_VLAN_RX_REGISTER */ + +#ifdef NETIF_F_GSO +static void ixgbe_set_rsc_gso_size(struct ixgbe_ring __maybe_unused *ring, + struct sk_buff *skb) +{ + u16 hdr_len = skb_headlen(skb); + + /* set gso_size to avoid messing up TCP MSS */ + skb_shinfo(skb)->gso_size = DIV_ROUND_UP((skb->len - hdr_len), + IXGBE_CB(skb)->append_cnt); + skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4; +} + +#endif /* NETIF_F_GSO */ +static void ixgbe_update_rsc_stats(struct ixgbe_ring *rx_ring, + struct sk_buff *skb) +{ + /* if append_cnt is 0 then frame is not RSC */ + if (!IXGBE_CB(skb)->append_cnt) + return; + + rx_ring->rx_stats.rsc_count += IXGBE_CB(skb)->append_cnt; + rx_ring->rx_stats.rsc_flush++; + +#ifdef NETIF_F_GSO + ixgbe_set_rsc_gso_size(rx_ring, skb); + +#endif + /* gso_size is computed using append_cnt so always clear it last */ + IXGBE_CB(skb)->append_cnt = 0; +} + +static void ixgbe_rx_vlan(struct ixgbe_ring *ring, + union ixgbe_adv_rx_desc *rx_desc, + struct sk_buff *skb) +{ +#ifdef NETIF_F_HW_VLAN_CTAG_RX + if ((netdev_ring(ring)->features & NETIF_F_HW_VLAN_CTAG_RX) && +#else + if ((netdev_ring(ring)->features & NETIF_F_HW_VLAN_RX) && +#endif + ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_VP)) +#ifndef HAVE_VLAN_RX_REGISTER + __vlan_hwaccel_put_tag(skb, + htons(ETH_P_8021Q), + le16_to_cpu(rx_desc->wb.upper.vlan)); +#else + IXGBE_CB(skb)->vid = le16_to_cpu(rx_desc->wb.upper.vlan); + else + IXGBE_CB(skb)->vid = 0; +#endif +} + +/** + * ixgbe_process_skb_fields - Populate skb header fields from Rx descriptor + * @rx_ring: Rx descriptor ring packet is being transacted on + * @rx_desc: Pointer to the end-of-packet (EOP) Rx descriptor + * @skb: Pointer to the current skb being populated + * + * This function populates various fields in the socket buffer (skb) based + * on information from the Rx descriptor and ring. It updates the hash, + * checksum, VLAN, timestamp, protocol, and other relevant fields. The + * function also handles specific features like receive-side scaling (RSS), + * hardware timestamping, and VLAN processing, ensuring the skb is fully + * prepared for further processing in the network stack. + */ +void ixgbe_process_skb_fields(struct ixgbe_ring *rx_ring, + union ixgbe_adv_rx_desc *rx_desc, + struct sk_buff *skb) +{ +#ifdef HAVE_PTP_1588_CLOCK + u32 flags = rx_ring->q_vector->adapter->flags; + +#endif + ixgbe_update_rsc_stats(rx_ring, skb); + +#ifdef NETIF_F_RXHASH + ixgbe_rx_hash(rx_ring, rx_desc, skb); + +#endif /* NETIF_F_RXHASH */ + ixgbe_rx_checksum(rx_ring, rx_desc, skb); +#ifdef HAVE_PTP_1588_CLOCK + if (unlikely(flags & IXGBE_FLAG_RX_HWTSTAMP_ENABLED)) + ixgbe_ptp_rx_hwtstamp(rx_ring, rx_desc, skb); + else + rx_ring->q_vector->ptp_hold_rx_skb = false; + +#endif + ixgbe_rx_vlan(rx_ring, rx_desc, skb); + + skb_record_rx_queue(skb, ring_queue_index(rx_ring)); + skb->protocol = eth_type_trans(skb, netdev_ring(rx_ring)); +} + +void ixgbe_rx_skb(struct ixgbe_q_vector *q_vector, + struct ixgbe_ring *rx_ring, + union ixgbe_adv_rx_desc *rx_desc, + struct sk_buff *skb) +{ +#ifdef HAVE_NDO_BUSY_POLL + skb_mark_napi_id(skb, &q_vector->napi); + + if (ixgbe_qv_busy_polling(q_vector) || q_vector->netpoll_rx) { + netif_receive_skb(skb); + /* exit early if we busy polled */ + return; + } +#endif + +#ifdef HAVE_VLAN_RX_REGISTER + ixgbe_receive_skb(q_vector, skb); +#else + napi_gro_receive(&q_vector->napi, skb); +#endif +#ifndef NETIF_F_GRO + + netdev_ring(rx_ring)->last_rx = jiffies; +#endif +} + +/** + * ixgbe_is_non_eop - Handle processing of non-EOP buffers + * @rx_ring: Rx ring being processed + * @rx_desc: Rx descriptor for the current buffer + * @skb: Current socket buffer containing the buffer in progress + * + * This function processes non-end-of-packet (non-EOP) buffers in the receive + * (Rx) ring. It updates the next-to-clean index and checks if the current + * buffer is an EOP buffer. If it is not an EOP buffer, the function chains + * the current skb to the next buffer and returns true, indicating that + * further processing is needed. If the buffer is an EOP buffer, the function + * returns false, indicating that no further chaining is required. + * + * Return: true if the buffer is non-EOP and requires chaining, false if it + * is an EOP buffer. + */ +static bool ixgbe_is_non_eop(struct ixgbe_ring *rx_ring, + union ixgbe_adv_rx_desc *rx_desc, + struct sk_buff *skb) +{ +#ifdef CONFIG_IXGBE_DISABLE_PACKET_SPLIT + struct sk_buff *next_skb; +#endif + u32 ntc = rx_ring->next_to_clean + 1; + + /* fetch, update, and store next to clean */ + ntc = (ntc < rx_ring->count) ? ntc : 0; + rx_ring->next_to_clean = ntc; + + prefetch(IXGBE_RX_DESC(rx_ring, ntc)); + + /* update RSC append count if present */ + if (ring_is_rsc_enabled(rx_ring)) { + __le32 rsc_enabled = rx_desc->wb.lower.lo_dword.data & + cpu_to_le32(IXGBE_RXDADV_RSCCNT_MASK); + + if (unlikely(rsc_enabled)) { + u32 rsc_cnt = le32_to_cpu(rsc_enabled); + + rsc_cnt >>= IXGBE_RXDADV_RSCCNT_SHIFT; + IXGBE_CB(skb)->append_cnt += rsc_cnt - 1; + + /* update ntc based on RSC value */ + ntc = le32_to_cpu(rx_desc->wb.upper.status_error); + ntc &= IXGBE_RXDADV_NEXTP_MASK; + ntc >>= IXGBE_RXDADV_NEXTP_SHIFT; + } + } + + /* if we are the last buffer then there is nothing else to do */ + if (likely(ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP))) + return false; + + /* place skb in next buffer to be received */ +#ifdef CONFIG_IXGBE_DISABLE_PACKET_SPLIT + next_skb = rx_ring->rx_buffer_info[ntc].skb; + + ixgbe_add_active_tail(skb, next_skb); + IXGBE_CB(next_skb)->head = skb; +#else + rx_ring->rx_buffer_info[ntc].skb = skb; +#endif + rx_ring->rx_stats.non_eop_descs++; + + return true; +} + +#ifndef CONFIG_IXGBE_DISABLE_PACKET_SPLIT +/** + * ixgbe_pull_tail - ixgbe specific version of skb_pull_tail + * @skb: pointer to current skb being adjusted + * + * This function is an ixgbe specific version of __pskb_pull_tail. The + * main difference between this version and the original function is that + * this function can make several assumptions about the state of things + * that allow for significant optimizations versus the standard function. + * As a result we can do things like drop a frag and maintain an accurate + * truesize for the skb. + */ +static void ixgbe_pull_tail(struct sk_buff *skb) +{ + skb_frag_t *frag = &skb_shinfo(skb)->frags[0]; + unsigned char *va; + unsigned int pull_len; + + /* + * it is valid to use page_address instead of kmap since we are + * working with pages allocated out of the lomem pool per + * alloc_page(GFP_ATOMIC) + */ + va = skb_frag_address(frag); + + /* + * we need the header to contain the greater of either ETH_HLEN or + * 60 bytes if the skb->len is less than 60 for skb_pad. + */ + pull_len = eth_get_headlen(skb->dev, va, IXGBE_RX_HDR_SIZE); + + /* align pull length to size of long to optimize memcpy performance */ + skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long))); + + /* update all of the pointers */ + skb_frag_size_sub(frag, pull_len); + skb_frag_off_add(frag, pull_len); + skb->data_len -= pull_len; + skb->tail += pull_len; +} + +/** + * ixgbe_dma_sync_frag - perform DMA sync for first frag of SKB + * @rx_ring: rx descriptor ring packet is being transacted on + * @skb: pointer to current skb being updated + * + * This function provides a basic DMA sync up for the first fragment of an + * skb. The reason for doing this is that the first fragment cannot be + * unmapped until we have reached the end of packet descriptor for a buffer + * chain. + */ +static void ixgbe_dma_sync_frag(struct ixgbe_ring *rx_ring, + struct sk_buff *skb) +{ +#if defined(HAVE_STRUCT_DMA_ATTRS) && defined(HAVE_SWIOTLB_SKIP_CPU_SYNC) + DEFINE_DMA_ATTRS(attrs); + + dma_set_attr(DMA_ATTR_SKIP_CPU_SYNC, &attrs); + dma_set_attr(DMA_ATTR_WEAK_ORDERING, &attrs); + +#endif + /* if the page was released unmap it, else just sync our portion */ + if (unlikely(IXGBE_CB(skb)->page_released)) { + dma_unmap_page_attrs(rx_ring->dev, IXGBE_CB(skb)->dma, + ixgbe_rx_pg_size(rx_ring), + DMA_FROM_DEVICE, +#if defined(HAVE_STRUCT_DMA_ATTRS) && defined(HAVE_SWIOTLB_SKIP_CPU_SYNC) + &attrs); +#else + IXGBE_RX_DMA_ATTR); +#endif + } else if (ring_uses_build_skb(rx_ring)) { + unsigned long offset = (unsigned long)(skb->data) & ~PAGE_MASK; + + dma_sync_single_range_for_cpu(rx_ring->dev, + IXGBE_CB(skb)->dma, + offset, + skb_headlen(skb), + DMA_FROM_DEVICE); + } else { + skb_frag_t *frag = &skb_shinfo(skb)->frags[0]; + + dma_sync_single_range_for_cpu(rx_ring->dev, + IXGBE_CB(skb)->dma, + skb_frag_off(frag), + skb_frag_size(frag), + DMA_FROM_DEVICE); + } +} + +/** + * ixgbe_cleanup_headers - Correct corrupted or empty headers + * @rx_ring: rx descriptor ring packet is being transacted on + * @rx_desc: pointer to the EOP Rx descriptor + * @skb: pointer to current skb being fixed + * + * Check if the skb is valid. In the XDP case it will be an error pointer. + * Return true in this case to abort processing and advance to next + * descriptor. + * + * Check for corrupted packet headers caused by senders on the local L2 + * embedded NIC switch not setting up their Tx Descriptors right. These + * should be very rare. + * + * Also address the case where we are pulling data in on pages only + * and as such no data is present in the skb header. + * + * In addition if skb is not at least 60 bytes we need to pad it so that + * it is large enough to qualify as a valid Ethernet frame. + * + * Returns true if an error was encountered and skb was freed. + */ +bool ixgbe_cleanup_headers(struct ixgbe_ring __maybe_unused *rx_ring, + union ixgbe_adv_rx_desc *rx_desc, + struct sk_buff *skb) +{ + /* XDP packets use error pointer so abort at this point */ + if (IS_ERR(skb)) + return true; + + /* verify that the packet does not have any known errors */ + if (unlikely(ixgbe_test_staterr(rx_desc, + IXGBE_RXDADV_ERR_FRAME_ERR_MASK))) { + dev_kfree_skb_any(skb); + return true; + } + + /* place header in linear portion of buffer */ + if (!skb_headlen(skb)) + ixgbe_pull_tail(skb); + +#if IS_ENABLED(CONFIG_FCOE) + /* do not attempt to pad FCoE Frames as this will disrupt DDP */ + if (ixgbe_rx_is_fcoe(rx_ring, rx_desc)) + return false; +#endif + + /* if eth_skb_pad returns an error the skb was freed */ + if (eth_skb_pad(skb)) + return true; + + return false; +} + +/** + * ixgbe_reuse_rx_page - Reuse a page buffer and store it back on the ring + * @rx_ring: Rx descriptor ring to store buffers on + * @old_buff: Donor buffer whose page is to be reused + * + * This function reuses a page buffer from an old Rx buffer and stores it + * back on the Rx ring for future use. It updates the next-to-allocate index + * and transfers the page-related information from the old buffer to a new + * buffer. Each member is moved individually to avoid store forwarding stalls + * and unnecessary copying of the socket buffer (skb). + */ +static void ixgbe_reuse_rx_page(struct ixgbe_ring *rx_ring, + struct ixgbe_rx_buffer *old_buff) +{ + struct ixgbe_rx_buffer *new_buff; + u16 nta = rx_ring->next_to_alloc; + + new_buff = &rx_ring->rx_buffer_info[nta]; + + /* update, and store next to alloc */ + nta++; + rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0; + + /* Transfer page from old buffer to new buffer. + * Move each member individually to avoid possible store + * forwarding stalls and unnecessary copy of skb. + */ + new_buff->dma = old_buff->dma; + new_buff->page = old_buff->page; + new_buff->page_offset = old_buff->page_offset; + new_buff->pagecnt_bias = old_buff->pagecnt_bias; +} + +static inline bool ixgbe_page_is_reserved(struct page *page) +{ + return (page_to_nid(page) != numa_mem_id()) || page_is_pfmemalloc(page); +} + +static bool ixgbe_can_reuse_rx_page(struct ixgbe_rx_buffer *rx_buffer) +{ + unsigned int pagecnt_bias = rx_buffer->pagecnt_bias; + struct page *page = rx_buffer->page; + + /* avoid re-using remote pages */ + if (unlikely(ixgbe_page_is_reserved(page))) + return false; + +#if (PAGE_SIZE < 8192) + /* if we are only owner of page we can reuse it */ +#ifdef HAVE_PAGE_COUNT_BULK_UPDATE + if (unlikely((page_ref_count(page) - pagecnt_bias) > 1)) +#else + if (unlikely((page_count(page) - pagecnt_bias) > 1)) +#endif + return false; +#else + /* The last offset is a bit aggressive in that we assume the + * worst case of FCoE being enabled and using a 3K buffer. + * However this should have minimal impact as the 1K extra is + * still less than one buffer in size. + */ +#define IXGBE_LAST_OFFSET \ + (SKB_WITH_OVERHEAD(PAGE_SIZE) - IXGBE_RXBUFFER_3K) + if (rx_buffer->page_offset > IXGBE_LAST_OFFSET) + return false; +#endif + +#ifdef HAVE_PAGE_COUNT_BULK_UPDATE + /* If we have drained the page fragment pool we need to update + * the pagecnt_bias and page count so that we fully restock the + * number of references the driver holds. + */ + if (unlikely(pagecnt_bias == 1)) { + page_ref_add(page, USHRT_MAX - 1); + rx_buffer->pagecnt_bias = USHRT_MAX; + } +#else + /* Even if we own the page, we are not allowed to use atomic_set() + * This would break get_page_unless_zero() users. + */ + if (likely(!pagecnt_bias)) { + page_ref_inc(page); + rx_buffer->pagecnt_bias = 1; + } +#endif + + return true; +} + +/** + * ixgbe_add_rx_frag - Add contents of Rx buffer to sk_buff + * @rx_ring: Rx descriptor ring to transact packets on + * @rx_buffer: Buffer containing the page to add + * @skb: sk_buff to place the data into + * @size: Size of the data + * + * This function adds the data contained in `rx_buffer->page` to the socket + * buffer (skb). If the data size is less than the skb header size, it is + * directly copied; otherwise, the page is attached as a fragment to the skb. + * The function updates the page offset as necessary and prepares the buffer + * for potential reuse by the adapter. + */ +static void ixgbe_add_rx_frag(struct ixgbe_ring *rx_ring, + struct ixgbe_rx_buffer *rx_buffer, + struct sk_buff *skb, + unsigned int size) +{ +#if (PAGE_SIZE < 8192) + unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2; +#else + unsigned int truesize = rx_ring->rx_offset ? + SKB_DATA_ALIGN(rx_ring->rx_offset + size) : + SKB_DATA_ALIGN(size); +#endif + + skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, rx_buffer->page, + rx_buffer->page_offset, size, truesize); + +#if (PAGE_SIZE < 8192) + rx_buffer->page_offset ^= truesize; +#else + rx_buffer->page_offset += truesize; +#endif +} + +static struct ixgbe_rx_buffer * +ixgbe_get_rx_buffer(struct ixgbe_ring *rx_ring, + union ixgbe_adv_rx_desc *rx_desc, struct sk_buff **skb, + const unsigned int size) +{ + struct ixgbe_rx_buffer *rx_buffer; + + rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean]; + prefetchw(rx_buffer->page); + *skb = rx_buffer->skb; + + /* Delay unmapping of the first packet. It carries the header + * information, HW may still access the header after the writeback. + * Only unmap it when EOP is reached + */ + if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)) { + if (!*skb) + goto skip_sync; + } else { + if (*skb) + ixgbe_dma_sync_frag(rx_ring, *skb); + } + + /* we are reusing so sync this buffer for CPU use */ + dma_sync_single_range_for_cpu(rx_ring->dev, + rx_buffer->dma, + rx_buffer->page_offset, + size, + DMA_FROM_DEVICE); +skip_sync: + rx_buffer->pagecnt_bias--; + + return rx_buffer; +} + +static void ixgbe_put_rx_buffer(struct ixgbe_ring *rx_ring, + struct ixgbe_rx_buffer *rx_buffer, + struct sk_buff *skb) +{ +#if defined(HAVE_STRUCT_DMA_ATTRS) && defined(HAVE_SWIOTLB_SKIP_CPU_SYNC) + DEFINE_DMA_ATTRS(attrs); + + dma_set_attr(DMA_ATTR_SKIP_CPU_SYNC, &attrs); + dma_set_attr(DMA_ATTR_WEAK_ORDERING, &attrs); + +#endif + if (ixgbe_can_reuse_rx_page(rx_buffer)) { + /* hand second half of page back to the ring */ + ixgbe_reuse_rx_page(rx_ring, rx_buffer); + } else { + if (!IS_ERR(skb) && IXGBE_CB(skb)->dma == rx_buffer->dma) { + /* the page has been released from the ring */ + IXGBE_CB(skb)->page_released = true; + } else { + /* we are not reusing the buffer so unmap it */ + dma_unmap_page_attrs(rx_ring->dev, rx_buffer->dma, + ixgbe_rx_pg_size(rx_ring), + DMA_FROM_DEVICE, +#if defined(HAVE_STRUCT_DMA_ATTRS) && defined(HAVE_SWIOTLB_SKIP_CPU_SYNC) + &attrs); +#else + IXGBE_RX_DMA_ATTR); +#endif + } + __page_frag_cache_drain(rx_buffer->page, + rx_buffer->pagecnt_bias); + } + + /* clear contents of rx_buffer */ + rx_buffer->page = NULL; + rx_buffer->skb = NULL; +} + +static struct sk_buff *ixgbe_construct_skb(struct ixgbe_ring *rx_ring, + struct ixgbe_rx_buffer *rx_buffer, + struct xdp_buff *xdp, + union ixgbe_adv_rx_desc *rx_desc) +{ + unsigned int size = xdp->data_end - xdp->data; +#if (PAGE_SIZE < 8192) + unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2; +#else + unsigned int truesize = SKB_DATA_ALIGN(xdp->data_end - + xdp->data_hard_start); +#endif + struct sk_buff *skb; + + /* prefetch first cache line of first page */ + prefetch(xdp->data); +#if L1_CACHE_BYTES < 128 + prefetch(xdp->data + L1_CACHE_BYTES); +#endif + /* Note, we get here by enabling legacy-rx via: + * + * ethtool --set-priv-flags legacy-rx on + * + * In this mode, we currently get 0 extra XDP headroom as + * opposed to having legacy-rx off, where we process XDP + * packets going to stack via ixgbe_build_skb(). The latter + * provides us currently with 192 bytes of headroom. + * + * For ixgbe_construct_skb() mode it means that the + * xdp->data_meta will always point to xdp->data, since + * the helper cannot expand the head. Should this ever + * change in future for legacy-rx mode on, then lets also + * add xdp->data_meta handling here. + */ + + /* allocate a skb to store the frags */ + skb = napi_alloc_skb(&rx_ring->q_vector->napi, IXGBE_RX_HDR_SIZE); + if (unlikely(!skb)) + return NULL; + + if (size > IXGBE_RX_HDR_SIZE) { + if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)) + IXGBE_CB(skb)->dma = rx_buffer->dma; + + skb_add_rx_frag(skb, 0, rx_buffer->page, + xdp->data - page_address(rx_buffer->page), + size, truesize); +#if (PAGE_SIZE < 8192) + rx_buffer->page_offset ^= truesize; +#else + rx_buffer->page_offset += truesize; +#endif + } else { + memcpy(__skb_put(skb, size), + xdp->data, ALIGN(size, sizeof(long))); + rx_buffer->pagecnt_bias++; + } + + return skb; +} + +#ifdef HAVE_SWIOTLB_SKIP_CPU_SYNC +static struct sk_buff *ixgbe_build_skb(struct ixgbe_ring *rx_ring, + struct ixgbe_rx_buffer *rx_buffer, + struct xdp_buff *xdp, + union ixgbe_adv_rx_desc *rx_desc) +{ +#ifdef HAVE_XDP_BUFF_DATA_META + unsigned int metasize = xdp->data - xdp->data_meta; + void *va = xdp->data_meta; +#else + void *va = xdp->data; +#endif +#if (PAGE_SIZE < 8192) + unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2; +#else + unsigned int truesize = SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) + + SKB_DATA_ALIGN(xdp->data_end - + xdp->data_hard_start); +#endif + struct sk_buff *skb; + + /* prefetch first cache line of first page */ + prefetch(va); +#if L1_CACHE_BYTES < 128 + prefetch(va + L1_CACHE_BYTES); +#endif + + /* build an skb around the page buffer */ + skb = napi_build_skb(xdp->data_hard_start, truesize); + if (unlikely(!skb)) + return NULL; + + /* update pointers within the skb to store the data */ + skb_reserve(skb, xdp->data - xdp->data_hard_start); + __skb_put(skb, xdp->data_end - xdp->data); +#ifdef HAVE_XDP_BUFF_DATA_META + if (metasize) + skb_metadata_set(skb, metasize); +#endif + + /* record DMA address if this is the start of a chain of buffers */ + if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)) + IXGBE_CB(skb)->dma = rx_buffer->dma; + + /* update buffer offset */ +#if (PAGE_SIZE < 8192) + rx_buffer->page_offset ^= truesize; +#else + rx_buffer->page_offset += truesize; +#endif + + return skb; +} + +#endif /* HAVE_SWIOTLB_SKIP_CPU_SYNC */ + +static struct sk_buff * +ixgbe_run_xdp(struct ixgbe_adapter __maybe_unused *adapter, + struct ixgbe_ring __maybe_unused *rx_ring, + struct xdp_buff __maybe_unused *xdp) +{ + int result = IXGBE_XDP_PASS; +#ifdef HAVE_XDP_SUPPORT + struct bpf_prog *xdp_prog; + struct ixgbe_ring *ring; +#ifdef HAVE_XDP_FRAME_STRUCT + struct xdp_frame *xdpf; +#endif + int err; + u32 act; + + rcu_read_lock(); + xdp_prog = READ_ONCE(rx_ring->xdp_prog); + + if (!xdp_prog) + goto xdp_out; + +#ifdef HAVE_XDP_FRAME_STRUCT + prefetchw(xdp->data_hard_start); /* xdp_frame write */ +#endif + + act = bpf_prog_run_xdp(xdp_prog, xdp); + switch (act) { + case XDP_PASS: + break; + case XDP_TX: +#ifdef HAVE_XDP_FRAME_STRUCT + xdpf = xdp_convert_buff_to_frame(xdp); + if (unlikely(!xdpf)) { + result = IXGBE_XDP_CONSUMED; + break; + } +#endif + + ring = ixgbe_determine_xdp_ring(adapter); + if (static_branch_unlikely(&ixgbe_xdp_locking_key)) + spin_lock(&ring->tx_lock); +#ifdef HAVE_XDP_FRAME_STRUCT + result = ixgbe_xmit_xdp_ring(ring, xdpf); +#else + result = ixgbe_xmit_xdp_ring(ring, xdp); +#endif + if (static_branch_unlikely(&ixgbe_xdp_locking_key)) + spin_unlock(&ring->tx_lock); + + break; + case XDP_REDIRECT: + err = xdp_do_redirect(adapter->netdev, xdp, xdp_prog); + if (!err) { + result = IXGBE_XDP_REDIR; + } else { + result = IXGBE_XDP_CONSUMED; + } + break; + default: + bpf_warn_invalid_xdp_action(rx_ring->netdev, xdp_prog, act); + fallthrough; + case XDP_ABORTED: + trace_xdp_exception(rx_ring->netdev, xdp_prog, act); + /* fallthrough -- handle aborts by dropping packet */ + fallthrough; + case XDP_DROP: + result = IXGBE_XDP_CONSUMED; + break; + } +xdp_out: + rcu_read_unlock(); +#endif /* HAVE_XDP_SUPPORT */ + + return ERR_PTR(-result); +} + +static unsigned int ixgbe_rx_frame_truesize(struct ixgbe_ring *rx_ring, + unsigned int size) +{ + unsigned int truesize; + +#if (PAGE_SIZE < 8192) + truesize = ixgbe_rx_pg_size(rx_ring) / 2; +#else + truesize = rx_ring->rx_offset ? + SKB_DATA_ALIGN(rx_ring->rx_offset + size) +#ifdef HAVE_XDP_BUFF_FRAME_SZ + + SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) +#endif + : SKB_DATA_ALIGN(size); +#endif + return truesize; +} + +static void ixgbe_rx_buffer_flip(struct ixgbe_ring *rx_ring, + struct ixgbe_rx_buffer *rx_buffer, + unsigned int size) +{ + unsigned int truesize = ixgbe_rx_frame_truesize(rx_ring, size); + +#if (PAGE_SIZE < 8192) + rx_buffer->page_offset ^= truesize; +#else + rx_buffer->page_offset += truesize; +#endif +} + +/** + * ixgbe_clean_rx_irq - Clean completed descriptors from Rx ring + * @q_vector: Structure containing interrupt and ring information + * @rx_ring: Rx descriptor ring to transact packets on + * @budget: Total limit on the number of packets to process + * + * This function processes completed descriptors from the Rx ring using a + * "bounce buffer" approach, which helps avoid IOMMU overhead by maintaining + * page mappings. It retrieves packets, processes them for checksum, VLAN, + * and protocol, and passes them up the network stack. The function also + * handles XDP processing and updates statistics for the number of packets + * and bytes processed. + * + * Return: The number of packets processed. + */ +static int ixgbe_clean_rx_irq(struct ixgbe_q_vector *q_vector, + struct ixgbe_ring *rx_ring, + int budget) +{ + unsigned int total_rx_bytes = 0; + int total_rx_packets = 0; + struct ixgbe_adapter *adapter = q_vector->adapter; +#if IS_ENABLED(CONFIG_FCOE) + int ddp_bytes; + unsigned int mss = 0; +#endif /* CONFIG_FCOE */ + u16 cleaned_count = ixgbe_desc_unused(rx_ring); + unsigned int offset = rx_ring->rx_offset; + unsigned int xdp_xmit = 0; + struct xdp_buff xdp; + + xdp.data = NULL; + xdp.data_end = NULL; +#ifdef HAVE_XDP_BUFF_RXQ + xdp.rxq = &rx_ring->xdp_rxq; +#endif + +#ifdef HAVE_XDP_BUFF_FRAME_SZ + /* Frame size depend on rx_ring setup when PAGE_SIZE=4K */ +#if (PAGE_SIZE < 8192) + xdp.frame_sz = ixgbe_rx_frame_truesize(rx_ring, 0); +#endif +#endif + + while (likely(total_rx_packets < budget)) { + union ixgbe_adv_rx_desc *rx_desc; + struct ixgbe_rx_buffer *rx_buffer; + struct sk_buff *skb; + unsigned int size; + + /* return some buffers to hardware, one at a time is too slow */ + if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) { + ixgbe_alloc_rx_buffers(rx_ring, cleaned_count); + cleaned_count = 0; + } + + rx_desc = IXGBE_RX_DESC(rx_ring, rx_ring->next_to_clean); + size = le16_to_cpu(rx_desc->wb.upper.length); + if (!size) + break; + + /* This memory barrier is needed to keep us from reading + * any other fields out of the rx_desc until we know the + * descriptor has been written back + */ + dma_rmb(); + + rx_buffer = ixgbe_get_rx_buffer(rx_ring, rx_desc, &skb, size); + + /* retrieve a buffer from the ring */ + if (!skb) { + xdp.data = page_address(rx_buffer->page) + + rx_buffer->page_offset; +#ifdef HAVE_XDP_BUFF_DATA_META + xdp.data_meta = xdp.data; +#endif + xdp.data_hard_start = xdp.data - offset; + xdp.data_end = xdp.data + size; + +#ifdef HAVE_XDP_BUFF_FRAME_SZ +#if (PAGE_SIZE > 4096) + /* At larger PAGE_SIZE, frame_sz depend on len size */ + xdp.frame_sz = ixgbe_rx_frame_truesize(rx_ring, size); +#endif +#endif + skb = ixgbe_run_xdp(adapter, rx_ring, &xdp); + } + + if (IS_ERR(skb)) { + unsigned int xdp_res = -PTR_ERR(skb); + + if (xdp_res & (IXGBE_XDP_TX | IXGBE_XDP_REDIR)) { + xdp_xmit |= xdp_res; + ixgbe_rx_buffer_flip(rx_ring, rx_buffer, size); + } else { + rx_buffer->pagecnt_bias++; + } + total_rx_packets++; + total_rx_bytes += size; + } else if (skb) { + ixgbe_add_rx_frag(rx_ring, rx_buffer, skb, size); +#ifdef HAVE_SWIOTLB_SKIP_CPU_SYNC + } else if (ring_uses_build_skb(rx_ring)) { + skb = ixgbe_build_skb(rx_ring, rx_buffer, + &xdp, rx_desc); +#endif + } else { + skb = ixgbe_construct_skb(rx_ring, rx_buffer, + &xdp, rx_desc); + } + + /* exit if we failed to retrieve a buffer */ + if (!skb) { + rx_ring->rx_stats.alloc_rx_buff_failed++; + rx_buffer->pagecnt_bias++; + break; + } + + ixgbe_put_rx_buffer(rx_ring, rx_buffer, skb); + cleaned_count++; + + /* place incomplete frames back on ring for completion */ + if (ixgbe_is_non_eop(rx_ring, rx_desc, skb)) + continue; + + /* verify the packet layout is correct */ + if (ixgbe_cleanup_headers(rx_ring, rx_desc, skb)) + continue; + + /* probably a little skewed due to removing CRC */ + total_rx_bytes += skb->len; + + /* populate checksum, timestamp, VLAN, and protocol */ + ixgbe_process_skb_fields(rx_ring, rx_desc, skb); + +#if IS_ENABLED(CONFIG_FCOE) + /* if ddp, not passing to ULD unless for FCP_RSP or error */ + if (ixgbe_rx_is_fcoe(rx_ring, rx_desc)) { + ddp_bytes = ixgbe_fcoe_ddp(q_vector->adapter, + rx_desc, skb); + /* include DDPed FCoE data */ + if (ddp_bytes > 0) { + if (!mss) { + mss = netdev_ring(rx_ring)->mtu - + sizeof(struct fcoe_hdr) - + sizeof(struct fc_frame_header) - + sizeof(struct fcoe_crc_eof); + if (mss > 512) + mss &= ~511; + } + total_rx_bytes += ddp_bytes; + total_rx_packets += (mss >= TCP_MIN_MSS) ? + (int)DIV_ROUND_UP((u64)ddp_bytes, mss): + 1U; + } + if (!ddp_bytes) { + dev_kfree_skb_any(skb); +#ifndef NETIF_F_GRO + netdev_ring(rx_ring)->last_rx = jiffies; +#endif + continue; + } + } +#endif /* CONFIG_FCOE */ + +#ifdef HAVE_PTP_1588_CLOCK + if (likely(!q_vector->ptp_hold_rx_skb)) { + ixgbe_rx_skb(q_vector, rx_ring, rx_desc, skb); + + /* update budget accounting */ + total_rx_packets++; + } else { + q_vector->ptp_hold_rx_skb = false; + } +#else /* !HAVE_PTP_1588_CLOCK */ + ixgbe_rx_skb(q_vector, rx_ring, rx_desc, skb); + + /* update budget accounting */ + total_rx_packets++; +#endif /* HAVE_PTP_1588_CLOCK */ + } + + if (xdp_xmit & IXGBE_XDP_REDIR) + xdp_do_flush(); + + if (xdp_xmit & IXGBE_XDP_TX) { + struct ixgbe_ring *ring = ixgbe_determine_xdp_ring(adapter); + + ixgbe_xdp_ring_update_tail_locked(ring); + } + + u64_stats_update_begin(&rx_ring->syncp); + rx_ring->stats.packets += total_rx_packets; + rx_ring->stats.bytes += total_rx_bytes; + u64_stats_update_end(&rx_ring->syncp); + q_vector->rx.total_packets += total_rx_packets; + q_vector->rx.total_bytes += total_rx_bytes; + + return total_rx_packets; +} + +#else /* CONFIG_IXGBE_DISABLE_PACKET_SPLIT */ +/** + * ixgbe_clean_rx_irq - Clean completed descriptors from Rx ring - legacy + * @q_vector: structure containing interrupt and ring information + * @rx_ring: rx descriptor ring to transact packets on + * @budget: Total limit on number of packets to process + * + * This function provides a legacy approach to Rx interrupt + * handling. This version will perform better on systems with a low cost + * dma mapping API. + * + * Returns amount of work completed. + **/ +static int ixgbe_clean_rx_irq(struct ixgbe_q_vector *q_vector, + struct ixgbe_ring *rx_ring, + int budget) +{ + unsigned int total_rx_bytes = 0; + int total_rx_packets = 0; +#if IS_ENABLED(CONFIG_FCOE) + int ddp_bytes; + unsigned int mss = 0; +#endif /* CONFIG_FCOE */ + u16 len = 0; + u16 cleaned_count = ixgbe_desc_unused(rx_ring); + + while (likely(total_rx_packets < budget)) { + struct ixgbe_rx_buffer *rx_buffer; + union ixgbe_adv_rx_desc *rx_desc; + struct sk_buff *skb; + u16 ntc; + + /* return some buffers to hardware, one at a time is too slow */ + if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) { + ixgbe_alloc_rx_buffers(rx_ring, cleaned_count); + cleaned_count = 0; + } + + ntc = rx_ring->next_to_clean; + rx_desc = IXGBE_RX_DESC(rx_ring, ntc); + rx_buffer = &rx_ring->rx_buffer_info[ntc]; + + if (!rx_desc->wb.upper.length) + break; + + /* This memory barrier is needed to keep us from reading + * any other fields out of the rx_desc until we know the + * descriptor has been written back + */ + dma_rmb(); + + skb = rx_buffer->skb; + + prefetch(skb->data); + + len = le16_to_cpu(rx_desc->wb.upper.length); + /* pull the header of the skb in */ + __skb_put(skb, len); + + /* + * Delay unmapping of the first packet. It carries the + * header information, HW may still access the header after + * the writeback. Only unmap it when EOP is reached + */ + if (!IXGBE_CB(skb)->head) { + IXGBE_CB(skb)->dma = rx_buffer->dma; + } else { + skb = ixgbe_merge_active_tail(skb); + dma_unmap_single(rx_ring->dev, + rx_buffer->dma, + rx_ring->rx_buf_len, + DMA_FROM_DEVICE); + } + + /* clear skb reference in buffer info structure */ + rx_buffer->skb = NULL; + rx_buffer->dma = 0; + + cleaned_count++; + + if (ixgbe_is_non_eop(rx_ring, rx_desc, skb)) + continue; + + dma_unmap_single(rx_ring->dev, + IXGBE_CB(skb)->dma, + rx_ring->rx_buf_len, + DMA_FROM_DEVICE); + + IXGBE_CB(skb)->dma = 0; + + if (ixgbe_close_active_frag_list(skb) && + !IXGBE_CB(skb)->append_cnt) { + /* if we got here without RSC the packet is invalid */ + dev_kfree_skb_any(skb); + continue; + } + + /* ERR_MASK will only have valid bits if EOP set */ + if (unlikely(ixgbe_test_staterr(rx_desc, + IXGBE_RXDADV_ERR_FRAME_ERR_MASK))) { + dev_kfree_skb_any(skb); + continue; + } + + /* probably a little skewed due to removing CRC */ + total_rx_bytes += skb->len; + + /* populate checksum, timestamp, VLAN, and protocol */ + ixgbe_process_skb_fields(rx_ring, rx_desc, skb); + +#if IS_ENABLED(CONFIG_FCOE) + /* if ddp, not passing to ULD unless for FCP_RSP or error */ + if (ixgbe_rx_is_fcoe(rx_ring, rx_desc)) { + ddp_bytes = ixgbe_fcoe_ddp(q_vector->adapter, + rx_desc, skb); + /* include DDPed FCoE data */ + if (ddp_bytes > 0) { + if (!mss) { + mss = netdev_ring(rx_ring)->mtu - + sizeof(struct fcoe_hdr) - + sizeof(struct fc_frame_header) - + sizeof(struct fcoe_crc_eof); + if (mss > 512) + mss &= ~511; + } + total_rx_bytes += ddp_bytes; + total_rx_packets += (mss >= TCP_MIN_MSS) ? + (int)DIV_ROUND_UP((u64)ddp_bytes, mss): + 1U; + } + if (!ddp_bytes) { + dev_kfree_skb_any(skb); +#ifndef NETIF_F_GRO + netdev_ring(rx_ring)->last_rx = jiffies; +#endif + continue; + } + } + +#endif /* CONFIG_FCOE */ + ixgbe_rx_skb(q_vector, rx_ring, rx_desc, skb); + + /* update budget accounting */ + total_rx_packets++; + } + + rx_ring->stats.packets += total_rx_packets; + rx_ring->stats.bytes += total_rx_bytes; + q_vector->rx.total_packets += total_rx_packets; + q_vector->rx.total_bytes += total_rx_bytes; + + if (cleaned_count) + ixgbe_alloc_rx_buffers(rx_ring, cleaned_count); + + return total_rx_packets; +} + +#endif /* CONFIG_IXGBE_DISABLE_PACKET_SPLIT */ +#ifdef HAVE_NDO_BUSY_POLL +/** + * ixgbe_busy_poll_recv - Perform busy polling on RX rings + * @napi: NAPI structure associated with the RX queue vector + * + * This function performs busy polling on the receive (RX) rings of the network + * device. It processes incoming packets by cleaning the RX interrupt requests + * and returns the number of packets processed. The function must be called with + * local bottom halves disabled (`local_bh_disable()`). + * + * Return: The number of packets processed, or a negative error code if the + * device is down or busy. + */ +static int ixgbe_busy_poll_recv(struct napi_struct *napi) +{ + struct ixgbe_q_vector *q_vector = + container_of(napi, struct ixgbe_q_vector, napi); + struct ixgbe_adapter *adapter = q_vector->adapter; + struct ixgbe_ring *ring; + int found = 0; + + if (test_bit(__IXGBE_DOWN, adapter->state)) + return LL_FLUSH_FAILED; + + if (!ixgbe_qv_lock_poll(q_vector)) + return LL_FLUSH_BUSY; + + ixgbe_for_each_ring(ring, q_vector->rx) { + found = ixgbe_clean_rx_irq(q_vector, ring, 4); +#ifdef BP_EXTENDED_STATS + if (found) + ring->stats.cleaned += found; + else + ring->stats.misses++; +#endif + if (found) + break; + } + + ixgbe_qv_unlock_poll(q_vector); + + return found; +} + +#endif /* HAVE_NDO_BUSY_POLL */ +/** + * ixgbe_configure_msix - Configure MSI-X hardware + * @adapter: board private structure + * + * ixgbe_configure_msix sets up the hardware to properly generate MSI-X + * interrupts. + **/ +static void ixgbe_configure_msix(struct ixgbe_adapter *adapter) +{ + int v_idx; + u32 mask; + + /* Populate MSIX to EITR Select */ + if (adapter->num_vfs >= 32) { + u32 eitrsel = (1 << (adapter->num_vfs - 32)) - 1; + IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, eitrsel); + } + + /* + * Populate the IVAR table and set the ITR values to the + * corresponding register. + */ + for (v_idx = 0; v_idx < adapter->num_q_vectors; v_idx++) { + struct ixgbe_q_vector *q_vector = adapter->q_vector[v_idx]; + struct ixgbe_ring *ring; + + ixgbe_for_each_ring(ring, q_vector->rx) + ixgbe_set_ivar(adapter, 0, ring->reg_idx, v_idx); + + ixgbe_for_each_ring(ring, q_vector->tx) + ixgbe_set_ivar(adapter, 1, ring->reg_idx, v_idx); + + ixgbe_write_eitr(q_vector); + } + + switch (adapter->hw.mac.type) { + case ixgbe_mac_82598EB: + ixgbe_set_ivar(adapter, -1, IXGBE_IVAR_OTHER_CAUSES_INDEX, + v_idx); + break; + case ixgbe_mac_82599EB: + case ixgbe_mac_X540: + case ixgbe_mac_X550: + case ixgbe_mac_X550EM_x: + case ixgbe_mac_X550EM_a: + case ixgbe_mac_E610: + ixgbe_set_ivar(adapter, -1, 1, v_idx); + break; + default: + break; + } + IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx), 1950); + + /* set up to autoclear timer, and the vectors */ + mask = IXGBE_EIMS_ENABLE_MASK; + mask &= ~(IXGBE_EIMS_OTHER | + IXGBE_EIMS_MAILBOX | + IXGBE_EIMS_LSC); + if (ixgbe_is_mac_E6xx(adapter->hw.mac.type)) + mask &= ~IXGBE_EIMS_FW_EVENT; + + IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, mask); +} + +static inline bool ixgbe_container_is_rx(struct ixgbe_q_vector *q_vector, + struct ixgbe_ring_container *rc) +{ + return &q_vector->rx == rc; +} + +/** + * ixgbe_update_itr - update the dynamic ITR value based on statistics + * @q_vector: structure containing interrupt and ring information + * @ring_container: structure containing ring performance data + * + * Stores a new ITR value based on packets and byte + * counts during the last interrupt. The advantage of per interrupt + * computation is faster updates and more accurate ITR for the current + * traffic pattern. Constants in this function were computed + * based on theoretical maximum wire speed and thresholds were set based + * on testing data as well as attempting to minimize response time + * while increasing bulk throughput. + **/ +static void ixgbe_update_itr(struct ixgbe_q_vector *q_vector, + struct ixgbe_ring_container *ring_container) +{ + unsigned int itr = IXGBE_ITR_ADAPTIVE_MIN_USECS | + IXGBE_ITR_ADAPTIVE_LATENCY; + unsigned int avg_wire_size, packets, bytes; + unsigned long next_update = jiffies; + + /* If we don't have any rings just leave ourselves set for maximum + * possible latency so we take ourselves out of the equation. + */ + if (!ring_container->ring) + return; + + /* If we didn't update within up to 1 - 2 jiffies we can assume + * that either packets are coming in so slow there hasn't been + * any work, or that there is so much work that NAPI is dealing + * with interrupt moderation and we don't need to do anything. + */ + if (time_after(next_update, ring_container->next_update)) + goto clear_counts; + + packets = ring_container->total_packets; + bytes = ring_container->total_bytes; + + if (ixgbe_container_is_rx(q_vector, ring_container)) { + /* If Rx and there are 1 to 23 packets and bytes are less than + * 12112 assume insufficient data to use bulk rate limiting + * approach. Instead we will focus on simply trying to target + * receiving 8 times as much data in the next interrupt. + */ + if (packets && packets < 24 && bytes < 12112) { + itr = IXGBE_ITR_ADAPTIVE_LATENCY; + avg_wire_size = (bytes + packets * 24) * 2; + avg_wire_size = clamp_t(unsigned int, + avg_wire_size, 2560, 12800); + goto adjust_for_speed; + } + } + + /* Less than 48 packets we can assume that our current interrupt delay + * is only slightly too low. As such we should increase it by a small + * fixed amount. + */ + if (packets < 48) { + itr = (q_vector->itr >> 2) + IXGBE_ITR_ADAPTIVE_MIN_INC; + if (itr > IXGBE_ITR_ADAPTIVE_MAX_USECS) + itr = IXGBE_ITR_ADAPTIVE_MAX_USECS; + + /* If sample size is 0 - 7 we should probably switch + * to latency mode instead of trying to control + * things as though we are in bulk. + * + * Otherwise if the number of packets is less than 48 + * we should maintain whatever mode we are currently + * in. The range between 8 and 48 is the cross-over + * point between latency and bulk traffic. + */ + if (packets < 8) + itr += IXGBE_ITR_ADAPTIVE_LATENCY; + else + itr += ring_container->itr & IXGBE_ITR_ADAPTIVE_LATENCY; + goto clear_counts; + } + + /* Between 48 and 96 is our "goldilocks" zone where we are working + * out "just right". Just report that our current ITR is good for us. + */ + if (packets < 96) { + itr = q_vector->itr >> 2; + goto clear_counts; + } + + /* If packet count is 96 or greater we are likely looking at a slight + * overrun of the delay we want. Try halving our delay to see if that + * will cut the number of packets in half per interrupt. + */ + if (packets < 256) { + itr = q_vector->itr >> 3; + if (itr < IXGBE_ITR_ADAPTIVE_MIN_USECS) + itr = IXGBE_ITR_ADAPTIVE_MIN_USECS; + goto clear_counts; + } + + /* The paths below assume we are dealing with a bulk ITR since number + * of packets is 256 or greater. We are just going to have to compute + * a value and try to bring the count under control, though for smaller + * packet sizes there isn't much we can do as NAPI polling will likely + * be kicking in sooner rather than later. + */ + itr = IXGBE_ITR_ADAPTIVE_BULK; + + /* If packet counts are 256 or greater we can assume we have a gross + * overestimation of what the rate should be. Instead of trying to fine + * tune it just use the formula below to try and dial in an exact value + * give the current packet size of the frame. + */ + avg_wire_size = bytes / packets; + + /* The following is a crude approximation of: + * wmem_default / (size + overhead) = desired_pkts_per_int + * rate / bits_per_byte / (size + ethernet overhead) = pkt_rate + * (desired_pkt_rate / pkt_rate) * usecs_per_sec = ITR value + * + * Assuming wmem_default is 212992 and overhead is 640 bytes per + * packet, (256 skb, 64 headroom, 320 shared info), we can reduce the + * formula down to + * + * (170 * (size + 24)) / (size + 640) = ITR + * + * We first do some math on the packet size and then finally bitshift + * by 8 after rounding up. We also have to account for PCIe link speed + * difference as ITR scales based on this. + */ + if (avg_wire_size <= 60) { + /* Start at 50k ints/sec */ + avg_wire_size = 5120; + } else if (avg_wire_size <= 316) { + /* 50K ints/sec to 16K ints/sec */ + avg_wire_size *= 40; + avg_wire_size += 2720; + } else if (avg_wire_size <= 1084) { + /* 16K ints/sec to 9.2K ints/sec */ + avg_wire_size *= 15; + avg_wire_size += 11452; + } else if (avg_wire_size <= 1980) { + /* 9.2K ints/sec to 8K ints/sec */ + avg_wire_size *= 5; + avg_wire_size += 22420; + } else { + /* plateau at a limit of 8K ints/sec */ + avg_wire_size = 32256; + } + +adjust_for_speed: + /* Resultant value is 256 times larger than it needs to be. This + * gives us room to adjust the value as needed to either increase + * or decrease the value based on link speeds of 10G, 2.5G, 1G, etc. + * + * Use addition as we have already recorded the new latency flag + * for the ITR value. + */ + switch (q_vector->adapter->link_speed) { + case IXGBE_LINK_SPEED_10GB_FULL: + case IXGBE_LINK_SPEED_100_FULL: + default: + itr += DIV_ROUND_UP(avg_wire_size, + IXGBE_ITR_ADAPTIVE_MIN_INC * 256) * + IXGBE_ITR_ADAPTIVE_MIN_INC; + break; + case IXGBE_LINK_SPEED_2_5GB_FULL: + case IXGBE_LINK_SPEED_1GB_FULL: + case IXGBE_LINK_SPEED_10_FULL: + itr += DIV_ROUND_UP(avg_wire_size, + IXGBE_ITR_ADAPTIVE_MIN_INC * 64) * + IXGBE_ITR_ADAPTIVE_MIN_INC; + break; + } + + /* In the case of a latency specific workload only allow us to + * reduce the ITR by at most 2us. By doing this we should dial + * in so that our number of interrupts is no more than 2x the number + * of packets for the least busy workload. So for example in the case + * of a TCP worload the ack packets being received would set the + * the interrupt rate as they are a latency specific workload. + */ + if ((itr & IXGBE_ITR_ADAPTIVE_LATENCY) && itr < ring_container->itr) + itr = ring_container->itr - IXGBE_ITR_ADAPTIVE_MIN_INC; +clear_counts: + /* write back value - clamp to prevent automatic ITR bit interference + * and u8 field overflow. + */ + ring_container->itr = min_t(u16, itr, U8_MAX); + + /* next update should occur within next jiffy */ + ring_container->next_update = next_update + 1; + + ring_container->total_bytes = 0; + ring_container->total_packets = 0; +} + +/** + * ixgbe_write_eitr - write EITR register in hardware specific way + * @q_vector: structure containing interrupt and ring information + * + * This function is made to be called by ethtool and by the driver + * when it needs to update EITR registers at runtime. Hardware + * specific quirks/differences are taken care of here. + */ +void ixgbe_write_eitr(struct ixgbe_q_vector *q_vector) +{ + struct ixgbe_adapter *adapter = q_vector->adapter; + struct ixgbe_hw *hw = &adapter->hw; + int v_idx = q_vector->v_idx; + u32 itr_reg = q_vector->itr & IXGBE_MAX_EITR; + + switch (adapter->hw.mac.type) { + case ixgbe_mac_82598EB: + /* must write high and low 16 bits to reset counter */ + itr_reg |= (itr_reg << 16); + break; + case ixgbe_mac_82599EB: + case ixgbe_mac_X540: + case ixgbe_mac_X550: + case ixgbe_mac_X550EM_x: + case ixgbe_mac_X550EM_a: + case ixgbe_mac_E610: + /* + * set the WDIS bit to not clear the timer bits and cause an + * immediate assertion of the interrupt + */ + itr_reg |= IXGBE_EITR_CNT_WDIS; + break; + default: + break; + } + IXGBE_WRITE_REG(hw, IXGBE_EITR(v_idx), itr_reg); +} + +static void ixgbe_set_itr(struct ixgbe_q_vector *q_vector) +{ + u32 new_itr; + + ixgbe_update_itr(q_vector, &q_vector->tx); + ixgbe_update_itr(q_vector, &q_vector->rx); + + /* use the smallest value of new ITR delay calculations */ + new_itr = min(q_vector->rx.itr, q_vector->tx.itr); + + /* Clear latency flag if set, shift into correct position */ + new_itr &= IXGBE_ITR_ADAPTIVE_MASK_USECS; + new_itr <<= 2; + + if (new_itr != q_vector->itr) { + /* save the algorithm value here */ + q_vector->itr = new_itr; + + ixgbe_write_eitr(q_vector); + } +} + +/** + * ixgbe_check_overtemp_subtask - check for over temperature + * @adapter: pointer to adapter + **/ +static void ixgbe_check_overtemp_subtask(struct ixgbe_adapter *adapter) +{ + struct ixgbe_hw *hw = &adapter->hw; + u32 eicr = adapter->interrupt_event; + s32 rc; + + if (test_bit(__IXGBE_DOWN, adapter->state)) + return; + + if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_EVENT)) + return; + + adapter->flags2 &= ~IXGBE_FLAG2_TEMP_SENSOR_EVENT; + + switch (hw->device_id) { + case IXGBE_DEV_ID_82599_T3_LOM: + /* + * Since the warning interrupt is for both ports + * we don't have to check if: + * - This interrupt wasn't for our port. + * - We may have missed the interrupt so always have to + * check if we got a LSC + */ + if (!(eicr & IXGBE_EICR_GPI_SDP0) && + !(eicr & IXGBE_EICR_LSC)) + return; + + if (!(eicr & IXGBE_EICR_LSC) && hw->mac.ops.check_link) { + u32 speed; + bool link_up = false; + + hw->mac.ops.check_link(hw, &speed, &link_up, false); + + if (link_up) + return; + } + + /* Check if this is not due to overtemp */ + if (hw->phy.ops.check_overtemp(hw) != IXGBE_ERR_OVERTEMP) + return; + + break; + case IXGBE_DEV_ID_X550EM_A_1G_T: + case IXGBE_DEV_ID_X550EM_A_1G_T_L: + rc = hw->phy.ops.check_overtemp(hw); + if (rc != IXGBE_ERR_OVERTEMP) + return; + break; + default: + if (adapter->hw.mac.type >= ixgbe_mac_X540) + return; + if (!(eicr & IXGBE_EICR_GPI_SDP0_BY_MAC(hw))) + return; + break; + } + e_crit(drv, "%s\n", ixgbe_overheat_msg); + + adapter->interrupt_event = 0; +} + +/** + * ixgbe_check_mng_event - check for mng event + * @adapter: pointer to adapter + * @eicr: interrupt cause + **/ +static void ixgbe_check_mng_event(struct ixgbe_adapter *adapter, u32 eicr) +{ + struct ixgbe_hw *hw = &adapter->hw; + u32 fw_reset_cnt; + + switch (adapter->hw.mac.type) { + case ixgbe_mac_82599EB: + case ixgbe_mac_X540: + case ixgbe_mac_X550: + case ixgbe_mac_E610: + break; + case ixgbe_mac_X550EM_x: + case ixgbe_mac_X550EM_a: + if (eicr & IXGBE_EICR_MNG) { + /* Make sure that EICR.MNG event is the result of a + * reset after firmware update + */ + fw_reset_cnt = IXGBE_READ_REG(hw, IXGBE_FWRESETCNT); + if (hw->fw_rst_cnt < fw_reset_cnt) { + hw->fw_rst_cnt = fw_reset_cnt; + set_bit(__IXGBE_RESET_REQUESTED, + adapter->state); + ixgbe_service_event_schedule(adapter); + } + } + break; + default: + break; + } +} + +static void ixgbe_check_fan_failure(struct ixgbe_adapter *adapter, u32 eicr) +{ + struct ixgbe_hw *hw = &adapter->hw; + + if ((adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) && + (eicr & IXGBE_EICR_GPI_SDP1)) { + e_crit(probe, "Fan has stopped, replace the adapter\n"); + /* write to clear the interrupt */ + IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1); + } +} + +/** + * ixgbe_print_health_status_string - Print message for given FW health event + * @adapter: pointer to the adapter structure + * @hse: pointer to the health status element containing the health status code + * + * Print the error/diagnostic string in response to the given Health Status + * Event code. + */ +static void +ixgbe_print_health_status_string(struct ixgbe_adapter *adapter, + struct ixgbe_aci_cmd_health_status_elem *hse) +{ + u16 status_code = le16_to_cpu(hse->health_status_code); + u32 internal_data1 = le32_to_cpu(hse->internal_data1); + u32 internal_data2 = le32_to_cpu(hse->internal_data2); + struct net_device *netdev = adapter->netdev; + + switch (status_code) { + case IXGBE_ACI_HEALTH_STATUS_INFO_RECOVERY: + netdev_info(netdev, + "The device is in firmware recovery mode.\n"); + netdev_info(netdev, + "Possible Solution: Update to the latest NVM image.\n"); + netdev_info(netdev, "Extended Error: 0x%08x.\n", + internal_data1); + break; + case IXGBE_ACI_HEALTH_STATUS_ERR_FLASH_ACCESS: + netdev_err(netdev, "The flash chip cannot be accessed.\n"); + netdev_err(netdev, + "Possible Solution: If issue persists, call customer support.\n"); + netdev_err(netdev, "Access Type: %d.\n", internal_data1); + break; + case IXGBE_ACI_HEALTH_STATUS_ERR_NVM_AUTH: + netdev_err(netdev, "NVM authentication failed.\n"); + netdev_err(netdev, + "Possible Solution: Update to the latest NVM image.\n"); + break; + case IXGBE_ACI_HEALTH_STATUS_ERR_OROM_AUTH: + netdev_err(netdev, "Option ROM authentication failed.\n"); + netdev_err(netdev, + "Possible Solution: Update to the latest NVM image.\n"); + break; + case IXGBE_ACI_HEALTH_STATUS_ERR_DDP_AUTH: + netdev_err(netdev, "DDP package failed.\n"); + netdev_err(netdev, + "Possible Solution: Update to latest base driver and DDP package.\n"); + break; + case IXGBE_ACI_HEALTH_STATUS_ERR_NVM_COMPAT: + netdev_err(netdev, "NVM image is incompatible.\n"); + netdev_err(netdev, + "Possible Solution: Update to the latest NVM image.\n"); + break; + case IXGBE_ACI_HEALTH_STATUS_ERR_OROM_COMPAT: + netdev_err(netdev, "Option ROM is incompatible.\n"); + netdev_err(netdev, + "Possible Solution: Update to the latest NVM image.\n"); + netdev_err(netdev, + "Expected PCI Device Id: 0x%08x and Expected Module Id: 0x%08x.\n", + internal_data1, internal_data2); + break; + case IXGBE_ACI_HEALTH_STATUS_ERR_DCB_MIB: + netdev_err(netdev, + "Supplied MIB file is invalid. DCB reverted to default configuration.\n"); + netdev_err(netdev, + "Possible Solution: Disable FW-LLDP and check DCBx system configuration.\n"); + netdev_err(netdev, "Port Number: %d and MIB Id: %d.\n", + internal_data1, internal_data2); + break; + case IXGBE_ACI_HEALTH_STATUS_ERR_UNKNOWN_MOD_STRICT: + case IXGBE_ACI_HEALTH_STATUS_ERR_UNKNOWN_MOD_LENIENT: + netdev_err(netdev, "An unsupported module was detected.\n"); + netdev_err(netdev, + "Possible Solution 1: Check your cable connection.\n"); + netdev_err(netdev, + "Possible Solution 2: Change or replace the module or cable.\n"); + netdev_err(netdev, + "Possible Solution 3: Manually set speed and duplex.\n"); + netdev_err(netdev, "Port Number: %d.\n", internal_data1); + break; + case IXGBE_ACI_HEALTH_STATUS_ERR_MOD_TYPE: + netdev_err(netdev, "Module type is not supported.\n"); + netdev_err(netdev, + "Possible Solution: Change or replace the module or cable.\n"); + netdev_err(netdev, "Port Number: %d.\n", internal_data1); + break; + case IXGBE_ACI_HEALTH_STATUS_ERR_MOD_QUAL: + netdev_err(netdev, "Module is not qualified.\n"); + netdev_err(netdev, + "Possible Solution 1: Check your cable connection.\n"); + netdev_err(netdev, + "Possible Solution 2: Change or replace the module or cable.\n"); + netdev_err(netdev, + "Possible Solution 3: Manually set speed and duplex.\n"); + netdev_err(netdev, "Port Number: %d\n", internal_data1); + break; + case IXGBE_ACI_HEALTH_STATUS_ERR_MOD_COMM: + netdev_err(netdev, + "Device cannot communicate with the module.\n"); + netdev_err(netdev, + "Possible Solution 1: Check your cable connection.\n"); + netdev_err(netdev, + "Possible Solution 2: Change or replace the module or cable.\n"); + netdev_err(netdev, + "Possible Solution 3: Manually set speed and duplex.\n"); + netdev_err(netdev, + "Port Number: %d.\n", internal_data1); + break; + case IXGBE_ACI_HEALTH_STATUS_ERR_MOD_CONFLICT: + netdev_err(netdev, "Unresolved module conflict.\n"); + netdev_err(netdev, + "Possible Solution 1: Manually set speed/duplex or use Intel(R) Ethernet Port Configuration Tool to change the port option.\n"); + netdev_err(netdev, + "Possible Solution 2: If the problem persists, use a cable/module that is found in the supported modules and cables list for this device.\n"); + netdev_err(netdev, "Port Number: %d.\n", internal_data1); + break; + case IXGBE_ACI_HEALTH_STATUS_ERR_MOD_NOT_PRESENT: + netdev_err(netdev, "Module is not present.\n"); + netdev_err(netdev, + "Possible Solution 1: Check that the module is inserted correctly.\n"); + netdev_err(netdev, + "Possible Solution 2: If the problem persists, use a cable/module that is found in the supported modules and cables list for this device.\n"); + netdev_err(netdev, "Port Number: %d.\n", internal_data1); + break; + case IXGBE_ACI_HEALTH_STATUS_INFO_MOD_UNDERUTILIZED: + netdev_info(netdev, "Underutilized module.\n"); + netdev_info(netdev, + "Possible Solution 1: Change or replace the module or cable.\n"); + netdev_info(netdev, + "Possible Solution 2: Use Intel(R) Ethernet Port Configuration Tool to change the port option.\n"); + netdev_info(netdev, "Port Number: %d.\n", internal_data1); + break; + case IXGBE_ACI_HEALTH_STATUS_ERR_INVALID_LINK_CFG: + netdev_err(netdev, "Invalid link configuration.\n"); + netdev_err(netdev, "Port Number: %d.\n", internal_data1); + break; + case IXGBE_ACI_HEALTH_STATUS_ERR_PORT_ACCESS: + netdev_err(netdev, "Port hardware access error.\n"); + netdev_err(netdev, + "Possible Solution: Update to the latest NVM image.\n"); + netdev_err(netdev, "Port Number: %d.\n", internal_data1); + break; + case IXGBE_ACI_HEALTH_STATUS_ERR_PORT_UNREACHABLE: + netdev_err(netdev, "A port is unreachable.\n"); + netdev_err(netdev, + "Possible Solution 1: Use Intel(R) Ethernet Port Configuration Tool to change the port option.\n"); + netdev_err(netdev, + "Possible Solution 2: Update to the latest NVM image.\n"); + netdev_err(netdev, "Port Number: %d.\n", internal_data1); + break; + case IXGBE_ACI_HEALTH_STATUS_INFO_PORT_SPEED_MOD_LIMITED: + netdev_info(netdev, "Port speed is limited due to module.\n"); + netdev_info(netdev, + "Possible Solution: Change the module or use Intel(R) Ethernet Port Configuration Tool to configure the port option to match the current module speed.\n"); + netdev_info(netdev, "Port Number: %d.\n", internal_data1); + break; + case IXGBE_ACI_HEALTH_STATUS_ERR_PARALLEL_FAULT: + netdev_err(netdev, "A parallel fault was detected.\n"); + netdev_err(netdev, + "Possible Solution: Check link partner connection and configuration.\n"); + netdev_err(netdev, "Port Number: %d.\n", internal_data1); + break; + case IXGBE_ACI_HEALTH_STATUS_INFO_PORT_SPEED_PHY_LIMITED: + netdev_info(netdev, + "Port speed is limited by PHY capabilities.\n"); + netdev_info(netdev, + "Possible Solution 1: Change the module to align to port option.\n"); + netdev_info(netdev, + "Possible Solution 2: Use Intel(R) Ethernet Port Configuration Tool to change the port option.\n"); + netdev_info(netdev, "Port Number: %d.\n", internal_data1); + break; + case IXGBE_ACI_HEALTH_STATUS_ERR_NETLIST_TOPO: + netdev_err(netdev, "LOM topology netlist is corrupted.\n"); + netdev_err(netdev, + "Possible Solution: Update to the latest NVM image.\n"); + netdev_err(netdev, "Port Number: %d.\n", internal_data1); + break; + case IXGBE_ACI_HEALTH_STATUS_ERR_NETLIST: + netdev_err(netdev, "Unrecoverable netlist error.\n"); + netdev_err(netdev, + "Possible Solution: Update to the latest NVM image.\n"); + netdev_err(netdev, "Port Number: %d.\n", internal_data1); + break; + case IXGBE_ACI_HEALTH_STATUS_ERR_TOPO_CONFLICT: + netdev_err(netdev, "Port topology conflict.\n"); + netdev_err(netdev, + "Possible Solution 1: Use Intel(R) Ethernet Port Configuration Tool to change the port option.\n"); + netdev_err(netdev, + "Possible Solution 2: Update to the latest NVM image.\n"); + netdev_err(netdev, "Port Number: %d.\n", internal_data1); + break; + case IXGBE_ACI_HEALTH_STATUS_ERR_LINK_HW_ACCESS: + netdev_err(netdev, "Unrecoverable hardware access error.\n"); + netdev_err(netdev, + "Possible Solution: Update to the latest NVM image.\n"); + netdev_err(netdev, "Port Number: %d.\n", internal_data1); + break; + case IXGBE_ACI_HEALTH_STATUS_ERR_LINK_RUNTIME: + netdev_err(netdev, "Unrecoverable runtime error.\n"); + netdev_err(netdev, + "Possible Solution: Update to the latest NVM image.\n"); + netdev_err(netdev, "Port Number: %d.\n", internal_data1); + break; + case IXGBE_ACI_HEALTH_STATUS_ERR_DNL_INIT: + netdev_err(netdev, + "Link management engine failed to initialize.\n"); + netdev_err(netdev, + "Possible Solution: Update to the latest NVM image.\n"); + netdev_err(netdev, "Port Number: %d.\n", internal_data1); + break; + case IXGBE_ACI_HEALTH_STATUS_ERR_PHY_FW_LOAD: + netdev_err(netdev, + "Failed to load the firmware image in the external PHY.\n"); + netdev_err(netdev, + "Possible Solution: Update to the latest NVM image.\n"); + netdev_err(netdev, "Port Number: %d.\n", internal_data1); + break; + case IXGBE_ACI_HEALTH_STATUS_ERR_MOD_DIAGNOSTIC_FEATURE: + netdev_err(netdev, + "Module diagnostic feature not implemented.\n"); + break; + case IXGBE_ACI_HEALTH_STATUS_ERR_NVM_SEC_VIOLATION: + netdev_err(netdev, "NVM Security version violation.\n"); + netdev_err(netdev, + "Non-permitted Security version downgrade attempt, minimum version expected = 0x%08x.\n", + internal_data1); + break; + case IXGBE_ACI_HEALTH_STATUS_ERR_OROM_SEC_VIOLATION: + netdev_err(netdev, "OROM Security version violation.\n"); + netdev_err(netdev, + "Non-permitted Security version downgrade attempt, minimum version expected = 0x%08x.\n", + internal_data1); + break; + case IXGBE_ACI_HEALTH_STATUS_ERR_MNG_TIMEOUT: + netdev_err(netdev, "MNG timeout.\n"); + break; + case IXGBE_ACI_HEALTH_STATUS_ERR_BMC_RESET: + netdev_err(netdev, "Reset was triggered by Manageability.\n"); + break; + case IXGBE_ACI_HEALTH_STATUS_ERR_LAST_MNG_FAIL: + netdev_err(netdev, "Manageability command failed.\n"); + netdev_err(netdev, "MNG type: %d and Failed Opcode: 0x%08x.\n", + internal_data1, internal_data2); + break; + case IXGBE_ACI_HEALTH_STATUS_ERR_RESOURCE_ALLOC_FAIL: + netdev_err(netdev, "Resource allocation failure.\n"); + netdev_err(netdev, "Resource type: %d and PF ID: %d.\n", + internal_data1, internal_data2); + break; + case IXGBE_ACI_HEALTH_STATUS_ERR_FW_LOOP: + netdev_err(netdev, "Firmware experience resets in loop.\n"); + netdev_err(netdev, + "GLGEN_RSTAT information for EMPR/CORER/GLOBR. EMPR Reason (WD, Exception, ECC etc.): %d.\n", + internal_data1); + break; + case IXGBE_ACI_HEALTH_STATUS_ERR_FW_PFR_FAIL: + netdev_err(netdev, "Firmware failed to execute PF reset.\n"); + netdev_err(netdev, "PF ID: %d.\n", internal_data1); + break; + case IXGBE_ACI_HEALTH_STATUS_ERR_LAST_FAIL_AQ: + netdev_err(netdev, "ACI command failure.\n"); + netdev_err(netdev, + "Failed command opcode: 0x%08x and PF ID: %d.\n", + internal_data1, internal_data2); + break; + default: + break; + } +} + +/** + * ixgbe_process_health_status_event - Process the health status event from FW + * @adapter: pointer to the adapter structure + * @e: event structure containing the Health Status Event opcode + * + * Decode the Health Status Events and print the associated messages + */ +static void ixgbe_process_health_status_event(struct ixgbe_adapter *adapter, + struct ixgbe_aci_event *e) +{ + struct ixgbe_aci_cmd_health_status_elem *health_info; + u16 health_status_elem_count; + int i; + + health_info = (struct ixgbe_aci_cmd_health_status_elem *)e->msg_buf; + health_status_elem_count = + le16_to_cpu(e->desc.params.get_health_status.health_status_count); + + /* In practice it's rare to encounter this event, and even more uncommon + * to observe multiple health status elements in a single message, but + * there's no boundary defined that separates an unlikely scenario from + * an erroneous one. If the count reported by the firmware is clearly + * incorrect then don't process the message and return. + */ + if (health_status_elem_count > (e->buf_len / sizeof(*health_info))) { + netdev_err(adapter->netdev, + "Received a health status event with invalid element count\n"); + return; + } + + for (i = 0; i < health_status_elem_count; i++) { + ixgbe_print_health_status_string(adapter, health_info); + health_info++; + } +} + +static void ixgbe_check_overtemp_event(struct ixgbe_adapter *adapter, u32 eicr) +{ + if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE)) + return; + + switch (adapter->hw.mac.type) { + case ixgbe_mac_82599EB: + /* + * Need to check link state so complete overtemp check + * on service task + */ + if (((eicr & IXGBE_EICR_GPI_SDP0) || (eicr & IXGBE_EICR_LSC)) && + (!test_bit(__IXGBE_DOWN, adapter->state))) { + adapter->interrupt_event = eicr; + adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_EVENT; + ixgbe_service_event_schedule(adapter); + return; + } + return; + case ixgbe_mac_X550EM_a: + if (eicr & IXGBE_EICR_GPI_SDP0_X550EM_a) { + adapter->interrupt_event = eicr; + adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_EVENT; + ixgbe_service_event_schedule(adapter); + IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, + IXGBE_EICR_GPI_SDP0_X550EM_a); + IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICR, + IXGBE_EICR_GPI_SDP0_X550EM_a); + } + return; + case ixgbe_mac_X550: + case ixgbe_mac_E610: + case ixgbe_mac_X540: + if (!(eicr & IXGBE_EICR_TS)) + return; + break; + default: + return; + } + + e_crit(drv, "%s\n", ixgbe_overheat_msg); +} + +static void ixgbe_check_sfp_event(struct ixgbe_adapter *adapter, u32 eicr) +{ + struct ixgbe_hw *hw = &adapter->hw; + u32 eicr_mask = IXGBE_EICR_GPI_SDP2_BY_MAC(hw); + + if (!ixgbe_is_sfp(hw)) + return; + if (hw->mac.type >= ixgbe_mac_X540) + eicr_mask = IXGBE_EICR_GPI_SDP0_X540; + + if (eicr & eicr_mask) { + /* Clear the interrupt */ + IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr_mask); + if (!test_bit(__IXGBE_DOWN, adapter->state)) { + adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET; + adapter->sfp_poll_time = 0; + ixgbe_service_event_schedule(adapter); + } + } + + if (adapter->hw.mac.type == ixgbe_mac_82599EB && + (eicr & IXGBE_EICR_GPI_SDP1_BY_MAC(hw))) { + /* Clear the interrupt */ + IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1_BY_MAC(hw)); + if (!test_bit(__IXGBE_DOWN, adapter->state)) { + adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG; + ixgbe_service_event_schedule(adapter); + } + } +} + +static void ixgbe_check_lsc(struct ixgbe_adapter *adapter) +{ + struct ixgbe_hw *hw = &adapter->hw; + + adapter->lsc_int++; + adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE; + adapter->link_check_timeout = jiffies; + if (!test_bit(__IXGBE_DOWN, adapter->state)) { + IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC); + IXGBE_WRITE_FLUSH(hw); + ixgbe_service_event_schedule(adapter); + } +} + +/** + * ixgbe_check_phy_fw_load - check if PHY FW load failed + * @adapter: pointer to adapter structure + * @link_cfg_err: bitmap from the link info structure + * + * Check if external PHY FW load failed and print an error message if it did. + */ +static void ixgbe_check_phy_fw_load(struct ixgbe_adapter *adapter, + u8 link_cfg_err) +{ + if (!(link_cfg_err & IXGBE_ACI_LINK_EXTERNAL_PHY_LOAD_FAILURE)) { + adapter->flags2 &= ~IXGBE_FLAG2_PHY_FW_LOAD_FAILED; + return; + } + + if (adapter->flags2 & IXGBE_FLAG2_PHY_FW_LOAD_FAILED) + return; + + if (link_cfg_err & IXGBE_ACI_LINK_EXTERNAL_PHY_LOAD_FAILURE) { + netdev_err(adapter->netdev, "Device failed to load the FW for the external PHY. Please download and install the latest NVM for your device and try again\n"); + adapter->flags2 |= IXGBE_FLAG2_PHY_FW_LOAD_FAILED; + } +} + +/** + * ixgbe_check_module_power - check module power level + * @adapter: pointer to adapter structure + * @link_cfg_err: bitmap from the link info structure + * + * Check module power level returned by a previous call to aci_get_link_info + * and print error messages if module power level is not supported. + */ +static void ixgbe_check_module_power(struct ixgbe_adapter *adapter, + u8 link_cfg_err) +{ + /* if module power level is supported, clear the flag */ + if (!(link_cfg_err & (IXGBE_ACI_LINK_INVAL_MAX_POWER_LIMIT | + IXGBE_ACI_LINK_MODULE_POWER_UNSUPPORTED))) { + adapter->flags2 &= ~IXGBE_FLAG2_MOD_POWER_UNSUPPORTED; + return; + } + + /* if IXGBE_FLAG2_MOD_POWER_UNSUPPORTED was previously set and the + * above block didn't clear this bit, there's nothing to do + */ + if (adapter->flags2 & IXGBE_FLAG2_MOD_POWER_UNSUPPORTED) + return; + + if (link_cfg_err & IXGBE_ACI_LINK_INVAL_MAX_POWER_LIMIT) { + netdev_err(adapter->netdev, "The installed module is incompatible with the device's NVM image. Cannot start link\n"); + adapter->flags2 |= IXGBE_FLAG2_MOD_POWER_UNSUPPORTED; + } else if (link_cfg_err & IXGBE_ACI_LINK_MODULE_POWER_UNSUPPORTED) { + netdev_err(adapter->netdev, "The module's power requirements exceed the device's power supply. Cannot start link\n"); + adapter->flags2 |= IXGBE_FLAG2_MOD_POWER_UNSUPPORTED; + } +} + +/** + * ixgbe_check_link_cfg_err - check if link configuration failed + * @adapter: pointer to adapter structure + * @link_cfg_err: bitmap from the link info structure + * + * Print if any link configuration failure happens due to the value in the + * link_cfg_err parameter in the link info structure. + */ +static void ixgbe_check_link_cfg_err(struct ixgbe_adapter *adapter, + u8 link_cfg_err) +{ + ixgbe_check_module_power(adapter, link_cfg_err); + ixgbe_check_phy_fw_load(adapter, link_cfg_err); +} + +/** + * ixgbe_process_link_status_event - process the link event + * @adapter: pointer to adapter structure + * @link_up: true if the physical link is up and false if it is down + * @link_speed: current link speed received from the link event + * + * Return: 0 on success and negative on failure. + */ +static int +ixgbe_process_link_status_event(struct ixgbe_adapter *adapter, bool link_up, + u16 link_speed) +{ + struct ixgbe_hw *hw = &adapter->hw; + int status; + + /* update the link info structures and re-enable link events, + * don't bail on failure due to other book keeping needed + */ + status = ixgbe_update_link_info(hw); + if (status) + e_dev_err("Failed to update link status, err %d aq_err %d\n", + status, hw->aci.last_status); + + ixgbe_check_link_cfg_err(adapter, hw->link.link_info.link_cfg_err); + + /* Check if the link state is up after updating link info, and treat + * this event as an UP event since the link is actually UP now. + */ + if (hw->link.link_info.link_info & IXGBE_ACI_LINK_UP) + link_up = true; + + /* turn off PHY if media was removed */ + if (!(adapter->flags2 & IXGBE_FLAG2_NO_MEDIA) && + !(hw->link.link_info.link_info & IXGBE_ACI_MEDIA_AVAILABLE)) { + adapter->flags2 |= IXGBE_FLAG2_NO_MEDIA; + } + + if ((link_up == adapter->link_up) && + link_up == netif_carrier_ok(adapter->netdev) && + link_speed == adapter->link_speed) + return IXGBE_SUCCESS; + + adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE; + adapter->link_check_timeout = jiffies; + ixgbe_watchdog_update_link(adapter); + + if (link_up) + ixgbe_watchdog_link_is_up(adapter); + else + ixgbe_watchdog_link_is_down(adapter); + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_handle_link_status_event - handle link status event via ACI + * @adapter: pointer to adapter structure + * @e: event structure containing link status info + */ +static void +ixgbe_handle_link_status_event(struct ixgbe_adapter *adapter, + struct ixgbe_aci_event *e) +{ + struct ixgbe_aci_cmd_get_link_status_data *link_data; + u16 link_speed; + bool link_up; + + link_data = (struct ixgbe_aci_cmd_get_link_status_data *)e->msg_buf; + + link_up = !!(link_data->link_info & IXGBE_ACI_LINK_UP); + link_speed = le16_to_cpu(link_data->link_speed); + + if (ixgbe_process_link_status_event(adapter, link_up, link_speed)) + e_dev_warn("Could not process link status event"); +} + +/** + * ixgbe_schedule_fw_event - schedule Firmware event + * @adapter: pointer to the adapter structure + * + * If the adapter is not in down, removing or resetting state, + * an event is scheduled. + */ +static void ixgbe_schedule_fw_event(struct ixgbe_adapter *adapter) +{ + if (!ixgbe_is_mac_E6xx(adapter->hw.mac.type)) + return; + + if (!test_bit(__IXGBE_DOWN, adapter->state) && + !test_bit(__IXGBE_REMOVING, adapter->state) && + !test_bit(__IXGBE_RESETTING, adapter->state)) { + adapter->flags2 |= IXGBE_FLAG2_FW_ASYNC_EVENT; + ixgbe_service_event_schedule(adapter); + } +} + +/** + * ixgbe_get_fwlog_data - copy the FW log data from ACI event + * @hw: pointer to private hardware struct + * @event: pointer to message from f/w + */ +static void +ixgbe_get_fwlog_data(struct ixgbe_hw *hw, struct ixgbe_aci_event *event) +{ + struct ixgbe_fwlog_data *fwlog; + + fwlog = &hw->fwlog_ring.rings[hw->fwlog_ring.tail]; + + memset(fwlog->data, 0, PAGE_SIZE); + fwlog->data_size = le16_to_cpu(event->desc.datalen); + + memcpy(fwlog->data, event->msg_buf, fwlog->data_size); + ixgbe_fwlog_ring_increment(&hw->fwlog_ring.tail, hw->fwlog_ring.size); + + if (ixgbe_fwlog_ring_full(&hw->fwlog_ring)) { + /* the rings are full so bump the head to create room */ + ixgbe_fwlog_ring_increment(&hw->fwlog_ring.head, + hw->fwlog_ring.size); + } +} + +/** + * ixgbe_handle_fw_event - handle Firmware event + * @adapter: pointer to the adapter structure + * + * Obtain an event from ACI and then + * depending on the type of event through the opcode + * correspondingly process it. + */ +static void ixgbe_handle_fw_event(struct ixgbe_adapter *adapter) +{ + struct net_device *netdev = adapter->netdev; + struct ixgbe_hw *hw = &adapter->hw; + struct ixgbe_aci_event event; + bool pending = false; + s32 status; + + if (!ixgbe_is_mac_E6xx(adapter->hw.mac.type)) + return; + + if (adapter->flags2 & IXGBE_FLAG2_FW_ASYNC_EVENT) + adapter->flags2 &= ~IXGBE_FLAG2_FW_ASYNC_EVENT; + + event.buf_len = IXGBE_ACI_MAX_BUFFER_SIZE; + event.msg_buf = kzalloc(event.buf_len, GFP_KERNEL); + if (!event.msg_buf) + return; + + do { + u16 opcode; + + status = ixgbe_aci_get_event(hw, &event, &pending); + if (status) + break; + + opcode = le16_to_cpu(event.desc.opcode); + + switch (opcode) { + case ixgbe_aci_opc_get_link_status: + ixgbe_handle_link_status_event(adapter, &event); + break; + case ixgbe_aci_opc_get_health_status: + ixgbe_process_health_status_event(adapter, &event); + break; + case ixgbe_aci_opc_fw_logs_event: + ixgbe_get_fwlog_data(hw, &event); + break; + case ixgbe_aci_opc_temp_tca_event: + e_crit(drv, "%s\n", ixgbe_overheat_msg); + ixgbe_close(netdev); + break; + default: + e_warn(hw, "unknown FW async event captured\n"); + break; + } + + } while (pending); + + kfree(event.msg_buf); +} +static void ixgbe_irq_enable_queues(struct ixgbe_adapter *adapter, u64 qmask) +{ + u32 mask; + struct ixgbe_hw *hw = &adapter->hw; + + switch (hw->mac.type) { + case ixgbe_mac_82598EB: + mask = (IXGBE_EIMS_RTX_QUEUE & qmask); + IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask); + break; + case ixgbe_mac_82599EB: + case ixgbe_mac_X540: + case ixgbe_mac_X550: + case ixgbe_mac_X550EM_x: + case ixgbe_mac_X550EM_a: + case ixgbe_mac_E610: + mask = (qmask & 0xFFFFFFFF); + if (mask) + IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(0), mask); + mask = (qmask >> 32); + if (mask) + IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(1), mask); + break; + default: + break; + } + /* skip the flush */ +} + + +/** + * ixgbe_irq_enable - Enable default interrupt generation settings + * @adapter: board private structure + * @queues: enable irqs for queues + * @flush: flush register write + **/ +static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter, bool queues, + bool flush) +{ + u32 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE); + + /* don't reenable LSC while waiting for link */ + if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE) + mask &= ~IXGBE_EIMS_LSC; + + if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) + switch (adapter->hw.mac.type) { + case ixgbe_mac_82599EB: + case ixgbe_mac_X550EM_a: + mask |= IXGBE_EIMS_GPI_SDP0_BY_MAC(&adapter->hw); + break; + case ixgbe_mac_X540: + case ixgbe_mac_X550: + case ixgbe_mac_E610: + mask |= IXGBE_EIMS_TS; + break; + default: + break; + } + if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) + mask |= IXGBE_EIMS_GPI_SDP1; + switch (adapter->hw.mac.type) { + case ixgbe_mac_82599EB: + mask |= IXGBE_EIMS_GPI_SDP1; + mask |= IXGBE_EIMS_GPI_SDP2; + fallthrough; + case ixgbe_mac_X540: + case ixgbe_mac_X550: + case ixgbe_mac_X550EM_x: + case ixgbe_mac_E610: + mask |= IXGBE_EIMS_FW_EVENT; + fallthrough; + case ixgbe_mac_X550EM_a: + if (adapter->hw.device_id == IXGBE_DEV_ID_X550EM_X_SFP || + adapter->hw.device_id == IXGBE_DEV_ID_X550EM_A_SFP || + adapter->hw.device_id == IXGBE_DEV_ID_X550EM_A_SFP_N) + mask |= IXGBE_EIMS_GPI_SDP0_BY_MAC(&adapter->hw); + if (adapter->hw.phy.type == ixgbe_phy_x550em_ext_t) + mask |= IXGBE_EICR_GPI_SDP0_X540; + mask |= IXGBE_EIMS_ECC; + mask |= IXGBE_EIMS_MAILBOX; +#ifdef HAVE_PTP_1588_CLOCK + mask |= IXGBE_EIMS_TIMESYNC; +#endif + + break; + default: + break; + } + + if ((adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) && + !(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT)) + mask |= IXGBE_EIMS_FLOW_DIR; + + IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask); + if (queues) + ixgbe_irq_enable_queues(adapter, ~0); + if (flush) + IXGBE_WRITE_FLUSH(&adapter->hw); +} + +static irqreturn_t ixgbe_msix_other(int __always_unused irq, void *data) +{ + struct ixgbe_adapter *adapter = data; + struct ixgbe_hw *hw = &adapter->hw; + u32 eicr; + + /* + * Workaround for Silicon errata #26 on 82598. Use clear-by-write + * instead of clear-by-read. Reading with EICS will return the + * interrupt causes without clearing, which later be done + * with the write to EICR. + */ + eicr = IXGBE_READ_REG(hw, IXGBE_EICS); + + /* The lower 16bits of the EICR register are for the queue interrupts + * which should be masked here in order to not accidently clear them if + * the bits are high when ixgbe_msix_other is called. There is a race + * condition otherwise which results in possible performance loss + * especially if the ixgbe_msix_other interrupt is triggering + * consistently (as it would when PPS is turned on for the X540 device) + */ + eicr &= 0xFFFF0000; + + IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr); + + if (eicr & IXGBE_EICR_LSC) + ixgbe_check_lsc(adapter); + + if (eicr & IXGBE_EICR_MAILBOX) + ixgbe_msg_task(adapter); + if (eicr & IXGBE_EICR_FW_EVENT) + ixgbe_schedule_fw_event(adapter); + + switch (hw->mac.type) { + case ixgbe_mac_82599EB: + case ixgbe_mac_X540: + case ixgbe_mac_X550: + case ixgbe_mac_X550EM_x: + case ixgbe_mac_X550EM_a: + case ixgbe_mac_E610: + if (hw->phy.type == ixgbe_phy_x550em_ext_t && + (eicr & IXGBE_EICR_GPI_SDP0_X540)) { + adapter->flags2 |= IXGBE_FLAG2_PHY_INTERRUPT; + ixgbe_service_event_schedule(adapter); + IXGBE_WRITE_REG(hw, IXGBE_EICR, + IXGBE_EICR_GPI_SDP0_X540); + } + if (eicr & IXGBE_EICR_ECC) { + e_info(link, "Received unrecoverable ECC Err," + "initiating reset.\n"); + set_bit(__IXGBE_RESET_REQUESTED, adapter->state); + ixgbe_service_event_schedule(adapter); + IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC); + } +#ifdef HAVE_TX_MQ + /* Handle Flow Director Full threshold interrupt */ + if (eicr & IXGBE_EICR_FLOW_DIR) { + int reinit_count = 0; + int i; + for (i = 0; i < adapter->num_tx_queues; i++) { + struct ixgbe_ring *ring = adapter->tx_ring[i]; + if (test_and_clear_bit( + __IXGBE_TX_FDIR_INIT_DONE, + &ring->state)) + reinit_count++; + } + if (reinit_count) { + /* no more flow director interrupts until + * after init + */ + IXGBE_WRITE_REG(hw, IXGBE_EIMC, + IXGBE_EIMC_FLOW_DIR); + adapter->flags2 |= + IXGBE_FLAG2_FDIR_REQUIRES_REINIT; + ixgbe_service_event_schedule(adapter); + } + } +#endif + ixgbe_check_sfp_event(adapter, eicr); + ixgbe_check_overtemp_event(adapter, eicr); + ixgbe_check_mng_event(adapter, eicr); + break; + default: + break; + } + + ixgbe_check_fan_failure(adapter, eicr); + +#ifdef HAVE_PTP_1588_CLOCK + if (unlikely(eicr & IXGBE_EICR_TIMESYNC)) + ixgbe_ptp_eicr_timesync(adapter); +#endif + + /* re-enable the original interrupt state, no lsc, no queues */ + if (!test_bit(__IXGBE_DOWN, adapter->state)) + ixgbe_irq_enable(adapter, false, false); + + return IRQ_HANDLED; +} + +static irqreturn_t ixgbe_msix_clean_rings(int __always_unused irq, void *data) +{ + struct ixgbe_q_vector *q_vector = data; + + /* EIAM disabled interrupts (on this vector) for us */ + + if (q_vector->rx.ring || q_vector->tx.ring) + napi_schedule_irqoff(&q_vector->napi); + + return IRQ_HANDLED; +} + +/** + * ixgbe_poll - NAPI polling RX/TX cleanup routine + * @napi: napi struct with our devices info in it + * @budget: amount of work driver is allowed to do this pass, in packets + * + * Clean all queues associated with a q_vector. + **/ +int ixgbe_poll(struct napi_struct *napi, int budget) +{ + struct ixgbe_q_vector *q_vector = + container_of(napi, struct ixgbe_q_vector, napi); + struct ixgbe_adapter *adapter = q_vector->adapter; + struct ixgbe_ring *ring; + int per_ring_budget, work_done = 0; + bool clean_complete = true; + +#if IS_ENABLED(CONFIG_DCA) + if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) + ixgbe_update_dca(q_vector); +#endif /* CONFIG_DCA */ + + ixgbe_for_each_ring(ring, q_vector->tx) { +#ifdef HAVE_AF_XDP_ZC_SUPPORT + bool wd = ring->xsk_pool ? + ixgbe_clean_xdp_tx_irq(q_vector, ring) : + ixgbe_clean_tx_irq(q_vector, ring, budget); + if (!wd) +#else + if (!ixgbe_clean_tx_irq(q_vector, ring, budget)) +#endif + clean_complete = false; + } + +#ifdef HAVE_NDO_BUSY_POLL + if (test_bit(NAPI_STATE_NPSVC, &napi->state)) + return budget; + + /* Exit if we are called by netpoll or busy polling is active */ + if ((budget <= 0) || !ixgbe_qv_lock_napi(q_vector)) + return budget; +#else + /* Exit if we are called by netpoll */ + if (budget <= 0) + return budget; +#endif + +#ifdef HAVE_PTP_1588_CLOCK + work_done += ixgbe_ptp_rx_complete_skb_e600(q_vector, &budget); + if (budget <= 0) + return budget; + +#endif /* HAVE_PTP_1588_CLOCK */ + /* attempt to distribute budget to each queue fairly, but don't allow + * the budget to go below 1 because we'll exit polling */ + if (q_vector->rx.count > 1) + per_ring_budget = max(budget/q_vector->rx.count, 1); + else + per_ring_budget = budget; + + ixgbe_for_each_ring(ring, q_vector->rx) { +#ifdef HAVE_AF_XDP_ZC_SUPPORT + int cleaned = ring->xsk_pool ? + ixgbe_clean_rx_irq_zc(q_vector, ring, + per_ring_budget) : + ixgbe_clean_rx_irq(q_vector, ring, + per_ring_budget); +#else + int cleaned = ixgbe_clean_rx_irq(q_vector, ring, + per_ring_budget); +#endif /* HAVE_AF_XDP_ZC_SUPPORT */ + work_done += cleaned; + if (cleaned >= per_ring_budget) + clean_complete = false; + } + +#ifdef HAVE_NDO_BUSY_POLL + ixgbe_qv_unlock_napi(q_vector); + +#endif +#ifndef HAVE_NETDEV_NAPI_LIST + if (!netif_running(adapter->netdev)) + clean_complete = true; + +#endif + /* If all work not completed, return budget and keep polling */ + if (!clean_complete) + return budget; + /* all work done, exit the polling mode */ + if (likely(napi_complete_done(napi, work_done))) { + if (adapter->rx_itr_setting == 1) + ixgbe_set_itr(q_vector); + if (!test_bit(__IXGBE_DOWN, adapter->state)) + ixgbe_irq_enable_queues(adapter, + ((u64)1 << q_vector->v_idx)); + } + return min(work_done, budget - 1); +} + +/** + * ixgbe_request_msix_irqs - Initialize MSI-X interrupts + * @adapter: board private structure + * + * ixgbe_request_msix_irqs allocates MSI-X vectors and requests + * interrupts from the kernel. + **/ +static int ixgbe_request_msix_irqs(struct ixgbe_adapter *adapter) +{ + struct net_device *netdev = adapter->netdev; + unsigned int ri = 0, ti = 0; + int vector, err; + + for (vector = 0; vector < adapter->num_q_vectors; vector++) { + struct ixgbe_q_vector *q_vector = adapter->q_vector[vector]; + struct msix_entry *entry = &adapter->msix_entries[vector]; + + if (q_vector->tx.ring && q_vector->rx.ring) { + snprintf(q_vector->name, sizeof(q_vector->name), + "%s-TxRx-%u", netdev->name, ri++); + ti++; + } else if (q_vector->rx.ring) { + snprintf(q_vector->name, sizeof(q_vector->name), + "%s-rx-%u", netdev->name, ri++); + } else if (q_vector->tx.ring) { + snprintf(q_vector->name, sizeof(q_vector->name), + "%s-tx-%u", netdev->name, ti++); + } else { + /* skip this unused q_vector */ + continue; + } + err = request_irq(entry->vector, &ixgbe_msix_clean_rings, 0, + q_vector->name, q_vector); + if (err) { + e_err(probe, "request_irq failed for MSIX interrupt '%s' " + "Error: %d\n", q_vector->name, err); + goto free_queue_irqs; + } + } + + err = request_irq(adapter->msix_entries[vector].vector, + ixgbe_msix_other, 0, netdev->name, adapter); + if (err) { + e_err(probe, "request_irq for msix_other failed: %d\n", err); + goto free_queue_irqs; + } + + return IXGBE_SUCCESS; + +free_queue_irqs: + while (vector) { + vector--; + free_irq(adapter->msix_entries[vector].vector, + adapter->q_vector[vector]); + } + adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED; + pci_disable_msix(adapter->pdev); + kfree(adapter->msix_entries); + adapter->msix_entries = NULL; + return err; +} + +/** + * ixgbe_intr - legacy mode Interrupt Handler + * @irq: interrupt number + * @data: pointer to a network interface device structure + **/ +static irqreturn_t ixgbe_intr(int __always_unused irq, void *data) +{ + struct ixgbe_adapter *adapter = data; + struct ixgbe_hw *hw = &adapter->hw; + struct ixgbe_q_vector *q_vector = adapter->q_vector[0]; + u32 eicr; + + /* + * Workaround for silicon errata #26 on 82598. Mask the interrupt + * before the read of EICR. + */ + IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_IRQ_CLEAR_MASK); + + /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read + * therefore no explicit interrupt disable is necessary */ + eicr = IXGBE_READ_REG(hw, IXGBE_EICR); + if (!eicr) { + /* + * shared interrupt alert! + * make sure interrupts are enabled because the read will + * have disabled interrupts due to EIAM + * finish the workaround of silicon errata on 82598. Unmask + * the interrupt that we masked before the EICR read. + */ + if (!test_bit(__IXGBE_DOWN, adapter->state)) + ixgbe_irq_enable(adapter, true, true); + return IRQ_NONE; /* Not our interrupt */ + } + + if (eicr & IXGBE_EICR_LSC) + ixgbe_check_lsc(adapter); + + if (eicr & IXGBE_EICR_FW_EVENT) + ixgbe_schedule_fw_event(adapter); + + switch (hw->mac.type) { + case ixgbe_mac_82599EB: + case ixgbe_mac_X540: + case ixgbe_mac_X550: + case ixgbe_mac_X550EM_x: + case ixgbe_mac_X550EM_a: + case ixgbe_mac_E610: + if (eicr & IXGBE_EICR_ECC) { + e_info(link, "Received unrecoverable ECC Err," + "initiating reset.\n"); + set_bit(__IXGBE_RESET_REQUESTED, adapter->state); + ixgbe_service_event_schedule(adapter); + IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC); + } + ixgbe_check_sfp_event(adapter, eicr); + ixgbe_check_overtemp_event(adapter, eicr); + ixgbe_check_mng_event(adapter, eicr); + break; + default: + break; + } + + ixgbe_check_fan_failure(adapter, eicr); +#ifdef HAVE_PTP_1588_CLOCK + if (unlikely(eicr & IXGBE_EICR_TIMESYNC)) + ixgbe_ptp_eicr_timesync(adapter); +#endif + + /* would disable interrupts here but EIAM disabled it */ + napi_schedule_irqoff(&q_vector->napi); + + /* + * re-enable link(maybe) and non-queue interrupts, no flush. + * ixgbe_poll will re-enable the queue interrupts + */ + if (!test_bit(__IXGBE_DOWN, adapter->state)) + ixgbe_irq_enable(adapter, false, false); + + return IRQ_HANDLED; +} + +/** + * ixgbe_request_irq - initialize interrupts + * @adapter: board private structure + * + * Attempts to configure interrupts using the best available + * capabilities of the hardware and kernel. + **/ +static int ixgbe_request_irq(struct ixgbe_adapter *adapter) +{ + struct net_device *netdev = adapter->netdev; + int err; + + if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) + err = ixgbe_request_msix_irqs(adapter); + else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) + err = request_irq(adapter->pdev->irq, &ixgbe_intr, 0, + netdev->name, adapter); + else + err = request_irq(adapter->pdev->irq, &ixgbe_intr, IRQF_SHARED, + netdev->name, adapter); + + if (err) + e_err(probe, "request_irq failed, Error %d\n", err); + + return err; +} + +static void ixgbe_free_irq(struct ixgbe_adapter *adapter) +{ + int vector; + + if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) { + free_irq(adapter->pdev->irq, adapter); + return; + } + + if (!adapter->msix_entries) + return; + + for (vector = 0; vector < adapter->num_q_vectors; vector++) { + struct ixgbe_q_vector *q_vector = adapter->q_vector[vector]; + struct msix_entry *entry = &adapter->msix_entries[vector]; + + /* free only the irqs that were actually requested */ + if (!q_vector->rx.ring && !q_vector->tx.ring) + continue; + + free_irq(entry->vector, q_vector); + } + + free_irq(adapter->msix_entries[vector].vector, adapter); +} + +/** + * ixgbe_irq_disable - Mask off interrupt generation on the NIC + * @adapter: board private structure + **/ +static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter) +{ + switch (adapter->hw.mac.type) { + case ixgbe_mac_82598EB: + IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0); + break; + case ixgbe_mac_82599EB: + case ixgbe_mac_X540: + case ixgbe_mac_X550: + case ixgbe_mac_X550EM_x: + case ixgbe_mac_X550EM_a: + case ixgbe_mac_E610: + IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFF0000); + IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(0), ~0); + IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(1), ~0); + break; + default: + break; + } + IXGBE_WRITE_FLUSH(&adapter->hw); + if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) { + int vector; + + for (vector = 0; vector < adapter->num_q_vectors; vector++) + synchronize_irq(adapter->msix_entries[vector].vector); + + synchronize_irq(adapter->msix_entries[vector++].vector); + } else { + synchronize_irq(adapter->pdev->irq); + } +} + +/** + * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts + * @adapter: board private structure + * + **/ +static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter) +{ + struct ixgbe_q_vector *q_vector = adapter->q_vector[0]; + + ixgbe_write_eitr(q_vector); + + ixgbe_set_ivar(adapter, 0, 0, 0); + ixgbe_set_ivar(adapter, 1, 0, 0); + + e_info(hw, "Legacy interrupt IVAR setup done\n"); +} + +/** + * ixgbe_configure_tx_ring - Configure 8259x Tx ring after Reset + * @adapter: board private structure + * @ring: structure containing ring specific data + * + * Configure the Tx descriptor ring after a reset. + **/ +void ixgbe_configure_tx_ring(struct ixgbe_adapter *adapter, + struct ixgbe_ring *ring) +{ + struct ixgbe_hw *hw = &adapter->hw; + u64 tdba = ring->dma; + int wait_loop = 10; + u32 txdctl = IXGBE_TXDCTL_ENABLE; + u8 reg_idx = ring->reg_idx; + +#ifdef HAVE_AF_XDP_ZC_SUPPORT + ring->xsk_pool = NULL; + if (ring_is_xdp(ring)) + ring->xsk_pool = ixgbe_xsk_umem(adapter, ring); +#endif + /* disable queue to avoid issues while updating state */ + IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH); + IXGBE_WRITE_FLUSH(hw); + + IXGBE_WRITE_REG(hw, IXGBE_TDBAL(reg_idx), tdba & DMA_BIT_MASK(32)); + IXGBE_WRITE_REG(hw, IXGBE_TDBAH(reg_idx), tdba >> 32); + IXGBE_WRITE_REG(hw, IXGBE_TDLEN(reg_idx), + ring->count * sizeof(union ixgbe_adv_tx_desc)); + + /* disable head writeback */ + IXGBE_WRITE_REG(hw, IXGBE_TDWBAH(reg_idx), 0); + IXGBE_WRITE_REG(hw, IXGBE_TDWBAL(reg_idx), 0); + + /* reset head and tail pointers */ + IXGBE_WRITE_REG(hw, IXGBE_TDH(reg_idx), 0); + IXGBE_WRITE_REG(hw, IXGBE_TDT(reg_idx), 0); + ring->tail = adapter->io_addr + IXGBE_TDT(reg_idx); + + /* reset ntu and ntc to place SW in sync with hardwdare */ + ring->next_to_clean = 0; + ring->next_to_use = 0; + + /* + * set WTHRESH to encourage burst writeback, it should not be set + * higher than 1 when: + * - ITR is 0 as it could cause false TX hangs + * - ITR is set to > 100k int/sec and BQL is enabled + * + * In order to avoid issues WTHRESH + PTHRESH should always be equal + * to or less than the number of on chip descriptors, which is + * currently 40. + */ + if (!ring->q_vector || (ring->q_vector->itr < IXGBE_100K_ITR)) + txdctl |= (1 << 16); /* WTHRESH = 1 */ + else + txdctl |= (8 << 16); /* WTHRESH = 8 */ + + /* + * Setting PTHRESH to 32 both improves performance + * and avoids a TX hang with DFP enabled + */ + txdctl |= (1 << 8) | /* HTHRESH = 1 */ + 32; /* PTHRESH = 32 */ + + /* reinitialize flowdirector state */ + if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) { + ring->atr_sample_rate = adapter->atr_sample_rate; + ring->atr_count = 0; + set_bit(__IXGBE_TX_FDIR_INIT_DONE, &ring->state); + } else { + ring->atr_sample_rate = 0; + } + + /* initialize XPS */ + if (!test_and_set_bit(__IXGBE_TX_XPS_INIT_DONE, &ring->state)) { + struct ixgbe_q_vector *q_vector = ring->q_vector; + + if (q_vector) + netif_set_xps_queue(adapter->netdev, + &q_vector->affinity_mask, + ring->queue_index); + } + + clear_bit(__IXGBE_HANG_CHECK_ARMED, &ring->state); + + /* reinitialize tx_buffer_info */ + memset(ring->tx_buffer_info, 0, + sizeof(struct ixgbe_tx_buffer) * ring->count); + + /* enable queue */ + IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), txdctl); + + /* TXDCTL.EN will return 0 on 82598 if link is down, so skip it */ + if (hw->mac.type == ixgbe_mac_82598EB && + !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP)) + return; + + /* poll to verify queue is enabled */ + do { + msleep(1); + txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx)); + } while (--wait_loop && !(txdctl & IXGBE_TXDCTL_ENABLE)); + if (!wait_loop) + hw_dbg(hw, "Could not enable Tx Queue %d\n", reg_idx); +} + +static void ixgbe_setup_mtqc(struct ixgbe_adapter *adapter) +{ + struct ixgbe_hw *hw = &adapter->hw; + u32 rttdcs, mtqc; + u8 tcs = netdev_get_num_tc(adapter->netdev); + + if (hw->mac.type == ixgbe_mac_82598EB) + return; + + /* disable the arbiter while setting MTQC */ + rttdcs = IXGBE_READ_REG(hw, IXGBE_RTTDCS); + rttdcs |= IXGBE_RTTDCS_ARBDIS; + IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs); + + /* set transmit pool layout */ + if (adapter->flags & IXGBE_FLAG_VMDQ_ENABLED) { + mtqc = IXGBE_MTQC_VT_ENA; + if (tcs > 4) + mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ; + else if (tcs > 1) + mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ; + else if (adapter->ring_feature[RING_F_VMDQ].mask == + IXGBE_82599_VMDQ_4Q_MASK) + mtqc |= IXGBE_MTQC_32VF; + else + mtqc |= IXGBE_MTQC_64VF; + } else { + if (tcs > 4) { + mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ; + } else if (tcs > 1) { + mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ; + } else { + u8 max_txq = adapter->num_tx_queues + + adapter->num_xdp_queues; + if (max_txq > 63) + mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ; + else + mtqc = IXGBE_MTQC_64Q_1PB; + } + } + + IXGBE_WRITE_REG(hw, IXGBE_MTQC, mtqc); + + /* Enable Security TX Buffer IFG for multiple pb */ + if (tcs) { + u32 sectx = IXGBE_READ_REG(hw, IXGBE_SECTXMINIFG); + sectx |= IXGBE_SECTX_DCB; + IXGBE_WRITE_REG(hw, IXGBE_SECTXMINIFG, sectx); + } + + /* re-enable the arbiter */ + rttdcs &= ~IXGBE_RTTDCS_ARBDIS; + IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs); +} + +/** + * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset + * @adapter: board private structure + * + * Configure the Tx unit of the MAC after a reset. + **/ +static void ixgbe_configure_tx(struct ixgbe_adapter *adapter) +{ + struct ixgbe_hw *hw = &adapter->hw; + u32 dmatxctl; + u32 i; + +#ifdef CONFIG_NETDEVICES_MULTIQUEUE + if (adapter->num_tx_queues > 1) + adapter->netdev->features |= NETIF_F_MULTI_QUEUE; + else + adapter->netdev->features &= ~NETIF_F_MULTI_QUEUE; + +#endif + ixgbe_setup_mtqc(adapter); + + if (hw->mac.type != ixgbe_mac_82598EB) { + /* DMATXCTL.EN must be before Tx queues are enabled */ + dmatxctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL); + dmatxctl |= IXGBE_DMATXCTL_TE; + IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, dmatxctl); + } + + /* Setup the HW Tx Head and Tail descriptor pointers */ + for (i = 0; i < adapter->num_tx_queues; i++) + ixgbe_configure_tx_ring(adapter, adapter->tx_ring[i]); + for (i = 0; i < adapter->num_xdp_queues; i++) + ixgbe_configure_tx_ring(adapter, adapter->xdp_ring[i]); +} + +static void ixgbe_enable_rx_drop(struct ixgbe_adapter *adapter, + struct ixgbe_ring *ring) +{ + struct ixgbe_hw *hw = &adapter->hw; + u8 reg_idx = ring->reg_idx; + u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx)); + + srrctl |= IXGBE_SRRCTL_DROP_EN; + + IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl); +} + +static void ixgbe_disable_rx_drop(struct ixgbe_adapter *adapter, + struct ixgbe_ring *ring) +{ + struct ixgbe_hw *hw = &adapter->hw; + u8 reg_idx = ring->reg_idx; + u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx)); + + srrctl &= ~IXGBE_SRRCTL_DROP_EN; + + IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl); +} + +void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter) +{ + int i; + bool pfc_en = adapter->dcb_cfg.pfc_mode_enable; + +#ifdef HAVE_DCBNL_IEEE + if (adapter->ixgbe_ieee_pfc) + pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en); + +#endif + /* + * We should set the drop enable bit if: + * SR-IOV is enabled + * or + * Number of Rx queues > 1 and flow control is disabled + * + * This allows us to avoid head of line blocking for security + * and performance reasons. + */ + if (adapter->num_vfs || (adapter->num_rx_queues > 1 && + !(adapter->hw.fc.current_mode & ixgbe_fc_tx_pause) && !pfc_en)) { + for (i = 0; i < adapter->num_rx_queues; i++) + ixgbe_enable_rx_drop(adapter, adapter->rx_ring[i]); + } else { + for (i = 0; i < adapter->num_rx_queues; i++) + ixgbe_disable_rx_drop(adapter, adapter->rx_ring[i]); + } +} + +static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter, + struct ixgbe_ring *rx_ring) +{ + struct ixgbe_hw *hw = &adapter->hw; + u32 srrctl; + u8 reg_idx = rx_ring->reg_idx; + + if (hw->mac.type == ixgbe_mac_82598EB) { + u16 mask = adapter->ring_feature[RING_F_RSS].mask; + + /* program one srrctl register per VMDq index */ + if (adapter->flags & IXGBE_FLAG_VMDQ_ENABLED) + mask = adapter->ring_feature[RING_F_VMDQ].mask; + + /* + * if VMDq is not active we must program one srrctl register + * per RSS queue since we have enabled RDRXCTL.MVMEN + */ + reg_idx &= mask; + + /* divide by the first bit of the mask to get the indices */ + if (reg_idx) + reg_idx /= ((~mask) + 1) & mask; + } + + /* configure header buffer length, needed for RSC */ + srrctl = IXGBE_RX_HDR_SIZE << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT; + + /* configure the packet buffer length */ +#ifdef CONFIG_IXGBE_DISABLE_PACKET_SPLIT + srrctl |= ALIGN(rx_ring->rx_buf_len, 1024) >> + IXGBE_SRRCTL_BSIZEPKT_SHIFT; +#else +#ifdef HAVE_AF_XDP_ZC_SUPPORT + if (rx_ring->xsk_pool) { +#ifndef HAVE_MEM_TYPE_XSK_BUFF_POOL + u32 xsk_buf_len = rx_ring->xsk_pool->chunk_size_nohr - + XDP_PACKET_HEADROOM; +#else + u32 xsk_buf_len = xsk_pool_get_rx_frame_size(rx_ring->xsk_pool); +#endif /* HAVE_MEM_TYPE_XSK_BUFF_POOL */ + + /* If the MAC support setting RXDCTL.RLPML, the + * SRRCTL[n].BSIZEPKT is set to PAGE_SIZE and + * RXDCTL.RLPML is set to the actual UMEM buffer + * size. If not, then we are stuck with a 1k buffer + * size resolution. In this case frames larger than + * the UMEM buffer size viewed in a 1k resolution will + * be dropped. + */ + if (hw->mac.type != ixgbe_mac_82599EB) + srrctl |= PAGE_SIZE >> IXGBE_SRRCTL_BSIZEPKT_SHIFT; + else + srrctl |= xsk_buf_len >> IXGBE_SRRCTL_BSIZEPKT_SHIFT; + } else if (test_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state)) { +#else + if (test_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state)) { +#endif /* HAVE_AF_XDP_ZC_SUPPORT */ + srrctl |= IXGBE_RXBUFFER_3K >> IXGBE_SRRCTL_BSIZEPKT_SHIFT; + } else { + srrctl |= IXGBE_RXBUFFER_2K >> IXGBE_SRRCTL_BSIZEPKT_SHIFT; + } +#endif /* CONFIG_IXGBE_DISABLE_PACKET_SPLIT */ + + /* configure descriptor type */ + srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF; + + IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl); +} + +/** + * ixgbe_rss_indir_tbl_entries - Return RSS indirection table entries + * @adapter: device handle + * + * - 82598/82599/X540: 128 + * - X550(non-SRIOV mode): 512 + * - X550(SRIOV mode): 64 + */ +u32 ixgbe_rss_indir_tbl_entries(struct ixgbe_adapter *adapter) +{ + if (adapter->hw.mac.type < ixgbe_mac_X550) + return 128; + else if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) + return 64; + else + return 512; +} + +/** + * ixgbe_store_key - Write the RSS key to HW + * @adapter: device handle + * + * Write the RSS key stored in adapter.rss_key to HW. + */ +void ixgbe_store_key(struct ixgbe_adapter *adapter) +{ + struct ixgbe_hw *hw = &adapter->hw; + int i; + + for (i = 0; i < 10; i++) + IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), adapter->rss_key[i]); +} + +/** + * ixgbe_init_rss_key - Initialize adapter RSS key + * @adapter: device handle + * + * Allocates and initializes the RSS key if it is not allocated. + **/ +static inline int ixgbe_init_rss_key(struct ixgbe_adapter *adapter) +{ + u32 *rss_key; + + if (!adapter->rss_key) { + rss_key = kzalloc(IXGBE_RSS_KEY_SIZE, GFP_KERNEL); + if (unlikely(!rss_key)) + return -ENOMEM; + + netdev_rss_key_fill(rss_key, IXGBE_RSS_KEY_SIZE); + adapter->rss_key = rss_key; + } + + return 0; +} + +/** + * ixgbe_store_reta - Write the RETA table to HW + * @adapter: device handle + * + * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW. + */ +void ixgbe_store_reta(struct ixgbe_adapter *adapter) +{ + u32 i, reta_entries = ixgbe_rss_indir_tbl_entries(adapter); + struct ixgbe_hw *hw = &adapter->hw; + u32 reta = 0; + u32 indices_multi; + u8 *indir_tbl = adapter->rss_indir_tbl; + + /* Fill out the redirection table as follows: + * - 82598: 8 bit wide entries containing pair of 4 bit RSS + * indices. + * - 82599/X540: 8 bit wide entries containing 4 bit RSS index + * - X550: 8 bit wide entries containing 6 bit RSS index + */ + if (adapter->hw.mac.type == ixgbe_mac_82598EB) + indices_multi = 0x11; + else + indices_multi = 0x1; + + /* Write redirection table to HW */ + for (i = 0; i < reta_entries; i++) { + reta |= indices_multi * indir_tbl[i] << (i & 0x3) * 8; + if ((i & 3) == 3) { + if (i < 128) + IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta); + else + IXGBE_WRITE_REG(hw, IXGBE_ERETA((i >> 2) - 32), + reta); + reta = 0; + } + } +} + +/** + * ixgbe_store_vfreta - Write the RETA table to HW (x550 devices in SRIOV mode) + * @adapter: device handle + * + * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW. + */ +static void ixgbe_store_vfreta(struct ixgbe_adapter *adapter) +{ + u32 i, reta_entries = ixgbe_rss_indir_tbl_entries(adapter); + struct ixgbe_hw *hw = &adapter->hw; + u32 vfreta = 0; + unsigned int pf_pool = adapter->num_vfs; + + /* Write redirection table to HW */ + for (i = 0; i < reta_entries; i++) { + vfreta |= (u32)adapter->rss_indir_tbl[i] << (i & 0x3) * 8; + if ((i & 3) == 3) { + IXGBE_WRITE_REG(hw, IXGBE_PFVFRETA(i >> 2, pf_pool), + vfreta); + vfreta = 0; + } + } +} + +static void ixgbe_setup_reta(struct ixgbe_adapter *adapter) +{ + u32 i, j; + u32 reta_entries = ixgbe_rss_indir_tbl_entries(adapter); + u16 rss_i = adapter->ring_feature[RING_F_RSS].indices; + + /* Program table for at least 4 queues w/ SR-IOV so that VFs can + * make full use of any rings they may have. We will use the + * PSRTYPE register to control how many rings we use within the PF. + */ + if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) && (rss_i < 4)) + rss_i = 4; + + /* Fill out hash function seeds */ + ixgbe_store_key(adapter); + + /* Fill out redirection table */ + memset(adapter->rss_indir_tbl, 0, sizeof(adapter->rss_indir_tbl)); + + for (i = 0, j = 0; i < reta_entries; i++, j++) { + if (j == rss_i) + j = 0; + + adapter->rss_indir_tbl[i] = j; + } + + ixgbe_store_reta(adapter); +} + +static void ixgbe_setup_vfreta(struct ixgbe_adapter *adapter) +{ + struct ixgbe_hw *hw = &adapter->hw; + u16 rss_i = adapter->ring_feature[RING_F_RSS].indices; + unsigned int pf_pool = adapter->num_vfs; + int i, j; + + /* Fill out hash function seeds */ + for (i = 0; i < 10; i++) + IXGBE_WRITE_REG(hw, IXGBE_PFVFRSSRK(i, pf_pool), + *(adapter->rss_key + i)); + + /* Fill out the redirection table */ + for (i = 0, j = 0; i < 64; i++, j++) { + if (j == rss_i) + j = 0; + + adapter->rss_indir_tbl[i] = j; + } + + ixgbe_store_vfreta(adapter); +} + + +static void ixgbe_setup_mrqc(struct ixgbe_adapter *adapter) +{ + struct ixgbe_hw *hw = &adapter->hw; + u32 rxcsum; + u32 mrqc = 0, rss_field = 0; + u32 vfmrqc = 0; + + /* Disable indicating checksum in descriptor, enables RSS hash */ + rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM); + rxcsum |= IXGBE_RXCSUM_PCSD; + IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum); + + if (adapter->hw.mac.type == ixgbe_mac_82598EB) { + if (adapter->ring_feature[RING_F_RSS].mask) + mrqc = IXGBE_MRQC_RSSEN; + } else { + u8 tcs = netdev_get_num_tc(adapter->netdev); + + if (adapter->flags & IXGBE_FLAG_VMDQ_ENABLED) { + if (tcs > 4) + mrqc = IXGBE_MRQC_VMDQRT8TCEN; /* 8 TCs */ + else if (tcs > 1) + mrqc = IXGBE_MRQC_VMDQRT4TCEN; /* 4 TCs */ + else if (adapter->ring_feature[RING_F_VMDQ].mask == + IXGBE_82599_VMDQ_4Q_MASK) + mrqc = IXGBE_MRQC_VMDQRSS32EN; + else + mrqc = IXGBE_MRQC_VMDQRSS64EN; + } else { + if (tcs > 4) + mrqc = IXGBE_MRQC_RTRSS8TCEN; + else if (tcs > 1) + mrqc = IXGBE_MRQC_RTRSS4TCEN; + else + mrqc = IXGBE_MRQC_RSSEN; + } + + /* Enable L3/L4 for Tx Switched packets */ + mrqc |= IXGBE_MRQC_L3L4TXSWEN; + } + + /* Perform hash on these packet types */ + rss_field = IXGBE_MRQC_RSS_FIELD_IPV4 | + IXGBE_MRQC_RSS_FIELD_IPV4_TCP | + IXGBE_MRQC_RSS_FIELD_IPV6 | + IXGBE_MRQC_RSS_FIELD_IPV6_TCP; + + if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP) + rss_field |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP; + if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP) + rss_field |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP; + + if ((hw->mac.type >= ixgbe_mac_X550) && + (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)) { + unsigned int pf_pool = adapter->num_vfs; + + /* Enable VF RSS mode */ + mrqc |= IXGBE_MRQC_MULTIPLE_RSS; + IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc); + + /* Setup RSS through the VF registers */ + ixgbe_setup_vfreta(adapter); + vfmrqc = IXGBE_MRQC_RSSEN; + vfmrqc |= rss_field; + IXGBE_WRITE_REG(hw, IXGBE_PFVFMRQC(pf_pool), vfmrqc); + } else { + ixgbe_setup_reta(adapter); + mrqc |= rss_field; + IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc); + } +} + +/** + * ixgbe_clear_rscctl - disable RSC for the indicated ring + * @adapter: address of board private structure + * @ring: structure containing ring specific data + **/ +void ixgbe_clear_rscctl(struct ixgbe_adapter *adapter, + struct ixgbe_ring *ring) +{ + struct ixgbe_hw *hw = &adapter->hw; + u32 rscctrl; + u8 reg_idx = ring->reg_idx; + + rscctrl = IXGBE_READ_REG(hw, IXGBE_RSCCTL(reg_idx)); + rscctrl &= ~IXGBE_RSCCTL_RSCEN; + IXGBE_WRITE_REG(hw, IXGBE_RSCCTL(reg_idx), rscctrl); + + clear_ring_rsc_enabled(ring); +} + +/** + * ixgbe_configure_rscctl - enable RSC for the indicated ring + * @adapter: address of board private structure + * @ring: structure containing ring specific data + **/ +void ixgbe_configure_rscctl(struct ixgbe_adapter *adapter, + struct ixgbe_ring *ring) +{ + struct ixgbe_hw *hw = &adapter->hw; + u32 rscctrl; + u8 reg_idx = ring->reg_idx; + + if (!ring_is_rsc_enabled(ring)) + return; + + rscctrl = IXGBE_READ_REG(hw, IXGBE_RSCCTL(reg_idx)); + rscctrl |= IXGBE_RSCCTL_RSCEN; + /* + * we must limit the number of descriptors so that the + * total size of max desc * buf_len is not greater + * than 65536 + */ +#ifndef CONFIG_IXGBE_DISABLE_PACKET_SPLIT +#if (MAX_SKB_FRAGS >= 16) + rscctrl |= IXGBE_RSCCTL_MAXDESC_16; +#elif (MAX_SKB_FRAGS >= 8) + rscctrl |= IXGBE_RSCCTL_MAXDESC_8; +#elif (MAX_SKB_FRAGS >= 4) + rscctrl |= IXGBE_RSCCTL_MAXDESC_4; +#else + rscctrl |= IXGBE_RSCCTL_MAXDESC_1; +#endif +#else /* CONFIG_IXGBE_DISABLE_PACKET_SPLIT */ + if (ring->rx_buf_len <= IXGBE_RXBUFFER_4K) + rscctrl |= IXGBE_RSCCTL_MAXDESC_16; + else if (ring->rx_buf_len <= IXGBE_RXBUFFER_8K) + rscctrl |= IXGBE_RSCCTL_MAXDESC_8; + else + rscctrl |= IXGBE_RSCCTL_MAXDESC_4; +#endif /* !CONFIG_IXGBE_DISABLE_PACKET_SPLIT */ + IXGBE_WRITE_REG(hw, IXGBE_RSCCTL(reg_idx), rscctrl); +} + +static void ixgbe_rx_desc_queue_enable(struct ixgbe_adapter *adapter, + struct ixgbe_ring *ring) +{ + struct ixgbe_hw *hw = &adapter->hw; + int wait_loop = IXGBE_MAX_RX_DESC_POLL; + u32 rxdctl; + u8 reg_idx = ring->reg_idx; + + if (IXGBE_REMOVED(hw->hw_addr)) + return; + /* RXDCTL.EN will return 0 on 82598 if link is down, so skip it */ + if (hw->mac.type == ixgbe_mac_82598EB && + !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP)) + return; + + do { + msleep(1); + rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx)); + } while (--wait_loop && !(rxdctl & IXGBE_RXDCTL_ENABLE)); + + if (!wait_loop) { + e_err(drv, "RXDCTL.ENABLE on Rx queue %d " + "not set within the polling period\n", reg_idx); + } +} + +void ixgbe_configure_rx_ring(struct ixgbe_adapter *adapter, + struct ixgbe_ring *ring) +{ + struct ixgbe_hw *hw = &adapter->hw; + union ixgbe_adv_rx_desc *rx_desc; + u64 rdba = ring->dma; + u32 rxdctl; + u8 reg_idx = ring->reg_idx; + +#ifdef HAVE_AF_XDP_ZC_SUPPORT + xdp_rxq_info_unreg_mem_model(&ring->xdp_rxq); + ring->xsk_pool = ixgbe_xsk_umem(adapter, ring); + if (ring->xsk_pool) { +#ifndef HAVE_MEM_TYPE_XSK_BUFF_POOL + ring->zca.free = ixgbe_zca_free; +#endif + WARN_ON(xdp_rxq_info_reg_mem_model(&ring->xdp_rxq, +#ifndef HAVE_MEM_TYPE_XSK_BUFF_POOL + MEM_TYPE_ZERO_COPY, + &ring->zca)); +#else + MEM_TYPE_XSK_BUFF_POOL, + NULL)); + xsk_pool_set_rxq_info(ring->xsk_pool, &ring->xdp_rxq); +#endif /* HAVE_MEM_TYPE_XSK_BUFF_POOL */ + + } else { + WARN_ON(xdp_rxq_info_reg_mem_model(&ring->xdp_rxq, + MEM_TYPE_PAGE_SHARED, NULL)); + } + +#endif + /* disable queue to avoid use of these values while updating state */ + rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx)); + rxdctl &= ~IXGBE_RXDCTL_ENABLE; + + /* write value back with RXDCTL.ENABLE bit cleared */ + IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl); + IXGBE_WRITE_FLUSH(hw); + + IXGBE_WRITE_REG(hw, IXGBE_RDBAL(reg_idx), rdba & DMA_BIT_MASK(32)); + IXGBE_WRITE_REG(hw, IXGBE_RDBAH(reg_idx), rdba >> 32); + IXGBE_WRITE_REG(hw, IXGBE_RDLEN(reg_idx), + ring->count * sizeof(union ixgbe_adv_rx_desc)); + /* Force flushing of IXGBE_RDLEN to prevent MDD */ + IXGBE_WRITE_FLUSH(hw); + + /* reset head and tail pointers */ + IXGBE_WRITE_REG(hw, IXGBE_RDH(reg_idx), 0); + IXGBE_WRITE_REG(hw, IXGBE_RDT(reg_idx), 0); + ring->tail = adapter->io_addr + IXGBE_RDT(reg_idx); + + /* reset ntu and ntc to place SW in sync with hardwdare */ + ring->next_to_clean = 0; + ring->next_to_use = 0; +#ifndef CONFIG_IXGBE_DISABLE_PACKET_SPLIT + ring->next_to_alloc = 0; +#endif + + ixgbe_configure_srrctl(adapter, ring); + ixgbe_configure_rscctl(adapter, ring); + + switch (hw->mac.type) { + case ixgbe_mac_82598EB: + /* + * enable cache line friendly hardware writes: + * PTHRESH=32 descriptors (half the internal cache), + * this also removes ugly rx_no_buffer_count increment + * HTHRESH=4 descriptors (to minimize latency on fetch) + * WTHRESH=8 burst writeback up to two cache lines + */ + rxdctl &= ~0x3FFFFF; + rxdctl |= 0x080420; + break; + case ixgbe_mac_X540: + case ixgbe_mac_X550: + case ixgbe_mac_X550EM_x: + case ixgbe_mac_X550EM_a: + case ixgbe_mac_E610: +#ifndef CONFIG_IXGBE_DISABLE_PACKET_SPLIT +#if (PAGE_SIZE < 8192) + rxdctl &= ~(IXGBE_RXDCTL_RLPMLMASK | + IXGBE_RXDCTL_RLPML_EN); + + /* Limit the maximum frame size so we don't overrun the skb */ + if (ring_uses_build_skb(ring) && + !test_bit(__IXGBE_RX_3K_BUFFER, &ring->state)) + rxdctl |= IXGBE_MAX_2K_FRAME_BUILD_SKB | + IXGBE_RXDCTL_RLPML_EN; +#endif +#else /* CONFIG_IXGBE_DISABLE_PACKET_SPLIT */ + /* If operating in IOV mode set RLPML */ + if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)) + break; + rxdctl |= ring->rx_buf_len | IXGBE_RXDCTL_RLPML_EN; +#endif /* CONFIG_IXGBE_DISABLE_PACKET_SPLIT */ + break; + default: + break; + } + + ring->rx_offset = ixgbe_rx_offset(ring); +#ifdef HAVE_AF_XDP_ZC_SUPPORT + if (ring->xsk_pool && hw->mac.type != ixgbe_mac_82599EB) { +#ifndef HAVE_MEM_TYPE_XSK_BUFF_POOL + u32 xsk_buf_len = ring->xsk_pool->chunk_size_nohr - + XDP_PACKET_HEADROOM; +#else + u32 xsk_buf_len = xsk_pool_get_rx_frame_size(ring->xsk_pool); +#endif /* HAVE_MEM_TYPE_XSK_BUFF_POOL */ + + rxdctl &= ~(IXGBE_RXDCTL_RLPMLMASK | + IXGBE_RXDCTL_RLPML_EN); + rxdctl |= xsk_buf_len | IXGBE_RXDCTL_RLPML_EN; + + ring->rx_buf_len = xsk_buf_len; + } + +#endif + /* initialize rx_buffer_info */ + memset(ring->rx_buffer_info, 0, + sizeof(struct ixgbe_rx_buffer) * ring->count); + + /* initialize Rx descriptor 0 */ + rx_desc = IXGBE_RX_DESC(ring, 0); + rx_desc->wb.upper.length = 0; + + /* enable receive descriptor ring */ + rxdctl |= IXGBE_RXDCTL_ENABLE; + IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl); + + ixgbe_rx_desc_queue_enable(adapter, ring); +#ifdef HAVE_AF_XDP_ZC_SUPPORT + if (ring->xsk_pool) + ixgbe_alloc_rx_buffers_zc(ring, ixgbe_desc_unused(ring)); + else + ixgbe_alloc_rx_buffers(ring, ixgbe_desc_unused(ring)); +#else + ixgbe_alloc_rx_buffers(ring, ixgbe_desc_unused(ring)); +#endif /* HAVE_AF_XDP_ZC_SUPPORT */ +} + +static void ixgbe_setup_psrtype(struct ixgbe_adapter *adapter) +{ + struct ixgbe_hw *hw = &adapter->hw; + int rss_i = adapter->ring_feature[RING_F_RSS].indices; + int p; + + /* PSRTYPE must be initialized in non 82598 adapters */ + u32 psrtype = IXGBE_PSRTYPE_TCPHDR | + IXGBE_PSRTYPE_UDPHDR | + IXGBE_PSRTYPE_IPV4HDR | + IXGBE_PSRTYPE_L2HDR | + IXGBE_PSRTYPE_IPV6HDR; + + if (hw->mac.type == ixgbe_mac_82598EB) + return; + + if (rss_i > 3) + psrtype |= 2u << 29; + else if (rss_i > 1) + psrtype |= 1u << 29; + + for (p = 0; p < adapter->num_rx_pools; p++) + IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(VMDQ_P(p)), psrtype); +} + +/** + * ixgbe_configure_bridge_mode - common settings for configuring bridge mode + * @adapter: the private structure + * + * This function's purpose is to remove code duplication and configure some + * settings require to switch bridge modes. + **/ +static void ixgbe_configure_bridge_mode(struct ixgbe_adapter *adapter) +{ + struct ixgbe_hw * hw = &adapter->hw; + unsigned int p; + u32 vmdctl; + + if (adapter->flags & IXGBE_FLAG_SRIOV_VEPA_BRIDGE_MODE) { + /* disable Tx loopback, rely on switch hairpin mode */ + IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, 0); + + /* must enable Rx switching replication to allow multicast + * packet reception on all VFs, and to enable source address + * pruning. + */ + vmdctl = IXGBE_READ_REG(hw, IXGBE_VMD_CTL); + vmdctl |= IXGBE_VT_CTL_REPLEN; + IXGBE_WRITE_REG(hw, IXGBE_VMD_CTL, vmdctl); + + /* enable Rx source address pruning. Note, this requires + * replication to be enabled or else it does nothing. + */ + for (p = 0; p < (adapter->num_vfs + adapter->num_rx_pools); p++) { + if (hw->mac.ops.set_source_address_pruning) + hw->mac.ops.set_source_address_pruning(hw, + true, + p); + } + } else { + /* enable Tx loopback for internal VF/PF communication */ + IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, IXGBE_PFDTXGSWC_VT_LBEN); + + /* disable Rx switching replication unless we have SR-IOV + * virtual functions + */ + vmdctl = IXGBE_READ_REG(hw, IXGBE_VMD_CTL); + if (!adapter->num_vfs) + vmdctl &= ~IXGBE_VT_CTL_REPLEN; + IXGBE_WRITE_REG(hw, IXGBE_VMD_CTL, vmdctl); + + /* disable Rx source address pruning, since we don't expect to + * be receiving external loopback of our transmitted frames. + */ + for (p = 0; p < (adapter->num_vfs + adapter->num_rx_pools); p++) { + if (hw->mac.ops.set_source_address_pruning) + hw->mac.ops.set_source_address_pruning(hw, + false, + p); + } + } + +} + +static void ixgbe_configure_virtualization(struct ixgbe_adapter *adapter) +{ + struct ixgbe_hw *hw = &adapter->hw; + u32 reg_offset, vf_shift, vmolr; + u32 gcr_ext, vmdctl; + int i; + + if (!(adapter->flags & IXGBE_FLAG_VMDQ_ENABLED)) + return; + + switch (hw->mac.type) { + case ixgbe_mac_82598EB: + vmdctl = IXGBE_READ_REG(hw, IXGBE_VMD_CTL); + vmdctl |= IXGBE_VMD_CTL_VMDQ_EN; + IXGBE_WRITE_REG(hw, IXGBE_VMD_CTL, vmdctl); + break; + case ixgbe_mac_82599EB: + case ixgbe_mac_X540: + case ixgbe_mac_X550: + case ixgbe_mac_X550EM_x: + case ixgbe_mac_X550EM_a: + case ixgbe_mac_E610: + vmdctl = IXGBE_READ_REG(hw, IXGBE_VT_CTL); + vmdctl |= IXGBE_VT_CTL_VT_ENABLE; + vmdctl &= ~IXGBE_VT_CTL_POOL_MASK; + vmdctl |= VMDQ_P(0) << IXGBE_VT_CTL_POOL_SHIFT; + if (adapter->num_vfs) + vmdctl |= IXGBE_VT_CTL_REPLEN; + IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, vmdctl); + + for (i = 1; i < adapter->num_rx_pools; i++) { + int pool = VMDQ_P(i); + + /* accept untagged packets until a vlan tag is + * specifically set for the VMDQ queue/pool + */ + vmolr = IXGBE_READ_REG(hw, IXGBE_VMOLR(pool)); + vmolr |= IXGBE_VMOLR_AUPE; + IXGBE_WRITE_REG(hw, IXGBE_VMOLR(pool), vmolr); + } + + vf_shift = VMDQ_P(0) % 32; + reg_offset = (VMDQ_P(0) >= 32) ? 1 : 0; + + /* Enable only the PF pools for Tx/Rx */ + IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset), (~0) << vf_shift); + IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset ^ 1), reg_offset - 1); + IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset), (~0) << vf_shift); + IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset ^ 1), reg_offset - 1); + + /* clear VLAN promisc flag so VFTA + * will be updated if necessary + */ + adapter->flags2 &= ~IXGBE_FLAG2_VLAN_PROMISC; + break; + default: + break; + } + + if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)) + return; + + /* + * Set up VF register offsets for selected VT Mode, + * i.e. 32 or 64 VFs for SR-IOV + */ + switch (adapter->ring_feature[RING_F_VMDQ].mask) { + case IXGBE_82599_VMDQ_8Q_MASK: + gcr_ext = IXGBE_GCR_EXT_VT_MODE_16; + break; + case IXGBE_82599_VMDQ_4Q_MASK: + gcr_ext = IXGBE_GCR_EXT_VT_MODE_32; + break; + default: + gcr_ext = IXGBE_GCR_EXT_VT_MODE_64; + break; + } + + IXGBE_WRITE_REG(hw, IXGBE_GCR_EXT, gcr_ext); + + /* configure default bridge settings */ + ixgbe_configure_bridge_mode(adapter); +#if IS_ENABLED(CONFIG_PCI_IOV) + for (i = 0; i < adapter->num_vfs; i++) { + /* configure spoof checking */ + ixgbe_ndo_set_vf_spoofchk(adapter->netdev, i, + adapter->vfinfo[i].spoofchk_enabled); + +#ifdef HAVE_NDO_SET_VF_RSS_QUERY_EN + /* Enable/Disable RSS query feature */ + ixgbe_ndo_set_vf_rss_query_en(adapter->netdev, i, + adapter->vfinfo[i].rss_query_enabled); +#endif /* HAVE_NDO_SET_VF_RSS_QUERY_EN */ + } +#endif /* CONFIG_PCI_IOV */ +} + +static void ixgbe_set_rx_buffer_len(struct ixgbe_adapter *adapter) +{ + struct ixgbe_hw *hw = &adapter->hw; + struct net_device *netdev = adapter->netdev; + int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN; + struct ixgbe_ring *rx_ring; + int i; + u32 mhadd, hlreg0; +#ifdef CONFIG_IXGBE_DISABLE_PACKET_SPLIT + int rx_buf_len; +#endif + + switch (hw->mac.type) { + case ixgbe_mac_X550: + case ixgbe_mac_X550EM_x: + case ixgbe_mac_X550EM_a: + case ixgbe_mac_E610: + max_frame += IXGBE_TS_HDR_LEN; + default: + break; + } + +#if IS_ENABLED(CONFIG_FCOE) + /* adjust max frame to be able to do baby jumbo for FCoE */ + if ((adapter->flags & IXGBE_FLAG_FCOE_ENABLED) && + (max_frame < IXGBE_FCOE_JUMBO_FRAME_SIZE)) + max_frame = IXGBE_FCOE_JUMBO_FRAME_SIZE; +#endif /* CONFIG_FCOE */ + + /* adjust max frame to be at least the size of a standard frame */ + if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN)) + max_frame = (ETH_FRAME_LEN + ETH_FCS_LEN); + + mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD); + if (max_frame != (mhadd >> IXGBE_MHADD_MFS_SHIFT)) { + mhadd &= ~IXGBE_MHADD_MFS_MASK; + mhadd |= max_frame << IXGBE_MHADD_MFS_SHIFT; + + IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd); + } + +#ifdef CONFIG_IXGBE_DISABLE_PACKET_SPLIT + /* MHADD will allow an extra 4 bytes past for vlan tagged frames */ + max_frame += VLAN_HLEN; + + if (!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) && + (max_frame <= MAXIMUM_ETHERNET_VLAN_SIZE)) { + rx_buf_len = MAXIMUM_ETHERNET_VLAN_SIZE; + /* + * Make best use of allocation by using all but 1K of a + * power of 2 allocation that will be used for skb->head. + */ + } else if (max_frame <= IXGBE_RXBUFFER_3K) { + rx_buf_len = IXGBE_RXBUFFER_3K; + } else if (max_frame <= IXGBE_RXBUFFER_7K) { + rx_buf_len = IXGBE_RXBUFFER_7K; + } else if (max_frame <= IXGBE_RXBUFFER_15K) { + rx_buf_len = IXGBE_RXBUFFER_15K; + } else { + rx_buf_len = IXGBE_MAX_RXBUFFER; + } + +#endif /* CONFIG_IXGBE_DISABLE_PACKET_SPLIT */ + hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0); + /* set jumbo enable since MHADD.MFS is keeping size locked at + * max_frame + */ + hlreg0 |= IXGBE_HLREG0_JUMBOEN; + IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0); + + /* + * Setup the HW Rx Head and Tail Descriptor Pointers and + * the Base and Length of the Rx Descriptor Ring + */ + for (i = 0; i < adapter->num_rx_queues; i++) { + rx_ring = adapter->rx_ring[i]; + + clear_ring_rsc_enabled(rx_ring); + if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) + set_ring_rsc_enabled(rx_ring); + +#ifndef CONFIG_IXGBE_DISABLE_PACKET_SPLIT + clear_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state); + clear_bit(__IXGBE_RX_BUILD_SKB_ENABLED, &rx_ring->state); +#if IS_ENABLED(CONFIG_FCOE) + + if (test_bit(__IXGBE_RX_FCOE, &rx_ring->state)) + set_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state); +#endif +#ifdef HAVE_SWIOTLB_SKIP_CPU_SYNC + + if (adapter->flags2 & IXGBE_FLAG2_RX_LEGACY) + continue; + + set_bit(__IXGBE_RX_BUILD_SKB_ENABLED, &rx_ring->state); + +#if (PAGE_SIZE < 8192) + if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) + set_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state); + + if (IXGBE_2K_TOO_SMALL_WITH_PADDING || + (max_frame > (ETH_FRAME_LEN + ETH_FCS_LEN))) + set_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state); +#endif +#else /* !HAVE_SWIOTLB_SKIP_CPU_SYNC */ + + adapter->flags2 |= IXGBE_FLAG2_RX_LEGACY; +#endif /* !HAVE_SWIOTLB_SKIP_CPU_SYNC */ +#else /* CONFIG_IXGBE_DISABLE_PACKET_SPLIT */ + + rx_ring->rx_buf_len = rx_buf_len; +#if IS_ENABLED(CONFIG_FCOE) + + if (test_bit(__IXGBE_RX_FCOE, &rx_ring->state) && + (rx_buf_len < IXGBE_FCOE_JUMBO_FRAME_SIZE)) + rx_ring->rx_buf_len = IXGBE_FCOE_JUMBO_FRAME_SIZE; +#endif /* CONFIG_FCOE */ +#endif /* CONFIG_IXGBE_DISABLE_PACKET_SPLIT */ + } +} + +static void ixgbe_setup_rdrxctl(struct ixgbe_adapter *adapter) +{ + struct ixgbe_hw *hw = &adapter->hw; + u32 rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL); + + switch (hw->mac.type) { + case ixgbe_mac_X550: + case ixgbe_mac_X550EM_x: + case ixgbe_mac_X550EM_a: + case ixgbe_mac_E610: + if (adapter->num_vfs) + rdrxctl |= IXGBE_RDRXCTL_PSP; + fallthrough; + case ixgbe_mac_82599EB: + case ixgbe_mac_X540: + /* Disable RSC for ACK packets */ + IXGBE_WRITE_REG(hw, IXGBE_RSCDBU, + (IXGBE_RSCDBU_RSCACKDIS | IXGBE_READ_REG(hw, IXGBE_RSCDBU))); + rdrxctl &= ~IXGBE_RDRXCTL_RSCFRSTSIZE; + /* hardware requires some bits to be set by default */ + rdrxctl |= (IXGBE_RDRXCTL_RSCACKC | IXGBE_RDRXCTL_FCOE_WRFIX); + rdrxctl |= IXGBE_RDRXCTL_CRCSTRIP; + break; + case ixgbe_mac_82598EB: + /* + * For VMDq support of different descriptor types or + * buffer sizes through the use of multiple SRRCTL + * registers, RDRXCTL.MVMEN must be set to 1 + * + * also, the manual doesn't mention it clearly but DCA hints + * will only use queue 0's tags unless this bit is set. Side + * effects of setting this bit are only that SRRCTL must be + * fully programmed [0..15] + */ + rdrxctl |= IXGBE_RDRXCTL_MVMEN; + break; + default: + /* We should do nothing since we don't know this hardware */ + return; + } + + IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl); +} + +/** + * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset + * @adapter: board private structure + * + * Configure the Rx unit of the MAC after a reset. + **/ +static void ixgbe_configure_rx(struct ixgbe_adapter *adapter) +{ + struct ixgbe_hw *hw = &adapter->hw; + int i; + u32 rxctrl, rfctl; + + /* disable receives while setting up the descriptors */ + ixgbe_disable_rx(hw); + + ixgbe_setup_psrtype(adapter); + ixgbe_setup_rdrxctl(adapter); + + /* RSC Setup */ + rfctl = IXGBE_READ_REG(hw, IXGBE_RFCTL); + rfctl &= ~IXGBE_RFCTL_RSC_DIS; + if (!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) + rfctl |= IXGBE_RFCTL_RSC_DIS; + + /* disable NFS filtering */ + rfctl |= (IXGBE_RFCTL_NFSW_DIS | IXGBE_RFCTL_NFSR_DIS); + IXGBE_WRITE_REG(hw, IXGBE_RFCTL, rfctl); + + /* Program registers for the distribution of queues */ + ixgbe_setup_mrqc(adapter); + + /* set_rx_buffer_len must be called before ring initialization */ + ixgbe_set_rx_buffer_len(adapter); + + /* + * Setup the HW Rx Head and Tail Descriptor Pointers and + * the Base and Length of the Rx Descriptor Ring + */ + for (i = 0; i < adapter->num_rx_queues; i++) + ixgbe_configure_rx_ring(adapter, adapter->rx_ring[i]); + + rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL); + /* disable drop enable for 82598 parts */ + if (hw->mac.type == ixgbe_mac_82598EB) + rxctrl |= IXGBE_RXCTRL_DMBYPS; + + /* enable all receives */ + rxctrl |= IXGBE_RXCTRL_RXEN; + hw->mac.ops.enable_rx_dma(hw, rxctrl); +} + +#if defined(NETIF_F_HW_VLAN_TX) || defined(NETIF_F_HW_VLAN_CTAG_TX) +/** + * ixgbe_vlan_rx_add_vid - Add a VLAN ID to the ixgbe device's filter table + * @netdev: Network device structure pointer + * @proto: Protocol identifier (used if NETIF_F_HW_VLAN_CTAG_TX is defined) + * @vid: VLAN ID to be added + * + * This function adds a specified VLAN ID to the ixgbe network adapter's + * VLAN filter table. It configures the hardware to recognize the VLAN ID + * and, if applicable, enables it for all receive pools. The function also + * updates the VLAN device's features to match those of the main network + * device, allowing features like TSO to be applied to VLAN traffic. + * + * Return: 0 on success (if HAVE_INT_NDO_VLAN_RX_ADD_VID is defined). + */ +#ifdef HAVE_INT_NDO_VLAN_RX_ADD_VID +#ifdef NETIF_F_HW_VLAN_CTAG_TX +static int ixgbe_vlan_rx_add_vid(struct net_device *netdev, + __always_unused __be16 proto, u16 vid) +#else /* !NETIF_F_HW_VLAN_CTAG_TX */ +static int ixgbe_vlan_rx_add_vid(struct net_device *netdev, u16 vid) +#endif /* NETIF_F_HW_VLAN_CTAG_TX */ +#else /* !HAVE_INT_NDO_VLAN_RX_ADD_VID */ +static void ixgbe_vlan_rx_add_vid(struct net_device *netdev, u16 vid) +#endif /* HAVE_INT_NDO_VLAN_RX_ADD_VID */ +{ + struct ixgbe_adapter *adapter = netdev_priv(netdev); + struct ixgbe_hw *hw = &adapter->hw; + int pool_ndx = VMDQ_P(0); + + /* add VID to filter table */ + if (hw->mac.ops.set_vfta) { +#ifndef HAVE_VLAN_RX_REGISTER + if (vid < VLAN_N_VID) + set_bit(vid, adapter->active_vlans); +#endif + + if (!vid || !(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC)) + hw->mac.ops.set_vfta(hw, vid, pool_ndx, true, !!vid); + + if (adapter->flags & IXGBE_FLAG_VMDQ_ENABLED && + adapter->hw.mac.type != ixgbe_mac_82598EB) { + int i; + + /* enable vlan id for all pools */ + for (i = 1; i < adapter->num_rx_pools; i++) + hw->mac.ops.set_vfta(hw, vid, VMDQ_P(i), true, +#ifdef HAVE_VLAN_RX_REGISTER + false); +#else + true); +#endif + } + } +#ifndef HAVE_NETDEV_VLAN_FEATURES + + /* + * Copy feature flags from netdev to the vlan netdev for this vid. + * This allows things like TSO to bubble down to our vlan device. + * Some vlans, such as VLAN 0 for DCB will not have a v_netdev so + * we will not have a netdev that needs updating. + */ + if (adapter->vlgrp) { + struct vlan_group *vlgrp = adapter->vlgrp; + struct net_device *v_netdev = vlan_group_get_device(vlgrp, vid); + if (v_netdev) { + v_netdev->features |= netdev->features; + vlan_group_set_device(vlgrp, vid, v_netdev); + } + } +#endif /* HAVE_NETDEV_VLAN_FEATURES */ +#ifdef HAVE_INT_NDO_VLAN_RX_ADD_VID + return 0; +#endif +} + +#if defined(HAVE_VLAN_RX_REGISTER) && defined(CONFIG_PCI_IOV) +int ixgbe_find_vlvf_entry(struct ixgbe_hw *hw, u32 vlan) +#else +static int ixgbe_find_vlvf_entry(struct ixgbe_hw *hw, u32 vlan) +#endif +{ + u32 vlvf; + int idx; + + /* short cut the special case */ + if (vlan == 0) + return 0; + + /* Search for the vlan id in the VLVF entries */ + for (idx = IXGBE_VLVF_ENTRIES; --idx;) { + vlvf = IXGBE_READ_REG(hw, IXGBE_VLVF(idx)); + if ((vlvf & VLAN_VID_MASK) == vlan) + break; + } + + return idx; +} + +void ixgbe_update_pf_promisc_vlvf(struct ixgbe_adapter *adapter, u32 vid) +{ + struct ixgbe_hw *hw = &adapter->hw; + u32 bits, word; + int idx; + + idx = ixgbe_find_vlvf_entry(hw, vid); + if (!idx) + return; + + /* See if any other pools are set for this VLAN filter + * entry other than the PF. + */ + word = idx * 2 + (VMDQ_P(0) / 32); + bits = ~(1 << (VMDQ_P(0)) % 32); + bits &= IXGBE_READ_REG(hw, IXGBE_VLVFB(word)); + + /* Disable the filter so this falls into the default pool. */ + if (!bits && !IXGBE_READ_REG(hw, IXGBE_VLVFB(word ^ 1))) { + if (!(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC)) + IXGBE_WRITE_REG(hw, IXGBE_VLVFB(word), 0); + IXGBE_WRITE_REG(hw, IXGBE_VLVF(idx), 0); + } +} + +/** + * ixgbe_vlan_rx_kill_vid - Remove a VLAN ID from the ixgbe device's filter table + * @netdev: Network device structure pointer + * @proto: Protocol identifier (used if NETIF_F_HW_VLAN_CTAG_RX is defined) + * @vid: VLAN ID to be removed + * + * This function removes a specified VLAN ID from the ixgbe network adapter's + * VLAN filter table. It ensures that VLAN ID 0 is not removed, as it is reserved. + * The function also updates the VLAN group and clears the VLAN ID from all + * receive pools if applicable. Interrupts are managed to ensure consistent + * state during the operation. + * + * Return: 0 on success (if HAVE_INT_NDO_VLAN_RX_ADD_VID is defined). + */ +#ifdef HAVE_INT_NDO_VLAN_RX_ADD_VID +#ifdef NETIF_F_HW_VLAN_CTAG_RX +static int ixgbe_vlan_rx_kill_vid(struct net_device *netdev, + __always_unused __be16 proto, u16 vid) +#else /* !NETIF_F_HW_VLAN_CTAG_RX */ +static int ixgbe_vlan_rx_kill_vid(struct net_device *netdev, u16 vid) +#endif /* NETIF_F_HW_VLAN_CTAG_RX */ +#else +static void ixgbe_vlan_rx_kill_vid(struct net_device *netdev, u16 vid) +#endif +{ + struct ixgbe_adapter *adapter = netdev_priv(netdev); + struct ixgbe_hw *hw = &adapter->hw; + int pool_ndx = VMDQ_P(0); + + /* User is not allowed to remove vlan ID 0 */ + if (!vid) +#ifdef HAVE_INT_NDO_VLAN_RX_ADD_VID + return 0; +#else + return; +#endif + +#ifdef HAVE_VLAN_RX_REGISTER + if (!test_bit(__IXGBE_DOWN, adapter->state)) + ixgbe_irq_disable(adapter); + + vlan_group_set_device(adapter->vlgrp, vid, NULL); + + if (!test_bit(__IXGBE_DOWN, adapter->state)) + ixgbe_irq_enable(adapter, true, true); + +#endif /* HAVE_VLAN_RX_REGISTER */ + /* remove VID from filter table */ + if (hw->mac.ops.set_vfta) { + if (vid && !(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC)) + hw->mac.ops.set_vfta(hw, vid, pool_ndx, false, true); + + if (adapter->flags & IXGBE_FLAG_VMDQ_ENABLED && + adapter->hw.mac.type != ixgbe_mac_82598EB) { + int i; + + /* remove vlan id from all pools */ + for (i = 1; i < adapter->num_rx_pools; i++) + hw->mac.ops.set_vfta(hw, vid, VMDQ_P(i), false, + true); + } + } +#ifndef HAVE_VLAN_RX_REGISTER + + clear_bit(vid, adapter->active_vlans); +#endif +#ifdef HAVE_INT_NDO_VLAN_RX_ADD_VID + return 0; +#endif +} + +#ifdef HAVE_8021P_SUPPORT +/** + * ixgbe_vlan_strip_disable - helper to disable vlan tag stripping + * @adapter: driver data + */ +void ixgbe_vlan_strip_disable(struct ixgbe_adapter *adapter) +{ + struct ixgbe_hw *hw = &adapter->hw; + u32 vlnctrl; + int i, j; + + /* leave vlan tag stripping enabled for DCB */ + if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) + return; + + switch (hw->mac.type) { + case ixgbe_mac_82598EB: + vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL); + vlnctrl &= ~IXGBE_VLNCTRL_VME; + IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl); + break; + case ixgbe_mac_82599EB: + case ixgbe_mac_X540: + case ixgbe_mac_X550: + case ixgbe_mac_X550EM_x: + case ixgbe_mac_X550EM_a: + case ixgbe_mac_E610: + for (i = 0; i < adapter->num_rx_queues; i++) { + struct ixgbe_ring *ring = adapter->rx_ring[i]; + + j = ring->reg_idx; + vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j)); + vlnctrl &= ~IXGBE_RXDCTL_VME; + IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl); + } +#ifdef HAVE_PTP_1588_CLOCK + if (ixgbe_is_mac_E6xx(hw->mac.type) && + hw->dev_caps.common_cap.ptp_by_phy_ll) + ixgbe_ptp_cfg_phy_vlan_e600(adapter, true); +#endif /* HAVE_PTP_1588_CLOCK */ + break; + default: + break; + } +} + +#endif /* HAVE_8021P_SUPPORT */ +/** + * ixgbe_vlan_strip_enable - helper to enable vlan tag stripping + * @adapter: driver data + */ +void ixgbe_vlan_strip_enable(struct ixgbe_adapter *adapter) +{ + struct ixgbe_hw *hw = &adapter->hw; + u32 vlnctrl; + int i, j; + + switch (hw->mac.type) { + case ixgbe_mac_82598EB: + vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL); + vlnctrl |= IXGBE_VLNCTRL_VME; + IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl); + break; + case ixgbe_mac_82599EB: + case ixgbe_mac_X540: + case ixgbe_mac_X550: + case ixgbe_mac_X550EM_x: + case ixgbe_mac_X550EM_a: + case ixgbe_mac_E610: + for (i = 0; i < adapter->num_rx_queues; i++) { + struct ixgbe_ring *ring = adapter->rx_ring[i]; + + j = ring->reg_idx; + vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j)); + vlnctrl |= IXGBE_RXDCTL_VME; + IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl); + } +#ifdef HAVE_PTP_1588_CLOCK + if (ixgbe_is_mac_E6xx(hw->mac.type) && + hw->dev_caps.common_cap.ptp_by_phy_ll) + ixgbe_ptp_cfg_phy_vlan_e600(adapter, false); +#endif /* HAVE_PTP_1588_CLOCK */ + break; + default: + break; + } +} + +#ifndef HAVE_VLAN_RX_REGISTER +static void ixgbe_vlan_promisc_enable(struct ixgbe_adapter *adapter) +{ + struct ixgbe_hw *hw = &adapter->hw; + u32 vlnctrl, i; + + vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL); + + if (adapter->flags & IXGBE_FLAG_VMDQ_ENABLED) { + /* we need to keep the VLAN filter on in SRIOV */ + vlnctrl |= IXGBE_VLNCTRL_VFE; + IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl); + } else { + vlnctrl &= ~IXGBE_VLNCTRL_VFE; + IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl); + return; + } + + /* Nothing to do for 82598 */ + if (hw->mac.type == ixgbe_mac_82598EB) + return; + + /* We are already in VLAN promisc, nothing to do */ + if (adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC) + return; + + /* Set flag so we don't redo unnecessary work */ + adapter->flags2 |= IXGBE_FLAG2_VLAN_PROMISC; + + /* Add PF to all active pools */ + for (i = IXGBE_VLVF_ENTRIES; --i;) { + u32 reg_offset = IXGBE_VLVFB(i * 2 + VMDQ_P(0) / 32); + u32 vlvfb = IXGBE_READ_REG(hw, reg_offset); + + vlvfb |= 1 << (VMDQ_P(0) % 32); + IXGBE_WRITE_REG(hw, reg_offset, vlvfb); + } + + /* Set all bits in the VLAN filter table array */ + for (i = hw->mac.vft_size; i--;) + IXGBE_WRITE_REG(hw, IXGBE_VFTA(i), ~0U); +} + +#define VFTA_BLOCK_SIZE 8 +static void ixgbe_scrub_vfta(struct ixgbe_adapter *adapter, u32 vfta_offset) +{ + struct ixgbe_hw *hw = &adapter->hw; + u32 vfta[VFTA_BLOCK_SIZE] = { 0 }; + u32 vid_start = vfta_offset * 32; + u32 vid_end = vid_start + (VFTA_BLOCK_SIZE * 32); + u32 i, vid, word, bits; + + for (i = IXGBE_VLVF_ENTRIES; --i;) { + u32 vlvf = IXGBE_READ_REG(hw, IXGBE_VLVF(i)); + + /* pull VLAN ID from VLVF */ + vid = vlvf & VLAN_VID_MASK; + + /* only concern outselves with a certain range */ + if (vid < vid_start || vid >= vid_end) + continue; + + if (vlvf) { + /* record VLAN ID in VFTA */ + vfta[(vid - vid_start) / 32] |= 1 << (vid % 32); + + /* if PF is part of this then continue */ + if (test_bit(vid, adapter->active_vlans)) + continue; + } + + /* remove PF from the pool */ + word = i * 2 + VMDQ_P(0) / 32; + bits = ~(1 << (VMDQ_P(0) % 32)); + bits &= IXGBE_READ_REG(hw, IXGBE_VLVFB(word)); + IXGBE_WRITE_REG(hw, IXGBE_VLVFB(word), bits); + } + + /* extract values from active_vlans and write back to VFTA */ + for (i = VFTA_BLOCK_SIZE; i--;) { + vid = (vfta_offset + i) * 32; + word = vid / BITS_PER_LONG; + bits = vid % BITS_PER_LONG; + + vfta[i] |= adapter->active_vlans[word] >> bits; + + IXGBE_WRITE_REG(hw, IXGBE_VFTA(vfta_offset + i), vfta[i]); + } +} + +static void ixgbe_vlan_promisc_disable(struct ixgbe_adapter *adapter) +{ + struct ixgbe_hw *hw = &adapter->hw; + u32 vlnctrl, i; + + /* configure vlan filtering */ + vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL); + vlnctrl |= IXGBE_VLNCTRL_VFE; + IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl); + + if (!(adapter->flags & IXGBE_FLAG_VMDQ_ENABLED) || + hw->mac.type == ixgbe_mac_82598EB) + return; + + /* We are not in VLAN promisc, nothing to do */ + if (!(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC)) + return; + + /* Set flag so we don't redo unnecessary work */ + adapter->flags2 &= ~IXGBE_FLAG2_VLAN_PROMISC; + + for (i = 0; i < hw->mac.vft_size; i += VFTA_BLOCK_SIZE) + ixgbe_scrub_vfta(adapter, i); +} +#endif /* HAVE_VLAN_RX_REGISTER */ + +#ifdef HAVE_VLAN_RX_REGISTER +static void ixgbe_vlan_mode(struct net_device *netdev, struct vlan_group *grp) +#else +void ixgbe_vlan_mode(struct net_device *netdev, u32 features) +#endif +{ +#if defined(HAVE_VLAN_RX_REGISTER) || defined(HAVE_8021P_SUPPORT) + struct ixgbe_adapter *adapter = netdev_priv(netdev); +#endif +#ifdef HAVE_8021P_SUPPORT + bool enable; +#endif + +#ifdef HAVE_VLAN_RX_REGISTER + if (!test_bit(__IXGBE_DOWN, adapter->state)) + ixgbe_irq_disable(adapter); + + adapter->vlgrp = grp; + + if (!test_bit(__IXGBE_DOWN, adapter->state)) + ixgbe_irq_enable(adapter, true, true); +#endif +#ifdef HAVE_8021P_SUPPORT +#ifdef HAVE_VLAN_RX_REGISTER + enable = (grp || (adapter->flags & IXGBE_FLAG_DCB_ENABLED)); +#else +#ifdef NETIF_F_HW_VLAN_CTAG_RX + enable = !!(features & NETIF_F_HW_VLAN_CTAG_RX); +#else + enable = !!(features & NETIF_F_HW_VLAN_RX); +#endif /* NETIF_F_HW_VLAN_CTAG_RX */ +#endif /* HAVE_VLAN_RX_REGISTER */ + if (enable) + /* enable VLAN tag insert/strip */ + ixgbe_vlan_strip_enable(adapter); + else + /* disable VLAN tag insert/strip */ + ixgbe_vlan_strip_disable(adapter); + +#endif /* HAVE_8021P_SUPPORT */ +} + +static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter) +{ + u16 vid = 1; +#ifdef HAVE_VLAN_RX_REGISTER + + ixgbe_vlan_mode(adapter->netdev, adapter->vlgrp); + + /* + * add vlan ID 0 and enable vlan tag stripping so we + * always accept priority-tagged traffic + */ +#ifdef NETIF_F_HW_VLAN_CTAG_RX + ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0); +#else + ixgbe_vlan_rx_add_vid(adapter->netdev, 0); +#endif +#ifndef HAVE_8021P_SUPPORT + ixgbe_vlan_strip_enable(adapter); +#endif + + if (adapter->vlgrp) { + for (; vid < VLAN_N_VID; vid++) { + if (!vlan_group_get_device(adapter->vlgrp, vid)) + continue; +#ifdef NETIF_F_HW_VLAN_CTAG_RX + ixgbe_vlan_rx_add_vid(adapter->netdev, + htons(ETH_P_8021Q), vid); +#else + ixgbe_vlan_rx_add_vid(adapter->netdev, vid); +#endif + } + } +#else /* !HAVE_VLAN_RX_REGISTER */ + +#ifdef NETIF_F_HW_VLAN_CTAG_RX + ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0); +#else + ixgbe_vlan_rx_add_vid(adapter->netdev, 0); +#endif + + for_each_set_bit_from(vid, adapter->active_vlans, VLAN_N_VID) +#ifdef NETIF_F_HW_VLAN_CTAG_RX + ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid); +#else + ixgbe_vlan_rx_add_vid(adapter->netdev, vid); +#endif +#endif /* HAVE_VLAN_RX_REGISTER */ +} + +#endif +static u8 *ixgbe_addr_list_itr(struct ixgbe_hw __maybe_unused *hw, u8 **mc_addr_ptr, u32 *vmdq) +{ +#ifdef NETDEV_HW_ADDR_T_MULTICAST + struct netdev_hw_addr *mc_ptr; +#else + struct dev_mc_list *mc_ptr; +#endif +#ifdef CONFIG_PCI_IOV + struct ixgbe_adapter *adapter = hw->back; +#endif /* CONFIG_PCI_IOV */ + u8 *addr = *mc_addr_ptr; + + /* VMDQ_P implicitely uses the adapter struct when CONFIG_PCI_IOV is + * defined, so we have to wrap the pointer above correctly to prevent + * a warning. + */ + *vmdq = VMDQ_P(0); + +#ifdef NETDEV_HW_ADDR_T_MULTICAST + mc_ptr = container_of(addr, struct netdev_hw_addr, addr[0]); + if (mc_ptr->list.next) { + struct netdev_hw_addr *ha; + + ha = list_entry(mc_ptr->list.next, struct netdev_hw_addr, list); + *mc_addr_ptr = ha->addr; + } +#else + mc_ptr = container_of(addr, struct dev_mc_list, dmi_addr[0]); + if (mc_ptr->next) + *mc_addr_ptr = mc_ptr->next->dmi_addr; +#endif + else + *mc_addr_ptr = NULL; + + return addr; +} + +/** + * ixgbe_write_mc_addr_list - write multicast addresses to MTA + * @netdev: network interface device structure + * + * Writes multicast address list to the MTA hash table. + * Returns: -ENOMEM on failure + * 0 on no addresses written + * X on writing X addresses to MTA + **/ +int ixgbe_write_mc_addr_list(struct net_device *netdev) +{ + struct ixgbe_adapter *adapter = netdev_priv(netdev); + struct ixgbe_hw *hw = &adapter->hw; +#ifdef NETDEV_HW_ADDR_T_MULTICAST + struct netdev_hw_addr *ha; +#endif + u8 *addr_list = NULL; + int addr_count = 0; + + if (!hw->mac.ops.update_mc_addr_list) + return -ENOMEM; + + if (!netif_running(netdev)) + return 0; + +#ifdef CONFIG_PCI_IOV + ixgbe_restore_vf_multicasts(adapter); +#endif + + if (netdev_mc_empty(netdev)) { + hw->mac.ops.update_mc_addr_list(hw, NULL, 0, + ixgbe_addr_list_itr, false); + } else { +#ifdef NETDEV_HW_ADDR_T_MULTICAST + ha = list_first_entry(&netdev->mc.list, + struct netdev_hw_addr, list); + addr_list = ha->addr; +#else + addr_list = netdev->mc_list->dmi_addr; +#endif + addr_count = netdev_mc_count(netdev); + + hw->mac.ops.update_mc_addr_list(hw, addr_list, addr_count, + ixgbe_addr_list_itr, false); + } + + return addr_count; +} + +#ifdef CONFIG_PCI_IOV +void ixgbe_full_sync_mac_table(struct ixgbe_adapter *adapter) +{ + struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0]; + struct ixgbe_hw *hw = &adapter->hw; + int i; + + for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) { + mac_table->state &= ~IXGBE_MAC_STATE_MODIFIED; + + if (mac_table->state & IXGBE_MAC_STATE_IN_USE) + hw->mac.ops.set_rar(hw, i, + mac_table->addr, + mac_table->pool, + IXGBE_RAH_AV); + else + hw->mac.ops.clear_rar(hw, i); + } +} +#endif + +static void ixgbe_sync_mac_table(struct ixgbe_adapter *adapter) +{ + struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0]; + struct ixgbe_hw *hw = &adapter->hw; + int i; + + for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) { + if (!(mac_table->state & IXGBE_MAC_STATE_MODIFIED)) + continue; + + mac_table->state &= ~IXGBE_MAC_STATE_MODIFIED; + + if (mac_table->state & IXGBE_MAC_STATE_IN_USE) + hw->mac.ops.set_rar(hw, i, + mac_table->addr, + mac_table->pool, + IXGBE_RAH_AV); + else + hw->mac.ops.clear_rar(hw, i); + } +} + +int ixgbe_available_rars(struct ixgbe_adapter *adapter, u16 pool) +{ + struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0]; + struct ixgbe_hw *hw = &adapter->hw; + int i, count = 0; + + for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) { + /* do not count default RAR as available */ + if (mac_table->state & IXGBE_MAC_STATE_DEFAULT) + continue; + + /* only count unused and addresses that belong to us */ + if (mac_table->state & IXGBE_MAC_STATE_IN_USE) { + if (mac_table->pool != pool) + continue; + } + + count++; + } + + return count; +} + +/* this function destroys the first RAR entry */ +static void ixgbe_mac_set_default_filter(struct ixgbe_adapter *adapter) +{ + struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0]; + struct ixgbe_hw *hw = &adapter->hw; + + ether_addr_copy(mac_table->addr, hw->mac.addr); + mac_table->pool = VMDQ_P(0); + + mac_table->state = IXGBE_MAC_STATE_DEFAULT | IXGBE_MAC_STATE_IN_USE; + + hw->mac.ops.set_rar(hw, 0, mac_table->addr, mac_table->pool, + IXGBE_RAH_AV); +} + +int ixgbe_add_mac_filter(struct ixgbe_adapter *adapter, + const u8 *addr, u16 pool) +{ + struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0]; + struct ixgbe_hw *hw = &adapter->hw; + int i; + + if (is_zero_ether_addr(addr)) + return -EINVAL; + + for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) { + if (mac_table->state & IXGBE_MAC_STATE_IN_USE) { + continue; + } + + ether_addr_copy(mac_table->addr, addr); + mac_table->pool = pool; + + mac_table->state |= IXGBE_MAC_STATE_MODIFIED | + IXGBE_MAC_STATE_IN_USE; + + ixgbe_sync_mac_table(adapter); + + return i; + } + + return -ENOMEM; +} + +static void ixgbe_flush_sw_mac_table(struct ixgbe_adapter *adapter) +{ + struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0]; + struct ixgbe_hw *hw = &adapter->hw; + int i; + + for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) { + mac_table->state |= IXGBE_MAC_STATE_MODIFIED; + mac_table->state &= ~IXGBE_MAC_STATE_IN_USE; + } + + ixgbe_sync_mac_table(adapter); +} + + +int ixgbe_del_mac_filter(struct ixgbe_adapter *adapter, + const u8 *addr, u16 pool) +{ + struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0]; + struct ixgbe_hw *hw = &adapter->hw; + int i; + + if (is_zero_ether_addr(addr)) + return -EINVAL; + + /* search table for addr, if found clear IN USE flag and sync */ + for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) { + /* we can only delete an entry if it is in use */ + if (!(mac_table->state & IXGBE_MAC_STATE_IN_USE)) + continue; + /* we only care about entries that belong to the given pool */ + if (mac_table->pool != pool) + continue; + /* we only care about a specific MAC address */ + if (!ether_addr_equal(addr, mac_table->addr)) + continue; + + mac_table->state |= IXGBE_MAC_STATE_MODIFIED; + mac_table->state &= ~IXGBE_MAC_STATE_IN_USE; + + ixgbe_sync_mac_table(adapter); + + return 0; + } + + return -ENOMEM; +} + +#ifdef HAVE_SET_RX_MODE +static int ixgbe_uc_sync(struct net_device *netdev, const unsigned char *addr) +{ + struct ixgbe_adapter *adapter = netdev_priv(netdev); + int ret; + + ret = ixgbe_add_mac_filter(adapter, addr, VMDQ_P(0)); + + return min_t(int, ret, 0); +} + +static int ixgbe_uc_unsync(struct net_device *netdev, const unsigned char *addr) +{ + struct ixgbe_adapter *adapter = netdev_priv(netdev); + + ixgbe_del_mac_filter(adapter, addr, VMDQ_P(0)); + + return 0; +} + +#endif +/** + * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set + * @netdev: network interface device structure + * + * The set_rx_method entry point is called whenever the unicast/multicast + * address list or the network interface flags are updated. This routine is + * responsible for configuring the hardware for proper unicast, multicast and + * promiscuous mode. + **/ +void ixgbe_set_rx_mode(struct net_device *netdev) +{ + struct ixgbe_adapter *adapter = netdev_priv(netdev); + struct ixgbe_hw *hw = &adapter->hw; + u32 fctrl, vmolr = IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE; +#if defined(HAVE_VLAN_RX_REGISTER) + u32 vlnctrl; +#endif +#if defined(NETIF_F_HW_VLAN_CTAG_FILTER) || defined(NETIF_F_HW_VLAN_FILTER) + netdev_features_t features = netdev->features; +#endif + int count; + + /* Check for Promiscuous and All Multicast modes */ + fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL); +#if defined(HAVE_VLAN_RX_REGISTER) + vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL); +#endif + + /* set all bits that we expect to always be set */ + fctrl |= IXGBE_FCTRL_BAM; + fctrl |= IXGBE_FCTRL_DPF; /* discard pause frames when FC enabled */ + fctrl |= IXGBE_FCTRL_PMCF; + + /* clear the bits we are changing the status of */ + fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE); +#if defined(HAVE_VLAN_RX_REGISTER) + vlnctrl &= ~(IXGBE_VLNCTRL_VFE | IXGBE_VLNCTRL_CFIEN); +#endif + if (netdev->flags & IFF_PROMISC) { + hw->addr_ctrl.user_set_promisc = true; + fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE); + vmolr |= IXGBE_VMOLR_MPE; +#ifdef HAVE_VLAN_RX_REGISTER + /* Only disable hardware filter vlans in promiscuous mode + * if SR-IOV and VMDQ are disabled - otherwise ensure + * that hardware VLAN filters remain enabled. + */ + if ((adapter->flags & (IXGBE_FLAG_VMDQ_ENABLED | + IXGBE_FLAG_SRIOV_ENABLED))) + vlnctrl |= (IXGBE_VLNCTRL_VFE | IXGBE_VLNCTRL_CFIEN); +#endif +#ifdef NETIF_F_HW_VLAN_CTAG_FILTER + features &= ~NETIF_F_HW_VLAN_CTAG_FILTER; +#endif +#ifdef NETIF_F_HW_VLAN_FILTER + features &= ~NETIF_F_HW_VLAN_FILTER; +#endif + } else { + if (netdev->flags & IFF_ALLMULTI) { + fctrl |= IXGBE_FCTRL_MPE; + vmolr |= IXGBE_VMOLR_MPE; + } + hw->addr_ctrl.user_set_promisc = false; +#if defined(HAVE_VLAN_RX_REGISTER) + /* enable hardware vlan filtering */ + vlnctrl |= IXGBE_VLNCTRL_VFE; +#endif + } + +#ifdef HAVE_SET_RX_MODE + /* + * Write addresses to available RAR registers, if there is not + * sufficient space to store all the addresses then enable + * unicast promiscuous mode + */ + if (__dev_uc_sync(netdev, ixgbe_uc_sync, ixgbe_uc_unsync)) { + fctrl |= IXGBE_FCTRL_UPE; + vmolr |= IXGBE_VMOLR_ROPE; + } + +#endif + /* + * Write addresses to the MTA, if the attempt fails + * then we should just turn on promiscuous mode so + * that we can at least receive multicast traffic + */ + count = ixgbe_write_mc_addr_list(netdev); + if (count < 0) { + fctrl |= IXGBE_FCTRL_MPE; + vmolr |= IXGBE_VMOLR_MPE; + } else if (count) { + vmolr |= IXGBE_VMOLR_ROMPE; + } + + if (hw->mac.type != ixgbe_mac_82598EB) { + vmolr |= IXGBE_READ_REG(hw, IXGBE_VMOLR(VMDQ_P(0))) & + ~(IXGBE_VMOLR_MPE | IXGBE_VMOLR_ROMPE | + IXGBE_VMOLR_ROPE); + IXGBE_WRITE_REG(hw, IXGBE_VMOLR(VMDQ_P(0)), vmolr); + } + + IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl); + +#ifdef HAVE_8021P_SUPPORT +#ifdef NETIF_F_HW_VLAN_CTAG_RX + if (features & NETIF_F_HW_VLAN_CTAG_RX) +#else + if (features & NETIF_F_HW_VLAN_RX) +#endif + ixgbe_vlan_strip_enable(adapter); + else + ixgbe_vlan_strip_disable(adapter); +#endif /* HAVE_8021P_SUPPORT */ + +#if defined(NETIF_F_HW_VLAN_CTAG_FILTER) + if (features & NETIF_F_HW_VLAN_CTAG_FILTER) + ixgbe_vlan_promisc_disable(adapter); + else + ixgbe_vlan_promisc_enable(adapter); +#elif defined(NETIF_F_HW_VLAN_FILTER) && !defined(HAVE_VLAN_RX_REGISTER) + if (features & NETIF_F_HW_VLAN_FILTER) + ixgbe_vlan_promisc_disable(adapter); + else + ixgbe_vlan_promisc_enable(adapter); +#elif defined(HAVE_VLAN_RX_REGISTER) + IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl); +#endif /* NETIF_F_HW_VLAN_CTAG_FILTER */ +} + +static void ixgbe_napi_enable_all(struct ixgbe_adapter *adapter) +{ + struct ixgbe_q_vector *q_vector; + int q_idx; + + for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++) { + q_vector = adapter->q_vector[q_idx]; +#ifdef HAVE_NDO_BUSY_POLL + ixgbe_qv_init_lock(adapter->q_vector[q_idx]); +#endif + napi_enable(&q_vector->napi); + } +} + +static void ixgbe_napi_disable_all(struct ixgbe_adapter *adapter) +{ + struct ixgbe_q_vector *q_vector; + int q_idx; + + for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++) { + q_vector = adapter->q_vector[q_idx]; + napi_disable(&q_vector->napi); +#ifdef HAVE_NDO_BUSY_POLL + while(!ixgbe_qv_disable(adapter->q_vector[q_idx])) { + pr_info("QV %d locked\n", q_idx); + usleep_range(1000, 20000); + } +#endif + } +} + +#ifdef HAVE_DCBNL_IEEE +s32 ixgbe_dcb_hw_ets(struct ixgbe_hw *hw, struct ieee_ets *ets, int max_frame) +{ + __u16 refill[IEEE_8021QAZ_MAX_TCS], max[IEEE_8021QAZ_MAX_TCS]; + __u8 prio_type[IEEE_8021QAZ_MAX_TCS]; + int i; + + /* naively give each TC a bwg to map onto CEE hardware */ + __u8 bwg_id[IEEE_8021QAZ_MAX_TCS] = {0, 1, 2, 3, 4, 5, 6, 7}; + + /* Map TSA onto CEE prio type */ + for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) { + switch (ets->tc_tsa[i]) { + case IEEE_8021QAZ_TSA_STRICT: + prio_type[i] = 2; + break; + case IEEE_8021QAZ_TSA_ETS: + prio_type[i] = 0; + break; + default: + /* Hardware only supports priority strict or + * ETS transmission selection algorithms if + * we receive some other value from dcbnl + * throw an error + */ + return -EINVAL; + } + } + + ixgbe_dcb_calculate_tc_credits(ets->tc_tx_bw, refill, max, max_frame); + return ixgbe_dcb_hw_config(hw, refill, max, + bwg_id, prio_type, ets->prio_tc); +} +#endif /* HAVE_DCBNL_IEEE */ + +#if defined(HAVE_UDP_ENC_RX_OFFLOAD) || defined(HAVE_VXLAN_RX_OFFLOAD) +void ixgbe_clear_udp_tunnel_port(struct ixgbe_adapter *adapter, u32 mask) +{ + struct ixgbe_hw *hw = &adapter->hw; + u32 vxlanctrl; + + if (!(adapter->flags & (IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE | + IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE))) + return; + + vxlanctrl = IXGBE_READ_REG(hw, IXGBE_VXLANCTRL) & ~mask; + IXGBE_WRITE_REG(hw, IXGBE_VXLANCTRL, vxlanctrl); + + if (mask & IXGBE_VXLANCTRL_VXLAN_UDPPORT_MASK) + adapter->vxlan_port = 0; +#ifdef HAVE_UDP_ENC_RX_OFFLOAD + if (mask & IXGBE_VXLANCTRL_GENEVE_UDPPORT_MASK) + adapter->geneve_port = 0; +#endif /* HAVE_UDP_ENC_RX_OFFLOAD */ +} +#endif /* HAVE_UDP_ENC_RX_OFFLOAD || HAVE_VXLAN_RX_OFFLOAD */ + +#ifdef NETIF_F_GSO_PARTIAL +/* NETIF_F_GSO_IPXIP4/6 may not be defined in all distributions */ +#ifndef NETIF_F_GSO_IPXIP4 +#define NETIF_F_GSO_IPXIP4 0 +#endif +#ifndef NETIF_F_GSO_IPXIP6 +#define NETIF_F_GSO_IPXIP6 0 +#endif +#define IXGBE_GSO_PARTIAL_FEATURES (NETIF_F_GSO_GRE | \ + NETIF_F_GSO_GRE_CSUM | \ + NETIF_F_GSO_IPXIP4 | \ + NETIF_F_GSO_IPXIP6 | \ + NETIF_F_GSO_UDP_TUNNEL | \ + NETIF_F_GSO_UDP_TUNNEL_CSUM) +#endif /* NETIF_F_GSO_PARTIAL */ + +static inline unsigned long ixgbe_tso_features(void) +{ + unsigned long features = 0; + +#ifdef NETIF_F_TSO + features |= NETIF_F_TSO; +#endif /* NETIF_F_TSO */ +#ifdef NETIF_F_TSO6 + features |= NETIF_F_TSO6; +#endif /* NETIF_F_TSO6 */ +#ifdef NETIF_F_GSO_PARTIAL + features |= NETIF_F_GSO_PARTIAL | IXGBE_GSO_PARTIAL_FEATURES; +#endif + + return features; +} + +/* + * ixgbe_configure_dcb - Configure DCB hardware support + * @adapter: ixgbe adapter struct + * + * Called when the driver opens or needs to reconfigure DCB related bits. + */ +static void ixgbe_configure_dcb(struct ixgbe_adapter *adapter) +{ + struct ixgbe_hw *hw = &adapter->hw; + struct net_device *netdev = adapter->netdev; + + int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN; + + /* The following workaround for 82598EB was originaly hidden inside a + * kcompat definition of netif_set_gso_max_size. This workaround is + * necessary as the 82598EB hardware does not support TSO and DCB + * unless the stack TSO maximum segment size can be reduced. Older + * kernels do not support the requisite interface, and thus need TSO + * disabled if we want to support DCB. + */ + if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED)) { + if (hw->mac.type == ixgbe_mac_82598EB) { +#ifdef HAVE_NETIF_SET_TSO_MAX + netif_set_tso_max_size(netdev, 65536); +#else +#ifdef NETDEV_CAN_SET_GSO_MAX_SIZE + netif_set_gso_max_size(netdev, 65536); +#else + /* We previously disabled TSO, so we should enable it + * now. */ + netdev->features |= ixgbe_tso_features(); +#ifdef NETIF_F_GSO_PARTIAL + netdev->gso_partial_features = + IXGBE_GSO_PARTIAL_FEATURES; +#endif +#endif /* NETDEV_CAN_SET_GSO_MAX_SIZE */ +#endif /* HAVE_NETIF_SET_TSO_MAX */ + } + return; + } + + if (hw->mac.type == ixgbe_mac_82598EB) { +#ifdef HAVE_NETIF_SET_TSO_MAX + netif_set_tso_max_size(netdev, 32768); +#else +#ifdef NETDEV_CAN_SET_GSO_MAX_SIZE + netif_set_gso_max_size(netdev, 32768); +#else + /* Simply disable TSO since we cannot change the maximum + * segment size. */ + netdev->features &= ~ixgbe_tso_features(); +#ifdef NETIF_F_GSO_PARTIAL + netdev->gso_partial_features = 0; +#endif +#endif /* NETDEV_CAN_SET_GSO_MAX_SIZE */ +#endif /* HAVE_NETIF_SET_TSO_MAX */ + } + +#if IS_ENABLED(CONFIG_FCOE) +#ifdef HAVE_NETDEV_FCOE_MTU + if (netdev->fcoe_mtu) +#else + if (netdev->features & NETIF_F_FCOE_MTU) +#endif + max_frame = max_t(int, max_frame, + IXGBE_FCOE_JUMBO_FRAME_SIZE); +#endif /* CONFIG_FCOE */ + +#ifdef HAVE_DCBNL_IEEE + if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_IEEE) { + if (adapter->ixgbe_ieee_ets) + ixgbe_dcb_hw_ets(&adapter->hw, + adapter->ixgbe_ieee_ets, + max_frame); + + if (adapter->ixgbe_ieee_pfc && adapter->ixgbe_ieee_ets) { + struct ieee_pfc *pfc = adapter->ixgbe_ieee_pfc; + u8 *tc = adapter->ixgbe_ieee_ets->prio_tc; + + ixgbe_dcb_config_pfc(&adapter->hw, pfc->pfc_en, tc); + } + } else +#endif /* HAVE_DCBNL_IEEE */ + { + ixgbe_dcb_calculate_tc_credits_cee(hw, + &adapter->dcb_cfg, + max_frame, + IXGBE_DCB_TX_CONFIG); + ixgbe_dcb_calculate_tc_credits_cee(hw, + &adapter->dcb_cfg, + max_frame, + IXGBE_DCB_RX_CONFIG); + ixgbe_dcb_hw_config_cee(hw, &adapter->dcb_cfg); + } + + /* Enable RSS Hash per TC */ + if (hw->mac.type != ixgbe_mac_82598EB) { + u32 msb = 0; + u16 rss_i = adapter->ring_feature[RING_F_RSS].indices - 1; + + while (rss_i) { + msb++; + rss_i >>= 1; + } + + /* write msb to all 8 TCs in one write */ + IXGBE_WRITE_REG(hw, IXGBE_RQTC, msb * 0x11111111); + } +} + +#ifndef IXGBE_NO_LLI +static void ixgbe_configure_lli_82599(struct ixgbe_adapter *adapter) +{ + u16 port; + + if (adapter->lli_etype) { + IXGBE_WRITE_REG(&adapter->hw, IXGBE_L34T_IMIR(0), + (IXGBE_IMIR_LLI_EN_82599 | + IXGBE_IMIR_SIZE_BP_82599 | + IXGBE_IMIR_CTRL_BP_82599)); + IXGBE_WRITE_REG(&adapter->hw, IXGBE_ETQS(0), IXGBE_ETQS_LLI); + IXGBE_WRITE_REG(&adapter->hw, IXGBE_ETQF(0), + (adapter->lli_etype | IXGBE_ETQF_FILTER_EN)); + } + + if (adapter->lli_port) { + port = swab16(adapter->lli_port); + IXGBE_WRITE_REG(&adapter->hw, IXGBE_L34T_IMIR(0), + (IXGBE_IMIR_LLI_EN_82599 | + IXGBE_IMIR_SIZE_BP_82599 | + IXGBE_IMIR_CTRL_BP_82599)); + IXGBE_WRITE_REG(&adapter->hw, IXGBE_FTQF(0), + (IXGBE_FTQF_POOL_MASK_EN | + (IXGBE_FTQF_PRIORITY_MASK << + IXGBE_FTQF_PRIORITY_SHIFT) | + (IXGBE_FTQF_DEST_PORT_MASK << + IXGBE_FTQF_5TUPLE_MASK_SHIFT))); + IXGBE_WRITE_REG(&adapter->hw, IXGBE_SDPQF(0), (port << 16)); + } + + if (adapter->flags & IXGBE_FLAG_LLI_PUSH) { + switch (adapter->hw.mac.type) { + case ixgbe_mac_82599EB: + IXGBE_WRITE_REG(&adapter->hw, IXGBE_L34T_IMIR(0), + (IXGBE_IMIR_LLI_EN_82599 | + IXGBE_IMIR_SIZE_BP_82599 | + IXGBE_IMIR_CTRL_PSH_82599 | + IXGBE_IMIR_CTRL_SYN_82599 | + IXGBE_IMIR_CTRL_URG_82599 | + IXGBE_IMIR_CTRL_ACK_82599 | + IXGBE_IMIR_CTRL_RST_82599 | + IXGBE_IMIR_CTRL_FIN_82599)); + IXGBE_WRITE_REG(&adapter->hw, IXGBE_LLITHRESH, + 0xfc000000); + break; + case ixgbe_mac_X540: + IXGBE_WRITE_REG(&adapter->hw, IXGBE_L34T_IMIR(0), + (IXGBE_IMIR_LLI_EN_82599 | + IXGBE_IMIR_SIZE_BP_82599 | + IXGBE_IMIR_CTRL_PSH_82599)); + break; + default: + break; + } + IXGBE_WRITE_REG(&adapter->hw, IXGBE_FTQF(0), + (IXGBE_FTQF_POOL_MASK_EN | + (IXGBE_FTQF_PRIORITY_MASK << + IXGBE_FTQF_PRIORITY_SHIFT) | + (IXGBE_FTQF_5TUPLE_MASK_MASK << + IXGBE_FTQF_5TUPLE_MASK_SHIFT))); + + IXGBE_WRITE_REG(&adapter->hw, IXGBE_SYNQF, 0x80000100); + } + + if (adapter->lli_size) { + IXGBE_WRITE_REG(&adapter->hw, IXGBE_L34T_IMIR(0), + (IXGBE_IMIR_LLI_EN_82599 | + IXGBE_IMIR_CTRL_BP_82599)); + IXGBE_WRITE_REG(&adapter->hw, IXGBE_LLITHRESH, + adapter->lli_size); + IXGBE_WRITE_REG(&adapter->hw, IXGBE_FTQF(0), + (IXGBE_FTQF_POOL_MASK_EN | + (IXGBE_FTQF_PRIORITY_MASK << + IXGBE_FTQF_PRIORITY_SHIFT) | + (IXGBE_FTQF_5TUPLE_MASK_MASK << + IXGBE_FTQF_5TUPLE_MASK_SHIFT))); + } + + if (adapter->lli_vlan_pri) { + IXGBE_WRITE_REG(&adapter->hw, IXGBE_IMIRVP, + (IXGBE_IMIRVP_PRIORITY_EN | + adapter->lli_vlan_pri)); + } +} + +static void ixgbe_configure_lli(struct ixgbe_adapter *adapter) +{ + u16 port; + + /* lli should only be enabled with MSI-X and MSI */ + if (!(adapter->flags & IXGBE_FLAG_MSI_ENABLED) && + !(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) + return; + /* LLI not supported on X550 and X550EM_x*/ + if ((adapter->hw.mac.type == ixgbe_mac_X550) || + (adapter->hw.mac.type == ixgbe_mac_X550EM_x)) + return; + /* LLI not supported on X550EM_a */ + if (adapter->hw.mac.type == ixgbe_mac_X550EM_a) + return; + /* LLI not supported on X550 and E610 */ + if (ixgbe_is_mac_E6xx(adapter->hw.mac.type)) + return; + + if (adapter->hw.mac.type != ixgbe_mac_82598EB) { + ixgbe_configure_lli_82599(adapter); + return; + } + + if (adapter->lli_port) { + /* use filter 0 for port */ + port = swab16(adapter->lli_port); + IXGBE_WRITE_REG(&adapter->hw, IXGBE_IMIR(0), + (port | IXGBE_IMIR_PORT_IM_EN)); + IXGBE_WRITE_REG(&adapter->hw, IXGBE_IMIREXT(0), + (IXGBE_IMIREXT_SIZE_BP | + IXGBE_IMIREXT_CTRL_BP)); + } + + if (adapter->flags & IXGBE_FLAG_LLI_PUSH) { + /* use filter 1 for push flag */ + IXGBE_WRITE_REG(&adapter->hw, IXGBE_IMIR(1), + (IXGBE_IMIR_PORT_BP | IXGBE_IMIR_PORT_IM_EN)); + IXGBE_WRITE_REG(&adapter->hw, IXGBE_IMIREXT(1), + (IXGBE_IMIREXT_SIZE_BP | + IXGBE_IMIREXT_CTRL_PSH)); + } + + if (adapter->lli_size) { + /* use filter 2 for size */ + IXGBE_WRITE_REG(&adapter->hw, IXGBE_IMIR(2), + (IXGBE_IMIR_PORT_BP | IXGBE_IMIR_PORT_IM_EN)); + IXGBE_WRITE_REG(&adapter->hw, IXGBE_IMIREXT(2), + (adapter->lli_size | IXGBE_IMIREXT_CTRL_BP)); + } +} + +#endif /* IXGBE_NO_LLI */ +/* Additional bittime to account for IXGBE framing */ +#define IXGBE_ETH_FRAMING 20 + +/* + * ixgbe_hpbthresh - calculate high water mark for flow control + * + * @adapter: board private structure to calculate for + * @pb - packet buffer to calculate + */ +static int ixgbe_hpbthresh(struct ixgbe_adapter *adapter, int pb) +{ + struct ixgbe_hw *hw = &adapter->hw; + struct net_device *dev = adapter->netdev; + int link, tc, kb, marker; + u32 dv_id, rx_pba; + + /* Calculate max LAN frame size */ + tc = link = dev->mtu + ETH_HLEN + ETH_FCS_LEN + IXGBE_ETH_FRAMING; + +#if IS_ENABLED(CONFIG_FCOE) + /* FCoE traffic class uses FCOE jumbo frames */ +#ifdef HAVE_NETDEV_FCOE_MTU + if (dev->fcoe_mtu && tc < IXGBE_FCOE_JUMBO_FRAME_SIZE && + (pb == netdev_get_prio_tc_map(dev, adapter->fcoe.up))) +#else + if ((dev->features & NETIF_F_FCOE_MTU) && + (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) && + (pb == netdev_get_prio_tc_map(dev, adapter->fcoe.up))) +#endif + tc = IXGBE_FCOE_JUMBO_FRAME_SIZE; +#endif /* CONFIG_FCOE */ + + /* Calculate delay value for device */ + switch (hw->mac.type) { + case ixgbe_mac_X540: + case ixgbe_mac_X550: + case ixgbe_mac_X550EM_x: + case ixgbe_mac_X550EM_a: + case ixgbe_mac_E610: + dv_id = IXGBE_DV_X540(link, tc); + break; + default: + dv_id = IXGBE_DV(link, tc); + break; + } + + /* Loopback switch introduces additional latency */ + if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) + dv_id += IXGBE_B2BT(tc); + + /* Delay value is calculated in bit times convert to KB */ + kb = IXGBE_BT2KB(dv_id); + rx_pba = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(pb)) >> 10; + + marker = rx_pba - kb; + + /* It is possible that the packet buffer is not large enough + * to provide required headroom. In this case throw an error + * to user and a do the best we can. + */ + if (marker < 0) { + e_warn(drv, "Packet Buffer(%i) can not provide enough" + "headroom to suppport flow control." + "Decrease MTU or number of traffic classes\n", pb); + marker = tc + 1; + } + + return marker; +} + +/* + * ixgbe_lpbthresh - calculate low water mark for for flow control + * + * @adapter: board private structure to calculate for + * @pb - packet buffer to calculate + */ +static int ixgbe_lpbthresh(struct ixgbe_adapter *adapter, int __maybe_unused pb) +{ + struct ixgbe_hw *hw = &adapter->hw; + struct net_device *dev = adapter->netdev; + int tc; + u32 dv_id; + + /* Calculate max LAN frame size */ + tc = dev->mtu + ETH_HLEN + ETH_FCS_LEN; + +#if IS_ENABLED(CONFIG_FCOE) + /* FCoE traffic class uses FCOE jumbo frames */ +#ifdef HAVE_NETDEV_FCOE_MTU + if (dev->fcoe_mtu && tc < IXGBE_FCOE_JUMBO_FRAME_SIZE && + (pb == netdev_get_prio_tc_map(dev, adapter->fcoe.up))) +#else + if ((dev->features & NETIF_F_FCOE_MTU) && + (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) && + (pb == netdev_get_prio_tc_map(dev, adapter->fcoe.up))) +#endif /* HAVE_NETDEV_FCOE_MTU */ + tc = IXGBE_FCOE_JUMBO_FRAME_SIZE; +#endif /* CONFIG_FCOE */ + + /* Calculate delay value for device */ + switch (hw->mac.type) { + case ixgbe_mac_X540: + case ixgbe_mac_X550: + case ixgbe_mac_X550EM_x: + case ixgbe_mac_X550EM_a: + case ixgbe_mac_E610: + dv_id = IXGBE_LOW_DV_X540(tc); + break; + default: + dv_id = IXGBE_LOW_DV(tc); + break; + } + + /* Delay value is calculated in bit times convert to KB */ + return IXGBE_BT2KB(dv_id); +} + +/* + * ixgbe_pbthresh_setup - calculate and setup high low water marks + */ +static void ixgbe_pbthresh_setup(struct ixgbe_adapter *adapter) +{ + struct ixgbe_hw *hw = &adapter->hw; + int num_tc = netdev_get_num_tc(adapter->netdev); + int i; + + if (!num_tc) + num_tc = 1; + + + for (i = 0; i < num_tc; i++) { + hw->fc.high_water[i] = ixgbe_hpbthresh(adapter, i); + hw->fc.low_water[i] = ixgbe_lpbthresh(adapter, i); + + /* Low water marks must not be larger than high water marks */ + if (hw->fc.low_water[i] > hw->fc.high_water[i]) + hw->fc.low_water[i] = 0; + } + + for (; i < IXGBE_DCB_MAX_TRAFFIC_CLASS; i++) + hw->fc.high_water[i] = 0; +} + +static void ixgbe_configure_pb(struct ixgbe_adapter *adapter) +{ + struct ixgbe_hw *hw = &adapter->hw; + int hdrm; + u8 tc = netdev_get_num_tc(adapter->netdev); + + if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE || + adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE) + hdrm = 32 << adapter->fdir_pballoc; + else + hdrm = 0; + + hw->mac.ops.setup_rxpba(hw, tc, hdrm, PBA_STRATEGY_EQUAL); + ixgbe_pbthresh_setup(adapter); +} + +static void ixgbe_fdir_filter_restore(struct ixgbe_adapter *adapter) +{ + struct ixgbe_hw *hw = &adapter->hw; + struct hlist_node *node2; + struct ixgbe_fdir_filter *filter; + u8 queue = 0; + + spin_lock(&adapter->fdir_perfect_lock); + + if (!hlist_empty(&adapter->fdir_filter_list)) + ixgbe_fdir_set_input_mask_82599(hw, &adapter->fdir_mask, + adapter->cloud_mode); + + hlist_for_each_entry_safe(filter, node2, + &adapter->fdir_filter_list, fdir_node) { + if (filter->action == IXGBE_FDIR_DROP_QUEUE) { + queue = IXGBE_FDIR_DROP_QUEUE; + } else { + u32 ring = ethtool_get_flow_spec_ring(filter->action); + u8 vf = ethtool_get_flow_spec_ring_vf(filter->action); + + if (!vf && ring >= adapter->num_rx_queues) { + e_err(drv, + "FDIR restore failed w/o vf, ring:%u\n", + ring); + continue; + } else if (vf && + ((vf > adapter->num_vfs) || + ring >= adapter->num_rx_queues_per_pool)) { + e_err(drv, + "FDIR restore failed vf:%hhu, ring:%u\n", + vf, ring); + continue; + } + + /* Map the ring onto the absolute queue index */ + if (!vf) + queue = adapter->rx_ring[ring]->reg_idx; + else + queue = ((vf - 1) * + adapter->num_rx_queues_per_pool) + ring; + } + + ixgbe_fdir_write_perfect_filter_82599(hw, + &filter->filter, + filter->sw_idx, + queue, + adapter->cloud_mode); + } + + spin_unlock(&adapter->fdir_perfect_lock); +} + +/** + * ixgbe_clean_rx_ring - Free Rx Buffers per Queue + * @rx_ring: ring to free buffers from + **/ +static void ixgbe_clean_rx_ring(struct ixgbe_ring *rx_ring) +{ + u16 i = rx_ring->next_to_clean; + struct ixgbe_rx_buffer *rx_buffer = &rx_ring->rx_buffer_info[i]; +#if defined(HAVE_STRUCT_DMA_ATTRS) && defined(HAVE_SWIOTLB_SKIP_CPU_SYNC) + DEFINE_DMA_ATTRS(attrs); + + dma_set_attr(DMA_ATTR_SKIP_CPU_SYNC, &attrs); + dma_set_attr(DMA_ATTR_WEAK_ORDERING, &attrs); +#endif + +#ifdef HAVE_AF_XDP_ZC_SUPPORT + if (rx_ring->xsk_pool) { + ixgbe_xsk_clean_rx_ring(rx_ring); + goto skip_free; + } + +#endif + /* Free all the Rx ring sk_buffs */ +#ifdef CONFIG_IXGBE_DISABLE_PACKET_SPLIT + while (i != rx_ring->next_to_use) { +#else + while (i != rx_ring->next_to_alloc) { +#endif + if (rx_buffer->skb) { + struct sk_buff *skb = rx_buffer->skb; +#ifndef CONFIG_IXGBE_DISABLE_PACKET_SPLIT + if (IXGBE_CB(skb)->page_released) + dma_unmap_page_attrs(rx_ring->dev, + IXGBE_CB(skb)->dma, + ixgbe_rx_pg_size(rx_ring), + DMA_FROM_DEVICE, +#if defined(HAVE_STRUCT_DMA_ATTRS) && defined(HAVE_SWIOTLB_SKIP_CPU_SYNC) + &attrs); +#else + IXGBE_RX_DMA_ATTR); +#endif +#else + /* We need to clean up RSC frag lists */ + skb = ixgbe_merge_active_tail(skb); + if (ixgbe_close_active_frag_list(skb)) + dma_unmap_single(rx_ring->dev, + IXGBE_CB(skb)->dma, + rx_ring->rx_buf_len, + DMA_FROM_DEVICE); + IXGBE_CB(skb)->dma = 0; +#endif /* CONFIG_IXGBE_DISABLE_PACKET_SPLIT */ + dev_kfree_skb(skb); + rx_buffer->skb = NULL; + } + +#ifndef CONFIG_IXGBE_DISABLE_PACKET_SPLIT + /* Invalidate cache lines that may have been written to by + * device so that we avoid corrupting memory. + */ + dma_sync_single_range_for_cpu(rx_ring->dev, + rx_buffer->dma, + rx_buffer->page_offset, + ixgbe_rx_bufsz(rx_ring), + DMA_FROM_DEVICE); + + /* free resources associated with mapping */ + dma_unmap_page_attrs(rx_ring->dev, rx_buffer->dma, + ixgbe_rx_pg_size(rx_ring), + DMA_FROM_DEVICE, +#if defined(HAVE_STRUCT_DMA_ATTRS) && defined(HAVE_SWIOTLB_SKIP_CPU_SYNC) + &attrs); +#else + IXGBE_RX_DMA_ATTR); +#endif + + __page_frag_cache_drain(rx_buffer->page, + rx_buffer->pagecnt_bias); +#else /* CONFIG_IXGBE_DISABLE_PACKET_SPLIT */ + if (rx_buffer->dma) { + dma_unmap_single(rx_ring->dev, + rx_buffer->dma, + rx_ring->rx_buf_len, + DMA_FROM_DEVICE); + rx_buffer->dma = 0; + } +#endif /* CONFIG_IXGBE_DISABLE_PACKET_SPLIT */ + i++; + rx_buffer++; + if (i == rx_ring->count) { + i = 0; + rx_buffer = rx_ring->rx_buffer_info; + } + } + +#ifdef HAVE_AF_XDP_ZC_SUPPORT +skip_free: +#endif +#ifndef CONFIG_IXGBE_DISABLE_PACKET_SPLIT + rx_ring->next_to_alloc = 0; + rx_ring->next_to_clean = 0; + rx_ring->next_to_use = 0; +#endif +} + +static inline bool ixgbe_is_eee_enabled(struct ixgbe_adapter *adapter) +{ + return (adapter->eee_state == IXGBE_EEE_ENABLED); +} + +static void ixgbe_configure(struct ixgbe_adapter *adapter) +{ + struct ixgbe_hw *hw = &adapter->hw; + + ixgbe_configure_pb(adapter); + ixgbe_configure_dcb(adapter); + + /* + * We must restore virtualization before VLANs or else + * the VLVF registers will not be populated + */ + ixgbe_configure_virtualization(adapter); + + ixgbe_set_rx_mode(adapter->netdev); +#if defined(NETIF_F_HW_VLAN_TX) || defined(NETIF_F_HW_VLAN_CTAG_TX) + ixgbe_restore_vlan(adapter); +#endif + + if (adapter->hw.mac.type == ixgbe_mac_82599EB || + adapter->hw.mac.type == ixgbe_mac_X540) + hw->mac.ops.disable_sec_rx_path(hw); + + if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) { + ixgbe_init_fdir_signature_82599(&adapter->hw, + adapter->fdir_pballoc); + } else if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE) { + ixgbe_init_fdir_perfect_82599(&adapter->hw, + adapter->fdir_pballoc, adapter->cloud_mode); + ixgbe_fdir_filter_restore(adapter); + } + + if (adapter->hw.mac.type == ixgbe_mac_82599EB || + adapter->hw.mac.type == ixgbe_mac_X540) + hw->mac.ops.enable_sec_rx_path(hw); + + /* Enable EEE only when supported and enabled */ + if (hw->mac.ops.setup_eee && + (adapter->flags2 & IXGBE_FLAG2_EEE_CAPABLE)) { + bool eee_enable = ixgbe_is_eee_enabled(adapter); + + hw->mac.ops.setup_eee(hw, eee_enable); + } + +#if IS_ENABLED(CONFIG_DCA) + /* configure DCA */ + if (adapter->flags & IXGBE_FLAG_DCA_CAPABLE) + ixgbe_setup_dca(adapter); +#endif + +#if IS_ENABLED(CONFIG_FCOE) + /* configure FCoE L2 filters, redirection table, and Rx control */ + ixgbe_configure_fcoe(adapter); +#endif /* CONFIG_FCOE */ + + ixgbe_configure_tx(adapter); + ixgbe_configure_rx(adapter); +} + +/** + * ixgbe_enable_link_status_events - enable link status events + * @adapter: pointer to the adapter structure + * @mask: event mask to be set + * + * Enables link status events by invoking ixgbe_configure_lse() + * + * Return: the exit code of the operation. + */ +static s32 ixgbe_enable_link_status_events(struct ixgbe_adapter *adapter, + u16 mask) +{ + s32 rc; + + rc = ixgbe_configure_lse(&adapter->hw, true, mask); + if (rc) + return rc; + + adapter->lse_mask = mask; + return IXGBE_SUCCESS; +} + +/** + * ixgbe_disable_link_status_events - disable link status events + * @adapter: pointer to the adapter structure + * + * Disables link status events by invoking ixgbe_configure_lse() + * + * Return: the exit code of the operation. + */ +static s32 ixgbe_disable_link_status_events(struct ixgbe_adapter *adapter) +{ + s32 rc; + + rc = ixgbe_configure_lse(&adapter->hw, false, adapter->lse_mask); + if (rc) + return rc; + + adapter->lse_mask = 0; + return IXGBE_SUCCESS; +} + +static bool ixgbe_is_sfp(struct ixgbe_hw *hw) +{ + switch (hw->mac.type) { + case ixgbe_mac_82598EB: + if (hw->phy.type == ixgbe_phy_nl) + return true; + return false; + case ixgbe_mac_82599EB: + switch (hw->mac.ops.get_media_type(hw)) { + case ixgbe_media_type_fiber: + case ixgbe_media_type_fiber_qsfp: + return true; + default: + return false; + } + case ixgbe_mac_X550EM_x: + case ixgbe_mac_X550EM_a: + if (hw->mac.ops.get_media_type(hw) == ixgbe_media_type_fiber) + return true; + return false; + default: + return false; + } +} + +/** + * ixgbe_sfp_link_config - set up SFP+ link + * @adapter: pointer to private adapter struct + **/ +static void ixgbe_sfp_link_config(struct ixgbe_adapter *adapter) +{ + /* + * We are assuming the worst case scenerio here, and that + * is that an SFP was inserted/removed after the reset + * but before SFP detection was enabled. As such the best + * solution is to just start searching as soon as we start + */ + if (adapter->hw.mac.type == ixgbe_mac_82598EB) + adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP; + + adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET; + adapter->sfp_poll_time = 0; +} + +/** + * ixgbe_non_sfp_link_config - set up non-SFP+ link + * @hw: pointer to private hardware struct + * + * Returns 0 on success, negative on failure + **/ +static int ixgbe_non_sfp_link_config(struct ixgbe_hw *hw) +{ + u16 mask = ~((u16)(IXGBE_ACI_LINK_EVENT_UPDOWN | + IXGBE_ACI_LINK_EVENT_MEDIA_NA | + IXGBE_ACI_LINK_EVENT_MODULE_QUAL_FAIL | + IXGBE_ACI_LINK_EVENT_PHY_FW_LOAD_FAIL)); + struct ixgbe_adapter *adapter = container_of(hw, struct ixgbe_adapter, + hw); + int ret = IXGBE_ERR_LINK_SETUP; + bool autoneg, link_up = false; + u32 speed; + + if (hw->mac.ops.check_link) + ret = hw->mac.ops.check_link(hw, &speed, &link_up, false); + + if (ret) + goto link_cfg_out; + + speed = hw->phy.autoneg_advertised; + if (!speed && hw->mac.ops.get_link_capabilities) { + ret = hw->mac.ops.get_link_capabilities(hw, &speed, + &autoneg); + speed &= ~(IXGBE_LINK_SPEED_5GB_FULL | + IXGBE_LINK_SPEED_2_5GB_FULL); + } + + if (ret) + goto link_cfg_out; + + if (hw->mac.ops.setup_link) { + if (ixgbe_is_mac_E6xx(adapter->hw.mac.type)) { + ret = ixgbe_enable_link_status_events(adapter, mask); + if (ret) + goto link_cfg_out; + } + ret = hw->mac.ops.setup_link(hw, speed, link_up); + } +link_cfg_out: + return ret; +} + +/** + * ixgbe_check_media_subtask - Check for media + * @adapter: pointer to adapter structure + * + * If media is available, then initialize PHY user configuration if it is not + * been, and configure the PHY if the interface is up. + */ +static void ixgbe_check_media_subtask(struct ixgbe_adapter *adapter) +{ + struct ixgbe_hw *hw = &adapter->hw; + + /* No need to check for media if it's already present */ + if (!(adapter->flags2 & IXGBE_FLAG2_NO_MEDIA)) + return; + + /* Refresh link info and check if media is present */ + if (ixgbe_update_link_info(hw)) + return; + + ixgbe_check_link_cfg_err(adapter, hw->link.link_info.link_cfg_err); + + if (hw->link.link_info.link_info & IXGBE_ACI_MEDIA_AVAILABLE) { + /* PHY settings are reset on media insertion, reconfigure + * PHY to preserve settings. + */ + if (!(ixgbe_non_sfp_link_config(&adapter->hw))) + adapter->flags2 &= ~IXGBE_FLAG2_NO_MEDIA; + + /* A Link Status Event will be generated; the event handler + * will complete bringing the interface up + */ + } +} +/** + * ixgbe_clear_vf_stats_counters - Clear out VF stats after reset + * @adapter: board private structure + * + * On a reset we need to clear out the VF stats or accounting gets + * messed up because they're not clear on read. + **/ +static void ixgbe_clear_vf_stats_counters(struct ixgbe_adapter *adapter) +{ + struct ixgbe_hw *hw = &adapter->hw; + int i; + + for (i = 0; i < adapter->num_vfs; i++) { + adapter->vfinfo[i].last_vfstats.gprc = + IXGBE_READ_REG(hw, IXGBE_PVFGPRC(i)); + adapter->vfinfo[i].saved_rst_vfstats.gprc += + adapter->vfinfo[i].vfstats.gprc; + adapter->vfinfo[i].vfstats.gprc = 0; + adapter->vfinfo[i].last_vfstats.gptc = + IXGBE_READ_REG(hw, IXGBE_PVFGPTC(i)); + adapter->vfinfo[i].saved_rst_vfstats.gptc += + adapter->vfinfo[i].vfstats.gptc; + adapter->vfinfo[i].vfstats.gptc = 0; + adapter->vfinfo[i].last_vfstats.gorc = + IXGBE_READ_REG(hw, IXGBE_PVFGORC_LSB(i)); + adapter->vfinfo[i].saved_rst_vfstats.gorc += + adapter->vfinfo[i].vfstats.gorc; + adapter->vfinfo[i].vfstats.gorc = 0; + adapter->vfinfo[i].last_vfstats.gotc = + IXGBE_READ_REG(hw, IXGBE_PVFGOTC_LSB(i)); + adapter->vfinfo[i].saved_rst_vfstats.gotc += + adapter->vfinfo[i].vfstats.gotc; + adapter->vfinfo[i].vfstats.gotc = 0; + adapter->vfinfo[i].last_vfstats.mprc = + IXGBE_READ_REG(hw, IXGBE_PVFMPRC(i)); + adapter->vfinfo[i].saved_rst_vfstats.mprc += + adapter->vfinfo[i].vfstats.mprc; + adapter->vfinfo[i].vfstats.mprc = 0; + } +} + +static void ixgbe_setup_gpie(struct ixgbe_adapter *adapter) +{ + struct ixgbe_hw *hw = &adapter->hw; + u32 gpie = 0; + + if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) { + gpie = IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_PBA_SUPPORT | + IXGBE_GPIE_OCD; + gpie |= IXGBE_GPIE_EIAME; + /* + * use EIAM to auto-mask when MSI-X interrupt is asserted + * this saves a register write for every interrupt + */ + switch (hw->mac.type) { + case ixgbe_mac_82598EB: + IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE); + break; + case ixgbe_mac_82599EB: + case ixgbe_mac_X540: + case ixgbe_mac_X550: + case ixgbe_mac_X550EM_x: + case ixgbe_mac_X550EM_a: + case ixgbe_mac_E610: + default: + IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(0), 0xFFFFFFFF); + IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(1), 0xFFFFFFFF); + break; + } + } else { + /* legacy interrupts, use EIAM to auto-mask when reading EICR, + * specifically only auto mask tx and rx interrupts */ + IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE); + } + + if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) { + gpie &= ~IXGBE_GPIE_VTMODE_MASK; + + switch (adapter->ring_feature[RING_F_VMDQ].mask) { + case IXGBE_82599_VMDQ_8Q_MASK: + gpie |= IXGBE_GPIE_VTMODE_16; + break; + case IXGBE_82599_VMDQ_4Q_MASK: + gpie |= IXGBE_GPIE_VTMODE_32; + break; + default: + gpie |= IXGBE_GPIE_VTMODE_64; + break; + } + } + + /* Enable Thermal over heat sensor interrupt */ + if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) + switch (adapter->hw.mac.type) { + case ixgbe_mac_82599EB: + gpie |= IXGBE_SDP0_GPIEN; + break; + default: + break; + } + + /* Enable fan failure interrupt */ + if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) + gpie |= IXGBE_SDP1_GPIEN; + + switch (hw->mac.type) { + case ixgbe_mac_82599EB: + gpie |= IXGBE_SDP1_GPIEN | IXGBE_SDP2_GPIEN; + break; + case ixgbe_mac_X550EM_x: + case ixgbe_mac_X550EM_a: + gpie |= IXGBE_SDP0_GPIEN_X540; + break; + default: + break; + } + + IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie); +} + +static void ixgbe_up_complete(struct ixgbe_adapter *adapter) +{ + struct ixgbe_hw *hw = &adapter->hw; + int err; + u32 ctrl_ext; + + ixgbe_get_hw_control(adapter); + ixgbe_setup_gpie(adapter); + + if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) + ixgbe_configure_msix(adapter); + else + ixgbe_configure_msi_and_legacy(adapter); + + /* enable the optics for 82599 SFP+ fiber */ + if (hw->mac.ops.enable_tx_laser) + hw->mac.ops.enable_tx_laser(hw); + ixgbe_set_phy_power(hw, true); + + smp_mb__before_atomic(); + clear_bit(__IXGBE_DOWN, adapter->state); + ixgbe_napi_enable_all(adapter); +#ifndef IXGBE_NO_LLI + ixgbe_configure_lli(adapter); +#endif + + if (ixgbe_is_sfp(hw)) { + ixgbe_sfp_link_config(adapter); + } else if (!hw->phy.reset_disable) { + err = ixgbe_non_sfp_link_config(hw); + if (err) + e_err(probe, "link_config FAILED %d\n", err); + } + + /* clear any pending interrupts, may auto mask */ + IXGBE_READ_REG(hw, IXGBE_EICR); + ixgbe_irq_enable(adapter, true, true); + + /* + * If this adapter has a fan, check to see if we had a failure + * before we enabled the interrupt. + */ + if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) { + u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP); + if (esdp & IXGBE_ESDP_SDP1) + e_crit(drv, "Fan has stopped, replace the adapter\n"); + } + + /* enable transmits */ + netif_tx_start_all_queues(adapter->netdev); + + /* bring the link up in the watchdog, this could race with our first + * link up interrupt but shouldn't be a problem */ + adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE; + adapter->link_check_timeout = jiffies; + mod_timer(&adapter->service_timer, jiffies); + + ixgbe_clear_vf_stats_counters(adapter); + /* Set PF Reset Done bit so PF/VF Mail Ops can work */ + ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT); + ctrl_ext |= IXGBE_CTRL_EXT_PFRSTD; + IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext); + + /* update setting rx tx for all active vfs */ + ixgbe_set_all_vfs(adapter); +} + +void ixgbe_reinit_locked(struct ixgbe_adapter *adapter) +{ + WARN_ON(in_interrupt()); + /* put off any impending NetWatchDogTimeout */ +#ifdef HAVE_NETIF_TRANS_UPDATE + netif_trans_update(adapter->netdev); +#else + adapter->netdev->trans_start = jiffies; +#endif + + while (test_and_set_bit(__IXGBE_RESETTING, adapter->state)) + usleep_range(1000, 2000); + if (adapter->hw.phy.type == ixgbe_phy_fw) + ixgbe_watchdog_link_is_down(adapter); + ixgbe_down(adapter); + /* + * If SR-IOV enabled then wait a bit before bringing the adapter + * back up to give the VFs time to respond to the reset. The + * two second wait is based upon the watchdog timer cycle in + * the VF driver. + */ + if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) + msleep(2000); + ixgbe_up(adapter); + clear_bit(__IXGBE_RESETTING, adapter->state); +} + +void ixgbe_up(struct ixgbe_adapter *adapter) +{ + /* hardware has been reset, we need to reload some things */ + ixgbe_configure(adapter); + + ixgbe_up_complete(adapter); +} + +static unsigned long ixgbe_get_completion_timeout(struct ixgbe_adapter *adapter) +{ + u16 devctl2; + + pcie_capability_read_word(adapter->pdev, PCI_EXP_DEVCTL2, &devctl2); + + switch (devctl2 & IXGBE_PCIDEVCTRL2_TIMEO_MASK) { + case IXGBE_PCIDEVCTRL2_17_34s: + case IXGBE_PCIDEVCTRL2_4_8s: + /* For now we cap the upper limit on delay to 2 seconds + * as we end up going up to 34 seconds of delay in worst + * case timeout value. + */ + case IXGBE_PCIDEVCTRL2_1_2s: + return 2000000ul; /* 2.0 s */ + case IXGBE_PCIDEVCTRL2_260_520ms: + return 520000ul; /* 520 ms */ + case IXGBE_PCIDEVCTRL2_65_130ms: + return 130000ul; /* 130 ms */ + case IXGBE_PCIDEVCTRL2_16_32ms: + return 32000ul; /* 32 ms */ + case IXGBE_PCIDEVCTRL2_1_2ms: + return 2000ul; /* 2 ms */ + case IXGBE_PCIDEVCTRL2_50_100us: + return 100ul; /* 100 us */ + case IXGBE_PCIDEVCTRL2_16_32ms_def: + return 32000ul; /* 32 ms */ + default: + break; + } + + /* We shouldn't need to hit this path, but just in case default as + * though completion timeout is not supported and support 32ms. + */ + return 32000ul; +} + +void ixgbe_disable_rx_queue(struct ixgbe_adapter *adapter) +{ + unsigned long wait_delay, delay_interval; + struct ixgbe_hw *hw = &adapter->hw; + int i, wait_loop; + u32 rxdctl; + + /* disable receives */ + hw->mac.ops.disable_rx(hw); + + if (IXGBE_REMOVED(hw->hw_addr)) + return; + + /* disable all enabled Rx queues */ + for (i = 0; i < adapter->num_rx_queues; i++) { + struct ixgbe_ring *ring = adapter->rx_ring[i]; + u8 reg_idx = ring->reg_idx; + + rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx)); + rxdctl &= ~IXGBE_RXDCTL_ENABLE; + rxdctl |= IXGBE_RXDCTL_SWFLSH; + + /* write value back with RXDCTL.ENABLE bit cleared */ + IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl); + } + + /* RXDCTL.EN may not change on 82598 if link is down, so skip it */ + if (hw->mac.type == ixgbe_mac_82598EB && + !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP)) + return; + + /* Determine our minimum delay interval. We will increase this value + * with each subsequent test. This way if the device returns quickly + * we should spend as little time as possible waiting, however as + * the time increases we will wait for larger periods of time. + * + * The trick here is that we increase the interval using the + * following pattern: 1x 3x 5x 7x 9x 11x 13x 15x 17x 19x. The result + * of that wait is that it totals up to 100x whatever interval we + * choose. Since our minimum wait is 100us we can just divide the + * total timeout by 100 to get our minimum delay interval. + */ + delay_interval = ixgbe_get_completion_timeout(adapter) / 100; + + wait_loop = IXGBE_MAX_RX_DESC_POLL; + wait_delay = delay_interval; + + while (wait_loop--) { + usleep_range(wait_delay, wait_delay + 10); + wait_delay += delay_interval * 2; + rxdctl = 0; + + /* OR together the reading of all the active RXDCTL registers, + * and then test the result. We need the disable to complete + * before we start freeing the memory and invalidating the + * DMA mappings. + */ + for (i = 0; i < adapter->num_rx_queues; i++) { + struct ixgbe_ring *ring = adapter->rx_ring[i]; + u8 reg_idx = ring->reg_idx; + + rxdctl |= IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx)); + } + + if (!(rxdctl & IXGBE_RXDCTL_ENABLE)) + return; + } + + e_err(drv, + "RXDCTL.ENABLE for one or more queues not cleared within the polling period\n"); +} + +void ixgbe_disable_tx_queue(struct ixgbe_adapter *adapter) +{ + unsigned long wait_delay, delay_interval; + struct ixgbe_hw *hw = &adapter->hw; + int i, wait_loop; + u32 txdctl; + + if (IXGBE_REMOVED(hw->hw_addr)) + return; + + /* disable all enabled Tx queues */ + for (i = 0; i < adapter->num_tx_queues; i++) { + struct ixgbe_ring *ring = adapter->tx_ring[i]; + u8 reg_idx = ring->reg_idx; + + IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH); + } + + /* disable all enabled XDP Tx queues */ + for (i = 0; i < adapter->num_xdp_queues; i++) { + struct ixgbe_ring *ring = adapter->xdp_ring[i]; + u8 reg_idx = ring->reg_idx; + + IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH); + } + + /* If the link is not up there shouldn't be much in the way of + * pending transactions. Those that are left will be flushed out + * when the reset logic goes through the flush sequence to clean out + * the pending Tx transactions. + */ + if (!(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP)) + goto dma_engine_disable; + + /* Determine our minimum delay interval. We will increase this value + * with each subsequent test. This way if the device returns quickly + * we should spend as little time as possible waiting, however as + * the time increases we will wait for larger periods of time. + * + * The trick here is that we increase the interval using the + * following pattern: 1x 3x 5x 7x 9x 11x 13x 15x 17x 19x. The result + * of that wait is that it totals up to 100x whatever interval we + * choose. Since our minimum wait is 100us we can just divide the + * total timeout by 100 to get our minimum delay interval. + */ + delay_interval = ixgbe_get_completion_timeout(adapter) / 100; + + wait_loop = IXGBE_MAX_RX_DESC_POLL; + wait_delay = delay_interval; + + while (wait_loop--) { + usleep_range(wait_delay, wait_delay + 10); + wait_delay += delay_interval * 2; + txdctl = 0; + + /* OR together the reading of all the active TXDCTL registers, + * and then test the result. We need the disable to complete + * before we start freeing the memory and invalidating the + * DMA mappings. + */ + for (i = 0; i < adapter->num_tx_queues; i++) { + struct ixgbe_ring *ring = adapter->tx_ring[i]; + u8 reg_idx = ring->reg_idx; + + txdctl |= IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx)); + } + for (i = 0; i < adapter->num_xdp_queues; i++) { + struct ixgbe_ring *ring = adapter->xdp_ring[i]; + u8 reg_idx = ring->reg_idx; + + txdctl |= IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx)); + } + + if (!(txdctl & IXGBE_TXDCTL_ENABLE)) + goto dma_engine_disable; + } + + e_err(drv, + "TXDCTL.ENABLE for one or more queues not cleared within the polling period\n"); + +dma_engine_disable: + /* Disable the Tx DMA engine on 82599 and later MAC */ + switch (hw->mac.type) { + case ixgbe_mac_82599EB: + case ixgbe_mac_X540: + case ixgbe_mac_X550: + case ixgbe_mac_X550EM_x: + case ixgbe_mac_X550EM_a: + case ixgbe_mac_E610: + IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, + (IXGBE_READ_REG(hw, IXGBE_DMATXCTL) & + ~IXGBE_DMATXCTL_TE)); + /* fall through */ + default: + break; + } +} + +bool ixgbe_fwlog_ring_full(struct ixgbe_fwlog_ring *rings) +{ + u16 head, tail; + + head = rings->head; + tail = rings->tail; + + if ((head < tail && (tail - head == (rings->size - 1))) || + (head > tail && (tail == (head - 1)))) + return true; + + return false; +} + +bool ixgbe_fwlog_ring_empty(struct ixgbe_fwlog_ring *rings) +{ + return rings->head == rings->tail; +} + +void ixgbe_fwlog_ring_increment(u16 *item, u16 size) +{ + *item = (*item + 1) & (size - 1); +} + +static int ixgbe_fwlog_alloc_ring_buffs(struct ixgbe_fwlog_ring *rings) +{ + int i, ret = 0; + + for (i = 0; i < rings->size; i++) { + struct ixgbe_fwlog_data *ring = &rings->rings[i]; + + ring->data_size = PAGE_SIZE; + ring->data = vzalloc(ring->data_size); + if (!ring->data) { + ret = -ENOMEM; + break; + } + } + + return ret; +} + +static void ixgbe_fwlog_free_ring_buffs(struct ixgbe_fwlog_ring *rings) +{ + int i; + + for (i = 0; i < rings->size; i++) { + struct ixgbe_fwlog_data *ring = &rings->rings[i]; + + vfree(ring->data); + + ring->data_size = 0; + } +} + +void ixgbe_fwlog_realloc_rings(struct ixgbe_hw *hw, int ring_size) +{ + struct ixgbe_fwlog_ring ring; + struct ixgbe_adapter *adapter = hw->back; + struct device *dev = ixgbe_pf_to_dev(adapter); + int status; + + if (ring_size == hw->fwlog_ring.size) + return; + + /* allocate space for the new rings and buffers then release the + * old rings and buffers. that way if we don't have enough + * memory then we at least have what we had before + */ + ring.rings = kcalloc(IXGBE_FWLOG_RING_SIZE_DFLT, + sizeof(*ring.rings), GFP_KERNEL); + if (!ring.rings) { + dev_warn(dev, "Unable to allocate memory for FW log ring\n"); + return; + } + + ring.size = ring_size; + + status = ixgbe_fwlog_alloc_ring_buffs(&ring); + if (status) { + dev_warn(dev, "Unable to allocate memory for FW log ring data buffers\n"); + ixgbe_fwlog_free_ring_buffs(&ring); + kfree(ring.rings); + return; + } + + ixgbe_fwlog_free_ring_buffs(&hw->fwlog_ring); + kfree(hw->fwlog_ring.rings); + + hw->fwlog_ring.rings = ring.rings; + hw->fwlog_ring.size = ring.size; + hw->fwlog_ring.head = 0; + hw->fwlog_ring.tail = 0; +} + +/** + * ixgbe_pf_fwlog_is_input_valid - validate user input level/events + * @adapter: pointer to the adapter struct + * @user_input: input parameters to validate + * + * Check if user input level or events are valid. + * If the validation fails, the corresponding message is printed. + * + * Return: true if the user input level/events are valid. + */ +static bool +ixgbe_pf_fwlog_is_input_valid(struct ixgbe_adapter *adapter, + struct ixgbe_fwlog_user_input *user_input) +{ + unsigned long events = user_input->events; + u8 log_level = user_input->log_level; + + if (log_level >= IXGBE_FWLOG_LEVEL_INVALID) { + dev_err(ixgbe_pf_to_dev(adapter), + "Invalid FW log level %u, all level(s) >= %u are invalid\n", + log_level, IXGBE_FWLOG_LEVEL_INVALID); + return false; + } + + if (events >= BIT(IXGBE_ACI_FW_LOG_ID_MAX)) { + dev_err(ixgbe_pf_to_dev(adapter), + "Invalid FW log events 0x%lx, all FW log event bits >= 0x%lx are invalid\n", + events, BIT(IXGBE_ACI_FW_LOG_ID_MAX)); + return false; + } + + if (user_input->log_method > IXGBE_FWLOG_METHOD_UART) { + dev_err(ixgbe_pf_to_dev(adapter), + "Invalid FW log method %u, all FW log methods > %u are invalid\n", + user_input->log_method, IXGBE_FWLOG_METHOD_UART); + return false; + } + + return true; +} + +/** + * ixgbe_pf_fwlog_update_modules - update 1 or more modules via debugfs + * @adapter: pointer to the adapter struct + * @log_level: log_level to use for the @events + * @events: events to update + * + * Take all the present modules and + * use ixgbe_fwlog_update_modules to update them. + * + * Return: the exit code of the operation. + */ +int ixgbe_pf_fwlog_update_modules(struct ixgbe_adapter *adapter, u8 log_level, + unsigned long events) +{ + struct ixgbe_fwlog_user_input user_input = { 0 }; + u16 num_entries, module_id, max_bits, i = 0; + struct ixgbe_fwlog_module_entry *entries; + int status; + + user_input.log_level = log_level; + user_input.events = events; + if (!ixgbe_pf_fwlog_is_input_valid(adapter, &user_input)) + return -EINVAL; + + num_entries = hweight_long(events); + entries = (struct ixgbe_fwlog_module_entry *) + kcalloc(num_entries, sizeof(*entries), GFP_KERNEL); + if (!entries) + return -ENOMEM; + + max_bits = min_t(u16, BITS_PER_TYPE(unsigned long), + IXGBE_ACI_FW_LOG_ID_MAX); + + for_each_set_bit(module_id, &events, max_bits) { + entries[i].module_id = module_id; + entries[i].log_level = log_level; + i++; + } + + status = ixgbe_fwlog_update_modules(&adapter->hw, entries, + num_entries); + + kfree(entries); + return status; +} + +s32 ixgbe_fwlog_init(struct ixgbe_hw *hw) +{ + struct ixgbe_adapter *adapter = hw->back; + struct device *dev = ixgbe_pf_to_dev(adapter); + int status; + + ixgbe_fwlog_set_support_ena(hw); + + if (ixgbe_fwlog_supported(hw)) { + /* read the current config from the FW and store it */ + status = ixgbe_fwlog_get(hw, &hw->fwlog_cfg); + if (status) + return status; + + hw->fwlog_ring.rings = kcalloc(IXGBE_FWLOG_RING_SIZE_DFLT, + sizeof(*hw->fwlog_ring.rings), + GFP_KERNEL); + if (!hw->fwlog_ring.rings) { + dev_warn(dev, "Unable to allocate memory for FW log ring\n"); + return -ENOMEM; + } + + hw->fwlog_ring.size = IXGBE_FWLOG_RING_SIZE_DFLT; + + status = ixgbe_fwlog_alloc_ring_buffs(&hw->fwlog_ring); + if (status) { + dev_warn(dev, "Unable to allocate memory for FW log ring data buffers\n"); + ixgbe_fwlog_free_ring_buffs(&hw->fwlog_ring); + kfree(hw->fwlog_ring.rings); + return status; + } + } else { + dev_warn(dev, "FW logging is not supported in this NVM image. Please update the NVM to get FW log support\n"); + } + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_pf_fwlog_init - initialize FW logging + * @adapter: pointer to the adapter struct + * + * Initialize Firmware logging configuration on device init. + * + * Return: the exit code of the operation. + */ +static s32 +ixgbe_pf_fwlog_init(struct ixgbe_adapter *adapter) +{ + s32 status; + + if (!adapter->hw.fwlog_support_ena) + return -EOPNOTSUPP; + + adapter->hw.fwlog_cfg.options |= IXGBE_FWLOG_OPTION_REGISTER_ON_INIT; + + status = ixgbe_fwlog_init(&adapter->hw); + if (status) { + dev_err(ixgbe_pf_to_dev(adapter), "Failed to init FW log configuration."); + return status; + } + + if ((adapter->hw.fwlog_cfg.options & IXGBE_FWLOG_OPTION_REGISTER_ON_INIT) && + ixgbe_fwlog_register(&adapter->hw)) + dev_dbg(ixgbe_pf_to_dev(adapter), "Failed to register for FW logging events\n"); + else + dev_dbg(ixgbe_pf_to_dev(adapter), "Failed to re-enable FW logging\n"); + + return 0; +} + +/** + * ixgbe_pf_fwlog_deinit - de-initialize FW logging + * @adapter: pointer to the adapter struct + * + * Cleanup Firmware logging configuration on device de-init. + * + * Return: nothing, just message in dmesg + */ +static void +ixgbe_pf_fwlog_deinit(struct ixgbe_adapter *adapter) +{ + if (ixgbe_fwlog_unregister(&adapter->hw)) { + struct device *dev = ixgbe_pf_to_dev(adapter); + + dev_dbg(dev, + "failed to unregister from FW logging\n"); + } + + ixgbe_fwlog_free_ring_buffs(&adapter->hw.fwlog_ring); + kfree(adapter->hw.fwlog_ring.rings); +} + +void ixgbe_reset(struct ixgbe_adapter *adapter) +{ + struct ixgbe_hw *hw = &adapter->hw; +#ifdef HAVE_SET_RX_MODE + struct net_device *netdev = adapter->netdev; +#endif + int err; + + if (IXGBE_REMOVED(hw->hw_addr)) + return; + /* lock SFP init bit to prevent race conditions with the watchdog */ + while (test_and_set_bit(__IXGBE_IN_SFP_INIT, adapter->state)) + usleep_range(1000, 2000); + + /* clear all SFP and link config related flags while holding SFP_INIT */ + adapter->flags2 &= ~(IXGBE_FLAG2_SEARCH_FOR_SFP | + IXGBE_FLAG2_SFP_NEEDS_RESET); + adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG; + + err = hw->mac.ops.init_hw(hw); + switch (err) { + case IXGBE_SUCCESS: + case IXGBE_ERR_SFP_NOT_PRESENT: + case IXGBE_ERR_SFP_NOT_SUPPORTED: + break; + case IXGBE_ERR_PRIMARY_REQUESTS_PENDING: + e_dev_err("primary disable timed out\n"); + break; + case IXGBE_ERR_EEPROM_VERSION: + /* We are running on a pre-production device, log a warning */ + e_dev_warn("This device is a pre-production adapter/LOM. " + "Please be aware there may be issues associated " + "with your hardware. If you are experiencing " + "problems please contact your Intel or hardware " + "representative who provided you with this " + "hardware.\n"); + break; + case IXGBE_ERR_OVERTEMP: + e_crit(drv, "%s\n", ixgbe_overheat_msg); + break; + default: + e_dev_err("Hardware Error: %d\n", err); + } + + clear_bit(__IXGBE_IN_SFP_INIT, adapter->state); + + /* flush entries out of MAC table */ + ixgbe_flush_sw_mac_table(adapter); +#ifdef HAVE_SET_RX_MODE + __dev_uc_unsync(netdev, NULL); +#endif + + /* do not flush user set addresses */ + ixgbe_mac_set_default_filter(adapter); + + /* update SAN MAC vmdq pool selection */ + if (hw->mac.san_mac_rar_index) + hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0)); + + /* Clear saved DMA coalescing values except for watchdog_timer */ + hw->mac.dmac_config.fcoe_en = false; + hw->mac.dmac_config.link_speed = 0; + hw->mac.dmac_config.fcoe_tc = 0; + hw->mac.dmac_config.num_tcs = 0; + +#ifdef HAVE_PTP_1588_CLOCK + if (test_bit(__IXGBE_PTP_RUNNING, adapter->state)) { + if (ixgbe_is_mac_E6xx(adapter->hw.mac.type)) + ixgbe_ptp_reset_e600(adapter); + else + ixgbe_ptp_reset(adapter); + } +#endif + + if (!netif_running(adapter->netdev) && !adapter->wol) + ixgbe_set_phy_power(hw, false); + else + ixgbe_set_phy_power(hw, true); +} + +/** + * ixgbe_clean_tx_ring - Free Tx Buffers + * @tx_ring: ring to be cleaned + **/ +static void ixgbe_clean_tx_ring(struct ixgbe_ring *tx_ring) +{ + u16 i = tx_ring->next_to_clean; + struct ixgbe_tx_buffer *tx_buffer = &tx_ring->tx_buffer_info[i]; + +#ifdef HAVE_AF_XDP_ZC_SUPPORT + if (tx_ring->xsk_pool) { + ixgbe_xsk_clean_tx_ring(tx_ring); + goto out; + } + +#endif + while (i != tx_ring->next_to_use) { + union ixgbe_adv_tx_desc *eop_desc, *tx_desc; + + /* Free all the Tx ring sk_buffs */ +#ifdef HAVE_XDP_SUPPORT + if (ring_is_xdp(tx_ring)) +#ifdef HAVE_XDP_FRAME_STRUCT + xdp_return_frame(tx_buffer->xdpf); +#else + page_frag_free(tx_buffer->data); +#endif + else + dev_kfree_skb_any(tx_buffer->skb); +#else + dev_kfree_skb_any(tx_buffer->skb); +#endif + + /* unmap skb header data */ + dma_unmap_single(tx_ring->dev, + dma_unmap_addr(tx_buffer, dma), + dma_unmap_len(tx_buffer, len), + DMA_TO_DEVICE); + + /* check for eop_desc to determine the end of the packet */ + eop_desc = tx_buffer->next_to_watch; + tx_desc = IXGBE_TX_DESC(tx_ring, i); + + /* unmap remaining buffers */ + while (tx_desc != eop_desc) { + tx_buffer++; + tx_desc++; + i++; + if (unlikely(i == tx_ring->count)) { + i = 0; + tx_buffer = tx_ring->tx_buffer_info; + tx_desc = IXGBE_TX_DESC(tx_ring, 0); + } + + /* unmap any remaining paged data */ + if (dma_unmap_len(tx_buffer, len)) + dma_unmap_page(tx_ring->dev, + dma_unmap_addr(tx_buffer, dma), + dma_unmap_len(tx_buffer, len), + DMA_TO_DEVICE); + } + + /* move us one more past the eop_desc for start of next pkt */ + tx_buffer++; + i++; + if (unlikely(i == tx_ring->count)) { + i = 0; + tx_buffer = tx_ring->tx_buffer_info; + } + } + + /* reset BQL for queue */ + if (!ring_is_xdp(tx_ring)) + netdev_tx_reset_queue(txring_txq(tx_ring)); + +#ifdef HAVE_AF_XDP_ZC_SUPPORT +out: +#endif + + /* reset next_to_use and next_to_clean */ + tx_ring->next_to_use = 0; + tx_ring->next_to_clean = 0; +} + +/** + * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues + * @adapter: board private structure + **/ +static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter) +{ + int i; + + for (i = 0; i < adapter->num_rx_queues; i++) + ixgbe_clean_rx_ring(adapter->rx_ring[i]); +} + +/** + * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues + * @adapter: board private structure + **/ +static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter *adapter) +{ + int i; + + for (i = 0; i < adapter->num_tx_queues; i++) + ixgbe_clean_tx_ring(adapter->tx_ring[i]); + for (i = 0; i < adapter->num_xdp_queues; i++) + ixgbe_clean_tx_ring(adapter->xdp_ring[i]); +} + +static void ixgbe_fdir_filter_exit(struct ixgbe_adapter *adapter) +{ + struct hlist_node *node2; + struct ixgbe_fdir_filter *filter; + + spin_lock(&adapter->fdir_perfect_lock); + + hlist_for_each_entry_safe(filter, node2, + &adapter->fdir_filter_list, fdir_node) { + hlist_del(&filter->fdir_node); + kfree(filter); + } + adapter->fdir_filter_count = 0; + + spin_unlock(&adapter->fdir_perfect_lock); +} + +void ixgbe_down(struct ixgbe_adapter *adapter) +{ + struct net_device *netdev = adapter->netdev; + struct ixgbe_hw *hw = &adapter->hw; + int i; + + /* signal that we are down to the interrupt handler */ + if (test_and_set_bit(__IXGBE_DOWN, adapter->state)) + return; /* do nothing if already down */ + + /* Shut off incoming Tx traffic */ + netif_tx_stop_all_queues(netdev); + + /* call carrier off first to avoid false dev_watchdog timeouts */ + netif_carrier_off(netdev); + netif_tx_disable(netdev); + + + /* Disable Rx */ + ixgbe_disable_rx_queue(adapter); + + /* synchronize_rcu() needed for pending XDP buffers to drain */ + if (adapter->xdp_ring[0]) + synchronize_rcu(); + + ixgbe_irq_disable(adapter); + + ixgbe_napi_disable_all(adapter); + + adapter->flags2 &= ~(IXGBE_FLAG2_FDIR_REQUIRES_REINIT); + clear_bit(__IXGBE_RESET_REQUESTED, adapter->state); + adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE; + + timer_delete_sync(&adapter->service_timer); + + if (adapter->num_vfs) { + /* Clear EITR Select mapping */ + IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, 0); + + /* Mark all the VFs as inactive */ + for (i = 0 ; i < adapter->num_vfs; i++) + adapter->vfinfo[i].clear_to_send = 0; + + /* update setting rx tx for all active vfs */ + ixgbe_set_all_vfs(adapter); + } + + /* disable transmits in the hardware now that interrupts are off */ + ixgbe_disable_tx_queue(adapter); + +#ifdef HAVE_PCI_ERS + if (!pci_channel_offline(adapter->pdev)) +#endif + ixgbe_reset(adapter); + + /* power down the optics for 82599 SFP+ fiber */ + if (hw->mac.ops.disable_tx_laser) + hw->mac.ops.disable_tx_laser(hw); + + ixgbe_clean_all_tx_rings(adapter); + ixgbe_clean_all_rx_rings(adapter); + + if (ixgbe_is_mac_E6xx(adapter->hw.mac.type)) + ixgbe_disable_link_status_events(adapter); +} + +/** + * ixgbe_set_eee_capable - helper function to determine EEE support on X550 + * @adapter: board private structure to initialize + **/ +static inline void ixgbe_set_eee_capable(struct ixgbe_adapter *adapter) +{ + struct ixgbe_hw *hw = &adapter->hw; + + switch (hw->device_id) { + case IXGBE_DEV_ID_X550EM_A_1G_T: + case IXGBE_DEV_ID_X550EM_A_1G_T_L: + case IXGBE_DEV_ID_E610_BACKPLANE: + case IXGBE_DEV_ID_E610_SFP: + case IXGBE_DEV_ID_E610_10G_T: + case IXGBE_DEV_ID_E610_2_5G_T: + if (!hw->phy.eee_speeds_supported) + break; + adapter->flags2 |= IXGBE_FLAG2_EEE_CAPABLE; + if (!hw->phy.eee_speeds_advertised) + break; + adapter->eee_state = IXGBE_EEE_ENABLED; + break; + default: + adapter->flags2 &= ~IXGBE_FLAG2_EEE_CAPABLE; + adapter->eee_state = IXGBE_EEE_DISABLED; + break; + } +} + +#if IS_ENABLED(CONFIG_DCB) +static void ixgbe_init_dcb(struct ixgbe_adapter *adapter) +{ + struct ixgbe_dcb_tc_config *tc; + int j, bwg_pct; + + /* Configure DCB traffic classes */ + bwg_pct = 100 / adapter->dcb_cfg.num_tcs.pg_tcs; + for (j = 0; j < adapter->dcb_cfg.num_tcs.pg_tcs; j++) { + tc = &adapter->dcb_cfg.tc_config[j]; + tc->path[IXGBE_DCB_TX_CONFIG].bwg_id = 0; + tc->path[IXGBE_DCB_TX_CONFIG].bwg_percent = bwg_pct; + tc->path[IXGBE_DCB_RX_CONFIG].bwg_id = 0; + tc->path[IXGBE_DCB_RX_CONFIG].bwg_percent = bwg_pct; + tc->pfc = ixgbe_dcb_pfc_disabled; + } + + /* reset back to TC 0 */ + tc = &adapter->dcb_cfg.tc_config[0]; + + /* total of all TCs bandwidth needs to be 100 */ + bwg_pct += 100 % adapter->dcb_cfg.num_tcs.pg_tcs; + tc->path[IXGBE_DCB_TX_CONFIG].bwg_percent = bwg_pct; + tc->path[IXGBE_DCB_RX_CONFIG].bwg_percent = bwg_pct; + + /* Initialize default user to priority mapping, UPx->TC0 */ + tc->path[IXGBE_DCB_TX_CONFIG].up_to_tc_bitmap = 0xFF; + tc->path[IXGBE_DCB_RX_CONFIG].up_to_tc_bitmap = 0xFF; + + adapter->dcb_cfg.bw_percentage[IXGBE_DCB_TX_CONFIG][0] = 100; + adapter->dcb_cfg.bw_percentage[IXGBE_DCB_RX_CONFIG][0] = 100; + adapter->dcb_cfg.rx_pba_cfg = ixgbe_dcb_pba_equal; + adapter->dcb_cfg.pfc_mode_enable = false; + adapter->dcb_cfg.round_robin_enable = false; + adapter->dcb_set_bitmap = 0x00; + if (adapter->flags & IXGBE_FLAG_DCB_CAPABLE) + adapter->dcbx_cap = DCB_CAP_DCBX_HOST | DCB_CAP_DCBX_VER_CEE; + memcpy(&adapter->temp_dcb_cfg, &adapter->dcb_cfg, + sizeof(adapter->temp_dcb_cfg)); +} +#endif /*CONFIG_DCB*/ + +/** + * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter) + * @adapter: board private structure to initialize + * + * ixgbe_sw_init initializes the Adapter private data structure. + * Fields are initialized based on PCI device information and + * OS network device settings (MTU size). + **/ +#ifdef HAVE_CONFIG_HOTPLUG +static int __devinit ixgbe_sw_init(struct ixgbe_adapter *adapter) +#else +static int ixgbe_sw_init(struct ixgbe_adapter *adapter) +#endif +{ + struct ixgbe_hw *hw = &adapter->hw; + struct pci_dev *pdev = adapter->pdev; + int err; + unsigned int fdir; + u32 fwsm; +#ifdef HAVE_TC_SETUP_CLSU32 + int i; +#endif + + /* PCI config space info */ + + hw->vendor_id = pdev->vendor; + hw->device_id = pdev->device; + pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id); + if (hw->revision_id == IXGBE_FAILED_READ_CFG_BYTE && + ixgbe_check_cfg_remove(hw, pdev)) { + e_err(probe, "read of revision id failed\n"); + err = -ENODEV; + goto out; + } + hw->subsystem_vendor_id = pdev->subsystem_vendor; + hw->subsystem_device_id = pdev->subsystem_device; + + err = ixgbe_init_shared_code(hw); + if (err) { + e_err(probe, "init_shared_code failed: %d\n", err); + goto out; + } + + ixgbe_set_ethtool_ops(adapter->netdev); + +#ifdef HAVE_TC_SETUP_CLSU32 + /* initialize static ixgbe jump table entries */ + adapter->jump_tables[0] = kzalloc(sizeof(*adapter->jump_tables[0]), + GFP_KERNEL); + if (!adapter->jump_tables[0]) + return -ENOMEM; + adapter->jump_tables[0]->mat = ixgbe_ipv4_fields; + + for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++) + adapter->jump_tables[i] = NULL; +#endif /* HAVE_TC_SETUP_CLSU32 */ + adapter->mac_table = kzalloc(sizeof(struct ixgbe_mac_addr) * + hw->mac.num_rar_entries, + GFP_KERNEL); + if (!adapter->mac_table) { + err = IXGBE_ERR_OUT_OF_MEM; + e_err(probe, "mac_table allocation failed: %d\n", err); + goto out; + } + + if (ixgbe_init_rss_key(adapter)) { + err = IXGBE_ERR_OUT_OF_MEM; + e_err(probe, "rss_key allocation failed: %d\n", err); + goto out; + } + + adapter->af_xdp_zc_qps = bitmap_zalloc(IXGBE_MAX_XDP_QS, GFP_KERNEL); + if (!adapter->af_xdp_zc_qps) + return -ENOMEM; + + /* Set common capability flags and settings */ +#if IS_ENABLED(CONFIG_DCA) + adapter->flags |= IXGBE_FLAG_DCA_CAPABLE; +#endif +#if IS_ENABLED(CONFIG_DCB) + adapter->flags |= IXGBE_FLAG_DCB_CAPABLE; + adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED; +#endif +#if IS_ENABLED(CONFIG_FCOE) + adapter->flags |= IXGBE_FLAG_FCOE_CAPABLE; + adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED; +#if IS_ENABLED(CONFIG_DCB) + /* Default traffic class to use for FCoE */ + adapter->fcoe.up = IXGBE_FCOE_DEFUP; + adapter->fcoe.up_set = IXGBE_FCOE_DEFUP; +#endif /* CONFIG_DCB */ +#endif /* CONFIG_FCOE */ + adapter->flags2 |= IXGBE_FLAG2_RSC_CAPABLE; + fdir = min_t(int, IXGBE_MAX_FDIR_INDICES, num_online_cpus()); + adapter->ring_feature[RING_F_FDIR].limit = fdir; + adapter->max_q_vectors = IXGBE_MAX_MSIX_Q_VECTORS_82599; + + /* Set MAC specific capability flags and exceptions */ + switch (hw->mac.type) { + case ixgbe_mac_82598EB: + adapter->flags |= IXGBE_FLAGS_82598_INIT; + adapter->flags2 &= ~IXGBE_FLAG2_RSC_CAPABLE; + + if (hw->device_id == IXGBE_DEV_ID_82598AT) + adapter->flags |= IXGBE_FLAG_FAN_FAIL_CAPABLE; + + adapter->max_q_vectors = IXGBE_MAX_MSIX_Q_VECTORS_82598; + adapter->ring_feature[RING_F_FDIR].limit = 0; +#if IS_ENABLED(CONFIG_FCOE) + adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE; +#if IS_ENABLED(CONFIG_DCB) + adapter->fcoe.up = 0; + adapter->fcoe.up_set = 0; +#endif /* IXGBE_DCB */ +#endif /* CONFIG_FCOE */ + break; + case ixgbe_mac_82599EB: + adapter->flags |= IXGBE_FLAGS_82599_INIT; + if (hw->device_id == IXGBE_DEV_ID_82599_T3_LOM) + adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE; +#ifndef IXGBE_NO_SMART_SPEED + hw->phy.smart_speed = ixgbe_smart_speed_on; +#else + hw->phy.smart_speed = ixgbe_smart_speed_off; +#endif + break; + case ixgbe_mac_X540: + adapter->flags |= IXGBE_FLAGS_X540_INIT; + fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM); + if (fwsm & IXGBE_FWSM_TS_ENABLED) + adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE; + break; + case ixgbe_mac_X550EM_a: + adapter->flags |= IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE; + switch (hw->device_id) { + case IXGBE_DEV_ID_X550EM_A_1G_T: + case IXGBE_DEV_ID_X550EM_A_1G_T_L: + adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE; + break; + default: + break; + } + fallthrough; + case ixgbe_mac_X550EM_x: + fallthrough; + case ixgbe_mac_E610: + fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM_X550EM_a); + if ((fwsm & IXGBE_FWSM_TS_ENABLED) && + ixgbe_is_mac_E6xx(adapter->hw.mac.type)) + adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE; + adapter->flags2 &= ~IXGBE_FLAG2_FWLOG_CAPABLE; + hw->fwlog_support_ena = false; +#if IS_ENABLED(CONFIG_DCB) + adapter->flags &= ~IXGBE_FLAG_DCB_CAPABLE; +#endif +#if IS_ENABLED(CONFIG_FCOE) + adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE; +#if IS_ENABLED(CONFIG_DCB) + adapter->fcoe.up = 0; + adapter->fcoe.up_set = 0; +#endif /* CONFIG_DCB */ +#endif /* CONFIG_FCOE */ + if (ixgbe_is_mac_E6xx(hw->mac.type)) { + adapter->flags2 |= IXGBE_FLAG2_FWLOG_CAPABLE; + } + fallthrough; + case ixgbe_mac_X550: + if (hw->mac.type == ixgbe_mac_X550) + adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE; + ixgbe_set_eee_capable(adapter); + adapter->flags |= IXGBE_FLAGS_X550_INIT; +#if IS_ENABLED(CONFIG_DCA) + adapter->flags &= ~IXGBE_FLAG_DCA_CAPABLE; +#endif /* CONFIG_DCA */ + fallthrough; + default: + break; + } + +#if IS_ENABLED(CONFIG_FCOE) + /* FCoE support exists, always init the FCoE lock */ + spin_lock_init(&adapter->fcoe.lock); +#endif /* CONFIG_FCOE */ + + /* n-tuple support exists, always init our spinlock */ + spin_lock_init(&adapter->fdir_perfect_lock); + +#if IS_ENABLED(CONFIG_DCB) + switch (hw->mac.type) { + case ixgbe_mac_82598EB: + case ixgbe_mac_82599EB: + adapter->dcb_cfg.num_tcs.pg_tcs = 8; + adapter->dcb_cfg.num_tcs.pfc_tcs = 8; + break; + case ixgbe_mac_X540: + case ixgbe_mac_X550: + case ixgbe_mac_E610: + adapter->dcb_cfg.num_tcs.pg_tcs = 4; + adapter->dcb_cfg.num_tcs.pfc_tcs = 4; + break; + case ixgbe_mac_X550EM_x: + case ixgbe_mac_X550EM_a: + default: + adapter->dcb_cfg.num_tcs.pg_tcs = 1; + adapter->dcb_cfg.num_tcs.pfc_tcs = 1; + break; + } + ixgbe_init_dcb(adapter); + +#endif /* CONFIG_DCB */ + + if (hw->mac.type == ixgbe_mac_82599EB || + hw->mac.type == ixgbe_mac_X550 || + hw->mac.type == ixgbe_mac_X550EM_x || + hw->mac.type == ixgbe_mac_X550EM_a || + hw->mac.type == ixgbe_mac_X540 || + ixgbe_is_mac_E6xx(hw->mac.type)) + ixgbe_init_mbx_params_pf(hw); + + /* default flow control settings */ + hw->fc.requested_mode = ixgbe_fc_full; + hw->fc.current_mode = ixgbe_fc_full; /* init for ethtool output */ + + adapter->last_lfc_mode = hw->fc.current_mode; + ixgbe_pbthresh_setup(adapter); + hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE; + hw->fc.send_xon = true; + hw->fc.disable_fc_autoneg = false; + + /* set default ring sizes */ + adapter->tx_ring_count = IXGBE_DEFAULT_TXD; + adapter->rx_ring_count = IXGBE_DEFAULT_RXD; + + /* set default work limits */ + adapter->tx_work_limit = IXGBE_DEFAULT_TX_WORK; + + set_bit(__IXGBE_DOWN, adapter->state); + +#ifdef HAVE_XDP_SUPPORT + /* enable locking for XDP_TX if we have more CPUs than queues */ + if (nr_cpu_ids > IXGBE_MAX_XDP_QS) + static_branch_enable(&ixgbe_xdp_locking_key); +#endif +out: + return err; +} + +/** + * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors) + * @tx_ring: tx descriptor ring (for a specific queue) to setup + * + * Return 0 on success, negative on failure + **/ +int ixgbe_setup_tx_resources(struct ixgbe_ring *tx_ring) +{ + struct device *dev = tx_ring->dev; + int orig_node = dev_to_node(dev); + int node = -1; + int size; + + size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count; + + if (tx_ring->q_vector) + node = tx_ring->q_vector->node; + + tx_ring->tx_buffer_info = vmalloc_node(size, node); + if (!tx_ring->tx_buffer_info) + tx_ring->tx_buffer_info = vmalloc(size); + if (!tx_ring->tx_buffer_info) + goto err; + + /* round up to nearest 4K */ + tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc); + tx_ring->size = ALIGN(tx_ring->size, 4096); + + set_dev_node(dev, node); + tx_ring->desc = dma_alloc_coherent(dev, + tx_ring->size, + &tx_ring->dma, + GFP_KERNEL); + set_dev_node(dev, orig_node); + if (!tx_ring->desc) + tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size, + &tx_ring->dma, GFP_KERNEL); + if (!tx_ring->desc) + goto err; + + return 0; + +err: + vfree(tx_ring->tx_buffer_info); + tx_ring->tx_buffer_info = NULL; + dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n"); + return -ENOMEM; +} + +/** + * ixgbe_setup_all_tx_resources - allocate all queues Tx resources + * @adapter: board private structure + * + * If this function returns with an error, then it's possible one or + * more of the rings is populated (while the rest are not). It is the + * callers duty to clean those orphaned rings. + * + * Return 0 on success, negative on failure + **/ +static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter) +{ + int i, j = 0, err = 0; + + for (i = 0; i < adapter->num_tx_queues; i++) { + + + err = ixgbe_setup_tx_resources(adapter->tx_ring[i]); + if (!err) + continue; + + e_err(probe, "Allocation for Tx Queue %u failed\n", i); + goto err_setup_tx; + } + for (j = 0; j < adapter->num_xdp_queues; j++) { + err = ixgbe_setup_tx_resources(adapter->xdp_ring[j]); + if (!err) + continue; + + e_err(probe, "Allocation for Tx Queue %u failed\n", j); + goto err_setup_tx; + } + + return 0; +err_setup_tx: + /* rewind the index freeing the rings as we go */ + while (j--) + ixgbe_free_tx_resources(adapter->xdp_ring[j]); + while (i--) + ixgbe_free_tx_resources(adapter->tx_ring[i]); + return err; +} + +#ifdef HAVE_XDP_BUFF_RXQ +static int ixgbe_rx_napi_id(struct ixgbe_ring *rx_ring) +{ + struct ixgbe_q_vector *q_vector = rx_ring->q_vector; + + return q_vector ? q_vector->napi.napi_id : 0; +} +#endif + +/** + * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors) + * @adapter: board private structure + * @rx_ring: rx descriptor ring (for a specific queue) to setup + * + * Returns 0 on success, negative on failure + **/ +int ixgbe_setup_rx_resources(struct ixgbe_adapter *adapter, + struct ixgbe_ring *rx_ring) +{ + struct device *dev = rx_ring->dev; + int orig_node = dev_to_node(dev); + int node = -1; + int size; +#ifdef HAVE_XDP_BUFF_RXQ +#ifdef HAVE_XDP_FRAME_STRUCT +#ifndef HAVE_AF_XDP_ZC_SUPPORT + int err; +#endif /* HAVE_AF_XDP_ZC_SUPPORT */ +#endif /* HAVE_XDP_FRAME_STRUCT */ +#endif /* HAVE_XDP_BUFF_RXQ */ + + size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count; + + if (rx_ring->q_vector) + node = rx_ring->q_vector->node; + + rx_ring->rx_buffer_info = vmalloc_node(size, node); + if (!rx_ring->rx_buffer_info) + rx_ring->rx_buffer_info = vmalloc(size); + if (!rx_ring->rx_buffer_info) + goto err; + + /* Round up to nearest 4K */ + rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc); + rx_ring->size = ALIGN(rx_ring->size, 4096); + + set_dev_node(dev, node); + rx_ring->desc = dma_alloc_coherent(dev, + rx_ring->size, + &rx_ring->dma, + GFP_KERNEL); + set_dev_node(dev, orig_node); + if (!rx_ring->desc) + rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size, + &rx_ring->dma, GFP_KERNEL); + if (!rx_ring->desc) + goto err; + +#ifdef HAVE_XDP_BUFF_RXQ + /* XDP RX-queue info */ + if (xdp_rxq_info_reg(&rx_ring->xdp_rxq, adapter->netdev, + rx_ring->queue_index, + ixgbe_rx_napi_id(rx_ring)) < 0) + goto err; + +#ifndef HAVE_AF_XDP_ZC_SUPPORT +#ifdef HAVE_XDP_FRAME_STRUCT + err = xdp_rxq_info_reg_mem_model(&rx_ring->xdp_rxq, + MEM_TYPE_PAGE_SHARED, NULL); + if (err) { + xdp_rxq_info_unreg(&rx_ring->xdp_rxq); + goto err; + } +#endif /* HAVE_XDP_FRAME_STRUCT */ +#endif /* HAVE_AF_XDP_ZC_SUPPORT */ +#endif /* HAVE_XDP_BUFF_RXQ */ + + rx_ring->xdp_prog = adapter->xdp_prog; + + return 0; +err: + vfree(rx_ring->rx_buffer_info); + rx_ring->rx_buffer_info = NULL; + dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n"); + return -ENOMEM; +} + +/** + * ixgbe_setup_all_rx_resources - allocate all queues Rx resources + * @adapter: board private structure + * + * If this function returns with an error, then it's possible one or + * more of the rings is populated (while the rest are not). It is the + * callers duty to clean those orphaned rings. + * + * Return 0 on success, negative on failure + **/ +static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter) +{ + int i, err = 0; + + for (i = 0; i < adapter->num_rx_queues; i++) { + err = ixgbe_setup_rx_resources(adapter, adapter->rx_ring[i]); + if (!err) + continue; + + e_err(probe, "Allocation for Rx Queue %u failed\n", i); + goto err_setup_rx; + } + +#if IS_ENABLED(CONFIG_FCOE) + err = ixgbe_setup_fcoe_ddp_resources(adapter); + if (!err) +#endif + return 0; +err_setup_rx: + /* rewind the index freeing the rings as we go */ + while (i--) + ixgbe_free_rx_resources(adapter->rx_ring[i]); + return err; +} + +/** + * ixgbe_free_tx_resources - Free Tx Resources per Queue + * @tx_ring: Tx descriptor ring for a specific queue + * + * Free all transmit software resources + **/ +void ixgbe_free_tx_resources(struct ixgbe_ring *tx_ring) +{ + ixgbe_clean_tx_ring(tx_ring); + + vfree(tx_ring->tx_buffer_info); + tx_ring->tx_buffer_info = NULL; + + /* if not set, then don't free */ + if (!tx_ring->desc) + return; + + dma_free_coherent(tx_ring->dev, tx_ring->size, + tx_ring->desc, tx_ring->dma); + tx_ring->desc = NULL; +} + +/** + * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues + * @adapter: board private structure + * + * Free all transmit software resources + **/ +static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter) +{ + int i; + + for (i = 0; i < adapter->num_tx_queues; i++) + ixgbe_free_tx_resources(adapter->tx_ring[i]); + for (i = 0; i < adapter->num_xdp_queues; i++) + if (adapter->xdp_ring[i]->desc) + ixgbe_free_tx_resources(adapter->xdp_ring[i]); +} + +/** + * ixgbe_free_rx_resources - Free Rx Resources + * @rx_ring: ring to clean the resources from + * + * Free all receive software resources + **/ +void ixgbe_free_rx_resources(struct ixgbe_ring *rx_ring) +{ + ixgbe_clean_rx_ring(rx_ring); + + rx_ring->xdp_prog = NULL; +#ifdef HAVE_XDP_BUFF_RXQ + xdp_rxq_info_unreg(&rx_ring->xdp_rxq); +#endif + vfree(rx_ring->rx_buffer_info); + rx_ring->rx_buffer_info = NULL; + + /* if not set, then don't free */ + if (!rx_ring->desc) + return; + + dma_free_coherent(rx_ring->dev, rx_ring->size, + rx_ring->desc, rx_ring->dma); + + rx_ring->desc = NULL; +} + +/** + * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues + * @adapter: board private structure + * + * Free all receive software resources + **/ +static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter) +{ + int i; + +#if IS_ENABLED(CONFIG_FCOE) + ixgbe_free_fcoe_ddp_resources(adapter); +#endif + + for (i = 0; i < adapter->num_rx_queues; i++) + ixgbe_free_rx_resources(adapter->rx_ring[i]); +} + +/** + * ixgbe_change_mtu - Change the Maximum Transfer Unit + * @netdev: network interface device structure + * @new_mtu: new value for maximum frame size + * + * Returns 0 on success, negative on failure + **/ +static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu) +{ + struct ixgbe_adapter *adapter = netdev_priv(netdev); +#ifndef HAVE_NETDEVICE_MIN_MAX_MTU + int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN; +#endif + + if (adapter->xdp_prog) { + int new_frame_size = new_mtu + IXGBE_PKT_HDR_PAD; + int i; + + for (i = 0; i < adapter->num_rx_queues; i++) { + struct ixgbe_ring *ring = adapter->rx_ring[i]; + + if (new_frame_size > ixgbe_rx_bufsz(ring)) { + e_warn(probe, "Requested MTU size is not supported with XDP\n"); + return -EINVAL; + } + } + } + +#ifndef HAVE_NETDEVICE_MIN_MAX_MTU + /* MTU < 68 is an error and causes problems on some kernels */ + if ((new_mtu < 68) || (max_frame > IXGBE_MAX_JUMBO_FRAME_SIZE)) + return -EINVAL; + +#endif + /* + * For 82599EB we cannot allow legacy VFs to enable their receive + * paths when MTU greater than 1500 is configured. So display a + * warning that legacy VFs will be disabled. + */ + if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) && + (adapter->hw.mac.type == ixgbe_mac_82599EB) && +#ifndef HAVE_NETDEVICE_MIN_MAX_MTU + (max_frame > (ETH_FRAME_LEN + ETH_FCS_LEN))) +#else + (new_mtu > ETH_DATA_LEN)) +#endif + e_warn(probe, "Setting MTU > 1500 will disable legacy VFs\n"); + + e_info(probe, "changing MTU from %d to %d\n", netdev->mtu, new_mtu); + + /* must set new MTU before calling down or up */ + netdev->mtu = new_mtu; + + if (netif_running(netdev)) + ixgbe_reinit_locked(adapter); + + return 0; +} + +/** + * ixgbe_open - Called when a network interface is made active + * @netdev: network interface device structure + * + * Returns 0 on success, negative value on failure + * + * The open entry point is called when a network interface is made + * active by the system (IFF_UP). At this point all resources needed + * for transmit and receive operations are allocated, the interrupt + * handler is registered with the OS, the watchdog timer is started, + * and the stack is notified that the interface is ready. + **/ +int ixgbe_open(struct net_device *netdev) +{ + struct ixgbe_adapter *adapter = netdev_priv(netdev); + int err; + + /* disallow open during test */ + if (test_bit(__IXGBE_TESTING, adapter->state)) + return -EBUSY; + + netif_carrier_off(netdev); + + /* allocate transmit descriptors */ + err = ixgbe_setup_all_tx_resources(adapter); + if (err) + goto err_setup_tx; + + /* allocate receive descriptors */ + err = ixgbe_setup_all_rx_resources(adapter); + if (err) + goto err_setup_rx; + + ixgbe_configure(adapter); + + err = ixgbe_request_irq(adapter); + if (err) + goto err_req_irq; + + /* Notify the stack of the actual queue counts. */ + err = netif_set_real_num_tx_queues(netdev, + adapter->num_rx_pools > 1 ? 1 : + adapter->num_tx_queues); + if (err) + goto err_set_queues; + + err = netif_set_real_num_rx_queues(netdev, + adapter->num_rx_pools > 1 ? 1 : + adapter->num_rx_queues); + if (err) + goto err_set_queues; + +#ifdef HAVE_PTP_1588_CLOCK + if (!ixgbe_is_mac_E6xx(adapter->hw.mac.type)) + ixgbe_ptp_init(adapter); +#endif /* HAVE_PTP_1588_CLOCK*/ + + ixgbe_up_complete(adapter); + +#if defined(HAVE_UDP_ENC_RX_OFFLOAD) && defined(HAVE_UDP_TUNNEL_NIC_INFO) + udp_tunnel_nic_reset_ntf(netdev); +#else +#if defined(HAVE_UDP_ENC_RX_OFFLOAD) || defined(HAVE_VXLAN_RX_OFFLOAD) + ixgbe_clear_udp_tunnel_port(adapter, IXGBE_VXLANCTRL_ALL_UDPPORT_MASK); +#endif +#ifdef HAVE_UDP_ENC_RX_OFFLOAD + udp_tunnel_get_rx_info(netdev); +#elif defined(HAVE_VXLAN_RX_OFFLOAD) + vxlan_get_rx_port(netdev); +#endif /* HAVE_UDP_ENC_RX_OFFLOAD */ +#endif /* HAVE_UDP_ENC_RX_OFFLOAD && HAVE_UDP_TUNNEL_NIC_INFO */ + if (!ixgbe_is_mac_E6xx(adapter->hw.mac.type)) + goto out; + + if (ixgbe_update_link_info(&adapter->hw)) + e_dev_warn("ixgbe_update_link_info failed\n"); + + ixgbe_check_link_cfg_err(adapter, + adapter->hw.link.link_info.link_cfg_err); + + if (ixgbe_non_sfp_link_config(&adapter->hw)) + e_dev_warn("link setup failed\n"); +out: + return IXGBE_SUCCESS; + +err_set_queues: + ixgbe_free_irq(adapter); +err_req_irq: + ixgbe_free_all_rx_resources(adapter); + if (!adapter->wol) + ixgbe_set_phy_power(&adapter->hw, false); +err_setup_rx: + ixgbe_free_all_tx_resources(adapter); +err_setup_tx: + ixgbe_reset(adapter); + + return err; +} + +/** + * ixgbe_close_suspend - actions necessary to both suspend and close flows + * @adapter: the private adapter struct + * + * This function should contain the necessary work common to both suspending + * and closing of the device. + */ +static void ixgbe_close_suspend(struct ixgbe_adapter *adapter) +{ +#ifdef HAVE_PTP_1588_CLOCK + if (!ixgbe_is_mac_E6xx(adapter->hw.mac.type)) + ixgbe_ptp_suspend(adapter); +#endif + + if (adapter->hw.phy.ops.enter_lplu) { + adapter->hw.phy.reset_disable = true; + ixgbe_down(adapter); + ixgbe_enter_lplu(&adapter->hw); + adapter->hw.phy.reset_disable = false; + } else { + ixgbe_down(adapter); + } + ixgbe_free_irq(adapter); + + ixgbe_free_all_rx_resources(adapter); + ixgbe_free_all_tx_resources(adapter); +} + +/** + * ixgbe_close - Disables a network interface + * @netdev: network interface device structure + * + * Returns 0, this is not allowed to fail + * + * The close entry point is called when an interface is de-activated + * by the OS. The hardware is still under the drivers control, but + * needs to be disabled. A global MAC reset is issued to stop the + * hardware, and all transmit and receive resources are freed. + **/ +int ixgbe_close(struct net_device *netdev) +{ + struct ixgbe_adapter *adapter = netdev_priv(netdev); + +#ifdef HAVE_PTP_1588_CLOCK + if (!ixgbe_is_mac_E6xx(adapter->hw.mac.type)) + ixgbe_ptp_stop(adapter); +#endif + + if (netif_device_present(netdev)) + ixgbe_close_suspend(adapter); + + ixgbe_fdir_filter_exit(adapter); + + ixgbe_release_hw_control(adapter); + + return 0; +} + +#ifdef CONFIG_PM +/** + * ixgbe_resume - Resume the network device from a suspended state + * @dev: Device structure (or PCI device structure if using legacy PM support) + * + * This function resumes the network device from a suspended state. It restores + * the PCI device state, reinitializes the device, and reattaches the network + * interface if it was running before suspension. The function handles both + * legacy and non-legacy power management support. + * + * Return: 0 on success, or a negative error code if the device cannot be enabled. + */ +#ifndef USE_LEGACY_PM_SUPPORT +static int ixgbe_resume(struct device *dev) +#else +static int ixgbe_resume(struct pci_dev *pdev) +#endif /* USE_LEGACY_PM_SUPPORT */ +{ + struct ixgbe_adapter *adapter; + struct net_device *netdev; + int err; +#ifndef USE_LEGACY_PM_SUPPORT + struct pci_dev *pdev = to_pci_dev(dev); +#endif + + adapter = pci_get_drvdata(pdev); + netdev = adapter->netdev; + adapter->hw.hw_addr = adapter->io_addr; + pci_set_power_state(pdev, PCI_D0); + pci_restore_state(pdev); + /* + * pci_restore_state clears dev->state_saved so call + * pci_save_state to restore it. + */ + pci_save_state(pdev); + + err = pci_enable_device_mem(pdev); + if (err) { + e_dev_err("Cannot enable PCI device from suspend\n"); + return err; + } + smp_mb__before_atomic(); + clear_bit(__IXGBE_DISABLED, adapter->state); + pci_set_master(pdev); + + pci_wake_from_d3(pdev, false); + + ixgbe_reset(adapter); + + IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0); + + rtnl_lock(); + + err = ixgbe_init_interrupt_scheme(adapter); + if (!err && netif_running(netdev)) + err = ixgbe_open(netdev); + + + if (!err) + netif_device_attach(netdev); + + rtnl_unlock(); + + return err; +} + +#ifndef USE_LEGACY_PM_SUPPORT +/** + * ixgbe_freeze - Quiesce the device (disable IRQs and DMA) + * @dev: The port's network device + * + * This function quiesces the ixgbe network adapter by detaching the network + * device and disabling interrupts and DMA operations. It stops the network + * interface if it is running and handles specific hardware configurations, + * such as low power link up (LPLU) mode, if applicable. The function ensures + * that the device is in a safe state for operations like power management. + * + * Return: Always returns 0. + */ +static int ixgbe_freeze(struct device *dev) +{ + struct ixgbe_adapter *adapter = pci_get_drvdata(to_pci_dev(dev)); + struct net_device *netdev = adapter->netdev; + bool lplu_enabled = !!adapter->hw.phy.ops.enter_lplu; + + rtnl_lock(); + netif_device_detach(netdev); + + if (netif_running(netdev)) { + if (lplu_enabled) { + adapter->hw.phy.reset_disable = true; + ixgbe_down(adapter); + adapter->hw.phy.reset_disable = false; + } else { + ixgbe_down(adapter); + } + ixgbe_free_irq(adapter); + } + + ixgbe_reset_interrupt_capability(adapter); + rtnl_unlock(); + + return 0; +} + +/** + * ixgbe_thaw - Un-quiesce the device and resume operations + * @dev: The port's net device structure + * + * This function resumes operations for the ixgbe network adapter after it + * has been quiesced. It sets up interrupt capabilities and, if the network + * interface is running, requests IRQs and brings the device up. The function + * also handles specific hardware configurations, such as low power link up + * (LPLU) mode, if applicable. Finally, it reattaches the network device to + * the system. + * + * Return: 0 on success, or a negative error code if IRQ request fails. + */ +static int ixgbe_thaw(struct device *dev) +{ + struct ixgbe_adapter *adapter = pci_get_drvdata(to_pci_dev(dev)); + struct net_device *netdev = adapter->netdev; + bool lplu_enabled = !!adapter->hw.phy.ops.enter_lplu; + + ixgbe_set_interrupt_capability(adapter); + + if (netif_running(netdev)) { + u32 err = ixgbe_request_irq(adapter); + if (err) + return err; + + if (lplu_enabled) { + adapter->hw.phy.reset_disable = true; + ixgbe_up(adapter); + adapter->hw.phy.reset_disable = false; + } else { + ixgbe_up(adapter); + } + } + + netif_device_attach(netdev); + + return 0; +} +#endif /* USE_LEGACY_PM_SUPPORT */ +#endif /* CONFIG_PM */ + +/* + * __ixgbe_shutdown is not used when power management + * is disabled on older kernels (<2.6.12). causes a compile + * warning/error, because it is defined and not used. + */ +#if defined(CONFIG_PM) || !defined(USE_REBOOT_NOTIFIER) +static int __ixgbe_shutdown(struct pci_dev *pdev, bool *enable_wake) +{ + struct ixgbe_adapter *adapter = pci_get_drvdata(pdev); + struct net_device *netdev = adapter->netdev; + struct ixgbe_hw *hw = &adapter->hw; + u32 ctrl; + u32 wufc = adapter->wol; +#ifdef CONFIG_PM + int retval = 0; +#endif + + rtnl_lock(); + netif_device_detach(netdev); + + if (netif_running(netdev)) + ixgbe_close_suspend(adapter); + + ixgbe_clear_interrupt_scheme(adapter); + rtnl_unlock(); + +#ifdef CONFIG_PM + retval = pci_save_state(pdev); + if (retval) + return retval; + +#endif + + /* this won't stop link of managebility or WoL is enabled */ + if (hw->mac.type == ixgbe_mac_82599EB) + ixgbe_stop_mac_link_on_d3_82599(hw); + + if (wufc) { + u32 fctrl; + + ixgbe_set_rx_mode(netdev); + + /* enable the optics for 82599 SFP+ fiber as we can WoL */ + if (hw->mac.ops.enable_tx_laser) + hw->mac.ops.enable_tx_laser(hw); + + /* enable the reception of multicast packets */ + fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL); + fctrl |= IXGBE_FCTRL_MPE; + IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl); + + ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL); + ctrl |= IXGBE_CTRL_GIO_DIS; + IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl); + + IXGBE_WRITE_REG(hw, IXGBE_WUFC, wufc); + } else { + IXGBE_WRITE_REG(hw, IXGBE_WUC, 0); + IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0); + } + + switch (hw->mac.type) { + case ixgbe_mac_82598EB: + pci_wake_from_d3(pdev, false); + break; + case ixgbe_mac_82599EB: + case ixgbe_mac_X540: + case ixgbe_mac_X550: + case ixgbe_mac_X550EM_x: + case ixgbe_mac_X550EM_a: + case ixgbe_mac_E610: + pci_wake_from_d3(pdev, !!wufc); + break; + default: + break; + } + + *enable_wake = !!wufc; + if (!*enable_wake) + ixgbe_set_phy_power(hw, false); + + ixgbe_release_hw_control(adapter); + + if (!test_and_set_bit(__IXGBE_DISABLED, adapter->state)) + pci_disable_device(pdev); + + return 0; +} +#endif /* defined(CONFIG_PM) || !defined(USE_REBOOT_NOTIFIER) */ + +#ifdef CONFIG_PM +/** + * ixgbe_suspend - Suspend the ixgbe network device + * @dev: Device structure pointer (for non-legacy PM support) + * @pdev: PCI device structure pointer (for legacy PM support) + * @state: Power management state (unused in legacy PM support) + * + * This function suspends the ixgbe network adapter, preparing it for low-power + * states. It calls `__ixgbe_shutdown` to handle device-specific shutdown tasks + * and checks if wake-on-LAN is enabled. If WoL is enabled, the device is prepared + * for sleep; otherwise, it is set to a low-power state. + * + * Return: 0 on success, or a negative error code on failure. + */ +#ifndef USE_LEGACY_PM_SUPPORT +static int ixgbe_suspend(struct device *dev) +#else +static int ixgbe_suspend(struct pci_dev *pdev, + pm_message_t __always_unused state) +#endif /* USE_LEGACY_PM_SUPPORT */ +{ + int retval; + bool wake; +#ifndef USE_LEGACY_PM_SUPPORT + struct pci_dev *pdev = to_pci_dev(dev); +#endif + + retval = __ixgbe_shutdown(pdev, &wake); + if (retval) + return retval; + + if (wake) { + pci_prepare_to_sleep(pdev); + } else { + pci_wake_from_d3(pdev, false); + pci_set_power_state(pdev, PCI_D3hot); + } + + return 0; +} +#endif /* CONFIG_PM */ + +#ifndef USE_REBOOT_NOTIFIER +/** + * ixgbe_shutdown - Perform shutdown operations for the ixgbe device + * @pdev: PCI device structure pointer + * + * This function handles the shutdown process for the ixgbe network adapter. + * It calls the internal `__ixgbe_shutdown` function to manage device-specific + * shutdown tasks and determines if the device should be configured for wake-on-LAN. + * If the system is powering off, it sets the device to a low-power state. + */ +static void ixgbe_shutdown(struct pci_dev *pdev) +{ + bool wake; + + __ixgbe_shutdown(pdev, &wake); + + if (system_state == SYSTEM_POWER_OFF) { + pci_wake_from_d3(pdev, wake); + pci_set_power_state(pdev, PCI_D3hot); + } +} +#endif /* USE_REBOOT_NOTIFIER */ + +#ifdef HAVE_NDO_GET_STATS64 +static void ixgbe_get_ring_stats64(struct rtnl_link_stats64 *stats, + struct ixgbe_ring *ring) +{ + u64 bytes, packets; + unsigned int start; + + if (ring) { + do { + start = u64_stats_fetch_begin(&ring->syncp); + packets = ring->stats.packets; + bytes = ring->stats.bytes; + } while (u64_stats_fetch_retry(&ring->syncp, start)); + stats->tx_packets += packets; + stats->tx_bytes += bytes; + } +} + +/** + * ixgbe_get_stats64 - Get System Network Statistics + * @netdev: network interface device structure + * @stats: storage space for 64bit statistics + * + * Returns 64bit statistics, for use in the ndo_get_stats64 callback. This + * function replaces ixgbe_get_stats for kernels which support it. + */ +#ifdef HAVE_VOID_NDO_GET_STATS64 +static void ixgbe_get_stats64(struct net_device *netdev, + struct rtnl_link_stats64 *stats) +#else +static struct rtnl_link_stats64 * +ixgbe_get_stats64(struct net_device *netdev, struct rtnl_link_stats64 *stats) +#endif +{ + struct ixgbe_adapter *adapter = netdev_priv(netdev); + int i; + + rcu_read_lock(); + for (i = 0; i < adapter->num_rx_queues; i++) { + struct ixgbe_ring *ring = READ_ONCE(adapter->rx_ring[i]); + u64 bytes, packets; + unsigned int start; + + if (ring) { + do { + start = u64_stats_fetch_begin(&ring->syncp); + packets = ring->stats.packets; + bytes = ring->stats.bytes; + } while (u64_stats_fetch_retry(&ring->syncp, start)); + stats->rx_packets += packets; + stats->rx_bytes += bytes; + } + } + + for (i = 0; i < adapter->num_tx_queues; i++) { + struct ixgbe_ring *ring = READ_ONCE(adapter->tx_ring[i]); + + ixgbe_get_ring_stats64(stats, ring); + } + + for (i = 0; i < adapter->num_xdp_queues; i++) { + struct ixgbe_ring *ring = READ_ONCE(adapter->xdp_ring[i]); + + ixgbe_get_ring_stats64(stats, ring); + } + rcu_read_unlock(); + + /* following stats updated by ixgbe_watchdog_task() */ + stats->multicast = netdev->stats.multicast; + stats->rx_errors = netdev->stats.rx_errors; + stats->rx_length_errors = netdev->stats.rx_length_errors; + stats->rx_crc_errors = netdev->stats.rx_crc_errors; + stats->rx_missed_errors = netdev->stats.rx_missed_errors; +#ifndef HAVE_VOID_NDO_GET_STATS64 + + return stats; +#endif +} +#else /* !HAVE_NDO_GET_STATS64 */ +/** + * ixgbe_get_stats - Get System Network Statistics + * @netdev: network interface device structure + * + * Returns the address of the device statistics structure. + * The statistics are actually updated from the timer callback. + **/ +static struct net_device_stats *ixgbe_get_stats(struct net_device *netdev) +{ + struct ixgbe_adapter *adapter = netdev_priv(netdev); + + /* update the stats data */ + ixgbe_update_stats(adapter); + +#ifdef HAVE_NETDEV_STATS_IN_NETDEV + /* only return the current stats */ + return &netdev->stats; +#else + /* only return the current stats */ + return &adapter->net_stats; +#endif /* HAVE_NETDEV_STATS_IN_NETDEV */ +} +#endif /* HAVE_NDO_GET_STATS64 */ + +#ifdef HAVE_VF_STATS +/** + * ixgbe_ndo_get_vf_stats - Retrieve statistics for a virtual function (VF) + * @netdev: Network device structure + * @vf: VF index + * @vf_stats: Pointer to ifla_vf_stats structure to be filled with VF statistics + * + * This function retrieves the statistics for a specified virtual function (VF) + * on the network device. It populates the `ifla_vf_stats` structure with + * details such as the VF's received and transmitted packets and bytes, as well + * as multicast packet count. + * + * Return: 0 on success, or -EINVAL if the VF index is out of range. + */ +static int ixgbe_ndo_get_vf_stats(struct net_device *netdev, int vf, + struct ifla_vf_stats *vf_stats) +{ + struct ixgbe_adapter *adapter = netdev_priv(netdev); + + if (vf < 0 || vf >= adapter->num_vfs) + return -EINVAL; + + vf_stats->rx_packets = adapter->vfinfo[vf].vfstats.gprc; + vf_stats->rx_bytes = adapter->vfinfo[vf].vfstats.gorc; + vf_stats->tx_packets = adapter->vfinfo[vf].vfstats.gptc; + vf_stats->tx_bytes = adapter->vfinfo[vf].vfstats.gotc; + vf_stats->multicast = adapter->vfinfo[vf].vfstats.mprc; + + return 0; +} +#endif /* HAVE_VF_STATS */ + +/** + * ixgbe_update_stats - Update the board statistics counters. + * @adapter: board private structure + **/ +void ixgbe_update_stats(struct ixgbe_adapter *adapter) +{ +#ifdef HAVE_NETDEV_STATS_IN_NETDEV + struct net_device_stats *net_stats = &adapter->netdev->stats; +#else + struct net_device_stats *net_stats = &adapter->net_stats; +#endif /* HAVE_NETDEV_STATS_IN_NETDEV */ + struct ixgbe_hw *hw = &adapter->hw; + struct ixgbe_hw_stats *hwstats = &adapter->stats; + u64 total_mpc = 0; + u32 i, missed_rx = 0, mpc, bprc, lxon, lxoff, xon_off_tot; + u64 non_eop_descs = 0, restart_queue = 0, tx_busy = 0; + u64 alloc_rx_page_failed = 0, alloc_rx_buff_failed = 0; + u64 alloc_rx_page = 0; + u64 bytes = 0, packets = 0, hw_csum_rx_error = 0; + + if (test_bit(__IXGBE_DOWN, adapter->state) || + test_bit(__IXGBE_RESETTING, adapter->state)) + return; + + if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) { + u64 rsc_count = 0; + u64 rsc_flush = 0; + for (i = 0; i < adapter->num_rx_queues; i++) { + rsc_count += adapter->rx_ring[i]->rx_stats.rsc_count; + rsc_flush += adapter->rx_ring[i]->rx_stats.rsc_flush; + } + adapter->rsc_total_count = rsc_count; + adapter->rsc_total_flush = rsc_flush; + } + + for (i = 0; i < adapter->num_rx_queues; i++) { + struct ixgbe_ring *rx_ring = adapter->rx_ring[i]; + non_eop_descs += rx_ring->rx_stats.non_eop_descs; + alloc_rx_page += rx_ring->rx_stats.alloc_rx_page; + alloc_rx_page_failed += rx_ring->rx_stats.alloc_rx_page_failed; + alloc_rx_buff_failed += rx_ring->rx_stats.alloc_rx_buff_failed; + hw_csum_rx_error += rx_ring->rx_stats.csum_err; + bytes += rx_ring->stats.bytes; + packets += rx_ring->stats.packets; + + } + adapter->non_eop_descs = non_eop_descs; + adapter->alloc_rx_page = alloc_rx_page; + adapter->alloc_rx_page_failed = alloc_rx_page_failed; + adapter->alloc_rx_buff_failed = alloc_rx_buff_failed; + adapter->hw_csum_rx_error = hw_csum_rx_error; + net_stats->rx_bytes = bytes; + net_stats->rx_packets = packets; + + bytes = 0; + packets = 0; + /* gather some stats to the adapter struct that are per queue */ + for (i = 0; i < adapter->num_tx_queues; i++) { + struct ixgbe_ring *tx_ring = adapter->tx_ring[i]; + restart_queue += tx_ring->tx_stats.restart_queue; + tx_busy += tx_ring->tx_stats.tx_busy; + bytes += tx_ring->stats.bytes; + packets += tx_ring->stats.packets; + } + for (i = 0; i < adapter->num_xdp_queues; i++) { + struct ixgbe_ring *xdp_ring = adapter->xdp_ring[i]; + + restart_queue += xdp_ring->tx_stats.restart_queue; + tx_busy += xdp_ring->tx_stats.tx_busy; + bytes += xdp_ring->stats.bytes; + packets += xdp_ring->stats.packets; + } + adapter->restart_queue = restart_queue; + adapter->tx_busy = tx_busy; + net_stats->tx_bytes = bytes; + net_stats->tx_packets = packets; + + hwstats->crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS); + + /* 8 register reads */ + for (i = 0; i < 8; i++) { + /* for packet buffers not used, the register should read 0 */ + mpc = IXGBE_READ_REG(hw, IXGBE_MPC(i)); + missed_rx += mpc; + hwstats->mpc[i] += mpc; + total_mpc += hwstats->mpc[i]; + hwstats->pxontxc[i] += IXGBE_READ_REG(hw, IXGBE_PXONTXC(i)); + hwstats->pxofftxc[i] += IXGBE_READ_REG(hw, IXGBE_PXOFFTXC(i)); + switch (hw->mac.type) { + case ixgbe_mac_82598EB: + hwstats->rnbc[i] += IXGBE_READ_REG(hw, IXGBE_RNBC(i)); + hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC(i)); + hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC(i)); + hwstats->pxonrxc[i] += + IXGBE_READ_REG(hw, IXGBE_PXONRXC(i)); + break; + case ixgbe_mac_82599EB: + case ixgbe_mac_X540: + case ixgbe_mac_X550: + case ixgbe_mac_X550EM_x: + case ixgbe_mac_X550EM_a: + case ixgbe_mac_E610: + hwstats->pxonrxc[i] += + IXGBE_READ_REG(hw, IXGBE_PXONRXCNT(i)); + break; + default: + break; + } + } + + /*16 register reads */ + for (i = 0; i < 16; i++) { + hwstats->qptc[i] += IXGBE_READ_REG(hw, IXGBE_QPTC(i)); + hwstats->qprc[i] += IXGBE_READ_REG(hw, IXGBE_QPRC(i)); + if (hw->mac.type == ixgbe_mac_82599EB || + hw->mac.type == ixgbe_mac_X550 || + hw->mac.type == ixgbe_mac_X550EM_x || + hw->mac.type == ixgbe_mac_X550EM_a || + hw->mac.type == ixgbe_mac_X540 || + ixgbe_is_mac_E6xx(hw->mac.type)) { + hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC_L(i)); + IXGBE_READ_REG(hw, IXGBE_QBTC_H(i)); /* to clear */ + hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC_L(i)); + IXGBE_READ_REG(hw, IXGBE_QBRC_H(i)); /* to clear */ + } + } + + hwstats->gprc += IXGBE_READ_REG(hw, IXGBE_GPRC); + /* work around hardware counting issue */ + hwstats->gprc -= missed_rx; + + ixgbe_update_xoff_received(adapter); + + /* 82598 hardware only has a 32 bit counter in the high register */ + switch (hw->mac.type) { + case ixgbe_mac_82598EB: + hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC); + hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCH); + hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH); + hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORH); + break; + case ixgbe_mac_X540: + case ixgbe_mac_X550: + case ixgbe_mac_X550EM_x: + case ixgbe_mac_X550EM_a: + case ixgbe_mac_E610: + /* OS2BMC stats are X540 only*/ + hwstats->o2bgptc += IXGBE_READ_REG(hw, IXGBE_O2BGPTC); + hwstats->o2bspc += IXGBE_READ_REG(hw, IXGBE_O2BSPC); + hwstats->b2ospc += IXGBE_READ_REG(hw, IXGBE_B2OSPC); + hwstats->b2ogprc += IXGBE_READ_REG(hw, IXGBE_B2OGPRC); + fallthrough; + case ixgbe_mac_82599EB: + for (i = 0; i < 16; i++) + adapter->hw_rx_no_dma_resources += + IXGBE_READ_REG(hw, IXGBE_QPRDC(i)); + hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCL); + IXGBE_READ_REG(hw, IXGBE_GORCH); /* to clear */ + hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCL); + IXGBE_READ_REG(hw, IXGBE_GOTCH); /* to clear */ + hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORL); + IXGBE_READ_REG(hw, IXGBE_TORH); /* to clear */ + hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXCNT); +#ifdef HAVE_TX_MQ + hwstats->fdirmatch += IXGBE_READ_REG(hw, IXGBE_FDIRMATCH); + hwstats->fdirmiss += IXGBE_READ_REG(hw, IXGBE_FDIRMISS); +#endif /* HAVE_TX_MQ */ +#if IS_ENABLED(CONFIG_FCOE) + hwstats->fccrc += IXGBE_READ_REG(hw, IXGBE_FCCRC); + hwstats->fclast += IXGBE_READ_REG(hw, IXGBE_FCLAST); + hwstats->fcoerpdc += IXGBE_READ_REG(hw, IXGBE_FCOERPDC); + hwstats->fcoeprc += IXGBE_READ_REG(hw, IXGBE_FCOEPRC); + hwstats->fcoeptc += IXGBE_READ_REG(hw, IXGBE_FCOEPTC); + hwstats->fcoedwrc += IXGBE_READ_REG(hw, IXGBE_FCOEDWRC); + hwstats->fcoedwtc += IXGBE_READ_REG(hw, IXGBE_FCOEDWTC); + /* Add up per cpu counters for total ddp alloc fail */ + if (adapter->fcoe.ddp_pool) { + struct ixgbe_fcoe *fcoe = &adapter->fcoe; + struct ixgbe_fcoe_ddp_pool *ddp_pool; + unsigned int cpu; + u64 noddp = 0, noddp_ext_buff = 0; + for_each_possible_cpu(cpu) { + ddp_pool = per_cpu_ptr(fcoe->ddp_pool, cpu); + noddp += ddp_pool->noddp; + noddp_ext_buff += ddp_pool->noddp_ext_buff; + } + hwstats->fcoe_noddp = noddp; + hwstats->fcoe_noddp_ext_buff = noddp_ext_buff; + } + +#endif /* CONFIG_FCOE */ + break; + default: + break; + } + bprc = IXGBE_READ_REG(hw, IXGBE_BPRC); + hwstats->bprc += bprc; + hwstats->mprc += IXGBE_READ_REG(hw, IXGBE_MPRC); + if (hw->mac.type == ixgbe_mac_82598EB) + hwstats->mprc -= bprc; + hwstats->roc += IXGBE_READ_REG(hw, IXGBE_ROC); + hwstats->prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64); + hwstats->prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127); + hwstats->prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255); + hwstats->prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511); + hwstats->prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023); + hwstats->prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522); + hwstats->rlec += IXGBE_READ_REG(hw, IXGBE_RLEC); + lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC); + hwstats->lxontxc += lxon; + lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC); + hwstats->lxofftxc += lxoff; + hwstats->gptc += IXGBE_READ_REG(hw, IXGBE_GPTC); + hwstats->mptc += IXGBE_READ_REG(hw, IXGBE_MPTC); + /* + * 82598 errata - tx of flow control packets is included in tx counters + */ + xon_off_tot = lxon + lxoff; + hwstats->gptc -= xon_off_tot; + hwstats->mptc -= xon_off_tot; + hwstats->gotc -= (xon_off_tot * (ETH_ZLEN + ETH_FCS_LEN)); + hwstats->ruc += IXGBE_READ_REG(hw, IXGBE_RUC); + hwstats->rfc += IXGBE_READ_REG(hw, IXGBE_RFC); + hwstats->rjc += IXGBE_READ_REG(hw, IXGBE_RJC); + hwstats->tpr += IXGBE_READ_REG(hw, IXGBE_TPR); + hwstats->ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64); + hwstats->ptc64 -= xon_off_tot; + hwstats->ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127); + hwstats->ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255); + hwstats->ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511); + hwstats->ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023); + hwstats->ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522); + hwstats->bptc += IXGBE_READ_REG(hw, IXGBE_BPTC); + hwstats->illerrc += IXGBE_READ_REG(hw, IXGBE_ILLERRC); + /* Fill out the OS statistics structure */ + net_stats->multicast = hwstats->mprc; + + /* Rx Errors */ + net_stats->rx_errors = hwstats->crcerrs + + hwstats->illerrc + + hwstats->rlec + + hwstats->rfc + + hwstats->roc + + hwstats->ruc + + hw_csum_rx_error; + + net_stats->rx_dropped = 0; + net_stats->rx_length_errors = hwstats->rlec; + net_stats->rx_crc_errors = hwstats->crcerrs; + net_stats->rx_missed_errors = total_mpc; + + /* VF Stats Collection - skip while resetting because these + * are not clear on read and otherwise you'll sometimes get + * crazy values. + */ + if (!test_bit(__IXGBE_RESETTING, adapter->state)) { + for (i = 0; i < adapter->num_vfs; i++) { + UPDATE_VF_COUNTER_32bit(IXGBE_PVFGPRC(i), \ + adapter->vfinfo[i].last_vfstats.gprc, \ + adapter->vfinfo[i].vfstats.gprc); + UPDATE_VF_COUNTER_32bit(IXGBE_PVFGPTC(i), \ + adapter->vfinfo[i].last_vfstats.gptc, \ + adapter->vfinfo[i].vfstats.gptc); + UPDATE_VF_COUNTER_36bit(IXGBE_PVFGORC_LSB(i), \ + IXGBE_PVFGORC_MSB(i), \ + adapter->vfinfo[i].last_vfstats.gorc, \ + adapter->vfinfo[i].vfstats.gorc); + UPDATE_VF_COUNTER_36bit(IXGBE_PVFGOTC_LSB(i), \ + IXGBE_PVFGOTC_MSB(i), \ + adapter->vfinfo[i].last_vfstats.gotc, \ + adapter->vfinfo[i].vfstats.gotc); + UPDATE_VF_COUNTER_32bit(IXGBE_PVFMPRC(i), \ + adapter->vfinfo[i].last_vfstats.mprc, \ + adapter->vfinfo[i].vfstats.mprc); + } + } +} + +#ifdef HAVE_TX_MQ +/** + * ixgbe_fdir_reinit_subtask - worker thread to reinit FDIR filter table + * @adapter: pointer to the device adapter structure + **/ +static void ixgbe_fdir_reinit_subtask(struct ixgbe_adapter *adapter) +{ + struct ixgbe_hw *hw = &adapter->hw; + int i; + + if (!(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT)) + return; + + adapter->flags2 &= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT; + + /* if interface is down do nothing */ + if (test_bit(__IXGBE_DOWN, adapter->state)) + return; + + /* do nothing if we are not using signature filters */ + if (!(adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE)) + return; + + adapter->fdir_overflow++; + + if (ixgbe_reinit_fdir_tables_82599(hw) == IXGBE_SUCCESS) { + for (i = 0; i < adapter->num_tx_queues; i++) + set_bit(__IXGBE_TX_FDIR_INIT_DONE, + &(adapter->tx_ring[i]->state)); + for (i = 0; i < adapter->num_xdp_queues; i++) + set_bit(__IXGBE_TX_FDIR_INIT_DONE, + &adapter->xdp_ring[i]->state); + /* re-enable flow director interrupts */ + IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_FLOW_DIR); + } else { + e_err(probe, "failed to finish FDIR re-initialization, " + "ignored adding FDIR ATR filters\n"); + } +} + +#endif /* HAVE_TX_MQ */ +/** + * ixgbe_check_hang_subtask - check for hung queues and dropped interrupts + * @adapter: pointer to the device adapter structure + * + * This function serves two purposes. First it strobes the interrupt lines + * in order to make certain interrupts are occurring. Secondly it sets the + * bits needed to check for TX hangs. As a result we should immediately + * determine if a hang has occurred. + */ +static void ixgbe_check_hang_subtask(struct ixgbe_adapter *adapter) +{ + struct ixgbe_hw *hw = &adapter->hw; + u64 eics = 0; + int i; + + /* If we're down, removing or resetting, just bail */ + if (test_bit(__IXGBE_DOWN, adapter->state) || + test_bit(__IXGBE_REMOVING, adapter->state) || + test_bit(__IXGBE_RESETTING, adapter->state)) + return; + + /* Force detection of hung controller */ + if (netif_carrier_ok(adapter->netdev)) { + for (i = 0; i < adapter->num_tx_queues; i++) + set_check_for_tx_hang(adapter->tx_ring[i]); + for (i = 0; i < adapter->num_xdp_queues; i++) + set_check_for_tx_hang(adapter->xdp_ring[i]); + } + + if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) { + /* + * for legacy and MSI interrupts don't set any bits + * that are enabled for EIAM, because this operation + * would set *both* EIMS and EICS for any bit in EIAM + */ + IXGBE_WRITE_REG(hw, IXGBE_EICS, + (IXGBE_EICS_TCP_TIMER | IXGBE_EICS_OTHER)); + } else { + /* get one bit for every active tx/rx interrupt vector */ + for (i = 0; i < adapter->num_q_vectors; i++) { + struct ixgbe_q_vector *qv = adapter->q_vector[i]; + if (qv->rx.ring || qv->tx.ring) + eics |= ((u64)1 << i); + } + } + + /* Cause software interrupt to ensure rings are cleaned */ + ixgbe_irq_rearm_queues(adapter, eics); +} + +/** + * ixgbe_watchdog_update_link - update the link status + * @adapter: pointer to the device adapter structure + **/ +static void ixgbe_watchdog_update_link(struct ixgbe_adapter *adapter) +{ + struct ixgbe_hw *hw = &adapter->hw; + u32 link_speed = adapter->link_speed; + bool link_up = adapter->link_up; + bool pfc_en = adapter->dcb_cfg.pfc_mode_enable; + + if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)) + return; + + if (hw->mac.ops.check_link) { + hw->mac.ops.check_link(hw, &link_speed, &link_up, false); + } else { + /* always assume link is up, if no check link function */ + link_speed = IXGBE_LINK_SPEED_10GB_FULL; + link_up = true; + } + +#ifdef HAVE_DCBNL_IEEE + if (adapter->ixgbe_ieee_pfc) + pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en); + +#endif + if (link_up && !((adapter->flags & IXGBE_FLAG_DCB_ENABLED) && pfc_en)) { + if (hw->mac.type == ixgbe_mac_X550 || + ixgbe_is_mac_E6xx(hw->mac.type)) + ixgbe_setup_fc(hw); + hw->mac.ops.fc_enable(hw); + + /* This is known driver so disable MDD before updating SRRCTL */ + if (hw->mac.ops.disable_mdd && + (adapter->flags & IXGBE_FLAG_MDD_ENABLED)) + hw->mac.ops.disable_mdd(hw); + + ixgbe_set_rx_drop_en(adapter); + + if (hw->mac.ops.enable_mdd && + (adapter->flags & IXGBE_FLAG_MDD_ENABLED)) + hw->mac.ops.enable_mdd(hw); + } + + if (link_up || + time_after(jiffies, (adapter->link_check_timeout + + IXGBE_TRY_LINK_TIMEOUT))) { + adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE; + IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMC_LSC); + IXGBE_WRITE_FLUSH(hw); + } + + adapter->link_up = link_up; + adapter->link_speed = link_speed; + + if (hw->mac.ops.dmac_config && hw->mac.dmac_config.watchdog_timer) { + u8 num_tcs = netdev_get_num_tc(adapter->netdev); +#if IS_ENABLED(CONFIG_FCOE) + u8 fcoe_tc = ixgbe_fcoe_get_tc(adapter); + bool fcoe_en = !!(adapter->flags & IXGBE_FLAG_FCOE_ENABLED); +#endif /* CONFIG_FCOE */ + + if (hw->mac.dmac_config.link_speed != link_speed || +#if IS_ENABLED(CONFIG_FCOE) + hw->mac.dmac_config.fcoe_tc != fcoe_tc || + hw->mac.dmac_config.fcoe_en != fcoe_en || +#endif /* CONFIG_FCOE */ + hw->mac.dmac_config.num_tcs != num_tcs) { + hw->mac.dmac_config.link_speed = link_speed; + hw->mac.dmac_config.num_tcs = num_tcs; +#if IS_ENABLED(CONFIG_FCOE) + hw->mac.dmac_config.fcoe_en = fcoe_en; + hw->mac.dmac_config.fcoe_tc = fcoe_tc; +#endif /* CONFIG_FCOE */ + hw->mac.ops.dmac_config(hw); + } + } +} + +static void ixgbe_update_default_up(struct ixgbe_adapter *adapter) +{ + u8 up = 0; +#ifdef HAVE_DCBNL_IEEE + struct net_device *netdev = adapter->netdev; + struct dcb_app app = { + .selector = DCB_APP_IDTYPE_ETHTYPE, + .protocol = 0, + }; + up = dcb_getapp(netdev, &app); +#endif + +#if IS_ENABLED(CONFIG_FCOE) + adapter->default_up = (up > 1) ? (ffs(up) - 1) : 0; +#else + adapter->default_up = up; +#endif +} + +/** + * ixgbe_watchdog_link_is_up - update netif_carrier status and + * print link up message + * @adapter: pointer to the device adapter structure + **/ +static void ixgbe_watchdog_link_is_up(struct ixgbe_adapter *adapter) +{ + struct net_device *netdev = adapter->netdev; + struct ixgbe_hw *hw = &adapter->hw; + u32 link_speed = adapter->link_speed; + bool flow_rx, flow_tx; + const char *speed_str; + + adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP; + + switch (hw->mac.type) { + case ixgbe_mac_82598EB: { + u32 frctl = IXGBE_READ_REG(hw, IXGBE_FCTRL); + u32 rmcs = IXGBE_READ_REG(hw, IXGBE_RMCS); + flow_rx = !!(frctl & IXGBE_FCTRL_RFCE); + flow_tx = !!(rmcs & IXGBE_RMCS_TFCE_802_3X); + } + break; + case ixgbe_mac_X550: + case ixgbe_mac_X550EM_x: + case ixgbe_mac_X550EM_a: + case ixgbe_mac_E610: + case ixgbe_mac_82599EB: + case ixgbe_mac_X540: { + u32 mflcn = IXGBE_READ_REG(hw, IXGBE_MFLCN); + u32 fccfg = IXGBE_READ_REG(hw, IXGBE_FCCFG); + flow_rx = !!(mflcn & IXGBE_MFLCN_RFCE); + flow_tx = !!(fccfg & IXGBE_FCCFG_TFCE_802_3X); + } + break; + default: + flow_tx = false; + flow_rx = false; + break; + } + +#ifdef HAVE_PTP_1588_CLOCK + adapter->last_rx_ptp_check = jiffies; + +#endif + /* + * Only continue if link was previously down in running state. + * Note that although the flag __IXGBE_DOWN was already checked from + * the beginning of ixgbe_watchdog_subtask, it is not protected by + * any mutex, so it can be changed in the middle of the watchdog + * execution. + * Make the __IXGBE_DOWN flag work as a semaphore and do not allow + * for changing the carrier state if it has been intentionally set + * to "off" for performing the adapter setup. + * TODO: Review the existing flag synchronization mechanism in the driver + * to identify potential race conditions and introduce appropriate + * mutexes and/or semaphores. + */ + if (test_bit(__IXGBE_DOWN, adapter->state) || netif_carrier_ok(netdev)) + return; + +#if defined(HAVE_PTP_1588_CLOCK) + if (ixgbe_is_mac_E6xx(adapter->hw.mac.type) && + test_bit(__IXGBE_PTP_RUNNING, adapter->state)) + ixgbe_ptp_link_up_e600(adapter); + +#endif /* HAVE_PTP_1588_CLOCK */ + switch (link_speed) { + case IXGBE_LINK_SPEED_10GB_FULL: + speed_str = "10 Gbps"; + break; + case IXGBE_LINK_SPEED_5GB_FULL: + speed_str = "5 Gbps"; + break; + case IXGBE_LINK_SPEED_2_5GB_FULL: + speed_str = "2.5 Gbps"; + break; + case IXGBE_LINK_SPEED_1GB_FULL: + speed_str = "1 Gbps"; + break; + case IXGBE_LINK_SPEED_100_FULL: + speed_str = "100 Mbps"; + break; + case IXGBE_LINK_SPEED_10_FULL: + speed_str = "10 Mbps"; + break; + default: + speed_str = "unknown speed"; + break; + } + e_info(drv, "NIC Link is Up %s, Flow Control: %s\n", speed_str, + ((flow_rx && flow_tx) ? "RX/TX" : + (flow_rx ? "RX" : + (flow_tx ? "TX" : "None")))); + + /* Check if link state change forces changing EEE state */ + if (adapter->hw.mac.type == ixgbe_mac_E610) { + if (ixgbe_is_eee_enabled(adapter) && + !(ixgbe_check_link_for_eee_e610(adapter, true))) { + hw->mac.ops.setup_eee(hw, false); + adapter->eee_state = IXGBE_EEE_FORCED_DOWN; + } else if (adapter->eee_state == IXGBE_EEE_FORCED_DOWN && + ixgbe_check_link_for_eee_e610(adapter, false)) { + hw->mac.ops.setup_eee(hw, true); + adapter->eee_state = IXGBE_EEE_ENABLED; + } + } + + netif_carrier_on(netdev); +#ifdef HAVE_PTP_1588_CLOCK + if (test_bit(__IXGBE_PTP_RUNNING, adapter->state) && + !ixgbe_is_mac_E6xx(hw->mac.type)) + ixgbe_ptp_start_cyclecounter(adapter); + +#endif /* HAVE_PTP_1588_CLOCK */ +#ifdef IFLA_VF_MAX + ixgbe_check_vf_rate_limit(adapter); +#endif /* IFLA_VF_MAX */ + /* Turn on malicious driver detection */ + if (hw->mac.ops.enable_mdd && (adapter->flags & IXGBE_FLAG_MDD_ENABLED)) + hw->mac.ops.enable_mdd(hw); + + netif_tx_wake_all_queues(netdev); + /* update the default user priority for VFs */ + ixgbe_update_default_up(adapter); + /* ping all the active vfs to let them know link has changed */ + ixgbe_ping_all_vfs(adapter); +} + +/** + * ixgbe_watchdog_link_is_down - update netif_carrier status and + * print link down message + * @adapter: pointer to the adapter structure + **/ +static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter *adapter) +{ + struct net_device *netdev = adapter->netdev; + struct ixgbe_hw *hw = &adapter->hw; + + adapter->link_up = false; + adapter->link_speed = 0; + + /* only continue if link was up previously */ + if (!netif_carrier_ok(netdev)) + return; + + /* poll for SFP+ cable when link is down */ + if (ixgbe_is_sfp(hw) && hw->mac.type == ixgbe_mac_82598EB) + adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP; + +#ifdef HAVE_PTP_1588_CLOCK + if (test_bit(__IXGBE_PTP_RUNNING, adapter->state) && + !ixgbe_is_mac_E6xx(hw->mac.type)) + ixgbe_ptp_start_cyclecounter(adapter); + +#endif + e_info(drv, "NIC Link is Down\n"); + netif_carrier_off(netdev); + netif_tx_stop_all_queues(netdev); + /* ping all the active vfs to let them know link has changed */ + ixgbe_ping_all_vfs(adapter); +} + +static bool ixgbe_ring_tx_pending(struct ixgbe_adapter *adapter) +{ + int i; + + for (i = 0; i < adapter->num_tx_queues; i++) { + struct ixgbe_ring *tx_ring = adapter->tx_ring[i]; + + if (tx_ring->next_to_use != tx_ring->next_to_clean) + return true; + } + + for (i = 0; i < adapter->num_xdp_queues; i++) { + struct ixgbe_ring *ring = adapter->xdp_ring[i]; + + if (ring->next_to_use != ring->next_to_clean) + return true; + } + + return false; +} + +static bool ixgbe_vf_tx_pending(struct ixgbe_adapter *adapter) +{ + struct ixgbe_hw *hw = &adapter->hw; + struct ixgbe_ring_feature *vmdq = &adapter->ring_feature[RING_F_VMDQ]; + u32 q_per_pool = __ALIGN_MASK(1, ~vmdq->mask); + + int i, j; + + if (!adapter->num_vfs) + return false; + + /* resetting the PF is only needed for MACs < X550 */ + if (hw->mac.type >= ixgbe_mac_X550) + return false; + for (i = 0; i < adapter->num_vfs; i++) { + for (j = 0; j < q_per_pool; j++) { + u32 h, t; + + h = IXGBE_READ_REG(hw, IXGBE_PVFTDHn(q_per_pool, i, j)); + t = IXGBE_READ_REG(hw, IXGBE_PVFTDTn(q_per_pool, i, j)); + + if (h != t) + return true; + } + } + + return false; +} + +/** + * ixgbe_watchdog_flush_tx - flush queues on link down + * @adapter: pointer to the device adapter structure + **/ +static void ixgbe_watchdog_flush_tx(struct ixgbe_adapter *adapter) +{ + if (!netif_carrier_ok(adapter->netdev)) { + if (ixgbe_ring_tx_pending(adapter) || + ixgbe_vf_tx_pending(adapter)) { + /* We've lost link, so the controller stops DMA, + * but we've got queued Tx work that's never going + * to get done, so reset controller to flush Tx. + * (Do the reset outside of interrupt context). + */ + e_warn(drv, "initiating reset due to lost link with pending Tx work\n"); + set_bit(__IXGBE_RESET_REQUESTED, adapter->state); + } + } +} + +#ifdef CONFIG_PCI_IOV +static inline void ixgbe_issue_vf_flr(struct ixgbe_adapter *adapter, + struct pci_dev *vfdev) +{ + int pos, i; + u16 status; + + /* wait for pending transactions on the bus */ + for (i = 0; i < 4; i++) { + if (i) + msleep((1 << (i - 1)) * 100); + + pcie_capability_read_word(vfdev, PCI_EXP_DEVSTA, &status); + if (!(status & PCI_EXP_DEVSTA_TRPND)) + goto clear; + } + + e_dev_warn("Issuing VFLR with pending transactions\n"); + +clear: + pos = pci_find_capability(vfdev, PCI_CAP_ID_EXP); + if (!pos) + return; + + e_dev_err("Issuing VFLR for VF %s\n", pci_name(vfdev)); + pci_write_config_word(vfdev, pos + PCI_EXP_DEVCTL, + PCI_EXP_DEVCTL_BCR_FLR); + msleep(100); +} + +static void ixgbe_bad_vf_abort(struct ixgbe_adapter *adapter, u32 vf) +{ + struct ixgbe_hw *hw = &adapter->hw; + + if (adapter->hw.mac.type == ixgbe_mac_82599EB && + adapter->flags2 & IXGBE_FLAG2_AUTO_DISABLE_VF) { + adapter->vfinfo[vf].primary_abort_count++; + if (adapter->vfinfo[vf].primary_abort_count == + IXGBE_PRIMARY_ABORT_LIMIT) { + ixgbe_set_vf_link_state(adapter, vf, + IFLA_VF_LINK_STATE_DISABLE); + adapter->vfinfo[vf].primary_abort_count = 0; + + e_info(drv, + "Malicious Driver Detection event detected on PF %d VF %d MAC: %pM mdd-disable-vf=on", + hw->bus.func, vf, + adapter->vfinfo[vf].vf_mac_addresses); + } + } +} + +static void ixgbe_check_for_bad_vf(struct ixgbe_adapter *adapter) +{ + struct ixgbe_hw *hw = &adapter->hw; + struct pci_dev *pdev = adapter->pdev; + unsigned int vf; + u32 gpc; + + if (!(netif_carrier_ok(adapter->netdev))) + return; + + gpc = IXGBE_READ_REG(hw, IXGBE_TXDGPC); + if (gpc) /* If incrementing then no need for the check below */ + return; + /* + * Check to see if a bad DMA write target from an errant or + * malicious VF has caused a PCIe error. If so then we can + * issue a VFLR to the offending VF(s) and then resume without + * requesting a full slot reset. + */ + + if (!pdev) + return; + + /* check status reg for all VFs owned by this PF */ + for (vf = 0; vf < adapter->num_vfs; ++vf) { + struct pci_dev *vfdev = adapter->vfinfo[vf].vfdev; + u16 status_reg; + + if (!vfdev) + continue; + pci_read_config_word(vfdev, PCI_STATUS, &status_reg); + if (status_reg != IXGBE_FAILED_READ_CFG_WORD && + status_reg & PCI_STATUS_REC_MASTER_ABORT) { + ixgbe_bad_vf_abort(adapter, vf); + ixgbe_issue_vf_flr(adapter, vfdev); + } + } +} + +static void ixgbe_spoof_check(struct ixgbe_adapter *adapter) +{ + u32 ssvpc; + + /* Do not perform spoof check for 82598 or if not in IOV mode */ + if (adapter->hw.mac.type == ixgbe_mac_82598EB || + adapter->num_vfs == 0) + return; + + ssvpc = IXGBE_READ_REG(&adapter->hw, IXGBE_SSVPC); + + /* + * ssvpc register is cleared on read, if zero then no + * spoofed packets in the last interval. + */ + if (!ssvpc) + return; + + e_warn(drv, "%d Spoofed packets detected\n", ssvpc); +} + +#endif /* CONFIG_PCI_IOV */ + +/** + * ixgbe_watchdog_subtask - check and bring link up + * @adapter: pointer to the device adapter structure + **/ +static void ixgbe_watchdog_subtask(struct ixgbe_adapter *adapter) +{ + /* if interface is down, removing or resetting, do nothing */ + if (test_bit(__IXGBE_DOWN, adapter->state) || + test_bit(__IXGBE_REMOVING, adapter->state) || + test_bit(__IXGBE_RESETTING, adapter->state)) + return; + + ixgbe_watchdog_update_link(adapter); + + if (adapter->link_up) + ixgbe_watchdog_link_is_up(adapter); + else + ixgbe_watchdog_link_is_down(adapter); +#ifdef CONFIG_PCI_IOV + ixgbe_spoof_check(adapter); + ixgbe_check_for_bad_vf(adapter); +#endif /* CONFIG_PCI_IOV */ + ixgbe_update_stats(adapter); + + ixgbe_watchdog_flush_tx(adapter); +} + +/** + * ixgbe_sfp_detection_subtask - poll for SFP+ cable + * @adapter: the ixgbe adapter structure + **/ +static void ixgbe_sfp_detection_subtask(struct ixgbe_adapter *adapter) +{ + struct ixgbe_hw *hw = &adapter->hw; + s32 err; + + /* not searching for SFP so there is nothing to do here */ + if (!(adapter->flags2 & IXGBE_FLAG2_SEARCH_FOR_SFP) && + !(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET)) + return; + + if (adapter->sfp_poll_time && + time_after(adapter->sfp_poll_time, jiffies)) + return; /* If not yet time to poll for SFP */ + + /* someone else is in init, wait until next service event */ + if (test_and_set_bit(__IXGBE_IN_SFP_INIT, adapter->state)) + return; + + adapter->sfp_poll_time = jiffies + IXGBE_SFP_POLL_JIFFIES - 1; + + err = hw->phy.ops.identify_sfp(hw); + if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) + goto sfp_out; + + if (err == IXGBE_ERR_SFP_NOT_PRESENT) { + /* If no cable is present, then we need to reset + * the next time we find a good cable. */ + adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET; + } + + /* exit on error */ + if (err) + goto sfp_out; + + /* exit if reset not needed */ + if (!(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET)) + goto sfp_out; + + adapter->flags2 &= ~IXGBE_FLAG2_SFP_NEEDS_RESET; + + /* + * A module may be identified correctly, but the EEPROM may not have + * support for that module. setup_sfp() will fail in that case, so + * we should not allow that module to load. + */ + if (hw->mac.type == ixgbe_mac_82598EB) + err = hw->phy.ops.reset(hw); + else + err = hw->mac.ops.setup_sfp(hw); + + if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) + goto sfp_out; + + adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG; + e_info(probe, "detected SFP+: %d\n", hw->phy.sfp_type); + +sfp_out: + clear_bit(__IXGBE_IN_SFP_INIT, adapter->state); + + if ((err == IXGBE_ERR_SFP_NOT_SUPPORTED) && + adapter->netdev_registered) { + e_dev_err("failed to initialize because an unsupported " + "SFP+ module type was detected.\n"); + e_dev_err("Reload the driver after installing a " + "supported module.\n"); + unregister_netdev(adapter->netdev); + adapter->netdev_registered = false; + } +} + +/** + * ixgbe_sfp_link_config_subtask - set up link SFP after module install + * @adapter: the ixgbe adapter structure + **/ +static void ixgbe_sfp_link_config_subtask(struct ixgbe_adapter *adapter) +{ + struct ixgbe_hw *hw = &adapter->hw; + u32 cap_speed; + u32 speed = 0; + bool autoneg = false; + + if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_CONFIG)) + return; + + /* someone else is in init, wait until next service event */ + if (test_and_set_bit(__IXGBE_IN_SFP_INIT, adapter->state)) + return; + + adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG; + + hw->mac.ops.get_link_capabilities(hw, &cap_speed, &autoneg); + + /* Advertise highest capable link speed */ + if (cap_speed & IXGBE_LINK_SPEED_10GB_FULL) { + if (!autoneg) + speed = IXGBE_LINK_SPEED_10GB_FULL; + else + speed = cap_speed; + } else if (cap_speed == IXGBE_LINK_SPEED_1GB_FULL) { + speed = IXGBE_LINK_SPEED_1GB_FULL; + } + + if (hw->mac.ops.setup_link) + hw->mac.ops.setup_link(hw, speed, true); + + adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE; + adapter->link_check_timeout = jiffies; + clear_bit(__IXGBE_IN_SFP_INIT, adapter->state); +} + +/** + * ixgbe_service_timer - Timer Call-back + * @t: pointer to timer_list + **/ +static void ixgbe_service_timer(struct timer_list *t) +{ + struct ixgbe_adapter *adapter = timer_container_of(adapter, t, service_timer); + unsigned long next_event_offset; + + /* poll faster when waiting for link */ + if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE) + next_event_offset = HZ / 10; + else + next_event_offset = HZ * 2; + + /* Reset the timer */ + mod_timer(&adapter->service_timer, next_event_offset + jiffies); + + ixgbe_service_event_schedule(adapter); +} + +static void ixgbe_phy_interrupt_subtask(struct ixgbe_adapter *adapter) +{ + u32 status; + + if (!(adapter->flags2 & IXGBE_FLAG2_PHY_INTERRUPT)) + return; + adapter->flags2 &= ~IXGBE_FLAG2_PHY_INTERRUPT; + status = ixgbe_handle_lasi(&adapter->hw); + if (status != IXGBE_ERR_OVERTEMP) + return; + e_crit(drv, "%s\n", ixgbe_overheat_msg); +} + +static void ixgbe_reset_subtask(struct ixgbe_adapter *adapter) +{ + if (!test_and_clear_bit(__IXGBE_RESET_REQUESTED, adapter->state)) + return; + + rtnl_lock(); + /* If we're already down or resetting, just bail */ + if (test_bit(__IXGBE_DOWN, adapter->state) || + test_bit(__IXGBE_REMOVING, adapter->state) || + test_bit(__IXGBE_RESETTING, adapter->state)) { + rtnl_unlock(); + return; + } + + netdev_err(adapter->netdev, "Reset adapter\n"); + adapter->tx_timeout_count++; + + ixgbe_reinit_locked(adapter); + + rtnl_unlock(); +} + +static int ixgbe_check_fw_api_ver(struct ixgbe_adapter *adapter) +{ + struct ixgbe_hw *hw = &adapter->hw; + + if (hw->api_maj_ver > IXGBE_FW_API_VER_MAJOR) { + e_dev_err("The driver for the device stopped because the NVM image is newer than expected. You must install the most recent version of the network driver.\n"); + + ixgbe_down(adapter); + return -EOPNOTSUPP; + + } else if (hw->api_maj_ver == IXGBE_FW_API_VER_MAJOR && + hw->api_min_ver > (IXGBE_FW_API_VER_MINOR + 2)) { + e_dev_info("The driver for the device detected a newer version of the NVM image than expected. Please install the most recent version of the network driver.\n"); + + } else if (hw->api_maj_ver < IXGBE_FW_API_VER_MAJOR || + hw->api_min_ver < IXGBE_FW_API_VER_MINOR - 2) { + e_dev_info("The driver for the device detected an older version of the NVM image than expected. Please update the NVM image.\n"); + } + + return 0; +} + +/** + * ixgbe_check_fw_error - Check firmware for errors + * @adapter: the adapter private structure + * + * Check firmware errors in register FWSM + **/ +static bool ixgbe_check_fw_error(struct ixgbe_adapter *adapter) +{ + struct ixgbe_hw *hw = &adapter->hw; + + if (hw->mac.ops.fw_recovery_mode && hw->mac.ops.fw_recovery_mode(hw)) { + e_dev_err("Firmware recovery mode detected. Limiting functionality. Refer to the Intel(R) Ethernet Adapters and Devices User Guide for details on firmware recovery mode.\n"); + return true; + } + + if (ixgbe_is_mac_E6xx(hw->mac.type) && ixgbe_fw_rollback_mode(hw)) { + struct ixgbe_nvm_info *nvm_info = &adapter->hw.flash.nvm; + char ver_buff[64] = ""; + + if (!ixgbe_get_fw_version(hw) && !ixgbe_get_nvm_ver(hw, nvm_info)) { + snprintf(ver_buff, sizeof(ver_buff), + "Current version is NVM:%x.%02x 0x%x, FW:%d.%d. ", + nvm_info->major, nvm_info->minor, nvm_info->eetrack, + hw->fw_maj_ver, hw->fw_maj_ver); + } + + dev_warn_once(ixgbe_pf_to_dev(adapter), + "Firmware rollback mode detected. %sDevice may exhibit limited functionality. Refer to the Intel(R) Ethernet Adapters and Devices User Guide for details on firmware rollback mode.", + ver_buff); + } + return false; +} + +static void ixgbe_recovery_service_task(struct work_struct *work) +{ + struct ixgbe_adapter *adapter = container_of(work, + struct ixgbe_adapter, + service_task); + + ixgbe_handle_fw_event(adapter); + ixgbe_service_event_complete(adapter); + + mod_timer(&adapter->service_timer, jiffies + msecs_to_jiffies(100)); +} + +/** + * ixgbe_service_task - manages and runs subtasks + * @work: pointer to work_struct containing our data + **/ +static void ixgbe_service_task(struct work_struct *work) +{ + struct ixgbe_adapter *adapter = container_of(work, + struct ixgbe_adapter, + service_task); + struct ixgbe_hw *hw = &adapter->hw; + + if (IXGBE_REMOVED(adapter->hw.hw_addr)) { + if (!test_bit(__IXGBE_DOWN, adapter->state)) { + rtnl_lock(); + ixgbe_down(adapter); + rtnl_unlock(); + } + ixgbe_service_event_complete(adapter); + return; + } + + if (ixgbe_check_fw_error(adapter)) { + if (!test_bit(__IXGBE_DOWN, adapter->state)) { + unregister_netdev(adapter->netdev); + adapter->netdev_registered = false; + } + ixgbe_service_event_complete(adapter); + return; + } + if (adapter->flags2 & IXGBE_FLAG2_FW_ASYNC_EVENT) + ixgbe_handle_fw_event(adapter); +#if defined(HAVE_UDP_ENC_RX_OFFLOAD) || defined(HAVE_VXLAN_RX_OFFLOAD) +#ifndef HAVE_UDP_TUNNEL_NIC_INFO + if (adapter->flags2 & IXGBE_FLAG2_UDP_TUN_REREG_NEEDED) { + rtnl_lock(); + adapter->flags2 &= ~IXGBE_FLAG2_UDP_TUN_REREG_NEEDED; +#ifdef HAVE_UDP_ENC_RX_OFFLOAD + udp_tunnel_get_rx_info(adapter->netdev); +#else + vxlan_get_rx_port(adapter->netdev); +#endif /* HAVE_UDP_ENC_RX_OFFLOAD */ + rtnl_unlock(); + } +#endif /* HAVE_UDP_TUNNEL_NIC_INFO */ +#endif /* HAVE_UDP_ENC_RX_OFFLOAD || HAVE_VXLAN_RX_OFFLOAD */ + if (ixgbe_is_mac_E6xx(hw->mac.type)) + ixgbe_check_media_subtask(adapter); + ixgbe_reset_subtask(adapter); + ixgbe_phy_interrupt_subtask(adapter); + ixgbe_sfp_detection_subtask(adapter); + ixgbe_sfp_link_config_subtask(adapter); + ixgbe_check_overtemp_subtask(adapter); + ixgbe_watchdog_subtask(adapter); +#ifdef HAVE_TX_MQ + ixgbe_fdir_reinit_subtask(adapter); +#endif + ixgbe_check_hang_subtask(adapter); +#ifdef HAVE_PTP_1588_CLOCK + if (test_bit(__IXGBE_PTP_RUNNING, adapter->state)) { + if (!ixgbe_is_mac_E6xx(hw->mac.type)) + ixgbe_ptp_overflow_check(adapter); + if (unlikely(adapter->flags & IXGBE_FLAG_RX_HWTSTAMP_IN_REGISTER)) + ixgbe_ptp_rx_hang(adapter); + ixgbe_ptp_tx_hang(adapter); + } +#endif /* HAVE_PTP_1588_CLOCK */ + + ixgbe_service_event_complete(adapter); +} + +static int ixgbe_tso(struct ixgbe_ring *tx_ring, + struct ixgbe_tx_buffer *first, + u8 *hdr_len) +{ +#ifdef NETIF_F_TSO + u32 vlan_macip_lens, type_tucmd, mss_l4len_idx; + struct sk_buff *skb = first->skb; + union { + struct iphdr *v4; + struct ipv6hdr *v6; + unsigned char *hdr; + } ip; + union { + struct tcphdr *tcp; + unsigned char *hdr; + } l4; + u32 paylen, l4_offset; + int err; + + if (skb->ip_summed != CHECKSUM_PARTIAL) + return 0; + + if (!skb_is_gso(skb)) + return 0; + + err = skb_cow_head(skb, 0); + if (err < 0) + return err; + + ip.hdr = skb_network_header(skb); + l4.hdr = skb_checksum_start(skb); + + /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */ + type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP; + + /* initialize outer IP header fields */ + if (ip.v4->version == 4) { + unsigned char *csum_start = skb_checksum_start(skb); + unsigned char *trans_start = ip.hdr + (ip.v4->ihl * 4); + + /* IP header will have to cancel out any data that + * is not a part of the outer IP header + */ + ip.v4->check = csum_fold(csum_partial(trans_start, + csum_start - trans_start, + 0)); + type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4; + + ip.v4->tot_len = 0; + first->tx_flags |= IXGBE_TX_FLAGS_TSO | + IXGBE_TX_FLAGS_CSUM | + IXGBE_TX_FLAGS_IPV4; + } else { + ip.v6->payload_len = 0; + first->tx_flags |= IXGBE_TX_FLAGS_TSO | + IXGBE_TX_FLAGS_CSUM; + } + + /* determine offset of inner transport header */ + l4_offset = l4.hdr - skb->data; + + /* compute length of segmentation header */ + *hdr_len = (l4.tcp->doff * 4) + l4_offset; + + /* remove payload length from inner checksum */ + paylen = skb->len - l4_offset; + csum_replace_by_diff(&l4.tcp->check, htonl(paylen)); + + /* update gso size and bytecount with header size */ + first->gso_segs = skb_shinfo(skb)->gso_segs; + first->bytecount += (first->gso_segs - 1) * *hdr_len; + + /* mss_l4len_id: use 0 as index for TSO */ + mss_l4len_idx = (*hdr_len - l4_offset) << IXGBE_ADVTXD_L4LEN_SHIFT; + mss_l4len_idx |= skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT; + + /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */ + vlan_macip_lens = l4.hdr - ip.hdr; + vlan_macip_lens |= (ip.hdr - skb->data) << IXGBE_ADVTXD_MACLEN_SHIFT; + vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK; + + ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, 0, type_tucmd, + mss_l4len_idx); + + return 1; +#else + return 0; +#endif /* NETIF_F_TSO */ +} + +static inline bool ixgbe_ipv6_csum_is_sctp(struct sk_buff *skb) +{ + unsigned int offset = 0; + + ipv6_find_hdr(skb, &offset, IPPROTO_SCTP, NULL, NULL); + + return offset == skb_checksum_start_offset(skb); +} + +static void ixgbe_tx_csum(struct ixgbe_ring *tx_ring, + struct ixgbe_tx_buffer *first) +{ + struct sk_buff *skb = first->skb; + u32 vlan_macip_lens = 0; + u32 type_tucmd = 0; + + if (skb->ip_summed != CHECKSUM_PARTIAL) { +csum_failed: + if (!(first->tx_flags & (IXGBE_TX_FLAGS_HW_VLAN | + IXGBE_TX_FLAGS_CC))) + return; + goto no_csum; + } + + switch (skb->csum_offset) { + case offsetof(struct tcphdr, check): + type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP; + /* fall through */ + case offsetof(struct udphdr, check): + break; + case offsetof(struct sctphdr, checksum): + /* validate that this is actually an SCTP request */ + if (((first->protocol == htons(ETH_P_IP)) && + (ip_hdr(skb)->protocol == IPPROTO_SCTP)) || + ((first->protocol == htons(ETH_P_IPV6)) && + ixgbe_ipv6_csum_is_sctp(skb))) { + type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_SCTP; + break; + } + fallthrough; + default: + skb_checksum_help(skb); + goto csum_failed; + } + + /* update TX checksum flag */ + first->tx_flags |= IXGBE_TX_FLAGS_CSUM; + vlan_macip_lens = skb_checksum_start_offset(skb) - + skb_network_offset(skb); +no_csum: + /* vlan_macip_lens: MACLEN, VLAN tag */ + vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT; + vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK; + + ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, 0, type_tucmd, 0); +} + +#define IXGBE_SET_FLAG(_input, _flag, _result) \ + ((_flag <= _result) ? \ + ((u32)(_input & _flag) * (_result / _flag)) : \ + ((u32)(_input & _flag) / (_flag / _result))) + +static u32 ixgbe_tx_cmd_type(u32 tx_flags) +{ + /* set type for advanced descriptor with frame checksum insertion */ + u32 cmd_type = IXGBE_ADVTXD_DTYP_DATA | + IXGBE_ADVTXD_DCMD_DEXT | + IXGBE_ADVTXD_DCMD_IFCS; + + /* set HW vlan bit if vlan is present */ + cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_HW_VLAN, + IXGBE_ADVTXD_DCMD_VLE); + + /* set segmentation enable bits for TSO/FSO */ + cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSO, + IXGBE_ADVTXD_DCMD_TSE); + + /* set timestamp bit if present */ + cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSTAMP, + IXGBE_ADVTXD_MAC_TSTAMP); + + return cmd_type; +} + +static void ixgbe_tx_olinfo_status(union ixgbe_adv_tx_desc *tx_desc, + u32 tx_flags, unsigned int paylen) +{ + u32 olinfo_status = paylen << IXGBE_ADVTXD_PAYLEN_SHIFT; + + /* enable L4 checksum for TSO and TX checksum offload */ + olinfo_status |= IXGBE_SET_FLAG(tx_flags, + IXGBE_TX_FLAGS_CSUM, + IXGBE_ADVTXD_POPTS_TXSM); + + /* enble IPv4 checksum for TSO */ + olinfo_status |= IXGBE_SET_FLAG(tx_flags, + IXGBE_TX_FLAGS_IPV4, + IXGBE_ADVTXD_POPTS_IXSM); + + /* + * Check Context must be set if Tx switch is enabled, which it + * always is for case where virtual functions are running + */ + olinfo_status |= IXGBE_SET_FLAG(tx_flags, + IXGBE_TX_FLAGS_CC, + IXGBE_ADVTXD_CC); + + tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status); +} + +static int __ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size) +{ + netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index); + + /* Herbert's original patch had: + * smp_mb__after_netif_stop_queue(); + * but since that doesn't exist yet, just open code it. + */ + smp_mb(); + + /* We need to check again in a case another CPU has just + * made room available. + */ + if (likely(ixgbe_desc_unused(tx_ring) < size)) + return -EBUSY; + + /* A reprieve! - use start_queue because it doesn't call schedule */ + netif_start_subqueue(tx_ring->netdev, tx_ring->queue_index); + ++tx_ring->tx_stats.restart_queue; + return 0; +} + +static inline int ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size) +{ + if (likely(ixgbe_desc_unused(tx_ring) >= size)) + return 0; + + return __ixgbe_maybe_stop_tx(tx_ring, size); +} + +static int ixgbe_tx_map(struct ixgbe_ring *tx_ring, + struct ixgbe_tx_buffer *first, + const u8 hdr_len) +{ + struct sk_buff *skb = first->skb; + struct ixgbe_tx_buffer *tx_buffer; + union ixgbe_adv_tx_desc *tx_desc; + skb_frag_t *frag; + dma_addr_t dma; + unsigned int data_len, size; + u32 tx_flags = first->tx_flags; + u32 cmd_type = ixgbe_tx_cmd_type(tx_flags); + u16 i = tx_ring->next_to_use; + + tx_desc = IXGBE_TX_DESC(tx_ring, i); + + ixgbe_tx_olinfo_status(tx_desc, tx_flags, skb->len - hdr_len); + + size = skb_headlen(skb); + data_len = skb->data_len; + +#if IS_ENABLED(CONFIG_FCOE) + if (tx_flags & IXGBE_TX_FLAGS_FCOE) { + if (data_len < sizeof(struct fcoe_crc_eof)) { + size -= sizeof(struct fcoe_crc_eof) - data_len; + data_len = 0; + } else { + data_len -= sizeof(struct fcoe_crc_eof); + } + } +#endif /* CONFIG_FCOE */ + + dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE); + + tx_buffer = first; + + for (frag = &skb_shinfo(skb)->frags[0];; frag++) { + if (dma_mapping_error(tx_ring->dev, dma)) + goto dma_error; + + /* record length, and DMA address */ + dma_unmap_len_set(tx_buffer, len, size); + dma_unmap_addr_set(tx_buffer, dma, dma); + + tx_desc->read.buffer_addr = cpu_to_le64(dma); + + while (unlikely(size > IXGBE_MAX_DATA_PER_TXD)) { + tx_desc->read.cmd_type_len = + cpu_to_le32(cmd_type ^ IXGBE_MAX_DATA_PER_TXD); + + i++; + tx_desc++; + if (i == tx_ring->count) { + tx_desc = IXGBE_TX_DESC(tx_ring, 0); + i = 0; + } + tx_desc->read.olinfo_status = 0; + + dma += IXGBE_MAX_DATA_PER_TXD; + size -= IXGBE_MAX_DATA_PER_TXD; + + tx_desc->read.buffer_addr = cpu_to_le64(dma); + } + + if (likely(!data_len)) + break; + + tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size); + + i++; + tx_desc++; + if (i == tx_ring->count) { + tx_desc = IXGBE_TX_DESC(tx_ring, 0); + i = 0; + } + tx_desc->read.olinfo_status = 0; + +#if IS_ENABLED(CONFIG_FCOE) + size = min_t(unsigned int, data_len, skb_frag_size(frag)); +#else + size = skb_frag_size(frag); +#endif + data_len -= size; + + dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size, + DMA_TO_DEVICE); + + tx_buffer = &tx_ring->tx_buffer_info[i]; + } + + /* write last descriptor with RS and EOP bits */ + cmd_type |= size | IXGBE_TXD_CMD; + tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type); + + netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount); + + /* set the timestamp */ + first->time_stamp = jiffies; + +#ifndef HAVE_TRANS_START_IN_QUEUE + netdev_ring(tx_ring)->trans_start = first->time_stamp; +#endif + /* + * Force memory writes to complete before letting h/w know there + * are new descriptors to fetch. (Only applicable for weak-ordered + * memory model archs, such as IA-64). + * + * We also need this memory barrier to make certain all of the + * status bits have been updated before next_to_watch is written. + */ + wmb(); + + /* set next_to_watch value indicating a packet is present */ + first->next_to_watch = tx_desc; + + i++; + if (i == tx_ring->count) + i = 0; + + tx_ring->next_to_use = i; + + ixgbe_maybe_stop_tx(tx_ring, DESC_NEEDED); + + skb_tx_timestamp(skb); + + if (netif_xmit_stopped(txring_txq(tx_ring)) || !netdev_xmit_more()) { + writel(i, tx_ring->tail); +#ifndef SPIN_UNLOCK_IMPLIES_MMIOWB + + /* The following mmiowb() is required on certain + * architechtures (IA64/Altix in particular) in order to + * synchronize the I/O calls with respect to a spin lock. This + * is because the wmb() on those architectures does not + * guarantee anything for posted I/O writes. + * + * Note that the associated spin_unlock() is not within the + * driver code, but in the networking core stack. + */ + mmiowb(); +#endif /* SPIN_UNLOCK_IMPLIES_MMIOWB */ + } + + return 0; +dma_error: + dev_err(tx_ring->dev, "TX DMA map failed\n"); + + /* clear dma mappings for failed tx_buffer_info map */ + for (;;) { + tx_buffer = &tx_ring->tx_buffer_info[i]; + if (dma_unmap_len(tx_buffer, len)) + dma_unmap_page(tx_ring->dev, + dma_unmap_addr(tx_buffer, dma), + dma_unmap_len(tx_buffer, len), + DMA_TO_DEVICE); + dma_unmap_len_set(tx_buffer, len, 0); + if (tx_buffer == first) + break; + if (i == 0) + i += tx_ring->count; + i--; + } + + dev_kfree_skb_any(first->skb); + first->skb = NULL; + + tx_ring->next_to_use = i; + + return -1; +} + +static void ixgbe_atr(struct ixgbe_ring *ring, + struct ixgbe_tx_buffer *first) +{ + struct ixgbe_q_vector *q_vector = ring->q_vector; + union ixgbe_atr_hash_dword input = { .dword = 0 }; + union ixgbe_atr_hash_dword common = { .dword = 0 }; + union { + unsigned char *network; + struct iphdr *ipv4; + struct ipv6hdr *ipv6; + } hdr; + struct tcphdr *th; + struct sk_buff *skb; + unsigned int hlen; + __be16 vlan_id; + int l4_proto; + + /* if ring doesn't have a interrupt vector, cannot perform ATR */ + if (!q_vector) + return; + + /* do nothing if sampling is disabled */ + if (!ring->atr_sample_rate) + return; + + ring->atr_count++; + + /* currently only IPv4/IPv6 with TCP is supported */ + if (first->protocol != htons(ETH_P_IP) && + first->protocol != htons(ETH_P_IPV6)) + return; + + /* snag network header to get L4 type and address */ + skb = first->skb; + hdr.network = skb_network_header(skb); + +#if defined(HAVE_UDP_ENC_RX_OFFLOAD) || defined(HAVE_VXLAN_RX_OFFLOAD) + if (unlikely(hdr.network <= skb->data)) + return; + + if (skb->encapsulation && + first->protocol == htons(ETH_P_IP) && + hdr.ipv4->protocol == IPPROTO_UDP) { + struct ixgbe_adapter *adapter = q_vector->adapter; +#ifndef VXLAN_HEADROOM + if (unlikely(skb_tail_pointer(skb) < hdr.network + + vxlan_headroom(0))) + return; +#else + if (unlikely(skb_tail_pointer(skb) < hdr.network + + VXLAN_HEADROOM)) + return; +#endif /*VXLAN_HEADROOM*/ + + /* verify the port is recognized as VXLAN or GENEVE*/ + if (adapter->vxlan_port && + udp_hdr(skb)->dest == adapter->vxlan_port) + hdr.network = skb_inner_network_header(skb); + +#ifdef HAVE_UDP_ENC_RX_OFFLOAD + if (adapter->geneve_port && + udp_hdr(skb)->dest == adapter->geneve_port) + hdr.network = skb_inner_network_header(skb); +#endif + } +#endif /* HAVE_UDP_ENC_RX_OFFLOAD || HAVE_VXLAN_RX_OFFLOAD */ + + /* Make sure we have at least [minimum IPv4 header + TCP] + * or [IPv6 header] bytes + */ + if (unlikely(skb_tail_pointer(skb) < hdr.network + 40)) + return; + + /* Currently only IPv4/IPv6 with TCP is supported */ + switch (hdr.ipv4->version) { + case IPVERSION: + /* access ihl as u8 to avoid unaligned access on ia64 */ + hlen = (hdr.network[0] & 0x0F) << 2; + l4_proto = hdr.ipv4->protocol; + break; + case 6: + hlen = hdr.network - skb->data; + l4_proto = ipv6_find_hdr(skb, &hlen, IPPROTO_TCP, NULL, NULL); + hlen -= hdr.network - skb->data; + break; + default: + return; + } + + if (l4_proto != IPPROTO_TCP) + return; + + if (unlikely(skb_tail_pointer(skb) < hdr.network + + hlen + sizeof(struct tcphdr))) + return; + + th = (struct tcphdr *)(hdr.network + hlen); + + /* skip this packet since the socket is closing */ + if (th->fin) + return; + + /* sample on all syn packets or once every atr sample count */ + if (!th->syn && (ring->atr_count < ring->atr_sample_rate)) + return; + + /* reset sample count */ + ring->atr_count = 0; + + vlan_id = htons(first->tx_flags >> IXGBE_TX_FLAGS_VLAN_SHIFT); + + /* + * src and dst are inverted, think how the receiver sees them + * + * The input is broken into two sections, a non-compressed section + * containing vm_pool, vlan_id, and flow_type. The rest of the data + * is XORed together and stored in the compressed dword. + */ + input.formatted.vlan_id = vlan_id; + + /* + * since src port and flex bytes occupy the same word XOR them together + * and write the value to source port portion of compressed dword + */ + if (first->tx_flags & (IXGBE_TX_FLAGS_SW_VLAN | IXGBE_TX_FLAGS_HW_VLAN)) + common.port.src ^= th->dest ^ htons(ETH_P_8021Q); + else + common.port.src ^= th->dest ^ first->protocol; + common.port.dst ^= th->source; + + switch (hdr.ipv4->version) { + case IPVERSION: + input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4; + common.ip ^= hdr.ipv4->saddr ^ hdr.ipv4->daddr; + break; + case 6: + input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV6; + common.ip ^= hdr.ipv6->saddr.s6_addr32[0] ^ + hdr.ipv6->saddr.s6_addr32[1] ^ + hdr.ipv6->saddr.s6_addr32[2] ^ + hdr.ipv6->saddr.s6_addr32[3] ^ + hdr.ipv6->daddr.s6_addr32[0] ^ + hdr.ipv6->daddr.s6_addr32[1] ^ + hdr.ipv6->daddr.s6_addr32[2] ^ + hdr.ipv6->daddr.s6_addr32[3]; + break; + default: + break; + } + +#if defined(HAVE_UDP_ENC_RX_OFFLOAD) || defined(HAVE_VXLAN_RX_OFFLOAD) + if (hdr.network != skb_network_header(skb)) + input.formatted.flow_type |= IXGBE_ATR_L4TYPE_TUNNEL_MASK; +#endif /* HAVE_UDP_ENC_RX_OFFLOAD || HAVE_VXLAN_RX_OFFLOAD */ + + /* This assumes the Rx queue and Tx queue are bound to the same CPU */ + ixgbe_fdir_add_signature_filter_82599(&q_vector->adapter->hw, + input, common, ring->queue_index); +} +#ifdef HAVE_NETDEV_SELECT_QUEUE +#if IS_ENABLED(CONFIG_FCOE) + +#if defined(HAVE_NDO_SELECT_QUEUE_FALLBACK_REMOVED) +static u16 ixgbe_select_queue(struct net_device *dev, struct sk_buff *skb, + struct net_device *sb_dev) +#elif defined(HAVE_NDO_SELECT_QUEUE_SB_DEV) +static u16 ixgbe_select_queue(struct net_device *dev, struct sk_buff *skb, + __always_unused struct net_device *sb_dev, + select_queue_fallback_t fallback) +#elif defined(HAVE_NDO_SELECT_QUEUE_ACCEL_FALLBACK) +static u16 ixgbe_select_queue(struct net_device *dev, struct sk_buff *skb, + __always_unused void *accel, + select_queue_fallback_t fallback) +#elif defined(HAVE_NDO_SELECT_QUEUE_ACCEL) +static u16 ixgbe_select_queue(struct net_device *dev, struct sk_buff *skb, + __always_unused void *accel) +#else +static u16 ixgbe_select_queue(struct net_device *dev, struct sk_buff *skb) +#endif /* HAVE_NDO_SELECT_QUEUE_ACCEL_FALLBACK */ +{ + struct ixgbe_adapter *adapter = netdev_priv(dev); + struct ixgbe_ring_feature *f; + int txq; + + /* + * only execute the code below if protocol is FCoE + * or FIP and we have FCoE enabled on the adapter + */ + switch (vlan_get_protocol(skb)) { + case __constant_htons(ETH_P_FCOE): + case __constant_htons(ETH_P_FIP): + adapter = netdev_priv(dev); + + if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED) + break; + fallthrough; + default: +#if defined(HAVE_NDO_SELECT_QUEUE_FALLBACK_REMOVED) + return netdev_pick_tx(dev, skb, sb_dev); +#elif defined(HAVE_NDO_SELECT_QUEUE_SB_DEV) + return fallback(dev, skb, sb_dev); +#elif defined(HAVE_NDO_SELECT_QUEUE_ACCEL_FALLBACK) + return fallback(dev, skb); +#else + return __netdev_pick_tx(dev, skb); +#endif + } + + f = &adapter->ring_feature[RING_F_FCOE]; + + txq = skb_rx_queue_recorded(skb) ? skb_get_rx_queue(skb) : + smp_processor_id(); + + while (txq >= f->indices) + txq -= f->indices; + + return txq + f->offset; +} +#endif /* CONFIG_FCOE */ +#endif /* HAVE_NETDEV_SELECT_QUEUE */ + +#ifdef HAVE_XDP_SUPPORT +#ifdef HAVE_XDP_FRAME_STRUCT +int ixgbe_xmit_xdp_ring(struct ixgbe_ring *ring, struct xdp_frame *xdpf) +#else +int ixgbe_xmit_xdp_ring(struct ixgbe_ring *ring, struct xdp_buff *xdp) +#endif +{ + struct ixgbe_tx_buffer *tx_buffer; + union ixgbe_adv_tx_desc *tx_desc; + u32 len, cmd_type; + dma_addr_t dma; + u16 i; + +#ifdef HAVE_XDP_FRAME_STRUCT + len = xdpf->len; +#else + len = xdp->data_end - xdp->data; +#endif + + if (unlikely(!ixgbe_desc_unused(ring))) + return IXGBE_XDP_CONSUMED; + +#ifdef HAVE_XDP_FRAME_STRUCT + dma = dma_map_single(ring->dev, xdpf->data, len, DMA_TO_DEVICE); +#else + dma = dma_map_single(ring->dev, xdp->data, len, DMA_TO_DEVICE); +#endif + if (dma_mapping_error(ring->dev, dma)) + return IXGBE_XDP_CONSUMED; + + /* record the location of the first descriptor for this packet */ + tx_buffer = &ring->tx_buffer_info[ring->next_to_use]; + tx_buffer->bytecount = len; + tx_buffer->gso_segs = 1; + tx_buffer->protocol = 0; + + i = ring->next_to_use; + tx_desc = IXGBE_TX_DESC(ring, i); + + dma_unmap_len_set(tx_buffer, len, len); + dma_unmap_addr_set(tx_buffer, dma, dma); +#ifdef HAVE_XDP_FRAME_STRUCT + tx_buffer->xdpf = xdpf; +#else + tx_buffer->data = xdp->data; +#endif + + tx_desc->read.buffer_addr = cpu_to_le64(dma); + + /* put descriptor type bits */ + cmd_type = IXGBE_ADVTXD_DTYP_DATA | + IXGBE_ADVTXD_DCMD_DEXT | + IXGBE_ADVTXD_DCMD_IFCS; + cmd_type |= len | IXGBE_TXD_CMD; + tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type); + tx_desc->read.olinfo_status = + cpu_to_le32(len << IXGBE_ADVTXD_PAYLEN_SHIFT); + + /* Avoid any potential race with xdp_xmit and cleanup */ + smp_wmb(); + +#ifdef HAVE_XDP_SUPPORT +#ifdef HAVE_AF_XDP_ZC_SUPPORT + ring->xdp_tx_active++; +#endif /* HAVE_AF_XDP_ZC_SUPPORT */ +#endif /* HAVE_XDP_SUPPORT */ + + /* set next_to_watch value indicating a packet is present */ + i++; + if (i == ring->count) + i = 0; + + tx_buffer->next_to_watch = tx_desc; + ring->next_to_use = i; + + return IXGBE_XDP_TX; +} + +#ifdef HAVE_AF_XDP_ZC_SUPPORT +static void ixgbe_disable_txr_hw(struct ixgbe_adapter *adapter, + struct ixgbe_ring *tx_ring) +{ + unsigned long wait_delay, delay_interval; + struct ixgbe_hw *hw = &adapter->hw; + u8 reg_idx = tx_ring->reg_idx; + int wait_loop; + u32 txdctl; + + IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH); + + /* delay mechanism from ixgbe_disable_tx */ + delay_interval = ixgbe_get_completion_timeout(adapter) / 100; + + wait_loop = IXGBE_MAX_RX_DESC_POLL; + wait_delay = delay_interval; + + while (wait_loop--) { + usleep_range(wait_delay, wait_delay + 10); + wait_delay += delay_interval * 2; + txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx)); + + if (!(txdctl & IXGBE_TXDCTL_ENABLE)) + return; + } + + e_err(drv, "TXDCTL.ENABLE not cleared within the polling period\n"); +} + +static void ixgbe_disable_txr(struct ixgbe_adapter *adapter, + struct ixgbe_ring *tx_ring) +{ + set_bit(__IXGBE_TX_DISABLED, &tx_ring->state); + ixgbe_disable_txr_hw(adapter, tx_ring); +} + +static void ixgbe_disable_rxr_hw(struct ixgbe_adapter *adapter, + struct ixgbe_ring *rx_ring) +{ + unsigned long wait_delay, delay_interval; + struct ixgbe_hw *hw = &adapter->hw; + u8 reg_idx = rx_ring->reg_idx; + int wait_loop; + u32 rxdctl; + + rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx)); + rxdctl &= ~IXGBE_RXDCTL_ENABLE; + rxdctl |= IXGBE_RXDCTL_SWFLSH; + + /* write value back with RXDCTL.ENABLE bit cleared */ + IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl); + + /* RXDCTL.EN may not change on 82598 if link is down, so skip it */ + if (hw->mac.type == ixgbe_mac_82598EB && + !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP)) + return; + + /* delay mechanism from ixgbe_disable_rx */ + delay_interval = ixgbe_get_completion_timeout(adapter) / 100; + + wait_loop = IXGBE_MAX_RX_DESC_POLL; + wait_delay = delay_interval; + + while (wait_loop--) { + usleep_range(wait_delay, wait_delay + 10); + wait_delay += delay_interval * 2; + rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx)); + + if (!(rxdctl & IXGBE_RXDCTL_ENABLE)) + return; + } + + e_err(drv, "RXDCTL.ENABLE not cleared within the polling period\n"); +} + +static void ixgbe_reset_txr_stats(struct ixgbe_ring *tx_ring) +{ + memset(&tx_ring->stats, 0, sizeof(tx_ring->stats)); + memset(&tx_ring->tx_stats, 0, sizeof(tx_ring->tx_stats)); +} + +static void ixgbe_reset_rxr_stats(struct ixgbe_ring *rx_ring) +{ + memset(&rx_ring->stats, 0, sizeof(rx_ring->stats)); + memset(&rx_ring->rx_stats, 0, sizeof(rx_ring->rx_stats)); +} + +/** + * ixgbe_txrx_ring_disable - Disable Rx/Tx/XDP Tx rings + * @adapter: adapter structure + * @ring: ring index + * + * This function disables a certain Rx/Tx/XDP Tx ring. The function + * assumes that the netdev is running. + **/ +void ixgbe_txrx_ring_disable(struct ixgbe_adapter *adapter, int ring) +{ + struct ixgbe_ring *rx_ring, *tx_ring, *xdp_ring; + + rx_ring = adapter->rx_ring[ring]; + tx_ring = adapter->tx_ring[ring]; + xdp_ring = adapter->xdp_ring[ring]; + + ixgbe_disable_txr(adapter, tx_ring); + if (xdp_ring) + ixgbe_disable_txr(adapter, xdp_ring); + ixgbe_disable_rxr_hw(adapter, rx_ring); + + if (xdp_ring) + synchronize_rcu(); + + /* Rx/Tx/XDP Tx share the same napi context. */ + napi_disable(&rx_ring->q_vector->napi); + + ixgbe_clean_tx_ring(tx_ring); + if (xdp_ring) + ixgbe_clean_tx_ring(xdp_ring); + ixgbe_clean_rx_ring(rx_ring); + + ixgbe_reset_txr_stats(tx_ring); + if (xdp_ring) + ixgbe_reset_txr_stats(xdp_ring); + ixgbe_reset_rxr_stats(rx_ring); +} + +/** + * ixgbe_txrx_ring_enable - Enable Rx/Tx/XDP Tx rings + * @adapter: adapter structure + * @ring: ring index + * + * This function enables a certain Rx/Tx/XDP Tx ring. The function + * assumes that the netdev is running. + **/ +void ixgbe_txrx_ring_enable(struct ixgbe_adapter *adapter, int ring) +{ + struct ixgbe_ring *rx_ring, *tx_ring, *xdp_ring; + + rx_ring = adapter->rx_ring[ring]; + tx_ring = adapter->tx_ring[ring]; + xdp_ring = adapter->xdp_ring[ring]; + + /* Rx/Tx/XDP Tx share the same napi context. */ + napi_enable(&rx_ring->q_vector->napi); + + ixgbe_configure_tx_ring(adapter, tx_ring); + if (xdp_ring) + ixgbe_configure_tx_ring(adapter, xdp_ring); + ixgbe_configure_rx_ring(adapter, rx_ring); + + clear_bit(__IXGBE_TX_DISABLED, &tx_ring->state); + if (xdp_ring) + clear_bit(__IXGBE_TX_DISABLED, &xdp_ring->state); +} +#endif /* HAVE_AF_XDP_ZC_SUPPORT */ +#endif /* HAVE_XDP_SUPPORT */ + +/** + * ixgbe_xmit_frame_ring - Transmit a frame on a specific TX ring + * @skb: Socket buffer containing the packet to transmit + * @adapter: Pointer to the ixgbe adapter structure (may be unused) + * @tx_ring: Transmit ring to use for sending the packet + * + * This function handles the transmission of a network packet on a specified + * transmit ring of the ixgbe network adapter. It prepares the packet for + * transmission, including handling VLAN tags, timestamping, and offloads + * like TSO and checksum. The function checks for available descriptors and + * updates the ring state accordingly. It also manages special cases such as + * FCoE and PTP timestamping. + * + * Return: NETDEV_TX_OK on success, or NETDEV_TX_BUSY if the ring is full. + */ +netdev_tx_t ixgbe_xmit_frame_ring(struct sk_buff *skb, + struct ixgbe_adapter __maybe_unused *adapter, + struct ixgbe_ring *tx_ring) +{ + struct ixgbe_tx_buffer *first; + int tso; + u32 tx_flags = 0; + unsigned short f; + u16 count = TXD_USE_COUNT(skb_headlen(skb)); + __be16 protocol = skb->protocol; + u8 hdr_len = 0; + + /* + * need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD, + * + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD, + * + 2 desc gap to keep tail from touching head, + * + 1 desc for context descriptor, + * otherwise try next time + */ + for (f = 0; f < skb_shinfo(skb)->nr_frags; f++) + count += TXD_USE_COUNT(skb_frag_size(&skb_shinfo(skb)-> + frags[f])); + + if (ixgbe_maybe_stop_tx(tx_ring, count + 3)) { + tx_ring->tx_stats.tx_busy++; + return NETDEV_TX_BUSY; + } + + /* record the location of the first descriptor for this packet */ + first = &tx_ring->tx_buffer_info[tx_ring->next_to_use]; + first->skb = skb; + first->bytecount = skb->len; + first->gso_segs = 1; + + /* if we have a HW VLAN tag being added default to the HW one */ + if (skb_vlan_tag_present(skb)) { + tx_flags |= skb_vlan_tag_get(skb) << IXGBE_TX_FLAGS_VLAN_SHIFT; + tx_flags |= IXGBE_TX_FLAGS_HW_VLAN; + /* else if it is a SW VLAN check the next protocol and store the tag */ + } else if (protocol == htons(ETH_P_8021Q)) { + struct vlan_hdr *vhdr, _vhdr; + vhdr = skb_header_pointer(skb, ETH_HLEN, sizeof(_vhdr), &_vhdr); + if (!vhdr) + goto out_drop; + + protocol = vhdr->h_vlan_encapsulated_proto; + tx_flags |= ntohs(vhdr->h_vlan_TCI) << + IXGBE_TX_FLAGS_VLAN_SHIFT; + tx_flags |= IXGBE_TX_FLAGS_SW_VLAN; + } + +#ifdef HAVE_PTP_1588_CLOCK +#ifdef SKB_SHARED_TX_IS_UNION + if (unlikely(skb_tx(skb)->hardware) && + adapter->ptp_clock) { + if (!test_and_set_bit_lock(__IXGBE_PTP_TX_IN_PROGRESS, + adapter->state)) { + skb_tx(skb)->in_progress = 1; +#else + if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) && + adapter->ptp_clock) { + if (!test_and_set_bit_lock(__IXGBE_PTP_TX_IN_PROGRESS, + adapter->state)) { + skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS; +#endif + tx_flags |= IXGBE_TX_FLAGS_TSTAMP; + + /* schedule check for Tx timestamp */ + adapter->ptp_tx_skb = skb_get(skb); + adapter->ptp_tx_start = jiffies; + + /* schedule check for Tx timestamp */ + if (!ixgbe_ptp_is_tx_ptp(adapter, adapter->ptp_tx_skb)) + schedule_work(&adapter->ptp_tx_work); + } else { + adapter->tx_hwtstamp_skipped++; + } + } + +#endif +#ifdef CONFIG_PCI_IOV + /* + * Use the l2switch_enable flag - would be false if the DMA + * Tx switch had been disabled. + */ + if (adapter->flags & IXGBE_FLAG_SRIOV_L2SWITCH_ENABLE) + tx_flags |= IXGBE_TX_FLAGS_CC; + +#endif +#ifdef HAVE_TX_MQ + if ((adapter->flags & IXGBE_FLAG_DCB_ENABLED) && + ((tx_flags & (IXGBE_TX_FLAGS_HW_VLAN | IXGBE_TX_FLAGS_SW_VLAN)) || + (skb->priority != TC_PRIO_CONTROL))) { + tx_flags &= ~IXGBE_TX_FLAGS_VLAN_PRIO_MASK; +#if IS_ENABLED(CONFIG_FCOE) + /* for FCoE with DCB, we force the priority to what + * was specified by the switch */ + if ((adapter->flags & IXGBE_FLAG_FCOE_ENABLED) && + ((protocol == htons(ETH_P_FCOE)) || + (protocol == htons(ETH_P_FIP)))) + tx_flags |= adapter->fcoe.up << + IXGBE_TX_FLAGS_VLAN_PRIO_SHIFT; + else +#endif /* CONFIG_FCOE */ + tx_flags |= skb->priority << + IXGBE_TX_FLAGS_VLAN_PRIO_SHIFT; + if (tx_flags & IXGBE_TX_FLAGS_SW_VLAN) { + struct vlan_ethhdr *vhdr; + if (skb_header_cloned(skb) && + pskb_expand_head(skb, 0, 0, GFP_ATOMIC)) + goto out_drop; + vhdr = (struct vlan_ethhdr *)skb->data; + vhdr->h_vlan_TCI = htons(tx_flags >> + IXGBE_TX_FLAGS_VLAN_SHIFT); + } else { + tx_flags |= IXGBE_TX_FLAGS_HW_VLAN; + } + } + +#endif /* HAVE_TX_MQ */ + /* record initial flags and protocol */ + first->tx_flags = tx_flags; + first->protocol = protocol; + +#if IS_ENABLED(CONFIG_FCOE) + /* setup tx offload for FCoE */ + if ((protocol == htons(ETH_P_FCOE)) && + (tx_ring->netdev->features & (NETIF_F_FSO | NETIF_F_FCOE_CRC))) { + tso = ixgbe_fso(tx_ring, first, &hdr_len); + if (tso < 0) + goto out_drop; + + goto xmit_fcoe; + } else if (protocol == htons(ETH_P_FIP)) { + /* FCoE stack has a bug where it does not set the network + * header offset for FIP frames sent resulting into MACLEN + * being set to ZERO in the Tx context descriptor. + * This will cause MDD events when trying to Tx such frames. + */ + if (!skb_network_offset(skb)) { + if (tx_flags & (IXGBE_TX_FLAGS_HW_VLAN | + IXGBE_TX_FLAGS_SW_VLAN)) + skb_set_network_header(skb, + sizeof(struct ethhdr) + + sizeof(struct vlan_hdr)); + else + skb_set_network_header(skb, + sizeof(struct ethhdr)); + } + } +#endif /* CONFIG_FCOE */ + + tso = ixgbe_tso(tx_ring, first, &hdr_len); + if (tso < 0) + goto out_drop; + else if (!tso) + ixgbe_tx_csum(tx_ring, first); + + /* add the ATR filter if ATR is on */ + if (test_bit(__IXGBE_TX_FDIR_INIT_DONE, &tx_ring->state)) + ixgbe_atr(tx_ring, first); + +#if IS_ENABLED(CONFIG_FCOE) +xmit_fcoe: +#endif /* CONFIG_FCOE */ +#ifdef HAVE_PTP_1588_CLOCK + if (ixgbe_tx_map(tx_ring, first, hdr_len)) + goto cleanup_tx_tstamp; +#else + ixgbe_tx_map(tx_ring, first, hdr_len); +#endif + + return NETDEV_TX_OK; + +out_drop: + dev_kfree_skb_any(first->skb); + first->skb = NULL; +#ifdef HAVE_PTP_1588_CLOCK +cleanup_tx_tstamp: + if (unlikely(tx_flags & IXGBE_TX_FLAGS_TSTAMP)) { + dev_kfree_skb_any(adapter->ptp_tx_skb); + adapter->ptp_tx_skb = NULL; + cancel_work_sync(&adapter->ptp_tx_work); + clear_bit_unlock(__IXGBE_PTP_TX_IN_PROGRESS, adapter->state); + } +#endif + + return NETDEV_TX_OK; +} + +static netdev_tx_t __ixgbe_xmit_frame(struct sk_buff *skb, + struct net_device *netdev, + __always_unused struct ixgbe_ring *ring) +{ + struct ixgbe_adapter *adapter = netdev_priv(netdev); + struct ixgbe_ring *tx_ring; +#ifdef HAVE_TX_MQ + unsigned int r_idx = skb->queue_mapping; +#endif + + if (!netif_carrier_ok(netdev)) { + dev_kfree_skb_any(skb); + return NETDEV_TX_OK; + } + + /* + * The minimum packet size for olinfo paylen is 17 so pad the skb + * in order to meet this minimum size requirement. + */ + if (skb_put_padto(skb, 17)) + return NETDEV_TX_OK; + +#ifdef HAVE_TX_MQ + if (r_idx >= adapter->num_tx_queues) + r_idx = r_idx % adapter->num_tx_queues; + tx_ring = adapter->tx_ring[r_idx]; +#else + tx_ring = adapter->tx_ring[0]; +#endif + +#ifdef HAVE_AF_XDP_ZC_SUPPORT + if (unlikely(test_bit(__IXGBE_TX_DISABLED, &tx_ring->state))) + return NETDEV_TX_BUSY; +#endif + + return ixgbe_xmit_frame_ring(skb, adapter, tx_ring); +} + +/** + * ixgbe_xmit_frame - Transmit a network frame on the ixgbe device + * @skb: Socket buffer containing the packet to transmit + * @netdev: Network device structure pointer + * + * This function is a wrapper for transmitting a network frame on the ixgbe + * network adapter. It calls the internal `__ixgbe_xmit_frame` function to + * handle the actual transmission process. The function is responsible for + * preparing the packet and invoking the lower-level transmission logic. + * + * Return: NETDEV_TX_OK on successful transmission. + */ +static netdev_tx_t ixgbe_xmit_frame(struct sk_buff *skb, + struct net_device *netdev) +{ + return __ixgbe_xmit_frame(skb, netdev, NULL); +} + +/** + * ixgbe_set_mac - Change the Ethernet address of the NIC + * @netdev: Network interface device structure pointer + * @p: Pointer to a sockaddr structure containing the new address + * + * This function changes the Ethernet (MAC) address of the ixgbe network + * adapter. It first validates the new address to ensure it is a valid + * Ethernet address. If valid, it updates the network device and hardware + * structures with the new address and sets the default MAC filter. + * + * Return: 0 on success, or a negative error code on failure, such as + * -EADDRNOTAVAIL if the address is invalid. + */ +static int ixgbe_set_mac(struct net_device *netdev, void *p) +{ + struct ixgbe_adapter *adapter = netdev_priv(netdev); + struct ixgbe_hw *hw = &adapter->hw; + struct sockaddr *addr = p; + + if (!is_valid_ether_addr(addr->sa_data)) + return -EADDRNOTAVAIL; + + eth_hw_addr_set(netdev, addr->sa_data); + memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len); + + ixgbe_mac_set_default_filter(adapter); + + return 0; +} + +#if defined(HAVE_NETDEV_STORAGE_ADDRESS) && defined(NETDEV_HW_ADDR_T_SAN) +/** + * ixgbe_add_sanmac_netdev - Add the SAN MAC address to the device's address list + * @dev: Network interface device structure pointer + * + * This function adds the Storage Area Network (SAN) MAC address to the + * specified network device's address list. It first checks if the SAN MAC + * address is valid. If valid, it adds the address to the device's list and + * updates the SAN MAC VMDq pool selection. + * + * Return: 0 on success, or a non-zero error code on failure. + */ +static int ixgbe_add_sanmac_netdev(struct net_device *dev) +{ + int err = IXGBE_SUCCESS; + struct ixgbe_adapter *adapter = netdev_priv(dev); + struct ixgbe_hw *hw = &adapter->hw; + + if (is_valid_ether_addr(hw->mac.san_addr)) { + rtnl_lock(); + err = dev_addr_add(dev, hw->mac.san_addr, + NETDEV_HW_ADDR_T_SAN); + rtnl_unlock(); + + /* update SAN MAC vmdq pool selection */ + hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0)); + } + return err; +} + +/** + * ixgbe_del_sanmac_netdev - Remove the SAN MAC address from the device's address list + * @dev: Network interface device structure pointer + * + * This function removes the Storage Area Network (SAN) MAC address from the + * specified network device's address list. It first checks if the SAN MAC + * address is valid. If valid, it removes the address from the device's list. + * + * Return: 0 on success, or a non-zero error code on failure. + */ +static int ixgbe_del_sanmac_netdev(struct net_device *dev) +{ + int err = IXGBE_SUCCESS; + struct ixgbe_adapter *adapter = netdev_priv(dev); + struct ixgbe_mac_info *mac = &adapter->hw.mac; + + if (is_valid_ether_addr(mac->san_addr)) { + rtnl_lock(); + err = dev_addr_del(dev, mac->san_addr, NETDEV_HW_ADDR_T_SAN); + rtnl_unlock(); + } + return err; +} + +#endif /* (HAVE_NETDEV_STORAGE_ADDRESS) && defined(NETDEV_HW_ADDR_T_SAN) */ + +static int ixgbe_mdio_read(struct net_device *netdev, int prtad, int devad, + u16 addr) +{ + struct ixgbe_adapter *adapter = netdev_priv(netdev); + struct ixgbe_hw *hw = &adapter->hw; + u16 value; + int rc; + + if (prtad != hw->phy.addr) + return -EINVAL; + + if (!hw->phy.ops.read_reg) + return -EOPNOTSUPP; + + rc = hw->phy.ops.read_reg(hw, addr, devad, &value); + if (!rc) + rc = value; + + return rc; +} + +static int ixgbe_mdio_write(struct net_device *netdev, int prtad, int devad, + u16 addr, u16 value) +{ + struct ixgbe_adapter *adapter = netdev_priv(netdev); + struct ixgbe_hw *hw = &adapter->hw; + + if (prtad != hw->phy.addr) + return -EINVAL; + + if (!hw->phy.ops.write_reg) + return -EOPNOTSUPP; + + return hw->phy.ops.write_reg(hw, addr, devad, value); +} + +static int ixgbe_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, + int cmd) +{ + struct mii_ioctl_data *mii = (struct mii_ioctl_data *) &ifr->ifr_data; + int prtad, devad, ret; + + prtad = (mii->phy_id & MDIO_PHY_ID_PRTAD) >> 5; + devad = (mii->phy_id & MDIO_PHY_ID_DEVAD); + + if (cmd == SIOCGMIIREG) { + ret = ixgbe_mdio_read(netdev, prtad, devad, mii->reg_num); + if (ret < 0) + return ret; + mii->val_out = ret; + return 0; + } else { + return ixgbe_mdio_write(netdev, prtad, devad, mii->reg_num, + mii->val_in); + } +} + +/** + * ixgbe_ioctl - Handle ioctl commands for the network device + * @netdev: Network device structure + * @ifr: Interface request structure + * @cmd: Ioctl command + * + * This function processes various ioctl commands for the specified network + * device. It supports hardware timestamping configuration, ethtool operations, + * bypass operations, and MII register access, depending on the command and + * available features. + * + * Return: 0 on success, or a negative error code if the command is not supported. + */ +static int ixgbe_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) +{ +#ifdef HAVE_PTP_1588_CLOCK + struct ixgbe_adapter *adapter = netdev_priv(netdev); + +#endif + switch (cmd) { +#ifdef HAVE_PTP_1588_CLOCK +#ifdef SIOCGHWTSTAMP + case SIOCGHWTSTAMP: + return ixgbe_ptp_get_ts_config(adapter, ifr); +#endif + case SIOCSHWTSTAMP: + return ixgbe_ptp_set_ts_config(adapter, ifr); +#endif +#ifdef ETHTOOL_OPS_COMPAT + case SIOCETHTOOL: + return ethtool_ioctl(ifr); +#endif + case SIOCGMIIREG: + case SIOCSMIIREG: + return ixgbe_mii_ioctl(netdev, ifr, cmd); + default: + return -EOPNOTSUPP; + } +} + +#ifdef CONFIG_NET_POLL_CONTROLLER +/** + * ixgbe_netpoll - Handle polling for network device without interrupts + * @netdev: Network device structure + * + * This function handles polling for the specified network device, allowing + * operations like netconsole to send packets without re-enabling interrupts. + * It checks if the interface is up and processes received packets using either + * MSI-X or legacy interrupt handling, depending on the device configuration. + */ +static void ixgbe_netpoll(struct net_device *netdev) +{ + struct ixgbe_adapter *adapter = netdev_priv(netdev); + + /* if interface is down do nothing */ + if (test_bit(__IXGBE_DOWN, adapter->state)) + return; + + if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) { + int i; + for (i = 0; i < adapter->num_q_vectors; i++) { + adapter->q_vector[i]->netpoll_rx = true; + ixgbe_msix_clean_rings(0, adapter->q_vector[i]); + adapter->q_vector[i]->netpoll_rx = false; + } + } else { + ixgbe_intr(0, adapter); + } +} +#endif /* CONFIG_NET_POLL_CONTROLLER */ + +/* ixgbe_validate_rtr - verify 802.1Qp to Rx packet buffer mapping is valid. + * @adapter: pointer to ixgbe_adapter + * @tc: number of traffic classes currently enabled + * + * Configure a valid 802.1Qp to Rx packet buffer mapping ie confirm + * 802.1Q priority maps to a packet buffer that exists. + */ +static void ixgbe_validate_rtr(struct ixgbe_adapter *adapter, u8 tc) +{ + struct ixgbe_hw *hw = &adapter->hw; + u32 reg, rsave; + int i; + + /* 82598 have a static priority to TC mapping that can not + * be changed so no validation is needed. + */ + if (hw->mac.type == ixgbe_mac_82598EB) + return; + + reg = IXGBE_READ_REG(hw, IXGBE_RTRUP2TC); + rsave = reg; + + for (i = 0; i < IXGBE_DCB_MAX_TRAFFIC_CLASS; i++) { + u8 up2tc = IXGBE_RTRUP2TC_UP_MASK & + (reg >> (i * IXGBE_RTRUP2TC_UP_SHIFT)); + + /* If up2tc is out of bounds default to zero */ + if (up2tc > tc) + reg &= ~(IXGBE_RTRUP2TC_UP_MASK << (i * IXGBE_RTRUP2TC_UP_SHIFT)); + } + + if (reg != rsave) + IXGBE_WRITE_REG(hw, IXGBE_RTRUP2TC, reg); + + return; +} + +/** + * ixgbe_set_prio_tc_map - Configure netdev prio tc map + * @adapter: Pointer to adapter struct + * + * Populate the netdev user priority to tc map + */ +static void ixgbe_set_prio_tc_map(struct ixgbe_adapter __maybe_unused *adapter) +{ +#ifdef HAVE_DCBNL_IEEE + struct net_device *dev = adapter->netdev; + struct ixgbe_dcb_config *dcb_cfg = &adapter->dcb_cfg; + struct ieee_ets *ets = adapter->ixgbe_ieee_ets; + u8 prio; + + for (prio = 0; prio < IXGBE_DCB_MAX_USER_PRIORITY; prio++) { + u8 tc = 0; + + if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE) + tc = ixgbe_dcb_get_tc_from_up(dcb_cfg, 0, prio); + else if (ets) + tc = ets->prio_tc[prio]; + + netdev_set_prio_tc_map(dev, prio, tc); + } +#endif +} + +#ifdef NETIF_F_HW_TC +#ifdef HAVE_TC_SETUP_CLSU32 +static int ixgbe_delete_clsu32(struct ixgbe_adapter *adapter, + struct tc_cls_u32_offload *cls) +{ + u32 hdl = cls->knode.handle; + u32 uhtid = TC_U32_USERHTID(cls->knode.handle); + u32 loc = cls->knode.handle & 0xfffff; + int err = 0, i, j; + struct ixgbe_jump_table *jump = NULL; + + if (loc > IXGBE_MAX_HW_ENTRIES) + return -EINVAL; + + if ((uhtid != 0x800) && (uhtid >= IXGBE_MAX_LINK_HANDLE)) + return -EINVAL; + + /* Clear this filter in the link data it is associated with */ + if (uhtid != 0x800) { + jump = adapter->jump_tables[uhtid]; + if (!jump) + return -EINVAL; + if (!test_bit(loc - 1, jump->child_loc_map)) + return -EINVAL; + clear_bit(loc - 1, jump->child_loc_map); + } + + /* Check if the filter being deleted is a link */ + for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++) { + jump = adapter->jump_tables[i]; + if (jump && jump->link_hdl == hdl) { + /* Delete filters in the hardware in the child hash + * table associated with this link + */ + for (j = 0; j < IXGBE_MAX_HW_ENTRIES; j++) { + if (!test_bit(j, jump->child_loc_map)) + continue; + spin_lock(&adapter->fdir_perfect_lock); + err = ixgbe_update_ethtool_fdir_entry(adapter, + NULL, + j + 1); + spin_unlock(&adapter->fdir_perfect_lock); + clear_bit(j, jump->child_loc_map); + } + /* Remove resources for this link */ + kfree(jump->input); + kfree(jump->mask); + kfree(jump); + adapter->jump_tables[i] = NULL; + return err; + } + } + + spin_lock(&adapter->fdir_perfect_lock); + err = ixgbe_update_ethtool_fdir_entry(adapter, NULL, loc); + spin_unlock(&adapter->fdir_perfect_lock); + return err; +} + +#ifdef HAVE_NDO_SETUP_TC_REMOVE_TC_TO_NETDEV +static int ixgbe_configure_clsu32_add_hnode(struct ixgbe_adapter *adapter, + struct tc_cls_u32_offload *cls) +{ +#else +static int ixgbe_configure_clsu32_add_hnode(struct ixgbe_adapter *adapter, + __be16 protocol, + struct tc_cls_u32_offload *cls) +{ +#endif + u32 uhtid = TC_U32_USERHTID(cls->hnode.handle); + + if (uhtid >= IXGBE_MAX_LINK_HANDLE) + return -EINVAL; + + /* This ixgbe devices do not support hash tables at the moment + * so abort when given hash tables. + */ + if (cls->hnode.divisor > 0) + return -EINVAL; + + set_bit(uhtid - 1, &adapter->tables); + return 0; +} + +static int ixgbe_configure_clsu32_del_hnode(struct ixgbe_adapter *adapter, + struct tc_cls_u32_offload *cls) +{ + u32 uhtid = TC_U32_USERHTID(cls->hnode.handle); + + if (uhtid >= IXGBE_MAX_LINK_HANDLE) + return -EINVAL; + + clear_bit(uhtid - 1, &adapter->tables); + return 0; +} + +#ifdef CONFIG_NET_CLS_ACT +#ifdef HAVE_TCF_MIRRED_REDIRECT +static int handle_redirect_action(struct ixgbe_adapter *adapter, int ifindex, + u8 *queue, u64 *action) +{ + unsigned int num_vfs = adapter->num_vfs, vf; + struct net_device *upper; + + /* redirect to a SRIOV VF */ + for (vf = 0; vf < num_vfs; ++vf) { + upper = pci_get_drvdata(adapter->vfinfo[vf].vfdev); + if (upper->ifindex == ifindex) { + if (adapter->num_rx_pools > 1) + *queue = vf * 2; + else + *queue = vf * adapter->num_rx_queues_per_pool; + + *action = vf + 1; + *action <<= ETHTOOL_RX_FLOW_SPEC_RING_VF_OFF; + return 0; + } + } + return -EINVAL; +} +#endif + +static int parse_tc_actions(struct ixgbe_adapter *adapter, + struct tcf_exts *exts, u64 *action, u8 *queue) +{ + const struct tc_action *a; +#if defined(HAVE_TCF_EXTS_TO_LIST) + LIST_HEAD(actions); +#elif defined(HAVE_TCF_EXTS_FOR_EACH_ACTION) + int i; +#endif + +#ifdef HAVE_TCF_EXTS_HAS_ACTION + if (!tcf_exts_has_actions(exts)) +#else + if (tc_no_actions(exts)) +#endif + return -EINVAL; + +#if defined(HAVE_TCF_EXTS_TO_LIST) + tcf_exts_to_list(exts, &actions); + list_for_each_entry(a, &actions, list) { +#elif defined(HAVE_TCF_EXTS_FOR_EACH_ACTION) + tcf_exts_for_each_action(i, a, exts) { +#else + tc_for_each_action(a, exts) { +#endif + /* Drop action */ + if (is_tcf_gact_shot(a)) { + *action = IXGBE_FDIR_DROP_QUEUE; + *queue = IXGBE_FDIR_DROP_QUEUE; + return 0; + } + +#ifdef HAVE_TCF_MIRRED_REDIRECT + /* Redirect to a VF or a offloaded macvlan */ +#ifdef HAVE_TCF_MIRRED_EGRESS_REDIRECT + if (is_tcf_mirred_egress_redirect(a)) { +#else + if (is_tcf_mirred_redirect(a)) { +#endif +#ifdef HAVE_TCF_MIRRED_DEV + struct net_device *dev = tcf_mirred_dev(a); + + if (!dev) + return -EINVAL; + return handle_redirect_action(adapter, dev->ifindex, + queue, action); +#else + int ifindex = tcf_mirred_ifindex(a); + + return handle_redirect_action(adapter, ifindex, + queue, action); +#endif + } +#endif + return -EINVAL; + } + + return -EINVAL; +} +#else +static int parse_tc_actions(struct ixgbe_adapter *adapter, + struct tcf_exts *exts, u64 *action, u8 *queue) +{ + return -EINVAL; +} +#endif /* CONFIG_NET_CLS_ACT */ + +static int ixgbe_clsu32_build_input(struct ixgbe_fdir_filter *input, + union ixgbe_atr_input *mask, + struct tc_cls_u32_offload *cls, + struct ixgbe_mat_field *field_ptr, + struct ixgbe_nexthdr *nexthdr) +{ + int i, j, off; + __be32 val, m; + bool found_entry = false, found_jump_field = false; + + for (i = 0; i < cls->knode.sel->nkeys; i++) { + off = cls->knode.sel->keys[i].off; + val = cls->knode.sel->keys[i].val; + m = cls->knode.sel->keys[i].mask; + + for (j = 0; field_ptr[j].val; j++) { + if (field_ptr[j].off == off) { + field_ptr[j].val(input, mask, val, m); + input->filter.formatted.flow_type |= + field_ptr[j].type; + found_entry = true; + break; + } + } + if (nexthdr) { + if (nexthdr->off == cls->knode.sel->keys[i].off && + nexthdr->val == cls->knode.sel->keys[i].val && + nexthdr->mask == cls->knode.sel->keys[i].mask) + found_jump_field = true; + else + continue; + } + } + + if (nexthdr && !found_jump_field) + return -EINVAL; + + if (!found_entry) + return 0; + + mask->formatted.flow_type = IXGBE_ATR_L4TYPE_IPV6_MASK | + IXGBE_ATR_L4TYPE_MASK; + + if (input->filter.formatted.flow_type == IXGBE_ATR_FLOW_TYPE_IPV4) + mask->formatted.flow_type &= IXGBE_ATR_L4TYPE_IPV6_MASK; + + return 0; +} + +#ifdef HAVE_NDO_SETUP_TC_REMOVE_TC_TO_NETDEV +static int ixgbe_configure_clsu32(struct ixgbe_adapter *adapter, + struct tc_cls_u32_offload *cls) +{ + __be16 protocol = cls->common.protocol; +#else +static int ixgbe_configure_clsu32(struct ixgbe_adapter *adapter, + __be16 protocol, + struct tc_cls_u32_offload *cls) +{ +#endif + u32 loc = cls->knode.handle & 0xfffff; + struct ixgbe_hw *hw = &adapter->hw; + struct ixgbe_mat_field *field_ptr; + struct ixgbe_fdir_filter *input; + struct ixgbe_jump_table *jump; + union ixgbe_atr_input *mask; + u32 uhtid, link_uhtid; + int i, err = -EINVAL; + u8 queue; + + uhtid = TC_U32_USERHTID(cls->knode.handle); + link_uhtid = TC_U32_USERHTID(cls->knode.link_handle); + + /* At the moment cls_u32 jumps to network layer and skips past + * L2 headers. The canonical method to match L2 frames is to use + * negative values. However this is error prone at best but really + * just broken because there is no way to "know" what sort of hdr + * is in front of the network layer. Fix cls_u32 to support L2 + * headers when needed. + */ + if (protocol != htons(ETH_P_IP)) + return err; + + if (loc >= ((1024 << adapter->fdir_pballoc) - 2)) { + e_err(drv, "Location out of range\n"); + return err; + } + + /* cls u32 is a graph starting at root node 0x800. The driver tracks + * links and also the fields used to advance the parser across each + * link (e.g. nexthdr/eat parameters from 'tc'). This way we can map + * the u32 graph onto the hardware parse graph denoted in ixgbe_model.h + * To add support for new nodes update ixgbe_model.h parse structures + * this function _should_ be generic try not to hardcode values here. + */ + if (uhtid == 0x800) { + field_ptr = (adapter->jump_tables[0])->mat; + } else { + if (uhtid >= IXGBE_MAX_LINK_HANDLE) + return err; + if (!adapter->jump_tables[uhtid]) + return err; + field_ptr = (adapter->jump_tables[uhtid])->mat; + } + + if (!field_ptr) + return err; + + /* At this point we know the field_ptr is valid and need to either + * build cls_u32 link or attach filter. Because adding a link to + * a handle that does not exist is invalid and the same for adding + * rules to handles that don't exist. + */ + + if (link_uhtid) { + struct ixgbe_nexthdr *nexthdr = ixgbe_ipv4_jumps; + + if (link_uhtid >= IXGBE_MAX_LINK_HANDLE) + return err; + + if (!test_bit(link_uhtid - 1, &adapter->tables)) + return err; + + /* Multiple filters as links to the same hash table are not + * supported. To add a new filter with the same next header + * but different match/jump conditions, create a new hash table + * and link to it. + */ + if (adapter->jump_tables[link_uhtid] && + (adapter->jump_tables[link_uhtid])->link_hdl) { + e_err(drv, "Link filter exists for link: %x\n", + link_uhtid); + return err; + } + + jump = kzalloc(sizeof(*jump), GFP_KERNEL); + input = kzalloc(sizeof(*input), GFP_KERNEL); + mask = kzalloc(sizeof(*mask), GFP_KERNEL); + if (!jump || !input || !mask) { + err = -ENOMEM; + goto err_out; + } + + for (i = 0; nexthdr[i].jump; i++) { + if (nexthdr[i].o != cls->knode.sel->offoff || + nexthdr[i].s != cls->knode.sel->offshift || + nexthdr[i].m != cls->knode.sel->offmask) + goto err_out; + + jump->input = input; + jump->mask = mask; + jump->link_hdl = cls->knode.handle; + + err = ixgbe_clsu32_build_input(input, mask, cls, + field_ptr, &nexthdr[i]); + if (!err) { + jump->mat = nexthdr[i].jump; + adapter->jump_tables[link_uhtid] = jump; + /* Ownership transferred, clear local pointers */ + jump = NULL; + input = NULL; + mask = NULL; + err = 0; + break; + } + } + + goto err_out; + } + + jump = NULL; /* save one allocation call */ + input = kzalloc(sizeof(*input), GFP_KERNEL); + mask = kzalloc(sizeof(*mask), GFP_KERNEL); + if (!input || !mask) { + err = -ENOMEM; + goto err_out; + } + + if ((uhtid != 0x800) && (adapter->jump_tables[uhtid])) { + if ((adapter->jump_tables[uhtid])->input) + memcpy(input, (adapter->jump_tables[uhtid])->input, + sizeof(*input)); + if ((adapter->jump_tables[uhtid])->mask) + memcpy(mask, (adapter->jump_tables[uhtid])->mask, + sizeof(*mask)); + + /* Lookup in all child hash tables if this location is already + * filled with a filter + */ + for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++) { + struct ixgbe_jump_table *link = adapter->jump_tables[i]; + + if (link && (test_bit(loc - 1, link->child_loc_map))) { + e_err(drv, "Filter exists in location: %x\n", + loc); + err = -EINVAL; + goto err_out; + } + } + } + err = ixgbe_clsu32_build_input(input, mask, cls, field_ptr, NULL); + if (err) + goto err_out; + + err = parse_tc_actions(adapter, cls->knode.exts, &input->action, + &queue); + if (err < 0) + goto err_out; + + input->sw_idx = loc; + + spin_lock(&adapter->fdir_perfect_lock); + + if (hlist_empty(&adapter->fdir_filter_list)) { + memcpy(&adapter->fdir_mask, mask, sizeof(*mask)); + err = ixgbe_fdir_set_input_mask_82599(hw, mask, + adapter->cloud_mode); + if (err) + goto err_out_w_lock; + } else if (memcmp(&adapter->fdir_mask, mask, sizeof(*mask))) { + err = -EINVAL; + goto err_out_w_lock; + } + + ixgbe_atr_compute_perfect_hash_82599(&input->filter, mask); + err = ixgbe_fdir_write_perfect_filter_82599(hw, &input->filter, + input->sw_idx, queue, + adapter->cloud_mode); + if (!err) { + ixgbe_update_ethtool_fdir_entry(adapter, input, input->sw_idx); + /* Ownership of input transferred to ethtool, clear local pointer */ + input = NULL; + } + spin_unlock(&adapter->fdir_perfect_lock); + + if ((uhtid != 0x800) && (adapter->jump_tables[uhtid])) + set_bit(loc - 1, (adapter->jump_tables[uhtid])->child_loc_map); + + kfree(mask); + kfree(input); + return err; + +err_out_w_lock: + spin_unlock(&adapter->fdir_perfect_lock); +err_out: + kfree(mask); + kfree(input); + kfree(jump); + return err; +} + +#ifdef HAVE_NDO_SETUP_TC_REMOVE_TC_TO_NETDEV +#ifdef HAVE_TCF_BLOCK +static int ixgbe_setup_tc_cls_u32(struct ixgbe_adapter *adapter, + struct tc_cls_u32_offload *cls_u32) +#else +static int ixgbe_setup_tc_cls_u32(struct net_device *dev, + struct tc_cls_u32_offload *cls_u32) +#endif /* HAVE_TCF_BLOCK */ +{ +#ifdef HAVE_TCF_BLOCK +#ifndef HAVE_TCF_MIRRED_DEV + if (cls_u32->common.chain_index) + return -EOPNOTSUPP; +#endif +#else + struct ixgbe_adapter *adapter = netdev_priv(dev); + + if (!is_classid_clsact_ingress(cls_u32->common.classid) || + cls_u32->common.chain_index) + return -EOPNOTSUPP; +#endif + + switch (cls_u32->command) { + case TC_CLSU32_NEW_KNODE: + case TC_CLSU32_REPLACE_KNODE: + return ixgbe_configure_clsu32(adapter, cls_u32); + case TC_CLSU32_DELETE_KNODE: + return ixgbe_delete_clsu32(adapter, cls_u32); + case TC_CLSU32_NEW_HNODE: + case TC_CLSU32_REPLACE_HNODE: + return ixgbe_configure_clsu32_add_hnode(adapter, cls_u32); + case TC_CLSU32_DELETE_HNODE: + return ixgbe_configure_clsu32_del_hnode(adapter, cls_u32); + default: + return -EOPNOTSUPP; + + } +} +#endif /* HAVE_NDO_SETUP_TC_REMOVE_TC_TO_NETDEV */ +#endif /* HAVE_TC_SETUP_CLSU32 */ + +#ifdef HAVE_TCF_BLOCK +static int ixgbe_setup_tc_block_cb(enum tc_setup_type type, void *type_data, + void *cb_priv) +{ + struct ixgbe_adapter *adapter = cb_priv; + +#ifdef HAVE_TCF_MIRRED_DEV + if (!tc_cls_can_offload_and_chain0(adapter->netdev, type_data)) +#else + if (!tc_can_offload(adapter->netdev)) +#endif + return -EOPNOTSUPP; + + switch (type) { +#ifdef HAVE_TC_SETUP_CLSU32 + case TC_SETUP_CLSU32: + return ixgbe_setup_tc_cls_u32(adapter, type_data); +#endif /* HAVE_TC_SETUP_CLSU32 */ + default: + return -EOPNOTSUPP; + } +} + +static LIST_HEAD(ixgbe_block_cb_list); + +#endif +#ifdef TC_MQPRIO_HW_OFFLOAD_MAX +static int ixgbe_setup_tc_mqprio(struct net_device *dev, + struct tc_mqprio_qopt *mqprio) +{ + mqprio->hw = TC_MQPRIO_HW_OFFLOAD_TCS; + return ixgbe_setup_tc(dev, mqprio->num_tc); +} +#endif + +#ifdef HAVE_TCF_BLOCK +#define IXGBE_SETUP_TC_DECLARE_ADAPTER +#endif /* HAVE_TCF_BLOCK */ + +#ifdef HAVE_TC_SETUP_CLSU32 +#ifndef HAVE_NDO_SETUP_TC_REMOVE_TC_TO_NETDEV +#define IXGBE_SETUP_TC_DECLARE_ADAPTER +#endif /* !HAVE_NDO_SETUP_TC_REMOVE_TC_TO_NETDEV */ +#endif /* HAVE_TC_SETUP_CLSU32 */ + +#if defined(HAVE_NDO_SETUP_TC_REMOVE_TC_TO_NETDEV) +static int +__ixgbe_setup_tc(struct net_device *dev, enum tc_setup_type type, + void *type_data) +#elif defined(HAVE_NDO_SETUP_TC_CHAIN_INDEX) +static int +__ixgbe_setup_tc(struct net_device *dev, __always_unused u32 handle, + u32 chain_index, __always_unused __be16 proto, + struct tc_to_netdev *tc) +#else +static int +__ixgbe_setup_tc(struct net_device *dev, __always_unused u32 handle, + __always_unused __be16 proto, struct tc_to_netdev *tc) +#endif +{ +#ifdef IXGBE_SETUP_TC_DECLARE_ADAPTER + struct ixgbe_adapter *adapter = netdev_priv(dev); +#endif +#ifndef HAVE_NDO_SETUP_TC_REMOVE_TC_TO_NETDEV + unsigned int type = tc->type; +#ifdef HAVE_NDO_SETUP_TC_CHAIN_INDEX + + if (chain_index) + return -EOPNOTSUPP; +#endif /* HAVE_NDO_SETUP_TC_CHAIN_INDEX */ +#ifdef HAVE_TC_SETUP_CLSU32 + + if (TC_H_MAJ(handle) == TC_H_MAJ(TC_H_INGRESS) && + type == TC_SETUP_CLSU32) { + + switch (tc->cls_u32->command) { + case TC_CLSU32_NEW_KNODE: + case TC_CLSU32_REPLACE_KNODE: + return ixgbe_configure_clsu32(adapter, + proto, tc->cls_u32); + case TC_CLSU32_DELETE_KNODE: + return ixgbe_delete_clsu32(adapter, tc->cls_u32); + case TC_CLSU32_NEW_HNODE: + case TC_CLSU32_REPLACE_HNODE: + return ixgbe_configure_clsu32_add_hnode(adapter, proto, + tc->cls_u32); + case TC_CLSU32_DELETE_HNODE: + return ixgbe_configure_clsu32_del_hnode(adapter, + tc->cls_u32); + default: + return -EINVAL; + } + } +#endif /* HAVE_TC_SETUP_CLSU32 */ +#endif /* !HAVE_NDO_SETUP_TC_REMOVE_TC_TO_NETDEV */ + + switch (type) { +#if defined(HAVE_NDO_SETUP_TC_REMOVE_TC_TO_NETDEV) +#if defined(HAVE_TCF_BLOCK) + case TC_SETUP_BLOCK: + return flow_block_cb_setup_simple(type_data, + &ixgbe_block_cb_list, + ixgbe_setup_tc_block_cb, + adapter, adapter, true); +#else +#ifdef HAVE_TC_SETUP_CLSU32 + case TC_SETUP_CLSU32: + return ixgbe_setup_tc_cls_u32(dev, type_data); +#endif /* HAVE_TC_SETUP_CLSU32 */ +#endif /* HAVE_TCF_BLOCK */ +#endif /* HAVE_NDO_SETUP_TC_REMOVE_TC_TO_NETDEV */ + case TC_SETUP_QDISC_MQPRIO: +#if defined(HAVE_NDO_SETUP_TC_REMOVE_TC_TO_NETDEV) + return ixgbe_setup_tc_mqprio(dev, type_data); +#elif defined(TC_MQPRIO_HW_OFFLOAD_MAX) + return ixgbe_setup_tc_mqprio(dev, tc->mqprio); +#else + return ixgbe_setup_tc(dev, tc->tc); +#endif + default: + return -EOPNOTSUPP; + } +} + +#endif /* NETIF_F_HW_TC */ +/** + * ixgbe_setup_tc - Configure net_device for multiple traffic classes + * @dev: Net device to configure + * @tc: Number of traffic classes to enable + * + * This function configures the ixgbe network adapter to support multiple + * traffic classes (TCs). It checks the hardware capabilities and ensures + * that the requested number of TCs is within supported limits. The function + * reinitializes queues and interrupts to match packet buffer alignment and + * updates the device's configuration for Data Center Bridging (DCB) if + * applicable. It handles specific cases for different hardware types and + * features like XDP and macvlan offload. + * + * Return: 0 on success, or -EINVAL if the requested TCs are not supported. + */ +int ixgbe_setup_tc(struct net_device *dev, u8 tc) +{ + struct ixgbe_adapter *adapter = netdev_priv(dev); + struct ixgbe_hw *hw = &adapter->hw; + + /* Hardware supports up to 8 traffic classes */ + if (tc > adapter->dcb_cfg.num_tcs.pg_tcs) + return -EINVAL; + + if (tc && hw->mac.type == ixgbe_mac_82598EB && + tc < IXGBE_DCB_MAX_TRAFFIC_CLASS) + return -EINVAL; + + /* Hardware has to reinitialize queues and interrupts to + * match packet buffer alignment. Unfortunately, the + * hardware is not flexible enough to do this dynamically. + */ + if (netif_running(dev)) + ixgbe_close(dev); + else + ixgbe_reset(adapter); + + ixgbe_clear_interrupt_scheme(adapter); + + if (tc) { +#ifdef HAVE_XDP_SUPPORT + if (adapter->xdp_prog) { + e_warn(probe, "DCB is not supported with XDP\n"); + + ixgbe_init_interrupt_scheme(adapter); + if (netif_running(dev)) + ixgbe_open(dev); + return -EINVAL; + } +#endif /* IXGBE_XDP_ENABLED */ + + netdev_set_num_tc(dev, tc); + ixgbe_set_prio_tc_map(adapter); + + adapter->flags |= IXGBE_FLAG_DCB_ENABLED; + + if (adapter->hw.mac.type == ixgbe_mac_82598EB) { + adapter->last_lfc_mode = adapter->hw.fc.requested_mode; + adapter->hw.fc.requested_mode = ixgbe_fc_none; + } + } else { + netdev_reset_tc(dev); + + if (adapter->hw.mac.type == ixgbe_mac_82598EB) + adapter->hw.fc.requested_mode = adapter->last_lfc_mode; + + adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED; + + adapter->temp_dcb_cfg.pfc_mode_enable = false; + adapter->dcb_cfg.pfc_mode_enable = false; + } + + ixgbe_validate_rtr(adapter, tc); + + ixgbe_init_interrupt_scheme(adapter); + if (netif_running(dev)) + ixgbe_open(dev); + + return 0; +} + +#ifdef CONFIG_PCI_IOV +void ixgbe_sriov_reinit(struct ixgbe_adapter *adapter) +{ + struct net_device *netdev = adapter->netdev; + + rtnl_lock(); + ixgbe_setup_tc(netdev, netdev_get_num_tc(netdev)); + rtnl_unlock(); +} +#endif + +void ixgbe_do_reset(struct net_device *netdev) +{ + struct ixgbe_adapter *adapter = netdev_priv(netdev); + + if (netif_running(netdev)) + ixgbe_reinit_locked(adapter); + else + ixgbe_reset(adapter); +} + +#ifdef HAVE_NDO_SET_FEATURES +/** + * ixgbe_fix_features - Adjust network device features + * @netdev: Network device structure + * @features: Desired features to be adjusted + * + * This function adjusts the network device features based on the current + * configuration and capabilities. It ensures that features like VLAN RX, + * LRO, and L2 offloads are enabled or disabled appropriately, considering + * factors such as DCB, RSC capability, XDP, and SR-IOV. + * + * Return: The adjusted set of features. + */ +#ifdef HAVE_RHEL6_NET_DEVICE_OPS_EXT +static u32 ixgbe_fix_features(struct net_device *netdev, u32 features) +#else +static netdev_features_t ixgbe_fix_features(struct net_device *netdev, + netdev_features_t features) +#endif +{ + struct ixgbe_adapter *adapter = netdev_priv(netdev); + +#if IS_ENABLED(CONFIG_DCB) + if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) +#ifdef NETIF_F_HW_VLAN_CTAG_RX + features |= NETIF_F_HW_VLAN_CTAG_RX; +#else + features |= NETIF_F_HW_VLAN_RX; +#endif +#endif /* CONFIG_DCB */ + + /* If Rx checksum is disabled, then RSC/LRO should also be disabled */ + if (!(features & NETIF_F_RXCSUM)) + features &= ~NETIF_F_LRO; + + /* Turn off LRO if not RSC capable */ + if (!(adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE)) + features &= ~NETIF_F_LRO; + + if (adapter->xdp_prog && (features & NETIF_F_LRO)) { + e_dev_err("LRO is not supported with XDP\n"); + features &= ~NETIF_F_LRO; + } + + return features; +} + +/** + * ixgbe_set_features - Update network device features + * @netdev: Network device structure pointer + * @features: New feature set for the device + * + * This function updates the network device's features, such as LRO, RSC, + * and Flow Director support. It checks for changes and may reset the device + * if necessary to apply new settings. It also handles specific hardware + * capabilities like UDP tunnel offloads. + * + * Return: 0 on success. + */ +#ifdef HAVE_RHEL6_NET_DEVICE_OPS_EXT +static int ixgbe_set_features(struct net_device *netdev, u32 features) +#else +static int ixgbe_set_features(struct net_device *netdev, + netdev_features_t features) +#endif +{ + struct ixgbe_adapter *adapter = netdev_priv(netdev); + bool need_reset = false; + netdev_features_t changed = netdev->features ^ features; + + /* Make sure RSC matches LRO, reset if change */ + if (!(features & NETIF_F_LRO)) { + if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) + need_reset = true; + adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED; + } else if ((adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) && + !(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) { + if (adapter->rx_itr_setting == 1 || + adapter->rx_itr_setting > IXGBE_MIN_RSC_ITR) { + adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED; + need_reset = true; + } else if (changed & NETIF_F_LRO) { + e_info(probe, "rx-usecs set too low, " + "disabling RSC\n"); + } + } + + /* + * Check if Flow Director n-tuple support or hw_tc support was + * enabled or disabled. If the state changed, we need to reset. + */ +#ifdef NETIF_F_HW_TC + if ((features & NETIF_F_NTUPLE) || (features & NETIF_F_HW_TC)) { +#else + if (features & NETIF_F_NTUPLE) { +#endif + /* turn off ATR, enable perfect filters and reset */ + if (!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)) + need_reset = true; + + adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE; + adapter->flags |= IXGBE_FLAG_FDIR_PERFECT_CAPABLE; + } else { + /* turn off perfect filters, enable ATR and reset */ + if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE) + need_reset = true; + + adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE; + + /* We cannot enable ATR if VMDq is enabled */ + if (adapter->flags & IXGBE_FLAG_VMDQ_ENABLED || + /* We cannot enable ATR if we have 2 or more tcs */ + netdev_get_num_tc(netdev) > 1 || + /* We cannot enable ATR if RSS is disabled */ + adapter->ring_feature[RING_F_RSS].limit <= 1 || + /* A sample rate of 0 indicates ATR disabled */ + !adapter->atr_sample_rate) + ; /* do nothing not supported */ + else /* otherwise supported and set the flag */ + adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE; + } + + netdev->features = features; + +#if defined(HAVE_UDP_ENC_RX_OFFLOAD) || defined(HAVE_VXLAN_RX_OFFLOAD) + if (adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE && + features & NETIF_F_RXCSUM) { + if (!need_reset) + adapter->flags2 |= IXGBE_FLAG2_UDP_TUN_REREG_NEEDED; + } else { + u32 port_mask = IXGBE_VXLANCTRL_VXLAN_UDPPORT_MASK; + + ixgbe_clear_udp_tunnel_port(adapter, port_mask); + } +#endif /* HAVE_UDP_ENC_RX_OFFLOAD || HAVE_VXLAN_RX_OFFLOAD */ + +#ifdef HAVE_UDP_ENC_RX_OFFLOAD + if (adapter->flags & IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE && + features & NETIF_F_RXCSUM) { + if (!need_reset) + adapter->flags2 |= IXGBE_FLAG2_UDP_TUN_REREG_NEEDED; + } else { + u32 port_mask = IXGBE_VXLANCTRL_GENEVE_UDPPORT_MASK; + + ixgbe_clear_udp_tunnel_port(adapter, port_mask); + } +#endif /* HAVE_UDP_ENC_RX_OFFLOAD */ + + if (need_reset) + ixgbe_do_reset(netdev); +#ifdef NETIF_F_HW_VLAN_CTAG_FILTER + else if (changed & (NETIF_F_HW_VLAN_CTAG_RX | + NETIF_F_HW_VLAN_CTAG_FILTER)) + ixgbe_set_rx_mode(netdev); +#endif +#ifdef NETIF_F_HW_VLAN_FILTER + else if (changed & (NETIF_F_HW_VLAN_RX | + NETIF_F_HW_VLAN_FILTER)) + ixgbe_set_rx_mode(netdev); +#endif + return 0; + +} +#endif /* HAVE_NDO_SET_FEATURES */ + +#ifdef HAVE_UDP_ENC_RX_OFFLOAD +/** + * ixgbe_add_udp_tunnel_port - Get notifications about adding UDP tunnel ports + * @dev: The port's netdev + * @ti: Tunnel endpoint information + **/ +static void ixgbe_add_udp_tunnel_port(struct net_device *dev, + struct udp_tunnel_info *ti) +{ + struct ixgbe_adapter *adapter = netdev_priv(dev); + struct ixgbe_hw *hw = &adapter->hw; + __be16 port = ti->port; + u32 port_shift = 0; + u32 reg; + + if (ti->sa_family != AF_INET) + return; + + switch (ti->type) { + case UDP_TUNNEL_TYPE_VXLAN: + if (!(adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE)) + return; + + if (adapter->vxlan_port == port) + return; + + if (adapter->vxlan_port) { + netdev_info(dev, + "VXLAN port %d set, not adding port %d\n", + ntohs(adapter->vxlan_port), + ntohs(port)); + return; + } + + adapter->vxlan_port = port; + break; + case UDP_TUNNEL_TYPE_GENEVE: + if (!(adapter->flags & IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE)) + return; + + if (adapter->geneve_port == port) + return; + + if (adapter->geneve_port) { + netdev_info(dev, + "GENEVE port %d set, not adding port %d\n", + ntohs(adapter->geneve_port), + ntohs(port)); + return; + } + + port_shift = IXGBE_VXLANCTRL_GENEVE_UDPPORT_SHIFT; + adapter->geneve_port = port; + break; + default: + return; + } + + reg = IXGBE_READ_REG(hw, IXGBE_VXLANCTRL) | ntohs(port) << port_shift; + IXGBE_WRITE_REG(hw, IXGBE_VXLANCTRL, reg); +} + +/** + * ixgbe_del_udp_tunnel_port - Get notifications about removing UDP tunnel ports + * @dev: The port's netdev + * @ti: Tunnel endpoint information + **/ +static void ixgbe_del_udp_tunnel_port(struct net_device *dev, + struct udp_tunnel_info *ti) +{ + struct ixgbe_adapter *adapter = netdev_priv(dev); + u32 port_mask; + + if (ti->type != UDP_TUNNEL_TYPE_VXLAN && + ti->type != UDP_TUNNEL_TYPE_GENEVE) + return; + + if (ti->sa_family != AF_INET) + return; + + switch (ti->type) { + case UDP_TUNNEL_TYPE_VXLAN: + if (!(adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE)) + return; + + if (adapter->vxlan_port != ti->port) { + netdev_info(dev, "VXLAN port %d not found\n", + ntohs(ti->port)); + return; + } + + port_mask = IXGBE_VXLANCTRL_VXLAN_UDPPORT_MASK; + break; + case UDP_TUNNEL_TYPE_GENEVE: + if (!(adapter->flags & IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE)) + return; + + if (adapter->geneve_port != ti->port) { + netdev_info(dev, "GENEVE port %d not found\n", + ntohs(ti->port)); + return; + } + + port_mask = IXGBE_VXLANCTRL_GENEVE_UDPPORT_MASK; + break; + default: + return; + } + + ixgbe_clear_udp_tunnel_port(adapter, port_mask); + adapter->flags2 |= IXGBE_FLAG2_UDP_TUN_REREG_NEEDED; +} + +#ifdef HAVE_UDP_TUNNEL_NIC_INFO +/** + * ixgbe_udp_tunnel_set - Configure UDP tunnel settings for the ixgbe device + * @dev: Network device structure pointer + * @table: Table index for the UDP tunnel entry + * @entry: Entry index within the table + * @ti: UDP tunnel information structure + * + * This function configures UDP tunnel settings for the ixgbe network adapter. + * It checks if the device supports only IPv4 tunnels and sets the address + * family accordingly. It then adds the specified UDP tunnel port to the device. + * + * Return: 0 on success. + */ +static int ixgbe_udp_tunnel_set(struct net_device *dev, + unsigned int table, unsigned int entry, + struct udp_tunnel_info *ti) +{ + const struct udp_tunnel_nic_info *tni = dev->udp_tunnel_nic_info; + + if (tni->flags & UDP_TUNNEL_NIC_INFO_IPV4_ONLY) + ti->sa_family = AF_INET; + + ixgbe_add_udp_tunnel_port(dev, ti); + return 0; +} + +/** + * ixgbe_udp_tunnel_unset - Remove UDP tunnel settings from the ixgbe device + * @dev: Network device structure pointer + * @table: Table index for the UDP tunnel entry + * @entry: Entry index within the table + * @ti: UDP tunnel information structure + * + * This function removes UDP tunnel settings from the ixgbe network adapter. + * It checks if the device supports only IPv4 tunnels and sets the address + * family accordingly. It then deletes the specified UDP tunnel port from the device. + * + * Return: 0 on success. + */ +static int ixgbe_udp_tunnel_unset(struct net_device *dev, + unsigned int table, unsigned int entry, + struct udp_tunnel_info *ti) +{ + const struct udp_tunnel_nic_info *tni = dev->udp_tunnel_nic_info; + + if (tni->flags & UDP_TUNNEL_NIC_INFO_IPV4_ONLY) + ti->sa_family = AF_INET; + + ixgbe_del_udp_tunnel_port(dev, ti); + + return 0; +} + +static const struct udp_tunnel_nic_info ixgbe_udp_tunnels_x550 = { + .set_port = ixgbe_udp_tunnel_set, + .unset_port = ixgbe_udp_tunnel_unset, + .flags = UDP_TUNNEL_NIC_INFO_IPV4_ONLY, + .tables = { + { .n_entries = 1, .tunnel_types = UDP_TUNNEL_TYPE_VXLAN, }, + { .n_entries = 1, .tunnel_types = UDP_TUNNEL_TYPE_GENEVE, }, + }, +}; +#endif +#elif defined(HAVE_VXLAN_RX_OFFLOAD) +/** + * ixgbe_add_vxlan_port - Get notifications about VXLAN ports that come up + * @dev: The port's netdev + * @sa_family: Socket Family that VXLAN is notifiying us about + * @port: New UDP port number that VXLAN started listening to + */ +static void ixgbe_add_vxlan_port(struct net_device *dev, sa_family_t sa_family, + __be16 port) +{ + struct ixgbe_adapter *adapter = netdev_priv(dev); + struct ixgbe_hw *hw = &adapter->hw; + + if (sa_family != AF_INET) + return; + + if (!(adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_ENABLE)) + return; + + if (adapter->vxlan_port == port) + return; + + if (adapter->vxlan_port) { + netdev_info(dev, + "Hit Max num of VXLAN ports, not adding port %d\n", + ntohs(port)); + return; + } + + adapter->vxlan_port = port; + IXGBE_WRITE_REG(hw, IXGBE_VXLANCTRL, ntohs(port)); +} + +/** + * ixgbe_del_vxlan_port - Get notifications about VXLAN ports that go away + * @dev: The port's netdev + * @sa_family: Socket Family that VXLAN is notifying us about + * @port: UDP port number that VXLAN stopped listening to + */ +static void ixgbe_del_vxlan_port(struct net_device *dev, sa_family_t sa_family, + __be16 port) +{ + struct ixgbe_adapter *adapter = netdev_priv(dev); + + if (!(adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_ENABLE)) + return; + + if (sa_family != AF_INET) + return; + + if (adapter->vxlan_port != port) { + netdev_info(dev, "Port %d was not found, not deleting\n", + ntohs(port)); + return; + } + + ixgbe_clear_udp_tunnel_port(adapter, IXGBE_VXLANCTRL_ALL_UDPPORT_MASK); + adapter->flags2 |= IXGBE_FLAG2_UDP_TUN_REREG_NEEDED; +} +#endif /* HAVE_VXLAN_RX_OFFLOAD */ + +#ifdef HAVE_NDO_GSO_CHECK +/** + * ixgbe_gso_check - Check if a packet is suitable for GSO + * @skb: Socket buffer containing the packet + * @dev: Network device structure (unused) + * + * This function checks if the given packet is suitable for Generic Segmentation + * Offload (GSO) by delegating the check to `vxlan_gso_check`. It determines + * whether the packet can be offloaded based on its characteristics. + * + * Return: true if the packet is suitable for GSO, false otherwise. + */ +static bool +ixgbe_gso_check(struct sk_buff *skb, __always_unused struct net_device *dev) +{ + return vxlan_gso_check(skb); +} +#endif /* HAVE_NDO_GSO_CHECK */ + +#ifdef HAVE_FDB_OPS +/** + * ixgbe_ndo_fdb_add - Add a forwarding database (FDB) entry + * @ndm: Netlink message structure + * @tb: Netlink attributes + * @dev: Network device structure + * @addr: MAC address to add to the FDB + * @vid: (Optional) VLAN ID + * @flags: Flags for the operation + * @notified: (Optional) Pointer to a boolean indicating if a notification was sent + * @extack: (Optional) Netlink extended acknowledgment structure + * + * This function adds an entry to the forwarding database (FDB) for the specified + * network device. It ensures that a unique filter can be provided for unicast + * and link-local addresses by checking the available resources. The function + * supports additional parameters based on kernel capabilities. + * + * Return: 0 on success, or -ENOMEM if there are insufficient resources. + */ +static int +ixgbe_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[], + struct net_device *dev, const unsigned char *addr, +#ifdef HAVE_NDO_FDB_ADD_VID + u16 vid, +#endif + u16 flags +#ifdef HAVE_NDO_FDB_ADD_NOTIFIED + , bool *notified +#endif +#ifdef HAVE_NDO_FDB_ADD_EXTACK + , struct netlink_ext_ack __always_unused *extack +#endif +) +{ + /* guarantee we can provide a unique filter for the unicast address */ + if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) { + struct ixgbe_adapter *adapter = netdev_priv(dev); + u16 pool = VMDQ_P(0); + + if (netdev_uc_count(dev) >= ixgbe_available_rars(adapter, pool)) + return -ENOMEM; + } + + return ndo_dflt_fdb_add(ndm, tb, dev, addr, +#ifdef HAVE_NDO_FDB_ADD_VID + vid, +#endif + flags); +} + +/** + * ixgbe_ndo_bridge_setlink - Set bridge link attributes for the network device + * @dev: Network device structure + * @nlh: Netlink message header + * @flags: (Optional) Flags for the operation + * @ext: (Optional) Netlink extended acknowledgment structure + * + * This function sets bridge link attributes for the specified network device. + * It processes netlink attributes to configure the bridge mode, supporting + * both VEPA and VEB modes. The function updates the adapter's configuration + * and reconfigures settings related to the bridge mode. It only operates if + * SR-IOV is enabled. + * + * Return: 0 on success, -EOPNOTSUPP if SR-IOV is not enabled, or -EINVAL if + * an invalid mode is specified. + */ +#ifdef HAVE_BRIDGE_ATTRIBS +#ifdef HAVE_NDO_BRIDGE_SETLINK_EXTACK +static int ixgbe_ndo_bridge_setlink(struct net_device *dev, + struct nlmsghdr *nlh, + __always_unused u16 flags, + struct netlink_ext_ack __always_unused *ext) +#elif defined(HAVE_NDO_BRIDGE_SET_DEL_LINK_FLAGS) +static int ixgbe_ndo_bridge_setlink(struct net_device *dev, + struct nlmsghdr *nlh, + __always_unused u16 flags) +#else +static int ixgbe_ndo_bridge_setlink(struct net_device *dev, + struct nlmsghdr *nlh) +#endif /* HAVE_NDO_BRIDGE_SETLINK_EXTACK */ +{ + struct ixgbe_adapter *adapter = netdev_priv(dev); + struct nlattr *attr, *br_spec; + int rem; + + if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)) + return -EOPNOTSUPP; + + br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC); + + nla_for_each_nested(attr, br_spec, rem) { + __u16 mode; + + if (nla_type(attr) != IFLA_BRIDGE_MODE) + continue; + + mode = nla_get_u16(attr); + if (mode == BRIDGE_MODE_VEPA) { + adapter->flags |= IXGBE_FLAG_SRIOV_VEPA_BRIDGE_MODE; + } else if (mode == BRIDGE_MODE_VEB) { + adapter->flags &= ~IXGBE_FLAG_SRIOV_VEPA_BRIDGE_MODE; + } else { + return -EINVAL; + } + + adapter->bridge_mode = mode; + + /* re-configure settings related to bridge mode */ + ixgbe_configure_bridge_mode(adapter); + + e_info(drv, "enabling bridge mode: %s\n", + mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB"); + } + + return 0; +} + +/** + * ixgbe_ndo_bridge_getlink - Get bridge link information for the network device + * @skb: Socket buffer for the netlink message + * @pid: Netlink PID + * @seq: Netlink sequence number + * @dev: Network device structure + * @filter_mask: (Optional) Filter mask for bridge attributes + * @nlflags: (Optional) Netlink flags + * + * This function retrieves bridge link information for the specified network + * device. It checks if SR-IOV is enabled and uses the default bridge getlink + * handler to populate the netlink message with the bridge mode and other + * attributes. The function supports different parameter configurations based + * on kernel capabilities. + * + * Return: 0 on success, or a negative error code on failure. + */ +#ifdef HAVE_NDO_BRIDGE_GETLINK_NLFLAGS +static int ixgbe_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq, + struct net_device *dev, + u32 __maybe_unused filter_mask, + int nlflags) +#elif defined(HAVE_BRIDGE_FILTER) +static int ixgbe_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq, + struct net_device *dev, + u32 __always_unused filter_mask) +#else +static int ixgbe_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq, + struct net_device *dev) +#endif /* HAVE_NDO_BRIDGE_GETLINK_NLFLAGS */ +{ + struct ixgbe_adapter *adapter = netdev_priv(dev); + u16 mode; + + if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)) + return 0; + + mode = adapter->bridge_mode; +#ifdef HAVE_NDO_DFLT_BRIDGE_GETLINK_VLAN_SUPPORT + return ndo_dflt_bridge_getlink(skb, pid, seq, dev, mode, 0, 0, nlflags, + filter_mask, NULL); +#elif defined(HAVE_NDO_BRIDGE_GETLINK_NLFLAGS) + return ndo_dflt_bridge_getlink(skb, pid, seq, dev, mode, 0, 0, nlflags); +#elif defined(HAVE_NDO_FDB_ADD_VID) || \ + defined NDO_DFLT_BRIDGE_GETLINK_HAS_BRFLAGS + return ndo_dflt_bridge_getlink(skb, pid, seq, dev, mode, 0, 0); +#else + return ndo_dflt_bridge_getlink(skb, pid, seq, dev, mode); +#endif /* HAVE_NDO_BRIDGE_GETLINK_NLFLAGS */ +} +#endif /* HAVE_BRIDGE_ATTRIBS */ +#endif /* HAVE_FDB_OPS */ + +#ifdef HAVE_NDO_FEATURES_CHECK +/** + * ixgbe_features_check - Validate features for a given packet + * @skb: Socket buffer containing the packet + * @dev: Network device structure + * @features: Current set of features to validate + * + * This function checks if the given packet's headers can be supported by the + * network device's features. It ensures that the MAC and network header lengths + * are within the limits that can be described by a context descriptor. It also + * checks encapsulated packets and adjusts the features accordingly, especially + * for TSO and checksum offload capabilities. + * + * Return: The validated set of features that can be supported for the packet. + */ +#define IXGBE_MAX_TUNNEL_HDR_LEN 80 +#ifdef NETIF_F_GSO_PARTIAL +#define IXGBE_MAX_MAC_HDR_LEN 127 +#define IXGBE_MAX_NETWORK_HDR_LEN 511 + +static netdev_features_t +ixgbe_features_check(struct sk_buff *skb, struct net_device *dev, + netdev_features_t features) +{ + unsigned int network_hdr_len, mac_hdr_len; + + /* Make certain the headers can be described by a context descriptor */ + mac_hdr_len = skb_network_header(skb) - skb->data; + if (unlikely(mac_hdr_len > IXGBE_MAX_MAC_HDR_LEN)) + return features & ~(NETIF_F_HW_CSUM | + NETIF_F_SCTP_CRC | + NETIF_F_HW_VLAN_CTAG_TX | + NETIF_F_TSO | + NETIF_F_TSO6); + + network_hdr_len = skb_checksum_start(skb) - skb_network_header(skb); + if (unlikely(network_hdr_len > IXGBE_MAX_NETWORK_HDR_LEN)) + return features & ~(NETIF_F_HW_CSUM | + NETIF_F_SCTP_CRC | + NETIF_F_TSO | + NETIF_F_TSO6); + + /* We can only support IPV4 TSO in tunnels if we can mangle the + * inner IP ID field, so strip TSO if MANGLEID is not supported. + */ + if (skb->encapsulation && !(features & NETIF_F_TSO_MANGLEID)) + features &= ~NETIF_F_TSO; + + return features; +} +#else +static netdev_features_t +ixgbe_features_check(struct sk_buff *skb, struct net_device *dev, + netdev_features_t features) +{ + if (!skb->encapsulation) + return features; + + if (unlikely(skb_inner_mac_header(skb) - skb_transport_header(skb) > + IXGBE_MAX_TUNNEL_HDR_LEN)) + return features & ~NETIF_F_CSUM_MASK; + + return features; +} +#endif /* NETIF_F_GSO_PARTIAL */ +#endif /* HAVE_NDO_FEATURES_CHECK */ + +void ixgbe_xdp_ring_update_tail(struct ixgbe_ring *ring) +{ + /* Force memory writes to complete before letting h/w know there + * are new descriptors to fetch. + */ + wmb(); + writel(ring->next_to_use, ring->tail); +} + +void ixgbe_xdp_ring_update_tail_locked(struct ixgbe_ring *ring) +{ + if (static_branch_unlikely(&ixgbe_xdp_locking_key)) + spin_lock(&ring->tx_lock); + ixgbe_xdp_ring_update_tail(ring); + if (static_branch_unlikely(&ixgbe_xdp_locking_key)) + spin_unlock(&ring->tx_lock); +} + +#ifdef HAVE_XDP_SUPPORT +static int ixgbe_xdp_setup(struct net_device *dev, struct bpf_prog *prog) +{ + int i, frame_size = dev->mtu + IXGBE_PKT_HDR_PAD; + struct ixgbe_adapter *adapter = netdev_priv(dev); + struct bpf_prog *old_prog; + bool need_reset; + + if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) + return -EINVAL; + + /* verify ixgbe ring attributes are sufficient for XDP */ + for (i = 0; i < adapter->num_rx_queues; i++) { + struct ixgbe_ring *ring = adapter->rx_ring[i]; + + if (ring_is_rsc_enabled(ring)) + return -EINVAL; + + if (frame_size > ixgbe_rx_bufsz(ring)) + return -EINVAL; + } + + old_prog = xchg(&adapter->xdp_prog, prog); + need_reset = (!!prog != !!old_prog); + + /* If transitioning XDP modes reconfigure rings */ + if (need_reset) { + int err = ixgbe_setup_tc(dev, netdev_get_num_tc(dev)); + + if (err) { + rcu_assign_pointer(adapter->xdp_prog, old_prog); + return -EINVAL; + } + if (!prog) + xdp_features_clear_redirect_target(dev); + } else { + for (i = 0; i < adapter->num_rx_queues; i++) + xchg(&adapter->rx_ring[i]->xdp_prog, adapter->xdp_prog); + } + + if (old_prog) + bpf_prog_put(old_prog); + + if (need_reset && prog) { +#ifdef HAVE_AF_XDP_ZC_SUPPORT + /* Kick start the NAPI context if there is an AF_XDP socket open + * on that queue id. This so that receiving will start. + */ + for (i = 0; i < adapter->num_rx_queues; i++) + if (adapter->xdp_ring[i]->xsk_pool) +#ifdef HAVE_NDO_XSK_WAKEUP + (void)ixgbe_xsk_wakeup(adapter->netdev, i, + XDP_WAKEUP_RX); +#else + (void)ixgbe_xsk_async_xmit(adapter->netdev, i); +#endif +#endif + xdp_features_set_redirect_target(dev, true); + } + + return 0; +} + +/** + * ixgbe_xdp - Handle XDP (eXpress Data Path) operations for the ixgbe device + * @dev: Network device structure pointer + * @xdp: XDP or netdev_bpf structure containing XDP command and data + * + * This function processes XDP-related commands for the ixgbe network adapter. + * It supports setting up XDP programs, querying attached XDP programs, and + * configuring AF_XDP zero-copy socket pools. The function handles different + * commands based on the `xdp->command` field and performs the appropriate + * setup or query operation. + * + * Return: 0 on success, or a negative error code on failure. + */ +#ifdef HAVE_NDO_BPF +static int ixgbe_xdp(struct net_device *dev, struct netdev_bpf *xdp) +#else +static int ixgbe_xdp(struct net_device *dev, struct netdev_xdp *xdp) +#endif +{ +#if defined(HAVE_XDP_QUERY_PROG) || defined(HAVE_AF_XDP_ZC_SUPPORT) + struct ixgbe_adapter *adapter = netdev_priv(dev); +#endif + + switch (xdp->command) { + case XDP_SETUP_PROG: + return ixgbe_xdp_setup(dev, xdp->prog); +#ifdef HAVE_XDP_QUERY_PROG + case XDP_QUERY_PROG: +#ifndef NO_NETDEV_BPF_PROG_ATTACHED + xdp->prog_attached = !!(adapter->xdp_prog); +#endif /* !NO_NETDEV_BPF_PROG_ATTACHED */ + xdp->prog_id = adapter->xdp_prog ? + adapter->xdp_prog->aux->id : 0; + return 0; +#endif +#ifdef HAVE_AF_XDP_ZC_SUPPORT + case XDP_SETUP_XSK_POOL: +#ifndef HAVE_NETDEV_BPF_XSK_POOL + return ixgbe_xsk_umem_setup(adapter, xdp->xsk.umem, + xdp->xsk.queue_id); +#else + return ixgbe_xsk_umem_setup(adapter, xdp->xsk.pool, + xdp->xsk.queue_id); +#endif /* HAVE_NETDEV_BPF_XSK_POOL */ +#endif /* HAVE_AF_XDP_ZC_SUPPORT */ + default: + return -EINVAL; + } +} + +/** + * ixgbe_xdp_xmit - Transmit XDP frames on the ixgbe device + * @dev: Network device structure pointer + * @n: Number of XDP frames to transmit (used if + * HAVE_NDO_XDP_XMIT_BULK_AND_FLAGS is defined) + * @frames: Array of XDP frame pointers (used if + * HAVE_NDO_XDP_XMIT_BULK_AND_FLAGS is defined) + * @flags: Transmission flags (used if + * HAVE_NDO_XDP_XMIT_BULK_AND_FLAGS is defined) + * @xdp: XDP buffer to transmit (used if + * HAVE_NDO_XDP_XMIT_BULK_AND_FLAGS is not defined) + * + * This function handles the transmission of XDP (eXpress Data Path) frames + * for the ixgbe network adapter. It supports both bulk transmission with + * flags and single frame transmission, depending on the configuration. The + * function checks the device state and ring configuration before attempting + * to transmit frames. It also manages locking and updates the ring tail as + * needed. + * + * Return: Number of frames successfully transmitted, or a negative error + * code on failure. + */ +#ifdef HAVE_NDO_XDP_XMIT_BULK_AND_FLAGS +static int ixgbe_xdp_xmit(struct net_device *dev, int n, + struct xdp_frame **frames, u32 flags) +#else +static int ixgbe_xdp_xmit(struct net_device *dev, struct xdp_buff *xdp) +#endif +{ + struct ixgbe_adapter *adapter = netdev_priv(dev); + struct ixgbe_ring *ring; +#ifdef HAVE_NDO_XDP_XMIT_BULK_AND_FLAGS + int drops = 0; + int i; +#else + int err; +#endif + + if (unlikely(test_bit(__IXGBE_DOWN, adapter->state))) + return -ENETDOWN; + +#ifdef HAVE_NDO_XDP_XMIT_BULK_AND_FLAGS + if (unlikely(flags & ~XDP_XMIT_FLAGS_MASK)) + return -EINVAL; +#endif + + /* During program transitions its possible adapter->xdp_prog is assigned + * but ring has not been configured yet. In this case simply abort xmit. + */ + ring = adapter->xdp_prog ? ixgbe_determine_xdp_ring(adapter) : NULL; + if (unlikely(!ring)) + return -ENXIO; + +#ifdef HAVE_AF_XDP_ZC_SUPPORT + if (unlikely(test_bit(__IXGBE_TX_DISABLED, &ring->state))) + return -ENXIO; +#endif + +#ifdef HAVE_NDO_XDP_XMIT_BULK_AND_FLAGS + if (static_branch_unlikely(&ixgbe_xdp_locking_key)) + spin_lock(&ring->tx_lock); + + for (i = 0; i < n; i++) { + struct xdp_frame *xdpf = frames[i]; + int err; + + err = ixgbe_xmit_xdp_ring(ring, xdpf); + if (err != IXGBE_XDP_TX) { + xdp_return_frame_rx_napi(xdpf); + drops++; + } + } + + if (unlikely(flags & XDP_XMIT_FLUSH)) + ixgbe_xdp_ring_update_tail(ring); + + if (static_branch_unlikely(&ixgbe_xdp_locking_key)) + spin_unlock(&ring->tx_lock); + + return n - drops; +#else /* HAVE_NDO_XDP_XMIT_BULK_AND_FLAGS */ + if (static_branch_unlikely(&ixgbe_xdp_locking_key)) + spin_lock(&ring->tx_lock); + err = ixgbe_xmit_xdp_ring(ring, xdp); + if (static_branch_unlikely(&ixgbe_xdp_locking_key)) + spin_unlock(&ring->tx_lock); + + if (err != IXGBE_XDP_TX) + return -ENOSPC; + + return 0; +#endif /* HAVE_NDO_XDP_XMIT_BULK_AND_FLAGS */ +} + +#ifndef NO_NDO_XDP_FLUSH +/** + * ixgbe_xdp_flush - Flush XDP transmit operations for the ixgbe device + * @dev: Network device structure pointer + * + * This function flushes pending XDP (eXpress Data Path) transmit operations + * for the ixgbe network adapter. It ensures that the device is still up + * before proceeding and updates the tail of the XDP ring to complete + * transmission. This is necessary to ensure that all XDP packets are + * properly transmitted before the function returns. + * + * Note: The function checks if the device is down and exits early if so. + */ +static void ixgbe_xdp_flush(struct net_device *dev) +{ + struct ixgbe_adapter *adapter = netdev_priv(dev); + struct ixgbe_ring *ring; + + /* Its possible the device went down between xdp xmit and flush so + * we need to ensure device is still up. + */ + if (unlikely(test_bit(__IXGBE_DOWN, adapter->state))) + return; + + ring = adapter->xdp_prog ? adapter->xdp_ring[smp_processor_id()] : NULL; + if (unlikely(!ring)) + return; + + ixgbe_xdp_ring_update_tail(ring); + + return; +} +#endif /* !NO_NDO_XDP_FLUSH */ +#endif /* HAVE_XDP_SUPPORT */ +#ifdef HAVE_NET_DEVICE_OPS +static const struct net_device_ops ixgbe_netdev_ops = { + .ndo_open = ixgbe_open, + .ndo_stop = ixgbe_close, + .ndo_start_xmit = ixgbe_xmit_frame, +#ifdef HAVE_NETDEV_SELECT_QUEUE +#if IS_ENABLED(CONFIG_FCOE) + .ndo_select_queue = ixgbe_select_queue, +#else +#ifndef HAVE_MQPRIO + .ndo_select_queue = __netdev_pick_tx, +#endif +#endif /* CONFIG_FCOE */ +#endif /* HAVE_NETDEV_SELECT_QUEUE */ + .ndo_set_rx_mode = ixgbe_set_rx_mode, + .ndo_validate_addr = eth_validate_addr, + .ndo_set_mac_address = ixgbe_set_mac, +#ifdef HAVE_RHEL7_EXTENDED_MIN_MAX_MTU + .extended.ndo_change_mtu = ixgbe_change_mtu, +#else + .ndo_change_mtu = ixgbe_change_mtu, +#endif + .ndo_tx_timeout = ixgbe_tx_timeout, +#if defined(NETIF_F_HW_VLAN_TX) || defined(NETIF_F_HW_VLAN_CTAG_TX) + .ndo_vlan_rx_add_vid = ixgbe_vlan_rx_add_vid, + .ndo_vlan_rx_kill_vid = ixgbe_vlan_rx_kill_vid, +#endif +#ifdef HAVE_NDO_ETH_IOCTL + .ndo_eth_ioctl = ixgbe_ioctl, +#else + .ndo_do_ioctl = ixgbe_ioctl, +#endif /* HAVE_NDO_ETH_IOCTL */ +#ifdef HAVE_RHEL7_NET_DEVICE_OPS_EXT +/* RHEL7 requires this to be defined to enable extended ops. RHEL7 uses the + * function get_ndo_ext to retrieve offsets for extended fields from with the + * net_device_ops struct and ndo_size is checked to determine whether or not + * the offset is valid. + */ + .ndo_size = sizeof(const struct net_device_ops), +#endif +#ifdef IFLA_VF_MAX + .ndo_set_vf_mac = ixgbe_ndo_set_vf_mac, +#ifdef HAVE_RHEL7_NETDEV_OPS_EXT_NDO_SET_VF_VLAN + .extended.ndo_set_vf_vlan = ixgbe_ndo_set_vf_vlan, +#else + .ndo_set_vf_vlan = ixgbe_ndo_set_vf_vlan, +#endif +#ifdef HAVE_NDO_SET_VF_MIN_MAX_TX_RATE + .ndo_set_vf_rate = ixgbe_ndo_set_vf_bw, +#else + .ndo_set_vf_tx_rate = ixgbe_ndo_set_vf_bw, +#endif /* HAVE_NDO_SET_VF_MIN_MAX_TX_RATE */ +#if defined(HAVE_VF_SPOOFCHK_CONFIGURE) && IS_ENABLED(CONFIG_PCI_IOV) + .ndo_set_vf_spoofchk = ixgbe_ndo_set_vf_spoofchk, +#endif +#ifdef HAVE_NDO_SET_VF_LINK_STATE + .ndo_set_vf_link_state = ixgbe_ndo_set_vf_link_state, +#endif +#ifdef HAVE_NDO_SET_VF_RSS_QUERY_EN + .ndo_set_vf_rss_query_en = ixgbe_ndo_set_vf_rss_query_en, +#endif +#ifdef HAVE_NDO_SET_VF_TRUST +#ifdef HAVE_RHEL7_NET_DEVICE_OPS_EXT + .extended.ndo_set_vf_trust = ixgbe_ndo_set_vf_trust, +#else + .ndo_set_vf_trust = ixgbe_ndo_set_vf_trust, +#endif /* HAVE_RHEL7_NET_DEVICE_OPS_EXT */ +#endif /* HAVE_NDO_SET_VF_TRUST */ + .ndo_get_vf_config = ixgbe_ndo_get_vf_config, +#endif /* IFLA_VF_MAX */ +#ifdef HAVE_VF_STATS + .ndo_get_vf_stats = ixgbe_ndo_get_vf_stats, +#endif /* HAVE_VF_STATS */ +#ifdef HAVE_NDO_GET_STATS64 + .ndo_get_stats64 = ixgbe_get_stats64, +#else + .ndo_get_stats = ixgbe_get_stats, +#endif /* HAVE_NDO_GET_STATS64 */ +#ifdef HAVE_SETUP_TC +#ifdef HAVE_RHEL7_NETDEV_OPS_EXT_NDO_SETUP_TC + .extended.ndo_setup_tc_rh = __ixgbe_setup_tc, +#else +#ifdef NETIF_F_HW_TC + .ndo_setup_tc = __ixgbe_setup_tc, +#else + .ndo_setup_tc = ixgbe_setup_tc, +#endif /* NETIF_F_HW_TC */ +#endif /* HAVE_RHEL7_NETDEV_OPS_EXT_NDO_SETUP_TC */ +#endif /* HAVE_SETUP_TC */ +#ifdef CONFIG_NET_POLL_CONTROLLER + .ndo_poll_controller = ixgbe_netpoll, +#endif +#ifndef HAVE_RHEL6_NET_DEVICE_EXTENDED +#ifdef HAVE_NDO_BUSY_POLL + .ndo_busy_poll = ixgbe_busy_poll_recv, +#endif /* HAVE_NDO_BUSY_POLL */ +#endif /* !HAVE_RHEL6_NET_DEVICE_EXTENDED */ +#if IS_ENABLED(CONFIG_FCOE) + .ndo_fcoe_ddp_setup = ixgbe_fcoe_ddp_get, +#ifdef HAVE_NETDEV_OPS_FCOE_DDP_TARGET + .ndo_fcoe_ddp_target = ixgbe_fcoe_ddp_target, +#endif + .ndo_fcoe_ddp_done = ixgbe_fcoe_ddp_put, +#ifdef HAVE_NETDEV_OPS_FCOE_ENABLE + .ndo_fcoe_enable = ixgbe_fcoe_enable, + .ndo_fcoe_disable = ixgbe_fcoe_disable, +#endif +#ifdef HAVE_NETDEV_OPS_FCOE_GETWWN + .ndo_fcoe_get_wwn = ixgbe_fcoe_get_wwn, +#endif +#endif /* CONFIG_FCOE */ +#ifdef HAVE_VLAN_RX_REGISTER + .ndo_vlan_rx_register = &ixgbe_vlan_mode, +#endif +#ifdef HAVE_FDB_OPS + .ndo_fdb_add = ixgbe_ndo_fdb_add, +#ifndef USE_DEFAULT_FDB_DEL_DUMP + .ndo_fdb_del = ndo_dflt_fdb_del, + .ndo_fdb_dump = ndo_dflt_fdb_dump, +#endif +#ifdef HAVE_BRIDGE_ATTRIBS + .ndo_bridge_setlink = ixgbe_ndo_bridge_setlink, + .ndo_bridge_getlink = ixgbe_ndo_bridge_getlink, +#endif /* HAVE_BRIDGE_ATTRIBS */ +#endif +#ifdef HAVE_UDP_ENC_RX_OFFLOAD +#ifdef HAVE_RHEL7_NETDEV_OPS_EXT_NDO_UDP_TUNNEL + .extended.ndo_udp_tunnel_add = ixgbe_add_udp_tunnel_port, + .extended.ndo_udp_tunnel_del = ixgbe_del_udp_tunnel_port, +#else +#ifndef HAVE_UDP_TUNNEL_NIC_INFO + .ndo_udp_tunnel_add = ixgbe_add_udp_tunnel_port, + .ndo_udp_tunnel_del = ixgbe_del_udp_tunnel_port, +#endif +#endif +#elif defined(HAVE_VXLAN_RX_OFFLOAD) + .ndo_add_vxlan_port = ixgbe_add_vxlan_port, + .ndo_del_vxlan_port = ixgbe_del_vxlan_port, +#endif /* HAVE_UDP_ENC_RX_OFFLOAD */ +#ifdef HAVE_NDO_GSO_CHECK + .ndo_gso_check = ixgbe_gso_check, +#endif /* HAVE_NDO_GSO_CHECK */ +#ifdef HAVE_NDO_FEATURES_CHECK + .ndo_features_check = ixgbe_features_check, +#endif /* HAVE_NDO_FEATURES_CHECK */ +#ifdef HAVE_XDP_SUPPORT +#ifdef HAVE_NDO_BPF + .ndo_bpf = ixgbe_xdp, +#else + .ndo_xdp = ixgbe_xdp, +#endif + .ndo_xdp_xmit = ixgbe_xdp_xmit, +#ifdef HAVE_AF_XDP_ZC_SUPPORT +#ifdef HAVE_NDO_XSK_WAKEUP + .ndo_xsk_wakeup = ixgbe_xsk_wakeup, +#else + .ndo_xsk_async_xmit = ixgbe_xsk_async_xmit, +#endif +#endif +#ifndef NO_NDO_XDP_FLUSH + .ndo_xdp_flush = ixgbe_xdp_flush, +#endif /* !NO_NDO_XDP_FLUSH */ +#endif +#ifdef HAVE_RHEL6_NET_DEVICE_OPS_EXT +}; + +/* RHEL6 keeps these operations in a separate structure */ +static const struct net_device_ops_ext ixgbe_netdev_ops_ext = { + .size = sizeof(struct net_device_ops_ext), +#endif /* HAVE_RHEL6_NET_DEVICE_OPS_EXT */ +#ifdef HAVE_NDO_SET_FEATURES + .ndo_set_features = ixgbe_set_features, + .ndo_fix_features = ixgbe_fix_features, +#endif /* HAVE_NDO_SET_FEATURES */ +}; +#endif /* HAVE_NET_DEVICE_OPS */ + +void ixgbe_assign_netdev_ops(struct net_device *dev) +{ +#ifdef HAVE_NET_DEVICE_OPS + dev->netdev_ops = &ixgbe_netdev_ops; +#ifdef HAVE_RHEL6_NET_DEVICE_OPS_EXT + set_netdev_ops_ext(dev, &ixgbe_netdev_ops_ext); +#endif /* HAVE_RHEL6_NET_DEVICE_OPS_EXT */ +#else /* HAVE_NET_DEVICE_OPS */ + dev->open = &ixgbe_open; + dev->stop = &ixgbe_close; + dev->hard_start_xmit = &ixgbe_xmit_frame; + dev->get_stats = &ixgbe_get_stats; +#ifdef HAVE_SET_RX_MODE + dev->set_rx_mode = &ixgbe_set_rx_mode; +#endif + dev->set_multicast_list = &ixgbe_set_rx_mode; + dev->set_mac_address = &ixgbe_set_mac; + dev->change_mtu = &ixgbe_change_mtu; + dev->do_ioctl = &ixgbe_ioctl; +#ifdef HAVE_TX_TIMEOUT + dev->tx_timeout = &ixgbe_tx_timeout; +#endif +#if defined(NETIF_F_HW_VLAN_TX) || defined(NETIF_F_HW_VLAN_CTAG_TX) + dev->vlan_rx_register = &ixgbe_vlan_mode; + dev->vlan_rx_add_vid = &ixgbe_vlan_rx_add_vid; + dev->vlan_rx_kill_vid = &ixgbe_vlan_rx_kill_vid; +#endif +#ifdef CONFIG_NET_POLL_CONTROLLER + dev->poll_controller = &ixgbe_netpoll; +#endif +#ifdef HAVE_NETDEV_SELECT_QUEUE +#if IS_ENABLED(CONFIG_FCOE) + dev->select_queue = &ixgbe_select_queue; +#else + dev->select_queue = &__netdev_pick_tx; +#endif +#endif /* HAVE_NETDEV_SELECT_QUEUE */ +#endif /* HAVE_NET_DEVICE_OPS */ + +#ifdef HAVE_RHEL6_NET_DEVICE_EXTENDED +#ifdef HAVE_NDO_BUSY_POLL + netdev_extended(dev)->ndo_busy_poll = ixgbe_busy_poll_recv; +#endif /* HAVE_NDO_BUSY_POLL */ +#endif /* HAVE_RHEL6_NET_DEVICE_EXTENDED */ + + dev->watchdog_timeo = 5 * HZ; +} + +/** + * ixgbe_wol_supported - Check whether device supports WoL + * @adapter: the adapter private structure + * @device_id: the device ID + * @subdevice_id: the subsystem device ID + * + * This function is used by probe and ethtool to determine + * which devices have WoL support + * + **/ +bool ixgbe_wol_supported(struct ixgbe_adapter *adapter, u16 device_id, + u16 subdevice_id) +{ + struct ixgbe_hw *hw = &adapter->hw; + u16 wol_cap = adapter->eeprom_cap & IXGBE_DEVICE_CAPS_WOL_MASK; + + /* WOL not supported on 82598 */ + if (hw->mac.type == ixgbe_mac_82598EB) + return false; + + /* check eeprom to see if WOL is enabled for X540 and newer */ + if (hw->mac.type >= ixgbe_mac_X540) { + if ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0_1) || + ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0) && + (hw->bus.func == 0))) + return true; + } + + /* WOL is determined based on device IDs for 82599 MACs */ + switch (device_id) { + case IXGBE_DEV_ID_82599_SFP: + /* Only these subdevices could supports WOL */ + switch (subdevice_id) { + case IXGBE_SUBDEV_ID_82599_560FLR: + case IXGBE_SUBDEV_ID_82599_LOM_SNAP6: + case IXGBE_SUBDEV_ID_82599_SFP_WOL0: + case IXGBE_SUBDEV_ID_82599_SFP_2OCP: + /* only support first port */ + if (hw->bus.func != 0) + break; + fallthrough; + case IXGBE_SUBDEV_ID_82599_SP_560FLR: + case IXGBE_SUBDEV_ID_82599_SFP: + case IXGBE_SUBDEV_ID_82599_RNDC: + case IXGBE_SUBDEV_ID_82599_ECNA_DP: + case IXGBE_SUBDEV_ID_82599_SFP_1OCP: + case IXGBE_SUBDEV_ID_82599_SFP_LOM_OEM1: + case IXGBE_SUBDEV_ID_82599_SFP_LOM_OEM2: + return true; + } + break; + case IXGBE_DEV_ID_82599EN_SFP: + /* Only these subdevices support WoL */ + switch (subdevice_id) { + case IXGBE_SUBDEV_ID_82599EN_SFP_OCP1: + return true; + } + break; + case IXGBE_DEV_ID_82599_COMBO_BACKPLANE: + /* All except this subdevice support WOL */ + if (subdevice_id != IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ) + return true; + break; + case IXGBE_DEV_ID_82599_KX4: + return true; + default: + break; + } + + return false; +} +/** + * ixgbe_set_fw_version_E610 - Set FW version specifically on E610 adapters + * @adapter: the adapter private structure + * + * This function is used by probe and ethtool to determine the FW version to + * format to display. The FW version is taken from the EEPROM/NVM. + * + */ +static void ixgbe_set_fw_version_E610(struct ixgbe_adapter *adapter) +{ + struct ixgbe_orom_info *orom = &adapter->hw.flash.orom; + struct ixgbe_nvm_info *nvm = &adapter->hw.flash.nvm; + + snprintf(adapter->eeprom_id, sizeof(adapter->eeprom_id), + "%x.%02x 0x%x %d.%d.%d", nvm->major, nvm->minor, + nvm->eetrack, orom->major, orom->build, orom->patch); +} + +/** + * ixgbe_refresh_fw_version - Refresh the firmware version for the adapter + * @adapter: Pointer to the ixgbe adapter structure + * + * This function refreshes the firmware version information for the specified + * adapter. It initializes the NVM (Non-Volatile Memory) and updates the + * firmware version specifically for E610 hardware. + */ +int ixgbe_refresh_fw_version(struct ixgbe_adapter *adapter) +{ + struct ixgbe_hw *hw = &adapter->hw; + int err; + + err = ixgbe_init_nvm(hw); + if (err) + return err; + + ixgbe_set_fw_version_E610(adapter); + + return 0; +} + +/** + * ixgbe_set_fw_version - Set FW version + * @adapter: the adapter private structure + * + * This function is used by probe and ethtool to determine the FW version to + * format to display. The FW version is taken from the EEPROM/NVM. + * + **/ +static void ixgbe_set_fw_version(struct ixgbe_adapter *adapter) +{ + struct ixgbe_hw *hw = &adapter->hw; + u16 eeprom_verh = 0, eeprom_verl = 0; + u16 offset = 0; + u32 etrack_id; + + if (ixgbe_is_mac_E6xx(adapter->hw.mac.type)) { + ixgbe_set_fw_version_E610(adapter); + return; + } + /* Check for OEM Product Version block format */ + hw->eeprom.ops.read(hw, 0x1b, &offset); + + /* Make sure offset to OEM Product Version block is valid */ + if (!(offset == 0x0) && !(offset == 0xffff)) { + u16 mod_len = 0, cap = 0, prod_ver = 0, rel_num = 0; + u16 build, major, patch; + + /* Read product version block */ + hw->eeprom.ops.read(hw, offset, &mod_len); + hw->eeprom.ops.read(hw, offset + 0x1, &cap); + hw->eeprom.ops.read(hw, offset + 0x2, &prod_ver); + hw->eeprom.ops.read(hw, offset + 0x3, &rel_num); + + /* Only display OEM product version if valid block */ + if (mod_len == 0x3 && (cap & 0xf) == 0x0) { + major = prod_ver >> 8; + build = prod_ver & 0xff; + patch = rel_num; + + snprintf(adapter->eeprom_id, sizeof(adapter->eeprom_id), + "%x.%x.%x", major, build, patch); + return; + } + } + + /* + * Save off EEPROM version number and Option Rom version which + * together make a unique identify for the eeprom + */ + if (hw->eeprom.ops.read(hw, 0x2e, &eeprom_verh)) + eeprom_verh = NVM_VER_INVALID; + if (hw->eeprom.ops.read(hw, 0x2d, &eeprom_verl)) + eeprom_verl = NVM_VER_INVALID; + + /* The word order for the version format is determined by high order + * word bit 15. + */ + u32 lo = (eeprom_verh & NVM_ETK_VALID) ? eeprom_verl : eeprom_verh; + u32 hi = (eeprom_verh & NVM_ETK_VALID) ? eeprom_verh : eeprom_verl; + + /* Ensure LHS is u32 so shift occurs in unsigned 32-bit + * to avoid implicit u16 -> int promotion by compiler. + */ + etrack_id = (hi << NVM_ETK_SHIFT) | lo; + + /* Check for SCSI block version format */ + hw->eeprom.ops.read(hw, 0x17, &offset); + + /* Make sure offset to SCSI block is valid */ + if (!(offset == 0x0) && !(offset == 0xffff)) { + u16 eeprom_cfg_blkh = 0, eeprom_cfg_blkl = 0; + u16 build, major, patch; + + hw->eeprom.ops.read(hw, offset + 0x84, &eeprom_cfg_blkh); + hw->eeprom.ops.read(hw, offset + 0x83, &eeprom_cfg_blkl); + + /* Only display Option Rom if exist */ + if (eeprom_cfg_blkl && eeprom_cfg_blkh) { + major = eeprom_cfg_blkl >> 8; + /* Use u32 to avoid u16 -> int promotion in left shift */ + build = ((u32)eeprom_cfg_blkl << 8) | (eeprom_cfg_blkh >> 8); + patch = eeprom_cfg_blkh & 0x00ff; + + snprintf(adapter->eeprom_id, sizeof(adapter->eeprom_id), + "0x%08x, %d.%d.%d", etrack_id, major, build, + patch); + return; + } + } + + /* Set ETrack ID format */ + snprintf(adapter->eeprom_id, sizeof(adapter->eeprom_id), + "0x%08x", etrack_id); +} + +/** + * ixgbe_recovery_probe - handle FW recovery mode during probe + * @adapter: the adapter private structure + * + * Perform limited driver initialization when FW error is detected. + **/ +static int ixgbe_recovery_probe(struct ixgbe_adapter *adapter) +{ + bool disable_dev, devlink_registered = false; + struct net_device *netdev = adapter->netdev; + struct pci_dev *pdev = adapter->pdev; + struct ixgbe_hw *hw = &adapter->hw; + int err = -EIO; + + if (!ixgbe_is_mac_E6xx(hw->mac.type)) + goto clean_up_probe; + + ixgbe_init_aci(hw); + + err = ixgbe_init_nvm(&adapter->hw); + if (err) + goto shutdown_aci; + + timer_setup(&adapter->service_timer, ixgbe_service_timer, 0); + INIT_WORK(&adapter->service_task, ixgbe_recovery_service_task); + set_bit(__IXGBE_SERVICE_INITED, adapter->state); + clear_bit(__IXGBE_SERVICE_SCHED, adapter->state); + + if (hw->mac.ops.get_bus_info) + hw->mac.ops.get_bus_info(hw); + + pci_set_drvdata(pdev, adapter); + /* We are creating devlink interface so NIC can be managed, + * e.g. new NVM image loaded + */ + ixgbe_devlink_register_port(adapter); +#ifdef HAVE_SET_NETDEV_DEVLINK_PORT + SET_NETDEV_DEVLINK_PORT(adapter->netdev, + &adapter->devlink_port); +#else /* !HAVE_SET_NETDEV_DEVLINK_PORT */ + devlink_port_type_eth_set(&adapter->devlink_port, + adapter->netdev); +#endif /* HAVE_SET_NETDEV_DEVLINK_PORT */ + +#ifdef HAVE_PCI_ERS + /* + * call save state here in standalone driver because it relies on + * adapter struct to exist, and needs to call netdev_priv + */ + pci_save_state(pdev); + +#endif +#ifndef HAVE_DEVLINK_PARAMS_PUBLISH + /* for old kernels, prior to auto-publish of devlink params, + * API has required a call to devlink_register() prior to + * registering params. API has changed to be the other way + * around at the same moment that explicit param + * publishing was deprecated. + * Some older kernels have backported the removal of param publishing + * but not the reversing of register order. Because of that, we need + * to check if devlink->dev was properly allocated before registering + * params to avoid segfaults. + */ + if (!devlink_to_dev(adapter->devlink)) { + ixgbe_devlink_register(adapter); + devlink_registered = true; + } +#else /* HAVE_DEVLINK_PARAMS_PUBLISH */ + ixgbe_devlink_register(adapter); +#endif /* HAVE_DEVLINK_PARAMS_PUBLISH */ + err = ixgbe_devlink_register_params(adapter); + if (err) + goto unregister_devlink; + ixgbe_devlink_init_regions(adapter); + +#ifndef HAVE_DEVLINK_PARAMS_PUBLISH + if (!devlink_registered) { + ixgbe_devlink_register(adapter); + devlink_registered = true; + } +#endif /* !HAVE_DEVLINK_PARAMS_PUBLISH */ + + return 0; +unregister_devlink: + ixgbe_devlink_unregister_port(adapter); + if (devlink_registered) + ixgbe_devlink_unregister(adapter); +shutdown_aci: + ixgbe_shutdown_aci(&adapter->hw); + devlink_free(adapter->devlink); +clean_up_probe: + ixgbe_release_hw_control(adapter); + disable_dev = !test_and_set_bit(__IXGBE_DISABLED, adapter->state); + free_netdev(netdev); + pci_release_mem_regions(pdev); + if (disable_dev) + pci_disable_device(pdev); + return err; +} + +/** + * ixgbe_probe - Device Initialization Routine + * @pdev: PCI device information struct + * @ent: entry in ixgbe_pci_tbl + * + * Returns 0 on success, negative on failure + * + * ixgbe_probe initializes an adapter identified by a pci_dev structure. + * The OS initialization, configuring of the adapter private structure, + * and a hardware reset occur. + **/ +#ifdef HAVE_CONFIG_HOTPLUG +static int __devinit ixgbe_probe(struct pci_dev *pdev, + const struct pci_device_id __always_unused *ent) +#else +static int ixgbe_probe(struct pci_dev *pdev, + const struct pci_device_id __always_unused *ent) +#endif +{ + struct ixgbe_adapter *adapter = NULL; + struct net_device *netdev = NULL; + struct ixgbe_hw *hw = NULL; + static int cards_found; + int err, pci_using_dac; + char *info_string; + u8 part_str[IXGBE_PBANUM_LENGTH]; + enum ixgbe_mac_type mac_type = ixgbe_mac_unknown; +#ifdef HAVE_TX_MQ + unsigned int indices = MAX_TX_QUEUES; +#endif /* HAVE_TX_MQ */ + bool disable_dev = false; +#if IS_ENABLED(CONFIG_FCOE) + u16 device_caps; +#endif +#ifndef NETIF_F_GSO_PARTIAL +#ifdef HAVE_NDO_SET_FEATURES +#ifndef HAVE_RHEL6_NET_DEVICE_OPS_EXT + netdev_features_t hw_features; +#else + u32 hw_features; +#endif +#endif +#endif /* NETIF_F_GSO_PARTIAL */ + int i; + + err = pci_enable_device_mem(pdev); + if (err) + return err; + + if (!dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)) && + !dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64))) { + pci_using_dac = 1; + } else { + err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32)); + if (err) { + err = dma_set_coherent_mask(&pdev->dev, + DMA_BIT_MASK(32)); + if (err) { + dev_err(&pdev->dev, "No usable DMA " + "configuration, aborting\n"); + goto err_dma; + } + } + pci_using_dac = 0; + } + + err = pci_request_mem_regions(pdev, ixgbe_driver_name); + if (err) { + dev_err(&pdev->dev, + "pci_request_selected_regions failed 0x%x\n", err); + goto err_pci_reg; + } + + /* + * The mac_type is needed before we have the adapter is set up + * so rather than maintain two devID -> MAC tables we dummy up + * an ixgbe_hw stuct and use ixgbe_set_mac_type. + */ + hw = vmalloc(sizeof(struct ixgbe_hw)); + if (!hw) { + pr_info("Unable to allocate memory for early mac " + "check\n"); + } else { + hw->vendor_id = pdev->vendor; + hw->device_id = pdev->device; + ixgbe_set_mac_type(hw); + mac_type = hw->mac.type; + vfree(hw); + } + + /* + * Workaround of Silicon errata on 82598. Disable LOs in the PCI switch + * port to which the 82598 is connected to prevent duplicate + * completions caused by LOs. We need the mac type so that we only + * do this on 82598 devices, ixgbe_set_mac_type does this for us if + * we set it's device ID. + */ + if (mac_type == ixgbe_mac_82598EB) + pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S); + +#ifdef HAVE_PCI_ENABLE_PCIE_ERROR_REPORTING + pci_enable_pcie_error_reporting(pdev); +#endif /* HAVE_PCI_ENABLE_PCIE_ERROR_REPORTING */ + + pci_set_master(pdev); + +#ifdef HAVE_TX_MQ + if (mac_type == ixgbe_mac_82598EB) { +#if IS_ENABLED(CONFIG_DCB) + indices = IXGBE_MAX_DCB_INDICES * 4; +#else /* CONFIG_DCB */ + indices = IXGBE_MAX_RSS_INDICES; +#endif /* !CONFIG_DCB */ + } + + if (ixgbe_is_mac_E6xx(mac_type)) + indices = IXGBE_MAX_RSS_INDICES_E610; + + netdev = alloc_etherdev_mq(sizeof(struct ixgbe_adapter), indices); +#else /* HAVE_TX_MQ */ + netdev = alloc_etherdev(sizeof(struct ixgbe_adapter)); +#endif /* HAVE_TX_MQ */ + + if (!netdev) { + err = -ENOMEM; + goto err_alloc_etherdev; + } + + SET_MODULE_OWNER(netdev); + SET_NETDEV_DEV(netdev, &pdev->dev); + + adapter = netdev_priv(netdev); + +#ifdef HAVE_TX_MQ +#ifndef HAVE_NETDEV_SELECT_QUEUE + adapter->indices = indices; +#endif +#endif + adapter->netdev = netdev; + adapter->pdev = pdev; + hw = &adapter->hw; + hw->back = adapter; + adapter->msg_enable = (1 << DEFAULT_DEBUG_LEVEL_SHIFT) - 1; + + hw->hw_addr = ioremap(pci_resource_start(pdev, 0), + pci_resource_len(pdev, 0)); + adapter->io_addr = hw->hw_addr; + if (!hw->hw_addr) { + err = -EIO; + goto err_ioremap; + } + if (ixgbe_is_mac_E6xx(mac_type)) { + struct ixgbe_adapter **padapter = NULL; + + padapter = ixgbe_allocate_devlink(adapter); + if (!padapter) { + err = -ENOMEM; + goto err_alloc_devlink; + } + } + + ixgbe_assign_netdev_ops(netdev); + + strscpy(netdev->name, pci_name(pdev), sizeof(netdev->name)); + + adapter->bd_number = cards_found; + + ixgbe_get_hw_control(adapter); + /* setup the private structure */ + err = ixgbe_sw_init(adapter); + if (err) + goto err_sw_init; + + if (ixgbe_check_fw_error(adapter)) + return ixgbe_recovery_probe(adapter); + + if (ixgbe_is_mac_E6xx(mac_type)) { + u32 status; + + ixgbe_init_aci(hw); + + status = ixgbe_init_nvm(&adapter->hw); + if (status) + pr_err("ixgbe_init_nvm failed %d\n", status); + + status = ixgbe_get_caps(&adapter->hw); + if (status) + pr_err("ixgbe_get_caps failed %d\n", status); + + status = ixgbe_aci_get_fw_ver(hw); + if (status) + pr_err("ixgbe_aci_get_fw_ver failed %d\n", status); + } + + if (adapter->hw.mac.type == ixgbe_mac_82599EB) + adapter->flags2 |= IXGBE_FLAG2_AUTO_DISABLE_VF; + + if (ixgbe_is_mac_E6xx(adapter->hw.mac.type)) { + if (adapter->flags2 & IXGBE_FLAG2_FWLOG_CAPABLE) + ixgbe_fwlog_set_support_ena(hw); + + if (hw->fwlog_support_ena) { + if (ixgbe_pf_fwlog_init(adapter)) { + dev_err(&pdev->dev, "failed to initialize FW logging 0x%x\n", + err); + adapter->flags2 &= ~IXGBE_FLAG2_FWLOG_CAPABLE; + hw->fwlog_support_ena = false; + } + } + } + +#if defined(HAVE_UDP_ENC_RX_OFFLOAD) && defined(HAVE_UDP_TUNNEL_NIC_INFO) + switch (adapter->hw.mac.type) { + case ixgbe_mac_X550: + case ixgbe_mac_X550EM_a: + case ixgbe_mac_X550EM_x: + case ixgbe_mac_E610: + netdev->udp_tunnel_nic_info = &ixgbe_udp_tunnels_x550; + break; + default: + break; + } +#endif + /* Make sure the SWFW semaphore is in a valid state */ + if (hw->mac.ops.init_swfw_sync) + hw->mac.ops.init_swfw_sync(hw); + + /* Make it possible the adapter to be woken up via WOL */ + switch (adapter->hw.mac.type) { + case ixgbe_mac_82599EB: + case ixgbe_mac_X540: + case ixgbe_mac_X550: + case ixgbe_mac_X550EM_x: + case ixgbe_mac_X550EM_a: + case ixgbe_mac_E610: + IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0); + break; + default: + break; + } + + /* + * If we have a fan, this is as early we know, warn if we + * have had a failure. + */ + if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) { + u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP); + if (esdp & IXGBE_ESDP_SDP1) + e_crit(probe, "Fan has stopped, replace the adapter\n"); + } + + /* + * check_options must be called before setup_link to set up + * hw->fc completely + */ + ixgbe_check_options(adapter); + + /* reset_hw fills in the perm_addr as well */ + hw->phy.reset_if_overtemp = true; + err = hw->mac.ops.reset_hw(hw); + hw->phy.reset_if_overtemp = false; + if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) { + e_dev_err("failed to load because an unsupported SFP+ or QSFP " + "module type was detected.\n"); + e_dev_err("Reload the driver after installing a supported " + "module.\n"); + goto err_sw_init; + } else if (err && err != IXGBE_ERR_SFP_NOT_PRESENT) { + e_dev_err("HW Init failed: %d\n", err); + goto err_sw_init; + } + +#ifdef CONFIG_PCI_IOV +#if defined(HAVE_SRIOV_CONFIGURE) || defined(HAVE_RHEL6_SRIOV_CONFIGURE) + if (adapter->max_vfs > 0) { + e_dev_warn("Enabling SR-IOV VFs using the max_vfs module parameter is deprecated.\n"); + e_dev_warn("Please use the pci sysfs interface instead. Ex:\n"); + e_dev_warn("echo '%d' > /sys/bus/pci/devices/%04x:%02x:%02x.%1x/sriov_numvfs\n", + adapter->max_vfs, + pci_domain_nr(pdev->bus), + pdev->bus->number, + PCI_SLOT(pdev->devfn), + PCI_FUNC(pdev->devfn)); + } + +#endif + if (adapter->flags & IXGBE_FLAG_SRIOV_CAPABLE) { + pci_sriov_set_totalvfs(pdev, IXGBE_MAX_VFS_DRV_LIMIT); + ixgbe_enable_sriov(adapter); + } + +#endif /* CONFIG_PCI_IOV */ + +#ifdef NETIF_F_GSO_PARTIAL + /* keep |= here to avoid conflict with features set in param.c */ + netdev->features |= NETIF_F_SG | + NETIF_F_TSO | + NETIF_F_TSO6 | + NETIF_F_RXHASH | + NETIF_F_RXCSUM | + NETIF_F_HW_CSUM; + + netdev->gso_partial_features = IXGBE_GSO_PARTIAL_FEATURES; + netdev->features |= NETIF_F_GSO_PARTIAL | + IXGBE_GSO_PARTIAL_FEATURES; + + if (hw->mac.type >= ixgbe_mac_82599EB) + netdev->features |= NETIF_F_SCTP_CRC; + + /* copy netdev features into list of user selectable features */ + netdev->hw_features |= netdev->features | + NETIF_F_HW_VLAN_CTAG_FILTER | + NETIF_F_HW_VLAN_CTAG_RX | + NETIF_F_HW_VLAN_CTAG_TX | + NETIF_F_RXALL; + + if (hw->mac.type >= ixgbe_mac_82599EB) + netdev->hw_features |= NETIF_F_NTUPLE | + NETIF_F_HW_TC; + + if (pci_using_dac) + netdev->features |= NETIF_F_HIGHDMA; + + netdev->vlan_features |= netdev->features | NETIF_F_TSO_MANGLEID; + netdev->hw_enc_features |= netdev->vlan_features; + netdev->mpls_features |= NETIF_F_HW_CSUM; + + /* set this bit last since it cannot be part of vlan_features */ + netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER | + NETIF_F_HW_VLAN_CTAG_RX | + NETIF_F_HW_VLAN_CTAG_TX; + + netdev->priv_flags |= IFF_UNICAST_FLT; + netdev->priv_flags |= IFF_SUPP_NOFCS; + + /* give us the option of enabling RSC/LRO later */ + if (adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) + netdev->hw_features |= NETIF_F_LRO; + +#else /* NETIF_F_GSO_PARTIAL */ + /* keep |= here to avoid conflict with features set in param.c */ + netdev->features |= NETIF_F_SG | + NETIF_F_IP_CSUM; + +#ifdef NETIF_F_IPV6_CSUM + netdev->features |= NETIF_F_IPV6_CSUM; +#endif + +#ifdef NETIF_F_HW_VLAN_CTAG_TX + netdev->features |= NETIF_F_HW_VLAN_CTAG_TX | + NETIF_F_HW_VLAN_CTAG_FILTER | + NETIF_F_HW_VLAN_CTAG_RX; +#endif + +#ifdef NETIF_F_HW_VLAN_TX + netdev->features |= NETIF_F_HW_VLAN_TX | + NETIF_F_HW_VLAN_FILTER | + NETIF_F_HW_VLAN_RX; +#endif + netdev->features |= ixgbe_tso_features(); +#ifdef NETIF_F_RXHASH + netdev->features |= NETIF_F_RXHASH; +#endif /* NETIF_F_RXHASH */ + netdev->features |= NETIF_F_RXCSUM; + +#ifdef HAVE_NDO_SET_FEATURES + /* copy netdev features into list of user selectable features */ +#ifndef HAVE_RHEL6_NET_DEVICE_OPS_EXT + hw_features = netdev->hw_features; +#else + hw_features = get_netdev_hw_features(netdev); +#endif + hw_features |= netdev->features; + + /* give us the option of enabling RSC/LRO later */ + if (adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) + hw_features |= NETIF_F_LRO; + +#else +#ifdef NETIF_F_GRO + + /* this is only needed on kernels prior to 2.6.39 */ + netdev->features |= NETIF_F_GRO; +#endif /* NETIF_F_GRO */ +#endif /* HAVE_NDO_SET_FEATURES */ + + switch (adapter->hw.mac.type) { + case ixgbe_mac_82599EB: + case ixgbe_mac_X540: + case ixgbe_mac_X550: + case ixgbe_mac_X550EM_x: + case ixgbe_mac_X550EM_a: + case ixgbe_mac_E610: + netdev->features |= NETIF_F_SCTP_CSUM; +#ifdef HAVE_NDO_SET_FEATURES + hw_features |= NETIF_F_SCTP_CSUM | +#ifdef NETIF_F_HW_TC + NETIF_F_HW_TC | +#endif + NETIF_F_NTUPLE; +#endif + break; + default: + break; + } +#ifdef HAVE_NDO_SET_FEATURES +#ifdef HAVE_RHEL6_NET_DEVICE_OPS_EXT + set_netdev_hw_features(netdev, hw_features); +#else + netdev->hw_features = hw_features; +#endif +#endif + +#ifdef HAVE_NETDEV_VLAN_FEATURES + netdev->vlan_features |= NETIF_F_SG | + NETIF_F_IP_CSUM | + NETIF_F_IPV6_CSUM | + NETIF_F_TSO | + NETIF_F_TSO6; + +#endif /* HAVE_NETDEV_VLAN_FEATURES */ +#ifdef HAVE_ENCAP_CSUM_OFFLOAD + netdev->hw_enc_features |= NETIF_F_SG; +#endif /* HAVE_ENCAP_CSUM_OFFLOAD */ +#ifdef HAVE_VXLAN_RX_OFFLOAD + if (adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE) { + netdev->hw_enc_features |= NETIF_F_IP_CSUM | + NETIF_F_IPV6_CSUM; + } +#endif /* NETIF_F_GSO_PARTIAL */ + +#endif /* HAVE_VXLAN_RX_OFFLOAD */ + if (netdev->features & NETIF_F_LRO) { + if ((adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) && + ((adapter->rx_itr_setting == 1) || + (adapter->rx_itr_setting > IXGBE_MIN_RSC_ITR))) { + adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED; + } else if (adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) { + e_dev_info("InterruptThrottleRate set too high, " + "disabling RSC\n"); + } + } +#ifdef IFF_UNICAST_FLT + netdev->priv_flags |= IFF_UNICAST_FLT; +#endif +#ifdef IFF_SUPP_NOFCS + netdev->priv_flags |= IFF_SUPP_NOFCS; +#endif + +#ifdef HAVE_XDP_SUPPORT + xdp_set_features_flag(netdev, NETDEV_XDP_ACT_BASIC | + NETDEV_XDP_ACT_REDIRECT | + NETDEV_XDP_ACT_XSK_ZEROCOPY); +#endif /* HAVE_XDP_SUPPORT */ + +#ifdef HAVE_NETDEVICE_MIN_MAX_MTU + /* MTU range: 68 - 9710 */ +#ifdef HAVE_RHEL7_EXTENDED_MIN_MAX_MTU + netdev->extended->min_mtu = ETH_MIN_MTU; + netdev->extended->max_mtu = IXGBE_MAX_JUMBO_FRAME_SIZE - + (ETH_HLEN + ETH_FCS_LEN); +#else + netdev->min_mtu = ETH_MIN_MTU; + netdev->max_mtu = IXGBE_MAX_JUMBO_FRAME_SIZE - (ETH_HLEN + ETH_FCS_LEN); +#endif + +#endif +#if IS_ENABLED(CONFIG_DCB) + if (adapter->flags & IXGBE_FLAG_DCB_CAPABLE) + netdev->dcbnl_ops = &ixgbe_dcbnl_ops; +#endif /* CONFIG_DCB */ +#if IS_ENABLED(CONFIG_FCOE) +#ifdef NETIF_F_FSO + if (adapter->flags & IXGBE_FLAG_FCOE_CAPABLE) { + unsigned int fcoe_l; + + hw->mac.ops.get_device_caps(hw, &device_caps); + if (device_caps & IXGBE_DEVICE_CAPS_FCOE_OFFLOADS) { + adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED; + adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE; + e_dev_info("FCoE offload feature is not available. " + "Disabling FCoE offload feature\n"); + } else { + netdev->features |= NETIF_F_FSO | + NETIF_F_FCOE_CRC; +#ifndef HAVE_NETDEV_OPS_FCOE_ENABLE + ixgbe_fcoe_ddp_enable(adapter); + adapter->flags |= IXGBE_FLAG_FCOE_ENABLED; + netdev->features |= NETIF_F_FCOE_MTU; +#endif /* HAVE_NETDEV_OPS_FCOE_ENABLE */ + } + + fcoe_l = min_t(int, IXGBE_FCRETA_SIZE, num_online_cpus()); + adapter->ring_feature[RING_F_FCOE].limit = fcoe_l; + +#ifdef HAVE_NETDEV_VLAN_FEATURES +#ifdef HAVE_NETDEV_FCOE_MTU + netdev->vlan_features |= NETIF_F_FSO | + NETIF_F_FCOE_CRC; +#else + netdev->vlan_features |= NETIF_F_FSO | + NETIF_F_FCOE_CRC | + NETIF_F_FCOE_MTU; +#endif /* HAVE_NETDEV_FCOE_MTU */ +#endif /* HAVE_NETDEV_VLAN_FEATURES */ + } +#endif /* NETIF_F_FSO */ +#endif /* CONFIG_FCOE */ + if (pci_using_dac) { + netdev->features |= NETIF_F_HIGHDMA; +#ifdef HAVE_NETDEV_VLAN_FEATURES + netdev->vlan_features |= NETIF_F_HIGHDMA; +#endif /* HAVE_NETDEV_VLAN_FEATURES */ + } + + if (hw->eeprom.ops.validate_checksum && + (hw->eeprom.ops.validate_checksum(hw, NULL) < 0)) { + e_dev_err("The EEPROM Checksum Is Not Valid\n"); + err = -EIO; + goto err_sw_init; + } + + eth_hw_addr_set(netdev, hw->mac.perm_addr); +#ifdef ETHTOOL_GPERMADDR + memcpy(netdev->perm_addr, hw->mac.perm_addr, netdev->addr_len); +#endif + if (!is_valid_ether_addr(netdev->dev_addr)) { + e_dev_err("invalid MAC address\n"); + err = -EIO; + goto err_sw_init; + } + + /* Set hw->mac.addr to permanent MAC address */ + ether_addr_copy(hw->mac.addr, hw->mac.perm_addr); + ixgbe_mac_set_default_filter(adapter); + + timer_setup(&adapter->service_timer, ixgbe_service_timer, 0); + + if (IXGBE_REMOVED(hw->hw_addr)) { + err = -EIO; + goto err_aci_lock; + } + INIT_WORK(&adapter->service_task, ixgbe_service_task); + set_bit(__IXGBE_SERVICE_INITED, adapter->state); + clear_bit(__IXGBE_SERVICE_SCHED, adapter->state); + + err = ixgbe_init_interrupt_scheme(adapter); + if (err) + goto err_aci_lock; + + for (i = 0; i < adapter->num_xdp_queues; i++) + u64_stats_init(&adapter->xdp_ring[i]->syncp); + /* WOL not supported for all devices */ + adapter->wol = 0; + hw->eeprom.ops.read(hw, 0x2c, &adapter->eeprom_cap); + if (ixgbe_wol_supported(adapter, pdev->device, pdev->subsystem_device)) + adapter->wol = IXGBE_WUFC_MAG; + + hw->wol_enabled = !!(adapter->wol); + + device_set_wakeup_enable(ixgbe_pf_to_dev(adapter), adapter->wol); + + ixgbe_set_fw_version(adapter); + + /* gets the number of resets after firmware update */ + if (adapter->hw.mac.type > ixgbe_mac_X550) + hw->fw_rst_cnt = IXGBE_READ_REG(hw, IXGBE_FWRESETCNT); + + /* reset the hardware with the new settings */ + err = hw->mac.ops.start_hw(hw); + if (err == IXGBE_ERR_EEPROM_VERSION) { + /* We are running on a pre-production device, log a warning */ + e_dev_warn("This device is a pre-production adapter/LOM. " + "Please be aware there may be issues associated " + "with your hardware. If you are experiencing " + "problems please contact your Intel or hardware " + "representative who provided you with this " + "hardware.\n"); + } else if (err == IXGBE_ERR_OVERTEMP) { + e_crit(drv, "%s\n", ixgbe_overheat_msg); + goto err_hw_init; + } else if (err) { + e_dev_err("HW init failed %d\n", err); + goto err_hw_init; + } + + if (ixgbe_pcie_from_parent(hw)) + ixgbe_get_parent_bus_info(hw); + else + if (hw->mac.ops.get_bus_info) + hw->mac.ops.get_bus_info(hw); + + strscpy(netdev->name, "eth%d", sizeof(netdev->name)); + pci_set_drvdata(pdev, adapter); + + if (ixgbe_is_mac_E6xx(mac_type)) { + ixgbe_devlink_register_port(adapter); +#ifdef HAVE_SET_NETDEV_DEVLINK_PORT + SET_NETDEV_DEVLINK_PORT(adapter->netdev, + &adapter->devlink_port); +#endif + } + + if (!(ixgbe_is_mac_E6xx(mac_type) && + (ixgbe_check_fw_error(adapter) || + ixgbe_check_fw_api_ver(adapter)))) { + err = register_netdev(netdev); + if (err) + goto err_register; + adapter->netdev_registered = true; + } +#ifndef HAVE_SET_NETDEV_DEVLINK_PORT + if (ixgbe_is_mac_E6xx(mac_type)) + devlink_port_type_eth_set(&adapter->devlink_port, + adapter->netdev); +#endif /* HAVE_SET_NETDEV_DEVLINK_PORT */ + +#ifdef HAVE_PCI_ERS + /* + * call save state here in standalone driver because it relies on + * adapter struct to exist, and needs to call netdev_priv + */ + pci_save_state(pdev); + +#endif + + /* power down the optics for 82599 SFP+ fiber */ + if (hw->mac.ops.disable_tx_laser) + hw->mac.ops.disable_tx_laser(hw); + + /* carrier off reporting is important to ethtool even BEFORE open */ + netif_carrier_off(netdev); + /* keep stopping all the transmit queues for older kernels */ + netif_tx_stop_all_queues(netdev); + +#if IS_ENABLED(CONFIG_DCA) + if (adapter->flags & IXGBE_FLAG_DCA_CAPABLE) { + err = dca_add_requester(&pdev->dev); + switch (err) { + case IXGBE_SUCCESS: + adapter->flags |= IXGBE_FLAG_DCA_ENABLED; + ixgbe_setup_dca(adapter); + break; + /* -19 is returned from the kernel when no provider is found */ + case -19: + e_info(rx_err, "No DCA provider found. Please " + "start ioatdma for DCA functionality.\n"); + break; + default: + e_info(probe, "DCA registration failed: %d\n", err); + break; + } + } +#endif + + /* print all messages at the end so that we use our eth%d name */ + ixgbe_check_minimum_link(adapter); + + /* First try to read PBA as a string */ + err = ixgbe_read_pba_string(hw, part_str, IXGBE_PBANUM_LENGTH); + if (err) + strscpy(part_str, "Unknown", IXGBE_PBANUM_LENGTH); + if (ixgbe_is_sfp(hw) && hw->phy.sfp_type != ixgbe_sfp_type_not_present) + e_info(probe, "MAC: %d, PHY: %d, SFP+: %d, PBA No: %s\n", + hw->mac.type, hw->phy.type, hw->phy.sfp_type, part_str); + else + e_info(probe, "MAC: %d, PHY: %d, PBA No: %s\n", + hw->mac.type, hw->phy.type, part_str); + + e_dev_info("%02x:%02x:%02x:%02x:%02x:%02x\n", + netdev->dev_addr[0], netdev->dev_addr[1], + netdev->dev_addr[2], netdev->dev_addr[3], + netdev->dev_addr[4], netdev->dev_addr[5]); + +#define INFO_STRING_LEN 255 + info_string = kzalloc(INFO_STRING_LEN, GFP_KERNEL); + if (!info_string) { + e_err(probe, "allocation for info string failed\n"); + goto no_info_string; + } + snprintf(info_string, INFO_STRING_LEN, + "Enabled Features: RxQ: %d TxQ: %d", + adapter->num_rx_queues, adapter->num_tx_queues); +#if IS_ENABLED(CONFIG_FCOE) + if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED) + strlcat(info_string, " FCoE", INFO_STRING_LEN); +#endif + if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) + strlcat(info_string, " FdirHash", INFO_STRING_LEN); + if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) + strlcat(info_string, " DCB", INFO_STRING_LEN); +#if IS_ENABLED(CONFIG_DCA) + if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) + strlcat(info_string, " DCA", INFO_STRING_LEN); +#endif + if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) + strlcat(info_string, " RSC", INFO_STRING_LEN); + if (adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_ENABLE) + strlcat(info_string, " vxlan_rx", INFO_STRING_LEN); + + /* end features printing */ + e_info(probe, "%s\n", info_string); + kfree(info_string); +no_info_string: +#ifdef CONFIG_PCI_IOV + if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) { + int i; + for (i = 0; i < adapter->num_vfs; i++) + ixgbe_vf_configuration(pdev, (i | 0x10000000)); + } +#endif + + /* Initialize the LED link active for LED blink support */ + if (hw->mac.ops.init_led_link_act) + hw->mac.ops.init_led_link_act(hw); + + /* firmware requires blank numerical version */ + if (hw->mac.ops.set_fw_drv_ver) + hw->mac.ops.set_fw_drv_ver(hw, 0xFF, 0xFF, 0xFF, 0xFF, + sizeof(ixgbe_driver_version) - 1, + ixgbe_driver_version); + +#if defined(HAVE_NETDEV_STORAGE_ADDRESS) && defined(NETDEV_HW_ADDR_T_SAN) + /* add san mac addr to netdev */ + ixgbe_add_sanmac_netdev(netdev); + +#endif /* (HAVE_NETDEV_STORAGE_ADDRESS) && (NETDEV_HW_ADDR_T_SAN) */ + e_info(probe, "Intel(R) 10 Gigabit Network Connection\n"); + cards_found++; + +#ifdef IXGBE_SYSFS + if (ixgbe_sysfs_init(adapter)) + e_err(probe, "failed to allocate sysfs resources\n"); +#else +#ifdef IXGBE_PROCFS + if (ixgbe_procfs_init(adapter)) + e_err(probe, "failed to allocate procfs resources\n"); +#endif /* IXGBE_PROCFS */ +#endif /* IXGBE_SYSFS */ +#ifdef HAVE_IXGBE_DEBUG_FS + + ixgbe_dbg_adapter_init(adapter); +#endif /* HAVE_IXGBE_DEBUG_FS */ + + /* setup link for SFP devices with MNG FW, else wait for IXGBE_UP */ + if (ixgbe_mng_enabled(hw) && ixgbe_is_sfp(hw) && hw->mac.ops.setup_link) + hw->mac.ops.setup_link(hw, + IXGBE_LINK_SPEED_10GB_FULL | IXGBE_LINK_SPEED_1GB_FULL, + true); + + if (hw->mac.ops.setup_eee && + (adapter->flags2 & IXGBE_FLAG2_EEE_CAPABLE)) { + bool eee_enable = ixgbe_is_eee_enabled(adapter); + + hw->mac.ops.setup_eee(hw, eee_enable); + } + + if (ixgbe_is_mac_E6xx(mac_type)) { +#ifndef HAVE_DEVLINK_PARAMS_PUBLISH + bool need_register = true; + + /* for old kernels, prior to auto-publish of devlink params, + * API has required a call to devlink_register() prior to + * registering params. API has changed to be the other way + * around at the same moment that explicit param + * publishing was deprecated. + * Some older kernels have backported the removal of param publishing + * but not the reversing of register order. Because of that, we need + * to check if devlink->dev was properly allocated before registering + * params to avoid segfaults. + */ + if (!devlink_to_dev(adapter->devlink)) { + ixgbe_devlink_register(adapter); + need_register = false; + } +#else /* HAVE_DEVLINK_PARAMS_PUBLISH */ + ixgbe_devlink_register(adapter); +#endif /* HAVE_DEVLINK_PARAMS_PUBLISH */ + + err = ixgbe_devlink_register_params(adapter); + if (err) + goto err_devlink_register; + ixgbe_devlink_init_regions(adapter); + +#ifndef HAVE_DEVLINK_PARAMS_PUBLISH + if (need_register) + ixgbe_devlink_register(adapter); +#endif /* !HAVE_DEVLINK_PARAMS_PUBLISH */ + } + +#ifdef HAVE_PTP_1588_CLOCK + if (ixgbe_is_mac_E6xx(mac_type)) + ixgbe_ptp_init_e600(adapter); + +#endif /* HAVE_PTP_1588_CLOCK */ + return 0; + +err_devlink_register: +#ifdef HAVE_DEVLINK_PARAMS_PUBLISH + if (ixgbe_is_mac_E6xx(mac_type)) + ixgbe_devlink_unregister(adapter); +#endif /* HAVE_DEVLINK_PARAMS_PUBLISH */ +err_register: + if (ixgbe_is_mac_E6xx(mac_type)) + ixgbe_devlink_unregister_port(adapter); +err_hw_init: + ixgbe_clear_interrupt_scheme(adapter); + + if (ixgbe_is_mac_E6xx(mac_type) && hw->fwlog_support_ena) + ixgbe_pf_fwlog_deinit(adapter); + +err_aci_lock: + if (ixgbe_is_mac_E6xx(mac_type)) + ixgbe_shutdown_aci(&adapter->hw); +err_sw_init: + ixgbe_release_hw_control(adapter); +#ifdef CONFIG_PCI_IOV + ixgbe_disable_sriov(adapter); +#endif /* CONFIG_PCI_IOV */ + adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP; +#ifdef HAVE_TC_SETUP_CLSU32 + kfree(adapter->jump_tables[0]); +#endif + kfree(adapter->mac_table); + kfree(adapter->rss_key); + bitmap_free(adapter->af_xdp_zc_qps); + iounmap(adapter->io_addr); + if (ixgbe_is_mac_E6xx(mac_type)) + devlink_free(adapter->devlink); +err_alloc_devlink: + +err_ioremap: + disable_dev = !test_and_set_bit(__IXGBE_DISABLED, adapter->state); + free_netdev(netdev); +err_alloc_etherdev: + pci_release_mem_regions(pdev); +err_pci_reg: +err_dma: + if (!adapter || disable_dev) + pci_disable_device(pdev); + return err; +} + +/** + * ixgbe_remove - Device Removal Routine + * @pdev: PCI device information struct + * + * ixgbe_remove is called by the PCI subsystem to alert the driver + * that it should release a PCI device. The could be caused by a + * Hot-Plug event, or because the driver is going to be removed from + * memory. + **/ +#ifdef HAVE_CONFIG_HOTPLUG +static void __devexit ixgbe_remove(struct pci_dev *pdev) +#else +static void ixgbe_remove(struct pci_dev *pdev) +#endif +{ + struct ixgbe_adapter *adapter = pci_get_drvdata(pdev); + struct net_device *netdev; + bool disable_dev; +#ifdef HAVE_TC_SETUP_CLSU32 + int i; +#endif + + /* if !adapter then we already cleaned up in probe */ + if (!adapter) + return; + +#ifdef HAVE_PTP_1588_CLOCK + if (ixgbe_is_mac_E6xx(adapter->hw.mac.type)) + ixgbe_ptp_release_e600(adapter); + +#endif /* HAVE_PTP_1588_CLOCK */ + if (ixgbe_is_mac_E6xx(adapter->hw.mac.type)) { + ixgbe_devlink_unregister(adapter); + ixgbe_devlink_destroy_regions(adapter); + ixgbe_devlink_unregister_params(adapter); + } + if (ixgbe_is_mac_E6xx(adapter->hw.mac.type) && + adapter->hw.fwlog_support_ena) + ixgbe_pf_fwlog_deinit(adapter); + + netdev = adapter->netdev; +#ifdef HAVE_IXGBE_DEBUG_FS + ixgbe_dbg_adapter_exit(adapter); + +#endif /*HAVE_IXGBE_DEBUG_FS */ + set_bit(__IXGBE_REMOVING, adapter->state); + cancel_work_sync(&adapter->service_task); + + if (ixgbe_is_mac_E6xx(adapter->hw.mac.type)) + ixgbe_shutdown_aci(&adapter->hw); +#if IS_ENABLED(CONFIG_DCA) + if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) { + adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED; + dca_remove_requester(&pdev->dev); + IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, + IXGBE_DCA_CTRL_DCA_DISABLE); + } +#endif /* CONFIG_DCA */ + +#ifdef IXGBE_SYSFS + ixgbe_sysfs_exit(adapter); +#else +#ifdef IXGBE_PROCFS + ixgbe_procfs_exit(adapter); +#endif /* IXGBE_PROCFS */ +#endif /* IXGBE-SYSFS */ + +#if defined(HAVE_NETDEV_STORAGE_ADDRESS) && defined(NETDEV_HW_ADDR_T_SAN) + /* remove the added san mac */ + ixgbe_del_sanmac_netdev(netdev); + +#endif /* (HAVE_NETDEV_STORAGE_ADDRESS) && (NETDEV_HW_ADDR_T_SAN) */ + +#ifdef CONFIG_PCI_IOV + ixgbe_disable_sriov(adapter); +#endif /* CONFIG_PCI_IOV */ + if (adapter->netdev_registered) { + unregister_netdev(netdev); + adapter->netdev_registered = false; + } + if (ixgbe_is_mac_E6xx(adapter->hw.mac.type)) { + ixgbe_devlink_unregister_port(adapter); + devlink_free(adapter->devlink); + } + +#if IS_ENABLED(CONFIG_FCOE) +#ifndef HAVE_NETDEV_OPS_FCOE_ENABLE + ixgbe_fcoe_ddp_disable(adapter); +#endif +#endif /* CONFIG_FCOE */ + ixgbe_clear_interrupt_scheme(adapter); + ixgbe_release_hw_control(adapter); + +#ifdef HAVE_DCBNL_IEEE + kfree(adapter->ixgbe_ieee_pfc); + kfree(adapter->ixgbe_ieee_ets); + +#endif + iounmap(adapter->io_addr); + pci_release_mem_regions(pdev); +#ifdef HAVE_TC_SETUP_CLSU32 + for (i = 0; i < IXGBE_MAX_LINK_HANDLE; i++) { + if (adapter->jump_tables[i]) { + kfree(adapter->jump_tables[i]->input); + kfree(adapter->jump_tables[i]->mask); + } + kfree(adapter->jump_tables[i]); + } +#endif /* HAVE_TC_SETUP_CLSU32 */ + kfree(adapter->mac_table); + kfree(adapter->rss_key); + bitmap_free(adapter->af_xdp_zc_qps); + + disable_dev = !test_and_set_bit(__IXGBE_DISABLED, adapter->state); + free_netdev(netdev); + +#ifdef HAVE_PCI_ENABLE_PCIE_ERROR_REPORTING + pci_disable_pcie_error_reporting(pdev); +#endif /* HAVE_PCI_ENABLE_PCIE_ERROR_REPORTING */ + + if (disable_dev) + pci_disable_device(pdev); + +} + +static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev) +{ + u16 value; + + pci_read_config_word(pdev, PCI_VENDOR_ID, &value); + if (value == IXGBE_FAILED_READ_CFG_WORD) { + ixgbe_remove_adapter(hw); + return true; + } + return false; +} + +u16 ixgbe_read_pci_cfg_word(struct ixgbe_hw *hw, u32 reg) +{ + struct ixgbe_adapter *adapter = hw->back; + u16 value; + + if (IXGBE_REMOVED(hw->hw_addr)) + return IXGBE_FAILED_READ_CFG_WORD; + pci_read_config_word(adapter->pdev, reg, &value); + if (value == IXGBE_FAILED_READ_CFG_WORD && + ixgbe_check_cfg_remove(hw, adapter->pdev)) + return IXGBE_FAILED_READ_CFG_WORD; + return value; +} + +#ifdef HAVE_PCI_ERS +#ifdef CONFIG_PCI_IOV +static u32 ixgbe_read_pci_cfg_dword(struct ixgbe_hw *hw, u32 reg) +{ + struct ixgbe_adapter *adapter = hw->back; + u32 value; + + if (IXGBE_REMOVED(hw->hw_addr)) + return IXGBE_FAILED_READ_CFG_DWORD; + pci_read_config_dword(adapter->pdev, reg, &value); + if (value == IXGBE_FAILED_READ_CFG_DWORD && + ixgbe_check_cfg_remove(hw, adapter->pdev)) + return IXGBE_FAILED_READ_CFG_DWORD; + return value; +} +#endif /* CONFIG_PCI_IOV */ +#endif /* HAVE_PCI_ERS */ + +void ixgbe_write_pci_cfg_word(struct ixgbe_hw *hw, u32 reg, u16 value) +{ + struct ixgbe_adapter *adapter = hw->back; + + if (IXGBE_REMOVED(hw->hw_addr)) + return; + pci_write_config_word(adapter->pdev, reg, value); +} + +void ewarn(struct ixgbe_hw *hw, const char *st) +{ + struct ixgbe_adapter *adapter = hw->back; + + netif_warn(adapter, drv, adapter->netdev, "%s", st); +} + +#ifdef HAVE_PCI_ERS +/** + * ixgbe_io_error_detected - Handle PCI error detection + * @pdev: Pointer to the PCI device + * @state: The current PCI connection state + * + * This function is called when a PCI bus error affecting the ixgbe network + * adapter is detected. It handles error detection, including identifying + * and managing errors caused by Virtual Functions (VFs) if applicable. The + * function detaches the network device, suspends operations if necessary, + * and requests a slot reset if the error is recoverable. It returns the + * appropriate PCI error recovery result based on the error state and + * device status. + * + * Return: PCI_ERS_RESULT_RECOVERED if the error is recoverable, + * PCI_ERS_RESULT_DISCONNECT if the device should be disconnected, + * or PCI_ERS_RESULT_NEED_RESET if a slot reset is required. + */ +static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev, + pci_channel_state_t state) +{ + struct ixgbe_adapter *adapter = pci_get_drvdata(pdev); + struct net_device *netdev = adapter->netdev; + +#ifdef CONFIG_PCI_IOV + struct ixgbe_hw *hw = &adapter->hw; + struct pci_dev *bdev, *vfdev; + u32 dw0, dw1, dw2, dw3; + int vf, pos; + u16 req_id, pf_func; + + if (adapter->hw.mac.type == ixgbe_mac_82598EB || + adapter->num_vfs == 0) + goto skip_bad_vf_detection; + + bdev = pdev->bus->self; + while (bdev && (pci_pcie_type(bdev) != PCI_EXP_TYPE_ROOT_PORT)) + bdev = bdev->bus->self; + + if (!bdev) + goto skip_bad_vf_detection; + + pos = pci_find_ext_capability(bdev, PCI_EXT_CAP_ID_ERR); + if (!pos) + goto skip_bad_vf_detection; + + dw0 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG); + dw1 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 4); + dw2 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 8); + dw3 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 12); + if (IXGBE_REMOVED(hw->hw_addr)) + goto skip_bad_vf_detection; + + req_id = dw1 >> 16; + /* On the 82599 if bit 7 of the requestor ID is set then it's a VF */ + if (!(req_id & 0x0080)) + goto skip_bad_vf_detection; + + pf_func = req_id & 0x01; + if ((pf_func & 1) == (pdev->devfn & 1)) { + unsigned int device_id; + + vf = (req_id & 0x7F) >> 1; + e_dev_err("VF %d has caused a PCIe error\n", vf); + e_dev_err("TLP: dw0: %8.8x\tdw1: %8.8x\tdw2: " + "%8.8x\tdw3: %8.8x\n", + dw0, dw1, dw2, dw3); + switch (adapter->hw.mac.type) { + case ixgbe_mac_82599EB: + device_id = IXGBE_DEV_ID_82599_VF; + break; + case ixgbe_mac_X540: + device_id = IXGBE_DEV_ID_X540_VF; + break; + case ixgbe_mac_X550: + device_id = IXGBE_DEV_ID_X550_VF; + break; + case ixgbe_mac_X550EM_x: + device_id = IXGBE_DEV_ID_X550EM_X_VF; + break; + case ixgbe_mac_X550EM_a: + device_id = IXGBE_DEV_ID_X550EM_A_VF; + break; + case ixgbe_mac_E610: + device_id = IXGBE_DEV_ID_E610_VF; + break; + default: + device_id = 0; + break; + } + + /* Find the pci device of the offending VF */ + vfdev = pci_get_device(PCI_VENDOR_ID_INTEL, device_id, NULL); + while (vfdev) { + if (vfdev->devfn == (req_id & 0xFF)) + break; + vfdev = pci_get_device(PCI_VENDOR_ID_INTEL, + device_id, vfdev); + } + /* + * There's a slim chance the VF could have been hot plugged, + * so if it is no longer present we don't need to issue the + * VFLR. Just clean up the AER in that case. + */ + if (vfdev) { + ixgbe_issue_vf_flr(adapter, vfdev); + /* Free device reference count */ + pci_dev_put(vfdev); + } + + pci_aer_clear_nonfatal_status(pdev); + } + + /* + * Even though the error may have occurred on the other port + * we still need to increment the vf error reference count for + * both ports because the I/O resume function will be called + * for both of them. + */ + adapter->vferr_refcount++; + + return PCI_ERS_RESULT_RECOVERED; + +skip_bad_vf_detection: +#endif /* CONFIG_PCI_IOV */ + if (!test_bit(__IXGBE_SERVICE_INITED, adapter->state)) + return PCI_ERS_RESULT_DISCONNECT; + + if (!netif_device_present(netdev)) + return PCI_ERS_RESULT_DISCONNECT; + + rtnl_lock(); + netif_device_detach(netdev); + + if (netif_running(netdev)) + ixgbe_close_suspend(adapter); + + if (state == pci_channel_io_perm_failure) { + rtnl_unlock(); + return PCI_ERS_RESULT_DISCONNECT; + } + + if (!test_and_set_bit(__IXGBE_DISABLED, adapter->state)) + pci_disable_device(pdev); + rtnl_unlock(); + + /* Request a slot reset. */ + return PCI_ERS_RESULT_NEED_RESET; +} + +/** + * ixgbe_io_slot_reset - Handle PCI slot reset + * @pdev: Pointer to the PCI device + * + * This function is called after the PCI bus has been reset. It restarts the + * ixgbe network adapter from scratch, as if from a cold boot. The function + * re-enables the PCI device, restores its state, and resets the adapter. + * It clears any non-fatal PCI error status and updates the device's state + * to indicate it is no longer disabled. If the device cannot be re-enabled, + * it returns a disconnect result. + * + * Return: PCI_ERS_RESULT_RECOVERED if the reset is successful, or + * PCI_ERS_RESULT_DISCONNECT if the device cannot be re-enabled. + */ +static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev) +{ + struct ixgbe_adapter *adapter = pci_get_drvdata(pdev); + pci_ers_result_t result; + + if (pci_enable_device_mem(pdev)) { + e_err(probe, "Cannot re-enable PCI device after reset.\n"); + result = PCI_ERS_RESULT_DISCONNECT; + } else { + smp_mb__before_atomic(); + clear_bit(__IXGBE_DISABLED, adapter->state); + adapter->hw.hw_addr = adapter->io_addr; + pci_set_master(pdev); + pci_restore_state(pdev); + /* + * After second error pci->state_saved is false, this + * resets it so EEH doesn't break. + */ + pci_save_state(pdev); + + pci_wake_from_d3(pdev, false); + + ixgbe_reset(adapter); + IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0); + result = PCI_ERS_RESULT_RECOVERED; + } + + pci_aer_clear_nonfatal_status(pdev); + + return result; +} + +/** + * ixgbe_io_resume - Resume normal operation after error recovery + * @pdev: Pointer to the PCI device + * + * This function is called when the error recovery process indicates that + * it is safe to resume normal operation for the ixgbe network adapter. It + * reopens the network interface if it was running before the error and + * reattaches the network device. The function also handles specific cases + * related to Virtual Function (VF) errors, ensuring proper resumption of + * operations. + */ +static void ixgbe_io_resume(struct pci_dev *pdev) +{ + struct ixgbe_adapter *adapter = pci_get_drvdata(pdev); + struct net_device *netdev = adapter->netdev; + +#ifdef CONFIG_PCI_IOV + if (adapter->vferr_refcount) { + e_info(drv, "Resuming after VF err\n"); + adapter->vferr_refcount--; + return; + } + +#endif + rtnl_lock(); + if (netif_running(netdev)) + ixgbe_open(netdev); + + netif_device_attach(netdev); + rtnl_unlock(); +} + +#ifdef CONFIG_PM +#ifdef HAVE_PCI_ERROR_HANDLER_RESET_NOTIFY +/** + * ixgbe_io_reset_notify - Notify the device of an I/O reset + * @pdev: PCI device structure + * @prepare: Boolean indicating whether to prepare for reset (true) or resume (false) + * + * This function notifies the specified PCI device of an I/O reset. If the + * `prepare` parameter is true, it suspends the device in preparation for the + * reset. If false, it resumes the device after the reset. + */ +static void ixgbe_io_reset_notify(struct pci_dev *pdev, bool prepare) +{ + struct device *dev = &pdev->dev; + + if (prepare) + ixgbe_suspend(dev); + else + ixgbe_resume(dev); +} +#endif /* HAVE_PCI_ERROR_HANDLER_RESET_NOTIFY */ + +#ifdef HAVE_PCI_ERROR_HANDLER_RESET_PREPARE +static void pci_io_reset_prepare(struct pci_dev *pdev) +{ + struct device *dev = &pdev->dev; + + ixgbe_suspend(dev); +} + +static void pci_io_reset_done(struct pci_dev *pdev) +{ + struct device *dev = &pdev->dev; + + ixgbe_resume(dev); +} +#endif +#endif + +#ifdef HAVE_CONST_STRUCT_PCI_ERROR_HANDLERS +static const struct pci_error_handlers ixgbe_err_handler = { +#else +static struct pci_error_handlers ixgbe_err_handler = { +#endif + .error_detected = ixgbe_io_error_detected, + .slot_reset = ixgbe_io_slot_reset, +#ifdef CONFIG_PM +#ifdef HAVE_PCI_ERROR_HANDLER_RESET_NOTIFY + .reset_notify = ixgbe_io_reset_notify, +#endif +#ifdef HAVE_PCI_ERROR_HANDLER_RESET_PREPARE + .reset_prepare = pci_io_reset_prepare, + .reset_done = pci_io_reset_done, +#endif +#endif + .resume = ixgbe_io_resume, +}; +#endif /* HAVE_PCI_ERS */ + +struct net_device *ixgbe_hw_to_netdev(const struct ixgbe_hw *hw) +{ + return ((struct ixgbe_adapter *)hw->back)->netdev; +} +struct ixgbe_msg *ixgbe_hw_to_msg(const struct ixgbe_hw *hw) +{ + struct ixgbe_adapter *adapter = + container_of(hw, struct ixgbe_adapter, hw); + return (struct ixgbe_msg *)&adapter->msg_enable; +} + +#ifdef HAVE_RHEL6_SRIOV_CONFIGURE +static struct pci_driver_rh ixgbe_driver_rh = { + .sriov_configure = ixgbe_pci_sriov_configure, +}; +#endif + +#ifdef CONFIG_PM +#ifndef USE_LEGACY_PM_SUPPORT +static const struct dev_pm_ops ixgbe_pm_ops = { + .suspend = ixgbe_suspend, + .resume = ixgbe_resume, + .freeze = ixgbe_freeze, + .thaw = ixgbe_thaw, + .poweroff = ixgbe_suspend, + .restore = ixgbe_resume, +}; +#endif /* USE_LEGACY_PM_SUPPORT */ +#endif + +static struct pci_driver ixgbe_driver = { + .name = ixgbe_driver_name, + .id_table = ixgbe_pci_tbl, + .probe = ixgbe_probe, +#ifdef HAVE_CONFIG_HOTPLUG + .remove = __devexit_p(ixgbe_remove), +#else + .remove = ixgbe_remove, +#endif +#ifdef CONFIG_PM +#ifndef USE_LEGACY_PM_SUPPORT + .driver = { + .pm = &ixgbe_pm_ops, + }, +#else + .suspend = ixgbe_suspend, + .resume = ixgbe_resume, +#endif /* USE_LEGACY_PM_SUPPORT */ +#endif +#ifndef USE_REBOOT_NOTIFIER + .shutdown = ixgbe_shutdown, +#endif +#if defined(HAVE_SRIOV_CONFIGURE) + .sriov_configure = ixgbe_pci_sriov_configure, +#elif defined(HAVE_RHEL6_SRIOV_CONFIGURE) + .rh_reserved = &ixgbe_driver_rh, +#endif /* HAVE_SRIOV_CONFIGURE */ +#ifdef HAVE_PCI_ERS + .err_handler = &ixgbe_err_handler +#endif +}; + +bool ixgbe_is_ixgbe(struct pci_dev *pcidev) +{ + if (pci_dev_driver(pcidev) != &ixgbe_driver) + return false; + else + return true; +} + +/** + * ixgbe_init_module - Driver Registration Routine + * + * ixgbe_init_module is the first routine called when the driver is + * loaded. All it does is register with the PCI subsystem. + **/ +static int __init ixgbe_init_module(void) +{ + int ret; + pr_info("%s - version %s\n", ixgbe_driver_string, ixgbe_driver_version); + pr_info("%s\n", ixgbe_copyright); + + ixgbe_wq = create_singlethread_workqueue(ixgbe_driver_name); + if (!ixgbe_wq) { + pr_err("%s: Failed to create workqueue\n", ixgbe_driver_name); + return -ENOMEM; + } + +#ifdef IXGBE_PROCFS + if (ixgbe_procfs_topdir_init()) + pr_info("Procfs failed to initialize topdir\n"); +#endif + +#ifdef HAVE_IXGBE_DEBUG_FS + ixgbe_dbg_init(); +#endif /* HAVE_IXGBE_DEBUG_FS */ + + ret = pci_register_driver(&ixgbe_driver); + if (ret) { + destroy_workqueue(ixgbe_wq); +#ifdef HAVE_IXGBE_DEBUG_FS + ixgbe_dbg_exit(); +#endif /* HAVE_IXGBE_DEBUG_FS */ +#ifdef IXGBE_PROCFS + ixgbe_procfs_topdir_exit(); +#endif + return ret; + } +#if IS_ENABLED(CONFIG_DCA) + + dca_register_notify(&dca_notifier); +#endif + + return ret; +} + +module_init(ixgbe_init_module); + +/** + * ixgbe_exit_module - Driver Exit Cleanup Routine + * + * ixgbe_exit_module is called just before the driver is removed + * from memory. + **/ +static void __exit ixgbe_exit_module(void) +{ +#if IS_ENABLED(CONFIG_DCA) + dca_unregister_notify(&dca_notifier); +#endif + pci_unregister_driver(&ixgbe_driver); +#ifdef IXGBE_PROCFS + ixgbe_procfs_topdir_exit(); +#endif + destroy_workqueue(ixgbe_wq); +#ifdef HAVE_IXGBE_DEBUG_FS + ixgbe_dbg_exit(); +#endif /* HAVE_IXGBE_DEBUG_FS */ +} + +#if IS_ENABLED(CONFIG_DCA) +/** + * ixgbe_notify_dca - Handle DCA (Direct Cache Access) notifications + * @nb: Notifier block (unused) + * @event: Event type + * @p: Pointer to event data (unused) + * + * This function handles notifications related to Direct Cache Access (DCA) + * for the ixgbe driver. It iterates over each device managed by the driver + * and processes the event using the `__ixgbe_notify_dca` function. + * + * Return: NOTIFY_DONE on success, or NOTIFY_BAD if an error occurs. + */ +static int ixgbe_notify_dca(struct notifier_block __always_unused *nb, unsigned long event, + void __always_unused *p) +{ + int ret_val; + + ret_val = driver_for_each_device(&ixgbe_driver.driver, NULL, &event, + __ixgbe_notify_dca); + + return ret_val ? NOTIFY_BAD : NOTIFY_DONE; +} +#endif /* CONFIG_DCA */ +module_exit(ixgbe_exit_module); + +/* ixgbe_main.c */ diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_mbx.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_mbx.c new file mode 100644 index 00000000000..7a93b7334b1 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_mbx.c @@ -0,0 +1,1181 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 1999 - 2026 Intel Corporation */ + +#include "ixgbe_type.h" +#include "ixgbe_mbx.h" + +STATIC s32 ixgbe_poll_for_msg(struct ixgbe_hw *hw, u16 mbx_id); +STATIC s32 ixgbe_poll_for_ack(struct ixgbe_hw *hw, u16 mbx_id); + +/** + * ixgbe_read_mbx - Reads a message from the mailbox + * @hw: pointer to the HW structure + * @msg: The message buffer + * @size: Length of buffer + * @mbx_id: id of mailbox to read + * + * returns SUCCESS if it successfully read message from buffer + **/ +s32 ixgbe_read_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size, u16 mbx_id) +{ + struct ixgbe_mbx_info *mbx = &hw->mbx; + + DEBUGFUNC("ixgbe_read_mbx"); + + /* limit read to size of mailbox */ + if (size > mbx->size) { + ERROR_REPORT3(IXGBE_ERROR_ARGUMENT, + "Invalid mailbox message size %u, changing to %u", + size, mbx->size); + size = mbx->size; + } + + if (mbx->ops[mbx_id].read) + return mbx->ops[mbx_id].read(hw, msg, size, mbx_id); + + return IXGBE_ERR_CONFIG; +} + +/** + * ixgbe_poll_mbx - Wait for message and read it from the mailbox + * @hw: pointer to the HW structure + * @msg: The message buffer + * @size: Length of buffer + * @mbx_id: id of mailbox to read + * + * returns SUCCESS if it successfully read message from buffer + **/ +s32 ixgbe_poll_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size, u16 mbx_id) +{ + struct ixgbe_mbx_info *mbx = &hw->mbx; + s32 ret_val; + + DEBUGFUNC("ixgbe_poll_mbx"); + + if (!mbx->ops[mbx_id].read || !mbx->ops[mbx_id].check_for_msg || + !mbx->timeout) + return IXGBE_ERR_CONFIG; + + /* limit read to size of mailbox */ + if (size > mbx->size) { + ERROR_REPORT3(IXGBE_ERROR_ARGUMENT, + "Invalid mailbox message size %u, changing to %u", + size, mbx->size); + size = mbx->size; + } + + ret_val = ixgbe_poll_for_msg(hw, mbx_id); + /* if ack received read message, otherwise we timed out */ + if (!ret_val) + return mbx->ops[mbx_id].read(hw, msg, size, mbx_id); + + return ret_val; +} + +/** + * ixgbe_write_mbx - Write a message to the mailbox and wait for ACK + * @hw: pointer to the HW structure + * @msg: The message buffer + * @size: Length of buffer + * @mbx_id: id of mailbox to write + * + * returns SUCCESS if it successfully copied message into the buffer and + * received an ACK to that message within specified period + * + * Note that the caller to this function must lock before calling, since + * multiple threads can destroy each other messages. + **/ +s32 ixgbe_write_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size, u16 mbx_id) +{ + struct ixgbe_mbx_info *mbx = &hw->mbx; + s32 ret_val = IXGBE_ERR_MBX; + + DEBUGFUNC("ixgbe_write_mbx"); + + /* + * exit if either we can't write, release + * or there is no timeout defined + */ + if (!mbx->ops[mbx_id].write || !mbx->ops[mbx_id].check_for_ack || + !mbx->ops[mbx_id].release || !mbx->timeout) + return IXGBE_ERR_CONFIG; + + if (size > mbx->size) { + ret_val = IXGBE_ERR_PARAM; + ERROR_REPORT2(IXGBE_ERROR_ARGUMENT, + "Invalid mailbox message size %u", size); + } else { + ret_val = mbx->ops[mbx_id].write(hw, msg, size, mbx_id); + } + + return ret_val; +} + +/** + * ixgbe_check_for_msg - checks to see if someone sent us mail + * @hw: pointer to the HW structure + * @mbx_id: id of mailbox to check + * + * returns SUCCESS if the Status bit was found or else ERR_MBX + **/ +s32 ixgbe_check_for_msg(struct ixgbe_hw *hw, u16 mbx_id) +{ + struct ixgbe_mbx_info *mbx = &hw->mbx; + s32 ret_val = IXGBE_ERR_CONFIG; + + DEBUGFUNC("ixgbe_check_for_msg"); + + if (mbx->ops[mbx_id].check_for_msg) + ret_val = mbx->ops[mbx_id].check_for_msg(hw, mbx_id); + + return ret_val; +} + +/** + * ixgbe_check_for_ack - checks to see if someone sent us ACK + * @hw: pointer to the HW structure + * @mbx_id: id of mailbox to check + * + * returns SUCCESS if the Status bit was found or else ERR_MBX + **/ +s32 ixgbe_check_for_ack(struct ixgbe_hw *hw, u16 mbx_id) +{ + struct ixgbe_mbx_info *mbx = &hw->mbx; + s32 ret_val = IXGBE_ERR_CONFIG; + + DEBUGFUNC("ixgbe_check_for_ack"); + + if (mbx->ops[mbx_id].check_for_ack) + ret_val = mbx->ops[mbx_id].check_for_ack(hw, mbx_id); + + return ret_val; +} + +/** + * ixgbe_check_for_rst - checks to see if other side has reset + * @hw: pointer to the HW structure + * @mbx_id: id of mailbox to check + * + * returns SUCCESS if the Status bit was found or else ERR_MBX + **/ +s32 ixgbe_check_for_rst(struct ixgbe_hw *hw, u16 mbx_id) +{ + struct ixgbe_mbx_info *mbx = &hw->mbx; + s32 ret_val = IXGBE_ERR_CONFIG; + + DEBUGFUNC("ixgbe_check_for_rst"); + + if (mbx->ops[mbx_id].check_for_rst) + ret_val = mbx->ops[mbx_id].check_for_rst(hw, mbx_id); + + return ret_val; +} + +/** + * ixgbe_clear_mbx - Clear Mailbox Memory + * @hw: pointer to the HW structure + * @mbx_id: id of mailbox to write + * + * Set VFMBMEM of given VF to 0x0. + **/ +s32 ixgbe_clear_mbx(struct ixgbe_hw *hw, u16 mbx_id) +{ + struct ixgbe_mbx_info *mbx = &hw->mbx; + s32 ret_val = IXGBE_ERR_CONFIG; + + DEBUGFUNC("ixgbe_clear_mbx"); + + if (mbx->ops[mbx_id].clear) + ret_val = mbx->ops[mbx_id].clear(hw, mbx_id); + + return ret_val; +} + +/** + * ixgbe_poll_for_msg - Wait for message notification + * @hw: pointer to the HW structure + * @mbx_id: id of mailbox to write + * + * returns SUCCESS if it successfully received a message notification + **/ +STATIC s32 ixgbe_poll_for_msg(struct ixgbe_hw *hw, u16 mbx_id) +{ + struct ixgbe_mbx_info *mbx = &hw->mbx; + int countdown = mbx->timeout; + + DEBUGFUNC("ixgbe_poll_for_msg"); + + if (!countdown || !mbx->ops[mbx_id].check_for_msg) + return IXGBE_ERR_CONFIG; + + while (countdown && mbx->ops[mbx_id].check_for_msg(hw, mbx_id)) { + countdown--; + if (!countdown) + break; + usec_delay(mbx->usec_delay); + } + + if (countdown == 0) { + ERROR_REPORT2(IXGBE_ERROR_POLLING, + "Polling for VF%u mailbox message timedout", mbx_id); + return IXGBE_ERR_TIMEOUT; + } + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_poll_for_ack - Wait for message acknowledgment + * @hw: pointer to the HW structure + * @mbx_id: id of mailbox to write + * + * returns SUCCESS if it successfully received a message acknowledgment + **/ +STATIC s32 ixgbe_poll_for_ack(struct ixgbe_hw *hw, u16 mbx_id) +{ + struct ixgbe_mbx_info *mbx = &hw->mbx; + int countdown = mbx->timeout; + + DEBUGFUNC("ixgbe_poll_for_ack"); + + if (!countdown || !mbx->ops[mbx_id].check_for_ack) + return IXGBE_ERR_CONFIG; + + while (countdown && mbx->ops[mbx_id].check_for_ack(hw, mbx_id)) { + countdown--; + if (!countdown) + break; + usec_delay(mbx->usec_delay); + } + + if (countdown == 0) { + ERROR_REPORT2(IXGBE_ERROR_POLLING, + "Polling for VF%u mailbox ack timedout", mbx_id); + return IXGBE_ERR_TIMEOUT; + } + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_read_mailbox_vf - read VF's mailbox register + * @hw: pointer to the HW structure + * + * This function is used to read the mailbox register dedicated for VF without + * losing the read to clear status bits. + **/ +STATIC u32 ixgbe_read_mailbox_vf(struct ixgbe_hw *hw) +{ + u32 vf_mailbox = IXGBE_READ_REG(hw, IXGBE_VFMAILBOX); + + vf_mailbox |= hw->mbx.vf_mailbox; + hw->mbx.vf_mailbox |= vf_mailbox & IXGBE_VFMAILBOX_R2C_BITS; + + return vf_mailbox; +} + +STATIC void ixgbe_clear_msg_vf(struct ixgbe_hw *hw) +{ + u32 vf_mailbox = ixgbe_read_mailbox_vf(hw); + + if (vf_mailbox & IXGBE_VFMAILBOX_PFSTS) { + hw->mbx.stats.reqs++; + hw->mbx.vf_mailbox &= ~IXGBE_VFMAILBOX_PFSTS; + } +} + +STATIC void ixgbe_clear_ack_vf(struct ixgbe_hw *hw) +{ + u32 vf_mailbox = ixgbe_read_mailbox_vf(hw); + + if (vf_mailbox & IXGBE_VFMAILBOX_PFACK) { + hw->mbx.stats.acks++; + hw->mbx.vf_mailbox &= ~IXGBE_VFMAILBOX_PFACK; + } +} + +STATIC void ixgbe_clear_rst_vf(struct ixgbe_hw *hw) +{ + u32 vf_mailbox = ixgbe_read_mailbox_vf(hw); + + if (vf_mailbox & (IXGBE_VFMAILBOX_RSTI | IXGBE_VFMAILBOX_RSTD)) { + hw->mbx.stats.rsts++; + hw->mbx.vf_mailbox &= ~(IXGBE_VFMAILBOX_RSTI | + IXGBE_VFMAILBOX_RSTD); + } +} + +/** + * ixgbe_check_for_bit_vf - Determine if a status bit was set + * @hw: pointer to the HW structure + * @mask: bitmask for bits to be tested and cleared + * + * This function is used to check for the read to clear bits within + * the V2P mailbox. + **/ +STATIC s32 ixgbe_check_for_bit_vf(struct ixgbe_hw *hw, u32 mask) +{ + u32 vf_mailbox = ixgbe_read_mailbox_vf(hw); + + if (vf_mailbox & mask) + return IXGBE_SUCCESS; + + return IXGBE_ERR_MBX; +} + +/** + * ixgbe_check_for_msg_vf - checks to see if the PF has sent mail + * @hw: pointer to the HW structure + * @mbx_id: id of mailbox to check + * + * returns SUCCESS if the PF has set the Status bit or else ERR_MBX + **/ +STATIC s32 ixgbe_check_for_msg_vf(struct ixgbe_hw *hw, u16 mbx_id) +{ + UNREFERENCED_1PARAMETER(mbx_id); + DEBUGFUNC("ixgbe_check_for_msg_vf"); + + if (!ixgbe_check_for_bit_vf(hw, IXGBE_VFMAILBOX_PFSTS)) + return IXGBE_SUCCESS; + + return IXGBE_ERR_MBX; +} + +/** + * ixgbe_check_for_ack_vf - checks to see if the PF has ACK'd + * @hw: pointer to the HW structure + * @mbx_id: id of mailbox to check + * + * returns SUCCESS if the PF has set the ACK bit or else ERR_MBX + **/ +STATIC s32 ixgbe_check_for_ack_vf(struct ixgbe_hw *hw, u16 mbx_id) +{ + UNREFERENCED_1PARAMETER(mbx_id); + DEBUGFUNC("ixgbe_check_for_ack_vf"); + + if (!ixgbe_check_for_bit_vf(hw, IXGBE_VFMAILBOX_PFACK)) { + /* TODO: should this be autocleared? */ + ixgbe_clear_ack_vf(hw); + return IXGBE_SUCCESS; + } + + return IXGBE_ERR_MBX; +} + +/** + * ixgbe_check_for_rst_vf - checks to see if the PF has reset + * @hw: pointer to the HW structure + * @mbx_id: id of mailbox to check + * + * returns true if the PF has set the reset done bit or else false + **/ +STATIC s32 ixgbe_check_for_rst_vf(struct ixgbe_hw *hw, u16 mbx_id) +{ + UNREFERENCED_1PARAMETER(mbx_id); + DEBUGFUNC("ixgbe_check_for_rst_vf"); + + if (!ixgbe_check_for_bit_vf(hw, IXGBE_VFMAILBOX_RSTI | + IXGBE_VFMAILBOX_RSTD)) { + /* TODO: should this be autocleared? */ + ixgbe_clear_rst_vf(hw); + return IXGBE_SUCCESS; + } + + return IXGBE_ERR_MBX; +} + +/** + * ixgbe_obtain_mbx_lock_vf - obtain mailbox lock + * @hw: pointer to the HW structure + * + * return SUCCESS if we obtained the mailbox lock + **/ +STATIC s32 ixgbe_obtain_mbx_lock_vf(struct ixgbe_hw *hw) +{ + struct ixgbe_mbx_info *mbx = &hw->mbx; + int countdown = mbx->timeout; + s32 ret_val = IXGBE_ERR_MBX; + u32 vf_mailbox; + + DEBUGFUNC("ixgbe_obtain_mbx_lock_vf"); + + if (!mbx->timeout) + return IXGBE_ERR_CONFIG; + + while (countdown--) { + /* Reserve mailbox for VF use */ + vf_mailbox = ixgbe_read_mailbox_vf(hw); + vf_mailbox |= IXGBE_VFMAILBOX_VFU; + IXGBE_WRITE_REG(hw, IXGBE_VFMAILBOX, vf_mailbox); + + /* Verify that VF is the owner of the lock */ + if (ixgbe_read_mailbox_vf(hw) & IXGBE_VFMAILBOX_VFU) { + ret_val = IXGBE_SUCCESS; + break; + } + + /* Wait a bit before trying again */ + usec_delay(mbx->usec_delay); + } + + if (ret_val != IXGBE_SUCCESS) { + ERROR_REPORT1(IXGBE_ERROR_INVALID_STATE, + "Failed to obtain mailbox lock"); + ret_val = IXGBE_ERR_TIMEOUT; + } + + return ret_val; +} + +/** + * ixgbe_release_mbx_lock_dummy - release mailbox lock + * @hw: pointer to the HW structure + * @mbx_id: id of mailbox to read + **/ +STATIC void ixgbe_release_mbx_lock_dummy(struct ixgbe_hw *hw, u16 mbx_id) +{ + UNREFERENCED_2PARAMETER(hw, mbx_id); + + DEBUGFUNC("ixgbe_release_mbx_lock_dummy"); +} + +/** + * ixgbe_release_mbx_lock_vf - release mailbox lock + * @hw: pointer to the HW structure + * @mbx_id: id of mailbox to read + **/ +STATIC void ixgbe_release_mbx_lock_vf(struct ixgbe_hw *hw, u16 mbx_id) +{ + u32 vf_mailbox; + + UNREFERENCED_1PARAMETER(mbx_id); + + DEBUGFUNC("ixgbe_release_mbx_lock_vf"); + + /* Return ownership of the buffer */ + vf_mailbox = ixgbe_read_mailbox_vf(hw); + vf_mailbox &= ~IXGBE_VFMAILBOX_VFU; + IXGBE_WRITE_REG(hw, IXGBE_VFMAILBOX, vf_mailbox); +} + +/** + * ixgbe_write_mbx_vf_legacy - Write a message to the mailbox + * @hw: pointer to the HW structure + * @msg: The message buffer + * @size: Length of buffer + * @mbx_id: id of mailbox to write + * + * returns SUCCESS if it successfully copied message into the buffer + **/ +STATIC s32 ixgbe_write_mbx_vf_legacy(struct ixgbe_hw *hw, u32 *msg, u16 size, + u16 mbx_id) +{ + s32 ret_val; + u16 i; + + UNREFERENCED_1PARAMETER(mbx_id); + DEBUGFUNC("ixgbe_write_mbx_vf_legacy"); + + /* lock the mailbox to prevent pf/vf race condition */ + ret_val = ixgbe_obtain_mbx_lock_vf(hw); + if (ret_val) + return ret_val; + + /* flush msg and acks as we are overwriting the message buffer */ + ixgbe_check_for_msg_vf(hw, 0); + ixgbe_clear_msg_vf(hw); + ixgbe_check_for_ack_vf(hw, 0); + ixgbe_clear_ack_vf(hw); + + /* copy the caller specified message to the mailbox memory buffer */ + for (i = 0; i < size; i++) + IXGBE_WRITE_REG_ARRAY(hw, IXGBE_VFMBMEM, i, msg[i]); + + /* update stats */ + hw->mbx.stats.msgs_tx++; + + /* interrupt the PF to tell it a message has been sent */ + IXGBE_WRITE_REG(hw, IXGBE_VFMAILBOX, IXGBE_VFMAILBOX_REQ); + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_write_mbx_vf - Write a message to the mailbox + * @hw: pointer to the HW structure + * @msg: The message buffer + * @size: Length of buffer + * @mbx_id: id of mailbox to write + * + * returns SUCCESS if it successfully copied message into the buffer + **/ +STATIC s32 ixgbe_write_mbx_vf(struct ixgbe_hw *hw, u32 *msg, u16 size, + u16 mbx_id) +{ + u32 vf_mailbox; + s32 ret_val; + u16 i; + + UNREFERENCED_1PARAMETER(mbx_id); + + DEBUGFUNC("ixgbe_write_mbx_vf"); + + /* lock the mailbox to prevent pf/vf race condition */ + ret_val = ixgbe_obtain_mbx_lock_vf(hw); + if (ret_val) + goto out; + + /* flush msg and acks as we are overwriting the message buffer */ + ixgbe_clear_msg_vf(hw); + ixgbe_clear_ack_vf(hw); + + /* copy the caller specified message to the mailbox memory buffer */ + for (i = 0; i < size; i++) + IXGBE_WRITE_REG_ARRAY(hw, IXGBE_VFMBMEM, i, msg[i]); + + /* update stats */ + hw->mbx.stats.msgs_tx++; + + /* interrupt the PF to tell it a message has been sent */ + vf_mailbox = ixgbe_read_mailbox_vf(hw); + vf_mailbox |= IXGBE_VFMAILBOX_REQ; + IXGBE_WRITE_REG(hw, IXGBE_VFMAILBOX, vf_mailbox); + + /* if msg sent wait until we receive an ack */ + ixgbe_poll_for_ack(hw, mbx_id); + +out: + hw->mbx.ops[mbx_id].release(hw, mbx_id); + + return ret_val; +} + +/** + * ixgbe_read_mbx_vf_legacy - Reads a message from the inbox intended for vf + * @hw: pointer to the HW structure + * @msg: The message buffer + * @size: Length of buffer + * @mbx_id: id of mailbox to read + * + * returns SUCCESS if it successfully read message from buffer + **/ +STATIC s32 ixgbe_read_mbx_vf_legacy(struct ixgbe_hw *hw, u32 *msg, u16 size, + u16 mbx_id) +{ + s32 ret_val; + u16 i; + + DEBUGFUNC("ixgbe_read_mbx_vf_legacy"); + UNREFERENCED_1PARAMETER(mbx_id); + + /* lock the mailbox to prevent pf/vf race condition */ + ret_val = ixgbe_obtain_mbx_lock_vf(hw); + if (ret_val) + return ret_val; + + /* copy the message from the mailbox memory buffer */ + for (i = 0; i < size; i++) + msg[i] = IXGBE_READ_REG_ARRAY(hw, IXGBE_VFMBMEM, i); + + /* Acknowledge receipt and release mailbox, then we're done */ + IXGBE_WRITE_REG(hw, IXGBE_VFMAILBOX, IXGBE_VFMAILBOX_ACK); + + /* update stats */ + hw->mbx.stats.msgs_rx++; + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_read_mbx_vf - Reads a message from the inbox intended for vf + * @hw: pointer to the HW structure + * @msg: The message buffer + * @size: Length of buffer + * @mbx_id: id of mailbox to read + * + * returns SUCCESS if it successfully read message from buffer + **/ +STATIC s32 ixgbe_read_mbx_vf(struct ixgbe_hw *hw, u32 *msg, u16 size, + u16 mbx_id) +{ + u32 vf_mailbox; + s32 ret_val; + u16 i; + + DEBUGFUNC("ixgbe_read_mbx_vf"); + UNREFERENCED_1PARAMETER(mbx_id); + + /* check if there is a message from PF */ + ret_val = ixgbe_check_for_msg_vf(hw, 0); + if (ret_val != IXGBE_SUCCESS) + return IXGBE_ERR_MBX_NOMSG; + + ixgbe_clear_msg_vf(hw); + + /* copy the message from the mailbox memory buffer */ + for (i = 0; i < size; i++) + msg[i] = IXGBE_READ_REG_ARRAY(hw, IXGBE_VFMBMEM, i); + + /* Acknowledge receipt */ + vf_mailbox = ixgbe_read_mailbox_vf(hw); + vf_mailbox |= IXGBE_VFMAILBOX_ACK; + IXGBE_WRITE_REG(hw, IXGBE_VFMAILBOX, vf_mailbox); + + /* update stats */ + hw->mbx.stats.msgs_rx++; + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_init_mbx_params_vf - set initial values for vf mailbox + * @hw: pointer to the HW structure + * + * Initializes single set the hw->mbx struct to correct values for vf mailbox + * Set of legacy functions is being used here + */ +void ixgbe_init_mbx_params_vf(struct ixgbe_hw *hw) +{ + struct ixgbe_mbx_info *mbx = &hw->mbx; + + mbx->timeout = IXGBE_VF_MBX_INIT_TIMEOUT; + mbx->usec_delay = IXGBE_VF_MBX_INIT_DELAY; + + mbx->size = IXGBE_VFMAILBOX_SIZE; + + /* VF has only one mailbox connection, no need for more IDs */ + mbx->ops[0].release = ixgbe_release_mbx_lock_dummy; + mbx->ops[0].read = ixgbe_read_mbx_vf_legacy; + mbx->ops[0].write = ixgbe_write_mbx_vf_legacy; + mbx->ops[0].check_for_msg = ixgbe_check_for_msg_vf; + mbx->ops[0].check_for_ack = ixgbe_check_for_ack_vf; + mbx->ops[0].check_for_rst = ixgbe_check_for_rst_vf; + mbx->ops[0].clear = NULL; + + mbx->stats.msgs_tx = 0; + mbx->stats.msgs_rx = 0; + mbx->stats.reqs = 0; + mbx->stats.acks = 0; + mbx->stats.rsts = 0; +} + +/** + * ixgbe_upgrade_mbx_params_vf - set initial values for vf mailbox + * @hw: pointer to the HW structure + * + * Initializes the hw->mbx struct to correct values for vf mailbox + */ +void ixgbe_upgrade_mbx_params_vf(struct ixgbe_hw *hw) +{ + struct ixgbe_mbx_info *mbx = &hw->mbx; + + mbx->timeout = IXGBE_VF_MBX_INIT_TIMEOUT; + mbx->usec_delay = IXGBE_VF_MBX_INIT_DELAY; + + mbx->size = IXGBE_VFMAILBOX_SIZE; + + /* VF has only one mailbox connection, no need for more IDs */ + mbx->ops[0].release = ixgbe_release_mbx_lock_vf; + mbx->ops[0].read = ixgbe_read_mbx_vf; + mbx->ops[0].write = ixgbe_write_mbx_vf; + mbx->ops[0].check_for_msg = ixgbe_check_for_msg_vf; + mbx->ops[0].check_for_ack = ixgbe_check_for_ack_vf; + mbx->ops[0].check_for_rst = ixgbe_check_for_rst_vf; + mbx->ops[0].clear = NULL; + + mbx->stats.msgs_tx = 0; + mbx->stats.msgs_rx = 0; + mbx->stats.reqs = 0; + mbx->stats.acks = 0; + mbx->stats.rsts = 0; +} + +STATIC void ixgbe_clear_msg_pf(struct ixgbe_hw *hw, u16 vf_id) +{ + u32 vf_shift = IXGBE_PFMBICR_SHIFT(vf_id); + s32 index = IXGBE_PFMBICR_INDEX(vf_id); + u32 pfmbicr; + + pfmbicr = IXGBE_READ_REG(hw, IXGBE_PFMBICR(index)); + + if (pfmbicr & (IXGBE_PFMBICR_VFREQ_VF1 << vf_shift)) + hw->mbx.stats.reqs++; + + IXGBE_WRITE_REG(hw, IXGBE_PFMBICR(index), + IXGBE_PFMBICR_VFREQ_VF1 << vf_shift); +} + +STATIC void ixgbe_clear_ack_pf(struct ixgbe_hw *hw, u16 vf_id) +{ + u32 vf_shift = IXGBE_PFMBICR_SHIFT(vf_id); + s32 index = IXGBE_PFMBICR_INDEX(vf_id); + u32 pfmbicr; + + pfmbicr = IXGBE_READ_REG(hw, IXGBE_PFMBICR(index)); + + if (pfmbicr & (IXGBE_PFMBICR_VFACK_VF1 << vf_shift)) + hw->mbx.stats.acks++; + + IXGBE_WRITE_REG(hw, IXGBE_PFMBICR(index), + IXGBE_PFMBICR_VFACK_VF1 << vf_shift); +} + +STATIC s32 ixgbe_check_for_bit_pf(struct ixgbe_hw *hw, u32 mask, s32 index) +{ + u32 pfmbicr = IXGBE_READ_REG(hw, IXGBE_PFMBICR(index)); + + if (pfmbicr & mask) + return IXGBE_SUCCESS; + + return IXGBE_ERR_MBX; +} + +/** + * ixgbe_check_for_msg_pf - checks to see if the VF has sent mail + * @hw: pointer to the HW structure + * @vf_id: the VF index + * + * returns SUCCESS if the VF has set the Status bit or else ERR_MBX + **/ +STATIC s32 ixgbe_check_for_msg_pf(struct ixgbe_hw *hw, u16 vf_id) +{ + u32 vf_shift = IXGBE_PFMBICR_SHIFT(vf_id); + s32 index = IXGBE_PFMBICR_INDEX(vf_id); + + DEBUGFUNC("ixgbe_check_for_msg_pf"); + + if (!ixgbe_check_for_bit_pf(hw, IXGBE_PFMBICR_VFREQ_VF1 << vf_shift, + index)) + return IXGBE_SUCCESS; + + return IXGBE_ERR_MBX; +} + +/** + * ixgbe_check_for_ack_pf - checks to see if the VF has ACKed + * @hw: pointer to the HW structure + * @vf_id: the VF index + * + * returns SUCCESS if the VF has set the Status bit or else ERR_MBX + **/ +STATIC s32 ixgbe_check_for_ack_pf(struct ixgbe_hw *hw, u16 vf_id) +{ + u32 vf_shift = IXGBE_PFMBICR_SHIFT(vf_id); + s32 index = IXGBE_PFMBICR_INDEX(vf_id); + s32 ret_val = IXGBE_ERR_MBX; + + DEBUGFUNC("ixgbe_check_for_ack_pf"); + + if (!ixgbe_check_for_bit_pf(hw, IXGBE_PFMBICR_VFACK_VF1 << vf_shift, + index)) { + ret_val = IXGBE_SUCCESS; + /* TODO: should this be autocleared? */ + ixgbe_clear_ack_pf(hw, vf_id); + } + + return ret_val; +} + +/** + * ixgbe_check_for_rst_pf - checks to see if the VF has reset + * @hw: pointer to the HW structure + * @vf_id: the VF index + * + * returns SUCCESS if the VF has set the Status bit or else ERR_MBX + **/ +STATIC s32 ixgbe_check_for_rst_pf(struct ixgbe_hw *hw, u16 vf_id) +{ + u32 vf_shift = IXGBE_PFVFLRE_SHIFT(vf_id); + u32 index = IXGBE_PFVFLRE_INDEX(vf_id); + s32 ret_val = IXGBE_ERR_MBX; + u32 vflre = 0; + + DEBUGFUNC("ixgbe_check_for_rst_pf"); + + switch (hw->mac.type) { + case ixgbe_mac_82599EB: + vflre = IXGBE_READ_REG(hw, IXGBE_PFVFLRE(index)); + break; + case ixgbe_mac_X550: + case ixgbe_mac_X550EM_x: + case ixgbe_mac_X550EM_a: + case ixgbe_mac_X540: + case ixgbe_mac_E610: + vflre = IXGBE_READ_REG(hw, IXGBE_PFVFLREC(index)); + break; + default: + break; + } + + if (vflre & (1 << vf_shift)) { + ret_val = IXGBE_SUCCESS; + IXGBE_WRITE_REG(hw, IXGBE_PFVFLREC(index), (1 << vf_shift)); + hw->mbx.stats.rsts++; + } + + return ret_val; +} + +/** + * ixgbe_obtain_mbx_lock_pf - obtain mailbox lock + * @hw: pointer to the HW structure + * @vf_id: the VF index + * + * return SUCCESS if we obtained the mailbox lock + **/ +STATIC s32 ixgbe_obtain_mbx_lock_pf(struct ixgbe_hw *hw, u16 vf_id) +{ + struct ixgbe_mbx_info *mbx = &hw->mbx; + int countdown = mbx->timeout; + s32 ret_val = IXGBE_ERR_MBX; + u32 pf_mailbox; + + DEBUGFUNC("ixgbe_obtain_mbx_lock_pf"); + + if (!mbx->timeout) + return IXGBE_ERR_CONFIG; + + while (countdown--) { + /* Reserve mailbox for PF use */ + pf_mailbox = IXGBE_READ_REG(hw, IXGBE_PFMAILBOX(vf_id)); + + /* Check if other thread holds the PF lock already */ + if (pf_mailbox & IXGBE_PFMAILBOX_PFU) + goto retry; + + pf_mailbox |= IXGBE_PFMAILBOX_PFU; + IXGBE_WRITE_REG(hw, IXGBE_PFMAILBOX(vf_id), pf_mailbox); + + /* Verify that PF is the owner of the lock */ + pf_mailbox = IXGBE_READ_REG(hw, IXGBE_PFMAILBOX(vf_id)); + if (pf_mailbox & IXGBE_PFMAILBOX_PFU) { + ret_val = IXGBE_SUCCESS; + break; + } + + retry: + /* Wait a bit before trying again */ + usec_delay(mbx->usec_delay); + } + + if (ret_val != IXGBE_SUCCESS) { + ERROR_REPORT1(IXGBE_ERROR_INVALID_STATE, + "Failed to obtain mailbox lock"); + ret_val = IXGBE_ERR_TIMEOUT; + } + + return ret_val; +} + +/** + * ixgbe_release_mbx_lock_pf - release mailbox lock + * @hw: pointer to the HW structure + * @vf_id: the VF index + **/ +STATIC void ixgbe_release_mbx_lock_pf(struct ixgbe_hw *hw, u16 vf_id) +{ + u32 pf_mailbox; + + DEBUGFUNC("ixgbe_release_mbx_lock_pf"); + + /* Return ownership of the buffer */ + pf_mailbox = IXGBE_READ_REG(hw, IXGBE_PFMAILBOX(vf_id)); + pf_mailbox &= ~IXGBE_PFMAILBOX_PFU; + IXGBE_WRITE_REG(hw, IXGBE_PFMAILBOX(vf_id), pf_mailbox); +} + +/** + * ixgbe_write_mbx_pf_legacy - Places a message in the mailbox + * @hw: pointer to the HW structure + * @msg: The message buffer + * @size: Length of buffer + * @vf_id: the VF index + * + * returns SUCCESS if it successfully copied message into the buffer + **/ +STATIC s32 ixgbe_write_mbx_pf_legacy(struct ixgbe_hw *hw, u32 *msg, u16 size, + u16 vf_id) +{ + s32 ret_val; + u16 i; + + DEBUGFUNC("ixgbe_write_mbx_pf_legacy"); + + /* lock the mailbox to prevent pf/vf race condition */ + ret_val = ixgbe_obtain_mbx_lock_pf(hw, vf_id); + if (ret_val) + return ret_val; + + /* flush msg and acks as we are overwriting the message buffer */ + ixgbe_check_for_msg_pf(hw, vf_id); + ixgbe_clear_msg_pf(hw, vf_id); + ixgbe_check_for_ack_pf(hw, vf_id); + ixgbe_clear_ack_pf(hw, vf_id); + + /* copy the caller specified message to the mailbox memory buffer */ + for (i = 0; i < size; i++) + IXGBE_WRITE_REG_ARRAY(hw, IXGBE_PFMBMEM(vf_id), i, msg[i]); + + /* Interrupt VF to tell it a message has been sent and release buffer*/ + IXGBE_WRITE_REG(hw, IXGBE_PFMAILBOX(vf_id), IXGBE_PFMAILBOX_STS); + + /* update stats */ + hw->mbx.stats.msgs_tx++; + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_write_mbx_pf - Places a message in the mailbox + * @hw: pointer to the HW structure + * @msg: The message buffer + * @size: Length of buffer + * @vf_id: the VF index + * + * returns SUCCESS if it successfully copied message into the buffer + **/ +STATIC s32 ixgbe_write_mbx_pf(struct ixgbe_hw *hw, u32 *msg, u16 size, + u16 vf_id) +{ + u32 pf_mailbox; + s32 ret_val; + u16 i; + + DEBUGFUNC("ixgbe_write_mbx_pf"); + + /* lock the mailbox to prevent pf/vf race condition */ + ret_val = ixgbe_obtain_mbx_lock_pf(hw, vf_id); + if (ret_val) + goto out; + + /* flush msg and acks as we are overwriting the message buffer */ + ixgbe_clear_msg_pf(hw, vf_id); + ixgbe_clear_ack_pf(hw, vf_id); + + /* copy the caller specified message to the mailbox memory buffer */ + for (i = 0; i < size; i++) + IXGBE_WRITE_REG_ARRAY(hw, IXGBE_PFMBMEM(vf_id), i, msg[i]); + + /* interrupt VF to tell it a message has been sent */ + pf_mailbox = IXGBE_READ_REG(hw, IXGBE_PFMAILBOX(vf_id)); + pf_mailbox |= IXGBE_PFMAILBOX_STS; + IXGBE_WRITE_REG(hw, IXGBE_PFMAILBOX(vf_id), pf_mailbox); + + /* if msg sent wait until we receive an ack */ + if (msg[0] & IXGBE_VT_MSGTYPE_CTS) + ixgbe_poll_for_ack(hw, vf_id); + + /* update stats */ + hw->mbx.stats.msgs_tx++; + +out: + hw->mbx.ops[vf_id].release(hw, vf_id); + + return ret_val; + +} + +/** + * ixgbe_read_mbx_pf_legacy - Read a message from the mailbox + * @hw: pointer to the HW structure + * @msg: The message buffer + * @size: Length of buffer + * @vf_id: the VF index + * + * This function copies a message from the mailbox buffer to the caller's + * memory buffer. The presumption is that the caller knows that there was + * a message due to a VF request so no polling for message is needed. + **/ +STATIC s32 ixgbe_read_mbx_pf_legacy(struct ixgbe_hw *hw, u32 *msg, u16 size, + u16 vf_id) +{ + s32 ret_val; + u16 i; + + DEBUGFUNC("ixgbe_read_mbx_pf_legacy"); + + /* lock the mailbox to prevent pf/vf race condition */ + ret_val = ixgbe_obtain_mbx_lock_pf(hw, vf_id); + if (ret_val != IXGBE_SUCCESS) + return ret_val; + + /* copy the message to the mailbox memory buffer */ + for (i = 0; i < size; i++) + msg[i] = IXGBE_READ_REG_ARRAY(hw, IXGBE_PFMBMEM(vf_id), i); + + /* Acknowledge the message and release buffer */ + IXGBE_WRITE_REG(hw, IXGBE_PFMAILBOX(vf_id), IXGBE_PFMAILBOX_ACK); + + /* update stats */ + hw->mbx.stats.msgs_rx++; + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_read_mbx_pf - Read a message from the mailbox + * @hw: pointer to the HW structure + * @msg: The message buffer + * @size: Length of buffer + * @vf_id: the VF index + * + * This function copies a message from the mailbox buffer to the caller's + * memory buffer. The presumption is that the caller knows that there was + * a message due to a VF request so no polling for message is needed. + **/ +STATIC s32 ixgbe_read_mbx_pf(struct ixgbe_hw *hw, u32 *msg, u16 size, + u16 vf_id) +{ + u32 pf_mailbox; + s32 ret_val; + u16 i; + + DEBUGFUNC("ixgbe_read_mbx_pf"); + + /* check if there is a message from VF */ + ret_val = ixgbe_check_for_msg_pf(hw, vf_id); + if (ret_val != IXGBE_SUCCESS) + return IXGBE_ERR_MBX_NOMSG; + + ixgbe_clear_msg_pf(hw, vf_id); + + /* copy the message to the mailbox memory buffer */ + for (i = 0; i < size; i++) + msg[i] = IXGBE_READ_REG_ARRAY(hw, IXGBE_PFMBMEM(vf_id), i); + + /* Acknowledge the message and release buffer */ + pf_mailbox = IXGBE_READ_REG(hw, IXGBE_PFMAILBOX(vf_id)); + pf_mailbox |= IXGBE_PFMAILBOX_ACK; + IXGBE_WRITE_REG(hw, IXGBE_PFMAILBOX(vf_id), pf_mailbox); + + /* update stats */ + hw->mbx.stats.msgs_rx++; + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_clear_mbx_pf - Clear Mailbox Memory + * @hw: pointer to the HW structure + * @vf_id: the VF index + * + * Set VFMBMEM of given VF to 0x0. + **/ +STATIC s32 ixgbe_clear_mbx_pf(struct ixgbe_hw *hw, u16 vf_id) +{ + u16 mbx_size = hw->mbx.size; + u16 i; + + if (vf_id > 63) + return IXGBE_ERR_PARAM; + + for (i = 0; i < mbx_size; ++i) + IXGBE_WRITE_REG_ARRAY(hw, IXGBE_PFMBMEM(vf_id), i, 0x0); + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_init_mbx_params_pf_id - set initial values for pf mailbox + * @hw: pointer to the HW structure + * @vf_id: the VF index + * + * Initializes single set of the hw->mbx struct to correct values for pf mailbox + * Set of legacy functions is being used here + */ +void ixgbe_init_mbx_params_pf_id(struct ixgbe_hw *hw, u16 vf_id) +{ + struct ixgbe_mbx_info *mbx = &hw->mbx; + + mbx->ops[vf_id].release = ixgbe_release_mbx_lock_dummy; + mbx->ops[vf_id].read = ixgbe_read_mbx_pf_legacy; + mbx->ops[vf_id].write = ixgbe_write_mbx_pf_legacy; + mbx->ops[vf_id].check_for_msg = ixgbe_check_for_msg_pf; + mbx->ops[vf_id].check_for_ack = ixgbe_check_for_ack_pf; + mbx->ops[vf_id].check_for_rst = ixgbe_check_for_rst_pf; + mbx->ops[vf_id].clear = ixgbe_clear_mbx_pf; +} + +/** + * ixgbe_init_mbx_params_pf - set initial values for pf mailbox + * @hw: pointer to the HW structure + * + * Initializes all sets of the hw->mbx struct to correct values for pf + * mailbox. One set corresponds to single VF. It also initializes counters + * and general variables. A set of legacy functions is used by default. + */ +void ixgbe_init_mbx_params_pf(struct ixgbe_hw *hw) +{ + u16 i; + struct ixgbe_mbx_info *mbx = &hw->mbx; + + /* Ensure we are not calling this function from VF */ + if (hw->mac.type != ixgbe_mac_82599EB && + hw->mac.type != ixgbe_mac_X550 && + hw->mac.type != ixgbe_mac_X550EM_x && + hw->mac.type != ixgbe_mac_X550EM_a && + hw->mac.type != ixgbe_mac_X540 && + !ixgbe_is_mac_E6xx(hw->mac.type)) + return; + + /* Initialize common mailbox settings */ + mbx->timeout = IXGBE_VF_MBX_INIT_TIMEOUT; + mbx->usec_delay = IXGBE_VF_MBX_INIT_DELAY; + mbx->size = IXGBE_VFMAILBOX_SIZE; + + /* Initialize counters with zeroes */ + mbx->stats.msgs_tx = 0; + mbx->stats.msgs_rx = 0; + mbx->stats.reqs = 0; + mbx->stats.acks = 0; + mbx->stats.rsts = 0; + + /* No matter of VF number, we initialize params for all 64 VFs. */ + /* TODO: 1. Add a define for max VF and refactor SHARED to get rid + * of magic number for that (63 or 64 depending on use case.) + * 2. rewrite the code to dynamically allocate mbx->ops[vf_id] for + * certain number of VFs instead of default maximum value of 64 (0..63) + */ + for (i = 0; i < 64; i++) + ixgbe_init_mbx_params_pf_id(hw, i); +} + +/** + * ixgbe_upgrade_mbx_params_pf - Upgrade initial values for pf mailbox + * @hw: pointer to the HW structure + * @vf_id: the VF index + * + * Initializes the hw->mbx struct to new function set for improved + * stability and handling of messages. + */ +void ixgbe_upgrade_mbx_params_pf(struct ixgbe_hw *hw, u16 vf_id) +{ + struct ixgbe_mbx_info *mbx = &hw->mbx; + + /* Ensure we are not calling this function from VF */ + if (hw->mac.type != ixgbe_mac_82599EB && + hw->mac.type != ixgbe_mac_X550 && + hw->mac.type != ixgbe_mac_X550EM_x && + hw->mac.type != ixgbe_mac_X550EM_a && + hw->mac.type != ixgbe_mac_X540 && + !ixgbe_is_mac_E6xx(hw->mac.type)) + return; + + mbx->timeout = IXGBE_VF_MBX_INIT_TIMEOUT; + mbx->usec_delay = IXGBE_VF_MBX_INIT_DELAY; + mbx->size = IXGBE_VFMAILBOX_SIZE; + + mbx->ops[vf_id].release = ixgbe_release_mbx_lock_pf; + mbx->ops[vf_id].read = ixgbe_read_mbx_pf; + mbx->ops[vf_id].write = ixgbe_write_mbx_pf; + mbx->ops[vf_id].check_for_msg = ixgbe_check_for_msg_pf; + mbx->ops[vf_id].check_for_ack = ixgbe_check_for_ack_pf; + mbx->ops[vf_id].check_for_rst = ixgbe_check_for_rst_pf; + mbx->ops[vf_id].clear = ixgbe_clear_mbx_pf; + + mbx->stats.msgs_tx = 0; + mbx->stats.msgs_rx = 0; + mbx->stats.reqs = 0; + mbx->stats.acks = 0; + mbx->stats.rsts = 0; +} diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_mbx.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_mbx.h new file mode 100644 index 00000000000..9ace3ed24ac --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_mbx.h @@ -0,0 +1,191 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 1999 - 2026 Intel Corporation */ + +#ifndef _IXGBE_MBX_H_ +#define _IXGBE_MBX_H_ + +struct ixgbe_hw; + +struct ixgbe_mbx_operations { + void (*init_params)(struct ixgbe_hw *hw); + void (*release)(struct ixgbe_hw *hw, u16 mbx_id); + s32 (*read)(struct ixgbe_hw *hw, u32 *msg, u16 size, u16 mbx_id); + s32 (*write)(struct ixgbe_hw *hw, u32 *msg, u16 size, u16 mbx_id); + s32 (*check_for_msg)(struct ixgbe_hw *hw, u16 vf_number); + s32 (*check_for_ack)(struct ixgbe_hw *hw, u16 vf_number); + s32 (*check_for_rst)(struct ixgbe_hw *hw, u16 vf_number); + s32 (*clear)(struct ixgbe_hw *hw, u16 vf_number); +}; + +struct ixgbe_mbx_stats { + u32 msgs_tx; + u32 msgs_rx; + + u32 acks; + u32 reqs; + u32 rsts; +}; + +struct ixgbe_mbx_info { + /* + * PF: One set of operations for each VF to handle various API versions + * at the same time + * VF: Only the very first (0) set should be used + */ + struct ixgbe_mbx_operations ops[64]; + struct ixgbe_mbx_stats stats; + u32 timeout; + u32 usec_delay; + u32 vf_mailbox; + u16 size; +}; + +#define IXGBE_VFMAILBOX_SIZE 16 /* 16 32 bit words - 64 bytes */ + +#define IXGBE_VFMAILBOX 0x002FC +#define IXGBE_VFMBMEM 0x00200 + +/* Define mailbox register bits */ +#define IXGBE_VFMAILBOX_REQ 0x00000001 /* Request for PF Ready bit */ +#define IXGBE_VFMAILBOX_ACK 0x00000002 /* Ack PF message received */ +#define IXGBE_VFMAILBOX_VFU 0x00000004 /* VF owns the mailbox buffer */ +#define IXGBE_VFMAILBOX_PFU 0x00000008 /* PF owns the mailbox buffer */ +#define IXGBE_VFMAILBOX_PFSTS 0x00000010 /* PF wrote a message in the MB */ +#define IXGBE_VFMAILBOX_PFACK 0x00000020 /* PF ack the previous VF msg */ +#define IXGBE_VFMAILBOX_RSTI 0x00000040 /* PF has reset indication */ +#define IXGBE_VFMAILBOX_RSTD 0x00000080 /* PF has indicated reset done */ +#define IXGBE_VFMAILBOX_R2C_BITS 0x000000B0 /* All read to clear bits */ + +#define IXGBE_PFMAILBOX_STS 0x00000001 /* Initiate message send to VF */ +#define IXGBE_PFMAILBOX_ACK 0x00000002 /* Ack message recv'd from VF */ +#define IXGBE_PFMAILBOX_VFU 0x00000004 /* VF owns the mailbox buffer */ +#define IXGBE_PFMAILBOX_PFU 0x00000008 /* PF owns the mailbox buffer */ +#define IXGBE_PFMAILBOX_RVFU 0x00000010 /* Reset VFU - used when VF stuck */ + +#define IXGBE_PFMBICR_VFREQ_MASK 0x0000FFFF /* bits for VF messages */ +#define IXGBE_PFMBICR_VFREQ_VF1 0x00000001 /* bit for VF 1 message */ +#define IXGBE_PFMBICR_VFACK_MASK 0xFFFF0000 /* bits for VF acks */ +#define IXGBE_PFMBICR_VFACK_VF1 0x00010000 /* bit for VF 1 ack */ + +/* If it's a IXGBE_VF_* msg then it originates in the VF and is sent to the + * PF. The reverse is true if it is IXGBE_PF_*. + * Message results are the value or'd with 0xF0000000 + */ +#define IXGBE_VT_MSGTYPE_SUCCESS 0x80000000 /* Messages or'd with this + * have succeeded + */ +#define IXGBE_VT_MSGTYPE_FAILURE 0x40000000 /* Messages or'd with this + * have failed + */ +#define IXGBE_VT_MSGTYPE_CTS 0x20000000 /* Indicates that VF is still + * clear to send requests + */ +#define IXGBE_VT_MSGINFO_SHIFT 16 +/* bits 23:16 are used for extra info for certain messages */ +#define IXGBE_VT_MSGINFO_MASK (0xFF << IXGBE_VT_MSGINFO_SHIFT) + +/* definitions to support mailbox API version negotiation */ + +/* + * each element denotes a version of the API; existing numbers may not + * change; any additions must go at the end + */ +enum ixgbe_pfvf_api_rev { + ixgbe_mbox_api_10, /* API version 1.0, linux/freebsd VF driver */ + ixgbe_mbox_api_20, /* API version 2.0, solaris Phase1 VF driver */ + ixgbe_mbox_api_11, /* API version 1.1, linux/freebsd VF driver */ + ixgbe_mbox_api_12, /* API version 1.2, linux/freebsd VF driver */ + ixgbe_mbox_api_13, /* API version 1.3, linux/freebsd VF driver */ + /* API 1.4 is being used in the upstream for IPsec */ + ixgbe_mbox_api_14, /* API version 1.4, linux/freebsd VF driver */ + ixgbe_mbox_api_15, /* API version 1.5, linux/freebsd VF driver */ + ixgbe_mbox_api_16, /* API version 1.6, linux/freebsd VF driver */ + ixgbe_mbox_api_17, /* API version 1.7, linux/freebsd VF driver */ + /* This value should always be last */ + ixgbe_mbox_api_unknown, /* indicates that API version is not known */ +}; + +/* mailbox API, legacy requests */ +#define IXGBE_VF_RESET 0x01 /* VF requests reset */ +#define IXGBE_VF_SET_MAC_ADDR 0x02 /* VF requests PF to set MAC addr */ +#define IXGBE_VF_SET_MULTICAST 0x03 /* VF requests PF to set MC addr */ +#define IXGBE_VF_SET_VLAN 0x04 /* VF requests PF to set VLAN */ + +/* mailbox API, version 1.0 VF requests */ +#define IXGBE_VF_SET_LPE 0x05 /* VF requests PF to set VMOLR.LPE */ +#define IXGBE_VF_SET_MACVLAN 0x06 /* VF requests PF for unicast filter */ +#define IXGBE_VF_API_NEGOTIATE 0x08 /* negotiate API version */ + +/* mailbox API, version 1.1 VF requests */ +#define IXGBE_VF_GET_QUEUES 0x09 /* get queue configuration */ + +/* mailbox API, version 1.2 VF requests */ +#define IXGBE_VF_GET_RETA 0x0a /* VF request for RETA */ +#define IXGBE_VF_GET_RSS_KEY 0x0b /* get RSS key */ +#define IXGBE_VF_UPDATE_XCAST_MODE 0x0c +#define IXGBE_VF_GET_LINK_STATE 0x10 /* get vf link state */ + +/* mailbox API, version 1.6 VF requests */ +#define IXGBE_VF_GET_PF_LINK_STATE 0x11 /* get status of the link on PF */ + +/* mailbox API, version 1.7 VF requests */ +#define IXGBE_VF_FEATURES_NEGOTIATE 0x12 /* get features supported by PF */ + +/* Negotiable features */ +#define IXGBEVF_PF_SUP_IPSEC BIT(0) +#define IXGBEVF_PF_SUP_ESX_MBX BIT(1) + +/* Features supported by IXGBE driver */ +#define IXGBEVF_SUPPORTED_FEATURES IXGBEVF_PF_SUP_ESX_MBX + +/* mode choices for IXGBE_VF_UPDATE_XCAST_MODE */ +enum ixgbevf_xcast_modes { + IXGBEVF_XCAST_MODE_NONE = 0, + IXGBEVF_XCAST_MODE_MULTI, + IXGBEVF_XCAST_MODE_ALLMULTI, + IXGBEVF_XCAST_MODE_PROMISC, +}; + +/* GET_QUEUES return data indices within the mailbox */ +#define IXGBE_VF_TX_QUEUES 1 /* number of Tx queues supported */ +#define IXGBE_VF_RX_QUEUES 2 /* number of Rx queues supported */ +#define IXGBE_VF_TRANS_VLAN 3 /* Indication of port vlan */ +#define IXGBE_VF_DEF_QUEUE 4 /* Default queue offset */ + +/* length of permanent address message returned from PF */ +#define IXGBE_VF_PERMADDR_MSG_LEN 4 +/* word in permanent address message with the current multicast type */ +#define IXGBE_VF_MC_TYPE_WORD 3 + +#define IXGBE_PF_CONTROL_MSG 0x0100 /* PF control message */ + +/* mailbox API, version 2.0 VF requests */ +#define IXGBE_VF_API_NEGOTIATE 0x08 /* negotiate API version */ +#define IXGBE_VF_GET_QUEUES 0x09 /* get queue configuration */ +#define IXGBE_VF_ENABLE_MACADDR 0x0A /* enable MAC address */ +#define IXGBE_VF_DISABLE_MACADDR 0x0B /* disable MAC address */ +#define IXGBE_VF_GET_MACADDRS 0x0C /* get all configured MAC addrs */ +#define IXGBE_VF_SET_MCAST_PROMISC 0x0D /* enable multicast promiscuous */ +#define IXGBE_VF_GET_MTU 0x0E /* get bounds on MTU */ +#define IXGBE_VF_SET_MTU 0x0F /* set a specific MTU */ + +/* mailbox API, version 2.0 PF requests */ +#define IXGBE_PF_TRANSPARENT_VLAN 0x0101 /* enable transparent vlan */ + +#define IXGBE_VF_MBX_INIT_TIMEOUT 2000 /* number of retries on mailbox */ +#define IXGBE_VF_MBX_INIT_DELAY 500 /* microseconds between retries */ + +s32 ixgbe_read_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size, u16 mbx_id); +s32 ixgbe_poll_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size, u16 mbx_id); +s32 ixgbe_write_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size, u16 mbx_id); +s32 ixgbe_check_for_msg(struct ixgbe_hw *hw, u16 mbx_id); +s32 ixgbe_check_for_ack(struct ixgbe_hw *hw, u16 mbx_id); +s32 ixgbe_check_for_rst(struct ixgbe_hw *hw, u16 mbx_id); +s32 ixgbe_clear_mbx(struct ixgbe_hw *hw, u16 vf_number); +void ixgbe_init_mbx_params_vf(struct ixgbe_hw *); +void ixgbe_upgrade_mbx_params_vf(struct ixgbe_hw *hw); +void ixgbe_init_mbx_params_pf(struct ixgbe_hw *hw); +void ixgbe_init_mbx_params_pf_id(struct ixgbe_hw *hw, u16 vf_id); +void ixgbe_upgrade_mbx_params_pf(struct ixgbe_hw *hw, u16 vf_id); + +#endif /* _IXGBE_MBX_H_ */ diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_model.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_model.h new file mode 100644 index 00000000000..778b82343f0 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_model.h @@ -0,0 +1,99 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 1999 - 2026 Intel Corporation */ + +#ifndef _IXGBE_MODEL_H_ +#define _IXGBE_MODEL_H_ + +#include "ixgbe.h" +#include "ixgbe_type.h" + +struct ixgbe_mat_field { + unsigned int off; + int (*val)(struct ixgbe_fdir_filter *input, + union ixgbe_atr_input *mask, + u32 val, u32 m); + unsigned int type; +}; + +struct ixgbe_jump_table { + struct ixgbe_mat_field *mat; + struct ixgbe_fdir_filter *input; + union ixgbe_atr_input *mask; + u32 link_hdl; + unsigned long child_loc_map[32]; +}; + +#define IXGBE_MAX_HW_ENTRIES 2045 + +static inline int ixgbe_mat_prgm_sip(struct ixgbe_fdir_filter *input, + union ixgbe_atr_input *mask, + u32 val, u32 m) +{ + input->filter.formatted.src_ip[0] = val; + mask->formatted.src_ip[0] = m; + return 0; +} + +static inline int ixgbe_mat_prgm_dip(struct ixgbe_fdir_filter *input, + union ixgbe_atr_input *mask, + u32 val, u32 m) +{ + input->filter.formatted.dst_ip[0] = val; + mask->formatted.dst_ip[0] = m; + return 0; +} + +static struct ixgbe_mat_field ixgbe_ipv4_fields[] = { + { .off = 12, .val = ixgbe_mat_prgm_sip, + .type = IXGBE_ATR_FLOW_TYPE_IPV4}, + { .off = 16, .val = ixgbe_mat_prgm_dip, + .type = IXGBE_ATR_FLOW_TYPE_IPV4}, + { .val = NULL } /* terminal node */ +}; + +static inline int ixgbe_mat_prgm_ports(struct ixgbe_fdir_filter *input, + union ixgbe_atr_input *mask, + u32 val, u32 m) +{ + input->filter.formatted.src_port = val & 0xffff; + mask->formatted.src_port = m & 0xffff; + + input->filter.formatted.dst_port = val >> 16; + mask->formatted.dst_port = m >> 16; + + return 0; +}; + +static struct ixgbe_mat_field ixgbe_tcp_fields[] = { + {.off = 0, .val = ixgbe_mat_prgm_ports, + .type = IXGBE_ATR_FLOW_TYPE_TCPV4}, + { .val = NULL } /* terminal node */ +}; + +static struct ixgbe_mat_field ixgbe_udp_fields[] = { + {.off = 0, .val = ixgbe_mat_prgm_ports, + .type = IXGBE_ATR_FLOW_TYPE_UDPV4}, + { .val = NULL } /* terminal node */ +}; + +struct ixgbe_nexthdr { + /* offset, shift, and mask of position to next header */ + unsigned int o; + u32 s; + u32 m; + /* match criteria to make this jump*/ + unsigned int off; + u32 val; + u32 mask; + /* location of jump to make */ + struct ixgbe_mat_field *jump; +}; + +static struct ixgbe_nexthdr ixgbe_ipv4_jumps[] = { + { .o = 0, .s = 6, .m = 0xf, + .off = 8, .val = 0x600, .mask = 0xff00, .jump = ixgbe_tcp_fields}, + { .o = 0, .s = 6, .m = 0xf, + .off = 8, .val = 0x1100, .mask = 0xff00, .jump = ixgbe_udp_fields}, + { .jump = NULL } /* terminal node */ +}; +#endif /* _IXGBE_MODEL_H_ */ diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_osdep.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_osdep.h new file mode 100644 index 00000000000..34ce24b5df7 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_osdep.h @@ -0,0 +1,188 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 1999 - 2026 Intel Corporation */ + +/* glue for the OS independent part of ixgbe + * includes register access macros + */ + +#ifndef _IXGBE_OSDEP_H_ +#define _IXGBE_OSDEP_H_ + +#include "kcompat.h" +#include +#include +#include +#include +#include + +#define IXGBE_CPU_TO_BE16(_x) cpu_to_be16(_x) +#define IXGBE_BE16_TO_CPU(_x) be16_to_cpu(_x) +#define IXGBE_CPU_TO_BE32(_x) cpu_to_be32(_x) +#define IXGBE_BE32_TO_CPU(_x) be32_to_cpu(_x) + +#define msec_delay(_x) msleep(_x) + +#define usec_delay(_x) udelay(_x) + +#define STATIC static + +#define IOMEM __iomem + +#ifdef DBG +#define ASSERT(_x) BUG_ON(!(_x)) +#else +#define ASSERT(_x) do {} while (0) +#endif + +#define DEBUGFUNC(S) do {} while (0) + +#define IXGBE_SFP_DETECT_RETRIES 2 + +struct ixgbe_hw; +struct ixgbe_msg { + u16 msg_enable; +}; +struct net_device *ixgbe_hw_to_netdev(const struct ixgbe_hw *hw); +struct ixgbe_msg *ixgbe_hw_to_msg(const struct ixgbe_hw *hw); + +#define ixgbe_info_fwlog(hw, rowsize, groupsize, buf, len) \ + print_hex_dump(KERN_INFO, " FWLOG: ", DUMP_PREFIX_NONE, \ + rowsize, groupsize, buf, len, false) + +#define hw_dbg(hw, format, arg...) \ + netdev_dbg(ixgbe_hw_to_netdev(hw), format, ## arg) +#define hw_err(hw, format, arg...) \ + netdev_err(ixgbe_hw_to_netdev(hw), format, ## arg) +#define e_dev_info(format, arg...) \ + dev_info(ixgbe_pf_to_dev(adapter), format, ## arg) +#define e_dev_warn(format, arg...) \ + dev_warn(ixgbe_pf_to_dev(adapter), format, ## arg) +#define e_dev_err(format, arg...) \ + dev_err(ixgbe_pf_to_dev(adapter), format, ## arg) +#define e_dev_notice(format, arg...) \ + dev_notice(ixgbe_pf_to_dev(adapter), format, ## arg) +#define e_dbg(msglvl, format, arg...) \ + netif_dbg(adapter, msglvl, adapter->netdev, format, ## arg) +#define e_info(msglvl, format, arg...) \ + netif_info(adapter, msglvl, adapter->netdev, format, ## arg) +#define e_err(msglvl, format, arg...) \ + netif_err(adapter, msglvl, adapter->netdev, format, ## arg) +#define e_warn(msglvl, format, arg...) \ + netif_warn(adapter, msglvl, adapter->netdev, format, ## arg) +#define e_crit(msglvl, format, arg...) \ + netif_crit(adapter, msglvl, adapter->netdev, format, ## arg) + +#define IXGBE_DEAD_READ_RETRIES 10 +#define IXGBE_DEAD_READ_REG 0xdeadbeefU +#define IXGBE_FAILED_READ_REG 0xffffffffU +#define IXGBE_FAILED_READ_RETRIES 5 +#define IXGBE_FAILED_READ_CFG_DWORD 0xffffffffU +#define IXGBE_FAILED_READ_CFG_WORD 0xffffU +#define IXGBE_FAILED_READ_CFG_BYTE 0xffU + +#define IXGBE_WRITE_REG_ARRAY(a, reg, offset, value) \ + IXGBE_WRITE_REG((a), (reg) + ((offset) << 2), (value)) + +#define IXGBE_READ_REG(h, r) ixgbe_read_reg(h, r, false) +#define IXGBE_R32_Q(h, r) ixgbe_read_reg(h, r, true) +#define IXGBE_R8_Q(h, r) readb(READ_ONCE(h->hw_addr) + r) + +#define IXGBE_READ_REG_ARRAY(a, reg, offset) ( \ + IXGBE_READ_REG((a), (reg) + ((offset) << 2))) + +#ifndef writeq +#define writeq(val, addr) do { writel((u32) (val), addr); \ + writel((u32) (val >> 32), (addr + 4)); \ + } while (0); +#endif + +#define IXGBE_WRITE_FLUSH(a) IXGBE_READ_REG(a, IXGBE_STATUS) + +u32 ixgbe_read_reg(struct ixgbe_hw *, u32 reg, bool quiet); +extern u16 ixgbe_read_pci_cfg_word(struct ixgbe_hw *hw, u32 reg); +extern void ixgbe_write_pci_cfg_word(struct ixgbe_hw *hw, u32 reg, u16 value); +extern void ewarn(struct ixgbe_hw *hw, const char *str); + +#define IXGBE_READ_PCIE_WORD ixgbe_read_pci_cfg_word +#define IXGBE_WRITE_PCIE_WORD ixgbe_write_pci_cfg_word +#define IXGBE_EEPROM_GRANT_ATTEMPS 100 +#define IXGBE_HTONL(_i) htonl(_i) +#define IXGBE_NTOHL(_i) ntohl(_i) +#define IXGBE_NTOHS(_i) ntohs(_i) +#define IXGBE_CPU_TO_LE64(_i) cpu_to_le64(_i) +#define IXGBE_CPU_TO_LE32(_i) cpu_to_le32(_i) +#define IXGBE_CPU_TO_LE16(_i) cpu_to_le16(_i) +#define IXGBE_LE16_TO_CPU(_i) le16_to_cpu(_i) +#define IXGBE_LE32_TO_CPU(_i) le32_to_cpu(_i) +#define IXGBE_LE32_TO_CPUS(_i) le32_to_cpus(_i) +#define IXGBE_LE64_TO_CPU(_i) le64_to_cpu(_i) +#define EWARN(H, W) ewarn(H, W) + +#undef TRUE +#define TRUE true +#undef FALSE +#define FALSE false + +enum { + IXGBE_ERROR_SOFTWARE, + IXGBE_ERROR_POLLING, + IXGBE_ERROR_INVALID_STATE, + IXGBE_ERROR_UNSUPPORTED, + IXGBE_ERROR_ARGUMENT, + IXGBE_ERROR_CAUTION, +}; + +#define ERROR_REPORT(level, format, arg...) do { \ + switch (level) { \ + case IXGBE_ERROR_SOFTWARE: \ + case IXGBE_ERROR_CAUTION: \ + case IXGBE_ERROR_POLLING: \ + netif_warn(ixgbe_hw_to_msg(hw), drv, ixgbe_hw_to_netdev(hw), \ + format, ## arg); \ + break; \ + case IXGBE_ERROR_INVALID_STATE: \ + case IXGBE_ERROR_UNSUPPORTED: \ + case IXGBE_ERROR_ARGUMENT: \ + netif_err(ixgbe_hw_to_msg(hw), hw, ixgbe_hw_to_netdev(hw), \ + format, ## arg); \ + break; \ + default: \ + break; \ + } \ +} while (0) + +#define ERROR_REPORT1 ERROR_REPORT +#define ERROR_REPORT2 ERROR_REPORT +#define ERROR_REPORT3 ERROR_REPORT + +#define UNREFERENCED_XPARAMETER +#define UNREFERENCED_1PARAMETER(_p) do { \ + uninitialized_var(_p); \ +} while (0) +#define UNREFERENCED_2PARAMETER(_p, _q) do { \ + uninitialized_var(_p); \ + uninitialized_var(_q); \ +} while (0) +#define UNREFERENCED_3PARAMETER(_p, _q, _r) do { \ + uninitialized_var(_p); \ + uninitialized_var(_q); \ + uninitialized_var(_r); \ +} while (0) +#define UNREFERENCED_4PARAMETER(_p, _q, _r, _s) do { \ + uninitialized_var(_p); \ + uninitialized_var(_q); \ + uninitialized_var(_r); \ + uninitialized_var(_s); \ +} while (0) + +#define ixgbe_malloc(hw, size) kzalloc(size, GFP_KERNEL) +#define ixgbe_calloc(hw, cnt, size) kcalloc(cnt, size, GFP_KERNEL) +#define ixgbe_free(hw, mptr) kfree(mptr) + +#define ixgbe_lock mutex +#define ixgbe_init_lock(lock) mutex_init(lock) +#define ixgbe_destroy_lock(lock) mutex_destroy(lock) +#define ixgbe_acquire_lock(lock) mutex_lock(lock) +#define ixgbe_release_lock(lock) mutex_unlock(lock) + +#endif /* _IXGBE_OSDEP_H_ */ diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_osdep2.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_osdep2.h new file mode 100644 index 00000000000..d65a32d35fd --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_osdep2.h @@ -0,0 +1,50 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 1999 - 2026 Intel Corporation */ + +#ifndef _IXGBE_OSDEP2_H_ +#define _IXGBE_OSDEP2_H_ + +static inline bool ixgbe_removed(void __iomem *addr) +{ + return unlikely(!addr); +} +#define IXGBE_REMOVED(a) ixgbe_removed(a) + +static inline void IXGBE_WRITE_REG(struct ixgbe_hw *hw, u32 reg, u32 value) +{ + u8 __iomem *reg_addr; + + reg_addr = READ_ONCE(hw->hw_addr); + if (IXGBE_REMOVED(reg_addr)) + return; +#ifdef DBG + { + struct net_device *netdev = ixgbe_hw_to_netdev(hw); + + switch (reg) { + case IXGBE_EIMS: + case IXGBE_EIMC: + case IXGBE_EIAM: + case IXGBE_EIAC: + case IXGBE_EICR: + case IXGBE_EICS: + netdev_info(netdev, + "%s: Reg - 0x%05X, value - 0x%08X\n", + __func__, reg, value); + } + } +#endif /* DBG */ + writel(value, reg_addr + reg); +} + +static inline void IXGBE_WRITE_REG64(struct ixgbe_hw *hw, u32 reg, u64 value) +{ + u8 __iomem *reg_addr; + + reg_addr = READ_ONCE(hw->hw_addr); + if (IXGBE_REMOVED(reg_addr)) + return; + writeq(value, reg_addr + reg); +} + +#endif /* _IXGBE_OSDEP2_H_ */ diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_param.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_param.c new file mode 100644 index 00000000000..b7c11c9adbe --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_param.c @@ -0,0 +1,1271 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 1999 - 2026 Intel Corporation */ + +#include "ixgbe.h" + +#include +#include + +/* This is the only thing that needs to be changed to adjust the + * maximum number of ports that the driver can manage. + */ + +#define IXGBE_MAX_NIC 32 + +#define OPTION_UNSET -1 +#define OPTION_DISABLED 0 +#define OPTION_ENABLED 1 + +#define STRINGIFY(foo) #foo /* magic for getting defines into strings */ +#define XSTRINGIFY(bar) STRINGIFY(bar) + +/* All parameters are treated the same, as an integer array of values. + * This macro just reduces the need to repeat the same declaration code + * over and over (plus this helps to avoid typo bugs). + */ + +#define IXGBE_PARAM_INIT { [0 ... IXGBE_MAX_NIC] = OPTION_UNSET } +#ifndef module_param_array +/* Module Parameters are always initialized to -1, so that the driver + * can tell the difference between no user specified value or the + * user asking for the default value. + * The true default values are loaded in when ixgbe_check_options is called. + * + * This is a GCC extension to ANSI C. + * See the item "Labelled Elements in Initializers" in the section + * "Extensions to the C Language Family" of the GCC documentation. + */ + +#define IXGBE_PARAM(X, desc) \ + static const int __devinitdata X[IXGBE_MAX_NIC+1] = IXGBE_PARAM_INIT; \ + MODULE_PARM(X, "1-" __MODULE_STRING(IXGBE_MAX_NIC) "i"); \ + MODULE_PARM_DESC(X, desc); +#else +#define IXGBE_PARAM(X, desc) \ + static int __devinitdata X[IXGBE_MAX_NIC+1] = IXGBE_PARAM_INIT; \ + static unsigned int num_##X; \ + module_param_array_named(X, X, int, &num_##X, 0); \ + MODULE_PARM_DESC(X, desc); +#endif + +/* IntMode (Interrupt Mode) + * + * Valid Range: 0-2 + * - 0 - Legacy Interrupt + * - 1 - MSI Interrupt + * - 2 - MSI-X Interrupt(s) + * + * Default Value: 2 + */ +IXGBE_PARAM(IntMode, "Change Interrupt Mode (0=Legacy, 1=MSI, 2=MSI-X), " + "default 2"); +#define IXGBE_INT_LEGACY 0 +#define IXGBE_INT_MSI 1 +#define IXGBE_INT_MSIX 2 + +IXGBE_PARAM(InterruptType, "Change Interrupt Mode (0=Legacy, 1=MSI, 2=MSI-X), " + "default IntMode (deprecated)"); + +/* MQ - Multiple Queue enable/disable + * + * Valid Range: 0, 1 + * - 0 - disables MQ + * - 1 - enables MQ + * + * Default Value: 1 + */ + +IXGBE_PARAM(MQ, "Disable or enable Multiple Queues, default 1"); + +#if IS_ENABLED(CONFIG_DCA) +/* DCA - Direct Cache Access (DCA) Control + * + * This option allows the device to hint to DCA enabled processors + * which CPU should have its cache warmed with the data being + * transferred over PCIe. This can increase performance by reducing + * cache misses. ixgbe hardware supports DCA for: + * tx descriptor writeback + * rx descriptor writeback + * rx data + * rx data header only (in packet split mode) + * + * enabling option 2 can cause cache thrash in some tests, particularly + * if the CPU is completely utilized + * + * Valid Range: 0 - 2 + * - 0 - disables DCA + * - 1 - enables DCA + * - 2 - enables DCA with rx data included + * + * Default Value: 2 + */ + +#define IXGBE_MAX_DCA 2 + +IXGBE_PARAM(DCA, "Disable or enable Direct Cache Access, 0=disabled, " + "1=descriptor only, 2=descriptor and data"); +#endif /* CONFIG_DCA */ + +/* RSS - Receive-Side Scaling (RSS) Descriptor Queues + * + * Valid Range: 0-16 + * - 0 - enables RSS and sets the Desc. Q's to min(16, num_online_cpus()). + * - 1-16 - enables RSS and sets the Desc. Q's to the specified value. + * + * Default Value: 0 + */ + +IXGBE_PARAM(RSS, "Number of Receive-Side Scaling Descriptor Queues, " + "default 0=number of cpus"); + + +/* VMDQ - Virtual Machine Device Queues (VMDQ) + * + * Valid Range: 1-16 + * - 0/1 Disables VMDQ by allocating only a single queue. + * - 2-16 - enables VMDQ and sets the Desc. Q's to the specified value. + * + * Default Value: 8 + */ + +#define IXGBE_DEFAULT_NUM_VMDQ 8 + +IXGBE_PARAM(VMDQ, "Number of Virtual Machine Device Queues: 0/1 = disable (1 queue) " + "2-16 enable (default=" XSTRINGIFY(IXGBE_DEFAULT_NUM_VMDQ) ")"); + +#ifdef CONFIG_PCI_IOV +/* max_vfs - SR I/O Virtualization + * + * Valid Range: 0-63 + * - 0 Disables SR-IOV + * - 1-63 - enables SR-IOV and sets the number of VFs enabled + * + * Default Value: 0 + */ + +#define MAX_SRIOV_VFS 63 + +IXGBE_PARAM(max_vfs, "Number of Virtual Functions: 0 = disable (default), " + "1-" XSTRINGIFY(MAX_SRIOV_VFS) " = enable " + "this many VFs"); + +/* VEPA - Set internal bridge to VEPA mode + * + * Valid Range: 0-1 + * - 0 Set bridge to VEB mode + * - 1 Set bridge to VEPA mode + * + * Default Value: 0 + */ +/* + *Note: + *===== + * This provides ability to ensure VEPA mode on the internal bridge even if + * the kernel does not support the netdev bridge setting operations. +*/ +IXGBE_PARAM(VEPA, "VEPA Bridge Mode: 0 = VEB (default), 1 = VEPA"); +#endif + +/* Interrupt Throttle Rate (interrupts/sec) + * + * Valid Range: 956-488281 (0=off, 1=dynamic) + * + * Default Value: 1 + */ +#define DEFAULT_ITR 1 +IXGBE_PARAM(InterruptThrottleRate, "Maximum interrupts per second, per vector, " + "(0,1,956-488281), default 1"); +#define MAX_ITR IXGBE_MAX_INT_RATE +#define MIN_ITR IXGBE_MIN_INT_RATE + +#ifndef IXGBE_NO_LLI + +/* LLIPort (Low Latency Interrupt TCP Port) + * + * Valid Range: 0 - 65535 + * + * Default Value: 0 (disabled) + */ +IXGBE_PARAM(LLIPort, "Low Latency Interrupt TCP Port (0-65535)"); + +#define DEFAULT_LLIPORT 0 +#define MAX_LLIPORT 0xFFFF +#define MIN_LLIPORT 0 + +/* LLIPush (Low Latency Interrupt on TCP Push flag) + * + * Valid Range: 0,1 + * + * Default Value: 0 (disabled) + */ +IXGBE_PARAM(LLIPush, "Low Latency Interrupt on TCP Push flag (0,1)"); + +#define DEFAULT_LLIPUSH 0 +#define MAX_LLIPUSH 1 +#define MIN_LLIPUSH 0 + +/* LLISize (Low Latency Interrupt on Packet Size) + * + * Valid Range: 0 - 1500 + * + * Default Value: 0 (disabled) + */ +IXGBE_PARAM(LLISize, "Low Latency Interrupt on Packet Size (0-1500)"); + +#define DEFAULT_LLISIZE 0 +#define MAX_LLISIZE 1500 +#define MIN_LLISIZE 0 + +/* LLIEType (Low Latency Interrupt Ethernet Type) + * + * Valid Range: 0 - 0x8fff + * + * Default Value: 0 (disabled) + */ +IXGBE_PARAM(LLIEType, "Low Latency Interrupt Ethernet Protocol Type"); + +#define DEFAULT_LLIETYPE 0 +#define MAX_LLIETYPE 0x8fff +#define MIN_LLIETYPE 0 + +/* LLIVLANP (Low Latency Interrupt on VLAN priority threshold) + * + * Valid Range: 0 - 7 + * + * Default Value: 0 (disabled) + */ +IXGBE_PARAM(LLIVLANP, "Low Latency Interrupt on VLAN priority threshold"); + +#define DEFAULT_LLIVLANP 0 +#define MAX_LLIVLANP 7 +#define MIN_LLIVLANP 0 + +#endif /* IXGBE_NO_LLI */ +#ifdef HAVE_TX_MQ +/* Flow Director packet buffer allocation level + * + * Valid Range: 1-3 + * 1 = 8k hash/2k perfect, + * 2 = 16k hash/4k perfect, + * 3 = 32k hash/8k perfect + * + * Default Value: 0 + */ +IXGBE_PARAM(FdirPballoc, "Flow Director packet buffer allocation level:\n" + "\t\t\t1 = 8k hash filters or 2k perfect filters\n" + "\t\t\t2 = 16k hash filters or 4k perfect filters\n" + "\t\t\t3 = 32k hash filters or 8k perfect filters"); + +#define IXGBE_DEFAULT_FDIR_PBALLOC IXGBE_FDIR_PBALLOC_64K + +/* Software ATR packet sample rate + * + * Valid Range: 0-255 0 = off, 1-255 = rate of Tx packet inspection + * + * Default Value: 20 + */ +IXGBE_PARAM(AtrSampleRate, "Software ATR Tx packet sample rate"); + +#define IXGBE_MAX_ATR_SAMPLE_RATE 255 +#define IXGBE_MIN_ATR_SAMPLE_RATE 1 +#define IXGBE_ATR_SAMPLE_RATE_OFF 0 +#define IXGBE_DEFAULT_ATR_SAMPLE_RATE 20 +#endif /* HAVE_TX_MQ */ + +#if IS_ENABLED(CONFIG_FCOE) +/* FCoE - Fibre Channel over Ethernet Offload Enable/Disable + * + * Valid Range: 0, 1 + * - 0 - disables FCoE Offload + * - 1 - enables FCoE Offload + * + * Default Value: 1 + */ +IXGBE_PARAM(FCoE, "Disable or enable FCoE Offload, default 1"); +#endif /* CONFIG_FCOE */ + +/* Enable/disable Malicious Driver Detection + * + * Valid Values: 0(off), 1(on) + * + * Default Value: 1 + */ +IXGBE_PARAM(MDD, "Malicious Driver Detection: (0,1), default 1 = on"); + +/* Enable/disable Large Receive Offload + * + * Valid Values: 0(off), 1(on) + * + * Default Value: 1 + */ +IXGBE_PARAM(LRO, "Large Receive Offload (0,1), default 0 = off"); + +/* Enable/disable support for untested SFP+ modules on 82599-based adapters + * + * Valid Values: 0(Disable), 1(Enable) + * + * Default Value: 0 + */ +IXGBE_PARAM(allow_unsupported_sfp, "Allow unsupported and untested " + "SFP+ modules on 82599 based adapters, default 0 = Disable"); + +/* Enable/disable support for DMA coalescing + * + * Valid Values: 0(off), 41 - 10000(on) + * + * Default Value: 0 + */ +IXGBE_PARAM(dmac_watchdog, + "DMA coalescing watchdog in microseconds (0,41-10000), default 0 = off"); + +/* Enable/disable support for VXLAN rx checksum offload + * + * Valid Values: 0(Disable), 1(Enable) + * + * Default Value: 1 on hardware that supports it + */ +IXGBE_PARAM(vxlan_rx, + "VXLAN receive checksum offload (0,1), default 1 = Enable"); + + +struct ixgbe_option { + enum { enable_option, range_option, list_option } type; + const char *name; + const char *err; + const char *msg; + int def; + union { + struct { /* range_option info */ + int min; + int max; + } r; + struct { /* list_option info */ + int nr; + const struct ixgbe_opt_list { + int i; + char *str; + } *p; + } l; + } arg; +}; + +#ifndef IXGBE_NO_LLI +#ifdef module_param_array +/** + * ixgbe_lli_supported - helper function to determine LLI support + * @adapter: board private structure + * @opt: pointer to option struct + * + * LLI is only supported for 82599 and X540 + * LLIPush is not supported on 82599 + **/ +#ifdef HAVE_CONFIG_HOTPLUG +static bool __devinit ixgbe_lli_supported(struct ixgbe_adapter *adapter, + struct ixgbe_option *opt) +#else +static bool ixgbe_lli_supported(struct ixgbe_adapter *adapter, + struct ixgbe_option *opt) +#endif +{ + struct ixgbe_hw *hw = &adapter->hw; + + if (hw->mac.type == ixgbe_mac_82599EB) { + + if (LLIPush[adapter->bd_number] > 0) + goto not_supp; + + return true; + } + + if (hw->mac.type == ixgbe_mac_X540) + return true; + +not_supp: + DPRINTK(PROBE, INFO, "%s not supported on this HW\n", opt->name); + return false; +} +#endif /* module_param_array */ +#endif /* IXGBE_NO_LLI */ + +#ifdef HAVE_CONFIG_HOTPLUG +static int __devinit ixgbe_validate_option(struct net_device *netdev, + unsigned int *value, + struct ixgbe_option *opt) +#else +static int ixgbe_validate_option(struct net_device *netdev, + unsigned int *value, + struct ixgbe_option *opt) +#endif +{ + if (*value == OPTION_UNSET) { + netdev_info(netdev, "Invalid %s specified (%d), %s\n", + opt->name, *value, opt->err); + *value = opt->def; + return 0; + } + + switch (opt->type) { + case enable_option: + switch (*value) { + case OPTION_ENABLED: + netdev_info(netdev, "%s Enabled\n", opt->name); + return 0; + case OPTION_DISABLED: + netdev_info(netdev, "%s Disabled\n", opt->name); + return 0; + } + break; + case range_option: + if ((*value >= opt->arg.r.min && *value <= opt->arg.r.max) || + *value == opt->def) { + if (opt->msg) + netdev_info(netdev, "%s set to %d, %s\n", + opt->name, *value, opt->msg); + else + netdev_info(netdev, "%s set to %d\n", + opt->name, *value); + return 0; + } + break; + case list_option: { + int i; + + for (i = 0; i < opt->arg.l.nr; i++) { + const struct ixgbe_opt_list *ent = &opt->arg.l.p[i]; + if (*value == ent->i) { + if (ent->str[0] != '\0') + netdev_info(netdev, "%s\n", ent->str); + return 0; + } + } + } + break; + default: + BUG(); + } + + netdev_info(netdev, "Invalid %s specified (%d), %s\n", + opt->name, *value, opt->err); + *value = opt->def; + return -1; +} + +#define LIST_LEN(l) (sizeof(l) / sizeof(l[0])) +#define PSTR_LEN 10 + +/** + * ixgbe_check_options - Range Checking for Command Line Parameters + * @adapter: board private structure + * + * This routine checks all command line parameters for valid user + * input. If an invalid value is given, or if no user specified + * value exists, a default value is used. The final value is stored + * in a variable in the adapter structure. + **/ +#ifdef HAVE_CONFIG_HOTPLUG +void __devinit ixgbe_check_options(struct ixgbe_adapter *adapter) +#else +void ixgbe_check_options(struct ixgbe_adapter *adapter) +#endif +{ + unsigned int mdd; + int bd = adapter->bd_number; + u32 *aflags = &adapter->flags; + struct ixgbe_ring_feature *feature = adapter->ring_feature; + unsigned int vmdq; + + if (bd >= IXGBE_MAX_NIC) { + netdev_notice(adapter->netdev, + "Warning: no configuration for board #%d\n", bd); + netdev_notice(adapter->netdev, + "Using defaults for all values\n"); +#ifndef module_param_array + bd = IXGBE_MAX_NIC; +#endif + } + + + { /* Interrupt Mode */ + unsigned int int_mode; + static struct ixgbe_option opt = { + .type = range_option, + .name = "Interrupt Mode", + .err = + "using default of " __MODULE_STRING(IXGBE_INT_MSIX), + .def = IXGBE_INT_MSIX, + .arg = { .r = { .min = IXGBE_INT_LEGACY, + .max = IXGBE_INT_MSIX} } + }; + +#ifdef module_param_array + if (num_IntMode > bd || num_InterruptType > bd) { +#endif + int_mode = IntMode[bd]; + if (int_mode == OPTION_UNSET) + int_mode = InterruptType[bd]; + ixgbe_validate_option(adapter->netdev, + &int_mode, &opt); + switch (int_mode) { + case IXGBE_INT_MSIX: + if (!(*aflags & IXGBE_FLAG_MSIX_CAPABLE)) + netdev_info(adapter->netdev, + "Ignoring MSI-X setting; " + "support unavailable\n"); + break; + case IXGBE_INT_MSI: + if (!(*aflags & IXGBE_FLAG_MSI_CAPABLE)) { + netdev_info(adapter->netdev, + "Ignoring MSI setting; " + "support unavailable\n"); + } else { + *aflags &= ~IXGBE_FLAG_MSIX_CAPABLE; + } + break; + case IXGBE_INT_LEGACY: + default: + *aflags &= ~IXGBE_FLAG_MSIX_CAPABLE; + *aflags &= ~IXGBE_FLAG_MSI_CAPABLE; + break; + } +#ifdef module_param_array + } else { + /* default settings */ + if (*aflags & IXGBE_FLAG_MSIX_CAPABLE) { + *aflags |= IXGBE_FLAG_MSI_CAPABLE; + } else { + *aflags &= ~IXGBE_FLAG_MSIX_CAPABLE; + *aflags &= ~IXGBE_FLAG_MSI_CAPABLE; + } + } +#endif + } + { /* Multiple Queue Support */ + static struct ixgbe_option opt = { + .type = enable_option, + .name = "Multiple Queue Support", + .err = "defaulting to Enabled", + .def = OPTION_ENABLED + }; + +#ifdef module_param_array + if (num_MQ > bd) { +#endif + unsigned int mq = MQ[bd]; + ixgbe_validate_option(adapter->netdev, &mq, &opt); + if (mq) + *aflags |= IXGBE_FLAG_MQ_CAPABLE; + else + *aflags &= ~IXGBE_FLAG_MQ_CAPABLE; +#ifdef module_param_array + } else { + *aflags |= IXGBE_FLAG_MQ_CAPABLE; + } +#endif + /* Check Interoperability */ + if ((*aflags & IXGBE_FLAG_MQ_CAPABLE) && + !(*aflags & IXGBE_FLAG_MSIX_CAPABLE)) { + DPRINTK(PROBE, INFO, + "Multiple queues are not supported while MSI-X " + "is disabled. Disabling Multiple Queues.\n"); + *aflags &= ~IXGBE_FLAG_MQ_CAPABLE; + } + } +#if IS_ENABLED(CONFIG_DCA) + { /* Direct Cache Access (DCA) */ + static struct ixgbe_option opt = { + .type = range_option, + .name = "Direct Cache Access (DCA)", + .err = "defaulting to Enabled", + .def = IXGBE_MAX_DCA, + .arg = { .r = { .min = OPTION_DISABLED, + .max = IXGBE_MAX_DCA} } + }; + unsigned int dca = opt.def; + +#ifdef module_param_array + if (num_DCA > bd) { +#endif + dca = DCA[bd]; + ixgbe_validate_option(adapter->netdev, &dca, &opt); + if (!dca) + *aflags &= ~IXGBE_FLAG_DCA_CAPABLE; + + /* Check Interoperability */ + if (!(*aflags & IXGBE_FLAG_DCA_CAPABLE)) { + DPRINTK(PROBE, INFO, "DCA is disabled\n"); + *aflags &= ~IXGBE_FLAG_DCA_ENABLED; + } + + if (dca == IXGBE_MAX_DCA) { + DPRINTK(PROBE, INFO, + "DCA enabled for rx data\n"); + adapter->flags |= IXGBE_FLAG_DCA_ENABLED_DATA; + } +#ifdef module_param_array + } else { + /* make sure to clear the capability flag if the + * option is disabled by default above */ + if (opt.def == OPTION_DISABLED) + *aflags &= ~IXGBE_FLAG_DCA_CAPABLE; + } +#endif + if (dca == IXGBE_MAX_DCA) + adapter->flags |= IXGBE_FLAG_DCA_ENABLED_DATA; + } +#endif /* CONFIG_DCA */ + { /* Receive-Side Scaling (RSS) */ + static struct ixgbe_option opt = { + .type = range_option, + .name = "Receive-Side Scaling (RSS)", + .err = "using default.", + .def = 0, + .arg = { .r = { .min = 0, + .max = 16} } + }; + unsigned int rss = RSS[bd]; + /* adjust Max allowed RSS queues based on MAC type */ + opt.arg.r.max = ixgbe_max_rss_indices(adapter); + +#ifdef module_param_array + if (num_RSS > bd) { +#endif + ixgbe_validate_option(adapter->netdev, &rss, &opt); + /* base it off num_online_cpus() with hardware limit */ + if (!rss) + rss = min_t(int, opt.arg.r.max, + num_online_cpus()); + else + feature[RING_F_FDIR].limit = rss; + + feature[RING_F_RSS].limit = rss; +#ifdef module_param_array + } else if (opt.def == 0) { + rss = min_t(int, ixgbe_max_rss_indices(adapter), + num_online_cpus()); + feature[RING_F_RSS].limit = rss; + } +#endif + /* Check Interoperability */ + if (rss > 1) { + if (!(*aflags & IXGBE_FLAG_MQ_CAPABLE)) { + DPRINTK(PROBE, INFO, + "Multiqueue is disabled. " + "Limiting RSS.\n"); + feature[RING_F_RSS].limit = 1; + } + } + } + { /* Virtual Machine Device Queues (VMDQ) */ + static struct ixgbe_option opt = { + .type = range_option, + .name = "Virtual Machine Device Queues (VMDQ)", + .err = "defaulting to Disabled", + .def = OPTION_DISABLED, + .arg = { .r = { .min = OPTION_DISABLED, + .max = IXGBE_MAX_VMDQ_INDICES + } } + }; + + switch (adapter->hw.mac.type) { + case ixgbe_mac_82598EB: + /* 82598 only supports up to 16 pools */ + opt.arg.r.max = 16; + break; + default: + break; + } + +#ifdef module_param_array + if (num_VMDQ > bd) { +#endif + vmdq = VMDQ[bd]; + + ixgbe_validate_option(adapter->netdev, &vmdq, &opt); + + /* zero or one both mean disabled from our driver's + * perspective */ + if (vmdq > 1) { + *aflags |= IXGBE_FLAG_VMDQ_ENABLED; + } else + *aflags &= ~IXGBE_FLAG_VMDQ_ENABLED; + + feature[RING_F_VMDQ].limit = vmdq; +#ifdef module_param_array + } else { + if (opt.def == OPTION_DISABLED) + *aflags &= ~IXGBE_FLAG_VMDQ_ENABLED; + else + *aflags |= IXGBE_FLAG_VMDQ_ENABLED; + + feature[RING_F_VMDQ].limit = opt.def; + } +#endif + /* Check Interoperability */ + if (*aflags & IXGBE_FLAG_VMDQ_ENABLED) { + if (!(*aflags & IXGBE_FLAG_MQ_CAPABLE)) { + DPRINTK(PROBE, INFO, + "VMDQ is not supported while multiple " + "queues are disabled. " + "Disabling VMDQ.\n"); + *aflags &= ~IXGBE_FLAG_VMDQ_ENABLED; + feature[RING_F_VMDQ].limit = 0; + } + } + } +#ifdef CONFIG_PCI_IOV + { /* Single Root I/O Virtualization (SR-IOV) */ + static struct ixgbe_option opt = { + .type = range_option, + .name = "I/O Virtualization (IOV)", + .err = "defaulting to Disabled", + .def = OPTION_DISABLED, + .arg = { .r = { .min = OPTION_DISABLED, + .max = MAX_SRIOV_VFS} } + }; + +#ifdef module_param_array + if (num_max_vfs > bd) { +#endif + unsigned int vfs = max_vfs[bd]; + if (ixgbe_validate_option(adapter->netdev, + &vfs, &opt)) { + vfs = 0; + DPRINTK(PROBE, INFO, + "max_vfs out of range " + "Disabling SR-IOV.\n"); + } + + adapter->max_vfs = vfs; + + if (vfs) + *aflags |= IXGBE_FLAG_SRIOV_ENABLED; + else + *aflags &= ~IXGBE_FLAG_SRIOV_ENABLED; +#ifdef module_param_array + } else { + if (opt.def == OPTION_DISABLED) { + adapter->max_vfs = 0; + *aflags &= ~IXGBE_FLAG_SRIOV_ENABLED; + } else { + adapter->max_vfs = opt.def; + *aflags |= IXGBE_FLAG_SRIOV_ENABLED; + } + } +#endif + + /* Check Interoperability */ + if (*aflags & IXGBE_FLAG_SRIOV_ENABLED) { + if (!(*aflags & IXGBE_FLAG_SRIOV_CAPABLE)) { + DPRINTK(PROBE, INFO, + "IOV is not supported on this " + "hardware. Disabling IOV.\n"); + *aflags &= ~IXGBE_FLAG_SRIOV_ENABLED; + adapter->max_vfs = 0; + } else if (!(*aflags & IXGBE_FLAG_MQ_CAPABLE)) { + DPRINTK(PROBE, INFO, + "IOV is not supported while multiple " + "queues are disabled. " + "Disabling IOV.\n"); + *aflags &= ~IXGBE_FLAG_SRIOV_ENABLED; + adapter->max_vfs = 0; + } + } + } + { /* VEPA Bridge Mode enable for SR-IOV mode */ + static struct ixgbe_option opt = { + .type = range_option, + .name = "VEPA Bridge Mode Enable", + .err = "defaulting to disabled", + .def = OPTION_DISABLED, + .arg = { .r = { .min = OPTION_DISABLED, + .max = OPTION_ENABLED} } + }; + +#ifdef module_param_array + if (num_VEPA > bd) { +#endif + unsigned int vepa = VEPA[bd]; + ixgbe_validate_option(adapter->netdev, &vepa, &opt); + if (vepa) + adapter->flags |= + IXGBE_FLAG_SRIOV_VEPA_BRIDGE_MODE; +#ifdef module_param_array + } else { + if (opt.def == OPTION_ENABLED) + adapter->flags |= + IXGBE_FLAG_SRIOV_VEPA_BRIDGE_MODE; + } +#endif + } +#endif /* CONFIG_PCI_IOV */ + { /* Interrupt Throttling Rate */ + static struct ixgbe_option opt = { + .type = range_option, + .name = "Interrupt Throttling Rate (ints/sec)", + .err = "using default of "__MODULE_STRING(DEFAULT_ITR), + .def = DEFAULT_ITR, + .arg = { .r = { .min = MIN_ITR, + .max = MAX_ITR } } + }; + +#ifdef module_param_array + if (num_InterruptThrottleRate > bd) { +#endif + u32 itr = InterruptThrottleRate[bd]; + switch (itr) { + case 0: + DPRINTK(PROBE, INFO, "%s turned off\n", + opt.name); + adapter->rx_itr_setting = 0; + break; + case 1: + DPRINTK(PROBE, INFO, "dynamic interrupt " + "throttling enabled\n"); + adapter->rx_itr_setting = 1; + break; + default: + ixgbe_validate_option(adapter->netdev, + &itr, &opt); + /* the first bit is used as control */ + adapter->rx_itr_setting = (1000000/itr) << 2; + break; + } + adapter->tx_itr_setting = adapter->rx_itr_setting; +#ifdef module_param_array + } else { + adapter->rx_itr_setting = opt.def; + adapter->tx_itr_setting = opt.def; + } +#endif + } +#ifndef IXGBE_NO_LLI + { /* Low Latency Interrupt TCP Port*/ + static struct ixgbe_option opt = { + .type = range_option, + .name = "Low Latency Interrupt TCP Port", + .err = "using default of " + __MODULE_STRING(DEFAULT_LLIPORT), + .def = DEFAULT_LLIPORT, + .arg = { .r = { .min = MIN_LLIPORT, + .max = MAX_LLIPORT } } + }; + +#ifdef module_param_array + if (num_LLIPort > bd && ixgbe_lli_supported(adapter, &opt)) { +#endif + adapter->lli_port = LLIPort[bd]; + if (adapter->lli_port) { + ixgbe_validate_option(adapter->netdev, + &adapter->lli_port, &opt); + } else { + DPRINTK(PROBE, INFO, "%s turned off\n", + opt.name); + } +#ifdef module_param_array + } else { + adapter->lli_port = opt.def; + } +#endif + } + { /* Low Latency Interrupt on Packet Size */ + static struct ixgbe_option opt = { + .type = range_option, + .name = "Low Latency Interrupt on Packet Size", + .err = "using default of " + __MODULE_STRING(DEFAULT_LLISIZE), + .def = DEFAULT_LLISIZE, + .arg = { .r = { .min = MIN_LLISIZE, + .max = MAX_LLISIZE } } + }; + +#ifdef module_param_array + if (num_LLISize > bd && ixgbe_lli_supported(adapter, &opt)) { +#endif + adapter->lli_size = LLISize[bd]; + if (adapter->lli_size) { + ixgbe_validate_option(adapter->netdev, + &adapter->lli_size, &opt); + } else { + DPRINTK(PROBE, INFO, "%s turned off\n", + opt.name); + } +#ifdef module_param_array + } else { + adapter->lli_size = opt.def; + } +#endif + } + { /*Low Latency Interrupt on TCP Push flag*/ + static struct ixgbe_option opt = { + .type = enable_option, + .name = "Low Latency Interrupt on TCP Push flag", + .err = "defaulting to Disabled", + .def = OPTION_DISABLED + }; + +#ifdef module_param_array + if (num_LLIPush > bd && ixgbe_lli_supported(adapter, &opt)) { +#endif + unsigned int lli_push = LLIPush[bd]; + + ixgbe_validate_option(adapter->netdev, + &lli_push, &opt); + if (lli_push) + *aflags |= IXGBE_FLAG_LLI_PUSH; + else + *aflags &= ~IXGBE_FLAG_LLI_PUSH; +#ifdef module_param_array + } else { + *aflags &= ~IXGBE_FLAG_LLI_PUSH; + } +#endif + } + { /* Low Latency Interrupt EtherType*/ + static struct ixgbe_option opt = { + .type = range_option, + .name = "Low Latency Interrupt on Ethernet Protocol " + "Type", + .err = "using default of " + __MODULE_STRING(DEFAULT_LLIETYPE), + .def = DEFAULT_LLIETYPE, + .arg = { .r = { .min = MIN_LLIETYPE, + .max = MAX_LLIETYPE } } + }; + +#ifdef module_param_array + if (num_LLIEType > bd && ixgbe_lli_supported(adapter, &opt)) { +#endif + adapter->lli_etype = LLIEType[bd]; + if (adapter->lli_etype) { + ixgbe_validate_option(adapter->netdev, + &adapter->lli_etype, + &opt); + } else { + DPRINTK(PROBE, INFO, "%s turned off\n", + opt.name); + } +#ifdef module_param_array + } else { + adapter->lli_etype = opt.def; + } +#endif + } + { /* LLI VLAN Priority */ + static struct ixgbe_option opt = { + .type = range_option, + .name = "Low Latency Interrupt on VLAN priority " + "threshold", + .err = "using default of " + __MODULE_STRING(DEFAULT_LLIVLANP), + .def = DEFAULT_LLIVLANP, + .arg = { .r = { .min = MIN_LLIVLANP, + .max = MAX_LLIVLANP } } + }; + +#ifdef module_param_array + if (num_LLIVLANP > bd && ixgbe_lli_supported(adapter, &opt)) { +#endif + adapter->lli_vlan_pri = LLIVLANP[bd]; + if (adapter->lli_vlan_pri) { + ixgbe_validate_option(adapter->netdev, + &adapter->lli_vlan_pri, + &opt); + } else { + DPRINTK(PROBE, INFO, "%s turned off\n", + opt.name); + } +#ifdef module_param_array + } else { + adapter->lli_vlan_pri = opt.def; + } +#endif + } +#endif /* IXGBE_NO_LLI */ +#ifdef HAVE_TX_MQ + { /* Flow Director packet buffer allocation */ + unsigned int fdir_pballoc_mode; + static struct ixgbe_option opt = { + .type = range_option, + .name = "Flow Director packet buffer allocation", + .err = "using default of " + __MODULE_STRING(IXGBE_DEFAULT_FDIR_PBALLOC), + .def = IXGBE_DEFAULT_FDIR_PBALLOC, + .arg = {.r = {.min = IXGBE_FDIR_PBALLOC_64K, + .max = IXGBE_FDIR_PBALLOC_256K} } + }; + char pstring[PSTR_LEN]; + + if (adapter->hw.mac.type == ixgbe_mac_82598EB) { + adapter->fdir_pballoc = IXGBE_FDIR_PBALLOC_NONE; + } else if (num_FdirPballoc > bd) { + fdir_pballoc_mode = FdirPballoc[bd]; + ixgbe_validate_option(adapter->netdev, + &fdir_pballoc_mode, &opt); + switch (fdir_pballoc_mode) { + case IXGBE_FDIR_PBALLOC_256K: + adapter->fdir_pballoc = IXGBE_FDIR_PBALLOC_256K; + snprintf(pstring, PSTR_LEN, "256kB"); + break; + case IXGBE_FDIR_PBALLOC_128K: + adapter->fdir_pballoc = IXGBE_FDIR_PBALLOC_128K; + snprintf(pstring, PSTR_LEN, "128kB"); + break; + case IXGBE_FDIR_PBALLOC_64K: + default: + adapter->fdir_pballoc = IXGBE_FDIR_PBALLOC_64K; + snprintf(pstring, PSTR_LEN, "64kB"); + break; + } + DPRINTK(PROBE, INFO, "Flow Director will be allocated " + "%s of packet buffer\n", pstring); + } else { + adapter->fdir_pballoc = opt.def; + } + + } + { /* Flow Director ATR Tx sample packet rate */ + static struct ixgbe_option opt = { + .type = range_option, + .name = "Software ATR Tx packet sample rate", + .err = "using default of " + __MODULE_STRING(IXGBE_DEFAULT_ATR_SAMPLE_RATE), + .def = IXGBE_DEFAULT_ATR_SAMPLE_RATE, + .arg = {.r = {.min = IXGBE_ATR_SAMPLE_RATE_OFF, + .max = IXGBE_MAX_ATR_SAMPLE_RATE} } + }; + static const char atr_string[] = + "ATR Tx Packet sample rate set to"; + + if (adapter->hw.mac.type == ixgbe_mac_82598EB) { + adapter->atr_sample_rate = IXGBE_ATR_SAMPLE_RATE_OFF; + } else if (num_AtrSampleRate > bd) { + adapter->atr_sample_rate = AtrSampleRate[bd]; + + if (adapter->atr_sample_rate) { + ixgbe_validate_option(adapter->netdev, + &adapter->atr_sample_rate, + &opt); + DPRINTK(PROBE, INFO, "%s %d\n", atr_string, + adapter->atr_sample_rate); + } + } else { + adapter->atr_sample_rate = opt.def; + } + } +#endif /* HAVE_TX_MQ */ +#if IS_ENABLED(CONFIG_FCOE) + { + *aflags &= ~IXGBE_FLAG_FCOE_CAPABLE; + + switch (adapter->hw.mac.type) { + case ixgbe_mac_X540: + case ixgbe_mac_X550: + case ixgbe_mac_E610: + case ixgbe_mac_82599EB: { + struct ixgbe_option opt = { + .type = enable_option, + .name = "Enabled/Disable FCoE offload", + .err = "defaulting to Enabled", + .def = OPTION_ENABLED + }; +#ifdef module_param_array + if (num_FCoE > bd) { +#endif + unsigned int fcoe = FCoE[bd]; + + ixgbe_validate_option(adapter->netdev, + &fcoe, &opt); + if (fcoe) + *aflags |= IXGBE_FLAG_FCOE_CAPABLE; +#ifdef module_param_array + } else { + if (opt.def == OPTION_ENABLED) + *aflags |= IXGBE_FLAG_FCOE_CAPABLE; + } +#endif + DPRINTK(PROBE, INFO, "FCoE Offload feature %sabled\n", + (*aflags & IXGBE_FLAG_FCOE_CAPABLE) ? + "en" : "dis"); + } + break; + default: + break; + } + } +#endif /* CONFIG_FCOE */ + { /* LRO - Set Large Receive Offload */ + struct ixgbe_option opt = { + .type = enable_option, + .name = "LRO - Large Receive Offload", + .err = "defaulting to Disabled", + .def = OPTION_DISABLED + }; + struct net_device *netdev = adapter->netdev; + + if (!(adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE)) + opt.def = OPTION_DISABLED; + +#ifdef module_param_array + if (num_LRO > bd) { +#endif + unsigned int lro = LRO[bd]; + ixgbe_validate_option(adapter->netdev, &lro, &opt); + if (lro) + netdev->features |= NETIF_F_LRO; + else + netdev->features &= ~NETIF_F_LRO; +#ifdef module_param_array + } else { + netdev->features &= ~NETIF_F_LRO; + } +#endif + if ((netdev->features & NETIF_F_LRO) && + !(adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE)) { + DPRINTK(PROBE, INFO, + "RSC is not supported on this " + "hardware. Disabling RSC.\n"); + netdev->features &= ~NETIF_F_LRO; + } + } + { /* + * allow_unsupported_sfp - Enable/Disable support for unsupported + * and untested SFP+ modules. + */ + struct ixgbe_option opt = { + .type = enable_option, + .name = "allow_unsupported_sfp", + .err = "defaulting to Disabled", + .def = OPTION_DISABLED + }; +#ifdef module_param_array + if (num_allow_unsupported_sfp > bd) { +#endif + unsigned int enable_unsupported_sfp = + allow_unsupported_sfp[bd]; + ixgbe_validate_option(adapter->netdev, + &enable_unsupported_sfp, &opt); + if (enable_unsupported_sfp) { + adapter->hw.allow_unsupported_sfp = true; + } else { + adapter->hw.allow_unsupported_sfp = false; + } +#ifdef module_param_array + } else { + adapter->hw.allow_unsupported_sfp = false; + } +#endif + } + { /* DMA Coalescing */ + struct ixgbe_option opt = { + .type = range_option, + .name = "dmac_watchdog", + .err = "defaulting to 0 (disabled)", + .def = 0, + .arg = { .r = { .min = 41, .max = 10000 } }, + }; + const char *cmsg = "DMA coalescing not supported on this hardware"; + + switch (adapter->hw.mac.type) { + case ixgbe_mac_X550: + case ixgbe_mac_X550EM_x: + case ixgbe_mac_X550EM_a: + case ixgbe_mac_E610: + if (adapter->rx_itr_setting || adapter->tx_itr_setting) + break; + opt.err = "interrupt throttling disabled also disables DMA coalescing"; + opt.arg.r.min = 0; + opt.arg.r.max = 0; + break; + default: + opt.err = cmsg; + opt.msg = cmsg; + opt.arg.r.min = 0; + opt.arg.r.max = 0; + } +#ifdef module_param_array + if (num_dmac_watchdog > bd) { +#endif + unsigned int dmac_wd = dmac_watchdog[bd]; + + ixgbe_validate_option(adapter->netdev, &dmac_wd, &opt); + adapter->hw.mac.dmac_config.watchdog_timer = dmac_wd; +#ifdef module_param_array + } else { + adapter->hw.mac.dmac_config.watchdog_timer = opt.def; + } +#endif + } + { /* VXLAN rx offload */ + struct ixgbe_option opt = { + .type = range_option, + .name = "vxlan_rx", + .err = "defaulting to 1 (enabled)", + .def = 1, + .arg = { .r = { .min = 0, .max = 1 } }, + }; + const char *cmsg = "VXLAN rx offload not supported on this hardware"; + const u32 flag = IXGBE_FLAG_VXLAN_OFFLOAD_ENABLE; + + if (!(adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE)) { + opt.err = cmsg; + opt.msg = cmsg; + opt.def = 0; + opt.arg.r.max = 0; + } +#ifdef module_param_array + if (num_vxlan_rx > bd) { +#endif + unsigned int enable_vxlan_rx = vxlan_rx[bd]; + + ixgbe_validate_option(adapter->netdev, + &enable_vxlan_rx, &opt); + if (enable_vxlan_rx) + adapter->flags |= flag; + else + adapter->flags &= ~flag; +#ifdef module_param_array + } else if (opt.def) { + adapter->flags |= flag; + } else { + adapter->flags &= ~flag; + } +#endif + } + { /* MDD support */ + struct ixgbe_option opt = { + .type = enable_option, + .name = "Malicious Driver Detection", + .err = "defaulting to Enabled", + .def = OPTION_ENABLED, + }; + + switch (adapter->hw.mac.type) { + case ixgbe_mac_X550: + case ixgbe_mac_X550EM_x: + case ixgbe_mac_X550EM_a: + case ixgbe_mac_E610: +#ifdef module_param_array + if (num_MDD > bd) { +#endif + mdd = MDD[bd]; + ixgbe_validate_option(adapter->netdev, + &mdd, &opt); + + if (mdd){ + *aflags |= IXGBE_FLAG_MDD_ENABLED; + + } else{ + *aflags &= ~IXGBE_FLAG_MDD_ENABLED; + } +#ifdef module_param_array + } else { + *aflags |= IXGBE_FLAG_MDD_ENABLED; + } +#endif + break; + default: + *aflags &= ~IXGBE_FLAG_MDD_ENABLED; + break; + } + } +} diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_phy.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_phy.c new file mode 100644 index 00000000000..08b55b9fb49 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_phy.c @@ -0,0 +1,2662 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 1999 - 2026 Intel Corporation */ + +#include "ixgbe_api.h" +#include "ixgbe_common.h" +#include "ixgbe_phy.h" + +STATIC void ixgbe_i2c_start(struct ixgbe_hw *hw); +STATIC void ixgbe_i2c_stop(struct ixgbe_hw *hw); +STATIC void ixgbe_clock_in_i2c_byte(struct ixgbe_hw *hw, u8 *data); +STATIC s32 ixgbe_clock_out_i2c_byte(struct ixgbe_hw *hw, u8 data); +STATIC s32 ixgbe_get_i2c_ack(struct ixgbe_hw *hw); +STATIC void ixgbe_clock_in_i2c_bit(struct ixgbe_hw *hw, bool *data); +STATIC s32 ixgbe_clock_out_i2c_bit(struct ixgbe_hw *hw, bool data); +STATIC void ixgbe_raise_i2c_clk(struct ixgbe_hw *hw, u32 *i2cctl); +STATIC void ixgbe_lower_i2c_clk(struct ixgbe_hw *hw, u32 *i2cctl); +STATIC s32 ixgbe_set_i2c_data(struct ixgbe_hw *hw, u32 *i2cctl, bool data); +STATIC bool ixgbe_get_i2c_data(struct ixgbe_hw *hw, u32 *i2cctl); +STATIC s32 ixgbe_read_i2c_sff8472_generic(struct ixgbe_hw *hw, u8 byte_offset, + u8 *sff8472_data); + +/** + * ixgbe_out_i2c_byte_ack - Send I2C byte with ack + * @hw: pointer to the hardware structure + * @byte: byte to send + * + * Returns an error code on error. + */ +STATIC s32 ixgbe_out_i2c_byte_ack(struct ixgbe_hw *hw, u8 byte) +{ + s32 status; + + status = ixgbe_clock_out_i2c_byte(hw, byte); + if (status) + return status; + return ixgbe_get_i2c_ack(hw); +} + +/** + * ixgbe_in_i2c_byte_ack - Receive an I2C byte and send ack + * @hw: pointer to the hardware structure + * @byte: pointer to a u8 to receive the byte + * + * Returns an error code on error. + */ +STATIC s32 ixgbe_in_i2c_byte_ack(struct ixgbe_hw *hw, u8 *byte) +{ + ixgbe_clock_in_i2c_byte(hw, byte); + /* ACK */ + return ixgbe_clock_out_i2c_bit(hw, false); +} + +/** + * ixgbe_ones_comp_byte_add - Perform one's complement addition + * @add1: addend 1 + * @add2: addend 2 + * + * Returns one's complement 8-bit sum. + */ +STATIC u8 ixgbe_ones_comp_byte_add(u8 add1, u8 add2) +{ + u16 sum = add1 + add2; + + sum = (sum & 0xFF) + (sum >> 8); + return sum & 0xFF; +} + +/** + * ixgbe_read_i2c_combined_generic_int - Perform I2C read combined operation + * @hw: pointer to the hardware structure + * @addr: I2C bus address to read from + * @reg: I2C device register to read from + * @val: pointer to location to receive read value + * @lock: true if to take and release semaphore + * + * Returns an error code on error. + */ +s32 ixgbe_read_i2c_combined_generic_int(struct ixgbe_hw *hw, u8 addr, u16 reg, + u16 *val, bool lock) +{ + u32 swfw_mask = hw->phy.phy_semaphore_mask; + int max_retry = 3; + int retry = 0; + u8 csum_byte; + u8 high_bits; + u8 low_bits; + u8 reg_high; + u8 csum; + + reg_high = ((reg >> 7) & 0xFE) | 1; /* Indicate read combined */ + csum = ixgbe_ones_comp_byte_add(reg_high, reg & 0xFF); + csum = ~csum; + do { + if (lock && hw->mac.ops.acquire_swfw_sync(hw, swfw_mask)) + return IXGBE_ERR_SWFW_SYNC; + ixgbe_i2c_start(hw); + /* Device Address and write indication */ + if (ixgbe_out_i2c_byte_ack(hw, addr)) + goto fail; + /* Write bits 14:8 */ + if (ixgbe_out_i2c_byte_ack(hw, reg_high)) + goto fail; + /* Write bits 7:0 */ + if (ixgbe_out_i2c_byte_ack(hw, reg & 0xFF)) + goto fail; + /* Write csum */ + if (ixgbe_out_i2c_byte_ack(hw, csum)) + goto fail; + /* Re-start condition */ + ixgbe_i2c_start(hw); + /* Device Address and read indication */ + if (ixgbe_out_i2c_byte_ack(hw, addr | 1)) + goto fail; + /* Get upper bits */ + if (ixgbe_in_i2c_byte_ack(hw, &high_bits)) + goto fail; + /* Get low bits */ + if (ixgbe_in_i2c_byte_ack(hw, &low_bits)) + goto fail; + /* Get csum */ + ixgbe_clock_in_i2c_byte(hw, &csum_byte); + /* NACK */ + if (ixgbe_clock_out_i2c_bit(hw, false)) + goto fail; + ixgbe_i2c_stop(hw); + if (lock) + hw->mac.ops.release_swfw_sync(hw, swfw_mask); + *val = (high_bits << 8) | low_bits; + return 0; + +fail: + ixgbe_i2c_bus_clear(hw); + if (lock) + hw->mac.ops.release_swfw_sync(hw, swfw_mask); + if (retry < max_retry) + hw_dbg(hw, "I2C byte read combined error - Retrying.\n"); + else + hw_dbg(hw, "I2C byte read combined error.\n"); + retry++; + } while (retry <= max_retry); + + return IXGBE_ERR_I2C; +} + +/** + * ixgbe_write_i2c_combined_generic_int - Perform I2C write combined operation + * @hw: pointer to the hardware structure + * @addr: I2C bus address to write to + * @reg: I2C device register to write to + * @val: value to write + * @lock: true if to take and release semaphore + * + * Returns an error code on error. + */ +s32 ixgbe_write_i2c_combined_generic_int(struct ixgbe_hw *hw, u8 addr, u16 reg, + u16 val, bool lock) +{ + u32 swfw_mask = hw->phy.phy_semaphore_mask; + int max_retry = 1; + int retry = 0; + u8 reg_high; + u8 csum; + + reg_high = (reg >> 7) & 0xFE; /* Indicate write combined */ + csum = ixgbe_ones_comp_byte_add(reg_high, reg & 0xFF); + csum = ixgbe_ones_comp_byte_add(csum, val >> 8); + csum = ixgbe_ones_comp_byte_add(csum, val & 0xFF); + csum = ~csum; + do { + if (lock && hw->mac.ops.acquire_swfw_sync(hw, swfw_mask)) + return IXGBE_ERR_SWFW_SYNC; + ixgbe_i2c_start(hw); + /* Device Address and write indication */ + if (ixgbe_out_i2c_byte_ack(hw, addr)) + goto fail; + /* Write bits 14:8 */ + if (ixgbe_out_i2c_byte_ack(hw, reg_high)) + goto fail; + /* Write bits 7:0 */ + if (ixgbe_out_i2c_byte_ack(hw, reg & 0xFF)) + goto fail; + /* Write data 15:8 */ + if (ixgbe_out_i2c_byte_ack(hw, val >> 8)) + goto fail; + /* Write data 7:0 */ + if (ixgbe_out_i2c_byte_ack(hw, val & 0xFF)) + goto fail; + /* Write csum */ + if (ixgbe_out_i2c_byte_ack(hw, csum)) + goto fail; + ixgbe_i2c_stop(hw); + if (lock) + hw->mac.ops.release_swfw_sync(hw, swfw_mask); + return 0; + +fail: + ixgbe_i2c_bus_clear(hw); + if (lock) + hw->mac.ops.release_swfw_sync(hw, swfw_mask); + if (retry < max_retry) + hw_dbg(hw, "I2C byte write combined error - Retrying.\n"); + else + hw_dbg(hw, "I2C byte write combined error.\n"); + retry++; + } while (retry <= max_retry); + + return IXGBE_ERR_I2C; +} + +/** + * ixgbe_init_phy_ops_generic - Inits PHY function ptrs + * @hw: pointer to the hardware structure + * + * Initialize the function pointers. + **/ +s32 ixgbe_init_phy_ops_generic(struct ixgbe_hw *hw) +{ + struct ixgbe_phy_info *phy = &hw->phy; + + DEBUGFUNC("ixgbe_init_phy_ops_generic"); + + /* PHY */ + phy->ops.identify = ixgbe_identify_phy_generic; + phy->ops.reset = ixgbe_reset_phy_generic; + phy->ops.read_reg = ixgbe_read_phy_reg_generic; + phy->ops.write_reg = ixgbe_write_phy_reg_generic; + phy->ops.read_reg_mdi = ixgbe_read_phy_reg_mdi; + phy->ops.write_reg_mdi = ixgbe_write_phy_reg_mdi; + phy->ops.setup_link = ixgbe_setup_phy_link_generic; + phy->ops.setup_link_speed = ixgbe_setup_phy_link_speed_generic; + phy->ops.check_link = NULL; + phy->ops.get_firmware_version = ixgbe_get_phy_firmware_version_generic; + phy->ops.read_i2c_byte = ixgbe_read_i2c_byte_generic; + phy->ops.write_i2c_byte = ixgbe_write_i2c_byte_generic; + phy->ops.read_i2c_sff8472 = ixgbe_read_i2c_sff8472_generic; + phy->ops.read_i2c_eeprom = ixgbe_read_i2c_eeprom_generic; + phy->ops.write_i2c_eeprom = ixgbe_write_i2c_eeprom_generic; + phy->ops.i2c_bus_clear = ixgbe_i2c_bus_clear; + phy->ops.identify_sfp = ixgbe_identify_module_generic; + phy->sfp_type = ixgbe_sfp_type_unknown; + phy->ops.read_i2c_byte_unlocked = ixgbe_read_i2c_byte_generic_unlocked; + phy->ops.write_i2c_byte_unlocked = + ixgbe_write_i2c_byte_generic_unlocked; + phy->ops.check_overtemp = ixgbe_tn_check_overtemp; + return IXGBE_SUCCESS; +} + +/** + * ixgbe_probe_phy - Probe a single address for a PHY + * @hw: pointer to hardware structure + * @phy_addr: PHY address to probe + * + * Returns true if PHY found + */ +static bool ixgbe_probe_phy(struct ixgbe_hw *hw, u16 phy_addr) +{ + u16 ext_ability = 0; + + if (!ixgbe_validate_phy_addr(hw, phy_addr)) { + hw_dbg(hw, "Unable to validate PHY address 0x%04X\n", + phy_addr); + return false; + } + + if (ixgbe_get_phy_id(hw)) + return false; + + hw->phy.type = ixgbe_get_phy_type_from_id(hw->phy.id); + + if (hw->phy.type == ixgbe_phy_unknown) { + hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_EXT_ABILITY, + IXGBE_MDIO_PMA_PMD_DEV_TYPE, &ext_ability); + if (ext_ability & + (IXGBE_MDIO_PHY_10GBASET_ABILITY | + IXGBE_MDIO_PHY_1000BASET_ABILITY)) + hw->phy.type = ixgbe_phy_cu_unknown; + else + hw->phy.type = ixgbe_phy_generic; + } + + return true; +} + +/** + * ixgbe_identify_phy_generic - Get physical layer module + * @hw: pointer to hardware structure + * + * Determines the physical layer module found on the current adapter. + **/ +s32 ixgbe_identify_phy_generic(struct ixgbe_hw *hw) +{ + s32 status = IXGBE_ERR_PHY_ADDR_INVALID; + u16 phy_addr; + + DEBUGFUNC("ixgbe_identify_phy_generic"); + + if (!hw->phy.phy_semaphore_mask) { + if (hw->bus.lan_id) + hw->phy.phy_semaphore_mask = IXGBE_GSSR_PHY1_SM; + else + hw->phy.phy_semaphore_mask = IXGBE_GSSR_PHY0_SM; + } + + if (hw->phy.type != ixgbe_phy_unknown) + return IXGBE_SUCCESS; + + if (hw->phy.nw_mng_if_sel) { + phy_addr = (hw->phy.nw_mng_if_sel & + IXGBE_NW_MNG_IF_SEL_MDIO_PHY_ADD) >> + IXGBE_NW_MNG_IF_SEL_MDIO_PHY_ADD_SHIFT; + if (ixgbe_probe_phy(hw, phy_addr)) + return IXGBE_SUCCESS; + else + return IXGBE_ERR_PHY_ADDR_INVALID; + } + + for (phy_addr = 0; phy_addr < IXGBE_MAX_PHY_ADDR; phy_addr++) { + if (ixgbe_probe_phy(hw, phy_addr)) { + status = IXGBE_SUCCESS; + break; + } + } + + /* Certain media types do not have a phy so an address will not + * be found and the code will take this path. Caller has to + * decide if it is an error or not. + */ + if (status != IXGBE_SUCCESS) + hw->phy.addr = 0; + + return status; +} + +/** + * ixgbe_check_reset_blocked - check status of MNG FW veto bit + * @hw: pointer to the hardware structure + * + * This function checks the MMNGC.MNG_VETO bit to see if there are + * any constraints on link from manageability. For MAC's that don't + * have this bit just return faluse since the link can not be blocked + * via this method. + **/ +s32 ixgbe_check_reset_blocked(struct ixgbe_hw *hw) +{ + u32 mmngc; + + DEBUGFUNC("ixgbe_check_reset_blocked"); + + /* If we don't have this bit, it can't be blocking */ + if (hw->mac.type == ixgbe_mac_82598EB) + return false; + + mmngc = IXGBE_READ_REG(hw, IXGBE_MMNGC); + if (mmngc & IXGBE_MMNGC_MNG_VETO) { + ERROR_REPORT1(IXGBE_ERROR_SOFTWARE, + "MNG_VETO bit detected.\n"); + return true; + } + + return false; +} + +/** + * ixgbe_validate_phy_addr - Determines phy address is valid + * @hw: pointer to hardware structure + * @phy_addr: PHY address + * + **/ +bool ixgbe_validate_phy_addr(struct ixgbe_hw *hw, u32 phy_addr) +{ + u16 phy_id = 0; + bool valid = false; + + DEBUGFUNC("ixgbe_validate_phy_addr"); + + hw->phy.addr = phy_addr; + hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_ID_HIGH, + IXGBE_MDIO_PMA_PMD_DEV_TYPE, &phy_id); + + if (phy_id != 0xFFFF && phy_id != 0x0) + valid = true; + + hw_dbg(hw, "PHY ID HIGH is 0x%04X\n", phy_id); + + return valid; +} + +/** + * ixgbe_get_phy_id - Get the phy type + * @hw: pointer to hardware structure + * + **/ +s32 ixgbe_get_phy_id(struct ixgbe_hw *hw) +{ + s32 status; + u16 phy_id_high = 0; + u16 phy_id_low = 0; + + DEBUGFUNC("ixgbe_get_phy_id"); + + status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_ID_HIGH, + IXGBE_MDIO_PMA_PMD_DEV_TYPE, + &phy_id_high); + + if (status == IXGBE_SUCCESS) { + hw->phy.id = (u32)(phy_id_high << 16); + status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_ID_LOW, + IXGBE_MDIO_PMA_PMD_DEV_TYPE, + &phy_id_low); + hw->phy.id |= (u32)(phy_id_low & IXGBE_PHY_REVISION_MASK); + hw->phy.revision = (u32)(phy_id_low & ~IXGBE_PHY_REVISION_MASK); + } + hw_dbg(hw, "PHY_ID_HIGH 0x%04X, PHY_ID_LOW 0x%04X\n", + phy_id_high, phy_id_low); + + return status; +} + +/** + * ixgbe_get_phy_type_from_id - Get the phy type + * @phy_id: PHY ID information + * + **/ +enum ixgbe_phy_type ixgbe_get_phy_type_from_id(u32 phy_id) +{ + enum ixgbe_phy_type phy_type; + + DEBUGFUNC("ixgbe_get_phy_type_from_id"); + + switch (phy_id) { + case TN1010_PHY_ID: + phy_type = ixgbe_phy_tn; + break; + case X550_PHY_ID: + case X540_PHY_ID: + phy_type = ixgbe_phy_aq; + break; + case QT2022_PHY_ID: + phy_type = ixgbe_phy_qt; + break; + case ATH_PHY_ID: + phy_type = ixgbe_phy_nl; + break; + case X557_PHY_ID: + case X557_PHY_ID2: + phy_type = ixgbe_phy_x550em_ext_t; + break; + case IXGBE_M88E1500_E_PHY_ID: + case IXGBE_M88E1543_E_PHY_ID: + phy_type = ixgbe_phy_ext_1g_t; + break; + default: + phy_type = ixgbe_phy_unknown; + break; + } + return phy_type; +} + +/** + * ixgbe_reset_phy_generic - Performs a PHY reset + * @hw: pointer to hardware structure + **/ +s32 ixgbe_reset_phy_generic(struct ixgbe_hw *hw) +{ + u32 i; + u16 ctrl = 0; + s32 status = IXGBE_SUCCESS; + + DEBUGFUNC("ixgbe_reset_phy_generic"); + + if (hw->phy.type == ixgbe_phy_unknown) + status = ixgbe_identify_phy_generic(hw); + + if (status != IXGBE_SUCCESS || hw->phy.type == ixgbe_phy_none) + goto out; + + /* Don't reset PHY if it's shut down due to overtemp. */ + if (!hw->phy.reset_if_overtemp && + (IXGBE_ERR_OVERTEMP == hw->phy.ops.check_overtemp(hw))) + goto out; + + /* Blocked by MNG FW so bail */ + if (ixgbe_check_reset_blocked(hw)) + goto out; + + /* + * Perform soft PHY reset to the PHY_XS. + * This will cause a soft reset to the PHY + */ + hw->phy.ops.write_reg(hw, IXGBE_MDIO_PHY_XS_CONTROL, + IXGBE_MDIO_PHY_XS_DEV_TYPE, + IXGBE_MDIO_PHY_XS_RESET); + + /* + * Poll for reset bit to self-clear indicating reset is complete. + * Some PHYs could take up to 3 seconds to complete and need about + * 1.7 usec delay after the reset is complete. + */ + for (i = 0; i < 30; i++) { + msec_delay(100); + if (hw->phy.type == ixgbe_phy_x550em_ext_t) { + status = hw->phy.ops.read_reg(hw, + IXGBE_MDIO_TX_VENDOR_ALARMS_3, + IXGBE_MDIO_PMA_PMD_DEV_TYPE, + &ctrl); + if (status != IXGBE_SUCCESS) + return status; + + if (ctrl & IXGBE_MDIO_TX_VENDOR_ALARMS_3_RST_MASK) { + usec_delay(2); + break; + } + } else { + status = hw->phy.ops.read_reg(hw, + IXGBE_MDIO_PHY_XS_CONTROL, + IXGBE_MDIO_PHY_XS_DEV_TYPE, + &ctrl); + if (status != IXGBE_SUCCESS) + return status; + + if (!(ctrl & IXGBE_MDIO_PHY_XS_RESET)) { + usec_delay(2); + break; + } + } + } + + if (ctrl & IXGBE_MDIO_PHY_XS_RESET) { + status = IXGBE_ERR_RESET_FAILED; + ERROR_REPORT1(IXGBE_ERROR_POLLING, + "PHY reset polling failed to complete.\n"); + } + +out: + return status; +} + +/** + * ixgbe_restart_auto_neg - Restart auto negotiation on the PHY + * @hw: pointer to hardware structure + **/ +void ixgbe_restart_auto_neg(struct ixgbe_hw *hw) +{ + u16 autoneg_reg; + + /* Check if PHY reset is blocked by MNG FW */ + if (ixgbe_check_reset_blocked(hw)) + return; + + /* Restart PHY auto-negotiation. */ + hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_CONTROL, + IXGBE_MDIO_AUTO_NEG_DEV_TYPE, &autoneg_reg); + autoneg_reg |= IXGBE_MII_RESTART; + hw->phy.ops.write_reg(hw, IXGBE_MDIO_AUTO_NEG_CONTROL, + IXGBE_MDIO_AUTO_NEG_DEV_TYPE, autoneg_reg); +} + +/** + * ixgbe_read_phy_reg_mdi - Reads a value from a specified PHY register without + * the SWFW lock + * @hw: pointer to hardware structure + * @reg_addr: 32 bit address of PHY register to read + * @device_type: 5 bit device type + * @phy_data: Pointer to read data from PHY register + **/ +s32 ixgbe_read_phy_reg_mdi(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, + u16 *phy_data) +{ + u32 i, data, command; + + /* Setup and write the address cycle command */ + command = ((reg_addr << IXGBE_MSCA_NP_ADDR_SHIFT) | + (device_type << IXGBE_MSCA_DEV_TYPE_SHIFT) | + (hw->phy.addr << IXGBE_MSCA_PHY_ADDR_SHIFT) | + (IXGBE_MSCA_ADDR_CYCLE | IXGBE_MSCA_MDI_COMMAND)); + + IXGBE_WRITE_REG(hw, IXGBE_MSCA, command); + + /* + * Check every 10 usec to see if the address cycle completed. + * The MDI Command bit will clear when the operation is + * complete + */ + for (i = 0; i < IXGBE_MDIO_COMMAND_TIMEOUT; i++) { + usec_delay(10); + + command = IXGBE_READ_REG(hw, IXGBE_MSCA); + if ((command & IXGBE_MSCA_MDI_COMMAND) == 0) + break; + } + + + if ((command & IXGBE_MSCA_MDI_COMMAND) != 0) { + ERROR_REPORT1(IXGBE_ERROR_POLLING, "PHY address command did not complete.\n"); + hw_dbg(hw, "PHY address command did not complete, returning IXGBE_ERR_PHY\n"); + return IXGBE_ERR_PHY; + } + + /* + * Address cycle complete, setup and write the read + * command + */ + command = ((reg_addr << IXGBE_MSCA_NP_ADDR_SHIFT) | + (device_type << IXGBE_MSCA_DEV_TYPE_SHIFT) | + (hw->phy.addr << IXGBE_MSCA_PHY_ADDR_SHIFT) | + (IXGBE_MSCA_READ | IXGBE_MSCA_MDI_COMMAND)); + + IXGBE_WRITE_REG(hw, IXGBE_MSCA, command); + + /* + * Check every 10 usec to see if the address cycle + * completed. The MDI Command bit will clear when the + * operation is complete + */ + for (i = 0; i < IXGBE_MDIO_COMMAND_TIMEOUT; i++) { + usec_delay(10); + + command = IXGBE_READ_REG(hw, IXGBE_MSCA); + if ((command & IXGBE_MSCA_MDI_COMMAND) == 0) + break; + } + + if ((command & IXGBE_MSCA_MDI_COMMAND) != 0) { + ERROR_REPORT1(IXGBE_ERROR_POLLING, "PHY read command didn't complete\n"); + hw_dbg(hw, "PHY read command didn't complete, returning IXGBE_ERR_PHY\n"); + return IXGBE_ERR_PHY; + } + + /* + * Read operation is complete. Get the data + * from MSRWD + */ + data = IXGBE_READ_REG(hw, IXGBE_MSRWD); + data >>= IXGBE_MSRWD_READ_DATA_SHIFT; + *phy_data = (u16)(data); + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_read_phy_reg_generic - Reads a value from a specified PHY register + * using the SWFW lock - this function is needed in most cases + * @hw: pointer to hardware structure + * @reg_addr: 32 bit address of PHY register to read + * @device_type: 5 bit device type + * @phy_data: Pointer to read data from PHY register + **/ +s32 ixgbe_read_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr, + u32 device_type, u16 *phy_data) +{ + s32 status; + u32 gssr = hw->phy.phy_semaphore_mask; + + DEBUGFUNC("ixgbe_read_phy_reg_generic"); + + if (hw->mac.ops.acquire_swfw_sync(hw, gssr)) + return IXGBE_ERR_SWFW_SYNC; + + status = hw->phy.ops.read_reg_mdi(hw, reg_addr, device_type, phy_data); + + hw->mac.ops.release_swfw_sync(hw, gssr); + + return status; +} + +/** + * ixgbe_write_phy_reg_mdi - Writes a value to specified PHY register + * without SWFW lock + * @hw: pointer to hardware structure + * @reg_addr: 32 bit PHY register to write + * @device_type: 5 bit device type + * @phy_data: Data to write to the PHY register + **/ +s32 ixgbe_write_phy_reg_mdi(struct ixgbe_hw *hw, u32 reg_addr, + u32 device_type, u16 phy_data) +{ + u32 i, command; + + /* Put the data in the MDI single read and write data register*/ + IXGBE_WRITE_REG(hw, IXGBE_MSRWD, (u32)phy_data); + + /* Setup and write the address cycle command */ + command = ((reg_addr << IXGBE_MSCA_NP_ADDR_SHIFT) | + (device_type << IXGBE_MSCA_DEV_TYPE_SHIFT) | + (hw->phy.addr << IXGBE_MSCA_PHY_ADDR_SHIFT) | + (IXGBE_MSCA_ADDR_CYCLE | IXGBE_MSCA_MDI_COMMAND)); + + IXGBE_WRITE_REG(hw, IXGBE_MSCA, command); + + /* + * Check every 10 usec to see if the address cycle completed. + * The MDI Command bit will clear when the operation is + * complete + */ + for (i = 0; i < IXGBE_MDIO_COMMAND_TIMEOUT; i++) { + usec_delay(10); + + command = IXGBE_READ_REG(hw, IXGBE_MSCA); + if ((command & IXGBE_MSCA_MDI_COMMAND) == 0) + break; + } + + if ((command & IXGBE_MSCA_MDI_COMMAND) != 0) { + ERROR_REPORT1(IXGBE_ERROR_POLLING, "PHY address cmd didn't complete\n"); + return IXGBE_ERR_PHY; + } + + /* + * Address cycle complete, setup and write the write + * command + */ + command = ((reg_addr << IXGBE_MSCA_NP_ADDR_SHIFT) | + (device_type << IXGBE_MSCA_DEV_TYPE_SHIFT) | + (hw->phy.addr << IXGBE_MSCA_PHY_ADDR_SHIFT) | + (IXGBE_MSCA_WRITE | IXGBE_MSCA_MDI_COMMAND)); + + IXGBE_WRITE_REG(hw, IXGBE_MSCA, command); + + /* + * Check every 10 usec to see if the address cycle + * completed. The MDI Command bit will clear when the + * operation is complete + */ + for (i = 0; i < IXGBE_MDIO_COMMAND_TIMEOUT; i++) { + usec_delay(10); + + command = IXGBE_READ_REG(hw, IXGBE_MSCA); + if ((command & IXGBE_MSCA_MDI_COMMAND) == 0) + break; + } + + if ((command & IXGBE_MSCA_MDI_COMMAND) != 0) { + ERROR_REPORT1(IXGBE_ERROR_POLLING, "PHY write cmd didn't complete\n"); + return IXGBE_ERR_PHY; + } + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_write_phy_reg_generic - Writes a value to specified PHY register + * using SWFW lock- this function is needed in most cases + * @hw: pointer to hardware structure + * @reg_addr: 32 bit PHY register to write + * @device_type: 5 bit device type + * @phy_data: Data to write to the PHY register + **/ +s32 ixgbe_write_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr, + u32 device_type, u16 phy_data) +{ + s32 status; + u32 gssr = hw->phy.phy_semaphore_mask; + + DEBUGFUNC("ixgbe_write_phy_reg_generic"); + + if (hw->mac.ops.acquire_swfw_sync(hw, gssr) == IXGBE_SUCCESS) { + status = hw->phy.ops.write_reg_mdi(hw, reg_addr, device_type, + phy_data); + hw->mac.ops.release_swfw_sync(hw, gssr); + } else { + status = IXGBE_ERR_SWFW_SYNC; + } + + return status; +} + +/** + * ixgbe_setup_phy_link_generic - Set and restart auto-neg + * @hw: pointer to hardware structure + * + * Restart auto-negotiation and PHY and waits for completion. + **/ +s32 ixgbe_setup_phy_link_generic(struct ixgbe_hw *hw) +{ + s32 status = IXGBE_SUCCESS; + u16 autoneg_reg = IXGBE_MII_AUTONEG_REG; + bool autoneg = false; + ixgbe_link_speed speed; + + DEBUGFUNC("ixgbe_setup_phy_link_generic"); + + ixgbe_get_copper_link_capabilities_generic(hw, &speed, &autoneg); + + /* Set or unset auto-negotiation 10G advertisement */ + hw->phy.ops.read_reg(hw, IXGBE_MII_10GBASE_T_AUTONEG_CTRL_REG, + IXGBE_MDIO_AUTO_NEG_DEV_TYPE, + &autoneg_reg); + + autoneg_reg &= ~IXGBE_MII_10GBASE_T_ADVERTISE; + if ((hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_10GB_FULL) && + (speed & IXGBE_LINK_SPEED_10GB_FULL)) + autoneg_reg |= IXGBE_MII_10GBASE_T_ADVERTISE; + + hw->phy.ops.write_reg(hw, IXGBE_MII_10GBASE_T_AUTONEG_CTRL_REG, + IXGBE_MDIO_AUTO_NEG_DEV_TYPE, + autoneg_reg); + + hw->phy.ops.read_reg(hw, IXGBE_MII_AUTONEG_VENDOR_PROVISION_1_REG, + IXGBE_MDIO_AUTO_NEG_DEV_TYPE, + &autoneg_reg); + + if (hw->mac.type == ixgbe_mac_X550 || + ixgbe_is_mac_E6xx(hw->mac.type)) { + /* Set or unset auto-negotiation 5G advertisement */ + autoneg_reg &= ~IXGBE_MII_5GBASE_T_ADVERTISE; + if ((hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_5GB_FULL) && + (speed & IXGBE_LINK_SPEED_5GB_FULL)) + autoneg_reg |= IXGBE_MII_5GBASE_T_ADVERTISE; + + /* Set or unset auto-negotiation 2.5G advertisement */ + autoneg_reg &= ~IXGBE_MII_2_5GBASE_T_ADVERTISE; + if ((hw->phy.autoneg_advertised & + IXGBE_LINK_SPEED_2_5GB_FULL) && + (speed & IXGBE_LINK_SPEED_2_5GB_FULL)) + autoneg_reg |= IXGBE_MII_2_5GBASE_T_ADVERTISE; + } + + /* Set or unset auto-negotiation 1G advertisement */ + autoneg_reg &= ~IXGBE_MII_1GBASE_T_ADVERTISE; + if ((hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_1GB_FULL) && + (speed & IXGBE_LINK_SPEED_1GB_FULL)) + autoneg_reg |= IXGBE_MII_1GBASE_T_ADVERTISE; + + hw->phy.ops.write_reg(hw, IXGBE_MII_AUTONEG_VENDOR_PROVISION_1_REG, + IXGBE_MDIO_AUTO_NEG_DEV_TYPE, + autoneg_reg); + + /* Set or unset auto-negotiation 100M advertisement */ + hw->phy.ops.read_reg(hw, IXGBE_MII_AUTONEG_ADVERTISE_REG, + IXGBE_MDIO_AUTO_NEG_DEV_TYPE, + &autoneg_reg); + + autoneg_reg &= ~(IXGBE_MII_100BASE_T_ADVERTISE | + IXGBE_MII_100BASE_T_ADVERTISE_HALF); + if ((hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_100_FULL) && + (speed & IXGBE_LINK_SPEED_100_FULL)) + autoneg_reg |= IXGBE_MII_100BASE_T_ADVERTISE; + + hw->phy.ops.write_reg(hw, IXGBE_MII_AUTONEG_ADVERTISE_REG, + IXGBE_MDIO_AUTO_NEG_DEV_TYPE, + autoneg_reg); + + ixgbe_restart_auto_neg(hw); + return status; +} + +/** + * ixgbe_setup_phy_link_speed_generic - Sets the auto advertised capabilities + * @hw: pointer to hardware structure + * @speed: new link speed + * @autoneg_wait_to_complete: unused + **/ +s32 ixgbe_setup_phy_link_speed_generic(struct ixgbe_hw *hw, + ixgbe_link_speed speed, + bool autoneg_wait_to_complete) +{ + UNREFERENCED_1PARAMETER(autoneg_wait_to_complete); + + DEBUGFUNC("ixgbe_setup_phy_link_speed_generic"); + + /* + * Clear autoneg_advertised and set new values based on input link + * speed. + */ + hw->phy.autoneg_advertised = 0; + + if (speed & IXGBE_LINK_SPEED_10GB_FULL) + hw->phy.autoneg_advertised |= IXGBE_LINK_SPEED_10GB_FULL; + + if (speed & IXGBE_LINK_SPEED_5GB_FULL) + hw->phy.autoneg_advertised |= IXGBE_LINK_SPEED_5GB_FULL; + + if (speed & IXGBE_LINK_SPEED_2_5GB_FULL) + hw->phy.autoneg_advertised |= IXGBE_LINK_SPEED_2_5GB_FULL; + + if (speed & IXGBE_LINK_SPEED_1GB_FULL) + hw->phy.autoneg_advertised |= IXGBE_LINK_SPEED_1GB_FULL; + + if (speed & IXGBE_LINK_SPEED_100_FULL) + hw->phy.autoneg_advertised |= IXGBE_LINK_SPEED_100_FULL; + + if (speed & IXGBE_LINK_SPEED_10_FULL) + hw->phy.autoneg_advertised |= IXGBE_LINK_SPEED_10_FULL; + + /* Setup link based on the new speed settings */ + ixgbe_setup_phy_link(hw); + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_get_copper_speeds_supported - Get copper link speeds from phy + * @hw: pointer to hardware structure + * + * Determines the supported link capabilities by reading the PHY auto + * negotiation register. + **/ +static s32 ixgbe_get_copper_speeds_supported(struct ixgbe_hw *hw) +{ + s32 status; + u16 speed_ability; + + status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_SPEED_ABILITY, + IXGBE_MDIO_PMA_PMD_DEV_TYPE, + &speed_ability); + if (status) + return status; + + if (speed_ability & IXGBE_MDIO_PHY_SPEED_10G) + hw->phy.speeds_supported |= IXGBE_LINK_SPEED_10GB_FULL; + if (speed_ability & IXGBE_MDIO_PHY_SPEED_1G) + hw->phy.speeds_supported |= IXGBE_LINK_SPEED_1GB_FULL; + if (speed_ability & IXGBE_MDIO_PHY_SPEED_100M) + hw->phy.speeds_supported |= IXGBE_LINK_SPEED_100_FULL; + + switch (hw->mac.type) { + case ixgbe_mac_X550: + case ixgbe_mac_E610: + hw->phy.speeds_supported |= IXGBE_LINK_SPEED_2_5GB_FULL; + hw->phy.speeds_supported |= IXGBE_LINK_SPEED_5GB_FULL; + break; + case ixgbe_mac_X550EM_x: + case ixgbe_mac_X550EM_a: + hw->phy.speeds_supported &= ~IXGBE_LINK_SPEED_100_FULL; + break; + default: + break; + } + + return status; +} + +/** + * ixgbe_get_copper_link_capabilities_generic - Determines link capabilities + * @hw: pointer to hardware structure + * @speed: pointer to link speed + * @autoneg: boolean auto-negotiation value + **/ +s32 ixgbe_get_copper_link_capabilities_generic(struct ixgbe_hw *hw, + ixgbe_link_speed *speed, + bool *autoneg) +{ + s32 status = IXGBE_SUCCESS; + + DEBUGFUNC("ixgbe_get_copper_link_capabilities_generic"); + + *autoneg = true; + if (!hw->phy.speeds_supported) + status = ixgbe_get_copper_speeds_supported(hw); + + *speed = hw->phy.speeds_supported; + return status; +} + +/** + * ixgbe_check_phy_link_tnx - Determine link and speed status + * @hw: pointer to hardware structure + * @speed: current link speed + * @link_up: true is link is up, false otherwise + * + * Reads the VS1 register to determine if link is up and the current speed for + * the PHY. + **/ +s32 ixgbe_check_phy_link_tnx(struct ixgbe_hw *hw, ixgbe_link_speed *speed, + bool *link_up) +{ + s32 status = IXGBE_SUCCESS; + u32 time_out; + u32 max_time_out = 10; + u16 phy_link = 0; + u16 phy_speed = 0; + u16 phy_data = 0; + + DEBUGFUNC("ixgbe_check_phy_link_tnx"); + + /* Initialize speed and link to default case */ + *link_up = false; + *speed = IXGBE_LINK_SPEED_10GB_FULL; + + /* + * Check current speed and link status of the PHY register. + * This is a vendor specific register and may have to + * be changed for other copper PHYs. + */ + for (time_out = 0; time_out < max_time_out; time_out++) { + usec_delay(10); + status = hw->phy.ops.read_reg(hw, + IXGBE_MDIO_VENDOR_SPECIFIC_1_STATUS, + IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE, + &phy_data); + phy_link = phy_data & IXGBE_MDIO_VENDOR_SPECIFIC_1_LINK_STATUS; + phy_speed = phy_data & + IXGBE_MDIO_VENDOR_SPECIFIC_1_SPEED_STATUS; + if (phy_link == IXGBE_MDIO_VENDOR_SPECIFIC_1_LINK_STATUS) { + *link_up = true; + if (phy_speed == + IXGBE_MDIO_VENDOR_SPECIFIC_1_SPEED_STATUS) + *speed = IXGBE_LINK_SPEED_1GB_FULL; + break; + } + } + + return status; +} + +/** + * ixgbe_setup_phy_link_tnx - Set and restart auto-neg + * @hw: pointer to hardware structure + * + * Restart auto-negotiation and PHY and waits for completion. + **/ +s32 ixgbe_setup_phy_link_tnx(struct ixgbe_hw *hw) +{ + s32 status = IXGBE_SUCCESS; + u16 autoneg_reg = IXGBE_MII_AUTONEG_REG; + bool autoneg = false; + ixgbe_link_speed speed; + + DEBUGFUNC("ixgbe_setup_phy_link_tnx"); + + ixgbe_get_copper_link_capabilities_generic(hw, &speed, &autoneg); + + if (speed & IXGBE_LINK_SPEED_10GB_FULL) { + /* Set or unset auto-negotiation 10G advertisement */ + hw->phy.ops.read_reg(hw, IXGBE_MII_10GBASE_T_AUTONEG_CTRL_REG, + IXGBE_MDIO_AUTO_NEG_DEV_TYPE, + &autoneg_reg); + + autoneg_reg &= ~IXGBE_MII_10GBASE_T_ADVERTISE; + if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_10GB_FULL) + autoneg_reg |= IXGBE_MII_10GBASE_T_ADVERTISE; + + hw->phy.ops.write_reg(hw, IXGBE_MII_10GBASE_T_AUTONEG_CTRL_REG, + IXGBE_MDIO_AUTO_NEG_DEV_TYPE, + autoneg_reg); + } + + if (speed & IXGBE_LINK_SPEED_1GB_FULL) { + /* Set or unset auto-negotiation 1G advertisement */ + hw->phy.ops.read_reg(hw, IXGBE_MII_AUTONEG_XNP_TX_REG, + IXGBE_MDIO_AUTO_NEG_DEV_TYPE, + &autoneg_reg); + + autoneg_reg &= ~IXGBE_MII_1GBASE_T_ADVERTISE_XNP_TX; + if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_1GB_FULL) + autoneg_reg |= IXGBE_MII_1GBASE_T_ADVERTISE_XNP_TX; + + hw->phy.ops.write_reg(hw, IXGBE_MII_AUTONEG_XNP_TX_REG, + IXGBE_MDIO_AUTO_NEG_DEV_TYPE, + autoneg_reg); + } + + if (speed & IXGBE_LINK_SPEED_100_FULL) { + /* Set or unset auto-negotiation 100M advertisement */ + hw->phy.ops.read_reg(hw, IXGBE_MII_AUTONEG_ADVERTISE_REG, + IXGBE_MDIO_AUTO_NEG_DEV_TYPE, + &autoneg_reg); + + autoneg_reg &= ~IXGBE_MII_100BASE_T_ADVERTISE; + if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_100_FULL) + autoneg_reg |= IXGBE_MII_100BASE_T_ADVERTISE; + + hw->phy.ops.write_reg(hw, IXGBE_MII_AUTONEG_ADVERTISE_REG, + IXGBE_MDIO_AUTO_NEG_DEV_TYPE, + autoneg_reg); + } + + ixgbe_restart_auto_neg(hw); + return status; +} + +/** + * ixgbe_get_phy_firmware_version_tnx - Gets the PHY Firmware Version + * @hw: pointer to hardware structure + * @firmware_version: pointer to the PHY Firmware Version + **/ +s32 ixgbe_get_phy_firmware_version_tnx(struct ixgbe_hw *hw, + u16 *firmware_version) +{ + s32 status; + + DEBUGFUNC("ixgbe_get_phy_firmware_version_tnx"); + + status = hw->phy.ops.read_reg(hw, TNX_FW_REV, + IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE, + firmware_version); + + return status; +} + +/** + * ixgbe_get_phy_firmware_version_generic - Gets the PHY Firmware Version + * @hw: pointer to hardware structure + * @firmware_version: pointer to the PHY Firmware Version + **/ +s32 ixgbe_get_phy_firmware_version_generic(struct ixgbe_hw *hw, + u16 *firmware_version) +{ + s32 status; + + DEBUGFUNC("ixgbe_get_phy_firmware_version_generic"); + + status = hw->phy.ops.read_reg(hw, AQ_FW_REV, + IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE, + firmware_version); + + return status; +} + +/** + * ixgbe_reset_phy_nl - Performs a PHY reset + * @hw: pointer to hardware structure + **/ +s32 ixgbe_reset_phy_nl(struct ixgbe_hw *hw) +{ + u16 phy_offset, control, eword, edata, block_crc; + bool end_data = false; + u16 list_offset, data_offset; + u16 phy_data = 0; + s32 ret_val = IXGBE_SUCCESS; + u32 i; + + DEBUGFUNC("ixgbe_reset_phy_nl"); + + /* Blocked by MNG FW so bail */ + if (ixgbe_check_reset_blocked(hw)) + goto out; + + hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_XS_CONTROL, + IXGBE_MDIO_PHY_XS_DEV_TYPE, &phy_data); + + /* reset the PHY and poll for completion */ + hw->phy.ops.write_reg(hw, IXGBE_MDIO_PHY_XS_CONTROL, + IXGBE_MDIO_PHY_XS_DEV_TYPE, + (phy_data | IXGBE_MDIO_PHY_XS_RESET)); + + for (i = 0; i < 100; i++) { + hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_XS_CONTROL, + IXGBE_MDIO_PHY_XS_DEV_TYPE, &phy_data); + if ((phy_data & IXGBE_MDIO_PHY_XS_RESET) == 0) + break; + msec_delay(10); + } + + if ((phy_data & IXGBE_MDIO_PHY_XS_RESET) != 0) { + hw_dbg(hw, "PHY reset did not complete.\n"); + ret_val = IXGBE_ERR_PHY; + goto out; + } + + /* Get init offsets */ + ret_val = ixgbe_get_sfp_init_sequence_offsets(hw, &list_offset, + &data_offset); + if (ret_val != IXGBE_SUCCESS) + goto out; + + ret_val = hw->eeprom.ops.read(hw, data_offset, &block_crc); + data_offset++; + while (!end_data) { + /* + * Read control word from PHY init contents offset + */ + ret_val = hw->eeprom.ops.read(hw, data_offset, &eword); + if (ret_val) + goto err_eeprom; + control = (eword & IXGBE_CONTROL_MASK_NL) >> + IXGBE_CONTROL_SHIFT_NL; + edata = eword & IXGBE_DATA_MASK_NL; + switch (control) { + case IXGBE_DELAY_NL: + data_offset++; + hw_dbg(hw, "DELAY: %d MS\n", edata); + msec_delay(edata); + break; + case IXGBE_DATA_NL: + hw_dbg(hw, "DATA:\n"); + data_offset++; + ret_val = hw->eeprom.ops.read(hw, data_offset, + &phy_offset); + if (ret_val) + goto err_eeprom; + data_offset++; + for (i = 0; i < edata; i++) { + ret_val = hw->eeprom.ops.read(hw, data_offset, + &eword); + if (ret_val) + goto err_eeprom; + hw->phy.ops.write_reg(hw, phy_offset, + IXGBE_TWINAX_DEV, eword); + hw_dbg(hw, "Wrote %4.4x to %4.4x\n", eword, + phy_offset); + data_offset++; + phy_offset++; + } + break; + case IXGBE_CONTROL_NL: + data_offset++; + hw_dbg(hw, "CONTROL:\n"); + if (edata == IXGBE_CONTROL_EOL_NL) { + hw_dbg(hw, "EOL\n"); + end_data = true; + } else if (edata == IXGBE_CONTROL_SOL_NL) { + hw_dbg(hw, "SOL\n"); + } else { + hw_dbg(hw, "Bad control value\n"); + ret_val = IXGBE_ERR_PHY; + goto out; + } + break; + default: + hw_dbg(hw, "Bad control type\n"); + ret_val = IXGBE_ERR_PHY; + goto out; + } + } + +out: + return ret_val; + +err_eeprom: + ERROR_REPORT2(IXGBE_ERROR_INVALID_STATE, + "eeprom read at offset %d failed", data_offset); + return IXGBE_ERR_PHY; +} + +/** + * ixgbe_identify_module_generic - Identifies module type + * @hw: pointer to hardware structure + * + * Determines HW type and calls appropriate function. + **/ +s32 ixgbe_identify_module_generic(struct ixgbe_hw *hw) +{ + s32 status = IXGBE_ERR_SFP_NOT_PRESENT; + + DEBUGFUNC("ixgbe_identify_module_generic"); + + switch (hw->mac.ops.get_media_type(hw)) { + case ixgbe_media_type_fiber: + status = ixgbe_identify_sfp_module_generic(hw); + break; + + case ixgbe_media_type_fiber_qsfp: + status = ixgbe_identify_qsfp_module_generic(hw); + break; + + default: + hw->phy.sfp_type = ixgbe_sfp_type_not_present; + status = IXGBE_ERR_SFP_NOT_PRESENT; + break; + } + + return status; +} + +/** + * ixgbe_identify_sfp_module_generic - Identifies SFP modules + * @hw: pointer to hardware structure + * + * Searches for and identifies the SFP module and assigns appropriate PHY type. + **/ +s32 ixgbe_identify_sfp_module_generic(struct ixgbe_hw *hw) +{ + s32 status = IXGBE_ERR_PHY_ADDR_INVALID; + u32 vendor_oui = 0; + enum ixgbe_sfp_type stored_sfp_type = hw->phy.sfp_type; + u8 identifier = 0; + u8 comp_codes_1g = 0; + u8 comp_codes_10g = 0; + u8 oui_bytes[3] = {0, 0, 0}; + u8 cable_tech = 0; + u8 cable_spec = 0; + u16 enforce_sfp = 0; + + DEBUGFUNC("ixgbe_identify_sfp_module_generic"); + + if (hw->mac.ops.get_media_type(hw) != ixgbe_media_type_fiber) { + hw->phy.sfp_type = ixgbe_sfp_type_not_present; + status = IXGBE_ERR_SFP_NOT_PRESENT; + goto out; + } + + /* LAN ID is needed for I2C access */ + hw->mac.ops.set_lan_id(hw); + + status = hw->phy.ops.read_i2c_eeprom(hw, + IXGBE_SFF_IDENTIFIER, + &identifier); + + if (status != IXGBE_SUCCESS) + goto err_read_i2c_eeprom; + + if (identifier != IXGBE_SFF_IDENTIFIER_SFP) { + hw->phy.type = ixgbe_phy_sfp_unsupported; + status = IXGBE_ERR_SFP_NOT_SUPPORTED; + } else { + status = hw->phy.ops.read_i2c_eeprom(hw, + IXGBE_SFF_1GBE_COMP_CODES, + &comp_codes_1g); + + if (status != IXGBE_SUCCESS) + goto err_read_i2c_eeprom; + + status = hw->phy.ops.read_i2c_eeprom(hw, + IXGBE_SFF_10GBE_COMP_CODES, + &comp_codes_10g); + + if (status != IXGBE_SUCCESS) + goto err_read_i2c_eeprom; + status = hw->phy.ops.read_i2c_eeprom(hw, + IXGBE_SFF_CABLE_TECHNOLOGY, + &cable_tech); + + if (status != IXGBE_SUCCESS) + goto err_read_i2c_eeprom; + + /* ID Module + * ========= + * 0 SFP_DA_CU + * 1 SFP_SR + * 2 SFP_LR + * 3 SFP_DA_CORE0 - 82599-specific + * 4 SFP_DA_CORE1 - 82599-specific + * 5 SFP_SR/LR_CORE0 - 82599-specific + * 6 SFP_SR/LR_CORE1 - 82599-specific + * 7 SFP_act_lmt_DA_CORE0 - 82599-specific + * 8 SFP_act_lmt_DA_CORE1 - 82599-specific + * 9 SFP_1g_cu_CORE0 - 82599-specific + * 10 SFP_1g_cu_CORE1 - 82599-specific + * 11 SFP_1g_sx_CORE0 - 82599-specific + * 12 SFP_1g_sx_CORE1 - 82599-specific + */ + if (hw->mac.type == ixgbe_mac_82598EB) { + if (cable_tech & IXGBE_SFF_DA_PASSIVE_CABLE) + hw->phy.sfp_type = ixgbe_sfp_type_da_cu; + else if (comp_codes_10g & IXGBE_SFF_10GBASESR_CAPABLE) + hw->phy.sfp_type = ixgbe_sfp_type_sr; + else if (comp_codes_10g & IXGBE_SFF_10GBASELR_CAPABLE) + hw->phy.sfp_type = ixgbe_sfp_type_lr; + else + hw->phy.sfp_type = ixgbe_sfp_type_unknown; + } else { + if (cable_tech & IXGBE_SFF_DA_PASSIVE_CABLE) { + if (hw->bus.lan_id == 0) + hw->phy.sfp_type = + ixgbe_sfp_type_da_cu_core0; + else + hw->phy.sfp_type = + ixgbe_sfp_type_da_cu_core1; + } else if (cable_tech & IXGBE_SFF_DA_ACTIVE_CABLE) { + hw->phy.ops.read_i2c_eeprom( + hw, IXGBE_SFF_CABLE_SPEC_COMP, + &cable_spec); + if (cable_spec & + IXGBE_SFF_DA_SPEC_ACTIVE_LIMITING) { + if (hw->bus.lan_id == 0) + hw->phy.sfp_type = + ixgbe_sfp_type_da_act_lmt_core0; + else + hw->phy.sfp_type = + ixgbe_sfp_type_da_act_lmt_core1; + } else { + hw->phy.sfp_type = + ixgbe_sfp_type_unknown; + } + } else if (comp_codes_10g & + (IXGBE_SFF_10GBASESR_CAPABLE | + IXGBE_SFF_10GBASELR_CAPABLE)) { + if (hw->bus.lan_id == 0) + hw->phy.sfp_type = + ixgbe_sfp_type_srlr_core0; + else + hw->phy.sfp_type = + ixgbe_sfp_type_srlr_core1; + } else if (comp_codes_1g & IXGBE_SFF_1GBASET_CAPABLE) { + if (hw->bus.lan_id == 0) + hw->phy.sfp_type = + ixgbe_sfp_type_1g_cu_core0; + else + hw->phy.sfp_type = + ixgbe_sfp_type_1g_cu_core1; + } else if (comp_codes_1g & IXGBE_SFF_1GBASESX_CAPABLE) { + if (hw->bus.lan_id == 0) + hw->phy.sfp_type = + ixgbe_sfp_type_1g_sx_core0; + else + hw->phy.sfp_type = + ixgbe_sfp_type_1g_sx_core1; + } else if (comp_codes_1g & IXGBE_SFF_1GBASELX_CAPABLE) { + if (hw->bus.lan_id == 0) + hw->phy.sfp_type = + ixgbe_sfp_type_1g_lx_core0; + else + hw->phy.sfp_type = + ixgbe_sfp_type_1g_lx_core1; + } else { + hw->phy.sfp_type = ixgbe_sfp_type_unknown; + } + } + + if (hw->phy.sfp_type != stored_sfp_type) + hw->phy.sfp_setup_needed = true; + + /* Determine if the SFP+ PHY is dual speed or not. */ + hw->phy.multispeed_fiber = false; + if (((comp_codes_1g & IXGBE_SFF_1GBASESX_CAPABLE) && + (comp_codes_10g & IXGBE_SFF_10GBASESR_CAPABLE)) || + ((comp_codes_1g & IXGBE_SFF_1GBASELX_CAPABLE) && + (comp_codes_10g & IXGBE_SFF_10GBASELR_CAPABLE))) + hw->phy.multispeed_fiber = true; + + /* Determine PHY vendor */ + if (hw->phy.type != ixgbe_phy_nl) { + hw->phy.id = identifier; + status = hw->phy.ops.read_i2c_eeprom(hw, + IXGBE_SFF_VENDOR_OUI_BYTE0, + &oui_bytes[0]); + + if (status != IXGBE_SUCCESS) + goto err_read_i2c_eeprom; + + status = hw->phy.ops.read_i2c_eeprom(hw, + IXGBE_SFF_VENDOR_OUI_BYTE1, + &oui_bytes[1]); + + if (status != IXGBE_SUCCESS) + goto err_read_i2c_eeprom; + + status = hw->phy.ops.read_i2c_eeprom(hw, + IXGBE_SFF_VENDOR_OUI_BYTE2, + &oui_bytes[2]); + + if (status != IXGBE_SUCCESS) + goto err_read_i2c_eeprom; + + vendor_oui = + ((oui_bytes[0] << IXGBE_SFF_VENDOR_OUI_BYTE0_SHIFT) | + (oui_bytes[1] << IXGBE_SFF_VENDOR_OUI_BYTE1_SHIFT) | + (oui_bytes[2] << IXGBE_SFF_VENDOR_OUI_BYTE2_SHIFT)); + + switch (vendor_oui) { + case IXGBE_SFF_VENDOR_OUI_TYCO: + if (cable_tech & IXGBE_SFF_DA_PASSIVE_CABLE) + hw->phy.type = + ixgbe_phy_sfp_passive_tyco; + break; + case IXGBE_SFF_VENDOR_OUI_FTL: + if (cable_tech & IXGBE_SFF_DA_ACTIVE_CABLE) + hw->phy.type = ixgbe_phy_sfp_ftl_active; + else + hw->phy.type = ixgbe_phy_sfp_ftl; + break; + case IXGBE_SFF_VENDOR_OUI_AVAGO: + hw->phy.type = ixgbe_phy_sfp_avago; + break; + case IXGBE_SFF_VENDOR_OUI_INTEL: + hw->phy.type = ixgbe_phy_sfp_intel; + break; + default: + if (cable_tech & IXGBE_SFF_DA_PASSIVE_CABLE) + hw->phy.type = + ixgbe_phy_sfp_passive_unknown; + else if (cable_tech & IXGBE_SFF_DA_ACTIVE_CABLE) + hw->phy.type = + ixgbe_phy_sfp_active_unknown; + else + hw->phy.type = ixgbe_phy_sfp_unknown; + break; + } + } + + /* Allow any DA cable vendor */ + if (cable_tech & (IXGBE_SFF_DA_PASSIVE_CABLE | + IXGBE_SFF_DA_ACTIVE_CABLE)) { + status = IXGBE_SUCCESS; + goto out; + } + + /* Verify supported 1G SFP modules */ + if (comp_codes_10g == 0 && + !(hw->phy.sfp_type == ixgbe_sfp_type_1g_cu_core1 || + hw->phy.sfp_type == ixgbe_sfp_type_1g_cu_core0 || + hw->phy.sfp_type == ixgbe_sfp_type_1g_lx_core0 || + hw->phy.sfp_type == ixgbe_sfp_type_1g_lx_core1 || + hw->phy.sfp_type == ixgbe_sfp_type_1g_sx_core0 || + hw->phy.sfp_type == ixgbe_sfp_type_1g_sx_core1)) { + hw->phy.type = ixgbe_phy_sfp_unsupported; + status = IXGBE_ERR_SFP_NOT_SUPPORTED; + goto out; + } + + /* Anything else 82598-based is supported */ + if (hw->mac.type == ixgbe_mac_82598EB) { + status = IXGBE_SUCCESS; + goto out; + } + + ixgbe_get_device_caps(hw, &enforce_sfp); + if (!(enforce_sfp & IXGBE_DEVICE_CAPS_ALLOW_ANY_SFP) && + !(hw->phy.sfp_type == ixgbe_sfp_type_1g_cu_core0 || + hw->phy.sfp_type == ixgbe_sfp_type_1g_cu_core1 || + hw->phy.sfp_type == ixgbe_sfp_type_1g_lx_core0 || + hw->phy.sfp_type == ixgbe_sfp_type_1g_lx_core1 || + hw->phy.sfp_type == ixgbe_sfp_type_1g_sx_core0 || + hw->phy.sfp_type == ixgbe_sfp_type_1g_sx_core1)) { + /* Make sure we're a supported PHY type */ + if (hw->phy.type == ixgbe_phy_sfp_intel) { + status = IXGBE_SUCCESS; + } else { + if (hw->allow_unsupported_sfp == true) { + EWARN(hw, "WARNING: Intel (R) Network Connections are quality tested using Intel (R) Ethernet Optics. Using untested modules is not supported and may cause unstable operation or damage to the module or the adapter. Intel Corporation is not responsible for any harm caused by using untested modules.\n"); + status = IXGBE_SUCCESS; + } else { + hw_dbg(hw, "SFP+ module not supported\n"); + hw->phy.type = + ixgbe_phy_sfp_unsupported; + status = IXGBE_ERR_SFP_NOT_SUPPORTED; + } + } + } else { + status = IXGBE_SUCCESS; + } + } + +out: + return status; + +err_read_i2c_eeprom: + hw->phy.sfp_type = ixgbe_sfp_type_not_present; + if (hw->phy.type != ixgbe_phy_nl) { + hw->phy.id = 0; + hw->phy.type = ixgbe_phy_unknown; + } + return IXGBE_ERR_SFP_NOT_PRESENT; +} + +/** + * ixgbe_get_supported_phy_sfp_layer_generic - Returns physical layer type + * @hw: pointer to hardware structure + * + * Determines physical layer capabilities of the current SFP. + */ +u64 ixgbe_get_supported_phy_sfp_layer_generic(struct ixgbe_hw *hw) +{ + u64 physical_layer = IXGBE_PHYSICAL_LAYER_UNKNOWN; + u8 comp_codes_10g = 0; + u8 comp_codes_1g = 0; + + DEBUGFUNC("ixgbe_get_supported_phy_sfp_layer_generic"); + + hw->phy.ops.identify_sfp(hw); + if (hw->phy.sfp_type == ixgbe_sfp_type_not_present) + return physical_layer; + + switch (hw->phy.type) { + case ixgbe_phy_sfp_passive_tyco: + case ixgbe_phy_sfp_passive_unknown: + case ixgbe_phy_qsfp_passive_unknown: + physical_layer = IXGBE_PHYSICAL_LAYER_SFP_PLUS_CU; + break; + case ixgbe_phy_sfp_ftl_active: + case ixgbe_phy_sfp_active_unknown: + case ixgbe_phy_qsfp_active_unknown: + physical_layer = IXGBE_PHYSICAL_LAYER_SFP_ACTIVE_DA; + break; + case ixgbe_phy_sfp_avago: + case ixgbe_phy_sfp_ftl: + case ixgbe_phy_sfp_intel: + case ixgbe_phy_sfp_unknown: + hw->phy.ops.read_i2c_eeprom(hw, + IXGBE_SFF_1GBE_COMP_CODES, &comp_codes_1g); + hw->phy.ops.read_i2c_eeprom(hw, + IXGBE_SFF_10GBE_COMP_CODES, &comp_codes_10g); + if (comp_codes_10g & IXGBE_SFF_10GBASESR_CAPABLE) + physical_layer = IXGBE_PHYSICAL_LAYER_10GBASE_SR; + else if (comp_codes_10g & IXGBE_SFF_10GBASELR_CAPABLE) + physical_layer = IXGBE_PHYSICAL_LAYER_10GBASE_LR; + else if (comp_codes_1g & IXGBE_SFF_1GBASET_CAPABLE) + physical_layer = IXGBE_PHYSICAL_LAYER_1000BASE_T; + else if (comp_codes_1g & IXGBE_SFF_1GBASESX_CAPABLE) + physical_layer = IXGBE_PHYSICAL_LAYER_1000BASE_SX; + break; + case ixgbe_phy_qsfp_intel: + case ixgbe_phy_qsfp_unknown: + hw->phy.ops.read_i2c_eeprom(hw, + IXGBE_SFF_QSFP_10GBE_COMP, &comp_codes_10g); + if (comp_codes_10g & IXGBE_SFF_10GBASESR_CAPABLE) + physical_layer = IXGBE_PHYSICAL_LAYER_10GBASE_SR; + else if (comp_codes_10g & IXGBE_SFF_10GBASELR_CAPABLE) + physical_layer = IXGBE_PHYSICAL_LAYER_10GBASE_LR; + break; + default: + break; + } + + return physical_layer; +} + +/** + * ixgbe_identify_qsfp_module_generic - Identifies QSFP modules + * @hw: pointer to hardware structure + * + * Searches for and identifies the QSFP module and assigns appropriate PHY type + **/ +s32 ixgbe_identify_qsfp_module_generic(struct ixgbe_hw *hw) +{ + s32 status = IXGBE_ERR_PHY_ADDR_INVALID; + u32 vendor_oui = 0; + enum ixgbe_sfp_type stored_sfp_type = hw->phy.sfp_type; + u8 identifier = 0; + u8 comp_codes_1g = 0; + u8 comp_codes_10g = 0; + u8 oui_bytes[3] = {0, 0, 0}; + u16 enforce_sfp = 0; + u8 connector = 0; + u8 cable_length = 0; + u8 device_tech = 0; + bool active_cable = false; + + DEBUGFUNC("ixgbe_identify_qsfp_module_generic"); + + if (hw->mac.ops.get_media_type(hw) != ixgbe_media_type_fiber_qsfp) { + hw->phy.sfp_type = ixgbe_sfp_type_not_present; + status = IXGBE_ERR_SFP_NOT_PRESENT; + goto out; + } + + /* LAN ID is needed for I2C access */ + hw->mac.ops.set_lan_id(hw); + + status = hw->phy.ops.read_i2c_eeprom(hw, IXGBE_SFF_IDENTIFIER, + &identifier); + + if (status != IXGBE_SUCCESS) + goto err_read_i2c_eeprom; + + if (identifier != IXGBE_SFF_IDENTIFIER_QSFP_PLUS) { + hw->phy.type = ixgbe_phy_sfp_unsupported; + status = IXGBE_ERR_SFP_NOT_SUPPORTED; + goto out; + } + + hw->phy.id = identifier; + + status = hw->phy.ops.read_i2c_eeprom(hw, IXGBE_SFF_QSFP_10GBE_COMP, + &comp_codes_10g); + + if (status != IXGBE_SUCCESS) + goto err_read_i2c_eeprom; + + status = hw->phy.ops.read_i2c_eeprom(hw, IXGBE_SFF_QSFP_1GBE_COMP, + &comp_codes_1g); + + if (status != IXGBE_SUCCESS) + goto err_read_i2c_eeprom; + + if (comp_codes_10g & IXGBE_SFF_QSFP_DA_PASSIVE_CABLE) { + hw->phy.type = ixgbe_phy_qsfp_passive_unknown; + if (hw->bus.lan_id == 0) + hw->phy.sfp_type = ixgbe_sfp_type_da_cu_core0; + else + hw->phy.sfp_type = ixgbe_sfp_type_da_cu_core1; + } else if (comp_codes_10g & (IXGBE_SFF_10GBASESR_CAPABLE | + IXGBE_SFF_10GBASELR_CAPABLE)) { + if (hw->bus.lan_id == 0) + hw->phy.sfp_type = ixgbe_sfp_type_srlr_core0; + else + hw->phy.sfp_type = ixgbe_sfp_type_srlr_core1; + } else { + if (comp_codes_10g & IXGBE_SFF_QSFP_DA_ACTIVE_CABLE) + active_cable = true; + + if (!active_cable) { + /* check for active DA cables that pre-date + * SFF-8436 v3.6 */ + hw->phy.ops.read_i2c_eeprom(hw, + IXGBE_SFF_QSFP_CONNECTOR, + &connector); + + hw->phy.ops.read_i2c_eeprom(hw, + IXGBE_SFF_QSFP_CABLE_LENGTH, + &cable_length); + + hw->phy.ops.read_i2c_eeprom(hw, + IXGBE_SFF_QSFP_DEVICE_TECH, + &device_tech); + + if ((connector == + IXGBE_SFF_QSFP_CONNECTOR_NOT_SEPARABLE) && + (cable_length > 0) && + ((device_tech >> 4) == + IXGBE_SFF_QSFP_TRANSMITER_850NM_VCSEL)) + active_cable = true; + } + + if (active_cable) { + hw->phy.type = ixgbe_phy_qsfp_active_unknown; + if (hw->bus.lan_id == 0) + hw->phy.sfp_type = + ixgbe_sfp_type_da_act_lmt_core0; + else + hw->phy.sfp_type = + ixgbe_sfp_type_da_act_lmt_core1; + } else { + /* unsupported module type */ + hw->phy.type = ixgbe_phy_sfp_unsupported; + status = IXGBE_ERR_SFP_NOT_SUPPORTED; + goto out; + } + } + + if (hw->phy.sfp_type != stored_sfp_type) + hw->phy.sfp_setup_needed = true; + + /* Determine if the QSFP+ PHY is dual speed or not. */ + hw->phy.multispeed_fiber = false; + if (((comp_codes_1g & IXGBE_SFF_1GBASESX_CAPABLE) && + (comp_codes_10g & IXGBE_SFF_10GBASESR_CAPABLE)) || + ((comp_codes_1g & IXGBE_SFF_1GBASELX_CAPABLE) && + (comp_codes_10g & IXGBE_SFF_10GBASELR_CAPABLE))) + hw->phy.multispeed_fiber = true; + + /* Determine PHY vendor for optical modules */ + if (comp_codes_10g & (IXGBE_SFF_10GBASESR_CAPABLE | + IXGBE_SFF_10GBASELR_CAPABLE)) { + status = hw->phy.ops.read_i2c_eeprom(hw, + IXGBE_SFF_QSFP_VENDOR_OUI_BYTE0, + &oui_bytes[0]); + + if (status != IXGBE_SUCCESS) + goto err_read_i2c_eeprom; + + status = hw->phy.ops.read_i2c_eeprom(hw, + IXGBE_SFF_QSFP_VENDOR_OUI_BYTE1, + &oui_bytes[1]); + + if (status != IXGBE_SUCCESS) + goto err_read_i2c_eeprom; + + status = hw->phy.ops.read_i2c_eeprom(hw, + IXGBE_SFF_QSFP_VENDOR_OUI_BYTE2, + &oui_bytes[2]); + + if (status != IXGBE_SUCCESS) + goto err_read_i2c_eeprom; + + vendor_oui = + ((oui_bytes[0] << IXGBE_SFF_VENDOR_OUI_BYTE0_SHIFT) | + (oui_bytes[1] << IXGBE_SFF_VENDOR_OUI_BYTE1_SHIFT) | + (oui_bytes[2] << IXGBE_SFF_VENDOR_OUI_BYTE2_SHIFT)); + + if (vendor_oui == IXGBE_SFF_VENDOR_OUI_INTEL) + hw->phy.type = ixgbe_phy_qsfp_intel; + else + hw->phy.type = ixgbe_phy_qsfp_unknown; + + ixgbe_get_device_caps(hw, &enforce_sfp); + if (!(enforce_sfp & IXGBE_DEVICE_CAPS_ALLOW_ANY_SFP)) { + /* Make sure we're a supported PHY type */ + if (hw->phy.type == ixgbe_phy_qsfp_intel) { + status = IXGBE_SUCCESS; + } else { + if (hw->allow_unsupported_sfp == true) { + EWARN(hw, "WARNING: Intel (R) Network Connections are quality tested using Intel (R) Ethernet Optics. Using untested modules is not supported and may cause unstable operation or damage to the module or the adapter. Intel Corporation is not responsible for any harm caused by using untested modules.\n"); + status = IXGBE_SUCCESS; + } else { + hw_dbg(hw, "QSFP module not supported\n"); + hw->phy.type = + ixgbe_phy_sfp_unsupported; + status = IXGBE_ERR_SFP_NOT_SUPPORTED; + } + } + } else { + status = IXGBE_SUCCESS; + } + } + +out: + return status; + +err_read_i2c_eeprom: + hw->phy.sfp_type = ixgbe_sfp_type_not_present; + hw->phy.id = 0; + hw->phy.type = ixgbe_phy_unknown; + + return IXGBE_ERR_SFP_NOT_PRESENT; +} + +/** + * ixgbe_get_sfp_init_sequence_offsets - Provides offset of PHY init sequence + * @hw: pointer to hardware structure + * @list_offset: offset to the SFP ID list + * @data_offset: offset to the SFP data block + * + * Checks the MAC's EEPROM to see if it supports a given SFP+ module type, if + * so it returns the offsets to the phy init sequence block. + **/ +s32 ixgbe_get_sfp_init_sequence_offsets(struct ixgbe_hw *hw, + u16 *list_offset, + u16 *data_offset) +{ + u16 sfp_id; + u16 sfp_type = hw->phy.sfp_type; + + DEBUGFUNC("ixgbe_get_sfp_init_sequence_offsets"); + + if (hw->phy.sfp_type == ixgbe_sfp_type_unknown) + return IXGBE_ERR_SFP_NOT_SUPPORTED; + + if (hw->phy.sfp_type == ixgbe_sfp_type_not_present) + return IXGBE_ERR_SFP_NOT_PRESENT; + + if ((hw->device_id == IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM) && + (hw->phy.sfp_type == ixgbe_sfp_type_da_cu)) + return IXGBE_ERR_SFP_NOT_SUPPORTED; + + /* + * Limiting active cables and 1G Phys must be initialized as + * SR modules + */ + if (sfp_type == ixgbe_sfp_type_da_act_lmt_core0 || + sfp_type == ixgbe_sfp_type_1g_lx_core0 || + sfp_type == ixgbe_sfp_type_1g_cu_core0 || + sfp_type == ixgbe_sfp_type_1g_sx_core0) + sfp_type = ixgbe_sfp_type_srlr_core0; + else if (sfp_type == ixgbe_sfp_type_da_act_lmt_core1 || + sfp_type == ixgbe_sfp_type_1g_lx_core1 || + sfp_type == ixgbe_sfp_type_1g_cu_core1 || + sfp_type == ixgbe_sfp_type_1g_sx_core1) + sfp_type = ixgbe_sfp_type_srlr_core1; + + /* Read offset to PHY init contents */ + if (hw->eeprom.ops.read(hw, IXGBE_PHY_INIT_OFFSET_NL, list_offset)) { + ERROR_REPORT2(IXGBE_ERROR_INVALID_STATE, + "eeprom read at offset %d failed", + IXGBE_PHY_INIT_OFFSET_NL); + return IXGBE_ERR_SFP_NO_INIT_SEQ_PRESENT; + } + + if ((!*list_offset) || (*list_offset == 0xFFFF)) + return IXGBE_ERR_SFP_NO_INIT_SEQ_PRESENT; + + /* Shift offset to first ID word */ + (*list_offset)++; + + /* + * Find the matching SFP ID in the EEPROM + * and program the init sequence + */ + if (hw->eeprom.ops.read(hw, *list_offset, &sfp_id)) + goto err_phy; + + while (sfp_id != IXGBE_PHY_INIT_END_NL) { + if (sfp_id == sfp_type) { + (*list_offset)++; + if (hw->eeprom.ops.read(hw, *list_offset, data_offset)) + goto err_phy; + if ((!*data_offset) || (*data_offset == 0xFFFF)) { + hw_dbg(hw, "SFP+ module not supported\n"); + return IXGBE_ERR_SFP_NOT_SUPPORTED; + } else { + break; + } + } else { + (*list_offset) += 2; + if (hw->eeprom.ops.read(hw, *list_offset, &sfp_id)) + goto err_phy; + } + } + + if (sfp_id == IXGBE_PHY_INIT_END_NL) { + hw_dbg(hw, "No matching SFP+ module found\n"); + return IXGBE_ERR_SFP_NOT_SUPPORTED; + } + + return IXGBE_SUCCESS; + +err_phy: + ERROR_REPORT2(IXGBE_ERROR_INVALID_STATE, + "eeprom read at offset %d failed", *list_offset); + return IXGBE_ERR_PHY; +} + +/** + * ixgbe_read_i2c_eeprom_generic - Reads 8 bit EEPROM word over I2C interface + * @hw: pointer to hardware structure + * @byte_offset: EEPROM byte offset to read + * @eeprom_data: value read + * + * Performs byte read operation to SFP module's EEPROM over I2C interface. + **/ +s32 ixgbe_read_i2c_eeprom_generic(struct ixgbe_hw *hw, u8 byte_offset, + u8 *eeprom_data) +{ + DEBUGFUNC("ixgbe_read_i2c_eeprom_generic"); + + return hw->phy.ops.read_i2c_byte(hw, byte_offset, + IXGBE_I2C_EEPROM_DEV_ADDR, + eeprom_data); +} + +/** + * ixgbe_read_i2c_sff8472_generic - Reads 8 bit word over I2C interface + * @hw: pointer to hardware structure + * @byte_offset: byte offset at address 0xA2 + * @sff8472_data: value read + * + * Performs byte read operation to SFP module's SFF-8472 data over I2C + **/ +STATIC s32 ixgbe_read_i2c_sff8472_generic(struct ixgbe_hw *hw, u8 byte_offset, + u8 *sff8472_data) +{ + return hw->phy.ops.read_i2c_byte(hw, byte_offset, + IXGBE_I2C_EEPROM_DEV_ADDR2, + sff8472_data); +} + +/** + * ixgbe_write_i2c_eeprom_generic - Writes 8 bit EEPROM word over I2C interface + * @hw: pointer to hardware structure + * @byte_offset: EEPROM byte offset to write + * @eeprom_data: value to write + * + * Performs byte write operation to SFP module's EEPROM over I2C interface. + **/ +s32 ixgbe_write_i2c_eeprom_generic(struct ixgbe_hw *hw, u8 byte_offset, + u8 eeprom_data) +{ + DEBUGFUNC("ixgbe_write_i2c_eeprom_generic"); + + return hw->phy.ops.write_i2c_byte(hw, byte_offset, + IXGBE_I2C_EEPROM_DEV_ADDR, + eeprom_data); +} + +/** + * ixgbe_is_sfp_probe - Returns true if SFP is being detected + * @hw: pointer to hardware structure + * @offset: eeprom offset to be read + * @addr: I2C address to be read + */ +STATIC bool ixgbe_is_sfp_probe(struct ixgbe_hw *hw, u8 offset, u8 addr) +{ + if (addr == IXGBE_I2C_EEPROM_DEV_ADDR && + offset == IXGBE_SFF_IDENTIFIER && + hw->phy.sfp_type == ixgbe_sfp_type_not_present) + return true; + return false; +} + +/** + * ixgbe_read_i2c_byte_generic_int - Reads 8 bit word over I2C + * @hw: pointer to hardware structure + * @byte_offset: byte offset to read + * @dev_addr: address to read from + * @data: value read + * @lock: true if to take and release semaphore + * + * Performs byte read operation to SFP module's EEPROM over I2C interface at + * a specified device address. + **/ +STATIC s32 ixgbe_read_i2c_byte_generic_int(struct ixgbe_hw *hw, u8 byte_offset, + u8 dev_addr, u8 *data, bool lock) +{ + s32 status; + u32 max_retry = 10; + u32 retry = 0; + u32 swfw_mask = hw->phy.phy_semaphore_mask; + bool nack = 1; + *data = 0; + + DEBUGFUNC("ixgbe_read_i2c_byte_generic"); + + if (hw->mac.type >= ixgbe_mac_X550) + max_retry = 3; + if (ixgbe_is_sfp_probe(hw, byte_offset, dev_addr)) + max_retry = IXGBE_SFP_DETECT_RETRIES; + + do { + if (lock && hw->mac.ops.acquire_swfw_sync(hw, swfw_mask)) + return IXGBE_ERR_SWFW_SYNC; + + ixgbe_i2c_start(hw); + + /* Device Address and write indication */ + status = ixgbe_clock_out_i2c_byte(hw, dev_addr); + if (status != IXGBE_SUCCESS) + goto fail; + + status = ixgbe_get_i2c_ack(hw); + if (status != IXGBE_SUCCESS) + goto fail; + + status = ixgbe_clock_out_i2c_byte(hw, byte_offset); + if (status != IXGBE_SUCCESS) + goto fail; + + status = ixgbe_get_i2c_ack(hw); + if (status != IXGBE_SUCCESS) + goto fail; + + ixgbe_i2c_start(hw); + + /* Device Address and read indication */ + status = ixgbe_clock_out_i2c_byte(hw, (dev_addr | 0x1)); + if (status != IXGBE_SUCCESS) + goto fail; + + status = ixgbe_get_i2c_ack(hw); + if (status != IXGBE_SUCCESS) + goto fail; + + ixgbe_clock_in_i2c_byte(hw, data); + + status = ixgbe_clock_out_i2c_bit(hw, nack); + if (status != IXGBE_SUCCESS) + goto fail; + + ixgbe_i2c_stop(hw); + if (lock) + hw->mac.ops.release_swfw_sync(hw, swfw_mask); + return IXGBE_SUCCESS; + +fail: + ixgbe_i2c_bus_clear(hw); + if (lock) { + hw->mac.ops.release_swfw_sync(hw, swfw_mask); + msec_delay(100); + } + if (retry < max_retry) + hw_dbg(hw, "I2C byte read error - Retrying.\n"); + else + hw_dbg(hw, "I2C byte read error.\n"); + retry++; + + } while (retry <= max_retry); + + return status; +} + +/** + * ixgbe_read_i2c_byte_generic - Reads 8 bit word over I2C + * @hw: pointer to hardware structure + * @byte_offset: byte offset to read + * @dev_addr: address to read from + * @data: value read + * + * Performs byte read operation to SFP module's EEPROM over I2C interface at + * a specified device address. + **/ +s32 ixgbe_read_i2c_byte_generic(struct ixgbe_hw *hw, u8 byte_offset, + u8 dev_addr, u8 *data) +{ + return ixgbe_read_i2c_byte_generic_int(hw, byte_offset, dev_addr, + data, true); +} + +/** + * ixgbe_read_i2c_byte_generic_unlocked - Reads 8 bit word over I2C + * @hw: pointer to hardware structure + * @byte_offset: byte offset to read + * @dev_addr: address to read from + * @data: value read + * + * Performs byte read operation to SFP module's EEPROM over I2C interface at + * a specified device address. + **/ +s32 ixgbe_read_i2c_byte_generic_unlocked(struct ixgbe_hw *hw, u8 byte_offset, + u8 dev_addr, u8 *data) +{ + return ixgbe_read_i2c_byte_generic_int(hw, byte_offset, dev_addr, + data, false); +} + +/** + * ixgbe_write_i2c_byte_generic_int - Writes 8 bit word over I2C + * @hw: pointer to hardware structure + * @byte_offset: byte offset to write + * @dev_addr: address to write to + * @data: value to write + * @lock: true if to take and release semaphore + * + * Performs byte write operation to SFP module's EEPROM over I2C interface at + * a specified device address. + **/ +STATIC s32 ixgbe_write_i2c_byte_generic_int(struct ixgbe_hw *hw, u8 byte_offset, + u8 dev_addr, u8 data, bool lock) +{ + s32 status; + u32 max_retry = 1; + u32 retry = 0; + u32 swfw_mask = hw->phy.phy_semaphore_mask; + + DEBUGFUNC("ixgbe_write_i2c_byte_generic"); + + if (lock && hw->mac.ops.acquire_swfw_sync(hw, swfw_mask) != + IXGBE_SUCCESS) + return IXGBE_ERR_SWFW_SYNC; + + do { + ixgbe_i2c_start(hw); + + status = ixgbe_clock_out_i2c_byte(hw, dev_addr); + if (status != IXGBE_SUCCESS) + goto fail; + + status = ixgbe_get_i2c_ack(hw); + if (status != IXGBE_SUCCESS) + goto fail; + + status = ixgbe_clock_out_i2c_byte(hw, byte_offset); + if (status != IXGBE_SUCCESS) + goto fail; + + status = ixgbe_get_i2c_ack(hw); + if (status != IXGBE_SUCCESS) + goto fail; + + status = ixgbe_clock_out_i2c_byte(hw, data); + if (status != IXGBE_SUCCESS) + goto fail; + + status = ixgbe_get_i2c_ack(hw); + if (status != IXGBE_SUCCESS) + goto fail; + + ixgbe_i2c_stop(hw); + if (lock) + hw->mac.ops.release_swfw_sync(hw, swfw_mask); + return IXGBE_SUCCESS; + +fail: + ixgbe_i2c_bus_clear(hw); + if (retry < max_retry) + hw_dbg(hw, "I2C byte write error - Retrying.\n"); + else + hw_dbg(hw, "I2C byte write error.\n"); + retry++; + } while (retry <= max_retry); + + if (lock) + hw->mac.ops.release_swfw_sync(hw, swfw_mask); + + return status; +} + +/** + * ixgbe_write_i2c_byte_generic - Writes 8 bit word over I2C + * @hw: pointer to hardware structure + * @byte_offset: byte offset to write + * @dev_addr: address to write to + * @data: value to write + * + * Performs byte write operation to SFP module's EEPROM over I2C interface at + * a specified device address. + **/ +s32 ixgbe_write_i2c_byte_generic(struct ixgbe_hw *hw, u8 byte_offset, + u8 dev_addr, u8 data) +{ + return ixgbe_write_i2c_byte_generic_int(hw, byte_offset, dev_addr, + data, true); +} + +/** + * ixgbe_write_i2c_byte_generic_unlocked - Writes 8 bit word over I2C + * @hw: pointer to hardware structure + * @byte_offset: byte offset to write + * @dev_addr: address to write to + * @data: value to write + * + * Performs byte write operation to SFP module's EEPROM over I2C interface at + * a specified device address. + **/ +s32 ixgbe_write_i2c_byte_generic_unlocked(struct ixgbe_hw *hw, u8 byte_offset, + u8 dev_addr, u8 data) +{ + return ixgbe_write_i2c_byte_generic_int(hw, byte_offset, dev_addr, + data, false); +} + +/** + * ixgbe_i2c_start - Sets I2C start condition + * @hw: pointer to hardware structure + * + * Sets I2C start condition (High -> Low on SDA while SCL is High) + * Set bit-bang mode on X550 hardware. + **/ +STATIC void ixgbe_i2c_start(struct ixgbe_hw *hw) +{ + u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw)); + + DEBUGFUNC("ixgbe_i2c_start"); + + i2cctl |= IXGBE_I2C_BB_EN_BY_MAC(hw); + + /* Start condition must begin with data and clock high */ + ixgbe_set_i2c_data(hw, &i2cctl, 1); + ixgbe_raise_i2c_clk(hw, &i2cctl); + + /* Setup time for start condition (4.7us) */ + usec_delay(IXGBE_I2C_T_SU_STA); + + ixgbe_set_i2c_data(hw, &i2cctl, 0); + + /* Hold time for start condition (4us) */ + usec_delay(IXGBE_I2C_T_HD_STA); + + ixgbe_lower_i2c_clk(hw, &i2cctl); + + /* Minimum low period of clock is 4.7 us */ + usec_delay(IXGBE_I2C_T_LOW); + +} + +/** + * ixgbe_i2c_stop - Sets I2C stop condition + * @hw: pointer to hardware structure + * + * Sets I2C stop condition (Low -> High on SDA while SCL is High) + * Disables bit-bang mode and negates data output enable on X550 + * hardware. + **/ +STATIC void ixgbe_i2c_stop(struct ixgbe_hw *hw) +{ + u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw)); + u32 data_oe_bit = IXGBE_I2C_DATA_OE_N_EN_BY_MAC(hw); + u32 clk_oe_bit = IXGBE_I2C_CLK_OE_N_EN_BY_MAC(hw); + u32 bb_en_bit = IXGBE_I2C_BB_EN_BY_MAC(hw); + + DEBUGFUNC("ixgbe_i2c_stop"); + + /* Stop condition must begin with data low and clock high */ + ixgbe_set_i2c_data(hw, &i2cctl, 0); + ixgbe_raise_i2c_clk(hw, &i2cctl); + + /* Setup time for stop condition (4us) */ + usec_delay(IXGBE_I2C_T_SU_STO); + + ixgbe_set_i2c_data(hw, &i2cctl, 1); + + /* bus free time between stop and start (4.7us)*/ + usec_delay(IXGBE_I2C_T_BUF); + + if (bb_en_bit || data_oe_bit || clk_oe_bit) { + i2cctl &= ~bb_en_bit; + i2cctl |= data_oe_bit | clk_oe_bit; + IXGBE_WRITE_REG(hw, IXGBE_I2CCTL_BY_MAC(hw), i2cctl); + IXGBE_WRITE_FLUSH(hw); + } +} + +/** + * ixgbe_clock_in_i2c_byte - Clocks in one byte via I2C + * @hw: pointer to hardware structure + * @data: data byte to clock in + * + * Clocks in one byte data via I2C data/clock + **/ +STATIC void ixgbe_clock_in_i2c_byte(struct ixgbe_hw *hw, u8 *data) +{ + s32 i; + bool bit = 0; + + DEBUGFUNC("ixgbe_clock_in_i2c_byte"); + + *data = 0; + for (i = 7; i >= 0; i--) { + ixgbe_clock_in_i2c_bit(hw, &bit); + *data |= bit << i; + } +} + +/** + * ixgbe_clock_out_i2c_byte - Clocks out one byte via I2C + * @hw: pointer to hardware structure + * @data: data byte clocked out + * + * Clocks out one byte data via I2C data/clock + **/ +STATIC s32 ixgbe_clock_out_i2c_byte(struct ixgbe_hw *hw, u8 data) +{ + s32 status = IXGBE_SUCCESS; + s32 i; + u32 i2cctl; + bool bit; + + DEBUGFUNC("ixgbe_clock_out_i2c_byte"); + + for (i = 7; i >= 0; i--) { + bit = (data >> i) & 0x1; + status = ixgbe_clock_out_i2c_bit(hw, bit); + + if (status != IXGBE_SUCCESS) + break; + } + + /* Release SDA line (set high) */ + i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw)); + i2cctl |= IXGBE_I2C_DATA_OUT_BY_MAC(hw); + i2cctl |= IXGBE_I2C_DATA_OE_N_EN_BY_MAC(hw); + IXGBE_WRITE_REG(hw, IXGBE_I2CCTL_BY_MAC(hw), i2cctl); + IXGBE_WRITE_FLUSH(hw); + + return status; +} + +/** + * ixgbe_get_i2c_ack - Polls for I2C ACK + * @hw: pointer to hardware structure + * + * Clocks in/out one bit via I2C data/clock + **/ +STATIC s32 ixgbe_get_i2c_ack(struct ixgbe_hw *hw) +{ + u32 data_oe_bit = IXGBE_I2C_DATA_OE_N_EN_BY_MAC(hw); + s32 status = IXGBE_SUCCESS; + u32 i = 0; + u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw)); + u32 timeout = 10; + bool ack = 1; + + DEBUGFUNC("ixgbe_get_i2c_ack"); + + if (data_oe_bit) { + i2cctl |= IXGBE_I2C_DATA_OUT_BY_MAC(hw); + i2cctl |= data_oe_bit; + IXGBE_WRITE_REG(hw, IXGBE_I2CCTL_BY_MAC(hw), i2cctl); + IXGBE_WRITE_FLUSH(hw); + } + ixgbe_raise_i2c_clk(hw, &i2cctl); + + /* Minimum high period of clock is 4us */ + usec_delay(IXGBE_I2C_T_HIGH); + + /* Poll for ACK. Note that ACK in I2C spec is + * transition from 1 to 0 */ + for (i = 0; i < timeout; i++) { + i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw)); + ack = ixgbe_get_i2c_data(hw, &i2cctl); + + usec_delay(1); + if (!ack) + break; + } + + if (ack) { + hw_dbg(hw, "I2C ack was not received.\n"); + status = IXGBE_ERR_I2C; + } + + ixgbe_lower_i2c_clk(hw, &i2cctl); + + /* Minimum low period of clock is 4.7 us */ + usec_delay(IXGBE_I2C_T_LOW); + + return status; +} + +/** + * ixgbe_clock_in_i2c_bit - Clocks in one bit via I2C data/clock + * @hw: pointer to hardware structure + * @data: read data value + * + * Clocks in one bit via I2C data/clock + **/ +STATIC void ixgbe_clock_in_i2c_bit(struct ixgbe_hw *hw, bool *data) +{ + u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw)); + u32 data_oe_bit = IXGBE_I2C_DATA_OE_N_EN_BY_MAC(hw); + + DEBUGFUNC("ixgbe_clock_in_i2c_bit"); + + if (data_oe_bit) { + i2cctl |= IXGBE_I2C_DATA_OUT_BY_MAC(hw); + i2cctl |= data_oe_bit; + IXGBE_WRITE_REG(hw, IXGBE_I2CCTL_BY_MAC(hw), i2cctl); + IXGBE_WRITE_FLUSH(hw); + } + ixgbe_raise_i2c_clk(hw, &i2cctl); + + /* Minimum high period of clock is 4us */ + usec_delay(IXGBE_I2C_T_HIGH); + + i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw)); + *data = ixgbe_get_i2c_data(hw, &i2cctl); + + ixgbe_lower_i2c_clk(hw, &i2cctl); + + /* Minimum low period of clock is 4.7 us */ + usec_delay(IXGBE_I2C_T_LOW); +} + +/** + * ixgbe_clock_out_i2c_bit - Clocks in/out one bit via I2C data/clock + * @hw: pointer to hardware structure + * @data: data value to write + * + * Clocks out one bit via I2C data/clock + **/ +STATIC s32 ixgbe_clock_out_i2c_bit(struct ixgbe_hw *hw, bool data) +{ + s32 status; + u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw)); + + DEBUGFUNC("ixgbe_clock_out_i2c_bit"); + + status = ixgbe_set_i2c_data(hw, &i2cctl, data); + if (status == IXGBE_SUCCESS) { + ixgbe_raise_i2c_clk(hw, &i2cctl); + + /* Minimum high period of clock is 4us */ + usec_delay(IXGBE_I2C_T_HIGH); + + ixgbe_lower_i2c_clk(hw, &i2cctl); + + /* Minimum low period of clock is 4.7 us. + * This also takes care of the data hold time. + */ + usec_delay(IXGBE_I2C_T_LOW); + } else { + status = IXGBE_ERR_I2C; + ERROR_REPORT2(IXGBE_ERROR_INVALID_STATE, + "I2C data was not set to %X\n", data); + } + + return status; +} + +/** + * ixgbe_raise_i2c_clk - Raises the I2C SCL clock + * @hw: pointer to hardware structure + * @i2cctl: Current value of I2CCTL register + * + * Raises the I2C clock line '0'->'1' + * Negates the I2C clock output enable on X550 hardware. + **/ +STATIC void ixgbe_raise_i2c_clk(struct ixgbe_hw *hw, u32 *i2cctl) +{ + u32 clk_oe_bit = IXGBE_I2C_CLK_OE_N_EN_BY_MAC(hw); + u32 i = 0; + u32 timeout = IXGBE_I2C_CLOCK_STRETCHING_TIMEOUT; + u32 i2cctl_r = 0; + + DEBUGFUNC("ixgbe_raise_i2c_clk"); + + if (clk_oe_bit) { + *i2cctl |= clk_oe_bit; + IXGBE_WRITE_REG(hw, IXGBE_I2CCTL_BY_MAC(hw), *i2cctl); + } + + for (i = 0; i < timeout; i++) { + *i2cctl |= IXGBE_I2C_CLK_OUT_BY_MAC(hw); + + IXGBE_WRITE_REG(hw, IXGBE_I2CCTL_BY_MAC(hw), *i2cctl); + IXGBE_WRITE_FLUSH(hw); + /* SCL rise time (1000ns) */ + usec_delay(IXGBE_I2C_T_RISE); + + i2cctl_r = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw)); + if (i2cctl_r & IXGBE_I2C_CLK_IN_BY_MAC(hw)) + break; + } +} + +/** + * ixgbe_lower_i2c_clk - Lowers the I2C SCL clock + * @hw: pointer to hardware structure + * @i2cctl: Current value of I2CCTL register + * + * Lowers the I2C clock line '1'->'0' + * Asserts the I2C clock output enable on X550 hardware. + **/ +STATIC void ixgbe_lower_i2c_clk(struct ixgbe_hw *hw, u32 *i2cctl) +{ + DEBUGFUNC("ixgbe_lower_i2c_clk"); + + *i2cctl &= ~(IXGBE_I2C_CLK_OUT_BY_MAC(hw)); + *i2cctl &= ~IXGBE_I2C_CLK_OE_N_EN_BY_MAC(hw); + + IXGBE_WRITE_REG(hw, IXGBE_I2CCTL_BY_MAC(hw), *i2cctl); + IXGBE_WRITE_FLUSH(hw); + + /* SCL fall time (300ns) */ + usec_delay(IXGBE_I2C_T_FALL); +} + +/** + * ixgbe_set_i2c_data - Sets the I2C data bit + * @hw: pointer to hardware structure + * @i2cctl: Current value of I2CCTL register + * @data: I2C data value (0 or 1) to set + * + * Sets the I2C data bit + * Asserts the I2C data output enable on X550 hardware. + **/ +STATIC s32 ixgbe_set_i2c_data(struct ixgbe_hw *hw, u32 *i2cctl, bool data) +{ + u32 data_oe_bit = IXGBE_I2C_DATA_OE_N_EN_BY_MAC(hw); + s32 status = IXGBE_SUCCESS; + + DEBUGFUNC("ixgbe_set_i2c_data"); + + if (data) + *i2cctl |= IXGBE_I2C_DATA_OUT_BY_MAC(hw); + else + *i2cctl &= ~(IXGBE_I2C_DATA_OUT_BY_MAC(hw)); + *i2cctl &= ~data_oe_bit; + + IXGBE_WRITE_REG(hw, IXGBE_I2CCTL_BY_MAC(hw), *i2cctl); + IXGBE_WRITE_FLUSH(hw); + + /* Data rise/fall (1000ns/300ns) and set-up time (250ns) */ + usec_delay(IXGBE_I2C_T_RISE + IXGBE_I2C_T_FALL + IXGBE_I2C_T_SU_DATA); + + if (!data) /* Can't verify data in this case */ + return IXGBE_SUCCESS; + if (data_oe_bit) { + *i2cctl |= data_oe_bit; + IXGBE_WRITE_REG(hw, IXGBE_I2CCTL_BY_MAC(hw), *i2cctl); + IXGBE_WRITE_FLUSH(hw); + } + + /* Verify data was set correctly */ + *i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw)); + if (data != ixgbe_get_i2c_data(hw, i2cctl)) { + status = IXGBE_ERR_I2C; + ERROR_REPORT2(IXGBE_ERROR_INVALID_STATE, + "Error - I2C data was not set to %X.\n", + data); + } + + return status; +} + +/** + * ixgbe_get_i2c_data - Reads the I2C SDA data bit + * @hw: pointer to hardware structure + * @i2cctl: Current value of I2CCTL register + * + * Returns the I2C data bit value + * Negates the I2C data output enable on X550 hardware. + **/ +STATIC bool ixgbe_get_i2c_data(struct ixgbe_hw *hw, u32 *i2cctl) +{ + u32 data_oe_bit = IXGBE_I2C_DATA_OE_N_EN_BY_MAC(hw); + bool data; + + DEBUGFUNC("ixgbe_get_i2c_data"); + + if (data_oe_bit) { + *i2cctl |= data_oe_bit; + IXGBE_WRITE_REG(hw, IXGBE_I2CCTL_BY_MAC(hw), *i2cctl); + IXGBE_WRITE_FLUSH(hw); + usec_delay(IXGBE_I2C_T_FALL); + } + + if (*i2cctl & IXGBE_I2C_DATA_IN_BY_MAC(hw)) + data = 1; + else + data = 0; + + return data; +} + +/** + * ixgbe_i2c_bus_clear - Clears the I2C bus + * @hw: pointer to hardware structure + * + * Clears the I2C bus by sending nine clock pulses. + * Used when data line is stuck low. + **/ +void ixgbe_i2c_bus_clear(struct ixgbe_hw *hw) +{ + u32 i2cctl; + u32 i; + + DEBUGFUNC("ixgbe_i2c_bus_clear"); + + ixgbe_i2c_start(hw); + i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw)); + + ixgbe_set_i2c_data(hw, &i2cctl, 1); + + for (i = 0; i < 9; i++) { + ixgbe_raise_i2c_clk(hw, &i2cctl); + + /* Min high period of clock is 4us */ + usec_delay(IXGBE_I2C_T_HIGH); + + ixgbe_lower_i2c_clk(hw, &i2cctl); + + /* Min low period of clock is 4.7us*/ + usec_delay(IXGBE_I2C_T_LOW); + } + + ixgbe_i2c_start(hw); + + /* Put the i2c bus back to default state */ + ixgbe_i2c_stop(hw); +} + +/** + * ixgbe_tn_check_overtemp - Checks if an overtemp occurred. + * @hw: pointer to hardware structure + * + * Checks if the LASI temp alarm status was triggered due to overtemp + **/ +s32 ixgbe_tn_check_overtemp(struct ixgbe_hw *hw) +{ + s32 status = IXGBE_SUCCESS; + u16 phy_data = 0; + + DEBUGFUNC("ixgbe_tn_check_overtemp"); + + if (hw->device_id != IXGBE_DEV_ID_82599_T3_LOM) + goto out; + + /* Check that the LASI temp alarm status was triggered */ + hw->phy.ops.read_reg(hw, IXGBE_TN_LASI_STATUS_REG, + IXGBE_MDIO_PMA_PMD_DEV_TYPE, &phy_data); + + if (!(phy_data & IXGBE_TN_LASI_STATUS_TEMP_ALARM)) + goto out; + + status = IXGBE_ERR_OVERTEMP; + ERROR_REPORT1(IXGBE_ERROR_CAUTION, "Device over temperature"); +out: + return status; +} + +/** + * ixgbe_set_copper_phy_power - Control power for copper phy + * @hw: pointer to hardware structure + * @on: true for on, false for off + */ +s32 ixgbe_set_copper_phy_power(struct ixgbe_hw *hw, bool on) +{ + s32 status; + u16 reg; + + if (!on && ixgbe_mng_present(hw)) + return 0; + + status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_VENDOR_SPECIFIC_1_CONTROL, + IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE, + ®); + if (status) + return status; + + if (on) { + reg &= ~IXGBE_MDIO_PHY_SET_LOW_POWER_MODE; + } else { + if (ixgbe_check_reset_blocked(hw)) + return 0; + reg |= IXGBE_MDIO_PHY_SET_LOW_POWER_MODE; + } + + status = hw->phy.ops.write_reg(hw, IXGBE_MDIO_VENDOR_SPECIFIC_1_CONTROL, + IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE, + reg); + return status; +} diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_phy.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_phy.h new file mode 100644 index 00000000000..d4d5f633422 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_phy.h @@ -0,0 +1,189 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 1999 - 2026 Intel Corporation */ + +#ifndef _IXGBE_PHY_H_ +#define _IXGBE_PHY_H_ + +#include "ixgbe_type.h" +#define IXGBE_I2C_EEPROM_DEV_ADDR 0xA0 +#define IXGBE_I2C_EEPROM_DEV_ADDR2 0xA2 +#define IXGBE_I2C_EEPROM_BANK_LEN 0xFF + +/* EEPROM byte offsets */ +#define IXGBE_SFF_IDENTIFIER 0x0 +#define IXGBE_SFF_IDENTIFIER_SFP 0x3 +#define IXGBE_SFF_VENDOR_OUI_BYTE0 0x25 +#define IXGBE_SFF_VENDOR_OUI_BYTE1 0x26 +#define IXGBE_SFF_VENDOR_OUI_BYTE2 0x27 +#define IXGBE_SFF_1GBE_COMP_CODES 0x6 +#define IXGBE_SFF_10GBE_COMP_CODES 0x3 +#define IXGBE_SFF_CABLE_TECHNOLOGY 0x8 +#define IXGBE_SFF_CABLE_SPEC_COMP 0x3C +#define IXGBE_SFF_SFF_8472_SWAP 0x5C +#define IXGBE_SFF_SFF_8472_COMP 0x5E +#define IXGBE_SFF_SFF_8472_OSCB 0x6E +#define IXGBE_SFF_SFF_8472_ESCB 0x76 +#define IXGBE_SFF_IDENTIFIER_QSFP_PLUS 0xD +#define IXGBE_SFF_QSFP_VENDOR_OUI_BYTE0 0xA5 +#define IXGBE_SFF_QSFP_VENDOR_OUI_BYTE1 0xA6 +#define IXGBE_SFF_QSFP_VENDOR_OUI_BYTE2 0xA7 +#define IXGBE_SFF_QSFP_CONNECTOR 0x82 +#define IXGBE_SFF_QSFP_10GBE_COMP 0x83 +#define IXGBE_SFF_QSFP_1GBE_COMP 0x86 +#define IXGBE_SFF_QSFP_CABLE_LENGTH 0x92 +#define IXGBE_SFF_QSFP_DEVICE_TECH 0x93 + +/* Bitmasks */ +#define IXGBE_SFF_DA_PASSIVE_CABLE 0x4 +#define IXGBE_SFF_DA_ACTIVE_CABLE 0x8 +#define IXGBE_SFF_DA_SPEC_ACTIVE_LIMITING 0x4 +#define IXGBE_SFF_1GBASESX_CAPABLE 0x1 +#define IXGBE_SFF_1GBASELX_CAPABLE 0x2 +#define IXGBE_SFF_1GBASET_CAPABLE 0x8 +#define IXGBE_SFF_10GBASESR_CAPABLE 0x10 +#define IXGBE_SFF_10GBASELR_CAPABLE 0x20 +#define IXGBE_SFF_SOFT_RS_SELECT_MASK 0x8 +#define IXGBE_SFF_SOFT_RS_SELECT_10G 0x8 +#define IXGBE_SFF_SOFT_RS_SELECT_1G 0x0 +#define IXGBE_SFF_ADDRESSING_MODE 0x4 +#define IXGBE_SFF_QSFP_DA_ACTIVE_CABLE 0x1 +#define IXGBE_SFF_QSFP_DA_PASSIVE_CABLE 0x8 +#define IXGBE_SFF_QSFP_CONNECTOR_NOT_SEPARABLE 0x23 +#define IXGBE_SFF_QSFP_TRANSMITER_850NM_VCSEL 0x0 +#define IXGBE_I2C_EEPROM_READ_MASK 0x100 +#define IXGBE_I2C_EEPROM_STATUS_MASK 0x3 +#define IXGBE_I2C_EEPROM_STATUS_NO_OPERATION 0x0 +#define IXGBE_I2C_EEPROM_STATUS_PASS 0x1 +#define IXGBE_I2C_EEPROM_STATUS_FAIL 0x2 +#define IXGBE_I2C_EEPROM_STATUS_IN_PROGRESS 0x3 + +#define IXGBE_CS4227 0xBE /* CS4227 address */ +#define IXGBE_CS4227_GLOBAL_ID_LSB 0 +#define IXGBE_CS4227_GLOBAL_ID_MSB 1 +#define IXGBE_CS4227_SCRATCH 2 +#define IXGBE_CS4227_GLOBAL_ID_VALUE 0x03E5 +#define IXGBE_CS4227_EFUSE_PDF_SKU 0x19F +#define IXGBE_CS4223_SKU_ID 0x0010 /* Quad port */ +#define IXGBE_CS4227_SKU_ID 0x0014 /* Dual port */ +#define IXGBE_CS4227_RESET_PENDING 0x1357 +#define IXGBE_CS4227_RESET_COMPLETE 0x5AA5 +#define IXGBE_CS4227_RETRIES 15 +#define IXGBE_CS4227_EFUSE_STATUS 0x0181 +#define IXGBE_CS4227_LINE_SPARE22_MSB 0x12AD /* Reg to program speed */ +#define IXGBE_CS4227_LINE_SPARE24_LSB 0x12B0 /* Reg to program EDC */ +#define IXGBE_CS4227_HOST_SPARE22_MSB 0x1AAD /* Reg to program speed */ +#define IXGBE_CS4227_HOST_SPARE24_LSB 0x1AB0 /* Reg to program EDC */ +#define IXGBE_CS4227_EEPROM_STATUS 0x5001 +#define IXGBE_CS4227_EEPROM_LOAD_OK 0x0001 +#define IXGBE_CS4227_SPEED_1G 0x8000 +#define IXGBE_CS4227_SPEED_10G 0 +#define IXGBE_CS4227_EDC_MODE_CX1 0x0002 +#define IXGBE_CS4227_EDC_MODE_SR 0x0004 +#define IXGBE_CS4227_EDC_MODE_DIAG 0x0008 +#define IXGBE_CS4227_RESET_HOLD 500 /* microseconds */ +#define IXGBE_CS4227_RESET_DELAY 450 /* milliseconds */ +#define IXGBE_CS4227_CHECK_DELAY 30 /* milliseconds */ +#define IXGBE_PE 0xE0 /* Port expander address */ +#define IXGBE_PE_OUTPUT 1 /* Output register offset */ +#define IXGBE_PE_CONFIG 3 /* Config register offset */ +#define IXGBE_PE_BIT1 (1 << 1) + +/* Flow control defines */ +#define IXGBE_TAF_SYM_PAUSE 0x400 +#define IXGBE_TAF_ASM_PAUSE 0x800 + +/* Bit-shift macros */ +#define IXGBE_SFF_VENDOR_OUI_BYTE0_SHIFT 24 +#define IXGBE_SFF_VENDOR_OUI_BYTE1_SHIFT 16 +#define IXGBE_SFF_VENDOR_OUI_BYTE2_SHIFT 8 + +/* Vendor OUIs: format of OUI is 0x[byte0][byte1][byte2][00] */ +#define IXGBE_SFF_VENDOR_OUI_TYCO 0x00407600 +#define IXGBE_SFF_VENDOR_OUI_FTL 0x00906500 +#define IXGBE_SFF_VENDOR_OUI_AVAGO 0x00176A00 +#define IXGBE_SFF_VENDOR_OUI_INTEL 0x001B2100 + +/* I2C SDA and SCL timing parameters for standard mode */ +#define IXGBE_I2C_T_HD_STA 4 +#define IXGBE_I2C_T_LOW 5 +#define IXGBE_I2C_T_HIGH 4 +#define IXGBE_I2C_T_SU_STA 5 +#define IXGBE_I2C_T_HD_DATA 5 +#define IXGBE_I2C_T_SU_DATA 1 +#define IXGBE_I2C_T_RISE 1 +#define IXGBE_I2C_T_FALL 1 +#define IXGBE_I2C_T_SU_STO 4 +#define IXGBE_I2C_T_BUF 5 + +#ifndef IXGBE_SFP_DETECT_RETRIES +#define IXGBE_SFP_DETECT_RETRIES 10 + +#endif /* IXGBE_SFP_DETECT_RETRIES */ +#define IXGBE_TN_LASI_STATUS_REG 0x9005 +#define IXGBE_TN_LASI_STATUS_TEMP_ALARM 0x0008 + +/* SFP+ SFF-8472 Compliance */ +#define IXGBE_SFF_SFF_8472_UNSUP 0x00 + +s32 ixgbe_init_phy_ops_generic(struct ixgbe_hw *hw); +bool ixgbe_validate_phy_addr(struct ixgbe_hw *hw, u32 phy_addr); +enum ixgbe_phy_type ixgbe_get_phy_type_from_id(u32 phy_id); +s32 ixgbe_get_phy_id(struct ixgbe_hw *hw); +s32 ixgbe_identify_phy_generic(struct ixgbe_hw *hw); +s32 ixgbe_reset_phy_generic(struct ixgbe_hw *hw); +void ixgbe_restart_auto_neg(struct ixgbe_hw *hw); +s32 ixgbe_read_phy_reg_mdi(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, + u16 *phy_data); +s32 ixgbe_write_phy_reg_mdi(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, + u16 phy_data); +s32 ixgbe_read_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr, + u32 device_type, u16 *phy_data); +s32 ixgbe_write_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr, + u32 device_type, u16 phy_data); +s32 ixgbe_setup_phy_link_generic(struct ixgbe_hw *hw); +s32 ixgbe_setup_phy_link_speed_generic(struct ixgbe_hw *hw, + ixgbe_link_speed speed, + bool autoneg_wait_to_complete); +s32 ixgbe_get_copper_link_capabilities_generic(struct ixgbe_hw *hw, + ixgbe_link_speed *speed, + bool *autoneg); +s32 ixgbe_check_reset_blocked(struct ixgbe_hw *hw); + +/* PHY specific */ +s32 ixgbe_check_phy_link_tnx(struct ixgbe_hw *hw, + ixgbe_link_speed *speed, + bool *link_up); +s32 ixgbe_setup_phy_link_tnx(struct ixgbe_hw *hw); +s32 ixgbe_get_phy_firmware_version_tnx(struct ixgbe_hw *hw, + u16 *firmware_version); +s32 ixgbe_get_phy_firmware_version_generic(struct ixgbe_hw *hw, + u16 *firmware_version); + +s32 ixgbe_reset_phy_nl(struct ixgbe_hw *hw); +s32 ixgbe_set_copper_phy_power(struct ixgbe_hw *hw, bool on); +s32 ixgbe_identify_module_generic(struct ixgbe_hw *hw); +s32 ixgbe_identify_sfp_module_generic(struct ixgbe_hw *hw); +u64 ixgbe_get_supported_phy_sfp_layer_generic(struct ixgbe_hw *hw); +s32 ixgbe_identify_qsfp_module_generic(struct ixgbe_hw *hw); +s32 ixgbe_get_sfp_init_sequence_offsets(struct ixgbe_hw *hw, + u16 *list_offset, + u16 *data_offset); +s32 ixgbe_tn_check_overtemp(struct ixgbe_hw *hw); +s32 ixgbe_read_i2c_byte_generic(struct ixgbe_hw *hw, u8 byte_offset, + u8 dev_addr, u8 *data); +s32 ixgbe_read_i2c_byte_generic_unlocked(struct ixgbe_hw *hw, u8 byte_offset, + u8 dev_addr, u8 *data); +s32 ixgbe_write_i2c_byte_generic(struct ixgbe_hw *hw, u8 byte_offset, + u8 dev_addr, u8 data); +s32 ixgbe_write_i2c_byte_generic_unlocked(struct ixgbe_hw *hw, u8 byte_offset, + u8 dev_addr, u8 data); +s32 ixgbe_read_i2c_eeprom_generic(struct ixgbe_hw *hw, u8 byte_offset, + u8 *eeprom_data); +s32 ixgbe_write_i2c_eeprom_generic(struct ixgbe_hw *hw, u8 byte_offset, + u8 eeprom_data); +void ixgbe_i2c_bus_clear(struct ixgbe_hw *hw); +s32 ixgbe_read_i2c_combined_generic_int(struct ixgbe_hw *, u8 addr, u16 reg, + u16 *val, bool lock); +s32 ixgbe_write_i2c_combined_generic_int(struct ixgbe_hw *, u8 addr, u16 reg, + u16 val, bool lock); +#endif /* _IXGBE_PHY_H_ */ diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_procfs.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_procfs.c new file mode 100644 index 00000000000..18f0bff5973 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_procfs.c @@ -0,0 +1,917 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 1999 - 2026 Intel Corporation */ + +#include "ixgbe.h" +#include "ixgbe_common.h" +#include "ixgbe_type.h" + +#ifdef IXGBE_PROCFS +#ifndef IXGBE_SYSFS + +#include +#include +#include +#include +#include + +static struct proc_dir_entry *ixgbe_top_dir = NULL; + +static struct net_device_stats *procfs_get_stats(struct net_device *netdev) +{ +#ifndef HAVE_NETDEV_STATS_IN_NETDEV + struct ixgbe_adapter *adapter; +#endif + if (netdev == NULL) + return NULL; + +#ifdef HAVE_NETDEV_STATS_IN_NETDEV + /* only return the current stats */ + return &netdev->stats; +#else + adapter = netdev_priv(netdev); + + /* only return the current stats */ + return &adapter->net_stats; +#endif /* HAVE_NETDEV_STATS_IN_NETDEV */ +} + +bool ixgbe_thermal_present(struct ixgbe_adapter *adapter) +{ + s32 status; + if (adapter == NULL) + return false; + status = ixgbe_init_thermal_sensor_thresh_generic(&(adapter->hw)); + if (status != IXGBE_SUCCESS) + return false; + + return true; +} + +static int ixgbe_fwbanner(char *page, char __always_unused **start, + off_t __always_unused off, int count, + int __always_unused *eof, void *data) +{ + struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data; + + if (adapter == NULL) + return snprintf(page, count, "error: no adapter\n"); + + return snprintf(page, count, "%s\n", adapter->eeprom_id); +} + +static int ixgbe_porttype(char *page, char __always_unused **start, + off_t __always_unused off, int count, + int __always_unused *eof, void *data) +{ + struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data; + if (adapter == NULL) + return snprintf(page, count, "error: no adapter\n"); + return snprintf(page, count, "%d\n", + test_bit(__IXGBE_DOWN, adapter->state)); +} + +static int ixgbe_portspeed(char *page, char __always_unused **start, + off_t __always_unused off, int count, + int __always_unused *eof, void *data) +{ + struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data; + int speed = 0; + + if (adapter == NULL) + return snprintf(page, count, "error: no adapter\n"); + + switch (adapter->link_speed) { + case IXGBE_LINK_SPEED_100_FULL: + speed = 1; + break; + case IXGBE_LINK_SPEED_1GB_FULL: + speed = 10; + break; + case IXGBE_LINK_SPEED_10GB_FULL: + speed = 100; + break; + } + return snprintf(page, count, "%d\n", speed); +} + +static int ixgbe_wqlflag(char *page, char __always_unused **start, + off_t __always_unused off, int count, + int __always_unused *eof, void *data) +{ + struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data; + if (adapter == NULL) + return snprintf(page, count, "error: no adapter\n"); + + return snprintf(page, count, "%d\n", adapter->wol); +} + +static int ixgbe_xflowctl(char *page, char __always_unused **start, + off_t __always_unused off, int count, + int __always_unused *eof, void *data) +{ + struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data; + struct ixgbe_hw *hw; + + if (!adapter) + return snprintf(page, count, "error: no adapter\n"); + + hw = &adapter->hw; + + return snprintf(page, count, "%d\n", hw->fc.current_mode); +} + +static int ixgbe_rxdrops(char *page, char __always_unused **start, + off_t __always_unused off, int count, + int __always_unused *eof, void *data) +{ + struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data; + struct net_device_stats *net_stats; + + if (adapter == NULL) + return snprintf(page, count, "error: no adapter\n"); + net_stats = procfs_get_stats(adapter->netdev); + if (net_stats == NULL) + return snprintf(page, count, "error: no net stats\n"); + + return snprintf(page, count, "%lu\n", + net_stats->rx_dropped); +} + +static int ixgbe_rxerrors(char *page, char __always_unused **start, + off_t __always_unused off, int count, + int __always_unused *eof, void *data) +{ + struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data; + struct net_device_stats *net_stats; + + if (adapter == NULL) + return snprintf(page, count, "error: no adapter\n"); + net_stats = procfs_get_stats(adapter->netdev); + if (net_stats == NULL) + return snprintf(page, count, "error: no net stats\n"); + + return snprintf(page, count, "%lu\n", net_stats->rx_errors); +} + +static int ixgbe_rxupacks(char *page, char __always_unused **start, + off_t __always_unused off, int count, + int __always_unused *eof, void *data) +{ + struct ixgbe_hw *hw; + struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data; + + if (!adapter) + return snprintf(page, count, "error: no adapter\n"); + + hw = &adapter->hw; + + return snprintf(page, count, "%d\n", IXGBE_READ_REG(hw, IXGBE_TPR)); +} + +static int ixgbe_rxmpacks(char *page, char __always_unused **start, + off_t __always_unused off, int count, + int __always_unused *eof, void *data) +{ + struct ixgbe_hw *hw; + struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data; + + if (!adapter) + return snprintf(page, count, "error: no adapter\n"); + + hw = &adapter->hw; + + return snprintf(page, count, "%d\n", IXGBE_READ_REG(hw, IXGBE_MPRC)); +} + +static int ixgbe_rxbpacks(char *page, char __always_unused **start, + off_t __always_unused off, int count, + int __always_unused *eof, void *data) +{ + struct ixgbe_hw *hw; + struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data; + + if (!adapter) + return snprintf(page, count, "error: no adapter\n"); + + hw = &adapter->hw; + + return snprintf(page, count, "%d\n", IXGBE_READ_REG(hw, IXGBE_BPRC)); +} + +static int ixgbe_txupacks(char *page, char __always_unused **start, + off_t __always_unused off, int count, + int __always_unused *eof, void *data) +{ + struct ixgbe_hw *hw; + struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data; + + if (!adapter) + return snprintf(page, count, "error: no adapter\n"); + + hw = &adapter->hw; + + return snprintf(page, count, "%d\n", IXGBE_READ_REG(hw, IXGBE_TPT)); +} + +static int ixgbe_txmpacks(char *page, char __always_unused **start, + off_t __always_unused off, int count, + int __always_unused *eof, void *data) +{ + struct ixgbe_hw *hw; + struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data; + + if (!adapter) + return snprintf(page, count, "error: no adapter\n"); + + hw = &adapter->hw; + + return snprintf(page, count, "%d\n", IXGBE_READ_REG(hw, IXGBE_MPTC)); +} + +static int ixgbe_txbpacks(char *page, char __always_unused **start, + off_t __always_unused off, int count, + int __always_unused *eof, void *data) +{ + struct ixgbe_hw *hw; + struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data; + + if (!adapter) + return snprintf(page, count, "error: no adapter\n"); + + hw = &adapter->hw; + + return snprintf(page, count, "%d\n", IXGBE_READ_REG(hw, IXGBE_BPTC)); +} + +static int ixgbe_txerrors(char *page, char __always_unused **start, + off_t __always_unused off, int count, + int __always_unused *eof, void *data) +{ + struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data; + struct net_device_stats *net_stats; + + if (adapter == NULL) + return snprintf(page, count, "error: no adapter\n"); + net_stats = procfs_get_stats(adapter->netdev); + if (net_stats == NULL) + return snprintf(page, count, "error: no net stats\n"); + + return snprintf(page, count, "%lu\n", + net_stats->tx_errors); +} + +static int ixgbe_txdrops(char *page, char __always_unused **start, + off_t __always_unused off, int count, + int __always_unused *eof, void *data) +{ + struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data; + struct net_device_stats *net_stats; + + if (adapter == NULL) + return snprintf(page, count, "error: no adapter\n"); + net_stats = procfs_get_stats(adapter->netdev); + if (net_stats == NULL) + return snprintf(page, count, "error: no net stats\n"); + + return snprintf(page, count, "%lu\n", + net_stats->tx_dropped); +} + +static int ixgbe_rxframes(char *page, char __always_unused **start, + off_t __always_unused off, int count, + int __always_unused *eof, void *data) +{ + struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data; + struct net_device_stats *net_stats; + + if (adapter == NULL) + return snprintf(page, count, "error: no adapter\n"); + net_stats = procfs_get_stats(adapter->netdev); + if (net_stats == NULL) + return snprintf(page, count, "error: no net stats\n"); + + return snprintf(page, count, "%lu\n", + net_stats->rx_packets); +} + +static int ixgbe_rxbytes(char *page, char __always_unused **start, + off_t __always_unused off, int count, + int __always_unused *eof, void *data) +{ + struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data; + struct net_device_stats *net_stats; + + if (adapter == NULL) + return snprintf(page, count, "error: no adapter\n"); + net_stats = procfs_get_stats(adapter->netdev); + if (net_stats == NULL) + return snprintf(page, count, "error: no net stats\n"); + + return snprintf(page, count, "%lu\n", + net_stats->rx_bytes); +} + +static int ixgbe_txframes(char *page, char __always_unused **start, + off_t __always_unused off, int count, + int __always_unused *eof, void *data) +{ + struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data; + struct net_device_stats *net_stats; + + if (adapter == NULL) + return snprintf(page, count, "error: no adapter\n"); + net_stats = procfs_get_stats(adapter->netdev); + if (net_stats == NULL) + return snprintf(page, count, "error: no net stats\n"); + + return snprintf(page, count, "%lu\n", + net_stats->tx_packets); +} + +static int ixgbe_txbytes(char *page, char __always_unused **start, + off_t __always_unused off, int count, + int __always_unused *eof, void *data) +{ + struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data; + struct net_device_stats *net_stats; + + if (adapter == NULL) + return snprintf(page, count, "error: no adapter\n"); + net_stats = procfs_get_stats(adapter->netdev); + if (net_stats == NULL) + return snprintf(page, count, "error: no net stats\n"); + + return snprintf(page, count, "%lu\n", + net_stats->tx_bytes); +} + +static int ixgbe_linkstat(char *page, char __always_unused **start, + off_t __always_unused off, int count, + int __always_unused *eof, void *data) +{ + struct ixgbe_hw *hw; + struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data; + int bitmask = 0; + u32 link_speed; + bool link_up = false; + + if (!adapter) + return snprintf(page, count, "error: no adapter\n"); + + hw = &adapter->hw; + + if (!test_bit(__IXGBE_DOWN, adapter->state)) + bitmask |= 1; + + if (hw->mac.ops.check_link) + hw->mac.ops.check_link(hw, &link_speed, &link_up, false); + else + /* always assume link is up, if no check link function */ + link_up = true; + if (link_up) + bitmask |= 2; + + if (adapter->old_lsc != adapter->lsc_int) { + bitmask |= 4; + adapter->old_lsc = adapter->lsc_int; + } + + return snprintf(page, count, "0x%X\n", bitmask); +} + +static int ixgbe_funcid(char *page, char __always_unused **start, + off_t __always_unused off, int count, + int __always_unused *eof, void *data) +{ + struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data; + struct ixgbe_hw *hw; + + if (!adapter) + return snprintf(page, count, "error: no adapter\n"); + + hw = &adapter->hw; + + return snprintf(page, count, "0x%X\n", hw->bus.func); +} + +static int ixgbe_funcvers(char *page, char __always_unused **start, + off_t __always_unused off, int count, + int __always_unused *eof, void __always_unused *data) +{ + return snprintf(page, count, "%s\n", ixgbe_driver_version); +} + +static int ixgbe_macburn(char *page, char __always_unused **start, + off_t __always_unused off, int count, + int __always_unused *eof, void *data) +{ + struct ixgbe_hw *hw; + struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data; + + if (!adapter) + return snprintf(page, count, "error: no adapter\n"); + + hw = &adapter->hw; + + return snprintf(page, count, "0x%02X%02X%02X%02X%02X%02X\n", + (unsigned int)hw->mac.perm_addr[0], + (unsigned int)hw->mac.perm_addr[1], + (unsigned int)hw->mac.perm_addr[2], + (unsigned int)hw->mac.perm_addr[3], + (unsigned int)hw->mac.perm_addr[4], + (unsigned int)hw->mac.perm_addr[5]); +} + +static int ixgbe_macadmn(char *page, char __always_unused **start, + off_t __always_unused off, int count, + int __always_unused *eof, void *data) +{ + struct ixgbe_hw *hw; + struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data; + + if (!adapter) + return snprintf(page, count, "error: no adapter\n"); + + hw = &adapter->hw; + + return snprintf(page, count, "0x%02X%02X%02X%02X%02X%02X\n", + (unsigned int)hw->mac.addr[0], + (unsigned int)hw->mac.addr[1], + (unsigned int)hw->mac.addr[2], + (unsigned int)hw->mac.addr[3], + (unsigned int)hw->mac.addr[4], + (unsigned int)hw->mac.addr[5]); +} + +static int ixgbe_maclla1(char *page, char __always_unused **start, + off_t __always_unused off, int count, + int __always_unused *eof, void *data) +{ + struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data; + struct ixgbe_hw *hw; + int rc; + u16 eeprom_buff[6]; + u16 first_word = 0x37; + const u16 word_count = ARRAY_SIZE(eeprom_buff); + + if (!adapter) + return snprintf(page, count, "error: no adapter\n"); + + hw = &adapter->hw; + + rc = hw->eeprom.ops.read_buffer(hw, first_word, 1, &first_word); + if (rc != 0) + return snprintf(page, count, "error: reading pointer to the EEPROM\n"); + + if (first_word != 0x0000 && first_word != 0xFFFF) { + rc = hw->eeprom.ops.read_buffer(hw, first_word, word_count, + eeprom_buff); + if (rc != 0) + return snprintf(page, count, "error: reading buffer\n"); + } else { + memset(eeprom_buff, 0, sizeof(eeprom_buff)); + } + + switch (hw->bus.func) { + case 0: + return snprintf(page, count, "0x%04X%04X%04X\n", + eeprom_buff[0], + eeprom_buff[1], + eeprom_buff[2]); + case 1: + return snprintf(page, count, "0x%04X%04X%04X\n", + eeprom_buff[3], + eeprom_buff[4], + eeprom_buff[5]); + } + return snprintf(page, count, "unexpected port %d\n", hw->bus.func); +} + +static int ixgbe_mtusize(char *page, char __always_unused **start, + off_t __always_unused off, int count, + int __always_unused *eof, void *data) +{ + struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data; + struct net_device *netdev; + + if (adapter == NULL) + return snprintf(page, count, "error: no adapter\n"); + netdev = adapter->netdev; + if (netdev == NULL) + return snprintf(page, count, "error: no net device\n"); + + return snprintf(page, count, "%d\n", netdev->mtu); +} + +static int ixgbe_featflag(char *page, char __always_unused **start, + off_t __always_unused off, int count, + int __always_unused *eof, void *data) +{ + int bitmask = 0; + struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data; + struct net_device *netdev; + + if (adapter == NULL) + return snprintf(page, count, "error: no adapter\n"); + netdev = adapter->netdev; + if (netdev == NULL) + return snprintf(page, count, "error: no net device\n"); + if (adapter->netdev->features & NETIF_F_RXCSUM) + bitmask |= 1; + return snprintf(page, count, "%d\n", bitmask); +} + +static int ixgbe_lsominct(char *page, char __always_unused **start, + off_t __always_unused off, int count, + int __always_unused *eof, void __always_unused *data) +{ + return snprintf(page, count, "%d\n", 1); +} + +static int ixgbe_prommode(char *page, char __always_unused **start, + off_t __always_unused off, int count, + int __always_unused *eof, void *data) +{ + struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data; + struct net_device *netdev; + + if (adapter == NULL) + return snprintf(page, count, "error: no adapter\n"); + netdev = adapter->netdev; + if (netdev == NULL) + return snprintf(page, count, "error: no net device\n"); + + return snprintf(page, count, "%d\n", + netdev->flags & IFF_PROMISC); +} + +static int ixgbe_txdscqsz(char *page, char __always_unused **start, + off_t __always_unused off, int count, + int __always_unused *eof, void *data) +{ + struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data; + if (adapter == NULL) + return snprintf(page, count, "error: no adapter\n"); + + return snprintf(page, count, "%d\n", adapter->tx_ring[0]->count); +} + +static int ixgbe_rxdscqsz(char *page, char __always_unused **start, + off_t __always_unused off, int count, + int __always_unused *eof, void *data) +{ + struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data; + if (adapter == NULL) + return snprintf(page, count, "error: no adapter\n"); + + return snprintf(page, count, "%d\n", adapter->rx_ring[0]->count); +} + +static int ixgbe_rxqavg(char *page, char __always_unused **start, + off_t __always_unused off, int count, + int __always_unused *eof, void *data) +{ + int index; + int diff = 0; + u16 ntc; + u16 ntu; + struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data; + if (adapter == NULL) + return snprintf(page, count, "error: no adapter\n"); + + for (index = 0; index < adapter->num_rx_queues; index++) { + ntc = adapter->rx_ring[index]->next_to_clean; + ntu = adapter->rx_ring[index]->next_to_use; + + if (ntc >= ntu) + diff += (ntc - ntu); + else + diff += (adapter->rx_ring[index]->count - ntu + ntc); + } + if (adapter->num_rx_queues <= 0) + return snprintf(page, count, + "can't calculate, number of queues %d\n", + adapter->num_rx_queues); + return snprintf(page, count, "%d\n", diff/adapter->num_rx_queues); +} + +static int ixgbe_txqavg(char *page, char __always_unused **start, + off_t __always_unused off, int count, + int __always_unused *eof, void *data) +{ + int index; + int diff = 0; + u16 ntc; + u16 ntu; + struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data; + if (adapter == NULL) + return snprintf(page, count, "error: no adapter\n"); + + for (index = 0; index < adapter->num_tx_queues; index++) { + ntc = adapter->tx_ring[index]->next_to_clean; + ntu = adapter->tx_ring[index]->next_to_use; + + if (ntc >= ntu) + diff += (ntc - ntu); + else + diff += (adapter->tx_ring[index]->count - ntu + ntc); + } + if (adapter->num_tx_queues <= 0) + return snprintf(page, count, + "can't calculate, number of queues %d\n", + adapter->num_tx_queues); + return snprintf(page, count, "%d\n", + diff/adapter->num_tx_queues); +} + +static int ixgbe_iovotype(char *page, char __always_unused **start, + off_t __always_unused off, int count, + int __always_unused *eof, void __always_unused *data) +{ + return snprintf(page, count, "2\n"); +} + +static int ixgbe_funcnbr(char *page, char __always_unused **start, + off_t __always_unused off, int count, + int __always_unused *eof, void *data) +{ + struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data; + if (adapter == NULL) + return snprintf(page, count, "error: no adapter\n"); + + return snprintf(page, count, "%d\n", adapter->num_vfs); +} + +static int ixgbe_pciebnbr(char *page, char __always_unused **start, + off_t __always_unused off, int count, + int __always_unused *eof, void *data) +{ + struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data; + if (adapter == NULL) + return snprintf(page, count, "error: no adapter\n"); + + return snprintf(page, count, "%d\n", adapter->pdev->bus->number); +} + +static int ixgbe_therm_location(char *page, char __always_unused **start, + off_t __always_unused off, int count, + int __always_unused *eof, void *data) +{ + struct ixgbe_therm_proc_data *therm_data = + (struct ixgbe_therm_proc_data *)data; + + if (therm_data == NULL) + return snprintf(page, count, "error: no therm_data\n"); + + return snprintf(page, count, "%d\n", therm_data->sensor_data->location); +} + + +static int ixgbe_therm_maxopthresh(char *page, char __always_unused **start, + off_t __always_unused off, int count, + int __always_unused *eof, void *data) +{ + struct ixgbe_therm_proc_data *therm_data = + (struct ixgbe_therm_proc_data *)data; + + if (therm_data == NULL) + return snprintf(page, count, "error: no therm_data\n"); + + return snprintf(page, count, "%d\n", + therm_data->sensor_data->max_op_thresh); +} + + +static int ixgbe_therm_cautionthresh(char *page, char __always_unused **start, + off_t __always_unused off, int count, + int __always_unused *eof, void *data) +{ + struct ixgbe_therm_proc_data *therm_data = + (struct ixgbe_therm_proc_data *)data; + + if (therm_data == NULL) + return snprintf(page, count, "error: no therm_data\n"); + + return snprintf(page, count, "%d\n", + therm_data->sensor_data->caution_thresh); +} + +static int ixgbe_therm_temp(char *page, char __always_unused **start, + off_t __always_unused off, int count, + int __always_unused *eof, void *data) +{ + s32 status; + struct ixgbe_therm_proc_data *therm_data = + (struct ixgbe_therm_proc_data *)data; + + if (therm_data == NULL) + return snprintf(page, count, "error: no therm_data\n"); + + status = ixgbe_get_thermal_sensor_data_generic(therm_data->hw); + if (status != IXGBE_SUCCESS) + snprintf(page, count, "error: status %d returned\n", status); + + return snprintf(page, count, "%d\n", therm_data->sensor_data->temp); +} + + +struct ixgbe_proc_type { + char name[32]; + int (*read)(char*, char**, off_t, int, int*, void*); +}; + +struct ixgbe_proc_type ixgbe_proc_entries[] = { + {"fwbanner", &ixgbe_fwbanner}, + {"porttype", &ixgbe_porttype}, + {"portspeed", &ixgbe_portspeed}, + {"wqlflag", &ixgbe_wqlflag}, + {"xflowctl", &ixgbe_xflowctl}, + {"rxdrops", &ixgbe_rxdrops}, + {"rxerrors", &ixgbe_rxerrors}, + {"rxupacks", &ixgbe_rxupacks}, + {"rxmpacks", &ixgbe_rxmpacks}, + {"rxbpacks", &ixgbe_rxbpacks}, + {"txdrops", &ixgbe_txdrops}, + {"txerrors", &ixgbe_txerrors}, + {"txupacks", &ixgbe_txupacks}, + {"txmpacks", &ixgbe_txmpacks}, + {"txbpacks", &ixgbe_txbpacks}, + {"rxframes", &ixgbe_rxframes}, + {"rxbytes", &ixgbe_rxbytes}, + {"txframes", &ixgbe_txframes}, + {"txbytes", &ixgbe_txbytes}, + {"linkstat", &ixgbe_linkstat}, + {"funcid", &ixgbe_funcid}, + {"funcvers", &ixgbe_funcvers}, + {"macburn", &ixgbe_macburn}, + {"macadmn", &ixgbe_macadmn}, + {"maclla1", &ixgbe_maclla1}, + {"mtusize", &ixgbe_mtusize}, + {"featflag", &ixgbe_featflag}, + {"lsominct", &ixgbe_lsominct}, + {"prommode", &ixgbe_prommode}, + {"txdscqsz", &ixgbe_txdscqsz}, + {"rxdscqsz", &ixgbe_rxdscqsz}, + {"txqavg", &ixgbe_txqavg}, + {"rxqavg", &ixgbe_rxqavg}, + {"iovotype", &ixgbe_iovotype}, + {"funcnbr", &ixgbe_funcnbr}, + {"pciebnbr", &ixgbe_pciebnbr}, + {"", NULL} +}; + +struct ixgbe_proc_type ixgbe_internal_entries[] = { + {"location", &ixgbe_therm_location}, + {"temp", &ixgbe_therm_temp}, + {"cautionthresh", &ixgbe_therm_cautionthresh}, + {"maxopthresh", &ixgbe_therm_maxopthresh}, + {"", NULL} +}; + +void ixgbe_del_proc_entries(struct ixgbe_adapter *adapter) +{ + int index; + int i; + char buf[16]; /* much larger than the sensor number will ever be */ + + if (ixgbe_top_dir == NULL) + return; + + for (i = 0; i < IXGBE_MAX_SENSORS; i++) { + if (adapter->therm_dir[i] == NULL) + continue; + + for (index = 0; ; index++) { + if (ixgbe_internal_entries[index].read == NULL) + break; + + remove_proc_entry(ixgbe_internal_entries[index].name, + adapter->therm_dir[i]); + } + snprintf(buf, sizeof(buf), "sensor_%d", i); + remove_proc_entry(buf, adapter->info_dir); + } + + if (adapter->info_dir != NULL) { + for (index = 0; ; index++) { + if (ixgbe_proc_entries[index].read == NULL) + break; + remove_proc_entry(ixgbe_proc_entries[index].name, + adapter->info_dir); + } + remove_proc_entry("info", adapter->eth_dir); + } + + if (adapter->eth_dir != NULL) + remove_proc_entry(pci_name(adapter->pdev), ixgbe_top_dir); +} + +/* called from ixgbe_main.c */ +void ixgbe_procfs_exit(struct ixgbe_adapter *adapter) +{ + ixgbe_del_proc_entries(adapter); +} + +int ixgbe_procfs_topdir_init() +{ + ixgbe_top_dir = proc_mkdir("driver/ixgbe", NULL); + if (ixgbe_top_dir == NULL) + return -ENOMEM; + + return 0; +} + +void ixgbe_procfs_topdir_exit() +{ + remove_proc_entry("driver/ixgbe", NULL); +} + +/* called from ixgbe_main.c */ +int ixgbe_procfs_init(struct ixgbe_adapter *adapter) +{ + int rc = 0; + int index; + int i; + char buf[16]; /* much larger than the sensor number will ever be */ + + adapter->eth_dir = NULL; + adapter->info_dir = NULL; + for (i = 0; i < IXGBE_MAX_SENSORS; i++) + adapter->therm_dir[i] = NULL; + + if (ixgbe_top_dir == NULL) { + rc = -ENOMEM; + goto fail; + } + + adapter->eth_dir = proc_mkdir(pci_name(adapter->pdev), ixgbe_top_dir); + if (adapter->eth_dir == NULL) { + rc = -ENOMEM; + goto fail; + } + + adapter->info_dir = proc_mkdir("info", adapter->eth_dir); + if (adapter->info_dir == NULL) { + rc = -ENOMEM; + goto fail; + } + for (index = 0; ; index++) { + if (ixgbe_proc_entries[index].read == NULL) + break; + if (!(create_proc_read_entry(ixgbe_proc_entries[index].name, + 0444, + adapter->info_dir, + ixgbe_proc_entries[index].read, + adapter))) { + + rc = -ENOMEM; + goto fail; + } + } + if (ixgbe_thermal_present(adapter) == false) + goto exit; + + for (i = 0; i < IXGBE_MAX_SENSORS; i++) { + + if (adapter->hw.mac.thermal_sensor_data.sensor[i].location == + 0) + continue; + + snprintf(buf, sizeof(buf), "sensor_%d", i); + adapter->therm_dir[i] = proc_mkdir(buf, adapter->info_dir); + if (adapter->therm_dir[i] == NULL) { + rc = -ENOMEM; + goto fail; + } + for (index = 0; ; index++) { + if (ixgbe_internal_entries[index].read == NULL) + break; + /* + * therm_data struct contains pointer the read func + * will be needing + */ + adapter->therm_data[i].hw = &adapter->hw; + adapter->therm_data[i].sensor_data = + &adapter->hw.mac.thermal_sensor_data.sensor[i]; + + if (!(create_proc_read_entry( + ixgbe_internal_entries[index].name, + 0444, + adapter->therm_dir[i], + ixgbe_internal_entries[index].read, + &adapter->therm_data[i]))) { + rc = -ENOMEM; + goto fail; + } + } + } + goto exit; + +fail: + ixgbe_del_proc_entries(adapter); +exit: + return rc; +} + +#endif /* !IXGBE_SYSFS */ +#endif /* IXGBE_PROCFS */ diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_ptp.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_ptp.c new file mode 100644 index 00000000000..c1e7a94581f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_ptp.c @@ -0,0 +1,1644 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 1999 - 2026 Intel Corporation */ + +#include "ixgbe.h" +#include "ixgbe_ptp_e600.h" +#include +#include + +/* + * The 82599 and the X540 do not have true 64bit nanosecond scale + * counter registers. Instead, SYSTIME is defined by a fixed point + * system which allows the user to define the scale counter increment + * value at every level change of the oscillator driving the SYSTIME + * value. For both devices the TIMINCA:IV field defines this + * increment. On the X540 device, 31 bits are provided. However on the + * 82599 only provides 24 bits. The time unit is determined by the + * clock frequency of the oscillator in combination with the TIMINCA + * register. When these devices link at 10Gb the oscillator has a + * period of 6.4ns. In order to convert the scale counter into + * nanoseconds the cyclecounter and timecounter structures are + * used. The SYSTIME registers need to be converted to ns values by use + * of only a right shift (division by power of 2). The following math + * determines the largest incvalue that will fit into the available + * bits in the TIMINCA register. + * + * PeriodWidth: Number of bits to store the clock period + * MaxWidth: The maximum width value of the TIMINCA register + * Period: The clock period for the oscillator + * round(): discard the fractional portion of the calculation + * + * Period * [ 2 ^ ( MaxWidth - PeriodWidth ) ] + * + * For the X540, MaxWidth is 31 bits, and the base period is 6.4 ns + * For the 82599, MaxWidth is 24 bits, and the base period is 6.4 ns + * + * The period also changes based on the link speed: + * At 10Gb link or no link, the period remains the same. + * At 1Gb link, the period is multiplied by 10. (64ns) + * At 100Mb link, the period is multiplied by 100. (640ns) + * + * The calculated value allows us to right shift the SYSTIME register + * value in order to quickly convert it into a nanosecond clock, + * while allowing for the maximum possible adjustment value. + * + * These diagrams are only for the 10Gb link period + * + * SYSTIMEH SYSTIMEL + * +--------------+ +--------------+ + * X540 | 32 | | 1 | 3 | 28 | + * *--------------+ +--------------+ + * \________ 36 bits ______/ fract + * + * +--------------+ +--------------+ + * 82599 | 32 | | 8 | 3 | 21 | + * *--------------+ +--------------+ + * \________ 43 bits ______/ fract + * + * The 36 bit X540 SYSTIME overflows every + * 2^36 * 10^-9 / 60 = 1.14 minutes or 69 seconds + * + * The 43 bit 82599 SYSTIME overflows every + * 2^43 * 10^-9 / 3600 = 2.4 hours + */ +#define IXGBE_INCVAL_10GB 0x66666666 +#define IXGBE_INCVAL_1GB 0x40000000 +#define IXGBE_INCVAL_100 0x50000000 + +#define IXGBE_INCVAL_SHIFT_10GB 28 +#define IXGBE_INCVAL_SHIFT_1GB 24 +#define IXGBE_INCVAL_SHIFT_100 21 + +#define IXGBE_INCVAL_SHIFT_82599 7 +#define IXGBE_INCPER_SHIFT_82599 24 + +#define IXGBE_OVERFLOW_PERIOD (HZ * 30) +#define IXGBE_PTP_TX_TIMEOUT (HZ) + +/* We use our own definitions instead of NSEC_PER_SEC because we want to mark + * the value as a ULL to force precision when bit shifting. + */ +#define NS_PER_SEC 1000000000ULL +#define NS_PER_HALF_SEC 500000000ULL + +/* In contrast, the X550 controller has two registers, SYSTIMEH and SYSTIMEL + * which contain measurements of seconds and nanoseconds respectively. This + * matches the standard linux representation of time in the kernel. In addition, + * the X550 also has a SYSTIMER register which represents residue, or + * subnanosecond overflow adjustments. To control clock adjustment, the TIMINCA + * register is used, but it is unlike the X540 and 82599 devices. TIMINCA + * represents units of 2^-32 nanoseconds, and uses 31 bits for this, with the + * high bit representing whether the adjustent is positive or negative. Every + * clock cycle, the X550 will add 12.5 ns + TIMINCA which can result in a range + * of 12 to 13 nanoseconds adjustment. Unlike the 82599 and X540 devices, the + * X550's clock for purposes of SYSTIME generation is constant and not dependent + * on the link speed. + * + * SYSTIMEH SYSTIMEL SYSTIMER + * +--------------+ +--------------+ +-------------+ + * X550 | 32 | | 32 | | 32 | + * *--------------+ +--------------+ +-------------+ + * \____seconds___/ \_nanoseconds_/ \__2^-32 ns__/ + * + * This results in a full 96 bits to represent the clock, with 32 bits for + * seconds, 32 bits for nanoseconds (largest value is 0d999999999 or just under + * 1 second) and an additional 32 bits to measure sub nanosecond adjustments for + * underflow of adjustments. + * + * The 32 bits of seconds for the X550 overflows every + * 2^32 / ( 365.25 * 24 * 60 * 60 ) = ~136 years. + * + * In order to adjust the clock frequency for the X550, the TIMINCA register is + * provided. This register represents a + or minus nearly 0.5 ns adjustment to + * the base frequency. It is measured in 2^-32 ns units, with the high bit being + * the sign bit. This register enables software to calculate frequency + * adjustments and apply them directly to the clock rate. + * + * The math for converting ppb into TIMINCA values is fairly straightforward. + * TIMINCA value = ( Base_Frequency * ppb ) / 1000000000ULL + * + * This assumes that ppb is never high enough to create a value bigger than + * TIMINCA's 31 bits can store. This is ensured by the stack. Calculating this + * value is also simple. + * Max ppb = ( Max Adjustment / Base Frequency ) / 1000000000ULL + * + * For the X550, the Max adjustment is +/- 0.5 ns, and the base frequency is + * 12.5 nanoseconds. This means that the Max ppb is 39999999 + * Note: We subtract one in order to ensure no overflow, because the TIMINCA + * register can only hold slightly under 0.5 nanoseconds. + * + * Because TIMINCA is measured in 2^-32 ns units, we have to convert 12.5 ns + * into 2^-32 units, which is + * + * 12.5 * 2^32 = C80000000 + * + * Some revisions of hardware have a faster base frequency than the registers + * were defined for. To fix this, we use a timecounter structure with the + * proper mult and shift to convert the cycles into nanoseconds of time. + */ +#define IXGBE_X550_BASE_PERIOD 0xC80000000ULL +#define INCVALUE_MASK 0x7FFFFFFF +#define ISGN 0x80000000 +#define MAX_TIMADJ 0x7FFFFFFF + +/** + * ixgbe_ptp_setup_sdp_X540 + * @adapter: private adapter structure + * + * this function enables or disables the clock out feature on SDP0 for + * the X540 device. It will create a 1 second periodic output that can + * be used as the PPS (via an interrupt). + * + * It calculates when the system time will be on an exact second, and then + * aligns the start of the PPS signal to that value. + * + * This works by using the cycle counter shift and mult values in reverse, and + * assumes that the values we're shifting will not overflow. + */ +static void ixgbe_ptp_setup_sdp_X540(struct ixgbe_adapter *adapter) +{ + struct cyclecounter *cc = &adapter->hw_cc; + struct ixgbe_hw *hw = &adapter->hw; + u32 esdp, tsauxc, clktiml, clktimh, trgttiml, trgttimh, rem; + u64 ns = 0, clock_edge = 0, clock_period; + unsigned long flags; + + /* disable the pin first */ + IXGBE_WRITE_REG(hw, IXGBE_TSAUXC, 0x0); + IXGBE_WRITE_FLUSH(hw); + + if (!(adapter->flags2 & IXGBE_FLAG2_PTP_PPS_ENABLED)) + return; + + esdp = IXGBE_READ_REG(hw, IXGBE_ESDP); + + /* enable the SDP0 pin as output, and connected to the + * native function for Timesync (ClockOut) + */ + esdp |= IXGBE_ESDP_SDP0_DIR | + IXGBE_ESDP_SDP0_NATIVE; + + /* enable the Clock Out feature on SDP0, and allow + * interrupts to occur when the pin changes + */ + tsauxc = (IXGBE_TSAUXC_EN_CLK | + IXGBE_TSAUXC_SYNCLK | + IXGBE_TSAUXC_SDP0_INT); + + /* Determine the clock time period to use. This assumes that the + * cycle counter shift is small enough to avoid overflow. + */ + clock_period = div_u64((NS_PER_HALF_SEC << cc->shift), cc->mult); + clktiml = (u32)(clock_period); + clktimh = (u32)(clock_period >> 32); + + /* Read the current clock time, and save the cycle counter value */ + spin_lock_irqsave(&adapter->tmreg_lock, flags); + ns = timecounter_read(&adapter->hw_tc); + clock_edge = adapter->hw_tc.cycle_last; + spin_unlock_irqrestore(&adapter->tmreg_lock, flags); + + /* Figure out how many seconds to add in order to round up */ + div_u64_rem(ns, NS_PER_SEC, &rem); + + /* Figure out how many nanoseconds to add to round the clock edge up + * to the next full second + */ + rem = (NS_PER_SEC - rem); + + /* Adjust the clock edge to align with the next full second. */ + clock_edge += div_u64(((u64)rem << cc->shift), cc->mult); + trgttiml = (u32)clock_edge; + trgttimh = (u32)(clock_edge >> 32); + + IXGBE_WRITE_REG(hw, IXGBE_CLKTIML, clktiml); + IXGBE_WRITE_REG(hw, IXGBE_CLKTIMH, clktimh); + IXGBE_WRITE_REG(hw, IXGBE_TRGTTIML0, trgttiml); + IXGBE_WRITE_REG(hw, IXGBE_TRGTTIMH0, trgttimh); + + IXGBE_WRITE_REG(hw, IXGBE_ESDP, esdp); + IXGBE_WRITE_REG(hw, IXGBE_TSAUXC, tsauxc); + + IXGBE_WRITE_FLUSH(hw); +} + +/** + * ixgbe_ptp_setup_sdp_X550 + * @adapter: private adapter structure + * + * Enable or disable a clock output signal on SDP 0 for X550 hardware. + * + * Use the target time feature to align the output signal on the next full + * second. + * + * This works by using the cycle counter shift and mult values in reverse, and + * assumes that the values we're shifting will not overflow. + */ +static void ixgbe_ptp_setup_sdp_X550(struct ixgbe_adapter *adapter) +{ + struct cyclecounter *cc = &adapter->hw_cc; + struct ixgbe_hw *hw = &adapter->hw; + u32 esdp, tsauxc, freqout, trgttiml, trgttimh, rem, tssdp; + u64 ns = 0, clock_edge = 0; + struct timespec64 ts; + unsigned long flags; + + /* disable the pin first */ + IXGBE_WRITE_REG(hw, IXGBE_TSAUXC, 0x0); + IXGBE_WRITE_FLUSH(hw); + + if (!(adapter->flags2 & IXGBE_FLAG2_PTP_PPS_ENABLED)) + return; + + esdp = IXGBE_READ_REG(hw, IXGBE_ESDP); + + /* enable the SDP0 pin as output, and connected to the + * native function for Timesync (ClockOut) + */ + esdp |= IXGBE_ESDP_SDP0_DIR | + IXGBE_ESDP_SDP0_NATIVE; + + /* enable the Clock Out feature on SDP0, and use Target Time 0 to + * enable generation of interrupts on the clock change. + */ +#define IXGBE_TSAUXC_DIS_TS_CLEAR 0x40000000 + tsauxc = (IXGBE_TSAUXC_EN_CLK | IXGBE_TSAUXC_ST0 | + IXGBE_TSAUXC_EN_TT0 | IXGBE_TSAUXC_SDP0_INT | + IXGBE_TSAUXC_DIS_TS_CLEAR); + + tssdp = (IXGBE_TSSDP_TS_SDP0_EN | + IXGBE_TSSDP_TS_SDP0_CLK0); + + /* Determine the clock time period to use. This assumes that the + * cycle counter shift is small enough to avoid overflowing a 32bit + * value. + */ + freqout = (NS_PER_HALF_SEC << cc->shift) / cc->mult; + + /* Read the current clock time, and save the cycle counter value */ + spin_lock_irqsave(&adapter->tmreg_lock, flags); + ns = timecounter_read(&adapter->hw_tc); + clock_edge = adapter->hw_tc.cycle_last; + spin_unlock_irqrestore(&adapter->tmreg_lock, flags); + + /* Figure out how far past the next second we are */ + div_u64_rem(ns, NS_PER_SEC, &rem); + + /* Figure out how many nanoseconds to add to round the clock edge up + * to the next full second + */ + rem = (NS_PER_SEC - rem); + + /* Adjust the clock edge to align with the next full second. */ + clock_edge += div_u64(((u64)rem << cc->shift), cc->mult); + + /* X550 hardware stores the time in 32bits of 'billions of cycles' and + * 32bits of 'cycles'. There's no guarantee that cycles represents + * nanoseconds. However, we can use the math from a timespec64 to + * convert into the hardware representation. + * + * See ixgbe_ptp_read_X550() for more details. + */ + ts = ns_to_timespec64(clock_edge); + trgttiml = (u32)ts.tv_nsec; + trgttimh = (u32)ts.tv_sec; + + IXGBE_WRITE_REG(hw, IXGBE_FREQOUT0, freqout); + IXGBE_WRITE_REG(hw, IXGBE_TRGTTIML0, trgttiml); + IXGBE_WRITE_REG(hw, IXGBE_TRGTTIMH0, trgttimh); + + IXGBE_WRITE_REG(hw, IXGBE_ESDP, esdp); + IXGBE_WRITE_REG(hw, IXGBE_TSSDP, tssdp); + IXGBE_WRITE_REG(hw, IXGBE_TSAUXC, tsauxc); + + IXGBE_WRITE_FLUSH(hw); +} + +/** + * ixgbe_ptp_read_X550 - read cycle counter value + * @cc: cyclecounter structure + * + * This function reads SYSTIME registers. It is called by the cyclecounter + * structure to convert from internal representation into nanoseconds. We need + * this for X550 since some skews do not have expected clock frequency and + * result of SYSTIME is 32bits of "billions of cycles" and 32 bits of + * "cycles", rather than seconds and nanoseconds. + */ +#ifdef HAVE_NON_CONST_CYCLECOUNTER +static u64 ixgbe_ptp_read_X550(struct cyclecounter *cc) +#else +static u64 ixgbe_ptp_read_X550(const struct cyclecounter *cc) +#endif +{ + struct ixgbe_adapter *adapter = + container_of(cc, struct ixgbe_adapter, hw_cc); + struct ixgbe_hw *hw = &adapter->hw; + struct timespec64 ts; + + /* storage is 32 bits of 'billions of cycles' and 32 bits of 'cycles'. + * Some revisions of hardware run at a higher frequency and so the + * cycles are not guaranteed to be nanoseconds. The timespec64 created + * here is used for its math/conversions but does not necessarily + * represent nominal time. + * + * It should be noted that this cyclecounter will overflow at a + * non-bitmask field since we have to convert our billions of cycles + * into an actual cycles count. This results in some possible weird + * situations at high cycle counter stamps. However given that 32 bits + * of "seconds" is ~138 years this isn't a problem. Even at the + * increased frequency of some revisions, this is still ~103 years. + * Since the SYSTIME values start at 0 and we never write them, it is + * highly unlikely for the cyclecounter to overflow in practice. + */ + IXGBE_READ_REG(hw, IXGBE_SYSTIMR); + ts.tv_nsec = IXGBE_READ_REG(hw, IXGBE_SYSTIML); + ts.tv_sec = IXGBE_READ_REG(hw, IXGBE_SYSTIMH); + + return (u64)timespec64_to_ns(&ts); +} + +/** + * ixgbe_ptp_read_82599 - read raw cycle counter (to be used by time counter) + * @cc: the cyclecounter structure + * + * this function reads the cyclecounter registers and is called by the + * cyclecounter structure used to construct a ns counter from the + * arbitrary fixed point registers + */ +#ifdef HAVE_NON_CONST_CYCLECOUNTER +static u64 ixgbe_ptp_read_82599(struct cyclecounter *cc) +#else +static u64 ixgbe_ptp_read_82599(const struct cyclecounter *cc) +#endif +{ + struct ixgbe_adapter *adapter = + container_of(cc, struct ixgbe_adapter, hw_cc); + struct ixgbe_hw *hw = &adapter->hw; + u64 stamp = 0; + + stamp |= (u64)IXGBE_READ_REG(hw, IXGBE_SYSTIML); + stamp |= (u64)IXGBE_READ_REG(hw, IXGBE_SYSTIMH) << 32; + + return stamp; +} + +/** + * ixgbe_ptp_convert_to_hwtstamp - convert register value to hw timestamp + * @adapter: private adapter structure + * @hwtstamp: stack timestamp structure + * @timestamp: unsigned 64bit system time value + * + * We need to convert the adapter's RX/TXSTMP registers into a hwtstamp value + * which can be used by the stack's ptp functions. + * + * The lock is used to protect consistency of the cyclecounter and the SYSTIME + * registers. However, it does not need to protect against the Rx or Tx + * timestamp registers, as there can't be a new timestamp until the old one is + * unlatched by reading. + * + * In addition to the timestamp in hardware, some controllers need a software + * overflow cyclecounter, and this function takes this into account as well. + **/ +static void ixgbe_ptp_convert_to_hwtstamp(struct ixgbe_adapter *adapter, + struct skb_shared_hwtstamps *hwtstamp, + u64 timestamp) +{ + unsigned long flags; + struct timespec64 systime; + u64 ns; + + memset(hwtstamp, 0, sizeof(*hwtstamp)); + + switch (adapter->hw.mac.type) { + /* X550 and later hardware supposedly represent time using a seconds + * and nanoseconds counter, instead of raw 64bits nanoseconds. We need + * to convert the timestamp into cycles before it can be fed to the + * cyclecounter. We need an actual cyclecounter because some revisions + * of hardware run at a higher frequency and thus the counter does + * not represent seconds/nanoseconds. Instead it can be thought of as + * cycles and billions of cycles. + */ + case ixgbe_mac_X550: + case ixgbe_mac_X550EM_x: + case ixgbe_mac_X550EM_a: + case ixgbe_mac_E610: + /* Upper 32 bits represent billions of cycles, lower 32 bits + * represent cycles. However, we use timespec64_to_ns for the + * correct math even though the units haven't been corrected + * yet. + */ + systime.tv_sec = timestamp >> 32; + systime.tv_nsec = timestamp & 0xFFFFFFFF; + + timestamp = timespec64_to_ns(&systime); + break; + default: + break; + } + + spin_lock_irqsave(&adapter->tmreg_lock, flags); + ns = timecounter_cyc2time(&adapter->hw_tc, timestamp); + spin_unlock_irqrestore(&adapter->tmreg_lock, flags); + + hwtstamp->hwtstamp = ns_to_ktime(ns); +} + +/** + * ixgbe_ptp_adjfine_82599 + * @ptp: the ptp clock structure + * @scaled_ppm: scaled parts per million adjustment from base + * + * Adjust the frequency of the SYSTIME registers by the indicated scaled_ppm + * from base frequency. + * + * Scaled parts per million is ppm with a 16-bit binary fractional field. + */ +static int ixgbe_ptp_adjfine_82599(struct ptp_clock_info *ptp, long scaled_ppm) +{ + struct ixgbe_adapter *adapter = + container_of(ptp, struct ixgbe_adapter, ptp_caps); + struct ixgbe_hw *hw = &adapter->hw; + u64 incval; + + smp_mb(); + incval = READ_ONCE(adapter->base_incval); + incval = adjust_by_scaled_ppm(incval, scaled_ppm); + + switch (hw->mac.type) { + case ixgbe_mac_X540: + if (incval > 0xFFFFFFFFULL) + e_dev_warn("PTP ppb adjusted SYSTIME rate overflowed!\n"); + IXGBE_WRITE_REG(hw, IXGBE_TIMINCA, (u32)incval); + break; + case ixgbe_mac_82599EB: + if (incval > 0x00FFFFFFULL) + e_dev_warn("PTP ppb adjusted SYSTIME rate overflowed!\n"); + IXGBE_WRITE_REG(hw, IXGBE_TIMINCA, + BIT(IXGBE_INCPER_SHIFT_82599) | + ((u32)incval & 0x00FFFFFFUL)); + break; + default: + break; + } + + return 0; +} + +#ifndef HAVE_PTP_CLOCK_INFO_ADJFINE +/** + * ixgbe_ptp_adjfreq_82599 - Adjust the frequency of the clock + * @info: the driver's PTP info structure + * @ppb: Parts per billion adjustment from the base + * + * Adjust the frequency of the clock by the indicated parts per billion from the + * base frequency. + */ +static int ixgbe_ptp_adjfreq_82599(struct ptp_clock_info *info, s32 ppb) +{ + long scaled_ppm; + + /* + * We want to calculate + * + * scaled_ppm = ppb * 2^16 / 1000 + * + * which simplifies to + * + * scaled_ppm = ppb * 2^13 / 125 + */ + scaled_ppm = ((long)ppb << 13) / 125; + return ixgbe_ptp_adjfine_82599(info, scaled_ppm); +} +#endif + +/** + * ixgbe_ptp_adjfine_X550 + * @ptp: the ptp clock structure + * @scaled_ppm: scaled parts per million adjustment from base + * + * Adjust the frequency of the ptp cycle counter by the + * indicated scaled_ppm from the base frequency. + * + * Scaled parts per million is ppm with a 16-bit binary fractional field. + */ +static int ixgbe_ptp_adjfine_X550(struct ptp_clock_info *ptp, long scaled_ppm) +{ + struct ixgbe_adapter *adapter = + container_of(ptp, struct ixgbe_adapter, ptp_caps); + struct ixgbe_hw *hw = &adapter->hw; + bool neg_adj; + u64 rate; + u32 inca; + + neg_adj = diff_by_scaled_ppm(IXGBE_X550_BASE_PERIOD, scaled_ppm, &rate); + + /* warn if rate is too large */ + if (rate >= INCVALUE_MASK) + e_dev_warn("PTP ppb adjusted SYSTIME rate overflowed!\n"); + + inca = rate & INCVALUE_MASK; + if (neg_adj) + inca |= ISGN; + + IXGBE_WRITE_REG(hw, IXGBE_TIMINCA, inca); + + return 0; +} + +#ifndef HAVE_PTP_CLOCK_INFO_ADJFINE +/** + * ixgbe_ptp_adjfreq_X550 - Adjust the frequency of the clock + * @info: the driver's PTP info structure + * @ppb: Parts per billion adjustment from the base + * + * Adjust the frequency of the clock by the indicated parts per billion from the + * base frequency. + */ +static int ixgbe_ptp_adjfreq_X550(struct ptp_clock_info *info, s32 ppb) +{ + long scaled_ppm; + + /* + * We want to calculate + * + * scaled_ppm = ppb * 2^16 / 1000 + * + * which simplifies to + * + * scaled_ppm = ppb * 2^13 / 125 + */ + scaled_ppm = ((long)ppb << 13) / 125; + return ixgbe_ptp_adjfine_X550(info, scaled_ppm); +} +#endif + +/** + * ixgbe_ptp_adjtime + * @ptp: the ptp clock structure + * @delta: offset to adjust the cycle counter by + * + * adjust the timer by resetting the timecounter structure. + */ +static int ixgbe_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta) +{ + struct ixgbe_adapter *adapter = + container_of(ptp, struct ixgbe_adapter, ptp_caps); + unsigned long flags; + + spin_lock_irqsave(&adapter->tmreg_lock, flags); + timecounter_adjtime(&adapter->hw_tc, delta); + spin_unlock_irqrestore(&adapter->tmreg_lock, flags); + + if (adapter->ptp_setup_sdp) + adapter->ptp_setup_sdp(adapter); + + return 0; +} + +/** + * ixgbe_ptp_gettimex + * @ptp: the ptp clock structure + * @ts: timespec to hold the PHC timestamp + * @sts: structure to hold the system time before and after reading the PHC + * + * read the timecounter and return the correct value on ns, + * after converting it into a struct timespec. + */ +static int ixgbe_ptp_gettimex(struct ptp_clock_info *ptp, + struct timespec64 *ts, + struct ptp_system_timestamp *sts) +{ + struct ixgbe_adapter *adapter = + container_of(ptp, struct ixgbe_adapter, ptp_caps); + struct ixgbe_hw *hw = &adapter->hw; + unsigned long flags; + u64 ns, stamp; + + spin_lock_irqsave(&adapter->tmreg_lock, flags); + + switch (adapter->hw.mac.type) { + case ixgbe_mac_X550: + case ixgbe_mac_X550EM_x: + case ixgbe_mac_X550EM_a: + /* Upper 32 bits represent billions of cycles, lower 32 bits + * represent cycles. However, we use timespec64_to_ns for the + * correct math even though the units haven't been corrected + * yet. + */ + ptp_read_system_prets(sts); + IXGBE_READ_REG(hw, IXGBE_SYSTIMR); + ptp_read_system_postts(sts); + ts->tv_nsec = IXGBE_READ_REG(hw, IXGBE_SYSTIML); + ts->tv_sec = IXGBE_READ_REG(hw, IXGBE_SYSTIMH); + stamp = timespec64_to_ns(ts); + break; + default: + ptp_read_system_prets(sts); + stamp = IXGBE_READ_REG(hw, IXGBE_SYSTIML); + ptp_read_system_postts(sts); + stamp |= (u64)IXGBE_READ_REG(hw, IXGBE_SYSTIMH) << 32; + break; + } + + ns = timecounter_cyc2time(&adapter->hw_tc, stamp); + + spin_unlock_irqrestore(&adapter->tmreg_lock, flags); + + *ts = ns_to_timespec64(ns); + + return 0; +} + +/** + * ixgbe_ptp_gettime + * @ptp: the ptp clock structure + * @ts: timespec64 structure to hold the current time value + * + * read the timecounter and return the correct value on ns, + * after converting it into a struct timespec64. + */ +static int __maybe_unused ixgbe_ptp_gettime(struct ptp_clock_info *ptp, + struct timespec64 *ts) +{ + return ixgbe_ptp_gettimex(ptp, ts, NULL); +} + +/** + * ixgbe_ptp_settime + * @ptp: the ptp clock structure + * @ts: the timespec containing the new time for the cycle counter + * + * reset the timecounter to use a new base value instead of the kernel + * wall timer value. + */ +static int ixgbe_ptp_settime(struct ptp_clock_info *ptp, + const struct timespec64 *ts) +{ + struct ixgbe_adapter *adapter = container_of(ptp, struct ixgbe_adapter, + ptp_caps); + unsigned long flags; + u64 ns = timespec64_to_ns(ts); + + /* reset the timecounter */ + spin_lock_irqsave(&adapter->tmreg_lock, flags); + timecounter_init(&adapter->hw_tc, &adapter->hw_cc, ns); + spin_unlock_irqrestore(&adapter->tmreg_lock, flags); + + if (adapter->ptp_setup_sdp) + adapter->ptp_setup_sdp(adapter); + + return 0; +} + +#ifndef HAVE_PTP_CLOCK_INFO_GETTIME64 +static int ixgbe_ptp_gettime32(struct ptp_clock_info *ptp, struct timespec *ts) +{ + struct timespec64 ts64; + int err; + + err = ixgbe_ptp_gettime(ptp, &ts64); + if (err) + return err; + + *ts = timespec64_to_timespec(ts64); + + return 0; +} + +static int ixgbe_ptp_settime32(struct ptp_clock_info *ptp, + const struct timespec *ts) +{ + struct timespec64 ts64; + + ts64 = timespec_to_timespec64(*ts); + return ixgbe_ptp_settime(ptp, &ts64); +} +#endif + +/** + * ixgbe_ptp_feature_enable + * @ptp: the ptp clock structure + * @rq: the requested feature to change + * @on: whether to enable or disable the feature + * + * enable (or disable) ancillary features of the phc subsystem. + * our driver only supports the PPS feature on the X540 + */ +static int ixgbe_ptp_feature_enable(struct ptp_clock_info *ptp, + struct ptp_clock_request *rq, int on) +{ + struct ixgbe_adapter *adapter = + container_of(ptp, struct ixgbe_adapter, ptp_caps); + + /** + * When PPS is enabled, unmask the interrupt for the ClockOut + * feature, so that the interrupt handler can send the PPS + * event when the clock SDP triggers. Clear mask when PPS is + * disabled + */ + if (rq->type != PTP_CLK_REQ_PPS || !adapter->ptp_setup_sdp) + return -ENOTSUPP; + + if (on) + adapter->flags2 |= IXGBE_FLAG2_PTP_PPS_ENABLED; + else + adapter->flags2 &= ~IXGBE_FLAG2_PTP_PPS_ENABLED; + + adapter->ptp_setup_sdp(adapter); + return 0; +} + +/** + * ixgbe_ptp_check_pps_event + * @adapter: the private adapter structure + * + * This function is called by the interrupt routine when checking for + * interrupts. It will check and handle a pps event. + */ +void ixgbe_ptp_check_pps_event(struct ixgbe_adapter *adapter) +{ + struct ixgbe_hw *hw = &adapter->hw; + struct ptp_clock_event event; + + event.type = PTP_CLOCK_PPS; + + /* this check is necessary in case the interrupt was enabled via some + * alternative means (ex. debug_fs). Better to check here than + * everywhere that calls this function. + */ + if (!adapter->ptp_clock) + return; + + switch (hw->mac.type) { + case ixgbe_mac_X540: + ptp_clock_event(adapter->ptp_clock, &event); + break; + default: + break; + } +} + +/** + * ixgbe_ptp_overflow_check - watchdog task to detect SYSTIME overflow + * @adapter: private adapter struct + * + * this watchdog task periodically reads the timecounter + * in order to prevent missing when the system time registers wrap + * around. This needs to be run approximately twice a minute for the fastest + * overflowing hardware. We run it for all hardware since it shouldn't have a + * large impact. + */ +void ixgbe_ptp_overflow_check(struct ixgbe_adapter *adapter) +{ + bool timeout = time_is_before_jiffies(adapter->last_overflow_check + + IXGBE_OVERFLOW_PERIOD); + unsigned long flags; + + if (timeout) { + /* Update the timecounter */ + spin_lock_irqsave(&adapter->tmreg_lock, flags); + timecounter_read(&adapter->hw_tc); + spin_unlock_irqrestore(&adapter->tmreg_lock, flags); + + adapter->last_overflow_check = jiffies; + } +} + +/** + * ixgbe_ptp_rx_hang - detect error case when Rx timestamp registers latched + * @adapter: private network adapter structure + * + * this watchdog task is scheduled to detect error case where hardware has + * dropped an Rx packet that was timestamped when the ring is full. The + * particular error is rare but leaves the device in a state unable to timestamp + * any future packets. + */ +void ixgbe_ptp_rx_hang(struct ixgbe_adapter *adapter) +{ + struct ixgbe_hw *hw = &adapter->hw; + u32 tsyncrxctl = IXGBE_READ_REG(hw, IXGBE_TSYNCRXCTL); + struct ixgbe_ring *rx_ring; + unsigned long rx_event; + int n; + + /* if we don't have a valid timestamp in the registers, just update the + * timeout counter and exit + */ + if (!(tsyncrxctl & IXGBE_TSYNCRXCTL_VALID)) { + adapter->last_rx_ptp_check = jiffies; + return; + } + + /* determine the most recent watchdog or rx_timestamp event */ + rx_event = adapter->last_rx_ptp_check; + for (n = 0; n < adapter->num_rx_queues; n++) { + rx_ring = adapter->rx_ring[n]; + if (time_after(rx_ring->last_rx_timestamp, rx_event)) + rx_event = rx_ring->last_rx_timestamp; + } + + /* only need to read the high RXSTMP register to clear the lock */ + if (time_is_before_jiffies(rx_event + 5*HZ)) { + IXGBE_READ_REG(hw, IXGBE_RXSTMPH); + adapter->last_rx_ptp_check = jiffies; + + adapter->rx_hwtstamp_cleared++; + e_warn(drv, "clearing RX Timestamp hang\n"); + } +} + +/** + * ixgbe_ptp_clear_tx_timestamp - utility function to clear Tx timestamp state + * @adapter: the private adapter structure + * + * This function should be called whenever the state related to a Tx timestamp + * needs to be cleared. This helps ensure that all related bits are reset for + * the next Tx timestamp event. + */ +static void ixgbe_ptp_clear_tx_timestamp(struct ixgbe_adapter *adapter) +{ + struct ixgbe_hw *hw = &adapter->hw; + + IXGBE_READ_REG(hw, IXGBE_TXSTMPH); + if (adapter->ptp_tx_skb) { + dev_kfree_skb_any(adapter->ptp_tx_skb); + adapter->ptp_tx_skb = NULL; + } + clear_bit_unlock(__IXGBE_PTP_TX_IN_PROGRESS, adapter->state); +} + +/** + * ixgbe_ptp_tx_hang - detect error case where Tx timestamp never finishes + * @adapter: private network adapter structure + */ +void ixgbe_ptp_tx_hang(struct ixgbe_adapter *adapter) +{ + bool timeout = time_is_before_jiffies(adapter->ptp_tx_start + + IXGBE_PTP_TX_TIMEOUT); + + if (!adapter->ptp_tx_skb) + return; + + if (!test_bit(__IXGBE_PTP_TX_IN_PROGRESS, adapter->state)) + return; + + /* If we haven't received a timestamp within the timeout, it is + * reasonable to assume that it will never occur, so we can unlock the + * timestamp bit when this occurs. + */ + if (timeout) { + cancel_work_sync(&adapter->ptp_tx_work); + ixgbe_ptp_clear_tx_timestamp(adapter); + adapter->tx_hwtstamp_timeouts++; + e_warn(drv, "clearing Tx timestamp hang\n"); + } +} + +/** + * ixgbe_ptp_tx_hwtstamp - utility function which checks for TX time stamp + * @adapter: the private adapter struct + * + * if the timestamp is valid, we convert it into the timecounter ns + * value, then store that result into the shhwtstamps structure which + * is passed up the network stack + */ +static void ixgbe_ptp_tx_hwtstamp(struct ixgbe_adapter *adapter) +{ + struct sk_buff *skb = adapter->ptp_tx_skb; + struct ixgbe_hw *hw = &adapter->hw; + struct skb_shared_hwtstamps shhwtstamps; + u64 regval = 0; + + regval |= (u64)IXGBE_READ_REG(hw, IXGBE_TXSTMPL); + regval |= (u64)IXGBE_READ_REG(hw, IXGBE_TXSTMPH) << 32; + ixgbe_ptp_convert_to_hwtstamp(adapter, &shhwtstamps, regval); + + /* Handle cleanup of the ptp_tx_skb ourselves, and unlock the state + * bit prior to notifying the stack via skb_tstamp_tx(). This prevents + * well behaved applications from attempting to timestamp again prior + * to the lock bit being clear. + */ + adapter->ptp_tx_skb = NULL; + clear_bit_unlock(__IXGBE_PTP_TX_IN_PROGRESS, adapter->state); + + /* Notify the stack and then free the skb after we've unlocked */ + skb_tstamp_tx(skb, &shhwtstamps); + dev_kfree_skb_any(skb); +} + +/** + * ixgbe_ptp_tx_hwtstamp_work + * @work: pointer to the work struct + * + * This work item polls TSYNCTXCTL valid bit to determine when a Tx hardware + * timestamp has been taken for the current skb. It is necessary, because the + * descriptor's "done" bit does not correlate with the timestamp event. + */ +void ixgbe_ptp_tx_hwtstamp_work(struct work_struct *work) +{ + struct ixgbe_adapter *adapter = container_of(work, struct ixgbe_adapter, + ptp_tx_work); + struct ixgbe_hw *hw = &adapter->hw; + bool timeout = time_is_before_jiffies(adapter->ptp_tx_start + + IXGBE_PTP_TX_TIMEOUT); + u32 tsynctxctl; + + /* we have to have a valid skb to poll for a timestamp */ + if (!adapter->ptp_tx_skb) { + ixgbe_ptp_clear_tx_timestamp(adapter); + return; + } + + /* stop polling once we have a valid timestamp */ + tsynctxctl = IXGBE_READ_REG(hw, IXGBE_TSYNCTXCTL); + if (tsynctxctl & IXGBE_TSYNCTXCTL_VALID) { + ixgbe_ptp_tx_hwtstamp(adapter); + return; + } + + /* check timeout last in case timestamp event just occurred */ + if (timeout) { + ixgbe_ptp_clear_tx_timestamp(adapter); + adapter->tx_hwtstamp_timeouts++; + e_warn(drv, "clearing Tx Timestamp hang\n"); + } else { + /* reschedule to keep checking if it's not available yet */ + schedule_work(&adapter->ptp_tx_work); + } +} + +/** + * ixgbe_ptp_rx_pktstamp - utility function to get RX time stamp from buffer + * @q_vector: structure containing interrupt and ring information + * @skb: the packet + * + * This function will be called by the Rx routine of the timestamp for this + * packet is stored in the buffer. The value is stored in little endian format + * starting at the end of the packet data. + */ +void ixgbe_ptp_rx_pktstamp(struct ixgbe_q_vector *q_vector, + struct sk_buff *skb) +{ + __le64 regval; + + /* copy the bits out of the skb, and then trim the skb length */ + skb_copy_bits(skb, skb->len - IXGBE_TS_HDR_LEN, ®val, + IXGBE_TS_HDR_LEN); + __pskb_trim(skb, skb->len - IXGBE_TS_HDR_LEN); + + /* The timestamp is recorded in little endian format, and is stored at + * the end of the packet. + * + * DWORD: N N + 1 N + 2 + * Field: End of Packet SYSTIMH SYSTIML + */ + ixgbe_ptp_convert_to_hwtstamp(q_vector->adapter, skb_hwtstamps(skb), + le64_to_cpu(regval)); +} + +/** + * ixgbe_ptp_rx_rgtstamp - utility function which checks for RX time stamp + * @q_vector: structure containing interrupt and ring information + * @skb: particular skb to send timestamp with + * + * if the timestamp is valid, we convert it into the timecounter ns + * value, then store that result into the shhwtstamps structure which + * is passed up the network stack + */ +void ixgbe_ptp_rx_rgtstamp(struct ixgbe_q_vector *q_vector, + struct sk_buff *skb) +{ + struct ixgbe_adapter *adapter; + struct ixgbe_hw *hw; + u64 regval = 0; + u32 tsyncrxctl; + + /* we cannot process timestamps on a ring without a q_vector */ + if (!q_vector || !q_vector->adapter) + return; + + adapter = q_vector->adapter; + hw = &adapter->hw; + + /* Read the tsyncrxctl register afterwards in order to prevent taking an + * I/O hit on every packet. + */ + tsyncrxctl = IXGBE_READ_REG(hw, IXGBE_TSYNCRXCTL); + if (!(tsyncrxctl & IXGBE_TSYNCRXCTL_VALID)) + return; + + regval |= (u64)IXGBE_READ_REG(hw, IXGBE_RXSTMPL); + regval |= (u64)IXGBE_READ_REG(hw, IXGBE_RXSTMPH) << 32; + + ixgbe_ptp_convert_to_hwtstamp(adapter, skb_hwtstamps(skb), regval); +} + +/** + * ixgbe_ptp_get_ts_config - get current hardware timestamping configuration + * @adapter: pointer to adapter structure + * @ifr: ioctl data + * + * This function returns the current timestamping settings. Rather than + * attempt to deconstruct registers to fill in the values, simply keep a copy + * of the old settings around, and return a copy when requested. + */ +int ixgbe_ptp_get_ts_config(struct ixgbe_adapter *adapter, struct ifreq *ifr) +{ + struct hwtstamp_config *config = &adapter->tstamp_config; + + return copy_to_user(ifr->ifr_data, config, + sizeof(*config)) ? -EFAULT : 0; +} + +/** + * ixgbe_ptp_set_timestamp_mode - setup the hardware for the requested mode + * @adapter: the private ixgbe adapter structure + * @config: the hwtstamp configuration requested + * + * Outgoing time stamping can be enabled and disabled. Play nice and + * disable it when requested, although it shouldn't cause any overhead + * when no packet needs it. At most one packet in the queue may be + * marked for time stamping, otherwise it would be impossible to tell + * for sure to which packet the hardware time stamp belongs. + * + * Incoming time stamping has to be configured via the hardware + * filters. Not all combinations are supported, in particular event + * type has to be specified. Matching the kind of event packet is + * not supported, with the exception of "all V2 events regardless of + * level 2 or 4". + * + * Since hardware always timestamps Path delay packets when timestamping V2 + * packets, regardless of the type specified in the register, only use V2 + * Event mode. This more accurately tells the user what the hardware is going + * to do anyways. + * + * Note: this may modify the hwtstamp configuration towards a more general + * mode, if required to support the specifically requested mode. + */ +static int ixgbe_ptp_set_timestamp_mode(struct ixgbe_adapter *adapter, + struct hwtstamp_config *config) +{ + struct ixgbe_hw *hw = &adapter->hw; + u32 tsync_tx_ctl = IXGBE_TSYNCTXCTL_ENABLED; + u32 tsync_rx_ctl = IXGBE_TSYNCRXCTL_ENABLED; + u32 tsync_rx_mtrl = PTP_EV_PORT << 16; + bool is_l2 = false; + u32 regval; + + /* reserved for future extensions */ + if (config->flags) + return -EINVAL; + + switch (config->tx_type) { + case HWTSTAMP_TX_OFF: + tsync_tx_ctl = 0; + fallthrough; + case HWTSTAMP_TX_ON: + break; + default: + return -ERANGE; + } + + switch (config->rx_filter) { + case HWTSTAMP_FILTER_NONE: + tsync_rx_ctl = 0; + tsync_rx_mtrl = 0; + adapter->flags &= ~(IXGBE_FLAG_RX_HWTSTAMP_ENABLED | + IXGBE_FLAG_RX_HWTSTAMP_IN_REGISTER); + break; + case HWTSTAMP_FILTER_PTP_V1_L4_SYNC: + tsync_rx_ctl |= IXGBE_TSYNCRXCTL_TYPE_L4_V1; + tsync_rx_mtrl |= IXGBE_RXMTRL_V1_SYNC_MSG; + adapter->flags |= (IXGBE_FLAG_RX_HWTSTAMP_ENABLED | + IXGBE_FLAG_RX_HWTSTAMP_IN_REGISTER); + break; + case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ: + tsync_rx_ctl |= IXGBE_TSYNCRXCTL_TYPE_L4_V1; + tsync_rx_mtrl |= IXGBE_RXMTRL_V1_DELAY_REQ_MSG; + adapter->flags |= (IXGBE_FLAG_RX_HWTSTAMP_ENABLED | + IXGBE_FLAG_RX_HWTSTAMP_IN_REGISTER); + break; + case HWTSTAMP_FILTER_PTP_V2_EVENT: + case HWTSTAMP_FILTER_PTP_V2_L2_EVENT: + case HWTSTAMP_FILTER_PTP_V2_L4_EVENT: + case HWTSTAMP_FILTER_PTP_V2_SYNC: + case HWTSTAMP_FILTER_PTP_V2_L2_SYNC: + case HWTSTAMP_FILTER_PTP_V2_L4_SYNC: + case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ: + case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ: + case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ: + tsync_rx_ctl |= IXGBE_TSYNCRXCTL_TYPE_EVENT_V2; + is_l2 = true; + config->rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT; + adapter->flags |= (IXGBE_FLAG_RX_HWTSTAMP_ENABLED | + IXGBE_FLAG_RX_HWTSTAMP_IN_REGISTER); + break; + case HWTSTAMP_FILTER_PTP_V1_L4_EVENT: +#ifdef HAVE_HWTSTAMP_FILTER_NTP_ALL + case HWTSTAMP_FILTER_NTP_ALL: +#endif /* HAVE_HWTSTAMP_FILTER_NTP_ALL */ + case HWTSTAMP_FILTER_ALL: + /* The X550 controller is capable of timestamping all packets, + * which allows it to accept any filter. + */ + if (hw->mac.type >= ixgbe_mac_X550) { + tsync_rx_ctl |= IXGBE_TSYNCRXCTL_TYPE_ALL; + config->rx_filter = HWTSTAMP_FILTER_ALL; + adapter->flags |= IXGBE_FLAG_RX_HWTSTAMP_ENABLED; + break; + } + fallthrough; + default: + /* register RXMTRL must be set in order to do V1 packets, + * therefore it is not possible to time stamp both V1 Sync and + * Delay_Req messages unless hardware supports timestamping all + * packets => return error + */ + adapter->flags &= ~(IXGBE_FLAG_RX_HWTSTAMP_ENABLED | + IXGBE_FLAG_RX_HWTSTAMP_IN_REGISTER); + config->rx_filter = HWTSTAMP_FILTER_NONE; + return -ERANGE; + } + + if (hw->mac.type == ixgbe_mac_82598EB) { + adapter->flags &= ~(IXGBE_FLAG_RX_HWTSTAMP_ENABLED | + IXGBE_FLAG_RX_HWTSTAMP_IN_REGISTER); + if (tsync_rx_ctl | tsync_tx_ctl) + return -ERANGE; + return 0; + } + + /* Per-packet timestamping only works if the filter is set to all + * packets. Since this is desired, always timestamp all packets as long + * as any Rx filter was configured. + */ + switch (hw->mac.type) { + case ixgbe_mac_X550: + case ixgbe_mac_X550EM_x: + case ixgbe_mac_X550EM_a: + /* enable timestamping all packets only if at least some + * packets were requested. Otherwise, play nice and disable + * timestamping + */ + if (config->rx_filter == HWTSTAMP_FILTER_NONE) + break; + + tsync_rx_ctl = IXGBE_TSYNCRXCTL_ENABLED | + IXGBE_TSYNCRXCTL_TYPE_ALL | + IXGBE_TSYNCRXCTL_TSIP_UT_EN; + config->rx_filter = HWTSTAMP_FILTER_ALL; + adapter->flags |= IXGBE_FLAG_RX_HWTSTAMP_ENABLED; + adapter->flags &= ~IXGBE_FLAG_RX_HWTSTAMP_IN_REGISTER; + is_l2 = true; + break; + default: + break; + } + + /* define ethertype filter for timestamping L2 packets */ + if (is_l2) + IXGBE_WRITE_REG(hw, IXGBE_ETQF(IXGBE_ETQF_FILTER_1588), + (IXGBE_ETQF_FILTER_EN | /* enable filter */ + IXGBE_ETQF_1588 | /* enable timestamping */ + ETH_P_1588)); /* 1588 eth protocol type */ + else + IXGBE_WRITE_REG(hw, IXGBE_ETQF(IXGBE_ETQF_FILTER_1588), 0); + + /* enable/disable TX */ + regval = IXGBE_READ_REG(hw, IXGBE_TSYNCTXCTL); + regval &= ~IXGBE_TSYNCTXCTL_ENABLED; + regval |= tsync_tx_ctl; + IXGBE_WRITE_REG(hw, IXGBE_TSYNCTXCTL, regval); + + /* enable/disable RX */ + regval = IXGBE_READ_REG(hw, IXGBE_TSYNCRXCTL); + regval &= ~(IXGBE_TSYNCRXCTL_ENABLED | IXGBE_TSYNCRXCTL_TYPE_MASK); + regval |= tsync_rx_ctl; + IXGBE_WRITE_REG(hw, IXGBE_TSYNCRXCTL, regval); + + /* define which PTP packets are time stamped */ + IXGBE_WRITE_REG(hw, IXGBE_RXMTRL, tsync_rx_mtrl); + + IXGBE_WRITE_FLUSH(hw); + + /* clear TX/RX time stamp registers, just to be sure */ + ixgbe_ptp_clear_tx_timestamp(adapter); + IXGBE_READ_REG(hw, IXGBE_RXSTMPH); + + return 0; +} + +/** + * ixgbe_ptp_set_ts_config - user entry point for timestamp mode + * @adapter: pointer to adapter struct + * @ifr: ioctl data + * + * Set hardware to requested mode. If unsupported, return an error with no + * changes. Otherwise, store the mode for future reference. + */ +int ixgbe_ptp_set_ts_config(struct ixgbe_adapter *adapter, struct ifreq *ifr) +{ + struct hwtstamp_config config; + int err; + + if (copy_from_user(&config, ifr->ifr_data, sizeof(config))) + return -EFAULT; + + if (ixgbe_is_mac_E6xx(adapter->hw.mac.type)) + err = ixgbe_ptp_set_timestamp_mode_e600(adapter, &config); + else + err = ixgbe_ptp_set_timestamp_mode(adapter, &config); + if (err) + return err; + + /* save these settings for future reference */ + memcpy(&adapter->tstamp_config, &config, + sizeof(adapter->tstamp_config)); + + return copy_to_user(ifr->ifr_data, &config, sizeof(config)) ? + -EFAULT : 0; +} + +static void ixgbe_ptp_link_speed_adjust(struct ixgbe_adapter *adapter, + u32 *shift, u32 *incval) +{ + /** + * Scale the NIC cycle counter by a large factor so that + * relatively small corrections to the frequency can be added + * or subtracted. The drawbacks of a large factor include + * (a) the clock register overflows more quickly, (b) the cycle + * counter structure must be able to convert the systime value + * to nanoseconds using only a multiplier and a right-shift, + * and (c) the value must fit within the timinca register space + * => math based on internal DMA clock rate and available bits + * + * Note that when there is no link, internal DMA clock is same as when + * link speed is 10Gb. Set the registers correctly even when link is + * down to preserve the clock setting + */ + switch (adapter->link_speed) { + case IXGBE_LINK_SPEED_100_FULL: + *shift = IXGBE_INCVAL_SHIFT_100; + *incval = IXGBE_INCVAL_100; + break; + case IXGBE_LINK_SPEED_1GB_FULL: + *shift = IXGBE_INCVAL_SHIFT_1GB; + *incval = IXGBE_INCVAL_1GB; + break; + case IXGBE_LINK_SPEED_10GB_FULL: + default: + *shift = IXGBE_INCVAL_SHIFT_10GB; + *incval = IXGBE_INCVAL_10GB; + break; + } +} + +/** + * ixgbe_ptp_start_cyclecounter - create the cycle counter from hw + * @adapter: pointer to the adapter structure + * + * This function should be called to set the proper values for the TIMINCA + * register and tell the cyclecounter structure what the tick rate of SYSTIME + * is. It does not directly modify SYSTIME registers or the timecounter + * structure. It should be called whenever a new TIMINCA value is necessary, + * such as during initialization or when the link speed changes. + */ +void ixgbe_ptp_start_cyclecounter(struct ixgbe_adapter *adapter) +{ + struct ixgbe_hw *hw = &adapter->hw; + struct cyclecounter cc; + unsigned long flags; + u32 incval = 0; + u32 tsauxc = 0; + u32 fuse0 = 0; + + /* For some of the boards below this mask is technically incorrect. + * The timestamp mask overflows at approximately 61bits. However the + * particular hardware does not overflow on an even bitmask value. + * Instead, it overflows due to conversion of upper 32bits billions of + * cycles. Timecounters are not really intended for this purpose so + * they do not properly function if the overflow point isn't 2^N-1. + * However, the actual SYSTIME values in question take ~138 years to + * overflow. In practice this means they won't actually overflow. A + * proper fix to this problem would require modification of the + * timecounter delta calculations. + */ + cc.mask = CLOCKSOURCE_MASK(64); + cc.mult = 1; + cc.shift = 0; + + switch (hw->mac.type) { + case ixgbe_mac_X550EM_x: + /* SYSTIME assumes X550EM_x board frequency is 300Mhz, and is + * designed to represent seconds and nanoseconds when this is + * the case. However, some revisions of hardware have a 400Mhz + * clock and we have to compensate for this frequency + * variation using corrected mult and shift values. + */ + fuse0 = IXGBE_READ_REG(hw, IXGBE_FUSES0_GROUP(0)); + if (!(fuse0 & IXGBE_FUSES0_300MHZ)) { + cc.mult = 3; + cc.shift = 2; + } + fallthrough; + case ixgbe_mac_X550EM_a: + case ixgbe_mac_X550: + cc.read = ixgbe_ptp_read_X550; + + /* enable SYSTIME counter */ + IXGBE_WRITE_REG(hw, IXGBE_SYSTIMR, 0); + IXGBE_WRITE_REG(hw, IXGBE_SYSTIML, 0); + IXGBE_WRITE_REG(hw, IXGBE_SYSTIMH, 0); + tsauxc = IXGBE_READ_REG(hw, IXGBE_TSAUXC); + IXGBE_WRITE_REG(hw, IXGBE_TSAUXC, + tsauxc & ~IXGBE_TSAUXC_DISABLE_SYSTIME); + IXGBE_WRITE_REG(hw, IXGBE_TSIM, IXGBE_TSIM_TXTS); + IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_TIMESYNC); + + IXGBE_WRITE_FLUSH(hw); + + break; + case ixgbe_mac_X540: + cc.read = ixgbe_ptp_read_82599; + + ixgbe_ptp_link_speed_adjust(adapter, &cc.shift, &incval); + IXGBE_WRITE_REG(hw, IXGBE_TIMINCA, incval); + break; + case ixgbe_mac_82599EB: + cc.read = ixgbe_ptp_read_82599; + + ixgbe_ptp_link_speed_adjust(adapter, &cc.shift, &incval); + incval >>= IXGBE_INCVAL_SHIFT_82599; + cc.shift -= IXGBE_INCVAL_SHIFT_82599; + IXGBE_WRITE_REG(hw, IXGBE_TIMINCA, + BIT(IXGBE_INCPER_SHIFT_82599) | incval); + break; + default: + /* other devices aren't supported */ + return; + } + + /* update the base incval used to calculate frequency adjustment */ + WRITE_ONCE(adapter->base_incval, incval); + smp_mb(); + + /* need lock to prevent incorrect read while modifying cyclecounter */ + spin_lock_irqsave(&adapter->tmreg_lock, flags); + memcpy(&adapter->hw_cc, &cc, sizeof(adapter->hw_cc)); + spin_unlock_irqrestore(&adapter->tmreg_lock, flags); +} + +/** + * ixgbe_ptp_reset + * @adapter: the ixgbe private board structure + * + * When the MAC resets, all the hardware bits for timesync are reset. This + * function is used to re-enable the device for PTP based on current settings. + * We do lose the current clock time, so just reset the cyclecounter to the + * system real clock time. + * + * This function will maintain hwtstamp_config settings, and resets the SDP + * output if it was enabled. + */ +void ixgbe_ptp_reset(struct ixgbe_adapter *adapter) +{ + struct ixgbe_hw *hw = &adapter->hw; + unsigned long flags; + + /* reset the hardware timestamping mode */ + ixgbe_ptp_set_timestamp_mode(adapter, &adapter->tstamp_config); + + /* 82598 does not support PTP */ + if (hw->mac.type == ixgbe_mac_82598EB) + return; + + ixgbe_ptp_start_cyclecounter(adapter); + + spin_lock_irqsave(&adapter->tmreg_lock, flags); + timecounter_init(&adapter->hw_tc, &adapter->hw_cc, + ktime_get_real_ns()); + spin_unlock_irqrestore(&adapter->tmreg_lock, flags); + + adapter->last_overflow_check = jiffies; + + /* Now that the shift has been calculated and the systime + * registers reset, (re-)enable the Clock out feature + */ + if (adapter->ptp_setup_sdp) + adapter->ptp_setup_sdp(adapter); +} + +/** + * ixgbe_ptp_create_clock + * @adapter: the ixgbe private adapter structure + * + * This function performs setup of the user entry point function table and + * initializes the PTP clock device, which is used to access the clock-like + * features of the PTP core. It will be called by ixgbe_ptp_init, and may + * reuse a previously initialized clock (such as during a suspend/resume + * cycle). + */ +static long ixgbe_ptp_create_clock(struct ixgbe_adapter *adapter) +{ + struct net_device *netdev = adapter->netdev; + long err; + + /* do nothing if we already have a clock device */ + if (!IS_ERR_OR_NULL(adapter->ptp_clock)) + return 0; + + switch (adapter->hw.mac.type) { + case ixgbe_mac_X540: + snprintf(adapter->ptp_caps.name, + sizeof(adapter->ptp_caps.name), + "%s", netdev->name); + adapter->ptp_caps.owner = THIS_MODULE; + adapter->ptp_caps.max_adj = 250000000; + adapter->ptp_caps.n_alarm = 0; + adapter->ptp_caps.n_ext_ts = 0; + adapter->ptp_caps.n_per_out = 0; + adapter->ptp_caps.pps = 1; +#ifdef HAVE_PTP_CLOCK_INFO_ADJFINE + adapter->ptp_caps.adjfine = ixgbe_ptp_adjfine_82599; +#else + adapter->ptp_caps.adjfreq = ixgbe_ptp_adjfreq_82599; +#endif + adapter->ptp_caps.adjtime = ixgbe_ptp_adjtime; +#ifdef HAVE_PTP_CLOCK_INFO_GETTIME64 +#ifdef HAVE_PTP_SYS_OFFSET_EXTENDED_IOCTL + adapter->ptp_caps.gettimex64 = ixgbe_ptp_gettimex; +#else + adapter->ptp_caps.gettime64 = ixgbe_ptp_gettime; +#endif /* HAVE_PTP_SYS_OFFSET_EXTENDED_IOCTL */ + adapter->ptp_caps.settime64 = ixgbe_ptp_settime; +#else /* HAVE_PTP_CLOCK_INFO_GETTIME64 */ + adapter->ptp_caps.gettime = ixgbe_ptp_gettime32; + adapter->ptp_caps.settime = ixgbe_ptp_settime32; +#endif /* !HAVE_PTP_CLOCK_INFO_GETTIME64 */ + adapter->ptp_caps.enable = ixgbe_ptp_feature_enable; + adapter->ptp_setup_sdp = ixgbe_ptp_setup_sdp_X540; + break; + case ixgbe_mac_82599EB: + snprintf(adapter->ptp_caps.name, + sizeof(adapter->ptp_caps.name), + "%s", netdev->name); + adapter->ptp_caps.owner = THIS_MODULE; + adapter->ptp_caps.max_adj = 250000000; + adapter->ptp_caps.n_alarm = 0; + adapter->ptp_caps.n_ext_ts = 0; + adapter->ptp_caps.n_per_out = 0; + adapter->ptp_caps.pps = 0; +#ifdef HAVE_PTP_CLOCK_INFO_ADJFINE + adapter->ptp_caps.adjfine = ixgbe_ptp_adjfine_82599; +#else + adapter->ptp_caps.adjfreq = ixgbe_ptp_adjfreq_82599; +#endif + adapter->ptp_caps.adjtime = ixgbe_ptp_adjtime; +#ifdef HAVE_PTP_CLOCK_INFO_GETTIME64 +#ifdef HAVE_PTP_SYS_OFFSET_EXTENDED_IOCTL + adapter->ptp_caps.gettimex64 = ixgbe_ptp_gettimex; +#else + adapter->ptp_caps.gettime64 = ixgbe_ptp_gettime; +#endif /* HAVE_PTP_SYS_OFFSET_EXTENDED_IOCTL */ + adapter->ptp_caps.settime64 = ixgbe_ptp_settime; +#else /* HAVE_PTP_CLOCK_INFO_GETTIME64 */ + adapter->ptp_caps.gettime = ixgbe_ptp_gettime32; + adapter->ptp_caps.settime = ixgbe_ptp_settime32; +#endif /* !HAVE_PTP_CLOCK_INFO_GETTIME64 */ + adapter->ptp_caps.enable = ixgbe_ptp_feature_enable; + break; + case ixgbe_mac_X550: + case ixgbe_mac_X550EM_x: + case ixgbe_mac_X550EM_a: + snprintf(adapter->ptp_caps.name, 16, "%s", netdev->name); + adapter->ptp_caps.owner = THIS_MODULE; + adapter->ptp_caps.max_adj = 30000000; + adapter->ptp_caps.n_alarm = 0; + adapter->ptp_caps.n_ext_ts = 0; + adapter->ptp_caps.n_per_out = 0; + adapter->ptp_caps.pps = 1; +#ifdef HAVE_PTP_CLOCK_INFO_ADJFINE + adapter->ptp_caps.adjfine = ixgbe_ptp_adjfine_X550; +#else + adapter->ptp_caps.adjfreq = ixgbe_ptp_adjfreq_X550; +#endif + adapter->ptp_caps.adjtime = ixgbe_ptp_adjtime; +#ifdef HAVE_PTP_CLOCK_INFO_GETTIME64 +#ifdef HAVE_PTP_SYS_OFFSET_EXTENDED_IOCTL + adapter->ptp_caps.gettimex64 = ixgbe_ptp_gettimex; +#else + adapter->ptp_caps.gettime64 = ixgbe_ptp_gettime; +#endif /* HAVE_PTP_SYS_OFFSET_EXTENDED_IOCTL */ + adapter->ptp_caps.settime64 = ixgbe_ptp_settime; +#else /* HAVE_PTP_CLOCK_INFO_GETTIME64 */ + adapter->ptp_caps.gettime = ixgbe_ptp_gettime32; + adapter->ptp_caps.settime = ixgbe_ptp_settime32; +#endif /* !HAVE_PTP_CLOCK_INFO_GETTIME64 */ + adapter->ptp_caps.enable = ixgbe_ptp_feature_enable; + adapter->ptp_setup_sdp = ixgbe_ptp_setup_sdp_X550; + break; + default: + adapter->ptp_clock = NULL; + adapter->ptp_setup_sdp = NULL; + return -EOPNOTSUPP; + } + + adapter->ptp_clock = ptp_clock_register(&adapter->ptp_caps, + ixgbe_pf_to_dev(adapter)); + if (IS_ERR(adapter->ptp_clock)) { + err = PTR_ERR(adapter->ptp_clock); + adapter->ptp_clock = NULL; + e_dev_err("ptp_clock_register failed\n"); + return err; + } else if (adapter->ptp_clock) + e_dev_info("registered PHC device on %s\n", netdev->name); + + /* set default timestamp mode to disabled here. We do this in + * create_clock instead of init, because we don't want to override the + * previous settings during a resume cycle. + */ + adapter->tstamp_config.rx_filter = HWTSTAMP_FILTER_NONE; + adapter->tstamp_config.tx_type = HWTSTAMP_TX_OFF; + + return 0; +} + +/** + * ixgbe_ptp_init + * @adapter: the ixgbe private adapter structure + * + * This function performs the required steps for enabling PTP + * support. If PTP support has already been loaded it simply calls the + * cyclecounter init routine and exits. + */ +void ixgbe_ptp_init(struct ixgbe_adapter *adapter) +{ + /* initialize the spin lock first since we can't control when a user + * will call the entry functions once we have initialized the clock + * device + */ + spin_lock_init(&adapter->tmreg_lock); + + /* obtain a PTP device, or re-use an existing device */ + if (ixgbe_ptp_create_clock(adapter)) + return; + + /* we have a clock so we can initialize work now */ + INIT_WORK(&adapter->ptp_tx_work, ixgbe_ptp_tx_hwtstamp_work); + + /* reset the PTP related hardware bits */ + ixgbe_ptp_reset(adapter); + + /* enter the IXGBE_PTP_RUNNING state */ + set_bit(__IXGBE_PTP_RUNNING, adapter->state); + + return; +} + +/** + * ixgbe_ptp_suspend - stop PTP work items + * @adapter: pointer to adapter struct + * + * this function suspends PTP activity, and prevents more PTP work from being + * generated, but does not destroy the PTP clock device. + */ +void ixgbe_ptp_suspend(struct ixgbe_adapter *adapter) +{ + /* Leave the IXGBE_PTP_RUNNING state. */ + if (!test_and_clear_bit(__IXGBE_PTP_RUNNING, adapter->state)) + return; + + adapter->flags2 &= ~IXGBE_FLAG2_PTP_PPS_ENABLED; + if (adapter->ptp_setup_sdp) + adapter->ptp_setup_sdp(adapter); + + /* ensure that we cancel any pending PTP Tx work item in progress */ + cancel_work_sync(&adapter->ptp_tx_work); + ixgbe_ptp_clear_tx_timestamp(adapter); +} + +/** + * ixgbe_ptp_stop - close the PTP device + * @adapter: pointer to adapter struct + * + * completely destroy the PTP device, should only be called when the device is + * being fully closed. + */ +void ixgbe_ptp_stop(struct ixgbe_adapter *adapter) +{ + if (ixgbe_is_mac_E6xx(adapter->hw.mac.type)) { + ixgbe_ptp_release_e600(adapter); + return; + } + + /* first, suspend PTP activity */ + ixgbe_ptp_suspend(adapter); + + /* disable the PTP clock device */ + if (adapter->ptp_clock) { + ptp_clock_unregister(adapter->ptp_clock); + adapter->ptp_clock = NULL; + e_dev_info("removed PHC on %s\n", + adapter->netdev->name); + } +} diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_ptp_e600.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_ptp_e600.c new file mode 100644 index 00000000000..8e57d9704e4 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_ptp_e600.c @@ -0,0 +1,1308 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 1999 - 2026 Intel Corporation */ + +#include "ixgbe.h" + +#include +#include +#include "ixgbe_ptp_e600.h" + +#define IXGBE_E600_CC_SHIFT 31 +#define IXGBE_E600_CC_MULT BIT(IXGBE_E600_CC_SHIFT) +#define IXGBE_E600_FADJ_SHIFT 9 +#define IXGBE_E600_FADJ_DENOMINATOR 15625ULL +#define IXGBE_E600_REFRESH_INTERVAL HZ +#define TSAUXC_DIS_TS_CLEAR 0x40000000 + +static const struct ptp_pin_desc e600_pin_cfg[] = { + { "SDP0", 0, 0, 0 } +}; + +/** + * ixgbe_ptp_read_phc_e600 - read PHC value + * @cc: cyclecounter structure + * + * Return: PHC nanosecond time. + */ +#ifdef HAVE_NON_CONST_CYCLECOUNTER +static u64 ixgbe_ptp_read_phc_e600(struct cyclecounter *cc) +#else +static u64 ixgbe_ptp_read_phc_e600(const struct cyclecounter *cc) +#endif +{ + struct ixgbe_adapter *adapter = + container_of(cc, struct ixgbe_adapter, hw_cc); + struct ixgbe_hw *hw = &adapter->hw; + struct timespec64 ts; + + IXGBE_READ_REG(hw, IXGBE_SYSTIMR); + ts.tv_nsec = IXGBE_READ_REG(hw, IXGBE_SYSTIML); + ts.tv_sec = IXGBE_READ_REG(hw, IXGBE_SYSTIMH); + + return (u64)timespec64_to_ns(&ts); +} + +/** + * ixgbe_ptp_update_1pps_e600 - update 1PPS start and frequency + * @adapter: the private adapter struct + */ +static void ixgbe_ptp_update_1pps_e600(struct ixgbe_adapter *adapter) +{ + struct ixgbe_hw *hw = &adapter->hw; + u32 period; + u64 start; + + period = (NSEC_PER_SEC << adapter->hw_cc.shift) / adapter->hw_cc.mult; + IXGBE_WRITE_REG(&adapter->hw, IXGBE_FREQOUT0, period / 2); + + start = IXGBE_READ_REG(hw, IXGBE_TRGTTIML0) + + IXGBE_READ_REG(hw, IXGBE_TRGTTIMH0) * NSEC_PER_SEC; + + /* Start the timer at the closest multiple of period. + * If it happens in the past, round it up. + */ + start = DIV_U64_ROUND_CLOSEST(start, period) * period; + if (start < ixgbe_ptp_read_phc_e600(&adapter->hw_cc)) + start = roundup_u64(start, period); + + start = (start << adapter->hw_cc.shift) / adapter->hw_cc.mult + + adapter->hw_tc.frac; + IXGBE_WRITE_REG(hw, IXGBE_TRGTTIML0, start % NSEC_PER_SEC); + IXGBE_WRITE_REG(hw, IXGBE_TRGTTIMH0, start / NSEC_PER_SEC); + IXGBE_WRITE_FLUSH(hw); +} + +/** + * ixgbe_ptp_adjfine_e600 - adjust PHC increment rate + * @ptp: the ptp clock structure + * @scaled_ppm: scaled parts per million adjustment from base + * + * Adjust the frequency of the PTP timecounter by the indicated scaled_ppm + * from the base frequency. + * + * Scaled parts per million is ppm with a 16-bit binary fractional field. + * + * Return: 0 on success. + */ +static int ixgbe_ptp_adjfine_e600(struct ptp_clock_info *ptp, long scaled_ppm) +{ + struct ixgbe_adapter *adapter = container_of(ptp, struct ixgbe_adapter, + ptp_caps); + unsigned long flags; + s64 adj; + + adj = (s64)scaled_ppm << IXGBE_E600_FADJ_SHIFT; + adj = div_s64(adj, IXGBE_E600_FADJ_DENOMINATOR); + + spin_lock_irqsave(&adapter->tmreg_lock, flags); + timecounter_read(&adapter->hw_tc); + adapter->hw_cc.mult = IXGBE_E600_CC_MULT + adj; + spin_unlock_irqrestore(&adapter->tmreg_lock, flags); + + ixgbe_ptp_update_1pps_e600(adapter); + + return 0; +} + +#ifndef HAVE_PTP_CLOCK_INFO_ADJFINE +/** + * ixgbe_ptp_adjfreq_e600 - Adjust the frequency of the clock + * @info: the driver's PTP info structure + * @ppb: Parts per billion adjustment from the base + * + * Adjust the frequency of the clock by the indicated parts per billion from the + * base frequency. + * + * Return: 0 on success. + */ +static int ixgbe_ptp_adjfreq_e600(struct ptp_clock_info *info, s32 ppb) +{ + long scaled_ppm; + + /* + * We want to calculate + * + * scaled_ppm = ppb * 2^16 / 1000 + * + * which simplifies to + * + * scaled_ppm = ppb * 2^13 / 125 + */ + scaled_ppm = ((long)ppb << 13) / 125; + return ixgbe_ptp_adjfine_e600(info, scaled_ppm); +} + +#endif +/** + * ixgbe_ptp_gettime_e600 - get PHC time and optional system timestamp + * @ptp: the ptp clock structure + * @ts: timespec64 structure to hold the current time value + * + * Return: 0 on success. + */ +static int ixgbe_ptp_gettime_e600(struct ptp_clock_info *ptp, + struct timespec64 *ts) +{ + struct ixgbe_adapter *adapter = container_of(ptp, struct ixgbe_adapter, + ptp_caps); + unsigned long flags; + u64 ns; + + spin_lock_irqsave(&adapter->tmreg_lock, flags); + ns = timecounter_read(&adapter->hw_tc); + spin_unlock_irqrestore(&adapter->tmreg_lock, flags); + *ts = ns_to_timespec64(ns); + + return 0; +} + +/** + * ixgbe_ptp_setup_sdp_e600 + * @adapter: private adapter structure + * @rq: periodic output request + * @on: true to enable SDP output, false otherwise + * + * Enable or disable a clock output signal on SDP0 for E600 hardware. + * + * Use the target time feature to align the output signal on the next full + * second. + * + * Return: 0 on success, negative error code otherwise + */ +static int ixgbe_ptp_setup_sdp_e600(struct ixgbe_adapter *adapter, + struct ptp_perout_request *rq, bool on) +{ + struct ixgbe_hw *hw = &adapter->hw; + u32 period, esdp, tsauxc, tssdp; + u64 clk, start, phase; + struct timespec64 ts; + int err; + +#ifdef PTP_PEROUT_PHASE + if (rq->flags & ~PTP_PEROUT_PHASE) + return -EOPNOTSUPP; +#else /* !PTP_PEROUT_PHASE */ + if (rq->flags) + return -EOPNOTSUPP; +#endif /* PTP_PEROUT_PHASE */ + + /* Disable the pin first. */ + IXGBE_WRITE_REG(hw, IXGBE_TSAUXC, 0x0); + IXGBE_WRITE_FLUSH(hw); + + period = rq->period.sec * NSEC_PER_SEC + rq->period.nsec; + if (!on || !period) + return 0; + + if (period != NSEC_PER_SEC) { + e_dev_err("CLK Period != 1s is not supported\n"); + return -EINVAL; + } + + start = rq->start.sec * NSEC_PER_SEC + rq->start.nsec; + +#ifdef PTP_PEROUT_PHASE + /* If PTP_PEROUT_PHASE is set, rq has phase instead of start time. */ + if (rq->flags & PTP_PEROUT_PHASE) + phase = start; + else +#endif /* PTP_PEROUT_PHASE */ + div64_u64_rem(start, period, &phase); + + if (phase % NSEC_PER_SEC != 0) { + e_dev_err("Start/phase not on a second boundary is not supported\n"); + return -EINVAL; + } + + /* Convert 1PPS output frequency and start time with cyclecounter + * params. + */ + period = (NSEC_PER_SEC << adapter->hw_cc.shift) / adapter->hw_cc.mult; + start = (start << adapter->hw_cc.shift) / adapter->hw_cc.mult + + adapter->hw_tc.frac; + + /* If we have only phase or start time is in the past, start the timer + * at the next multiple of period, maintaining phase at least 0.1 second + * from now, so we have time to write it to HW. + */ + err = ixgbe_ptp_gettime_e600(&adapter->ptp_caps, &ts); + if (err) + return err; + clk = (u64)timespec64_to_ns(&ts) + NSEC_PER_MSEC * 100; +#ifdef PTP_PEROUT_PHASE + if (rq->flags & PTP_PEROUT_PHASE || start <= clk) +#else /* !PTP_PEROUT_PHASE */ + if (start <= clk) +#endif /* PTP_PEROUT_PHASE */ + start = roundup_u64(clk, period) + phase; + + /* Write half of the period (50% duty cycle). */ + IXGBE_WRITE_REG(hw, IXGBE_FREQOUT0, period / 2); + IXGBE_WRITE_REG(hw, IXGBE_TRGTTIML0, start % NSEC_PER_SEC); + IXGBE_WRITE_REG(hw, IXGBE_TRGTTIMH0, start / NSEC_PER_SEC); + + /* Enable the SDP0 pin as output. */ + esdp = IXGBE_READ_REG(hw, IXGBE_ESDP); + esdp |= IXGBE_ESDP_SDP0_DIR | IXGBE_ESDP_SDP0_NATIVE; + IXGBE_WRITE_REG(hw, IXGBE_ESDP, esdp); + + tssdp = IXGBE_TSSDP_TS_SDP0_EN | IXGBE_TSSDP_TS_SDP0_CLK0; + IXGBE_WRITE_REG(hw, IXGBE_TSSDP, tssdp); + + /* Enable the Clock Out feature on SDP0, and use Target Time 0 to + * enable generation of interrupts on the clock change. + */ + tsauxc = IXGBE_TSAUXC_EN_CLK | IXGBE_TSAUXC_ST0 | IXGBE_TSAUXC_EN_TT0 | + IXGBE_TSAUXC_SDP0_INT | TSAUXC_DIS_TS_CLEAR; + IXGBE_WRITE_REG(hw, IXGBE_TSAUXC, tsauxc); + + IXGBE_WRITE_FLUSH(hw); + + return 0; +} + +/** + * ixgbe_ptp_verify_pin_e600 - verify if pin supports requested pin function + * @info: the driver's PTP info structure + * @pin: pin index + * @func: assigned function + * @chan: assigned channel + * + * Return: 0 on success, -EOPNOTSUPP when function is not supported. + */ +static int ixgbe_ptp_verify_pin_e600(struct ptp_clock_info *info, + unsigned int pin, + enum ptp_pin_function func, + unsigned int chan) +{ + /* Is assigned function allowed? */ + switch (func) { + case PTP_PF_PEROUT: + case PTP_PF_NONE: + break; + default: + return -EOPNOTSUPP; + } + + return 0; +} + +/** + * ixgbe_ptp_gpio_enable_e600 - Enable/disable ancillary features of PHC + * @info: the driver's PTP info structure + * @rq: the requested feature to change + * @on: enable/disable flag + * + * Return: 0 on success, negative error code otherwise. + */ +static int ixgbe_ptp_gpio_enable_e600(struct ptp_clock_info *info, + struct ptp_clock_request *rq, int on) +{ + struct ixgbe_adapter *adapter = container_of(info, struct ixgbe_adapter, + ptp_caps); + + switch (rq->type) { + case PTP_CLK_REQ_PEROUT: + { + int err = ixgbe_ptp_setup_sdp_e600(adapter, &rq->perout, on); + + if (!err && on) + adapter->flags2 |= IXGBE_FLAG2_PTP_PPS_ENABLED; + else + adapter->flags2 &= ~IXGBE_FLAG2_PTP_PPS_ENABLED; + + return err; + } + default: + return -EOPNOTSUPP; + } +} + +/** + * ixgbe_ptp_settime_e600 - set PHC time + * @ptp: the ptp clock structure + * @ts: the timespec containing the new time + * + * Return: 0 on success. + */ +static int ixgbe_ptp_settime_e600(struct ptp_clock_info *ptp, + const struct timespec64 *ts) +{ + struct ixgbe_adapter *adapter = container_of(ptp, struct ixgbe_adapter, + ptp_caps); + u64 ns = timespec64_to_ns(ts); + unsigned long flags; + + spin_lock_irqsave(&adapter->tmreg_lock, flags); + timecounter_init(&adapter->hw_tc, &adapter->hw_cc, ns); + spin_unlock_irqrestore(&adapter->tmreg_lock, flags); + + ixgbe_ptp_update_1pps_e600(adapter); + + return 0; +} + +#ifndef HAVE_PTP_CLOCK_INFO_GETTIME64 +/** + * ixgbe_ptp_gettime32_e600 - get PHC time + * @ptp: the ptp clock structure + * @ts: timespec64 structure to hold the current time value + * + * Return: 0 on success. + */ +static int ixgbe_ptp_gettime32_e600(struct ptp_clock_info *ptp, + struct timespec *ts) +{ + struct timespec64 ts64; + int err; + + err = ixgbe_ptp_gettime_e600(ptp, &ts64); + if (err) + return err; + + *ts = timespec64_to_timespec(ts64); + + return 0; +} + +/** + * ixgbe_ptp_settime_e600 - set PHC time + * @ptp: the ptp clock structure + * @ts: the timespec containing the new time + * + * Return: 0 on success. + */ +static int ixgbe_ptp_settime32_e600(struct ptp_clock_info *ptp, + const struct timespec *ts) +{ + struct timespec64 ts64 = timespec_to_timespec64(*ts); + + return ixgbe_ptp_settime_e600(ptp, &ts64); +} +#endif + +/** + * ixgbe_ptp_adjtime_e600 - adjust time by a specified delta + * @ptp: the ptp clock structure + * @delta: offset to adjust the cycle counter by + * + * Return: 0 on success. + */ +static int ixgbe_ptp_adjtime_e600(struct ptp_clock_info *ptp, s64 delta) +{ + struct ixgbe_adapter *adapter = container_of(ptp, struct ixgbe_adapter, + ptp_caps); + unsigned long flags; + + spin_lock_irqsave(&adapter->tmreg_lock, flags); + timecounter_adjtime(&adapter->hw_tc, delta); + spin_unlock_irqrestore(&adapter->tmreg_lock, flags); + + ixgbe_ptp_update_1pps_e600(adapter); + + return 0; +} + +/** + * ixgbe_ptp_cfg_phy_timestamping_e610 - configure PTP timestamping on the PHY + * @adapter: pointer to the adapter structure + * + * This function is intended only for E610 PHY. + */ +static void ixgbe_ptp_cfg_phy_timestamping_e610(struct ixgbe_adapter *adapter) +{ + struct ixgbe_ptp_e600 *ptp = &adapter->ptp; + struct ixgbe_hw *hw = &adapter->hw; + u8 ptp_request, flags; + bool enable; + s32 status; + + /* Enable only for <= 1 GB. */ + switch (adapter->link_speed) { + case IXGBE_LINK_SPEED_10_FULL: + case IXGBE_LINK_SPEED_100_FULL: + case IXGBE_LINK_SPEED_1GB_FULL: + enable = true; + break; + default: + enable = false; + break; + } + + status = ixgbe_get_ptp_by_phy(hw, &ptp_request, &flags, + &ptp->max_drift_threshold); + if (status) { + e_dev_err("PTP by PHY get failed, status=%d\n", status); + return; + } + + ptp->ptp_by_phy_ena = ptp_request; + + /* Don't reconfigure if already set correctly. */ + if (enable == ptp_request) + goto skip_set; + + if (adapter->ptp.vlan_ena) + flags = FIELD_PREP(IXGBE_SET_PTP_BY_PHY_ETHERTYPE_M, + IXGBE_SET_PTP_BY_PHY_ETHERTYPE_VLAN_TAG); + else + flags = FIELD_PREP(IXGBE_SET_PTP_BY_PHY_ETHERTYPE_M, + IXGBE_SET_PTP_BY_PHY_ETHERTYPE_NO_VLAN_TAG); + + status = ixgbe_set_ptp_by_phy(hw, enable, flags); + if (status) { + e_dev_err("PTP by PHY set failed, status=%d\n", status); + return; + } + +skip_set: + if (!enable) { + ptp->ptp_by_phy_ena = false; + return; + } + + /* Clear timestamping status registers. */ + IXGBE_WRITE_REG(hw, PROXY_TX_STS, 0); + IXGBE_WRITE_REG(hw, PROXY_RX_STS, 0); + + ptp_request = IXGBE_SET_PTP_BY_PHY_PTP_REQ_SET_PHY_PARAMS; + status = ixgbe_set_ptp_by_phy(hw, ptp_request, flags); + if (status) + e_dev_err("PTP by PHY set PHY params failed, status=%d\n", + status); + + ptp_request = IXGBE_SET_PTP_BY_PHY_PTP_REQ_TOD_INIT; + status = ixgbe_set_ptp_by_phy(hw, ptp_request, 0); + if (status) { + e_dev_err("PTP by PHY ToD init failed, status=%d\n", status); + } else { + ptp->ptp_by_phy_ena = true; +#ifdef HAVE_PTP_CANCEL_WORKER_SYNC + ptp_schedule_worker(adapter->ptp_clock, 0); +#else /* HAVE_PTP_CANCEL_WORKER_SYNC */ + kthread_mod_delayed_work(ptp->ptp_kworker, &ptp->ptp_aux_work, + 0); +#endif /* !HAVE_PTP_CANCEL_WORKER_SYNC */ + } +} + +/** + * ixgbe_ptp_clear_tx_timestamp_e600 - clear Tx timestamp state + * @adapter: the private adapter structure + * + * This function should be called whenever the state related to a Tx timestamp + * needs to be cleared. This helps ensure that all related bits are reset for + * the next Tx timestamp event. + */ +static void ixgbe_ptp_clear_tx_timestamp_e600(struct ixgbe_adapter *adapter) +{ + IXGBE_READ_REG(&adapter->hw, IXGBE_TXSTMPH); + if (adapter->ptp_tx_skb) { + dev_kfree_skb_any(adapter->ptp_tx_skb); + adapter->ptp_tx_skb = NULL; + } + clear_bit_unlock(__IXGBE_PTP_TX_IN_PROGRESS, adapter->state); +} + +/** + * ixgbe_ptp_is_tx_ptp - check if packet is a PTP packet + * @adapter: the private adapter struct + * @skb: the packet + * + * Return: true if packet is a PTP packet, false otherwise. + */ +bool ixgbe_ptp_is_tx_ptp(struct ixgbe_adapter *adapter, struct sk_buff *skb) +{ + unsigned int ptp_class; + struct ptp_header *hdr; + + if (likely(!adapter->ptp.ptp_by_phy_ena)) + return false; + + ptp_class = ptp_classify_raw(skb); + if (likely(ptp_class == PTP_CLASS_NONE)) + return false; + + skb_reset_mac_header(skb); + hdr = ptp_parse_header(skb, ptp_class); + + /* Clear Tx TS bit if it's a PTP packet with invalid header. */ + if (!hdr) + clear_bit_unlock(__IXGBE_PTP_TX_IN_PROGRESS, adapter->state); + else + adapter->ptp.ptp_seq_id = ntohs(hdr->sequence_id); + + return true; +} + +/** + * ixgbe_ptp_tx_phytstamp_e600 - read the PHY Tx timestamp from the register + * @adapter: the private adapter struct + * @sts: value of the status register + * + * Return: + * * %0 - success + * * %-ENXIO - Tx TS not in progress + * * %-EINVAL - invalid sequence ID + * * %other - FW error code + */ +static int ixgbe_ptp_tx_phytstamp_e600(struct ixgbe_adapter *adapter, u32 sts) +{ + struct sk_buff *skb = adapter->ptp_tx_skb; + struct skb_shared_hwtstamps shhwtstamps; + struct ixgbe_hw *hw = &adapter->hw; + u64 tstamp; + int err; + + /* Return error if PTP Tx TS not in progress. */ + if (!test_bit(__IXGBE_PTP_TX_IN_PROGRESS, adapter->state)) { + err = -ENXIO; + goto err; + } + + err = FIELD_GET(PROXY_STS_ERR, sts); + if (err) + goto err; + + /* Incorrect sequence ID, discard the timestamp. */ + if (FIELD_GET(PROXY_STS_SEQ_ID, sts) != adapter->ptp.ptp_seq_id) { + err = -EINVAL; + goto err; + } + + tstamp = IXGBE_READ_REG(hw, PROXY_TX_TS_LOW); + tstamp |= (u64)IXGBE_READ_REG(hw, PROXY_TX_TS_HIGH) << 32; + spin_lock(&adapter->tmreg_lock); + tstamp = timecounter_cyc2time(&adapter->hw_tc, tstamp); + spin_unlock(&adapter->tmreg_lock); + + /* Notify the stack and then free the skb after we've unlocked. */ + shhwtstamps.hwtstamp = ns_to_ktime(tstamp); + skb_tstamp_tx(skb, &shhwtstamps); +err: + adapter->ptp_tx_skb = NULL; + clear_bit_unlock(__IXGBE_PTP_TX_IN_PROGRESS, adapter->state); + dev_kfree_skb_any(skb); + if (err) + adapter->tx_hwtstamp_skipped++; + + return err; +} + +/** + * ixgbe_ptp_rx_find_skb_e600 - find skb for a specified sequence ID and add + * Rx timestamp if found + * @adapter: the private adapter struct + * @seq_id: PTP packet sequence ID + * @ns: Rx timestamp + * + * Return: true if skb found, false otherwise. + */ +static bool ixgbe_ptp_rx_find_skb_e600(struct ixgbe_adapter *adapter, + u16 seq_id, u64 tstamp) +{ + struct ixgbe_rx_phy_ts_skb_e610 *rx_skb; + bool skb_found = false; + unsigned int i; + + for (i = 0; i < adapter->num_q_vectors; i++) { + struct ixgbe_q_vector *q_vector = adapter->q_vector[i]; + + spin_lock(&q_vector->ptp_skbs_lock_e600); + list_for_each_entry(rx_skb, &q_vector->ptp_skbs_e600, list) { + if (rx_skb->seq_id != seq_id) + continue; + + skb_hwtstamps(rx_skb->skb)->hwtstamp = + ns_to_ktime(tstamp); + napi_schedule(&q_vector->napi); + skb_found = true; + break; + } + spin_unlock(&q_vector->ptp_skbs_lock_e600); + + if (skb_found) + return true; + } + + return false; +} + +/** + * ixgbe_ptp_rx_complete_tstamp_e600 - complete cached PHY Rx timestamps + * @adapter: the private adapter struct + * @sts: value of the status register + * + * Return: + * * %0 - success + * * %-ENOMEM - no memory left on the device + */ +static int ixgbe_ptp_rx_complete_tstamp_e600(struct ixgbe_adapter *adapter, + u32 sts) +{ + u16 seq_id = FIELD_GET(PROXY_STS_SEQ_ID, sts); + u64 ns; + + ns = IXGBE_READ_REG(&adapter->hw, PROXY_RX_TS_LOW); + ns |= (u64)IXGBE_READ_REG(&adapter->hw, PROXY_RX_TS_HIGH) << 32; + spin_lock(&adapter->tmreg_lock); + ns = timecounter_cyc2time(&adapter->hw_tc, ns); + spin_unlock(&adapter->tmreg_lock); + + /* Try to find matching skb. If not found, cache the timestamp. */ + if (!ixgbe_ptp_rx_find_skb_e600(adapter, seq_id, ns)) { + struct ixgbe_rx_phy_ts_skb_e610 *tstamp; + + tstamp = kzalloc(sizeof(*tstamp), GFP_KERNEL); + if (!tstamp) + return -ENOMEM; + + tstamp->ns = ns; + tstamp->seq_id = seq_id; + tstamp->acquired = jiffies; + spin_lock(&adapter->ptp.rx_tstamps_lock); + list_add_tail(&tstamp->list, &adapter->ptp.rx_tstamps); + spin_unlock(&adapter->ptp.rx_tstamps_lock); + } + + return 0; +} + +/** + * ixgbe_ptp_fw_intr_e600 - handle PTP by PHY FW interrupt + * @adapter: the private adapter struct + * + * Return: + * * %0 - success + * * %-EINTR - not a Tx/Rx TS interrupt cause + * * %-ENXIO - Tx TS not in progress + * * %-ENOMEM - no memory left on the device + * * %-EINVAL - invalid sequence ID + * * %other - FW error code + */ +int ixgbe_ptp_fw_intr_e600(struct ixgbe_adapter *adapter) +{ + struct ixgbe_hw *hw = &adapter->hw; + u32 tx_sts, rx_sts; + int err = -EINTR; + + /* Handle FW Tx interrupt if status register indicates it. */ + tx_sts = IXGBE_READ_REG(hw, PROXY_TX_STS); + if (tx_sts & PROXY_STS_TS_RDY && tx_sts & PROXY_STS_TS_INT) { + err = ixgbe_ptp_tx_phytstamp_e600(adapter, tx_sts); + IXGBE_WRITE_REG(hw, PROXY_TX_STS, 0); + } else if (!(tx_sts & PROXY_STS_TS_RDY) && tx_sts & PROXY_STS_TS_INT) { + atomic_set(&adapter->ptp.reinit_phy_tod, true); +#ifdef HAVE_PTP_CANCEL_WORKER_SYNC + ptp_schedule_worker(adapter->ptp_clock, 0); +#else /* HAVE_PTP_CANCEL_WORKER_SYNC */ + kthread_mod_delayed_work(adapter->ptp.ptp_kworker, + &adapter->ptp.ptp_aux_work, 0); +#endif /* !HAVE_PTP_CANCEL_WORKER_SYNC */ + err = 0; + IXGBE_WRITE_REG(hw, PROXY_TX_STS, 0); + } + + /* Handle FW Rx interrupt if status register indicates it. */ + rx_sts = IXGBE_READ_REG(hw, PROXY_RX_STS); + if (rx_sts & PROXY_STS_TS_RDY && rx_sts & PROXY_STS_TS_INT) { + err = ixgbe_ptp_rx_complete_tstamp_e600(adapter, rx_sts); + IXGBE_WRITE_REG(hw, PROXY_RX_STS, 0); + } else if (!(rx_sts & PROXY_STS_TS_RDY) && rx_sts & PROXY_STS_TS_INT) { + IXGBE_WRITE_REG(hw, PROXY_RX_STS, 0); + } + + IXGBE_WRITE_FLUSH(hw); + return err; +} + +/** + * ixgbe_ptp_rx_complete_skb_e600 - complete held PTP skbs + * @q_vector: structure containing interrupt and ring information + * @budget: amount of work driver is allowed to do this pass, in packets + * + * This function takes PTP skbs, which were held in order to add Rx timestamp to + * them. This is necessary due to the interrupt with Rx TS coming usually after + * the driver receives the packet. + * When skb has the timestamp added it's sent further up the stack. Otherwise, + * it's removed after 500 ms timeout. + * + * Return: number of completed skbs. + */ +unsigned int ixgbe_ptp_rx_complete_skb_e600(struct ixgbe_q_vector *q_vector, + int *budget) +{ + struct ixgbe_rx_phy_ts_skb_e610 *rx_skb, *n; + unsigned int cleaned = 0; + unsigned long flags; + + spin_lock_irqsave(&q_vector->ptp_skbs_lock_e600, flags); + list_for_each_entry_safe(rx_skb, n, &q_vector->ptp_skbs_e600, list) { + unsigned long acquired = rx_skb->acquired; + + /* Flush skbs without timestamps after 500 ms. */ + if (time_is_before_jiffies(acquired + msecs_to_jiffies(500))) { + consume_skb(rx_skb->skb); + list_del(&rx_skb->list); + kfree(rx_skb); + continue; + } + + if (skb_hwtstamps(rx_skb->skb)->hwtstamp) { + napi_gro_receive(&q_vector->napi, rx_skb->skb); + list_del(&rx_skb->list); + kfree(rx_skb); + (*budget)--; + cleaned++; + if (*budget <= 0) + break; + } + } + spin_unlock_irqrestore(&q_vector->ptp_skbs_lock_e600, flags); + + return cleaned; +} + +/** + * ixgbe_ptp_rx_phytstamp_e600 - utility function to get RX tstamp PTP reserved + * field + * @q_vector: structure containing interrupt and ring information + * @skb: the packet + * @ptp_class: class of the PTP packet + * + * This function will be called by the Rx routine of the timestamp for this + * packet is stored in the buffer. + */ +void ixgbe_ptp_rx_phytstamp_e600(struct ixgbe_q_vector *q_vector, + struct sk_buff *skb, unsigned int ptp_class) +{ + struct ixgbe_rx_phy_ts_skb_e610 *tstamp, *n, *rx_skb; + struct ixgbe_adapter *adapter = q_vector->adapter; + struct ptp_header *hdr; + unsigned long flags; + __le64 val; + u16 seq_id; + + q_vector->ptp_hold_rx_skb = false; + /* Copy the bits out of the skb, and then trim the skb length. */ + skb_copy_bits(skb, skb->len - IXGBE_TS_HDR_LEN, &val, IXGBE_TS_HDR_LEN); + __pskb_trim(skb, skb->len - IXGBE_TS_HDR_LEN); + + skb_reset_mac_header(skb); + hdr = ptp_parse_header(skb, ptp_class); + if (!hdr) { + u64 ns = le64_to_cpu(val); + struct timespec64 ts = { + .tv_sec = upper_32_bits(ns), + .tv_nsec = lower_32_bits(ns) + }; + + spin_lock_irqsave(&adapter->tmreg_lock, flags); + ns = timecounter_cyc2time(&adapter->hw_tc, + timespec64_to_ns(&ts)); + spin_unlock_irqrestore(&adapter->tmreg_lock, flags); + + skb_hwtstamps(skb)->hwtstamp = ns_to_ktime(ns); + return; + } + + q_vector->ptp_hold_rx_skb = true; + skb_hwtstamps(skb)->hwtstamp = 0; + seq_id = ntohs(hdr->sequence_id); + + /* Try to find matching timestamp. If not found, cache the skb. */ + spin_lock_irqsave(&adapter->ptp.rx_tstamps_lock, flags); + list_for_each_entry_safe(tstamp, n, &adapter->ptp.rx_tstamps, list) { + /* Flush timestamps without skbs after 500 ms. */ + if (time_is_before_jiffies(tstamp->acquired + + msecs_to_jiffies(500))) { + list_del(&tstamp->list); + kfree(tstamp); + continue; + } + + if (seq_id != tstamp->seq_id) + continue; + + skb_hwtstamps(skb)->hwtstamp = ns_to_ktime(tstamp->ns); + list_del(&tstamp->list); + kfree(tstamp); + q_vector->ptp_hold_rx_skb = false; + + break; + } + spin_unlock_irqrestore(&adapter->ptp.rx_tstamps_lock, flags); + + if (!q_vector->ptp_hold_rx_skb) + return; + + /* Add skb to the list. */ + rx_skb = kzalloc(sizeof(*rx_skb), GFP_KERNEL); + if (!rx_skb) + return; + + rx_skb->skb = skb; + rx_skb->acquired = jiffies; + rx_skb->seq_id = seq_id; + spin_lock_irqsave(&q_vector->ptp_skbs_lock_e600, flags); + list_add_tail(&rx_skb->list, &q_vector->ptp_skbs_e600); + spin_unlock_irqrestore(&q_vector->ptp_skbs_lock_e600, flags); +} + +/** + * ixgbe_ptp_by_phy_set_params_e600 - configure PTP by PHY parameters + * @adapter: pointer to the adapter structure + */ +static void ixgbe_ptp_by_phy_set_params_e600(struct ixgbe_adapter *adapter) +{ + u8 ptp_request, flags; + s32 status; + + ptp_request = IXGBE_SET_PTP_BY_PHY_PTP_REQ_SET_PHY_PARAMS; + if (adapter->ptp.vlan_ena) + flags = FIELD_PREP(IXGBE_SET_PTP_BY_PHY_ETHERTYPE_M, + IXGBE_SET_PTP_BY_PHY_ETHERTYPE_VLAN_TAG); + else + flags = FIELD_PREP(IXGBE_SET_PTP_BY_PHY_ETHERTYPE_M, + IXGBE_SET_PTP_BY_PHY_ETHERTYPE_NO_VLAN_TAG); + + status = ixgbe_set_ptp_by_phy(&adapter->hw, ptp_request, flags); + if (status) + e_dev_err("PTP by PHY set PHY params failed, status=%d\n", + status); +} + +/** + * ixgbe_do_aux_work - do PTP periodic work + * @info: Driver's PTP info structure + * + * Do periodic PTP work for PTP by PHY feature. This consists of: + * - updating cached PHC time at least once per 4.3 seconds, + * - setting PTP by PHY parameters on VLAN state change, which cannot be + * performed in atomic context, + * - reinitializing PHY ToD on PHY ToD drift interrupt, which cannot be + * performed in atomic context. + * + * Reschedule work every second to have a safe margin and to ensure that cached + * PHC time never goes stale, even with OS scheduling delays. + * + * Return: delay of the next auxiliary work scheduling time (>=0) or negative + * value in case further scheduling is not required + */ +static long ixgbe_do_aux_work(struct ptp_clock_info *info) +{ + struct ixgbe_adapter *adapter = container_of(info, struct ixgbe_adapter, + ptp_caps); + struct timespec64 ts; + + ixgbe_ptp_gettime_e600(info, &ts); + + if (atomic_cmpxchg(&adapter->ptp.vlan_change, true, false)) + ixgbe_ptp_by_phy_set_params_e600(adapter); + + if (atomic_cmpxchg(&adapter->ptp.reinit_phy_tod, true, false)) { + u8 request = IXGBE_SET_PTP_BY_PHY_PTP_REQ_TOD_INIT; + s32 status; + + status = ixgbe_set_ptp_by_phy(&adapter->hw, request, 0); + if (status) + e_dev_err("PTP by PHY ToD reinit failed, status=%d\n", + status); + } + + return msecs_to_jiffies(MSEC_PER_SEC); +} + +#ifndef HAVE_PTP_CANCEL_WORKER_SYNC +static void ptp_aux_kworker(struct kthread_work *work) +{ + struct ixgbe_ptp_e600 *ptp = container_of(work, struct ixgbe_ptp_e600, + ptp_aux_work.work); + struct ixgbe_adapter *adapter = container_of(ptp, struct ixgbe_adapter, + ptp); + struct ptp_clock_info *info = &adapter->ptp_caps; + long delay; + + delay = ixgbe_do_aux_work(info); + + if (delay >= 0) + kthread_queue_delayed_work(ptp->ptp_kworker, &ptp->ptp_aux_work, + delay); +} + +#endif /* !HAVE_PTP_CANCEL_WORKER_SYNC */ +/** + * ixgbe_ptp_cfg_phy_vlan_e600 - configure PTP vlan tag timestamping on PHY + * @adapter: pointer to the adapter structure + * @enabled: true to indicate to the PHY that VLAN is enabled, false otherwise + */ +void ixgbe_ptp_cfg_phy_vlan_e600(struct ixgbe_adapter *adapter, bool enabled) +{ + if (adapter->ptp.vlan_ena == enabled) + return; + + adapter->ptp.vlan_ena = enabled; + if (!adapter->ptp.ptp_by_phy_ena) + return; + + /* Schedule worker to handle VLAN change. */ + atomic_set(&adapter->ptp.vlan_change, true); +#ifdef HAVE_PTP_CANCEL_WORKER_SYNC + ptp_schedule_worker(adapter->ptp_clock, 0); +#else /* HAVE_PTP_CANCEL_WORKER_SYNC */ + kthread_mod_delayed_work(adapter->ptp.ptp_kworker, + &adapter->ptp.ptp_aux_work, 0); +#endif /* !HAVE_PTP_CANCEL_WORKER_SYNC */ +} + +/** + * ixgbe_ptp_set_timestamp_mode_e600 - setup the hardware for the requested mode + * @adapter: the private ixgbe adapter structure + * @config: the hwtstamp configuration requested + * + * Outgoing time stamping can be enabled and disabled. Play nice and + * disable it when requested, although it shouldn't cause any overhead + * when no packet needs it. At most one packet in the queue may be + * marked for time stamping, otherwise it would be impossible to tell + * for sure to which packet the hardware time stamp belongs. + * + * Incoming time stamping has to be configured via the hardware + * filters. Not all combinations are supported, in particular event + * type has to be specified. Matching the kind of event packet is + * not supported, with the exception of "all V2 events regardless of + * level 2 or 4". + * + * Since hardware always timestamps Path delay packets when timestamping V2 + * packets, regardless of the type specified in the register, only use V2 + * Event mode. This more accurately tells the user what the hardware is going + * to do anyways. + * + * Note: this may modify the hwtstamp configuration towards a more general + * mode, if required to support the specifically requested mode. + * + * Return: 0 on success, -EINVAL on invalid flags, -ERANGE on invalid filter. + */ +int ixgbe_ptp_set_timestamp_mode_e600(struct ixgbe_adapter *adapter, + struct hwtstamp_config *config) +{ + int rx_mtrl_filter = HWTSTAMP_FILTER_NONE; + struct ixgbe_hw *hw = &adapter->hw; + u32 val; + + /* Reserved for future extensions. */ + if (config->flags) + return -EINVAL; + + /* Enable/disable TX. */ + val = IXGBE_READ_REG(hw, IXGBE_TSYNCTXCTL); + switch (config->tx_type) { + case HWTSTAMP_TX_OFF: + val &= ~IXGBE_TSYNCTXCTL_ENABLED; + break; + case HWTSTAMP_TX_ON: + val |= IXGBE_TSYNCTXCTL_ENABLED; + break; + default: + return -ERANGE; + } + IXGBE_WRITE_REG(hw, IXGBE_TSYNCTXCTL, val); + + /* Enable/disable RX. */ + val = IXGBE_READ_REG(hw, IXGBE_TSYNCRXCTL); + switch (config->rx_filter) { + case HWTSTAMP_FILTER_PTP_V1_L4_SYNC: + case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ: + case HWTSTAMP_FILTER_PTP_V2_EVENT: + case HWTSTAMP_FILTER_PTP_V2_L2_EVENT: + case HWTSTAMP_FILTER_PTP_V2_L4_EVENT: + case HWTSTAMP_FILTER_PTP_V2_SYNC: + case HWTSTAMP_FILTER_PTP_V2_L2_SYNC: + case HWTSTAMP_FILTER_PTP_V2_L4_SYNC: + case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ: + case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ: + case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ: + case HWTSTAMP_FILTER_PTP_V1_L4_EVENT: +#ifdef HAVE_HWTSTAMP_FILTER_NTP_ALL + case HWTSTAMP_FILTER_NTP_ALL: +#endif /* HAVE_HWTSTAMP_FILTER_NTP_ALL */ + case HWTSTAMP_FILTER_ALL: + /* Per-packet timestamping only works if the filter is set to + * all packets. Since this is desired, always timestamp + * all packets as long as any Rx filter was configured. + * + * Enable timestamping all packets only if at least some packets + * were requested. Otherwise, play nice and disable + * timestamping. + */ + val = IXGBE_TSYNCRXCTL_ENABLED | + IXGBE_TSYNCRXCTL_TYPE_ALL | + IXGBE_TSYNCRXCTL_TSIP_UT_EN; + + /* Cache original Rx filter for RXMTRL. */ + rx_mtrl_filter = config->rx_filter; + config->rx_filter = HWTSTAMP_FILTER_ALL; + adapter->flags |= IXGBE_FLAG_RX_HWTSTAMP_ENABLED; + adapter->flags &= ~IXGBE_FLAG_RX_HWTSTAMP_IN_REGISTER; + break; + case HWTSTAMP_FILTER_NONE: + default: + val &= ~(IXGBE_TSYNCRXCTL_ENABLED | IXGBE_TSYNCRXCTL_TYPE_MASK); + adapter->flags &= ~(IXGBE_FLAG_RX_HWTSTAMP_ENABLED | + IXGBE_FLAG_RX_HWTSTAMP_IN_REGISTER); + if (config->rx_filter != HWTSTAMP_FILTER_NONE) { + /* Register RXMTRL must be set in order to do V1 + * packets, therefore it is not possible to timestamp + * both V1 Sync and Delay_Req messages unless hardware + * supports timestamping all packets => return error. + */ + config->rx_filter = HWTSTAMP_FILTER_NONE; + return -ERANGE; + } + } + IXGBE_WRITE_REG(hw, IXGBE_TSYNCRXCTL, val); + + /* Define which PTP packets are timestamped. */ + switch (rx_mtrl_filter) { + case HWTSTAMP_FILTER_NONE: + val = 0; + break; + case HWTSTAMP_FILTER_PTP_V1_L4_SYNC: + val = IXGBE_RXMTRL_V1_SYNC_MSG | PTP_EV_PORT << 16; + break; + case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ: + val = IXGBE_RXMTRL_V1_DELAY_REQ_MSG | PTP_EV_PORT << 16; + break; + default: + val = PTP_EV_PORT << 16; + } + IXGBE_WRITE_REG(hw, IXGBE_RXMTRL, val); + + /* Define ethertype filter for timestamping L2 packets. */ + if (config->rx_filter != HWTSTAMP_FILTER_NONE) + IXGBE_WRITE_REG(hw, IXGBE_ETQF(IXGBE_ETQF_FILTER_1588), + (IXGBE_ETQF_FILTER_EN | + IXGBE_ETQF_1588 | + ETH_P_1588)); + else + IXGBE_WRITE_REG(hw, IXGBE_ETQF(IXGBE_ETQF_FILTER_1588), 0); + + IXGBE_WRITE_FLUSH(hw); + + ixgbe_ptp_clear_tx_timestamp_e600(adapter); + return 0; +} + +/** + * ixgbe_ptp_link_up_e600 - perform PTP adjustments on a link up + * @adapter: pointer to the adapter structure + */ +void ixgbe_ptp_link_up_e600(struct ixgbe_adapter *adapter) +{ + if (adapter->hw.dev_caps.common_cap.ptp_by_phy_ll) { + ixgbe_ptp_cfg_phy_timestamping_e610(adapter); + /* Sleep for at least 2 seconds for the PHY to reset, so that + * the driver does not report any link flaps. + */ + msleep(MSEC_PER_SEC * 3); + } +} + +static const struct cyclecounter ixgbe_ptp_cc_e600 = { + .read = ixgbe_ptp_read_phc_e600, + .mask = CYCLECOUNTER_MASK(32), + .mult = IXGBE_E600_CC_MULT, + .shift = IXGBE_E600_CC_SHIFT, +}; + +/** + * ixgbe_ptp_start_clock_e600 - create the cycle counter from hw + * @adapter: pointer to the adapter structure + * + * This function should be called to set the proper values for the TIMINCA + * register and tell the cyclecounter structure what the tick rate of SYSTIME + * is. It does not directly modify SYSTIME registers or the timecounter + * structure. It should be called whenever a new TIMINCA value is necessary, + * such as during initialization or when the link speed changes. + */ +static void ixgbe_ptp_start_clock_e600(struct ixgbe_adapter *adapter) +{ + struct ixgbe_hw *hw = &adapter->hw; + unsigned long flags; + u32 tsauxc; + + adapter->hw_cc = ixgbe_ptp_cc_e600; + /* enable SYSTIME counter */ + tsauxc = IXGBE_READ_REG(hw, IXGBE_TSAUXC); + IXGBE_WRITE_REG(hw, IXGBE_TSAUXC, + tsauxc | IXGBE_TSAUXC_DISABLE_SYSTIME); + IXGBE_WRITE_REG(hw, IXGBE_TIMINCA, 0); + IXGBE_WRITE_REG(hw, IXGBE_SYSTIMR, 0); + IXGBE_WRITE_REG(hw, IXGBE_SYSTIML, 0); + IXGBE_WRITE_REG(hw, IXGBE_SYSTIMH, 0); + IXGBE_WRITE_REG(hw, IXGBE_TSAUXC, + tsauxc & ~IXGBE_TSAUXC_DISABLE_SYSTIME); + IXGBE_WRITE_REG(hw, IXGBE_TSIM, IXGBE_TSIM_TXTS); + IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_TIMESYNC); + IXGBE_WRITE_FLUSH(hw); + + spin_lock_irqsave(&adapter->tmreg_lock, flags); + timecounter_init(&adapter->hw_tc, &adapter->hw_cc, + ktime_get_real_ns()); + spin_unlock_irqrestore(&adapter->tmreg_lock, flags); +} + +/** + * ixgbe_ptp_reset_e600 + * @adapter: the ixgbe private board structure + * + * When the MAC resets, all the hardware bits for timesync are reset. This + * function is used to re-enable the device for PTP based on current settings. + * We do lose the current clock time, so just reset the cyclecounter to the + * system real clock time. + * + * This function will maintain hwtstamp_config settings, and resets the SDP + * output if it was enabled. + */ +void ixgbe_ptp_reset_e600(struct ixgbe_adapter *adapter) +{ + /* reset the hardware timestamping mode */ + ixgbe_ptp_start_clock_e600(adapter); + ixgbe_ptp_set_timestamp_mode_e600(adapter, &adapter->tstamp_config); +} + +/** + * ixgbe_ptp_create_clock - create a PTP clock device + * @adapter: the ixgbe private adapter structure + * + * This function performs setup of the user entry point function table and + * initializes the PTP clock device, which is used to access the clock-like + * features of the PTP core. It will be called by ixgbe_ptp_init, and may + * reuse a previously initialized clock (such as during a suspend/resume + * cycle). + * + * Return: 0 on success, negative error code otherwise. + */ +static long ixgbe_ptp_create_clock_e600(struct ixgbe_adapter *adapter) +{ + struct ptp_clock_info *info = &adapter->ptp_caps; + struct net_device *netdev = adapter->netdev; + long err; + + /* Do nothing if we already have a clock device. */ + if (!IS_ERR_OR_NULL(adapter->ptp_clock)) + return 0; + + snprintf(adapter->ptp_caps.name, 16, "%s", netdev->name); + info->owner = THIS_MODULE; + info->max_adj = 500000000; +#ifdef HAVE_PTP_CLOCK_INFO_ADJFINE + info->adjfine = ixgbe_ptp_adjfine_e600; +#else + info->adjfreq = ixgbe_ptp_adjfreq_e600; +#endif + info->adjtime = ixgbe_ptp_adjtime_e600; +#ifdef HAVE_PTP_CLOCK_INFO_GETTIME64 + info->gettime64 = ixgbe_ptp_gettime_e600; + info->settime64 = ixgbe_ptp_settime_e600; +#else /* HAVE_PTP_CLOCK_INFO_GETTIME64 */ + info->gettime = ixgbe_ptp_gettime32_e600; + info->settime = ixgbe_ptp_settime32_e600; +#endif /* !HAVE_PTP_CLOCK_INFO_GETTIME64 */ +#ifdef HAVE_PTP_CANCEL_WORKER_SYNC + info->do_aux_work = ixgbe_do_aux_work; +#endif /* HAVE_PTP_CANCEL_WORKER_SYNC */ + info->n_pins = 1; + info->n_per_out = 1; + info->pin_config = adapter->ptp.pin_config; + info->enable = ixgbe_ptp_gpio_enable_e600; + info->verify = ixgbe_ptp_verify_pin_e600; + + adapter->ptp_clock = ptp_clock_register(&adapter->ptp_caps, + ixgbe_pf_to_dev(adapter)); + if (IS_ERR(adapter->ptp_clock)) { + err = PTR_ERR(adapter->ptp_clock); + adapter->ptp_clock = NULL; + e_dev_err("ptp_clock_register failed\n"); + return err; + } else if (adapter->ptp_clock) { + e_dev_info("Registered PHC device on %s\n", netdev->name); + } + + return 0; +} + +/** + * ixgbe_ptp_init_e600 - initialize PTP support on HW and SW + * @adapter: the ixgbe private adapter structure + * + * This function performs the required steps for enabling PTP support. + */ +void ixgbe_ptp_init_e600(struct ixgbe_adapter *adapter) +{ + adapter->tstamp_config.rx_filter = HWTSTAMP_FILTER_NONE; + adapter->tstamp_config.tx_type = HWTSTAMP_TX_OFF; + + adapter->ptp.pin_config[0] = e600_pin_cfg[0]; + spin_lock_init(&adapter->tmreg_lock); + INIT_LIST_HEAD(&adapter->ptp.rx_tstamps); + spin_lock_init(&adapter->ptp.rx_tstamps_lock); + + /* Obtain a PTP device, or re-use an existing device. */ + if (ixgbe_ptp_create_clock_e600(adapter)) + return; + + INIT_WORK(&adapter->ptp_tx_work, ixgbe_ptp_tx_hwtstamp_work); + +#ifndef HAVE_PTP_CANCEL_WORKER_SYNC + kthread_init_delayed_work(&adapter->ptp.ptp_aux_work, ptp_aux_kworker); + adapter->ptp.ptp_kworker = kthread_create_worker(0, "ixgbe_ptp"); + if (IS_ERR(adapter->ptp.ptp_kworker)) { + e_dev_err("Failed to create ptp aux_worker err=%li\n", + PTR_ERR(adapter->ptp.ptp_kworker)); + return; + } +#endif /* !HAVE_PTP_CANCEL_WORKER_SYNC */ + ixgbe_ptp_reset_e600(adapter); +#ifdef HAVE_PTP_CANCEL_WORKER_SYNC + ptp_schedule_worker(adapter->ptp_clock, 0); +#else /* HAVE_PTP_CANCEL_WORKER_SYNC */ + kthread_mod_delayed_work(adapter->ptp.ptp_kworker, + &adapter->ptp.ptp_aux_work, 0); +#endif /* !HAVE_PTP_CANCEL_WORKER_SYNC */ + + set_bit(__IXGBE_PTP_RUNNING, adapter->state); +} + +/** + * ixgbe_ptp_release_e600 - release PTP resources + * @adapter: pointer to adapter struct + * + * Completely destroy the PTP device, should only be called when the device is + * being fully closed. + */ +void ixgbe_ptp_release_e600(struct ixgbe_adapter *adapter) +{ + struct ptp_perout_request rq = {}; + + if (!test_and_clear_bit(__IXGBE_PTP_RUNNING, adapter->state)) + return; + + /* Disable SDP. */ + ixgbe_ptp_setup_sdp_e600(adapter, &rq, false); + + /* Ensure that we cancel any pending PTP Tx work item in progress. */ + cancel_work_sync(&adapter->ptp_tx_work); +#ifdef HAVE_PTP_CANCEL_WORKER_SYNC + ptp_cancel_worker_sync(adapter->ptp_clock); +#else /* !HAVE_PTP_CANCEL_WORKER_SYNC */ + kthread_cancel_delayed_work_sync(&adapter->ptp.ptp_aux_work); +#endif /* HAVE_PTP_CANCEL_WORKER_SYNC */ + + ixgbe_ptp_clear_tx_timestamp_e600(adapter); + + if (adapter->ptp_clock) { + ptp_clock_unregister(adapter->ptp_clock); + adapter->ptp_clock = NULL; + e_dev_info("Removed PHC device on %s\n", adapter->netdev->name); + } +} diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_ptp_e600.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_ptp_e600.h new file mode 100644 index 00000000000..3762fda5fe1 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_ptp_e600.h @@ -0,0 +1,20 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 1999 - 2026 Intel Corporation */ + +#ifndef _IXGBE_PTP_E600_H_ +#define _IXGBE_PTP_E600_H_ + +#include + +unsigned int ixgbe_ptp_rx_complete_skb_e600(struct ixgbe_q_vector *q_vector, + int *budget); +int ixgbe_ptp_set_timestamp_mode_e600(struct ixgbe_adapter *adapter, + struct hwtstamp_config *config); +void ixgbe_ptp_cfg_phy_vlan_e600(struct ixgbe_adapter *adapter, bool enabled); +bool ixgbe_ptp_is_tx_ptp(struct ixgbe_adapter *adapter, struct sk_buff *skb); +void ixgbe_ptp_link_up_e600(struct ixgbe_adapter *adapter); +void ixgbe_ptp_reset_e600(struct ixgbe_adapter *adapter); +void ixgbe_ptp_init_e600(struct ixgbe_adapter *adapter); +void ixgbe_ptp_release_e600(struct ixgbe_adapter *adapter); + +#endif /* _IXGBE_PTP_E600_H_ */ diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_sriov.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_sriov.c new file mode 100644 index 00000000000..342e8db9a8d --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_sriov.c @@ -0,0 +1,2238 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 1999 - 2026 Intel Corporation */ + +#include "ixgbe.h" + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "ixgbe_type.h" +#include "ixgbe_sriov.h" + +static void ixgbe_set_vf_rx_tx(struct ixgbe_adapter *adapter, int vf); + +#ifdef CONFIG_PCI_IOV +static inline void ixgbe_alloc_vf_macvlans(struct ixgbe_adapter *adapter, + unsigned int num_vfs) +{ + struct ixgbe_hw *hw = &adapter->hw; + struct vf_macvlans *mv_list; + int num_vf_macvlans, i; + + num_vf_macvlans = hw->mac.num_rar_entries - + (IXGBE_MAX_PF_MACVLANS + 1 + num_vfs); + if (!num_vf_macvlans) + return; + + mv_list = kcalloc(num_vf_macvlans, sizeof(struct vf_macvlans), + GFP_KERNEL); + if (mv_list) { + /* Initialize list of VF macvlans */ + INIT_LIST_HEAD(&adapter->vf_mvs.l); + for (i = 0; i < num_vf_macvlans; i++) { + mv_list[i].vf = -1; + mv_list[i].free = true; + list_add(&mv_list[i].l, &adapter->vf_mvs.l); + } + adapter->mv_list = mv_list; + } +} + +static int __ixgbe_enable_sriov(struct ixgbe_adapter *adapter, + unsigned int num_vfs) +{ + struct ixgbe_hw *hw = &adapter->hw; + int i; + +#ifdef HAVE_XDP_SUPPORT + if (adapter->xdp_prog) { + e_warn(probe, "SRIOV is not supported with XDP\n"); + return -EINVAL; + } +#endif /* HAVE_XDP_SUPPORT */ + + adapter->flags |= IXGBE_FLAG_SRIOV_ENABLED; + + /* Enable VMDq flag so device will be set in VM mode */ + adapter->flags |= IXGBE_FLAG_VMDQ_ENABLED; + if (!adapter->ring_feature[RING_F_VMDQ].limit) + adapter->ring_feature[RING_F_VMDQ].limit = 1; + + /* Allocate memory for per VF control structures */ + adapter->vfinfo = kcalloc(num_vfs, sizeof(struct vf_data_storage), + GFP_KERNEL); + if (!adapter->vfinfo) + return -ENOMEM; + + /* Initialize default switching mode VEB */ + IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, IXGBE_PFDTXGSWC_VT_LBEN); + + /* set adapter->num_vfs only after allocating vfinfo to avoid + * NULL pointer issues when accessing adapter->vfinfo + */ + adapter->num_vfs = num_vfs; + + ixgbe_alloc_vf_macvlans(adapter, num_vfs); + + adapter->ring_feature[RING_F_VMDQ].offset = num_vfs; + + /* enable L2 switch and replication */ + adapter->flags |= IXGBE_FLAG_SRIOV_L2SWITCH_ENABLE | + IXGBE_FLAG_SRIOV_REPLICATION_ENABLE; + + /* limit traffic classes based on VFs enabled */ + if ((adapter->hw.mac.type == ixgbe_mac_82599EB) && + (adapter->num_vfs < 16)) { + adapter->dcb_cfg.num_tcs.pg_tcs = + IXGBE_DCB_MAX_TRAFFIC_CLASS; + adapter->dcb_cfg.num_tcs.pfc_tcs = + IXGBE_DCB_MAX_TRAFFIC_CLASS; + } else if (adapter->num_vfs < 32) { + adapter->dcb_cfg.num_tcs.pg_tcs = 4; + adapter->dcb_cfg.num_tcs.pfc_tcs = 4; + } else { + adapter->dcb_cfg.num_tcs.pg_tcs = 1; + adapter->dcb_cfg.num_tcs.pfc_tcs = 1; + } + adapter->dcb_cfg.vt_mode = true; + +#ifdef IXGBE_DISABLE_VF_MQ + /* We do not support RSS w/ SR-IOV */ + adapter->ring_feature[RING_F_RSS].limit = 1; +#endif + + /* Disable RSC when in SR-IOV mode */ + adapter->flags2 &= ~(IXGBE_FLAG2_RSC_CAPABLE | + IXGBE_FLAG2_RSC_ENABLED); + + + for (i = 0; i < adapter->num_vfs; i++) { + /* enable spoof checking for all VFs */ + adapter->vfinfo[i].spoofchk_enabled = true; + adapter->vfinfo[i].link_enable = true; + +#ifdef HAVE_NDO_SET_VF_RSS_QUERY_EN + /* We support VF RSS querying only for 82599 and x540 + * devices at the moment. These devices share RSS + * indirection table and RSS hash key with PF therefore + * we want to disable the querying by default. + */ + adapter->vfinfo[i].rss_query_enabled = 0; + +#endif + /* Untrust all VFs */ + adapter->vfinfo[i].trusted = false; + + /* set the default xcast mode */ + adapter->vfinfo[i].xcast_mode = IXGBEVF_XCAST_MODE_NONE; + } + + e_dev_info("SR-IOV enabled with %d VFs\n", num_vfs); + if (hw->mac.type < ixgbe_mac_X550) + e_dev_info("configure port vlans to keep your VFs secure\n"); + + return 0; +} + +/** + * ixgbe_get_vfs - Find and take references to all vf devices + * @adapter: Pointer to adapter struct + */ +static void ixgbe_get_vfs(struct ixgbe_adapter *adapter) +{ + struct pci_dev *pdev = adapter->pdev; + u16 vendor = pdev->vendor; + struct pci_dev *vfdev; + int vf = 0; + u16 vf_id; + int pos; + + pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV); + if (!pos) + return; + pci_read_config_word(pdev, pos + PCI_SRIOV_VF_DID, &vf_id); + + vfdev = pci_get_device(vendor, vf_id, NULL); + for (; vfdev; vfdev = pci_get_device(vendor, vf_id, vfdev)) { + if (!vfdev->is_virtfn) + continue; + if (vfdev->physfn != pdev) + continue; + if (vf >= adapter->num_vfs) + continue; + pci_dev_get(vfdev); + adapter->vfinfo[vf].vfdev = vfdev; + ++vf; + } +} + +/* Note this function is called when the user wants to enable SR-IOV + * VFs using the now deprecated module parameter + */ +void ixgbe_enable_sriov(struct ixgbe_adapter *adapter) +{ + int pre_existing_vfs = 0; + unsigned int num_vfs; + + pre_existing_vfs = pci_num_vf(adapter->pdev); + if (!pre_existing_vfs && !adapter->max_vfs) + return; + + /* If there are pre-existing VFs then we have to force + * use of that many - over ride any module parameter value. + * This may result from the user unloading the PF driver + * while VFs were assigned to guest VMs or because the VFs + * have been created via the new PCI SR-IOV sysfs interface. + */ + if (pre_existing_vfs) { + num_vfs = pre_existing_vfs; + dev_warn(&adapter->pdev->dev, + "Virtual Functions already enabled for this device - Please reload all VF drivers to avoid spoofed packet errors\n"); + } else { + int err; + /* + * The 82599 supports up to 64 VFs per physical function + * but this implementation limits allocation to 63 so that + * basic networking resources are still available to the + * physical function. If the user requests greater thn + * 63 VFs then it is an error - reset to default of zero. + */ + num_vfs = min_t(unsigned int, adapter->max_vfs, + IXGBE_MAX_VFS_DRV_LIMIT); + + err = pci_enable_sriov(adapter->pdev, num_vfs); + if (err) { + e_err(probe, "Failed to enable PCI sriov: %d\n", err); + return; + } + } + + if (!__ixgbe_enable_sriov(adapter, num_vfs)) { + ixgbe_get_vfs(adapter); + return; + } + + /* If we have gotten to this point then there is no memory available + * to manage the VF devices - print message and bail. + */ + e_err(probe, "Unable to allocate memory for VF Data Storage - SRIOV disabled\n"); + ixgbe_disable_sriov(adapter); +} + +#endif /* CONFIG_PCI_IOV */ +int ixgbe_disable_sriov(struct ixgbe_adapter *adapter) +{ + unsigned int num_vfs = adapter->num_vfs, vf; + struct ixgbe_hw *hw = &adapter->hw; + u32 gpie; + u32 vmdctl; + + /* set num VFs to 0 to prevent access to vfinfo */ + adapter->num_vfs = 0; + + /* put the reference to all of the vf devices */ + for (vf = 0; vf < num_vfs; ++vf) { + struct pci_dev *vfdev = adapter->vfinfo[vf].vfdev; + + if (!vfdev) + continue; + adapter->vfinfo[vf].vfdev = NULL; + pci_dev_put(vfdev); + } + + /* free VF control structures */ + kfree(adapter->vfinfo); + adapter->vfinfo = NULL; + + /* free macvlan list */ + kfree(adapter->mv_list); + adapter->mv_list = NULL; + + /* if SR-IOV is already disabled then there is nothing to do */ + if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)) + return 0; + + /* Turn off malicious driver detection */ + if ((hw->mac.ops.disable_mdd) && + (!(adapter->flags & IXGBE_FLAG_MDD_ENABLED))) + hw->mac.ops.disable_mdd(hw); + +#ifdef CONFIG_PCI_IOV + /* + * If our VFs are assigned we cannot shut down SR-IOV + * without causing issues, so just leave the hardware + * available but disabled + */ + if (pci_vfs_assigned(adapter->pdev)) { + e_dev_warn("Unloading driver while VFs are assigned - VFs will not be deallocated\n"); + return -EPERM; + } + /* disable iov and allow time for transactions to clear */ + pci_disable_sriov(adapter->pdev); +#endif + /* turn off device IOV mode */ + IXGBE_WRITE_REG(hw, IXGBE_GCR_EXT, 0); + gpie = IXGBE_READ_REG(hw, IXGBE_GPIE); + gpie &= ~IXGBE_GPIE_VTMODE_MASK; + IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie); + + /* set default pool back to 0 */ + vmdctl = IXGBE_READ_REG(hw, IXGBE_VT_CTL); + vmdctl &= ~IXGBE_VT_CTL_POOL_MASK; + IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, vmdctl); + IXGBE_WRITE_FLUSH(hw); + + /* Disable VMDq flag so device will be set in VM mode */ + if (adapter->ring_feature[RING_F_VMDQ].limit == 1) + adapter->flags &= ~IXGBE_FLAG_VMDQ_ENABLED; + + adapter->flags &= ~IXGBE_FLAG_SRIOV_ENABLED; + adapter->ring_feature[RING_F_VMDQ].offset = 0; + + /* take a breather then clean up driver data */ + msleep(100); + return 0; +} + +static int ixgbe_pci_sriov_enable(struct pci_dev __maybe_unused *dev, int __maybe_unused num_vfs) +{ +#ifdef CONFIG_PCI_IOV + struct ixgbe_adapter *adapter = pci_get_drvdata(dev); + int pre_existing_vfs = pci_num_vf(dev); + int err = 0, i; + u8 num_tc; + + if (!(adapter->flags & IXGBE_FLAG_SRIOV_CAPABLE)) { + e_dev_warn("SRIOV not supported on this device\n"); + return -EOPNOTSUPP; + } + + if (adapter->num_vfs == num_vfs) + return -EINVAL; + + if (pre_existing_vfs && pre_existing_vfs != num_vfs) + err = ixgbe_disable_sriov(adapter); + else if (pre_existing_vfs && pre_existing_vfs == num_vfs) + goto out; + + if (err) + goto err_out; + + /* While the SR-IOV capability structure reports total VFs to be + * 64 we limit the actual number that can be allocated as below + * so that some transmit/receive resources can be reserved to the + * PF. The PCI bus driver already checks for other values out of + * range. + * Num_TCs MAX_VFs + * 1 63 + * <=4 31 + * >4 15 + */ + num_tc = netdev_get_num_tc(adapter->netdev); + if (num_tc > 4) { + if (num_vfs > IXGBE_MAX_VFS_8TC) { + e_dev_err("Currently the device is configured with %d TCs, Creating more than %d VFs is not allowed\n", num_tc, IXGBE_MAX_VFS_8TC); + err = -EPERM; + goto err_out; + } + } else if ((num_tc > 1) && (num_tc <= 4)) { + if (num_vfs > IXGBE_MAX_VFS_4TC) { + e_dev_err("Currently the device is configured with %d TCs, Creating more than %d VFs is not allowed\n", num_tc, IXGBE_MAX_VFS_4TC); + err = -EPERM; + goto err_out; + } + } else { + if (num_vfs > IXGBE_MAX_VFS_1TC) { + e_dev_err("Currently the device is configured with %d TCs, Creating more than %d VFs is not allowed\n", num_tc, IXGBE_MAX_VFS_1TC); + err = -EPERM; + goto err_out; + } + } + + err = __ixgbe_enable_sriov(adapter, num_vfs); + if (err) + goto err_out; + + for (i = 0; i < adapter->num_vfs; i++) + ixgbe_vf_configuration(dev, (i | 0x10000000)); + + /* reset before enabling SRIOV to avoid mailbox issues */ + ixgbe_sriov_reinit(adapter); + + err = pci_enable_sriov(dev, num_vfs); + if (err) { + e_dev_warn("Failed to enable PCI sriov: %d\n", err); + goto err_out; + } + ixgbe_get_vfs(adapter); + +out: + return num_vfs; + +err_out: + return err; +#endif + return 0; +} + +static int ixgbe_pci_sriov_disable(struct pci_dev *dev) +{ + struct ixgbe_adapter *adapter = pci_get_drvdata(dev); + int err; +#ifdef CONFIG_PCI_IOV + u32 current_flags = adapter->flags; +#endif + + if (!adapter->num_vfs && !pci_num_vf(dev)) + return -EINVAL; + + err = ixgbe_disable_sriov(adapter); + + /* Only reinit if no error and state changed */ +#ifdef CONFIG_PCI_IOV + if (!err && current_flags != adapter->flags) + ixgbe_sriov_reinit(adapter); +#endif + + return err; +} + +/** + * ixgbe_pci_sriov_configure - Configure SR-IOV for the PCI device + * @dev: PCI device structure + * @num_vfs: Number of virtual functions (VFs) to configure + * + * This function configures Single Root I/O Virtualization (SR-IOV) for the + * specified PCI device. If `num_vfs` is zero, it disables SR-IOV. Otherwise, + * it enables SR-IOV with the specified number of VFs. + * + * Return: The number of VFs enabled on success, or a negative error code on failure. + */ +int ixgbe_pci_sriov_configure(struct pci_dev *dev, int num_vfs) +{ + if (num_vfs == 0) + return ixgbe_pci_sriov_disable(dev); + else + return ixgbe_pci_sriov_enable(dev, num_vfs); +} + +static int ixgbe_set_vf_multicasts(struct ixgbe_adapter *adapter, + u32 *msgbuf, u32 vf) +{ + int entries = (msgbuf[0] & IXGBE_VT_MSGINFO_MASK) + >> IXGBE_VT_MSGINFO_SHIFT; + u16 *hash_list = (u16 *)&msgbuf[1]; + struct vf_data_storage *vfinfo = &adapter->vfinfo[vf]; + struct ixgbe_hw *hw = &adapter->hw; + int i; + u32 vmolr = IXGBE_READ_REG(hw, IXGBE_VMOLR(vf)); + + /* only so many hash values supported */ + entries = min(entries, IXGBE_MAX_VF_MC_ENTRIES); + + /* salt away the number of multi cast addresses assigned + * to this VF for later use to restore when the PF multi cast + * list changes + */ + vfinfo->num_vf_mc_hashes = entries; + + /* VFs are limited to using the MTA hash table for their multicast + * addresses */ + for (i = 0; i < entries; i++) + vfinfo->vf_mc_hashes[i] = hash_list[i]; + + vmolr |= IXGBE_VMOLR_ROMPE; + IXGBE_WRITE_REG(hw, IXGBE_VMOLR(vf), vmolr); + + /* Sync up the PF and VF in the same MTA table */ + ixgbe_write_mc_addr_list(adapter->netdev); + + return 0; +} + +#ifdef CONFIG_PCI_IOV +void ixgbe_restore_vf_multicasts(struct ixgbe_adapter *adapter) +{ + struct ixgbe_hw *hw = &adapter->hw; + struct vf_data_storage *vfinfo; + int i, j; + u32 vector_bit; + u32 vector_reg; + + /* Clear mta_shadow */ + memset(&hw->mac.mta_shadow, 0, sizeof(hw->mac.mta_shadow)); + + for (i = 0; i < adapter->num_vfs; i++) { + u32 vmolr = IXGBE_READ_REG(hw, IXGBE_VMOLR(i)); + vfinfo = &adapter->vfinfo[i]; + for (j = 0; j < vfinfo->num_vf_mc_hashes; j++) { + hw->addr_ctrl.mta_in_use++; + vector_reg = (vfinfo->vf_mc_hashes[j] >> 5) & 0x7F; + vector_bit = vfinfo->vf_mc_hashes[j] & 0x1F; + hw->mac.mta_shadow[vector_reg] |= (1 << vector_bit); + } + if (vfinfo->num_vf_mc_hashes) + vmolr |= IXGBE_VMOLR_ROMPE; + else + vmolr &= ~IXGBE_VMOLR_ROMPE; + IXGBE_WRITE_REG(hw, IXGBE_VMOLR(i), vmolr); + } + + /* Restore any VF macvlans */ + ixgbe_full_sync_mac_table(adapter); +} +#endif /* CONFIG_PCI_IOV */ + +int ixgbe_set_vf_vlan(struct ixgbe_adapter *adapter, int add, int vid, u32 vf) +{ + struct ixgbe_hw *hw = &adapter->hw; + int err; + +#ifndef HAVE_VLAN_RX_REGISTER + /* If VLAN overlaps with one the PF is currently monitoring make + * sure that we are able to allocate a VLVF entry. This may be + * redundant but it guarantees PF will maintain visibility to + * the VLAN. + */ + if (add && test_bit(vid, adapter->active_vlans)) { + err = hw->mac.ops.set_vfta(hw, vid, VMDQ_P(0), true, false); + if (err) + return err; + } +#endif + + err = hw->mac.ops.set_vfta(hw, vid, vf, !!add, false); +#ifndef HAVE_VLAN_RX_REGISTER + + if (add && !err) + return err; + + /* If we failed to add the VF VLAN or we are removing the VF VLAN + * we may need to drop the PF pool bit in order to allow us to free + * up the VLVF resources. + */ + if (test_bit(vid, adapter->active_vlans) || + (adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC)) + ixgbe_update_pf_promisc_vlvf(adapter, vid); +#endif + + return err; +} +static int ixgbe_set_vf_lpe(struct ixgbe_adapter *adapter, u32 max_frame, u32 vf) +{ + struct ixgbe_hw *hw = &adapter->hw; + u32 max_frs; + + /* + * For 82599EB we have to keep all PFs and VFs operating with + * the same max_frame value in order to avoid sending an oversize + * frame to a VF. In order to guarantee this is handled correctly + * for all cases we have several special exceptions to take into + * account before we can enable the VF for receive + */ + if (adapter->hw.mac.type == ixgbe_mac_82599EB) { + + struct net_device *dev = adapter->netdev; + int pf_max_frame = dev->mtu + ETH_HLEN; + u32 reg_offset, vf_shift, vfre; + s32 err = 0; + +#if IS_ENABLED(CONFIG_FCOE) +#ifdef HAVE_NETDEV_FCOE_MTU + if (dev->fcoe_mtu) +#else + if (dev->features & NETIF_F_FCOE_MTU) +#endif + pf_max_frame = max_t(int, pf_max_frame, + IXGBE_FCOE_JUMBO_FRAME_SIZE); +#endif /* CONFIG_FCOE */ + + switch (adapter->vfinfo[vf].vf_api) { + case ixgbe_mbox_api_11: + case ixgbe_mbox_api_12: + case ixgbe_mbox_api_13: + case ixgbe_mbox_api_16: + case ixgbe_mbox_api_17: + /* Version 1.1 supports jumbo frames on VFs if PF has + * jumbo frames enabled which means legacy VFs are + * disabled + */ + if (pf_max_frame > ETH_FRAME_LEN) + break; + fallthrough; + default: + /* If the PF or VF are running w/ jumbo frames enabled + * we need to shut down the VF Rx path as we cannot + * support jumbo frames on legacy VFs + */ + if ((pf_max_frame > ETH_FRAME_LEN) || + (max_frame > (ETH_FRAME_LEN + ETH_FCS_LEN))) + err = -EINVAL; + break; + } + + /* determine VF receive enable location */ + vf_shift = vf % 32; + reg_offset = vf / 32; + + /* enable or disable receive depending on error */ + vfre = IXGBE_READ_REG(hw, IXGBE_VFRE(reg_offset)); + if (err) + vfre &= ~(1 << vf_shift); + else + vfre |= 1 << vf_shift; + IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset), vfre); + + if (err) { + e_err(drv, "VF max_frame %d out of range\n", max_frame); + return err; + } + } + + /* pull current max frame size from hardware */ + max_frs = IXGBE_READ_REG(hw, IXGBE_MAXFRS); + max_frs &= IXGBE_MHADD_MFS_MASK; + max_frs >>= IXGBE_MHADD_MFS_SHIFT; + + if (max_frs < max_frame) { + max_frs = max_frame << IXGBE_MHADD_MFS_SHIFT; + IXGBE_WRITE_REG(hw, IXGBE_MAXFRS, max_frs); + } + + e_info(hw, "VF requests change max MTU to %d\n", max_frame); + + return 0; +} + +void ixgbe_set_vmolr(struct ixgbe_hw *hw, u32 vf, bool aupe) +{ + u32 vmolr = IXGBE_READ_REG(hw, IXGBE_VMOLR(vf)); + vmolr |= IXGBE_VMOLR_BAM; + if (aupe) + vmolr |= IXGBE_VMOLR_AUPE; + else + vmolr &= ~IXGBE_VMOLR_AUPE; + IXGBE_WRITE_REG(hw, IXGBE_VMOLR(vf), vmolr); +} + +static void ixgbe_set_vmvir(struct ixgbe_adapter *adapter, + u16 vid, u16 qos, u32 vf) +{ + struct ixgbe_hw *hw = &adapter->hw; + u32 vmvir = vid | (qos << VLAN_PRIO_SHIFT) | IXGBE_VMVIR_VLANA_DEFAULT; + + IXGBE_WRITE_REG(hw, IXGBE_VMVIR(vf), vmvir); +} + +static void ixgbe_clear_vmvir(struct ixgbe_adapter *adapter, u32 vf) +{ + struct ixgbe_hw *hw = &adapter->hw; + + IXGBE_WRITE_REG(hw, IXGBE_VMVIR(vf), 0); +} + +static void ixgbe_clear_vf_vlans(struct ixgbe_adapter *adapter, u32 vf) +{ + struct ixgbe_hw *hw = &adapter->hw; + u32 vlvfb_mask, pool_mask, i; + + /* create mask for VF and other pools */ + pool_mask = (u32)~BIT(VMDQ_P(0) % 32); + vlvfb_mask = BIT(vf % 32); + + /* post increment loop, covers VLVF_ENTRIES - 1 to 0 */ + for (i = IXGBE_VLVF_ENTRIES; i--;) { + u32 bits[2], vlvfb, vid, vfta, vlvf; + u32 word = i * 2 + vf / 32; + u32 mask; + + vlvfb = IXGBE_READ_REG(hw, IXGBE_VLVFB(word)); + + /* if our bit isn't set we can skip it */ + if (!(vlvfb & vlvfb_mask)) + continue; + + /* clear our bit from vlvfb */ + vlvfb ^= vlvfb_mask; + + /* create 64b mask to check to see if we should clear VLVF */ + bits[word % 2] = vlvfb; + bits[~word % 2] = IXGBE_READ_REG(hw, IXGBE_VLVFB(word ^ 1)); + + /* if other pools are present, just remove ourselves */ + if (bits[(VMDQ_P(0) / 32) ^ 1] || + (bits[VMDQ_P(0) / 32] & pool_mask)) + goto update_vlvfb; + + /* if PF is present, leave VFTA */ + if (bits[0] || bits[1]) + goto update_vlvf; + + /* if we cannot determine VLAN just remove ourselves */ + vlvf = IXGBE_READ_REG(hw, IXGBE_VLVF(i)); + if (!vlvf) + goto update_vlvfb; + + vid = vlvf & VLAN_VID_MASK; + mask = BIT(vid % 32); + + /* clear bit from VFTA */ + vfta = IXGBE_READ_REG(hw, IXGBE_VFTA(vid / 32)); + if (vfta & mask) + IXGBE_WRITE_REG(hw, IXGBE_VFTA(vid / 32), vfta ^ mask); +update_vlvf: + /* clear POOL selection enable */ + IXGBE_WRITE_REG(hw, IXGBE_VLVF(i), 0); + + if (!(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC)) + vlvfb = 0; +update_vlvfb: + /* clear pool bits */ + IXGBE_WRITE_REG(hw, IXGBE_VLVFB(word), vlvfb); + } +} + +static int ixgbe_set_vf_macvlan(struct ixgbe_adapter *adapter, + int vf, int index, unsigned char *mac_addr) +{ + struct vf_macvlans *entry; + struct list_head *pos; + int retval = 0; + + if (index <= 1) { + list_for_each(pos, &adapter->vf_mvs.l) { + entry = list_entry(pos, struct vf_macvlans, l); + if (entry->vf == vf) { + entry->vf = -1; + entry->free = true; + entry->is_macvlan = false; + ixgbe_del_mac_filter(adapter, + entry->vf_macvlan, vf); + } + } + } + + /* + * If index was zero then we were asked to clear the uc list + * for the VF. We're done. + */ + if (!index) + return 0; + + entry = NULL; + + list_for_each(pos, &adapter->vf_mvs.l) { + entry = list_entry(pos, struct vf_macvlans, l); + if (entry->free) + break; + } + + /* + * If we traversed the entire list and didn't find a free entry + * then we're out of space on the RAR table. Also entry may + * be NULL because the original memory allocation for the list + * failed, which is not fatal but does mean we can't support + * VF requests for MACVLAN because we couldn't allocate + * memory for the list management required. + */ + if (!entry || !entry->free) + return -ENOSPC; + + retval = ixgbe_add_mac_filter(adapter, mac_addr, vf); + if (retval < 0) + return retval; + + entry->free = false; + entry->is_macvlan = true; + entry->vf = vf; + memcpy(entry->vf_macvlan, mac_addr, ETH_ALEN); + + return 0; +} + +static inline void ixgbe_vf_reset_event(struct ixgbe_adapter *adapter, u32 vf) +{ + struct ixgbe_ring_feature *vmdq = &adapter->ring_feature[RING_F_VMDQ]; + struct vf_data_storage *vfinfo = &adapter->vfinfo[vf]; + u8 num_tcs = netdev_get_num_tc(adapter->netdev); + u32 q_per_pool = __ALIGN_MASK(1, ~vmdq->mask); + struct ixgbe_hw *hw = &adapter->hw; + u32 reg_val; + u32 queue; + u32 word; + + /* remove VLAN filters belonging to this VF */ + ixgbe_clear_vf_vlans(adapter, vf); + + /* add back PF assigned VLAN or VLAN 0 */ + ixgbe_set_vf_vlan(adapter, true, vfinfo->pf_vlan, vf); + + /* reset offloads to defaults */ + ixgbe_set_vmolr(hw, vf, !vfinfo->pf_vlan); + + /* set outgoing tags for VFs */ + if (!vfinfo->pf_vlan && !vfinfo->pf_qos && !num_tcs) { + ixgbe_clear_vmvir(adapter, vf); + } else { + if (vfinfo->pf_qos || !num_tcs) + ixgbe_set_vmvir(adapter, vfinfo->pf_vlan, + vfinfo->pf_qos, vf); + else + ixgbe_set_vmvir(adapter, vfinfo->pf_vlan, + adapter->default_up, vf); + } + + /* reset multicast table array for vf */ + adapter->vfinfo[vf].num_vf_mc_hashes = 0; + + /* Flush and reset the mta with the new values */ + ixgbe_set_rx_mode(adapter->netdev); + + ixgbe_del_mac_filter(adapter, adapter->vfinfo[vf].vf_mac_addresses, vf); + ixgbe_set_vf_macvlan(adapter, vf, 0, NULL); + + /* reset VF api back to unknown */ + adapter->vfinfo[vf].vf_api = ixgbe_mbox_api_10; + + /* + * Toggling VF's TX queues and clearing VF Mailbox Memory after VFLR + * should only affect X550 and above + */ + if (hw->mac.type >= ixgbe_mac_X550) { + /* Restart each queue for given VF */ + for (queue = 0; queue < q_per_pool; queue++) { + unsigned int reg_idx = (vf * q_per_pool) + queue; + + reg_val = IXGBE_READ_REG(hw, IXGBE_PVFTXDCTL(reg_idx)); + + /* Re-enabling only configured queues */ + if (reg_val) { + reg_val |= IXGBE_TXDCTL_ENABLE; + IXGBE_WRITE_REG(hw, IXGBE_PVFTXDCTL(reg_idx), + reg_val); + reg_val &= ~IXGBE_TXDCTL_ENABLE; + IXGBE_WRITE_REG(hw, IXGBE_PVFTXDCTL(reg_idx), + reg_val); + } + } + + /* Clear VF's mailbox memory */ + for (word = 0; word < IXGBE_VFMAILBOX_SIZE; word++) + IXGBE_WRITE_REG_ARRAY(hw, IXGBE_PFMBMEM(vf), word, 0); + + IXGBE_WRITE_FLUSH(hw); + } +} + +int ixgbe_set_vf_mac(struct ixgbe_adapter *adapter, + int vf, unsigned char *mac_addr) +{ + s32 retval = 0; + + ixgbe_del_mac_filter(adapter, adapter->vfinfo[vf].vf_mac_addresses, vf); + retval = ixgbe_add_mac_filter(adapter, mac_addr, vf); + if (retval >= 0) + memcpy(adapter->vfinfo[vf].vf_mac_addresses, + mac_addr, ETH_ALEN); + else + memset(adapter->vfinfo[vf].vf_mac_addresses, 0, ETH_ALEN); + + return retval; +} + +#ifdef CONFIG_PCI_IOV +int ixgbe_vf_configuration(struct pci_dev *pdev, unsigned int event_mask) +{ + unsigned char vf_mac_addr[6]; + struct ixgbe_adapter *adapter = pci_get_drvdata(pdev); + unsigned int vfn = (event_mask & 0x3f); + bool enable = ((event_mask & 0x10000000U) != 0); + + if (enable) { + memset(vf_mac_addr, 0, ETH_ALEN); + memcpy(adapter->vfinfo[vfn].vf_mac_addresses, vf_mac_addr, 6); + } + + return 0; +} +#endif /* CONFIG_PCI_IOV */ + +static inline void ixgbe_write_qde(struct ixgbe_adapter *adapter, u32 vf, + u32 qde) +{ + struct ixgbe_hw *hw = &adapter->hw; + struct ixgbe_ring_feature *vmdq = &adapter->ring_feature[RING_F_VMDQ]; + u32 q_per_pool = __ALIGN_MASK(1, ~vmdq->mask); + u32 reg; + int i; + + for (i = vf * q_per_pool; i < ((vf + 1) * q_per_pool); i++) { + /* flush previous write */ + IXGBE_WRITE_FLUSH(hw); + + /* drop enable should always be set in SRIOV mode*/ + reg = IXGBE_QDE_WRITE | qde; + reg |= i << IXGBE_QDE_IDX_SHIFT; + IXGBE_WRITE_REG(hw, IXGBE_QDE, reg); + } + +} + +static int ixgbe_vf_reset_msg(struct ixgbe_adapter *adapter, u32 vf) +{ + struct ixgbe_hw *hw = &adapter->hw; + struct ixgbe_ring_feature *vmdq = &adapter->ring_feature[RING_F_VMDQ]; + unsigned char *vf_mac = adapter->vfinfo[vf].vf_mac_addresses; + u32 reg, reg_offset, vf_shift; + u32 msgbuf[4] = {0, 0, 0, 0}; + u8 *addr = (u8 *)(&msgbuf[1]); + u32 q_per_pool = __ALIGN_MASK(1, ~vmdq->mask); + int i; + + e_info(probe, "VF Reset msg received from vf %d\n", vf); + + /* reset the filters for the device */ + ixgbe_vf_reset_event(adapter, vf); + + /* set vf mac address */ + if (!is_zero_ether_addr(vf_mac)) + ixgbe_set_vf_mac(adapter, vf, vf_mac); + + vf_shift = vf % 32; + reg_offset = vf / 32; + + /* force drop enable for all VF Rx queues */ + reg = IXGBE_QDE_ENABLE; + if (adapter->vfinfo[vf].pf_vlan) + reg |= IXGBE_QDE_HIDE_VLAN; + + ixgbe_write_qde(adapter, vf, reg); + + /* set transmit and receive for vf */ + ixgbe_set_vf_rx_tx(adapter, vf); + + /* enable VF mailbox for further messages */ + adapter->vfinfo[vf].clear_to_send = true; + + reg = IXGBE_READ_REG(hw, IXGBE_VMECM(reg_offset)); + reg |= (1 << vf_shift); + IXGBE_WRITE_REG(hw, IXGBE_VMECM(reg_offset), reg); + + /* + * Reset the VFs TDWBAL and TDWBAH registers + * which are not cleared by an FLR + */ + for (i = 0; i < q_per_pool; i++) { + IXGBE_WRITE_REG(hw, IXGBE_PVFTDWBAHn(q_per_pool, vf, i), 0); + IXGBE_WRITE_REG(hw, IXGBE_PVFTDWBALn(q_per_pool, vf, i), 0); + } + + /* reply to reset with ack and vf mac address */ + msgbuf[0] = IXGBE_VF_RESET; + if (!is_zero_ether_addr(vf_mac) && adapter->vfinfo[vf].pf_set_mac) { + msgbuf[0] |= IXGBE_VT_MSGTYPE_SUCCESS; + memcpy(addr, vf_mac, ETH_ALEN); + } else { + msgbuf[0] |= IXGBE_VT_MSGTYPE_FAILURE; + } + + /* + * Piggyback the multicast filter type so VF can compute the + * correct vectors + */ + msgbuf[3] = hw->mac.mc_filter_type; + ixgbe_write_mbx(hw, msgbuf, IXGBE_VF_PERMADDR_MSG_LEN, vf); + + return 0; +} + +static int ixgbe_set_vf_mac_addr(struct ixgbe_adapter *adapter, + u32 *msgbuf, u32 vf) +{ + u8 *new_mac = ((u8 *)(&msgbuf[1])); + + if (!is_valid_ether_addr(new_mac)) { + e_warn(drv, "VF %d attempted to set invalid mac\n", vf); + return -1; + } + + if (adapter->vfinfo[vf].pf_set_mac && !adapter->vfinfo[vf].trusted && + memcmp(adapter->vfinfo[vf].vf_mac_addresses, new_mac, + ETH_ALEN)) { + u8 *pm = adapter->vfinfo[vf].vf_mac_addresses; + e_warn(drv, + "VF %d attempted to set a new MAC address but it already has an administratively set MAC address %2.2X:%2.2X:%2.2X:%2.2X:%2.2X:%2.2X\n", + vf, pm[0], pm[1], pm[2], pm[3], pm[4], pm[5]); + e_warn(drv, "Check the VF driver and if it is not using the correct MAC address you may need to reload the VF driver\n"); + return -1; + } + return ixgbe_set_vf_mac(adapter, vf, new_mac) < 0; +} + +static int ixgbe_set_vf_vlan_msg(struct ixgbe_adapter *adapter, + u32 *msgbuf, u32 vf) +{ + u32 add = (msgbuf[0] & IXGBE_VT_MSGINFO_MASK) >> IXGBE_VT_MSGINFO_SHIFT; + u32 vid = (msgbuf[1] & IXGBE_VLVF_VLANID_MASK); + u8 tcs = netdev_get_num_tc(adapter->netdev); + int err = 0; + + if (adapter->vfinfo[vf].pf_vlan || tcs) { + e_warn(drv, + "VF %d attempted to override administratively set VLAN configuration\n" + "Reload the VF driver to resume operations\n", + vf); + return -1; + } + + /* VLAN 0 is a special case, don't allow it to be removed */ + if (!vid && !add) + return 0; + + err = ixgbe_set_vf_vlan(adapter, add, vid, vf); + if (err) + goto out; + +#ifdef HAVE_VLAN_RX_REGISTER + /* in case of promiscuous mode any VLAN filter set for a VF must + * also have the PF pool added to it. + */ + if (add && adapter->netdev->flags & IFF_PROMISC) { + err = ixgbe_set_vf_vlan(adapter, add, vid, VMDQ_P(0)); + if (err) + goto out; + } + +#ifdef CONFIG_PCI_IOV + /* Go through all the checks to see if the VLAN filter should + * be wiped completely. + */ + if (!add && adapter->netdev->flags & IFF_PROMISC) { + struct ixgbe_hw *hw = &adapter->hw; + u32 bits, vlvf; + s32 reg_ndx; + + reg_ndx = ixgbe_find_vlvf_entry(hw, vid); + if (reg_ndx < 0) + goto out; + vlvf = IXGBE_READ_REG(hw, IXGBE_VLVF(reg_ndx)); + /* See if any other pools are set for this VLAN filter + * entry other than the PF. + */ + if (VMDQ_P(0) < 32) { + bits = IXGBE_READ_REG(hw, IXGBE_VLVFB(reg_ndx * 2)); + bits &= ~(1 << VMDQ_P(0)); + bits |= IXGBE_READ_REG(hw, + IXGBE_VLVFB(reg_ndx * 2) + 1); + } else { + bits = IXGBE_READ_REG(hw, + IXGBE_VLVFB(reg_ndx * 2) + 1); + bits &= ~(1 << (VMDQ_P(0) - 32)); + bits |= IXGBE_READ_REG(hw, IXGBE_VLVFB(reg_ndx * 2)); + } + + /* If the filter was removed then ensure PF pool bit + * is cleared if the PF only added itself to the pool + * because the PF is in promiscuous mode. + */ + if ((vlvf & VLAN_VID_MASK) == vid && !bits) + err = ixgbe_set_vf_vlan(adapter, add, vid, VMDQ_P(0)); + } + +#endif /* CONFIG_PCI_IOV */ +#endif /* HAVE_VLAN_RX_REGISTER */ +out: + return err; +} + +static int ixgbe_set_vf_macvlan_msg(struct ixgbe_adapter *adapter, + u32 *msgbuf, u32 vf) +{ + u8 *new_mac = ((u8 *)(&msgbuf[1])); + int index = (msgbuf[0] & IXGBE_VT_MSGINFO_MASK) >> + IXGBE_VT_MSGINFO_SHIFT; + int err; + + if (adapter->vfinfo[vf].pf_set_mac && !adapter->vfinfo[vf].trusted && + index > 0) { + e_warn(drv, + "VF %d requested MACVLAN filter but is administratively denied\n", + vf); + return -1; + } + + /* An non-zero index indicates the VF is setting a filter */ + if (index) { + if (!is_valid_ether_addr(new_mac)) { + e_warn(drv, "VF %d attempted to set invalid mac\n", vf); + return -1; + } + + /* + * If the VF is allowed to set MAC filters then turn off + * anti-spoofing to avoid false positives. + */ + if (adapter->vfinfo[vf].spoofchk_enabled) { + struct ixgbe_hw *hw = &adapter->hw; + + hw->mac.ops.set_mac_anti_spoofing(hw, false, vf); + hw->mac.ops.set_vlan_anti_spoofing(hw, false, vf); + } + } + + err = ixgbe_set_vf_macvlan(adapter, vf, index, new_mac); + if (err == -ENOSPC) + e_warn(drv, + "VF %d has requested a MACVLAN filter but there is no space for it\n", + vf); + + return err < 0; +} + +static int ixgbe_negotiate_vf_api(struct ixgbe_adapter *adapter, + u32 *msgbuf, u32 vf) +{ + int api = msgbuf[1]; + + switch (api) { + case ixgbe_mbox_api_10: + case ixgbe_mbox_api_11: + case ixgbe_mbox_api_12: + case ixgbe_mbox_api_13: + case ixgbe_mbox_api_16: + case ixgbe_mbox_api_17: + adapter->vfinfo[vf].vf_api = api; + return 0; + default: + break; + } + + e_info(drv, "VF %d requested invalid api version %u\n", vf, api); + + return -1; +} + +static int ixgbe_get_vf_queues(struct ixgbe_adapter *adapter, + u32 *msgbuf, u32 vf) +{ + struct net_device *dev = adapter->netdev; + struct ixgbe_ring_feature *vmdq = &adapter->ring_feature[RING_F_VMDQ]; + unsigned int default_tc = 0; + u8 num_tcs = netdev_get_num_tc(dev); + + /* verify the PF is supporting the correct APIs */ + switch (adapter->vfinfo[vf].vf_api) { + case ixgbe_mbox_api_20: + case ixgbe_mbox_api_11: + case ixgbe_mbox_api_12: + case ixgbe_mbox_api_13: + case ixgbe_mbox_api_16: + case ixgbe_mbox_api_17: + break; + default: + return -1; + } + + /* only allow 1 Tx queue for bandwidth limiting */ + msgbuf[IXGBE_VF_TX_QUEUES] = __ALIGN_MASK(1, ~vmdq->mask); + msgbuf[IXGBE_VF_RX_QUEUES] = __ALIGN_MASK(1, ~vmdq->mask); + + /* if TCs > 1 determine which TC belongs to default user priority */ + if (num_tcs > 1) + default_tc = netdev_get_prio_tc_map(dev, adapter->default_up); + + /* notify VF of need for VLAN tag stripping, and correct queue */ + if (num_tcs) + msgbuf[IXGBE_VF_TRANS_VLAN] = num_tcs; + else if (adapter->vfinfo[vf].pf_vlan || adapter->vfinfo[vf].pf_qos) + msgbuf[IXGBE_VF_TRANS_VLAN] = 1; + else + msgbuf[IXGBE_VF_TRANS_VLAN] = 0; + + /* notify VF of default queue */ + msgbuf[IXGBE_VF_DEF_QUEUE] = default_tc; + + return 0; +} + +#ifdef HAVE_NDO_SET_VF_RSS_QUERY_EN +static int ixgbe_get_vf_reta(struct ixgbe_adapter *adapter, u32 *msgbuf, u32 vf) +{ + u32 i, j; + u32 *out_buf = &msgbuf[1]; + const u8 *reta = adapter->rss_indir_tbl; + u32 reta_size = ixgbe_rss_indir_tbl_entries(adapter); + + /* Check if operation is permitted */ + if (!adapter->vfinfo[vf].rss_query_enabled) + return -EPERM; + + /* verify the PF is supporting the correct API */ + switch (adapter->vfinfo[vf].vf_api) { + case ixgbe_mbox_api_12: + case ixgbe_mbox_api_13: + case ixgbe_mbox_api_16: + case ixgbe_mbox_api_17: + break; + default: + return -EOPNOTSUPP; + } + + /* This mailbox command is supported (required) only for 82599 and x540 + * VFs which support up to 4 RSS queues. Therefore we will compress the + * RETA by saving only 2 bits from each entry. This way we will be able + * to transfer the whole RETA in a single mailbox operation. + */ + for (i = 0; i < reta_size / 16; i++) { + out_buf[i] = 0; + for (j = 0; j < 16; j++) + out_buf[i] |= (u32)(reta[16 * i + j] & 0x3) << (2 * j); + } + + return 0; +} + +static int ixgbe_get_vf_rss_key(struct ixgbe_adapter *adapter, + u32 *msgbuf, u32 vf) +{ + u32 *rss_key = &msgbuf[1]; + + /* Check if the operation is permitted */ + if (!adapter->vfinfo[vf].rss_query_enabled) + return -EPERM; + + /* verify the PF is supporting the correct API */ + switch (adapter->vfinfo[vf].vf_api) { + case ixgbe_mbox_api_12: + case ixgbe_mbox_api_13: + case ixgbe_mbox_api_16: + case ixgbe_mbox_api_17: + break; + default: + return -EOPNOTSUPP; + } + + memcpy(rss_key, adapter->rss_key, IXGBE_RSS_KEY_SIZE); + + return 0; +} +#endif /* HAVE_NDO_SET_VF_RSS_QUERY_EN */ + +static int ixgbe_update_vf_xcast_mode(struct ixgbe_adapter *adapter, + u32 *msgbuf, u32 vf) +{ + struct ixgbe_hw *hw = &adapter->hw; + int xcast_mode = msgbuf[1]; + u32 vmolr, fctrl, disable, enable; + + /* verify the PF is supporting the correct APIs */ + switch (adapter->vfinfo[vf].vf_api) { + case ixgbe_mbox_api_12: + /* promisc introduced in 1.3 version */ + if (xcast_mode == IXGBEVF_XCAST_MODE_PROMISC) + return -EOPNOTSUPP; + /* Fall threw */ + case ixgbe_mbox_api_13: + case ixgbe_mbox_api_16: + case ixgbe_mbox_api_17: + break; + default: + return -EOPNOTSUPP; + } + + if (xcast_mode > IXGBEVF_XCAST_MODE_MULTI && + !adapter->vfinfo[vf].trusted) { + xcast_mode = IXGBEVF_XCAST_MODE_MULTI; + } + + if (adapter->vfinfo[vf].xcast_mode == xcast_mode) + goto out; + + switch (xcast_mode) { + case IXGBEVF_XCAST_MODE_NONE: + disable = IXGBE_VMOLR_BAM | IXGBE_VMOLR_ROMPE | + IXGBE_VMOLR_MPE | IXGBE_VMOLR_UPE | IXGBE_VMOLR_VPE; + enable = 0; + break; + case IXGBEVF_XCAST_MODE_MULTI: + disable = IXGBE_VMOLR_MPE | IXGBE_VMOLR_UPE | IXGBE_VMOLR_VPE; + enable = IXGBE_VMOLR_BAM | IXGBE_VMOLR_ROMPE; + break; + case IXGBEVF_XCAST_MODE_ALLMULTI: + disable = IXGBE_VMOLR_UPE | IXGBE_VMOLR_VPE; + enable = IXGBE_VMOLR_BAM | IXGBE_VMOLR_ROMPE | IXGBE_VMOLR_MPE; + break; + case IXGBEVF_XCAST_MODE_PROMISC: + if (hw->mac.type <= ixgbe_mac_82599EB) + return -EOPNOTSUPP; + + fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL); + if (!(fctrl & IXGBE_FCTRL_UPE)) { + /* VF promisc requires PF in promisc */ + e_warn(drv, + "Enabling VF promisc requires PF in promisc\n"); + return -EPERM; + } + + disable = 0; + enable = IXGBE_VMOLR_BAM | IXGBE_VMOLR_ROMPE | + IXGBE_VMOLR_MPE | IXGBE_VMOLR_UPE | IXGBE_VMOLR_VPE; + break; + default: + return -EOPNOTSUPP; + } + + vmolr = IXGBE_READ_REG(hw, IXGBE_VMOLR(vf)); + vmolr &= ~disable; + vmolr |= enable; + IXGBE_WRITE_REG(hw, IXGBE_VMOLR(vf), vmolr); + + adapter->vfinfo[vf].xcast_mode = xcast_mode; + +out: + msgbuf[1] = xcast_mode; + + return 0; +} + +static int ixgbe_get_vf_link_state(struct ixgbe_adapter *adapter, + u32 *msgbuf, u32 vf) +{ + u32 *link_state = &msgbuf[1]; + + /* verify the PF is supporting the correct API */ + switch (adapter->vfinfo[vf].vf_api) { + case ixgbe_mbox_api_12: + case ixgbe_mbox_api_13: + case ixgbe_mbox_api_16: + case ixgbe_mbox_api_17: + break; + default: + return -EOPNOTSUPP; + } + + *link_state = adapter->vfinfo[vf].link_enable; + + return 0; +} + +static int ixgbe_get_vf_link_status(struct ixgbe_adapter *adapter, + u32 *msgbuf, u32 vf) +{ + struct ixgbe_hw *hw = &adapter->hw; + + switch (adapter->vfinfo[vf].vf_api) { + case ixgbe_mbox_api_16: + case ixgbe_mbox_api_17: + if (!ixgbe_is_mac_E6xx(hw->mac.type)) + return -EOPNOTSUPP; + break; + default: + return -EOPNOTSUPP; + } + + /* Simply provide stored values as watchdog / link status events take + * care of it's freshness. + */ + msgbuf[1] = adapter->link_speed; + msgbuf[2] = adapter->link_up; + + return 0; +} + +/** + * ixgbe_negotiate_vf_features - negotiate supported features with VF driver + * @adapter: pointer to adapter struct + * @msgbuf: pointer to message buffers + * @vf: VF identifier + * + * Return: 0 on success or -EOPNOTSUPP when operation is not supported. + */ +static int ixgbe_negotiate_vf_features(struct ixgbe_adapter *adapter, + u32 *msgbuf, u32 vf) +{ + u32 features = msgbuf[1]; + + switch (adapter->vfinfo[vf].vf_api) { + case ixgbe_mbox_api_17: + break; + default: + return -EOPNOTSUPP; + } + + features &= IXGBE_SUPPORTED_FEATURES; + msgbuf[1] = features; + + return 0; +} + +static int ixgbe_rcv_msg_from_vf(struct ixgbe_adapter *adapter, u32 vf) +{ + u32 mbx_size = IXGBE_VFMAILBOX_SIZE; + u32 msgbuf[IXGBE_VFMAILBOX_SIZE]; + struct ixgbe_hw *hw = &adapter->hw; + s32 retval; + + retval = ixgbe_read_mbx(hw, msgbuf, mbx_size, vf); + + if (retval) { + pr_err("Error receiving message from VF\n"); + return retval; + } + + /* this is a message we already processed, do nothing */ + if (msgbuf[0] & (IXGBE_VT_MSGTYPE_SUCCESS | IXGBE_VT_MSGTYPE_FAILURE)) + return retval; + + /* flush the ack before we write any messages back */ + IXGBE_WRITE_FLUSH(hw); + + if (msgbuf[0] == IXGBE_VF_RESET) + return ixgbe_vf_reset_msg(adapter, vf); + + /* + * until the vf completes a virtual function reset it should not be + * allowed to start any configuration. + */ + + if (!adapter->vfinfo[vf].clear_to_send) { + msgbuf[0] |= IXGBE_VT_MSGTYPE_FAILURE; + ixgbe_write_mbx(hw, msgbuf, 1, vf); + return retval; + } + + switch ((msgbuf[0] & 0xFFFF)) { + case IXGBE_VF_SET_MAC_ADDR: + retval = ixgbe_set_vf_mac_addr(adapter, msgbuf, vf); + break; + case IXGBE_VF_SET_MULTICAST: + retval = ixgbe_set_vf_multicasts(adapter, msgbuf, vf); + break; + case IXGBE_VF_SET_VLAN: + retval = ixgbe_set_vf_vlan_msg(adapter, msgbuf, vf); + break; + case IXGBE_VF_SET_LPE: + if (msgbuf[1] > IXGBE_MAX_JUMBO_FRAME_SIZE) { + e_err(drv, "VF max_frame %d out of range\n", msgbuf[1]); + return -EINVAL; + } + retval = ixgbe_set_vf_lpe(adapter, msgbuf[1], vf); + break; + case IXGBE_VF_SET_MACVLAN: + retval = ixgbe_set_vf_macvlan_msg(adapter, msgbuf, vf); + break; + case IXGBE_VF_API_NEGOTIATE: + retval = ixgbe_negotiate_vf_api(adapter, msgbuf, vf); + break; + case IXGBE_VF_GET_QUEUES: + retval = ixgbe_get_vf_queues(adapter, msgbuf, vf); + break; +#ifdef HAVE_NDO_SET_VF_RSS_QUERY_EN + case IXGBE_VF_GET_RETA: + retval = ixgbe_get_vf_reta(adapter, msgbuf, vf); + break; + case IXGBE_VF_GET_RSS_KEY: + retval = ixgbe_get_vf_rss_key(adapter, msgbuf, vf); + break; +#endif /* HAVE_NDO_SET_VF_RSS_QUERY_EN */ + case IXGBE_VF_UPDATE_XCAST_MODE: + retval = ixgbe_update_vf_xcast_mode(adapter, msgbuf, vf); + break; + case IXGBE_VF_GET_LINK_STATE: + retval = ixgbe_get_vf_link_state(adapter, msgbuf, vf); + break; + case IXGBE_VF_GET_PF_LINK_STATE: + retval = ixgbe_get_vf_link_status(adapter, msgbuf, vf); + break; + case IXGBE_VF_FEATURES_NEGOTIATE: + retval = ixgbe_negotiate_vf_features(adapter, msgbuf, vf); + break; + default: + e_err(drv, "Unhandled Msg %8.8x\n", msgbuf[0]); + retval = IXGBE_ERR_MBX; + break; + } + + /* notify the VF of the results of what it sent us */ + if (retval) + msgbuf[0] |= IXGBE_VT_MSGTYPE_FAILURE; + else + msgbuf[0] |= IXGBE_VT_MSGTYPE_SUCCESS; + + msgbuf[0] |= IXGBE_VT_MSGTYPE_CTS; + + ixgbe_write_mbx(hw, msgbuf, mbx_size, vf); + + return retval; +} + +static void ixgbe_rcv_ack_from_vf(struct ixgbe_adapter *adapter, u32 vf) +{ + struct ixgbe_hw *hw = &adapter->hw; + u32 msg = IXGBE_VT_MSGTYPE_FAILURE; + + /* if device isn't clear to send it shouldn't be reading either */ + if (!adapter->vfinfo[vf].clear_to_send) + ixgbe_write_mbx(hw, &msg, 1, vf); +} + +#define Q_BITMAP_DEPTH 2 +int ixgbe_check_mdd_event(struct ixgbe_adapter *adapter) +{ + struct ixgbe_hw *hw = &adapter->hw; + u32 vf_bitmap[Q_BITMAP_DEPTH] = { 0 }; + int retval = false; + u32 j, i; + u32 ping; + + if (!hw->mac.ops.mdd_event) + return retval; + + /* Did we have a malicious event */ + hw->mac.ops.mdd_event(hw, vf_bitmap); + + /* Log any blocked queues and release lock */ + for (i = 0; i < Q_BITMAP_DEPTH; i++) { + for (j = 0; j < 32 && vf_bitmap[i]; j++) { + u32 vf; + + if (!(vf_bitmap[i] & (1 << j))) + continue; + + /* The VF that malicious event occurred on */ + vf = j + (i * 32); + + dev_warn(ixgbe_pf_to_dev(adapter), + "Malicious event on VF %d tx:%x rx:%x\n", vf, + IXGBE_READ_REG(hw, IXGBE_LVMMC_TX), + IXGBE_READ_REG(hw, IXGBE_LVMMC_RX)); + + /* restart the vf */ + if (hw->mac.ops.restore_mdd_vf) { + hw->mac.ops.restore_mdd_vf(hw, vf); + + /* get the VF to rebuild its queues */ + adapter->vfinfo[vf].clear_to_send = 0; + ping = IXGBE_PF_CONTROL_MSG | + IXGBE_VT_MSGTYPE_CTS; + ixgbe_write_mbx(hw, &ping, 1, vf); + } + + retval = true; + } + } + + return retval; +} + +void ixgbe_msg_task(struct ixgbe_adapter *adapter) +{ + struct ixgbe_hw *hw = &adapter->hw; + u32 vf; + + if (!adapter->vfinfo) + return; + + if (adapter->flags & IXGBE_FLAG_MDD_ENABLED) + ixgbe_check_mdd_event(adapter); + + for (vf = 0; vf < adapter->num_vfs; vf++) { + /* process any reset requests */ + if (!ixgbe_check_for_rst(hw, vf)) + ixgbe_vf_reset_event(adapter, vf); + + /* process any messages pending */ + if (!ixgbe_check_for_msg(hw, vf)) + ixgbe_rcv_msg_from_vf(adapter, vf); + + /* process any acks */ + if (!ixgbe_check_for_ack(hw, vf)) + ixgbe_rcv_ack_from_vf(adapter, vf); + } +} + +#if defined(HAVE_NDO_SET_VF_TRUST) || defined(HAVE_NDO_SET_VF_LINK_STATE) +static inline void ixgbe_ping_vf(struct ixgbe_adapter *adapter, int vf) +{ + struct ixgbe_hw *hw = &adapter->hw; + u32 ping; + + ping = IXGBE_PF_CONTROL_MSG; + if (adapter->vfinfo[vf].clear_to_send) + ping |= IXGBE_VT_MSGTYPE_CTS; + ixgbe_write_mbx(hw, &ping, 1, vf); +} +#endif + +void ixgbe_ping_all_vfs(struct ixgbe_adapter *adapter) +{ + struct ixgbe_hw *hw = &adapter->hw; + u32 ping; + int i; + + for (i = 0 ; i < adapter->num_vfs; i++) { + ping = IXGBE_PF_CONTROL_MSG; + if (adapter->vfinfo[i].clear_to_send) + ping |= IXGBE_VT_MSGTYPE_CTS; + ixgbe_write_mbx(hw, &ping, 1, i); + } +} + +/** + * ixgbe_set_all_vfs - update vfs queues + * @adapter: Pointer to adapter struct + * + * Update setting transmit and receive queues for all vfs + **/ +void ixgbe_set_all_vfs(struct ixgbe_adapter *adapter) +{ + int i; + + for (i = 0 ; i < adapter->num_vfs; i++) { + ixgbe_set_vf_link_state(adapter, i, + adapter->vfinfo[i].link_state); + } +} + +#ifdef HAVE_NDO_SET_VF_TRUST +/** + * ixgbe_ndo_set_vf_trust - Set trust status for a virtual function (VF) + * @netdev: Network device structure + * @vf: VF index + * @setting: Boolean value to set the VF as trusted (true) or not trusted (false) + * + * This function sets the trust status for a specified virtual function (VF) on + * the network device. If the trust status changes, the VF is reset to reconfigure + * its features. The function logs the new trust status of the VF. + * + * Return: 0 on success, or -EINVAL if the VF index is out of range. + */ +int ixgbe_ndo_set_vf_trust(struct net_device *netdev, int vf, bool setting) +{ + struct ixgbe_adapter *adapter = netdev_priv(netdev); + + if (vf < 0 || vf >= adapter->num_vfs) + return -EINVAL; + + /* nothing to do */ + if (adapter->vfinfo[vf].trusted == setting) + return 0; + + adapter->vfinfo[vf].trusted = setting; + + /* reset VF to reconfigure features */ + adapter->vfinfo[vf].clear_to_send = false; + ixgbe_ping_vf(adapter, vf); + + e_info(drv, "VF %u is %strusted\n", vf, setting ? "" : "not "); + + return 0; +} +#endif /* HAVE_NDO_SET_VF_TRUST */ + +#ifdef IFLA_VF_MAX +/** + * ixgbe_ndo_set_vf_mac - Set MAC address for a virtual function (VF) + * @netdev: Network device structure + * @vf: VF index + * @mac: Pointer to the MAC address to be set + * + * This function sets or removes the MAC address for a specified virtual + * function (VF) on the network device. It validates the MAC address and + * updates the VF configuration. If a valid MAC address is provided, it sets + * the MAC address and marks it as set by the PF. If a zero MAC address is + * provided, it removes the existing MAC address. The function logs relevant + * messages and warns if the PF device is down. + * + * Return: 0 on success, -EINVAL if the VF index is out of range or the MAC + * address is invalid, or a negative error code on failure. + */ +int ixgbe_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac) +{ + struct ixgbe_adapter *adapter = netdev_priv(netdev); + s32 retval = 0; + + if (vf < 0 || vf >= adapter->num_vfs) + return -EINVAL; + + if (is_valid_ether_addr(mac)) { + dev_info(ixgbe_pf_to_dev(adapter), "setting MAC %pM on VF %d\n", + mac, vf); + dev_info(ixgbe_pf_to_dev(adapter), "Reload the VF driver to make this change effective.\n"); + + retval = ixgbe_set_vf_mac(adapter, vf, mac); + if (retval >= 0) { + adapter->vfinfo[vf].pf_set_mac = true; + + if (test_bit(__IXGBE_DOWN, adapter->state)) { + dev_warn(ixgbe_pf_to_dev(adapter), "The VF MAC address has been set, but the PF device is not up.\n"); + dev_warn(ixgbe_pf_to_dev(adapter), "Bring the PF device up before attempting to use the VF device.\n"); + } + } else { + dev_warn(ixgbe_pf_to_dev(adapter), "The VF MAC address was NOT set due to invalid or duplicate MAC address.\n"); + } + } else if (is_zero_ether_addr(mac)) { + unsigned char *vf_mac_addr = + adapter->vfinfo[vf].vf_mac_addresses; + + /* nothing to do */ + if (is_zero_ether_addr(vf_mac_addr)) + return 0; + + dev_info(ixgbe_pf_to_dev(adapter), "removing MAC on VF %d\n", + vf); + + retval = ixgbe_del_mac_filter(adapter, vf_mac_addr, vf); + if (retval >= 0) { + adapter->vfinfo[vf].pf_set_mac = false; + memcpy(vf_mac_addr, mac, ETH_ALEN); + } else { + dev_warn(ixgbe_pf_to_dev(adapter), "Could NOT remove the VF MAC address.\n"); + } + } else { + retval = -EINVAL; + } + return retval; +} + +static int ixgbe_enable_port_vlan(struct ixgbe_adapter *adapter, + int vf, u16 vlan, u8 qos) +{ + struct ixgbe_hw *hw = &adapter->hw; + int err; + + err = ixgbe_set_vf_vlan(adapter, true, vlan, vf); + if (err) + goto out; + + /* Revoke tagless access via VLAN 0 */ + ixgbe_set_vf_vlan(adapter, false, 0, vf); + + ixgbe_set_vmvir(adapter, vlan, qos, vf); + ixgbe_set_vmolr(hw, vf, false); + + /* enable hide vlan on X550 */ + if (hw->mac.type >= ixgbe_mac_X550) + ixgbe_write_qde(adapter, vf, IXGBE_QDE_ENABLE | + IXGBE_QDE_HIDE_VLAN); + adapter->vfinfo[vf].pf_vlan = vlan; + adapter->vfinfo[vf].pf_qos = qos; + dev_info(ixgbe_pf_to_dev(adapter), + "Setting VLAN %d, QOS 0x%x on VF %d\n", vlan, qos, vf); + if (test_bit(__IXGBE_DOWN, adapter->state)) { + dev_warn(ixgbe_pf_to_dev(adapter), "The VF VLAN has been set, but the PF device is not up.\n"); + dev_warn(ixgbe_pf_to_dev(adapter), "Bring the PF device up before attempting to use the VF device.\n"); + } + +out: + return err; +} + +static int ixgbe_disable_port_vlan(struct ixgbe_adapter *adapter, int vf) +{ + struct ixgbe_hw *hw = &adapter->hw; + int err; + + err = ixgbe_set_vf_vlan(adapter, false, + adapter->vfinfo[vf].pf_vlan, vf); + /* Restore tagless access via VLAN 0 */ + ixgbe_set_vf_vlan(adapter, true, 0, vf); + ixgbe_clear_vmvir(adapter, vf); + ixgbe_set_vmolr(hw, vf, true); + + /* disable hide VLAN on X550 */ + if (hw->mac.type >= ixgbe_mac_X550) + ixgbe_write_qde(adapter, vf, IXGBE_QDE_ENABLE); + + adapter->vfinfo[vf].pf_vlan = 0; + adapter->vfinfo[vf].pf_qos = 0; + + return err; +} + +/** + * ixgbe_ndo_set_vf_vlan - Set VLAN configuration for a virtual function (VF) + * @netdev: Network device structure + * @vf: VF index + * @vlan: VLAN ID to be set + * @qos: Quality of Service (QoS) priority + * @vlan_proto: (Optional) VLAN protocol, typically ETH_P_8021Q + * + * This function sets the VLAN configuration for a specified virtual function + * (VF) on the network device. It validates the VLAN ID and QoS values, and + * ensures the VLAN protocol is supported. If a VLAN is already set, it is + * disabled before setting the new configuration. The function handles both + * enabling and disabling of port VLANs for the VF. + * + * Return: 0 on success, -EINVAL if the VF index, VLAN ID, or QoS is invalid, + * or -EPROTONOSUPPORT if the VLAN protocol is unsupported. + */ +#ifdef IFLA_VF_VLAN_INFO_MAX +int ixgbe_ndo_set_vf_vlan(struct net_device *netdev, int vf, u16 vlan, + u8 qos, __be16 vlan_proto) +#else /* IFLA_VF_VLAN_INFO_MAX */ +int ixgbe_ndo_set_vf_vlan(struct net_device *netdev, int vf, u16 vlan, u8 qos) +#endif /* IFLA_VF_VLAN_INFO_MAX */ +{ + int err = 0; + struct ixgbe_adapter *adapter = netdev_priv(netdev); + + /* VLAN IDs accepted range 0-4094 */ + if (vf < 0 || vf >= adapter->num_vfs || + vlan > VLAN_VID_MASK - 1 || qos > 7) + return -EINVAL; + +#ifdef IFLA_VF_VLAN_INFO_MAX + if (vlan_proto != htons(ETH_P_8021Q)) + return -EPROTONOSUPPORT; +#endif + if (vlan || qos) { + /* + * Check if there is already a port VLAN set, if so + * we have to delete the old one first before we + * can set the new one. The usage model had + * previously assumed the user would delete the + * old port VLAN before setting a new one but this + * is not necessarily the case. + */ + if (adapter->vfinfo[vf].pf_vlan) + err = ixgbe_disable_port_vlan(adapter, vf); + if (err) + goto out; + err = ixgbe_enable_port_vlan(adapter, vf, vlan, qos); + + } else { + err = ixgbe_disable_port_vlan(adapter, vf); + } +out: + return err; +} + + +static int ixgbe_link_mbps(struct ixgbe_adapter *adapter) +{ + switch (adapter->link_speed) { + case IXGBE_LINK_SPEED_100_FULL: + return 100; + case IXGBE_LINK_SPEED_1GB_FULL: + return 1000; + case IXGBE_LINK_SPEED_10GB_FULL: + return 10000; + default: + return 0; + } +} + +static void ixgbe_set_vf_rate_limit(struct ixgbe_adapter *adapter, int vf) +{ + struct ixgbe_ring_feature *vmdq = &adapter->ring_feature[RING_F_VMDQ]; + struct ixgbe_hw *hw = &adapter->hw; + u32 bcnrc_val = 0; + u16 queue, queues_per_pool; + u16 tx_rate = adapter->vfinfo[vf].tx_rate; + + if (tx_rate) { + /* start with base link speed value */ + bcnrc_val = adapter->vf_rate_link_speed; + + /* Calculate the rate factor values to set */ + bcnrc_val <<= IXGBE_RTTBCNRC_RF_INT_SHIFT; + bcnrc_val /= tx_rate; + + /* clear everything but the rate factor */ + bcnrc_val &= IXGBE_RTTBCNRC_RF_INT_MASK | + IXGBE_RTTBCNRC_RF_DEC_MASK; + + /* enable the rate scheduler */ + bcnrc_val |= IXGBE_RTTBCNRC_RS_ENA; + } + + /* + * Set global transmit compensation time to the MMW_SIZE in RTTBCNRM + * register. Typically MMW_SIZE=0x014 if 9728-byte jumbo is supported + * and 0x004 otherwise. + */ + switch (hw->mac.type) { + case ixgbe_mac_82599EB: + IXGBE_WRITE_REG(hw, IXGBE_RTTBCNRM, 0x4); + break; + case ixgbe_mac_X540: + IXGBE_WRITE_REG(hw, IXGBE_RTTBCNRM, 0x14); + break; + default: + break; + } + + /* determine how many queues per pool based on VMDq mask */ + queues_per_pool = __ALIGN_MASK(1, ~vmdq->mask); + + /* write value for all Tx queues belonging to VF */ + for (queue = 0; queue < queues_per_pool; queue++) { + unsigned int reg_idx = (vf * queues_per_pool) + queue; + + IXGBE_WRITE_REG(hw, IXGBE_RTTDQSEL, reg_idx); + IXGBE_WRITE_REG(hw, IXGBE_RTTBCNRC, bcnrc_val); + } +} + +void ixgbe_check_vf_rate_limit(struct ixgbe_adapter *adapter) +{ + int i; + + /* VF Tx rate limit was not set */ + if (!adapter->vf_rate_link_speed) + return; + + if (ixgbe_link_mbps(adapter) != adapter->vf_rate_link_speed) { + adapter->vf_rate_link_speed = 0; + dev_info(ixgbe_pf_to_dev(adapter), + "Link speed has been changed. VF Transmit rate is disabled\n"); + } + + for (i = 0; i < adapter->num_vfs; i++) { + if (!adapter->vf_rate_link_speed) + adapter->vfinfo[i].tx_rate = 0; + + ixgbe_set_vf_rate_limit(adapter, i); + } +} + +/** + * ixgbe_ndo_set_vf_bw - Set bandwidth limit for a virtual function (VF) + * @netdev: Network device structure + * @vf: VF index + * @min_tx_rate: Minimum transmit rate (unused) + * @max_tx_rate: Maximum transmit rate in Mbps + * + * This function sets the maximum bandwidth limit for a specified virtual + * function (VF) on the network device. It verifies that the VF is active, + * the link is up, and the link speed is 10 Gbps. The function ensures that + * the specified rate is within valid limits and updates the hardware + * configuration accordingly. + * + * Return: 0 on success, -EINVAL if the VF index is out of range or the rate + * is invalid, or -EOPNOTSUPP if rate limiting is not supported. + */ +#ifdef HAVE_NDO_SET_VF_MIN_MAX_TX_RATE +int ixgbe_ndo_set_vf_bw(struct net_device *netdev, + int vf, + int __always_unused min_tx_rate, + int max_tx_rate) +#else +int ixgbe_ndo_set_vf_bw(struct net_device *netdev, int vf, int max_tx_rate) +#endif /* HAVE_NDO_SET_VF_MIN_MAX_TX_RATE */ +{ + struct ixgbe_adapter *adapter = netdev_priv(netdev); + int link_speed; + + /* verify VF is active */ + if (vf < 0 || vf >= adapter->num_vfs) + return -EINVAL; + + /* verify link is up */ + if (!adapter->link_up) + return -EINVAL; + + /* verify we are linked at 10Gbps */ + link_speed = ixgbe_link_mbps(adapter); + if (link_speed != 10000) + return -EINVAL; + + /* rate limit cannot be less than 10Mbs or greater than link speed */ + if (max_tx_rate && ((max_tx_rate <= 10) || (max_tx_rate > link_speed))) + return -EINVAL; + + /* store values */ + adapter->vf_rate_link_speed = link_speed; + adapter->vfinfo[vf].tx_rate = max_tx_rate; + + /* update hardware configuration */ + ixgbe_set_vf_rate_limit(adapter, vf); + + return 0; +} +#endif /* IFLA_VF_MAX */ + +#if IS_ENABLED(CONFIG_PCI_IOV) +/** + * ixgbe_ndo_set_vf_spoofchk - Enable or disable spoof checking for a VF + * @netdev: Network device structure + * @vf: VF index + * @setting: Boolean value to enable (true) or disable (false) spoof checking + * + * This function enables or disables MAC and VLAN spoof checking for a specified + * virtual function (VF) on the network device. It updates the VF's spoof check + * setting and configures the hardware accordingly. For certain hardware, it + * also configures Ethertype anti-spoofing for LLDP and FC. + * + * Return: 0 on success, or -EINVAL if the VF index is out of range. + */ +int ixgbe_ndo_set_vf_spoofchk(struct net_device *netdev, int vf, bool setting) +{ + struct ixgbe_adapter *adapter = netdev_priv(netdev); + struct ixgbe_hw *hw = &adapter->hw; + + if (vf < 0 || vf >= adapter->num_vfs) + return -EINVAL; + + adapter->vfinfo[vf].spoofchk_enabled = setting; + + /* configure MAC spoofing */ + hw->mac.ops.set_mac_anti_spoofing(hw, setting, vf); + + /* configure VLAN spoofing */ + hw->mac.ops.set_vlan_anti_spoofing(hw, setting, vf); + + /* Ensure LLDP and FC is set for Ethertype Antispoofing if we will be + * calling set_ethertype_anti_spoofing for each VF in loop below + */ + if (hw->mac.ops.set_ethertype_anti_spoofing) { + IXGBE_WRITE_REG(hw, IXGBE_ETQF(IXGBE_ETQF_FILTER_LLDP), + (IXGBE_ETQF_FILTER_EN | + IXGBE_ETQF_TX_ANTISPOOF | + IXGBE_ETH_P_LLDP)); + + IXGBE_WRITE_REG(hw, IXGBE_ETQF(IXGBE_ETQF_FILTER_FC), + (IXGBE_ETQF_FILTER_EN | + IXGBE_ETQF_TX_ANTISPOOF | + ETH_P_PAUSE)); + + hw->mac.ops.set_ethertype_anti_spoofing(hw, setting, vf); + } + + return 0; +} +#endif /* CONFIG_PCI_IOV */ + +/** + * ixgbe_set_vf_rx_tx - Set VF rx tx + * @adapter: Pointer to adapter struct + * @vf: VF identifier + * + * Set or reset correct transmit and receive for vf + **/ +static void ixgbe_set_vf_rx_tx(struct ixgbe_adapter *adapter, int vf) +{ + struct ixgbe_hw *hw = &adapter->hw; + u32 reg_cur_tx, reg_cur_rx, reg_req_tx, reg_req_rx; + u32 reg_offset, vf_shift; + + vf_shift = vf % 32; + reg_offset = vf / 32; + + reg_cur_tx = IXGBE_READ_REG(hw, IXGBE_VFTE(reg_offset)); + reg_cur_rx = IXGBE_READ_REG(hw, IXGBE_VFRE(reg_offset)); + + if (adapter->vfinfo[vf].link_enable) { + reg_req_tx = reg_cur_tx | 1 << vf_shift; + reg_req_rx = reg_cur_rx | 1 << vf_shift; + + } else { + reg_req_tx = reg_cur_tx & ~(1 << vf_shift); + reg_req_rx = reg_cur_rx & ~(1 << vf_shift); + } + + /* + * The 82599 cannot support a mix of jumbo and non-jumbo PF/VFs. + * For more info take a look at ixgbe_set_vf_lpe + */ + if (adapter->hw.mac.type == ixgbe_mac_82599EB) { + struct net_device *dev = adapter->netdev; + int pf_max_frame = dev->mtu + ETH_HLEN; + +#if IS_ENABLED(CONFIG_FCOE) +#ifdef HAVE_NETDEV_FCOE_MTU + if (dev->fcoe_mtu) +#else + if (dev->features & NETIF_F_FCOE_MTU) +#endif + pf_max_frame = max_t(int, pf_max_frame, + IXGBE_FCOE_JUMBO_FRAME_SIZE); +#endif /* CONFIG_FCOE */ + + if (pf_max_frame > ETH_FRAME_LEN) + reg_req_rx = reg_cur_rx & ~(1 << vf_shift); + } + + /* Enable/Disable particular VF */ + if (reg_cur_tx != reg_req_tx) + IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset), reg_req_tx); + if (reg_cur_rx != reg_req_rx) + IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset), reg_req_rx); +} + +#ifdef HAVE_NDO_SET_VF_LINK_STATE + +/** + * ixgbe_set_vf_link_state - Set link state + * @adapter: Pointer to adapter struct + * @vf: VF identifier + * @state: required link state + * + * Set a link force state on/off a single vf + **/ +void ixgbe_set_vf_link_state(struct ixgbe_adapter *adapter, int vf, int state) +{ + adapter->vfinfo[vf].link_state = state; + + switch (state) { + case IFLA_VF_LINK_STATE_AUTO: + if (test_bit(__IXGBE_DOWN, adapter->state)) + adapter->vfinfo[vf].link_enable = false; + else + adapter->vfinfo[vf].link_enable = true; + break; + case IFLA_VF_LINK_STATE_ENABLE: + adapter->vfinfo[vf].link_enable = true; + break; + case IFLA_VF_LINK_STATE_DISABLE: + adapter->vfinfo[vf].link_enable = false; + break; + } + + ixgbe_set_vf_rx_tx(adapter, vf); + + /* restart the VF */ + adapter->vfinfo[vf].clear_to_send = false; + ixgbe_ping_vf(adapter, vf); +} + +/** + * ixgbe_ndo_set_vf_link_state - Set link state + * @netdev: network interface device structure + * @vf: VF identifier + * @state: required link state + * + * Set the link state of a specified VF, regardless of physical link state + **/ +int ixgbe_ndo_set_vf_link_state(struct net_device *netdev, int vf, int state) +{ + struct ixgbe_adapter *adapter = netdev_priv(netdev); + int ret = 0; + + if (vf < 0 || vf >= adapter->num_vfs) { + dev_err(ixgbe_pf_to_dev(adapter), + "NDO set VF link - invalid VF identifier %d\n", vf); + ret = -EINVAL; + goto out; + } + + switch (state) { + case IFLA_VF_LINK_STATE_ENABLE: + dev_info(ixgbe_pf_to_dev(adapter), + "NDO set VF %d link state %d - not supported\n", + vf, state); + break; + case IFLA_VF_LINK_STATE_DISABLE: + dev_info(ixgbe_pf_to_dev(adapter), + "NDO set VF %d link state disable\n", vf); + ixgbe_set_vf_link_state(adapter, vf, state); + break; + case IFLA_VF_LINK_STATE_AUTO: + dev_info(ixgbe_pf_to_dev(adapter), + "NDO set VF %d link state auto\n", vf); + ixgbe_set_vf_link_state(adapter, vf, state); + break; + default: + dev_err(ixgbe_pf_to_dev(adapter), + "NDO set VF %d - invalid link state %d\n", vf, state); + ret = -EINVAL; + } +out: + return ret; +} +#endif /* HAVE_NDO_SET_VF_LINK_STATE */ + +#ifdef IFLA_VF_MAX +#ifdef HAVE_NDO_SET_VF_RSS_QUERY_EN +/** + * ixgbe_ndo_set_vf_rss_query_en - Enable or disable RSS query for a VF + * @netdev: Network device structure + * @vf: VF index + * @setting: Boolean value to enable (true) or disable (false) RSS query + * + * This function enables or disables the Receive Side Scaling (RSS) query + * capability for a specified virtual function (VF) on the network device. + * The operation is supported only for 82599 and X540 devices. + * + * Return: 0 on success, -EINVAL if the VF index is out of range, or + * -EOPNOTSUPP if the operation is not supported on the device. + */ +int ixgbe_ndo_set_vf_rss_query_en(struct net_device *netdev, int vf, + bool setting) +{ + struct ixgbe_adapter *adapter = netdev_priv(netdev); + + /* This operation is currently supported only for 82599 and x540 + * devices. + */ + if (adapter->hw.mac.type < ixgbe_mac_82599EB || + adapter->hw.mac.type >= ixgbe_mac_X550) + return -EOPNOTSUPP; + + if (vf < 0 || vf >= adapter->num_vfs) + return -EINVAL; + + adapter->vfinfo[vf].rss_query_enabled = setting; + + return 0; +} +#endif + +/** + * ixgbe_ndo_get_vf_config - Retrieve configuration for a virtual function (VF) + * @netdev: Network device structure + * @vf: VF index + * @ivi: Pointer to ifla_vf_info structure to be filled with VF configuration + * + * This function retrieves the configuration for a specified virtual function + * (VF) on the network device. It populates the `ifla_vf_info` structure with + * details such as the VF's MAC address, VLAN, QoS, and other attributes. The + * function supports additional parameters based on kernel capabilities. + * + * Return: 0 on success, or -EINVAL if the VF index is out of range. + */ +int ixgbe_ndo_get_vf_config(struct net_device *netdev, + int vf, struct ifla_vf_info *ivi) +{ + struct ixgbe_adapter *adapter = netdev_priv(netdev); + + if (vf < 0 || vf >= adapter->num_vfs) + return -EINVAL; + + ivi->vf = vf; + memcpy(&ivi->mac, adapter->vfinfo[vf].vf_mac_addresses, ETH_ALEN); + +#ifdef HAVE_NDO_SET_VF_MIN_MAX_TX_RATE + ivi->max_tx_rate = adapter->vfinfo[vf].tx_rate; + ivi->min_tx_rate = 0; +#else + ivi->tx_rate = adapter->vfinfo[vf].tx_rate; +#endif /* HAVE_NDO_SET_VF_MIN_MAX_TX_RATE */ + + ivi->vlan = adapter->vfinfo[vf].pf_vlan; + ivi->qos = adapter->vfinfo[vf].pf_qos; + +#ifdef HAVE_NDO_SET_VF_LINK_STATE + ivi->linkstate = adapter->vfinfo[vf].link_state; +#endif +#ifdef HAVE_VF_SPOOFCHK_CONFIGURE + ivi->spoofchk = adapter->vfinfo[vf].spoofchk_enabled; +#endif +#ifdef HAVE_NDO_SET_VF_RSS_QUERY_EN + ivi->rss_query_en = adapter->vfinfo[vf].rss_query_enabled; +#endif +#ifdef HAVE_NDO_SET_VF_TRUST + ivi->trusted = adapter->vfinfo[vf].trusted; +#endif + return 0; +} +#endif /* IFLA_VF_MAX */ diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_sriov.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_sriov.h new file mode 100644 index 00000000000..9ec812f353e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_sriov.h @@ -0,0 +1,76 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 1999 - 2026 Intel Corporation */ + +#ifndef _IXGBE_SRIOV_H_ +#define _IXGBE_SRIOV_H_ + +/* ixgbe driver limit the max number of VFs could be enabled to + * 63 (IXGBE_MAX_VF_FUNCTIONS - 1) + */ +#define IXGBE_MAX_VFS_DRV_LIMIT (IXGBE_MAX_VF_FUNCTIONS - 1) +#define IXGBE_MAX_VFS_1TC IXGBE_MAX_VFS_DRV_LIMIT +#define IXGBE_MAX_VFS_4TC 31 +#define IXGBE_MAX_VFS_8TC 15 + +void ixgbe_restore_vf_multicasts(struct ixgbe_adapter *adapter); +int ixgbe_set_vf_vlan(struct ixgbe_adapter *adapter, int add, int vid, u32 vf); +void ixgbe_set_vmolr(struct ixgbe_hw *hw, u32 vf, bool aupe); +int ixgbe_check_mdd_event(struct ixgbe_adapter *adapter); +void ixgbe_msg_task(struct ixgbe_adapter *adapter); +int ixgbe_set_vf_mac(struct ixgbe_adapter *adapter, + int vf, unsigned char *mac_addr); +void ixgbe_ping_all_vfs(struct ixgbe_adapter *adapter); +void ixgbe_set_all_vfs(struct ixgbe_adapter *adapter); +#ifdef IFLA_VF_MAX +int ixgbe_ndo_set_vf_mac(struct net_device *netdev, int queue, u8 *mac); +#ifdef IFLA_VF_VLAN_INFO_MAX +int ixgbe_ndo_set_vf_vlan(struct net_device *netdev, int queue, u16 vlan, + u8 qos, __be16 vlan_proto); +#else +int ixgbe_ndo_set_vf_vlan(struct net_device *netdev, int queue, u16 vlan, + u8 qos); +#endif +#ifdef HAVE_NDO_SET_VF_MIN_MAX_TX_RATE +int ixgbe_ndo_set_vf_bw(struct net_device *netdev, int vf, int min_tx_rate, + int max_tx_rate); +#else +int ixgbe_ndo_set_vf_bw(struct net_device *netdev, int vf, int tx_rate); +#endif /* HAVE_NDO_SET_VF_MIN_MAX_TX_RATE */ +#ifdef HAVE_NDO_SET_VF_RSS_QUERY_EN +int ixgbe_ndo_set_vf_rss_query_en(struct net_device *netdev, int vf, + bool setting); +#endif +#ifdef HAVE_NDO_SET_VF_TRUST +int ixgbe_ndo_set_vf_trust(struct net_device *netdev, int vf, bool setting); +#endif +int ixgbe_ndo_get_vf_config(struct net_device *netdev, + int vf, struct ifla_vf_info *ivi); +#endif /* IFLA_VF_MAX */ +int ixgbe_disable_sriov(struct ixgbe_adapter *adapter); +#ifdef CONFIG_PCI_IOV +int ixgbe_vf_configuration(struct pci_dev *pdev, unsigned int event_mask); +void ixgbe_enable_sriov(struct ixgbe_adapter *adapter); +int ixgbe_ndo_set_vf_spoofchk(struct net_device *netdev, int vf, bool setting); +#endif +#ifdef HAVE_NDO_SET_VF_LINK_STATE +int ixgbe_ndo_set_vf_link_state(struct net_device *netdev, int vf, int state); +#endif +int ixgbe_pci_sriov_configure(struct pci_dev *dev, int num_vfs); +#ifdef IFLA_VF_MAX +void ixgbe_check_vf_rate_limit(struct ixgbe_adapter *adapter); +#endif /* IFLA_VF_MAX */ +void ixgbe_set_vf_link_state(struct ixgbe_adapter *adapter, int vf, int state); +void ixgbe_dump_registers(struct ixgbe_adapter *adapter); + +/* + * These are defined in ixgbe_type.h on behalf of the VF driver + * but we need them here unwrapped for the PF driver. + */ +#define IXGBE_DEV_ID_E630_VF 0x126B +#define IXGBE_DEV_ID_E610_VF 0x57AD +#define IXGBE_DEV_ID_82599_VF 0x10ED +#define IXGBE_DEV_ID_X540_VF 0x1515 +#define IXGBE_DEV_ID_X550_VF 0x1565 +#define IXGBE_DEV_ID_X550EM_X_VF 0x15A8 +#define IXGBE_DEV_ID_X550EM_A_VF 0x15C5 +#endif /* _IXGBE_SRIOV_H_ */ diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_sysfs.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_sysfs.c new file mode 100644 index 00000000000..dde0dcbe241 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_sysfs.c @@ -0,0 +1,293 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 1999 - 2026 Intel Corporation */ + +#include "ixgbe.h" +#include "ixgbe_common.h" +#include "ixgbe_type.h" + +#ifdef IXGBE_SYSFS + +#include +#include +#include +#include +#include +#include +#include +#ifdef IXGBE_HWMON +#include +#endif + +#ifdef IXGBE_HWMON +/* hwmon callback functions */ +static ssize_t ixgbe_hwmon_show_location(struct device __always_unused *dev, + struct device_attribute *attr, + char *buf) +{ + struct hwmon_attr *ixgbe_attr = container_of(attr, struct hwmon_attr, + dev_attr); + return snprintf(buf, PAGE_SIZE, "loc%u\n", + ixgbe_attr->sensor->location); +} + +static ssize_t ixgbe_hwmon_show_temp(struct device __always_unused *dev, + struct device_attribute *attr, + char *buf) +{ + struct hwmon_attr *ixgbe_attr = container_of(attr, struct hwmon_attr, + dev_attr); + unsigned int value; + + /* reset the temp field */ + ixgbe_attr->hw->mac.ops.get_thermal_sensor_data(ixgbe_attr->hw); + + value = ixgbe_attr->sensor->temp; + + /* display millidegree */ + value *= 1000; + + return snprintf(buf, PAGE_SIZE, "%u\n", value); +} + +static ssize_t ixgbe_hwmon_show_cautionthresh(struct device __always_unused *dev, + struct device_attribute *attr, + char *buf) +{ + struct hwmon_attr *ixgbe_attr = container_of(attr, struct hwmon_attr, + dev_attr); + unsigned int value = ixgbe_attr->sensor->caution_thresh; + + /* display millidegree */ + value *= 1000; + + return snprintf(buf, PAGE_SIZE, "%u\n", value); +} + +static ssize_t ixgbe_hwmon_show_maxopthresh(struct device __always_unused *dev, + struct device_attribute *attr, + char *buf) +{ + struct hwmon_attr *ixgbe_attr = container_of(attr, struct hwmon_attr, + dev_attr); + unsigned int value = ixgbe_attr->sensor->max_op_thresh; + + /* display millidegree */ + value *= 1000; + + return snprintf(buf, PAGE_SIZE, "%u\n", value); +} + +/** + * ixgbe_add_hwmon_attr - Create hwmon attr table for a hwmon sysfs file. + * @adapter: pointer to the adapter structure + * @offset: offset in the eeprom sensor data table + * @type: type of sensor data to display + * + * For each file we want in hwmon's sysfs interface we need a device_attribute + * This is included in our hwmon_attr struct that contains the references to + * the data structures we need to get the data to display. + */ +static int ixgbe_add_hwmon_attr(struct ixgbe_adapter *adapter, + unsigned int offset, int type) { + unsigned int n_attr; + struct hwmon_attr *ixgbe_attr; +#ifdef HAVE_HWMON_DEVICE_REGISTER_WITH_GROUPS + + n_attr = adapter->ixgbe_hwmon_buff->n_hwmon; + ixgbe_attr = &adapter->ixgbe_hwmon_buff->hwmon_list[n_attr]; +#else + int rc; + + n_attr = adapter->ixgbe_hwmon_buff.n_hwmon; + ixgbe_attr = &adapter->ixgbe_hwmon_buff.hwmon_list[n_attr]; +#endif /* HAVE_HWMON_DEVICE_REGISTER_WITH_GROUPS */ + + switch (type) { + case IXGBE_HWMON_TYPE_LOC: + ixgbe_attr->dev_attr.show = ixgbe_hwmon_show_location; + snprintf(ixgbe_attr->name, sizeof(ixgbe_attr->name), + "temp%u_label", offset + 1); + break; + case IXGBE_HWMON_TYPE_TEMP: + ixgbe_attr->dev_attr.show = ixgbe_hwmon_show_temp; + snprintf(ixgbe_attr->name, sizeof(ixgbe_attr->name), + "temp%u_input", offset + 1); + break; + case IXGBE_HWMON_TYPE_CAUTION: + ixgbe_attr->dev_attr.show = ixgbe_hwmon_show_cautionthresh; + snprintf(ixgbe_attr->name, sizeof(ixgbe_attr->name), + "temp%u_max", offset + 1); + break; + case IXGBE_HWMON_TYPE_MAX: + ixgbe_attr->dev_attr.show = ixgbe_hwmon_show_maxopthresh; + snprintf(ixgbe_attr->name, sizeof(ixgbe_attr->name), + "temp%u_crit", offset + 1); + break; + default: + return -EPERM; + } + + /* These always the same regardless of type */ + ixgbe_attr->sensor = + &adapter->hw.mac.thermal_sensor_data.sensor[offset]; + ixgbe_attr->hw = &adapter->hw; + ixgbe_attr->dev_attr.store = NULL; + ixgbe_attr->dev_attr.attr.mode = 0444; + ixgbe_attr->dev_attr.attr.name = ixgbe_attr->name; + +#ifdef HAVE_HWMON_DEVICE_REGISTER_WITH_GROUPS + sysfs_attr_init(&ixgbe_attr->dev_attr.attr); + + adapter->ixgbe_hwmon_buff->attrs[n_attr] = &ixgbe_attr->dev_attr.attr; + + ++adapter->ixgbe_hwmon_buff->n_hwmon; + + return 0; +#else + rc = device_create_file(ixgbe_pf_to_dev(adapter), + &ixgbe_attr->dev_attr); + + if (rc == 0) + ++adapter->ixgbe_hwmon_buff.n_hwmon; + + return rc; +#endif /* HAVE_HWMON_DEVICE_REGISTER_WITH_GROUPS */ +} +#endif /* IXGBE_HWMON */ + +static void ixgbe_sysfs_del_adapter(struct ixgbe_adapter __maybe_unused *adapter) +{ +#ifdef IXGBE_HWMON +#ifndef HAVE_HWMON_DEVICE_REGISTER_WITH_GROUPS + int i; + + if (adapter == NULL) + return; + + for (i = 0; i < adapter->ixgbe_hwmon_buff.n_hwmon; i++) { + device_remove_file(ixgbe_pf_to_dev(adapter), + &adapter->ixgbe_hwmon_buff.hwmon_list[i].dev_attr); + } + + kfree(adapter->ixgbe_hwmon_buff.hwmon_list); + + if (adapter->ixgbe_hwmon_buff.device) + hwmon_device_unregister(adapter->ixgbe_hwmon_buff.device); +#endif /* HAVE_HWMON_DEVICE_REGISTER_WITH_GROUPS */ +#endif /* IXGBE_HWMON */ +} + +/* called from ixgbe_main.c */ +void ixgbe_sysfs_exit(struct ixgbe_adapter *adapter) +{ + ixgbe_sysfs_del_adapter(adapter); +} + +/* called from ixgbe_main.c */ +int ixgbe_sysfs_init(struct ixgbe_adapter *adapter) +{ + int rc = 0; +#ifdef IXGBE_HWMON +#ifdef HAVE_HWMON_DEVICE_REGISTER_WITH_GROUPS + struct hwmon_buff *ixgbe_hwmon; + struct device *hwmon_dev; +#else + struct hwmon_buff *ixgbe_hwmon = &adapter->ixgbe_hwmon_buff; + int n_attrs; +#endif /* HAVE_HWMON_DEVICE_REGISTER_WITH_GROUPS */ + unsigned int i; +#endif /* IXGBE_HWMON */ + +#ifdef IXGBE_HWMON + /* If this method isn't defined we don't support thermals */ + if (adapter->hw.mac.ops.init_thermal_sensor_thresh == NULL) { + goto no_thermal; + } + + /* Don't create thermal hwmon interface if no sensors present */ + if (adapter->hw.mac.ops.init_thermal_sensor_thresh(&adapter->hw)) + goto no_thermal; + +#ifdef HAVE_HWMON_DEVICE_REGISTER_WITH_GROUPS + ixgbe_hwmon = devm_kzalloc(&adapter->pdev->dev, sizeof(*ixgbe_hwmon), + GFP_KERNEL); + + if (!ixgbe_hwmon) { + rc = -ENOMEM; + goto exit; + } + + adapter->ixgbe_hwmon_buff = ixgbe_hwmon; +#else + /* + * Allocation space for max attributs + * max num sensors * values (loc, temp, max, caution) + */ + n_attrs = IXGBE_MAX_SENSORS * 4; + ixgbe_hwmon->hwmon_list = kcalloc(n_attrs, sizeof(struct hwmon_attr), + GFP_KERNEL); + + if (!ixgbe_hwmon->hwmon_list) { + rc = -ENOMEM; + goto err; + } +#endif /* HAVE_HWMON_DEVICE_REGISTER_WITH_GROUPS */ + + for (i = 0; i < IXGBE_MAX_SENSORS; i++) { + /* + * Only create hwmon sysfs entries for sensors that have + * meaningful data for. + */ + if (adapter->hw.mac.thermal_sensor_data.sensor[i].location == 0) + continue; + + /* Bail if any hwmon attr struct fails to initialize */ + rc = ixgbe_add_hwmon_attr(adapter, i, IXGBE_HWMON_TYPE_CAUTION); + if (rc) + goto err; + rc = ixgbe_add_hwmon_attr(adapter, i, IXGBE_HWMON_TYPE_LOC); + if (rc) + goto err; + rc = ixgbe_add_hwmon_attr(adapter, i, IXGBE_HWMON_TYPE_TEMP); + if (rc) + goto err; + rc = ixgbe_add_hwmon_attr(adapter, i, IXGBE_HWMON_TYPE_MAX); + if (rc) + goto err; + } + +#ifdef HAVE_HWMON_DEVICE_REGISTER_WITH_GROUPS + ixgbe_hwmon->groups[0] = &ixgbe_hwmon->group; + ixgbe_hwmon->group.attrs = ixgbe_hwmon->attrs; + + hwmon_dev = devm_hwmon_device_register_with_groups(&adapter->pdev->dev, + "ixgbe", + ixgbe_hwmon, + ixgbe_hwmon->groups); + + if (IS_ERR(hwmon_dev)) { + rc = PTR_ERR(hwmon_dev); + goto exit; + } + +#else + ixgbe_hwmon->device = + hwmon_device_register(ixgbe_pf_to_dev(adapter)); + + if (IS_ERR(ixgbe_hwmon->device)) { + rc = PTR_ERR(ixgbe_hwmon->device); + goto err; + } + +#endif /* HAVE_HWMON_DEVICE_REGISTER_WITH_GROUPS */ +no_thermal: +#endif /* IXGBE_HWMON */ + + goto exit; + +err: + ixgbe_sysfs_del_adapter(adapter); +exit: + return rc; +} +#endif /* IXGBE_SYSFS */ diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_txrx_common.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_txrx_common.h new file mode 100644 index 00000000000..d2c42d37b17 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_txrx_common.h @@ -0,0 +1,76 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 1999 - 2026 Intel Corporation */ + +#ifndef _IXGBE_TXRX_COMMON_H_ +#define _IXGBE_TXRX_COMMON_H_ + +#define IXGBE_TXD_CMD (IXGBE_TXD_CMD_EOP | \ + IXGBE_TXD_CMD_RS) + +#define IXGBE_XDP_PASS 0 +#define IXGBE_XDP_CONSUMED BIT(0) +#define IXGBE_XDP_TX BIT(1) +#define IXGBE_XDP_REDIR BIT(2) + +#define IXGBE_PKT_HDR_PAD (ETH_HLEN + ETH_FCS_LEN + (VLAN_HLEN * 2)) + +void ixgbe_xdp_ring_update_tail(struct ixgbe_ring *ring); +void ixgbe_xdp_ring_update_tail_locked(struct ixgbe_ring *ring); + +#ifdef HAVE_XDP_SUPPORT +#ifdef HAVE_XDP_FRAME_STRUCT +int ixgbe_xmit_xdp_ring(struct ixgbe_ring *ring, struct xdp_frame *xdpf); +#else +int ixgbe_xmit_xdp_ring(struct ixgbe_ring *ring, struct xdp_buff *xdp); +#endif +#ifdef HAVE_AF_XDP_ZC_SUPPORT +void ixgbe_txrx_ring_disable(struct ixgbe_adapter *adapter, int ring); +void ixgbe_txrx_ring_enable(struct ixgbe_adapter *adapter, int ring); + +#ifndef HAVE_NETDEV_BPF_XSK_POOL +struct xdp_umem *ixgbe_xsk_umem(struct ixgbe_adapter *adapter, + struct ixgbe_ring *ring); +int ixgbe_xsk_umem_setup(struct ixgbe_adapter *adapter, struct xdp_umem *umem, + u16 qid); +#else +struct xsk_buff_pool *ixgbe_xsk_umem(struct ixgbe_adapter *adapter, + struct ixgbe_ring *ring); +int ixgbe_xsk_umem_setup(struct ixgbe_adapter *adapter, struct xsk_buff_pool *umem, + u16 qid); +#endif /* HAVE_NETDEV_BPF_XSK_POOL */ + +#ifndef HAVE_MEM_TYPE_XSK_BUFF_POOL +void ixgbe_alloc_rx_buffers_zc(struct ixgbe_ring *rx_ring, u16 cleaned_count); +void ixgbe_zca_free(struct zero_copy_allocator *alloc, unsigned long handle); +#else +bool ixgbe_alloc_rx_buffers_zc(struct ixgbe_ring *rx_ring, u16 cleaned_count); +#endif +int ixgbe_clean_rx_irq_zc(struct ixgbe_q_vector *q_vector, + struct ixgbe_ring *rx_ring, + const int budget); +void ixgbe_xsk_clean_rx_ring(struct ixgbe_ring *rx_ring); +bool ixgbe_clean_xdp_tx_irq(struct ixgbe_q_vector *q_vector, + struct ixgbe_ring *tx_ring); +#ifdef HAVE_NDO_XSK_WAKEUP +int ixgbe_xsk_wakeup(struct net_device *dev, u32 queue_id, u32 flags); +#else +int ixgbe_xsk_async_xmit(struct net_device *dev, u32 queue_id); +#endif +void ixgbe_xsk_clean_tx_ring(struct ixgbe_ring *tx_ring); +bool ixgbe_xsk_any_rx_ring_enabled(struct ixgbe_adapter *adapter); +#endif /* HAVE_AF_XDP_ZC_SUPPORT */ +#endif /* HAVE_XDP_SUPPORT */ + +bool ixgbe_cleanup_headers(struct ixgbe_ring __maybe_unused *rx_ring, + union ixgbe_adv_rx_desc *rx_desc, + struct sk_buff *skb); +void ixgbe_process_skb_fields(struct ixgbe_ring *rx_ring, + union ixgbe_adv_rx_desc *rx_desc, + struct sk_buff *skb); +void ixgbe_rx_skb(struct ixgbe_q_vector *q_vector, + struct ixgbe_ring *rx_ring, + union ixgbe_adv_rx_desc *rx_desc, + struct sk_buff *skb); + +void ixgbe_irq_rearm_queues(struct ixgbe_adapter *adapter, u64 qmask); +#endif /* _IXGBE_TXRX_COMMON_H_ */ diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_type.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_type.h new file mode 100644 index 00000000000..c1ea3e34987 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_type.h @@ -0,0 +1,4428 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 1999 - 2026 Intel Corporation */ + +#ifndef _IXGBE_TYPE_H_ +#define _IXGBE_TYPE_H_ + +/* + * The following is a brief description of the error categories used by the + * ERROR_REPORT* macros. + * + * - IXGBE_ERROR_INVALID_STATE + * This category is for errors which represent a serious failure state that is + * unexpected, and could be potentially harmful to device operation. It should + * not be used for errors relating to issues that can be worked around or + * ignored. + * + * - IXGBE_ERROR_POLLING + * This category is for errors related to polling/timeout issues and should be + * used in any case where the timeout occurred, or a failure to obtain a lock, or + * failure to receive data within the time limit. + * + * - IXGBE_ERROR_CAUTION + * This category should be used for reporting issues that may be the cause of + * other errors, such as temperature warnings. It should indicate an event which + * could be serious, but hasn't necessarily caused problems yet. + * + * - IXGBE_ERROR_SOFTWARE + * This category is intended for errors due to software state preventing + * something. The category is not intended for errors due to bad arguments, or + * due to unsupported features. It should be used when a state occurs which + * prevents action but is not a serious issue. + * + * - IXGBE_ERROR_ARGUMENT + * This category is for when a bad or invalid argument is passed. It should be + * used whenever a function is called and error checking has detected the + * argument is wrong or incorrect. + * + * - IXGBE_ERROR_UNSUPPORTED + * This category is for errors which are due to unsupported circumstances or + * configuration issues. It should not be used when the issue is due to an + * invalid argument, but for when something has occurred that is unsupported + * (Ex: Flow control autonegotiation or an unsupported SFP+ module.) + */ + +#include "ixgbe_osdep.h" +#include "ixgbe_type_e610.h" + +/* Override this by setting IOMEM in your ixgbe_osdep.h header */ +#ifndef IOMEM +#define IOMEM +#endif + +/* Vendor ID */ +#define IXGBE_INTEL_VENDOR_ID 0x8086 + +/* Device IDs */ +#define IXGBE_DEV_ID_82598 0x10B6 +#define IXGBE_DEV_ID_82598_BX 0x1508 +#define IXGBE_DEV_ID_82598AF_DUAL_PORT 0x10C6 +#define IXGBE_DEV_ID_82598AF_SINGLE_PORT 0x10C7 +#define IXGBE_DEV_ID_82598AT 0x10C8 +#define IXGBE_DEV_ID_82598AT2 0x150B +#define IXGBE_DEV_ID_82598EB_SFP_LOM 0x10DB +#define IXGBE_DEV_ID_82598EB_CX4 0x10DD +#define IXGBE_DEV_ID_82598_CX4_DUAL_PORT 0x10EC +#define IXGBE_DEV_ID_82598_DA_DUAL_PORT 0x10F1 +#define IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM 0x10E1 +#define IXGBE_DEV_ID_82598EB_XF_LR 0x10F4 +#define IXGBE_DEV_ID_82599_KX4 0x10F7 +#define IXGBE_DEV_ID_82599_KX4_MEZZ 0x1514 +#define IXGBE_DEV_ID_82599_KR 0x1517 +#define IXGBE_DEV_ID_82599_COMBO_BACKPLANE 0x10F8 +#define IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ 0x000C +#define IXGBE_DEV_ID_82599_CX4 0x10F9 +#define IXGBE_DEV_ID_82599_SFP 0x10FB +#define IXGBE_SUBDEV_ID_82599_SFP 0x11A9 +#define IXGBE_SUBDEV_ID_82599_SFP_WOL0 0x1071 +#define IXGBE_SUBDEV_ID_82599_RNDC 0x1F72 +#define IXGBE_SUBDEV_ID_82599_560FLR 0x17D0 +#define IXGBE_SUBDEV_ID_82599_ECNA_DP 0x0470 +#define IXGBE_SUBDEV_ID_82599_SP_560FLR 0x211B +#define IXGBE_SUBDEV_ID_82599_LOM_SNAP6 0x2159 +#define IXGBE_SUBDEV_ID_82599_SFP_1OCP 0x000D +#define IXGBE_SUBDEV_ID_82599_SFP_2OCP 0x0008 +#define IXGBE_SUBDEV_ID_82599_SFP_LOM_OEM1 0x8976 +#define IXGBE_SUBDEV_ID_82599_SFP_LOM_OEM2 0x06EE +#define IXGBE_DEV_ID_82599_BACKPLANE_FCOE 0x152A +#define IXGBE_DEV_ID_82599_SFP_FCOE 0x1529 +#define IXGBE_DEV_ID_82599_SFP_EM 0x1507 +#define IXGBE_DEV_ID_82599_SFP_SF2 0x154D +#define IXGBE_DEV_ID_82599_SFP_SF_QP 0x154A +#define IXGBE_DEV_ID_82599_QSFP_SF_QP 0x1558 +#define IXGBE_DEV_ID_82599EN_SFP 0x1557 +#define IXGBE_SUBDEV_ID_82599EN_SFP_OCP1 0x0001 +#define IXGBE_DEV_ID_82599_XAUI_LOM 0x10FC +#define IXGBE_DEV_ID_82599_T3_LOM 0x151C +#define IXGBE_DEV_ID_X540T 0x1528 +#define IXGBE_DEV_ID_X540T1 0x1560 +#define IXGBE_DEV_ID_X550T 0x1563 +#define IXGBE_DEV_ID_X550T1 0x15D1 +/* Placeholder value, pending official value. */ +#define IXGBE_DEV_ID_X550EM_A_KR 0x15C2 +#define IXGBE_DEV_ID_X550EM_A_KR_L 0x15C3 +#define IXGBE_DEV_ID_X550EM_A_SFP_N 0x15C4 +#define IXGBE_DEV_ID_X550EM_A_SGMII 0x15C6 +#define IXGBE_DEV_ID_X550EM_A_SGMII_L 0x15C7 +#define IXGBE_DEV_ID_X550EM_A_10G_T 0x15C8 +#define IXGBE_DEV_ID_X550EM_A_QSFP 0x15CA +#define IXGBE_DEV_ID_X550EM_A_QSFP_N 0x15CC +#define IXGBE_DEV_ID_X550EM_A_SFP 0x15CE +#define IXGBE_DEV_ID_X550EM_A_1G_T 0x15E4 +#define IXGBE_DEV_ID_X550EM_A_1G_T_L 0x15E5 +#define IXGBE_DEV_ID_X550EM_X_KX4 0x15AA +#define IXGBE_DEV_ID_X550EM_X_KR 0x15AB +#define IXGBE_DEV_ID_X550EM_X_SFP 0x15AC +#define IXGBE_DEV_ID_X550EM_X_10G_T 0x15AD +#define IXGBE_DEV_ID_X550EM_X_1G_T 0x15AE +#define IXGBE_DEV_ID_X550EM_X_XFI 0x15B0 +#define IXGBE_DEV_ID_E610_BACKPLANE 0x57AE +#define IXGBE_DEV_ID_E610_SFP 0x57AF +#define IXGBE_DEV_ID_E610_10G_T 0x57B0 +#define IXGBE_DEV_ID_E610_2_5G_T 0x57B1 +#define IXGBE_DEV_ID_E610_SGMII 0x57B2 + +#define IXGBE_CAT(r,m) IXGBE_##r##m + +#define IXGBE_BY_MAC(_hw, r) ((_hw)->mvals[IXGBE_CAT(r, _IDX)]) + +/* General Registers */ +#define IXGBE_CTRL 0x00000 +#define IXGBE_STATUS 0x00008 +#define IXGBE_CTRL_EXT 0x00018 +#define IXGBE_ESDP 0x00020 +#define IXGBE_EODSDP 0x00028 +#define IXGBE_I2CCTL_82599 0x00028 +#define IXGBE_I2CCTL IXGBE_I2CCTL_82599 +#define IXGBE_I2CCTL_X540 IXGBE_I2CCTL_82599 +#define IXGBE_I2CCTL_X550 0x15F5C +#define IXGBE_I2CCTL_X550EM_x IXGBE_I2CCTL_X550 +#define IXGBE_I2CCTL_X550EM_a IXGBE_I2CCTL_X550 +#define IXGBE_I2CCTL_BY_MAC(_hw) IXGBE_BY_MAC((_hw), I2CCTL) +#define IXGBE_PHY_GPIO 0x00028 +#define IXGBE_MAC_GPIO 0x00030 +#define IXGBE_PHYINT_STATUS0 0x00100 +#define IXGBE_PHYINT_STATUS1 0x00104 +#define IXGBE_PHYINT_STATUS2 0x00108 +#define IXGBE_LEDCTL 0x00200 +#define IXGBE_FRTIMER 0x00048 +#define IXGBE_TCPTIMER 0x0004C +#define IXGBE_CORESPARE 0x00600 +#define IXGBE_EXVET 0x05078 + +/* NVM Registers */ +#define IXGBE_EEC 0x10010 +#define IXGBE_EEC_X540 IXGBE_EEC +#define IXGBE_EEC_X550 IXGBE_EEC +#define IXGBE_EEC_X550EM_x IXGBE_EEC +#define IXGBE_EEC_X550EM_a 0x15FF8 +#define IXGBE_EEC_BY_MAC(_hw) IXGBE_BY_MAC((_hw), EEC) + +#define IXGBE_EERD 0x10014 +#define IXGBE_EEWR 0x10018 + +#define IXGBE_FLA 0x1001C +#define IXGBE_FLA_X540 IXGBE_FLA +#define IXGBE_FLA_X550 IXGBE_FLA +#define IXGBE_FLA_X550EM_x IXGBE_FLA +#define IXGBE_FLA_X550EM_a 0x15F68 +#define IXGBE_FLA_BY_MAC(_hw) IXGBE_BY_MAC((_hw), FLA) +#define IXGBE_FLA_FL_SIZE_SHIFT_X540 17 +#define IXGBE_FLA_FL_SIZE_SHIFT_X550 12 +#define IXGBE_FLA_FL_SIZE_MASK_X540 (0x7 << IXGBE_FLA_FL_SIZE_SHIFT_X540) +#define IXGBE_FLA_FL_SIZE_MASK_X550 (0x7 << IXGBE_FLA_FL_SIZE_SHIFT_X550) + +#define IXGBE_EEMNGCTL 0x10110 +#define IXGBE_EEMNGDATA 0x10114 +#define IXGBE_FLMNGCTL 0x10118 +#define IXGBE_FLMNGDATA 0x1011C +#define IXGBE_FLMNGCNT 0x10120 +#define IXGBE_FLOP 0x1013C + +#define IXGBE_GRC 0x10200 +#define IXGBE_GRC_X540 IXGBE_GRC +#define IXGBE_GRC_X550 IXGBE_GRC +#define IXGBE_GRC_X550EM_x IXGBE_GRC +#define IXGBE_GRC_X550EM_a 0x15F64 +#define IXGBE_GRC_BY_MAC(_hw) IXGBE_BY_MAC((_hw), GRC) + +#define IXGBE_SRAMREL 0x10210 +#define IXGBE_SRAMREL_X540 IXGBE_SRAMREL +#define IXGBE_SRAMREL_X550 IXGBE_SRAMREL +#define IXGBE_SRAMREL_X550EM_x IXGBE_SRAMREL +#define IXGBE_SRAMREL_X550EM_a 0x15F6C +#define IXGBE_SRAMREL_BY_MAC(_hw) IXGBE_BY_MAC((_hw), SRAMREL) + +#define IXGBE_PHYDBG 0x10218 + +/* General Receive Control */ +#define IXGBE_GRC_MNG 0x00000001 /* Manageability Enable */ +#define IXGBE_GRC_APME 0x00000002 /* APM enabled in EEPROM */ + +#define IXGBE_VPDDIAG0 0x10204 +#define IXGBE_VPDDIAG1 0x10208 + +/* I2CCTL Bit Masks */ +#define IXGBE_I2C_CLK_IN 0x00000001 +#define IXGBE_I2C_CLK_IN_X540 IXGBE_I2C_CLK_IN +#define IXGBE_I2C_CLK_IN_X550 0x00004000 +#define IXGBE_I2C_CLK_IN_X550EM_x IXGBE_I2C_CLK_IN_X550 +#define IXGBE_I2C_CLK_IN_X550EM_a IXGBE_I2C_CLK_IN_X550 +#define IXGBE_I2C_CLK_IN_BY_MAC(_hw) IXGBE_BY_MAC((_hw), I2C_CLK_IN) + +#define IXGBE_I2C_CLK_OUT 0x00000002 +#define IXGBE_I2C_CLK_OUT_X540 IXGBE_I2C_CLK_OUT +#define IXGBE_I2C_CLK_OUT_X550 0x00000200 +#define IXGBE_I2C_CLK_OUT_X550EM_x IXGBE_I2C_CLK_OUT_X550 +#define IXGBE_I2C_CLK_OUT_X550EM_a IXGBE_I2C_CLK_OUT_X550 +#define IXGBE_I2C_CLK_OUT_BY_MAC(_hw) IXGBE_BY_MAC((_hw), I2C_CLK_OUT) + +#define IXGBE_I2C_DATA_IN 0x00000004 +#define IXGBE_I2C_DATA_IN_X540 IXGBE_I2C_DATA_IN +#define IXGBE_I2C_DATA_IN_X550 0x00001000 +#define IXGBE_I2C_DATA_IN_X550EM_x IXGBE_I2C_DATA_IN_X550 +#define IXGBE_I2C_DATA_IN_X550EM_a IXGBE_I2C_DATA_IN_X550 +#define IXGBE_I2C_DATA_IN_BY_MAC(_hw) IXGBE_BY_MAC((_hw), I2C_DATA_IN) + +#define IXGBE_I2C_DATA_OUT 0x00000008 +#define IXGBE_I2C_DATA_OUT_X540 IXGBE_I2C_DATA_OUT +#define IXGBE_I2C_DATA_OUT_X550 0x00000400 +#define IXGBE_I2C_DATA_OUT_X550EM_x IXGBE_I2C_DATA_OUT_X550 +#define IXGBE_I2C_DATA_OUT_X550EM_a IXGBE_I2C_DATA_OUT_X550 +#define IXGBE_I2C_DATA_OUT_BY_MAC(_hw) IXGBE_BY_MAC((_hw), I2C_DATA_OUT) + +#define IXGBE_I2C_DATA_OE_N_EN 0 +#define IXGBE_I2C_DATA_OE_N_EN_X540 IXGBE_I2C_DATA_OE_N_EN +#define IXGBE_I2C_DATA_OE_N_EN_X550 0x00000800 +#define IXGBE_I2C_DATA_OE_N_EN_X550EM_x IXGBE_I2C_DATA_OE_N_EN_X550 +#define IXGBE_I2C_DATA_OE_N_EN_X550EM_a IXGBE_I2C_DATA_OE_N_EN_X550 +#define IXGBE_I2C_DATA_OE_N_EN_BY_MAC(_hw) IXGBE_BY_MAC((_hw), I2C_DATA_OE_N_EN) + +#define IXGBE_I2C_BB_EN 0 +#define IXGBE_I2C_BB_EN_X540 IXGBE_I2C_BB_EN +#define IXGBE_I2C_BB_EN_X550 0x00000100 +#define IXGBE_I2C_BB_EN_X550EM_x IXGBE_I2C_BB_EN_X550 +#define IXGBE_I2C_BB_EN_X550EM_a IXGBE_I2C_BB_EN_X550 +#define IXGBE_I2C_BB_EN_BY_MAC(_hw) IXGBE_BY_MAC((_hw), I2C_BB_EN) + +#define IXGBE_I2C_CLK_OE_N_EN 0 +#define IXGBE_I2C_CLK_OE_N_EN_X540 IXGBE_I2C_CLK_OE_N_EN +#define IXGBE_I2C_CLK_OE_N_EN_X550 0x00002000 +#define IXGBE_I2C_CLK_OE_N_EN_X550EM_x IXGBE_I2C_CLK_OE_N_EN_X550 +#define IXGBE_I2C_CLK_OE_N_EN_X550EM_a IXGBE_I2C_CLK_OE_N_EN_X550 +#define IXGBE_I2C_CLK_OE_N_EN_BY_MAC(_hw) IXGBE_BY_MAC((_hw), I2C_CLK_OE_N_EN) +#define IXGBE_I2C_CLOCK_STRETCHING_TIMEOUT 500 + +#define IXGBE_I2C_THERMAL_SENSOR_ADDR 0xF8 +#define IXGBE_EMC_INTERNAL_DATA 0x00 +#define IXGBE_EMC_INTERNAL_THERM_LIMIT 0x20 +#define IXGBE_EMC_DIODE1_DATA 0x01 +#define IXGBE_EMC_DIODE1_THERM_LIMIT 0x19 +#define IXGBE_EMC_DIODE2_DATA 0x23 +#define IXGBE_EMC_DIODE2_THERM_LIMIT 0x1A + +#define IXGBE_MAX_SENSORS 3 + +struct ixgbe_thermal_diode_data { + u8 location; + u8 temp; + u8 caution_thresh; + u8 max_op_thresh; +}; + +struct ixgbe_thermal_sensor_data { + struct ixgbe_thermal_diode_data sensor[IXGBE_MAX_SENSORS]; +}; + +#define NVM_OROM_OFFSET 0x17 +#define NVM_OROM_BLK_LOW 0x83 +#define NVM_OROM_BLK_HI 0x84 +#define NVM_OROM_PATCH_MASK 0xFF +#define NVM_OROM_SHIFT 8 + +#define NVM_VER_MASK 0x00FF /* version mask */ +#define NVM_VER_SHIFT 8 /* version bit shift */ +#define NVM_OEM_PROD_VER_PTR 0x1B /* OEM Product version block pointer */ +#define NVM_OEM_PROD_VER_CAP_OFF 0x1 /* OEM Product version format offset */ +#define NVM_OEM_PROD_VER_OFF_L 0x2 /* OEM Product version offset low */ +#define NVM_OEM_PROD_VER_OFF_H 0x3 /* OEM Product version offset high */ +#define NVM_OEM_PROD_VER_CAP_MASK 0xF /* OEM Product version cap mask */ +#define NVM_OEM_PROD_VER_MOD_LEN 0x3 /* OEM Product version module length */ +#define NVM_ETK_OFF_LOW 0x2D /* version low order word */ +#define NVM_ETK_OFF_HI 0x2E /* version high order word */ +#define NVM_ETK_SHIFT 16 /* high version word shift */ +#define NVM_VER_INVALID 0xFFFF +#define NVM_ETK_VALID 0x8000 +#define NVM_INVALID_PTR 0xFFFF +#define NVM_VER_SIZE 32 /* version sting size */ + +struct ixgbe_nvm_version { + u32 etk_id; + u8 nvm_major; + u16 nvm_minor; + u8 nvm_id; + + bool oem_valid; + u8 oem_major; + u8 oem_minor; + u16 oem_release; + + bool or_valid; + u8 or_major; + u16 or_build; + u8 or_patch; + +}; + +/* Interrupt Registers */ +#define IXGBE_EICR 0x00800 +#define IXGBE_EICS 0x00808 +#define IXGBE_EIMS 0x00880 +#define IXGBE_EIMC 0x00888 +#define IXGBE_EIAC 0x00810 +#define IXGBE_EIAM 0x00890 +#define IXGBE_EICS_EX(_i) (0x00A90 + (_i) * 4) +#define IXGBE_EIMS_EX(_i) (0x00AA0 + (_i) * 4) +#define IXGBE_EIMC_EX(_i) (0x00AB0 + (_i) * 4) +#define IXGBE_EIAM_EX(_i) (0x00AD0 + (_i) * 4) +/* 82599 EITR is only 12 bits, with the lower 3 always zero */ +/* + * 82598 EITR is 16 bits but set the limits based on the max + * supported by all ixgbe hardware + */ +#define IXGBE_MAX_INT_RATE 488281 +#define IXGBE_MIN_INT_RATE 956 +#define IXGBE_MAX_EITR 0x00000FF8 +#define IXGBE_MIN_EITR 8 +#define IXGBE_EITR(_i) (((_i) <= 23) ? (0x00820 + ((_i) * 4)) : \ + (0x012300 + (((_i) - 24) * 4))) +#define IXGBE_EITR_ITR_INT_MASK 0x00000FF8 +#define IXGBE_EITR_LLI_MOD 0x00008000 +#define IXGBE_EITR_CNT_WDIS 0x80000000 +#define IXGBE_IVAR(_i) (0x00900 + ((_i) * 4)) /* 24 at 0x900-0x960 */ +#define IXGBE_IVAR_MISC 0x00A00 /* misc MSI-X interrupt causes */ +#define IXGBE_EITRSEL 0x00894 +#define IXGBE_MSIXT 0x00000 /* MSI-X Table. 0x0000 - 0x01C */ +#define IXGBE_MSIXPBA 0x02000 /* MSI-X Pending bit array */ +#define IXGBE_PBACL(_i) (((_i) == 0) ? (0x11068) : (0x110C0 + ((_i) * 4))) +#define IXGBE_GPIE 0x00898 + +/* Flow Control Registers */ +#define IXGBE_FCADBUL 0x03210 +#define IXGBE_FCADBUH 0x03214 +#define IXGBE_FCAMACL 0x04328 +#define IXGBE_FCAMACH 0x0432C +#define IXGBE_FCRTH_82599(_i) (0x03260 + ((_i) * 4)) /* 8 of these (0-7) */ +#define IXGBE_FCRTL_82599(_i) (0x03220 + ((_i) * 4)) /* 8 of these (0-7) */ +#define IXGBE_PFCTOP 0x03008 +#define IXGBE_FCTTV(_i) (0x03200 + ((_i) * 4)) /* 4 of these (0-3) */ +#define IXGBE_FCRTL(_i) (0x03220 + ((_i) * 8)) /* 8 of these (0-7) */ +#define IXGBE_FCRTH(_i) (0x03260 + ((_i) * 8)) /* 8 of these (0-7) */ +#define IXGBE_FCRTV 0x032A0 +#define IXGBE_FCCFG 0x03D00 +#define IXGBE_TFCS 0x0CE00 + +/* Receive DMA Registers */ +#define IXGBE_RDBAL(_i) (((_i) < 64) ? (0x01000 + ((_i) * 0x40)) : \ + (0x0D000 + (((_i) - 64) * 0x40))) +#define IXGBE_RDBAH(_i) (((_i) < 64) ? (0x01004 + ((_i) * 0x40)) : \ + (0x0D004 + (((_i) - 64) * 0x40))) +#define IXGBE_RDLEN(_i) (((_i) < 64) ? (0x01008 + ((_i) * 0x40)) : \ + (0x0D008 + (((_i) - 64) * 0x40))) +#define IXGBE_RDH(_i) (((_i) < 64) ? (0x01010 + ((_i) * 0x40)) : \ + (0x0D010 + (((_i) - 64) * 0x40))) +#define IXGBE_RDT(_i) (((_i) < 64) ? (0x01018 + ((_i) * 0x40)) : \ + (0x0D018 + (((_i) - 64) * 0x40))) +#define IXGBE_RXDCTL(_i) (((_i) < 64) ? (0x01028 + ((_i) * 0x40)) : \ + (0x0D028 + (((_i) - 64) * 0x40))) +#define IXGBE_RSCCTL(_i) (((_i) < 64) ? (0x0102C + ((_i) * 0x40)) : \ + (0x0D02C + (((_i) - 64) * 0x40))) +#define IXGBE_RSCDBU 0x03028 +#define IXGBE_RDDCC 0x02F20 +#define IXGBE_RXMEMWRAP 0x03190 +#define IXGBE_STARCTRL 0x03024 +/* + * Split and Replication Receive Control Registers + * 00-15 : 0x02100 + n*4 + * 16-64 : 0x01014 + n*0x40 + * 64-127: 0x0D014 + (n-64)*0x40 + */ +#define IXGBE_SRRCTL(_i) (((_i) <= 15) ? (0x02100 + ((_i) * 4)) : \ + (((_i) < 64) ? (0x01014 + ((_i) * 0x40)) : \ + (0x0D014 + (((_i) - 64) * 0x40)))) +/* + * Rx DCA Control Register: + * 00-15 : 0x02200 + n*4 + * 16-64 : 0x0100C + n*0x40 + * 64-127: 0x0D00C + (n-64)*0x40 + */ +#define IXGBE_DCA_RXCTRL(_i) (((_i) <= 15) ? (0x02200 + ((_i) * 4)) : \ + (((_i) < 64) ? (0x0100C + ((_i) * 0x40)) : \ + (0x0D00C + (((_i) - 64) * 0x40)))) +#define IXGBE_RDRXCTL 0x02F00 +/* 8 of these 0x03C00 - 0x03C1C */ +#define IXGBE_RXPBSIZE(_i) (0x03C00 + ((_i) * 4)) +#define IXGBE_RXCTRL 0x03000 +#define IXGBE_DROPEN 0x03D04 +#define IXGBE_RXPBSIZE_SHIFT 10 +#define IXGBE_RXPBSIZE_MASK 0x000FFC00 + +/* Receive Registers */ +#define IXGBE_RXCSUM 0x05000 +#define IXGBE_RFCTL 0x05008 +#define IXGBE_DRECCCTL 0x02F08 +#define IXGBE_DRECCCTL_DISABLE 0 +#define IXGBE_DRECCCTL2 0x02F8C + +/* Multicast Table Array - 128 entries */ +#define IXGBE_MTA(_i) (0x05200 + ((_i) * 4)) +#define IXGBE_RAL(_i) (((_i) <= 15) ? (0x05400 + ((_i) * 8)) : \ + (0x0A200 + ((_i) * 8))) +#define IXGBE_RAH(_i) (((_i) <= 15) ? (0x05404 + ((_i) * 8)) : \ + (0x0A204 + ((_i) * 8))) +#define IXGBE_MPSAR_LO(_i) (0x0A600 + ((_i) * 8)) +#define IXGBE_MPSAR_HI(_i) (0x0A604 + ((_i) * 8)) +/* Packet split receive type */ +#define IXGBE_PSRTYPE(_i) (((_i) <= 15) ? (0x05480 + ((_i) * 4)) : \ + (0x0EA00 + ((_i) * 4))) +/* array of 4096 1-bit vlan filters */ +#define IXGBE_VFTA(_i) (0x0A000 + ((_i) * 4)) +/*array of 4096 4-bit vlan vmdq indices */ +#define IXGBE_VFTAVIND(_j, _i) (0x0A200 + ((_j) * 0x200) + ((_i) * 4)) +#define IXGBE_FCTRL 0x05080 +#define IXGBE_VLNCTRL 0x05088 +#define IXGBE_MCSTCTRL 0x05090 +#define IXGBE_MRQC 0x05818 +#define IXGBE_SAQF(_i) (0x0E000 + ((_i) * 4)) /* Source Address Queue Filter */ +#define IXGBE_DAQF(_i) (0x0E200 + ((_i) * 4)) /* Dest. Address Queue Filter */ +#define IXGBE_SDPQF(_i) (0x0E400 + ((_i) * 4)) /* Src Dest. Addr Queue Filter */ +#define IXGBE_FTQF(_i) (0x0E600 + ((_i) * 4)) /* Five Tuple Queue Filter */ +#define IXGBE_ETQF(_i) (0x05128 + ((_i) * 4)) /* EType Queue Filter */ +#define IXGBE_ETQS(_i) (0x0EC00 + ((_i) * 4)) /* EType Queue Select */ +#define IXGBE_SYNQF 0x0EC30 /* SYN Packet Queue Filter */ +#define IXGBE_RQTC 0x0EC70 +#define IXGBE_MTQC 0x08120 +#define IXGBE_VLVF(_i) (0x0F100 + ((_i) * 4)) /* 64 of these (0-63) */ +#define IXGBE_VLVFB(_i) (0x0F200 + ((_i) * 4)) /* 128 of these (0-127) */ +#define IXGBE_VMVIR(_i) (0x08000 + ((_i) * 4)) /* 64 of these (0-63) */ +#define IXGBE_PFFLPL 0x050B0 +#define IXGBE_PFFLPH 0x050B4 +#define IXGBE_VT_CTL 0x051B0 +#define IXGBE_PFMAILBOX(_i) (0x04B00 + (4 * (_i))) /* 64 total */ +/* 64 Mailboxes, 16 DW each */ +#define IXGBE_PFMBMEM(_i) (0x13000 + (64 * (_i))) +#define IXGBE_PFMBICR_INDEX(_i) ((_i) >> 4) +#define IXGBE_PFMBICR_SHIFT(_i) ((_i) % 16) +#define IXGBE_PFMBICR(_i) (0x00710 + (4 * (_i))) /* 4 total */ +#define IXGBE_PFMBIMR(_i) (0x00720 + (4 * (_i))) /* 4 total */ +#define IXGBE_PFVFLRE(_i) ((((_i) & 1) ? 0x001C0 : 0x00600)) +#define IXGBE_PFVFLREC(_i) (0x00700 + ((_i) * 4)) +#define IXGBE_PFVFLRE_INDEX(_i) ((_i) >> 5) +#define IXGBE_PFVFLRE_SHIFT(_i) ((_i) % 32) +#define IXGBE_VFRE(_i) (0x051E0 + ((_i) * 4)) +#define IXGBE_VFTE(_i) (0x08110 + ((_i) * 4)) +#define IXGBE_VMECM(_i) (0x08790 + ((_i) * 4)) +#define IXGBE_QDE 0x2F04 +#define IXGBE_VMTXSW(_i) (0x05180 + ((_i) * 4)) /* 2 total */ +#define IXGBE_VMOLR(_i) (0x0F000 + ((_i) * 4)) /* 64 total */ +#define IXGBE_UTA(_i) (0x0F400 + ((_i) * 4)) +#define IXGBE_MRCTL(_i) (0x0F600 + ((_i) * 4)) +#define IXGBE_VMRVLAN(_i) (0x0F610 + ((_i) * 4)) +#define IXGBE_VMRVM(_i) (0x0F630 + ((_i) * 4)) +#define IXGBE_LVMMC_RX 0x2FA8 +#define IXGBE_LVMMC_TX 0x8108 +#define IXGBE_LMVM_RX 0x2FA4 +#define IXGBE_LMVM_TX 0x8124 +#define IXGBE_WQBR_RX(_i) (0x2FB0 + ((_i) * 4)) /* 4 total */ +#define IXGBE_WQBR_TX(_i) (0x8130 + ((_i) * 4)) /* 4 total */ +#define IXGBE_L34T_IMIR(_i) (0x0E800 + ((_i) * 4)) /*128 of these (0-127)*/ +#define IXGBE_RXFECCERR0 0x051B8 +#define IXGBE_LLITHRESH 0x0EC90 +#define IXGBE_IMIR(_i) (0x05A80 + ((_i) * 4)) /* 8 of these (0-7) */ +#define IXGBE_IMIREXT(_i) (0x05AA0 + ((_i) * 4)) /* 8 of these (0-7) */ +#define IXGBE_IMIRVP 0x05AC0 +#define IXGBE_VMD_CTL 0x0581C +#define IXGBE_RETA(_i) (0x05C00 + ((_i) * 4)) /* 32 of these (0-31) */ +#define IXGBE_ERETA(_i) (0x0EE80 + ((_i) * 4)) /* 96 of these (0-95) */ +#define IXGBE_RSSRK(_i) (0x05C80 + ((_i) * 4)) /* 10 of these (0-9) */ + +/* Registers for setting up RSS on X550 with SRIOV + * _p - pool number (0..63) + * _i - index (0..10 for PFVFRSSRK, 0..15 for PFVFRETA) + */ +#define IXGBE_PFVFMRQC(_p) (0x03400 + ((_p) * 4)) +#define IXGBE_PFVFRSSRK(_i, _p) (0x018000 + ((_i) * 4) + ((_p) * 0x40)) +#define IXGBE_PFVFRETA(_i, _p) (0x019000 + ((_i) * 4) + ((_p) * 0x40)) + +/* Flow Director registers */ +#define IXGBE_FDIRCTRL 0x0EE00 +#define IXGBE_FDIRHKEY 0x0EE68 +#define IXGBE_FDIRSKEY 0x0EE6C +#define IXGBE_FDIRDIP4M 0x0EE3C +#define IXGBE_FDIRSIP4M 0x0EE40 +#define IXGBE_FDIRTCPM 0x0EE44 +#define IXGBE_FDIRUDPM 0x0EE48 +#define IXGBE_FDIRSCTPM 0x0EE78 +#define IXGBE_FDIRIP6M 0x0EE74 +#define IXGBE_FDIRM 0x0EE70 + +/* Flow Director Stats registers */ +#define IXGBE_FDIRFREE 0x0EE38 +#define IXGBE_FDIRLEN 0x0EE4C +#define IXGBE_FDIRUSTAT 0x0EE50 +#define IXGBE_FDIRFSTAT 0x0EE54 +#define IXGBE_FDIRMATCH 0x0EE58 +#define IXGBE_FDIRMISS 0x0EE5C + +/* Flow Director Programming registers */ +#define IXGBE_FDIRSIPv6(_i) (0x0EE0C + ((_i) * 4)) /* 3 of these (0-2) */ +#define IXGBE_FDIRIPSA 0x0EE18 +#define IXGBE_FDIRIPDA 0x0EE1C +#define IXGBE_FDIRPORT 0x0EE20 +#define IXGBE_FDIRVLAN 0x0EE24 +#define IXGBE_FDIRHASH 0x0EE28 +#define IXGBE_FDIRCMD 0x0EE2C + +/* Transmit DMA registers */ +#define IXGBE_TDBAL(_i) (0x06000 + ((_i) * 0x40)) /* 32 of them (0-31)*/ +#define IXGBE_TDBAH(_i) (0x06004 + ((_i) * 0x40)) +#define IXGBE_TDLEN(_i) (0x06008 + ((_i) * 0x40)) +#define IXGBE_TDH(_i) (0x06010 + ((_i) * 0x40)) +#define IXGBE_TDT(_i) (0x06018 + ((_i) * 0x40)) +#define IXGBE_TXDCTL(_i) (0x06028 + ((_i) * 0x40)) +#define IXGBE_TDWBAL(_i) (0x06038 + ((_i) * 0x40)) +#define IXGBE_TDWBAH(_i) (0x0603C + ((_i) * 0x40)) +#define IXGBE_DTXCTL 0x07E00 + +#define IXGBE_DMATXCTL 0x04A80 +#define IXGBE_PFVFSPOOF(_i) (0x08200 + ((_i) * 4)) /* 8 of these 0 - 7 */ +#define IXGBE_PFDTXGSWC 0x08220 +#define IXGBE_DTXMXSZRQ 0x08100 +#define IXGBE_DTXTCPFLGL 0x04A88 +#define IXGBE_DTXTCPFLGH 0x04A8C +#define IXGBE_LBDRPEN 0x0CA00 +#define IXGBE_TXPBTHRESH(_i) (0x04950 + ((_i) * 4)) /* 8 of these 0 - 7 */ + +#define IXGBE_DMATXCTL_TE 0x1 /* Transmit Enable */ +#define IXGBE_DMATXCTL_NS 0x2 /* No Snoop LSO hdr buffer */ +#define IXGBE_DMATXCTL_GDV 0x8 /* Global Double VLAN */ +#define IXGBE_DMATXCTL_MDP_EN 0x20 /* Bit 5 */ +#define IXGBE_DMATXCTL_MBINTEN 0x40 /* Bit 6 */ +#define IXGBE_DMATXCTL_VT_SHIFT 16 /* VLAN EtherType */ + +#define IXGBE_PFDTXGSWC_VT_LBEN 0x1 /* Local L2 VT switch enable */ + +/* Anti-spoofing defines */ +#define IXGBE_SPOOF_MACAS_MASK 0xFF +#define IXGBE_SPOOF_VLANAS_MASK 0xFF00 +#define IXGBE_SPOOF_VLANAS_SHIFT 8 +#define IXGBE_SPOOF_ETHERTYPEAS 0xFF000000 +#define IXGBE_SPOOF_ETHERTYPEAS_SHIFT 16 +#define IXGBE_PFVFSPOOF_REG_COUNT 8 +/* 16 of these (0-15) */ +#define IXGBE_DCA_TXCTRL(_i) (0x07200 + ((_i) * 4)) +/* Tx DCA Control register : 128 of these (0-127) */ +#define IXGBE_DCA_TXCTRL_82599(_i) (0x0600C + ((_i) * 0x40)) +#define IXGBE_TIPG 0x0CB00 +#define IXGBE_TXPBSIZE(_i) (0x0CC00 + ((_i) * 4)) /* 8 of these */ +#define IXGBE_MNGTXMAP 0x0CD10 +#define IXGBE_TIPG_FIBER_DEFAULT 3 +#define IXGBE_TXPBSIZE_SHIFT 10 + +/* Wake up registers */ +#define IXGBE_WUC 0x05800 +#define IXGBE_WUFC 0x05808 +#define IXGBE_WUS 0x05810 +#define IXGBE_IPAV 0x05838 +#define IXGBE_IP4AT 0x05840 /* IPv4 table 0x5840-0x5858 */ +#define IXGBE_IP6AT 0x05880 /* IPv6 table 0x5880-0x588F */ + +#define IXGBE_WUPL 0x05900 +#define IXGBE_WUPM 0x05A00 /* wake up pkt memory 0x5A00-0x5A7C */ +#define IXGBE_PROXYS 0x05F60 /* Proxying Status Register */ +#define IXGBE_PROXYFC 0x05F64 /* Proxying Filter Control Register */ +#define IXGBE_VXLANCTRL 0x0000507C /* Rx filter VXLAN UDPPORT Register */ + +/* masks for accessing VXLAN and GENEVE UDP ports */ +#define IXGBE_VXLANCTRL_VXLAN_UDPPORT_MASK 0x0000ffff /* VXLAN port */ +#define IXGBE_VXLANCTRL_GENEVE_UDPPORT_MASK 0xffff0000 /* GENEVE port */ +#define IXGBE_VXLANCTRL_ALL_UDPPORT_MASK 0xffffffff /* GENEVE/VXLAN */ +#define IXGBE_VXLANCTRL_GENEVE_UDPPORT_SHIFT 16 + +#define IXGBE_FHFT(_n) (0x09000 + ((_n) * 0x100)) /* Flex host filter table */ +/* Ext Flexible Host Filter Table */ +#define IXGBE_FHFT_EXT(_n) (0x09800 + ((_n) * 0x100)) +#define IXGBE_FHFT_EXT_X550(_n) (0x09600 + ((_n) * 0x100)) + +/* Four Flexible Filters are supported */ +#define IXGBE_FLEXIBLE_FILTER_COUNT_MAX 4 +/* Six Flexible Filters are supported */ +#define IXGBE_FLEXIBLE_FILTER_COUNT_MAX_6 6 +/* Eight Flexible Filters are supported */ +#define IXGBE_FLEXIBLE_FILTER_COUNT_MAX_8 8 +#define IXGBE_EXT_FLEXIBLE_FILTER_COUNT_MAX 2 + +/* Each Flexible Filter is at most 128 (0x80) bytes in length */ +#define IXGBE_FLEXIBLE_FILTER_SIZE_MAX 128 +#define IXGBE_FHFT_LENGTH_OFFSET 0xFC /* Length byte in FHFT */ +#define IXGBE_FHFT_LENGTH_MASK 0x0FF /* Length in lower byte */ + +/* Definitions for power management and wakeup registers */ +/* Wake Up Control */ +#define IXGBE_WUC_PME_EN 0x00000002 /* PME Enable */ +#define IXGBE_WUC_PME_STATUS 0x00000004 /* PME Status */ +#define IXGBE_WUC_WKEN 0x00000010 /* Enable PE_WAKE_N pin assertion */ + +/* Wake Up Filter Control */ +#define IXGBE_WUFC_LNKC 0x00000001 /* Link Status Change Wakeup Enable */ +#define IXGBE_WUFC_MAG 0x00000002 /* Magic Packet Wakeup Enable */ +#define IXGBE_WUFC_EX 0x00000004 /* Directed Exact Wakeup Enable */ +#define IXGBE_WUFC_MC 0x00000008 /* Directed Multicast Wakeup Enable */ +#define IXGBE_WUFC_BC 0x00000010 /* Broadcast Wakeup Enable */ +#define IXGBE_WUFC_ARP 0x00000020 /* ARP Request Packet Wakeup Enable */ +#define IXGBE_WUFC_IPV4 0x00000040 /* Directed IPv4 Packet Wakeup Enable */ +#define IXGBE_WUFC_IPV6 0x00000080 /* Directed IPv6 Packet Wakeup Enable */ +#define IXGBE_WUFC_MNG 0x00000100 /* Directed Mgmt Packet Wakeup Enable */ + +#define IXGBE_WUFC_IGNORE_TCO 0x00008000 /* Ignore WakeOn TCO packets */ +#define IXGBE_WUFC_FLX0 0x00010000 /* Flexible Filter 0 Enable */ +#define IXGBE_WUFC_FLX1 0x00020000 /* Flexible Filter 1 Enable */ +#define IXGBE_WUFC_FLX2 0x00040000 /* Flexible Filter 2 Enable */ +#define IXGBE_WUFC_FLX3 0x00080000 /* Flexible Filter 3 Enable */ +#define IXGBE_WUFC_FLX4 0x00100000 /* Flexible Filter 4 Enable */ +#define IXGBE_WUFC_FLX5 0x00200000 /* Flexible Filter 5 Enable */ +#define IXGBE_WUFC_FLX_FILTERS 0x000F0000 /* Mask for 4 flex filters */ +#define IXGBE_WUFC_FLX_FILTERS_6 0x003F0000 /* Mask for 6 flex filters */ +#define IXGBE_WUFC_FLX_FILTERS_8 0x00FF0000 /* Mask for 8 flex filters */ +#define IXGBE_WUFC_FW_RST_WK 0x80000000 /* Ena wake on FW reset assertion */ +/* Mask for Ext. flex filters */ +#define IXGBE_WUFC_EXT_FLX_FILTERS 0x00300000 +#define IXGBE_WUFC_ALL_FILTERS 0x000F00FF /* Mask all 4 flex filters */ +#define IXGBE_WUFC_ALL_FILTERS_6 0x003F00FF /* Mask all 6 flex filters */ +#define IXGBE_WUFC_ALL_FILTERS_8 0x00FF00FF /* Mask all 8 flex filters */ +#define IXGBE_WUFC_FLX_OFFSET 16 /* Offset to the Flexible Filters bits */ + +/* Wake Up Status */ +#define IXGBE_WUS_LNKC IXGBE_WUFC_LNKC +#define IXGBE_WUS_MAG IXGBE_WUFC_MAG +#define IXGBE_WUS_EX IXGBE_WUFC_EX +#define IXGBE_WUS_MC IXGBE_WUFC_MC +#define IXGBE_WUS_BC IXGBE_WUFC_BC +#define IXGBE_WUS_ARP IXGBE_WUFC_ARP +#define IXGBE_WUS_IPV4 IXGBE_WUFC_IPV4 +#define IXGBE_WUS_IPV6 IXGBE_WUFC_IPV6 +#define IXGBE_WUS_MNG IXGBE_WUFC_MNG +#define IXGBE_WUS_FLX0 IXGBE_WUFC_FLX0 +#define IXGBE_WUS_FLX1 IXGBE_WUFC_FLX1 +#define IXGBE_WUS_FLX2 IXGBE_WUFC_FLX2 +#define IXGBE_WUS_FLX3 IXGBE_WUFC_FLX3 +#define IXGBE_WUS_FLX4 IXGBE_WUFC_FLX4 +#define IXGBE_WUS_FLX5 IXGBE_WUFC_FLX5 +#define IXGBE_WUS_FLX_FILTERS IXGBE_WUFC_FLX_FILTERS +#define IXGBE_WUS_FW_RST_WK IXGBE_WUFC_FW_RST_WK +/* Proxy Status */ +#define IXGBE_PROXYS_EX 0x00000004 /* Exact packet received */ +#define IXGBE_PROXYS_ARP_DIR 0x00000020 /* ARP w/filter match received */ +#define IXGBE_PROXYS_NS 0x00000200 /* IPV6 NS received */ +#define IXGBE_PROXYS_NS_DIR 0x00000400 /* IPV6 NS w/DA match received */ +#define IXGBE_PROXYS_ARP 0x00000800 /* ARP request packet received */ +#define IXGBE_PROXYS_MLD 0x00001000 /* IPv6 MLD packet received */ + +/* Proxying Filter Control */ +#define IXGBE_PROXYFC_ENABLE 0x00000001 /* Port Proxying Enable */ +#define IXGBE_PROXYFC_EX 0x00000004 /* Directed Exact Proxy Enable */ +#define IXGBE_PROXYFC_ARP_DIR 0x00000020 /* Directed ARP Proxy Enable */ +#define IXGBE_PROXYFC_NS 0x00000200 /* IPv6 Neighbor Solicitation */ +#define IXGBE_PROXYFC_ARP 0x00000800 /* ARP Request Proxy Enable */ +#define IXGBE_PROXYFC_MLD 0x00000800 /* IPv6 MLD Proxy Enable */ +#define IXGBE_PROXYFC_NO_TCO 0x00008000 /* Ignore TCO packets */ + +#define IXGBE_WUPL_LENGTH_MASK 0xFFFF + +/* DCB registers */ +#define IXGBE_DCB_MAX_TRAFFIC_CLASS 8 +#define IXGBE_RMCS 0x03D00 +#define IXGBE_DPMCS 0x07F40 +#define IXGBE_PDPMCS 0x0CD00 +#define IXGBE_RUPPBMR 0x050A0 +#define IXGBE_RT2CR(_i) (0x03C20 + ((_i) * 4)) /* 8 of these (0-7) */ +#define IXGBE_RT2SR(_i) (0x03C40 + ((_i) * 4)) /* 8 of these (0-7) */ +#define IXGBE_TDTQ2TCCR(_i) (0x0602C + ((_i) * 0x40)) /* 8 of these (0-7) */ +#define IXGBE_TDTQ2TCSR(_i) (0x0622C + ((_i) * 0x40)) /* 8 of these (0-7) */ +#define IXGBE_TDPT2TCCR(_i) (0x0CD20 + ((_i) * 4)) /* 8 of these (0-7) */ +#define IXGBE_TDPT2TCSR(_i) (0x0CD40 + ((_i) * 4)) /* 8 of these (0-7) */ + +/* Power Management */ +/* DMA Coalescing configuration */ +struct ixgbe_dmac_config { + u16 watchdog_timer; /* usec units */ + bool fcoe_en; + u32 link_speed; + u8 fcoe_tc; + u8 num_tcs; +}; + +/* + * DMA Coalescing threshold Rx PB TC[n] value in Kilobyte by link speed. + * DMACRXT = 10Gbps = 10,000 bits / usec = 1250 bytes / usec 70 * 1250 == + * 87500 bytes [85KB] + */ +#define IXGBE_DMACRXT_10G 0x55 +#define IXGBE_DMACRXT_1G 0x09 +#define IXGBE_DMACRXT_100M 0x01 + +/* DMA Coalescing registers */ +#define IXGBE_DMCMNGTH 0x15F20 /* Management Threshold */ +#define IXGBE_DMACR 0x02400 /* Control register */ +#define IXGBE_DMCTH(_i) (0x03300 + ((_i) * 4)) /* 8 of these */ +#define IXGBE_DMCTLX 0x02404 /* Time to Lx request */ +/* DMA Coalescing register fields */ +#define IXGBE_DMCMNGTH_DMCMNGTH_MASK 0x000FFFF0 /* Mng Threshold mask */ +#define IXGBE_DMCMNGTH_DMCMNGTH_SHIFT 4 /* Management Threshold shift */ +#define IXGBE_DMACR_DMACWT_MASK 0x0000FFFF /* Watchdog Timer mask */ +#define IXGBE_DMACR_HIGH_PRI_TC_MASK 0x00FF0000 +#define IXGBE_DMACR_HIGH_PRI_TC_SHIFT 16 +#define IXGBE_DMACR_EN_MNG_IND 0x10000000 /* Enable Mng Indications */ +#define IXGBE_DMACR_LX_COAL_IND 0x40000000 /* Lx Coalescing indicate */ +#define IXGBE_DMACR_DMAC_EN 0x80000000 /* DMA Coalescing Enable */ +#define IXGBE_DMCTH_DMACRXT_MASK 0x000001FF /* Receive Threshold mask */ +#define IXGBE_DMCTLX_TTLX_MASK 0x00000FFF /* Time to Lx request mask */ + +/* EEE registers */ +#define IXGBE_EEER 0x043A0 /* EEE register */ +#define IXGBE_EEE_STAT 0x04398 /* EEE Status */ +#define IXGBE_EEE_SU 0x04380 /* EEE Set up */ +#define IXGBE_EEE_SU_TEEE_DLY_SHIFT 26 +#define IXGBE_TLPIC 0x041F4 /* EEE Tx LPI count */ +#define IXGBE_RLPIC 0x041F8 /* EEE Rx LPI count */ + +/* EEE register fields */ +#define IXGBE_EEER_TX_LPI_EN 0x00010000 /* Enable EEE LPI TX path */ +#define IXGBE_EEER_RX_LPI_EN 0x00020000 /* Enable EEE LPI RX path */ +#define IXGBE_EEE_STAT_NEG 0x20000000 /* EEE support neg on link */ +#define IXGBE_EEE_RX_LPI_STATUS 0x40000000 /* RX Link in LPI status */ +#define IXGBE_EEE_TX_LPI_STATUS 0x80000000 /* TX Link in LPI status */ + +/* Security Control Registers */ +#define IXGBE_SECTXCTRL 0x08800 +#define IXGBE_SECTXSTAT 0x08804 +#define IXGBE_SECTXBUFFAF 0x08808 +#define IXGBE_SECTXMINIFG 0x08810 +#define IXGBE_SECRXCTRL 0x08D00 +#define IXGBE_SECRXSTAT 0x08D04 + +/* Security Bit Fields and Masks */ +#define IXGBE_SECTXCTRL_SECTX_DIS 0x00000001 +#define IXGBE_SECTXCTRL_TX_DIS 0x00000002 +#define IXGBE_SECTXCTRL_STORE_FORWARD 0x00000004 + +#define IXGBE_SECTXSTAT_SECTX_RDY 0x00000001 +#define IXGBE_SECTXSTAT_ECC_TXERR 0x00000002 + +#define IXGBE_SECRXCTRL_SECRX_DIS 0x00000001 +#define IXGBE_SECRXCTRL_RX_DIS 0x00000002 + +#define IXGBE_SECRXSTAT_SECRX_RDY 0x00000001 +#define IXGBE_SECRXSTAT_ECC_RXERR 0x00000002 + +/* LinkSec (MacSec) Registers */ +#define IXGBE_LSECTXCAP 0x08A00 +#define IXGBE_LSECRXCAP 0x08F00 +#define IXGBE_LSECTXCTRL 0x08A04 +#define IXGBE_LSECTXSCL 0x08A08 /* SCI Low */ +#define IXGBE_LSECTXSCH 0x08A0C /* SCI High */ +#define IXGBE_LSECTXSA 0x08A10 +#define IXGBE_LSECTXPN0 0x08A14 +#define IXGBE_LSECTXPN1 0x08A18 +#define IXGBE_LSECTXKEY0(_n) (0x08A1C + (4 * (_n))) /* 4 of these (0-3) */ +#define IXGBE_LSECTXKEY1(_n) (0x08A2C + (4 * (_n))) /* 4 of these (0-3) */ +#define IXGBE_LSECRXCTRL 0x08F04 +#define IXGBE_LSECRXSCL 0x08F08 +#define IXGBE_LSECRXSCH 0x08F0C +#define IXGBE_LSECRXSA(_i) (0x08F10 + (4 * (_i))) /* 2 of these (0-1) */ +#define IXGBE_LSECRXPN(_i) (0x08F18 + (4 * (_i))) /* 2 of these (0-1) */ +#define IXGBE_LSECRXKEY(_n, _m) (0x08F20 + ((0x10 * (_n)) + (4 * (_m)))) +#define IXGBE_LSECTXUT 0x08A3C /* OutPktsUntagged */ +#define IXGBE_LSECTXPKTE 0x08A40 /* OutPktsEncrypted */ +#define IXGBE_LSECTXPKTP 0x08A44 /* OutPktsProtected */ +#define IXGBE_LSECTXOCTE 0x08A48 /* OutOctetsEncrypted */ +#define IXGBE_LSECTXOCTP 0x08A4C /* OutOctetsProtected */ +#define IXGBE_LSECRXUT 0x08F40 /* InPktsUntagged/InPktsNoTag */ +#define IXGBE_LSECRXOCTD 0x08F44 /* InOctetsDecrypted */ +#define IXGBE_LSECRXOCTV 0x08F48 /* InOctetsValidated */ +#define IXGBE_LSECRXBAD 0x08F4C /* InPktsBadTag */ +#define IXGBE_LSECRXNOSCI 0x08F50 /* InPktsNoSci */ +#define IXGBE_LSECRXUNSCI 0x08F54 /* InPktsUnknownSci */ +#define IXGBE_LSECRXUNCH 0x08F58 /* InPktsUnchecked */ +#define IXGBE_LSECRXDELAY 0x08F5C /* InPktsDelayed */ +#define IXGBE_LSECRXLATE 0x08F60 /* InPktsLate */ +#define IXGBE_LSECRXOK(_n) (0x08F64 + (0x04 * (_n))) /* InPktsOk */ +#define IXGBE_LSECRXINV(_n) (0x08F6C + (0x04 * (_n))) /* InPktsInvalid */ +#define IXGBE_LSECRXNV(_n) (0x08F74 + (0x04 * (_n))) /* InPktsNotValid */ +#define IXGBE_LSECRXUNSA 0x08F7C /* InPktsUnusedSa */ +#define IXGBE_LSECRXNUSA 0x08F80 /* InPktsNotUsingSa */ + +/* LinkSec (MacSec) Bit Fields and Masks */ +#define IXGBE_LSECTXCAP_SUM_MASK 0x00FF0000 +#define IXGBE_LSECTXCAP_SUM_SHIFT 16 +#define IXGBE_LSECRXCAP_SUM_MASK 0x00FF0000 +#define IXGBE_LSECRXCAP_SUM_SHIFT 16 + +#define IXGBE_LSECTXCTRL_EN_MASK 0x00000003 +#define IXGBE_LSECTXCTRL_DISABLE 0x0 +#define IXGBE_LSECTXCTRL_AUTH 0x1 +#define IXGBE_LSECTXCTRL_AUTH_ENCRYPT 0x2 +#define IXGBE_LSECTXCTRL_AISCI 0x00000020 +#define IXGBE_LSECTXCTRL_PNTHRSH_MASK 0xFFFFFF00 +#define IXGBE_LSECTXCTRL_RSV_MASK 0x000000D8 + +#define IXGBE_LSECRXCTRL_EN_MASK 0x0000000C +#define IXGBE_LSECRXCTRL_EN_SHIFT 2 +#define IXGBE_LSECRXCTRL_DISABLE 0x0 +#define IXGBE_LSECRXCTRL_CHECK 0x1 +#define IXGBE_LSECRXCTRL_STRICT 0x2 +#define IXGBE_LSECRXCTRL_DROP 0x3 +#define IXGBE_LSECRXCTRL_PLSH 0x00000040 +#define IXGBE_LSECRXCTRL_RP 0x00000080 +#define IXGBE_LSECRXCTRL_RSV_MASK 0xFFFFFF33 + +/* IpSec Registers */ +#define IXGBE_IPSTXIDX 0x08900 +#define IXGBE_IPSTXSALT 0x08904 +#define IXGBE_IPSTXKEY(_i) (0x08908 + (4 * (_i))) /* 4 of these (0-3) */ +#define IXGBE_IPSRXIDX 0x08E00 +#define IXGBE_IPSRXIPADDR(_i) (0x08E04 + (4 * (_i))) /* 4 of these (0-3) */ +#define IXGBE_IPSRXSPI 0x08E14 +#define IXGBE_IPSRXIPIDX 0x08E18 +#define IXGBE_IPSRXKEY(_i) (0x08E1C + (4 * (_i))) /* 4 of these (0-3) */ +#define IXGBE_IPSRXSALT 0x08E2C +#define IXGBE_IPSRXMOD 0x08E30 + +#define IXGBE_SECTXCTRL_STORE_FORWARD_ENABLE 0x4 + +/* DCB registers */ +#define IXGBE_RTRPCS 0x02430 +#define IXGBE_RTTDCS 0x04900 +#define IXGBE_RTTDCS_ARBDIS 0x00000040 /* DCB arbiter disable */ +#define IXGBE_RTTPCS 0x0CD00 +#define IXGBE_RTRUP2TC 0x03020 +#define IXGBE_RTTUP2TC 0x0C800 +#define IXGBE_RTRPT4C(_i) (0x02140 + ((_i) * 4)) /* 8 of these (0-7) */ +#define IXGBE_TXLLQ(_i) (0x082E0 + ((_i) * 4)) /* 4 of these (0-3) */ +#define IXGBE_RTRPT4S(_i) (0x02160 + ((_i) * 4)) /* 8 of these (0-7) */ +#define IXGBE_RTTDT2C(_i) (0x04910 + ((_i) * 4)) /* 8 of these (0-7) */ +#define IXGBE_RTTDT2S(_i) (0x04930 + ((_i) * 4)) /* 8 of these (0-7) */ +#define IXGBE_RTTPT2C(_i) (0x0CD20 + ((_i) * 4)) /* 8 of these (0-7) */ +#define IXGBE_RTTPT2S(_i) (0x0CD40 + ((_i) * 4)) /* 8 of these (0-7) */ +#define IXGBE_RTTDQSEL 0x04904 +#define IXGBE_RTTDT1C 0x04908 +#define IXGBE_RTTDT1S 0x0490C +#define IXGBE_RTTQCNCR 0x08B00 +#define IXGBE_RTTQCNTG 0x04A90 +#define IXGBE_RTTBCNRD 0x0498C +#define IXGBE_RTTQCNRR 0x0498C +#define IXGBE_RTTDTECC 0x04990 +#define IXGBE_RTTDTECC_NO_BCN 0x00000100 + +#define IXGBE_RTTBCNRC 0x04984 +#define IXGBE_RTTBCNRC_RS_ENA 0x80000000 +#define IXGBE_RTTBCNRC_RF_DEC_MASK 0x00003FFF +#define IXGBE_RTTBCNRC_RF_INT_SHIFT 14 +#define IXGBE_RTTBCNRC_RF_INT_MASK \ + (IXGBE_RTTBCNRC_RF_DEC_MASK << IXGBE_RTTBCNRC_RF_INT_SHIFT) +#define IXGBE_RTTBCNRM 0x04980 +#define IXGBE_RTTQCNRM 0x04980 + +/* FCoE DMA Context Registers */ +/* FCoE Direct DMA Context */ +#define IXGBE_FCDDC(_i, _j) (0x20000 + ((_i) * 0x4) + ((_j) * 0x10)) +#define IXGBE_FCPTRL 0x02410 /* FC User Desc. PTR Low */ +#define IXGBE_FCPTRH 0x02414 /* FC USer Desc. PTR High */ +#define IXGBE_FCBUFF 0x02418 /* FC Buffer Control */ +#define IXGBE_FCDMARW 0x02420 /* FC Receive DMA RW */ +#define IXGBE_FCBUFF_VALID (1 << 0) /* DMA Context Valid */ +#define IXGBE_FCBUFF_BUFFSIZE (3 << 3) /* User Buffer Size */ +#define IXGBE_FCBUFF_WRCONTX (1 << 7) /* 0: Initiator, 1: Target */ +#define IXGBE_FCBUFF_BUFFCNT 0x0000ff00 /* Number of User Buffers */ +#define IXGBE_FCBUFF_OFFSET 0xffff0000 /* User Buffer Offset */ +#define IXGBE_FCBUFF_BUFFSIZE_SHIFT 3 +#define IXGBE_FCBUFF_BUFFCNT_SHIFT 8 +#define IXGBE_FCBUFF_OFFSET_SHIFT 16 +#define IXGBE_FCDMARW_WE (1 << 14) /* Write enable */ +#define IXGBE_FCDMARW_RE (1 << 15) /* Read enable */ +#define IXGBE_FCDMARW_FCOESEL 0x000001ff /* FC X_ID: 11 bits */ +#define IXGBE_FCDMARW_LASTSIZE 0xffff0000 /* Last User Buffer Size */ +#define IXGBE_FCDMARW_LASTSIZE_SHIFT 16 +/* FCoE SOF/EOF */ +#define IXGBE_TEOFF 0x04A94 /* Tx FC EOF */ +#define IXGBE_TSOFF 0x04A98 /* Tx FC SOF */ +#define IXGBE_REOFF 0x05158 /* Rx FC EOF */ +#define IXGBE_RSOFF 0x051F8 /* Rx FC SOF */ +/* FCoE Filter Context Registers */ +#define IXGBE_FCD_ID 0x05114 /* FCoE D_ID */ +#define IXGBE_FCSMAC 0x0510C /* FCoE Source MAC */ +#define IXGBE_FCFLTRW_SMAC_HIGH_SHIFT 16 +/* FCoE Direct Filter Context */ +#define IXGBE_FCDFC(_i, _j) (0x28000 + ((_i) * 0x4) + ((_j) * 0x10)) +#define IXGBE_FCDFCD(_i) (0x30000 + ((_i) * 0x4)) +#define IXGBE_FCFLT 0x05108 /* FC FLT Context */ +#define IXGBE_FCFLTRW 0x05110 /* FC Filter RW Control */ +#define IXGBE_FCPARAM 0x051d8 /* FC Offset Parameter */ +#define IXGBE_FCFLT_VALID (1 << 0) /* Filter Context Valid */ +#define IXGBE_FCFLT_FIRST (1 << 1) /* Filter First */ +#define IXGBE_FCFLT_SEQID 0x00ff0000 /* Sequence ID */ +#define IXGBE_FCFLT_SEQCNT 0xff000000 /* Sequence Count */ +#define IXGBE_FCFLTRW_RVALDT (1 << 13) /* Fast Re-Validation */ +#define IXGBE_FCFLTRW_WE (1 << 14) /* Write Enable */ +#define IXGBE_FCFLTRW_RE (1 << 15) /* Read Enable */ +/* FCoE Receive Control */ +#define IXGBE_FCRXCTRL 0x05100 /* FC Receive Control */ +#define IXGBE_FCRXCTRL_FCOELLI (1 << 0) /* Low latency interrupt */ +#define IXGBE_FCRXCTRL_SAVBAD (1 << 1) /* Save Bad Frames */ +#define IXGBE_FCRXCTRL_FRSTRDH (1 << 2) /* EN 1st Read Header */ +#define IXGBE_FCRXCTRL_LASTSEQH (1 << 3) /* EN Last Header in Seq */ +#define IXGBE_FCRXCTRL_ALLH (1 << 4) /* EN All Headers */ +#define IXGBE_FCRXCTRL_FRSTSEQH (1 << 5) /* EN 1st Seq. Header */ +#define IXGBE_FCRXCTRL_ICRC (1 << 6) /* Ignore Bad FC CRC */ +#define IXGBE_FCRXCTRL_FCCRCBO (1 << 7) /* FC CRC Byte Ordering */ +#define IXGBE_FCRXCTRL_FCOEVER 0x00000f00 /* FCoE Version: 4 bits */ +#define IXGBE_FCRXCTRL_FCOEVER_SHIFT 8 +/* FCoE Redirection */ +#define IXGBE_FCRECTL 0x0ED00 /* FC Redirection Control */ +#define IXGBE_FCRETA0 0x0ED10 /* FC Redirection Table 0 */ +#define IXGBE_FCRETA(_i) (IXGBE_FCRETA0 + ((_i) * 4)) /* FCoE Redir */ +#define IXGBE_FCRECTL_ENA 0x1 /* FCoE Redir Table Enable */ +#define IXGBE_FCRETASEL_ENA 0x2 /* FCoE FCRETASEL bit */ +#define IXGBE_FCRETA_SIZE 8 /* Max entries in FCRETA */ +#define IXGBE_FCRETA_ENTRY_MASK 0x0000007f /* 7 bits for the queue index */ +#define IXGBE_FCRETA_SIZE_X550 32 /* Max entries in FCRETA */ +/* Higher 7 bits for the queue index */ +#define IXGBE_FCRETA_ENTRY_HIGH_MASK 0x007F0000 +#define IXGBE_FCRETA_ENTRY_HIGH_SHIFT 16 + +/* Stats registers */ +#define IXGBE_CRCERRS 0x04000 +#define IXGBE_ILLERRC 0x04004 +#define IXGBE_ERRBC 0x04008 +#define IXGBE_MSPDC 0x04010 +#define IXGBE_MPC(_i) (0x03FA0 + ((_i) * 4)) /* 8 of these 3FA0-3FBC*/ +#define IXGBE_MLFC 0x04034 +#define IXGBE_MRFC 0x04038 +#define IXGBE_RLEC 0x04040 +#define IXGBE_LXONTXC 0x03F60 +#define IXGBE_LXONRXC 0x0CF60 +#define IXGBE_LXOFFTXC 0x03F68 +#define IXGBE_LXOFFRXC 0x0CF68 +#define IXGBE_LXONRXCNT 0x041A4 +#define IXGBE_LXOFFRXCNT 0x041A8 +#define IXGBE_PXONRXCNT(_i) (0x04140 + ((_i) * 4)) /* 8 of these */ +#define IXGBE_PXOFFRXCNT(_i) (0x04160 + ((_i) * 4)) /* 8 of these */ +#define IXGBE_PXON2OFFCNT(_i) (0x03240 + ((_i) * 4)) /* 8 of these */ +#define IXGBE_PXONTXC(_i) (0x03F00 + ((_i) * 4)) /* 8 of these 3F00-3F1C*/ +#define IXGBE_PXONRXC(_i) (0x0CF00 + ((_i) * 4)) /* 8 of these CF00-CF1C*/ +#define IXGBE_PXOFFTXC(_i) (0x03F20 + ((_i) * 4)) /* 8 of these 3F20-3F3C*/ +#define IXGBE_PXOFFRXC(_i) (0x0CF20 + ((_i) * 4)) /* 8 of these CF20-CF3C*/ +#define IXGBE_PRC64 0x0405C +#define IXGBE_PRC127 0x04060 +#define IXGBE_PRC255 0x04064 +#define IXGBE_PRC511 0x04068 +#define IXGBE_PRC1023 0x0406C +#define IXGBE_PRC1522 0x04070 +#define IXGBE_GPRC 0x04074 +#define IXGBE_BPRC 0x04078 +#define IXGBE_MPRC 0x0407C +#define IXGBE_GPTC 0x04080 +#define IXGBE_GORCL 0x04088 +#define IXGBE_GORCH 0x0408C +#define IXGBE_GOTCL 0x04090 +#define IXGBE_GOTCH 0x04094 +#define IXGBE_RNBC(_i) (0x03FC0 + ((_i) * 4)) /* 8 of these 3FC0-3FDC*/ +#define IXGBE_RUC 0x040A4 +#define IXGBE_RFC 0x040A8 +#define IXGBE_ROC 0x040AC +#define IXGBE_RJC 0x040B0 +#define IXGBE_MNGPRC 0x040B4 +#define IXGBE_MNGPDC 0x040B8 +#define IXGBE_MNGPTC 0x0CF90 +#define IXGBE_TORL 0x040C0 +#define IXGBE_TORH 0x040C4 +#define IXGBE_TPR 0x040D0 +#define IXGBE_TPT 0x040D4 +#define IXGBE_PTC64 0x040D8 +#define IXGBE_PTC127 0x040DC +#define IXGBE_PTC255 0x040E0 +#define IXGBE_PTC511 0x040E4 +#define IXGBE_PTC1023 0x040E8 +#define IXGBE_PTC1522 0x040EC +#define IXGBE_MPTC 0x040F0 +#define IXGBE_BPTC 0x040F4 +#define IXGBE_XEC 0x04120 +#define IXGBE_SSVPC 0x08780 + +#define IXGBE_RQSMR(_i) (0x02300 + ((_i) * 4)) +#define IXGBE_TQSMR(_i) (((_i) <= 7) ? (0x07300 + ((_i) * 4)) : \ + (0x08600 + ((_i) * 4))) +#define IXGBE_TQSM(_i) (0x08600 + ((_i) * 4)) + +#define IXGBE_QPRC(_i) (0x01030 + ((_i) * 0x40)) /* 16 of these */ +#define IXGBE_QPTC(_i) (0x06030 + ((_i) * 0x40)) /* 16 of these */ +#define IXGBE_QBRC(_i) (0x01034 + ((_i) * 0x40)) /* 16 of these */ +#define IXGBE_QBTC(_i) (0x06034 + ((_i) * 0x40)) /* 16 of these */ +#define IXGBE_QBRC_L(_i) (0x01034 + ((_i) * 0x40)) /* 16 of these */ +#define IXGBE_QBRC_H(_i) (0x01038 + ((_i) * 0x40)) /* 16 of these */ +#define IXGBE_QPRDC(_i) (0x01430 + ((_i) * 0x40)) /* 16 of these */ +#define IXGBE_QBTC_L(_i) (0x08700 + ((_i) * 0x8)) /* 16 of these */ +#define IXGBE_QBTC_H(_i) (0x08704 + ((_i) * 0x8)) /* 16 of these */ +#define IXGBE_FCCRC 0x05118 /* Num of Good Eth CRC w/ Bad FC CRC */ +#define IXGBE_FCOERPDC 0x0241C /* FCoE Rx Packets Dropped Count */ +#define IXGBE_FCLAST 0x02424 /* FCoE Last Error Count */ +#define IXGBE_FCOEPRC 0x02428 /* Number of FCoE Packets Received */ +#define IXGBE_FCOEDWRC 0x0242C /* Number of FCoE DWords Received */ +#define IXGBE_FCOEPTC 0x08784 /* Number of FCoE Packets Transmitted */ +#define IXGBE_FCOEDWTC 0x08788 /* Number of FCoE DWords Transmitted */ +#define IXGBE_FCCRC_CNT_MASK 0x0000FFFF /* CRC_CNT: bit 0 - 15 */ +#define IXGBE_FCLAST_CNT_MASK 0x0000FFFF /* Last_CNT: bit 0 - 15 */ +#define IXGBE_O2BGPTC 0x041C4 +#define IXGBE_O2BSPC 0x087B0 +#define IXGBE_B2OSPC 0x041C0 +#define IXGBE_B2OGPRC 0x02F90 +#define IXGBE_BUPRC 0x04180 +#define IXGBE_BMPRC 0x04184 +#define IXGBE_BBPRC 0x04188 +#define IXGBE_BUPTC 0x0418C +#define IXGBE_BMPTC 0x04190 +#define IXGBE_BBPTC 0x04194 +#define IXGBE_BCRCERRS 0x04198 +#define IXGBE_BXONRXC 0x0419C +#define IXGBE_BXOFFRXC 0x041E0 +#define IXGBE_BXONTXC 0x041E4 +#define IXGBE_BXOFFTXC 0x041E8 + +/* Management */ +#define IXGBE_MAVTV(_i) (0x05010 + ((_i) * 4)) /* 8 of these (0-7) */ +#define IXGBE_MFUTP(_i) (0x05030 + ((_i) * 4)) /* 8 of these (0-7) */ +#define IXGBE_MANC 0x05820 +#define IXGBE_MFVAL 0x05824 +#define IXGBE_MANC2H 0x05860 +#define IXGBE_MDEF(_i) (0x05890 + ((_i) * 4)) /* 8 of these (0-7) */ +#define IXGBE_MIPAF 0x058B0 +#define IXGBE_MMAL(_i) (0x05910 + ((_i) * 8)) /* 4 of these (0-3) */ +#define IXGBE_MMAH(_i) (0x05914 + ((_i) * 8)) /* 4 of these (0-3) */ +#define IXGBE_FTFT 0x09400 /* 0x9400-0x97FC */ +#define IXGBE_METF(_i) (0x05190 + ((_i) * 4)) /* 4 of these (0-3) */ +#define IXGBE_MDEF_EXT(_i) (0x05160 + ((_i) * 4)) /* 8 of these (0-7) */ +#define IXGBE_LSWFW 0x15F14 +#define IXGBE_BMCIP(_i) (0x05050 + ((_i) * 4)) /* 0x5050-0x505C */ +#define IXGBE_BMCIPVAL 0x05060 +#define IXGBE_BMCIP_IPADDR_TYPE 0x00000001 +#define IXGBE_BMCIP_IPADDR_VALID 0x00000002 + +/* Management Bit Fields and Masks */ +#define IXGBE_MANC_MPROXYE 0x40000000 /* Management Proxy Enable */ +#define IXGBE_MANC_RCV_TCO_EN 0x00020000 /* Rcv TCO packet enable */ +#define IXGBE_MANC_EN_BMC2OS 0x10000000 /* Ena BMC2OS and OS2BMC traffic */ +#define IXGBE_MANC_EN_BMC2OS_SHIFT 28 + +/* Firmware Semaphore Register */ +#define IXGBE_FWSM_MODE_MASK 0xE +#define IXGBE_FWSM_TS_ENABLED 0x1 +#define IXGBE_FWSM_FW_MODE_PT 0x4 +#define IXGBE_FWSM_FW_NVM_RECOVERY_MODE (1 << 5) +#define IXGBE_FWSM_EXT_ERR_IND_MASK 0x01F80000 +#define IXGBE_FWSM_FW_VAL_BIT (1 << 15) + +/* ARC Subsystem registers */ +#define IXGBE_HICR 0x15F00 +#define IXGBE_FWSTS 0x15F0C +#define IXGBE_HSMC0R 0x15F04 +#define IXGBE_HSMC1R 0x15F08 +#define IXGBE_SWSR 0x15F10 +#define IXGBE_FWRESETCNT 0x15F40 +#define IXGBE_HFDR 0x15FE8 +#define IXGBE_FLEX_MNG 0x15800 /* 0x15800 - 0x15EFC */ +#define IXGBE_FLEX_MNG_PTR(_i) (IXGBE_FLEX_MNG + ((_i) * 4)) + +#define IXGBE_HICR_EN 0x01 /* Enable bit - RO */ +/* Driver sets this bit when done to put command in RAM */ +#define IXGBE_HICR_C 0x02 +#define IXGBE_HICR_SV 0x04 /* Status Validity */ +#define IXGBE_HICR_FW_RESET_ENABLE 0x40 +#define IXGBE_HICR_FW_RESET 0x80 + +/* PCI-E registers */ +#define IXGBE_GCR 0x11000 +#define IXGBE_GTV 0x11004 +#define IXGBE_FUNCTAG 0x11008 +#define IXGBE_GLT 0x1100C +#define IXGBE_PCIEPIPEADR 0x11004 +#define IXGBE_PCIEPIPEDAT 0x11008 +#define IXGBE_GSCL_1 0x11010 +#define IXGBE_GSCL_2 0x11014 +#define IXGBE_GSCL_1_X540 IXGBE_GSCL_1 +#define IXGBE_GSCL_2_X540 IXGBE_GSCL_2 +#define IXGBE_GSCL_3 0x11018 +#define IXGBE_GSCL_4 0x1101C +#define IXGBE_GSCN_0 0x11020 +#define IXGBE_GSCN_1 0x11024 +#define IXGBE_GSCN_2 0x11028 +#define IXGBE_GSCN_3 0x1102C +#define IXGBE_GSCN_0_X540 IXGBE_GSCN_0 +#define IXGBE_GSCN_1_X540 IXGBE_GSCN_1 +#define IXGBE_GSCN_2_X540 IXGBE_GSCN_2 +#define IXGBE_GSCN_3_X540 IXGBE_GSCN_3 +#define IXGBE_FACTPS 0x10150 +#define IXGBE_FACTPS_X540 IXGBE_FACTPS +#define IXGBE_GSCL_1_X550 0x11800 +#define IXGBE_GSCL_2_X550 0x11804 +#define IXGBE_GSCL_1_X550EM_x IXGBE_GSCL_1_X550 +#define IXGBE_GSCL_2_X550EM_x IXGBE_GSCL_2_X550 +#define IXGBE_GSCN_0_X550 0x11820 +#define IXGBE_GSCN_1_X550 0x11824 +#define IXGBE_GSCN_2_X550 0x11828 +#define IXGBE_GSCN_3_X550 0x1182C +#define IXGBE_GSCN_0_X550EM_x IXGBE_GSCN_0_X550 +#define IXGBE_GSCN_1_X550EM_x IXGBE_GSCN_1_X550 +#define IXGBE_GSCN_2_X550EM_x IXGBE_GSCN_2_X550 +#define IXGBE_GSCN_3_X550EM_x IXGBE_GSCN_3_X550 +#define IXGBE_FACTPS_X550 IXGBE_FACTPS +#define IXGBE_FACTPS_X550EM_x IXGBE_FACTPS +#define IXGBE_GSCL_1_X550EM_a IXGBE_GSCL_1_X550 +#define IXGBE_GSCL_2_X550EM_a IXGBE_GSCL_2_X550 +#define IXGBE_GSCN_0_X550EM_a IXGBE_GSCN_0_X550 +#define IXGBE_GSCN_1_X550EM_a IXGBE_GSCN_1_X550 +#define IXGBE_GSCN_2_X550EM_a IXGBE_GSCN_2_X550 +#define IXGBE_GSCN_3_X550EM_a IXGBE_GSCN_3_X550 +#define IXGBE_FACTPS_X550EM_a 0x15FEC +#define IXGBE_FACTPS_BY_MAC(_hw) IXGBE_BY_MAC((_hw), FACTPS) + +#define IXGBE_PCIEANACTL 0x11040 +#define IXGBE_SWSM 0x10140 +#define IXGBE_SWSM_X540 IXGBE_SWSM +#define IXGBE_SWSM_X550 IXGBE_SWSM +#define IXGBE_SWSM_X550EM_x IXGBE_SWSM +#define IXGBE_SWSM_X550EM_a 0x15F70 +#define IXGBE_SWSM_BY_MAC(_hw) IXGBE_BY_MAC((_hw), SWSM) + +#define IXGBE_FWSM 0x10148 +#define IXGBE_FWSM_X540 IXGBE_FWSM +#define IXGBE_FWSM_X550 IXGBE_FWSM +#define IXGBE_FWSM_X550EM_x IXGBE_FWSM +#define IXGBE_FWSM_X550EM_a 0x15F74 +#define IXGBE_FWSM_BY_MAC(_hw) IXGBE_BY_MAC((_hw), FWSM) + +#define IXGBE_SWFW_SYNC IXGBE_GSSR +#define IXGBE_SWFW_SYNC_X540 IXGBE_SWFW_SYNC +#define IXGBE_SWFW_SYNC_X550 IXGBE_SWFW_SYNC +#define IXGBE_SWFW_SYNC_X550EM_x IXGBE_SWFW_SYNC +#define IXGBE_SWFW_SYNC_X550EM_a 0x15F78 +#define IXGBE_SWFW_SYNC_BY_MAC(_hw) IXGBE_BY_MAC((_hw), SWFW_SYNC) + +#define IXGBE_GSSR 0x10160 +#define IXGBE_MREVID 0x11064 +#define IXGBE_DCA_ID 0x11070 +#define IXGBE_DCA_CTRL 0x11074 + +/* PCI-E registers 82599-Specific */ +#define IXGBE_GCR_EXT 0x11050 +#define IXGBE_GSCL_5_82599 0x11030 +#define IXGBE_GSCL_6_82599 0x11034 +#define IXGBE_GSCL_7_82599 0x11038 +#define IXGBE_GSCL_8_82599 0x1103C +#define IXGBE_GSCL_5_X540 IXGBE_GSCL_5_82599 +#define IXGBE_GSCL_6_X540 IXGBE_GSCL_6_82599 +#define IXGBE_GSCL_7_X540 IXGBE_GSCL_7_82599 +#define IXGBE_GSCL_8_X540 IXGBE_GSCL_8_82599 +#define IXGBE_PHYADR_82599 0x11040 +#define IXGBE_PHYDAT_82599 0x11044 +#define IXGBE_PHYCTL_82599 0x11048 +#define IXGBE_PBACLR_82599 0x11068 +#define IXGBE_CIAA 0x11088 +#define IXGBE_CIAD 0x1108C +#define IXGBE_CIAA_82599 IXGBE_CIAA +#define IXGBE_CIAD_82599 IXGBE_CIAD +#define IXGBE_CIAA_X540 IXGBE_CIAA +#define IXGBE_CIAD_X540 IXGBE_CIAD +#define IXGBE_GSCL_5_X550 0x11810 +#define IXGBE_GSCL_6_X550 0x11814 +#define IXGBE_GSCL_7_X550 0x11818 +#define IXGBE_GSCL_8_X550 0x1181C +#define IXGBE_GSCL_5_X550EM_x IXGBE_GSCL_5_X550 +#define IXGBE_GSCL_6_X550EM_x IXGBE_GSCL_6_X550 +#define IXGBE_GSCL_7_X550EM_x IXGBE_GSCL_7_X550 +#define IXGBE_GSCL_8_X550EM_x IXGBE_GSCL_8_X550 +#define IXGBE_CIAA_X550 0x11508 +#define IXGBE_CIAD_X550 0x11510 +#define IXGBE_CIAA_X550EM_x IXGBE_CIAA_X550 +#define IXGBE_CIAD_X550EM_x IXGBE_CIAD_X550 +#define IXGBE_GSCL_5_X550EM_a IXGBE_GSCL_5_X550 +#define IXGBE_GSCL_6_X550EM_a IXGBE_GSCL_6_X550 +#define IXGBE_GSCL_7_X550EM_a IXGBE_GSCL_7_X550 +#define IXGBE_GSCL_8_X550EM_a IXGBE_GSCL_8_X550 +#define IXGBE_CIAA_X550EM_a IXGBE_CIAA_X550 +#define IXGBE_CIAD_X550EM_a IXGBE_CIAD_X550 +#define IXGBE_CIAA_BY_MAC(_hw) IXGBE_BY_MAC((_hw), CIAA) +#define IXGBE_CIAD_BY_MAC(_hw) IXGBE_BY_MAC((_hw), CIAD) +#define IXGBE_PICAUSE 0x110B0 +#define IXGBE_PIENA 0x110B8 +#define IXGBE_CDQ_MBR_82599 0x110B4 +#define IXGBE_PCIESPARE 0x110BC +#define IXGBE_MISC_REG_82599 0x110F0 +#define IXGBE_ECC_CTRL_0_82599 0x11100 +#define IXGBE_ECC_CTRL_1_82599 0x11104 +#define IXGBE_ECC_STATUS_82599 0x110E0 +#define IXGBE_BAR_CTRL_82599 0x110F4 + +/* PCI Express Control */ +#define IXGBE_GCR_CMPL_TMOUT_MASK 0x0000F000 +#define IXGBE_GCR_CMPL_TMOUT_10ms 0x00001000 +#define IXGBE_GCR_CMPL_TMOUT_RESEND 0x00010000 +#define IXGBE_GCR_CAP_VER2 0x00040000 + +#define IXGBE_GCR_EXT_MSIX_EN 0x80000000 +#define IXGBE_GCR_EXT_BUFFERS_CLEAR 0x40000000 +#define IXGBE_GCR_EXT_VT_MODE_16 0x00000001 +#define IXGBE_GCR_EXT_VT_MODE_32 0x00000002 +#define IXGBE_GCR_EXT_VT_MODE_64 0x00000003 +#define IXGBE_GCR_EXT_SRIOV (IXGBE_GCR_EXT_MSIX_EN | \ + IXGBE_GCR_EXT_VT_MODE_64) +#define IXGBE_GCR_EXT_VT_MODE_MASK 0x00000003 +/* Time Sync Registers */ +#define IXGBE_TSYNCRXCTL 0x05188 /* Rx Time Sync Control register - RW */ +#define IXGBE_TSYNCTXCTL 0x08C00 /* Tx Time Sync Control register - RW */ +#define IXGBE_RXSTMPL 0x051E8 /* Rx timestamp Low - RO */ +#define IXGBE_RXSTMPH 0x051A4 /* Rx timestamp High - RO */ +#define IXGBE_RXSATRL 0x051A0 /* Rx timestamp attribute low - RO */ +#define IXGBE_RXSATRH 0x051A8 /* Rx timestamp attribute high - RO */ +#define IXGBE_RXMTRL 0x05120 /* RX message type register low - RW */ +#define IXGBE_TXSTMPL 0x08C04 /* Tx timestamp value Low - RO */ +#define IXGBE_TXSTMPH 0x08C08 /* Tx timestamp value High - RO */ +#define IXGBE_SYSTIML 0x08C0C /* System time register Low - RO */ +#define IXGBE_SYSTIMH 0x08C10 /* System time register High - RO */ +#define IXGBE_SYSTIMR 0x08C58 /* System time register Residue - RO */ +#define IXGBE_TIMINCA 0x08C14 /* Increment attributes register - RW */ +#define IXGBE_TIMADJL 0x08C18 /* Time Adjustment Offset register Low - RW */ +#define IXGBE_TIMADJH 0x08C1C /* Time Adjustment Offset register High - RW */ +#define IXGBE_TSAUXC 0x08C20 /* TimeSync Auxiliary Control register - RW */ +#define IXGBE_TRGTTIML0 0x08C24 /* Target Time Register 0 Low - RW */ +#define IXGBE_TRGTTIMH0 0x08C28 /* Target Time Register 0 High - RW */ +#define IXGBE_TRGTTIML1 0x08C2C /* Target Time Register 1 Low - RW */ +#define IXGBE_TRGTTIMH1 0x08C30 /* Target Time Register 1 High - RW */ +#define IXGBE_CLKTIML 0x08C34 /* Clock Out Time Register Low - RW */ +#define IXGBE_CLKTIMH 0x08C38 /* Clock Out Time Register High - RW */ +#define IXGBE_FREQOUT0 0x08C34 /* Frequency Out 0 Control register - RW */ +#define IXGBE_FREQOUT1 0x08C38 /* Frequency Out 1 Control register - RW */ +#define IXGBE_AUXSTMPL0 0x08C3C /* Auxiliary Time Stamp 0 register Low - RO */ +#define IXGBE_AUXSTMPH0 0x08C40 /* Auxiliary Time Stamp 0 register High - RO */ +#define IXGBE_AUXSTMPL1 0x08C44 /* Auxiliary Time Stamp 1 register Low - RO */ +#define IXGBE_AUXSTMPH1 0x08C48 /* Auxiliary Time Stamp 1 register High - RO */ +#define IXGBE_TSIM 0x08C68 /* TimeSync Interrupt Mask Register - RW */ +#define IXGBE_TSICR 0x08C60 /* TimeSync Interrupt Cause Register - WO */ +#define IXGBE_TSSDP 0x0003C /* TimeSync SDP Configuration Register - RW */ + +/* Diagnostic Registers */ +#define IXGBE_RDSTATCTL 0x02C20 +#define IXGBE_RDSTAT(_i) (0x02C00 + ((_i) * 4)) /* 0x02C00-0x02C1C */ +#define IXGBE_RDHMPN 0x02F08 +#define IXGBE_RIC_DW(_i) (0x02F10 + ((_i) * 4)) +#define IXGBE_RDPROBE 0x02F20 +#define IXGBE_RDMAM 0x02F30 +#define IXGBE_RDMAD 0x02F34 +#define IXGBE_TDHMPN 0x07F08 +#define IXGBE_TDHMPN2 0x082FC +#define IXGBE_TXDESCIC 0x082CC +#define IXGBE_TIC_DW(_i) (0x07F10 + ((_i) * 4)) +#define IXGBE_TIC_DW2(_i) (0x082B0 + ((_i) * 4)) +#define IXGBE_TDPROBE 0x07F20 +#define IXGBE_TXBUFCTRL 0x0C600 +#define IXGBE_TXBUFDATA0 0x0C610 +#define IXGBE_TXBUFDATA1 0x0C614 +#define IXGBE_TXBUFDATA2 0x0C618 +#define IXGBE_TXBUFDATA3 0x0C61C +#define IXGBE_RXBUFCTRL 0x03600 +#define IXGBE_RXBUFDATA0 0x03610 +#define IXGBE_RXBUFDATA1 0x03614 +#define IXGBE_RXBUFDATA2 0x03618 +#define IXGBE_RXBUFDATA3 0x0361C +#define IXGBE_PCIE_DIAG(_i) (0x11090 + ((_i) * 4)) /* 8 of these */ +#define IXGBE_RFVAL 0x050A4 +#define IXGBE_MDFTC1 0x042B8 +#define IXGBE_MDFTC2 0x042C0 +#define IXGBE_MDFTFIFO1 0x042C4 +#define IXGBE_MDFTFIFO2 0x042C8 +#define IXGBE_MDFTS 0x042CC +#define IXGBE_RXDATAWRPTR(_i) (0x03700 + ((_i) * 4)) /* 8 of these 3700-370C*/ +#define IXGBE_RXDESCWRPTR(_i) (0x03710 + ((_i) * 4)) /* 8 of these 3710-371C*/ +#define IXGBE_RXDATARDPTR(_i) (0x03720 + ((_i) * 4)) /* 8 of these 3720-372C*/ +#define IXGBE_RXDESCRDPTR(_i) (0x03730 + ((_i) * 4)) /* 8 of these 3730-373C*/ +#define IXGBE_TXDATAWRPTR(_i) (0x0C700 + ((_i) * 4)) /* 8 of these C700-C70C*/ +#define IXGBE_TXDESCWRPTR(_i) (0x0C710 + ((_i) * 4)) /* 8 of these C710-C71C*/ +#define IXGBE_TXDATARDPTR(_i) (0x0C720 + ((_i) * 4)) /* 8 of these C720-C72C*/ +#define IXGBE_TXDESCRDPTR(_i) (0x0C730 + ((_i) * 4)) /* 8 of these C730-C73C*/ +#define IXGBE_PCIEECCCTL 0x1106C +#define IXGBE_RXWRPTR(_i) (0x03100 + ((_i) * 4)) /* 8 of these 3100-310C*/ +#define IXGBE_RXUSED(_i) (0x03120 + ((_i) * 4)) /* 8 of these 3120-312C*/ +#define IXGBE_RXRDPTR(_i) (0x03140 + ((_i) * 4)) /* 8 of these 3140-314C*/ +#define IXGBE_RXRDWRPTR(_i) (0x03160 + ((_i) * 4)) /* 8 of these 3160-310C*/ +#define IXGBE_TXWRPTR(_i) (0x0C100 + ((_i) * 4)) /* 8 of these C100-C10C*/ +#define IXGBE_TXUSED(_i) (0x0C120 + ((_i) * 4)) /* 8 of these C120-C12C*/ +#define IXGBE_TXRDPTR(_i) (0x0C140 + ((_i) * 4)) /* 8 of these C140-C14C*/ +#define IXGBE_TXRDWRPTR(_i) (0x0C160 + ((_i) * 4)) /* 8 of these C160-C10C*/ +#define IXGBE_PCIEECCCTL0 0x11100 +#define IXGBE_PCIEECCCTL1 0x11104 +#define IXGBE_RXDBUECC 0x03F70 +#define IXGBE_TXDBUECC 0x0CF70 +#define IXGBE_RXDBUEST 0x03F74 +#define IXGBE_TXDBUEST 0x0CF74 +#define IXGBE_PBTXECC 0x0C300 +#define IXGBE_PBRXECC 0x03300 +#define IXGBE_GHECCR 0x110B0 + +/* MAC Registers */ +#define IXGBE_PCS1GCFIG 0x04200 +#define IXGBE_PCS1GLCTL 0x04208 +#define IXGBE_PCS1GLSTA 0x0420C +#define IXGBE_PCS1GDBG0 0x04210 +#define IXGBE_PCS1GDBG1 0x04214 +#define IXGBE_PCS1GANA 0x04218 +#define IXGBE_PCS1GANLP 0x0421C +#define IXGBE_PCS1GANNP 0x04220 +#define IXGBE_PCS1GANLPNP 0x04224 +#define IXGBE_HLREG0 0x04240 +#define IXGBE_HLREG1 0x04244 +#define IXGBE_PAP 0x04248 +#define IXGBE_MACA 0x0424C +#define IXGBE_APAE 0x04250 +#define IXGBE_ARD 0x04254 +#define IXGBE_AIS 0x04258 +#define IXGBE_MSCA 0x0425C +#define IXGBE_MSRWD 0x04260 +#define IXGBE_MLADD 0x04264 +#define IXGBE_MHADD 0x04268 +#define IXGBE_MAXFRS 0x04268 +#define IXGBE_TREG 0x0426C +#define IXGBE_PCSS1 0x04288 +#define IXGBE_PCSS2 0x0428C +#define IXGBE_XPCSS 0x04290 +#define IXGBE_MFLCN 0x04294 +#define IXGBE_SERDESC 0x04298 +#define IXGBE_MAC_SGMII_BUSY 0x04298 +#define IXGBE_MACS 0x0429C +#define IXGBE_AUTOC 0x042A0 +#define IXGBE_LINKS 0x042A4 +#define IXGBE_LINKS2 0x04324 +#define IXGBE_AUTOC2 0x042A8 +#define IXGBE_AUTOC3 0x042AC +#define IXGBE_ANLP1 0x042B0 +#define IXGBE_ANLP2 0x042B4 +#define IXGBE_MACC 0x04330 +#define IXGBE_ATLASCTL 0x04800 +#define IXGBE_MMNGC 0x042D0 +#define IXGBE_ANLPNP1 0x042D4 +#define IXGBE_ANLPNP2 0x042D8 +#define IXGBE_KRPCSFC 0x042E0 +#define IXGBE_KRPCSS 0x042E4 +#define IXGBE_FECS1 0x042E8 +#define IXGBE_FECS2 0x042EC +#define IXGBE_SMADARCTL 0x14F10 +#define IXGBE_MPVC 0x04318 +#define IXGBE_SGMIIC 0x04314 + +/* Statistics Registers */ +#define IXGBE_RXNFGPC 0x041B0 +#define IXGBE_RXNFGBCL 0x041B4 +#define IXGBE_RXNFGBCH 0x041B8 +#define IXGBE_RXDGPC 0x02F50 +#define IXGBE_RXDGBCL 0x02F54 +#define IXGBE_RXDGBCH 0x02F58 +#define IXGBE_RXDDGPC 0x02F5C +#define IXGBE_RXDDGBCL 0x02F60 +#define IXGBE_RXDDGBCH 0x02F64 +#define IXGBE_RXLPBKGPC 0x02F68 +#define IXGBE_RXLPBKGBCL 0x02F6C +#define IXGBE_RXLPBKGBCH 0x02F70 +#define IXGBE_RXDLPBKGPC 0x02F74 +#define IXGBE_RXDLPBKGBCL 0x02F78 +#define IXGBE_RXDLPBKGBCH 0x02F7C +#define IXGBE_TXDGPC 0x087A0 +#define IXGBE_TXDGBCL 0x087A4 +#define IXGBE_TXDGBCH 0x087A8 + +#define IXGBE_RXDSTATCTRL 0x02F40 + +/* Copper Pond 2 link timeout */ +#define IXGBE_VALIDATE_LINK_READY_TIMEOUT 50 + +/* Omer CORECTL */ +#define IXGBE_CORECTL 0x014F00 +/* BARCTRL */ +#define IXGBE_BARCTRL 0x110F4 +#define IXGBE_BARCTRL_FLSIZE 0x0700 +#define IXGBE_BARCTRL_FLSIZE_SHIFT 8 +#define IXGBE_BARCTRL_CSRSIZE 0x2000 +#define IXGBE_BARCTRL_CSRSIZE_SHIFT 13 + +/* RSCCTL Bit Masks */ +#define IXGBE_RSCCTL_RSCEN 0x01 +#define IXGBE_RSCCTL_MAXDESC_1 0x00 +#define IXGBE_RSCCTL_MAXDESC_4 0x04 +#define IXGBE_RSCCTL_MAXDESC_8 0x08 +#define IXGBE_RSCCTL_MAXDESC_16 0x0C +#define IXGBE_RSCCTL_TS_DIS 0x02 + +/* RSCDBU Bit Masks */ +#define IXGBE_RSCDBU_RSCSMALDIS_MASK 0x0000007F +#define IXGBE_RSCDBU_RSCACKDIS 0x00000080 + +/* RDRXCTL Bit Masks */ +#define IXGBE_RDRXCTL_RDMTS_1_2 0x00000000 /* Rx Desc Min THLD Size */ +#define IXGBE_RDRXCTL_CRCSTRIP 0x00000002 /* CRC Strip */ +#define IXGBE_RDRXCTL_PSP 0x00000004 /* Pad Small Packet */ +#define IXGBE_RDRXCTL_MVMEN 0x00000020 +#define IXGBE_RDRXCTL_RSC_PUSH_DIS 0x00000020 +#define IXGBE_RDRXCTL_DMAIDONE 0x00000008 /* DMA init cycle done */ +#define IXGBE_RDRXCTL_RSC_PUSH 0x00000080 +#define IXGBE_RDRXCTL_AGGDIS 0x00010000 /* Aggregation disable */ +#define IXGBE_RDRXCTL_RSCFRSTSIZE 0x003E0000 /* RSC First packet size */ +#define IXGBE_RDRXCTL_RSCLLIDIS 0x00800000 /* Disable RSC compl on LLI*/ +#define IXGBE_RDRXCTL_RSCACKC 0x02000000 /* must set 1 when RSC ena */ +#define IXGBE_RDRXCTL_FCOE_WRFIX 0x04000000 /* must set 1 when RSC ena */ +#define IXGBE_RDRXCTL_MBINTEN 0x10000000 +#define IXGBE_RDRXCTL_MDP_EN 0x20000000 + +/* RQTC Bit Masks and Shifts */ +#define IXGBE_RQTC_SHIFT_TC(_i) ((_i) * 4) +#define IXGBE_RQTC_TC0_MASK (0x7 << 0) +#define IXGBE_RQTC_TC1_MASK (0x7 << 4) +#define IXGBE_RQTC_TC2_MASK (0x7 << 8) +#define IXGBE_RQTC_TC3_MASK (0x7 << 12) +#define IXGBE_RQTC_TC4_MASK (0x7 << 16) +#define IXGBE_RQTC_TC5_MASK (0x7 << 20) +#define IXGBE_RQTC_TC6_MASK (0x7 << 24) +#define IXGBE_RQTC_TC7_MASK (0x7 << 28) + +/* PSRTYPE.RQPL Bit masks and shift */ +#define IXGBE_PSRTYPE_RQPL_MASK 0x7 +#define IXGBE_PSRTYPE_RQPL_SHIFT 29 + +/* CTRL Bit Masks */ +#define IXGBE_CTRL_GIO_DIS 0x00000004 /* Global IO Primary Disable bit */ +#define IXGBE_CTRL_LNK_RST 0x00000008 /* Link Reset. Resets everything. */ +#define IXGBE_CTRL_RST 0x04000000 /* Reset (SW) */ +#define IXGBE_CTRL_RST_MASK (IXGBE_CTRL_LNK_RST | IXGBE_CTRL_RST) + +/* FACTPS */ +#define IXGBE_FACTPS_MNGCG 0x20000000 /* Manageblility Clock Gated */ +#define IXGBE_FACTPS_LFS 0x40000000 /* LAN Function Select */ + +/* MHADD Bit Masks */ +#define IXGBE_MHADD_MFS_MASK 0xFFFF0000 +#define IXGBE_MHADD_MFS_SHIFT 16 + +/* Extended Device Control */ +#define IXGBE_CTRL_EXT_PFRSTD 0x00004000 /* Physical Function Reset Done */ +#define IXGBE_CTRL_EXT_NS_DIS 0x00010000 /* No Snoop disable */ +#define IXGBE_CTRL_EXT_RO_DIS 0x00020000 /* Relaxed Ordering disable */ +#define IXGBE_CTRL_EXT_DRV_LOAD 0x10000000 /* Driver loaded bit for FW */ + +/* Direct Cache Access (DCA) definitions */ +#define IXGBE_DCA_CTRL_DCA_ENABLE 0x00000000 /* DCA Enable */ +#define IXGBE_DCA_CTRL_DCA_DISABLE 0x00000001 /* DCA Disable */ + +#define IXGBE_DCA_CTRL_DCA_MODE_CB1 0x00 /* DCA Mode CB1 */ +#define IXGBE_DCA_CTRL_DCA_MODE_CB2 0x02 /* DCA Mode CB2 */ + +#define IXGBE_DCA_RXCTRL_CPUID_MASK 0x0000001F /* Rx CPUID Mask */ +#define IXGBE_DCA_RXCTRL_CPUID_MASK_82599 0xFF000000 /* Rx CPUID Mask */ +#define IXGBE_DCA_RXCTRL_CPUID_SHIFT_82599 24 /* Rx CPUID Shift */ +#define IXGBE_DCA_RXCTRL_DESC_DCA_EN (1 << 5) /* Rx Desc enable */ +#define IXGBE_DCA_RXCTRL_HEAD_DCA_EN (1 << 6) /* Rx Desc header ena */ +#define IXGBE_DCA_RXCTRL_DATA_DCA_EN (1 << 7) /* Rx Desc payload ena */ +#define IXGBE_DCA_RXCTRL_DESC_RRO_EN (1 << 9) /* Rx rd Desc Relax Order */ +#define IXGBE_DCA_RXCTRL_DATA_WRO_EN (1 << 13) /* Rx wr data Relax Order */ +#define IXGBE_DCA_RXCTRL_HEAD_WRO_EN (1 << 15) /* Rx wr header RO */ + +#define IXGBE_DCA_TXCTRL_CPUID_MASK 0x0000001F /* Tx CPUID Mask */ +#define IXGBE_DCA_TXCTRL_CPUID_MASK_82599 0xFF000000 /* Tx CPUID Mask */ +#define IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599 24 /* Tx CPUID Shift */ +#define IXGBE_DCA_TXCTRL_DESC_DCA_EN (1 << 5) /* DCA Tx Desc enable */ +#define IXGBE_DCA_TXCTRL_DESC_RRO_EN (1 << 9) /* Tx rd Desc Relax Order */ +#define IXGBE_DCA_TXCTRL_DESC_WRO_EN (1 << 11) /* Tx Desc writeback RO bit */ +#define IXGBE_DCA_TXCTRL_DATA_RRO_EN (1 << 13) /* Tx rd data Relax Order */ +#define IXGBE_DCA_MAX_QUEUES_82598 16 /* DCA regs only on 16 queues */ + +/* MSCA Bit Masks */ +#define IXGBE_MSCA_NP_ADDR_MASK 0x0000FFFF /* MDI Addr (new prot) */ +#define IXGBE_MSCA_NP_ADDR_SHIFT 0 +#define IXGBE_MSCA_DEV_TYPE_MASK 0x001F0000 /* Dev Type (new prot) */ +#define IXGBE_MSCA_DEV_TYPE_SHIFT 16 /* Register Address (old prot */ +#define IXGBE_MSCA_PHY_ADDR_MASK 0x03E00000 /* PHY Address mask */ +#define IXGBE_MSCA_PHY_ADDR_SHIFT 21 /* PHY Address shift*/ +#define IXGBE_MSCA_OP_CODE_MASK 0x0C000000 /* OP CODE mask */ +#define IXGBE_MSCA_OP_CODE_SHIFT 26 /* OP CODE shift */ +#define IXGBE_MSCA_ADDR_CYCLE 0x00000000 /* OP CODE 00 (addr cycle) */ +#define IXGBE_MSCA_WRITE 0x04000000 /* OP CODE 01 (wr) */ +#define IXGBE_MSCA_READ 0x0C000000 /* OP CODE 11 (rd) */ +#define IXGBE_MSCA_READ_AUTOINC 0x08000000 /* OP CODE 10 (rd auto inc)*/ +#define IXGBE_MSCA_ST_CODE_MASK 0x30000000 /* ST Code mask */ +#define IXGBE_MSCA_ST_CODE_SHIFT 28 /* ST Code shift */ +#define IXGBE_MSCA_NEW_PROTOCOL 0x00000000 /* ST CODE 00 (new prot) */ +#define IXGBE_MSCA_OLD_PROTOCOL 0x10000000 /* ST CODE 01 (old prot) */ +#define IXGBE_MSCA_MDI_COMMAND 0x40000000 /* Initiate MDI command */ +#define IXGBE_MSCA_MDI_IN_PROG_EN 0x80000000 /* MDI in progress ena */ + +/* MSRWD bit masks */ +#define IXGBE_MSRWD_WRITE_DATA_MASK 0x0000FFFF +#define IXGBE_MSRWD_WRITE_DATA_SHIFT 0 +#define IXGBE_MSRWD_READ_DATA_MASK 0xFFFF0000 +#define IXGBE_MSRWD_READ_DATA_SHIFT 16 + +/* Atlas registers */ +#define IXGBE_ATLAS_PDN_LPBK 0x24 +#define IXGBE_ATLAS_PDN_10G 0xB +#define IXGBE_ATLAS_PDN_1G 0xC +#define IXGBE_ATLAS_PDN_AN 0xD + +/* Atlas bit masks */ +#define IXGBE_ATLASCTL_WRITE_CMD 0x00010000 +#define IXGBE_ATLAS_PDN_TX_REG_EN 0x10 +#define IXGBE_ATLAS_PDN_TX_10G_QL_ALL 0xF0 +#define IXGBE_ATLAS_PDN_TX_1G_QL_ALL 0xF0 +#define IXGBE_ATLAS_PDN_TX_AN_QL_ALL 0xF0 + +/* Omer bit masks */ +#define IXGBE_CORECTL_WRITE_CMD 0x00010000 + +/* Device Type definitions for new protocol MDIO commands */ +#define IXGBE_MDIO_ZERO_DEV_TYPE 0x0 +#define IXGBE_MDIO_PMA_PMD_DEV_TYPE 0x1 +#define IXGBE_MDIO_PCS_DEV_TYPE 0x3 +#define IXGBE_MDIO_PHY_XS_DEV_TYPE 0x4 +#define IXGBE_MDIO_AUTO_NEG_DEV_TYPE 0x7 +#define IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE 0x1E /* Device 30 */ +#define IXGBE_TWINAX_DEV 1 + +#define IXGBE_MDIO_COMMAND_TIMEOUT 100 /* PHY Timeout for 1 GB mode */ + +#define IXGBE_MDIO_VENDOR_SPECIFIC_1_CONTROL 0x0 /* VS1 Ctrl Reg */ +#define IXGBE_MDIO_VENDOR_SPECIFIC_1_STATUS 0x1 /* VS1 Status Reg */ +#define IXGBE_MDIO_VENDOR_SPECIFIC_1_LINK_STATUS 0x0008 /* 1 = Link Up */ +#define IXGBE_MDIO_VENDOR_SPECIFIC_1_SPEED_STATUS 0x0010 /* 0-10G, 1-1G */ +#define IXGBE_MDIO_VENDOR_SPECIFIC_1_10G_SPEED 0x0018 +#define IXGBE_MDIO_VENDOR_SPECIFIC_1_1G_SPEED 0x0010 + +#define IXGBE_MDIO_AUTO_NEG_CONTROL 0x0 /* AUTO_NEG Control Reg */ +#define IXGBE_MDIO_AUTO_NEG_STATUS 0x1 /* AUTO_NEG Status Reg */ +#define IXGBE_MDIO_AUTO_NEG_VENDOR_STAT 0xC800 /* AUTO_NEG Vendor Status Reg */ +#define IXGBE_MDIO_AUTO_NEG_VENDOR_TX_ALARM 0xCC00 /* AUTO_NEG Vendor TX Reg */ +#define IXGBE_MDIO_AUTO_NEG_VENDOR_TX_ALARM2 0xCC01 /* AUTO_NEG Vendor Tx Reg */ +#define IXGBE_MDIO_AUTO_NEG_VEN_LSC 0x1 /* AUTO_NEG Vendor Tx LSC */ +#define IXGBE_MDIO_AUTO_NEG_ADVT 0x10 /* AUTO_NEG Advt Reg */ +#define IXGBE_MDIO_AUTO_NEG_LP 0x13 /* AUTO_NEG LP Status Reg */ +#define IXGBE_MDIO_AUTO_NEG_EEE_ADVT 0x3C /* AUTO_NEG EEE Advt Reg */ +#define IXGBE_AUTO_NEG_10GBASE_EEE_ADVT 0x8 /* AUTO NEG EEE 10GBaseT Advt */ +#define IXGBE_AUTO_NEG_1000BASE_EEE_ADVT 0x4 /* AUTO NEG EEE 1000BaseT Advt */ +#define IXGBE_AUTO_NEG_100BASE_EEE_ADVT 0x2 /* AUTO NEG EEE 100BaseT Advt */ +#define IXGBE_MDIO_PHY_XS_CONTROL 0x0 /* PHY_XS Control Reg */ +#define IXGBE_MDIO_PHY_XS_RESET 0x8000 /* PHY_XS Reset */ +#define IXGBE_MDIO_PHY_ID_HIGH 0x2 /* PHY ID High Reg*/ +#define IXGBE_MDIO_PHY_ID_LOW 0x3 /* PHY ID Low Reg*/ +#define IXGBE_MDIO_PHY_SPEED_ABILITY 0x4 /* Speed Ability Reg */ +#define IXGBE_MDIO_PHY_SPEED_10G 0x0001 /* 10G capable */ +#define IXGBE_MDIO_PHY_SPEED_1G 0x0010 /* 1G capable */ +#define IXGBE_MDIO_PHY_SPEED_100M 0x0020 /* 100M capable */ +#define IXGBE_MDIO_PHY_EXT_ABILITY 0xB /* Ext Ability Reg */ +#define IXGBE_MDIO_PHY_10GBASET_ABILITY 0x0004 /* 10GBaseT capable */ +#define IXGBE_MDIO_PHY_1000BASET_ABILITY 0x0020 /* 1000BaseT capable */ +#define IXGBE_MDIO_PHY_100BASETX_ABILITY 0x0080 /* 100BaseTX capable */ +#define IXGBE_MDIO_PHY_SET_LOW_POWER_MODE 0x0800 /* Set low power mode */ +#define IXGBE_AUTO_NEG_LP_STATUS 0xE820 /* AUTO NEG Rx LP Status Reg */ +#define IXGBE_AUTO_NEG_LP_1000BASE_CAP 0x8000 /* AUTO NEG Rx LP 1000BaseT Cap */ +#define IXGBE_AUTO_NEG_LP_10GBASE_CAP 0x0800 /* AUTO NEG Rx LP 10GBaseT Cap */ +#define IXGBE_AUTO_NEG_10GBASET_STAT 0x0021 /* AUTO NEG 10G BaseT Stat */ + +#define IXGBE_MDIO_TX_VENDOR_ALARMS_3 0xCC02 /* Vendor Alarms 3 Reg */ +#define IXGBE_MDIO_TX_VENDOR_ALARMS_3_RST_MASK 0x3 /* PHY Reset Complete Mask */ +#define IXGBE_MDIO_GLOBAL_RES_PR_10 0xC479 /* Global Resv Provisioning 10 Reg */ +#define IXGBE_MDIO_POWER_UP_STALL 0x8000 /* Power Up Stall */ +#define IXGBE_MDIO_GLOBAL_INT_CHIP_STD_MASK 0xFF00 /* int std mask */ +#define IXGBE_MDIO_GLOBAL_CHIP_STD_INT_FLAG 0xFC00 /* chip std int flag */ +#define IXGBE_MDIO_GLOBAL_INT_CHIP_VEN_MASK 0xFF01 /* int chip-wide mask */ +#define IXGBE_MDIO_GLOBAL_INT_CHIP_VEN_FLAG 0xFC01 /* int chip-wide mask */ +#define IXGBE_MDIO_GLOBAL_ALARM_1 0xCC00 /* Global alarm 1 */ +#define IXGBE_MDIO_GLOBAL_ALM_1_DEV_FAULT 0x0010 /* device fault */ +#define IXGBE_MDIO_GLOBAL_ALM_1_HI_TMP_FAIL 0x4000 /* high temp failure */ +#define IXGBE_MDIO_GLOBAL_FAULT_MSG 0xC850 /* Global Fault Message */ +#define IXGBE_MDIO_GLOBAL_FAULT_MSG_HI_TMP 0x8007 /* high temp failure */ +#define IXGBE_MDIO_GLOBAL_INT_MASK 0xD400 /* Global int mask */ +#define IXGBE_MDIO_GLOBAL_AN_VEN_ALM_INT_EN 0x1000 /* autoneg vendor alarm int enable */ +#define IXGBE_MDIO_GLOBAL_ALARM_1_INT 0x4 /* int in Global alarm 1 */ +#define IXGBE_MDIO_GLOBAL_VEN_ALM_INT_EN 0x1 /* vendor alarm int enable */ +#define IXGBE_MDIO_GLOBAL_STD_ALM2_INT 0x200 /* vendor alarm2 int mask */ +#define IXGBE_MDIO_GLOBAL_INT_HI_TEMP_EN 0x4000 /* int high temp enable */ +#define IXGBE_MDIO_GLOBAL_INT_DEV_FAULT_EN 0x0010 /* int dev fault enable */ +#define IXGBE_MDIO_PMA_PMD_CONTROL_ADDR 0x0000 /* PMA/PMD Control Reg */ +#define IXGBE_MDIO_PMA_PMD_SDA_SCL_ADDR 0xC30A /* PHY_XS SDA/SCL Addr Reg */ +#define IXGBE_MDIO_PMA_PMD_SDA_SCL_DATA 0xC30B /* PHY_XS SDA/SCL Data Reg */ +#define IXGBE_MDIO_PMA_PMD_SDA_SCL_STAT 0xC30C /* PHY_XS SDA/SCL Status Reg */ +#define IXGBE_MDIO_PMA_TX_VEN_LASI_INT_MASK 0xD401 /* PHY TX Vendor LASI */ +#define IXGBE_MDIO_PMA_TX_VEN_LASI_INT_EN 0x1 /* PHY TX Vendor LASI enable */ +#define IXGBE_MDIO_PMD_STD_TX_DISABLE_CNTR 0x9 /* Standard Transmit Dis Reg */ +#define IXGBE_MDIO_PMD_GLOBAL_TX_DISABLE 0x0001 /* PMD Global Transmit Dis */ + +#define IXGBE_PCRC8ECL 0x0E810 /* PCR CRC-8 Error Count Lo */ +#define IXGBE_PCRC8ECH 0x0E811 /* PCR CRC-8 Error Count Hi */ +#define IXGBE_PCRC8ECH_MASK 0x1F +#define IXGBE_LDPCECL 0x0E820 /* PCR Uncorrected Error Count Lo */ +#define IXGBE_LDPCECH 0x0E821 /* PCR Uncorrected Error Count Hi */ + +/* MII clause 22/28 definitions */ +#define IXGBE_MDIO_PHY_LOW_POWER_MODE 0x0800 + +#define IXGBE_MDIO_XENPAK_LASI_STATUS 0x9005 /* XENPAK LASI Status register*/ +#define IXGBE_XENPAK_LASI_LINK_STATUS_ALARM 0x1 /* Link Status Alarm change */ + +#define IXGBE_MDIO_AUTO_NEG_LINK_STATUS 0x4 /* Indicates if link is up */ + +#define IXGBE_MDIO_AUTO_NEG_VENDOR_STATUS_MASK 0x7 /* Speed/Duplex Mask */ +#define IXGBE_MDIO_AUTO_NEG_VEN_STAT_SPEED_MASK 0x6 /* Speed Mask */ +#define IXGBE_MDIO_AUTO_NEG_VENDOR_STATUS_10M_HALF 0x0 /* 10Mb/s Half Duplex */ +#define IXGBE_MDIO_AUTO_NEG_VENDOR_STATUS_10M_FULL 0x1 /* 10Mb/s Full Duplex */ +#define IXGBE_MDIO_AUTO_NEG_VENDOR_STATUS_100M_HALF 0x2 /* 100Mb/s Half Duplex */ +#define IXGBE_MDIO_AUTO_NEG_VENDOR_STATUS_100M_FULL 0x3 /* 100Mb/s Full Duplex */ +#define IXGBE_MDIO_AUTO_NEG_VENDOR_STATUS_1GB_HALF 0x4 /* 1Gb/s Half Duplex */ +#define IXGBE_MDIO_AUTO_NEG_VENDOR_STATUS_1GB_FULL 0x5 /* 1Gb/s Full Duplex */ +#define IXGBE_MDIO_AUTO_NEG_VENDOR_STATUS_10GB_HALF 0x6 /* 10Gb/s Half Duplex */ +#define IXGBE_MDIO_AUTO_NEG_VENDOR_STATUS_10GB_FULL 0x7 /* 10Gb/s Full Duplex */ +#define IXGBE_MDIO_AUTO_NEG_VENDOR_STATUS_1GB 0x4 /* 1Gb/s */ +#define IXGBE_MDIO_AUTO_NEG_VENDOR_STATUS_10GB 0x6 /* 10Gb/s */ + +#define IXGBE_MII_10GBASE_T_AUTONEG_CTRL_REG 0x20 /* 10G Control Reg */ +#define IXGBE_MII_AUTONEG_VENDOR_PROVISION_1_REG 0xC400 /* 1G Provisioning 1 */ +#define IXGBE_MII_AUTONEG_XNP_TX_REG 0x17 /* 1G XNP Transmit */ +#define IXGBE_MII_AUTONEG_ADVERTISE_REG 0x10 /* 100M Advertisement */ +#define IXGBE_MII_10GBASE_T_ADVERTISE 0x1000 /* full duplex, bit:12*/ +#define IXGBE_MII_1GBASE_T_ADVERTISE_XNP_TX 0x4000 /* full duplex, bit:14*/ +#define IXGBE_MII_1GBASE_T_ADVERTISE 0x8000 /* full duplex, bit:15*/ +#define IXGBE_MII_2_5GBASE_T_ADVERTISE 0x0400 +#define IXGBE_MII_5GBASE_T_ADVERTISE 0x0800 +#define IXGBE_MII_100BASE_T_ADVERTISE 0x0100 /* full duplex, bit:8 */ +#define IXGBE_MII_100BASE_T_ADVERTISE_HALF 0x0080 /* half duplex, bit:7 */ +#define IXGBE_MII_RESTART 0x200 +#define IXGBE_MII_AUTONEG_COMPLETE 0x20 +#define IXGBE_MII_AUTONEG_LINK_UP 0x04 +#define IXGBE_MII_AUTONEG_REG 0x0 + +#define IXGBE_PHY_REVISION_MASK 0xFFFFFFF0 +#define IXGBE_MAX_PHY_ADDR 32 + +/* PHY IDs*/ +#define TN1010_PHY_ID 0x00A19410 +#define TNX_FW_REV 0xB +#define X540_PHY_ID 0x01540200 +#define X550_PHY_ID 0x01540220 +#define X550_PHY_ID2 0x01540223 +#define X550_PHY_ID3 0x01540221 +#define X557_PHY_ID 0x01540240 +#define X557_PHY_ID2 0x01540250 +#define AQ_FW_REV 0x20 +#define QT2022_PHY_ID 0x0043A400 +#define ATH_PHY_ID 0x03429050 + +/* PHY Types */ +#define IXGBE_M88E1500_E_PHY_ID 0x01410DD0 +#define IXGBE_M88E1543_E_PHY_ID 0x01410EA0 + +/* Special PHY Init Routine */ +#define IXGBE_PHY_INIT_OFFSET_NL 0x002B +#define IXGBE_PHY_INIT_END_NL 0xFFFF +#define IXGBE_CONTROL_MASK_NL 0xF000 +#define IXGBE_DATA_MASK_NL 0x0FFF +#define IXGBE_CONTROL_SHIFT_NL 12 +#define IXGBE_DELAY_NL 0 +#define IXGBE_DATA_NL 1 +#define IXGBE_CONTROL_NL 0x000F +#define IXGBE_CONTROL_EOL_NL 0x0FFF +#define IXGBE_CONTROL_SOL_NL 0x0000 + +/* General purpose Interrupt Enable */ +#define IXGBE_SDP0_GPIEN 0x00000001 /* SDP0 */ +#define IXGBE_SDP1_GPIEN 0x00000002 /* SDP1 */ +#define IXGBE_SDP2_GPIEN 0x00000004 /* SDP2 */ +#define IXGBE_SDP0_GPIEN_X540 0x00000002 /* SDP0 on X540 and X550 */ +#define IXGBE_SDP1_GPIEN_X540 0x00000004 /* SDP1 on X540 and X550 */ +#define IXGBE_SDP2_GPIEN_X540 0x00000008 /* SDP2 on X540 and X550 */ +#define IXGBE_SDP0_GPIEN_X550 IXGBE_SDP0_GPIEN_X540 +#define IXGBE_SDP1_GPIEN_X550 IXGBE_SDP1_GPIEN_X540 +#define IXGBE_SDP2_GPIEN_X550 IXGBE_SDP2_GPIEN_X540 +#define IXGBE_SDP0_GPIEN_X550EM_x IXGBE_SDP0_GPIEN_X540 +#define IXGBE_SDP1_GPIEN_X550EM_x IXGBE_SDP1_GPIEN_X540 +#define IXGBE_SDP2_GPIEN_X550EM_x IXGBE_SDP2_GPIEN_X540 +#define IXGBE_SDP0_GPIEN_X550EM_a IXGBE_SDP0_GPIEN_X540 +#define IXGBE_SDP1_GPIEN_X550EM_a IXGBE_SDP1_GPIEN_X540 +#define IXGBE_SDP2_GPIEN_X550EM_a IXGBE_SDP2_GPIEN_X540 +#define IXGBE_SDP0_GPIEN_BY_MAC(_hw) IXGBE_BY_MAC((_hw), SDP0_GPIEN) +#define IXGBE_SDP1_GPIEN_BY_MAC(_hw) IXGBE_BY_MAC((_hw), SDP1_GPIEN) +#define IXGBE_SDP2_GPIEN_BY_MAC(_hw) IXGBE_BY_MAC((_hw), SDP2_GPIEN) + +#define IXGBE_GPIE_MSIX_MODE 0x00000010 /* MSI-X mode */ +#define IXGBE_GPIE_OCD 0x00000020 /* Other Clear Disable */ +#define IXGBE_GPIE_EIMEN 0x00000040 /* Immediate Interrupt Enable */ +#define IXGBE_GPIE_EIAME 0x40000000 +#define IXGBE_GPIE_PBA_SUPPORT 0x80000000 +#define IXGBE_GPIE_RSC_DELAY_SHIFT 11 +#define IXGBE_GPIE_VTMODE_MASK 0x0000C000 /* VT Mode Mask */ +#define IXGBE_GPIE_VTMODE_16 0x00004000 /* 16 VFs 8 queues per VF */ +#define IXGBE_GPIE_VTMODE_32 0x00008000 /* 32 VFs 4 queues per VF */ +#define IXGBE_GPIE_VTMODE_64 0x0000C000 /* 64 VFs 2 queues per VF */ + +/* Packet Buffer Initialization */ +#define IXGBE_MAX_PACKET_BUFFERS 8 + +#define IXGBE_TXPBSIZE_20KB 0x00005000 /* 20KB Packet Buffer */ +#define IXGBE_TXPBSIZE_40KB 0x0000A000 /* 40KB Packet Buffer */ +#define IXGBE_RXPBSIZE_48KB 0x0000C000 /* 48KB Packet Buffer */ +#define IXGBE_RXPBSIZE_64KB 0x00010000 /* 64KB Packet Buffer */ +#define IXGBE_RXPBSIZE_80KB 0x00014000 /* 80KB Packet Buffer */ +#define IXGBE_RXPBSIZE_128KB 0x00020000 /* 128KB Packet Buffer */ +#define IXGBE_RXPBSIZE_MAX 0x00080000 /* 512KB Packet Buffer */ +#define IXGBE_TXPBSIZE_MAX 0x00028000 /* 160KB Packet Buffer */ + +#define IXGBE_TXPKT_SIZE_MAX 0xA /* Max Tx Packet size */ +#define IXGBE_MAX_PB 8 + +/* Packet buffer allocation strategies */ +enum { + PBA_STRATEGY_EQUAL = 0, /* Distribute PB space equally */ +#define PBA_STRATEGY_EQUAL PBA_STRATEGY_EQUAL + PBA_STRATEGY_WEIGHTED = 1, /* Weight front half of TCs */ +#define PBA_STRATEGY_WEIGHTED PBA_STRATEGY_WEIGHTED +}; + +/* Transmit Flow Control status */ +#define IXGBE_TFCS_TXOFF 0x00000001 +#define IXGBE_TFCS_TXOFF0 0x00000100 +#define IXGBE_TFCS_TXOFF1 0x00000200 +#define IXGBE_TFCS_TXOFF2 0x00000400 +#define IXGBE_TFCS_TXOFF3 0x00000800 +#define IXGBE_TFCS_TXOFF4 0x00001000 +#define IXGBE_TFCS_TXOFF5 0x00002000 +#define IXGBE_TFCS_TXOFF6 0x00004000 +#define IXGBE_TFCS_TXOFF7 0x00008000 + +/* TCP Timer */ +#define IXGBE_TCPTIMER_KS 0x00000100 +#define IXGBE_TCPTIMER_COUNT_ENABLE 0x00000200 +#define IXGBE_TCPTIMER_COUNT_FINISH 0x00000400 +#define IXGBE_TCPTIMER_LOOP 0x00000800 +#define IXGBE_TCPTIMER_DURATION_MASK 0x000000FF + +/* HLREG0 Bit Masks */ +#define IXGBE_HLREG0_TXCRCEN 0x00000001 /* bit 0 */ +#define IXGBE_HLREG0_RXCRCSTRP 0x00000002 /* bit 1 */ +#define IXGBE_HLREG0_JUMBOEN 0x00000004 /* bit 2 */ +#define IXGBE_HLREG0_TXPADEN 0x00000400 /* bit 10 */ +#define IXGBE_HLREG0_TXPAUSEEN 0x00001000 /* bit 12 */ +#define IXGBE_HLREG0_RXPAUSEEN 0x00004000 /* bit 14 */ +#define IXGBE_HLREG0_LPBK 0x00008000 /* bit 15 */ +#define IXGBE_HLREG0_MDCSPD 0x00010000 /* bit 16 */ +#define IXGBE_HLREG0_CONTMDC 0x00020000 /* bit 17 */ +#define IXGBE_HLREG0_CTRLFLTR 0x00040000 /* bit 18 */ +#define IXGBE_HLREG0_PREPEND 0x00F00000 /* bits 20-23 */ +#define IXGBE_HLREG0_PRIPAUSEEN 0x01000000 /* bit 24 */ +#define IXGBE_HLREG0_RXPAUSERECDA 0x06000000 /* bits 25-26 */ +#define IXGBE_HLREG0_RXLNGTHERREN 0x08000000 /* bit 27 */ +#define IXGBE_HLREG0_RXPADSTRIPEN 0x10000000 /* bit 28 */ + +/* VMD_CTL bitmasks */ +#define IXGBE_VMD_CTL_VMDQ_EN 0x00000001 +#define IXGBE_VMD_CTL_VMDQ_FILTER 0x00000002 + +/* VT_CTL bitmasks */ +#define IXGBE_VT_CTL_DIS_DEFPL 0x20000000 /* disable default pool */ +#define IXGBE_VT_CTL_REPLEN 0x40000000 /* replication enabled */ +#define IXGBE_VT_CTL_VT_ENABLE 0x00000001 /* Enable VT Mode */ +#define IXGBE_VT_CTL_POOL_SHIFT 7 +#define IXGBE_VT_CTL_POOL_MASK (0x3F << IXGBE_VT_CTL_POOL_SHIFT) + +/* VMOLR bitmasks */ +#define IXGBE_VMOLR_UPE 0x00400000 /* unicast promiscuous */ +#define IXGBE_VMOLR_VPE 0x00800000 /* VLAN promiscuous */ +#define IXGBE_VMOLR_AUPE 0x01000000 /* accept untagged packets */ +#define IXGBE_VMOLR_ROMPE 0x02000000 /* accept packets in MTA tbl */ +#define IXGBE_VMOLR_ROPE 0x04000000 /* accept packets in UC tbl */ +#define IXGBE_VMOLR_BAM 0x08000000 /* accept broadcast packets */ +#define IXGBE_VMOLR_MPE 0x10000000 /* multicast promiscuous */ + +/* VFRE bitmask */ +#define IXGBE_VFRE_ENABLE_ALL 0xFFFFFFFF + +#define IXGBE_VF_INIT_TIMEOUT 200 /* Number of retries to clear RSTI */ + +/* RDHMPN and TDHMPN bitmasks */ +#define IXGBE_RDHMPN_RDICADDR 0x007FF800 +#define IXGBE_RDHMPN_RDICRDREQ 0x00800000 +#define IXGBE_RDHMPN_RDICADDR_SHIFT 11 +#define IXGBE_TDHMPN_TDICADDR 0x003FF800 +#define IXGBE_TDHMPN_TDICRDREQ 0x00800000 +#define IXGBE_TDHMPN_TDICADDR_SHIFT 11 + +#define IXGBE_RDMAM_MEM_SEL_SHIFT 13 +#define IXGBE_RDMAM_DWORD_SHIFT 9 +#define IXGBE_RDMAM_DESC_COMP_FIFO 1 +#define IXGBE_RDMAM_DFC_CMD_FIFO 2 +#define IXGBE_RDMAM_RSC_HEADER_ADDR 3 +#define IXGBE_RDMAM_TCN_STATUS_RAM 4 +#define IXGBE_RDMAM_WB_COLL_FIFO 5 +#define IXGBE_RDMAM_QSC_CNT_RAM 6 +#define IXGBE_RDMAM_QSC_FCOE_RAM 7 +#define IXGBE_RDMAM_QSC_QUEUE_CNT 8 +#define IXGBE_RDMAM_QSC_QUEUE_RAM 0xA +#define IXGBE_RDMAM_QSC_RSC_RAM 0xB +#define IXGBE_RDMAM_DESC_COM_FIFO_RANGE 135 +#define IXGBE_RDMAM_DESC_COM_FIFO_COUNT 4 +#define IXGBE_RDMAM_DFC_CMD_FIFO_RANGE 48 +#define IXGBE_RDMAM_DFC_CMD_FIFO_COUNT 7 +#define IXGBE_RDMAM_RSC_HEADER_ADDR_RANGE 32 +#define IXGBE_RDMAM_RSC_HEADER_ADDR_COUNT 4 +#define IXGBE_RDMAM_TCN_STATUS_RAM_RANGE 256 +#define IXGBE_RDMAM_TCN_STATUS_RAM_COUNT 9 +#define IXGBE_RDMAM_WB_COLL_FIFO_RANGE 8 +#define IXGBE_RDMAM_WB_COLL_FIFO_COUNT 4 +#define IXGBE_RDMAM_QSC_CNT_RAM_RANGE 64 +#define IXGBE_RDMAM_QSC_CNT_RAM_COUNT 4 +#define IXGBE_RDMAM_QSC_FCOE_RAM_RANGE 512 +#define IXGBE_RDMAM_QSC_FCOE_RAM_COUNT 5 +#define IXGBE_RDMAM_QSC_QUEUE_CNT_RANGE 32 +#define IXGBE_RDMAM_QSC_QUEUE_CNT_COUNT 4 +#define IXGBE_RDMAM_QSC_QUEUE_RAM_RANGE 128 +#define IXGBE_RDMAM_QSC_QUEUE_RAM_COUNT 8 +#define IXGBE_RDMAM_QSC_RSC_RAM_RANGE 32 +#define IXGBE_RDMAM_QSC_RSC_RAM_COUNT 8 + +#define IXGBE_TXDESCIC_READY 0x80000000 + +/* Receive Checksum Control */ +#define IXGBE_RXCSUM_IPPCSE 0x00001000 /* IP payload checksum enable */ +#define IXGBE_RXCSUM_PCSD 0x00002000 /* packet checksum disabled */ + +/* FCRTL Bit Masks */ +#define IXGBE_FCRTL_XONE 0x80000000 /* XON enable */ +#define IXGBE_FCRTH_FCEN 0x80000000 /* Packet buffer fc enable */ + +/* PAP bit masks*/ +#define IXGBE_PAP_TXPAUSECNT_MASK 0x0000FFFF /* Pause counter mask */ + +/* RMCS Bit Masks */ +#define IXGBE_RMCS_RRM 0x00000002 /* Rx Recycle Mode enable */ +/* Receive Arbitration Control: 0 Round Robin, 1 DFP */ +#define IXGBE_RMCS_RAC 0x00000004 +/* Deficit Fixed Prio ena */ +#define IXGBE_RMCS_DFP IXGBE_RMCS_RAC +#define IXGBE_RMCS_TFCE_802_3X 0x00000008 /* Tx Priority FC ena */ +#define IXGBE_RMCS_TFCE_PRIORITY 0x00000010 /* Tx Priority FC ena */ +#define IXGBE_RMCS_ARBDIS 0x00000040 /* Arbitration disable bit */ + +/* FCCFG Bit Masks */ +#define IXGBE_FCCFG_TFCE_802_3X 0x00000008 /* Tx link FC enable */ +#define IXGBE_FCCFG_TFCE_PRIORITY 0x00000010 /* Tx priority FC enable */ + +/* Interrupt register bitmasks */ + +/* Extended Interrupt Cause Read */ +#define IXGBE_EICR_RTX_QUEUE 0x0000FFFF /* RTx Queue Interrupt */ +#define IXGBE_EICR_FLOW_DIR 0x00010000 /* FDir Exception */ +#define IXGBE_EICR_RX_MISS 0x00020000 /* Packet Buffer Overrun */ +#define IXGBE_EICR_PCI 0x00040000 /* PCI Exception */ +#define IXGBE_EICR_MAILBOX 0x00080000 /* VF to PF Mailbox Interrupt */ +#define IXGBE_EICR_LSC 0x00100000 /* Link Status Change */ +#define IXGBE_EICR_LINKSEC 0x00200000 /* PN Threshold */ +#define IXGBE_EICR_FW_EVENT 0x00200000 /* Async FW event */ +#define IXGBE_EICR_MNG 0x00400000 /* Manageability Event Interrupt */ +#define IXGBE_EICR_TS 0x00800000 /* Thermal Sensor Event */ +#define IXGBE_EICR_TIMESYNC 0x01000000 /* Timesync Event */ +#define IXGBE_EICR_GPI_SDP0 0x01000000 /* Gen Purpose Interrupt on SDP0 */ +#define IXGBE_EICR_GPI_SDP1 0x02000000 /* Gen Purpose Interrupt on SDP1 */ +#define IXGBE_EICR_GPI_SDP2 0x04000000 /* Gen Purpose Interrupt on SDP2 */ +#define IXGBE_EICR_ECC 0x10000000 /* ECC Error */ +#define IXGBE_EICR_GPI_SDP0_X540 0x02000000 /* Gen Purpose Interrupt on SDP0 */ +#define IXGBE_EICR_GPI_SDP1_X540 0x04000000 /* Gen Purpose Interrupt on SDP1 */ +#define IXGBE_EICR_GPI_SDP2_X540 0x08000000 /* Gen Purpose Interrupt on SDP2 */ +#define IXGBE_EICR_GPI_SDP0_X550 IXGBE_EICR_GPI_SDP0_X540 +#define IXGBE_EICR_GPI_SDP1_X550 IXGBE_EICR_GPI_SDP1_X540 +#define IXGBE_EICR_GPI_SDP2_X550 IXGBE_EICR_GPI_SDP2_X540 +#define IXGBE_EICR_GPI_SDP0_X550EM_x IXGBE_EICR_GPI_SDP0_X540 +#define IXGBE_EICR_GPI_SDP1_X550EM_x IXGBE_EICR_GPI_SDP1_X540 +#define IXGBE_EICR_GPI_SDP2_X550EM_x IXGBE_EICR_GPI_SDP2_X540 +#define IXGBE_EICR_GPI_SDP0_X550EM_a IXGBE_EICR_GPI_SDP0_X540 +#define IXGBE_EICR_GPI_SDP1_X550EM_a IXGBE_EICR_GPI_SDP1_X540 +#define IXGBE_EICR_GPI_SDP2_X550EM_a IXGBE_EICR_GPI_SDP2_X540 +#define IXGBE_EICR_GPI_SDP0_BY_MAC(_hw) IXGBE_BY_MAC((_hw), EICR_GPI_SDP0) +#define IXGBE_EICR_GPI_SDP1_BY_MAC(_hw) IXGBE_BY_MAC((_hw), EICR_GPI_SDP1) +#define IXGBE_EICR_GPI_SDP2_BY_MAC(_hw) IXGBE_BY_MAC((_hw), EICR_GPI_SDP2) + +#define IXGBE_EICR_PBUR 0x10000000 /* Packet Buffer Handler Error */ +#define IXGBE_EICR_DHER 0x20000000 /* Descriptor Handler Error */ +#define IXGBE_EICR_TCP_TIMER 0x40000000 /* TCP Timer */ +#define IXGBE_EICR_OTHER 0x80000000 /* Interrupt Cause Active */ + +/* Extended Interrupt Cause Set */ +#define IXGBE_EICS_RTX_QUEUE IXGBE_EICR_RTX_QUEUE /* RTx Queue Interrupt */ +#define IXGBE_EICS_FLOW_DIR IXGBE_EICR_FLOW_DIR /* FDir Exception */ +#define IXGBE_EICS_RX_MISS IXGBE_EICR_RX_MISS /* Pkt Buffer Overrun */ +#define IXGBE_EICS_PCI IXGBE_EICR_PCI /* PCI Exception */ +#define IXGBE_EICS_MAILBOX IXGBE_EICR_MAILBOX /* VF to PF Mailbox Int */ +#define IXGBE_EICS_LSC IXGBE_EICR_LSC /* Link Status Change */ +#define IXGBE_EICS_FW_EVENT IXGBE_EICR_FW_EVENT /* Async FW event */ +#define IXGBE_EICS_MNG IXGBE_EICR_MNG /* MNG Event Interrupt */ +#define IXGBE_EICS_TIMESYNC IXGBE_EICR_TIMESYNC /* Timesync Event */ +#define IXGBE_EICS_GPI_SDP0 IXGBE_EICR_GPI_SDP0 /* SDP0 Gen Purpose Int */ +#define IXGBE_EICS_GPI_SDP1 IXGBE_EICR_GPI_SDP1 /* SDP1 Gen Purpose Int */ +#define IXGBE_EICS_GPI_SDP2 IXGBE_EICR_GPI_SDP2 /* SDP2 Gen Purpose Int */ +#define IXGBE_EICS_ECC IXGBE_EICR_ECC /* ECC Error */ +#define IXGBE_EICS_GPI_SDP0_BY_MAC(_hw) IXGBE_EICR_GPI_SDP0_BY_MAC(_hw) +#define IXGBE_EICS_GPI_SDP1_BY_MAC(_hw) IXGBE_EICR_GPI_SDP1_BY_MAC(_hw) +#define IXGBE_EICS_GPI_SDP2_BY_MAC(_hw) IXGBE_EICR_GPI_SDP2_BY_MAC(_hw) +#define IXGBE_EICS_PBUR IXGBE_EICR_PBUR /* Pkt Buf Handler Err */ +#define IXGBE_EICS_DHER IXGBE_EICR_DHER /* Desc Handler Error */ +#define IXGBE_EICS_TCP_TIMER IXGBE_EICR_TCP_TIMER /* TCP Timer */ +#define IXGBE_EICS_OTHER IXGBE_EICR_OTHER /* INT Cause Active */ + +/* Extended Interrupt Mask Set */ +#define IXGBE_EIMS_RTX_QUEUE IXGBE_EICR_RTX_QUEUE /* RTx Queue Interrupt */ +#define IXGBE_EIMS_FLOW_DIR IXGBE_EICR_FLOW_DIR /* FDir Exception */ +#define IXGBE_EIMS_RX_MISS IXGBE_EICR_RX_MISS /* Packet Buffer Overrun */ +#define IXGBE_EIMS_PCI IXGBE_EICR_PCI /* PCI Exception */ +#define IXGBE_EIMS_MAILBOX IXGBE_EICR_MAILBOX /* VF to PF Mailbox Int */ +#define IXGBE_EIMS_LSC IXGBE_EICR_LSC /* Link Status Change */ +#define IXGBE_EIMS_FW_EVENT IXGBE_EICR_FW_EVENT /* Async FW event */ +#define IXGBE_EIMS_MNG IXGBE_EICR_MNG /* MNG Event Interrupt */ +#define IXGBE_EIMS_TS IXGBE_EICR_TS /* Thermal Sensor Event */ +#define IXGBE_EIMS_TIMESYNC IXGBE_EICR_TIMESYNC /* Timesync Event */ +#define IXGBE_EIMS_GPI_SDP0 IXGBE_EICR_GPI_SDP0 /* SDP0 Gen Purpose Int */ +#define IXGBE_EIMS_GPI_SDP1 IXGBE_EICR_GPI_SDP1 /* SDP1 Gen Purpose Int */ +#define IXGBE_EIMS_GPI_SDP2 IXGBE_EICR_GPI_SDP2 /* SDP2 Gen Purpose Int */ +#define IXGBE_EIMS_ECC IXGBE_EICR_ECC /* ECC Error */ +#define IXGBE_EIMS_GPI_SDP0_BY_MAC(_hw) IXGBE_EICR_GPI_SDP0_BY_MAC(_hw) +#define IXGBE_EIMS_GPI_SDP1_BY_MAC(_hw) IXGBE_EICR_GPI_SDP1_BY_MAC(_hw) +#define IXGBE_EIMS_GPI_SDP2_BY_MAC(_hw) IXGBE_EICR_GPI_SDP2_BY_MAC(_hw) +#define IXGBE_EIMS_PBUR IXGBE_EICR_PBUR /* Pkt Buf Handler Err */ +#define IXGBE_EIMS_DHER IXGBE_EICR_DHER /* Descr Handler Error */ +#define IXGBE_EIMS_TCP_TIMER IXGBE_EICR_TCP_TIMER /* TCP Timer */ +#define IXGBE_EIMS_OTHER IXGBE_EICR_OTHER /* INT Cause Active */ + +/* Extended Interrupt Mask Clear */ +#define IXGBE_EIMC_RTX_QUEUE IXGBE_EICR_RTX_QUEUE /* RTx Queue Interrupt */ +#define IXGBE_EIMC_FLOW_DIR IXGBE_EICR_FLOW_DIR /* FDir Exception */ +#define IXGBE_EIMC_RX_MISS IXGBE_EICR_RX_MISS /* Packet Buffer Overrun */ +#define IXGBE_EIMC_PCI IXGBE_EICR_PCI /* PCI Exception */ +#define IXGBE_EIMC_MAILBOX IXGBE_EICR_MAILBOX /* VF to PF Mailbox Int */ +#define IXGBE_EIMC_LSC IXGBE_EICR_LSC /* Link Status Change */ +#define IXGBE_EIMC_FW_EVENT IXGBE_EICR_FW_EVENT /* Async FW event */ +#define IXGBE_EIMC_MNG IXGBE_EICR_MNG /* MNG Event Interrupt */ +#define IXGBE_EIMC_TIMESYNC IXGBE_EICR_TIMESYNC /* Timesync Event */ +#define IXGBE_EIMC_GPI_SDP0 IXGBE_EICR_GPI_SDP0 /* SDP0 Gen Purpose Int */ +#define IXGBE_EIMC_GPI_SDP1 IXGBE_EICR_GPI_SDP1 /* SDP1 Gen Purpose Int */ +#define IXGBE_EIMC_GPI_SDP2 IXGBE_EICR_GPI_SDP2 /* SDP2 Gen Purpose Int */ +#define IXGBE_EIMC_ECC IXGBE_EICR_ECC /* ECC Error */ +#define IXGBE_EIMC_GPI_SDP0_BY_MAC(_hw) IXGBE_EICR_GPI_SDP0_BY_MAC(_hw) +#define IXGBE_EIMC_GPI_SDP1_BY_MAC(_hw) IXGBE_EICR_GPI_SDP1_BY_MAC(_hw) +#define IXGBE_EIMC_GPI_SDP2_BY_MAC(_hw) IXGBE_EICR_GPI_SDP2_BY_MAC(_hw) +#define IXGBE_EIMC_PBUR IXGBE_EICR_PBUR /* Pkt Buf Handler Err */ +#define IXGBE_EIMC_DHER IXGBE_EICR_DHER /* Desc Handler Err */ +#define IXGBE_EIMC_TCP_TIMER IXGBE_EICR_TCP_TIMER /* TCP Timer */ +#define IXGBE_EIMC_OTHER IXGBE_EICR_OTHER /* INT Cause Active */ + +#define IXGBE_EIMS_ENABLE_MASK ( \ + IXGBE_EIMS_RTX_QUEUE | \ + IXGBE_EIMS_LSC | \ + IXGBE_EIMS_TCP_TIMER | \ + IXGBE_EIMS_OTHER) + +/* Immediate Interrupt Rx (A.K.A. Low Latency Interrupt) */ +#define IXGBE_IMIR_PORT_IM_EN 0x00010000 /* TCP port enable */ +#define IXGBE_IMIR_PORT_BP 0x00020000 /* TCP port check bypass */ +#define IXGBE_IMIREXT_SIZE_BP 0x00001000 /* Packet size bypass */ +#define IXGBE_IMIREXT_CTRL_URG 0x00002000 /* Check URG bit in header */ +#define IXGBE_IMIREXT_CTRL_ACK 0x00004000 /* Check ACK bit in header */ +#define IXGBE_IMIREXT_CTRL_PSH 0x00008000 /* Check PSH bit in header */ +#define IXGBE_IMIREXT_CTRL_RST 0x00010000 /* Check RST bit in header */ +#define IXGBE_IMIREXT_CTRL_SYN 0x00020000 /* Check SYN bit in header */ +#define IXGBE_IMIREXT_CTRL_FIN 0x00040000 /* Check FIN bit in header */ +#define IXGBE_IMIREXT_CTRL_BP 0x00080000 /* Bypass check of control bits */ +#define IXGBE_IMIR_SIZE_BP_82599 0x00001000 /* Packet size bypass */ +#define IXGBE_IMIR_CTRL_URG_82599 0x00002000 /* Check URG bit in header */ +#define IXGBE_IMIR_CTRL_ACK_82599 0x00004000 /* Check ACK bit in header */ +#define IXGBE_IMIR_CTRL_PSH_82599 0x00008000 /* Check PSH bit in header */ +#define IXGBE_IMIR_CTRL_RST_82599 0x00010000 /* Check RST bit in header */ +#define IXGBE_IMIR_CTRL_SYN_82599 0x00020000 /* Check SYN bit in header */ +#define IXGBE_IMIR_CTRL_FIN_82599 0x00040000 /* Check FIN bit in header */ +#define IXGBE_IMIR_CTRL_BP_82599 0x00080000 /* Bypass chk of ctrl bits */ +#define IXGBE_IMIR_LLI_EN_82599 0x00100000 /* Enables low latency Int */ +#define IXGBE_IMIR_RX_QUEUE_MASK_82599 0x0000007F /* Rx Queue Mask */ +#define IXGBE_IMIR_RX_QUEUE_SHIFT_82599 21 /* Rx Queue Shift */ +#define IXGBE_IMIRVP_PRIORITY_MASK 0x00000007 /* VLAN priority mask */ +#define IXGBE_IMIRVP_PRIORITY_EN 0x00000008 /* VLAN priority enable */ + +#define IXGBE_MAX_FTQF_FILTERS 128 +#define IXGBE_FTQF_PROTOCOL_MASK 0x00000003 +#define IXGBE_FTQF_PROTOCOL_TCP 0x00000000 +#define IXGBE_FTQF_PROTOCOL_UDP 0x00000001 +#define IXGBE_FTQF_PROTOCOL_SCTP 2 +#define IXGBE_FTQF_PRIORITY_MASK 0x00000007 +#define IXGBE_FTQF_PRIORITY_SHIFT 2 +#define IXGBE_FTQF_POOL_MASK 0x0000003F +#define IXGBE_FTQF_POOL_SHIFT 8 +#define IXGBE_FTQF_5TUPLE_MASK_MASK 0x0000001F +#define IXGBE_FTQF_5TUPLE_MASK_SHIFT 25 +#define IXGBE_FTQF_SOURCE_ADDR_MASK 0x1E +#define IXGBE_FTQF_DEST_ADDR_MASK 0x1D +#define IXGBE_FTQF_SOURCE_PORT_MASK 0x1B +#define IXGBE_FTQF_DEST_PORT_MASK 0x17 +#define IXGBE_FTQF_PROTOCOL_COMP_MASK 0x0F +#define IXGBE_FTQF_POOL_MASK_EN 0x40000000 +#define IXGBE_FTQF_QUEUE_ENABLE 0x80000000 + +/* Interrupt clear mask */ +#define IXGBE_IRQ_CLEAR_MASK 0xFFFFFFFF + +/* Interrupt Vector Allocation Registers */ +#define IXGBE_IVAR_REG_NUM 25 +#define IXGBE_IVAR_REG_NUM_82599 64 +#define IXGBE_IVAR_TXRX_ENTRY 96 +#define IXGBE_IVAR_RX_ENTRY 64 +#define IXGBE_IVAR_RX_QUEUE(_i) (0 + (_i)) +#define IXGBE_IVAR_TX_QUEUE(_i) (64 + (_i)) +#define IXGBE_IVAR_TX_ENTRY 32 + +#define IXGBE_IVAR_TCP_TIMER_INDEX 96 /* 0 based index */ +#define IXGBE_IVAR_OTHER_CAUSES_INDEX 97 /* 0 based index */ + +#define IXGBE_MSIX_VECTOR(_i) (0 + (_i)) + +#define IXGBE_IVAR_ALLOC_VAL 0x80 /* Interrupt Allocation valid */ + +/* ETYPE Queue Filter/Select Bit Masks */ +#define IXGBE_MAX_ETQF_FILTERS 8 +#define IXGBE_ETQF_FCOE 0x08000000 /* bit 27 */ +#define IXGBE_ETQF_BCN 0x10000000 /* bit 28 */ +#define IXGBE_ETQF_TX_ANTISPOOF 0x20000000 /* bit 29 */ +#define IXGBE_ETQF_1588 0x40000000 /* bit 30 */ +#define IXGBE_ETQF_FILTER_EN 0x80000000 /* bit 31 */ +#define IXGBE_ETQF_POOL_ENABLE (1 << 26) /* bit 26 */ +#define IXGBE_ETQF_POOL_SHIFT 20 + +#define IXGBE_ETQS_RX_QUEUE 0x007F0000 /* bits 22:16 */ +#define IXGBE_ETQS_RX_QUEUE_SHIFT 16 +#define IXGBE_ETQS_LLI 0x20000000 /* bit 29 */ +#define IXGBE_ETQS_QUEUE_EN 0x80000000 /* bit 31 */ + +/* + * ETQF filter list: one static filter per filter consumer. This is + * to avoid filter collisions later. Add new filters + * here!! + * + * Current filters: + * EAPOL 802.1x (0x888e): Filter 0 + * FCoE (0x8906): Filter 2 + * 1588 (0x88f7): Filter 3 + * FIP (0x8914): Filter 4 + * LLDP (0x88CC): Filter 5 + * LACP (0x8809): Filter 6 + * FC (0x8808): Filter 7 + */ +#define IXGBE_ETQF_FILTER_EAPOL 0 +#define IXGBE_ETQF_FILTER_FCOE 2 +#define IXGBE_ETQF_FILTER_1588 3 +#define IXGBE_ETQF_FILTER_FIP 4 +#define IXGBE_ETQF_FILTER_LLDP 5 +#define IXGBE_ETQF_FILTER_LACP 6 +#define IXGBE_ETQF_FILTER_FC 7 +/* VLAN Control Bit Masks */ +#define IXGBE_VLNCTRL_VET 0x0000FFFF /* bits 0-15 */ +#define IXGBE_VLNCTRL_CFI 0x10000000 /* bit 28 */ +#define IXGBE_VLNCTRL_CFIEN 0x20000000 /* bit 29 */ +#define IXGBE_VLNCTRL_VFE 0x40000000 /* bit 30 */ +#define IXGBE_VLNCTRL_VME 0x80000000 /* bit 31 */ + +/* VLAN pool filtering masks */ +#define IXGBE_VLVF_VIEN 0x80000000 /* filter is valid */ +#define IXGBE_VLVF_ENTRIES 64 +#define IXGBE_VLVF_VLANID_MASK 0x00000FFF +/* Per VF Port VLAN insertion rules */ +#define IXGBE_VMVIR_VLANA_DEFAULT 0x40000000 /* Always use default VLAN */ +#define IXGBE_VMVIR_VLANA_NEVER 0x80000000 /* Never insert VLAN tag */ + +#define IXGBE_ETHERNET_IEEE_VLAN_TYPE 0x8100 /* 802.1q protocol */ + +/* STATUS Bit Masks */ +#define IXGBE_STATUS_LAN_ID 0x0000000C /* LAN ID */ +#define IXGBE_STATUS_LAN_ID_SHIFT 2 /* LAN ID Shift*/ +#define IXGBE_STATUS_GIO 0x00080000 /* GIO Primary Ena Status */ + +#define IXGBE_STATUS_LAN_ID_0 0x00000000 /* LAN ID 0 */ +#define IXGBE_STATUS_LAN_ID_1 0x00000004 /* LAN ID 1 */ + +/* ESDP Bit Masks */ +#define IXGBE_ESDP_SDP0 0x00000001 /* SDP0 Data Value */ +#define IXGBE_ESDP_SDP1 0x00000002 /* SDP1 Data Value */ +#define IXGBE_ESDP_SDP2 0x00000004 /* SDP2 Data Value */ +#define IXGBE_ESDP_SDP3 0x00000008 /* SDP3 Data Value */ +#define IXGBE_ESDP_SDP4 0x00000010 /* SDP4 Data Value */ +#define IXGBE_ESDP_SDP5 0x00000020 /* SDP5 Data Value */ +#define IXGBE_ESDP_SDP6 0x00000040 /* SDP6 Data Value */ +#define IXGBE_ESDP_SDP7 0x00000080 /* SDP7 Data Value */ +#define IXGBE_ESDP_SDP0_DIR 0x00000100 /* SDP0 IO direction */ +#define IXGBE_ESDP_SDP1_DIR 0x00000200 /* SDP1 IO direction */ +#define IXGBE_ESDP_SDP2_DIR 0x00000400 /* SDP1 IO direction */ +#define IXGBE_ESDP_SDP3_DIR 0x00000800 /* SDP3 IO direction */ +#define IXGBE_ESDP_SDP4_DIR 0x00001000 /* SDP4 IO direction */ +#define IXGBE_ESDP_SDP5_DIR 0x00002000 /* SDP5 IO direction */ +#define IXGBE_ESDP_SDP6_DIR 0x00004000 /* SDP6 IO direction */ +#define IXGBE_ESDP_SDP7_DIR 0x00008000 /* SDP7 IO direction */ +#define IXGBE_ESDP_SDP0_NATIVE 0x00010000 /* SDP0 IO mode */ +#define IXGBE_ESDP_SDP1_NATIVE 0x00020000 /* SDP1 IO mode */ + + +/* LEDCTL Bit Masks */ +#define IXGBE_LED_IVRT_BASE 0x00000040 +#define IXGBE_LED_BLINK_BASE 0x00000080 +#define IXGBE_LED_MODE_MASK_BASE 0x0000000F +#define IXGBE_LED_OFFSET(_base, _i) (_base << (8 * (_i))) +#define IXGBE_LED_MODE_SHIFT(_i) (8*(_i)) +#define IXGBE_LED_IVRT(_i) IXGBE_LED_OFFSET(IXGBE_LED_IVRT_BASE, _i) +#define IXGBE_LED_BLINK(_i) IXGBE_LED_OFFSET(IXGBE_LED_BLINK_BASE, _i) +#define IXGBE_LED_MODE_MASK(_i) IXGBE_LED_OFFSET(IXGBE_LED_MODE_MASK_BASE, _i) +#define IXGBE_X557_LED_MANUAL_SET_MASK (1 << 8) +#define IXGBE_X557_MAX_LED_INDEX 3 +#define IXGBE_X557_LED_PROVISIONING 0xC430 + +/* LED modes */ +#define IXGBE_LED_LINK_UP 0x0 +#define IXGBE_LED_LINK_10G 0x1 +#define IXGBE_LED_MAC 0x2 +#define IXGBE_LED_FILTER 0x3 +#define IXGBE_LED_LINK_ACTIVE 0x4 +#define IXGBE_LED_LINK_1G 0x5 +#define IXGBE_LED_ON 0xE +#define IXGBE_LED_OFF 0xF + +/* AUTOC Bit Masks */ +#define IXGBE_AUTOC_KX4_KX_SUPP_MASK 0xC0000000 +#define IXGBE_AUTOC_KX4_SUPP 0x80000000 +#define IXGBE_AUTOC_KX_SUPP 0x40000000 +#define IXGBE_AUTOC_PAUSE 0x30000000 +#define IXGBE_AUTOC_ASM_PAUSE 0x20000000 +#define IXGBE_AUTOC_SYM_PAUSE 0x10000000 +#define IXGBE_AUTOC_RF 0x08000000 +#define IXGBE_AUTOC_PD_TMR 0x06000000 +#define IXGBE_AUTOC_AN_RX_LOOSE 0x01000000 +#define IXGBE_AUTOC_AN_RX_DRIFT 0x00800000 +#define IXGBE_AUTOC_AN_RX_ALIGN 0x007C0000 +#define IXGBE_AUTOC_FECA 0x00040000 +#define IXGBE_AUTOC_FECR 0x00020000 +#define IXGBE_AUTOC_KR_SUPP 0x00010000 +#define IXGBE_AUTOC_AN_RESTART 0x00001000 +#define IXGBE_AUTOC_FLU 0x00000001 +#define IXGBE_AUTOC_LMS_SHIFT 13 +#define IXGBE_AUTOC_LMS_10G_SERIAL (0x3 << IXGBE_AUTOC_LMS_SHIFT) +#define IXGBE_AUTOC_LMS_KX4_KX_KR (0x4 << IXGBE_AUTOC_LMS_SHIFT) +#define IXGBE_AUTOC_LMS_SGMII_1G_100M (0x5 << IXGBE_AUTOC_LMS_SHIFT) +#define IXGBE_AUTOC_LMS_KX4_KX_KR_1G_AN (0x6 << IXGBE_AUTOC_LMS_SHIFT) +#define IXGBE_AUTOC_LMS_KX4_KX_KR_SGMII (0x7 << IXGBE_AUTOC_LMS_SHIFT) +#define IXGBE_AUTOC_LMS_MASK (0x7 << IXGBE_AUTOC_LMS_SHIFT) +#define IXGBE_AUTOC_LMS_1G_LINK_NO_AN (0x0 << IXGBE_AUTOC_LMS_SHIFT) +#define IXGBE_AUTOC_LMS_10G_LINK_NO_AN (0x1 << IXGBE_AUTOC_LMS_SHIFT) +#define IXGBE_AUTOC_LMS_1G_AN (0x2 << IXGBE_AUTOC_LMS_SHIFT) +#define IXGBE_AUTOC_LMS_KX4_AN (0x4 << IXGBE_AUTOC_LMS_SHIFT) +#define IXGBE_AUTOC_LMS_KX4_AN_1G_AN (0x6 << IXGBE_AUTOC_LMS_SHIFT) +#define IXGBE_AUTOC_LMS_ATTACH_TYPE (0x7 << IXGBE_AUTOC_10G_PMA_PMD_SHIFT) + +#define IXGBE_AUTOC_1G_PMA_PMD_MASK 0x00000200 +#define IXGBE_AUTOC_1G_PMA_PMD_SHIFT 9 +#define IXGBE_AUTOC_10G_PMA_PMD_MASK 0x00000180 +#define IXGBE_AUTOC_10G_PMA_PMD_SHIFT 7 +#define IXGBE_AUTOC_10G_XAUI (0x0 << IXGBE_AUTOC_10G_PMA_PMD_SHIFT) +#define IXGBE_AUTOC_10G_KX4 (0x1 << IXGBE_AUTOC_10G_PMA_PMD_SHIFT) +#define IXGBE_AUTOC_10G_CX4 (0x2 << IXGBE_AUTOC_10G_PMA_PMD_SHIFT) +#define IXGBE_AUTOC_1G_BX (0x0 << IXGBE_AUTOC_1G_PMA_PMD_SHIFT) +#define IXGBE_AUTOC_1G_KX (0x1 << IXGBE_AUTOC_1G_PMA_PMD_SHIFT) +#define IXGBE_AUTOC_1G_SFI (0x0 << IXGBE_AUTOC_1G_PMA_PMD_SHIFT) +#define IXGBE_AUTOC_1G_KX_BX (0x1 << IXGBE_AUTOC_1G_PMA_PMD_SHIFT) + +#define IXGBE_AUTOC2_UPPER_MASK 0xFFFF0000 +#define IXGBE_AUTOC2_10G_SERIAL_PMA_PMD_MASK 0x00030000 +#define IXGBE_AUTOC2_10G_SERIAL_PMA_PMD_SHIFT 16 +#define IXGBE_AUTOC2_10G_KR (0x0 << IXGBE_AUTOC2_10G_SERIAL_PMA_PMD_SHIFT) +#define IXGBE_AUTOC2_10G_XFI (0x1 << IXGBE_AUTOC2_10G_SERIAL_PMA_PMD_SHIFT) +#define IXGBE_AUTOC2_10G_SFI (0x2 << IXGBE_AUTOC2_10G_SERIAL_PMA_PMD_SHIFT) +#define IXGBE_AUTOC2_LINK_DISABLE_ON_D3_MASK 0x50000000 +#define IXGBE_AUTOC2_LINK_DISABLE_MASK 0x70000000 + +#define IXGBE_MACC_FLU 0x00000001 +#define IXGBE_MACC_FSV_10G 0x00030000 +#define IXGBE_MACC_FS 0x00040000 +#define IXGBE_MAC_RX2TX_LPBK 0x00000002 + +/* Veto Bit definiton */ +#define IXGBE_MMNGC_MNG_VETO 0x00000001 + +/* LINKS Bit Masks */ +#define IXGBE_LINKS_KX_AN_COMP 0x80000000 +#define IXGBE_LINKS_UP 0x40000000 +#define IXGBE_LINKS_SPEED 0x20000000 +#define IXGBE_LINKS_MODE 0x18000000 +#define IXGBE_LINKS_RX_MODE 0x06000000 +#define IXGBE_LINKS_TX_MODE 0x01800000 +#define IXGBE_LINKS_XGXS_EN 0x00400000 +#define IXGBE_LINKS_SGMII_EN 0x02000000 +#define IXGBE_LINKS_PCS_1G_EN 0x00200000 +#define IXGBE_LINKS_1G_AN_EN 0x00100000 +#define IXGBE_LINKS_KX_AN_IDLE 0x00080000 +#define IXGBE_LINKS_1G_SYNC 0x00040000 +#define IXGBE_LINKS_10G_ALIGN 0x00020000 +#define IXGBE_LINKS_10G_LANE_SYNC 0x00017000 +#define IXGBE_LINKS_TL_FAULT 0x00001000 +#define IXGBE_LINKS_SIGNAL 0x00000F00 + +#define IXGBE_LINKS_SPEED_NON_STD 0x08000000 +#define IXGBE_LINKS_SPEED_82599 0x30000000 +#define IXGBE_LINKS_SPEED_10G_82599 0x30000000 +#define IXGBE_LINKS_SPEED_1G_82599 0x20000000 +#define IXGBE_LINKS_SPEED_100_82599 0x10000000 +#define IXGBE_LINKS_SPEED_10_X550EM_A 0x00000000 +#define IXGBE_LINK_UP_TIME 90 /* 9.0 Seconds */ +#define IXGBE_AUTO_NEG_TIME 45 /* 4.5 Seconds */ + +#define IXGBE_LINKS2_AN_SUPPORTED 0x00000040 + +/* PCS1GLSTA Bit Masks */ +#define IXGBE_PCS1GLSTA_LINK_OK 1 +#define IXGBE_PCS1GLSTA_SYNK_OK 0x10 +#define IXGBE_PCS1GLSTA_AN_COMPLETE 0x10000 +#define IXGBE_PCS1GLSTA_AN_PAGE_RX 0x20000 +#define IXGBE_PCS1GLSTA_AN_TIMED_OUT 0x40000 +#define IXGBE_PCS1GLSTA_AN_REMOTE_FAULT 0x80000 +#define IXGBE_PCS1GLSTA_AN_ERROR_RWS 0x100000 + +#define IXGBE_PCS1GANA_SYM_PAUSE 0x80 +#define IXGBE_PCS1GANA_ASM_PAUSE 0x100 + +/* PCS1GLCTL Bit Masks */ +#define IXGBE_PCS1GLCTL_AN_1G_TIMEOUT_EN 0x00040000 /* PCS 1G autoneg to en */ +#define IXGBE_PCS1GLCTL_FLV_LINK_UP 1 +#define IXGBE_PCS1GLCTL_FORCE_LINK 0x20 +#define IXGBE_PCS1GLCTL_LOW_LINK_LATCH 0x40 +#define IXGBE_PCS1GLCTL_AN_ENABLE 0x10000 +#define IXGBE_PCS1GLCTL_AN_RESTART 0x20000 + +/* ANLP1 Bit Masks */ +#define IXGBE_ANLP1_PAUSE 0x0C00 +#define IXGBE_ANLP1_SYM_PAUSE 0x0400 +#define IXGBE_ANLP1_ASM_PAUSE 0x0800 +#define IXGBE_ANLP1_AN_STATE_MASK 0x000f0000 + +/* SW Semaphore Register bitmasks */ +#define IXGBE_SWSM_SMBI 0x00000001 /* Driver Semaphore bit */ +#define IXGBE_SWSM_SWESMBI 0x00000002 /* FW Semaphore bit */ +#define IXGBE_SWSM_WMNG 0x00000004 /* Wake MNG Clock */ +#define IXGBE_SWFW_REGSMP 0x80000000 /* Register Semaphore bit 31 */ + +/* SW_FW_SYNC/GSSR definitions */ +#define IXGBE_GSSR_EEP_SM 0x0001 +#define IXGBE_GSSR_PHY0_SM 0x0002 +#define IXGBE_GSSR_PHY1_SM 0x0004 +#define IXGBE_GSSR_MAC_CSR_SM 0x0008 +#define IXGBE_GSSR_FLASH_SM 0x0010 +#define IXGBE_GSSR_NVM_UPDATE_SM 0x0200 +#define IXGBE_GSSR_SW_MNG_SM 0x0400 +#define IXGBE_GSSR_TOKEN_SM 0x40000000 /* SW bit for shared access */ +#define IXGBE_GSSR_SHARED_I2C_SM 0x1806 /* Wait for both phys and both I2Cs */ +#define IXGBE_GSSR_I2C_MASK 0x1800 +#define IXGBE_GSSR_NVM_PHY_MASK 0xF + +/* FW Status register bitmask */ +#define IXGBE_FWSTS_FWRI 0x00000200 /* Firmware Reset Indication */ + +/* EEC Register */ +#define IXGBE_EEC_SK 0x00000001 /* EEPROM Clock */ +#define IXGBE_EEC_CS 0x00000002 /* EEPROM Chip Select */ +#define IXGBE_EEC_DI 0x00000004 /* EEPROM Data In */ +#define IXGBE_EEC_DO 0x00000008 /* EEPROM Data Out */ +#define IXGBE_EEC_FWE_MASK 0x00000030 /* FLASH Write Enable */ +#define IXGBE_EEC_FWE_DIS 0x00000010 /* Disable FLASH writes */ +#define IXGBE_EEC_FWE_EN 0x00000020 /* Enable FLASH writes */ +#define IXGBE_EEC_FWE_SHIFT 4 +#define IXGBE_EEC_REQ 0x00000040 /* EEPROM Access Request */ +#define IXGBE_EEC_GNT 0x00000080 /* EEPROM Access Grant */ +#define IXGBE_EEC_PRES 0x00000100 /* EEPROM Present */ +#define IXGBE_EEC_ARD 0x00000200 /* EEPROM Auto Read Done */ +#define IXGBE_EEC_FLUP 0x00800000 /* Flash update command */ +#define IXGBE_EEC_SEC1VAL 0x02000000 /* Sector 1 Valid */ +#define IXGBE_EEC_FLUDONE 0x04000000 /* Flash update done */ +/* EEPROM Addressing bits based on type (0-small, 1-large) */ +#define IXGBE_EEC_ADDR_SIZE 0x00000400 +#define IXGBE_EEC_SIZE 0x00007800 /* EEPROM Size */ +#define IXGBE_EERD_MAX_ADDR 0x00003FFF /* EERD alows 14 bits for addr. */ + +#define IXGBE_EEC_SIZE_SHIFT 11 +#define IXGBE_EEPROM_WORD_SIZE_SHIFT 6 +#define IXGBE_EEPROM_OPCODE_BITS 8 + +/* FLA Register */ +#define IXGBE_FLA_LOCKED 0x00000040 + +/* Part Number String Length */ +#define IXGBE_PBANUM_LENGTH 11 + +/* Checksum and EEPROM pointers */ +#define IXGBE_PBANUM_PTR_GUARD 0xFAFA +#define IXGBE_EEPROM_CHECKSUM 0x3F +#define IXGBE_EEPROM_SUM 0xBABA +#define IXGBE_EEPROM_CTRL_4 0x45 +#define IXGBE_EE_CTRL_4_INST_ID 0x10 +#define IXGBE_EE_CTRL_4_INST_ID_SHIFT 4 +#define IXGBE_PCIE_ANALOG_PTR 0x03 +#define IXGBE_ATLAS0_CONFIG_PTR 0x04 +#define IXGBE_PHY_PTR 0x04 +#define IXGBE_ATLAS1_CONFIG_PTR 0x05 +#define IXGBE_OPTION_ROM_PTR 0x05 +#define IXGBE_PCIE_GENERAL_PTR 0x06 +#define IXGBE_PCIE_CONFIG0_PTR 0x07 +#define IXGBE_PCIE_CONFIG1_PTR 0x08 +#define IXGBE_CORE0_PTR 0x09 +#define IXGBE_CORE1_PTR 0x0A +#define IXGBE_MAC0_PTR 0x0B +#define IXGBE_MAC1_PTR 0x0C +#define IXGBE_CSR0_CONFIG_PTR 0x0D +#define IXGBE_CSR1_CONFIG_PTR 0x0E +#define IXGBE_PCIE_ANALOG_PTR_X550 0x02 +#define IXGBE_SHADOW_RAM_SIZE_X550 0x4000 +#define IXGBE_IXGBE_PCIE_GENERAL_SIZE 0x24 +#define IXGBE_PCIE_CONFIG_SIZE 0x08 +#define IXGBE_EEPROM_LAST_WORD 0x41 +#define IXGBE_FW_PTR 0x0F +#define IXGBE_PBANUM0_PTR 0x15 +#define IXGBE_PBANUM1_PTR 0x16 +#define IXGBE_ALT_MAC_ADDR_PTR 0x37 +#define IXGBE_FREE_SPACE_PTR 0X3E + +/* External Thermal Sensor Config */ +#define IXGBE_ETS_CFG 0x26 +#define IXGBE_ETS_LTHRES_DELTA_MASK 0x07C0 +#define IXGBE_ETS_LTHRES_DELTA_SHIFT 6 +#define IXGBE_ETS_TYPE_MASK 0x0038 +#define IXGBE_ETS_TYPE_SHIFT 3 +#define IXGBE_ETS_TYPE_EMC 0x000 +#define IXGBE_ETS_NUM_SENSORS_MASK 0x0007 +#define IXGBE_ETS_DATA_LOC_MASK 0x3C00 +#define IXGBE_ETS_DATA_LOC_SHIFT 10 +#define IXGBE_ETS_DATA_INDEX_MASK 0x0300 +#define IXGBE_ETS_DATA_INDEX_SHIFT 8 +#define IXGBE_ETS_DATA_HTHRESH_MASK 0x00FF + +#define IXGBE_SAN_MAC_ADDR_PTR 0x28 +#define IXGBE_DEVICE_CAPS 0x2C +#define IXGBE_82599_SERIAL_NUMBER_MAC_ADDR 0x11 +#define IXGBE_X550_SERIAL_NUMBER_MAC_ADDR 0x04 + +#define IXGBE_PCIE_MSIX_LKV_CAPS 0xB2 +#define IXGBE_PCIE_MSIX_82599_CAPS 0x72 +#define IXGBE_MAX_MSIX_VECTORS_82599 0x40 +#define IXGBE_PCIE_MSIX_82598_CAPS 0x62 +#define IXGBE_MAX_MSIX_VECTORS_82598 0x13 + +/* MSI-X capability fields masks */ +#define IXGBE_PCIE_MSIX_TBL_SZ_MASK 0x7FF + +/* Legacy EEPROM word offsets */ +#define IXGBE_ISCSI_BOOT_CAPS 0x0033 +#define IXGBE_ISCSI_SETUP_PORT_0 0x0030 +#define IXGBE_ISCSI_SETUP_PORT_1 0x0034 + +/* EEPROM Commands - SPI */ +#define IXGBE_EEPROM_MAX_RETRY_SPI 5000 /* Max wait 5ms for RDY signal */ +#define IXGBE_EEPROM_STATUS_RDY_SPI 0x01 +#define IXGBE_EEPROM_READ_OPCODE_SPI 0x03 /* EEPROM read opcode */ +#define IXGBE_EEPROM_WRITE_OPCODE_SPI 0x02 /* EEPROM write opcode */ +#define IXGBE_EEPROM_A8_OPCODE_SPI 0x08 /* opcode bit-3 = addr bit-8 */ +#define IXGBE_EEPROM_WREN_OPCODE_SPI 0x06 /* EEPROM set Write Ena latch */ +/* EEPROM reset Write Enable latch */ +#define IXGBE_EEPROM_WRDI_OPCODE_SPI 0x04 +#define IXGBE_EEPROM_RDSR_OPCODE_SPI 0x05 /* EEPROM read Status reg */ +#define IXGBE_EEPROM_WRSR_OPCODE_SPI 0x01 /* EEPROM write Status reg */ +#define IXGBE_EEPROM_ERASE4K_OPCODE_SPI 0x20 /* EEPROM ERASE 4KB */ +#define IXGBE_EEPROM_ERASE64K_OPCODE_SPI 0xD8 /* EEPROM ERASE 64KB */ +#define IXGBE_EEPROM_ERASE256_OPCODE_SPI 0xDB /* EEPROM ERASE 256B */ + +/* EEPROM Read Register */ +#define IXGBE_EEPROM_RW_REG_DATA 16 /* data offset in EEPROM read reg */ +#define IXGBE_EEPROM_RW_REG_DONE 2 /* Offset to READ done bit */ +#define IXGBE_EEPROM_RW_REG_START 1 /* First bit to start operation */ +#define IXGBE_EEPROM_RW_ADDR_SHIFT 2 /* Shift to the address bits */ +#define IXGBE_NVM_POLL_WRITE 1 /* Flag for polling for wr complete */ +#define IXGBE_NVM_POLL_READ 0 /* Flag for polling for rd complete */ + +#define NVM_INIT_CTRL_3 0x38 +#define NVM_INIT_CTRL_3_LPLU 0x8 +#define NVM_INIT_CTRL_3_D10GMP_PORT0 0x40 +#define NVM_INIT_CTRL_3_D10GMP_PORT1 0x100 + +#define IXGBE_ETH_LENGTH_OF_ADDRESS 6 + +#define IXGBE_EEPROM_PAGE_SIZE_MAX 128 +#define IXGBE_EEPROM_RD_BUFFER_MAX_COUNT 256 /* words rd in burst */ +#define IXGBE_EEPROM_WR_BUFFER_MAX_COUNT 256 /* words wr in burst */ +#define IXGBE_EEPROM_CTRL_2 1 /* EEPROM CTRL word 2 */ +#define IXGBE_EEPROM_CCD_BIT 2 + +#ifndef IXGBE_EEPROM_GRANT_ATTEMPTS +#define IXGBE_EEPROM_GRANT_ATTEMPTS 1000 /* EEPROM attempts to gain grant */ +#endif + +#ifndef IXGBE_EERD_EEWR_ATTEMPTS +/* Number of 5 microseconds we wait for EERD read and + * EERW write to complete */ +#define IXGBE_EERD_EEWR_ATTEMPTS 100000 +#endif + +#ifndef IXGBE_FLUDONE_ATTEMPTS +/* # attempts we wait for flush update to complete */ +#define IXGBE_FLUDONE_ATTEMPTS 20000 +#endif + +#define IXGBE_PCIE_CTRL2 0x5 /* PCIe Control 2 Offset */ +#define IXGBE_PCIE_CTRL2_DUMMY_ENABLE 0x8 /* Dummy Function Enable */ +#define IXGBE_PCIE_CTRL2_LAN_DISABLE 0x2 /* LAN PCI Disable */ +#define IXGBE_PCIE_CTRL2_DISABLE_SELECT 0x1 /* LAN Disable Select */ + +#define IXGBE_SAN_MAC_ADDR_PORT0_OFFSET 0x0 +#define IXGBE_SAN_MAC_ADDR_PORT1_OFFSET 0x3 +#define IXGBE_DEVICE_CAPS_ALLOW_ANY_SFP 0x1 +#define IXGBE_DEVICE_CAPS_FCOE_OFFLOADS 0x2 +#define IXGBE_DEVICE_CAPS_NO_CROSSTALK_WR (1 << 7) +#define IXGBE_FW_LESM_PARAMETERS_PTR 0x2 +#define IXGBE_FW_LESM_STATE_1 0x1 +#define IXGBE_FW_LESM_STATE_ENABLED 0x8000 /* LESM Enable bit */ +#define IXGBE_FW_LESM_2_STATES_ENABLED_MASK 0x1F +#define IXGBE_FW_LESM_2_STATES_ENABLED 0x12 +#define IXGBE_FW_LESM_STATE0_10G_ENABLED 0x6FFF +#define IXGBE_FW_LESM_STATE1_10G_ENABLED 0x4FFF +#define IXGBE_FW_LESM_STATE0_10G_DISABLED 0x0FFF +#define IXGBE_FW_LESM_STATE1_10G_DISABLED 0x2FFF +#define IXGBE_FW_LESM_PORT0_STATE0_OFFSET 0x2 +#define IXGBE_FW_LESM_PORT0_STATE1_OFFSET 0x3 +#define IXGBE_FW_LESM_PORT1_STATE0_OFFSET 0x6 +#define IXGBE_FW_LESM_PORT1_STATE1_OFFSET 0x7 +#define IXGBE_FW_PASSTHROUGH_PATCH_CONFIG_PTR 0x4 +#define IXGBE_FW_PATCH_VERSION_4 0x7 +#define IXGBE_FCOE_IBA_CAPS_BLK_PTR 0x33 /* iSCSI/FCOE block */ +#define IXGBE_FCOE_IBA_CAPS_FCOE 0x20 /* FCOE flags */ +#define IXGBE_ISCSI_FCOE_BLK_PTR 0x17 /* iSCSI/FCOE block */ +#define IXGBE_ISCSI_FCOE_FLAGS_OFFSET 0x0 /* FCOE flags */ +#define IXGBE_ISCSI_FCOE_FLAGS_ENABLE 0x1 /* FCOE flags enable bit */ +#define IXGBE_ALT_SAN_MAC_ADDR_BLK_PTR 0x27 /* Alt. SAN MAC block */ +#define IXGBE_ALT_SAN_MAC_ADDR_CAPS_OFFSET 0x0 /* Alt SAN MAC capability */ +#define IXGBE_ALT_SAN_MAC_ADDR_PORT0_OFFSET 0x1 /* Alt SAN MAC 0 offset */ +#define IXGBE_ALT_SAN_MAC_ADDR_PORT1_OFFSET 0x4 /* Alt SAN MAC 1 offset */ +#define IXGBE_ALT_SAN_MAC_ADDR_WWNN_OFFSET 0x7 /* Alt WWNN prefix offset */ +#define IXGBE_ALT_SAN_MAC_ADDR_WWPN_OFFSET 0x8 /* Alt WWPN prefix offset */ +#define IXGBE_ALT_SAN_MAC_ADDR_CAPS_SANMAC 0x0 /* Alt SAN MAC exists */ +#define IXGBE_ALT_SAN_MAC_ADDR_CAPS_ALTWWN 0x1 /* Alt WWN base exists */ + +/* FW header offset */ +#define IXGBE_X540_FW_PASSTHROUGH_PATCH_CONFIG_PTR 0x4 +#define IXGBE_X540_FW_MODULE_MASK 0x7FFF +/* 4KB multiplier */ +#define IXGBE_X540_FW_MODULE_LENGTH 0x1000 +/* version word 2 (month & day) */ +#define IXGBE_X540_FW_PATCH_VERSION_2 0x5 +/* version word 3 (silicon compatibility & year) */ +#define IXGBE_X540_FW_PATCH_VERSION_3 0x6 +/* version word 4 (major & minor numbers) */ +#define IXGBE_X540_FW_PATCH_VERSION_4 0x7 + +#define IXGBE_DEVICE_CAPS_WOL_PORT0_1 0x4 /* WoL supported on ports 0 & 1 */ +#define IXGBE_DEVICE_CAPS_WOL_PORT0 0x8 /* WoL supported on port 0 */ +#define IXGBE_DEVICE_CAPS_WOL_MASK 0xC /* Mask for WoL capabilities */ + +/* PCI Bus Info */ +#define IXGBE_PCI_DEVICE_STATUS 0xAA +#define IXGBE_PCI_DEVICE_STATUS_TRANSACTION_PENDING 0x0020 +#define IXGBE_PCI_LINK_STATUS 0xB2 +#define IXGBE_PCI_LINK_STATUS_E610 0x82 +#define IXGBE_PCI_DEVICE_CONTROL2 0xC8 +#define IXGBE_PCI_LINK_WIDTH 0x3F0 +#define IXGBE_PCI_LINK_WIDTH_1 0x10 +#define IXGBE_PCI_LINK_WIDTH_2 0x20 +#define IXGBE_PCI_LINK_WIDTH_4 0x40 +#define IXGBE_PCI_LINK_WIDTH_8 0x80 +#define IXGBE_PCI_LINK_SPEED 0xF +#define IXGBE_PCI_LINK_SPEED_2500 0x1 +#define IXGBE_PCI_LINK_SPEED_5000 0x2 +#define IXGBE_PCI_LINK_SPEED_8000 0x3 +#define IXGBE_PCI_LINK_SPEED_16000 0x4 +#define IXGBE_PCI_HEADER_TYPE_REGISTER 0x0E +#define IXGBE_PCI_HEADER_TYPE_MULTIFUNC 0x80 +#define IXGBE_PCI_DEVICE_CONTROL2_16ms 0x0005 + +#define IXGBE_PCIDEVCTRL2_TIMEO_MASK 0xf +#define IXGBE_PCIDEVCTRL2_16_32ms_def 0x0 +#define IXGBE_PCIDEVCTRL2_50_100us 0x1 +#define IXGBE_PCIDEVCTRL2_1_2ms 0x2 +#define IXGBE_PCIDEVCTRL2_16_32ms 0x5 +#define IXGBE_PCIDEVCTRL2_65_130ms 0x6 +#define IXGBE_PCIDEVCTRL2_260_520ms 0x9 +#define IXGBE_PCIDEVCTRL2_1_2s 0xa +#define IXGBE_PCIDEVCTRL2_4_8s 0xd +#define IXGBE_PCIDEVCTRL2_17_34s 0xe + +/* Number of 100 microseconds we wait for PCI Express primary disable */ +#define IXGBE_PCI_PRIMARY_DISABLE_TIMEOUT 800 + +/* Check whether address is multicast. This is little-endian specific check.*/ +#define IXGBE_IS_MULTICAST(Address) \ + (bool)(((u8 *)(Address))[0] & ((u8)0x01)) + +/* Check whether an address is broadcast. */ +#define IXGBE_IS_BROADCAST(Address) \ + ((((u8 *)(Address))[0] == ((u8)0xff)) && \ + (((u8 *)(Address))[1] == ((u8)0xff))) + +/* RAH */ +#define IXGBE_RAH_VIND_MASK 0x003C0000 +#define IXGBE_RAH_VIND_SHIFT 18 +#define IXGBE_RAH_AV 0x80000000 +#define IXGBE_CLEAR_VMDQ_ALL 0xFFFFFFFF + +/* Header split receive */ +#define IXGBE_RFCTL_ISCSI_DIS 0x00000001 +#define IXGBE_RFCTL_ISCSI_DWC_MASK 0x0000003E +#define IXGBE_RFCTL_ISCSI_DWC_SHIFT 1 +#define IXGBE_RFCTL_RSC_DIS 0x00000020 +#define IXGBE_RFCTL_NFSW_DIS 0x00000040 +#define IXGBE_RFCTL_NFSR_DIS 0x00000080 +#define IXGBE_RFCTL_NFS_VER_MASK 0x00000300 +#define IXGBE_RFCTL_NFS_VER_SHIFT 8 +#define IXGBE_RFCTL_NFS_VER_2 0 +#define IXGBE_RFCTL_NFS_VER_3 1 +#define IXGBE_RFCTL_NFS_VER_4 2 +#define IXGBE_RFCTL_IPV6_DIS 0x00000400 +#define IXGBE_RFCTL_IPV6_XSUM_DIS 0x00000800 +#define IXGBE_RFCTL_IPFRSP_DIS 0x00004000 +#define IXGBE_RFCTL_IPV6_EX_DIS 0x00010000 +#define IXGBE_RFCTL_NEW_IPV6_EXT_DIS 0x00020000 + +/* Transmit Config masks */ +#define IXGBE_TXDCTL_ENABLE 0x02000000 /* Ena specific Tx Queue */ +#define IXGBE_TXDCTL_SWFLSH 0x04000000 /* Tx Desc. wr-bk flushing */ +#define IXGBE_TXDCTL_WTHRESH_SHIFT 16 /* shift to WTHRESH bits */ +/* Enable short packet padding to 64 bytes */ +#define IXGBE_TX_PAD_ENABLE 0x00000400 +#define IXGBE_JUMBO_FRAME_ENABLE 0x00000004 /* Allow jumbo frames */ +/* This allows for 16K packets + 4k for vlan */ +#define IXGBE_MAX_FRAME_SZ 0x40040000 + +#define IXGBE_TDWBAL_HEAD_WB_ENABLE 0x1 /* Tx head write-back enable */ +#define IXGBE_TDWBAL_SEQNUM_WB_ENABLE 0x2 /* Tx seq# write-back enable */ + +/* Receive Config masks */ +#define IXGBE_RXCTRL_RXEN 0x00000001 /* Enable Receiver */ +#define IXGBE_RXCTRL_DMBYPS 0x00000002 /* Desc Monitor Bypass */ +#define IXGBE_RXDCTL_ENABLE 0x02000000 /* Ena specific Rx Queue */ +#define IXGBE_RXDCTL_SWFLSH 0x04000000 /* Rx Desc wr-bk flushing */ +#define IXGBE_RXDCTL_RLPMLMASK 0x00003FFF /* X540 supported only */ +#define IXGBE_RXDCTL_RLPML_EN 0x00008000 +#define IXGBE_RXDCTL_VME 0x40000000 /* VLAN mode enable */ + +#define IXGBE_TSAUXC_EN_CLK 0x00000004 +#define IXGBE_TSAUXC_SYNCLK 0x00000008 +#define IXGBE_TSAUXC_SDP0_INT 0x00000040 +#define IXGBE_TSAUXC_EN_TT0 0x00000001 +#define IXGBE_TSAUXC_EN_TT1 0x00000002 +#define IXGBE_TSAUXC_ST0 0x00000010 +#define IXGBE_TSAUXC_DISABLE_SYSTIME 0x80000000 + +#define IXGBE_TSSDP_TS_SDP0_SEL_MASK 0x000000C0 +#define IXGBE_TSSDP_TS_SDP0_CLK0 0x00000080 +#define IXGBE_TSSDP_TS_SDP0_EN 0x00000100 + +#define IXGBE_TSYNCTXCTL_VALID 0x00000001 /* Tx timestamp valid */ +#define IXGBE_TSYNCTXCTL_ENABLED 0x00000010 /* Tx timestamping enabled */ + +#define IXGBE_TSYNCRXCTL_VALID 0x00000001 /* Rx timestamp valid */ +#define IXGBE_TSYNCRXCTL_TYPE_MASK 0x0000000E /* Rx type mask */ +#define IXGBE_TSYNCRXCTL_TYPE_L2_V2 0x00 +#define IXGBE_TSYNCRXCTL_TYPE_L4_V1 0x02 +#define IXGBE_TSYNCRXCTL_TYPE_L2_L4_V2 0x04 +#define IXGBE_TSYNCRXCTL_TYPE_ALL 0x08 +#define IXGBE_TSYNCRXCTL_TYPE_EVENT_V2 0x0A +#define IXGBE_TSYNCRXCTL_ENABLED 0x00000010 /* Rx Timestamping enabled */ +#define IXGBE_TSYNCRXCTL_TSIP_UT_EN 0x00800000 /* Rx Timestamp in Packet */ +#define IXGBE_TSYNCRXCTL_TSIP_UP_MASK 0xFF000000 /* Rx Timestamp UP Mask */ + +#define IXGBE_TSIM_SYS_WRAP 0x00000001 +#define IXGBE_TSIM_TXTS 0x00000002 +#define IXGBE_TSIM_TADJ 0x00000080 + +#define IXGBE_TSICR_SYS_WRAP IXGBE_TSIM_SYS_WRAP +#define IXGBE_TSICR_TXTS IXGBE_TSIM_TXTS +#define IXGBE_TSICR_TADJ IXGBE_TSIM_TADJ + +#define IXGBE_RXMTRL_V1_CTRLT_MASK 0x000000FF +#define IXGBE_RXMTRL_V1_SYNC_MSG 0x00 +#define IXGBE_RXMTRL_V1_DELAY_REQ_MSG 0x01 +#define IXGBE_RXMTRL_V1_FOLLOWUP_MSG 0x02 +#define IXGBE_RXMTRL_V1_DELAY_RESP_MSG 0x03 +#define IXGBE_RXMTRL_V1_MGMT_MSG 0x04 + +#define IXGBE_RXMTRL_V2_MSGID_MASK 0x0000FF00 +#define IXGBE_RXMTRL_V2_SYNC_MSG 0x0000 +#define IXGBE_RXMTRL_V2_DELAY_REQ_MSG 0x0100 +#define IXGBE_RXMTRL_V2_PDELAY_REQ_MSG 0x0200 +#define IXGBE_RXMTRL_V2_PDELAY_RESP_MSG 0x0300 +#define IXGBE_RXMTRL_V2_FOLLOWUP_MSG 0x0800 +#define IXGBE_RXMTRL_V2_DELAY_RESP_MSG 0x0900 +#define IXGBE_RXMTRL_V2_PDELAY_FOLLOWUP_MSG 0x0A00 +#define IXGBE_RXMTRL_V2_ANNOUNCE_MSG 0x0B00 +#define IXGBE_RXMTRL_V2_SIGNALLING_MSG 0x0C00 +#define IXGBE_RXMTRL_V2_MGMT_MSG 0x0D00 + +#define IXGBE_FCTRL_SBP 0x00000002 /* Store Bad Packet */ +#define IXGBE_FCTRL_TPE 0x00000080 /* Tag Promiscuous Ena*/ +#define IXGBE_FCTRL_MPE 0x00000100 /* Multicast Promiscuous Ena*/ +#define IXGBE_FCTRL_UPE 0x00000200 /* Unicast Promiscuous Ena */ +#define IXGBE_FCTRL_BAM 0x00000400 /* Broadcast Accept Mode */ +#define IXGBE_FCTRL_PMCF 0x00001000 /* Pass MAC Control Frames */ +#define IXGBE_FCTRL_DPF 0x00002000 /* Discard Pause Frame */ +/* Receive Priority Flow Control Enable */ +#define IXGBE_FCTRL_RPFCE 0x00004000 +#define IXGBE_FCTRL_RFCE 0x00008000 /* Receive Flow Control Ena */ +#define IXGBE_MFLCN_PMCF 0x00000001 /* Pass MAC Control Frames */ +#define IXGBE_MFLCN_DPF 0x00000002 /* Discard Pause Frame */ +#define IXGBE_MFLCN_RPFCE 0x00000004 /* Receive Priority FC Enable */ +#define IXGBE_MFLCN_RFCE 0x00000008 /* Receive FC Enable */ +#define IXGBE_MFLCN_RPFCE_MASK 0x00000FF4 /* Rx Priority FC bitmap mask */ +#define IXGBE_MFLCN_RPFCE_SHIFT 4 /* Rx Priority FC bitmap shift */ + +/* Multiple Receive Queue Control */ +#define IXGBE_MRQC_RSSEN 0x00000001 /* RSS Enable */ +#define IXGBE_MRQC_MRQE_MASK 0xF /* Bits 3:0 */ +#define IXGBE_MRQC_RT8TCEN 0x00000002 /* 8 TC no RSS */ +#define IXGBE_MRQC_RT4TCEN 0x00000003 /* 4 TC no RSS */ +#define IXGBE_MRQC_RTRSS8TCEN 0x00000004 /* 8 TC w/ RSS */ +#define IXGBE_MRQC_RTRSS4TCEN 0x00000005 /* 4 TC w/ RSS */ +#define IXGBE_MRQC_VMDQEN 0x00000008 /* VMDq2 64 pools no RSS */ +#define IXGBE_MRQC_VMDQRSS32EN 0x0000000A /* VMDq2 32 pools w/ RSS */ +#define IXGBE_MRQC_VMDQRSS64EN 0x0000000B /* VMDq2 64 pools w/ RSS */ +#define IXGBE_MRQC_VMDQRT8TCEN 0x0000000C /* VMDq2/RT 16 pool 8 TC */ +#define IXGBE_MRQC_VMDQRT4TCEN 0x0000000D /* VMDq2/RT 32 pool 4 TC */ +#define IXGBE_MRQC_L3L4TXSWEN 0x00008000 /* Enable L3/L4 Tx switch */ +#define IXGBE_MRQC_RSS_FIELD_MASK 0xFFFF0000 +#define IXGBE_MRQC_RSS_FIELD_IPV4_TCP 0x00010000 +#define IXGBE_MRQC_RSS_FIELD_IPV4 0x00020000 +#define IXGBE_MRQC_RSS_FIELD_IPV6_EX_TCP 0x00040000 +#define IXGBE_MRQC_RSS_FIELD_IPV6_EX 0x00080000 +#define IXGBE_MRQC_RSS_FIELD_IPV6 0x00100000 +#define IXGBE_MRQC_RSS_FIELD_IPV6_TCP 0x00200000 +#define IXGBE_MRQC_RSS_FIELD_IPV4_UDP 0x00400000 +#define IXGBE_MRQC_RSS_FIELD_IPV6_UDP 0x00800000 +#define IXGBE_MRQC_RSS_FIELD_IPV6_EX_UDP 0x01000000 +#define IXGBE_MRQC_MULTIPLE_RSS 0x00002000 +#define IXGBE_MRQC_L3L4TXSWEN 0x00008000 + +/* Queue Drop Enable */ +#define IXGBE_QDE_ENABLE 0x00000001 +#define IXGBE_QDE_HIDE_VLAN 0x00000002 +#define IXGBE_QDE_IDX_MASK 0x00007F00 +#define IXGBE_QDE_IDX_SHIFT 8 +#define IXGBE_QDE_WRITE 0x00010000 +#define IXGBE_QDE_READ 0x00020000 + +#define IXGBE_TXD_POPTS_IXSM 0x01 /* Insert IP checksum */ +#define IXGBE_TXD_POPTS_TXSM 0x02 /* Insert TCP/UDP checksum */ +#define IXGBE_TXD_CMD_EOP 0x01000000 /* End of Packet */ +#define IXGBE_TXD_CMD_IFCS 0x02000000 /* Insert FCS (Ethernet CRC) */ +#define IXGBE_TXD_CMD_IC 0x04000000 /* Insert Checksum */ +#define IXGBE_TXD_CMD_RS 0x08000000 /* Report Status */ +#define IXGBE_TXD_CMD_DEXT 0x20000000 /* Desc extension (0 = legacy) */ +#define IXGBE_TXD_CMD_VLE 0x40000000 /* Add VLAN tag */ +#define IXGBE_TXD_STAT_DD 0x00000001 /* Descriptor Done */ + +#define IXGBE_RXDADV_IPSEC_STATUS_SECP 0x00020000 +#define IXGBE_RXDADV_IPSEC_ERROR_INVALID_PROTOCOL 0x08000000 +#define IXGBE_RXDADV_IPSEC_ERROR_INVALID_LENGTH 0x10000000 +#define IXGBE_RXDADV_IPSEC_ERROR_AUTH_FAILED 0x18000000 +#define IXGBE_RXDADV_IPSEC_ERROR_BIT_MASK 0x18000000 +/* Multiple Transmit Queue Command Register */ +#define IXGBE_MTQC_RT_ENA 0x1 /* DCB Enable */ +#define IXGBE_MTQC_VT_ENA 0x2 /* VMDQ2 Enable */ +#define IXGBE_MTQC_NUM_TC_OR_Q 0xC /* Numer of TCs or TxQs per pool */ +#define IXGBE_MTQC_64Q_1PB 0x0 /* 64 queues 1 pack buffer */ +#define IXGBE_MTQC_32VF 0x8 /* 4 TX Queues per pool w/32VF's */ +#define IXGBE_MTQC_64VF 0x4 /* 2 TX Queues per pool w/64VF's */ +#define IXGBE_MTQC_4TC_4TQ 0x8 /* 4 TC if RT_ENA and VT_ENA */ +#define IXGBE_MTQC_8TC_8TQ 0xC /* 8 TC if RT_ENA or 8 TQ if VT_ENA */ + +/* Receive Descriptor bit definitions */ +#define IXGBE_RXD_STAT_DD 0x01 /* Descriptor Done */ +#define IXGBE_RXD_STAT_EOP 0x02 /* End of Packet */ +#define IXGBE_RXD_STAT_FLM 0x04 /* FDir Match */ +#define IXGBE_RXD_STAT_VP 0x08 /* IEEE VLAN Packet */ +#define IXGBE_RXDADV_NEXTP_MASK 0x000FFFF0 /* Next Descriptor Index */ +#define IXGBE_RXDADV_NEXTP_SHIFT 0x00000004 +#define IXGBE_RXD_STAT_UDPCS 0x10 /* UDP xsum calculated */ +#define IXGBE_RXD_STAT_L4CS 0x20 /* L4 xsum calculated */ +#define IXGBE_RXD_STAT_IPCS 0x40 /* IP xsum calculated */ +#define IXGBE_RXD_STAT_PIF 0x80 /* passed in-exact filter */ +#define IXGBE_RXD_STAT_CRCV 0x100 /* Speculative CRC Valid */ +#define IXGBE_RXD_STAT_OUTERIPCS 0x100 /* Cloud IP xsum calculated */ +#define IXGBE_RXD_STAT_VEXT 0x200 /* 1st VLAN found */ +#define IXGBE_RXD_STAT_UDPV 0x400 /* Valid UDP checksum */ +#define IXGBE_RXD_STAT_DYNINT 0x800 /* Pkt caused INT via DYNINT */ +#define IXGBE_RXD_STAT_LLINT 0x800 /* Pkt caused Low Latency Interrupt */ +#define IXGBE_RXD_STAT_TSIP 0x08000 /* Time Stamp in packet buffer */ +#define IXGBE_RXD_STAT_TS 0x10000 /* Time Stamp */ +#define IXGBE_RXD_STAT_SECP 0x20000 /* Security Processing */ +#define IXGBE_RXD_STAT_LB 0x40000 /* Loopback Status */ +#define IXGBE_RXD_STAT_ACK 0x8000 /* ACK Packet indication */ +#define IXGBE_RXD_ERR_CE 0x01 /* CRC Error */ +#define IXGBE_RXD_ERR_LE 0x02 /* Length Error */ +#define IXGBE_RXD_ERR_PE 0x08 /* Packet Error */ +#define IXGBE_RXD_ERR_OSE 0x10 /* Oversize Error */ +#define IXGBE_RXD_ERR_USE 0x20 /* Undersize Error */ +#define IXGBE_RXD_ERR_TCPE 0x40 /* TCP/UDP Checksum Error */ +#define IXGBE_RXD_ERR_IPE 0x80 /* IP Checksum Error */ +#define IXGBE_RXDADV_ERR_MASK 0xfff00000 /* RDESC.ERRORS mask */ +#define IXGBE_RXDADV_ERR_SHIFT 20 /* RDESC.ERRORS shift */ +#define IXGBE_RXDADV_ERR_OUTERIPER 0x04000000 /* CRC IP Header error */ +#define IXGBE_RXDADV_ERR_RXE 0x20000000 /* Any MAC Error */ +#define IXGBE_RXDADV_ERR_FCEOFE 0x80000000 /* FCEOFe/IPE */ +#define IXGBE_RXDADV_ERR_FCERR 0x00700000 /* FCERR/FDIRERR */ +#define IXGBE_RXDADV_ERR_FDIR_LEN 0x00100000 /* FDIR Length error */ +#define IXGBE_RXDADV_ERR_FDIR_DROP 0x00200000 /* FDIR Drop error */ +#define IXGBE_RXDADV_ERR_FDIR_COLL 0x00400000 /* FDIR Collision error */ +#define IXGBE_RXDADV_ERR_HBO 0x00800000 /*Header Buffer Overflow */ +#define IXGBE_RXDADV_ERR_CE 0x01000000 /* CRC Error */ +#define IXGBE_RXDADV_ERR_LE 0x02000000 /* Length Error */ +#define IXGBE_RXDADV_ERR_PE 0x08000000 /* Packet Error */ +#define IXGBE_RXDADV_ERR_OSE 0x10000000 /* Oversize Error */ +#define IXGBE_RXDADV_ERR_USE 0x20000000 /* Undersize Error */ +#define IXGBE_RXDADV_ERR_TCPE 0x40000000 /* TCP/UDP Checksum Error */ +#define IXGBE_RXDADV_ERR_IPE 0x80000000 /* IP Checksum Error */ +#define IXGBE_RXD_VLAN_ID_MASK 0x0FFF /* VLAN ID is in lower 12 bits */ +#define IXGBE_RXD_PRI_MASK 0xE000 /* Priority is in upper 3 bits */ +#define IXGBE_RXD_PRI_SHIFT 13 +#define IXGBE_RXD_CFI_MASK 0x1000 /* CFI is bit 12 */ +#define IXGBE_RXD_CFI_SHIFT 12 + +#define IXGBE_RXDADV_STAT_DD IXGBE_RXD_STAT_DD /* Done */ +#define IXGBE_RXDADV_STAT_EOP IXGBE_RXD_STAT_EOP /* End of Packet */ +#define IXGBE_RXDADV_STAT_FLM IXGBE_RXD_STAT_FLM /* FDir Match */ +#define IXGBE_RXDADV_STAT_VP IXGBE_RXD_STAT_VP /* IEEE VLAN Pkt */ +#define IXGBE_RXDADV_STAT_MASK 0x000fffff /* Stat/NEXTP: bit 0-19 */ +#define IXGBE_RXDADV_STAT_FCEOFS 0x00000040 /* FCoE EOF/SOF Stat */ +#define IXGBE_RXDADV_STAT_FCSTAT 0x00000030 /* FCoE Pkt Stat */ +#define IXGBE_RXDADV_STAT_FCSTAT_NOMTCH 0x00000000 /* 00: No Ctxt Match */ +#define IXGBE_RXDADV_STAT_FCSTAT_NODDP 0x00000010 /* 01: Ctxt w/o DDP */ +#define IXGBE_RXDADV_STAT_FCSTAT_FCPRSP 0x00000020 /* 10: Recv. FCP_RSP */ +#define IXGBE_RXDADV_STAT_FCSTAT_DDP 0x00000030 /* 11: Ctxt w/ DDP */ +#define IXGBE_RXDADV_STAT_TS 0x00010000 /* IEEE1588 Time Stamp */ +#define IXGBE_RXDADV_STAT_TSIP 0x00008000 /* Time Stamp in packet buffer */ + +/* PSRTYPE bit definitions */ +#define IXGBE_PSRTYPE_TCPHDR 0x00000010 +#define IXGBE_PSRTYPE_UDPHDR 0x00000020 +#define IXGBE_PSRTYPE_IPV4HDR 0x00000100 +#define IXGBE_PSRTYPE_IPV6HDR 0x00000200 +#define IXGBE_PSRTYPE_L2HDR 0x00001000 + +/* SRRCTL bit definitions */ +#define IXGBE_SRRCTL_BSIZEPKT_SHIFT 10 /* so many KBs */ +#define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2 /* 64byte resolution (>> 6) + * + at bit 8 offset (<< 8) + * = (<< 2) + */ +#define IXGBE_SRRCTL_RDMTS_SHIFT 22 +#define IXGBE_SRRCTL_RDMTS_MASK 0x01C00000 +#define IXGBE_SRRCTL_DROP_EN 0x10000000 +#define IXGBE_SRRCTL_BSIZEPKT_MASK 0x0000007F +#define IXGBE_SRRCTL_BSIZEHDR_MASK 0x00003F00 +#define IXGBE_SRRCTL_DESCTYPE_LEGACY 0x00000000 +#define IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF 0x02000000 +#define IXGBE_SRRCTL_DESCTYPE_HDR_SPLIT 0x04000000 +#define IXGBE_SRRCTL_DESCTYPE_HDR_REPLICATION_LARGE_PKT 0x08000000 +#define IXGBE_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS 0x0A000000 +#define IXGBE_SRRCTL_DESCTYPE_MASK 0x0E000000 + +#define IXGBE_RXDPS_HDRSTAT_HDRSP 0x00008000 +#define IXGBE_RXDPS_HDRSTAT_HDRLEN_MASK 0x000003FF + +#define IXGBE_RXDADV_RSSTYPE_MASK 0x0000000F +#define IXGBE_RXDADV_PKTTYPE_MASK 0x0000FFF0 +#define IXGBE_RXDADV_PKTTYPE_MASK_EX 0x0001FFF0 +#define IXGBE_RXDADV_HDRBUFLEN_MASK 0x00007FE0 +#define IXGBE_RXDADV_RSCCNT_MASK 0x001E0000 +#define IXGBE_RXDADV_RSCCNT_SHIFT 17 +#define IXGBE_RXDADV_HDRBUFLEN_SHIFT 5 +#define IXGBE_RXDADV_SPLITHEADER_EN 0x00001000 +#define IXGBE_RXDADV_SPH 0x8000 + +/* RSS Hash results */ +#define IXGBE_RXDADV_RSSTYPE_NONE 0x00000000 +#define IXGBE_RXDADV_RSSTYPE_IPV4_TCP 0x00000001 +#define IXGBE_RXDADV_RSSTYPE_IPV4 0x00000002 +#define IXGBE_RXDADV_RSSTYPE_IPV6_TCP 0x00000003 +#define IXGBE_RXDADV_RSSTYPE_IPV6_EX 0x00000004 +#define IXGBE_RXDADV_RSSTYPE_IPV6 0x00000005 +#define IXGBE_RXDADV_RSSTYPE_IPV6_TCP_EX 0x00000006 +#define IXGBE_RXDADV_RSSTYPE_IPV4_UDP 0x00000007 +#define IXGBE_RXDADV_RSSTYPE_IPV6_UDP 0x00000008 +#define IXGBE_RXDADV_RSSTYPE_IPV6_UDP_EX 0x00000009 + +/* RSS Packet Types as indicated in the receive descriptor. */ +#define IXGBE_RXDADV_PKTTYPE_NONE 0x00000000 +#define IXGBE_RXDADV_PKTTYPE_IPV4 0x00000010 /* IPv4 hdr present */ +#define IXGBE_RXDADV_PKTTYPE_IPV4_EX 0x00000020 /* IPv4 hdr + extensions */ +#define IXGBE_RXDADV_PKTTYPE_IPV6 0x00000040 /* IPv6 hdr present */ +#define IXGBE_RXDADV_PKTTYPE_IPV6_EX 0x00000080 /* IPv6 hdr + extensions */ +#define IXGBE_RXDADV_PKTTYPE_TCP 0x00000100 /* TCP hdr present */ +#define IXGBE_RXDADV_PKTTYPE_UDP 0x00000200 /* UDP hdr present */ +#define IXGBE_RXDADV_PKTTYPE_SCTP 0x00000400 /* SCTP hdr present */ +#define IXGBE_RXDADV_PKTTYPE_NFS 0x00000800 /* NFS hdr present */ +#define IXGBE_RXDADV_PKTTYPE_GENEVE 0x00000800 /* GENEVE hdr present */ +#define IXGBE_RXDADV_PKTTYPE_VXLAN 0x00000800 /* VXLAN hdr present */ +#define IXGBE_RXDADV_PKTTYPE_TUNNEL 0x00010000 /* Tunnel type */ +#define IXGBE_RXDADV_PKTTYPE_IPSEC_ESP 0x00001000 /* IPSec ESP */ +#define IXGBE_RXDADV_PKTTYPE_IPSEC_AH 0x00002000 /* IPSec AH */ +#define IXGBE_RXDADV_PKTTYPE_LINKSEC 0x00004000 /* LinkSec Encap */ +#define IXGBE_RXDADV_PKTTYPE_ETQF 0x00008000 /* PKTTYPE is ETQF index */ +#define IXGBE_RXDADV_PKTTYPE_ETQF_MASK 0x00000070 /* ETQF has 8 indices */ +#define IXGBE_RXDADV_PKTTYPE_ETQF_SHIFT 4 /* Right-shift 4 bits */ + +/* Security Processing bit Indication */ +#define IXGBE_RXDADV_LNKSEC_STATUS_SECP 0x00020000 +#define IXGBE_RXDADV_LNKSEC_ERROR_NO_SA_MATCH 0x08000000 +#define IXGBE_RXDADV_LNKSEC_ERROR_REPLAY_ERROR 0x10000000 +#define IXGBE_RXDADV_LNKSEC_ERROR_BIT_MASK 0x18000000 +#define IXGBE_RXDADV_LNKSEC_ERROR_BAD_SIG 0x18000000 + +/* Masks to determine if packets should be dropped due to frame errors */ +#define IXGBE_RXD_ERR_FRAME_ERR_MASK ( \ + IXGBE_RXD_ERR_CE | \ + IXGBE_RXD_ERR_LE | \ + IXGBE_RXD_ERR_PE | \ + IXGBE_RXD_ERR_OSE | \ + IXGBE_RXD_ERR_USE) + +#define IXGBE_RXDADV_ERR_FRAME_ERR_MASK ( \ + IXGBE_RXDADV_ERR_CE | \ + IXGBE_RXDADV_ERR_LE | \ + IXGBE_RXDADV_ERR_PE | \ + IXGBE_RXDADV_ERR_OSE | \ + IXGBE_RXDADV_ERR_USE) + +#define IXGBE_RXDADV_ERR_FRAME_ERR_MASK_82599 IXGBE_RXDADV_ERR_RXE + +/* Multicast bit mask */ +#define IXGBE_MCSTCTRL_MFE 0x4 + +/* Number of Transmit and Receive Descriptors must be a multiple of 8 */ +#define IXGBE_REQ_TX_DESCRIPTOR_MULTIPLE 8 +#define IXGBE_REQ_RX_DESCRIPTOR_MULTIPLE 8 +#define IXGBE_REQ_TX_BUFFER_GRANULARITY 1024 + +/* Vlan-specific macros */ +#define IXGBE_RX_DESC_SPECIAL_VLAN_MASK 0x0FFF /* VLAN ID in lower 12 bits */ +#define IXGBE_RX_DESC_SPECIAL_PRI_MASK 0xE000 /* Priority in upper 3 bits */ +#define IXGBE_RX_DESC_SPECIAL_PRI_SHIFT 0x000D /* Priority in upper 3 of 16 */ +#define IXGBE_TX_DESC_SPECIAL_PRI_SHIFT IXGBE_RX_DESC_SPECIAL_PRI_SHIFT +/* Translated register #defines */ +#define IXGBE_PVFCTRL(P) (0x00300 + (4 * (P))) +#define IXGBE_PVFSTATUS(P) (0x00008 + (0 * (P))) +#define IXGBE_PVFLINKS(P) (0x042A4 + (0 * (P))) +#define IXGBE_PVFRTIMER(P) (0x00048 + (0 * (P))) +#define IXGBE_PVFMAILBOX(P) (0x04C00 + (4 * (P))) +#define IXGBE_PVFRXMEMWRAP(P) (0x03190 + (0 * (P))) +#define IXGBE_PVTEICR(P) (0x00B00 + (4 * (P))) +#define IXGBE_PVTEICS(P) (0x00C00 + (4 * (P))) +#define IXGBE_PVTEIMS(P) (0x00D00 + (4 * (P))) +#define IXGBE_PVTEIMC(P) (0x00E00 + (4 * (P))) +#define IXGBE_PVTEIAC(P) (0x00F00 + (4 * (P))) +#define IXGBE_PVTEIAM(P) (0x04D00 + (4 * (P))) +#define IXGBE_PVTEITR(P) (((P) < 24) ? (0x00820 + ((P) * 4)) : \ + (0x012300 + (((P) - 24) * 4))) +#define IXGBE_PVTIVAR(P) (0x12500 + (4 * (P))) +#define IXGBE_PVTIVAR_MISC(P) (0x04E00 + (4 * (P))) +#define IXGBE_PVTRSCINT(P) (0x12000 + (4 * (P))) +#define IXGBE_VFPBACL(P) (0x110C8 + (4 * (P))) +#define IXGBE_PVFRDBAL(P) ((P < 64) ? (0x01000 + (0x40 * (P))) \ + : (0x0D000 + (0x40 * ((P) - 64)))) +#define IXGBE_PVFRDBAH(P) ((P < 64) ? (0x01004 + (0x40 * (P))) \ + : (0x0D004 + (0x40 * ((P) - 64)))) +#define IXGBE_PVFRDLEN(P) ((P < 64) ? (0x01008 + (0x40 * (P))) \ + : (0x0D008 + (0x40 * ((P) - 64)))) +#define IXGBE_PVFRDH(P) ((P < 64) ? (0x01010 + (0x40 * (P))) \ + : (0x0D010 + (0x40 * ((P) - 64)))) +#define IXGBE_PVFRDT(P) ((P < 64) ? (0x01018 + (0x40 * (P))) \ + : (0x0D018 + (0x40 * ((P) - 64)))) +#define IXGBE_PVFRXDCTL(P) ((P < 64) ? (0x01028 + (0x40 * (P))) \ + : (0x0D028 + (0x40 * ((P) - 64)))) +#define IXGBE_PVFSRRCTL(P) ((P < 64) ? (0x01014 + (0x40 * (P))) \ + : (0x0D014 + (0x40 * ((P) - 64)))) +#define IXGBE_PVFPSRTYPE(P) (0x0EA00 + (4 * (P))) +#define IXGBE_PVFTDBAL(P) (0x06000 + (0x40 * (P))) +#define IXGBE_PVFTDBAH(P) (0x06004 + (0x40 * (P))) +#define IXGBE_PVFTDLEN(P) (0x06008 + (0x40 * (P))) +#define IXGBE_PVFTDH(P) (0x06010 + (0x40 * (P))) +#define IXGBE_PVFTDT(P) (0x06018 + (0x40 * (P))) +#define IXGBE_PVFTXDCTL(P) (0x06028 + (0x40 * (P))) +#define IXGBE_PVFTDWBAL(P) (0x06038 + (0x40 * (P))) +#define IXGBE_PVFTDWBAH(P) (0x0603C + (0x40 * (P))) +#define IXGBE_PVFDCA_RXCTRL(P) (((P) < 64) ? (0x0100C + (0x40 * (P))) \ + : (0x0D00C + (0x40 * ((P) - 64)))) +#define IXGBE_PVFDCA_TXCTRL(P) (0x0600C + (0x40 * (P))) +#define IXGBE_PVFGPRC(x) (0x0101C + (0x40 * (x))) +#define IXGBE_PVFGPTC(x) (0x08300 + (0x04 * (x))) +#define IXGBE_PVFGORC_LSB(x) (0x01020 + (0x40 * (x))) +#define IXGBE_PVFGORC_MSB(x) (0x0D020 + (0x40 * (x))) +#define IXGBE_PVFGOTC_LSB(x) (0x08400 + (0x08 * (x))) +#define IXGBE_PVFGOTC_MSB(x) (0x08404 + (0x08 * (x))) +#define IXGBE_PVFMPRC(x) (0x0D01C + (0x40 * (x))) + +#define IXGBE_PVFTDWBALn(q_per_pool, vf_number, vf_q_index) \ + (IXGBE_PVFTDWBAL((q_per_pool)*(vf_number) + (vf_q_index))) +#define IXGBE_PVFTDWBAHn(q_per_pool, vf_number, vf_q_index) \ + (IXGBE_PVFTDWBAH((q_per_pool)*(vf_number) + (vf_q_index))) + +#define IXGBE_PVFTDHn(q_per_pool, vf_number, vf_q_index) \ + (IXGBE_PVFTDH((q_per_pool)*(vf_number) + (vf_q_index))) +#define IXGBE_PVFTDTn(q_per_pool, vf_number, vf_q_index) \ + (IXGBE_PVFTDT((q_per_pool)*(vf_number) + (vf_q_index))) + +/* Little Endian defines */ +#ifndef __le16 +#define __le16 u16 +#endif +#ifndef __le32 +#define __le32 u32 +#endif +#ifndef __le64 +#define __le64 u64 + +#endif +#ifndef __be16 +/* Big Endian defines */ +#define __be16 u16 +#define __be32 u32 +#define __be64 u64 + +#endif +enum ixgbe_fdir_pballoc_type { + IXGBE_FDIR_PBALLOC_NONE = 0, + IXGBE_FDIR_PBALLOC_64K = 1, + IXGBE_FDIR_PBALLOC_128K = 2, + IXGBE_FDIR_PBALLOC_256K = 3, +}; + +/* Flow Director register values */ +#define IXGBE_FDIRCTRL_PBALLOC_64K 0x00000001 +#define IXGBE_FDIRCTRL_PBALLOC_128K 0x00000002 +#define IXGBE_FDIRCTRL_PBALLOC_256K 0x00000003 +#define IXGBE_FDIRCTRL_INIT_DONE 0x00000008 +#define IXGBE_FDIRCTRL_PERFECT_MATCH 0x00000010 +#define IXGBE_FDIRCTRL_REPORT_STATUS 0x00000020 +#define IXGBE_FDIRCTRL_REPORT_STATUS_ALWAYS 0x00000080 +#define IXGBE_FDIRCTRL_DROP_Q_SHIFT 8 +#define IXGBE_FDIRCTRL_DROP_Q_MASK 0x00007F00 +#define IXGBE_FDIRCTRL_FLEX_SHIFT 16 +#define IXGBE_FDIRCTRL_DROP_NO_MATCH 0x00008000 +#define IXGBE_FDIRCTRL_FILTERMODE_SHIFT 21 +#define IXGBE_FDIRCTRL_FILTERMODE_MACVLAN 0x0001 /* bit 23:21, 001b */ +#define IXGBE_FDIRCTRL_FILTERMODE_CLOUD 0x0002 /* bit 23:21, 010b */ +#define IXGBE_FDIRCTRL_SEARCHLIM 0x00800000 +#define IXGBE_FDIRCTRL_FILTERMODE_MASK 0x00E00000 +#define IXGBE_FDIRCTRL_MAX_LENGTH_SHIFT 24 +#define IXGBE_FDIRCTRL_FULL_THRESH_MASK 0xF0000000 +#define IXGBE_FDIRCTRL_FULL_THRESH_SHIFT 28 + +#define IXGBE_FDIRTCPM_DPORTM_SHIFT 16 +#define IXGBE_FDIRUDPM_DPORTM_SHIFT 16 +#define IXGBE_FDIRIP6M_DIPM_SHIFT 16 +#define IXGBE_FDIRM_VLANID 0x00000001 +#define IXGBE_FDIRM_VLANP 0x00000002 +#define IXGBE_FDIRM_POOL 0x00000004 +#define IXGBE_FDIRM_L4P 0x00000008 +#define IXGBE_FDIRM_FLEX 0x00000010 +#define IXGBE_FDIRM_DIPv6 0x00000020 +#define IXGBE_FDIRM_L3P 0x00000040 + +#define IXGBE_FDIRIP6M_INNER_MAC 0x03F0 /* bit 9:4 */ +#define IXGBE_FDIRIP6M_TUNNEL_TYPE 0x0800 /* bit 11 */ +#define IXGBE_FDIRIP6M_TNI_VNI 0xF000 /* bit 15:12 */ +#define IXGBE_FDIRIP6M_TNI_VNI_24 0x1000 /* bit 12 */ +#define IXGBE_FDIRIP6M_ALWAYS_MASK 0x040F /* bit 10, 3:0 */ + +#define IXGBE_FDIRFREE_FREE_MASK 0xFFFF +#define IXGBE_FDIRFREE_FREE_SHIFT 0 +#define IXGBE_FDIRFREE_COLL_MASK 0x7FFF0000 +#define IXGBE_FDIRFREE_COLL_SHIFT 16 +#define IXGBE_FDIRLEN_MAXLEN_MASK 0x3F +#define IXGBE_FDIRLEN_MAXLEN_SHIFT 0 +#define IXGBE_FDIRLEN_MAXHASH_MASK 0x7FFF0000 +#define IXGBE_FDIRLEN_MAXHASH_SHIFT 16 +#define IXGBE_FDIRUSTAT_ADD_MASK 0xFFFF +#define IXGBE_FDIRUSTAT_ADD_SHIFT 0 +#define IXGBE_FDIRUSTAT_REMOVE_MASK 0xFFFF0000 +#define IXGBE_FDIRUSTAT_REMOVE_SHIFT 16 +#define IXGBE_FDIRFSTAT_FADD_MASK 0x00FF +#define IXGBE_FDIRFSTAT_FADD_SHIFT 0 +#define IXGBE_FDIRFSTAT_FREMOVE_MASK 0xFF00 +#define IXGBE_FDIRFSTAT_FREMOVE_SHIFT 8 +#define IXGBE_FDIRPORT_DESTINATION_SHIFT 16 +#define IXGBE_FDIRVLAN_FLEX_SHIFT 16 +#define IXGBE_FDIRHASH_BUCKET_VALID_SHIFT 15 +#define IXGBE_FDIRHASH_SIG_SW_INDEX_SHIFT 16 + +#define IXGBE_FDIRCMD_CMD_MASK 0x00000003 +#define IXGBE_FDIRCMD_CMD_ADD_FLOW 0x00000001 +#define IXGBE_FDIRCMD_CMD_REMOVE_FLOW 0x00000002 +#define IXGBE_FDIRCMD_CMD_QUERY_REM_FILT 0x00000003 +#define IXGBE_FDIRCMD_FILTER_VALID 0x00000004 +#define IXGBE_FDIRCMD_FILTER_UPDATE 0x00000008 +#define IXGBE_FDIRCMD_IPv6DMATCH 0x00000010 +#define IXGBE_FDIRCMD_L4TYPE_UDP 0x00000020 +#define IXGBE_FDIRCMD_L4TYPE_TCP 0x00000040 +#define IXGBE_FDIRCMD_L4TYPE_SCTP 0x00000060 +#define IXGBE_FDIRCMD_IPV6 0x00000080 +#define IXGBE_FDIRCMD_CLEARHT 0x00000100 +#define IXGBE_FDIRCMD_DROP 0x00000200 +#define IXGBE_FDIRCMD_INT 0x00000400 +#define IXGBE_FDIRCMD_LAST 0x00000800 +#define IXGBE_FDIRCMD_COLLISION 0x00001000 +#define IXGBE_FDIRCMD_QUEUE_EN 0x00008000 +#define IXGBE_FDIRCMD_FLOW_TYPE_SHIFT 5 +#define IXGBE_FDIRCMD_RX_QUEUE_SHIFT 16 +#define IXGBE_FDIRCMD_TUNNEL_FILTER_SHIFT 23 +#define IXGBE_FDIRCMD_VT_POOL_SHIFT 24 +#define IXGBE_FDIR_INIT_DONE_POLL 10 +#define IXGBE_FDIRCMD_CMD_POLL 10 +#define IXGBE_FDIRCMD_TUNNEL_FILTER 0x00800000 +#define IXGBE_FDIR_DROP_QUEUE 127 + +/* Manageablility Host Interface defines */ +#define IXGBE_HI_MAX_BLOCK_BYTE_LENGTH 1792 /* Num of bytes in range */ +#define IXGBE_HI_MAX_BLOCK_DWORD_LENGTH 448 /* Num of dwords in range */ +#define IXGBE_HI_COMMAND_TIMEOUT 500 /* Process HI command limit */ +#define IXGBE_HI_FLASH_ERASE_TIMEOUT 1000 /* Process Erase command limit */ +#define IXGBE_HI_FLASH_UPDATE_TIMEOUT 5000 /* Process Update command limit */ +#define IXGBE_HI_FLASH_APPLY_TIMEOUT 0 /* Process Apply command limit */ +#define IXGBE_HI_PHY_MGMT_REQ_TIMEOUT 2000 /* Wait up to 2 seconds */ + +/* CEM Support */ +#define FW_CEM_HDR_LEN 0x4 +#define FW_CEM_CMD_DRIVER_INFO 0xDD +#define FW_CEM_CMD_DRIVER_INFO_LEN 0x5 +#define FW_CEM_CMD_RESERVED 0X0 +#define FW_CEM_UNUSED_VER 0x0 +#define FW_CEM_MAX_RETRIES 3 +#define FW_CEM_RESP_STATUS_SUCCESS 0x1 +#define FW_CEM_DRIVER_VERSION_SIZE 39 /* +9 would send 48 bytes to fw */ +#define FW_READ_SHADOW_RAM_CMD 0x31 +#define FW_READ_SHADOW_RAM_LEN 0x6 +#define FW_WRITE_SHADOW_RAM_CMD 0x33 +#define FW_WRITE_SHADOW_RAM_LEN 0xA /* 8 plus 1 WORD to write */ +#define FW_SHADOW_RAM_DUMP_CMD 0x36 +#define FW_SHADOW_RAM_DUMP_LEN 0 +#define FW_DEFAULT_CHECKSUM 0xFF /* checksum always 0xFF */ +#define FW_NVM_DATA_OFFSET 3 +#define FW_ANVM_DATA_OFFSET 3 +#define FW_MAX_READ_BUFFER_SIZE 1024 +#define FW_DISABLE_RXEN_CMD 0xDE +#define FW_DISABLE_RXEN_LEN 0x1 +#define FW_PHY_MGMT_REQ_CMD 0x20 +#define FW_PHY_TOKEN_REQ_CMD 0xA +#define FW_PHY_TOKEN_REQ_LEN 2 +#define FW_PHY_TOKEN_REQ 0 +#define FW_PHY_TOKEN_REL 1 +#define FW_PHY_TOKEN_OK 1 +#define FW_PHY_TOKEN_RETRY 0x80 +#define FW_PHY_TOKEN_DELAY 5 /* milliseconds */ +#define FW_PHY_TOKEN_WAIT 5 /* seconds */ +#define FW_PHY_TOKEN_RETRIES ((FW_PHY_TOKEN_WAIT * 1000) / FW_PHY_TOKEN_DELAY) +#define FW_INT_PHY_REQ_CMD 0xB +#define FW_INT_PHY_REQ_LEN 10 +#define FW_INT_PHY_REQ_READ 0 +#define FW_INT_PHY_REQ_WRITE 1 +#define FW_PHY_ACT_REQ_CMD 5 +#define FW_PHY_ACT_DATA_COUNT 4 +#define FW_PHY_ACT_REQ_LEN (4 + 4 * FW_PHY_ACT_DATA_COUNT) +#define FW_PHY_ACT_INIT_PHY 1 +#define FW_PHY_ACT_SETUP_LINK 2 +#define FW_PHY_ACT_LINK_SPEED_10 (1u << 0) +#define FW_PHY_ACT_LINK_SPEED_100 (1u << 1) +#define FW_PHY_ACT_LINK_SPEED_1G (1u << 2) +#define FW_PHY_ACT_LINK_SPEED_2_5G (1u << 3) +#define FW_PHY_ACT_LINK_SPEED_5G (1u << 4) +#define FW_PHY_ACT_LINK_SPEED_10G (1u << 5) +#define FW_PHY_ACT_LINK_SPEED_20G (1u << 6) +#define FW_PHY_ACT_LINK_SPEED_25G (1u << 7) +#define FW_PHY_ACT_LINK_SPEED_40G (1u << 8) +#define FW_PHY_ACT_LINK_SPEED_50G (1u << 9) +#define FW_PHY_ACT_LINK_SPEED_100G (1u << 10) +#define FW_PHY_ACT_SETUP_LINK_PAUSE_SHIFT 16 +#define FW_PHY_ACT_SETUP_LINK_PAUSE_MASK (3u << \ + FW_PHY_ACT_SETUP_LINK_PAUSE_SHIFT) +#define FW_PHY_ACT_SETUP_LINK_PAUSE_NONE 0u +#define FW_PHY_ACT_SETUP_LINK_PAUSE_TX 1u +#define FW_PHY_ACT_SETUP_LINK_PAUSE_RX 2u +#define FW_PHY_ACT_SETUP_LINK_PAUSE_RXTX 3u +#define FW_PHY_ACT_SETUP_LINK_LP (1u << 18) +#define FW_PHY_ACT_SETUP_LINK_HP (1u << 19) +#define FW_PHY_ACT_SETUP_LINK_EEE (1u << 20) +#define FW_PHY_ACT_SETUP_LINK_AN (1u << 22) +#define FW_PHY_ACT_SETUP_LINK_RSP_DOWN (1u << 0) +#define FW_PHY_ACT_GET_LINK_INFO 3 +#define FW_PHY_ACT_GET_LINK_INFO_EEE (1u << 19) +#define FW_PHY_ACT_GET_LINK_INFO_FC_TX (1u << 20) +#define FW_PHY_ACT_GET_LINK_INFO_FC_RX (1u << 21) +#define FW_PHY_ACT_GET_LINK_INFO_POWER (1u << 22) +#define FW_PHY_ACT_GET_LINK_INFO_AN_COMPLETE (1u << 24) +#define FW_PHY_ACT_GET_LINK_INFO_TEMP (1u << 25) +#define FW_PHY_ACT_GET_LINK_INFO_LP_FC_TX (1u << 28) +#define FW_PHY_ACT_GET_LINK_INFO_LP_FC_RX (1u << 29) +#define FW_PHY_ACT_FORCE_LINK_DOWN 4 +#define FW_PHY_ACT_FORCE_LINK_DOWN_OFF (1u << 0) +#define FW_PHY_ACT_PHY_SW_RESET 5 +#define FW_PHY_ACT_PHY_HW_RESET 6 +#define FW_PHY_ACT_GET_PHY_INFO 7 +#define FW_PHY_ACT_UD_2 0x1002 +#define FW_PHY_ACT_UD_2_10G_KR_EEE (1u << 6) +#define FW_PHY_ACT_UD_2_10G_KX4_EEE (1u << 5) +#define FW_PHY_ACT_UD_2_1G_KX_EEE (1u << 4) +#define FW_PHY_ACT_UD_2_10G_T_EEE (1u << 3) +#define FW_PHY_ACT_UD_2_1G_T_EEE (1u << 2) +#define FW_PHY_ACT_UD_2_100M_TX_EEE (1u << 1) +#define FW_PHY_ACT_RETRIES 50 +#define FW_PHY_INFO_SPEED_MASK 0xFFFu +#define FW_PHY_INFO_ID_HI_MASK 0xFFFF0000u +#define FW_PHY_INFO_ID_LO_MASK 0x0000FFFFu + +#define IXGBE_SR_IMMEDIATE_VALUES_PTR 0x4E + +/* Host Interface Command Structures */ + +#pragma pack(push, 1) + +struct ixgbe_hic_hdr { + u8 cmd; + u8 buf_len; + union { + u8 cmd_resv; + u8 ret_status; + } cmd_or_resp; + u8 checksum; +}; + +struct ixgbe_hic_hdr2_req { + u8 cmd; + u8 buf_lenh; + u8 buf_lenl; + u8 checksum; +}; + +struct ixgbe_hic_hdr2_rsp { + u8 cmd; + u8 buf_lenl; + u8 buf_lenh_status; /* 7-5: high bits of buf_len, 4-0: status */ + u8 checksum; +}; + +union ixgbe_hic_hdr2 { + struct ixgbe_hic_hdr2_req req; + struct ixgbe_hic_hdr2_rsp rsp; +}; + +struct ixgbe_hic_drv_info { + struct ixgbe_hic_hdr hdr; + u8 port_num; + u8 ver_sub; + u8 ver_build; + u8 ver_min; + u8 ver_maj; + u8 pad; /* end spacing to ensure length is mult. of dword */ + u16 pad2; /* end spacing to ensure length is mult. of dword2 */ +}; + +struct ixgbe_hic_drv_info2 { + struct ixgbe_hic_hdr hdr; + u8 port_num; + u8 ver_sub; + u8 ver_build; + u8 ver_min; + u8 ver_maj; + char driver_string[FW_CEM_DRIVER_VERSION_SIZE]; +}; + +/* These need to be dword aligned */ +struct ixgbe_hic_read_shadow_ram { + union ixgbe_hic_hdr2 hdr; + u32 address; + u16 length; + u16 pad2; + u16 data; + u16 pad3; +}; + +struct ixgbe_hic_write_shadow_ram { + union ixgbe_hic_hdr2 hdr; + u32 address; + u16 length; + u16 pad2; + u16 data; + u16 pad3; +}; + +struct ixgbe_hic_disable_rxen { + struct ixgbe_hic_hdr hdr; + u8 port_number; + u8 pad2; + u16 pad3; +}; + +struct ixgbe_hic_phy_token_req { + struct ixgbe_hic_hdr hdr; + u8 port_number; + u8 command_type; + u16 pad; +}; + +struct ixgbe_hic_internal_phy_req { + struct ixgbe_hic_hdr hdr; + u8 port_number; + u8 command_type; + __be16 address; + u16 rsv1; + __be32 write_data; + u16 pad; +}; + +struct ixgbe_hic_internal_phy_resp { + struct ixgbe_hic_hdr hdr; + __be32 read_data; +}; + +struct ixgbe_hic_phy_activity_req { + struct ixgbe_hic_hdr hdr; + u8 port_number; + u8 pad; + __le16 activity_id; + __be32 data[FW_PHY_ACT_DATA_COUNT]; +}; + +struct ixgbe_hic_phy_activity_resp { + struct ixgbe_hic_hdr hdr; + __be32 data[FW_PHY_ACT_DATA_COUNT]; +}; + +#pragma pack(pop) + +/* Transmit Descriptor - Legacy */ +struct ixgbe_legacy_tx_desc { + u64 buffer_addr; /* Address of the descriptor's data buffer */ + union { + __le32 data; + struct { + __le16 length; /* Data buffer length */ + u8 cso; /* Checksum offset */ + u8 cmd; /* Descriptor control */ + } flags; + } lower; + union { + __le32 data; + struct { + u8 status; /* Descriptor status */ + u8 css; /* Checksum start */ + __le16 vlan; + } fields; + } upper; +}; + +/* Transmit Descriptor - Advanced */ +union ixgbe_adv_tx_desc { + struct { + __le64 buffer_addr; /* Address of descriptor's data buf */ + __le32 cmd_type_len; + __le32 olinfo_status; + } read; + struct { + __le64 rsvd; /* Reserved */ + __le32 nxtseq_seed; + __le32 status; + } wb; +}; + +/* Receive Descriptor - Legacy */ +struct ixgbe_legacy_rx_desc { + __le64 buffer_addr; /* Address of the descriptor's data buffer */ + __le16 length; /* Length of data DMAed into data buffer */ + __le16 csum; /* Packet checksum */ + u8 status; /* Descriptor status */ + u8 errors; /* Descriptor Errors */ + __le16 vlan; +}; + +/* Receive Descriptor - Advanced */ +union ixgbe_adv_rx_desc { + struct { + __le64 pkt_addr; /* Packet buffer address */ + __le64 hdr_addr; /* Header buffer address */ + } read; + struct { + struct { + union { + __le32 data; + struct { + __le16 pkt_info; /* RSS, Pkt type */ + __le16 hdr_info; /* Splithdr, hdrlen */ + } hs_rss; + } lo_dword; + union { + __le32 rss; /* RSS Hash */ + struct { + __le16 ip_id; /* IP id */ + __le16 csum; /* Packet Checksum */ + } csum_ip; + } hi_dword; + } lower; + struct { + __le32 status_error; /* ext status/error */ + __le16 length; /* Packet length */ + __le16 vlan; /* VLAN tag */ + } upper; + } wb; /* writeback */ +}; + +/* Context descriptors */ +struct ixgbe_adv_tx_context_desc { + __le32 vlan_macip_lens; + __le32 seqnum_seed; + __le32 type_tucmd_mlhl; + __le32 mss_l4len_idx; +}; + +/* Adv Transmit Descriptor Config Masks */ +#define IXGBE_ADVTXD_DTALEN_MASK 0x0000FFFF /* Data buf length(bytes) */ +#define IXGBE_ADVTXD_MAC_LINKSEC 0x00040000 /* Insert LinkSec */ +#define IXGBE_ADVTXD_MAC_TSTAMP 0x00080000 /* IEEE1588 time stamp */ +#define IXGBE_ADVTXD_IPSEC_SA_INDEX_MASK 0x000003FF /* IPSec SA index */ +#define IXGBE_ADVTXD_IPSEC_ESP_LEN_MASK 0x000001FF /* IPSec ESP length */ +#define IXGBE_ADVTXD_DTYP_MASK 0x00F00000 /* DTYP mask */ +#define IXGBE_ADVTXD_DTYP_CTXT 0x00200000 /* Adv Context Desc */ +#define IXGBE_ADVTXD_DTYP_DATA 0x00300000 /* Adv Data Descriptor */ +#define IXGBE_ADVTXD_DCMD_EOP IXGBE_TXD_CMD_EOP /* End of Packet */ +#define IXGBE_ADVTXD_DCMD_IFCS IXGBE_TXD_CMD_IFCS /* Insert FCS */ +#define IXGBE_ADVTXD_DCMD_RS IXGBE_TXD_CMD_RS /* Report Status */ +#define IXGBE_ADVTXD_DCMD_DDTYP_ISCSI 0x10000000 /* DDP hdr type or iSCSI */ +#define IXGBE_ADVTXD_DCMD_DEXT IXGBE_TXD_CMD_DEXT /* Desc ext 1=Adv */ +#define IXGBE_ADVTXD_DCMD_VLE IXGBE_TXD_CMD_VLE /* VLAN pkt enable */ +#define IXGBE_ADVTXD_DCMD_TSE 0x80000000 /* TCP Seg enable */ +#define IXGBE_ADVTXD_STAT_DD IXGBE_TXD_STAT_DD /* Descriptor Done */ +#define IXGBE_ADVTXD_STAT_SN_CRC 0x00000002 /* NXTSEQ/SEED pres in WB */ +#define IXGBE_ADVTXD_STAT_RSV 0x0000000C /* STA Reserved */ +#define IXGBE_ADVTXD_IDX_SHIFT 4 /* Adv desc Index shift */ +#define IXGBE_ADVTXD_CC 0x00000080 /* Check Context */ +#define IXGBE_ADVTXD_POPTS_SHIFT 8 /* Adv desc POPTS shift */ +#define IXGBE_ADVTXD_POPTS_IXSM (IXGBE_TXD_POPTS_IXSM << \ + IXGBE_ADVTXD_POPTS_SHIFT) +#define IXGBE_ADVTXD_POPTS_TXSM (IXGBE_TXD_POPTS_TXSM << \ + IXGBE_ADVTXD_POPTS_SHIFT) +#define IXGBE_ADVTXD_POPTS_ISCO_1ST 0x00000000 /* 1st TSO of iSCSI PDU */ +#define IXGBE_ADVTXD_POPTS_ISCO_MDL 0x00000800 /* Middle TSO of iSCSI PDU */ +#define IXGBE_ADVTXD_POPTS_ISCO_LAST 0x00001000 /* Last TSO of iSCSI PDU */ +/* 1st&Last TSO-full iSCSI PDU */ +#define IXGBE_ADVTXD_POPTS_ISCO_FULL 0x00001800 +#define IXGBE_ADVTXD_POPTS_RSV 0x00002000 /* POPTS Reserved */ +#define IXGBE_ADVTXD_PAYLEN_SHIFT 14 /* Adv desc PAYLEN shift */ +#define IXGBE_ADVTXD_MACLEN_SHIFT 9 /* Adv ctxt desc mac len shift */ +#define IXGBE_ADVTXD_MACLEN_MASK (0x7F << IXGBE_ADVTXD_MACLEN_SHIFT) /* Adv ctxt desc mac len mask */ +#define IXGBE_ADVTXD_VLAN_SHIFT 16 /* Adv ctxt vlan tag shift */ +#define IXGBE_ADVTXD_TUCMD_IPV4 0x00000400 /* IP Packet Type: 1=IPv4 */ +#define IXGBE_ADVTXD_TUCMD_IPV6 0x00000000 /* IP Packet Type: 0=IPv6 */ +#define IXGBE_ADVTXD_TUCMD_L4T_UDP 0x00000000 /* L4 Packet TYPE of UDP */ +#define IXGBE_ADVTXD_TUCMD_L4T_TCP 0x00000800 /* L4 Packet TYPE of TCP */ +#define IXGBE_ADVTXD_TUCMD_L4T_SCTP 0x00001000 /* L4 Packet TYPE of SCTP */ +#define IXGBE_ADVTXD_TUCMD_L4T_RSV 0x00001800 /* RSV L4 Packet TYPE */ +#define IXGBE_ADVTXD_TUCMD_MKRREQ 0x00002000 /* req Markers and CRC */ +#define IXGBE_ADVTXD_POPTS_IPSEC 0x00000400 /* IPSec offload request */ +#define IXGBE_ADVTXD_TUCMD_IPSEC_TYPE_ESP 0x00002000 /* IPSec Type ESP */ +#define IXGBE_ADVTXD_TUCMD_IPSEC_ENCRYPT_EN 0x00004000/* ESP Encrypt Enable */ +#define IXGBE_ADVTXT_TUCMD_FCOE 0x00008000 /* FCoE Frame Type */ +#define IXGBE_ADVTXD_FCOEF_EOF_MASK (0x3 << 10) /* FC EOF index */ +#define IXGBE_ADVTXD_FCOEF_SOF ((1 << 2) << 10) /* FC SOF index */ +#define IXGBE_ADVTXD_FCOEF_PARINC ((1 << 3) << 10) /* Rel_Off in F_CTL */ +#define IXGBE_ADVTXD_FCOEF_ORIE ((1 << 4) << 10) /* Orientation End */ +#define IXGBE_ADVTXD_FCOEF_ORIS ((1 << 5) << 10) /* Orientation Start */ +#define IXGBE_ADVTXD_FCOEF_EOF_N (0x0 << 10) /* 00: EOFn */ +#define IXGBE_ADVTXD_FCOEF_EOF_T (0x1 << 10) /* 01: EOFt */ +#define IXGBE_ADVTXD_FCOEF_EOF_NI (0x2 << 10) /* 10: EOFni */ +#define IXGBE_ADVTXD_FCOEF_EOF_A (0x3 << 10) /* 11: EOFa */ +#define IXGBE_ADVTXD_L4LEN_SHIFT 8 /* Adv ctxt L4LEN shift */ +#define IXGBE_ADVTXD_MSS_SHIFT 16 /* Adv ctxt MSS shift */ + +#define IXGBE_ADVTXD_OUTER_IPLEN 16 /* Adv ctxt OUTERIPLEN shift */ +#define IXGBE_ADVTXD_TUNNEL_LEN 24 /* Adv ctxt TUNNELLEN shift */ +#define IXGBE_ADVTXD_TUNNEL_TYPE_SHIFT 16 /* Adv Tx Desc Tunnel Type shift */ +#define IXGBE_ADVTXD_OUTERIPCS_SHIFT 17 /* Adv Tx Desc OUTERIPCS Shift */ +#define IXGBE_ADVTXD_TUNNEL_TYPE_NVGRE 1 /* Adv Tx Desc Tunnel Type NVGRE */ +/* Adv Tx Desc OUTERIPCS Shift for X550EM_a */ +#define IXGBE_ADVTXD_OUTERIPCS_SHIFT_X550EM_a 26 +/* Autonegotiation advertised speeds */ +typedef u32 ixgbe_autoneg_advertised; +/* Link speed */ +typedef u32 ixgbe_link_speed; +#define IXGBE_LINK_SPEED_UNKNOWN 0 +#define IXGBE_LINK_SPEED_10_FULL 0x0002 +#define IXGBE_LINK_SPEED_100_FULL 0x0008 +#define IXGBE_LINK_SPEED_1GB_FULL 0x0020 +#define IXGBE_LINK_SPEED_2_5GB_FULL 0x0400 +#define IXGBE_LINK_SPEED_5GB_FULL 0x0800 +#define IXGBE_LINK_SPEED_10GB_FULL 0x0080 +#define IXGBE_LINK_SPEED_82598_AUTONEG (IXGBE_LINK_SPEED_1GB_FULL | \ + IXGBE_LINK_SPEED_10GB_FULL) +#define IXGBE_LINK_SPEED_82599_AUTONEG (IXGBE_LINK_SPEED_100_FULL | \ + IXGBE_LINK_SPEED_1GB_FULL | \ + IXGBE_LINK_SPEED_10GB_FULL) + +/* Physical layer type */ +typedef u64 ixgbe_physical_layer; +#define IXGBE_PHYSICAL_LAYER_UNKNOWN 0 +#define IXGBE_PHYSICAL_LAYER_10GBASE_T 0x00001 +#define IXGBE_PHYSICAL_LAYER_1000BASE_T 0x00002 +#define IXGBE_PHYSICAL_LAYER_100BASE_TX 0x00004 +#define IXGBE_PHYSICAL_LAYER_SFP_PLUS_CU 0x00008 +#define IXGBE_PHYSICAL_LAYER_10GBASE_LR 0x00010 +#define IXGBE_PHYSICAL_LAYER_10GBASE_LRM 0x00020 +#define IXGBE_PHYSICAL_LAYER_10GBASE_SR 0x00040 +#define IXGBE_PHYSICAL_LAYER_10GBASE_KX4 0x00080 +#define IXGBE_PHYSICAL_LAYER_10GBASE_CX4 0x00100 +#define IXGBE_PHYSICAL_LAYER_1000BASE_KX 0x00200 +#define IXGBE_PHYSICAL_LAYER_1000BASE_BX 0x00400 +#define IXGBE_PHYSICAL_LAYER_10GBASE_KR 0x00800 +#define IXGBE_PHYSICAL_LAYER_10GBASE_XAUI 0x01000 +#define IXGBE_PHYSICAL_LAYER_SFP_ACTIVE_DA 0x02000 +#define IXGBE_PHYSICAL_LAYER_1000BASE_SX 0x04000 +#define IXGBE_PHYSICAL_LAYER_10BASE_T 0x08000 +#define IXGBE_PHYSICAL_LAYER_2500BASE_KX 0x10000 +#define IXGBE_PHYSICAL_LAYER_2500BASE_T 0x20000 +#define IXGBE_PHYSICAL_LAYER_5000BASE_T 0x40000 + +/* Flow Control Data Sheet defined values + * Calculation and defines taken from 802.1bb Annex O + */ + +/* BitTimes (BT) conversion */ +#define IXGBE_BT2KB(BT) ((BT + (8 * 1024 - 1)) / (8 * 1024)) +#define IXGBE_B2BT(BT) (BT * 8) + +/* Calculate Delay to respond to PFC */ +#define IXGBE_PFC_D 672 + +/* Calculate Cable Delay */ +#define IXGBE_CABLE_DC 5556 /* Delay Copper */ +#define IXGBE_CABLE_DO 5000 /* Delay Optical */ + +/* Calculate Interface Delay X540 */ +#define IXGBE_PHY_DC 25600 /* Delay 10G BASET */ +#define IXGBE_MAC_DC 8192 /* Delay Copper XAUI interface */ +#define IXGBE_XAUI_DC (2 * 2048) /* Delay Copper Phy */ + +#define IXGBE_ID_X540 (IXGBE_MAC_DC + IXGBE_XAUI_DC + IXGBE_PHY_DC) + +/* Calculate Interface Delay 82598, 82599 */ +#define IXGBE_PHY_D 12800 +#define IXGBE_MAC_D 4096 +#define IXGBE_XAUI_D (2 * 1024) + +#define IXGBE_ID (IXGBE_MAC_D + IXGBE_XAUI_D + IXGBE_PHY_D) + +/* Calculate Delay incurred from higher layer */ +#define IXGBE_HD 6144 + +/* Calculate PCI Bus delay for low thresholds */ +#define IXGBE_PCI_DELAY 10000 + +/* Calculate X540 delay value in bit times */ +#define IXGBE_DV_X540(_max_frame_link, _max_frame_tc) \ + ((36 * \ + (IXGBE_B2BT(_max_frame_link) + \ + IXGBE_PFC_D + \ + (2 * IXGBE_CABLE_DC) + \ + (2 * IXGBE_ID_X540) + \ + IXGBE_HD) / 25 + 1) + \ + 2 * IXGBE_B2BT(_max_frame_tc)) + +/* Calculate 82599, 82598 delay value in bit times */ +#define IXGBE_DV(_max_frame_link, _max_frame_tc) \ + ((36 * \ + (IXGBE_B2BT(_max_frame_link) + \ + IXGBE_PFC_D + \ + (2 * IXGBE_CABLE_DC) + \ + (2 * IXGBE_ID) + \ + IXGBE_HD) / 25 + 1) + \ + 2 * IXGBE_B2BT(_max_frame_tc)) + +/* Calculate low threshold delay values */ +#define IXGBE_LOW_DV_X540(_max_frame_tc) \ + (2 * IXGBE_B2BT(_max_frame_tc) + \ + (36 * IXGBE_PCI_DELAY / 25) + 1) +#define IXGBE_LOW_DV(_max_frame_tc) \ + (2 * IXGBE_LOW_DV_X540(_max_frame_tc)) + +/* Software ATR hash keys */ +#define IXGBE_ATR_BUCKET_HASH_KEY 0x3DAD14E2 +#define IXGBE_ATR_SIGNATURE_HASH_KEY 0x174D3614 + +/* Software ATR input stream values and masks */ +#define IXGBE_ATR_HASH_MASK 0x7fff +#define IXGBE_ATR_L4TYPE_MASK 0x3 +#define IXGBE_ATR_L4TYPE_UDP 0x1 +#define IXGBE_ATR_L4TYPE_TCP 0x2 +#define IXGBE_ATR_L4TYPE_SCTP 0x3 +#define IXGBE_ATR_L4TYPE_IPV6_MASK 0x4 +#define IXGBE_ATR_L4TYPE_TUNNEL_MASK 0x10 +enum ixgbe_atr_flow_type { + IXGBE_ATR_FLOW_TYPE_IPV4 = 0x0, + IXGBE_ATR_FLOW_TYPE_UDPV4 = 0x1, + IXGBE_ATR_FLOW_TYPE_TCPV4 = 0x2, + IXGBE_ATR_FLOW_TYPE_SCTPV4 = 0x3, + IXGBE_ATR_FLOW_TYPE_IPV6 = 0x4, + IXGBE_ATR_FLOW_TYPE_UDPV6 = 0x5, + IXGBE_ATR_FLOW_TYPE_TCPV6 = 0x6, + IXGBE_ATR_FLOW_TYPE_SCTPV6 = 0x7, + IXGBE_ATR_FLOW_TYPE_TUNNELED_IPV4 = 0x10, + IXGBE_ATR_FLOW_TYPE_TUNNELED_UDPV4 = 0x11, + IXGBE_ATR_FLOW_TYPE_TUNNELED_TCPV4 = 0x12, + IXGBE_ATR_FLOW_TYPE_TUNNELED_SCTPV4 = 0x13, + IXGBE_ATR_FLOW_TYPE_TUNNELED_IPV6 = 0x14, + IXGBE_ATR_FLOW_TYPE_TUNNELED_UDPV6 = 0x15, + IXGBE_ATR_FLOW_TYPE_TUNNELED_TCPV6 = 0x16, + IXGBE_ATR_FLOW_TYPE_TUNNELED_SCTPV6 = 0x17, +}; + +/* Flow Director ATR input struct. */ +union ixgbe_atr_input { + /* + * Byte layout in order, all values with MSB first: + * + * vm_pool - 1 byte + * flow_type - 1 byte + * vlan_id - 2 bytes + * src_ip - 16 bytes + * inner_mac - 6 bytes + * cloud_mode - 2 bytes + * tni_vni - 4 bytes + * dst_ip - 16 bytes + * src_port - 2 bytes + * dst_port - 2 bytes + * flex_bytes - 2 bytes + * bkt_hash - 2 bytes + */ + struct { + u8 vm_pool; + u8 flow_type; + __be16 vlan_id; + __be32 dst_ip[4]; + __be32 src_ip[4]; + u8 inner_mac[6]; + __be16 tunnel_type; + __be32 tni_vni; + __be16 src_port; + __be16 dst_port; + __be16 flex_bytes; + __be16 bkt_hash; + } formatted; + __be32 dword_stream[14]; +}; + +/* Flow Director compressed ATR hash input struct */ +union ixgbe_atr_hash_dword { + struct { + u8 vm_pool; + u8 flow_type; + __be16 vlan_id; + } formatted; + __be32 ip; + struct { + __be16 src; + __be16 dst; + } port; + __be16 flex_bytes; + __be32 dword; +}; + +#define IXGBE_MVALS_INIT(m) \ + IXGBE_CAT(EEC, m), \ + IXGBE_CAT(FLA, m), \ + IXGBE_CAT(GRC, m), \ + IXGBE_CAT(SRAMREL, m), \ + IXGBE_CAT(FACTPS, m), \ + IXGBE_CAT(SWSM, m), \ + IXGBE_CAT(SWFW_SYNC, m), \ + IXGBE_CAT(FWSM, m), \ + IXGBE_CAT(SDP0_GPIEN, m), \ + IXGBE_CAT(SDP1_GPIEN, m), \ + IXGBE_CAT(SDP2_GPIEN, m), \ + IXGBE_CAT(EICR_GPI_SDP0, m), \ + IXGBE_CAT(EICR_GPI_SDP1, m), \ + IXGBE_CAT(EICR_GPI_SDP2, m), \ + IXGBE_CAT(CIAA, m), \ + IXGBE_CAT(CIAD, m), \ + IXGBE_CAT(I2C_CLK_IN, m), \ + IXGBE_CAT(I2C_CLK_OUT, m), \ + IXGBE_CAT(I2C_DATA_IN, m), \ + IXGBE_CAT(I2C_DATA_OUT, m), \ + IXGBE_CAT(I2C_DATA_OE_N_EN, m), \ + IXGBE_CAT(I2C_BB_EN, m), \ + IXGBE_CAT(I2C_CLK_OE_N_EN, m), \ + IXGBE_CAT(I2CCTL, m) + +enum ixgbe_mvals { + IXGBE_MVALS_INIT(_IDX), + IXGBE_MVALS_IDX_LIMIT +}; + +/* + * Unavailable: The FCoE Boot Option ROM is not present in the flash. + * Disabled: Present; boot order is not set for any targets on the port. + * Enabled: Present; boot order is set for at least one target on the port. + */ +enum ixgbe_fcoe_boot_status { + ixgbe_fcoe_bootstatus_disabled = 0, + ixgbe_fcoe_bootstatus_enabled = 1, + ixgbe_fcoe_bootstatus_unavailable = 0xFFFF +}; + +enum ixgbe_eeprom_type { + ixgbe_eeprom_uninitialized = 0, + ixgbe_eeprom_spi, + ixgbe_flash, + ixgbe_eeprom_none /* No NVM support */ +}; + +enum ixgbe_mac_type { + ixgbe_mac_unknown = 0, + ixgbe_mac_82598EB, + ixgbe_mac_82599EB, + ixgbe_mac_X540, + ixgbe_mac_X550, + ixgbe_mac_X550EM_x, + ixgbe_mac_X550EM_a, + ixgbe_mac_E610, + ixgbe_num_macs +}; + +enum ixgbe_phy_type { + ixgbe_phy_unknown = 0, + ixgbe_phy_none, + ixgbe_phy_tn, + ixgbe_phy_aq, + ixgbe_phy_x550em_kr, + ixgbe_phy_x550em_kx4, + ixgbe_phy_x550em_xfi, + ixgbe_phy_x550em_ext_t, + ixgbe_phy_ext_1g_t, + ixgbe_phy_cu_unknown, + ixgbe_phy_qt, + ixgbe_phy_xaui, + ixgbe_phy_nl, + ixgbe_phy_sfp_passive_tyco, + ixgbe_phy_sfp_passive_unknown, + ixgbe_phy_sfp_active_unknown, + ixgbe_phy_sfp_avago, + ixgbe_phy_sfp_ftl, + ixgbe_phy_sfp_ftl_active, + ixgbe_phy_sfp_unknown, + ixgbe_phy_sfp_intel, + ixgbe_phy_qsfp_passive_unknown, + ixgbe_phy_qsfp_active_unknown, + ixgbe_phy_qsfp_intel, + ixgbe_phy_qsfp_unknown, + ixgbe_phy_sfp_unsupported, /*Enforce bit set with unsupported module*/ + ixgbe_phy_sgmii, + ixgbe_phy_fw, + ixgbe_phy_generic +}; + +/* + * SFP+ module type IDs: + * + * ID Module Type + * ============= + * 0 SFP_DA_CU + * 1 SFP_SR + * 2 SFP_LR + * 3 SFP_DA_CU_CORE0 - 82599-specific + * 4 SFP_DA_CU_CORE1 - 82599-specific + * 5 SFP_SR/LR_CORE0 - 82599-specific + * 6 SFP_SR/LR_CORE1 - 82599-specific + */ +enum ixgbe_sfp_type { + ixgbe_sfp_type_da_cu = 0, + ixgbe_sfp_type_sr = 1, + ixgbe_sfp_type_lr = 2, + ixgbe_sfp_type_da_cu_core0 = 3, + ixgbe_sfp_type_da_cu_core1 = 4, + ixgbe_sfp_type_srlr_core0 = 5, + ixgbe_sfp_type_srlr_core1 = 6, + ixgbe_sfp_type_da_act_lmt_core0 = 7, + ixgbe_sfp_type_da_act_lmt_core1 = 8, + ixgbe_sfp_type_1g_cu_core0 = 9, + ixgbe_sfp_type_1g_cu_core1 = 10, + ixgbe_sfp_type_1g_sx_core0 = 11, + ixgbe_sfp_type_1g_sx_core1 = 12, + ixgbe_sfp_type_1g_lx_core0 = 13, + ixgbe_sfp_type_1g_lx_core1 = 14, + ixgbe_sfp_type_not_present = 0xFFFE, + ixgbe_sfp_type_unknown = 0xFFFF +}; + +enum ixgbe_media_type { + ixgbe_media_type_unknown = 0, + ixgbe_media_type_fiber, + ixgbe_media_type_fiber_qsfp, + ixgbe_media_type_copper, + ixgbe_media_type_backplane, + ixgbe_media_type_cx4, + ixgbe_media_type_virtual, + ixgbe_media_type_da, + ixgbe_media_type_aui +}; + +/* Flow Control Settings */ +enum ixgbe_fc_mode { + ixgbe_fc_none = 0, + ixgbe_fc_rx_pause, + ixgbe_fc_tx_pause, + ixgbe_fc_full, + ixgbe_fc_pfc, + ixgbe_fc_default +}; + +/* Smart Speed Settings */ +#define IXGBE_SMARTSPEED_MAX_RETRIES 3 +enum ixgbe_smart_speed { + ixgbe_smart_speed_auto = 0, + ixgbe_smart_speed_on, + ixgbe_smart_speed_off +}; + +/* PCI bus types */ +enum ixgbe_bus_type { + ixgbe_bus_type_unknown = 0, + ixgbe_bus_type_pci, + ixgbe_bus_type_pcix, + ixgbe_bus_type_pci_express, + ixgbe_bus_type_internal, + ixgbe_bus_type_reserved +}; + +/* PCI bus speeds */ +enum ixgbe_bus_speed { + ixgbe_bus_speed_unknown = 0, + ixgbe_bus_speed_33 = 33, + ixgbe_bus_speed_66 = 66, + ixgbe_bus_speed_100 = 100, + ixgbe_bus_speed_120 = 120, + ixgbe_bus_speed_133 = 133, + ixgbe_bus_speed_2500 = 2500, + ixgbe_bus_speed_5000 = 5000, + ixgbe_bus_speed_8000 = 8000, + ixgbe_bus_speed_16000 = 16000, + ixgbe_bus_speed_reserved +}; + +/* PCI bus widths */ +enum ixgbe_bus_width { + ixgbe_bus_width_unknown = 0, + ixgbe_bus_width_pcie_x1 = 1, + ixgbe_bus_width_pcie_x2 = 2, + ixgbe_bus_width_pcie_x4 = 4, + ixgbe_bus_width_pcie_x8 = 8, + ixgbe_bus_width_32 = 32, + ixgbe_bus_width_64 = 64, + ixgbe_bus_width_reserved +}; + +struct ixgbe_addr_filter_info { + u32 num_mc_addrs; + u32 rar_used_count; + u32 mta_in_use; + u32 overflow_promisc; + bool user_set_promisc; +}; + +/* Bus parameters */ +struct ixgbe_bus_info { + enum ixgbe_bus_speed speed; + enum ixgbe_bus_width width; + enum ixgbe_bus_type type; + + u16 func; + u8 lan_id; + u16 instance_id; +}; + +/* Flow control parameters */ +struct ixgbe_fc_info { + u32 high_water[IXGBE_DCB_MAX_TRAFFIC_CLASS]; /* Flow Ctrl High-water */ + u32 low_water[IXGBE_DCB_MAX_TRAFFIC_CLASS]; /* Flow Ctrl Low-water */ + u16 pause_time; /* Flow Control Pause timer */ + bool send_xon; /* Flow control send XON */ + bool strict_ieee; /* Strict IEEE mode */ + bool disable_fc_autoneg; /* Do not autonegotiate FC */ + bool fc_was_autonegged; /* Is current_mode the result of autonegging? */ + enum ixgbe_fc_mode current_mode; /* FC mode in effect */ + enum ixgbe_fc_mode requested_mode; /* FC mode requested by caller */ +}; + +/* Statistics counters collected by the MAC */ +struct ixgbe_hw_stats { + u64 crcerrs; + u64 illerrc; + u64 errbc; + u64 mspdc; + u64 mpctotal; + u64 mpc[8]; + u64 mlfc; + u64 mrfc; + u64 rlec; + u64 tlpic; + u64 rlpic; + u64 lxontxc; + u64 lxonrxc; + u64 lxofftxc; + u64 lxoffrxc; + u64 pxontxc[8]; + u64 pxonrxc[8]; + u64 pxofftxc[8]; + u64 pxoffrxc[8]; + u64 prc64; + u64 prc127; + u64 prc255; + u64 prc511; + u64 prc1023; + u64 prc1522; + u64 gprc; + u64 bprc; + u64 mprc; + u64 gptc; + u64 gorc; + u64 gotc; + u64 rnbc[8]; + u64 ruc; + u64 rfc; + u64 roc; + u64 rjc; + u64 mngprc; + u64 mngpdc; + u64 mngptc; + u64 tor; + u64 tpr; + u64 tpt; + u64 ptc64; + u64 ptc127; + u64 ptc255; + u64 ptc511; + u64 ptc1023; + u64 ptc1522; + u64 mptc; + u64 bptc; + u64 xec; + u64 qprc[16]; + u64 qptc[16]; + u64 qbrc[16]; + u64 qbtc[16]; + u64 qprdc[16]; + u64 pxon2offc[8]; + u64 fdirustat_add; + u64 fdirustat_remove; + u64 fdirfstat_fadd; + u64 fdirfstat_fremove; + u64 fdirmatch; + u64 fdirmiss; + u64 fccrc; + u64 fclast; + u64 fcoerpdc; + u64 fcoeprc; + u64 fcoeptc; + u64 fcoedwrc; + u64 fcoedwtc; + u64 fcoe_noddp; + u64 fcoe_noddp_ext_buff; + u64 ldpcec; + u64 pcrc8ec; + u64 b2ospc; + u64 b2ogprc; + u64 o2bgptc; + u64 o2bspc; +}; + +/* NVM Update commands */ +#define IXGBE_NVMUPD_CMD_REG_READ 0x0000000B +#define IXGBE_NVMUPD_CMD_REG_WRITE 0x0000000C + +/* NVM Update features API */ +#define IXGBE_NVMUPD_FEATURES_API_VER_MAJOR 0 +#define IXGBE_NVMUPD_FEATURES_API_VER_MINOR 0 +#define IXGBE_NVMUPD_FEATURES_API_FEATURES_ARRAY_LEN 12 +#define IXGBE_NVMUPD_EXEC_FEATURES 0xe +#define IXGBE_NVMUPD_FEATURE_FLAT_NVM_SUPPORT BIT(0) +#define IXGBE_NVMUPD_FEATURE_REGISTER_ACCESS_SUPPORT BIT(1) + +#define IXGBE_NVMUPD_MOD_PNT_MASK 0xFF + +struct ixgbe_nvm_access { + u32 command; + u32 config; + u32 offset; /* in bytes */ + u32 data_size; /* in bytes */ + u8 data[1]; +}; + +struct ixgbe_nvm_features { + u8 major; + u8 minor; + u16 size; + u8 features[IXGBE_NVMUPD_FEATURES_API_FEATURES_ARRAY_LEN]; +}; + +/* forward declaration */ +struct ixgbe_hw; + +/* iterator type for walking multicast address lists */ +typedef u8* (*ixgbe_mc_addr_itr) (struct ixgbe_hw *hw, u8 **mc_addr_ptr, + u32 *vmdq); + +/* Function pointer table */ +struct ixgbe_eeprom_operations { + s32 (*init_params)(struct ixgbe_hw *); + s32 (*read)(struct ixgbe_hw *, u16, u16 *); + s32 (*read_buffer)(struct ixgbe_hw *, u16, u16, u16 *); + s32 (*write)(struct ixgbe_hw *, u16, u16); + s32 (*write_buffer)(struct ixgbe_hw *, u16, u16, u16 *); + s32 (*validate_checksum)(struct ixgbe_hw *, u16 *); + s32 (*update_checksum)(struct ixgbe_hw *); + s32 (*calc_checksum)(struct ixgbe_hw *); + s32 (*read_pba_string)(struct ixgbe_hw *, u8 *, u32); +}; + +struct ixgbe_mac_operations { + s32 (*init_hw)(struct ixgbe_hw *); + s32 (*reset_hw)(struct ixgbe_hw *); + s32 (*start_hw)(struct ixgbe_hw *); + s32 (*clear_hw_cntrs)(struct ixgbe_hw *); + enum ixgbe_media_type (*get_media_type)(struct ixgbe_hw *); + u64 (*get_supported_physical_layer)(struct ixgbe_hw *); + s32 (*get_mac_addr)(struct ixgbe_hw *, u8 *); + s32 (*get_san_mac_addr)(struct ixgbe_hw *, u8 *); + s32 (*set_san_mac_addr)(struct ixgbe_hw *, u8 *); + s32 (*get_device_caps)(struct ixgbe_hw *, u16 *); + s32 (*get_wwn_prefix)(struct ixgbe_hw *, u16 *, u16 *); + s32 (*get_fcoe_boot_status)(struct ixgbe_hw *, u16 *); + s32 (*stop_adapter)(struct ixgbe_hw *); + s32 (*get_bus_info)(struct ixgbe_hw *); + void (*set_lan_id)(struct ixgbe_hw *); + s32 (*read_analog_reg8)(struct ixgbe_hw*, u32, u8*); + s32 (*write_analog_reg8)(struct ixgbe_hw*, u32, u8); + s32 (*setup_sfp)(struct ixgbe_hw *); + s32 (*enable_rx_dma)(struct ixgbe_hw *, u32); + s32 (*disable_sec_rx_path)(struct ixgbe_hw *); + s32 (*enable_sec_rx_path)(struct ixgbe_hw *); + s32 (*acquire_swfw_sync)(struct ixgbe_hw *, u32); + void (*release_swfw_sync)(struct ixgbe_hw *, u32); + void (*init_swfw_sync)(struct ixgbe_hw *); + s32 (*prot_autoc_read)(struct ixgbe_hw *, bool *, u32 *); + s32 (*prot_autoc_write)(struct ixgbe_hw *, u32, bool); + + /* Link */ + void (*disable_tx_laser)(struct ixgbe_hw *); + void (*enable_tx_laser)(struct ixgbe_hw *); + void (*flap_tx_laser)(struct ixgbe_hw *); + s32 (*setup_link)(struct ixgbe_hw *, ixgbe_link_speed, bool); + s32 (*setup_mac_link)(struct ixgbe_hw *, ixgbe_link_speed, bool); + s32 (*check_link)(struct ixgbe_hw *, ixgbe_link_speed *, bool *, bool); + s32 (*get_link_capabilities)(struct ixgbe_hw *, ixgbe_link_speed *, + bool *); + void (*set_rate_select_speed)(struct ixgbe_hw *, ixgbe_link_speed); + + /* Packet Buffer manipulation */ + void (*setup_rxpba)(struct ixgbe_hw *, int, u32, int); + + /* LED */ + s32 (*led_on)(struct ixgbe_hw *, u32); + s32 (*led_off)(struct ixgbe_hw *, u32); + s32 (*blink_led_start)(struct ixgbe_hw *, u32); + s32 (*blink_led_stop)(struct ixgbe_hw *, u32); + s32 (*init_led_link_act)(struct ixgbe_hw *); + + /* RAR, Multicast, VLAN */ + s32 (*set_rar)(struct ixgbe_hw *, u32, u8 *, u32, u32); + s32 (*set_uc_addr)(struct ixgbe_hw *, u32, u8 *); + s32 (*clear_rar)(struct ixgbe_hw *, u32); + s32 (*insert_mac_addr)(struct ixgbe_hw *, u8 *, u32); + s32 (*set_vmdq)(struct ixgbe_hw *, u32, u32); + s32 (*set_vmdq_san_mac)(struct ixgbe_hw *, u32); + s32 (*clear_vmdq)(struct ixgbe_hw *, u32, u32); + s32 (*init_rx_addrs)(struct ixgbe_hw *); + s32 (*update_uc_addr_list)(struct ixgbe_hw *, u8 *, u32, + ixgbe_mc_addr_itr); + s32 (*update_mc_addr_list)(struct ixgbe_hw *, u8 *, u32, + ixgbe_mc_addr_itr, bool clear); + s32 (*enable_mc)(struct ixgbe_hw *); + s32 (*disable_mc)(struct ixgbe_hw *); + s32 (*clear_vfta)(struct ixgbe_hw *); + s32 (*set_vfta)(struct ixgbe_hw *, u32, u32, bool, bool); + s32 (*set_vlvf)(struct ixgbe_hw *, u32, u32, bool, u32 *, u32, + bool); + s32 (*init_uta_tables)(struct ixgbe_hw *); + void (*set_mac_anti_spoofing)(struct ixgbe_hw *, bool, int); + void (*set_vlan_anti_spoofing)(struct ixgbe_hw *, bool, int); + s32 (*toggle_txdctl)(struct ixgbe_hw *hw, u32 vf_index); + + /* Flow Control */ + s32 (*fc_enable)(struct ixgbe_hw *); + s32 (*setup_fc)(struct ixgbe_hw *); + void (*fc_autoneg)(struct ixgbe_hw *); + + /* Manageability interface */ + s32 (*set_fw_drv_ver)(struct ixgbe_hw *, u8, u8, u8, u8, u16, + const char *); + s32 (*get_thermal_sensor_data)(struct ixgbe_hw *); + s32 (*init_thermal_sensor_thresh)(struct ixgbe_hw *hw); + void (*get_rtrup2tc)(struct ixgbe_hw *hw, u8 *map); + void (*disable_rx)(struct ixgbe_hw *hw); + void (*enable_rx)(struct ixgbe_hw *hw); + void (*set_source_address_pruning)(struct ixgbe_hw *, bool, + unsigned int); + void (*set_ethertype_anti_spoofing)(struct ixgbe_hw *, bool, int); + s32 (*dmac_update_tcs)(struct ixgbe_hw *hw); + s32 (*dmac_config_tcs)(struct ixgbe_hw *hw); + s32 (*dmac_config)(struct ixgbe_hw *hw); + s32 (*setup_eee)(struct ixgbe_hw *hw, bool enable_eee); + s32 (*read_iosf_sb_reg)(struct ixgbe_hw *, u32, u32, u32 *); + s32 (*write_iosf_sb_reg)(struct ixgbe_hw *, u32, u32, u32); + void (*disable_mdd)(struct ixgbe_hw *hw); + void (*enable_mdd)(struct ixgbe_hw *hw); + void (*mdd_event)(struct ixgbe_hw *hw, u32 *vf_bitmap); + void (*restore_mdd_vf)(struct ixgbe_hw *hw, u32 vf); + bool (*fw_recovery_mode)(struct ixgbe_hw *hw); + bool (*fw_rollback_mode)(struct ixgbe_hw *hw); + bool (*get_fw_tsam_mode)(struct ixgbe_hw *hw); + s32 (*get_fw_version)(struct ixgbe_hw *hw); + s32 (*get_nvm_version)(struct ixgbe_hw *hw, struct ixgbe_nvm_info *nvm); +}; + +struct ixgbe_phy_operations { + s32 (*identify)(struct ixgbe_hw *); + s32 (*identify_sfp)(struct ixgbe_hw *); + s32 (*init)(struct ixgbe_hw *); + s32 (*reset)(struct ixgbe_hw *); + s32 (*read_reg)(struct ixgbe_hw *, u32, u32, u16 *); + s32 (*write_reg)(struct ixgbe_hw *, u32, u32, u16); + s32 (*read_reg_mdi)(struct ixgbe_hw *, u32, u32, u16 *); + s32 (*write_reg_mdi)(struct ixgbe_hw *, u32, u32, u16); + s32 (*setup_link)(struct ixgbe_hw *); + s32 (*setup_internal_link)(struct ixgbe_hw *); + s32 (*setup_link_speed)(struct ixgbe_hw *, ixgbe_link_speed, bool); + s32 (*check_link)(struct ixgbe_hw *, ixgbe_link_speed *, bool *); + s32 (*get_firmware_version)(struct ixgbe_hw *, u16 *); + s32 (*read_i2c_byte)(struct ixgbe_hw *, u8, u8, u8 *); + s32 (*write_i2c_byte)(struct ixgbe_hw *, u8, u8, u8); + s32 (*read_i2c_sff8472)(struct ixgbe_hw *, u8 , u8 *); + s32 (*read_i2c_eeprom)(struct ixgbe_hw *, u8 , u8 *); + s32 (*write_i2c_eeprom)(struct ixgbe_hw *, u8, u8); + void (*i2c_bus_clear)(struct ixgbe_hw *); + s32 (*check_overtemp)(struct ixgbe_hw *); + s32 (*set_phy_power)(struct ixgbe_hw *, bool on); + s32 (*enter_lplu)(struct ixgbe_hw *); + s32 (*handle_lasi)(struct ixgbe_hw *hw); + s32 (*read_i2c_byte_unlocked)(struct ixgbe_hw *, u8 offset, u8 addr, + u8 *value); + s32 (*write_i2c_byte_unlocked)(struct ixgbe_hw *, u8 offset, u8 addr, + u8 value); +}; + +struct ixgbe_link_operations { + s32 (*read_link)(struct ixgbe_hw *, u8 addr, u16 reg, u16 *val); + s32 (*read_link_unlocked)(struct ixgbe_hw *, u8 addr, u16 reg, + u16 *val); + s32 (*write_link)(struct ixgbe_hw *, u8 addr, u16 reg, u16 val); + s32 (*write_link_unlocked)(struct ixgbe_hw *, u8 addr, u16 reg, + u16 val); +}; + +struct ixgbe_link_info { + struct ixgbe_link_operations ops; + u8 addr; + struct ixgbe_link_status link_info; + struct ixgbe_link_status link_info_old; + u8 get_link_info; +}; + +struct ixgbe_eeprom_info { + struct ixgbe_eeprom_operations ops; + enum ixgbe_eeprom_type type; + u32 semaphore_delay; + u32 word_size; + u16 address_bits; + u16 word_page_size; + u16 ctrl_word_3; +}; + +#define IXGBE_FLAGS_DOUBLE_RESET_REQUIRED 0x01 +struct ixgbe_mac_info { + struct ixgbe_mac_operations ops; + enum ixgbe_mac_type type; + u8 addr[IXGBE_ETH_LENGTH_OF_ADDRESS]; + u8 perm_addr[IXGBE_ETH_LENGTH_OF_ADDRESS]; + u8 san_addr[IXGBE_ETH_LENGTH_OF_ADDRESS]; + /* prefix for World Wide Node Name (WWNN) */ + u16 wwnn_prefix; + /* prefix for World Wide Port Name (WWPN) */ + u16 wwpn_prefix; +#define IXGBE_MAX_MTA 128 + u32 mta_shadow[IXGBE_MAX_MTA]; + s32 mc_filter_type; + u32 mcft_size; + u32 vft_size; + u32 num_rar_entries; + u32 rar_highwater; + u32 rx_pb_size; + u32 max_tx_queues; + u32 max_rx_queues; + u32 orig_autoc; + u8 san_mac_rar_index; + bool get_link_status; + u32 orig_autoc2; + u16 max_msix_vectors; + bool arc_subsystem_valid; + bool orig_link_settings_stored; + bool autotry_restart; + u8 flags; + struct ixgbe_thermal_sensor_data thermal_sensor_data; + bool thermal_sensor_enabled; + struct ixgbe_dmac_config dmac_config; + bool set_lben; + u32 max_link_up_time; + u8 led_link_act; +}; + +struct ixgbe_phy_info { + struct ixgbe_phy_operations ops; + enum ixgbe_phy_type type; + u32 addr; + u32 id; + enum ixgbe_sfp_type sfp_type; + bool sfp_setup_needed; + u32 revision; + enum ixgbe_media_type media_type; + u32 phy_semaphore_mask; + bool reset_disable; + ixgbe_autoneg_advertised autoneg_advertised; + ixgbe_link_speed speeds_supported; + ixgbe_link_speed eee_speeds_supported; + ixgbe_link_speed eee_speeds_advertised; + enum ixgbe_smart_speed smart_speed; + bool smart_speed_active; + bool multispeed_fiber; + bool reset_if_overtemp; + bool qsfp_shared_i2c_bus; + u32 nw_mng_if_sel; + u64 phy_type_low; + u64 phy_type_high; + struct ixgbe_aci_cmd_set_phy_cfg_data curr_user_phy_cfg; +}; + +#include "ixgbe_mbx.h" + +struct ixgbe_hw { + u8 IOMEM *hw_addr; + void *back; + struct ixgbe_mac_info mac; + struct ixgbe_addr_filter_info addr_ctrl; + struct ixgbe_fc_info fc; + struct ixgbe_phy_info phy; + struct ixgbe_link_info link; + struct ixgbe_eeprom_info eeprom; + struct ixgbe_bus_info bus; + struct ixgbe_mbx_info mbx; + const u32 *mvals; + u16 device_id; + u16 vendor_id; + u16 subsystem_device_id; + u16 subsystem_vendor_id; + u8 revision_id; + bool adapter_stopped; + int api_version; + bool force_full_reset; + bool allow_unsupported_sfp; + bool wol_enabled; + bool need_crosstalk_fix; + /* NVM Update features */ + struct ixgbe_nvm_features nvmupd_features; + u32 fw_rst_cnt; + u8 api_branch; + u8 api_maj_ver; + u8 api_min_ver; + u8 api_patch; + u8 fw_branch; + u8 fw_maj_ver; + u8 fw_min_ver; + u8 fw_patch; + u32 fw_build; + struct ixgbe_aci_info aci; + struct ixgbe_flash_info flash; + struct ixgbe_hw_dev_caps dev_caps; + struct ixgbe_hw_func_caps func_caps; + struct ixgbe_fwlog_cfg fwlog_cfg; + bool fwlog_support_ena; + struct ixgbe_fwlog_ring fwlog_ring; +}; + +#define ixgbe_call_func(hw, func, params, error) \ + (func != NULL) ? func params : error + +/* Error Codes */ +#define IXGBE_SUCCESS 0 +#define IXGBE_ERR_EEPROM -1 +#define IXGBE_ERR_EEPROM_CHECKSUM -2 +#define IXGBE_ERR_PHY -3 +#define IXGBE_ERR_CONFIG -4 +#define IXGBE_ERR_PARAM -5 +#define IXGBE_ERR_MAC_TYPE -6 +#define IXGBE_ERR_UNKNOWN_PHY -7 +#define IXGBE_ERR_LINK_SETUP -8 +#define IXGBE_ERR_ADAPTER_STOPPED -9 +#define IXGBE_ERR_INVALID_MAC_ADDR -10 +#define IXGBE_ERR_DEVICE_NOT_SUPPORTED -11 +#define IXGBE_ERR_PRIMARY_REQUESTS_PENDING -12 +#define IXGBE_ERR_INVALID_LINK_SETTINGS -13 +#define IXGBE_ERR_AUTONEG_NOT_COMPLETE -14 +#define IXGBE_ERR_RESET_FAILED -15 +#define IXGBE_ERR_SWFW_SYNC -16 +#define IXGBE_ERR_PHY_ADDR_INVALID -17 +#define IXGBE_ERR_I2C -18 +#define IXGBE_ERR_SFP_NOT_SUPPORTED -19 +#define IXGBE_ERR_SFP_NOT_PRESENT -20 +#define IXGBE_ERR_SFP_NO_INIT_SEQ_PRESENT -21 +#define IXGBE_ERR_NO_SAN_ADDR_PTR -22 +#define IXGBE_ERR_FDIR_REINIT_FAILED -23 +#define IXGBE_ERR_EEPROM_VERSION -24 +#define IXGBE_ERR_NO_SPACE -25 +#define IXGBE_ERR_OVERTEMP -26 +#define IXGBE_ERR_FC_NOT_NEGOTIATED -27 +#define IXGBE_ERR_FC_NOT_SUPPORTED -28 +#define IXGBE_ERR_SFP_SETUP_NOT_COMPLETE -30 +#define IXGBE_ERR_PBA_SECTION -31 +#define IXGBE_ERR_INVALID_ARGUMENT -32 +#define IXGBE_ERR_HOST_INTERFACE_COMMAND -33 +#define IXGBE_ERR_OUT_OF_MEM -34 +#define IXGBE_ERR_FEATURE_NOT_SUPPORTED -36 +#define IXGBE_ERR_EEPROM_PROTECTED_REGION -37 +#define IXGBE_ERR_FDIR_CMD_INCOMPLETE -38 +#define IXGBE_ERR_FW_RESP_INVALID -39 +#define IXGBE_ERR_TOKEN_RETRY -40 +#define IXGBE_ERR_MBX -41 +#define IXGBE_ERR_MBX_NOMSG -42 +#define IXGBE_ERR_TIMEOUT -43 +#define IXGBE_ERR_NOT_SUPPORTED -45 +#define IXGBE_ERR_OUT_OF_RANGE -46 + +#define IXGBE_ERR_NVM -50 +#define IXGBE_ERR_NVM_CHECKSUM -51 +#define IXGBE_ERR_BUF_TOO_SHORT -52 +#define IXGBE_ERR_NVM_BLANK_MODE -53 +#define IXGBE_ERR_INVAL_SIZE -54 +#define IXGBE_ERR_DOES_NOT_EXIST -55 + +#define IXGBE_ERR_ACI_ERROR -100 +#define IXGBE_ERR_ACI_DISABLED -101 +#define IXGBE_ERR_ACI_TIMEOUT -102 +#define IXGBE_ERR_ACI_BUSY -103 +#define IXGBE_ERR_ACI_NO_WORK -104 +#define IXGBE_ERR_ACI_NO_EVENTS -105 +#define IXGBE_ERR_FW_API_VER -106 +#define IXGBE_NOT_IMPLEMENTED 0x7FFFFFFF + +#define IXGBE_FUSES0_GROUP(_i) (0x11158 + ((_i) * 4)) +#define IXGBE_FUSES0_300MHZ (1 << 5) +#define IXGBE_FUSES0_REV_MASK (3 << 6) + +#define IXGBE_KRM_PORT_CAR_GEN_CTRL(P) ((P) ? 0x8010 : 0x4010) +#define IXGBE_KRM_LINK_S1(P) ((P) ? 0x8200 : 0x4200) +#define IXGBE_KRM_LINK_CTRL_1(P) ((P) ? 0x820C : 0x420C) +#define IXGBE_KRM_AN_CNTL_1(P) ((P) ? 0x822C : 0x422C) +#define IXGBE_KRM_AN_CNTL_4(P) ((P) ? 0x8238 : 0x4238) +#define IXGBE_KRM_AN_CNTL_8(P) ((P) ? 0x8248 : 0x4248) +#define IXGBE_KRM_PCS_KX_AN(P) ((P) ? 0x9918 : 0x5918) +#define IXGBE_KRM_PCS_KX_AN_LP(P) ((P) ? 0x991C : 0x591C) +#define IXGBE_KRM_SGMII_CTRL(P) ((P) ? 0x82A0 : 0x42A0) +#define IXGBE_KRM_LP_BASE_PAGE_HIGH(P) ((P) ? 0x836C : 0x436C) +#define IXGBE_KRM_DSP_TXFFE_STATE_4(P) ((P) ? 0x8634 : 0x4634) +#define IXGBE_KRM_DSP_TXFFE_STATE_5(P) ((P) ? 0x8638 : 0x4638) +#define IXGBE_KRM_RX_TRN_LINKUP_CTRL(P) ((P) ? 0x8B00 : 0x4B00) +#define IXGBE_KRM_PMD_DFX_BURNIN(P) ((P) ? 0x8E00 : 0x4E00) +#define IXGBE_KRM_PMD_FLX_MASK_ST20(P) ((P) ? 0x9054 : 0x5054) +#define IXGBE_KRM_TX_COEFF_CTRL_1(P) ((P) ? 0x9520 : 0x5520) +#define IXGBE_KRM_RX_ANA_CTL(P) ((P) ? 0x9A00 : 0x5A00) + +#define IXGBE_KRM_PMD_FLX_MASK_ST20_SFI_10G_DA ~(0x3 << 20) +#define IXGBE_KRM_PMD_FLX_MASK_ST20_SFI_10G_SR (1u << 20) +#define IXGBE_KRM_PMD_FLX_MASK_ST20_SFI_10G_LR (0x2 << 20) +#define IXGBE_KRM_PMD_FLX_MASK_ST20_SGMII_EN (1u << 25) +#define IXGBE_KRM_PMD_FLX_MASK_ST20_AN37_EN (1u << 26) +#define IXGBE_KRM_PMD_FLX_MASK_ST20_AN_EN (1u << 27) +#define IXGBE_KRM_PMD_FLX_MASK_ST20_SPEED_10M ~(0x7 << 28) +#define IXGBE_KRM_PMD_FLX_MASK_ST20_SPEED_100M (1u << 28) +#define IXGBE_KRM_PMD_FLX_MASK_ST20_SPEED_1G (0x2 << 28) +#define IXGBE_KRM_PMD_FLX_MASK_ST20_SPEED_10G (0x3 << 28) +#define IXGBE_KRM_PMD_FLX_MASK_ST20_SPEED_AN (0x4 << 28) +#define IXGBE_KRM_PMD_FLX_MASK_ST20_SPEED_2_5G (0x7 << 28) +#define IXGBE_KRM_PMD_FLX_MASK_ST20_SPEED_MASK (0x7 << 28) +#define IXGBE_KRM_PMD_FLX_MASK_ST20_FW_AN_RESTART (1u << 31) + +#define IXGBE_KRM_PORT_CAR_GEN_CTRL_NELB_32B (1 << 9) +#define IXGBE_KRM_PORT_CAR_GEN_CTRL_NELB_KRPCS (1 << 11) + +#define IXGBE_KRM_LINK_CTRL_1_TETH_FORCE_SPEED_MASK (0x7 << 8) +#define IXGBE_KRM_LINK_CTRL_1_TETH_FORCE_SPEED_1G (2 << 8) +#define IXGBE_KRM_LINK_CTRL_1_TETH_FORCE_SPEED_10G (4 << 8) +#define IXGBE_KRM_LINK_CTRL_1_TETH_AN_SGMII_EN (1 << 12) +#define IXGBE_KRM_LINK_CTRL_1_TETH_AN_CLAUSE_37_EN (1 << 13) +#define IXGBE_KRM_LINK_CTRL_1_TETH_AN_FEC_REQ (1 << 14) +#define IXGBE_KRM_LINK_CTRL_1_TETH_AN_CAP_FEC (1 << 15) +#define IXGBE_KRM_LINK_CTRL_1_TETH_AN_CAP_KX (1 << 16) +#define IXGBE_KRM_LINK_CTRL_1_TETH_AN_CAP_KR (1 << 18) +#define IXGBE_KRM_LINK_CTRL_1_TETH_EEE_CAP_KX (1 << 24) +#define IXGBE_KRM_LINK_CTRL_1_TETH_EEE_CAP_KR (1 << 26) +#define IXGBE_KRM_LINK_S1_MAC_AN_COMPLETE (1 << 28) +#define IXGBE_KRM_LINK_CTRL_1_TETH_AN_ENABLE (1 << 29) +#define IXGBE_KRM_LINK_CTRL_1_TETH_AN_RESTART (1 << 31) + +#define IXGBE_KRM_AN_CNTL_1_SYM_PAUSE (1 << 28) +#define IXGBE_KRM_AN_CNTL_1_ASM_PAUSE (1 << 29) +#define IXGBE_KRM_PCS_KX_AN_SYM_PAUSE (1 << 1) +#define IXGBE_KRM_PCS_KX_AN_ASM_PAUSE (1 << 2) +#define IXGBE_KRM_PCS_KX_AN_LP_SYM_PAUSE (1 << 2) +#define IXGBE_KRM_PCS_KX_AN_LP_ASM_PAUSE (1 << 3) +#define IXGBE_KRM_AN_CNTL_4_ECSR_AN37_OVER_73 (1 << 29) +#define IXGBE_KRM_AN_CNTL_8_LINEAR (1 << 0) +#define IXGBE_KRM_AN_CNTL_8_LIMITING (1 << 1) + +#define IXGBE_KRM_LP_BASE_PAGE_HIGH_SYM_PAUSE (1 << 10) +#define IXGBE_KRM_LP_BASE_PAGE_HIGH_ASM_PAUSE (1 << 11) + +#define IXGBE_KRM_SGMII_CTRL_MAC_TAR_FORCE_100_D (1 << 12) +#define IXGBE_KRM_SGMII_CTRL_MAC_TAR_FORCE_10_D (1 << 19) + +#define IXGBE_KRM_DSP_TXFFE_STATE_C0_EN (1 << 6) +#define IXGBE_KRM_DSP_TXFFE_STATE_CP1_CN1_EN (1 << 15) +#define IXGBE_KRM_DSP_TXFFE_STATE_CO_ADAPT_EN (1 << 16) + +#define IXGBE_KRM_RX_TRN_LINKUP_CTRL_CONV_WO_PROTOCOL (1 << 4) +#define IXGBE_KRM_RX_TRN_LINKUP_CTRL_PROTOCOL_BYPASS (1 << 2) + +#define IXGBE_KRM_PMD_DFX_BURNIN_TX_RX_KR_LB_MASK (0x3 << 16) + +#define IXGBE_KRM_TX_COEFF_CTRL_1_CMINUS1_OVRRD_EN (1 << 1) +#define IXGBE_KRM_TX_COEFF_CTRL_1_CPLUS1_OVRRD_EN (1 << 2) +#define IXGBE_KRM_TX_COEFF_CTRL_1_CZERO_EN (1 << 3) +#define IXGBE_KRM_TX_COEFF_CTRL_1_OVRRD_EN (1 << 31) + +#define IXGBE_SB_IOSF_INDIRECT_CTRL 0x00011144 +#define IXGBE_SB_IOSF_INDIRECT_DATA 0x00011148 + +#define IXGBE_SB_IOSF_CTRL_ADDR_SHIFT 0 +#define IXGBE_SB_IOSF_CTRL_ADDR_MASK 0xFF +#define IXGBE_SB_IOSF_CTRL_RESP_STAT_SHIFT 18 +#define IXGBE_SB_IOSF_CTRL_RESP_STAT_MASK \ + (0x3 << IXGBE_SB_IOSF_CTRL_RESP_STAT_SHIFT) +#define IXGBE_SB_IOSF_CTRL_CMPL_ERR_SHIFT 20 +#define IXGBE_SB_IOSF_CTRL_CMPL_ERR_MASK \ + (0xFF << IXGBE_SB_IOSF_CTRL_CMPL_ERR_SHIFT) +#define IXGBE_SB_IOSF_CTRL_TARGET_SELECT_SHIFT 28 +#define IXGBE_SB_IOSF_CTRL_TARGET_SELECT_MASK 0x7 +#define IXGBE_SB_IOSF_CTRL_BUSY_SHIFT 31 +#define IXGBE_SB_IOSF_CTRL_BUSY (1 << IXGBE_SB_IOSF_CTRL_BUSY_SHIFT) +#define IXGBE_SB_IOSF_TARGET_KR_PHY 0 + +#define IXGBE_NW_MNG_IF_SEL 0x00011178 +#define IXGBE_NW_MNG_IF_SEL_MDIO_ACT (1u << 1) +#define IXGBE_NW_MNG_IF_SEL_MDIO_IF_MODE (1u << 2) +#define IXGBE_NW_MNG_IF_SEL_EN_SHARED_MDIO (1u << 13) +#define IXGBE_NW_MNG_IF_SEL_PHY_SPEED_10M (1u << 17) +#define IXGBE_NW_MNG_IF_SEL_PHY_SPEED_100M (1u << 18) +#define IXGBE_NW_MNG_IF_SEL_PHY_SPEED_1G (1u << 19) +#define IXGBE_NW_MNG_IF_SEL_PHY_SPEED_2_5G (1u << 20) +#define IXGBE_NW_MNG_IF_SEL_PHY_SPEED_10G (1u << 21) +#define IXGBE_NW_MNG_IF_SEL_SGMII_ENABLE (1u << 25) +#define IXGBE_NW_MNG_IF_SEL_INT_PHY_MODE (1 << 24) /* X552 reg field only */ +#define IXGBE_NW_MNG_IF_SEL_MDIO_PHY_ADD_SHIFT 3 +#define IXGBE_NW_MNG_IF_SEL_MDIO_PHY_ADD \ + (0x1F << IXGBE_NW_MNG_IF_SEL_MDIO_PHY_ADD_SHIFT) + +/* Code Command (Flash I/F Interface) */ +#define IXGBE_HOST_INTERFACE_FLASH_READ_CMD 0x30 +#define IXGBE_HOST_INTERFACE_SHADOW_RAM_READ_CMD 0x31 +#define IXGBE_HOST_INTERFACE_FLASH_WRITE_CMD 0x32 +#define IXGBE_HOST_INTERFACE_SHADOW_RAM_WRITE_CMD 0x33 +#define IXGBE_HOST_INTERFACE_FLASH_MODULE_UPDATE_CMD 0x34 +#define IXGBE_HOST_INTERFACE_FLASH_BLOCK_EREASE_CMD 0x35 +#define IXGBE_HOST_INTERFACE_SHADOW_RAM_DUMP_CMD 0x36 +#define IXGBE_HOST_INTERFACE_FLASH_INFO_CMD 0x37 +#define IXGBE_HOST_INTERFACE_APPLY_UPDATE_CMD 0x38 +#define IXGBE_HOST_INTERFACE_MASK_CMD 0x000000FF + +#include "ixgbe_osdep2.h" + +#endif /* _IXGBE_TYPE_H_ */ diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_type_e610.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_type_e610.h new file mode 100644 index 00000000000..7f92c56fd54 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_type_e610.h @@ -0,0 +1,2591 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 1999 - 2026 Intel Corporation */ + +#ifndef _IXGBE_TYPE_E610_H_ +#define _IXGBE_TYPE_E610_H_ + +/* Little Endian defines */ +#ifndef __le16 +#define __le16 u16 +#endif +#ifndef __le32 +#define __le32 u32 +#endif +#ifndef __le64 +#define __le64 u64 +#endif + +/* Generic defines */ +#ifndef BIT +#define BIT(a) (1UL << (a)) +#endif /* !BIT */ +#ifndef BIT_ULL +#define BIT_ULL(a) (1ULL << (a)) +#endif /* !BIT_ULL */ +#define BITS_PER_BYTE 8 +#define DIVIDE_AND_ROUND_UP(a, b) (((a) + (b) - 1) / (b)) + +/** + * ROUND_UP - round up to next arbitrary multiple (not a power of 2) + * @a: value to round up + * @b: arbitrary multiple + * + * Round up to the next multiple of the arbitrary b. + */ +#define ROUND_UP(a, b) ((b) * DIVIDE_AND_ROUND_UP((a), (b))) + +#define MAKEMASK(mask, shift) (mask << shift) + +#define BYTES_PER_WORD 2 +#define BYTES_PER_DWORD 4 + +#ifndef BITS_PER_LONG +#define BITS_PER_LONG 64 +#endif /* !BITS_PER_LONG */ +#ifndef BITS_PER_LONG_LONG +#define BITS_PER_LONG_LONG 64 +#endif /* !BITS_PER_LONG_LONG */ +#undef GENMASK +#define GENMASK(h, l) \ + (((~0UL) << (l)) & (~0UL >> (BITS_PER_LONG - 1 - (h)))) +#undef GENMASK_ULL +#define GENMASK_ULL(h, l) \ + (((~0ULL) << (l)) & (~0ULL >> (BITS_PER_LONG_LONG - 1 - (h)))) + +/* Data type manipulation macros. */ +#define HI_DWORD(x) ((u32)((((x) >> 16) >> 16) & 0xFFFFFFFF)) +#define LO_DWORD(x) ((u32)((x) & 0xFFFFFFFF)) +#define HI_WORD(x) ((u16)(((x) >> 16) & 0xFFFF)) +#define LO_WORD(x) ((u16)((x) & 0xFFFF)) +#define HI_BYTE(x) ((u8)(((x) >> 8) & 0xFF)) +#define LO_BYTE(x) ((u8)((x) & 0xFF)) + +#ifndef MIN_T +#define MIN_T(_t, _a, _b) min((_t)(_a), (_t)(_b)) +#endif + +#define IS_ASCII(_ch) ((_ch) < 0x80) + +#define STRUCT_HACK_VAR_LEN +/** + * ixgbe_struct_size - size of struct with C99 flexible array member + * @ptr: pointer to structure + * @field: flexible array member (last member of the structure) + * @num: number of elements of that flexible array member + */ +#define ixgbe_struct_size(ptr, field, num) \ + (sizeof(*(ptr)) + sizeof(*(ptr)->field) * (num)) + +/* General E610 defines */ +#define IXGBE_MAX_VSI 768 + +/* Auxiliary field, mask and shift definition for Shadow RAM and NVM Flash */ +#define E610_SR_VPD_SIZE_WORDS 512 +#define E610_SR_PCIE_ALT_SIZE_WORDS 512 + +/* Checksum and Shadow RAM pointers */ +#define E610_SR_NVM_DEV_STARTER_VER 0x18 +#define E610_NVM_VER_LO_SHIFT 0 +#define E610_NVM_VER_LO_MASK (0xff << E610_NVM_VER_LO_SHIFT) +#define E610_NVM_VER_HI_SHIFT 12 +#define E610_NVM_VER_HI_MASK (0xf << E610_NVM_VER_HI_SHIFT) +#define E610_SR_NVM_MAP_VER 0x29 +#define E610_SR_NVM_EETRACK_LO 0x2D +#define E610_SR_NVM_EETRACK_HI 0x2E +#define E610_SR_VPD_PTR 0x2F +#define E610_SR_PCIE_ALT_AUTO_LOAD_PTR 0x3E +#define E610_SR_SW_CHECKSUM_WORD 0x3F +#define E610_SR_PFA_PTR 0x40 +#define E610_SR_1ST_NVM_BANK_PTR 0x42 +#define E610_SR_NVM_BANK_SIZE 0x43 +#define E610_SR_1ST_OROM_BANK_PTR 0x44 +#define E610_SR_OROM_BANK_SIZE 0x45 +#define E610_SR_NETLIST_BANK_PTR 0x46 +#define E610_SR_NETLIST_BANK_SIZE 0x47 +#define E610_SR_POINTER_TYPE_BIT BIT(15) +#define E610_SR_POINTER_MASK 0x7fff +#define E610_SR_HALF_4KB_SECTOR_UNITS 2048 +#define E610_GET_PFA_POINTER_IN_WORDS(offset) \ + ((offset & E610_SR_POINTER_TYPE_BIT) == E610_SR_POINTER_TYPE_BIT) ? \ + ((offset & E610_SR_POINTER_MASK) * E610_SR_HALF_4KB_SECTOR_UNITS) : \ + (offset & E610_SR_POINTER_MASK) + +/* Checksum and Shadow RAM pointers */ +#define E610_SR_NVM_CTRL_WORD 0x00 +#define E610_SR_PBA_BLOCK_PTR 0x16 + +/* The Orom version topology */ +#define IXGBE_OROM_VER_PATCH_SHIFT 0 +#define IXGBE_OROM_VER_PATCH_MASK (0xff << IXGBE_OROM_VER_PATCH_SHIFT) +#define IXGBE_OROM_VER_BUILD_SHIFT 8 +#define IXGBE_OROM_VER_BUILD_MASK (0xffff << IXGBE_OROM_VER_BUILD_SHIFT) +#define IXGBE_OROM_VER_SHIFT 24 +#define IXGBE_OROM_VER_MASK (0xff << IXGBE_OROM_VER_SHIFT) + +/* CSS Header words */ +#define IXGBE_NVM_CSS_HDR_LEN_L 0x02 +#define IXGBE_NVM_CSS_HDR_LEN_H 0x03 +#define IXGBE_NVM_CSS_SREV_L 0x14 +#define IXGBE_NVM_CSS_SREV_H 0x15 + +/* Length of Authentication header section in words */ +#define IXGBE_NVM_AUTH_HEADER_LEN 0x08 + +/* The Netlist ID Block is located after all of the Link Topology nodes. */ +#define IXGBE_NETLIST_ID_BLK_SIZE 0x30 +#define IXGBE_NETLIST_ID_BLK_OFFSET(n) IXGBE_NETLIST_LINK_TOPO_OFFSET(0x0004 + 2 * (n)) + +/* netlist ID block field offsets (word offsets) */ +#define IXGBE_NETLIST_ID_BLK_MAJOR_VER_LOW 0x02 +#define IXGBE_NETLIST_ID_BLK_MAJOR_VER_HIGH 0x03 +#define IXGBE_NETLIST_ID_BLK_MINOR_VER_LOW 0x04 +#define IXGBE_NETLIST_ID_BLK_MINOR_VER_HIGH 0x05 +#define IXGBE_NETLIST_ID_BLK_TYPE_LOW 0x06 +#define IXGBE_NETLIST_ID_BLK_TYPE_HIGH 0x07 +#define IXGBE_NETLIST_ID_BLK_REV_LOW 0x08 +#define IXGBE_NETLIST_ID_BLK_REV_HIGH 0x09 +#define IXGBE_NETLIST_ID_BLK_SHA_HASH_WORD(n) (0x0A + (n)) +#define IXGBE_NETLIST_ID_BLK_CUST_VER 0x2F + +/* The Link Topology Netlist section is stored as a series of words. It is + * stored in the NVM as a TLV, with the first two words containing the type + * and length. + */ +#define IXGBE_NETLIST_LINK_TOPO_MOD_ID 0x011B +#define IXGBE_NETLIST_TYPE_OFFSET 0x0000 +#define IXGBE_NETLIST_LEN_OFFSET 0x0001 + +/* The Link Topology section follows the TLV header. When reading the netlist + * using ixgbe_read_netlist_module, we need to account for the 2-word TLV + * header. + */ +#define IXGBE_NETLIST_LINK_TOPO_OFFSET(n) ((n) + 2) +#define IXGBE_LINK_TOPO_MODULE_LEN IXGBE_NETLIST_LINK_TOPO_OFFSET(0x0000) +#define IXGBE_LINK_TOPO_NODE_COUNT IXGBE_NETLIST_LINK_TOPO_OFFSET(0x0001) +#define IXGBE_LINK_TOPO_NODE_COUNT_M MAKEMASK(0x3FF, 0) + +/* Auxiliary field, mask and shift definition for Shadow RAM and NVM Flash */ +#define IXGBE_SR_CTRL_WORD_1_S 0x06 +#define IXGBE_SR_CTRL_WORD_1_M (0x03 << IXGBE_SR_CTRL_WORD_1_S) +#define IXGBE_SR_CTRL_WORD_VALID 0x1 +#define IXGBE_SR_CTRL_WORD_OROM_BANK BIT(3) +#define IXGBE_SR_CTRL_WORD_NETLIST_BANK BIT(4) +#define IXGBE_SR_CTRL_WORD_NVM_BANK BIT(5) +#define IXGBE_SR_NVM_PTR_4KB_UNITS BIT(15) + +/* These macros strip from NVM Image Revision the particular part of NVM ver: + major ver, minor ver and image id */ +#define E610_NVM_MAJOR_VER(x) ((x & 0xF000) >> 12) +#define E610_NVM_MINOR_VER(x) (x & 0x00FF) + +/* Minimal Security Revision */ + +/* Shadow RAM related */ +#define IXGBE_SR_SECTOR_SIZE_IN_WORDS 0x800 +#define IXGBE_SR_WORDS_IN_1KB 512 +/* Checksum should be calculated such that after adding all the words, + * including the checksum word itself, the sum should be 0xBABA. + */ +#define IXGBE_SR_SW_CHECKSUM_BASE 0xBABA + +/* Netlist */ +#define IXGBE_MAX_NETLIST_SIZE 10 + +/* General registers */ + +/* Firmware Status Register (GL_FWSTS) */ +#define GL_FWSTS 0x00083048 /* Reset Source: POR */ +#define GL_FWSTS_FWS0B_S 0 +#define GL_FWSTS_FWS0B_M MAKEMASK(0xFF, 0) +#define GL_FWSTS_FWROWD_S 8 +#define GL_FWSTS_FWROWD_M BIT(8) +#define GL_FWSTS_FWRI_S 9 +#define GL_FWSTS_FWRI_M BIT(9) +#define GL_FWSTS_FWS1B_S 16 +#define GL_FWSTS_FWS1B_M MAKEMASK(0xFF, 16) +#define GL_FWSTS_EP_PF0 BIT(24) +#define GL_FWSTS_EP_PF1 BIT(25) + +/* Recovery mode values of Firmware Status 1 Byte (FWS1B) bitfield */ +#define GL_FWSTS_FWS1B_RECOVERY_MODE_CORER_LEGACY 0x0B +#define GL_FWSTS_FWS1B_RECOVERY_MODE_GLOBR_LEGACY 0x0C +#define GL_FWSTS_FWS1B_RECOVERY_MODE_CORER 0x30 +#define GL_FWSTS_FWS1B_RECOVERY_MODE_GLOBR 0x31 +#define GL_FWSTS_FWS1B_RECOVERY_MODE_TRANSITION 0x32 +#define GL_FWSTS_FWS1B_RECOVERY_MODE_NVM 0x33 + +/* Firmware Status (GL_MNG_FWSM) */ +#define GL_MNG_FWSM 0x000B6134 /* Reset Source: POR */ +#define GL_MNG_FWSM_FW_MODES_S 0 +#define GL_MNG_FWSM_FW_MODES_M MAKEMASK(0x7, 0) +#define GL_MNG_FWSM_RSV0_S 2 +#define GL_MNG_FWSM_RSV0_M MAKEMASK(0xFF, 2) +#define GL_MNG_FWSM_EEP_RELOAD_IND_S 10 +#define GL_MNG_FWSM_EEP_RELOAD_IND_M BIT(10) +#define GL_MNG_FWSM_RSV1_S 11 +#define GL_MNG_FWSM_RSV1_M MAKEMASK(0xF, 11) +#define GL_MNG_FWSM_RSV2_S 15 +#define GL_MNG_FWSM_RSV2_M BIT(15) +#define GL_MNG_FWSM_PCIR_AL_FAILURE_S 16 +#define GL_MNG_FWSM_PCIR_AL_FAILURE_M BIT(16) +#define GL_MNG_FWSM_POR_AL_FAILURE_S 17 +#define GL_MNG_FWSM_POR_AL_FAILURE_M BIT(17) +#define GL_MNG_FWSM_RSV3_S 18 +#define GL_MNG_FWSM_RSV3_M BIT(18) +#define GL_MNG_FWSM_EXT_ERR_IND_S 19 +#define GL_MNG_FWSM_EXT_ERR_IND_M MAKEMASK(0x3F, 19) +#define GL_MNG_FWSM_RSV4_S 25 +#define GL_MNG_FWSM_RSV4_M BIT(25) +#define GL_MNG_FWSM_RESERVED_11_S 26 +#define GL_MNG_FWSM_RESERVED_11_M MAKEMASK(0xF, 26) +#define GL_MNG_FWSM_RSV5_S 30 +#define GL_MNG_FWSM_RSV5_M MAKEMASK(0x3, 30) + +/* FW mode indications */ +#define GL_MNG_FWSM_FW_MODES_DEBUG_M BIT(0) +#define GL_MNG_FWSM_FW_MODES_RECOVERY_M BIT(1) +#define GL_MNG_FWSM_FW_MODES_ROLLBACK_M BIT(2) + +/* PF - Manageability Registers */ + +/* Global NVM General Status Register */ +#define GLNVM_GENS 0x000B6100 /* Reset Source: POR */ +#define GLNVM_GENS_NVM_PRES_S 0 +#define GLNVM_GENS_NVM_PRES_M BIT(0) +#define GLNVM_GENS_SR_SIZE_S 5 +#define GLNVM_GENS_SR_SIZE_M MAKEMASK(0x7, 5) +#define GLNVM_GENS_BANK1VAL_S 8 +#define GLNVM_GENS_BANK1VAL_M BIT(8) +#define GLNVM_GENS_ALT_PRST_S 23 +#define GLNVM_GENS_ALT_PRST_M BIT(23) +#define GLNVM_GENS_FL_AUTO_RD_S 25 +#define GLNVM_GENS_FL_AUTO_RD_M BIT(25) + +/* Flash Access Register */ +#define GLNVM_FLA 0x000B6108 /* Reset Source: POR */ +#define GLNVM_FLA_LOCKED_S 6 +#define GLNVM_FLA_LOCKED_M BIT(6) + +/* Bit Bang registers */ +#define RDASB_MSGCTL 0x000B6820 +#define RDASB_MSGCTL_HDR_DWS_S 0 +#define RDASB_MSGCTL_EXP_RDW_S 8 +#define RDASB_MSGCTL_CMDV_M BIT(31) +#define RDASB_RSPCTL 0x000B6824 +#define RDASB_RSPCTL_BAD_LENGTH_M BIT(30) +#define RDASB_RSPCTL_NOT_SUCCESS_M BIT(31) +#define RDASB_WHDR0 0x000B68F4 +#define RDASB_WHDR1 0x000B68F8 +#define RDASB_WHDR2 0x000B68FC +#define RDASB_WHDR3 0x000B6900 +#define RDASB_WHDR4 0x000B6904 +#define RDASB_RHDR0 0x000B6AFC +#define RDASB_RHDR0_RESPONSE_S 27 +#define RDASB_RHDR0_RESPONSE_M MAKEMASK(0x7, 27) +#define RDASB_RDATA0 0x000B6B00 +#define RDASB_RDATA1 0x000B6B04 + +/* SPI Registers */ +#define SPISB_MSGCTL 0x000B7020 +#define SPISB_MSGCTL_HDR_DWS_S 0 +#define SPISB_MSGCTL_EXP_RDW_S 8 +#define SPISB_MSGCTL_MSG_MODE_S 26 +#define SPISB_MSGCTL_TOKEN_MODE_S 28 +#define SPISB_MSGCTL_BARCLR_S 30 +#define SPISB_MSGCTL_CMDV_S 31 +#define SPISB_MSGCTL_CMDV_M BIT(31) +#define SPISB_RSPCTL 0x000B7024 +#define SPISB_RSPCTL_BAD_LENGTH_M BIT(30) +#define SPISB_RSPCTL_NOT_SUCCESS_M BIT(31) +#define SPISB_WHDR0 0x000B70F4 +#define SPISB_WHDR0_DEST_SEL_S 12 +#define SPISB_WHDR0_OPCODE_SEL_S 16 +#define SPISB_WHDR0_TAG_S 24 +#define SPISB_WHDR1 0x000B70F8 +#define SPISB_WHDR2 0x000B70FC +#define SPISB_RDATA 0x000B7300 +#define SPISB_WDATA 0x000B7100 + +/* Firmware Reset Count register */ +#define GL_FWRESETCNT 0x00083100 /* Reset Source: POR */ +#define GL_FWRESETCNT_FWRESETCNT_S 0 +#define GL_FWRESETCNT_FWRESETCNT_M MAKEMASK(0xFFFFFFFF, 0) + +/* Admin Command Interface (ACI) registers */ +#define PF_HIDA(_i) (0x00085000 + ((_i) * 4)) +#define PF_HIDA_2(_i) (0x00085020 + ((_i) * 4)) +#define PF_HIBA(_i) (0x00084000 + ((_i) * 4)) +#define PF_HICR 0x00082048 + +#define PF_HIDA_MAX_INDEX 15 +#define PF_HIBA_MAX_INDEX 1023 + +#define PF_HICR_EN BIT(0) +#define PF_HICR_C BIT(1) +#define PF_HICR_SV BIT(2) +#define PF_HICR_EV BIT(3) + +#define GL_HIDA(_i) (0x00082000 + ((_i) * 4)) +#define GL_HIDA_2(_i) (0x00082020 + ((_i) * 4)) +#define GL_HIBA(_i) (0x00081000 + ((_i) * 4)) +#define GL_HICR 0x00082040 + +#define GL_HIDA_MAX_INDEX 15 +#define GL_HIBA_MAX_INDEX 1023 + +#define GL_HICR_C BIT(1) +#define GL_HICR_SV BIT(2) +#define GL_HICR_EV BIT(3) + +#define GL_HICR_EN 0x00082044 + +#define GL_HICR_EN_CHECK BIT(0) + +/* Admin Command Interface (ACI) defines */ +/* Defines that help manage the driver vs FW API checks. + */ +#define IXGBE_FW_API_VER_BRANCH 0x00 +#define IXGBE_FW_API_VER_MAJOR 0x01 +#define IXGBE_FW_API_VER_MINOR 0x07 +#define IXGBE_FW_API_VER_DIFF_ALLOWED 0x02 + +#define IXGBE_ACI_DESC_SIZE 32 +#define IXGBE_ACI_DESC_SIZE_IN_DWORDS IXGBE_ACI_DESC_SIZE / BYTES_PER_DWORD + +#define IXGBE_ACI_MAX_BUFFER_SIZE 4096 /* Size in bytes */ +#define IXGBE_ACI_DESC_COOKIE_L_DWORD_OFFSET 3 +#define IXGBE_ACI_SEND_DELAY_TIME_MS 10 +#define IXGBE_ACI_SEND_MAX_EXECUTE 3 +#define IXGBE_ACI_MAX_DEBUG_STRING_LENGTH 128 +/* [ms] timeout of waiting for sync response */ +#define IXGBE_ACI_SYNC_RESPONSE_TIMEOUT 100000 +/* [ms] timeout of waiting for async response */ +#define IXGBE_ACI_ASYNC_RESPONSE_TIMEOUT 150000 +/* [ms] timeout of waiting for resource release */ +#define IXGBE_ACI_RELEASE_RES_TIMEOUT 10000 + +/* Timestamp spacing for Tools ACI: queue is active if spacing is within the range [LO..HI] */ +#define IXGBE_TOOLS_ACI_ACTIVE_STAMP_SPACING_LO 0 +#define IXGBE_TOOLS_ACI_ACTIVE_STAMP_SPACING_HI 200 + +/* Timestamp spacing for Tools ACI: queue is expired if spacing is outside the range [LO..HI] */ +#define IXGBE_TOOLS_ACI_EXPIRED_STAMP_SPACING_LO -5 +#define IXGBE_TOOLS_ACI_EXPIRED_STAMP_SPACING_HI 205 + +/* FW defined boundary for a large buffer, 4k >= Large buffer > 512 bytes */ +#define IXGBE_ACI_LG_BUF 512 + +/* Flags sub-structure + * |0 |1 |2 |3 |4 |5 |6 |7 |8 |9 |10 |11 |12 |13 |14 |15 | + * |DD |CMP|ERR|VFE| * * RESERVED * * |LB |RD |VFC|BUF|SI |EI |FE | + */ + +/* command flags and offsets */ +#define IXGBE_ACI_FLAG_DD_S 0 +#define IXGBE_ACI_FLAG_CMP_S 1 +#define IXGBE_ACI_FLAG_ERR_S 2 +#define IXGBE_ACI_FLAG_VFE_S 3 +#define IXGBE_ACI_FLAG_LB_S 9 +#define IXGBE_ACI_FLAG_RD_S 10 +#define IXGBE_ACI_FLAG_VFC_S 11 +#define IXGBE_ACI_FLAG_BUF_S 12 +#define IXGBE_ACI_FLAG_SI_S 13 +#define IXGBE_ACI_FLAG_EI_S 14 +#define IXGBE_ACI_FLAG_FE_S 15 + +#define IXGBE_ACI_FLAG_DD BIT(IXGBE_ACI_FLAG_DD_S) /* 0x1 */ +#define IXGBE_ACI_FLAG_CMP BIT(IXGBE_ACI_FLAG_CMP_S) /* 0x2 */ +#define IXGBE_ACI_FLAG_ERR BIT(IXGBE_ACI_FLAG_ERR_S) /* 0x4 */ +#define IXGBE_ACI_FLAG_VFE BIT(IXGBE_ACI_FLAG_VFE_S) /* 0x8 */ +#define IXGBE_ACI_FLAG_LB BIT(IXGBE_ACI_FLAG_LB_S) /* 0x200 */ +#define IXGBE_ACI_FLAG_RD BIT(IXGBE_ACI_FLAG_RD_S) /* 0x400 */ +#define IXGBE_ACI_FLAG_VFC BIT(IXGBE_ACI_FLAG_VFC_S) /* 0x800 */ +#define IXGBE_ACI_FLAG_BUF BIT(IXGBE_ACI_FLAG_BUF_S) /* 0x1000 */ +#define IXGBE_ACI_FLAG_SI BIT(IXGBE_ACI_FLAG_SI_S) /* 0x2000 */ +#define IXGBE_ACI_FLAG_EI BIT(IXGBE_ACI_FLAG_EI_S) /* 0x4000 */ +#define IXGBE_ACI_FLAG_FE BIT(IXGBE_ACI_FLAG_FE_S) /* 0x8000 */ + +/* Admin Command Interface (ACI) error codes */ +enum ixgbe_aci_err { + IXGBE_ACI_RC_OK = 0, /* Success */ + IXGBE_ACI_RC_EPERM = 1, /* Operation not permitted */ + IXGBE_ACI_RC_ENOENT = 2, /* No such element */ + IXGBE_ACI_RC_ESRCH = 3, /* Bad opcode */ + IXGBE_ACI_RC_EINTR = 4, /* Operation interrupted */ + IXGBE_ACI_RC_EIO = 5, /* I/O error */ + IXGBE_ACI_RC_ENXIO = 6, /* No such resource */ + IXGBE_ACI_RC_E2BIG = 7, /* Arg too long */ + IXGBE_ACI_RC_EAGAIN = 8, /* Try again */ + IXGBE_ACI_RC_ENOMEM = 9, /* Out of memory */ + IXGBE_ACI_RC_EACCES = 10, /* Permission denied */ + IXGBE_ACI_RC_EFAULT = 11, /* Bad address */ + IXGBE_ACI_RC_EBUSY = 12, /* Device or resource busy */ + IXGBE_ACI_RC_EEXIST = 13, /* Object already exists */ + IXGBE_ACI_RC_EINVAL = 14, /* Invalid argument */ + IXGBE_ACI_RC_ENOTTY = 15, /* Not a typewriter */ + IXGBE_ACI_RC_ENOSPC = 16, /* No space left or allocation failure */ + IXGBE_ACI_RC_ENOSYS = 17, /* Function not implemented */ + IXGBE_ACI_RC_ERANGE = 18, /* Parameter out of range */ + IXGBE_ACI_RC_EFLUSHED = 19, /* Cmd flushed due to prev cmd error */ + IXGBE_ACI_RC_BAD_ADDR = 20, /* Descriptor contains a bad pointer */ + IXGBE_ACI_RC_EMODE = 21, /* Op not allowed in current dev mode */ + IXGBE_ACI_RC_EFBIG = 22, /* File too big */ + IXGBE_ACI_RC_ESBCOMP = 23, /* SB-IOSF completion unsuccessful */ + IXGBE_ACI_RC_ENOSEC = 24, /* Missing security manifest */ + IXGBE_ACI_RC_EBADSIG = 25, /* Bad RSA signature */ + IXGBE_ACI_RC_ESVN = 26, /* SVN number prohibits this package */ + IXGBE_ACI_RC_EBADMAN = 27, /* Manifest hash mismatch */ + IXGBE_ACI_RC_EBADBUF = 28, /* Buffer hash mismatches manifest */ + IXGBE_ACI_RC_EACCES_BMCU = 29, /* BMC Update in progress */ +}; + +/* Admin Command Interface (ACI) opcodes */ +enum ixgbe_aci_opc { + ixgbe_aci_opc_get_ver = 0x0001, + ixgbe_aci_opc_driver_ver = 0x0002, + ixgbe_aci_opc_get_exp_err = 0x0005, + + /* resource ownership */ + ixgbe_aci_opc_req_res = 0x0008, + ixgbe_aci_opc_release_res = 0x0009, + + /* device/function capabilities */ + ixgbe_aci_opc_list_func_caps = 0x000A, + ixgbe_aci_opc_list_dev_caps = 0x000B, + + /* safe disable of RXEN */ + ixgbe_aci_opc_disable_rxen = 0x000C, + + /* FW events */ + ixgbe_aci_opc_get_fw_event = 0x0014, + + /* PHY commands */ + ixgbe_aci_opc_get_phy_caps = 0x0600, + ixgbe_aci_opc_set_phy_cfg = 0x0601, + ixgbe_aci_opc_restart_an = 0x0605, + ixgbe_aci_opc_get_link_status = 0x0607, + ixgbe_aci_opc_set_event_mask = 0x0613, +#ifndef NO_PTP_SUPPORT + ixgbe_aci_opc_set_ptp_by_phy = 0x0634, + ixgbe_aci_opc_get_ptp_by_phy = 0x0635, +#endif /* !NO_PTP_SUPPORT */ + ixgbe_aci_opc_get_link_topo = 0x06E0, +#if !defined(NO_PTP_SUPPORT) + ixgbe_aci_opc_get_link_topo_pin = 0x06E1, +#endif /* !NO_PTP_SUPPORT */ + ixgbe_aci_opc_read_i2c = 0x06E2, + ixgbe_aci_opc_write_i2c = 0x06E3, + ixgbe_aci_opc_read_mdio = 0x06E4, + ixgbe_aci_opc_write_mdio = 0x06E5, + ixgbe_aci_opc_set_gpio_by_func = 0x06E6, + ixgbe_aci_opc_get_gpio_by_func = 0x06E7, + ixgbe_aci_opc_set_port_id_led = 0x06E9, + ixgbe_aci_opc_set_gpio = 0x06EC, + ixgbe_aci_opc_get_gpio = 0x06ED, + ixgbe_aci_opc_sff_eeprom = 0x06EE, + ixgbe_aci_opc_prog_topo_dev_nvm = 0x06F2, + ixgbe_aci_opc_read_topo_dev_nvm = 0x06F3, + + /* NVM commands */ + ixgbe_aci_opc_nvm_read = 0x0701, + ixgbe_aci_opc_nvm_erase = 0x0702, + ixgbe_aci_opc_nvm_write = 0x0703, + ixgbe_aci_opc_nvm_cfg_read = 0x0704, + ixgbe_aci_opc_nvm_cfg_write = 0x0705, + ixgbe_aci_opc_nvm_checksum = 0x0706, + ixgbe_aci_opc_nvm_write_activate = 0x0707, + ixgbe_aci_opc_nvm_sr_dump = 0x0707, + ixgbe_aci_opc_nvm_save_factory_settings = 0x0708, + ixgbe_aci_opc_nvm_update_empr = 0x0709, + ixgbe_aci_opc_nvm_pkg_data = 0x070A, + ixgbe_aci_opc_nvm_pass_component_tbl = 0x070B, + ixgbe_aci_opc_nvm_sanitization = 0x070C, + + /* Alternate Structure Commands */ + ixgbe_aci_opc_write_alt_direct = 0x0900, + ixgbe_aci_opc_write_alt_indirect = 0x0901, + ixgbe_aci_opc_read_alt_direct = 0x0902, + ixgbe_aci_opc_read_alt_indirect = 0x0903, + ixgbe_aci_opc_done_alt_write = 0x0904, + ixgbe_aci_opc_clear_port_alt_write = 0x0906, + + ixgbe_aci_opc_temp_tca_event = 0x0C94, + + /* debug commands */ + ixgbe_aci_opc_debug_dump_internals = 0xFF08, + + /* SystemDiagnostic commands */ + ixgbe_aci_opc_set_health_status_config = 0xFF20, + ixgbe_aci_opc_get_supported_health_status_codes = 0xFF21, + ixgbe_aci_opc_get_health_status = 0xFF22, + ixgbe_aci_opc_clear_health_status = 0xFF23, + + /* FW Logging Commands */ + ixgbe_aci_opc_fw_logs_config = 0xFF30, + ixgbe_aci_opc_fw_logs_register = 0xFF31, + ixgbe_aci_opc_fw_logs_query = 0xFF32, + ixgbe_aci_opc_fw_logs_event = 0xFF33, + ixgbe_aci_opc_fw_logs_get = 0xFF34, + ixgbe_aci_opc_fw_logs_clear = 0xFF35 +}; + +/* This macro is used to generate a compilation error if a structure + * is not exactly the correct length. It gives a divide by zero error if the + * structure is not of the correct size, otherwise it creates an enum that is + * never used. + */ +#define IXGBE_CHECK_STRUCT_LEN(n, X) enum ixgbe_static_assert_enum_##X \ + { ixgbe_static_assert_##X = (n) / ((sizeof(struct X) == (n)) ? 1 : 0) } + +/* This macro is used to generate a compilation error if a variable-length + * structure is not exactly the correct length assuming a single element of + * the variable-length object as the last element of the structure. It gives + * a divide by zero error if the structure is not of the correct size, + * otherwise it creates an enum that is never used. + */ +#define IXGBE_CHECK_VAR_LEN_STRUCT_LEN(n, X, T) enum ixgbe_static_assert_enum_##X \ + { ixgbe_static_assert_##X = (n) / \ + (((sizeof(struct X) + sizeof(T)) == (n)) ? 1 : 0) } + +/* This macro is used to ensure that parameter structures (i.e. structures + * in the params union member of struct ixgbe_aci_desc) are 16 bytes in length. + * + * NOT intended to be used to check the size of an indirect command/response + * additional data buffer (e.g. struct foo) which should just happen to be 16 + * bytes (instead, use IXGBE_CHECK_STRUCT_LEN(16, foo) for that). + */ +#define IXGBE_CHECK_PARAM_LEN(X) IXGBE_CHECK_STRUCT_LEN(16, X) + +struct ixgbe_aci_cmd_generic { + __le32 param0; + __le32 param1; + __le32 addr_high; + __le32 addr_low; +}; + +IXGBE_CHECK_PARAM_LEN(ixgbe_aci_cmd_generic); + +/* Get version (direct 0x0001) */ +struct ixgbe_aci_cmd_get_ver { + __le32 rom_ver; + __le32 fw_build; + u8 fw_branch; + u8 fw_major; + u8 fw_minor; + u8 fw_patch; + u8 api_branch; + u8 api_major; + u8 api_minor; + u8 api_patch; +}; + +IXGBE_CHECK_PARAM_LEN(ixgbe_aci_cmd_get_ver); + +#define IXGBE_DRV_VER_STR_LEN_E610 32 + +struct ixgbe_driver_ver { + u8 major_ver; + u8 minor_ver; + u8 build_ver; + u8 subbuild_ver; + u8 driver_string[IXGBE_DRV_VER_STR_LEN_E610]; +}; + +/* Send driver version (indirect 0x0002) */ +struct ixgbe_aci_cmd_driver_ver { + u8 major_ver; + u8 minor_ver; + u8 build_ver; + u8 subbuild_ver; + u8 reserved[4]; + __le32 addr_high; + __le32 addr_low; +}; + +IXGBE_CHECK_PARAM_LEN(ixgbe_aci_cmd_driver_ver); + +/* Get Expanded Error Code (0x0005, direct) */ +struct ixgbe_aci_cmd_get_exp_err { + __le32 reason; +#define IXGBE_ACI_EXPANDED_ERROR_NOT_PROVIDED 0xFFFFFFFF + __le32 identifier; + u8 rsvd[8]; +}; + +IXGBE_CHECK_PARAM_LEN(ixgbe_aci_cmd_get_exp_err); + +/* FW update timeout definitions are in milliseconds */ +#define IXGBE_NVM_TIMEOUT 180000 +#define IXGBE_CHANGE_LOCK_TIMEOUT 1000 +#define IXGBE_GLOBAL_CFG_LOCK_TIMEOUT 3000 + +enum ixgbe_aci_res_access_type { + IXGBE_RES_READ = 1, + IXGBE_RES_WRITE +}; + +enum ixgbe_aci_res_ids { + IXGBE_NVM_RES_ID = 1, + IXGBE_SPD_RES_ID, + IXGBE_CHANGE_LOCK_RES_ID, + IXGBE_GLOBAL_CFG_LOCK_RES_ID +}; + +/* Request resource ownership (direct 0x0008) + * Release resource ownership (direct 0x0009) + */ +struct ixgbe_aci_cmd_req_res { + __le16 res_id; +#define IXGBE_ACI_RES_ID_NVM 1 +#define IXGBE_ACI_RES_ID_SDP 2 +#define IXGBE_ACI_RES_ID_CHNG_LOCK 3 +#define IXGBE_ACI_RES_ID_GLBL_LOCK 4 + __le16 access_type; +#define IXGBE_ACI_RES_ACCESS_READ 1 +#define IXGBE_ACI_RES_ACCESS_WRITE 2 + + /* Upon successful completion, FW writes this value and driver is + * expected to release resource before timeout. This value is provided + * in milliseconds. + */ + __le32 timeout; +#define IXGBE_ACI_RES_NVM_READ_DFLT_TIMEOUT_MS 3000 +#define IXGBE_ACI_RES_NVM_WRITE_DFLT_TIMEOUT_MS 180000 +#define IXGBE_ACI_RES_CHNG_LOCK_DFLT_TIMEOUT_MS 1000 +#define IXGBE_ACI_RES_GLBL_LOCK_DFLT_TIMEOUT_MS 3000 + /* For SDP: pin ID of the SDP */ + __le32 res_number; + /* Status is only used for IXGBE_ACI_RES_ID_GLBL_LOCK */ + __le16 status; +#define IXGBE_ACI_RES_GLBL_SUCCESS 0 +#define IXGBE_ACI_RES_GLBL_IN_PROG 1 +#define IXGBE_ACI_RES_GLBL_DONE 2 + u8 reserved[2]; +}; + +IXGBE_CHECK_PARAM_LEN(ixgbe_aci_cmd_req_res); + +/* Get function capabilities (indirect 0x000A) + * Get device capabilities (indirect 0x000B) + */ +struct ixgbe_aci_cmd_list_caps { + u8 cmd_flags; + u8 pf_index; + u8 reserved[2]; + __le32 count; + __le32 addr_high; + __le32 addr_low; +}; + +IXGBE_CHECK_PARAM_LEN(ixgbe_aci_cmd_list_caps); + +/* Device/Function buffer entry, repeated per reported capability */ +struct ixgbe_aci_cmd_list_caps_elem { + __le16 cap; +#define IXGBE_ACI_CAPS_VALID_FUNCTIONS 0x0005 +#define IXGBE_ACI_MAX_VALID_FUNCTIONS 0x8 +#define IXGBE_ACI_CAPS_VMDQ 0x0014 +#define IXGBE_ACI_CAPS_VSI 0x0017 +#define IXGBE_ACI_CAPS_DCB 0x0018 +#define IXGBE_ACI_CAPS_RSS 0x0040 +#define IXGBE_ACI_CAPS_RXQS 0x0041 +#define IXGBE_ACI_CAPS_TXQS 0x0042 +#define IXGBE_ACI_CAPS_MSIX 0x0043 +#define IXGBE_ACI_CAPS_FD 0x0045 +#ifndef NO_PTP_SUPPORT +#define IXGBE_ACI_CAPS_1588 0x0046 +#endif /* !NO_PTP_SUPPORT */ +#define IXGBE_ACI_CAPS_MAX_MTU 0x0047 +#define IXGBE_ACI_CAPS_NVM_VER 0x0048 +#define IXGBE_ACI_CAPS_PENDING_NVM_VER 0x0049 +#define IXGBE_ACI_CAPS_OROM_VER 0x004A +#define IXGBE_ACI_CAPS_PENDING_OROM_VER 0x004B +#define IXGBE_ACI_CAPS_PENDING_NET_VER 0x004D +#define IXGBE_ACI_CAPS_INLINE_IPSEC 0x0070 +#define IXGBE_ACI_CAPS_NUM_ENABLED_PORTS 0x0072 +#define IXGBE_ACI_CAPS_PCIE_RESET_AVOIDANCE 0x0076 +#define IXGBE_ACI_CAPS_POST_UPDATE_RESET_RESTRICT 0x0077 +#define IXGBE_ACI_CAPS_NVM_MGMT 0x0080 +#define IXGBE_ACI_CAPS_EXT_TOPO_DEV_IMG0 0x0081 +#define IXGBE_ACI_CAPS_EXT_TOPO_DEV_IMG1 0x0082 +#define IXGBE_ACI_CAPS_EXT_TOPO_DEV_IMG2 0x0083 +#define IXGBE_ACI_CAPS_EXT_TOPO_DEV_IMG3 0x0084 +#define IXGBE_ACI_CAPS_OROM_RECOVERY_UPDATE 0x0090 +#define IXGBE_ACI_CAPS_NEXT_CLUSTER_ID 0x0096 +#ifndef NO_PTP_SUPPORT +#define IXGBE_ACI_CAPS_PTP_BY_PHY 0x0097 +#define IXGBE_ACI_CAPS_PTP_BY_PHY_SUPP BIT(0) +#define IXGBE_ACI_CAPS_PTP_BY_PHY_LL BIT(1) +#endif /* !NO_PTP_SUPPORT */ +#define IXGBE_ACI_CAPS_EEE 0x009B + u8 major_ver; + u8 minor_ver; + /* Number of resources described by this capability */ + __le32 number; + /* Only meaningful for some types of resources */ + __le32 logical_id; + /* Only meaningful for some types of resources */ + __le32 phys_id; + __le64 rsvd1; + __le64 rsvd2; +}; + +IXGBE_CHECK_STRUCT_LEN(32, ixgbe_aci_cmd_list_caps_elem); + +/* Disable RXEN (direct 0x000C) */ +struct ixgbe_aci_cmd_disable_rxen { + u8 lport_num; + u8 reserved[15]; +}; + +IXGBE_CHECK_PARAM_LEN(ixgbe_aci_cmd_disable_rxen); + +/* Get FW Event (indirect 0x0014) */ +struct ixgbe_aci_cmd_get_fw_event { + __le16 fw_buf_status; +#define IXGBE_ACI_GET_FW_EVENT_STATUS_OBTAINED BIT(0) +#define IXGBE_ACI_GET_FW_EVENT_STATUS_PENDING BIT(1) + u8 rsvd[14]; +}; + +IXGBE_CHECK_PARAM_LEN(ixgbe_aci_cmd_get_fw_event); + +/* Get PHY capabilities (indirect 0x0600) */ +struct ixgbe_aci_cmd_get_phy_caps { + u8 lport_num; + u8 reserved; + __le16 param0; + /* 18.0 - Report qualified modules */ +#define IXGBE_ACI_GET_PHY_RQM BIT(0) + /* 18.1 - 18.3 : Report mode + * 000b - Report topology capabilities, without media + * 001b - Report topology capabilities, with media + * 010b - Report Active configuration + * 011b - Report PHY Type and FEC mode capabilities + * 100b - Report Default capabilities + */ +#define IXGBE_ACI_REPORT_MODE_S 1 +#define IXGBE_ACI_REPORT_MODE_M (7 << IXGBE_ACI_REPORT_MODE_S) +#define IXGBE_ACI_REPORT_TOPO_CAP_NO_MEDIA 0 +#define IXGBE_ACI_REPORT_TOPO_CAP_MEDIA BIT(1) +#define IXGBE_ACI_REPORT_ACTIVE_CFG BIT(2) +#define IXGBE_ACI_REPORT_DFLT_CFG BIT(3) + __le32 reserved1; + __le32 addr_high; + __le32 addr_low; +}; + +IXGBE_CHECK_PARAM_LEN(ixgbe_aci_cmd_get_phy_caps); + +/* This is #define of PHY type (Extended): + * The first set of defines is for phy_type_low. + */ +#define IXGBE_PHY_TYPE_LOW_100BASE_TX BIT_ULL(0) +#define IXGBE_PHY_TYPE_LOW_100M_SGMII BIT_ULL(1) +#define IXGBE_PHY_TYPE_LOW_1000BASE_T BIT_ULL(2) +#define IXGBE_PHY_TYPE_LOW_1000BASE_SX BIT_ULL(3) +#define IXGBE_PHY_TYPE_LOW_1000BASE_LX BIT_ULL(4) +#define IXGBE_PHY_TYPE_LOW_1000BASE_KX BIT_ULL(5) +#define IXGBE_PHY_TYPE_LOW_1G_SGMII BIT_ULL(6) +#define IXGBE_PHY_TYPE_LOW_2500BASE_T BIT_ULL(7) +#define IXGBE_PHY_TYPE_LOW_2500BASE_X BIT_ULL(8) +#define IXGBE_PHY_TYPE_LOW_2500BASE_KX BIT_ULL(9) +#define IXGBE_PHY_TYPE_LOW_5GBASE_T BIT_ULL(10) +#define IXGBE_PHY_TYPE_LOW_5GBASE_KR BIT_ULL(11) +#define IXGBE_PHY_TYPE_LOW_10GBASE_T BIT_ULL(12) +#define IXGBE_PHY_TYPE_LOW_10G_SFI_DA BIT_ULL(13) +#define IXGBE_PHY_TYPE_LOW_10GBASE_SR BIT_ULL(14) +#define IXGBE_PHY_TYPE_LOW_10GBASE_LR BIT_ULL(15) +#define IXGBE_PHY_TYPE_LOW_10GBASE_KR_CR1 BIT_ULL(16) +#define IXGBE_PHY_TYPE_LOW_10G_SFI_AOC_ACC BIT_ULL(17) +#define IXGBE_PHY_TYPE_LOW_10G_SFI_C2C BIT_ULL(18) +#define IXGBE_PHY_TYPE_LOW_25GBASE_T BIT_ULL(19) +#define IXGBE_PHY_TYPE_LOW_25GBASE_CR BIT_ULL(20) +#define IXGBE_PHY_TYPE_LOW_25GBASE_CR_S BIT_ULL(21) +#define IXGBE_PHY_TYPE_LOW_25GBASE_CR1 BIT_ULL(22) +#define IXGBE_PHY_TYPE_LOW_25GBASE_SR BIT_ULL(23) +#define IXGBE_PHY_TYPE_LOW_25GBASE_LR BIT_ULL(24) +#define IXGBE_PHY_TYPE_LOW_25GBASE_KR BIT_ULL(25) +#define IXGBE_PHY_TYPE_LOW_25GBASE_KR_S BIT_ULL(26) +#define IXGBE_PHY_TYPE_LOW_25GBASE_KR1 BIT_ULL(27) +#define IXGBE_PHY_TYPE_LOW_25G_AUI_AOC_ACC BIT_ULL(28) +#define IXGBE_PHY_TYPE_LOW_25G_AUI_C2C BIT_ULL(29) +#define IXGBE_PHY_TYPE_LOW_MAX_INDEX 29 +/* The second set of defines is for phy_type_high. */ +#define IXGBE_PHY_TYPE_HIGH_10BASE_T BIT_ULL(1) +#define IXGBE_PHY_TYPE_HIGH_10M_SGMII BIT_ULL(2) +#define IXGBE_PHY_TYPE_HIGH_2500M_SGMII BIT_ULL(56) +#define IXGBE_PHY_TYPE_HIGH_100M_USXGMII BIT_ULL(57) +#define IXGBE_PHY_TYPE_HIGH_1G_USXGMII BIT_ULL(58) +#define IXGBE_PHY_TYPE_HIGH_2500M_USXGMII BIT_ULL(59) +#define IXGBE_PHY_TYPE_HIGH_5G_USXGMII BIT_ULL(60) +#define IXGBE_PHY_TYPE_HIGH_10G_USXGMII BIT_ULL(61) +#define IXGBE_PHY_TYPE_HIGH_MAX_INDEX 61 + +struct ixgbe_aci_cmd_get_phy_caps_data { + __le64 phy_type_low; /* Use values from IXGBE_PHY_TYPE_LOW_* */ + __le64 phy_type_high; /* Use values from IXGBE_PHY_TYPE_HIGH_* */ + u8 caps; +#define IXGBE_ACI_PHY_EN_TX_LINK_PAUSE BIT(0) +#define IXGBE_ACI_PHY_EN_RX_LINK_PAUSE BIT(1) +#define IXGBE_ACI_PHY_LOW_POWER_MODE BIT(2) +#define IXGBE_ACI_PHY_EN_LINK BIT(3) +#define IXGBE_ACI_PHY_AN_MODE BIT(4) +#define IXGBE_ACI_PHY_EN_MOD_QUAL BIT(5) +#define IXGBE_ACI_PHY_EN_LESM BIT(6) +#define IXGBE_ACI_PHY_EN_AUTO_FEC BIT(7) +#define IXGBE_ACI_PHY_CAPS_MASK MAKEMASK(0xff, 0) + u8 low_power_ctrl_an; +#define IXGBE_ACI_PHY_EN_D3COLD_LOW_POWER_AUTONEG BIT(0) +#define IXGBE_ACI_PHY_AN_EN_CLAUSE28 BIT(1) +#define IXGBE_ACI_PHY_AN_EN_CLAUSE73 BIT(2) +#define IXGBE_ACI_PHY_AN_EN_CLAUSE37 BIT(3) + __le16 eee_cap; +#define IXGBE_ACI_PHY_EEE_EN_100BASE_TX BIT(0) +#define IXGBE_ACI_PHY_EEE_EN_1000BASE_T BIT(1) +#define IXGBE_ACI_PHY_EEE_EN_10GBASE_T BIT(2) +#define IXGBE_ACI_PHY_EEE_EN_5GBASE_T BIT(11) +#define IXGBE_ACI_PHY_EEE_EN_2_5GBASE_T BIT(12) + __le16 eeer_value; + u8 phy_id_oui[4]; /* PHY/Module ID connected on the port */ + u8 phy_fw_ver[8]; + u8 link_fec_options; +#define IXGBE_ACI_PHY_FEC_10G_KR_40G_KR4_EN BIT(0) +#define IXGBE_ACI_PHY_FEC_10G_KR_40G_KR4_REQ BIT(1) +#define IXGBE_ACI_PHY_FEC_25G_RS_528_REQ BIT(2) +#define IXGBE_ACI_PHY_FEC_25G_KR_REQ BIT(3) +#define IXGBE_ACI_PHY_FEC_25G_RS_544_REQ BIT(4) +#define IXGBE_ACI_PHY_FEC_25G_RS_CLAUSE91_EN BIT(6) +#define IXGBE_ACI_PHY_FEC_25G_KR_CLAUSE74_EN BIT(7) +#define IXGBE_ACI_PHY_FEC_MASK MAKEMASK(0xdf, 0) + u8 module_compliance_enforcement; +#define IXGBE_ACI_MOD_ENFORCE_STRICT_MODE BIT(0) + u8 extended_compliance_code; +#define IXGBE_ACI_MODULE_TYPE_TOTAL_BYTE 3 + u8 module_type[IXGBE_ACI_MODULE_TYPE_TOTAL_BYTE]; +#define IXGBE_ACI_MOD_TYPE_BYTE0_SFP_PLUS 0xA0 +#define IXGBE_ACI_MOD_TYPE_BYTE0_QSFP_PLUS 0x80 +#define IXGBE_ACI_MOD_TYPE_IDENT 1 +#define IXGBE_ACI_MOD_TYPE_BYTE1_SFP_PLUS_CU_PASSIVE BIT(0) +#define IXGBE_ACI_MOD_TYPE_BYTE1_SFP_PLUS_CU_ACTIVE BIT(1) +#define IXGBE_ACI_MOD_TYPE_BYTE1_10G_BASE_SR BIT(4) +#define IXGBE_ACI_MOD_TYPE_BYTE1_10G_BASE_LR BIT(5) +#define IXGBE_ACI_MOD_TYPE_BYTE1_10G_BASE_LRM BIT(6) +#define IXGBE_ACI_MOD_TYPE_BYTE1_10G_BASE_ER BIT(7) +#define IXGBE_ACI_MOD_TYPE_BYTE2_SFP_PLUS 0xA0 +#define IXGBE_ACI_MOD_TYPE_BYTE2_QSFP_PLUS 0x86 + u8 qualified_module_count; + u8 rsvd2; + __le16 eee_entry_delay; + u8 rsvd3[4]; +#define IXGBE_ACI_QUAL_MOD_COUNT_MAX 16 + struct { + u8 v_oui[3]; + u8 rsvd3; + u8 v_part[16]; + __le32 v_rev; + __le64 rsvd4; + } qual_modules[IXGBE_ACI_QUAL_MOD_COUNT_MAX]; +}; + +IXGBE_CHECK_STRUCT_LEN(560, ixgbe_aci_cmd_get_phy_caps_data); + +/* Set PHY capabilities (direct 0x0601) + * NOTE: This command must be followed by setup link and restart auto-neg + */ +struct ixgbe_aci_cmd_set_phy_cfg { + u8 reserved[8]; + __le32 addr_high; + __le32 addr_low; +}; + +IXGBE_CHECK_PARAM_LEN(ixgbe_aci_cmd_set_phy_cfg); + +/* Set PHY config obsolete command data structure (= this entry are invalid */ +}; + +struct ixgbe_fwlog_module_entry { + /* module ID for the corresponding firmware logging event */ + u16 module_id; + /* verbosity level for the module_id */ + u8 log_level; +}; + +struct ixgbe_fwlog_cfg { + /* list of modules for configuring log level */ + struct ixgbe_fwlog_module_entry module_entries[IXGBE_ACI_FW_LOG_ID_MAX]; +#define IXGBE_FWLOG_OPTION_ARQ_ENA BIT(0) +#define IXGBE_FWLOG_OPTION_UART_ENA BIT(1) + /* set before calling ixgbe_fwlog_init() so the PF registers for firmware + * logging on initialization + */ +#define IXGBE_FWLOG_OPTION_REGISTER_ON_INIT BIT(2) + /* set in the ixgbe_fwlog_get() response if the PF is registered for FW + * logging events over ARQ + */ +#define IXGBE_FWLOG_OPTION_IS_REGISTERED BIT(3) + /* options used to configure firmware logging */ + u16 options; + /* minimum number of log events sent per Admin Receive Queue event */ + u8 log_resolution; +}; + +struct ixgbe_fwlog_data { + u16 data_size; + u8 *data; +}; + +struct ixgbe_fwlog_ring { + struct ixgbe_fwlog_data *rings; + u16 size; + u16 head; + u16 tail; +}; + +#define IXGBE_FWLOG_RING_SIZE_DFLT 256 +#define IXGBE_FWLOG_RING_SIZE_MAX 512 + +/* Set FW Logging configuration (indirect 0xFF30) + * Register for FW Logging (indirect 0xFF31) + * Query FW Logging (indirect 0xFF32) + * FW Log Event (indirect 0xFF33) + * Get FW Log (indirect 0xFF34) + * Clear FW Log (indirect 0xFF35) + */ +struct ixgbe_aci_cmd_fw_log { + u8 cmd_flags; +#define IXGBE_ACI_FW_LOG_CONF_UART_EN BIT(0) +#define IXGBE_ACI_FW_LOG_CONF_AQ_EN BIT(1) +#define IXGBE_ACI_FW_LOG_QUERY_REGISTERED BIT(2) +#define IXGBE_ACI_FW_LOG_CONF_SET_VALID BIT(3) +#define IXGBE_ACI_FW_LOG_AQ_REGISTER BIT(0) +#define IXGBE_ACI_FW_LOG_AQ_QUERY BIT(2) +#define IXGBE_ACI_FW_LOG_PERSISTENT BIT(0) + u8 rsp_flag; +#define IXGBE_ACI_FW_LOG_MORE_DATA BIT(1) + __le16 fw_rt_msb; + union { + struct { + __le32 fw_rt_lsb; + } sync; + struct { + __le16 log_resolution; +#define IXGBE_ACI_FW_LOG_MIN_RESOLUTION (1) +#define IXGBE_ACI_FW_LOG_MAX_RESOLUTION (128) + __le16 mdl_cnt; + } cfg; + } ops; + __le32 addr_high; + __le32 addr_low; +}; + +IXGBE_CHECK_PARAM_LEN(ixgbe_aci_cmd_fw_log); + +/* Response Buffer for: + * Set Firmware Logging Configuration (0xFF30) + * Query FW Logging (0xFF32) + */ +struct ixgbe_aci_cmd_fw_log_cfg_resp { + __le16 module_identifier; + u8 log_level; + u8 rsvd0; +}; + +IXGBE_CHECK_STRUCT_LEN(4, ixgbe_aci_cmd_fw_log_cfg_resp); + +/** + * struct ixgbe_aq_desc - Admin Command (AC) descriptor + * @flags: IXGBE_ACI_FLAG_* flags + * @opcode: Admin command opcode + * @datalen: length in bytes of indirect/external data buffer + * @retval: return value from firmware + * @cookie_high: opaque data high-half + * @cookie_low: opaque data low-half + * @params: command-specific parameters + * + * Descriptor format for commands the driver posts via the Admin Command Interface + * (ACI). The firmware writes back onto the command descriptor and returns + * the result of the command. Asynchronous events that are not an immediate + * result of the command are written to the Admin Command Interface (ACI) using + * the same descriptor format. Descriptors are in little-endian notation with + * 32-bit words. + */ +struct ixgbe_aci_desc { + __le16 flags; + __le16 opcode; + __le16 datalen; + __le16 retval; + __le32 cookie_high; + __le32 cookie_low; + union { + u8 raw[16]; + struct ixgbe_aci_cmd_generic generic; + struct ixgbe_aci_cmd_get_ver get_ver; + struct ixgbe_aci_cmd_driver_ver driver_ver; + struct ixgbe_aci_cmd_get_exp_err exp_err; + struct ixgbe_aci_cmd_req_res res_owner; + struct ixgbe_aci_cmd_list_caps get_cap; + struct ixgbe_aci_cmd_disable_rxen disable_rxen; + struct ixgbe_aci_cmd_get_fw_event get_fw_event; + struct ixgbe_aci_cmd_get_phy_caps get_phy; + struct ixgbe_aci_cmd_set_phy_cfg set_phy; + struct ixgbe_aci_cmd_restart_an restart_an; + struct ixgbe_aci_cmd_get_link_status get_link_status; + struct ixgbe_aci_cmd_set_event_mask set_event_mask; +#ifndef NO_PTP_SUPPORT + struct ixgbe_aci_cmd_set_ptp_by_phy set_ptp_by_phy; + struct ixgbe_aci_cmd_get_ptp_by_phy_resp get_ptp_by_phy_resp; +#endif /* !NO_PTP_SUPPORT */ + struct ixgbe_aci_cmd_get_link_topo get_link_topo; +#if !defined(NO_PTP_SUPPORT) + struct ixgbe_aci_cmd_get_link_topo_pin get_link_topo_pin; +#endif /* !NO_PTP_SUPPORT */ + struct ixgbe_aci_cmd_i2c read_write_i2c; + struct ixgbe_aci_cmd_read_i2c_resp read_i2c_resp; + struct ixgbe_aci_cmd_mdio read_write_mdio; + struct ixgbe_aci_cmd_mdio read_mdio; + struct ixgbe_aci_cmd_mdio write_mdio; + struct ixgbe_aci_cmd_set_port_id_led set_port_id_led; + struct ixgbe_aci_cmd_gpio_by_func read_write_gpio_by_func; + struct ixgbe_aci_cmd_gpio read_write_gpio; + struct ixgbe_aci_cmd_sff_eeprom read_write_sff_param; + struct ixgbe_aci_cmd_prog_topo_dev_nvm prog_topo_dev_nvm; + struct ixgbe_aci_cmd_read_topo_dev_nvm read_topo_dev_nvm; + struct ixgbe_aci_cmd_nvm nvm; + struct ixgbe_aci_cmd_nvm_cfg nvm_cfg; + struct ixgbe_aci_cmd_nvm_checksum nvm_checksum; + struct ixgbe_aci_cmd_nvm_pkg_data pkg_data; + struct ixgbe_aci_cmd_nvm_pass_comp_tbl pass_comp_tbl; + struct ixgbe_aci_cmd_read_write_alt_direct read_write_alt_direct; + struct ixgbe_aci_cmd_read_write_alt_indirect read_write_alt_indirect; + struct ixgbe_aci_cmd_done_alt_write done_alt_write; + struct ixgbe_aci_cmd_clear_port_alt_write clear_port_alt_write; + struct ixgbe_aci_cmd_debug_dump_internals debug_dump; + struct ixgbe_aci_cmd_set_health_status_config + set_health_status_config; + struct ixgbe_aci_cmd_get_supported_health_status_codes + get_supported_health_status_codes; + struct ixgbe_aci_cmd_get_health_status get_health_status; + struct ixgbe_aci_cmd_clear_health_status clear_health_status; + struct ixgbe_aci_cmd_fw_log fw_log; + struct ixgbe_aci_cmd_nvm_sanitization nvm_sanitization; + } params; +}; + +/* LKV-specific adapter context structures */ + +struct ixgbe_link_status { + /* Refer to ixgbe_aci_phy_type for bits definition */ + u64 phy_type_low; + u64 phy_type_high; + u8 topo_media_conflict; + u16 max_frame_size; + u16 link_speed; + u16 req_speeds; + u8 link_cfg_err; + u8 lse_ena; /* Link Status Event notification */ + u8 link_info; + u8 an_info; + u8 ext_info; + u8 fec_info; + u8 pacing; + /* Refer to #define from module_type[IXGBE_ACI_MODULE_TYPE_TOTAL_BYTE] of + * ixgbe_aci_get_phy_caps structure + */ + u8 module_type[IXGBE_ACI_MODULE_TYPE_TOTAL_BYTE]; + u8 eee_status; +}; + +/* Common HW capabilities for SW use */ +struct ixgbe_hw_common_caps { + /* Write CSR protection */ + u64 wr_csr_prot; + u32 switching_mode; + /* switching mode supported - EVB switching (including cloud) */ +#define IXGBE_NVM_IMAGE_TYPE_EVB 0x0 + + /* Manageability mode & supported protocols over MCTP */ + u32 mgmt_mode; +#define IXGBE_MGMT_MODE_PASS_THRU_MODE_M 0xF +#define IXGBE_MGMT_MODE_CTL_INTERFACE_M 0xF0 +#define IXGBE_MGMT_MODE_REDIR_SB_INTERFACE_M 0xF00 + + u32 mgmt_protocols_mctp; +#define IXGBE_MGMT_MODE_PROTO_RSVD BIT(0) +#define IXGBE_MGMT_MODE_PROTO_PLDM BIT(1) +#define IXGBE_MGMT_MODE_PROTO_OEM BIT(2) +#define IXGBE_MGMT_MODE_PROTO_NC_SI BIT(3) + + u32 os2bmc; + u32 valid_functions; + /* DCB capabilities */ + u32 active_tc_bitmap; + u32 maxtc; + + /* RSS related capabilities */ + u32 rss_table_size; /* 512 for PFs and 64 for VFs */ + u32 rss_table_entry_width; /* RSS Entry width in bits */ + + /* Tx/Rx queues */ + u32 num_rxq; /* Number/Total Rx queues */ + u32 rxq_first_id; /* First queue ID for Rx queues */ + u32 num_txq; /* Number/Total Tx queues */ + u32 txq_first_id; /* First queue ID for Tx queues */ + + /* MSI-X vectors */ + u32 num_msix_vectors; + u32 msix_vector_first_id; + + /* Max MTU for function or device */ + u32 max_mtu; + + /* WOL related */ + u32 num_wol_proxy_fltr; + u32 wol_proxy_vsi_seid; + + /* LED/SDP pin count */ + u32 led_pin_num; + u32 sdp_pin_num; + + /* LED/SDP - Supports up to 12 LED pins and 8 SDP signals */ +#define IXGBE_MAX_SUPPORTED_GPIO_LED 12 +#define IXGBE_MAX_SUPPORTED_GPIO_SDP 8 + u8 led[IXGBE_MAX_SUPPORTED_GPIO_LED]; + u8 sdp[IXGBE_MAX_SUPPORTED_GPIO_SDP]; + /* VMDQ */ + u8 vmdq; /* VMDQ supported */ + + /* EVB capabilities */ + u8 evb_802_1_qbg; /* Edge Virtual Bridging */ + u8 evb_802_1_qbh; /* Bridge Port Extension */ + + u8 dcb; + u8 iscsi; +#ifndef NO_PTP_SUPPORT + u8 ieee_1588; +#endif + u8 mgmt_cem; + + /* WoL and APM support */ +#define IXGBE_WOL_SUPPORT_M BIT(0) +#define IXGBE_ACPI_PROG_MTHD_M BIT(1) +#define IXGBE_PROXY_SUPPORT_M BIT(2) + u8 apm_wol_support; + u8 acpi_prog_mthd; + u8 proxy_support; + u8 eee_support; +#define IXGBE_EEE_SUPPORT_100BASE_TX BIT(0) +#define IXGBE_EEE_SUPPORT_1000BASE_T BIT(1) +#define IXGBE_EEE_SUPPORT_10GBASE_T BIT(2) +#define IXGBE_EEE_SUPPORT_5GBASE_T BIT(3) +#define IXGBE_EEE_SUPPORT_2_5GBASE_T BIT(4) + bool nvm_update_pending_nvm; + bool nvm_update_pending_orom; + bool nvm_update_pending_netlist; +#define IXGBE_NVM_PENDING_NVM_IMAGE BIT(0) +#define IXGBE_NVM_PENDING_OROM BIT(1) +#define IXGBE_NVM_PENDING_NETLIST BIT(2) + bool sec_rev_disabled; + bool update_disabled; + bool nvm_unified_update; + bool netlist_auth; +#define IXGBE_NVM_MGMT_SEC_REV_DISABLED BIT(0) +#define IXGBE_NVM_MGMT_UPDATE_DISABLED BIT(1) +#define IXGBE_NVM_MGMT_UNIFIED_UPD_SUPPORT BIT(3) +#define IXGBE_NVM_MGMT_NETLIST_AUTH_SUPPORT BIT(5) + bool no_drop_policy_support; + /* PCIe reset avoidance */ + bool pcie_reset_avoidance; /* false: not supported, true: supported */ + /* Post update reset restriction */ + bool reset_restrict_support; /* false: not supported, true: supported */ + + /* External topology device images within the NVM */ +#define IXGBE_EXT_TOPO_DEV_IMG_COUNT 4 + u32 ext_topo_dev_img_ver_high[IXGBE_EXT_TOPO_DEV_IMG_COUNT]; + u32 ext_topo_dev_img_ver_low[IXGBE_EXT_TOPO_DEV_IMG_COUNT]; + u8 ext_topo_dev_img_part_num[IXGBE_EXT_TOPO_DEV_IMG_COUNT]; +#define IXGBE_EXT_TOPO_DEV_IMG_PART_NUM_S 8 +#define IXGBE_EXT_TOPO_DEV_IMG_PART_NUM_M \ + MAKEMASK(0xFF, IXGBE_EXT_TOPO_DEV_IMG_PART_NUM_S) + bool ext_topo_dev_img_load_en[IXGBE_EXT_TOPO_DEV_IMG_COUNT]; +#define IXGBE_EXT_TOPO_DEV_IMG_LOAD_EN BIT(0) + bool ext_topo_dev_img_prog_en[IXGBE_EXT_TOPO_DEV_IMG_COUNT]; +#define IXGBE_EXT_TOPO_DEV_IMG_PROG_EN BIT(1) + /* Support for OROM update in Recovery Mode. */ + bool orom_recovery_update; + bool next_cluster_id_support; +#ifndef NO_PTP_SUPPORT + bool ptp_by_phy_support : 1; + bool ptp_by_phy_ll : 1; +#endif /* !NO_PTP_SUPPORT */ +}; + +#ifndef NO_PTP_SUPPORT +/* IEEE 1588 TIME_SYNC specific info */ +/* Function specific definitions */ +#define IXGBE_TS_FUNC_ENA_M BIT(0) +#define IXGBE_TS_SRC_TMR_OWND_M BIT(1) +#define IXGBE_TS_TMR_ENA_M BIT(2) +#define IXGBE_TS_TMR_IDX_OWND_S 4 +#define IXGBE_TS_TMR_IDX_OWND_M BIT(4) +#define IXGBE_TS_CLK_FREQ_S 16 +#define IXGBE_TS_CLK_FREQ_M MAKEMASK(0x7, IXGBE_TS_CLK_FREQ_S) +#define IXGBE_TS_CLK_SRC_S 20 +#define IXGBE_TS_CLK_SRC_M BIT(20) +#define IXGBE_TS_TMR_IDX_ASSOC_S 24 +#define IXGBE_TS_TMR_IDX_ASSOC_M BIT(24) + +/* TIME_REF clock rate specification */ +enum ixgbe_time_ref_freq { + IXGBE_TIME_REF_FREQ_25_000 = 0, + IXGBE_TIME_REF_FREQ_122_880 = 1, + IXGBE_TIME_REF_FREQ_125_000 = 2, + IXGBE_TIME_REF_FREQ_153_600 = 3, + IXGBE_TIME_REF_FREQ_156_250 = 4, + IXGBE_TIME_REF_FREQ_245_760 = 5, + + NUM_IXGBE_TIME_REF_FREQ +}; + +struct ixgbe_ts_func_info { + /* Function specific info */ + enum ixgbe_time_ref_freq time_ref; + u8 clk_freq; + u8 clk_src; + u8 tmr_index_assoc; + u8 ena; + u8 tmr_index_owned; + u8 src_tmr_owned; + u8 tmr_ena; +}; + +/* Device specific definitions */ +#define IXGBE_TS_TMR0_OWNR_M 0x7 +#define IXGBE_TS_TMR0_OWND_M BIT(3) +#define IXGBE_TS_TMR1_OWNR_S 4 +#define IXGBE_TS_TMR1_OWNR_M MAKEMASK(0x7, IXGBE_TS_TMR1_OWNR_S) +#define IXGBE_TS_TMR1_OWND_M BIT(7) +#define IXGBE_TS_DEV_ENA_M BIT(24) +#define IXGBE_TS_TMR0_ENA_M BIT(25) +#define IXGBE_TS_TMR1_ENA_M BIT(26) + +struct ixgbe_ts_dev_info { + /* Device specific info */ + u32 ena_ports; + u32 tmr_own_map; + u32 tmr0_owner; + u32 tmr1_owner; + u8 tmr0_owned; + u8 tmr1_owned; + u8 ena; + u8 tmr0_ena; + u8 tmr1_ena; +}; +#endif /* !NO_PTP_SUPPORT */ + +#pragma pack(1) +struct ixgbe_orom_civd_info { + u8 signature[4]; /* Must match ASCII '$CIV' characters */ + u8 checksum; /* Simple modulo 256 sum of all structure bytes must equal 0 */ + __le32 combo_ver; /* Combo Image Version number */ + u8 combo_name_len; /* Length of the unicode combo image version string, max of 32 */ + __le16 combo_name[32]; /* Unicode string representing the Combo Image version */ +}; +#pragma pack() + +/* Function specific capabilities */ +struct ixgbe_hw_func_caps { + struct ixgbe_hw_common_caps common_cap; + u32 guar_num_vsi; +#ifndef NO_PTP_SUPPORT + struct ixgbe_ts_func_info ts_func_info; +#endif /* !NO_PTP_SUPPORT */ + bool no_drop_policy_ena; +}; + +/* Device wide capabilities */ +struct ixgbe_hw_dev_caps { + struct ixgbe_hw_common_caps common_cap; + u32 num_vsi_allocd_to_host; /* Excluding EMP VSI */ + u32 num_flow_director_fltr; /* Number of FD filters available */ +#ifndef NO_PTP_SUPPORT + struct ixgbe_ts_dev_info ts_dev_info; +#endif /* !NO_PTP_SUPPORT */ + u32 num_funcs; +}; + +/* ACI event information */ +struct ixgbe_aci_event { + struct ixgbe_aci_desc desc; + u16 msg_len; + u16 buf_len; + u8 *msg_buf; +}; + +struct ixgbe_aci_info { + enum ixgbe_aci_err last_status; /* last status of sent admin command */ + struct ixgbe_lock lock; /* admin command interface lock */ +}; + +/* Minimum Security Revision information */ +struct ixgbe_minsrev_info { + u32 nvm; + u32 orom; + u8 nvm_valid : 1; + u8 orom_valid : 1; +}; + +/* Enumeration of which flash bank is desired to read from, either the active + * bank or the inactive bank. Used to abstract 1st and 2nd bank notion from + * code which just wants to read the active or inactive flash bank. + */ +enum ixgbe_bank_select { + IXGBE_ACTIVE_FLASH_BANK, + IXGBE_INACTIVE_FLASH_BANK, +}; + +/* Option ROM version information */ +struct ixgbe_orom_info { + u8 major; /* Major version of OROM */ + u8 patch; /* Patch version of OROM */ + u16 build; /* Build version of OROM */ + u32 srev; /* Security revision */ +}; + +/* NVM version information */ +struct ixgbe_nvm_info { + u32 eetrack; + u32 srev; + u8 major; + u8 minor; +}; + +/* netlist version information */ +struct ixgbe_netlist_info { + u32 major; /* major high/low */ + u32 minor; /* minor high/low */ + u32 type; /* type high/low */ + u32 rev; /* revision high/low */ + u32 hash; /* SHA-1 hash word */ + u16 cust_ver; /* customer version */ +}; + +/* Enumeration of possible flash banks for the NVM, OROM, and Netlist modules + * of the flash image. + */ +enum ixgbe_flash_bank { + IXGBE_INVALID_FLASH_BANK, + IXGBE_1ST_FLASH_BANK, + IXGBE_2ND_FLASH_BANK, +}; + +/* information for accessing NVM, OROM, and Netlist flash banks */ +struct ixgbe_bank_info { + u32 nvm_ptr; /* Pointer to 1st NVM bank */ + u32 nvm_size; /* Size of NVM bank */ + u32 orom_ptr; /* Pointer to 1st OROM bank */ + u32 orom_size; /* Size of OROM bank */ + u32 netlist_ptr; /* Pointer to 1st Netlist bank */ + u32 netlist_size; /* Size of Netlist bank */ + enum ixgbe_flash_bank nvm_bank; /* Active NVM bank */ + enum ixgbe_flash_bank orom_bank; /* Active OROM bank */ + enum ixgbe_flash_bank netlist_bank; /* Active Netlist bank */ +}; + +/* Flash Chip Information */ +struct ixgbe_flash_info { + struct ixgbe_orom_info orom; /* Option ROM version info */ + struct ixgbe_nvm_info nvm; /* NVM version information */ + struct ixgbe_netlist_info netlist; /* Netlist version info */ + struct ixgbe_bank_info banks; /* Flash Bank information */ + u32 sr_words; /* Shadow RAM size in words */ + u32 flash_size; /* Size of available flash in bytes */ + u8 blank_nvm_mode; /* is NVM empty (no FW present) */ +}; + +#define IXGBE_NVM_CMD_READ 0x0000000B +#define IXGBE_NVM_CMD_WRITE 0x0000000C + +/* NVM Access command */ +struct ixgbe_nvm_access_cmd { + u32 command; /* NVM command: READ or WRITE */ + u32 offset; /* Offset to read/write, in bytes */ + u32 data_size; /* Size of data field, in bytes */ +}; + +/* NVM Access data */ +struct ixgbe_nvm_access_data { + u32 regval; /* Storage for register value */ +}; + +#ifndef NO_PTP_SUPPORT +#define PROXY_TX_TS_LOW 0x00000100 +#define PROXY_TX_TS_HIGH 0x00000104 +#define PROXY_TX_STS 0x00000108 +#define PROXY_RX_TS_LOW 0x00002410 +#define PROXY_RX_TS_HIGH 0x00002414 +#define PROXY_RX_STS 0x00002418 +#define PROXY_STS_SEQ_ID GENMASK(15, 0) +#define PROXY_STS_ERR GENMASK(29, 16) +#define PROXY_STS_TS_RDY BIT(30) +#define PROXY_STS_TS_INT BIT(31) + +#endif /* !NO_PTP_SUPPORT */ + +/** + * ixgbe_is_mac_E6xx - check if MAC belongs to E600 series + * @mac_type: MAC type to be tested + * + * Return: true if mac_type belongs to E600 series, false otherwise. + */ +#define ixgbe_is_mac_E6xx(mac_type) ((mac_type) == ixgbe_mac_E610) + +#endif /* _IXGBE_TYPE_E610_H_ */ diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_x540.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_x540.c new file mode 100644 index 00000000000..4927935f78d --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_x540.c @@ -0,0 +1,1032 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 1999 - 2026 Intel Corporation */ + +#include "ixgbe_x540.h" +#include "ixgbe_type.h" +#include "ixgbe_api.h" +#include "ixgbe_common.h" +#include "ixgbe_phy.h" + +#define IXGBE_X540_MAX_TX_QUEUES 128 +#define IXGBE_X540_MAX_RX_QUEUES 128 +#define IXGBE_X540_RAR_ENTRIES 128 +#define IXGBE_X540_MC_TBL_SIZE 128 +#define IXGBE_X540_VFT_TBL_SIZE 128 +#define IXGBE_X540_RX_PB_SIZE 384 + +STATIC s32 ixgbe_poll_flash_update_done_X540(struct ixgbe_hw *hw); +STATIC s32 ixgbe_get_swfw_sync_semaphore(struct ixgbe_hw *hw); +STATIC void ixgbe_release_swfw_sync_semaphore(struct ixgbe_hw *hw); + +/** + * ixgbe_init_ops_X540 - Inits func ptrs and MAC type + * @hw: pointer to hardware structure + * + * Initialize the function pointers and assign the MAC type for X540. + * Does not touch the hardware. + **/ +s32 ixgbe_init_ops_X540(struct ixgbe_hw *hw) +{ + struct ixgbe_mac_info *mac = &hw->mac; + struct ixgbe_phy_info *phy = &hw->phy; + struct ixgbe_eeprom_info *eeprom = &hw->eeprom; + s32 ret_val; + u16 i; + + DEBUGFUNC("ixgbe_init_ops_X540"); + + ret_val = ixgbe_init_phy_ops_generic(hw); + ret_val = ixgbe_init_ops_generic(hw); + + /* EEPROM */ + eeprom->ops.init_params = ixgbe_init_eeprom_params_X540; + eeprom->ops.read = ixgbe_read_eerd_X540; + eeprom->ops.read_buffer = ixgbe_read_eerd_buffer_X540; + eeprom->ops.write = ixgbe_write_eewr_X540; + eeprom->ops.write_buffer = ixgbe_write_eewr_buffer_X540; + eeprom->ops.update_checksum = ixgbe_update_eeprom_checksum_X540; + eeprom->ops.validate_checksum = ixgbe_validate_eeprom_checksum_X540; + eeprom->ops.calc_checksum = ixgbe_calc_eeprom_checksum_X540; + + /* PHY */ + phy->ops.init = ixgbe_init_phy_ops_generic; + phy->ops.reset = NULL; + phy->ops.set_phy_power = ixgbe_set_copper_phy_power; + + /* MAC */ + mac->ops.reset_hw = ixgbe_reset_hw_X540; + mac->ops.get_media_type = ixgbe_get_media_type_X540; + mac->ops.get_supported_physical_layer = + ixgbe_get_supported_physical_layer_X540; + mac->ops.read_analog_reg8 = NULL; + mac->ops.write_analog_reg8 = NULL; + mac->ops.start_hw = ixgbe_start_hw_X540; + mac->ops.get_san_mac_addr = ixgbe_get_san_mac_addr_generic; + mac->ops.set_san_mac_addr = ixgbe_set_san_mac_addr_generic; + mac->ops.get_device_caps = ixgbe_get_device_caps_generic; + mac->ops.get_wwn_prefix = ixgbe_get_wwn_prefix_generic; + mac->ops.get_fcoe_boot_status = ixgbe_get_fcoe_boot_status_generic; + mac->ops.acquire_swfw_sync = ixgbe_acquire_swfw_sync_X540; + mac->ops.release_swfw_sync = ixgbe_release_swfw_sync_X540; + mac->ops.init_swfw_sync = ixgbe_init_swfw_sync_X540; + mac->ops.disable_sec_rx_path = ixgbe_disable_sec_rx_path_generic; + mac->ops.enable_sec_rx_path = ixgbe_enable_sec_rx_path_generic; + + /* RAR, Multicast, VLAN */ + mac->ops.set_vmdq = ixgbe_set_vmdq_generic; + mac->ops.set_vmdq_san_mac = ixgbe_set_vmdq_san_mac_generic; + mac->ops.clear_vmdq = ixgbe_clear_vmdq_generic; + mac->ops.insert_mac_addr = ixgbe_insert_mac_addr_generic; + mac->rar_highwater = 1; + mac->ops.set_vfta = ixgbe_set_vfta_generic; + mac->ops.set_vlvf = ixgbe_set_vlvf_generic; + mac->ops.clear_vfta = ixgbe_clear_vfta_generic; + mac->ops.init_uta_tables = ixgbe_init_uta_tables_generic; + mac->ops.set_mac_anti_spoofing = ixgbe_set_mac_anti_spoofing; + mac->ops.set_vlan_anti_spoofing = ixgbe_set_vlan_anti_spoofing; + + /* Link */ + mac->ops.get_link_capabilities = + ixgbe_get_copper_link_capabilities_generic; + mac->ops.setup_link = ixgbe_setup_mac_link_X540; + mac->ops.setup_rxpba = ixgbe_set_rxpba_generic; + mac->ops.check_link = ixgbe_check_mac_link_generic; + + mac->mcft_size = IXGBE_X540_MC_TBL_SIZE; + mac->vft_size = IXGBE_X540_VFT_TBL_SIZE; + mac->num_rar_entries = IXGBE_X540_RAR_ENTRIES; + mac->rx_pb_size = IXGBE_X540_RX_PB_SIZE; + mac->max_rx_queues = IXGBE_X540_MAX_RX_QUEUES; + mac->max_tx_queues = IXGBE_X540_MAX_TX_QUEUES; + mac->max_msix_vectors = ixgbe_get_pcie_msix_count_generic(hw); + + /* + * FWSM register + * ARC supported; valid only if manageability features are + * enabled. + */ + mac->arc_subsystem_valid = !!(IXGBE_READ_REG(hw, IXGBE_FWSM_BY_MAC(hw)) + & IXGBE_FWSM_MODE_MASK); + + for (i = 0; i < 64; i++) + hw->mbx.ops[i].init_params = ixgbe_init_mbx_params_pf; + + /* LEDs */ + mac->ops.blink_led_start = ixgbe_blink_led_start_X540; + mac->ops.blink_led_stop = ixgbe_blink_led_stop_X540; + + /* Manageability interface */ + mac->ops.set_fw_drv_ver = ixgbe_set_fw_drv_ver_generic; + + mac->ops.get_rtrup2tc = ixgbe_dcb_get_rtrup2tc_generic; + + return ret_val; +} + +/** + * ixgbe_get_link_capabilities_X540 - Determines link capabilities + * @hw: pointer to hardware structure + * @speed: pointer to link speed + * @autoneg: true when autoneg or autotry is enabled + * + * Determines the link capabilities by reading the AUTOC register. + **/ +s32 ixgbe_get_link_capabilities_X540(struct ixgbe_hw *hw, + ixgbe_link_speed *speed, + bool *autoneg) +{ + ixgbe_get_copper_link_capabilities_generic(hw, speed, autoneg); + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_get_media_type_X540 - Get media type + * @hw: pointer to hardware structure + * + * Returns the media type (fiber, copper, backplane) + **/ +enum ixgbe_media_type ixgbe_get_media_type_X540(struct ixgbe_hw *hw) +{ + UNREFERENCED_1PARAMETER(hw); + return ixgbe_media_type_copper; +} + +/** + * ixgbe_setup_mac_link_X540 - Sets the auto advertised capabilities + * @hw: pointer to hardware structure + * @speed: new link speed + * @autoneg_wait_to_complete: true when waiting for completion is needed + **/ +s32 ixgbe_setup_mac_link_X540(struct ixgbe_hw *hw, + ixgbe_link_speed speed, + bool autoneg_wait_to_complete) +{ + DEBUGFUNC("ixgbe_setup_mac_link_X540"); + return hw->phy.ops.setup_link_speed(hw, speed, autoneg_wait_to_complete); +} + +/** + * ixgbe_reset_hw_X540 - Perform hardware reset + * @hw: pointer to hardware structure + * + * Resets the hardware by resetting the transmit and receive units, masks + * and clears all interrupts, and perform a reset. + **/ +s32 ixgbe_reset_hw_X540(struct ixgbe_hw *hw) +{ + s32 status; + u32 ctrl, i; + u32 swfw_mask = hw->phy.phy_semaphore_mask; + + DEBUGFUNC("ixgbe_reset_hw_X540"); + + /* Call adapter stop to disable tx/rx and clear interrupts */ + status = hw->mac.ops.stop_adapter(hw); + if (status != IXGBE_SUCCESS) + goto reset_hw_out; + + /* flush pending Tx transactions */ + ixgbe_clear_tx_pending(hw); + +mac_reset_top: + status = hw->mac.ops.acquire_swfw_sync(hw, swfw_mask); + if (status != IXGBE_SUCCESS) { + ERROR_REPORT2(IXGBE_ERROR_CAUTION, + "semaphore failed with %d", status); + return IXGBE_ERR_SWFW_SYNC; + } + ctrl = IXGBE_CTRL_RST; + ctrl |= IXGBE_READ_REG(hw, IXGBE_CTRL); + IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl); + IXGBE_WRITE_FLUSH(hw); + hw->mac.ops.release_swfw_sync(hw, swfw_mask); + + /* Poll for reset bit to self-clear indicating reset is complete */ + for (i = 0; i < 10; i++) { + usec_delay(1); + ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL); + if (!(ctrl & IXGBE_CTRL_RST_MASK)) + break; + } + + if (ctrl & IXGBE_CTRL_RST_MASK) { + status = IXGBE_ERR_RESET_FAILED; + ERROR_REPORT1(IXGBE_ERROR_POLLING, + "Reset polling failed to complete.\n"); + } + msec_delay(100); + + /* + * Double resets are required for recovery from certain error + * conditions. Between resets, it is necessary to stall to allow time + * for any pending HW events to complete. + */ + if (hw->mac.flags & IXGBE_FLAGS_DOUBLE_RESET_REQUIRED) { + hw->mac.flags &= ~IXGBE_FLAGS_DOUBLE_RESET_REQUIRED; + goto mac_reset_top; + } + + /* Set the Rx packet buffer size. */ + IXGBE_WRITE_REG(hw, IXGBE_RXPBSIZE(0), 384 << IXGBE_RXPBSIZE_SHIFT); + + /* Store the permanent mac address */ + hw->mac.ops.get_mac_addr(hw, hw->mac.perm_addr); + + /* + * Store MAC address from RAR0, clear receive address registers, and + * clear the multicast table. Also reset num_rar_entries to 128, + * since we modify this value when programming the SAN MAC address. + */ + hw->mac.num_rar_entries = 128; + hw->mac.ops.init_rx_addrs(hw); + + /* Store the permanent SAN mac address */ + hw->mac.ops.get_san_mac_addr(hw, hw->mac.san_addr); + + /* Add the SAN MAC address to the RAR only if it's a valid address */ + if (ixgbe_validate_mac_addr(hw->mac.san_addr) == 0) { + /* Save the SAN MAC RAR index */ + hw->mac.san_mac_rar_index = hw->mac.num_rar_entries - 1; + + hw->mac.ops.set_rar(hw, hw->mac.san_mac_rar_index, + hw->mac.san_addr, 0, IXGBE_RAH_AV); + + /* clear VMDq pool/queue selection for this RAR */ + hw->mac.ops.clear_vmdq(hw, hw->mac.san_mac_rar_index, + IXGBE_CLEAR_VMDQ_ALL); + + /* Reserve the last RAR for the SAN MAC address */ + hw->mac.num_rar_entries--; + } + + /* Store the alternative WWNN/WWPN prefix */ + hw->mac.ops.get_wwn_prefix(hw, &hw->mac.wwnn_prefix, + &hw->mac.wwpn_prefix); + +reset_hw_out: + return status; +} + +/** + * ixgbe_start_hw_X540 - Prepare hardware for Tx/Rx + * @hw: pointer to hardware structure + * + * Starts the hardware using the generic start_hw function + * and the generation start_hw function. + * Then performs revision-specific operations, if any. + **/ +s32 ixgbe_start_hw_X540(struct ixgbe_hw *hw) +{ + s32 ret_val = IXGBE_SUCCESS; + + DEBUGFUNC("ixgbe_start_hw_X540"); + + ret_val = ixgbe_start_hw_generic(hw); + if (ret_val != IXGBE_SUCCESS) + goto out; + + ixgbe_start_hw_gen2(hw); + +out: + return ret_val; +} + +/** + * ixgbe_get_supported_physical_layer_X540 - Returns physical layer type + * @hw: pointer to hardware structure + * + * Determines physical layer capabilities of the current configuration. + **/ +u64 ixgbe_get_supported_physical_layer_X540(struct ixgbe_hw *hw) +{ + u64 physical_layer = IXGBE_PHYSICAL_LAYER_UNKNOWN; + u16 ext_ability = 0; + + DEBUGFUNC("ixgbe_get_supported_physical_layer_X540"); + + hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_EXT_ABILITY, + IXGBE_MDIO_PMA_PMD_DEV_TYPE, &ext_ability); + if (ext_ability & IXGBE_MDIO_PHY_10GBASET_ABILITY) + physical_layer |= IXGBE_PHYSICAL_LAYER_10GBASE_T; + if (ext_ability & IXGBE_MDIO_PHY_1000BASET_ABILITY) + physical_layer |= IXGBE_PHYSICAL_LAYER_1000BASE_T; + if (ext_ability & IXGBE_MDIO_PHY_100BASETX_ABILITY) + physical_layer |= IXGBE_PHYSICAL_LAYER_100BASE_TX; + + return physical_layer; +} + +/** + * ixgbe_init_eeprom_params_X540 - Initialize EEPROM params + * @hw: pointer to hardware structure + * + * Initializes the EEPROM parameters ixgbe_eeprom_info within the + * ixgbe_hw struct in order to set up EEPROM access. + **/ +s32 ixgbe_init_eeprom_params_X540(struct ixgbe_hw *hw) +{ + struct ixgbe_eeprom_info *eeprom = &hw->eeprom; + u32 eec; + u16 eeprom_size; + + DEBUGFUNC("ixgbe_init_eeprom_params_X540"); + + if (eeprom->type == ixgbe_eeprom_uninitialized) { + eeprom->semaphore_delay = 10; + eeprom->type = ixgbe_flash; + + eec = IXGBE_READ_REG(hw, IXGBE_EEC_BY_MAC(hw)); + eeprom_size = (u16)((eec & IXGBE_EEC_SIZE) >> + IXGBE_EEC_SIZE_SHIFT); + eeprom->word_size = 1 << (eeprom_size + + IXGBE_EEPROM_WORD_SIZE_SHIFT); + + hw_dbg(hw, "Eeprom params: type = %d, size = %d\n", + eeprom->type, eeprom->word_size); + } + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_read_eerd_X540- Read EEPROM word using EERD + * @hw: pointer to hardware structure + * @offset: offset of word in the EEPROM to read + * @data: word read from the EEPROM + * + * Reads a 16 bit word from the EEPROM using the EERD register. + **/ +s32 ixgbe_read_eerd_X540(struct ixgbe_hw *hw, u16 offset, u16 *data) +{ + s32 status = IXGBE_SUCCESS; + + DEBUGFUNC("ixgbe_read_eerd_X540"); + if (hw->mac.ops.acquire_swfw_sync(hw, IXGBE_GSSR_EEP_SM) == + IXGBE_SUCCESS) { + status = ixgbe_read_eerd_generic(hw, offset, data); + hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_EEP_SM); + } else { + status = IXGBE_ERR_SWFW_SYNC; + } + + return status; +} + +/** + * ixgbe_read_eerd_buffer_X540- Read EEPROM word(s) using EERD + * @hw: pointer to hardware structure + * @offset: offset of word in the EEPROM to read + * @words: number of words + * @data: word(s) read from the EEPROM + * + * Reads a 16 bit word(s) from the EEPROM using the EERD register. + **/ +s32 ixgbe_read_eerd_buffer_X540(struct ixgbe_hw *hw, + u16 offset, u16 words, u16 *data) +{ + s32 status = IXGBE_SUCCESS; + + DEBUGFUNC("ixgbe_read_eerd_buffer_X540"); + if (hw->mac.ops.acquire_swfw_sync(hw, IXGBE_GSSR_EEP_SM) == + IXGBE_SUCCESS) { + status = ixgbe_read_eerd_buffer_generic(hw, offset, + words, data); + hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_EEP_SM); + } else { + status = IXGBE_ERR_SWFW_SYNC; + } + + return status; +} + +/** + * ixgbe_write_eewr_X540 - Write EEPROM word using EEWR + * @hw: pointer to hardware structure + * @offset: offset of word in the EEPROM to write + * @data: word write to the EEPROM + * + * Write a 16 bit word to the EEPROM using the EEWR register. + **/ +s32 ixgbe_write_eewr_X540(struct ixgbe_hw *hw, u16 offset, u16 data) +{ + s32 status = IXGBE_SUCCESS; + + DEBUGFUNC("ixgbe_write_eewr_X540"); + if (hw->mac.ops.acquire_swfw_sync(hw, IXGBE_GSSR_EEP_SM) == + IXGBE_SUCCESS) { + status = ixgbe_write_eewr_generic(hw, offset, data); + hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_EEP_SM); + } else { + status = IXGBE_ERR_SWFW_SYNC; + } + + return status; +} + +/** + * ixgbe_write_eewr_buffer_X540 - Write EEPROM word(s) using EEWR + * @hw: pointer to hardware structure + * @offset: offset of word in the EEPROM to write + * @words: number of words + * @data: word(s) write to the EEPROM + * + * Write a 16 bit word(s) to the EEPROM using the EEWR register. + **/ +s32 ixgbe_write_eewr_buffer_X540(struct ixgbe_hw *hw, + u16 offset, u16 words, u16 *data) +{ + s32 status = IXGBE_SUCCESS; + + DEBUGFUNC("ixgbe_write_eewr_buffer_X540"); + if (hw->mac.ops.acquire_swfw_sync(hw, IXGBE_GSSR_EEP_SM) == + IXGBE_SUCCESS) { + status = ixgbe_write_eewr_buffer_generic(hw, offset, + words, data); + hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_EEP_SM); + } else { + status = IXGBE_ERR_SWFW_SYNC; + } + + return status; +} + +/** + * ixgbe_calc_eeprom_checksum_X540 - Calculates and returns the checksum + * + * This function does not use synchronization for EERD and EEWR. It can + * be used internally by function which utilize ixgbe_acquire_swfw_sync_X540. + * + * @hw: pointer to hardware structure + * + * Returns a negative error code on error, or the 16-bit checksum + **/ +s32 ixgbe_calc_eeprom_checksum_X540(struct ixgbe_hw *hw) +{ + u16 i, j; + u16 checksum = 0; + u16 length = 0; + u16 pointer = 0; + u16 word = 0; + u16 ptr_start = IXGBE_PCIE_ANALOG_PTR; + + /* Do not use hw->eeprom.ops.read because we do not want to take + * the synchronization semaphores here. Instead use + * ixgbe_read_eerd_generic + */ + + DEBUGFUNC("ixgbe_calc_eeprom_checksum_X540"); + + /* Include 0x0 up to IXGBE_EEPROM_CHECKSUM; do not include the + * checksum itself + */ + for (i = 0; i < IXGBE_EEPROM_CHECKSUM; i++) { + if (ixgbe_read_eerd_generic(hw, i, &word)) { + hw_dbg(hw, "EEPROM read failed\n"); + return IXGBE_ERR_EEPROM; + } + checksum += word; + } + + /* Include all data from pointers 0x3, 0x6-0xE. This excludes the + * FW, PHY module, and PCIe Expansion/Option ROM pointers. + */ + for (i = ptr_start; i < IXGBE_FW_PTR; i++) { + if (i == IXGBE_PHY_PTR || i == IXGBE_OPTION_ROM_PTR) + continue; + + if (ixgbe_read_eerd_generic(hw, i, &pointer)) { + hw_dbg(hw, "EEPROM read failed\n"); + return IXGBE_ERR_EEPROM; + } + + /* Skip pointer section if the pointer is invalid. */ + if (pointer == 0xFFFF || pointer == 0 || + pointer >= hw->eeprom.word_size) + continue; + + if (ixgbe_read_eerd_generic(hw, pointer, &length)) { + hw_dbg(hw, "EEPROM read failed\n"); + return IXGBE_ERR_EEPROM; + } + + /* Skip pointer section if length is invalid. */ + if (length == 0xFFFF || length == 0 || + (u32)length > hw->eeprom.word_size - (u32)pointer) + continue; + + for (j = pointer + 1; j <= pointer + length; j++) { + if (ixgbe_read_eerd_generic(hw, j, &word)) { + hw_dbg(hw, "EEPROM read failed\n"); + return IXGBE_ERR_EEPROM; + } + checksum += word; + } + } + + checksum = (u16)IXGBE_EEPROM_SUM - checksum; + + return (s32)checksum; +} + +/** + * ixgbe_validate_eeprom_checksum_X540 - Validate EEPROM checksum + * @hw: pointer to hardware structure + * @checksum_val: calculated checksum + * + * Performs checksum calculation and validates the EEPROM checksum. If the + * caller does not need checksum_val, the value can be NULL. + **/ +s32 ixgbe_validate_eeprom_checksum_X540(struct ixgbe_hw *hw, + u16 *checksum_val) +{ + s32 status; + u16 checksum; + u16 read_checksum = 0; + + DEBUGFUNC("ixgbe_validate_eeprom_checksum_X540"); + + /* Read the first word from the EEPROM. If this times out or fails, do + * not continue or we could be in for a very long wait while every + * EEPROM read fails + */ + status = hw->eeprom.ops.read(hw, 0, &checksum); + if (status) { + hw_dbg(hw, "EEPROM read failed\n"); + return status; + } + + if (hw->mac.ops.acquire_swfw_sync(hw, IXGBE_GSSR_EEP_SM)) + return IXGBE_ERR_SWFW_SYNC; + + status = hw->eeprom.ops.calc_checksum(hw); + if (status < 0) + goto out; + + checksum = (u16)(status & 0xffff); + + /* Do not use hw->eeprom.ops.read because we do not want to take + * the synchronization semaphores twice here. + */ + status = ixgbe_read_eerd_generic(hw, IXGBE_EEPROM_CHECKSUM, + &read_checksum); + if (status) + goto out; + + /* Verify read checksum from EEPROM is the same as + * calculated checksum + */ + if (read_checksum != checksum) { + ERROR_REPORT1(IXGBE_ERROR_INVALID_STATE, + "Invalid EEPROM checksum"); + status = IXGBE_ERR_EEPROM_CHECKSUM; + } + + /* If the user cares, return the calculated checksum */ + if (checksum_val) + *checksum_val = checksum; + +out: + hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_EEP_SM); + + return status; +} + +/** + * ixgbe_update_eeprom_checksum_X540 - Updates the EEPROM checksum and flash + * @hw: pointer to hardware structure + * + * After writing EEPROM to shadow RAM using EEWR register, software calculates + * checksum and updates the EEPROM and instructs the hardware to update + * the flash. + **/ +s32 ixgbe_update_eeprom_checksum_X540(struct ixgbe_hw *hw) +{ + s32 status; + u16 checksum; + + DEBUGFUNC("ixgbe_update_eeprom_checksum_X540"); + + /* Read the first word from the EEPROM. If this times out or fails, do + * not continue or we could be in for a very long wait while every + * EEPROM read fails + */ + status = hw->eeprom.ops.read(hw, 0, &checksum); + if (status) { + hw_dbg(hw, "EEPROM read failed\n"); + return status; + } + + if (hw->mac.ops.acquire_swfw_sync(hw, IXGBE_GSSR_EEP_SM)) + return IXGBE_ERR_SWFW_SYNC; + + status = hw->eeprom.ops.calc_checksum(hw); + if (status < 0) + goto out; + + checksum = (u16)(status & 0xffff); + + /* Do not use hw->eeprom.ops.write because we do not want to + * take the synchronization semaphores twice here. + */ + status = ixgbe_write_eewr_generic(hw, IXGBE_EEPROM_CHECKSUM, checksum); + if (status) + goto out; + + status = ixgbe_update_flash_X540(hw); + +out: + hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_EEP_SM); + + return status; +} + +/** + * ixgbe_update_flash_X540 - Instruct HW to copy EEPROM to Flash device + * @hw: pointer to hardware structure + * + * Set FLUP (bit 23) of the EEC register to instruct Hardware to copy + * EEPROM from shadow RAM to the flash device. + **/ +s32 ixgbe_update_flash_X540(struct ixgbe_hw *hw) +{ + u32 flup; + s32 status; + + DEBUGFUNC("ixgbe_update_flash_X540"); + + status = ixgbe_poll_flash_update_done_X540(hw); + if (status == IXGBE_ERR_EEPROM) { + hw_dbg(hw, "Flash update time out\n"); + goto out; + } + + flup = IXGBE_READ_REG(hw, IXGBE_EEC_BY_MAC(hw)) | IXGBE_EEC_FLUP; + IXGBE_WRITE_REG(hw, IXGBE_EEC_BY_MAC(hw), flup); + + status = ixgbe_poll_flash_update_done_X540(hw); + if (status == IXGBE_SUCCESS) + hw_dbg(hw, "Flash update complete\n"); + else + hw_dbg(hw, "Flash update time out\n"); + + if (hw->mac.type == ixgbe_mac_X540 && hw->revision_id == 0) { + flup = IXGBE_READ_REG(hw, IXGBE_EEC_BY_MAC(hw)); + + if (flup & IXGBE_EEC_SEC1VAL) { + flup |= IXGBE_EEC_FLUP; + IXGBE_WRITE_REG(hw, IXGBE_EEC_BY_MAC(hw), flup); + } + + status = ixgbe_poll_flash_update_done_X540(hw); + if (status == IXGBE_SUCCESS) + hw_dbg(hw, "Flash update complete\n"); + else + hw_dbg(hw, "Flash update time out\n"); + } +out: + return status; +} + +/** + * ixgbe_poll_flash_update_done_X540 - Poll flash update status + * @hw: pointer to hardware structure + * + * Polls the FLUDONE (bit 26) of the EEC Register to determine when the + * flash update is done. + **/ +STATIC s32 ixgbe_poll_flash_update_done_X540(struct ixgbe_hw *hw) +{ + u32 i; + u32 reg; + s32 status = IXGBE_ERR_EEPROM; + + DEBUGFUNC("ixgbe_poll_flash_update_done_X540"); + + for (i = 0; i < IXGBE_FLUDONE_ATTEMPTS; i++) { + reg = IXGBE_READ_REG(hw, IXGBE_EEC_BY_MAC(hw)); + if (reg & IXGBE_EEC_FLUDONE) { + status = IXGBE_SUCCESS; + break; + } + msec_delay(5); + } + + if (i == IXGBE_FLUDONE_ATTEMPTS) + ERROR_REPORT1(IXGBE_ERROR_POLLING, + "Flash update status polling timed out"); + + return status; +} + +/** + * ixgbe_acquire_swfw_sync_X540 - Acquire SWFW semaphore + * @hw: pointer to hardware structure + * @mask: Mask to specify which semaphore to acquire + * + * Acquires the SWFW semaphore thought the SW_FW_SYNC register for + * the specified function (CSR, PHY0, PHY1, NVM, Flash) + **/ +s32 ixgbe_acquire_swfw_sync_X540(struct ixgbe_hw *hw, u32 mask) +{ + u32 swmask = mask & IXGBE_GSSR_NVM_PHY_MASK; + u32 fwmask = swmask << 5; + u32 swi2c_mask = mask & IXGBE_GSSR_I2C_MASK; + u32 timeout = 200; + u32 hwmask = 0; + u32 swfw_sync; + u32 i; + + DEBUGFUNC("ixgbe_acquire_swfw_sync_X540"); + + if (swmask & IXGBE_GSSR_EEP_SM) + hwmask |= IXGBE_GSSR_FLASH_SM; + + /* SW only mask doesn't have FW bit pair */ + if (mask & IXGBE_GSSR_SW_MNG_SM) + swmask |= IXGBE_GSSR_SW_MNG_SM; + + swmask |= swi2c_mask; + fwmask |= swi2c_mask << 2; + if (hw->mac.type >= ixgbe_mac_X550) + timeout = 1000; + + for (i = 0; i < timeout; i++) { + /* SW NVM semaphore bit is used for access to all + * SW_FW_SYNC bits (not just NVM) + */ + if (ixgbe_get_swfw_sync_semaphore(hw)) { + hw_dbg(hw, "Failed to get NVM access and register semaphore, returning IXGBE_ERR_SWFW_SYNC\n"); + return IXGBE_ERR_SWFW_SYNC; + } + + swfw_sync = IXGBE_READ_REG(hw, IXGBE_SWFW_SYNC_BY_MAC(hw)); + if (!(swfw_sync & (fwmask | swmask | hwmask))) { + swfw_sync |= swmask; + IXGBE_WRITE_REG(hw, IXGBE_SWFW_SYNC_BY_MAC(hw), + swfw_sync); + ixgbe_release_swfw_sync_semaphore(hw); + return IXGBE_SUCCESS; + } + /* Firmware currently using resource (fwmask), hardware + * currently using resource (hwmask), or other software + * thread currently using resource (swmask) + */ + ixgbe_release_swfw_sync_semaphore(hw); + msec_delay(5); + } + + /* If the resource is not released by the FW/HW the SW can assume that + * the FW/HW malfunctions. In that case the SW should set the SW bit(s) + * of the requested resource(s) while ignoring the corresponding FW/HW + * bits in the SW_FW_SYNC register. + */ + if (ixgbe_get_swfw_sync_semaphore(hw)) { + hw_dbg(hw, "Failed to get NVM sempahore and register semaphore while forcefully ignoring FW sempahore bit(s) and setting SW semaphore bit(s), returning IXGBE_ERR_SWFW_SYNC\n"); + return IXGBE_ERR_SWFW_SYNC; + } + swfw_sync = IXGBE_READ_REG(hw, IXGBE_SWFW_SYNC_BY_MAC(hw)); + if (swfw_sync & (fwmask | hwmask)) { + swfw_sync |= swmask; + IXGBE_WRITE_REG(hw, IXGBE_SWFW_SYNC_BY_MAC(hw), swfw_sync); + ixgbe_release_swfw_sync_semaphore(hw); + msec_delay(5); + return IXGBE_SUCCESS; + } + /* If the resource is not released by other SW the SW can assume that + * the other SW malfunctions. In that case the SW should clear all SW + * flags that it does not own and then repeat the whole process once + * again. + */ + if (swfw_sync & swmask) { + u32 rmask = IXGBE_GSSR_EEP_SM | IXGBE_GSSR_PHY0_SM | + IXGBE_GSSR_PHY1_SM | IXGBE_GSSR_MAC_CSR_SM | + IXGBE_GSSR_SW_MNG_SM; + + if (swi2c_mask) + rmask |= IXGBE_GSSR_I2C_MASK; + ixgbe_release_swfw_sync_X540(hw, rmask); + ixgbe_release_swfw_sync_semaphore(hw); + hw_dbg(hw, "Resource not released by other SW, returning IXGBE_ERR_SWFW_SYNC\n"); + return IXGBE_ERR_SWFW_SYNC; + } + ixgbe_release_swfw_sync_semaphore(hw); + hw_dbg(hw, "Returning error IXGBE_ERR_SWFW_SYNC\n"); + + return IXGBE_ERR_SWFW_SYNC; +} + +/** + * ixgbe_release_swfw_sync_X540 - Release SWFW semaphore + * @hw: pointer to hardware structure + * @mask: Mask to specify which semaphore to release + * + * Releases the SWFW semaphore through the SW_FW_SYNC register + * for the specified function (CSR, PHY0, PHY1, EVM, Flash) + **/ +void ixgbe_release_swfw_sync_X540(struct ixgbe_hw *hw, u32 mask) +{ + u32 swmask = mask & (IXGBE_GSSR_NVM_PHY_MASK | IXGBE_GSSR_SW_MNG_SM); + u32 swfw_sync; + + DEBUGFUNC("ixgbe_release_swfw_sync_X540"); + + if (mask & IXGBE_GSSR_I2C_MASK) + swmask |= mask & IXGBE_GSSR_I2C_MASK; + ixgbe_get_swfw_sync_semaphore(hw); + + swfw_sync = IXGBE_READ_REG(hw, IXGBE_SWFW_SYNC_BY_MAC(hw)); + swfw_sync &= ~swmask; + IXGBE_WRITE_REG(hw, IXGBE_SWFW_SYNC_BY_MAC(hw), swfw_sync); + + ixgbe_release_swfw_sync_semaphore(hw); + msec_delay(2); +} + +/** + * ixgbe_get_swfw_sync_semaphore - Get hardware semaphore + * @hw: pointer to hardware structure + * + * Sets the hardware semaphores so SW/FW can gain control of shared resources + **/ +STATIC s32 ixgbe_get_swfw_sync_semaphore(struct ixgbe_hw *hw) +{ + s32 status = IXGBE_ERR_EEPROM; + u32 timeout = 2000; + u32 i; + u32 swsm; + + DEBUGFUNC("ixgbe_get_swfw_sync_semaphore"); + + /* Get SMBI software semaphore between device drivers first */ + for (i = 0; i < timeout; i++) { + /* + * If the SMBI bit is 0 when we read it, then the bit will be + * set and we have the semaphore + */ + swsm = IXGBE_READ_REG(hw, IXGBE_SWSM_BY_MAC(hw)); + if (!(swsm & IXGBE_SWSM_SMBI)) { + status = IXGBE_SUCCESS; + break; + } + usec_delay(50); + } + + /* Now get the semaphore between SW/FW through the REGSMP bit */ + if (status == IXGBE_SUCCESS) { + for (i = 0; i < timeout; i++) { + swsm = IXGBE_READ_REG(hw, IXGBE_SWFW_SYNC_BY_MAC(hw)); + if (!(swsm & IXGBE_SWFW_REGSMP)) + break; + + usec_delay(50); + } + + /* + * Release semaphores and return error if SW NVM semaphore + * was not granted because we don't have access to the EEPROM + */ + if (i >= timeout) { + ERROR_REPORT1(IXGBE_ERROR_POLLING, + "REGSMP Software NVM semaphore not granted.\n"); + ixgbe_release_swfw_sync_semaphore(hw); + status = IXGBE_ERR_EEPROM; + } + } else { + ERROR_REPORT1(IXGBE_ERROR_POLLING, + "Software semaphore SMBI between device drivers " + "not granted.\n"); + } + + return status; +} + +/** + * ixgbe_release_swfw_sync_semaphore - Release hardware semaphore + * @hw: pointer to hardware structure + * + * This function clears hardware semaphore bits. + **/ +STATIC void ixgbe_release_swfw_sync_semaphore(struct ixgbe_hw *hw) +{ + u32 swsm; + + DEBUGFUNC("ixgbe_release_swfw_sync_semaphore"); + + /* Release both semaphores by writing 0 to the bits REGSMP and SMBI */ + + swsm = IXGBE_READ_REG(hw, IXGBE_SWFW_SYNC_BY_MAC(hw)); + swsm &= ~IXGBE_SWFW_REGSMP; + IXGBE_WRITE_REG(hw, IXGBE_SWFW_SYNC_BY_MAC(hw), swsm); + + swsm = IXGBE_READ_REG(hw, IXGBE_SWSM_BY_MAC(hw)); + swsm &= ~IXGBE_SWSM_SMBI; + IXGBE_WRITE_REG(hw, IXGBE_SWSM_BY_MAC(hw), swsm); + + IXGBE_WRITE_FLUSH(hw); +} + +/** + * ixgbe_init_swfw_sync_X540 - Release hardware semaphore + * @hw: pointer to hardware structure + * + * This function reset hardware semaphore bits for a semaphore that may + * have be left locked due to a catastrophic failure. + **/ +void ixgbe_init_swfw_sync_X540(struct ixgbe_hw *hw) +{ + u32 rmask; + + /* First try to grab the semaphore but we don't need to bother + * looking to see whether we got the lock or not since we do + * the same thing regardless of whether we got the lock or not. + * We got the lock - we release it. + * We timeout trying to get the lock - we force its release. + */ + ixgbe_get_swfw_sync_semaphore(hw); + ixgbe_release_swfw_sync_semaphore(hw); + + /* Acquire and release all software resources. */ + rmask = IXGBE_GSSR_EEP_SM | IXGBE_GSSR_PHY0_SM | + IXGBE_GSSR_PHY1_SM | IXGBE_GSSR_MAC_CSR_SM | + IXGBE_GSSR_SW_MNG_SM; + + rmask |= IXGBE_GSSR_I2C_MASK; + ixgbe_acquire_swfw_sync_X540(hw, rmask); + ixgbe_release_swfw_sync_X540(hw, rmask); +} + +/** + * ixgbe_blink_led_start_X540 - Blink LED based on index. + * @hw: pointer to hardware structure + * @index: led number to blink + * + * Devices that implement the version 2 interface: + * X540 + **/ +s32 ixgbe_blink_led_start_X540(struct ixgbe_hw *hw, u32 index) +{ + u32 macc_reg; + u32 ledctl_reg; + ixgbe_link_speed speed; + bool link_up; + + DEBUGFUNC("ixgbe_blink_led_start_X540"); + + if (index > 3) + return IXGBE_ERR_PARAM; + + /* + * Link should be up in order for the blink bit in the LED control + * register to work. Force link and speed in the MAC if link is down. + * This will be reversed when we stop the blinking. + */ + hw->mac.ops.check_link(hw, &speed, &link_up, false); + if (link_up == false) { + macc_reg = IXGBE_READ_REG(hw, IXGBE_MACC); + macc_reg |= IXGBE_MACC_FLU | IXGBE_MACC_FSV_10G | IXGBE_MACC_FS; + IXGBE_WRITE_REG(hw, IXGBE_MACC, macc_reg); + } + /* Set the LED to LINK_UP + BLINK. */ + ledctl_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL); + ledctl_reg &= ~IXGBE_LED_MODE_MASK(index); + ledctl_reg |= IXGBE_LED_BLINK(index); + IXGBE_WRITE_REG(hw, IXGBE_LEDCTL, ledctl_reg); + IXGBE_WRITE_FLUSH(hw); + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_blink_led_stop_X540 - Stop blinking LED based on index. + * @hw: pointer to hardware structure + * @index: led number to stop blinking + * + * Devices that implement the version 2 interface: + * X540 + **/ +s32 ixgbe_blink_led_stop_X540(struct ixgbe_hw *hw, u32 index) +{ + u32 macc_reg; + u32 ledctl_reg; + + if (index > 3) + return IXGBE_ERR_PARAM; + + DEBUGFUNC("ixgbe_blink_led_stop_X540"); + + /* Restore the LED to its default value. */ + ledctl_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL); + ledctl_reg &= ~IXGBE_LED_MODE_MASK(index); + ledctl_reg |= IXGBE_LED_LINK_ACTIVE << IXGBE_LED_MODE_SHIFT(index); + ledctl_reg &= ~IXGBE_LED_BLINK(index); + IXGBE_WRITE_REG(hw, IXGBE_LEDCTL, ledctl_reg); + + /* Unforce link and speed in the MAC. */ + macc_reg = IXGBE_READ_REG(hw, IXGBE_MACC); + macc_reg &= ~(IXGBE_MACC_FLU | IXGBE_MACC_FSV_10G | IXGBE_MACC_FS); + IXGBE_WRITE_REG(hw, IXGBE_MACC, macc_reg); + IXGBE_WRITE_FLUSH(hw); + + return IXGBE_SUCCESS; +} diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_x540.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_x540.h new file mode 100644 index 00000000000..f774f689c65 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_x540.h @@ -0,0 +1,36 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 1999 - 2026 Intel Corporation */ + +#ifndef _IXGBE_X540_H_ +#define _IXGBE_X540_H_ + +#include "ixgbe_type.h" + +s32 ixgbe_get_link_capabilities_X540(struct ixgbe_hw *hw, + ixgbe_link_speed *speed, bool *autoneg); +enum ixgbe_media_type ixgbe_get_media_type_X540(struct ixgbe_hw *hw); +s32 ixgbe_setup_mac_link_X540(struct ixgbe_hw *hw, ixgbe_link_speed speed, + bool link_up_wait_to_complete); +s32 ixgbe_reset_hw_X540(struct ixgbe_hw *hw); +s32 ixgbe_start_hw_X540(struct ixgbe_hw *hw); +u64 ixgbe_get_supported_physical_layer_X540(struct ixgbe_hw *hw); + +s32 ixgbe_init_eeprom_params_X540(struct ixgbe_hw *hw); +s32 ixgbe_read_eerd_X540(struct ixgbe_hw *hw, u16 offset, u16 *data); +s32 ixgbe_read_eerd_buffer_X540(struct ixgbe_hw *hw, u16 offset, u16 words, + u16 *data); +s32 ixgbe_write_eewr_X540(struct ixgbe_hw *hw, u16 offset, u16 data); +s32 ixgbe_write_eewr_buffer_X540(struct ixgbe_hw *hw, u16 offset, u16 words, + u16 *data); +s32 ixgbe_update_eeprom_checksum_X540(struct ixgbe_hw *hw); +s32 ixgbe_validate_eeprom_checksum_X540(struct ixgbe_hw *hw, u16 *checksum_val); +s32 ixgbe_calc_eeprom_checksum_X540(struct ixgbe_hw *hw); +s32 ixgbe_update_flash_X540(struct ixgbe_hw *hw); + +s32 ixgbe_acquire_swfw_sync_X540(struct ixgbe_hw *hw, u32 mask); +void ixgbe_release_swfw_sync_X540(struct ixgbe_hw *hw, u32 mask); +void ixgbe_init_swfw_sync_X540(struct ixgbe_hw *hw); + +s32 ixgbe_blink_led_start_X540(struct ixgbe_hw *hw, u32 index); +s32 ixgbe_blink_led_stop_X540(struct ixgbe_hw *hw, u32 index); +#endif /* _IXGBE_X540_H_ */ diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_x550.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_x550.c new file mode 100644 index 00000000000..fd57dc5761e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_x550.c @@ -0,0 +1,4573 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 1999 - 2026 Intel Corporation */ + +#include "ixgbe_x550.h" +#include "ixgbe_x540.h" +#include "ixgbe_type.h" +#include "ixgbe_api.h" +#include "ixgbe_common.h" +#include "ixgbe_phy.h" + +STATIC s32 ixgbe_setup_ixfi_x550em(struct ixgbe_hw *hw, ixgbe_link_speed *speed); +STATIC s32 ixgbe_acquire_swfw_sync_X550a(struct ixgbe_hw *, u32 mask); +STATIC void ixgbe_release_swfw_sync_X550a(struct ixgbe_hw *, u32 mask); +STATIC s32 ixgbe_read_mng_if_sel_x550em(struct ixgbe_hw *hw); + +/** + * ixgbe_init_ops_X550 - Inits func ptrs and MAC type + * @hw: pointer to hardware structure + * + * Initialize the function pointers and assign the MAC type for X550. + * Does not touch the hardware. + **/ +s32 ixgbe_init_ops_X550(struct ixgbe_hw *hw) +{ + struct ixgbe_mac_info *mac = &hw->mac; + struct ixgbe_eeprom_info *eeprom = &hw->eeprom; + s32 ret_val; + + DEBUGFUNC("ixgbe_init_ops_X550"); + + ret_val = ixgbe_init_ops_X540(hw); + mac->ops.dmac_config = ixgbe_dmac_config_X550; + mac->ops.dmac_config_tcs = ixgbe_dmac_config_tcs_X550; + mac->ops.dmac_update_tcs = ixgbe_dmac_update_tcs_X550; + mac->ops.setup_eee = NULL; + mac->ops.set_source_address_pruning = + ixgbe_set_source_address_pruning_X550; + mac->ops.set_ethertype_anti_spoofing = + ixgbe_set_ethertype_anti_spoofing_X550; + + mac->ops.get_rtrup2tc = ixgbe_dcb_get_rtrup2tc_generic; + eeprom->ops.init_params = ixgbe_init_eeprom_params_X550; + eeprom->ops.calc_checksum = ixgbe_calc_eeprom_checksum_X550; + eeprom->ops.read = ixgbe_read_ee_hostif_X550; + eeprom->ops.read_buffer = ixgbe_read_ee_hostif_buffer_X550; + eeprom->ops.write = ixgbe_write_ee_hostif_X550; + eeprom->ops.write_buffer = ixgbe_write_ee_hostif_buffer_X550; + eeprom->ops.update_checksum = ixgbe_update_eeprom_checksum_X550; + eeprom->ops.validate_checksum = ixgbe_validate_eeprom_checksum_X550; + + mac->ops.disable_mdd = ixgbe_disable_mdd_X550; + mac->ops.enable_mdd = ixgbe_enable_mdd_X550; + mac->ops.mdd_event = ixgbe_mdd_event_X550; + mac->ops.restore_mdd_vf = ixgbe_restore_mdd_vf_X550; + mac->ops.fw_recovery_mode = ixgbe_fw_recovery_mode_X550; + mac->ops.disable_rx = ixgbe_disable_rx_x550; + /* Manageability interface */ + mac->ops.set_fw_drv_ver = ixgbe_set_fw_drv_ver_x550; + switch (hw->device_id) { + case IXGBE_DEV_ID_X550EM_X_1G_T: + hw->mac.ops.led_on = NULL; + hw->mac.ops.led_off = NULL; + break; + case IXGBE_DEV_ID_X550EM_X_10G_T: + case IXGBE_DEV_ID_X550EM_A_10G_T: + hw->mac.ops.led_on = ixgbe_led_on_t_X550em; + hw->mac.ops.led_off = ixgbe_led_off_t_X550em; + break; + default: + break; + } + return ret_val; +} + +/** + * ixgbe_read_cs4227 - Read CS4227 register + * @hw: pointer to hardware structure + * @reg: register number to write + * @value: pointer to receive value read + * + * Returns status code + **/ +STATIC s32 ixgbe_read_cs4227(struct ixgbe_hw *hw, u16 reg, u16 *value) +{ + return hw->link.ops.read_link_unlocked(hw, hw->link.addr, reg, value); +} + +/** + * ixgbe_write_cs4227 - Write CS4227 register + * @hw: pointer to hardware structure + * @reg: register number to write + * @value: value to write to register + * + * Returns status code + **/ +STATIC s32 ixgbe_write_cs4227(struct ixgbe_hw *hw, u16 reg, u16 value) +{ + return hw->link.ops.write_link_unlocked(hw, hw->link.addr, reg, value); +} + +/** + * ixgbe_read_pe - Read register from port expander + * @hw: pointer to hardware structure + * @reg: register number to read + * @value: pointer to receive read value + * + * Returns status code + **/ +STATIC s32 ixgbe_read_pe(struct ixgbe_hw *hw, u8 reg, u8 *value) +{ + s32 status; + + status = ixgbe_read_i2c_byte_unlocked(hw, reg, IXGBE_PE, value); + if (status != IXGBE_SUCCESS) + ERROR_REPORT2(IXGBE_ERROR_CAUTION, + "port expander access failed with %d\n", status); + return status; +} + +/** + * ixgbe_write_pe - Write register to port expander + * @hw: pointer to hardware structure + * @reg: register number to write + * @value: value to write + * + * Returns status code + **/ +STATIC s32 ixgbe_write_pe(struct ixgbe_hw *hw, u8 reg, u8 value) +{ + s32 status; + + status = ixgbe_write_i2c_byte_unlocked(hw, reg, IXGBE_PE, value); + if (status != IXGBE_SUCCESS) + ERROR_REPORT2(IXGBE_ERROR_CAUTION, + "port expander access failed with %d\n", status); + return status; +} + +/** + * ixgbe_reset_cs4227 - Reset CS4227 using port expander + * @hw: pointer to hardware structure + * + * This function assumes that the caller has acquired the proper semaphore. + * Returns error code + **/ +STATIC s32 ixgbe_reset_cs4227(struct ixgbe_hw *hw) +{ + s32 status; + u32 retry; + u16 value; + u8 reg; + + /* Trigger hard reset. */ + status = ixgbe_read_pe(hw, IXGBE_PE_OUTPUT, ®); + if (status != IXGBE_SUCCESS) + return status; + reg |= IXGBE_PE_BIT1; + status = ixgbe_write_pe(hw, IXGBE_PE_OUTPUT, reg); + if (status != IXGBE_SUCCESS) + return status; + + status = ixgbe_read_pe(hw, IXGBE_PE_CONFIG, ®); + if (status != IXGBE_SUCCESS) + return status; + reg &= ~IXGBE_PE_BIT1; + status = ixgbe_write_pe(hw, IXGBE_PE_CONFIG, reg); + if (status != IXGBE_SUCCESS) + return status; + + status = ixgbe_read_pe(hw, IXGBE_PE_OUTPUT, ®); + if (status != IXGBE_SUCCESS) + return status; + reg &= ~IXGBE_PE_BIT1; + status = ixgbe_write_pe(hw, IXGBE_PE_OUTPUT, reg); + if (status != IXGBE_SUCCESS) + return status; + + usec_delay(IXGBE_CS4227_RESET_HOLD); + + status = ixgbe_read_pe(hw, IXGBE_PE_OUTPUT, ®); + if (status != IXGBE_SUCCESS) + return status; + reg |= IXGBE_PE_BIT1; + status = ixgbe_write_pe(hw, IXGBE_PE_OUTPUT, reg); + if (status != IXGBE_SUCCESS) + return status; + + /* Wait for the reset to complete. */ + msec_delay(IXGBE_CS4227_RESET_DELAY); + for (retry = 0; retry < IXGBE_CS4227_RETRIES; retry++) { + status = ixgbe_read_cs4227(hw, IXGBE_CS4227_EFUSE_STATUS, + &value); + if (status == IXGBE_SUCCESS && + value == IXGBE_CS4227_EEPROM_LOAD_OK) + break; + msec_delay(IXGBE_CS4227_CHECK_DELAY); + } + if (retry == IXGBE_CS4227_RETRIES) { + ERROR_REPORT1(IXGBE_ERROR_INVALID_STATE, + "CS4227 reset did not complete."); + return IXGBE_ERR_PHY; + } + + status = ixgbe_read_cs4227(hw, IXGBE_CS4227_EEPROM_STATUS, &value); + if (status != IXGBE_SUCCESS || + !(value & IXGBE_CS4227_EEPROM_LOAD_OK)) { + ERROR_REPORT1(IXGBE_ERROR_INVALID_STATE, + "CS4227 EEPROM did not load successfully."); + return IXGBE_ERR_PHY; + } + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_check_cs4227 - Check CS4227 and reset as needed + * @hw: pointer to hardware structure + **/ +STATIC void ixgbe_check_cs4227(struct ixgbe_hw *hw) +{ + s32 status = IXGBE_SUCCESS; + u32 swfw_mask = hw->phy.phy_semaphore_mask; + u16 value = 0; + u8 retry; + + for (retry = 0; retry < IXGBE_CS4227_RETRIES; retry++) { + status = hw->mac.ops.acquire_swfw_sync(hw, swfw_mask); + if (status != IXGBE_SUCCESS) { + ERROR_REPORT2(IXGBE_ERROR_CAUTION, + "semaphore failed with %d", status); + msec_delay(IXGBE_CS4227_CHECK_DELAY); + continue; + } + + /* Get status of reset flow. */ + status = ixgbe_read_cs4227(hw, IXGBE_CS4227_SCRATCH, &value); + + if (status == IXGBE_SUCCESS && + value == IXGBE_CS4227_RESET_COMPLETE) + goto out; + + if (status != IXGBE_SUCCESS || + value != IXGBE_CS4227_RESET_PENDING) + break; + + /* Reset is pending. Wait and check again. */ + hw->mac.ops.release_swfw_sync(hw, swfw_mask); + msec_delay(IXGBE_CS4227_CHECK_DELAY); + } + + /* If still pending, assume other instance failed. */ + if (retry == IXGBE_CS4227_RETRIES) { + status = hw->mac.ops.acquire_swfw_sync(hw, swfw_mask); + if (status != IXGBE_SUCCESS) { + ERROR_REPORT2(IXGBE_ERROR_CAUTION, + "semaphore failed with %d", status); + return; + } + } + + /* Reset the CS4227. */ + status = ixgbe_reset_cs4227(hw); + if (status != IXGBE_SUCCESS) { + ERROR_REPORT2(IXGBE_ERROR_INVALID_STATE, + "CS4227 reset failed: %d", status); + goto out; + } + + /* Reset takes so long, temporarily release semaphore in case the + * other driver instance is waiting for the reset indication. + */ + ixgbe_write_cs4227(hw, IXGBE_CS4227_SCRATCH, + IXGBE_CS4227_RESET_PENDING); + hw->mac.ops.release_swfw_sync(hw, swfw_mask); + msec_delay(10); + status = hw->mac.ops.acquire_swfw_sync(hw, swfw_mask); + if (status != IXGBE_SUCCESS) { + ERROR_REPORT2(IXGBE_ERROR_CAUTION, + "semaphore failed with %d", status); + return; + } + + /* Record completion for next time. */ + status = ixgbe_write_cs4227(hw, IXGBE_CS4227_SCRATCH, + IXGBE_CS4227_RESET_COMPLETE); + +out: + hw->mac.ops.release_swfw_sync(hw, swfw_mask); + msec_delay(hw->eeprom.semaphore_delay); +} + +/** + * ixgbe_setup_mux_ctl - Setup ESDP register for I2C mux control + * @hw: pointer to hardware structure + **/ +STATIC void ixgbe_setup_mux_ctl(struct ixgbe_hw *hw) +{ + u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP); + + if (hw->bus.lan_id) { + esdp &= ~(IXGBE_ESDP_SDP1_NATIVE | IXGBE_ESDP_SDP1); + esdp |= IXGBE_ESDP_SDP1_DIR; + } + esdp &= ~(IXGBE_ESDP_SDP0_NATIVE | IXGBE_ESDP_SDP0_DIR); + IXGBE_WRITE_REG(hw, IXGBE_ESDP, esdp); + IXGBE_WRITE_FLUSH(hw); +} + +/** + * ixgbe_identify_phy_x550em - Get PHY type based on device id + * @hw: pointer to hardware structure + * + * Returns error code + */ +STATIC s32 ixgbe_identify_phy_x550em(struct ixgbe_hw *hw) +{ + hw->mac.ops.set_lan_id(hw); + + ixgbe_read_mng_if_sel_x550em(hw); + + switch (hw->device_id) { + case IXGBE_DEV_ID_X550EM_A_SFP: + return ixgbe_identify_sfp_module_X550em(hw); + case IXGBE_DEV_ID_X550EM_X_SFP: + /* set up for CS4227 usage */ + ixgbe_setup_mux_ctl(hw); + ixgbe_check_cs4227(hw); + fallthrough; + case IXGBE_DEV_ID_X550EM_A_SFP_N: + return ixgbe_identify_sfp_module_X550em(hw); + break; + case IXGBE_DEV_ID_X550EM_X_KX4: + hw->phy.type = ixgbe_phy_x550em_kx4; + break; + case IXGBE_DEV_ID_X550EM_X_XFI: + hw->phy.type = ixgbe_phy_x550em_xfi; + break; + case IXGBE_DEV_ID_X550EM_X_KR: + case IXGBE_DEV_ID_X550EM_A_KR: + case IXGBE_DEV_ID_X550EM_A_KR_L: + hw->phy.type = ixgbe_phy_x550em_kr; + break; + case IXGBE_DEV_ID_X550EM_A_10G_T: + case IXGBE_DEV_ID_X550EM_X_10G_T: + return ixgbe_identify_phy_generic(hw); + case IXGBE_DEV_ID_X550EM_X_1G_T: + hw->phy.type = ixgbe_phy_ext_1g_t; + break; + case IXGBE_DEV_ID_X550EM_A_1G_T: + case IXGBE_DEV_ID_X550EM_A_1G_T_L: + hw->phy.type = ixgbe_phy_fw; + if (hw->bus.lan_id) + hw->phy.phy_semaphore_mask |= IXGBE_GSSR_PHY1_SM; + else + hw->phy.phy_semaphore_mask |= IXGBE_GSSR_PHY0_SM; + break; + default: + break; + } + return IXGBE_SUCCESS; +} + +/** + * ixgbe_fw_phy_activity - Perform an activity on a PHY + * @hw: pointer to hardware structure + * @activity: activity to perform + * @data: Pointer to 4 32-bit words of data + */ +s32 ixgbe_fw_phy_activity(struct ixgbe_hw *hw, u16 activity, + u32 (*data)[FW_PHY_ACT_DATA_COUNT]) +{ + union { + struct ixgbe_hic_phy_activity_req cmd; + struct ixgbe_hic_phy_activity_resp rsp; + } hic; + u16 retries = FW_PHY_ACT_RETRIES; + s32 rc; + u16 i; + + do { + memset(&hic, 0, sizeof(hic)); + hic.cmd.hdr.cmd = FW_PHY_ACT_REQ_CMD; + hic.cmd.hdr.buf_len = FW_PHY_ACT_REQ_LEN; + hic.cmd.hdr.checksum = FW_DEFAULT_CHECKSUM; + hic.cmd.port_number = hw->bus.lan_id; + hic.cmd.activity_id = IXGBE_CPU_TO_LE16(activity); + for (i = 0; i < FW_PHY_ACT_DATA_COUNT; ++i) + hic.cmd.data[i] = IXGBE_CPU_TO_BE32((*data)[i]); + + rc = ixgbe_host_interface_command(hw, (u32 *)&hic.cmd, + sizeof(hic.cmd), + IXGBE_HI_COMMAND_TIMEOUT, + true); + if (rc != IXGBE_SUCCESS) + return rc; + if (hic.rsp.hdr.cmd_or_resp.ret_status == + FW_CEM_RESP_STATUS_SUCCESS) { + for (i = 0; i < FW_PHY_ACT_DATA_COUNT; ++i) + (*data)[i] = IXGBE_BE32_TO_CPU(hic.rsp.data[i]); + return IXGBE_SUCCESS; + } + usec_delay(20); + --retries; + } while (retries > 0); + + return IXGBE_ERR_HOST_INTERFACE_COMMAND; +} + +static const struct { + u16 fw_speed; + ixgbe_link_speed phy_speed; +} ixgbe_fw_map[] = { + { FW_PHY_ACT_LINK_SPEED_10, IXGBE_LINK_SPEED_10_FULL }, + { FW_PHY_ACT_LINK_SPEED_100, IXGBE_LINK_SPEED_100_FULL }, + { FW_PHY_ACT_LINK_SPEED_1G, IXGBE_LINK_SPEED_1GB_FULL }, + { FW_PHY_ACT_LINK_SPEED_2_5G, IXGBE_LINK_SPEED_2_5GB_FULL }, + { FW_PHY_ACT_LINK_SPEED_5G, IXGBE_LINK_SPEED_5GB_FULL }, + { FW_PHY_ACT_LINK_SPEED_10G, IXGBE_LINK_SPEED_10GB_FULL }, +}; + +/** + * ixgbe_get_phy_id_fw - Get the phy ID via firmware command + * @hw: pointer to hardware structure + * + * Returns error code + */ +static s32 ixgbe_get_phy_id_fw(struct ixgbe_hw *hw) +{ + u32 info[FW_PHY_ACT_DATA_COUNT] = { 0 }; + u16 phy_speeds; + u16 phy_id_lo; + s32 rc; + u16 i; + + rc = ixgbe_fw_phy_activity(hw, FW_PHY_ACT_GET_PHY_INFO, &info); + if (rc) + return rc; + + hw->phy.speeds_supported = 0; + phy_speeds = info[0] & FW_PHY_INFO_SPEED_MASK; + for (i = 0; i < sizeof(ixgbe_fw_map) / sizeof(ixgbe_fw_map[0]); ++i) { + if (phy_speeds & ixgbe_fw_map[i].fw_speed) + hw->phy.speeds_supported |= ixgbe_fw_map[i].phy_speed; + } + if (!hw->phy.autoneg_advertised) + hw->phy.autoneg_advertised = hw->phy.speeds_supported; + + hw->phy.id = info[0] & FW_PHY_INFO_ID_HI_MASK; + phy_id_lo = info[1] & FW_PHY_INFO_ID_LO_MASK; + hw->phy.id |= phy_id_lo & IXGBE_PHY_REVISION_MASK; + hw->phy.revision = phy_id_lo & ~IXGBE_PHY_REVISION_MASK; + if (!hw->phy.id || hw->phy.id == IXGBE_PHY_REVISION_MASK) + return IXGBE_ERR_PHY_ADDR_INVALID; + return IXGBE_SUCCESS; +} + +/** + * ixgbe_identify_phy_fw - Get PHY type based on firmware command + * @hw: pointer to hardware structure + * + * Returns error code + */ +static s32 ixgbe_identify_phy_fw(struct ixgbe_hw *hw) +{ + if (hw->bus.lan_id) + hw->phy.phy_semaphore_mask = IXGBE_GSSR_PHY1_SM; + else + hw->phy.phy_semaphore_mask = IXGBE_GSSR_PHY0_SM; + + hw->phy.type = ixgbe_phy_fw; + hw->phy.ops.read_reg = NULL; + hw->phy.ops.write_reg = NULL; + return ixgbe_get_phy_id_fw(hw); +} + +/** + * ixgbe_shutdown_fw_phy - Shutdown a firmware-controlled PHY + * @hw: pointer to hardware structure + * + * Returns error code + */ +s32 ixgbe_shutdown_fw_phy(struct ixgbe_hw *hw) +{ + u32 setup[FW_PHY_ACT_DATA_COUNT] = { 0 }; + + setup[0] = FW_PHY_ACT_FORCE_LINK_DOWN_OFF; + return ixgbe_fw_phy_activity(hw, FW_PHY_ACT_FORCE_LINK_DOWN, &setup); +} + +STATIC s32 ixgbe_read_phy_reg_x550em(struct ixgbe_hw *hw, u32 reg_addr, + u32 device_type, u16 *phy_data) +{ + UNREFERENCED_4PARAMETER(*hw, reg_addr, device_type, *phy_data); + return IXGBE_NOT_IMPLEMENTED; +} + +STATIC s32 ixgbe_write_phy_reg_x550em(struct ixgbe_hw *hw, u32 reg_addr, + u32 device_type, u16 phy_data) +{ + UNREFERENCED_4PARAMETER(*hw, reg_addr, device_type, phy_data); + return IXGBE_NOT_IMPLEMENTED; +} + +/** + * ixgbe_read_i2c_combined_generic - Perform I2C read combined operation + * @hw: pointer to the hardware structure + * @addr: I2C bus address to read from + * @reg: I2C device register to read from + * @val: pointer to location to receive read value + * + * Returns an error code on error. + **/ +STATIC s32 ixgbe_read_i2c_combined_generic(struct ixgbe_hw *hw, u8 addr, + u16 reg, u16 *val) +{ + return ixgbe_read_i2c_combined_generic_int(hw, addr, reg, val, true); +} + +/** + * ixgbe_read_i2c_combined_generic_unlocked - Do I2C read combined operation + * @hw: pointer to the hardware structure + * @addr: I2C bus address to read from + * @reg: I2C device register to read from + * @val: pointer to location to receive read value + * + * Returns an error code on error. + **/ +STATIC s32 +ixgbe_read_i2c_combined_generic_unlocked(struct ixgbe_hw *hw, u8 addr, + u16 reg, u16 *val) +{ + return ixgbe_read_i2c_combined_generic_int(hw, addr, reg, val, false); +} + +/** + * ixgbe_write_i2c_combined_generic - Perform I2C write combined operation + * @hw: pointer to the hardware structure + * @addr: I2C bus address to write to + * @reg: I2C device register to write to + * @val: value to write + * + * Returns an error code on error. + **/ +STATIC s32 ixgbe_write_i2c_combined_generic(struct ixgbe_hw *hw, + u8 addr, u16 reg, u16 val) +{ + return ixgbe_write_i2c_combined_generic_int(hw, addr, reg, val, true); +} + +/** + * ixgbe_write_i2c_combined_generic_unlocked - Do I2C write combined operation + * @hw: pointer to the hardware structure + * @addr: I2C bus address to write to + * @reg: I2C device register to write to + * @val: value to write + * + * Returns an error code on error. + **/ +STATIC s32 +ixgbe_write_i2c_combined_generic_unlocked(struct ixgbe_hw *hw, + u8 addr, u16 reg, u16 val) +{ + return ixgbe_write_i2c_combined_generic_int(hw, addr, reg, val, false); +} + +/** +* ixgbe_init_ops_X550EM - Inits func ptrs and MAC type +* @hw: pointer to hardware structure +* +* Initialize the function pointers and for MAC type X550EM. +* Does not touch the hardware. +**/ +s32 ixgbe_init_ops_X550EM(struct ixgbe_hw *hw) +{ + struct ixgbe_mac_info *mac = &hw->mac; + struct ixgbe_eeprom_info *eeprom = &hw->eeprom; + struct ixgbe_phy_info *phy = &hw->phy; + s32 ret_val; + + DEBUGFUNC("ixgbe_init_ops_X550EM"); + + /* Similar to X550 so start there. */ + ret_val = ixgbe_init_ops_X550(hw); + + /* Since this function eventually calls + * ixgbe_init_ops_540 by design, we are setting + * the pointers to NULL explicitly here to overwrite + * the values being set in the x540 function. + */ + /* Thermal sensor not supported in x550EM */ + mac->ops.get_thermal_sensor_data = NULL; + mac->ops.init_thermal_sensor_thresh = NULL; + mac->thermal_sensor_enabled = false; + + /* FCOE not supported in x550EM */ + mac->ops.get_san_mac_addr = NULL; + mac->ops.set_san_mac_addr = NULL; + mac->ops.get_wwn_prefix = NULL; + mac->ops.get_fcoe_boot_status = NULL; + + /* IPsec not supported in x550EM */ + mac->ops.disable_sec_rx_path = NULL; + mac->ops.enable_sec_rx_path = NULL; + + /* AUTOC register is not present in x550EM. */ + mac->ops.prot_autoc_read = NULL; + mac->ops.prot_autoc_write = NULL; + + /* X550EM bus type is internal*/ + hw->bus.type = ixgbe_bus_type_internal; + mac->ops.get_bus_info = ixgbe_get_bus_info_X550em; + + + mac->ops.get_media_type = ixgbe_get_media_type_X550em; + mac->ops.setup_sfp = ixgbe_setup_sfp_modules_X550em; + mac->ops.get_link_capabilities = ixgbe_get_link_capabilities_X550em; + mac->ops.reset_hw = ixgbe_reset_hw_X550em; + mac->ops.get_supported_physical_layer = + ixgbe_get_supported_physical_layer_X550em; + + if (mac->ops.get_media_type(hw) == ixgbe_media_type_copper) + mac->ops.setup_fc = ixgbe_setup_fc_generic; + else + mac->ops.setup_fc = ixgbe_setup_fc_X550em; + + /* PHY */ + phy->ops.init = ixgbe_init_phy_ops_X550em; + switch (hw->device_id) { + case IXGBE_DEV_ID_X550EM_A_1G_T: + case IXGBE_DEV_ID_X550EM_A_1G_T_L: + mac->ops.setup_fc = NULL; + phy->ops.identify = ixgbe_identify_phy_fw; + phy->ops.set_phy_power = NULL; + phy->ops.get_firmware_version = NULL; + break; + case IXGBE_DEV_ID_X550EM_X_1G_T: + mac->ops.setup_fc = NULL; + phy->ops.identify = ixgbe_identify_phy_x550em; + phy->ops.set_phy_power = NULL; + break; + default: + phy->ops.identify = ixgbe_identify_phy_x550em; + } + + if (mac->ops.get_media_type(hw) != ixgbe_media_type_copper) + phy->ops.set_phy_power = NULL; + + /* EEPROM */ + eeprom->ops.init_params = ixgbe_init_eeprom_params_X540; + eeprom->ops.read = ixgbe_read_ee_hostif_X550; + eeprom->ops.read_buffer = ixgbe_read_ee_hostif_buffer_X550; + eeprom->ops.write = ixgbe_write_ee_hostif_X550; + eeprom->ops.write_buffer = ixgbe_write_ee_hostif_buffer_X550; + eeprom->ops.update_checksum = ixgbe_update_eeprom_checksum_X550; + eeprom->ops.validate_checksum = ixgbe_validate_eeprom_checksum_X550; + eeprom->ops.calc_checksum = ixgbe_calc_eeprom_checksum_X550; + + return ret_val; +} + +/** + * ixgbe_setup_fw_link - Setup firmware-controlled PHYs + * @hw: pointer to hardware structure + */ +static s32 ixgbe_setup_fw_link(struct ixgbe_hw *hw) +{ + u32 setup[FW_PHY_ACT_DATA_COUNT] = { 0 }; + s32 rc; + u16 i; + + if (hw->phy.reset_disable || ixgbe_check_reset_blocked(hw)) + return 0; + + if (hw->fc.strict_ieee && hw->fc.requested_mode == ixgbe_fc_rx_pause) { + ERROR_REPORT1(IXGBE_ERROR_UNSUPPORTED, + "ixgbe_fc_rx_pause not valid in strict IEEE mode\n"); + return IXGBE_ERR_INVALID_LINK_SETTINGS; + } + + switch (hw->fc.requested_mode) { + case ixgbe_fc_full: + setup[0] |= FW_PHY_ACT_SETUP_LINK_PAUSE_RXTX << + FW_PHY_ACT_SETUP_LINK_PAUSE_SHIFT; + break; + case ixgbe_fc_rx_pause: + setup[0] |= FW_PHY_ACT_SETUP_LINK_PAUSE_RX << + FW_PHY_ACT_SETUP_LINK_PAUSE_SHIFT; + break; + case ixgbe_fc_tx_pause: + setup[0] |= FW_PHY_ACT_SETUP_LINK_PAUSE_TX << + FW_PHY_ACT_SETUP_LINK_PAUSE_SHIFT; + break; + default: + break; + } + + for (i = 0; i < sizeof(ixgbe_fw_map) / sizeof(ixgbe_fw_map[0]); ++i) { + if (hw->phy.autoneg_advertised & ixgbe_fw_map[i].phy_speed) + setup[0] |= (u32)(ixgbe_fw_map[i].fw_speed); + } + setup[0] |= FW_PHY_ACT_SETUP_LINK_HP | FW_PHY_ACT_SETUP_LINK_AN; + + if (hw->phy.eee_speeds_advertised) + setup[0] |= FW_PHY_ACT_SETUP_LINK_EEE; + + rc = ixgbe_fw_phy_activity(hw, FW_PHY_ACT_SETUP_LINK, &setup); + if (rc) + return rc; + if (setup[0] == FW_PHY_ACT_SETUP_LINK_RSP_DOWN) + return IXGBE_ERR_OVERTEMP; + return IXGBE_SUCCESS; +} + +/** + * ixgbe_fc_autoneg_fw - Set up flow control for FW-controlled PHYs + * @hw: pointer to hardware structure + * + * Called at init time to set up flow control. + */ +static s32 ixgbe_fc_autoneg_fw(struct ixgbe_hw *hw) +{ + if (hw->fc.requested_mode == ixgbe_fc_default) + hw->fc.requested_mode = ixgbe_fc_full; + + return ixgbe_setup_fw_link(hw); +} + +/** + * ixgbe_setup_eee_fw - Enable/disable EEE support + * @hw: pointer to the HW structure + * @enable_eee: boolean flag to enable EEE + * + * Enable/disable EEE based on enable_eee flag. + * This function controls EEE for firmware-based PHY implementations. + */ +static s32 ixgbe_setup_eee_fw(struct ixgbe_hw *hw, bool enable_eee) +{ + if (!!hw->phy.eee_speeds_advertised == enable_eee) + return IXGBE_SUCCESS; + if (enable_eee) + hw->phy.eee_speeds_advertised = hw->phy.eee_speeds_supported; + else + hw->phy.eee_speeds_advertised = 0; + return hw->phy.ops.setup_link(hw); +} + +/** +* ixgbe_init_ops_X550EM_a - Inits func ptrs and MAC type +* @hw: pointer to hardware structure +* +* Initialize the function pointers and for MAC type X550EM_a. +* Does not touch the hardware. +**/ +s32 ixgbe_init_ops_X550EM_a(struct ixgbe_hw *hw) +{ + struct ixgbe_mac_info *mac = &hw->mac; + s32 ret_val; + + DEBUGFUNC("ixgbe_init_ops_X550EM_a"); + + /* Start with generic X550EM init */ + ret_val = ixgbe_init_ops_X550EM(hw); + + mac->ops.read_iosf_sb_reg = ixgbe_read_iosf_sb_reg_x550; + mac->ops.write_iosf_sb_reg = ixgbe_write_iosf_sb_reg_x550; + mac->ops.acquire_swfw_sync = ixgbe_acquire_swfw_sync_X550a; + mac->ops.release_swfw_sync = ixgbe_release_swfw_sync_X550a; + + switch (mac->ops.get_media_type(hw)) { + case ixgbe_media_type_fiber: + mac->ops.setup_fc = NULL; + mac->ops.fc_autoneg = ixgbe_fc_autoneg_fiber_x550em_a; + break; + case ixgbe_media_type_backplane: + mac->ops.fc_autoneg = ixgbe_fc_autoneg_backplane_x550em_a; + mac->ops.setup_fc = ixgbe_setup_fc_backplane_x550em_a; + break; + default: + break; + } + + switch (hw->device_id) { + case IXGBE_DEV_ID_X550EM_A_1G_T: + case IXGBE_DEV_ID_X550EM_A_1G_T_L: + mac->ops.fc_autoneg = ixgbe_fc_autoneg_sgmii_x550em_a; + mac->ops.setup_fc = ixgbe_fc_autoneg_fw; + mac->ops.setup_eee = ixgbe_setup_eee_fw; + hw->phy.eee_speeds_supported = IXGBE_LINK_SPEED_100_FULL | + IXGBE_LINK_SPEED_1GB_FULL; + hw->phy.eee_speeds_advertised = hw->phy.eee_speeds_supported; + break; + default: + break; + } + + return ret_val; +} + +/** +* ixgbe_init_ops_X550EM_x - Inits func ptrs and MAC type +* @hw: pointer to hardware structure +* +* Initialize the function pointers and for MAC type X550EM_x. +* Does not touch the hardware. +**/ +s32 ixgbe_init_ops_X550EM_x(struct ixgbe_hw *hw) +{ + struct ixgbe_mac_info *mac = &hw->mac; + struct ixgbe_link_info *link = &hw->link; + s32 ret_val; + + DEBUGFUNC("ixgbe_init_ops_X550EM_x"); + + /* Start with generic X550EM init */ + ret_val = ixgbe_init_ops_X550EM(hw); + + mac->ops.read_iosf_sb_reg = ixgbe_read_iosf_sb_reg_x550; + mac->ops.write_iosf_sb_reg = ixgbe_write_iosf_sb_reg_x550; + mac->ops.acquire_swfw_sync = ixgbe_acquire_swfw_sync_X550em; + mac->ops.release_swfw_sync = ixgbe_release_swfw_sync_X550em; + link->ops.read_link = ixgbe_read_i2c_combined_generic; + link->ops.read_link_unlocked = ixgbe_read_i2c_combined_generic_unlocked; + link->ops.write_link = ixgbe_write_i2c_combined_generic; + link->ops.write_link_unlocked = + ixgbe_write_i2c_combined_generic_unlocked; + link->addr = IXGBE_CS4227; + + if (hw->device_id == IXGBE_DEV_ID_X550EM_X_1G_T) { + mac->ops.setup_fc = NULL; + mac->ops.setup_eee = NULL; + mac->ops.init_led_link_act = NULL; + } + + return ret_val; +} + +/** + * ixgbe_dmac_config_X550 + * @hw: pointer to hardware structure + * + * Configure DMA coalescing. If enabling dmac, dmac is activated. + * When disabling dmac, dmac enable dmac bit is cleared. + **/ +s32 ixgbe_dmac_config_X550(struct ixgbe_hw *hw) +{ + u32 reg, high_pri_tc; + + DEBUGFUNC("ixgbe_dmac_config_X550"); + + /* Disable DMA coalescing before configuring */ + reg = IXGBE_READ_REG(hw, IXGBE_DMACR); + reg &= ~IXGBE_DMACR_DMAC_EN; + IXGBE_WRITE_REG(hw, IXGBE_DMACR, reg); + + /* Disable DMA Coalescing if the watchdog timer is 0 */ + if (!hw->mac.dmac_config.watchdog_timer) + goto out; + + ixgbe_dmac_config_tcs_X550(hw); + + /* Configure DMA Coalescing Control Register */ + reg = IXGBE_READ_REG(hw, IXGBE_DMACR); + + /* Set the watchdog timer in units of 40.96 usec */ + reg &= ~IXGBE_DMACR_DMACWT_MASK; + reg |= (hw->mac.dmac_config.watchdog_timer * 100) / 4096; + + reg &= ~IXGBE_DMACR_HIGH_PRI_TC_MASK; + /* If fcoe is enabled, set high priority traffic class */ + if (hw->mac.dmac_config.fcoe_en) { + high_pri_tc = 1 << hw->mac.dmac_config.fcoe_tc; + reg |= ((high_pri_tc << IXGBE_DMACR_HIGH_PRI_TC_SHIFT) & + IXGBE_DMACR_HIGH_PRI_TC_MASK); + } + reg |= IXGBE_DMACR_EN_MNG_IND; + + /* Enable DMA coalescing after configuration */ + reg |= IXGBE_DMACR_DMAC_EN; + IXGBE_WRITE_REG(hw, IXGBE_DMACR, reg); + +out: + return IXGBE_SUCCESS; +} + +/** + * ixgbe_dmac_config_tcs_X550 + * @hw: pointer to hardware structure + * + * Configure DMA coalescing threshold per TC. The dmac enable bit must + * be cleared before configuring. + **/ +s32 ixgbe_dmac_config_tcs_X550(struct ixgbe_hw *hw) +{ + u32 tc, reg, pb_headroom, rx_pb_size, maxframe_size_kb; + + DEBUGFUNC("ixgbe_dmac_config_tcs_X550"); + + /* Configure DMA coalescing enabled */ + switch (hw->mac.dmac_config.link_speed) { + case IXGBE_LINK_SPEED_10_FULL: + case IXGBE_LINK_SPEED_100_FULL: + pb_headroom = IXGBE_DMACRXT_100M; + break; + case IXGBE_LINK_SPEED_1GB_FULL: + pb_headroom = IXGBE_DMACRXT_1G; + break; + default: + pb_headroom = IXGBE_DMACRXT_10G; + break; + } + + maxframe_size_kb = ((IXGBE_READ_REG(hw, IXGBE_MAXFRS) >> + IXGBE_MHADD_MFS_SHIFT) / 1024); + + /* Set the per Rx packet buffer receive threshold */ + for (tc = 0; tc < IXGBE_DCB_MAX_TRAFFIC_CLASS; tc++) { + reg = IXGBE_READ_REG(hw, IXGBE_DMCTH(tc)); + reg &= ~IXGBE_DMCTH_DMACRXT_MASK; + + if (tc < hw->mac.dmac_config.num_tcs) { + /* Get Rx PB size */ + rx_pb_size = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(tc)); + rx_pb_size = (rx_pb_size & IXGBE_RXPBSIZE_MASK) >> + IXGBE_RXPBSIZE_SHIFT; + + /* Calculate receive buffer threshold in kilobytes */ + if (rx_pb_size > pb_headroom) + rx_pb_size = rx_pb_size - pb_headroom; + else + rx_pb_size = 0; + + /* Minimum of MFS shall be set for DMCTH */ + reg |= (rx_pb_size > maxframe_size_kb) ? + rx_pb_size : maxframe_size_kb; + } + IXGBE_WRITE_REG(hw, IXGBE_DMCTH(tc), reg); + } + return IXGBE_SUCCESS; +} + +/** + * ixgbe_dmac_update_tcs_X550 + * @hw: pointer to hardware structure + * + * Disables dmac, updates per TC settings, and then enables dmac. + **/ +s32 ixgbe_dmac_update_tcs_X550(struct ixgbe_hw *hw) +{ + u32 reg; + + DEBUGFUNC("ixgbe_dmac_update_tcs_X550"); + + /* Disable DMA coalescing before configuring */ + reg = IXGBE_READ_REG(hw, IXGBE_DMACR); + reg &= ~IXGBE_DMACR_DMAC_EN; + IXGBE_WRITE_REG(hw, IXGBE_DMACR, reg); + + ixgbe_dmac_config_tcs_X550(hw); + + /* Enable DMA coalescing after configuration */ + reg = IXGBE_READ_REG(hw, IXGBE_DMACR); + reg |= IXGBE_DMACR_DMAC_EN; + IXGBE_WRITE_REG(hw, IXGBE_DMACR, reg); + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_init_eeprom_params_X550 - Initialize EEPROM params + * @hw: pointer to hardware structure + * + * Initializes the EEPROM parameters ixgbe_eeprom_info within the + * ixgbe_hw struct in order to set up EEPROM access. + **/ +s32 ixgbe_init_eeprom_params_X550(struct ixgbe_hw *hw) +{ + struct ixgbe_eeprom_info *eeprom = &hw->eeprom; + u32 eec; + u16 eeprom_size; + + DEBUGFUNC("ixgbe_init_eeprom_params_X550"); + + if (eeprom->type == ixgbe_eeprom_uninitialized) { + eeprom->semaphore_delay = 10; + eeprom->type = ixgbe_flash; + + eec = IXGBE_READ_REG(hw, IXGBE_EEC); + eeprom_size = (u16)((eec & IXGBE_EEC_SIZE) >> + IXGBE_EEC_SIZE_SHIFT); + eeprom->word_size = 1 << (eeprom_size + + IXGBE_EEPROM_WORD_SIZE_SHIFT); + + hw_dbg(hw, "Eeprom params: type = %d, size = %d\n", + eeprom->type, eeprom->word_size); + } + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_set_source_address_pruning_X550 - Enable/Disbale source address pruning + * @hw: pointer to hardware structure + * @enable: enable or disable source address pruning + * @pool: Rx pool to set source address pruning for + **/ +void ixgbe_set_source_address_pruning_X550(struct ixgbe_hw *hw, bool enable, + unsigned int pool) +{ + u64 pfflp; + + /* max rx pool is 63 */ + if (pool > 63) + return; + + pfflp = (u64)IXGBE_READ_REG(hw, IXGBE_PFFLPL); + pfflp |= (u64)IXGBE_READ_REG(hw, IXGBE_PFFLPH) << 32; + + if (enable) + pfflp |= (1ULL << pool); + else + pfflp &= ~(1ULL << pool); + + IXGBE_WRITE_REG(hw, IXGBE_PFFLPL, (u32)pfflp); + IXGBE_WRITE_REG(hw, IXGBE_PFFLPH, (u32)(pfflp >> 32)); +} + +/** + * ixgbe_set_ethertype_anti_spoofing_X550 - Configure Ethertype anti-spoofing + * @hw: pointer to hardware structure + * @enable: enable or disable switch for Ethertype anti-spoofing + * @vf: Virtual Function pool - VF Pool to set for Ethertype anti-spoofing + * + **/ +void ixgbe_set_ethertype_anti_spoofing_X550(struct ixgbe_hw *hw, + bool enable, int vf) +{ + int vf_target_reg = vf >> 3; + int vf_target_shift = vf % 8 + IXGBE_SPOOF_ETHERTYPEAS_SHIFT; + u32 pfvfspoof; + + DEBUGFUNC("ixgbe_set_ethertype_anti_spoofing_X550"); + + pfvfspoof = IXGBE_READ_REG(hw, IXGBE_PFVFSPOOF(vf_target_reg)); + if (enable) + pfvfspoof |= (1 << vf_target_shift); + else + pfvfspoof &= ~(1 << vf_target_shift); + + IXGBE_WRITE_REG(hw, IXGBE_PFVFSPOOF(vf_target_reg), pfvfspoof); +} + +/** + * ixgbe_iosf_wait - Wait for IOSF command completion + * @hw: pointer to hardware structure + * @ctrl: pointer to location to receive final IOSF control value + * + * Returns failing status on timeout + * + * Note: ctrl can be NULL if the IOSF control register value is not needed + **/ +STATIC s32 ixgbe_iosf_wait(struct ixgbe_hw *hw, u32 *ctrl) +{ + u32 i, command = 0; + + /* Check every 10 usec to see if the address cycle completed. + * The SB IOSF BUSY bit will clear when the operation is + * complete + */ + for (i = 0; i < IXGBE_MDIO_COMMAND_TIMEOUT; i++) { + command = IXGBE_READ_REG(hw, IXGBE_SB_IOSF_INDIRECT_CTRL); + if ((command & IXGBE_SB_IOSF_CTRL_BUSY) == 0) + break; + usec_delay(10); + } + if (ctrl) + *ctrl = command; + if (i == IXGBE_MDIO_COMMAND_TIMEOUT) { + ERROR_REPORT1(IXGBE_ERROR_POLLING, "Wait timed out\n"); + return IXGBE_ERR_PHY; + } + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_write_iosf_sb_reg_x550 - Writes a value to specified register + * of the IOSF device + * @hw: pointer to hardware structure + * @reg_addr: 32 bit PHY register to write + * @device_type: 3 bit device type + * @data: Data to write to the register + **/ +s32 ixgbe_write_iosf_sb_reg_x550(struct ixgbe_hw *hw, u32 reg_addr, + u32 device_type, u32 data) +{ + u32 gssr = IXGBE_GSSR_PHY1_SM | IXGBE_GSSR_PHY0_SM; + u32 command, error; + s32 ret; + + ret = ixgbe_acquire_swfw_semaphore(hw, gssr); + if (ret != IXGBE_SUCCESS) + return ret; + + ret = ixgbe_iosf_wait(hw, NULL); + if (ret != IXGBE_SUCCESS) + goto out; + + command = ((reg_addr << IXGBE_SB_IOSF_CTRL_ADDR_SHIFT) | + (device_type << IXGBE_SB_IOSF_CTRL_TARGET_SELECT_SHIFT)); + + /* Write IOSF control register */ + IXGBE_WRITE_REG(hw, IXGBE_SB_IOSF_INDIRECT_CTRL, command); + + /* Write IOSF data register */ + IXGBE_WRITE_REG(hw, IXGBE_SB_IOSF_INDIRECT_DATA, data); + + ret = ixgbe_iosf_wait(hw, &command); + + if ((command & IXGBE_SB_IOSF_CTRL_RESP_STAT_MASK) != 0) { + error = (command & IXGBE_SB_IOSF_CTRL_CMPL_ERR_MASK) >> + IXGBE_SB_IOSF_CTRL_CMPL_ERR_SHIFT; + ERROR_REPORT2(IXGBE_ERROR_POLLING, + "Failed to write, error %x\n", error); + ret = IXGBE_ERR_PHY; + } + +out: + ixgbe_release_swfw_semaphore(hw, gssr); + return ret; +} + +/** + * ixgbe_read_iosf_sb_reg_x550 - Reads specified register of the IOSF device + * @hw: pointer to hardware structure + * @reg_addr: 32 bit PHY register to write + * @device_type: 3 bit device type + * @data: Pointer to read data from the register + **/ +s32 ixgbe_read_iosf_sb_reg_x550(struct ixgbe_hw *hw, u32 reg_addr, + u32 device_type, u32 *data) +{ + u32 gssr = IXGBE_GSSR_PHY1_SM | IXGBE_GSSR_PHY0_SM; + u32 command, error; + s32 ret; + + ret = ixgbe_acquire_swfw_semaphore(hw, gssr); + if (ret != IXGBE_SUCCESS) + return ret; + + ret = ixgbe_iosf_wait(hw, NULL); + if (ret != IXGBE_SUCCESS) + goto out; + + command = ((reg_addr << IXGBE_SB_IOSF_CTRL_ADDR_SHIFT) | + (device_type << IXGBE_SB_IOSF_CTRL_TARGET_SELECT_SHIFT)); + + /* Write IOSF control register */ + IXGBE_WRITE_REG(hw, IXGBE_SB_IOSF_INDIRECT_CTRL, command); + + ret = ixgbe_iosf_wait(hw, &command); + + if ((command & IXGBE_SB_IOSF_CTRL_RESP_STAT_MASK) != 0) { + error = (command & IXGBE_SB_IOSF_CTRL_CMPL_ERR_MASK) >> + IXGBE_SB_IOSF_CTRL_CMPL_ERR_SHIFT; + ERROR_REPORT2(IXGBE_ERROR_POLLING, + "Failed to read, error %x\n", error); + ret = IXGBE_ERR_PHY; + } + + if (ret == IXGBE_SUCCESS) + *data = IXGBE_READ_REG(hw, IXGBE_SB_IOSF_INDIRECT_DATA); + +out: + ixgbe_release_swfw_semaphore(hw, gssr); + return ret; +} + +/** + * ixgbe_get_phy_token - Get the token for shared phy access + * @hw: Pointer to hardware structure + */ + +s32 ixgbe_get_phy_token(struct ixgbe_hw *hw) +{ + struct ixgbe_hic_phy_token_req token_cmd; + s32 status; + + token_cmd.hdr.cmd = FW_PHY_TOKEN_REQ_CMD; + token_cmd.hdr.buf_len = FW_PHY_TOKEN_REQ_LEN; + token_cmd.hdr.cmd_or_resp.cmd_resv = 0; + token_cmd.hdr.checksum = FW_DEFAULT_CHECKSUM; + token_cmd.port_number = hw->bus.lan_id; + token_cmd.command_type = FW_PHY_TOKEN_REQ; + token_cmd.pad = 0; + status = ixgbe_host_interface_command(hw, (u32 *)&token_cmd, + sizeof(token_cmd), + IXGBE_HI_COMMAND_TIMEOUT, + true); + if (status) { + hw_dbg(hw, "Issuing host interface command failed with Status = %d\n", + status); + return status; + } + if (token_cmd.hdr.cmd_or_resp.ret_status == FW_PHY_TOKEN_OK) + return IXGBE_SUCCESS; + if (token_cmd.hdr.cmd_or_resp.ret_status != FW_PHY_TOKEN_RETRY) { + hw_dbg(hw, "Host interface command returned 0x%08x , returning IXGBE_ERR_FW_RESP_INVALID\n", + token_cmd.hdr.cmd_or_resp.ret_status); + return IXGBE_ERR_FW_RESP_INVALID; + } + + hw_dbg(hw, "Returning IXGBE_ERR_TOKEN_RETRY\n"); + return IXGBE_ERR_TOKEN_RETRY; +} + +/** + * ixgbe_put_phy_token - Put the token for shared phy access + * @hw: Pointer to hardware structure + */ + +s32 ixgbe_put_phy_token(struct ixgbe_hw *hw) +{ + struct ixgbe_hic_phy_token_req token_cmd; + s32 status; + + token_cmd.hdr.cmd = FW_PHY_TOKEN_REQ_CMD; + token_cmd.hdr.buf_len = FW_PHY_TOKEN_REQ_LEN; + token_cmd.hdr.cmd_or_resp.cmd_resv = 0; + token_cmd.hdr.checksum = FW_DEFAULT_CHECKSUM; + token_cmd.port_number = hw->bus.lan_id; + token_cmd.command_type = FW_PHY_TOKEN_REL; + token_cmd.pad = 0; + status = ixgbe_host_interface_command(hw, (u32 *)&token_cmd, + sizeof(token_cmd), + IXGBE_HI_COMMAND_TIMEOUT, + true); + if (status) + return status; + if (token_cmd.hdr.cmd_or_resp.ret_status == FW_PHY_TOKEN_OK) + return IXGBE_SUCCESS; + + hw_dbg(hw, "Put PHY Token host interface command failed"); + return IXGBE_ERR_FW_RESP_INVALID; +} + +/** + * ixgbe_disable_mdd_X550 + * @hw: pointer to hardware structure + * + * Disable malicious driver detection + **/ +void ixgbe_disable_mdd_X550(struct ixgbe_hw *hw) +{ + u32 reg; + + DEBUGFUNC("ixgbe_disable_mdd_X550"); + + /* Disable MDD for TX DMA and interrupt */ + reg = IXGBE_READ_REG(hw, IXGBE_DMATXCTL); + reg &= ~(IXGBE_DMATXCTL_MDP_EN | IXGBE_DMATXCTL_MBINTEN); + IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, reg); + + /* Disable MDD for RX and interrupt */ + reg = IXGBE_READ_REG(hw, IXGBE_RDRXCTL); + reg &= ~(IXGBE_RDRXCTL_MDP_EN | IXGBE_RDRXCTL_MBINTEN); + IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, reg); +} + +/** + * ixgbe_enable_mdd_X550 + * @hw: pointer to hardware structure + * + * Enable malicious driver detection + **/ +void ixgbe_enable_mdd_X550(struct ixgbe_hw *hw) +{ + u32 reg; + + DEBUGFUNC("ixgbe_enable_mdd_X550"); + + /* Enable MDD for TX DMA and interrupt */ + reg = IXGBE_READ_REG(hw, IXGBE_DMATXCTL); + reg |= (IXGBE_DMATXCTL_MDP_EN | IXGBE_DMATXCTL_MBINTEN); + IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, reg); + + /* Enable MDD for RX and interrupt */ + reg = IXGBE_READ_REG(hw, IXGBE_RDRXCTL); + reg |= (IXGBE_RDRXCTL_MDP_EN | IXGBE_RDRXCTL_MBINTEN); + IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, reg); +} + +/** + * ixgbe_restore_mdd_vf_X550 + * @hw: pointer to hardware structure + * @vf: vf index + * + * Restore VF that was disabled during malicious driver detection event + **/ +void ixgbe_restore_mdd_vf_X550(struct ixgbe_hw *hw, u32 vf) +{ + u32 idx, reg, num_qs, start_q, bitmask; + + DEBUGFUNC("ixgbe_restore_mdd_vf_X550"); + + /* Map VF to queues */ + reg = IXGBE_READ_REG(hw, IXGBE_MRQC); + switch (reg & IXGBE_MRQC_MRQE_MASK) { + case IXGBE_MRQC_VMDQRT8TCEN: + num_qs = 8; /* 16 VFs / pools */ + bitmask = 0x000000FF; + break; + case IXGBE_MRQC_VMDQRSS32EN: + case IXGBE_MRQC_VMDQRT4TCEN: + num_qs = 4; /* 32 VFs / pools */ + bitmask = 0x0000000F; + break; + default: /* 64 VFs / pools */ + num_qs = 2; + bitmask = 0x00000003; + break; + } + start_q = vf * num_qs; + + /* Release vf's queues by clearing WQBR_TX and WQBR_RX (RW1C) */ + idx = start_q / 32; + reg = 0; + reg |= (bitmask << (start_q % 32)); + IXGBE_WRITE_REG(hw, IXGBE_WQBR_TX(idx), reg); + IXGBE_WRITE_REG(hw, IXGBE_WQBR_RX(idx), reg); +} + +/** + * ixgbe_mdd_event_X550 + * @hw: pointer to hardware structure + * @vf_bitmap: vf bitmap of malicious vfs + * + * Handle malicious driver detection event. + **/ +void ixgbe_mdd_event_X550(struct ixgbe_hw *hw, u32 *vf_bitmap) +{ + u32 wqbr; + u32 i, j, reg, q, shift, vf, idx; + + DEBUGFUNC("ixgbe_mdd_event_X550"); + + /* figure out pool size for mapping to vf's */ + reg = IXGBE_READ_REG(hw, IXGBE_MRQC); + switch (reg & IXGBE_MRQC_MRQE_MASK) { + case IXGBE_MRQC_VMDQRT8TCEN: + shift = 3; /* 16 VFs / pools */ + break; + case IXGBE_MRQC_VMDQRSS32EN: + case IXGBE_MRQC_VMDQRT4TCEN: + shift = 2; /* 32 VFs / pools */ + break; + default: + shift = 1; /* 64 VFs / pools */ + break; + } + + /* Read WQBR_TX and WQBR_RX and check for malicious queues */ + for (i = 0; i < 4; i++) { + wqbr = IXGBE_READ_REG(hw, IXGBE_WQBR_TX(i)); + wqbr |= IXGBE_READ_REG(hw, IXGBE_WQBR_RX(i)); + + if (!wqbr) + continue; + + /* Get malicious queue */ + for (j = 0; j < 32 && wqbr; j++) { + + if (!(wqbr & (1 << j))) + continue; + + /* Get queue from bitmask */ + q = j + (i * 32); + + /* Map queue to vf */ + vf = (q >> shift); + + /* Set vf bit in vf_bitmap */ + idx = vf / 32; + vf_bitmap[idx] |= (1 << (vf % 32)); + wqbr &= ~(1 << j); + } + } +} + +/** + * ixgbe_get_media_type_X550em - Get media type + * @hw: pointer to hardware structure + * + * Returns the media type (fiber, copper, backplane) + */ +enum ixgbe_media_type ixgbe_get_media_type_X550em(struct ixgbe_hw *hw) +{ + enum ixgbe_media_type media_type; + + DEBUGFUNC("ixgbe_get_media_type_X550em"); + + /* Detect if there is a copper PHY attached. */ + switch (hw->device_id) { + case IXGBE_DEV_ID_X550EM_X_KR: + case IXGBE_DEV_ID_X550EM_X_KX4: + case IXGBE_DEV_ID_X550EM_X_XFI: + case IXGBE_DEV_ID_X550EM_A_KR: + case IXGBE_DEV_ID_X550EM_A_KR_L: + media_type = ixgbe_media_type_backplane; + break; + case IXGBE_DEV_ID_X550EM_X_SFP: + case IXGBE_DEV_ID_X550EM_A_SFP: + case IXGBE_DEV_ID_X550EM_A_SFP_N: + case IXGBE_DEV_ID_X550EM_A_QSFP: + case IXGBE_DEV_ID_X550EM_A_QSFP_N: + media_type = ixgbe_media_type_fiber; + break; + case IXGBE_DEV_ID_X550EM_X_1G_T: + case IXGBE_DEV_ID_X550EM_X_10G_T: + case IXGBE_DEV_ID_X550EM_A_10G_T: + media_type = ixgbe_media_type_copper; + break; + case IXGBE_DEV_ID_X550EM_A_SGMII: + case IXGBE_DEV_ID_X550EM_A_SGMII_L: + media_type = ixgbe_media_type_backplane; + hw->phy.type = ixgbe_phy_sgmii; + break; + case IXGBE_DEV_ID_X550EM_A_1G_T: + case IXGBE_DEV_ID_X550EM_A_1G_T_L: + media_type = ixgbe_media_type_copper; + break; + default: + media_type = ixgbe_media_type_unknown; + break; + } + return media_type; +} + +/** + * ixgbe_supported_sfp_modules_X550em - Check if SFP module type is supported + * @hw: pointer to hardware structure + * @linear: true if SFP module is linear + */ +STATIC s32 ixgbe_supported_sfp_modules_X550em(struct ixgbe_hw *hw, bool *linear) +{ + DEBUGFUNC("ixgbe_supported_sfp_modules_X550em"); + + switch (hw->phy.sfp_type) { + case ixgbe_sfp_type_not_present: + return IXGBE_ERR_SFP_NOT_PRESENT; + case ixgbe_sfp_type_da_cu_core0: + case ixgbe_sfp_type_da_cu_core1: + *linear = true; + break; + case ixgbe_sfp_type_srlr_core0: + case ixgbe_sfp_type_srlr_core1: + case ixgbe_sfp_type_da_act_lmt_core0: + case ixgbe_sfp_type_da_act_lmt_core1: + case ixgbe_sfp_type_1g_sx_core0: + case ixgbe_sfp_type_1g_sx_core1: + case ixgbe_sfp_type_1g_lx_core0: + case ixgbe_sfp_type_1g_lx_core1: + *linear = false; + break; + case ixgbe_sfp_type_unknown: + case ixgbe_sfp_type_1g_cu_core0: + case ixgbe_sfp_type_1g_cu_core1: + default: + return IXGBE_ERR_SFP_NOT_SUPPORTED; + } + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_identify_sfp_module_X550em - Identifies SFP modules + * @hw: pointer to hardware structure + * + * Searches for and identifies the SFP module and assigns appropriate PHY type. + **/ +s32 ixgbe_identify_sfp_module_X550em(struct ixgbe_hw *hw) +{ + s32 status; + bool linear; + + DEBUGFUNC("ixgbe_identify_sfp_module_X550em"); + + status = ixgbe_identify_module_generic(hw); + + if (status != IXGBE_SUCCESS) + return status; + + /* Check if SFP module is supported */ + status = ixgbe_supported_sfp_modules_X550em(hw, &linear); + + return status; +} + +/** + * ixgbe_setup_sfp_modules_X550em - Setup MAC link ops + * @hw: pointer to hardware structure + */ +s32 ixgbe_setup_sfp_modules_X550em(struct ixgbe_hw *hw) +{ + s32 status; + bool linear; + + DEBUGFUNC("ixgbe_setup_sfp_modules_X550em"); + + /* Check if SFP module is supported */ + status = ixgbe_supported_sfp_modules_X550em(hw, &linear); + + if (status != IXGBE_SUCCESS) + return status; + + ixgbe_init_mac_link_ops_X550em(hw); + hw->phy.ops.reset = NULL; + + return IXGBE_SUCCESS; +} + +/** +* ixgbe_restart_an_internal_phy_x550em - restart autonegotiation for the +* internal PHY +* @hw: pointer to hardware structure +**/ +STATIC s32 ixgbe_restart_an_internal_phy_x550em(struct ixgbe_hw *hw) +{ + s32 status; + u32 link_ctrl; + + /* Restart auto-negotiation. */ + status = hw->mac.ops.read_iosf_sb_reg(hw, + IXGBE_KRM_LINK_CTRL_1(hw->bus.lan_id), + IXGBE_SB_IOSF_TARGET_KR_PHY, &link_ctrl); + + if (status) { + hw_dbg(hw, "Auto-negotiation did not complete\n"); + return status; + } + + link_ctrl |= IXGBE_KRM_LINK_CTRL_1_TETH_AN_RESTART; + status = hw->mac.ops.write_iosf_sb_reg(hw, + IXGBE_KRM_LINK_CTRL_1(hw->bus.lan_id), + IXGBE_SB_IOSF_TARGET_KR_PHY, link_ctrl); + + if (hw->mac.type == ixgbe_mac_X550EM_a) { + u32 flx_mask_st20; + + /* Indicate to FW that AN restart has been asserted */ + status = hw->mac.ops.read_iosf_sb_reg(hw, + IXGBE_KRM_PMD_FLX_MASK_ST20(hw->bus.lan_id), + IXGBE_SB_IOSF_TARGET_KR_PHY, &flx_mask_st20); + + if (status) { + hw_dbg(hw, "Auto-negotiation did not complete\n"); + return status; + } + + flx_mask_st20 |= IXGBE_KRM_PMD_FLX_MASK_ST20_FW_AN_RESTART; + status = hw->mac.ops.write_iosf_sb_reg(hw, + IXGBE_KRM_PMD_FLX_MASK_ST20(hw->bus.lan_id), + IXGBE_SB_IOSF_TARGET_KR_PHY, flx_mask_st20); + } + + return status; +} + +/** + * ixgbe_setup_sgmii - Set up link for sgmii + * @hw: pointer to hardware structure + * @speed: new link speed + * @autoneg_wait: true when waiting for completion is needed + */ +STATIC s32 ixgbe_setup_sgmii(struct ixgbe_hw *hw, ixgbe_link_speed speed, + bool autoneg_wait) +{ + struct ixgbe_mac_info *mac = &hw->mac; + u32 lval, sval, flx_val; + s32 rc; + + rc = mac->ops.read_iosf_sb_reg(hw, + IXGBE_KRM_LINK_CTRL_1(hw->bus.lan_id), + IXGBE_SB_IOSF_TARGET_KR_PHY, &lval); + if (rc) + return rc; + + lval &= ~IXGBE_KRM_LINK_CTRL_1_TETH_AN_ENABLE; + lval &= ~IXGBE_KRM_LINK_CTRL_1_TETH_FORCE_SPEED_MASK; + lval |= IXGBE_KRM_LINK_CTRL_1_TETH_AN_SGMII_EN; + lval |= IXGBE_KRM_LINK_CTRL_1_TETH_AN_CLAUSE_37_EN; + lval |= IXGBE_KRM_LINK_CTRL_1_TETH_FORCE_SPEED_1G; + rc = mac->ops.write_iosf_sb_reg(hw, + IXGBE_KRM_LINK_CTRL_1(hw->bus.lan_id), + IXGBE_SB_IOSF_TARGET_KR_PHY, lval); + if (rc) + return rc; + + rc = mac->ops.read_iosf_sb_reg(hw, + IXGBE_KRM_SGMII_CTRL(hw->bus.lan_id), + IXGBE_SB_IOSF_TARGET_KR_PHY, &sval); + if (rc) + return rc; + + sval |= IXGBE_KRM_SGMII_CTRL_MAC_TAR_FORCE_10_D; + sval |= IXGBE_KRM_SGMII_CTRL_MAC_TAR_FORCE_100_D; + rc = mac->ops.write_iosf_sb_reg(hw, + IXGBE_KRM_SGMII_CTRL(hw->bus.lan_id), + IXGBE_SB_IOSF_TARGET_KR_PHY, sval); + if (rc) + return rc; + + rc = mac->ops.read_iosf_sb_reg(hw, + IXGBE_KRM_PMD_FLX_MASK_ST20(hw->bus.lan_id), + IXGBE_SB_IOSF_TARGET_KR_PHY, &flx_val); + if (rc) + return rc; + + flx_val &= ~IXGBE_KRM_PMD_FLX_MASK_ST20_SPEED_MASK; + flx_val |= IXGBE_KRM_PMD_FLX_MASK_ST20_SPEED_1G; + flx_val &= ~IXGBE_KRM_PMD_FLX_MASK_ST20_AN_EN; + flx_val |= IXGBE_KRM_PMD_FLX_MASK_ST20_SGMII_EN; + flx_val |= IXGBE_KRM_PMD_FLX_MASK_ST20_AN37_EN; + + rc = mac->ops.write_iosf_sb_reg(hw, + IXGBE_KRM_PMD_FLX_MASK_ST20(hw->bus.lan_id), + IXGBE_SB_IOSF_TARGET_KR_PHY, flx_val); + if (rc) + return rc; + + rc = ixgbe_restart_an_internal_phy_x550em(hw); + if (rc) + return rc; + + return hw->phy.ops.setup_link_speed(hw, speed, autoneg_wait); +} + +/** + * ixgbe_setup_sgmii_fw - Set up link for internal PHY SGMII auto-negotiation + * @hw: pointer to hardware structure + * @speed: new link speed + * @autoneg_wait: true when waiting for completion is needed + */ +STATIC s32 ixgbe_setup_sgmii_fw(struct ixgbe_hw *hw, ixgbe_link_speed speed, + bool autoneg_wait) +{ + struct ixgbe_mac_info *mac = &hw->mac; + u32 lval, sval, flx_val; + s32 rc; + + rc = mac->ops.read_iosf_sb_reg(hw, + IXGBE_KRM_LINK_CTRL_1(hw->bus.lan_id), + IXGBE_SB_IOSF_TARGET_KR_PHY, &lval); + if (rc) + return rc; + + lval &= ~IXGBE_KRM_LINK_CTRL_1_TETH_AN_ENABLE; + lval &= ~IXGBE_KRM_LINK_CTRL_1_TETH_FORCE_SPEED_MASK; + lval |= IXGBE_KRM_LINK_CTRL_1_TETH_AN_SGMII_EN; + lval |= IXGBE_KRM_LINK_CTRL_1_TETH_AN_CLAUSE_37_EN; + lval &= ~IXGBE_KRM_LINK_CTRL_1_TETH_FORCE_SPEED_1G; + rc = mac->ops.write_iosf_sb_reg(hw, + IXGBE_KRM_LINK_CTRL_1(hw->bus.lan_id), + IXGBE_SB_IOSF_TARGET_KR_PHY, lval); + if (rc) + return rc; + + rc = mac->ops.read_iosf_sb_reg(hw, + IXGBE_KRM_SGMII_CTRL(hw->bus.lan_id), + IXGBE_SB_IOSF_TARGET_KR_PHY, &sval); + if (rc) + return rc; + + sval &= ~IXGBE_KRM_SGMII_CTRL_MAC_TAR_FORCE_10_D; + sval &= ~IXGBE_KRM_SGMII_CTRL_MAC_TAR_FORCE_100_D; + rc = mac->ops.write_iosf_sb_reg(hw, + IXGBE_KRM_SGMII_CTRL(hw->bus.lan_id), + IXGBE_SB_IOSF_TARGET_KR_PHY, sval); + if (rc) + return rc; + + rc = mac->ops.write_iosf_sb_reg(hw, + IXGBE_KRM_LINK_CTRL_1(hw->bus.lan_id), + IXGBE_SB_IOSF_TARGET_KR_PHY, lval); + if (rc) + return rc; + + rc = mac->ops.read_iosf_sb_reg(hw, + IXGBE_KRM_PMD_FLX_MASK_ST20(hw->bus.lan_id), + IXGBE_SB_IOSF_TARGET_KR_PHY, &flx_val); + if (rc) + return rc; + + flx_val &= ~IXGBE_KRM_PMD_FLX_MASK_ST20_SPEED_MASK; + flx_val |= IXGBE_KRM_PMD_FLX_MASK_ST20_SPEED_AN; + flx_val &= ~IXGBE_KRM_PMD_FLX_MASK_ST20_AN_EN; + flx_val |= IXGBE_KRM_PMD_FLX_MASK_ST20_SGMII_EN; + flx_val |= IXGBE_KRM_PMD_FLX_MASK_ST20_AN37_EN; + + rc = mac->ops.write_iosf_sb_reg(hw, + IXGBE_KRM_PMD_FLX_MASK_ST20(hw->bus.lan_id), + IXGBE_SB_IOSF_TARGET_KR_PHY, flx_val); + if (rc) + return rc; + + rc = ixgbe_restart_an_internal_phy_x550em(hw); + + return hw->phy.ops.setup_link_speed(hw, speed, autoneg_wait); +} + +/** + * ixgbe_init_mac_link_ops_X550em - init mac link function pointers + * @hw: pointer to hardware structure + */ +void ixgbe_init_mac_link_ops_X550em(struct ixgbe_hw *hw) +{ + struct ixgbe_mac_info *mac = &hw->mac; + + DEBUGFUNC("ixgbe_init_mac_link_ops_X550em"); + + switch (hw->mac.ops.get_media_type(hw)) { + case ixgbe_media_type_fiber: + /* CS4227 does not support autoneg, so disable the laser control + * functions for SFP+ fiber + */ + mac->ops.disable_tx_laser = NULL; + mac->ops.enable_tx_laser = NULL; + mac->ops.flap_tx_laser = NULL; + mac->ops.setup_link = ixgbe_setup_mac_link_multispeed_fiber; + mac->ops.set_rate_select_speed = + ixgbe_set_soft_rate_select_speed; + + if ((hw->device_id == IXGBE_DEV_ID_X550EM_A_SFP_N) || + (hw->device_id == IXGBE_DEV_ID_X550EM_A_SFP)) + mac->ops.setup_mac_link = + ixgbe_setup_mac_link_sfp_x550a; + else + mac->ops.setup_mac_link = + ixgbe_setup_mac_link_sfp_x550em; + break; + case ixgbe_media_type_copper: + if (hw->device_id == IXGBE_DEV_ID_X550EM_X_1G_T) + break; + if (hw->mac.type == ixgbe_mac_X550EM_a) { + if (hw->device_id == IXGBE_DEV_ID_X550EM_A_1G_T || + hw->device_id == IXGBE_DEV_ID_X550EM_A_1G_T_L) { + mac->ops.setup_link = ixgbe_setup_sgmii_fw; + mac->ops.check_link = + ixgbe_check_mac_link_generic; + } else { + mac->ops.setup_link = + ixgbe_setup_mac_link_t_X550em; + } + } else { + mac->ops.setup_link = ixgbe_setup_mac_link_t_X550em; + mac->ops.check_link = ixgbe_check_link_t_X550em; + } + break; + case ixgbe_media_type_backplane: + if (hw->device_id == IXGBE_DEV_ID_X550EM_A_SGMII || + hw->device_id == IXGBE_DEV_ID_X550EM_A_SGMII_L) + mac->ops.setup_link = ixgbe_setup_sgmii; + break; + default: + break; + } +} + +/** + * ixgbe_get_link_capabilities_X550em - Determines link capabilities + * @hw: pointer to hardware structure + * @speed: pointer to link speed + * @autoneg: true when autoneg or autotry is enabled + */ +s32 ixgbe_get_link_capabilities_X550em(struct ixgbe_hw *hw, + ixgbe_link_speed *speed, + bool *autoneg) +{ + DEBUGFUNC("ixgbe_get_link_capabilities_X550em"); + + if (hw->phy.type == ixgbe_phy_fw) { + *autoneg = true; + *speed = hw->phy.speeds_supported; + return 0; + } + + /* SFP */ + if (hw->phy.media_type == ixgbe_media_type_fiber) { + + /* CS4227 SFP must not enable auto-negotiation */ + *autoneg = false; + + /* Check if 1G SFP module. */ + if (hw->phy.sfp_type == ixgbe_sfp_type_1g_sx_core0 || + hw->phy.sfp_type == ixgbe_sfp_type_1g_sx_core1 + || hw->phy.sfp_type == ixgbe_sfp_type_1g_lx_core0 || + hw->phy.sfp_type == ixgbe_sfp_type_1g_lx_core1) { + *speed = IXGBE_LINK_SPEED_1GB_FULL; + return IXGBE_SUCCESS; + } + + /* Link capabilities are based on SFP */ + if (hw->phy.multispeed_fiber) + *speed = IXGBE_LINK_SPEED_10GB_FULL | + IXGBE_LINK_SPEED_1GB_FULL; + else + *speed = IXGBE_LINK_SPEED_10GB_FULL; + } else { + *autoneg = true; + + switch (hw->phy.type) { + case ixgbe_phy_x550em_xfi: + *speed = IXGBE_LINK_SPEED_1GB_FULL | + IXGBE_LINK_SPEED_10GB_FULL; + *autoneg = false; + break; + case ixgbe_phy_ext_1g_t: + case ixgbe_phy_sgmii: + *speed = IXGBE_LINK_SPEED_1GB_FULL; + break; + case ixgbe_phy_x550em_kr: + if (hw->mac.type == ixgbe_mac_X550EM_a) { + /* check different backplane modes */ + if (hw->phy.nw_mng_if_sel & + IXGBE_NW_MNG_IF_SEL_PHY_SPEED_2_5G) { + *speed = IXGBE_LINK_SPEED_2_5GB_FULL; + break; + } else if (hw->device_id == + IXGBE_DEV_ID_X550EM_A_KR_L) { + *speed = IXGBE_LINK_SPEED_1GB_FULL; + break; + } + } + fallthrough; + default: + *speed = IXGBE_LINK_SPEED_10GB_FULL | + IXGBE_LINK_SPEED_1GB_FULL; + break; + } + } + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_get_lasi_ext_t_x550em - Determime external Base T PHY interrupt cause + * @hw: pointer to hardware structure + * @lsc: pointer to boolean flag which indicates whether external Base T + * PHY interrupt is lsc + * + * Determime if external Base T PHY interrupt cause is high temperature + * failure alarm or link status change. + * + * Return IXGBE_ERR_OVERTEMP if interrupt is high temperature + * failure alarm, else return PHY access status. + */ +STATIC s32 ixgbe_get_lasi_ext_t_x550em(struct ixgbe_hw *hw, bool *lsc) +{ + s32 status; + u16 reg; + + *lsc = false; + + /* Vendor alarm triggered */ + status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_GLOBAL_CHIP_STD_INT_FLAG, + IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE, + ®); + + if (status != IXGBE_SUCCESS || + !(reg & IXGBE_MDIO_GLOBAL_VEN_ALM_INT_EN)) + return status; + + /* Vendor Auto-Neg alarm triggered or Global alarm 1 triggered */ + status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_GLOBAL_INT_CHIP_VEN_FLAG, + IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE, + ®); + + if (status != IXGBE_SUCCESS || + !(reg & (IXGBE_MDIO_GLOBAL_AN_VEN_ALM_INT_EN | + IXGBE_MDIO_GLOBAL_ALARM_1_INT))) + return status; + + /* Global alarm triggered */ + status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_GLOBAL_ALARM_1, + IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE, + ®); + + if (status != IXGBE_SUCCESS) + return status; + + /* If high temperature failure, then return over temp error and exit */ + if (reg & IXGBE_MDIO_GLOBAL_ALM_1_HI_TMP_FAIL) { + /* power down the PHY in case the PHY FW didn't already */ + ixgbe_set_copper_phy_power(hw, false); + return IXGBE_ERR_OVERTEMP; + } else if (reg & IXGBE_MDIO_GLOBAL_ALM_1_DEV_FAULT) { + /* device fault alarm triggered */ + status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_GLOBAL_FAULT_MSG, + IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE, + ®); + + if (status != IXGBE_SUCCESS) + return status; + + /* if device fault was due to high temp alarm handle and exit */ + if (reg == IXGBE_MDIO_GLOBAL_FAULT_MSG_HI_TMP) { + /* power down the PHY in case the PHY FW didn't */ + ixgbe_set_copper_phy_power(hw, false); + return IXGBE_ERR_OVERTEMP; + } + } + + /* Vendor alarm 2 triggered */ + status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_GLOBAL_CHIP_STD_INT_FLAG, + IXGBE_MDIO_AUTO_NEG_DEV_TYPE, ®); + + if (status != IXGBE_SUCCESS || + !(reg & IXGBE_MDIO_GLOBAL_STD_ALM2_INT)) + return status; + + /* link connect/disconnect event occurred */ + status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_VENDOR_TX_ALARM2, + IXGBE_MDIO_AUTO_NEG_DEV_TYPE, ®); + + if (status != IXGBE_SUCCESS) + return status; + + /* Indicate LSC */ + if (reg & IXGBE_MDIO_AUTO_NEG_VEN_LSC) + *lsc = true; + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_enable_lasi_ext_t_x550em - Enable external Base T PHY interrupts + * @hw: pointer to hardware structure + * + * Enable link status change and temperature failure alarm for the external + * Base T PHY + * + * Returns PHY access status + */ +STATIC s32 ixgbe_enable_lasi_ext_t_x550em(struct ixgbe_hw *hw) +{ + s32 status; + u16 reg; + bool lsc; + + /* Clear interrupt flags */ + status = ixgbe_get_lasi_ext_t_x550em(hw, &lsc); + + /* Enable link status change alarm */ + + /* Enable the LASI interrupts on X552 devices to receive notifications + * of the link configurations of the external PHY and correspondingly + * support the configuration of the internal iXFI link, since iXFI does + * not support auto-negotiation. This is not required for X553 devices + * having KR support, which performs auto-negotiations and which is used + * as the internal link to the external PHY. Hence adding a check here + * to avoid enabling LASI interrupts for X553 devices. + */ + if (hw->mac.type != ixgbe_mac_X550EM_a) { + status = hw->phy.ops.read_reg(hw, + IXGBE_MDIO_PMA_TX_VEN_LASI_INT_MASK, + IXGBE_MDIO_AUTO_NEG_DEV_TYPE, ®); + + if (status != IXGBE_SUCCESS) + return status; + + reg |= IXGBE_MDIO_PMA_TX_VEN_LASI_INT_EN; + + status = hw->phy.ops.write_reg(hw, + IXGBE_MDIO_PMA_TX_VEN_LASI_INT_MASK, + IXGBE_MDIO_AUTO_NEG_DEV_TYPE, reg); + + if (status != IXGBE_SUCCESS) + return status; + } + + /* Enable high temperature failure and global fault alarms */ + status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_GLOBAL_INT_MASK, + IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE, + ®); + + if (status != IXGBE_SUCCESS) + return status; + + reg |= (IXGBE_MDIO_GLOBAL_INT_HI_TEMP_EN | + IXGBE_MDIO_GLOBAL_INT_DEV_FAULT_EN); + + status = hw->phy.ops.write_reg(hw, IXGBE_MDIO_GLOBAL_INT_MASK, + IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE, + reg); + + if (status != IXGBE_SUCCESS) + return status; + + /* Enable vendor Auto-Neg alarm and Global Interrupt Mask 1 alarm */ + status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_GLOBAL_INT_CHIP_VEN_MASK, + IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE, + ®); + + if (status != IXGBE_SUCCESS) + return status; + + reg |= (IXGBE_MDIO_GLOBAL_AN_VEN_ALM_INT_EN | + IXGBE_MDIO_GLOBAL_ALARM_1_INT); + + status = hw->phy.ops.write_reg(hw, IXGBE_MDIO_GLOBAL_INT_CHIP_VEN_MASK, + IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE, + reg); + + if (status != IXGBE_SUCCESS) + return status; + + /* Enable chip-wide vendor alarm */ + status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_GLOBAL_INT_CHIP_STD_MASK, + IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE, + ®); + + if (status != IXGBE_SUCCESS) + return status; + + reg |= IXGBE_MDIO_GLOBAL_VEN_ALM_INT_EN; + + status = hw->phy.ops.write_reg(hw, IXGBE_MDIO_GLOBAL_INT_CHIP_STD_MASK, + IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE, + reg); + + return status; +} + +/** + * ixgbe_setup_kr_speed_x550em - Configure the KR PHY for link speed. + * @hw: pointer to hardware structure + * @speed: link speed + * + * Configures the integrated KR PHY. + **/ +STATIC s32 ixgbe_setup_kr_speed_x550em(struct ixgbe_hw *hw, + ixgbe_link_speed speed) +{ + s32 status; + u32 reg_val; + + status = hw->mac.ops.read_iosf_sb_reg(hw, + IXGBE_KRM_LINK_CTRL_1(hw->bus.lan_id), + IXGBE_SB_IOSF_TARGET_KR_PHY, ®_val); + if (status) + return status; + + reg_val |= IXGBE_KRM_LINK_CTRL_1_TETH_AN_ENABLE; + reg_val &= ~(IXGBE_KRM_LINK_CTRL_1_TETH_AN_CAP_KR | + IXGBE_KRM_LINK_CTRL_1_TETH_AN_CAP_KX); + + /* Advertise 10G support. */ + if (speed & IXGBE_LINK_SPEED_10GB_FULL) + reg_val |= IXGBE_KRM_LINK_CTRL_1_TETH_AN_CAP_KR; + + /* Advertise 1G support. */ + if (speed & IXGBE_LINK_SPEED_1GB_FULL) + reg_val |= IXGBE_KRM_LINK_CTRL_1_TETH_AN_CAP_KX; + + status = hw->mac.ops.write_iosf_sb_reg(hw, + IXGBE_KRM_LINK_CTRL_1(hw->bus.lan_id), + IXGBE_SB_IOSF_TARGET_KR_PHY, reg_val); + + if (hw->mac.type == ixgbe_mac_X550EM_a) { + /* Set lane mode to KR auto negotiation */ + status = hw->mac.ops.read_iosf_sb_reg(hw, + IXGBE_KRM_PMD_FLX_MASK_ST20(hw->bus.lan_id), + IXGBE_SB_IOSF_TARGET_KR_PHY, ®_val); + + if (status) + return status; + + reg_val &= ~IXGBE_KRM_PMD_FLX_MASK_ST20_SPEED_MASK; + reg_val |= IXGBE_KRM_PMD_FLX_MASK_ST20_SPEED_AN; + reg_val |= IXGBE_KRM_PMD_FLX_MASK_ST20_AN_EN; + reg_val &= ~IXGBE_KRM_PMD_FLX_MASK_ST20_AN37_EN; + reg_val &= ~IXGBE_KRM_PMD_FLX_MASK_ST20_SGMII_EN; + + status = hw->mac.ops.write_iosf_sb_reg(hw, + IXGBE_KRM_PMD_FLX_MASK_ST20(hw->bus.lan_id), + IXGBE_SB_IOSF_TARGET_KR_PHY, reg_val); + } + + return ixgbe_restart_an_internal_phy_x550em(hw); +} + +/** + * ixgbe_reset_phy_fw - Reset firmware-controlled PHYs + * @hw: pointer to hardware structure + */ +static s32 ixgbe_reset_phy_fw(struct ixgbe_hw *hw) +{ + u32 store[FW_PHY_ACT_DATA_COUNT] = { 0 }; + s32 rc; + + if (hw->phy.reset_disable || ixgbe_check_reset_blocked(hw)) + return IXGBE_SUCCESS; + + rc = ixgbe_fw_phy_activity(hw, FW_PHY_ACT_PHY_SW_RESET, &store); + if (rc) + return rc; + memset(store, 0, sizeof(store)); + + rc = ixgbe_fw_phy_activity(hw, FW_PHY_ACT_INIT_PHY, &store); + if (rc) + return rc; + + return ixgbe_setup_fw_link(hw); +} + +/** + * ixgbe_check_overtemp_fw - Check firmware-controlled PHYs for overtemp + * @hw: pointer to hardware structure + */ +static s32 ixgbe_check_overtemp_fw(struct ixgbe_hw *hw) +{ + u32 store[FW_PHY_ACT_DATA_COUNT] = { 0 }; + s32 rc; + + rc = ixgbe_fw_phy_activity(hw, FW_PHY_ACT_GET_LINK_INFO, &store); + if (rc) + return rc; + + if (store[0] & FW_PHY_ACT_GET_LINK_INFO_TEMP) { + ixgbe_shutdown_fw_phy(hw); + return IXGBE_ERR_OVERTEMP; + } + return IXGBE_SUCCESS; +} + +/** + * ixgbe_read_mng_if_sel_x550em - Read NW_MNG_IF_SEL register + * @hw: pointer to hardware structure + * + * Read NW_MNG_IF_SEL register and save field values, and check for valid field + * values. + **/ +STATIC s32 ixgbe_read_mng_if_sel_x550em(struct ixgbe_hw *hw) +{ + /* Save NW management interface connected on board. This is used + * to determine internal PHY mode. + */ + hw->phy.nw_mng_if_sel = IXGBE_READ_REG(hw, IXGBE_NW_MNG_IF_SEL); + + /* If X552 (X550EM_a) and MDIO is connected to external PHY, then set + * PHY address. This register field was has only been used for X552. + */ + if (hw->mac.type == ixgbe_mac_X550EM_a && + hw->phy.nw_mng_if_sel & IXGBE_NW_MNG_IF_SEL_MDIO_ACT) { + hw->phy.addr = (hw->phy.nw_mng_if_sel & + IXGBE_NW_MNG_IF_SEL_MDIO_PHY_ADD) >> + IXGBE_NW_MNG_IF_SEL_MDIO_PHY_ADD_SHIFT; + } + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_init_phy_ops_X550em - PHY/SFP specific init + * @hw: pointer to hardware structure + * + * Initialize any function pointers that were not able to be + * set during init_shared_code because the PHY/SFP type was + * not known. Perform the SFP init if necessary. + */ +s32 ixgbe_init_phy_ops_X550em(struct ixgbe_hw *hw) +{ + struct ixgbe_phy_info *phy = &hw->phy; + s32 ret_val; + + DEBUGFUNC("ixgbe_init_phy_ops_X550em"); + + hw->mac.ops.set_lan_id(hw); + ixgbe_read_mng_if_sel_x550em(hw); + + if (hw->mac.ops.get_media_type(hw) == ixgbe_media_type_fiber) { + phy->phy_semaphore_mask = IXGBE_GSSR_SHARED_I2C_SM; + ixgbe_setup_mux_ctl(hw); + phy->ops.identify_sfp = ixgbe_identify_sfp_module_X550em; + } + + switch (hw->device_id) { + case IXGBE_DEV_ID_X550EM_A_1G_T: + case IXGBE_DEV_ID_X550EM_A_1G_T_L: + phy->ops.read_reg_mdi = NULL; + phy->ops.write_reg_mdi = NULL; + hw->phy.ops.read_reg = NULL; + hw->phy.ops.write_reg = NULL; + phy->ops.check_overtemp = ixgbe_check_overtemp_fw; + if (hw->bus.lan_id) + hw->phy.phy_semaphore_mask |= IXGBE_GSSR_PHY1_SM; + else + hw->phy.phy_semaphore_mask |= IXGBE_GSSR_PHY0_SM; + + break; + case IXGBE_DEV_ID_X550EM_A_10G_T: + case IXGBE_DEV_ID_X550EM_A_SFP: + hw->phy.ops.read_reg = ixgbe_read_phy_reg_x550a; + hw->phy.ops.write_reg = ixgbe_write_phy_reg_x550a; + if (hw->bus.lan_id) + hw->phy.phy_semaphore_mask |= IXGBE_GSSR_PHY1_SM; + else + hw->phy.phy_semaphore_mask |= IXGBE_GSSR_PHY0_SM; + break; + case IXGBE_DEV_ID_X550EM_X_SFP: + /* set up for CS4227 usage */ + hw->phy.phy_semaphore_mask = IXGBE_GSSR_SHARED_I2C_SM; + break; + case IXGBE_DEV_ID_X550EM_X_1G_T: + phy->ops.read_reg_mdi = NULL; + phy->ops.write_reg_mdi = NULL; + default: + break; + } + + /* Identify the PHY or SFP module */ + ret_val = phy->ops.identify(hw); + if (ret_val == IXGBE_ERR_SFP_NOT_SUPPORTED || + ret_val == IXGBE_ERR_PHY_ADDR_INVALID) + return ret_val; + + /* Setup function pointers based on detected hardware */ + ixgbe_init_mac_link_ops_X550em(hw); + if (phy->sfp_type != ixgbe_sfp_type_unknown) + phy->ops.reset = NULL; + + /* Set functions pointers based on phy type */ + switch (hw->phy.type) { + case ixgbe_phy_x550em_kx4: + phy->ops.setup_link = NULL; + phy->ops.read_reg = ixgbe_read_phy_reg_x550em; + phy->ops.write_reg = ixgbe_write_phy_reg_x550em; + break; + case ixgbe_phy_x550em_kr: + phy->ops.setup_link = ixgbe_setup_kr_x550em; + phy->ops.read_reg = ixgbe_read_phy_reg_x550em; + phy->ops.write_reg = ixgbe_write_phy_reg_x550em; + break; + case ixgbe_phy_ext_1g_t: + /* link is managed by FW */ + phy->ops.setup_link = NULL; + phy->ops.reset = NULL; + break; + case ixgbe_phy_x550em_xfi: + /* link is managed by HW */ + phy->ops.setup_link = NULL; + phy->ops.read_reg = ixgbe_read_phy_reg_x550em; + phy->ops.write_reg = ixgbe_write_phy_reg_x550em; + break; + case ixgbe_phy_x550em_ext_t: + /* If internal link mode is XFI, then setup iXFI internal link, + * else setup KR now. + */ + phy->ops.setup_internal_link = + ixgbe_setup_internal_phy_t_x550em; + + /* setup SW LPLU only for first revision of X550EM_x */ + if ((hw->mac.type == ixgbe_mac_X550EM_x) && + !(IXGBE_FUSES0_REV_MASK & + IXGBE_READ_REG(hw, IXGBE_FUSES0_GROUP(0)))) + phy->ops.enter_lplu = ixgbe_enter_lplu_t_x550em; + + phy->ops.handle_lasi = ixgbe_handle_lasi_ext_t_x550em; + phy->ops.reset = ixgbe_reset_phy_t_X550em; + break; + case ixgbe_phy_sgmii: + phy->ops.setup_link = NULL; + break; + case ixgbe_phy_fw: + phy->ops.setup_link = ixgbe_setup_fw_link; + phy->ops.reset = ixgbe_reset_phy_fw; + break; + default: + break; + } + return ret_val; +} + +/** + * ixgbe_set_mdio_speed - Set MDIO clock speed + * @hw: pointer to hardware structure + */ +STATIC void ixgbe_set_mdio_speed(struct ixgbe_hw *hw) +{ + u32 hlreg0; + + switch (hw->device_id) { + case IXGBE_DEV_ID_X550EM_X_10G_T: + case IXGBE_DEV_ID_X550EM_A_SGMII: + case IXGBE_DEV_ID_X550EM_A_SGMII_L: + case IXGBE_DEV_ID_X550EM_A_10G_T: + case IXGBE_DEV_ID_X550EM_A_SFP: + case IXGBE_DEV_ID_X550EM_A_QSFP: + /* Config MDIO clock speed before the first MDIO PHY access */ + hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0); + hlreg0 &= ~IXGBE_HLREG0_MDCSPD; + IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0); + break; + case IXGBE_DEV_ID_X550EM_A_1G_T: + case IXGBE_DEV_ID_X550EM_A_1G_T_L: + /* Select fast MDIO clock speed for these devices */ + hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0); + hlreg0 |= IXGBE_HLREG0_MDCSPD; + IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0); + break; + default: + break; + } +} + +/** + * ixgbe_reset_hw_X550em - Perform hardware reset + * @hw: pointer to hardware structure + * + * Resets the hardware by resetting the transmit and receive units, masks + * and clears all interrupts, perform a PHY reset, and perform a link (MAC) + * reset. + */ +s32 ixgbe_reset_hw_X550em(struct ixgbe_hw *hw) +{ + ixgbe_link_speed link_speed; + s32 status; + u32 ctrl = 0; + u32 i; + bool link_up = false; + u32 swfw_mask = hw->phy.phy_semaphore_mask; + + DEBUGFUNC("ixgbe_reset_hw_X550em"); + + /* Call adapter stop to disable Tx/Rx and clear interrupts */ + status = hw->mac.ops.stop_adapter(hw); + if (status != IXGBE_SUCCESS) { + hw_dbg(hw, "Failed to stop adapter, STATUS = %d\n", status); + return status; + } + /* flush pending Tx transactions */ + ixgbe_clear_tx_pending(hw); + + ixgbe_set_mdio_speed(hw); + + /* PHY ops must be identified and initialized prior to reset */ + status = hw->phy.ops.init(hw); + + if (status) + hw_dbg(hw, "Failed to initialize PHY ops, STATUS = %d\n", + status); + + if (status == IXGBE_ERR_SFP_NOT_SUPPORTED || + status == IXGBE_ERR_PHY_ADDR_INVALID) { + hw_dbg(hw, "Returning from reset HW due to PHY init failure\n"); + return status; + } + + /* start the external PHY */ + if (hw->phy.type == ixgbe_phy_x550em_ext_t) { + status = ixgbe_init_ext_t_x550em(hw); + if (status) { + hw_dbg(hw, "Failed to start the external PHY, STATUS = %d\n", + status); + return status; + } + } + + /* Setup SFP module if there is one present. */ + if (hw->phy.sfp_setup_needed) { + status = hw->mac.ops.setup_sfp(hw); + hw->phy.sfp_setup_needed = false; + } + + if (status == IXGBE_ERR_SFP_NOT_SUPPORTED) + return status; + + /* Reset PHY */ + if (!hw->phy.reset_disable && hw->phy.ops.reset) { + if (hw->phy.ops.reset(hw) == IXGBE_ERR_OVERTEMP) + return IXGBE_ERR_OVERTEMP; + } + +mac_reset_top: + /* Issue global reset to the MAC. Needs to be SW reset if link is up. + * If link reset is used when link is up, it might reset the PHY when + * mng is using it. If link is down or the flag to force full link + * reset is set, then perform link reset. + */ + ctrl = IXGBE_CTRL_LNK_RST; + if (!hw->force_full_reset) { + hw->mac.ops.check_link(hw, &link_speed, &link_up, false); + if (link_up) + ctrl = IXGBE_CTRL_RST; + } + + status = hw->mac.ops.acquire_swfw_sync(hw, swfw_mask); + if (status != IXGBE_SUCCESS) { + ERROR_REPORT2(IXGBE_ERROR_CAUTION, + "semaphore failed with %d", status); + return IXGBE_ERR_SWFW_SYNC; + } + ctrl |= IXGBE_READ_REG(hw, IXGBE_CTRL); + IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl); + IXGBE_WRITE_FLUSH(hw); + hw->mac.ops.release_swfw_sync(hw, swfw_mask); + + /* Poll for reset bit to self-clear meaning reset is complete */ + for (i = 0; i < 10; i++) { + usec_delay(1); + ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL); + if (!(ctrl & IXGBE_CTRL_RST_MASK)) + break; + } + + if (ctrl & IXGBE_CTRL_RST_MASK) { + status = IXGBE_ERR_RESET_FAILED; + hw_dbg(hw, "Reset polling failed to complete.\n"); + } + + msec_delay(50); + + /* Double resets are required for recovery from certain error + * conditions. Between resets, it is necessary to stall to + * allow time for any pending HW events to complete. + */ + if (hw->mac.flags & IXGBE_FLAGS_DOUBLE_RESET_REQUIRED) { + hw->mac.flags &= ~IXGBE_FLAGS_DOUBLE_RESET_REQUIRED; + goto mac_reset_top; + } + + /* Store the permanent mac address */ + hw->mac.ops.get_mac_addr(hw, hw->mac.perm_addr); + + /* Store MAC address from RAR0, clear receive address registers, and + * clear the multicast table. Also reset num_rar_entries to 128, + * since we modify this value when programming the SAN MAC address. + */ + hw->mac.num_rar_entries = 128; + hw->mac.ops.init_rx_addrs(hw); + + ixgbe_set_mdio_speed(hw); + + if (hw->device_id == IXGBE_DEV_ID_X550EM_X_SFP) + ixgbe_setup_mux_ctl(hw); + + if (status != IXGBE_SUCCESS) + hw_dbg(hw, "Reset HW failed, STATUS = %d\n", status); + + return status; +} + +/** + * ixgbe_init_ext_t_x550em - Start (unstall) the external Base T PHY. + * @hw: pointer to hardware structure + */ +s32 ixgbe_init_ext_t_x550em(struct ixgbe_hw *hw) +{ + s32 status; + u16 reg; + + status = hw->phy.ops.read_reg(hw, + IXGBE_MDIO_TX_VENDOR_ALARMS_3, + IXGBE_MDIO_PMA_PMD_DEV_TYPE, + ®); + + if (status != IXGBE_SUCCESS) + return status; + + /* If PHY FW reset completed bit is set then this is the first + * SW instance after a power on so the PHY FW must be un-stalled. + */ + if (reg & IXGBE_MDIO_TX_VENDOR_ALARMS_3_RST_MASK) { + status = hw->phy.ops.read_reg(hw, + IXGBE_MDIO_GLOBAL_RES_PR_10, + IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE, + ®); + + if (status != IXGBE_SUCCESS) + return status; + + reg &= ~IXGBE_MDIO_POWER_UP_STALL; + + status = hw->phy.ops.write_reg(hw, + IXGBE_MDIO_GLOBAL_RES_PR_10, + IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE, + reg); + + if (status != IXGBE_SUCCESS) + return status; + } + + return status; +} + +/** + * ixgbe_setup_kr_x550em - Configure the KR PHY. + * @hw: pointer to hardware structure + **/ +s32 ixgbe_setup_kr_x550em(struct ixgbe_hw *hw) +{ + /* leave link alone for 2.5G */ + if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_2_5GB_FULL) + return IXGBE_SUCCESS; + + if (ixgbe_check_reset_blocked(hw)) + return 0; + + return ixgbe_setup_kr_speed_x550em(hw, hw->phy.autoneg_advertised); +} + +/** + * ixgbe_setup_mac_link_sfp_x550em - Setup internal/external the PHY for SFP + * @hw: pointer to hardware structure + * @speed: new link speed + * @autoneg_wait_to_complete: unused + * + * Configure the external PHY and the integrated KR PHY for SFP support. + **/ +s32 ixgbe_setup_mac_link_sfp_x550em(struct ixgbe_hw *hw, + ixgbe_link_speed speed, + bool autoneg_wait_to_complete) +{ + s32 ret_val; + u16 reg_slice, reg_val; + bool setup_linear = false; + UNREFERENCED_1PARAMETER(autoneg_wait_to_complete); + + /* Check if SFP module is supported and linear */ + ret_val = ixgbe_supported_sfp_modules_X550em(hw, &setup_linear); + + /* If no SFP module present, then return success. Return success since + * there is no reason to configure CS4227 and SFP not present error is + * not excepted in the setup MAC link flow. + */ + if (ret_val == IXGBE_ERR_SFP_NOT_PRESENT) + return IXGBE_SUCCESS; + + if (ret_val != IXGBE_SUCCESS) + return ret_val; + + /* Configure internal PHY for KR/KX. */ + ixgbe_setup_kr_speed_x550em(hw, speed); + + /* Configure CS4227 LINE side to proper mode. */ + reg_slice = IXGBE_CS4227_LINE_SPARE24_LSB + + (hw->bus.lan_id << 12); + if (setup_linear) + reg_val = (IXGBE_CS4227_EDC_MODE_CX1 << 1) | 0x1; + else + reg_val = (IXGBE_CS4227_EDC_MODE_SR << 1) | 0x1; + ret_val = hw->link.ops.write_link(hw, hw->link.addr, reg_slice, + reg_val); + return ret_val; +} + +/** + * ixgbe_setup_sfi_x550a - Configure the internal PHY for native SFI mode + * @hw: pointer to hardware structure + * @speed: the link speed to force + * + * Configures the integrated PHY for native SFI mode. Used to connect the + * internal PHY directly to an SFP cage, without autonegotiation. + **/ +STATIC s32 ixgbe_setup_sfi_x550a(struct ixgbe_hw *hw, ixgbe_link_speed *speed) +{ + struct ixgbe_mac_info *mac = &hw->mac; + s32 status; + u32 reg_val; + + /* Disable all AN and force speed to 10G Serial. */ + status = mac->ops.read_iosf_sb_reg(hw, + IXGBE_KRM_PMD_FLX_MASK_ST20(hw->bus.lan_id), + IXGBE_SB_IOSF_TARGET_KR_PHY, ®_val); + if (status != IXGBE_SUCCESS) + return status; + + reg_val &= ~IXGBE_KRM_PMD_FLX_MASK_ST20_AN_EN; + reg_val &= ~IXGBE_KRM_PMD_FLX_MASK_ST20_AN37_EN; + reg_val &= ~IXGBE_KRM_PMD_FLX_MASK_ST20_SGMII_EN; + reg_val &= ~IXGBE_KRM_PMD_FLX_MASK_ST20_SPEED_MASK; + + /* Select forced link speed for internal PHY. */ + switch (*speed) { + case IXGBE_LINK_SPEED_10GB_FULL: + reg_val |= IXGBE_KRM_PMD_FLX_MASK_ST20_SPEED_10G; + break; + case IXGBE_LINK_SPEED_1GB_FULL: + reg_val |= IXGBE_KRM_PMD_FLX_MASK_ST20_SPEED_1G; + break; + default: + /* Other link speeds are not supported by internal PHY. */ + return IXGBE_ERR_LINK_SETUP; + } + + status = mac->ops.write_iosf_sb_reg(hw, + IXGBE_KRM_PMD_FLX_MASK_ST20(hw->bus.lan_id), + IXGBE_SB_IOSF_TARGET_KR_PHY, reg_val); + + /* Toggle port SW reset by AN reset. */ + status = ixgbe_restart_an_internal_phy_x550em(hw); + + return status; +} + +/** + * ixgbe_setup_mac_link_sfp_x550a - Setup internal PHY for SFP + * @hw: pointer to hardware structure + * @speed: new link speed + * @autoneg_wait_to_complete: unused + * + * Configure the the integrated PHY for SFP support. + **/ +s32 ixgbe_setup_mac_link_sfp_x550a(struct ixgbe_hw *hw, + ixgbe_link_speed speed, + bool autoneg_wait_to_complete) +{ + s32 ret_val; + u16 reg_phy_ext; + bool setup_linear = false; + u32 reg_slice, reg_phy_int, slice_offset; + + UNREFERENCED_1PARAMETER(autoneg_wait_to_complete); + + /* Check if SFP module is supported and linear */ + ret_val = ixgbe_supported_sfp_modules_X550em(hw, &setup_linear); + + /* If no SFP module present, then return success. Return success since + * SFP not present error is not excepted in the setup MAC link flow. + */ + if (ret_val == IXGBE_ERR_SFP_NOT_PRESENT) + return IXGBE_SUCCESS; + + if (ret_val != IXGBE_SUCCESS) + return ret_val; + + if (hw->device_id == IXGBE_DEV_ID_X550EM_A_SFP_N) { + /* Configure internal PHY for native SFI based on module type */ + ret_val = hw->mac.ops.read_iosf_sb_reg(hw, + IXGBE_KRM_PMD_FLX_MASK_ST20(hw->bus.lan_id), + IXGBE_SB_IOSF_TARGET_KR_PHY, ®_phy_int); + + if (ret_val != IXGBE_SUCCESS) + return ret_val; + + reg_phy_int &= IXGBE_KRM_PMD_FLX_MASK_ST20_SFI_10G_DA; + if (!setup_linear) + reg_phy_int |= IXGBE_KRM_PMD_FLX_MASK_ST20_SFI_10G_SR; + + ret_val = hw->mac.ops.write_iosf_sb_reg(hw, + IXGBE_KRM_PMD_FLX_MASK_ST20(hw->bus.lan_id), + IXGBE_SB_IOSF_TARGET_KR_PHY, reg_phy_int); + + if (ret_val != IXGBE_SUCCESS) + return ret_val; + + /* Setup SFI internal link. */ + ret_val = ixgbe_setup_sfi_x550a(hw, &speed); + } else { + /* Configure internal PHY for KR/KX. */ + ixgbe_setup_kr_speed_x550em(hw, speed); + + if (hw->phy.addr == 0x0 || hw->phy.addr == 0xFFFF) { + /* Find Address */ + hw_dbg(hw, "Invalid NW_MNG_IF_SEL.MDIO_PHY_ADD value\n"); + return IXGBE_ERR_PHY_ADDR_INVALID; + } + + /* Get external PHY SKU id */ + ret_val = hw->phy.ops.read_reg(hw, IXGBE_CS4227_EFUSE_PDF_SKU, + IXGBE_MDIO_ZERO_DEV_TYPE, ®_phy_ext); + + if (ret_val != IXGBE_SUCCESS) + return ret_val; + + /* When configuring quad port CS4223, the MAC instance is part + * of the slice offset. + */ + if (reg_phy_ext == IXGBE_CS4223_SKU_ID) + slice_offset = (hw->bus.lan_id + + (hw->bus.instance_id << 1)) << 12; + else + slice_offset = hw->bus.lan_id << 12; + + /* Configure CS4227/CS4223 LINE side to proper mode. */ + reg_slice = IXGBE_CS4227_LINE_SPARE24_LSB + slice_offset; + + ret_val = hw->phy.ops.read_reg(hw, reg_slice, + IXGBE_MDIO_ZERO_DEV_TYPE, ®_phy_ext); + + if (ret_val != IXGBE_SUCCESS) + return ret_val; + + reg_phy_ext &= ~((IXGBE_CS4227_EDC_MODE_CX1 << 1) | + (IXGBE_CS4227_EDC_MODE_SR << 1)); + + if (setup_linear) + reg_phy_ext |= (IXGBE_CS4227_EDC_MODE_CX1 << 1) | 0x1; + else + reg_phy_ext |= (IXGBE_CS4227_EDC_MODE_SR << 1) | 0x1; + ret_val = hw->phy.ops.write_reg(hw, reg_slice, + IXGBE_MDIO_ZERO_DEV_TYPE, reg_phy_ext); + + /* Flush previous write with a read */ + ret_val = hw->phy.ops.read_reg(hw, reg_slice, + IXGBE_MDIO_ZERO_DEV_TYPE, ®_phy_ext); + } + return ret_val; +} + +/** + * ixgbe_setup_ixfi_x550em_x - MAC specific iXFI configuration + * @hw: pointer to hardware structure + * + * iXfI configuration needed for ixgbe_mac_X550EM_x devices. + **/ +STATIC s32 ixgbe_setup_ixfi_x550em_x(struct ixgbe_hw *hw) +{ + struct ixgbe_mac_info *mac = &hw->mac; + s32 status; + u32 reg_val; + + /* Disable training protocol FSM. */ + status = mac->ops.read_iosf_sb_reg(hw, + IXGBE_KRM_RX_TRN_LINKUP_CTRL(hw->bus.lan_id), + IXGBE_SB_IOSF_TARGET_KR_PHY, ®_val); + if (status != IXGBE_SUCCESS) + return status; + reg_val |= IXGBE_KRM_RX_TRN_LINKUP_CTRL_CONV_WO_PROTOCOL; + status = mac->ops.write_iosf_sb_reg(hw, + IXGBE_KRM_RX_TRN_LINKUP_CTRL(hw->bus.lan_id), + IXGBE_SB_IOSF_TARGET_KR_PHY, reg_val); + if (status != IXGBE_SUCCESS) + return status; + + /* Disable Flex from training TXFFE. */ + status = mac->ops.read_iosf_sb_reg(hw, + IXGBE_KRM_DSP_TXFFE_STATE_4(hw->bus.lan_id), + IXGBE_SB_IOSF_TARGET_KR_PHY, ®_val); + if (status != IXGBE_SUCCESS) + return status; + reg_val &= ~IXGBE_KRM_DSP_TXFFE_STATE_C0_EN; + reg_val &= ~IXGBE_KRM_DSP_TXFFE_STATE_CP1_CN1_EN; + reg_val &= ~IXGBE_KRM_DSP_TXFFE_STATE_CO_ADAPT_EN; + status = mac->ops.write_iosf_sb_reg(hw, + IXGBE_KRM_DSP_TXFFE_STATE_4(hw->bus.lan_id), + IXGBE_SB_IOSF_TARGET_KR_PHY, reg_val); + if (status != IXGBE_SUCCESS) + return status; + status = mac->ops.read_iosf_sb_reg(hw, + IXGBE_KRM_DSP_TXFFE_STATE_5(hw->bus.lan_id), + IXGBE_SB_IOSF_TARGET_KR_PHY, ®_val); + if (status != IXGBE_SUCCESS) + return status; + reg_val &= ~IXGBE_KRM_DSP_TXFFE_STATE_C0_EN; + reg_val &= ~IXGBE_KRM_DSP_TXFFE_STATE_CP1_CN1_EN; + reg_val &= ~IXGBE_KRM_DSP_TXFFE_STATE_CO_ADAPT_EN; + status = mac->ops.write_iosf_sb_reg(hw, + IXGBE_KRM_DSP_TXFFE_STATE_5(hw->bus.lan_id), + IXGBE_SB_IOSF_TARGET_KR_PHY, reg_val); + if (status != IXGBE_SUCCESS) + return status; + + /* Enable override for coefficients. */ + status = mac->ops.read_iosf_sb_reg(hw, + IXGBE_KRM_TX_COEFF_CTRL_1(hw->bus.lan_id), + IXGBE_SB_IOSF_TARGET_KR_PHY, ®_val); + if (status != IXGBE_SUCCESS) + return status; + reg_val |= IXGBE_KRM_TX_COEFF_CTRL_1_OVRRD_EN; + reg_val |= IXGBE_KRM_TX_COEFF_CTRL_1_CZERO_EN; + reg_val |= IXGBE_KRM_TX_COEFF_CTRL_1_CPLUS1_OVRRD_EN; + reg_val |= IXGBE_KRM_TX_COEFF_CTRL_1_CMINUS1_OVRRD_EN; + status = mac->ops.write_iosf_sb_reg(hw, + IXGBE_KRM_TX_COEFF_CTRL_1(hw->bus.lan_id), + IXGBE_SB_IOSF_TARGET_KR_PHY, reg_val); + return status; +} + +/** + * ixgbe_setup_ixfi_x550em - Configure the KR PHY for iXFI mode. + * @hw: pointer to hardware structure + * @speed: the link speed to force + * + * Configures the integrated KR PHY to use iXFI mode. Used to connect an + * internal and external PHY at a specific speed, without autonegotiation. + **/ +STATIC s32 ixgbe_setup_ixfi_x550em(struct ixgbe_hw *hw, ixgbe_link_speed *speed) +{ + struct ixgbe_mac_info *mac = &hw->mac; + s32 status; + u32 reg_val; + + /* iXFI is only supported with X552 */ + if (mac->type != ixgbe_mac_X550EM_x) + return IXGBE_ERR_LINK_SETUP; + + /* Disable AN and force speed to 10G Serial. */ + status = mac->ops.read_iosf_sb_reg(hw, + IXGBE_KRM_LINK_CTRL_1(hw->bus.lan_id), + IXGBE_SB_IOSF_TARGET_KR_PHY, ®_val); + if (status != IXGBE_SUCCESS) + return status; + + reg_val &= ~IXGBE_KRM_LINK_CTRL_1_TETH_AN_ENABLE; + reg_val &= ~IXGBE_KRM_LINK_CTRL_1_TETH_FORCE_SPEED_MASK; + + /* Select forced link speed for internal PHY. */ + switch (*speed) { + case IXGBE_LINK_SPEED_10GB_FULL: + reg_val |= IXGBE_KRM_LINK_CTRL_1_TETH_FORCE_SPEED_10G; + break; + case IXGBE_LINK_SPEED_1GB_FULL: + reg_val |= IXGBE_KRM_LINK_CTRL_1_TETH_FORCE_SPEED_1G; + break; + default: + /* Other link speeds are not supported by internal KR PHY. */ + return IXGBE_ERR_LINK_SETUP; + } + + status = mac->ops.write_iosf_sb_reg(hw, + IXGBE_KRM_LINK_CTRL_1(hw->bus.lan_id), + IXGBE_SB_IOSF_TARGET_KR_PHY, reg_val); + if (status != IXGBE_SUCCESS) + return status; + + /* Additional configuration needed for x550em_x */ + if (hw->mac.type == ixgbe_mac_X550EM_x) { + status = ixgbe_setup_ixfi_x550em_x(hw); + if (status != IXGBE_SUCCESS) + return status; + } + + /* Toggle port SW reset by AN reset. */ + status = ixgbe_restart_an_internal_phy_x550em(hw); + + return status; +} + +/** + * ixgbe_ext_phy_t_x550em_get_link - Get ext phy link status + * @hw: address of hardware structure + * @link_up: address of boolean to indicate link status + * + * Returns error code if unable to get link status. + */ +STATIC s32 ixgbe_ext_phy_t_x550em_get_link(struct ixgbe_hw *hw, bool *link_up) +{ + s32 ret; + u16 autoneg_status; + + *link_up = false; + + /* read this twice back to back to indicate current status */ + ret = hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_STATUS, + IXGBE_MDIO_AUTO_NEG_DEV_TYPE, + &autoneg_status); + if (ret != IXGBE_SUCCESS) + return ret; + + ret = hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_STATUS, + IXGBE_MDIO_AUTO_NEG_DEV_TYPE, + &autoneg_status); + if (ret != IXGBE_SUCCESS) + return ret; + + *link_up = !!(autoneg_status & IXGBE_MDIO_AUTO_NEG_LINK_STATUS); + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_setup_internal_phy_t_x550em - Configure KR PHY to X557 link + * @hw: point to hardware structure + * + * Configures the link between the integrated KR PHY and the external X557 PHY + * The driver will call this function when it gets a link status change + * interrupt from the X557 PHY. This function configures the link speed + * between the PHYs to match the link speed of the BASE-T link. + * + * A return of a non-zero value indicates an error, and the base driver should + * not report link up. + */ +s32 ixgbe_setup_internal_phy_t_x550em(struct ixgbe_hw *hw) +{ + ixgbe_link_speed force_speed; + bool link_up; + s32 status; + u16 speed; + + if (hw->mac.ops.get_media_type(hw) != ixgbe_media_type_copper) + return IXGBE_ERR_CONFIG; + + if (hw->mac.type == ixgbe_mac_X550EM_x && + !(hw->phy.nw_mng_if_sel & IXGBE_NW_MNG_IF_SEL_INT_PHY_MODE)) { + /* If link is down, there is no setup necessary so return */ + status = ixgbe_ext_phy_t_x550em_get_link(hw, &link_up); + if (status != IXGBE_SUCCESS) + return status; + + if (!link_up) + return IXGBE_SUCCESS; + + status = hw->phy.ops.read_reg(hw, + IXGBE_MDIO_AUTO_NEG_VENDOR_STAT, + IXGBE_MDIO_AUTO_NEG_DEV_TYPE, + &speed); + if (status != IXGBE_SUCCESS) + return status; + + /* If link is still down - no setup is required so return */ + status = ixgbe_ext_phy_t_x550em_get_link(hw, &link_up); + if (status != IXGBE_SUCCESS) + return status; + if (!link_up) + return IXGBE_SUCCESS; + + /* clear everything but the speed and duplex bits */ + speed &= IXGBE_MDIO_AUTO_NEG_VENDOR_STATUS_MASK; + + switch (speed) { + case IXGBE_MDIO_AUTO_NEG_VENDOR_STATUS_10GB_FULL: + force_speed = IXGBE_LINK_SPEED_10GB_FULL; + break; + case IXGBE_MDIO_AUTO_NEG_VENDOR_STATUS_1GB_FULL: + force_speed = IXGBE_LINK_SPEED_1GB_FULL; + break; + default: + /* Internal PHY does not support anything else */ + return IXGBE_ERR_INVALID_LINK_SETTINGS; + } + + return ixgbe_setup_ixfi_x550em(hw, &force_speed); + } else { + speed = IXGBE_LINK_SPEED_10GB_FULL | + IXGBE_LINK_SPEED_1GB_FULL; + return ixgbe_setup_kr_speed_x550em(hw, speed); + } +} + +/** + * ixgbe_setup_phy_loopback_x550em - Configure the KR PHY for loopback. + * @hw: pointer to hardware structure + * + * Configures the integrated KR PHY to use internal loopback mode. + **/ +s32 ixgbe_setup_phy_loopback_x550em(struct ixgbe_hw *hw) +{ + s32 status; + u32 reg_val; + + /* Disable AN and force speed to 10G Serial. */ + status = hw->mac.ops.read_iosf_sb_reg(hw, + IXGBE_KRM_LINK_CTRL_1(hw->bus.lan_id), + IXGBE_SB_IOSF_TARGET_KR_PHY, ®_val); + if (status != IXGBE_SUCCESS) + return status; + reg_val &= ~IXGBE_KRM_LINK_CTRL_1_TETH_AN_ENABLE; + reg_val &= ~IXGBE_KRM_LINK_CTRL_1_TETH_FORCE_SPEED_MASK; + reg_val |= IXGBE_KRM_LINK_CTRL_1_TETH_FORCE_SPEED_10G; + status = hw->mac.ops.write_iosf_sb_reg(hw, + IXGBE_KRM_LINK_CTRL_1(hw->bus.lan_id), + IXGBE_SB_IOSF_TARGET_KR_PHY, reg_val); + if (status != IXGBE_SUCCESS) + return status; + + /* Set near-end loopback clocks. */ + status = hw->mac.ops.read_iosf_sb_reg(hw, + IXGBE_KRM_PORT_CAR_GEN_CTRL(hw->bus.lan_id), + IXGBE_SB_IOSF_TARGET_KR_PHY, ®_val); + if (status != IXGBE_SUCCESS) + return status; + reg_val |= IXGBE_KRM_PORT_CAR_GEN_CTRL_NELB_32B; + reg_val |= IXGBE_KRM_PORT_CAR_GEN_CTRL_NELB_KRPCS; + status = hw->mac.ops.write_iosf_sb_reg(hw, + IXGBE_KRM_PORT_CAR_GEN_CTRL(hw->bus.lan_id), + IXGBE_SB_IOSF_TARGET_KR_PHY, reg_val); + if (status != IXGBE_SUCCESS) + return status; + + /* Set loopback enable. */ + status = hw->mac.ops.read_iosf_sb_reg(hw, + IXGBE_KRM_PMD_DFX_BURNIN(hw->bus.lan_id), + IXGBE_SB_IOSF_TARGET_KR_PHY, ®_val); + if (status != IXGBE_SUCCESS) + return status; + reg_val |= IXGBE_KRM_PMD_DFX_BURNIN_TX_RX_KR_LB_MASK; + status = hw->mac.ops.write_iosf_sb_reg(hw, + IXGBE_KRM_PMD_DFX_BURNIN(hw->bus.lan_id), + IXGBE_SB_IOSF_TARGET_KR_PHY, reg_val); + if (status != IXGBE_SUCCESS) + return status; + + /* Training bypass. */ + status = hw->mac.ops.read_iosf_sb_reg(hw, + IXGBE_KRM_RX_TRN_LINKUP_CTRL(hw->bus.lan_id), + IXGBE_SB_IOSF_TARGET_KR_PHY, ®_val); + if (status != IXGBE_SUCCESS) + return status; + reg_val |= IXGBE_KRM_RX_TRN_LINKUP_CTRL_PROTOCOL_BYPASS; + status = hw->mac.ops.write_iosf_sb_reg(hw, + IXGBE_KRM_RX_TRN_LINKUP_CTRL(hw->bus.lan_id), + IXGBE_SB_IOSF_TARGET_KR_PHY, reg_val); + + return status; +} + +/** + * ixgbe_read_ee_hostif_X550 - Read EEPROM word using a host interface command + * assuming that the semaphore is already obtained. + * @hw: pointer to hardware structure + * @offset: offset of word in the EEPROM to read + * @data: word read from the EEPROM + * + * Reads a 16 bit word from the EEPROM using the hostif. + **/ +s32 ixgbe_read_ee_hostif_X550(struct ixgbe_hw *hw, u16 offset, u16 *data) +{ + const u32 mask = IXGBE_GSSR_SW_MNG_SM | IXGBE_GSSR_EEP_SM; + struct ixgbe_hic_read_shadow_ram buffer; + s32 status; + + DEBUGFUNC("ixgbe_read_ee_hostif_X550"); + buffer.hdr.req.cmd = FW_READ_SHADOW_RAM_CMD; + buffer.hdr.req.buf_lenh = 0; + buffer.hdr.req.buf_lenl = FW_READ_SHADOW_RAM_LEN; + buffer.hdr.req.checksum = FW_DEFAULT_CHECKSUM; + + /* convert offset from words to bytes */ + buffer.address = IXGBE_CPU_TO_BE32(offset * 2); + /* one word */ + buffer.length = IXGBE_CPU_TO_BE16(sizeof(u16)); + buffer.pad2 = 0; + buffer.data = 0; + buffer.pad3 = 0; + + status = hw->mac.ops.acquire_swfw_sync(hw, mask); + if (status) + return status; + + status = ixgbe_hic_unlocked(hw, (u32 *)&buffer, sizeof(buffer), + IXGBE_HI_COMMAND_TIMEOUT); + if (!status) { + *data = (u16)IXGBE_READ_REG_ARRAY(hw, IXGBE_FLEX_MNG, + FW_NVM_DATA_OFFSET); + } + + hw->mac.ops.release_swfw_sync(hw, mask); + return status; +} + +/** + * ixgbe_read_ee_hostif_buffer_X550- Read EEPROM word(s) using hostif + * @hw: pointer to hardware structure + * @offset: offset of word in the EEPROM to read + * @words: number of words + * @data: word(s) read from the EEPROM + * + * Reads a 16 bit word(s) from the EEPROM using the hostif. + **/ +s32 ixgbe_read_ee_hostif_buffer_X550(struct ixgbe_hw *hw, + u16 offset, u16 words, u16 *data) +{ + const u32 mask = IXGBE_GSSR_SW_MNG_SM | IXGBE_GSSR_EEP_SM; + struct ixgbe_hic_read_shadow_ram buffer; + u32 current_word = 0; + u16 words_to_read; + s32 status; + u32 i; + + DEBUGFUNC("ixgbe_read_ee_hostif_buffer_X550"); + + /* Take semaphore for the entire operation. */ + status = hw->mac.ops.acquire_swfw_sync(hw, mask); + if (status) { + hw_dbg(hw, "EEPROM read buffer - semaphore failed\n"); + return status; + } + + while (words) { + if (words > FW_MAX_READ_BUFFER_SIZE / 2) + words_to_read = FW_MAX_READ_BUFFER_SIZE / 2; + else + words_to_read = words; + + buffer.hdr.req.cmd = FW_READ_SHADOW_RAM_CMD; + buffer.hdr.req.buf_lenh = 0; + buffer.hdr.req.buf_lenl = FW_READ_SHADOW_RAM_LEN; + buffer.hdr.req.checksum = FW_DEFAULT_CHECKSUM; + + /* convert offset from words to bytes */ + buffer.address = IXGBE_CPU_TO_BE32((offset + current_word) * 2); + buffer.length = IXGBE_CPU_TO_BE16(words_to_read * 2); + buffer.pad2 = 0; + buffer.data = 0; + buffer.pad3 = 0; + + status = ixgbe_hic_unlocked(hw, (u32 *)&buffer, sizeof(buffer), + IXGBE_HI_COMMAND_TIMEOUT); + + if (status) { + hw_dbg(hw, "Host interface command failed\n"); + goto out; + } + + for (i = 0; i < words_to_read; i++) { + u32 reg = IXGBE_FLEX_MNG + (FW_NVM_DATA_OFFSET << 2) + + 2 * i; + u32 value = IXGBE_READ_REG(hw, reg); + + data[current_word] = (u16)(value & 0xffff); + current_word++; + i++; + if (i < words_to_read) { + value >>= 16; + data[current_word] = (u16)(value & 0xffff); + current_word++; + } + } + words -= words_to_read; + } + +out: + hw->mac.ops.release_swfw_sync(hw, mask); + return status; +} + +/** + * ixgbe_write_ee_hostif_data_X550 - Write EEPROM word using hostif + * @hw: pointer to hardware structure + * @offset: offset of word in the EEPROM to write + * @data: word write to the EEPROM + * + * Write a 16 bit word to the EEPROM using the hostif. + **/ +s32 ixgbe_write_ee_hostif_data_X550(struct ixgbe_hw *hw, u16 offset, + u16 data) +{ + s32 status; + struct ixgbe_hic_write_shadow_ram buffer; + + DEBUGFUNC("ixgbe_write_ee_hostif_data_X550"); + + buffer.hdr.req.cmd = FW_WRITE_SHADOW_RAM_CMD; + buffer.hdr.req.buf_lenh = 0; + buffer.hdr.req.buf_lenl = FW_WRITE_SHADOW_RAM_LEN; + buffer.hdr.req.checksum = FW_DEFAULT_CHECKSUM; + + /* one word */ + buffer.length = IXGBE_CPU_TO_BE16(sizeof(u16)); + buffer.data = data; + buffer.address = IXGBE_CPU_TO_BE32(offset * 2); + + status = ixgbe_host_interface_command(hw, (u32 *)&buffer, + sizeof(buffer), + IXGBE_HI_COMMAND_TIMEOUT, true); + if (status != IXGBE_SUCCESS) { + hw_dbg(hw, "for offset %04x failed with status %d\n", + offset, status); + return status; + } + if (buffer.hdr.rsp.buf_lenh_status != FW_CEM_RESP_STATUS_SUCCESS) { + hw_dbg(hw, "for offset %04x host interface return status %02x\n", + offset, buffer.hdr.rsp.buf_lenh_status); + return IXGBE_ERR_HOST_INTERFACE_COMMAND; + } + + return status; +} + +/** + * ixgbe_write_ee_hostif_X550 - Write EEPROM word using hostif + * @hw: pointer to hardware structure + * @offset: offset of word in the EEPROM to write + * @data: word write to the EEPROM + * + * Write a 16 bit word to the EEPROM using the hostif. + **/ +s32 ixgbe_write_ee_hostif_X550(struct ixgbe_hw *hw, u16 offset, + u16 data) +{ + s32 status = IXGBE_SUCCESS; + + DEBUGFUNC("ixgbe_write_ee_hostif_X550"); + + if (hw->mac.ops.acquire_swfw_sync(hw, IXGBE_GSSR_EEP_SM) == + IXGBE_SUCCESS) { + status = ixgbe_write_ee_hostif_data_X550(hw, offset, data); + hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_EEP_SM); + } else { + hw_dbg(hw, "write ee hostif failed to get semaphore"); + status = IXGBE_ERR_SWFW_SYNC; + } + + return status; +} + +/** + * ixgbe_write_ee_hostif_buffer_X550 - Write EEPROM word(s) using hostif + * @hw: pointer to hardware structure + * @offset: offset of word in the EEPROM to write + * @words: number of words + * @data: word(s) write to the EEPROM + * + * Write a 16 bit word(s) to the EEPROM using the hostif. + **/ +s32 ixgbe_write_ee_hostif_buffer_X550(struct ixgbe_hw *hw, + u16 offset, u16 words, u16 *data) +{ + s32 status = IXGBE_SUCCESS; + u32 i = 0; + + DEBUGFUNC("ixgbe_write_ee_hostif_buffer_X550"); + + /* Take semaphore for the entire operation. */ + status = hw->mac.ops.acquire_swfw_sync(hw, IXGBE_GSSR_EEP_SM); + if (status != IXGBE_SUCCESS) { + hw_dbg(hw, "EEPROM write buffer - semaphore failed\n"); + goto out; + } + + for (i = 0; i < words; i++) { + status = ixgbe_write_ee_hostif_data_X550(hw, offset + i, + data[i]); + + if (status != IXGBE_SUCCESS) { + hw_dbg(hw, "Eeprom buffered write failed\n"); + break; + } + } + + hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_EEP_SM); +out: + + return status; +} + +/** + * ixgbe_checksum_ptr_x550 - Checksum one pointer region + * @hw: pointer to hardware structure + * @ptr: pointer offset in eeprom + * @size: size of section pointed by ptr, if 0 first word will be used as size + * @csum: address of checksum to update + * @buffer: pointer to buffer containing calculated checksum + * @buffer_size: size of buffer + * + * Returns error status for any failure + */ +STATIC s32 ixgbe_checksum_ptr_x550(struct ixgbe_hw *hw, u16 ptr, + u16 size, u16 *csum, u16 *buffer, + u32 buffer_size) +{ + u16 buf[256]; + s32 status; + u16 length, bufsz, i, start; + u16 *local_buffer; + + bufsz = sizeof(buf) / sizeof(buf[0]); + + /* Read a chunk at the pointer location */ + if (!buffer) { + status = ixgbe_read_ee_hostif_buffer_X550(hw, ptr, bufsz, buf); + if (status) { + hw_dbg(hw, "Failed to read EEPROM image\n"); + return status; + } + local_buffer = buf; + } else { + if (buffer_size < ptr) + return IXGBE_ERR_PARAM; + local_buffer = &buffer[ptr]; + } + + if (size) { + start = 0; + length = size; + } else { + start = 1; + length = local_buffer[0]; + + /* Skip pointer section if length is invalid. */ + if (length == 0xFFFF || length == 0 || + (u32)length > hw->eeprom.word_size - (u32)ptr) + return IXGBE_SUCCESS; + } + + if (buffer && ((u32)start + (u32)length > buffer_size)) + return IXGBE_ERR_PARAM; + + for (i = start; length; i++, length--) { + if (i == bufsz && !buffer) { + ptr += bufsz; + i = 0; + if (length < bufsz) + bufsz = length; + + /* Read a chunk at the pointer location */ + status = ixgbe_read_ee_hostif_buffer_X550(hw, ptr, + bufsz, buf); + if (status) { + hw_dbg(hw, "Failed to read EEPROM image\n"); + return status; + } + } + *csum += local_buffer[i]; + } + return IXGBE_SUCCESS; +} + +/** + * ixgbe_calc_checksum_X550 - Calculates and returns the checksum + * @hw: pointer to hardware structure + * @buffer: pointer to buffer containing calculated checksum + * @buffer_size: size of buffer + * + * Returns a negative error code on error, or the 16-bit checksum + **/ +s32 ixgbe_calc_checksum_X550(struct ixgbe_hw *hw, u16 *buffer, u32 buffer_size) +{ + u16 eeprom_ptrs[IXGBE_EEPROM_LAST_WORD + 1]; + u16 *local_buffer; + s32 status; + u16 checksum = 0; + u16 pointer, i, size; + + DEBUGFUNC("ixgbe_calc_eeprom_checksum_X550"); + + hw->eeprom.ops.init_params(hw); + + if (!buffer) { + /* Read pointer area */ + status = ixgbe_read_ee_hostif_buffer_X550(hw, 0, + IXGBE_EEPROM_LAST_WORD + 1, + eeprom_ptrs); + if (status) { + hw_dbg(hw, "Failed to read EEPROM image\n"); + return status; + } + local_buffer = eeprom_ptrs; + } else { + if (buffer_size < IXGBE_EEPROM_LAST_WORD) + return IXGBE_ERR_PARAM; + local_buffer = buffer; + } + + /* + * For X550 hardware include 0x0-0x41 in the checksum, skip the + * checksum word itself + */ + for (i = 0; i <= IXGBE_EEPROM_LAST_WORD; i++) + if (i != IXGBE_EEPROM_CHECKSUM) + checksum += local_buffer[i]; + + /* + * Include all data from pointers 0x3, 0x6-0xE. This excludes the + * FW, PHY module, and PCIe Expansion/Option ROM pointers. + */ + for (i = IXGBE_PCIE_ANALOG_PTR_X550; i < IXGBE_FW_PTR; i++) { + if (i == IXGBE_PHY_PTR || i == IXGBE_OPTION_ROM_PTR) + continue; + + pointer = local_buffer[i]; + + /* Skip pointer section if the pointer is invalid. */ + if (pointer == 0xFFFF || pointer == 0 || + pointer >= hw->eeprom.word_size) + continue; + + switch (i) { + case IXGBE_PCIE_GENERAL_PTR: + size = IXGBE_IXGBE_PCIE_GENERAL_SIZE; + break; + case IXGBE_PCIE_CONFIG0_PTR: + case IXGBE_PCIE_CONFIG1_PTR: + size = IXGBE_PCIE_CONFIG_SIZE; + break; + default: + size = 0; + break; + } + + status = ixgbe_checksum_ptr_x550(hw, pointer, size, &checksum, + buffer, buffer_size); + if (status) + return status; + } + + checksum = (u16)IXGBE_EEPROM_SUM - checksum; + + return (s32)checksum; +} + +/** + * ixgbe_calc_eeprom_checksum_X550 - Calculates and returns the checksum + * @hw: pointer to hardware structure + * + * Returns a negative error code on error, or the 16-bit checksum + **/ +s32 ixgbe_calc_eeprom_checksum_X550(struct ixgbe_hw *hw) +{ + return ixgbe_calc_checksum_X550(hw, NULL, 0); +} + +/** + * ixgbe_validate_eeprom_checksum_X550 - Validate EEPROM checksum + * @hw: pointer to hardware structure + * @checksum_val: calculated checksum + * + * Performs checksum calculation and validates the EEPROM checksum. If the + * caller does not need checksum_val, the value can be NULL. + **/ +s32 ixgbe_validate_eeprom_checksum_X550(struct ixgbe_hw *hw, u16 *checksum_val) +{ + s32 status; + u16 checksum; + u16 read_checksum = 0; + + DEBUGFUNC("ixgbe_validate_eeprom_checksum_X550"); + + /* Read the first word from the EEPROM. If this times out or fails, do + * not continue or we could be in for a very long wait while every + * EEPROM read fails + */ + status = hw->eeprom.ops.read(hw, 0, &checksum); + if (status) { + hw_dbg(hw, "EEPROM read failed\n"); + return status; + } + + status = hw->eeprom.ops.calc_checksum(hw); + if (status < 0) + return status; + + checksum = (u16)(status & 0xffff); + + status = ixgbe_read_ee_hostif_X550(hw, IXGBE_EEPROM_CHECKSUM, + &read_checksum); + if (status) + return status; + + /* Verify read checksum from EEPROM is the same as + * calculated checksum + */ + if (read_checksum != checksum) { + status = IXGBE_ERR_EEPROM_CHECKSUM; + ERROR_REPORT1(IXGBE_ERROR_INVALID_STATE, + "Invalid EEPROM checksum"); + } + + /* If the user cares, return the calculated checksum */ + if (checksum_val) + *checksum_val = checksum; + + return status; +} + +/** + * ixgbe_update_eeprom_checksum_X550 - Updates the EEPROM checksum and flash + * @hw: pointer to hardware structure + * + * After writing EEPROM to shadow RAM using EEWR register, software calculates + * checksum and updates the EEPROM and instructs the hardware to update + * the flash. + **/ +s32 ixgbe_update_eeprom_checksum_X550(struct ixgbe_hw *hw) +{ + s32 status; + u16 checksum = 0; + + DEBUGFUNC("ixgbe_update_eeprom_checksum_X550"); + + /* Read the first word from the EEPROM. If this times out or fails, do + * not continue or we could be in for a very long wait while every + * EEPROM read fails + */ + status = ixgbe_read_ee_hostif_X550(hw, 0, &checksum); + if (status) { + hw_dbg(hw, "EEPROM read failed\n"); + return status; + } + + status = ixgbe_calc_eeprom_checksum_X550(hw); + if (status < 0) + return status; + + checksum = (u16)(status & 0xffff); + + status = ixgbe_write_ee_hostif_X550(hw, IXGBE_EEPROM_CHECKSUM, + checksum); + if (status) + return status; + + status = ixgbe_update_flash_X550(hw); + + return status; +} + +/** + * ixgbe_update_flash_X550 - Instruct HW to copy EEPROM to Flash device + * @hw: pointer to hardware structure + * + * Issue a shadow RAM dump to FW to copy EEPROM from shadow RAM to the flash. + **/ +s32 ixgbe_update_flash_X550(struct ixgbe_hw *hw) +{ + s32 status = IXGBE_SUCCESS; + union ixgbe_hic_hdr2 buffer; + + DEBUGFUNC("ixgbe_update_flash_X550"); + + buffer.req.cmd = FW_SHADOW_RAM_DUMP_CMD; + buffer.req.buf_lenh = 0; + buffer.req.buf_lenl = FW_SHADOW_RAM_DUMP_LEN; + buffer.req.checksum = FW_DEFAULT_CHECKSUM; + + status = ixgbe_host_interface_command(hw, (u32 *)&buffer, + sizeof(buffer), + IXGBE_HI_COMMAND_TIMEOUT, false); + + return status; +} + +/** + * ixgbe_get_supported_physical_layer_X550em - Returns physical layer type + * @hw: pointer to hardware structure + * + * Determines physical layer capabilities of the current configuration. + **/ +u64 ixgbe_get_supported_physical_layer_X550em(struct ixgbe_hw *hw) +{ + u64 physical_layer = IXGBE_PHYSICAL_LAYER_UNKNOWN; + u16 ext_ability = 0; + + DEBUGFUNC("ixgbe_get_supported_physical_layer_X550em"); + + hw->phy.ops.identify(hw); + + switch (hw->phy.type) { + case ixgbe_phy_x550em_kr: + if (hw->mac.type == ixgbe_mac_X550EM_a) { + if (hw->phy.nw_mng_if_sel & + IXGBE_NW_MNG_IF_SEL_PHY_SPEED_2_5G) { + physical_layer = + IXGBE_PHYSICAL_LAYER_2500BASE_KX; + break; + } else if (hw->device_id == + IXGBE_DEV_ID_X550EM_A_KR_L) { + physical_layer = + IXGBE_PHYSICAL_LAYER_1000BASE_KX; + break; + } + } + fallthrough; + case ixgbe_phy_x550em_xfi: + physical_layer = IXGBE_PHYSICAL_LAYER_10GBASE_KR | + IXGBE_PHYSICAL_LAYER_1000BASE_KX; + break; + case ixgbe_phy_x550em_kx4: + physical_layer = IXGBE_PHYSICAL_LAYER_10GBASE_KX4 | + IXGBE_PHYSICAL_LAYER_1000BASE_KX; + break; + case ixgbe_phy_x550em_ext_t: + hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_EXT_ABILITY, + IXGBE_MDIO_PMA_PMD_DEV_TYPE, + &ext_ability); + if (ext_ability & IXGBE_MDIO_PHY_10GBASET_ABILITY) + physical_layer |= IXGBE_PHYSICAL_LAYER_10GBASE_T; + if (ext_ability & IXGBE_MDIO_PHY_1000BASET_ABILITY) + physical_layer |= IXGBE_PHYSICAL_LAYER_1000BASE_T; + break; + case ixgbe_phy_fw: + if (hw->phy.speeds_supported & IXGBE_LINK_SPEED_1GB_FULL) + physical_layer |= IXGBE_PHYSICAL_LAYER_1000BASE_T; + if (hw->phy.speeds_supported & IXGBE_LINK_SPEED_100_FULL) + physical_layer |= IXGBE_PHYSICAL_LAYER_100BASE_TX; + if (hw->phy.speeds_supported & IXGBE_LINK_SPEED_10_FULL) + physical_layer |= IXGBE_PHYSICAL_LAYER_10BASE_T; + break; + case ixgbe_phy_sgmii: + physical_layer = IXGBE_PHYSICAL_LAYER_1000BASE_KX; + break; + case ixgbe_phy_ext_1g_t: + physical_layer |= IXGBE_PHYSICAL_LAYER_1000BASE_T; + break; + default: + break; + } + + if (hw->mac.ops.get_media_type(hw) == ixgbe_media_type_fiber) + physical_layer = ixgbe_get_supported_phy_sfp_layer_generic(hw); + + return physical_layer; +} + +/** + * ixgbe_get_bus_info_X550em - Set PCI bus info + * @hw: pointer to hardware structure + * + * Sets bus link width and speed to unknown because X550em is + * not a PCI device. + **/ +s32 ixgbe_get_bus_info_X550em(struct ixgbe_hw *hw) +{ + + DEBUGFUNC("ixgbe_get_bus_info_x550em"); + + hw->bus.width = ixgbe_bus_width_unknown; + hw->bus.speed = ixgbe_bus_speed_unknown; + + hw->mac.ops.set_lan_id(hw); + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_disable_rx_x550 - Disable RX unit + * @hw: pointer to hardware structure + * + * Enables the Rx DMA unit for x550 + **/ +void ixgbe_disable_rx_x550(struct ixgbe_hw *hw) +{ + u32 rxctrl, pfdtxgswc; + s32 status; + struct ixgbe_hic_disable_rxen fw_cmd; + + DEBUGFUNC("ixgbe_enable_rx_dma_x550"); + + rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL); + if (rxctrl & IXGBE_RXCTRL_RXEN) { + pfdtxgswc = IXGBE_READ_REG(hw, IXGBE_PFDTXGSWC); + if (pfdtxgswc & IXGBE_PFDTXGSWC_VT_LBEN) { + pfdtxgswc &= ~IXGBE_PFDTXGSWC_VT_LBEN; + IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, pfdtxgswc); + hw->mac.set_lben = true; + } else { + hw->mac.set_lben = false; + } + + fw_cmd.hdr.cmd = FW_DISABLE_RXEN_CMD; + fw_cmd.hdr.buf_len = FW_DISABLE_RXEN_LEN; + fw_cmd.hdr.checksum = FW_DEFAULT_CHECKSUM; + fw_cmd.port_number = (u8)hw->bus.lan_id; + + status = ixgbe_host_interface_command(hw, (u32 *)&fw_cmd, + sizeof(struct ixgbe_hic_disable_rxen), + IXGBE_HI_COMMAND_TIMEOUT, true); + + /* If we fail - disable RX using register write */ + if (status) { + rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL); + if (rxctrl & IXGBE_RXCTRL_RXEN) { + rxctrl &= ~IXGBE_RXCTRL_RXEN; + IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl); + } + } + } +} + +/** + * ixgbe_enter_lplu_t_x550em - Transition to low power states + * @hw: pointer to hardware structure + * + * Configures Low Power Link Up on transition to low power states + * (from D0 to non-D0). Link is required to enter LPLU so avoid resetting the + * X557 PHY immediately prior to entering LPLU. + **/ +s32 ixgbe_enter_lplu_t_x550em(struct ixgbe_hw *hw) +{ + u16 an_10g_cntl_reg, autoneg_reg, speed; + s32 status; + ixgbe_link_speed lcd_speed; + u32 save_autoneg; + bool link_up; + + /* SW LPLU not required on later HW revisions. */ + if ((hw->mac.type == ixgbe_mac_X550EM_x) && + (IXGBE_FUSES0_REV_MASK & + IXGBE_READ_REG(hw, IXGBE_FUSES0_GROUP(0)))) + return IXGBE_SUCCESS; + + /* If blocked by MNG FW, then don't restart AN */ + if (ixgbe_check_reset_blocked(hw)) + return IXGBE_SUCCESS; + + status = ixgbe_ext_phy_t_x550em_get_link(hw, &link_up); + if (status != IXGBE_SUCCESS) + return status; + + status = ixgbe_read_eeprom(hw, NVM_INIT_CTRL_3, &hw->eeprom.ctrl_word_3); + + if (status != IXGBE_SUCCESS) + return status; + + /* If link is down, LPLU disabled in NVM, WoL disabled, or manageability + * disabled, then force link down by entering low power mode. + */ + if (!link_up || !(hw->eeprom.ctrl_word_3 & NVM_INIT_CTRL_3_LPLU) || + !(hw->wol_enabled || ixgbe_mng_present(hw))) + return ixgbe_set_copper_phy_power(hw, FALSE); + + /* Determine LCD */ + status = ixgbe_get_lcd_t_x550em(hw, &lcd_speed); + + if (status != IXGBE_SUCCESS) + return status; + + /* If no valid LCD link speed, then force link down and exit. */ + if (lcd_speed == IXGBE_LINK_SPEED_UNKNOWN) + return ixgbe_set_copper_phy_power(hw, FALSE); + + status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_VENDOR_STAT, + IXGBE_MDIO_AUTO_NEG_DEV_TYPE, + &speed); + + if (status != IXGBE_SUCCESS) + return status; + + /* If no link now, speed is invalid so take link down */ + status = ixgbe_ext_phy_t_x550em_get_link(hw, &link_up); + if (status != IXGBE_SUCCESS) + return ixgbe_set_copper_phy_power(hw, false); + + /* clear everything but the speed bits */ + speed &= IXGBE_MDIO_AUTO_NEG_VEN_STAT_SPEED_MASK; + + /* If current speed is already LCD, then exit. */ + if (((speed == IXGBE_MDIO_AUTO_NEG_VENDOR_STATUS_1GB) && + (lcd_speed == IXGBE_LINK_SPEED_1GB_FULL)) || + ((speed == IXGBE_MDIO_AUTO_NEG_VENDOR_STATUS_10GB) && + (lcd_speed == IXGBE_LINK_SPEED_10GB_FULL))) + return status; + + /* Clear AN completed indication */ + status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_VENDOR_TX_ALARM, + IXGBE_MDIO_AUTO_NEG_DEV_TYPE, + &autoneg_reg); + + if (status != IXGBE_SUCCESS) + return status; + + status = hw->phy.ops.read_reg(hw, IXGBE_MII_10GBASE_T_AUTONEG_CTRL_REG, + IXGBE_MDIO_AUTO_NEG_DEV_TYPE, + &an_10g_cntl_reg); + + if (status != IXGBE_SUCCESS) + return status; + + status = hw->phy.ops.read_reg(hw, + IXGBE_MII_AUTONEG_VENDOR_PROVISION_1_REG, + IXGBE_MDIO_AUTO_NEG_DEV_TYPE, + &autoneg_reg); + + if (status != IXGBE_SUCCESS) + return status; + + save_autoneg = hw->phy.autoneg_advertised; + + /* Setup link at least common link speed */ + status = hw->mac.ops.setup_link(hw, lcd_speed, false); + + /* restore autoneg from before setting lplu speed */ + hw->phy.autoneg_advertised = save_autoneg; + + return status; +} + +/** + * ixgbe_get_lcd_t_x550em - Determine lowest common denominator + * @hw: pointer to hardware structure + * @lcd_speed: pointer to lowest common link speed + * + * Determine lowest common link speed with link partner. + **/ +s32 ixgbe_get_lcd_t_x550em(struct ixgbe_hw *hw, ixgbe_link_speed *lcd_speed) +{ + u16 an_lp_status; + s32 status; + u16 word = hw->eeprom.ctrl_word_3; + + *lcd_speed = IXGBE_LINK_SPEED_UNKNOWN; + + status = hw->phy.ops.read_reg(hw, IXGBE_AUTO_NEG_LP_STATUS, + IXGBE_MDIO_AUTO_NEG_DEV_TYPE, + &an_lp_status); + + if (status != IXGBE_SUCCESS) + return status; + + /* If link partner advertised 1G, return 1G */ + if (an_lp_status & IXGBE_AUTO_NEG_LP_1000BASE_CAP) { + *lcd_speed = IXGBE_LINK_SPEED_1GB_FULL; + return status; + } + + /* If 10G disabled for LPLU via NVM D10GMP, then return no valid LCD */ + if ((hw->bus.lan_id && (word & NVM_INIT_CTRL_3_D10GMP_PORT1)) || + (word & NVM_INIT_CTRL_3_D10GMP_PORT0)) + return status; + + /* Link partner not capable of lower speeds, return 10G */ + *lcd_speed = IXGBE_LINK_SPEED_10GB_FULL; + return status; +} + +/** + * ixgbe_setup_fc_X550em - Set up flow control + * @hw: pointer to hardware structure + * + * Called at init time to set up flow control. + **/ +s32 ixgbe_setup_fc_X550em(struct ixgbe_hw *hw) +{ + s32 ret_val = IXGBE_SUCCESS; + u32 pause, asm_dir, reg_val; + + DEBUGFUNC("ixgbe_setup_fc_X550em"); + + /* Validate the requested mode */ + if (hw->fc.strict_ieee && hw->fc.requested_mode == ixgbe_fc_rx_pause) { + ERROR_REPORT1(IXGBE_ERROR_UNSUPPORTED, + "ixgbe_fc_rx_pause not valid in strict IEEE mode\n"); + ret_val = IXGBE_ERR_INVALID_LINK_SETTINGS; + goto out; + } + + /* 10gig parts do not have a word in the EEPROM to determine the + * default flow control setting, so we explicitly set it to full. + */ + if (hw->fc.requested_mode == ixgbe_fc_default) + hw->fc.requested_mode = ixgbe_fc_full; + + /* Determine PAUSE and ASM_DIR bits. */ + switch (hw->fc.requested_mode) { + case ixgbe_fc_none: + pause = 0; + asm_dir = 0; + break; + case ixgbe_fc_tx_pause: + pause = 0; + asm_dir = 1; + break; + case ixgbe_fc_rx_pause: + /* Rx Flow control is enabled and Tx Flow control is + * disabled by software override. Since there really + * isn't a way to advertise that we are capable of RX + * Pause ONLY, we will advertise that we support both + * symmetric and asymmetric Rx PAUSE, as such we fall + * through to the fc_full statement. Later, we will + * disable the adapter's ability to send PAUSE frames. + */ + case ixgbe_fc_full: + pause = 1; + asm_dir = 1; + break; + default: + ERROR_REPORT1(IXGBE_ERROR_ARGUMENT, + "Flow control param set incorrectly\n"); + ret_val = IXGBE_ERR_CONFIG; + goto out; + } + + switch (hw->device_id) { + case IXGBE_DEV_ID_X550EM_X_KR: + case IXGBE_DEV_ID_X550EM_A_KR: + case IXGBE_DEV_ID_X550EM_A_KR_L: + ret_val = hw->mac.ops.read_iosf_sb_reg(hw, + IXGBE_KRM_AN_CNTL_1(hw->bus.lan_id), + IXGBE_SB_IOSF_TARGET_KR_PHY, ®_val); + if (ret_val != IXGBE_SUCCESS) + goto out; + reg_val &= ~(IXGBE_KRM_AN_CNTL_1_SYM_PAUSE | + IXGBE_KRM_AN_CNTL_1_ASM_PAUSE); + if (pause) + reg_val |= IXGBE_KRM_AN_CNTL_1_SYM_PAUSE; + if (asm_dir) + reg_val |= IXGBE_KRM_AN_CNTL_1_ASM_PAUSE; + ret_val = hw->mac.ops.write_iosf_sb_reg(hw, + IXGBE_KRM_AN_CNTL_1(hw->bus.lan_id), + IXGBE_SB_IOSF_TARGET_KR_PHY, reg_val); + + /* This device does not fully support AN. */ + hw->fc.disable_fc_autoneg = true; + break; + case IXGBE_DEV_ID_X550EM_X_XFI: + hw->fc.disable_fc_autoneg = true; + break; + default: + break; + } + +out: + return ret_val; +} + +/** + * ixgbe_fc_autoneg_backplane_x550em_a - Enable flow control IEEE clause 37 + * @hw: pointer to hardware structure + * + * Enable flow control according to IEEE clause 37. + **/ +void ixgbe_fc_autoneg_backplane_x550em_a(struct ixgbe_hw *hw) +{ + u32 link_s1, lp_an_page_low, an_cntl_1; + s32 status = IXGBE_ERR_FC_NOT_NEGOTIATED; + ixgbe_link_speed speed; + bool link_up; + + /* AN should have completed when the cable was plugged in. + * Look for reasons to bail out. Bail out if: + * - FC autoneg is disabled, or if + * - link is not up. + */ + if (hw->fc.disable_fc_autoneg) { + ERROR_REPORT1(IXGBE_ERROR_UNSUPPORTED, + "Flow control autoneg is disabled"); + goto out; + } + + hw->mac.ops.check_link(hw, &speed, &link_up, false); + if (!link_up) { + ERROR_REPORT1(IXGBE_ERROR_SOFTWARE, "The link is down"); + goto out; + } + + /* Check at auto-negotiation has completed */ + status = hw->mac.ops.read_iosf_sb_reg(hw, + IXGBE_KRM_LINK_S1(hw->bus.lan_id), + IXGBE_SB_IOSF_TARGET_KR_PHY, &link_s1); + + if (status != IXGBE_SUCCESS || + (link_s1 & IXGBE_KRM_LINK_S1_MAC_AN_COMPLETE) == 0) { + hw_dbg(hw, "Auto-Negotiation did not complete\n"); + status = IXGBE_ERR_FC_NOT_NEGOTIATED; + goto out; + } + + /* Read the 10g AN autoc and LP ability registers and resolve + * local flow control settings accordingly + */ + status = hw->mac.ops.read_iosf_sb_reg(hw, + IXGBE_KRM_AN_CNTL_1(hw->bus.lan_id), + IXGBE_SB_IOSF_TARGET_KR_PHY, &an_cntl_1); + + if (status != IXGBE_SUCCESS) { + hw_dbg(hw, "Auto-Negotiation did not complete\n"); + goto out; + } + + status = hw->mac.ops.read_iosf_sb_reg(hw, + IXGBE_KRM_LP_BASE_PAGE_HIGH(hw->bus.lan_id), + IXGBE_SB_IOSF_TARGET_KR_PHY, &lp_an_page_low); + + if (status != IXGBE_SUCCESS) { + hw_dbg(hw, "Auto-Negotiation did not complete\n"); + goto out; + } + + status = ixgbe_negotiate_fc(hw, an_cntl_1, lp_an_page_low, + IXGBE_KRM_AN_CNTL_1_SYM_PAUSE, + IXGBE_KRM_AN_CNTL_1_ASM_PAUSE, + IXGBE_KRM_LP_BASE_PAGE_HIGH_SYM_PAUSE, + IXGBE_KRM_LP_BASE_PAGE_HIGH_ASM_PAUSE); + +out: + if (status == IXGBE_SUCCESS) { + hw->fc.fc_was_autonegged = true; + } else { + hw->fc.fc_was_autonegged = false; + hw->fc.current_mode = hw->fc.requested_mode; + } +} + +/** + * ixgbe_fc_autoneg_fiber_x550em_a - passthrough FC settings + * @hw: pointer to hardware structure + * + **/ +void ixgbe_fc_autoneg_fiber_x550em_a(struct ixgbe_hw *hw) +{ + hw->fc.fc_was_autonegged = false; + hw->fc.current_mode = hw->fc.requested_mode; +} + +/** + * ixgbe_fc_autoneg_sgmii_x550em_a - Enable flow control IEEE clause 37 + * @hw: pointer to hardware structure + * + * Enable flow control according to IEEE clause 37. + **/ +void ixgbe_fc_autoneg_sgmii_x550em_a(struct ixgbe_hw *hw) +{ + s32 status = IXGBE_ERR_FC_NOT_NEGOTIATED; + u32 info[FW_PHY_ACT_DATA_COUNT] = { 0 }; + ixgbe_link_speed speed; + bool link_up; + + /* AN should have completed when the cable was plugged in. + * Look for reasons to bail out. Bail out if: + * - FC autoneg is disabled, or if + * - link is not up. + */ + if (hw->fc.disable_fc_autoneg) { + ERROR_REPORT1(IXGBE_ERROR_UNSUPPORTED, + "Flow control autoneg is disabled"); + goto out; + } + + hw->mac.ops.check_link(hw, &speed, &link_up, false); + if (!link_up) { + ERROR_REPORT1(IXGBE_ERROR_SOFTWARE, "The link is down"); + goto out; + } + + /* Check if auto-negotiation has completed */ + status = ixgbe_fw_phy_activity(hw, FW_PHY_ACT_GET_LINK_INFO, &info); + if (status != IXGBE_SUCCESS || + !(info[0] & FW_PHY_ACT_GET_LINK_INFO_AN_COMPLETE)) { + hw_dbg(hw, "Auto-Negotiation did not complete\n"); + status = IXGBE_ERR_FC_NOT_NEGOTIATED; + goto out; + } + + /* Negotiate the flow control */ + status = ixgbe_negotiate_fc(hw, info[0], info[0], + FW_PHY_ACT_GET_LINK_INFO_FC_RX, + FW_PHY_ACT_GET_LINK_INFO_FC_TX, + FW_PHY_ACT_GET_LINK_INFO_LP_FC_RX, + FW_PHY_ACT_GET_LINK_INFO_LP_FC_TX); + +out: + if (status == IXGBE_SUCCESS) { + hw->fc.fc_was_autonegged = true; + } else { + hw->fc.fc_was_autonegged = false; + hw->fc.current_mode = hw->fc.requested_mode; + } +} + +/** + * ixgbe_setup_fc_backplane_x550em_a - Set up flow control + * @hw: pointer to hardware structure + * + * Called at init time to set up flow control. + **/ +s32 ixgbe_setup_fc_backplane_x550em_a(struct ixgbe_hw *hw) +{ + s32 status = IXGBE_SUCCESS; + u32 an_cntl = 0; + + DEBUGFUNC("ixgbe_setup_fc_backplane_x550em_a"); + + /* Validate the requested mode */ + if (hw->fc.strict_ieee && hw->fc.requested_mode == ixgbe_fc_rx_pause) { + ERROR_REPORT1(IXGBE_ERROR_UNSUPPORTED, + "ixgbe_fc_rx_pause not valid in strict IEEE mode\n"); + return IXGBE_ERR_INVALID_LINK_SETTINGS; + } + + if (hw->fc.requested_mode == ixgbe_fc_default) + hw->fc.requested_mode = ixgbe_fc_full; + + /* Set up the 1G and 10G flow control advertisement registers so the + * HW will be able to do FC autoneg once the cable is plugged in. If + * we link at 10G, the 1G advertisement is harmless and vice versa. + */ + status = hw->mac.ops.read_iosf_sb_reg(hw, + IXGBE_KRM_AN_CNTL_1(hw->bus.lan_id), + IXGBE_SB_IOSF_TARGET_KR_PHY, &an_cntl); + + if (status != IXGBE_SUCCESS) { + hw_dbg(hw, "Auto-Negotiation did not complete\n"); + return status; + } + + /* The possible values of fc.requested_mode are: + * 0: Flow control is completely disabled + * 1: Rx flow control is enabled (we can receive pause frames, + * but not send pause frames). + * 2: Tx flow control is enabled (we can send pause frames but + * we do not support receiving pause frames). + * 3: Both Rx and Tx flow control (symmetric) are enabled. + * other: Invalid. + */ + switch (hw->fc.requested_mode) { + case ixgbe_fc_none: + /* Flow control completely disabled by software override. */ + an_cntl &= ~(IXGBE_KRM_AN_CNTL_1_SYM_PAUSE | + IXGBE_KRM_AN_CNTL_1_ASM_PAUSE); + break; + case ixgbe_fc_tx_pause: + /* Tx Flow control is enabled, and Rx Flow control is + * disabled by software override. + */ + an_cntl |= IXGBE_KRM_AN_CNTL_1_ASM_PAUSE; + an_cntl &= ~IXGBE_KRM_AN_CNTL_1_SYM_PAUSE; + break; + case ixgbe_fc_rx_pause: + /* Rx Flow control is enabled and Tx Flow control is + * disabled by software override. Since there really + * isn't a way to advertise that we are capable of RX + * Pause ONLY, we will advertise that we support both + * symmetric and asymmetric Rx PAUSE, as such we fall + * through to the fc_full statement. Later, we will + * disable the adapter's ability to send PAUSE frames. + */ + case ixgbe_fc_full: + /* Flow control (both Rx and Tx) is enabled by SW override. */ + an_cntl |= IXGBE_KRM_AN_CNTL_1_SYM_PAUSE | + IXGBE_KRM_AN_CNTL_1_ASM_PAUSE; + break; + default: + ERROR_REPORT1(IXGBE_ERROR_ARGUMENT, + "Flow control param set incorrectly\n"); + return IXGBE_ERR_CONFIG; + } + + status = hw->mac.ops.write_iosf_sb_reg(hw, + IXGBE_KRM_AN_CNTL_1(hw->bus.lan_id), + IXGBE_SB_IOSF_TARGET_KR_PHY, an_cntl); + + /* Restart auto-negotiation. */ + status = ixgbe_restart_an_internal_phy_x550em(hw); + + return status; +} + +/** + * ixgbe_set_mux - Set mux for port 1 access with CS4227 + * @hw: pointer to hardware structure + * @state: set mux if 1, clear if 0 + */ +STATIC void ixgbe_set_mux(struct ixgbe_hw *hw, u8 state) +{ + u32 esdp; + + if (!hw->bus.lan_id) + return; + esdp = IXGBE_READ_REG(hw, IXGBE_ESDP); + if (state) + esdp |= IXGBE_ESDP_SDP1; + else + esdp &= ~IXGBE_ESDP_SDP1; + IXGBE_WRITE_REG(hw, IXGBE_ESDP, esdp); + IXGBE_WRITE_FLUSH(hw); +} + +/** + * ixgbe_acquire_swfw_sync_X550em - Acquire SWFW semaphore + * @hw: pointer to hardware structure + * @mask: Mask to specify which semaphore to acquire + * + * Acquires the SWFW semaphore and sets the I2C MUX + **/ +s32 ixgbe_acquire_swfw_sync_X550em(struct ixgbe_hw *hw, u32 mask) +{ + s32 status; + + DEBUGFUNC("ixgbe_acquire_swfw_sync_X550em"); + + status = ixgbe_acquire_swfw_sync_X540(hw, mask); + if (status) + return status; + + if (mask & IXGBE_GSSR_I2C_MASK) + ixgbe_set_mux(hw, 1); + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_release_swfw_sync_X550em - Release SWFW semaphore + * @hw: pointer to hardware structure + * @mask: Mask to specify which semaphore to release + * + * Releases the SWFW semaphore and sets the I2C MUX + **/ +void ixgbe_release_swfw_sync_X550em(struct ixgbe_hw *hw, u32 mask) +{ + DEBUGFUNC("ixgbe_release_swfw_sync_X550em"); + + if (mask & IXGBE_GSSR_I2C_MASK) + ixgbe_set_mux(hw, 0); + + ixgbe_release_swfw_sync_X540(hw, mask); +} + +/** + * ixgbe_acquire_swfw_sync_X550a - Acquire SWFW semaphore + * @hw: pointer to hardware structure + * @mask: Mask to specify which semaphore to acquire + * + * Acquires the SWFW semaphore and get the shared phy token as needed + */ +STATIC s32 ixgbe_acquire_swfw_sync_X550a(struct ixgbe_hw *hw, u32 mask) +{ + u32 hmask = mask & ~IXGBE_GSSR_TOKEN_SM; + int retries = FW_PHY_TOKEN_RETRIES; + s32 status = IXGBE_SUCCESS; + + DEBUGFUNC("ixgbe_acquire_swfw_sync_X550a"); + + status = IXGBE_SUCCESS; + if (hmask) + status = ixgbe_acquire_swfw_sync_X540(hw, hmask); + + if (status) { + hw_dbg(hw, "Could not acquire SWFW semaphore, Status = %d\n", status); + return status; + } + + if (!(mask & IXGBE_GSSR_TOKEN_SM)) + return IXGBE_SUCCESS; + + while (--retries) { + status = ixgbe_get_phy_token(hw); + + if (status == IXGBE_SUCCESS) + return IXGBE_SUCCESS; + + if (status != IXGBE_ERR_TOKEN_RETRY) { + hw_dbg(hw, "Retry acquiring the PHY token failed, Status = %d\n", status); + if (hmask) + ixgbe_release_swfw_sync_X540(hw, hmask); + return status; + } + + if (status == IXGBE_ERR_TOKEN_RETRY) + hw_dbg(hw, "Could not acquire PHY token, Status = %d\n", + status); + } + + if (hmask) + ixgbe_release_swfw_sync_X540(hw, hmask); + + hw_dbg(hw, "Semaphore acquisition retries failed!: PHY ID = 0x%08X\n", + hw->phy.id); + return status; +} + +/** + * ixgbe_release_swfw_sync_X550a - Release SWFW semaphore + * @hw: pointer to hardware structure + * @mask: Mask to specify which semaphore to release + * + * Releases the SWFW semaphore and puts the shared phy token as needed + */ +STATIC void ixgbe_release_swfw_sync_X550a(struct ixgbe_hw *hw, u32 mask) +{ + u32 hmask = mask & ~IXGBE_GSSR_TOKEN_SM; + + DEBUGFUNC("ixgbe_release_swfw_sync_X550a"); + + if (mask & IXGBE_GSSR_TOKEN_SM) + ixgbe_put_phy_token(hw); + + if (hmask) + ixgbe_release_swfw_sync_X540(hw, hmask); +} + +/** + * ixgbe_read_phy_reg_x550a - Reads specified PHY register + * @hw: pointer to hardware structure + * @reg_addr: 32 bit address of PHY register to read + * @device_type: 5 bit device type + * @phy_data: Pointer to read data from PHY register + * + * Reads a value from a specified PHY register using the SWFW lock and PHY + * Token. The PHY Token is needed since the MDIO is shared between to MAC + * instances. + **/ +s32 ixgbe_read_phy_reg_x550a(struct ixgbe_hw *hw, u32 reg_addr, + u32 device_type, u16 *phy_data) +{ + s32 status; + u32 mask = hw->phy.phy_semaphore_mask | IXGBE_GSSR_TOKEN_SM; + + DEBUGFUNC("ixgbe_read_phy_reg_x550a"); + + if (hw->mac.ops.acquire_swfw_sync(hw, mask)) + return IXGBE_ERR_SWFW_SYNC; + + status = hw->phy.ops.read_reg_mdi(hw, reg_addr, device_type, phy_data); + + hw->mac.ops.release_swfw_sync(hw, mask); + + return status; +} + +/** + * ixgbe_write_phy_reg_x550a - Writes specified PHY register + * @hw: pointer to hardware structure + * @reg_addr: 32 bit PHY register to write + * @device_type: 5 bit device type + * @phy_data: Data to write to the PHY register + * + * Writes a value to specified PHY register using the SWFW lock and PHY Token. + * The PHY Token is needed since the MDIO is shared between to MAC instances. + **/ +s32 ixgbe_write_phy_reg_x550a(struct ixgbe_hw *hw, u32 reg_addr, + u32 device_type, u16 phy_data) +{ + s32 status; + u32 mask = hw->phy.phy_semaphore_mask | IXGBE_GSSR_TOKEN_SM; + + DEBUGFUNC("ixgbe_write_phy_reg_x550a"); + + if (hw->mac.ops.acquire_swfw_sync(hw, mask) == IXGBE_SUCCESS) { + status = hw->phy.ops.write_reg_mdi(hw, reg_addr, device_type, + phy_data); + hw->mac.ops.release_swfw_sync(hw, mask); + } else { + status = IXGBE_ERR_SWFW_SYNC; + } + + return status; +} + +/** + * ixgbe_handle_lasi_ext_t_x550em - Handle external Base T PHY interrupt + * @hw: pointer to hardware structure + * + * Handle external Base T PHY interrupt. If high temperature + * failure alarm then return error, else if link status change + * then setup internal/external PHY link + * + * Return IXGBE_ERR_OVERTEMP if interrupt is high temperature + * failure alarm, else return PHY access status. + */ +s32 ixgbe_handle_lasi_ext_t_x550em(struct ixgbe_hw *hw) +{ + bool lsc; + s32 status; + + status = ixgbe_get_lasi_ext_t_x550em(hw, &lsc); + + if (status != IXGBE_SUCCESS) + return status; + + if (lsc) + return ixgbe_setup_internal_phy(hw); + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_setup_mac_link_t_X550em - Sets the auto advertised link speed + * @hw: pointer to hardware structure + * @speed: new link speed + * @autoneg_wait_to_complete: true when waiting for completion is needed + * + * Setup internal/external PHY link speed based on link speed, then set + * external PHY auto advertised link speed. + * + * Returns error status for any failure + **/ +s32 ixgbe_setup_mac_link_t_X550em(struct ixgbe_hw *hw, + ixgbe_link_speed speed, + bool autoneg_wait_to_complete) +{ + s32 status; + ixgbe_link_speed force_speed; + + DEBUGFUNC("ixgbe_setup_mac_link_t_X550em"); + + /* Setup internal/external PHY link speed to iXFI (10G), unless + * only 1G is auto advertised then setup KX link. + */ + if (speed & IXGBE_LINK_SPEED_10GB_FULL) + force_speed = IXGBE_LINK_SPEED_10GB_FULL; + else + force_speed = IXGBE_LINK_SPEED_1GB_FULL; + + /* If X552 and internal link mode is XFI, then setup XFI internal link. + */ + if (hw->mac.type == ixgbe_mac_X550EM_x && + !(hw->phy.nw_mng_if_sel & IXGBE_NW_MNG_IF_SEL_INT_PHY_MODE)) { + status = ixgbe_setup_ixfi_x550em(hw, &force_speed); + + if (status != IXGBE_SUCCESS) + return status; + } + + return hw->phy.ops.setup_link_speed(hw, speed, autoneg_wait_to_complete); +} + +/** + * ixgbe_check_link_t_X550em - Determine link and speed status + * @hw: pointer to hardware structure + * @speed: pointer to link speed + * @link_up: true when link is up + * @link_up_wait_to_complete: bool used to wait for link up or not + * + * Check that both the MAC and X557 external PHY have link. + **/ +s32 ixgbe_check_link_t_X550em(struct ixgbe_hw *hw, ixgbe_link_speed *speed, + bool *link_up, bool link_up_wait_to_complete) +{ + s32 status; + u16 i, autoneg_status = 0; + + if (hw->mac.ops.get_media_type(hw) != ixgbe_media_type_copper) + return IXGBE_ERR_CONFIG; + + status = ixgbe_check_mac_link_generic(hw, speed, link_up, + link_up_wait_to_complete); + + /* If check link fails or MAC link is not up, then return */ + if (status != IXGBE_SUCCESS || !(*link_up)) + return status; + + /* MAC link is up, so check external PHY link. + * X557 PHY. Link status is latching low, and can only be used to detect + * link drop, and not the current status of the link without performing + * back-to-back reads. + */ + for (i = 0; i < 2; i++) { + status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_STATUS, + IXGBE_MDIO_AUTO_NEG_DEV_TYPE, + &autoneg_status); + + if (status != IXGBE_SUCCESS) + return status; + } + + /* If external PHY link is not up, then indicate link not up */ + if (!(autoneg_status & IXGBE_MDIO_AUTO_NEG_LINK_STATUS)) + *link_up = false; + + return IXGBE_SUCCESS; +} + +/** + * ixgbe_reset_phy_t_X550em - Performs X557 PHY reset and enables LASI + * @hw: pointer to hardware structure + **/ +s32 ixgbe_reset_phy_t_X550em(struct ixgbe_hw *hw) +{ + s32 status; + + status = ixgbe_reset_phy_generic(hw); + + if (status != IXGBE_SUCCESS) + return status; + + /* Configure Link Status Alarm and Temperature Threshold interrupts */ + return ixgbe_enable_lasi_ext_t_x550em(hw); +} + +/** + * ixgbe_led_on_t_X550em - Turns on the software controllable LEDs. + * @hw: pointer to hardware structure + * @led_idx: led number to turn on + **/ +s32 ixgbe_led_on_t_X550em(struct ixgbe_hw *hw, u32 led_idx) +{ + u16 phy_data; + + DEBUGFUNC("ixgbe_led_on_t_X550em"); + + if (led_idx >= IXGBE_X557_MAX_LED_INDEX) + return IXGBE_ERR_PARAM; + + /* To turn on the LED, set mode to ON. */ + ixgbe_read_phy_reg(hw, IXGBE_X557_LED_PROVISIONING + led_idx, + IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE, &phy_data); + phy_data |= IXGBE_X557_LED_MANUAL_SET_MASK; + ixgbe_write_phy_reg(hw, IXGBE_X557_LED_PROVISIONING + led_idx, + IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE, phy_data); + + /* Some designs have the LEDs wired to the MAC */ + return ixgbe_led_on_generic(hw, led_idx); +} + +/** + * ixgbe_led_off_t_X550em - Turns off the software controllable LEDs. + * @hw: pointer to hardware structure + * @led_idx: led number to turn off + **/ +s32 ixgbe_led_off_t_X550em(struct ixgbe_hw *hw, u32 led_idx) +{ + u16 phy_data; + + DEBUGFUNC("ixgbe_led_off_t_X550em"); + + if (led_idx >= IXGBE_X557_MAX_LED_INDEX) + return IXGBE_ERR_PARAM; + + /* To turn on the LED, set mode to ON. */ + ixgbe_read_phy_reg(hw, IXGBE_X557_LED_PROVISIONING + led_idx, + IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE, &phy_data); + phy_data &= ~IXGBE_X557_LED_MANUAL_SET_MASK; + ixgbe_write_phy_reg(hw, IXGBE_X557_LED_PROVISIONING + led_idx, + IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE, phy_data); + + /* Some designs have the LEDs wired to the MAC */ + return ixgbe_led_off_generic(hw, led_idx); +} + +/** + * ixgbe_set_fw_drv_ver_x550 - Sends driver version to firmware + * @hw: pointer to the HW structure + * @maj: driver version major number + * @min: driver version minor number + * @build: driver version build number + * @sub: driver version sub build number + * @len: length of driver_ver string + * @driver_ver: driver string + * + * Sends driver version number to firmware through the manageability + * block. On success return IXGBE_SUCCESS + * else returns IXGBE_ERR_SWFW_SYNC when encountering an error acquiring + * semaphore or IXGBE_ERR_HOST_INTERFACE_COMMAND when command fails. + **/ +s32 ixgbe_set_fw_drv_ver_x550(struct ixgbe_hw *hw, u8 maj, u8 min, + u8 build, u8 sub, u16 len, const char *driver_ver) +{ + struct ixgbe_hic_drv_info2 fw_cmd; + s32 ret_val = IXGBE_SUCCESS; + int i; + + DEBUGFUNC("ixgbe_set_fw_drv_ver_x550"); + + if ((len == 0) || (driver_ver == NULL) || + (len > sizeof(fw_cmd.driver_string))) + return IXGBE_ERR_INVALID_ARGUMENT; + + fw_cmd.hdr.cmd = FW_CEM_CMD_DRIVER_INFO; + fw_cmd.hdr.buf_len = FW_CEM_CMD_DRIVER_INFO_LEN + len; + fw_cmd.hdr.cmd_or_resp.cmd_resv = FW_CEM_CMD_RESERVED; + fw_cmd.port_num = (u8)hw->bus.func; + fw_cmd.ver_maj = maj; + fw_cmd.ver_min = min; + fw_cmd.ver_build = build; + fw_cmd.ver_sub = sub; + fw_cmd.hdr.checksum = 0; + memcpy(fw_cmd.driver_string, driver_ver, len); + fw_cmd.hdr.checksum = ixgbe_calculate_checksum((u8 *)&fw_cmd, + (FW_CEM_HDR_LEN + fw_cmd.hdr.buf_len)); + + for (i = 0; i <= FW_CEM_MAX_RETRIES; i++) { + ret_val = ixgbe_host_interface_command(hw, (u32 *)&fw_cmd, + sizeof(fw_cmd), + IXGBE_HI_COMMAND_TIMEOUT, + true); + if (ret_val != IXGBE_SUCCESS) + continue; + + if (fw_cmd.hdr.cmd_or_resp.ret_status == + FW_CEM_RESP_STATUS_SUCCESS) + ret_val = IXGBE_SUCCESS; + else + ret_val = IXGBE_ERR_HOST_INTERFACE_COMMAND; + + break; + } + + return ret_val; +} + +/** + * ixgbe_fw_recovery_mode_X550 - Check FW NVM recovery mode + * @hw: pointer t hardware structure + * + * Returns true if in FW NVM recovery mode. + **/ +bool ixgbe_fw_recovery_mode_X550(struct ixgbe_hw *hw) +{ + u32 fwsm; + + fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM_BY_MAC(hw)); + + return !!(fwsm & IXGBE_FWSM_FW_NVM_RECOVERY_MODE); +} diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_x550.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_x550.h new file mode 100644 index 00000000000..d1c7e15f510 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_x550.h @@ -0,0 +1,89 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 1999 - 2026 Intel Corporation */ + +#ifndef _IXGBE_X550_H_ +#define _IXGBE_X550_H_ + +#include "ixgbe_type.h" + +s32 ixgbe_dmac_config_X550(struct ixgbe_hw *hw); +s32 ixgbe_dmac_config_tcs_X550(struct ixgbe_hw *hw); +s32 ixgbe_dmac_update_tcs_X550(struct ixgbe_hw *hw); + +s32 ixgbe_get_bus_info_X550em(struct ixgbe_hw *hw); +s32 ixgbe_init_eeprom_params_X550(struct ixgbe_hw *hw); +s32 ixgbe_update_eeprom_checksum_X550(struct ixgbe_hw *hw); +s32 ixgbe_calc_eeprom_checksum_X550(struct ixgbe_hw *hw); +s32 ixgbe_calc_checksum_X550(struct ixgbe_hw *hw, u16 *buffer, u32 buffer_size); +s32 ixgbe_validate_eeprom_checksum_X550(struct ixgbe_hw *hw, u16 *checksum_val); +s32 ixgbe_update_flash_X550(struct ixgbe_hw *hw); +s32 ixgbe_write_ee_hostif_buffer_X550(struct ixgbe_hw *hw, + u16 offset, u16 words, u16 *data); +s32 ixgbe_write_ee_hostif_X550(struct ixgbe_hw *hw, u16 offset, + u16 data); +s32 ixgbe_read_ee_hostif_buffer_X550(struct ixgbe_hw *hw, + u16 offset, u16 words, u16 *data); +s32 ixgbe_read_ee_hostif_X550(struct ixgbe_hw *hw, u16 offset, +u16 *data); +s32 ixgbe_write_ee_hostif_data_X550(struct ixgbe_hw *hw, u16 offset, + u16 data); +void ixgbe_set_source_address_pruning_X550(struct ixgbe_hw *hw, bool enable, + unsigned int pool); +void ixgbe_set_ethertype_anti_spoofing_X550(struct ixgbe_hw *hw, + bool enable, int vf); +s32 ixgbe_write_iosf_sb_reg_x550(struct ixgbe_hw *hw, u32 reg_addr, + u32 device_type, u32 data); +s32 ixgbe_read_iosf_sb_reg_x550(struct ixgbe_hw *hw, u32 reg_addr, + u32 device_type, u32 *data); +s32 ixgbe_set_fw_drv_ver_x550(struct ixgbe_hw *hw, u8 maj, u8 min, + u8 build, u8 ver, u16 len, const char *str); +s32 ixgbe_get_phy_token(struct ixgbe_hw *); +s32 ixgbe_put_phy_token(struct ixgbe_hw *); +void ixgbe_disable_mdd_X550(struct ixgbe_hw *hw); +void ixgbe_enable_mdd_X550(struct ixgbe_hw *hw); +void ixgbe_mdd_event_X550(struct ixgbe_hw *hw, u32 *vf_bitmap); +void ixgbe_restore_mdd_vf_X550(struct ixgbe_hw *hw, u32 vf); +enum ixgbe_media_type ixgbe_get_media_type_X550em(struct ixgbe_hw *hw); +s32 ixgbe_setup_sfp_modules_X550em(struct ixgbe_hw *hw); +s32 ixgbe_get_link_capabilities_X550em(struct ixgbe_hw *hw, + ixgbe_link_speed *speed, bool *autoneg); +void ixgbe_init_mac_link_ops_X550em(struct ixgbe_hw *hw); +s32 ixgbe_reset_hw_X550em(struct ixgbe_hw *hw); +s32 ixgbe_init_phy_ops_X550em(struct ixgbe_hw *hw); +s32 ixgbe_setup_kr_x550em(struct ixgbe_hw *hw); +s32 ixgbe_init_ext_t_x550em(struct ixgbe_hw *hw); +s32 ixgbe_setup_internal_phy_t_x550em(struct ixgbe_hw *hw); +s32 ixgbe_setup_phy_loopback_x550em(struct ixgbe_hw *hw); +u64 ixgbe_get_supported_physical_layer_X550em(struct ixgbe_hw *hw); +void ixgbe_disable_rx_x550(struct ixgbe_hw *hw); +s32 ixgbe_get_lcd_t_x550em(struct ixgbe_hw *hw, ixgbe_link_speed *lcd_speed); +s32 ixgbe_enter_lplu_t_x550em(struct ixgbe_hw *hw); +s32 ixgbe_acquire_swfw_sync_X550em(struct ixgbe_hw *hw, u32 mask); +void ixgbe_release_swfw_sync_X550em(struct ixgbe_hw *hw, u32 mask); +s32 ixgbe_setup_fc_X550em(struct ixgbe_hw *hw); +s32 ixgbe_setup_mac_link_sfp_x550em(struct ixgbe_hw *hw, + ixgbe_link_speed speed, + bool autoneg_wait_to_complete); +s32 ixgbe_setup_mac_link_sfp_x550a(struct ixgbe_hw *hw, + ixgbe_link_speed speed, + bool autoneg_wait_to_complete); +s32 ixgbe_read_phy_reg_x550a(struct ixgbe_hw *hw, u32 reg_addr, + u32 device_type, u16 *phy_data); +s32 ixgbe_write_phy_reg_x550a(struct ixgbe_hw *hw, u32 reg_addr, + u32 device_type, u16 phy_data); +s32 ixgbe_setup_fc_backplane_x550em_a(struct ixgbe_hw *hw); +void ixgbe_fc_autoneg_fiber_x550em_a(struct ixgbe_hw *hw); +void ixgbe_fc_autoneg_backplane_x550em_a(struct ixgbe_hw *hw); +void ixgbe_fc_autoneg_sgmii_x550em_a(struct ixgbe_hw *hw); +s32 ixgbe_handle_lasi_ext_t_x550em(struct ixgbe_hw *hw); +s32 ixgbe_setup_mac_link_t_X550em(struct ixgbe_hw *hw, + ixgbe_link_speed speed, + bool autoneg_wait_to_complete); +s32 ixgbe_check_link_t_X550em(struct ixgbe_hw *hw, ixgbe_link_speed *speed, + bool *link_up, bool link_up_wait_to_complete); +s32 ixgbe_reset_phy_t_X550em(struct ixgbe_hw *hw); +s32 ixgbe_identify_sfp_module_X550em(struct ixgbe_hw *hw); +s32 ixgbe_led_on_t_X550em(struct ixgbe_hw *hw, u32 led_idx); +s32 ixgbe_led_off_t_X550em(struct ixgbe_hw *hw, u32 led_idx); +bool ixgbe_fw_recovery_mode_X550(struct ixgbe_hw *hw); +#endif /* _IXGBE_X550_H_ */ diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_xsk.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_xsk.c new file mode 100644 index 00000000000..ae6f85e8e01 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/ixgbe_xsk.c @@ -0,0 +1,1097 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 1999 - 2026 Intel Corporation */ + +#include "ixgbe.h" + +#ifdef HAVE_XDP_SUPPORT +#include +#endif +#ifdef HAVE_AF_XDP_ZC_SUPPORT +#ifndef HAVE_MEM_TYPE_XSK_BUFF_POOL +#include +#else +#include +#endif +#endif +#ifdef HAVE_XDP_BUFF_RXQ +#include +#endif + +#include "ixgbe_txrx_common.h" + +#ifdef HAVE_AF_XDP_ZC_SUPPORT +#ifndef HAVE_NETDEV_BPF_XSK_POOL +struct xdp_umem *ixgbe_xsk_umem(struct ixgbe_adapter *adapter, + struct ixgbe_ring *ring) +#else +struct xsk_buff_pool *ixgbe_xsk_umem(struct ixgbe_adapter *adapter, + struct ixgbe_ring *ring) +#endif /* HAVE_NETDEV_BPF_XSK_POOL */ +{ + bool xdp_on = READ_ONCE(adapter->xdp_prog); + int qid = ring->ring_idx; + +#ifndef HAVE_NETDEV_BPF_XSK_POOL + if (!adapter->xsk_pools || !adapter->xsk_pools[qid] || + qid >= adapter->num_xsk_pools || !xdp_on || + !test_bit(qid, adapter->af_xdp_zc_qps)) + return NULL; + + return adapter->xsk_pools[qid]; +#else + if (!xdp_on || !test_bit(qid, adapter->af_xdp_zc_qps)) + return NULL; + + return xsk_get_pool_from_qid(adapter->netdev, qid); +#endif /* HAVE_NETDEV_BPF_XSK_POOL */ +} + +#ifndef HAVE_NETDEV_BPF_XSK_POOL +static int ixgbe_alloc_xsk_umems(struct ixgbe_adapter *adapter) +{ + if (adapter->xsk_pools) + return 0; + + adapter->num_xsk_pools_used = 0; + adapter->num_xsk_pools = adapter->num_rx_queues; + adapter->xsk_pools = kcalloc(adapter->num_xsk_pools, + sizeof(*adapter->xsk_pools), + GFP_KERNEL); + if (!adapter->xsk_pools) { + adapter->num_xsk_pools = 0; + return -ENOMEM; + } + + return 0; +} +static int ixgbe_add_xsk_umem(struct ixgbe_adapter *adapter, + struct xdp_umem *pool, + u16 qid) +{ + int err; + + err = ixgbe_alloc_xsk_umems(adapter); + if (err) + return err; + + adapter->xsk_pools[qid] = pool; + adapter->num_xsk_pools_used++; + + return 0; +} + +static void ixgbe_remove_xsk_umem(struct ixgbe_adapter *adapter, u16 qid) +{ + adapter->xsk_pools[qid] = NULL; + adapter->num_xsk_pools_used--; + + if (adapter->num_xsk_pools == 0) { + kfree(adapter->xsk_pools); + adapter->xsk_pools = NULL; + adapter->num_xsk_pools = 0; + } +} +#endif /* HAVE_NETDEV_BPF_XSK_POOL */ + +/** + * ixgbe_xsk_any_rx_ring_enabled - Checks if Rx rings have AF_XDP UMEM attached + * @adapter: adapter + * + * Returns true if any of the Rx rings has an AF_XDP UMEM attached + */ +bool ixgbe_xsk_any_rx_ring_enabled(struct ixgbe_adapter *adapter) +{ + int i; + +#ifndef HAVE_NETDEV_BPF_XSK_POOL + if (!adapter->xsk_pools) + return false; + + for (i = 0; i < adapter->num_xsk_pools; i++) { + if (adapter->xsk_pools[i]) +#else + for (i = 0; i < adapter->num_rx_queues; i++) { + if (xsk_get_pool_from_qid(adapter->netdev, i)) +#endif /* HAVE_NETDEV_BPF_XSK_POOL */ + return true; + } + + return false; +} + +#ifndef HAVE_MEM_TYPE_XSK_BUFF_POOL +static int ixgbe_xsk_umem_dma_map(struct ixgbe_adapter *adapter, + struct xdp_umem *pool) +{ + struct device *dev = &adapter->pdev->dev; + unsigned int i, j; + dma_addr_t dma; + + for (i = 0; i < pool->npgs; i++) { + dma = dma_map_page_attrs(dev, pool->pgs[i], 0, PAGE_SIZE, + DMA_BIDIRECTIONAL, IXGBE_RX_DMA_ATTR); + if (dma_mapping_error(dev, dma)) + goto out_unmap; + + pool->pages[i].dma = dma; + } + + return 0; + +out_unmap: + for (j = 0; j < i; j++) { + dma_unmap_page_attrs(dev, pool->pages[i].dma, PAGE_SIZE, + DMA_BIDIRECTIONAL, IXGBE_RX_DMA_ATTR); + pool->pages[i].dma = 0; + } + + return -1; +} + +static void ixgbe_xsk_umem_dma_unmap(struct ixgbe_adapter *adapter, + struct xdp_umem *pool) +{ + struct device *dev = &adapter->pdev->dev; + unsigned int i; + + for (i = 0; i < pool->npgs; i++) { + dma_unmap_page_attrs(dev, pool->pages[i].dma, PAGE_SIZE, + DMA_BIDIRECTIONAL, IXGBE_RX_DMA_ATTR); + + pool->pages[i].dma = 0; + } +} +#endif /* HAVE_MEM_TYPE_XSK_BUFF_POOL */ + +#ifndef HAVE_NETDEV_BPF_XSK_POOL +static int ixgbe_xsk_umem_enable(struct ixgbe_adapter *adapter, + struct xdp_umem *pool, + u16 qid) +#else +static int ixgbe_xsk_umem_enable(struct ixgbe_adapter *adapter, + struct xsk_buff_pool *pool, + u16 qid) +#endif +{ +#ifndef HAVE_MEM_TYPE_XSK_BUFF_POOL + struct xdp_umem_fq_reuse *reuseq; +#endif + bool if_running; + int err; + + if (qid >= adapter->num_rx_queues) + return -EINVAL; + +#ifndef HAVE_NETDEV_BPF_XSK_POOL + if (adapter->xsk_pools) { + if (qid >= adapter->num_xsk_pools) + return -EINVAL; + if (adapter->xsk_pools[qid]) + return -EBUSY; + } +#else + if (qid >= adapter->netdev->real_num_rx_queues || + qid >= adapter->netdev->real_num_tx_queues) + return -EINVAL; +#endif /* HAVE_NETDEV_BPF_XSK_POOL */ + + +#ifndef HAVE_MEM_TYPE_XSK_BUFF_POOL + reuseq = xsk_reuseq_prepare(adapter->rx_ring[0]->count); + if (!reuseq) + return -ENOMEM; + + xsk_reuseq_free(xsk_reuseq_swap(pool, reuseq)); + + err = ixgbe_xsk_umem_dma_map(adapter, pool); +#else + err = xsk_pool_dma_map(pool, &adapter->pdev->dev, IXGBE_RX_DMA_ATTR); +#endif /* HAVE_MEM_TYPE_XSK_BUFF_POOL */ + if (err) + return err; + + if_running = netif_running(adapter->netdev) && + READ_ONCE(adapter->xdp_prog); + + if (if_running) + ixgbe_txrx_ring_disable(adapter, qid); + + set_bit(qid, adapter->af_xdp_zc_qps); +#ifndef HAVE_NETDEV_BPF_XSK_POOL + err = ixgbe_add_xsk_umem(adapter, pool, qid); + if (err) + return err; +#endif /* HAVE_NETDEV_BPF_XSK_POOL */ + + if (if_running) { + ixgbe_txrx_ring_enable(adapter, qid); + + /* Kick start the NAPI context so that receiving will start */ +#ifdef HAVE_NDO_XSK_WAKEUP + err = ixgbe_xsk_wakeup(adapter->netdev, qid, XDP_WAKEUP_RX); +#else + err = ixgbe_xsk_async_xmit(adapter->netdev, qid); +#endif + if (err) { + clear_bit(qid, adapter->af_xdp_zc_qps); +#ifndef HAVE_MEM_TYPE_XSK_BUFF_POOL + ixgbe_xsk_umem_dma_unmap(adapter, adapter->xsk_pools[qid]); +#else + xsk_pool_dma_unmap(pool, IXGBE_RX_DMA_ATTR); +#endif /* HAVE_MEM_TYPE_XSK_BUFF_POOL */ + return err; + } + } + + return 0; +} + +static int ixgbe_xsk_umem_disable(struct ixgbe_adapter *adapter, u16 qid) +{ + bool if_running; + +#ifndef HAVE_NETDEV_BPF_XSK_POOL + if (!adapter->xsk_pools || qid >= adapter->num_xsk_pools || + !adapter->xsk_pools[qid]) +#else + if (!xsk_get_pool_from_qid(adapter->netdev, qid)) + return -EINVAL; +#endif /* HAVE_NETDEV_BPF_XSK_POOL */ + + if_running = netif_running(adapter->netdev) && + READ_ONCE(adapter->xdp_prog); + + if (if_running) + ixgbe_txrx_ring_disable(adapter, qid); + + clear_bit(qid, adapter->af_xdp_zc_qps); + +#ifdef HAVE_NETDEV_BPF_XSK_POOL + xsk_pool_dma_unmap(xsk_get_pool_from_qid(adapter->netdev, qid), + IXGBE_RX_DMA_ATTR); +#else +#ifndef HAVE_MEM_TYPE_XSK_BUFF_POOL + ixgbe_xsk_umem_dma_unmap(adapter, adapter->xsk_pools[qid]); +#else + xsk_pool_dma_unmap(adapter->xsk_pools[qid], IXGBE_RX_DMA_ATTR); +#endif /* HAVE_MEM_TYPE_XSK_BUFF_POOL */ + ixgbe_remove_xsk_umem(adapter, qid); +#endif /* HAVE_NETDEV_BPF_XSK_POOL */ + + if (if_running) + ixgbe_txrx_ring_enable(adapter, qid); + + return 0; +} + +#ifndef HAVE_NETDEV_BPF_XSK_POOL +int ixgbe_xsk_umem_setup(struct ixgbe_adapter *adapter, struct xdp_umem *pool, + u16 qid) +#else +int ixgbe_xsk_umem_setup(struct ixgbe_adapter *adapter, struct xsk_buff_pool *pool, + u16 qid) +#endif +{ + return pool ? ixgbe_xsk_umem_enable(adapter, pool, qid) : + ixgbe_xsk_umem_disable(adapter, qid); +} + +static int ixgbe_run_xdp_zc(struct ixgbe_adapter *adapter, + struct ixgbe_ring *rx_ring, + struct xdp_buff *xdp) +{ + int err, result = IXGBE_XDP_PASS; + struct bpf_prog *xdp_prog; + struct ixgbe_ring *ring; + struct xdp_frame *xdpf; + u32 act; + + rcu_read_lock(); + xdp_prog = READ_ONCE(rx_ring->xdp_prog); + act = bpf_prog_run_xdp(xdp_prog, xdp); +#ifndef HAVE_MEM_TYPE_XSK_BUFF_POOL + xdp->handle += xdp->data - xdp->data_hard_start; +#endif + switch (act) { + case XDP_PASS: + break; + case XDP_TX: + xdpf = xdp_convert_buff_to_frame(xdp); + if (unlikely(!xdpf)) { + result = IXGBE_XDP_CONSUMED; + break; + } + ring = ixgbe_determine_xdp_ring(adapter); + if (static_branch_unlikely(&ixgbe_xdp_locking_key)) + spin_lock(&ring->tx_lock); +#ifdef HAVE_XDP_FRAME_STRUCT + result = ixgbe_xmit_xdp_ring(ring, xdpf); +#else + result = ixgbe_xmit_xdp_ring(ring, xdp); +#endif /* HAVE_XDP_FRAME_STRUCT */ + if (static_branch_unlikely(&ixgbe_xdp_locking_key)) + spin_unlock(&ring->tx_lock); + break; + case XDP_REDIRECT: + err = xdp_do_redirect(rx_ring->netdev, xdp, xdp_prog); + result = !err ? IXGBE_XDP_REDIR : IXGBE_XDP_CONSUMED; + break; + default: + bpf_warn_invalid_xdp_action(rx_ring->netdev, xdp_prog, act); + fallthrough; + case XDP_ABORTED: + trace_xdp_exception(rx_ring->netdev, xdp_prog, act); + /* fallthrough -- handle aborts by dropping packet */ + fallthrough; + case XDP_DROP: + result = IXGBE_XDP_CONSUMED; + break; + } + rcu_read_unlock(); + return result; +} + +#ifndef HAVE_MEM_TYPE_XSK_BUFF_POOL +static struct +ixgbe_rx_buffer *ixgbe_get_rx_buffer_zc(struct ixgbe_ring *rx_ring, + unsigned int size) +{ + struct ixgbe_rx_buffer *bi; + + bi = &rx_ring->rx_buffer_info[rx_ring->next_to_clean]; + + /* we are reusing so sync this buffer for CPU use */ + dma_sync_single_range_for_cpu(rx_ring->dev, + bi->dma, 0, + size, + DMA_BIDIRECTIONAL); + + return bi; +} + +static void ixgbe_reuse_rx_buffer_zc(struct ixgbe_ring *rx_ring, + struct ixgbe_rx_buffer *obi) +{ + unsigned long mask = (unsigned long)rx_ring->xsk_pool->chunk_mask; + u64 hr = rx_ring->xsk_pool->headroom + XDP_PACKET_HEADROOM; + u16 nta = rx_ring->next_to_alloc; + struct ixgbe_rx_buffer *nbi; + + nbi = &rx_ring->rx_buffer_info[rx_ring->next_to_alloc]; + /* update, and store next to alloc */ + nta++; + rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0; + + /* transfer page from old buffer to new buffer */ + nbi->dma = obi->dma & mask; + nbi->dma += hr; + + nbi->addr = (void *)((unsigned long)obi->addr & mask); + nbi->addr += hr; + + nbi->handle = obi->handle & mask; + nbi->handle += rx_ring->xsk_pool->headroom; + + obi->addr = NULL; + obi->skb = NULL; +} + +#ifndef HAVE_MEM_TYPE_XSK_BUFF_POOL +void ixgbe_zca_free(struct zero_copy_allocator *alloc, unsigned long handle) +{ + struct ixgbe_rx_buffer *bi; + struct ixgbe_ring *rx_ring; + u64 hr, mask; + u16 nta; + + rx_ring = container_of(alloc, struct ixgbe_ring, zca); + hr = rx_ring->xsk_pool->headroom + XDP_PACKET_HEADROOM; + mask = rx_ring->xsk_pool->chunk_mask; + + nta = rx_ring->next_to_alloc; + bi = rx_ring->rx_buffer_info; + + nta++; + rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0; + + handle &= mask; + + bi->dma = xdp_umem_get_dma(rx_ring->xsk_pool, handle); + bi->dma += hr; + + bi->addr = xdp_umem_get_data(rx_ring->xsk_pool, handle); + bi->addr += hr; + + bi->handle = (u64)handle + rx_ring->xsk_pool->headroom; +} +#endif + +static bool ixgbe_alloc_buffer_zc(struct ixgbe_ring *rx_ring, + struct ixgbe_rx_buffer *bi) +{ +#ifndef HAVE_NETDEV_BPF_XSK_POOL + struct xdp_umem *umem = rx_ring->xsk_pool; +#endif + void *addr = bi->addr; + u64 handle, hr; + + if (addr) + return true; + + if (!xsk_umem_peek_addr(umem, &handle)) { + rx_ring->rx_stats.alloc_rx_page_failed++; + return false; + } + + hr = umem->headroom + XDP_PACKET_HEADROOM; + + bi->dma = xdp_umem_get_dma(umem, handle); + bi->dma += hr; + + bi->addr = xdp_umem_get_data(umem, handle); + bi->addr += hr; + + bi->handle = handle + umem->headroom; + + xsk_umem_release_addr(umem); + return true; +} + +static bool ixgbe_alloc_buffer_slow_zc(struct ixgbe_ring *rx_ring, + struct ixgbe_rx_buffer *bi) +{ +#ifndef HAVE_NETDEV_BPF_XSK_POOL + struct xdp_umem *pool = rx_ring->xsk_pool; +#else + struct xsk_buff_pool *pool = rx_ring->xsk_pool; +#endif + u64 handle, hr; + + if (!xsk_umem_peek_addr_rq(pool, &handle)) { + rx_ring->rx_stats.alloc_rx_page_failed++; + return false; + } + + handle &= rx_ring->xsk_pool->chunk_mask; + + hr = pool->headroom + XDP_PACKET_HEADROOM; + + bi->dma = xdp_umem_get_dma(pool, handle); + bi->dma += hr; + + bi->addr = xdp_umem_get_data(pool, handle); + bi->addr += hr; + + bi->handle = handle + pool->headroom; + + xsk_umem_release_addr_rq(pool); + return true; +} + +static __always_inline bool +__ixgbe_alloc_rx_buffers_zc(struct ixgbe_ring *rx_ring, u16 count, + bool alloc(struct ixgbe_ring *rx_ring, + struct ixgbe_rx_buffer *bi)) +#else +bool ixgbe_alloc_rx_buffers_zc(struct ixgbe_ring *rx_ring, u16 count) +#endif /* HAVE_MEM_TYPE_XSK_BUFF_POOL */ +{ + union ixgbe_adv_rx_desc *rx_desc; + struct ixgbe_rx_buffer *bi; + u16 i = rx_ring->next_to_use; +#ifdef HAVE_MEM_TYPE_XSK_BUFF_POOL + dma_addr_t dma; +#endif + bool ok = true; + + /* nothing to do */ + if (!count) + return true; + + rx_desc = IXGBE_RX_DESC(rx_ring, i); + bi = &rx_ring->rx_buffer_info[i]; + i -= rx_ring->count; + + do { +#ifndef HAVE_MEM_TYPE_XSK_BUFF_POOL + if (!alloc(rx_ring, bi)) { +#else + bi->xdp = xsk_buff_alloc(rx_ring->xsk_pool); + if (!bi->xdp) { +#endif + ok = false; + break; + } + +#ifndef HAVE_MEM_TYPE_XSK_BUFF_POOL + /* sync the buffer for use by the device */ + dma_sync_single_range_for_device(rx_ring->dev, bi->dma, + bi->page_offset, + rx_ring->rx_buf_len, + DMA_BIDIRECTIONAL); +#else + dma = xsk_buff_xdp_get_dma(bi->xdp); +#endif + + /* Refresh the desc even if buffer_addrs didn't change + * because each write-back erases this info. + */ +#ifndef HAVE_MEM_TYPE_XSK_BUFF_POOL + rx_desc->read.pkt_addr = cpu_to_le64(bi->dma); +#else + rx_desc->read.pkt_addr = cpu_to_le64(dma); +#endif + + rx_desc++; + bi++; + i++; + if (unlikely(!i)) { + rx_desc = IXGBE_RX_DESC(rx_ring, 0); + bi = rx_ring->rx_buffer_info; + i -= rx_ring->count; + } + + /* clear the length for the next_to_use descriptor */ + rx_desc->wb.upper.length = 0; + + count--; + } while (count); + + i += rx_ring->count; + + if (rx_ring->next_to_use != i) { + rx_ring->next_to_use = i; + +#ifndef HAVE_MEM_TYPE_XSK_BUFF_POOL + /* update next to alloc since we have filled the ring */ + rx_ring->next_to_alloc = i; +#endif + + /* Force memory writes to complete before letting h/w + * know there are new descriptors to fetch. (Only + * applicable for weak-ordered memory model archs, + * such as IA-64). + */ + wmb(); + writel(i, rx_ring->tail); + } + + return ok; +} + +#ifndef HAVE_MEM_TYPE_XSK_BUFF_POOL +void ixgbe_alloc_rx_buffers_zc(struct ixgbe_ring *rx_ring, u16 count) +{ + __ixgbe_alloc_rx_buffers_zc(rx_ring, count, + ixgbe_alloc_buffer_slow_zc); +} + +static bool ixgbe_alloc_rx_buffers_fast_zc(struct ixgbe_ring *rx_ring, + u16 count) +{ + return __ixgbe_alloc_rx_buffers_zc(rx_ring, count, + ixgbe_alloc_buffer_zc); +} +#endif /* HAVE_MEM_TYPE_XSK_BUFF_POOL */ + +static struct sk_buff *ixgbe_construct_skb_zc(struct ixgbe_ring *rx_ring, +#ifndef HAVE_MEM_TYPE_XSK_BUFF_POOL + struct ixgbe_rx_buffer *bi, + struct xdp_buff *xdp) +#else + struct ixgbe_rx_buffer *bi) +#endif +{ +#ifndef HAVE_MEM_TYPE_XSK_BUFF_POOL + struct xdp_buff *xdp_buffer = xdp; +#else + struct xdp_buff *xdp_buffer = bi->xdp; +#endif + unsigned int metasize = xdp_buffer->data - xdp_buffer->data_meta; + unsigned int datasize = xdp_buffer->data_end - xdp_buffer->data; + struct sk_buff *skb; + + /* allocate a skb to store the frags */ + skb = napi_alloc_skb(&rx_ring->q_vector->napi, + xdp_buffer->data_end - xdp_buffer->data_hard_start); + if (unlikely(!skb)) + return NULL; + + skb_reserve(skb, xdp_buffer->data - xdp_buffer->data_hard_start); + memcpy(__skb_put(skb, datasize), xdp_buffer->data, datasize); + if (metasize) + skb_metadata_set(skb, metasize); +#ifndef HAVE_MEM_TYPE_XSK_BUFF_POOL + ixgbe_reuse_rx_buffer_zc(rx_ring, bi); +#else + xsk_buff_free(xdp_buffer); + bi->xdp = NULL; +#endif + return skb; +} + +static void ixgbe_inc_ntc(struct ixgbe_ring *rx_ring) +{ + u32 ntc = rx_ring->next_to_clean + 1; + + ntc = (ntc < rx_ring->count) ? ntc : 0; + rx_ring->next_to_clean = ntc; + prefetch(IXGBE_RX_DESC(rx_ring, ntc)); +} + +int ixgbe_clean_rx_irq_zc(struct ixgbe_q_vector *q_vector, + struct ixgbe_ring *rx_ring, + const int budget) +{ + unsigned int total_rx_bytes = 0, total_rx_packets = 0; + struct ixgbe_adapter *adapter = q_vector->adapter; + u16 cleaned_count = ixgbe_desc_unused(rx_ring); + unsigned int xdp_res, xdp_xmit = 0; + bool failure = false; + struct sk_buff *skb; +#ifndef HAVE_MEM_TYPE_XSK_BUFF_POOL + struct xdp_buff xdp; + + xdp.rxq = &rx_ring->xdp_rxq; +#endif + + while (likely(total_rx_packets < budget)) { + union ixgbe_adv_rx_desc *rx_desc; + struct ixgbe_rx_buffer *bi; + unsigned int size; + + /* return some buffers to hardware, one at a time is too slow */ + if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) { + failure = failure || +#ifndef HAVE_MEM_TYPE_XSK_BUFF_POOL + !ixgbe_alloc_rx_buffers_fast_zc(rx_ring, + cleaned_count); +#else + !ixgbe_alloc_rx_buffers_zc(rx_ring, + cleaned_count); +#endif + cleaned_count = 0; + } + + rx_desc = IXGBE_RX_DESC(rx_ring, rx_ring->next_to_clean); + size = le16_to_cpu(rx_desc->wb.upper.length); + if (!size) + break; + + /* This memory barrier is needed to keep us from reading + * any other fields out of the rx_desc until we know the + * descriptor has been written back + */ + dma_rmb(); + +#ifndef HAVE_MEM_TYPE_XSK_BUFF_POOL + bi = ixgbe_get_rx_buffer_zc(rx_ring, size); +#else + bi = &rx_ring->rx_buffer_info[rx_ring->next_to_clean]; +#endif + + if (unlikely(!ixgbe_test_staterr(rx_desc, + IXGBE_RXD_STAT_EOP))) { + struct ixgbe_rx_buffer *next_bi; + +#ifndef HAVE_MEM_TYPE_XSK_BUFF_POOL + ixgbe_reuse_rx_buffer_zc(rx_ring, bi); +#else + xsk_buff_free(bi->xdp); + bi->xdp = NULL; +#endif + ixgbe_inc_ntc(rx_ring); + next_bi = + &rx_ring->rx_buffer_info[rx_ring->next_to_clean]; +#ifndef HAVE_MEM_TYPE_XSK_BUFF_POOL + next_bi->skb = ERR_PTR(-EINVAL); +#else + next_bi->discard = true; +#endif + continue; + } + +#ifndef HAVE_MEM_TYPE_XSK_BUFF_POOL + if (unlikely(bi->skb)) { + ixgbe_reuse_rx_buffer_zc(rx_ring, bi); +#else + if (unlikely(bi->discard)) { + xsk_buff_free(bi->xdp); + bi->xdp = NULL; + bi->discard = false; +#endif + ixgbe_inc_ntc(rx_ring); + continue; + } + +#ifndef HAVE_MEM_TYPE_XSK_BUFF_POOL + xdp.data = bi->addr; + xdp.data_meta = xdp.data; + xdp.data_hard_start = xdp.data - XDP_PACKET_HEADROOM; + xdp.data_end = xdp.data + size; + xdp.handle = bi->handle; + + xdp_res = ixgbe_run_xdp_zc(adapter, rx_ring, &xdp); +#else + bi->xdp->data_end = bi->xdp->data + size; + xsk_buff_dma_sync_for_cpu(bi->xdp); + xdp_res = ixgbe_run_xdp_zc(adapter, rx_ring, bi->xdp); +#endif + + if (xdp_res) { + if (xdp_res & (IXGBE_XDP_TX | IXGBE_XDP_REDIR)) { + xdp_xmit |= xdp_res; +#ifndef HAVE_MEM_TYPE_XSK_BUFF_POOL + bi->addr = NULL; + bi->skb = NULL; +#endif + } else { +#ifndef HAVE_MEM_TYPE_XSK_BUFF_POOL + ixgbe_reuse_rx_buffer_zc(rx_ring, bi); +#else + xsk_buff_free(bi->xdp); +#endif + } +#ifdef HAVE_MEM_TYPE_XSK_BUFF_POOL + bi->xdp = NULL; +#endif + total_rx_packets++; + total_rx_bytes += size; + + cleaned_count++; + ixgbe_inc_ntc(rx_ring); + continue; + } + + /* XDP_PASS path */ +#ifndef HAVE_MEM_TYPE_XSK_BUFF_POOL + skb = ixgbe_construct_skb_zc(rx_ring, bi, &xdp); +#else + skb = ixgbe_construct_skb_zc(rx_ring, bi); +#endif + if (!skb) { + rx_ring->rx_stats.alloc_rx_buff_failed++; + break; + } + + cleaned_count++; + ixgbe_inc_ntc(rx_ring); + + if (eth_skb_pad(skb)) + continue; + + total_rx_bytes += skb->len; + total_rx_packets++; + + ixgbe_process_skb_fields(rx_ring, rx_desc, skb); + ixgbe_rx_skb(q_vector, rx_ring, rx_desc, skb); + } + + if (xdp_xmit & IXGBE_XDP_REDIR) + xdp_do_flush(); + + if (xdp_xmit & IXGBE_XDP_TX) { + struct ixgbe_ring *ring = ixgbe_determine_xdp_ring(adapter); + + ixgbe_xdp_ring_update_tail_locked(ring); + } + + u64_stats_update_begin(&rx_ring->syncp); + rx_ring->stats.packets += total_rx_packets; + rx_ring->stats.bytes += total_rx_bytes; + u64_stats_update_end(&rx_ring->syncp); + q_vector->rx.total_packets += total_rx_packets; + q_vector->rx.total_bytes += total_rx_bytes; + + return failure ? budget : (int)total_rx_packets; +} + +#ifndef HAVE_MEM_TYPE_XSK_BUFF_POOL +void ixgbe_xsk_clean_rx_ring(struct ixgbe_ring *rx_ring) +{ + u16 i = rx_ring->next_to_clean; + struct ixgbe_rx_buffer *bi = &rx_ring->rx_buffer_info[i]; + + while (i != rx_ring->next_to_alloc) { + xsk_umem_fq_reuse(rx_ring->xsk_pool, bi->handle); + i++; + bi++; + if (i == rx_ring->count) { + i = 0; + bi = rx_ring->rx_buffer_info; + } + } +} +#else +void ixgbe_xsk_clean_rx_ring(struct ixgbe_ring *rx_ring) +{ + struct ixgbe_rx_buffer *bi; + u16 i; + + for (i = 0; i < rx_ring->count; i++) { + bi = &rx_ring->rx_buffer_info[i]; + + if (!bi->xdp) + continue; + + xsk_buff_free(bi->xdp); + bi->xdp = NULL; + } +} +#endif + +static bool ixgbe_xmit_zc(struct ixgbe_ring *xdp_ring, unsigned int budget) +{ + unsigned int sent_frames = 0, total_bytes = 0; + union ixgbe_adv_tx_desc *tx_desc = NULL; + u16 ntu = xdp_ring->next_to_use; + struct ixgbe_tx_buffer *tx_bi; + bool work_done = true; +#ifdef XSK_UMEM_RETURNS_XDP_DESC + struct xdp_desc desc; +#endif + dma_addr_t dma; + u32 cmd_type; +#ifndef XSK_UMEM_RETURNS_XDP_DESC + u32 len; +#endif + + while (budget-- > 0) { + if (unlikely(!ixgbe_desc_unused(xdp_ring) || + !netif_carrier_ok(xdp_ring->netdev))) { + work_done = false; + break; + } + +#ifdef XSK_UMEM_RETURNS_XDP_DESC + if (!xsk_tx_peek_desc(xdp_ring->xsk_pool, &desc)) + break; + +#ifndef HAVE_MEM_TYPE_XSK_BUFF_POOL + dma = xdp_umem_get_dma(xdp_ring->xsk_pool, desc.addr); + + dma_sync_single_for_device(xdp_ring->dev, dma, desc.len, + DMA_BIDIRECTIONAL); +#else + dma = xsk_buff_raw_get_dma(xdp_ring->xsk_pool, desc.addr); + xsk_buff_raw_dma_sync_for_device(xdp_ring->xsk_pool, dma, + desc.len); +#endif + + tx_bi = &xdp_ring->tx_buffer_info[ntu]; + tx_bi->bytecount = desc.len; + tx_bi->xdpf = NULL; +#else + if (!xsk_umem_consume_tx(xdp_ring->xsk_pool, &dma, &len)) + break; + + dma_sync_single_for_device(xdp_ring->dev, dma, len, + DMA_BIDIRECTIONAL); + + tx_bi = &xdp_ring->tx_buffer_info[ntu]; + tx_bi->bytecount = len; + tx_bi->xdpf = NULL; +#endif + + tx_desc = IXGBE_TX_DESC(xdp_ring, ntu); + tx_desc->read.buffer_addr = cpu_to_le64(dma); + + /* put descriptor type bits */ + cmd_type = IXGBE_ADVTXD_DTYP_DATA | + IXGBE_ADVTXD_DCMD_DEXT | + IXGBE_ADVTXD_DCMD_IFCS; +#ifdef XSK_UMEM_RETURNS_XDP_DESC + cmd_type |= desc.len | IXGBE_TXD_CMD_EOP; + tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type); + tx_desc->read.olinfo_status = + cpu_to_le32(desc.len << IXGBE_ADVTXD_PAYLEN_SHIFT); +#else + cmd_type |= len | IXGBE_TXD_CMD_EOP; + tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type); + tx_desc->read.olinfo_status = + cpu_to_le32(len << IXGBE_ADVTXD_PAYLEN_SHIFT); +#endif + + xdp_ring->next_rs_idx = ntu; + ntu++; + if (ntu == xdp_ring->count) + ntu = 0; + xdp_ring->next_to_use = ntu; + + sent_frames++; + total_bytes += tx_bi->bytecount; + } + + if (tx_desc) { + /* set RS bit for the last frame and bump tail ptr */ + cmd_type |= IXGBE_TXD_CMD_RS; + tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type); + + ixgbe_xdp_ring_update_tail(xdp_ring); + xsk_tx_release(xdp_ring->xsk_pool); + + u64_stats_update_begin(&xdp_ring->syncp); + xdp_ring->stats.bytes += total_bytes; + xdp_ring->stats.packets += sent_frames; + u64_stats_update_end(&xdp_ring->syncp); + xdp_ring->q_vector->tx.total_bytes += total_bytes; + xdp_ring->q_vector->tx.total_packets += sent_frames; + + } + + return (budget > 0) && work_done; +} + +static void ixgbe_clean_xdp_tx_buffer(struct ixgbe_ring *tx_ring, + struct ixgbe_tx_buffer *tx_bi) +{ + xdp_return_frame(tx_bi->xdpf); + tx_ring->xdp_tx_active--; + dma_unmap_single(tx_ring->dev, + dma_unmap_addr(tx_bi, dma), + dma_unmap_len(tx_bi, len), DMA_TO_DEVICE); + dma_unmap_len_set(tx_bi, len, 0); +} + +bool ixgbe_clean_xdp_tx_irq(struct ixgbe_q_vector *q_vector, + struct ixgbe_ring *tx_ring) +{ + u32 next_rs_idx = tx_ring->next_rs_idx; + union ixgbe_adv_tx_desc *next_rs_desc; + u32 ntc = tx_ring->next_to_clean; + struct ixgbe_tx_buffer *tx_bi; + u16 frames_ready = 0; + u32 xsk_frames = 0; + u16 i; + + next_rs_desc = IXGBE_TX_DESC(tx_ring, next_rs_idx); + if (next_rs_desc->wb.status & + cpu_to_le32(IXGBE_TXD_STAT_DD)) { + if (next_rs_idx >= ntc) + frames_ready = next_rs_idx - ntc; + else + frames_ready = next_rs_idx + tx_ring->count - ntc; + } + + if (!frames_ready) + goto out_xmit; + + if (likely(!tx_ring->xdp_tx_active)) { + xsk_frames = frames_ready; + } else { + for (i = 0; i < frames_ready; i++) { + tx_bi = &tx_ring->tx_buffer_info[ntc]; + + if (tx_bi->xdpf) + ixgbe_clean_xdp_tx_buffer(tx_ring, tx_bi); + else + xsk_frames++; + + tx_bi->xdpf = NULL; + + ++ntc; + if (ntc >= tx_ring->count) + ntc = 0; + } + } + + tx_ring->next_to_clean += frames_ready; + if (unlikely(tx_ring->next_to_clean >= tx_ring->count)) + tx_ring->next_to_clean -= tx_ring->count; + + if (xsk_frames) + xsk_tx_completed(tx_ring->xsk_pool, xsk_frames); + +out_xmit: + return ixgbe_xmit_zc(tx_ring, q_vector->tx.work_limit); +} + +#ifdef HAVE_NDO_XSK_WAKEUP +/** + * ixgbe_xsk_wakeup - Wake up an XDP socket queue for transmission + * @dev: Network device structure pointer + * @qid: Queue ID for the XDP socket + * @flags: Flags for the wakeup operation (unused) + * + * This function wakes up a specified XDP (eXpress Data Path) socket queue + * on the ixgbe network adapter to enable transmission. It checks the device + * state, the presence of an XDP program, and the validity of the queue ID. + * If the queue is valid and not scheduled, it rearms the interrupt for the + * queue to ensure it is ready for transmission. + * + * Return: 0 on success, or a negative error code on failure, such as + * -ENETDOWN if the device is down or -ENXIO if the queue is invalid. + */ +int ixgbe_xsk_wakeup(struct net_device *dev, u32 qid, u32 __maybe_unused flags) +#else +/** + * ixgbe_xsk_async_xmit - Transmit XDP frames asynchronously on a queue + * @dev: Network device structure pointer + * @qid: Queue ID for the XDP transmission + * + * This function handles the asynchronous transmission of XDP (eXpress Data + * Path) frames on a specified queue of the ixgbe network adapter. It checks + * the device state, the presence of an XDP program, and the validity of the + * queue ID. If the queue is valid and not scheduled, it rearms the interrupt + * for the queue to ensure transmission. + * + * Return: 0 on success, or a negative error code on failure, such as + * -ENETDOWN if the device is down or -ENXIO if the queue is invalid. + */ +int ixgbe_xsk_async_xmit(struct net_device *dev, u32 qid) +#endif +{ + struct ixgbe_adapter *adapter = netdev_priv(dev); + struct ixgbe_ring *ring; + + if (test_bit(__IXGBE_DOWN, adapter->state)) + return -ENETDOWN; + + if (!READ_ONCE(adapter->xdp_prog)) + return -ENXIO; + + if (qid >= adapter->num_xdp_queues) + return -ENXIO; + +#ifndef HAVE_NETDEV_BPF_XSK_POOL + if (!adapter->xsk_pools || !adapter->xsk_pools[qid]) +#else + if (!xsk_get_pool_from_qid(adapter->netdev, qid)) +#endif /* HAVE_NETDEV_BPF_XSK_POOL */ + return -ENXIO; + + ring = adapter->xdp_ring[qid]; + if (!napi_if_scheduled_mark_missed(&ring->q_vector->napi)) { + u64 eics = BIT_ULL(ring->q_vector->v_idx); + + ixgbe_irq_rearm_queues(adapter, eics); + } + + return 0; +} + +void ixgbe_xsk_clean_tx_ring(struct ixgbe_ring *tx_ring) +{ + u16 ntc = tx_ring->next_to_clean, ntu = tx_ring->next_to_use; + struct ixgbe_tx_buffer *tx_bi; + u32 xsk_frames = 0; + + while (ntc != ntu) { + tx_bi = &tx_ring->tx_buffer_info[ntc]; + + if (tx_bi->xdpf) + ixgbe_clean_xdp_tx_buffer(tx_ring, tx_bi); + else + xsk_frames++; + + tx_bi->xdpf = NULL; + + ntc++; + if (ntc == tx_ring->count) + ntc = 0; + } + + if (xsk_frames) + xsk_tx_completed(tx_ring->xsk_pool, xsk_frames); +} +#endif /* HAVE_AF_XDP_ZC_SUPPORT */ diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/kcompat-generator.sh b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/kcompat-generator.sh new file mode 100644 index 00000000000..cb53529b873 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/kcompat-generator.sh @@ -0,0 +1,715 @@ +#!/bin/bash +# SPDX-License-Identifier: GPL-2.0-only +# Copyright (C) 1999 - 2026 Intel Corporation + +set -Eeuo pipefail + +# This file generates HAVE_ and NEED_ defines for current kernel +# (or KSRC if provided). +# +# It does so by 'gen' function calls (see body of 'gen-devlink' for examples). +# 'gen' could look for various kinds of declarations in provided kernel headers, +# eg look for an enum in one of files specified and check if given enumeration +# (single value) is present. See 'Documentation' or comment above the 'gen' fun +# in the kcompat-lib.sh. + +# Why using bash/awk instead of an old/legacy approach? +# +# The aim is to replicate all the defines provided by human developers +# in the past. Additional bonus is the fact, that we no longer need to care +# about backports done by OS vendors (RHEL, SLES, ORACLE, UBUNTU, more to come). +# We will even work (compile) with only part of backports provided. +# +# To enable smooth transition, especially in time of late fixes, "old" method +# of providing flags should still work as usual. + +# End of intro. +# Find info about coding style/rules at the end of file. +# Most of the implementation is in kcompat-lib.sh, here are actual 'gen' calls. + +export LC_ALL=C +SCRIPT_DIR="$(dirname "${BASH_SOURCE[0]}")" +ORIG_CWD="$(pwd)" +trap 'rc=$?; echo >&2 "$(realpath "$ORIG_CWD/${BASH_SOURCE[0]}"):$LINENO: failed with rc: $rc"' ERR + +# shellcheck source=kcompat-lib.sh +source "$SCRIPT_DIR"/kcompat-lib.sh + +ARCH=$(uname -m) +IS_ARM= +if [ "$ARCH" == aarch64 ]; then + IS_ARM=1 +fi + +# DO NOT break gen calls below (via \), to make our compat code more grep-able, +# keep them also grouped, first by feature (like DEVLINK), then by .h filename +# finally, keep them sorted within a group (sort by flag name) + +# handy line of DOC copy-pasted form kcompat-lib.sh: +# gen DEFINE if (KIND [METHOD of]) NAME [(matches|lacks) PATTERN|absent] in + +function gen-aux() { + ah='include/linux/auxiliary_bus.h' + mh='include/linux/mod_devicetable.h' + HAVE_AUX_INT_REMOVE=0 + if config_has CONFIG_AUXILIARY_BUS && + check method remove of auxiliary_driver matches 'int' in "$ah" ; then + HAVE_AUX_INT_REMOVE=1 + fi + gen HAVE_AUXILIARY_DRIVER_INT_REMOVE if string "$HAVE_AUX_INT_REMOVE" equals 1 + + # generate HAVE_AUXILIARY_DEVICE_ID only for cases when it's disabled in .config + HAVE_AUX_DEV_ID=0 + if ! config_has CONFIG_AUXILIARY_BUS && check struct auxiliary_device_id in "$mh" ; then + HAVE_AUX_DEV_ID=1 + fi + gen HAVE_AUXILIARY_DEVICE_ID if string "$HAVE_AUX_DEV_ID" equals 1 +} + +function gen-bitfield() { + bf='include/linux/bitfield.h' + gen HAVE_INCLUDE_BITFIELD if macro FIELD_PREP in "$bf" + gen NEED_BITFIELD_FIELD_FIT if macro FIELD_FIT absent in "$bf" + gen NEED_BITFIELD_FIELD_MASK if fun field_mask absent in "$bf" + gen NEED_BITFIELD_FIELD_MAX if macro FIELD_MAX absent in "$bf" +} + +function gen-cleanup() { + ch='include/linux/cleanup.h' + dh='include/net/devlink.h' + mh='include/linux/mutex.h' + sh='include/linux/spinlock.h' + slabh='include/linux/slab.h' + rcuh='include/linux/rcupdate.h' + gen NEED_DEFINE_FREE if macro DEFINE_FREE absent in "$ch" + gen NEED___DEFINE_CLASS_IS_CONDITIONAL if macro __DEFINE_CLASS_IS_CONDITIONAL absent in "$ch" + gen NEED_DEFINE_GUARD_MUTEX if invocation of macro DEFINE_GUARD absent or lacks mutex_lock in "$mh" + gen NEED_LOCK_GUARD_FOR_RCU if invocation of macro DEFINE_LOCK_GUARD_0 absent or lacks rcu in "$rcuh" + gen NEED_DEFINE_FREE_KFREE if invocation of macro DEFINE_FREE absent or lacks kfree in "$slabh" + gen NEED_DEFINE_FREE_KVFREE if invocation of macro DEFINE_FREE absent or lacks kvfree in "$slabh" + gen NEED_LOCK_GUARD_FOR_SPINLOCK if invocation of macro DEFINE_LOCK_GUARD_1 absent or lacks spinlock in "$sh" + gen NEED_LOCK_GUARD_FOR_SPINLOCK_BH if invocation of macro DEFINE_LOCK_GUARD_1 absent or lacks spinlock_bh in "$sh" + gen NEED_DEFINE_GUARD_DEVLINK if invocation of macro DEFINE_GUARD absent or lacks devl_lock in "$dh" +} + +function gen-device() { + dh='include/linux/device.h' + dph='include/linux/dev_printk.h' + gen NEED_BUS_FIND_DEVICE_CONST_DATA if fun bus_find_device lacks 'const void \\*data' in "$dh" + gen NEED_DEV_LEVEL_ONCE if macro dev_level_once absent in "$dh" "$dph" +} + +function gen-devlink() { + dh='include/net/devlink.h' + gen HAVE_DEVLINK_ESWITCH_OPS_EXTACK if fun eswitch_mode_set matches extack in "$dh" + gen HAVE_DEVLINK_FLASH_UPDATE_BEGIN_END_NOTIFY if fun devlink_flash_update_begin_notify in "$dh" + gen HAVE_DEVLINK_FLASH_UPDATE_PARAMS if struct devlink_flash_update_params in "$dh" + gen HAVE_DEVLINK_FLASH_UPDATE_PARAMS_FW if struct devlink_flash_update_params matches 'struct firmware \\*fw' in "$dh" + gen HAVE_DEVLINK_FLASH_UPDATE_PARAMS_OVERWRITE_MASK if struct devlink_flash_update_params matches 'overwrite_mask' in "$dh" + gen HAVE_DEVLINK_HEALTH if enum devlink_health_reporter_state in "$dh" + gen HAVE_DEVLINK_HEALTH_OPS_EXTACK if method dump of devlink_health_reporter_ops matches extack in "$dh" + gen HAVE_DEVLINK_INFO_DRIVER_NAME_PUT if fun devlink_info_driver_name_put in "$dh" + gen HAVE_DEVLINK_PARAMS if method validate of devlink_param matches extack in "$dh" + gen HAVE_DEVLINK_PARAMS_PUBLISH if fun devlink_params_publish in "$dh" + gen HAVE_DEVLINK_PARAMS_SET_EXTACK if method set of devlink_param matches extack in "$dh" + gen HAVE_DEVLINK_PORT_NEW if method port_new of devlink_ops in "$dh" + gen HAVE_DEVLINK_PORT_OPS if struct devlink_port_ops in "$dh" + gen HAVE_DEVLINK_PORT_REGISTERED if struct devlink_port matches 'registered' in "$dh" + gen HAVE_DEVLINK_PORT_SPLIT if method port_split of '(devlink_ops|devlink_port_ops)' in "$dh" + gen HAVE_DEVLINK_PORT_SPLIT_EXTACK if method port_split of '(devlink_ops|devlink_port_ops)' matches extack in "$dh" + gen HAVE_DEVLINK_PORT_SPLIT_IN_OPS if method port_split of devlink_ops in "$dh" + gen HAVE_DEVLINK_PORT_SPLIT_IN_PORT_OPS if method port_split of devlink_port_ops in "$dh" + gen HAVE_DEVLINK_PORT_SPLIT_PORT_STRUCT if method port_split of '(devlink_ops|devlink_port_ops)' matches devlink_port in "$dh" + gen HAVE_DEVLINK_PORT_TYPE_ETH_HAS_NETDEV if fun devlink_port_type_eth_set matches 'struct net_device' in "$dh" + gen HAVE_DEVLINK_RATE_NODE_CREATE if fun devl_rate_node_create in "$dh" + # keep devlink_region_ops body in variable, to not look 4 times for + # exactly the same thing in big file + # please consider it as an example of "how to speed up if needed" + REGION_OPS="$(find-struct-decl devlink_region_ops "$dh")" + gen HAVE_DEVLINK_REGIONS if struct devlink_region_ops in - <<< "$REGION_OPS" + gen HAVE_DEVLINK_REGION_OPS_SNAPSHOT if fun snapshot in - <<< "$REGION_OPS" + gen HAVE_DEVLINK_REGION_OPS_SNAPSHOT_OPS if fun snapshot matches devlink_region_ops in - <<< "$REGION_OPS" + gen HAVE_DEVLINK_REGISTER_SETS_DEV if fun devlink_register matches 'struct device' in "$dh" + gen HAVE_DEVLINK_RELOAD_ENABLE_DISABLE if fun devlink_reload_enable in "$dh" + gen HAVE_DEVLINK_SET_FEATURES if fun devlink_set_features in "$dh" + gen HAVE_DEVL_HEALTH_REPORTER_DESTROY if fun devl_health_reporter_destroy in "$dh" + gen HAVE_DEVL_PORT_REGISTER if fun devl_port_register in "$dh" + gen HAVE_DEVL_PORT_REG_WITH_OPS_AND_UNREG if fun devl_port_register_with_ops in "$dh" + gen NEED_DEVLINK_FLASH_UPDATE_STATUS_NOTIFY if fun devlink_flash_update_status_notify absent in "$dh" + gen NEED_DEVLINK_FLASH_UPDATE_TIMEOUT_NOTIFY if fun devlink_flash_update_timeout_notify absent in "$dh" + gen NEED_DEVLINK_FMSG_DUMP_SKB if fun devlink_fmsg_dump_skb absent in "$dh" + gen NEED_DEVLINK_FMSG_PUT if macro devlink_fmsg_put absent in "$dh" + gen NEED_DEVLINK_HEALTH_DEFAULT_AUTO_RECOVER if fun devlink_health_reporter_create matches auto_recover in "$dh" + gen NEED_DEVLINK_REGION_CREATE_OPS if fun devlink_region_create lacks 'struct devlink_region_ops \\*ops' in "$dh" + gen NEED_DEVLINK_RESOURCES_UNREGISTER_NO_RESOURCE if fun devlink_resources_unregister matches 'struct devlink_resource \\*' in "$dh" + gen NEED_DEVLINK_TO_DEV if fun devlink_to_dev absent in "$dh" + gen NEED_DEVLINK_UNLOCKED_RESOURCE if fun devl_resource_size_get absent in "$dh" + gen NEED_DEVL_HEALTH_REPORTER_CREATE if fun devl_health_reporter_create absent in "$dh" + gen NEED_DEVL_HEALTH_REPORTER_CREATE_REMOVE_GRACEFUL_PERIOD if fun devl_health_reporter_create matches graceful_period in "$dh" + gen NEED_DEVL_LOCK if fun devl_lock absent in "$dh" + gen NEED_DEVL_PARAMS_REGISTER if fun devl_params_register absent in "$dh" + gen NEED_DEVL_PORT_REGISTER if fun devl_port_register absent in "$dh" + gen NEED_DEVL_REGION_CREATE if fun devl_region_create absent in "$dh" + gen NEED_DEVL_REGISTER if fun devl_register absent in "$dh" + gen NEED_DEVL_RESOURCE_REGISTER if fun devl_resource_register absent in "$dh" + + gen HAVE_DEVLINK_PORT_FLAVOUR_PCI_SF if enum devlink_port_flavour matches DEVLINK_PORT_FLAVOUR_PCI_SF in include/uapi/linux/devlink.h + gen HAVE_DEVLINK_RELOAD_ACTION_AND_LIMIT if enum devlink_reload_action matches DEVLINK_RELOAD_ACTION_FW_ACTIVATE in include/uapi/linux/devlink.h +} + +function gen-devres() { + dh='include/linux/device.h' + ddrh='include/linux/device/devres.h' + gen NEED_DEVM_KASPRINTF if fun devm_kasprintf absent in "$dh" "$ddrh" + gen NEED_DEVM_KCALLOC if fun devm_kcalloc absent in "$dh" "$ddrh" + gen NEED_DEVM_KFREE if fun devm_kfree absent in "$dh" "$ddrh" + gen NEED_DEVM_KMEMDUP if fun devm_kmemdup absent in "$dh" "$ddrh" + gen NEED_DEVM_KSTRDUP if fun devm_kstrdup absent in "$dh" "$ddrh" + gen NEED_DEVM_KVASPRINTF if fun devm_kvasprintf absent in "$dh" "$ddrh" + gen NEED_DEVM_KZALLOC if fun devm_kzalloc absent in "$dh" "$ddrh" +} + +function gen-dma() { + dma='include/linux/dma-mapping.h' + gen NEED_DMA_ATTRS_PTR if struct dma_attrs in include/linux/dma-attrs.h + gen NEED_DMA_ATTRS if fun dma_map_page_attrs absent in "$dma" +} + +function gen-dpll() { + dh='include/linux/dpll.h' + gen HAVE_DPLL_ESYNC if method esync_get of dpll_pin_ops in "$dh" + gen HAVE_DPLL_LOCK_STATUS_ERROR if method lock_status_get of dpll_device_ops matches status_error in "$dh" + gen HAVE_DPLL_PHASE_OFFSET if method phase_offset_get of dpll_pin_ops in "$dh" + gen HAVE_DPLL_PHASE_OFFSET_MONITOR if method phase_offset_monitor_set of dpll_device_ops in "$dh" + gen NEED_DPLL_NETDEV_PIN_SET if fun dpll_netdev_pin_set absent in "$dh" +} + +function gen-ethtool() { + eth='include/linux/ethtool.h' + nleth='include/linux/ethtool_netlink.h' + ueth='include/uapi/linux/ethtool.h' + unleth='include/uapi/linux/ethtool_netlink.h' + unlgeth='include/uapi/linux/ethtool_netlink_generated.h' + gen HAVE_ETHTOOL_COALESCE_EXTACK if method get_coalesce of ethtool_ops matches 'struct kernel_ethtool_coalesce \\*' in "$eth" + gen HAVE_ETHTOOL_EXTENDED_RINGPARAMS if method get_ringparam of ethtool_ops matches 'struct kernel_ethtool_ringparam \\*' in "$eth" + gen HAVE_ETHTOOL_FEC_HIST if method get_fec_stats of ethtool_ops matches 'struct ethtool_fec_hist \\*' in "$eth" + gen HAVE_ETHTOOL_GET_FEC_STATS_OPS if struct ethtool_ops matches '\\*get_fec_stats' in "$eth" + gen HAVE_ETHTOOL_KEEE if struct ethtool_keee in "$eth" + gen HAVE_ETHTOOL_KERNEL_TS_INFO if struct kernel_ethtool_ts_info in "$eth" + gen HAVE_ETHTOOL_LINK_EXT_STATS if struct ethtool_ops matches '\\*get_link_ext_stats' in "$eth" + gen HAVE_ETHTOOL_PUTS if fun ethtool_puts in "$eth" + gen HAVE_ETHTOOL_RXFH_PARAM if struct ethtool_rxfh_param in "$eth" + gen HAVE_ETHTOOL_SUPPORTED_RING_PARAMS if struct ethtool_ops matches 'supported_ring_params' in "$eth" + gen NEED_ETHTOOL_RING_USE_TCP_DATA_SPLIT if enum ethtool_supported_ring_param matches ETHTOOL_RING_USE_TCP_DATA_SPLIT in "$eth" + gen NEED_ETHTOOL_SPRINTF if fun ethtool_sprintf absent in "$eth" + gen HAVE_ETHTOOL_FLOW_RSS if macro FLOW_RSS in "$ueth" + gen HAVE_ETHTOOL_LINK_MODE_FEC_NONE_BIT if enum ethtool_link_mode_bit_indices matches ETHTOOL_LINK_MODE_FEC_NONE_BIT in "$ueth" + gen NEED_ETHTOOL_LINK_MODE_BIT_INDICES if enum ethtool_link_mode_bit_indices absent in "$ueth" + + ETHTOOL_TCP_DATA_SPLIT=0 + if check anonymous enum matches ETHTOOL_TCP_DATA_SPLIT_UNKNOWN in "$unleth" || + check enum ethtool_tcp_data_split matches ETHTOOL_TCP_DATA_SPLIT_UNKNOWN in "$unlgeth"; then + ETHTOOL_TCP_DATA_SPLIT=1 + fi + gen HAVE_ETHTOOL_SUPPORT_TCP_DATA_SPLIT if string "$ETHTOOL_TCP_DATA_SPLIT" equals 1 +} + +function gen-exported-symbols() { + # The Module.symvers is a generated file that is found in the object + # directory, not the source directory. + symvers="${KOBJ}/Module.symvers" + gen HAVE_EXPORTED_IRQ_SET_AFFINITY if symbol irq_set_affinity matches vmlinux in "$symvers" +} + +function gen-filter() { + fh='include/linux/filter.h' + gen NEED_NO_NETDEV_PROG_XDP_WARN_ACTION if fun bpf_warn_invalid_xdp_action lacks 'struct net_device \\*' in "$fh" + gen NEED_XDP_DO_FLUSH if fun xdp_do_flush absent in "$fh" +} + +function gen-flow-dissector() { + aah='include/net/act_api.h' + fdh='include/net/flow_dissector.h' + fkh='include/net/flow_keys.h' + foh='include/net/flow_offload.h' + pch='include/net/pkt_cls.h' + sgh='include/net/sch_generic.h' + tmh='include/net/tc_act/tc_mirred.h' + + gen HAVE_FLOW_DISSECTOR_KEY_PPPOE if enum flow_dissector_key_id matches FLOW_DISSECTOR_KEY_PPPOE in "$fdh" "$fkh" + gen HAVE_FLOW_DISSECTOR_ICMP_ID if enum flow_dissector_key_icmp matches id in "$fdh" + + gen HAVE_FLOW_BLOCK_API if fun flow_block_cb_priv in "$foh" + + # following HAVE ... CVLAN flag is mistakenly named after an enum key, + # but guards code around function call that was introduced later + gen HAVE_FLOW_DISSECTOR_KEY_CVLAN if fun flow_rule_match_cvlan in "$foh" + gen HAVE_FLOW_MATCH_ICMP if struct flow_match_icmp in "$foh" + gen HAVE_TC_FLOW_INDIR_BLOCK_CLEANUP if fun flow_indr_dev_unregister matches 'void \\(\\*release\\)\\(void \\*cb_priv\\)' in "$foh" + gen HAVE_TC_FLOW_INDIR_DEV if fun flow_indr_dev_register in "$foh" + gen HAVE_TC_FLOW_RULE_INFRASTRUCTURE if struct flow_action in "$foh" + gen NEED_FLOW_BLOCK_BIND if enum '(flow_block_command|tc_block_command)' lacks FLOW_BLOCK_BIND in "$foh" "$pch" + gen NEED_FLOW_BLOCK_BINDER_TYPE if enum '(flow_block_binder_type|tcf_block_binder_type)' lacks FLOW_BLOCK_BINDER_TYPE_CLSACT_INGRESS in "$foh" "$pch" + gen NEED_FLOW_BLOCK_CB_SETUP_SIMPLE if fun flow_block_cb_setup_simple absent in "$foh" + gen NEED_FLOW_CLS_OFFLOAD if struct flow_cls_offload absent in "$foh" + gen NEED_FLOW_MATCH if struct flow_match absent in "$foh" + + gen HAVE_TCF_BLOCK_CB_REGISTER_EXTACK if fun tcf_block_cb_register matches 'struct netlink_ext_ack \\*extack' in "$pch" + gen HAVE_TCF_EXTS_FOR_EACH_ACTION if macro tcf_exts_for_each_action in "$pch" + gen HAVE_TCF_EXTS_HAS_ACTION if fun tcf_exts_has_actions in "$pch" + gen HAVE_TCF_EXTS_TO_LIST if fun tcf_exts_to_list in "$pch" + + gen HAVE_TCF_BLOCK if fun '(tcf_block_cb_register|flow_block_cb_setup_simple)' in "$foh" "$pch" + gen HAVE_TC_CB_AND_SETUP_QDISC_MQPRIO if typedef '(tc_setup_cb_t|flow_setup_cb_t)' in "$aah" "$foh" "$sgh" + gen HAVE_TC_INDIR_BLOCK if fun '(flow_indr_dev_register|tc_indr_block_cb_register|flow_indr_block_cb_register)' in "$foh" "$pch" + gen HAVE_TC_SETUP_CLSFLOWER if struct '(tc_cls_flower_offload|flow_cls_offload)' in "$foh" "$pch" + + # Some drivers check HAVE_TCF_MIRRED_DEV and + # HAVE_TCF_MIRRED_EGRESS_REDIRECT directly, so we need to keep both + # the NEED_ and HAVE_ variants. + # + # Additionally, drivers check HAVE_TCF_MIRRED_REDIRECT and expect it + # to be true even after the rename to is_tcf_mirred_egress_redirect. + gen HAVE_TCF_MIRRED_DEV if fun tcf_mirred_dev in "$tmh" + gen HAVE_TCF_MIRRED_EGRESS_REDIRECT if fun is_tcf_mirred_egress_redirect in "$tmh" + gen HAVE_TCF_MIRRED_REDIRECT if fun '(is_tcf_mirred_egress_redirect|is_tcf_mirred_redirect)' in "$tmh" + gen NEED_TCF_MIRRED_DEV if fun tcf_mirred_dev absent in "$tmh" + gen NEED_TCF_MIRRED_EGRESS_REDIRECT if fun is_tcf_mirred_egress_redirect absent in "$tmh" +} + +function gen-gnss() { + cdh='include/linux/cdev.h' + clh='include/linux/device/class.h' + dh='include/linux/device.h' + gh='include/linux/gnss.h' + th='include/uapi/linux/types.h' + fh='include/linux/fs.h' + + gen HAVE_CDEV_DEVICE if fun cdev_device_add in "$cdh" + gen HAVE_DEV_UEVENT_CONST if method dev_uevent of class matches '(const|RH_KABI_CONST) struct device' in "$clh" "$dh" + gen HAVE_NO_LLSEEK if fun no_llseek in "$fh" + gen HAVE_STREAM_OPEN if fun stream_open in "$fh" + + NEED_CLASS_CREATE=0 + if check fun class_create matches 'owner' in "$clh" "$dh" || + check macro class_create matches 'owner' in "$clh" "$dh" ; then + NEED_CLASS_CREATE=1 + fi + gen NEED_CLASS_CREATE_WITHOUT_OWNER if string "$NEED_CLASS_CREATE" equals 1 + + HAVE_GNSS_MODULE=0 + if ! config_has CONFIG_SUSE_KERNEL && check struct gnss_device in "$gh" ; then + HAVE_GNSS_MODULE=1 + fi + gen HAVE_GNSS_MODULE if string "$HAVE_GNSS_MODULE" equals 1 + + gen HAVE_POLL_T if typedef __poll_t in "$th" +} + +function gen-mdev() { + mdevh='include/linux/mdev.h' + + gen HAVE_DEV_IN_MDEV_API if method probe of mdev_driver matches 'struct device \\*' in "$mdevh" + gen HAVE_KOBJ_IN_MDEV_PARENT_OPS_CREATE if method create of mdev_parent_ops matches 'struct kobject \\*' in "$mdevh" +} + +function gen-mdio() { + mdioh='include/linux/mdio.h' + + gen HAVE_MII_EEE_CAP1_MOD_LINKMODE if fun mii_eee_cap1_mod_linkmode_t in "$mdioh" +} + +function gen-mm() { + slabh='include/linux/slab.h' + + gen NEED_KREALLOC_ARRAY if fun krealloc_array absent in "$slabh" + + HAVE_KMEM_CACHE_ALLOC_LRU=0 + check macro kmem_cache_alloc_lru in "$slabh" && HAVE_KMEM_CACHE_ALLOC_LRU=1 + check fun kmem_cache_alloc_lru in "$slabh" && HAVE_KMEM_CACHE_ALLOC_LRU=1 + gen NEED_KMEM_CACHE_ALLOC_LRU if string "$HAVE_KMEM_CACHE_ALLOC_LRU" equals 0 +} + +function gen-netdevice() { + ndh='include/linux/netdevice.h' + gen HAVE_NDO_BRIDGE_SETLINK_EXTACK if method ndo_bridge_setlink of net_device_ops matches 'struct netlink_ext_ack \\*extack' in "$ndh" + gen HAVE_NDO_ETH_IOCTL if fun ndo_eth_ioctl in "$ndh" + gen HAVE_NDO_EXTENDED_SET_TX_MAXRATE if method ndo_set_tx_maxrate of net_device_ops_extended in "$ndh" + gen HAVE_NDO_FDB_ADD_EXTACK if method ndo_fdb_add of net_device_ops matches 'struct netlink_ext_ack \\*extack' in "$ndh" + gen HAVE_NDO_FDB_ADD_NOTIFIED if method ndo_fdb_add of net_device_ops matches 'bool \\*notified' in "$ndh" + gen HAVE_NDO_FDB_ADD_VID if method ndo_fdb_add of net_device_ops matches 'u16 vid' in "$ndh" + gen HAVE_NDO_FDB_DEL_EXTACK if method ndo_fdb_del of net_device_ops matches 'struct netlink_ext_ack \\*extack' in "$ndh" + gen HAVE_NDO_FDB_DEL_NOTIFIED if method ndo_fdb_del of net_device_ops matches 'bool \\*notified' in "$ndh" + gen HAVE_NDO_GET_DEVLINK_PORT if method ndo_get_devlink_port of net_device_ops in "$ndh" + gen HAVE_NDO_SETUP_TC_CHAIN_INDEX if method ndo_setup_tc of net_device_ops matches 'u32 chain_index' in "$ndh" + gen HAVE_NDO_SETUP_TC_REMOVE_TC_TO_NETDEV if method '(ndo_setup_tc|ndo_setup_tc_rh)' of '(net_device_ops|netdevice_ops_extended)' matches 'void \\*type_data' in "$ndh" + gen HAVE_NDO_UDP_TUNNEL_CALLBACK if method ndo_udp_tunnel_add of net_device_ops in "$ndh" + gen HAVE_NETDEV_EXTENDED_MIN_MAX_MTU if struct net_device_extended matches min_mtu in "$ndh" + gen HAVE_NETDEV_FCOE_MTU if struct net_device matches fcoe_mtu in "$ndh" + gen HAVE_NETDEV_IRQ_AFFINITY_AND_ARFS if struct net_device matches irq_affinity_auto in "$ndh" + gen HAVE_NETDEV_MIN_MAX_MTU if struct net_device matches min_mtu in "$ndh" + gen HAVE_NETIF_SET_TSO_MAX if fun netif_set_tso_max_size in "$ndh" + gen HAVE_RHEL7_NETDEV_OPS_EXT_NDO_SETUP_TC if method ndo_setup_tc_rh of net_device_ops_extended in "$ndh" + gen HAVE_SET_NETDEV_DEVLINK_PORT if macro SET_NETDEV_DEVLINK_PORT in "$ndh" + gen NEED_NETDEV_TX_SENT_QUEUE if fun __netdev_tx_sent_queue absent in "$ndh" + gen NEED_NETIF_NAPI_ADD_NO_WEIGHT if fun netif_napi_add matches 'int weight' in "$ndh" + gen NEED_NET_PREFETCH if fun net_prefetch absent in "$ndh" + gen NEED_XDP_FEATURES if enum netdev_xdp_act absent in include/uapi/linux/netdev.h +} + +function gen-netif() { + gen HAVE_GENEVE_TYPE if fun netif_is_geneve in include/net/geneve.h + gen HAVE_GRETAP_TYPE if fun netif_is_gretap in include/net/gre.h + gen HAVE_GTP_SUPPORT if fun netif_is_gtp in include/net/gtp.h + gen HAVE_NETIF_SUBQUEUE_MAYBE_STOP if macro netif_subqueue_maybe_stop in include/net/netdev_queues.h + gen HAVE_VXLAN_TYPE if fun netif_is_vxlan in include/net/vxlan.h +} + +function gen-packing() { + lph='include/linux/packing.h' + HAVE_PACK_FIELDS=0 + if config_has CONFIG_PACKING && check macro pack_fields in "$lph" ; then + HAVE_PACK_FIELDS=1 + fi + gen HAVE_PACK_FIELDS if string "$HAVE_PACK_FIELDS" equals 1 +} + +function gen-pci() { + pcih='include/linux/pci.h' + gen HAVE_PCI_MSIX_ALLOC_IRQ_AT if fun pci_msix_alloc_irq_at in "$pcih" + gen HAVE_PCI_MSIX_CAN_ALLOC_DYN if fun pci_msix_can_alloc_dyn in "$pcih" + gen HAVE_PCI_MSIX_FREE_IRQ if fun pci_msix_free_irq in "$pcih" + gen HAVE_PER_VF_MSIX_SYSFS if method sriov_set_msix_vec_count of pci_driver in "$pcih" + gen HAVE_STRUCT_PCI_DEV_PTM_CAP if struct pci_dev matches ptm_cap in "$pcih" + gen HAVE_STRUCT_PCI_DEV_PTM_ENABLED if struct pci_dev matches ptm_enabled in "$pcih" + gen NEED_PCIE_FLR if fun pcie_flr absent in "$pcih" + gen NEED_PCIE_FLR_RETVAL if fun pcie_flr lacks 'int pcie_flr' in "$pcih" + gen NEED_PCIE_PTM_ENABLED if fun pcie_ptm_enabled absent in "$pcih" + gen NEED_PCI_DISABLE_PTM if fun pci_disable_ptm absent in "$pcih" + gen NEED_PCI_ENABLE_PTM if fun pci_enable_ptm absent in "$pcih" +} + +function gen-ptp() { + classifyh='include/linux/ptp_classify.h' + clockh='include/linux/ptp_clock_kernel.h' + timekeepingh='include/linux/timekeeping.h' + uapih='include/uapi/linux/ptp_clock.h' + gen HAVE_PTP_CSID_X86_ART if enum clocksource_ids matches CSID_X86_ART in include/linux/clocksource_ids.h + gen NEED_PTP_CLASSIFY_RAW if fun ptp_classify_raw absent in "$classifyh" + gen NEED_PTP_PARSE_HEADER if fun ptp_parse_header absent in "$classifyh" + gen HAVE_PTP_CANCEL_WORKER_SYNC if fun ptp_cancel_worker_sync in "$clockh" + gen HAVE_PTP_CLOCK_DO_AUX_WORK if method do_aux_work of ptp_clock_info in "$clockh" + gen HAVE_PTP_CLOCK_INFO_ADJFINE if method adjfine of ptp_clock_info in "$clockh" + gen HAVE_PTP_CLOCK_INFO_GETTIME64 if method gettime64 of ptp_clock_info in "$clockh" + gen HAVE_PTP_CLOCK_INFO_GETTIMEX64 if method gettimex64 of ptp_clock_info in "$clockh" + gen HAVE_PTP_FIND_PIN_UNLOCKED if fun ptp_find_pin_unlocked in "$clockh" + gen HAVE_PTP_SUPPORTED_EXTTS_FLAGS if struct ptp_clock_info matches supported_extts_flags in "$clockh" + gen HAVE_PTP_SUPPORTED_PEROUT_FLAGS if struct ptp_clock_info matches supported_perout_flags in "$clockh" + gen NEED_DIFF_BY_SCALED_PPM if fun diff_by_scaled_ppm absent in "$clockh" + gen NEED_PTP_SYSTEM_TIMESTAMP if fun ptp_read_system_prets absent in "$clockh" + gen HAVE_PTP_SYS_COUNTERVAL_CSID if struct system_counterval_t matches clocksource_ids in "$timekeepingh" + gen HAVE_PTP_TX_ONESTEP_P2P if enum hwtstamp_tx_types matches HWTSTAMP_TX_ONESTEP_P2P in include/uapi/linux/net_tstamp.h + gen HAVE_PTP_SYS_OFFSET_EXTENDED_IOCTL if macro PTP_SYS_OFFSET_EXTENDED in "$uapih" + + # aarch64 requires additional function to enable cross timestamping + if config_has CONFIG_ARM64 && + (check fun arch_timer_wrap_counter in include/clocksource/arm_arch_timer.h || + check struct system_counterval_t matches clocksource_ids in "$timekeepingh") ; then + HAVE_CROSS_TSTAMP=1 + elif config_has CONFIG_X86 && + (check fun convert_art_ns_to_tsc in arch/x86/include/asm/tsc.h || + check enum clocksource_ids matches CSID_X86_ART in include/linux/clocksource_ids.h) ; then + HAVE_CROSS_TSTAMP=1 + else + HAVE_CROSS_TSTAMP=0 + fi + gen HAVE_PTP_CROSSTIMESTAMP if string "${HAVE_CROSS_TSTAMP}" equals 1 +} + +function gen-stddef() { + stddef='include/linux/stddef.h' + ustddef='include/uapi/linux/stddef.h' + gen HAVE_STDDEF_OFFSETTOEND if macro offsetofend in "$stddef" + gen NEED_DECLARE_FLEX_ARRAY if macro DECLARE_FLEX_ARRAY absent in "$stddef" + gen NEED_STRUCT_GROUP if macro struct_group absent in "$stddef" + gen NEED___STRUCT_GROUP if macro __struct_group absent in "$ustddef" +} + +function gen-vdcm() { + gen NEED_EVENTFD_SIGNAL_NO_COUNTER if fun eventfd_signal matches '__u64 n' in include/linux/eventfd.h +} + +function gen-vfio() { + # PASID_SUPPORT depends on multiple different functions existing + PASID_SUPPORT=0 + if check fun mdev_set_iommu_device in include/linux/mdev.h && + check fun vfio_group_iommu_domain in include/linux/vfio.h ; then + PASID_SUPPORT=1 + fi + gen HAVE_PASID_SUPPORT if string "${PASID_SUPPORT}" equals 1 + + gen HAVE_VFIO_FREE_DEV if fun vfio_free_device in include/linux/vfio.h + gen HAVE_LMV1_SUPPORT if macro VFIO_REGION_TYPE_MIGRATION in include/uapi/linux/vfio.h +} + +function gen-other() { + pciaerh='include/linux/aer.h' + ush='include/linux/u64_stats_sync.h' + fsh='include/linux/fortify-string.h' + cth='include/linux/compiler_types.h' + gen HAVE_X86_STEPPING if struct cpuinfo_x86 matches x86_stepping in arch/x86/include/asm/processor.h + gen HAVE_PCI_ENABLE_PCIE_ERROR_REPORTING if fun pci_enable_pcie_error_reporting in "$pciaerh" + gen NEED_PCI_AER_CLEAR_NONFATAL_STATUS if fun pci_aer_clear_nonfatal_status absent in "$pciaerh" + gen NEED_BITMAP_COPY_CLEAR_TAIL if fun bitmap_copy_clear_tail absent in include/linux/bitmap.h + gen NEED_BITMAP_FROM_ARR32 if fun bitmap_from_arr32 absent in include/linux/bitmap.h + gen NEED_BITMAP_TO_ARR32 if fun bitmap_to_arr32 absent in include/linux/bitmap.h + gen NEED_ASSIGN_BIT if fun assign_bit absent in include/linux/bitops.h + gen NEED_STATIC_ASSERT if macro static_assert absent in include/linux/build_bug.h + # special case for kernels 6.2 - 6.6 and __struct_size macro + # there is an implicit dependency on CONFIG_FORTIFY_SOURCE config option and inclusion + # of 'forify-string.h' header (which includes that macro definition). + __STRUCT_SIZE_NEEDED=0 + if ! config_has CONFIG_FORTIFY_SOURCE && check macro __struct_size in "$fsh" ; then + __STRUCT_SIZE_NEEDED=1 + fi + if [ ${__STRUCT_SIZE_NEEDED} -eq 0 ] && check macro __struct_size absent in "$cth" "$fsh"; then + __STRUCT_SIZE_NEEDED=1 + fi + gen NEED___STRUCT_SIZE if string "${__STRUCT_SIZE_NEEDED}" equals 1 + gen HAVE_COMPLETION_RAW_SPINLOCK if struct completion matches 'struct swait_queue_head' in include/linux/completion.h + gen NEED_IS_CONSTEXPR if macro __is_constexpr absent in include/linux/const.h include/linux/minmax.h include/linux/kernel.h + gen NEED_DEBUGFS_LOOKUP if fun debugfs_lookup absent in include/linux/debugfs.h + gen NEED_DEBUGFS_LOOKUP_AND_REMOVE if fun debugfs_lookup_and_remove absent in include/linux/debugfs.h + gen NEED_DIM_END_SAMPLE_BY_POINTER if fun net_dim matches 'struct dim_sample end_sample' in include/linux/dim.h + gen NEED_ETH_GET_HEADLEN if fun eth_get_headlen absent in include/linux/etherdevice.h + gen NEED_ETH_GET_HEADLEN_NET_DEVICE_ARG if fun eth_get_headlen lacks 'struct net_device \\*' in include/linux/etherdevice.h + gen NEED_ETH_HW_ADDR_SET if fun eth_hw_addr_set absent in include/linux/etherdevice.h + gen NEED_FIND_NEXT_BIT_WRAP if fun find_next_bit_wrap absent in include/linux/find.h + gen HAVE_FILE_IN_SEQ_FILE if struct seq_file matches 'struct file' in include/linux/fs.h + gen NEED_FS_FILE_DENTRY if fun file_dentry absent in include/linux/fs.h + gen HAVE_HWMON_DEVICE_REGISTER_WITH_INFO if fun hwmon_device_register_with_info in include/linux/hwmon.h + gen NEED_HWMON_CHANNEL_INFO if macro HWMON_CHANNEL_INFO absent in include/linux/hwmon.h + gen NEED_ETH_TYPE_VLAN if fun eth_type_vlan absent in include/linux/if_vlan.h + gen HAVE_IOMMU_DEV_FEAT_AUX if enum iommu_dev_features matches IOMMU_DEV_FEAT_AUX in include/linux/iommu.h + gen NEED_READ_POLL_TIMEOUT if macro read_poll_timeout absent in include/linux/iopoll.h + gen NEED_READ_POLL_TIMEOUT_ATOMIC if macro read_poll_timeout_atomic absent in include/linux/iopoll.h + gen NEED_DEFINE_STATIC_KEY_FALSE if macro DEFINE_STATIC_KEY_FALSE absent in include/linux/jump_label.h + gen NEED_STATIC_BRANCH_LIKELY if macro static_branch_likely absent in include/linux/jump_label.h + gen HAVE_STRUCT_STATIC_KEY_FALSE if struct static_key_false in include/linux/jump_label.h include/linux/jump_label_type.h + gen NEED_DECLARE_STATIC_KEY_FALSE if macro DECLARE_STATIC_KEY_FALSE absent in include/linux/jump_label.h include/linux/jump_label_type.h + gen NEED_LOWER_16_BITS if macro lower_16_bits absent in include/linux/kernel.h + gen NEED_UPPER_16_BITS if macro upper_16_bits absent in include/linux/kernel.h + gen HAVE_LINKMODE if fun linkmode_zero in include/linux/linkmode.h + gen NEED_LINKMODE_SET_BIT_ARRAY if fun linkmode_set_bit_array absent in include/linux/linkmode.h + gen NEED_LINKMODE_ZERO if fun linkmode_zero absent in include/linux/linkmode.h + gen NEED_LIST_COUNT_NODES if fun list_count_nodes absent in include/linux/list.h + + # On aarch64 RHEL systems, mul_u64_u64_div_u64 appears to be declared + # in math64 header, but is not provided by kernel + # so on these systems, set it to need anyway. + NEED_MUL_U64=0 + if [ "$IS_ARM" ] || check fun mul_u64_u64_div_u64 absent in include/linux/math64.h ; then + NEED_MUL_U64=1 + fi + gen NEED_MUL_U64_U64_DIV_U64 if string "${NEED_MUL_U64}" equals 1 + + gen NEED_DIV_U64_ROUND_CLOSEST if macro DIV_U64_ROUND_CLOSEST absent in include/linux/math64.h + gen NEED_DIV_U64_ROUND_UP if macro DIV_U64_ROUND_UP absent in include/linux/math64.h + gen NEED_ROUNDUP_U64 if fun roundup_u64 absent in include/linux/math64.h + gen HAVE_MDEV_GET_DRVDATA if fun mdev_get_drvdata in include/linux/mdev.h + gen HAVE_MDEV_REGISTER_PARENT if fun mdev_register_parent in include/linux/mdev.h + gen HAVE_VM_FLAGS_API if fun vm_flags_init in include/linux/mm.h + gen HAVE_NL_SET_ERR_MSG_FMT if macro NL_SET_ERR_MSG_FMT in include/linux/netlink.h + gen NEED_DEV_PM_DOMAIN_ATTACH if fun dev_pm_domain_attach absent in include/linux/pm_domain.h include/linux/pm.h + gen NEED_DEV_PM_DOMAIN_DETACH if fun dev_pm_domain_detach absent in include/linux/pm_domain.h include/linux/pm.h + gen NEED_RADIX_TREE_EMPTY if fun radix_tree_empty absent in include/linux/radix-tree.h + gen HAVE_LINUX_REFCOUNT_HEADER if fun refcount_inc in include/linux/refcount.h + gen NEED_SCHED_PARAM if struct sched_param absent in include/linux/sched.h + gen NEED_SET_SCHED_FIFO if fun sched_set_fifo absent in include/linux/sched.h + gen NEED_RT_H if macro MAX_RT_PRIO absent in include/linux/sched/prio.h + gen HAVE_SKB_CSUM_IS_SCTP if fun skb_csum_is_sctp in include/linux/skbuff.h + gen NEED_DEV_PAGE_IS_REUSABLE if fun dev_page_is_reusable absent in include/linux/skbuff.h + gen NEED_NAPI_ALLOC_SKB if fun __napi_alloc_skb in include/linux/skbuff.h + gen NEED_NAPI_BUILD_SKB if fun napi_build_skb absent in include/linux/skbuff.h + gen NEED_SKB_FRAG_OFF if fun skb_frag_off absent in include/linux/skbuff.h + gen NEED_SKB_FRAG_OFF_ADD if fun skb_frag_off_add absent in include/linux/skbuff.h + gen NEED_SYSFS_MATCH_STRING if macro sysfs_match_string absent in include/linux/string.h + gen HAVE_STRING_CHOICES_H if fun str_enabled_disabled in include/linux/string_choices.h + gen NEED_STR_ENABLED_DISABLED if fun str_enabled_disabled absent in include/linux/string_choices.h include/linux/string_helpers.h + gen HAVE_STRING_HELPERS_H if enum string_size_units in include/linux/string_helpers.h + gen NEED_SYSFS_EMIT if fun sysfs_emit absent in include/linux/sysfs.h + gen HAVE_NON_CONST_CYCLECOUNTER if method read of cyclecounter lacks const in include/linux/timecounter.h + gen NEED_TIMER_CONTAINER_OF if macro timer_container_of absent in include/linux/timer.h + gen NEED_TIMER_DELETE if fun timer_delete absent in include/linux/timer.h + gen HAVE_TRACE_ENABLED_SUPPORT if implementation of macro __DECLARE_TRACE matches 'trace_##name##_enabled' in include/linux/tracepoint.h + gen HAVE_TTY_OP_WRITE_SIZE_T if method write of tty_operations matches size_t in include/linux/tty_driver.h + gen HAVE_U64_STATS_FETCH_BEGIN_IRQ if fun u64_stats_fetch_begin_irq in "$ush" + gen HAVE_U64_STATS_FETCH_RETRY_IRQ if fun u64_stats_fetch_retry_irq in "$ush" + gen NEED_U64_STATS_READ if fun u64_stats_read absent in "$ush" + gen NEED_U64_STATS_SET if fun u64_stats_set absent in "$ush" + gen HAVE_XARRAY_API if macro DEFINE_XARRAY in include/linux/xarray.h + gen HAVE_TC_FLOWER_ENC if enum flow_dissector_key_id matches FLOW_DISSECTOR_KEY_ENC_CONTROL in include/net/flow_dissector.h + gen HAVE_TC_FLOWER_VLAN_IN_TAGS if enum flow_dissector_key_id matches FLOW_DISSECTOR_KEY_VLANID in include/net/flow_dissector.h + gen HAVE_NET_RPS_H if macro RPS_NO_FILTER in include/net/rps.h + gen HAVE_UDP_TUNNEL_NIC_INFO_MAY_SLEEP if enum udp_tunnel_nic_info_flags matches UDP_TUNNEL_NIC_INFO_MAY_SLEEP in include/net/udp_tunnel.h + gen NEED_XDP_CONVERT_BUFF_TO_FRAME if fun xdp_convert_buff_to_frame absent in include/net/xdp.h + gen NEED_XSK_BUFF_DMA_SYNC_FOR_CPU_NO_POOL if fun xsk_buff_dma_sync_for_cpu matches 'struct xsk_buff_pool' in include/net/xdp_sock_drv.h + gen HAVE_ASSIGN_STR_2_PARAMS if macro __assign_str matches src in include/trace/stages/stage6_event_callback.h include/trace/trace_events.h include/trace/ftrace.h + + HAVE_LINUX_UNALIGNED=0 + if [ -n "$(filter-out-bad-files include/linux/unaligned.h)" ]; then + HAVE_LINUX_UNALIGNED=1 + fi + gen HAVE_LINUX_UNALIGNED_HEADER if string "${HAVE_LINUX_UNALIGNED}" equals 1 + + HAVE_LINUX_BITS=0 + if [ -n "$(filter-out-bad-files include/linux/bits.h)" ]; then + HAVE_LINUX_BITS=1 + fi + gen HAVE_LINUX_BITS_HEADER if string "${HAVE_LINUX_BITS}" equals 1 + + HAVE_LINUX_REFCOUNT_TYPES=0 + if [ -n "$(filter-out-bad-files include/linux/refcount_types.h)" ]; then + HAVE_LINUX_REFCOUNT_TYPES=1 + fi + gen HAVE_LINUX_REFCOUNT_TYPES_HEADER if string "${HAVE_LINUX_REFCOUNT_TYPES}" equals 1 +} + +# all the generations, extracted from main() to keep normal code and various +# prep separated +function gen-all() { + if config_has CONFIG_NET_DEVLINK; then + gen-devlink + fi + gen-netdevice + # code above is covered by unit_tests/test_gold.sh + if [ -n "${JUST_UNIT_TESTING-}" ]; then + return + fi + gen-aux + gen-bitfield + gen-cleanup + gen-device + gen-devres + gen-dma + gen-dpll + gen-ethtool + gen-exported-symbols + gen-filter + gen-flow-dissector + gen-gnss + gen-mdev + gen-mdio + gen-mm + gen-netif + gen-packing + gen-pci + gen-ptp + gen-stddef + gen-vdcm + gen-vfio + gen-other +} + +function main() { + if ! [ -d "${KSRC-}" ]; then + echo >&2 "env KSRC=${KSRC-} does not exist or is not a directory" + exit 11 + fi + + # Assume KOBJ is the same as KSRC if not set. + if [ -z "${KOBJ-}" ]; then + KOBJ="${KSRC-}" + fi + + # we need some flags from .config or (autoconf.h), try to find it + if [ -z "${CONFIG_FILE-}" ]; then + find_config_file + + if [ -z ${CONFIG_FILE-} ]; then + echo >&2 "unable to locate a config file at KOBJ=${KOBJ}. please set CONFIG_FILE to the kernel configuration file." + exit 10 + fi + fi + + if [ ! -f "${CONFIG_FILE-}" ]; then + echo >&2 ".config passed in by env CONFIG_FILE=${CONFIG_FILE} does not exist or is not a file" + exit 9 + fi + CONFIG_FILE=$(realpath "${CONFIG_FILE-}") + + # check if caller (like our makefile) wants to redirect output to file + if [ -n "${OUT-}" ]; then + + # in case OUT exists, we don't want to overwrite it, instead + # write to a temporary copy. + if [ -s "${OUT}" ]; then + TMP_OUT="$(mktemp "${OUT}.XXX")" + trap "rm -f '${TMP_OUT}'" EXIT + + REAL_OUT="${OUT}" + OUT="${TMP_OUT}" + fi + + exec > "$OUT" + # all stdout goes to OUT since now + echo "/* Autogenerated for KSRC=${KSRC-} via $(basename "$0") */" + fi + + cd "${KSRC}" + + # check if KSRC was ok/if we are in proper place to look for headers + if [ -z "$(filter-out-bad-files include/linux/kernel.h)" ]; then + echo >&2 "seems that there are no kernel includes placed in KSRC=${KSRC} + pwd=$(pwd); ls -l:" + ls -l >&2 + exit 8 + fi + + if [ -z ${UNIFDEF_MODE-} ]; then + echo "#ifndef _KCOMPAT_GENERATED_DEFS_H_" + echo "#define _KCOMPAT_GENERATED_DEFS_H_" + fi + + gen-all + + if [ -z ${UNIFDEF_MODE-} ]; then + echo "#endif /* _KCOMPAT_GENERATED_DEFS_H_ */" + fi + + if [ -n "${OUT-}" ]; then + cd "$ORIG_CWD" + + # Compare and see if anything changed. This avoids updating + # mtime of the file. + if [ -n "${REAL_OUT-}" ]; then + if cmp --silent "${REAL_OUT}" "${TMP_OUT}"; then + # exit now, skipping print of the output since + # there were no changes. the trap should + # cleanup TMP_OUT + exit 0 + fi + + mv -f "${TMP_OUT}" "${REAL_OUT}" + OUT="${REAL_OUT}" + fi + + # dump output, will be visible in CI + if [ -n "${JUST_UNIT_TESTING-}${QUIET_COMPAT-}" ]; then + return + fi + cat -n "$OUT" >&2 + fi +} + +main + +# Coding style: +# - rely on `set -e` handling as much as possible, so: +# - do not use <(bash process substitution) - it breaks error handling; +# - do not put substantial logic in `if`-like statement - it disables error +# handling inside of the conditional (`if big-fun call; then` is substantial) +# - make shellcheck happy - https://www.shellcheck.net +# +# That enables us to move processing out of `if` or `... && ...` statements, +# what finally means that bash error handling (`set -e`) would break on errors. diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/kcompat-lib.sh b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/kcompat-lib.sh new file mode 100644 index 00000000000..b54d656601b --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/kcompat-lib.sh @@ -0,0 +1,490 @@ +#!/bin/bash +# SPDX-License-Identifier: GPL-2.0-only +# Copyright (C) 1999 - 2026 Intel Corporation + +# to be sourced + +# General shell helpers + +# exit with non-zero exit code; if there is only one param: +# exit with msg $1 and exit code from last command (or 99 if = 0) +# otherwise, exit with $1 and use remaining arguments as msg +function die() { + rc=$? + if [ $# -gt 1 ]; then + rc="$1" + shift + fi + [ "$rc" -ne 0 ] || rc=99 + echo >&2 "$@" + exit $rc +} + +# filter out paths that are not files +# input $@, output via echo; +# note: pass `-` for stdin +# note: outputs nothing if all input files are "bad" (eg. not existing), but it +# is left for caller to decide if this is an erorr condition; +# note: whitespaces are considered "bad" as part of filename, it's an error. +function filter-out-bad-files() { + if [[ $# = 1 && "$1" = '-' ]]; then + echo - + return 0 + fi + if [ $# = 0 ]; then + die 10 "no files passed, use '-' when reading from pipe (|)" + fi + local any=0 diagmsgs=/dev/stderr re=$'[\t \n]' + [ -n "${QUIET_COMPAT-}" ] && diagmsgs=/dev/null + for x in "$@"; do + if [ -e "$x" ]; then + if [[ "$x" =~ $re ]]; then + die 11 "err: filename contains whitespaces: $x." + fi + echo "$x" + any=1 + else + echo >&"$diagmsgs" filtering "$x" out + fi + done + if [ $any = 0 ]; then + echo >&"$diagmsgs" 'all files (for given query) filtered out' + fi +} + +# Basics of regexp explained, as a reference for mostly-C programmers: +# (bash) "regexp-$VAR-regexp" - bash' VARs are placed into "QUOTED" strings +# /\);?$/ - match end of function declaration, $ is end of string +# ^[ \t]* - (heuristic), anything but comment, eg to exclude function docs +# /STH/, /END/ - (awk), print all lines sice STH matched, up to END, inclusive + +# "Whitespace only" +WB='[ \t\n]' + +# Helpers below print the thing that is looked for, for further grep'ping/etc. +# That simplifies process of excluding comments or spares us state machine impl. +# +# We take advantage of current/common linux codebase formatting here. +# +# Functions in this section require input file/s passed as args +# (usually one, but more could be supplied in case of renames in kernel), +# '-' could be used as an (only) file argument to read from stdin/pipe. + +# wrapper over find-something-decl() functions below, to avoid repetition +# pass $what as $1, $end as $2, and $files to look in as rest of args +function find-decl() { + test $# -ge 3 # ensure that there are at least 3 params + local what end files + what="$1" + end="$2" + shift 2 + files="$(filter-out-bad-files "$@")" || die + if [ -z "$files" ]; then + return 0 + fi + # shellcheck disable=SC2086 + awk " + /^$WB*\*/ {next} + $what, $end + " $files +} + +# yield $1 function declaration (signature), don't pass return type in $1 +# looks only in files specified ($2, $3...) +function find-fun-decl() { + test $# -ge 2 + local what end + what="/$WB*([(]\*)?$1$WB*($|[()])/" + end='/\);?$/' + shift + find-decl "$what" "$end" "$@" +} + +# yield $1 enum declaration (type/body) +function find-enum-decl() { + test $# -ge 2 + local what end + what="/^$WB*enum$WB+$1"' \{$/' + end='/\};$/' + shift + find-decl "$what" "$end" "$@" +} + +# yield anonymous enum declaration (type/body) +function find-anon-enum-decl() { + test $# -ge 2 + local what end + what="/^$WB*enum$WB+"'\{$/' + end='/\};$/' + shift + find-decl "$what" "$end" "$@" +} + +# yield $1 struct declaration (type/body) +function find-struct-decl() { + test $# -ge 2 + local what end + what="/^$WB*struct$WB+$1"' \{$/' + end='/^\};$/' # that's (^) different from enum-decl + shift + find-decl "$what" "$end" "$@" +} + +# yield first line of $1 macro definition +function find-macro-decl() { + test $# -ge 2 + local what end + # only unindented defines, only whole-word match + what="/^#define$WB+$1"'([ \t\(]|$)/' + end=1 # only first line; use find-macro-implementation-decl for full body + shift + find-decl "$what" "$end" "$@" +} + +# yield full macro implementation +function find-macro-implementation-decl() { + test $# -ge 2 + local what end + # only unindented defines, only whole-word match + what="/^#define$WB+$1"'([ \t\(]|$)/' + # full implementation, until a line not ending in a backslash. + # Does not handle macros with comments embedded within the definition. + end='/[^\\]$/' + shift + find-decl "$what" "$end" "$@" +} + +# yield all first lines of $1 macro invocations, +# heuristic for DEFINE_GUARD()-like macros +function find-macro-invocation-decl() { + test $# -ge 2 + local what end + # only unindented defines, only whole-word match, with opening brace + # on the first line + what="/^${1}$WB*\(/" + end=1 # only first line + shift + find-decl "$what" "$end" "$@" +} + +# yield first line of $1 typedef definition +# This only handles typedefs where the name is on first line +function find-typedef-decl() { + test $# -ge 2 + local what end + # Assumes type name is followed by other ')', '(', or ';', or + # whitespace + what="/^typedef$WB.*$1"'[\(\); \t\n]/' + end='/;$/' + shift + find-decl "$what" "$end" "$@" +} + +# yield symbol line from Module.symvers +function find-symbol-decl() { + test $# -ge 2 + local what end + what="/^0x[0-9a-f]+\t$1\t/" + end=1 # only one line + shift + find-decl "$what" "$end" "$@" +} + +# gen() - DSL-like function to wrap around all the other +# +# syntax: +# gen DEFINE if (KIND [METHOD of]) NAME [(matches|lacks) PATTERN|absent] in +# gen DEFINE if string "actual" equals "expected" + +# where: +# DEFINE is HAVE_ or NEED_ #define to print; +# `if` is there to just read it easier and made syntax easier to check; +# +# NAME is the name for what we are looking for; +# +# `if string` can be used to check if a provided string matches an expected +# value. The define will only be generated if the strings are exactly +# equal. Otherwise, the define will not be generated. When operating in +# UNIFDEF_MODE, -DDEFINE is output when the strings are equal, while +# -UDEFINE is output when the strings are not equal. This is intended +# for cases where a more complex conditional is required, such as +# generating a define when multiple different functions exist. +# +# Ex: +# +# FUNC1="$(find-fun-decl devlink_foo1 devlink.h)" +# FUNC2="$(find-fun-decl devlink_foo2 devlink.h)" +# gen HAVE_FOO_12 if string "${FUNC1:+1}${FUNC2:+1}" equals "11" +# +# KIND specifies what kind of declaration/definition we are looking for, +# could be: fun, enum, struct, method, macro, typedef, symbol, +# 'anonymous enum', or 'implementation of macro' +# for KIND=method, we are looking for function ptr named METHOD in struct +# named NAME (two optional args are then necessary (METHOD & of)); +# +# for KIND=symbol, we are looking for a symbol definition in the format of +# Module.symvers. To verify that the symbol is exported by a particular +# module, the matches syntax can be used. +# +# for KIND='anonymous enum' we are looking for all anonymous enum +# definitions (i.e. an enum without a name). This is usually combined with +# "matches" or "lacks" to check for a specific value in any anonymous enum +# within the files. Unlike other KINDs, 'anonymous enum' syntax does not +# include NAME. +# +# for KIND='implementation of macro' we are looking for the full +# implementation of the macro, not just its first line. This is usually +# combined with "matches" or "lacks". +# +# next [optional] args could be used: +# matches PATTERN - use to grep for the PATTERN within definition +# (eg, for ext_ack param) +# lacks - use to add #define only if there is no match of the PATTERN, +# *but* the NAME is *found* +# absent - the NAME that we grep for must be not found +# (ie: function not exisiting) +# +# without this optional params, behavior is the same as with +# `matches .` - use to grep just for existence of NAME; +# +# `in` is there to ease syntax, similar to `if` before. +# +# is just space-separate list of files to look in, +# single (-) for stdin. +# +# PATTERN is an awk pattern, will be wrapped by two slashes (/) +# +# The usual output is a list of "#define " lines for each flag that has +# a matched definition. When UNIFDEF_MODE is set to a non-zero string, the +# output is instead a sequence of "-D" for each matched definition, and +# "-U" for each definition which didn't match. +function gen() { + test $# -ge 4 || die 20 "too few arguments, $# given, at least 4 needed" + local define if_kw kind name in_kw # mandatory + local of_kw method_name operator pattern # optional + local src_line="${BASH_SOURCE[0]}:${BASH_LINENO[0]}" + define="$1" + if_kw="$2" + kind="$3" + local orig_args_cnt=$# + shift 3 + [ "$if_kw" != if ] && die 21 "$src_line: 'if' keyword expected, '$if_kw' given" + case "$kind" in + string) + local actual_str expect_str equals_kw missing_fmt found_fmt + + test $# -ge 3 || die 22 "$src_line: too few arguments, $orig_args_cnt given, at least 6 needed" + + actual_str="$1" + equals_kw="$2" + expect_str="$3" + shift 3 + + if [ -z ${UNIFDEF_MODE:+1} ]; then + found_fmt="#define %s 1\n" + missing_fmt="" + else + found_fmt="-D%s\n" + missing_fmt="-U%s\n" + fi + + if [ "${actual_str}" = "${expect_str}" ]; then + printf -- "$found_fmt" "$define" + else + printf -- "$missing_fmt" "$define" + fi + + return + ;; + anonymous) + test $# -ge 3 || die 22 "$src_line: too few arguments, $orig_args_cnt given, at least 6 needed" + anon_kind="$1" + name="" + shift + # Other anonymous matches may be added in the future. + [ "$anon_kind" != enum ] && die 31 "$src_line: anonymous checks do not work with '$anon_kind'" + kind="anon-$anon_kind" + ;; + fun|enum|struct|macro|typedef|symbol) + test $# -ge 3 || die 22 "$src_line: too few arguments, $orig_args_cnt given, at least 6 needed" + name="$1" + shift + ;; + method) + test $# -ge 5 || die 22 "$src_line: too few arguments, $orig_args_cnt given, at least 8 needed" + method_name="$1" + of_kw="$2" + name="$3" + shift 3 + [ "$of_kw" != of ] && die 23 "$src_line: 'of' keyword expected, '$of_kw' given" + ;; + implementation) + test $# -ge 5 || die 28 "$src_line: too few arguments, $orig_args_cnt given, at least 8 needed" + of_kw="$1" + kind="$2" + name="$3" + shift 3 + [ "$of_kw" != of ] && die 29 "$src_line: 'of' keyword expected, '$of_kw' given" + [ "$kind" != macro ] && die 30 "$src_line: implementation only supports 'macro', '$kind' given" + kind=macro-implementation + ;; + invocation) + test $# -ge 5 || die 32 "$src_line: too few arguments, $orig_args_cnt given, at least 8 needed" + of_kw="$1" + kind="$2" + name="$3" + shift 3 + [ "$of_kw" != of ] && die 33 "$src_line: 'of' keyword expected, '$of_kw' given" + [ "$kind" != macro ] && die 34 "$src_line: invocation only supports 'macro', '$kind' given" + kind=macro-invocation + ;; + *) die 24 "$src_line: unknown KIND ($kind) to look for" ;; + esac + operator="$1" + case "$operator" in + absent) + local next_kw next_op + next_kw="$2" + in_kw="$next_kw" + next_op="$3" + if [[ "$next_kw" = or && "$next_op" = lacks ]]; then + # intentionally keeping $operator as 'absent'... + # but setting 'pattern' to something (not just '.') + shift 3 + test $# -ge 3 || die 39 "$src_line: too few parameters following 'absent or lacks' operator composition, pattern, 'in' keyword and filename needed" + pattern="$1" + in_kw="$2" + else + pattern='.' + fi + shift 2 + ;; + matches|lacks) + pattern="$2" + in_kw="$3" + shift 3 + ;; + in) + operator=matches + pattern='.' + in_kw=in + shift + ;; + *) die 25 "$src_line: unknown OPERATOR ($operator) to look for" ;; + esac + [ "$in_kw" != in ] && die 26 "$src_line: 'in' keyword expected, '$in_kw' given" + test $# -ge 1 || die 27 "$src_line: too few arguments, at least one filename expected" + + local first_decl= + if [ "$kind" = method ]; then + first_decl="$(find-struct-decl "$name" "$@")" || exit 40 + # prepare params for next lookup phase + set -- - # overwrite $@ to be single dash (-) + name="$method_name" + kind=fun + elif [[ $# = 1 && "$1" = '-' ]]; then + # avoid losing stdin provided to gen() due to redirection (<<<) + first_decl="$(cat -)" + fi + + local unifdef + unifdef=${UNIFDEF_MODE:+1} + + # lookup the NAME + local body + body="$(find-$kind-decl "$name" "$@" <<< "$first_decl")" || exit 41 + awk -v define="$define" -v pattern="$pattern" -v "$operator"=1 -v unifdef="$unifdef" ' + BEGIN { + # prepend "identifier boundary" to pattern, also append + # it, but only for patterns not ending with such already + # + # eg: "foo" -> "\bfoo\b" + # "struct foo *" -> "\bstruct foo *" + + # Note that mawk does not support "\b", so we have our + # own approximation, NI + NI = "[^A-Za-z0-9_]" # "Not an Indentifier" + + if (!match(pattern, NI "$")) + pattern = pattern "(" NI "|$)" + pattern = "(^|" NI ")" pattern + } + /./ { not_empty = 1 } + $0 ~ pattern { found = 1 } + END { + if (unifdef) { + found_fmt="-D%s\n" + missing_fmt="-U%s\n" + } else { + found_fmt="#define %s 1\n" + missing_fmt="" + } + + if (lacks && !found && not_empty || matches && found || absent && !found) + printf(found_fmt, define) + else if (missing_fmt) + printf(missing_fmt, define) + } + ' <<< "$body" +} + +# check() - Like gen, but return true/false instead of generating output +# +# syntax: +# See gen(), except do not pass a DEFINE name, or the action keyword. +function check() { + # Always run check in unifdef mode + local UNIFDEF_MODE=1 + + [[ "$(gen CHECK if "$@")" = "-DCHECK" ]] +} + +# tell if given flag is enabled in .config +# return 0 if given flag is enabled, 1 otherwise +# inputs: +# $1 - flag to check (whole word, without _MODULE suffix) +# env flag $CONFIG_FILE +# +# there are two "config" formats supported, to ease up integrators lifes +# .config (without leading #~ prefix): +#~ # CONFIG_ACPI_EC_DEBUGFS is not set +#~ CONFIG_ACPI_AC=y +#~ CONFIG_ACPI_VIDEO=m +# and autoconf.h, which would be: +#~ #define CONFIG_ACPI_AC 1 +#~ #define CONFIG_ACPI_VIDEO_MODULE 1 +function config_has() { + grep -qE "^(#define )?$1((_MODULE)? 1|=m|=y)$" "$CONFIG_FILE" +} + +# try to locate a suitable config file from KOBJ +# +# On success, the CONFIG_FILE variable will be updated to reflect the full +# path to a configuration file. +# +# Depends on KSRC being set +function find_config_file() { + local -a CSP + local file + local diagmsgs=/dev/stderr + + [ -n "${QUIET_COMPAT-}" ] && diagmsgs=/dev/null + + if ! [ -d "${KSRC-}" ]; then + return + fi + + CSP=( + "$KOBJ/include/generated/autoconf.h" + "$KOBJ/include/linux/autoconf.h" + "$KOBJ/.config" + ) + + for file in "${CSP[@]}"; do + if [ -f $file ]; then + echo >&"$diagmsgs" "using CONFIG_FILE=$file" + CONFIG_FILE=$file + return + fi + done +} diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/kcompat.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/kcompat.c new file mode 100644 index 00000000000..2d7aa1ac16a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/kcompat.c @@ -0,0 +1,3003 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 1999 - 2026 Intel Corporation */ + +#include "ixgbe.h" +#include "kcompat.h" + +/*****************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,4,8) ) || defined __VMKLNX__ +/* From lib/vsprintf.c */ +#include + +static int skip_atoi(const char **s) +{ + int i=0; + + while (isdigit(**s)) + i = i*10 + *((*s)++) - '0'; + return i; +} + +#define _kc_ZEROPAD 1 /* pad with zero */ +#define _kc_SIGN 2 /* unsigned/signed long */ +#define _kc_PLUS 4 /* show plus */ +#define _kc_SPACE 8 /* space if plus */ +#define _kc_LEFT 16 /* left justified */ +#define _kc_SPECIAL 32 /* 0x */ +#define _kc_LARGE 64 /* use 'ABCDEF' instead of 'abcdef' */ + +static char * number(char * buf, char * end, long long num, int base, int size, int precision, int type) +{ + char c,sign,tmp[66]; + const char *digits; + const char small_digits[] = "0123456789abcdefghijklmnopqrstuvwxyz"; + const char large_digits[] = "0123456789ABCDEFGHIJKLMNOPQRSTUVWXYZ"; + int i; + + digits = (type & _kc_LARGE) ? large_digits : small_digits; + if (type & _kc_LEFT) + type &= ~_kc_ZEROPAD; + if (base < 2 || base > 36) + return 0; + c = (type & _kc_ZEROPAD) ? '0' : ' '; + sign = 0; + if (type & _kc_SIGN) { + if (num < 0) { + sign = '-'; + num = -num; + size--; + } else if (type & _kc_PLUS) { + sign = '+'; + size--; + } else if (type & _kc_SPACE) { + sign = ' '; + size--; + } + } + if (type & _kc_SPECIAL) { + if (base == 16) + size -= 2; + else if (base == 8) + size--; + } + i = 0; + if (num == 0) + tmp[i++]='0'; + else while (num != 0) + tmp[i++] = digits[do_div(num,base)]; + if (i > precision) + precision = i; + size -= precision; + if (!(type&(_kc_ZEROPAD+_kc_LEFT))) { + while(size-->0) { + if (buf <= end) + *buf = ' '; + ++buf; + } + } + if (sign) { + if (buf <= end) + *buf = sign; + ++buf; + } + if (type & _kc_SPECIAL) { + if (base==8) { + if (buf <= end) + *buf = '0'; + ++buf; + } else if (base==16) { + if (buf <= end) + *buf = '0'; + ++buf; + if (buf <= end) + *buf = digits[33]; + ++buf; + } + } + if (!(type & _kc_LEFT)) { + while (size-- > 0) { + if (buf <= end) + *buf = c; + ++buf; + } + } + while (i < precision--) { + if (buf <= end) + *buf = '0'; + ++buf; + } + while (i-- > 0) { + if (buf <= end) + *buf = tmp[i]; + ++buf; + } + while (size-- > 0) { + if (buf <= end) + *buf = ' '; + ++buf; + } + return buf; +} + +int _kc_vsnprintf(char *buf, size_t size, const char *fmt, va_list args) +{ + int len; + unsigned long long num; + int i, base; + char *str, *end, c; + const char *s; + + int flags; /* flags to number() */ + + int field_width; /* width of output field */ + int precision; /* min. # of digits for integers; max + number of chars for from string */ + int qualifier; /* 'h', 'l', or 'L' for integer fields */ + /* 'z' support added 23/7/1999 S.H. */ + /* 'z' changed to 'Z' --davidm 1/25/99 */ + + str = buf; + end = buf + size - 1; + + if (end < buf - 1) { + end = ((void *) -1); + size = end - buf + 1; + } + + for (; *fmt ; ++fmt) { + if (*fmt != '%') { + if (str <= end) + *str = *fmt; + ++str; + continue; + } + + /* process flags */ + flags = 0; + repeat: + ++fmt; /* this also skips first '%' */ + switch (*fmt) { + case '-': flags |= _kc_LEFT; goto repeat; + case '+': flags |= _kc_PLUS; goto repeat; + case ' ': flags |= _kc_SPACE; goto repeat; + case '#': flags |= _kc_SPECIAL; goto repeat; + case '0': flags |= _kc_ZEROPAD; goto repeat; + } + + /* get field width */ + field_width = -1; + if (isdigit(*fmt)) + field_width = skip_atoi(&fmt); + else if (*fmt == '*') { + ++fmt; + /* it's the next argument */ + field_width = va_arg(args, int); + if (field_width < 0) { + field_width = -field_width; + flags |= _kc_LEFT; + } + } + + /* get the precision */ + precision = -1; + if (*fmt == '.') { + ++fmt; + if (isdigit(*fmt)) + precision = skip_atoi(&fmt); + else if (*fmt == '*') { + ++fmt; + /* it's the next argument */ + precision = va_arg(args, int); + } + if (precision < 0) + precision = 0; + } + + /* get the conversion qualifier */ + qualifier = -1; + if (*fmt == 'h' || *fmt == 'l' || *fmt == 'L' || *fmt =='Z') { + qualifier = *fmt; + ++fmt; + } + + /* default base */ + base = 10; + + switch (*fmt) { + case 'c': + if (!(flags & _kc_LEFT)) { + while (--field_width > 0) { + if (str <= end) + *str = ' '; + ++str; + } + } + c = (unsigned char) va_arg(args, int); + if (str <= end) + *str = c; + ++str; + while (--field_width > 0) { + if (str <= end) + *str = ' '; + ++str; + } + continue; + + case 's': + s = va_arg(args, char *); + if (!s) + s = ""; + + len = strnlen(s, precision); + + if (!(flags & _kc_LEFT)) { + while (len < field_width--) { + if (str <= end) + *str = ' '; + ++str; + } + } + for (i = 0; i < len; ++i) { + if (str <= end) + *str = *s; + ++str; ++s; + } + while (len < field_width--) { + if (str <= end) + *str = ' '; + ++str; + } + continue; + + case 'p': + if ('M' == *(fmt+1)) { + str = get_mac(str, end, va_arg(args, unsigned char *)); + fmt++; + } else { + if (field_width == -1) { + field_width = 2*sizeof(void *); + flags |= _kc_ZEROPAD; + } + str = number(str, end, + (unsigned long) va_arg(args, void *), + 16, field_width, precision, flags); + } + continue; + + case 'n': + /* FIXME: + * What does C99 say about the overflow case here? */ + if (qualifier == 'l') { + long * ip = va_arg(args, long *); + *ip = (str - buf); + } else if (qualifier == 'Z') { + size_t * ip = va_arg(args, size_t *); + *ip = (str - buf); + } else { + int * ip = va_arg(args, int *); + *ip = (str - buf); + } + continue; + + case '%': + if (str <= end) + *str = '%'; + ++str; + continue; + + /* integer number formats - set up the flags and "break" */ + case 'o': + base = 8; + break; + + case 'X': + flags |= _kc_LARGE; + case 'x': + base = 16; + break; + + case 'd': + case 'i': + flags |= _kc_SIGN; + case 'u': + break; + + default: + if (str <= end) + *str = '%'; + ++str; + if (*fmt) { + if (str <= end) + *str = *fmt; + ++str; + } else { + --fmt; + } + continue; + } + if (qualifier == 'L') + num = va_arg(args, long long); + else if (qualifier == 'l') { + num = va_arg(args, unsigned long); + if (flags & _kc_SIGN) + num = (signed long) num; + } else if (qualifier == 'Z') { + num = va_arg(args, size_t); + } else if (qualifier == 'h') { + num = (unsigned short) va_arg(args, int); + if (flags & _kc_SIGN) + num = (signed short) num; + } else { + num = va_arg(args, unsigned int); + if (flags & _kc_SIGN) + num = (signed int) num; + } + str = number(str, end, num, base, + field_width, precision, flags); + } + if (str <= end) + *str = '\0'; + else if (size > 0) + /* don't write out a null byte if the buf size is zero */ + *end = '\0'; + /* the trailing null byte doesn't count towards the total + * ++str; + */ + return str-buf; +} + +int _kc_snprintf(char * buf, size_t size, const char *fmt, ...) +{ + va_list args; + int i; + + va_start(args, fmt); + i = _kc_vsnprintf(buf,size,fmt,args); + va_end(args); + return i; +} +#endif /* < 2.4.8 */ + +/*****************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,4,13) ) + +/**************************************/ +/* PCI DMA MAPPING */ + +#if defined(CONFIG_HIGHMEM) + +#ifndef PCI_DRAM_OFFSET +#define PCI_DRAM_OFFSET 0 +#endif + +u64 +_kc_pci_map_page(struct pci_dev *dev, struct page *page, unsigned long offset, + size_t size, int direction) +{ + return (((u64) (page - mem_map) << PAGE_SHIFT) + offset + + PCI_DRAM_OFFSET); +} + +#else /* CONFIG_HIGHMEM */ + +u64 +_kc_pci_map_page(struct pci_dev *dev, struct page *page, unsigned long offset, + size_t size, int direction) +{ + return pci_map_single(dev, (void *)page_address(page) + offset, size, + direction); +} + +#endif /* CONFIG_HIGHMEM */ + +void +_kc_pci_unmap_page(struct pci_dev *dev, u64 dma_addr, size_t size, + int direction) +{ + return pci_unmap_single(dev, dma_addr, size, direction); +} + +#endif /* 2.4.13 => 2.4.3 */ + +/*****************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,4,3) ) + +/**************************************/ +/* PCI DRIVER API */ + +int +_kc_pci_set_dma_mask(struct pci_dev *dev, dma_addr_t mask) +{ + if (!pci_dma_supported(dev, mask)) + return -EIO; + dev->dma_mask = mask; + return 0; +} + +int +_kc_pci_request_regions(struct pci_dev *dev, char *res_name) +{ + int i; + + for (i = 0; i < 6; i++) { + if (pci_resource_len(dev, i) == 0) + continue; + + if (pci_resource_flags(dev, i) & IORESOURCE_IO) { + if (!request_region(pci_resource_start(dev, i), pci_resource_len(dev, i), res_name)) { + pci_release_regions(dev); + return -EBUSY; + } + } else if (pci_resource_flags(dev, i) & IORESOURCE_MEM) { + if (!request_mem_region(pci_resource_start(dev, i), pci_resource_len(dev, i), res_name)) { + pci_release_regions(dev); + return -EBUSY; + } + } + } + return 0; +} + +void +_kc_pci_release_regions(struct pci_dev *dev) +{ + int i; + + for (i = 0; i < 6; i++) { + if (pci_resource_len(dev, i) == 0) + continue; + + if (pci_resource_flags(dev, i) & IORESOURCE_IO) + release_region(pci_resource_start(dev, i), pci_resource_len(dev, i)); + + else if (pci_resource_flags(dev, i) & IORESOURCE_MEM) + release_mem_region(pci_resource_start(dev, i), pci_resource_len(dev, i)); + } +} + +/**************************************/ +/* NETWORK DRIVER API */ + +struct net_device * +_kc_alloc_etherdev(int sizeof_priv) +{ + struct net_device *dev; + int alloc_size; + + alloc_size = sizeof(*dev) + sizeof_priv + IFNAMSIZ + 31; + dev = kzalloc(alloc_size, GFP_KERNEL); + if (!dev) + return NULL; + + if (sizeof_priv) + dev->priv = (void *) (((unsigned long)(dev + 1) + 31) & ~31); + dev->name[0] = '\0'; + ether_setup(dev); + + return dev; +} + +int +_kc_is_valid_ether_addr(u8 *addr) +{ + const char zaddr[6] = { 0, }; + + return !(addr[0] & 1) && memcmp(addr, zaddr, 6); +} + +#endif /* 2.4.3 => 2.4.0 */ + +/*****************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,4,6) ) + +int +_kc_pci_set_power_state(struct pci_dev *dev, int state) +{ + return 0; +} + +int +_kc_pci_enable_wake(struct pci_dev *pdev, u32 state, int enable) +{ + return 0; +} + +#endif /* 2.4.6 => 2.4.3 */ + +/*****************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0) ) +void _kc_skb_fill_page_desc(struct sk_buff *skb, int i, struct page *page, + int off, int size) +{ + skb_frag_t *frag = &skb_shinfo(skb)->frags[i]; + frag->page = page; + frag->page_offset = off; + frag->size = size; + skb_shinfo(skb)->nr_frags = i + 1; +} + +/* + * Original Copyright: + * find_next_bit.c: fallback find next bit implementation + * + * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved. + * Written by David Howells (dhowells@redhat.com) + */ + +/** + * find_next_bit - find the next set bit in a memory region + * @addr: The address to base the search on + * @offset: The bitnumber to start searching at + * @size: The maximum size to search + */ +unsigned long find_next_bit(const unsigned long *addr, unsigned long size, + unsigned long offset) +{ + const unsigned long *p = addr + BITOP_WORD(offset); + unsigned long result = offset & ~(BITS_PER_LONG-1); + unsigned long tmp; + + if (offset >= size) + return size; + size -= result; + offset %= BITS_PER_LONG; + if (offset) { + tmp = *(p++); + tmp &= (~0UL << offset); + if (size < BITS_PER_LONG) + goto found_first; + if (tmp) + goto found_middle; + size -= BITS_PER_LONG; + result += BITS_PER_LONG; + } + while (size & ~(BITS_PER_LONG-1)) { + if ((tmp = *(p++))) + goto found_middle; + result += BITS_PER_LONG; + size -= BITS_PER_LONG; + } + if (!size) + return result; + tmp = *p; + +found_first: + tmp &= (~0UL >> (BITS_PER_LONG - size)); + if (tmp == 0UL) /* Are any bits set? */ + return result + size; /* Nope. */ +found_middle: + return result + ffs(tmp); +} + +size_t _kc_strlcpy(char *dest, const char *src, size_t size) +{ + size_t ret = strlen(src); + + if (size) { + size_t len = (ret >= size) ? size - 1 : ret; + memcpy(dest, src, len); + dest[len] = '\0'; + } + return ret; +} + +#ifndef do_div +#if BITS_PER_LONG == 32 +uint32_t __attribute__((weak)) _kc__div64_32(uint64_t *n, uint32_t base) +{ + uint64_t rem = *n; + uint64_t b = base; + uint64_t res, d = 1; + uint32_t high = rem >> 32; + + /* Reduce the thing a bit first */ + res = 0; + if (high >= base) { + high /= base; + res = (uint64_t) high << 32; + rem -= (uint64_t) (high*base) << 32; + } + + while ((int64_t)b > 0 && b < rem) { + b = b+b; + d = d+d; + } + + do { + if (rem >= b) { + rem -= b; + res += d; + } + b >>= 1; + d >>= 1; + } while (d); + + *n = res; + return rem; +} +#endif /* BITS_PER_LONG == 32 */ +#endif /* do_div */ +#endif /* 2.6.0 => 2.4.6 */ + +/*****************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,4) ) +int _kc_scnprintf(char * buf, size_t size, const char *fmt, ...) +{ + va_list args; + int i; + + va_start(args, fmt); + i = vsnprintf(buf, size, fmt, args); + va_end(args); + return (i >= size) ? (size - 1) : i; +} +#endif /* < 2.6.4 */ + +/*****************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,10) ) +DECLARE_BITMAP(_kcompat_node_online_map, MAX_NUMNODES) = {1}; +#endif /* < 2.6.10 */ + +/*****************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,13) ) +char *_kc_kstrdup(const char *s, unsigned int gfp) +{ + size_t len; + char *buf; + + if (!s) + return NULL; + + len = strlen(s) + 1; + buf = kmalloc(len, gfp); + if (buf) + memcpy(buf, s, len); + return buf; +} +#endif /* < 2.6.13 */ + +/*****************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,14) ) +void *_kc_kzalloc(size_t size, int flags) +{ + void *ret = kmalloc(size, flags); + if (ret) + memset(ret, 0, size); + return ret; +} +#endif /* <= 2.6.13 */ + +/*****************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19) ) +int _kc_skb_pad(struct sk_buff *skb, int pad) +{ + int ntail; + + /* If the skbuff is non linear tailroom is always zero.. */ + if(!skb_cloned(skb) && skb_tailroom(skb) >= pad) { + memset(skb->data+skb->len, 0, pad); + return 0; + } + + ntail = skb->data_len + pad - (skb->end - skb->tail); + if (likely(skb_cloned(skb) || ntail > 0)) { + if (pskb_expand_head(skb, 0, ntail, GFP_ATOMIC)) + goto free_skb; + } + +#ifdef MAX_SKB_FRAGS + if (skb_is_nonlinear(skb) && + !__pskb_pull_tail(skb, skb->data_len)) + goto free_skb; + +#endif + memset(skb->data + skb->len, 0, pad); + return 0; + +free_skb: + kfree_skb(skb); + return -ENOMEM; +} + +#if (!(RHEL_RELEASE_CODE && RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(5,4))) +int _kc_pci_save_state(struct pci_dev *pdev) +{ + struct adapter_struct *adapter = pci_get_drvdata(pdev); + int size = PCI_CONFIG_SPACE_LEN, i; + u16 pcie_cap_offset, pcie_link_status; + +#if ( LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0) ) + /* no ->dev for 2.4 kernels */ + WARN_ON(pdev->dev.driver_data == NULL); +#endif + pcie_cap_offset = pci_find_capability(pdev, PCI_CAP_ID_EXP); + if (pcie_cap_offset) { + if (!pci_read_config_word(pdev, + pcie_cap_offset + PCIE_LINK_STATUS, + &pcie_link_status)) + size = PCIE_CONFIG_SPACE_LEN; + } + pci_config_space_ich8lan(); +#ifdef HAVE_PCI_ERS + if (adapter->config_space == NULL) +#else + WARN_ON(adapter->config_space != NULL); +#endif + adapter->config_space = kmalloc(size, GFP_KERNEL); + if (!adapter->config_space) { + printk(KERN_ERR "Out of memory in pci_save_state\n"); + return -ENOMEM; + } + for (i = 0; i < (size / 4); i++) + pci_read_config_dword(pdev, i * 4, &adapter->config_space[i]); + return 0; +} + +void _kc_pci_restore_state(struct pci_dev *pdev) +{ + struct adapter_struct *adapter = pci_get_drvdata(pdev); + int size = PCI_CONFIG_SPACE_LEN, i; + u16 pcie_cap_offset; + u16 pcie_link_status; + + if (adapter->config_space != NULL) { + pcie_cap_offset = pci_find_capability(pdev, PCI_CAP_ID_EXP); + if (pcie_cap_offset && + !pci_read_config_word(pdev, + pcie_cap_offset + PCIE_LINK_STATUS, + &pcie_link_status)) + size = PCIE_CONFIG_SPACE_LEN; + + pci_config_space_ich8lan(); + for (i = 0; i < (size / 4); i++) + pci_write_config_dword(pdev, i * 4, adapter->config_space[i]); +#ifndef HAVE_PCI_ERS + kfree(adapter->config_space); + adapter->config_space = NULL; +#endif + } +} +#endif /* !(RHEL_RELEASE_CODE >= RHEL 5.4) */ + +#ifdef HAVE_PCI_ERS +void _kc_free_netdev(struct net_device *netdev) +{ + struct adapter_struct *adapter = netdev_priv(netdev); + + kfree(adapter->config_space); +#ifdef CONFIG_SYSFS + if (netdev->reg_state == NETREG_UNINITIALIZED) { + kfree((char *)netdev - netdev->padded); + } else { + BUG_ON(netdev->reg_state != NETREG_UNREGISTERED); + netdev->reg_state = NETREG_RELEASED; + class_device_put(&netdev->class_dev); + } +#else + kfree((char *)netdev - netdev->padded); +#endif +} +#endif + +void *_kc_kmemdup(const void *src, size_t len, unsigned gfp) +{ + void *p; + + p = kzalloc(len, gfp); + if (p) + memcpy(p, src, len); + return p; +} +#endif /* <= 2.6.19 */ + +/*****************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21) ) +struct pci_dev *_kc_netdev_to_pdev(struct net_device *netdev) +{ + return ((struct adapter_struct *)netdev_priv(netdev))->pdev; +} +#endif /* < 2.6.21 */ + +/*****************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,22) ) +/* hexdump code taken from lib/hexdump.c */ +static void _kc_hex_dump_to_buffer(const void *buf, size_t len, int rowsize, + int groupsize, unsigned char *linebuf, + size_t linebuflen, bool ascii) +{ + const u8 *ptr = buf; + u8 ch; + int j, lx = 0; + int ascii_column; + + if (rowsize != 16 && rowsize != 32) + rowsize = 16; + + if (!len) + goto nil; + if (len > rowsize) /* limit to one line at a time */ + len = rowsize; + if ((len % groupsize) != 0) /* no mixed size output */ + groupsize = 1; + + switch (groupsize) { + case 8: { + const u64 *ptr8 = buf; + int ngroups = len / groupsize; + + for (j = 0; j < ngroups; j++) + lx += scnprintf((char *)(linebuf + lx), linebuflen - lx, + "%s%16.16llx", j ? " " : "", + (unsigned long long)*(ptr8 + j)); + ascii_column = 17 * ngroups + 2; + break; + } + + case 4: { + const u32 *ptr4 = buf; + int ngroups = len / groupsize; + + for (j = 0; j < ngroups; j++) + lx += scnprintf((char *)(linebuf + lx), linebuflen - lx, + "%s%8.8x", j ? " " : "", *(ptr4 + j)); + ascii_column = 9 * ngroups + 2; + break; + } + + case 2: { + const u16 *ptr2 = buf; + int ngroups = len / groupsize; + + for (j = 0; j < ngroups; j++) + lx += scnprintf((char *)(linebuf + lx), linebuflen - lx, + "%s%4.4x", j ? " " : "", *(ptr2 + j)); + ascii_column = 5 * ngroups + 2; + break; + } + + default: + for (j = 0; (j < len) && (lx + 3) <= linebuflen; j++) { + ch = ptr[j]; + linebuf[lx++] = hex_asc(ch >> 4); + linebuf[lx++] = hex_asc(ch & 0x0f); + linebuf[lx++] = ' '; + } + if (j) + lx--; + + ascii_column = 3 * rowsize + 2; + break; + } + if (!ascii) + goto nil; + + while (lx < (linebuflen - 1) && lx < (ascii_column - 1)) + linebuf[lx++] = ' '; + for (j = 0; (j < len) && (lx + 2) < linebuflen; j++) + linebuf[lx++] = (isascii(ptr[j]) && isprint(ptr[j])) ? ptr[j] + : '.'; +nil: + linebuf[lx++] = '\0'; +} + +void _kc_print_hex_dump(const char *level, + const char *prefix_str, int prefix_type, + int rowsize, int groupsize, + const void *buf, size_t len, bool ascii) +{ + const u8 *ptr = buf; + int i, linelen, remaining = len; + unsigned char linebuf[200]; + + if (rowsize != 16 && rowsize != 32) + rowsize = 16; + + for (i = 0; i < len; i += rowsize) { + linelen = min(remaining, rowsize); + remaining -= rowsize; + _kc_hex_dump_to_buffer(ptr + i, linelen, rowsize, groupsize, + linebuf, sizeof(linebuf), ascii); + + switch (prefix_type) { + case DUMP_PREFIX_ADDRESS: + printk("%s%s%*p: %s\n", level, prefix_str, + (int)(2 * sizeof(void *)), ptr + i, linebuf); + break; + case DUMP_PREFIX_OFFSET: + printk("%s%s%.8x: %s\n", level, prefix_str, i, linebuf); + break; + default: + printk("%s%s%s\n", level, prefix_str, linebuf); + break; + } + } +} + +#endif /* < 2.6.22 */ + +/*****************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,23) ) +int ixgbe_dcb_netlink_register(void) +{ + return 0; +} + +int ixgbe_dcb_netlink_unregister(void) +{ + return 0; +} + +int ixgbe_copy_dcb_cfg(struct ixgbe_adapter __always_unused *adapter, int __always_unused tc_max) +{ + return 0; +} +#endif /* < 2.6.23 */ + +/*****************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24) ) +#ifdef NAPI +struct net_device *napi_to_poll_dev(const struct napi_struct *napi) +{ + struct adapter_q_vector *q_vector = container_of(napi, + struct adapter_q_vector, + napi); + return &q_vector->poll_dev; +} + +int __kc_adapter_clean(struct net_device *netdev, int *budget) +{ + int work_done; + int work_to_do = min(*budget, netdev->quota); + /* kcompat.h netif_napi_add puts napi struct in "fake netdev->priv" */ + struct napi_struct *napi = netdev->priv; + work_done = napi->poll(napi, work_to_do); + *budget -= work_done; + netdev->quota -= work_done; + return (work_done >= work_to_do) ? 1 : 0; +} +#endif /* NAPI */ +#endif /* <= 2.6.24 */ + +/*****************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,26) ) +void _kc_pci_disable_link_state(struct pci_dev *pdev, int state) +{ + struct pci_dev *parent = pdev->bus->self; + u16 link_state; + int pos; + + if (!parent) + return; + + pos = pci_find_capability(parent, PCI_CAP_ID_EXP); + if (pos) { + pci_read_config_word(parent, pos + PCI_EXP_LNKCTL, &link_state); + link_state &= ~state; + pci_write_config_word(parent, pos + PCI_EXP_LNKCTL, link_state); + } +} +#endif /* < 2.6.26 */ + +/*****************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,27) ) +#ifdef HAVE_TX_MQ +void _kc_netif_tx_stop_all_queues(struct net_device *netdev) +{ + struct adapter_struct *adapter = netdev_priv(netdev); + int i; + + netif_stop_queue(netdev); + if (netif_is_multiqueue(netdev)) + for (i = 0; i < adapter->num_tx_queues; i++) + netif_stop_subqueue(netdev, i); +} +void _kc_netif_tx_wake_all_queues(struct net_device *netdev) +{ + struct adapter_struct *adapter = netdev_priv(netdev); + int i; + + netif_wake_queue(netdev); + if (netif_is_multiqueue(netdev)) + for (i = 0; i < adapter->num_tx_queues; i++) + netif_wake_subqueue(netdev, i); +} +void _kc_netif_tx_start_all_queues(struct net_device *netdev) +{ + struct adapter_struct *adapter = netdev_priv(netdev); + int i; + + netif_start_queue(netdev); + if (netif_is_multiqueue(netdev)) + for (i = 0; i < adapter->num_tx_queues; i++) + netif_start_subqueue(netdev, i); +} +#endif /* HAVE_TX_MQ */ + +void __kc_warn_slowpath(const char *file, int line, const char *fmt, ...) +{ + va_list args; + + printk(KERN_WARNING "------------[ cut here ]------------\n"); + printk(KERN_WARNING "WARNING: at %s:%d \n", file, line); + va_start(args, fmt); + vprintk(fmt, args); + va_end(args); + + dump_stack(); +} +#endif /* __VMKLNX__ */ + +/*****************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,28) ) + +int +_kc_pci_prepare_to_sleep(struct pci_dev *dev) +{ + pci_power_t target_state; + int error; + + target_state = pci_choose_state(dev, PMSG_SUSPEND); + + pci_enable_wake(dev, target_state, true); + + error = pci_set_power_state(dev, target_state); + + if (error) + pci_enable_wake(dev, target_state, false); + + return error; +} + +int +_kc_pci_wake_from_d3(struct pci_dev *dev, bool enable) +{ + int err; + + err = pci_enable_wake(dev, PCI_D3cold, enable); + if (err) + goto out; + + err = pci_enable_wake(dev, PCI_D3hot, enable); + +out: + return err; +} +#endif /* < 2.6.28 */ + +/*****************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,29) ) +static void __kc_pci_set_main(struct pci_dev *pdev, bool enable) +{ + u16 old_cmd, cmd; + + pci_read_config_word(pdev, PCI_COMMAND, &old_cmd); + if (enable) + cmd = old_cmd | PCI_COMMAND_MASTER; + else + cmd = old_cmd & ~PCI_COMMAND_MASTER; + if (cmd != old_cmd) { + dev_dbg(pci_dev_to_dev(pdev), "%s bus DMA control\n", + enable ? "enabling" : "disabling"); + pci_write_config_word(pdev, PCI_COMMAND, cmd); + } +#if ( LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,7) ) + pdev->is_busmaster = enable; +#endif +} + +void _kc_pci_clear_main(struct pci_dev *dev) +{ + __kc_pci_set_main(dev, false); +} +#endif /* < 2.6.29 */ + +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,34) ) +#if (RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(6,0)) +int _kc_pci_num_vf(struct pci_dev __maybe_unused *dev) +{ + int num_vf = 0; +#ifdef CONFIG_PCI_IOV + struct pci_dev *vfdev; + + /* loop through all ethernet devices starting at PF dev */ + vfdev = pci_get_class(PCI_CLASS_NETWORK_ETHERNET << 8, NULL); + while (vfdev) { + if (vfdev->is_virtfn && vfdev->physfn == dev) + num_vf++; + + vfdev = pci_get_class(PCI_CLASS_NETWORK_ETHERNET << 8, vfdev); + } + +#endif + return num_vf; +} +#endif /* RHEL_RELEASE_CODE */ +#endif /* < 2.6.34 */ + +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,35) ) +#ifdef HAVE_TX_MQ +#if (!(RHEL_RELEASE_CODE && RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(6,0))) +#ifndef CONFIG_NETDEVICES_MULTIQUEUE +int _kc_netif_set_real_num_tx_queues(struct net_device *dev, unsigned int txq) +{ + unsigned int real_num = dev->real_num_tx_queues; + struct Qdisc *qdisc; + int i; + + if (txq < 1 || txq > dev->num_tx_queues) + return -EINVAL; + + else if (txq > real_num) + dev->real_num_tx_queues = txq; + else if (txq < real_num) { + dev->real_num_tx_queues = txq; + for (i = txq; i < dev->num_tx_queues; i++) { + qdisc = netdev_get_tx_queue(dev, i)->qdisc; + if (qdisc) { + spin_lock_bh(qdisc_lock(qdisc)); + qdisc_reset(qdisc); + spin_unlock_bh(qdisc_lock(qdisc)); + } + } + } + + return 0; +} +#endif /* CONFIG_NETDEVICES_MULTIQUEUE */ +#endif /* !(RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(6,0)) */ +#endif /* HAVE_TX_MQ */ + +ssize_t _kc_simple_write_to_buffer(void *to, size_t available, loff_t *ppos, + const void __user *from, size_t count) +{ + loff_t pos = *ppos; + size_t res; + + if (pos < 0) + return -EINVAL; + if (pos >= available || !count) + return 0; + if (count > available - pos) + count = available - pos; + res = copy_from_user(to + pos, from, count); + if (res == count) + return -EFAULT; + count -= res; + *ppos = pos + count; + return count; +} + +#endif /* < 2.6.35 */ + +/*****************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,36) ) +static const u32 _kc_flags_dup_features = + (ETH_FLAG_LRO | ETH_FLAG_NTUPLE | ETH_FLAG_RXHASH); + +u32 _kc_ethtool_op_get_flags(struct net_device *dev) +{ + return dev->features & _kc_flags_dup_features; +} + +int _kc_ethtool_op_set_flags(struct net_device *dev, u32 data, u32 supported) +{ + if (data & ~supported) + return -EINVAL; + + dev->features = ((dev->features & ~_kc_flags_dup_features) | + (data & _kc_flags_dup_features)); + return 0; +} +#endif /* < 2.6.36 */ + +/******************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,39) ) +#if (!(RHEL_RELEASE_CODE && RHEL_RELEASE_CODE > RHEL_RELEASE_VERSION(6,0))) +#ifdef HAVE_NETDEV_SELECT_QUEUE +#include +#include + +u16 ___kc_skb_tx_hash(struct net_device *dev, const struct sk_buff *skb, + u16 num_tx_queues) +{ + u32 hash; + u16 qoffset = 0; + u16 qcount = num_tx_queues; + + if (skb_rx_queue_recorded(skb)) { + hash = skb_get_rx_queue(skb); + while (unlikely(hash >= num_tx_queues)) + hash -= num_tx_queues; + return hash; + } + + if (netdev_get_num_tc(dev)) { + struct adapter_struct *kc_adapter = netdev_priv(dev); + + if (skb->priority == TC_PRIO_CONTROL) { + qoffset = kc_adapter->dcb_tc - 1; + } else { + qoffset = skb->vlan_tci; + qoffset &= IXGBE_TX_FLAGS_VLAN_PRIO_MASK; + qoffset >>= 13; + } + + qcount = kc_adapter->ring_feature[RING_F_RSS].indices; + qoffset *= qcount; + } + + if (skb->sk && skb->sk->sk_hash) + hash = skb->sk->sk_hash; + else +#ifdef NETIF_F_RXHASH + hash = (__force u16) skb->protocol ^ skb->rxhash; +#else + hash = skb->protocol; +#endif + + hash = jhash_1word(hash, _kc_hashrnd); + + return (u16) (((u64) hash * qcount) >> 32) + qoffset; +} +#endif /* HAVE_NETDEV_SELECT_QUEUE */ + +u8 _kc_netdev_get_num_tc(struct net_device *dev) +{ + struct adapter_struct *kc_adapter = netdev_priv(dev); + if (kc_adapter->flags & IXGBE_FLAG_DCB_ENABLED) + return kc_adapter->dcb_tc; + else + return 0; +} + +int _kc_netdev_set_num_tc(struct net_device *dev, u8 num_tc) +{ + struct adapter_struct *kc_adapter = netdev_priv(dev); + + if (num_tc > IXGBE_DCB_MAX_TRAFFIC_CLASS) + return -EINVAL; + + kc_adapter->dcb_tc = num_tc; + + return 0; +} + +u8 _kc_netdev_get_prio_tc_map(struct net_device __maybe_unused *dev, u8 __maybe_unused up) +{ + struct adapter_struct *kc_adapter = netdev_priv(dev); + + return ixgbe_dcb_get_tc_from_up(&kc_adapter->dcb_cfg, 0, up); +} + +#endif /* !(RHEL_RELEASE_CODE > RHEL_RELEASE_VERSION(6,0)) */ +#endif /* < 2.6.39 */ + +/******************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(3,4,0) ) +void _kc_skb_add_rx_frag(struct sk_buff *skb, int i, struct page *page, + int off, int size, unsigned int truesize) +{ + skb_fill_page_desc(skb, i, page, off, size); + skb->len += size; + skb->data_len += size; + skb->truesize += truesize; +} + +#if !(SLE_VERSION_CODE && SLE_VERSION_CODE >= SLE_VERSION(11,3,0)) +int _kc_simple_open(struct inode *inode, struct file *file) +{ + if (inode->i_private) + file->private_data = inode->i_private; + + return 0; +} +#endif /* SLE_VERSION < 11,3,0 */ + +#endif /* < 3.4.0 */ + +/******************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(3,7,0) ) +static inline int __kc_pcie_cap_version(struct pci_dev *dev) +{ + int pos; + u16 reg16; + + pos = pci_find_capability(dev, PCI_CAP_ID_EXP); + if (!pos) + return 0; + pci_read_config_word(dev, pos + PCI_EXP_FLAGS, ®16); + return reg16 & PCI_EXP_FLAGS_VERS; +} + +static inline bool __kc_pcie_cap_has_devctl(const struct pci_dev __always_unused *dev) +{ + return true; +} + +static inline bool __kc_pcie_cap_has_lnkctl(struct pci_dev *dev) +{ + int type = pci_pcie_type(dev); + + return __kc_pcie_cap_version(dev) > 1 || + type == PCI_EXP_TYPE_ROOT_PORT || + type == PCI_EXP_TYPE_ENDPOINT || + type == PCI_EXP_TYPE_LEG_END; +} + +static inline bool __kc_pcie_cap_has_sltctl(struct pci_dev *dev) +{ + int type = pci_pcie_type(dev); + int pos; + u16 pcie_flags_reg; + + pos = pci_find_capability(dev, PCI_CAP_ID_EXP); + if (!pos) + return false; + pci_read_config_word(dev, pos + PCI_EXP_FLAGS, &pcie_flags_reg); + + return __kc_pcie_cap_version(dev) > 1 || + type == PCI_EXP_TYPE_ROOT_PORT || + (type == PCI_EXP_TYPE_DOWNSTREAM && + pcie_flags_reg & PCI_EXP_FLAGS_SLOT); +} + +static inline bool __kc_pcie_cap_has_rtctl(struct pci_dev *dev) +{ + int type = pci_pcie_type(dev); + + return __kc_pcie_cap_version(dev) > 1 || + type == PCI_EXP_TYPE_ROOT_PORT || + type == PCI_EXP_TYPE_RC_EC; +} + +static bool __kc_pcie_capability_reg_implemented(struct pci_dev *dev, int pos) +{ + if (!pci_is_pcie(dev)) + return false; + + switch (pos) { + case PCI_EXP_FLAGS_TYPE: + return true; + case PCI_EXP_DEVCAP: + case PCI_EXP_DEVCTL: + case PCI_EXP_DEVSTA: + return __kc_pcie_cap_has_devctl(dev); + case PCI_EXP_LNKCAP: + case PCI_EXP_LNKCTL: + case PCI_EXP_LNKSTA: + return __kc_pcie_cap_has_lnkctl(dev); + case PCI_EXP_SLTCAP: + case PCI_EXP_SLTCTL: + case PCI_EXP_SLTSTA: + return __kc_pcie_cap_has_sltctl(dev); + case PCI_EXP_RTCTL: + case PCI_EXP_RTCAP: + case PCI_EXP_RTSTA: + return __kc_pcie_cap_has_rtctl(dev); + case PCI_EXP_DEVCAP2: + case PCI_EXP_DEVCTL2: + case PCI_EXP_LNKCAP2: + case PCI_EXP_LNKCTL2: + case PCI_EXP_LNKSTA2: + return __kc_pcie_cap_version(dev) > 1; + default: + return false; + } +} + +/* + * Note that these accessor functions are only for the "PCI Express + * Capability" (see PCIe spec r3.0, sec 7.8). They do not apply to the + * other "PCI Express Extended Capabilities" (AER, VC, ACS, MFVC, etc.) + */ +int __kc_pcie_capability_read_word(struct pci_dev *dev, int pos, u16 *val) +{ + int ret; + + *val = 0; + if (pos & 1) + return -EINVAL; + + if (__kc_pcie_capability_reg_implemented(dev, pos)) { + ret = pci_read_config_word(dev, pci_pcie_cap(dev) + pos, val); + /* + * Reset *val to 0 if pci_read_config_word() fails, it may + * have been written as 0xFFFF if hardware error happens + * during pci_read_config_word(). + */ + if (ret) + *val = 0; + return ret; + } + + /* + * For Functions that do not implement the Slot Capabilities, + * Slot Status, and Slot Control registers, these spaces must + * be hardwired to 0b, with the exception of the Presence Detect + * State bit in the Slot Status register of Downstream Ports, + * which must be hardwired to 1b. (PCIe Base Spec 3.0, sec 7.8) + */ + if (pci_is_pcie(dev) && pos == PCI_EXP_SLTSTA && + pci_pcie_type(dev) == PCI_EXP_TYPE_DOWNSTREAM) { + *val = PCI_EXP_SLTSTA_PDS; + } + + return 0; +} + +int __kc_pcie_capability_read_dword(struct pci_dev *dev, int pos, u32 *val) +{ + int ret; + + *val = 0; + if (pos & 3) + return -EINVAL; + + if (__kc_pcie_capability_reg_implemented(dev, pos)) { + ret = pci_read_config_dword(dev, pci_pcie_cap(dev) + pos, val); + /* + * Reset *val to 0 if pci_read_config_dword() fails, it may + * have been written as 0xFFFFFFFF if hardware error happens + * during pci_read_config_dword(). + */ + if (ret) + *val = 0; + return ret; + } + + if (pci_is_pcie(dev) && pos == PCI_EXP_SLTSTA && + pci_pcie_type(dev) == PCI_EXP_TYPE_DOWNSTREAM) { + *val = PCI_EXP_SLTSTA_PDS; + } + + return 0; +} + +int __kc_pcie_capability_write_word(struct pci_dev *dev, int pos, u16 val) +{ + if (pos & 1) + return -EINVAL; + + if (!__kc_pcie_capability_reg_implemented(dev, pos)) + return 0; + + return pci_write_config_word(dev, pci_pcie_cap(dev) + pos, val); +} + +int __kc_pcie_capability_clear_and_set_word(struct pci_dev *dev, int pos, + u16 clear, u16 set) +{ + int ret; + u16 val; + + ret = __kc_pcie_capability_read_word(dev, pos, &val); + if (!ret) { + val &= ~clear; + val |= set; + ret = __kc_pcie_capability_write_word(dev, pos, val); + } + + return ret; +} + +int __kc_pcie_capability_clear_word(struct pci_dev *dev, int pos, + u16 clear) +{ + return __kc_pcie_capability_clear_and_set_word(dev, pos, clear, 0); +} +#endif /* < 3.7.0 */ + +/******************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(3,9,0) ) +#ifdef CONFIG_XPS +#if NR_CPUS < 64 +#define _KC_MAX_XPS_CPUS NR_CPUS +#else +#define _KC_MAX_XPS_CPUS 64 +#endif + +/* + * netdev_queue sysfs structures and functions. + */ +struct _kc_netdev_queue_attribute { + struct attribute attr; + ssize_t (*show)(struct netdev_queue *queue, + struct _kc_netdev_queue_attribute *attr, char *buf); + ssize_t (*store)(struct netdev_queue *queue, + struct _kc_netdev_queue_attribute *attr, const char *buf, size_t len); +}; + +#define to_kc_netdev_queue_attr(_attr) container_of(_attr, \ + struct _kc_netdev_queue_attribute, attr) + +int __kc_netif_set_xps_queue(struct net_device *dev, const struct cpumask *mask, + u16 index) +{ + struct netdev_queue *txq = netdev_get_tx_queue(dev, index); +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,38) ) + /* Redhat requires some odd extended netdev structures */ + struct netdev_tx_queue_extended *txq_ext = + netdev_extended(dev)->_tx_ext + index; + struct kobj_type *ktype = txq_ext->kobj.ktype; +#else + struct kobj_type *ktype = txq->kobj.ktype; +#endif + struct _kc_netdev_queue_attribute *xps_attr; + struct attribute *attr = NULL; + int i, len, err; +#define _KC_XPS_BUFLEN (DIV_ROUND_UP(_KC_MAX_XPS_CPUS, 32) * 9) + char buf[_KC_XPS_BUFLEN]; + + if (!ktype) + return -ENOMEM; + + /* attempt to locate the XPS attribute in the Tx queue */ + for (i = 0; (attr = ktype->default_attrs[i]); i++) { + if (!strcmp("xps_cpus", attr->name)) + break; + } + + /* if we did not find it return an error */ + if (!attr) + return -EINVAL; + + /* copy the mask into a string */ + len = bitmap_scnprintf(buf, _KC_XPS_BUFLEN, + cpumask_bits(mask), _KC_MAX_XPS_CPUS); + if (!len) + return -ENOMEM; + + xps_attr = to_kc_netdev_queue_attr(attr); + + /* Store the XPS value using the SYSFS store call */ + err = xps_attr->store(txq, xps_attr, buf, len); + + /* we only had an error on err < 0 */ + return (err < 0) ? err : 0; +} +#endif /* CONFIG_XPS */ +#ifdef HAVE_NETDEV_SELECT_QUEUE +static inline int kc_get_xps_queue(struct net_device *dev, struct sk_buff *skb) +{ +#ifdef CONFIG_XPS + struct xps_dev_maps *dev_maps; + struct xps_map *map; + int queue_index = -1; + + rcu_read_lock(); +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,38) ) + /* Redhat requires some odd extended netdev structures */ + dev_maps = rcu_dereference(netdev_extended(dev)->xps_maps); +#else + dev_maps = rcu_dereference(dev->xps_maps); +#endif + if (dev_maps) { + map = rcu_dereference( + dev_maps->cpu_map[raw_smp_processor_id()]); + if (map) { + if (map->len == 1) + queue_index = map->queues[0]; + else { + u32 hash; + if (skb->sk && skb->sk->sk_hash) + hash = skb->sk->sk_hash; + else + hash = (__force u16) skb->protocol ^ + skb->rxhash; + hash = jhash_1word(hash, _kc_hashrnd); + queue_index = map->queues[ + ((u64)hash * map->len) >> 32]; + } + if (unlikely(queue_index >= dev->real_num_tx_queues)) + queue_index = -1; + } + } + rcu_read_unlock(); + + return queue_index; +#else + struct adapter_struct *kc_adapter = netdev_priv(dev); + int queue_index = -1; + + if (kc_adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) { + queue_index = skb_rx_queue_recorded(skb) ? + skb_get_rx_queue(skb) : + smp_processor_id(); + while (unlikely(queue_index >= dev->real_num_tx_queues)) + queue_index -= dev->real_num_tx_queues; + return queue_index; + } + + return -1; +#endif +} + +u16 __kc_netdev_pick_tx(struct net_device *dev, struct sk_buff *skb) +{ + struct sock *sk = skb->sk; + int queue_index = sk_tx_queue_get(sk); + int new_index; + + if (queue_index >= 0 && queue_index < dev->real_num_tx_queues) { +#ifdef CONFIG_XPS + if (!skb->ooo_okay) +#endif + return queue_index; + } + + new_index = kc_get_xps_queue(dev, skb); + if (new_index < 0) + new_index = skb_tx_hash(dev, skb); + + if (queue_index != new_index && sk) { + struct dst_entry *dst = + rcu_dereference(sk->sk_dst_cache); + + if (dst && skb_dst(skb) == dst) + sk_tx_queue_set(sk, new_index); + + } + + return new_index; +} + +#endif /* HAVE_NETDEV_SELECT_QUEUE */ +#endif /* 3.9.0 */ + +/*****************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(3,10,0) ) +#ifdef CONFIG_PCI_IOV +int __kc_pci_vfs_assigned(struct pci_dev __maybe_unused *dev) +{ + unsigned int vfs_assigned = 0; +#ifdef HAVE_PCI_DEV_FLAGS_ASSIGNED + int pos; + struct pci_dev *vfdev; + unsigned short dev_id; + + /* only search if we are a PF */ + if (!dev->is_physfn) + return 0; + + /* find SR-IOV capability */ + pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV); + if (!pos) + return 0; + + /* + * determine the device ID for the VFs, the vendor ID will be the + * same as the PF so there is no need to check for that one + */ + pci_read_config_word(dev, pos + PCI_SRIOV_VF_DID, &dev_id); + + /* loop through all the VFs to see if we own any that are assigned */ + vfdev = pci_get_device(dev->vendor, dev_id, NULL); + while (vfdev) { + /* + * It is considered assigned if it is a virtual function with + * our dev as the physical function and the assigned bit is set + */ + if (vfdev->is_virtfn && (vfdev->physfn == dev) && + (vfdev->dev_flags & PCI_DEV_FLAGS_ASSIGNED)) + vfs_assigned++; + + vfdev = pci_get_device(dev->vendor, dev_id, vfdev); + } + +#endif /* HAVE_PCI_DEV_FLAGS_ASSIGNED */ + return vfs_assigned; +} + +#endif /* CONFIG_PCI_IOV */ +#endif /* 3.10.0 */ + +static const unsigned char __maybe_unused pcie_link_speed[] = { + PCI_SPEED_UNKNOWN, /* 0 */ + PCIE_SPEED_2_5GT, /* 1 */ + PCIE_SPEED_5_0GT, /* 2 */ + PCIE_SPEED_8_0GT, /* 3 */ + PCIE_SPEED_16_0GT, /* 4 */ + PCI_SPEED_UNKNOWN, /* 5 */ + PCI_SPEED_UNKNOWN, /* 6 */ + PCI_SPEED_UNKNOWN, /* 7 */ + PCI_SPEED_UNKNOWN, /* 8 */ + PCI_SPEED_UNKNOWN, /* 9 */ + PCI_SPEED_UNKNOWN, /* A */ + PCI_SPEED_UNKNOWN, /* B */ + PCI_SPEED_UNKNOWN, /* C */ + PCI_SPEED_UNKNOWN, /* D */ + PCI_SPEED_UNKNOWN, /* E */ + PCI_SPEED_UNKNOWN /* F */ +}; + +/*****************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(3,12,0) ) +int __kc_pcie_get_minimum_link(struct pci_dev *dev, enum pci_bus_speed *speed, + enum pcie_link_width *width) +{ + + *speed = PCI_SPEED_UNKNOWN; + *width = PCIE_LNK_WIDTH_UNKNOWN; + + while (dev) { + u16 lnksta; + enum pci_bus_speed next_speed; + enum pcie_link_width next_width; + int ret = pcie_capability_read_word(dev, PCI_EXP_LNKSTA, &lnksta); + + if (ret) + return ret; + + next_speed = pcie_link_speed[lnksta & PCI_EXP_LNKSTA_CLS]; + next_width = (lnksta & PCI_EXP_LNKSTA_NLW) >> + PCI_EXP_LNKSTA_NLW_SHIFT; + + if (next_speed < *speed) + *speed = next_speed; + + if (next_width < *width) + *width = next_width; + + dev = dev->bus->self; + } + + return 0; +} + +#if (RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(6,7)) +int _kc_pci_wait_for_pending_transaction(struct pci_dev *dev) +{ + int i; + u16 status; + + /* Wait for Transaction Pending bit clean */ + for (i = 0; i < 4; i++) { + if (i) + msleep((1 << (i - 1)) * 100); + + pcie_capability_read_word(dev, PCI_EXP_DEVSTA, &status); + if (!(status & PCI_EXP_DEVSTA_TRPND)) + return 1; + } + + return 0; +} +#endif /* crs_timeout) { + printk(KERN_WARNING "pci %04x:%02x:%02x.%d: not " + "responding\n", pci_domain_nr(bus), + bus->number, PCI_SLOT(devfn), + PCI_FUNC(devfn)); + return false; + } + } + + return true; +} + +bool _kc_pci_device_is_present(struct pci_dev *pdev) +{ + u32 v; + + return _kc_pci_bus_read_dev_vendor_id(pdev->bus, pdev->devfn, &v, 0); +} +#endif /* nexthdr; + bool found; + +#define __KC_IP6_FH_F_FRAG BIT(0) +#define __KC_IP6_FH_F_AUTH BIT(1) +#define __KC_IP6_FH_F_SKIP_RH BIT(2) + + if (fragoff) + *fragoff = 0; + + if (*offset) { + struct ipv6hdr _ip6, *ip6; + + ip6 = skb_header_pointer(skb, *offset, sizeof(_ip6), &_ip6); + if (!ip6 || (ip6->version != 6)) { + printk(KERN_ERR "IPv6 header not found\n"); + return -EBADMSG; + } + start = *offset + sizeof(struct ipv6hdr); + nexthdr = ip6->nexthdr; + } + + do { + struct ipv6_opt_hdr _hdr, *hp; + unsigned int hdrlen; + found = (nexthdr == target); + + if ((!ipv6_ext_hdr(nexthdr)) || nexthdr == NEXTHDR_NONE) { + if (target < 0 || found) + break; + return -ENOENT; + } + + hp = skb_header_pointer(skb, start, sizeof(_hdr), &_hdr); + if (!hp) + return -EBADMSG; + + if (nexthdr == NEXTHDR_ROUTING) { + struct ipv6_rt_hdr _rh, *rh; + + rh = skb_header_pointer(skb, start, sizeof(_rh), + &_rh); + if (!rh) + return -EBADMSG; + + if (flags && (*flags & __KC_IP6_FH_F_SKIP_RH) && + rh->segments_left == 0) + found = false; + } + + if (nexthdr == NEXTHDR_FRAGMENT) { + unsigned short _frag_off; + __be16 *fp; + + if (flags) /* Indicate that this is a fragment */ + *flags |= __KC_IP6_FH_F_FRAG; + fp = skb_header_pointer(skb, + start+offsetof(struct frag_hdr, + frag_off), + sizeof(_frag_off), + &_frag_off); + if (!fp) + return -EBADMSG; + + _frag_off = ntohs(*fp) & ~0x7; + if (_frag_off) { + if (target < 0 && + ((!ipv6_ext_hdr(hp->nexthdr)) || + hp->nexthdr == NEXTHDR_NONE)) { + if (fragoff) + *fragoff = _frag_off; + return hp->nexthdr; + } + return -ENOENT; + } + hdrlen = 8; + } else if (nexthdr == NEXTHDR_AUTH) { + if (flags && (*flags & __KC_IP6_FH_F_AUTH) && (target < 0)) + break; + hdrlen = (hp->hdrlen + 2) << 2; + } else + hdrlen = ipv6_optlen(hp); + + if (!found) { + nexthdr = hp->nexthdr; + start += hdrlen; + } + } while (!found); + + *offset = start; + return nexthdr; +} + +int __kc_pci_enable_msix_range(struct pci_dev *dev, struct msix_entry *entries, + int minvec, int maxvec) +{ + int nvec = maxvec; + int rc; + + if (maxvec < minvec) + return -ERANGE; + + do { + rc = pci_enable_msix(dev, entries, nvec); + if (rc < 0) { + return rc; + } else if (rc > 0) { + if (rc < minvec) + return -ENOSPC; + nvec = rc; + } + } while (rc); + + return nvec; +} +#endif /* 3.14.0 */ + +#ifdef NEED_DEVM_KSTRDUP +char *_kc_devm_kstrdup(struct device *dev, const char *s, gfp_t gfp) +{ + size_t size; + char *buf; + + if (!s) + return NULL; + + size = strlen(s) + 1; + buf = devm_kzalloc(dev, size, gfp); + if (buf) + memcpy(buf, s, size); + return buf; +} +#endif /* NEED_DEVM_KSTRDUP */ + +#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,15,0)) +void __kc_netdev_rss_key_fill(void *buffer, size_t len) +{ + /* Set of random keys generated using kernel random number generator */ + static const u8 seed[NETDEV_RSS_KEY_LEN] = {0xE6, 0xFA, 0x35, 0x62, + 0x95, 0x12, 0x3E, 0xA3, 0xFB, 0x46, 0xC1, 0x5F, + 0xB1, 0x43, 0x82, 0x5B, 0x6A, 0x49, 0x50, 0x95, + 0xCD, 0xAB, 0xD8, 0x11, 0x8F, 0xC5, 0xBD, 0xBC, + 0x6A, 0x4A, 0xB2, 0xD4, 0x1F, 0xFE, 0xBC, 0x41, + 0xBF, 0xAC, 0xB2, 0x9A, 0x8F, 0x70, 0xE9, 0x2A, + 0xD7, 0xB2, 0x80, 0xB6, 0x5B, 0xAA, 0x9D, 0x20}; + + BUG_ON(len > NETDEV_RSS_KEY_LEN); + memcpy(buffer, seed, len); +} +#endif /* 3.15.0 */ + +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(3,16,0) ) +#ifdef HAVE_SET_RX_MODE +#ifdef NETDEV_HW_ADDR_T_UNICAST +int __kc_hw_addr_sync_dev(struct netdev_hw_addr_list *list, + struct net_device *dev, + int (*sync)(struct net_device *, const unsigned char *), + int (*unsync)(struct net_device *, const unsigned char *)) +{ + struct netdev_hw_addr *ha, *tmp; + int err; + + /* first go through and flush out any stale entries */ + list_for_each_entry_safe(ha, tmp, &list->list, list) { +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(3,10,0) ) + if (!ha->synced || ha->refcount != 1) +#else + if (!ha->sync_cnt || ha->refcount != 1) +#endif + continue; + + if (unsync && unsync(dev, ha->addr)) + continue; + + list_del_rcu(&ha->list); + kfree_rcu(ha, rcu_head); + list->count--; + } + + /* go through and sync new entries to the list */ + list_for_each_entry_safe(ha, tmp, &list->list, list) { +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(3,10,0) ) + if (ha->synced) +#else + if (ha->sync_cnt) +#endif + continue; + + err = sync(dev, ha->addr); + if (err) + return err; +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(3,10,0) ) + ha->synced = true; +#else + ha->sync_cnt++; +#endif + ha->refcount++; + } + + return 0; +} + +void __kc_hw_addr_unsync_dev(struct netdev_hw_addr_list *list, + struct net_device *dev, + int (*unsync)(struct net_device *, const unsigned char *)) +{ + struct netdev_hw_addr *ha, *tmp; + + list_for_each_entry_safe(ha, tmp, &list->list, list) { +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(3,10,0) ) + if (!ha->synced) +#else + if (!ha->sync_cnt) +#endif + continue; + + if (unsync && unsync(dev, ha->addr)) + continue; + +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(3,10,0) ) + ha->synced = false; +#else + ha->sync_cnt--; +#endif + if (--ha->refcount) + continue; + + list_del_rcu(&ha->list); + kfree_rcu(ha, rcu_head); + list->count--; + } +} + +#endif /* NETDEV_HW_ADDR_T_UNICAST */ +#ifndef NETDEV_HW_ADDR_T_MULTICAST +int __kc_dev_addr_sync_dev(struct dev_addr_list **list, int *count, + struct net_device *dev, + int (*sync)(struct net_device *, const unsigned char *), + int (*unsync)(struct net_device *, const unsigned char *)) +{ + struct dev_addr_list *da, **next = list; + int err; + + /* first go through and flush out any stale entries */ + while ((da = *next) != NULL) { + if (da->da_synced && da->da_users == 1) { + if (!unsync || !unsync(dev, da->da_addr)) { + *next = da->next; + kfree(da); + (*count)--; + continue; + } + } + next = &da->next; + } + + /* go through and sync new entries to the list */ + for (da = *list; da != NULL; da = da->next) { + if (da->da_synced) + continue; + + err = sync(dev, da->da_addr); + if (err) + return err; + + da->da_synced++; + da->da_users++; + } + + return 0; +} + +void __kc_dev_addr_unsync_dev(struct dev_addr_list **list, int *count, + struct net_device *dev, + int (*unsync)(struct net_device *, const unsigned char *)) +{ + struct dev_addr_list *da; + + while ((da = *list) != NULL) { + if (da->da_synced) { + if (!unsync || !unsync(dev, da->da_addr)) { + da->da_synced--; + if (--da->da_users == 0) { + *list = da->next; + kfree(da); + (*count)--; + continue; + } + } + } + list = &da->next; + } +} +#endif /* NETDEV_HW_ADDR_T_MULTICAST */ +#endif /* HAVE_SET_RX_MODE */ +#endif /* 3.16.0 */ + +#ifdef NEED_DEVM_KMEMDUP +void *_kc_devm_kmemdup(struct device *dev, const void *src, size_t len, + gfp_t gfp) +{ + void *p; + + p = devm_kzalloc(dev, len, gfp); + if (p) + memcpy(p, src, len); + + return p; +} +#endif /* NEED_DEVM_KMEMDUP */ + +/******************************************************************************/ +#if ((LINUX_VERSION_CODE < KERNEL_VERSION(3,17,0)) && \ + (RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(7,5))) +#endif /* <3.17.0 && RHEL_RELEASE_CODE < RHEL7.5 */ + +/******************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(3,18,0) ) +#ifndef NO_PTP_SUPPORT +static void __kc_sock_efree(struct sk_buff *skb) +{ + sock_put(skb->sk); +} + +struct sk_buff *__kc_skb_clone_sk(struct sk_buff *skb) +{ + struct sock *sk = skb->sk; + struct sk_buff *clone; + + if (!sk || !atomic_inc_not_zero(&sk->sk_refcnt)) + return NULL; + + clone = skb_clone(skb, GFP_ATOMIC); + if (!clone) { + sock_put(sk); + return NULL; + } + + clone->sk = sk; + clone->destructor = __kc_sock_efree; + + return clone; +} + +void __kc_skb_complete_tx_timestamp(struct sk_buff *skb, + struct skb_shared_hwtstamps *hwtstamps) +{ + struct sock_exterr_skb *serr; + struct sock *sk = skb->sk; + int err; + + sock_hold(sk); + + *skb_hwtstamps(skb) = *hwtstamps; + + serr = SKB_EXT_ERR(skb); + memset(serr, 0, sizeof(*serr)); + serr->ee.ee_errno = ENOMSG; + serr->ee.ee_origin = SO_EE_ORIGIN_TIMESTAMPING; + + err = sock_queue_err_skb(sk, skb); + if (err) + kfree_skb(skb); + + sock_put(sk); +} +#endif /* NO_PTP_SUPPORT */ +#endif /* < 3.18.0 */ + +/******************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(3,19,0) ) +#ifdef HAVE_NET_GET_RANDOM_ONCE +static u8 __kc_netdev_rss_key[NETDEV_RSS_KEY_LEN]; + +void __kc_netdev_rss_key_fill(void *buffer, size_t len) +{ + BUG_ON(len > sizeof(__kc_netdev_rss_key)); + net_get_random_once(__kc_netdev_rss_key, sizeof(__kc_netdev_rss_key)); + memcpy(buffer, __kc_netdev_rss_key, len); +} +#endif + +int _kc_bitmap_print_to_pagebuf(bool list, char *buf, + const unsigned long *maskp, + int nmaskbits) +{ + ptrdiff_t len = PTR_ALIGN(buf + PAGE_SIZE - 1, PAGE_SIZE) - buf - 2; + int n = 0; + + if (len > 1) { + n = list ? bitmap_scnlistprintf(buf, len, maskp, nmaskbits) : + bitmap_scnprintf(buf, len, maskp, nmaskbits); + buf[n++] = '\n'; + buf[n] = '\0'; + } + return n; +} +#endif + +/******************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(4,1,0) ) +#if !((RHEL_RELEASE_CODE > RHEL_RELEASE_VERSION(6,8) && RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(7,0)) && \ + (RHEL_RELEASE_CODE > RHEL_RELEASE_VERSION(7,2)) && \ + (SLE_VERSION_CODE > SLE_VERSION(12,1,0))) +unsigned int _kc_cpumask_local_spread(unsigned int i, int node) +{ + int cpu; + + /* Wrap: we always want a cpu. */ + i %= num_online_cpus(); + +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,28) ) + /* Kernels prior to 2.6.28 do not have for_each_cpu or + * cpumask_of_node, so just use for_each_online_cpu() + */ + for_each_online_cpu(cpu) + if (i-- == 0) + return cpu; + + return 0; +#else + if (node == -1) { + for_each_cpu(cpu, cpu_online_mask) + if (i-- == 0) + return cpu; + } else { + /* NUMA first. */ + for_each_cpu_and(cpu, cpumask_of_node(node), cpu_online_mask) + if (i-- == 0) + return cpu; + + for_each_cpu(cpu, cpu_online_mask) { + /* Skip NUMA nodes, done above. */ + if (cpumask_test_cpu(cpu, cpumask_of_node(node))) + continue; + + if (i-- == 0) + return cpu; + } + } +#endif /* KERNEL_VERSION >= 2.6.28 */ + BUG(); +} +#endif +#endif + +/******************************************************************************/ +#if (LINUX_VERSION_CODE < KERNEL_VERSION(4,3,0)) +#if (!(RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,4)) && \ + !(SLE_VERSION_CODE >= SLE_VERSION(12,2,0))) +/** + * _kc_skb_flow_dissect_flow_keys - parse SKB to fill _kc_flow_keys + * @skb: SKB used to fille _kc_flow_keys + * @flow: _kc_flow_keys to set with SKB fields + * @flags: currently unused flags + * + * The purpose of using kcompat for this function is so the caller doesn't have + * to care about which kernel version they are on, which prevents a larger than + * normal #ifdef mess created by using a HAVE_* flag for this case. This is also + * done for 4.2 kernels to simplify calling skb_flow_dissect_flow_keys() + * because in 4.2 kernels skb_flow_dissect_flow_keys() exists, but only has 2 + * arguments. Recent kernels have skb_flow_dissect_flow_keys() that has 3 + * arguments. + * + * The caller needs to understand that this function was only implemented as a + * bare-minimum replacement for recent versions of skb_flow_dissect_flow_keys() + * and this function is in no way similar to skb_flow_dissect_flow_keys(). An + * example use can be found in the ice driver, specifically ice_arfs.c. + * + * This function is treated as a allowlist of supported fields the SKB can + * parse. If new functionality is added make sure to keep this format (i.e. only + * check for fields that are explicity wanted). + * + * Current allowlist: + * + * TCPv4, TCPv6, UDPv4, UDPv6 + * + * If any unexpected protocol or other field is found this function memsets the + * flow passed in back to 0 and returns false. Otherwise the flow is populated + * and returns true. + */ +bool +_kc_skb_flow_dissect_flow_keys(const struct sk_buff *skb, + struct _kc_flow_keys *flow, + unsigned int __always_unused flags) +{ + memset(flow, 0, sizeof(*flow)); + + flow->basic.n_proto = skb->protocol; + switch (flow->basic.n_proto) { + case htons(ETH_P_IP): + flow->basic.ip_proto = ip_hdr(skb)->protocol; + flow->addrs.v4addrs.src = ip_hdr(skb)->saddr; + flow->addrs.v4addrs.dst = ip_hdr(skb)->daddr; + break; + case htons(ETH_P_IPV6): + flow->basic.ip_proto = ipv6_hdr(skb)->nexthdr; + memcpy(&flow->addrs.v6addrs.src, &ipv6_hdr(skb)->saddr, + sizeof(struct in6_addr)); + memcpy(&flow->addrs.v6addrs.dst, &ipv6_hdr(skb)->daddr, + sizeof(struct in6_addr)); + break; + default: + netdev_dbg(skb->dev, "%s: Unsupported/unimplemented layer 3 protocol %04x\n", __func__, htons(flow->basic.n_proto)); + goto unsupported; + } + + switch (flow->basic.ip_proto) { + case IPPROTO_TCP: + { + struct tcphdr *tcph; + + tcph = tcp_hdr(skb); + flow->ports.src = tcph->source; + flow->ports.dst = tcph->dest; + break; + } + case IPPROTO_UDP: + { + struct udphdr *udph; + + udph = udp_hdr(skb); + flow->ports.src = udph->source; + flow->ports.dst = udph->dest; + break; + } + default: + netdev_dbg(skb->dev, "%s: Unsupported/unimplemented layer 4 protocol %02x\n", __func__, flow->basic.ip_proto); + return false; + } + + return true; + +unsupported: + memset(flow, 0, sizeof(*flow)); + return false; +} +#endif /* ! >= RHEL7.4 && ! >= SLES12.2 */ +#endif /* 4.3.0 */ + +/******************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(4,5,0) ) +#if (!(RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,3))) +#ifdef CONFIG_SPARC +#include +#include +#endif +int _kc_eth_platform_get_mac_address(struct device *dev __maybe_unused, + u8 *mac_addr __maybe_unused) +{ +#if (((LINUX_VERSION_CODE < KERNEL_VERSION(3,1,0)) && defined(CONFIG_OF) && \ + !defined(HAVE_STRUCT_DEVICE_OF_NODE) || !defined(CONFIG_OF)) && \ + !defined(CONFIG_SPARC)) + return -ENODEV; +#else + const unsigned char *addr; + struct device_node *dp; + + if (dev_is_pci(dev)) + dp = pci_device_to_OF_node(to_pci_dev(dev)); + else +#if defined(HAVE_STRUCT_DEVICE_OF_NODE) && defined(CONFIG_OF) + dp = dev->of_node; +#else + dp = NULL; +#endif + + addr = NULL; + if (dp) + addr = of_get_mac_address(dp); +#ifdef CONFIG_SPARC + /* Kernel hasn't implemented arch_get_platform_mac_address, but we + * should handle the SPARC case here since it was supported + * originally. This is replaced by arch_get_platform_mac_address() + * upstream. + */ + if (!addr) + addr = idprom->id_ethaddr; +#endif + if (!addr) + return -ENODEV; + + ether_addr_copy(mac_addr, addr); + return 0; +#endif +} +#endif /* !(RHEL_RELEASE >= 7.3) */ +#endif /* < 4.5.0 */ + +/*****************************************************************************/ +#if (LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0)) +int _kc_kstrtobool(const char *s, bool *res) +{ + if (!s) + return -EINVAL; + + switch (s[0]) { + case 'y': + case 'Y': + case '1': + *res = true; + return 0; + case 'n': + case 'N': + case '0': + *res = false; + return 0; + case 'o': + case 'O': + switch (s[1]) { + case 'n': + case 'N': + *res = true; + return 0; + case 'f': + case 'F': + *res = false; + return 0; + default: + break; + } + break; + default: + break; + } + + return -EINVAL; +} +#endif /* < 4.6.0 */ + +/*****************************************************************************/ +#if ((LINUX_VERSION_CODE < KERNEL_VERSION(4,14,0)) || \ + (SLE_VERSION_CODE && (SLE_VERSION_CODE <= SLE_VERSION(12,3,0))) || \ + (RHEL_RELEASE_CODE && (RHEL_RELEASE_CODE <= RHEL_RELEASE_VERSION(7,5)))) +const char *_kc_phy_speed_to_str(int speed) +{ + switch (speed) { + case SPEED_10: + return "10Mbps"; + case SPEED_100: + return "100Mbps"; + case SPEED_1000: + return "1Gbps"; + case SPEED_2500: + return "2.5Gbps"; + case SPEED_5000: + return "5Gbps"; + case SPEED_10000: + return "10Gbps"; + case SPEED_14000: + return "14Gbps"; + case SPEED_20000: + return "20Gbps"; + case SPEED_25000: + return "25Gbps"; + case SPEED_40000: + return "40Gbps"; + case SPEED_50000: + return "50Gbps"; + case SPEED_56000: + return "56Gbps"; +#ifdef SPEED_100000 + case SPEED_100000: + return "100Gbps"; +#endif +#ifdef SPEED_200000 + case SPEED_200000: + return "200Gbps"; +#endif + case SPEED_UNKNOWN: + return "Unknown"; + default: + return "Unsupported (update phy-core.c)"; + } +} +#endif /* (LINUX < 4.14.0) || (SLES <= 12.3.0) || (RHEL <= 7.5) */ + +/******************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(4,15,0) ) +void _kc_ethtool_intersect_link_masks(struct ethtool_link_ksettings *dst, + struct ethtool_link_ksettings *src) +{ + unsigned int size = BITS_TO_LONGS(__ETHTOOL_LINK_MODE_MASK_NBITS); + unsigned int idx = 0; + + for (; idx < size; idx++) { + dst->link_modes.supported[idx] &= + src->link_modes.supported[idx]; + dst->link_modes.advertising[idx] &= + src->link_modes.advertising[idx]; + } +} +#endif /* 4.15.0 */ + +/*****************************************************************************/ +#if (LINUX_VERSION_CODE < KERNEL_VERSION(4,17,0)) +/* PCIe link information */ +#define PCIE_SPEED2STR(speed) \ + ((speed) == PCIE_SPEED_16_0GT ? "16 GT/s" : \ + (speed) == PCIE_SPEED_8_0GT ? "8 GT/s" : \ + (speed) == PCIE_SPEED_5_0GT ? "5 GT/s" : \ + (speed) == PCIE_SPEED_2_5GT ? "2.5 GT/s" : \ + "Unknown speed") + +/* PCIe speed to Mb/s reduced by encoding overhead */ +#define PCIE_SPEED2MBS_ENC(speed) \ + ((speed) == PCIE_SPEED_16_0GT ? 16000*128/130 : \ + (speed) == PCIE_SPEED_8_0GT ? 8000*128/130 : \ + (speed) == PCIE_SPEED_5_0GT ? 5000*8/10 : \ + (speed) == PCIE_SPEED_2_5GT ? 2500*8/10 : \ + 0) + +static u32 +_kc_pcie_bandwidth_available(struct pci_dev *dev, + struct pci_dev **limiting_dev, + enum pci_bus_speed *speed, + enum pcie_link_width *width) +{ + u16 lnksta; + enum pci_bus_speed next_speed; + enum pcie_link_width next_width; + u32 bw, next_bw; + + if (speed) + *speed = PCI_SPEED_UNKNOWN; + if (width) + *width = PCIE_LNK_WIDTH_UNKNOWN; + + bw = 0; + + while (dev) { + pcie_capability_read_word(dev, PCI_EXP_LNKSTA, &lnksta); + + next_speed = pcie_link_speed[lnksta & PCI_EXP_LNKSTA_CLS]; + next_width = (lnksta & PCI_EXP_LNKSTA_NLW) >> + PCI_EXP_LNKSTA_NLW_SHIFT; + + next_bw = next_width * PCIE_SPEED2MBS_ENC(next_speed); + + /* Check if current device limits the total bandwidth */ + if (!bw || next_bw <= bw) { + bw = next_bw; + + if (limiting_dev) + *limiting_dev = dev; + if (speed) + *speed = next_speed; + if (width) + *width = next_width; + } + + dev = pci_upstream_bridge(dev); + } + + return bw; +} + +static enum pci_bus_speed _kc_pcie_get_speed_cap(struct pci_dev *dev) +{ + u32 lnkcap2, lnkcap; + + /* + * PCIe r4.0 sec 7.5.3.18 recommends using the Supported Link + * Speeds Vector in Link Capabilities 2 when supported, falling + * back to Max Link Speed in Link Capabilities otherwise. + */ + pcie_capability_read_dword(dev, PCI_EXP_LNKCAP2, &lnkcap2); + if (lnkcap2) { /* PCIe r3.0-compliant */ + if (lnkcap2 & PCI_EXP_LNKCAP2_SLS_16_0GB) + return PCIE_SPEED_16_0GT; + else if (lnkcap2 & PCI_EXP_LNKCAP2_SLS_8_0GB) + return PCIE_SPEED_8_0GT; + else if (lnkcap2 & PCI_EXP_LNKCAP2_SLS_5_0GB) + return PCIE_SPEED_5_0GT; + else if (lnkcap2 & PCI_EXP_LNKCAP2_SLS_2_5GB) + return PCIE_SPEED_2_5GT; + return PCI_SPEED_UNKNOWN; + } + + pcie_capability_read_dword(dev, PCI_EXP_LNKCAP, &lnkcap); + if (lnkcap) { + if (lnkcap & PCI_EXP_LNKCAP_SLS_16_0GB) + return PCIE_SPEED_16_0GT; + else if (lnkcap & PCI_EXP_LNKCAP_SLS_8_0GB) + return PCIE_SPEED_8_0GT; + else if (lnkcap & PCI_EXP_LNKCAP_SLS_5_0GB) + return PCIE_SPEED_5_0GT; + else if (lnkcap & PCI_EXP_LNKCAP_SLS_2_5GB) + return PCIE_SPEED_2_5GT; + } + + return PCI_SPEED_UNKNOWN; +} + +static enum pcie_link_width _kc_pcie_get_width_cap(struct pci_dev *dev) +{ + u32 lnkcap; + + pcie_capability_read_dword(dev, PCI_EXP_LNKCAP, &lnkcap); + if (lnkcap) + return (lnkcap & PCI_EXP_LNKCAP_MLW) >> 4; + + return PCIE_LNK_WIDTH_UNKNOWN; +} + +static u32 +_kc_pcie_bandwidth_capable(struct pci_dev *dev, enum pci_bus_speed *speed, + enum pcie_link_width *width) +{ + *speed = _kc_pcie_get_speed_cap(dev); + *width = _kc_pcie_get_width_cap(dev); + + if (*speed == PCI_SPEED_UNKNOWN || *width == PCIE_LNK_WIDTH_UNKNOWN) + return 0; + + return *width * PCIE_SPEED2MBS_ENC(*speed); +} + +void _kc_pcie_print_link_status(struct pci_dev *dev) { + enum pcie_link_width width, width_cap; + enum pci_bus_speed speed, speed_cap; + struct pci_dev *limiting_dev = NULL; + u32 bw_avail, bw_cap; + + bw_cap = _kc_pcie_bandwidth_capable(dev, &speed_cap, &width_cap); + bw_avail = _kc_pcie_bandwidth_available(dev, &limiting_dev, &speed, + &width); + + if (bw_avail >= bw_cap) + pci_info(dev, "%u.%03u Gb/s available PCIe bandwidth (%s x%d link)\n", + bw_cap / 1000, bw_cap % 1000, + PCIE_SPEED2STR(speed_cap), width_cap); + else + pci_info(dev, "%u.%03u Gb/s available PCIe bandwidth, limited by %s x%d link at %s (capable of %u.%03u Gb/s with %s x%d link)\n", + bw_avail / 1000, bw_avail % 1000, + PCIE_SPEED2STR(speed), width, + limiting_dev ? pci_name(limiting_dev) : "", + bw_cap / 1000, bw_cap % 1000, + PCIE_SPEED2STR(speed_cap), width_cap); +} +#endif /* 4.17.0 */ + +#ifdef NEED_FLOW_BLOCK_CB_SETUP_SIMPLE +#ifdef HAVE_TC_CB_AND_SETUP_QDISC_MQPRIO +int _kc_flow_block_cb_setup_simple(struct flow_block_offload *f, + struct list_head __always_unused *driver_list, + tc_setup_cb_t *cb, + void *cb_ident, void *cb_priv, + bool ingress_only) +{ + if (ingress_only && + f->binder_type != TCF_BLOCK_BINDER_TYPE_CLSACT_INGRESS) + return -EOPNOTSUPP; + + /* Note: Upstream has driver_block_list, but older kernels do not */ + switch (f->command) { + case TC_BLOCK_BIND: +#ifdef HAVE_TCF_BLOCK_CB_REGISTER_EXTACK + return tcf_block_cb_register(f->block, cb, cb_ident, cb_priv, + f->extack); +#else + return tcf_block_cb_register(f->block, cb, cb_ident, cb_priv); +#endif + case TC_BLOCK_UNBIND: + tcf_block_cb_unregister(f->block, cb, cb_ident); + return 0; + default: + return -EOPNOTSUPP; + } +} +#endif /* HAVE_TC_CB_AND_SETUP_QDISC_MQPRIO */ +#endif /* NEED_FLOW_BLOCK_CB_SETUP_SIMPLE */ + +/*****************************************************************************/ +#if (LINUX_VERSION_CODE < KERNEL_VERSION(5,7,0)) +u64 _kc_pci_get_dsn(struct pci_dev *dev) +{ + u32 dword; + u64 dsn; + int pos; + + pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_DSN); + if (!pos) + return 0; + + /* + * The Device Serial Number is two dwords offset 4 bytes from the + * capability position. The specification says that the first dword is + * the lower half, and the second dword is the upper half. + */ + pos += 4; + pci_read_config_dword(dev, pos, &dword); + dsn = (u64)dword; + pci_read_config_dword(dev, pos + 4, &dword); + dsn |= ((u64)dword) << 32; + + return dsn; +} +#endif /* 5.7.0 */ + +#ifdef NEED_DEVM_KVASPRINTF +char *devm_kvasprintf(struct device *dev, gfp_t gfp, const char *fmt, + va_list ap) +{ + unsigned int len; + char *p; + va_list aq; + + va_copy(aq, ap); + len = vsnprintf(NULL, 0, fmt, aq); + va_end(aq); + + p = devm_kmalloc(dev, len + 1, gfp); + if (!p) + return NULL; + + vsnprintf(p, len + 1, fmt, ap); + + return p; +} +#endif /* NEED_DEVM_KVASPRINTF */ + +#ifdef NEED_DEVM_KASPRINTF +char *devm_kasprintf(struct device *dev, gfp_t gfp, const char *fmt, ...) +{ + va_list ap; + char *p; + + va_start(ap, fmt); + p = devm_kvasprintf(dev, gfp, fmt, ap); + va_end(ap); + + return p; +} +#endif /* NEED_DEVM_KASPRINTF */ + +#ifdef NEED_PCI_IOV_VF_ID +#ifdef CONFIG_PCI_IOV +/* + * Below function needs to access pci_sriov offset and stride. Since + * pci_sriov structure is defined in drivers/pci/pci.h which can not + * be included as linux kernel header file, the structure definition + * is not globally visible. + * As a result, one copy of structure definition is added. Since the + * definition is a copy, you need to make sure the kernel you want + * to backport must have exactly the same pci_sriov definition as the + * copy, otherwise you'll access wrong field offset and value. + */ + +/* Single Root I/O Virtualization */ +struct pci_sriov { + int pos; /* Capability position */ + int nres; /* Number of resources */ + u32 cap; /* SR-IOV Capabilities */ + u16 ctrl; /* SR-IOV Control */ + u16 total_VFs; /* Total VFs associated with the PF */ + u16 initial_VFs; /* Initial VFs associated with the PF */ + u16 num_VFs; /* Number of VFs available */ + u16 offset; /* First VF Routing ID offset */ + u16 stride; /* Following VF stride */ + u16 vf_device; /* VF device ID */ + u32 pgsz; /* Page size for BAR alignment */ + u8 link; /* Function Dependency Link */ + u8 max_VF_buses; /* Max buses consumed by VFs */ + u16 driver_max_VFs; /* Max num VFs driver supports */ + struct pci_dev *dev; /* Lowest numbered PF */ + struct pci_dev *self; /* This PF */ + u32 cfg_size; /* VF config space size */ + u32 class; /* VF device */ + u8 hdr_type; /* VF header type */ + u16 subsystem_vendor; /* VF subsystem vendor */ + u16 subsystem_device; /* VF subsystem device */ + resource_size_t barsz[PCI_SRIOV_NUM_BARS]; /* VF BAR size */ + bool drivers_autoprobe; /* Auto probing of VFs by driver */ +}; + +int _kc_pci_iov_vf_id(struct pci_dev *dev) +{ + struct pci_dev *pf; + + if (!dev->is_virtfn) + return -EINVAL; + + pf = pci_physfn(dev); + return (((dev->bus->number << 8) + dev->devfn) - + ((pf->bus->number << 8) + pf->devfn + pf->sriov->offset)) / + pf->sriov->stride; +} +#endif /* CONFIG_PCI_IOV */ +#endif /* NEED_PCI_IOV_VF_ID */ + +#ifdef NEED_MUL_U64_U64_DIV_U64 +u64 mul_u64_u64_div_u64(u64 a, u64 b, u64 c) +{ + u64 res = 0, div, rem; + int shift; + + /* can a * b overflow ? */ + if (ilog2(a) + ilog2(b) > 62) { + /* + * (b * a) / c is equal to + * + * (b / c) * a + + * (b % c) * a / c + * + * if nothing overflows. Can the 1st multiplication + * overflow? Yes, but we do not care: this can only + * happen if the end result can't fit in u64 anyway. + * + * So the code below does + * + * res = (b / c) * a; + * b = b % c; + */ + div = div64_u64_rem(b, c, &rem); + res = div * a; + b = rem; + + shift = ilog2(a) + ilog2(b) - 62; + if (shift > 0) { + /* drop precision */ + b >>= shift; + c >>= shift; + if (!c) + return res; + } + } + + return res + div64_u64(a * b, c); +} +#endif /* NEED_MUL_U64_U64_DIV_U64 */ + +#ifdef NEED_ETHTOOL_SPRINTF +void ethtool_sprintf(u8 **data, const char *fmt, ...) +{ + va_list args; + + va_start(args, fmt); + vsnprintf(*data, ETH_GSTRING_LEN, fmt, args); + va_end(args); + + *data += ETH_GSTRING_LEN; +} +#endif /* NEED_ETHTOOL_SPRINTF */ + +#ifdef NEED_SYSFS_EMIT +int sysfs_emit(char *buf, const char *fmt, ...) +{ + va_list args; + int len; + + if (WARN(!buf || offset_in_page(buf), + "invalid %s: buf:%p\n", __func__, buf)) + return 0; + + va_start(args, fmt); + len = vscnprintf(buf, PAGE_SIZE, fmt, args); + va_end(args); + + return len; +} +#endif /* NEED_SYSFS_EMIT */ + +#ifndef HAVE_ETHTOOL_KEEE +void ethtool_convert_legacy_u32_to_link_mode(unsigned long *dst, + u32 legacy_u32) +{ + bitmap_zero(dst, __ETHTOOL_LINK_MODE_MASK_NBITS); + dst[0] = legacy_u32; +} + +bool ethtool_convert_link_mode_to_legacy_u32(u32 *legacy_u32, + const unsigned long *src) +{ + *legacy_u32 = src[0]; + return find_next_bit(src, __ETHTOOL_LINK_MODE_MASK_NBITS, 32) == + __ETHTOOL_LINK_MODE_MASK_NBITS; +} + +void eee_to_keee(struct ethtool_keee *keee, + const struct ethtool_eee *eee) +{ + memset(keee, 0, sizeof(*keee)); + + keee->eee_enabled = eee->eee_enabled; + keee->tx_lpi_enabled = eee->tx_lpi_enabled; + keee->tx_lpi_timer = eee->tx_lpi_timer; + + ethtool_convert_legacy_u32_to_link_mode(keee->supported, + eee->supported); + ethtool_convert_legacy_u32_to_link_mode(keee->advertised, + eee->advertised); + ethtool_convert_legacy_u32_to_link_mode(keee->lp_advertised, + eee->lp_advertised); +} + +bool ethtool_eee_use_linkmodes(const struct ethtool_keee *eee) +{ +#if (RHEL_RELEASE_CODE && (RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(8,0))) + return !linkmode_empty(eee->supported); +#else + return false; +#endif /* RH7.9 */ +} + +void keee_to_eee(struct ethtool_eee *eee, + const struct ethtool_keee *keee) +{ + bool overflow; + + memset(eee, 0, sizeof(*eee)); + + eee->eee_active = keee->eee_active; + eee->eee_enabled = keee->eee_enabled; + eee->tx_lpi_enabled = keee->tx_lpi_enabled; + eee->tx_lpi_timer = keee->tx_lpi_timer; + + overflow = !ethtool_convert_link_mode_to_legacy_u32(&eee->supported, + keee->supported); + ethtool_convert_link_mode_to_legacy_u32(&eee->advertised, + keee->advertised); + ethtool_convert_link_mode_to_legacy_u32(&eee->lp_advertised, + keee->lp_advertised); + if (overflow) + pr_warn("Ethtool ioctl interface doesn't support passing EEE linkmodes beyond bit 32\n"); +} +#endif /* !HAVE_ETHTOOL_KEEE */ + +#ifdef NEED_PCI_DISABLE_PTM +#if defined(HAVE_STRUCT_PCI_DEV_PTM_ENABLED) && defined(CONFIG_PCIE_PTM) +static void __pci_disable_ptm(struct pci_dev *dev) +{ +#if defined(HAVE_STRUCT_PCI_DEV_PTM_CAP) + u16 ptm = dev->ptm_cap; + u32 ctrl; + + if (!ptm) + return; + + pci_read_config_dword(dev, ptm + PCI_PTM_CTRL, &ctrl); + ctrl &= ~(PCI_PTM_CTRL_ENABLE | PCI_PTM_CTRL_ROOT); + pci_write_config_dword(dev, ptm + PCI_PTM_CTRL, ctrl); +#else + return; +#endif /* HAVE_STRUCT_PCI_DEV_PTM_CAP */ +} +#endif /* HAVE_STRUCT_PCI_DEV_PTM_ENABLED && CONFIG_PCIE_PTM */ + +/** + * pci_disable_ptm() - Disable Precision Time Measurement + * @dev: PCI device + * + * Disable Precision Time Measurement for @dev. + */ +void pci_disable_ptm(struct pci_dev *dev) +{ +#if defined(HAVE_STRUCT_PCI_DEV_PTM_ENABLED) && defined(CONFIG_PCIE_PTM) + if (dev->ptm_enabled) { + __pci_disable_ptm(dev); + dev->ptm_enabled = 0; + } +#else + return; +#endif /* HAVE_STRUCT_PCI_DEV_PTM_ENABLED && CONFIG_PCIE_PTM */ +} +#endif /* NEED_PCI_DISABLE_PTM */ diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/kcompat.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/kcompat.h new file mode 100644 index 00000000000..9b5d167c843 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/kcompat.h @@ -0,0 +1,6932 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 1999 - 2026 Intel Corporation */ + +#ifndef _KCOMPAT_H_ +#define _KCOMPAT_H_ + +#ifndef LINUX_VERSION_CODE +#include +#else +#define KERNEL_VERSION(a,b,c) (((a) << 16) + ((b) << 8) + (c)) +#endif + +#ifdef __LINUX_COMPILER_H +#error "kcompat.h must be included prior to kernel headers" +#endif + +#ifndef GCC_VERSION +#define GCC_VERSION (__GNUC__ * 10000 \ + + __GNUC_MINOR__ * 100 \ + + __GNUC_PATCHLEVEL__) +#endif /* GCC_VERSION */ + +/* as GCC_VERSION yields 40201 for any modern clang (checked on clang 7 & 13) + * we want other means to add workarounds for "old GCC" */ +#ifdef __clang__ +#define GCC_IS_BELOW(x) 0 +#else +#define GCC_IS_BELOW(x) (GCC_VERSION < (x)) +#endif + +/* + * upstream commit 4eb6bd55cfb2 ("compiler.h: drop fallback overflow checkers") + * removed bunch of code for builitin overflow fallback implementations, that + * we need for gcc prior to 5.1 + */ +#if !GCC_IS_BELOW(50100) +#ifndef COMPILER_HAS_GENERIC_BUILTIN_OVERFLOW +#define COMPILER_HAS_GENERIC_BUILTIN_OVERFLOW 1 +#endif +#endif /* GCC_VERSION >= 50100 */ + +/* Headers that must be before the rest, as they build like-current kerrnel + * infra for all other COMPAT and CORE code. + */ +#include "kcompat_generated_defs.h" +#include "kcompat_overflow.h" +#include "kcompat_gcc.h" +/* end of must-be-really-first headers */ + +#include "kcompat_cleanup.h" + +#ifndef HAVE_XARRAY_API +#include "kcompat_xarray.h" +#endif /* !HAVE_XARRAY_API */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#ifdef HAVE_LINUX_REFCOUNT_TYPES_HEADER +#include +#elif defined(HAVE_LINUX_REFCOUNT_HEADER) +#include +#endif /* HAVE_LINUX_REFCOUNT_TYPES_HEADER */ + +#ifndef IEEE_8021QAZ_APP_SEL_DSCP +#define IEEE_8021QAZ_APP_SEL_DSCP 5 +#endif + +#ifndef NSEC_PER_MSEC +#define NSEC_PER_MSEC 1000000L +#endif +#include +/* UTS_RELEASE is in a different header starting in kernel 2.6.18 */ +#ifndef UTS_RELEASE +/* utsrelease.h changed locations in 2.6.33 */ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,33) ) +#include +#else +#include +#endif +#endif + +/* NAPI enable/disable flags here */ +#define NAPI + +#define adapter_struct ixgbe_adapter +#define adapter_q_vector ixgbe_q_vector + +/* and finally set defines so that the code sees the changes */ +#ifdef NAPI +#else +#endif /* NAPI */ + +/* Dynamic LTR and deeper C-State support disable/enable */ + +/* packet split disable/enable */ +#ifdef DISABLE_PACKET_SPLIT +#ifndef CONFIG_IXGBE_DISABLE_PACKET_SPLIT +#define CONFIG_IXGBE_DISABLE_PACKET_SPLIT +#endif +#endif /* DISABLE_PACKET_SPLIT */ + +/* MSI compatibility code for all kernels and drivers */ +#ifdef DISABLE_PCI_MSI +#undef CONFIG_PCI_MSI +#endif +#ifndef CONFIG_PCI_MSI +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,8) ) +struct msix_entry { + u16 vector; /* kernel uses to write allocated vector */ + u16 entry; /* driver uses to specify entry, OS writes */ +}; +#endif +#undef pci_enable_msi +#define pci_enable_msi(a) -ENOTSUPP +#undef pci_disable_msi +#define pci_disable_msi(a) do {} while (0) +#undef pci_enable_msix +#define pci_enable_msix(a, b, c) -ENOTSUPP +#undef pci_disable_msix +#define pci_disable_msix(a) do {} while (0) +#define msi_remove_pci_irq_vectors(a) do {} while (0) +#endif /* CONFIG_PCI_MSI */ +#ifdef DISABLE_PM +#undef CONFIG_PM +#endif + +#ifdef DISABLE_NET_POLL_CONTROLLER +#undef CONFIG_NET_POLL_CONTROLLER +#endif + +#ifndef PMSG_SUSPEND +#define PMSG_SUSPEND 3 +#endif + +/* generic boolean compatibility */ +#undef TRUE +#undef FALSE +#define TRUE true +#define FALSE false +#ifdef GCC_VERSION +#if ( GCC_VERSION < 3000 ) +#define _Bool char +#endif +#else +#define _Bool char +#endif + +#ifndef BIT +#define BIT(nr) (1UL << (nr)) +#endif + +#undef __always_unused +#define __always_unused __attribute__((__unused__)) + +#undef __maybe_unused +#define __maybe_unused __attribute__((__unused__)) + +/* kernels less than 2.4.14 don't have this */ +#ifndef ETH_P_8021Q +#define ETH_P_8021Q 0x8100 +#endif + +#ifndef module_param +#define module_param(v,t,p) MODULE_PARM(v, "i"); +#endif + +#ifndef DMA_64BIT_MASK +#define DMA_64BIT_MASK 0xffffffffffffffffULL +#endif + +#ifndef DMA_32BIT_MASK +#define DMA_32BIT_MASK 0x00000000ffffffffULL +#endif + +#ifndef PCI_CAP_ID_EXP +#define PCI_CAP_ID_EXP 0x10 +#endif + +#ifndef uninitialized_var +#define uninitialized_var(x) x = x +#endif + +#ifndef PCIE_LINK_STATE_L0S +#define PCIE_LINK_STATE_L0S 1 +#endif +#ifndef PCIE_LINK_STATE_L1 +#define PCIE_LINK_STATE_L1 2 +#endif + +#ifndef SET_NETDEV_DEV +#define SET_NETDEV_DEV(net, pdev) +#endif + +#if !defined(HAVE_FREE_NETDEV) && ( LINUX_VERSION_CODE < KERNEL_VERSION(3,1,0) ) +#define free_netdev(x) kfree(x) +#endif + +#ifdef HAVE_POLL_CONTROLLER +#define CONFIG_NET_POLL_CONTROLLER +#endif + +#ifndef SKB_DATAREF_SHIFT +/* if we do not have the infrastructure to detect if skb_header is cloned + just return false in all cases */ +#define skb_header_cloned(x) 0 +#endif + +#ifndef NETIF_F_GSO +#define gso_size tso_size +#define gso_segs tso_segs +#endif + +#ifndef NETIF_F_GRO +#define vlan_gro_receive(_napi, _vlgrp, _vlan, _skb) \ + vlan_hwaccel_receive_skb(_skb, _vlgrp, _vlan) +#define napi_gro_receive(_napi, _skb) netif_receive_skb(_skb) +#endif + +#ifndef NETIF_F_SCTP_CSUM +#define NETIF_F_SCTP_CSUM 0 +#endif + +#ifndef NETIF_F_LRO +#define NETIF_F_LRO BIT(15) +#endif + +#ifndef NETIF_F_NTUPLE +#define NETIF_F_NTUPLE BIT(27) +#endif + +#ifndef NETIF_F_ALL_FCOE +#define NETIF_F_ALL_FCOE (NETIF_F_FCOE_CRC | NETIF_F_FCOE_MTU | \ + NETIF_F_FSO) +#endif + +#ifndef IPPROTO_SCTP +#define IPPROTO_SCTP 132 +#endif + +#ifndef IPPROTO_UDPLITE +#define IPPROTO_UDPLITE 136 +#endif + +#ifndef CHECKSUM_PARTIAL +#define CHECKSUM_PARTIAL CHECKSUM_HW +#define CHECKSUM_COMPLETE CHECKSUM_HW +#endif + +#ifndef __read_mostly +#define __read_mostly +#endif + +#ifndef MII_RESV1 +#define MII_RESV1 0x17 /* Reserved... */ +#endif + +#ifndef unlikely +#define unlikely(_x) _x +#define likely(_x) _x +#endif + +#ifndef WARN_ON +#define WARN_ON(x) ({0;}) +#endif + +#ifndef PCI_DEVICE +#define PCI_DEVICE(vend,dev) \ + .vendor = (vend), .device = (dev), \ + .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID +#endif + +#ifndef node_online +#define node_online(node) ((node) == 0) +#endif + +#ifndef _LINUX_RANDOM_H +#include +#endif + +#ifndef BITS_PER_TYPE +#define BITS_PER_TYPE(type) (sizeof(type) * BITS_PER_BYTE) +#endif + +#ifndef BITS_TO_LONGS +#define BITS_TO_LONGS(bits) (((bits)+BITS_PER_LONG-1)/BITS_PER_LONG) +#endif + +#ifndef DECLARE_BITMAP +#define DECLARE_BITMAP(name,bits) long name[BITS_TO_LONGS(bits)] +#endif + +#ifndef VLAN_HLEN +#define VLAN_HLEN 4 +#endif + +#ifndef VLAN_ETH_HLEN +#define VLAN_ETH_HLEN 18 +#endif + +#ifndef VLAN_ETH_FRAME_LEN +#define VLAN_ETH_FRAME_LEN 1518 +#endif + +#ifndef DCA_GET_TAG_TWO_ARGS +#define dca3_get_tag(a,b) dca_get_tag(b) +#endif + +#ifndef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS +#if defined(__i386__) || defined(__x86_64__) +#define CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS +#endif +#endif + +/* taken from 2.6.24 definition in linux/kernel.h */ +#ifndef IS_ALIGNED +#define IS_ALIGNED(x,a) (((x) % ((typeof(x))(a))) == 0) +#endif + +#define __ARG_PLACEHOLDER_1 0, +#define __take_second_arg(__ignored, val, ...) val + +/* + * The use of "&&" / "||" is limited in certain expressions. + * The following enable to calculate "and" / "or" with macro expansion only. + */ +#define __and(x, y) ___and(x, y) +#define ___and(x, y) ____and(__ARG_PLACEHOLDER_##x, y) +#define ____and(arg1_or_junk, y) __take_second_arg(arg1_or_junk y, 0) + +#define __or(x, y) ___or(x, y) +#define ___or(x, y) ____or(__ARG_PLACEHOLDER_##x, y) +#define ____or(arg1_or_junk, y) __take_second_arg(arg1_or_junk 1, y) + +/* + * Helper macros to use CONFIG_ options in C/CPP expressions. Note that + * these only work with boolean and tristate options. + */ + +/* + * Getting something that works in C and CPP for an arg that may or may + * not be defined is tricky. Here, if we have "#define CONFIG_BOOGER 1" + * we match on the placeholder define, insert the "0," for arg1 and generate + * the triplet (0, 1, 0). Then the last step cherry picks the 2nd arg (a one). + * When CONFIG_BOOGER is not defined, we generate a (... 1, 0) pair, and when + * the last step cherry picks the 2nd arg, we get a zero. + */ +#define __is_defined(x) ___is_defined(x) +#define ___is_defined(val) ____is_defined(__ARG_PLACEHOLDER_##val) +#define ____is_defined(arg1_or_junk) __take_second_arg(arg1_or_junk 1, 0) + +/* + * IS_BUILTIN(CONFIG_FOO) evaluates to 1 if CONFIG_FOO is set to 'y', 0 + * otherwise. For boolean options, this is equivalent to + * IS_ENABLED(CONFIG_FOO). + */ +#define IS_BUILTIN(option) __is_defined(option) + +/* + * IS_MODULE(CONFIG_FOO) evaluates to 1 if CONFIG_FOO is set to 'm', 0 + * otherwise. CONFIG_FOO=m results in "#define CONFIG_FOO_MODULE 1" in + * autoconf.h. + */ +#define IS_MODULE(option) __is_defined(option##_MODULE) + +/* + * IS_REACHABLE(CONFIG_FOO) evaluates to 1 if the currently compiled + * code can call a function defined in code compiled based on CONFIG_FOO. + * This is similar to IS_ENABLED(), but returns false when invoked from + * built-in code when CONFIG_FOO is set to 'm'. + */ +#define IS_REACHABLE(option) __or(IS_BUILTIN(option), \ + __and(IS_MODULE(option), __is_defined(MODULE))) + +/* + * IS_ENABLED(CONFIG_FOO) evaluates to 1 if CONFIG_FOO is set to 'y' or 'm', + * 0 otherwise. Note that CONFIG_FOO=y results in "#define CONFIG_FOO 1" in + * autoconf.h, while CONFIG_FOO=m results in "#define CONFIG_FOO_MODULE 1". + */ +#define IS_ENABLED(option) __or(IS_BUILTIN(option), IS_MODULE(option)) + +#if !defined(NETIF_F_HW_VLAN_TX) && !defined(NETIF_F_HW_VLAN_CTAG_TX) +struct _kc_vlan_ethhdr { + unsigned char h_dest[ETH_ALEN]; + unsigned char h_source[ETH_ALEN]; + __be16 h_vlan_proto; + __be16 h_vlan_TCI; + __be16 h_vlan_encapsulated_proto; +}; +#define vlan_ethhdr _kc_vlan_ethhdr +struct _kc_vlan_hdr { + __be16 h_vlan_TCI; + __be16 h_vlan_encapsulated_proto; +}; +#define vlan_hdr _kc_vlan_hdr +#define vlan_tx_tag_present(_skb) 0 +#define vlan_tx_tag_get(_skb) 0 +#endif /* NETIF_F_HW_VLAN_TX && NETIF_F_HW_VLAN_CTAG_TX */ + +#ifndef VLAN_PRIO_SHIFT +#define VLAN_PRIO_SHIFT 13 +#endif + +#ifndef PCI_EXP_LNKSTA_CLS_2_5GB +#define PCI_EXP_LNKSTA_CLS_2_5GB 0x0001 +#endif + +#ifndef PCI_EXP_LNKSTA_CLS_5_0GB +#define PCI_EXP_LNKSTA_CLS_5_0GB 0x0002 +#endif + +#ifndef PCI_EXP_LNKSTA_CLS_8_0GB +#define PCI_EXP_LNKSTA_CLS_8_0GB 0x0003 +#endif + +#ifndef PCI_EXP_LNKSTA_NLW_X1 +#define PCI_EXP_LNKSTA_NLW_X1 0x0010 +#endif + +#ifndef PCI_EXP_LNKSTA_NLW_X2 +#define PCI_EXP_LNKSTA_NLW_X2 0x0020 +#endif + +#ifndef PCI_EXP_LNKSTA_NLW_X4 +#define PCI_EXP_LNKSTA_NLW_X4 0x0040 +#endif + +#ifndef PCI_EXP_LNKSTA_NLW_X8 +#define PCI_EXP_LNKSTA_NLW_X8 0x0080 +#endif + +#ifndef __GFP_COLD +#define __GFP_COLD 0 +#endif + +#ifndef __GFP_COMP +#define __GFP_COMP 0 +#endif + +#ifndef IP_OFFSET +#define IP_OFFSET 0x1FFF /* "Fragment Offset" part */ +#endif + +/*****************************************************************************/ +/* Installations with ethtool version without eeprom, adapter id, or statistics + * support */ + +#ifndef ETH_GSTRING_LEN +#define ETH_GSTRING_LEN 32 +#endif + +#ifndef ETHTOOL_GSTATS +#define ETHTOOL_GSTATS 0x1d +#undef ethtool_drvinfo +#define ethtool_drvinfo k_ethtool_drvinfo +struct k_ethtool_drvinfo { + u32 cmd; + char driver[32]; + char version[32]; + char fw_version[32]; + char bus_info[32]; + char reserved1[32]; + char reserved2[16]; + u32 n_stats; + u32 testinfo_len; + u32 eedump_len; + u32 regdump_len; +}; + +struct ethtool_stats { + u32 cmd; + u32 n_stats; + u64 data[0]; +}; +#endif /* ETHTOOL_GSTATS */ + +#ifndef ETHTOOL_PHYS_ID +#define ETHTOOL_PHYS_ID 0x1c +#endif /* ETHTOOL_PHYS_ID */ + +#ifndef ETHTOOL_GSTRINGS +#define ETHTOOL_GSTRINGS 0x1b +enum ethtool_stringset { + ETH_SS_TEST = 0, + ETH_SS_STATS, +}; +struct ethtool_gstrings { + u32 cmd; /* ETHTOOL_GSTRINGS */ + u32 string_set; /* string set id e.c. ETH_SS_TEST, etc*/ + u32 len; /* number of strings in the string set */ + u8 data[0]; +}; +#endif /* ETHTOOL_GSTRINGS */ + +#ifndef ETHTOOL_TEST +#define ETHTOOL_TEST 0x1a +enum ethtool_test_flags { + ETH_TEST_FL_OFFLINE = BIT(0), + ETH_TEST_FL_FAILED = BIT(1), +}; +struct ethtool_test { + u32 cmd; + u32 flags; + u32 reserved; + u32 len; + u64 data[0]; +}; +#endif /* ETHTOOL_TEST */ + +#ifndef ETHTOOL_GEEPROM +#define ETHTOOL_GEEPROM 0xb +#undef ETHTOOL_GREGS +struct ethtool_eeprom { + u32 cmd; + u32 magic; + u32 offset; + u32 len; + u8 data[0]; +}; + +struct ethtool_value { + u32 cmd; + u32 data; +}; +#endif /* ETHTOOL_GEEPROM */ + +#ifndef ETHTOOL_GLINK +#define ETHTOOL_GLINK 0xa +#endif /* ETHTOOL_GLINK */ + +#ifndef ETHTOOL_GWOL +#define ETHTOOL_GWOL 0x5 +#define ETHTOOL_SWOL 0x6 +#define SOPASS_MAX 6 +struct ethtool_wolinfo { + u32 cmd; + u32 supported; + u32 wolopts; + u8 sopass[SOPASS_MAX]; /* SecureOn(tm) password */ +}; +#endif /* ETHTOOL_GWOL */ + +#ifndef ETHTOOL_GREGS +#define ETHTOOL_GREGS 0x00000004 /* Get NIC registers */ +#define ethtool_regs _kc_ethtool_regs +/* for passing big chunks of data */ +struct _kc_ethtool_regs { + u32 cmd; + u32 version; /* driver-specific, indicates different chips/revs */ + u32 len; /* bytes */ + u8 data[0]; +}; +#endif /* ETHTOOL_GREGS */ + +#ifndef ETHTOOL_GMSGLVL +#define ETHTOOL_GMSGLVL 0x00000007 /* Get driver message level */ +#endif +#ifndef ETHTOOL_SMSGLVL +#define ETHTOOL_SMSGLVL 0x00000008 /* Set driver msg level, priv. */ +#endif +#ifndef ETHTOOL_NWAY_RST +#define ETHTOOL_NWAY_RST 0x00000009 /* Restart autonegotiation, priv */ +#endif +#ifndef ETHTOOL_GLINK +#define ETHTOOL_GLINK 0x0000000a /* Get link status */ +#endif +#ifndef ETHTOOL_GEEPROM +#define ETHTOOL_GEEPROM 0x0000000b /* Get EEPROM data */ +#endif +#ifndef ETHTOOL_SEEPROM +#define ETHTOOL_SEEPROM 0x0000000c /* Set EEPROM data */ +#endif +#ifndef ETHTOOL_GCOALESCE +#define ETHTOOL_GCOALESCE 0x0000000e /* Get coalesce config */ +/* for configuring coalescing parameters of chip */ +#define ethtool_coalesce _kc_ethtool_coalesce +struct _kc_ethtool_coalesce { + u32 cmd; /* ETHTOOL_{G,S}COALESCE */ + + /* How many usecs to delay an RX interrupt after + * a packet arrives. If 0, only rx_max_coalesced_frames + * is used. + */ + u32 rx_coalesce_usecs; + + /* How many packets to delay an RX interrupt after + * a packet arrives. If 0, only rx_coalesce_usecs is + * used. It is illegal to set both usecs and max frames + * to zero as this would cause RX interrupts to never be + * generated. + */ + u32 rx_max_coalesced_frames; + + /* Same as above two parameters, except that these values + * apply while an IRQ is being serviced by the host. Not + * all cards support this feature and the values are ignored + * in that case. + */ + u32 rx_coalesce_usecs_irq; + u32 rx_max_coalesced_frames_irq; + + /* How many usecs to delay a TX interrupt after + * a packet is sent. If 0, only tx_max_coalesced_frames + * is used. + */ + u32 tx_coalesce_usecs; + + /* How many packets to delay a TX interrupt after + * a packet is sent. If 0, only tx_coalesce_usecs is + * used. It is illegal to set both usecs and max frames + * to zero as this would cause TX interrupts to never be + * generated. + */ + u32 tx_max_coalesced_frames; + + /* Same as above two parameters, except that these values + * apply while an IRQ is being serviced by the host. Not + * all cards support this feature and the values are ignored + * in that case. + */ + u32 tx_coalesce_usecs_irq; + u32 tx_max_coalesced_frames_irq; + + /* How many usecs to delay in-memory statistics + * block updates. Some drivers do not have an in-memory + * statistic block, and in such cases this value is ignored. + * This value must not be zero. + */ + u32 stats_block_coalesce_usecs; + + /* Adaptive RX/TX coalescing is an algorithm implemented by + * some drivers to improve latency under low packet rates and + * improve throughput under high packet rates. Some drivers + * only implement one of RX or TX adaptive coalescing. Anything + * not implemented by the driver causes these values to be + * silently ignored. + */ + u32 use_adaptive_rx_coalesce; + u32 use_adaptive_tx_coalesce; + + /* When the packet rate (measured in packets per second) + * is below pkt_rate_low, the {rx,tx}_*_low parameters are + * used. + */ + u32 pkt_rate_low; + u32 rx_coalesce_usecs_low; + u32 rx_max_coalesced_frames_low; + u32 tx_coalesce_usecs_low; + u32 tx_max_coalesced_frames_low; + + /* When the packet rate is below pkt_rate_high but above + * pkt_rate_low (both measured in packets per second) the + * normal {rx,tx}_* coalescing parameters are used. + */ + + /* When the packet rate is (measured in packets per second) + * is above pkt_rate_high, the {rx,tx}_*_high parameters are + * used. + */ + u32 pkt_rate_high; + u32 rx_coalesce_usecs_high; + u32 rx_max_coalesced_frames_high; + u32 tx_coalesce_usecs_high; + u32 tx_max_coalesced_frames_high; + + /* How often to do adaptive coalescing packet rate sampling, + * measured in seconds. Must not be zero. + */ + u32 rate_sample_interval; +}; +#endif /* ETHTOOL_GCOALESCE */ + +#ifndef ETHTOOL_SCOALESCE +#define ETHTOOL_SCOALESCE 0x0000000f /* Set coalesce config. */ +#endif +#ifndef ETHTOOL_GRINGPARAM +#define ETHTOOL_GRINGPARAM 0x00000010 /* Get ring parameters */ +/* for configuring RX/TX ring parameters */ +#define ethtool_ringparam _kc_ethtool_ringparam +struct _kc_ethtool_ringparam { + u32 cmd; /* ETHTOOL_{G,S}RINGPARAM */ + + /* Read only attributes. These indicate the maximum number + * of pending RX/TX ring entries the driver will allow the + * user to set. + */ + u32 rx_max_pending; + u32 rx_mini_max_pending; + u32 rx_jumbo_max_pending; + u32 tx_max_pending; + + /* Values changeable by the user. The valid values are + * in the range 1 to the "*_max_pending" counterpart above. + */ + u32 rx_pending; + u32 rx_mini_pending; + u32 rx_jumbo_pending; + u32 tx_pending; +}; +#endif /* ETHTOOL_GRINGPARAM */ + +#ifndef ETHTOOL_SRINGPARAM +#define ETHTOOL_SRINGPARAM 0x00000011 /* Set ring parameters, priv. */ +#endif +#ifndef ETHTOOL_GPAUSEPARAM +#define ETHTOOL_GPAUSEPARAM 0x00000012 /* Get pause parameters */ +/* for configuring link flow control parameters */ +#define ethtool_pauseparam _kc_ethtool_pauseparam +struct _kc_ethtool_pauseparam { + u32 cmd; /* ETHTOOL_{G,S}PAUSEPARAM */ + + /* If the link is being auto-negotiated (via ethtool_cmd.autoneg + * being true) the user may set 'autoneg' here non-zero to have the + * pause parameters be auto-negotiated too. In such a case, the + * {rx,tx}_pause values below determine what capabilities are + * advertised. + * + * If 'autoneg' is zero or the link is not being auto-negotiated, + * then {rx,tx}_pause force the driver to use/not-use pause + * flow control. + */ + u32 autoneg; + u32 rx_pause; + u32 tx_pause; +}; +#endif /* ETHTOOL_GPAUSEPARAM */ + +#ifndef ETHTOOL_SPAUSEPARAM +#define ETHTOOL_SPAUSEPARAM 0x00000013 /* Set pause parameters. */ +#endif +#ifndef ETHTOOL_GRXCSUM +#define ETHTOOL_GRXCSUM 0x00000014 /* Get RX hw csum enable (ethtool_value) */ +#endif +#ifndef ETHTOOL_SRXCSUM +#define ETHTOOL_SRXCSUM 0x00000015 /* Set RX hw csum enable (ethtool_value) */ +#endif +#ifndef ETHTOOL_GTXCSUM +#define ETHTOOL_GTXCSUM 0x00000016 /* Get TX hw csum enable (ethtool_value) */ +#endif +#ifndef ETHTOOL_STXCSUM +#define ETHTOOL_STXCSUM 0x00000017 /* Set TX hw csum enable (ethtool_value) */ +#endif +#ifndef ETHTOOL_GSG +#define ETHTOOL_GSG 0x00000018 /* Get scatter-gather enable + * (ethtool_value) */ +#endif +#ifndef ETHTOOL_SSG +#define ETHTOOL_SSG 0x00000019 /* Set scatter-gather enable + * (ethtool_value). */ +#endif +#ifndef ETHTOOL_TEST +#define ETHTOOL_TEST 0x0000001a /* execute NIC self-test, priv. */ +#endif +#ifndef ETHTOOL_GSTRINGS +#define ETHTOOL_GSTRINGS 0x0000001b /* get specified string set */ +#endif +#ifndef ETHTOOL_PHYS_ID +#define ETHTOOL_PHYS_ID 0x0000001c /* identify the NIC */ +#endif +#ifndef ETHTOOL_GSTATS +#define ETHTOOL_GSTATS 0x0000001d /* get NIC-specific statistics */ +#endif +#ifndef ETHTOOL_GTSO +#define ETHTOOL_GTSO 0x0000001e /* Get TSO enable (ethtool_value) */ +#endif +#ifndef ETHTOOL_STSO +#define ETHTOOL_STSO 0x0000001f /* Set TSO enable (ethtool_value) */ +#endif + +#ifndef ETHTOOL_BUSINFO_LEN +#define ETHTOOL_BUSINFO_LEN 32 +#endif + +#if defined(HAVE_ETHTOOL_SUPPORTED_RING_PARAMS) && !defined(NEED_ETHTOOL_RING_USE_TCP_DATA_SPLIT) +/** + * enum _kc_ethtool_supported_ring_param - indicator caps for setting ring params + * @ETHTOOL_RING_USE_TCP_DATA_SPLIT: capture for setting tcp_data_split + */ +enum _kc_ethtool_supported_ring_param { + ETHTOOL_RING_USE_TCP_DATA_SPLIT = BIT(5), +}; +#endif + +#ifndef WAKE_FILTER +#define WAKE_FILTER BIT(7) +#endif + +#ifndef SPEED_2500 +#define SPEED_2500 2500 +#endif +#ifndef SPEED_5000 +#define SPEED_5000 5000 +#endif +#ifndef SPEED_14000 +#define SPEED_14000 14000 +#endif +#ifndef SPEED_25000 +#define SPEED_25000 25000 +#endif +#ifndef SPEED_50000 +#define SPEED_50000 50000 +#endif +#ifndef SPEED_56000 +#define SPEED_56000 56000 +#endif +#ifndef SPEED_100000 +#define SPEED_100000 100000 +#endif +#ifndef SPEED_200000 +#define SPEED_200000 200000 +#endif + +#ifndef RHEL_RELEASE_VERSION +#define RHEL_RELEASE_VERSION(a,b) (((a) << 8) + (b)) +#endif +#ifndef AX_RELEASE_VERSION +#define AX_RELEASE_VERSION(a,b) (((a) << 8) + (b)) +#endif + +#ifndef AX_RELEASE_CODE +#define AX_RELEASE_CODE 0 +#endif + +#if (AX_RELEASE_CODE && AX_RELEASE_CODE == AX_RELEASE_VERSION(3,0)) +#define RHEL_RELEASE_CODE RHEL_RELEASE_VERSION(5,0) +#elif (AX_RELEASE_CODE && AX_RELEASE_CODE == AX_RELEASE_VERSION(3,1)) +#define RHEL_RELEASE_CODE RHEL_RELEASE_VERSION(5,1) +#elif (AX_RELEASE_CODE && AX_RELEASE_CODE == AX_RELEASE_VERSION(3,2)) +#define RHEL_RELEASE_CODE RHEL_RELEASE_VERSION(5,3) +#endif + +#ifndef RHEL_RELEASE_CODE +/* NOTE: RHEL_RELEASE_* introduced in RHEL4.5 */ +#define RHEL_RELEASE_CODE 0 +#endif + +/* RHEL 7 didn't backport the parameter change in + * create_singlethread_workqueue. + * If/when RH corrects this we will want to tighten up the version check. + */ +#if (RHEL_RELEASE_CODE && RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,0)) +#undef create_singlethread_workqueue +#define create_singlethread_workqueue(name) \ + alloc_ordered_workqueue("%s", WQ_MEM_RECLAIM, name) +#endif + +/* Ubuntu Release ABI is the 4th digit of their kernel version. You can find + * it in /usr/src/linux/$(uname -r)/include/generated/utsrelease.h for new + * enough versions of Ubuntu. Otherwise you can simply see it in the output of + * uname as the 4th digit of the kernel. The UTS_UBUNTU_RELEASE_ABI is not in + * the linux-source package, but in the linux-headers package. It begins to + * appear in later releases of 14.04 and 14.10. + * + * Ex: + * + * $uname -r + * 3.13.0-45-generic + * ABI is 45 + * + * + * $uname -r + * 3.16.0-23-generic + * ABI is 23 + */ +#ifndef UTS_UBUNTU_RELEASE_ABI +#define UTS_UBUNTU_RELEASE_ABI 0 +#define UBUNTU_VERSION_CODE 0 +#else +/* Ubuntu does not provide actual release version macro, so we use the kernel + * version plus the ABI to generate a unique version code specific to Ubuntu. + * In addition, we mask the lower 8 bits of LINUX_VERSION_CODE in order to + * ignore differences in sublevel which are not important since we have the + * ABI value. Otherwise, it becomes impossible to correlate ABI to version for + * ordering checks. + * + * This also lets us store an ABI value up to 65535, since it can take the + * space that would use the lower byte of the Linux version code. + */ +#define UBUNTU_VERSION_CODE (((~0xFF & LINUX_VERSION_CODE) << 8) + \ + UTS_UBUNTU_RELEASE_ABI) + +#if UTS_UBUNTU_RELEASE_ABI > 65535 +#error UTS_UBUNTU_RELEASE_ABI is larger than 65535... +#endif /* UTS_UBUNTU_RELEASE_ABI > 65535 */ + +#if ( LINUX_VERSION_CODE <= KERNEL_VERSION(3,0,0) ) +/* Our version code scheme does not make sense for non 3.x or newer kernels, + * and we have no support in kcompat for this scenario. Thus, treat this as a + * non-Ubuntu kernel. Possibly might be better to error here. + */ +#define UTS_UBUNTU_RELEASE_ABI 0 +#define UBUNTU_VERSION_CODE 0 +#endif /* <= 3.0.0 */ +#endif /* !UTS_UBUNTU_RELEASE_ABI */ + +/* We ignore the 3rd digit since we want to give precedence to the additional + * ABI value provided by Ubuntu. + */ +#define UBUNTU_VERSION(a,b,c,d) (((a) << 24) + ((b) << 16) + (d)) + +/* SLE_VERSION is used to generate a 3-digit encoding that can order SLE + * kernels based on their major release, service pack, and a possible + * maintenance release. + */ +#define SLE_VERSION(a,b,c) (((a) << 16) + ((b) << 8) + (c)) + +/* The SLE_LOCALVERSION_CODE comes from a 3-digit code added as part of the + * Linux kernel version. It is extracted by the driver Makefile. This macro is + * used to generate codes for making comparisons below. + */ +#define SLE_LOCALVERSION(a,b,c) (((a) << 16) + ((b) << 8) + (c)) + +#ifdef CONFIG_SUSE_KERNEL +/* Starting since at least SLE 12sp4 and SLE 15, the SUSE kernels have + * provided CONFIG_SUSE_VERSION, CONFIG_SUSE_PATCHLEVEL and + * CONFIG_SUSE_AUXRELEASE. Use these to generate SLE_VERSION if available. + * Only fall back to the manual table otherwise. We expect all future versions + * of SLE kernels to include these values, so the table will remain only for + * the older releases. + */ +#ifdef CONFIG_SUSE_VERSION +#ifndef CONFIG_SUSE_PATCHLEVEL +#error "CONFIG_SUSE_VERSION exists but CONFIG_SUSE_PATCHLEVEL is missing" +#endif +#ifndef CONFIG_SUSE_AUXRELEASE +#error "CONFIG_SUSE_VERSION exists but CONFIG_SUSE_AUXRELEASE is missing" +#endif +#define SLE_VERSION_CODE SLE_VERSION(CONFIG_SUSE_VERSION, CONFIG_SUSE_PATCHLEVEL, CONFIG_SUSE_AUXRELEASE) +#else +/* If we do not have the CONFIG_SUSE_VERSION configuration values, fall back + * to the following table for older releases. + */ +#if ( LINUX_VERSION_CODE == KERNEL_VERSION(2,6,27) ) +/* SLES11 GA is 2.6.27 based */ +#define SLE_VERSION_CODE SLE_VERSION(11,0,0) +#elif ( LINUX_VERSION_CODE == KERNEL_VERSION(2,6,32) ) +/* SLES11 SP1 is 2.6.32 based */ +#define SLE_VERSION_CODE SLE_VERSION(11,1,0) +#elif ( LINUX_VERSION_CODE == KERNEL_VERSION(3,0,13) ) +/* SLES11 SP2 GA is 3.0.13-0.27 */ +#define SLE_VERSION_CODE SLE_VERSION(11,2,0) +#elif ((LINUX_VERSION_CODE == KERNEL_VERSION(3,0,76))) +/* SLES11 SP3 GA is 3.0.76-0.11 */ +#define SLE_VERSION_CODE SLE_VERSION(11,3,0) +#elif (LINUX_VERSION_CODE == KERNEL_VERSION(3,0,101)) + #if (SLE_LOCALVERSION_CODE < SLE_LOCALVERSION(0,8,0)) + /* some SLES11sp2 update kernels up to 3.0.101-0.7.x */ + #define SLE_VERSION_CODE SLE_VERSION(11,2,0) + #elif (SLE_LOCALVERSION_CODE < SLE_LOCALVERSION(63,0,0)) + /* most SLES11sp3 update kernels */ + #define SLE_VERSION_CODE SLE_VERSION(11,3,0) + #else + /* SLES11 SP4 GA (3.0.101-63) and update kernels 3.0.101-63+ */ + #define SLE_VERSION_CODE SLE_VERSION(11,4,0) + #endif +#elif (LINUX_VERSION_CODE == KERNEL_VERSION(3,12,28)) +/* SLES12 GA is 3.12.28-4 + * kernel updates 3.12.xx-<33 through 52>[.yy] */ +#define SLE_VERSION_CODE SLE_VERSION(12,0,0) +#elif (LINUX_VERSION_CODE == KERNEL_VERSION(3,12,49)) +/* SLES12 SP1 GA is 3.12.49-11 + * updates 3.12.xx-60.yy where xx={51..} */ +#define SLE_VERSION_CODE SLE_VERSION(12,1,0) +#elif ((LINUX_VERSION_CODE >= KERNEL_VERSION(4,4,21) && \ + (LINUX_VERSION_CODE <= KERNEL_VERSION(4,4,59))) || \ + (LINUX_VERSION_CODE >= KERNEL_VERSION(4,4,74) && \ + LINUX_VERSION_CODE < KERNEL_VERSION(4,5,0) && \ + SLE_LOCALVERSION_CODE >= KERNEL_VERSION(92,0,0) && \ + SLE_LOCALVERSION_CODE < KERNEL_VERSION(93,0,0))) +/* SLES12 SP2 GA is 4.4.21-69. + * SLES12 SP2 updates before SLES12 SP3 are: 4.4.{21,38,49,59} + * SLES12 SP2 updates after SLES12 SP3 are: 4.4.{74,90,103,114,120} + * but they all use a SLE_LOCALVERSION_CODE matching 92.nn.y */ +#define SLE_VERSION_CODE SLE_VERSION(12,2,0) +#elif ((LINUX_VERSION_CODE == KERNEL_VERSION(4,4,73) || \ + LINUX_VERSION_CODE == KERNEL_VERSION(4,4,82) || \ + LINUX_VERSION_CODE == KERNEL_VERSION(4,4,92)) || \ + (LINUX_VERSION_CODE == KERNEL_VERSION(4,4,103) && \ + (SLE_LOCALVERSION_CODE == KERNEL_VERSION(6,33,0) || \ + SLE_LOCALVERSION_CODE == KERNEL_VERSION(6,38,0))) || \ + (LINUX_VERSION_CODE >= KERNEL_VERSION(4,4,114) && \ + LINUX_VERSION_CODE < KERNEL_VERSION(4,5,0) && \ + SLE_LOCALVERSION_CODE >= KERNEL_VERSION(94,0,0) && \ + SLE_LOCALVERSION_CODE < KERNEL_VERSION(95,0,0)) ) +/* SLES12 SP3 GM is 4.4.73-5 and update kernels are 4.4.82-6.3. + * SLES12 SP3 updates not conflicting with SP2 are: 4.4.{82,92} + * SLES12 SP3 updates conflicting with SP2 are: + * - 4.4.103-6.33.1, 4.4.103-6.38.1 + * - 4.4.{114,120}-94.nn.y */ +#define SLE_VERSION_CODE SLE_VERSION(12,3,0) +#else +#error "This looks like a SUSE kernel, but it has an unrecognized local version code." +#endif /* LINUX_VERSION_CODE == KERNEL_VERSION(x,y,z) */ +#endif /* !CONFIG_SUSE_VERSION */ +#endif /* CONFIG_SUSE_KERNEL */ +#ifndef SLE_VERSION_CODE +#define SLE_VERSION_CODE 0 +#endif /* SLE_VERSION_CODE */ +#ifndef SLE_LOCALVERSION_CODE +#define SLE_LOCALVERSION_CODE 0 +#endif /* SLE_LOCALVERSION_CODE */ + +/* Include definitions from the new kcompat layout */ +#include "kcompat_defs.h" + +#ifdef NEED_FLOW_CLS_OFFLOAD +#define flow_block_offload tc_block_offload +#define flow_block_command tc_block_command +#define flow_cls_offload tc_cls_flower_offload +#define flow_block_binder_type tcf_block_binder_type +#define flow_cls_common_offload tc_cls_common_offload +#define flow_cls_offload_flow_rule tc_cls_flower_offload_flow_rule +#endif + +/* + * ADQ depends on __TC_MQPRIO_MODE_MAX and related kernel code + * added around 4.15. Some distributions (e.g. Oracle Linux 7.7) + * have done a partial back-port of that to their kernels based + * on older mainline kernels that did not include all the necessary + * kernel enablement to support ADQ. + * Undefine __TC_MQPRIO_MODE_MAX for all OSV distributions with + * kernels based on mainline kernels older than 4.15 except for + * RHEL, SLES and Ubuntu which are known to have good back-ports. + */ +#if (!RHEL_RELEASE_CODE && !SLE_VERSION_CODE && !UBUNTU_VERSION_CODE) + #if (LINUX_VERSION_CODE < KERNEL_VERSION(4,15,0)) + #undef __TC_MQPRIO_MODE_MAX + #endif /* LINUX_VERSION_CODE == KERNEL_VERSION(4,15,0) */ +#endif /* if (NOT RHEL && NOT SLES && NOT UBUNTU) */ + +#ifdef __KLOCWORK__ +#ifdef ARRAY_SIZE +#undef ARRAY_SIZE +#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) +#endif + +#define memcpy(dest, src, len) memcpy_s(dest, len, src, len) +#define memset(dest, ch, len) memset_s(dest, len, ch, len) + +static inline int _kc_test_and_clear_bit(int nr, volatile unsigned long *addr) +{ + unsigned long mask = BIT_MASK(nr); + unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr); + unsigned long old; + unsigned long flags = 0; + + _atomic_spin_lock_irqsave(p, flags); + old = *p; + *p = old & ~mask; + _atomic_spin_unlock_irqrestore(p, flags); + + return (old & mask) != 0; +} +#define test_and_clear_bit(nr, addr) _kc_test_and_clear_bit(nr, addr) + +static inline int _kc_test_and_set_bit(int nr, volatile unsigned long *addr) +{ + unsigned long mask = BIT_MASK(nr); + unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr); + unsigned long old; + unsigned long flags = 0; + + _atomic_spin_lock_irqsave(p, flags); + old = *p; + *p = old | mask; + _atomic_spin_unlock_irqrestore(p, flags); + + return (old & mask) != 0; +} +#define test_and_set_bit(nr, addr) _kc_test_and_set_bit(nr, addr) + +#ifdef CONFIG_DYNAMIC_DEBUG +#undef dev_dbg +#define dev_dbg(dev, format, arg...) dev_printk(KERN_DEBUG, dev, format, ##arg) +#undef pr_debug +#define pr_debug(format, arg...) printk(KERN_DEBUG format, ##arg) +#endif /* CONFIG_DYNAMIC_DEBUG */ + +#undef hlist_for_each_entry_safe +#define hlist_for_each_entry_safe(pos, n, head, member) \ + for (n = NULL, pos = hlist_entry_safe((head)->first, typeof(*(pos)), \ + member); \ + pos; \ + pos = hlist_entry_safe((pos)->member.next, typeof(*(pos)), member)) + +#ifdef uninitialized_var +#undef uninitialized_var +#define uninitialized_var(x) x = *(&(x)) +#endif + +#ifdef WRITE_ONCE +#undef WRITE_ONCE +#define WRITE_ONCE(x, val) ((x) = (val)) +#endif /* WRITE_ONCE */ + +#ifdef wait_event_interruptible_timeout +#undef wait_event_interruptible_timeout +#define wait_event_interruptible_timeout(wq_head, condition, timeout) ({ \ + long ret; \ + if ((condition)) \ + ret = timeout; \ + else \ + ret = 0; \ + ret; \ +}) +#endif /* wait_event_interruptible_timeout */ + +#ifdef max_t +#undef max_t +#define max_t(type, x, y) ({ \ +type __x = (x); \ +type __y = (y); \ +__x > __y ? __x : __y; \ +}) +#endif /* max_t */ + +#ifdef min_t +#undef min_t +#define min_t(type, x, y) ({ \ +type __x = (x); \ +type __y = (y); \ +__x < __y ? __x : __y; \ +}) +#endif /* min_t */ +#endif /* __KLOCWORK__ */ + +/* Older versions of GCC will trigger -Wformat-nonliteral warnings for const + * char * strings. Unfortunately, the implementation of do_trace_printk does + * this, in order to add a storage attribute to the memory. This was fixed in + * GCC 5.1, but we still use older distributions built with GCC 4.x. + * + * The string pointer is only passed as a const char * to the __trace_bprintk + * function. Since that function has the __printf attribute, it will trigger + * the warnings. We can't remove the attribute, so instead we'll use the + * __diag macro to disable -Wformat-nonliteral around the call to + * __trace_bprintk. + */ +#if GCC_VERSION < 50100 +#define __trace_bprintk(ip, fmt, args...) ({ \ + int err; \ + __diag_push(); \ + __diag(ignored "-Wformat-nonliteral"); \ + err = __trace_bprintk(ip, fmt, ##args); \ + __diag_pop(); \ + err; \ +}) +#endif /* GCC_VERSION < 5.1.0 */ + +/* Newer kernels removed */ +#if ((LINUX_VERSION_CODE < KERNEL_VERSION(5,4,0)) && \ + (!(RHEL_RELEASE_CODE && RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(8,3)) && \ + !(SLE_VERSION_CODE && (SLE_VERSION_CODE >= SLE_VERSION(15,3,0))))) +#define HAVE_PCI_ASPM_H +#endif + +/*****************************************************************************/ +/* 2.4.3 => 2.4.0 */ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,4,3) ) + +/**************************************/ +/* PCI DRIVER API */ + +#ifndef pci_set_dma_mask +#define pci_set_dma_mask _kc_pci_set_dma_mask +int _kc_pci_set_dma_mask(struct pci_dev *dev, dma_addr_t mask); +#endif + +#ifndef pci_request_regions +#define pci_request_regions _kc_pci_request_regions +int _kc_pci_request_regions(struct pci_dev *pdev, char *res_name); +#endif + +#ifndef pci_release_regions +#define pci_release_regions _kc_pci_release_regions +void _kc_pci_release_regions(struct pci_dev *pdev); +#endif + +/**************************************/ +/* NETWORK DRIVER API */ + +#ifndef alloc_etherdev +#define alloc_etherdev _kc_alloc_etherdev +struct net_device * _kc_alloc_etherdev(int sizeof_priv); +#endif + +#ifndef is_valid_ether_addr +#define is_valid_ether_addr _kc_is_valid_ether_addr +int _kc_is_valid_ether_addr(u8 *addr); +#endif + +/**************************************/ +/* MISCELLANEOUS */ + +#ifndef INIT_TQUEUE +#define INIT_TQUEUE(_tq, _routine, _data) \ + do { \ + INIT_LIST_HEAD(&(_tq)->list); \ + (_tq)->sync = 0; \ + (_tq)->routine = _routine; \ + (_tq)->data = _data; \ + } while (0) +#endif + +#endif /* 2.4.3 => 2.4.0 */ + +/*****************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,4,5) ) +/* Generic MII registers. */ +#define MII_BMCR 0x00 /* Basic mode control register */ +#define MII_BMSR 0x01 /* Basic mode status register */ +#define MII_PHYSID1 0x02 /* PHYS ID 1 */ +#define MII_PHYSID2 0x03 /* PHYS ID 2 */ +#define MII_ADVERTISE 0x04 /* Advertisement control reg */ +#define MII_LPA 0x05 /* Link partner ability reg */ +#define MII_EXPANSION 0x06 /* Expansion register */ +/* Basic mode control register. */ +#define BMCR_FULLDPLX 0x0100 /* Full duplex */ +#define BMCR_ANENABLE 0x1000 /* Enable auto negotiation */ +/* Basic mode status register. */ +#define BMSR_ERCAP 0x0001 /* Ext-reg capability */ +#define BMSR_ANEGCAPABLE 0x0008 /* Able to do auto-negotiation */ +#define BMSR_10HALF 0x0800 /* Can do 10mbps, half-duplex */ +#define BMSR_10FULL 0x1000 /* Can do 10mbps, full-duplex */ +#define BMSR_100HALF 0x2000 /* Can do 100mbps, half-duplex */ +#define BMSR_100FULL 0x4000 /* Can do 100mbps, full-duplex */ +/* Advertisement control register. */ +#define ADVERTISE_CSMA 0x0001 /* Only selector supported */ +#define ADVERTISE_10HALF 0x0020 /* Try for 10mbps half-duplex */ +#define ADVERTISE_10FULL 0x0040 /* Try for 10mbps full-duplex */ +#define ADVERTISE_100HALF 0x0080 /* Try for 100mbps half-duplex */ +#define ADVERTISE_100FULL 0x0100 /* Try for 100mbps full-duplex */ +#define ADVERTISE_ALL (ADVERTISE_10HALF | ADVERTISE_10FULL | \ + ADVERTISE_100HALF | ADVERTISE_100FULL) +/* Expansion register for auto-negotiation. */ +#define EXPANSION_ENABLENPAGE 0x0004 /* This enables npage words */ +#endif + +/*****************************************************************************/ +/* 2.4.6 => 2.4.3 */ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,4,6) ) + +#ifndef pci_set_power_state +#define pci_set_power_state _kc_pci_set_power_state +int _kc_pci_set_power_state(struct pci_dev *dev, int state); +#endif + +#ifndef pci_enable_wake +#define pci_enable_wake _kc_pci_enable_wake +int _kc_pci_enable_wake(struct pci_dev *pdev, u32 state, int enable); +#endif + +#ifndef pci_disable_device +#define pci_disable_device _kc_pci_disable_device +void _kc_pci_disable_device(struct pci_dev *pdev); +#endif + +/* PCI PM entry point syntax changed, so don't support suspend/resume */ +#undef CONFIG_PM + +#endif /* 2.4.6 => 2.4.3 */ + +#ifndef HAVE_PCI_SET_MWI +#define pci_set_mwi(X) pci_write_config_word(X, \ + PCI_COMMAND, adapter->hw.bus.pci_cmd_word | \ + PCI_COMMAND_INVALIDATE); +#define pci_clear_mwi(X) pci_write_config_word(X, \ + PCI_COMMAND, adapter->hw.bus.pci_cmd_word & \ + ~PCI_COMMAND_INVALIDATE); +#endif + +/*****************************************************************************/ +/* 2.4.10 => 2.4.9 */ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,4,10) ) + +/**************************************/ +/* MODULE API */ + +#ifndef MODULE_LICENSE + #define MODULE_LICENSE(X) +#endif + +/**************************************/ +/* OTHER */ + +#undef min +#define min(x,y) ({ \ + const typeof(x) _x = (x); \ + const typeof(y) _y = (y); \ + (void) (&_x == &_y); \ + _x < _y ? _x : _y; }) + +#undef max +#define max(x,y) ({ \ + const typeof(x) _x = (x); \ + const typeof(y) _y = (y); \ + (void) (&_x == &_y); \ + _x > _y ? _x : _y; }) + +#define min_t(type,x,y) ({ \ + type _x = (x); \ + type _y = (y); \ + _x < _y ? _x : _y; }) + +#define max_t(type,x,y) ({ \ + type _x = (x); \ + type _y = (y); \ + _x > _y ? _x : _y; }) + +#ifndef list_for_each_safe +#define list_for_each_safe(pos, n, head) \ + for (pos = (head)->next, n = pos->next; pos != (head); \ + pos = n, n = pos->next) +#endif + +#ifndef ____cacheline_aligned_in_smp +#ifdef CONFIG_SMP +#define ____cacheline_aligned_in_smp ____cacheline_aligned +#else +#define ____cacheline_aligned_in_smp +#endif /* CONFIG_SMP */ +#endif + +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,4,8) ) +int _kc_snprintf(char * buf, size_t size, const char *fmt, ...); +#define snprintf(buf, size, fmt, args...) _kc_snprintf(buf, size, fmt, ##args) +int _kc_vsnprintf(char *buf, size_t size, const char *fmt, va_list args); +#define vsnprintf(buf, size, fmt, args) _kc_vsnprintf(buf, size, fmt, args) +#else /* 2.4.8 => 2.4.9 */ +int snprintf(char * buf, size_t size, const char *fmt, ...); +int vsnprintf(char *buf, size_t size, const char *fmt, va_list args); +#endif +#endif /* 2.4.10 -> 2.4.6 */ + +/*****************************************************************************/ +/* 2.4.12 => 2.4.10 */ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,4,12) ) +#ifndef HAVE_NETIF_MSG +#define HAVE_NETIF_MSG 1 +enum { + NETIF_MSG_DRV = 0x0001, + NETIF_MSG_PROBE = 0x0002, + NETIF_MSG_LINK = 0x0004, + NETIF_MSG_TIMER = 0x0008, + NETIF_MSG_IFDOWN = 0x0010, + NETIF_MSG_IFUP = 0x0020, + NETIF_MSG_RX_ERR = 0x0040, + NETIF_MSG_TX_ERR = 0x0080, + NETIF_MSG_TX_QUEUED = 0x0100, + NETIF_MSG_INTR = 0x0200, + NETIF_MSG_TX_DONE = 0x0400, + NETIF_MSG_RX_STATUS = 0x0800, + NETIF_MSG_PKTDATA = 0x1000, + NETIF_MSG_HW = 0x2000, + NETIF_MSG_WOL = 0x4000, +}; + +#define netif_msg_drv(p) ((p)->msg_enable & NETIF_MSG_DRV) +#define netif_msg_probe(p) ((p)->msg_enable & NETIF_MSG_PROBE) +#define netif_msg_link(p) ((p)->msg_enable & NETIF_MSG_LINK) +#define netif_msg_timer(p) ((p)->msg_enable & NETIF_MSG_TIMER) +#define netif_msg_ifdown(p) ((p)->msg_enable & NETIF_MSG_IFDOWN) +#define netif_msg_ifup(p) ((p)->msg_enable & NETIF_MSG_IFUP) +#define netif_msg_rx_err(p) ((p)->msg_enable & NETIF_MSG_RX_ERR) +#define netif_msg_tx_err(p) ((p)->msg_enable & NETIF_MSG_TX_ERR) +#define netif_msg_tx_queued(p) ((p)->msg_enable & NETIF_MSG_TX_QUEUED) +#define netif_msg_intr(p) ((p)->msg_enable & NETIF_MSG_INTR) +#define netif_msg_tx_done(p) ((p)->msg_enable & NETIF_MSG_TX_DONE) +#define netif_msg_rx_status(p) ((p)->msg_enable & NETIF_MSG_RX_STATUS) +#define netif_msg_pktdata(p) ((p)->msg_enable & NETIF_MSG_PKTDATA) +#endif /* !HAVE_NETIF_MSG */ +#endif /* 2.4.12 => 2.4.10 */ + +/*****************************************************************************/ +/* 2.4.13 => 2.4.12 */ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,4,13) ) + +/**************************************/ +/* PCI DMA MAPPING */ + +#ifndef virt_to_page + #define virt_to_page(v) (mem_map + (virt_to_phys(v) >> PAGE_SHIFT)) +#endif + +#ifndef pci_map_page +#define pci_map_page _kc_pci_map_page +u64 _kc_pci_map_page(struct pci_dev *dev, struct page *page, unsigned long offset, size_t size, int direction); +#endif + +#ifndef pci_unmap_page +#define pci_unmap_page _kc_pci_unmap_page +void _kc_pci_unmap_page(struct pci_dev *dev, u64 dma_addr, size_t size, int direction); +#endif + +/* pci_set_dma_mask takes dma_addr_t, which is only 32-bits prior to 2.4.13 */ + +#undef DMA_32BIT_MASK +#define DMA_32BIT_MASK 0xffffffff +#undef DMA_64BIT_MASK +#define DMA_64BIT_MASK 0xffffffff + +/**************************************/ +/* OTHER */ + +#ifndef cpu_relax +#define cpu_relax() rep_nop() +#endif + +struct vlan_ethhdr { + unsigned char h_dest[ETH_ALEN]; + unsigned char h_source[ETH_ALEN]; + unsigned short h_vlan_proto; + unsigned short h_vlan_TCI; + unsigned short h_vlan_encapsulated_proto; +}; +#endif /* 2.4.13 => 2.4.12 */ + +/*****************************************************************************/ +/* 2.4.17 => 2.4.12 */ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,4,17) ) + +#ifndef __devexit_p + #define __devexit_p(x) &(x) +#endif + +#endif /* 2.4.17 => 2.4.13 */ + +/*****************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,4,18) ) +#define NETIF_MSG_HW 0x2000 +#define NETIF_MSG_WOL 0x4000 + +#ifndef netif_msg_hw +#define netif_msg_hw(p) ((p)->msg_enable & NETIF_MSG_HW) +#endif +#ifndef netif_msg_wol +#define netif_msg_wol(p) ((p)->msg_enable & NETIF_MSG_WOL) +#endif +#endif /* 2.4.18 */ + +/*****************************************************************************/ + +/*****************************************************************************/ +/* 2.4.20 => 2.4.19 */ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,4,20) ) + +/* we won't support NAPI on less than 2.4.20 */ +#ifdef NAPI +#undef NAPI +#endif + +#endif /* 2.4.20 => 2.4.19 */ + +/*****************************************************************************/ +/* 2.4.22 => 2.4.17 */ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,4,22) ) +#define pci_name(x) ((x)->slot_name) +#define cpu_online(cpuid) test_bit((cpuid), &cpu_online_map) + +#ifndef SUPPORTED_10000baseT_Full +#define SUPPORTED_10000baseT_Full BIT(12) +#endif +#ifndef ADVERTISED_10000baseT_Full +#define ADVERTISED_10000baseT_Full BIT(12) +#endif +#endif + +/*****************************************************************************/ +/* 2.4.22 => 2.4.17 */ + +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,4,22) ) +#endif + +/*****************************************************************************/ +/*****************************************************************************/ +/* 2.4.23 => 2.4.22 */ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,4,23) ) +/*****************************************************************************/ +#ifdef NAPI +#ifndef netif_poll_disable +#define netif_poll_disable(x) _kc_netif_poll_disable(x) +static inline void _kc_netif_poll_disable(struct net_device *netdev) +{ + while (test_and_set_bit(__LINK_STATE_RX_SCHED, &netdev->state)) { + /* No hurry */ + current->state = TASK_INTERRUPTIBLE; + schedule_timeout(1); + } +} +#endif +#ifndef netif_poll_enable +#define netif_poll_enable(x) _kc_netif_poll_enable(x) +static inline void _kc_netif_poll_enable(struct net_device *netdev) +{ + clear_bit(__LINK_STATE_RX_SCHED, &netdev->state); +} +#endif +#endif /* NAPI */ +#ifndef netif_tx_disable +#define netif_tx_disable(x) _kc_netif_tx_disable(x) +static inline void _kc_netif_tx_disable(struct net_device *dev) +{ + spin_lock_bh(&dev->xmit_lock); + netif_stop_queue(dev); + spin_unlock_bh(&dev->xmit_lock); +} +#endif +#else /* 2.4.23 => 2.4.22 */ +#define HAVE_SCTP +#endif /* 2.4.23 => 2.4.22 */ + +/*****************************************************************************/ +/* 2.6.4 => 2.6.0 */ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,4,25) || \ + ( LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0) && \ + LINUX_VERSION_CODE < KERNEL_VERSION(2,6,4) ) ) +#define ETHTOOL_OPS_COMPAT +#endif /* 2.6.4 => 2.6.0 */ + +/*****************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,4,27) ) +#define __user +#endif /* < 2.4.27 */ + +/*****************************************************************************/ +/* 2.5.71 => 2.4.x */ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,5,71) ) +#define sk_protocol protocol +#define pci_get_device pci_find_device +#endif /* 2.5.70 => 2.4.x */ + +/*****************************************************************************/ +/* < 2.4.27 or 2.6.0 <= 2.6.5 */ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,4,27) || \ + ( LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0) && \ + LINUX_VERSION_CODE < KERNEL_VERSION(2,6,5) ) ) + +#ifndef netif_msg_init +#define netif_msg_init _kc_netif_msg_init +static inline u32 _kc_netif_msg_init(int debug_value, int default_msg_enable_bits) +{ + /* use default */ + if (debug_value < 0 || debug_value >= (sizeof(u32) * 8)) + return default_msg_enable_bits; + if (debug_value == 0) /* no output */ + return 0; + /* set low N bits */ + return (1 << debug_value) -1; +} +#endif + +#endif /* < 2.4.27 or 2.6.0 <= 2.6.5 */ +/*****************************************************************************/ +#if (( LINUX_VERSION_CODE < KERNEL_VERSION(2,4,27) ) || \ + (( LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0) ) && \ + ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,3) ))) +#define netdev_priv(x) x->priv +#endif + +/*****************************************************************************/ +/* <= 2.5.0 */ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0) ) +#include +#undef pci_register_driver +#define pci_register_driver pci_module_init + +/* + * Most of the dma compat code is copied/modifed from the 2.4.37 + * /include/linux/libata-compat.h header file + */ +/* These definitions mirror those in pci.h, so they can be used + * interchangeably with their PCI_ counterparts */ +enum dma_data_direction { + DMA_BIDIRECTIONAL = 0, + DMA_TO_DEVICE = 1, + DMA_FROM_DEVICE = 2, + DMA_NONE = 3, +}; + +struct device { + struct pci_dev pdev; +}; + +static inline struct pci_dev *to_pci_dev (struct device *dev) +{ + return (struct pci_dev *) dev; +} +static inline struct device *pci_dev_to_dev(struct pci_dev *pdev) +{ + return (struct device *) pdev; +} +#define pdev_printk(lvl, pdev, fmt, args...) \ + printk("%s %s: " fmt, lvl, pci_name(pdev), ## args) +#define dev_err(dev, fmt, args...) \ + pdev_printk(KERN_ERR, to_pci_dev(dev), fmt, ## args) +#define dev_info(dev, fmt, args...) \ + pdev_printk(KERN_INFO, to_pci_dev(dev), fmt, ## args) +#define dev_warn(dev, fmt, args...) \ + pdev_printk(KERN_WARNING, to_pci_dev(dev), fmt, ## args) +#define dev_notice(dev, fmt, args...) \ + pdev_printk(KERN_NOTICE, to_pci_dev(dev), fmt, ## args) +#define dev_dbg(dev, fmt, args...) \ + pdev_printk(KERN_DEBUG, to_pci_dev(dev), fmt, ## args) + +/* NOTE: dangerous! we ignore the 'gfp' argument */ +#define dma_alloc_coherent(dev,sz,dma,gfp) \ + pci_alloc_consistent(to_pci_dev(dev),(sz),(dma)) +#define dma_free_coherent(dev,sz,addr,dma_addr) \ + pci_free_consistent(to_pci_dev(dev),(sz),(addr),(dma_addr)) + +#define dma_map_page(dev,a,b,c,d) \ + pci_map_page(to_pci_dev(dev),(a),(b),(c),(d)) +#define dma_unmap_page(dev,a,b,c) \ + pci_unmap_page(to_pci_dev(dev),(a),(b),(c)) + +#define dma_map_single(dev,a,b,c) \ + pci_map_single(to_pci_dev(dev),(a),(b),(c)) +#define dma_unmap_single(dev,a,b,c) \ + pci_unmap_single(to_pci_dev(dev),(a),(b),(c)) + +#define dma_map_sg(dev, sg, nents, dir) \ + pci_map_sg(to_pci_dev(dev), (sg), (nents), (dir) +#define dma_unmap_sg(dev, sg, nents, dir) \ + pci_unmap_sg(to_pci_dev(dev), (sg), (nents), (dir) + +#define dma_sync_single(dev,a,b,c) \ + pci_dma_sync_single(to_pci_dev(dev),(a),(b),(c)) + +/* for range just sync everything, that's all the pci API can do */ +#define dma_sync_single_range(dev,addr,off,sz,dir) \ + pci_dma_sync_single(to_pci_dev(dev),(addr),(off)+(sz),(dir)) + +#define dma_set_mask(dev,mask) \ + pci_set_dma_mask(to_pci_dev(dev),(mask)) + +/* hlist_* code - double linked lists */ +struct hlist_head { + struct hlist_node *first; +}; + +struct hlist_node { + struct hlist_node *next, **pprev; +}; + +static inline void __hlist_del(struct hlist_node *n) +{ + struct hlist_node *next = n->next; + struct hlist_node **pprev = n->pprev; + *pprev = next; + if (next) + next->pprev = pprev; +} + +static inline void hlist_del(struct hlist_node *n) +{ + __hlist_del(n); + n->next = NULL; + n->pprev = NULL; +} + +static inline void hlist_add_head(struct hlist_node *n, struct hlist_head *h) +{ + struct hlist_node *first = h->first; + n->next = first; + if (first) + first->pprev = &n->next; + h->first = n; + n->pprev = &h->first; +} + +static inline int hlist_empty(const struct hlist_head *h) +{ + return !h->first; +} +#define HLIST_HEAD_INIT { .first = NULL } +#define HLIST_HEAD(name) struct hlist_head name = { .first = NULL } +#define INIT_HLIST_HEAD(ptr) ((ptr)->first = NULL) +static inline void INIT_HLIST_NODE(struct hlist_node *h) +{ + h->next = NULL; + h->pprev = NULL; +} + +#ifndef might_sleep +#define might_sleep() +#endif +#else +static inline struct device *pci_dev_to_dev(struct pci_dev *pdev) +{ + return &pdev->dev; +} +#endif /* <= 2.5.0 */ + +/*****************************************************************************/ +/* 2.5.28 => 2.4.23 */ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,5,28) ) + +#include +#define work_struct tq_struct +#undef INIT_WORK +#define INIT_WORK(a,b) INIT_TQUEUE(a,(void (*)(void *))b,a) +#undef container_of +#define container_of list_entry +#define schedule_work schedule_task +#define flush_scheduled_work flush_scheduled_tasks +#define cancel_work_sync(x) flush_scheduled_work() + +#endif /* 2.5.28 => 2.4.17 */ + +/*****************************************************************************/ +/* 2.6.0 => 2.5.28 */ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0) ) +#ifndef read_barrier_depends +#define read_barrier_depends() rmb() +#endif + +#ifndef rcu_head +struct __kc_callback_head { + struct __kc_callback_head *next; + void (*func)(struct callback_head *head); +}; +#define rcu_head __kc_callback_head +#endif + +#undef get_cpu +#define get_cpu() smp_processor_id() +#undef put_cpu +#define put_cpu() do { } while(0) +#define MODULE_INFO(version, _version) +#ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT +#define CONFIG_E1000_DISABLE_PACKET_SPLIT 1 +#endif +#ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT +#define CONFIG_IGB_DISABLE_PACKET_SPLIT 1 +#endif +#ifndef CONFIG_IGC_DISABLE_PACKET_SPLIT +#define CONFIG_IGC_DISABLE_PACKET_SPLIT 1 +#endif + +#define dma_set_coherent_mask(dev,mask) 1 + +#undef dev_put +#define dev_put(dev) __dev_put(dev) + +#ifndef skb_fill_page_desc +#define skb_fill_page_desc _kc_skb_fill_page_desc +void _kc_skb_fill_page_desc(struct sk_buff *skb, int i, struct page *page, int off, int size); +#endif + +#undef ALIGN +#define ALIGN(x,a) (((x)+(a)-1)&~((a)-1)) + +#ifndef page_count +#define page_count(p) atomic_read(&(p)->count) +#endif + +#ifdef MAX_NUMNODES +#undef MAX_NUMNODES +#endif +#define MAX_NUMNODES 1 + +/* find_first_bit and find_next bit are not defined for most + * 2.4 kernels (except for the redhat 2.4.21 kernels + */ +#include +#define BITOP_WORD(nr) ((nr) / BITS_PER_LONG) +#undef find_next_bit +#define find_next_bit _kc_find_next_bit +unsigned long _kc_find_next_bit(const unsigned long *addr, unsigned long size, + unsigned long offset); +#define find_first_bit(addr, size) find_next_bit((addr), (size), 0) + +#ifndef netdev_name +static inline const char *_kc_netdev_name(const struct net_device *dev) +{ + if (strchr(dev->name, '%')) + return "(unregistered net_device)"; + return dev->name; +} +#define netdev_name(netdev) _kc_netdev_name(netdev) +#endif /* netdev_name */ + +#ifndef strlcpy +#define strlcpy _kc_strlcpy +size_t _kc_strlcpy(char *dest, const char *src, size_t size); +#endif /* strlcpy */ + +#ifndef do_div +#if BITS_PER_LONG == 64 +# define do_div(n,base) ({ \ + uint32_t __base = (base); \ + uint32_t __rem; \ + __rem = ((uint64_t)(n)) % __base; \ + (n) = ((uint64_t)(n)) / __base; \ + __rem; \ + }) +#elif BITS_PER_LONG == 32 +uint32_t _kc__div64_32(uint64_t *dividend, uint32_t divisor); +# define do_div(n,base) ({ \ + uint32_t __base = (base); \ + uint32_t __rem; \ + if (likely(((n) >> 32) == 0)) { \ + __rem = (uint32_t)(n) % __base; \ + (n) = (uint32_t)(n) / __base; \ + } else \ + __rem = _kc__div64_32(&(n), __base); \ + __rem; \ + }) +#else /* BITS_PER_LONG == ?? */ +# error do_div() does not yet support the C64 +#endif /* BITS_PER_LONG */ +#endif /* do_div */ + +#ifndef NSEC_PER_SEC +#define NSEC_PER_SEC 1000000000L +#endif + +#undef HAVE_I2C_SUPPORT +#else /* 2.6.0 */ + +#endif /* 2.6.0 => 2.5.28 */ +/*****************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,3) ) +#define dma_pool pci_pool +#define dma_pool_destroy pci_pool_destroy +#define dma_pool_alloc pci_pool_alloc +#define dma_pool_free pci_pool_free + +#define dma_pool_create(name,dev,size,align,allocation) \ + pci_pool_create((name),to_pci_dev(dev),(size),(align),(allocation)) +#endif /* < 2.6.3 */ + +/*****************************************************************************/ +/* 2.6.4 => 2.6.0 */ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,4) ) +#define MODULE_VERSION(_version) MODULE_INFO(version, _version) +#endif /* 2.6.4 => 2.6.0 */ + +/*****************************************************************************/ +/* 2.6.5 => 2.6.0 */ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,5) ) +#define dma_sync_single_for_cpu dma_sync_single +#define dma_sync_single_for_device dma_sync_single +#define dma_sync_single_range_for_cpu dma_sync_single_range +#define dma_sync_single_range_for_device dma_sync_single_range +#ifndef pci_dma_mapping_error +#define pci_dma_mapping_error _kc_pci_dma_mapping_error +static inline int _kc_pci_dma_mapping_error(dma_addr_t dma_addr) +{ + return dma_addr == 0; +} +#endif +#endif /* 2.6.5 => 2.6.0 */ + +/*****************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,4) ) +int _kc_scnprintf(char * buf, size_t size, const char *fmt, ...); +#define scnprintf(buf, size, fmt, args...) _kc_scnprintf(buf, size, fmt, ##args) +#endif /* < 2.6.4 */ + +/*****************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,6) ) +/* taken from 2.6 include/linux/bitmap.h */ +#undef bitmap_zero +#define bitmap_zero _kc_bitmap_zero +static inline void _kc_bitmap_zero(unsigned long *dst, int nbits) +{ + if (nbits <= BITS_PER_LONG) + *dst = 0UL; + else { + int len = BITS_TO_LONGS(nbits) * sizeof(unsigned long); + memset(dst, 0, len); + } +} +#define page_to_nid(x) 0 + +#endif /* < 2.6.6 */ + +/*****************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,7) ) +#undef if_mii +#define if_mii _kc_if_mii +static inline struct mii_ioctl_data *_kc_if_mii(struct ifreq *rq) +{ + return (struct mii_ioctl_data *) &rq->ifr_ifru; +} + +#ifndef __force +#define __force +#endif +#endif /* < 2.6.7 */ + +/*****************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,8) ) +#ifndef PCI_EXP_DEVCTL +#define PCI_EXP_DEVCTL 8 +#endif +#ifndef PCI_EXP_DEVCTL_CERE +#define PCI_EXP_DEVCTL_CERE 0x0001 +#endif +#define PCI_EXP_FLAGS 2 /* Capabilities register */ +#define PCI_EXP_FLAGS_VERS 0x000f /* Capability version */ +#define PCI_EXP_FLAGS_TYPE 0x00f0 /* Device/Port type */ +#define PCI_EXP_TYPE_ENDPOINT 0x0 /* Express Endpoint */ +#define PCI_EXP_TYPE_LEG_END 0x1 /* Legacy Endpoint */ +#define PCI_EXP_TYPE_ROOT_PORT 0x4 /* Root Port */ +#define PCI_EXP_TYPE_DOWNSTREAM 0x6 /* Downstream Port */ +#define PCI_EXP_FLAGS_SLOT 0x0100 /* Slot implemented */ +#define PCI_EXP_DEVCAP 4 /* Device capabilities */ +#define PCI_EXP_DEVSTA 10 /* Device Status */ +#define msleep(x) do { set_current_state(TASK_UNINTERRUPTIBLE); \ + schedule_timeout((x * HZ)/1000 + 2); \ + } while (0) + +#endif /* < 2.6.8 */ + +/*****************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,9)) +#include +#define __iomem + +#ifndef kcalloc +#define kcalloc(n, size, flags) _kc_kzalloc(((n) * (size)), flags) +void *_kc_kzalloc(size_t size, int flags); +#endif +#define MSEC_PER_SEC 1000L +static inline unsigned int _kc_jiffies_to_msecs(const unsigned long j) +{ +#if HZ <= MSEC_PER_SEC && !(MSEC_PER_SEC % HZ) + return (MSEC_PER_SEC / HZ) * j; +#elif HZ > MSEC_PER_SEC && !(HZ % MSEC_PER_SEC) + return (j + (HZ / MSEC_PER_SEC) - 1)/(HZ / MSEC_PER_SEC); +#else + return (j * MSEC_PER_SEC) / HZ; +#endif +} +static inline unsigned long _kc_msecs_to_jiffies(const unsigned int m) +{ + if (m > _kc_jiffies_to_msecs(MAX_JIFFY_OFFSET)) + return MAX_JIFFY_OFFSET; +#if HZ <= MSEC_PER_SEC && !(MSEC_PER_SEC % HZ) + return (m + (MSEC_PER_SEC / HZ) - 1) / (MSEC_PER_SEC / HZ); +#elif HZ > MSEC_PER_SEC && !(HZ % MSEC_PER_SEC) + return m * (HZ / MSEC_PER_SEC); +#else + return (m * HZ + MSEC_PER_SEC - 1) / MSEC_PER_SEC; +#endif +} + +#define msleep_interruptible _kc_msleep_interruptible +static inline unsigned long _kc_msleep_interruptible(unsigned int msecs) +{ + unsigned long timeout = _kc_msecs_to_jiffies(msecs) + 1; + + while (timeout && !signal_pending(current)) { + __set_current_state(TASK_INTERRUPTIBLE); + timeout = schedule_timeout(timeout); + } + return _kc_jiffies_to_msecs(timeout); +} + +/* Basic mode control register. */ +#define BMCR_SPEED1000 0x0040 /* MSB of Speed (1000) */ + +#ifndef __le16 +#define __le16 u16 +#endif +#ifndef __le32 +#define __le32 u32 +#endif +#ifndef __le64 +#define __le64 u64 +#endif +#ifndef __be16 +#define __be16 u16 +#endif +#ifndef __be32 +#define __be32 u32 +#endif +#ifndef __be64 +#define __be64 u64 +#endif + +static inline struct vlan_ethhdr *vlan_eth_hdr(const struct sk_buff *skb) +{ + return (struct vlan_ethhdr *)skb->mac.raw; +} + +/* Wake-On-Lan options. */ +#define WAKE_PHY BIT(0) +#define WAKE_UCAST BIT(1) +#define WAKE_MCAST BIT(2) +#define WAKE_BCAST BIT(3) +#define WAKE_ARP BIT(4) +#define WAKE_MAGIC BIT(5) +#define WAKE_MAGICSECURE BIT(6) /* only meaningful if WAKE_MAGIC */ + +#define skb_header_pointer _kc_skb_header_pointer +static inline void *_kc_skb_header_pointer(const struct sk_buff *skb, + int offset, int len, void *buffer) +{ + int hlen = skb_headlen(skb); + + if (hlen - offset >= len) + return skb->data + offset; + +#ifdef MAX_SKB_FRAGS + if (skb_copy_bits(skb, offset, buffer, len) < 0) + return NULL; + + return buffer; +#else + return NULL; +#endif + +#ifndef NETDEV_TX_OK +#define NETDEV_TX_OK 0 +#endif +#ifndef NETDEV_TX_BUSY +#define NETDEV_TX_BUSY 1 +#endif +#ifndef NETDEV_TX_LOCKED +#define NETDEV_TX_LOCKED -1 +#endif +} + +#ifndef __bitwise +#define __bitwise +#endif +#endif /* < 2.6.9 */ + +/*****************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,10) ) +#ifdef module_param_array_named +#undef module_param_array_named +#define module_param_array_named(name, array, type, nump, perm) \ + static struct kparam_array __param_arr_##name \ + = { ARRAY_SIZE(array), nump, param_set_##type, param_get_##type, \ + sizeof(array[0]), array }; \ + module_param_call(name, param_array_set, param_array_get, \ + &__param_arr_##name, perm) +#endif /* module_param_array_named */ +/* + * num_online is broken for all < 2.6.10 kernels. This is needed to support + * Node module parameter of ixgbe. + */ +#undef num_online_nodes +#define num_online_nodes(n) 1 +extern DECLARE_BITMAP(_kcompat_node_online_map, MAX_NUMNODES); +#undef node_online_map +#define node_online_map _kcompat_node_online_map +#define pci_get_class pci_find_class +#endif /* < 2.6.10 */ + +/*****************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,11) ) +#define PCI_D0 0 +#define PCI_D1 1 +#define PCI_D2 2 +#define PCI_D3hot 3 +#define PCI_D3cold 4 +typedef int pci_power_t; +#define pci_choose_state(pdev,state) state +#define PMSG_SUSPEND 3 +#define PCI_EXP_LNKCTL 16 + +#undef NETIF_F_LLTX + +#ifndef ARCH_HAS_PREFETCH +#define prefetch(X) +#endif + +#ifndef NET_IP_ALIGN +#define NET_IP_ALIGN 2 +#endif + +#define KC_USEC_PER_SEC 1000000L +#define usecs_to_jiffies _kc_usecs_to_jiffies +static inline unsigned int _kc_jiffies_to_usecs(const unsigned long j) +{ +#if HZ <= KC_USEC_PER_SEC && !(KC_USEC_PER_SEC % HZ) + return (KC_USEC_PER_SEC / HZ) * j; +#elif HZ > KC_USEC_PER_SEC && !(HZ % KC_USEC_PER_SEC) + return (j + (HZ / KC_USEC_PER_SEC) - 1)/(HZ / KC_USEC_PER_SEC); +#else + return (j * KC_USEC_PER_SEC) / HZ; +#endif +} +static inline unsigned long _kc_usecs_to_jiffies(const unsigned int m) +{ + if (m > _kc_jiffies_to_usecs(MAX_JIFFY_OFFSET)) + return MAX_JIFFY_OFFSET; +#if HZ <= KC_USEC_PER_SEC && !(KC_USEC_PER_SEC % HZ) + return (m + (KC_USEC_PER_SEC / HZ) - 1) / (KC_USEC_PER_SEC / HZ); +#elif HZ > KC_USEC_PER_SEC && !(HZ % KC_USEC_PER_SEC) + return m * (HZ / KC_USEC_PER_SEC); +#else + return (m * HZ + KC_USEC_PER_SEC - 1) / KC_USEC_PER_SEC; +#endif +} + +#define PCI_EXP_LNKCAP 12 /* Link Capabilities */ +#define PCI_EXP_LNKSTA 18 /* Link Status */ +#define PCI_EXP_SLTCAP 20 /* Slot Capabilities */ +#define PCI_EXP_SLTCTL 24 /* Slot Control */ +#define PCI_EXP_SLTSTA 26 /* Slot Status */ +#define PCI_EXP_RTCTL 28 /* Root Control */ +#define PCI_EXP_RTCAP 30 /* Root Capabilities */ +#define PCI_EXP_RTSTA 32 /* Root Status */ +#endif /* < 2.6.11 */ + +/*****************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,12) ) +#include +#define USE_REBOOT_NOTIFIER + +/* Generic MII registers. */ +#define MII_CTRL1000 0x09 /* 1000BASE-T control */ +#define MII_STAT1000 0x0a /* 1000BASE-T status */ +/* Advertisement control register. */ +#define ADVERTISE_PAUSE_CAP 0x0400 /* Try for pause */ +#define ADVERTISE_PAUSE_ASYM 0x0800 /* Try for asymmetric pause */ +/* Link partner ability register. */ +#define LPA_PAUSE_CAP 0x0400 /* Can pause */ +#define LPA_PAUSE_ASYM 0x0800 /* Can pause asymetrically */ +/* 1000BASE-T Control register */ +#define ADVERTISE_1000FULL 0x0200 /* Advertise 1000BASE-T full duplex */ +#define ADVERTISE_1000HALF 0x0100 /* Advertise 1000BASE-T half duplex */ +/* 1000BASE-T Status register */ +#define LPA_1000LOCALRXOK 0x2000 /* Link partner local receiver status */ +#define LPA_1000REMRXOK 0x1000 /* Link partner remote receiver status */ + +#ifndef is_zero_ether_addr +#define is_zero_ether_addr _kc_is_zero_ether_addr +static inline int _kc_is_zero_ether_addr(const u8 *addr) +{ + return !(addr[0] | addr[1] | addr[2] | addr[3] | addr[4] | addr[5]); +} +#endif /* is_zero_ether_addr */ +#ifndef is_multicast_ether_addr +#define is_multicast_ether_addr _kc_is_multicast_ether_addr +static inline int _kc_is_multicast_ether_addr(const u8 *addr) +{ + return addr[0] & 0x01; +} +#endif /* is_multicast_ether_addr */ +#endif /* < 2.6.12 */ + +/*****************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,13) ) +#ifndef kstrdup +#define kstrdup _kc_kstrdup +char *_kc_kstrdup(const char *s, unsigned int gfp); +#endif +#endif /* < 2.6.13 */ + +/*****************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,14) ) +#define pm_message_t u32 +#ifndef kzalloc +#define kzalloc _kc_kzalloc +void *_kc_kzalloc(size_t size, int flags); +#endif + +/* Generic MII registers. */ +#define MII_ESTATUS 0x0f /* Extended Status */ +/* Basic mode status register. */ +#define BMSR_ESTATEN 0x0100 /* Extended Status in R15 */ +/* Extended status register. */ +#define ESTATUS_1000_TFULL 0x2000 /* Can do 1000BT Full */ +#define ESTATUS_1000_THALF 0x1000 /* Can do 1000BT Half */ + +#define SUPPORTED_Pause BIT(13) +#define SUPPORTED_Asym_Pause BIT(14) +#define ADVERTISED_Pause BIT(13) +#define ADVERTISED_Asym_Pause BIT(14) + +#if (!(RHEL_RELEASE_CODE && \ + (RHEL_RELEASE_CODE > RHEL_RELEASE_VERSION(4,3)) && \ + (RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(5,0)))) +#if ((LINUX_VERSION_CODE == KERNEL_VERSION(2,6,9)) && !defined(gfp_t)) +#define gfp_t unsigned +#else +typedef unsigned gfp_t; +#endif +#endif /* !RHEL4.3->RHEL5.0 */ + +#if ( LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,9) ) +#ifdef CONFIG_X86_64 +#define dma_sync_single_range_for_cpu(dev, addr, off, sz, dir) \ + dma_sync_single_for_cpu((dev), (addr), (off) + (sz), (dir)) +#define dma_sync_single_range_for_device(dev, addr, off, sz, dir) \ + dma_sync_single_for_device((dev), (addr), (off) + (sz), (dir)) +#endif +#endif +#endif /* < 2.6.14 */ + +/*****************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,15) ) +#ifndef kfree_rcu +/* this is placed here due to a lack of rcu_barrier in previous kernels */ +#define kfree_rcu(_ptr, _offset) kfree(_ptr) +#endif /* kfree_rcu */ +#ifndef vmalloc_node +#define vmalloc_node(a,b) vmalloc(a) +#endif /* vmalloc_node*/ + +#define setup_timer(_timer, _function, _data) \ +do { \ + (_timer)->function = _function; \ + (_timer)->data = _data; \ + init_timer(_timer); \ +} while (0) +#ifndef device_can_wakeup +#define device_can_wakeup(dev) (1) +#endif +#ifndef device_set_wakeup_enable +#define device_set_wakeup_enable(dev, val) do{}while(0) +#endif +#ifndef device_init_wakeup +#define device_init_wakeup(dev,val) do {} while (0) +#endif +static inline unsigned _kc_compare_ether_addr(const u8 *addr1, const u8 *addr2) +{ + const u16 *a = (const u16 *) addr1; + const u16 *b = (const u16 *) addr2; + + return ((a[0] ^ b[0]) | (a[1] ^ b[1]) | (a[2] ^ b[2])) != 0; +} +#undef compare_ether_addr +#define compare_ether_addr(addr1, addr2) _kc_compare_ether_addr(addr1, addr2) +#endif /* < 2.6.15 */ + +/*****************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,16) ) +#undef DEFINE_MUTEX +#define DEFINE_MUTEX(x) DECLARE_MUTEX(x) +#define mutex_lock(x) down_interruptible(x) +#define mutex_unlock(x) up(x) + +#ifndef ____cacheline_internodealigned_in_smp +#ifdef CONFIG_SMP +#define ____cacheline_internodealigned_in_smp ____cacheline_aligned_in_smp +#else +#define ____cacheline_internodealigned_in_smp +#endif /* CONFIG_SMP */ +#endif /* ____cacheline_internodealigned_in_smp */ +#undef HAVE_PCI_ERS +#else /* 2.6.16 and above */ +#undef HAVE_PCI_ERS +#define HAVE_PCI_ERS +#if ( SLE_VERSION_CODE && SLE_VERSION_CODE == SLE_VERSION(10,4,0) ) +#ifdef device_can_wakeup +#undef device_can_wakeup +#endif /* device_can_wakeup */ +#define device_can_wakeup(dev) 1 +#endif /* SLE_VERSION(10,4,0) */ +#endif /* < 2.6.16 */ + +/*****************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,17) ) +#ifndef dev_notice +#define dev_notice(dev, fmt, args...) \ + dev_printk(KERN_NOTICE, dev, fmt, ## args) +#endif + +#ifndef first_online_node +#define first_online_node 0 +#endif +#ifndef NET_SKB_PAD +#define NET_SKB_PAD 16 +#endif +#endif /* < 2.6.17 */ + +/*****************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,18) ) + +#ifndef IRQ_HANDLED +#define irqreturn_t void +#define IRQ_HANDLED +#define IRQ_NONE +#endif + +#ifndef IRQF_PROBE_SHARED +#ifdef SA_PROBEIRQ +#define IRQF_PROBE_SHARED SA_PROBEIRQ +#else +#define IRQF_PROBE_SHARED 0 +#endif +#endif + +#ifndef IRQF_SHARED +#define IRQF_SHARED SA_SHIRQ +#endif + +#ifndef ARRAY_SIZE +#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) +#endif + +#ifndef skb_is_gso +#ifdef NETIF_F_TSO +#define skb_is_gso _kc_skb_is_gso +static inline int _kc_skb_is_gso(const struct sk_buff *skb) +{ + return skb_shinfo(skb)->gso_size; +} +#else +#define skb_is_gso(a) 0 +#endif +#endif + +#ifndef resource_size_t +#define resource_size_t unsigned long +#endif + +#ifdef skb_pad +#undef skb_pad +#endif +#define skb_pad(x,y) _kc_skb_pad(x, y) +int _kc_skb_pad(struct sk_buff *skb, int pad); +#ifdef skb_padto +#undef skb_padto +#endif +#define skb_padto(x,y) _kc_skb_padto(x, y) +static inline int _kc_skb_padto(struct sk_buff *skb, unsigned int len) +{ + unsigned int size = skb->len; + if(likely(size >= len)) + return 0; + return _kc_skb_pad(skb, len - size); +} + +#ifndef DECLARE_PCI_UNMAP_ADDR +#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \ + dma_addr_t ADDR_NAME +#define DECLARE_PCI_UNMAP_LEN(LEN_NAME) \ + u32 LEN_NAME +#define pci_unmap_addr(PTR, ADDR_NAME) \ + ((PTR)->ADDR_NAME) +#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) \ + (((PTR)->ADDR_NAME) = (VAL)) +#define pci_unmap_len(PTR, LEN_NAME) \ + ((PTR)->LEN_NAME) +#define pci_unmap_len_set(PTR, LEN_NAME, VAL) \ + (((PTR)->LEN_NAME) = (VAL)) +#endif /* DECLARE_PCI_UNMAP_ADDR */ +#endif /* < 2.6.18 */ + +/*****************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19) ) +enum pcie_link_width { + PCIE_LNK_WIDTH_RESRV = 0x00, + PCIE_LNK_X1 = 0x01, + PCIE_LNK_X2 = 0x02, + PCIE_LNK_X4 = 0x04, + PCIE_LNK_X8 = 0x08, + PCIE_LNK_X12 = 0x0C, + PCIE_LNK_X16 = 0x10, + PCIE_LNK_X32 = 0x20, + PCIE_LNK_WIDTH_UNKNOWN = 0xFF, +}; + +#if (!(RHEL_RELEASE_CODE && RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(5,0))) +#define i_private u.generic_ip +#endif /* >= RHEL 5.0 */ + +#ifndef DIV_ROUND_UP +#define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d)) +#endif +#ifndef __ALIGN_MASK +#define __ALIGN_MASK(x, mask) (((x) + (mask)) & ~(mask)) +#endif +#if ( LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0) ) +#if (!((RHEL_RELEASE_CODE && \ + ((RHEL_RELEASE_CODE > RHEL_RELEASE_VERSION(4,4) && \ + RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(5,0)) || \ + (RHEL_RELEASE_CODE > RHEL_RELEASE_VERSION(5,0)))))) +typedef irqreturn_t (*irq_handler_t)(int, void*, struct pt_regs *); +#endif +#if (RHEL_RELEASE_CODE && RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(6,0)) +#undef CONFIG_INET_LRO +#undef CONFIG_INET_LRO_MODULE +#undef CONFIG_FCOE +#undef CONFIG_FCOE_MODULE +#endif +typedef irqreturn_t (*new_handler_t)(int, void*); +static inline irqreturn_t _kc_request_irq(unsigned int irq, new_handler_t handler, unsigned long flags, const char *devname, void *dev_id) +#else /* 2.4.x */ +typedef void (*irq_handler_t)(int, void*, struct pt_regs *); +typedef void (*new_handler_t)(int, void*); +static inline int _kc_request_irq(unsigned int irq, new_handler_t handler, unsigned long flags, const char *devname, void *dev_id) +#endif /* >= 2.5.x */ +{ + irq_handler_t new_handler = (irq_handler_t) handler; + return request_irq(irq, new_handler, flags, devname, dev_id); +} + +#undef request_irq +#define request_irq(irq, handler, flags, devname, dev_id) _kc_request_irq((irq), (handler), (flags), (devname), (dev_id)) + +#define irq_handler_t new_handler_t + +#if ( LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,11) ) +#ifndef skb_checksum_help +static inline int __kc_skb_checksum_help(struct sk_buff *skb) +{ + return skb_checksum_help(skb, 0); +} +#define skb_checksum_help(skb) __kc_skb_checksum_help((skb)) +#endif +#endif /* < 2.6.19 && >= 2.6.11 */ + +/* pci_restore_state and pci_save_state handles MSI/PCIE from 2.6.19 */ +#if (!(RHEL_RELEASE_CODE && RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(5,4))) +#define PCIE_CONFIG_SPACE_LEN 256 +#define PCI_CONFIG_SPACE_LEN 64 +#define PCIE_LINK_STATUS 0x12 +#define pci_config_space_ich8lan() do {} while(0) +#undef pci_save_state +int _kc_pci_save_state(struct pci_dev *); +#define pci_save_state(pdev) _kc_pci_save_state(pdev) +#undef pci_restore_state +void _kc_pci_restore_state(struct pci_dev *); +#define pci_restore_state(pdev) _kc_pci_restore_state(pdev) +#endif /* !(RHEL_RELEASE_CODE >= RHEL 5.4) */ + +#ifdef HAVE_PCI_ERS +#undef free_netdev +void _kc_free_netdev(struct net_device *); +#define free_netdev(netdev) _kc_free_netdev(netdev) +#endif +#define pci_cleanup_aer_uncorrect_error_status(dev) do {} while (0) + +void *_kc_kmemdup(const void *src, size_t len, unsigned gfp); +#define kmemdup(src, len, gfp) _kc_kmemdup(src, len, gfp) +#ifndef bool +#define bool _Bool +#define true 1 +#define false 0 +#endif +#else /* 2.6.19 */ +#include +#include + +#define NEW_SKB_CSUM_HELP +#endif /* < 2.6.19 */ + +/*****************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20) ) +#if ( LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,28) ) +#undef INIT_WORK +#define INIT_WORK(_work, _func) \ +do { \ + INIT_LIST_HEAD(&(_work)->entry); \ + (_work)->pending = 0; \ + (_work)->func = (void (*)(void *))_func; \ + (_work)->data = _work; \ + init_timer(&(_work)->timer); \ +} while (0) +#endif + +#ifndef PCI_VDEVICE +#define PCI_VDEVICE(ven, dev) \ + PCI_VENDOR_ID_##ven, (dev), \ + PCI_ANY_ID, PCI_ANY_ID, 0, 0 +#endif + +#ifndef PCI_VENDOR_ID_INTEL +#define PCI_VENDOR_ID_INTEL 0x8086 +#endif + +#ifndef round_jiffies +#define round_jiffies(x) x +#endif + +#define csum_offset csum + +#define HAVE_EARLY_VMALLOC_NODE +#define dev_to_node(dev) -1 +#undef set_dev_node +/* remove compiler warning with b=b, for unused variable */ +#define set_dev_node(a, b) do { (b) = (b); } while(0) + +#if (!(RHEL_RELEASE_CODE && \ + (((RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(4,7)) && \ + (RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(5,0))) || \ + (RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(5,6)))) && \ + !(SLE_VERSION_CODE && SLE_VERSION_CODE >= SLE_VERSION(10,2,0))) +typedef __u16 __bitwise __sum16; +typedef __u32 __bitwise __wsum; +#endif + +#if (!(RHEL_RELEASE_CODE && \ + (((RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(4,7)) && \ + (RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(5,0))) || \ + (RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(5,4)))) && \ + !(SLE_VERSION_CODE && SLE_VERSION_CODE >= SLE_VERSION(10,2,0))) +static inline __wsum csum_unfold(__sum16 n) +{ + return (__force __wsum)n; +} +#endif + +#else /* < 2.6.20 */ +#define HAVE_DEVICE_NUMA_NODE +#endif /* < 2.6.20 */ + +/*****************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21) ) +#define to_net_dev(class) container_of(class, struct net_device, class_dev) +#define NETDEV_CLASS_DEV +#if (!(RHEL_RELEASE_CODE && RHEL_RELEASE_CODE > RHEL_RELEASE_VERSION(5,5))) +#define vlan_group_get_device(vg, id) (vg->vlan_devices[id]) +#define vlan_group_set_device(vg, id, dev) \ + do { \ + if (vg) vg->vlan_devices[id] = dev; \ + } while (0) +#endif /* !(RHEL_RELEASE_CODE > RHEL_RELEASE_VERSION(5,5)) */ +#define pci_channel_offline(pdev) (pdev->error_state && \ + pdev->error_state != pci_channel_io_normal) +#define pci_request_selected_regions(pdev, bars, name) \ + pci_request_regions(pdev, name) +#define pci_release_selected_regions(pdev, bars) pci_release_regions(pdev); + +#ifndef __aligned +#define __aligned(x) __attribute__((aligned(x))) +#endif + +struct pci_dev *_kc_netdev_to_pdev(struct net_device *netdev); +#define netdev_to_dev(netdev) \ + pci_dev_to_dev(_kc_netdev_to_pdev(netdev)) +#else /* 2.6.21 */ +static inline struct device *netdev_to_dev(struct net_device *netdev) +{ + return &netdev->dev; +} + +#endif /* < 2.6.21 */ + +/*****************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,22) ) +#define tcp_hdr(skb) (skb->h.th) +#define tcp_hdrlen(skb) (skb->h.th->doff << 2) +#define skb_transport_offset(skb) (skb->h.raw - skb->data) +#define skb_transport_header(skb) (skb->h.raw) +#define ipv6_hdr(skb) (skb->nh.ipv6h) +#define ip_hdr(skb) (skb->nh.iph) +#define skb_network_offset(skb) (skb->nh.raw - skb->data) +#define skb_network_header(skb) (skb->nh.raw) +#define skb_tail_pointer(skb) skb->tail +#define skb_reset_tail_pointer(skb) \ + do { \ + skb->tail = skb->data; \ + } while (0) +#define skb_set_tail_pointer(skb, offset) \ + do { \ + skb->tail = skb->data + offset; \ + } while (0) +#define skb_copy_to_linear_data(skb, from, len) \ + memcpy(skb->data, from, len) +#define skb_copy_to_linear_data_offset(skb, offset, from, len) \ + memcpy(skb->data + offset, from, len) +#define skb_network_header_len(skb) (skb->h.raw - skb->nh.raw) +#define pci_register_driver pci_module_init +#define skb_mac_header(skb) skb->mac.raw + +#ifdef NETIF_F_MULTI_QUEUE +#ifndef alloc_etherdev_mq +#define alloc_etherdev_mq(_a, _b) alloc_etherdev(_a) +#endif +#endif /* NETIF_F_MULTI_QUEUE */ + +#ifndef ETH_FCS_LEN +#define ETH_FCS_LEN 4 +#endif +#define cancel_work_sync(x) flush_scheduled_work() +#ifndef udp_hdr +#define udp_hdr _udp_hdr +static inline struct udphdr *_udp_hdr(const struct sk_buff *skb) +{ + return (struct udphdr *)skb_transport_header(skb); +} +#endif + +#ifdef cpu_to_be16 +#undef cpu_to_be16 +#endif +#define cpu_to_be16(x) __constant_htons(x) + +#if (!(RHEL_RELEASE_CODE && RHEL_RELEASE_CODE > RHEL_RELEASE_VERSION(5,1))) +enum { + DUMP_PREFIX_NONE, + DUMP_PREFIX_ADDRESS, + DUMP_PREFIX_OFFSET +}; +#endif /* !(RHEL_RELEASE_CODE > RHEL_RELEASE_VERSION(5,1)) */ +#ifndef hex_asc +#define hex_asc(x) "0123456789abcdef"[x] +#endif +#include +void _kc_print_hex_dump(const char *level, const char *prefix_str, + int prefix_type, int rowsize, int groupsize, + const void *buf, size_t len, bool ascii); +#define print_hex_dump(lvl, s, t, r, g, b, l, a) \ + _kc_print_hex_dump(lvl, s, t, r, g, b, l, a) +#ifndef ADVERTISED_2500baseX_Full +#define ADVERTISED_2500baseX_Full BIT(15) +#endif +#ifndef SUPPORTED_2500baseX_Full +#define SUPPORTED_2500baseX_Full BIT(15) +#endif + +#ifndef ETH_P_PAUSE +#define ETH_P_PAUSE 0x8808 +#endif + +static inline int compound_order(struct page *page) +{ + return 0; +} + +#define __must_be_array(a) 0 + +#ifndef SKB_WITH_OVERHEAD +#define SKB_WITH_OVERHEAD(X) \ + ((X) - SKB_DATA_ALIGN(sizeof(struct skb_shared_info))) +#endif +#else /* 2.6.22 */ +#define ETH_TYPE_TRANS_SETS_DEV +#define HAVE_NETDEV_STATS_IN_NETDEV +#endif /* < 2.6.22 */ + +/*****************************************************************************/ +#if ( LINUX_VERSION_CODE > KERNEL_VERSION(2,6,22) ) +#undef SET_MODULE_OWNER +#define SET_MODULE_OWNER(dev) do { } while (0) +#endif /* > 2.6.22 */ + +/*****************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,23) ) +#define netif_subqueue_stopped(_a, _b) 0 +#ifndef PTR_ALIGN +#define PTR_ALIGN(p, a) ((typeof(p))ALIGN((unsigned long)(p), (a))) +#endif + +#ifndef CONFIG_PM_SLEEP +#define CONFIG_PM_SLEEP CONFIG_PM +#endif + +#if ( LINUX_VERSION_CODE > KERNEL_VERSION(2,6,13) ) +#define HAVE_ETHTOOL_GET_PERM_ADDR +#endif /* 2.6.14 through 2.6.22 */ + +static inline int __kc_skb_cow_head(struct sk_buff *skb, unsigned int headroom) +{ + int delta = 0; + + if (headroom > (skb->data - skb->head)) + delta = headroom - (skb->data - skb->head); + + if (delta || skb_header_cloned(skb)) + return pskb_expand_head(skb, ALIGN(delta, NET_SKB_PAD), 0, + GFP_ATOMIC); + return 0; +} +#define skb_cow_head(s, h) __kc_skb_cow_head((s), (h)) +#endif /* < 2.6.23 */ + +/*****************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24) ) +#ifndef ETH_FLAG_LRO +#define ETH_FLAG_LRO NETIF_F_LRO +#endif + +#ifndef ACCESS_ONCE +#define ACCESS_ONCE(x) (*(volatile typeof(x) *)&(x)) +#endif + +/* if GRO is supported then the napi struct must already exist */ +#ifndef NETIF_F_GRO +/* NAPI API changes in 2.6.24 break everything */ +struct napi_struct { + /* used to look up the real NAPI polling routine */ + int (*poll)(struct napi_struct *, int); + struct net_device *dev; + int weight; +}; +#endif + +#ifdef NAPI +int __kc_adapter_clean(struct net_device *, int *); +/* The following definitions are multi-queue aware, and thus we have a driver + * define list which determines which drivers support multiple queues, and + * thus need these stronger defines. If a driver does not support multi-queue + * functionality, you don't need to add it to this list. + */ +struct net_device *napi_to_poll_dev(const struct napi_struct *napi); + +static inline void __kc_mq_netif_napi_add(struct net_device *dev, struct napi_struct *napi, + int (*poll)(struct napi_struct *, int), int weight) +{ + struct net_device *poll_dev = napi_to_poll_dev(napi); + poll_dev->poll = __kc_adapter_clean; + poll_dev->priv = napi; + poll_dev->weight = weight; + set_bit(__LINK_STATE_RX_SCHED, &poll_dev->state); + set_bit(__LINK_STATE_START, &poll_dev->state); + dev_hold(poll_dev); + napi->poll = poll; + napi->weight = weight; + napi->dev = dev; +} +#define netif_napi_add __kc_mq_netif_napi_add + +static inline void __kc_mq_netif_napi_del(struct napi_struct *napi) +{ + struct net_device *poll_dev = napi_to_poll_dev(napi); + WARN_ON(!test_bit(__LINK_STATE_RX_SCHED, &poll_dev->state)); + dev_put(poll_dev); + memset(poll_dev, 0, sizeof(struct net_device)); +} + +#define netif_napi_del __kc_mq_netif_napi_del + +static inline bool __kc_mq_napi_schedule_prep(struct napi_struct *napi) +{ + return netif_running(napi->dev) && + netif_rx_schedule_prep(napi_to_poll_dev(napi)); +} +#define napi_schedule_prep __kc_mq_napi_schedule_prep + +static inline void __kc_mq_napi_schedule(struct napi_struct *napi) +{ + if (napi_schedule_prep(napi)) + __netif_rx_schedule(napi_to_poll_dev(napi)); +} +#define napi_schedule __kc_mq_napi_schedule + +#define napi_enable(_napi) netif_poll_enable(napi_to_poll_dev(_napi)) +#define napi_disable(_napi) netif_poll_disable(napi_to_poll_dev(_napi)) +#ifdef CONFIG_SMP +static inline void napi_synchronize(const struct napi_struct *n) +{ + struct net_device *dev = napi_to_poll_dev(n); + + while (test_bit(__LINK_STATE_RX_SCHED, &dev->state)) { + /* No hurry. */ + msleep(1); + } +} +#else +#define napi_synchronize(n) barrier() +#endif /* CONFIG_SMP */ +#define __napi_schedule(_napi) __netif_rx_schedule(napi_to_poll_dev(_napi)) +static inline void _kc_napi_complete(struct napi_struct *napi) +{ +#ifdef NETIF_F_GRO + napi_gro_flush(napi); +#endif + netif_rx_complete(napi_to_poll_dev(napi)); +} +#define napi_complete _kc_napi_complete +#else /* NAPI */ + +/* The following definitions are only used if we don't support NAPI at all. */ + +static inline __kc_netif_napi_add(struct net_device *dev, struct napi_struct *napi, + int (*poll)(struct napi_struct *, int), int weight) +{ + dev->poll = poll; + dev->weight = weight; + napi->poll = poll; + napi->weight = weight; + napi->dev = dev; +} +#define netif_napi_del(_a) do {} while (0) +#endif /* NAPI */ + +#undef dev_get_by_name +#define dev_get_by_name(_a, _b) dev_get_by_name(_b) +#define __netif_subqueue_stopped(_a, _b) netif_subqueue_stopped(_a, _b) +#ifndef DMA_BIT_MASK +#define DMA_BIT_MASK(n) (((n) == 64) ? DMA_64BIT_MASK : ((1ULL<<(n))-1)) +#endif + +#ifdef NETIF_F_TSO6 +#define skb_is_gso_v6 _kc_skb_is_gso_v6 +static inline int _kc_skb_is_gso_v6(const struct sk_buff *skb) +{ + return skb_shinfo(skb)->gso_type & SKB_GSO_TCPV6; +} +#endif /* NETIF_F_TSO6 */ + +#ifndef KERN_CONT +#define KERN_CONT "" +#endif +#ifndef pr_err +#define pr_err(fmt, arg...) \ + printk(KERN_ERR fmt, ##arg) +#endif + +#ifndef rounddown_pow_of_two +#define rounddown_pow_of_two(n) \ + __builtin_constant_p(n) ? ( \ + (n == 1) ? 0 : \ + (1UL << ilog2(n))) : \ + (1UL << (fls_long(n) - 1)) +#endif + +#else /* < 2.6.24 */ +#define HAVE_ETHTOOL_GET_SSET_COUNT +#define HAVE_NETDEV_NAPI_LIST +#endif /* < 2.6.24 */ + +/*****************************************************************************/ +#if ( LINUX_VERSION_CODE > KERNEL_VERSION(2,6,24) ) +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(3,2,0) ) +#define INCLUDE_PM_QOS_PARAMS_H +#include +#else /* >= 3.2.0 */ +#include +#endif /* else >= 3.2.0 */ +#endif /* > 2.6.24 */ + +/*****************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,25) ) +#define PM_QOS_CPU_DMA_LATENCY 1 + +#if ( LINUX_VERSION_CODE > KERNEL_VERSION(2,6,18) ) +#include +#define PM_QOS_DEFAULT_VALUE INFINITE_LATENCY +#define pm_qos_add_requirement(pm_qos_class, name, value) \ + set_acceptable_latency(name, value) +#define pm_qos_remove_requirement(pm_qos_class, name) \ + remove_acceptable_latency(name) +#define pm_qos_update_requirement(pm_qos_class, name, value) \ + modify_acceptable_latency(name, value) +#else +#define PM_QOS_DEFAULT_VALUE -1 +#define pm_qos_add_requirement(pm_qos_class, name, value) +#define pm_qos_remove_requirement(pm_qos_class, name) +#define pm_qos_update_requirement(pm_qos_class, name, value) { \ + if (value != PM_QOS_DEFAULT_VALUE) { \ + printk(KERN_WARNING "%s: unable to set PM QoS requirement\n", \ + pci_name(adapter->pdev)); \ + } \ +} + +#endif /* > 2.6.18 */ + +#define pci_enable_device_mem(pdev) pci_enable_device(pdev) + +#ifndef DEFINE_PCI_DEVICE_TABLE +#define DEFINE_PCI_DEVICE_TABLE(_table) struct pci_device_id _table[] +#endif /* DEFINE_PCI_DEVICE_TABLE */ + +#ifndef strict_strtol +#define strict_strtol(s, b, r) _kc_strict_strtol(s, b, r) +static inline int _kc_strict_strtol(const char *buf, unsigned int base, long *res) +{ + /* adapted from strict_strtoul() in 2.6.25 */ + char *tail; + long val; + size_t len; + + *res = 0; + len = strlen(buf); + if (!len) + return -EINVAL; + val = simple_strtol(buf, &tail, base); + if (tail == buf) + return -EINVAL; + if ((*tail == '\0') || + ((len == (size_t)(tail - buf) + 1) && (*tail == '\n'))) { + *res = val; + return 0; + } + + return -EINVAL; +} +#endif + +#if ( LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0) ) +#ifndef IXGBE_PROCFS +#define IXGBE_PROCFS +#endif /* IXGBE_PROCFS */ +#endif /* >= 2.6.0 */ + +#else /* < 2.6.25 */ + +#if IS_ENABLED(CONFIG_SYSFS) +#ifndef IXGBE_SYSFS +#define IXGBE_SYSFS +#endif /* IXGBE_SYSFS */ +#endif /* CONFIG_SYSFS */ +#if IS_ENABLED(CONFIG_HWMON) +#ifndef IXGBE_HWMON +#define IXGBE_HWMON +#endif /* IXGBE_HWMON */ +#endif /* CONFIG_HWMON */ + +#endif /* < 2.6.25 */ + +/*****************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,26) ) +#ifndef clamp_t +#define clamp_t(type, val, min, max) ({ \ + type __val = (val); \ + type __min = (min); \ + type __max = (max); \ + __val = __val < __min ? __min : __val; \ + __val > __max ? __max : __val; }) +#endif /* clamp_t */ +#undef kzalloc_node +#define kzalloc_node(_size, _flags, _node) kzalloc(_size, _flags) + +void _kc_pci_disable_link_state(struct pci_dev *dev, int state); +#define pci_disable_link_state(p, s) _kc_pci_disable_link_state(p, s) +#else /* < 2.6.26 */ +#define NETDEV_CAN_SET_GSO_MAX_SIZE +#ifdef HAVE_PCI_ASPM_H +#include +#endif +#define HAVE_NETDEV_VLAN_FEATURES +#ifndef PCI_EXP_LNKCAP_ASPMS +#define PCI_EXP_LNKCAP_ASPMS 0x00000c00 /* ASPM Support */ +#endif /* PCI_EXP_LNKCAP_ASPMS */ +#endif /* < 2.6.26 */ +/*****************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,27) ) +static inline void _kc_ethtool_cmd_speed_set(struct ethtool_cmd *ep, + __u32 speed) +{ + ep->speed = (__u16)speed; + /* ep->speed_hi = (__u16)(speed >> 16); */ +} +#define ethtool_cmd_speed_set _kc_ethtool_cmd_speed_set + +static inline __u32 _kc_ethtool_cmd_speed(struct ethtool_cmd *ep) +{ + /* no speed_hi before 2.6.27, and probably no need for it yet */ + return (__u32)ep->speed; +} +#define ethtool_cmd_speed _kc_ethtool_cmd_speed + +#if ( LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,15) ) +#if ((LINUX_VERSION_CODE < KERNEL_VERSION(2,6,23)) && defined(CONFIG_PM)) +#define ANCIENT_PM 1 +#elif ((LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,23)) && \ + (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,26)) && \ + defined(CONFIG_PM_SLEEP)) +#define NEWER_PM 1 +#endif +#if defined(ANCIENT_PM) || defined(NEWER_PM) +#undef device_set_wakeup_enable +#define device_set_wakeup_enable(dev, val) \ + do { \ + u16 pmc = 0; \ + int pm = pci_find_capability(adapter->pdev, PCI_CAP_ID_PM); \ + if (pm) { \ + pci_read_config_word(adapter->pdev, pm + PCI_PM_PMC, \ + &pmc); \ + } \ + (dev)->power.can_wakeup = !!(pmc >> 11); \ + (dev)->power.should_wakeup = (val && (pmc >> 11)); \ + } while (0) +#endif /* 2.6.15-2.6.22 and CONFIG_PM or 2.6.23-2.6.25 and CONFIG_PM_SLEEP */ +#endif /* 2.6.15 through 2.6.27 */ +#ifndef netif_napi_del +#define netif_napi_del(_a) do {} while (0) +#ifdef NAPI +#ifdef CONFIG_NETPOLL +#undef netif_napi_del +#define netif_napi_del(_a) list_del(&(_a)->dev_list); +#endif +#endif +#endif /* netif_napi_del */ +#ifdef dma_mapping_error +#undef dma_mapping_error +#endif +#define dma_mapping_error(dev, dma_addr) pci_dma_mapping_error(dma_addr) + +#ifdef CONFIG_NETDEVICES_MULTIQUEUE +#define HAVE_TX_MQ +#endif + +#ifndef DMA_ATTR_WEAK_ORDERING +#define DMA_ATTR_WEAK_ORDERING 0 +#endif + +#ifdef HAVE_TX_MQ +void _kc_netif_tx_stop_all_queues(struct net_device *); +void _kc_netif_tx_wake_all_queues(struct net_device *); +void _kc_netif_tx_start_all_queues(struct net_device *); +#define netif_tx_stop_all_queues(a) _kc_netif_tx_stop_all_queues(a) +#define netif_tx_wake_all_queues(a) _kc_netif_tx_wake_all_queues(a) +#define netif_tx_start_all_queues(a) _kc_netif_tx_start_all_queues(a) +#undef netif_stop_subqueue +#define netif_stop_subqueue(_ndev,_qi) do { \ + if (netif_is_multiqueue((_ndev))) \ + netif_stop_subqueue((_ndev), (_qi)); \ + else \ + netif_stop_queue((_ndev)); \ + } while (0) +#undef netif_start_subqueue +#define netif_start_subqueue(_ndev,_qi) do { \ + if (netif_is_multiqueue((_ndev))) \ + netif_start_subqueue((_ndev), (_qi)); \ + else \ + netif_start_queue((_ndev)); \ + } while (0) +#else /* HAVE_TX_MQ */ +#define netif_tx_stop_all_queues(a) netif_stop_queue(a) +#define netif_tx_wake_all_queues(a) netif_wake_queue(a) +#if ( LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,12) ) +#define netif_tx_start_all_queues(a) netif_start_queue(a) +#else +#define netif_tx_start_all_queues(a) do {} while (0) +#endif +#define netif_stop_subqueue(_ndev,_qi) netif_stop_queue((_ndev)) +#define netif_start_subqueue(_ndev,_qi) netif_start_queue((_ndev)) +#endif /* HAVE_TX_MQ */ +#ifndef NETIF_F_MULTI_QUEUE +#define NETIF_F_MULTI_QUEUE 0 +#define netif_is_multiqueue(a) 0 +#define netif_wake_subqueue(a, b) +#endif /* NETIF_F_MULTI_QUEUE */ + +#ifndef __WARN_printf +void __kc_warn_slowpath(const char *file, const int line, + const char *fmt, ...) __attribute__((format(printf, 3, 4))); +#define __WARN_printf(arg...) __kc_warn_slowpath(__FILE__, __LINE__, arg) +#endif /* __WARN_printf */ + +#ifndef WARN +#define WARN(condition, format...) ({ \ + int __ret_warn_on = !!(condition); \ + if (unlikely(__ret_warn_on)) \ + __WARN_printf(format); \ + unlikely(__ret_warn_on); \ +}) +#endif /* WARN */ +#undef HAVE_IXGBE_DEBUG_FS +#undef HAVE_IGB_DEBUG_FS +#else /* < 2.6.27 */ +#define ethtool_cmd_speed_set _kc_ethtool_cmd_speed_set +static inline void _kc_ethtool_cmd_speed_set(struct ethtool_cmd *ep, + __u32 speed) +{ + ep->speed = (__u16)(speed & 0xFFFF); + ep->speed_hi = (__u16)(speed >> 16); +} +#define HAVE_TX_MQ +#define HAVE_NETDEV_SELECT_QUEUE +#ifdef CONFIG_DEBUG_FS +#define HAVE_IXGBE_DEBUG_FS +#define HAVE_IGB_DEBUG_FS +#endif /* CONFIG_DEBUG_FS */ +#endif /* < 2.6.27 */ + +/*****************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,28) ) +#define pci_ioremap_bar(pdev, bar) ioremap(pci_resource_start(pdev, bar), \ + pci_resource_len(pdev, bar)) +#define pci_wake_from_d3 _kc_pci_wake_from_d3 +#define pci_prepare_to_sleep _kc_pci_prepare_to_sleep +int _kc_pci_wake_from_d3(struct pci_dev *dev, bool enable); +int _kc_pci_prepare_to_sleep(struct pci_dev *dev); +#define netdev_alloc_page(a) alloc_page(GFP_ATOMIC) +#ifndef __skb_queue_head_init +static inline void __kc_skb_queue_head_init(struct sk_buff_head *list) +{ + list->prev = list->next = (struct sk_buff *)list; + list->qlen = 0; +} +#define __skb_queue_head_init(_q) __kc_skb_queue_head_init(_q) +#endif + +#define PCI_EXP_DEVCAP2 36 /* Device Capabilities 2 */ +#define PCI_EXP_DEVCTL2 40 /* Device Control 2 */ + +#define PCI_EXP_DEVCAP_FLR 0x10000000 /* Function Level Reset */ +#define PCI_EXP_DEVCTL_BCR_FLR 0x8000 /* Bridge Configuration Retry / FLR */ + +#endif /* < 2.6.28 */ + +/*****************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,29) ) +#ifndef swap +#define swap(a, b) \ + do { typeof(a) __tmp = (a); (a) = (b); (b) = __tmp; } while (0) +#endif +#define pci_request_selected_regions_exclusive(pdev, bars, name) \ + pci_request_selected_regions(pdev, bars, name) +#ifndef CONFIG_NR_CPUS +#define CONFIG_NR_CPUS 1 +#endif /* CONFIG_NR_CPUS */ +#ifndef pcie_aspm_enabled +#define pcie_aspm_enabled() (1) +#endif /* pcie_aspm_enabled */ + +#define PCI_EXP_SLTSTA_PDS 0x0040 /* Presence Detect State */ + +#ifndef PCI_EXP_LNKSTA_CLS +#define PCI_EXP_LNKSTA_CLS 0x000f /* Current Link Speed */ +#endif +#ifndef PCI_EXP_LNKSTA_NLW +#define PCI_EXP_LNKSTA_NLW 0x03f0 /* Negotiated Link Width */ +#endif + +#ifndef pci_clear_master +void _kc_pci_clear_main(struct pci_dev *dev); +#define pci_clear_master(dev) _kc_pci_clear_main(dev) +#endif + +#ifndef PCI_EXP_LNKCTL_ASPMC +#define PCI_EXP_LNKCTL_ASPMC 0x0003 /* ASPM Control */ +#endif + +#ifndef PCI_EXP_LNKCAP_MLW +#define PCI_EXP_LNKCAP_MLW 0x000003f0 /* Maximum Link Width */ +#endif + +#else /* < 2.6.29 */ +#ifndef HAVE_NET_DEVICE_OPS +#define HAVE_NET_DEVICE_OPS +#endif +#ifdef CONFIG_DCB +#define HAVE_PFC_MODE_ENABLE +#endif /* CONFIG_DCB */ +#endif /* < 2.6.29 */ + +/*****************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,30) ) +#define NO_PTP_SUPPORT +#define skb_rx_queue_recorded(a) false +#define skb_get_rx_queue(a) 0 +#define skb_record_rx_queue(a, b) do {} while (0) +#define skb_tx_hash(n, s) ___kc_skb_tx_hash((n), (s), (n)->real_num_tx_queues) +#undef CONFIG_FCOE +#undef CONFIG_FCOE_MODULE +#ifndef CONFIG_PCI_IOV +#undef pci_enable_sriov +#define pci_enable_sriov(a, b) -ENOTSUPP +#undef pci_disable_sriov +#define pci_disable_sriov(a) do {} while (0) +#endif /* CONFIG_PCI_IOV */ +#ifndef pr_cont +#define pr_cont(fmt, ...) \ + printk(KERN_CONT fmt, ##__VA_ARGS__) +#endif /* pr_cont */ +static inline void _kc_synchronize_irq(unsigned int a) +{ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,5,28) ) + synchronize_irq(); +#else /* < 2.5.28 */ + synchronize_irq(a); +#endif /* < 2.5.28 */ +} +#undef synchronize_irq +#define synchronize_irq(a) _kc_synchronize_irq(a) + +#define PCI_EXP_LNKCTL2 48 /* Link Control 2 */ + +#ifdef nr_cpus_node +#undef nr_cpus_node +#define nr_cpus_node(node) cpumask_weight(cpumask_of_node(node)) +#endif + +#if (RHEL_RELEASE_CODE && RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(5,5)) +#define HAVE_PCI_DEV_IS_VIRTFN_BIT +#endif /* RHEL >= 5.5 */ + +#if (!(RHEL_RELEASE_CODE && RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(5,5))) +static inline bool pci_is_root_bus(struct pci_bus *pbus) +{ + return !(pbus->parent); +} +#endif + +#else /* < 2.6.30 */ +#define HAVE_ASPM_QUIRKS +#define HAVE_PCI_DEV_IS_VIRTFN_BIT +#endif /* < 2.6.30 */ + +/*****************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,31) ) +#define ETH_P_1588 0x88F7 +#define ETH_P_FIP 0x8914 +#ifndef netdev_uc_count +#define netdev_uc_count(dev) ((dev)->uc_count) +#endif +#ifndef netdev_for_each_uc_addr +#define netdev_for_each_uc_addr(uclist, dev) \ + for (uclist = dev->uc_list; uclist; uclist = uclist->next) +#endif +#ifndef PORT_OTHER +#define PORT_OTHER 0xff +#endif +#ifndef MDIO_PHY_ID_PRTAD +#define MDIO_PHY_ID_PRTAD 0x03e0 +#endif +#ifndef MDIO_PHY_ID_DEVAD +#define MDIO_PHY_ID_DEVAD 0x001f +#endif +#ifndef skb_dst +#define skb_dst(s) ((s)->dst) +#endif + +#ifndef SUPPORTED_1000baseKX_Full +#define SUPPORTED_1000baseKX_Full BIT(17) +#endif +#ifndef SUPPORTED_10000baseKX4_Full +#define SUPPORTED_10000baseKX4_Full BIT(18) +#endif +#ifndef SUPPORTED_10000baseKR_Full +#define SUPPORTED_10000baseKR_Full BIT(19) +#endif + +#ifndef ADVERTISED_1000baseKX_Full +#define ADVERTISED_1000baseKX_Full BIT(17) +#endif +#ifndef ADVERTISED_10000baseKX4_Full +#define ADVERTISED_10000baseKX4_Full BIT(18) +#endif +#ifndef ADVERTISED_10000baseKR_Full +#define ADVERTISED_10000baseKR_Full BIT(19) +#endif + +static inline unsigned long dev_trans_start(struct net_device *dev) +{ + return dev->trans_start; +} +#else /* < 2.6.31 */ +#ifndef HAVE_NETDEV_STORAGE_ADDRESS +#define HAVE_NETDEV_STORAGE_ADDRESS +#endif +#ifndef HAVE_NETDEV_HW_ADDR +#define HAVE_NETDEV_HW_ADDR +#endif +#ifndef HAVE_TRANS_START_IN_QUEUE +#define HAVE_TRANS_START_IN_QUEUE +#endif +#ifndef HAVE_INCLUDE_LINUX_MDIO_H +#define HAVE_INCLUDE_LINUX_MDIO_H +#endif +#include +#endif /* < 2.6.31 */ + +/*****************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,32) ) +#undef netdev_tx_t +#define netdev_tx_t int +#if defined(CONFIG_FCOE) || defined(CONFIG_FCOE_MODULE) +#ifndef NETIF_F_FCOE_MTU +#define NETIF_F_FCOE_MTU BIT(26) +#endif +#endif /* CONFIG_FCOE || CONFIG_FCOE_MODULE */ + +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0) ) +static inline int _kc_pm_runtime_get_sync() +{ + return 1; +} +#define pm_runtime_get_sync(dev) _kc_pm_runtime_get_sync() +#else /* 2.6.0 => 2.6.32 */ +static inline int _kc_pm_runtime_get_sync(struct device __always_unused *dev) +{ + return 1; +} +#ifndef pm_runtime_get_sync +#define pm_runtime_get_sync(dev) _kc_pm_runtime_get_sync(dev) +#endif +#endif /* 2.6.0 => 2.6.32 */ +#ifndef pm_runtime_put +#define pm_runtime_put(dev) do {} while (0) +#endif +#ifndef pm_runtime_put_sync +#define pm_runtime_put_sync(dev) do {} while (0) +#endif +#ifndef pm_runtime_resume +#define pm_runtime_resume(dev) do {} while (0) +#endif +#ifndef pm_schedule_suspend +#define pm_schedule_suspend(dev, t) do {} while (0) +#endif +#ifndef pm_runtime_set_suspended +#define pm_runtime_set_suspended(dev) do {} while (0) +#endif +#ifndef pm_runtime_disable +#define pm_runtime_disable(dev) do {} while (0) +#endif +#ifndef pm_runtime_put_noidle +#define pm_runtime_put_noidle(dev) do {} while (0) +#endif +#ifndef pm_runtime_set_active +#define pm_runtime_set_active(dev) do {} while (0) +#endif +#ifndef pm_runtime_enable +#define pm_runtime_enable(dev) do {} while (0) +#endif +#ifndef pm_runtime_get_noresume +#define pm_runtime_get_noresume(dev) do {} while (0) +#endif +#else /* < 2.6.32 */ +#if (RHEL_RELEASE_CODE && \ + (RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(6,2)) && \ + (RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(7,0))) +#define HAVE_RHEL6_NET_DEVICE_EXTENDED +#endif /* RHEL >= 6.2 && RHEL < 7.0 */ +#if (RHEL_RELEASE_CODE && \ + (RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(6,6)) && \ + (RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(7,0))) +#define HAVE_RHEL6_NET_DEVICE_OPS_EXT +#define HAVE_NDO_SET_FEATURES +#endif /* RHEL >= 6.6 && RHEL < 7.0 */ +#if defined(CONFIG_FCOE) || defined(CONFIG_FCOE_MODULE) +#ifndef HAVE_NETDEV_OPS_FCOE_ENABLE +#define HAVE_NETDEV_OPS_FCOE_ENABLE +#endif +#endif /* CONFIG_FCOE || CONFIG_FCOE_MODULE */ +#ifdef CONFIG_DCB +#ifndef HAVE_DCBNL_OPS_GETAPP +#define HAVE_DCBNL_OPS_GETAPP +#endif +#endif /* CONFIG_DCB */ +#include +/* IOV bad DMA target work arounds require at least this kernel rev support */ +#define HAVE_PCIE_TYPE +#endif /* < 2.6.32 */ + +/*****************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,33) ) +#ifndef pci_pcie_cap +#define pci_pcie_cap(pdev) pci_find_capability(pdev, PCI_CAP_ID_EXP) +#endif +#ifndef IPV4_FLOW +#define IPV4_FLOW 0x10 +#endif /* IPV4_FLOW */ +#ifndef IPV6_FLOW +#define IPV6_FLOW 0x11 +#endif /* IPV6_FLOW */ +/* Features back-ported to RHEL6 or SLES11 SP1 after 2.6.32 */ +#if ( (RHEL_RELEASE_CODE && RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(6,0)) || \ + (SLE_VERSION_CODE && SLE_VERSION_CODE >= SLE_VERSION(11,1,0)) ) +#if defined(CONFIG_FCOE) || defined(CONFIG_FCOE_MODULE) +#ifndef HAVE_NETDEV_OPS_FCOE_GETWWN +#define HAVE_NETDEV_OPS_FCOE_GETWWN +#endif +#endif /* CONFIG_FCOE || CONFIG_FCOE_MODULE */ +#endif /* RHEL6 or SLES11 SP1 */ +#ifndef __percpu +#define __percpu +#endif /* __percpu */ + +#ifndef PORT_DA +#define PORT_DA PORT_OTHER +#endif /* PORT_DA */ +#ifndef PORT_NONE +#define PORT_NONE PORT_OTHER +#endif + +#if ((RHEL_RELEASE_CODE && \ + (RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(6,3)) && \ + (RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(7,0)))) +#if !defined(CONFIG_X86_32) && !defined(CONFIG_NEED_DMA_MAP_STATE) +#undef DEFINE_DMA_UNMAP_ADDR +#define DEFINE_DMA_UNMAP_ADDR(ADDR_NAME) dma_addr_t ADDR_NAME +#undef DEFINE_DMA_UNMAP_LEN +#define DEFINE_DMA_UNMAP_LEN(LEN_NAME) __u32 LEN_NAME +#undef dma_unmap_addr +#define dma_unmap_addr(PTR, ADDR_NAME) ((PTR)->ADDR_NAME) +#undef dma_unmap_addr_set +#define dma_unmap_addr_set(PTR, ADDR_NAME, VAL) (((PTR)->ADDR_NAME) = (VAL)) +#undef dma_unmap_len +#define dma_unmap_len(PTR, LEN_NAME) ((PTR)->LEN_NAME) +#undef dma_unmap_len_set +#define dma_unmap_len_set(PTR, LEN_NAME, VAL) (((PTR)->LEN_NAME) = (VAL)) +#endif /* CONFIG_X86_64 && !CONFIG_NEED_DMA_MAP_STATE */ +#endif /* RHEL_RELEASE_CODE */ + +#if (!(RHEL_RELEASE_CODE && \ + (((RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(5,8)) && \ + (RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(6,0))) || \ + ((RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(6,1)) && \ + (RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(7,0)))))) +static inline bool pci_is_pcie(struct pci_dev *dev) +{ + return !!pci_pcie_cap(dev); +} +#endif /* RHEL_RELEASE_CODE */ + +#if (!(RHEL_RELEASE_CODE && \ + (RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(6,2)))) +#define sk_tx_queue_get(_sk) (-1) +#define sk_tx_queue_set(_sk, _tx_queue) do {} while(0) +#endif /* !(RHEL >= 6.2) */ + +#if (RHEL_RELEASE_CODE && \ + (RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(6,4)) && \ + (RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(7,0))) +#define HAVE_RHEL6_ETHTOOL_OPS_EXT_STRUCT +#define HAVE_ETHTOOL_GRXFHINDIR_SIZE +#define HAVE_ETHTOOL_SET_PHYS_ID +#define HAVE_ETHTOOL_GET_TS_INFO +#if (RHEL_RELEASE_CODE > RHEL_RELEASE_VERSION(6,5)) +#define HAVE_ETHTOOL_GSRSSH +#define HAVE_RHEL6_SRIOV_CONFIGURE +#define HAVE_RXFH_NONCONST +#endif /* RHEL > 6.5 */ +#endif /* RHEL >= 6.4 && RHEL < 7.0 */ + +#else /* < 2.6.33 */ +#if defined(CONFIG_FCOE) || defined(CONFIG_FCOE_MODULE) +#ifndef HAVE_NETDEV_OPS_FCOE_GETWWN +#define HAVE_NETDEV_OPS_FCOE_GETWWN +#endif +#endif /* CONFIG_FCOE || CONFIG_FCOE_MODULE */ +#endif /* < 2.6.33 */ + +/*****************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,34) ) +#if (RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(6,0)) +#ifndef pci_num_vf +#define pci_num_vf(pdev) _kc_pci_num_vf(pdev) +int _kc_pci_num_vf(struct pci_dev *dev); +#endif +#endif /* RHEL_RELEASE_CODE */ + +#ifndef dev_is_pci +#define dev_is_pci(d) ((d)->bus == &pci_bus_type) +#endif + +#ifndef ETH_FLAG_NTUPLE +#define ETH_FLAG_NTUPLE NETIF_F_NTUPLE +#endif + +#ifndef netdev_mc_count +#define netdev_mc_count(dev) ((dev)->mc_count) +#endif +#ifndef netdev_mc_empty +#define netdev_mc_empty(dev) (netdev_mc_count(dev) == 0) +#endif +#ifndef netdev_for_each_mc_addr +#define netdev_for_each_mc_addr(mclist, dev) \ + for (mclist = dev->mc_list; mclist; mclist = mclist->next) +#endif +#ifndef netdev_uc_count +#define netdev_uc_count(dev) ((dev)->uc.count) +#endif +#ifndef netdev_uc_empty +#define netdev_uc_empty(dev) (netdev_uc_count(dev) == 0) +#endif +#ifndef netdev_for_each_uc_addr +#define netdev_for_each_uc_addr(ha, dev) \ + list_for_each_entry(ha, &dev->uc.list, list) +#endif +#ifndef dma_set_coherent_mask +#define dma_set_coherent_mask(dev,mask) \ + pci_set_consistent_dma_mask(to_pci_dev(dev),(mask)) +#endif +#ifndef pci_dev_run_wake +#define pci_dev_run_wake(pdev) (0) +#endif + +/* netdev logging taken from include/linux/netdevice.h */ +#ifndef netdev_name +static inline const char *_kc_netdev_name(const struct net_device *dev) +{ + if (dev->reg_state != NETREG_REGISTERED) + return "(unregistered net_device)"; + return dev->name; +} +#define netdev_name(netdev) _kc_netdev_name(netdev) +#endif /* netdev_name */ + +#undef netdev_printk +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0) ) +#define netdev_printk(level, netdev, format, args...) \ +do { \ + struct pci_dev *pdev = _kc_netdev_to_pdev(netdev); \ + printk(level "%s: " format, pci_name(pdev), ##args); \ +} while(0) +#elif ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21) ) +#define netdev_printk(level, netdev, format, args...) \ +do { \ + struct pci_dev *pdev = _kc_netdev_to_pdev(netdev); \ + struct device *dev = pci_dev_to_dev(pdev); \ + dev_printk(level, dev, "%s: " format, \ + netdev_name(netdev), ##args); \ +} while(0) +#else /* 2.6.21 => 2.6.34 */ +#define netdev_printk(level, netdev, format, args...) \ + dev_printk(level, (netdev)->dev.parent, \ + "%s: " format, \ + netdev_name(netdev), ##args) +#endif /* <2.6.0 <2.6.21 <2.6.34 */ +#undef netdev_emerg +#define netdev_emerg(dev, format, args...) \ + netdev_printk(KERN_EMERG, dev, format, ##args) +#undef netdev_alert +#define netdev_alert(dev, format, args...) \ + netdev_printk(KERN_ALERT, dev, format, ##args) +#undef netdev_crit +#define netdev_crit(dev, format, args...) \ + netdev_printk(KERN_CRIT, dev, format, ##args) +#undef netdev_err +#define netdev_err(dev, format, args...) \ + netdev_printk(KERN_ERR, dev, format, ##args) +#undef netdev_warn +#define netdev_warn(dev, format, args...) \ + netdev_printk(KERN_WARNING, dev, format, ##args) +#undef netdev_notice +#define netdev_notice(dev, format, args...) \ + netdev_printk(KERN_NOTICE, dev, format, ##args) +#undef netdev_info +#define netdev_info(dev, format, args...) \ + netdev_printk(KERN_INFO, dev, format, ##args) +#undef netdev_dbg +#if defined(DEBUG) +#define netdev_dbg(__dev, format, args...) \ + netdev_printk(KERN_DEBUG, __dev, format, ##args) +#elif defined(CONFIG_DYNAMIC_DEBUG) +#define netdev_dbg(__dev, format, args...) \ +do { \ + dynamic_dev_dbg((__dev)->dev.parent, "%s: " format, \ + netdev_name(__dev), ##args); \ +} while (0) +#else /* DEBUG */ +#define netdev_dbg(__dev, format, args...) \ +({ \ + if (0) \ + netdev_printk(KERN_DEBUG, __dev, format, ##args); \ + 0; \ +}) +#endif /* DEBUG */ + +#undef netif_printk +#define netif_printk(priv, type, level, dev, fmt, args...) \ +do { \ + if (netif_msg_##type(priv)) \ + netdev_printk(level, (dev), fmt, ##args); \ +} while (0) + +#undef netif_emerg +#define netif_emerg(priv, type, dev, fmt, args...) \ + netif_level(emerg, priv, type, dev, fmt, ##args) +#undef netif_alert +#define netif_alert(priv, type, dev, fmt, args...) \ + netif_level(alert, priv, type, dev, fmt, ##args) +#undef netif_crit +#define netif_crit(priv, type, dev, fmt, args...) \ + netif_level(crit, priv, type, dev, fmt, ##args) +#undef netif_err +#define netif_err(priv, type, dev, fmt, args...) \ + netif_level(err, priv, type, dev, fmt, ##args) +#undef netif_warn +#define netif_warn(priv, type, dev, fmt, args...) \ + netif_level(warn, priv, type, dev, fmt, ##args) +#undef netif_notice +#define netif_notice(priv, type, dev, fmt, args...) \ + netif_level(notice, priv, type, dev, fmt, ##args) +#undef netif_info +#define netif_info(priv, type, dev, fmt, args...) \ + netif_level(info, priv, type, dev, fmt, ##args) +#undef netif_dbg +#define netif_dbg(priv, type, dev, fmt, args...) \ + netif_level(dbg, priv, type, dev, fmt, ##args) + +#ifdef SET_SYSTEM_SLEEP_PM_OPS +#define HAVE_SYSTEM_SLEEP_PM_OPS +#endif + +#ifndef for_each_set_bit +#define for_each_set_bit(bit, addr, size) \ + for ((bit) = find_first_bit((addr), (size)); \ + (bit) < (size); \ + (bit) = find_next_bit((addr), (size), (bit) + 1)) +#endif /* for_each_set_bit */ + +#ifndef DEFINE_DMA_UNMAP_ADDR +#define DEFINE_DMA_UNMAP_ADDR DECLARE_PCI_UNMAP_ADDR +#define DEFINE_DMA_UNMAP_LEN DECLARE_PCI_UNMAP_LEN +#define dma_unmap_addr pci_unmap_addr +#define dma_unmap_addr_set pci_unmap_addr_set +#define dma_unmap_len pci_unmap_len +#define dma_unmap_len_set pci_unmap_len_set +#endif /* DEFINE_DMA_UNMAP_ADDR */ + +#if (RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(6,3)) +#ifdef IGB_HWMON +#ifdef CONFIG_DEBUG_LOCK_ALLOC +#define sysfs_attr_init(attr) \ + do { \ + static struct lock_class_key __key; \ + (attr)->key = &__key; \ + } while (0) +#else +#define sysfs_attr_init(attr) do {} while (0) +#endif /* CONFIG_DEBUG_LOCK_ALLOC */ +#endif /* IGB_HWMON */ +#endif /* RHEL_RELEASE_CODE */ + +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0) ) +static inline bool _kc_pm_runtime_suspended() +{ + return false; +} +#define pm_runtime_suspended(dev) _kc_pm_runtime_suspended() +#else /* 2.6.0 => 2.6.34 */ +static inline bool _kc_pm_runtime_suspended(struct device __always_unused *dev) +{ + return false; +} +#ifndef pm_runtime_suspended +#define pm_runtime_suspended(dev) _kc_pm_runtime_suspended(dev) +#endif +#endif /* 2.6.0 => 2.6.34 */ + +#ifndef pci_bus_speed +/* override pci_bus_speed introduced in 2.6.19 with an expanded enum type */ +enum _kc_pci_bus_speed { + _KC_PCIE_SPEED_2_5GT = 0x14, + _KC_PCIE_SPEED_5_0GT = 0x15, + _KC_PCIE_SPEED_8_0GT = 0x16, + _KC_PCI_SPEED_UNKNOWN = 0xff, +}; +#define pci_bus_speed _kc_pci_bus_speed +#define PCIE_SPEED_2_5GT _KC_PCIE_SPEED_2_5GT +#define PCIE_SPEED_5_0GT _KC_PCIE_SPEED_5_0GT +#define PCIE_SPEED_8_0GT _KC_PCIE_SPEED_8_0GT +#define PCI_SPEED_UNKNOWN _KC_PCI_SPEED_UNKNOWN +#endif /* pci_bus_speed */ + +#else /* < 2.6.34 */ +#define HAVE_SYSTEM_SLEEP_PM_OPS +#ifndef HAVE_SET_RX_MODE +#define HAVE_SET_RX_MODE +#endif + +#endif /* < 2.6.34 */ + +/*****************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,35) ) +ssize_t _kc_simple_write_to_buffer(void *to, size_t available, loff_t *ppos, + const void __user *from, size_t count); +#define simple_write_to_buffer _kc_simple_write_to_buffer + +#if (!(RHEL_RELEASE_CODE && RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(6,4))) +static inline struct pci_dev *pci_physfn(struct pci_dev *dev) +{ +#ifdef HAVE_PCI_DEV_IS_VIRTFN_BIT +#ifdef CONFIG_PCI_IOV + if (dev->is_virtfn) + dev = dev->physfn; +#endif /* CONFIG_PCI_IOV */ +#endif /* HAVE_PCI_DEV_IS_VIRTFN_BIT */ + return dev; +} +#endif /* ! RHEL >= 6.4 */ + +#ifndef PCI_EXP_LNKSTA_NLW_SHIFT +#define PCI_EXP_LNKSTA_NLW_SHIFT 4 +#endif + +#ifndef numa_node_id +#define numa_node_id() 0 +#endif +#ifndef numa_mem_id +#define numa_mem_id numa_node_id +#endif +#if (!(RHEL_RELEASE_CODE && RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(6,0))) +#ifdef HAVE_TX_MQ +#include +#ifndef CONFIG_NETDEVICES_MULTIQUEUE +int _kc_netif_set_real_num_tx_queues(struct net_device *, unsigned int); +#else /* CONFIG_NETDEVICES_MULTI_QUEUE */ +static inline int _kc_netif_set_real_num_tx_queues(struct net_device *dev, + unsigned int txq) +{ + dev->egress_subqueue_count = txq; + return 0; +} +#endif /* CONFIG_NETDEVICES_MULTI_QUEUE */ +#else /* HAVE_TX_MQ */ +static inline int _kc_netif_set_real_num_tx_queues(struct net_device __always_unused *dev, + unsigned int __always_unused txq) +{ + return 0; +} +#endif /* HAVE_TX_MQ */ +#define netif_set_real_num_tx_queues(dev, txq) \ + _kc_netif_set_real_num_tx_queues(dev, txq) +#endif /* !(RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(6,0)) */ +#ifndef ETH_FLAG_RXHASH +#define ETH_FLAG_RXHASH (1<<28) +#endif /* ETH_FLAG_RXHASH */ +#if (RHEL_RELEASE_CODE && RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(6,0)) +#define HAVE_IRQ_AFFINITY_HINT +#endif +struct device_node; +#else /* < 2.6.35 */ +#define HAVE_STRUCT_DEVICE_OF_NODE +#define HAVE_PM_QOS_REQUEST_LIST +#define HAVE_IRQ_AFFINITY_HINT +#include +#endif /* < 2.6.35 */ + +/*****************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,36) ) +int _kc_ethtool_op_set_flags(struct net_device *, u32, u32); +#define ethtool_op_set_flags _kc_ethtool_op_set_flags +u32 _kc_ethtool_op_get_flags(struct net_device *); +#define ethtool_op_get_flags _kc_ethtool_op_get_flags + +enum { + WQ_UNBOUND = 0, + WQ_RESCUER = 0, +}; + +#ifdef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS +#ifdef NET_IP_ALIGN +#undef NET_IP_ALIGN +#endif +#define NET_IP_ALIGN 0 +#endif /* CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS */ + +#ifdef NET_SKB_PAD +#undef NET_SKB_PAD +#endif + +#if (L1_CACHE_BYTES > 32) +#define NET_SKB_PAD L1_CACHE_BYTES +#else +#define NET_SKB_PAD 32 +#endif + +static inline struct sk_buff *_kc_netdev_alloc_skb_ip_align(struct net_device *dev, + unsigned int length) +{ + struct sk_buff *skb; + + skb = alloc_skb(length + NET_SKB_PAD + NET_IP_ALIGN, GFP_ATOMIC); + if (skb) { +#if (NET_IP_ALIGN + NET_SKB_PAD) + skb_reserve(skb, NET_IP_ALIGN + NET_SKB_PAD); +#endif + skb->dev = dev; + } + return skb; +} + +#ifdef netdev_alloc_skb_ip_align +#undef netdev_alloc_skb_ip_align +#endif +#define netdev_alloc_skb_ip_align(n, l) _kc_netdev_alloc_skb_ip_align(n, l) + +#undef netif_level +#define netif_level(level, priv, type, dev, fmt, args...) \ +do { \ + if (netif_msg_##type(priv)) \ + netdev_##level(dev, fmt, ##args); \ +} while (0) + +#if (!(RHEL_RELEASE_CODE && RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(6,3))) +#undef usleep_range +#define usleep_range(min, max) msleep(DIV_ROUND_UP(min, 1000)) +#endif + +#define u64_stats_update_begin(a) do { } while(0) +#define u64_stats_update_end(a) do { } while(0) +#define u64_stats_fetch_begin(a) do { } while(0) +#define u64_stats_fetch_retry_bh(a,b) (0) +#define u64_stats_fetch_begin_bh(a) (0) + +#if (RHEL_RELEASE_CODE && RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(6,1)) +#define HAVE_8021P_SUPPORT +#endif + +/* RHEL6.4 and SLES11sp2 backported skb_tx_timestamp */ +#if (!(RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(6,4)) && \ + !(SLE_VERSION_CODE >= SLE_VERSION(11,2,0))) +static inline void skb_tx_timestamp(struct sk_buff __always_unused *skb) +{ + return; +} +#endif + +#else /* < 2.6.36 */ + +#define msleep(x) do { if (x > 20) \ + msleep(x); \ + else \ + usleep_range(1000 * x, 2000 * x); \ + } while (0) + +#define HAVE_PM_QOS_REQUEST_ACTIVE +#define HAVE_8021P_SUPPORT +#define HAVE_NDO_GET_STATS64 +#endif /* < 2.6.36 */ + +/*****************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,37) ) +#define HAVE_NON_CONST_PCI_DRIVER_NAME +#ifndef netif_set_real_num_tx_queues +static inline int _kc_netif_set_real_num_tx_queues(struct net_device *dev, + unsigned int txq) +{ + netif_set_real_num_tx_queues(dev, txq); + return 0; +} +#define netif_set_real_num_tx_queues(dev, txq) \ + _kc_netif_set_real_num_tx_queues(dev, txq) +#endif +#ifndef netif_set_real_num_rx_queues +static inline int __kc_netif_set_real_num_rx_queues(struct net_device __always_unused *dev, + unsigned int __always_unused rxq) +{ + return 0; +} +#define netif_set_real_num_rx_queues(dev, rxq) \ + __kc_netif_set_real_num_rx_queues((dev), (rxq)) +#endif +#ifndef ETHTOOL_RXNTUPLE_ACTION_CLEAR +#define ETHTOOL_RXNTUPLE_ACTION_CLEAR (-2) +#endif +#ifndef VLAN_N_VID +#define VLAN_N_VID VLAN_GROUP_ARRAY_LEN +#endif /* VLAN_N_VID */ +#ifndef ETH_FLAG_TXVLAN +#define ETH_FLAG_TXVLAN BIT(7) +#endif /* ETH_FLAG_TXVLAN */ +#ifndef ETH_FLAG_RXVLAN +#define ETH_FLAG_RXVLAN BIT(8) +#endif /* ETH_FLAG_RXVLAN */ + +#define WQ_MEM_RECLAIM WQ_RESCUER + +static inline void _kc_skb_checksum_none_assert(struct sk_buff *skb) +{ + WARN_ON(skb->ip_summed != CHECKSUM_NONE); +} +#define skb_checksum_none_assert(skb) _kc_skb_checksum_none_assert(skb) + +static inline void *_kc_vzalloc_node(unsigned long size, int node) +{ + void *addr = vmalloc_node(size, node); + if (addr) + memset(addr, 0, size); + return addr; +} +#define vzalloc_node(_size, _node) _kc_vzalloc_node(_size, _node) + +static inline void *_kc_vzalloc(unsigned long size) +{ + void *addr = vmalloc(size); + if (addr) + memset(addr, 0, size); + return addr; +} +#define vzalloc(_size) _kc_vzalloc(_size) + +#if (!(RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(5,7)) || \ + (RHEL_RELEASE_CODE == RHEL_RELEASE_VERSION(6,0))) +static inline __be16 vlan_get_protocol(const struct sk_buff *skb) +{ + if (vlan_tx_tag_present(skb) || + skb->protocol != cpu_to_be16(ETH_P_8021Q)) + return skb->protocol; + + if (skb_headlen(skb) < sizeof(struct vlan_ethhdr)) + return 0; + + return ((struct vlan_ethhdr*)skb->data)->h_vlan_encapsulated_proto; +} +#endif /* !RHEL5.7+ || RHEL6.0 */ + +#ifdef HAVE_HW_TIME_STAMP +#define SKBTX_HW_TSTAMP BIT(0) +#define SKBTX_IN_PROGRESS BIT(2) +#define SKB_SHARED_TX_IS_UNION +#endif + +#ifndef device_wakeup_enable +#define device_wakeup_enable(dev) device_set_wakeup_enable(dev, true) +#endif + +#if ( LINUX_VERSION_CODE > KERNEL_VERSION(2,4,18) ) +#ifndef HAVE_VLAN_RX_REGISTER +#define HAVE_VLAN_RX_REGISTER +#endif +#endif /* > 2.4.18 */ +#endif /* < 2.6.37 */ + +/*****************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,38) ) +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,22) ) +#define skb_checksum_start_offset(skb) skb_transport_offset(skb) +#else /* 2.6.22 -> 2.6.37 */ +static inline int _kc_skb_checksum_start_offset(const struct sk_buff *skb) +{ + return skb->csum_start - skb_headroom(skb); +} +#define skb_checksum_start_offset(skb) _kc_skb_checksum_start_offset(skb) +#endif /* 2.6.22 -> 2.6.37 */ +#if IS_ENABLED(CONFIG_DCB) +#ifndef IEEE_8021QAZ_MAX_TCS +#define IEEE_8021QAZ_MAX_TCS 8 +#endif +#ifndef DCB_CAP_DCBX_HOST +#define DCB_CAP_DCBX_HOST 0x01 +#endif +#ifndef DCB_CAP_DCBX_LLD_MANAGED +#define DCB_CAP_DCBX_LLD_MANAGED 0x02 +#endif +#ifndef DCB_CAP_DCBX_VER_CEE +#define DCB_CAP_DCBX_VER_CEE 0x04 +#endif +#ifndef DCB_CAP_DCBX_VER_IEEE +#define DCB_CAP_DCBX_VER_IEEE 0x08 +#endif +#ifndef DCB_CAP_DCBX_STATIC +#define DCB_CAP_DCBX_STATIC 0x10 +#endif +#endif /* CONFIG_DCB */ +#if (RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(6,2)) +#define CONFIG_XPS +#endif /* RHEL_RELEASE_VERSION(6,2) */ +#endif /* < 2.6.38 */ + +/*****************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,39) ) +#ifndef TC_BITMASK +#define TC_BITMASK 15 +#endif +#ifndef NETIF_F_RXCSUM +#define NETIF_F_RXCSUM BIT(29) +#endif +#ifndef skb_queue_reverse_walk_safe +#define skb_queue_reverse_walk_safe(queue, skb, tmp) \ + for (skb = (queue)->prev, tmp = skb->prev; \ + skb != (struct sk_buff *)(queue); \ + skb = tmp, tmp = skb->prev) +#endif +#if defined(CONFIG_FCOE) || defined(CONFIG_FCOE_MODULE) +#ifndef FCOE_MTU +#define FCOE_MTU 2158 +#endif +#endif +#if IS_ENABLED(CONFIG_DCB) +#ifndef IEEE_8021QAZ_APP_SEL_ETHERTYPE +#define IEEE_8021QAZ_APP_SEL_ETHERTYPE 1 +#endif +#endif +#if (!(RHEL_RELEASE_CODE && RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(6,4))) +#define kstrtoul(a, b, c) ((*(c)) = simple_strtoul((a), NULL, (b)), 0) +#define kstrtouint(a, b, c) ((*(c)) = simple_strtoul((a), NULL, (b)), 0) +#define kstrtou32(a, b, c) ((*(c)) = simple_strtoul((a), NULL, (b)), 0) +#endif /* !(RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(6,4)) */ +#if (!(RHEL_RELEASE_CODE && RHEL_RELEASE_CODE > RHEL_RELEASE_VERSION(6,0))) +u16 ___kc_skb_tx_hash(struct net_device *, const struct sk_buff *, u16); +#define __skb_tx_hash(n, s, q) ___kc_skb_tx_hash((n), (s), (q)) +u8 _kc_netdev_get_num_tc(struct net_device *dev); +#define netdev_get_num_tc(dev) _kc_netdev_get_num_tc(dev) +int _kc_netdev_set_num_tc(struct net_device *dev, u8 num_tc); +#define netdev_set_num_tc(dev, tc) _kc_netdev_set_num_tc((dev), (tc)) +#define netdev_reset_tc(dev) _kc_netdev_set_num_tc((dev), 0) +#define netdev_set_tc_queue(dev, tc, cnt, off) do {} while (0) +u8 _kc_netdev_get_prio_tc_map(struct net_device *dev, u8 up); +#define netdev_get_prio_tc_map(dev, up) _kc_netdev_get_prio_tc_map(dev, up) +#define netdev_set_prio_tc_map(dev, up, tc) do {} while (0) +#else /* RHEL6.1 or greater */ +#ifndef HAVE_MQPRIO +#define HAVE_MQPRIO +#endif /* HAVE_MQPRIO */ +#if IS_ENABLED(CONFIG_DCB) +#ifndef HAVE_DCBNL_IEEE +#define HAVE_DCBNL_IEEE +#ifndef IEEE_8021QAZ_TSA_STRICT +#define IEEE_8021QAZ_TSA_STRICT 0 +#endif +#ifndef IEEE_8021QAZ_TSA_ETS +#define IEEE_8021QAZ_TSA_ETS 2 +#endif +#ifndef IEEE_8021QAZ_APP_SEL_ETHERTYPE +#define IEEE_8021QAZ_APP_SEL_ETHERTYPE 1 +#endif +#endif +#endif /* CONFIG_DCB */ +#endif /* !(RHEL_RELEASE_CODE > RHEL_RELEASE_VERSION(6,0)) */ + +#ifndef udp_csum +#define udp_csum __kc_udp_csum +static inline __wsum __kc_udp_csum(struct sk_buff *skb) +{ + __wsum csum = csum_partial(skb_transport_header(skb), + sizeof(struct udphdr), skb->csum); + + for (skb = skb_shinfo(skb)->frag_list; skb; skb = skb->next) { + csum = csum_add(csum, skb->csum); + } + return csum; +} +#endif /* udp_csum */ +#else /* < 2.6.39 */ +#if defined(CONFIG_FCOE) || defined(CONFIG_FCOE_MODULE) +#ifndef HAVE_NETDEV_OPS_FCOE_DDP_TARGET +#define HAVE_NETDEV_OPS_FCOE_DDP_TARGET +#endif +#endif /* CONFIG_FCOE || CONFIG_FCOE_MODULE */ +#ifndef HAVE_MQPRIO +#define HAVE_MQPRIO +#endif +#ifndef HAVE_SETUP_TC +#define HAVE_SETUP_TC +#endif +#ifdef CONFIG_DCB +#ifndef HAVE_DCBNL_IEEE +#define HAVE_DCBNL_IEEE +#endif +#endif /* CONFIG_DCB */ +#ifndef HAVE_NDO_SET_FEATURES +#define HAVE_NDO_SET_FEATURES +#endif +#define HAVE_IRQ_AFFINITY_NOTIFY +#endif /* < 2.6.39 */ + +/*****************************************************************************/ +/* use < 2.6.40 because of a Fedora 15 kernel update where they + * updated the kernel version to 2.6.40.x and they back-ported 3.0 features + * like set_phys_id for ethtool. + */ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,40) ) +#ifdef ETHTOOL_GRXRINGS +#ifndef FLOW_EXT +#define FLOW_EXT 0x80000000 +union _kc_ethtool_flow_union { + struct ethtool_tcpip4_spec tcp_ip4_spec; + struct ethtool_usrip4_spec usr_ip4_spec; + __u8 hdata[60]; +}; +struct _kc_ethtool_flow_ext { + __be16 vlan_etype; + __be16 vlan_tci; + __be32 data[2]; +}; +struct _kc_ethtool_rx_flow_spec { + __u32 flow_type; + union _kc_ethtool_flow_union h_u; + struct _kc_ethtool_flow_ext h_ext; + union _kc_ethtool_flow_union m_u; + struct _kc_ethtool_flow_ext m_ext; + __u64 ring_cookie; + __u32 location; +}; +#define ethtool_rx_flow_spec _kc_ethtool_rx_flow_spec +#endif /* FLOW_EXT */ +#endif + +#define pci_disable_link_state_locked pci_disable_link_state + +#ifndef PCI_LTR_VALUE_MASK +#define PCI_LTR_VALUE_MASK 0x000003ff +#endif +#ifndef PCI_LTR_SCALE_MASK +#define PCI_LTR_SCALE_MASK 0x00001c00 +#endif +#ifndef PCI_LTR_SCALE_SHIFT +#define PCI_LTR_SCALE_SHIFT 10 +#endif + +#else /* < 2.6.40 */ +#define HAVE_ETHTOOL_SET_PHYS_ID +#endif /* < 2.6.40 */ + +/*****************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0) ) +#define USE_LEGACY_PM_SUPPORT +#ifndef kfree_rcu +#define kfree_rcu(_ptr, _rcu_head) kfree(_ptr) +#endif /* kfree_rcu */ +#ifndef kstrtol_from_user +#define kstrtol_from_user(s, c, b, r) _kc_kstrtol_from_user(s, c, b, r) +static inline int _kc_kstrtol_from_user(const char __user *s, size_t count, + unsigned int base, long *res) +{ + /* sign, base 2 representation, newline, terminator */ + char buf[1 + sizeof(long) * 8 + 1 + 1]; + + count = min(count, sizeof(buf) - 1); + if (copy_from_user(buf, s, count)) + return -EFAULT; + buf[count] = '\0'; + return strict_strtol(buf, base, res); +} +#endif + +#if (RHEL_RELEASE_CODE && (RHEL_RELEASE_CODE > RHEL_RELEASE_VERSION(7,0) || \ + RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(5,7))) +/* 20000base_blah_full Supported and Advertised Registers */ +#define SUPPORTED_20000baseMLD2_Full BIT(21) +#define SUPPORTED_20000baseKR2_Full BIT(22) +#define ADVERTISED_20000baseMLD2_Full BIT(21) +#define ADVERTISED_20000baseKR2_Full BIT(22) +#endif /* RHEL_RELEASE_CODE */ +#endif /* < 3.0.0 */ + +/*****************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(3,1,0) ) +#ifndef __netdev_alloc_skb_ip_align +#define __netdev_alloc_skb_ip_align(d,l,_g) netdev_alloc_skb_ip_align(d,l) +#endif /* __netdev_alloc_skb_ip_align */ +#define dcb_ieee_setapp(dev, app) dcb_setapp(dev, app) +#define dcb_ieee_delapp(dev, app) 0 +#define dcb_ieee_getapp_mask(dev, app) (1 << app->priority) + +/* 1000BASE-T Control register */ +#define CTL1000_AS_MASTER 0x0800 +#define CTL1000_ENABLE_MASTER 0x1000 + +/* kernels less than 3.0.0 don't have this */ +#ifndef ETH_P_8021AD +#define ETH_P_8021AD 0x88A8 +#endif + +/* Stub definition for !CONFIG_OF is introduced later */ +#ifdef CONFIG_OF +static inline struct device_node * +pci_device_to_OF_node(struct pci_dev __maybe_unused *pdev) +{ +#ifdef HAVE_STRUCT_DEVICE_OF_NODE + return pdev ? pdev->dev.of_node : NULL; +#else + return NULL; +#endif /* !HAVE_STRUCT_DEVICE_OF_NODE */ +} +#endif /* CONFIG_OF */ +#else /* < 3.1.0 */ +#ifndef HAVE_DCBNL_IEEE_DELAPP +#define HAVE_DCBNL_IEEE_DELAPP +#endif +#endif /* < 3.1.0 */ + +/*****************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(3,2,0) ) +#ifndef dma_zalloc_coherent +#define dma_zalloc_coherent(d, s, h, f) _kc_dma_zalloc_coherent(d, s, h, f) +static inline void *_kc_dma_zalloc_coherent(struct device *dev, size_t size, + dma_addr_t *dma_handle, gfp_t flag) +{ + void *ret = dma_alloc_coherent(dev, size, dma_handle, flag); + if (ret) + memset(ret, 0, size); + return ret; +} +#endif +#ifdef ETHTOOL_GRXRINGS +#define HAVE_ETHTOOL_GET_RXNFC_VOID_RULE_LOCS +#endif /* ETHTOOL_GRXRINGS */ + +#ifndef skb_frag_size +#define skb_frag_size(frag) _kc_skb_frag_size(frag) +static inline unsigned int _kc_skb_frag_size(const skb_frag_t *frag) +{ + return frag->size; +} +#endif /* skb_frag_size */ + +#ifndef skb_frag_size_sub +#define skb_frag_size_sub(frag, delta) _kc_skb_frag_size_sub(frag, delta) +static inline void _kc_skb_frag_size_sub(skb_frag_t *frag, int delta) +{ + frag->size -= delta; +} +#endif /* skb_frag_size_sub */ + +#ifndef skb_frag_page +#define skb_frag_page(frag) _kc_skb_frag_page(frag) +static inline struct page *_kc_skb_frag_page(const skb_frag_t *frag) +{ + return frag->page; +} +#endif /* skb_frag_page */ + +#ifndef skb_frag_address +#define skb_frag_address(frag) _kc_skb_frag_address(frag) +static inline void *_kc_skb_frag_address(const skb_frag_t *frag) +{ + return page_address(skb_frag_page(frag)) + frag->page_offset; +} +#endif /* skb_frag_address */ + +#ifndef skb_frag_dma_map +#if ( LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0) ) +#include +#endif +#define skb_frag_dma_map(dev,frag,offset,size,dir) \ + _kc_skb_frag_dma_map(dev,frag,offset,size,dir) +static inline dma_addr_t _kc_skb_frag_dma_map(struct device *dev, + const skb_frag_t *frag, + size_t offset, size_t size, + enum dma_data_direction dir) +{ + return dma_map_page(dev, skb_frag_page(frag), + frag->page_offset + offset, size, dir); +} +#endif /* skb_frag_dma_map */ + +#ifndef __skb_frag_unref +#define __skb_frag_unref(frag) __kc_skb_frag_unref(frag) +static inline void __kc_skb_frag_unref(skb_frag_t *frag) +{ + put_page(skb_frag_page(frag)); +} +#endif /* __skb_frag_unref */ + +#ifndef SPEED_UNKNOWN +#define SPEED_UNKNOWN -1 +#endif +#ifndef DUPLEX_UNKNOWN +#define DUPLEX_UNKNOWN 0xff +#endif +#if ((RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(6,3)) ||\ + (SLE_VERSION_CODE && SLE_VERSION_CODE >= SLE_VERSION(11,3,0))) +#ifndef HAVE_PCI_DEV_FLAGS_ASSIGNED +#define HAVE_PCI_DEV_FLAGS_ASSIGNED +#endif +#endif +#else /* < 3.2.0 */ +#ifndef HAVE_PCI_DEV_FLAGS_ASSIGNED +#define HAVE_PCI_DEV_FLAGS_ASSIGNED +#define HAVE_VF_SPOOFCHK_CONFIGURE +#endif +#ifndef HAVE_SKB_L4_RXHASH +#define HAVE_SKB_L4_RXHASH +#endif +#define HAVE_IOMMU_PRESENT +#define HAVE_PM_QOS_REQUEST_LIST_NEW +#endif /* < 3.2.0 */ + +#if (RHEL_RELEASE_CODE && RHEL_RELEASE_CODE == RHEL_RELEASE_VERSION(6,2)) +#undef ixgbe_get_netdev_tc_txq +#define ixgbe_get_netdev_tc_txq(dev, tc) (&netdev_extended(dev)->qos_data.tc_to_txq[tc]) +#endif +/*****************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(3,3,0) ) +/* NOTE: the order of parameters to _kc_alloc_workqueue() is different than + * alloc_workqueue() to avoid compiler warning from -Wvarargs + */ +static inline struct workqueue_struct * __attribute__ ((format(printf, 3, 4))) +_kc_alloc_workqueue(__maybe_unused int flags, __maybe_unused int max_active, + const char *fmt, ...) +{ + struct workqueue_struct *wq; + va_list args, temp; + unsigned int len; + char *p; + + va_start(args, fmt); + va_copy(temp, args); + len = vsnprintf(NULL, 0, fmt, temp); + va_end(temp); + + p = kmalloc(len + 1, GFP_KERNEL); + if (!p) { + va_end(args); + return NULL; + } + + vsnprintf(p, len + 1, fmt, args); + va_end(args); +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,36) ) + wq = create_workqueue(p); +#else + wq = alloc_workqueue(p, flags, max_active); +#endif + kfree(p); + + return wq; +} +#ifdef alloc_workqueue +#undef alloc_workqueue +#endif +#define alloc_workqueue(fmt, flags, max_active, args...) \ + _kc_alloc_workqueue(flags, max_active, fmt, ##args) + +#if !(RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(6,5)) +typedef u32 netdev_features_t; +#endif +#undef PCI_EXP_TYPE_RC_EC +#define PCI_EXP_TYPE_RC_EC 0xa /* Root Complex Event Collector */ +#ifndef CONFIG_BQL +#define netdev_tx_completed_queue(_q, _p, _b) do {} while (0) +#define netdev_completed_queue(_n, _p, _b) do {} while (0) +#define netdev_tx_sent_queue(_q, _b) do {} while (0) +#define netdev_sent_queue(_n, _b) do {} while (0) +#define netdev_tx_reset_queue(_q) do {} while (0) +#define netdev_reset_queue(_n) do {} while (0) +#endif +#if (SLE_VERSION_CODE && SLE_VERSION_CODE >= SLE_VERSION(11,3,0)) +#define HAVE_ETHTOOL_GRXFHINDIR_SIZE +#endif /* SLE_VERSION(11,3,0) */ +#define netif_xmit_stopped(_q) netif_tx_queue_stopped(_q) +#if !(SLE_VERSION_CODE && SLE_VERSION_CODE >= SLE_VERSION(11,4,0)) +static inline int __kc_ipv6_skip_exthdr(const struct sk_buff *skb, int start, + u8 *nexthdrp, + __be16 __always_unused *frag_offp) +{ + return ipv6_skip_exthdr(skb, start, nexthdrp); +} +#undef ipv6_skip_exthdr +#define ipv6_skip_exthdr(a,b,c,d) __kc_ipv6_skip_exthdr((a), (b), (c), (d)) +#endif /* !SLES11sp4 or greater */ + +#if (!(RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(6,4)) && \ + !(SLE_VERSION_CODE >= SLE_VERSION(11,3,0))) +static inline u32 ethtool_rxfh_indir_default(u32 index, u32 n_rx_rings) +{ + return index % n_rx_rings; +} +#endif + +#else /* ! < 3.3.0 */ +#define HAVE_ETHTOOL_GRXFHINDIR_SIZE +#define HAVE_INT_NDO_VLAN_RX_ADD_VID +#ifdef ETHTOOL_SRXNTUPLE +#undef ETHTOOL_SRXNTUPLE +#endif +#endif /* < 3.3.0 */ + +/*****************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(3,4,0) ) +#ifndef NETIF_F_RXFCS +#define NETIF_F_RXFCS 0 +#endif /* NETIF_F_RXFCS */ +#ifndef NETIF_F_RXALL +#define NETIF_F_RXALL 0 +#endif /* NETIF_F_RXALL */ + +#if !(SLE_VERSION_CODE && SLE_VERSION_CODE >= SLE_VERSION(11,3,0)) +#define NUMTCS_RETURNS_U8 + +int _kc_simple_open(struct inode *inode, struct file *file); +#define simple_open _kc_simple_open +#endif /* !(SLE_VERSION_CODE && SLE_VERSION_CODE >= SLE_VERSION(11,3,0)) */ + +#ifndef skb_add_rx_frag +#define skb_add_rx_frag _kc_skb_add_rx_frag +void _kc_skb_add_rx_frag(struct sk_buff * skb, int i, struct page *page, + int off, int size, unsigned int truesize); +#endif +#ifdef NET_ADDR_RANDOM +#define eth_hw_addr_random(N) do { \ + eth_random_addr(N->dev_addr); \ + N->addr_assign_type |= NET_ADDR_RANDOM; \ + } while (0) +#else /* NET_ADDR_RANDOM */ +#define eth_hw_addr_random(N) eth_random_addr(N->dev_addr) +#endif /* NET_ADDR_RANDOM */ + +#ifndef for_each_set_bit_from +#define for_each_set_bit_from(bit, addr, size) \ + for ((bit) = find_next_bit((addr), (size), (bit)); \ + (bit) < (size); \ + (bit) = find_next_bit((addr), (size), (bit) + 1)) +#endif /* for_each_set_bit_from */ + +#else /* < 3.4.0 */ +#include +#endif /* >= 3.4.0 */ + +/*****************************************************************************/ +#if ( LINUX_VERSION_CODE >= KERNEL_VERSION(3,0,0) ) || \ + ( RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(6,4) ) +#ifndef NO_PTP_SUPPORT +#if IS_ENABLED(CONFIG_PTP_1588_CLOCK) +#define HAVE_PTP_1588_CLOCK +#endif /* CONFIG_PTP_1588_CLOCK */ +#endif /* !NO_PTP_SUPPORT */ +#endif /* >= 3.0.0 || RHEL_RELEASE > 6.4 */ + +/*****************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(3,5,0) ) + +#ifndef BITS_PER_LONG_LONG +#define BITS_PER_LONG_LONG 64 +#endif + +#ifndef ether_addr_equal +static inline bool __kc_ether_addr_equal(const u8 *addr1, const u8 *addr2) +{ + return !compare_ether_addr(addr1, addr2); +} +#define ether_addr_equal(_addr1, _addr2) __kc_ether_addr_equal((_addr1),(_addr2)) +#endif + +/* Definitions for !CONFIG_OF_NET are introduced in 3.10 */ +#ifdef CONFIG_OF_NET +static inline int of_get_phy_mode(struct device_node __always_unused *np) +{ + return -ENODEV; +} + +static inline const void * +of_get_mac_address(struct device_node __always_unused *np) +{ + return NULL; +} +#endif +#else +#include +#define HAVE_FDB_OPS +#define HAVE_ETHTOOL_GET_TS_INFO +#endif /* < 3.5.0 */ + +/*****************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(3,6,0) ) +#define PCI_EXP_LNKCAP2 44 /* Link Capability 2 */ + +#ifndef MDIO_EEE_100TX +#define MDIO_EEE_100TX 0x0002 /* 100TX EEE cap */ +#endif +#ifndef MDIO_EEE_1000T +#define MDIO_EEE_1000T 0x0004 /* 1000T EEE cap */ +#endif +#ifndef MDIO_EEE_10GT +#define MDIO_EEE_10GT 0x0008 /* 10GT EEE cap */ +#endif +#ifndef MDIO_EEE_1000KX +#define MDIO_EEE_1000KX 0x0010 /* 1000KX EEE cap */ +#endif +#ifndef MDIO_EEE_10GKX4 +#define MDIO_EEE_10GKX4 0x0020 /* 10G KX4 EEE cap */ +#endif +#ifndef MDIO_EEE_10GKR +#define MDIO_EEE_10GKR 0x0040 /* 10G KR EEE cap */ +#endif + +#ifndef __GFP_MEMALLOC +#define __GFP_MEMALLOC 0 +#endif + +#ifndef eth_broadcast_addr +#define eth_broadcast_addr _kc_eth_broadcast_addr +static inline void _kc_eth_broadcast_addr(u8 *addr) +{ + memset(addr, 0xff, ETH_ALEN); +} +#endif + +#ifndef eth_random_addr +#define eth_random_addr _kc_eth_random_addr +static inline void _kc_eth_random_addr(u8 *addr) +{ + get_random_bytes(addr, ETH_ALEN); + addr[0] &= 0xfe; /* clear multicast */ + addr[0] |= 0x02; /* set local assignment */ +} +#endif /* eth_random_addr */ + +#ifndef DMA_ATTR_SKIP_CPU_SYNC +#define DMA_ATTR_SKIP_CPU_SYNC 0 +#endif +#else /* < 3.6.0 */ +#define HAVE_STRUCT_PAGE_PFMEMALLOC +#endif /* < 3.6.0 */ + +/******************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(3,7,0) ) +#include +#ifndef ADVERTISED_40000baseKR4_Full +/* these defines were all added in one commit, so should be safe + * to trigger activiation on one define + */ +#define SUPPORTED_40000baseKR4_Full BIT(23) +#define SUPPORTED_40000baseCR4_Full BIT(24) +#define SUPPORTED_40000baseSR4_Full BIT(25) +#define SUPPORTED_40000baseLR4_Full BIT(26) +#define ADVERTISED_40000baseKR4_Full BIT(23) +#define ADVERTISED_40000baseCR4_Full BIT(24) +#define ADVERTISED_40000baseSR4_Full BIT(25) +#define ADVERTISED_40000baseLR4_Full BIT(26) +#endif + +#ifndef mmd_eee_cap_to_ethtool_sup_t +/** + * mmd_eee_cap_to_ethtool_sup_t + * @eee_cap: value of the MMD EEE Capability register + * + * A small helper function that translates MMD EEE Capability (3.20) bits + * to ethtool supported settings. + */ +static inline u32 __kc_mmd_eee_cap_to_ethtool_sup_t(u16 eee_cap) +{ + u32 supported = 0; + + if (eee_cap & MDIO_EEE_100TX) + supported |= SUPPORTED_100baseT_Full; + if (eee_cap & MDIO_EEE_1000T) + supported |= SUPPORTED_1000baseT_Full; + if (eee_cap & MDIO_EEE_10GT) + supported |= SUPPORTED_10000baseT_Full; + if (eee_cap & MDIO_EEE_1000KX) + supported |= SUPPORTED_1000baseKX_Full; + if (eee_cap & MDIO_EEE_10GKX4) + supported |= SUPPORTED_10000baseKX4_Full; + if (eee_cap & MDIO_EEE_10GKR) + supported |= SUPPORTED_10000baseKR_Full; + + return supported; +} +#define mmd_eee_cap_to_ethtool_sup_t(eee_cap) \ + __kc_mmd_eee_cap_to_ethtool_sup_t(eee_cap) +#endif /* mmd_eee_cap_to_ethtool_sup_t */ + +#ifndef mmd_eee_adv_to_ethtool_adv_t +/** + * mmd_eee_adv_to_ethtool_adv_t + * @eee_adv: value of the MMD EEE Advertisement/Link Partner Ability registers + * + * A small helper function that translates the MMD EEE Advertisement (7.60) + * and MMD EEE Link Partner Ability (7.61) bits to ethtool advertisement + * settings. + */ +static inline u32 __kc_mmd_eee_adv_to_ethtool_adv_t(u16 eee_adv) +{ + u32 adv = 0; + + if (eee_adv & MDIO_EEE_100TX) + adv |= ADVERTISED_100baseT_Full; + if (eee_adv & MDIO_EEE_1000T) + adv |= ADVERTISED_1000baseT_Full; + if (eee_adv & MDIO_EEE_10GT) + adv |= ADVERTISED_10000baseT_Full; + if (eee_adv & MDIO_EEE_1000KX) + adv |= ADVERTISED_1000baseKX_Full; + if (eee_adv & MDIO_EEE_10GKX4) + adv |= ADVERTISED_10000baseKX4_Full; + if (eee_adv & MDIO_EEE_10GKR) + adv |= ADVERTISED_10000baseKR_Full; + + return adv; +} + +#define mmd_eee_adv_to_ethtool_adv_t(eee_adv) \ + __kc_mmd_eee_adv_to_ethtool_adv_t(eee_adv) +#endif /* mmd_eee_adv_to_ethtool_adv_t */ + +#ifndef ethtool_adv_to_mmd_eee_adv_t +/** + * ethtool_adv_to_mmd_eee_adv_t + * @adv: the ethtool advertisement settings + * + * A small helper function that translates ethtool advertisement settings + * to EEE advertisements for the MMD EEE Advertisement (7.60) and + * MMD EEE Link Partner Ability (7.61) registers. + */ +static inline u16 __kc_ethtool_adv_to_mmd_eee_adv_t(u32 adv) +{ + u16 reg = 0; + + if (adv & ADVERTISED_100baseT_Full) + reg |= MDIO_EEE_100TX; + if (adv & ADVERTISED_1000baseT_Full) + reg |= MDIO_EEE_1000T; + if (adv & ADVERTISED_10000baseT_Full) + reg |= MDIO_EEE_10GT; + if (adv & ADVERTISED_1000baseKX_Full) + reg |= MDIO_EEE_1000KX; + if (adv & ADVERTISED_10000baseKX4_Full) + reg |= MDIO_EEE_10GKX4; + if (adv & ADVERTISED_10000baseKR_Full) + reg |= MDIO_EEE_10GKR; + + return reg; +} +#define ethtool_adv_to_mmd_eee_adv_t(adv) __kc_ethtool_adv_to_mmd_eee_adv_t(adv) +#endif /* ethtool_adv_to_mmd_eee_adv_t */ + +#ifndef pci_pcie_type +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24) ) +static inline u8 pci_pcie_type(struct pci_dev *pdev) +{ + int pos; + u16 reg16; + + pos = pci_find_capability(pdev, PCI_CAP_ID_EXP); + BUG_ON(!pos); + pci_read_config_word(pdev, pos + PCI_EXP_FLAGS, ®16); + return (reg16 & PCI_EXP_FLAGS_TYPE) >> 4; +} +#else /* < 2.6.24 */ +#define pci_pcie_type(x) (x)->pcie_type +#endif /* < 2.6.24 */ +#endif /* pci_pcie_type */ + +#if ( ! ( RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(6,4) ) ) && \ + ( ! ( SLE_VERSION_CODE >= SLE_VERSION(11,3,0) ) ) && \ + ( LINUX_VERSION_CODE >= KERNEL_VERSION(3,0,0) ) +#define ptp_clock_register(caps, args...) ptp_clock_register(caps) +#endif + +#ifndef pcie_capability_read_word +int __kc_pcie_capability_read_word(struct pci_dev *dev, int pos, u16 *val); +#define pcie_capability_read_word(d,p,v) __kc_pcie_capability_read_word(d,p,v) +#endif /* pcie_capability_read_word */ + +#ifndef pcie_capability_read_dword +int __kc_pcie_capability_read_dword(struct pci_dev *dev, int pos, u32 *val); +#define pcie_capability_read_dword(d,p,v) __kc_pcie_capability_read_dword(d,p,v) +#endif + +#ifndef pcie_capability_write_word +int __kc_pcie_capability_write_word(struct pci_dev *dev, int pos, u16 val); +#define pcie_capability_write_word(d,p,v) __kc_pcie_capability_write_word(d,p,v) +#endif /* pcie_capability_write_word */ + +#ifndef pcie_capability_clear_and_set_word +int __kc_pcie_capability_clear_and_set_word(struct pci_dev *dev, int pos, + u16 clear, u16 set); +#define pcie_capability_clear_and_set_word(d,p,c,s) \ + __kc_pcie_capability_clear_and_set_word(d,p,c,s) +#endif /* pcie_capability_clear_and_set_word */ + +#ifndef pcie_capability_clear_word +int __kc_pcie_capability_clear_word(struct pci_dev *dev, int pos, + u16 clear); +#define pcie_capability_clear_word(d, p, c) \ + __kc_pcie_capability_clear_word(d, p, c) +#endif /* pcie_capability_clear_word */ + +#ifndef PCI_EXP_LNKSTA2 +#define PCI_EXP_LNKSTA2 50 /* Link Status 2 */ +#endif + +#if (SLE_VERSION_CODE && SLE_VERSION_CODE >= SLE_VERSION(11,3,0)) +#define USE_CONST_DEV_UC_CHAR +#define HAVE_NDO_FDB_ADD_NLATTR +#endif + +#if !(RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(6,8)) +#define napi_gro_flush(_napi, _flush_old) napi_gro_flush(_napi) +#endif /* !RHEL6.8+ */ + +#if (RHEL_RELEASE_CODE && RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(6,6)) +#include +#else + +#define DEFINE_HASHTABLE(name, bits) \ + struct hlist_head name[1 << (bits)] = \ + { [0 ... ((1 << (bits)) - 1)] = HLIST_HEAD_INIT } + +#define DEFINE_READ_MOSTLY_HASHTABLE(name, bits) \ + struct hlist_head name[1 << (bits)] __read_mostly = \ + { [0 ... ((1 << (bits)) - 1)] = HLIST_HEAD_INIT } + +#define DECLARE_HASHTABLE(name, bits) \ + struct hlist_head name[1 << (bits)] + +#define HASH_SIZE(name) (ARRAY_SIZE(name)) +#define HASH_BITS(name) ilog2(HASH_SIZE(name)) + +/* Use hash_32 when possible to allow for fast 32bit hashing in 64bit kernels. */ +#define hash_min(val, bits) \ + (sizeof(val) <= 4 ? hash_32(val, bits) : hash_long(val, bits)) + +static inline void __hash_init(struct hlist_head *ht, unsigned int sz) +{ + unsigned int i; + + for (i = 0; i < sz; i++) + INIT_HLIST_HEAD(&ht[i]); +} + +#define hash_init(hashtable) __hash_init(hashtable, HASH_SIZE(hashtable)) + +#define hash_add(hashtable, node, key) \ + hlist_add_head(node, &hashtable[hash_min(key, HASH_BITS(hashtable))]) + +static inline bool hash_hashed(struct hlist_node *node) +{ + return !hlist_unhashed(node); +} + +static inline bool __hash_empty(struct hlist_head *ht, unsigned int sz) +{ + unsigned int i; + + for (i = 0; i < sz; i++) + if (!hlist_empty(&ht[i])) + return false; + + return true; +} + +#define hash_empty(hashtable) __hash_empty(hashtable, HASH_SIZE(hashtable)) + +static inline void hash_del(struct hlist_node *node) +{ + hlist_del_init(node); +} +#endif /* RHEL >= 6.6 */ + +/* We don't have @flags support prior to 3.7, so we'll simply ignore the flags + * parameter on these older kernels. + */ +#define __setup_timer(_timer, _fn, _data, _flags) \ + setup_timer((_timer), (_fn), (_data)) \ + +#if ( ! ( RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(6,7) ) ) && \ + ( ! ( SLE_VERSION_CODE >= SLE_VERSION(12,0,0) ) ) + +#ifndef mod_delayed_work +/** + * __mod_delayed_work - modify delay or queue delayed work + * @wq: workqueue to use + * @dwork: delayed work to queue + * @delay: number of jiffies to wait before queueing + * + * Return: %true if @dwork was pending and was rescheduled; + * %false if it wasn't pending + * + * Note: the dwork parameter was declared as a void* + * to avoid comptibility problems with early 2.6 kernels + * where struct delayed_work is not declared. Unlike the original + * implementation flags are not preserved and it shouldn't be + * used in the interrupt context. + */ +static inline bool __mod_delayed_work(struct workqueue_struct *wq, + void *dwork, + unsigned long delay) +{ + bool ret = cancel_delayed_work(dwork); + queue_delayed_work(wq, dwork, delay); + return ret; +} +#define mod_delayed_work(wq, dwork, delay) __mod_delayed_work(wq, dwork, delay) +#endif /* mod_delayed_work */ + +#endif /* !(RHEL >= 6.7) && !(SLE >= 12.0) */ +#else /* >= 3.7.0 */ +#include +#define HAVE_CONST_STRUCT_PCI_ERROR_HANDLERS +#define USE_CONST_DEV_UC_CHAR +#define HAVE_NDO_FDB_ADD_NLATTR +#endif /* >= 3.7.0 */ + +/*****************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(3,8,0) ) +#if (!(RHEL_RELEASE_CODE && RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(6,5)) && \ + !(SLE_VERSION_CODE && SLE_VERSION_CODE >= SLE_VERSION(11,4,0))) +#ifndef pci_sriov_set_totalvfs +static inline int __kc_pci_sriov_set_totalvfs(struct pci_dev __always_unused *dev, u16 __always_unused numvfs) +{ + return 0; +} +#define pci_sriov_set_totalvfs(a, b) __kc_pci_sriov_set_totalvfs((a), (b)) +#endif +#endif /* !(RHEL_RELEASE_CODE >= 6.5 && SLE_VERSION_CODE >= 11.4) */ +#ifndef PCI_EXP_LNKCTL_ASPM_L0S +#define PCI_EXP_LNKCTL_ASPM_L0S 0x01 /* L0s Enable */ +#endif +#ifndef PCI_EXP_LNKCTL_ASPM_L1 +#define PCI_EXP_LNKCTL_ASPM_L1 0x02 /* L1 Enable */ +#endif +#define HAVE_CONFIG_HOTPLUG +/* Reserved Ethernet Addresses per IEEE 802.1Q */ +static const u8 eth_reserved_addr_base[ETH_ALEN] __aligned(2) = { + 0x01, 0x80, 0xc2, 0x00, 0x00, 0x00 }; + +#ifndef is_link_local_ether_addr +static inline bool __kc_is_link_local_ether_addr(const u8 *addr) +{ + __be16 *a = (__be16 *)addr; + static const __be16 *b = (const __be16 *)eth_reserved_addr_base; + static const __be16 m = cpu_to_be16(0xfff0); + + return ((a[0] ^ b[0]) | (a[1] ^ b[1]) | ((a[2] ^ b[2]) & m)) == 0; +} +#define is_link_local_ether_addr(addr) __kc_is_link_local_ether_addr(addr) +#endif /* is_link_local_ether_addr */ + +#ifndef FLOW_MAC_EXT +#define FLOW_MAC_EXT 0x40000000 +#endif /* FLOW_MAC_EXT */ + +#if (SLE_VERSION_CODE && SLE_VERSION_CODE >= SLE_VERSION(11,4,0)) +#define HAVE_SRIOV_CONFIGURE +#endif + +#ifndef PCI_EXP_LNKCAP_SLS_2_5GB +#define PCI_EXP_LNKCAP_SLS_2_5GB 0x00000001 /* LNKCAP2 SLS Vector bit 0 */ +#endif + +#ifndef PCI_EXP_LNKCAP_SLS_5_0GB +#define PCI_EXP_LNKCAP_SLS_5_0GB 0x00000002 /* LNKCAP2 SLS Vector bit 1 */ +#endif + +#undef PCI_EXP_LNKCAP2_SLS_2_5GB +#define PCI_EXP_LNKCAP2_SLS_2_5GB 0x00000002 /* Supported Speed 2.5GT/s */ + +#undef PCI_EXP_LNKCAP2_SLS_5_0GB +#define PCI_EXP_LNKCAP2_SLS_5_0GB 0x00000004 /* Supported Speed 5GT/s */ + +#undef PCI_EXP_LNKCAP2_SLS_8_0GB +#define PCI_EXP_LNKCAP2_SLS_8_0GB 0x00000008 /* Supported Speed 8GT/s */ + +#else /* >= 3.8.0 */ +#ifndef __devinit +#define __devinit +#endif + +#ifndef __devinitdata +#define __devinitdata +#endif + +#ifndef __devinitconst +#define __devinitconst +#endif + +#ifndef __devexit +#define __devexit +#endif + +#ifndef __devexit_p +#define __devexit_p +#endif + +#ifndef HAVE_ENCAP_CSUM_OFFLOAD +#define HAVE_ENCAP_CSUM_OFFLOAD +#endif + +#ifndef HAVE_GRE_ENCAP_OFFLOAD +#define HAVE_GRE_ENCAP_OFFLOAD +#endif + +#ifndef HAVE_SRIOV_CONFIGURE +#define HAVE_SRIOV_CONFIGURE +#endif + +#define HAVE_BRIDGE_ATTRIBS +#ifndef BRIDGE_MODE_VEB +#define BRIDGE_MODE_VEB 0 /* Default loopback mode */ +#endif /* BRIDGE_MODE_VEB */ +#ifndef BRIDGE_MODE_VEPA +#define BRIDGE_MODE_VEPA 1 /* 802.1Qbg defined VEPA mode */ +#endif /* BRIDGE_MODE_VEPA */ +#endif /* >= 3.8.0 */ + +/*****************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(3,9,0) ) + +#undef BUILD_BUG_ON +#ifdef __CHECKER__ +#define BUILD_BUG_ON(condition) (0) +#else /* __CHECKER__ */ +#ifndef __compiletime_warning +#if defined(__GNUC__) && ((__GNUC__ * 10000 + __GNUC_MINOR__ * 100) >= 40400) +#define __compiletime_warning(message) __attribute__((warning(message))) +#else /* __GNUC__ */ +#define __compiletime_warning(message) +#endif /* __GNUC__ */ +#endif /* __compiletime_warning */ +#ifndef __compiletime_error +#if defined(__GNUC__) && ((__GNUC__ * 10000 + __GNUC_MINOR__ * 100) >= 40400) +#define __compiletime_error(message) __attribute__((error(message))) +#define __compiletime_error_fallback(condition) do { } while (0) +#else /* __GNUC__ */ +#define __compiletime_error(message) +#define __compiletime_error_fallback(condition) \ + do { ((void)sizeof(char[1 - 2 * condition])); } while (0) +#endif /* __GNUC__ */ +#else /* __compiletime_error */ +#define __compiletime_error_fallback(condition) do { } while (0) +#endif /* __compiletime_error */ +#define __compiletime_assert(condition, msg, prefix, suffix) \ + do { \ + bool __cond = !(condition); \ + extern void prefix ## suffix(void) __compiletime_error(msg); \ + if (__cond) \ + prefix ## suffix(); \ + __compiletime_error_fallback(__cond); \ + } while (0) + +#define _compiletime_assert(condition, msg, prefix, suffix) \ + __compiletime_assert(condition, msg, prefix, suffix) +#define compiletime_assert(condition, msg) \ + _compiletime_assert(condition, msg, __compiletime_assert_, __LINE__) +#define BUILD_BUG_ON_MSG(cond, msg) compiletime_assert(!(cond), msg) +#ifndef __OPTIMIZE__ +#define BUILD_BUG_ON(condition) ((void)sizeof(char[1 - 2*!!(condition)])) +#else /* __OPTIMIZE__ */ +#define BUILD_BUG_ON(condition) \ + BUILD_BUG_ON_MSG(condition, "BUILD_BUG_ON failed: " #condition) +#endif /* __OPTIMIZE__ */ +#endif /* __CHECKER__ */ + +#undef hlist_entry +#define hlist_entry(ptr, type, member) container_of(ptr,type,member) + +#undef hlist_entry_safe +#define hlist_entry_safe(ptr, type, member) \ + ({ typeof(ptr) ____ptr = (ptr); \ + ____ptr ? hlist_entry(____ptr, type, member) : NULL; \ + }) + +#undef hlist_for_each_entry +#define hlist_for_each_entry(pos, head, member) \ + for (pos = hlist_entry_safe((head)->first, typeof(*(pos)), member); \ + pos; \ + pos = hlist_entry_safe((pos)->member.next, typeof(*(pos)), member)) + +#undef hlist_for_each_entry_safe +#define hlist_for_each_entry_safe(pos, n, head, member) \ + for (pos = hlist_entry_safe((head)->first, typeof(*pos), member); \ + pos && ({ n = pos->member.next; 1; }); \ + pos = hlist_entry_safe(n, typeof(*pos), member)) + +#undef hlist_for_each_entry_continue +#define hlist_for_each_entry_continue(pos, member) \ + for (pos = hlist_entry_safe((pos)->member.next, typeof(*(pos)), member);\ + pos; \ + pos = hlist_entry_safe((pos)->member.next, typeof(*(pos)), member)) + +#undef hlist_for_each_entry_from +#define hlist_for_each_entry_from(pos, member) \ + for (; pos; \ + pos = hlist_entry_safe((pos)->member.next, typeof(*(pos)), member)) + +#undef hash_for_each +#define hash_for_each(name, bkt, obj, member) \ + for ((bkt) = 0, obj = NULL; obj == NULL && (bkt) < HASH_SIZE(name);\ + (bkt)++)\ + hlist_for_each_entry(obj, &name[bkt], member) + +#undef hash_for_each_safe +#define hash_for_each_safe(name, bkt, tmp, obj, member) \ + for ((bkt) = 0, obj = NULL; obj == NULL && (bkt) < HASH_SIZE(name);\ + (bkt)++)\ + hlist_for_each_entry_safe(obj, tmp, &name[bkt], member) + +#undef hash_for_each_possible +#define hash_for_each_possible(name, obj, member, key) \ + hlist_for_each_entry(obj, &name[hash_min(key, HASH_BITS(name))], member) + +#undef hash_for_each_possible_safe +#define hash_for_each_possible_safe(name, obj, tmp, member, key) \ + hlist_for_each_entry_safe(obj, tmp,\ + &name[hash_min(key, HASH_BITS(name))], member) + +#ifdef CONFIG_XPS +int __kc_netif_set_xps_queue(struct net_device *, const struct cpumask *, u16); +#define netif_set_xps_queue(_dev, _mask, _idx) __kc_netif_set_xps_queue((_dev), (_mask), (_idx)) +#else /* CONFIG_XPS */ +#define netif_set_xps_queue(_dev, _mask, _idx) do {} while (0) +#endif /* CONFIG_XPS */ + +#ifdef HAVE_NETDEV_SELECT_QUEUE +#define _kc_hashrnd 0xd631614b /* not so random hash salt */ +u16 __kc_netdev_pick_tx(struct net_device *dev, struct sk_buff *skb); +#define __netdev_pick_tx __kc_netdev_pick_tx +#endif /* HAVE_NETDEV_SELECT_QUEUE */ +#else +#define HAVE_BRIDGE_FILTER +#define HAVE_FDB_DEL_NLATTR +#endif /* < 3.9.0 */ + +/*****************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(3,10,0) ) +#ifndef NAPI_POLL_WEIGHT +#define NAPI_POLL_WEIGHT 64 +#endif +#ifdef CONFIG_PCI_IOV +int __kc_pci_vfs_assigned(struct pci_dev *dev); +#else +static inline int __kc_pci_vfs_assigned(struct pci_dev __always_unused *dev) +{ + return 0; +} +#endif +#define pci_vfs_assigned(dev) __kc_pci_vfs_assigned(dev) + +#ifndef list_first_entry_or_null +#define list_first_entry_or_null(ptr, type, member) \ + (!list_empty(ptr) ? list_first_entry(ptr, type, member) : NULL) +#endif + +#ifndef VLAN_TX_COOKIE_MAGIC +static inline struct sk_buff *__kc__vlan_hwaccel_put_tag(struct sk_buff *skb, + u16 vlan_tci) +{ +#ifdef VLAN_TAG_PRESENT + vlan_tci |= VLAN_TAG_PRESENT; +#endif + skb->vlan_tci = vlan_tci; + return skb; +} +#define __vlan_hwaccel_put_tag(skb, vlan_proto, vlan_tci) \ + __kc__vlan_hwaccel_put_tag(skb, vlan_tci) +#endif + +#ifndef PCI_DEVID +#define PCI_DEVID(bus, devfn) ((((u16)(bus)) << 8) | (devfn)) +#endif + +/* The definitions for these functions when CONFIG_OF_NET is defined are + * pulled in from . For kernels older than 3.5 we already have + * backports for when CONFIG_OF_NET is true. These are separated and + * duplicated in order to cover all cases so that all kernels get either the + * real definitions (when CONFIG_OF_NET is defined) or the stub definitions + * (when CONFIG_OF_NET is not defined, or the kernel is too old to have real + * definitions). + */ +#ifndef CONFIG_OF_NET +static inline int of_get_phy_mode(struct device_node __always_unused *np) +{ + return -ENODEV; +} + +static inline const void * +of_get_mac_address(struct device_node __always_unused *np) +{ + return NULL; +} +#endif + +#else /* >= 3.10.0 */ +#define HAVE_ENCAP_TSO_OFFLOAD +#define USE_DEFAULT_FDB_DEL_DUMP +#define HAVE_SKB_INNER_NETWORK_HEADER + +#if (RHEL_RELEASE_CODE && \ + (RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,0))) +#if (RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(8,0)) +#define HAVE_RHEL7_PCI_DRIVER_RH +#if (RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,2)) +#define HAVE_RHEL7_PCI_RESET_NOTIFY +#endif /* RHEL >= 7.2 */ +#if (RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,3)) +#if (RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(7,5)) +#define HAVE_GENEVE_RX_OFFLOAD +#endif /* RHEL < 7.5 */ +#define HAVE_ETHTOOL_FLOW_UNION_IP6_SPEC +#define HAVE_RHEL7_NET_DEVICE_OPS_EXT +#if !defined(HAVE_UDP_ENC_TUNNEL) && IS_ENABLED(CONFIG_GENEVE) +#define HAVE_UDP_ENC_TUNNEL +#endif /* !HAVE_UDP_ENC_TUNNEL && CONFIG_GENEVE */ +#endif /* RHEL >= 7.3 */ + +/* new hooks added to net_device_ops_extended in RHEL7.4 */ +#if (RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,4)) +#define HAVE_RHEL7_NETDEV_OPS_EXT_NDO_SET_VF_VLAN +#define HAVE_RHEL7_NETDEV_OPS_EXT_NDO_UDP_TUNNEL +#define HAVE_UDP_ENC_RX_OFFLOAD +#endif /* RHEL >= 7.4 */ +#else /* RHEL >= 8.0 */ +#define NO_NETDEV_BPF_PROG_ATTACHED +#define HAVE_NDO_SELECT_QUEUE_SB_DEV +#endif /* RHEL >= 8.0 */ +#endif /* RHEL >= 7.0 */ +#endif /* >= 3.10.0 */ + +/*****************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(3,11,0) ) +#define netdev_notifier_info_to_dev(ptr) ptr +#ifndef time_in_range64 +#define time_in_range64(a, b, c) \ + (time_after_eq64(a, b) && \ + time_before_eq64(a, c)) +#endif /* time_in_range64 */ +#if ((RHEL_RELEASE_CODE && RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(6,6)) ||\ + (SLE_VERSION_CODE && SLE_VERSION_CODE >= SLE_VERSION(11,4,0))) +#define HAVE_NDO_SET_VF_LINK_STATE +#endif +#if RHEL_RELEASE_CODE && (RHEL_RELEASE_CODE > RHEL_RELEASE_VERSION(7,2)) +#define HAVE_NDO_SELECT_QUEUE_ACCEL_FALLBACK +#endif +#else /* >= 3.11.0 */ +#define HAVE_NDO_SET_VF_LINK_STATE +#define HAVE_SKB_INNER_PROTOCOL +#define HAVE_MPLS_FEATURES +#endif /* >= 3.11.0 */ + +/*****************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(3,12,0) ) +int __kc_pcie_get_minimum_link(struct pci_dev *dev, enum pci_bus_speed *speed, + enum pcie_link_width *width); +#ifndef pcie_get_minimum_link +#define pcie_get_minimum_link(_p, _s, _w) __kc_pcie_get_minimum_link(_p, _s, _w) +#endif + +#if (RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(6,7)) +int _kc_pci_wait_for_pending_transaction(struct pci_dev *dev); +#define pci_wait_for_pending_transaction _kc_pci_wait_for_pending_transaction +#endif /* = 3.12.0 */ +#if ( SLE_VERSION_CODE && SLE_VERSION_CODE >= SLE_VERSION(12,0,0)) +#define HAVE_NDO_SELECT_QUEUE_ACCEL_FALLBACK +#endif +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(4,8,0) ) +#define HAVE_VXLAN_RX_OFFLOAD +#if !defined(HAVE_UDP_ENC_TUNNEL) && IS_ENABLED(CONFIG_VXLAN) +#define HAVE_UDP_ENC_TUNNEL +#endif +#endif /* < 4.8.0 */ +#define HAVE_NDO_GET_PHYS_PORT_ID +#define HAVE_NETIF_SET_XPS_QUEUE_CONST_MASK +#endif /* >= 3.12.0 */ + +/*****************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(3,13,0) ) +#define dma_set_mask_and_coherent(_p, _m) __kc_dma_set_mask_and_coherent(_p, _m) +int __kc_dma_set_mask_and_coherent(struct device *dev, u64 mask); +#ifndef u64_stats_init +#define u64_stats_init(a) do { } while(0) +#endif +#undef BIT_ULL +#define BIT_ULL(n) (1ULL << (n)) + +#if (!(SLE_VERSION_CODE && SLE_VERSION_CODE >= SLE_VERSION(12,0,0)) && \ + !(RHEL_RELEASE_CODE && RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,0))) +static inline struct pci_dev *pci_upstream_bridge(struct pci_dev *dev) +{ + dev = pci_physfn(dev); + if (pci_is_root_bus(dev->bus)) + return NULL; + + return dev->bus->self; +} +#endif + +#if (SLE_VERSION_CODE && SLE_VERSION_CODE >= SLE_VERSION(12,1,0)) +#undef HAVE_STRUCT_PAGE_PFMEMALLOC +#define HAVE_DCBNL_OPS_SETAPP_RETURN_INT +#endif +#ifndef list_next_entry +#define list_next_entry(pos, member) \ + list_entry((pos)->member.next, typeof(*(pos)), member) +#endif +#ifndef list_prev_entry +#define list_prev_entry(pos, member) \ + list_entry((pos)->member.prev, typeof(*(pos)), member) +#endif + +#if (!(RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,2))) +#define list_last_entry(ptr, type, member) list_entry((ptr)->prev, type, member) +#endif + +#if (RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(7,0)) +bool _kc_pci_device_is_present(struct pci_dev *pdev); +#define pci_device_is_present _kc_pci_device_is_present +#endif /* = 3.13.0 */ +#define HAVE_VXLAN_CHECKS +#if (UBUNTU_VERSION_CODE && UBUNTU_VERSION_CODE >= UBUNTU_VERSION(3,13,0,24)) +#define HAVE_NDO_SELECT_QUEUE_ACCEL_FALLBACK +#else +#define HAVE_NDO_SELECT_QUEUE_ACCEL +#endif +#define HAVE_HWMON_DEVICE_REGISTER_WITH_GROUPS +#endif + +/*****************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(3,14,0) ) + +#ifndef U16_MAX +#define U16_MAX ((u16)~0U) +#endif + +#ifndef U32_MAX +#define U32_MAX ((u32)~0U) +#endif + +#ifndef U64_MAX +#define U64_MAX ((u64)~0ULL) +#endif + +#if (!(RHEL_RELEASE_CODE && RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,2))) +#define dev_consume_skb_any(x) dev_kfree_skb_any(x) +#define dev_consume_skb_irq(x) dev_kfree_skb_irq(x) +#endif + +#if (!(RHEL_RELEASE_CODE && RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,0)) && \ + !(SLE_VERSION_CODE && SLE_VERSION_CODE >= SLE_VERSION(12,0,0))) + +/* it isn't expected that this would be a #define unless we made it so */ +#ifndef skb_set_hash + +#define PKT_HASH_TYPE_NONE 0 +#define PKT_HASH_TYPE_L2 1 +#define PKT_HASH_TYPE_L3 2 +#define PKT_HASH_TYPE_L4 3 + +enum _kc_pkt_hash_types { + _KC_PKT_HASH_TYPE_NONE = PKT_HASH_TYPE_NONE, + _KC_PKT_HASH_TYPE_L2 = PKT_HASH_TYPE_L2, + _KC_PKT_HASH_TYPE_L3 = PKT_HASH_TYPE_L3, + _KC_PKT_HASH_TYPE_L4 = PKT_HASH_TYPE_L4, +}; +#define pkt_hash_types _kc_pkt_hash_types + +#define skb_set_hash __kc_skb_set_hash +static inline void __kc_skb_set_hash(struct sk_buff __maybe_unused *skb, + u32 __maybe_unused hash, + int __maybe_unused type) +{ +#ifdef HAVE_SKB_L4_RXHASH + skb->l4_rxhash = (type == PKT_HASH_TYPE_L4); +#endif +#ifdef NETIF_F_RXHASH + skb->rxhash = hash; +#endif +} +#endif /* !skb_set_hash */ + +#else /* RHEL_RELEASE_CODE >= 7.0 || SLE_VERSION_CODE >= 12.0 */ + +#if ((RHEL_RELEASE_CODE && RHEL_RELEASE_CODE <= RHEL_RELEASE_VERSION(7,0)) ||\ + (SLE_VERSION_CODE && SLE_VERSION_CODE <= SLE_VERSION(12,1,0))) +/* GPLv2 code taken from 5.10-rc2 kernel source include/linux/pci.h, Copyright + * original authors. + */ +static inline int pci_enable_msix_exact(struct pci_dev *dev, + struct msix_entry *entries, int nvec) +{ + int rc = pci_enable_msix_range(dev, entries, nvec, nvec); + if (rc < 0) + return rc; + return 0; +} +#endif /* <=EL7.0 || <=SLES 12.1 */ +#if (!(RHEL_RELEASE_CODE && RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,5))) +#ifndef HAVE_VXLAN_RX_OFFLOAD +#define HAVE_VXLAN_RX_OFFLOAD +#endif /* HAVE_VXLAN_RX_OFFLOAD */ +#endif + +#if !defined(HAVE_UDP_ENC_TUNNEL) && IS_ENABLED(CONFIG_VXLAN) +#define HAVE_UDP_ENC_TUNNEL +#endif + +#ifndef HAVE_VXLAN_CHECKS +#define HAVE_VXLAN_CHECKS +#endif /* HAVE_VXLAN_CHECKS */ +#endif /* !(RHEL_RELEASE_CODE >= 7.0 && SLE_VERSION_CODE >= 12.0) */ + +#if ((RHEL_RELEASE_CODE && RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,3)) ||\ + (SLE_VERSION_CODE && SLE_VERSION_CODE >= SLE_VERSION(12,0,0))) +#define HAVE_NDO_DFWD_OPS +#endif + +#ifndef pci_enable_msix_range +int __kc_pci_enable_msix_range(struct pci_dev *dev, struct msix_entry *entries, + int minvec, int maxvec); +#define pci_enable_msix_range __kc_pci_enable_msix_range +#endif + +#ifndef ether_addr_copy +#define ether_addr_copy __kc_ether_addr_copy +static inline void __kc_ether_addr_copy(u8 *dst, const u8 *src) +{ +#if defined(CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS) + *(u32 *)dst = *(const u32 *)src; + *(u16 *)(dst + 4) = *(const u16 *)(src + 4); +#else + u16 *a = (u16 *)dst; + const u16 *b = (const u16 *)src; + + a[0] = b[0]; + a[1] = b[1]; + a[2] = b[2]; +#endif +} +#endif /* ether_addr_copy */ +int __kc_ipv6_find_hdr(const struct sk_buff *skb, unsigned int *offset, + int target, unsigned short *fragoff, int *flags); +#define ipv6_find_hdr(a, b, c, d, e) __kc_ipv6_find_hdr((a), (b), (c), (d), (e)) + +#ifndef OPTIMIZE_HIDE_VAR +#ifdef __GNUC__ +#define OPTIMIZER_HIDE_VAR(var) __asm__ ("" : "=r" (var) : "0" (var)) +#else +#include +#define OPTIMIZE_HIDE_VAR(var) barrier() +#endif +#endif + +#if (!(RHEL_RELEASE_CODE && RHEL_RELEASE_CODE > RHEL_RELEASE_VERSION(7,0)) && \ + !(SLE_VERSION_CODE && SLE_VERSION_CODE >= SLE_VERSION(10,4,0))) +static inline __u32 skb_get_hash_raw(const struct sk_buff *skb) +{ +#ifdef NETIF_F_RXHASH + return skb->rxhash; +#else + return 0; +#endif /* NETIF_F_RXHASH */ +} +#endif /* !RHEL > 5.9 && !SLES >= 10.4 */ + +#if (RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(7,5)) +#define request_firmware_direct request_firmware +#endif /* !RHEL || RHEL < 7.5 */ + +#else /* >= 3.14.0 */ + +/* for ndo_dfwd_ ops add_station, del_station and _start_xmit */ +#ifndef HAVE_NDO_DFWD_OPS +#define HAVE_NDO_DFWD_OPS +#endif +#define HAVE_NDO_SELECT_QUEUE_ACCEL_FALLBACK +#endif /* 3.14.0 */ + +/*****************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(3,15,0) ) +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,35) ) +#define HAVE_SKBUFF_RXHASH +#endif /* >= 2.6.35 */ +#if (!(RHEL_RELEASE_CODE && RHEL_RELEASE_CODE > RHEL_RELEASE_VERSION(7,1)) && \ + !(UBUNTU_VERSION_CODE && UBUNTU_VERSION_CODE >= UBUNTU_VERSION(3,13,0,30))) +#define u64_stats_fetch_begin_irq u64_stats_fetch_begin_bh +#define u64_stats_fetch_retry_irq u64_stats_fetch_retry_bh +#endif + +#else /* >= 3.15.0 */ +#define HAVE_NET_GET_RANDOM_ONCE +#define HAVE_PTP_1588_CLOCK_PINS +#define HAVE_NETDEV_PORT +#endif /* 3.15.0 */ + +/*****************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(3,16,0) ) +#ifndef smp_mb__before_atomic +#define smp_mb__before_atomic() smp_mb() +#define smp_mb__after_atomic() smp_mb() +#endif +#ifndef __dev_uc_sync +#ifdef HAVE_SET_RX_MODE +#ifdef NETDEV_HW_ADDR_T_UNICAST +int __kc_hw_addr_sync_dev(struct netdev_hw_addr_list *list, + struct net_device *dev, + int (*sync)(struct net_device *, const unsigned char *), + int (*unsync)(struct net_device *, const unsigned char *)); +void __kc_hw_addr_unsync_dev(struct netdev_hw_addr_list *list, + struct net_device *dev, + int (*unsync)(struct net_device *, const unsigned char *)); +#endif +#ifndef NETDEV_HW_ADDR_T_MULTICAST +int __kc_dev_addr_sync_dev(struct dev_addr_list **list, int *count, + struct net_device *dev, + int (*sync)(struct net_device *, const unsigned char *), + int (*unsync)(struct net_device *, const unsigned char *)); +void __kc_dev_addr_unsync_dev(struct dev_addr_list **list, int *count, + struct net_device *dev, + int (*unsync)(struct net_device *, const unsigned char *)); +#endif +#endif /* HAVE_SET_RX_MODE */ + +static inline int __kc_dev_uc_sync(struct net_device __maybe_unused *dev, + int __maybe_unused (*sync)(struct net_device *, const unsigned char *), + int __maybe_unused (*unsync)(struct net_device *, const unsigned char *)) +{ +#ifdef NETDEV_HW_ADDR_T_UNICAST + return __kc_hw_addr_sync_dev(&dev->uc, dev, sync, unsync); +#elif defined(HAVE_SET_RX_MODE) + return __kc_dev_addr_sync_dev(&dev->uc_list, &dev->uc_count, + dev, sync, unsync); +#else + return 0; +#endif +} +#define __dev_uc_sync __kc_dev_uc_sync + +static inline void __kc_dev_uc_unsync(struct net_device __maybe_unused *dev, + int __maybe_unused (*unsync)(struct net_device *, const unsigned char *)) +{ +#ifdef HAVE_SET_RX_MODE +#ifdef NETDEV_HW_ADDR_T_UNICAST + __kc_hw_addr_unsync_dev(&dev->uc, dev, unsync); +#else /* NETDEV_HW_ADDR_T_MULTICAST */ + __kc_dev_addr_unsync_dev(&dev->uc_list, &dev->uc_count, dev, unsync); +#endif /* NETDEV_HW_ADDR_T_UNICAST */ +#endif /* HAVE_SET_RX_MODE */ +} +#define __dev_uc_unsync __kc_dev_uc_unsync + +static inline int __kc_dev_mc_sync(struct net_device __maybe_unused *dev, + int __maybe_unused (*sync)(struct net_device *, const unsigned char *), + int __maybe_unused (*unsync)(struct net_device *, const unsigned char *)) +{ +#ifdef NETDEV_HW_ADDR_T_MULTICAST + return __kc_hw_addr_sync_dev(&dev->mc, dev, sync, unsync); +#elif defined(HAVE_SET_RX_MODE) + return __kc_dev_addr_sync_dev(&dev->mc_list, &dev->mc_count, + dev, sync, unsync); +#else + return 0; +#endif + +} +#define __dev_mc_sync __kc_dev_mc_sync + +static inline void __kc_dev_mc_unsync(struct net_device __maybe_unused *dev, + int __maybe_unused (*unsync)(struct net_device *, const unsigned char *)) +{ +#ifdef HAVE_SET_RX_MODE +#ifdef NETDEV_HW_ADDR_T_MULTICAST + __kc_hw_addr_unsync_dev(&dev->mc, dev, unsync); +#else /* NETDEV_HW_ADDR_T_MULTICAST */ + __kc_dev_addr_unsync_dev(&dev->mc_list, &dev->mc_count, dev, unsync); +#endif /* NETDEV_HW_ADDR_T_MULTICAST */ +#endif /* HAVE_SET_RX_MODE */ +} +#define __dev_mc_unsync __kc_dev_mc_unsync +#endif /* __dev_uc_sync */ + +#if RHEL_RELEASE_CODE && (RHEL_RELEASE_CODE > RHEL_RELEASE_VERSION(7,1)) +#define HAVE_NDO_SET_VF_MIN_MAX_TX_RATE +#endif + +#ifndef NETIF_F_GSO_UDP_TUNNEL_CSUM +/* if someone backports this, hopefully they backport as a #define. + * declare it as zero on older kernels so that if it get's or'd in + * it won't effect anything, therefore preventing core driver changes + */ +#define NETIF_F_GSO_UDP_TUNNEL_CSUM 0 +#define SKB_GSO_UDP_TUNNEL_CSUM 0 +#endif +#else +#if ( ( LINUX_VERSION_CODE < KERNEL_VERSION(4,13,0) ) && \ + ! ( SLE_VERSION_CODE && ( SLE_VERSION_CODE >= SLE_VERSION(12,4,0)) ) ) +#define HAVE_PCI_ERROR_HANDLER_RESET_NOTIFY +#endif /* >= 3.16.0 && < 4.13.0 && !(SLES >= 12sp4) */ +#define HAVE_NDO_SET_VF_MIN_MAX_TX_RATE +#endif /* 3.16.0 */ + +/*****************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(3,17,0) ) +#if !(RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(6,8) && \ + RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(7,0)) && \ + !(RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,2)) +#ifndef timespec64 +#define timespec64 timespec +static inline struct timespec64 timespec_to_timespec64(const struct timespec ts) +{ + return ts; +} +static inline struct timespec timespec64_to_timespec(const struct timespec64 ts64) +{ + return ts64; +} +#define timespec64_equal timespec_equal +#define timespec64_compare timespec_compare +#define set_normalized_timespec64 set_normalized_timespec +#define timespec64_add_safe timespec_add_safe +#define timespec64_add timespec_add +#define timespec64_sub timespec_sub +#define timespec64_valid timespec_valid +#define timespec64_valid_strict timespec_valid_strict +#define timespec64_to_ns timespec_to_ns +#define ns_to_timespec64 ns_to_timespec +#define ktime_to_timespec64 ktime_to_timespec +#define ktime_get_ts64 ktime_get_ts +#define ktime_get_real_ts64 ktime_get_real_ts +#define timespec64_add_ns timespec_add_ns +#endif /* timespec64 */ +#endif /* !(RHEL6.8= RHEL_RELEASE_VERSION(6,8) && \ + RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(7,0)) +static inline void ktime_get_real_ts64(struct timespec64 *ts) +{ + *ts = ktime_to_timespec64(ktime_get_real()); +} + +static inline void ktime_get_ts64(struct timespec64 *ts) +{ + *ts = ktime_to_timespec64(ktime_get()); +} +#endif + +#if !(RHEL_RELEASE_CODE && RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,4)) +#define hlist_add_behind(_a, _b) hlist_add_after(_b, _a) +#endif + +#if (RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(7,5)) +#endif /* RHEL_RELEASE_CODE < RHEL7.5 */ + +#if RHEL_RELEASE_CODE && \ + RHEL_RELEASE_CODE > RHEL_RELEASE_VERSION(6,3) && \ + RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(7,3) +static inline u64 ktime_get_ns(void) +{ + return ktime_to_ns(ktime_get()); +} + +static inline u64 ktime_get_real_ns(void) +{ + return ktime_to_ns(ktime_get_real()); +} + +static inline u64 ktime_get_boot_ns(void) +{ + return ktime_to_ns(ktime_get_boottime()); +} +#endif /* RHEL < 7.3 */ + +#else +#define HAVE_DCBNL_OPS_SETAPP_RETURN_INT +#include +#define HAVE_RHASHTABLE +#endif /* 3.17.0 */ + +/*****************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(3,18,0) ) +#ifndef NO_PTP_SUPPORT +#include +struct sk_buff *__kc_skb_clone_sk(struct sk_buff *skb); +void __kc_skb_complete_tx_timestamp(struct sk_buff *skb, + struct skb_shared_hwtstamps *hwtstamps); +#define skb_clone_sk __kc_skb_clone_sk +#define skb_complete_tx_timestamp __kc_skb_complete_tx_timestamp +#endif +#ifndef ETH_P_XDSA +#define ETH_P_XDSA 0x00F8 +#endif +/* RHEL 7.1 backported csum_level, but SLES 12 and 12-SP1 did not */ +#if RHEL_RELEASE_CODE && (RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,1)) +#define HAVE_SKBUFF_CSUM_LEVEL +#endif /* >= RH 7.1 */ + +/* RHEL 7.3 backported xmit_more */ +#if (RHEL_RELEASE_CODE && RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,3)) +#define HAVE_SKB_XMIT_MORE +#endif /* >= RH 7.3 */ + +#undef GENMASK +#define GENMASK(h, l) \ + (((~0UL) << (l)) & (~0UL >> (BITS_PER_LONG - 1 - (h)))) +#undef GENMASK_ULL +#define GENMASK_ULL(h, l) \ + (((~0ULL) << (l)) & (~0ULL >> (BITS_PER_LONG_LONG - 1 - (h)))) + +#else /* 3.18.0 */ +#define HAVE_SKBUFF_CSUM_LEVEL +#define HAVE_SKB_XMIT_MORE +#define HAVE_SKB_INNER_PROTOCOL_TYPE +#endif /* 3.18.0 */ + +/*****************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(3,18,4) ) +#else +#define HAVE_NDO_FEATURES_CHECK +#endif /* 3.18.4 */ + +/*****************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(3,18,13) ) +#ifndef WRITE_ONCE +#define WRITE_ONCE(x, val) ({ ACCESS_ONCE(x) = (val); }) +#endif +#endif /* 3.18.13 */ + +/*****************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(3,19,0) ) +/* netdev_phys_port_id renamed to netdev_phys_item_id */ +#define netdev_phys_item_id netdev_phys_port_id + +static inline void _kc_napi_complete_done(struct napi_struct *napi, + int __always_unused work_done) { + napi_complete(napi); +} +/* don't use our backport if the distro kernels already have it */ +#if (SLE_VERSION_CODE && (SLE_VERSION_CODE < SLE_VERSION(12,3,0))) || \ + (RHEL_RELEASE_CODE && (RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(7,5))) +#define napi_complete_done _kc_napi_complete_done +#endif + +int _kc_bitmap_print_to_pagebuf(bool list, char *buf, + const unsigned long *maskp, int nmaskbits); +#define bitmap_print_to_pagebuf _kc_bitmap_print_to_pagebuf + +#ifndef NETDEV_RSS_KEY_LEN +#define NETDEV_RSS_KEY_LEN (13 * 4) +#endif +#if (!(RHEL_RELEASE_CODE && \ + ((RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(6,7) && RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(7,0)) || \ + (RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,2))))) +#define netdev_rss_key_fill(buffer, len) __kc_netdev_rss_key_fill(buffer, len) +#endif /* RHEL_RELEASE_CODE */ +void __kc_netdev_rss_key_fill(void *buffer, size_t len); +#define SPEED_20000 20000 +#define SPEED_40000 40000 +#ifndef dma_rmb +#define dma_rmb() rmb() +#endif +#ifndef dev_alloc_pages +#ifndef NUMA_NO_NODE +#define NUMA_NO_NODE -1 +#endif +#define dev_alloc_pages(_order) alloc_pages_node(NUMA_NO_NODE, (GFP_ATOMIC | __GFP_COLD | __GFP_COMP | __GFP_MEMALLOC), (_order)) +#endif +#ifndef dev_alloc_page +#define dev_alloc_page() dev_alloc_pages(0) +#endif +#if !defined(eth_skb_pad) && !defined(skb_put_padto) +/** + * __kc_skb_put_padto - increase size and pad an skbuff up to a minimal size + * @skb: buffer to pad + * @len: minimal length + * + * Pads up a buffer to ensure the trailing bytes exist and are + * blanked. If the buffer already contains sufficient data it + * is untouched. Otherwise it is extended. Returns zero on + * success. The skb is freed on error. + */ +static inline int __kc_skb_put_padto(struct sk_buff *skb, unsigned int len) +{ + unsigned int size = skb->len; + + if (unlikely(size < len)) { + len -= size; + if (skb_pad(skb, len)) + return -ENOMEM; + __skb_put(skb, len); + } + return 0; +} +#define skb_put_padto(skb, len) __kc_skb_put_padto(skb, len) + +static inline int __kc_eth_skb_pad(struct sk_buff *skb) +{ + return __kc_skb_put_padto(skb, ETH_ZLEN); +} +#define eth_skb_pad(skb) __kc_eth_skb_pad(skb) +#endif /* eth_skb_pad && skb_put_padto */ + +#ifndef SKB_ALLOC_NAPI +/* RHEL 7.2 backported napi_alloc_skb and friends */ +static inline struct sk_buff *__kc_napi_alloc_skb(struct napi_struct *napi, unsigned int length) +{ + return netdev_alloc_skb_ip_align(napi->dev, length); +} +#define napi_alloc_skb(napi,len) __kc_napi_alloc_skb(napi,len) +#define __napi_alloc_skb(napi,len,mask) __kc_napi_alloc_skb(napi,len) +#endif /* SKB_ALLOC_NAPI */ +#define HAVE_CONFIG_PM_RUNTIME +#if (RHEL_RELEASE_CODE && (RHEL_RELEASE_CODE > RHEL_RELEASE_VERSION(6,7)) && \ + (RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(7,0))) +#define HAVE_RXFH_HASHFUNC +#endif /* 6.7 < RHEL < 7.0 */ +#if RHEL_RELEASE_CODE && (RHEL_RELEASE_CODE > RHEL_RELEASE_VERSION(7,1)) +#define HAVE_RXFH_HASHFUNC +#define NDO_DFLT_BRIDGE_GETLINK_HAS_BRFLAGS +#endif /* RHEL > 7.1 */ +#ifndef napi_schedule_irqoff +#define napi_schedule_irqoff napi_schedule +#endif +#ifndef READ_ONCE +#define READ_ONCE(_x) ACCESS_ONCE(_x) +#endif +#ifndef ETH_MODULE_SFF_8636 +#define ETH_MODULE_SFF_8636 0x3 +#endif +#ifndef ETH_MODULE_SFF_8636_LEN +#define ETH_MODULE_SFF_8636_LEN 256 +#endif +#ifndef ETH_MODULE_SFF_8436 +#define ETH_MODULE_SFF_8436 0x4 +#endif +#ifndef ETH_MODULE_SFF_8436_LEN +#define ETH_MODULE_SFF_8436_LEN 256 +#endif +#ifndef writel_relaxed +#define writel_relaxed writel +#endif +#else /* 3.19.0 */ +#define HAVE_RXFH_HASHFUNC +#define NDO_DFLT_BRIDGE_GETLINK_HAS_BRFLAGS +#endif /* 3.19.0 */ + +/*****************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(3,20,0) ) +/* vlan_tx_xx functions got renamed to skb_vlan */ +#ifndef skb_vlan_tag_get +#define skb_vlan_tag_get vlan_tx_tag_get +#endif +#ifndef skb_vlan_tag_present +#define skb_vlan_tag_present vlan_tx_tag_present +#endif +#if RHEL_RELEASE_CODE && (RHEL_RELEASE_CODE > RHEL_RELEASE_VERSION(7,1)) +#define HAVE_INCLUDE_LINUX_TIMECOUNTER_H +#endif +#if RHEL_RELEASE_CODE && (RHEL_RELEASE_CODE > RHEL_RELEASE_VERSION(7,2)) +#define HAVE_NDO_BRIDGE_SET_DEL_LINK_FLAGS +#endif +#else +#define HAVE_INCLUDE_LINUX_TIMECOUNTER_H +#define HAVE_NDO_BRIDGE_SET_DEL_LINK_FLAGS +#endif /* 3.20.0 */ + +/*****************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(4,0,0) ) +/* Definition for CONFIG_OF was introduced earlier */ +#if !defined(CONFIG_OF) && \ + !(RHEL_RELEASE_CODE && RHEL_RELEASE_CODE > RHEL_RELEASE_VERSION(7,2)) +static inline struct device_node * +pci_device_to_OF_node(const struct pci_dev __always_unused *pdev) { return NULL; } +#else /* !CONFIG_OF && RHEL < 7.3 */ +#define HAVE_DDP_PROFILE_UPLOAD_SUPPORT +#endif /* !CONFIG_OF && RHEL < 7.3 */ +#else /* < 4.0 */ +#define HAVE_DDP_PROFILE_UPLOAD_SUPPORT +#endif /* < 4.0 */ + +/*****************************************************************************/ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(4,1,0) ) +#ifndef NO_PTP_SUPPORT +#ifdef HAVE_INCLUDE_LINUX_TIMECOUNTER_H +#include +#else +#include +#endif +static inline void __kc_timecounter_adjtime(struct timecounter *tc, s64 delta) +{ + tc->nsec += delta; +} + +static inline struct net_device * +of_find_net_device_by_node(struct device_node __always_unused *np) +{ + return NULL; +} + +#define timecounter_adjtime __kc_timecounter_adjtime +#endif +#if ((RHEL_RELEASE_CODE && (RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,2))) || \ + (SLE_VERSION_CODE && (SLE_VERSION_CODE >= SLE_VERSION(12,2,0)))) +#define HAVE_NDO_SET_VF_RSS_QUERY_EN +#endif +#if RHEL_RELEASE_CODE && (RHEL_RELEASE_CODE > RHEL_RELEASE_VERSION(7,2)) +#define HAVE_NDO_BRIDGE_GETLINK_NLFLAGS +#define HAVE_RHEL7_EXTENDED_NDO_SET_TX_MAXRATE +#define HAVE_NDO_SET_TX_MAXRATE +#endif +#if !((RHEL_RELEASE_CODE > RHEL_RELEASE_VERSION(6,8) && RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(7,0)) && \ + (RHEL_RELEASE_CODE > RHEL_RELEASE_VERSION(7,2)) && \ + (SLE_VERSION_CODE > SLE_VERSION(12,1,0))) +unsigned int _kc_cpumask_local_spread(unsigned int i, int node); +#define cpumask_local_spread _kc_cpumask_local_spread +#endif +#ifdef HAVE_RHASHTABLE +#define rhashtable_loopup_fast(ht, key, params) \ + do { \ + (void)params; \ + rhashtable_lookup((ht), (key)); \ + } while (0) + +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(3,19,0) ) +#define rhashtable_insert_fast(ht, obj, params) \ + do { \ + (void)params; \ + rhashtable_insert((ht), (obj), GFP_KERNEL); \ + } while (0) + +#define rhashtable_remove_fast(ht, obj, params) \ + do { \ + (void)params; \ + rhashtable_remove((ht), (obj), GFP_KERNEL); \ + } while (0) + +#else /* >= 3,19,0 */ +#define rhashtable_insert_fast(ht, obj, params) \ + do { \ + (void)params; \ + rhashtable_insert((ht), (obj)); \ + } while (0) + +#define rhashtable_remove_fast(ht, obj, params) \ + do { \ + (void)params; \ + rhashtable_remove((ht), (obj)); \ + } while (0) + +#endif /* 3,19,0 */ +#endif /* HAVE_RHASHTABLE */ +#else /* >= 4,1,0 */ +#define HAVE_NDO_GET_PHYS_PORT_NAME +#define HAVE_NDO_BRIDGE_GETLINK_NLFLAGS +#define HAVE_PASSTHRU_FEATURES_CHECK +#define HAVE_NDO_SET_VF_RSS_QUERY_EN +#define HAVE_NDO_SET_TX_MAXRATE +#endif /* 4,1,0 */ + +/*****************************************************************************/ +#if (LINUX_VERSION_CODE < KERNEL_VERSION(4,1,9)) +#if (!(RHEL_RELEASE_CODE > RHEL_RELEASE_VERSION(7,2)) && \ + !((SLE_VERSION_CODE == SLE_VERSION(11,3,0)) && \ + (SLE_LOCALVERSION_CODE >= SLE_LOCALVERSION(0,47,71))) && \ + !((SLE_VERSION_CODE == SLE_VERSION(11,4,0)) && \ + (SLE_LOCALVERSION_CODE >= SLE_LOCALVERSION(65,0,0))) && \ + !(SLE_VERSION_CODE >= SLE_VERSION(12,1,0))) +static inline bool page_is_pfmemalloc(struct page __maybe_unused *page) +{ +#ifdef HAVE_STRUCT_PAGE_PFMEMALLOC + return page->pfmemalloc; +#else + return false; +#endif +} +#endif /* !RHEL7.2+ && !SLES11sp3(3.0.101-0.47.71+ update) && !SLES11sp4(3.0.101-65+ update) & !SLES12sp1+ */ +#else +#undef HAVE_STRUCT_PAGE_PFMEMALLOC +#endif /* 4.1.9 */ + +/*****************************************************************************/ +#if (LINUX_VERSION_CODE < KERNEL_VERSION(4,2,0)) +#if (!(RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,2)) && \ + !(SLE_VERSION_CODE >= SLE_VERSION(12,1,0))) +#define ETHTOOL_RX_FLOW_SPEC_RING 0x00000000FFFFFFFFULL +#define ETHTOOL_RX_FLOW_SPEC_RING_VF 0x000000FF00000000ULL +#define ETHTOOL_RX_FLOW_SPEC_RING_VF_OFF 32 +static inline __u64 ethtool_get_flow_spec_ring(__u64 ring_cookie) +{ + return ETHTOOL_RX_FLOW_SPEC_RING & ring_cookie; +}; + +static inline __u64 ethtool_get_flow_spec_ring_vf(__u64 ring_cookie) +{ + return (ETHTOOL_RX_FLOW_SPEC_RING_VF & ring_cookie) >> + ETHTOOL_RX_FLOW_SPEC_RING_VF_OFF; +}; +#endif /* ! RHEL >= 7.2 && ! SLES >= 12.1 */ +#if (RHEL_RELEASE_CODE && RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,4)) +#define HAVE_NDO_DFLT_BRIDGE_GETLINK_VLAN_SUPPORT +#endif + +#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,27)) +#if (!((RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(6,8) && \ + RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(7,0)) || \ + RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,2))) +static inline bool pci_ari_enabled(struct pci_bus *bus) +{ + return bus->self && bus->self->ari_enabled; +} +#if (RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,2)) +#define HAVE_VF_STATS +#endif /* (RHEL7.2+) */ +#endif /* !(RHEL6.8+ || RHEL7.2+) */ +#else +static inline bool pci_ari_enabled(struct pci_bus *bus) +{ + return false; +} +#endif /* 2.6.27 */ +#else +#define HAVE_NDO_DFLT_BRIDGE_GETLINK_VLAN_SUPPORT +#define HAVE_VF_STATS +#endif /* 4.2.0 */ + +/*****************************************************************************/ +#if (LINUX_VERSION_CODE < KERNEL_VERSION(4,3,0)) +#if (!(RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,4)) && \ + !(SLE_VERSION_CODE >= SLE_VERSION(12,2,0))) +/** + * _kc_flow_dissector_key_ipv4_addrs: + * @src: source ip address + * @dst: destination ip address + */ +struct _kc_flow_dissector_key_ipv4_addrs { + __be32 src; + __be32 dst; +}; + +/** + * _kc_flow_dissector_key_ipv6_addrs: + * @src: source ip address + * @dst: destination ip address + */ +struct _kc_flow_dissector_key_ipv6_addrs { + struct in6_addr src; + struct in6_addr dst; +}; + +/** + * _kc_flow_dissector_key_addrs: + * @v4addrs: IPv4 addresses + * @v6addrs: IPv6 addresses + */ +struct _kc_flow_dissector_key_addrs { + union { + struct _kc_flow_dissector_key_ipv4_addrs v4addrs; + struct _kc_flow_dissector_key_ipv6_addrs v6addrs; + }; +}; + +/** + * _kc_flow_dissector_key_tp_ports: + * @ports: port numbers of Transport header + * src: source port number + * dst: destination port number + */ +struct _kc_flow_dissector_key_ports { + union { + __be32 ports; + struct { + __be16 src; + __be16 dst; + }; + }; +}; + +/** + * _kc_flow_dissector_key_basic: + * @n_proto: Network header protocol (eg. IPv4/IPv6) + * @ip_proto: Transport header protocol (eg. TCP/UDP) + * @padding: padding for alignment + */ +struct _kc_flow_dissector_key_basic { + __be16 n_proto; + u8 ip_proto; + u8 padding; +}; + +struct _kc_flow_keys { + struct _kc_flow_dissector_key_basic basic; + struct _kc_flow_dissector_key_ports ports; + struct _kc_flow_dissector_key_addrs addrs; +}; + +/* These are all the include files for kernels inside this #ifdef block that + * have any reference to the in kernel definition of struct flow_keys. The + * reason for putting them here is to make 100% sure that these files do not get + * included after re-defining flow_keys to _kc_flow_keys. This is done to + * prevent any possible ABI issues that this structure re-definition could case. + */ +#if ((LINUX_VERSION_CODE >= KERNEL_VERSION(3,3,0) && \ + LINUX_VERSION_CODE < KERNEL_VERSION(4,2,0)) || \ + RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(6,7) || \ + SLE_VERSION_CODE >= SLE_VERSION(11,4,0)) +#include +#endif /* (>= 3.3.0 && < 4.2.0) || >= RHEL 6.7 || >= SLE 11.4 */ +#if (LINUX_VERSION_CODE == KERNEL_VERSION(4,2,0)) +#include +#endif /* 4.2.0 */ +#include +#include +#include +#include + +#define flow_keys _kc_flow_keys +bool +_kc_skb_flow_dissect_flow_keys(const struct sk_buff *skb, + struct flow_keys *flow, + unsigned int __always_unused flags); +#define skb_flow_dissect_flow_keys _kc_skb_flow_dissect_flow_keys +#endif /* ! >= RHEL 7.4 && ! >= SLES 12.2 */ + +#if ((RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,3)) || \ + (SLE_VERSION_CODE >= SLE_VERSION(12,2,0))) +#include +#endif /* >= RHEL7.3 || >= SLE12sp2 */ +#else /* >= 4.3.0 */ +#include +#endif /* 4.3.0 */ + +/*****************************************************************************/ +#if (LINUX_VERSION_CODE < KERNEL_VERSION(4,4,0)) +#if (RHEL_RELEASE_CODE && RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,3)) +#define HAVE_NDO_SET_VF_TRUST +#endif /* (RHEL_RELEASE >= 7.3) */ +#ifndef CONFIG_64BIT +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,3,0)) +#include /* 32-bit readq/writeq */ +#else /* 3.3.0 => 4.3.x */ +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,26)) +#include +#endif /* 2.6.26 => 3.3.0 */ +#ifndef readq +static inline __u64 readq(const volatile void __iomem *addr) +{ + const volatile u32 __iomem *p = addr; + u32 low, high; + + low = readl(p); + high = readl(p + 1); + + return low + ((u64)high << 32); +} +#define readq readq +#endif + +#ifndef writeq +static inline void writeq(__u64 val, volatile void __iomem *addr) +{ + writel(val, addr); + writel(val >> 32, (u8 *)addr + 4); +} +#define writeq writeq +#endif +#endif /* < 3.3.0 */ +#endif /* !CONFIG_64BIT */ +#else /* < 4.4.0 */ +#define HAVE_NDO_SET_VF_TRUST + +#ifndef CONFIG_64BIT +#include /* 32-bit readq/writeq */ +#endif /* !CONFIG_64BIT */ +#endif /* 4.4.0 */ + +/*****************************************************************************/ +#if (LINUX_VERSION_CODE < KERNEL_VERSION(4,5,0)) +/* protect against a likely backport */ +#ifndef NETIF_F_CSUM_MASK +#define NETIF_F_CSUM_MASK NETIF_F_ALL_CSUM +#endif /* NETIF_F_CSUM_MASK */ +#ifndef NETIF_F_SCTP_CRC +#define NETIF_F_SCTP_CRC NETIF_F_SCTP_CSUM +#endif /* NETIF_F_SCTP_CRC */ +#if (!(RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,3))) +#define eth_platform_get_mac_address _kc_eth_platform_get_mac_address +int _kc_eth_platform_get_mac_address(struct device *dev __maybe_unused, + u8 *mac_addr __maybe_unused); +#endif /* !(RHEL_RELEASE >= 7.3) */ +#else /* 4.5.0 */ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(4,8,0) ) +#define HAVE_GENEVE_RX_OFFLOAD +#if !defined(HAVE_UDP_ENC_TUNNEL) && IS_ENABLED(CONFIG_GENEVE) +#define HAVE_UDP_ENC_TUNNEL +#endif +#endif /* < 4.8.0 */ +#define HAVE_NETIF_NAPI_ADD_CALLS_NAPI_HASH_ADD +#define HAVE_NETDEV_UPPER_INFO +#endif /* 4.5.0 */ + +/*****************************************************************************/ +#if (LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0)) +#if !(RHEL_RELEASE_CODE && RHEL_RELEASE_CODE > RHEL_RELEASE_VERSION(7,3)) +static inline unsigned char *skb_checksum_start(const struct sk_buff *skb) +{ +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,22)) + return skb->head + skb->csum_start; +#else /* < 2.6.22 */ + return skb_transport_header(skb); +#endif +} +#endif + +#if !(UBUNTU_VERSION_CODE && \ + UBUNTU_VERSION_CODE >= UBUNTU_VERSION(4,4,0,21)) && \ + !(RHEL_RELEASE_CODE && \ + (RHEL_RELEASE_CODE > RHEL_RELEASE_VERSION(7,2))) && \ + !(SLE_VERSION_CODE && (SLE_VERSION_CODE >= SLE_VERSION(12,3,0))) +static inline void napi_consume_skb(struct sk_buff *skb, + int __always_unused budget) +{ + dev_consume_skb_any(skb); +} + +#endif /* UBUNTU 4,4,0,21, RHEL 7.2, SLES12 SP3 */ +#if !(SLE_VERSION_CODE && (SLE_VERSION_CODE >= SLE_VERSION(12,3,0))) && \ + !(RHEL_RELEASE_CODE && RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,4)) +static inline void csum_replace_by_diff(__sum16 *sum, __wsum diff) +{ + * sum = csum_fold(csum_add(diff, ~csum_unfold(*sum))); +} +#endif +#if !(RHEL_RELEASE_CODE && (RHEL_RELEASE_CODE > RHEL_RELEASE_VERSION(7,2))) && \ + !(SLE_VERSION_CODE && (SLE_VERSION_CODE > SLE_VERSION(12,3,0))) +static inline void page_ref_inc(struct page *page) +{ + get_page(page); +} +#else +#define HAVE_PAGE_COUNT_BULK_UPDATE +#endif +#ifndef IPV4_USER_FLOW +#define IPV4_USER_FLOW 0x0d /* spec only (usr_ip4_spec) */ +#endif + +#if ((RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,7)) || \ + (SLE_VERSION_CODE >= SLE_VERSION(12,2,0))) +#define HAVE_TC_SETUP_CLSU32 +#endif + +#ifndef kstrtobool +#define kstrtobool _kc_kstrtobool +int _kc_kstrtobool(const char *s, bool *res); +#endif + +#else /* >= 4.6.0 */ +#define HAVE_PAGE_COUNT_BULK_UPDATE +#define HAVE_ETHTOOL_FLOW_UNION_IP6_SPEC +#define HAVE_TC_SETUP_CLSU32 +#endif /* 4.6.0 */ + +/*****************************************************************************/ +#if (LINUX_VERSION_CODE < KERNEL_VERSION(4,7,0)) +#if ((SLE_VERSION_CODE >= SLE_VERSION(12,3,0)) ||\ + (RHEL_RELEASE_CODE && RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,4))) +#define HAVE_NETIF_TRANS_UPDATE +#endif /* SLES12sp3+ || RHEL7.4+ */ +#if ((RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,3)) ||\ + (SLE_VERSION_CODE >= SLE_VERSION(12,3,0))) +#define HAVE_ETHTOOL_25G_BITS +#define HAVE_ETHTOOL_50G_BITS +#define HAVE_ETHTOOL_100G_BITS +#endif /* RHEL7.3+ || SLES12sp3+ */ +#else /* 4.7.0 */ +#define HAVE_NETIF_TRANS_UPDATE +#define HAVE_ETHTOOL_CONVERT_U32_AND_LINK_MODE +#define HAVE_ETHTOOL_25G_BITS +#define HAVE_ETHTOOL_50G_BITS +#define HAVE_ETHTOOL_100G_BITS +#endif /* 4.7.0 */ + +/*****************************************************************************/ +#if (LINUX_VERSION_CODE < KERNEL_VERSION(4,8,0)) +#if !(RHEL_RELEASE_CODE && RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,4)) +enum udp_parsable_tunnel_type { + UDP_TUNNEL_TYPE_VXLAN, + UDP_TUNNEL_TYPE_GENEVE, +}; +struct udp_tunnel_info { + unsigned short type; + sa_family_t sa_family; + __be16 port; +}; +#endif + +#if (UBUNTU_VERSION_CODE && UBUNTU_VERSION_CODE < UBUNTU_VERSION(4,8,0,0)) +#define tc_no_actions(_exts) true +#define tc_for_each_action(_a, _exts) while (0) +#endif +#if !(SLE_VERSION_CODE && (SLE_VERSION_CODE >= SLE_VERSION(12,3,0))) &&\ + !(RHEL_RELEASE_CODE && RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,4)) +static inline int +#ifdef HAVE_NON_CONST_PCI_DRIVER_NAME +pci_request_io_regions(struct pci_dev *pdev, char *name) +#else +pci_request_io_regions(struct pci_dev *pdev, const char *name) +#endif +{ + return pci_request_selected_regions(pdev, + pci_select_bars(pdev, IORESOURCE_IO), name); +} + +static inline void +pci_release_io_regions(struct pci_dev *pdev) +{ + return pci_release_selected_regions(pdev, + pci_select_bars(pdev, IORESOURCE_IO)); +} + +static inline int +#ifdef HAVE_NON_CONST_PCI_DRIVER_NAME +pci_request_mem_regions(struct pci_dev *pdev, char *name) +#else +pci_request_mem_regions(struct pci_dev *pdev, const char *name) +#endif +{ + return pci_request_selected_regions(pdev, + pci_select_bars(pdev, IORESOURCE_MEM), name); +} + +static inline void +pci_release_mem_regions(struct pci_dev *pdev) +{ + return pci_release_selected_regions(pdev, + pci_select_bars(pdev, IORESOURCE_MEM)); +} +#endif /* !SLE_VERSION(12,3,0) */ +#if ((RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,4)) ||\ + (SLE_VERSION_CODE >= SLE_VERSION(12,3,0))) +#define HAVE_ETHTOOL_NEW_50G_BITS +#endif /* RHEL7.4+ || SLES12sp3+ */ +#else +#define HAVE_UDP_ENC_RX_OFFLOAD +#define HAVE_ETHTOOL_NEW_50G_BITS +#endif /* 4.8.0 */ + +/*****************************************************************************/ +#if (LINUX_VERSION_CODE < KERNEL_VERSION(4,9,0)) +#if (RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,4)) +#define HAVE_ETHTOOL_NEW_1G_BITS +#define HAVE_ETHTOOL_NEW_10G_BITS +#endif /* RHEL7.4+ */ +#if (RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(7,4)) +static inline void bitmap_from_u64(unsigned long *dst, u64 mask) +{ + dst[0] = mask & ULONG_MAX; + + if (sizeof(mask) > sizeof(unsigned long)) + dst[1] = mask >> 32; +} +#endif /* =4.9 */ +#define HAVE_FLOW_DISSECTOR_KEY_VLAN_PRIO +#define HAVE_ETHTOOL_NEW_1G_BITS +#define HAVE_ETHTOOL_NEW_10G_BITS +#endif /* KERNEL_VERSION(4.9.0) */ + +/*****************************************************************************/ +#if (LINUX_VERSION_CODE < KERNEL_VERSION(4,10,0)) +/* SLES 12.3 and RHEL 7.5 backported this interface */ +#if (!SLE_VERSION_CODE && !RHEL_RELEASE_CODE) || \ + (SLE_VERSION_CODE && (SLE_VERSION_CODE < SLE_VERSION(12,3,0))) || \ + (RHEL_RELEASE_CODE && (RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(7,5))) +static inline bool _kc_napi_complete_done2(struct napi_struct *napi, + int __always_unused work_done) +{ + /* it was really hard to get napi_complete_done to be safe to call + * recursively without running into our own kcompat, so just use + * napi_complete + */ + napi_complete(napi); + + /* true means that the stack is telling the driver to go-ahead and + * re-enable interrupts + */ + return true; +} + +#ifdef napi_complete_done +#undef napi_complete_done +#endif +#define napi_complete_done _kc_napi_complete_done2 +#endif /* sles and rhel exclusion for < 4.10 */ +#if (RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,4)) +#define HAVE_DEV_WALK_API +#define HAVE_ETHTOOL_NEW_2500MB_BITS +#define HAVE_ETHTOOL_5G_BITS +#endif /* RHEL7.4+ */ +#if (SLE_VERSION_CODE && (SLE_VERSION_CODE >= SLE_VERSION(12,3,0))) +#define HAVE_NETDEVICE_MIN_MAX_MTU +#endif /* (SLES >= 12.3.0) */ +#if (RHEL_RELEASE_CODE && (RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,5))) +#define HAVE_RHEL7_EXTENDED_MIN_MAX_MTU +#define HAVE_NETDEVICE_MIN_MAX_MTU +#endif +#if ((SLE_VERSION_CODE && (SLE_VERSION_CODE > SLE_VERSION(12,3,0))) ||\ + (RHEL_RELEASE_CODE && RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,5))) +#define HAVE_SWIOTLB_SKIP_CPU_SYNC +#endif + +#if ((SLE_VERSION_CODE && (SLE_VERSION_CODE < SLE_VERSION(15,0,0))) ||\ + (RHEL_RELEASE_CODE && (RHEL_RELEASE_CODE <= RHEL_RELEASE_VERSION(7,4)))) +#define page_frag_free __free_page_frag +#endif +#ifndef ETH_MIN_MTU +#define ETH_MIN_MTU 68 +#endif /* ETH_MIN_MTU */ + +/* If kernel is older than 4.10 but distro is RHEL >= 7.5 || SLES > 12SP4, + * it does have support for NAPI_STATE + */ +#if ((RHEL_RELEASE_CODE && (RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,5))) ||\ + (SLE_VERSION_CODE && (SLE_VERSION_CODE >= SLE_VERSION(12,4,0)))) +#define HAVE_NAPI_STATE_IN_BUSY_POLL +#endif /* RHEL >= 7.5 || SLES >=12.4 */ +#else /* >= 4.10 */ +#define HAVE_NETDEVICE_MIN_MAX_MTU +#define HAVE_SWIOTLB_SKIP_CPU_SYNC +#define HAVE_NETDEV_TC_RESETS_XPS +#define HAVE_XPS_QOS_SUPPORT +#define HAVE_DEV_WALK_API +#define HAVE_ETHTOOL_NEW_2500MB_BITS +#define HAVE_ETHTOOL_5G_BITS +/* kernel 4.10 onwards, as part of busy_poll rewrite, new state were added + * which is part of NAPI:state. If NAPI:state=NAPI_STATE_IN_BUSY_POLL, + * it means napi_poll is invoked in busy_poll context + */ +#define HAVE_NAPI_STATE_IN_BUSY_POLL +#endif /* 4.10.0 */ + +/*****************************************************************************/ +#if (LINUX_VERSION_CODE < KERNEL_VERSION(4,11,0)) +#ifdef CONFIG_NET_RX_BUSY_POLL +#define HAVE_NDO_BUSY_POLL +#endif /* CONFIG_NET_RX_BUSY_POLL */ +#if ((SLE_VERSION_CODE && (SLE_VERSION_CODE >= SLE_VERSION(12,3,0))) || \ + (RHEL_RELEASE_CODE && (RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,5)))) +#define HAVE_VOID_NDO_GET_STATS64 +#endif /* (SLES >= 12.3.0) && (RHEL >= 7.5) */ + +static inline void _kc_dev_kfree_skb_irq(struct sk_buff *skb) +{ + if (!skb) + return; + dev_kfree_skb_irq(skb); +} + +#undef dev_kfree_skb_irq +#define dev_kfree_skb_irq _kc_dev_kfree_skb_irq + +static inline void _kc_dev_consume_skb_irq(struct sk_buff *skb) +{ + if (!skb) + return; + dev_consume_skb_irq(skb); +} + +#undef dev_consume_skb_irq +#define dev_consume_skb_irq _kc_dev_consume_skb_irq + +static inline void _kc_dev_kfree_skb_any(struct sk_buff *skb) +{ + if (!skb) + return; + dev_kfree_skb_any(skb); +} + +#undef dev_kfree_skb_any +#define dev_kfree_skb_any _kc_dev_kfree_skb_any + +static inline void _kc_dev_consume_skb_any(struct sk_buff *skb) +{ + if (!skb) + return; + dev_consume_skb_any(skb); +} + +#undef dev_consume_skb_any +#define dev_consume_skb_any _kc_dev_consume_skb_any + +#else /* > 4.11 */ +#define HAVE_VOID_NDO_GET_STATS64 +#define HAVE_VM_OPS_FAULT_NO_VMA +#endif /* 4.11.0 */ + +/*****************************************************************************/ +#if (LINUX_VERSION_CODE < KERNEL_VERSION(4,12,0)) +#if (RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,7) && \ + RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(8,0)) +/* The RHEL 7.7+ NL_SET_ERR_MSG_MOD triggers unused parameter warnings */ +#undef NL_SET_ERR_MSG_MOD +#endif +/* If kernel is older than 4.12 but distro is RHEL >= 7.5 || SLES > 12SP4, + * it does have support for MIN_NAPI_ID + */ +#if ((RHEL_RELEASE_CODE && (RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,5))) || \ + (SLE_VERSION_CODE && (SLE_VERSION_CODE >= SLE_VERSION(12,4,0)))) +#define HAVE_MIN_NAPI_ID +#endif /* RHEL >= 7.5 || SLES >= 12.4 */ +#ifndef NL_SET_ERR_MSG_MOD +#define NL_SET_ERR_MSG_MOD(extack, msg) \ + do { \ + uninitialized_var(extack); \ + pr_err(KBUILD_MODNAME ": " msg); \ + } while (0) +#endif /* !NL_SET_ERR_MSG_MOD */ +#else /* >= 4.12 */ +#define HAVE_MIN_NAPI_ID +#endif /* 4.12 */ + +/*****************************************************************************/ +#if (LINUX_VERSION_CODE < KERNEL_VERSION(4,13,0)) +#define PCI_EXP_LNKCAP_SLS_8_0GB 0x00000003 /* LNKCAP2 SLS Vector bit 2 */ +#if (SLE_VERSION_CODE && (SLE_VERSION_CODE >= SLE_VERSION(12,4,0))) +#define HAVE_PCI_ERROR_HANDLER_RESET_PREPARE +#endif /* SLES >= 12sp4 */ +#if (!(RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,5)) && \ + !(SLE_VERSION_CODE >= SLE_VERSION(12,4,0))) +#define UUID_SIZE 16 +typedef struct { + __u8 b[UUID_SIZE]; +} uuid_t; + +#ifndef UUID_INIT +#define UUID_INIT(a, b, c, d0, d1, d2, d3, d4, d5, d6, d7) \ +((uuid_t) \ +{{ ((a) >> 24) & 0xff, ((a) >> 16) & 0xff, ((a) >> 8) & 0xff, (a) & 0xff, \ + ((b) >> 8) & 0xff, (b) & 0xff, \ + ((c) >> 8) & 0xff, (c) & 0xff, \ + (d0), (d1), (d2), (d3), (d4), (d5), (d6), (d7) }}) +#endif + +static inline bool uuid_equal(const uuid_t *u1, const uuid_t *u2) +{ + return memcmp(u1, u2, sizeof(uuid_t)) == 0; +} +#else +#define HAVE_METADATA_PORT_INFO +#endif /* !(RHEL >= 7.5) && !(SLES >= 12.4) */ +#else /* > 4.13 */ +#define HAVE_METADATA_PORT_INFO +#define HAVE_HWTSTAMP_FILTER_NTP_ALL +#define HAVE_PCI_ERROR_HANDLER_RESET_PREPARE +#endif /* 4.13.0 */ + +/*****************************************************************************/ +#if (LINUX_VERSION_CODE < KERNEL_VERSION(4,14,0)) +#ifdef ETHTOOL_GLINKSETTINGS +#ifndef ethtool_link_ksettings_del_link_mode +#define ethtool_link_ksettings_del_link_mode(ptr, name, mode) \ + __clear_bit(ETHTOOL_LINK_MODE_ ## mode ## _BIT, (ptr)->link_modes.name) +#endif +#endif /* ETHTOOL_GLINKSETTINGS */ + +#define TIMER_DATA_TYPE unsigned long +#define TIMER_FUNC_TYPE void (*)(TIMER_DATA_TYPE) + +#define timer_setup(timer, callback, flags) \ + __setup_timer((timer), (TIMER_FUNC_TYPE)(callback), \ + (TIMER_DATA_TYPE)(timer), (flags)) + +#define from_timer(var, callback_timer, timer_fieldname) \ + container_of(callback_timer, typeof(*var), timer_fieldname) + +#ifndef xdp_do_flush_map +#define xdp_do_flush_map() do {} while (0) +#endif +struct _kc_xdp_buff { + void *data; + void *data_end; + void *data_hard_start; +}; +#define xdp_buff _kc_xdp_buff +struct _kc_bpf_prog { +}; +#define bpf_prog _kc_bpf_prog +#ifndef DIV_ROUND_DOWN_ULL +#define DIV_ROUND_DOWN_ULL(ll, d) \ + ({ unsigned long long _tmp = (ll); do_div(_tmp, d); _tmp; }) +#endif /* DIV_ROUND_DOWN_ULL */ +#else /* > 4.14 */ +#define HAVE_XDP_SUPPORT +#endif /* 4.14.0 */ + +/*****************************************************************************/ +#ifndef ETHTOOL_GLINKSETTINGS + +#define __ETHTOOL_LINK_MODE_MASK_NBITS 32 +#define ETHTOOL_LINK_MASK_SIZE BITS_TO_LONGS(__ETHTOOL_LINK_MODE_MASK_NBITS) + +/** + * struct ethtool_link_ksettings + * @link_modes: supported and advertising, single item arrays + * @link_modes.supported: bitmask of supported link speeds + * @link_modes.advertising: bitmask of currently advertised speeds + * @base: base link details + * @base.speed: current link speed + * @base.port: current port type + * @base.duplex: current duplex mode + * @base.autoneg: current autonegotiation settings + * + * This struct and the following macros provide a way to support the old + * ethtool get/set_settings API on older kernels, but in the style of the new + * GLINKSETTINGS API. In this way, the same code can be used to support both + * APIs as seemlessly as possible. + * + * It should be noted the old API only has support up to the first 32 bits. + */ +struct ethtool_link_ksettings { + struct { + u32 speed; + u8 port; + u8 duplex; + u8 autoneg; + } base; + struct { + unsigned long supported[ETHTOOL_LINK_MASK_SIZE]; + unsigned long advertising[ETHTOOL_LINK_MASK_SIZE]; + } link_modes; +}; + +#define ETHTOOL_LINK_NAME_advertising(mode) ADVERTISED_ ## mode +#define ETHTOOL_LINK_NAME_supported(mode) SUPPORTED_ ## mode +#define ETHTOOL_LINK_NAME(name) ETHTOOL_LINK_NAME_ ## name +#define ETHTOOL_LINK_CONVERT(name, mode) ETHTOOL_LINK_NAME(name)(mode) + +/** + * ethtool_link_ksettings_zero_link_mode + * @ptr: ptr to ksettings struct + * @name: supported or advertising + */ +#define ethtool_link_ksettings_zero_link_mode(ptr, name)\ + (*((ptr)->link_modes.name) = 0x0) + +/** + * ethtool_link_ksettings_add_link_mode + * @ptr: ptr to ksettings struct + * @name: supported or advertising + * @mode: link mode to add + */ +#define ethtool_link_ksettings_add_link_mode(ptr, name, mode)\ + (*((ptr)->link_modes.name) |= (typeof(*((ptr)->link_modes.name)))ETHTOOL_LINK_CONVERT(name, mode)) + +/** + * ethtool_link_ksettings_del_link_mode + * @ptr: ptr to ksettings struct + * @name: supported or advertising + * @mode: link mode to delete + */ +#define ethtool_link_ksettings_del_link_mode(ptr, name, mode)\ + (*((ptr)->link_modes.name) &= ~(typeof(*((ptr)->link_modes.name)))ETHTOOL_LINK_CONVERT(name, mode)) + +/** + * ethtool_link_ksettings_test_link_mode + * @ptr: ptr to ksettings struct + * @name: supported or advertising + * @mode: link mode to add + */ +#define ethtool_link_ksettings_test_link_mode(ptr, name, mode)\ + (!!(*((ptr)->link_modes.name) & ETHTOOL_LINK_CONVERT(name, mode))) + +/** + * _kc_ethtool_ksettings_to_cmd - Convert ethtool_link_ksettings to ethtool_cmd + * @ks: ethtool_link_ksettings struct + * @cmd: ethtool_cmd struct + * + * Convert an ethtool_link_ksettings structure into the older ethtool_cmd + * structure. We provide this in kcompat.h so that drivers can easily + * implement the older .{get|set}_settings as wrappers around the new api. + * Hence, we keep it prefixed with _kc_ to make it clear this isn't actually + * a real function in the kernel. + */ +static inline void +_kc_ethtool_ksettings_to_cmd(struct ethtool_link_ksettings *ks, + struct ethtool_cmd *cmd) +{ + cmd->supported = (u32)ks->link_modes.supported[0]; + cmd->advertising = (u32)ks->link_modes.advertising[0]; + ethtool_cmd_speed_set(cmd, ks->base.speed); + cmd->duplex = ks->base.duplex; + cmd->autoneg = ks->base.autoneg; + cmd->port = ks->base.port; +} + +#endif /* !ETHTOOL_GLINKSETTINGS */ + +/*****************************************************************************/ +#if ((LINUX_VERSION_CODE < KERNEL_VERSION(4,14,0)) || \ + (SLE_VERSION_CODE && (SLE_VERSION_CODE <= SLE_VERSION(12,3,0))) || \ + (RHEL_RELEASE_CODE && (RHEL_RELEASE_CODE <= RHEL_RELEASE_VERSION(7,5)))) +#define phy_speed_to_str _kc_phy_speed_to_str +const char *_kc_phy_speed_to_str(int speed); +#else /* (LINUX >= 4.14.0) || (SLES > 12.3.0) || (RHEL > 7.5) */ +#include +#endif /* (LINUX < 4.14.0) || (SLES <= 12.3.0) || (RHEL <= 7.5) */ + +/*****************************************************************************/ +#if (LINUX_VERSION_CODE < KERNEL_VERSION(4,15,0)) +#if ((RHEL_RELEASE_CODE && (RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,6))) || \ + (SLE_VERSION_CODE && (SLE_VERSION_CODE >= SLE_VERSION(15,1,0)))) +#else /* RHEL >= 7.6 || SLES >= 15.1 */ +#endif /* !(RHEL >= 7.6) && !(SLES >= 15.1) */ +void _kc_ethtool_intersect_link_masks(struct ethtool_link_ksettings *dst, + struct ethtool_link_ksettings *src); +#define ethtool_intersect_link_masks _kc_ethtool_intersect_link_masks +#else /* >= 4.15 */ +#define HAVE_XDP_BUFF_DATA_META +#endif /* 4.15.0 */ + +/*****************************************************************************/ +#if (LINUX_VERSION_CODE < KERNEL_VERSION(4,16,0)) +#if (!(RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,7)) && \ + !(SLE_VERSION_CODE >= SLE_VERSION(12,4,0) && \ + SLE_VERSION_CODE < SLE_VERSION(15,0,0)) && \ + !(SLE_VERSION_CODE >= SLE_VERSION(15,1,0))) +/* The return value of the strscpy() and strlcpy() functions is different. + * This could be potentially hazard for the future. + * To avoid this the void result is forced. + * So it is not possible use this function with the return value. + * Return value is required in kernel 4.3 through 4.15 + */ +#define strscpy(...) (void)(strlcpy(__VA_ARGS__)) +#endif /* !RHEL >= 7.7 && !SLES12sp4+ && !SLES15sp1+ */ + +#define pci_printk(level, pdev, fmt, arg...) \ + dev_printk(level, &(pdev)->dev, fmt, ##arg) +#define pci_emerg(pdev, fmt, arg...) dev_emerg(&(pdev)->dev, fmt, ##arg) +#define pci_alert(pdev, fmt, arg...) dev_alert(&(pdev)->dev, fmt, ##arg) +#define pci_crit(pdev, fmt, arg...) dev_crit(&(pdev)->dev, fmt, ##arg) +#define pci_err(pdev, fmt, arg...) dev_err(&(pdev)->dev, fmt, ##arg) +#define pci_warn(pdev, fmt, arg...) dev_warn(&(pdev)->dev, fmt, ##arg) +#define pci_notice(pdev, fmt, arg...) dev_notice(&(pdev)->dev, fmt, ##arg) +#define pci_info(pdev, fmt, arg...) dev_info(&(pdev)->dev, fmt, ##arg) +#define pci_dbg(pdev, fmt, arg...) dev_dbg(&(pdev)->dev, fmt, ##arg) + +#ifndef array_index_nospec +static inline unsigned long _kc_array_index_mask_nospec(unsigned long index, + unsigned long size) +{ + /* + * Always calculate and emit the mask even if the compiler + * thinks the mask is not needed. The compiler does not take + * into account the value of @index under speculation. + */ + OPTIMIZER_HIDE_VAR(index); + return ~(long)(index | (size - 1UL - index)) >> (BITS_PER_LONG - 1); +} + +#define array_index_nospec(index, size) \ +({ \ + typeof(index) _i = (index); \ + typeof(size) _s = (size); \ + unsigned long _mask = _kc_array_index_mask_nospec(_i, _s); \ + \ + BUILD_BUG_ON(sizeof(_i) > sizeof(long)); \ + BUILD_BUG_ON(sizeof(_s) > sizeof(long)); \ + \ + (typeof(_i)) (_i & _mask); \ +}) +#endif /* array_index_nospec */ +#ifndef sizeof_field +#define sizeof_field(TYPE, MEMBER) (sizeof((((TYPE *)0)->MEMBER))) +#endif /* sizeof_field */ +#else /* >= 4.16 */ +#include +#define HAVE_TC_FLOWER_OFFLOAD_COMMON_EXTACK +#define HAVE_VF_STATS_DROPPED +#endif /* 4.16.0 */ + +/*****************************************************************************/ +#if (LINUX_VERSION_CODE < KERNEL_VERSION(4,17,0)) +#include +#include +#define PCIE_SPEED_16_0GT 0x17 +#define PCI_EXP_LNKCAP_SLS_16_0GB 0x00000004 /* LNKCAP2 SLS Vector bit 3 */ +#define PCI_EXP_LNKSTA_CLS_16_0GB 0x0004 /* Current Link Speed 16.0GT/s */ +#define PCI_EXP_LNKCAP2_SLS_16_0GB 0x00000010 /* Supported Speed 16GT/s */ +void _kc_pcie_print_link_status(struct pci_dev *dev); +#define pcie_print_link_status _kc_pcie_print_link_status +#else /* >= 4.17.0 */ +#define HAVE_XDP_BUFF_IN_XDP_H +#endif /* 4.17.0 */ + +/*****************************************************************************/ +#if (LINUX_VERSION_CODE < KERNEL_VERSION(4,18,0)) +#if (SLE_VERSION_CODE < SLE_VERSION(15,1,0)) +#define firmware_request_nowarn request_firmware_direct +#endif /* SLES < 15.1 */ +#else +#include +#define HAVE_XDP_FRAME_STRUCT +#define HAVE_XDP_SOCK +#define HAVE_NDO_XDP_XMIT_BULK_AND_FLAGS +#define NO_NDO_XDP_FLUSH +#endif /* 4.18.0 */ + +/*****************************************************************************/ +#if (LINUX_VERSION_CODE < KERNEL_VERSION(4,19,0)) +#define bitmap_alloc(nbits, flags) \ + kmalloc_array(BITS_TO_LONGS(nbits), sizeof(unsigned long), flags) +#define bitmap_zalloc(nbits, flags) bitmap_alloc(nbits, ((flags) | __GFP_ZERO)) +#define bitmap_free(bitmap) kfree(bitmap) +#ifdef ETHTOOL_GLINKSETTINGS +#define ethtool_ks_clear(ptr, name) \ + ethtool_link_ksettings_zero_link_mode(ptr, name) +#define ethtool_ks_add_mode(ptr, name, mode) \ + ethtool_link_ksettings_add_link_mode(ptr, name, mode) +#define ethtool_ks_del_mode(ptr, name, mode) \ + ethtool_link_ksettings_del_link_mode(ptr, name, mode) +#define ethtool_ks_test(ptr, name, mode) \ + ethtool_link_ksettings_test_link_mode(ptr, name, mode) +#endif /* ETHTOOL_GLINKSETTINGS */ +#define HAVE_NETPOLL_CONTROLLER +#define REQUIRE_PCI_CLEANUP_AER_ERROR_STATUS +#if (SLE_VERSION_CODE && (SLE_VERSION_CODE >= SLE_VERSION(15,1,0))) +#define HAVE_NDO_SELECT_QUEUE_SB_DEV +#endif + +static inline void __kc_metadata_dst_free(void *md_dst) +{ + kfree(md_dst); +} + +#define metadata_dst_free(md_dst) __kc_metadata_dst_free(md_dst) +#else /* >= 4.19.0 */ +#define NO_NETDEV_BPF_PROG_ATTACHED +#define HAVE_NDO_SELECT_QUEUE_SB_DEV +#define HAVE_NETDEV_SB_DEV +#define HAVE_TCF_VLAN_TPID +#define HAVE_RHASHTABLE_TYPES +#endif /* 4.19.0 */ + +/*****************************************************************************/ +#if (LINUX_VERSION_CODE < KERNEL_VERSION(4,20,0)) +#define HAVE_XDP_UMEM_PROPS +#else /* >= 4.20.0 */ +#define HAVE_AF_XDP_ZC_SUPPORT +#define HAVE_ETF_SUPPORT /* Earliest TxTime First */ +#endif /* 4.20.0 */ + +/*****************************************************************************/ +#if (LINUX_VERSION_CODE < KERNEL_VERSION(5,0,0)) +#if (!(RHEL_RELEASE_CODE && RHEL_RELEASE_CODE > RHEL_RELEASE_VERSION(8,0))) +#if (LINUX_VERSION_CODE < KERNEL_VERSION(4,12,0)) +#define NETLINK_MAX_COOKIE_LEN 20 +struct netlink_ext_ack { + const char *_msg; + const struct nlattr *bad_attr; + u8 cookie[NETLINK_MAX_COOKIE_LEN]; + u8 cookie_len; +}; + +#endif /* < 4.12 */ +static inline int _kc_dev_open(struct net_device *netdev, + struct netlink_ext_ack __always_unused *extack) +{ + return dev_open(netdev); +} + +#define dev_open _kc_dev_open + +static inline int +_kc_dev_change_flags(struct net_device *netdev, unsigned int flags, + struct netlink_ext_ack __always_unused *extack) +{ + return dev_change_flags(netdev, flags); +} + +#define dev_change_flags _kc_dev_change_flags +#endif /* !(RHEL_RELEASE_CODE && RHEL > RHEL(8,0)) */ +#else /* >= 5.0.0 */ +#define HAVE_DMA_ALLOC_COHERENT_ZEROES_MEM +#endif /* 5.0.0 */ + +/*****************************************************************************/ +#if (LINUX_VERSION_CODE < KERNEL_VERSION(5,1,0)) +#if (RHEL_RELEASE_CODE && (RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(8,1))) +#define HAVE_DEVLINK_INFO_GET +#define HAVE_DEVLINK_FLASH_UPDATE +#endif /* RHEL < 8.1 */ +#else /* >= 5.1.0 */ +#define NO_XDP_QUERY_XSK_UMEM +#define HAVE_AF_XDP_NETDEV_UMEM +#define HAVE_DEVLINK_INFO_GET +#define HAVE_DEVLINK_FLASH_UPDATE +#endif /* 5.1.0 */ + +/*****************************************************************************/ +#if (LINUX_VERSION_CODE < KERNEL_VERSION(5,2,0)) +#if (defined HAVE_SKB_XMIT_MORE) && \ +(!(RHEL_RELEASE_CODE && (RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(8,2)))) +#define netdev_xmit_more() (skb->xmit_more) +#else +#define netdev_xmit_more() (0) +#endif + +#ifndef mmiowb +#ifdef CONFIG_IA64 +#define mmiowb() asm volatile ("mf.a" ::: "memory") +#else +#define mmiowb() +#endif +#endif /* mmiowb */ + +#else /* >= 5.2.0 */ +#define HAVE_NDO_SELECT_QUEUE_FALLBACK_REMOVED +#define SPIN_UNLOCK_IMPLIES_MMIOWB +#endif /* 5.2.0 */ + +/*****************************************************************************/ +#if (LINUX_VERSION_CODE < KERNEL_VERSION(5,3,0)) +#if (!(RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(8,2))) +#else /* RHEL >= 8.2 */ +#define HAVE_DEVLINK_PORT_ATTR_PCI_VF +#endif /* RHEL >= 8.2 */ + +#ifndef ETH_P_LLDP +#define ETH_P_LLDP 0x88CC +#endif /* !ETH_P_LLDP */ + +#else /* >= 5.3.0 */ +#define XSK_UMEM_RETURNS_XDP_DESC +#if (LINUX_VERSION_CODE < KERNEL_VERSION(5,8,0)) +#if !(SLE_VERSION_CODE && SLE_VERSION_CODE >= SLE_VERSION(15,3,0)) +#define HAVE_XSK_UMEM_HAS_ADDRS +#endif /* SLE < 15.3 */ +#endif /* < 5.8.0*/ +#define HAVE_DEVLINK_PORT_ATTR_PCI_VF +#if IS_ENABLED(CONFIG_DIMLIB) +#define HAVE_CONFIG_DIMLIB +#endif +#endif /* 5.3.0 */ + +/*****************************************************************************/ +#if (LINUX_VERSION_CODE < KERNEL_VERSION(5,4,0)) +#if (SLE_VERSION_CODE >= SLE_VERSION(15,2,0)) +#define HAVE_NDO_XSK_WAKEUP +#endif /* SLES15sp2 */ +#else /* >= 5.4.0 */ +#define HAVE_NDO_XSK_WAKEUP +#endif /* 5.4.0 */ + +/*****************************************************************************/ +#if (LINUX_VERSION_CODE < KERNEL_VERSION(5,5,0)) +static inline unsigned long _kc_bitmap_get_value8(const unsigned long *map, + unsigned long start) +{ + const size_t index = BIT_WORD(start); + const unsigned long offset = start % BITS_PER_LONG; + + return (map[index] >> offset) & 0xFF; +} +#define bitmap_get_value8 _kc_bitmap_get_value8 + +static inline void _kc_bitmap_set_value8(unsigned long *map, + unsigned long value, + unsigned long start) +{ + const size_t index = BIT_WORD(start); + const unsigned long offset = start % BITS_PER_LONG; + + map[index] &= ~(0xFFUL << offset); + map[index] |= value << offset; +} +#define bitmap_set_value8 _kc_bitmap_set_value8 + +#endif /* 5.5.0 */ + +/*****************************************************************************/ +#if (LINUX_VERSION_CODE < KERNEL_VERSION(5,6,0)) +#ifdef HAVE_AF_XDP_ZC_SUPPORT +#define xsk_umem_release_addr xsk_umem_discard_addr +#define xsk_umem_release_addr_rq xsk_umem_discard_addr_rq +#endif /* HAVE_AF_XDP_ZC_SUPPORT */ +#if (RHEL_RELEASE_CODE && (RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(8,3)) || \ + (SLE_VERSION_CODE && SLE_VERSION_CODE >= SLE_VERSION(15,3,0))) +#define HAVE_TX_TIMEOUT_TXQUEUE +#endif +#else /* >= 5.6.0 */ +#define HAVE_TX_TIMEOUT_TXQUEUE +#endif /* 5.6.0 */ + +/*****************************************************************************/ +#if (LINUX_VERSION_CODE < KERNEL_VERSION(5,7,0)) +u64 _kc_pci_get_dsn(struct pci_dev *dev); +#define pci_get_dsn(dev) _kc_pci_get_dsn(dev) +#ifndef DEVLINK_INFO_VERSION_GENERIC_FW_BUNDLE_ID +#define DEVLINK_INFO_VERSION_GENERIC_FW_BUNDLE_ID "fw.bundle_id" +#endif +#else /* >= 5.7.0 */ +#define HAVE_ETHTOOL_COALESCE_PARAMS_SUPPORT +#endif /* 5.7.0 */ + +/*****************************************************************************/ +#if (LINUX_VERSION_CODE < KERNEL_VERSION(5,8,0)) +#if (RHEL_RELEASE_CODE && (RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(8,4))) +/* RHEL >= 8.4 */ +#define HAVE_XDP_BUFF_FRAME_SZ +#endif +#else /* >= 5.8.0 */ +#define HAVE_XDP_BUFF_FRAME_SZ +#define HAVE_MEM_TYPE_XSK_BUFF_POOL +#endif /* 5.8.0 */ + +/*****************************************************************************/ +#if (LINUX_VERSION_CODE < KERNEL_VERSION(5,9,0)) +#else /* >= 5.9.0 */ +#define HAVE_FLOW_INDIR_BLOCK_QDISC +#define HAVE_UDP_TUNNEL_NIC_INFO +#endif /* 5.9.0 */ +#if (RHEL_RELEASE_CODE && (RHEL_RELEASE_CODE > RHEL_RELEASE_VERSION(8,3))) +#define HAVE_FLOW_INDIR_BLOCK_QDISC +#endif +#if (SLE_VERSION_CODE && (SLE_VERSION_CODE >= SLE_VERSION(15,3,0))) +#define HAVE_FLOW_INDIR_BLOCK_QDISC +#endif /* SLE_VERSION_CODE && SLE_VERSION_CODE >= SLES15SP3 */ + +/*****************************************************************************/ +#ifdef HAVE_XDP_RXQ_INFO_REG_3_PARAMS +#ifdef HAVE_XDP_BUFF_IN_XDP_H +#include +#else +#include +#endif /* HAVE_XDP_BUFF_IN_XDP_H */ +static inline int +_kc_xdp_rxq_info_reg(struct xdp_rxq_info *xdp_rxq, struct net_device *dev, + u32 queue_index, unsigned int __always_unused napi_id) +{ + return xdp_rxq_info_reg(xdp_rxq, dev, queue_index); +} + +#define xdp_rxq_info_reg(xdp_rxq, dev, queue_index, napi_id) \ + _kc_xdp_rxq_info_reg(xdp_rxq, dev, queue_index, napi_id) +#endif /* HAVE_XDP_RXQ_INFO_REG_3_PARAMS */ +#if (LINUX_VERSION_CODE < KERNEL_VERSION(5,11,0)) +#ifdef HAVE_NAPI_BUSY_LOOP +#ifdef CONFIG_NET_RX_BUSY_POLL +#include +static inline void +_kc_napi_busy_loop(unsigned int napi_id, + bool (*loop_end)(void *, unsigned long), void *loop_end_arg, + bool __always_unused prefer_busy_poll, + u16 __always_unused budget) +{ + napi_busy_loop(napi_id, loop_end, loop_end_arg); +} + +#define napi_busy_loop(napi_id, loop_end, loop_end_arg, prefer_busy_poll, budget) \ + _kc_napi_busy_loop(napi_id, loop_end, loop_end_arg, prefer_busy_poll, budget) +#endif /* CONFIG_NET_RX_BUSY_POLL */ +#endif /* HAVE_NAPI_BUSY_LOOP */ +#endif /* <5.11.0 */ + +/*****************************************************************************/ +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5,12,0)) +#define HAVE_GRO_HEADER +#endif /* >=5.12.0 */ + +/*****************************************************************************/ +/* + * Load the implementations file which actually defines kcompat backports. + * Legacy backports still exist in this file, but all new backports must be + * implemented using kcompat_*defs.h and kcompat_impl.h + */ +#include "kcompat_impl.h" + +#endif /* _KCOMPAT_H_ */ diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/kcompat_cleanup.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/kcompat_cleanup.h new file mode 100644 index 00000000000..7db86ea9bac --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/kcompat_cleanup.h @@ -0,0 +1,289 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 1999 - 2026 Intel Corporation */ + +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef _KCOMPAT_CLEANUP_H_ +#define _KCOMPAT_CLEANUP_H_ + +#include + +#ifndef typeof_member +#define typeof_member(T, m) typeof(((T*)0)->m) +#endif +#ifndef GCC_VERSION +#define GCC_VERSION (__GNUC__ * 10000 \ + + __GNUC_MINOR__ * 100 \ + + __GNUC_PATCHLEVEL__) +#endif /* GCC_VERSION */ +#define GCC_IS_BELOW(x) (GCC_VERSION < (x)) + +#if defined __has_attribute +#if __has_attribute(cleanup) +#define HAVE_ATTRIBUTE_CLEANUP +#endif +#else +#if !GCC_IS_BELOW(30306) +#define HAVE_ATTRIBUTE_CLEANUP +#endif +#endif + +#ifndef HAVE_ATTRIBUTE_CLEANUP +#error "This compiler is too old, cleanup extension (GCC 3.3.6) is required." +#endif + +#if defined(__clang__) +/* + * Clang prior to 17 is being silly and considers many __cleanup() variables + * as unused (because they are, their sole purpose is to go out of scope). + * + * https://reviews.llvm.org/D152180 + */ +#define __cleanup(func) __maybe_unused __attribute__((__cleanup__(func))) +#else /* __clang__ */ +/* + * gcc: https://gcc.gnu.org/onlinedocs/gcc/Common-Variable-Attributes.html#index-cleanup-variable-attribute + * clang: https://clang.llvm.org/docs/AttributeReference.html#cleanup + */ +#define __cleanup(func) __attribute__((__cleanup__(func))) +#endif /* __clang__ */ + +/* We do the same style backport as usual with cleanup.h stuff, except it + * has its own file. So, include the base if it exist: + */ +#ifndef NEED_DEFINE_FREE +#include +#endif + +#ifdef NEED_DEFINE_FREE +/* there is no cleanup.h stuff at all given by the kernel */ +/* cond guards omitted */ + +#define DEFINE_FREE(_name, _type, _free) \ + static inline void __free_##_name(void *p) { _type _T = *(_type *)p; _free; } + +#define __free(_name) __cleanup(__free_##_name) + +#define __get_and_null(p, nullvalue) \ + ({ \ + __auto_type __ptr = &(p); \ + __auto_type __val = *__ptr; \ + *__ptr = nullvalue; \ + __val; \ + }) + +static inline __must_check +const volatile void * __must_check_fn(const volatile void *val) +{ return val; } + +#define no_free_ptr(p) \ + ((typeof(p)) __must_check_fn((__force const volatile void *)__get_and_null(p, NULL))) + +#define return_ptr(p) return no_free_ptr(p) + +#define DEFINE_CLASS(_name, _type, _exit, _init, _init_args...) \ +typedef _type class_##_name##_t; \ +static inline void class_##_name##_destructor(_type *p) \ +{ _type _T = *p; _exit; } \ +static inline _type class_##_name##_constructor(_init_args) \ +{ _type t = _init; return t; } + +#define EXTEND_CLASS(_name, ext, _init, _init_args...) \ +typedef class_##_name##_t class_##_name##ext##_t; \ +static inline void class_##_name##ext##_destructor(class_##_name##_t *p)\ +{ class_##_name##_destructor(p); } \ +static inline class_##_name##_t class_##_name##ext##_constructor(_init_args) \ +{ class_##_name##_t t = _init; return t; } + +#define CLASS(_name, var) \ + class_##_name##_t var __cleanup(class_##_name##_destructor) = \ + class_##_name##_constructor + +#define guard(_name) \ + CLASS(_name, __UNIQUE_ID(guard)) + +#define __DEFINE_LOCK_GUARD_1(_name, _type, _lock) \ +static inline class_##_name##_t class_##_name##_constructor(_type *l) \ +{ \ + class_##_name##_t _t = { .lock = l }, *_T = &_t; \ + _lock; \ + return _t; \ +} + +#define __DEFINE_LOCK_GUARD_0(_name, _lock) \ +static inline class_##_name##_t class_##_name##_constructor(void) \ +{ \ + class_##_name##_t _t = { .lock = (void*)1 }, \ + *_T __maybe_unused = &_t; \ + _lock; \ + return _t; \ +} + + +#endif /* NEED_DEFINE_FREE */ + +#ifdef NEED___DEFINE_CLASS_IS_CONDITIONAL +/* If there is very early implementation present, lacking commit + * fcc22ac5baf0 ("cleanup: Adjust scoped_guard() macros to avoid potential + * warning"), we must #undef some macros and provide newer versions. + * + * If there were no cleanup.h at all, we could also do the same. + */ +#undef scoped_guard +#undef DEFINE_GUARD +#undef DEFINE_LOCK_GUARD_1 +#undef DEFINE_LOCK_GUARD_0 +#undef __DEFINE_UNLOCK_GUARD + +#define __DEFINE_CLASS_IS_CONDITIONAL(_name, _is_cond) \ +static __maybe_unused const bool class_##_name##_is_conditional = _is_cond + +#define DEFINE_GUARD(_name, _type, _lock, _unlock) \ + __DEFINE_CLASS_IS_CONDITIONAL(_name, false); \ + DEFINE_CLASS(_name, _type, if (_T) { _unlock; }, ({ _lock; _T; }), _type _T); \ + static inline void * class_##_name##_lock_ptr(class_##_name##_t *_T) \ + { return (void *)(__force unsigned long)*_T; } + +#define __guard_ptr(_name) class_##_name##_lock_ptr +#define __is_cond_ptr(_name) class_##_name##_is_conditional + +#define __scoped_guard(_name, _label, args...) \ + for (CLASS(_name, scope)(args); \ + __guard_ptr(_name)(&scope) || !__is_cond_ptr(_name); \ + ({ goto _label; })) \ + if (0) { \ +_label: \ + break; \ + } else + +#define __DEFINE_UNLOCK_GUARD(_name, _type, _unlock, ...) \ +typedef struct { \ + _type *lock; \ + __VA_ARGS__; \ +} class_##_name##_t; \ + \ +static inline void class_##_name##_destructor(class_##_name##_t *_T) \ +{ \ + if (_T->lock) { _unlock; } \ +} \ + \ +static inline void *class_##_name##_lock_ptr(class_##_name##_t *_T) \ +{ \ + return (void *)(__force unsigned long)_T->lock; \ +} + +#define scoped_guard(_name, args...) \ + __scoped_guard(_name, __UNIQUE_ID(label), args) + +#define DEFINE_LOCK_GUARD_1(_name, _type, _lock, _unlock, ...) \ +__DEFINE_CLASS_IS_CONDITIONAL(_name, false); \ +__DEFINE_UNLOCK_GUARD(_name, _type, _unlock, __VA_ARGS__) \ +__DEFINE_LOCK_GUARD_1(_name, _type, _lock) + +#define DEFINE_LOCK_GUARD_0(_name, _lock, _unlock, ...) \ +__DEFINE_CLASS_IS_CONDITIONAL(_name, false); \ +__DEFINE_UNLOCK_GUARD(_name, void, _unlock, __VA_ARGS__) \ +__DEFINE_LOCK_GUARD_0(_name, _lock) + +#endif /* NEED___DEFINE_CLASS_IS_CONDITIONAL */ + +/* We put "DEFINE" macros invocations here (instead of kernel_impl.h), to + * have easier time changing them (as changes are most often related). + * + * Content is synchronized to upstream commit 0ff41df1cb26 ("Linux 6.15"). + * + * Please note that most "DEFINE" macros invocations are not covered here, only + * those that we actually have used in the code. That means that even some of + * the files we cover could have some invocations in upstream that we miss. + * + * Please also note that we could not just put newest version of, say, mutex.h + * invocations here, as that would force use to replace whole file. + */ + +#include +#ifdef NEED_DEFINE_GUARD_MUTEX +DEFINE_GUARD(mutex, struct mutex *, mutex_lock(_T), mutex_unlock(_T)) +#endif + +#include +#ifdef NEED_DEFINE_FREE_KFREE +DEFINE_FREE(kfree, void *, if (!IS_ERR_OR_NULL(_T)) kfree(_T)) +#endif +#ifdef NEED_DEFINE_FREE_KVFREE +void kvfree(const void *); +DEFINE_FREE(kvfree, void *, if (!IS_ERR_OR_NULL(_T)) kvfree(_T)) +#endif + +#include +/* COND guards omitted */ +#ifdef NEED_LOCK_GUARD_FOR_SPINLOCK +DEFINE_LOCK_GUARD_1(raw_spinlock, raw_spinlock_t, + raw_spin_lock(_T->lock), + raw_spin_unlock(_T->lock)) + +DEFINE_LOCK_GUARD_1(raw_spinlock_nested, raw_spinlock_t, + raw_spin_lock_nested(_T->lock, SINGLE_DEPTH_NESTING), + raw_spin_unlock(_T->lock)) + +DEFINE_LOCK_GUARD_1(raw_spinlock_irq, raw_spinlock_t, + raw_spin_lock_irq(_T->lock), + raw_spin_unlock_irq(_T->lock)) + +DEFINE_LOCK_GUARD_1(raw_spinlock_irqsave, raw_spinlock_t, + raw_spin_lock_irqsave(_T->lock, _T->flags), + raw_spin_unlock_irqrestore(_T->lock, _T->flags), + unsigned long flags) + +DEFINE_LOCK_GUARD_1(spinlock, spinlock_t, + spin_lock(_T->lock), + spin_unlock(_T->lock)) + +DEFINE_LOCK_GUARD_1(spinlock_irq, spinlock_t, + spin_lock_irq(_T->lock), + spin_unlock_irq(_T->lock)) + +DEFINE_LOCK_GUARD_1(spinlock_irqsave, spinlock_t, + spin_lock_irqsave(_T->lock, _T->flags), + spin_unlock_irqrestore(_T->lock, _T->flags), + unsigned long flags) +#endif /* NEED_LOCK_GUARD_FOR_SPINLOCK */ + +#ifdef NEED_LOCK_GUARD_FOR_SPINLOCK_BH +DEFINE_LOCK_GUARD_1(raw_spinlock_bh, raw_spinlock_t, + raw_spin_lock_bh(_T->lock), + raw_spin_unlock_bh(_T->lock)) +DEFINE_LOCK_GUARD_1(spinlock_bh, spinlock_t, + spin_lock_bh(_T->lock), + spin_unlock_bh(_T->lock)) +#endif /* NEED_LOCK_GUARD_FOR_SPINLOCK_BH */ + +#include +#ifdef NEED_LOCK_GUARD_FOR_RCU +DEFINE_LOCK_GUARD_0(rcu, + do { + rcu_read_lock(); + /* + * sparse doesn't call the cleanup function, + * so just release immediately and don't track + * the context. We don't need to anyway, since + * the whole point of the guard is to not need + * the explicit unlock. + */ + __release(RCU); + } while (0), + rcu_read_unlock()) +#endif + +#ifdef NEED_DEFINE_GUARD_DEVLINK +struct devlink; +#ifdef NEED_DEVL_LOCK +static +#endif + void devl_lock(struct devlink *); +#ifdef NEED_DEVL_LOCK +static +#endif + void devl_unlock(struct devlink *); +DEFINE_GUARD(devl, struct devlink *, devl_lock(_T), devl_unlock(_T)); +#endif + +#endif /* _KCOMPAT_CLEANUP_H_ */ diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/kcompat_defs.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/kcompat_defs.h new file mode 100644 index 00000000000..87b5e51450a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/kcompat_defs.h @@ -0,0 +1,36 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 1999 - 2026 Intel Corporation */ + +#ifndef _KCOMPAT_DEFS_H_ +#define _KCOMPAT_DEFS_H_ + +#ifndef LINUX_VERSION_CODE +#include +#else +#ifndef KERNEL_VERSION +#define KERNEL_VERSION(a,b,c) (((a) << 16) + ((b) << 8) + (c)) +#endif +#endif /* LINUX_VERSION_CODE */ + +#ifndef UTS_RELEASE +#include +#endif + +/* + * Include the definitions file for HAVE/NEED flags for the standard upstream + * kernels. + * + * Then, based on the distribution we detect, load the distribution specific + * definitions file that customizes the definitions for the target + * distribution. + */ +#include "kcompat_std_defs.h" + +#ifdef CONFIG_SUSE_KERNEL +#include "kcompat_sles_defs.h" +#elif UBUNTU_VERSION_CODE +#include "kcompat_ubuntu_defs.h" +#elif RHEL_RELEASE_CODE +#include "kcompat_rhel_defs.h" +#endif +#endif /* _KCOMPAT_DEFS_H_ */ diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/kcompat_gcc.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/kcompat_gcc.h new file mode 100644 index 00000000000..2a5047f1290 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/kcompat_gcc.h @@ -0,0 +1,111 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 1999 - 2026 Intel Corporation */ + +#ifndef _KCOMPAT_GCC_H_ +#define _KCOMPAT_GCC_H_ + +#ifdef __has_attribute +#if __has_attribute(__fallthrough__) +# define fallthrough __attribute__((__fallthrough__)) +#else +# define fallthrough do {} while (0) /* fallthrough */ +#endif /* __has_attribute(fallthrough) */ +#else +# define fallthrough do {} while (0) /* fallthrough */ +#endif /* __has_attribute */ + +/* Backport macros for controlling GCC diagnostics */ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(4,18,0) ) +/* Compilers before gcc-4.6 do not understand "#pragma GCC diagnostic push" */ +#if GCC_VERSION >= 40600 +#define __diag_str1(s) #s +#define __diag_str(s) __diag_str1(s) +#define __diag(s) _Pragma(__diag_str(GCC diagnostic s)) +#else +#define __diag(s) +#endif /* GCC_VERSION >= 4.6 */ +#define __diag_push() __diag(push) +#define __diag_pop() __diag(pop) +#endif /* LINUX_VERSION < 4.18.0 */ + +#if GCC_IS_BELOW(50000) +/* Workaround for gcc bug - not accepting "(type)" before "{ ... }" as part of + * static struct initializers [when used with -std=gnu11 switch] + * https://bugzilla.redhat.com/show_bug.cgi?id=1672652 + * + * fix was backported to gcc 4.8.5-39 by RedHat, contained in RHEL 7.7 + * workaround here is to just drop that redundant (commented out below) part and + * redefine kernel macros used by us. + */ + +/* Since problematic code could be triggered by print-family (incl. wrappers) + * invocation, we have to first include headers that contain macros that we are + * redefining, and only later proceed with the rest of includes. + */ +#include +#include +#include +#include + +#ifdef __SPIN_LOCK_INITIALIZER +#undef __SPIN_LOCK_UNLOCKED +#define __SPIN_LOCK_UNLOCKED(lockname) \ + /* (spinlock_t) */ __SPIN_LOCK_INITIALIZER(lockname) +#endif /* __SPIN_LOCK_INITIALIZER */ + +#ifdef __RAW_SPIN_LOCK_INITIALIZER +#undef __RAW_SPIN_LOCK_UNLOCKED +#define __RAW_SPIN_LOCK_UNLOCKED(lockname) \ + /* (raw_spinlock_t) */ __RAW_SPIN_LOCK_INITIALIZER(lockname) +#endif /* __RAW_SPIN_LOCK_INITIALIZER */ + +#ifndef CONFIG_DEBUG_SPINLOCK +/* raw_spin_lock_init needs __RAW_SPIN_LOCK_UNLOCKED with typecast, so keep the + * original impl, + * but enhance it with typecast dropped from __RAW_SPIN_LOCK_UNLOCKED() */ +#undef raw_spin_lock_init +#define raw_spin_lock_init(lock) \ + do { *(lock) = (raw_spinlock_t) __RAW_SPIN_LOCK_UNLOCKED(lock); \ + } while (0) +#endif /* !CONFIG_DEBUG_SPINLOCK */ + +#undef STATIC_KEY_INIT_TRUE +#define STATIC_KEY_INIT_TRUE \ + { .enabled = { 1 }, \ + { .type = 1UL } } + +#undef STATIC_KEY_INIT_FALSE +#define STATIC_KEY_INIT_FALSE \ + { .enabled = { 0 } } + +#undef STATIC_KEY_TRUE_INIT +#define STATIC_KEY_TRUE_INIT \ + /* (struct static_key_true) */ { .key = STATIC_KEY_INIT_TRUE } + +#undef STATIC_KEY_FALSE_INIT +#define STATIC_KEY_FALSE_INIT \ + /* (struct static_key_false) */ { .key = STATIC_KEY_INIT_FALSE } + +#ifdef HAVE_JUMP_LABEL +/* dd_key_init() is used (indirectly) with arg like "(STATIC_KEY_INIT_FALSE)" + * from DEFINE_DYNAMIC_DEBUG_METADATA(), which, depending on config has many + * different definitions (including helper macros). + * To reduce compat code, just consume parens from the arg instead copy-pasting + * all definitions and slightly changing them. */ +#define _KC_SLURP_PARENS(...) __VA_ARGS__ +#undef dd_key_init +#define dd_key_init(key, init) key = _KC_SLURP_PARENS init +#endif /* HAVE_JUMP_LABEL */ + +#undef UUID_INIT +#define UUID_INIT(a, b, c, d0, d1, d2, d3, d4, d5, d6, d7) \ + {{ ((a) >> 24) & 0xff, ((a) >> 16) & 0xff, \ + ((a) >> 8) & 0xff, (a) & 0xff, \ + ((b) >> 8) & 0xff, (b) & 0xff, \ + ((c) >> 8) & 0xff, (c) & 0xff, \ + (d0), (d1), (d2), (d3), (d4), (d5), (d6), (d7) \ + }} + +#endif /* old GCC < 5.0 */ + +#endif /* _KCOMPAT_GCC_H_ */ diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/kcompat_impl.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/kcompat_impl.h new file mode 100644 index 00000000000..29d8a489e36 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/kcompat_impl.h @@ -0,0 +1,3638 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 1999 - 2026 Intel Corporation */ + +#ifndef _KCOMPAT_IMPL_H_ +#define _KCOMPAT_IMPL_H_ + +#ifdef HAVE_STRING_HELPERS_H +#include +#endif /* HAVE_STRING_HELPERS_H */ + +#ifdef HAVE_STRING_CHOICES_H +#include +#endif /* HAVE_STRING_CHOICES_H */ + +/* devlink support */ +#if IS_ENABLED(CONFIG_NET_DEVLINK) + +/* + * This change is adding buffer in enum value for ice_devlink_param_id. + * + * In upstream / OOT compiled from source it is safe to use + * DEVLINK_PARAM_GENERIC_ID_MAX as first value for ice_devlink_param_id + * enum. + * + * In case of binary release (for Secure Boot purpose) this caused issue + * with supporting multiple kernels because backport made by SLES changed + * value of DEVLINK_PARAM_GENERIC_ID_MAX. This caused -EINVAL to + * be returned by devlink_params_register() because + * ICE_DEVLINK_PARAM_ID_FW_MGMT_MINSREV (compiled on older kernel) was equal + * to DEVLINK_PARAM_GENERIC_ID_MAX (in newer kernel). + */ +#define DEVLINK_PARAM_GENERIC_ID_MAX __KC_DEVLINK_PARAM_GENERIC_ID_MAX +#include +#undef DEVLINK_PARAM_GENERIC_ID_MAX +#define DEVLINK_PARAM_GENERIC_ID_MAX (__KC_DEVLINK_PARAM_GENERIC_ID_MAX + 32) +#endif /* CONFIG_DEVLINK */ + +/* This file contains implementations of backports from various kernels. It + * must rely only on NEED_ and HAVE_ checks. It must not make any + * checks to determine the kernel version when deciding whether to include an + * implementation. + * + * All new implementations must go in this file, and legacy implementations + * should be migrated to the new format over time. + */ + +/* The same kcompat code is used here and auxiliary module. To avoid + * duplication and functions redefitions in some scenarios, include the + * auxiliary kcompat implementation here. + */ +#include "auxiliary_compat.h" + +/* generic network stack functions */ + +/* NEED_NETDEV_TXQ_BQL_PREFETCH + * + * functions + * netdev_txq_bql_complete_prefetchw() + * netdev_txq_bql_enqueue_prefetchw() + * + * were added in kernel 4.20 upstream commit + * 535114539bb2 ("net: add netdev_txq_bql_{enqueue, complete}_prefetchw() + * helpers") + */ +#ifdef NEED_NETDEV_TXQ_BQL_PREFETCH +/** + * netdev_txq_bql_enqueue_prefetchw - prefetch bql data for write + * @dev_queue: pointer to transmit queue + * + * BQL enabled drivers might use this helper in their ndo_start_xmit(), + * to give appropriate hint to the CPU. + */ +static inline +void netdev_txq_bql_enqueue_prefetchw(struct netdev_queue *dev_queue) +{ +#ifdef CONFIG_BQL + prefetchw(&dev_queue->dql.num_queued); +#endif +} + +/** + * netdev_txq_bql_complete_prefetchw - prefetch bql data for write + * @dev_queue: pointer to transmit queue + * + * BQL enabled drivers might use this helper in their TX completion path, + * to give appropriate hint to the CPU. + */ +static inline +void netdev_txq_bql_complete_prefetchw(struct netdev_queue *dev_queue) +{ +#ifdef CONFIG_BQL + prefetchw(&dev_queue->dql.limit); +#endif +} +#endif /* NEED_NETDEV_TXQ_BQL_PREFETCH */ + +/* NEED_NETDEV_TX_SENT_QUEUE + * + * __netdev_tx_sent_queue was added in kernel 4.20 upstream commit + * 3e59020abf0f ("net: bql: add __netdev_tx_sent_queue()") + */ +#ifdef NEED_NETDEV_TX_SENT_QUEUE +/* Variant of netdev_tx_sent_queue() for drivers that are aware + * that they should not test BQL status themselves. + * We do want to change __QUEUE_STATE_STACK_XOFF only for the last + * skb of a batch. + * Returns true if the doorbell must be used to kick the NIC. + */ +static inline bool __netdev_tx_sent_queue(struct netdev_queue *dev_queue, + unsigned int bytes, + bool xmit_more) +{ + if (xmit_more) { +#ifdef CONFIG_BQL + dql_queued(&dev_queue->dql, bytes); +#endif + return netif_tx_queue_stopped(dev_queue); + } + netdev_tx_sent_queue(dev_queue, bytes); + return true; +} +#endif /* NEED_NETDEV_TX_SENT_QUEUE */ + +/*HAVE_NETIF_SUBQUEUE_MAYBE_STOP + * + * netif_subqueue_maybe_stop was added in kernel 6.3 upstream commit + * c91c46de6bbc ("net: provide macros for commonly copied lockless queue + * stop/wake code") + */ +#ifndef HAVE_NETIF_SUBQUEUE_MAYBE_STOP +#define netif_txq_try_stop(txq, get_desc, start_thrs) \ + ({ \ + int _res; \ + \ + netif_tx_stop_queue(txq); \ + /* Producer index and stop bit must be visible \ + * to consumer before we recheck. \ + * Pairs with a barrier in __netif_txq_completed_wake(). \ + */ \ + smp_mb__after_atomic(); \ + \ + /* We need to check again in a case another \ + * CPU has just made room available. \ + */ \ + _res = 0; \ + if (unlikely(get_desc >= start_thrs)) { \ + netif_tx_start_queue(txq); \ + _res = -1; \ + } \ + _res; \ + }) + +/** + * netif_txq_maybe_stop() - locklessly stop a Tx queue, if needed + * @txq: struct netdev_queue to stop/start + * @get_desc: get current number of free descriptors (see requirements below!) + * @stop_thrs: minimal number of available descriptors for queue to be left + * enabled + * @start_thrs: minimal number of descriptors to re-enable the queue, can be + * equal to @stop_thrs or higher to avoid frequent waking + * + * All arguments may be evaluated multiple times, beware of side effects. + * @get_desc must be a formula or a function call, it must always + * return up-to-date information when evaluated! + * Expected to be used from ndo_start_xmit, see the comment on top of the file. + * + * Returns: + * 0 if the queue was stopped + * 1 if the queue was left enabled + * -1 if the queue was re-enabled (raced with waking) + */ +#define netif_txq_maybe_stop(txq, get_desc, stop_thrs, start_thrs) \ + ({ \ + int _res; \ + \ + _res = 1; \ + if (unlikely(get_desc < stop_thrs)) \ + _res = netif_txq_try_stop(txq, get_desc, start_thrs); \ + _res; \ + }) + +#define netif_subqueue_maybe_stop(dev, idx, get_desc, stop_thrs, start_thrs) \ + ({ \ + struct netdev_queue *txq; \ + \ + txq = netdev_get_tx_queue(dev, idx); \ + netif_txq_maybe_stop(txq, get_desc, stop_thrs, start_thrs); \ + }) +#endif /* !HAVE_NETIF_SUBQUEUE_MAYBE_STOP */ + +/* NEED_NET_PREFETCH + * + * net_prefetch was introduced by commit f468f21b7af0 ("net: Take common + * prefetch code structure into a function") + * + * This function is trivial to re-implement in full. + */ +#ifdef NEED_NET_PREFETCH +static inline void net_prefetch(void *p) +{ + prefetch(p); +#if L1_CACHE_BYTES < 128 + prefetch((u8 *)p + L1_CACHE_BYTES); +#endif +} +#endif /* NEED_NET_PREFETCH */ + +/* NEED_SKB_FRAG_OFF and NEED_SKB_FRAG_OFF_ADD + * + * skb_frag_off and skb_frag_off_add were added in upstream commit + * 7240b60c98d6 ("linux: Add skb_frag_t page_offset accessors") + * + * Implementing the wrappers directly for older kernels which still have the + * old implementation of skb_frag_t is trivial. + * + * LTS 4.19 backported the define for skb_frag_off in 4.19.201. + * d94d95ae0dd0 ("gro: ensure frag0 meets IP header alignment") + * Need to exclude defining skb_frag_off for 4.19.X where X > 200 + */ +#ifdef NEED_SKB_FRAG_OFF +static inline unsigned int skb_frag_off(const skb_frag_t *frag) +{ + return frag->page_offset; +} +#endif /* NEED_SKB_FRAG_OFF */ +#ifdef NEED_SKB_FRAG_OFF_ADD +static inline void skb_frag_off_add(skb_frag_t *frag, int delta) +{ + frag->page_offset += delta; +} +#endif /* NEED_SKB_FRAG_OFF_ADD */ + +/* + * NEED_DMA_ATTRS, NEED_DMA_ATTRS_PTR and related functions + * + * dma_map_page_attrs and dma_unmap_page_attrs were added in upstream commit + * 0495c3d36794 ("dma: add calls for dma_map_page_attrs and + * dma_unmap_page_attrs") + * + * Implementing these calls in this way makes RHEL7.4 compile (which doesn't + * have these) and all newer kernels compile fine, while using only the new + * calls with no ifdeffery. + * + * In kernel 4.10 the commit ("dma-mapping: use unsigned long for dma_attrs") + * switched the argument from struct dma_attrs * to unsigned long. + * + * __page_frag_cache_drain was implemented in 2017, but __page_frag_drain came + * with the above series for _attrs, and seems to have been backported at the + * same time. + * + * Please note SLES12.SP3 and RHEL7.5 and newer have all three of these + * already. + * + * If need be in the future for some reason, we could make a separate NEED_ + * define for __page_frag_cache_drain, but not yet. + * + * For clarity: there are three states: + * 1) no attrs + * 2) attrs but with a pointer to a struct dma_attrs + * 3) attrs but with unsigned long type + */ +#ifdef NEED_DMA_ATTRS +static inline +dma_addr_t __kc_dma_map_page_attrs(struct device *dev, struct page *page, + size_t offset, size_t size, + enum dma_data_direction dir, + unsigned long __always_unused attrs) +{ + return dma_map_page(dev, page, offset, size, dir); +} +#define dma_map_page_attrs __kc_dma_map_page_attrs + +static inline +void __kc_dma_unmap_page_attrs(struct device *dev, + dma_addr_t addr, size_t size, + enum dma_data_direction dir, + unsigned long __always_unused attrs) +{ + dma_unmap_page(dev, addr, size, dir); +} +#define dma_unmap_page_attrs __kc_dma_unmap_page_attrs + +static inline void __page_frag_cache_drain(struct page *page, + unsigned int count) +{ +#ifdef HAVE_PAGE_COUNT_BULK_UPDATE + if (!page_ref_sub_and_test(page, count)) + return; + + init_page_count(page); +#else + WARN_ON(count > 1); + if (!count) + return; +#endif + __free_pages(page, compound_order(page)); +} +#elif defined(NEED_DMA_ATTRS_PTR) +static inline +dma_addr_t __kc_dma_map_page_attrs_long(struct device *dev, struct page *page, + size_t offset, size_t size, + enum dma_data_direction dir, + unsigned long attrs) +{ + struct dma_attrs dmaattrs = {}; + + if (attrs & DMA_ATTR_SKIP_CPU_SYNC) + dma_set_attr(DMA_ATTR_SKIP_CPU_SYNC, &dmaattrs); + + if (attrs & DMA_ATTR_WEAK_ORDERING) + dma_set_attr(DMA_ATTR_WEAK_ORDERING, &dmaattrs); + + return dma_map_page_attrs(dev, page, offset, size, dir, &dmaattrs); +} +#define dma_map_page_attrs __kc_dma_map_page_attrs_long +/* there is a nasty macro buried in dma-mapping.h which reroutes dma_map_page + * and dma_unmap_page to attribute versions, so take control of that macro and + * fix it here. */ +#ifdef dma_map_page +#undef dma_map_page +#define dma_map_page(a,b,c,d,r) dma_map_page_attrs(a,b,c,d,r,0) +#endif + +static inline +void __kc_dma_unmap_page_attrs_long(struct device *dev, + dma_addr_t addr, size_t size, + enum dma_data_direction dir, + unsigned long attrs) +{ + struct dma_attrs dmaattrs = {}; + + if (attrs & DMA_ATTR_SKIP_CPU_SYNC) + dma_set_attr(DMA_ATTR_SKIP_CPU_SYNC, &dmaattrs); + + if (attrs & DMA_ATTR_WEAK_ORDERING) + dma_set_attr(DMA_ATTR_WEAK_ORDERING, &dmaattrs); + + dma_unmap_page_attrs(dev, addr, size, dir, &dmaattrs); +} +#define dma_unmap_page_attrs __kc_dma_unmap_page_attrs_long +#ifdef dma_unmap_page +#undef dma_unmap_page +#define dma_unmap_page(a,b,c,r) dma_unmap_page_attrs(a,b,c,r,0) +#endif +#endif /* NEED_DMA_ATTRS_PTR */ + +/* + * NETIF_F_HW_L2FW_DOFFLOAD related functions + * + * Support for NETIF_F_HW_L2FW_DOFFLOAD was first introduced upstream by + * commit a6cc0cfa72e0 ("net: Add layer 2 hardware acceleration operations for + * macvlan devices") + */ +#ifdef NETIF_F_HW_L2FW_DOFFLOAD + +#include + +/* NEED_MACVLAN_ACCEL_PRIV + * + * macvlan_accel_priv is an accessor function that replaced direct access to + * the macvlan->fwd_priv variable. It was introduced in commit 7d775f63470c + * ("macvlan: Rename fwd_priv to accel_priv and add accessor function") + * + * Implement the new wrapper name by simply accessing the older + * macvlan->fwd_priv name. + */ +#ifdef NEED_MACVLAN_ACCEL_PRIV +static inline void *macvlan_accel_priv(struct net_device *dev) +{ + struct macvlan_dev *macvlan = netdev_priv(dev); + + return macvlan->fwd_priv; +} +#endif /* NEED_MACVLAN_ACCEL_PRIV */ + +/* NEED_MACVLAN_RELEASE_L2FW_OFFLOAD + * + * macvlan_release_l2fw_offload was introduced upstream by commit 53cd4d8e4dfb + * ("macvlan: Provide function for interfaces to release HW offload") + * + * Implementing this is straight forward, but we must be careful to use + * fwd_priv instead of accel_priv. Note that both the change to accel_priv and + * introduction of this function happened in the same release. + */ +#ifdef NEED_MACVLAN_RELEASE_L2FW_OFFLOAD +static inline int macvlan_release_l2fw_offload(struct net_device *dev) +{ + struct macvlan_dev *macvlan = netdev_priv(dev); + + macvlan->fwd_priv = NULL; + return dev_uc_add(macvlan->lowerdev, dev->dev_addr); +} +#endif /* NEED_MACVLAN_RELEASE_L2FW_OFFLOAD */ + +/* NEED_MACVLAN_SUPPORTS_DEST_FILTER + * + * macvlan_supports_dest_filter was introduced upstream by commit 6cb1937d4eff + * ("macvlan: Add function to test for destination filtering support") + * + * The implementation doesn't rely on anything new and is trivial to backport + * for kernels that have NETIF_F_HW_L2FW_DOFFLOAD support. + */ +#ifdef NEED_MACVLAN_SUPPORTS_DEST_FILTER +static inline bool macvlan_supports_dest_filter(struct net_device *dev) +{ + struct macvlan_dev *macvlan = netdev_priv(dev); + + return macvlan->mode == MACVLAN_MODE_PRIVATE || + macvlan->mode == MACVLAN_MODE_VEPA || + macvlan->mode == MACVLAN_MODE_BRIDGE; +} +#endif /* NEED_MACVLAN_SUPPORTS_DEST_FILTER */ + +#endif /* NETIF_F_HW_L2FW_DOFFLOAD */ + +/* tc functions */ + +/* NEED_FLOW_INDR_BLOCK_CB_REGISTER + * + * __flow_indr_block_cb_register and __flow_indr_block_cb_unregister were + * added in upstream commit 4e481908c51b ("flow_offload: move tc indirect + * block to flow offload") + * + * This was a simple rename so we can just translate from the old + * naming scheme with a macro. + */ +#ifdef NEED_FLOW_INDR_BLOCK_CB_REGISTER +#define __flow_indr_block_cb_register __tc_indr_block_cb_register +#define __flow_indr_block_cb_unregister __tc_indr_block_cb_unregister +#endif + +/* devlink support */ +#if IS_ENABLED(CONFIG_NET_DEVLINK) + +/* NEED_DEVLINK_FMSG_PUT + * + * devlink_fmsg_put was introduced upstream by commit 346947223bac ("devlink: + * add devlink_fmsg_put() macro") as a way to simplify adding data to + * a devlink health report based on its type. + * + * For older kernels, it is straight forward to re-implement here. Note that + * it does require _Generic support from the compiler. + */ +#ifdef NEED_DEVLINK_FMSG_PUT +#define devlink_fmsg_put(fmsg, name, value) ( \ + _Generic((value), \ + bool : devlink_fmsg_bool_pair_put, \ + u8 : devlink_fmsg_u8_pair_put, \ + u16 : devlink_fmsg_u32_pair_put, \ + u32 : devlink_fmsg_u32_pair_put, \ + u64 : devlink_fmsg_u64_pair_put, \ + int : devlink_fmsg_u32_pair_put, \ + char * : devlink_fmsg_string_pair_put, \ + const char * : devlink_fmsg_string_pair_put) \ + (fmsg, name, (value))) +#endif /* NEED_DEVLINK_FMSG_PUT */ + +/* NEED_DEVLINK_FLASH_UPDATE_STATUS_NOTIFY + * + * devlink_flash_update_status_notify, _begin_notify, and _end_notify were + * added by upstream commit 191ed2024de9 ("devlink: allow driver to update + * progress of flash update") + * + * For older kernels that lack the netlink messages, convert the functions + * into no-ops. + */ +#ifdef NEED_DEVLINK_FLASH_UPDATE_STATUS_NOTIFY +static inline void +devlink_flash_update_begin_notify(struct devlink __always_unused *devlink) +{ +} + +static inline void +devlink_flash_update_end_notify(struct devlink __always_unused *devlink) +{ +} + +static inline void +devlink_flash_update_status_notify(struct devlink __always_unused *devlink, + const char __always_unused *status_msg, + const char __always_unused *component, + unsigned long __always_unused done, + unsigned long __always_unused total) +{ +} +#endif /* NEED_DEVLINK_FLASH_UPDATE_STATUS_NOTIFY */ + +#ifndef HAVE_DEVLINK_FLASH_UPDATE_PARAMS +struct devlink_flash_update_params { + const char *file_name; + const char *component; + u32 overwrite_mask; +}; +#endif /* !HAVE_DEVLINK_FLASH_UPDATE_PARAMS */ + +#ifndef HAVE_DEVLINK_FLASH_UPDATE_PARAMS_OVERWRITE_MASK +#ifndef DEVLINK_FLASH_OVERWRITE_SETTINGS +#define DEVLINK_FLASH_OVERWRITE_SETTINGS BIT(0) +#endif + +#ifndef DEVLINK_FLASH_OVERWRITE_IDENTIFIERS +#define DEVLINK_FLASH_OVERWRITE_IDENTIFIERS BIT(1) +#endif + +#define DEVLINK_SUPPORT_FLASH_UPDATE_COMPONENT BIT(0) +#define DEVLINK_SUPPORT_FLASH_UPDATE_OVERWRITE_MASK BIT(1) +#endif /* HAVE_DEVLINK_FLASH_UPDATE_PARAMS_OVERWRITE_MASK */ + +/* NEED_DEVLINK_FLASH_UPDATE_TIMEOUT_NOTIFY + * + * devlink_flash_update_timeout_notify was added by upstream commit + * f92970c694b3 ("devlink: add timeout information to status_notify"). + * + * For older kernels, just convert timeout notifications into regular status + * notification messages without timeout information. + */ +#ifdef NEED_DEVLINK_FLASH_UPDATE_TIMEOUT_NOTIFY +static inline void +devlink_flash_update_timeout_notify(struct devlink *devlink, + const char *status_msg, + const char *component, + unsigned long __always_unused timeout) +{ + devlink_flash_update_status_notify(devlink, status_msg, component, 0, 0); +} +#endif /* NEED_DEVLINK_FLASH_UPDATE_TIMEOUT_NOTIFY */ + +/* + * NEED_DEVLINK_PORT_ATTRS_SET_STRUCT + * + * HAVE_DEVLINK_PORT_ATTRS_SET_PORT_FLAVOUR + * HAVE_DEVLINK_PORT_ATTRS_SET_SWITCH_ID + * + * devlink_port_attrs_set was introduced by commit b9ffcbaf56d3 ("devlink: + * introduce devlink_port_attrs_set") + * + * It's function signature has changed multiple times over several kernel + * releases: + * + * commit 5ec1380a21bb ("devlink: extend attrs_set for setting port + * flavours") added the ability to set port flavour. (Note that there is no + * official kernel release with devlink_port_attrs_set without the flavour + * argument, as they were introduced in the same series.) + * + * commit bec5267cded2 ("net: devlink: extend port attrs for switch ID") added + * the ability to set the switch ID (HAVE_DEVLINK_PORT_ATTRS_SET_SWITCH_ID) + * + * Finally commit 71ad8d55f8e5 ("devlink: Replace devlink_port_attrs_set + * parameters with a struct") refactored to pass devlink_port_attrs struct + * instead of individual parameters. (!NEED_DEVLINK_PORT_ATTRS_SET_STRUCT) + * + * We want core drivers to just use the latest form that takes + * a devlink_port_attrs structure. Note that this structure did exist as part + * of but was never used directly by driver code prior to the + * function parameter change. For this reason, the implementation always + * relies on _kc_devlink_port_attrs instead of what was defined in the kernel. + */ +#ifdef NEED_DEVLINK_PORT_ATTRS_SET_STRUCT + +#ifndef HAVE_DEVLINK_PORT_ATTRS_SET_PORT_FLAVOUR +enum devlink_port_flavour { + DEVLINK_PORT_FLAVOUR_PHYSICAL, + DEVLINK_PORT_FLAVOUR_CPU, + DEVLINK_PORT_FLAVOUR_DSA, + DEVLINK_PORT_FLAVOUR_PCI_PF, + DEVLINK_PORT_FLAVOUR_PCI_VF, +}; +#endif + +struct _kc_devlink_port_phys_attrs { + u32 port_number; + u32 split_subport_number; +}; + +struct _kc_devlink_port_pci_pf_attrs { + u16 pf; +}; + +struct _kc_devlink_port_pci_vf_attrs { + u16 pf; + u16 vf; +}; + +struct _kc_devlink_port_attrs { + u8 split:1, + splittable:1; + u32 lanes; + enum devlink_port_flavour flavour; + struct netdev_phys_item_id switch_id; + union { + struct _kc_devlink_port_phys_attrs phys; + struct _kc_devlink_port_pci_pf_attrs pci_pf; + struct _kc_devlink_port_pci_vf_attrs pci_vf; + }; +}; + +#define devlink_port_attrs _kc_devlink_port_attrs + +static inline void +_kc_devlink_port_attrs_set(struct devlink_port *devlink_port, + struct _kc_devlink_port_attrs *attrs) +{ +#if defined(HAVE_DEVLINK_PORT_ATTRS_SET_SWITCH_ID) + devlink_port_attrs_set(devlink_port, attrs->flavour, attrs->phys.port_number, + attrs->split, attrs->phys.split_subport_number, + attrs->switch_id.id, attrs->switch_id.id_len); +#elif defined(HAVE_DEVLINK_PORT_ATTRS_SET_PORT_FLAVOUR) + devlink_port_attrs_set(devlink_port, attrs->flavour, attrs->phys.port_number, + attrs->split, attrs->phys.split_subport_number); +#else + if (attrs->split) + devlink_port_split_set(devlink_port, attrs->phys.port_number); +#endif +} + +#define devlink_port_attrs_set _kc_devlink_port_attrs_set + +#endif /* NEED_DEVLINK_PORT_ATTRS_SET_STRUCT */ + +/* + * NEED_DEVLINK_ALLOC_SETS_DEV + * + * Since commit 919d13a7e455 ("devlink: Set device as early as possible"), the + * devlink device pointer is set by devlink_alloc instead of by + * devlink_register. + * + * devlink_alloc now includes the device pointer in its signature, while + * devlink_register no longer includes it. + * + * This implementation provides a replacement for devlink_alloc which will + * take and then silently discard the extra dev pointer. + * + * To use devlink_register, drivers must check + * HAVE_DEVLINK_REGISTER_SETS_DEV. Note that we can't easily provide + * a backport of the change to devlink_register directly. Although the dev + * pointer is accessible from the devlink pointer through the driver private + * section, it is device driver specific and is not easily accessible in + * compat code. + */ +#ifdef NEED_DEVLINK_ALLOC_SETS_DEV +static inline struct devlink * +_kc_devlink_alloc(const struct devlink_ops *ops, size_t priv_size, + struct device * __always_unused dev) +{ + return devlink_alloc(ops, priv_size); +} +#define devlink_alloc _kc_devlink_alloc +#endif /* NEED_DEVLINK_ALLOC_SETS_DEV */ + +#ifdef HAVE_DEVLINK_RELOAD_ACTION_AND_LIMIT +#ifdef NEED_DEVLINK_UNLOCKED_RESOURCE +/* + * NEED_DEVLINK_UNLOCKED_RESOURCE + * + * Handle devlink API change introduced in: + * c223d6a4bf ("net: devlink: add unlocked variants of devlink_resource*() + * functions") + * 644a66c60f ("net: devlink: convert reload command to take implicit + * devlink->lock") + * + * devl_resource_size_get() does not take devlink->lock where + * devlink_resource_size_get() takes devlink->lock, but we do not introduce + * locking in the driver as taking the lock in devlink_reload() was added + * upstream in the same version as API change. + * + * We have to rely on distro maintainers properly backporting of both mentioned + * commits for OOT driver to work properly. + * In case of backporting only c223d6a4bf assert inside + * devl_resource_size_get() will trigger kernel WARNING, + * In case of backporting only 644a66c60f devlink_resource_size_get() will + * attempt to take the lock second time. + */ +static inline int devl_resource_size_get(struct devlink *devlink, + u64 resource_id, + u64 *p_resource_size) +{ + return devlink_resource_size_get(devlink, resource_id, p_resource_size); +} +#endif /* NEED_DEVLINK_UNLOCKED_RESOURCE */ +#endif /* HAVE_DEVLINK_RELOAD_ACTION_AND_LIMIT */ + +#ifdef NEED_DEVLINK_TO_DEV +/* + * Commit 2131463 ("devlink: Reduce struct devlink exposure") + * removed devlink struct fields from header to avoid exposure + * and added devlink_to_dev and related functions to access + * them instead. + */ +static inline struct device * +devlink_to_dev(const struct devlink *devlink) +{ + return devlink->dev; +} +#endif /* NEED_DEVLINK_TO_DEV */ + +#ifdef NEED_DEVL_LOCK +static inline void devl_lock(struct devlink *devlink) +{ +} + +static inline void devl_unlock(struct devlink *devlink) +{ +} +#endif /* NEED_DEVL_LOCK */ + +#ifdef NEED_DEVL_RESOURCE_REGISTER +static inline int +devl_resource_register(struct devlink *devlink, const char *resource_name, + u64 resource_size, u64 resource_id, + u64 parent_resource_id, + const struct devlink_resource_size_params *size_params) +{ + int err; + + devl_unlock(devlink); + err = devlink_resource_register(devlink, resource_name, resource_size, + resource_id, parent_resource_id, + size_params); + devl_lock(devlink); + + return err; +} + +static inline void devl_resources_unregister(struct devlink *devlink) +{ + devl_unlock(devlink); +#ifdef NEED_DEVLINK_RESOURCES_UNREGISTER_NO_RESOURCE + devlink_resources_unregister(devlink, NULL); +#else + devlink_resources_unregister(devlink); +#endif /* NEED_DEVLINK_RESOURCES_UNREGISTER_NO_RESOURCE */ + devl_lock(devlink); +} + +static inline void +devl_resource_occ_get_register(struct devlink *devlink, u64 resource_id, + devlink_resource_occ_get_t *occ_get, + void *occ_get_priv) +{ + devl_unlock(devlink); + devlink_resource_occ_get_register(devlink, resource_id, occ_get, + occ_get_priv); + devl_lock(devlink); +} + +static inline void devl_resource_occ_get_unregister(struct devlink *devlink, + u64 resource_id) +{ + devl_unlock(devlink); + devlink_resource_occ_get_unregister(devlink, resource_id); + devl_lock(devlink); +} +#endif /* NEED_DEVL_RESOURCE_REGISTER */ + +#ifdef NEED_DEVL_PORT_REGISTER +static inline int devl_port_register(struct devlink *devlink, + struct devlink_port *devlink_port, + unsigned int port_index) +{ + int err; + + devl_unlock(devlink); + err = devlink_port_register(devlink, devlink_port, port_index); + devl_lock(devlink); + + return err; +} + +static inline void devl_port_unregister(struct devlink_port *devlink_port) +{ + devl_unlock(devlink_port->devlink); + devlink_port_unregister(devlink_port); + devl_lock(devlink_port->devlink); +} +#endif /* NEED_DEVL_PORT_REGISTER */ + +#ifdef HAVE_DEVLINK_REGIONS +#ifdef NEED_DEVL_REGION_CREATE + +struct _kc_devlink_region { + void *devlink; +}; + +static inline struct devlink_region +*devl_region_create(struct devlink *devlink, + const struct devlink_region_ops *ops, + u32 region_max_snapshots, u64 region_size) +{ + struct devlink_region *region; + + devl_unlock(devlink); +#ifdef NEED_DEVLINK_REGION_CREATE_OPS + region = devlink_region_create(devlink, ops->name, region_max_snapshots, + region_size); +#else + region = devlink_region_create(devlink, ops, region_max_snapshots, + region_size); +#endif /* NEED_DEVLINK_REGION_CREATE_OPS */ + devl_lock(devlink); + + return region; +} + +static inline void devl_region_destroy(struct devlink_region *region) +{ + devl_unlock(((struct _kc_devlink_region *)(region))->devlink); + devlink_region_destroy(region); + devl_lock(((struct _kc_devlink_region *)(region))->devlink); +} +#endif /* NEED_DEVL_REGION_CREATE */ +#endif /* HAVE_DEVLINK_REGIONS */ + +#ifdef NEED_DEVL_PARAMS_REGISTER +static inline int devl_params_register(struct devlink *devlink, + const struct devlink_param *params, + size_t params_count) +{ + int err; + + devl_unlock(devlink); + err = devlink_params_register(devlink, params, params_count); + devl_lock(devlink); + + return err; +} + +static inline void devl_params_unregister(struct devlink *devlink, + const struct devlink_param *params, + size_t params_count) +{ + devl_unlock(devlink); + devlink_params_unregister(devlink, params, params_count); + devl_lock(devlink); +} +#endif /* NEED_DEVL_PARAMS_REGISTER */ + +#ifdef NEED_DEVL_REGISTER +static inline int devl_register(struct devlink *devlink) +{ + devl_unlock(devlink); +#ifdef HAVE_DEVLINK_REGISTER_SETS_DEV + devlink_register(devlink, devlink->dev); +#else + devlink_register(devlink); +#endif /* HAVE_DEVLINK_REGISTER_SETS_DEV */ + devl_lock(devlink); + + return 0; +} + +static inline void devl_unregister(struct devlink *devlink) +{ + devl_unlock(devlink); + devlink_unregister(devlink); + devl_lock(devlink); +} +#endif /* NEED_DEVL_REGISTER */ + +#ifdef HAVE_DEVLINK_HEALTH +#ifdef NEED_DEVL_HEALTH_REPORTER_CREATE + +struct kc_devlink_health_reporter { + struct list_head list; + void *priv; + const struct devlink_health_reporter_ops *ops; + struct devlink *devlink; +}; + +static inline struct devlink_health_reporter * +devl_health_reporter_create(struct devlink *devlink, + const struct devlink_health_reporter_ops *ops, + void *priv) +{ + struct devlink_health_reporter *reporter; + + devl_unlock(devlink); +#ifdef NEED_DEVLINK_HEALTH_DEFAULT_AUTO_RECOVER + reporter = devlink_health_reporter_create(devlink, ops, 0, + !!ops->recover, priv); +#else + reporter = devlink_health_reporter_create(devlink, ops, 0, priv); +#endif /* NEED_DEVLINK_HEALTH_DEFAULT_AUTO_RECOVER */ + devl_lock(devlink); + + return reporter; +} + +static inline void +devl_health_reporter_destroy(struct devlink_health_reporter *reporter) +{ + devl_unlock(((struct kc_devlink_health_reporter *)(reporter))->devlink); + devlink_health_reporter_destroy(reporter); + devl_lock(((struct kc_devlink_health_reporter *)(reporter))->devlink); +} +#endif /* NEED_DEVL_HEALTH_REPORTER_CREATE */ + +#ifdef NEED_DEVL_HEALTH_REPORTER_CREATE_REMOVE_GRACEFUL_PERIOD +/* NEED_DEVL_HEALTH_REPORTER_CREATE_REMOVE_GRACEFUL_PERIOD + * + * Since upstream commit d2b007374551 ("devlink: Move graceful period + * parameter to reporter ops"), the graceful period is defined in the ops + * structure instead of as a parameter to the health reporter. Currently, all + * Intel drivers use a fixed value of zero for the graceful period. Provide + * a wrapper implementation that always passes 0 to the graceful period. If + * a driver should ever need to support a non-zero graceful period, an + * appropriate HAVE_ flag must be implemented and the driver must be careful + * to check and pass the non-zero graceful period on older kernels. + */ +#define devl_health_reporter_create(devlink, ops, priv) \ + devl_health_reporter_create((devlink), (ops), 0, (priv)) + +#endif /* NEED_DEVL_HEALTH_REPORTER_CREATE_REMOVE_GRACEFUL_PERIOD */ + +#ifdef NEED_DEVLINK_FMSG_DUMP_SKB +/** + * devlink_fmsg_dump_skb - Dump sk_buffer structure + * @fmsg: devlink formatted message pointer + * @skb: pointer to skb + * + * Dump diagnostic information about sk_buff structure, like headroom, length, + * tailroom, MAC, etc. + */ +static inline void devlink_fmsg_dump_skb(struct devlink_fmsg *fmsg, + const struct sk_buff *skb) +{ + struct skb_shared_info *sh = skb_shinfo(skb); + struct sock *sk = skb->sk; + bool has_mac, has_trans; + + has_mac = skb_mac_header_was_set(skb); + has_trans = skb_transport_header_was_set(skb); + + devlink_fmsg_pair_nest_start(fmsg, "skb"); + devlink_fmsg_obj_nest_start(fmsg); + devlink_fmsg_put(fmsg, "actual len", skb->len); + devlink_fmsg_put(fmsg, "head len", skb_headlen(skb)); + devlink_fmsg_put(fmsg, "data len", skb->data_len); + devlink_fmsg_put(fmsg, "tail len", skb_tailroom(skb)); + devlink_fmsg_put(fmsg, "MAC", has_mac ? skb->mac_header : -1); + devlink_fmsg_put(fmsg, "MAC len", + has_mac ? skb_mac_header_len(skb) : -1); + devlink_fmsg_put(fmsg, "network hdr", skb->network_header); + devlink_fmsg_put(fmsg, "network hdr len", + has_trans ? skb_network_header_len(skb) : -1); + devlink_fmsg_put(fmsg, "transport hdr", + has_trans ? skb->transport_header : -1); + devlink_fmsg_put(fmsg, "csum", (__force u32)skb->csum); + devlink_fmsg_put(fmsg, "csum_ip_summed", (u8)skb->ip_summed); + devlink_fmsg_put(fmsg, "csum_complete_sw", !!skb->csum_complete_sw); + devlink_fmsg_put(fmsg, "csum_valid", !!skb->csum_valid); + devlink_fmsg_put(fmsg, "csum_level", (u8)skb->csum_level); + devlink_fmsg_put(fmsg, "sw_hash", !!skb->sw_hash); + devlink_fmsg_put(fmsg, "l4_hash", !!skb->l4_hash); + devlink_fmsg_put(fmsg, "proto", ntohs(skb->protocol)); + devlink_fmsg_put(fmsg, "pkt_type", (u8)skb->pkt_type); + devlink_fmsg_put(fmsg, "iif", skb->skb_iif); + + if (sk) { + devlink_fmsg_pair_nest_start(fmsg, "sk"); + devlink_fmsg_obj_nest_start(fmsg); + devlink_fmsg_put(fmsg, "family", sk->sk_type); + devlink_fmsg_put(fmsg, "type", sk->sk_type); + devlink_fmsg_put(fmsg, "proto", sk->sk_protocol); + devlink_fmsg_obj_nest_end(fmsg); + devlink_fmsg_pair_nest_end(fmsg); + } + + devlink_fmsg_obj_nest_end(fmsg); + devlink_fmsg_pair_nest_end(fmsg); + + devlink_fmsg_pair_nest_start(fmsg, "shinfo"); + devlink_fmsg_obj_nest_start(fmsg); + devlink_fmsg_put(fmsg, "tx_flags", sh->tx_flags); + devlink_fmsg_put(fmsg, "nr_frags", sh->nr_frags); + devlink_fmsg_put(fmsg, "gso_size", sh->gso_size); + devlink_fmsg_put(fmsg, "gso_type", sh->gso_type); + devlink_fmsg_put(fmsg, "gso_segs", sh->gso_segs); + devlink_fmsg_obj_nest_end(fmsg); + devlink_fmsg_pair_nest_end(fmsg); +} +#endif /* NEED_DEVLINK_FMSG_DUMP_SKB */ +#endif /* HAVE_DEVLINK_HEALTH */ +#endif /* CONFIG_NET_DEVLINK */ + +#ifdef NEED_IDA_ALLOC_MIN_MAX_RANGE_FREE +/* ida_alloc(), ida_alloc_min(), ida_alloc_max(), ida_alloc_range(), and + * ida_free() were added in commit 5ade60dda43c ("ida: add new API"). + * + * Also, using "0" as the "end" argument (3rd argument) to ida_simple_get() is + * considered the max value, which is why it's used in ida_alloc() and + * ida_alloc_min(). + */ +static inline int ida_alloc(struct ida *ida, gfp_t gfp) +{ + return ida_simple_get(ida, 0, 0, gfp); +} + +static inline int ida_alloc_min(struct ida *ida, unsigned int min, gfp_t gfp) +{ + return ida_simple_get(ida, min, 0, gfp); +} + +static inline int ida_alloc_max(struct ida *ida, unsigned int max, gfp_t gfp) +{ + return ida_simple_get(ida, 0, max, gfp); +} + +static inline int +ida_alloc_range(struct ida *ida, unsigned int min, unsigned int max, gfp_t gfp) +{ + return ida_simple_get(ida, min, max, gfp); +} + +static inline void ida_free(struct ida *ida, unsigned int id) +{ + ida_simple_remove(ida, id); +} +#endif /* NEED_IDA_ALLOC_MIN_MAX_RANGE_FREE */ + +/* dev_printk implementations */ + +/* NEED_DEV_LEVEL_ONCE + * + * The dev_*_once family of printk functions was introduced by commit + * e135303bd5be ("device: Add dev__once variants") + * + * The implementation is very straight forward so we will just implement them + * as-is here. + * + * Note that this assumes all dev_*_once macros exist if dev_level_once was + * found. + */ +#ifdef NEED_DEV_LEVEL_ONCE +#ifdef CONFIG_PRINTK +#define dev_level_once(dev_level, dev, fmt, ...) \ +do { \ + static bool __print_once __read_mostly; \ + \ + if (!__print_once) { \ + __print_once = true; \ + dev_level(dev, fmt, ##__VA_ARGS__); \ + } \ +} while (0) +#else +#define dev_level_once(dev_level, dev, fmt, ...) \ +do { \ + if (0) \ + dev_level(dev, fmt, ##__VA_ARGS__); \ +} while (0) +#endif + +#define dev_emerg_once(dev, fmt, ...) \ + dev_level_once(dev_emerg, dev, fmt, ##__VA_ARGS__) +#define dev_alert_once(dev, fmt, ...) \ + dev_level_once(dev_alert, dev, fmt, ##__VA_ARGS__) +#define dev_crit_once(dev, fmt, ...) \ + dev_level_once(dev_crit, dev, fmt, ##__VA_ARGS__) +#define dev_err_once(dev, fmt, ...) \ + dev_level_once(dev_err, dev, fmt, ##__VA_ARGS__) +#define dev_warn_once(dev, fmt, ...) \ + dev_level_once(dev_warn, dev, fmt, ##__VA_ARGS__) +#define dev_notice_once(dev, fmt, ...) \ + dev_level_once(dev_notice, dev, fmt, ##__VA_ARGS__) +#define dev_info_once(dev, fmt, ...) \ + dev_level_once(dev_info, dev, fmt, ##__VA_ARGS__) +#define dev_dbg_once(dev, fmt, ...) \ + dev_level_once(dev_dbg, dev, fmt, ##__VA_ARGS__) +#endif /* NEED_DEV_LEVEL_ONCE */ + +#ifdef HAVE_TC_CB_AND_SETUP_QDISC_MQPRIO + +/* NEED_TC_CLS_CAN_OFFLOAD_AND_CHAIN0 + * + * tc_cls_can_offload_and_chain0 was added by upstream commit + * 878db9f0f26d ("pkt_cls: add new tc cls helper to check offload flag and + * chain index"). + * + * This patch backports this function for older kernels by calling + * tc_can_offload() directly. + */ +#ifdef NEED_TC_CLS_CAN_OFFLOAD_AND_CHAIN0 +#include +static inline bool +tc_cls_can_offload_and_chain0(const struct net_device *dev, + struct tc_cls_common_offload *common) +{ + if (!tc_can_offload(dev)) + return false; + if (common->chain_index) + return false; + + return true; +} +#endif /* NEED_TC_CLS_CAN_OFFLOAD_AND_CHAIN0 */ +#endif /* HAVE_TC_CB_AND_SETUP_QDISC_MQPRIO */ + +/* NEED_TC_SETUP_QDISC_MQPRIO + * + * TC_SETUP_QDISC_MQPRIO was added by upstream commit + * 575ed7d39e2f ("net_sch: mqprio: Change TC_SETUP_MQPRIO to + * TC_SETUP_QDISC_MQPRIO"). + * + * For older kernels which are using TC_SETUP_MQPRIO + */ +#ifdef NEED_TC_SETUP_QDISC_MQPRIO +#define TC_SETUP_QDISC_MQPRIO TC_SETUP_MQPRIO +#endif /* NEED_TC_SETUP_QDISC_MQPRIO */ + +#ifdef NEED_TCF_MIRRED_DEV +/* NEED_TCF_MIRRED_DEV + * + * tcf_mirred_dev was introduced by upstream commit 9f8a739e72f1 ("act_mirred: + * get rid of tcfm_ifindex from struct tcf_mirred"), which replaced + * tcf_mirred_ifindex. + */ +#define tcf_mirred_dev(a) \ + rtnl_dereference(to_mirred(a)->tcfm_dev) +#endif /* NEED_TCF_MIRRED_DEV */ + +#ifdef NEED_TCF_MIRRED_EGRESS_REDIRECT +/* NEED_TCF_MIRRED_EGRESS_REDIRECT + * + * is_tcf_mirred_egress_redirect was added by upstream commit 5724b8b56947 + * ("net/sched: tc_mirred: Rename public predicates 'is_tcf_mirred_redirect' + * and 'is_tcf_mirred_mirror'"), and is a simple rename of + * is_tcf_mirred_redirect. + */ +#define is_tcf_mirred_egress_redirect(a) is_tcf_mirred_redirect(a) +#endif /* NEED_TCF_MIRRED_EGRESS_REDIRECT */ + +#ifdef NEED_FLOW_BLOCK_BINDER_TYPE +/* NEED_FLOW_BLOCK_BINDER_TYPE + * + * The TCF_BLOCK_BINDER_TYPE enumerations were renamed by commit 32f8c4093ac3 + * ("net: flow_offload: rename TCF_BLOCK_BINDER_TYPE_* to + * FLOW_BLOCK_BINDER_TYPE_*") + */ +#define FLOW_BLOCK_BINDER_TYPE_UNSPEC TCF_BLOCK_BINDER_TYPE_UNSPEC +#define FLOW_BLOCK_BINDER_TYPE_CLSACT_INGRESS \ + TCF_BLOCK_BINDER_TYPE_CLSACT_INGRESS +#define FLOW_BLOCK_BINDER_TYPE_CLSACT_EGRESS \ + TCF_BLOCK_BINDER_TYPE_CLSACT_EGRESS +#endif /* NEED_FLOW_BLOCK_BINDER_TYPE */ + +#ifdef NEED_FLOW_BLOCK_BIND +/* NEED_FLOW_BLOCK_BIND + * + * The TCF_BLOCK_BIND and TCF_BLOCK_UNBIND were renamed by commit 9c0e189ec988 + * ("net: flow_offload: rename TC_BLOCK_{UN}BIND to FLOW_BLOCK_{UN}BIND") + */ +#define FLOW_BLOCK_BIND TC_BLOCK_BIND +#define FLOW_BLOCK_UNBIND TC_BLOCK_UNBIND +#endif /* NEED_FLOW_BLOCK_BIND */ + +#ifdef NEED_FLOW_BLOCK_CB_SETUP_SIMPLE +/* NEED_FLOW_BLOCK_CB_SETUP_SIMPLE + * + * flow_block_cb_setup_simple was introduced by commit 4e95bc268b91 + * ("net: flow_offload: add flow_block_cb_setup_simple()") along with several + * related macros. + * + * These are only used by drivers if HAVE_TC_CB_AND_SETUP_QDISC_MQPRIO is + * true. + */ +#define FLOW_CLS_REPLACE TC_CLSFLOWER_REPLACE +#define FLOW_CLS_DESTROY TC_CLSFLOWER_DESTROY +#define FLOW_CLS_STATS TC_CLSFLOWER_STATS +#define FLOW_CLS_TMPLT_CREATE TC_CLSFLOWER_TMPLT_CREATE +#define FLOW_CLS_TMPLT_DESTROY TC_CLSFLOWER_TMPLT_DESTROY + +#ifdef HAVE_TC_CB_AND_SETUP_QDISC_MQPRIO +#include + +int _kc_flow_block_cb_setup_simple(struct flow_block_offload *f, + struct list_head *driver_list, + tc_setup_cb_t *cb, + void *cb_ident, void *cb_priv, + bool ingress_only); + +#define flow_block_cb_setup_simple(f, driver_list, cb, cb_ident, cb_priv, \ + ingress_only) \ + _kc_flow_block_cb_setup_simple(f, driver_list, cb, cb_ident, cb_priv, \ + ingress_only) +#endif /* HAVE_TC_CB_AND_SETUP_QDISC_MQPRIO */ +#endif /* NEED_FLOW_BLOCK_CB_SETUP_SIMPLE */ + +/* ART/TSC functions */ +#ifdef HAVE_PTP_CROSSTIMESTAMP +/* NEED_CONVERT_ART_NS_TO_TSC + * + * convert_art_ns_to_tsc was added by upstream commit fc804f65d462 ("x86/tsc: + * Convert ART in nanoseconds to TSC"). + * + * This function is similar to convert_art_to_tsc, but expects the input in + * terms of nanoseconds, rather than ART cycles. We implement this by + * accessing the tsc_khz value and performing the proper calculation. In order + * to access the correct clock object on returning, we use the function + * convert_art_to_tsc, because the art_related_clocksource is inaccessible. + */ +#if defined(CONFIG_X86) && defined(NEED_CONVERT_ART_NS_TO_TSC) +#include + +static inline struct system_counterval_t convert_art_ns_to_tsc(u64 art_ns) +{ + struct system_counterval_t system; + u64 tmp, res, rem; + + rem = do_div(art_ns, USEC_PER_SEC); + + res = art_ns * tsc_khz; + tmp = rem * tsc_khz; + + do_div(tmp, USEC_PER_SEC); + res += tmp; + + system = convert_art_to_tsc(art_ns); + system.cycles = res; + + return system; +} +#endif /* CONFIG_X86 && NEED_CONVERT_ART_NS_TO_TSC */ +#endif /* HAVE_PTP_CROSSTIMESTAMP */ + +/* PTP functions and definitions */ +#if IS_ENABLED(CONFIG_PTP_1588_CLOCK) +#include +#include + +/* PTP_* ioctl flags + * + * PTP_PEROUT_ONE_SHOT and PTP_PEROUT_DUTY_CYCLE were added by commit + * f65b71aa25a6 ("ptp: add ability to configure duty cycle for periodic + * output") + * + * PTP_PEROUT_PHASE was added in commit b6bd41363a1c ("ptp: introduce + * a phase offset in the periodic output request") + * + * PTP_STRICT_FLAGS was added in commit 6138e687c7b6 ("ptp: Introduce strict + * checking of external time stamp options.") + * + * These flags control behavior for the periodic output PTP ioctl. For older + * kernels, we define the flags as 0. This allows bitmask checks on flags to + * work as expected, since these feature flags will become no-ops on kernels + * that lack support. + * + * Drivers can check if the relevant feature is actually supported by using an + * '#if' on the flag instead of an '#ifdef' + */ +#ifndef PTP_PEROUT_PHASE +#define PTP_PEROUT_PHASE 0 +#endif + +#ifndef PTP_PEROUT_DUTY_CYCLE +#define PTP_PEROUT_DUTY_CYCLE 0 +#endif + +#ifndef PTP_STRICT_FLAGS +#define PTP_STRICT_FLAGS 0 +#endif + +#ifndef PTP_PEROUT_PHASE +/* PTP_PEROUT_PHASE + * + * The PTP_PEROUT_PHASE flag was added in commit b6bd41363a1c ("ptp: introduce + * a phase offset in the periodic output request") as a way for userspace to + * request a phase-offset periodic output that starts on some arbitrary + * multiple of the clock period. + * + * For older kernels, define this flag to 0 so that checks for if it is + * enabled will always fail. Drivers should use '#if PTP_PEROUT_PHASE' to + * determine if the kernel has phase support, and use the flag as normal for + * checking supported flags or if the flag is enabled for a given request. + */ +#define PTP_PEROUT_PHASE 0 +#endif + +#endif /* CONFIG_PTP_1588_CLOCK */ + +/* + * NEED_PTP_SYSTEM_TIMESTAMP + * + * Upstream commit 361800876f80 ("ptp: add PTP_SYS_OFFSET_EXTENDED + * ioctl") introduces new ioctl, driver and helper functions. + * + * Required for PhotonOS 3.0 to correctly support backport of + * PTP patches introduced in Linux Kernel version 5.0 on 4.x kernels + */ +#ifdef NEED_PTP_SYSTEM_TIMESTAMP +struct ptp_system_timestamp { + struct timespec64 pre_ts; + struct timespec64 post_ts; +}; + +static inline void +ptp_read_system_prets(struct ptp_system_timestamp *sts) { } + +static inline void +ptp_read_system_postts(struct ptp_system_timestamp *sts) { } +#endif /* !NEED_PTP_SYSTEM_TIMESTAMP */ + +#ifdef NEED_PTP_CLASSIFY_RAW +/* NEED_PTP_CLASSIFY_RAW + * + * The ptp_classify_raw() function was introduced into + * as part of commit 164d8c666521 ("net: ptp: do not reimplement PTP/BPF + * classifier"). + * + * The kernel does provide the classifier BPF program since commit + * 15f0127d1d18 ("net: added a BPF to help drivers detect PTP packets."). + * However, it requires initializing the BPF filter properly and that varies + * depending on the kernel version. + * + * The only current uses for this function in our drivers is to enhance + * debugging messages. Rather than re-implementing the function just return + * PTP_CLASS_NONE indicating that it could not identify any PTP frame. + */ +#include + +static inline unsigned int ptp_classify_raw(struct sk_buff *skb) +{ + return PTP_CLASS_NONE; +} +#endif /* NEED_PTP_CLASSIFY_RAW */ + +#ifdef NEED_PTP_PARSE_HEADER +/* NEED_PTP_PARSE_HEADER + * + * The ptp_parse_header() function was introduced upstream in commit + * bdfbb63c314a ("ptp: Add generic ptp v2 header parsing function"). + * + * Since it is straight forward to implement, do so. + */ +#include + +struct clock_identity { + u8 id[8]; +}; + +struct port_identity { + struct clock_identity clock_identity; + __be16 port_number; +}; + +struct ptp_header { + u8 tsmt; /* transportSpecific | messageType */ + u8 ver; /* reserved | versionPTP */ + __be16 message_length; + u8 domain_number; + u8 reserved1; + u8 flag_field[2]; + __be64 correction; + __be32 reserved2; + struct port_identity source_port_identity; + __be16 sequence_id; + u8 control; + u8 log_message_interval; +} __packed; + +static inline struct ptp_header *ptp_parse_header(struct sk_buff *skb, + unsigned int type) +{ +#if defined(CONFIG_NET_PTP_CLASSIFY) + u8 *ptr = skb_mac_header(skb); + + if (type & PTP_CLASS_VLAN) + ptr += VLAN_HLEN; + + switch (type & PTP_CLASS_PMASK) { + case PTP_CLASS_IPV4: + ptr += IPV4_HLEN(ptr) + UDP_HLEN; + break; + case PTP_CLASS_IPV6: + ptr += IP6_HLEN + UDP_HLEN; + break; + case PTP_CLASS_L2: + break; + default: + return NULL; + } + + ptr += ETH_HLEN; + + /* Ensure that the entire header is present in this packet. */ + if (ptr + sizeof(struct ptp_header) > skb->data + skb->len) + return NULL; + + return (struct ptp_header *)ptr; +#else + return NULL; +#endif +} +#endif /* NEED_PTP_PARSE_HEADER */ + +#ifdef NEED_CPU_LATENCY_QOS_RENAME +/* NEED_CPU_LATENCY_QOS_RENAME + * + * The PM_QOS_CPU_DMA_LATENCY definition was removed in 67b06ba01857 ("PM: + * QoS: Drop PM_QOS_CPU_DMA_LATENCY and rename related functions"). The + * related functions were renamed to use "cpu_latency_qos_" prefix. + * + * Use wrapper functions to map the new API onto the API available in older + * kernels. + */ +#include +static inline void +cpu_latency_qos_add_request(struct pm_qos_request *req, s32 value) +{ + pm_qos_add_request(req, PM_QOS_CPU_DMA_LATENCY, value); +} + +static inline void +cpu_latency_qos_update_request(struct pm_qos_request *req, s32 new_value) +{ + pm_qos_update_request(req, new_value); +} + +static inline void +cpu_latency_qos_remove_request(struct pm_qos_request *req) +{ + pm_qos_remove_request(req); +} +#endif /* NEED_CPU_LATENCY_QOS_RENAME */ + +#ifdef NEED_DECLARE_STATIC_KEY_FALSE +/* NEED_DECLARE_STATIC_KEY_FALSE + * + * DECLARE_STATIC_KEY_FALSE was added by upstream commit b8fb03785d4d + * ("locking/static_keys: Provide DECLARE and well as DEFINE macros") + * + * The definition is now necessary to handle the xdpdrv work with more than 64 + * cpus + */ +#ifdef HAVE_STRUCT_STATIC_KEY_FALSE +#define DECLARE_STATIC_KEY_FALSE(name) extern struct static_key_false name +#else +#define DECLARE_STATIC_KEY_FALSE(name) extern struct static_key name +#endif /* HAVE_STRUCT_STATIC_KEY_FALSE */ +#endif /* NEED_DECLARE_STATIC_KEY_FALSE */ + +#ifdef NEED_DEFINE_STATIC_KEY_FALSE +/* NEED_DEFINE_STATIC_KEY_FALSE + * + * DEFINE_STATIC_KEY_FALSE was added by upstream commit 11276d5306b8 + * ("locking/static_keys: Add a new static_key interface") + * + * The definition is now necessary to handle the xdpdrv work with more than 64 + * cpus + */ +#define DEFINE_STATIC_KEY_FALSE(name) \ + struct static_key name = STATIC_KEY_INIT_FALSE +#endif /* NEED_DEFINE_STATIC_KEY_FALSE */ + +#ifdef NEED_STATIC_BRANCH_LIKELY +/* NEED_STATIC_BRANCH_LIKELY + * + * static_branch_likely, static_branch_unlikely, + * static_branch_inc, static_branch_dec was added by upstream commit + * 11276d5306b8 ("locking/static_keys: Add a new + * static_key interface") + * + * The definition is now necessary to handle the xdpdrv work with more than 64 + * cpus + * + * Note that we include all four definitions if static_branch_likely cannot be + * found in . + */ +#define static_branch_likely(x) likely(static_key_enabled(x)) +#define static_branch_unlikely(x) unlikely(static_key_enabled(x)) + +#define static_branch_enable(x) static_key_enable(x) +#define static_branch_inc(x) static_key_slow_inc(x) +#define static_branch_dec(x) static_key_slow_dec(x) + +#endif /* NEED_STATIC_BRANCH_LIKELY */ + +/* PCI related stuff */ + +/* NEED_PCI_AER_CLEAR_NONFATAL_STATUS + * + * 894020fdd88c ("PCI/AER: Rationalize error status register clearing") has + * renamed pci_cleanup_aer_uncorrect_error_status to more sane name. + */ +#ifdef NEED_PCI_AER_CLEAR_NONFATAL_STATUS +#define pci_aer_clear_nonfatal_status pci_cleanup_aer_uncorrect_error_status +#endif /* NEED_PCI_AER_CLEAR_NONFATAL_STATUS */ + +#ifdef NEED_NETDEV_XDP_STRUCT +#define netdev_bpf netdev_xdp +#endif /* NEED_NETDEV_XDP_STRUCT */ + +#ifdef NEED_NO_NETDEV_PROG_XDP_WARN_ACTION +#ifdef HAVE_XDP_SUPPORT +#include +static inline void +_kc_bpf_warn_invalid_xdp_action(__maybe_unused struct net_device *dev, + __maybe_unused struct bpf_prog *prog, u32 act) +{ + bpf_warn_invalid_xdp_action(act); +} + +#define bpf_warn_invalid_xdp_action(dev, prog, act) \ + _kc_bpf_warn_invalid_xdp_action(dev, prog, act) +#endif /* HAVE_XDP_SUPPORT */ +#endif /* HAVE_NETDEV_PROG_XDP_WARN_ACTION */ + +/* NEED_ETH_HW_ADDR_SET + * + * eth_hw_addr_set was added by upstream commit + * 48eab831ae8b ("net: create netdev->dev_addr assignment helpers") + * + * Using eth_hw_addr_set became required in 5.17, when the dev_addr field in + * the netdev struct was constified. See 48eab831ae8b ("net: create + * netdev->dev_addr assignment helpers") + */ +#ifdef NEED_ETH_HW_ADDR_SET +static inline void eth_hw_addr_set(struct net_device *dev, const u8 *addr) +{ + ether_addr_copy(dev->dev_addr, addr); +} +#endif /* NEED_ETH_HW_ADDR_SET */ + +#ifdef NEED_ETH_GET_HEADLEN +/* This is missing on pre 3.18 kernels, most notably on 3.10 used for ESX + * certification. + */ + +/* include headers needed for get_headlen function */ +#if defined(CONFIG_FCOE) || defined(CONFIG_FCOE_MODULE) +#include +#endif +#ifdef HAVE_SCTP +#include +#endif +u32 eth_get_headlen(unsigned char *data, unsigned int max_len) +{ + union { + unsigned char *network; + /* l2 headers */ + struct ethhdr *eth; + struct vlan_hdr *vlan; + /* l3 headers */ + struct iphdr *ipv4; + struct ipv6hdr *ipv6; + } hdr; + __be16 proto; + u8 nexthdr = 0; /* default to not TCP */ + u8 hlen; + + /* this should never happen, but better safe than sorry */ + if (max_len < ETH_HLEN) + return max_len; + + /* initialize network frame pointer */ + hdr.network = data; + + /* set first protocol and move network header forward */ + proto = hdr.eth->h_proto; + hdr.network += ETH_HLEN; + +again: + switch (proto) { + /* handle any vlan tag if present */ + case __constant_htons(ETH_P_8021AD): + case __constant_htons(ETH_P_8021Q): + if ((hdr.network - data) > (max_len - VLAN_HLEN)) + return max_len; + + proto = hdr.vlan->h_vlan_encapsulated_proto; + hdr.network += VLAN_HLEN; + goto again; + /* handle L3 protocols */ + case __constant_htons(ETH_P_IP): + if ((hdr.network - data) > (max_len - sizeof(struct iphdr))) + return max_len; + + /* access ihl as a u8 to avoid unaligned access on ia64 */ + hlen = (hdr.network[0] & 0x0F) << 2; + + /* verify hlen meets minimum size requirements */ + if (hlen < sizeof(struct iphdr)) + return hdr.network - data; + + /* record next protocol if header is present */ + if (!(hdr.ipv4->frag_off & htons(IP_OFFSET))) + nexthdr = hdr.ipv4->protocol; + + hdr.network += hlen; + break; +#ifdef NETIF_F_TSO6 + case __constant_htons(ETH_P_IPV6): + if ((hdr.network - data) > (max_len - sizeof(struct ipv6hdr))) + return max_len; + + /* record next protocol */ + nexthdr = hdr.ipv6->nexthdr; + hdr.network += sizeof(struct ipv6hdr); + break; +#endif /* NETIF_F_TSO6 */ +#if defined(CONFIG_FCOE) || defined(CONFIG_FCOE_MODULE) + case __constant_htons(ETH_P_FCOE): + hdr.network += FCOE_HEADER_LEN; + break; +#endif + default: + return hdr.network - data; + } + + /* finally sort out L4 */ + switch (nexthdr) { + case IPPROTO_TCP: + if ((hdr.network - data) > (max_len - sizeof(struct tcphdr))) + return max_len; + + /* access doff as a u8 to avoid unaligned access on ia64 */ + hdr.network += max_t(u8, sizeof(struct tcphdr), + (hdr.network[12] & 0xF0) >> 2); + + break; + case IPPROTO_UDP: + case IPPROTO_UDPLITE: + hdr.network += sizeof(struct udphdr); + break; +#ifdef HAVE_SCTP + case IPPROTO_SCTP: + hdr.network += sizeof(struct sctphdr); + break; +#endif + } + + /* + * If everything has gone correctly hdr.network should be the + * data section of the packet and will be the end of the header. + * If not then it probably represents the end of the last recognized + * header. + */ + return min_t(unsigned int, hdr.network - data, max_len); +} +#endif /* NEED_ETH_GET_HEADLEN */ + +/* NEED_ETH_GET_HEADLEN_NET_DEVICE_ARG + * + * + * eth_get_headlen was modified by upstream commit + * 59753ce8b196 ("ethernet: constify eth_get_headlen()'s data argument") + * c43f1255b866 ("net: pass net_device argument to the eth_get_headlen") + * + * This allows core driver code to simply call eth_get_headlen with all + * 3 parameters, and have kcompat automatically drop it depending on what + * the kernel supports. + + * For kernels older than 3.18, eth_get_headlen didn't exist. + */ + +#ifdef NEED_ETH_GET_HEADLEN_NET_DEVICE_ARG +static inline u32 +__kc_eth_get_headlen(const struct net_device __always_unused *dev, + void *data, unsigned int len) +{ + return eth_get_headlen(data, len); +} + +#define eth_get_headlen(dev, data, len) __kc_eth_get_headlen(dev, data, len) +#endif /* NEED_ETH_GET_HEADLEN_NET_DEVICE_ARG */ + +#ifdef NEED_JIFFIES_64_TIME_IS_MACROS +/* NEED_JIFFIES_64_TIME_IS_MACROS + * + * The jiffies64 time_is_* macros were introduced upstream by 3740dcdf8a77 + * ("jiffies: add time comparison functions for 64 bit jiffies") in Linux 4.9. + * + * Support for 64-bit jiffies has been available since the initial import of + * Linux into git in 2005, so its safe to just implement the macros as-is + * here. + */ +#define time_is_before_jiffies64(a) time_after64(get_jiffies_64(), a) +#define time_is_after_jiffies64(a) time_before64(get_jiffies_64(), a) +#define time_is_before_eq_jiffies64(a) time_after_eq64(get_jiffies_64(), a) +#define time_is_after_eq_jiffies64(a) time_before_eq64(get_jiffies_64(), a) +#endif /* NEED_JIFFIES_64_TIME_IS_MACROS */ + +#ifdef NEED_INDIRECT_CALL_WRAPPER_MACROS +/* NEED_INDIRECT_CALL_WRAPPER_MACROS + * + * The INDIRECT_CALL_* macros were introduced upstream as upstream commit + * 283c16a2dfd3 ("indirect call wrappers: helpers to speed-up indirect calls + * of builtin") which landed in Linux 5.0 + * + * These are easy to implement directly. + */ +#ifdef CONFIG_RETPOLINE +#define INDIRECT_CALL_1(f, f1, ...) \ + ({ \ + likely(f == f1) ? f1(__VA_ARGS__) : f(__VA_ARGS__); \ + }) +#define INDIRECT_CALL_2(f, f2, f1, ...) \ + ({ \ + likely(f == f2) ? f2(__VA_ARGS__) : \ + INDIRECT_CALL_1(f, f1, __VA_ARGS__); \ + }) + +#define INDIRECT_CALLABLE_DECLARE(f) f +#define INDIRECT_CALLABLE_SCOPE +#else /* !CONFIG_RETPOLINE */ +#define INDIRECT_CALL_1(f, f1, ...) f(__VA_ARGS__) +#define INDIRECT_CALL_2(f, f2, f1, ...) f(__VA_ARGS__) +#define INDIRECT_CALLABLE_DECLARE(f) +#define INDIRECT_CALLABLE_SCOPE static +#endif /* CONFIG_RETPOLINE */ +#endif /* NEED_INDIRECT_CALL_WRAPPER_MACROS */ + +#ifdef NEED_INDIRECT_CALL_3_AND_4 +/* NEED_INDIRECT_CALL_3_AND_4 + * Support for the 3 and 4 call variants was added in upstream commit + * e678e9ddea96 ("indirect_call_wrapper: extend indirect wrapper to support up + * to 4 calls") + * + * These are easy to implement directly. + */ + +#ifdef CONFIG_RETPOLINE +#define INDIRECT_CALL_3(f, f3, f2, f1, ...) \ + ({ \ + likely(f == f3) ? f3(__VA_ARGS__) : \ + INDIRECT_CALL_2(f, f2, f1, __VA_ARGS__); \ + }) +#define INDIRECT_CALL_4(f, f4, f3, f2, f1, ...) \ + ({ \ + likely(f == f4) ? f4(__VA_ARGS__) : \ + INDIRECT_CALL_3(f, f3, f2, f1, __VA_ARGS__); \ + }) +#else /* !CONFIG_RETPOLINE */ +#define INDIRECT_CALL_3(f, f3, f2, f1, ...) f(__VA_ARGS__) +#define INDIRECT_CALL_4(f, f4, f3, f2, f1, ...) f(__VA_ARGS__) +#endif /* CONFIG_RETPOLINE */ +#endif /* NEED_INDIRECT_CALL_3_AND_4 */ + +#ifdef NEED_EXPORT_INDIRECT_CALLABLE +/* NEED_EXPORT_INDIRECT_CALLABLE + * + * Support for EXPORT_INDIRECT_CALLABLE was added in upstream commit + * 0053859496ba ("net: add EXPORT_INDIRECT_CALLABLE wrapper") + * + * These are easy to implement directly. + */ +#ifdef CONFIG_RETPOLINE +#define EXPORT_INDIRECT_CALLABLE(f) EXPORT_SYMBOL(f) +#else +#define EXPORT_INDIRECT_CALLABLE(f) +#endif /* CONFIG_RETPOLINE */ +#endif /* NEED_EXPORT_INDIRECT_CALLABLE */ + +/* NEED_DEVM_KASPRINTF and NEED_DEVM_KVASPRINTF + * + * devm_kvasprintf and devm_kasprintf were added by commit + * 75f2a4ead5d5 ("devres: Add devm_kasprintf and devm_kvasprintf API") + * in Linux 3.17. + */ +#ifdef NEED_DEVM_KVASPRINTF +__printf(3, 0) char *devm_kvasprintf(struct device *dev, gfp_t gfp, + const char *fmt, va_list ap); +#endif /* NEED_DEVM_KVASPRINTF */ + +#ifdef NEED_DEVM_KASPRINTF +__printf(3, 4) char *devm_kasprintf(struct device *dev, gfp_t gfp, + const char *fmt, ...); +#endif /* NEED_DEVM_KASPRINTF */ + +#ifdef NEED_XSK_UMEM_GET_RX_FRAME_SIZE +#ifdef HAVE_AF_XDP_ZC_SUPPORT +#ifndef xsk_umem_get_rx_frame_size +static inline u32 _xsk_umem_get_rx_frame_size(struct xdp_umem *umem) +{ + return umem->chunk_size_nohr - XDP_PACKET_HEADROOM; +} + +#define xsk_umem_get_rx_frame_size _xsk_umem_get_rx_frame_size +#endif /* xsk_umem_get_rx_frame_size */ +#endif /* HAVE_AF_XDP_ZC_SUPPORT */ +#endif + +#ifdef NEED_XSK_BUFF_POOL_RENAME +#define XDP_SETUP_XSK_POOL XDP_SETUP_XSK_UMEM +#define xsk_get_pool_from_qid xdp_get_umem_from_qid +#define xsk_pool_get_rx_frame_size xsk_umem_get_rx_frame_size +#define xsk_pool_set_rxq_info xsk_buff_set_rxq_info +#define xsk_pool_dma_unmap xsk_buff_dma_unmap +#define xsk_pool_dma_map xsk_buff_dma_map +#define xsk_tx_peek_desc xsk_umem_consume_tx +#define xsk_tx_release xsk_umem_consume_tx_done +#define xsk_tx_completed xsk_umem_complete_tx +#define xsk_uses_need_wakeup xsk_umem_uses_need_wakeup +#endif /* NEED_XSK_BUFF_POOL_RENAME */ + +#ifdef NEED_PCI_IOV_VF_ID +/* NEED_PCI_IOV_VF_ID + * + * pci_iov_vf_id were added by commit 21ca9fb62d468 ("PCI/IOV: + * Add pci_iov_vf_id() to get VF index") in Linux 5.18 + */ +int _kc_pci_iov_vf_id(struct pci_dev *dev); +#define pci_iov_vf_id _kc_pci_iov_vf_id +#endif /* NEED_PCI_IOV_VF_ID */ + +/* NEED_MUL_U64_U64_DIV_U64 + * + * mul_u64_u64_div_u64 was introduced in Linux 5.9 as part of commit + * 3dc167ba5729 ("sched/cputime: Improve cputime_adjust()") + */ +#ifdef NEED_MUL_U64_U64_DIV_U64 +u64 mul_u64_u64_div_u64(u64 a, u64 mul, u64 div); +#endif /* NEED_MUL_U64_U64_DIV_U64 */ + +/* NEED_ROUNDUP_U64 and NEED_DIV_U64_ROUND_UP and NEED_DIV_U64_ROUND_CLOSEST + * + * roundup_u64 and DIV_U64_FOUND_UP were introduced by commit 1d4ce389da2b + * ("ice: add and use roundup_u64 instead of open coding equivalent"). They + * are straight forward to re-implement here. + */ +#ifdef NEED_DIV_U64_ROUND_UP +#define DIV_U64_ROUND_UP(ll, d) \ + ({ u32 _tmp = (d); div_u64((ll) + _tmp - 1, _tmp); }) +#endif /* NEED_DIV_U64_ROUND_UP */ + +#ifdef NEED_ROUNDUP_U64 +static inline u64 roundup_u64(u64 x, u32 y) +{ + return DIV_U64_ROUND_UP(x, y) * y; +} +#endif /* NEED_ROUNDUP_U64 */ + +#ifdef NEED_DIV_U64_ROUND_CLOSEST +#define DIV_U64_ROUND_CLOSEST(dividend, divisor) \ + ({ u32 _tmp = (divisor); div_u64((u64)(dividend) + _tmp / 2, _tmp); }) +#endif /* NEED_DIV_U64_ROUND_CLOSEST */ + +#ifdef NEED_LINKMODE_ZERO +static inline void linkmode_zero(unsigned long *dst) +{ + bitmap_zero(dst, __ETHTOOL_LINK_MODE_MASK_NBITS); +} + +static inline void linkmode_copy(unsigned long *dst, const unsigned long *src) +{ + bitmap_copy(dst, src, __ETHTOOL_LINK_MODE_MASK_NBITS); +} + +static inline void linkmode_and(unsigned long *dst, const unsigned long *a, + const unsigned long *b) +{ + bitmap_and(dst, a, b, __ETHTOOL_LINK_MODE_MASK_NBITS); +} + +static inline void linkmode_or(unsigned long *dst, const unsigned long *a, + const unsigned long *b) +{ + bitmap_or(dst, a, b, __ETHTOOL_LINK_MODE_MASK_NBITS); +} + +static inline bool linkmode_empty(const unsigned long *src) +{ + return bitmap_empty(src, __ETHTOOL_LINK_MODE_MASK_NBITS); +} + +static inline int linkmode_andnot(unsigned long *dst, const unsigned long *src1, + const unsigned long *src2) +{ + return bitmap_andnot(dst, src1, src2, __ETHTOOL_LINK_MODE_MASK_NBITS); +} + +static inline void linkmode_set_bit(int nr, volatile unsigned long *addr) +{ + __set_bit(nr, addr); +} + +static inline void linkmode_clear_bit(int nr, volatile unsigned long *addr) +{ + __clear_bit(nr, addr); +} + +static inline void linkmode_change_bit(int nr, volatile unsigned long *addr) +{ + __change_bit(nr, addr); +} + +static inline int linkmode_test_bit(int nr, volatile unsigned long *addr) +{ + return test_bit(nr, addr); +} + +static inline int linkmode_equal(const unsigned long *src1, + const unsigned long *src2) +{ + return bitmap_equal(src1, src2, __ETHTOOL_LINK_MODE_MASK_NBITS); +} +#else /* !NEED_LINKMODE_ZERO */ +#include +#endif /* NEED_LINKMODE_ZERO */ + +#ifdef NEED_LINKMODE_SET_BIT_ARRAY +static inline void linkmode_set_bit_array(const int *array, int array_size, + unsigned long *addr) +{ + int i; + + for (i = 0; i < array_size; i++) + linkmode_set_bit(array[i], addr); +} +#endif /* NEED_LINKMODE_SET_BIT_ARRAY */ + +#ifdef NEED_ETHTOOL_LINK_MODE_BIT_INDICES +/* Link mode bit indices */ +enum ethtool_link_mode_bit_indices { + ETHTOOL_LINK_MODE_10baseT_Half_BIT = 0, + ETHTOOL_LINK_MODE_10baseT_Full_BIT = 1, + ETHTOOL_LINK_MODE_100baseT_Half_BIT = 2, + ETHTOOL_LINK_MODE_100baseT_Full_BIT = 3, + ETHTOOL_LINK_MODE_1000baseT_Half_BIT = 4, + ETHTOOL_LINK_MODE_1000baseT_Full_BIT = 5, + ETHTOOL_LINK_MODE_Autoneg_BIT = 6, + ETHTOOL_LINK_MODE_TP_BIT = 7, + ETHTOOL_LINK_MODE_AUI_BIT = 8, + ETHTOOL_LINK_MODE_MII_BIT = 9, + ETHTOOL_LINK_MODE_FIBRE_BIT = 10, + ETHTOOL_LINK_MODE_BNC_BIT = 11, + ETHTOOL_LINK_MODE_10000baseT_Full_BIT = 12, + ETHTOOL_LINK_MODE_Pause_BIT = 13, + ETHTOOL_LINK_MODE_Asym_Pause_BIT = 14, + ETHTOOL_LINK_MODE_2500baseX_Full_BIT = 15, + ETHTOOL_LINK_MODE_Backplane_BIT = 16, + ETHTOOL_LINK_MODE_1000baseKX_Full_BIT = 17, + ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT = 18, + ETHTOOL_LINK_MODE_10000baseKR_Full_BIT = 19, + ETHTOOL_LINK_MODE_10000baseR_FEC_BIT = 20, + ETHTOOL_LINK_MODE_20000baseMLD2_Full_BIT = 21, + ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT = 22, + ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT = 23, + ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT = 24, + ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT = 25, + ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT = 26, + ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT = 27, + ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT = 28, + ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT = 29, + ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT = 30, +#ifdef ETHTOOL_GLINKSETTINGS + ETHTOOL_LINK_MODE_25000baseCR_Full_BIT = 31, + ETHTOOL_LINK_MODE_25000baseKR_Full_BIT = 32, + ETHTOOL_LINK_MODE_25000baseSR_Full_BIT = 33, + ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT = 34, + ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT = 35, + ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT = 36, + ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT = 37, + ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT = 38, + ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT = 39, + ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT = 40, + ETHTOOL_LINK_MODE_1000baseX_Full_BIT = 41, + ETHTOOL_LINK_MODE_10000baseCR_Full_BIT = 42, + ETHTOOL_LINK_MODE_10000baseSR_Full_BIT = 43, + ETHTOOL_LINK_MODE_10000baseLR_Full_BIT = 44, + ETHTOOL_LINK_MODE_10000baseLRM_Full_BIT = 45, + ETHTOOL_LINK_MODE_10000baseER_Full_BIT = 46, + ETHTOOL_LINK_MODE_2500baseT_Full_BIT = 47, + ETHTOOL_LINK_MODE_5000baseT_Full_BIT = 48, + + ETHTOOL_LINK_MODE_FEC_NONE_BIT = 49, + ETHTOOL_LINK_MODE_FEC_RS_BIT = 50, + ETHTOOL_LINK_MODE_FEC_BASER_BIT = 51, + + __ETHTOOL_LINK_MODE_LAST + = ETHTOOL_LINK_MODE_FEC_BASER_BIT, +#else + + /* Last allowed bit for __ETHTOOL_LINK_MODE_LEGACY_MASK is bit + * 31. Please do NOT define any SUPPORTED_* or ADVERTISED_* + * macro for bits > 31. The only way to use indices > 31 is to + * use the new ETHTOOL_GLINKSETTINGS/ETHTOOL_SLINKSETTINGS API. + */ + + __ETHTOOL_LINK_MODE_LAST + = ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT, +#endif /* !ETHTOOL_GLINKSETTINGS */ +}; +#endif /* NEED_ETHTOOL_LINK_MODE_BIT_INDICES */ + +#if defined(NEED_FLOW_MATCH) && defined(HAVE_TC_SETUP_CLSFLOWER) +/* NEED_FLOW_MATCH + * + * flow_match*, FLOW_DISSECTOR_MATCH, flow_rule*, flow_rule_match_key, and + * tc_cls_flower_offload_flow_rule were added by commit + * 8f2566225ae2 ("flow_offload: add flow_rule and flow_match structures and use + * them") in Linux 5.1. + */ + +#include + +struct flow_match { + struct flow_dissector *dissector; + void *mask; + void *key; +}; + +struct flow_match_basic { + struct flow_dissector_key_basic *key, *mask; +}; + +struct flow_match_control { + struct flow_dissector_key_control *key, *mask; +}; + +struct flow_match_eth_addrs { + struct flow_dissector_key_eth_addrs *key, *mask; +}; + +#ifndef HAVE_TC_FLOWER_VLAN_IN_TAGS +struct flow_match_vlan { + struct flow_dissector_key_vlan *key, *mask; +}; +#endif /* HAVE_TC_FLOWER_VLAN_IN_TAGS */ + +struct flow_match_ipv4_addrs { + struct flow_dissector_key_ipv4_addrs *key, *mask; +}; + +struct flow_match_ipv6_addrs { + struct flow_dissector_key_ipv6_addrs *key, *mask; +}; + +#ifdef HAVE_FLOW_DISSECTOR_KEY_IP +struct flow_match_ip { + struct flow_dissector_key_ip *key, *mask; +}; +#endif /* HAVE_FLOW_DISSECTOR_KEY_IP */ + +struct flow_match_ports { + struct flow_dissector_key_ports *key, *mask; +}; + +#ifdef HAVE_TC_FLOWER_ENC +struct flow_match_enc_keyid { + struct flow_dissector_key_keyid *key, *mask; +}; +#endif /* HAVE_TC_FLOWER_ENC */ + +struct flow_rule { + struct flow_match match; +#if 0 + /* In 5.1+ kernels, action is a member of struct flow_rule but is + * not compatible with how we kcompat tc_cls_flower_offload_flow_rule + * below. By not declaring it here, any driver that attempts to use + * action as an element of struct flow_rule will fail to compile + * instead of silently trying to access memory that shouldn't be. + */ + struct flow_action action; +#endif +}; + +static inline struct flow_rule * +tc_cls_flower_offload_flow_rule(struct tc_cls_flower_offload *tc_flow_cmd) +{ + return (struct flow_rule *)&tc_flow_cmd->dissector; +} + +static inline bool flow_rule_match_key(const struct flow_rule *rule, + enum flow_dissector_key_id key) +{ + return dissector_uses_key(rule->match.dissector, key); +} + +#define FLOW_DISSECTOR_MATCH(__rule, __type, __out) \ + const struct flow_match *__m = &(__rule)->match; \ + struct flow_dissector *__d = (__m)->dissector; \ + \ + (__out)->key = skb_flow_dissector_target(__d, __type, (__m)->key); \ + (__out)->mask = skb_flow_dissector_target(__d, __type, (__m)->mask); \ + +static inline void +flow_rule_match_basic(const struct flow_rule *rule, + struct flow_match_basic *out) +{ + FLOW_DISSECTOR_MATCH(rule, FLOW_DISSECTOR_KEY_BASIC, out); +} + +static inline void +flow_rule_match_control(const struct flow_rule *rule, + struct flow_match_control *out) +{ + FLOW_DISSECTOR_MATCH(rule, FLOW_DISSECTOR_KEY_CONTROL, out); +} + +static inline void +flow_rule_match_eth_addrs(const struct flow_rule *rule, + struct flow_match_eth_addrs *out) +{ + FLOW_DISSECTOR_MATCH(rule, FLOW_DISSECTOR_KEY_ETH_ADDRS, out); +} + +#ifndef HAVE_TC_FLOWER_VLAN_IN_TAGS +static inline void +flow_rule_match_vlan(const struct flow_rule *rule, struct flow_match_vlan *out) +{ + FLOW_DISSECTOR_MATCH(rule, FLOW_DISSECTOR_KEY_VLAN, out); +} +#endif /* HAVE_TC_FLOWER_VLAN_IN_TAGS */ + +static inline void +flow_rule_match_ipv4_addrs(const struct flow_rule *rule, + struct flow_match_ipv4_addrs *out) +{ + FLOW_DISSECTOR_MATCH(rule, FLOW_DISSECTOR_KEY_IPV4_ADDRS, out); +} + +static inline void +flow_rule_match_ipv6_addrs(const struct flow_rule *rule, + struct flow_match_ipv6_addrs *out) +{ + FLOW_DISSECTOR_MATCH(rule, FLOW_DISSECTOR_KEY_IPV6_ADDRS, out); +} + +#ifdef HAVE_FLOW_DISSECTOR_KEY_IP +static inline void +flow_rule_match_ip(const struct flow_rule *rule, struct flow_match_ip *out) +{ + FLOW_DISSECTOR_MATCH(rule, FLOW_DISSECTOR_KEY_IP, out); +} +#endif /* HAVE_FLOW_DISSECTOR_KEY_IP */ + +static inline void +flow_rule_match_ports(const struct flow_rule *rule, + struct flow_match_ports *out) +{ + FLOW_DISSECTOR_MATCH(rule, FLOW_DISSECTOR_KEY_PORTS, out); +} + +#ifdef HAVE_TC_FLOWER_ENC +static inline void +flow_rule_match_enc_control(const struct flow_rule *rule, + struct flow_match_control *out) +{ + FLOW_DISSECTOR_MATCH(rule, FLOW_DISSECTOR_KEY_ENC_CONTROL, out); +} + +static inline void +flow_rule_match_enc_ipv4_addrs(const struct flow_rule *rule, + struct flow_match_ipv4_addrs *out) +{ + FLOW_DISSECTOR_MATCH(rule, FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS, out); +} + +static inline void +flow_rule_match_enc_ipv6_addrs(const struct flow_rule *rule, + struct flow_match_ipv6_addrs *out) +{ + FLOW_DISSECTOR_MATCH(rule, FLOW_DISSECTOR_KEY_ENC_IPV6_ADDRS, out); +} + +#ifdef HAVE_FLOW_DISSECTOR_KEY_IP +#ifdef HAVE_FLOW_DISSECTOR_KEY_ENC_IP +static inline void +flow_rule_match_enc_ip(const struct flow_rule *rule, struct flow_match_ip *out) +{ + FLOW_DISSECTOR_MATCH(rule, FLOW_DISSECTOR_KEY_ENC_IP, out); +} +#endif /* HAVE_FLOW_DISSECTOR_KEY_ENC_IP */ +#endif /* HAVE_FLOW_DISSECTOR_KEY_IP */ + +static inline void +flow_rule_match_enc_ports(const struct flow_rule *rule, + struct flow_match_ports *out) +{ + FLOW_DISSECTOR_MATCH(rule, FLOW_DISSECTOR_KEY_ENC_PORTS, out); +} + +static inline void +flow_rule_match_enc_keyid(const struct flow_rule *rule, + struct flow_match_enc_keyid *out) +{ + FLOW_DISSECTOR_MATCH(rule, FLOW_DISSECTOR_KEY_ENC_KEYID, out); +} +#endif /* HAVE_TC_FLOWER_ENC */ +#endif /* NEED_FLOW_MATCH && HAVE_TC_SETUP_CLSFLOWER */ + +/* bitfield / bitmap */ + +/* NEED_BITMAP_COPY_CLEAR_TAIL + * + * backport + * c724f193619c ("bitmap: new bitmap_copy_safe and bitmap_{from,to}_arr32") + */ +#ifdef NEED_BITMAP_COPY_CLEAR_TAIL +/* Copy bitmap and clear tail bits in last word */ +static inline void +bitmap_copy_clear_tail(unsigned long *dst, const unsigned long *src, unsigned int nbits) +{ + bitmap_copy(dst, src, nbits); + if (nbits % BITS_PER_LONG) + dst[nbits / BITS_PER_LONG] &= BITMAP_LAST_WORD_MASK(nbits); +} +#endif /* NEED_BITMAP_COPY_CLEAR_TAIL */ + +/* NEED_BITMAP_FROM_ARR32 + * + * backport + * c724f193619c ("bitmap: new bitmap_copy_safe and bitmap_{from,to}_arr32") + */ +#ifdef NEED_BITMAP_FROM_ARR32 +#if BITS_PER_LONG == 64 +/** + * bitmap_from_arr32 - copy the contents of u32 array of bits to bitmap + * @bitmap: array of unsigned longs, the destination bitmap + * @buf: array of u32 (in host byte order), the source bitmap + * @nbits: number of bits in @bitmap + */ +static inline void bitmap_from_arr32(unsigned long *bitmap, const u32 *buf, + unsigned int nbits) +{ + unsigned int i, halfwords; + + halfwords = DIV_ROUND_UP(nbits, 32); + for (i = 0; i < halfwords; i++) { + bitmap[i/2] = (unsigned long) buf[i]; + if (++i < halfwords) + bitmap[i/2] |= ((unsigned long) buf[i]) << 32; + } + + /* Clear tail bits in last word beyond nbits. */ + if (nbits % BITS_PER_LONG) + bitmap[(halfwords - 1) / 2] &= BITMAP_LAST_WORD_MASK(nbits); +} +#else /* BITS_PER_LONG == 64 */ +/* + * On 32-bit systems bitmaps are represented as u32 arrays internally, and + * therefore conversion is not needed when copying data from/to arrays of u32. + */ +#define bitmap_from_arr32(bitmap, buf, nbits) \ + bitmap_copy_clear_tail((unsigned long *) (bitmap), \ + (const unsigned long *) (buf), (nbits)) +#endif /* BITS_PER_LONG == 64 */ +#endif /* NEED_BITMAP_FROM_ARR32 */ + +/* NEED_BITMAP_TO_ARR32 + * + * backport + * c724f193619c ("bitmap: new bitmap_copy_safe and bitmap_{from,to}_arr32") + */ +#ifdef NEED_BITMAP_TO_ARR32 +#if BITS_PER_LONG == 64 +/** + * bitmap_to_arr32 - copy the contents of bitmap to a u32 array of bits + * @buf: array of u32 (in host byte order), the dest bitmap + * @bitmap: array of unsigned longs, the source bitmap + * @nbits: number of bits in @bitmap + */ +static inline void bitmap_to_arr32(u32 *buf, const unsigned long *bitmap, + unsigned int nbits) +{ + unsigned int i, halfwords; + + halfwords = DIV_ROUND_UP(nbits, 32); + for (i = 0; i < halfwords; i++) { + buf[i] = (u32) (bitmap[i/2] & UINT_MAX); + if (++i < halfwords) + buf[i] = (u32) (bitmap[i/2] >> 32); + } + + /* Clear tail bits in last element of array beyond nbits. */ + if (nbits % BITS_PER_LONG) + buf[halfwords - 1] &= (u32) (UINT_MAX >> ((-nbits) & 31)); +} +#else +/* + * On 32-bit systems bitmaps are represented as u32 arrays internally, and + * therefore conversion is not needed when copying data from/to arrays of u32. + */ +#define bitmap_to_arr32(buf, bitmap, nbits) \ + bitmap_copy_clear_tail((unsigned long *) (buf), \ + (const unsigned long *) (bitmap), (nbits)) +#endif /* BITS_PER_LONG == 64 */ +#endif /* NEED_BITMAP_TO_ARR32 */ + +#ifndef HAVE_INCLUDE_BITFIELD +/* linux/bitfield.h has been added in Linux 4.9 in upstream commit + * 3e9b3112ec74 ("add basic register-field manipulation macros") + */ +#define __bf_shf(x) (__builtin_ffsll(x) - 1) + +#define __BF_FIELD_CHECK(_mask, _reg, _val, _pfx) \ + ({ \ + BUILD_BUG_ON_MSG(!__builtin_constant_p(_mask), \ + _pfx "mask is not constant"); \ + BUILD_BUG_ON_MSG(!(_mask), _pfx "mask is zero"); \ + BUILD_BUG_ON_MSG(__builtin_constant_p(_val) ? \ + ~((_mask) >> __bf_shf(_mask)) & (_val) : 0, \ + _pfx "value too large for the field"); \ + BUILD_BUG_ON_MSG((_mask) > (typeof(_reg))~0ull, \ + _pfx "type of reg too small for mask"); \ + __BUILD_BUG_ON_NOT_POWER_OF_2((_mask) + \ + (1ULL << __bf_shf(_mask))); \ + }) + +/** + * FIELD_PREP() - prepare a bitfield element + * @_mask: shifted mask defining the field's length and position + * @_val: value to put in the field + * + * FIELD_PREP() masks and shifts up the value. The result should + * be combined with other fields of the bitfield using logical OR. + */ +#define FIELD_PREP(_mask, _val) \ + ({ \ + __BF_FIELD_CHECK(_mask, 0ULL, _val, "FIELD_PREP: "); \ + ((typeof(_mask))(_val) << __bf_shf(_mask)) & (_mask); \ + }) + +/** + * FIELD_GET() - extract a bitfield element + * @_mask: shifted mask defining the field's length and position + * @_reg: value of entire bitfield + * + * FIELD_GET() extracts the field specified by @_mask from the + * bitfield passed in as @_reg by masking and shifting it down. + */ +#define FIELD_GET(_mask, _reg) \ + ({ \ + __BF_FIELD_CHECK(_mask, _reg, 0U, "FIELD_GET: "); \ + (typeof(_mask))(((_reg) & (_mask)) >> __bf_shf(_mask)); \ + }) +#endif /* HAVE_INCLUDE_BITFIELD */ + +#ifdef NEED_BITFIELD_FIELD_MAX +/* linux/bitfield.h has FIELD_MAX added to it in Linux 5.7 in upstream + * commit e31a50162feb ("bitfield.h: add FIELD_MAX() and field_max()") + */ +/** + * FIELD_MAX() - produce the maximum value representable by a field + * @_mask: shifted mask defining the field's length and position + * + * FIELD_MAX() returns the maximum value that can be held in the field + * specified by @_mask. + */ +#define FIELD_MAX(_mask) \ + ({ \ + __BF_FIELD_CHECK(_mask, 0ULL, 0ULL, "FIELD_MAX: "); \ + (typeof(_mask))((_mask) >> __bf_shf(_mask)); \ + }) +#endif /* HAVE_BITFIELD_FIELD_MAX */ + +#ifdef NEED_BITFIELD_FIELD_FIT +/** + * FIELD_FIT() - check if value fits in the field + * @_mask: shifted mask defining the field's length and position + * @_val: value to test against the field + * + * Return: true if @_val can fit inside @_mask, false if @_val is too big. + */ +#define FIELD_FIT(_mask, _val) \ + ({ \ + __BF_FIELD_CHECK(_mask, 0ULL, 0ULL, "FIELD_FIT: "); \ + !((((typeof(_mask))_val) << __bf_shf(_mask)) & ~(_mask)); \ + }) +#endif /* NEED_BITFIELD_FIELD_FIT */ + +#ifdef NEED_BITFIELD_FIELD_MASK +/** + * linux/bitfield.h has field_mask() along with *_encode_bits() in 4.16: + * 00b0c9b82663 ("Add primitives for manipulating bitfields both in host and fixed-endian.") + * + */ +extern void __compiletime_error("value doesn't fit into mask") +__field_overflow(void); +extern void __compiletime_error("bad bitfield mask") +__bad_mask(void); +static __always_inline u64 field_multiplier(u64 field) +{ + if ((field | (field - 1)) & ((field | (field - 1)) + 1)) + __bad_mask(); + return field & -field; +} +static __always_inline u64 field_mask(u64 field) +{ + return field / field_multiplier(field); +} +#define ____MAKE_OP(type,base,to,from) \ +static __always_inline __##type type##_encode_bits(base v, base field) \ +{ \ + if (__builtin_constant_p(v) && (v & ~field_mask(field))) \ + __field_overflow(); \ + return to((v & field_mask(field)) * field_multiplier(field)); \ +} \ +static __always_inline __##type type##_replace_bits(__##type old, \ + base val, base field) \ +{ \ + return (old & ~to(field)) | type##_encode_bits(val, field); \ +} \ +static __always_inline void type##p_replace_bits(__##type *p, \ + base val, base field) \ +{ \ + *p = (*p & ~to(field)) | type##_encode_bits(val, field); \ +} \ +static __always_inline base type##_get_bits(__##type v, base field) \ +{ \ + return (from(v) & field)/field_multiplier(field); \ +} +#define __MAKE_OP(size) \ + ____MAKE_OP(le##size,u##size,cpu_to_le##size,le##size##_to_cpu) \ + ____MAKE_OP(be##size,u##size,cpu_to_be##size,be##size##_to_cpu) \ + ____MAKE_OP(u##size,u##size,,) +__MAKE_OP(16) +__MAKE_OP(32) +__MAKE_OP(64) +#undef __MAKE_OP +#undef ____MAKE_OP +#endif + +#ifdef NEED_BUILD_BUG_ON +/* Force a compilation error if a constant expression is not a power of 2 */ +#define __BUILD_BUG_ON_NOT_POWER_OF_2(n) \ + BUILD_BUG_ON(((n) & ((n) - 1)) != 0) + +/** + * BUILD_BUG_ON_MSG - break compile if a condition is true & emit supplied + * error message. + * @condition: the condition which the compiler should know is false. + * + * See BUILD_BUG_ON for description. + */ +#define BUILD_BUG_ON_MSG(cond, msg) compiletime_assert(!(cond), msg) + +/** + * BUILD_BUG_ON - break compile if a condition is true. + * @condition: the condition which the compiler should know is false. + * + * If you have some code which relies on certain constants being equal, or + * some other compile-time-evaluated condition, you should use BUILD_BUG_ON to + * detect if someone changes it. + */ +#define BUILD_BUG_ON(condition) \ + BUILD_BUG_ON_MSG(condition, "BUILD_BUG_ON failed: " #condition) +#endif /* NEED_BUILD_BUG_ON */ + +#ifdef NEED_IN_TASK +#define in_hardirq() (hardirq_count()) +#define in_serving_softirq() (softirq_count() & SOFTIRQ_OFFSET) +#define in_task() (!(in_nmi() | in_hardirq() | \ + in_serving_softirq())) +#endif /* NEED_IN_TASK */ + +/* + * NEED_NETIF_NAPI_ADD_NO_WEIGHT + * + * Upstream commit b48b89f9c189 ("net: drop the weight argument from + * netif_napi_add") removes weight argument from function call. + * + * Our drivers always used default weight, which is 64. + * + * Define NEED_NETIF_NAPI_ADD_NO_WEIGHT on kernels 3.10+ to use old + * implementation. Undef for 6.1+ where new function was introduced. + * RedHat 9.2 required using no weight parameter option. + */ +#ifdef NEED_NETIF_NAPI_ADD_NO_WEIGHT +static inline void +_kc_netif_napi_add(struct net_device *dev, struct napi_struct *napi, + int (*poll)(struct napi_struct *, int)) +{ + return netif_napi_add(dev, napi, poll, NAPI_POLL_WEIGHT); +} + +/* RHEL7 complains about redefines. Undef first, then define compat wrapper */ +#ifdef netif_napi_add +#undef netif_napi_add +#endif +#define netif_napi_add _kc_netif_napi_add +#endif /* NEED_NETIF_NAPI_ADD_NO_WEIGHT */ + +/* + * NEED_ETHTOOL_SPRINTF + * + * Upstream commit 7888fe53b706 ("ethtool: Add common function for filling out + * strings") introduced ethtool_sprintf, which landed in Linux v5.13 + * + * The function implementation is moved to kcompat.c since the compiler + * complains it can never be inlined for the function with variable argument + * lists. + */ +#ifdef NEED_ETHTOOL_SPRINTF +__printf(2, 3) void ethtool_sprintf(u8 **data, const char *fmt, ...); +#endif /* NEED_ETHTOOL_SPRINTF */ + +/* + * NEED_SYSFS_MATCH_STRING + * + * Upstream commit e1fe7b6a7b37 ("lib/string: add sysfs_match_string helper") + * introduced a helper for looking up strings in an array - it's pure algo stuff + * that is easy to backport if needed. + * Instead of covering sysfs_streq() by yet another flag just copy it. + */ +#ifdef NEED_SYSFS_MATCH_STRING +/* + * sysfs_streq - return true if strings are equal, modulo trailing newline + * @s1: one string + * @s2: another string + * + * This routine returns true iff two strings are equal, treating both + * NUL and newline-then-NUL as equivalent string terminations. It's + * geared for use with sysfs input strings, which generally terminate + * with newlines but are compared against values without newlines. + */ +static inline bool _kc_sysfs_streq(const char *s1, const char *s2) +{ + while (*s1 && *s1 == *s2) { + s1++; + s2++; + } + + if (*s1 == *s2) + return true; + if (!*s1 && *s2 == '\n' && !s2[1]) + return true; + if (*s1 == '\n' && !s1[1] && !*s2) + return true; + return false; +} + +/* + * __sysfs_match_string - matches given string in an array + * @array: array of strings + * @n: number of strings in the array or -1 for NULL terminated arrays + * @str: string to match with + * + * Returns index of @str in the @array or -EINVAL, just like match_string(). + * Uses sysfs_streq instead of strcmp for matching. + * + * This routine will look for a string in an array of strings up to the + * n-th element in the array or until the first NULL element. + * + * Historically the value of -1 for @n, was used to search in arrays that + * are NULL terminated. However, the function does not make a distinction + * when finishing the search: either @n elements have been compared OR + * the first NULL element was found. + */ +static inline int _kc___sysfs_match_string(const char * const *array, size_t n, + const char *str) +{ + const char *item; + int index; + + for (index = 0; index < n; index++) { + item = array[index]; + if (!item) + break; + if (sysfs_streq(item, str)) + return index; + } + + return -EINVAL; +} + +#define sysfs_match_string(_a, _s) \ + _kc___sysfs_match_string(_a, ARRAY_SIZE(_a), _s) + +#endif /* NEED_SYSFS_MATCH_STRING */ + +/* + * NEED_SYSFS_EMIT + * + * Upstream introduced following function in + * commit 2efc459d06f1 ("sysfs: Add sysfs_emit and sysfs_emit_at to format sysfs output") + * + * The function implementation is moved to kcompat.c since the compiler + * complains it can never be inlined for the function with variable argument + * lists. + */ +#ifdef NEED_SYSFS_EMIT +__printf(2, 3) int sysfs_emit(char *buf, const char *fmt, ...); +#endif /* NEED_SYSFS_EMIT */ + +/* + * HAVE_U64_STATS_FETCH_BEGIN_IRQ + * HAVE_U64_STATS_FETCH_RETRY_IRQ + * + * Upstream commit 44b0c2957adc ("u64_stats: Streamline the implementation") + * marks u64_stats_fetch_begin_irq() and u64_stats_fetch_retry_irq() + * as obsolete. Their functionality is combined with: u64_stats_fetch_begin() + * and u64_stats_fetch_retry(). + * + * Upstream commit dec5efcffad4 ("u64_stat: Remove the obsolete fetch_irq() + * variants.") removes u64_stats_fetch_begin_irq() and + * u64_stats_fetch_retry_irq(). + * + * Map u64_stats_fetch_begin() and u64_stats_fetch_retry() to the _irq() + * variants on the older kernels to allow the same driver code working on + * both old and new kernels. + */ +#ifdef HAVE_U64_STATS_FETCH_BEGIN_IRQ +#define u64_stats_fetch_begin _kc_u64_stats_fetch_begin + +static inline unsigned int +_kc_u64_stats_fetch_begin(const struct u64_stats_sync *syncp) +{ + return u64_stats_fetch_begin_irq(syncp); +} +#endif /* HAVE_U64_STATS_FETCH_BEGIN_IRQ */ + +#ifdef HAVE_U64_STATS_FETCH_RETRY_IRQ +#define u64_stats_fetch_retry _kc_u64_stats_fetch_retry + +static inline bool +_kc_u64_stats_fetch_retry(const struct u64_stats_sync *syncp, + unsigned int start) +{ + return u64_stats_fetch_retry_irq(syncp, start); +} +#endif /* HAVE_U64_STATS_FETCH_RETRY_IRQ */ + +/* + * NEED_U64_STATS_READ + * NEED_U64_STATS_SET + * + * Upstream commit 316580b69d0 ("u64_stats: provide u64_stats_t type") + * introduces the u64_stats_t data type and other helper APIs to read, + * add and increment the stats, in Linux v5.5. Support them on older kernels + * as well. + * + * Upstream commit f2efdb179289 ("u64_stats: Introduce u64_stats_set()") + * introduces u64_stats_set API to set the u64_stats_t variable with the + * value provided, in Linux v5.16. Add support for older kernels. + */ +#ifdef NEED_U64_STATS_READ +#if BITS_PER_LONG == 64 +#include + +typedef struct { + local64_t v; +} u64_stats_t; + +static inline u64 u64_stats_read(u64_stats_t *p) +{ + return local64_read(&p->v); +} + +static inline void u64_stats_add(u64_stats_t *p, unsigned long val) +{ + local64_add(val, &p->v); +} + +static inline void u64_stats_inc(u64_stats_t *p) +{ + local64_inc(&p->v); +} +#else +typedef struct { + u64 v; +} u64_stats_t; + +static inline u64 u64_stats_read(u64_stats_t *p) +{ + return p->v; +} + +static inline void u64_stats_add(u64_stats_t *p, unsigned long val) +{ + p->v += val; +} + +static inline void u64_stats_inc(u64_stats_t *p) +{ + p->v++; +} +#endif /* BITS_PER_LONG == 64 */ +#endif /* NEED_U64_STATS_READ */ + +#ifdef NEED_U64_STATS_SET +#if BITS_PER_LONG == 64 +static inline void u64_stats_set(u64_stats_t *p, u64 val) +{ + local64_set(&p->v, val); +} +#else +static inline void u64_stats_set(u64_stats_t *p, u64 val) +{ + p->v = val; +} +#endif /* BITS_PER_LONG == 64 */ +#endif /* NEED_U64_STATS_SET */ + +/* + * NEED_DEVM_KFREE + * NEED_DEVM_KZALLOC + * + * Upstream commit 9ac7849e35f7 ("devres: device resource management") + * Implement device resource management to allocate and free the resource + * for driver + */ +#ifdef NEED_DEVM_KFREE +#define devm_kfree(dev, p) kfree(p) +#else +/* Since commit 0571967dfb5d ("devres: constify p in devm_kfree()") the + * devm_kfree function has accepted a const void * parameter. Since commit + * cad064f1bd52 ("devres: handle zero size in devm_kmalloc()"), it has also + * accepted a NULL pointer safely. However, the null pointer acceptance is in + * devres.c and thus cannot be checked by kcompat-generator.sh. To handle + * this, unconditionally replace devm_kfree with a variant that both accepts + * a const void * pointer and handles a NULL value correctly. + */ +static inline void _kc_devm_kfree(struct device *dev, const void *p) +{ + if (p) + devm_kfree(dev, (void *)p); +} +#define devm_kfree _kc_devm_kfree +#endif /* NEED_DEVM_KFREE */ + +#ifdef NEED_DEVM_KZALLOC +#define devm_kzalloc(dev, size, flags) kzalloc(size, flags) +#endif /* NEED_DEVM_KZALLOC */ + +#ifdef NEED_DEVM_KCALLOC +/* NEED_DEVM_KCALLOC + * + * Since commit 64c862a839a8 ("devres: add kernel standard devm_k.alloc + * functions"), the kernel has provided several devres variants of the + * standard allocation functions. + */ +#define devm_kcalloc(dev, cnt, size, flags) \ + devm_kzalloc(dev, array_size((cnt), (size)), flags) +#endif /* NEED_DEVM_KCALLOC */ + +#ifdef NEED_DEVM_KSTRDUP +/* NEED_DEVM_KSTRDUP + * + * devm_kstrdup was introduced upstream by commit e31108cad3de ("devres: + * introduce API "devm_kstrdup""). + */ +char *_kc_devm_kstrdup(struct device *dev, const char *s, gfp_t gfp); +#define devm_kstrdup(dev, s, gfp) _kc_devm_kstrdup(dev, s, gfp) +#endif /* NEED_DEVM_KSTRDUP */ + +#ifdef NEED_DEVM_KMEMDUP +/* NEED_DEVM_KMEMDUP + * + * devm_kmemdup was introduced upstream by commit 3046365bb470 ("devres: + * introduce API "devm_kmemdup"). + */ +void *_kc_devm_kmemdup(struct device *dev, const void *src, size_t len, + gfp_t gfp); +#define devm_kmemdup _kc_devm_kmemdup +#endif /* NEED_DEVM_KMEMDUP */ + +/* NEED_DIFF_BY_SCALED_PPM + * + * diff_by_scaled_ppm and adjust_by_scaled_ppm were introduced in + * kernel 6.1 by upstream commit 1060707e3809 ("ptp: introduce helpers + * to adjust by scaled parts per million"). + */ +#ifdef NEED_DIFF_BY_SCALED_PPM +static inline bool +diff_by_scaled_ppm(u64 base, long scaled_ppm, u64 *diff) +{ + bool negative = false; + + if (scaled_ppm < 0) { + negative = true; + scaled_ppm = -scaled_ppm; + } + + *diff = mul_u64_u64_div_u64(base, (u64)scaled_ppm, + 1000000ULL << 16); + + return negative; +} + +static inline u64 +adjust_by_scaled_ppm(u64 base, long scaled_ppm) +{ + u64 diff; + + if (diff_by_scaled_ppm(base, scaled_ppm, &diff)) + return base - diff; + + return base + diff; +} +#endif /* NEED_DIFF_BY_SCALED_PPM */ + +#ifndef HAVE_PCI_MSIX_CAN_ALLOC_DYN +static inline bool pci_msix_can_alloc_dyn(struct pci_dev __always_unused *dev) +{ + return false; +} +#endif /* !HAVE_PCI_MSIX_CAN_ALLOC_DYN */ + +#if !defined(HAVE_PCI_MSIX_ALLOC_IRQ_AT) && !defined(HAVE_PCI_MSIX_FREE_IRQ) +struct msi_map { + int index; + int virq; +}; +#endif /* !HAVE_PCI_MSIX_ALLOC_IRQ_AT && !HAVE_PCI_MSIX_FREE_IRQ */ + +#ifndef HAVE_PCI_MSIX_ALLOC_IRQ_AT +#define MSI_ANY_INDEX UINT_MAX +struct irq_affinity_desc; + +static inline struct msi_map +pci_msix_alloc_irq_at(struct pci_dev __always_unused *dev, + unsigned int __always_unused index, + const struct irq_affinity_desc __always_unused *affdesc) +{ + struct msi_map map = { .index = -ENOTSUPP }; + return map; +} +#endif /* !HAVE_PCI_MSIX_ALLOC_IRQ_AT */ + +#ifndef HAVE_PCI_MSIX_FREE_IRQ +static inline void +pci_msix_free_irq(struct pci_dev __always_unused *dev, + struct msi_map __always_unused map) +{ +} +#endif /* !HAVE_PCI_MSIX_FREE_IRQ */ + +#ifdef NEED_PCIE_PTM_ENABLED +/* NEED_PCIE_PTM_ENABLED + * + * pcie_ptm_enabled was added by upstream commit 014408cd624e + * ("PCI: Add pcie_ptm_enabled()"). + * + * It is easy to implement directly. + */ +static inline bool pcie_ptm_enabled(struct pci_dev *dev) +{ +#if defined(HAVE_STRUCT_PCI_DEV_PTM_ENABLED) && defined(CONFIG_PCIE_PTM) + if (!dev) + return false; + + return dev->ptm_enabled; +#else /* !HAVE_STRUCT_PCI_DEV_PTM_ENABLED || !CONFIG_PCIE_PTM */ + return false; +#endif /* HAVE_STRUCT_PCI_DEV_PTM_ENBED && CONFIG_PCIE_PTM */ +} +#endif /* NEED_PCIE_PTM_ENABLED */ + +/* NEED_PCI_ENABLE_PTM + * + * commit ac6c26da29c1 made this function private + * commit 1d71eb53e451 made this function public again + * This declares/defines the function for kernels missing it in linux/pci.h + */ +#ifdef NEED_PCI_ENABLE_PTM +#ifdef CONFIG_PCIE_PTM +int pci_enable_ptm(struct pci_dev *dev, u8 *granularity); +#else +static inline int pci_enable_ptm(struct pci_dev *dev, u8 *granularity) +{ return -EINVAL; } +#endif /* CONFIG_PCIE_PTM */ +#endif /* NEED_PCI_ENABLE_PTM */ + +#ifdef NEED_PCI_DISABLE_PTM +/* NEED_PCI_DISABLE_PTM + * + * This declares/defines the function for kernels missing it in linux/pci.h + */ +void pci_disable_ptm(struct pci_dev *dev); +#endif /* NEED_PCI_DISABLE_PTM */ + +/* NEED_PCIE_FLR + * NEED_PCIE_FLR_RETVAL + * + * pcie_flr() was added in the past, but wasn't generally available until 4.12 + * commit a60a2b73ba69 (4.12) made this function available as an extern + * commit 91295d79d658 (4.17) made this function return int instead of void + + * This declares/defines the function for kernels missing it or needing a + * retval in linux/pci.h + */ +#ifdef NEED_PCIE_FLR +static inline int pcie_flr(struct pci_dev *dev) +{ + u32 cap; + + pcie_capability_read_dword(dev, PCI_EXP_DEVCAP, &cap); + if (!(cap & PCI_EXP_DEVCAP_FLR)) + return -ENOTTY; + + if (!pci_wait_for_pending_transaction(dev)) + dev_err(&dev->dev, "timed out waiting for pending transaction; performing function level reset anyway\n"); + + pcie_capability_set_word(dev, PCI_EXP_DEVCTL, PCI_EXP_DEVCTL_BCR_FLR); + msleep(100); + return 0; +} +#endif /* NEED_PCIE_FLR */ +#ifdef NEED_PCIE_FLR_RETVAL +static inline int _kc_pcie_flr(struct pci_dev *dev) +{ + pcie_flr(dev); + return 0; +} +#define pcie_flr(dev) _kc_pcie_flr((dev)) +#endif /* NEED_PCIE_FLR_RETVAL */ + +/* NEED_DEV_PAGE_IS_REUSABLE + * + * dev_page_is_reusable was introduced by + * commit bc38f30f8dbc ("net: introduce common dev_page_is_reusable()") + * + * This function is trivial to re-implement in full. + */ +#ifdef NEED_DEV_PAGE_IS_REUSABLE +static inline bool dev_page_is_reusable(struct page *page) +{ + return likely(page_to_nid(page) == numa_mem_id() && + !page_is_pfmemalloc(page)); +} +#endif /* NEED_DEV_PAGE_IS_REUSABLE */ + +#ifdef NEED_NAPI_ALLOC_SKB +static inline +struct sk_buff *kc_napi_alloc_skb(struct napi_struct *napi, unsigned int len) +{ + return __napi_alloc_skb(napi, len, GFP_ATOMIC | __GFP_NOWARN); +} + +#define napi_alloc_skb(napi, len) kc_napi_alloc_skb(napi, len) +#endif /* NEED_NAPI_ALLOC_SKB */ + +/* NEED_NAPI_BUILD_SKB + * + * napi_build_skb was introduced by + * commit f450d539c05a: ("skbuff: introduce {,__}napi_build_skb() which reuses NAPI cache heads") + * + * This function is a more efficient version of build_skb(). + */ +#ifdef NEED_NAPI_BUILD_SKB +static inline +struct sk_buff *napi_build_skb(void *data, unsigned int frag_size) +{ + return build_skb(data, frag_size); +} +#endif /* NEED_NAPI_BUILD_SKB */ + +/* NEED_DEBUGFS_LOOKUP + * + * Old RHELs (7.2-7.4) do not have this backported. Create a stub and always + * return NULL. Should not affect important features workflow and allows the + * driver to compile on older kernels. + */ +#ifdef NEED_DEBUGFS_LOOKUP + +#include + +static inline struct dentry * +debugfs_lookup(const char *name, struct dentry *parent) +{ + return NULL; +} +#endif /* NEED_DEBUGFS_LOOKUP */ + +/* NEED_DEBUGFS_LOOKUP_AND_REMOVE + * + * Upstream commit dec9b2f1e0455("debugfs: add debugfs_lookup_and_remove()") + * + * Should work the same as upstream equivalent. + */ +#ifdef NEED_DEBUGFS_LOOKUP_AND_REMOVE + +#include + +static inline void +debugfs_lookup_and_remove(const char *name, struct dentry *parent) +{ + struct dentry *dentry; + + dentry = debugfs_lookup(name, parent); + if (!dentry) + return; + + debugfs_remove(dentry); + dput(dentry); +} +#endif /* NEED_DEBUGFS_LOOKUP_AND_REMOVE */ + +/* NEED_FS_FILE_DENTRY + * + * this is simple impl of file_dentry() (introduced in v4.6, backported to + * stable mainline 4.5 and 4.6 kernels) + * + * prior to file_dentry() existence logic of this function was open-coded, + * and if given kernel has had not backported it, then "oversimplification bugs" + * are present there anyway. + */ +#ifdef NEED_FS_FILE_DENTRY +static inline struct dentry *file_dentry(const struct file *file) +{ + return file->f_path.dentry; +} +#endif /* NEED_FS_FILE_DENTRY */ + +/* NEED_CLASS_CREATE_WITHOUT_OWNER + * + * Upstream removed owner argument form helper macro class_create in + * 1aaba11da9aa ("remove module * from class_create()") + * + * In dcfbb67e48a2 ("use lock_class_key already present in struct subsys_private") + * the macro was removed completely. + * + * class_create no longer has owner/module param as it was not used. + */ +#ifdef NEED_CLASS_CREATE_WITHOUT_OWNER +static inline struct class *_kc_class_create(const char *name) +{ + return class_create(THIS_MODULE, name); +} +#ifdef class_create +#undef class_create +#endif +#define class_create _kc_class_create +#endif /* NEED_CLASS_CREATE_WITHOUT_OWNER */ + +/* NEED_LOWER_16_BITS and NEED_UPPER_16_BITS + * + * Upstream commit 03cb4473be92 ("ice: add low level PTP clock access + * functions") introduced the lower_16_bits() and upper_16_bits() macros. They + * are straight forward to implement if missing. + */ +#ifdef NEED_LOWER_16_BITS +#define lower_16_bits(n) ((u16)((n) & 0xffff)) +#endif /* NEED_LOWER_16_BITS */ + +#ifdef NEED_UPPER_16_BITS +#define upper_16_bits(n) ((u16)((n) >> 16)) +#endif /* NEED_UPPER_16_BITS */ + +#ifdef NEED_HWMON_CHANNEL_INFO +#define HWMON_CHANNEL_INFO(stype, ...) \ + (&(struct hwmon_channel_info) { \ + .type = hwmon_##stype, \ + .config = (u32 []) { \ + __VA_ARGS__, 0 \ + } \ + }) +#endif /* NEED_HWMON_CHANNEL_INFO */ + +/* NEED_ASSIGN_BIT + * + * Upstream commit 5307e2ad69ab ("bitops: Introduce assign_bit()") added helper + * assign_bit() to replace if check for setting/clearing bits. + */ +#ifdef NEED_ASSIGN_BIT +static inline void assign_bit(long nr, unsigned long *addr, bool value) +{ + if (value) + set_bit(nr, addr); + else + clear_bit(nr, addr); +} +#endif /* NEED_ASSIGN_BIT */ + +/* + * __has_builtin is supported on gcc >= 10, clang >= 3 and icc >= 21. + * In the meantime, to support gcc < 10, we implement __has_builtin + * by hand. + */ +#ifndef __has_builtin +#define __has_builtin(x) (0) +#endif + +/* NEED___STRUCT_SIZE + * + * 9f7d69c5cd23 ("fortify: Convert to struct vs member helpers") of kernel v6.2 + * has added two following macros, one of them used by DEFINE_FLEX() + */ +#ifdef NEED___STRUCT_SIZE +/* + * When the size of an allocated object is needed, use the best available + * mechanism to find it. (For cases where sizeof() cannot be used.) + */ +#if __has_builtin(__builtin_dynamic_object_size) +#define __struct_size(p) __builtin_dynamic_object_size(p, 0) +#define __member_size(p) __builtin_dynamic_object_size(p, 1) +#else +#define __struct_size(p) __builtin_object_size(p, 0) +#define __member_size(p) __builtin_object_size(p, 1) +#endif +#endif /* NEED___STRUCT_SIZE */ + +/* NEED_KREALLOC_ARRAY + * + * krealloc_array was added by upstream commit + * f0dbd2bd1c22 ("mm: slab: provide krealloc_array()"). + * + * For older kernels, add a new API wrapper around krealloc(). + */ +#ifdef NEED_KREALLOC_ARRAY +static inline void *__must_check krealloc_array(void *p, + size_t new_n, + size_t new_size, + gfp_t flags) +{ + size_t bytes; + + if (unlikely(check_mul_overflow(new_n, new_size, &bytes))) + return NULL; + + return krealloc(p, bytes, flags); +} +#endif /* NEED_KREALLOC_ARRAY */ + +/* NEED_KMEM_CACHE_ALLOC_LRU + * + * Added in commit 88f2ef73fd66 ("mm: introduce kmem_cache_alloc_lru"), + * later changed to macro. + * + * This improves memory usage, and fallbacks to old impl when lru is NULL, + * or just when non "_lru" variant is called. We will do that. + */ +#ifdef NEED_KMEM_CACHE_ALLOC_LRU +static inline void * +kmem_cache_alloc_lru(struct kmem_cache *s, struct list_lru *lru, gfp_t gfpflags) +{ + return kmem_cache_alloc(s, gfpflags); +} +#endif /* NEED_KMEM_CACHE_ALLOC_LRU */ + +/* NEED_XDP_DO_FLUSH + * + * Upstream commit 1d233886dd90 ("xdp: Use bulking for non-map XDP_REDIRECT + * and consolidate code paths") replaced xdp_do_flush_map with xdp_do_flush + * and 7f04bd109d4c ("net: Tree wide: Replace xdp_do_flush_map() with + * xdp_do_flush()") cleaned up related code. + */ +#ifdef NEED_XDP_DO_FLUSH +static inline void xdp_do_flush(void) +{ + xdp_do_flush_map(); +} +#endif /* NEED_XDP_DO_FLUSH */ + +#ifdef NEED_XDP_FEATURES +enum netdev_xdp_act { + NETDEV_XDP_ACT_BASIC = 1, + NETDEV_XDP_ACT_REDIRECT = 2, + NETDEV_XDP_ACT_NDO_XMIT = 4, + NETDEV_XDP_ACT_XSK_ZEROCOPY = 8, + NETDEV_XDP_ACT_HW_OFFLOAD = 16, + NETDEV_XDP_ACT_RX_SG = 32, + NETDEV_XDP_ACT_NDO_XMIT_SG = 64, + + NETDEV_XDP_ACT_MASK = 127, +}; + +typedef u32 xdp_features_t; + +static inline void +xdp_set_features_flag(struct net_device *dev, xdp_features_t val) +{ +} + +static inline void xdp_clear_features_flag(struct net_device *dev) +{ +} + +static inline void +xdp_features_set_redirect_target(struct net_device *dev, bool support_sg) +{ +} + +static inline void xdp_features_clear_redirect_target(struct net_device *dev) +{ +} +#endif /* NEED_XDP_FEATURES */ + +#ifdef NEED_FIND_NEXT_BIT_WRAP +/* NEED_FIND_NEXT_BIT_WRAP + * + * The find_next_bit_wrap function was added by commit 6cc18331a987 + * ("lib/find_bit: add find_next{,_and}_bit_wrap") + * + * For older kernels, define find_next_bit_wrap function that calls + * find_next_bit function and find_first_bit macro. + */ +static inline +unsigned long find_next_bit_wrap(const unsigned long *addr, + unsigned long size, unsigned long offset) +{ + unsigned long bit = find_next_bit(addr, size, offset); + + if (bit < size) + return bit; + + bit = find_first_bit(addr, offset); + return bit < offset ? bit : size; +} +#endif /* NEED_FIND_NEXT_BIT_WRAP */ + +#ifdef NEED_IS_CONSTEXPR +/* __is_constexpr() macro has moved acros 3 upstream kernel headers: + * commit 3c8ba0d61d04 ("kernel.h: Retain constant expression output for max()/min()") + * introduced it in kernel.h, for kernel v4.17 + * commit b296a6d53339 ("kernel.h: split out min()/max() et al. helpers") moved + * it to minmax.h; + * commit f747e6667ebb ("linux/bits.h: fix compilation error with GENMASK") + * moved it to its current location of const.h + */ +/* + * This returns a constant expression while determining if an argument is + * a constant expression, most importantly without evaluating the argument. + * Glory to Martin Uecker + */ +#define __is_constexpr(x) \ + (sizeof(int) == sizeof(*(8 ? ((void *)((long)(x) * 0l)) : (int *)8))) +#endif /* NEED_IS_CONSTEXPR */ + +/* NEED_DECLARE_FLEX_ARRAY + * + * Upstream commit 3080ea5553 ("stddef: Introduce DECLARE_FLEX_ARRAY() helper") + * introduces DECLARE_FLEX_ARRAY to support flexible arrays in unions or + * alone in a structure. + */ +#ifdef NEED_DECLARE_FLEX_ARRAY +#define DECLARE_FLEX_ARRAY(TYPE, NAME) \ + struct { \ + struct { } __empty_ ## NAME; \ + TYPE NAME[]; \ + } +#endif /* NEED_DECLARE_FLEX_ARRAY */ + +#ifdef NEED_LIST_COUNT_NODES +/* list_count_nodes was added as part of the list.h API by commit 4d70c74659d9 + * ("i915: Move list_count() to list.h as list_count_nodes() for broader use") + * This landed in Linux v6.3 + * + * Its straightforward to directly implement the basic loop. + */ +static inline size_t list_count_nodes(struct list_head *head) +{ + struct list_head *pos; + size_t count = 0; + + list_for_each(pos, head) + count++; + + return count; +} +#endif /* NEED_LIST_COUNT_NODES */ +#ifdef NEED_STATIC_ASSERT +/* + * NEED_STATIC_ASSERT Introduced with upstream commit 6bab69c6501 + * ("build_bug.h: add wrapper for _Static_assert") + * * Available for kernels >= 5.1 + * + * Macro for _Static_assert GCC keyword (C11) + */ +#define static_assert(expr, ...) __static_assert(expr, ##__VA_ARGS__, #expr) +#define __static_assert(expr, msg, ...) _Static_assert(expr, msg) +#endif /* NEED_STATIC_ASSERT */ + +#ifdef NEED_ETH_TYPE_VLAN +#include +/** + * eth_type_vlan was added in commit fe19c4f971a5 ("lan: Check for vlan ethernet + * types for 8021.q or 802.1ad"). + * + * eth_type_vlan - check for valid vlan ether type. + * @ethertype: ether type to check + * + * Returns true if the ether type is a vlan ether type. + */ +static inline bool eth_type_vlan(__be16 ethertype) +{ + switch (ethertype) { + case htons(ETH_P_8021Q): + case htons(ETH_P_8021AD): + return true; + default: + return false; + } +} +#endif /* NEED_ETH_TYPE_VLAN */ + +#ifdef NEED___STRUCT_GROUP +/** + * __struct_group() - Create a mirrored named and anonyomous struct + * + * @TAG: The tag name for the named sub-struct (usually empty) + * @NAME: The identifier name of the mirrored sub-struct + * @ATTRS: Any struct attributes (usually empty) + * @MEMBERS: The member declarations for the mirrored structs + * + * Used to create an anonymous union of two structs with identical layout + * and size: one anonymous and one named. The former's members can be used + * normally without sub-struct naming, and the latter can be used to + * reason about the start, end, and size of the group of struct members. + * The named struct can also be explicitly tagged for layer reuse, as well + * as both having struct attributes appended. + */ +#define __struct_group(TAG, NAME, ATTRS, MEMBERS...) \ + union { \ + struct { MEMBERS } ATTRS; \ + struct TAG { MEMBERS } ATTRS NAME; \ + } +#endif /* NEED___STRUCT_GROUP */ + +#ifdef NEED_STRUCT_GROUP +/** + * struct_group() - Wrap a set of declarations in a mirrored struct + * + * @NAME: The identifier name of the mirrored sub-struct + * @MEMBERS: The member declarations for the mirrored structs + * + * Used to create an anonymous union of two structs with identical + * layout and size: one anonymous and one named. The former can be + * used normally without sub-struct naming, and the latter can be + * used to reason about the start, end, and size of the group of + * struct members. + */ +#define struct_group(NAME, MEMBERS...) \ + __struct_group(/* no tag */, NAME, /* no attrs */, MEMBERS) + +/** + * struct_group_tagged() - Create a struct_group with a reusable tag + * + * @TAG: The tag name for the named sub-struct + * @NAME: The identifier name of the mirrored sub-struct + * @MEMBERS: The member declarations for the mirrored structs + * + * Used to create an anonymous union of two structs with identical + * layout and size: one anonymous and one named. The former can be + * used normally without sub-struct naming, and the latter can be + * used to reason about the start, end, and size of the group of + * struct members. Includes struct tag argument for the named copy, + * so the specified layout can be reused later. + */ +#define struct_group_tagged(TAG, NAME, MEMBERS...) \ + __struct_group(TAG, NAME, /* no attrs */, MEMBERS) +#endif /* NEED_STRUCT_GROUP */ + +#ifdef NEED_READ_POLL_TIMEOUT +/* + * 5f5323a14cad ("iopoll: introduce read_poll_timeout macro") + * Added in kernel 5.8 + */ +#define read_poll_timeout(op, val, cond, sleep_us, timeout_us, \ + sleep_before_read, args...) \ +({ \ + u64 __timeout_us = (timeout_us); \ + unsigned long __sleep_us = (sleep_us); \ + ktime_t __timeout = ktime_add_us(ktime_get(), __timeout_us); \ + might_sleep_if((__sleep_us) != 0); \ + if (sleep_before_read && __sleep_us) \ + usleep_range((__sleep_us >> 2) + 1, __sleep_us); \ + for (;;) { \ + (val) = op(args); \ + if (cond) \ + break; \ + if (__timeout_us && \ + ktime_compare(ktime_get(), __timeout) > 0) { \ + (val) = op(args); \ + break; \ + } \ + if (__sleep_us) \ + usleep_range((__sleep_us >> 2) + 1, __sleep_us); \ + cpu_relax(); \ + } \ + (cond) ? 0 : -ETIMEDOUT; \ +}) + +#endif /* NEED_READ_POLL_TIMEOUT */ +#ifdef NEED_READ_POLL_TIMEOUT_ATOMIC +#define read_poll_timeout_atomic(op, val, cond, delay_us, timeout_us, \ + delay_before_read, args...) \ +({ \ + u64 __timeout_us = (timeout_us); \ + s64 __left_ns = __timeout_us * NSEC_PER_USEC; \ + unsigned long __delay_us = (delay_us); \ + u64 __delay_ns = __delay_us * NSEC_PER_USEC; \ + if (delay_before_read && __delay_us) { \ + udelay(__delay_us); \ + if (__timeout_us) \ + __left_ns -= __delay_ns; \ + } \ + for (;;) { \ + (val) = op(args); \ + if (cond) \ + break; \ + if (__timeout_us && __left_ns < 0) { \ + (val) = op(args); \ + break; \ + } \ + if (__delay_us) { \ + udelay(__delay_us); \ + if (__timeout_us) \ + __left_ns -= __delay_ns; \ + } \ + cpu_relax(); \ + if (__timeout_us) \ + __left_ns--; \ + } \ + (cond) ? 0 : -ETIMEDOUT; \ +}) +#endif /* NEED_READ_POLL_TIMEOUT_ATOMIC */ +#if !defined(NEED_READ_POLL_TIMEOUT) || !defined(NEED_READ_POLL_TIMEOUT_ATOMIC) +#include +#endif /* !NEED_READ_POLL_TIMEOUT || !NEED_READ_POLL_TIMEOUT_ATOMIC */ + +#ifndef HAVE_DPLL_LOCK_STATUS_ERROR +/* Copied from include/uapi/linux/dpll.h to have common dpll status enums + * between sysfs and dpll subsystem based solutions. + * cf4f0f1e1c465 ("dpll: extend uapi by lock status error attribute") + * Added in kernel 6.9 + */ +enum dpll_lock_status_error { + DPLL_LOCK_STATUS_ERROR_NONE = 1, + DPLL_LOCK_STATUS_ERROR_UNDEFINED, + DPLL_LOCK_STATUS_ERROR_MEDIA_DOWN, + DPLL_LOCK_STATUS_ERROR_FRACTIONAL_FREQUENCY_OFFSET_TOO_HIGH, + + /* private: */ + __DPLL_LOCK_STATUS_ERROR_MAX, + DPLL_LOCK_STATUS_ERROR_MAX = (__DPLL_LOCK_STATUS_ERROR_MAX - 1) +}; + +#endif /* HAVE_DPLL_LOCK_STATUS_ERROR */ + +#ifdef NEED_DPLL_NETDEV_PIN_SET +#define dpll_netdev_pin_set netdev_dpll_pin_set +#define dpll_netdev_pin_clear netdev_dpll_pin_clear +#endif /* NEED_DPLL_NETDEV_PIN_SET */ + +#ifdef NEED_RADIX_TREE_EMPTY +static inline bool radix_tree_empty(struct radix_tree_root *root) +{ + return !root->rnode; +} +#endif /* NEED_RADIX_TREE_EMPTY */ + +#ifdef NEED_SET_SCHED_FIFO +/* + * 7318d4cc14c8 ("sched: Provide sched_set_fifo()") + * Added in kernel 5.9, + * converted to a macro for kcompat + */ +#include + +#ifdef NEED_SCHED_PARAM +#include +#endif /* NEED_SCHED_PARAM */ +#ifdef NEED_RT_H +#include +#else/* NEED_RT_H */ +#include +#endif /* NEED_RT_H */ +#define sched_set_fifo(p) \ +({ \ + struct sched_param sp = { .sched_priority = MAX_RT_PRIO / 2 }; \ + \ + WARN_ON_ONCE(sched_setscheduler_nocheck((p), SCHED_FIFO,&sp) != 0);\ +}) +#endif /* NEED_SET_SCHED_FIFO */ + +#ifndef HAVE_ETHTOOL_KEEE +#ifndef __ETHTOOL_DECLARE_LINK_MODE_MASK +#define __ETHTOOL_DECLARE_LINK_MODE_MASK(name) \ + DECLARE_BITMAP(name, __ETHTOOL_LINK_MODE_MASK_NBITS) +#endif /* __ETHTOOL_DECLARE_LINK_MODE_MASK */ +struct ethtool_keee { + __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); + __ETHTOOL_DECLARE_LINK_MODE_MASK(advertised); + __ETHTOOL_DECLARE_LINK_MODE_MASK(lp_advertised); + u32 tx_lpi_timer; + bool tx_lpi_enabled; + bool eee_active; + bool eee_enabled; +}; + +void eee_to_keee(struct ethtool_keee *keee, + const struct ethtool_eee *eee); + +void ethtool_convert_legacy_u32_to_link_mode(unsigned long *dst, + u32 legacy_u32); +bool ethtool_convert_link_mode_to_legacy_u32(u32 *legacy_u32, + const unsigned long *src); +bool ethtool_eee_use_linkmodes(const struct ethtool_keee *eee); + +void keee_to_eee(struct ethtool_eee *eee, + const struct ethtool_keee *keee); + +#ifndef HAVE_MII_EEE_CAP1_MOD_LINKMODE +#include +#define _kc_linkmode_mod_bit(_nr, _addr, set) do {\ + const int nr = _nr; \ + unsigned long *addr = _addr; \ + if (set) \ + set_bit(nr, addr); \ + else \ + clear_bit(nr, addr); \ + } while (false) + +static inline void mii_eee_cap1_mod_linkmode_t(unsigned long *adv, u32 val) +{ + _kc_linkmode_mod_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, + adv, val & MDIO_EEE_100TX); + _kc_linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, + adv, val & MDIO_EEE_1000T); + _kc_linkmode_mod_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, + adv, val & MDIO_EEE_10GT); + _kc_linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, + adv, val & MDIO_EEE_1000KX); + _kc_linkmode_mod_bit(ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, + adv, val & MDIO_EEE_10GKX4); + _kc_linkmode_mod_bit(ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, + adv, val & MDIO_EEE_10GKR); +} + +static inline u32 linkmode_to_mii_eee_cap1_t(unsigned long *adv) +{ + u32 result = 0; + + if (test_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, adv)) + result |= MDIO_EEE_100TX; + if (test_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, adv)) + result |= MDIO_EEE_1000T; + if (test_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, adv)) + result |= MDIO_EEE_10GT; + if (test_bit(ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, adv)) + result |= MDIO_EEE_1000KX; + if (test_bit(ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, adv)) + result |= MDIO_EEE_10GKX4; + if (test_bit(ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, adv)) + result |= MDIO_EEE_10GKR; + + return result; +} +#endif /* !HAVE_MII_EEE_CAP1_MOD_LINKMODE */ +#endif /* !HAVE_ETHTOOL_KEEE */ + +#ifdef HAVE_ASSIGN_STR_2_PARAMS +#define _kc__assign_str(dst, src) __assign_str(dst, src) +#else +#define _kc__assign_str(dst, src) __assign_str(dst) +#endif + +#if defined(NEED_DIM_END_SAMPLE_BY_POINTER) && defined(HAVE_CONFIG_DIMLIB) +#include + +/* Since commit 61bf0009a765 ("dim: pass dim_sample to net_dim() by reference") + * the net_dim function has accepted a const struct dim_sample * parameter + * instead of passing struct dim_sample by value. + */ +static inline void _kc_net_dim(struct dim *dim, + const struct dim_sample *end_sample) +{ + if (end_sample) + net_dim(dim, *end_sample); +} + +#define net_dim(_dim, _dim_sample) _kc_net_dim(_dim, _dim_sample) +#endif + +#ifdef NEED_XSK_BUFF_DMA_SYNC_FOR_CPU_NO_POOL +#include +static inline void +_kc_xsk_buff_dma_sync_for_cpu(struct xdp_buff *xdp) +{ + struct xdp_buff_xsk *xskb = container_of(xdp, struct xdp_buff_xsk, xdp); + + xsk_buff_dma_sync_for_cpu(xdp, xskb->pool); +} + +#define xsk_buff_dma_sync_for_cpu(xdp) \ + _kc_xsk_buff_dma_sync_for_cpu(xdp) +#endif /* NEED_XSK_BUFF_DMA_SYNC_FOR_CPU_NO_POOL */ + +#ifdef NEED_XDP_CONVERT_BUFF_TO_FRAME +#define xdp_convert_buff_to_frame convert_to_xdp_frame +#endif + +#ifdef NEED_STR_ENABLED_DISABLED +static inline const char *str_enable_disable(bool v) +{ + return v ? "enable" : "disable"; +} + +static inline const char *str_enabled_disabled(bool v) +{ + return v ? "enabled" : "disabled"; +} + +static inline const char *str_read_write(bool v) +{ + return v ? "read" : "write"; +} + +static inline const char *str_on_off(bool v) +{ + return v ? "on" : "off"; +} + +static inline const char *str_yes_no(bool v) +{ + return v ? "yes" : "no"; +} +#endif /* NEED_STR_ENABLED_DISABLED */ +#if !defined(HAVE_LINUX_REFCOUNT_TYPES_HEADER) && !defined(HAVE_LINUX_REFCOUNT_HEADER) + + typedef struct refcount_struct { + atomic_t refs; + } refcount_t; +#endif /* HAVE_LINUX_REFCOUNT_TYPES_HEADER && HAVE_LINUX_REFCOUNT_HEADER */ + +#ifdef NEED_TIMER_DELETE +#define timer_delete del_timer +#define timer_delete_sync del_timer_sync +#endif /* NEED_TIMER_DELETE */ + +/* Since commit 3652117f8548 ("eventfd: simplify eventfd_signal()") the + * eventfd_signal() function only takes a single argument. The second + * argument was only ever passed as 1. + */ +#ifdef NEED_EVENTFD_SIGNAL_NO_COUNTER +static inline +void _kc_eventfd_signal(struct eventfd_ctx *ctx) +{ + eventfd_signal(ctx, 1); +} +#define eventfd_signal(ctx) _kc_eventfd_signal(ctx) +#endif /* NEED_EVENTFD_SIGNAL_NO_COUNTER */ + +#ifdef NEED_TIMER_CONTAINER_OF +#define timer_container_of(var, callback_timer, timer_fieldname) \ + from_timer(var, callback_timer, timer_fieldname) +#endif /* NEED_TIMER_CONTAINER_OF */ + +/* + * Some legacy kernels lack TCP_MIN_MSS in . Provide a portable + * lower bound so driver code can validate MSS (e.g., avoid zero/tiny values). + */ +#ifndef TCP_MIN_MSS +#define TCP_MIN_MSS 88U +#endif + +#endif /* _KCOMPAT_IMPL_H_ */ diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/kcompat_kthread.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/kcompat_kthread.h new file mode 100644 index 00000000000..75adfa7c33c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/kcompat_kthread.h @@ -0,0 +1,48 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 1999 - 2026 Intel Corporation */ + +/* SPDX-License-Identifier: GPL-2.0 */ + +#ifndef _KCOMPAT_KTHREAD_H_ +#define _KCOMPAT_KTHREAD_H_ + +/* Kernels since 4.9 have supported delayed work items for kthreads. In order + * to allow seamless transition from old to new kernels, this header defines + * a set of macros to switch out kthread usage with a work queue on the older + * kernels that do not have support for kthread_delayed_work. + */ +#ifdef HAVE_KTHREAD_DELAYED_API +#include +#else /* HAVE_KTHREAD_DELAYED_API */ +#include +#undef kthread_work +#define kthread_work work_struct +#undef kthread_delayed_work +#define kthread_delayed_work delayed_work +#undef kthread_worker +#define kthread_worker workqueue_struct +#undef kthread_queue_work +#define kthread_queue_work(worker, work) queue_work(worker, work) +#undef kthread_queue_delayed_work +#define kthread_queue_delayed_work(worker, dwork, delay) \ + queue_delayed_work(worker, dwork, delay) +#undef kthread_init_work +#define kthread_init_work(work, fn) INIT_WORK(work, fn) +#undef kthread_init_delayed_work +#define kthread_init_delayed_work(dwork, fn) \ + INIT_DELAYED_WORK(dwork, fn) +#undef kthread_flush_worker +#define kthread_flush_worker(worker) flush_workqueue(worker) +#undef kthread_cancel_work_sync +#define kthread_cancel_work_sync(work) cancel_work_sync(work) +#undef kthread_cancel_delayed_work_sync +#define kthread_cancel_delayed_work_sync(dwork) \ + cancel_delayed_work_sync(dwork) +#undef kthread_create_worker +#define kthread_create_worker(flags, namefmt, ...) \ + alloc_workqueue(namefmt, 0, 0, ##__VA_ARGS__) +#undef kthread_destroy_worker +#define kthread_destroy_worker(worker) destroy_workqueue(worker) +#endif /* !HAVE_KTHREAD_DELAYED_API */ + +#endif /* _KCOMPAT_KTHREAD_H_ */ diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/kcompat_overflow.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/kcompat_overflow.h new file mode 100644 index 00000000000..1d882c9dc97 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/kcompat_overflow.h @@ -0,0 +1,493 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 1999 - 2026 Intel Corporation */ + +/* SPDX-License-Identifier: GPL-2.0 OR MIT */ +#ifndef __LINUX_OVERFLOW_H +#define __LINUX_OVERFLOW_H + +#include +#include +#include + +/* + * prior to commit 54d50897d544 ("linux/kernel.h: split *_MAX and *_MIN macros into ") + * SIZE_MAX was part of kernel.h, which we don't want to include so early on, + * + * on old RHELs size_t is also unknown at this point, so just include types.h + */ +#include +#ifndef SIZE_MAX +#define SIZE_MAX (~(size_t)0) +#endif + +/* + * In the fallback code below, we need to compute the minimum and + * maximum values representable in a given type. These macros may also + * be useful elsewhere, so we provide them outside the + * COMPILER_HAS_GENERIC_BUILTIN_OVERFLOW block. + * + * It would seem more obvious to do something like + * + * #define type_min(T) (T)(is_signed_type(T) ? (T)1 << (8*sizeof(T)-1) : 0) + * #define type_max(T) (T)(is_signed_type(T) ? ((T)1 << (8*sizeof(T)-1)) - 1 : ~(T)0) + * + * Unfortunately, the middle expressions, strictly speaking, have + * undefined behaviour, and at least some versions of gcc warn about + * the type_max expression (but not if -fsanitize=undefined is in + * effect; in that case, the warning is deferred to runtime...). + * + * The slightly excessive casting in type_min is to make sure the + * macros also produce sensible values for the exotic type _Bool. [The + * overflow checkers only almost work for _Bool, but that's + * a-feature-not-a-bug, since people shouldn't be doing arithmetic on + * _Bools. Besides, the gcc builtins don't allow _Bool* as third + * argument.] + * + * Idea stolen from + * https://mail-index.netbsd.org/tech-misc/2007/02/05/0000.html - + * credit to Christian Biere. + */ +/* The is_signed_type macro is redefined in a few places in various kernel + * headers. If this header is included at the same time as one of those, we + * will generate compilation warnings. Since we can't fix every old kernel, + * rename is_signed_type for this file to _kc_is_signed_type. This prevents + * the macro name collision, and should be safe since our drivers do not + * directly call the macro. + */ +#define _kc_is_signed_type(type) (((type)(-1)) < (type)1) +#define __type_half_max(type) ((type)1 << (8*sizeof(type) - 1 - _kc_is_signed_type(type))) +#define type_max(T) ((T)((__type_half_max(T) - 1) + __type_half_max(T))) +#define type_min(T) ((T)((T)-type_max(T)-(T)1)) + +/* + * Avoids triggering -Wtype-limits compilation warning, + * while using unsigned data types to check a < 0. + */ +#define is_non_negative(a) ((a) > 0 || (a) == 0) +#define is_negative(a) (!(is_non_negative(a))) + +#ifdef COMPILER_HAS_GENERIC_BUILTIN_OVERFLOW +/* commit 9b80e4c4ddac ("overflow: Add __must_check attribute to check_*() + * helpers") added __must_check_overflow + * + * Allows for effectively applying __must_check to a macro so we can have + * both the type-agnostic benefits of the macros while also being able to + * enforce that the return value is, in fact, checked. + */ +static inline bool __must_check __must_check_overflow(bool overflow) +{ + return unlikely(overflow); +} + +/* + * For simplicity and code hygiene, the fallback code below insists on + * a, b and *d having the same type (similar to the min() and max() + * macros), whereas gcc's type-generic overflow checkers accept + * different types. Hence we don't just make check_add_overflow an + * alias for __builtin_add_overflow, but add type checks similar to + * below. + */ +#define check_add_overflow(a, b, d) \ + __must_check_overflow(__builtin_add_overflow(a, b, d)) + +#define check_sub_overflow(a, b, d) \ + __must_check_overflow(__builtin_sub_overflow(a, b, d)) + +#define check_mul_overflow(a, b, d) \ + __must_check_overflow(__builtin_mul_overflow(a, b, d)) + +#else +#ifndef __CHECKER__ + +/* Checking for unsigned overflow is relatively easy without causing UB. */ +#define __unsigned_add_overflow(a, b, d) ({ \ + typeof(a) __a = (a); \ + typeof(b) __b = (b); \ + typeof(d) __d = (d); \ + (void) (&__a == &__b); \ + (void) (&__a == __d); \ + *__d = __a + __b; \ + *__d < __a; \ +}) +#define __unsigned_sub_overflow(a, b, d) ({ \ + typeof(a) __a = (a); \ + typeof(b) __b = (b); \ + typeof(d) __d = (d); \ + (void) (&__a == &__b); \ + (void) (&__a == __d); \ + *__d = __a - __b; \ + __a < __b; \ +}) +/* + * If one of a or b is a compile-time constant, this avoids a division. + */ +#define __unsigned_mul_overflow(a, b, d) ({ \ + typeof(a) __a = (a); \ + typeof(b) __b = (b); \ + typeof(d) __d = (d); \ + (void) (&__a == &__b); \ + (void) (&__a == __d); \ + *__d = __a * __b; \ + __builtin_constant_p(__b) ? \ + __b > 0 && __a > type_max(typeof(__a)) / __b : \ + __a > 0 && __b > type_max(typeof(__b)) / __a; \ +}) + +/* + * For signed types, detecting overflow is much harder, especially if + * we want to avoid UB. But the interface of these macros is such that + * we must provide a result in *d, and in fact we must produce the + * result promised by gcc's builtins, which is simply the possibly + * wrapped-around value. Fortunately, we can just formally do the + * operations in the widest relevant unsigned type (u64) and then + * truncate the result - gcc is smart enough to generate the same code + * with and without the (u64) casts. + */ + +/* + * Adding two signed integers can overflow only if they have the same + * sign, and overflow has happened iff the result has the opposite + * sign. + */ +#define __signed_add_overflow(a, b, d) ({ \ + typeof(a) __a = (a); \ + typeof(b) __b = (b); \ + typeof(d) __d = (d); \ + (void) (&__a == &__b); \ + (void) (&__a == __d); \ + *__d = (u64)__a + (u64)__b; \ + (((~(__a ^ __b)) & (*__d ^ __a)) \ + & type_min(typeof(__a))) != 0; \ +}) + +/* + * Subtraction is similar, except that overflow can now happen only + * when the signs are opposite. In this case, overflow has happened if + * the result has the opposite sign of a. + */ +#define __signed_sub_overflow(a, b, d) ({ \ + typeof(a) __a = (a); \ + typeof(b) __b = (b); \ + typeof(d) __d = (d); \ + (void) (&__a == &__b); \ + (void) (&__a == __d); \ + *__d = (u64)__a - (u64)__b; \ + ((((__a ^ __b)) & (*__d ^ __a)) \ + & type_min(typeof(__a))) != 0; \ +}) + +/* + * Signed multiplication is rather hard. gcc always follows C99, so + * division is truncated towards 0. This means that we can write the + * overflow check like this: + * + * (a > 0 && (b > MAX/a || b < MIN/a)) || + * (a < -1 && (b > MIN/a || b < MAX/a) || + * (a == -1 && b == MIN) + * + * The redundant casts of -1 are to silence an annoying -Wtype-limits + * (included in -Wextra) warning: When the type is u8 or u16, the + * __b_c_e in check_mul_overflow obviously selects + * __unsigned_mul_overflow, but unfortunately gcc still parses this + * code and warns about the limited range of __b. + */ + +#define __signed_mul_overflow(a, b, d) ({ \ + typeof(a) __a = (a); \ + typeof(b) __b = (b); \ + typeof(d) __d = (d); \ + typeof(a) __tmax = type_max(typeof(a)); \ + typeof(a) __tmin = type_min(typeof(a)); \ + (void) (&__a == &__b); \ + (void) (&__a == __d); \ + *__d = (u64)__a * (u64)__b; \ + (__b > 0 && (__a > __tmax/__b || __a < __tmin/__b)) || \ + (__b < (typeof(__b))-1 && (__a > __tmin/__b || __a < __tmax/__b)) || \ + (__b == (typeof(__b))-1 && __a == __tmin); \ +}) + + +#define check_add_overflow(a, b, d) \ + __builtin_choose_expr(_kc_is_signed_type(typeof(a)), \ + __signed_add_overflow(a, b, d), \ + __unsigned_add_overflow(a, b, d)) + +#define check_sub_overflow(a, b, d) \ + __builtin_choose_expr(_kc_is_signed_type(typeof(a)), \ + __signed_sub_overflow(a, b, d), \ + __unsigned_sub_overflow(a, b, d)) + +#define check_mul_overflow(a, b, d) \ + __builtin_choose_expr(_kc_is_signed_type(typeof(a)), \ + __signed_mul_overflow(a, b, d), \ + __unsigned_mul_overflow(a, b, d)) + +#endif /* __CHECKER__ */ +#endif /* COMPILER_HAS_GENERIC_BUILTIN_OVERFLOW */ + +/** check_shl_overflow() - Calculate a left-shifted value and check overflow + * + * @a: Value to be shifted + * @s: How many bits left to shift + * @d: Pointer to where to store the result + * + * Computes *@d = (@a << @s) + * + * Returns true if '*d' cannot hold the result or when 'a << s' doesn't + * make sense. Example conditions: + * - 'a << s' causes bits to be lost when stored in *d. + * - 's' is garbage (e.g. negative) or so large that the result of + * 'a << s' is guaranteed to be 0. + * - 'a' is negative. + * - 'a << s' sets the sign bit, if any, in '*d'. + * + * '*d' will hold the results of the attempted shift, but is not + * considered "safe for use" if false is returned. + */ +#define check_shl_overflow(a, s, d) ({ \ + typeof(a) _a = a; \ + typeof(s) _s = s; \ + typeof(d) _d = d; \ + u64 _a_full = _a; \ + unsigned int _to_shift = \ + _s >= 0 && _s < 8 * sizeof(*d) ? _s : 0; \ + *_d = (_a_full << _to_shift); \ + (_to_shift != _s || *_d < 0 || _a < 0 || \ + (*_d >> _to_shift) != _a); \ +}) + +#define __overflows_type_constexpr(x, T) ( \ + is_unsigned_type(typeof(x)) ? \ + (x) > type_max(typeof(T)) : \ + is_unsigned_type(typeof(T)) ? \ + (x) < 0 || (x) > type_max(typeof(T)) : \ + (x) < type_min(typeof(T)) || (x) > type_max(typeof(T))) + +#define __overflows_type(x, T) ({ \ + typeof(T) v = 0; \ + check_add_overflow((x), v, &v); \ +}) + +/** + * overflows_type - helper for checking the overflows between value, variables, + * or data type + * + * @n: source constant value or variable to be checked + * @T: destination variable or data type proposed to store @x + * + * Compares the @x expression for whether or not it can safely fit in + * the storage of the type in @T. @x and @T can have different types. + * If @x is a constant expression, this will also resolve to a constant + * expression. + * + * Returns: true if overflow can occur, false otherwise. + */ +#define overflows_type(n, T) \ + __builtin_choose_expr(__is_constexpr(n), \ + __overflows_type_constexpr(n, T), \ + __overflows_type(n, T)) + +/** + * castable_to_type - like __same_type(), but also allows for casted literals + * + * @n: variable or constant value + * @T: variable or data type + * + * Unlike the __same_type() macro, this allows a constant value as the + * first argument. If this value would not overflow into an assignment + * of the second argument's type, it returns true. Otherwise, this falls + * back to __same_type(). + */ +#define castable_to_type(n, T) \ + __builtin_choose_expr(__is_constexpr(n), \ + !__overflows_type_constexpr(n, T), \ + __same_type(n, T)) + +/** + * size_mul() - Calculate size_t multiplication with saturation at SIZE_MAX + * @factor1: first factor + * @factor2: second factor + * + * Returns: calculate @factor1 * @factor2, both promoted to size_t, + * with any overflow causing the return value to be SIZE_MAX. The + * lvalue must be size_t to avoid implicit type conversion. + */ +static inline size_t __must_check size_mul(size_t factor1, size_t factor2) +{ + size_t bytes; + + if (check_mul_overflow(factor1, factor2, &bytes)) + return SIZE_MAX; + + return bytes; +} + +/** + * size_add() - Calculate size_t addition with saturation at SIZE_MAX + * @addend1: first addend + * @addend2: second addend + * + * Returns: calculate @addend1 + @addend2, both promoted to size_t, + * with any overflow causing the return value to be SIZE_MAX. The + * lvalue must be size_t to avoid implicit type conversion. + */ +static inline size_t __must_check size_add(size_t addend1, size_t addend2) +{ + size_t bytes; + + if (check_add_overflow(addend1, addend2, &bytes)) + return SIZE_MAX; + + return bytes; +} + +/** + * size_sub() - Calculate size_t subtraction with saturation at SIZE_MAX + * @minuend: value to subtract from + * @subtrahend: value to subtract from @minuend + * + * Returns: calculate @minuend - @subtrahend, both promoted to size_t, + * with any overflow causing the return value to be SIZE_MAX. For + * composition with the size_add() and size_mul() helpers, neither + * argument may be SIZE_MAX (or the result with be forced to SIZE_MAX). + * The lvalue must be size_t to avoid implicit type conversion. + */ +static inline size_t __must_check size_sub(size_t minuend, size_t subtrahend) +{ + size_t bytes; + + if (minuend == SIZE_MAX || subtrahend == SIZE_MAX || + check_sub_overflow(minuend, subtrahend, &bytes)) + return SIZE_MAX; + + return bytes; +} + +/** + * array_size() - Calculate size of 2-dimensional array. + * + * @a: dimension one + * @b: dimension two + * + * Calculates size of 2-dimensional array: @a * @b. + * + * Returns: number of bytes needed to represent the array or SIZE_MAX on + * overflow. + */ +#define array_size(a, b) size_mul(a, b) + +/** + * array3_size() - Calculate size of 3-dimensional array. + * + * @a: dimension one + * @b: dimension two + * @c: dimension three + * + * Calculates size of 3-dimensional array: @a * @b * @c. + * + * Returns: number of bytes needed to represent the array or SIZE_MAX on + * overflow. + */ +#define array3_size(a, b, c) size_mul(size_mul(a, b), c) + +/** + * flex_array_size() - Calculate size of a flexible array member + * within an enclosing structure. + * @p: Pointer to the structure. + * @member: Name of the flexible array member. + * @count: Number of elements in the array. + * + * Calculates size of a flexible array of @count number of @member + * elements, at the end of structure @p. + * + * Return: number of bytes needed or SIZE_MAX on overflow. + */ +#define flex_array_size(p, member, count) \ + __builtin_choose_expr(__is_constexpr(count), \ + (count) * sizeof(*(p)->member) + __must_be_array((p)->member), \ + size_mul(count, sizeof(*(p)->member) + __must_be_array((p)->member))) + +/** + * struct_size() - Calculate size of structure with trailing flexible array. + * @p: Pointer to the structure. + * @member: Name of the array member. + * @count: Number of elements in the array. + * + * Calculates size of memory needed for structure of @p followed by an + * array of @count number of @member elements. + * + * Return: number of bytes needed or SIZE_MAX on overflow. + */ +#define struct_size(p, member, count) \ + __builtin_choose_expr(__is_constexpr(count), \ + sizeof(*(p)) + flex_array_size(p, member, count), \ + size_add(sizeof(*(p)), flex_array_size(p, member, count))) + +/** + * struct_size_t() - Calculate size of structure with trailing flexible array + * @type: structure type name. + * @member: Name of the array member. + * @count: Number of elements in the array. + * + * Calculates size of memory needed for structure @type followed by an + * array of @count number of @member elements. Prefer using struct_size() + * when possible instead, to keep calculations associated with a specific + * instance variable of type @type. + * + * Return: number of bytes needed or SIZE_MAX on overflow. + */ +#define struct_size_t(type, member, count) \ + struct_size((type *)NULL, member, count) + +/** + * _DEFINE_FLEX() - helper macro for DEFINE_FLEX() family. + * Enables caller macro to pass (different) initializer. + * + * @type: structure type name, including "struct" keyword. + * @name: Name for a variable to define. + * @member: Name of the array member. + * @count: Number of elements in the array; must be compile-time const. + * @initializer: initializer expression (could be empty for no init). + */ +#define _DEFINE_FLEX(type, name, member, count, initializer) \ + _Static_assert(__builtin_constant_p(count), \ + "onstack flex array members require compile-time const count"); \ + union { \ + u8 bytes[struct_size_t(type, member, count)]; \ + type obj; \ + } name##_u initializer; \ + type *name = (type *)&name##_u + +/** + * DEFINE_RAW_FLEX() - Define an on-stack instance of structure with a trailing + * flexible array member, when it does not have a __counted_by annotation. + * + * @type: structure type name, including "struct" keyword. + * @name: Name for a variable to define. + * @member: Name of the array member. + * @count: Number of elements in the array; must be compile-time const. + * + * Define a zeroed, on-stack, instance of @type structure with a trailing + * flexible array member. + * Use __struct_size(@name) to get compile-time size of it afterwards. + */ +#define DEFINE_RAW_FLEX(type, name, member, count) \ + _DEFINE_FLEX(type, name, member, count, = {}) + +/** + * DEFINE_FLEX() - Define an on-stack instance of structure with a trailing + * flexible array member. + * + * @type: structure type name, including "struct" keyword. + * @name: Name for a variable to define. + * @member: Name of the array member. + * @count: Number of elements in the array; must be compile-time const. + * + * Define a zeroed, on-stack, instance of @type structure with a trailing + * flexible array member. + * Use __struct_size(@name) to get compile-time size of it afterwards. + */ +#define DEFINE_FLEX(type, name, member, count) \ + _DEFINE_FLEX(type, name, member, count, = {}) + +#endif /* __LINUX_OVERFLOW_H */ diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/kcompat_packing.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/kcompat_packing.c new file mode 100644 index 00000000000..c8b68b0c222 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/kcompat_packing.c @@ -0,0 +1,476 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 1999 - 2026 Intel Corporation */ + +// SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 +/* Copyright 2016-2018 NXP + * Copyright (c) 2018-2019, Vladimir Oltean + */ +#include "kcompat.h" +#include "kcompat_packing.h" + +#include +#include +#ifdef HAVE_LINUX_BITS_HEADER +#include +#endif +#include +#include +#include + +#define __pack_fields(pbuf, pbuflen, ustruct, fields, num_fields, quirks) \ + ({ \ + for (size_t i = 0; i < (num_fields); i++) { \ + typeof(&(fields)[0]) field = &(fields)[i]; \ + u64 uval; \ + \ + uval = ustruct_field_to_u64(ustruct, field->offset, field->size); \ + \ + __pack(pbuf, uval, field->startbit, field->endbit, \ + pbuflen, quirks); \ + } \ + }) + +#define __unpack_fields(pbuf, pbuflen, ustruct, fields, num_fields, quirks) \ + ({ \ + for (size_t i = 0; i < (num_fields); i++) { \ + typeof(&(fields)[0]) field = &fields[i]; \ + u64 uval; \ + \ + __unpack(pbuf, &uval, field->startbit, field->endbit, \ + pbuflen, quirks); \ + \ + u64_to_ustruct_field(ustruct, field->offset, field->size, uval); \ + } \ + }) + +/** + * calculate_box_addr - Determine physical location of byte in buffer + * @box: Index of byte within buffer seen as a logical big-endian big number + * @len: Size of buffer in bytes + * @quirks: mask of QUIRK_LSW32_IS_FIRST and QUIRK_LITTLE_ENDIAN + * + * Function interprets the buffer as a @len byte sized big number, and returns + * the physical offset of the @box logical octet within it. Internally, it + * treats the big number as groups of 4 bytes. If @len is not a multiple of 4, + * the last group may be shorter. + * + * @QUIRK_LSW32_IS_FIRST gives the ordering of groups of 4 octets relative to + * each other. If set, the most significant group of 4 octets is last in the + * buffer (and may be truncated if @len is not a multiple of 4). + * + * @QUIRK_LITTLE_ENDIAN gives the ordering of bytes within each group of 4. + * If set, the most significant byte is last in the group. If @len takes the + * form of 4k+3, the last group will only be able to represent 24 bits, and its + * most significant octet is byte 2. + * + * Return: the physical offset into the buffer corresponding to the logical box. + */ +static size_t calculate_box_addr(size_t box, size_t len, u8 quirks) +{ + size_t offset_of_group, offset_in_group, this_group = box / 4; + size_t group_size; + + if (quirks & QUIRK_LSW32_IS_FIRST) + offset_of_group = this_group * 4; + else + offset_of_group = len - ((this_group + 1) * 4); + + group_size = min(4, len - offset_of_group); + + if (quirks & QUIRK_LITTLE_ENDIAN) + offset_in_group = box - this_group * 4; + else + offset_in_group = group_size - (box - this_group * 4) - 1; + + return offset_of_group + offset_in_group; +} + +static void __pack(void *pbuf, u64 uval, size_t startbit, size_t endbit, + size_t pbuflen, u8 quirks) +{ + /* Logical byte indices corresponding to the + * start and end of the field. + */ + int plogical_first_u8 = startbit / BITS_PER_BYTE; + int plogical_last_u8 = endbit / BITS_PER_BYTE; + int value_width = startbit - endbit + 1; + int box; + + /* Check if "uval" fits in "value_width" bits. + * The test only works for value_width < 64, but in the latter case, + * any 64-bit uval will surely fit. + */ + WARN(value_width < 64 && uval >= (1ull << value_width), + "Cannot store 0x%llx inside bits %zu-%zu - will truncate\n", + uval, startbit, endbit); + + /* Iterate through an idealistic view of the pbuf as an u64 with + * no quirks, u8 by u8 (aligned at u8 boundaries), from high to low + * logical bit significance. "box" denotes the current logical u8. + */ + for (box = plogical_first_u8; box >= plogical_last_u8; box--) { + /* Bit indices into the currently accessed 8-bit box */ + size_t box_start_bit, box_end_bit, box_addr; + u8 box_mask; + /* Corresponding bits from the unpacked u64 parameter */ + size_t proj_start_bit, proj_end_bit; + u64 proj_mask; + u64 pval; + + /* This u8 may need to be accessed in its entirety + * (from bit 7 to bit 0), or not, depending on the + * input arguments startbit and endbit. + */ + if (box == plogical_first_u8) + box_start_bit = startbit % BITS_PER_BYTE; + else + box_start_bit = 7; + if (box == plogical_last_u8) + box_end_bit = endbit % BITS_PER_BYTE; + else + box_end_bit = 0; + + /* We have determined the box bit start and end. + * Now we calculate where this (masked) u8 box would fit + * in the unpacked (CPU-readable) u64 - the u8 box's + * projection onto the unpacked u64. Though the + * box is u8, the projection is u64 because it may fall + * anywhere within the unpacked u64. + */ + proj_start_bit = ((box * BITS_PER_BYTE) + box_start_bit) - endbit; + proj_end_bit = ((box * BITS_PER_BYTE) + box_end_bit) - endbit; + proj_mask = GENMASK_ULL(proj_start_bit, proj_end_bit); + box_mask = GENMASK(box_start_bit, box_end_bit); + + /* Determine the offset of the u8 box inside the pbuf, + * adjusted for quirks. The adjusted box_addr will be used for + * effective addressing inside the pbuf (so it's not + * logical any longer). + */ + box_addr = calculate_box_addr(box, pbuflen, quirks); + + /* Write to pbuf, read from uval */ + pval = uval & proj_mask; + pval >>= proj_end_bit; + pval <<= box_end_bit; + + if (quirks & QUIRK_MSB_ON_THE_RIGHT) { + pval = bitrev8(pval); + box_mask = bitrev8(box_mask); + } + + ((u8 *)pbuf)[box_addr] &= ~box_mask; + ((u8 *)pbuf)[box_addr] |= pval; + } +} + +/** + * pack - Pack u64 number into bitfield of buffer. + * + * @pbuf: Pointer to a buffer holding the packed value. + * @uval: CPU-readable unpacked value to pack. + * @startbit: The index (in logical notation, compensated for quirks) where + * the packed value starts within pbuf. Must be larger than, or + * equal to, endbit. + * @endbit: The index (in logical notation, compensated for quirks) where + * the packed value ends within pbuf. Must be smaller than, or equal + * to, startbit. + * @pbuflen: The length in bytes of the packed buffer pointed to by @pbuf. + * @quirks: A bit mask of QUIRK_LITTLE_ENDIAN, QUIRK_LSW32_IS_FIRST and + * QUIRK_MSB_ON_THE_RIGHT. + * + * Return: 0 on success, EINVAL or ERANGE if called incorrectly. Assuming + * correct usage, return code may be discarded. The @pbuf memory will + * be modified on success. + */ +int pack(void *pbuf, u64 uval, size_t startbit, size_t endbit, size_t pbuflen, + u8 quirks) +{ + /* startbit is expected to be larger than endbit, and both are + * expected to be within the logically addressable range of the buffer. + */ + if (unlikely(startbit < endbit || startbit >= BITS_PER_BYTE * pbuflen)) + /* Invalid function call */ + return -EINVAL; + + if (unlikely(startbit - endbit >= 64)) + return -ERANGE; + + __pack(pbuf, uval, startbit, endbit, pbuflen, quirks); + + return 0; +} + +static void __unpack(const void *pbuf, u64 *uval, size_t startbit, size_t endbit, + size_t pbuflen, u8 quirks) +{ + /* Logical byte indices corresponding to the + * start and end of the field. + */ + int plogical_first_u8 = startbit / BITS_PER_BYTE; + int plogical_last_u8 = endbit / BITS_PER_BYTE; + int box; + + /* Initialize parameter */ + *uval = 0; + + /* Iterate through an idealistic view of the pbuf as an u64 with + * no quirks, u8 by u8 (aligned at u8 boundaries), from high to low + * logical bit significance. "box" denotes the current logical u8. + */ + for (box = plogical_first_u8; box >= plogical_last_u8; box--) { + /* Bit indices into the currently accessed 8-bit box */ + size_t box_start_bit, box_end_bit, box_addr; + u8 box_mask; + /* Corresponding bits from the unpacked u64 parameter */ + size_t proj_start_bit, proj_end_bit; + u64 proj_mask; + u64 pval; + + /* This u8 may need to be accessed in its entirety + * (from bit 7 to bit 0), or not, depending on the + * input arguments startbit and endbit. + */ + if (box == plogical_first_u8) + box_start_bit = startbit % BITS_PER_BYTE; + else + box_start_bit = 7; + if (box == plogical_last_u8) + box_end_bit = endbit % BITS_PER_BYTE; + else + box_end_bit = 0; + + /* We have determined the box bit start and end. + * Now we calculate where this (masked) u8 box would fit + * in the unpacked (CPU-readable) u64 - the u8 box's + * projection onto the unpacked u64. Though the + * box is u8, the projection is u64 because it may fall + * anywhere within the unpacked u64. + */ + proj_start_bit = ((box * BITS_PER_BYTE) + box_start_bit) - endbit; + proj_end_bit = ((box * BITS_PER_BYTE) + box_end_bit) - endbit; + proj_mask = GENMASK_ULL(proj_start_bit, proj_end_bit); + box_mask = GENMASK(box_start_bit, box_end_bit); + + /* Determine the offset of the u8 box inside the pbuf, + * adjusted for quirks. The adjusted box_addr will be used for + * effective addressing inside the pbuf (so it's not + * logical any longer). + */ + box_addr = calculate_box_addr(box, pbuflen, quirks); + + /* Read from pbuf, write to uval */ + pval = ((u8 *)pbuf)[box_addr]; + + if (quirks & QUIRK_MSB_ON_THE_RIGHT) + pval = bitrev8(pval); + + pval &= box_mask; + + pval >>= box_end_bit; + pval <<= proj_end_bit; + *uval &= ~proj_mask; + *uval |= pval; + } +} + +/** + * unpack - Unpack u64 number from packed buffer. + * + * @pbuf: Pointer to a buffer holding the packed value. + * @uval: Pointer to an u64 holding the unpacked value. + * @startbit: The index (in logical notation, compensated for quirks) where + * the packed value starts within pbuf. Must be larger than, or + * equal to, endbit. + * @endbit: The index (in logical notation, compensated for quirks) where + * the packed value ends within pbuf. Must be smaller than, or equal + * to, startbit. + * @pbuflen: The length in bytes of the packed buffer pointed to by @pbuf. + * @quirks: A bit mask of QUIRK_LITTLE_ENDIAN, QUIRK_LSW32_IS_FIRST and + * QUIRK_MSB_ON_THE_RIGHT. + * + * Return: 0 on success, EINVAL or ERANGE if called incorrectly. Assuming + * correct usage, return code may be discarded. The @uval will be + * modified on success. + */ +int unpack(const void *pbuf, u64 *uval, size_t startbit, size_t endbit, + size_t pbuflen, u8 quirks) +{ + /* width of the field to access in the pbuf */ + u64 value_width; + + /* startbit is expected to be larger than endbit, and both are + * expected to be within the logically addressable range of the buffer. + */ + if (startbit < endbit || startbit >= BITS_PER_BYTE * pbuflen) + /* Invalid function call */ + return -EINVAL; + + value_width = startbit - endbit + 1; + if (value_width > 64) + return -ERANGE; + + __unpack(pbuf, uval, startbit, endbit, pbuflen, quirks); + + return 0; +} + +/** + * packing - Convert numbers (currently u64) between a packed and an unpacked + * format. Unpacked means laid out in memory in the CPU's native + * understanding of integers, while packed means anything else that + * requires translation. + * + * @pbuf: Pointer to a buffer holding the packed value. + * @uval: Pointer to an u64 holding the unpacked value. + * @startbit: The index (in logical notation, compensated for quirks) where + * the packed value starts within pbuf. Must be larger than, or + * equal to, endbit. + * @endbit: The index (in logical notation, compensated for quirks) where + * the packed value ends within pbuf. Must be smaller than, or equal + * to, startbit. + * @pbuflen: The length in bytes of the packed buffer pointed to by @pbuf. + * @op: If PACK, then uval will be treated as const pointer and copied (packed) + * into pbuf, between startbit and endbit. + * If UNPACK, then pbuf will be treated as const pointer and the logical + * value between startbit and endbit will be copied (unpacked) to uval. + * @quirks: A bit mask of QUIRK_LITTLE_ENDIAN, QUIRK_LSW32_IS_FIRST and + * QUIRK_MSB_ON_THE_RIGHT. + * + * Note: this is deprecated, prefer to use pack() or unpack() in new code. + * + * Return: 0 on success, EINVAL or ERANGE if called incorrectly. Assuming + * correct usage, return code may be discarded. + * If op is PACK, pbuf is modified. + * If op is UNPACK, uval is modified. + */ +int packing(void *pbuf, u64 *uval, int startbit, int endbit, size_t pbuflen, + enum packing_op op, u8 quirks) +{ + if (op == PACK) + return pack(pbuf, *uval, startbit, endbit, pbuflen, quirks); + + return unpack(pbuf, uval, startbit, endbit, pbuflen, quirks); +} + +static u64 ustruct_field_to_u64(const void *ustruct, size_t field_offset, + size_t field_size) +{ + switch (field_size) { + case 1: + return *((u8 *)(ustruct + field_offset)); + case 2: + return *((u16 *)(ustruct + field_offset)); + case 4: + return *((u32 *)(ustruct + field_offset)); + default: + return *((u64 *)(ustruct + field_offset)); + } +} + +static void u64_to_ustruct_field(void *ustruct, size_t field_offset, + size_t field_size, u64 uval) +{ + switch (field_size) { + case 1: + *((u8 *)(ustruct + field_offset)) = uval; + break; + case 2: + *((u16 *)(ustruct + field_offset)) = uval; + break; + case 4: + *((u32 *)(ustruct + field_offset)) = uval; + break; + default: + *((u64 *)(ustruct + field_offset)) = uval; + break; + } +} + +/** + * pack_fields_u8 - Pack array of fields + * + * @pbuf: Pointer to a buffer holding the packed value. + * @pbuflen: The length in bytes of the packed buffer pointed to by @pbuf. + * @ustruct: Pointer to CPU-readable structure holding the unpacked value. + * It is expected (but not checked) that this has the same data type + * as all struct packed_field_u8 definitions. + * @fields: Array of packed_field_u8 field definition. They must not overlap. + * @num_fields: Length of @fields array. + * @quirks: A bit mask of QUIRK_LITTLE_ENDIAN, QUIRK_LSW32_IS_FIRST and + * QUIRK_MSB_ON_THE_RIGHT. + * + * Use the pack_fields() macro instead of calling this directly. + */ +void pack_fields_u8(void *pbuf, size_t pbuflen, const void *ustruct, + const struct packed_field_u8 *fields, size_t num_fields, + u8 quirks) +{ + __pack_fields(pbuf, pbuflen, ustruct, fields, num_fields, quirks); +} + +/** + * pack_fields_u16 - Pack array of fields + * + * @pbuf: Pointer to a buffer holding the packed value. + * @pbuflen: The length in bytes of the packed buffer pointed to by @pbuf. + * @ustruct: Pointer to CPU-readable structure holding the unpacked value. + * It is expected (but not checked) that this has the same data type + * as all struct packed_field_u16 definitions. + * @fields: Array of packed_field_u16 field definitions. They must not overlap. + * @num_fields: Length of @fields array. + * @quirks: A bit mask of QUIRK_LITTLE_ENDIAN, QUIRK_LSW32_IS_FIRST and + * QUIRK_MSB_ON_THE_RIGHT. + * + * Use the pack_fields() macro instead of calling this directly. + */ +void pack_fields_u16(void *pbuf, size_t pbuflen, const void *ustruct, + const struct packed_field_u16 *fields, size_t num_fields, + u8 quirks) +{ + __pack_fields(pbuf, pbuflen, ustruct, fields, num_fields, quirks); +} + +/** + * unpack_fields_u8 - Unpack array of fields + * + * @pbuf: Pointer to a buffer holding the packed value. + * @pbuflen: The length in bytes of the packed buffer pointed to by @pbuf. + * @ustruct: Pointer to CPU-readable structure holding the unpacked value. + * It is expected (but not checked) that this has the same data type + * as all struct packed_field_u8 definitions. + * @fields: Array of packed_field_u8 field definitions. They must not overlap. + * @num_fields: Length of @fields array. + * @quirks: A bit mask of QUIRK_LITTLE_ENDIAN, QUIRK_LSW32_IS_FIRST and + * QUIRK_MSB_ON_THE_RIGHT. + * + * Use the unpack_fields() macro instead of calling this directly. + */ +void unpack_fields_u8(const void *pbuf, size_t pbuflen, void *ustruct, + const struct packed_field_u8 *fields, size_t num_fields, + u8 quirks) +{ + __unpack_fields(pbuf, pbuflen, ustruct, fields, num_fields, quirks); +} + +/** + * unpack_fields_u16 - Unpack array of fields + * + * @pbuf: Pointer to a buffer holding the packed value. + * @pbuflen: The length in bytes of the packed buffer pointed to by @pbuf. + * @ustruct: Pointer to CPU-readable structure holding the unpacked value. + * It is expected (but not checked) that this has the same data type + * as all struct packed_field_u16 definitions. + * @fields: Array of packed_field_u16 field definitions. They must not overlap. + * @num_fields: Length of @fields array. + * @quirks: A bit mask of QUIRK_LITTLE_ENDIAN, QUIRK_LSW32_IS_FIRST and + * QUIRK_MSB_ON_THE_RIGHT. + * + * Use the unpack_fields() macro instead of calling this directly. + */ +void unpack_fields_u16(const void *pbuf, size_t pbuflen, void *ustruct, + const struct packed_field_u16 *fields, size_t num_fields, + u8 quirks) +{ + __unpack_fields(pbuf, pbuflen, ustruct, fields, num_fields, quirks); +} diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/kcompat_packing.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/kcompat_packing.h new file mode 100644 index 00000000000..d0e07640658 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/kcompat_packing.h @@ -0,0 +1,466 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 1999 - 2026 Intel Corporation */ + +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright 2016-2018 NXP + * Copyright (c) 2018-2019, Vladimir Oltean + */ +#ifndef _KCOMPAT_PACKING_H_ +#define _KCOMPAT_PACKING_H_ + +#include +#include + +#define GEN_PACKED_FIELD_STRUCT(__type) \ + struct packed_field_ ## __type { \ + __type startbit; \ + __type endbit; \ + __type offset; \ + __type size; \ + } + +/* struct packed_field_u8. Use with bit offsets < 256, buffers < 32B and + * unpacked structures < 256B. + */ +GEN_PACKED_FIELD_STRUCT(u8); + +/* struct packed_field_u16. Use with bit offsets < 65536, buffers < 8KB and + * unpacked structures < 64KB. + */ +GEN_PACKED_FIELD_STRUCT(u16); + +#define PACKED_FIELD(start, end, struct_name, struct_field) \ +{ \ + (start), \ + (end), \ + offsetof(struct_name, struct_field), \ + sizeof_field(struct_name, struct_field), \ +} + +#define CHECK_PACKED_FIELD_OVERLAP(fields, index1, index2) ({ \ + typeof(&(fields)[0]) __f = (fields); \ + typeof(__f[0]) _f1 = __f[index1]; typeof(__f[0]) _f2 = __f[index2]; \ + const bool _ascending = __f[0].startbit < __f[1].startbit; \ + BUILD_BUG_ON_MSG(_ascending && _f1.startbit >= _f2.startbit, \ + __stringify(fields) " field " __stringify(index2) \ + " breaks ascending order"); \ + BUILD_BUG_ON_MSG(!_ascending && _f1.startbit <= _f2.startbit, \ + __stringify(fields) " field " __stringify(index2) \ + " breaks descending order"); \ + BUILD_BUG_ON_MSG(max(_f1.endbit, _f2.endbit) <= \ + min(_f1.startbit, _f2.startbit), \ + __stringify(fields) " field " __stringify(index2) \ + " overlaps with previous field"); \ +}) + +#define CHECK_PACKED_FIELD(fields, index) ({ \ + typeof(&(fields)[0]) _f = (fields); \ + typeof(_f[0]) __f = _f[index]; \ + BUILD_BUG_ON_MSG(__f.startbit < __f.endbit, \ + __stringify(fields) " field " __stringify(index) \ + " start bit must not be smaller than end bit"); \ + BUILD_BUG_ON_MSG(__f.size != 1 && __f.size != 2 && \ + __f.size != 4 && __f.size != 8, \ + __stringify(fields) " field " __stringify(index) \ + " has unsupported unpacked storage size"); \ + BUILD_BUG_ON_MSG(__f.startbit - __f.endbit >= BITS_PER_BYTE * __f.size, \ + __stringify(fields) " field " __stringify(index) \ + " exceeds unpacked storage size"); \ + __builtin_choose_expr(index != 0, \ + CHECK_PACKED_FIELD_OVERLAP(fields, index - 1, index), \ + 1); \ +}) + +/* Note that the packed fields may be either in ascending or descending order. + * Thus, we must check that both the first and last field wit within the + * packed buffer size. + */ +#define CHECK_PACKED_FIELDS_SIZE(fields, pbuflen) ({ \ + typeof(&(fields)[0]) _f = (fields); \ + typeof(pbuflen) _len = (pbuflen); \ + const size_t num_fields = ARRAY_SIZE(fields); \ + BUILD_BUG_ON_MSG(!__builtin_constant_p(_len), \ + __stringify(fields) " pbuflen " __stringify(pbuflen) \ + " must be a compile time constant"); \ + BUILD_BUG_ON_MSG(_f[0].startbit >= BITS_PER_BYTE * _len, \ + __stringify(fields) " first field exceeds packed buffer size"); \ + BUILD_BUG_ON_MSG(_f[num_fields - 1].startbit >= BITS_PER_BYTE * _len, \ + __stringify(fields) " last field exceeds packed buffer size"); \ +}) + +#define QUIRK_MSB_ON_THE_RIGHT BIT(0) +#define QUIRK_LITTLE_ENDIAN BIT(1) +#define QUIRK_LSW32_IS_FIRST BIT(2) + +enum packing_op { + PACK, + UNPACK, +}; + +int packing(void *pbuf, u64 *uval, int startbit, int endbit, size_t pbuflen, + enum packing_op op, u8 quirks); + +int pack(void *pbuf, u64 uval, size_t startbit, size_t endbit, size_t pbuflen, + u8 quirks); + +int unpack(const void *pbuf, u64 *uval, size_t startbit, size_t endbit, + size_t pbuflen, u8 quirks); + +void pack_fields_u8(void *pbuf, size_t pbuflen, const void *ustruct, + const struct packed_field_u8 *fields, size_t num_fields, + u8 quirks); + +void pack_fields_u16(void *pbuf, size_t pbuflen, const void *ustruct, + const struct packed_field_u16 *fields, size_t num_fields, + u8 quirks); + +void unpack_fields_u8(const void *pbuf, size_t pbuflen, void *ustruct, + const struct packed_field_u8 *fields, size_t num_fields, + u8 quirks); + +void unpack_fields_u16(const void *pbuf, size_t pbuflen, void *ustruct, + const struct packed_field_u16 *fields, size_t num_fields, + u8 quirks); + +/* Do not hand-edit the following packed field check macros! + * + * They are generated using scripts/gen_packed_field_checks.c, which may be + * built via "make scripts_gen_packed_field_checks". If larger macro sizes are + * needed in the future, please use this program to re-generate the macros and + * insert them here. + */ + +#define CHECK_PACKED_FIELDS_1(fields) \ + CHECK_PACKED_FIELD(fields, 0) + +#define CHECK_PACKED_FIELDS_2(fields) do { \ + CHECK_PACKED_FIELDS_1(fields); \ + CHECK_PACKED_FIELD(fields, 1); \ +} while (0) + +#define CHECK_PACKED_FIELDS_3(fields) do { \ + CHECK_PACKED_FIELDS_2(fields); \ + CHECK_PACKED_FIELD(fields, 2); \ +} while (0) + +#define CHECK_PACKED_FIELDS_4(fields) do { \ + CHECK_PACKED_FIELDS_3(fields); \ + CHECK_PACKED_FIELD(fields, 3); \ +} while (0) + +#define CHECK_PACKED_FIELDS_5(fields) do { \ + CHECK_PACKED_FIELDS_4(fields); \ + CHECK_PACKED_FIELD(fields, 4); \ +} while (0) + +#define CHECK_PACKED_FIELDS_6(fields) do { \ + CHECK_PACKED_FIELDS_5(fields); \ + CHECK_PACKED_FIELD(fields, 5); \ +} while (0) + +#define CHECK_PACKED_FIELDS_7(fields) do { \ + CHECK_PACKED_FIELDS_6(fields); \ + CHECK_PACKED_FIELD(fields, 6); \ +} while (0) + +#define CHECK_PACKED_FIELDS_8(fields) do { \ + CHECK_PACKED_FIELDS_7(fields); \ + CHECK_PACKED_FIELD(fields, 7); \ +} while (0) + +#define CHECK_PACKED_FIELDS_9(fields) do { \ + CHECK_PACKED_FIELDS_8(fields); \ + CHECK_PACKED_FIELD(fields, 8); \ +} while (0) + +#define CHECK_PACKED_FIELDS_10(fields) do { \ + CHECK_PACKED_FIELDS_9(fields); \ + CHECK_PACKED_FIELD(fields, 9); \ +} while (0) + +#define CHECK_PACKED_FIELDS_11(fields) do { \ + CHECK_PACKED_FIELDS_10(fields); \ + CHECK_PACKED_FIELD(fields, 10); \ +} while (0) + +#define CHECK_PACKED_FIELDS_12(fields) do { \ + CHECK_PACKED_FIELDS_11(fields); \ + CHECK_PACKED_FIELD(fields, 11); \ +} while (0) + +#define CHECK_PACKED_FIELDS_13(fields) do { \ + CHECK_PACKED_FIELDS_12(fields); \ + CHECK_PACKED_FIELD(fields, 12); \ +} while (0) + +#define CHECK_PACKED_FIELDS_14(fields) do { \ + CHECK_PACKED_FIELDS_13(fields); \ + CHECK_PACKED_FIELD(fields, 13); \ +} while (0) + +#define CHECK_PACKED_FIELDS_15(fields) do { \ + CHECK_PACKED_FIELDS_14(fields); \ + CHECK_PACKED_FIELD(fields, 14); \ +} while (0) + +#define CHECK_PACKED_FIELDS_16(fields) do { \ + CHECK_PACKED_FIELDS_15(fields); \ + CHECK_PACKED_FIELD(fields, 15); \ +} while (0) + +#define CHECK_PACKED_FIELDS_17(fields) do { \ + CHECK_PACKED_FIELDS_16(fields); \ + CHECK_PACKED_FIELD(fields, 16); \ +} while (0) + +#define CHECK_PACKED_FIELDS_18(fields) do { \ + CHECK_PACKED_FIELDS_17(fields); \ + CHECK_PACKED_FIELD(fields, 17); \ +} while (0) + +#define CHECK_PACKED_FIELDS_19(fields) do { \ + CHECK_PACKED_FIELDS_18(fields); \ + CHECK_PACKED_FIELD(fields, 18); \ +} while (0) + +#define CHECK_PACKED_FIELDS_20(fields) do { \ + CHECK_PACKED_FIELDS_19(fields); \ + CHECK_PACKED_FIELD(fields, 19); \ +} while (0) + +#define CHECK_PACKED_FIELDS_21(fields) do { \ + CHECK_PACKED_FIELDS_20(fields); \ + CHECK_PACKED_FIELD(fields, 20); \ +} while (0) + +#define CHECK_PACKED_FIELDS_22(fields) do { \ + CHECK_PACKED_FIELDS_21(fields); \ + CHECK_PACKED_FIELD(fields, 21); \ +} while (0) + +#define CHECK_PACKED_FIELDS_23(fields) do { \ + CHECK_PACKED_FIELDS_22(fields); \ + CHECK_PACKED_FIELD(fields, 22); \ +} while (0) + +#define CHECK_PACKED_FIELDS_24(fields) do { \ + CHECK_PACKED_FIELDS_23(fields); \ + CHECK_PACKED_FIELD(fields, 23); \ +} while (0) + +#define CHECK_PACKED_FIELDS_25(fields) do { \ + CHECK_PACKED_FIELDS_24(fields); \ + CHECK_PACKED_FIELD(fields, 24); \ +} while (0) + +#define CHECK_PACKED_FIELDS_26(fields) do { \ + CHECK_PACKED_FIELDS_25(fields); \ + CHECK_PACKED_FIELD(fields, 25); \ +} while (0) + +#define CHECK_PACKED_FIELDS_27(fields) do { \ + CHECK_PACKED_FIELDS_26(fields); \ + CHECK_PACKED_FIELD(fields, 26); \ +} while (0) + +#define CHECK_PACKED_FIELDS_28(fields) do { \ + CHECK_PACKED_FIELDS_27(fields); \ + CHECK_PACKED_FIELD(fields, 27); \ +} while (0) + +#define CHECK_PACKED_FIELDS_29(fields) do { \ + CHECK_PACKED_FIELDS_28(fields); \ + CHECK_PACKED_FIELD(fields, 28); \ +} while (0) + +#define CHECK_PACKED_FIELDS_30(fields) do { \ + CHECK_PACKED_FIELDS_29(fields); \ + CHECK_PACKED_FIELD(fields, 29); \ +} while (0) + +#define CHECK_PACKED_FIELDS_31(fields) do { \ + CHECK_PACKED_FIELDS_30(fields); \ + CHECK_PACKED_FIELD(fields, 30); \ +} while (0) + +#define CHECK_PACKED_FIELDS_32(fields) do { \ + CHECK_PACKED_FIELDS_31(fields); \ + CHECK_PACKED_FIELD(fields, 31); \ +} while (0) + +#define CHECK_PACKED_FIELDS_33(fields) do { \ + CHECK_PACKED_FIELDS_32(fields); \ + CHECK_PACKED_FIELD(fields, 32); \ +} while (0) + +#define CHECK_PACKED_FIELDS_34(fields) do { \ + CHECK_PACKED_FIELDS_33(fields); \ + CHECK_PACKED_FIELD(fields, 33); \ +} while (0) + +#define CHECK_PACKED_FIELDS_35(fields) do { \ + CHECK_PACKED_FIELDS_34(fields); \ + CHECK_PACKED_FIELD(fields, 34); \ +} while (0) + +#define CHECK_PACKED_FIELDS_36(fields) do { \ + CHECK_PACKED_FIELDS_35(fields); \ + CHECK_PACKED_FIELD(fields, 35); \ +} while (0) + +#define CHECK_PACKED_FIELDS_37(fields) do { \ + CHECK_PACKED_FIELDS_36(fields); \ + CHECK_PACKED_FIELD(fields, 36); \ +} while (0) + +#define CHECK_PACKED_FIELDS_38(fields) do { \ + CHECK_PACKED_FIELDS_37(fields); \ + CHECK_PACKED_FIELD(fields, 37); \ +} while (0) + +#define CHECK_PACKED_FIELDS_39(fields) do { \ + CHECK_PACKED_FIELDS_38(fields); \ + CHECK_PACKED_FIELD(fields, 38); \ +} while (0) + +#define CHECK_PACKED_FIELDS_40(fields) do { \ + CHECK_PACKED_FIELDS_39(fields); \ + CHECK_PACKED_FIELD(fields, 39); \ +} while (0) + +#define CHECK_PACKED_FIELDS_41(fields) do { \ + CHECK_PACKED_FIELDS_40(fields); \ + CHECK_PACKED_FIELD(fields, 40); \ +} while (0) + +#define CHECK_PACKED_FIELDS_42(fields) do { \ + CHECK_PACKED_FIELDS_41(fields); \ + CHECK_PACKED_FIELD(fields, 41); \ +} while (0) + +#define CHECK_PACKED_FIELDS_43(fields) do { \ + CHECK_PACKED_FIELDS_42(fields); \ + CHECK_PACKED_FIELD(fields, 42); \ +} while (0) + +#define CHECK_PACKED_FIELDS_44(fields) do { \ + CHECK_PACKED_FIELDS_43(fields); \ + CHECK_PACKED_FIELD(fields, 43); \ +} while (0) + +#define CHECK_PACKED_FIELDS_45(fields) do { \ + CHECK_PACKED_FIELDS_44(fields); \ + CHECK_PACKED_FIELD(fields, 44); \ +} while (0) + +#define CHECK_PACKED_FIELDS_46(fields) do { \ + CHECK_PACKED_FIELDS_45(fields); \ + CHECK_PACKED_FIELD(fields, 45); \ +} while (0) + +#define CHECK_PACKED_FIELDS_47(fields) do { \ + CHECK_PACKED_FIELDS_46(fields); \ + CHECK_PACKED_FIELD(fields, 46); \ +} while (0) + +#define CHECK_PACKED_FIELDS_48(fields) do { \ + CHECK_PACKED_FIELDS_47(fields); \ + CHECK_PACKED_FIELD(fields, 47); \ +} while (0) + +#define CHECK_PACKED_FIELDS_49(fields) do { \ + CHECK_PACKED_FIELDS_48(fields); \ + CHECK_PACKED_FIELD(fields, 48); \ +} while (0) + +#define CHECK_PACKED_FIELDS_50(fields) do { \ + CHECK_PACKED_FIELDS_49(fields); \ + CHECK_PACKED_FIELD(fields, 49); \ +} while (0) + +#define CHECK_PACKED_FIELDS(fields) \ + __builtin_choose_expr(ARRAY_SIZE(fields) == 1, ({ CHECK_PACKED_FIELDS_1(fields); }), \ + __builtin_choose_expr(ARRAY_SIZE(fields) == 2, ({ CHECK_PACKED_FIELDS_2(fields); }), \ + __builtin_choose_expr(ARRAY_SIZE(fields) == 3, ({ CHECK_PACKED_FIELDS_3(fields); }), \ + __builtin_choose_expr(ARRAY_SIZE(fields) == 4, ({ CHECK_PACKED_FIELDS_4(fields); }), \ + __builtin_choose_expr(ARRAY_SIZE(fields) == 5, ({ CHECK_PACKED_FIELDS_5(fields); }), \ + __builtin_choose_expr(ARRAY_SIZE(fields) == 6, ({ CHECK_PACKED_FIELDS_6(fields); }), \ + __builtin_choose_expr(ARRAY_SIZE(fields) == 7, ({ CHECK_PACKED_FIELDS_7(fields); }), \ + __builtin_choose_expr(ARRAY_SIZE(fields) == 8, ({ CHECK_PACKED_FIELDS_8(fields); }), \ + __builtin_choose_expr(ARRAY_SIZE(fields) == 9, ({ CHECK_PACKED_FIELDS_9(fields); }), \ + __builtin_choose_expr(ARRAY_SIZE(fields) == 10, ({ CHECK_PACKED_FIELDS_10(fields); }), \ + __builtin_choose_expr(ARRAY_SIZE(fields) == 11, ({ CHECK_PACKED_FIELDS_11(fields); }), \ + __builtin_choose_expr(ARRAY_SIZE(fields) == 12, ({ CHECK_PACKED_FIELDS_12(fields); }), \ + __builtin_choose_expr(ARRAY_SIZE(fields) == 13, ({ CHECK_PACKED_FIELDS_13(fields); }), \ + __builtin_choose_expr(ARRAY_SIZE(fields) == 14, ({ CHECK_PACKED_FIELDS_14(fields); }), \ + __builtin_choose_expr(ARRAY_SIZE(fields) == 15, ({ CHECK_PACKED_FIELDS_15(fields); }), \ + __builtin_choose_expr(ARRAY_SIZE(fields) == 16, ({ CHECK_PACKED_FIELDS_16(fields); }), \ + __builtin_choose_expr(ARRAY_SIZE(fields) == 17, ({ CHECK_PACKED_FIELDS_17(fields); }), \ + __builtin_choose_expr(ARRAY_SIZE(fields) == 18, ({ CHECK_PACKED_FIELDS_18(fields); }), \ + __builtin_choose_expr(ARRAY_SIZE(fields) == 19, ({ CHECK_PACKED_FIELDS_19(fields); }), \ + __builtin_choose_expr(ARRAY_SIZE(fields) == 20, ({ CHECK_PACKED_FIELDS_20(fields); }), \ + __builtin_choose_expr(ARRAY_SIZE(fields) == 21, ({ CHECK_PACKED_FIELDS_21(fields); }), \ + __builtin_choose_expr(ARRAY_SIZE(fields) == 22, ({ CHECK_PACKED_FIELDS_22(fields); }), \ + __builtin_choose_expr(ARRAY_SIZE(fields) == 23, ({ CHECK_PACKED_FIELDS_23(fields); }), \ + __builtin_choose_expr(ARRAY_SIZE(fields) == 24, ({ CHECK_PACKED_FIELDS_24(fields); }), \ + __builtin_choose_expr(ARRAY_SIZE(fields) == 25, ({ CHECK_PACKED_FIELDS_25(fields); }), \ + __builtin_choose_expr(ARRAY_SIZE(fields) == 26, ({ CHECK_PACKED_FIELDS_26(fields); }), \ + __builtin_choose_expr(ARRAY_SIZE(fields) == 27, ({ CHECK_PACKED_FIELDS_27(fields); }), \ + __builtin_choose_expr(ARRAY_SIZE(fields) == 28, ({ CHECK_PACKED_FIELDS_28(fields); }), \ + __builtin_choose_expr(ARRAY_SIZE(fields) == 29, ({ CHECK_PACKED_FIELDS_29(fields); }), \ + __builtin_choose_expr(ARRAY_SIZE(fields) == 30, ({ CHECK_PACKED_FIELDS_30(fields); }), \ + __builtin_choose_expr(ARRAY_SIZE(fields) == 31, ({ CHECK_PACKED_FIELDS_31(fields); }), \ + __builtin_choose_expr(ARRAY_SIZE(fields) == 32, ({ CHECK_PACKED_FIELDS_32(fields); }), \ + __builtin_choose_expr(ARRAY_SIZE(fields) == 33, ({ CHECK_PACKED_FIELDS_33(fields); }), \ + __builtin_choose_expr(ARRAY_SIZE(fields) == 34, ({ CHECK_PACKED_FIELDS_34(fields); }), \ + __builtin_choose_expr(ARRAY_SIZE(fields) == 35, ({ CHECK_PACKED_FIELDS_35(fields); }), \ + __builtin_choose_expr(ARRAY_SIZE(fields) == 36, ({ CHECK_PACKED_FIELDS_36(fields); }), \ + __builtin_choose_expr(ARRAY_SIZE(fields) == 37, ({ CHECK_PACKED_FIELDS_37(fields); }), \ + __builtin_choose_expr(ARRAY_SIZE(fields) == 38, ({ CHECK_PACKED_FIELDS_38(fields); }), \ + __builtin_choose_expr(ARRAY_SIZE(fields) == 39, ({ CHECK_PACKED_FIELDS_39(fields); }), \ + __builtin_choose_expr(ARRAY_SIZE(fields) == 40, ({ CHECK_PACKED_FIELDS_40(fields); }), \ + __builtin_choose_expr(ARRAY_SIZE(fields) == 41, ({ CHECK_PACKED_FIELDS_41(fields); }), \ + __builtin_choose_expr(ARRAY_SIZE(fields) == 42, ({ CHECK_PACKED_FIELDS_42(fields); }), \ + __builtin_choose_expr(ARRAY_SIZE(fields) == 43, ({ CHECK_PACKED_FIELDS_43(fields); }), \ + __builtin_choose_expr(ARRAY_SIZE(fields) == 44, ({ CHECK_PACKED_FIELDS_44(fields); }), \ + __builtin_choose_expr(ARRAY_SIZE(fields) == 45, ({ CHECK_PACKED_FIELDS_45(fields); }), \ + __builtin_choose_expr(ARRAY_SIZE(fields) == 46, ({ CHECK_PACKED_FIELDS_46(fields); }), \ + __builtin_choose_expr(ARRAY_SIZE(fields) == 47, ({ CHECK_PACKED_FIELDS_47(fields); }), \ + __builtin_choose_expr(ARRAY_SIZE(fields) == 48, ({ CHECK_PACKED_FIELDS_48(fields); }), \ + __builtin_choose_expr(ARRAY_SIZE(fields) == 49, ({ CHECK_PACKED_FIELDS_49(fields); }), \ + __builtin_choose_expr(ARRAY_SIZE(fields) == 50, ({ CHECK_PACKED_FIELDS_50(fields); }), \ + ({ BUILD_BUG_ON_MSG(1, "CHECK_PACKED_FIELDS() must be regenerated to support array sizes larger than 50."); }) \)))))))))))))))))))))))))))))))))))))))))))))))))) + +/* End of generated content */ + +#define pack_fields(pbuf, pbuflen, ustruct, fields, quirks) \ + ({ \ + CHECK_PACKED_FIELDS(fields); \ + CHECK_PACKED_FIELDS_SIZE((fields), (pbuflen)); \ + __builtin_choose_expr(__builtin_types_compatible_p(typeof(*fields), struct packed_field_u8), \ + pack_fields_u8((pbuf), (pbuflen), (ustruct), \ + (const struct packed_field_u8 *)(fields), \ + ARRAY_SIZE(fields), (quirks)), \ + __builtin_choose_expr(__builtin_types_compatible_p(typeof(*fields), struct packed_field_u16), \ + pack_fields_u16((pbuf), (pbuflen), (ustruct), \ + (const struct packed_field_u16 *)(fields), \ + ARRAY_SIZE(fields), (quirks)), \ + ({ BUILD_BUG_ON_MSG(1, "pack_fields called with an unrecognized fields array type."); (void)0; }))); \ + }) + +#define unpack_fields(pbuf, pbuflen, ustruct, fields, quirks) \ + ({ \ + CHECK_PACKED_FIELDS(fields); \ + CHECK_PACKED_FIELDS_SIZE((fields), (pbuflen)); \ + __builtin_choose_expr(__builtin_types_compatible_p(typeof(*fields), struct packed_field_u8), \ + unpack_fields_u8((pbuf), (pbuflen), (ustruct), \ + (const struct packed_field_u8 *)(fields), \ + ARRAY_SIZE(fields), (quirks)), \ + __builtin_choose_expr(__builtin_types_compatible_p(typeof(*fields), struct packed_field_u16), \ + unpack_fields_u16((pbuf), (pbuflen), (ustruct), \ + (const struct packed_field_u16 *)(fields), \ + ARRAY_SIZE(fields), (quirks)), \ + ({ BUILD_BUG_ON_MSG(1, "unpack_fields called with an unrecognized fields array type."); (void)0; }))); \ + }) + +#endif diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/kcompat_pldmfw.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/kcompat_pldmfw.c new file mode 100644 index 00000000000..2ae4ccb3aa9 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/kcompat_pldmfw.c @@ -0,0 +1,1134 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 1999 - 2026 Intel Corporation */ + +// SPDX-License-Identifier: GPL-2.0 +/* Copyright (C) 2020 - 2023 Intel Corporation. */ + +/* This is taken from upstream "lib/pldmfw/pldmfw.c" */ + +#include "kcompat.h" + +#ifdef HAVE_LINUX_UNALIGNED_HEADER +#include +#else /* HAVE_LINUX_UNALIGNED_HEADER */ +#include +#endif /* !HAVE_LINUX_UNALIGNED_HEADER */ +#include +#include +#include +#include +#include +#include +#include +#include + +#include "kcompat_pldmfw.h" + +#if IS_ENABLED(CONFIG_PLDMFW) +#error "CONFIG_PLDMFW is enabled, use builtin lib/pldmfw instead." +#endif + +/* This section is taken from upstream "lib/pldmfw/pldmfw_private.h" */ + +/* The following data structures define the layout of a firmware binary + * following the "PLDM For Firmware Update Specification", DMTF standard + * #DSP0267. + * + * pldmfw.c uses these structures to implement a simple engine that will parse + * a fw binary file in this format and perform a firmware update for a given + * device. + * + * Due to the variable sized data layout, alignment of fields within these + * structures is not guaranteed when reading. For this reason, all multi-byte + * field accesses should be done using the unaligned access macros. + * Additionally, the standard specifies that multi-byte fields are in + * LittleEndian format. + * + * The structure definitions are not made public, in order to keep direct + * accesses within code that is prepared to deal with the limitation of + * unaligned access. + */ + +/* UUID for PLDM firmware packages: f018878c-cb7d-4943-9800-a02f059aca02 */ +static const uuid_t pldm_firmware_header_id = + UUID_INIT(0xf018878c, 0xcb7d, 0x4943, + 0x98, 0x00, 0xa0, 0x2f, 0x05, 0x9a, 0xca, 0x02); + +/* Revision number of the PLDM header format this code supports */ +#define PACKAGE_HEADER_FORMAT_REVISION 0x01 + +/* timestamp104 structure defined in PLDM Base specification */ +#define PLDM_TIMESTAMP_SIZE 13 +struct __pldm_timestamp { + u8 b[PLDM_TIMESTAMP_SIZE]; +}; + +/* Package Header Information */ +struct __pldm_header { + uuid_t id; /* PackageHeaderIdentifier */ + u8 revision; /* PackageHeaderFormatRevision */ + __le16 size; /* PackageHeaderSize */ + struct __pldm_timestamp release_date; /* PackageReleaseDateTime */ + __le16 component_bitmap_len; /* ComponentBitmapBitLength */ + u8 version_type; /* PackageVersionStringType */ + u8 version_len; /* PackageVersionStringLength */ + + /* + * DSP0267 also includes the following variable length fields at the + * end of this structure: + * + * PackageVersionString, length is version_len. + * + * The total size of this section is + * sizeof(pldm_header) + version_len; + */ + u8 version_string[]; /* PackageVersionString */ +} __packed __aligned(1); + +/* Firmware Device ID Record */ +struct __pldmfw_record_info { + __le16 record_len; /* RecordLength */ + u8 descriptor_count; /* DescriptorCount */ + __le32 device_update_flags; /* DeviceUpdateOptionFlags */ + u8 version_type; /* ComponentImageSetVersionType */ + u8 version_len; /* ComponentImageSetVersionLength */ + __le16 package_data_len; /* FirmwareDevicePackageDataLength */ + + /* + * DSP0267 also includes the following variable length fields at the + * end of this structure: + * + * ApplicableComponents, length is component_bitmap_len from header + * ComponentImageSetVersionString, length is version_len + * RecordDescriptors, a series of TLVs with 16bit type and length + * FirmwareDevicePackageData, length is package_data_len + * + * The total size of each record is + * sizeof(pldmfw_record_info) + + * component_bitmap_len (converted to bytes!) + + * version_len + + * + + * package_data_len + */ + u8 variable_record_data[]; +} __packed __aligned(1); + +/* Firmware Descriptor Definition */ +struct __pldmfw_desc_tlv { + __le16 type; /* DescriptorType */ + __le16 size; /* DescriptorSize */ + u8 data[]; /* DescriptorData */ +} __aligned(1); + +/* Firmware Device Identification Area */ +struct __pldmfw_record_area { + u8 record_count; /* DeviceIDRecordCount */ + /* This is not a struct type because the size of each record varies */ + u8 records[]; +} __aligned(1); + +/* Individual Component Image Information */ +struct __pldmfw_component_info { + __le16 classification; /* ComponentClassfication */ + __le16 identifier; /* ComponentIdentifier */ + __le32 comparison_stamp; /* ComponentComparisonStamp */ + __le16 options; /* componentOptions */ + __le16 activation_method; /* RequestedComponentActivationMethod */ + __le32 location_offset; /* ComponentLocationOffset */ + __le32 size; /* ComponentSize */ + u8 version_type; /* ComponentVersionStringType */ + u8 version_len; /* ComponentVersionStringLength */ + + /* + * DSP0267 also includes the following variable length fields at the + * end of this structure: + * + * ComponentVersionString, length is version_len + * + * The total size of this section is + * sizeof(pldmfw_component_info) + version_len; + */ + u8 version_string[]; /* ComponentVersionString */ +} __packed __aligned(1); + +/* Component Image Information Area */ +struct __pldmfw_component_area { + __le16 component_image_count; + /* This is not a struct type because the component size varies */ + u8 components[]; +} __aligned(1); + +/** + * pldm_first_desc_tlv + * @start: byte offset of the start of the descriptor TLVs + * + * Converts the starting offset of the descriptor TLVs into a pointer to the + * first descriptor. + */ +#define pldm_first_desc_tlv(start) \ + ((const struct __pldmfw_desc_tlv *)(start)) + +/** + * pldm_desc_tlv_member + * @desc: pointer to a descriptor TLV + * @member: name of member to give pointer to + * + * Yields pointer to @member within, possibly unaligned, @desc + */ +#define pldm_desc_tlv_member(desc, member) \ + ((const u8 *)(desc) + offsetof(struct __pldmfw_desc_tlv, member)) + +/** + * pldm_next_desc_tlv + * @desc: pointer to a descriptor TLV + * + * Finds the pointer to the next descriptor following a given descriptor + */ +#define pldm_next_desc_tlv(desc) \ + ({ const void *desc_ = (desc); \ + ((const struct __pldmfw_desc_tlv *)( \ + pldm_desc_tlv_member(desc_, data) \ + + get_unaligned_le16(pldm_desc_tlv_member(desc_, size)))); }) + +/** + * pldm_for_each_desc_tlv + * @i: variable to store descriptor index + * @desc: variable to store descriptor pointer + * @start: byte offset of the start of the descriptors + * @count: the number of descriptors + * + * for loop macro to iterate over all of the descriptors of a given PLDM + * record. + */ +#define pldm_for_each_desc_tlv(i, desc, start, count) \ + for ((i) = 0, (desc) = pldm_first_desc_tlv(start); \ + (i) < (count); \ + (i)++, (desc) = pldm_next_desc_tlv(desc)) + +/** + * pldm_first_record + * @start: byte offset of the start of the PLDM records + * + * Converts a starting offset of the PLDM records into a pointer to the first + * record. + */ +#define pldm_first_record(start) \ + ((const struct __pldmfw_record_info *)(start)) + +/** + * pldm_next_record + * @record: pointer to a PLDM record + * + * Finds a pointer to the next record following a given record + */ +#define pldm_next_record(record) \ + ((const struct __pldmfw_record_info *) \ + ((const u8 *)(record) + get_unaligned_le16(&(record)->record_len))) + +/** + * pldm_for_each_record + * @i: variable to store record index + * @record: variable to store record pointer + * @start: byte offset of the start of the records + * @count: the number of records + * + * for loop macro to iterate over all of the records of a PLDM file. + */ +#define pldm_for_each_record(i, record, start, count) \ + for ((i) = 0, (record) = pldm_first_record(start); \ + (i) < (count); \ + (i)++, (record) = pldm_next_record(record)) + +/** + * pldm_first_component + * @start: byte offset of the start of the PLDM components + * + * Convert a starting offset of the PLDM components into a pointer to the + * first component + */ +#define pldm_first_component(start) \ + ((const struct __pldmfw_component_info *)(start)) + +/** + * pldm_next_component + * @component: pointer to a PLDM component + * + * Finds a pointer to the next component following a given component + */ +#define pldm_next_component(component) \ + ((const struct __pldmfw_component_info *)((component)->version_string + \ + (component)->version_len)) + +/** + * pldm_for_each_component + * @i: variable to store component index + * @component: variable to store component pointer + * @start: byte offset to the start of the first component + * @count: the number of components + * + * for loop macro to iterate over all of the components of a PLDM file. + */ +#define pldm_for_each_component(i, component, start, count) \ + for ((i) = 0, (component) = pldm_first_component(start); \ + (i) < (count); \ + (i)++, (component) = pldm_next_component(component)) + +/* End of lib/pldmfw/pldmfw_private.h */ + +/* Internal structure used to store details about the PLDM image file as it is + * being validated and processed. + */ +struct pldmfw_priv { + struct pldmfw *context; + const struct firmware *fw; + + /* current offset of firmware image */ + size_t offset; + + struct list_head records; + struct list_head components; + + /* PLDM Firmware Package Header */ + const struct __pldm_header *header; + u16 total_header_size; + + /* length of the component bitmap */ + u16 component_bitmap_len; + u16 bitmap_size; + + /* Start of the component image information */ + u16 component_count; + const u8 *component_start; + + /* Start pf the firmware device id records */ + const u8 *record_start; + u8 record_count; + + /* The CRC at the end of the package header */ + u32 header_crc; + + struct pldmfw_record *matching_record; +}; + +/** + * pldm_check_fw_space - Verify that the firmware image has space left + * @data: pointer to private data + * @offset: offset to start from + * @length: length to check for + * + * Verify that the firmware data can hold a chunk of bytes with the specified + * offset and length. + * + * Returns: zero on success, or -EFAULT if the image does not have enough + * space left to fit the expected length. + */ +static int +pldm_check_fw_space(struct pldmfw_priv *data, size_t offset, size_t length) +{ + size_t expected_size = offset + length; + struct device *dev = data->context->dev; + + if (data->fw->size < expected_size) { + dev_dbg(dev, "Firmware file size smaller than expected. Got %zu bytes, needed %zu bytes\n", + data->fw->size, expected_size); + return -EFAULT; + } + + return 0; +} + +/** + * pldm_move_fw_offset - Move the current firmware offset forward + * @data: pointer to private data + * @bytes_to_move: number of bytes to move the offset forward by + * + * Check that there is enough space past the current offset, and then move the + * offset forward by this ammount. + * + * Returns: zero on success, or -EFAULT if the image is too small to fit the + * expected length. + */ +static int +pldm_move_fw_offset(struct pldmfw_priv *data, size_t bytes_to_move) +{ + int err; + + err = pldm_check_fw_space(data, data->offset, bytes_to_move); + if (err) + return err; + + data->offset += bytes_to_move; + + return 0; +} + +/** + * pldm_parse_header - Validate and extract details about the PLDM header + * @data: pointer to private data + * + * Performs initial basic verification of the PLDM image, up to the first + * firmware record. + * + * This includes the following checks and extractions + * + * * Verify that the UUID at the start of the header matches the expected + * value as defined in the DSP0267 PLDM specification + * * Check that the revision is 0x01 + * * Extract the total header_size and verify that the image is large enough + * to contain at least the length of this header + * * Extract the size of the component bitmap length + * * Extract a pointer to the start of the record area + * + * Returns: zero on success, or a negative error code on failure. + */ +static int pldm_parse_header(struct pldmfw_priv *data) +{ + const struct __pldmfw_record_area *record_area; + struct device *dev = data->context->dev; + const struct __pldm_header *header; + size_t header_size; + int err; + + err = pldm_move_fw_offset(data, sizeof(*header)); + if (err) + return err; + + header = (const struct __pldm_header *)data->fw->data; + data->header = header; + + if (!uuid_equal(&header->id, &pldm_firmware_header_id)) { + dev_dbg(dev, "Invalid package header identifier. Expected UUID %pUB, but got %pUB\n", + &pldm_firmware_header_id, &header->id); + return -EINVAL; + } + + if (header->revision != PACKAGE_HEADER_FORMAT_REVISION) { + dev_dbg(dev, "Invalid package header revision. Expected revision %u but got %u\n", + PACKAGE_HEADER_FORMAT_REVISION, header->revision); + return -EOPNOTSUPP; + } + + data->total_header_size = get_unaligned_le16(&header->size); + header_size = data->total_header_size - sizeof(*header); + + err = pldm_check_fw_space(data, data->offset, header_size); + if (err) + return err; + + data->component_bitmap_len = + get_unaligned_le16(&header->component_bitmap_len); + + if (data->component_bitmap_len % 8 != 0) { + dev_dbg(dev, "Invalid component bitmap length. The length is %u, which is not a multiple of 8\n", + data->component_bitmap_len); + return -EINVAL; + } + + data->bitmap_size = data->component_bitmap_len / 8; + + err = pldm_move_fw_offset(data, header->version_len); + if (err) + return err; + + /* extract a pointer to the record area, which just follows the main + * PLDM header data. + */ + record_area = (const struct __pldmfw_record_area *)(data->fw->data + + data->offset); + + err = pldm_move_fw_offset(data, sizeof(*record_area)); + if (err) + return err; + + data->record_count = record_area->record_count; + data->record_start = record_area->records; + + return 0; +} + +/** + * pldm_check_desc_tlv_len - Check that the length matches expectation + * @data: pointer to image details + * @type: the descriptor type + * @size: the length from the descriptor header + * + * If the descriptor type is one of the documented descriptor types according + * to the standard, verify that the provided length matches. + * + * If the type is not recognized or is VENDOR_DEFINED, return zero. + * + * Returns: zero on success, or -EINVAL if the specified size of a standard + * TLV does not match the expected value defined for that TLV. + */ +static int +pldm_check_desc_tlv_len(struct pldmfw_priv *data, u16 type, u16 size) +{ + struct device *dev = data->context->dev; + u16 expected_size; + + switch (type) { + case PLDM_DESC_ID_PCI_VENDOR_ID: + case PLDM_DESC_ID_PCI_DEVICE_ID: + case PLDM_DESC_ID_PCI_SUBVENDOR_ID: + case PLDM_DESC_ID_PCI_SUBDEV_ID: + expected_size = 2; + break; + case PLDM_DESC_ID_PCI_REVISION_ID: + expected_size = 1; + break; + case PLDM_DESC_ID_PNP_VENDOR_ID: + expected_size = 3; + break; + case PLDM_DESC_ID_IANA_ENTERPRISE_ID: + case PLDM_DESC_ID_ACPI_VENDOR_ID: + case PLDM_DESC_ID_PNP_PRODUCT_ID: + case PLDM_DESC_ID_ACPI_PRODUCT_ID: + expected_size = 4; + break; + case PLDM_DESC_ID_UUID: + expected_size = 16; + break; + case PLDM_DESC_ID_VENDOR_DEFINED: + return 0; + default: + /* Do not report an error on an unexpected TLV */ + dev_dbg(dev, "Found unrecognized TLV type 0x%04x\n", type); + return 0; + } + + if (size != expected_size) { + dev_dbg(dev, "Found TLV type 0x%04x with unexpected length. Got %u bytes, but expected %u bytes\n", + type, size, expected_size); + return -EINVAL; + } + + return 0; +} + +/** + * pldm_parse_desc_tlvs - Check and skip past a number of TLVs + * @data: pointer to private data + * @record: pointer to the record this TLV belongs too + * @desc_count: descriptor count + * + * From the current offset, read and extract the descriptor TLVs, updating the + * current offset each time. + * + * Returns: zero on success, or a negative error code on failure. + */ +static int +pldm_parse_desc_tlvs(struct pldmfw_priv *data, struct pldmfw_record *record, u8 desc_count) +{ + const struct __pldmfw_desc_tlv *__desc; + const u8 *desc_start; + u8 i; + + desc_start = data->fw->data + data->offset; + + pldm_for_each_desc_tlv(i, __desc, desc_start, desc_count) { + struct pldmfw_desc_tlv *desc; + int err; + u16 type, size; + + err = pldm_move_fw_offset(data, sizeof(*__desc)); + if (err) + return err; + + type = get_unaligned_le16(pldm_desc_tlv_member(__desc, type)); + + /* According to DSP0267, this only includes the data field */ + size = get_unaligned_le16(pldm_desc_tlv_member(__desc, size)); + + err = pldm_check_desc_tlv_len(data, type, size); + if (err) + return err; + + /* check that we have space and move the offset forward */ + err = pldm_move_fw_offset(data, size); + if (err) + return err; + + desc = (struct pldmfw_desc_tlv *)kzalloc(sizeof(*desc), GFP_KERNEL); + if (!desc) + return -ENOMEM; + + desc->type = type; + desc->size = size; + desc->data = pldm_desc_tlv_member(__desc, data); + + list_add_tail(&desc->entry, &record->descs); + } + + return 0; +} + +/** + * pldm_parse_one_record - Verify size of one PLDM record + * @data: pointer to image details + * @__record: pointer to the record to check + * + * This function checks that the record size does not exceed either the size + * of the firmware file or the total length specified in the header section. + * + * It also verifies that the recorded length of the start of the record + * matches the size calculated by adding the static structure length, the + * component bitmap length, the version string length, the length of all + * descriptor TLVs, and the length of the package data. + * + * Returns: zero on success, or a negative error code on failure. + */ +static int +pldm_parse_one_record(struct pldmfw_priv *data, + const struct __pldmfw_record_info *__record) +{ + struct pldmfw_record *record; + size_t measured_length; + int err; + const u8 *bitmap_ptr; + u16 record_len; + int i; + + /* Make a copy and insert it into the record list */ + record = (struct pldmfw_record *)kzalloc(sizeof(*record), GFP_KERNEL); + if (!record) + return -ENOMEM; + + INIT_LIST_HEAD(&record->descs); + list_add_tail(&record->entry, &data->records); + + /* Then check that we have space and move the offset */ + err = pldm_move_fw_offset(data, sizeof(*__record)); + if (err) + return err; + + record_len = get_unaligned_le16(&__record->record_len); + record->package_data_len = get_unaligned_le16(&__record->package_data_len); + record->version_len = __record->version_len; + record->version_type = __record->version_type; + + bitmap_ptr = data->fw->data + data->offset; + + /* check that we have space for the component bitmap length */ + err = pldm_move_fw_offset(data, data->bitmap_size); + if (err) + return err; + + record->component_bitmap_len = data->component_bitmap_len; + record->component_bitmap = bitmap_zalloc(record->component_bitmap_len, + GFP_KERNEL); + if (!record->component_bitmap) + return -ENOMEM; + + for (i = 0; i < data->bitmap_size; i++) + bitmap_set_value8(record->component_bitmap, bitmap_ptr[i], i * 8); + + record->version_string = data->fw->data + data->offset; + + err = pldm_move_fw_offset(data, record->version_len); + if (err) + return err; + + /* Scan through the descriptor TLVs and find the end */ + err = pldm_parse_desc_tlvs(data, record, __record->descriptor_count); + if (err) + return err; + + record->package_data = data->fw->data + data->offset; + + err = pldm_move_fw_offset(data, record->package_data_len); + if (err) + return err; + + measured_length = data->offset - ((const u8 *)__record - data->fw->data); + if (measured_length != record_len) { + dev_dbg(data->context->dev, "Unexpected record length. Measured record length is %zu bytes, expected length is %u bytes\n", + measured_length, record_len); + return -EFAULT; + } + + return 0; +} + +/** + * pldm_parse_records - Locate the start of the component area + * @data: pointer to private data + * + * Extract the record count, and loop through each record, searching for the + * component area. + * + * Returns: zero on success, or a negative error code on failure. + */ +static int pldm_parse_records(struct pldmfw_priv *data) +{ + const struct __pldmfw_component_area *component_area; + const struct __pldmfw_record_info *record; + int err; + u8 i; + + pldm_for_each_record(i, record, data->record_start, data->record_count) { + err = pldm_parse_one_record(data, record); + if (err) + return err; + } + + /* Extract a pointer to the component area, which just follows the + * PLDM device record data. + */ + component_area = (const struct __pldmfw_component_area *)(data->fw->data + data->offset); + + err = pldm_move_fw_offset(data, sizeof(*component_area)); + if (err) + return err; + + data->component_count = + get_unaligned_le16(&component_area->component_image_count); + data->component_start = component_area->components; + + return 0; +} + +/** + * pldm_parse_components - Locate the CRC header checksum + * @data: pointer to private data + * + * Extract the component count, and find the pointer to the component area. + * Scan through each component searching for the end, which should point to + * the package header checksum. + * + * Extract the package header CRC and save it for verification. + * + * Returns: zero on success, or a negative error code on failure. + */ +static int pldm_parse_components(struct pldmfw_priv *data) +{ + const struct __pldmfw_component_info *__component; + struct device *dev = data->context->dev; + const u8 *header_crc_ptr; + int err; + u8 i; + + pldm_for_each_component(i, __component, data->component_start, data->component_count) { + struct pldmfw_component *component; + u32 offset, size; + + err = pldm_move_fw_offset(data, sizeof(*__component)); + if (err) + return err; + + err = pldm_move_fw_offset(data, __component->version_len); + if (err) + return err; + + offset = get_unaligned_le32(&__component->location_offset); + size = get_unaligned_le32(&__component->size); + + err = pldm_check_fw_space(data, offset, size); + if (err) + return err; + + component = (struct pldmfw_component *)kzalloc(sizeof(*component), GFP_KERNEL); + if (!component) + return -ENOMEM; + + component->index = i; + component->classification = get_unaligned_le16(&__component->classification); + component->identifier = get_unaligned_le16(&__component->identifier); + component->comparison_stamp = get_unaligned_le32(&__component->comparison_stamp); + component->options = get_unaligned_le16(&__component->options); + component->activation_method = get_unaligned_le16(&__component->activation_method); + component->version_type = __component->version_type; + component->version_len = __component->version_len; + component->version_string = __component->version_string; + component->component_data = data->fw->data + offset; + component->component_size = size; + + list_add_tail(&component->entry, &data->components); + } + + header_crc_ptr = data->fw->data + data->offset; + + err = pldm_move_fw_offset(data, sizeof(data->header_crc)); + if (err) + return err; + + /* Make sure that we reached the expected offset */ + if (data->offset != data->total_header_size) { + dev_dbg(dev, "Invalid firmware header size. Expected %u but got %zu\n", + data->total_header_size, data->offset); + return -EFAULT; + } + + data->header_crc = get_unaligned_le32(header_crc_ptr); + + return 0; +} + +/** + * pldm_verify_header_crc - Verify that the CRC in the header matches + * @data: pointer to private data + * + * Calculates the 32-bit CRC using the standard IEEE 802.3 CRC polynomial and + * compares it to the value stored in the header. + * + * Returns: zero on success if the CRC matches, or -EBADMSG on an invalid CRC. + */ +static int pldm_verify_header_crc(struct pldmfw_priv *data) +{ + struct device *dev = data->context->dev; + u32 calculated_crc; + size_t length; + + /* Calculate the 32-bit CRC of the header header contents up to but + * not including the checksum. Note that the Linux crc32_le function + * does not perform an expected final XOR. + */ + length = data->offset - sizeof(data->header_crc); + calculated_crc = crc32_le(~0, data->fw->data, length) ^ ~0; + + if (calculated_crc != data->header_crc) { + dev_dbg(dev, "Invalid CRC in firmware header. Got 0x%08x but expected 0x%08x\n", + calculated_crc, data->header_crc); + return -EBADMSG; + } + + return 0; +} + +/** + * pldmfw_free_priv - Free memory allocated while parsing the PLDM image + * @data: pointer to the PLDM data structure + * + * Loops through and clears all allocated memory associated with each + * allocated descriptor, record, and component. + */ +static void pldmfw_free_priv(struct pldmfw_priv *data) +{ + struct pldmfw_component *component, *c_safe; + struct pldmfw_record *record, *r_safe; + struct pldmfw_desc_tlv *desc, *d_safe; + + list_for_each_entry_safe(component, c_safe, &data->components, entry) { + list_del(&component->entry); + kfree(component); + } + + list_for_each_entry_safe(record, r_safe, &data->records, entry) { + list_for_each_entry_safe(desc, d_safe, &record->descs, entry) { + list_del(&desc->entry); + kfree(desc); + } + + if (record->component_bitmap) { + bitmap_free(record->component_bitmap); + record->component_bitmap = NULL; + } + + list_del(&record->entry); + kfree(record); + } +} + +/** + * pldm_parse_image - parse and extract details from PLDM image + * @data: pointer to private data + * + * Verify that the firmware file contains valid data for a PLDM firmware + * file. Extract useful pointers and data from the firmware file and store + * them in the data structure. + * + * The PLDM firmware file format is defined in DMTF DSP0267 1.0.0. Care + * should be taken to use get_unaligned_le* when accessing data from the + * pointers in data. + * + * Returns: zero on success, or a negative error code on failure. + */ +static int pldm_parse_image(struct pldmfw_priv *data) +{ + int err; + + if (WARN_ON(!(data->context->dev && data->fw->data && data->fw->size))) + return -EINVAL; + + err = pldm_parse_header(data); + if (err) + return err; + + err = pldm_parse_records(data); + if (err) + return err; + + err = pldm_parse_components(data); + if (err) + return err; + + return pldm_verify_header_crc(data); +} + +/* these are u32 so that we can store PCI_ANY_ID */ +struct pldm_pci_record_id { + int vendor; + int device; + int subsystem_vendor; + int subsystem_device; +}; + +/** + * pldmfw_op_pci_match_record - Check if a PCI device matches the record + * @context: PLDM fw update structure + * @record: list of records extracted from the PLDM image + * + * Determine of the PCI device associated with this device matches the record + * data provided. + * + * Searches the descriptor TLVs and extracts the relevant descriptor data into + * a pldm_pci_record_id. This is then compared against the PCI device ID + * information. + * + * Returns: true if the device matches the record, false otherwise. + */ +bool pldmfw_op_pci_match_record(struct pldmfw *context, struct pldmfw_record *record) +{ + struct pci_dev *pdev = to_pci_dev(context->dev); + struct pldm_pci_record_id id = { + .vendor = PCI_ANY_ID, + .device = PCI_ANY_ID, + .subsystem_vendor = PCI_ANY_ID, + .subsystem_device = PCI_ANY_ID, + }; + struct pldmfw_desc_tlv *desc; + + list_for_each_entry(desc, &record->descs, entry) { + u16 value; + int *ptr; + + switch (desc->type) { + case PLDM_DESC_ID_PCI_VENDOR_ID: + ptr = &id.vendor; + break; + case PLDM_DESC_ID_PCI_DEVICE_ID: + ptr = &id.device; + break; + case PLDM_DESC_ID_PCI_SUBVENDOR_ID: + ptr = &id.subsystem_vendor; + break; + case PLDM_DESC_ID_PCI_SUBDEV_ID: + ptr = &id.subsystem_device; + break; + default: + /* Skip unrelated TLVs */ + continue; + } + + value = get_unaligned_le16(desc->data); + /* A value of zero for one of the descriptors is sometimes + * used when the record should ignore this field when matching + * device. For example if the record applies to any subsystem + * device or vendor. + */ + if (value) + *ptr = (int)value; + else + *ptr = PCI_ANY_ID; + } + + if ((id.vendor == PCI_ANY_ID || id.vendor == pdev->vendor) && + (id.device == PCI_ANY_ID || id.device == pdev->device) && + (id.subsystem_vendor == PCI_ANY_ID || id.subsystem_vendor == pdev->subsystem_vendor) && + (id.subsystem_device == PCI_ANY_ID || id.subsystem_device == pdev->subsystem_device)) + return true; + else + return false; +} + +/** + * pldm_find_matching_record - Find the first matching PLDM record + * @data: pointer to private data + * + * Search through PLDM records and find the first matching entry. It is + * expected that only one entry matches. + * + * Store a pointer to the matching record, if found. + * + * Returns: zero on success, or -ENOENT if no matching record is found. + */ +static int pldm_find_matching_record(struct pldmfw_priv *data) +{ + struct pldmfw_record *record; + + list_for_each_entry(record, &data->records, entry) { + if (data->context->ops->match_record(data->context, record)) { + data->matching_record = record; + return 0; + } + } + + return -ENOENT; +} + +/** + * pldm_send_package_data - Send firmware the package data for the record + * @data: pointer to private data + * + * Send the package data associated with the matching record to the firmware, + * using the send_pkg_data operation. + * + * Returns: zero on success, or a negative error code on failure. + */ +static int +pldm_send_package_data(struct pldmfw_priv *data) +{ + struct pldmfw_record *record = data->matching_record; + const struct pldmfw_ops *ops = data->context->ops; + + return ops->send_package_data(data->context, record->package_data, + record->package_data_len); +} + +/** + * pldm_send_component_tables - Send component table information to firmware + * @data: pointer to private data + * + * Loop over each component, sending the applicable components to the firmware + * via the send_component_table operation. + * + * Returns: zero on success, or a negative error code on failure. + */ +static int +pldm_send_component_tables(struct pldmfw_priv *data) +{ + unsigned long *bitmap = data->matching_record->component_bitmap; + struct pldmfw_component *component; + int err; + + list_for_each_entry(component, &data->components, entry) { + u8 index = component->index, transfer_flag = 0; + + /* Skip components which are not intended for this device */ + if (!test_bit(index, bitmap)) + continue; + + /* determine whether this is the start, middle, end, or both + * the start and end of the component tables + */ + if (index == find_first_bit(bitmap, data->component_bitmap_len)) + transfer_flag |= PLDM_TRANSFER_FLAG_START; + if (index == find_last_bit(bitmap, data->component_bitmap_len)) + transfer_flag |= PLDM_TRANSFER_FLAG_END; + if (!transfer_flag) + transfer_flag = PLDM_TRANSFER_FLAG_MIDDLE; + + err = data->context->ops->send_component_table(data->context, + component, + transfer_flag); + if (err) + return err; + } + + return 0; +} + +/** + * pldm_flash_components - Program each component to device flash + * @data: pointer to private data + * + * Loop through each component that is active for the matching device record, + * and send it to the device driver for flashing. + * + * Returns: zero on success, or a negative error code on failure. + */ +static int pldm_flash_components(struct pldmfw_priv *data) +{ + unsigned long *bitmap = data->matching_record->component_bitmap; + struct pldmfw_component *component; + int err; + + list_for_each_entry(component, &data->components, entry) { + u8 index = component->index; + + /* Skip components which are not intended for this device */ + if (!test_bit(index, bitmap)) + continue; + + err = data->context->ops->flash_component(data->context, component); + if (err) + return err; + } + + return 0; +} + +/** + * pldm_finalize_update - Finalize the device flash update + * @data: pointer to private data + * + * Tell the device driver to perform any remaining logic to complete the + * device update. + * + * Returns: zero on success, or a PLFM_FWU error indicating the reason for + * failure. + */ +static int pldm_finalize_update(struct pldmfw_priv *data) +{ + if (data->context->ops->finalize_update) + return data->context->ops->finalize_update(data->context); + + return 0; +} + +/** + * pldmfw_flash_image - Write a PLDM-formatted firmware image to the device + * @context: ops and data for firmware update + * @fw: firmware object pointing to the relevant firmware file to program + * + * Parse the data for a given firmware file, verifying that it is a valid PLDM + * formatted image that matches this device. + * + * Extract the device record Package Data and Component Tables and send them + * to the device firmware. Extract and write the flash data for each of the + * components indicated in the firmware file. + * + * Returns: zero on success, or a negative error code on failure. + */ +int pldmfw_flash_image(struct pldmfw *context, const struct firmware *fw) +{ + struct pldmfw_priv *data; + int err; + + data = (struct pldmfw_priv *)kzalloc(sizeof(*data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + INIT_LIST_HEAD(&data->records); + INIT_LIST_HEAD(&data->components); + + data->fw = fw; + data->context = context; + + err = pldm_parse_image(data); + if (err) + goto out_release_data; + + err = pldm_find_matching_record(data); + if (err) + goto out_release_data; + + err = pldm_send_package_data(data); + if (err) + goto out_release_data; + + err = pldm_send_component_tables(data); + if (err) + goto out_release_data; + + err = pldm_flash_components(data); + if (err) + goto out_release_data; + + err = pldm_finalize_update(data); + +out_release_data: + pldmfw_free_priv(data); + kfree(data); + + return err; +} diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/kcompat_pldmfw.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/kcompat_pldmfw.h new file mode 100644 index 00000000000..a13c346450f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/kcompat_pldmfw.h @@ -0,0 +1,178 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 1999 - 2026 Intel Corporation */ + +/* SPDX-License-Identifier: GPL-2.0 */ +/* Copyright (C) 2021 - 2023 Intel Corporation. */ + +/* This is taken from upstream */ + +#ifndef _KCOMPAT_PLDMFW_H_ +#define _KCOMPAT_PLDMFW_H_ + +#ifdef _PLDMFW_H_ +#error "Do not include both kcompat_pldmfw.h and " +#endif + +#if IS_ENABLED(CONFIG_PLDMFW) +#error "CONFIG_PLDMFW is enabled, use " +#endif + +#include +#include + +#define PLDM_DEVICE_UPDATE_CONTINUE_AFTER_FAIL BIT(0) + +#define PLDM_STRING_TYPE_UNKNOWN 0 +#define PLDM_STRING_TYPE_ASCII 1 +#define PLDM_STRING_TYPE_UTF8 2 +#define PLDM_STRING_TYPE_UTF16 3 +#define PLDM_STRING_TYPE_UTF16LE 4 +#define PLDM_STRING_TYPE_UTF16BE 5 + +struct pldmfw_record { + struct list_head entry; + + /* List of descriptor TLVs */ + struct list_head descs; + + /* Component Set version string*/ + const u8 *version_string; + u8 version_type; + u8 version_len; + + /* Package Data length */ + u16 package_data_len; + + /* Bitfield of Device Update Flags */ + u32 device_update_flags; + + /* Package Data block */ + const u8 *package_data; + + /* Bitmap of components applicable to this record */ + unsigned long *component_bitmap; + u16 component_bitmap_len; +}; + +/* Standard descriptor TLV identifiers */ +#define PLDM_DESC_ID_PCI_VENDOR_ID 0x0000 +#define PLDM_DESC_ID_IANA_ENTERPRISE_ID 0x0001 +#define PLDM_DESC_ID_UUID 0x0002 +#define PLDM_DESC_ID_PNP_VENDOR_ID 0x0003 +#define PLDM_DESC_ID_ACPI_VENDOR_ID 0x0004 +#define PLDM_DESC_ID_PCI_DEVICE_ID 0x0100 +#define PLDM_DESC_ID_PCI_SUBVENDOR_ID 0x0101 +#define PLDM_DESC_ID_PCI_SUBDEV_ID 0x0102 +#define PLDM_DESC_ID_PCI_REVISION_ID 0x0103 +#define PLDM_DESC_ID_PNP_PRODUCT_ID 0x0104 +#define PLDM_DESC_ID_ACPI_PRODUCT_ID 0x0105 +#define PLDM_DESC_ID_VENDOR_DEFINED 0xFFFF + +struct pldmfw_desc_tlv { + struct list_head entry; + + const u8 *data; + u16 type; + u16 size; +}; + +#define PLDM_CLASSIFICATION_UNKNOWN 0x0000 +#define PLDM_CLASSIFICATION_OTHER 0x0001 +#define PLDM_CLASSIFICATION_DRIVER 0x0002 +#define PLDM_CLASSIFICATION_CONFIG_SW 0x0003 +#define PLDM_CLASSIFICATION_APP_SW 0x0004 +#define PLDM_CLASSIFICATION_INSTRUMENTATION 0x0005 +#define PLDM_CLASSIFICATION_BIOS 0x0006 +#define PLDM_CLASSIFICATION_DIAGNOSTIC_SW 0x0007 +#define PLDM_CLASSIFICATION_OS 0x0008 +#define PLDM_CLASSIFICATION_MIDDLEWARE 0x0009 +#define PLDM_CLASSIFICATION_FIRMWARE 0x000A +#define PLDM_CLASSIFICATION_CODE 0x000B +#define PLDM_CLASSIFICATION_SERVICE_PACK 0x000C +#define PLDM_CLASSIFICATION_SOFTWARE_BUNDLE 0x000D + +#define PLDM_ACTIVATION_METHOD_AUTO BIT(0) +#define PLDM_ACTIVATION_METHOD_SELF_CONTAINED BIT(1) +#define PLDM_ACTIVATION_METHOD_MEDIUM_SPECIFIC BIT(2) +#define PLDM_ACTIVATION_METHOD_REBOOT BIT(3) +#define PLDM_ACTIVATION_METHOD_DC_CYCLE BIT(4) +#define PLDM_ACTIVATION_METHOD_AC_CYCLE BIT(5) + +#define PLDMFW_COMPONENT_OPTION_FORCE_UPDATE BIT(0) +#define PLDMFW_COMPONENT_OPTION_USE_COMPARISON_STAMP BIT(1) + +struct pldmfw_component { + struct list_head entry; + + /* component identifier */ + u16 classification; + u16 identifier; + + u16 options; + u16 activation_method; + + u32 comparison_stamp; + + u32 component_size; + const u8 *component_data; + + /* Component version string */ + const u8 *version_string; + u8 version_type; + u8 version_len; + + /* component index */ + u8 index; + +}; + +/* Transfer flag used for sending components to the firmware */ +#define PLDM_TRANSFER_FLAG_START BIT(0) +#define PLDM_TRANSFER_FLAG_MIDDLE BIT(1) +#define PLDM_TRANSFER_FLAG_END BIT(2) + +struct pldmfw_ops; + +/* Main entry point to the PLDM firmware update engine. Device drivers + * should embed this in a private structure and use container_of to obtain + * a pointer to their own data, used to implement the device specific + * operations. + */ +struct pldmfw { + const struct pldmfw_ops *ops; + struct device *dev; +}; + +bool pldmfw_op_pci_match_record(struct pldmfw *context, struct pldmfw_record *record); + +/* Operations invoked by the generic PLDM firmware update engine. Used to + * implement device specific logic. + * + * @match_record: check if the device matches the given record. For + * convenience, a standard implementation is provided for PCI devices. + * + * @send_package_data: send the package data associated with the matching + * record to firmware. + * + * @send_component_table: send the component data associated with a given + * component to firmware. Called once for each applicable component. + * + * @flash_component: Flash the data for a given component to the device. + * Called once for each applicable component, after all component tables have + * been sent. + * + * @finalize_update: (optional) Finish the update. Called after all components + * have been flashed. + */ +struct pldmfw_ops { + bool (*match_record)(struct pldmfw *context, struct pldmfw_record *record); + int (*send_package_data)(struct pldmfw *context, const u8 *data, u16 length); + int (*send_component_table)(struct pldmfw *context, struct pldmfw_component *component, + u8 transfer_flag); + int (*flash_component)(struct pldmfw *context, struct pldmfw_component *component); + int (*finalize_update)(struct pldmfw *context); +}; + +int pldmfw_flash_image(struct pldmfw *context, const struct firmware *fw); + +#endif diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/kcompat_rhel_defs.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/kcompat_rhel_defs.h new file mode 100644 index 00000000000..fdf3b3cc72f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/kcompat_rhel_defs.h @@ -0,0 +1,138 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 1999 - 2026 Intel Corporation */ + +#ifndef _KCOMPAT_RHEL_DEFS_H_ +#define _KCOMPAT_RHEL_DEFS_H_ + +/* This is the RedHat Enterprise Linux distribution specific definitions file. + * It defines what features need backports for a given version of the RHEL + * kernel. + * + * It checks the RHEL_RELEASE_CODE and RHEL_RELEASE_VERSION macros to decide + * what support the target kernel has. + * + * It assumes that kcompat_std_defs.h has already been processed, and will + * #define or #undef any flags that have changed based on backports done by + * RHEL. + */ + +#if !RHEL_RELEASE_CODE +#error "RHEL_RELEASE_CODE is 0 or undefined" +#endif + +#ifndef RHEL_RELEASE_VERSION +#error "RHEL_RELEASE_VERSION is undefined" +#endif + +/*****************************************************************************/ +#if (RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(7,3)) +#define NEED_NETDEV_TXQ_BQL_PREFETCH +#else /* >= 7.3 */ +#endif /* 7.3 */ + +/*****************************************************************************/ +#if (RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(7,4)) +#define NEED_BUILD_BUG_ON +#else /* >= 7.4 */ +#define HAVE_RHEL7_EXTENDED_OFFLOAD_STATS +#endif /* 7.4 */ + +/*****************************************************************************/ +#if (RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(7,5)) +#else /* >= 7.5 */ +#define HAVE_FLOW_DISSECTOR_KEY_IP +#endif /* 7.5 */ + +/*****************************************************************************/ +#if (RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(7,6)) +#undef HAVE_XDP_BUFF_RXQ +#undef HAVE_XDP_RXQ_INFO_REG_3_PARAMS +#else /* >= 7.6 */ +#undef NEED_JIFFIES_64_TIME_IS_MACROS +#undef NEED_TC_CLS_CAN_OFFLOAD_AND_CHAIN0 +#undef NEED_TC_SETUP_QDISC_MQPRIO +#endif /* 7.6 */ + +/*****************************************************************************/ +#if (RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(7,7)) +#else /* >= 7.7 */ +#define HAVE_DEVLINK_PORT_ATTRS_SET_PORT_FLAVOUR +#define HAVE_ETHTOOL_NEW_100G_BITS +#undef NEED_IN_TASK +#define HAVE_FLOW_DISSECTOR_KEY_ENC_IP +#endif /* 7.7 */ + +/*****************************************************************************/ +#if (RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(8,0)) +#else /* >= 8.0 */ +#undef HAVE_ETHTOOL_NEW_100G_BITS +#define HAVE_NDO_OFFLOAD_STATS +#undef HAVE_RHEL7_EXTENDED_OFFLOAD_STATS +#endif /* 8.0 */ + +/*****************************************************************************/ +#if (RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(8,1)) +#define NEED_IDA_ALLOC_MIN_MAX_RANGE_FREE +#else /* >= 8.1 */ +#define HAVE_ETHTOOL_NEW_100G_BITS +#undef NEED_IDA_ALLOC_MIN_MAX_RANGE_FREE +#undef NEED_INDIRECT_CALL_WRAPPER_MACROS +#define HAVE_INDIRECT_CALL_WRAPPER_HEADER +#endif /* 8.1 */ + +/*****************************************************************************/ +#if (RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(8,2)) +#else /* >= 8.2 */ +#undef NEED_FLOW_INDR_BLOCK_CB_REGISTER +#define HAVE_FLOW_INDR_BLOCK_LOCK +#define HAVE_DEVLINK_PORT_ATTRS_SET_SWITCH_ID +#define HAVE_NETDEV_SB_DEV +#endif /* 8.2 */ + +/*****************************************************************************/ +#if (RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(8,3)) +#else /* >= 8.3 */ +#undef NEED_CPU_LATENCY_QOS_RENAME +#define HAVE_RT_IRQ_SCHED_FIX +#endif /* 8.3 */ + +/*****************************************************************************/ +#if (RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(8,4)) +#else /* >= 8.4 */ +#undef NEED_DEVLINK_PORT_ATTRS_SET_STRUCT +#undef HAVE_XDP_QUERY_PROG +#define HAVE_AF_XDP_ZC_SUPPORT +#define HAVE_MEM_TYPE_XSK_BUFF_POOL +#define HAVE_NDO_XSK_WAKEUP +#define XSK_UMEM_RETURNS_XDP_DESC +#undef NEED_XSK_UMEM_GET_RX_FRAME_SIZE +#define HAVE_ETHTOOL_COALESCE_PARAMS_SUPPORT +#endif /* 8.4 */ + +/*****************************************************************************/ +#if (RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(8,5)) +#else /* >= 8.5 */ +#undef HAVE_NAPI_BUSY_LOOP +#undef HAVE_XDP_RXQ_INFO_REG_3_PARAMS +#define NO_XDP_QUERY_XSK_UMEM +#undef NEED_XSK_BUFF_POOL_RENAME +#define HAVE_NETDEV_BPF_XSK_POOL +#define HAVE_AF_XDP_NETDEV_UMEM +#define HAVE_DEVLINK_OPS_CREATE_DEL +#endif /* 8.5 */ + +/*****************************************************************************/ +#if (RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(8,7)) +#else /* >= 8.7 */ +#undef NEED_DEVLINK_ALLOC_SETS_DEV +#define HAVE_DEVLINK_SET_STATE_3_PARAM +#endif /* 8.7 */ + +/*****************************************************************************/ +#if (RHEL_RELEASE_CODE < RHEL_RELEASE_VERSION(9,0)) +#else /* >= 9.0 */ +#define HAVE_XDP_BUFF_RXQ +#endif /* 9.0 */ + +/*****************************************************************************/ +#endif /* _KCOMPAT_RHEL_DEFS_H_ */ diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/kcompat_sles_defs.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/kcompat_sles_defs.h new file mode 100644 index 00000000000..63727ce73ad --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/kcompat_sles_defs.h @@ -0,0 +1,159 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 1999 - 2026 Intel Corporation */ + +#ifndef _KCOMPAT_SLES_DEFS_H_ +#define _KCOMPAT_SLES_DEFS_H_ + +/* This is the SUSE Linux Enterprise distribution specific definitions file. + * It defines what features need backports for a given version of the SUSE + * Linux Enterprise kernel. + * + * It checks a combination of the LINUX_VERSION code and the + * SLE_LOCALVERSION_CODE to determine what support the kernel has. + * + * It assumes that kcompat_std_defs.h has already been processed, and will + * #define or #undef any flags that have changed based on backports done by + * SUSE. + */ + +#ifndef LINUX_VERSION_CODE +#error "LINUX_VERSION_CODE is undefined" +#endif + +#ifndef KERNEL_VERSION +#error "KERNEL_VERSION is undefined" +#endif + +#if !SLE_KERNEL_REVISION +#error "SLE_KERNEL_REVISION is 0 or undefined" +#endif + +#if SLE_KERNEL_REVISION > 65535 +#error "SLE_KERNEL_REVISION is unexpectedly large" +#endif + +/* SLE kernel versions are a combination of the LINUX_VERSION_CODE along with + * an extra digit that indicates the SUSE specific revision of that kernel. + * This value is found in the CONFIG_LOCALVERSION of the SUSE kernel, which is + * extracted by common.mk and placed into SLE_KERNEL_REVISION_CODE. + * + * We combine the value of SLE_KERNEL_REVISION along with the LINUX_VERSION code + * to generate the useful value that determines what specific kernel we're + * dealing with. + * + * Just in case the SLE_KERNEL_REVISION ever goes above 255, we reserve 16 bits + * instead of 8 for this value. + */ +#define SLE_KERNEL_CODE ((LINUX_VERSION_CODE << 16) + SLE_KERNEL_REVISION) +#define SLE_KERNEL_VERSION(a,b,c,d) ((KERNEL_VERSION(a,b,c) << 16) + (d)) + +/* Unlike RHEL, SUSE kernels are not always tied to a single service pack. For + * example, 4.12.14 was used as the base for SLE 15 SP1, SLE 12 SP4, and SLE 12 + * SP5. + * + * You can find the patches that SUSE applied to the kernel tree at + * https://github.com/SUSE/kernel-source. + * + * You can find the correct kernel version for a check by using steps similar + * to the following + * + * 1) download the kernel-source repo + * 2) checkout the relevant branch, i.e SLE15-SP3 + * 3) find the relevant backport you're interested in the patches.suse + * directory + * 4) git log to locate the commit that introduced the backport + * 5) git describe --contains to find the relevant tag that includes that + * commit, i.e. rpm-5.3.18-37 + * 6) those digits represent the SLE kernel that introduced that backport. + * + * Try to keep the checks in SLE_KERNEL_CODE order and condense where + * possible. + */ + +/*****************************************************************************/ +#if (SLE_KERNEL_CODE > SLE_KERNEL_VERSION(4,12,14,23) && \ + SLE_KERNEL_CODE < SLE_KERNEL_VERSION(4,12,14,94)) +/* + * 4.12.14 is used as the base for SLE 12 SP4, SLE 12 SP5, SLE 15, and SLE 15 + * SP1. Unfortunately the revision codes do not line up cleanly. SLE 15 + * launched with 4.12.14-23. It appears that SLE 12 SP4 and SLE 15 SP1 both + * diverged from this point, with SLE 12 SP4 kernels starting around + * 4.12.14-94. A few backports for SLE 15 SP1 landed in some alpha and beta + * kernels tagged between 4.12.14-25 up to 4.12.14-32. These changes did not + * make it into SLE 12 SP4. This was cleaned up with SLE 12 SP5 by an apparent + * merge in 4.12.14-111. The official launch of SLE 15 SP1 ended up with + * version 4.12.14-195. + * + * Because of this inconsistency and because all of these kernels appear to be + * alpha or beta kernel releases for SLE 15 SP1, we do not rely on version + * checks between this range. Issue a warning to indicate that we do not + * support these. + */ +#warning "SLE kernel versions between 4.12.14-23 and 4.12.14-94 are not supported" +#endif + +/*****************************************************************************/ +#if (SLE_KERNEL_CODE < SLE_KERNEL_VERSION(4,12,14,10)) +#else /* >= 4.12.14-10 */ +#undef NEED_INDIRECT_CALL_WRAPPER_MACROS +#define HAVE_INDIRECT_CALL_WRAPPER_HEADER +#endif /* 4.12.14-10 */ + +/*****************************************************************************/ +#if (SLE_KERNEL_CODE < SLE_KERNEL_VERSION(4,12,14,111)) +#define NEED_IDA_ALLOC_MIN_MAX_RANGE_FREE +#else /* >= 4.12.14-111 */ +#define HAVE_DEVLINK_PORT_ATTRS_SET_PORT_FLAVOUR +#undef NEED_MACVLAN_ACCEL_PRIV +#undef NEED_MACVLAN_RELEASE_L2FW_OFFLOAD +#undef NEED_MACVLAN_SUPPORTS_DEST_FILTER +#undef NEED_IDA_ALLOC_MIN_MAX_RANGE_FREE +#endif /* 4.12.14-111 */ + +/*****************************************************************************/ +/* SLES 12-SP5 base kernel version */ +#if (SLE_KERNEL_CODE < SLE_KERNEL_VERSION(4,12,14,115)) +#else /* >= 4.12.14-115 */ +#define HAVE_NDO_SELECT_QUEUE_SB_DEV +#undef NEED_TC_SETUP_QDISC_MQPRIO +#undef NEED_TC_CLS_CAN_OFFLOAD_AND_CHAIN0 +#endif /* 4.12.14-115 */ + +/*****************************************************************************/ +#if (SLE_KERNEL_CODE < SLE_KERNEL_VERSION(5,3,8,2)) +#else /* >= 5.3.8-2 */ +#undef NEED_FLOW_INDR_BLOCK_CB_REGISTER +#define HAVE_FLOW_INDR_BLOCK_LOCK +#endif /* 5.3.8-2 */ + +#if (SLE_KERNEL_CODE < SLE_KERNEL_VERSION(5,3,18,26)) +#else /* >= 5.3.18-26 */ +#undef NEED_CPU_LATENCY_QOS_RENAME +#endif + +/*****************************************************************************/ +#if (SLE_KERNEL_CODE < SLE_KERNEL_VERSION(5,3,18,34)) +#else /* >= 5.3.18-34 */ +#undef NEED_DEVLINK_PORT_ATTRS_SET_STRUCT +#endif /* 5.3.18-34 */ + +/*****************************************************************************/ +#if (SLE_KERNEL_CODE < SLE_KERNEL_VERSION(5,3,18,41)) +#define NEED_XSK_BUFF_POOL_RENAME +#else /* >= 5.3.18-41 */ +#define HAVE_XDP_BUFF_FRAME_SZ +#define HAVE_NETDEV_BPF_XSK_POOL +#undef NEED_XSK_UMEM_GET_RX_FRAME_SIZE +#undef NEED_XSK_BUFF_POOL_RENAME +#define HAVE_MEM_TYPE_XSK_BUFF_POOL +#endif /* 5.3.18-41 */ + +/*****************************************************************************/ +#if (SLE_KERNEL_CODE < SLE_KERNEL_VERSION(5,14,21,9)) +#else /* >= 5.14.21-150400.9 */ +#undef NEED_DEVLINK_ALLOC_SETS_DEV +#define HAVE_DEVLINK_OPS_CREATE_DEL +#define HAVE_DEVLINK_SET_STATE_3_PARAM +#endif /* 5.14.21-150400.9 */ + +#endif /* _KCOMPAT_SLES_DEFS_H_ */ diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/kcompat_std_defs.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/kcompat_std_defs.h new file mode 100644 index 00000000000..832eabbfaa5 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/kcompat_std_defs.h @@ -0,0 +1,220 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 1999 - 2026 Intel Corporation */ + +#ifndef _KCOMPAT_STD_DEFS_H_ +#define _KCOMPAT_STD_DEFS_H_ + +/* This file contains the definitions for what kernel features need backports + * for a given kernel. It targets only the standard stable kernel releases. + * It must check only LINUX_VERSION_CODE and assume the kernel is a standard + * release, and not a custom distribution. + * + * It must define HAVE_ and NEED_ for features. It must not + * implement any backports, instead leaving the implementation to the + * kcompat_impl.h header. + * + * If a feature can be easily implemented as a replacement macro or fully + * backported, use a NEED_ to indicate that the feature needs + * a backport. (If NEED_ is undefined, then no backport for that feature + * is needed). + * + * If a feature cannot be easily implemented in kcompat directly, but + * requires drivers to make specific changes such as stripping out an entire + * feature or modifying a function pointer prototype, use a HAVE_. + */ + +#ifndef LINUX_VERSION_CODE +#error "LINUX_VERSION_CODE is undefined" +#endif + +#ifndef KERNEL_VERSION +#error "KERNEL_VERSION is undefined" +#endif + +/*****************************************************************************/ +#if (LINUX_VERSION_CODE < KERNEL_VERSION(4,8,0)) +#else /* >= 4,8,0 */ +#define HAVE_PCI_ALLOC_IRQ +#endif /* 4,8,0 */ + +/*****************************************************************************/ +#if (LINUX_VERSION_CODE < KERNEL_VERSION(4,9,0)) +#define NEED_JIFFIES_64_TIME_IS_MACROS +#else /* >= 4,9,0 */ +#define HAVE_KTHREAD_DELAYED_API +#define HAVE_NDO_OFFLOAD_STATS +#endif /* 4,9,0 */ + +/*****************************************************************************/ +#if (LINUX_VERSION_CODE < KERNEL_VERSION(4,9,62)) +#define NEED_IN_TASK +#else /* >= 4,9,62 */ +#endif /* 4,9,62 */ + +/*****************************************************************************/ +#if (LINUX_VERSION_CODE < KERNEL_VERSION(4,12,0)) +#else /* >= 4,12,0 */ +#define HAVE_NAPI_BUSY_LOOP +#endif /* 4,12,0 */ + +/*****************************************************************************/ +#if (LINUX_VERSION_CODE < KERNEL_VERSION(4,13,0)) +#else /* >= 4,13,0 */ +#define HAVE_FLOW_DISSECTOR_KEY_IP +#endif /* 4,13,0 */ + +/*****************************************************************************/ +#if (LINUX_VERSION_CODE < KERNEL_VERSION(4,15,0)) +#define NEED_TC_SETUP_QDISC_MQPRIO +#define NEED_NETDEV_XDP_STRUCT +#else /* >= 4,15,0 */ +#define HAVE_NDO_BPF +#endif /* 4,15,0 */ + +/*****************************************************************************/ +#if (LINUX_VERSION_CODE < KERNEL_VERSION(4,16,0)) +#define NEED_TC_CLS_CAN_OFFLOAD_AND_CHAIN0 +#else /* >= 4,16,0 */ +#define HAVE_XDP_BUFF_RXQ +#define HAVE_XDP_RXQ_INFO_REG_3_PARAMS +#endif /* 4,16,0 */ + +/*****************************************************************************/ +#if (LINUX_VERSION_CODE < KERNEL_VERSION(4,17,0)) +#define NEED_CONVERT_ART_NS_TO_TSC +#else /* >= 4,17,0 */ +#endif /* 4,17,0 */ + +/*****************************************************************************/ +#if (LINUX_VERSION_CODE < KERNEL_VERSION(4,18,0)) +#define NEED_MACVLAN_ACCEL_PRIV +#define NEED_MACVLAN_RELEASE_L2FW_OFFLOAD +#define NEED_MACVLAN_SUPPORTS_DEST_FILTER +#else /* >= 4,18,0 */ +#define HAVE_DEVLINK_PORT_ATTRS_SET_PORT_FLAVOUR +#endif /* 4,18,0 */ + +/*****************************************************************************/ +#if (LINUX_VERSION_CODE < KERNEL_VERSION(4,19,0)) +#define NEED_IDA_ALLOC_MIN_MAX_RANGE_FREE +#else /* >= 4,19,0 */ +#define HAVE_TC_ETF_QOPT_OFFLOAD +#define HAVE_FLOW_DISSECTOR_KEY_ENC_IP +#endif /* 4,19,0 */ + +/*****************************************************************************/ +#if (LINUX_VERSION_CODE < KERNEL_VERSION(5,0,0)) +#define NEED_INDIRECT_CALL_WRAPPER_MACROS +#else /* >= 5.0.0 */ +#define HAVE_INDIRECT_CALL_WRAPPER_HEADER +#endif /* 5.0.0 */ + +/*****************************************************************************/ +#if (LINUX_VERSION_CODE < KERNEL_VERSION(5,1,0)) +#else /* >= 5.1.0 */ +#define HAVE_ETHTOOL_200G_BITS +#define HAVE_ETHTOOL_NEW_100G_BITS +#endif /* 5.1.0 */ + +/*****************************************************************************/ +#if (LINUX_VERSION_CODE < KERNEL_VERSION(5,2,0)) +#else /* >= 5.2.0 */ +#define HAVE_DEVLINK_PORT_ATTRS_SET_SWITCH_ID +#endif /* 5.2.0 */ + +/*****************************************************************************/ +#if (LINUX_VERSION_CODE < KERNEL_VERSION(5,4,0)) +#define NEED_FLOW_INDR_BLOCK_CB_REGISTER +#else /* >= 5.4.0 */ +#define HAVE_FLOW_INDR_BLOCK_LOCK +#define HAVE_XSK_UNALIGNED_CHUNK_PLACEMENT +#endif /* 5.4.0 */ + +/*****************************************************************************/ +#if (LINUX_VERSION_CODE < KERNEL_VERSION(5,7,0)) +#define NEED_CPU_LATENCY_QOS_RENAME +#else /* >= 5.7.0 */ +#endif /* 5.7.0 */ + +/*****************************************************************************/ +#if (LINUX_VERSION_CODE < KERNEL_VERSION(5,8,0)) +#define NEED_XSK_UMEM_GET_RX_FRAME_SIZE +#else /* >= 5.8.0 */ +#undef HAVE_XSK_UNALIGNED_CHUNK_PLACEMENT +#define HAVE_RT_IRQ_SCHED_FIX +#endif /* 5.8.0 */ + +/*****************************************************************************/ +#if (LINUX_VERSION_CODE < KERNEL_VERSION(5,9,0)) +#define NEED_DEVLINK_PORT_ATTRS_SET_STRUCT +#define HAVE_XDP_QUERY_PROG +#define NEED_INDIRECT_CALL_3_AND_4 +#else /* >= 5.9.0 */ +#define HAVE_TASKLET_SETUP +#endif /* 5.9.0 */ + +/*****************************************************************************/ +#if (LINUX_VERSION_CODE < KERNEL_VERSION(5,10,0)) +#define NEED_XSK_BUFF_POOL_RENAME +#else /* >= 5.10.0 */ +#define HAVE_UDP_TUNNEL_NIC_SHARED +#define HAVE_NETDEV_BPF_XSK_POOL +#endif /* 5.10.0 */ + +/*****************************************************************************/ +#if (LINUX_VERSION_CODE < KERNEL_VERSION(5,11,0)) +#else /* >= 5.11.0 */ +#define HAVE_XSK_BATCHED_DESCRIPTOR_INTERFACES +#undef HAVE_XDP_RXQ_INFO_REG_3_PARAMS +#define HAVE_XSK_TX_PEEK_RELEASE_DESC_BATCH_3_PARAMS +#endif /* 5.11.0 */ + +/*****************************************************************************/ +#if (LINUX_VERSION_CODE < KERNEL_VERSION(5,12,0)) +#define NEED_EXPORT_INDIRECT_CALLABLE +#else /* >= 5.12.0 */ +#define HAVE_DEVLINK_OPS_CREATE_DEL +#endif /* 5.12.0 */ + +/*****************************************************************************/ +#if (LINUX_VERSION_CODE < KERNEL_VERSION(5,13,0)) +#else /* >= 5.13.0 */ +#define HAVE_XPS_MAP_TYPE +#endif /* 5.13.0 */ + +/*****************************************************************************/ +#if (LINUX_VERSION_CODE < KERNEL_VERSION(5,14,0)) +#else /* >= 5.14.0 */ +#define HAVE_TTY_WRITE_ROOM_UINT +#endif /* 5.14.0 */ + +/*****************************************************************************/ +#if (LINUX_VERSION_CODE < KERNEL_VERSION(5,15,0)) +#define NEED_DEVLINK_ALLOC_SETS_DEV +#else /* >= 5.15.0 */ +#define HAVE_DEVICE_IN_MDEV_PARENT_OPS +#define NEED_PCI_IOV_VF_ID +#define HAVE_DEVLINK_SET_STATE_3_PARAM +#endif /* 5.15.0 */ + +/*****************************************************************************/ +#if (LINUX_VERSION_CODE < KERNEL_VERSION(5,16,0)) +#else /* >= 5.16.0 */ +#define HAVE_XSK_BATCHED_RX_ALLOC +#endif /* 5.16.0 */ + +/*****************************************************************************/ +#if (LINUX_VERSION_CODE < KERNEL_VERSION(5,18,0)) +#else /* >=5.18.0*/ +#undef NEED_PCI_IOV_VF_ID +#undef HAVE_XSK_TX_PEEK_RELEASE_DESC_BATCH_3_PARAMS +#endif /* 5.18.0 */ + +/*****************************************************************************/ +#if (LINUX_VERSION_CODE < KERNEL_VERSION(6,1,0)) +#else /* >=6.1.0 */ +#define HAVE_FLOW_DISSECTOR_KEY_L2TPV3 +#define HAVE_TTY_TERMIOS_CONST_STRUCT +#endif /* 6.1.0 */ + +#endif /* _KCOMPAT_STD_DEFS_H_ */ diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/kcompat_ubuntu_defs.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/kcompat_ubuntu_defs.h new file mode 100644 index 00000000000..ea9cf2c2bed --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/kcompat_ubuntu_defs.h @@ -0,0 +1,34 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 1999 - 2026 Intel Corporation */ + +#ifndef _KCOMPAT_UBUNTU_DEFS_H_ +#define _KCOMPAT_UBUNTU_DEFS_H_ + +/* This file contains the definitions for the Ubuntu specific distribution of + * the Linux kernel. + * + * It checks the UBUNTU_VERSION_CODE to decide which features are available in + * the target kernel. It assumes that kcompat_std_defs.h has already been + * processed, and will #define or #undef the relevant flags based on what + * features were backported by Ubuntu. + */ + +#if !UTS_UBUNTU_RELEASE_ABI +#error "UTS_UBUNTU_RELEASE_ABI is 0 or undefined" +#endif + +#if !UBUNTU_VERSION_CODE +#error "UBUNTU_VERSION_CODE is 0 or undefined" +#endif + +#ifndef UBUNTU_VERSION +#error "UBUNTU_VERSION is undefined" +#endif + +/*****************************************************************************/ +#if (UBUNTU_VERSION_CODE >= UBUNTU_VERSION(4,15,0,159) && \ + UBUNTU_VERSION_CODE < UBUNTU_VERSION(4,15,0,999)) +#endif + +/*****************************************************************************/ +#endif /* _KCOMPAT_UBUNTU_DEFS_H_ */ diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/kcompat_xarray.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/kcompat_xarray.c new file mode 100644 index 00000000000..f4bbab09580 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/kcompat_xarray.c @@ -0,0 +1,2406 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 1999 - 2026 Intel Corporation */ + +// SPDX-License-Identifier: GPL-2.0+ +/* + * XArray implementation + * Copyright (c) 2017-2018 Microsoft Corporation + * Copyright (c) 2018-2020 Oracle + * Author: Matthew Wilcox + */ + +/* This is taken from upstream /lib/xarray.c commit ae9b3c0e79bc */ + +#include "kcompat.h" + +/* includes from radix-tree.c and linux/radix-tree.h, + * not directly included by xarray.[ch] + */ +#include +#include +#include +#include +#include +#include +#include /* in_interrupt() */ +#include + +#define radix_tree_node xa_node + +struct kmem_cache; +struct rcu_head; + +struct kmem_cache *radix_tree_node_cachep; +static atomic_t kc_init_done = ATOMIC_INIT(0); +static DEFINE_SPINLOCK(kc_radix_tree_init_lock); + +static void radix_tree_node_ctor(void *arg) +{ + struct radix_tree_node *node = arg; + + memset(node, 0, sizeof(*node)); + INIT_LIST_HEAD(&node->private_list); +} + +static void kc_xarray_global_init(void) +{ + if (likely(atomic_read(&kc_init_done))) + return; + spin_lock(&kc_radix_tree_init_lock); + if (atomic_read(&kc_init_done)) + goto out; + radix_tree_node_cachep = kmem_cache_create("kc_radix_tree_node", + sizeof(struct radix_tree_node), 0, + SLAB_PANIC | SLAB_RECLAIM_ACCOUNT, + radix_tree_node_ctor); + atomic_set_release(&kc_init_done, 1); +out: + spin_unlock(&kc_radix_tree_init_lock); +} + +static void radix_tree_node_rcu_free(struct rcu_head *head) +{ + struct radix_tree_node *node = + container_of(head, struct radix_tree_node, rcu_head); + + /* + * Must only free zeroed nodes into the slab. We can be left with + * non-NULL entries by radix_tree_free_nodes, so clear the entries + * and tags here. + */ + memset(node->slots, 0, sizeof(node->slots)); + memset(node->tags, 0, sizeof(node->tags)); + INIT_LIST_HEAD(&node->private_list); + + kmem_cache_free(radix_tree_node_cachep, node); +} + + +/* + * Coding conventions in this file: + * + * @xa is used to refer to the entire xarray. + * @xas is the 'xarray operation state'. It may be either a pointer to + * an xa_state, or an xa_state stored on the stack. This is an unfortunate + * ambiguity. + * @index is the index of the entry being operated on + * @mark is an xa_mark_t; a small number indicating one of the mark bits. + * @node refers to an xa_node; usually the primary one being operated on by + * this function. + * @offset is the index into the slots array inside an xa_node. + * @parent refers to the @xa_node closer to the head than @node. + * @entry refers to something stored in a slot in the xarray + */ + +static inline unsigned int xa_lock_type(const struct xarray *xa) +{ + return (__force unsigned int)xa->xa_flags & 3; +} + +static inline void xas_lock_type(struct xa_state *xas, unsigned int lock_type) +{ + if (lock_type == XA_LOCK_IRQ) + xas_lock_irq(xas); + else if (lock_type == XA_LOCK_BH) + xas_lock_bh(xas); + else + xas_lock(xas); +} + +static inline void xas_unlock_type(struct xa_state *xas, unsigned int lock_type) +{ + if (lock_type == XA_LOCK_IRQ) + xas_unlock_irq(xas); + else if (lock_type == XA_LOCK_BH) + xas_unlock_bh(xas); + else + xas_unlock(xas); +} + +static inline bool xa_track_free(const struct xarray *xa) +{ + return xa->xa_flags & XA_FLAGS_TRACK_FREE; +} + +static inline bool xa_zero_busy(const struct xarray *xa) +{ + return xa->xa_flags & XA_FLAGS_ZERO_BUSY; +} + +static inline void xa_mark_set(struct xarray *xa, xa_mark_t mark) +{ + if (!(xa->xa_flags & XA_FLAGS_MARK(mark))) + xa->xa_flags |= XA_FLAGS_MARK(mark); +} + +static inline void xa_mark_clear(struct xarray *xa, xa_mark_t mark) +{ + if (xa->xa_flags & XA_FLAGS_MARK(mark)) + xa->xa_flags &= ~(XA_FLAGS_MARK(mark)); +} + +static inline unsigned long *node_marks(struct xa_node *node, xa_mark_t mark) +{ + return node->marks[(__force unsigned)mark]; +} + +static inline bool node_get_mark(struct xa_node *node, + unsigned int offset, xa_mark_t mark) +{ + return test_bit(offset, node_marks(node, mark)); +} + +/* returns true if the bit was set */ +static inline bool node_set_mark(struct xa_node *node, unsigned int offset, + xa_mark_t mark) +{ + return __test_and_set_bit(offset, node_marks(node, mark)); +} + +/* returns true if the bit was set */ +static inline bool node_clear_mark(struct xa_node *node, unsigned int offset, + xa_mark_t mark) +{ + return __test_and_clear_bit(offset, node_marks(node, mark)); +} + +static inline bool node_any_mark(struct xa_node *node, xa_mark_t mark) +{ + return !bitmap_empty(node_marks(node, mark), XA_CHUNK_SIZE); +} + +static inline void node_mark_all(struct xa_node *node, xa_mark_t mark) +{ + bitmap_fill(node_marks(node, mark), XA_CHUNK_SIZE); +} + +#define mark_inc(mark) do { \ + mark = (__force xa_mark_t)((__force unsigned)(mark) + 1); \ +} while (0) + +/* + * xas_squash_marks() - Merge all marks to the first entry + * @xas: Array operation state. + * + * Set a mark on the first entry if any entry has it set. Clear marks on + * all sibling entries. + */ +static void xas_squash_marks(const struct xa_state *xas) +{ + xa_mark_t mark = 0; + unsigned int limit = xas->xa_offset + xas->xa_sibs + 1; + + for (;;) { + unsigned long *marks = node_marks(xas->xa_node, mark); + + if (find_next_bit(marks, limit, xas->xa_offset + 1) != limit) { + __set_bit(xas->xa_offset, marks); + bitmap_clear(marks, xas->xa_offset + 1, xas->xa_sibs); + } + if (mark == XA_MARK_MAX) + break; + mark_inc(mark); + } +} + +/* extracts the offset within this node from the index */ +static unsigned int get_offset(unsigned long index, struct xa_node *node) +{ + return (index >> node->shift) & XA_CHUNK_MASK; +} + +static void xas_set_offset(struct xa_state *xas) +{ + xas->xa_offset = get_offset(xas->xa_index, xas->xa_node); +} + +/* move the index either forwards (find) or backwards (sibling slot) */ +static void xas_move_index(struct xa_state *xas, unsigned long offset) +{ + unsigned int shift = xas->xa_node->shift; + xas->xa_index &= ~XA_CHUNK_MASK << shift; + xas->xa_index += offset << shift; +} + +static void xas_next_offset(struct xa_state *xas) +{ + xas->xa_offset++; + xas_move_index(xas, xas->xa_offset); +} + +static void *set_bounds(struct xa_state *xas) +{ + xas->xa_node = XAS_BOUNDS; + return NULL; +} + +/* + * Starts a walk. If the @xas is already valid, we assume that it's on + * the right path and just return where we've got to. If we're in an + * error state, return NULL. If the index is outside the current scope + * of the xarray, return NULL without changing @xas->xa_node. Otherwise + * set @xas->xa_node to NULL and return the current head of the array. + */ +static void *xas_start(struct xa_state *xas) +{ + void *entry; + + if (xas_valid(xas)) + return xas_reload(xas); + if (xas_error(xas)) + return NULL; + + entry = xa_head(xas->xa); + if (!xa_is_node(entry)) { + if (xas->xa_index) + return set_bounds(xas); + } else { + if ((xas->xa_index >> xa_to_node(entry)->shift) > XA_CHUNK_MASK) + return set_bounds(xas); + } + + xas->xa_node = NULL; + return entry; +} + +static __always_inline void *xas_descend(struct xa_state *xas, + struct xa_node *node) +{ + unsigned int offset = get_offset(xas->xa_index, node); + void *entry = xa_entry(xas->xa, node, offset); + + xas->xa_node = node; + while (xa_is_sibling(entry)) { + offset = xa_to_sibling(entry); + entry = xa_entry(xas->xa, node, offset); + if (node->shift && xa_is_node(entry)) + entry = XA_RETRY_ENTRY; + } + + xas->xa_offset = offset; + return entry; +} + +/** + * xas_load() - Load an entry from the XArray (advanced). + * @xas: XArray operation state. + * + * Usually walks the @xas to the appropriate state to load the entry + * stored at xa_index. However, it will do nothing and return %NULL if + * @xas is in an error state. xas_load() will never expand the tree. + * + * If the xa_state is set up to operate on a multi-index entry, xas_load() + * may return %NULL or an internal entry, even if there are entries + * present within the range specified by @xas. + * + * Context: Any context. The caller should hold the xa_lock or the RCU lock. + * Return: Usually an entry in the XArray, but see description for exceptions. + */ +void *xas_load(struct xa_state *xas) +{ + void *entry = xas_start(xas); + + while (xa_is_node(entry)) { + struct xa_node *node = xa_to_node(entry); + + if (xas->xa_shift > node->shift) + break; + entry = xas_descend(xas, node); + if (node->shift == 0) + break; + } + return entry; +} +EXPORT_SYMBOL_GPL(xas_load); + +#define XA_RCU_FREE ((struct xarray *)1) + +static void xa_node_free(struct xa_node *node) +{ + XA_NODE_BUG_ON(node, !list_empty(&node->private_list)); + node->array = XA_RCU_FREE; + call_rcu(&node->rcu_head, radix_tree_node_rcu_free); +} + +/* + * xas_destroy() - Free any resources allocated during the XArray operation. + * @xas: XArray operation state. + * + * Most users will not need to call this function; it is called for you + * by xas_nomem(). + */ +void xas_destroy(struct xa_state *xas) +{ + struct xa_node *next, *node = xas->xa_alloc; + + while (node) { + XA_NODE_BUG_ON(node, !list_empty(&node->private_list)); + next = rcu_dereference_raw(node->parent); + radix_tree_node_rcu_free(&node->rcu_head); + xas->xa_alloc = node = next; + } +} + +/** + * xas_nomem() - Allocate memory if needed. + * @xas: XArray operation state. + * @gfp: Memory allocation flags. + * + * If we need to add new nodes to the XArray, we try to allocate memory + * with GFP_NOWAIT while holding the lock, which will usually succeed. + * If it fails, @xas is flagged as needing memory to continue. The caller + * should drop the lock and call xas_nomem(). If xas_nomem() succeeds, + * the caller should retry the operation. + * + * Forward progress is guaranteed as one node is allocated here and + * stored in the xa_state where it will be found by xas_alloc(). More + * nodes will likely be found in the slab allocator, but we do not tie + * them up here. + * + * Return: true if memory was needed, and was successfully allocated. + */ +bool xas_nomem(struct xa_state *xas, gfp_t gfp) +{ + if (xas->xa_node != XA_ERROR(-ENOMEM)) { + xas_destroy(xas); + return false; + } + if (xas->xa->xa_flags & XA_FLAGS_ACCOUNT) + gfp |= __GFP_ACCOUNT; + xas->xa_alloc = kmem_cache_alloc_lru(radix_tree_node_cachep, xas->xa_lru, gfp); + if (!xas->xa_alloc) + return false; + xas->xa_alloc->parent = NULL; + XA_NODE_BUG_ON(xas->xa_alloc, !list_empty(&xas->xa_alloc->private_list)); + xas->xa_node = XAS_RESTART; + return true; +} +EXPORT_SYMBOL_GPL(xas_nomem); + +/* + * __xas_nomem() - Drop locks and allocate memory if needed. + * @xas: XArray operation state. + * @gfp: Memory allocation flags. + * + * Internal variant of xas_nomem(). + * + * Return: true if memory was needed, and was successfully allocated. + */ +static bool __xas_nomem(struct xa_state *xas, gfp_t gfp) + __must_hold(xas->xa->xa_lock) +{ + unsigned int lock_type = xa_lock_type(xas->xa); + + if (xas->xa_node != XA_ERROR(-ENOMEM)) { + xas_destroy(xas); + return false; + } + if (xas->xa->xa_flags & XA_FLAGS_ACCOUNT) + gfp |= __GFP_ACCOUNT; + if (gfpflags_allow_blocking(gfp)) { + xas_unlock_type(xas, lock_type); + xas->xa_alloc = kmem_cache_alloc_lru(radix_tree_node_cachep, xas->xa_lru, gfp); + xas_lock_type(xas, lock_type); + } else { + xas->xa_alloc = kmem_cache_alloc_lru(radix_tree_node_cachep, xas->xa_lru, gfp); + } + if (!xas->xa_alloc) + return false; + xas->xa_alloc->parent = NULL; + XA_NODE_BUG_ON(xas->xa_alloc, !list_empty(&xas->xa_alloc->private_list)); + xas->xa_node = XAS_RESTART; + return true; +} + +static void xas_update(struct xa_state *xas, struct xa_node *node) +{ + if (xas->xa_update) + xas->xa_update(node); + else + XA_NODE_BUG_ON(node, !list_empty(&node->private_list)); +} + +static void *xas_alloc(struct xa_state *xas, unsigned int shift) +{ + struct xa_node *parent = xas->xa_node; + struct xa_node *node = xas->xa_alloc; + + if (xas_invalid(xas)) + return NULL; + + if (node) { + xas->xa_alloc = NULL; + } else { + gfp_t gfp = GFP_NOWAIT | __GFP_NOWARN; + + if (xas->xa->xa_flags & XA_FLAGS_ACCOUNT) + gfp |= __GFP_ACCOUNT; + + node = kmem_cache_alloc_lru(radix_tree_node_cachep, xas->xa_lru, gfp); + if (!node) { + xas_set_err(xas, -ENOMEM); + return NULL; + } + } + + if (parent) { + node->offset = xas->xa_offset; + parent->count++; + XA_NODE_BUG_ON(node, parent->count > XA_CHUNK_SIZE); + xas_update(xas, parent); + } + XA_NODE_BUG_ON(node, shift > BITS_PER_LONG); + XA_NODE_BUG_ON(node, !list_empty(&node->private_list)); + node->shift = shift; + node->count = 0; + node->nr_values = 0; + RCU_INIT_POINTER(node->parent, xas->xa_node); + node->array = xas->xa; + + return node; +} + +#ifdef CONFIG_XARRAY_MULTI +/* Returns the number of indices covered by a given xa_state */ +static unsigned long xas_size(const struct xa_state *xas) +{ + return (xas->xa_sibs + 1UL) << xas->xa_shift; +} +#endif + +/* + * Use this to calculate the maximum index that will need to be created + * in order to add the entry described by @xas. Because we cannot store a + * multi-index entry at index 0, the calculation is a little more complex + * than you might expect. + */ +static unsigned long xas_max(struct xa_state *xas) +{ + unsigned long max = xas->xa_index; + +#ifdef CONFIG_XARRAY_MULTI + if (xas->xa_shift || xas->xa_sibs) { + unsigned long mask = xas_size(xas) - 1; + max |= mask; + if (mask == max) + max++; + } +#endif + + return max; +} + +/* The maximum index that can be contained in the array without expanding it */ +static unsigned long max_index(void *entry) +{ + if (!xa_is_node(entry)) + return 0; + return (XA_CHUNK_SIZE << xa_to_node(entry)->shift) - 1; +} + +static inline void *xa_zero_to_null(void *entry) +{ + return xa_is_zero(entry) ? NULL : entry; +} + +static void xas_shrink(struct xa_state *xas) +{ + struct xarray *xa = xas->xa; + struct xa_node *node = xas->xa_node; + + for (;;) { + void *entry; + + XA_NODE_BUG_ON(node, node->count > XA_CHUNK_SIZE); + if (node->count != 1) + break; + entry = xa_entry_locked(xa, node, 0); + if (!entry) + break; + if (!xa_is_node(entry) && node->shift) + break; + if (xa_zero_busy(xa)) + entry = xa_zero_to_null(entry); + xas->xa_node = XAS_BOUNDS; + + RCU_INIT_POINTER(xa->xa_head, entry); + if (xa_track_free(xa) && !node_get_mark(node, 0, XA_FREE_MARK)) + xa_mark_clear(xa, XA_FREE_MARK); + + node->count = 0; + node->nr_values = 0; + if (!xa_is_node(entry)) + RCU_INIT_POINTER(node->slots[0], XA_RETRY_ENTRY); + xas_update(xas, node); + xa_node_free(node); + if (!xa_is_node(entry)) + break; + node = xa_to_node(entry); + node->parent = NULL; + } +} + +/* + * xas_delete_node() - Attempt to delete an xa_node + * @xas: Array operation state. + * + * Attempts to delete the @xas->xa_node. This will fail if xa->node has + * a non-zero reference count. + */ +static void xas_delete_node(struct xa_state *xas) +{ + struct xa_node *node = xas->xa_node; + + for (;;) { + struct xa_node *parent; + + XA_NODE_BUG_ON(node, node->count > XA_CHUNK_SIZE); + if (node->count) + break; + + parent = xa_parent_locked(xas->xa, node); + xas->xa_node = parent; + xas->xa_offset = node->offset; + xa_node_free(node); + + if (!parent) { + xas->xa->xa_head = NULL; + xas->xa_node = XAS_BOUNDS; + return; + } + + parent->slots[xas->xa_offset] = NULL; + parent->count--; + XA_NODE_BUG_ON(parent, parent->count > XA_CHUNK_SIZE); + node = parent; + xas_update(xas, node); + } + + if (!node->parent) + xas_shrink(xas); +} + +/** + * xas_free_nodes() - Free this node and all nodes that it references + * @xas: Array operation state. + * @top: Node to free + * + * This node has been removed from the tree. We must now free it and all + * of its subnodes. There may be RCU walkers with references into the tree, + * so we must replace all entries with retry markers. + */ +static void xas_free_nodes(struct xa_state *xas, struct xa_node *top) +{ + unsigned int offset = 0; + struct xa_node *node = top; + + for (;;) { + void *entry = xa_entry_locked(xas->xa, node, offset); + + if (node->shift && xa_is_node(entry)) { + node = xa_to_node(entry); + offset = 0; + continue; + } + if (entry) + RCU_INIT_POINTER(node->slots[offset], XA_RETRY_ENTRY); + offset++; + while (offset == XA_CHUNK_SIZE) { + struct xa_node *parent; + + parent = xa_parent_locked(xas->xa, node); + offset = node->offset + 1; + node->count = 0; + node->nr_values = 0; + xas_update(xas, node); + xa_node_free(node); + if (node == top) + return; + node = parent; + } + } +} + +/* + * xas_expand adds nodes to the head of the tree until it has reached + * sufficient height to be able to contain @xas->xa_index + */ +static int xas_expand(struct xa_state *xas, void *head) +{ + struct xarray *xa = xas->xa; + struct xa_node *node = NULL; + unsigned int shift = 0; + unsigned long max = xas_max(xas); + + if (!head) { + if (max == 0) + return 0; + while ((max >> shift) >= XA_CHUNK_SIZE) + shift += XA_CHUNK_SHIFT; + return shift + XA_CHUNK_SHIFT; + } else if (xa_is_node(head)) { + node = xa_to_node(head); + shift = node->shift + XA_CHUNK_SHIFT; + } + xas->xa_node = NULL; + + while (max > max_index(head)) { + xa_mark_t mark = 0; + + XA_NODE_BUG_ON(node, shift > BITS_PER_LONG); + node = xas_alloc(xas, shift); + if (!node) + return -ENOMEM; + + node->count = 1; + if (xa_is_value(head)) + node->nr_values = 1; + RCU_INIT_POINTER(node->slots[0], head); + + /* Propagate the aggregated mark info to the new child */ + for (;;) { + if (xa_track_free(xa) && mark == XA_FREE_MARK) { + node_mark_all(node, XA_FREE_MARK); + if (!xa_marked(xa, XA_FREE_MARK)) { + node_clear_mark(node, 0, XA_FREE_MARK); + xa_mark_set(xa, XA_FREE_MARK); + } + } else if (xa_marked(xa, mark)) { + node_set_mark(node, 0, mark); + } + if (mark == XA_MARK_MAX) + break; + mark_inc(mark); + } + + /* + * Now that the new node is fully initialised, we can add + * it to the tree + */ + if (xa_is_node(head)) { + xa_to_node(head)->offset = 0; + rcu_assign_pointer(xa_to_node(head)->parent, node); + } + head = xa_mk_node(node); + rcu_assign_pointer(xa->xa_head, head); + xas_update(xas, node); + + shift += XA_CHUNK_SHIFT; + } + + xas->xa_node = node; + return shift; +} + +/* + * xas_create() - Create a slot to store an entry in. + * @xas: XArray operation state. + * @allow_root: %true if we can store the entry in the root directly + * + * Most users will not need to call this function directly, as it is called + * by xas_store(). It is useful for doing conditional store operations + * (see the xa_cmpxchg() implementation for an example). + * + * Return: If the slot already existed, returns the contents of this slot. + * If the slot was newly created, returns %NULL. If it failed to create the + * slot, returns %NULL and indicates the error in @xas. + */ +static void *xas_create(struct xa_state *xas, bool allow_root) +{ + struct xarray *xa = xas->xa; + void *entry; + void __rcu **slot; + struct xa_node *node = xas->xa_node; + int shift; + unsigned int order = xas->xa_shift; + + kc_xarray_global_init(); + + if (xas_top(node)) { + entry = xa_head_locked(xa); + xas->xa_node = NULL; + if (!entry && xa_zero_busy(xa)) + entry = XA_ZERO_ENTRY; + shift = xas_expand(xas, entry); + if (shift < 0) + return NULL; + if (!shift && !allow_root) + shift = XA_CHUNK_SHIFT; + entry = xa_head_locked(xa); + slot = &xa->xa_head; + } else if (xas_error(xas)) { + return NULL; + } else if (node) { + unsigned int offset = xas->xa_offset; + + shift = node->shift; + entry = xa_entry_locked(xa, node, offset); + slot = &node->slots[offset]; + } else { + shift = 0; + entry = xa_head_locked(xa); + slot = &xa->xa_head; + } + + while (shift > order) { + shift -= XA_CHUNK_SHIFT; + if (!entry) { + node = xas_alloc(xas, shift); + if (!node) + break; + if (xa_track_free(xa)) + node_mark_all(node, XA_FREE_MARK); + rcu_assign_pointer(*slot, xa_mk_node(node)); + } else if (xa_is_node(entry)) { + node = xa_to_node(entry); + } else { + break; + } + entry = xas_descend(xas, node); + slot = &node->slots[xas->xa_offset]; + } + + return entry; +} + +/** + * xas_create_range() - Ensure that stores to this range will succeed + * @xas: XArray operation state. + * + * Creates all of the slots in the range covered by @xas. Sets @xas to + * create single-index entries and positions it at the beginning of the + * range. This is for the benefit of users which have not yet been + * converted to use multi-index entries. + */ +void xas_create_range(struct xa_state *xas) +{ + unsigned long index = xas->xa_index; + unsigned char shift = xas->xa_shift; + unsigned char sibs = xas->xa_sibs; + + xas->xa_index |= ((sibs + 1UL) << shift) - 1; + if (xas_is_node(xas) && xas->xa_node->shift == xas->xa_shift) + xas->xa_offset |= sibs; + xas->xa_shift = 0; + xas->xa_sibs = 0; + + for (;;) { + xas_create(xas, true); + if (xas_error(xas)) + goto restore; + if (xas->xa_index <= (index | XA_CHUNK_MASK)) + goto success; + xas->xa_index -= XA_CHUNK_SIZE; + + for (;;) { + struct xa_node *node = xas->xa_node; + if (node->shift >= shift) + break; + xas->xa_node = xa_parent_locked(xas->xa, node); + xas->xa_offset = node->offset - 1; + if (node->offset != 0) + break; + } + } + +restore: + xas->xa_shift = shift; + xas->xa_sibs = sibs; + xas->xa_index = index; + return; +success: + xas->xa_index = index; + if (xas->xa_node) + xas_set_offset(xas); +} +EXPORT_SYMBOL_GPL(xas_create_range); + +static void update_node(struct xa_state *xas, struct xa_node *node, + int count, int values) +{ + if (!node || (!count && !values)) + return; + + node->count += count; + node->nr_values += values; + XA_NODE_BUG_ON(node, node->count > XA_CHUNK_SIZE); + XA_NODE_BUG_ON(node, node->nr_values > XA_CHUNK_SIZE); + xas_update(xas, node); + if (count < 0) + xas_delete_node(xas); +} + +/** + * xas_store() - Store this entry in the XArray. + * @xas: XArray operation state. + * @entry: New entry. + * + * If @xas is operating on a multi-index entry, the entry returned by this + * function is essentially meaningless (it may be an internal entry or it + * may be %NULL, even if there are non-NULL entries at some of the indices + * covered by the range). This is not a problem for any current users, + * and can be changed if needed. + * + * Return: The old entry at this index. + */ +void *xas_store(struct xa_state *xas, void *entry) +{ + struct xa_node *node; + void __rcu **slot = &xas->xa->xa_head; + unsigned int offset, max; + int count = 0; + int values = 0; + void *first, *next; + bool value = xa_is_value(entry); + + if (entry) { + bool allow_root = !xa_is_node(entry) && !xa_is_zero(entry); + first = xas_create(xas, allow_root); + } else { + first = xas_load(xas); + } + + if (xas_invalid(xas)) + return first; + node = xas->xa_node; + if (node && (xas->xa_shift < node->shift)) + xas->xa_sibs = 0; + if ((first == entry) && !xas->xa_sibs) + return first; + + next = first; + offset = xas->xa_offset; + max = xas->xa_offset + xas->xa_sibs; + if (node) { + slot = &node->slots[offset]; + if (xas->xa_sibs) + xas_squash_marks(xas); + } + if (!entry) + xas_init_marks(xas); + + for (;;) { + /* + * Must clear the marks before setting the entry to NULL, + * otherwise xas_for_each_marked may find a NULL entry and + * stop early. rcu_assign_pointer contains a release barrier + * so the mark clearing will appear to happen before the + * entry is set to NULL. + */ + rcu_assign_pointer(*slot, entry); + if (xa_is_node(next) && (!node || node->shift)) + xas_free_nodes(xas, xa_to_node(next)); + if (!node) + break; + count += !next - !entry; + values += !xa_is_value(first) - !value; + if (entry) { + if (offset == max) + break; + if (!xa_is_sibling(entry)) + entry = xa_mk_sibling(xas->xa_offset); + } else { + if (offset == XA_CHUNK_MASK) + break; + } + next = xa_entry_locked(xas->xa, node, ++offset); + if (!xa_is_sibling(next)) { + if (!entry && (offset > max)) + break; + first = next; + } + slot++; + } + + update_node(xas, node, count, values); + return first; +} +EXPORT_SYMBOL_GPL(xas_store); + +/** + * xas_get_mark() - Returns the state of this mark. + * @xas: XArray operation state. + * @mark: Mark number. + * + * Return: true if the mark is set, false if the mark is clear or @xas + * is in an error state. + */ +bool xas_get_mark(const struct xa_state *xas, xa_mark_t mark) +{ + if (xas_invalid(xas)) + return false; + if (!xas->xa_node) + return xa_marked(xas->xa, mark); + return node_get_mark(xas->xa_node, xas->xa_offset, mark); +} +EXPORT_SYMBOL_GPL(xas_get_mark); + +/** + * xas_set_mark() - Sets the mark on this entry and its parents. + * @xas: XArray operation state. + * @mark: Mark number. + * + * Sets the specified mark on this entry, and walks up the tree setting it + * on all the ancestor entries. Does nothing if @xas has not been walked to + * an entry, or is in an error state. + */ +void xas_set_mark(const struct xa_state *xas, xa_mark_t mark) +{ + struct xa_node *node = xas->xa_node; + unsigned int offset = xas->xa_offset; + + if (xas_invalid(xas)) + return; + + while (node) { + if (node_set_mark(node, offset, mark)) + return; + offset = node->offset; + node = xa_parent_locked(xas->xa, node); + } + + if (!xa_marked(xas->xa, mark)) + xa_mark_set(xas->xa, mark); +} +EXPORT_SYMBOL_GPL(xas_set_mark); + +/** + * xas_clear_mark() - Clears the mark on this entry and its parents. + * @xas: XArray operation state. + * @mark: Mark number. + * + * Clears the specified mark on this entry, and walks back to the head + * attempting to clear it on all the ancestor entries. Does nothing if + * @xas has not been walked to an entry, or is in an error state. + */ +void xas_clear_mark(const struct xa_state *xas, xa_mark_t mark) +{ + struct xa_node *node = xas->xa_node; + unsigned int offset = xas->xa_offset; + + if (xas_invalid(xas)) + return; + + while (node) { + if (!node_clear_mark(node, offset, mark)) + return; + if (node_any_mark(node, mark)) + return; + + offset = node->offset; + node = xa_parent_locked(xas->xa, node); + } + + if (xa_marked(xas->xa, mark)) + xa_mark_clear(xas->xa, mark); +} +EXPORT_SYMBOL_GPL(xas_clear_mark); + +/** + * xas_init_marks() - Initialise all marks for the entry + * @xas: Array operations state. + * + * Initialise all marks for the entry specified by @xas. If we're tracking + * free entries with a mark, we need to set it on all entries. All other + * marks are cleared. + * + * This implementation is not as efficient as it could be; we may walk + * up the tree multiple times. + */ +void xas_init_marks(const struct xa_state *xas) +{ + xa_mark_t mark = 0; + + for (;;) { + if (xa_track_free(xas->xa) && mark == XA_FREE_MARK) + xas_set_mark(xas, mark); + else + xas_clear_mark(xas, mark); + if (mark == XA_MARK_MAX) + break; + mark_inc(mark); + } +} +EXPORT_SYMBOL_GPL(xas_init_marks); + +#ifdef CONFIG_XARRAY_MULTI +static unsigned int node_get_marks(struct xa_node *node, unsigned int offset) +{ + unsigned int marks = 0; + xa_mark_t mark = XA_MARK_0; + + for (;;) { + if (node_get_mark(node, offset, mark)) + marks |= 1 << (__force unsigned int)mark; + if (mark == XA_MARK_MAX) + break; + mark_inc(mark); + } + + return marks; +} + +static inline void node_mark_slots(struct xa_node *node, unsigned int sibs, + xa_mark_t mark) +{ + int i; + + if (sibs == 0) + node_mark_all(node, mark); + else { + for (i = 0; i < XA_CHUNK_SIZE; i += sibs + 1) + node_set_mark(node, i, mark); + } +} + +static void node_set_marks(struct xa_node *node, unsigned int offset, + struct xa_node *child, unsigned int sibs, + unsigned int marks) +{ + xa_mark_t mark = XA_MARK_0; + + for (;;) { + if (marks & (1 << (__force unsigned int)mark)) { + node_set_mark(node, offset, mark); + if (child) + node_mark_slots(child, sibs, mark); + } + if (mark == XA_MARK_MAX) + break; + mark_inc(mark); + } +} + +/** + * xas_split_alloc() - Allocate memory for splitting an entry. + * @xas: XArray operation state. + * @entry: New entry which will be stored in the array. + * @order: Current entry order. + * @gfp: Memory allocation flags. + * + * This function should be called before calling xas_split(). + * If necessary, it will allocate new nodes (and fill them with @entry) + * to prepare for the upcoming split of an entry of @order size into + * entries of the order stored in the @xas. + * + * Context: May sleep if @gfp flags permit. + */ +void xas_split_alloc(struct xa_state *xas, void *entry, unsigned int order, + gfp_t gfp) +{ + unsigned int sibs = (1 << (order % XA_CHUNK_SHIFT)) - 1; + unsigned int mask = xas->xa_sibs; + + /* XXX: no support for splitting really large entries yet */ + if (WARN_ON(xas->xa_shift + 2 * XA_CHUNK_SHIFT <= order)) + goto nomem; + if (xas->xa_shift + XA_CHUNK_SHIFT > order) + return; + + do { + unsigned int i; + void *sibling = NULL; + struct xa_node *node; + + node = kmem_cache_alloc_lru(radix_tree_node_cachep, xas->xa_lru, gfp); + if (!node) + goto nomem; + node->array = xas->xa; + for (i = 0; i < XA_CHUNK_SIZE; i++) { + if ((i & mask) == 0) { + RCU_INIT_POINTER(node->slots[i], entry); + sibling = xa_mk_sibling(i); + } else { + RCU_INIT_POINTER(node->slots[i], sibling); + } + } + RCU_INIT_POINTER(node->parent, xas->xa_alloc); + xas->xa_alloc = node; + } while (sibs-- > 0); + + return; +nomem: + xas_destroy(xas); + xas_set_err(xas, -ENOMEM); +} +EXPORT_SYMBOL_GPL(xas_split_alloc); + +/** + * xas_split() - Split a multi-index entry into smaller entries. + * @xas: XArray operation state. + * @entry: New entry to store in the array. + * @order: Current entry order. + * + * The size of the new entries is set in @xas. The value in @entry is + * copied to all the replacement entries. + * + * Context: Any context. The caller should hold the xa_lock. + */ +void xas_split(struct xa_state *xas, void *entry, unsigned int order) +{ + unsigned int sibs = (1 << (order % XA_CHUNK_SHIFT)) - 1; + unsigned int offset, marks; + struct xa_node *node; + void *curr = xas_load(xas); + int values = 0; + + node = xas->xa_node; + if (xas_top(node)) + return; + + marks = node_get_marks(node, xas->xa_offset); + + offset = xas->xa_offset + sibs; + do { + if (xas->xa_shift < node->shift) { + struct xa_node *child = xas->xa_alloc; + + xas->xa_alloc = rcu_dereference_raw(child->parent); + child->shift = node->shift - XA_CHUNK_SHIFT; + child->offset = offset; + child->count = XA_CHUNK_SIZE; + child->nr_values = xa_is_value(entry) ? + XA_CHUNK_SIZE : 0; + RCU_INIT_POINTER(child->parent, node); + node_set_marks(node, offset, child, xas->xa_sibs, + marks); + rcu_assign_pointer(node->slots[offset], + xa_mk_node(child)); + if (xa_is_value(curr)) + values--; + xas_update(xas, child); + } else { + unsigned int canon = offset - xas->xa_sibs; + + node_set_marks(node, canon, NULL, 0, marks); + rcu_assign_pointer(node->slots[canon], entry); + while (offset > canon) + rcu_assign_pointer(node->slots[offset--], + xa_mk_sibling(canon)); + values += (xa_is_value(entry) - xa_is_value(curr)) * + (xas->xa_sibs + 1); + } + } while (offset-- > xas->xa_offset); + + node->nr_values += values; + xas_update(xas, node); +} +EXPORT_SYMBOL_GPL(xas_split); +#endif + +/** + * xas_pause() - Pause a walk to drop a lock. + * @xas: XArray operation state. + * + * Some users need to pause a walk and drop the lock they're holding in + * order to yield to a higher priority thread or carry out an operation + * on an entry. Those users should call this function before they drop + * the lock. It resets the @xas to be suitable for the next iteration + * of the loop after the user has reacquired the lock. If most entries + * found during a walk require you to call xas_pause(), the xa_for_each() + * iterator may be more appropriate. + * + * Note that xas_pause() only works for forward iteration. If a user needs + * to pause a reverse iteration, we will need a xas_pause_rev(). + */ +void xas_pause(struct xa_state *xas) +{ + struct xa_node *node = xas->xa_node; + + if (xas_invalid(xas)) + return; + + xas->xa_node = XAS_RESTART; + if (node) { + unsigned long offset = xas->xa_offset; + while (++offset < XA_CHUNK_SIZE) { + if (!xa_is_sibling(xa_entry(xas->xa, node, offset))) + break; + } + xas->xa_index &= ~0UL << node->shift; + xas->xa_index += (offset - xas->xa_offset) << node->shift; + if (xas->xa_index == 0) + xas->xa_node = XAS_BOUNDS; + } else { + xas->xa_index++; + } +} +EXPORT_SYMBOL_GPL(xas_pause); + +/* + * __xas_prev() - Find the previous entry in the XArray. + * @xas: XArray operation state. + * + * Helper function for xas_prev() which handles all the complex cases + * out of line. + */ +void *__xas_prev(struct xa_state *xas) +{ + void *entry; + + if (!xas_frozen(xas->xa_node)) + xas->xa_index--; + if (!xas->xa_node) + return set_bounds(xas); + if (xas_not_node(xas->xa_node)) + return xas_load(xas); + + if (xas->xa_offset != get_offset(xas->xa_index, xas->xa_node)) + xas->xa_offset--; + + while (xas->xa_offset == 255) { + xas->xa_offset = xas->xa_node->offset - 1; + xas->xa_node = xa_parent(xas->xa, xas->xa_node); + if (!xas->xa_node) + return set_bounds(xas); + } + + for (;;) { + entry = xa_entry(xas->xa, xas->xa_node, xas->xa_offset); + if (!xa_is_node(entry)) + return entry; + + xas->xa_node = xa_to_node(entry); + xas_set_offset(xas); + } +} +EXPORT_SYMBOL_GPL(__xas_prev); + +/* + * __xas_next() - Find the next entry in the XArray. + * @xas: XArray operation state. + * + * Helper function for xas_next() which handles all the complex cases + * out of line. + */ +void *__xas_next(struct xa_state *xas) +{ + void *entry; + + if (!xas_frozen(xas->xa_node)) + xas->xa_index++; + if (!xas->xa_node) + return set_bounds(xas); + if (xas_not_node(xas->xa_node)) + return xas_load(xas); + + if (xas->xa_offset != get_offset(xas->xa_index, xas->xa_node)) + xas->xa_offset++; + + while (xas->xa_offset == XA_CHUNK_SIZE) { + xas->xa_offset = xas->xa_node->offset + 1; + xas->xa_node = xa_parent(xas->xa, xas->xa_node); + if (!xas->xa_node) + return set_bounds(xas); + } + + for (;;) { + entry = xa_entry(xas->xa, xas->xa_node, xas->xa_offset); + if (!xa_is_node(entry)) + return entry; + + xas->xa_node = xa_to_node(entry); + xas_set_offset(xas); + } +} +EXPORT_SYMBOL_GPL(__xas_next); + +/** + * xas_find() - Find the next present entry in the XArray. + * @xas: XArray operation state. + * @max: Highest index to return. + * + * If the @xas has not yet been walked to an entry, return the entry + * which has an index >= xas.xa_index. If it has been walked, the entry + * currently being pointed at has been processed, and so we move to the + * next entry. + * + * If no entry is found and the array is smaller than @max, the iterator + * is set to the smallest index not yet in the array. This allows @xas + * to be immediately passed to xas_store(). + * + * Return: The entry, if found, otherwise %NULL. + */ +void *xas_find(struct xa_state *xas, unsigned long max) +{ + void *entry; + + if (xas_error(xas) || xas->xa_node == XAS_BOUNDS) + return NULL; + if (xas->xa_index > max) + return set_bounds(xas); + + if (!xas->xa_node) { + xas->xa_index = 1; + return set_bounds(xas); + } else if (xas->xa_node == XAS_RESTART) { + entry = xas_load(xas); + if (entry || xas_not_node(xas->xa_node)) + return entry; + } else if (!xas->xa_node->shift && + xas->xa_offset != (xas->xa_index & XA_CHUNK_MASK)) { + xas->xa_offset = ((xas->xa_index - 1) & XA_CHUNK_MASK) + 1; + } + + xas_next_offset(xas); + + while (xas->xa_node && (xas->xa_index <= max)) { + if (unlikely(xas->xa_offset == XA_CHUNK_SIZE)) { + xas->xa_offset = xas->xa_node->offset + 1; + xas->xa_node = xa_parent(xas->xa, xas->xa_node); + continue; + } + + entry = xa_entry(xas->xa, xas->xa_node, xas->xa_offset); + if (xa_is_node(entry)) { + xas->xa_node = xa_to_node(entry); + xas->xa_offset = 0; + continue; + } + if (entry && !xa_is_sibling(entry)) + return entry; + + xas_next_offset(xas); + } + + if (!xas->xa_node) + xas->xa_node = XAS_BOUNDS; + return NULL; +} +EXPORT_SYMBOL_GPL(xas_find); + +/** + * xas_find_marked() - Find the next marked entry in the XArray. + * @xas: XArray operation state. + * @max: Highest index to return. + * @mark: Mark number to search for. + * + * If the @xas has not yet been walked to an entry, return the marked entry + * which has an index >= xas.xa_index. If it has been walked, the entry + * currently being pointed at has been processed, and so we return the + * first marked entry with an index > xas.xa_index. + * + * If no marked entry is found and the array is smaller than @max, @xas is + * set to the bounds state and xas->xa_index is set to the smallest index + * not yet in the array. This allows @xas to be immediately passed to + * xas_store(). + * + * If no entry is found before @max is reached, @xas is set to the restart + * state. + * + * Return: The entry, if found, otherwise %NULL. + */ +void *xas_find_marked(struct xa_state *xas, unsigned long max, xa_mark_t mark) +{ + bool advance = true; + unsigned int offset; + void *entry; + + if (xas_error(xas)) + return NULL; + if (xas->xa_index > max) + goto max; + + if (!xas->xa_node) { + xas->xa_index = 1; + goto out; + } else if (xas_top(xas->xa_node)) { + advance = false; + entry = xa_head(xas->xa); + xas->xa_node = NULL; + if (xas->xa_index > max_index(entry)) + goto out; + if (!xa_is_node(entry)) { + if (xa_marked(xas->xa, mark)) + return entry; + xas->xa_index = 1; + goto out; + } + xas->xa_node = xa_to_node(entry); + xas->xa_offset = xas->xa_index >> xas->xa_node->shift; + } + + while (xas->xa_index <= max) { + if (unlikely(xas->xa_offset == XA_CHUNK_SIZE)) { + xas->xa_offset = xas->xa_node->offset + 1; + xas->xa_node = xa_parent(xas->xa, xas->xa_node); + if (!xas->xa_node) + break; + advance = false; + continue; + } + + if (!advance) { + entry = xa_entry(xas->xa, xas->xa_node, xas->xa_offset); + if (xa_is_sibling(entry)) { + xas->xa_offset = xa_to_sibling(entry); + xas_move_index(xas, xas->xa_offset); + } + } + + offset = xas_find_chunk(xas, advance, mark); + if (offset > xas->xa_offset) { + advance = false; + xas_move_index(xas, offset); + /* Mind the wrap */ + if ((xas->xa_index - 1) >= max) + goto max; + xas->xa_offset = offset; + if (offset == XA_CHUNK_SIZE) + continue; + } + + entry = xa_entry(xas->xa, xas->xa_node, xas->xa_offset); + if (!entry && !(xa_track_free(xas->xa) && mark == XA_FREE_MARK)) + continue; + if (xa_is_sibling(entry)) + continue; + if (!xa_is_node(entry)) + return entry; + xas->xa_node = xa_to_node(entry); + xas_set_offset(xas); + } + +out: + if (xas->xa_index > max) + goto max; + return set_bounds(xas); +max: + xas->xa_node = XAS_RESTART; + return NULL; +} +EXPORT_SYMBOL_GPL(xas_find_marked); + +/** + * xas_find_conflict() - Find the next present entry in a range. + * @xas: XArray operation state. + * + * The @xas describes both a range and a position within that range. + * + * Context: Any context. Expects xa_lock to be held. + * Return: The next entry in the range covered by @xas or %NULL. + */ +void *xas_find_conflict(struct xa_state *xas) +{ + void *curr; + + if (xas_error(xas)) + return NULL; + + if (!xas->xa_node) + return NULL; + + if (xas_top(xas->xa_node)) { + curr = xas_start(xas); + if (!curr) + return NULL; + while (xa_is_node(curr)) { + struct xa_node *node = xa_to_node(curr); + curr = xas_descend(xas, node); + } + if (curr) + return curr; + } + + if (xas->xa_node->shift > xas->xa_shift) + return NULL; + + for (;;) { + if (xas->xa_node->shift == xas->xa_shift) { + if ((xas->xa_offset & xas->xa_sibs) == xas->xa_sibs) + break; + } else if (xas->xa_offset == XA_CHUNK_MASK) { + xas->xa_offset = xas->xa_node->offset; + xas->xa_node = xa_parent_locked(xas->xa, xas->xa_node); + if (!xas->xa_node) + break; + continue; + } + curr = xa_entry_locked(xas->xa, xas->xa_node, ++xas->xa_offset); + if (xa_is_sibling(curr)) + continue; + while (xa_is_node(curr)) { + xas->xa_node = xa_to_node(curr); + xas->xa_offset = 0; + curr = xa_entry_locked(xas->xa, xas->xa_node, 0); + } + if (curr) + return curr; + } + xas->xa_offset -= xas->xa_sibs; + return NULL; +} +EXPORT_SYMBOL_GPL(xas_find_conflict); + +/** + * xa_load() - Load an entry from an XArray. + * @xa: XArray. + * @index: index into array. + * + * Context: Any context. Takes and releases the RCU lock. + * Return: The entry at @index in @xa. + */ +void *xa_load(struct xarray *xa, unsigned long index) +{ + XA_STATE(xas, xa, index); + void *entry; + + rcu_read_lock(); + do { + entry = xa_zero_to_null(xas_load(&xas)); + } while (xas_retry(&xas, entry)); + rcu_read_unlock(); + + return entry; +} +EXPORT_SYMBOL(xa_load); + +static void *xas_result(struct xa_state *xas, void *curr) +{ + if (xas_error(xas)) + curr = xas->xa_node; + return curr; +} + +/** + * __xa_erase() - Erase this entry from the XArray while locked. + * @xa: XArray. + * @index: Index into array. + * + * After this function returns, loading from @index will return %NULL. + * If the index is part of a multi-index entry, all indices will be erased + * and none of the entries will be part of a multi-index entry. + * + * Context: Any context. Expects xa_lock to be held on entry. + * Return: The entry which used to be at this index. + */ +void *__xa_erase(struct xarray *xa, unsigned long index) +{ + XA_STATE(xas, xa, index); + return xas_result(&xas, xa_zero_to_null(xas_store(&xas, NULL))); +} +EXPORT_SYMBOL(__xa_erase); + +/** + * xa_erase() - Erase this entry from the XArray. + * @xa: XArray. + * @index: Index of entry. + * + * After this function returns, loading from @index will return %NULL. + * If the index is part of a multi-index entry, all indices will be erased + * and none of the entries will be part of a multi-index entry. + * + * Context: Any context. Takes and releases the xa_lock. + * Return: The entry which used to be at this index. + */ +void *xa_erase(struct xarray *xa, unsigned long index) +{ + void *entry; + + xa_lock(xa); + entry = __xa_erase(xa, index); + xa_unlock(xa); + + return entry; +} +EXPORT_SYMBOL(xa_erase); + +/** + * __xa_store() - Store this entry in the XArray. + * @xa: XArray. + * @index: Index into array. + * @entry: New entry. + * @gfp: Memory allocation flags. + * + * You must already be holding the xa_lock when calling this function. + * It will drop the lock if needed to allocate memory, and then reacquire + * it afterwards. + * + * Context: Any context. Expects xa_lock to be held on entry. May + * release and reacquire xa_lock if @gfp flags permit. + * Return: The old entry at this index or xa_err() if an error happened. + */ +void *__xa_store(struct xarray *xa, unsigned long index, void *entry, gfp_t gfp) +{ + XA_STATE(xas, xa, index); + void *curr; + + if (WARN_ON_ONCE(xa_is_advanced(entry))) + return XA_ERROR(-EINVAL); + if (xa_track_free(xa) && !entry) + entry = XA_ZERO_ENTRY; + + do { + curr = xas_store(&xas, entry); + if (xa_track_free(xa)) + xas_clear_mark(&xas, XA_FREE_MARK); + } while (__xas_nomem(&xas, gfp)); + + return xas_result(&xas, xa_zero_to_null(curr)); +} +EXPORT_SYMBOL(__xa_store); + +/** + * xa_store() - Store this entry in the XArray. + * @xa: XArray. + * @index: Index into array. + * @entry: New entry. + * @gfp: Memory allocation flags. + * + * After this function returns, loads from this index will return @entry. + * Storing into an existing multi-index entry updates the entry of every index. + * The marks associated with @index are unaffected unless @entry is %NULL. + * + * Context: Any context. Takes and releases the xa_lock. + * May sleep if the @gfp flags permit. + * Return: The old entry at this index on success, xa_err(-EINVAL) if @entry + * cannot be stored in an XArray, or xa_err(-ENOMEM) if memory allocation + * failed. + */ +void *xa_store(struct xarray *xa, unsigned long index, void *entry, gfp_t gfp) +{ + void *curr; + + xa_lock(xa); + curr = __xa_store(xa, index, entry, gfp); + xa_unlock(xa); + + return curr; +} +EXPORT_SYMBOL(xa_store); + +static inline void *__xa_cmpxchg_raw(struct xarray *xa, unsigned long index, + void *old, void *entry, gfp_t gfp); + +/** + * __xa_cmpxchg() - Store this entry in the XArray. + * @xa: XArray. + * @index: Index into array. + * @old: Old value to test against. + * @entry: New entry. + * @gfp: Memory allocation flags. + * + * You must already be holding the xa_lock when calling this function. + * It will drop the lock if needed to allocate memory, and then reacquire + * it afterwards. + * + * Context: Any context. Expects xa_lock to be held on entry. May + * release and reacquire xa_lock if @gfp flags permit. + * Return: The old entry at this index or xa_err() if an error happened. + */ +void *__xa_cmpxchg(struct xarray *xa, unsigned long index, + void *old, void *entry, gfp_t gfp) +{ + return xa_zero_to_null(__xa_cmpxchg_raw(xa, index, old, entry, gfp)); +} +EXPORT_SYMBOL(__xa_cmpxchg); + +static inline void *__xa_cmpxchg_raw(struct xarray *xa, unsigned long index, + void *old, void *entry, gfp_t gfp) +{ + XA_STATE(xas, xa, index); + void *curr; + + if (WARN_ON_ONCE(xa_is_advanced(entry))) + return XA_ERROR(-EINVAL); + + do { + curr = xas_load(&xas); + if (curr == old) { + xas_store(&xas, entry); + if (xa_track_free(xa) && entry && !curr) + xas_clear_mark(&xas, XA_FREE_MARK); + } + } while (__xas_nomem(&xas, gfp)); + + return xas_result(&xas, curr); +} + +/** + * __xa_insert() - Store this entry in the XArray if no entry is present. + * @xa: XArray. + * @index: Index into array. + * @entry: New entry. + * @gfp: Memory allocation flags. + * + * Inserting a NULL entry will store a reserved entry (like xa_reserve()) + * if no entry is present. Inserting will fail if a reserved entry is + * present, even though loading from this index will return NULL. + * + * Context: Any context. Expects xa_lock to be held on entry. May + * release and reacquire xa_lock if @gfp flags permit. + * Return: 0 if the store succeeded. -EBUSY if another entry was present. + * -ENOMEM if memory could not be allocated. + */ +int __xa_insert(struct xarray *xa, unsigned long index, void *entry, gfp_t gfp) +{ + void *curr; + int errno; + + if (!entry) + entry = XA_ZERO_ENTRY; + curr = __xa_cmpxchg_raw(xa, index, NULL, entry, gfp); + errno = xa_err(curr); + if (errno) + return errno; + return (curr != NULL) ? -EBUSY : 0; +} +EXPORT_SYMBOL(__xa_insert); + +#ifdef CONFIG_XARRAY_MULTI +static void xas_set_range(struct xa_state *xas, unsigned long first, + unsigned long last) +{ + unsigned int shift = 0; + unsigned long sibs = last - first; + unsigned int offset = XA_CHUNK_MASK; + + xas_set(xas, first); + + while ((first & XA_CHUNK_MASK) == 0) { + if (sibs < XA_CHUNK_MASK) + break; + if ((sibs == XA_CHUNK_MASK) && (offset < XA_CHUNK_MASK)) + break; + shift += XA_CHUNK_SHIFT; + if (offset == XA_CHUNK_MASK) + offset = sibs & XA_CHUNK_MASK; + sibs >>= XA_CHUNK_SHIFT; + first >>= XA_CHUNK_SHIFT; + } + + offset = first & XA_CHUNK_MASK; + if (offset + sibs > XA_CHUNK_MASK) + sibs = XA_CHUNK_MASK - offset; + if ((((first + sibs + 1) << shift) - 1) > last) + sibs -= 1; + + xas->xa_shift = shift; + xas->xa_sibs = sibs; +} + +/** + * xa_store_range() - Store this entry at a range of indices in the XArray. + * @xa: XArray. + * @first: First index to affect. + * @last: Last index to affect. + * @entry: New entry. + * @gfp: Memory allocation flags. + * + * After this function returns, loads from any index between @first and @last, + * inclusive will return @entry. + * Storing into an existing multi-index entry updates the entry of every index. + * The marks associated with @index are unaffected unless @entry is %NULL. + * + * Context: Process context. Takes and releases the xa_lock. May sleep + * if the @gfp flags permit. + * Return: %NULL on success, xa_err(-EINVAL) if @entry cannot be stored in + * an XArray, or xa_err(-ENOMEM) if memory allocation failed. + */ +void *xa_store_range(struct xarray *xa, unsigned long first, + unsigned long last, void *entry, gfp_t gfp) +{ + XA_STATE(xas, xa, 0); + + if (WARN_ON_ONCE(xa_is_internal(entry))) + return XA_ERROR(-EINVAL); + if (last < first) + return XA_ERROR(-EINVAL); + + do { + xas_lock(&xas); + if (entry) { + unsigned int order = BITS_PER_LONG; + if (last + 1) + order = __ffs(last + 1); + xas_set_order(&xas, last, order); + xas_create(&xas, true); + if (xas_error(&xas)) + goto unlock; + } + do { + xas_set_range(&xas, first, last); + xas_store(&xas, entry); + if (xas_error(&xas)) + goto unlock; + first += xas_size(&xas); + } while (first <= last); +unlock: + xas_unlock(&xas); + } while (xas_nomem(&xas, gfp)); + + return xas_result(&xas, NULL); +} +EXPORT_SYMBOL(xa_store_range); + +/** + * xas_get_order() - Get the order of an entry. + * @xas: XArray operation state. + * + * Called after xas_load, the xas should not be in an error state. + * + * Return: A number between 0 and 63 indicating the order of the entry. + */ +int xas_get_order(struct xa_state *xas) +{ + int order = 0; + + if (!xas->xa_node) + return 0; + + for (;;) { + unsigned int slot = xas->xa_offset + (1 << order); + + if (slot >= XA_CHUNK_SIZE) + break; + if (!xa_is_sibling(xa_entry(xas->xa, xas->xa_node, slot))) + break; + order++; + } + + order += xas->xa_node->shift; + return order; +} +EXPORT_SYMBOL_GPL(xas_get_order); + +/** + * xa_get_order() - Get the order of an entry. + * @xa: XArray. + * @index: Index of the entry. + * + * Return: A number between 0 and 63 indicating the order of the entry. + */ +int xa_get_order(struct xarray *xa, unsigned long index) +{ + XA_STATE(xas, xa, index); + int order = 0; + void *entry; + + rcu_read_lock(); + entry = xas_load(&xas); + if (entry) + order = xas_get_order(&xas); + rcu_read_unlock(); + + return order; +} +EXPORT_SYMBOL(xa_get_order); +#endif /* CONFIG_XARRAY_MULTI */ + +/** + * __xa_alloc() - Find somewhere to store this entry in the XArray. + * @xa: XArray. + * @id: Pointer to ID. + * @limit: Range for allocated ID. + * @entry: New entry. + * @gfp: Memory allocation flags. + * + * Finds an empty entry in @xa between @limit.min and @limit.max, + * stores the index into the @id pointer, then stores the entry at + * that index. A concurrent lookup will not see an uninitialised @id. + * + * Must only be operated on an xarray initialized with flag XA_FLAGS_ALLOC set + * in xa_init_flags(). + * + * Context: Any context. Expects xa_lock to be held on entry. May + * release and reacquire xa_lock if @gfp flags permit. + * Return: 0 on success, -ENOMEM if memory could not be allocated or + * -EBUSY if there are no free entries in @limit. + */ +int __xa_alloc(struct xarray *xa, u32 *id, void *entry, + struct xa_limit limit, gfp_t gfp) +{ + XA_STATE(xas, xa, 0); + + if (WARN_ON_ONCE(xa_is_advanced(entry))) + return -EINVAL; + if (WARN_ON_ONCE(!xa_track_free(xa))) + return -EINVAL; + + if (!entry) + entry = XA_ZERO_ENTRY; + + do { + xas.xa_index = limit.min; + xas_find_marked(&xas, limit.max, XA_FREE_MARK); + if (xas.xa_node == XAS_RESTART) + xas_set_err(&xas, -EBUSY); + else + *id = xas.xa_index; + xas_store(&xas, entry); + xas_clear_mark(&xas, XA_FREE_MARK); + } while (__xas_nomem(&xas, gfp)); + + return xas_error(&xas); +} +EXPORT_SYMBOL(__xa_alloc); + +/** + * __xa_alloc_cyclic() - Find somewhere to store this entry in the XArray. + * @xa: XArray. + * @id: Pointer to ID. + * @entry: New entry. + * @limit: Range of allocated ID. + * @next: Pointer to next ID to allocate. + * @gfp: Memory allocation flags. + * + * Finds an empty entry in @xa between @limit.min and @limit.max, + * stores the index into the @id pointer, then stores the entry at + * that index. A concurrent lookup will not see an uninitialised @id. + * The search for an empty entry will start at @next and will wrap + * around if necessary. + * + * Must only be operated on an xarray initialized with flag XA_FLAGS_ALLOC set + * in xa_init_flags(). + * + * Context: Any context. Expects xa_lock to be held on entry. May + * release and reacquire xa_lock if @gfp flags permit. + * Return: 0 if the allocation succeeded without wrapping. 1 if the + * allocation succeeded after wrapping, -ENOMEM if memory could not be + * allocated or -EBUSY if there are no free entries in @limit. + */ +int __xa_alloc_cyclic(struct xarray *xa, u32 *id, void *entry, + struct xa_limit limit, u32 *next, gfp_t gfp) +{ + u32 min = limit.min; + int ret; + + limit.min = max(min, *next); + ret = __xa_alloc(xa, id, entry, limit, gfp); + if ((xa->xa_flags & XA_FLAGS_ALLOC_WRAPPED) && ret == 0) { + xa->xa_flags &= ~XA_FLAGS_ALLOC_WRAPPED; + ret = 1; + } + + if (ret < 0 && limit.min > min) { + limit.min = min; + ret = __xa_alloc(xa, id, entry, limit, gfp); + if (ret == 0) + ret = 1; + } + + if (ret >= 0) { + *next = *id + 1; + if (*next == 0) + xa->xa_flags |= XA_FLAGS_ALLOC_WRAPPED; + } + return ret; +} +EXPORT_SYMBOL(__xa_alloc_cyclic); + +/** + * __xa_set_mark() - Set this mark on this entry while locked. + * @xa: XArray. + * @index: Index of entry. + * @mark: Mark number. + * + * Attempting to set a mark on a %NULL entry does not succeed. + * + * Context: Any context. Expects xa_lock to be held on entry. + */ +void __xa_set_mark(struct xarray *xa, unsigned long index, xa_mark_t mark) +{ + XA_STATE(xas, xa, index); + void *entry = xas_load(&xas); + + if (entry) + xas_set_mark(&xas, mark); +} +EXPORT_SYMBOL(__xa_set_mark); + +/** + * __xa_clear_mark() - Clear this mark on this entry while locked. + * @xa: XArray. + * @index: Index of entry. + * @mark: Mark number. + * + * Context: Any context. Expects xa_lock to be held on entry. + */ +void __xa_clear_mark(struct xarray *xa, unsigned long index, xa_mark_t mark) +{ + XA_STATE(xas, xa, index); + void *entry = xas_load(&xas); + + if (entry) + xas_clear_mark(&xas, mark); +} +EXPORT_SYMBOL(__xa_clear_mark); + +/** + * xa_get_mark() - Inquire whether this mark is set on this entry. + * @xa: XArray. + * @index: Index of entry. + * @mark: Mark number. + * + * This function uses the RCU read lock, so the result may be out of date + * by the time it returns. If you need the result to be stable, use a lock. + * + * Context: Any context. Takes and releases the RCU lock. + * Return: True if the entry at @index has this mark set, false if it doesn't. + */ +bool xa_get_mark(struct xarray *xa, unsigned long index, xa_mark_t mark) +{ + XA_STATE(xas, xa, index); + void *entry; + + rcu_read_lock(); + entry = xas_start(&xas); + while (xas_get_mark(&xas, mark)) { + if (!xa_is_node(entry)) + goto found; + entry = xas_descend(&xas, xa_to_node(entry)); + } + rcu_read_unlock(); + return false; + found: + rcu_read_unlock(); + return true; +} +EXPORT_SYMBOL(xa_get_mark); + +/** + * xa_set_mark() - Set this mark on this entry. + * @xa: XArray. + * @index: Index of entry. + * @mark: Mark number. + * + * Attempting to set a mark on a %NULL entry does not succeed. + * + * Context: Process context. Takes and releases the xa_lock. + */ +void xa_set_mark(struct xarray *xa, unsigned long index, xa_mark_t mark) +{ + xa_lock(xa); + __xa_set_mark(xa, index, mark); + xa_unlock(xa); +} +EXPORT_SYMBOL(xa_set_mark); + +/** + * xa_clear_mark() - Clear this mark on this entry. + * @xa: XArray. + * @index: Index of entry. + * @mark: Mark number. + * + * Clearing a mark always succeeds. + * + * Context: Process context. Takes and releases the xa_lock. + */ +void xa_clear_mark(struct xarray *xa, unsigned long index, xa_mark_t mark) +{ + xa_lock(xa); + __xa_clear_mark(xa, index, mark); + xa_unlock(xa); +} +EXPORT_SYMBOL(xa_clear_mark); + +/** + * xa_find() - Search the XArray for an entry. + * @xa: XArray. + * @indexp: Pointer to an index. + * @max: Maximum index to search to. + * @filter: Selection criterion. + * + * Finds the entry in @xa which matches the @filter, and has the lowest + * index that is at least @indexp and no more than @max. + * If an entry is found, @indexp is updated to be the index of the entry. + * This function is protected by the RCU read lock, so it may not find + * entries which are being simultaneously added. It will not return an + * %XA_RETRY_ENTRY; if you need to see retry entries, use xas_find(). + * + * Context: Any context. Takes and releases the RCU lock. + * Return: The entry, if found, otherwise %NULL. + */ +void *xa_find(struct xarray *xa, unsigned long *indexp, + unsigned long max, xa_mark_t filter) +{ + XA_STATE(xas, xa, *indexp); + void *entry; + + rcu_read_lock(); + do { + if ((__force unsigned int)filter < XA_MAX_MARKS) + entry = xas_find_marked(&xas, max, filter); + else + entry = xas_find(&xas, max); + } while (xas_retry(&xas, entry)); + rcu_read_unlock(); + + if (entry) + *indexp = xas.xa_index; + return entry; +} +EXPORT_SYMBOL(xa_find); + +static bool xas_sibling(struct xa_state *xas) +{ + struct xa_node *node = xas->xa_node; + unsigned long mask; + + if (!IS_ENABLED(CONFIG_XARRAY_MULTI) || !node) + return false; + mask = (XA_CHUNK_SIZE << node->shift) - 1; + return (xas->xa_index & mask) > + ((unsigned long)xas->xa_offset << node->shift); +} + +/** + * xa_find_after() - Search the XArray for a present entry. + * @xa: XArray. + * @indexp: Pointer to an index. + * @max: Maximum index to search to. + * @filter: Selection criterion. + * + * Finds the entry in @xa which matches the @filter and has the lowest + * index that is above @indexp and no more than @max. + * If an entry is found, @indexp is updated to be the index of the entry. + * This function is protected by the RCU read lock, so it may miss entries + * which are being simultaneously added. It will not return an + * %XA_RETRY_ENTRY; if you need to see retry entries, use xas_find(). + * + * Context: Any context. Takes and releases the RCU lock. + * Return: The pointer, if found, otherwise %NULL. + */ +void *xa_find_after(struct xarray *xa, unsigned long *indexp, + unsigned long max, xa_mark_t filter) +{ + XA_STATE(xas, xa, *indexp + 1); + void *entry; + + if (xas.xa_index == 0) + return NULL; + + rcu_read_lock(); + for (;;) { + if ((__force unsigned int)filter < XA_MAX_MARKS) + entry = xas_find_marked(&xas, max, filter); + else + entry = xas_find(&xas, max); + + if (xas_invalid(&xas)) + break; + if (xas_sibling(&xas)) + continue; + if (!xas_retry(&xas, entry)) + break; + } + rcu_read_unlock(); + + if (entry) + *indexp = xas.xa_index; + return entry; +} +EXPORT_SYMBOL(xa_find_after); + +static unsigned int xas_extract_present(struct xa_state *xas, void **dst, + unsigned long max, unsigned int n) +{ + void *entry; + unsigned int i = 0; + + rcu_read_lock(); + xas_for_each(xas, entry, max) { + if (xas_retry(xas, entry)) + continue; + dst[i++] = entry; + if (i == n) + break; + } + rcu_read_unlock(); + + return i; +} + +static unsigned int xas_extract_marked(struct xa_state *xas, void **dst, + unsigned long max, unsigned int n, xa_mark_t mark) +{ + void *entry; + unsigned int i = 0; + + rcu_read_lock(); + xas_for_each_marked(xas, entry, max, mark) { + if (xas_retry(xas, entry)) + continue; + dst[i++] = entry; + if (i == n) + break; + } + rcu_read_unlock(); + + return i; +} + +/** + * xa_extract() - Copy selected entries from the XArray into a normal array. + * @xa: The source XArray to copy from. + * @dst: The buffer to copy entries into. + * @start: The first index in the XArray eligible to be selected. + * @max: The last index in the XArray eligible to be selected. + * @n: The maximum number of entries to copy. + * @filter: Selection criterion. + * + * Copies up to @n entries that match @filter from the XArray. The + * copied entries will have indices between @start and @max, inclusive. + * + * The @filter may be an XArray mark value, in which case entries which are + * marked with that mark will be copied. It may also be %XA_PRESENT, in + * which case all entries which are not %NULL will be copied. + * + * The entries returned may not represent a snapshot of the XArray at a + * moment in time. For example, if another thread stores to index 5, then + * index 10, calling xa_extract() may return the old contents of index 5 + * and the new contents of index 10. Indices not modified while this + * function is running will not be skipped. + * + * If you need stronger guarantees, holding the xa_lock across calls to this + * function will prevent concurrent modification. + * + * Context: Any context. Takes and releases the RCU lock. + * Return: The number of entries copied. + */ +unsigned int xa_extract(struct xarray *xa, void **dst, unsigned long start, + unsigned long max, unsigned int n, xa_mark_t filter) +{ + XA_STATE(xas, xa, start); + + if (!n) + return 0; + + if ((__force unsigned int)filter < XA_MAX_MARKS) + return xas_extract_marked(&xas, dst, max, n, filter); + return xas_extract_present(&xas, dst, max, n); +} +EXPORT_SYMBOL(xa_extract); + +/** + * xa_delete_node() - Private interface for workingset code. + * @node: Node to be removed from the tree. + * @update: Function to call to update ancestor nodes. + * + * Context: xa_lock must be held on entry and will not be released. + */ +void xa_delete_node(struct xa_node *node, xa_update_node_t update) +{ + struct xa_state xas = { + .xa = node->array, + .xa_index = (unsigned long)node->offset << + (node->shift + XA_CHUNK_SHIFT), + .xa_shift = node->shift + XA_CHUNK_SHIFT, + .xa_offset = node->offset, + .xa_node = xa_parent_locked(node->array, node), + .xa_update = update, + }; + + xas_store(&xas, NULL); +} +EXPORT_SYMBOL_GPL(xa_delete_node); /* For the benefit of the test suite */ + +/** + * xa_destroy() - Free all internal data structures. + * @xa: XArray. + * + * After calling this function, the XArray is empty and has freed all memory + * allocated for its internal data structures. You are responsible for + * freeing the objects referenced by the XArray. + * + * Context: Any context. Takes and releases the xa_lock, interrupt-safe. + */ +void xa_destroy(struct xarray *xa) +{ + XA_STATE(xas, xa, 0); + unsigned long flags; + void *entry; + + xas.xa_node = NULL; + xas_lock_irqsave(&xas, flags); + entry = xa_head_locked(xa); + RCU_INIT_POINTER(xa->xa_head, NULL); + xas_init_marks(&xas); + if (xa_zero_busy(xa)) + xa_mark_clear(xa, XA_FREE_MARK); + /* lockdep checks we're still holding the lock in xas_free_nodes() */ + if (xa_is_node(entry)) + xas_free_nodes(&xas, xa_to_node(entry)); + xas_unlock_irqrestore(&xas, flags); +} +EXPORT_SYMBOL(xa_destroy); + +#ifdef XA_DEBUG +void xa_dump_node(const struct xa_node *node) +{ + unsigned i, j; + + if (!node) + return; + if ((unsigned long)node & 3) { + pr_cont("node %px\n", node); + return; + } + + pr_cont("node %px %s %d parent %px shift %d count %d values %d " + "array %px list %px %px marks", + node, node->parent ? "offset" : "max", node->offset, + node->parent, node->shift, node->count, node->nr_values, + node->array, node->private_list.prev, node->private_list.next); + for (i = 0; i < XA_MAX_MARKS; i++) + for (j = 0; j < XA_MARK_LONGS; j++) + pr_cont(" %lx", node->marks[i][j]); + pr_cont("\n"); +} + +void xa_dump_index(unsigned long index, unsigned int shift) +{ + if (!shift) + pr_info("%lu: ", index); + else if (shift >= BITS_PER_LONG) + pr_info("0-%lu: ", ~0UL); + else + pr_info("%lu-%lu: ", index, index | ((1UL << shift) - 1)); +} + +void xa_dump_entry(const void *entry, unsigned long index, unsigned long shift) +{ + if (!entry) + return; + + xa_dump_index(index, shift); + + if (xa_is_node(entry)) { + if (shift == 0) { + pr_cont("%px\n", entry); + } else { + unsigned long i; + struct xa_node *node = xa_to_node(entry); + xa_dump_node(node); + for (i = 0; i < XA_CHUNK_SIZE; i++) + xa_dump_entry(node->slots[i], + index + (i << node->shift), node->shift); + } + } else if (xa_is_value(entry)) + pr_cont("value %ld (0x%lx) [%px]\n", xa_to_value(entry), + xa_to_value(entry), entry); + else if (!xa_is_internal(entry)) + pr_cont("%px\n", entry); + else if (xa_is_retry(entry)) + pr_cont("retry (%ld)\n", xa_to_internal(entry)); + else if (xa_is_sibling(entry)) + pr_cont("sibling (slot %ld)\n", xa_to_sibling(entry)); + else if (xa_is_zero(entry)) + pr_cont("zero (%ld)\n", xa_to_internal(entry)); + else + pr_cont("UNKNOWN ENTRY (%px)\n", entry); +} + +void xa_dump(const struct xarray *xa) +{ + void *entry = xa->xa_head; + unsigned int shift = 0; + + pr_info("xarray: %px head %px flags %x marks %d %d %d\n", xa, entry, + xa->xa_flags, xa_marked(xa, XA_MARK_0), + xa_marked(xa, XA_MARK_1), xa_marked(xa, XA_MARK_2)); + if (xa_is_node(entry)) + shift = xa_to_node(entry)->shift + XA_CHUNK_SHIFT; + xa_dump_entry(entry, 0, shift); +} +#endif diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/kcompat_xarray.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/kcompat_xarray.h new file mode 100644 index 00000000000..0097f1a88cf --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/ixgbe/kcompat_xarray.h @@ -0,0 +1,1912 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 1999 - 2026 Intel Corporation */ + +/* SPDX-License-Identifier: GPL-2.0+ */ +#ifndef _LINUX_XARRAY_H +#define _LINUX_XARRAY_H +/* + * eXtensible Arrays + * Copyright (c) 2017 Microsoft Corporation + * Author: Matthew Wilcox + * + * See Documentation/core-api/xarray.rst for how to use the XArray. + */ + +/* This is taken from upstream commit ae9b3c0e79bc */ + +#include "kcompat.h" + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +struct list_lru; + +/* Add internal might_alloc implementation without lockdep. */ +static inline void __might_alloc(gfp_t gfp_mask) +{ + might_sleep_if(!!(gfp_mask & __GFP_DIRECT_RECLAIM)); +} + +/* + * The bottom two bits of the entry determine how the XArray interprets + * the contents: + * + * 00: Pointer entry + * 10: Internal entry + * x1: Value entry or tagged pointer + * + * Attempting to store internal entries in the XArray is a bug. + * + * Most internal entries are pointers to the next node in the tree. + * The following internal entries have a special meaning: + * + * 0-62: Sibling entries + * 256: Retry entry + * 257: Zero entry + * + * Errors are also represented as internal entries, but use the negative + * space (-4094 to -2). They're never stored in the slots array; only + * returned by the normal API. + */ + +#define BITS_PER_XA_VALUE (BITS_PER_LONG - 1) + +/** + * xa_mk_value() - Create an XArray entry from an integer. + * @v: Value to store in XArray. + * + * Context: Any context. + * Return: An entry suitable for storing in the XArray. + */ +static inline void *xa_mk_value(unsigned long v) +{ + WARN_ON((long)v < 0); + return (void *)((v << 1) | 1); +} + +/** + * xa_to_value() - Get value stored in an XArray entry. + * @entry: XArray entry. + * + * Context: Any context. + * Return: The value stored in the XArray entry. + */ +static inline unsigned long xa_to_value(const void *entry) +{ + return (unsigned long)entry >> 1; +} + +/** + * xa_is_value() - Determine if an entry is a value. + * @entry: XArray entry. + * + * Context: Any context. + * Return: True if the entry is a value, false if it is a pointer. + */ +static inline bool xa_is_value(const void *entry) +{ + return (unsigned long)entry & 1; +} + +/** + * xa_tag_pointer() - Create an XArray entry for a tagged pointer. + * @p: Plain pointer. + * @tag: Tag value (0, 1 or 3). + * + * If the user of the XArray prefers, they can tag their pointers instead + * of storing value entries. Three tags are available (0, 1 and 3). + * These are distinct from the xa_mark_t as they are not replicated up + * through the array and cannot be searched for. + * + * Context: Any context. + * Return: An XArray entry. + */ +static inline void *xa_tag_pointer(void *p, unsigned long tag) +{ + return (void *)((unsigned long)p | tag); +} + +/** + * xa_untag_pointer() - Turn an XArray entry into a plain pointer. + * @entry: XArray entry. + * + * If you have stored a tagged pointer in the XArray, call this function + * to get the untagged version of the pointer. + * + * Context: Any context. + * Return: A pointer. + */ +static inline void *xa_untag_pointer(void *entry) +{ + return (void *)((unsigned long)entry & ~3UL); +} + +/** + * xa_pointer_tag() - Get the tag stored in an XArray entry. + * @entry: XArray entry. + * + * If you have stored a tagged pointer in the XArray, call this function + * to get the tag of that pointer. + * + * Context: Any context. + * Return: A tag. + */ +static inline unsigned int xa_pointer_tag(void *entry) +{ + return (unsigned long)entry & 3UL; +} + +/* + * xa_mk_internal() - Create an internal entry. + * @v: Value to turn into an internal entry. + * + * Internal entries are used for a number of purposes. Entries 0-255 are + * used for sibling entries (only 0-62 are used by the current code). 256 + * is used for the retry entry. 257 is used for the reserved / zero entry. + * Negative internal entries are used to represent errnos. Node pointers + * are also tagged as internal entries in some situations. + * + * Context: Any context. + * Return: An XArray internal entry corresponding to this value. + */ +static inline void *xa_mk_internal(unsigned long v) +{ + return (void *)((v << 2) | 2); +} + +/* + * xa_to_internal() - Extract the value from an internal entry. + * @entry: XArray entry. + * + * Context: Any context. + * Return: The value which was stored in the internal entry. + */ +static inline unsigned long xa_to_internal(const void *entry) +{ + return (unsigned long)entry >> 2; +} + +/* + * xa_is_internal() - Is the entry an internal entry? + * @entry: XArray entry. + * + * Context: Any context. + * Return: %true if the entry is an internal entry. + */ +static inline bool xa_is_internal(const void *entry) +{ + return ((unsigned long)entry & 3) == 2; +} + +#define XA_ZERO_ENTRY xa_mk_internal(257) + +/** + * xa_is_zero() - Is the entry a zero entry? + * @entry: Entry retrieved from the XArray + * + * The normal API will return NULL as the contents of a slot containing + * a zero entry. You can only see zero entries by using the advanced API. + * + * Return: %true if the entry is a zero entry. + */ +static inline bool xa_is_zero(const void *entry) +{ + return unlikely(entry == XA_ZERO_ENTRY); +} + +/** + * xa_is_err() - Report whether an XArray operation returned an error + * @entry: Result from calling an XArray function + * + * If an XArray operation cannot complete an operation, it will return + * a special value indicating an error. This function tells you + * whether an error occurred; xa_err() tells you which error occurred. + * + * Context: Any context. + * Return: %true if the entry indicates an error. + */ +static inline bool xa_is_err(const void *entry) +{ + return unlikely(xa_is_internal(entry) && + entry >= xa_mk_internal(-MAX_ERRNO)); +} + +/** + * xa_err() - Turn an XArray result into an errno. + * @entry: Result from calling an XArray function. + * + * If an XArray operation cannot complete an operation, it will return + * a special pointer value which encodes an errno. This function extracts + * the errno from the pointer value, or returns 0 if the pointer does not + * represent an errno. + * + * Context: Any context. + * Return: A negative errno or 0. + */ +static inline int xa_err(void *entry) +{ + /* xa_to_internal() would not do sign extension. */ + if (xa_is_err(entry)) + return (long)entry >> 2; + return 0; +} + +/** + * struct xa_limit - Represents a range of IDs. + * @min: The lowest ID to allocate (inclusive). + * @max: The maximum ID to allocate (inclusive). + * + * This structure is used either directly or via the XA_LIMIT() macro + * to communicate the range of IDs that are valid for allocation. + * Three common ranges are predefined for you: + * * xa_limit_32b - [0 - UINT_MAX] + * * xa_limit_31b - [0 - INT_MAX] + * * xa_limit_16b - [0 - USHRT_MAX] + */ +struct xa_limit { + u32 max; + u32 min; +}; + +#define XA_LIMIT(_min, _max) (struct xa_limit) { .min = _min, .max = _max } + +#define xa_limit_32b XA_LIMIT(0, UINT_MAX) +#define xa_limit_31b XA_LIMIT(0, INT_MAX) +#define xa_limit_16b XA_LIMIT(0, USHRT_MAX) + +typedef unsigned __bitwise xa_mark_t; +#define XA_MARK_0 ((__force xa_mark_t)0U) +#define XA_MARK_1 ((__force xa_mark_t)1U) +#define XA_MARK_2 ((__force xa_mark_t)2U) +#define XA_PRESENT ((__force xa_mark_t)8U) +#define XA_MARK_MAX XA_MARK_2 +#define XA_FREE_MARK XA_MARK_0 + +enum xa_lock_type { + XA_LOCK_IRQ = 1, + XA_LOCK_BH = 2, +}; + +/* + * Values for xa_flags. The radix tree stores its GFP flags in the xa_flags, + * and we remain compatible with that. + */ +#define XA_FLAGS_LOCK_IRQ ((__force gfp_t)XA_LOCK_IRQ) +#define XA_FLAGS_LOCK_BH ((__force gfp_t)XA_LOCK_BH) +#define XA_FLAGS_TRACK_FREE ((__force gfp_t)4U) +#define XA_FLAGS_ZERO_BUSY ((__force gfp_t)8U) +#define XA_FLAGS_ALLOC_WRAPPED ((__force gfp_t)16U) +#define XA_FLAGS_ACCOUNT ((__force gfp_t)32U) +#define XA_FLAGS_MARK(mark) ((__force gfp_t)((1U << __GFP_BITS_SHIFT) << \ + (__force unsigned)(mark))) + +/* ALLOC is for a normal 0-based alloc. ALLOC1 is for an 1-based alloc */ +#define XA_FLAGS_ALLOC (XA_FLAGS_TRACK_FREE | XA_FLAGS_MARK(XA_FREE_MARK)) +#define XA_FLAGS_ALLOC1 (XA_FLAGS_TRACK_FREE | XA_FLAGS_ZERO_BUSY) + +/** + * struct xarray - The anchor of the XArray. + * @xa_lock: Lock that protects the contents of the XArray. + * + * To use the xarray, define it statically or embed it in your data structure. + * It is a very small data structure, so it does not usually make sense to + * allocate it separately and keep a pointer to it in your data structure. + * + * You may use the xa_lock to protect your own data structures as well. + */ +/* + * If all of the entries in the array are NULL, @xa_head is a NULL pointer. + * If the only non-NULL entry in the array is at index 0, @xa_head is that + * entry. If any other entry in the array is non-NULL, @xa_head points + * to an @xa_node. + */ +struct xarray { + spinlock_t xa_lock; +/* private: The rest of the data structure is not to be used directly. */ + gfp_t xa_flags; + void __rcu * xa_head; +}; + +#define XARRAY_INIT(name, flags) { \ + .xa_lock = __SPIN_LOCK_UNLOCKED(name.xa_lock), \ + .xa_flags = flags, \ + .xa_head = NULL, \ +} + +/** + * DEFINE_XARRAY_FLAGS() - Define an XArray with custom flags. + * @name: A string that names your XArray. + * @flags: XA_FLAG values. + * + * This is intended for file scope definitions of XArrays. It declares + * and initialises an empty XArray with the chosen name and flags. It is + * equivalent to calling xa_init_flags() on the array, but it does the + * initialisation at compiletime instead of runtime. + */ +#define DEFINE_XARRAY_FLAGS(name, flags) \ + struct xarray name = XARRAY_INIT(name, flags) + +/** + * DEFINE_XARRAY() - Define an XArray. + * @name: A string that names your XArray. + * + * This is intended for file scope definitions of XArrays. It declares + * and initialises an empty XArray with the chosen name. It is equivalent + * to calling xa_init() on the array, but it does the initialisation at + * compiletime instead of runtime. + */ +#define DEFINE_XARRAY(name) DEFINE_XARRAY_FLAGS(name, 0) + +/** + * DEFINE_XARRAY_ALLOC() - Define an XArray which allocates IDs starting at 0. + * @name: A string that names your XArray. + * + * This is intended for file scope definitions of allocating XArrays. + * See also DEFINE_XARRAY(). + */ +#define DEFINE_XARRAY_ALLOC(name) DEFINE_XARRAY_FLAGS(name, XA_FLAGS_ALLOC) + +/** + * DEFINE_XARRAY_ALLOC1() - Define an XArray which allocates IDs starting at 1. + * @name: A string that names your XArray. + * + * This is intended for file scope definitions of allocating XArrays. + * See also DEFINE_XARRAY(). + */ +#define DEFINE_XARRAY_ALLOC1(name) DEFINE_XARRAY_FLAGS(name, XA_FLAGS_ALLOC1) + +void *xa_load(struct xarray *, unsigned long index); +void *xa_store(struct xarray *, unsigned long index, void *entry, gfp_t); +void *xa_erase(struct xarray *, unsigned long index); +void *xa_store_range(struct xarray *, unsigned long first, unsigned long last, + void *entry, gfp_t); +bool xa_get_mark(struct xarray *, unsigned long index, xa_mark_t); +void xa_set_mark(struct xarray *, unsigned long index, xa_mark_t); +void xa_clear_mark(struct xarray *, unsigned long index, xa_mark_t); +void *xa_find(struct xarray *xa, unsigned long *index, + unsigned long max, xa_mark_t) __attribute__((nonnull(2))); +void *xa_find_after(struct xarray *xa, unsigned long *index, + unsigned long max, xa_mark_t) __attribute__((nonnull(2))); +unsigned int xa_extract(struct xarray *, void **dst, unsigned long start, + unsigned long max, unsigned int n, xa_mark_t); +void xa_destroy(struct xarray *); + +/** + * xa_init_flags() - Initialise an empty XArray with flags. + * @xa: XArray. + * @flags: XA_FLAG values. + * + * If you need to initialise an XArray with special flags (eg you need + * to take the lock from interrupt context), use this function instead + * of xa_init(). + * + * Context: Any context. + */ +static inline void xa_init_flags(struct xarray *xa, gfp_t flags) +{ + spin_lock_init(&xa->xa_lock); + xa->xa_flags = flags; + xa->xa_head = NULL; +} + +/** + * xa_init() - Initialise an empty XArray. + * @xa: XArray. + * + * An empty XArray is full of NULL entries. + * + * Context: Any context. + */ +static inline void xa_init(struct xarray *xa) +{ + xa_init_flags(xa, 0); +} + +/** + * xa_empty() - Determine if an array has any present entries. + * @xa: XArray. + * + * Context: Any context. + * Return: %true if the array contains only NULL pointers. + */ +static inline bool xa_empty(const struct xarray *xa) +{ + return xa->xa_head == NULL; +} + +/** + * xa_marked() - Inquire whether any entry in this array has a mark set + * @xa: Array + * @mark: Mark value + * + * Context: Any context. + * Return: %true if any entry has this mark set. + */ +static inline bool xa_marked(const struct xarray *xa, xa_mark_t mark) +{ + return xa->xa_flags & XA_FLAGS_MARK(mark); +} + +/** + * xa_for_each_range() - Iterate over a portion of an XArray. + * @xa: XArray. + * @index: Index of @entry. + * @entry: Entry retrieved from array. + * @start: First index to retrieve from array. + * @last: Last index to retrieve from array. + * + * During the iteration, @entry will have the value of the entry stored + * in @xa at @index. You may modify @index during the iteration if you + * want to skip or reprocess indices. It is safe to modify the array + * during the iteration. At the end of the iteration, @entry will be set + * to NULL and @index will have a value less than or equal to max. + * + * xa_for_each_range() is O(n.log(n)) while xas_for_each() is O(n). You have + * to handle your own locking with xas_for_each(), and if you have to unlock + * after each iteration, it will also end up being O(n.log(n)). + * xa_for_each_range() will spin if it hits a retry entry; if you intend to + * see retry entries, you should use the xas_for_each() iterator instead. + * The xas_for_each() iterator will expand into more inline code than + * xa_for_each_range(). + * + * Context: Any context. Takes and releases the RCU lock. + */ +#define xa_for_each_range(xa, index, entry, start, last) \ + for (index = start, \ + entry = xa_find(xa, &index, last, XA_PRESENT); \ + entry; \ + entry = xa_find_after(xa, &index, last, XA_PRESENT)) + +/** + * xa_for_each_start() - Iterate over a portion of an XArray. + * @xa: XArray. + * @index: Index of @entry. + * @entry: Entry retrieved from array. + * @start: First index to retrieve from array. + * + * During the iteration, @entry will have the value of the entry stored + * in @xa at @index. You may modify @index during the iteration if you + * want to skip or reprocess indices. It is safe to modify the array + * during the iteration. At the end of the iteration, @entry will be set + * to NULL and @index will have a value less than or equal to max. + * + * xa_for_each_start() is O(n.log(n)) while xas_for_each() is O(n). You have + * to handle your own locking with xas_for_each(), and if you have to unlock + * after each iteration, it will also end up being O(n.log(n)). + * xa_for_each_start() will spin if it hits a retry entry; if you intend to + * see retry entries, you should use the xas_for_each() iterator instead. + * The xas_for_each() iterator will expand into more inline code than + * xa_for_each_start(). + * + * Context: Any context. Takes and releases the RCU lock. + */ +#define xa_for_each_start(xa, index, entry, start) \ + xa_for_each_range(xa, index, entry, start, ULONG_MAX) + +/** + * xa_for_each() - Iterate over present entries in an XArray. + * @xa: XArray. + * @index: Index of @entry. + * @entry: Entry retrieved from array. + * + * During the iteration, @entry will have the value of the entry stored + * in @xa at @index. You may modify @index during the iteration if you want + * to skip or reprocess indices. It is safe to modify the array during the + * iteration. At the end of the iteration, @entry will be set to NULL and + * @index will have a value less than or equal to max. + * + * xa_for_each() is O(n.log(n)) while xas_for_each() is O(n). You have + * to handle your own locking with xas_for_each(), and if you have to unlock + * after each iteration, it will also end up being O(n.log(n)). xa_for_each() + * will spin if it hits a retry entry; if you intend to see retry entries, + * you should use the xas_for_each() iterator instead. The xas_for_each() + * iterator will expand into more inline code than xa_for_each(). + * + * Context: Any context. Takes and releases the RCU lock. + */ +#define xa_for_each(xa, index, entry) \ + xa_for_each_start(xa, index, entry, 0) + +/** + * xa_for_each_marked() - Iterate over marked entries in an XArray. + * @xa: XArray. + * @index: Index of @entry. + * @entry: Entry retrieved from array. + * @filter: Selection criterion. + * + * During the iteration, @entry will have the value of the entry stored + * in @xa at @index. The iteration will skip all entries in the array + * which do not match @filter. You may modify @index during the iteration + * if you want to skip or reprocess indices. It is safe to modify the array + * during the iteration. At the end of the iteration, @entry will be set to + * NULL and @index will have a value less than or equal to max. + * + * xa_for_each_marked() is O(n.log(n)) while xas_for_each_marked() is O(n). + * You have to handle your own locking with xas_for_each(), and if you have + * to unlock after each iteration, it will also end up being O(n.log(n)). + * xa_for_each_marked() will spin if it hits a retry entry; if you intend to + * see retry entries, you should use the xas_for_each_marked() iterator + * instead. The xas_for_each_marked() iterator will expand into more inline + * code than xa_for_each_marked(). + * + * Context: Any context. Takes and releases the RCU lock. + */ +#define xa_for_each_marked(xa, index, entry, filter) \ + for (index = 0, entry = xa_find(xa, &index, ULONG_MAX, filter); \ + entry; entry = xa_find_after(xa, &index, ULONG_MAX, filter)) + +#define xa_trylock(xa) spin_trylock(&(xa)->xa_lock) +#define xa_lock(xa) spin_lock(&(xa)->xa_lock) +#define xa_unlock(xa) spin_unlock(&(xa)->xa_lock) +#define xa_lock_bh(xa) spin_lock_bh(&(xa)->xa_lock) +#define xa_unlock_bh(xa) spin_unlock_bh(&(xa)->xa_lock) +#define xa_lock_irq(xa) spin_lock_irq(&(xa)->xa_lock) +#define xa_unlock_irq(xa) spin_unlock_irq(&(xa)->xa_lock) +#define xa_lock_irqsave(xa, flags) \ + spin_lock_irqsave(&(xa)->xa_lock, flags) +#define xa_unlock_irqrestore(xa, flags) \ + spin_unlock_irqrestore(&(xa)->xa_lock, flags) +#define xa_lock_nested(xa, subclass) \ + spin_lock_nested(&(xa)->xa_lock, subclass) +#define xa_lock_bh_nested(xa, subclass) \ + spin_lock_bh_nested(&(xa)->xa_lock, subclass) +#define xa_lock_irq_nested(xa, subclass) \ + spin_lock_irq_nested(&(xa)->xa_lock, subclass) +#define xa_lock_irqsave_nested(xa, flags, subclass) \ + spin_lock_irqsave_nested(&(xa)->xa_lock, flags, subclass) + +/* + * Versions of the normal API which require the caller to hold the + * xa_lock. If the GFP flags allow it, they will drop the lock to + * allocate memory, then reacquire it afterwards. These functions + * may also re-enable interrupts if the XArray flags indicate the + * locking should be interrupt safe. + */ +void *__xa_erase(struct xarray *, unsigned long index); +void *__xa_store(struct xarray *, unsigned long index, void *entry, gfp_t); +void *__xa_cmpxchg(struct xarray *, unsigned long index, void *old, + void *entry, gfp_t); +int __must_check __xa_insert(struct xarray *, unsigned long index, + void *entry, gfp_t); +int __must_check __xa_alloc(struct xarray *, u32 *id, void *entry, + struct xa_limit, gfp_t); +int __must_check __xa_alloc_cyclic(struct xarray *, u32 *id, void *entry, + struct xa_limit, u32 *next, gfp_t); +void __xa_set_mark(struct xarray *, unsigned long index, xa_mark_t); +void __xa_clear_mark(struct xarray *, unsigned long index, xa_mark_t); + +/** + * xa_store_bh() - Store this entry in the XArray. + * @xa: XArray. + * @index: Index into array. + * @entry: New entry. + * @gfp: Memory allocation flags. + * + * This function is like calling xa_store() except it disables softirqs + * while holding the array lock. + * + * Context: Any context. Takes and releases the xa_lock while + * disabling softirqs. + * Return: The old entry at this index or xa_err() if an error happened. + */ +static inline void *xa_store_bh(struct xarray *xa, unsigned long index, + void *entry, gfp_t gfp) +{ + void *curr; + + __might_alloc(gfp); + xa_lock_bh(xa); + curr = __xa_store(xa, index, entry, gfp); + xa_unlock_bh(xa); + + return curr; +} + +/** + * xa_store_irq() - Store this entry in the XArray. + * @xa: XArray. + * @index: Index into array. + * @entry: New entry. + * @gfp: Memory allocation flags. + * + * This function is like calling xa_store() except it disables interrupts + * while holding the array lock. + * + * Context: Process context. Takes and releases the xa_lock while + * disabling interrupts. + * Return: The old entry at this index or xa_err() if an error happened. + */ +static inline void *xa_store_irq(struct xarray *xa, unsigned long index, + void *entry, gfp_t gfp) +{ + void *curr; + + __might_alloc(gfp); + xa_lock_irq(xa); + curr = __xa_store(xa, index, entry, gfp); + xa_unlock_irq(xa); + + return curr; +} + +/** + * xa_erase_bh() - Erase this entry from the XArray. + * @xa: XArray. + * @index: Index of entry. + * + * After this function returns, loading from @index will return %NULL. + * If the index is part of a multi-index entry, all indices will be erased + * and none of the entries will be part of a multi-index entry. + * + * Context: Any context. Takes and releases the xa_lock while + * disabling softirqs. + * Return: The entry which used to be at this index. + */ +static inline void *xa_erase_bh(struct xarray *xa, unsigned long index) +{ + void *entry; + + xa_lock_bh(xa); + entry = __xa_erase(xa, index); + xa_unlock_bh(xa); + + return entry; +} + +/** + * xa_erase_irq() - Erase this entry from the XArray. + * @xa: XArray. + * @index: Index of entry. + * + * After this function returns, loading from @index will return %NULL. + * If the index is part of a multi-index entry, all indices will be erased + * and none of the entries will be part of a multi-index entry. + * + * Context: Process context. Takes and releases the xa_lock while + * disabling interrupts. + * Return: The entry which used to be at this index. + */ +static inline void *xa_erase_irq(struct xarray *xa, unsigned long index) +{ + void *entry; + + xa_lock_irq(xa); + entry = __xa_erase(xa, index); + xa_unlock_irq(xa); + + return entry; +} + +/** + * xa_cmpxchg() - Conditionally replace an entry in the XArray. + * @xa: XArray. + * @index: Index into array. + * @old: Old value to test against. + * @entry: New value to place in array. + * @gfp: Memory allocation flags. + * + * If the entry at @index is the same as @old, replace it with @entry. + * If the return value is equal to @old, then the exchange was successful. + * + * Context: Any context. Takes and releases the xa_lock. May sleep + * if the @gfp flags permit. + * Return: The old value at this index or xa_err() if an error happened. + */ +static inline void *xa_cmpxchg(struct xarray *xa, unsigned long index, + void *old, void *entry, gfp_t gfp) +{ + void *curr; + + __might_alloc(gfp); + xa_lock(xa); + curr = __xa_cmpxchg(xa, index, old, entry, gfp); + xa_unlock(xa); + + return curr; +} + +/** + * xa_cmpxchg_bh() - Conditionally replace an entry in the XArray. + * @xa: XArray. + * @index: Index into array. + * @old: Old value to test against. + * @entry: New value to place in array. + * @gfp: Memory allocation flags. + * + * This function is like calling xa_cmpxchg() except it disables softirqs + * while holding the array lock. + * + * Context: Any context. Takes and releases the xa_lock while + * disabling softirqs. May sleep if the @gfp flags permit. + * Return: The old value at this index or xa_err() if an error happened. + */ +static inline void *xa_cmpxchg_bh(struct xarray *xa, unsigned long index, + void *old, void *entry, gfp_t gfp) +{ + void *curr; + + __might_alloc(gfp); + xa_lock_bh(xa); + curr = __xa_cmpxchg(xa, index, old, entry, gfp); + xa_unlock_bh(xa); + + return curr; +} + +/** + * xa_cmpxchg_irq() - Conditionally replace an entry in the XArray. + * @xa: XArray. + * @index: Index into array. + * @old: Old value to test against. + * @entry: New value to place in array. + * @gfp: Memory allocation flags. + * + * This function is like calling xa_cmpxchg() except it disables interrupts + * while holding the array lock. + * + * Context: Process context. Takes and releases the xa_lock while + * disabling interrupts. May sleep if the @gfp flags permit. + * Return: The old value at this index or xa_err() if an error happened. + */ +static inline void *xa_cmpxchg_irq(struct xarray *xa, unsigned long index, + void *old, void *entry, gfp_t gfp) +{ + void *curr; + + __might_alloc(gfp); + xa_lock_irq(xa); + curr = __xa_cmpxchg(xa, index, old, entry, gfp); + xa_unlock_irq(xa); + + return curr; +} + +/** + * xa_insert() - Store this entry in the XArray unless another entry is + * already present. + * @xa: XArray. + * @index: Index into array. + * @entry: New entry. + * @gfp: Memory allocation flags. + * + * Inserting a NULL entry will store a reserved entry (like xa_reserve()) + * if no entry is present. Inserting will fail if a reserved entry is + * present, even though loading from this index will return NULL. + * + * Context: Any context. Takes and releases the xa_lock. May sleep if + * the @gfp flags permit. + * Return: 0 if the store succeeded. -EBUSY if another entry was present. + * -ENOMEM if memory could not be allocated. + */ +static inline int __must_check xa_insert(struct xarray *xa, + unsigned long index, void *entry, gfp_t gfp) +{ + int err; + + __might_alloc(gfp); + xa_lock(xa); + err = __xa_insert(xa, index, entry, gfp); + xa_unlock(xa); + + return err; +} + +/** + * xa_insert_bh() - Store this entry in the XArray unless another entry is + * already present. + * @xa: XArray. + * @index: Index into array. + * @entry: New entry. + * @gfp: Memory allocation flags. + * + * Inserting a NULL entry will store a reserved entry (like xa_reserve()) + * if no entry is present. Inserting will fail if a reserved entry is + * present, even though loading from this index will return NULL. + * + * Context: Any context. Takes and releases the xa_lock while + * disabling softirqs. May sleep if the @gfp flags permit. + * Return: 0 if the store succeeded. -EBUSY if another entry was present. + * -ENOMEM if memory could not be allocated. + */ +static inline int __must_check xa_insert_bh(struct xarray *xa, + unsigned long index, void *entry, gfp_t gfp) +{ + int err; + + __might_alloc(gfp); + xa_lock_bh(xa); + err = __xa_insert(xa, index, entry, gfp); + xa_unlock_bh(xa); + + return err; +} + +/** + * xa_insert_irq() - Store this entry in the XArray unless another entry is + * already present. + * @xa: XArray. + * @index: Index into array. + * @entry: New entry. + * @gfp: Memory allocation flags. + * + * Inserting a NULL entry will store a reserved entry (like xa_reserve()) + * if no entry is present. Inserting will fail if a reserved entry is + * present, even though loading from this index will return NULL. + * + * Context: Process context. Takes and releases the xa_lock while + * disabling interrupts. May sleep if the @gfp flags permit. + * Return: 0 if the store succeeded. -EBUSY if another entry was present. + * -ENOMEM if memory could not be allocated. + */ +static inline int __must_check xa_insert_irq(struct xarray *xa, + unsigned long index, void *entry, gfp_t gfp) +{ + int err; + + __might_alloc(gfp); + xa_lock_irq(xa); + err = __xa_insert(xa, index, entry, gfp); + xa_unlock_irq(xa); + + return err; +} + +/** + * xa_alloc() - Find somewhere to store this entry in the XArray. + * @xa: XArray. + * @id: Pointer to ID. + * @entry: New entry. + * @limit: Range of ID to allocate. + * @gfp: Memory allocation flags. + * + * Finds an empty entry in @xa between @limit.min and @limit.max, + * stores the index into the @id pointer, then stores the entry at + * that index. A concurrent lookup will not see an uninitialised @id. + * + * Must only be operated on an xarray initialized with flag XA_FLAGS_ALLOC set + * in xa_init_flags(). + * + * Context: Any context. Takes and releases the xa_lock. May sleep if + * the @gfp flags permit. + * Return: 0 on success, -ENOMEM if memory could not be allocated or + * -EBUSY if there are no free entries in @limit. + */ +static inline __must_check int xa_alloc(struct xarray *xa, u32 *id, + void *entry, struct xa_limit limit, gfp_t gfp) +{ + int err; + + __might_alloc(gfp); + xa_lock(xa); + err = __xa_alloc(xa, id, entry, limit, gfp); + xa_unlock(xa); + + return err; +} + +/** + * xa_alloc_bh() - Find somewhere to store this entry in the XArray. + * @xa: XArray. + * @id: Pointer to ID. + * @entry: New entry. + * @limit: Range of ID to allocate. + * @gfp: Memory allocation flags. + * + * Finds an empty entry in @xa between @limit.min and @limit.max, + * stores the index into the @id pointer, then stores the entry at + * that index. A concurrent lookup will not see an uninitialised @id. + * + * Must only be operated on an xarray initialized with flag XA_FLAGS_ALLOC set + * in xa_init_flags(). + * + * Context: Any context. Takes and releases the xa_lock while + * disabling softirqs. May sleep if the @gfp flags permit. + * Return: 0 on success, -ENOMEM if memory could not be allocated or + * -EBUSY if there are no free entries in @limit. + */ +static inline int __must_check xa_alloc_bh(struct xarray *xa, u32 *id, + void *entry, struct xa_limit limit, gfp_t gfp) +{ + int err; + + __might_alloc(gfp); + xa_lock_bh(xa); + err = __xa_alloc(xa, id, entry, limit, gfp); + xa_unlock_bh(xa); + + return err; +} + +/** + * xa_alloc_irq() - Find somewhere to store this entry in the XArray. + * @xa: XArray. + * @id: Pointer to ID. + * @entry: New entry. + * @limit: Range of ID to allocate. + * @gfp: Memory allocation flags. + * + * Finds an empty entry in @xa between @limit.min and @limit.max, + * stores the index into the @id pointer, then stores the entry at + * that index. A concurrent lookup will not see an uninitialised @id. + * + * Must only be operated on an xarray initialized with flag XA_FLAGS_ALLOC set + * in xa_init_flags(). + * + * Context: Process context. Takes and releases the xa_lock while + * disabling interrupts. May sleep if the @gfp flags permit. + * Return: 0 on success, -ENOMEM if memory could not be allocated or + * -EBUSY if there are no free entries in @limit. + */ +static inline int __must_check xa_alloc_irq(struct xarray *xa, u32 *id, + void *entry, struct xa_limit limit, gfp_t gfp) +{ + int err; + + __might_alloc(gfp); + xa_lock_irq(xa); + err = __xa_alloc(xa, id, entry, limit, gfp); + xa_unlock_irq(xa); + + return err; +} + +/** + * xa_alloc_cyclic() - Find somewhere to store this entry in the XArray. + * @xa: XArray. + * @id: Pointer to ID. + * @entry: New entry. + * @limit: Range of allocated ID. + * @next: Pointer to next ID to allocate. + * @gfp: Memory allocation flags. + * + * Finds an empty entry in @xa between @limit.min and @limit.max, + * stores the index into the @id pointer, then stores the entry at + * that index. A concurrent lookup will not see an uninitialised @id. + * The search for an empty entry will start at @next and will wrap + * around if necessary. + * + * Must only be operated on an xarray initialized with flag XA_FLAGS_ALLOC set + * in xa_init_flags(). + * + * Context: Any context. Takes and releases the xa_lock. May sleep if + * the @gfp flags permit. + * Return: 0 if the allocation succeeded without wrapping. 1 if the + * allocation succeeded after wrapping, -ENOMEM if memory could not be + * allocated or -EBUSY if there are no free entries in @limit. + */ +static inline int xa_alloc_cyclic(struct xarray *xa, u32 *id, void *entry, + struct xa_limit limit, u32 *next, gfp_t gfp) +{ + int err; + + __might_alloc(gfp); + xa_lock(xa); + err = __xa_alloc_cyclic(xa, id, entry, limit, next, gfp); + xa_unlock(xa); + + return err; +} + +/** + * xa_alloc_cyclic_bh() - Find somewhere to store this entry in the XArray. + * @xa: XArray. + * @id: Pointer to ID. + * @entry: New entry. + * @limit: Range of allocated ID. + * @next: Pointer to next ID to allocate. + * @gfp: Memory allocation flags. + * + * Finds an empty entry in @xa between @limit.min and @limit.max, + * stores the index into the @id pointer, then stores the entry at + * that index. A concurrent lookup will not see an uninitialised @id. + * The search for an empty entry will start at @next and will wrap + * around if necessary. + * + * Must only be operated on an xarray initialized with flag XA_FLAGS_ALLOC set + * in xa_init_flags(). + * + * Context: Any context. Takes and releases the xa_lock while + * disabling softirqs. May sleep if the @gfp flags permit. + * Return: 0 if the allocation succeeded without wrapping. 1 if the + * allocation succeeded after wrapping, -ENOMEM if memory could not be + * allocated or -EBUSY if there are no free entries in @limit. + */ +static inline int xa_alloc_cyclic_bh(struct xarray *xa, u32 *id, void *entry, + struct xa_limit limit, u32 *next, gfp_t gfp) +{ + int err; + + __might_alloc(gfp); + xa_lock_bh(xa); + err = __xa_alloc_cyclic(xa, id, entry, limit, next, gfp); + xa_unlock_bh(xa); + + return err; +} + +/** + * xa_alloc_cyclic_irq() - Find somewhere to store this entry in the XArray. + * @xa: XArray. + * @id: Pointer to ID. + * @entry: New entry. + * @limit: Range of allocated ID. + * @next: Pointer to next ID to allocate. + * @gfp: Memory allocation flags. + * + * Finds an empty entry in @xa between @limit.min and @limit.max, + * stores the index into the @id pointer, then stores the entry at + * that index. A concurrent lookup will not see an uninitialised @id. + * The search for an empty entry will start at @next and will wrap + * around if necessary. + * + * Must only be operated on an xarray initialized with flag XA_FLAGS_ALLOC set + * in xa_init_flags(). + * + * Context: Process context. Takes and releases the xa_lock while + * disabling interrupts. May sleep if the @gfp flags permit. + * Return: 0 if the allocation succeeded without wrapping. 1 if the + * allocation succeeded after wrapping, -ENOMEM if memory could not be + * allocated or -EBUSY if there are no free entries in @limit. + */ +static inline int xa_alloc_cyclic_irq(struct xarray *xa, u32 *id, void *entry, + struct xa_limit limit, u32 *next, gfp_t gfp) +{ + int err; + + __might_alloc(gfp); + xa_lock_irq(xa); + err = __xa_alloc_cyclic(xa, id, entry, limit, next, gfp); + xa_unlock_irq(xa); + + return err; +} + +/** + * xa_reserve() - Reserve this index in the XArray. + * @xa: XArray. + * @index: Index into array. + * @gfp: Memory allocation flags. + * + * Ensures there is somewhere to store an entry at @index in the array. + * If there is already something stored at @index, this function does + * nothing. If there was nothing there, the entry is marked as reserved. + * Loading from a reserved entry returns a %NULL pointer. + * + * If you do not use the entry that you have reserved, call xa_release() + * or xa_erase() to free any unnecessary memory. + * + * Context: Any context. Takes and releases the xa_lock. + * May sleep if the @gfp flags permit. + * Return: 0 if the reservation succeeded or -ENOMEM if it failed. + */ +static inline __must_check +int xa_reserve(struct xarray *xa, unsigned long index, gfp_t gfp) +{ + return xa_err(xa_cmpxchg(xa, index, NULL, XA_ZERO_ENTRY, gfp)); +} + +/** + * xa_reserve_bh() - Reserve this index in the XArray. + * @xa: XArray. + * @index: Index into array. + * @gfp: Memory allocation flags. + * + * A softirq-disabling version of xa_reserve(). + * + * Context: Any context. Takes and releases the xa_lock while + * disabling softirqs. + * Return: 0 if the reservation succeeded or -ENOMEM if it failed. + */ +static inline __must_check +int xa_reserve_bh(struct xarray *xa, unsigned long index, gfp_t gfp) +{ + return xa_err(xa_cmpxchg_bh(xa, index, NULL, XA_ZERO_ENTRY, gfp)); +} + +/** + * xa_reserve_irq() - Reserve this index in the XArray. + * @xa: XArray. + * @index: Index into array. + * @gfp: Memory allocation flags. + * + * An interrupt-disabling version of xa_reserve(). + * + * Context: Process context. Takes and releases the xa_lock while + * disabling interrupts. + * Return: 0 if the reservation succeeded or -ENOMEM if it failed. + */ +static inline __must_check +int xa_reserve_irq(struct xarray *xa, unsigned long index, gfp_t gfp) +{ + return xa_err(xa_cmpxchg_irq(xa, index, NULL, XA_ZERO_ENTRY, gfp)); +} + +/** + * xa_release() - Release a reserved entry. + * @xa: XArray. + * @index: Index of entry. + * + * After calling xa_reserve(), you can call this function to release the + * reservation. If the entry at @index has been stored to, this function + * will do nothing. + */ +static inline void xa_release(struct xarray *xa, unsigned long index) +{ + xa_cmpxchg(xa, index, XA_ZERO_ENTRY, NULL, 0); +} + +/* Everything below here is the Advanced API. Proceed with caution. */ + +/* + * The xarray is constructed out of a set of 'chunks' of pointers. Choosing + * the best chunk size requires some tradeoffs. A power of two recommends + * itself so that we can walk the tree based purely on shifts and masks. + * Generally, the larger the better; as the number of slots per level of the + * tree increases, the less tall the tree needs to be. But that needs to be + * balanced against the memory consumption of each node. On a 64-bit system, + * xa_node is currently 576 bytes, and we get 7 of them per 4kB page. If we + * doubled the number of slots per node, we'd get only 3 nodes per 4kB page. + */ +#ifndef XA_CHUNK_SHIFT +#define XA_CHUNK_SHIFT (IS_ENABLED(CONFIG_BASE_SMALL) ? 4 : 6) +#endif +#define XA_CHUNK_SIZE (1UL << XA_CHUNK_SHIFT) +#define XA_CHUNK_MASK (XA_CHUNK_SIZE - 1) +#define XA_MAX_MARKS 3 +#define XA_MARK_LONGS BITS_TO_LONGS(XA_CHUNK_SIZE) + +/* + * @count is the count of every non-NULL element in the ->slots array + * whether that is a value entry, a retry entry, a user pointer, + * a sibling entry or a pointer to the next level of the tree. + * @nr_values is the count of every element in ->slots which is + * either a value entry or a sibling of a value entry. + */ +struct xa_node { + unsigned char shift; /* Bits remaining in each slot */ + unsigned char offset; /* Slot offset in parent */ + unsigned char count; /* Total entry count */ + unsigned char nr_values; /* Value entry count */ + struct xa_node __rcu *parent; /* NULL at top of tree */ + struct xarray *array; /* The array we belong to */ + union { + struct list_head private_list; /* For tree user */ + struct rcu_head rcu_head; /* Used when freeing node */ + }; + void __rcu *slots[XA_CHUNK_SIZE]; + union { + unsigned long tags[XA_MAX_MARKS][XA_MARK_LONGS]; + unsigned long marks[XA_MAX_MARKS][XA_MARK_LONGS]; + }; +}; + +void xa_dump(const struct xarray *); +void xa_dump_node(const struct xa_node *); + +#ifdef XA_DEBUG +#define XA_BUG_ON(xa, x) do { \ + if (x) { \ + xa_dump(xa); \ + BUG(); \ + } \ + } while (0) +#define XA_NODE_BUG_ON(node, x) do { \ + if (x) { \ + if (node) xa_dump_node(node); \ + BUG(); \ + } \ + } while (0) +#else +#define XA_BUG_ON(xa, x) do { } while (0) +#define XA_NODE_BUG_ON(node, x) do { } while (0) +#endif + +/* Private */ +static inline void *xa_head(const struct xarray *xa) +{ + return rcu_dereference_check(xa->xa_head, + lockdep_is_held(&xa->xa_lock)); +} + +/* Private */ +static inline void *xa_head_locked(const struct xarray *xa) +{ + return rcu_dereference_protected(xa->xa_head, + lockdep_is_held(&xa->xa_lock)); +} + +/* Private */ +static inline void *xa_entry(const struct xarray *xa, + const struct xa_node *node, unsigned int offset) +{ + XA_NODE_BUG_ON(node, offset >= XA_CHUNK_SIZE); + return rcu_dereference_check(node->slots[offset], + lockdep_is_held(&xa->xa_lock)); +} + +/* Private */ +static inline void *xa_entry_locked(const struct xarray *xa, + const struct xa_node *node, unsigned int offset) +{ + XA_NODE_BUG_ON(node, offset >= XA_CHUNK_SIZE); + return rcu_dereference_protected(node->slots[offset], + lockdep_is_held(&xa->xa_lock)); +} + +/* Private */ +static inline struct xa_node *xa_parent(const struct xarray *xa, + const struct xa_node *node) +{ + return rcu_dereference_check(node->parent, + lockdep_is_held(&xa->xa_lock)); +} + +/* Private */ +static inline struct xa_node *xa_parent_locked(const struct xarray *xa, + const struct xa_node *node) +{ + return rcu_dereference_protected(node->parent, + lockdep_is_held(&xa->xa_lock)); +} + +/* Private */ +static inline void *xa_mk_node(const struct xa_node *node) +{ + return (void *)((unsigned long)node | 2); +} + +/* Private */ +static inline struct xa_node *xa_to_node(const void *entry) +{ + return (struct xa_node *)((unsigned long)entry - 2); +} + +/* Private */ +static inline bool xa_is_node(const void *entry) +{ + return xa_is_internal(entry) && (unsigned long)entry > 4096; +} + +/* Private */ +static inline void *xa_mk_sibling(unsigned int offset) +{ + return xa_mk_internal(offset); +} + +/* Private */ +static inline unsigned long xa_to_sibling(const void *entry) +{ + return xa_to_internal(entry); +} + +/** + * xa_is_sibling() - Is the entry a sibling entry? + * @entry: Entry retrieved from the XArray + * + * Return: %true if the entry is a sibling entry. + */ +static inline bool xa_is_sibling(const void *entry) +{ + return IS_ENABLED(CONFIG_XARRAY_MULTI) && xa_is_internal(entry) && + (entry < xa_mk_sibling(XA_CHUNK_SIZE - 1)); +} + +#define XA_RETRY_ENTRY xa_mk_internal(256) + +/** + * xa_is_retry() - Is the entry a retry entry? + * @entry: Entry retrieved from the XArray + * + * Return: %true if the entry is a retry entry. + */ +static inline bool xa_is_retry(const void *entry) +{ + return unlikely(entry == XA_RETRY_ENTRY); +} + +/** + * xa_is_advanced() - Is the entry only permitted for the advanced API? + * @entry: Entry to be stored in the XArray. + * + * Return: %true if the entry cannot be stored by the normal API. + */ +static inline bool xa_is_advanced(const void *entry) +{ + return xa_is_internal(entry) && (entry <= XA_RETRY_ENTRY); +} + +/** + * typedef xa_update_node_t - A callback function from the XArray. + * @node: The node which is being processed + * + * This function is called every time the XArray updates the count of + * present and value entries in a node. It allows advanced users to + * maintain the private_list in the node. + * + * Context: The xa_lock is held and interrupts may be disabled. + * Implementations should not drop the xa_lock, nor re-enable + * interrupts. + */ +typedef void (*xa_update_node_t)(struct xa_node *node); + +void xa_delete_node(struct xa_node *, xa_update_node_t); + +/* + * The xa_state is opaque to its users. It contains various different pieces + * of state involved in the current operation on the XArray. It should be + * declared on the stack and passed between the various internal routines. + * The various elements in it should not be accessed directly, but only + * through the provided accessor functions. The below documentation is for + * the benefit of those working on the code, not for users of the XArray. + * + * @xa_node usually points to the xa_node containing the slot we're operating + * on (and @xa_offset is the offset in the slots array). If there is a + * single entry in the array at index 0, there are no allocated xa_nodes to + * point to, and so we store %NULL in @xa_node. @xa_node is set to + * the value %XAS_RESTART if the xa_state is not walked to the correct + * position in the tree of nodes for this operation. If an error occurs + * during an operation, it is set to an %XAS_ERROR value. If we run off the + * end of the allocated nodes, it is set to %XAS_BOUNDS. + */ +struct xa_state { + struct xarray *xa; + unsigned long xa_index; + unsigned char xa_shift; + unsigned char xa_sibs; + unsigned char xa_offset; + unsigned char xa_pad; /* Helps gcc generate better code */ + struct xa_node *xa_node; + struct xa_node *xa_alloc; + xa_update_node_t xa_update; + struct list_lru *xa_lru; +}; + +/* + * We encode errnos in the xas->xa_node. If an error has happened, we need to + * drop the lock to fix it, and once we've done so the xa_state is invalid. + */ +#define XA_ERROR(errno) ((struct xa_node *)(((unsigned long)errno << 2) | 2UL)) +#define XAS_BOUNDS ((struct xa_node *)1UL) +#define XAS_RESTART ((struct xa_node *)3UL) + +#define __XA_STATE(array, index, shift, sibs) { \ + .xa = array, \ + .xa_index = index, \ + .xa_shift = shift, \ + .xa_sibs = sibs, \ + .xa_offset = 0, \ + .xa_pad = 0, \ + .xa_node = XAS_RESTART, \ + .xa_alloc = NULL, \ + .xa_update = NULL, \ + .xa_lru = NULL, \ +} + +/** + * XA_STATE() - Declare an XArray operation state. + * @name: Name of this operation state (usually xas). + * @array: Array to operate on. + * @index: Initial index of interest. + * + * Declare and initialise an xa_state on the stack. + */ +#define XA_STATE(name, array, index) \ + struct xa_state name = __XA_STATE(array, index, 0, 0) + +/** + * XA_STATE_ORDER() - Declare an XArray operation state. + * @name: Name of this operation state (usually xas). + * @array: Array to operate on. + * @index: Initial index of interest. + * @order: Order of entry. + * + * Declare and initialise an xa_state on the stack. This variant of + * XA_STATE() allows you to specify the 'order' of the element you + * want to operate on.` + */ +#define XA_STATE_ORDER(name, array, index, order) \ + struct xa_state name = __XA_STATE(array, \ + (index >> order) << order, \ + order - (order % XA_CHUNK_SHIFT), \ + (1U << (order % XA_CHUNK_SHIFT)) - 1) + +#define xas_marked(xas, mark) xa_marked((xas)->xa, (mark)) +#define xas_trylock(xas) xa_trylock((xas)->xa) +#define xas_lock(xas) xa_lock((xas)->xa) +#define xas_unlock(xas) xa_unlock((xas)->xa) +#define xas_lock_bh(xas) xa_lock_bh((xas)->xa) +#define xas_unlock_bh(xas) xa_unlock_bh((xas)->xa) +#define xas_lock_irq(xas) xa_lock_irq((xas)->xa) +#define xas_unlock_irq(xas) xa_unlock_irq((xas)->xa) +#define xas_lock_irqsave(xas, flags) \ + xa_lock_irqsave((xas)->xa, flags) +#define xas_unlock_irqrestore(xas, flags) \ + xa_unlock_irqrestore((xas)->xa, flags) + +/** + * xas_error() - Return an errno stored in the xa_state. + * @xas: XArray operation state. + * + * Return: 0 if no error has been noted. A negative errno if one has. + */ +static inline int xas_error(const struct xa_state *xas) +{ + return xa_err(xas->xa_node); +} + +/** + * xas_set_err() - Note an error in the xa_state. + * @xas: XArray operation state. + * @err: Negative error number. + * + * Only call this function with a negative @err; zero or positive errors + * will probably not behave the way you think they should. If you want + * to clear the error from an xa_state, use xas_reset(). + */ +static inline void xas_set_err(struct xa_state *xas, long err) +{ + xas->xa_node = XA_ERROR(err); +} + +/** + * xas_invalid() - Is the xas in a retry or error state? + * @xas: XArray operation state. + * + * Return: %true if the xas cannot be used for operations. + */ +static inline bool xas_invalid(const struct xa_state *xas) +{ + return (unsigned long)xas->xa_node & 3; +} + +/** + * xas_valid() - Is the xas a valid cursor into the array? + * @xas: XArray operation state. + * + * Return: %true if the xas can be used for operations. + */ +static inline bool xas_valid(const struct xa_state *xas) +{ + return !xas_invalid(xas); +} + +/** + * xas_is_node() - Does the xas point to a node? + * @xas: XArray operation state. + * + * Return: %true if the xas currently references a node. + */ +static inline bool xas_is_node(const struct xa_state *xas) +{ + return xas_valid(xas) && xas->xa_node; +} + +/* True if the pointer is something other than a node */ +static inline bool xas_not_node(struct xa_node *node) +{ + return ((unsigned long)node & 3) || !node; +} + +/* True if the node represents RESTART or an error */ +static inline bool xas_frozen(struct xa_node *node) +{ + return (unsigned long)node & 2; +} + +/* True if the node represents head-of-tree, RESTART or BOUNDS */ +static inline bool xas_top(struct xa_node *node) +{ + return node <= XAS_RESTART; +} + +/** + * xas_reset() - Reset an XArray operation state. + * @xas: XArray operation state. + * + * Resets the error or walk state of the @xas so future walks of the + * array will start from the root. Use this if you have dropped the + * xarray lock and want to reuse the xa_state. + * + * Context: Any context. + */ +static inline void xas_reset(struct xa_state *xas) +{ + xas->xa_node = XAS_RESTART; +} + +/** + * xas_retry() - Retry the operation if appropriate. + * @xas: XArray operation state. + * @entry: Entry from xarray. + * + * The advanced functions may sometimes return an internal entry, such as + * a retry entry or a zero entry. This function sets up the @xas to restart + * the walk from the head of the array if needed. + * + * Context: Any context. + * Return: true if the operation needs to be retried. + */ +static inline bool xas_retry(struct xa_state *xas, const void *entry) +{ + if (xa_is_zero(entry)) + return true; + if (!xa_is_retry(entry)) + return false; + xas_reset(xas); + return true; +} + +void *xas_load(struct xa_state *); +void *xas_store(struct xa_state *, void *entry); +void *xas_find(struct xa_state *, unsigned long max); +void *xas_find_conflict(struct xa_state *); + +bool xas_get_mark(const struct xa_state *, xa_mark_t); +void xas_set_mark(const struct xa_state *, xa_mark_t); +void xas_clear_mark(const struct xa_state *, xa_mark_t); +void *xas_find_marked(struct xa_state *, unsigned long max, xa_mark_t); +void xas_init_marks(const struct xa_state *); + +bool xas_nomem(struct xa_state *, gfp_t); +void xas_destroy(struct xa_state *); +void xas_pause(struct xa_state *); + +void xas_create_range(struct xa_state *); + +#ifdef CONFIG_XARRAY_MULTI +int xa_get_order(struct xarray *, unsigned long index); +int xas_get_order(struct xa_state *xas); +void xas_split(struct xa_state *, void *entry, unsigned int order); +void xas_split_alloc(struct xa_state *, void *entry, unsigned int order, gfp_t); +#else +static inline int xa_get_order(struct xarray *xa, unsigned long index) +{ + return 0; +} + +static inline int xas_get_order(struct xa_state *xas) +{ + return 0; +} + +static inline void xas_split(struct xa_state *xas, void *entry, + unsigned int order) +{ + xas_store(xas, entry); +} + +static inline void xas_split_alloc(struct xa_state *xas, void *entry, + unsigned int order, gfp_t gfp) +{ +} +#endif + +/** + * xas_reload() - Refetch an entry from the xarray. + * @xas: XArray operation state. + * + * Use this function to check that a previously loaded entry still has + * the same value. This is useful for the lockless pagecache lookup where + * we walk the array with only the RCU lock to protect us, lock the page, + * then check that the page hasn't moved since we looked it up. + * + * The caller guarantees that @xas is still valid. If it may be in an + * error or restart state, call xas_load() instead. + * + * Return: The entry at this location in the xarray. + */ +static inline void *xas_reload(struct xa_state *xas) +{ + struct xa_node *node = xas->xa_node; + void *entry; + char offset; + + if (!node) + return xa_head(xas->xa); + if (IS_ENABLED(CONFIG_XARRAY_MULTI)) { + offset = (xas->xa_index >> node->shift) & XA_CHUNK_MASK; + entry = xa_entry(xas->xa, node, offset); + if (!xa_is_sibling(entry)) + return entry; + offset = xa_to_sibling(entry); + } else { + offset = xas->xa_offset; + } + return xa_entry(xas->xa, node, offset); +} + +/** + * xas_set() - Set up XArray operation state for a different index. + * @xas: XArray operation state. + * @index: New index into the XArray. + * + * Move the operation state to refer to a different index. This will + * have the effect of starting a walk from the top; see xas_next() + * to move to an adjacent index. + */ +static inline void xas_set(struct xa_state *xas, unsigned long index) +{ + xas->xa_index = index; + xas->xa_node = XAS_RESTART; +} + +/** + * xas_advance() - Skip over sibling entries. + * @xas: XArray operation state. + * @index: Index of last sibling entry. + * + * Move the operation state to refer to the last sibling entry. + * This is useful for loops that normally want to see sibling + * entries but sometimes want to skip them. Use xas_set() if you + * want to move to an index which is not part of this entry. + */ +static inline void xas_advance(struct xa_state *xas, unsigned long index) +{ + unsigned char shift = xas_is_node(xas) ? xas->xa_node->shift : 0; + + xas->xa_index = index; + xas->xa_offset = (index >> shift) & XA_CHUNK_MASK; +} + +/** + * xas_set_order() - Set up XArray operation state for a multislot entry. + * @xas: XArray operation state. + * @index: Target of the operation. + * @order: Entry occupies 2^@order indices. + */ +static inline void xas_set_order(struct xa_state *xas, unsigned long index, + unsigned int order) +{ +#ifdef CONFIG_XARRAY_MULTI + xas->xa_index = order < BITS_PER_LONG ? (index >> order) << order : 0; + xas->xa_shift = order - (order % XA_CHUNK_SHIFT); + xas->xa_sibs = (1 << (order % XA_CHUNK_SHIFT)) - 1; + xas->xa_node = XAS_RESTART; +#else + BUG_ON(order > 0); + xas_set(xas, index); +#endif +} + +/** + * xas_set_update() - Set up XArray operation state for a callback. + * @xas: XArray operation state. + * @update: Function to call when updating a node. + * + * The XArray can notify a caller after it has updated an xa_node. + * This is advanced functionality and is only needed by the page + * cache and swap cache. + */ +static inline void xas_set_update(struct xa_state *xas, xa_update_node_t update) +{ + xas->xa_update = update; +} + +static inline void xas_set_lru(struct xa_state *xas, struct list_lru *lru) +{ + xas->xa_lru = lru; +} + +/** + * xas_next_entry() - Advance iterator to next present entry. + * @xas: XArray operation state. + * @max: Highest index to return. + * + * xas_next_entry() is an inline function to optimise xarray traversal for + * speed. It is equivalent to calling xas_find(), and will call xas_find() + * for all the hard cases. + * + * Return: The next present entry after the one currently referred to by @xas. + */ +static inline void *xas_next_entry(struct xa_state *xas, unsigned long max) +{ + struct xa_node *node = xas->xa_node; + void *entry; + + if (unlikely(xas_not_node(node) || node->shift || + xas->xa_offset != (xas->xa_index & XA_CHUNK_MASK))) + return xas_find(xas, max); + + do { + if (unlikely(xas->xa_index >= max)) + return xas_find(xas, max); + if (unlikely(xas->xa_offset == XA_CHUNK_MASK)) + return xas_find(xas, max); + entry = xa_entry(xas->xa, node, xas->xa_offset + 1); + if (unlikely(xa_is_internal(entry))) + return xas_find(xas, max); + xas->xa_offset++; + xas->xa_index++; + } while (!entry); + + return entry; +} + +/* Private */ +static inline unsigned int xas_find_chunk(struct xa_state *xas, bool advance, + xa_mark_t mark) +{ + unsigned long *addr = xas->xa_node->marks[(__force unsigned)mark]; + unsigned int offset = xas->xa_offset; + + if (advance) + offset++; + if (XA_CHUNK_SIZE == BITS_PER_LONG) { + if (offset < XA_CHUNK_SIZE) { + unsigned long data = *addr & (~0UL << offset); + if (data) + return __ffs(data); + } + return XA_CHUNK_SIZE; + } + + return find_next_bit(addr, XA_CHUNK_SIZE, offset); +} + +/** + * xas_next_marked() - Advance iterator to next marked entry. + * @xas: XArray operation state. + * @max: Highest index to return. + * @mark: Mark to search for. + * + * xas_next_marked() is an inline function to optimise xarray traversal for + * speed. It is equivalent to calling xas_find_marked(), and will call + * xas_find_marked() for all the hard cases. + * + * Return: The next marked entry after the one currently referred to by @xas. + */ +static inline void *xas_next_marked(struct xa_state *xas, unsigned long max, + xa_mark_t mark) +{ + struct xa_node *node = xas->xa_node; + void *entry; + unsigned int offset; + + if (unlikely(xas_not_node(node) || node->shift)) + return xas_find_marked(xas, max, mark); + offset = xas_find_chunk(xas, true, mark); + xas->xa_offset = offset; + xas->xa_index = (xas->xa_index & ~XA_CHUNK_MASK) + offset; + if (xas->xa_index > max) + return NULL; + if (offset == XA_CHUNK_SIZE) + return xas_find_marked(xas, max, mark); + entry = xa_entry(xas->xa, node, offset); + if (!entry) + return xas_find_marked(xas, max, mark); + return entry; +} + +/* + * If iterating while holding a lock, drop the lock and reschedule + * every %XA_CHECK_SCHED loops. + */ +enum { + XA_CHECK_SCHED = 4096, +}; + +/** + * xas_for_each() - Iterate over a range of an XArray. + * @xas: XArray operation state. + * @entry: Entry retrieved from the array. + * @max: Maximum index to retrieve from array. + * + * The loop body will be executed for each entry present in the xarray + * between the current xas position and @max. @entry will be set to + * the entry retrieved from the xarray. It is safe to delete entries + * from the array in the loop body. You should hold either the RCU lock + * or the xa_lock while iterating. If you need to drop the lock, call + * xas_pause() first. + */ +#define xas_for_each(xas, entry, max) \ + for (entry = xas_find(xas, max); entry; \ + entry = xas_next_entry(xas, max)) + +/** + * xas_for_each_marked() - Iterate over a range of an XArray. + * @xas: XArray operation state. + * @entry: Entry retrieved from the array. + * @max: Maximum index to retrieve from array. + * @mark: Mark to search for. + * + * The loop body will be executed for each marked entry in the xarray + * between the current xas position and @max. @entry will be set to + * the entry retrieved from the xarray. It is safe to delete entries + * from the array in the loop body. You should hold either the RCU lock + * or the xa_lock while iterating. If you need to drop the lock, call + * xas_pause() first. + */ +#define xas_for_each_marked(xas, entry, max, mark) \ + for (entry = xas_find_marked(xas, max, mark); entry; \ + entry = xas_next_marked(xas, max, mark)) + +/** + * xas_for_each_conflict() - Iterate over a range of an XArray. + * @xas: XArray operation state. + * @entry: Entry retrieved from the array. + * + * The loop body will be executed for each entry in the XArray that + * lies within the range specified by @xas. If the loop terminates + * normally, @entry will be %NULL. The user may break out of the loop, + * which will leave @entry set to the conflicting entry. The caller + * may also call xa_set_err() to exit the loop while setting an error + * to record the reason. + */ +#define xas_for_each_conflict(xas, entry) \ + while ((entry = xas_find_conflict(xas))) + +void *__xas_next(struct xa_state *); +void *__xas_prev(struct xa_state *); + +/** + * xas_prev() - Move iterator to previous index. + * @xas: XArray operation state. + * + * If the @xas was in an error state, it will remain in an error state + * and this function will return %NULL. If the @xas has never been walked, + * it will have the effect of calling xas_load(). Otherwise one will be + * subtracted from the index and the state will be walked to the correct + * location in the array for the next operation. + * + * If the iterator was referencing index 0, this function wraps + * around to %ULONG_MAX. + * + * Return: The entry at the new index. This may be %NULL or an internal + * entry. + */ +static inline void *xas_prev(struct xa_state *xas) +{ + struct xa_node *node = xas->xa_node; + + if (unlikely(xas_not_node(node) || node->shift || + xas->xa_offset == 0)) + return __xas_prev(xas); + + xas->xa_index--; + xas->xa_offset--; + return xa_entry(xas->xa, node, xas->xa_offset); +} + +/** + * xas_next() - Move state to next index. + * @xas: XArray operation state. + * + * If the @xas was in an error state, it will remain in an error state + * and this function will return %NULL. If the @xas has never been walked, + * it will have the effect of calling xas_load(). Otherwise one will be + * added to the index and the state will be walked to the correct + * location in the array for the next operation. + * + * If the iterator was referencing index %ULONG_MAX, this function wraps + * around to 0. + * + * Return: The entry at the new index. This may be %NULL or an internal + * entry. + */ +static inline void *xas_next(struct xa_state *xas) +{ + struct xa_node *node = xas->xa_node; + + if (unlikely(xas_not_node(node) || node->shift || + xas->xa_offset == XA_CHUNK_MASK)) + return __xas_next(xas); + + xas->xa_index++; + xas->xa_offset++; + return xa_entry(xas->xa, node, xas->xa_offset); +} + +#endif /* _LINUX_XARRAY_H */ diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/Makefile b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/Makefile index 369b64605dd..4232ffa81e5 100644 --- a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/Makefile +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/Makefile @@ -8,6 +8,13 @@ all : CHECK $(SUBDIRS) CHECK : @echo $(pes_parent_dir) +# dev_sysfs's modpost step reads dev_cfg/Module.symvers (see +# dev_sysfs/Makefile's KBUILD_EXTRA_SYMBOLS). Without an explicit +# ordering dependency, make -j (SONIC_BUILD_JOBS) can launch dev_sysfs +# in parallel with dev_cfg and the modpost step fails with: +# dev_cfg/Module.symvers: No such file or directory +dev_sysfs: dev_cfg + $(SUBDIRS):ECHO #@echo $@ make -C $@ diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/cfg/dfd_cfg.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/cfg/dfd_cfg.c index 44bfe8e95b6..28763bc3ab8 100644 --- a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/cfg/dfd_cfg.c +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/cfg/dfd_cfg.c @@ -24,6 +24,7 @@ #include #include #include +#include #include "../include/dfd_module.h" #include "../include/dfd_cfg_file.h" @@ -246,7 +247,11 @@ static int dfd_ko_cfg_add_str_item(int key, char *str, int line_num) return -1; } mem_clear(str_cfg, DFD_CFG_STR_MAX_LEN); +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 8, 0) strlcpy(str_cfg, str, DFD_CFG_STR_MAX_LEN); +#else + strscpy(str_cfg, str, DFD_CFG_STR_MAX_LEN); +#endif rv = lnode_insert_node(&dfd_ko_cfg_list_root, key, str_cfg); if (rv == 0) { @@ -260,7 +265,11 @@ static int dfd_ko_cfg_add_str_item(int key, char *str, int line_num) } else { DBG_DEBUG(DBG_WARN, "line%d: replace string item[%s->%s], key=0x%08x\n", line_num, str_cfg, str, key); mem_clear(str_cfg, DFD_CFG_STR_MAX_LEN); +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 8, 0) strlcpy(str_cfg, str, DFD_CFG_STR_MAX_LEN); +#else + strscpy(str_cfg, str, DFD_CFG_STR_MAX_LEN); +#endif } return 0; @@ -454,7 +463,11 @@ static void dfd_ko_cfg_set_info_ctrl_mem_value(info_ctrl_t *info_ctrl, info_ctrl break; case INFO_CTRL_MEM_FPATH: mem_clear(info_ctrl->fpath, sizeof(info_ctrl->fpath)); +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 8, 0) strlcpy(info_ctrl->fpath, buf_val, sizeof(info_ctrl->fpath)); +#else + strscpy(info_ctrl->fpath, buf_val, sizeof(info_ctrl->fpath)); +#endif break; case INFO_CTRL_MEM_ADDR: dfd_ko_cfg_get_value_from_char(buf_val, &(info_ctrl->addr), line_num); @@ -467,7 +480,11 @@ static void dfd_ko_cfg_set_info_ctrl_mem_value(info_ctrl_t *info_ctrl, info_ctrl break; case INFO_CTRL_MEM_STR_CONS: mem_clear(info_ctrl->str_cons, sizeof(info_ctrl->str_cons)); +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 8, 0) strlcpy(info_ctrl->str_cons, buf_val, sizeof(info_ctrl->str_cons)); +#else + strscpy(info_ctrl->str_cons, buf_val, sizeof(info_ctrl->str_cons)); +#endif break; case INFO_CTRL_MEM_INT_EXTRA1: dfd_ko_cfg_get_value_from_char(buf_val, &(info_ctrl->int_extra1), line_num); diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/cfg/dfd_cfg_info.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/cfg/dfd_cfg_info.c index 26a7fab2c96..9279d965367 100644 --- a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/cfg/dfd_cfg_info.c +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/cfg/dfd_cfg_info.c @@ -571,6 +571,22 @@ static int dfd_info_reg2data_mac_th5(int data, int *temp_value) return DFD_RV_OK; } +static int dfd_info_reg2data_mac_th6(int data, int *temp_value) +{ + int tmp_val; + int val; + + DBG_DEBUG(DBG_VERBOSE, "reg2data_mac_th6, data=%d\n", data); + + tmp_val = (data >> 4) | (data & 0xf); + val = 378850 - (((tmp_val - 2) * 259680) / 2000); + + DBG_DEBUG(DBG_VERBOSE, "reg2data_mac_th6, val=%d\n", val); + *temp_value = val; + + return DFD_RV_OK; +} + static int dfd_info_reg2data_mac_th4(int data, int *temp_value) { int tmp_val; @@ -697,6 +713,9 @@ static int dfd_info_get_cpld_temperature(int key, int *value) case MAC_TH4: rv = dfd_info_reg2data_mac_th4(temp_reg, &temp_value); break; + case MAC_TH6: + rv = dfd_info_reg2data_mac_th6(temp_reg, &temp_value); + break; default: temp_value = temp_reg; rv = DFD_RV_OK; diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_cfg_info.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_cfg_info.h index def93cd5135..ce0144e74c8 100644 --- a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_cfg_info.h +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_cfg_info.h @@ -118,7 +118,8 @@ typedef enum sensor_format_mem_s { TMP464, MAC_TH5, MAC_TD3, - MAC_TH4 + MAC_TH4, + MAC_TH6 } sensor_format_mem_t; typedef int (*info_hwmon_buf_f)(uint8_t *buf, int buf_len, uint8_t *buf_new, int *buf_len_new, info_ctrl_t *info_ctrl); diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/pmbus.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/pmbus.h index 853dba4333e..927bf91869c 100755 --- a/platform/broadcom/sonic-platform-modules-micas/common/modules/pmbus.h +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/pmbus.h @@ -495,6 +495,30 @@ extern const struct regulator_ops pmbus_regulator_ops; #define PMBUS_REGULATOR(_name, _id) PMBUS_REGULATOR_STEP(_name, _id, 0, 0) +#define PMBUS_DEV_NAME_SIZE (256) + +typedef struct { + char device_name[I2C_NAME_SIZE]; + char chip_name[I2C_NAME_SIZE]; + uint8_t device_id[PMBUS_DEV_NAME_SIZE]; + uint32_t dev_id_len; +} pmbus_dev_info_t; + +pmbus_dev_info_t pmbus_dev_infos[] = { + {.device_name = "xdpe12284", .chip_name = "XDPE12284C", .device_id = {0x79, 0x00}, .dev_id_len = 2}, + {.device_name = "xdpe12284", .chip_name = "XDPE12284C", .device_id = {0x79, 0x01}, .dev_id_len = 2}, + {.device_name = "xdpe12284", .chip_name = "XDPE12284C", .device_id = {0x79, 0x02}, .dev_id_len = 2}, + {.device_name = "wb_xdpe132g5c_pmbus", .chip_name = "XDPE132G5C", .device_id = {0x76}, .dev_id_len = 1}, + {.device_name = "wb_xdpe132g5c_pmbus", .chip_name = "XDPE132G5D", .device_id = {0x7c}, .dev_id_len = 1}, + {.device_name = "wb_xdpe1a2g5b_pmbus", .chip_name = "XDPE1A2G5B", .device_id = {0x01, 0x9e}, .dev_id_len = 2}, + /* The driver does not support RAA228248, using RAA228228 instead. */ + {.device_name = "raa228228", .chip_name = "RAA228248", .device_id = {0x00, 0xbc, 0xd2, 0x49}, .dev_id_len = 4}, + {.device_name = "raa228228", .chip_name = "RAA22962048", .device_id = {0x00, 0x9B, 0xD2, 0x49}, .dev_id_len = 4}, + /* The old manual ID is 0x49d26e00, and the new manual ID is 0x49d28100. */ + {.device_name = "isl69260", .chip_name = "ISL69260", .device_id = {0x00, 0x81, 0xd2, 0x49}, .dev_id_len = 4}, + {.device_name = "isl69260", .chip_name = "ISL69260", .device_id = {0x00, 0x6e, 0xd2, 0x49}, .dev_id_len = 4}, +}; + /* Function declarations */ void pmbus_clear_cache(struct i2c_client *client); diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/device_driver/sysled_device_driver.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/device_driver/sysled_device_driver.c index 05da8b68008..188e6e4f85e 100644 --- a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/device_driver/sysled_device_driver.c +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/device_driver/sysled_device_driver.c @@ -187,6 +187,29 @@ static int wb_set_id_led_status(int status) return ret; } +/* Similar to wb_get_sys_led_status */ +static ssize_t wb_get_lan_led_status(char *buf, size_t count) +{ + int ret; + + check_p(g_drv); + check_p(g_drv->get_lan_led_status); + + ret = g_drv->get_lan_led_status(buf, count); + return ret; +} + +/* Similar to wb_set_sys_led_status */ +static int wb_set_lan_led_status(int status) +{ + int ret; + + check_p(g_drv); + check_p(g_drv->set_lan_led_status); + + ret = g_drv->set_lan_led_status(status); + return ret; +} /**************************************end of sysled******************************************/ static struct s3ip_sysfs_sysled_drivers_s drivers = { @@ -204,6 +227,8 @@ static struct s3ip_sysfs_sysled_drivers_s drivers = { .set_sys_psu_led_status = wb_set_sys_psu_led_status, .get_id_led_status = wb_get_id_led_status, .set_id_led_status = wb_set_id_led_status, + .get_lan_led_status = wb_get_lan_led_status, + .set_lan_led_status = wb_set_lan_led_status, }; static int __init sysled_init(void) diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/cfg/dfd_cfg.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/cfg/dfd_cfg.c index 0637d8566aa..52c3d08c109 100644 --- a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/cfg/dfd_cfg.c +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/cfg/dfd_cfg.c @@ -24,6 +24,7 @@ #include #include #include +#include #include "wb_module.h" #include "dfd_cfg_file.h" @@ -146,7 +147,11 @@ static void dfd_ko_cfg_regval_conv_lst_add(struct list_head *root, int val, char val_convert->index1 = index1; val_convert->index2 = index2; if (str != NULL) { +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 8, 0) strlcpy(val_convert->str_val, str, sizeof(val_convert->str_val)); +#else + strscpy(val_convert->str_val, str, sizeof(val_convert->str_val)); +#endif } /* After initialization, the list does not change and does not need to be locked */ @@ -517,7 +522,11 @@ static int dfd_ko_cfg_add_str_item(uint64_t key, char *str, int line_num) return -1; } mem_clear(str_cfg, DFD_CFG_STR_MAX_LEN); +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 8, 0) strlcpy(str_cfg, str, DFD_CFG_STR_MAX_LEN); +#else + strscpy(str_cfg, str, DFD_CFG_STR_MAX_LEN); +#endif /* Add to linked list */ rv = lnode_insert_node(&dfd_ko_cfg_list_root, key, str_cfg); @@ -535,7 +544,11 @@ static int dfd_ko_cfg_add_str_item(uint64_t key, char *str, int line_num) DBG_DEBUG(DBG_WARN, "line%d: replace string item[%s->%s], key=0x%08llx\n", line_num, str_cfg, str, key); mem_clear(str_cfg, DFD_CFG_STR_MAX_LEN); +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 8, 0) strlcpy(str_cfg, str, DFD_CFG_STR_MAX_LEN); +#else + strscpy(str_cfg, str, DFD_CFG_STR_MAX_LEN); +#endif } return 0; @@ -748,7 +761,11 @@ static void dfd_ko_cfg_set_info_ctrl_mem_value(info_ctrl_t *info_ctrl, info_ctrl break; case INFO_CTRL_MEM_FPATH: mem_clear(info_ctrl->fpath, sizeof(info_ctrl->fpath)); +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 8, 0) strlcpy(info_ctrl->fpath, buf_val, sizeof(info_ctrl->fpath)); +#else + strscpy(info_ctrl->fpath, buf_val, sizeof(info_ctrl->fpath)); +#endif break; case INFO_CTRL_MEM_ADDR: dfd_ko_cfg_get_value_from_char(buf_val, &(info_ctrl->addr), line_num); @@ -761,7 +778,14 @@ static void dfd_ko_cfg_set_info_ctrl_mem_value(info_ctrl_t *info_ctrl, info_ctrl break; case INFO_CTRL_MEM_STR_CONS: mem_clear(info_ctrl->str_cons, sizeof(info_ctrl->str_cons)); +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 8, 0) strlcpy(info_ctrl->str_cons, buf_val, sizeof(info_ctrl->str_cons)); +#else + strscpy(info_ctrl->str_cons, buf_val, sizeof(info_ctrl->str_cons)); +#endif + break; + case INFO_CTRL_VAL_TYPE: + info_ctrl->val_type = dfd_ko_cfg_get_enum_value_by_str(g_info_val_type_str, INFO_VAL_TYPE_END, buf_val); break; case INFO_CTRL_MEM_INT_EXTRA1: dfd_ko_cfg_get_value_from_char(buf_val, &(info_ctrl->int_extra1), line_num); diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/cfg/dfd_cfg_info.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/cfg/dfd_cfg_info.c index 615285d1c32..4d9a510adf3 100644 --- a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/cfg/dfd_cfg_info.c +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/cfg/dfd_cfg_info.c @@ -61,6 +61,7 @@ char *g_info_ctrl_mem_str[INFO_CTRL_MEM_END] = { ".len", ".bit_offset", ".str_cons", + ".val_type", ".int_extra1", ".int_extra2", ".int_extra3", @@ -82,6 +83,7 @@ char *g_info_src_str[INFO_SRC_END] = { "fpga", "other_i2c", "file", + "logic_file", }; /* info_frmt_t enumeration string */ @@ -102,6 +104,57 @@ char *g_info_pola_str[INFO_POLA_END] = { "negative", }; +/* info_val_type_t enumeration string */ +char *g_info_val_type_str[INFO_VAL_TYPE_END] = { + "normal", + "fixed_key", + "nega_key", +}; + +static void dfd_val_type_handle(info_ctrl_t *info_ctrl, uint8_t *val, uint8_t is_write) +{ + uint8_t ori_val; + + if (info_ctrl == NULL || val == NULL) { + DBG_DEBUG(DBG_ERROR, "input arguments error.\n"); + return; + } + + if (!is_write) { + switch (info_ctrl->val_type) { + case INFO_VAL_TYPE_NORMAL: + break; + case INFO_VAL_TYPE_FIXED_KEY: + case INFO_VAL_TYPE_NEGA_KEY: + ori_val = *val; + if (info_ctrl->pola == INFO_POLA_NEGA) { + ori_val = ~ori_val; + } + *val = ori_val & 0x01; + break; + default: + DBG_DEBUG(DBG_ERROR, "info ctrl val_type[%d] invalid.\n", info_ctrl->val_type); + break; + } + } else { + switch (info_ctrl->val_type) { + case INFO_VAL_TYPE_NORMAL: + case INFO_VAL_TYPE_FIXED_KEY: + break; + case INFO_VAL_TYPE_NEGA_KEY: + ori_val = *val; + if (info_ctrl->pola == INFO_POLA_NEGA) { + ori_val = ~ori_val; + } + *val = (~info_ctrl->addr & 0xfe) | (ori_val & 0x01); + break; + default: + DBG_DEBUG(DBG_ERROR, "info ctrl val_type[%d] invalid.\n", info_ctrl->val_type); + break; + } + } +} + /* Read information from the cpld */ static int dfd_read_info_from_cpld(int32_t addr, int read_bytes, uint8_t *val) { @@ -168,6 +221,7 @@ static int dfd_read_info(info_src_t src, char *fpath, int32_t addr, int read_byt case INFO_SRC_OTHER_I2C: rv = dfd_read_info_from_other_i2c(addr, read_bytes, val); break; + case INFO_SRC_LOGIC_FILE: case INFO_SRC_FILE: rv = dfd_ko_read_file(fpath, addr, val, read_bytes); break; @@ -198,6 +252,7 @@ static int dfd_write_info(info_src_t src, char *fpath, int32_t addr, int write_b rv = -1; DBG_DEBUG(DBG_ERROR, "not support write info to other i2c\n"); break; + case INFO_SRC_LOGIC_FILE: case INFO_SRC_FILE: rv = dfd_ko_write_file(fpath, addr, val, write_bytes); break; @@ -277,6 +332,9 @@ static int dfd_get_info_value(info_ctrl_t *info_ctrl, int *ret, info_num_buf_to_ int_tmp <<= 8; } } + if (info_ctrl->frmt == INFO_FRMT_BYTE) { + dfd_val_type_handle(info_ctrl, (uint8_t *)&int_tmp, 0); + } } else if (IS_INFO_FRMT_NUM_STR(info_ctrl->frmt)) { val[readed_bytes] = '\0'; int_tmp = simple_strtol((char *)(&(val[0])), NULL, 10); @@ -542,6 +600,9 @@ int dfd_info_set_int(uint64_t key, int val) /* Write data value conversion */ byte_tmp = (uint8_t)(val & 0xff); + if (info_ctrl->frmt == INFO_FRMT_BYTE) { + dfd_val_type_handle(info_ctrl, &byte_tmp, 1); + } /* Information valid mask */ bit_mask = 0xff; @@ -665,6 +726,21 @@ static long dfd_info_reg2data_mac_th5(uint64_t key, int data) return val; } +static int dfd_info_reg2data_mac_th6(uint64_t key, int data) +{ + int tmp_val; + int val; + + DBG_DEBUG(DBG_VERBOSE, "reg2data_mac_th6, data=%d\n", data); + + tmp_val = (data >> 4) | (data & 0xf); + val = 378850 - (((tmp_val - 2) * 259680) / 2000); + + DBG_DEBUG(DBG_VERBOSE, "reg2data_mac_th6, val=%d\n", val); + + return val; +} + static long dfd_info_reg2data_mac_th4(uint64_t key, int data) { int tmp_val; @@ -766,6 +842,9 @@ static int dfd_info_get_cpld_temperature(uint64_t key, int *value) case MAC_TH4: val = dfd_info_reg2data_mac_th4(key, temp_reg); break; + case MAC_TH6: + val = dfd_info_reg2data_mac_th6(key, temp_reg); + break; default: val = temp_reg; break; @@ -795,7 +874,8 @@ static int dfd_info_get_sensor_value(uint64_t key, uint8_t *buf, int buf_len, in return -DFD_RV_DEV_NOTSUPPORT; } - if (DFD_CFG_ITEM_ID(key) == DFD_CFG_ITEM_HWMON_IN && info_ctrl->src == INFO_SRC_CPLD) { + if (DFD_CFG_ITEM_ID(key) == DFD_CFG_ITEM_HWMON_IN + && (info_ctrl->src == INFO_SRC_CPLD || info_ctrl->src == INFO_SRC_LOGIC_FILE)) { rv = dfd_info_get_cpld_voltage(key, &value); if (rv < 0) { DBG_DEBUG(DBG_ERROR, "get cpld voltage failed.key=0x%08llx, rv:%d\n", key, rv); @@ -821,7 +901,8 @@ static int dfd_info_get_sensor_value(uint64_t key, uint8_t *buf, int buf_len, in memcpy(buf, buf_tmp, buf_real_len); } return buf_real_len; - } else if (DFD_CFG_ITEM_ID(key) == DFD_CFG_ITEM_HWMON_TEMP && info_ctrl->src == INFO_SRC_CPLD) { + } else if (DFD_CFG_ITEM_ID(key) == DFD_CFG_ITEM_HWMON_TEMP + && (info_ctrl->src == INFO_SRC_CPLD || info_ctrl->src == INFO_SRC_LOGIC_FILE)) { rv = dfd_info_get_cpld_temperature(key, &temp_value); if (rv < 0) { DBG_DEBUG(DBG_ERROR, "get cpld temperature failed.key=0x%08llx, rv:%d\n", key, rv); diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/dfd_cfg_info.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/dfd_cfg_info.h index 2e5dd2f3d64..a213db748c1 100644 --- a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/dfd_cfg_info.h +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/dfd_cfg_info.h @@ -76,6 +76,7 @@ typedef enum info_src_e { INFO_SRC_FPGA, /* FPGA equipment */ INFO_SRC_OTHER_I2C, /* other i2c equipment */ INFO_SRC_FILE, /* file */ + INFO_SRC_LOGIC_FILE, /* logic file */ INFO_SRC_END } info_src_t; @@ -87,6 +88,14 @@ typedef enum info_pola_e { INFO_POLA_END } info_pola_t; +/* value type of info ctrl */ +typedef enum info_val_type_e { + INFO_VAL_TYPE_NORMAL = 0, /* Normal value. Keep 0 for compatibility */ + INFO_VAL_TYPE_FIXED_KEY, /* High 7 bits are fixed key */ + INFO_VAL_TYPE_NEGA_KEY, /* High 7 bits are inverse of addr high 7 bits */ + INFO_VAL_TYPE_END +} info_val_type_t; + /* Information control structure */ #define INFO_FPATH_MAX_LEN (128) /* Maximum length of the file source path */ #define INFO_STR_CONS_MAX_LEN (64) /* Maximum length of a string constant */ @@ -101,6 +110,7 @@ typedef struct info_ctrl_s { int32_t len; /* Length, bit length, or byte length */ int32_t bit_offset; /* Offset number of bits in the address */ char str_cons[INFO_STR_CONS_MAX_LEN]; /* String constant */ + info_val_type_t val_type; /* value type */ int32_t int_extra1; /* int type reserved */ int32_t int_extra2; int32_t int_extra3; /* cpld voltage mode */ @@ -118,6 +128,7 @@ typedef enum info_ctrl_mem_s { INFO_CTRL_MEM_LEN, INFO_CTRL_MEM_BIT_OFFSET, INFO_CTRL_MEM_STR_CONS, + INFO_CTRL_VAL_TYPE, INFO_CTRL_MEM_INT_EXTRA1, INFO_CTRL_MEM_INT_EXTRA2, INFO_CTRL_MEM_INT_EXTRA3, @@ -131,6 +142,7 @@ typedef enum sensor_format_mem_s { TMP464 = 3, MAC_TH5 = 4, MAC_TH4 = 5, + MAC_TH6 = 6, } sensor_format_mem_t; /* hwmon data format conversion */ @@ -143,6 +155,7 @@ extern char *g_info_src_str[INFO_SRC_END]; /* info_src_t enumeration extern char *g_info_frmt_str[INFO_FRMT_END]; /* info_frmt_t enumeration string */ extern char *g_info_pola_str[INFO_POLA_END]; /* info_pola_t enumeration string */ extern char *g_info_ctrl_mode_str[INFO_CTRL_MODE_END];/* info_ctrl_mode_t enumeration string */ +extern char *g_info_val_type_str[INFO_VAL_TYPE_END]; /* info_val_type_t enumeration string */ /** * dfd_info_get_int - Get int type information diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/dfd_sysfs_common.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/dfd_sysfs_common.h index 994bb2387dd..fb2d2d50b41 100644 --- a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/dfd_sysfs_common.h +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/dfd_sysfs_common.h @@ -156,6 +156,8 @@ struct switch_drivers_s { int (*set_sys_psu_led_status)(int status); ssize_t (*get_id_led_status)(char *buf, size_t count); int (*set_id_led_status)(int status); + ssize_t (*get_lan_led_status)(char *buf, size_t count); + int (*set_lan_led_status)(int status); /* FPGA */ int (*get_main_board_fpga_number)(void); ssize_t (*get_main_board_fpga_alias)(unsigned int fpga_index, char *buf, size_t count); diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/wb_module.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/wb_module.h index 6bce2817cb1..af1e1c6f0db 100644 --- a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/wb_module.h +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/include/wb_module.h @@ -186,6 +186,7 @@ typedef enum wb_led_e { WB_FAN_LED_MODULE = 10, /* Fan module indicator */ WB_PSU_LED_MODULE = 11, /* Power module indicator */ WB_SLOT_LED_MODULE = 12, /* Sub-card status indicator */ + WB_OCP_LAN_LED = 13, /* Network status indicator */ } wb_led_t; extern int g_dfd_dbg_level; diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/switch_driver.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/switch_driver.c index 5628aadab43..57b79e79f21 100644 --- a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/switch_driver.c +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/switch_driver.c @@ -3003,6 +3003,36 @@ static int dfd_set_id_led_status(int status) return ret; } +/* Similar to dfd_get_sys_led_status */ +static ssize_t dfd_get_lan_led_status(char *buf, size_t count) +{ + int ret; + + ret = dfd_get_led_status(WB_OCP_LAN_LED, WB_MINOR_DEV_NONE, buf, count); + if (ret < 0) { + if (ret == -DFD_RV_DEV_NOTSUPPORT) { + return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_NO_SUPPORT); + } else { + return (ssize_t)snprintf(buf, count, "%s\n", SWITCH_DEV_ERROR); + } + } + + return ret; +} + +/* Similar to dfd_set_sys_led_status */ +static int dfd_set_lan_led_status(int status) +{ + int ret; + + ret = dfd_set_led_status(WB_OCP_LAN_LED, WB_MINOR_DEV_NONE, status); + if (ret == -DFD_RV_DEV_NOTSUPPORT) { + return -WB_SYSFS_RV_UNSUPPORT; + } + + return ret; +} + /**************************************end of sysled******************************************/ /******************************************FPGA***********************************************/ static int dfd_get_main_board_fpga_number(void) @@ -4460,6 +4490,8 @@ static struct switch_drivers_s switch_drivers = { .set_sys_psu_led_status = dfd_set_sys_psu_led_status, .get_id_led_status = dfd_get_id_led_status, .set_id_led_status = dfd_set_id_led_status, + .get_lan_led_status = dfd_get_lan_led_status, + .set_lan_led_status = dfd_set_lan_led_status, /* FPGA */ .get_main_board_fpga_number = dfd_get_main_board_fpga_number, .get_main_board_fpga_alias = dfd_get_main_board_fpga_alias, diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/wb_fan_driver.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/wb_fan_driver.c index 77f88429edf..c68be353394 100644 --- a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/wb_fan_driver.c +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/wb_fan_driver.c @@ -20,6 +20,7 @@ #include #include +#include #include "wb_module.h" #include "dfd_cfg.h" @@ -440,7 +441,11 @@ static int dfd_fan_product_name_decode(char *fan_buf, int buf_len) return -DFD_RV_DEV_NOTSUPPORT; } mem_clear(fan_buf, buf_len); +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 8, 0) strlcpy(fan_buf, p_decode_name, buf_len); +#else + strscpy(fan_buf, p_decode_name, buf_len); +#endif DFD_FAN_DEBUG(DBG_VERBOSE, "fan name match ok, display fan name: %s.\n", fan_buf); return DFD_RV_OK; } diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/wb_fpga_driver.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/wb_fpga_driver.c index d0991c60882..f38acf6823c 100644 --- a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/wb_fpga_driver.c +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/wb_fpga_driver.c @@ -256,7 +256,6 @@ int dfd_set_fpga_testreg(uint8_t main_dev_id, unsigned int fpga_index, unsigned main_dev_id, fpga_index, key_to_name(DFD_CFG_ITEM_FPGA_TEST_REG)); return -DFD_RV_DEV_NOTSUPPORT; } - if (info_ctrl->len > FPGA_REG_WIDTH_MAX) { DBG_FPGA_DEBUG(DBG_ERROR, "main_dev_id: %u, fpga%u info_ctrl len: %d, unsupport\n", main_dev_id, fpga_index, info_ctrl->len); diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/wb_psu_driver.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/wb_psu_driver.c index aad65d28292..5f4310b13a1 100644 --- a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/wb_psu_driver.c +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/switch_driver/wb_psu_driver.c @@ -20,6 +20,7 @@ #include #include +#include #include "wb_module.h" #include "dfd_cfg.h" @@ -353,7 +354,11 @@ static int dfd_get_psu_fan_speed_cal_str(int power_type, char *psu_buf, int buf_ return -DFD_RV_DEV_NOTSUPPORT; } mem_clear(psu_buf, buf_len); +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 8, 0) strlcpy(psu_buf, speed_cal, buf_len); +#else + strscpy(psu_buf, speed_cal, buf_len); +#endif DFD_PSU_DEBUG(DBG_VERBOSE, "psu speed cal match ok, speed_cal: %s\n", psu_buf); return DFD_RV_OK; } @@ -421,7 +426,11 @@ static int dfd_psu_product_name_decode(int power_type, char *psu_buf, int buf_le return -DFD_RV_DEV_NOTSUPPORT; } mem_clear(psu_buf, buf_len); +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 8, 0) strlcpy(psu_buf, p_decode_name, buf_len); +#else + strscpy(psu_buf, p_decode_name, buf_len); +#endif DFD_PSU_DEBUG(DBG_VERBOSE, "psu name match ok, display psu name: %s\n", psu_buf); return DFD_RV_OK; } @@ -947,4 +956,3 @@ int dfd_clear_psu_blackbox(unsigned int psu_index, uint8_t value) DFD_PSU_DEBUG(DBG_VERBOSE, "psu_index: %u, clear blackbox info success\n", psu_index); return DFD_RV_OK; } - diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/include/sysled_sysfs.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/include/sysled_sysfs.h index 5eaf3af7057..9115658c154 100644 --- a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/include/sysled_sysfs.h +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/include/sysled_sysfs.h @@ -32,6 +32,8 @@ struct s3ip_sysfs_sysled_drivers_s { int (*set_sys_psu_led_status)(int status); ssize_t (*get_id_led_status)(char *buf, size_t count); int (*set_id_led_status)(int status); + ssize_t (*get_lan_led_status)(char *buf, size_t count); + int (*set_lan_led_status)(int status); }; extern int s3ip_sysfs_sysled_drivers_register(struct s3ip_sysfs_sysled_drivers_s *drv); diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/sysled_sysfs.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/sysled_sysfs.c index 242fb20a875..f4cf7a20804 100644 --- a/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/sysled_sysfs.c +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/s3ip_sysfs/sysfs_driver/sysled_sysfs.c @@ -201,12 +201,47 @@ static ssize_t id_led_status_store(struct switch_obj *obj, struct switch_attribu return count; } +static ssize_t lan_led_status_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf) +{ + check_p(g_sysled_drv); + check_p(g_sysled_drv->get_lan_led_status); + + return g_sysled_drv->get_lan_led_status(buf, PAGE_SIZE); +} + +static ssize_t lan_led_status_store(struct switch_obj *obj, struct switch_attribute *attr, + const char *buf, size_t count) +{ + int ret, value; + + check_p(g_sysled_drv); + check_p(g_sysled_drv->set_lan_led_status); + + value = 0; + ret = kstrtoint(buf, 0, &value); + if (ret != 0) { + SYSLED_ERR("invaild lan led status ret: %d, can't set lan led status\n", ret); + SYSLED_ERR("invaild lan led status buf: %s\n", buf); + return -EINVAL; + } + + ret = g_sysled_drv->set_lan_led_status(value); + if (ret < 0) { + SYSLED_ERR("set lan led status %d faield, ret: %d\n", value, ret); + return ret; + } + + SYSLED_DBG("set lan led status %d success\n", value); + return count; +} + /************************************syseeprom dir and attrs*******************************************/ static struct switch_attribute sys_led_attr = __ATTR(sys_led_status, S_IRUGO | S_IWUSR, sys_led_status_show, sys_led_status_store); static struct switch_attribute bmc_led_attr = __ATTR(bmc_led_status, S_IRUGO | S_IWUSR, bmc_led_status_show, bmc_led_status_store); static struct switch_attribute fan_led_attr = __ATTR(fan_led_status, S_IRUGO | S_IWUSR, sys_fan_led_status_show, sys_fan_led_status_store); static struct switch_attribute psu_led_attr = __ATTR(psu_led_status, S_IRUGO | S_IWUSR, sys_psu_led_status_show, sys_psu_led_status_store); static struct switch_attribute id_led_attr = __ATTR(id_led_status, S_IRUGO | S_IWUSR, id_led_status_show, id_led_status_store); +static struct switch_attribute lan_led_attr = __ATTR(lan_led_status, S_IRUGO | S_IWUSR, lan_led_status_show, lan_led_status_store); static struct attribute *sysled_dir_attrs[] = { &sys_led_attr.attr, @@ -214,6 +249,7 @@ static struct attribute *sysled_dir_attrs[] = { &fan_led_attr.attr, &psu_led_attr.attr, &id_led_attr.attr, + &lan_led_attr.attr, NULL, }; diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_at24.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_at24.c new file mode 100644 index 00000000000..c672c69e79e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_at24.c @@ -0,0 +1,861 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * at24.c - handle most I2C EEPROMs + * + * Copyright (C) 2005-2007 David Brownell + * Copyright (C) 2008 Wolfram Sang, Pengutronix + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* Address pointer is 16 bit. */ +#define AT24_FLAG_ADDR16 BIT(7) +/* sysfs-entry will be read-only. */ +#define AT24_FLAG_READONLY BIT(6) +/* sysfs-entry will be world-readable. */ +#define AT24_FLAG_IRUGO BIT(5) +/* Take always 8 addresses (24c00). */ +#define AT24_FLAG_TAKE8ADDR BIT(4) +/* Factory-programmed serial number. */ +#define AT24_FLAG_SERIAL BIT(3) +/* Factory-programmed mac address. */ +#define AT24_FLAG_MAC BIT(2) +/* Does not auto-rollover reads to the next slave address. */ +#define AT24_FLAG_NO_RDROL BIT(1) + +/* + * I2C EEPROMs from most vendors are inexpensive and mostly interchangeable. + * Differences between different vendor product lines (like Atmel AT24C or + * MicroChip 24LC, etc) won't much matter for typical read/write access. + * There are also I2C RAM chips, likewise interchangeable. One example + * would be the PCF8570, which acts like a 24c02 EEPROM (256 bytes). + * + * However, misconfiguration can lose data. "Set 16-bit memory address" + * to a part with 8-bit addressing will overwrite data. Writing with too + * big a page size also loses data. And it's not safe to assume that the + * conventional addresses 0x50..0x57 only hold eeproms; a PCF8563 RTC + * uses 0x51, for just one example. + * + * Accordingly, explicit board-specific configuration data should be used + * in almost all cases. (One partial exception is an SMBus used to access + * "SPD" data for DRAM sticks. Those only use 24c02 EEPROMs.) + * + * So this driver uses "new style" I2C driver binding, expecting to be + * told what devices exist. That may be in arch/X/mach-Y/board-Z.c or + * similar kernel-resident tables; or, configuration data coming from + * a bootloader. + * + * Other than binding model, current differences from "eeprom" driver are + * that this one handles write access and isn't restricted to 24c02 devices. + * It also handles larger devices (32 kbit and up) with two-byte addresses, + * which won't work on pure SMBus systems. + */ + +struct at24_client { + struct i2c_client *client; + struct regmap *regmap; +}; + +struct at24_data { + /* + * Lock protects against activities from other Linux tasks, + * but not from changes by other I2C masters. + */ + struct mutex lock; + + unsigned int write_max; + unsigned int num_addresses; + unsigned int offset_adj; + + u32 byte_len; + u16 page_size; + u8 flags; + + struct nvmem_device *nvmem; + struct regulator *vcc_reg; + void (*read_post)(unsigned int off, char *buf, size_t count); + + /* + * Some chips tie up multiple I2C addresses; dummy devices reserve + * them for us, and we'll use them with SMBus calls. + */ + struct at24_client client[]; +}; + +/* + * This parameter is to help this driver avoid blocking other drivers out + * of I2C for potentially troublesome amounts of time. With a 100 kHz I2C + * clock, one 256 byte read takes about 1/43 second which is excessive; + * but the 1/170 second it takes at 400 kHz may be quite reasonable; and + * at 1 MHz (Fm+) a 1/430 second delay could easily be invisible. + * + * This value is forced to be a power of two so that writes align on pages. + */ +static unsigned int at24_io_limit = 128; +module_param_named(io_limit, at24_io_limit, uint, 0); +MODULE_PARM_DESC(at24_io_limit, "Maximum bytes per I/O (default 128)"); + +/* + * Specs often allow 5 msec for a page write, sometimes 20 msec; + * it's important to recover from write timeouts. + */ +static unsigned int at24_write_timeout = 25; +module_param_named(write_timeout, at24_write_timeout, uint, 0); +MODULE_PARM_DESC(at24_write_timeout, "Time (in ms) to try writes (default 25)"); + +struct at24_chip_data { + u32 byte_len; + u8 flags; + void (*read_post)(unsigned int off, char *buf, size_t count); +}; + +#define AT24_CHIP_DATA(_name, _len, _flags) \ + static const struct at24_chip_data _name = { \ + .byte_len = _len, .flags = _flags, \ + } + +#define AT24_CHIP_DATA_CB(_name, _len, _flags, _read_post) \ + static const struct at24_chip_data _name = { \ + .byte_len = _len, .flags = _flags, \ + .read_post = _read_post, \ + } + +static void at24_read_post_vaio(unsigned int off, char *buf, size_t count) +{ + int i; + + if (capable(CAP_SYS_ADMIN)) + return; + + /* + * Hide VAIO private settings to regular users: + * - BIOS passwords: bytes 0x00 to 0x0f + * - UUID: bytes 0x10 to 0x1f + * - Serial number: 0xc0 to 0xdf + */ + for (i = 0; i < count; i++) { + if ((off + i <= 0x1f) || + (off + i >= 0xc0 && off + i <= 0xdf)) + buf[i] = 0; + } +} + +/* needs 8 addresses as A0-A2 are ignored */ +AT24_CHIP_DATA(at24_data_24c00, 128 / 8, AT24_FLAG_TAKE8ADDR); +/* old variants can't be handled with this generic entry! */ +AT24_CHIP_DATA(at24_data_24c01, 1024 / 8, 0); +AT24_CHIP_DATA(at24_data_24cs01, 16, + AT24_FLAG_SERIAL | AT24_FLAG_READONLY); +AT24_CHIP_DATA(at24_data_24c02, 2048 / 8, AT24_FLAG_IRUGO); +AT24_CHIP_DATA(at24_data_24cs02, 16, + AT24_FLAG_SERIAL | AT24_FLAG_READONLY); +AT24_CHIP_DATA(at24_data_24mac402, 48 / 8, + AT24_FLAG_MAC | AT24_FLAG_READONLY); +AT24_CHIP_DATA(at24_data_24mac602, 64 / 8, + AT24_FLAG_MAC | AT24_FLAG_READONLY); +/* spd is a 24c02 in memory DIMMs */ +AT24_CHIP_DATA(at24_data_spd, 2048 / 8, + AT24_FLAG_READONLY | AT24_FLAG_IRUGO); +/* 24c02_vaio is a 24c02 on some Sony laptops */ +AT24_CHIP_DATA_CB(at24_data_24c02_vaio, 2048 / 8, + AT24_FLAG_READONLY | AT24_FLAG_IRUGO, + at24_read_post_vaio); +AT24_CHIP_DATA(at24_data_24c04, 4096 / 8, 0); +AT24_CHIP_DATA(at24_data_24cs04, 16, + AT24_FLAG_SERIAL | AT24_FLAG_READONLY); +/* 24rf08 quirk is handled at i2c-core */ +AT24_CHIP_DATA(at24_data_24c08, 8192 / 8, 0); +AT24_CHIP_DATA(at24_data_24cs08, 16, + AT24_FLAG_SERIAL | AT24_FLAG_READONLY); +AT24_CHIP_DATA(at24_data_24c16, 16384 / 8, 0); +AT24_CHIP_DATA(at24_data_24cs16, 16, + AT24_FLAG_SERIAL | AT24_FLAG_READONLY); +AT24_CHIP_DATA(at24_data_24c32, 32768 / 8, AT24_FLAG_ADDR16); +AT24_CHIP_DATA(at24_data_24cs32, 16, + AT24_FLAG_ADDR16 | AT24_FLAG_SERIAL | AT24_FLAG_READONLY); +AT24_CHIP_DATA(at24_data_24c64, 65536 / 8, AT24_FLAG_ADDR16 | AT24_FLAG_IRUGO); +AT24_CHIP_DATA(at24_data_24cs64, 16, + AT24_FLAG_ADDR16 | AT24_FLAG_SERIAL | AT24_FLAG_READONLY); +AT24_CHIP_DATA(at24_data_24c128, 131072 / 8, AT24_FLAG_ADDR16); +AT24_CHIP_DATA(at24_data_24c256, 262144 / 8, AT24_FLAG_ADDR16); +AT24_CHIP_DATA(at24_data_24c512, 524288 / 8, AT24_FLAG_ADDR16); +AT24_CHIP_DATA(at24_data_24c1024, 1048576 / 8, AT24_FLAG_ADDR16); +AT24_CHIP_DATA(at24_data_24c2048, 2097152 / 8, AT24_FLAG_ADDR16); +/* identical to 24c08 ? */ +AT24_CHIP_DATA(at24_data_INT3499, 8192 / 8, 0); + +static const struct i2c_device_id at24_ids[] = { + { "wb_24c00", (kernel_ulong_t)&at24_data_24c00 }, + { "wb_24c01", (kernel_ulong_t)&at24_data_24c01 }, + { "wb_24cs01", (kernel_ulong_t)&at24_data_24cs01 }, + { "wb_24c02", (kernel_ulong_t)&at24_data_24c02 }, + { "wb_24cs02", (kernel_ulong_t)&at24_data_24cs02 }, + { "wb_24mac402", (kernel_ulong_t)&at24_data_24mac402 }, + { "wb_24mac602", (kernel_ulong_t)&at24_data_24mac602 }, + { "wb_spd", (kernel_ulong_t)&at24_data_spd }, + { "wb_24c02-vaio", (kernel_ulong_t)&at24_data_24c02_vaio }, + { "wb_24c04", (kernel_ulong_t)&at24_data_24c04 }, + { "wb_24cs04", (kernel_ulong_t)&at24_data_24cs04 }, + { "wb_24c08", (kernel_ulong_t)&at24_data_24c08 }, + { "wb_24cs08", (kernel_ulong_t)&at24_data_24cs08 }, + { "wb_24c16", (kernel_ulong_t)&at24_data_24c16 }, + { "wb_24cs16", (kernel_ulong_t)&at24_data_24cs16 }, + { "wb_24c32", (kernel_ulong_t)&at24_data_24c32 }, + { "wb_24cs32", (kernel_ulong_t)&at24_data_24cs32 }, + { "wb_24c64", (kernel_ulong_t)&at24_data_24c64 }, + { "wb_24cs64", (kernel_ulong_t)&at24_data_24cs64 }, + { "wb_24c128", (kernel_ulong_t)&at24_data_24c128 }, + { "wb_24c256", (kernel_ulong_t)&at24_data_24c256 }, + { "wb_24c512", (kernel_ulong_t)&at24_data_24c512 }, + { "wb_24c1024", (kernel_ulong_t)&at24_data_24c1024 }, + { "wb_24c2048", (kernel_ulong_t)&at24_data_24c2048 }, + { "wb_at24", 0 }, + { /* END OF LIST */ } +}; +MODULE_DEVICE_TABLE(i2c, at24_ids); + +static const struct of_device_id at24_of_match[] = { + { .compatible = "atmel,24c00", .data = &at24_data_24c00 }, + { .compatible = "atmel,24c01", .data = &at24_data_24c01 }, + { .compatible = "atmel,24cs01", .data = &at24_data_24cs01 }, + { .compatible = "atmel,24c02", .data = &at24_data_24c02 }, + { .compatible = "atmel,24cs02", .data = &at24_data_24cs02 }, + { .compatible = "atmel,24mac402", .data = &at24_data_24mac402 }, + { .compatible = "atmel,24mac602", .data = &at24_data_24mac602 }, + { .compatible = "atmel,spd", .data = &at24_data_spd }, + { .compatible = "atmel,24c04", .data = &at24_data_24c04 }, + { .compatible = "atmel,24cs04", .data = &at24_data_24cs04 }, + { .compatible = "atmel,24c08", .data = &at24_data_24c08 }, + { .compatible = "atmel,24cs08", .data = &at24_data_24cs08 }, + { .compatible = "atmel,24c16", .data = &at24_data_24c16 }, + { .compatible = "atmel,24cs16", .data = &at24_data_24cs16 }, + { .compatible = "atmel,24c32", .data = &at24_data_24c32 }, + { .compatible = "atmel,24cs32", .data = &at24_data_24cs32 }, + { .compatible = "atmel,24c64", .data = &at24_data_24c64 }, + { .compatible = "atmel,24cs64", .data = &at24_data_24cs64 }, + { .compatible = "atmel,24c128", .data = &at24_data_24c128 }, + { .compatible = "atmel,24c256", .data = &at24_data_24c256 }, + { .compatible = "atmel,24c512", .data = &at24_data_24c512 }, + { .compatible = "atmel,24c1024", .data = &at24_data_24c1024 }, + { .compatible = "atmel,24c2048", .data = &at24_data_24c2048 }, + { /* END OF LIST */ }, +}; +MODULE_DEVICE_TABLE(of, at24_of_match); + +static const struct acpi_device_id __maybe_unused at24_acpi_ids[] = { + { "INT3499", (kernel_ulong_t)&at24_data_INT3499 }, + { "TPF0001", (kernel_ulong_t)&at24_data_24c1024 }, + { /* END OF LIST */ } +}; +MODULE_DEVICE_TABLE(acpi, at24_acpi_ids); + +/* + * This routine supports chips which consume multiple I2C addresses. It + * computes the addressing information to be used for a given r/w request. + * Assumes that sanity checks for offset happened at sysfs-layer. + * + * Slave address and byte offset derive from the offset. Always + * set the byte address; on a multi-master board, another master + * may have changed the chip's "current" address pointer. + */ +static struct at24_client *at24_translate_offset(struct at24_data *at24, + unsigned int *offset) +{ + unsigned int i; + + if (at24->flags & AT24_FLAG_ADDR16) { + i = *offset >> 16; + *offset &= 0xffff; + } else { + i = *offset >> 8; + *offset &= 0xff; + } + + return &at24->client[i]; +} + +static struct device *at24_base_client_dev(struct at24_data *at24) +{ + return &at24->client[0].client->dev; +} + +static size_t at24_adjust_read_count(struct at24_data *at24, + unsigned int offset, size_t count) +{ + unsigned int bits; + size_t remainder; + + /* + * In case of multi-address chips that don't rollover reads to + * the next slave address: truncate the count to the slave boundary, + * so that the read never straddles slaves. + */ + if (at24->flags & AT24_FLAG_NO_RDROL) { + bits = (at24->flags & AT24_FLAG_ADDR16) ? 16 : 8; + remainder = BIT(bits) - offset; + if (count > remainder) + count = remainder; + } + + if (count > at24_io_limit) + count = at24_io_limit; + + return count; +} + +static ssize_t at24_regmap_read(struct at24_data *at24, char *buf, + unsigned int offset, size_t count) +{ + unsigned long timeout, read_time; + struct at24_client *at24_client; + struct i2c_client *client; + struct regmap *regmap; + int ret; + + at24_client = at24_translate_offset(at24, &offset); + regmap = at24_client->regmap; + client = at24_client->client; + count = at24_adjust_read_count(at24, offset, count); + + /* adjust offset for mac and serial read ops */ + offset += at24->offset_adj; + + timeout = jiffies + msecs_to_jiffies(at24_write_timeout); + do { + /* + * The timestamp shall be taken before the actual operation + * to avoid a premature timeout in case of high CPU load. + */ + read_time = jiffies; + + ret = regmap_bulk_read(regmap, offset, buf, count); + dev_dbg(&client->dev, "read %zu@%d --> %d (%ld)\n", + count, offset, ret, jiffies); + if (!ret) + return count; + + usleep_range(1000, 1500); + } while (time_before(read_time, timeout)); + + return -ETIMEDOUT; +} + +/* + * Note that if the hardware write-protect pin is pulled high, the whole + * chip is normally write protected. But there are plenty of product + * variants here, including OTP fuses and partial chip protect. + * + * We only use page mode writes; the alternative is sloooow. These routines + * write at most one page. + */ + +static size_t at24_adjust_write_count(struct at24_data *at24, + unsigned int offset, size_t count) +{ + unsigned int next_page; + + /* write_max is at most a page */ + if (count > at24->write_max) + count = at24->write_max; + + /* Never roll over backwards, to the start of this page */ + next_page = roundup(offset + 1, at24->page_size); + if (offset + count > next_page) + count = next_page - offset; + + return count; +} + +static ssize_t at24_regmap_write(struct at24_data *at24, const char *buf, + unsigned int offset, size_t count) +{ + unsigned long timeout, write_time; + struct at24_client *at24_client; + struct i2c_client *client; + struct regmap *regmap; + int ret; + + at24_client = at24_translate_offset(at24, &offset); + regmap = at24_client->regmap; + client = at24_client->client; + count = at24_adjust_write_count(at24, offset, count); + timeout = jiffies + msecs_to_jiffies(at24_write_timeout); + + do { + /* + * The timestamp shall be taken before the actual operation + * to avoid a premature timeout in case of high CPU load. + */ + write_time = jiffies; + + ret = regmap_bulk_write(regmap, offset, buf, count); + dev_dbg(&client->dev, "write %zu@%d --> %d (%ld)\n", + count, offset, ret, jiffies); + if (!ret) + return count; + + usleep_range(1000, 1500); + } while (time_before(write_time, timeout)); + + return -ETIMEDOUT; +} + +static int at24_read(void *priv, unsigned int off, void *val, size_t count) +{ + struct at24_data *at24; + struct device *dev; + char *buf = val; + int i, ret; + + at24 = priv; + dev = at24_base_client_dev(at24); + + if (unlikely(!count)) + return count; + + if (off + count > at24->byte_len) + return -EINVAL; + + ret = pm_runtime_get_sync(dev); + if (ret < 0) { + pm_runtime_put_noidle(dev); + return ret; + } + + /* + * Read data from chip, protecting against concurrent updates + * from this host, but not from other I2C masters. + */ + mutex_lock(&at24->lock); + + for (i = 0; count; i += ret, count -= ret) { + ret = at24_regmap_read(at24, buf + i, off + i, count); + if (ret < 0) { + mutex_unlock(&at24->lock); + pm_runtime_put(dev); + return ret; + } + } + + mutex_unlock(&at24->lock); + + pm_runtime_put(dev); + + if (unlikely(at24->read_post)) + at24->read_post(off, buf, i); + + return 0; +} + +static int at24_write(void *priv, unsigned int off, void *val, size_t count) +{ + struct at24_data *at24; + struct device *dev; + char *buf = val; + int ret; + + at24 = priv; + dev = at24_base_client_dev(at24); + + if (unlikely(!count)) + return -EINVAL; + + if (off + count > at24->byte_len) + return -EINVAL; + + ret = pm_runtime_get_sync(dev); + if (ret < 0) { + pm_runtime_put_noidle(dev); + return ret; + } + + /* + * Write data to chip, protecting against concurrent updates + * from this host, but not from other I2C masters. + */ + mutex_lock(&at24->lock); + + while (count) { + ret = at24_regmap_write(at24, buf, off, count); + if (ret < 0) { + mutex_unlock(&at24->lock); + pm_runtime_put(dev); + return ret; + } + buf += ret; + off += ret; + count -= ret; + } + + mutex_unlock(&at24->lock); + + pm_runtime_put(dev); + + return 0; +} + +static const struct at24_chip_data *at24_get_chip_data(struct device *dev) +{ + struct device_node *of_node = dev->of_node; + const struct at24_chip_data *cdata; + const struct i2c_device_id *id; + + id = i2c_match_id(at24_ids, to_i2c_client(dev)); + + /* + * The I2C core allows OF nodes compatibles to match against the + * I2C device ID table as a fallback, so check not only if an OF + * node is present but also if it matches an OF device ID entry. + */ + if (of_node && of_match_device(at24_of_match, dev)) + cdata = of_device_get_match_data(dev); + else if (id) + cdata = (void *)id->driver_data; + else + cdata = acpi_device_get_match_data(dev); + + if (!cdata) + return ERR_PTR(-ENODEV); + + return cdata; +} + +static int at24_make_dummy_client(struct at24_data *at24, unsigned int index, + struct regmap_config *regmap_config) +{ + struct i2c_client *base_client, *dummy_client; + struct regmap *regmap; + struct device *dev; + + base_client = at24->client[0].client; + dev = &base_client->dev; + + dummy_client = devm_i2c_new_dummy_device(dev, base_client->adapter, + base_client->addr + index); + if (IS_ERR(dummy_client)) + return PTR_ERR(dummy_client); + + regmap = devm_regmap_init_i2c(dummy_client, regmap_config); + if (IS_ERR(regmap)) + return PTR_ERR(regmap); + + at24->client[index].client = dummy_client; + at24->client[index].regmap = regmap; + + return 0; +} + +static unsigned int at24_get_offset_adj(u8 flags, unsigned int byte_len) +{ + if (flags & AT24_FLAG_MAC) { + /* EUI-48 starts from 0x9a, EUI-64 from 0x98 */ + return 0xa0 - byte_len; + } else if (flags & AT24_FLAG_SERIAL && flags & AT24_FLAG_ADDR16) { + /* + * For 16 bit address pointers, the word address must contain + * a '10' sequence in bits 11 and 10 regardless of the + * intended position of the address pointer. + */ + return 0x0800; + } else if (flags & AT24_FLAG_SERIAL) { + /* + * Otherwise the word address must begin with a '10' sequence, + * regardless of the intended address. + */ + return 0x0080; + } else { + return 0; + } +} + +static int at24_probe(struct i2c_client *client) +{ + struct regmap_config regmap_config = { }; + struct nvmem_config nvmem_config = { }; + u32 byte_len, page_size, flags, addrw; + const struct at24_chip_data *cdata; + struct device *dev = &client->dev; + bool i2c_fn_i2c, i2c_fn_block; + unsigned int i, num_addresses; + struct at24_data *at24; + struct regmap *regmap; + bool writable; + u8 test_byte; + int err; + + i2c_fn_i2c = i2c_check_functionality(client->adapter, I2C_FUNC_I2C); + i2c_fn_block = i2c_check_functionality(client->adapter, + I2C_FUNC_SMBUS_WRITE_I2C_BLOCK); + + cdata = at24_get_chip_data(dev); + if (IS_ERR(cdata)) + return PTR_ERR(cdata); + + err = device_property_read_u32(dev, "pagesize", &page_size); + if (err) + /* + * This is slow, but we can't know all eeproms, so we better + * play safe. Specifying custom eeprom-types via device tree + * or properties is recommended anyhow. + */ + page_size = 1; + + flags = cdata->flags; + if (device_property_present(dev, "read-only")) + flags |= AT24_FLAG_READONLY; + if (device_property_present(dev, "no-read-rollover")) + flags |= AT24_FLAG_NO_RDROL; + + err = device_property_read_u32(dev, "address-width", &addrw); + if (!err) { + switch (addrw) { + case 8: + if (flags & AT24_FLAG_ADDR16) + dev_warn(dev, + "Override address width to be 8, while default is 16\n"); + flags &= ~AT24_FLAG_ADDR16; + break; + case 16: + flags |= AT24_FLAG_ADDR16; + break; + default: + dev_warn(dev, "Bad \"address-width\" property: %u\n", + addrw); + } + } + + err = device_property_read_u32(dev, "size", &byte_len); + if (err) + byte_len = cdata->byte_len; + + if (!i2c_fn_i2c && !i2c_fn_block) + page_size = 1; + + if (!page_size) { + dev_err(dev, "page_size must not be 0!\n"); + return -EINVAL; + } + + if (!is_power_of_2(page_size)) + dev_warn(dev, "page_size looks suspicious (no power of 2)!\n"); + + err = device_property_read_u32(dev, "num-addresses", &num_addresses); + if (err) { + if (flags & AT24_FLAG_TAKE8ADDR) + num_addresses = 8; + else + num_addresses = DIV_ROUND_UP(byte_len, + (flags & AT24_FLAG_ADDR16) ? 65536 : 256); + } + + if ((flags & AT24_FLAG_SERIAL) && (flags & AT24_FLAG_MAC)) { + dev_err(dev, + "invalid device data - cannot have both AT24_FLAG_SERIAL & AT24_FLAG_MAC."); + return -EINVAL; + } + + regmap_config.val_bits = 8; + regmap_config.reg_bits = (flags & AT24_FLAG_ADDR16) ? 16 : 8; + regmap_config.disable_locking = true; + + regmap = devm_regmap_init_i2c(client, ®map_config); + if (IS_ERR(regmap)) + return PTR_ERR(regmap); + + at24 = devm_kzalloc(dev, struct_size(at24, client, num_addresses), + GFP_KERNEL); + if (!at24) + return -ENOMEM; + + mutex_init(&at24->lock); + at24->byte_len = byte_len; + at24->page_size = page_size; + at24->flags = flags; + at24->read_post = cdata->read_post; + at24->num_addresses = num_addresses; + at24->offset_adj = at24_get_offset_adj(flags, byte_len); + at24->client[0].client = client; + at24->client[0].regmap = regmap; + + at24->vcc_reg = devm_regulator_get(dev, "vcc"); + if (IS_ERR(at24->vcc_reg)) + return PTR_ERR(at24->vcc_reg); + + writable = !(flags & AT24_FLAG_READONLY); + if (writable) { + at24->write_max = min_t(unsigned int, + page_size, at24_io_limit); + if (!i2c_fn_i2c && at24->write_max > I2C_SMBUS_BLOCK_MAX) + at24->write_max = I2C_SMBUS_BLOCK_MAX; + } + + /* use dummy devices for multiple-address chips */ + for (i = 1; i < num_addresses; i++) { + err = at24_make_dummy_client(at24, i, ®map_config); + if (err) + return err; + } + + /* + * If the 'label' property is not present for the AT24 EEPROM, + * then nvmem_config.id is initialised to NVMEM_DEVID_AUTO, + * and this will append the 'devid' to the name of the NVMEM + * device. This is purely legacy and the AT24 driver has always + * defaulted to this. However, if the 'label' property is + * present then this means that the name is specified by the + * firmware and this name should be used verbatim and so it is + * not necessary to append the 'devid'. + */ + if (device_property_present(dev, "label")) { + nvmem_config.id = NVMEM_DEVID_NONE; + err = device_property_read_string(dev, "label", + &nvmem_config.name); + if (err) + return err; + } else { + nvmem_config.id = NVMEM_DEVID_AUTO; + nvmem_config.name = dev_name(dev); + } + + nvmem_config.type = NVMEM_TYPE_EEPROM; + nvmem_config.dev = dev; + nvmem_config.read_only = !writable; + nvmem_config.root_only = !(flags & AT24_FLAG_IRUGO); + nvmem_config.owner = THIS_MODULE; + nvmem_config.compat = true; + nvmem_config.base_dev = dev; + nvmem_config.reg_read = at24_read; + nvmem_config.reg_write = at24_write; + nvmem_config.priv = at24; + nvmem_config.stride = 1; + nvmem_config.word_size = 1; + nvmem_config.size = byte_len; + + i2c_set_clientdata(client, at24); + + err = regulator_enable(at24->vcc_reg); + if (err) { + dev_err(dev, "Failed to enable vcc regulator\n"); + return err; + } + + /* enable runtime pm */ + pm_runtime_set_active(dev); + pm_runtime_enable(dev); + + at24->nvmem = devm_nvmem_register(dev, &nvmem_config); + if (IS_ERR(at24->nvmem)) { + pm_runtime_disable(dev); + if (!pm_runtime_status_suspended(dev)) + regulator_disable(at24->vcc_reg); + return PTR_ERR(at24->nvmem); + } + + /* + * Perform a one-byte test read to verify that the + * chip is functional. + */ + err = at24_read(at24, 0, &test_byte, 1); + if (err) { + pm_runtime_disable(dev); + if (!pm_runtime_status_suspended(dev)) + regulator_disable(at24->vcc_reg); + return -ENODEV; + } + + pm_runtime_idle(dev); + + if (writable) + dev_info(dev, "%u byte %s EEPROM, writable, %u bytes/write\n", + byte_len, client->name, at24->write_max); + else + dev_info(dev, "%u byte %s EEPROM, read-only\n", + byte_len, client->name); + + return 0; +} + +static void at24_remove(struct i2c_client *client) +{ + struct at24_data *at24 = i2c_get_clientdata(client); + + pm_runtime_disable(&client->dev); + if (!pm_runtime_status_suspended(&client->dev)) + regulator_disable(at24->vcc_reg); + pm_runtime_set_suspended(&client->dev); + + return; +} + +static int __maybe_unused at24_suspend(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct at24_data *at24 = i2c_get_clientdata(client); + + return regulator_disable(at24->vcc_reg); +} + +static int __maybe_unused at24_resume(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct at24_data *at24 = i2c_get_clientdata(client); + + return regulator_enable(at24->vcc_reg); +} + +static const struct dev_pm_ops at24_pm_ops = { + SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, + pm_runtime_force_resume) + SET_RUNTIME_PM_OPS(at24_suspend, at24_resume, NULL) +}; + +static struct i2c_driver at24_driver = { + .driver = { + .name = "wb_at24", + .pm = &at24_pm_ops, + .of_match_table = at24_of_match, + .acpi_match_table = ACPI_PTR(at24_acpi_ids), + }, + .probe = at24_probe, + .remove = at24_remove, + .id_table = at24_ids, +}; + +static int __init at24_init(void) +{ + if (!at24_io_limit) { + pr_err("at24: at24_io_limit must not be 0!\n"); + return -EINVAL; + } + + at24_io_limit = rounddown_pow_of_two(at24_io_limit); + return i2c_add_driver(&at24_driver); +} +module_init(at24_init); + +static void __exit at24_exit(void) +{ + i2c_del_driver(&at24_driver); +} +module_exit(at24_exit); + +MODULE_DESCRIPTION("Driver for most I2C EEPROMs"); +MODULE_AUTHOR("support"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_csu550.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_csu550.c index 55f6a529c7b..304a79e5359 100644 --- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_csu550.c +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_csu550.c @@ -26,6 +26,7 @@ #include #include #include +#include #include "pmbus.h" struct pmbus_device_info { @@ -174,7 +175,11 @@ static int pmbus_identify(struct i2c_client *client, return ret; } +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) +static int pmbus_probe(struct i2c_client *client, const struct i2c_device_id *id) +#else static int pmbus_probe(struct i2c_client *client) +#endif { struct pmbus_driver_info *info; struct pmbus_platform_data *pdata = NULL; @@ -185,7 +190,11 @@ static int pmbus_probe(struct i2c_client *client) if (!info) return -ENOMEM; +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) + device_info = (struct pmbus_device_info *)id->driver_data; +#else device_info = (struct pmbus_device_info *)i2c_match_id(pmbus_id, client)->driver_data; +#endif if (device_info->flags & PMBUS_SKIP_STATUS_CHECK) { pdata = devm_kzalloc(dev, sizeof(struct pmbus_platform_data), GFP_KERNEL); @@ -239,7 +248,7 @@ static struct i2c_driver pmbus_driver = { .driver = { .name = "wb_pmbus", }, - .probe_new = pmbus_probe, + .probe = pmbus_probe, .id_table = pmbus_id, }; diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_fpga_i2c_bus_drv.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_fpga_i2c_bus_drv.c index b237df4e36a..5c1834b21b1 100644 --- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_fpga_i2c_bus_drv.c +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_fpga_i2c_bus_drv.c @@ -1115,14 +1115,20 @@ static int fpga_i2c_probe(struct platform_device *pdev) return ret; }; +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 11, 0) static int fpga_i2c_remove(struct platform_device *pdev) +#else +static void fpga_i2c_remove(struct platform_device *pdev) +#endif { fpga_i2c_dev_t *fpga_i2c; fpga_i2c = platform_get_drvdata(pdev); i2c_del_adapter(&fpga_i2c->adap); platform_set_drvdata(pdev, NULL); +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 11, 0) return 0; +#endif }; static struct of_device_id fpga_i2c_match[] = { diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_fpga_pca954x_drv.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_fpga_pca954x_drv.c index d55d0cef122..30e3d2351ce 100644 --- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_fpga_pca954x_drv.c +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_fpga_pca954x_drv.c @@ -372,10 +372,20 @@ static int pca954x_deselect_mux(struct i2c_mux_core *muxc, u32 chan) /* * I2C init/probing/exit functions */ +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int fpga_i2c_pca954x_probe(struct i2c_client *client, const struct i2c_device_id *id) +#else +static int fpga_i2c_pca954x_probe(struct i2c_client *client) +#endif { +#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 3, 0) + const struct i2c_device_id *id = i2c_match_id(fpga_pca954x_id, client); +#endif struct i2c_adapter *adap = to_i2c_adapter(client->dev.parent); - int num, force, class; + int num, force; +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 10, 0) + unsigned int class = 0; +#endif struct pca954x *data; int ret = -ENODEV; struct device *dev; @@ -426,6 +436,12 @@ static int fpga_i2c_pca954x_probe(struct i2c_client *client, const struct i2c_de ret = -EINVAL; goto exit_free; } + if (!id) { + dev_err(&client->dev, "Failed to match i2c device id.\n"); + ret = -ENODEV; + goto exit_free; + } + data->type = id->driver_data; fpga_pca954x_device = client->dev.platform_data; data->fpga_9548_flag = fpga_pca954x_device->fpga_9548_flag; data->fpga_9548_reset_flag = fpga_pca954x_device->fpga_9548_reset_flag; @@ -438,7 +454,7 @@ static int fpga_i2c_pca954x_probe(struct i2c_client *client, const struct i2c_de FPGA_PCA954X_VERBOSE("pca9548_base_nr:%u.\n", data->pca9548_base_nr); } } else { - data->type = id->driver_data; + data->type = id ? id->driver_data : 0; /* BUS ID */ ret = of_property_read_u32(dev->of_node, "fpga_9548_flag", &data->fpga_9548_flag); if (ret != 0) { @@ -462,8 +478,6 @@ static int fpga_i2c_pca954x_probe(struct i2c_client *client, const struct i2c_de ret = -EINVAL; goto exit_free; } - - data->type = id->driver_data; data->last_chan = 0; /* force the first selection */ /* Now create an adapter for each channel */ @@ -473,7 +487,6 @@ static int fpga_i2c_pca954x_probe(struct i2c_client *client, const struct i2c_de } else { force = data->pca9548_base_nr + num; } - class = 0; /* no class by default */ #if LINUX_VERSION_CODE <= KERNEL_VERSION(4,6,7) data->virt_adaps[num] = i2c_add_mux_adapter(adap, &client->dev, client, @@ -486,7 +499,11 @@ static int fpga_i2c_pca954x_probe(struct i2c_client *client, const struct i2c_de goto virt_reg_failed; } #else +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 10, 0) ret = i2c_mux_add_adapter(muxc, force, num, class); +#else + ret = i2c_mux_add_adapter(muxc, force, num); +#endif if (ret) { dev_err(&client->dev, "Failed to register multiplexed adapter %d as bus %d\n", num, force); @@ -514,7 +531,11 @@ static int fpga_i2c_pca954x_probe(struct i2c_client *client, const struct i2c_de return ret; } +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0) +static int fpga_i2c_pca954x_remove(struct i2c_client *client) +#else static void fpga_i2c_pca954x_remove(struct i2c_client *client) +#endif { #if LINUX_VERSION_CODE <= KERNEL_VERSION(4,6,7) struct pca954x *data = i2c_get_clientdata(client); @@ -534,7 +555,11 @@ static void fpga_i2c_pca954x_remove(struct i2c_client *client) i2c_mux_del_adapters(muxc); #endif +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0) + return 0; +#else return; +#endif } static struct i2c_driver fpga_i2c_pca954x_driver = { diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_gpio_d1500.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_gpio_d1500.c index 25fa7acc1f1..13b6c1e60f6 100644 --- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_gpio_d1500.c +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_gpio_d1500.c @@ -24,10 +24,13 @@ #include #include #include +#include #include #include #include +#include #include +#include #define GPIO_NAME "wb_gpio_d1500" @@ -351,10 +354,16 @@ static int wb_gpio_probe(struct platform_device *pdev) return 0; } +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 11, 0) static int wb_gpio_remove(struct platform_device *pdev) +#else +static void wb_gpio_remove(struct platform_device *pdev) +#endif { dev_info(&pdev->dev, "unregister d1500 gpio success\n"); +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 11, 0) return 0; +#endif } static const struct of_device_id gpio_d1500_match[] = { diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_algo_bit.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_algo_bit.c new file mode 100644 index 00000000000..54c1cceb450 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_algo_bit.c @@ -0,0 +1,737 @@ +/* ------------------------------------------------------------------------- + * i2c-algo-bit.c i2c driver algorithms for bit-shift adapters + * ------------------------------------------------------------------------- + * Copyright (C) 1995-2000 Simon G. Vogl + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + * ------------------------------------------------------------------------- */ + +#include +#include +#include +#include +#include +#include +#include +#include + +static int debug = 0; +module_param(debug, int, S_IRUGO | S_IWUSR); + +int wb_i2c_bit_add_bus(struct i2c_adapter *adap); +int wb_i2c_bit_add_numbered_bus(struct i2c_adapter *adap); + +/* ----- global defines ----------------------------------------------- */ + +#ifdef DEBUG +#define bit_dbg(level, dev, format, args...) \ + do { \ + if (i2c_debug >= level) \ + dev_dbg(dev, format, ##args); \ + } while (0) +#else +#define bit_dbg(level, dev, format, args...) \ + do {} while (0) +#endif /* DEBUG */ + +/* ----- global variables --------------------------------------------- */ + +static int bit_test; /* see if the line-setting functions work */ +module_param(bit_test, int, S_IRUGO); +MODULE_PARM_DESC(bit_test, "lines testing - 0 off; 1 report; 2 fail if stuck"); + +#ifdef DEBUG +static int i2c_debug = 1; +module_param(i2c_debug, int, S_IRUGO | S_IWUSR); +MODULE_PARM_DESC(i2c_debug, + "debug level - 0 off; 1 normal; 2 verbose; 3 very verbose"); +#endif + +/* --- setting states on the bus with the right timing: --------------- */ + +#define setsda(adap, val) adap->setsda(adap->data, val) +#define setscl(adap, val) adap->setscl(adap->data, val) +#define getsda(adap) adap->getsda(adap->data) +#define getscl(adap) adap->getscl(adap->data) + +static inline void sdalo(struct i2c_algo_bit_data *adap) +{ + setsda(adap, 0); + udelay((adap->udelay + 1) / 2); +} + +static inline void sdahi(struct i2c_algo_bit_data *adap) +{ + setsda(adap, 1); + udelay((adap->udelay + 1) / 2); +} + +static inline void scllo(struct i2c_algo_bit_data *adap) +{ + setscl(adap, 0); + udelay(adap->udelay / 2); +} + +/* + * Raise scl line, and do checking for delays. This is necessary for slower + * devices. + */ +static int sclhi(struct i2c_algo_bit_data *adap) +{ + unsigned long start; + + setscl(adap, 1); + + /* Not all adapters have scl sense line... */ + if (!adap->getscl) + goto done; + + start = jiffies; + while (!getscl(adap)) { + /* This hw knows how to read the clock line, so we wait + * until it actually gets high. This is safer as some + * chips may hold it low ("clock stretching") while they + * are processing data internally. + */ + if (time_after(jiffies, start + adap->timeout)) { + /* Test one last time, as we may have been preempted + * between last check and timeout test. + */ + if (getscl(adap)) + break; + return -ETIMEDOUT; + } + cpu_relax(); + } +#ifdef DEBUG + if (jiffies != start && i2c_debug >= 3) + pr_debug("i2c-algo-bit: needed %ld jiffies for SCL to go " + "high\n", jiffies - start); +#endif + +done: + udelay(adap->udelay); + return 0; +} + +/* --- other auxiliary functions -------------------------------------- */ +static void i2c_start(struct i2c_algo_bit_data *adap) +{ + /* assert: scl, sda are high */ + setsda(adap, 0); + udelay(adap->udelay); + scllo(adap); +} + +static void i2c_repstart(struct i2c_algo_bit_data *adap) +{ + /* assert: scl is low */ + sdahi(adap); + sclhi(adap); + setsda(adap, 0); + udelay(adap->udelay); + scllo(adap); +} + +static void i2c_stop(struct i2c_algo_bit_data *adap) +{ + /* assert: scl is low */ + sdalo(adap); + sclhi(adap); + setsda(adap, 1); + udelay(adap->udelay); +} + +/* send a byte without start cond., look for arbitration, + check ackn. from slave */ +/* returns: + * 1 if the device acknowledged + * 0 if the device did not ack + * -ETIMEDOUT if an error occurred (while raising the scl line) + */ +static int i2c_outb(struct i2c_adapter *i2c_adap, unsigned char c) +{ + int i; + int sb; + int ack; + struct i2c_algo_bit_data *adap = i2c_adap->algo_data; + + /* assert: scl is low */ + for (i = 7; i >= 0; i--) { + sb = (c >> i) & 1; + setsda(adap, sb); + udelay((adap->udelay + 1) / 2); + if (sclhi(adap) < 0) { /* timed out */ + bit_dbg(1, &i2c_adap->dev, "i2c_outb: 0x%02x, " + "timeout at bit #%d\n", (int)c, i); + return -ETIMEDOUT; + } + /* FIXME do arbitration here: + * if (sb && !getsda(adap)) -> ouch! Get out of here. + * + * Report a unique code, so higher level code can retry + * the whole (combined) message and *NOT* issue STOP. + */ + scllo(adap); + } + sdahi(adap); + if (sclhi(adap) < 0) { /* timeout */ + bit_dbg(1, &i2c_adap->dev, "i2c_outb: 0x%02x, " + "timeout at ack\n", (int)c); + return -ETIMEDOUT; + } + + /* read ack: SDA should be pulled down by slave, or it may + * NAK (usually to report problems with the data we wrote). + */ + ack = !getsda(adap); /* ack: sda is pulled low -> success */ + bit_dbg(2, &i2c_adap->dev, "i2c_outb: 0x%02x %s\n", (int)c, + ack ? "A" : "NA"); + + scllo(adap); + return ack; + /* assert: scl is low (sda undef) */ +} + +static int i2c_inb(struct i2c_adapter *i2c_adap) +{ + /* read byte via i2c port, without start/stop sequence */ + /* acknowledge is sent in i2c_read. */ + int i; + unsigned char indata = 0; + struct i2c_algo_bit_data *adap = i2c_adap->algo_data; + + /* assert: scl is low */ + sdahi(adap); + for (i = 0; i < 8; i++) { + if (sclhi(adap) < 0) { /* timeout */ + bit_dbg(1, &i2c_adap->dev, "i2c_inb: timeout at bit " + "#%d\n", 7 - i); + return -ETIMEDOUT; + } + indata *= 2; + if (getsda(adap)) + indata |= 0x01; + setscl(adap, 0); + udelay(i == 7 ? adap->udelay / 2 : adap->udelay); + } + /* assert: scl is low */ + return indata; +} + +/* + * Sanity check for the adapter hardware - check the reaction of + * the bus lines only if it seems to be idle. + */ +static int test_bus(struct i2c_adapter *i2c_adap) +{ + struct i2c_algo_bit_data *adap = i2c_adap->algo_data; + const char *name = i2c_adap->name; + int scl, sda, ret; + + if (adap->pre_xfer) { + ret = adap->pre_xfer(i2c_adap); + if (ret < 0) + return -ENODEV; + } + + if (adap->getscl == NULL) + pr_info("%s: Testing SDA only, SCL is not readable\n", name); + + sda = getsda(adap); + scl = (adap->getscl == NULL) ? 1 : getscl(adap); + if (!scl || !sda) { + printk(KERN_WARNING + "%s: bus seems to be busy (scl=%d, sda=%d)\n", + name, scl, sda); + goto bailout; + } + + sdalo(adap); + sda = getsda(adap); + scl = (adap->getscl == NULL) ? 1 : getscl(adap); + if (sda) { + printk(KERN_WARNING "%s: SDA stuck high!\n", name); + goto bailout; + } + if (!scl) { + printk(KERN_WARNING "%s: SCL unexpected low " + "while pulling SDA low!\n", name); + goto bailout; + } + + sdahi(adap); + sda = getsda(adap); + scl = (adap->getscl == NULL) ? 1 : getscl(adap); + if (!sda) { + printk(KERN_WARNING "%s: SDA stuck low!\n", name); + goto bailout; + } + if (!scl) { + printk(KERN_WARNING "%s: SCL unexpected low " + "while pulling SDA high!\n", name); + goto bailout; + } + + scllo(adap); + sda = getsda(adap); + scl = (adap->getscl == NULL) ? 0 : getscl(adap); + if (scl) { + printk(KERN_WARNING "%s: SCL stuck high!\n", name); + goto bailout; + } + if (!sda) { + printk(KERN_WARNING "%s: SDA unexpected low " + "while pulling SCL low!\n", name); + goto bailout; + } + + sclhi(adap); + sda = getsda(adap); + scl = (adap->getscl == NULL) ? 1 : getscl(adap); + if (!scl) { + printk(KERN_WARNING "%s: SCL stuck low!\n", name); + goto bailout; + } + if (!sda) { + printk(KERN_WARNING "%s: SDA unexpected low " + "while pulling SCL high!\n", name); + goto bailout; + } + + if (adap->post_xfer) + adap->post_xfer(i2c_adap); + + pr_info("%s: Test OK\n", name); + return 0; +bailout: + sdahi(adap); + sclhi(adap); + + if (adap->post_xfer) + adap->post_xfer(i2c_adap); + + return -ENODEV; +} + +/* ----- Utility functions + */ + +/* try_address tries to contact a chip for a number of + * times before it gives up. + * return values: + * 1 chip answered + * 0 chip did not answer + * -x transmission error + */ +static int try_address(struct i2c_adapter *i2c_adap, + unsigned char addr, int retries) +{ + struct i2c_algo_bit_data *adap = i2c_adap->algo_data; + int i, ret = 0; + + for (i = 0; i <= retries; i++) { + ret = i2c_outb(i2c_adap, addr); + if (ret == 1 || i == retries) + break; + bit_dbg(3, &i2c_adap->dev, "emitting stop condition\n"); + i2c_stop(adap); + udelay(adap->udelay); + yield(); + bit_dbg(3, &i2c_adap->dev, "emitting start condition\n"); + i2c_start(adap); + } + if (i && ret) + bit_dbg(1, &i2c_adap->dev, "Used %d tries to %s client at " + "0x%02x: %s\n", i + 1, + addr & 1 ? "read from" : "write to", addr >> 1, + ret == 1 ? "success" : "failed, timeout?"); + return ret; +} + +static int sendbytes(struct i2c_adapter *i2c_adap, struct i2c_msg *msg) +{ + const unsigned char *temp = msg->buf; + int count = msg->len; + unsigned short nak_ok = msg->flags & I2C_M_IGNORE_NAK; + int retval; + int wrcount = 0; + + while (count > 0) { + retval = i2c_outb(i2c_adap, *temp); + + /* OK/ACK; or ignored NAK */ + if ((retval > 0) || (nak_ok && (retval == 0))) { + count--; + temp++; + wrcount++; + + /* A slave NAKing the master means the slave didn't like + * something about the data it saw. For example, maybe + * the SMBus PEC was wrong. + */ + } else if (retval == 0) { + dev_err(&i2c_adap->dev, "sendbytes: NAK bailout.\n"); + return -EIO; + + /* Timeout; or (someday) lost arbitration + * + * FIXME Lost ARB implies retrying the transaction from + * the first message, after the "winning" master issues + * its STOP. As a rule, upper layer code has no reason + * to know or care about this ... it is *NOT* an error. + */ + } else { + dev_err(&i2c_adap->dev, "sendbytes: error %d\n", + retval); + return retval; + } + } + return wrcount; +} + +static int acknak(struct i2c_adapter *i2c_adap, int is_ack) +{ + struct i2c_algo_bit_data *adap = i2c_adap->algo_data; + + /* assert: sda is high */ + if (is_ack) /* send ack */ + setsda(adap, 0); + udelay((adap->udelay + 1) / 2); + if (sclhi(adap) < 0) { /* timeout */ + dev_err(&i2c_adap->dev, "readbytes: ack/nak timeout\n"); + return -ETIMEDOUT; + } + scllo(adap); + return 0; +} + +static int readbytes(struct i2c_adapter *i2c_adap, struct i2c_msg *msg) +{ + int inval; + int rdcount = 0; /* counts bytes read */ + unsigned char *temp = msg->buf; + int count = msg->len; + const unsigned flags = msg->flags; + + while (count > 0) { + inval = i2c_inb(i2c_adap); + if (inval >= 0) { + *temp = inval; + rdcount++; + } else { /* read timed out */ + break; + } + + temp++; + count--; + + /* Some SMBus transactions require that we receive the + transaction length as the first read byte. */ + if (rdcount == 1 && (flags & I2C_M_RECV_LEN)) { + if (inval <= 0 || inval > I2C_SMBUS_BLOCK_MAX) { + if (!(flags & I2C_M_NO_RD_ACK)) + acknak(i2c_adap, 0); + dev_err(&i2c_adap->dev, "readbytes: invalid " + "block length (%d)\n", inval); + return -EPROTO; + } + /* The original count value accounts for the extra + bytes, that is, either 1 for a regular transaction, + or 2 for a PEC transaction. */ + count += inval; + msg->len += inval; + } + + bit_dbg(2, &i2c_adap->dev, "readbytes: 0x%02x %s\n", + inval, + (flags & I2C_M_NO_RD_ACK) + ? "(no ack/nak)" + : (count ? "A" : "NA")); + + if (!(flags & I2C_M_NO_RD_ACK)) { + inval = acknak(i2c_adap, count); + if (inval < 0) + return inval; + } + } + return rdcount; +} + +/* doAddress initiates the transfer by generating the start condition (in + * try_address) and transmits the address in the necessary format to handle + * reads, writes as well as 10bit-addresses. + * returns: + * 0 everything went okay, the chip ack'ed, or IGNORE_NAK flag was set + * -x an error occurred (like: -ENXIO if the device did not answer, or + * -ETIMEDOUT, for example if the lines are stuck...) + */ +static int bit_doAddress(struct i2c_adapter *i2c_adap, struct i2c_msg *msg) +{ + unsigned short flags = msg->flags; + unsigned short nak_ok = msg->flags & I2C_M_IGNORE_NAK; + struct i2c_algo_bit_data *adap = i2c_adap->algo_data; + + unsigned char addr; + int ret, retries; + + retries = nak_ok ? 0 : i2c_adap->retries; + + if (flags & I2C_M_TEN) { + /* a ten bit address */ + addr = 0xf0 | ((msg->addr >> 7) & 0x06); + bit_dbg(2, &i2c_adap->dev, "addr0: %d\n", addr); + /* try extended address code...*/ + ret = try_address(i2c_adap, addr, retries); + if ((ret != 1) && !nak_ok) { + dev_err(&i2c_adap->dev, + "died at extended address code\n"); + return -ENXIO; + } + /* the remaining 8 bit address */ + ret = i2c_outb(i2c_adap, msg->addr & 0xff); + if ((ret != 1) && !nak_ok) { + /* the chip did not ack / xmission error occurred */ + dev_err(&i2c_adap->dev, "died at 2nd address code\n"); + return -ENXIO; + } + if (flags & I2C_M_RD) { + bit_dbg(3, &i2c_adap->dev, "emitting repeated " + "start condition\n"); + i2c_repstart(adap); + /* okay, now switch into reading mode */ + addr |= 0x01; + ret = try_address(i2c_adap, addr, retries); + if ((ret != 1) && !nak_ok) { + dev_err(&i2c_adap->dev, + "died at repeated address code\n"); + return -EIO; + } + } + } else { /* normal 7bit address */ + addr = i2c_8bit_addr_from_msg(msg); + if (flags & I2C_M_REV_DIR_ADDR) + addr ^= 1; + ret = try_address(i2c_adap, addr, retries); + if ((ret != 1) && !nak_ok) + return -ENXIO; + } + + return 0; +} + +static void bit_i2c_unblock(struct i2c_adapter *i2c_adap) +{ + int i; + struct i2c_algo_bit_data *adap = i2c_adap->algo_data; + + for (i = 0; i < 9; i++) { + setscl(adap, 0); + udelay(5); + setscl(adap, 1); + udelay(5); + } + setscl(adap, 0); + setsda(adap, 0); + udelay(5); + setscl(adap, 1); + udelay(5); + setsda(adap, 1); +} + +static int check_bit_i2c_unblock(struct i2c_adapter *i2c_adap) +{ + struct i2c_algo_bit_data *adap = i2c_adap->algo_data; + int sda, scl; + + sda = getsda(adap); + scl = getscl(adap); + if ((sda == 0) && scl) { + DEBUG_ERROR("SCL is high and SDA is low, send 9 clock to device.\n"); + bit_i2c_unblock(i2c_adap); + } + + sda = getsda(adap); + scl = getscl(adap); + if (sda && scl) { + DEBUG_VERBOSE("SCL and SDA are both high, i2c level check ok.\n"); + return 0; + } + dev_warn(&i2c_adap->dev, "Check i2c level failed, SCL %s, SDA %s.\n", scl ? "high" : "low", sda ? "high" : "low"); + return -EIO; +} + +static int bit_xfer(struct i2c_adapter *i2c_adap, + struct i2c_msg msgs[], int num) +{ + struct i2c_msg *pmsg; + struct i2c_algo_bit_data *adap = i2c_adap->algo_data; + int i, ret; + unsigned short nak_ok; + + if (adap->pre_xfer) { + ret = adap->pre_xfer(i2c_adap); + if (ret < 0) + return ret; + } + + if (check_bit_i2c_unblock(i2c_adap) < 0) { + DEBUG_ERROR("check i2c is block.\n"); + return -EIO; + } + + bit_dbg(3, &i2c_adap->dev, "emitting start condition\n"); + i2c_start(adap); + for (i = 0; i < num; i++) { + pmsg = &msgs[i]; + nak_ok = pmsg->flags & I2C_M_IGNORE_NAK; + if (!(pmsg->flags & I2C_M_NOSTART)) { + if (i) { + if (msgs[i - 1].flags & I2C_M_STOP) { + bit_dbg(3, &i2c_adap->dev, + "emitting enforced stop/start condition\n"); + i2c_stop(adap); + i2c_start(adap); + } else { + bit_dbg(3, &i2c_adap->dev, + "emitting repeated start condition\n"); + i2c_repstart(adap); + } + } + ret = bit_doAddress(i2c_adap, pmsg); + if ((ret != 0) && !nak_ok) { + bit_dbg(1, &i2c_adap->dev, "NAK from " + "device addr 0x%02x msg #%d\n", + msgs[i].addr, i); + goto bailout; + } + } + if (pmsg->flags & I2C_M_RD) { + /* read bytes into buffer*/ + ret = readbytes(i2c_adap, pmsg); + if (ret >= 1) + bit_dbg(2, &i2c_adap->dev, "read %d byte%s\n", + ret, ret == 1 ? "" : "s"); + if (ret < pmsg->len) { + if (ret >= 0) + ret = -EIO; + goto bailout; + } + } else { + /* write bytes from buffer */ + ret = sendbytes(i2c_adap, pmsg); + if (ret >= 1) + bit_dbg(2, &i2c_adap->dev, "wrote %d byte%s\n", + ret, ret == 1 ? "" : "s"); + if (ret < pmsg->len) { + if (ret >= 0) + ret = -EIO; + goto bailout; + } + } + } + ret = i; + +bailout: + bit_dbg(3, &i2c_adap->dev, "emitting stop condition\n"); + i2c_stop(adap); + + if (adap->post_xfer) + adap->post_xfer(i2c_adap); + return ret; +} + +/* + * We print a warning when we are not flagged to support atomic transfers but + * will try anyhow. That's what the I2C core would do as well. Sadly, we can't + * modify the algorithm struct at probe time because this struct is exported + * 'const'. + */ +static int bit_xfer_atomic(struct i2c_adapter *i2c_adap, struct i2c_msg msgs[], + int num) +{ + struct i2c_algo_bit_data *adap = i2c_adap->algo_data; + + if (!adap->can_do_atomic) + dev_warn(&i2c_adap->dev, "not flagged for atomic transfers\n"); + + return bit_xfer(i2c_adap, msgs, num); +} + +static u32 bit_func(struct i2c_adapter *adap) +{ + return I2C_FUNC_I2C | I2C_FUNC_NOSTART | I2C_FUNC_SMBUS_EMUL | + I2C_FUNC_SMBUS_READ_BLOCK_DATA | + I2C_FUNC_SMBUS_BLOCK_PROC_CALL | + I2C_FUNC_10BIT_ADDR | I2C_FUNC_PROTOCOL_MANGLING; +} + +/* -----exported algorithm data: ------------------------------------- */ + +const struct i2c_algorithm wb_i2c_bit_algo = { + .master_xfer = bit_xfer, + .master_xfer_atomic = bit_xfer_atomic, + .functionality = bit_func, +}; +EXPORT_SYMBOL(wb_i2c_bit_algo); + +static const struct i2c_adapter_quirks i2c_bit_quirk_no_clk_stretch = { + .flags = I2C_AQ_NO_CLK_STRETCH, +}; + +/* + * registering functions to load algorithms at runtime + */ +static int __i2c_bit_add_bus(struct i2c_adapter *adap, + int (*add_adapter)(struct i2c_adapter *)) +{ + struct i2c_algo_bit_data *bit_adap = adap->algo_data; + int ret; + + if (bit_test) { + ret = test_bus(adap); + if (bit_test >= 2 && ret < 0) + return -ENODEV; + } + + /* register new adapter to i2c module... */ + adap->algo = &wb_i2c_bit_algo; + adap->retries = 3; + if (bit_adap->getscl == NULL) + adap->quirks = &i2c_bit_quirk_no_clk_stretch; + + ret = add_adapter(adap); + if (ret < 0) + return ret; + + /* Complain if SCL can't be read */ + if (bit_adap->getscl == NULL) { + dev_warn(&adap->dev, "Not I2C compliant: can't read SCL\n"); + dev_warn(&adap->dev, "Bus may be unreliable\n"); + } + return 0; +} + +int wb_i2c_bit_add_bus(struct i2c_adapter *adap) +{ + return __i2c_bit_add_bus(adap, i2c_add_adapter); +} +EXPORT_SYMBOL(wb_i2c_bit_add_bus); + +int wb_i2c_bit_add_numbered_bus(struct i2c_adapter *adap) +{ + return __i2c_bit_add_bus(adap, i2c_add_numbered_adapter); +} +EXPORT_SYMBOL(wb_i2c_bit_add_numbered_bus); + +MODULE_AUTHOR("support"); +MODULE_DESCRIPTION("I2C-Bus bit-banging algorithm"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_dev.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_dev.c index 69b2aad0e7c..ac9a2aacf61 100644 --- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_dev.c +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_dev.c @@ -25,11 +25,13 @@ #include #include #include +#include #include #include #include #include #include +#include #include "wb_i2c_dev.h" @@ -741,7 +743,11 @@ int i2c_device_func_write(const char *path, uint32_t offset, uint8_t *buf, size_ } EXPORT_SYMBOL(i2c_device_func_write); +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int i2c_dev_probe(struct i2c_client *client, const struct i2c_device_id *id) +#else +static int i2c_dev_probe(struct i2c_client *client) +#endif { int ret = 0; struct i2c_dev_info *i2c_dev; @@ -819,7 +825,11 @@ static int i2c_dev_probe(struct i2c_client *client, const struct i2c_device_id * return 0; } +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0) +static int i2c_dev_remove(struct i2c_client *client) +#else static void i2c_dev_remove(struct i2c_client *client) +#endif { int i; for (i = 0; i < MAX_I2C_DEV_NUM; i++) { @@ -828,7 +838,11 @@ static void i2c_dev_remove(struct i2c_client *client) i2c_dev_arry[i] = NULL; } } +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0) + return 0; +#else return; +#endif } static const struct i2c_device_id i2c_dev_id[] = { diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_dev.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_dev.h index 5d294a7ed41..e956cc6f799 100644 --- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_dev.h +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_dev.h @@ -27,6 +27,7 @@ typedef struct i2c_dev_device_s { struct i2c_client *client; + struct i2c_adapter *adap; uint32_t i2c_bus; uint32_t i2c_addr; char i2c_name[I2C_DEV_NAME_MAX_LEN]; diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_gpio.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_gpio.c new file mode 100644 index 00000000000..3a56563d32e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_gpio.c @@ -0,0 +1,553 @@ +/* + * Bitbanging I2C bus driver using the GPIO API + * + * Copyright (C) 2007 Atmel Corporation + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#ifndef I2C_CLASS_SPD +#define I2C_CLASS_SPD 0 +#endif + +extern int wb_i2c_bit_add_numbered_bus(struct i2c_adapter *adap); + +struct i2c_gpio_private_data { + struct gpio_desc *sda; + struct gpio_desc *scl; + struct i2c_adapter adap; + struct i2c_algo_bit_data bit_data; + struct i2c_gpio_platform_data pdata; +#ifdef CONFIG_I2C_GPIO_FAULT_INJECTOR + struct dentry *debug_dir; + /* these must be protected by bus lock */ + struct completion scl_irq_completion; + u64 scl_irq_data; +#endif +}; + +/* + * Toggle SDA by changing the output value of the pin. This is only + * valid for pins configured as open drain (i.e. setting the value + * high effectively turns off the output driver.) + */ +static void i2c_gpio_setsda_val(void *data, int state) +{ + struct i2c_gpio_private_data *priv = data; + + gpiod_set_value_cansleep(priv->sda, state); +} + +/* + * Toggle SCL by changing the output value of the pin. This is used + * for pins that are configured as open drain and for output-only + * pins. The latter case will break the i2c protocol, but it will + * often work in practice. + */ +static void i2c_gpio_setscl_val(void *data, int state) +{ + struct i2c_gpio_private_data *priv = data; + + gpiod_set_value_cansleep(priv->scl, state); +} + +static int i2c_gpio_getsda(void *data) +{ + struct i2c_gpio_private_data *priv = data; + + return gpiod_get_value_cansleep(priv->sda); +} + +static int i2c_gpio_getscl(void *data) +{ + struct i2c_gpio_private_data *priv = data; + + return gpiod_get_value_cansleep(priv->scl); +} + +#ifdef CONFIG_I2C_GPIO_FAULT_INJECTOR +static struct dentry *i2c_gpio_debug_dir; + +#define setsda(bd, val) ((bd)->setsda((bd)->data, val)) +#define setscl(bd, val) ((bd)->setscl((bd)->data, val)) +#define getsda(bd) ((bd)->getsda((bd)->data)) +#define getscl(bd) ((bd)->getscl((bd)->data)) + +#define WIRE_ATTRIBUTE(wire) \ +static int fops_##wire##_get(void *data, u64 *val) \ +{ \ + struct i2c_gpio_private_data *priv = data; \ + \ + i2c_lock_bus(&priv->adap, I2C_LOCK_ROOT_ADAPTER); \ + *val = get##wire(&priv->bit_data); \ + i2c_unlock_bus(&priv->adap, I2C_LOCK_ROOT_ADAPTER); \ + return 0; \ +} \ +static int fops_##wire##_set(void *data, u64 val) \ +{ \ + struct i2c_gpio_private_data *priv = data; \ + \ + i2c_lock_bus(&priv->adap, I2C_LOCK_ROOT_ADAPTER); \ + set##wire(&priv->bit_data, val); \ + i2c_unlock_bus(&priv->adap, I2C_LOCK_ROOT_ADAPTER); \ + return 0; \ +} \ +DEFINE_DEBUGFS_ATTRIBUTE(fops_##wire, fops_##wire##_get, fops_##wire##_set, "%llu\n") + +WIRE_ATTRIBUTE(scl); +WIRE_ATTRIBUTE(sda); + +static void i2c_gpio_incomplete_transfer(struct i2c_gpio_private_data *priv, + u32 pattern, u8 pattern_size) +{ + struct i2c_algo_bit_data *bit_data = &priv->bit_data; + int i; + + i2c_lock_bus(&priv->adap, I2C_LOCK_ROOT_ADAPTER); + + /* START condition */ + setsda(bit_data, 0); + udelay(bit_data->udelay); + + /* Send pattern, request ACK, don't send STOP */ + for (i = pattern_size - 1; i >= 0; i--) { + setscl(bit_data, 0); + udelay(bit_data->udelay / 2); + setsda(bit_data, (pattern >> i) & 1); + udelay((bit_data->udelay + 1) / 2); + setscl(bit_data, 1); + udelay(bit_data->udelay); + } + + i2c_unlock_bus(&priv->adap, I2C_LOCK_ROOT_ADAPTER); +} + +static int fops_incomplete_addr_phase_set(void *data, u64 addr) +{ + struct i2c_gpio_private_data *priv = data; + u32 pattern; + + if (addr > 0x7f) + return -EINVAL; + + /* ADDR (7 bit) + RD (1 bit) + Client ACK, keep SDA hi (1 bit) */ + pattern = (addr << 2) | 3; + + i2c_gpio_incomplete_transfer(priv, pattern, 9); + + return 0; +} +DEFINE_DEBUGFS_ATTRIBUTE(fops_incomplete_addr_phase, NULL, fops_incomplete_addr_phase_set, "%llu\n"); + +static int fops_incomplete_write_byte_set(void *data, u64 addr) +{ + struct i2c_gpio_private_data *priv = data; + u32 pattern; + + if (addr > 0x7f) + return -EINVAL; + + /* ADDR (7 bit) + WR (1 bit) + Client ACK (1 bit) */ + pattern = (addr << 2) | 1; + /* 0x00 (8 bit) + Client ACK, keep SDA hi (1 bit) */ + pattern = (pattern << 9) | 1; + + i2c_gpio_incomplete_transfer(priv, pattern, 18); + + return 0; +} +DEFINE_DEBUGFS_ATTRIBUTE(fops_incomplete_write_byte, NULL, fops_incomplete_write_byte_set, "%llu\n"); + +static int i2c_gpio_fi_act_on_scl_irq(struct i2c_gpio_private_data *priv, + irqreturn_t handler(int, void*)) +{ + int ret, irq = gpiod_to_irq(priv->scl); + + if (irq < 0) + return irq; + + i2c_lock_bus(&priv->adap, I2C_LOCK_ROOT_ADAPTER); + + ret = gpiod_direction_input(priv->scl); + if (ret) + goto unlock; + + reinit_completion(&priv->scl_irq_completion); + + ret = request_irq(irq, handler, IRQF_TRIGGER_FALLING, + "i2c_gpio_fault_injector_scl_irq", priv); + if (ret) + goto output; + + wait_for_completion_interruptible(&priv->scl_irq_completion); + + free_irq(irq, priv); + output: + ret = gpiod_direction_output(priv->scl, 1) ?: ret; + unlock: + i2c_unlock_bus(&priv->adap, I2C_LOCK_ROOT_ADAPTER); + + return ret; +} + +static irqreturn_t lose_arbitration_irq(int irq, void *dev_id) +{ + struct i2c_gpio_private_data *priv = dev_id; + + setsda(&priv->bit_data, 0); + udelay(priv->scl_irq_data); + setsda(&priv->bit_data, 1); + + complete(&priv->scl_irq_completion); + + return IRQ_HANDLED; +} + +static int fops_lose_arbitration_set(void *data, u64 duration) +{ + struct i2c_gpio_private_data *priv = data; + + if (duration > 100 * 1000) + return -EINVAL; + + priv->scl_irq_data = duration; + /* + * Interrupt on falling SCL. This ensures that the master under test has + * really started the transfer. Interrupt on falling SDA did only + * exercise 'bus busy' detection on some HW but not 'arbitration lost'. + * Note that the interrupt latency may cause the first bits to be + * transmitted correctly. + */ + return i2c_gpio_fi_act_on_scl_irq(priv, lose_arbitration_irq); +} +DEFINE_DEBUGFS_ATTRIBUTE(fops_lose_arbitration, NULL, fops_lose_arbitration_set, "%llu\n"); + +static irqreturn_t inject_panic_irq(int irq, void *dev_id) +{ + struct i2c_gpio_private_data *priv = dev_id; + + udelay(priv->scl_irq_data); + panic("I2C fault injector induced panic"); + + return IRQ_HANDLED; +} + +static int fops_inject_panic_set(void *data, u64 duration) +{ + struct i2c_gpio_private_data *priv = data; + + if (duration > 100 * 1000) + return -EINVAL; + + priv->scl_irq_data = duration; + /* + * Interrupt on falling SCL. This ensures that the master under test has + * really started the transfer. + */ + return i2c_gpio_fi_act_on_scl_irq(priv, inject_panic_irq); +} +DEFINE_DEBUGFS_ATTRIBUTE(fops_inject_panic, NULL, fops_inject_panic_set, "%llu\n"); + +static void i2c_gpio_fault_injector_init(struct platform_device *pdev) +{ + struct i2c_gpio_private_data *priv = platform_get_drvdata(pdev); + + /* + * If there will be a debugfs-dir per i2c adapter somewhen, put the + * 'fault-injector' dir there. Until then, we have a global dir with + * all adapters as subdirs. + */ + if (!i2c_gpio_debug_dir) { + i2c_gpio_debug_dir = debugfs_create_dir("i2c-fault-injector", NULL); + if (!i2c_gpio_debug_dir) + return; + } + + priv->debug_dir = debugfs_create_dir(pdev->name, i2c_gpio_debug_dir); + if (!priv->debug_dir) + return; + + init_completion(&priv->scl_irq_completion); + + debugfs_create_file_unsafe("incomplete_address_phase", 0200, priv->debug_dir, + priv, &fops_incomplete_addr_phase); + debugfs_create_file_unsafe("incomplete_write_byte", 0200, priv->debug_dir, + priv, &fops_incomplete_write_byte); + if (priv->bit_data.getscl) { + debugfs_create_file_unsafe("inject_panic", 0200, priv->debug_dir, + priv, &fops_inject_panic); + debugfs_create_file_unsafe("lose_arbitration", 0200, priv->debug_dir, + priv, &fops_lose_arbitration); + } + debugfs_create_file_unsafe("scl", 0600, priv->debug_dir, priv, &fops_scl); + debugfs_create_file_unsafe("sda", 0600, priv->debug_dir, priv, &fops_sda); +} + +static void i2c_gpio_fault_injector_exit(struct platform_device *pdev) +{ + struct i2c_gpio_private_data *priv = platform_get_drvdata(pdev); + + debugfs_remove_recursive(priv->debug_dir); +} +#else +static inline void i2c_gpio_fault_injector_init(struct platform_device *pdev) {} +static inline void i2c_gpio_fault_injector_exit(struct platform_device *pdev) {} +#endif /* CONFIG_I2C_GPIO_FAULT_INJECTOR*/ + +static void of_i2c_gpio_get_props(struct device_node *np, + struct i2c_gpio_platform_data *pdata) +{ + u32 reg; + + of_property_read_u32(np, "i2c-gpio,delay-us", &pdata->udelay); + + if (!of_property_read_u32(np, "i2c-gpio,timeout-ms", ®)) + pdata->timeout = msecs_to_jiffies(reg); + + pdata->sda_is_open_drain = + of_property_read_bool(np, "i2c-gpio,sda-open-drain"); + pdata->scl_is_open_drain = + of_property_read_bool(np, "i2c-gpio,scl-open-drain"); + pdata->scl_is_output_only = + of_property_read_bool(np, "i2c-gpio,scl-output-only"); +} + +static struct gpio_desc *i2c_gpio_get_desc(struct device *dev, + const char *con_id, + unsigned int index, + enum gpiod_flags gflags) +{ + struct gpio_desc *retdesc; + int ret; + + retdesc = devm_gpiod_get(dev, con_id, gflags); + if (!IS_ERR(retdesc)) { + dev_dbg(dev, "got GPIO from name %s\n", con_id); + return retdesc; + } + + retdesc = devm_gpiod_get_index(dev, NULL, index, gflags); + if (!IS_ERR(retdesc)) { + dev_dbg(dev, "got GPIO from index %u\n", index); + return retdesc; + } + + ret = PTR_ERR(retdesc); + + /* FIXME: hack in the old code, is this really necessary? */ + if (ret == -EINVAL) + retdesc = ERR_PTR(-EPROBE_DEFER); + + /* This happens if the GPIO driver is not yet probed, let's defer */ + if (ret == -ENOENT) + retdesc = ERR_PTR(-EPROBE_DEFER); + + if (PTR_ERR(retdesc) != -EPROBE_DEFER) + dev_err(dev, "error trying to get descriptor: %d\n", ret); + + return retdesc; +} + +static int i2c_gpio_probe(struct platform_device *pdev) +{ + struct i2c_gpio_private_data *priv; + struct i2c_gpio_platform_data *pdata; + struct i2c_algo_bit_data *bit_data; + struct i2c_adapter *adap; + struct device *dev = &pdev->dev; + struct device_node *np = dev->of_node; + enum gpiod_flags gflags; + int ret; + + priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + adap = &priv->adap; + bit_data = &priv->bit_data; + pdata = &priv->pdata; + + if (np) { + of_i2c_gpio_get_props(np, pdata); + } else { + /* + * If all platform data settings are zero it is OK + * to not provide any platform data from the board. + */ + if (dev_get_platdata(dev)) + memcpy(pdata, dev_get_platdata(dev), sizeof(*pdata)); + } + + /* + * First get the GPIO pins; if it fails, we'll defer the probe. + * If the SDA line is marked from platform data or device tree as + * "open drain" it means something outside of our control is making + * this line being handled as open drain, and we should just handle + * it as any other output. Else we enforce open drain as this is + * required for an I2C bus. + */ + if (pdata->sda_is_open_drain) + gflags = GPIOD_OUT_HIGH; + else + gflags = GPIOD_OUT_HIGH_OPEN_DRAIN; + priv->sda = i2c_gpio_get_desc(dev, "sda", 0, gflags); + if (IS_ERR(priv->sda)) + return PTR_ERR(priv->sda); + + /* + * If the SCL line is marked from platform data or device tree as + * "open drain" it means something outside of our control is making + * this line being handled as open drain, and we should just handle + * it as any other output. Else we enforce open drain as this is + * required for an I2C bus. + */ + if (pdata->scl_is_open_drain) + gflags = GPIOD_OUT_HIGH; + else + gflags = GPIOD_OUT_HIGH_OPEN_DRAIN; + priv->scl = i2c_gpio_get_desc(dev, "scl", 1, gflags); + if (IS_ERR(priv->scl)) + return PTR_ERR(priv->scl); + + if (gpiod_cansleep(priv->sda) || gpiod_cansleep(priv->scl)) + dev_warn(dev, "Slow GPIO pins might wreak havoc into I2C/SMBus bus timing"); + else + bit_data->can_do_atomic = true; + + bit_data->setsda = i2c_gpio_setsda_val; + bit_data->setscl = i2c_gpio_setscl_val; + + if (!pdata->scl_is_output_only) + bit_data->getscl = i2c_gpio_getscl; + bit_data->getsda = i2c_gpio_getsda; + + if (pdata->udelay) + bit_data->udelay = pdata->udelay; + else if (pdata->scl_is_output_only) + bit_data->udelay = 50; /* 10 kHz */ + else + bit_data->udelay = 5; /* 100 kHz */ + + if (pdata->timeout) + bit_data->timeout = pdata->timeout; + else + bit_data->timeout = HZ / 10; /* 100 ms */ + + bit_data->data = priv; + + adap->owner = THIS_MODULE; + if (np) + strscpy(adap->name, dev_name(dev), sizeof(adap->name)); + else + snprintf(adap->name, sizeof(adap->name), "i2c-gpio%d", pdev->id); + + adap->algo_data = bit_data; + adap->class = I2C_CLASS_HWMON | I2C_CLASS_SPD; + adap->dev.parent = dev; + adap->dev.of_node = np; + + adap->nr = pdev->id; + ret = wb_i2c_bit_add_numbered_bus(adap); + if (ret) + return ret; + + platform_set_drvdata(pdev, priv); + + /* + * FIXME: using global GPIO numbers is not helpful. If/when we + * get accessors to get the actual name of the GPIO line, + * from the descriptor, then provide that instead. + */ + dev_info(dev, "using lines %u (SDA) and %u (SCL%s)\n", + desc_to_gpio(priv->sda), desc_to_gpio(priv->scl), + pdata->scl_is_output_only + ? ", no clock stretching" : ""); + + i2c_gpio_fault_injector_init(pdev); + + return 0; +} + +static void i2c_gpio_remove_internal(struct platform_device *pdev) +{ + struct i2c_gpio_private_data *priv; + struct i2c_adapter *adap; + + i2c_gpio_fault_injector_exit(pdev); + + priv = platform_get_drvdata(pdev); + adap = &priv->adap; + + i2c_del_adapter(adap); +} + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 1, 0) +static void i2c_gpio_remove(struct platform_device *pdev) +{ + i2c_gpio_remove_internal(pdev); +} +#else +static int i2c_gpio_remove(struct platform_device *pdev) +{ + i2c_gpio_remove_internal(pdev); + return 0; +} +#endif + +#if defined(CONFIG_OF) +static const struct of_device_id i2c_gpio_dt_ids[] = { + { .compatible = "wb-i2c-gpio", }, + { /* sentinel */ } +}; + +MODULE_DEVICE_TABLE(of, i2c_gpio_dt_ids); +#endif + +static struct platform_driver i2c_gpio_driver = { + .driver = { + .name = "wb-i2c-gpio", + .of_match_table = of_match_ptr(i2c_gpio_dt_ids), + }, + .probe = i2c_gpio_probe, + .remove = i2c_gpio_remove, +}; + +static int __init i2c_gpio_init(void) +{ + int ret; + + ret = platform_driver_register(&i2c_gpio_driver); + if (ret) + printk(KERN_ERR "i2c-gpio: probe failed: %d\n", ret); + + return ret; +} +subsys_initcall(i2c_gpio_init); + +static void __exit i2c_gpio_exit(void) +{ + platform_driver_unregister(&i2c_gpio_driver); +} +module_exit(i2c_gpio_exit); + +MODULE_AUTHOR("support"); +MODULE_DESCRIPTION("Platform-independent bitbanging I2C driver"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:i2c-gpio"); diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_i801.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_i801.c new file mode 100644 index 00000000000..b9ed4d4d22b --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_i801.c @@ -0,0 +1,2119 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + Copyright (c) 1998 - 2002 Frodo Looijaard , + Philip Edelbrock , and Mark D. Studebaker + + Copyright (C) 2007 - 2014 Jean Delvare + Copyright (C) 2010 Intel Corporation, + David Woodhouse + +*/ + +/* + * Supports the following Intel I/O Controller Hubs (ICH): + * + * I/O Block I2C + * region SMBus Block proc. block + * Chip name PCI ID size PEC buffer call read + * --------------------------------------------------------------------------- + * 82801AA (ICH) 0x2413 16 no no no no + * 82801AB (ICH0) 0x2423 16 no no no no + * 82801BA (ICH2) 0x2443 16 no no no no + * 82801CA (ICH3) 0x2483 32 soft no no no + * 82801DB (ICH4) 0x24c3 32 hard yes no no + * 82801E (ICH5) 0x24d3 32 hard yes yes yes + * 6300ESB 0x25a4 32 hard yes yes yes + * 82801F (ICH6) 0x266a 32 hard yes yes yes + * 6310ESB/6320ESB 0x269b 32 hard yes yes yes + * 82801G (ICH7) 0x27da 32 hard yes yes yes + * 82801H (ICH8) 0x283e 32 hard yes yes yes + * 82801I (ICH9) 0x2930 32 hard yes yes yes + * EP80579 (Tolapai) 0x5032 32 hard yes yes yes + * ICH10 0x3a30 32 hard yes yes yes + * ICH10 0x3a60 32 hard yes yes yes + * 5/3400 Series (PCH) 0x3b30 32 hard yes yes yes + * 6 Series (PCH) 0x1c22 32 hard yes yes yes + * Patsburg (PCH) 0x1d22 32 hard yes yes yes + * Patsburg (PCH) IDF 0x1d70 32 hard yes yes yes + * Patsburg (PCH) IDF 0x1d71 32 hard yes yes yes + * Patsburg (PCH) IDF 0x1d72 32 hard yes yes yes + * DH89xxCC (PCH) 0x2330 32 hard yes yes yes + * Panther Point (PCH) 0x1e22 32 hard yes yes yes + * Lynx Point (PCH) 0x8c22 32 hard yes yes yes + * Lynx Point-LP (PCH) 0x9c22 32 hard yes yes yes + * Avoton (SOC) 0x1f3c 32 hard yes yes yes + * Wellsburg (PCH) 0x8d22 32 hard yes yes yes + * Wellsburg (PCH) MS 0x8d7d 32 hard yes yes yes + * Wellsburg (PCH) MS 0x8d7e 32 hard yes yes yes + * Wellsburg (PCH) MS 0x8d7f 32 hard yes yes yes + * Coleto Creek (PCH) 0x23b0 32 hard yes yes yes + * Wildcat Point (PCH) 0x8ca2 32 hard yes yes yes + * Wildcat Point-LP (PCH) 0x9ca2 32 hard yes yes yes + * BayTrail (SOC) 0x0f12 32 hard yes yes yes + * Braswell (SOC) 0x2292 32 hard yes yes yes + * Sunrise Point-H (PCH) 0xa123 32 hard yes yes yes + * Sunrise Point-LP (PCH) 0x9d23 32 hard yes yes yes + * DNV (SOC) 0x19df 32 hard yes yes yes + * Emmitsburg (PCH) 0x1bc9 32 hard yes yes yes + * Broxton (SOC) 0x5ad4 32 hard yes yes yes + * Lewisburg (PCH) 0xa1a3 32 hard yes yes yes + * Lewisburg Supersku (PCH) 0xa223 32 hard yes yes yes + * Kaby Lake PCH-H (PCH) 0xa2a3 32 hard yes yes yes + * Gemini Lake (SOC) 0x31d4 32 hard yes yes yes + * Cannon Lake-H (PCH) 0xa323 32 hard yes yes yes + * Cannon Lake-LP (PCH) 0x9da3 32 hard yes yes yes + * Cedar Fork (PCH) 0x18df 32 hard yes yes yes + * Ice Lake-LP (PCH) 0x34a3 32 hard yes yes yes + * Comet Lake (PCH) 0x02a3 32 hard yes yes yes + * Comet Lake-H (PCH) 0x06a3 32 hard yes yes yes + * Elkhart Lake (PCH) 0x4b23 32 hard yes yes yes + * Tiger Lake-LP (PCH) 0xa0a3 32 hard yes yes yes + * Tiger Lake-H (PCH) 0x43a3 32 hard yes yes yes + * Jasper Lake (SOC) 0x4da3 32 hard yes yes yes + * Comet Lake-V (PCH) 0xa3a3 32 hard yes yes yes + * Alder Lake-S (PCH) 0x7aa3 32 hard yes yes yes + * + * Features supported by this driver: + * Software PEC no + * Hardware PEC yes + * Block buffer yes + * Block process call transaction yes + * I2C block read transaction yes (doesn't use the block buffer) + * Slave mode no + * SMBus Host Notify yes + * Interrupt processing yes + * + * See the file Documentation/i2c/busses/i2c-i801.rst for details. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#ifndef I2C_CLASS_SPD +#define I2C_CLASS_SPD 0 +#endif + +#if IS_ENABLED(CONFIG_I2C_MUX_GPIO) && defined CONFIG_DMI +#include +#include +#endif + +#define mem_clear(data, size) memset((data), 0, (size)) + +/* I801 SMBus address offsets */ +#define SMBHSTSTS(p) (0 + (p)->smba) +#define SMBHSTCNT(p) (2 + (p)->smba) +#define SMBHSTCMD(p) (3 + (p)->smba) +#define SMBHSTADD(p) (4 + (p)->smba) +#define SMBHSTDAT0(p) (5 + (p)->smba) +#define SMBHSTDAT1(p) (6 + (p)->smba) +#define SMBBLKDAT(p) (7 + (p)->smba) +#define SMBPEC(p) (8 + (p)->smba) /* ICH3 and later */ +#define SMBAUXSTS(p) (12 + (p)->smba) /* ICH4 and later */ +#define SMBAUXCTL(p) (13 + (p)->smba) /* ICH4 and later */ +#define SMBSLVSTS(p) (16 + (p)->smba) /* ICH3 and later */ +#define SMBSLVCMD(p) (17 + (p)->smba) /* ICH3 and later */ +#define SMBNTFDADD(p) (20 + (p)->smba) /* ICH3 and later */ +#define SMBPINCTL(p) (15 + (p)->smba) /* SMBus Pin Control Register */ + +/* PCI Address Constants */ +#define SMBBAR 4 +#define SMBPCICTL 0x004 +#define SMBPCISTS 0x006 +#define SMBHSTCFG 0x040 +#define TCOBASE 0x050 +#define TCOCTL 0x054 + +#define SBREG_BAR 0x10 +#define SBREG_SMBCTRL 0xc6000c +#define SBREG_SMBCTRL_DNV 0xcf000c + +/* Host status bits for SMBPCISTS */ +#define SMBPCISTS_INTS BIT(3) + +/* Control bits for SMBPCICTL */ +#define SMBPCICTL_INTDIS BIT(10) + +/* Host configuration bits for SMBHSTCFG */ +#define SMBHSTCFG_HST_EN BIT(0) +#define SMBHSTCFG_SMB_SMI_EN BIT(1) +#define SMBHSTCFG_I2C_EN BIT(2) +#define SMBHSTCFG_SSRESET BIT(3) +#define SSRESET_SLEEP_TIME 1 /* 1us */ +#define SSRESET_RETRY_TIME (1000 / SSRESET_SLEEP_TIME) + +/* Pin status for SMBPINCTL */ +#define SMBPINCTL_CLK_STS 1 /* bit0 SMBCLK_CUR_STS*/ +#define SMBPINCTL_SDA_STS 2 /* bit1 SMBDATA_CUR_STS*/ +#define SMBPINCTL_CLK_CTL 4 /* bit2 SMBCLK_CTL */ + +#define SMBHSTCFG_SPD_WD BIT(4) + +/* TCO configuration bits for TCOCTL */ +#define TCOCTL_EN BIT(8) + +/* Auxiliary status register bits, ICH4+ only */ +#define SMBAUXSTS_CRCE BIT(0) +#define SMBAUXSTS_STCO BIT(1) + +/* Auxiliary control register bits, ICH4+ only */ +#define SMBAUXCTL_CRC BIT(0) +#define SMBAUXCTL_E32B BIT(1) + +/* Other settings */ +#define MAX_RETRIES 400 + +/* I801 command constants */ +#define I801_QUICK 0x00 +#define I801_BYTE 0x04 +#define I801_BYTE_DATA 0x08 +#define I801_WORD_DATA 0x0C +#define I801_PROC_CALL 0x10 /* unimplemented */ +#define I801_BLOCK_DATA 0x14 +#define I801_I2C_BLOCK_DATA 0x18 /* ICH5 and later */ +#define I801_BLOCK_PROC_CALL 0x1C + +/* I801 Host Control register bits */ +#define SMBHSTCNT_INTREN BIT(0) +#define SMBHSTCNT_KILL BIT(1) +#define SMBHSTCNT_LAST_BYTE BIT(5) +#define SMBHSTCNT_START BIT(6) +#define SMBHSTCNT_PEC_EN BIT(7) /* ICH3 and later */ + +/* I801 Hosts Status register bits */ +#define SMBHSTSTS_BYTE_DONE BIT(7) +#define SMBHSTSTS_INUSE_STS BIT(6) +#define SMBHSTSTS_SMBALERT_STS BIT(5) +#define SMBHSTSTS_FAILED BIT(4) +#define SMBHSTSTS_BUS_ERR BIT(3) +#define SMBHSTSTS_DEV_ERR BIT(2) +#define SMBHSTSTS_INTR BIT(1) +#define SMBHSTSTS_HOST_BUSY BIT(0) + +/* Host Notify Status register bits */ +#define SMBSLVSTS_HST_NTFY_STS BIT(0) + +/* Host Notify Command register bits */ +#define SMBSLVCMD_HST_NTFY_INTREN BIT(0) + +#define STATUS_ERROR_FLAGS (SMBHSTSTS_FAILED | SMBHSTSTS_BUS_ERR | \ + SMBHSTSTS_DEV_ERR) + +#define STATUS_FLAGS (SMBHSTSTS_BYTE_DONE | SMBHSTSTS_INTR | \ + STATUS_ERROR_FLAGS) + +/* Older devices have their ID defined in */ +#define PCI_DEVICE_ID_INTEL_COMETLAKE_SMBUS 0x02a3 +#define PCI_DEVICE_ID_INTEL_COMETLAKE_H_SMBUS 0x06a3 +#define PCI_DEVICE_ID_INTEL_BAYTRAIL_SMBUS 0x0f12 +#define PCI_DEVICE_ID_INTEL_CDF_SMBUS 0x18df +#define PCI_DEVICE_ID_INTEL_DNV_SMBUS 0x19df +#define PCI_DEVICE_ID_INTEL_EBG_SMBUS 0x1bc9 +#define PCI_DEVICE_ID_INTEL_COUGARPOINT_SMBUS 0x1c22 +#define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS 0x1d22 +/* Patsburg also has three 'Integrated Device Function' SMBus controllers */ +#define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF0 0x1d70 +#define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF1 0x1d71 +#define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF2 0x1d72 +#define PCI_DEVICE_ID_INTEL_PANTHERPOINT_SMBUS 0x1e22 +#define PCI_DEVICE_ID_INTEL_AVOTON_SMBUS 0x1f3c +#define PCI_DEVICE_ID_INTEL_BRASWELL_SMBUS 0x2292 +#define PCI_DEVICE_ID_INTEL_DH89XXCC_SMBUS 0x2330 +#define PCI_DEVICE_ID_INTEL_COLETOCREEK_SMBUS 0x23b0 +#define PCI_DEVICE_ID_INTEL_GEMINILAKE_SMBUS 0x31d4 +#define PCI_DEVICE_ID_INTEL_ICELAKE_LP_SMBUS 0x34a3 +#define PCI_DEVICE_ID_INTEL_5_3400_SERIES_SMBUS 0x3b30 +#define PCI_DEVICE_ID_INTEL_TIGERLAKE_H_SMBUS 0x43a3 +#define PCI_DEVICE_ID_INTEL_ELKHART_LAKE_SMBUS 0x4b23 +#define PCI_DEVICE_ID_INTEL_JASPER_LAKE_SMBUS 0x4da3 +#define PCI_DEVICE_ID_INTEL_BROXTON_SMBUS 0x5ad4 +#define PCI_DEVICE_ID_INTEL_ALDER_LAKE_S_SMBUS 0x7aa3 +#define PCI_DEVICE_ID_INTEL_LYNXPOINT_SMBUS 0x8c22 +#define PCI_DEVICE_ID_INTEL_WILDCATPOINT_SMBUS 0x8ca2 +#define PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS 0x8d22 +#define PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS0 0x8d7d +#define PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS1 0x8d7e +#define PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS2 0x8d7f +#define PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_SMBUS 0x9c22 +#define PCI_DEVICE_ID_INTEL_WILDCATPOINT_LP_SMBUS 0x9ca2 +#define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_SMBUS 0x9d23 +#define PCI_DEVICE_ID_INTEL_CANNONLAKE_LP_SMBUS 0x9da3 +#define PCI_DEVICE_ID_INTEL_TIGERLAKE_LP_SMBUS 0xa0a3 +#define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_H_SMBUS 0xa123 +#define PCI_DEVICE_ID_INTEL_LEWISBURG_SMBUS 0xa1a3 +#define PCI_DEVICE_ID_INTEL_LEWISBURG_SSKU_SMBUS 0xa223 +#define PCI_DEVICE_ID_INTEL_KABYLAKE_PCH_H_SMBUS 0xa2a3 +#define PCI_DEVICE_ID_INTEL_CANNONLAKE_H_SMBUS 0xa323 +#define PCI_DEVICE_ID_INTEL_COMETLAKE_V_SMBUS 0xa3a3 + +struct i801_mux_config { + char *gpio_chip; + unsigned values[3]; + int n_values; + unsigned classes[3]; + unsigned gpios[2]; /* Relative to gpio_chip->base */ + int n_gpios; +}; + +struct i801_priv { + struct i2c_adapter adapter; + unsigned long smba; + unsigned char original_hstcfg; + unsigned char original_slvcmd; + struct pci_dev *pci_dev; + unsigned int features; + + /* isr processing */ + wait_queue_head_t waitq; + u8 status; + + /* Command state used by isr for byte-by-byte block transactions */ + u8 cmd; + bool is_read; + int count; + int len; + u8 *data; + +#if IS_ENABLED(CONFIG_I2C_MUX_GPIO) && defined CONFIG_DMI + const struct i801_mux_config *mux_drvdata; + struct platform_device *mux_pdev; + struct gpiod_lookup_table *lookup; +#endif + struct platform_device *tco_pdev; + + /* + * If set to true the host controller registers are reserved for + * ACPI AML use. Protected by acpi_lock. + */ + bool acpi_reserved; + struct mutex acpi_lock; +}; + +#define FEATURE_SMBUS_PEC BIT(0) +#define FEATURE_BLOCK_BUFFER BIT(1) +#define FEATURE_BLOCK_PROC BIT(2) +#define FEATURE_I2C_BLOCK_READ BIT(3) +#define FEATURE_IRQ BIT(4) +#define FEATURE_HOST_NOTIFY BIT(5) +/* Not really a feature, but it's convenient to handle it as such */ +#define FEATURE_IDF BIT(15) +#define FEATURE_TCO_SPT BIT(16) +#define FEATURE_TCO_CNL BIT(17) + +static const char *i801_feature_names[] = { + "SMBus PEC", + "Block buffer", + "Block process call", + "I2C block read", + "Interrupt", + "SMBus Host Notify", +}; + +static unsigned int disable_features; +module_param(disable_features, uint, S_IRUGO | S_IWUSR); +MODULE_PARM_DESC(disable_features, "Disable selected driver features:\n" + "\t\t 0x01 disable SMBus PEC\n" + "\t\t 0x02 disable the block buffer\n" + "\t\t 0x08 disable the I2C block read functionality\n" + "\t\t 0x10 don't use interrupts\n" + "\t\t 0x20 disable SMBus Host Notify "); + +static void i801_setscl(struct i801_priv *priv, unsigned int level) +{ + int pin_status; + pin_status = inb_p(SMBPINCTL(priv)); + if (level == 0) { + pin_status &= (~SMBPINCTL_CLK_CTL); + } + else { + pin_status |= SMBPINCTL_CLK_CTL; + } + outb_p(pin_status, SMBPINCTL(priv)); + return; +} + +static void i801_i2c_unblock(struct i801_priv *priv) +{ + int i; + for (i = 0; i < 10; i++) { + i801_setscl(priv, 0); + udelay(5); + i801_setscl(priv, 1); + udelay(5); + } + return; +} + +static int i801_check_i2c_unblock(struct i801_priv *priv) +{ + int pin_status; + + pin_status = inb_p(SMBPINCTL(priv)); + if ( (!(pin_status & SMBPINCTL_SDA_STS) ) && (pin_status & SMBPINCTL_CLK_STS) ) { + dev_dbg(&priv->pci_dev->dev, "SDA is low, send 9 clock to device!\n"); + i801_i2c_unblock(priv); + } + return 0; +} + +static void i801_do_reset(struct i801_priv *priv) +{ + unsigned char tmp; + unsigned int retry_count = 0; + + pci_read_config_byte(priv->pci_dev, SMBHSTCFG, &tmp); + tmp |= SMBHSTCFG_SSRESET; + pci_write_config_byte(priv->pci_dev, SMBHSTCFG, tmp); + pci_read_config_byte(priv->pci_dev, SMBHSTCFG, &tmp); + + while( ((tmp & SMBHSTCFG_SSRESET) != 0) && (retry_count < SSRESET_RETRY_TIME)) { + usleep_range(SSRESET_SLEEP_TIME, SSRESET_SLEEP_TIME + 1); + retry_count++; + pci_read_config_byte(priv->pci_dev, SMBHSTCFG, &tmp); + } + + return ; +} + +static int i801_check_i2c_scl(struct i801_priv *priv) +{ + int pin_status; + + pin_status = inb_p(SMBPINCTL(priv)); + if ( (pin_status & SMBPINCTL_SDA_STS) && (pin_status & SMBPINCTL_CLK_STS) ) { + return 0; + } + + dev_dbg(&priv->pci_dev->dev, "SDA or SCL is low, begin to reset SMBus adapter, pin_status: 0x%x\n",pin_status); + i801_do_reset(priv); + pin_status = inb_p(SMBPINCTL(priv)); + if ( (pin_status & SMBPINCTL_SDA_STS) && (pin_status & SMBPINCTL_CLK_STS) ) { + return 0; + } + dev_warn(&priv->pci_dev->dev, "SDA or SCL is low.pin_status:0x%x\n",pin_status); + return -1; +} + +/* Make sure the SMBus host is ready to start transmitting. + Return 0 if it is, -EBUSY if it is not. */ +static int i801_check_pre(struct i801_priv *priv) +{ + int status; + + i801_check_i2c_unblock(priv); + + if (i801_check_i2c_scl(priv)) { + return -EIO; + } + + status = inb_p(SMBHSTSTS(priv)); + if (status & SMBHSTSTS_HOST_BUSY) { + dev_dbg(&priv->pci_dev->dev, "SMBus is busy, begin to reset SMBus adapter!\n"); + + i801_do_reset(priv); + + status = inb_p(SMBHSTSTS(priv)); + if (status & SMBHSTSTS_HOST_BUSY) { + dev_err(&priv->pci_dev->dev, "SMBus is busy, can't use it!\n"); + return -EBUSY; + } + } + + status &= STATUS_FLAGS; + if (status) { + dev_dbg(&priv->pci_dev->dev, "Clearing status flags (%02x)\n", + status); + outb_p(status, SMBHSTSTS(priv)); + status = inb_p(SMBHSTSTS(priv)) & STATUS_FLAGS; + if (status) { + dev_err(&priv->pci_dev->dev, + "Failed clearing status flags (%02x)\n", + status); + return -EBUSY; + } + } + + /* + * Clear CRC status if needed. + * During normal operation, i801_check_post() takes care + * of it after every operation. We do it here only in case + * the hardware was already in this state when the driver + * started. + */ + if (priv->features & FEATURE_SMBUS_PEC) { + status = inb_p(SMBAUXSTS(priv)) & SMBAUXSTS_CRCE; + if (status) { + dev_dbg(&priv->pci_dev->dev, + "Clearing aux status flags (%02x)\n", status); + outb_p(status, SMBAUXSTS(priv)); + status = inb_p(SMBAUXSTS(priv)) & SMBAUXSTS_CRCE; + if (status) { + dev_err(&priv->pci_dev->dev, + "Failed clearing aux status flags (%02x)\n", + status); + return -EBUSY; + } + } + } + + return 0; +} + +/* + * Convert the status register to an error code, and clear it. + * Note that status only contains the bits we want to clear, not the + * actual register value. + */ +static int i801_check_post(struct i801_priv *priv, int status) +{ + int result = 0; + + /* + * If the SMBus is still busy, we give up + * Note: This timeout condition only happens when using polling + * transactions. For interrupt operation, NAK/timeout is indicated by + * DEV_ERR. + */ + if (unlikely(status < 0)) { + dev_err(&priv->pci_dev->dev, "Transaction timeout\n"); + /* try to stop the current command */ + dev_dbg(&priv->pci_dev->dev, "Terminating the current operation\n"); + outb_p(SMBHSTCNT_KILL, SMBHSTCNT(priv)); + usleep_range(1000, 2000); + outb_p(0, SMBHSTCNT(priv)); + + /* Check if it worked */ + status = inb_p(SMBHSTSTS(priv)); + if ((status & SMBHSTSTS_HOST_BUSY) || + !(status & SMBHSTSTS_FAILED)) + dev_err(&priv->pci_dev->dev, + "Failed terminating the transaction\n"); + outb_p(STATUS_FLAGS, SMBHSTSTS(priv)); + return -ETIMEDOUT; + } + + if (status & SMBHSTSTS_FAILED) { + result = -EIO; + dev_err(&priv->pci_dev->dev, "Transaction failed\n"); + } + if (status & SMBHSTSTS_DEV_ERR) { + /* + * This may be a PEC error, check and clear it. + * + * AUXSTS is handled differently from HSTSTS. + * For HSTSTS, i801_isr() or i801_wait_intr() + * has already cleared the error bits in hardware, + * and we are passed a copy of the original value + * in "status". + * For AUXSTS, the hardware register is left + * for us to handle here. + * This is asymmetric, slightly iffy, but safe, + * since all this code is serialized and the CRCE + * bit is harmless as long as it's cleared before + * the next operation. + */ + if ((priv->features & FEATURE_SMBUS_PEC) && + (inb_p(SMBAUXSTS(priv)) & SMBAUXSTS_CRCE)) { + outb_p(SMBAUXSTS_CRCE, SMBAUXSTS(priv)); + result = -EBADMSG; + dev_dbg(&priv->pci_dev->dev, "PEC error\n"); + } else { + result = -ENXIO; + dev_dbg(&priv->pci_dev->dev, "No response\n"); + } + } + if (status & SMBHSTSTS_BUS_ERR) { + result = -EAGAIN; + dev_dbg(&priv->pci_dev->dev, "Lost arbitration\n"); + } + + /* Clear status flags except BYTE_DONE, to be cleared by caller */ + outb_p(status, SMBHSTSTS(priv)); + + return result; +} + +/* Wait for BUSY being cleared and either INTR or an error flag being set */ +static int i801_wait_intr(struct i801_priv *priv) +{ + int timeout = 0; + int status; + + /* We will always wait for a fraction of a second! */ + do { + usleep_range(250, 500); + status = inb_p(SMBHSTSTS(priv)); + } while (((status & SMBHSTSTS_HOST_BUSY) || + !(status & (STATUS_ERROR_FLAGS | SMBHSTSTS_INTR))) && + (timeout++ < MAX_RETRIES)); + + if (timeout > MAX_RETRIES) { + dev_dbg(&priv->pci_dev->dev, "INTR Timeout!\n"); + return -ETIMEDOUT; + } + return status & (STATUS_ERROR_FLAGS | SMBHSTSTS_INTR); +} + +/* Wait for either BYTE_DONE or an error flag being set */ +static int i801_wait_byte_done(struct i801_priv *priv) +{ + int timeout = 0; + int status; + + /* We will always wait for a fraction of a second! */ + do { + usleep_range(250, 500); + status = inb_p(SMBHSTSTS(priv)); + } while (!(status & (STATUS_ERROR_FLAGS | SMBHSTSTS_BYTE_DONE)) && + (timeout++ < MAX_RETRIES)); + + if (timeout > MAX_RETRIES) { + dev_dbg(&priv->pci_dev->dev, "BYTE_DONE Timeout!\n"); + return -ETIMEDOUT; + } + return status & STATUS_ERROR_FLAGS; +} + +static int i801_transaction(struct i801_priv *priv, int xact) +{ + int status; + int result; + const struct i2c_adapter *adap = &priv->adapter; + + result = i801_check_pre(priv); + if (result < 0) + return result; + + if (priv->features & FEATURE_IRQ) { + outb_p(xact | SMBHSTCNT_INTREN | SMBHSTCNT_START, + SMBHSTCNT(priv)); + result = wait_event_timeout(priv->waitq, + (status = priv->status), + adap->timeout); + if (!result) { + status = -ETIMEDOUT; + dev_warn(&priv->pci_dev->dev, + "Timeout waiting for interrupt!\n"); + } + priv->status = 0; + return i801_check_post(priv, status); + } + + /* the current contents of SMBHSTCNT can be overwritten, since PEC, + * SMBSCMD are passed in xact */ + outb_p(xact | SMBHSTCNT_START, SMBHSTCNT(priv)); + + status = i801_wait_intr(priv); + return i801_check_post(priv, status); +} + +static int i801_block_transaction_by_block(struct i801_priv *priv, + union i2c_smbus_data *data, + char read_write, int command, + int hwpec) +{ + int i, len; + int status; + int xact = hwpec ? SMBHSTCNT_PEC_EN : 0; + + switch (command) { + case I2C_SMBUS_BLOCK_PROC_CALL: + xact |= I801_BLOCK_PROC_CALL; + break; + case I2C_SMBUS_BLOCK_DATA: + xact |= I801_BLOCK_DATA; + break; + default: + return -EOPNOTSUPP; + } + + inb_p(SMBHSTCNT(priv)); /* reset the data buffer index */ + + /* Use 32-byte buffer to process this transaction */ + if (read_write == I2C_SMBUS_WRITE) { + len = data->block[0]; + outb_p(len, SMBHSTDAT0(priv)); + for (i = 0; i < len; i++) + outb_p(data->block[i+1], SMBBLKDAT(priv)); + } + + status = i801_transaction(priv, xact); + if (status) + return status; + + if (read_write == I2C_SMBUS_READ || + command == I2C_SMBUS_BLOCK_PROC_CALL) { + len = inb_p(SMBHSTDAT0(priv)); + if (len < 1 || len > I2C_SMBUS_BLOCK_MAX) + return -EPROTO; + + data->block[0] = len; + for (i = 0; i < len; i++) + data->block[i + 1] = inb_p(SMBBLKDAT(priv)); + } + return 0; +} + +static void i801_isr_byte_done(struct i801_priv *priv) +{ + if (priv->is_read) { + /* For SMBus block reads, length is received with first byte */ + if (((priv->cmd & 0x1c) == I801_BLOCK_DATA) && + (priv->count == 0)) { + priv->len = inb_p(SMBHSTDAT0(priv)); + if (priv->len < 1 || priv->len > I2C_SMBUS_BLOCK_MAX) { + dev_err(&priv->pci_dev->dev, + "Illegal SMBus block read size %d\n", + priv->len); + /* FIXME: Recover */ + priv->len = I2C_SMBUS_BLOCK_MAX; + } else { + dev_dbg(&priv->pci_dev->dev, + "SMBus block read size is %d\n", + priv->len); + } + priv->data[-1] = priv->len; + } + + /* Read next byte */ + if (priv->count < priv->len) + priv->data[priv->count++] = inb(SMBBLKDAT(priv)); + else + dev_dbg(&priv->pci_dev->dev, + "Discarding extra byte on block read\n"); + + /* Set LAST_BYTE for last byte of read transaction */ + if (priv->count == priv->len - 1) + outb_p(priv->cmd | SMBHSTCNT_LAST_BYTE, + SMBHSTCNT(priv)); + } else if (priv->count < priv->len - 1) { + /* Write next byte, except for IRQ after last byte */ + outb_p(priv->data[++priv->count], SMBBLKDAT(priv)); + } + + /* Clear BYTE_DONE to continue with next byte */ + outb_p(SMBHSTSTS_BYTE_DONE, SMBHSTSTS(priv)); +} + +static irqreturn_t i801_host_notify_isr(struct i801_priv *priv) +{ + unsigned short addr; + + addr = inb_p(SMBNTFDADD(priv)) >> 1; + + /* + * With the tested platforms, reading SMBNTFDDAT (22 + (p)->smba) + * always returns 0. Our current implementation doesn't provide + * data, so we just ignore it. + */ + i2c_handle_smbus_host_notify(&priv->adapter, addr); + + /* clear Host Notify bit and return */ + outb_p(SMBSLVSTS_HST_NTFY_STS, SMBSLVSTS(priv)); + return IRQ_HANDLED; +} + +/* + * There are three kinds of interrupts: + * + * 1) i801 signals transaction completion with one of these interrupts: + * INTR - Success + * DEV_ERR - Invalid command, NAK or communication timeout + * BUS_ERR - SMI# transaction collision + * FAILED - transaction was canceled due to a KILL request + * When any of these occur, update ->status and wake up the waitq. + * ->status must be cleared before kicking off the next transaction. + * + * 2) For byte-by-byte (I2C read/write) transactions, one BYTE_DONE interrupt + * occurs for each byte of a byte-by-byte to prepare the next byte. + * + * 3) Host Notify interrupts + */ +static irqreturn_t i801_isr(int irq, void *dev_id) +{ + struct i801_priv *priv = dev_id; + u16 pcists; + u8 status; + + /* Confirm this is our interrupt */ + pci_read_config_word(priv->pci_dev, SMBPCISTS, &pcists); + if (!(pcists & SMBPCISTS_INTS)) + return IRQ_NONE; + + if (priv->features & FEATURE_HOST_NOTIFY) { + status = inb_p(SMBSLVSTS(priv)); + if (status & SMBSLVSTS_HST_NTFY_STS) + return i801_host_notify_isr(priv); + } + + status = inb_p(SMBHSTSTS(priv)); + if (status & SMBHSTSTS_BYTE_DONE) + i801_isr_byte_done(priv); + + /* + * Clear irq sources and report transaction result. + * ->status must be cleared before the next transaction is started. + */ + status &= SMBHSTSTS_INTR | STATUS_ERROR_FLAGS; + if (status) { + outb_p(status, SMBHSTSTS(priv)); + priv->status = status; + wake_up(&priv->waitq); + } + + return IRQ_HANDLED; +} + +/* + * For "byte-by-byte" block transactions: + * I2C write uses cmd=I801_BLOCK_DATA, I2C_EN=1 + * I2C read uses cmd=I801_I2C_BLOCK_DATA + */ +static int i801_block_transaction_byte_by_byte(struct i801_priv *priv, + union i2c_smbus_data *data, + char read_write, int command, + int hwpec) +{ + int i, len; + int smbcmd; + int status; + int result; + const struct i2c_adapter *adap = &priv->adapter; + + if (command == I2C_SMBUS_BLOCK_PROC_CALL) + return -EOPNOTSUPP; + + result = i801_check_pre(priv); + if (result < 0) + return result; + + len = data->block[0]; + + if (read_write == I2C_SMBUS_WRITE) { + outb_p(len, SMBHSTDAT0(priv)); + outb_p(data->block[1], SMBBLKDAT(priv)); + } + + if (command == I2C_SMBUS_I2C_BLOCK_DATA && + read_write == I2C_SMBUS_READ) + smbcmd = I801_I2C_BLOCK_DATA; + else + smbcmd = I801_BLOCK_DATA; + + if (priv->features & FEATURE_IRQ) { + priv->is_read = (read_write == I2C_SMBUS_READ); + if (len == 1 && priv->is_read) + smbcmd |= SMBHSTCNT_LAST_BYTE; + priv->cmd = smbcmd | SMBHSTCNT_INTREN; + priv->len = len; + priv->count = 0; + priv->data = &data->block[1]; + + outb_p(priv->cmd | SMBHSTCNT_START, SMBHSTCNT(priv)); + result = wait_event_timeout(priv->waitq, + (status = priv->status), + adap->timeout); + if (!result) { + status = -ETIMEDOUT; + dev_warn(&priv->pci_dev->dev, + "Timeout waiting for interrupt!\n"); + } + priv->status = 0; + return i801_check_post(priv, status); + } + + for (i = 1; i <= len; i++) { + if (i == len && read_write == I2C_SMBUS_READ) + smbcmd |= SMBHSTCNT_LAST_BYTE; + outb_p(smbcmd, SMBHSTCNT(priv)); + + if (i == 1) + outb_p(inb(SMBHSTCNT(priv)) | SMBHSTCNT_START, + SMBHSTCNT(priv)); + + status = i801_wait_byte_done(priv); + if (status) + goto exit; + + if (i == 1 && read_write == I2C_SMBUS_READ + && command != I2C_SMBUS_I2C_BLOCK_DATA) { + len = inb_p(SMBHSTDAT0(priv)); + if (len < 1 || len > I2C_SMBUS_BLOCK_MAX) { + dev_err(&priv->pci_dev->dev, + "Illegal SMBus block read size %d\n", + len); + /* Recover */ + while (inb_p(SMBHSTSTS(priv)) & + SMBHSTSTS_HOST_BUSY) + outb_p(SMBHSTSTS_BYTE_DONE, + SMBHSTSTS(priv)); + outb_p(SMBHSTSTS_INTR, SMBHSTSTS(priv)); + return -EPROTO; + } + data->block[0] = len; + } + + /* Retrieve/store value in SMBBLKDAT */ + if (read_write == I2C_SMBUS_READ) + data->block[i] = inb_p(SMBBLKDAT(priv)); + if (read_write == I2C_SMBUS_WRITE && i+1 <= len) + outb_p(data->block[i+1], SMBBLKDAT(priv)); + + /* signals SMBBLKDAT ready */ + outb_p(SMBHSTSTS_BYTE_DONE, SMBHSTSTS(priv)); + } + + status = i801_wait_intr(priv); +exit: + return i801_check_post(priv, status); +} + +static int i801_set_block_buffer_mode(struct i801_priv *priv) +{ + outb_p(inb_p(SMBAUXCTL(priv)) | SMBAUXCTL_E32B, SMBAUXCTL(priv)); + if ((inb_p(SMBAUXCTL(priv)) & SMBAUXCTL_E32B) == 0) + return -EIO; + return 0; +} + +/* Block transaction function */ +static int i801_block_transaction(struct i801_priv *priv, + union i2c_smbus_data *data, char read_write, + int command, int hwpec) +{ + int result = 0; + unsigned char hostc; + + if (read_write == I2C_SMBUS_READ && command == I2C_SMBUS_BLOCK_DATA) + data->block[0] = I2C_SMBUS_BLOCK_MAX; + else if (data->block[0] < 1 || data->block[0] > I2C_SMBUS_BLOCK_MAX) + return -EPROTO; + + if (command == I2C_SMBUS_I2C_BLOCK_DATA) { + if (read_write == I2C_SMBUS_WRITE) { + /* set I2C_EN bit in configuration register */ + pci_read_config_byte(priv->pci_dev, SMBHSTCFG, &hostc); + pci_write_config_byte(priv->pci_dev, SMBHSTCFG, + hostc | SMBHSTCFG_I2C_EN); + } else if (!(priv->features & FEATURE_I2C_BLOCK_READ)) { + dev_err(&priv->pci_dev->dev, + "I2C block read is unsupported!\n"); + return -EOPNOTSUPP; + } + } + + /* Experience has shown that the block buffer can only be used for + SMBus (not I2C) block transactions, even though the datasheet + doesn't mention this limitation. */ + if ((priv->features & FEATURE_BLOCK_BUFFER) + && command != I2C_SMBUS_I2C_BLOCK_DATA + && i801_set_block_buffer_mode(priv) == 0) + result = i801_block_transaction_by_block(priv, data, + read_write, + command, hwpec); + else + result = i801_block_transaction_byte_by_byte(priv, data, + read_write, + command, hwpec); + + if (command == I2C_SMBUS_I2C_BLOCK_DATA + && read_write == I2C_SMBUS_WRITE) { + /* restore saved configuration register value */ + pci_write_config_byte(priv->pci_dev, SMBHSTCFG, hostc); + } + return result; +} + +/* Return negative errno on error. */ +static s32 i801_access(struct i2c_adapter *adap, u16 addr, + unsigned short flags, char read_write, u8 command, + int size, union i2c_smbus_data *data) +{ + int hwpec; + int block = 0; + int ret = 0, xact = 0; + struct i801_priv *priv = i2c_get_adapdata(adap); + + mutex_lock(&priv->acpi_lock); + if (priv->acpi_reserved) { + mutex_unlock(&priv->acpi_lock); + return -EBUSY; + } + + pm_runtime_get_sync(&priv->pci_dev->dev); + + hwpec = (priv->features & FEATURE_SMBUS_PEC) && (flags & I2C_CLIENT_PEC) + && size != I2C_SMBUS_QUICK + && size != I2C_SMBUS_I2C_BLOCK_DATA; + + switch (size) { + case I2C_SMBUS_QUICK: + outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), + SMBHSTADD(priv)); + xact = I801_QUICK; + break; + case I2C_SMBUS_BYTE: + outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), + SMBHSTADD(priv)); + if (read_write == I2C_SMBUS_WRITE) + outb_p(command, SMBHSTCMD(priv)); + xact = I801_BYTE; + break; + case I2C_SMBUS_BYTE_DATA: + outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), + SMBHSTADD(priv)); + outb_p(command, SMBHSTCMD(priv)); + if (read_write == I2C_SMBUS_WRITE) + outb_p(data->byte, SMBHSTDAT0(priv)); + xact = I801_BYTE_DATA; + break; + case I2C_SMBUS_WORD_DATA: + outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), + SMBHSTADD(priv)); + outb_p(command, SMBHSTCMD(priv)); + if (read_write == I2C_SMBUS_WRITE) { + outb_p(data->word & 0xff, SMBHSTDAT0(priv)); + outb_p((data->word & 0xff00) >> 8, SMBHSTDAT1(priv)); + } + xact = I801_WORD_DATA; + break; + case I2C_SMBUS_BLOCK_DATA: + outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), + SMBHSTADD(priv)); + outb_p(command, SMBHSTCMD(priv)); + block = 1; + break; + case I2C_SMBUS_I2C_BLOCK_DATA: + /* + * NB: page 240 of ICH5 datasheet shows that the R/#W + * bit should be cleared here, even when reading. + * However if SPD Write Disable is set (Lynx Point and later), + * the read will fail if we don't set the R/#W bit. + */ + outb_p(((addr & 0x7f) << 1) | + ((priv->original_hstcfg & SMBHSTCFG_SPD_WD) ? + (read_write & 0x01) : 0), + SMBHSTADD(priv)); + if (read_write == I2C_SMBUS_READ) { + /* NB: page 240 of ICH5 datasheet also shows + * that DATA1 is the cmd field when reading */ + outb_p(command, SMBHSTDAT1(priv)); + } else + outb_p(command, SMBHSTCMD(priv)); + block = 1; + break; + case I2C_SMBUS_BLOCK_PROC_CALL: + /* + * Bit 0 of the slave address register always indicate a write + * command. + */ + outb_p((addr & 0x7f) << 1, SMBHSTADD(priv)); + outb_p(command, SMBHSTCMD(priv)); + block = 1; + break; + default: + dev_err(&priv->pci_dev->dev, "Unsupported transaction %d\n", + size); + ret = -EOPNOTSUPP; + goto out; + } + + if (hwpec) /* enable/disable hardware PEC */ + outb_p(inb_p(SMBAUXCTL(priv)) | SMBAUXCTL_CRC, SMBAUXCTL(priv)); + else + outb_p(inb_p(SMBAUXCTL(priv)) & (~SMBAUXCTL_CRC), + SMBAUXCTL(priv)); + + if (block) + ret = i801_block_transaction(priv, data, read_write, size, + hwpec); + else + ret = i801_transaction(priv, xact); + + /* Some BIOSes don't like it when PEC is enabled at reboot or resume + time, so we forcibly disable it after every transaction. Turn off + E32B for the same reason. */ + if (hwpec || block) + outb_p(inb_p(SMBAUXCTL(priv)) & + ~(SMBAUXCTL_CRC | SMBAUXCTL_E32B), SMBAUXCTL(priv)); + + if (block) + goto out; + if (ret) + goto out; + if ((read_write == I2C_SMBUS_WRITE) || (xact == I801_QUICK)) + goto out; + + switch (xact & 0x7f) { + case I801_BYTE: /* Result put in SMBHSTDAT0 */ + case I801_BYTE_DATA: + data->byte = inb_p(SMBHSTDAT0(priv)); + break; + case I801_WORD_DATA: + data->word = inb_p(SMBHSTDAT0(priv)) + + (inb_p(SMBHSTDAT1(priv)) << 8); + break; + } + +out: + /* Unlock the SMBus device for use by BIOS/ACPI */ + outb_p(SMBHSTSTS_INUSE_STS, SMBHSTSTS(priv)); + + pm_runtime_mark_last_busy(&priv->pci_dev->dev); + pm_runtime_put_autosuspend(&priv->pci_dev->dev); + mutex_unlock(&priv->acpi_lock); + return ret; +} + +static u32 i801_func(struct i2c_adapter *adapter) +{ + struct i801_priv *priv = i2c_get_adapdata(adapter); + + return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE | + I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA | + I2C_FUNC_SMBUS_BLOCK_DATA | I2C_FUNC_SMBUS_WRITE_I2C_BLOCK | + ((priv->features & FEATURE_SMBUS_PEC) ? I2C_FUNC_SMBUS_PEC : 0) | + ((priv->features & FEATURE_BLOCK_PROC) ? + I2C_FUNC_SMBUS_BLOCK_PROC_CALL : 0) | + ((priv->features & FEATURE_I2C_BLOCK_READ) ? + I2C_FUNC_SMBUS_READ_I2C_BLOCK : 0) | + ((priv->features & FEATURE_HOST_NOTIFY) ? + I2C_FUNC_SMBUS_HOST_NOTIFY : 0); +} + +static void i801_enable_host_notify(struct i2c_adapter *adapter) +{ + struct i801_priv *priv = i2c_get_adapdata(adapter); + + if (!(priv->features & FEATURE_HOST_NOTIFY)) + return; + + if (!(SMBSLVCMD_HST_NTFY_INTREN & priv->original_slvcmd)) + outb_p(SMBSLVCMD_HST_NTFY_INTREN | priv->original_slvcmd, + SMBSLVCMD(priv)); + + /* clear Host Notify bit to allow a new notification */ + outb_p(SMBSLVSTS_HST_NTFY_STS, SMBSLVSTS(priv)); +} + +static void i801_disable_host_notify(struct i801_priv *priv) +{ + if (!(priv->features & FEATURE_HOST_NOTIFY)) + return; + + outb_p(priv->original_slvcmd, SMBSLVCMD(priv)); +} + +static const struct i2c_algorithm smbus_algorithm = { + .smbus_xfer = i801_access, + .functionality = i801_func, +}; + +static const struct pci_device_id i801_ids[] = { + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AA_3) }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AB_3) }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801BA_2) }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801CA_3) }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801DB_3) }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801EB_3) }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB_4) }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH6_16) }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7_17) }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB2_17) }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH8_5) }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH9_6) }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_EP80579_1) }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH10_4) }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH10_5) }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_5_3400_SERIES_SMBUS) }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_COUGARPOINT_SMBUS) }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS) }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF0) }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF1) }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF2) }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_DH89XXCC_SMBUS) }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PANTHERPOINT_SMBUS) }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_LYNXPOINT_SMBUS) }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_SMBUS) }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_AVOTON_SMBUS) }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS) }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS0) }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS1) }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS2) }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_COLETOCREEK_SMBUS) }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_GEMINILAKE_SMBUS) }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WILDCATPOINT_SMBUS) }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WILDCATPOINT_LP_SMBUS) }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BAYTRAIL_SMBUS) }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BRASWELL_SMBUS) }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SUNRISEPOINT_H_SMBUS) }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_SMBUS) }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CDF_SMBUS) }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_DNV_SMBUS) }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_EBG_SMBUS) }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BROXTON_SMBUS) }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_LEWISBURG_SMBUS) }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_LEWISBURG_SSKU_SMBUS) }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_KABYLAKE_PCH_H_SMBUS) }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CANNONLAKE_H_SMBUS) }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CANNONLAKE_LP_SMBUS) }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICELAKE_LP_SMBUS) }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_COMETLAKE_SMBUS) }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_COMETLAKE_H_SMBUS) }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_COMETLAKE_V_SMBUS) }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ELKHART_LAKE_SMBUS) }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TIGERLAKE_LP_SMBUS) }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TIGERLAKE_H_SMBUS) }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_JASPER_LAKE_SMBUS) }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ALDER_LAKE_S_SMBUS) }, + { 0, } +}; + +MODULE_DEVICE_TABLE(pci, i801_ids); + +#if defined CONFIG_X86 && defined CONFIG_DMI +static unsigned char apanel_addr; + +/* Scan the system ROM for the signature "FJKEYINF" */ +static __init const void __iomem *bios_signature(const void __iomem *bios) +{ + ssize_t offset; + const unsigned char signature[] = "FJKEYINF"; + + for (offset = 0; offset < 0x10000; offset += 0x10) { + if (check_signature(bios + offset, signature, + sizeof(signature)-1)) + return bios + offset; + } + return NULL; +} + +static void __init input_apanel_init(void) +{ + void __iomem *bios; + const void __iomem *p; + + bios = ioremap(0xF0000, 0x10000); /* Can't fail */ + p = bios_signature(bios); + if (p) { + /* just use the first address */ + apanel_addr = readb(p + 8 + 3) >> 1; + } + iounmap(bios); +} + +struct dmi_onboard_device_info { + const char *name; + u8 type; + unsigned short i2c_addr; + const char *i2c_type; +}; + +static const struct dmi_onboard_device_info dmi_devices[] = { + { "Syleus", DMI_DEV_TYPE_OTHER, 0x73, "fscsyl" }, + { "Hermes", DMI_DEV_TYPE_OTHER, 0x73, "fscher" }, + { "Hades", DMI_DEV_TYPE_OTHER, 0x73, "fschds" }, +}; + +static void dmi_check_onboard_device(u8 type, const char *name, + struct i2c_adapter *adap) +{ + int i; + struct i2c_board_info info; + + for (i = 0; i < ARRAY_SIZE(dmi_devices); i++) { + /* & ~0x80, ignore enabled/disabled bit */ + if ((type & ~0x80) != dmi_devices[i].type) + continue; + if (strcasecmp(name, dmi_devices[i].name)) + continue; + + mem_clear(&info, sizeof(struct i2c_board_info)); + info.addr = dmi_devices[i].i2c_addr; + strscpy(info.type, dmi_devices[i].i2c_type, I2C_NAME_SIZE); + i2c_new_client_device(adap, &info); + break; + } +} + +/* We use our own function to check for onboard devices instead of + dmi_find_device() as some buggy BIOS's have the devices we are interested + in marked as disabled */ +static void dmi_check_onboard_devices(const struct dmi_header *dm, void *adap) +{ + int i, count; + + if (dm->type != 10) + return; + + count = (dm->length - sizeof(struct dmi_header)) / 2; + for (i = 0; i < count; i++) { + const u8 *d = (char *)(dm + 1) + (i * 2); + const char *name = ((char *) dm) + dm->length; + u8 type = d[0]; + u8 s = d[1]; + + if (!s) + continue; + s--; + while (s > 0 && name[0]) { + name += strlen(name) + 1; + s--; + } + if (name[0] == 0) /* Bogus string reference */ + continue; + + dmi_check_onboard_device(type, name, adap); + } +} + +/* NOTE: Keep this list in sync with drivers/platform/x86/dell-smo8800.c */ +static const char *const acpi_smo8800_ids[] = { + "SMO8800", + "SMO8801", + "SMO8810", + "SMO8811", + "SMO8820", + "SMO8821", + "SMO8830", + "SMO8831", +}; + +static acpi_status check_acpi_smo88xx_device(acpi_handle obj_handle, + u32 nesting_level, + void *context, + void **return_value) +{ + struct acpi_device_info *info; + acpi_status status; + char *hid; + int i; + + status = acpi_get_object_info(obj_handle, &info); + if (ACPI_FAILURE(status)) + return AE_OK; + + if (!(info->valid & ACPI_VALID_HID)) + goto smo88xx_not_found; + + hid = info->hardware_id.string; + if (!hid) + goto smo88xx_not_found; + + i = match_string(acpi_smo8800_ids, ARRAY_SIZE(acpi_smo8800_ids), hid); + if (i < 0) + goto smo88xx_not_found; + + kfree(info); + + *((bool *)return_value) = true; + return AE_CTRL_TERMINATE; + +smo88xx_not_found: + kfree(info); + return AE_OK; +} + +static bool is_dell_system_with_lis3lv02d(void) +{ + bool found; + const char *vendor; + + vendor = dmi_get_system_info(DMI_SYS_VENDOR); + if (!vendor || strcmp(vendor, "Dell Inc.")) + return false; + + /* + * Check that ACPI device SMO88xx is present and is functioning. + * Function acpi_get_devices() already filters all ACPI devices + * which are not present or are not functioning. + * ACPI device SMO88xx represents our ST microelectronics lis3lv02d + * accelerometer but unfortunately ACPI does not provide any other + * information (like I2C address). + */ + found = false; + acpi_get_devices(NULL, check_acpi_smo88xx_device, NULL, + (void **)&found); + + return found; +} + +/* + * Accelerometer's I2C address is not specified in DMI nor ACPI, + * so it is needed to define mapping table based on DMI product names. + */ +static const struct { + const char *dmi_product_name; + unsigned short i2c_addr; +} dell_lis3lv02d_devices[] = { + /* + * Dell platform team told us that these Latitude devices have + * ST microelectronics accelerometer at I2C address 0x29. + */ + { "Latitude E5250", 0x29 }, + { "Latitude E5450", 0x29 }, + { "Latitude E5550", 0x29 }, + { "Latitude E6440", 0x29 }, + { "Latitude E6440 ATG", 0x29 }, + { "Latitude E6540", 0x29 }, + /* + * Additional individual entries were added after verification. + */ + { "Latitude 5480", 0x29 }, + { "Vostro V131", 0x1d }, +}; + +static void register_dell_lis3lv02d_i2c_device(struct i801_priv *priv) +{ + struct i2c_board_info info; + const char *dmi_product_name; + int i; + + dmi_product_name = dmi_get_system_info(DMI_PRODUCT_NAME); + for (i = 0; i < ARRAY_SIZE(dell_lis3lv02d_devices); ++i) { + if (strcmp(dmi_product_name, + dell_lis3lv02d_devices[i].dmi_product_name) == 0) + break; + } + + if (i == ARRAY_SIZE(dell_lis3lv02d_devices)) { + dev_warn(&priv->pci_dev->dev, + "Accelerometer lis3lv02d is present on SMBus but its" + " address is unknown, skipping registration\n"); + return; + } + + mem_clear(&info, sizeof(struct i2c_board_info)); + info.addr = dell_lis3lv02d_devices[i].i2c_addr; + strscpy(info.type, "lis3lv02d", I2C_NAME_SIZE); + i2c_new_client_device(&priv->adapter, &info); +} + +/* Register optional slaves */ +static void i801_probe_optional_slaves(struct i801_priv *priv) +{ + /* Only register slaves on main SMBus channel */ + if (priv->features & FEATURE_IDF) + return; + + if (apanel_addr) { + struct i2c_board_info info; + + mem_clear(&info, sizeof(struct i2c_board_info)); + info.addr = apanel_addr; + strscpy(info.type, "fujitsu_apanel", I2C_NAME_SIZE); + i2c_new_client_device(&priv->adapter, &info); + } + + if (dmi_name_in_vendors("FUJITSU")) + dmi_walk(dmi_check_onboard_devices, &priv->adapter); + + if (is_dell_system_with_lis3lv02d()) + register_dell_lis3lv02d_i2c_device(priv); + + /* Instantiate SPD EEPROMs unless the SMBus is multiplexed */ +#if IS_ENABLED(CONFIG_I2C_MUX_GPIO) + if (!priv->mux_drvdata) +#endif + i2c_register_spd(&priv->adapter); +} +#else +static void __init input_apanel_init(void) {} +static void i801_probe_optional_slaves(struct i801_priv *priv) {} +#endif /* CONFIG_X86 && CONFIG_DMI */ + +#if IS_ENABLED(CONFIG_I2C_MUX_GPIO) && defined CONFIG_DMI +static struct i801_mux_config i801_mux_config_asus_z8_d12 = { + .gpio_chip = "gpio_ich", + .values = { 0x02, 0x03 }, + .n_values = 2, + .classes = { I2C_CLASS_SPD, I2C_CLASS_SPD }, + .gpios = { 52, 53 }, + .n_gpios = 2, +}; + +static struct i801_mux_config i801_mux_config_asus_z8_d18 = { + .gpio_chip = "gpio_ich", + .values = { 0x02, 0x03, 0x01 }, + .n_values = 3, + .classes = { I2C_CLASS_SPD, I2C_CLASS_SPD, I2C_CLASS_SPD }, + .gpios = { 52, 53 }, + .n_gpios = 2, +}; + +static const struct dmi_system_id mux_dmi_table[] = { + { + .matches = { + DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."), + DMI_MATCH(DMI_BOARD_NAME, "Z8NA-D6(C)"), + }, + .driver_data = &i801_mux_config_asus_z8_d12, + }, + { + .matches = { + DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."), + DMI_MATCH(DMI_BOARD_NAME, "Z8P(N)E-D12(X)"), + }, + .driver_data = &i801_mux_config_asus_z8_d12, + }, + { + .matches = { + DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."), + DMI_MATCH(DMI_BOARD_NAME, "Z8NH-D12"), + }, + .driver_data = &i801_mux_config_asus_z8_d12, + }, + { + .matches = { + DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."), + DMI_MATCH(DMI_BOARD_NAME, "Z8PH-D12/IFB"), + }, + .driver_data = &i801_mux_config_asus_z8_d12, + }, + { + .matches = { + DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."), + DMI_MATCH(DMI_BOARD_NAME, "Z8NR-D12"), + }, + .driver_data = &i801_mux_config_asus_z8_d12, + }, + { + .matches = { + DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."), + DMI_MATCH(DMI_BOARD_NAME, "Z8P(N)H-D12"), + }, + .driver_data = &i801_mux_config_asus_z8_d12, + }, + { + .matches = { + DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."), + DMI_MATCH(DMI_BOARD_NAME, "Z8PG-D18"), + }, + .driver_data = &i801_mux_config_asus_z8_d18, + }, + { + .matches = { + DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."), + DMI_MATCH(DMI_BOARD_NAME, "Z8PE-D18"), + }, + .driver_data = &i801_mux_config_asus_z8_d18, + }, + { + .matches = { + DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."), + DMI_MATCH(DMI_BOARD_NAME, "Z8PS-D12"), + }, + .driver_data = &i801_mux_config_asus_z8_d12, + }, + { } +}; + +/* Setup multiplexing if needed */ +static int i801_add_mux(struct i801_priv *priv) +{ + struct device *dev = &priv->adapter.dev; + const struct i801_mux_config *mux_config; + struct i2c_mux_gpio_platform_data gpio_data; + struct gpiod_lookup_table *lookup; + int err, i; + + if (!priv->mux_drvdata) + return 0; + mux_config = priv->mux_drvdata; + + /* Prepare the platform data */ + mem_clear(&gpio_data, sizeof(struct i2c_mux_gpio_platform_data)); + gpio_data.parent = priv->adapter.nr; + gpio_data.values = mux_config->values; + gpio_data.n_values = mux_config->n_values; +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 10, 0) + gpio_data.classes = mux_config->classes; +#endif + gpio_data.idle = I2C_MUX_GPIO_NO_IDLE; + + /* Register GPIO descriptor lookup table */ + lookup = devm_kzalloc(dev, + struct_size(lookup, table, mux_config->n_gpios + 1), + GFP_KERNEL); + if (!lookup) + return -ENOMEM; + lookup->dev_id = "i2c-mux-gpio"; + for (i = 0; i < mux_config->n_gpios; i++) { + lookup->table[i] = (struct gpiod_lookup) + GPIO_LOOKUP(mux_config->gpio_chip, + mux_config->gpios[i], "mux", 0); + } + gpiod_add_lookup_table(lookup); + priv->lookup = lookup; + + /* + * Register the mux device, we use PLATFORM_DEVID_NONE here + * because since we are referring to the GPIO chip by name we are + * anyways in deep trouble if there is more than one of these + * devices, and there should likely only be one platform controller + * hub. + */ + priv->mux_pdev = platform_device_register_data(dev, "i2c-mux-gpio", + PLATFORM_DEVID_NONE, &gpio_data, + sizeof(struct i2c_mux_gpio_platform_data)); + if (IS_ERR(priv->mux_pdev)) { + err = PTR_ERR(priv->mux_pdev); + gpiod_remove_lookup_table(lookup); + priv->mux_pdev = NULL; + dev_err(dev, "Failed to register i2c-mux-gpio device\n"); + return err; + } + + return 0; +} + +static void i801_del_mux(struct i801_priv *priv) +{ + if (priv->mux_pdev) + platform_device_unregister(priv->mux_pdev); + if (priv->lookup) + gpiod_remove_lookup_table(priv->lookup); +} + +static unsigned int i801_get_adapter_class(struct i801_priv *priv) +{ + const struct dmi_system_id *id; + const struct i801_mux_config *mux_config; + unsigned int class = I2C_CLASS_HWMON | I2C_CLASS_SPD; + int i; + + id = dmi_first_match(mux_dmi_table); + if (id) { + /* Remove branch classes from trunk */ + mux_config = id->driver_data; + for (i = 0; i < mux_config->n_values; i++) + class &= ~mux_config->classes[i]; + + /* Remember for later */ + priv->mux_drvdata = mux_config; + } + + return class; +} +#else +static inline int i801_add_mux(struct i801_priv *priv) { return 0; } +static inline void i801_del_mux(struct i801_priv *priv) { } + +static inline unsigned int i801_get_adapter_class(struct i801_priv *priv) +{ + return I2C_CLASS_HWMON | I2C_CLASS_SPD; +} +#endif + +static const struct itco_wdt_platform_data spt_tco_platform_data = { + .name = "Intel PCH", + .version = 4, +}; + +static DEFINE_SPINLOCK(p2sb_spinlock); + +static struct platform_device * +i801_add_tco_spt(struct i801_priv *priv, struct pci_dev *pci_dev, + struct resource *tco_res) +{ + struct resource *res; + unsigned int devfn; + u64 base64_addr; + u32 base_addr; + u8 hidden; + + /* + * We must access the NO_REBOOT bit over the Primary to Sideband + * bridge (P2SB). The BIOS prevents the P2SB device from being + * enumerated by the PCI subsystem, so we need to unhide/hide it + * to lookup the P2SB BAR. + */ + spin_lock(&p2sb_spinlock); + + devfn = PCI_DEVFN(PCI_SLOT(pci_dev->devfn), 1); + + /* Unhide the P2SB device, if it is hidden */ + pci_bus_read_config_byte(pci_dev->bus, devfn, 0xe1, &hidden); + if (hidden) + pci_bus_write_config_byte(pci_dev->bus, devfn, 0xe1, 0x0); + + pci_bus_read_config_dword(pci_dev->bus, devfn, SBREG_BAR, &base_addr); + base64_addr = base_addr & 0xfffffff0; + + pci_bus_read_config_dword(pci_dev->bus, devfn, SBREG_BAR + 0x4, &base_addr); + base64_addr |= (u64)base_addr << 32; + + /* Hide the P2SB device, if it was hidden before */ + if (hidden) + pci_bus_write_config_byte(pci_dev->bus, devfn, 0xe1, hidden); + spin_unlock(&p2sb_spinlock); + + res = &tco_res[1]; + if (pci_dev->device == PCI_DEVICE_ID_INTEL_DNV_SMBUS) + res->start = (resource_size_t)base64_addr + SBREG_SMBCTRL_DNV; + else + res->start = (resource_size_t)base64_addr + SBREG_SMBCTRL; + + res->end = res->start + 3; + res->flags = IORESOURCE_MEM; + + return platform_device_register_resndata(&pci_dev->dev, "iTCO_wdt", -1, + tco_res, 2, &spt_tco_platform_data, + sizeof(spt_tco_platform_data)); +} + +static const struct itco_wdt_platform_data cnl_tco_platform_data = { + .name = "Intel PCH", + .version = 6, +}; + +static struct platform_device * +i801_add_tco_cnl(struct i801_priv *priv, struct pci_dev *pci_dev, + struct resource *tco_res) +{ + return platform_device_register_resndata(&pci_dev->dev, + "iTCO_wdt", -1, tco_res, 1, &cnl_tco_platform_data, + sizeof(cnl_tco_platform_data)); +} + +static void i801_add_tco(struct i801_priv *priv) +{ + struct pci_dev *pci_dev = priv->pci_dev; + struct resource tco_res[2], *res; + u32 tco_base, tco_ctl; + + /* If we have ACPI based watchdog use that instead */ + if (acpi_has_watchdog()) + return; + + if (!(priv->features & (FEATURE_TCO_SPT | FEATURE_TCO_CNL))) + return; + + pci_read_config_dword(pci_dev, TCOBASE, &tco_base); + pci_read_config_dword(pci_dev, TCOCTL, &tco_ctl); + if (!(tco_ctl & TCOCTL_EN)) + return; + + mem_clear(tco_res, sizeof(tco_res)); + /* + * Always populate the main iTCO IO resource here. The second entry + * for NO_REBOOT MMIO is filled by the SPT specific function. + */ + res = &tco_res[0]; + res->start = tco_base & ~1; + res->end = res->start + 32 - 1; + res->flags = IORESOURCE_IO; + + if (priv->features & FEATURE_TCO_CNL) + priv->tco_pdev = i801_add_tco_cnl(priv, pci_dev, tco_res); + else + priv->tco_pdev = i801_add_tco_spt(priv, pci_dev, tco_res); + + if (IS_ERR(priv->tco_pdev)) + dev_warn(&pci_dev->dev, "failed to create iTCO device\n"); +} + +#ifdef CONFIG_ACPI +static bool i801_acpi_is_smbus_ioport(const struct i801_priv *priv, + acpi_physical_address address) +{ + return address >= priv->smba && + address <= pci_resource_end(priv->pci_dev, SMBBAR); +} + +static acpi_status +i801_acpi_io_handler(u32 function, acpi_physical_address address, u32 bits, + u64 *value, void *handler_context, void *region_context) +{ + struct i801_priv *priv = handler_context; + struct pci_dev *pdev = priv->pci_dev; + acpi_status status; + + /* + * Once BIOS AML code touches the OpRegion we warn and inhibit any + * further access from the driver itself. This device is now owned + * by the system firmware. + */ + mutex_lock(&priv->acpi_lock); + + if (!priv->acpi_reserved && i801_acpi_is_smbus_ioport(priv, address)) { + priv->acpi_reserved = true; + + dev_warn(&pdev->dev, "BIOS is accessing SMBus registers\n"); + dev_warn(&pdev->dev, "Driver SMBus register access inhibited\n"); + + /* + * BIOS is accessing the host controller so prevent it from + * suspending automatically from now on. + */ + pm_runtime_get_sync(&pdev->dev); + } + + if ((function & ACPI_IO_MASK) == ACPI_READ) + status = acpi_os_read_port(address, (u32 *)value, bits); + else + status = acpi_os_write_port(address, (u32)*value, bits); + + mutex_unlock(&priv->acpi_lock); + + return status; +} + +static int i801_acpi_probe(struct i801_priv *priv) +{ + struct acpi_device *adev; + acpi_status status; + + adev = ACPI_COMPANION(&priv->pci_dev->dev); + if (adev) { + status = acpi_install_address_space_handler(adev->handle, + ACPI_ADR_SPACE_SYSTEM_IO, i801_acpi_io_handler, + NULL, priv); + if (ACPI_SUCCESS(status)) + return 0; + } + + return acpi_check_resource_conflict(&priv->pci_dev->resource[SMBBAR]); +} + +static void i801_acpi_remove(struct i801_priv *priv) +{ + struct acpi_device *adev; + + adev = ACPI_COMPANION(&priv->pci_dev->dev); + if (!adev) + return; + + acpi_remove_address_space_handler(adev->handle, + ACPI_ADR_SPACE_SYSTEM_IO, i801_acpi_io_handler); + + mutex_lock(&priv->acpi_lock); + if (priv->acpi_reserved) + pm_runtime_put(&priv->pci_dev->dev); + mutex_unlock(&priv->acpi_lock); +} +#else +static inline int i801_acpi_probe(struct i801_priv *priv) { return 0; } +static inline void i801_acpi_remove(struct i801_priv *priv) { } +#endif + +static unsigned char i801_setup_hstcfg(struct i801_priv *priv) +{ + unsigned char hstcfg = priv->original_hstcfg; + + hstcfg &= ~SMBHSTCFG_I2C_EN; /* SMBus timing */ + hstcfg |= SMBHSTCFG_HST_EN; + pci_write_config_byte(priv->pci_dev, SMBHSTCFG, hstcfg); + return hstcfg; +} + +static int i801_probe(struct pci_dev *dev, const struct pci_device_id *id) +{ + unsigned char temp; + int err, i; + struct i801_priv *priv; + + priv = devm_kzalloc(&dev->dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + i2c_set_adapdata(&priv->adapter, priv); + priv->adapter.owner = THIS_MODULE; + priv->adapter.class = i801_get_adapter_class(priv); + priv->adapter.algo = &smbus_algorithm; + priv->adapter.dev.parent = &dev->dev; + ACPI_COMPANION_SET(&priv->adapter.dev, ACPI_COMPANION(&dev->dev)); + priv->adapter.retries = 3; + mutex_init(&priv->acpi_lock); + + priv->pci_dev = dev; + switch (dev->device) { + case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_H_SMBUS: + case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_SMBUS: + case PCI_DEVICE_ID_INTEL_LEWISBURG_SMBUS: + case PCI_DEVICE_ID_INTEL_LEWISBURG_SSKU_SMBUS: + case PCI_DEVICE_ID_INTEL_DNV_SMBUS: + case PCI_DEVICE_ID_INTEL_KABYLAKE_PCH_H_SMBUS: + case PCI_DEVICE_ID_INTEL_COMETLAKE_V_SMBUS: + priv->features |= FEATURE_BLOCK_PROC; + priv->features |= FEATURE_I2C_BLOCK_READ; + priv->features |= FEATURE_IRQ; + priv->features |= FEATURE_SMBUS_PEC; + priv->features |= FEATURE_BLOCK_BUFFER; + priv->features |= FEATURE_TCO_SPT; + priv->features |= FEATURE_HOST_NOTIFY; + break; + + case PCI_DEVICE_ID_INTEL_CANNONLAKE_H_SMBUS: + case PCI_DEVICE_ID_INTEL_CANNONLAKE_LP_SMBUS: + case PCI_DEVICE_ID_INTEL_CDF_SMBUS: + case PCI_DEVICE_ID_INTEL_ICELAKE_LP_SMBUS: + case PCI_DEVICE_ID_INTEL_COMETLAKE_SMBUS: + case PCI_DEVICE_ID_INTEL_COMETLAKE_H_SMBUS: + case PCI_DEVICE_ID_INTEL_ELKHART_LAKE_SMBUS: + case PCI_DEVICE_ID_INTEL_TIGERLAKE_LP_SMBUS: + case PCI_DEVICE_ID_INTEL_TIGERLAKE_H_SMBUS: + case PCI_DEVICE_ID_INTEL_JASPER_LAKE_SMBUS: + case PCI_DEVICE_ID_INTEL_EBG_SMBUS: + case PCI_DEVICE_ID_INTEL_ALDER_LAKE_S_SMBUS: + priv->features |= FEATURE_BLOCK_PROC; + priv->features |= FEATURE_I2C_BLOCK_READ; + priv->features |= FEATURE_IRQ; + priv->features |= FEATURE_SMBUS_PEC; + priv->features |= FEATURE_BLOCK_BUFFER; + priv->features |= FEATURE_TCO_CNL; + priv->features |= FEATURE_HOST_NOTIFY; + break; + + case PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF0: + case PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF1: + case PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF2: + case PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS0: + case PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS1: + case PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS2: + priv->features |= FEATURE_IDF; + fallthrough; + default: + priv->features |= FEATURE_BLOCK_PROC; + priv->features |= FEATURE_I2C_BLOCK_READ; + priv->features |= FEATURE_IRQ; + fallthrough; + case PCI_DEVICE_ID_INTEL_82801DB_3: + priv->features |= FEATURE_SMBUS_PEC; + priv->features |= FEATURE_BLOCK_BUFFER; + fallthrough; + case PCI_DEVICE_ID_INTEL_82801CA_3: + priv->features |= FEATURE_HOST_NOTIFY; + fallthrough; + case PCI_DEVICE_ID_INTEL_82801BA_2: + case PCI_DEVICE_ID_INTEL_82801AB_3: + case PCI_DEVICE_ID_INTEL_82801AA_3: + break; + } + + /* Disable features on user request */ + for (i = 0; i < ARRAY_SIZE(i801_feature_names); i++) { + if (priv->features & disable_features & (1 << i)) + dev_notice(&dev->dev, "%s disabled by user\n", + i801_feature_names[i]); + } + priv->features &= ~disable_features; + + err = pcim_enable_device(dev); + if (err) { + dev_err(&dev->dev, "Failed to enable SMBus PCI device (%d)\n", + err); + return err; + } + pcim_pin_device(dev); + + /* Determine the address of the SMBus area */ + priv->smba = pci_resource_start(dev, SMBBAR); + if (!priv->smba) { + dev_err(&dev->dev, + "SMBus base address uninitialized, upgrade BIOS\n"); + return -ENODEV; + } + + if (i801_acpi_probe(priv)) + return -ENODEV; + + err = pcim_iomap_regions(dev, 1 << SMBBAR, + dev_driver_string(&dev->dev)); + if (err) { + dev_err(&dev->dev, + "Failed to request SMBus region 0x%lx-0x%Lx\n", + priv->smba, + (unsigned long long)pci_resource_end(dev, SMBBAR)); + i801_acpi_remove(priv); + return err; + } + + pci_read_config_byte(priv->pci_dev, SMBHSTCFG, &priv->original_hstcfg); + temp = i801_setup_hstcfg(priv); + if (!(priv->original_hstcfg & SMBHSTCFG_HST_EN)) + dev_info(&dev->dev, "Enabling SMBus device\n"); + + if (temp & SMBHSTCFG_SMB_SMI_EN) { + dev_dbg(&dev->dev, "SMBus using interrupt SMI#\n"); + /* Disable SMBus interrupt feature if SMBus using SMI# */ + priv->features &= ~FEATURE_IRQ; + } + if (temp & SMBHSTCFG_SPD_WD) + dev_info(&dev->dev, "SPD Write Disable is set\n"); + + /* Clear special mode bits */ + if (priv->features & (FEATURE_SMBUS_PEC | FEATURE_BLOCK_BUFFER)) + outb_p(inb_p(SMBAUXCTL(priv)) & + ~(SMBAUXCTL_CRC | SMBAUXCTL_E32B), SMBAUXCTL(priv)); + + /* Remember original Host Notify setting */ + if (priv->features & FEATURE_HOST_NOTIFY) + priv->original_slvcmd = inb_p(SMBSLVCMD(priv)); + + /* Default timeout in interrupt mode: 200 ms */ + priv->adapter.timeout = HZ / 5; + + if (dev->irq == IRQ_NOTCONNECTED) + priv->features &= ~FEATURE_IRQ; + + if (priv->features & FEATURE_IRQ) { + u16 pcictl, pcists; + + /* Complain if an interrupt is already pending */ + pci_read_config_word(priv->pci_dev, SMBPCISTS, &pcists); + if (pcists & SMBPCISTS_INTS) + dev_warn(&dev->dev, "An interrupt is pending!\n"); + + /* Check if interrupts have been disabled */ + pci_read_config_word(priv->pci_dev, SMBPCICTL, &pcictl); + if (pcictl & SMBPCICTL_INTDIS) { + dev_info(&dev->dev, "Interrupts are disabled\n"); + priv->features &= ~FEATURE_IRQ; + } + } + + if (priv->features & FEATURE_IRQ) { + init_waitqueue_head(&priv->waitq); + + err = devm_request_irq(&dev->dev, dev->irq, i801_isr, + IRQF_SHARED, + dev_driver_string(&dev->dev), priv); + if (err) { + dev_err(&dev->dev, "Failed to allocate irq %d: %d\n", + dev->irq, err); + priv->features &= ~FEATURE_IRQ; + } + } + dev_info(&dev->dev, "SMBus using %s\n", + priv->features & FEATURE_IRQ ? "PCI interrupt" : "polling"); + + i801_add_tco(priv); + + snprintf(priv->adapter.name, sizeof(priv->adapter.name), + "SMBus I801 adapter at %04lx", priv->smba); + err = i2c_add_adapter(&priv->adapter); + if (err) { + i801_acpi_remove(priv); + return err; + } + + i801_enable_host_notify(&priv->adapter); + + i801_probe_optional_slaves(priv); + /* We ignore errors - multiplexing is optional */ + i801_add_mux(priv); + + pci_set_drvdata(dev, priv); + + dev_pm_set_driver_flags(&dev->dev, DPM_FLAG_NO_DIRECT_COMPLETE); + pm_runtime_set_autosuspend_delay(&dev->dev, 1000); + pm_runtime_use_autosuspend(&dev->dev); + pm_runtime_put_autosuspend(&dev->dev); + pm_runtime_allow(&dev->dev); + dev_info(&dev->dev, "wb-i2c-i801 probe ok.\n"); + + return 0; +} + +static void i801_remove(struct pci_dev *dev) +{ + struct i801_priv *priv = pci_get_drvdata(dev); + + pm_runtime_forbid(&dev->dev); + pm_runtime_get_noresume(&dev->dev); + + i801_disable_host_notify(priv); + i801_del_mux(priv); + i2c_del_adapter(&priv->adapter); + i801_acpi_remove(priv); + pci_write_config_byte(dev, SMBHSTCFG, priv->original_hstcfg); + + platform_device_unregister(priv->tco_pdev); + + /* + * do not call pci_disable_device(dev) since it can cause hard hangs on + * some systems during power-off (eg. Fujitsu-Siemens Lifebook E8010) + */ +} + +static void i801_shutdown(struct pci_dev *dev) +{ + struct i801_priv *priv = pci_get_drvdata(dev); + + /* Restore config registers to avoid hard hang on some systems */ + i801_disable_host_notify(priv); + pci_write_config_byte(dev, SMBHSTCFG, priv->original_hstcfg); +} + +#ifdef CONFIG_PM_SLEEP +static int i801_suspend(struct device *dev) +{ + struct i801_priv *priv = dev_get_drvdata(dev); + + pci_write_config_byte(priv->pci_dev, SMBHSTCFG, priv->original_hstcfg); + return 0; +} + +static int i801_resume(struct device *dev) +{ + struct i801_priv *priv = dev_get_drvdata(dev); + + i801_setup_hstcfg(priv); + i801_enable_host_notify(&priv->adapter); + + return 0; +} +#endif + +static SIMPLE_DEV_PM_OPS(i801_pm_ops, i801_suspend, i801_resume); + +static struct pci_driver i801_driver = { + .name = "wb_i801_smbus", + .id_table = i801_ids, + .probe = i801_probe, + .remove = i801_remove, + .shutdown = i801_shutdown, + .driver = { + .pm = &i801_pm_ops, + }, +}; + +static int __init i2c_i801_init(void) +{ + if (dmi_name_in_vendors("FUJITSU")) + input_apanel_init(); + return pci_register_driver(&i801_driver); +} + +static void __exit i2c_i801_exit(void) +{ + pci_unregister_driver(&i801_driver); +} + +MODULE_AUTHOR("support"); +MODULE_DESCRIPTION("I801 SMBus driver"); +MODULE_LICENSE("GPL"); + +module_init(i2c_i801_init); +module_exit(i2c_i801_exit); diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_mux_pca954x.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_mux_pca954x.c index 5c7c566ed4f..b9e3f8cee84 100644 --- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_mux_pca954x.c +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_mux_pca954x.c @@ -656,20 +656,20 @@ static int pca954x_do_gpio_reset(struct i2c_mux_core *muxc) } /* reset on */ - __gpio_set_value(gpio_attr->gpio, gpio_attr->reset_on); + gpio_set_value(gpio_attr->gpio, gpio_attr->reset_on); if (reset_cfg->rst_delay) { usleep_range(reset_cfg->rst_delay, reset_cfg->rst_delay + 1); } /* reset off */ - __gpio_set_value(gpio_attr->gpio, gpio_attr->reset_off); + gpio_set_value(gpio_attr->gpio, gpio_attr->reset_off); ret = -1; udelay_cnt = 0; timeout = reset_cfg->rst_delay_a; while (timeout > 0) { usleep_range(1, 2); - val = __gpio_get_value(gpio_attr->gpio); + val = gpio_get_value(gpio_attr->gpio); if (val == gpio_attr->reset_off) { ret = 0; PCA954X_DEBUG("pca954x_do_gpio_reset success.\n"); @@ -1186,18 +1186,27 @@ static int pca954x_reset_data_init(struct pca954x *data) /* * I2C init/probing/exit functions */ -static int pca954x_probe(struct i2c_client *client, - const struct i2c_device_id *id) +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) +static int pca954x_probe(struct i2c_client *client, const struct i2c_device_id *id) +#else +static int pca954x_probe(struct i2c_client *client) +#endif { struct i2c_adapter *adap = to_i2c_adapter(client->dev.parent); struct device_node *of_node = client->dev.of_node; bool idle_disconnect_dt; struct gpio_desc *gpio; - int num, force, class; + int num, force; struct i2c_mux_core *muxc; struct pca954x *data; const struct of_device_id *match; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 3, 0) + const struct i2c_device_id *id; +#endif unsigned int probe_disable; +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 10, 0) + unsigned int class = 0; +#endif int ret, dynamic_nr; i2c_mux_pca954x_device_t *i2c_mux_pca954x_device; @@ -1245,10 +1254,14 @@ static int pca954x_probe(struct i2c_client *client, } match = of_match_device(of_match_ptr(pca954x_of_match), &client->dev); - if (match) + if (match) { data->chip = of_device_get_match_data(&client->dev); - else + } else { + id = i2c_match_id(pca954x_id, client); + if (!id) + return -ENODEV; data->chip = &chips[id->driver_data]; + } data->last_chan = 0; /* force the first selection */ @@ -1313,11 +1326,14 @@ static int pca954x_probe(struct i2c_client *client, force = data->pca9548_cfg_info.pca9548_base_nr + num; } - class = 0; /* no class by default */ data->deselect |= (idle_disconnect_pd || idle_disconnect_dt) << num; +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 10, 0) ret = i2c_mux_add_adapter(muxc, force, num, class); +#else + ret = i2c_mux_add_adapter(muxc, force, num); +#endif if (ret) goto fail_del_adapters; } @@ -1334,7 +1350,11 @@ static int pca954x_probe(struct i2c_client *client, return ret; } +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0) +static int pca954x_remove(struct i2c_client *client) +#else static void pca954x_remove(struct i2c_client *client) +#endif { struct i2c_mux_core *muxc = i2c_get_clientdata(client); struct pca954x *data = i2c_mux_priv(muxc); @@ -1349,7 +1369,11 @@ static void pca954x_remove(struct i2c_client *client) } i2c_mux_del_adapters(muxc); +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0) + return 0; +#else return; +#endif } #ifdef CONFIG_PM_SLEEP diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_mux_pca954x.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_mux_pca954x.h index 700b36e0236..07de1355269 100644 --- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_mux_pca954x.h +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_mux_pca954x.h @@ -67,6 +67,7 @@ typedef struct gpio_attr_s { typedef struct i2c_mux_pca954x_device_s { struct i2c_client *client; + struct i2c_adapter *adap; uint32_t i2c_bus; uint32_t i2c_addr; uint32_t pca9548_base_nr; diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_mux_pca9641.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_mux_pca9641.c index 83b0774ec90..c3c8995dcb7 100644 --- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_mux_pca9641.c +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_mux_pca9641.c @@ -541,19 +541,19 @@ static int pca9641_do_gpio_reset(struct i2c_mux_core *muxc) usleep_range(reset_cfg->rst_delay_b, reset_cfg->rst_delay_b + 1); } - __gpio_set_value(gpio_attr->gpio, gpio_attr->reset_on); + gpio_set_value(gpio_attr->gpio, gpio_attr->reset_on); if (reset_cfg->rst_delay) { usleep_range(reset_cfg->rst_delay, reset_cfg->rst_delay + 1); } - __gpio_set_value(gpio_attr->gpio, gpio_attr->reset_off); + gpio_set_value(gpio_attr->gpio, gpio_attr->reset_off); ret = -1; udelay_cnt = 0; timeout = reset_cfg->rst_delay_a; while (timeout > 0) { usleep_range(1, 2); - val = __gpio_get_value(gpio_attr->gpio); + val = gpio_get_value(gpio_attr->gpio); if (val == gpio_attr->reset_off) { ret = 0; PCA_DEBUG("pca9641_do_gpio_reset success.\n"); @@ -1272,7 +1272,11 @@ static int pca9641_reset_data_init(struct pca9541 *data) /* * I2C init/probing/exit functions */ +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int pca9541_probe(struct i2c_client *client, const struct i2c_device_id *id) +#else +static int pca9541_probe(struct i2c_client *client) +#endif { struct i2c_adapter *adap = client->adapter; struct i2c_mux_core *muxc; @@ -1322,7 +1326,11 @@ static int pca9541_probe(struct i2c_client *client, const struct i2c_device_id * PCA_DEBUG("pca9641_nr: %d.\n", force); } +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 10, 0) ret = i2c_mux_add_adapter(muxc, force, 0, 0); +#else + ret = i2c_mux_add_adapter(muxc, force, 0); +#endif if (ret) return ret; } else { @@ -1375,7 +1383,11 @@ static int pca9541_probe(struct i2c_client *client, const struct i2c_device_id * } } +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 10, 0) ret = i2c_mux_add_adapter(muxc, force, 0, 0); +#else + ret = i2c_mux_add_adapter(muxc, force, 0); +#endif if (ret) { dev_err(&client->dev, "Failed to register master selector.\n"); return ret; @@ -1388,12 +1400,20 @@ static int pca9541_probe(struct i2c_client *client, const struct i2c_device_id * return 0; } +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0) +static int pca9541_remove(struct i2c_client *client) +#else static void pca9541_remove(struct i2c_client *client) +#endif { struct i2c_mux_core *muxc = i2c_get_clientdata(client); i2c_mux_del_adapters(muxc); +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0) + return 0; +#else return; +#endif } static struct i2c_driver pca9641_driver = { diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_ocores.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_ocores.c index 643fc3b605d..6bed15bae3b 100644 --- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_ocores.c +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_ocores.c @@ -37,6 +37,7 @@ #include #include #include +#include #include "wb_i2c_ocores.h" @@ -536,6 +537,7 @@ static int ocores_msg_check(struct i2c_msg *msgs, int num) static void ocores_process(struct ocores_i2c *i2c, u8 stat) { struct i2c_msg *msg = i2c->msg; + u8 val; OCORES_I2C_XFER("Enter nr %d.\n", i2c->adap.nr); if ((i2c->state == STATE_DONE) || (i2c->state == STATE_ERROR)) { @@ -572,7 +574,20 @@ static void ocores_process(struct ocores_i2c *i2c, u8 stat) goto out; } } else { - msg->buf[i2c->pos++] = oc_getreg(i2c, OCI2C_DATA); + val = oc_getreg(i2c, OCI2C_DATA); + msg->buf[i2c->pos++] = val; + /* SMBus block read: first received byte is payload length. */ + if ((i2c->pos == 1) && (msg->flags & I2C_M_RECV_LEN)) { + if ((val <= 0) || (val > I2C_SMBUS_BLOCK_MAX)) { + i2c->state = STATE_ERROR; + oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_STOP); + OCORES_I2C_XFER("invalid SMBus block read len: %d, exit.\n", val); + goto out; + } + msg->len += val; + OCORES_I2C_XFER("SMBus block read len: %d, adjust msg->len to %d.\n", + val, msg->len); + } } /* end of msg? */ @@ -606,8 +621,13 @@ static void ocores_process(struct ocores_i2c *i2c, u8 stat) } if (i2c->state == STATE_READ) { - oc_setreg(i2c, OCI2C_CMD, i2c->pos == (msg->len-1) ? - OCI2C_CMD_READ_NACK : OCI2C_CMD_READ_ACK); + /* For SMBus block read, ACK the first length byte explicitly. */ + if ((i2c->pos == 0) && (msg->flags & I2C_M_RECV_LEN)) { + oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_READ_ACK); + } else { + oc_setreg(i2c, OCI2C_CMD, i2c->pos == (msg->len - 1) ? + OCI2C_CMD_READ_NACK : OCI2C_CMD_READ_ACK); + } } else { oc_setreg(i2c, OCI2C_DATA, msg->buf[i2c->pos++]); oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_WRITE); @@ -870,7 +890,7 @@ static int ocores_init(struct device *dev, struct ocores_i2c *i2c) static u32 ocores_func(struct i2c_adapter *adap) { - return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL; + return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL | I2C_FUNC_SMBUS_BLOCK_DATA; } static const struct i2c_algorithm ocores_algorithm = { @@ -1157,18 +1177,28 @@ static int ocores_i2c_probe(struct platform_device *pdev) return ret; } +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 11, 0) static int ocores_i2c_remove(struct platform_device *pdev) +#else +static void ocores_i2c_remove(struct platform_device *pdev) +#endif { struct ocores_i2c *i2c = platform_get_drvdata(pdev); u8 ctrl = oc_getreg(i2c, OCI2C_CONTROL); + int i2c_bus = i2c->adap.nr; + OCORES_I2C_VERBOSE("Enter ocores_i2c_remove\n"); /* disable i2c logic */ ctrl &= ~(OCI2C_CTRL_EN | OCI2C_CTRL_IEN); oc_setreg(i2c, OCI2C_CONTROL, ctrl); /* remove adapter & data */ + OCORES_I2C_VERBOSE("Starting unregistered i2c-%d.\n", i2c_bus); i2c_del_adapter(&i2c->adap); + dev_info(&pdev->dev, "Unregistered i2c-%d success.\n", i2c_bus); +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 11, 0) return 0; +#endif } static struct platform_driver ocores_i2c_driver = { diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_ina3221.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_ina3221.c new file mode 100644 index 00000000000..2703c228c2d --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_ina3221.c @@ -0,0 +1,1205 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * INA3221 Triple Current/Voltage Monitor + * + * Copyright (C) 2016 Texas Instruments Incorporated - https://www.ti.com/ + * Andrew F. Davis + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define INA3221_DRIVER_NAME "wb_ina3221" + +#define INA3221_CONFIG 0x00 +#define INA3221_SHUNT1 0x01 +#define INA3221_BUS1 0x02 +#define INA3221_SHUNT2 0x03 +#define INA3221_BUS2 0x04 +#define INA3221_SHUNT3 0x05 +#define INA3221_BUS3 0x06 +#define INA3221_CRIT1 0x07 +#define INA3221_WARN1 0x08 +#define INA3221_CRIT2 0x09 +#define INA3221_WARN2 0x0a +#define INA3221_CRIT3 0x0b +#define INA3221_WARN3 0x0c +#define INA3221_SHUNT_SUM 0x0d +#define INA3221_CRIT_SUM 0x0e +#define INA3221_MASK_ENABLE 0x0f +#define INA3221_POWER_UPPER 0x10 +#define INA3221_POWER_LOWER 0x11 + +#define INA3221_CONFIG_MODE_MASK GENMASK(2, 0) +#define INA3221_CONFIG_MODE_POWERDOWN 0 +#define INA3221_CONFIG_MODE_SHUNT BIT(0) +#define INA3221_CONFIG_MODE_BUS BIT(1) +#define INA3221_CONFIG_MODE_CONTINUOUS BIT(2) +#define INA3221_CONFIG_VSH_CT_SHIFT 3 +#define INA3221_CONFIG_VSH_CT_MASK GENMASK(5, 3) +#define INA3221_CONFIG_VSH_CT(x) (((x) & GENMASK(5, 3)) >> 3) +#define INA3221_CONFIG_VBUS_CT_SHIFT 6 +#define INA3221_CONFIG_VBUS_CT_MASK GENMASK(8, 6) +#define INA3221_CONFIG_VBUS_CT(x) (((x) & GENMASK(8, 6)) >> 6) +#define INA3221_CONFIG_AVG_SHIFT 9 +#define INA3221_CONFIG_AVG_MASK GENMASK(11, 9) +#define INA3221_CONFIG_AVG(x) (((x) & GENMASK(11, 9)) >> 9) +#define INA3221_CONFIG_CHs_EN_MASK GENMASK(14, 12) +#define INA3221_CONFIG_CHx_EN(x) BIT(14 - (x)) + +#define INA3221_MASK_ENABLE_SCC_MASK GENMASK(14, 12) + +#define INA3221_CONFIG_DEFAULT 0x7127 +#define INA3221_RSHUNT_DEFAULT 10000 + +#define INA3221_DEFAULT_POWER_UPPER (10000) +#define INA3221_DEFAULT_POWER_LOWER (9000) + +enum ina3221_fields { + /* Configuration */ + F_RST, + + /* Status Flags */ + F_CVRF, + + /* Warning Flags */ + F_WF3, F_WF2, F_WF1, + + /* Alert Flags: SF is the summation-alert flag */ + F_SF, F_CF3, F_CF2, F_CF1, + + /* sentinel */ + F_MAX_FIELDS +}; + +static const struct reg_field ina3221_reg_fields[] = { + [F_RST] = REG_FIELD(INA3221_CONFIG, 15, 15), + + [F_CVRF] = REG_FIELD(INA3221_MASK_ENABLE, 0, 0), + [F_WF3] = REG_FIELD(INA3221_MASK_ENABLE, 3, 3), + [F_WF2] = REG_FIELD(INA3221_MASK_ENABLE, 4, 4), + [F_WF1] = REG_FIELD(INA3221_MASK_ENABLE, 5, 5), + [F_SF] = REG_FIELD(INA3221_MASK_ENABLE, 6, 6), + [F_CF3] = REG_FIELD(INA3221_MASK_ENABLE, 7, 7), + [F_CF2] = REG_FIELD(INA3221_MASK_ENABLE, 8, 8), + [F_CF1] = REG_FIELD(INA3221_MASK_ENABLE, 9, 9), +}; + +enum ina3221_channels { + INA3221_CHANNEL1, + INA3221_CHANNEL2, + INA3221_CHANNEL3, + INA3221_NUM_CHANNELS +}; + +/** + * struct ina3221_input - channel input source specific information + * @label: label of channel input source + * @shunt_resistor: shunt resistor value of channel input source + * @disconnected: connection status of channel input source + */ +struct ina3221_input { + const char *label; + int shunt_resistor; + bool disconnected; +}; + +/** + * struct ina3221_data - device specific information + * @pm_dev: Device pointer for pm runtime + * @regmap: Register map of the device + * @fields: Register fields of the device + * @inputs: Array of channel input source specific structures + * @lock: mutex lock to serialize sysfs attribute accesses + * @reg_config: Register value of INA3221_CONFIG + * @summation_shunt_resistor: equivalent shunt resistor value for summation + * @single_shot: running in single-shot operating mode + * @pv_max: power-valid upper-limit + * @pv_min: power-valid lower-limit + */ +struct ina3221_data { + struct device *pm_dev; + struct regmap *regmap; + struct regmap_field *fields[F_MAX_FIELDS]; + struct ina3221_input inputs[INA3221_NUM_CHANNELS]; + struct mutex lock; + u32 reg_config; + int summation_shunt_resistor; + int pv_max; + int pv_min; + + bool single_shot; +}; + +static inline bool ina3221_is_enabled(struct ina3221_data *ina, int channel) +{ + /* Summation channel checks shunt resistor values */ + if (channel > INA3221_CHANNEL3) + return ina->summation_shunt_resistor != 0; + + return pm_runtime_active(ina->pm_dev) && + (ina->reg_config & INA3221_CONFIG_CHx_EN(channel)); +} + +/** + * Helper function to return the resistor value for current summation. + * + * There is a condition to calculate current summation -- all the shunt + * resistor values should be the same, so as to simply fit the formula: + * current summation = shunt voltage summation / shunt resistor + * + * Returns the equivalent shunt resistor value on success or 0 on failure + */ +static inline int ina3221_summation_shunt_resistor(struct ina3221_data *ina) +{ + struct ina3221_input *input = ina->inputs; + int i, shunt_resistor = 0; + + for (i = 0; i < INA3221_NUM_CHANNELS; i++) { + if (input[i].disconnected || !input[i].shunt_resistor) + continue; + if (!shunt_resistor) { + /* Found the reference shunt resistor value */ + shunt_resistor = input[i].shunt_resistor; + } else { + /* No summation if resistor values are different */ + if (shunt_resistor != input[i].shunt_resistor) + return 0; + } + } + + return shunt_resistor; +} + +/* Lookup table for Bus and Shunt conversion times in usec */ +static const u16 ina3221_conv_time[] = { + 140, 204, 332, 588, 1100, 2116, 4156, 8244, +}; + +/* Lookup table for number of samples using in averaging mode */ +static const int ina3221_avg_samples[] = { + 1, 4, 16, 64, 128, 256, 512, 1024, +}; + +/* Converting update_interval in msec to conversion time in usec */ +static inline u32 ina3221_interval_ms_to_conv_time(u16 config, int interval) +{ + u32 channels = hweight16(config & INA3221_CONFIG_CHs_EN_MASK); + u32 samples_idx = INA3221_CONFIG_AVG(config); + u32 samples = ina3221_avg_samples[samples_idx]; + + /* Bisect the result to Bus and Shunt conversion times */ + return DIV_ROUND_CLOSEST(interval * 1000 / 2, channels * samples); +} + +/* Converting CONFIG register value to update_interval in usec */ +static inline u32 ina3221_reg_to_interval_us(u16 config) +{ + u32 channels = hweight16(config & INA3221_CONFIG_CHs_EN_MASK); + u32 vbus_ct_idx = INA3221_CONFIG_VBUS_CT(config); + u32 vsh_ct_idx = INA3221_CONFIG_VSH_CT(config); + u32 samples_idx = INA3221_CONFIG_AVG(config); + u32 samples = ina3221_avg_samples[samples_idx]; + u32 vbus_ct = ina3221_conv_time[vbus_ct_idx]; + u32 vsh_ct = ina3221_conv_time[vsh_ct_idx]; + + /* Calculate total conversion time */ + return channels * (vbus_ct + vsh_ct) * samples; +} + +static inline int ina3221_wait_for_data(struct ina3221_data *ina) +{ + u32 wait, cvrf; + + wait = ina3221_reg_to_interval_us(ina->reg_config); + + /* Polling the CVRF bit to make sure read data is ready */ + return regmap_field_read_poll_timeout(ina->fields[F_CVRF], + cvrf, cvrf, wait, wait * 2); +} + +static int ina3221_read_value(struct ina3221_data *ina, unsigned int reg, + int *val) +{ + unsigned int regval; + int ret; + + ret = regmap_read(ina->regmap, reg, ®val); + if (ret) + return ret; + + /* + * Shunt Voltage Sum register has 14-bit value with 1-bit shift + * Other Shunt Voltage registers have 12 bits with 3-bit shift + */ + if (reg == INA3221_SHUNT_SUM) + *val = sign_extend32(regval >> 1, 14); + else + *val = sign_extend32(regval >> 3, 12); + + return 0; +} + +static const u8 ina3221_in_reg[] = { + INA3221_BUS1, + INA3221_BUS2, + INA3221_BUS3, + INA3221_SHUNT1, + INA3221_SHUNT2, + INA3221_SHUNT3, + INA3221_SHUNT_SUM, +}; + +static int ina3221_read_chip(struct device *dev, u32 attr, long *val) +{ + struct ina3221_data *ina = dev_get_drvdata(dev); + int regval; + + switch (attr) { + case hwmon_chip_samples: + regval = INA3221_CONFIG_AVG(ina->reg_config); + *val = ina3221_avg_samples[regval]; + return 0; + case hwmon_chip_update_interval: + /* Return in msec */ + *val = ina3221_reg_to_interval_us(ina->reg_config); + *val = DIV_ROUND_CLOSEST(*val, 1000); + return 0; + default: + return -EOPNOTSUPP; + } +} + +static int ina3221_read_in(struct device *dev, u32 attr, int channel, long *val) +{ + const bool is_shunt = channel > INA3221_CHANNEL3; + struct ina3221_data *ina = dev_get_drvdata(dev); + u8 reg = ina3221_in_reg[channel]; + int regval, ret; + + /* + * Translate shunt channel index to sensor channel index except + * the 7th channel (6 since being 0-aligned) is for summation. + */ + if (channel != 6) + channel %= INA3221_NUM_CHANNELS; + + switch (attr) { + case hwmon_in_input: + if (!ina3221_is_enabled(ina, channel)) + return -ENODATA; + + /* Write CONFIG register to trigger a single-shot measurement */ + if (ina->single_shot) + regmap_write(ina->regmap, INA3221_CONFIG, + ina->reg_config); + + ret = ina3221_wait_for_data(ina); + if (ret) + return ret; + + ret = ina3221_read_value(ina, reg, ®val); + if (ret) + return ret; + + /* + * Scale of shunt voltage (uV): LSB is 40uV + * Scale of bus voltage (mV): LSB is 8mV + */ + *val = regval * (is_shunt ? 40 : 8); + return 0; + case hwmon_in_enable: + *val = ina3221_is_enabled(ina, channel); + return 0; + default: + return -EOPNOTSUPP; + } +} + +static const u8 ina3221_curr_reg[][INA3221_NUM_CHANNELS + 1] = { + [hwmon_curr_input] = { INA3221_SHUNT1, INA3221_SHUNT2, + INA3221_SHUNT3, INA3221_SHUNT_SUM }, + [hwmon_curr_max] = { INA3221_WARN1, INA3221_WARN2, INA3221_WARN3, 0 }, + [hwmon_curr_crit] = { INA3221_CRIT1, INA3221_CRIT2, + INA3221_CRIT3, INA3221_CRIT_SUM }, + [hwmon_curr_max_alarm] = { F_WF1, F_WF2, F_WF3, 0 }, + [hwmon_curr_crit_alarm] = { F_CF1, F_CF2, F_CF3, F_SF }, +}; + +static int ina3221_read_curr(struct device *dev, u32 attr, + int channel, long *val) +{ + struct ina3221_data *ina = dev_get_drvdata(dev); + struct ina3221_input *input = ina->inputs; + u8 reg = ina3221_curr_reg[attr][channel]; + int resistance_uo, voltage_nv; + int regval, ret; + + if (channel > INA3221_CHANNEL3) + resistance_uo = ina->summation_shunt_resistor; + else + resistance_uo = input[channel].shunt_resistor; + + switch (attr) { + case hwmon_curr_input: + if (!ina3221_is_enabled(ina, channel)) + return -ENODATA; + + /* Write CONFIG register to trigger a single-shot measurement */ + if (ina->single_shot) + regmap_write(ina->regmap, INA3221_CONFIG, + ina->reg_config); + + ret = ina3221_wait_for_data(ina); + if (ret) + return ret; + + fallthrough; + case hwmon_curr_crit: + case hwmon_curr_max: + if (!resistance_uo) + return -ENODATA; + + ret = ina3221_read_value(ina, reg, ®val); + if (ret) + return ret; + + /* Scale of shunt voltage: LSB is 40uV (40000nV) */ + voltage_nv = regval * 40000; + /* Return current in mA */ + *val = DIV_ROUND_CLOSEST(voltage_nv, resistance_uo); + return 0; + case hwmon_curr_crit_alarm: + case hwmon_curr_max_alarm: + /* No actual register read if channel is disabled */ + if (!ina3221_is_enabled(ina, channel)) { + /* Return 0 for alert flags */ + *val = 0; + return 0; + } + ret = regmap_field_read(ina->fields[reg], ®val); + if (ret) + return ret; + *val = regval; + return 0; + default: + return -EOPNOTSUPP; + } +} + +static int ina3221_write_chip(struct device *dev, u32 attr, long val) +{ + struct ina3221_data *ina = dev_get_drvdata(dev); + int ret, idx; + u32 tmp; + + switch (attr) { + case hwmon_chip_samples: + idx = find_closest(val, ina3221_avg_samples, + ARRAY_SIZE(ina3221_avg_samples)); + + tmp = (ina->reg_config & ~INA3221_CONFIG_AVG_MASK) | + (idx << INA3221_CONFIG_AVG_SHIFT); + ret = regmap_write(ina->regmap, INA3221_CONFIG, tmp); + if (ret) + return ret; + + /* Update reg_config accordingly */ + ina->reg_config = tmp; + return 0; + case hwmon_chip_update_interval: + tmp = ina3221_interval_ms_to_conv_time(ina->reg_config, val); + idx = find_closest(tmp, ina3221_conv_time, + ARRAY_SIZE(ina3221_conv_time)); + + /* Update Bus and Shunt voltage conversion times */ + tmp = INA3221_CONFIG_VBUS_CT_MASK | INA3221_CONFIG_VSH_CT_MASK; + tmp = (ina->reg_config & ~tmp) | + (idx << INA3221_CONFIG_VBUS_CT_SHIFT) | + (idx << INA3221_CONFIG_VSH_CT_SHIFT); + ret = regmap_write(ina->regmap, INA3221_CONFIG, tmp); + if (ret) + return ret; + + /* Update reg_config accordingly */ + ina->reg_config = tmp; + return 0; + default: + return -EOPNOTSUPP; + } +} + +static int ina3221_write_curr(struct device *dev, u32 attr, + int channel, long val) +{ + struct ina3221_data *ina = dev_get_drvdata(dev); + struct ina3221_input *input = ina->inputs; + u8 reg = ina3221_curr_reg[attr][channel]; + int resistance_uo, current_ma, voltage_uv; + int regval; + + if (channel > INA3221_CHANNEL3) + resistance_uo = ina->summation_shunt_resistor; + else + resistance_uo = input[channel].shunt_resistor; + + if (!resistance_uo) + return -EOPNOTSUPP; + + /* clamp current */ + current_ma = clamp_val(val, + INT_MIN / resistance_uo, + INT_MAX / resistance_uo); + + voltage_uv = DIV_ROUND_CLOSEST(current_ma * resistance_uo, 1000); + + /* clamp voltage */ + voltage_uv = clamp_val(voltage_uv, -163800, 163800); + + /* + * Formula to convert voltage_uv to register value: + * regval = (voltage_uv / scale) << shift + * Note: + * The scale is 40uV for all shunt voltage registers + * Shunt Voltage Sum register left-shifts 1 bit + * All other Shunt Voltage registers shift 3 bits + * Results: + * SHUNT_SUM: (1 / 40uV) << 1 = 1 / 20uV + * SHUNT[1-3]: (1 / 40uV) << 3 = 1 / 5uV + */ + if (reg == INA3221_SHUNT_SUM) + regval = DIV_ROUND_CLOSEST(voltage_uv, 20) & 0xfffe; + else + regval = DIV_ROUND_CLOSEST(voltage_uv, 5) & 0xfff8; + + return regmap_write(ina->regmap, reg, regval); +} + +static int ina3221_write_enable(struct device *dev, int channel, bool enable) +{ + struct ina3221_data *ina = dev_get_drvdata(dev); + u16 config, mask = INA3221_CONFIG_CHx_EN(channel); + u16 config_old = ina->reg_config & mask; + u32 tmp; + int ret; + + config = enable ? mask : 0; + + /* Bypass if enable status is not being changed */ + if (config_old == config) + return 0; + + /* For enabling routine, increase refcount and resume() at first */ + if (enable) { + ret = pm_runtime_resume_and_get(ina->pm_dev); + if (ret < 0) { + dev_err(dev, "Failed to get PM runtime\n"); + return ret; + } + } + + /* Enable or disable the channel */ + tmp = (ina->reg_config & ~mask) | (config & mask); + ret = regmap_write(ina->regmap, INA3221_CONFIG, tmp); + if (ret) + goto fail; + + /* Cache the latest config register value */ + ina->reg_config = tmp; + + /* For disabling routine, decrease refcount or suspend() at last */ + if (!enable) + pm_runtime_put_sync(ina->pm_dev); + + return 0; + +fail: + if (enable) { + dev_err(dev, "Failed to enable channel %d: error %d\n", + channel, ret); + pm_runtime_put_sync(ina->pm_dev); + } + + return ret; +} + +static int ina3221_read(struct device *dev, enum hwmon_sensor_types type, + u32 attr, int channel, long *val) +{ + struct ina3221_data *ina = dev_get_drvdata(dev); + int ret; + + mutex_lock(&ina->lock); + + switch (type) { + case hwmon_chip: + ret = ina3221_read_chip(dev, attr, val); + break; + case hwmon_in: + /* 0-align channel ID */ + ret = ina3221_read_in(dev, attr, channel - 1, val); + break; + case hwmon_curr: + ret = ina3221_read_curr(dev, attr, channel, val); + break; + default: + ret = -EOPNOTSUPP; + break; + } + + mutex_unlock(&ina->lock); + + return ret; +} + +static int ina3221_write(struct device *dev, enum hwmon_sensor_types type, + u32 attr, int channel, long val) +{ + struct ina3221_data *ina = dev_get_drvdata(dev); + int ret; + + mutex_lock(&ina->lock); + + switch (type) { + case hwmon_chip: + ret = ina3221_write_chip(dev, attr, val); + break; + case hwmon_in: + /* 0-align channel ID */ + ret = ina3221_write_enable(dev, channel - 1, val); + break; + case hwmon_curr: + ret = ina3221_write_curr(dev, attr, channel, val); + break; + default: + ret = -EOPNOTSUPP; + break; + } + + mutex_unlock(&ina->lock); + + return ret; +} + +static int ina3221_read_string(struct device *dev, enum hwmon_sensor_types type, + u32 attr, int channel, const char **str) +{ + struct ina3221_data *ina = dev_get_drvdata(dev); + int index = channel - 1; + + if (channel == 7) + *str = "sum of shunt voltages"; + else + *str = ina->inputs[index].label; + + return 0; +} + +static umode_t ina3221_is_visible(const void *drvdata, + enum hwmon_sensor_types type, + u32 attr, int channel) +{ + const struct ina3221_data *ina = drvdata; + const struct ina3221_input *input = NULL; + + switch (type) { + case hwmon_chip: + switch (attr) { + case hwmon_chip_samples: + case hwmon_chip_update_interval: + return 0644; + default: + return 0; + } + case hwmon_in: + /* Ignore in0_ */ + if (channel == 0) + return 0; + + switch (attr) { + case hwmon_in_label: + if (channel - 1 <= INA3221_CHANNEL3) + input = &ina->inputs[channel - 1]; + else if (channel == 7) + return 0444; + /* Hide label node if label is not provided */ + return (input && input->label) ? 0444 : 0; + case hwmon_in_input: + return 0444; + case hwmon_in_enable: + return 0644; + default: + return 0; + } + case hwmon_curr: + switch (attr) { + case hwmon_curr_input: + case hwmon_curr_crit_alarm: + case hwmon_curr_max_alarm: + return 0444; + case hwmon_curr_crit: + case hwmon_curr_max: + return 0644; + default: + return 0; + } + default: + return 0; + } +} + +#define INA3221_HWMON_CURR_CONFIG (HWMON_C_INPUT | \ + HWMON_C_CRIT | HWMON_C_CRIT_ALARM | \ + HWMON_C_MAX | HWMON_C_MAX_ALARM) + +static const struct hwmon_channel_info *ina3221_info[] = { + HWMON_CHANNEL_INFO(chip, + HWMON_C_SAMPLES, + HWMON_C_UPDATE_INTERVAL), + HWMON_CHANNEL_INFO(in, + /* 0: dummy, skipped in is_visible */ + HWMON_I_INPUT, + /* 1-3: input voltage Channels */ + HWMON_I_INPUT | HWMON_I_ENABLE | HWMON_I_LABEL, + HWMON_I_INPUT | HWMON_I_ENABLE | HWMON_I_LABEL, + HWMON_I_INPUT | HWMON_I_ENABLE | HWMON_I_LABEL, + /* 4-6: shunt voltage Channels */ + HWMON_I_INPUT, + HWMON_I_INPUT, + HWMON_I_INPUT, + /* 7: summation of shunt voltage channels */ + HWMON_I_INPUT | HWMON_I_LABEL), + HWMON_CHANNEL_INFO(curr, + /* 1-3: current channels*/ + INA3221_HWMON_CURR_CONFIG, + INA3221_HWMON_CURR_CONFIG, + INA3221_HWMON_CURR_CONFIG, + /* 4: summation of current channels */ + HWMON_C_INPUT | HWMON_C_CRIT | HWMON_C_CRIT_ALARM), + NULL +}; + +static const struct hwmon_ops ina3221_hwmon_ops = { + .is_visible = ina3221_is_visible, + .read_string = ina3221_read_string, + .read = ina3221_read, + .write = ina3221_write, +}; + +static const struct hwmon_chip_info ina3221_chip_info = { + .ops = &ina3221_hwmon_ops, + .info = ina3221_info, +}; + +/* Extra attribute groups */ +static ssize_t ina3221_shunt_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct sensor_device_attribute *sd_attr = to_sensor_dev_attr(attr); + struct ina3221_data *ina = dev_get_drvdata(dev); + unsigned int channel = sd_attr->index; + struct ina3221_input *input = &ina->inputs[channel]; + + return snprintf(buf, PAGE_SIZE, "%d\n", input->shunt_resistor); +} + +static ssize_t ina3221_shunt_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) +{ + struct sensor_device_attribute *sd_attr = to_sensor_dev_attr(attr); + struct ina3221_data *ina = dev_get_drvdata(dev); + unsigned int channel = sd_attr->index; + struct ina3221_input *input = &ina->inputs[channel]; + int val; + int ret; + + ret = kstrtoint(buf, 0, &val); + if (ret) + return ret; + + val = clamp_val(val, 1, INT_MAX); + + input->shunt_resistor = val; + + /* Update summation_shunt_resistor for summation channel */ + ina->summation_shunt_resistor = ina3221_summation_shunt_resistor(ina); + + return count; +} + +static int ina3221_reg_transfer(u8 reg, long *val, unsigned int *regval, bool val_to_reg) +{ + switch (reg) { + case INA3221_POWER_UPPER: + case INA3221_POWER_LOWER: + /* LSB=8 mV, last 3 bits unused */ + if (val_to_reg) { + *regval = (DIV_ROUND_CLOSEST(clamp_val(*val, 0, 32760), 8) << 3); + } else { + *val = (sign_extend32(*regval >> 3, 12)) * 8; + } + break; + default: + return -EINVAL; + } + + return 0; +} + +static int ina3221_reg_rw(struct ina3221_data *ina, u8 reg, long *transfer_val, unsigned int *regval, bool is_rd) +{ + int ret; + + if (is_rd) { + ret = regmap_read(ina->regmap, reg, regval); + if (ret < 0) { + dev_err(ina->pm_dev, "regmap read reg:0x%x fail, ret: %d\n", reg, ret); + return ret; + } + dev_dbg(ina->pm_dev, "regmap read reg:0x%x success, regval: 0x%x\n", reg, *regval); + + ret = ina3221_reg_transfer(reg, transfer_val, regval, false); + if (ret < 0) { + dev_err(ina->pm_dev, "ina3221_reg_transfer fail reg:0x%x, regval:0x%x, ret: %d\n", reg, *regval, ret); + return ret; + } + dev_dbg(ina->pm_dev, "ina3221_reg_transfer success reg:0x%x, regval:0x%x, transfer_val: %ld\n", reg, *regval, *transfer_val); + } else { + ret = ina3221_reg_transfer(reg, transfer_val, regval, true); + if (ret < 0) { + dev_err(ina->pm_dev, "ina3221_reg_transfer fail reg:0x%x, regval:0x%x, ret: %d\n", reg, *regval, ret); + return ret; + } + dev_dbg(ina->pm_dev, "ina3221_reg_transfer success reg:0x%x, regval:0x%x, transfer_val: %ld\n", reg, *regval, *transfer_val); + + ret = regmap_write(ina->regmap, reg, *regval); + if (ret < 0) { + dev_err(ina->pm_dev, "regmap write reg:0x%x fail, ret: %d\n", reg, ret); + return ret; + } + dev_dbg(ina->pm_dev, "regmap write reg:0x%x success, regval: 0x%x\n", reg, *regval); + } + + return 0; +} + +static ssize_t ina3221_value_store(struct device *dev, + struct device_attribute *da, + const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct ina3221_data *ina = dev_get_drvdata(dev); + int reg = attr->index; + long val; + int ret; + unsigned int regval; + + if (IS_ERR(ina)) { + return PTR_ERR(ina); + } + + ret = kstrtol(buf, 0, &val); + if (ret < 0) { + dev_err(ina->pm_dev, "ina3221_value_store err, reg:0x%x, ret:%d\n", reg, ret); + return ret; + } + + mutex_lock(&ina->lock); + ret = ina3221_reg_rw(ina, reg, &val, ®val, false); + mutex_unlock(&ina->lock); + if (ret < 0) { + dev_err(ina->pm_dev, "ina3221_value_store fail, reg:0x%x, val:%ld, ret:%d\n", reg, val, ret); + return ret; + } + dev_dbg(ina->pm_dev, "ina3221_value_store success reg:0x%x, regval:0x%x, transfer_val: %ld\n", reg, regval, val); + + return count; +} + +static ssize_t ina3221_value_show(struct device *dev, + struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct ina3221_data *ina = dev_get_drvdata(dev); + int reg = attr->index; + long val; + int ret; + unsigned int regval; + + if (IS_ERR(ina)) { + return PTR_ERR(ina); + } + + mutex_lock(&ina->lock); + ret = ina3221_reg_rw(ina, reg, &val, ®val, true); + mutex_unlock(&ina->lock); + if (ret < 0) { + dev_err(ina->pm_dev, "ina3221_value_show fail, reg:0x%x, ret:%d\n", reg, ret); + return ret; + } + dev_dbg(ina->pm_dev, "ina3221_value_show success reg:0x%x, regval:0x%x, transfer_val: %ld\n", reg, regval, val); + + return sysfs_emit(buf, "%ld\n", val); +} + +/* shunt resistance */ +static SENSOR_DEVICE_ATTR_RW(shunt1_resistor, ina3221_shunt, INA3221_CHANNEL1); +static SENSOR_DEVICE_ATTR_RW(shunt2_resistor, ina3221_shunt, INA3221_CHANNEL2); +static SENSOR_DEVICE_ATTR_RW(shunt3_resistor, ina3221_shunt, INA3221_CHANNEL3); + +static SENSOR_DEVICE_ATTR_RW(pv_max, ina3221_value, INA3221_POWER_UPPER); +static SENSOR_DEVICE_ATTR_RW(pv_min, ina3221_value, INA3221_POWER_LOWER); + +static struct attribute *ina3221_attrs[] = { + &sensor_dev_attr_shunt1_resistor.dev_attr.attr, + &sensor_dev_attr_shunt2_resistor.dev_attr.attr, + &sensor_dev_attr_shunt3_resistor.dev_attr.attr, + &sensor_dev_attr_pv_max.dev_attr.attr, + &sensor_dev_attr_pv_min.dev_attr.attr, + NULL, +}; +ATTRIBUTE_GROUPS(ina3221); + +static const struct regmap_range ina3221_yes_ranges[] = { + regmap_reg_range(INA3221_CONFIG, INA3221_BUS3), + regmap_reg_range(INA3221_SHUNT_SUM, INA3221_SHUNT_SUM), + regmap_reg_range(INA3221_MASK_ENABLE, INA3221_MASK_ENABLE), + regmap_reg_range(INA3221_POWER_UPPER, INA3221_POWER_LOWER), +}; + +static const struct regmap_access_table ina3221_volatile_table = { + .yes_ranges = ina3221_yes_ranges, + .n_yes_ranges = ARRAY_SIZE(ina3221_yes_ranges), +}; + +static const struct regmap_config ina3221_regmap_config = { + .reg_bits = 8, + .val_bits = 16, + + .cache_type = REGCACHE_RBTREE, + .volatile_table = &ina3221_volatile_table, +}; + +static int ina3221_probe_child_from_dt(struct device *dev, + struct device_node *child, + struct ina3221_data *ina) +{ + struct ina3221_input *input; + u32 val; + int ret; + + ret = of_property_read_u32(child, "reg", &val); + if (ret) { + dev_err(dev, "missing reg property of %pOFn\n", child); + return ret; + } else if (val > INA3221_CHANNEL3) { + dev_err(dev, "invalid reg %d of %pOFn\n", val, child); + return ret; + } + + input = &ina->inputs[val]; + + /* Log the disconnected channel input */ + if (!of_device_is_available(child)) { + input->disconnected = true; + return 0; + } + + /* Save the connected input label if available */ + of_property_read_string(child, "label", &input->label); + + /* Overwrite default shunt resistor value optionally */ + if (!of_property_read_u32(child, "shunt-resistor-micro-ohms", &val)) { + if (val < 1 || val > INT_MAX) { + dev_err(dev, "invalid shunt resistor value %u of %pOFn\n", + val, child); + return -EINVAL; + } + input->shunt_resistor = val; + } + + return 0; +} + +static int ina3221_probe_from_dt(struct device *dev, struct ina3221_data *ina) +{ + const struct device_node *np = dev->of_node; + struct device_node *child; + int ret; + + ina->pv_max = INA3221_DEFAULT_POWER_UPPER; + ina->pv_min = INA3221_DEFAULT_POWER_LOWER; + + /* Compatible with non-DT platforms */ + if (!np) + return 0; + + ina->single_shot = of_property_read_bool(np, "ti,single-shot"); + + ret = 0; + ret += of_property_read_s32(np, "pv_max", &ina->pv_max); + ret += of_property_read_s32(np, "pv_min", &ina->pv_min); + if (ret) { + dev_info(dev, "pv_max or pv_min not config, use default\n"); + ina->pv_max = INA3221_DEFAULT_POWER_UPPER; + ina->pv_min = INA3221_DEFAULT_POWER_LOWER; + } + dev_info(dev, "pv_max: %d, pv_min: %d\n", ina->pv_max, ina->pv_min); + + for_each_child_of_node(np, child) { + ret = ina3221_probe_child_from_dt(dev, child, ina); + if (ret) { + of_node_put(child); + return ret; + } + } + + return 0; +} + +static int ina3221_set_pv_threshold(struct ina3221_data *ina) { + int ret; + unsigned int regval; + + if (ina->pv_max != INA3221_DEFAULT_POWER_UPPER) { + ret = ina3221_reg_rw(ina, INA3221_POWER_UPPER, (long *)&ina->pv_max, ®val, false); + if (ret < 0) { + dev_err(ina->pm_dev, "ina3221 reg write fail, reg:0x%x, val: %d, ret:%d\n", INA3221_POWER_UPPER, ina->pv_max, ret); + return ret; + } + dev_dbg(ina->pm_dev, "set reg:0x%x val: 0x%x\n", INA3221_POWER_UPPER, regval); + } + + if (ina->pv_min != INA3221_DEFAULT_POWER_LOWER) { + ret = ina3221_reg_rw(ina, INA3221_POWER_LOWER, (long *)&ina->pv_min, ®val, false); + if (ret < 0) { + dev_err(ina->pm_dev, "ina3221 reg write fail, reg:0x%x, val: %d, ret:%d\n", INA3221_POWER_LOWER, ina->pv_min, ret); + return ret; + } + dev_dbg(ina->pm_dev, "set reg:0x%x val: 0x%x\n", INA3221_POWER_LOWER, regval); + } + + return 0; +} + +static int ina3221_probe(struct i2c_client *client) +{ + struct device *dev = &client->dev; + struct ina3221_data *ina; + struct device *hwmon_dev; + int i, ret; + + ina = devm_kzalloc(dev, sizeof(*ina), GFP_KERNEL); + if (!ina) + return -ENOMEM; + + ina->regmap = devm_regmap_init_i2c(client, &ina3221_regmap_config); + if (IS_ERR(ina->regmap)) { + dev_err(dev, "Unable to allocate register map\n"); + return PTR_ERR(ina->regmap); + } + + for (i = 0; i < F_MAX_FIELDS; i++) { + ina->fields[i] = devm_regmap_field_alloc(dev, + ina->regmap, + ina3221_reg_fields[i]); + if (IS_ERR(ina->fields[i])) { + dev_err(dev, "Unable to allocate regmap fields\n"); + return PTR_ERR(ina->fields[i]); + } + } + + for (i = 0; i < INA3221_NUM_CHANNELS; i++) + ina->inputs[i].shunt_resistor = INA3221_RSHUNT_DEFAULT; + + ret = ina3221_probe_from_dt(dev, ina); + if (ret) { + dev_err(dev, "Unable to probe from device tree\n"); + return ret; + } + + /* The driver will be reset, so use reset value */ + ina->reg_config = INA3221_CONFIG_DEFAULT; + + /* Clear continuous bit to use single-shot mode */ + if (ina->single_shot) + ina->reg_config &= ~INA3221_CONFIG_MODE_CONTINUOUS; + + /* Disable channels if their inputs are disconnected */ + for (i = 0; i < INA3221_NUM_CHANNELS; i++) { + if (ina->inputs[i].disconnected) + ina->reg_config &= ~INA3221_CONFIG_CHx_EN(i); + } + + /* Initialize summation_shunt_resistor for summation channel control */ + ina->summation_shunt_resistor = ina3221_summation_shunt_resistor(ina); + + ina->pm_dev = dev; + mutex_init(&ina->lock); + dev_set_drvdata(dev, ina); + + /* Enable PM runtime -- status is suspended by default */ + pm_runtime_enable(ina->pm_dev); + + /* Initialize (resume) the device */ + for (i = 0; i < INA3221_NUM_CHANNELS; i++) { + if (ina->inputs[i].disconnected) + continue; + /* Match the refcount with number of enabled channels */ + ret = pm_runtime_get_sync(ina->pm_dev); + if (ret < 0) + goto fail; + } + + ret = ina3221_set_pv_threshold(ina); + if (ret < 0) { + dev_err(dev, "Set pv threshold fail, ret: %d\n", ret); + goto fail; + } + + hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name, ina, + &ina3221_chip_info, + ina3221_groups); + if (IS_ERR(hwmon_dev)) { + dev_err(dev, "Unable to register hwmon device\n"); + ret = PTR_ERR(hwmon_dev); + goto fail; + } + + return 0; + +fail: + pm_runtime_disable(ina->pm_dev); + pm_runtime_set_suspended(ina->pm_dev); + /* pm_runtime_put_noidle() will decrease the PM refcount until 0 */ + for (i = 0; i < INA3221_NUM_CHANNELS; i++) + pm_runtime_put_noidle(ina->pm_dev); + mutex_destroy(&ina->lock); + + return ret; +} + +static void ina3221_remove(struct i2c_client *client) +{ + struct ina3221_data *ina = dev_get_drvdata(&client->dev); + int i; + + pm_runtime_disable(ina->pm_dev); + pm_runtime_set_suspended(ina->pm_dev); + + /* pm_runtime_put_noidle() will decrease the PM refcount until 0 */ + for (i = 0; i < INA3221_NUM_CHANNELS; i++) + pm_runtime_put_noidle(ina->pm_dev); + + mutex_destroy(&ina->lock); + + return; +} + +static int __maybe_unused ina3221_suspend(struct device *dev) +{ + struct ina3221_data *ina = dev_get_drvdata(dev); + int ret; + + /* Save config register value and enable cache-only */ + ret = regmap_read(ina->regmap, INA3221_CONFIG, &ina->reg_config); + if (ret) + return ret; + + /* Set to power-down mode for power saving */ + ret = regmap_update_bits(ina->regmap, INA3221_CONFIG, + INA3221_CONFIG_MODE_MASK, + INA3221_CONFIG_MODE_POWERDOWN); + if (ret) + return ret; + + regcache_cache_only(ina->regmap, true); + regcache_mark_dirty(ina->regmap); + + return 0; +} + +static int __maybe_unused ina3221_resume(struct device *dev) +{ + struct ina3221_data *ina = dev_get_drvdata(dev); + int ret; + + regcache_cache_only(ina->regmap, false); + + /* Software reset the chip */ + ret = regmap_field_write(ina->fields[F_RST], true); + if (ret) { + dev_err(dev, "Unable to reset device\n"); + return ret; + } + + /* Restore cached register values to hardware */ + ret = regcache_sync(ina->regmap); + if (ret) + return ret; + + /* Restore config register value to hardware */ + ret = regmap_write(ina->regmap, INA3221_CONFIG, ina->reg_config); + if (ret) + return ret; + + /* Initialize summation channel control */ + if (ina->summation_shunt_resistor) { + /* + * Take all three channels into summation by default + * Shunt measurements of disconnected channels should + * be 0, so it does not matter for summation. + */ + ret = regmap_update_bits(ina->regmap, INA3221_MASK_ENABLE, + INA3221_MASK_ENABLE_SCC_MASK, + INA3221_MASK_ENABLE_SCC_MASK); + if (ret) { + dev_err(dev, "Unable to control summation channel\n"); + return ret; + } + } + + return 0; +} + +static const struct dev_pm_ops ina3221_pm = { + SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, + pm_runtime_force_resume) + SET_RUNTIME_PM_OPS(ina3221_suspend, ina3221_resume, NULL) +}; + +static const struct of_device_id ina3221_of_match_table[] = { + { .compatible = "ti,wb_ina3221", }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(of, ina3221_of_match_table); + +static const struct i2c_device_id ina3221_ids[] = { + { "wb_ina3221", 0 }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(i2c, ina3221_ids); + +static struct i2c_driver ina3221_i2c_driver = { + .probe = ina3221_probe, + .remove = ina3221_remove, + .driver = { + .name = INA3221_DRIVER_NAME, + .of_match_table = ina3221_of_match_table, + .pm = &ina3221_pm, + }, + .id_table = ina3221_ids, +}; +module_i2c_driver(ina3221_i2c_driver); + +MODULE_AUTHOR("support"); +MODULE_DESCRIPTION("Texas Instruments INA3221 HWMon Driver"); +MODULE_LICENSE("GPL v2"); diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_indirect_dev.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_indirect_dev.c index c0a730e7746..93ccc0dd7a3 100644 --- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_indirect_dev.c +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_indirect_dev.c @@ -35,170 +35,87 @@ #include #include #include -#include #include "wb_indirect_dev.h" -#define MODULE_NAME "wb-indirect-dev" - -#define SYMBOL_I2C_DEV_MODE (1) -#define FILE_MODE (2) -#define SYMBOL_PCIE_DEV_MODE (3) -#define SYMBOL_IO_DEV_MODE (4) -#define SYMBOL_SPI_DEV_MODE (5) - -#define KERNEL_SPACE (0) -#define USER_SPACE (1) - -#define MAX_INDIRECT_DEV_NUM (256) -#define INDIRECT_ADDR_H(addr) ((addr >> 8) & 0xff) -#define INDIRECT_ADDR_L(addr) ((addr) & 0xff) -#define INDIRECT_OP_WRITE (0x2) -#define INDIRECT_OP_READ (0x3) - -static int g_indirect_dev_debug = 0; -static int g_indirect_dev_error = 0; - -module_param(g_indirect_dev_debug, int, S_IRUGO | S_IWUSR); -module_param(g_indirect_dev_error, int, S_IRUGO | S_IWUSR); - -#define INDIRECT_DEV_INFO(fmt, args...) do { \ - printk(KERN_INFO "[INDIRECT_DEV][INFO][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \ -} while (0) - -#define INDIRECT_DEV_DEBUG(fmt, args...) do { \ - if (g_indirect_dev_debug) { \ - printk(KERN_DEBUG "[INDIRECT_DEV][DEBUG][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \ - } \ -} while (0) - -#define INDIRECT_DEV_ERROR(fmt, args...) do { \ - if (g_indirect_dev_error) { \ - printk(KERN_ERR "[INDIRECT_DEV][ERR][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \ - } \ -} while (0) - -static struct indirect_dev_info* indirect_dev_arry[MAX_INDIRECT_DEV_NUM]; - -static int noop_pre(struct kprobe *p, struct pt_regs *regs) { return 0; } -static struct kprobe kp = { - .symbol_name = "kallsyms_lookup_name", -}; -unsigned long (*kallsyms_lookup_name_fun)(const char *name) = NULL; - -/* Call kprobe to find the address location of kallsyms_lookup_name */ -static int find_kallsyms_lookup_name(void) -{ - int ret = -1; - - kp.pre_handler = noop_pre; - ret = register_kprobe(&kp); - if (ret < 0) { - INDIRECT_DEV_ERROR("register_kprobe failed, error:%d\n", ret); - return ret; - } - INDIRECT_DEV_DEBUG("kallsyms_lookup_name addr: %p\n", kp.addr); - kallsyms_lookup_name_fun = (void*)kp.addr; - unregister_kprobe(&kp); - - return ret; -} - -struct indirect_dev_info { +#include +#include + +#define MODULE_NAME "wb-indirect-dev" +#define INDIRECT_ADDR_H(addr) ((addr >> 8) & 0xff) +#define INDIRECT_ADDR_L(addr) ((addr) & 0xff) +#define INDIRECT_OP_WRITE (0x2) +#define INDIRECT_OP_READ (0x3) + +/* Use the wb_bsp_kernel_debug header file must define debug variable */ +static int debug = 0; +module_param(debug, int, S_IRUGO | S_IWUSR); + +static int status_cache_ms = 0; +module_param(status_cache_ms, int, S_IRUGO | S_IWUSR); + +static DEFINE_SPINLOCK(dev_array_lock); +static struct indirect_dev_info* indirect_dev_arry[MAX_DEV_NUM]; + +typedef struct indirect_dev_info { const char *name; /* generate dev name */ + const char *alias; /* generate dev alias */ const char *logic_dev_name; /* dependent dev name */ uint32_t indirect_len; /* dev data len */ uint32_t data_bus_width; /* dev data_bus_width */ - uint32_t addr_bus_width; /* dev addr_bus_width */ uint32_t wr_data; /* dependent dev wr date reg */ - uint32_t wr_data_width; /* dependent dev wr_data_width */ uint32_t addr_low; /* dependent dev w/r addr reg low */ uint32_t addr_high; /* dependent dev w/r addr reg high */ uint32_t rd_data; /* dependent dev rd date reg */ - uint32_t rd_data_width; /* dependent dev rd_data_width */ uint32_t opt_ctl; /* dependent dev opt code reg */ uint32_t logic_func_mode; /* 1: i2c, 2: file, 3:pcie, 4:io, 5:spi */ + uint32_t lock_mode; /* 1:spin lock, 2:mutex */ unsigned long write_intf_addr; unsigned long read_intf_addr; spinlock_t indirect_dev_lock; + struct mutex mutex_lock; struct miscdevice misc; - struct device *dev; -}; - -static int wb_dev_file_read(const char *path, uint32_t pos, uint8_t *val, size_t size) + struct kobject kobj; + struct attribute_group *sysfs_group; + uint8_t file_cache_rd; + uint8_t file_cache_wr; + char cache_file_path[MAX_NAME_SIZE]; + char mask_file_path[MAX_NAME_SIZE]; + struct mutex update_lock; + wb_bsp_key_device_log_node_t log_node; + device_status_check_t status_check; +} wb_indirect_dev_t; + +static void wb_dev_lock_init(struct indirect_dev_info *indirect_dev) { - int ret; - struct file *filp; - loff_t tmp_pos; - - struct kvec iov = { - .iov_base = val, - .iov_len = min_t(size_t, size, MAX_RW_COUNT), - }; - struct iov_iter iter; - - filp = filp_open(path, O_RDONLY, 0); - if (IS_ERR(filp)) { - INDIRECT_DEV_ERROR("read open failed errno = %ld\r\n", -PTR_ERR(filp)); - filp = NULL; - goto exit; - } - tmp_pos = (loff_t)pos; - iov_iter_kvec(&iter, ITER_DEST, &iov, 1, iov.iov_len); - ret = vfs_iter_read(filp, &iter, &tmp_pos, 0); - if (ret < 0) { - INDIRECT_DEV_ERROR("vfs_iter_read failed, path=%s, addr=0x%x, size=%zu, ret=%d\r\n", path, pos, size, ret); - goto exit; - } - filp_close(filp, NULL); - - return ret; - -exit: - if (filp != NULL) { - filp_close(filp, NULL); + if (indirect_dev->lock_mode == WB_MUTEX_LOCK_MODE) { + mutex_init(&indirect_dev->mutex_lock); + } else { + spin_lock_init(&indirect_dev->indirect_dev_lock); } - return -1; + return; } -static int wb_dev_file_write(const char *path, uint32_t pos, uint8_t *val, size_t size) +static void wb_dev_lock(struct indirect_dev_info *indirect_dev, unsigned long *flags) { - int ret; - struct file *filp; - loff_t tmp_pos; - - struct kvec iov = { - .iov_base = val, - .iov_len = min_t(size_t, size, MAX_RW_COUNT), - }; - struct iov_iter iter; - - filp = filp_open(path, O_RDWR, 777); - if (IS_ERR(filp)) { - INDIRECT_DEV_ERROR("write open failed errno = %ld\r\n", -PTR_ERR(filp)); - filp = NULL; - goto exit; - } - - tmp_pos = (loff_t)pos; - iov_iter_kvec(&iter, ITER_SOURCE, &iov, 1, iov.iov_len); - ret = vfs_iter_write(filp, &iter, &tmp_pos, 0); - if (ret < 0) { - INDIRECT_DEV_ERROR("vfs_iter_write failed, path=%s, addr=0x%x, size=%zu, ret=%d\r\n", path, pos, size, ret); - goto exit; + if (indirect_dev->lock_mode == WB_MUTEX_LOCK_MODE) { + mutex_lock(&indirect_dev->mutex_lock); + } else { + spin_lock_irqsave(&indirect_dev->indirect_dev_lock, *flags); } - - vfs_fsync(filp, 1); - filp_close(filp, NULL); - return ret; + return; +} -exit: - if (filp != NULL) { - filp_close(filp, NULL); +static void wb_dev_unlock(struct indirect_dev_info *indirect_dev, unsigned long *flags) +{ + if (indirect_dev->lock_mode == WB_MUTEX_LOCK_MODE) { + mutex_unlock(&indirect_dev->mutex_lock); + } else { + spin_unlock_irqrestore(&indirect_dev->indirect_dev_lock, *flags); } - return -1; + return; } static int wb_logic_reg_write(struct indirect_dev_info *indirect_dev, uint32_t pos, uint8_t *val, size_t size) @@ -228,37 +145,40 @@ static int indirect_addressing_read(struct indirect_dev_info *indirect_dev, uint addr_l = INDIRECT_ADDR_L(address); op_code = INDIRECT_OP_READ; - spin_lock_irqsave(&indirect_dev->indirect_dev_lock, flags); + wb_dev_lock(indirect_dev, &flags); + DEBUG_VERBOSE("write reg addr_low=0x%x, value = 0x%x\n\n", indirect_dev->addr_low, addr_l); ret = wb_logic_reg_write(indirect_dev, indirect_dev->addr_low, &addr_l, WIDTH_1Byte); if (ret < 0) { - INDIRECT_DEV_ERROR("indirect_read write reg error.offset = 0x%x, value = %u\n", indirect_dev->addr_low, addr_l); + DEBUG_ERROR("indirect_read write reg error.offset = 0x%x, value = 0x%x\n", indirect_dev->addr_low, addr_l); goto fail; } + DEBUG_VERBOSE("write reg addr_high=0x%x, value = 0x%x\n\n", indirect_dev->addr_high, addr_h); ret = wb_logic_reg_write(indirect_dev, indirect_dev->addr_high, &addr_h, WIDTH_1Byte); if (ret < 0) { - INDIRECT_DEV_ERROR("indirect_read write reg error.offset = 0x%x, value = %u\n", indirect_dev->addr_high, addr_h); + DEBUG_ERROR("indirect_read write reg error.offset = 0x%x, value = 0x%x\n", indirect_dev->addr_high, addr_h); goto fail; } + DEBUG_VERBOSE("write reg opt_ctl=0x%x, value = 0x%x\n\n", indirect_dev->opt_ctl, op_code); ret = wb_logic_reg_write(indirect_dev, indirect_dev->opt_ctl, &op_code, WIDTH_1Byte); if (ret < 0) { - INDIRECT_DEV_ERROR("indirect_read write reg error.offset = 0x%x, value = %u\n", indirect_dev->opt_ctl, INDIRECT_OP_READ); + DEBUG_ERROR("indirect_read write reg error.offset = 0x%x, value = 0x%x\n", indirect_dev->opt_ctl, INDIRECT_OP_READ); goto fail; } ret = wb_logic_reg_read(indirect_dev, indirect_dev->rd_data, buf, rd_data_width); if (ret < 0) { - INDIRECT_DEV_ERROR("indirect_read read reg error.read offset = 0x%x\n, ret = %d", indirect_dev->rd_data, ret); + DEBUG_ERROR("indirect_read read reg error.read offset = 0x%x\n, ret = %d", indirect_dev->rd_data, ret); goto fail; } - INDIRECT_DEV_DEBUG("indirect_read success, addr = 0x%x\n", address); - spin_unlock_irqrestore(&indirect_dev->indirect_dev_lock, flags); + DEBUG_VERBOSE("indirect_read success, addr = 0x%x\n", address); + wb_dev_unlock(indirect_dev, &flags); return ret; fail: - spin_unlock_irqrestore(&indirect_dev->indirect_dev_lock, flags); + wb_dev_unlock(indirect_dev, &flags); return ret; } @@ -268,30 +188,50 @@ static int device_read(struct indirect_dev_info *indirect_dev, uint32_t offset, u32 data_width; u32 tmp; - data_width = indirect_dev->data_bus_width; + if (offset >= indirect_dev->indirect_len) { + DEBUG_VERBOSE("offset: 0x%x, indirect len: 0x%x, count: %zu, EOF.\n", + offset, indirect_dev->indirect_len, count); + return 0; + } + data_width = indirect_dev->data_bus_width; if (offset % data_width) { - INDIRECT_DEV_ERROR("data bus width:%d, offset:0x%x, read size %zu invalid.\n", + DEBUG_ERROR("data bus width:%d, offset:0x%x, read size %zu invalid.\n", data_width, offset, count); return -EINVAL; } if (count > indirect_dev->indirect_len - offset) { - INDIRECT_DEV_DEBUG("read count out of range. input len:%zu, read len:%u.\n", - count, indirect_dev->indirect_len - offset); - count = indirect_dev->indirect_len - offset; + DEBUG_VERBOSE("read count out of range. input len:%zu, read len:%u.\n", + count, indirect_dev->indirect_len - offset); + count = indirect_dev->indirect_len - offset; } tmp = count; for (i = 0; i < count; i += data_width) { ret = indirect_addressing_read(indirect_dev, buf + i, offset + i, (tmp > data_width ? data_width : tmp)); if (ret < 0) { - INDIRECT_DEV_ERROR("read error.read offset = %u\n", (offset + i)); + DEBUG_ERROR("read error.read offset = %u\n", (offset + i)); return -EFAULT; } tmp -= data_width; } + if (indirect_dev->file_cache_rd) { + ret = cache_value_read(indirect_dev->mask_file_path, indirect_dev->cache_file_path, offset, buf, count); + if (ret < 0) { + DEBUG_ERROR("indirect_dev data offset: 0x%x, read_len: %zu, read cache file fail, ret: %d, return act value\n", + offset, count, ret); + } else { + DEBUG_VERBOSE("indirect_dev data offset: 0x%x, read_len: %zu success, read from cache value\n", + offset, count); + } + } + + if (debug & DEBUG_DUMP_DATA_LEVEL) { + logic_dev_dump_data(indirect_dev->name, offset, buf, count, true); + } + return count; } @@ -305,37 +245,40 @@ static int indirect_addressing_write(struct indirect_dev_info *indirect_dev, uin addr_l = INDIRECT_ADDR_L(address); op_code = INDIRECT_OP_WRITE; - spin_lock_irqsave(&indirect_dev->indirect_dev_lock, flags); + wb_dev_lock(indirect_dev, &flags); ret = wb_logic_reg_write(indirect_dev, indirect_dev->wr_data, buf, wr_data_width); if (ret < 0) { - INDIRECT_DEV_ERROR("indirect_write read reg error.read offset = 0x%x\n, ret = %d", indirect_dev->wr_data, ret); + DEBUG_ERROR("indirect_write read reg error.read offset = 0x%x\n, ret = %d", indirect_dev->wr_data, ret); goto fail; } + DEBUG_VERBOSE("write reg addr_low=0x%x, value = 0x%x\n\n", indirect_dev->addr_low, addr_l); ret = wb_logic_reg_write(indirect_dev, indirect_dev->addr_low, &addr_l, WIDTH_1Byte); if (ret < 0) { - INDIRECT_DEV_ERROR("indirect_write write reg error.offset = 0x%x, value = %u\n", indirect_dev->addr_low, addr_l); + DEBUG_ERROR("indirect_write write reg error.offset = 0x%x, value = 0x%x\n", indirect_dev->addr_low, addr_l); goto fail; } + DEBUG_VERBOSE("write reg addr_high=0x%x, value = 0x%x\n\n", indirect_dev->addr_high, addr_h); ret = wb_logic_reg_write(indirect_dev, indirect_dev->addr_high, &addr_h, WIDTH_1Byte); if (ret < 0) { - INDIRECT_DEV_ERROR("indirect_write write reg error.offset = 0x%x, value = %u\n", indirect_dev->addr_high, addr_h); + DEBUG_ERROR("indirect_write write reg error.offset = 0x%x, value = 0x%x\n", indirect_dev->addr_high, addr_h); goto fail; } + DEBUG_VERBOSE("write reg opt_ctl=0x%x, value = 0x%x\n\n", indirect_dev->opt_ctl, op_code); ret = wb_logic_reg_write(indirect_dev, indirect_dev->opt_ctl, &op_code, WIDTH_1Byte); if (ret < 0) { - INDIRECT_DEV_ERROR("indirect_write write reg error.offset = 0x%x, value = %u\n", indirect_dev->opt_ctl, INDIRECT_OP_READ); + DEBUG_ERROR("indirect_write write reg error.offset = 0x%x, value = 0x%x\n", indirect_dev->opt_ctl, INDIRECT_OP_READ); goto fail; } - INDIRECT_DEV_DEBUG("indirect_write success, addr = 0x%x\n", address); - spin_unlock_irqrestore(&indirect_dev->indirect_dev_lock, flags); + DEBUG_VERBOSE("indirect_write success, addr = 0x%x\n", address); + wb_dev_unlock(indirect_dev, &flags); return ret; fail: - spin_unlock_irqrestore(&indirect_dev->indirect_dev_lock, flags); + wb_dev_unlock(indirect_dev, &flags); return ret; } @@ -345,154 +288,144 @@ static int device_write(struct indirect_dev_info *indirect_dev, uint32_t offset, u32 data_width; u32 tmp; - if (offset > indirect_dev->indirect_len) { - INDIRECT_DEV_DEBUG("offset: 0x%x, spi len: 0x%x, count: %zu, EOF.\n", + if (offset >= indirect_dev->indirect_len) { + DEBUG_VERBOSE("offset: 0x%x, indirect len: 0x%x, count: %zu, EOF.\n", offset, indirect_dev->indirect_len, count); return 0; } data_width = indirect_dev->data_bus_width; if (offset % data_width) { - INDIRECT_DEV_ERROR("data bus width:%d, offset:0x%x, read size %zu invalid.\n", + DEBUG_ERROR("data bus width:%d, offset:0x%x, read size %zu invalid.\n", data_width, offset, count); return -EINVAL; } if (count > (indirect_dev->indirect_len - offset)) { - INDIRECT_DEV_DEBUG("write count out of range. input len:%zu, read len:%u.\n", + DEBUG_VERBOSE("write count out of range. input len:%zu, read len:%u.\n", count, indirect_dev->indirect_len - offset); count = indirect_dev->indirect_len - offset; } - if (count == 0) { - INDIRECT_DEV_DEBUG("offset: 0x%x, i2c len: 0x%x, read len: %zu, EOF.\n", - offset, indirect_dev->indirect_len, count); - return 0; - } - tmp = count; for (i = 0; i < count; i += data_width) { ret = indirect_addressing_write(indirect_dev, buf + i, offset + i, (tmp > data_width ? data_width : tmp)); if (ret < 0) { - INDIRECT_DEV_ERROR("write error.offset = %u\n", (offset + i)); + DEBUG_ERROR("write error.offset = %u\n", (offset + i)); return -EFAULT; } tmp -= data_width; } + + if (debug & DEBUG_DUMP_DATA_LEVEL) { + logic_dev_dump_data(indirect_dev->name, offset, buf, count, false); + } + return count; } -static ssize_t indirect_dev_read(struct file *file, char __user *buf, size_t count, loff_t *offset, int flag) +static ssize_t indirect_dev_read(struct file *file, char *buf, size_t count, loff_t *offset) { u8 val[MAX_RW_LEN]; int ret, read_len; struct indirect_dev_info *indirect_dev; + if (offset == NULL || *offset < 0) { + DEBUG_ERROR("offset invalid, read failed.\n"); + return -EINVAL; + } + indirect_dev = file->private_data; if (indirect_dev == NULL) { - INDIRECT_DEV_ERROR("can't get read private_data.\n"); + DEBUG_ERROR("can't get read private_data.\n"); return -EINVAL; } if (count == 0) { - INDIRECT_DEV_ERROR("Invalid params, read count is 0.\n"); + DEBUG_ERROR("Invalid params, read count is 0.\n"); return -EINVAL; } if (count > sizeof(val)) { - INDIRECT_DEV_DEBUG("read count %zu exceed max %zu.\n", count, sizeof(val)); + DEBUG_VERBOSE("read count %zu exceed max %zu.\n", count, sizeof(val)); count = sizeof(val); } mem_clear(val, sizeof(val)); read_len = device_read(indirect_dev, (uint32_t)*offset, val, count); if (read_len < 0) { - INDIRECT_DEV_ERROR("indirect dev read failed, dev name:%s, offset:0x%x, len:%zu.\n", + DEBUG_ERROR("indirect dev read failed, dev name:%s, offset:0x%x, len:%zu.\n", indirect_dev->name, (uint32_t)*offset, count); return read_len; } - /* check flag is user spase or kernel spase */ - if (flag == USER_SPACE) { - INDIRECT_DEV_DEBUG("user space read, buf: %p, offset: %lld, read count %zu.\n", - buf, *offset, count); - if (copy_to_user(buf, val, read_len)) { - INDIRECT_DEV_ERROR("copy_to_user failed.\n"); - return -EFAULT; - } - } else { - INDIRECT_DEV_DEBUG("kernel space read, buf: %p, offset: %lld, read count %zu.\n", - buf, *offset, count); - memcpy(buf, val, read_len); + if (read_len == 0) { + DEBUG_VERBOSE("indirect dev read EOF, offset: 0x%llx, count: %zu\n", *offset, count); + return 0; } + DEBUG_VERBOSE("read, buf: %p, offset: %lld, read count %zu.\n", buf, *offset, count); + memcpy(buf, val, read_len); + *offset += read_len; ret = read_len; return ret; } -static ssize_t indirect_dev_read_user(struct file *file, char __user *buf, size_t count, loff_t *offset) -{ - int ret; - - INDIRECT_DEV_DEBUG("indirect_dev_read_user, file: %p, count: %lu, offset: %lld\n", - file, count, *offset); - ret = indirect_dev_read(file, buf, count, offset, USER_SPACE); - return ret; -} - - static ssize_t indirect_dev_read_iter(struct kiocb *iocb, struct iov_iter *to) { - int ret; - - INDIRECT_DEV_DEBUG("indirect_dev_read_iter, file: %p, count: %zu, offset: %lld\n", - iocb->ki_filp, to->count, iocb->ki_pos); - ret = indirect_dev_read(iocb->ki_filp, to->kvec->iov_base, to->count, &iocb->ki_pos, KERNEL_SPACE); - return ret; + DEBUG_VERBOSE("indirect_dev_read_iter, file: %p, count: %zu, offset: %lld\n", + iocb->ki_filp, iov_iter_count(to), iocb->ki_pos); + return wb_iov_iter_read(iocb, to, indirect_dev_read); } -static ssize_t indirect_dev_write(struct file *file, const char __user *buf, - size_t count, loff_t *offset, int flag) +static ssize_t indirect_dev_write(struct file *file, char *buf, + size_t count, loff_t *offset) { u8 val[MAX_RW_LEN]; int write_len; struct indirect_dev_info *indirect_dev; + char bsp_log_dev_name[BSP_LOG_DEV_NAME_MAX_LEN]; + char bsp_log_file_path[BSP_LOG_DEV_NAME_MAX_LEN]; + + if (offset == NULL || *offset < 0) { + DEBUG_ERROR("offset invalid, read failed.\n"); + return -EINVAL; + } indirect_dev = file->private_data; if (indirect_dev == NULL) { - INDIRECT_DEV_ERROR("get write private_data error.\n"); + DEBUG_ERROR("get write private_data error.\n"); return -EINVAL; } if (count == 0) { - INDIRECT_DEV_ERROR("Invalid params, write count is 0.\n"); + DEBUG_ERROR("Invalid params, write count is 0.\n"); return -EINVAL; } if (count > sizeof(val)) { - INDIRECT_DEV_DEBUG("write count %zu exceed max %zu.\n", count, sizeof(val)); + DEBUG_VERBOSE("write count %zu exceed max %zu.\n", count, sizeof(val)); count = sizeof(val); } mem_clear(val, sizeof(val)); - /* check flag is user spase or kernel spase */ - if (flag == USER_SPACE) { - INDIRECT_DEV_DEBUG("user space write, buf: %p, offset: %lld, write count %zu.\n", - buf, *offset, count); - if (copy_from_user(val, buf, count)) { - INDIRECT_DEV_ERROR("copy_from_user failed.\n"); - return -EFAULT; - } - } else { - INDIRECT_DEV_DEBUG("kernel space write, buf: %p, offset: %lld, write count %zu.\n", - buf, *offset, count); - memcpy(val, buf, count); + + DEBUG_VERBOSE("write, buf: %p, offset: %lld, write count %zu.\n", buf, *offset, count); + memcpy(val, buf, count); + + if (indirect_dev->log_node.log_num > 0) { + mem_clear(bsp_log_dev_name, sizeof(bsp_log_dev_name)); + mem_clear(bsp_log_file_path, sizeof(bsp_log_file_path)); + snprintf(bsp_log_dev_name, sizeof(bsp_log_dev_name), "[Devfs]"); + snprintf(bsp_log_file_path, sizeof(bsp_log_file_path), "%s.%s_bsp_key_reg", BSP_LOG_DIR, indirect_dev->name); + (void)wb_bsp_key_device_log(bsp_log_dev_name, bsp_log_file_path, WB_BSP_LOG_MAX, + &(indirect_dev->log_node), (uint32_t)*offset, val, count); } write_len = device_write(indirect_dev, (uint32_t)*offset, val, count); if (write_len < 0) { - INDIRECT_DEV_ERROR("indirect dev write failed, dev name:%s, offset:0x%llx, len:%zu.\n", + DEBUG_ERROR("indirect dev write failed, dev name:%s, offset:0x%llx, len:%zu.\n", indirect_dev->name, *offset, count); return write_len; } @@ -501,24 +434,11 @@ static ssize_t indirect_dev_write(struct file *file, const char __user *buf, return write_len; } -static ssize_t indirect_dev_write_user(struct file *file, const char __user *buf, size_t count, loff_t *offset) -{ - int ret; - - INDIRECT_DEV_DEBUG("indirect_dev_write_user, file: %p, count: %lu, offset: %lld\n", - file, count, *offset); - ret = indirect_dev_write(file, buf, count, offset, USER_SPACE); - return ret; -} - static ssize_t indirect_dev_write_iter(struct kiocb *iocb, struct iov_iter *from) { - int ret; - - INDIRECT_DEV_DEBUG("indirect_dev_write_iter, file: %p, count: %zu, offset: %lld\n", - iocb->ki_filp, from->count, iocb->ki_pos); - ret = indirect_dev_write(iocb->ki_filp, from->kvec->iov_base, from->count, &iocb->ki_pos, KERNEL_SPACE); - return ret; + DEBUG_VERBOSE("indirect_dev_write_iter, file: %p, count: %zu, offset: %lld\n", + iocb->ki_filp, iov_iter_count(from), iocb->ki_pos); + return wb_iov_iter_write(iocb, from, indirect_dev_write); } static loff_t indirect_dev_llseek(struct file *file, loff_t offset, int origin) @@ -528,19 +448,19 @@ static loff_t indirect_dev_llseek(struct file *file, loff_t offset, int origin) indirect_dev = file->private_data; if (indirect_dev == NULL) { - INDIRECT_DEV_ERROR("indirect_dev is NULL, llseek failed.\n"); + DEBUG_ERROR("indirect_dev is NULL, llseek failed.\n"); return -EINVAL; } switch (origin) { case SEEK_SET: if (offset < 0) { - INDIRECT_DEV_ERROR("SEEK_SET, offset:%lld, invalid.\n", offset); + DEBUG_ERROR("SEEK_SET, offset:%lld, invalid.\n", offset); ret = -EINVAL; break; } if (offset > indirect_dev->indirect_len) { - INDIRECT_DEV_ERROR("SEEK_SET out of range, offset:%lld, i2c_len:0x%x.\n", + DEBUG_ERROR("SEEK_SET out of range, offset:%lld, i2c_len:0x%x.\n", offset, indirect_dev->indirect_len); ret = - EINVAL; break; @@ -550,14 +470,16 @@ static loff_t indirect_dev_llseek(struct file *file, loff_t offset, int origin) break; case SEEK_CUR: if (((file->f_pos + offset) > indirect_dev->indirect_len) || ((file->f_pos + offset) < 0)) { - INDIRECT_DEV_ERROR("SEEK_CUR out of range, f_ops:%lld, offset:%lld.\n", + DEBUG_ERROR("SEEK_CUR out of range, f_ops:%lld, offset:%lld.\n", file->f_pos, offset); + ret = -EINVAL; + break; } file->f_pos += offset; ret = file->f_pos; break; default: - INDIRECT_DEV_ERROR("unsupport llseek type:%d.\n", origin); + DEBUG_ERROR("unsupport llseek type:%d.\n", origin); ret = -EINVAL; break; } @@ -569,24 +491,70 @@ static long indirect_dev_ioctl(struct file *file, unsigned int cmd, unsigned lon return 0; } -static int indirect_dev_open(struct inode *inode, struct file *file) +static int minor_to_dev(int minor, struct indirect_dev_info **indirect_dev) { - unsigned int minor = iminor(inode); - struct indirect_dev_info *indirect_dev; + int i; - if (minor >= MAX_INDIRECT_DEV_NUM) { - INDIRECT_DEV_ERROR("minor out of range, minor = %d.\n", minor); - return -ENODEV; + for (i = 0; i < MAX_DEV_NUM; i++) { + if (indirect_dev_arry[i] == NULL) { + continue; + } + if (indirect_dev_arry[i]->misc.minor == minor) { + *indirect_dev = indirect_dev_arry[i]; + return 0; + } } + return -ENODEV; +} - indirect_dev = indirect_dev_arry[minor]; - if (indirect_dev == NULL) { - INDIRECT_DEV_ERROR("indirect_dev is NULL, open failed, minor = %d\n", minor); - return -ENODEV; +static int add_dev_to_g_dev_list(struct indirect_dev_info *indirect_dev) +{ + int i; + unsigned long flags; + + spin_lock_irqsave(&dev_array_lock, flags); + for (i = 0; i < MAX_DEV_NUM; i++) { + if (indirect_dev_arry[i] == NULL) { + indirect_dev_arry[i] = indirect_dev; + spin_unlock_irqrestore(&dev_array_lock, flags); + return 0; + } } + spin_unlock_irqrestore(&dev_array_lock, flags); + return -EBUSY; +} - file->private_data = indirect_dev; +static int remove_dev_from_g_dev_list(int minor) +{ + int i; + unsigned long flags; + + spin_lock_irqsave(&dev_array_lock, flags); + for (i = 0; i < MAX_DEV_NUM; i++) { + if (indirect_dev_arry[i] == NULL) { + continue; + } + if (indirect_dev_arry[i]->misc.minor == minor) { + indirect_dev_arry[i] = NULL; + spin_unlock_irqrestore(&dev_array_lock, flags); + return 0; + } + } + spin_unlock_irqrestore(&dev_array_lock, flags); + return -ENODEV ; +} + +static int indirect_dev_open(struct inode *inode, struct file *file) +{ + unsigned int minor = iminor(inode); + struct indirect_dev_info *indirect_dev; + int ret; + ret = minor_to_dev(minor, &indirect_dev); + if (ret) { + return ret; + } + file->private_data = indirect_dev; return 0; } @@ -600,8 +568,6 @@ static int indirect_dev_release(struct inode *inode, struct file *file) static const struct file_operations indirect_dev_fops = { .owner = THIS_MODULE, .llseek = indirect_dev_llseek, - .read = indirect_dev_read_user, - .write = indirect_dev_write_user, .read_iter = indirect_dev_read_iter, .write_iter = indirect_dev_write_iter, .unlocked_ioctl = indirect_dev_ioctl, @@ -612,17 +578,17 @@ static const struct file_operations indirect_dev_fops = { static struct indirect_dev_info *dev_match(const char *path) { struct indirect_dev_info *indirect_dev; - char dev_name[DEV_NAME_LEN]; + char dev_name[MAX_NAME_SIZE]; int i; - for (i = 0; i < MAX_INDIRECT_DEV_NUM; i++) { + for (i = 0; i < MAX_DEV_NUM; i++) { if (indirect_dev_arry[i] == NULL) { continue; } indirect_dev = indirect_dev_arry[i]; - snprintf(dev_name, DEV_NAME_LEN,"/dev/%s", indirect_dev->name); + snprintf(dev_name, MAX_NAME_SIZE,"/dev/%s", indirect_dev->name); if (!strcmp(path, dev_name)) { - INDIRECT_DEV_DEBUG("get dev_name = %s, minor = %d\n", dev_name, i); + DEBUG_VERBOSE("get dev_name = %s, minor = %d\n", dev_name, i); return indirect_dev; } } @@ -636,24 +602,24 @@ int indirect_device_func_read(const char *path, uint32_t offset, uint8_t *buf, s int read_len; if (path == NULL) { - INDIRECT_DEV_ERROR("path NULL"); + DEBUG_ERROR("path NULL"); return -EINVAL; } if (buf == NULL) { - INDIRECT_DEV_ERROR("buf NULL"); + DEBUG_ERROR("buf NULL"); return -EINVAL; } indirect_dev = dev_match(path); if (indirect_dev == NULL) { - INDIRECT_DEV_ERROR("indirect_dev match failed. dev path = %s", path); + DEBUG_ERROR("indirect_dev match failed. dev path = %s", path); return -EINVAL; } read_len = device_read(indirect_dev, offset, buf, count); if (read_len < 0) { - INDIRECT_DEV_ERROR("indirect_dev_read_tmp failed, ret:%d.\n", read_len); + DEBUG_ERROR("indirect_dev_read_tmp failed, ret:%d.\n", read_len); } return read_len; } @@ -663,40 +629,574 @@ int indirect_device_func_write(const char *path, uint32_t offset, uint8_t *buf, { struct indirect_dev_info *indirect_dev; int write_len; + char bsp_log_dev_name[BSP_LOG_DEV_NAME_MAX_LEN]; + char bsp_log_file_path[BSP_LOG_DEV_NAME_MAX_LEN]; if (path == NULL) { - INDIRECT_DEV_ERROR("path NULL"); + DEBUG_ERROR("path NULL"); return -EINVAL; } if (buf == NULL) { - INDIRECT_DEV_ERROR("buf NULL"); + DEBUG_ERROR("buf NULL"); return -EINVAL; } indirect_dev = dev_match(path); if (indirect_dev == NULL) { - INDIRECT_DEV_ERROR("indirect_dev match failed. dev path = %s", path); + DEBUG_ERROR("indirect_dev match failed. dev path = %s", path); return -EINVAL; } + if (indirect_dev->log_node.log_num > 0) { + mem_clear(bsp_log_dev_name, sizeof(bsp_log_dev_name)); + mem_clear(bsp_log_file_path, sizeof(bsp_log_file_path)); + snprintf(bsp_log_dev_name, sizeof(bsp_log_dev_name), "[Symbol]"); + snprintf(bsp_log_file_path, sizeof(bsp_log_file_path), "%s.%s_bsp_key_reg", BSP_LOG_DIR, indirect_dev->name); + (void)wb_bsp_key_device_log(bsp_log_dev_name, bsp_log_file_path, WB_BSP_LOG_MAX, + &(indirect_dev->log_node), offset, buf, count); + } + write_len = device_write(indirect_dev, offset, buf, count); if (write_len < 0) { - INDIRECT_DEV_ERROR("indirect_dev_write_tmp failed, ret:%d.\n", write_len); + DEBUG_ERROR("indirect_dev_write_tmp failed, ret:%d.\n", write_len); } return write_len; } EXPORT_SYMBOL(indirect_device_func_write); +static ssize_t indirect_dev_attr_show(struct kobject *kobj, struct attribute *attr, char *buf) +{ + struct kobj_attribute *attribute; + + attribute = container_of(attr, struct kobj_attribute, attr); + + if (!attribute->show) { + DEBUG_ERROR("indirect dev attr show is null.\n"); + return -ENOSYS; + } + + return attribute->show(kobj, attribute, buf); +} + +static ssize_t indirect_dev_attr_store(struct kobject *kobj, struct attribute *attr, const char *buf, + size_t len) +{ + struct kobj_attribute *attribute; + + attribute = container_of(attr, struct kobj_attribute, attr); + + if (!attribute->store) { + DEBUG_ERROR("indirect dev attr store is null.\n"); + return -ENOSYS; + } + + return attribute->store(kobj, attribute, buf, len); +} + +static const struct sysfs_ops indirect_dev_sysfs_ops = { + .show = indirect_dev_attr_show, + .store = indirect_dev_attr_store, +}; + +static void indirect_dev_obj_release(struct kobject *kobj) +{ + return; +} + +static struct kobj_type indirect_dev_ktype = { + .sysfs_ops = &indirect_dev_sysfs_ops, + .release = indirect_dev_obj_release, +#if LINUX_VERSION_CODE < KERNEL_VERSION(6,0,0) + .default_attrs = NULL, +#endif +}; + +static ssize_t alias_show(struct kobject *kobj, struct kobj_attribute *attr, char *buf) +{ + wb_indirect_dev_t *indirect_dev = container_of(kobj, wb_indirect_dev_t, kobj); + + if (!indirect_dev) { + DEBUG_ERROR("alias show indirect dev is null.\n"); + return -ENODEV; + } + + mem_clear(buf, PAGE_SIZE); + return snprintf(buf, PAGE_SIZE, "%s\n", indirect_dev->alias); +} + +static ssize_t type_show(struct kobject *kobj, struct kobj_attribute *attr, char *buf) +{ + mem_clear(buf, PAGE_SIZE); + return snprintf(buf, PAGE_SIZE, "%s\n", MODULE_NAME); +} + +static ssize_t info_show(struct kobject *kobj, struct kobj_attribute *attr, char *buf) +{ + int offset; + ssize_t buf_len; + + wb_indirect_dev_t *indirect_dev = container_of(kobj, wb_indirect_dev_t, kobj); + if (!indirect_dev) { + DEBUG_ERROR("info show alias_show indirect dev is null.\n"); + return -ENODEV; + } + + mem_clear(buf, PAGE_SIZE); + offset = 0; + offset += scnprintf(buf + offset, PAGE_SIZE - offset, "name: %s\n", indirect_dev->name); + offset += scnprintf(buf + offset, PAGE_SIZE - offset, "alias: %s\n", indirect_dev->alias); + offset += scnprintf(buf + offset, PAGE_SIZE - offset, "dependent logic_dev_name: %s\n", indirect_dev->logic_dev_name); + offset += scnprintf(buf + offset, PAGE_SIZE - offset, "indirect_len: 0x%x\n", indirect_dev->indirect_len); + offset += scnprintf(buf + offset, PAGE_SIZE - offset, "wr_data reg: 0x%x\n", indirect_dev->wr_data); + offset += scnprintf(buf + offset, PAGE_SIZE - offset, "rd_data reg: 0x%x\n", indirect_dev->rd_data); + offset += scnprintf(buf + offset, PAGE_SIZE - offset, "opt_ctl reg: 0x%x\n", indirect_dev->opt_ctl); + offset += scnprintf(buf + offset, PAGE_SIZE - offset, "addr_high reg: 0x%x\n", indirect_dev->addr_high); + offset += scnprintf(buf + offset, PAGE_SIZE - offset, "addr_low reg: 0x%x\n", indirect_dev->addr_low); + offset += scnprintf(buf + offset, PAGE_SIZE - offset, "logic_func_mode: %u\n", indirect_dev->logic_func_mode); + offset += scnprintf(buf + offset, PAGE_SIZE - offset, "lock_mode reg: %u\n", indirect_dev->lock_mode); + buf_len = strlen(buf); + return buf_len; +} + +static ssize_t status_show(struct kobject *kobj, struct kobj_attribute *attr, char *buf) +{ + wb_indirect_dev_t *indirect_dev; + uint32_t type, len; + int ret; + + indirect_dev = container_of(kobj, wb_indirect_dev_t, kobj); + if (!indirect_dev) { + DEBUG_ERROR("Failed: status show param is NULL.\n"); + return -ENODEV; + } + + type = indirect_dev->status_check.status_check_type_bmp; + /* check logic dev support type */ + if (wb_logic_status_type_get_number(type) == 0) { + DEBUG_ERROR("unsupport dev status check.\n"); + return -EOPNOTSUPP; + } + + if (time_before(jiffies, indirect_dev->status_check.last_jiffies + msecs_to_jiffies(status_cache_ms))) { + /* Within the time range of status_cache_ms, directly return the last result */ + DEBUG_VERBOSE("time before last time %d ms return last status: %d\n", + status_cache_ms, indirect_dev->status_check.dev_status); + return sprintf(buf, "%u\n", indirect_dev->status_check.dev_status); + } + + indirect_dev->status_check.last_jiffies = jiffies; + + len = indirect_dev->data_bus_width; + if (len > MAX_DATA_WIDTH) { + DEBUG_ERROR("status show rw len:%u beyond max byte.\n", len); + return -EINVAL; + } + + mutex_lock(&indirect_dev->update_lock); + ret = wb_logic_dev_get_status(&indirect_dev->status_check, len, buf, PAGE_SIZE); + if (ret < 0) { + DEBUG_ERROR("wb_logic_dev_get_status fail. (ret %d)\n", ret); + } + mutex_unlock(&indirect_dev->update_lock); + + return ret; +} + +static ssize_t status_store(struct kobject *kobj, struct kobj_attribute *attr, const char *buf, size_t count) +{ + wb_indirect_dev_t *indirect_dev; + uint32_t val; + int ret; + uint32_t len; + + indirect_dev = container_of(kobj, wb_indirect_dev_t, kobj); + if (!indirect_dev) { + DEBUG_ERROR("status_store param is null.\n"); + return -ENODEV; + } + + val = 0; + ret = kstrtou32(buf, 0, &val); + if (ret) { + DEBUG_ERROR("Invaild input value [%s], errno: %d\n", buf, ret); + return -EINVAL; + } + + len = indirect_dev->data_bus_width; + if (len > MAX_DATA_WIDTH) { + DEBUG_ERROR("status store rw len:%u beyond max byte.\n", len); + return -EINVAL; + } + + DEBUG_INFO("status store len:%u val:0x%x.\n", len, val); + + mutex_lock(&indirect_dev->update_lock); + ret = wb_logic_clear_status(&indirect_dev->status_check, len, val); + if (ret < 0) { + DEBUG_ERROR("wb_logic_clear_status fail. (ret %d)\n", ret); + } else { + ret = count; + } + mutex_unlock(&indirect_dev->update_lock); + + return ret; +} + +static ssize_t status_show_with_type(struct kobject *kobj, struct kobj_attribute *attr, char *buf, uint32_t type) +{ + wb_indirect_dev_t *indirect_dev; + uint32_t len; + int ret; + + indirect_dev = container_of(kobj, wb_indirect_dev_t, kobj); + if (!indirect_dev) { + DEBUG_ERROR("Failed: status show param is NULL.\n"); + return -ENODEV; + } + + /* Input parameter detection, only one type */ + if (wb_logic_status_type_get_number(type) != 1) { + DEBUG_ERROR("unsupport dev status check. type 0x%x\n", type); + return -EOPNOTSUPP; + } + + ret = wb_logic_get_cache_status_with_type(&indirect_dev->status_check, type, status_cache_ms, buf, PAGE_SIZE); + if (ret > 0) { + /* use cache status */ + DEBUG_VERBOSE("use cache status return %d, type %d\n", ret, type); + return ret; + } else if (ret == 0) { + /* do nothing */ + DEBUG_VERBOSE("not use cache status\n"); + } else { + /* get cache status fail */ + DEBUG_VERBOSE("wb_logic_get_cache_status_with_type fail, ret %d, type %d\n", ret, type); + return ret; + } + + len = indirect_dev->data_bus_width; + if (len > MAX_DATA_WIDTH) { + DEBUG_ERROR("status show rw len:%u beyond max 4 byte.\n", len); + return -EINVAL; + } + + mutex_lock(&indirect_dev->update_lock); + ret = wb_logic_dev_get_status_with_type(&indirect_dev->status_check, len, buf, PAGE_SIZE, type); + if (ret < 0) { + DEBUG_ERROR("wb_logic_dev_get_status fail. (ret %d)\n", ret); + } + mutex_unlock(&indirect_dev->update_lock); + + return ret; +} + +static ssize_t status_seu_show(struct kobject *kobj, struct kobj_attribute *attr, char *buf) +{ + return status_show_with_type(kobj, attr, buf, STATUS_CHECK_SEU); +} + +static ssize_t status_selftest_show(struct kobject *kobj, struct kobj_attribute *attr, char *buf) +{ + return status_show_with_type(kobj, attr, buf, STATUS_CHECK_SELFTEST); +} + +static ssize_t status_scratch_show(struct kobject *kobj, struct kobj_attribute *attr, char *buf) +{ + return status_show_with_type(kobj, attr, buf, STATUS_CHECK_SCRATCH); +} + +static ssize_t status_cram_show(struct kobject *kobj, struct kobj_attribute *attr, char *buf) +{ + return status_show_with_type(kobj, attr, buf, STATUS_CHECK_CRAM); +} + +static ssize_t file_cache_rd_show(struct kobject *kobj, struct kobj_attribute *attr, char *buf) +{ + wb_indirect_dev_t *indirect_dev = container_of(kobj, wb_indirect_dev_t, kobj); + + if (!indirect_dev) { + DEBUG_ERROR("file_cache_rd_show indirect dev is null.\n"); + return -ENODEV; + } + + mem_clear(buf, PAGE_SIZE); + return snprintf(buf, PAGE_SIZE, "%u\n", indirect_dev->file_cache_rd); +} + +static ssize_t file_cache_rd_store(struct kobject *kobj, struct kobj_attribute *attr, const char *buf, size_t count) +{ + wb_indirect_dev_t *indirect_dev = container_of(kobj, wb_indirect_dev_t, kobj); + u8 val; + int ret; + + if (!indirect_dev) { + DEBUG_ERROR("file_cache_rd_store indirect dev is null.\n"); + return -ENODEV; + } + + val = 0; + ret = kstrtou8(buf, 0, &val); + if (ret) { + DEBUG_ERROR("Invaild input value [%s], errno: %d\n", buf, ret); + return -EINVAL; + } + indirect_dev->file_cache_rd = val; + + return count; +} + +static ssize_t file_cache_wr_show(struct kobject *kobj, struct kobj_attribute *attr, char *buf) +{ + wb_indirect_dev_t *indirect_dev = container_of(kobj, wb_indirect_dev_t, kobj); + + if (!indirect_dev) { + DEBUG_ERROR("file_cache_wr_show indirect dev is null.\n"); + return -ENODEV; + } + + mem_clear(buf, PAGE_SIZE); + return snprintf(buf, PAGE_SIZE, "%d\n", indirect_dev->file_cache_wr); +} + +static ssize_t file_cache_wr_store(struct kobject *kobj, struct kobj_attribute *attr, const char *buf, size_t count) +{ + wb_indirect_dev_t *indirect_dev = container_of(kobj, wb_indirect_dev_t, kobj); + u8 val; + int ret; + + if (!indirect_dev) { + DEBUG_ERROR("file_cache_wr_store indirect dev is null.\n"); + return -ENODEV; + } + + val = 0; + ret = kstrtou8(buf, 0, &val); + if (ret) { + DEBUG_ERROR("Invaild input value [%s], errno: %d\n", buf, ret); + return -EINVAL; + } + indirect_dev->file_cache_wr = val; + + return count; +} + +static ssize_t cache_file_path_show(struct kobject *kobj, struct kobj_attribute *attr, char *buf) +{ + wb_indirect_dev_t *indirect_dev = container_of(kobj, wb_indirect_dev_t, kobj); + + if (!indirect_dev) { + DEBUG_ERROR("cache_file_path_show indirect dev is null.\n"); + return -ENODEV; + } + + mem_clear(buf, PAGE_SIZE); + return snprintf(buf, PAGE_SIZE, "%s\n", indirect_dev->cache_file_path); +} + +static ssize_t mask_file_path_show(struct kobject *kobj, struct kobj_attribute *attr, char *buf) +{ + wb_indirect_dev_t *indirect_dev = container_of(kobj, wb_indirect_dev_t, kobj); + + if (!indirect_dev) { + DEBUG_ERROR("mask_file_path_show indirect dev is null.\n"); + return -ENODEV; + } + + mem_clear(buf, PAGE_SIZE); + return snprintf(buf, PAGE_SIZE, "%s\n", indirect_dev->mask_file_path); +} + +static struct kobj_attribute alias_attribute = __ATTR(alias, S_IRUGO, alias_show, NULL); +static struct kobj_attribute type_attribute = __ATTR(type, S_IRUGO, type_show, NULL); +static struct kobj_attribute info_attribute = __ATTR(info, S_IRUGO, info_show, NULL); +static struct kobj_attribute status_attribute = __ATTR(status, S_IRUGO | S_IWUSR, status_show, status_store); +static struct kobj_attribute seu_status_attribute = __ATTR(seu_status, S_IRUGO, status_seu_show, NULL); +static struct kobj_attribute selftest_status_attribute = __ATTR(selftest_status, S_IRUGO, status_selftest_show, NULL); +static struct kobj_attribute scratch_status_attribute = __ATTR(scratch_status, S_IRUGO, status_scratch_show, NULL); +static struct kobj_attribute cram_status_attribute = __ATTR(cram_status, S_IRUGO, status_cram_show, NULL); +static struct kobj_attribute file_cache_rd_attribute = __ATTR(file_cache_rd, S_IRUGO | S_IWUSR, file_cache_rd_show, file_cache_rd_store); +static struct kobj_attribute file_cache_wr_attribute = __ATTR(file_cache_wr, S_IRUGO | S_IWUSR, file_cache_wr_show, file_cache_wr_store); +static struct kobj_attribute cache_file_path_attribute = __ATTR(cache_file_path, S_IRUGO, cache_file_path_show, NULL); +static struct kobj_attribute mask_file_path_attribute = __ATTR(mask_file_path, S_IRUGO, mask_file_path_show, NULL); + +static struct attribute *indirect_dev_attrs[] = { + &alias_attribute.attr, + &type_attribute.attr, + &info_attribute.attr, + &status_attribute.attr, + &file_cache_rd_attribute.attr, + &file_cache_wr_attribute.attr, + &cache_file_path_attribute.attr, + &mask_file_path_attribute.attr, + &seu_status_attribute.attr, + &selftest_status_attribute.attr, + &scratch_status_attribute.attr, + &cram_status_attribute.attr, + NULL, +}; + +static struct attribute_group indirect_dev_attr_group = { + .attrs = indirect_dev_attrs, +}; + +static int of_indirect_dev_config_init(struct platform_device *pdev, struct indirect_dev_info *indirect_dev) +{ + int i, ret; + + ret = 0; + ret += of_property_read_string(pdev->dev.of_node, "dev_name", &indirect_dev->name); + ret += of_property_read_string(pdev->dev.of_node, "logic_dev_name", &indirect_dev->logic_dev_name); + ret += of_property_read_u32(pdev->dev.of_node, "addr_low", &indirect_dev->addr_low); + ret += of_property_read_u32(pdev->dev.of_node, "data_bus_width", &indirect_dev->data_bus_width); + ret += of_property_read_u32(pdev->dev.of_node, "addr_high", &indirect_dev->addr_high); + ret += of_property_read_u32(pdev->dev.of_node, "wr_data", &indirect_dev->wr_data); + ret += of_property_read_u32(pdev->dev.of_node, "rd_data", &indirect_dev->rd_data); + ret += of_property_read_u32(pdev->dev.of_node, "opt_ctl", &indirect_dev->opt_ctl); + ret += of_property_read_u32(pdev->dev.of_node, "indirect_len", &indirect_dev->indirect_len); + ret += of_property_read_u32(pdev->dev.of_node, "logic_func_mode", &indirect_dev->logic_func_mode); + if (ret != 0) { + dev_err(&pdev->dev, "Failed to get dts config, ret:%d.\n", ret); + return -ENXIO; + } + + if (of_property_read_string(pdev->dev.of_node, "dev_alias", &indirect_dev->alias)) { + indirect_dev->alias = indirect_dev->name; + } + + if (indirect_dev->data_bus_width == 0) { + dev_err(&pdev->dev, "Invalid data_bus_width: %u\n", indirect_dev->data_bus_width); + return -EINVAL; + } + + if (of_property_read_u32(pdev->dev.of_node, "lock_mode", &indirect_dev->lock_mode)) { + /* lock_mode can not set, default use spin lock */ + indirect_dev->lock_mode = WB_SPIN_LOCK_MODE; + } + + if ((indirect_dev->lock_mode != WB_SPIN_LOCK_MODE) + && (indirect_dev->lock_mode != WB_MUTEX_LOCK_MODE)) { + dev_err(&pdev->dev, "Invalid lock_mode: %u\n", indirect_dev->lock_mode); + return -EINVAL; + } + + ret = of_dev_status_check_config_init(&pdev->dev, &indirect_dev->status_check, indirect_dev->data_bus_width, + indirect_device_func_read, indirect_device_func_write, indirect_dev->name); + if (ret != 0) { + dev_err(&pdev->dev, "status_check_config_init fail: %d\n", ret); + return -EINVAL; + } + + ret = of_property_read_u32(pdev->dev.of_node, "log_num", &(indirect_dev->log_node.log_num)); + if (ret == 0) { + if ((indirect_dev->log_node.log_num > BSP_KEY_DEVICE_NUM_MAX) || (indirect_dev->log_node.log_num == 0)) { + dev_err(&pdev->dev, "Invalid log_num: %u\n", indirect_dev->log_node.log_num); + return -EINVAL; + } + ret = of_property_read_u32_array(pdev->dev.of_node, "log_index", indirect_dev->log_node.log_index, indirect_dev->log_node.log_num); + if (ret != 0) { + dev_err(&pdev->dev, "Failed to get log_index config, ret: %d\n", ret); + return -EINVAL; + } + for (i = 0; i < indirect_dev->log_node.log_num; i++) { + DEBUG_VERBOSE("log_index[%d] address = 0x%x\n", i, indirect_dev->log_node.log_index[i]); + } + } else { + DEBUG_VERBOSE("Don't support bsp key record.\n"); + indirect_dev->log_node.log_num = 0; + } + + DEBUG_VERBOSE("dev_name: %s, dev_alias: %s, logic_dev_name: %s, indirect_len: 0x%x, data_bus_width: %u, logic_func_mode: %d\n", + indirect_dev->name, indirect_dev->alias, indirect_dev->logic_dev_name, indirect_dev->indirect_len, + indirect_dev->data_bus_width, indirect_dev->logic_func_mode); + DEBUG_VERBOSE("wr_data: 0x%x, rd_data: 0x%x, addr_low: 0x%x, addr_high: 0x%x, opt_ctl: 0x%x, lock_mode: %u\n", + indirect_dev->wr_data, indirect_dev->rd_data, indirect_dev->addr_low, + indirect_dev->addr_high, indirect_dev->opt_ctl, indirect_dev->lock_mode); + return 0; +} + +static int indirect_dev_config_init(struct platform_device *pdev, struct indirect_dev_info *indirect_dev) +{ + int i; + indirect_dev_device_t *indirect_dev_device; + int ret; + + if (pdev->dev.platform_data == NULL) { + dev_err(&pdev->dev, "Failed to get platform data config.\n"); + return -ENXIO; + } + + indirect_dev_device = pdev->dev.platform_data; + indirect_dev->name = indirect_dev_device->dev_name; + indirect_dev->logic_dev_name = indirect_dev_device->logic_dev_name; + indirect_dev->data_bus_width = indirect_dev_device->data_bus_width; + indirect_dev->wr_data = indirect_dev_device->wr_data; + indirect_dev->addr_low = indirect_dev_device->addr_low; + indirect_dev->addr_high = indirect_dev_device->addr_high; + indirect_dev->rd_data = indirect_dev_device->rd_data; + indirect_dev->opt_ctl = indirect_dev_device->opt_ctl; + indirect_dev->indirect_len = indirect_dev_device->indirect_len; + indirect_dev->logic_func_mode = indirect_dev_device->logic_func_mode; + indirect_dev->lock_mode = indirect_dev_device->lock_mode; + if (strlen(indirect_dev_device->dev_alias) == 0) { + indirect_dev->alias = indirect_dev->name; + } else { + indirect_dev->alias = indirect_dev_device->dev_alias; + } + + if (indirect_dev->data_bus_width == 0) { + dev_err(&pdev->dev, "Invalid data_bus_width: %u\n", indirect_dev->data_bus_width); + return -EINVAL; + } + + if (indirect_dev->lock_mode == 0) { + /* lock_mode can not set, default use spin lock */ + indirect_dev->lock_mode = WB_SPIN_LOCK_MODE; + } + + if ((indirect_dev->lock_mode != WB_SPIN_LOCK_MODE) + && (indirect_dev->lock_mode != WB_MUTEX_LOCK_MODE)) { + dev_err(&pdev->dev, "Invalid lock_mode: %u\n", indirect_dev->lock_mode); + return -EINVAL; + } + + ret = platform_dev_status_check_config_init(&pdev->dev, &indirect_dev->status_check, indirect_dev->data_bus_width, &indirect_dev_device->status_check, + indirect_device_func_read, indirect_device_func_write, indirect_dev->name); + if (ret != 0) { + dev_err(&pdev->dev, "platform status_check_config_init fail: %d\n", ret); + return -EINVAL; + } + + indirect_dev->log_node.log_num = indirect_dev_device->log_num; + if (indirect_dev->log_node.log_num != 0) { + if (indirect_dev->log_node.log_num > BSP_KEY_DEVICE_NUM_MAX) { + dev_err(&pdev->dev, "Invalid log_num: %u\n", indirect_dev->log_node.log_num); + return -EINVAL; + } + for (i = 0; i < indirect_dev->log_node.log_num; i++) { + indirect_dev->log_node.log_index[i] = indirect_dev_device->log_index[i]; + DEBUG_VERBOSE("log_index[%d] address = 0x%x\n", i, indirect_dev->log_node.log_index[i]); + } + } else { + DEBUG_VERBOSE("Don't support bsp key record.\n"); + } + + DEBUG_VERBOSE("dev_name: %s, dev_alias: %s, logic_dev_name: %s, indirect_len: 0x%x, data_bus_width: %u, logic_func_mode: %d\n", + indirect_dev->name, indirect_dev->alias, indirect_dev->logic_dev_name, indirect_dev->indirect_len, + indirect_dev->data_bus_width, indirect_dev->logic_func_mode); + DEBUG_VERBOSE("wr_data: 0x%x, rd_data: 0x%x, addr_low: 0x%x, addr_high: 0x%x, opt_ctl: 0x%x, lock_mode: %u\n", + indirect_dev->wr_data, indirect_dev->rd_data, indirect_dev->addr_low, + indirect_dev->addr_high, indirect_dev->opt_ctl, indirect_dev->lock_mode); + return 0; +} static int wb_indirect_dev_probe(struct platform_device *pdev) { int ret; struct indirect_dev_info *indirect_dev; struct miscdevice *misc; - indirect_dev_device_t *indirect_dev_device; - INDIRECT_DEV_DEBUG("wb_indirect_dev_probe\n"); + DEBUG_VERBOSE("wb_indirect_dev_probe\n"); indirect_dev = devm_kzalloc(&pdev->dev, sizeof(struct indirect_dev_info), GFP_KERNEL); if (!indirect_dev) { @@ -704,129 +1204,122 @@ static int wb_indirect_dev_probe(struct platform_device *pdev) return -ENOMEM; } - platform_set_drvdata(pdev, indirect_dev); - indirect_dev->dev = &pdev->dev; - if (pdev->dev.of_node) { - ret = 0; - ret += of_property_read_string(pdev->dev.of_node, "dev_name", &indirect_dev->name); - ret += of_property_read_string(pdev->dev.of_node, "logic_dev_name", &indirect_dev->logic_dev_name); - ret += of_property_read_u32(pdev->dev.of_node, "addr_low", &indirect_dev->addr_low); - ret += of_property_read_u32(pdev->dev.of_node, "data_bus_width", &indirect_dev->data_bus_width); - ret += of_property_read_u32(pdev->dev.of_node, "addr_bus_width", &indirect_dev->addr_bus_width); - ret += of_property_read_u32(pdev->dev.of_node, "addr_high", &indirect_dev->addr_high); - ret += of_property_read_u32(pdev->dev.of_node, "wr_data", &indirect_dev->wr_data); - ret += of_property_read_u32(pdev->dev.of_node, "rd_data", &indirect_dev->rd_data); - ret += of_property_read_u32(pdev->dev.of_node, "opt_ctl", &indirect_dev->opt_ctl); - ret += of_property_read_u32(pdev->dev.of_node, "indirect_len", &indirect_dev->indirect_len); - ret += of_property_read_u32(pdev->dev.of_node, "logic_func_mode", &indirect_dev->logic_func_mode); - - if (of_property_read_u32(pdev->dev.of_node, "wr_data_width", &indirect_dev->wr_data_width)) { - /* dts have no wr_data_width,set default 1 */ - indirect_dev->wr_data_width = WIDTH_1Byte; - } - if (of_property_read_u32(pdev->dev.of_node, "rd_data_width", &indirect_dev->rd_data_width)) { - /* dts have no rd_data_width,set default 1 */ - indirect_dev->rd_data_width = WIDTH_1Byte; - } - if (ret != 0) { - dev_err(&pdev->dev, "dts config error.ret:%d.\n", ret); - return -ENXIO; - } + ret = of_indirect_dev_config_init(pdev, indirect_dev); } else { - if (pdev->dev.platform_data == NULL) { - dev_err(&pdev->dev, "Failed to get platform data config.\n"); - return -ENXIO; - } - indirect_dev_device = pdev->dev.platform_data; - indirect_dev->name = indirect_dev_device->dev_name; - indirect_dev->logic_dev_name = indirect_dev_device->logic_dev_name; - indirect_dev->data_bus_width = indirect_dev_device->data_bus_width; - indirect_dev->addr_bus_width = indirect_dev_device->addr_bus_width; - indirect_dev->wr_data = indirect_dev_device->wr_data; - indirect_dev->wr_data_width = indirect_dev_device->wr_data_width; - indirect_dev->addr_low = indirect_dev_device->addr_low; - indirect_dev->addr_high = indirect_dev_device->addr_high; - indirect_dev->rd_data = indirect_dev_device->rd_data; - indirect_dev->rd_data_width = indirect_dev_device->rd_data_width; - indirect_dev->opt_ctl = indirect_dev_device->opt_ctl; - indirect_dev->indirect_len = indirect_dev_device->indirect_len; - indirect_dev->logic_func_mode = indirect_dev_device->logic_func_mode; - } - - switch (indirect_dev->logic_func_mode) { - case SYMBOL_I2C_DEV_MODE: - indirect_dev->write_intf_addr = (unsigned long)kallsyms_lookup_name_fun("i2c_device_func_write"); - indirect_dev->read_intf_addr = (unsigned long)kallsyms_lookup_name_fun("i2c_device_func_read"); - break; - case SYMBOL_SPI_DEV_MODE: - indirect_dev->write_intf_addr = (unsigned long)kallsyms_lookup_name_fun("spi_device_func_write"); - indirect_dev->read_intf_addr = (unsigned long)kallsyms_lookup_name_fun("spi_device_func_read"); - break; - case SYMBOL_IO_DEV_MODE: - indirect_dev->write_intf_addr = (unsigned long)kallsyms_lookup_name_fun("io_device_func_write"); - indirect_dev->read_intf_addr = (unsigned long)kallsyms_lookup_name_fun("io_device_func_read"); - break; - case SYMBOL_PCIE_DEV_MODE: - indirect_dev->write_intf_addr = (unsigned long)kallsyms_lookup_name_fun("pcie_device_func_write"); - indirect_dev->read_intf_addr = (unsigned long)kallsyms_lookup_name_fun("pcie_device_func_read"); - break; - case FILE_MODE: - indirect_dev->write_intf_addr = (unsigned long)wb_dev_file_write; - indirect_dev->read_intf_addr = (unsigned long)wb_dev_file_read; - break; - default: - dev_err(&pdev->dev, "func mode %d don't support.\n", indirect_dev->logic_func_mode); - return -EINVAL; + ret = indirect_dev_config_init(pdev, indirect_dev); + } + + if (ret < 0) { + return ret; + } + + ret = wb_logic_lock_mode_check(indirect_dev->lock_mode, indirect_dev->logic_func_mode); + if (ret != 0) { + dev_err(&pdev->dev, "Invalid lock mode %u for func mode %u\n", indirect_dev->lock_mode, indirect_dev->logic_func_mode); + return ret; + } + + ret = find_intf_addr(&indirect_dev->write_intf_addr, &indirect_dev->read_intf_addr, indirect_dev->logic_func_mode); + if (ret) { + dev_err(&pdev->dev, "Failed to find_intf_addr func mode %u, ret: %d\n", indirect_dev->logic_func_mode, ret); + return ret; } if (!indirect_dev->write_intf_addr || !indirect_dev->read_intf_addr) { - dev_err(&pdev->dev, "Fail: func mode %u rw symbol undefined.\n", indirect_dev->logic_func_mode); + dev_err(&pdev->dev, "Fail: func mode %u rw symbol undefined\n", indirect_dev->logic_func_mode); return -ENOSYS; } - /* TODO: data_bus_width unuse now, need judge in rd or wr */ - dev_info(&pdev->dev, "register indirect device %s success. logic_dev_name: %s, indirect_len: 0x%x, data_bus_width: 0x%x, dependent dev: 0x%x, wr_data: 0x%x, wr_data_width: %d, \ - rd_data: 0x%x, rd_data_width: %d, addr_low: 0x%x, addr_high: 0x%x, opt_ctl: 0x%x, logic_func_mode: %d\n", indirect_dev->name, indirect_dev->logic_dev_name, indirect_dev->indirect_len, indirect_dev->data_bus_width, \ - indirect_dev->addr_bus_width, indirect_dev->wr_data, indirect_dev->wr_data_width, indirect_dev->rd_data, indirect_dev->rd_data_width, indirect_dev->addr_low, indirect_dev->addr_high,\ - indirect_dev->opt_ctl, indirect_dev->logic_func_mode); + mutex_init(&indirect_dev->update_lock); + mutex_init(&indirect_dev->log_node.file_lock); + + indirect_dev->file_cache_rd = 0; + indirect_dev->file_cache_wr = 0; + snprintf(indirect_dev->cache_file_path, sizeof(indirect_dev->cache_file_path), CACHE_FILE_PATH, indirect_dev->name); + snprintf(indirect_dev->mask_file_path, sizeof(indirect_dev->mask_file_path), MASK_FILE_PATH, indirect_dev->name); + + /* creat parent dir by dev name in /sys/logic_dev */ + ret = kobject_init_and_add(&indirect_dev->kobj, &indirect_dev_ktype, logic_dev_kobj, "%s", indirect_dev->name); + if (ret) { + kobject_put(&indirect_dev->kobj); + dev_err(&pdev->dev, "Failed to creat parent dir: %s, ret: %d\n", indirect_dev->name, ret); + return ret; + } + + indirect_dev->sysfs_group = &indirect_dev_attr_group; + ret = sysfs_create_group(&indirect_dev->kobj, indirect_dev->sysfs_group); + if (ret) { + dev_err(&pdev->dev, "Failed to create %s sysfs group, ret: %d\n", indirect_dev->name, ret); + goto remove_parent_kobj; + } + platform_set_drvdata(pdev, indirect_dev); misc = &indirect_dev->misc; misc->minor = MISC_DYNAMIC_MINOR; misc->name = indirect_dev->name; misc->fops = &indirect_dev_fops; misc->mode = 0666; if (misc_register(misc) != 0) { - dev_err(&pdev->dev, "register %s faild.\n", misc->name); - return -ENXIO; + dev_err(&pdev->dev, "Failed to register %s device\n", misc->name); + ret = -ENXIO; + goto remove_sysfs_group; } - if (misc->minor >= MAX_INDIRECT_DEV_NUM) { - dev_err(&pdev->dev, "minor number beyond the limit! is %d.\n", misc->minor); - misc_deregister(misc); - return -ENXIO; + ret = add_dev_to_g_dev_list(indirect_dev); + if (ret) { + dev_err(&pdev->dev, "Failed to add_dev_to_g_dev_list, ret: %d\n", ret); + goto deregister_misc; + } + + wb_dev_lock_init(indirect_dev); + + dev_info(&pdev->dev, "Register indirect device %s success, logic_dev_name: %s, indirect_len: 0x%x, data_bus_width: %u, logic_func_mode: %u, lock_mode: %u\n", + indirect_dev->name, indirect_dev->logic_dev_name, indirect_dev->indirect_len, + indirect_dev->data_bus_width, indirect_dev->logic_func_mode, indirect_dev->lock_mode); + + ret = wb_logic_check_status_hw_init(&indirect_dev->status_check, indirect_dev->data_bus_width); + if (ret != 0) { + dev_err(&pdev->dev, "Failed to wb_logic_check_status_hw_init, ret: %d\n", ret); } - spin_lock_init(&indirect_dev->indirect_dev_lock); - indirect_dev_arry[misc->minor] = indirect_dev; - dev_info(&pdev->dev, "register indirect device %s success.\n", indirect_dev->name); return 0; +deregister_misc: + misc_deregister(misc); +remove_sysfs_group: + sysfs_remove_group(&indirect_dev->kobj, (const struct attribute_group *)indirect_dev->sysfs_group); +remove_parent_kobj: + kobject_put(&indirect_dev->kobj); + return ret; } +#if LINUX_VERSION_CODE >= KERNEL_VERSION(6,11,0) +static void wb_indirect_dev_remove(struct platform_device *pdev) +#else static int wb_indirect_dev_remove(struct platform_device *pdev) +#endif { - int i; + int minor; + wb_indirect_dev_t *indirect_dev; - for (i = 0; i < MAX_INDIRECT_DEV_NUM; i++) { - if (indirect_dev_arry[i] != NULL) { - if (indirect_dev_arry[i]->dev == &pdev->dev) { - misc_deregister(&indirect_dev_arry[i]->misc); - indirect_dev_arry[i] = NULL; - return 0; - } - } + indirect_dev = platform_get_drvdata(pdev); + minor = indirect_dev->misc.minor; + + dev_dbg(&pdev->dev, "misc_deregister %s, minor: %d\n", indirect_dev->misc.name, minor); + misc_deregister(&indirect_dev->misc); + remove_dev_from_g_dev_list(minor); + + if (indirect_dev->sysfs_group) { + dev_dbg(&pdev->dev, "Unregister %s indirect_dev sysfs group\n", indirect_dev->name); + sysfs_remove_group(&indirect_dev->kobj, (const struct attribute_group *)indirect_dev->sysfs_group); + kobject_put(&indirect_dev->kobj); } + + dev_info(&pdev->dev, "Remove %s indirect device success.\n", indirect_dev->name); + platform_set_drvdata(pdev, NULL); +#if LINUX_VERSION_CODE < KERNEL_VERSION(6,11,0) return 0; +#endif } static const struct of_device_id wb_indirect_dev_driver_of_match[] = { @@ -846,14 +1339,6 @@ static struct platform_driver wb_indirect_dev_driver = { static int __init wb_indirect_dev_init(void) { - int ret; - - ret = find_kallsyms_lookup_name(); - if (ret < 0) { - INDIRECT_DEV_ERROR("find kallsyms_lookup_name failed\n"); - return -ENXIO; - } - INDIRECT_DEV_DEBUG("find kallsyms_lookup_name ok\n"); return platform_driver_register(&wb_indirect_dev_driver); } diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_indirect_dev.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_indirect_dev.h index bc2570f5279..48df82fcb05 100644 --- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_indirect_dev.h +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_indirect_dev.h @@ -1,5 +1,5 @@ /* - * A header definition for wb_indirect_dev driver + * An wb_indirect_dev driver for indirect adapter device function * * Copyright (C) 2024 Micas Networks Inc. * @@ -20,35 +20,25 @@ #ifndef __WB_INDIRECT_DEV_H__ #define __WB_INDIRECT_DEV_H__ - -#include - -#define DEV_NAME_LEN (64) -#define WIDTH_1Byte (1) -#define WIDTH_2Byte (2) -#define WIDTH_4Byte (4) -#define MAX_RW_LEN (256) - -#define mem_clear(data, size) memset((data), 0, (size)) - -typedef int (*device_func_write)(const char *, uint32_t, uint8_t *, size_t); -typedef int (*device_func_read)(const char *, uint32_t, uint8_t *, size_t ); +#include typedef struct indirect_dev_device_s { - char dev_name[DEV_NAME_LEN]; - char logic_dev_name[DEV_NAME_LEN]; + char dev_name[MAX_NAME_SIZE]; + char dev_alias[MAX_NAME_SIZE]; + char logic_dev_name[MAX_NAME_SIZE]; uint32_t data_bus_width; - uint32_t addr_bus_width; uint32_t indirect_len; uint32_t wr_data; - uint32_t wr_data_width; uint32_t addr_low; uint32_t addr_high; uint32_t rd_data; - uint32_t rd_data_width; uint32_t opt_ctl; uint32_t logic_func_mode; + uint32_t lock_mode; int device_flag; + uint32_t log_num; /* The number of write record registers is 64 at most */ + uint32_t log_index[BSP_KEY_DEVICE_NUM_MAX]; /* Write record register address = (base_addr & 0xFFFF) | (len << 16) */ + device_status_check_t status_check; } indirect_dev_device_t; #endif /* __WB_INDIRECT_DEV_H__ */ diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_io_dev.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_io_dev.c index 6699397aa4b..b6287417a6c 100644 --- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_io_dev.c +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_io_dev.c @@ -24,6 +24,7 @@ #include #include #include +#include #include #include #include @@ -31,6 +32,7 @@ #include #include #include +#include #include "wb_io_dev.h" @@ -638,7 +640,11 @@ static int io_dev_probe(struct platform_device *pdev) return 0; } +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 11, 0) static int io_dev_remove(struct platform_device *pdev) +#else +static void io_dev_remove(struct platform_device *pdev) +#endif { int i; @@ -648,8 +654,9 @@ static int io_dev_remove(struct platform_device *pdev) io_dev_arry[i] = NULL; } } - +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 11, 0) return 0; +#endif } static struct of_device_id io_dev_match[] = { diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_lm75.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_lm75.c new file mode 100644 index 00000000000..212a69cf992 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_lm75.c @@ -0,0 +1,992 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * lm75.c - Part of lm_sensors, Linux kernel modules for hardware + * monitoring + * Copyright (c) 1998, 1999 Frodo Looijaard + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "wb_lm75.h" + +/* + * This driver handles the LM75 and compatible digital temperature sensors. + */ + +enum lm75_type { /* keep sorted in alphabetical order */ + adt75, + ds1775, + ds75, + ds7505, + g751, + lm75, + lm75a, + lm75b, + max6625, + max6626, + max31725, + mcp980x, + pct2075, + stds75, + stlm75, + tcn75, + tmp100, + tmp101, + tmp105, + tmp112, + tmp175, + tmp275, + tmp75, + tmp75b, + tmp75c, +}; + +/** + * struct lm75_params - lm75 configuration parameters. + * @set_mask: Bits to set in configuration register when configuring + * the chip. + * @clr_mask: Bits to clear in configuration register when configuring + * the chip. + * @default_resolution: Default number of bits to represent the temperature + * value. + * @resolution_limits: Limit register resolution. Optional. Should be set if + * the resolution of limit registers does not match the + * resolution of the temperature register. + * @resolutions: List of resolutions associated with sample times. + * Optional. Should be set if num_sample_times is larger + * than 1, and if the resolution changes with sample times. + * If set, number of entries must match num_sample_times. + * @default_sample_time:Sample time to be set by default. + * @num_sample_times: Number of possible sample times to be set. Optional. + * Should be set if the number of sample times is larger + * than one. + * @sample_times: All the possible sample times to be set. Mandatory if + * num_sample_times is larger than 1. If set, number of + * entries must match num_sample_times. + */ + +struct lm75_params { + u8 set_mask; + u8 clr_mask; + u8 default_resolution; + u8 resolution_limits; + const u8 *resolutions; + unsigned int default_sample_time; + u8 num_sample_times; + const unsigned int *sample_times; +}; +#if 0 +/* Addresses scanned */ +static const unsigned short normal_i2c[] = { 0x48, 0x49, 0x4a, 0x4b, 0x4c, + 0x4d, 0x4e, 0x4f, I2C_CLIENT_END }; +#endif +/* The LM75 registers */ +#define LM75_REG_TEMP 0x00 +#define LM75_REG_CONF 0x01 +#define LM75_REG_HYST 0x02 +#define LM75_REG_MAX 0x03 +#define PCT2075_REG_IDLE 0x04 +#define LM75_TEMP_INVALID_RETRY_TIMES (3) + +/* Each client has this additional data */ +struct lm75_data { + struct i2c_client *client; + struct regmap *regmap; + struct regulator *vs; + u8 orig_conf; + u8 current_conf; + u8 resolution; /* In bits, 9 to 16 */ + unsigned int sample_time; /* In ms */ + enum lm75_type kind; + const struct lm75_params *params; +}; + +/*-----------------------------------------------------------------------*/ + +static const u8 lm75_sample_set_masks[] = { 0 << 5, 1 << 5, 2 << 5, 3 << 5 }; + +#define LM75_SAMPLE_CLEAR_MASK (3 << 5) + +/* The structure below stores the configuration values of the supported devices. + * In case of being supported multiple configurations, the default one must + * always be the first element of the array + */ +static const struct lm75_params device_params[] = { + [adt75] = { + .clr_mask = 1 << 5, /* not one-shot mode */ + .default_resolution = 12, + .default_sample_time = MSEC_PER_SEC / 10, + }, + [ds1775] = { + .clr_mask = 3 << 5, + .set_mask = 2 << 5, /* 11-bit mode */ + .default_resolution = 11, + .default_sample_time = 500, + .num_sample_times = 4, + .sample_times = (unsigned int []){ 125, 250, 500, 1000 }, + .resolutions = (u8 []) {9, 10, 11, 12 }, + }, + [ds75] = { + .clr_mask = 3 << 5, + .set_mask = 2 << 5, /* 11-bit mode */ + .default_resolution = 11, + .default_sample_time = 600, + .num_sample_times = 4, + .sample_times = (unsigned int []){ 150, 300, 600, 1200 }, + .resolutions = (u8 []) {9, 10, 11, 12 }, + }, + [stds75] = { + .clr_mask = 3 << 5, + .set_mask = 2 << 5, /* 11-bit mode */ + .default_resolution = 11, + .default_sample_time = 600, + .num_sample_times = 4, + .sample_times = (unsigned int []){ 150, 300, 600, 1200 }, + .resolutions = (u8 []) {9, 10, 11, 12 }, + }, + [stlm75] = { + .default_resolution = 9, + .default_sample_time = MSEC_PER_SEC / 6, + }, + [ds7505] = { + .set_mask = 3 << 5, /* 12-bit mode*/ + .default_resolution = 12, + .default_sample_time = 200, + .num_sample_times = 4, + .sample_times = (unsigned int []){ 25, 50, 100, 200 }, + .resolutions = (u8 []) {9, 10, 11, 12 }, + }, + [g751] = { + .default_resolution = 9, + .default_sample_time = MSEC_PER_SEC / 10, + }, + [lm75] = { + .default_resolution = 9, + .default_sample_time = MSEC_PER_SEC / 10, + }, + [lm75a] = { + .default_resolution = 9, + .default_sample_time = MSEC_PER_SEC / 10, + }, + [lm75b] = { + .default_resolution = 11, + .default_sample_time = MSEC_PER_SEC / 10, + }, + [max6625] = { + .default_resolution = 9, + .default_sample_time = MSEC_PER_SEC / 7, + }, + [max6626] = { + .default_resolution = 12, + .default_sample_time = MSEC_PER_SEC / 7, + .resolution_limits = 9, + }, + [max31725] = { + .default_resolution = 16, + .default_sample_time = MSEC_PER_SEC / 20, + }, + [tcn75] = { + .default_resolution = 9, + .default_sample_time = MSEC_PER_SEC / 18, + }, + [pct2075] = { + .default_resolution = 11, + .default_sample_time = MSEC_PER_SEC / 10, + .num_sample_times = 31, + .sample_times = (unsigned int []){ 100, 200, 300, 400, 500, 600, + 700, 800, 900, 1000, 1100, 1200, 1300, 1400, 1500, 1600, 1700, + 1800, 1900, 2000, 2100, 2200, 2300, 2400, 2500, 2600, 2700, + 2800, 2900, 3000, 3100 }, + }, + [mcp980x] = { + .set_mask = 3 << 5, /* 12-bit mode */ + .clr_mask = 1 << 7, /* not one-shot mode */ + .default_resolution = 12, + .resolution_limits = 9, + .default_sample_time = 240, + .num_sample_times = 4, + .sample_times = (unsigned int []){ 30, 60, 120, 240 }, + .resolutions = (u8 []) {9, 10, 11, 12 }, + }, + [tmp100] = { + .set_mask = 3 << 5, /* 12-bit mode */ + .clr_mask = 1 << 7, /* not one-shot mode */ + .default_resolution = 12, + .default_sample_time = 320, + .num_sample_times = 4, + .sample_times = (unsigned int []){ 40, 80, 160, 320 }, + .resolutions = (u8 []) {9, 10, 11, 12 }, + }, + [tmp101] = { + .set_mask = 3 << 5, /* 12-bit mode */ + .clr_mask = 1 << 7, /* not one-shot mode */ + .default_resolution = 12, + .default_sample_time = 320, + .num_sample_times = 4, + .sample_times = (unsigned int []){ 40, 80, 160, 320 }, + .resolutions = (u8 []) {9, 10, 11, 12 }, + }, + [tmp105] = { + .set_mask = 3 << 5, /* 12-bit mode */ + .clr_mask = 1 << 7, /* not one-shot mode*/ + .default_resolution = 12, + .default_sample_time = 220, + .num_sample_times = 4, + .sample_times = (unsigned int []){ 28, 55, 110, 220 }, + .resolutions = (u8 []) {9, 10, 11, 12 }, + }, + [tmp112] = { + .set_mask = 3 << 5, /* 8 samples / second */ + .clr_mask = 1 << 7, /* no one-shot mode*/ + .default_resolution = 12, + .default_sample_time = 125, + .num_sample_times = 4, + .sample_times = (unsigned int []){ 125, 250, 1000, 4000 }, + }, + [tmp175] = { + .set_mask = 3 << 5, /* 12-bit mode */ + .clr_mask = 1 << 7, /* not one-shot mode*/ + .default_resolution = 12, + .default_sample_time = 220, + .num_sample_times = 4, + .sample_times = (unsigned int []){ 28, 55, 110, 220 }, + .resolutions = (u8 []) {9, 10, 11, 12 }, + }, + [tmp275] = { + .set_mask = 3 << 5, /* 12-bit mode */ + .clr_mask = 1 << 7, /* not one-shot mode*/ + .default_resolution = 12, + .default_sample_time = 220, + .num_sample_times = 4, + .sample_times = (unsigned int []){ 28, 55, 110, 220 }, + .resolutions = (u8 []) {9, 10, 11, 12 }, + }, + [tmp75] = { + .set_mask = 3 << 5, /* 12-bit mode */ + .clr_mask = 1 << 7, /* not one-shot mode*/ + .default_resolution = 12, + .default_sample_time = 220, + .num_sample_times = 4, + .sample_times = (unsigned int []){ 28, 55, 110, 220 }, + .resolutions = (u8 []) {9, 10, 11, 12 }, + }, + [tmp75b] = { /* not one-shot mode, Conversion rate 37Hz */ + .clr_mask = 1 << 7 | 3 << 5, + .default_resolution = 12, + .default_sample_time = MSEC_PER_SEC / 37, + .sample_times = (unsigned int []){ MSEC_PER_SEC / 37, + MSEC_PER_SEC / 18, + MSEC_PER_SEC / 9, MSEC_PER_SEC / 4 }, + .num_sample_times = 4, + }, + [tmp75c] = { + .clr_mask = 1 << 5, /*not one-shot mode*/ + .default_resolution = 12, + .default_sample_time = MSEC_PER_SEC / 12, + } +}; + +/* input temp threshold check */ +typedef struct lm75_temp_threshold_s { + int chip_type; + int temp_max; + int temp_min; +} lm75_temp_threshold_t; + +static lm75_temp_threshold_t g_lm75_temp_threshold_info[] = { + { + .chip_type = lm75, + .temp_max = 125000, + .temp_min = -55000, + }, + { + .chip_type = tmp275, + .temp_max = 125000, + .temp_min = -40000, + }, +}; + +/*-----------------------------------------------------------------------*/ +static int lm75_input_temp_check(struct lm75_data *data, int input_val) +{ + int i, size; + + size = ARRAY_SIZE(g_lm75_temp_threshold_info); + + for (i = 0; i < size; i++) { + if (g_lm75_temp_threshold_info[i].chip_type == data->kind) { + if ((input_val > g_lm75_temp_threshold_info[i].temp_max) + || (input_val < g_lm75_temp_threshold_info[i].temp_min)) { + dev_dbg(&data->client->dev, "input temp: %d not in range[%d, %d]\n", + input_val, g_lm75_temp_threshold_info[i].temp_min, + g_lm75_temp_threshold_info[i].temp_max); + return -EINVAL; + } + dev_dbg(&data->client->dev, "input temp: %d in range[%d, %d]", input_val, + g_lm75_temp_threshold_info[i].temp_min, g_lm75_temp_threshold_info[i].temp_max); + return 0; + } + } + return 0; +} + +static inline long lm75_reg_to_mc(s16 temp, u8 resolution) +{ + return ((temp >> (16 - resolution)) * 1000) >> (resolution - 8); +} + +static int lm75_write_config(struct lm75_data *data, u8 set_mask, + u8 clr_mask) +{ + u8 value; + + clr_mask |= LM75_SHUTDOWN; + value = data->current_conf & ~clr_mask; + value |= set_mask; + + if (data->current_conf != value) { + s32 err; + + err = i2c_smbus_write_byte_data(data->client, LM75_REG_CONF, + value); + if (err) + return err; + data->current_conf = value; + } + return 0; +} + +static int lm75_read(struct device *dev, enum hwmon_sensor_types type, u32 attr, int channel, + long *val) +{ + struct lm75_data *data = dev_get_drvdata(dev); + unsigned int regval; + int err, reg, i, ret; + + switch (type) { + case hwmon_chip: + switch (attr) { + case hwmon_chip_update_interval: + *val = data->sample_time; + break; + default: + return -EINVAL; + } + break; + case hwmon_temp: + switch (attr) { + case hwmon_temp_input: + reg = LM75_REG_TEMP; + break; + case hwmon_temp_max: + reg = LM75_REG_MAX; + break; + case hwmon_temp_max_hyst: + reg = LM75_REG_HYST; + break; + default: + return -EINVAL; + } + for (i = 0; i < LM75_TEMP_INVALID_RETRY_TIMES; i++) { + err = regmap_read(data->regmap, reg, ®val); + if (err < 0) { + return err; + } + *val = lm75_reg_to_mc(regval, data->resolution); + if (reg != LM75_REG_TEMP) { + return 0; + } + /* do input_temp_check */ + ret = lm75_input_temp_check(data, *val); + if (ret == 0) { /* input temp check ok */ + return 0; + } + if ((i + 1) < LM75_TEMP_INVALID_RETRY_TIMES) { + msleep(data->sample_time); + } + } + dev_info(&data->client->dev, "temp_input value: %ld invalid\n", *val); + return -EINVAL; + default: + return -EINVAL; + } + return 0; +} + +static int lm75_write_temp(struct device *dev, u32 attr, long temp) +{ + struct lm75_data *data = dev_get_drvdata(dev); + u8 resolution; + int reg; + + switch (attr) { + case hwmon_temp_max: + reg = LM75_REG_MAX; + break; + case hwmon_temp_max_hyst: + reg = LM75_REG_HYST; + break; + default: + return -EINVAL; + } + + /* + * Resolution of limit registers is assumed to be the same as the + * temperature input register resolution unless given explicitly. + */ + if (data->params->resolution_limits) + resolution = data->params->resolution_limits; + else + resolution = data->resolution; + + temp = clamp_val(temp, LM75_TEMP_MIN, LM75_TEMP_MAX); + temp = DIV_ROUND_CLOSEST(temp << (resolution - 8), + 1000) << (16 - resolution); + + return regmap_write(data->regmap, reg, (u16)temp); +} + +static int lm75_update_interval(struct device *dev, long val) +{ + struct lm75_data *data = dev_get_drvdata(dev); + unsigned int reg; + u8 index; + s32 err; + + index = find_closest(val, data->params->sample_times, + (int)data->params->num_sample_times); + + switch (data->kind) { + default: + err = lm75_write_config(data, lm75_sample_set_masks[index], + LM75_SAMPLE_CLEAR_MASK); + if (err) + return err; + + data->sample_time = data->params->sample_times[index]; + if (data->params->resolutions) + data->resolution = data->params->resolutions[index]; + break; + case tmp112: + err = regmap_read(data->regmap, LM75_REG_CONF, ®); + if (err < 0) + return err; + reg &= ~0x00c0; + reg |= (3 - index) << 6; + err = regmap_write(data->regmap, LM75_REG_CONF, reg); + if (err < 0) + return err; + data->sample_time = data->params->sample_times[index]; + break; + case pct2075: + err = i2c_smbus_write_byte_data(data->client, PCT2075_REG_IDLE, + index + 1); + if (err) + return err; + data->sample_time = data->params->sample_times[index]; + break; + } + return 0; +} + +static int lm75_write_chip(struct device *dev, u32 attr, long val) +{ + switch (attr) { + case hwmon_chip_update_interval: + return lm75_update_interval(dev, val); + default: + return -EINVAL; + } + return 0; +} + +static int lm75_write(struct device *dev, enum hwmon_sensor_types type, + u32 attr, int channel, long val) +{ + switch (type) { + case hwmon_chip: + return lm75_write_chip(dev, attr, val); + case hwmon_temp: + return lm75_write_temp(dev, attr, val); + default: + return -EINVAL; + } + return 0; +} + +static umode_t lm75_is_visible(const void *data, enum hwmon_sensor_types type, + u32 attr, int channel) +{ + const struct lm75_data *config_data = data; + + switch (type) { + case hwmon_chip: + switch (attr) { + case hwmon_chip_update_interval: + if (config_data->params->num_sample_times > 1) + return 0644; + return 0444; + } + break; + case hwmon_temp: + switch (attr) { + case hwmon_temp_input: + return 0444; + case hwmon_temp_max: + case hwmon_temp_max_hyst: + return 0644; + } + break; + default: + break; + } + return 0; +} + +static const struct hwmon_channel_info *lm75_info[] = { + HWMON_CHANNEL_INFO(chip, + HWMON_C_REGISTER_TZ | HWMON_C_UPDATE_INTERVAL), + HWMON_CHANNEL_INFO(temp, + HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_MAX_HYST), + NULL +}; + +static const struct hwmon_ops lm75_hwmon_ops = { + .is_visible = lm75_is_visible, + .read = lm75_read, + .write = lm75_write, +}; + +static const struct hwmon_chip_info lm75_chip_info = { + .ops = &lm75_hwmon_ops, + .info = lm75_info, +}; + +static bool lm75_is_writeable_reg(struct device *dev, unsigned int reg) +{ + return reg != LM75_REG_TEMP; +} + +static bool lm75_is_volatile_reg(struct device *dev, unsigned int reg) +{ + return reg == LM75_REG_TEMP || reg == LM75_REG_CONF; +} + +static const struct regmap_config lm75_regmap_config = { + .reg_bits = 8, + .val_bits = 16, + .max_register = PCT2075_REG_IDLE, + .writeable_reg = lm75_is_writeable_reg, + .volatile_reg = lm75_is_volatile_reg, + .val_format_endian = REGMAP_ENDIAN_BIG, + .cache_type = REGCACHE_RBTREE, + .use_single_read = true, + .use_single_write = true, +}; + +static void lm75_disable_regulator(void *data) +{ + struct lm75_data *lm75 = data; + + regulator_disable(lm75->vs); +} + +static void lm75_remove(void *data) +{ + struct lm75_data *lm75 = data; + struct i2c_client *client = lm75->client; + + i2c_smbus_write_byte_data(client, LM75_REG_CONF, lm75->orig_conf); +} + +static const struct i2c_device_id lm75_ids[]; + +static int lm75_probe(struct i2c_client *client) +{ + struct device *dev = &client->dev; + struct device *hwmon_dev; + struct lm75_data *data; + int status, err; + enum lm75_type kind; + + if (client->dev.of_node) + kind = (enum lm75_type)of_device_get_match_data(&client->dev); + else + kind = i2c_match_id(lm75_ids, client)->driver_data; + + if (!i2c_check_functionality(client->adapter, + I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA)) + return -EIO; + + data = devm_kzalloc(dev, sizeof(struct lm75_data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + data->client = client; + data->kind = kind; + + data->vs = devm_regulator_get(dev, "vs"); + if (IS_ERR(data->vs)) + return PTR_ERR(data->vs); + + data->regmap = devm_regmap_init_i2c(client, &lm75_regmap_config); + if (IS_ERR(data->regmap)) + return PTR_ERR(data->regmap); + + /* Set to LM75 resolution (9 bits, 1/2 degree C) and range. + * Then tweak to be more precise when appropriate. + */ + + data->params = &device_params[data->kind]; + + /* Save default sample time and resolution*/ + data->sample_time = data->params->default_sample_time; + data->resolution = data->params->default_resolution; + + /* Enable the power */ + err = regulator_enable(data->vs); + if (err) { + dev_err(dev, "failed to enable regulator: %d\n", err); + return err; + } + + err = devm_add_action_or_reset(dev, lm75_disable_regulator, data); + if (err) + return err; + + /* Cache original configuration */ + status = i2c_smbus_read_byte_data(client, LM75_REG_CONF); + if (status < 0) { + dev_dbg(dev, "Can't read config? %d\n", status); + return status; + } + data->orig_conf = status; + data->current_conf = status; + + err = lm75_write_config(data, data->params->set_mask, + data->params->clr_mask); + if (err) + return err; + + err = devm_add_action_or_reset(dev, lm75_remove, data); + if (err) + return err; + + hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name, + data, &lm75_chip_info, + NULL); + if (IS_ERR(hwmon_dev)) + return PTR_ERR(hwmon_dev); + + dev_info(dev, "%s: sensor '%s'\n", dev_name(hwmon_dev), client->name); + + return 0; +} + +static const struct i2c_device_id lm75_ids[] = { + { "wb_adt75", adt75, }, + { "wb_ds1775", ds1775, }, + { "wb_ds75", ds75, }, + { "wb_ds7505", ds7505, }, + { "wb_g751", g751, }, + { "wb_lm75", lm75, }, + { "wb_lm75a", lm75a, }, + { "wb_lm75b", lm75b, }, + { "wb_max6625", max6625, }, + { "wb_max6626", max6626, }, + { "wb_max31725", max31725, }, + { "wb_max31726", max31725, }, + { "wb_mcp980x", mcp980x, }, + { "wb_pct2075", pct2075, }, + { "wb_stds75", stds75, }, + { "wb_stlm75", stlm75, }, + { "wb_tcn75", tcn75, }, + { "wb_tmp100", tmp100, }, + { "wb_tmp101", tmp101, }, + { "wb_tmp105", tmp105, }, + { "wb_tmp112", tmp112, }, + { "wb_tmp175", tmp175, }, + { "wb_tmp275", tmp275, }, + { "wb_tmp75", tmp75, }, + { "wb_tmp75b", tmp75b, }, + { "wb_tmp75c", tmp75c, }, + { /* LIST END */ } +}; +MODULE_DEVICE_TABLE(i2c, lm75_ids); + +static const struct of_device_id __maybe_unused lm75_of_match[] = { + { + .compatible = "adi,adt75", + .data = (void *)adt75 + }, + { + .compatible = "dallas,ds1775", + .data = (void *)ds1775 + }, + { + .compatible = "dallas,ds75", + .data = (void *)ds75 + }, + { + .compatible = "dallas,ds7505", + .data = (void *)ds7505 + }, + { + .compatible = "gmt,g751", + .data = (void *)g751 + }, + { + .compatible = "national,lm75", + .data = (void *)lm75 + }, + { + .compatible = "national,lm75a", + .data = (void *)lm75a + }, + { + .compatible = "national,lm75b", + .data = (void *)lm75b + }, + { + .compatible = "maxim,max6625", + .data = (void *)max6625 + }, + { + .compatible = "maxim,max6626", + .data = (void *)max6626 + }, + { + .compatible = "maxim,max31725", + .data = (void *)max31725 + }, + { + .compatible = "maxim,max31726", + .data = (void *)max31725 + }, + { + .compatible = "maxim,mcp980x", + .data = (void *)mcp980x + }, + { + .compatible = "nxp,pct2075", + .data = (void *)pct2075 + }, + { + .compatible = "st,stds75", + .data = (void *)stds75 + }, + { + .compatible = "st,stlm75", + .data = (void *)stlm75 + }, + { + .compatible = "microchip,tcn75", + .data = (void *)tcn75 + }, + { + .compatible = "ti,tmp100", + .data = (void *)tmp100 + }, + { + .compatible = "ti,tmp101", + .data = (void *)tmp101 + }, + { + .compatible = "ti,tmp105", + .data = (void *)tmp105 + }, + { + .compatible = "ti,tmp112", + .data = (void *)tmp112 + }, + { + .compatible = "ti,tmp175", + .data = (void *)tmp175 + }, + { + .compatible = "ti,tmp275", + .data = (void *)tmp275 + }, + { + .compatible = "ti,tmp75", + .data = (void *)tmp75 + }, + { + .compatible = "ti,tmp75b", + .data = (void *)tmp75b + }, + { + .compatible = "ti,tmp75c", + .data = (void *)tmp75c + }, + { }, +}; +MODULE_DEVICE_TABLE(of, lm75_of_match); + +#define LM75A_ID 0xA1 +#if 0 +/* Return 0 if detection is successful, -ENODEV otherwise */ +static int lm75_detect(struct i2c_client *new_client, + struct i2c_board_info *info) +{ + struct i2c_adapter *adapter = new_client->adapter; + int i; + int conf, hyst, os; + bool is_lm75a = 0; + + if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA | + I2C_FUNC_SMBUS_WORD_DATA)) + return -ENODEV; + + /* + * Now, we do the remaining detection. There is no identification- + * dedicated register so we have to rely on several tricks: + * unused bits, registers cycling over 8-address boundaries, + * addresses 0x04-0x07 returning the last read value. + * The cycling+unused addresses combination is not tested, + * since it would significantly slow the detection down and would + * hardly add any value. + * + * The National Semiconductor LM75A is different than earlier + * LM75s. It has an ID byte of 0xaX (where X is the chip + * revision, with 1 being the only revision in existence) in + * register 7, and unused registers return 0xff rather than the + * last read value. + * + * Note that this function only detects the original National + * Semiconductor LM75 and the LM75A. Clones from other vendors + * aren't detected, on purpose, because they are typically never + * found on PC hardware. They are found on embedded designs where + * they can be instantiated explicitly so detection is not needed. + * The absence of identification registers on all these clones + * would make their exhaustive detection very difficult and weak, + * and odds are that the driver would bind to unsupported devices. + */ + + /* Unused bits */ + conf = i2c_smbus_read_byte_data(new_client, 1); + if (conf & 0xe0) + return -ENODEV; + + /* First check for LM75A */ + if (i2c_smbus_read_byte_data(new_client, 7) == LM75A_ID) { + /* + * LM75A returns 0xff on unused registers so + * just to be sure we check for that too. + */ + if (i2c_smbus_read_byte_data(new_client, 4) != 0xff + || i2c_smbus_read_byte_data(new_client, 5) != 0xff + || i2c_smbus_read_byte_data(new_client, 6) != 0xff) + return -ENODEV; + is_lm75a = 1; + hyst = i2c_smbus_read_byte_data(new_client, 2); + os = i2c_smbus_read_byte_data(new_client, 3); + } else { /* Traditional style LM75 detection */ + /* Unused addresses */ + hyst = i2c_smbus_read_byte_data(new_client, 2); + if (i2c_smbus_read_byte_data(new_client, 4) != hyst + || i2c_smbus_read_byte_data(new_client, 5) != hyst + || i2c_smbus_read_byte_data(new_client, 6) != hyst + || i2c_smbus_read_byte_data(new_client, 7) != hyst) + return -ENODEV; + os = i2c_smbus_read_byte_data(new_client, 3); + if (i2c_smbus_read_byte_data(new_client, 4) != os + || i2c_smbus_read_byte_data(new_client, 5) != os + || i2c_smbus_read_byte_data(new_client, 6) != os + || i2c_smbus_read_byte_data(new_client, 7) != os) + return -ENODEV; + } + /* + * It is very unlikely that this is a LM75 if both + * hysteresis and temperature limit registers are 0. + */ + if (hyst == 0 && os == 0) + return -ENODEV; + + /* Addresses cycling */ + for (i = 8; i <= 248; i += 40) { + if (i2c_smbus_read_byte_data(new_client, i + 1) != conf + || i2c_smbus_read_byte_data(new_client, i + 2) != hyst + || i2c_smbus_read_byte_data(new_client, i + 3) != os) + return -ENODEV; + if (is_lm75a && i2c_smbus_read_byte_data(new_client, i + 7) + != LM75A_ID) + return -ENODEV; + } + + strlcpy(info->type, is_lm75a ? "lm75a" : "lm75", I2C_NAME_SIZE); + + return 0; +} +#endif + +#ifdef CONFIG_PM +static int lm75_suspend(struct device *dev) +{ + int status; + struct i2c_client *client = to_i2c_client(dev); + + status = i2c_smbus_read_byte_data(client, LM75_REG_CONF); + if (status < 0) { + dev_dbg(&client->dev, "Can't read config? %d\n", status); + return status; + } + status = status | LM75_SHUTDOWN; + i2c_smbus_write_byte_data(client, LM75_REG_CONF, status); + return 0; +} + +static int lm75_resume(struct device *dev) +{ + int status; + struct i2c_client *client = to_i2c_client(dev); + + status = i2c_smbus_read_byte_data(client, LM75_REG_CONF); + if (status < 0) { + dev_dbg(&client->dev, "Can't read config? %d\n", status); + return status; + } + status = status & ~LM75_SHUTDOWN; + i2c_smbus_write_byte_data(client, LM75_REG_CONF, status); + return 0; +} + +static const struct dev_pm_ops lm75_dev_pm_ops = { + .suspend = lm75_suspend, + .resume = lm75_resume, +}; +#define LM75_DEV_PM_OPS (&lm75_dev_pm_ops) +#else +#define LM75_DEV_PM_OPS NULL +#endif /* CONFIG_PM */ + +static struct i2c_driver lm75_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "wb_lm75", + .of_match_table = of_match_ptr(lm75_of_match), + .pm = LM75_DEV_PM_OPS, + }, + .probe = lm75_probe, + .id_table = lm75_ids, + /* .detect = lm75_detect, */ + /* .address_list = normal_i2c, */ +}; + +module_i2c_driver(lm75_driver); + +MODULE_AUTHOR("support"); +MODULE_DESCRIPTION("LM75 driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_lm75.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_lm75.h new file mode 100644 index 00000000000..a398171162a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_lm75.h @@ -0,0 +1,40 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * lm75.h - Part of lm_sensors, Linux kernel modules for hardware monitoring + * Copyright (c) 2003 Mark M. Hoffman + */ + +/* + * This file contains common code for encoding/decoding LM75 type + * temperature readings, which are emulated by many of the chips + * we support. As the user is unlikely to load more than one driver + * which contains this code, we don't worry about the wasted space. + */ + +#include + +/* straight from the datasheet */ +#define LM75_TEMP_MIN (-55000) +#define LM75_TEMP_MAX 125000 +#define LM75_SHUTDOWN 0x01 + +/* + * TEMP: 0.001C/bit (-55C to +125C) + * REG: (0.5C/bit, two's complement) << 7 + */ +static inline u16 LM75_TEMP_TO_REG(long temp) +{ + int ntemp = clamp_val(temp, LM75_TEMP_MIN, LM75_TEMP_MAX); + + ntemp += (ntemp < 0 ? -250 : 250); + return (u16)((ntemp / 500) << 7); +} + +static inline int LM75_TEMP_FROM_REG(u16 reg) +{ + /* + * use integer division instead of equivalent right shift to + * guarantee arithmetic shift and preserve the sign + */ + return ((s16)reg / 128) * 500; +} diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_logic_dev_common.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_logic_dev_common.c new file mode 100644 index 00000000000..117ed39185f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_logic_dev_common.c @@ -0,0 +1,2570 @@ +/* + * wb_logic_dev_common.c + * ko provide universal methods to logic_dev module + */ + +#include +#include + +#define LOGIC_DEV_DUMP_LINE_BYTES (16) + +/* Use the wb_bsp_kernel_debug header file must define debug variable */ +static int debug = 0; +module_param(debug, int, S_IRUGO | S_IWUSR); + +#define LOGIC_DEV_INFO(fmt, args...) do { \ + printk(KERN_INFO "[LOGIC_DEV][VER][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \ +} while (0) + +static int noop_pre(struct kprobe *p, struct pt_regs *regs) { return 0; } +static struct kprobe kp = { + .symbol_name = "kallsyms_lookup_name", +}; +unsigned long (*kallsyms_lookup_name_fun)(const char *name) = NULL; + +struct kobject *logic_dev_kobj; + +/* Call kprobe to find the address location of kallsyms_lookup_name */ +static int find_kallsyms_lookup_name(void) +{ + int ret = -1; + + kp.pre_handler = noop_pre; + ret = register_kprobe(&kp); + if (ret < 0) { + DEBUG_ERROR("register_kprobe failed, error:%d\n", ret); + return ret; + } + DEBUG_INFO("kallsyms_lookup_name addr: %p\n", kp.addr); + kallsyms_lookup_name_fun = (void*)kp.addr; + unregister_kprobe(&kp); + + return ret; +} + +EXPORT_SYMBOL_GPL(kallsyms_lookup_name_fun); +EXPORT_SYMBOL_GPL(logic_dev_kobj); + +static int wb_bsp_log_file_backup(char *src_path, struct file *src_fp, int src_file_size) +{ + int ret; + struct file *dst_fp; + char dst_path[BSP_LOG_DEV_NAME_MAX_LEN]; + char *buffer; + ssize_t bytes_read, bytes_written; + loff_t src_offset, dst_offset; + + buffer = kzalloc(src_file_size, GFP_KERNEL); + if (!buffer) { + DEBUG_ERROR("Failed to allocate memory for buffer size %d\n", src_file_size); + return -ENOMEM; + } + + mem_clear(dst_path, sizeof(dst_path)); + snprintf(dst_path, sizeof(dst_path), "%s_bak", src_path); + dst_fp = filp_open(dst_path, O_CREAT | O_RDWR | O_TRUNC, S_IRWXU | S_IRWXG | S_IRWXO); + if (IS_ERR(dst_fp)) { + DEBUG_ERROR("Open %s failed, errno = %ld\n", dst_path, -PTR_ERR(dst_fp)); + ret = PTR_ERR(dst_fp); + goto out_free_buffer; + } + + /* read origin file */ + src_offset = 0; + bytes_read = kernel_read(src_fp, buffer, src_file_size, &src_offset); + if (bytes_read < 0) { + DEBUG_ERROR("Read %s failed, src_file_size: %d, ret: %zu\n", src_path, src_file_size, bytes_read); + ret = bytes_read; + goto out_close_dst; + } + /* write to backup file */ + dst_offset = 0; + bytes_written = kernel_write(dst_fp, buffer, bytes_read, &dst_offset); + if (bytes_written < 0) { + DEBUG_ERROR("Write %s failed, src_file_size: %d, ret: %zu\n", src_path, src_file_size, bytes_written); + ret = bytes_written; + goto out_close_dst; + } + + ret = 0; + (void)vfs_fsync(dst_fp, 1); + DEBUG_VERBOSE("Backup %s to %s success, src_file_size: %d\n", src_path, dst_path, src_file_size); +out_close_dst: + filp_close(dst_fp, NULL); +out_free_buffer: + kfree(buffer); + return ret; +} + +/** + * wb_bsp_log_file_without_ts -- Log a message without generating a timestamp. + * @log: The log message to be recorded. + * + * This function is used in kernel threads. + */ +static void wb_bsp_log_file_without_ts(char *path, int file_max_size, char *log, int size) +{ + struct file *fp; + ssize_t ret; + loff_t tmp_pos; + struct inode *inode; + + fp = filp_open(path, O_CREAT | O_RDWR, S_IRWXU | S_IRWXG | S_IRWXO); + if (IS_ERR(fp)) { + DEBUG_ERROR("open %s failed, errno = %ld\n", path, -PTR_ERR(fp)); + return; + } + + /* get file size */ + inode = fp->f_inode; + tmp_pos = i_size_read(inode); + + DEBUG_VERBOSE("%s file size: %lld, write len: %d, file_max_size: %d\n", path, tmp_pos, size, file_max_size); + + if (tmp_pos + size >= file_max_size) { + DEBUG_VERBOSE("%s file write file offset: %lld, write len: %d, exceed max file size: %d, backup file\n", + path, tmp_pos, size, file_max_size); + ret = wb_bsp_log_file_backup(path, fp, tmp_pos); + if (ret == 0) { + DEBUG_VERBOSE("Backup %s success, truncate the file and start writing from the beginning\n", path); + (void)filp_close(fp, NULL); + /* Reopen file (truncate) */ + fp = filp_open(path, O_CREAT | O_RDWR | O_TRUNC, S_IRWXG | S_IRWXO); + if (IS_ERR(fp)) { + DEBUG_ERROR("open %s failed, errno = %ld\n", path, -PTR_ERR(fp)); + return; + } + } else { + DEBUG_ERROR("Backup %s failed, ret: %zu, do not truncate the file, write it from the beginning\n", path, ret); + } + tmp_pos = 0; + } + + ret = kernel_write(fp, log, size, &tmp_pos); + if (ret < 0) { + DEBUG_ERROR("Write %s failed, offset: %lld, size: %d, ret: %zu\n", path, tmp_pos, size, ret); + goto finish; + } + + vfs_fsync(fp, 1); + DEBUG_VERBOSE("Write %s success, write len: %d, pos: %lld\n", path, size,tmp_pos); +finish: + (void)filp_close(fp, NULL); + return; +} + +/** + * wb_bsp_create_timestamp -- Generate a timestamp. + * @ts: Output parameter to store the generated timestamp string. + * @size: The size of the ts buffer. + * + * return: The length of the timestamp string stored in ts. + */ +static int wb_bsp_create_timestamp(char *buf, int size) +{ + int offset; + struct tm tm; + struct timespec64 ts; + + /* get timestamp_sec */ + mem_clear(&tm, sizeof(tm)); + mem_clear(&ts, sizeof(ts)); + ktime_get_real_ts64(&ts); + time64_to_tm(ts.tv_sec, 0, &tm); + mem_clear(buf, size); + offset = snprintf(buf, size, "%-4ld-%02d-%02d %02d:%02d:%02d\n", tm.tm_year + 1900, + tm.tm_mon + 1, tm.tm_mday, tm.tm_hour, tm.tm_min, tm.tm_sec); + return offset; +} + +/** + * wb_bsp_log_file_with_ts -- Log a message with an automatically generated timestamp. + * @log: The log message to record. + * + * To be used within a kernel thread. + */ +static void wb_bsp_log_file_with_ts(char *path, int file_max_size, char *log, struct mutex *file_lock) +{ + char ts[BSP_LOG_TS_BUFF_SIZE]; + char wr_buf[BSP_KEY_DEVICE_LOG_SIZE+BSP_LOG_TS_BUFF_SIZE]; + + mem_clear(ts, sizeof(ts)); + mem_clear(wr_buf, sizeof(wr_buf)); + (void)wb_bsp_create_timestamp(ts, BSP_LOG_TS_BUFF_SIZE); + snprintf(wr_buf, sizeof(wr_buf), "%s%s", ts, log); + mutex_lock(file_lock); + wb_bsp_log_file_without_ts(path, file_max_size, wr_buf, strlen(wr_buf)); + mutex_unlock(file_lock); + return; +} + +int wb_bsp_key_device_log(char *dev_name, char *log_name, int log_size, + wb_bsp_key_device_log_node_t *log_node, uint32_t offset, uint8_t *buf, size_t size) +{ + int i, j, addr, len, flags, log_len, tmp_offset; + char log[BSP_KEY_DEVICE_LOG_SIZE]; + + if (dev_name == NULL || log_name == NULL || log_node == NULL || buf == NULL || + size <= 0 || log_size <= 0) { + DEBUG_ERROR("Invalid param! dev_name = %p, log_name = %p, log_node = %p, buf = %p, size = %zu, offset = 0x%x, log_size=%d\n", + dev_name, log_name, log_node, buf, size, offset, log_size); + return -EINVAL; + } + + DEBUG_VERBOSE("log_name: %s, write type: %s, offset = 0x%02x size = %zu,\n", log_name, dev_name, offset, size); + mem_clear(log, BSP_KEY_DEVICE_LOG_SIZE); + log_len = 0; + log_len += snprintf(log + log_len, BSP_KEY_DEVICE_LOG_SIZE - log_len, "%s: write register - value:\n", dev_name); + /* Check if the address is the key register to be logged */ + flags = 0; + for (j = 0; j < size; j++) { + for (i = 0; i < log_node->log_num; i++) { + addr = BSP_KEY_DEV_INDEX_TO_ADDR(log_node->log_index[i]); + len = BSP_KEY_DEV_INDEX_TO_SIZE(log_node->log_index[i]); + DEBUG_VERBOSE("log_reg[%d] addr = 0x%02x, len = 0x%02x\n", i, addr, len); + /** + *If the next log entry exceeds the buffer length, it will be written to the file first. + * The magic number is related to the log format '0x%04x:0x%02x'. + */ + if (log_len + 13 > BSP_KEY_DEVICE_LOG_SIZE) { + /* Interrupt and crash handling processes output directly using printk without writing to a file. */ + if (unlikely(in_interrupt() || oops_in_progress)) { + /* Data concatenation already includes line breaks; no additional line breaks are added here */ + printk("%s:%s", log_name, log); + } else { + wb_bsp_log_file_with_ts(log_name, log_size, log, &log_node->file_lock); + } + mem_clear(log, BSP_KEY_DEVICE_LOG_SIZE); + log_len = 0; + } + tmp_offset = offset + j; + if ((tmp_offset >= addr) && (tmp_offset < addr + len)) { + log_len += snprintf(log + log_len, BSP_KEY_DEVICE_LOG_SIZE - log_len, "0x%04x:0x%02x\n", + tmp_offset, buf[j]); + flags = 1; + break; + } + } + } + + if (flags == 0) { + DEBUG_VERBOSE("Key reg can not match!\n"); + return 0; + } + + /* Interrupt and crash handling processes output directly using printk without writing to a file. */ + if (unlikely(in_interrupt() || oops_in_progress)) { + /* Data concatenation already includes line breaks; no additional line breaks are added here */ + printk("%s", log); + } else { + wb_bsp_log_file_with_ts(log_name, log_size, log, &log_node->file_lock); + } + + return 0; +} +EXPORT_SYMBOL_GPL(wb_bsp_key_device_log); + +static int check_mode_data_process(uint32_t check_mode, uint8_t *data, int data_len) +{ + int ret; + int i; + + ret = 0; + switch (check_mode) { + case WB_LOGIC_NORMAL: + break; + case WB_LOGIC_NAGATIVE_MODE: + for (i = 0; i < data_len; i++) { + data[i] = ~data[i]; + } + break; + default: + return -EINVAL; + } + + return ret; +} + +int dev_rw_check(uint8_t *rd_buf, uint8_t *wr_buf, uint32_t len, uint32_t type, uint32_t check_mode) +{ + int i; + int ret; + + if (rd_buf == NULL || wr_buf == NULL) { + DEBUG_ERROR("Error: buf is NULL\n"); + return -EINVAL; + } + + if ((len == 0) ||(len > MAX_DATA_WIDTH)) { + DEBUG_ERROR("Invalid len: %u.\n", len); + return -EINVAL; + } + + if (check_mode >= WB_LOGIC_SUPPORT_CHECK_MODE_MAX) { + DEBUG_ERROR("Invalid check_mode: 0x%x.\n", check_mode); + return -EINVAL; + } + + ret = check_mode_data_process(check_mode, rd_buf, len); + if (ret < 0) { + DEBUG_ERROR("check mode check_mode_data_process fail, check_mode: %d, ret:%d.\n", check_mode, ret); + return ret; + } + + switch (type) { + case STATUS_CHECK_SELFTEST: + case STATUS_CHECK_SCRATCH: + case STATUS_CHECK_SEU: + case STATUS_CHECK_CRAM: + if (memcmp(rd_buf, wr_buf, len)) { + DEBUG_ERROR("type: %u, status check result failed.\n", type); + for (i = 0; i < len; i++) { + DEBUG_INFO("rd_buf[%d]: 0x%x, wr_buf[%d]: 0x%x\n", + i, rd_buf[i], i, wr_buf[i]); + } + return -EIO; + } + break; + default: + DEBUG_ERROR("Failed: status check type:%d not support.\n", type); + return -EINVAL; + } + + return 0; +} +EXPORT_SYMBOL_GPL(dev_rw_check); + +void logic_dev_dump_data(const char *dev_name, uint32_t offset, u8 *val, size_t count, bool read_flag) +{ + int i; + uint8_t buf[DEBUG_BUF_MAX_LEN]; + uint8_t *point; + + if ((dev_name == NULL) || (val == NULL) || (count <= 0)) { + DEBUG_ERROR("Invalid param, dev_name: %p, val buf: %p, count: %zu\n", dev_name, val, count); + return; + } + + mem_clear(buf, sizeof(buf)); + point = buf; + printk(KERN_INFO "%s %s, offset=0x%x, count=%zu, data:\n", dev_name, read_flag ? "read":"write", offset, count); + for (i = 0; i < count; i++) { + snprintf(point, DEBUG_BUF_MAX_LEN - (point - buf), "0x%02x ", val[i]); + /* Format length. */ + point += 5; + if (((i + 1) % 16) == 0) { + printk(KERN_INFO "%s\n", buf); + point = buf; + mem_clear(buf, sizeof(buf)); + } + } + + if (point != buf) { + printk(KERN_INFO "%s\n", buf); + } + + return; +} +EXPORT_SYMBOL_GPL(logic_dev_dump_data); + +static int wb_dev_file_write(const char *path, uint32_t pos, uint8_t *val, size_t size) +{ + int ret; + struct file *filp; + loff_t tmp_pos; + + filp = filp_open(path, O_RDWR, 777); + if (IS_ERR(filp)) { + DEBUG_ERROR("write open failed errno = %ld\r\n", -PTR_ERR(filp)); + filp = NULL; + goto exit; + } + ret = 0; + tmp_pos = (loff_t)pos; + ret = kernel_write(filp, (void*)val, size, &tmp_pos); + if (ret < 0) { + DEBUG_ERROR("write kernel_write failed, ret=%d\r\n", ret); + goto exit; + } + vfs_fsync(filp, 1); + filp_close(filp, NULL); + + return ret; + +exit: + if (filp != NULL) { + filp_close(filp, NULL); + } + + return -1; +} + +static int wb_dev_file_read(const char *path, uint32_t pos, uint8_t *val, size_t size) +{ + int ret; + struct file *filp; + loff_t tmp_pos; + + filp = filp_open(path, O_RDONLY, 0); + if (IS_ERR(filp)) { + DEBUG_ERROR("read open failed errno = %ld\r\n", -PTR_ERR(filp)); + filp = NULL; + goto exit; + } + ret = 0; + tmp_pos = (loff_t)pos; + ret = kernel_read(filp, val, size, &tmp_pos); + if (ret < 0) { + DEBUG_ERROR("read kernel_read failed, ret=%d\r\n", ret); + goto exit; + } + filp_close(filp, NULL); + + return ret; + +exit: + if (filp != NULL) { + filp_close(filp, NULL); + } + + return -1; +} + +int find_intf_addr(unsigned long *write_intf_addr, unsigned long *read_intf_addr, uint32_t mode) +{ + switch (mode) { + case SYMBOL_I2C_DEV_MODE: + *write_intf_addr = (unsigned long)kallsyms_lookup_name_fun("i2c_device_func_write"); + *read_intf_addr = (unsigned long)kallsyms_lookup_name_fun("i2c_device_func_read"); + break; + case SYMBOL_SPI_DEV_MODE: + *write_intf_addr = (unsigned long)kallsyms_lookup_name_fun("spi_device_func_write"); + *read_intf_addr = (unsigned long)kallsyms_lookup_name_fun("spi_device_func_read"); + break; + case SYMBOL_SPI_DEV_ATOMIC_MODE: + *write_intf_addr = (unsigned long)kallsyms_lookup_name_fun("spi_device_func_atomic_write"); + *read_intf_addr = (unsigned long)kallsyms_lookup_name_fun("spi_device_func_atomic_read"); + break; + case SYMBOL_IO_DEV_MODE: + *write_intf_addr = (unsigned long)kallsyms_lookup_name_fun("io_device_func_write"); + *read_intf_addr = (unsigned long)kallsyms_lookup_name_fun("io_device_func_read"); + break; + case SYMBOL_PCIE_DEV_MODE: + *write_intf_addr = (unsigned long)kallsyms_lookup_name_fun("pcie_device_func_write"); + *read_intf_addr = (unsigned long)kallsyms_lookup_name_fun("pcie_device_func_read"); + break; + case SYMBOL_INDIRECT_DEV_MODE: + *write_intf_addr = (unsigned long)kallsyms_lookup_name_fun("indirect_device_func_write"); + *read_intf_addr = (unsigned long)kallsyms_lookup_name_fun("indirect_device_func_read"); + break; + case SYMBOL_PLATFORM_I2C_DEV_MODE: + *write_intf_addr = (unsigned long)kallsyms_lookup_name_fun("platform_i2c_device_func_write"); + *read_intf_addr = (unsigned long)kallsyms_lookup_name_fun("platform_i2c_device_func_read"); + break; + case FILE_MODE: + *write_intf_addr = (unsigned long)wb_dev_file_write; + *read_intf_addr = (unsigned long)wb_dev_file_read; + break; + default: + DEBUG_ERROR("func mode %d don't support.\n", mode); + return -EINVAL; + } + + if (!*write_intf_addr || !*read_intf_addr) { + DEBUG_ERROR("Fail: func mode %u rw symbol undefined\n", mode); + return -ENOSYS; + } + + return 0; +} +EXPORT_SYMBOL_GPL(find_intf_addr); + +int find_cs_intf_addr(unsigned long *cs_enable_intf_addr, unsigned long *cs_disable_intf_addr) +{ + *cs_enable_intf_addr = (unsigned long)kallsyms_lookup_name_fun("chip_select_enable"); + *cs_disable_intf_addr = (unsigned long)kallsyms_lookup_name_fun("chip_select_disable"); + + if (!*cs_enable_intf_addr || !*cs_disable_intf_addr) { + DEBUG_ERROR("Fail: cs enable or disable symbol undefined\n"); + return -ENOSYS; + } + + return 0; +} +EXPORT_SYMBOL_GPL(find_cs_intf_addr); + + +static int logic_dev_read(logic_dev_dump_t *dump_logic_dev, uint32_t pos, uint8_t *val, size_t size) +{ + device_func_read pfunc; + + if (!dump_logic_dev->logic_dev_read_intf_addr) { + return -ENOSYS; + } + + pfunc = (device_func_read)dump_logic_dev->logic_dev_read_intf_addr; + return pfunc(dump_logic_dev->logic_dev_name, pos, val, size); +} + +static void logic_dev_dump_buf_seg(struct device *dev, uint32_t base, const uint8_t *buf, size_t bytes) +{ + int i, j, pos; + char print_line[MAX_RW_LEN]; + + for (i = 0; i < bytes; i += LOGIC_DEV_DUMP_LINE_BYTES) { + pos = snprintf(print_line, sizeof(print_line), "0x%04x:", base + i); + for (j = 0; j < LOGIC_DEV_DUMP_LINE_BYTES && (i + j) < bytes; j++) { + pos += snprintf(print_line + pos, sizeof(print_line) - pos, " %02x", buf[i + j]); + } + dev_info(dev, "%s\n", print_line); + } +} + +void logic_dev_dump_regs(logic_dev_dump_info_t *dump_info, struct device *dev, const char *log_tag) +{ + uint8_t dump_buf[LOGIC_DEV_DUMP_LINE_BYTES]; + uint32_t addr, bytes, i; + int ret; + logic_dev_dump_t *dump_logic_dev; + const char *tag; + + if (!dump_info || !dev) { + return; + } + + tag = log_tag ? log_tag : "logic_dev"; + for (i = 0; i < dump_info->dump_logic_dev_num; i++) { + dump_logic_dev = &dump_info->dump_logic_dev_cfg[i]; + dev_info(dev, + "[%s] :dump logic dev regs, dev:%s, range:[0x%x, 0x%x]\n", + tag, dump_logic_dev->logic_dev_name, + dump_logic_dev->logic_dev_reg_start, dump_logic_dev->logic_dev_reg_end); + + for (addr = dump_logic_dev->logic_dev_reg_start; + addr <= dump_logic_dev->logic_dev_reg_end; + addr += LOGIC_DEV_DUMP_LINE_BYTES) { + bytes = min_t(uint32_t, LOGIC_DEV_DUMP_LINE_BYTES, + dump_logic_dev->logic_dev_reg_end - addr + 1); + mem_clear(dump_buf, sizeof(dump_buf)); + + ret = logic_dev_read(dump_logic_dev, addr, dump_buf, bytes); + if (ret < 0) { + dev_err(dev, + "read logic dev reg failed, dev:%s, addr:0x%x, len:%u, ret:%d\n", + dump_logic_dev->logic_dev_name, addr, bytes, ret); + break; + } + logic_dev_dump_buf_seg(dev, addr, dump_buf, bytes); + } + dev_info(dev, "===== %s: End dump from logic dev regs =====\n", tag); + } +} +EXPORT_SYMBOL_GPL(logic_dev_dump_regs); + +static int logic_dev_dump_init(logic_dev_dump_info_t *dump_info, struct device *dev, uint32_t cfg_index, + const logic_dev_dump_cfg_t *dump_logic_dev_cfg) +{ + int ret; + logic_dev_dump_t *dump_logic_dev; + + if (!dump_info || !dev || !dump_logic_dev_cfg) { + dev_err(dev, "invalid param, dump_info:%p, dev:%p, dump_logic_dev_cfg:%p\n", + dump_info, dev, dump_logic_dev_cfg); + return -EINVAL; + } + + if (!dump_logic_dev_cfg->logic_dev_name[0]) { + dev_err(dev, "invalid logic dev dump name, index:%u\n", cfg_index); + return -EINVAL; + } + + if (cfg_index >= LOGIC_DEV_DUMP_MAX_NUM) { + dev_err(dev, "logic dev dump index %u out of range, max:%u\n", + cfg_index, LOGIC_DEV_DUMP_MAX_NUM); + return -EINVAL; + } + + if (dump_logic_dev_cfg->logic_dev_reg_end < dump_logic_dev_cfg->logic_dev_reg_start) { + dev_err(dev, + "invalid logic dev dump range, dev:%s, start:0x%x, end:0x%x\n", + dump_logic_dev_cfg->logic_dev_name, + dump_logic_dev_cfg->logic_dev_reg_start, + dump_logic_dev_cfg->logic_dev_reg_end); + return -EINVAL; + } + + dump_logic_dev = &dump_info->dump_logic_dev_cfg[cfg_index]; + dump_logic_dev->logic_dev_name = kstrdup_const(dump_logic_dev_cfg->logic_dev_name, GFP_KERNEL); + if (!dump_logic_dev->logic_dev_name) { + dev_err(dev, "alloc logic dev dump name failed, dev:%s\n", + dump_logic_dev_cfg->logic_dev_name); + return -ENOMEM; + } + dump_logic_dev->logic_dev_func_mode = dump_logic_dev_cfg->logic_dev_func_mode; + dump_logic_dev->logic_dev_reg_start = dump_logic_dev_cfg->logic_dev_reg_start; + dump_logic_dev->logic_dev_reg_end = dump_logic_dev_cfg->logic_dev_reg_end; + + ret = find_intf_addr(&dump_logic_dev->logic_dev_write_intf_addr, + &dump_logic_dev->logic_dev_read_intf_addr, dump_logic_dev->logic_dev_func_mode); + if (ret) { + dev_err(dev, + "find_intf_addr for logic dev dump failed, mode:%u, ret:%d\n", + dump_logic_dev->logic_dev_func_mode, ret); + return ret; + } + + if (!dump_logic_dev->logic_dev_write_intf_addr || !dump_logic_dev->logic_dev_read_intf_addr) { + dev_err(dev, + "logic dev dump rw symbol undefined, mode:%u\n", + dump_logic_dev->logic_dev_func_mode); + return -ENOSYS; + } + + LOGIC_DEV_INFO("logic dev dump init success, index:%u, dev:%s, mode:%u, range:[0x%x, 0x%x]\n", + cfg_index, dump_logic_dev->logic_dev_name, dump_logic_dev->logic_dev_func_mode, + dump_logic_dev->logic_dev_reg_start, dump_logic_dev->logic_dev_reg_end); + + return 0; +} + +int logic_dev_dump_of_node_init(logic_dev_dump_info_t *dump_info, struct device *dev) +{ + int ret; + int rv; + int dump_logic_dev_name_num; + uint32_t i; + uint32_t dump_logic_dev_num; + uint32_t dump_logic_dev_func_mode; + uint32_t dump_logic_dev_reg_start; + uint32_t dump_logic_dev_reg_end; + const char *dump_logic_dev_name; + logic_dev_dump_cfg_t dump_logic_dev_cfg; + + if (!dump_info || !dev || !dev->of_node) { + dev_err(dev, "invalid param, dump_info:%p, dev:%p, of_node:%p\n", + dump_info, dev, dev ? dev->of_node : NULL); + return -EINVAL; + } + + dump_logic_dev_name_num = of_property_count_strings(dev->of_node, "dump_logic_dev_name"); + if (dump_logic_dev_name_num <= 0) { + return 0; + } + + if (dump_logic_dev_name_num > LOGIC_DEV_DUMP_MAX_NUM) { + dev_err(dev, "invalid logic dev dump num:%d, max:%u\n", + dump_logic_dev_name_num, LOGIC_DEV_DUMP_MAX_NUM); + return -EINVAL; + } + + dump_logic_dev_num = dump_logic_dev_name_num; + for (i = 0; i < dump_logic_dev_num; i++) { + rv = of_property_read_string_index(dev->of_node, "dump_logic_dev_name", i, &dump_logic_dev_name); + if (rv != 0) { + dev_err(dev, "dump_logic_dev_name[%u] read failed, rv:%d\n", i, rv); + return rv; + } + + if (!dump_logic_dev_name || !dump_logic_dev_name[0]) { + dev_err(dev, "dump_logic_dev_name[%u] is empty\n", i); + return -EINVAL; + } + + rv = of_property_read_u32_index(dev->of_node, "dump_logic_dev_func_mode", i, + &dump_logic_dev_func_mode); + if (rv != 0) { + dev_err(dev, + "dump_logic_dev_name[%u] configured but dump_logic_dev_func_mode[%u] is missing.\n", + i, i); + return rv; + } + + dump_logic_dev_reg_start = 0; + dump_logic_dev_reg_end = LOGIC_DEV_DUMP_REG_END_DEFAULT; + of_property_read_u32_index(dev->of_node, "dump_logic_dev_reg_start", i, &dump_logic_dev_reg_start); + of_property_read_u32_index(dev->of_node, "dump_logic_dev_reg_end", i, &dump_logic_dev_reg_end); + + mem_clear(&dump_logic_dev_cfg, sizeof(dump_logic_dev_cfg)); + strscpy(dump_logic_dev_cfg.logic_dev_name, dump_logic_dev_name, + sizeof(dump_logic_dev_cfg.logic_dev_name)); + dump_logic_dev_cfg.logic_dev_func_mode = dump_logic_dev_func_mode; + dump_logic_dev_cfg.logic_dev_reg_start = dump_logic_dev_reg_start; + dump_logic_dev_cfg.logic_dev_reg_end = dump_logic_dev_reg_end; + + ret = logic_dev_dump_init(dump_info, dev, i, &dump_logic_dev_cfg); + if (ret) { + return ret; + } + } + + dump_info->dump_logic_dev_num = dump_logic_dev_num; + + return 0; +} +EXPORT_SYMBOL_GPL(logic_dev_dump_of_node_init); + +int logic_dev_dump_cfg_info_init(logic_dev_dump_info_t *dump_info, struct device *dev, + const logic_dev_dump_cfg_info_t *dump_logic_dev_cfg_info) +{ + int ret; + uint32_t i; + uint32_t dump_logic_dev_num; + logic_dev_dump_cfg_t dump_logic_dev_cfg; + + if (!dump_info || !dev || !dump_logic_dev_cfg_info) { + dev_err(dev, "invalid param, dump_info:%p, dev:%p, dump_logic_dev_cfg_info:%p\n", + dump_info, dev, dump_logic_dev_cfg_info); + return -EINVAL; + } + + dump_logic_dev_num = dump_logic_dev_cfg_info->dump_logic_dev_num; + if (dump_logic_dev_num > LOGIC_DEV_DUMP_MAX_NUM) { + dev_err(dev, "invalid logic dev dump num:%u, max:%u\n", + dump_logic_dev_num, LOGIC_DEV_DUMP_MAX_NUM); + return -EINVAL; + } + + for (i = 0; i < dump_logic_dev_num; i++) { + mem_clear(&dump_logic_dev_cfg, sizeof(dump_logic_dev_cfg)); + dump_logic_dev_cfg = dump_logic_dev_cfg_info->dump_logic_dev_cfg[i]; + if (!dump_logic_dev_cfg.logic_dev_name[0]) { + dev_err(dev, "dump_logic_dev_cfg[%u].logic_dev_name is empty\n", i); + return -EINVAL; + } + + if (dump_logic_dev_cfg.logic_dev_reg_end == 0) { + dump_logic_dev_cfg.logic_dev_reg_end = LOGIC_DEV_DUMP_REG_END_DEFAULT; + } + + ret = logic_dev_dump_init(dump_info, dev, i, &dump_logic_dev_cfg); + if (ret) { + return ret; + } + } + + dump_info->dump_logic_dev_num = dump_logic_dev_num; + + return 0; +} +EXPORT_SYMBOL_GPL(logic_dev_dump_cfg_info_init); + +int cache_value_read(const char *mask_file_path, const char *cache_file_path, uint32_t offset, uint8_t *value, uint32_t count) +{ + int ret, i; + u8 mask_value[MAX_RW_LEN]; + u8 cache_value[MAX_RW_LEN]; + uint32_t total_read, per_len; + + if ((mask_file_path == NULL) || (cache_file_path == NULL) || (value == NULL)) { + DEBUG_ERROR("Invalid params, mask_file_path or cache_file_path or value in NULL\n"); + return -EINVAL; + } + + if (count == 0) { + DEBUG_ERROR("Invalid params, read count is 0.\n"); + return -EINVAL; + } + + DEBUG_INFO("mask_file_path: %s, cache_file_path: %s, offset: 0x%x, count: %u\n", + mask_file_path, cache_file_path, offset, count); + + total_read = 0; + while (total_read < count) { + mem_clear(mask_value, sizeof(mask_value)); + mem_clear(cache_value, sizeof(cache_value)); + per_len = (count - total_read) > MAX_RW_LEN ? MAX_RW_LEN : (count - total_read); + + ret = wb_dev_file_read(mask_file_path, offset, mask_value, per_len); + if (ret < 0) { + DEBUG_ERROR("mask_file read failed, mask_file_path: %s, offset: 0x%x, read_len: %u, ret: %d\n", + mask_file_path, offset, per_len, ret); + return ret; + } + + DEBUG_INFO("mask_file read success, mask_file_path: %s, offset: 0x%x, read_len: %u\n", + mask_file_path, offset, per_len); + + ret = wb_dev_file_read(cache_file_path, offset, cache_value, per_len); + if (ret < 0) { + DEBUG_ERROR("cache_file read failed, cache_file_path: %s, offset: 0x%x, read_len: %u, ret: %d\n", + cache_file_path, offset, per_len, ret); + return ret; + } + DEBUG_INFO("cache_file read success, cache_file_path: %s, offset: 0x%x, read_len: %u\n", + cache_file_path, offset, per_len); + + for (i = 0; i < per_len; i++) { + if (mask_value[i] > 0) { + DEBUG_INFO("offset: 0x%x replace origin value: 0x%x to cache value: 0x%x\n", + offset + i, value[total_read + i], cache_value[i]); + value[total_read + i] = cache_value[i]; + } + } + offset += per_len; + total_read += per_len; + } + + return total_read; +} +EXPORT_SYMBOL_GPL(cache_value_read); + +int cache_value_write(const char *mask_file_path, const char *cache_file_path, uint32_t offset, uint8_t *value, uint32_t count) +{ + int ret, i; + u8 mask_value[MAX_RW_LEN]; + u8 cache_value[MAX_RW_LEN]; + uint32_t total_write, per_len; + + if ((mask_file_path == NULL) || (cache_file_path == NULL) || (value == NULL)) { + DEBUG_ERROR("Invalid params, mask_file_path or cache_file_path or value in NULL\n"); + return -EINVAL; + } + + if (count == 0) { + DEBUG_ERROR("Invalid params, write count is 0.\n"); + return -EINVAL; + } + + DEBUG_INFO("mask_file_path: %s, cache_file_path: %s, offset: 0x%x, count: %u\n", + mask_file_path, cache_file_path, offset, count); + + total_write = 0; + while (total_write < count) { + mem_clear(mask_value, sizeof(mask_value)); + mem_clear(cache_value, sizeof(cache_value)); + per_len = (count - total_write) > MAX_RW_LEN ? MAX_RW_LEN : (count - total_write); + + ret = wb_dev_file_read(mask_file_path, offset, mask_value, per_len); + if (ret < 0) { + DEBUG_ERROR("mask_file read failed, mask_file_path: %s, offset: 0x%x, read_len: %u, ret: %d\n", + mask_file_path, offset, per_len, ret); + return ret; + } + + DEBUG_INFO("mask_file read success, mask_file_path: %s, offset: 0x%x, read_len: %u\n", + mask_file_path, offset, per_len); + + ret = wb_dev_file_read(cache_file_path, offset, cache_value, per_len); + if (ret < 0) { + DEBUG_ERROR("cache_file read failed, cache_file_path: %s, offset: 0x%x, read_len: %u, ret: %d\n", + cache_file_path, offset, per_len, ret); + return ret; + } + DEBUG_INFO("cache_file read success, cache_file_path: %s, offset: 0x%x, read_len: %u\n", + cache_file_path, offset, per_len); + + for (i = 0; i < per_len; i++) { + if (mask_value[i] > 0) { + DEBUG_INFO("cache file: %s offset: 0x%x replace value: 0x%x to value: 0x%x\n", + cache_file_path, offset + i, cache_value[i], value[i]); + cache_value[i] = value[total_write + i]; + } + } + ret = wb_dev_file_write(cache_file_path, offset, cache_value, per_len); + if (ret < 0) { + DEBUG_ERROR("cache_file write failed, cache_file_path: %s, offset: 0x%x, write_len: %u, ret: %d\n", + cache_file_path, offset, per_len, ret); + return ret; + } + DEBUG_INFO("cache_file write success, cache_file_path: %s, offset: 0x%x, write_len: %u\n", + cache_file_path, offset, per_len); + + offset += per_len; + total_write += per_len; + } + + return total_write; +} +EXPORT_SYMBOL_GPL(cache_value_write); + +static int __init logic_dev_init(void) +{ + int ret; + LOGIC_DEV_INFO("logic_dev_init...\n"); + logic_dev_kobj = kobject_create_and_add("logic_dev", NULL); + if (!logic_dev_kobj) { + DEBUG_ERROR("create logic_dev_kobj error.\n"); + return -ENOMEM; + } + + ret = find_kallsyms_lookup_name(); + if (ret < 0) { + DEBUG_ERROR("find kallsyms_lookup_name failed\n"); + kobject_put(logic_dev_kobj); + logic_dev_kobj = NULL; + return -ENXIO; + } + DEBUG_INFO("find kallsyms_lookup_name ok\n"); + LOGIC_DEV_INFO("logic_dev_init success.\n"); + return 0; +} + +static int logic_dev_status_check_read_func(struct device_status_check *status_check, + uint32_t reg, + uint8_t *data_buf, + uint32_t read_len) +{ + int ret; + + if (status_check == NULL) { + DEBUG_ERROR("status_check is NULL\n"); + return -EINVAL; + } + + if (status_check->dev_bus_ops.read == NULL) { + DEBUG_ERROR("status_check read func is NULL\n"); + return -EINVAL; + } + + ret = status_check->dev_bus_ops.read(status_check->dev_name, + reg, + data_buf, + read_len); + + return ret; +} + +static int logic_dev_status_check_write_func(struct device_status_check *status_check, + uint32_t reg, + uint8_t *data_buf, + uint32_t read_len) +{ + int ret; + + if (status_check == NULL) { + DEBUG_ERROR("status_check is NULL\n"); + return -EINVAL; + } + + if (status_check->dev_bus_ops.write == NULL) { + DEBUG_ERROR("status_check write func is NULL\n"); + return -EINVAL; + } + + ret = status_check->dev_bus_ops.write(status_check->dev_name, + reg, + data_buf, + read_len); + + return ret; +} + +static int status_check_read_check(struct device_status_check *status_check, + uint32_t data_byte_len, + uint32_t reg, + uint8_t *check_val, + uint8_t *mask, + uint32_t type) +{ + int ret; + uint8_t val[MAX_DATA_WIDTH]; + u32 j; + + mem_clear(val, sizeof(val)); + ret = logic_dev_status_check_read_func(status_check, reg, val, data_byte_len); + if (ret < 0) { + DEBUG_ERROR("Soft fail read failed at reg 0x%x: read=0x%x expect=0x%x mask=0x%x\n", + reg, + val[0], + check_val[0], + mask[0]); + + return ret; + } + + for (j = 0; j < data_byte_len; j++) { + DEBUG_VERBOSE("reg 0x%x: read=0x%x expect=0x%x mask=0x%x\n", reg, val[j], check_val[j], mask[j]); + val[j] &= mask[j]; + } + + ret = dev_rw_check(val, check_val, data_byte_len, type, WB_LOGIC_NORMAL); + if (ret < 0) { + DEBUG_ERROR("STATUS_NOT_OK result check failed, ret:%d.\n", ret); + DEBUG_ERROR("Soft fail check failed at reg 0x%x: read=0x%x expect=0x%x mask=0x%x\n", + reg, + val[0], + check_val[0], + mask[0]); + + return ret; + } + + DEBUG_VERBOSE("STATUS_OK rw one time result check success. reg 0x%x: read=0x%x expect=0x%x mask=0x%x\n", + reg, + val[0], + check_val[0], + mask[0]); + + return 0; +} + +static int check_seu(struct device_status_check *status_check, + uint32_t data_byte_len) +{ + int ret; + u32 i; + + if (!(status_check->status_check_type_bmp & STATUS_CHECK_SEU)) { + return 0; + } + + for (i = 0; i < status_check->seu_check_num; i++) { + ret = status_check_read_check(status_check, data_byte_len, status_check->seu_checks[i].reg, + status_check->seu_checks[i].value, status_check->seu_checks[i].mask, + STATUS_CHECK_SEU); + if (ret < 0) { + DEBUG_ERROR("status_check_read_check failed\n"); + return ret; + } + } + + DEBUG_VERBOSE("STATUS_OK rw one time result check success."); + return 0; +} + +static int check_selftest_status(struct device_status_check *status_check, + uint32_t data_byte_len) +{ + int ret; + uint8_t val[MAX_DATA_WIDTH]; + u32 i; + + if (!(status_check->status_check_type_bmp & STATUS_CHECK_SELFTEST)) { + return 0; + } + + for (i = 0; i < status_check->selftest_check_num; i++) { + ret = logic_dev_status_check_write_func(status_check, + status_check->selftest_checks[i].reg, + status_check->selftest_checks[i].write_value, + data_byte_len); + if (ret < 0) { + DEBUG_ERROR("selftest fail write failed at reg 0x%x: wr_value=0x%x\n", + status_check->selftest_checks[i].reg, + status_check->selftest_checks[i].write_value[0]); + return ret; + } + + mem_clear(val, sizeof(val)); + ret = logic_dev_status_check_read_func(status_check, + status_check->selftest_checks[i].reg, + val, + data_byte_len); + if (ret < 0) { + DEBUG_ERROR("selftest fail read failed at reg 0x%x\n", + status_check->selftest_checks[i].reg); + + return ret; + } + + ret = dev_rw_check(val, status_check->selftest_checks[i].write_value, data_byte_len, STATUS_CHECK_SELFTEST, + status_check->selftest_checks[i].check_mode); + if (ret < 0) { + DEBUG_ERROR("STATUS_NOT_OK result check failed, ret:%d.\n", ret); + DEBUG_ERROR("selftest fail check failed at reg 0x%x: read=0x%x expect=0x%x check_mode=0x%x\n", + status_check->selftest_checks[i].reg, + val[0], + status_check->selftest_checks[i].write_value[0], + status_check->selftest_checks[i].check_mode); + return ret; + } + + DEBUG_ERROR("STATUS_OK rw one time result check success. reg 0x%x: read=0x%x expect=0x%x check_type=0x%x\n", + status_check->selftest_checks[i].reg, + val[0], + status_check->selftest_checks[i].write_value[0], + status_check->selftest_checks[i].check_mode); + } + + DEBUG_VERBOSE("STATUS_OK rw one time result check success."); + return 0; +} + +static int check_scratch_status(struct device_status_check *status_check, + uint32_t data_byte_len) +{ + int ret; + uint8_t val[MAX_DATA_WIDTH]; + u32 i; + + if (!(status_check->status_check_type_bmp & STATUS_CHECK_SCRATCH)) { + return 0; + } + + for (i = 0; i < status_check->scratch_num; i++) { + mem_clear(val, sizeof(val)); + ret = logic_dev_status_check_read_func(status_check, + status_check->scratch_checks[i].reg, + val, + data_byte_len); + if (ret < 0) { + DEBUG_ERROR("check scratch fail, read failed at reg 0x%x\n", + status_check->scratch_checks[i].reg); + + return ret; + } + + ret = dev_rw_check(val, status_check->scratch_checks[i].value, data_byte_len, STATUS_CHECK_SCRATCH, + status_check->scratch_checks[i].check_mode); + if (ret < 0) { + DEBUG_ERROR("STATUS_NOT_OK result check failed, ret:%d.\n", ret); + DEBUG_ERROR("Soft fail check failed at reg 0x%x: read=0x%x expect=0x%x check_mode=0x%x\n", + status_check->scratch_checks[i].reg, + val[0], + status_check->scratch_checks[i].value[0], + status_check->scratch_checks[i].check_mode); + + return ret; + } + + DEBUG_VERBOSE("STATUS_OK rw one time result check success. reg 0x%x: read=0x%x expect=0x%x\n", + status_check->scratch_checks[i].reg, + val[0], + status_check->scratch_checks[i].value[0]); + + } + + DEBUG_VERBOSE("STATUS_OK rw one time result check success."); + return 0; +} + +static uint64_t combine_bytes_to_value(uint8_t *buf, uint32_t buf_len, uint32_t width) { + uint64_t val; + int j; + + val = 0; + for (j = 0; (j < width) && (j < buf_len); j++) { + val |= (uint64_t)(buf[j] & 0xff) << (8 * j); + } + + return val; +} + +static int check_cram(struct device_status_check *status_check, + uint32_t data_byte_len, + uint32_t *status_value) +{ + int ret; + uint8_t val[MAX_DATA_WIDTH]; + + *status_value = CRAM_ALL_BITS_SET; + if (!(status_check->status_check_type_bmp & STATUS_CHECK_CRAM)) { + return 0; + } + + if (data_byte_len < WIDTH_4Byte || data_byte_len > MAX_DATA_WIDTH) { + DEBUG_ERROR("data_byte_len to short. len:%d.\n", data_byte_len); + return -EINVAL; + } + + mem_clear(val, sizeof(val)); + ret = logic_dev_status_check_read_func(status_check, + status_check->cram_checks.reg, + val, + data_byte_len); + if (ret < 0) { + DEBUG_ERROR("check cram fail, read failed at reg 0x%x\n", + status_check->cram_checks.reg); + + return ret; + } + + *status_value = CRAM_STATUS_FROM_BYTE(val); + if (*status_value != CRAM_STATUS_OK) { + DEBUG_ERROR("status_value: 0x%x, ok value 0x%x, status check result failed.\n", *status_value, CRAM_STATUS_OK); + return -EIO; + } + + DEBUG_VERBOSE("STATUS_OK cram result check success. reg 0x%x: status_value=0x%x expect=0x%x\n", + status_check->cram_checks.reg, + *status_value, + CRAM_STATUS_OK); + + return 0; +} + +static int dev_status_check(struct device_status_check *status_check, + uint32_t data_byte_len, + uint32_t type, + uint32_t *status_value) +{ + int ret, i; + + ret = 0; + for (i = 0; i < LOGIC_DEV_RETRY_TIME; i++) { + if (type == STATUS_CHECK_SEU) { + ret = check_seu(status_check, data_byte_len); + } else if (type == STATUS_CHECK_SELFTEST) { + ret = check_selftest_status(status_check, data_byte_len); + } else if (type == STATUS_CHECK_SCRATCH) { + ret = check_scratch_status(status_check, data_byte_len); + } else if (type == STATUS_CHECK_CRAM) { + ret = check_cram(status_check, data_byte_len, status_value); + } else { + ret = -1; + break; + } + + if (ret < 0) { + DEBUG_ERROR("check STATUS_NOT_OK time: %d, type: 0x%x, ret: %d\n", + i, type, ret); + msleep(LOGIC_DEV_RETRY_DELAY_MS); + continue; + } + break; + } + + return ret; +} + +static int cram_fail_format_device_status_message(struct device_status_check *status_check, + uint32_t data_byte_len, + uint32_t type, + char *buf, + uint32_t buf_len, + uint32_t status_value) +{ + int ret; + uint8_t val[MAX_DATA_WIDTH]; + u32 i; + uint64_t value_tmp; + int count; + const char *detail; + uint32_t output_status_value; + + DEBUG_VERBOSE("cram_fail_format_device_status_message start."); + + /* Normalize single+multi bit error to multi-bit error. */ + output_status_value = (status_value == CRAM_STATUS_SINGLE_MULTI_BIT_ERROR) ? + CRAM_STATUS_MULTI_BIT_ERROR : status_value; + + /* Return a read-failure detail when CRAM status cannot be parsed. */ + if (output_status_value == CRAM_ALL_BITS_SET) { + return snprintf(buf, buf_len, "0x%x %s\n", output_status_value, CRAM_DETAIL_LOGICDEV_ERROR); + } + + if (output_status_value > CRAM_STATUS_MULTI_BIT_ERROR) { + DEBUG_ERROR("cram_fail_format_device_status_message invalid status value: 0x%x\n", output_status_value); + return -EINVAL; + } + + count = snprintf(buf, buf_len, "0x%x", output_status_value); + + for (i = 0; i < status_check->cram_checks.cram_err_addr_reg_num; i++) { + mem_clear(val, sizeof(val)); + ret = logic_dev_status_check_read_func(status_check, + status_check->cram_checks.cram_err_addr_reg[i], + val, + data_byte_len); + if (ret < 0) { + DEBUG_ERROR("cram_err_addr_reg read fail, read failed at reg 0x%x data_byte_len %d\n", + status_check->cram_checks.cram_err_addr_reg[i], data_byte_len); + count += snprintf(buf + strlen(buf), buf_len - strlen(buf), " fail"); + + continue; + } + + value_tmp = combine_bytes_to_value(val, sizeof(val), data_byte_len); + value_tmp &= status_check->cram_checks.cram_err_addr_reg_mask[i]; + value_tmp = value_tmp >> CRAM_ERR_ADDR_DATA_OFFSET; + + count += snprintf(buf + strlen(buf), buf_len - strlen(buf), " 0x%" PRIX64 "", value_tmp); + + DEBUG_VERBOSE("cram_fail_format_device_status_message reg 0x%x: read=0x%" PRIX64 " data_byte_len %d mask 0x%x\n", + status_check->cram_checks.cram_err_addr_reg[i], + value_tmp, + data_byte_len, + status_check->cram_checks.cram_err_addr_reg_mask[i]); + + } + + detail = NULL; + switch (output_status_value) { + case CRAM_STATUS_SINGLE_BIT_ERROR: + detail = CRAM_DETAIL_SINGLE_BIT_ERROR; + break; + case CRAM_STATUS_MULTI_BIT_ERROR: + detail = CRAM_DETAIL_MULTI_BIT_ERROR; + break; + default: + break; + } + + if (detail != NULL) { + count += snprintf(buf + strlen(buf), buf_len - strlen(buf), " %s", detail); + } + + DEBUG_VERBOSE("cram_fail_format_device_status_message end."); + count += snprintf(buf + strlen(buf), buf_len - strlen(buf), "\n"); + + return count; + +} + +static int format_device_status_message(struct device_status_check *status_check, + uint32_t data_byte_len, + uint32_t type, + char *buf, + uint32_t buf_len, + uint32_t status, + uint32_t status_value) +{ + int ret; + + ret = 0; + switch (type) { + case STATUS_CHECK_SEU: + case STATUS_CHECK_SELFTEST: + case STATUS_CHECK_SCRATCH: + return snprintf(buf, buf_len, "0x%x\n", status); + break; + case STATUS_CHECK_CRAM: + if (status == LOGIC_DEV_STATUS_OK) { + return snprintf(buf, buf_len, "0x%x\n", status); + } + + return cram_fail_format_device_status_message(status_check, data_byte_len, type, + buf, buf_len, status_value); + + break; + default: + DEBUG_ERROR("not found init func, check type 0x%x\n", type); + return -EINVAL; + } + + return ret; + +} + + +static int dev_status_check_message(struct device_status_check *status_check, + uint32_t data_byte_len, + uint32_t type, + char *buf, + uint32_t buf_len) +{ + int ret; + u32 status; + uint32_t status_value; + + status = 0; + ret = dev_status_check(status_check, data_byte_len, type, &status_value); + if (ret != 0) { + status = LOGIC_DEV_STATUS_NOT_OK; + } + + ret = format_device_status_message(status_check, data_byte_len, type, buf, buf_len, status, status_value); + + return ret; +} + +static int wb_logic_check_scratch_status_init(struct device_status_check *status_check, + uint32_t data_byte_len) +{ + int ret; + u32 i; + + if (status_check == NULL) { + DEBUG_ERROR("param is NULL\n"); + return -EINVAL; + } + + if (data_byte_len > MAX_DATA_WIDTH || data_byte_len == 0) { + DEBUG_ERROR("data_byte_len is error.(data_byte_len: %d)\n", data_byte_len); + return -EINVAL; + } + + for (i = 0; i < status_check->scratch_num; i++) { + ret = logic_dev_status_check_write_func(status_check, + status_check->scratch_checks[i].reg, + status_check->scratch_checks[i].value, + data_byte_len); + if (ret < 0) { + return ret; + } + + status_check->scratch_checks[i].initialized = true; + } + + DEBUG_VERBOSE("STATUS_OK rw one time result check success."); + return 0; +} + +static int wb_logic_check_status_hw_init_with_type(struct device_status_check *status_check, + uint32_t data_byte_len, + uint32_t check_type) +{ + int ret; + + ret = 0; + switch (check_type) { + case STATUS_CHECK_SEU: + break; + case STATUS_CHECK_SELFTEST: + break; + case STATUS_CHECK_CRAM: + break; + case STATUS_CHECK_SCRATCH: + ret = wb_logic_check_scratch_status_init(status_check, data_byte_len); + if (ret < 0) { + DEBUG_ERROR("wb_logic_check_scratch_status_init fail. ret %d\n", ret); + } + break; + default: + DEBUG_ERROR("not found init func, check type 0x%x\n", check_type); + return -EINVAL; + } + + return ret; +} + + +int wb_logic_check_status_hw_init(struct device_status_check *status_check, + uint32_t data_byte_len) +{ + int ret; + int check_type; + int i; + int fail_count; + + fail_count = 0; + if (status_check == NULL) { + DEBUG_ERROR("param is NULL\n"); + return -EINVAL; + } + + ret = 0; + for (i = 0; i < STATUS_CHECK_TYPE_MAX; i++) { + check_type = STATUS_CHECK_BITS(i); + if (status_check->status_check_type_bmp & check_type) { + ret = wb_logic_check_status_hw_init_with_type(status_check, data_byte_len, check_type); + if (ret < 0) { + fail_count++; + DEBUG_ERROR("wb_logic_check_status_hw_init_with_type init fail, check type 0x%x ret %d\n", check_type, ret); + } + } else { + DEBUG_INFO("unsupport type skip hw init.(0x%x)\n", check_type); + } + } + + if (fail_count != 0) { + return -EINVAL; + } + + return 0; +} +EXPORT_SYMBOL_GPL(wb_logic_check_status_hw_init); + +int wb_logic_dev_get_status(struct device_status_check *status_check, + uint32_t data_byte_len, + char *buf, + uint32_t buf_len) +{ + int ret; + u32 val; + u32 check_type; + u32 bit; + uint32_t status_value; + + if (status_check == NULL || buf == NULL) { + DEBUG_ERROR("param is NULL.(status_check: %p, buf: %p)\n", status_check, buf); + return -EINVAL; + } + + if (data_byte_len > MAX_DATA_WIDTH || data_byte_len == 0) { + DEBUG_ERROR("data_byte_len is error.(data_byte_len: %d)\n", data_byte_len); + return -EINVAL; + } + + if (status_check->status_check_type_bmp == 0) { + DEBUG_ERROR("unsupport dev status check.\n"); + return -EOPNOTSUPP; + } + + val = 0; + for (bit = 0; bit < STATUS_CHECK_TYPE_MAX; bit++) { + check_type = STATUS_CHECK_BITS(bit); + if (status_check->status_check_type_bmp & check_type) { + ret = dev_status_check(status_check, data_byte_len, check_type, &status_value); + if (ret != 0) { + val |= check_type; + } + } else { + DEBUG_INFO("unsupport type skip check.(0x%x)\n", check_type); + } + } + + status_check->dev_status = val; + + return snprintf(buf, buf_len, "0x%x\n", status_check->dev_status); +} +EXPORT_SYMBOL_GPL(wb_logic_dev_get_status); + +uint32_t wb_logic_status_type_get_number(uint32_t type_bmp) +{ + int i; + u32 check_type; + uint8_t support_check_number; + + support_check_number = 0; + for (i = 0; i < STATUS_CHECK_TYPE_MAX; i++) { + check_type = STATUS_CHECK_BITS(i); + + if (type_bmp & check_type) { + support_check_number++; + } + } + + return support_check_number; +} +EXPORT_SYMBOL_GPL(wb_logic_status_type_get_number); + +static int wb_logic_get_check_type_bit(uint32_t type_bmp) +{ + int i; + u32 check_type_tmp; + uint8_t check_type; + + check_type = -1; + for (i = 0; i < STATUS_CHECK_TYPE_MAX; i++) { + check_type_tmp = STATUS_CHECK_BITS(i); + + if (type_bmp & check_type_tmp) { + check_type = i; + break; + } + } + + return check_type; +} + +static int set_last_dev_status_with_type(struct device_status_check *status_check, + uint32_t type, + uint32_t status) +{ + int status_tmp; + int bit_number; + + if (status == LOGIC_DEV_STATUS_OK) { + status_tmp = LOGIC_DEV_STATUS_OK; + } else { + status_tmp = LOGIC_DEV_STATUS_NOT_OK; + } + + bit_number = wb_logic_get_check_type_bit(type); + status_check->type_dev_status[bit_number] = status_tmp; + + return status_tmp; +} + +int wb_logic_dev_get_status_with_type(struct device_status_check *status_check, + uint32_t data_byte_len, + char *buf, + uint32_t buf_len, + uint32_t type) +{ + int ret; + u32 val; + int check_type_number; + + if (status_check == NULL || buf == NULL) { + DEBUG_ERROR("param is NULL.(status_check: %p, buf: %p)\n", status_check, buf); + return -EINVAL; + } + + if (data_byte_len > MAX_DATA_WIDTH || data_byte_len == 0) { + DEBUG_ERROR("data_byte_len is error.(data_byte_len: %d)\n", data_byte_len); + + return -EINVAL; + } + + val = 0; + /* Input parameter detection, only one type */ + check_type_number = wb_logic_status_type_get_number(type); + if (check_type_number != 1) { + DEBUG_ERROR("check_type_number not 1: 0x%x.\n", type); + return -EINVAL; + } + + if (status_check->status_check_type_bmp & type) { + ret = dev_status_check_message(status_check, data_byte_len, type, buf, buf_len); + } else { + DEBUG_ERROR("unsupport dev status check.\n"); + return -EOPNOTSUPP; + } + + set_last_dev_status_with_type(status_check, type, val); + + return ret; +} +EXPORT_SYMBOL_GPL(wb_logic_dev_get_status_with_type); + +/* return: 0:not cache, -x: fail, +x: use cache status */ +int wb_logic_get_cache_status_with_type(struct device_status_check *status_check, + uint32_t check_type, + uint32_t status_cache_ms, + char *buf, + uint32_t buf_len) +{ + int check_type_number; + int bit_number; + + if (status_check == NULL || buf == NULL) { + DEBUG_ERROR("param is NULL.(status_check: %p, buf: %p)\n", status_check, buf); + return -EINVAL; + } + + /* Input parameter detection, only one type */ + check_type_number = wb_logic_status_type_get_number(check_type); + if (check_type_number != 1) { + DEBUG_ERROR("check_type_number not 1: 0x%x.\n", check_type); + return -EINVAL; + } + + /* get bit_number 100% success */ + bit_number = wb_logic_get_check_type_bit(check_type); + if (time_before(jiffies, status_check->type_last_jiffies[bit_number] + msecs_to_jiffies(status_cache_ms))) { + /* Within the time range of status_cache_ms, directly return the last result */ + DEBUG_VERBOSE("time before last time %d ms return last status: %d\n", + status_cache_ms, status_check->type_dev_status[bit_number]); + return snprintf(buf, buf_len, "%u\n", status_check->type_dev_status[bit_number]); + } + + status_check->type_last_jiffies[bit_number] = jiffies; + + return 0; +} +EXPORT_SYMBOL_GPL(wb_logic_get_cache_status_with_type); + +static void set_seu_value_buf(int data_bus_width, int data_num, struct device_status_check *status_check, uint32_t *reg_data_buf) +{ + int i; + int j; + + if (data_num == data_bus_width) { + for (i = 0; i < status_check->seu_check_num; i++) { + for (j = 0; j < data_bus_width; j++) { + status_check->seu_checks[i].value[j] = reg_data_buf[j]; + } + } + } else { + for (i = 0; i < status_check->seu_check_num; i++) { + for (j = 0; j < data_bus_width; j++) { + status_check->seu_checks[i].value[j] = reg_data_buf[j + i * data_bus_width]; + } + } + } +} + +static void set_seu_mask_buf_def(int data_bus_width, struct device_status_check *status_check) +{ + int i; + int j; + + for (i = 0; i < status_check->seu_check_num; i++) { + for (j = 0; j < data_bus_width; j++) { + status_check->seu_checks[i].mask[j] = 0xff; + } + } +} + +static void set_seu_mask_buf(int data_bus_width, int data_num, struct device_status_check *status_check, uint32_t *reg_data_buf) +{ + int i; + int j; + + if (data_num == data_bus_width) { + for (i = 0; i < status_check->seu_check_num; i++) { + for (j = 0; j < data_bus_width; j++) { + status_check->seu_checks[i].mask[j] = reg_data_buf[j]; + } + } + } else { + for (i = 0; i < status_check->seu_check_num; i++) { + for (j = 0; j < data_bus_width; j++) { + status_check->seu_checks[i].mask[j] = reg_data_buf[j + i * data_bus_width]; + } + } + } +} + +static void set_cram_mask_buf_def(struct device_status_check *status_check) +{ + int i; + + for (i = 0; i < status_check->cram_checks.cram_err_addr_reg_num; i++) { + status_check->cram_checks.cram_err_addr_reg_mask[i] = CRAM_ALL_BITS_SET; + } +} + +static void set_cram_mask_buf(int data_num, struct device_status_check *status_check, uint32_t *reg_data_buf) +{ + int i; + + if (data_num == CRAM_CONFIG_MASK_MIN_COUNT) { + for (i = 0; i < status_check->cram_checks.cram_err_addr_reg_num; i++) { + status_check->cram_checks.cram_err_addr_reg_mask[i] = reg_data_buf[0]; + } + } else { + for (i = 0; i < status_check->cram_checks.cram_err_addr_reg_num; i++) { + status_check->cram_checks.cram_err_addr_reg_mask[i] = reg_data_buf[i]; + } + } +} + +static void set_selftest_value_buf(int data_bus_width, int data_num, struct device_status_check *status_check, uint32_t *reg_data_buf) +{ + int i; + int j; + + if (data_num == data_bus_width) { + for (i = 0; i < status_check->selftest_check_num; i++) { + for (j = 0; j < data_bus_width; j++) { + status_check->selftest_checks[i].write_value[j] = reg_data_buf[j]; + } + } + } else { + for (i = 0; i < status_check->selftest_check_num; i++) { + for (j = 0; j < data_bus_width; j++) { + status_check->selftest_checks[i].write_value[j] = reg_data_buf[j + i * data_bus_width]; + } + } + } +} + +static void wb_logic_check_type_status_and_jiffies_init(struct device_status_check *status_check) +{ + int i; + + status_check->last_jiffies = jiffies; + status_check->dev_status = 0; + + for (i = 0; i < STATUS_CHECK_TYPE_MAX; i++) { + status_check->type_last_jiffies[i] = jiffies; + status_check->type_dev_status[i] = 0; + } + + return; +} + + +static void set_scratch_value_buf(int data_bus_width, int data_num, struct device_status_check *status_check, uint32_t *reg_data_buf) +{ + int i; + int j; + + if (data_num == data_bus_width) { + for (i = 0; i < status_check->scratch_num; i++) { + for (j = 0; j < data_bus_width; j++) { + status_check->scratch_checks[i].value[j] = reg_data_buf[j]; + } + } + } else { + for (i = 0; i < status_check->scratch_num; i++) { + for (j = 0; j < data_bus_width; j++) { + status_check->scratch_checks[i].value[j] = reg_data_buf[j + i * data_bus_width]; + } + } + } +} + +static void cram_checks_value_init_def(struct device_status_check *status_check) +{ + status_check->cram_checks.cram_err_addr_reg_num = CRAM_ERR_ADDR_NUM_DEF; + status_check->cram_checks.cram_err_addr_reg[0] = status_check->cram_checks.reg; + status_check->cram_checks.cram_err_addr_reg_mask[0] = CRAM_ERR_ADDR_REG_MASK_DEF; +} + +static int of_dev_seu_status_check_config_init(struct device *dev, + struct device_status_check *status_check, + uint32_t data_byte_len) +{ + int ret; + uint32_t reg_buf[MAX_DATA_WIDTH]; + uint32_t reg_data_buf[MAX_REG_DATA_LEN]; + int data_bus_width; + int data_num; + int i; + + ret = of_property_read_u32(dev->of_node, "seu_check_num", &status_check->seu_check_num); + if (ret != 0) { + dev_err(dev, "Failed to get seu_check_num config, ret: %d\n", ret); + return -ENXIO; + } + + if ((status_check->seu_check_num == 0) || (status_check->seu_check_num > TEST_REG_MAX_NUM)) { + dev_err(dev, "Invalid seu_check_num: %u\n", status_check->seu_check_num); + return -EINVAL; + } + + /* get reg */ + ret = of_property_read_u32_array(dev->of_node, "seu_reg", reg_buf, status_check->seu_check_num); + if(ret != 0) { + dev_err(dev, "Failed to get seu_reg config, ret: %d\n", ret); + return -ENXIO; + } + + for (i = 0; i < status_check->seu_check_num; i++) { + status_check->seu_checks[i].reg = reg_buf[i]; + } + + data_bus_width = data_byte_len; + /* get seu reg data */ + data_num = of_property_count_elems_of_size(dev->of_node, "seu_reg_data", sizeof(u32)); + if (data_num <= 0) { + dev_err(dev, "Invalid seu_reg_data num: %u\n", data_num); + return -EINVAL; + } + + if (data_num != data_bus_width && data_num != (data_bus_width * status_check->seu_check_num)) { + dev_err(dev, "Fail seu_reg_data num: %u\n", data_num); + return -EINVAL; + } + + for (i = 0; i < data_num; i++) { + ret = of_property_read_u32_index(dev->of_node, "seu_reg_data", i, ®_data_buf[i]); + if (ret < 0) { + dev_err(dev, "Failed to get seu_reg_data config, ret: %d\n", ret); + return -ENXIO; + } + } + + /* set seu value */ + set_seu_value_buf(data_bus_width, data_num, status_check, reg_data_buf); + + /* get seu reg data mask */ + data_num = of_property_count_elems_of_size(dev->of_node, "seu_reg_mask", sizeof(u32)); + if (data_num <= 0) { + set_seu_mask_buf_def(data_bus_width, status_check); + goto mask_out; + } + + if (data_num != data_bus_width && data_num != (data_bus_width * status_check->seu_check_num)) { + dev_err(dev, "Fail seu_reg_mask num: %u\n", data_num); + return -EINVAL; + } + + for (i = 0; i < data_num; i++) { + ret = of_property_read_u32_index(dev->of_node, "seu_reg_mask", i, ®_data_buf[i]); + if (ret < 0) { + dev_err(dev, "Fail to get seu_reg_mask value: %d\n", ret); + return -EINVAL; + } + } + + set_seu_mask_buf(data_bus_width, data_num, status_check, reg_data_buf); + +mask_out: + return 0; +} + +static int of_dev_selftest_status_check_config_init(struct device *dev, + struct device_status_check *status_check, + uint32_t data_byte_len) +{ + int ret; + uint32_t reg_buf[MAX_DATA_WIDTH]; + uint32_t reg_data_buf[MAX_REG_DATA_LEN]; + int data_bus_width; + int data_num; + int i; + + ret = of_property_read_u32(dev->of_node, "selftest_check_num", &status_check->selftest_check_num); + if (ret != 0) { + dev_err(dev, "Failed to get selftest_check_num config, ret: %d\n", ret); + return -ENXIO; + } + + if ((status_check->selftest_check_num == 0) || (status_check->selftest_check_num > TEST_REG_MAX_NUM)) { + dev_err(dev, "Invalid selftest_check_num: %u\n", status_check->selftest_check_num); + return -EINVAL; + } + + ret = of_property_read_u32_array(dev->of_node, "selftest_reg", reg_buf, status_check->selftest_check_num); + if(ret != 0) { + dev_err(dev, "Failed to get selftest_reg config, ret: %d\n", ret); + return -ENXIO; + } + + for (i = 0; i < status_check->selftest_check_num; i++) { + status_check->selftest_checks[i].reg = reg_buf[i]; + } + + ret = of_property_read_u32_array(dev->of_node, "selftest_check_mode", reg_buf, status_check->selftest_check_num); + if(ret != 0) { + /* defalut use 0 */ + for (i = 0; i < status_check->selftest_check_num; i++) { + status_check->selftest_checks[i].check_mode = WB_LOGIC_NORMAL; + } + } else { + for (i = 0; i < status_check->selftest_check_num; i++) { + status_check->selftest_checks[i].check_mode = reg_buf[i]; + } + } + + data_bus_width = data_byte_len; + /* get selftest reg data */ + data_num = of_property_count_elems_of_size(dev->of_node, "selftest_reg_data", sizeof(u32)); + if (data_num <= 0) { + dev_err(dev, "Invalid selftest_reg_data num: %u\n", data_num); + return -EINVAL; + } + + if (data_num != data_bus_width && data_num != (data_bus_width * status_check->selftest_check_num)) { + dev_err(dev, "Fail selftest_reg_data num: %u\n", data_num); + return -EINVAL; + } + + for (i = 0; i < data_num; i++) { + ret = of_property_read_u32_index(dev->of_node, "selftest_reg_data", i, ®_data_buf[i]); + if (ret < 0) { + dev_err(dev, "Failed to get selftest_reg_data config, ret: %d\n", ret); + return -ENXIO; + } + } + + /* set selftest value */ + set_selftest_value_buf(data_bus_width, data_num, status_check, reg_data_buf); + + return 0; +} + +static int of_dev_scratch_status_check_config_init(struct device *dev, + struct device_status_check *status_check, + uint32_t data_byte_len) +{ + int ret; + uint32_t reg_buf[MAX_DATA_WIDTH]; + uint32_t reg_data_buf[MAX_REG_DATA_LEN]; + int data_bus_width; + int data_num; + int i; + + ret = of_property_read_u32(dev->of_node, "scratch_check_num", &status_check->scratch_num); + if (ret != 0) { + dev_err(dev, "Failed to get scratch_check_num config, ret: %d\n", ret); + return -ENXIO; + } + + if ((status_check->scratch_num == 0) || (status_check->scratch_num > TEST_REG_MAX_NUM)) { + dev_err(dev, "Invalid scratch_num: %u\n", status_check->scratch_num); + return -EINVAL; + } + + ret = of_property_read_u32_array(dev->of_node, "scratch_reg", reg_buf, status_check->scratch_num); + if(ret != 0) { + dev_err(dev, "Failed to get scratch_reg config, ret: %d\n", ret); + return -ENXIO; + } + + for (i = 0; i < status_check->scratch_num; i++) { + status_check->scratch_checks[i].reg = reg_buf[i]; + } + + ret = of_property_read_u32_array(dev->of_node, "scratch_check_mode", reg_buf, status_check->scratch_num); + if(ret != 0) { + /* defalut use 0 */ + for (i = 0; i < status_check->scratch_num; i++) { + status_check->scratch_checks[i].check_mode = WB_LOGIC_NORMAL; + } + } else { + for (i = 0; i < status_check->scratch_num; i++) { + status_check->scratch_checks[i].check_mode = reg_buf[i]; + } + } + + data_bus_width = data_byte_len; + /* get selftest reg data */ + data_num = of_property_count_elems_of_size(dev->of_node, "scratch_reg_data", sizeof(u32)); + if (data_num <= 0) { + dev_err(dev, "Invalid scratch_reg_data num: %u\n", data_num); + return -EINVAL; + } + + if (data_num != data_bus_width && data_num != (data_bus_width * status_check->scratch_num)) { + dev_err(dev, "Fail scratch_reg_data num: %u\n", data_num); + return -EINVAL; + } + + for (i = 0; i < data_num; i++) { + ret = of_property_read_u32_index(dev->of_node, "scratch_reg_data", i, ®_data_buf[i]); + if (ret < 0) { + dev_err(dev, "Failed to get scratch_reg_data config, ret: %d\n", ret); + return -ENXIO; + } + } + + /* set scratch value */ + set_scratch_value_buf(data_bus_width, data_num, status_check, reg_data_buf); + + return 0; +} + +static int of_dev_cram_status_check_config_init(struct device *dev, + struct device_status_check *status_check, + uint32_t data_byte_len) +{ + int ret; + int i; + int data_num; + int data_bus_width; + uint32_t reg_data_buf[MAX_REG_DATA_LEN]; + + ret = of_property_read_u32(dev->of_node, "cram_reg", &status_check->cram_checks.reg); + if(ret != 0) { + dev_err(dev, "Failed to get cram_reg config, ret: %d\n", ret); + return -ENXIO; + } + + ret = of_property_read_u32(dev->of_node, "cram_err_addr_reg_num", &status_check->cram_checks.cram_err_addr_reg_num); + if (ret == 0) { + if ((status_check->cram_checks.cram_err_addr_reg_num == 0) || (status_check->cram_checks.cram_err_addr_reg_num > TEST_REG_MAX_NUM)) { + dev_err(dev, "Invalid cram_err_addr_reg_num: %u\n", status_check->cram_checks.cram_err_addr_reg_num); + return -EINVAL; + } + + ret = of_property_read_u32_array(dev->of_node, "cram_err_addr_reg", status_check->cram_checks.cram_err_addr_reg, status_check->cram_checks.cram_err_addr_reg_num); + if(ret != 0) { + dev_err(dev, "Failed to get cram_err_addr_reg config, ret: %d\n", ret); + return -ENXIO; + } + + /* get seu reg data mask */ + data_bus_width = data_byte_len; + data_num = of_property_count_elems_of_size(dev->of_node, "cram_err_addr_reg_mask", sizeof(u32)); + if (data_num <= 0) { + /* use def mask CRAM_ALL_BITS_SET */ + set_cram_mask_buf_def(status_check); + } else { + /* must config one mask or everyone mask */ + if (data_num != CRAM_CONFIG_MASK_MIN_COUNT && data_num != status_check->cram_checks.cram_err_addr_reg_num) { + dev_err(dev, "Fail cram_err_addr_reg_mask num: %u\n", data_num); + return -EINVAL; + } + + for (i = 0; i < data_num; i++) { + ret = of_property_read_u32_index(dev->of_node, "cram_err_addr_reg_mask", i, ®_data_buf[i]); + if (ret < 0) { + dev_err(dev, "Fail to get seu_reg_mask value: %d\n", ret); + return -EINVAL; + } + } + + set_cram_mask_buf(data_num, status_check, reg_data_buf); + } + } else { + cram_checks_value_init_def(status_check); + DEBUG_VERBOSE("use def value.\n"); + } + + return 0; +} + +static int of_dev_status_check_one_type_init(struct device *dev, + struct device_status_check *status_check, + uint32_t data_byte_len, + uint32_t check_type) +{ + int ret; + + switch (check_type) { + case STATUS_CHECK_SEU: + ret = of_dev_seu_status_check_config_init(dev, status_check, data_byte_len); + if (ret != 0) { + dev_err(dev, "seu_status_check_config_init fail: %d\n", ret); + return ret; + } + break; + case STATUS_CHECK_SELFTEST: + ret = of_dev_selftest_status_check_config_init(dev, status_check, data_byte_len); + if (ret != 0) { + dev_err(dev, "selftest_status_check_config_init fail: %d\n", ret); + return ret; + } + break; + case STATUS_CHECK_SCRATCH: + ret = of_dev_scratch_status_check_config_init(dev, status_check, data_byte_len); + if (ret != 0) { + dev_err(dev, "scratch_status_check_config_init fail: %d\n", ret); + return ret; + } + break; + case STATUS_CHECK_CRAM: + ret = of_dev_cram_status_check_config_init(dev, status_check, data_byte_len); + if (ret != 0) { + dev_err(dev, "dev_cram_status_check_config_init fail: %d\n", ret); + return ret; + } + break; + default: + dev_err(dev, "not found init func, check type 0x%x\n", check_type); + return -EINVAL; + } + + return 0; +} + + +static int of_dev_status_check_init(struct device *dev, + struct device_status_check *status_check, + uint32_t data_byte_len) +{ + int ret; + int i; + u32 check_type; + + for (i = 0; i < STATUS_CHECK_TYPE_MAX; i++) { + check_type = STATUS_CHECK_BITS(i); + if (status_check->status_check_type_bmp & check_type) { + ret = of_dev_status_check_one_type_init(dev, status_check, data_byte_len, check_type); + if (ret != 0) { + dev_err(dev, "of_dev_status_check_one_type_init fail, check_type 0x%x ret %d\n", check_type, ret); + return ret; + } + } else { + DEBUG_INFO("unsupport type skip init.(0x%x)\n", check_type); + } + } + + return 0; +} + +int of_dev_status_check_config_init(struct device *dev, + struct device_status_check *status_check, + uint32_t data_byte_len, + device_func_write read, + device_func_write write, + const char *dev_name) +{ + int ret; + uint32_t type; + int check_type_number; + + if (dev == NULL) { + PRINT_ERROR("dev_status_check_config_init fail, dev is NULL\n"); + return -EINVAL; + } + + if (status_check == NULL || dev_name == NULL) { + dev_err(dev, "param is NULL.(status_check: %p, dev_name = %p)\n", status_check, dev_name); + return -EINVAL; + } + + if (data_byte_len > MAX_DATA_WIDTH || data_byte_len == 0) { + dev_err(dev, "data_byte_len is error.(data_byte_len: %d)\n", data_byte_len); + return -EINVAL; + } + + snprintf(status_check->dev_name, sizeof(status_check->dev_name),"/dev/%s", dev_name); + + ret = of_property_read_u32(dev->of_node, "status_check_type_bmp", &status_check->status_check_type_bmp); + if (ret == 0) { + type = status_check->status_check_type_bmp; + /* Check dts configuration status_check_type_bmp valid */ + check_type_number = wb_logic_status_type_get_number(type); + if (check_type_number == 0) { + dev_err(dev, "Invalid status_check_type: %u\n", type); + return -EINVAL; + } + + if (read == NULL || write == NULL) { + dev_err(dev, "Invalid read or write func\n"); + return -EINVAL; + } + + status_check->dev_bus_ops.read = read; + status_check->dev_bus_ops.write = write; + wb_logic_check_type_status_and_jiffies_init(status_check); + DEBUG_VERBOSE("status_check_type: %u\n", status_check->status_check_type_bmp); + ret = of_dev_status_check_init(dev, status_check, data_byte_len); + if (ret != 0) { + dev_err(dev, "of_dev_status_check_init fail: %d\n", ret); + return ret; + } + } else { + DEBUG_VERBOSE("not support dev status check sysfs.\n"); + } + + return 0; +} +EXPORT_SYMBOL_GPL(of_dev_status_check_config_init); + +static int platform_dev_seu_status_check_config_init(struct device *dev, + struct device_status_check *status_check, + uint32_t data_byte_len, + struct device_status_check *status_check_data) +{ + int data_bus_width; + int i; + int j; + + status_check->seu_check_num = status_check_data->seu_check_num; + if ((status_check->seu_check_num == 0) || (status_check->seu_check_num > TEST_REG_MAX_NUM)) { + dev_err(dev, "Invalid seu_check_num: %u\n", status_check->seu_check_num); + return -EINVAL; + } + + data_bus_width = data_byte_len; + for (i = 0; i < status_check->seu_check_num; i++) { + status_check->seu_checks[i].reg = status_check_data->seu_checks[i].reg; + for (j = 0; j < data_bus_width; j++) { + status_check->seu_checks[i].value[j] = status_check_data->seu_checks[i].value[j]; + if (status_check_data->seu_checks[i].mask[j] == 0) { + status_check->seu_checks[i].mask[j] = 0xff; + } else { + status_check->seu_checks[i].mask[j] = status_check_data->seu_checks[i].mask[j]; + } + } + } + + return 0; +} + +static int platform_dev_selftest_status_check_config_init(struct device *dev, + struct device_status_check *status_check, + uint32_t data_byte_len, + struct device_status_check *status_check_data) +{ + int data_bus_width; + int i; + int j; + + status_check->selftest_check_num = status_check_data->selftest_check_num; + if ((status_check->selftest_check_num == 0) || (status_check->selftest_check_num > TEST_REG_MAX_NUM)) { + dev_err(dev, "Invalid selftest_check_num: %u\n", status_check->selftest_check_num); + return -EINVAL; + } + + data_bus_width = data_byte_len; + for (i = 0; i < status_check->selftest_check_num; i++) { + status_check->selftest_checks[i].reg = status_check_data->selftest_checks[i].reg; + status_check->selftest_checks[i].check_mode = status_check_data->selftest_checks[i].check_mode; + for (j = 0; j < data_bus_width; j++) { + status_check->selftest_checks[i].write_value[j] = status_check_data->selftest_checks[i].write_value[j]; + } + } + + return 0; +} + +static int platform_dev_scratch_status_check_config_init(struct device *dev, + struct device_status_check *status_check, + uint32_t data_byte_len, + struct device_status_check *status_check_data) +{ + int data_bus_width; + int i; + int j; + + status_check->scratch_num = status_check_data->scratch_num; + if ((status_check->scratch_num == 0) || (status_check->scratch_num > TEST_REG_MAX_NUM)) { + dev_err(dev, "Invalid scratch_num: %u\n", status_check->scratch_num); + return -EINVAL; + } + + data_bus_width = data_byte_len; + for (i = 0; i < status_check->scratch_num; i++) { + status_check->scratch_checks[i].reg = status_check_data->scratch_checks[i].reg; + status_check->scratch_checks[i].check_mode = status_check_data->scratch_checks[i].check_mode; + for (j = 0; j < data_bus_width; j++) { + status_check->scratch_checks[i].value[j] = status_check_data->scratch_checks[i].value[j]; + } + } + + return 0; +} + +static int platform_dev_cram_status_check_config_init(struct device *dev, + struct device_status_check *status_check, + uint32_t data_byte_len, + struct device_status_check *status_check_data) +{ + int i; + + status_check->cram_checks.reg = status_check_data->cram_checks.reg; + status_check->cram_checks.cram_err_addr_reg_num = status_check_data->cram_checks.cram_err_addr_reg_num; + if ((status_check->cram_checks.cram_err_addr_reg_num == 0) || (status_check->cram_checks.cram_err_addr_reg_num > TEST_REG_MAX_NUM)) { + /* use def value */ + cram_checks_value_init_def(status_check); + return 0; + } + + for (i = 0; i < status_check->cram_checks.cram_err_addr_reg_num; i++) { + status_check->cram_checks.cram_err_addr_reg[i] = status_check_data->cram_checks.cram_err_addr_reg[i]; + + if (status_check_data->cram_checks.cram_err_addr_reg_mask[i] == 0) { + status_check->cram_checks.cram_err_addr_reg_mask[i] = CRAM_ALL_BITS_SET; + } else { + status_check->cram_checks.cram_err_addr_reg_mask[i] = status_check_data->cram_checks.cram_err_addr_reg_mask[i]; + } + } + + return 0; +} + +static int platform_dev_status_check_one_type_init(struct device *dev, + struct device_status_check *status_check, + uint32_t data_byte_len, + struct device_status_check *status_check_data, + uint32_t check_type) +{ + int ret; + + switch (check_type) { + case STATUS_CHECK_SEU: + ret = platform_dev_seu_status_check_config_init(dev, status_check, data_byte_len, status_check_data); + if (ret != 0) { + dev_err(dev, "platform seu_status_check_config_init fail: %d\n", ret); + return ret; + } + break; + case STATUS_CHECK_SELFTEST: + ret = platform_dev_selftest_status_check_config_init(dev, status_check, data_byte_len, status_check_data); + if (ret != 0) { + dev_err(dev, "platform selftest_status_check_config_init fail: %d\n", ret); + return ret; + } + break; + case STATUS_CHECK_SCRATCH: + ret = platform_dev_scratch_status_check_config_init(dev, status_check, data_byte_len, status_check_data); + if (ret != 0) { + dev_err(dev, "platform scratch_status_check_config_init fail: %d\n", ret); + return ret; + } + break; + case STATUS_CHECK_CRAM: + ret = platform_dev_cram_status_check_config_init(dev, status_check, data_byte_len, status_check_data); + if (ret != 0) { + dev_err(dev, "platform cram_status_check_config_init fail: %d\n", ret); + return ret; + } + break; + + default: + dev_err(dev, "not found init func, check type 0x%x\n", check_type); + return -EINVAL; + } + + return 0; +} + + +static int platform_dev_status_check_init(struct device *dev, + struct device_status_check *status_check, + uint32_t data_byte_len, + struct device_status_check *status_check_data) +{ + int ret; + int i; + u32 check_type; + + for (i = 0; i < STATUS_CHECK_TYPE_MAX; i++) { + check_type = STATUS_CHECK_BITS(i); + if (status_check->status_check_type_bmp & check_type) { + ret = platform_dev_status_check_one_type_init(dev, status_check, data_byte_len, status_check_data, check_type); + if (ret != 0) { + dev_err(dev, "platform_dev_status_check_one_type_init fail, check_type 0x%x ret %d\n", check_type, ret); + return ret; + } + } else { + DEBUG_INFO("unsupport type skip init.(0x%x)\n", check_type); + } + } + + return 0; +} + + +int platform_dev_status_check_config_init(struct device *dev, + struct device_status_check *status_check, + uint32_t data_byte_len, + struct device_status_check *status_check_data, + device_func_write read, + device_func_write write, + const char *dev_name) +{ + int ret; + int check_type_number; + + if (dev == NULL) { + PRINT_ERROR("dev_status_check_config_init fail, dev is NULL\n"); + return -EINVAL; + } + + if (status_check == NULL || status_check_data == NULL) { + dev_err(dev, "param is NULL.(status_check: %p, status_check_data: %p)\n", status_check, status_check_data); + return -EINVAL; + } + + if (data_byte_len > MAX_DATA_WIDTH || data_byte_len == 0) { + dev_err(dev, "data_byte_len is error.(data_byte_len: %d)\n", data_byte_len); + return -EINVAL; + } + + snprintf(status_check->dev_name, sizeof(status_check->dev_name), "/dev/%s", dev_name); + + status_check->status_check_type_bmp = status_check_data->status_check_type_bmp; + /* Check platform configuration status_check_type_bmp valid */ + check_type_number = wb_logic_status_type_get_number(status_check->status_check_type_bmp); + if (check_type_number == 0) { + DEBUG_INFO("Invalid status_check_type: %u\n", status_check->status_check_type_bmp); + return 0; + } + + if (read == NULL || write == NULL) { + dev_err(dev, "Invalid read or write func\n"); + return -EINVAL; + } + + status_check->dev_bus_ops.read = read; + status_check->dev_bus_ops.write = write; + wb_logic_check_type_status_and_jiffies_init(status_check); + + DEBUG_VERBOSE("status_check_type: %u\n", status_check->status_check_type_bmp); + ret = platform_dev_status_check_init(dev, status_check, data_byte_len, status_check_data); + if (ret != 0) { + dev_err(dev, "platform dev_status_check_init fail: %d\n", ret); + return ret; + } + + return 0; +} +EXPORT_SYMBOL_GPL(platform_dev_status_check_config_init); + +static int wb_logic_scratch_clear_status(struct device_status_check *status_check, + uint32_t data_byte_len) +{ + int ret; + + ret = wb_logic_check_scratch_status_init(status_check, data_byte_len); + if (ret < 0) { + DEBUG_ERROR("scratch status clear fail. ret %d\n", ret); + } + + return ret; +} + +static int wb_logic_clear_status_with_type(struct device_status_check *status_check, + uint32_t data_byte_len, + uint32_t check_type) +{ + int ret; + + ret = 0; + switch (check_type) { + case STATUS_CHECK_SEU: + break; + case STATUS_CHECK_SELFTEST: + break; + case STATUS_CHECK_CRAM: + break; + case STATUS_CHECK_SCRATCH: + ret = wb_logic_scratch_clear_status(status_check, data_byte_len); + if (ret < 0) { + DEBUG_ERROR("wb_logic_scratch_clear_status fail. ret %d\n", ret); + } + break; + default: + DEBUG_ERROR("not found clear func, check type 0x%x\n", check_type); + return -EINVAL; + } + + return ret; +} + +int wb_logic_clear_status(struct device_status_check *status_check, + uint32_t data_byte_len, + uint32_t type_bmp) +{ + int ret; + int check_type; + int i; + int fail_count; + + fail_count = 0; + if (status_check == NULL) { + DEBUG_ERROR("param is NULL\n"); + return -EINVAL; + } + + if (wb_logic_status_type_get_number(type_bmp) == 0) { + DEBUG_ERROR("check_type_number is 0\n"); + return -EINVAL; + } + + if (data_byte_len > MAX_DATA_WIDTH || data_byte_len == 0) { + DEBUG_ERROR("data_byte_len is error.(data_byte_len: %d)\n", data_byte_len); + return -EINVAL; + } + + + ret = 0; + for (i = 0; i < STATUS_CHECK_TYPE_MAX; i++) { + check_type = STATUS_CHECK_BITS(i); + if ((type_bmp & check_type) == 0) { + DEBUG_INFO("do nothing. (type_bmp 0x%x, check_type 0x%x)\n", type_bmp, check_type); + continue; + } + + if (status_check->status_check_type_bmp & check_type) { + ret = wb_logic_clear_status_with_type(status_check, data_byte_len, check_type); + if (ret < 0) { + fail_count++; + DEBUG_ERROR("wb_logic_clear_status_with_type fail, check type 0x%x ret %d\n", check_type, ret); + } + } else { + DEBUG_INFO("unsupport type skip hw init.(0x%x)\n", check_type); + } + } + + if (fail_count != 0) { + return -EINVAL; + } + + return 0; +} +EXPORT_SYMBOL_GPL(wb_logic_clear_status); + +void sleep_by_lock_mode(int sleep_time, uint32_t lock_mode) +{ + if (lock_mode == WB_MUTEX_LOCK_MODE) { + usleep_range(sleep_time, sleep_time + 1); + } else { + udelay(sleep_time); + } +} +EXPORT_SYMBOL_GPL(sleep_by_lock_mode); + +int wb_logic_lock_mode_check(uint32_t lock_mode, uint32_t func_mode) +{ + if(lock_mode == WB_SPIN_LOCK_MODE) { + switch (func_mode){ + case SYMBOL_I2C_DEV_MODE: + case FILE_MODE: + case SYMBOL_SPI_DEV_MODE: + case SYMBOL_INDIRECT_DEV_MODE: + case SYMBOL_PLATFORM_I2C_DEV_MODE: + DEBUG_ERROR("func mode not support spin lock mode.\n"); + return -EINVAL; + default: + break; + } + } + + return 0; +} +EXPORT_SYMBOL_GPL(wb_logic_lock_mode_check); + +static void __exit logic_dev_exit(void) +{ + if (logic_dev_kobj) { + kobject_put(logic_dev_kobj); + } + LOGIC_DEV_INFO("logic_dev_exit success.\n"); +} + +module_init(logic_dev_init); +module_exit(logic_dev_exit); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("support"); +MODULE_DESCRIPTION("sonic logic_dev common methods"); diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_lpc_bmc.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_lpc_bmc.c new file mode 100644 index 00000000000..6cbb60f58d0 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_lpc_bmc.c @@ -0,0 +1,1791 @@ +/* + * wb_lpc_bmc.c + * ko to register bmc misc dev to rd/wr bmc reg + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "wb_lpc_bmc.h" +#include +#include + +#define KERNEL_SPACE (0) +#define USER_SPACE (1) + +static int debug = 0; +module_param(debug, int, S_IRUGO | S_IWUSR); + +int lpc_addr_mode = 0; +module_param(lpc_addr_mode, int, S_IRUGO | S_IWUSR); +MODULE_PARM_DESC(lpc_addr_mode, "addr base of lpc [0: 0x4e, 1: 0x2e]"); + +static uint8_t lpc_addr_port = LPC_ADDR_PORT_4E; +static uint8_t lpc_data_port = LPC_DATA_PORT_4F; + +typedef struct wb_lpc_bmc_s { + struct kobject kobj; + struct attribute_group *sysfs_group; + struct miscdevice bmc_reg_misc; + struct mutex update_lock; + struct miscdevice bmc_master_flash; + struct miscdevice bmc_slave_flash; + int bmc_type; + uint8_t flash_rw_enable; + uint8_t flash_erase_full; + uint32_t bmc_id; + uint32_t flash_size; + uint8_t flash_wr_buf[FLASH_WR_MAX_LEN]; + flash_info_t *master_flash_info; + flash_info_t *slave_flash_info; +} wb_lpc_bmc_t; + +static wb_lpc_bmc_t *g_wb_lpc_bmc; +static bmc_id_list_t g_bmc_id_list[] = { + { + .bmc_ids = {AST2500_A0, AST2510_A0, AST2520_A0, AST2530_A0, AST2500_A1, AST2510_A1, AST2520_A1,\ + AST2530_A1, AST2500_A2, AST2510_A2, AST2520_A2, AST2530_A2}, + .bmc_type = TYPE_AST2500, + .bmc_id_reg = AST25_SILICON_REVISION_ID_REGISTER, + }, + { + .bmc_ids = {AST2600_A0, AST2600_A1, AST2600_A2, AST2600_A3, AST2620_A1, AST2620_A2, AST2620_A3}, + .bmc_type = TYPE_AST2600, + .bmc_id_reg = AST26_SILICON_REVISION_ID_REGISTER, + } +}; + +static void write_addr_port(uint8_t addr_val, uint16_t addr_port) +{ + outb(addr_val, addr_port); + + return; +} + +static void write_data_port(uint8_t val, uint16_t data_port) +{ + outb(val, data_port); + + return; +} + +static uint8_t read_data_port(uint16_t data_port) +{ + return inb(data_port); +} + +static void write_ilpc2ahb_addr(uint32_t addr) +{ + int i; + + for (i = 0; i < 4; i++) { + write_addr_port(SUPERIO_REG0 + i, lpc_addr_port); + write_data_port((addr >> (8 * (3 - i))) & MASK, lpc_data_port); + } + + return; +} + +static void write_ilpc2ahb_data(uint32_t data) +{ + int i; + + for (i = 0; i < 4; i++) { + write_addr_port(SUPERIO_REG4 + i, lpc_addr_port); + write_data_port((data >> (8 * (3 - i))) & MASK, lpc_data_port); + } + + return; +} + +static uint32_t read_ilpc2ahb_data(void) +{ + int i, tmp; + uint32_t res; + + res = 0; + for (i = 0; i < 4; i++) { + write_addr_port(SUPERIO_REG4 + i, lpc_addr_port); + tmp = read_data_port(lpc_data_port); + res |= (tmp << (8 * (3 - i))); + } + + return res; +} + +static void trigger_ilpc2ahb_read(void) +{ + write_addr_port(SUPERIO_FE, lpc_addr_port); + read_data_port(lpc_data_port); + + return; +} + +static void trigger_ilpc2ahb_write(void) +{ + write_addr_port(SUPERIO_FE, lpc_addr_port); + write_data_port(TOGGLE_WRITE, lpc_data_port); + + return; +} + +static void check_data_length(void) +{ + uint8_t tmp; + /* Data length check, 4 bytes */ + write_addr_port(SUPERIO_REG8, lpc_addr_port); + tmp = read_data_port(lpc_data_port); + if (tmp != SUPERIO_A2) { + write_data_port(SUPERIO_A2, lpc_data_port); + } + + return; +} + +static void enable_ilpc2ahb(void) +{ + /* Write 0xAA then write 0xA5 twice to enable super IO*/ + write_addr_port(DISABLE_LPC, lpc_addr_port); + write_addr_port(ENABLE_LPC, lpc_addr_port); + write_addr_port(ENABLE_LPC, lpc_addr_port); + + /* Enable iLPC2AHB */ + write_addr_port(SUPERIO_07, lpc_addr_port); + write_data_port(LPC_TO_AHB, lpc_data_port); + write_addr_port(SUPERIO_30, lpc_addr_port); + write_data_port(ENABLE_LPC_TO_AHB, lpc_data_port); + + /* Data length */ + check_data_length(); + + return; +} + +static void disable_ilpc2ahb(void) +{ + /* disable ilpc2ahb */ + write_addr_port(SUPERIO_30, lpc_addr_port); + write_data_port(DISABLE_LPC_TO_AHB, lpc_data_port); + /* disable super IO */ + write_addr_port(DISABLE_LPC, lpc_addr_port); + + return; +} + +static uint32_t read_bmc_reg(uint32_t addr) +{ + uint32_t res; + + write_ilpc2ahb_addr(addr); + trigger_ilpc2ahb_read(); + res = read_ilpc2ahb_data(); + + return le32_to_cpu(res); +} + +static void write_bmc_reg(uint32_t addr, uint32_t val) +{ + write_ilpc2ahb_addr(addr); + write_ilpc2ahb_data(cpu_to_le32(val)); + trigger_ilpc2ahb_write(); + + return; +} + +static uint32_t read_bmc_flash_data(void) +{ + uint32_t res; + + trigger_ilpc2ahb_read(); + res = read_ilpc2ahb_data(); + + return res; +} + +static void write_bmc_flash_data(uint32_t data) +{ + write_ilpc2ahb_data(data); + trigger_ilpc2ahb_write(); + + return; +} + +static void write_bmc_flash_addr(uint32_t addr) +{ + int i; + + for (i = 0; i < 4; i++) { + write_addr_port(SUPERIO_REG4 + i, lpc_addr_port); + write_data_port((addr >> (8 * i)) & MASK, lpc_data_port); + } + + trigger_ilpc2ahb_write(); + + return; +} + +/* Configure the iLPC2AHB bus in 1,2, and 4-byte mode */ +static void enable_bytes(int byte) +{ + write_addr_port(SUPERIO_REG8, lpc_addr_port); + switch (byte) { + case BYTE1: + write_data_port(SUPERIO_A0 + BYTE1_VAL, lpc_data_port); + break; + case BYTE2: + write_data_port(SUPERIO_A0 + BYTE2_VAL, lpc_data_port); + break; + case BYTE4: + write_data_port(SUPERIO_A0 + BYTE4_VAL, lpc_data_port); + break; + default: + write_data_port(SUPERIO_A0 + BYTE_RESERVED, lpc_data_port); + break; + } + + return; +} + +/* Gated cs */ +static void pull_ce_down(flash_info_t* info) +{ + write_bmc_reg(info->ce_control_reg, USER_MODE_PULL_CE_DOWN); + + return; +} + +/* Release cs */ +static void pull_ce_up(flash_info_t* info) +{ + write_bmc_reg(info->ce_control_reg, USER_MODE_PULL_CE_UP); + + return; +} + +/* Send the flash operation command word */ +static void send_cmd(uint32_t flash_base_addr, int cmd) +{ + write_ilpc2ahb_addr(flash_base_addr); /* Write flash address */ + enable_bytes(1); /* The flash command word is only 1 byte. You need to configure the AHB to be in 1 byte mode */ + write_addr_port(SUPERIO_REG7, lpc_addr_port); + write_data_port(cmd & MASK, lpc_data_port); /* Write the flash command word */ + trigger_ilpc2ahb_write(); + enable_bytes(4); + + return; +} + +/* + * The flash command word is sent in user mode + * @info: flashStructure pointer + * @cmd: flash Command word +*/ +static void send_cmd_to_flash(flash_info_t* info, int cmd) +{ + pull_ce_down(info); + send_cmd(info->flash_base_addr, cmd); + pull_ce_up(info); + + return; +} + +static int get_bmc_type(wb_lpc_bmc_t *wb_lpc_bmc) +{ + int i, j, size_1, size_2; + uint32_t read_val; + + enable_ilpc2ahb(); + + size_1 = sizeof(g_bmc_id_list) / sizeof((g_bmc_id_list)[0]); + for (i = 0; i < size_1 ; i++) { + read_val = read_bmc_reg(g_bmc_id_list[i].bmc_id_reg); + DEBUG_VERBOSE("get_bmc_type: read reg: 0x%x\n", g_bmc_id_list[i].bmc_id_reg); + DEBUG_VERBOSE("get_bmc_type: reg value 0x%x\n", read_val); + size_2 = sizeof(g_bmc_id_list[i].bmc_ids) / sizeof((g_bmc_id_list[i].bmc_ids)[0]); + for (j = 0; j < size_2; j++) { + if ((read_val != 0) && (read_val == g_bmc_id_list[i].bmc_ids[j])) { + wb_lpc_bmc->bmc_type = g_bmc_id_list[i].bmc_type; + wb_lpc_bmc->bmc_id = read_val; + DEBUG_VERBOSE("get_bmc_type: success, bmc_type = %d\n", wb_lpc_bmc->bmc_type); + disable_ilpc2ahb(); + return 0; + } + } + } + + disable_ilpc2ahb(); + return -ENXIO; +} + +/* Enable CPU */ +static void enable_cpu(void) +{ + if (g_wb_lpc_bmc->bmc_type == TYPE_AST2600) { + /* unlock SCU register */ + write_bmc_reg(AST26_PROTECTION_KEY_REGISTER_1, UNLOCK_SCU_KEY); + write_bmc_reg(AST26_PROTECTION_KEY_REGISTER_2, UNLOCK_SCU_KEY); + /* enable ARM */ + write_bmc_reg(AST26_HARDWARE_STRAP_REGISTER_CLEAR, 0x1); + /* lock SCU register */ + write_bmc_reg(AST26_PROTECTION_KEY_REGISTER_1, LOCK_SCU_KEY); + write_bmc_reg(AST26_PROTECTION_KEY_REGISTER_2, LOCK_SCU_KEY); + } else { + /* unlock SCU register */ + write_bmc_reg(SCU_ADDR, UNLOCK_SCU_KEY); + /* enable ARM */ + write_bmc_reg(AST25_REBOOT_CPU_REGISTER, SET_BMC_CPU_BOOT); + /* lock SCU register */ + write_bmc_reg(SCU_ADDR, LOCK_SCU_KEY); + } + return; +} + +/* diasble CPU */ +static void disable_cpu(void) +{ + uint32_t scu_hw_strap_val; + + if (g_wb_lpc_bmc->bmc_type == TYPE_AST2600) { + /* unlock SCU register */ + write_bmc_reg(AST26_PROTECTION_KEY_REGISTER_1, UNLOCK_SCU_KEY); + write_bmc_reg(AST26_PROTECTION_KEY_REGISTER_2, UNLOCK_SCU_KEY); + /* disable ARM */ + scu_hw_strap_val = read_bmc_reg(AST26_HARDWARE_STRAP_REGISTER); + write_bmc_reg(AST26_HARDWARE_STRAP_REGISTER, scu_hw_strap_val |0x01); + /* lock SCU register */ + write_bmc_reg(AST26_PROTECTION_KEY_REGISTER_1, LOCK_SCU_KEY); + write_bmc_reg(AST26_PROTECTION_KEY_REGISTER_2, LOCK_SCU_KEY); + } else { + /* unlock SCU register */ + write_bmc_reg(SCU_ADDR, UNLOCK_SCU_KEY); + /* disable ARM */ + scu_hw_strap_val = read_bmc_reg(AST25_HARDWARE_STRAP_REGISTER); + write_bmc_reg(AST25_HARDWARE_STRAP_REGISTER, scu_hw_strap_val |0x01); + /* lock SCU register */ + write_bmc_reg(SCU_ADDR, LOCK_SCU_KEY); + } + return; +} + +/* Enable the BMC upgrade path */ +static void enable_upgrade(void) +{ + /* Open iLPC to AHB bridge */ + enable_ilpc2ahb(); + /* diasble CPU */ + disable_cpu(); + /* init CE control register */ + write_bmc_reg(CE0_CONTROL_REGISTER, 0); + write_bmc_reg(CE1_CONTROL_REGISTER, 0); + /* disable WDT2 */ + if (g_wb_lpc_bmc->bmc_type == TYPE_AST2600) { + write_bmc_reg(FMC_WDT2_CONTROL_STATUS_REGISTER, AST26_FMC_WATCHDOG_DISABLE); + write_bmc_reg(AST26_WATCHDOG2_CONTROL, DISABLE_AST26_WATCHDOG); + } else { + write_bmc_reg(WATCHDOG2_CONTROL, DISABLE_WATCHDOG); + } + + return; +} + +/* disable bmc upgrade */ +static void disable_upgrade(void) +{ + enable_cpu(); + if (g_wb_lpc_bmc->bmc_type == TYPE_AST2600) { + DEBUG_VERBOSE( "DEBUG 0x%x\n", read_bmc_reg(AST26_HARDWARE_STRAP_REGISTER)); + } else { + DEBUG_VERBOSE( "DEBUG 0x%x\n", read_bmc_reg(AST25_HARDWARE_STRAP_REGISTER)); + } + disable_ilpc2ahb(); + + return; +} + +/* According to the bit1 of the WDT2 status register, 0: the main BMC starts, 1: the BMC starts */ +static int get_current_bmc(void) +{ + if (g_wb_lpc_bmc->bmc_type == TYPE_AST2600) { + return (read_bmc_reg(FMC_WDT2_CONTROL_STATUS_REGISTER) & 0x010) >> 4; + } else { + return (read_bmc_reg(WATCHDOG2_TSR) & 0x02) >> 1; + } +} + +#if 0 +/* Enable WatchDog to reset 2600 BMC*/ +static void enable_ast26_watchdog(int cs) { + + if (cs == get_current_bmc()) { + /* reset to current chip by wdt2*/ + write_bmc_reg(AST26_WATCHDOG2_CLEAR_STATUS, CLEAR_WATCHDOG_STATUS); + write_bmc_reg(AST26_WATCHDOG2_RESET_FUN_MASK_2, AST26_WATCHDOG_GATEMASK_2); + write_bmc_reg(AST26_WATCHDOG2_RELOAD_VALUE, WATCHDOG_NEW_COUNT); + write_bmc_reg(AST26_WATCHDOG2_COUNTER_RST, WATCHDOG_RELOAD_COUNTER); + write_bmc_reg(AST26_WATCHDOG2_CONTROL, AST26_ENABLE_WATCH_CMD); + } else { + /* reset to another chip by fmt_wdt*/ + write_bmc_reg(FMC_WDT2_TIMER_RELOAD_VALUE_REGISTER, AST26_FMC_WATCHDOG_NEW_COUNT); + write_bmc_reg(FMC_WDT2_CONTROL_STATUS_REGISTER, AST26_ENABLE_FMC_WATCH_CMD); + } + + return; +} + +#endif + +/* Enable WatchDog to reset 2600 BMC*/ +/* 2600 BMC WDT2 full chip reset is invalid , so use this funtion to reset bmc by fmc_wdt */ +static void enable_ast26_watchdog(int cs) { + DEBUG_VERBOSE( "enable_ast26_watchdog cs: %d\n", cs); + write_bmc_reg(FMC_WDT2_TIMER_RELOAD_VALUE_REGISTER, AST26_FMC_WATCHDOG_NEW_COUNT); + write_bmc_reg(FMC_WDT2_CONTROL_STATUS_REGISTER, AST26_ENABLE_FMC_WATCH_CMD); + return; +} + +/* Enable WatchDog to reset 2500 BMC*/ +static void enable_ast25_watchdog(int cs) +{ + uint32_t enable_watch_cmd; + + enable_watch_cmd = (cs == CE0) ? ENABLE_WATCHDOG : ENABLE_WATCHDOG | BOOT_DEFAULT_MASK; + write_bmc_reg(WATCHDOG2_CLEAR_STATUS, CLEAR_WATCHDOG_STATUS); + write_bmc_reg(WATCHDOG2_RESET_FUN_MASK, WATCHDOG_GATEMASK); + write_bmc_reg(WATCHDOG2_RELOAD_VALUE, WATCHDOG_NEW_COUNT); + write_bmc_reg(WATCHDOG2_COUNTER_RST, WATCHDOG_RELOAD_COUNTER); + write_bmc_reg(WATCHDOG2_CONTROL, enable_watch_cmd); + + return; +} + +static void bmc_reboot(int cs) +{ + if (g_wb_lpc_bmc->bmc_type == TYPE_AST2600) { + enable_ast26_watchdog(cs); + } else { + enable_ast25_watchdog(cs); + } + DEBUG_VERBOSE("Upgrade-Complete, BMC rebooting...\n"); + + return; +} + +static void get_flash_base_and_ce_ctrl(int current_bmc, int cs, uint32_t *flash_base_addr, uint32_t *ce_ctrl_addr) +{ + uint32_t ce0_addr_range_reg_val, ce0_decode_addr; + uint32_t ce1_addr_range_reg_val, ce1_decode_addr; + + /* Address Decoding Range Register get flash base addr */ + ce0_addr_range_reg_val = read_bmc_reg(CE0_ADDRESS_RANGE_REGISTER); + ce1_addr_range_reg_val = read_bmc_reg(CE1_ADDRESS_RANGE_REGISTER); + if (g_wb_lpc_bmc->bmc_type == TYPE_AST2600) { + ce0_decode_addr = AST26_SEGMENT_ADDR_START(ce0_addr_range_reg_val); + ce1_decode_addr = AST26_SEGMENT_ADDR_START(ce1_addr_range_reg_val); + } else { + ce0_decode_addr = AST25_SEGMENT_ADDR_START(ce0_addr_range_reg_val); + ce1_decode_addr = AST25_SEGMENT_ADDR_START(ce1_addr_range_reg_val); + } + DEBUG_VERBOSE("CE0 addr decode range reg value:0x%08x, decode addr:0x%08x.\n", + ce0_addr_range_reg_val, ce0_decode_addr); + DEBUG_VERBOSE("CE1 addr decode range reg value:0x%08x, decode addr:0x%08x.\n", + ce1_addr_range_reg_val, ce1_decode_addr); + + /* The current BMC uses CE0, and the other BMC uses CE1 */ + if (((current_bmc == CURRENT_MASTER) && (cs ==CE0)) || ((current_bmc == CURRENT_SLAVE) && (cs ==CE1))) { + *ce_ctrl_addr = CE0_CONTROL_REGISTER; + *flash_base_addr = ce0_decode_addr; + } else { + *ce_ctrl_addr = CE1_CONTROL_REGISTER; + *flash_base_addr = ce1_decode_addr; + } + + return; +} + +static void init_fmc_register(void) { + write_bmc_reg(WRITE_ADDR_FILTER_REGISTER, WRITE_ADDR_FILTER_ENABLE); + write_bmc_reg(FMC_BASE_ADDR, BASE_SET); + write_bmc_reg(WRITE_ADDR_FILTER_REGISTER, WRITE_ADDR_FILTER_DISABLE); + write_bmc_reg(CE_CONTROL_REGISTER, CE_CONTROL_SET); +} + +static void enable_flash_write_before_id(unsigned int ce_base, unsigned int addr) +{ + write_bmc_reg(COMMAND_CONTROL_REGISTER, DISABLE_ADDR_DATA_LINE); + write_bmc_reg(ce_base, WRITE_ENABLE); + write_bmc_reg(addr, DECODE_DATA); + write_bmc_reg(COMMAND_CONTROL_REGISTER, ENABLE_ADDR_DATA_LINE); +} + +/* read flash ID */ +static int get_flash_id(uint32_t flash_base_addr, uint32_t ce_ctrl_addr) +{ + uint32_t origin_flash_id, flash_id; + + enable_flash_write_before_id(ce_ctrl_addr, flash_base_addr); + usleep_range(FLASH_WEL_SLEEP_TIME, FLASH_WEL_SLEEP_TIME+1); /* wait previous command finished, just incase */ + init_fmc_register(); + write_bmc_reg(ce_ctrl_addr, USER_MODE_PULL_CE_DOWN); + send_cmd(flash_base_addr, READID); + origin_flash_id = read_bmc_flash_data(); + write_bmc_reg(ce_ctrl_addr, USER_MODE_PULL_CE_UP); + flash_id = origin_flash_id & 0xFFFFFF; + DEBUG_VERBOSE("origin flash id:0x%x, flash id:0x%x\n", origin_flash_id, flash_id); + + return flash_id; +} + +/* Get flash status */ +static uint8_t get_flash_status(flash_info_t* info) +{ + uint8_t flash_status; + + pull_ce_down(info); + /* Send the read status command word */ + send_cmd(info->flash_base_addr, READ_FLASH_STATUS); + /* Read status */ + flash_status = read_bmc_flash_data() & MASK; + pull_ce_up(info); + + DEBUG_VERBOSE("get_flash_status:0x%x\n", flash_status); + return flash_status; +} + +/* Send the read flash status command to check whether the write function is enabled */ +static int check_flash_write_enable(flash_info_t* info) +{ + uint8_t flash_status; + int i, count; + + count = FLASH_WEL_TIMEOUT / FLASH_WEL_SLEEP_TIME; + for (i = 0; i <= count; i++) { + flash_status = get_flash_status(info); + if ((flash_status & FLASH_WRITE_ENABLE_MASK) != FLASH_WRITE_ENABLE_MASK) { + usleep_range(FLASH_WEL_SLEEP_TIME, FLASH_WEL_SLEEP_TIME+1); + } else { + DEBUG_VERBOSE("Check flash WEL success, RDSR:0x%x\n", flash_status); + return 0; + } + } + DEBUG_ERROR("Check flash WEL timeout, RDSR:0x%x\n", flash_status); + return -ETIME; +} + +/* Send the read flash status command to check whether the erase/write operation is complete */ +static int check_flash_write_process(flash_info_t* info, int timeout, int sleep_time) +{ + int i, count; + uint8_t flash_status; + + count = timeout / sleep_time; + for (i = 0; i <= count; i++) { + flash_status = get_flash_status(info); + if ((flash_status & FLASH_WIP_MASK) != 0) { + usleep_range(sleep_time, sleep_time+1); + } else { + DEBUG_VERBOSE("Check flash WIP success, RDSR:0x%x\n", flash_status); + return 0; + } + } + DEBUG_ERROR("Check flash WIP timeout, RDSR:0x%x.\n", flash_status); + return -ETIME; +} + +/* The command for enabling flash write was sent */ +static int flash_write_enable(flash_info_t* info) +{ + int ret; + + send_cmd_to_flash(info, WRITE_ENABLE_FLASH); + ret = check_flash_write_enable(info); + if (ret < 0) { + return ret; + } + return 0; +} + +/* The block erase command is sent */ +static void send_block_erase_cmd(flash_info_t* info, uint32_t block_addr) +{ + pull_ce_down(info); + send_cmd(info->flash_base_addr, info->erase_block_command); + write_bmc_flash_addr(block_addr); /* Erase Block addr */ + pull_ce_up(info); + + return; +} + +/* Write the bmc flash on page */ +static int write_bmc_flash_page(flash_info_t* info, uint32_t page_addr, uint8_t *p, int len) +{ + int pos; + + if (len % 4) { + DEBUG_ERROR("Page size %d invalid.\n", len); + return -EINVAL; + } + /* Send the Page program command */ + pos = 0; + pull_ce_down(info); + send_cmd(info->flash_base_addr, info->page_program); + write_bmc_flash_addr(page_addr); /* page address */ + while (len) { + write_bmc_flash_data((*(uint32_t *)(p + pos))); /* Write 4 bytes at a time */ + pos += 4; + len -= 4; + } + pull_ce_up(info); + + return 0; +} + +static int erase_chip_block(flash_info_t* info, uint32_t offset, uint32_t count) +{ + uint32_t start_addr, end_addr; + int ret; + + DEBUG_VERBOSE("Block erasing...\n"); + start_addr = info->flash_base_addr + offset; + end_addr = start_addr + count; + while (1) { + /* Enable write */ + ret = flash_write_enable(info); + if(ret < 0) { + DEBUG_ERROR("Block erase, enable flash write error, block addr:0x%x\n", start_addr); + return ret; + } + + /* The block erase command is sent */ + send_block_erase_cmd(info, start_addr); + /* Erase Block(64KB) MAX time 650ms*/ + ret = check_flash_write_process(info, BLOCK_ERASE_TIMEOUT, BLOCK_ERASE_SLEEP_TIME); + if (ret < 0) { + DEBUG_ERROR("Block erase, check write status error, block addr:0x%x\n", start_addr); + return ret; + } + DEBUG_VERBOSE("\r0x%x", start_addr); + start_addr += info->block_size; + if (start_addr >= end_addr) { + DEBUG_VERBOSE("\r\nErase Finish\n"); + DEBUG_VERBOSE("=========================================\n"); + break; + } + } + return 0; +} + +/* Send the whole chip erase command */ +static void send_chip_erase_cmd(flash_info_t* info) +{ + send_cmd_to_flash(info, CHIP_ERASE_FLASH); + + return; +} + +static int erase_chip_full(flash_info_t* info) +{ + int ret; + + if (info->full_erase == 0) { + DEBUG_ERROR("Flash not support full erase function.\n"); + return -EOPNOTSUPP; + } + + ret = flash_write_enable(info); + if(ret < 0) { + DEBUG_ERROR("Chip erase, enable flash write error.\n"); + return ret; + } + + /* Send the Chip Erase command */ + DEBUG_VERBOSE("Full chip erasing, please wait...\n"); + send_chip_erase_cmd(info); + ret = check_flash_write_process(info, CHIP_ERASE_TIMEOUT, CHIP_ERASE_SLEEP_TIME); + if (ret < 0) { + DEBUG_VERBOSE("Chip erase timeout.\n"); + return ret; + } + DEBUG_VERBOSE("Erase Finish\n"); + return 0; +} +static int program_chip(uint32_t count, uint8_t *p, flash_info_t* info, uint32_t offset) +{ + + uint32_t start_addr, end_addr; + int ret, page_size; + + start_addr = info->flash_base_addr + offset; + page_size = info->page_size; + end_addr = start_addr + count; + + DEBUG_VERBOSE("Programming...\n"); + + while (1) { + /* Write enable */ + ret = flash_write_enable(info); + if(ret < 0) { + DEBUG_ERROR("Page program, enable flash write error, page addr:0x%x\n", start_addr); + return ret; + } + + ret = write_bmc_flash_page(info, start_addr, p, page_size); + if (ret < 0) { + DEBUG_ERROR("Page program, write bmc flash page error, page addr:0x%x\n", start_addr); + return ret; + } + /* page program MAX time 1.5ms */ + ret = check_flash_write_process(info, PAGE_PROGRAM_TIMEOUT, PAGE_PROGRAM_SLEEP_TIME); + if (ret < 0) { + DEBUG_ERROR("Page program, check write status error, page addr:0x%x\n", start_addr); + return ret; + } + start_addr += page_size; + p += page_size; + if ((start_addr % 0x10000) == 0) { + DEBUG_VERBOSE("\r0x%x", start_addr); + } + + if (start_addr >= end_addr) { + DEBUG_VERBOSE("\nProgram Finish\n"); + DEBUG_VERBOSE("=========================================\n"); + break; + } + } /* End of while (1) */ + return 0; +} + +static int check_chip(uint32_t count, uint8_t *p, flash_info_t* info, uint32_t offset) +{ + + uint32_t start_addr, rd_val, end_addr; + int pos; + + start_addr = info->flash_base_addr + offset; + end_addr = start_addr + count; + pos = 0; + + /* Checking */ + DEBUG_VERBOSE("Checking...\n"); + + /* Send the READ flash command */ + pull_ce_down(info); + send_cmd(info->flash_base_addr, COMMON_FLASH_READ); /* flash read command */ + write_bmc_flash_addr(start_addr); /* Start IP address of the flash read */ + while (1) { + if (start_addr >= end_addr) { + break; + } + rd_val = read_bmc_flash_data(); + if (rd_val != (*(uint32_t *)(p + pos))) { + DEBUG_ERROR("Check Error at 0x%08x\n", start_addr); + DEBUG_ERROR("READ:0x%08x VALUE:0x%08x\n", rd_val, (*(uint32_t *)(p + pos))); + pull_ce_up(info); + return -ENODATA; + } + if ((start_addr % 0x10000) == 0) { + DEBUG_VERBOSE("\r0x%x ", start_addr); + } + start_addr += 4; + pos += 4; + } + pull_ce_up(info); + DEBUG_VERBOSE("\r\nFlash Checked\n"); + DEBUG_VERBOSE("=========================================\n"); + + return 0; +} + +flash_info_t* get_flash_info(int current_bmc, int cs) +{ + int i, size; + uint32_t flash_base_addr, ce_ctrl_addr, flash_id; + + get_flash_base_and_ce_ctrl(current_bmc, cs, &flash_base_addr, &ce_ctrl_addr); + + size = (sizeof(flash_info) / sizeof((flash_info)[0])); + + flash_id = get_flash_id(flash_base_addr, ce_ctrl_addr); + for (i = 0; i < size; i++) { + if (flash_info[i].flash_id == flash_id) { + flash_info[i].flash_base_addr = flash_base_addr; + flash_info[i].ce_control_reg = ce_ctrl_addr; + flash_info[i].cs = cs; + return &flash_info[i]; + } + } + DEBUG_VERBOSE("Cannot get flash info, cs:%d, flash base addr:0x%x, ce control addr:0x%x, flash_id:0x%x.\n", + cs, flash_base_addr, ce_ctrl_addr, flash_id); + return NULL; +} + +static void init_flash(flash_info_t* info) +{ + send_cmd_to_flash(info, RSTEN); + send_cmd_to_flash(info, RST); + send_cmd_to_flash(info, EXIT_OTP); + send_cmd_to_flash(info, ENABLE_BYTE4); + + return; +} + +static int read_single_bmc_flash(flash_info_t* info, uint32_t start_addr, int read_size, uint32_t *buf) +{ + uint32_t flash_start_addr, flash_end_addr; + int ret; + + flash_start_addr = info->flash_base_addr + start_addr; + flash_end_addr = flash_start_addr + read_size; + ret = 0; + + DEBUG_VERBOSE("* CE%d FLASH TYPE: SPI FLASH\n", info->cs); + DEBUG_VERBOSE("* FLASH NAME: %s\n", info->flash_name); + DEBUG_VERBOSE("* Read flash addr:0x%x, size:0x%x\n", flash_start_addr, read_size); + DEBUG_VERBOSE("=========================================\n"); + DEBUG_VERBOSE("Reading...\n"); + + /* The flash read command was sent */ + pull_ce_down(info); + send_cmd(info->flash_base_addr, COMMON_FLASH_READ); /* flash read command */ + write_bmc_flash_addr(flash_start_addr); + while (1) { + if (flash_start_addr >= flash_end_addr) { + break; + } + *buf = read_bmc_flash_data(); + buf++; + + flash_start_addr += 4; + } + DEBUG_VERBOSE("\r\nRead Finish\n"); + DEBUG_VERBOSE("=========================================\n"); + pull_ce_up(info); + return ret; +} + +static ssize_t bmc_dev_read(struct file *file, char __user *buf, size_t count, loff_t *offset, int flag) +{ + int i; + uint32_t *read_val; + u8 buf_tmp[DEV_RDWR_MAX_LEN]; + + if (count == 0) { + DEBUG_ERROR("Invalid params, read count is 0.\n"); + return -EINVAL; + } + + if (count > DEV_RDWR_MAX_LEN) { + DEBUG_VERBOSE("read count %ld exceed max %d.\n", count, DEV_RDWR_MAX_LEN); + count = sizeof(buf_tmp); + } + + if (((*offset % DEV_WIDTH) != 0) || ((count % DEV_WIDTH) != 0)) { + DEBUG_ERROR("Params invalid, start_addr:0x%llx, read_size:%ld\n", *offset, count); + DEBUG_ERROR("Please input address/length times of 4\n"); + return -EINVAL; + } + + if (count > DEV_REG_MAX_LEN - *offset) { + DEBUG_VERBOSE("read count out of range. input len:%lu, read len:0x%llx.\n", + count, DEV_REG_MAX_LEN - *offset); + count = DEV_REG_MAX_LEN - *offset; + } + + mem_clear(buf_tmp, sizeof(buf_tmp)); + + mutex_lock(&g_wb_lpc_bmc->update_lock); + enable_ilpc2ahb(); + + read_val = (uint32_t *)buf_tmp; + for (i = 0; i < count; i += DEV_WIDTH) { + *read_val = read_bmc_reg(*offset + i); + DEBUG_VERBOSE("bmc reg read, offset: 0x%llx, value: 0x%08x\n", *offset, *read_val); + read_val++; + } + + disable_ilpc2ahb(); + mutex_unlock(&g_wb_lpc_bmc->update_lock); + + /* check flag is user spase or kernel spase */ + if (flag == USER_SPACE) { + DEBUG_VERBOSE("user space read, buf: %p, offset: 0x%llx, read count %ld.\n", + buf, *offset, count); + if (copy_to_user(buf, buf_tmp, count)) { + DEBUG_ERROR("copy_to_user failed.\n"); + return -EFAULT; + } + } else { + DEBUG_VERBOSE("kernel space read, buf: %p, offset: 0x%llx, read count %ld.\n", + buf, *offset, count); + memcpy(buf, buf_tmp, count); + } + *offset += count; + + return count; +} + +static ssize_t bmc_dev_read_user(struct file *file, char __user *buf, size_t count, loff_t *offset) +{ + int ret; + + DEBUG_VERBOSE("bmc_dev_read_user, file: %p, count: %zu, offset: %lld\n", + file, count, *offset); + ret = bmc_dev_read(file, buf, count, offset, USER_SPACE); + return ret; +} + +static ssize_t bmc_dev_read_iter(struct kiocb *iocb, struct iov_iter *to) +{ + int ret; + + DEBUG_VERBOSE("bmc_dev_read_iter, file: %p, count: %ld, offset: %lld\n", + iocb->ki_filp, to->count, iocb->ki_pos); + ret = bmc_dev_read(iocb->ki_filp, to->kvec->iov_base, to->count, &iocb->ki_pos, KERNEL_SPACE); + return ret; +} + +static ssize_t read_bmc_flash(struct file *file, char __user *buf, size_t count, loff_t *offset, int cs, int flag) +{ + int ret, current_bmc; + u8 buf_tmp[DEV_RDWR_MAX_LEN]; + flash_info_t* info; + + if (g_wb_lpc_bmc->flash_rw_enable <= 0) { + DEBUG_ERROR("flash rw not enable , can not read flash.\n"); + return -EPERM; + } + + if (count == 0) { + DEBUG_ERROR("Invalid params, read count is 0.\n"); + return -EINVAL; + } + + if (count > sizeof(buf_tmp)) { + DEBUG_VERBOSE("read count %ld exceed max %d.\n", count, DEV_RDWR_MAX_LEN); + count = sizeof(buf_tmp); + } + + if (((*offset % DEV_WIDTH) != 0) || ((count % DEV_WIDTH) != 0)) { + DEBUG_ERROR("Params invalid, start_addr:0x%llx, read_size:%ld\n", *offset, count); + DEBUG_ERROR("Please input address/length times of 4\n"); + return -EINVAL; + } + + mutex_lock(&g_wb_lpc_bmc->update_lock); + + current_bmc = get_current_bmc(); + DEBUG_VERBOSE("* Current Bmc : %d\n", current_bmc); + + info = get_flash_info(current_bmc, cs); + if(info == NULL) { + DEBUG_ERROR("get flash info fail.\n"); + ret = -ENODEV; + goto err; + } + + if (count > info->flash_size - *offset) { + DEBUG_VERBOSE("read count out of range. input len:%lu, read len:0x%llx.\n", + count, info->flash_size - *offset); + count = info->flash_size - *offset; + } + + init_flash(info); + + mem_clear(buf_tmp, sizeof(buf_tmp)); + ret = read_single_bmc_flash(info, *offset, count, (uint32_t *)buf_tmp); + if (ret < 0) { + DEBUG_VERBOSE("Read %s bmc flash failed.\n", cs == 0 ? "master" : "slave"); + goto err; + } + + mutex_unlock(&g_wb_lpc_bmc->update_lock); + + /* check flag is user spase or kernel spase */ + if (flag == USER_SPACE) { + DEBUG_VERBOSE("user space read, buf: %p, offset: 0x%llx, read count %ld.\n", + buf, *offset, count); + if (copy_to_user(buf, buf_tmp, count)) { + DEBUG_ERROR("copy_to_user failed.\n"); + return -EFAULT; + } + } else { + DEBUG_VERBOSE("kernel space read, buf: %p, offset: 0x%llx, read count %ld.\n", + buf, *offset, count); + memcpy(buf, buf_tmp, count); + } + + *offset += count; + return count; +err: + mutex_unlock(&g_wb_lpc_bmc->update_lock); + return ret; +} + +static ssize_t bmc_master_flash_read_user(struct file *file, char __user *buf, size_t count, loff_t *offset) +{ + int ret; + + DEBUG_VERBOSE("bmc_master_flash_read_user, file: %p, count: %zu, offset: %lld\n", + file, count, *offset); + ret = read_bmc_flash(file, buf, count, offset, CURRENT_MASTER, USER_SPACE); + return ret; +} + +static ssize_t bmc_master_flash_read_iter(struct kiocb *iocb, struct iov_iter *to) +{ + int ret; + + DEBUG_VERBOSE("bmc_master_flash_read_iter, file: %p, count: %ld, offset: %lld\n", + iocb->ki_filp, to->count, iocb->ki_pos); + ret = read_bmc_flash(iocb->ki_filp, to->kvec->iov_base, to->count, &iocb->ki_pos, CURRENT_MASTER, KERNEL_SPACE); + return ret; +} + +static ssize_t bmc_slave_flash_read_user(struct file *file, char __user *buf, size_t count, loff_t *offset) +{ + int ret; + + DEBUG_VERBOSE("bmc_slave_flash_read_user, file: %p, count: %zu, offset: %lld\n", + file, count, *offset); + ret = read_bmc_flash(file, buf, count, offset, CURRENT_SLAVE, USER_SPACE); + return ret; +} + +static ssize_t bmc_slave_flash_read_iter(struct kiocb *iocb, struct iov_iter *to) +{ + int ret; + + DEBUG_VERBOSE("bmc_slave_flash_read_iter, file: %p, count: %ld, offset: %lld\n", + iocb->ki_filp, to->count, iocb->ki_pos); + ret = read_bmc_flash(iocb->ki_filp, to->kvec->iov_base, to->count, &iocb->ki_pos, CURRENT_SLAVE, KERNEL_SPACE); + return ret; +} + +static ssize_t bmc_dev_write(struct file *file, const char __user *buf, size_t count, loff_t *offset, int flag) +{ + int i; + u8 buf_tmp[DEV_RDWR_MAX_LEN]; + uint32_t *write_val; + + if (count == 0) { + DEBUG_ERROR("Invalid params, write count is 0.\n"); + return -EINVAL; + } + + if (count > DEV_RDWR_MAX_LEN) { + DEBUG_VERBOSE("write count %lu exceed max %ld.\n", count, sizeof(buf_tmp)); + count = sizeof(buf_tmp); + } + + if (((*offset % DEV_WIDTH) != 0)) { + DEBUG_ERROR("Params invalid, write addr:0x%llx, write_size:%ld\n", *offset, count); + DEBUG_ERROR("Please input address times of 4\n"); + return -EINVAL; + } + + if (count > DEV_REG_MAX_LEN - *offset) { + DEBUG_VERBOSE("write count out of range. input len:%lu, write len:0x%llx.\n", + count, DEV_REG_MAX_LEN - *offset); + count = DEV_REG_MAX_LEN - *offset; + } + + mem_clear(buf_tmp, sizeof(buf_tmp)); + /* check flag is user spase or kernel spase */ + if (flag == USER_SPACE) { + DEBUG_VERBOSE("user space write, buf: %p, offset: 0x%llx, write count %ld.\n", + buf, *offset, count); + if (copy_from_user(buf_tmp, buf, count)) { + DEBUG_ERROR("copy_from_user failed.\n"); + return -EFAULT; + } + } else { + DEBUG_VERBOSE("kernel space write, buf: %p, offset: 0x%llx, write count %ld.\n", + buf, *offset, count); + memcpy(buf_tmp, buf, count); + } + + mutex_lock(&g_wb_lpc_bmc->update_lock); + enable_ilpc2ahb(); + write_val = (uint32_t *)buf_tmp; + for (i = 0; i < count; i += DEV_WIDTH) { + write_bmc_reg(*offset + i, *write_val); + write_val++; + } + + disable_ilpc2ahb(); + mutex_unlock(&g_wb_lpc_bmc->update_lock); + + *offset += count; + return count; +} + +static ssize_t bmc_dev_write_user(struct file *file, const char __user *buf, size_t count, loff_t *offset) +{ + int ret; + + DEBUG_VERBOSE("bmc_dev_write_user, file: %p, count: %zu, offset: %lld\n", + file, count, *offset); + ret = bmc_dev_write(file, buf, count, offset, USER_SPACE); + return ret; +} + +static ssize_t bmc_dev_write_iter(struct kiocb *iocb, struct iov_iter *from) +{ + int ret = 0; + + DEBUG_VERBOSE("bmc_dev_write_iter, file: %p, count: %ld, offset: %lld\n", + iocb->ki_filp, from->count, iocb->ki_pos); + ret = bmc_dev_write(iocb->ki_filp, from->kvec->iov_base, from->count, &iocb->ki_pos, KERNEL_SPACE); + return ret; +} + +static ssize_t write_bmc_flash(struct file *file, char __user *buf, size_t count, loff_t *offset, int cs, int flag) +{ + int ret, current_bmc; + flash_info_t* info; + size_t bytes_remaining = count; + size_t chunk_size; + size_t buf_offset = 0; + + if (g_wb_lpc_bmc->flash_rw_enable <= 0) { + DEBUG_ERROR("flash rw not enable , can not write flash.\n"); + return -EPERM; + } + + if (offset == NULL || *offset < 0) { + DEBUG_ERROR("offset invalid, write failed.\n"); + return -EINVAL; + } + + if (count == 0) { + DEBUG_ERROR("Invalid params, write count is 0.\n"); + return -EINVAL; + } + + mutex_lock(&g_wb_lpc_bmc->update_lock); + + current_bmc = get_current_bmc(); + DEBUG_VERBOSE("* Current Bmc : %d\n", current_bmc); + + info = get_flash_info(current_bmc, cs); + if(info == NULL) { + DEBUG_ERROR("get flash info fail.\n"); + ret = -ENODEV; + goto err; + } + + if (*offset >= info->flash_size) { + DEBUG_VERBOSE("write offset 0x%llx exceed max %d.\n", *offset, info->flash_size); + ret = -EINVAL; + goto err; + } + + if (*offset % info->block_size) { + DEBUG_ERROR("offset: 0x%llx not times of block_size: 0x%x.\n", *offset, info->block_size); + ret = -EINVAL; + goto err; + } + + if (info->page_size > FLASH_WR_MAX_LEN) { + DEBUG_ERROR("flash page_size: 0x%x exceed max support write len: 0x%x.\n", info->page_size, FLASH_WR_MAX_LEN); + ret = -EINVAL; + goto err; + } + + init_flash(info); + + /* if flash_erase_full set and offset is 0, full erase flash */ + if ((g_wb_lpc_bmc->flash_erase_full == 1) && (*offset == 0)) { + ret = erase_chip_full(info); + } else { + ret = erase_chip_block(info, *offset, count); + } + if (ret < 0) { + DEBUG_ERROR("Erase flash Error\n"); + goto err; + } + + while (bytes_remaining > 0) { + chunk_size = (bytes_remaining > info->page_size) ? info->page_size : bytes_remaining; + + mem_clear(g_wb_lpc_bmc->flash_wr_buf, sizeof(g_wb_lpc_bmc->flash_wr_buf)); + + /* check flag is user spase or kernel spase */ + if (flag == USER_SPACE) { + DEBUG_VERBOSE("user space write, buf: %p, offset: 0x%llx, write count %ld.\n", + buf + buf_offset, *offset, chunk_size); + if (copy_from_user(g_wb_lpc_bmc->flash_wr_buf, buf + buf_offset, chunk_size)) { + DEBUG_ERROR("copy_from_user failed.\n"); + ret = -EFAULT; + goto err; + } + } else { + DEBUG_VERBOSE("kernel space write, buf: %p, offset: 0x%llx, write count %ld.\n", + buf + buf_offset, *offset, chunk_size); + memcpy(g_wb_lpc_bmc->flash_wr_buf, buf + buf_offset, chunk_size); + } + + ret = program_chip(chunk_size, g_wb_lpc_bmc->flash_wr_buf, info, *offset); + if(ret < 0) { + DEBUG_ERROR("Program Chip Error\n"); + goto err; + } + + ret = check_chip(chunk_size, g_wb_lpc_bmc->flash_wr_buf, info, *offset); + if(ret < 0) { + DEBUG_ERROR("Check Chip Error\n"); + goto err; + } + + *offset += chunk_size; + buf_offset += chunk_size; + bytes_remaining -= chunk_size; + } + + mutex_unlock(&g_wb_lpc_bmc->update_lock); + return count; +err: + mutex_unlock(&g_wb_lpc_bmc->update_lock); + return ret; +} + +static ssize_t bmc_master_flash_write_user(struct file *file, const char __user *buf, size_t count, loff_t *offset) +{ + int ret; + + DEBUG_VERBOSE("bmc_master_flash_write_user, file: %p, count: %zu, offset: %lld\n", + file, count, *offset); + ret = write_bmc_flash(file, buf, count, offset, CURRENT_MASTER, USER_SPACE); + return ret; +} + +static ssize_t bmc_master_flash_write_iter(struct kiocb *iocb, struct iov_iter *from) +{ + int ret = 0; + + DEBUG_VERBOSE("bmc_master_flash_write_iter, file: %p, count: %ld, offset: %lld\n", + iocb->ki_filp, from->count, iocb->ki_pos); + ret = write_bmc_flash(iocb->ki_filp, from->kvec->iov_base, from->count, &iocb->ki_pos, CURRENT_MASTER, KERNEL_SPACE); + return ret; +} + +static ssize_t bmc_slave_flash_write_user(struct file *file, const char __user *buf, size_t count, loff_t *offset) +{ + int ret; + + DEBUG_VERBOSE("bmc_slave_flash_write_user, file: %p, count: %zu, offset: %lld\n", + file, count, *offset); + ret = write_bmc_flash(file, buf, count, offset, CURRENT_SLAVE, USER_SPACE); + return ret; +} + +static ssize_t bmc_slave_flash_write_iter(struct kiocb *iocb, struct iov_iter *from) +{ + int ret = 0; + + DEBUG_VERBOSE("bmc_slave_flash_write_iter, file: %p, count: %ld, offset: %lld\n", + iocb->ki_filp, from->count, iocb->ki_pos); + ret = write_bmc_flash(iocb->ki_filp, from->kvec->iov_base, from->count, &iocb->ki_pos, CURRENT_SLAVE, KERNEL_SPACE); + return ret; +} + +static loff_t bmc_dev_llseek(struct file *file, loff_t offset, int origin) +{ + loff_t ret = 0; + + switch (origin) { + case SEEK_SET: + if (offset < 0) { + DEBUG_ERROR("SEEK_SET, offset:%lld, invalid.\n", offset); + ret = -EINVAL; + break; + } + if (offset > DEV_REG_MAX_LEN) { + DEBUG_ERROR("SEEK_SET out of range, offset:%lld, bmc_len:0x%x.\n", + offset, DEV_REG_MAX_LEN); + ret = - EINVAL; + break; + } + file->f_pos = offset; + ret = file->f_pos; + break; + case SEEK_CUR: + if (((file->f_pos + offset) >= DEV_REG_MAX_LEN) || ((file->f_pos + offset) < 0)) { + DEBUG_ERROR("SEEK_CUR out of range, f_ops:%lld, offset:%lld., bmc_len:0x%x.\n", + file->f_pos, offset, DEV_REG_MAX_LEN); + ret = - EINVAL; + break; + } + file->f_pos += offset; + ret = file->f_pos; + break; + default: + DEBUG_ERROR("unsupport llseek type:%d.\n", origin); + ret = -EINVAL; + break; + } + return ret; +} + +static loff_t bmc_flash_llseek(struct file *file, loff_t offset, int origin) +{ + loff_t ret = 0; + flash_info_t* info; + + if (g_wb_lpc_bmc->flash_size == 0) { + mutex_lock(&g_wb_lpc_bmc->update_lock); + if (g_wb_lpc_bmc->flash_rw_enable == 0) { + enable_upgrade(); + } + + info = get_flash_info(CURRENT_MASTER, CURRENT_MASTER); + if(info== NULL) { + DEBUG_ERROR("get bmc flash info failed.\n"); + if (g_wb_lpc_bmc->flash_rw_enable == 0) { + disable_upgrade(); + } + mutex_unlock(&g_wb_lpc_bmc->update_lock); + return -ENODEV; + } + + g_wb_lpc_bmc->flash_size = info->flash_size; + + if (g_wb_lpc_bmc->flash_rw_enable == 0) { + disable_upgrade(); + } + mutex_unlock(&g_wb_lpc_bmc->update_lock); + } + + switch (origin) { + case SEEK_SET: + if (offset < 0) { + DEBUG_ERROR("SEEK_SET, offset:%lld, invalid.\n", offset); + ret = -EINVAL; + break; + } + if (offset > DEV_REG_MAX_LEN) { + DEBUG_ERROR("SEEK_SET out of range, offset:%lld, bmc_len:0x%x.\n", + offset, DEV_REG_MAX_LEN); + ret = - EINVAL; + break; + } + file->f_pos = offset; + ret = file->f_pos; + break; + case SEEK_CUR: + if (((file->f_pos + offset) >= g_wb_lpc_bmc->flash_size) || ((file->f_pos + offset) < 0)) { + DEBUG_ERROR("SEEK_CUR out of range, f_ops:%lld, offset:%lld., bmc_len:0x%x.\n", + file->f_pos, offset, DEV_REG_MAX_LEN); + ret = - EINVAL; + break; + } + file->f_pos += offset; + ret = file->f_pos; + break; + default: + DEBUG_ERROR("unsupport llseek type:%d.\n", origin); + ret = -EINVAL; + break; + } + return ret; +} + +static long bmc_dev_ioctl(struct file *file, unsigned int cmd, unsigned long arg) +{ + return 0; +} + +static const struct file_operations bmc_dev_fops = { + .owner = THIS_MODULE, + .llseek = bmc_dev_llseek, + .read = bmc_dev_read_user, + .write = bmc_dev_write_user, + .read_iter = bmc_dev_read_iter, + .write_iter = bmc_dev_write_iter, + .unlocked_ioctl = bmc_dev_ioctl, +}; + +static const struct file_operations bmc_master_flash_dev_fops = { + .owner = THIS_MODULE, + .llseek = bmc_flash_llseek, + .read = bmc_master_flash_read_user, + .write = bmc_master_flash_write_user, + .read_iter = bmc_master_flash_read_iter, + .write_iter = bmc_master_flash_write_iter, + .unlocked_ioctl = bmc_dev_ioctl, +}; + +static const struct file_operations bmc_slave_flash_dev_fops = { + .owner = THIS_MODULE, + .llseek = bmc_flash_llseek, + .read = bmc_slave_flash_read_user, + .write = bmc_slave_flash_write_user, + .read_iter = bmc_slave_flash_read_iter, + .write_iter = bmc_slave_flash_write_iter, + .unlocked_ioctl = bmc_dev_ioctl, +}; + +static ssize_t lpc_bmc_attr_show(struct kobject *kobj, struct attribute *attr, char *buf) +{ + struct kobj_attribute *attribute; + + attribute = container_of(attr, struct kobj_attribute, attr); + + if (!attribute->show) { + return -ENOSYS; + } + + return attribute->show(kobj, attribute, buf); +} + +static ssize_t lpc_bmc_attr_store(struct kobject *kobj, struct attribute *attr, const char *buf, + size_t len) +{ + struct kobj_attribute *attribute; + + attribute = container_of(attr, struct kobj_attribute, attr); + + if (!attribute->store) { + return -ENOSYS; + } + + return attribute->store(kobj, attribute, buf, len); +} + +static const struct sysfs_ops lpc_bmc_sysfs_ops = { + .show = lpc_bmc_attr_show, + .store = lpc_bmc_attr_store, +}; + +static void lpc_bmc_obj_release(struct kobject *kobj) +{ + return; +} + +static struct kobj_type lpc_bmc_ktype = { + .sysfs_ops = &lpc_bmc_sysfs_ops, + .release = lpc_bmc_obj_release, +}; + +static ssize_t bmc_id_show(struct kobject *kobj, struct kobj_attribute *attr, char *buf) +{ + memset(buf, 0, PAGE_SIZE); + return snprintf(buf, PAGE_SIZE, "%08x\n", g_wb_lpc_bmc->bmc_id); +} + +static ssize_t flash_rw_enable_show(struct kobject *kobj, struct kobj_attribute *attr, char *buf) +{ + memset(buf, 0, PAGE_SIZE); + return snprintf(buf, PAGE_SIZE, "%d\n", g_wb_lpc_bmc->flash_rw_enable); +} + +static ssize_t flash_rw_enable_store(struct kobject *kobj, struct kobj_attribute *attr, const char *buf, size_t count) +{ + u8 val; + int ret; + + ret = kstrtou8(buf, 0, &val); + if (ret) { + DEBUG_ERROR("Invaild input value [%s], errno: %d\n", buf, ret); + return -EINVAL; + } + + if ((val != 0) && (val != 1)) { + DEBUG_ERROR("input value [%s] not equal 0 or 1\n", buf); + return -EINVAL; + } + + mutex_lock(&g_wb_lpc_bmc->update_lock); + if (val > 0) { + enable_upgrade(); + g_wb_lpc_bmc->flash_rw_enable = 1; + } else { + disable_upgrade(); + g_wb_lpc_bmc->flash_rw_enable = 0; + } + mutex_unlock(&g_wb_lpc_bmc->update_lock); + + return count; +} + +static ssize_t flash_info_show(struct kobject *kobj, struct kobj_attribute *attr, char *buf) +{ + int ret, offset, current_bmc; + ssize_t buf_len; + + if ((g_wb_lpc_bmc->master_flash_info == NULL) || (g_wb_lpc_bmc->slave_flash_info == NULL)) { + mutex_lock(&g_wb_lpc_bmc->update_lock); + if (g_wb_lpc_bmc->flash_rw_enable == 0) { + enable_upgrade(); + } + + current_bmc = get_current_bmc(); + DEBUG_VERBOSE("* Current Bmc : %d\n", current_bmc); + + g_wb_lpc_bmc->master_flash_info = get_flash_info(current_bmc, CURRENT_MASTER); + if(g_wb_lpc_bmc->master_flash_info == NULL) { + DEBUG_ERROR("get master bmc flash info failed.\n"); + ret = -ENODEV; + goto err; + } + + g_wb_lpc_bmc->slave_flash_info = get_flash_info(current_bmc, CURRENT_SLAVE); + if(g_wb_lpc_bmc->slave_flash_info == NULL) { + DEBUG_ERROR("get slave bmc flash info failed.\n"); + ret = -ENODEV; + goto err; + } + + if (g_wb_lpc_bmc->flash_rw_enable == 0) { + disable_upgrade(); + } + mutex_unlock(&g_wb_lpc_bmc->update_lock); + } + + memset(buf, 0, PAGE_SIZE); + offset = 0; + offset += scnprintf(buf + offset, PAGE_SIZE - offset, "%-23s: %s\n", "----------------------", "-----------------------"); + offset += scnprintf(buf + offset, PAGE_SIZE - offset, "%-23s: %s\n", "master_flash_name", g_wb_lpc_bmc->master_flash_info->flash_name); + offset += scnprintf(buf + offset, PAGE_SIZE - offset, "%-23s: 0x%x\n", "master_flash_id", g_wb_lpc_bmc->master_flash_info->flash_id); + offset += scnprintf(buf + offset, PAGE_SIZE - offset, "%-23s: %d\n", "master_flash_type", g_wb_lpc_bmc->master_flash_info->flash_type); + offset += scnprintf(buf + offset, PAGE_SIZE - offset, "%-23s: 0x%x\n", "master_flash_page_size", g_wb_lpc_bmc->master_flash_info->page_size); + offset += scnprintf(buf + offset, PAGE_SIZE - offset, "%-23s: %s\n", "----------------------", "-----------------------"); + offset += scnprintf(buf + offset, PAGE_SIZE - offset, "%-23s: %s\n", "slave_flash_name", g_wb_lpc_bmc->slave_flash_info->flash_name); + offset += scnprintf(buf + offset, PAGE_SIZE - offset, "%-23s: 0x%x\n", "slave_flash_id", g_wb_lpc_bmc->slave_flash_info->flash_id); + offset += scnprintf(buf + offset, PAGE_SIZE - offset, "%-23s: %d\n", "slave_flash_type", g_wb_lpc_bmc->slave_flash_info->flash_type); + offset += scnprintf(buf + offset, PAGE_SIZE - offset, "%-23s: 0x%x\n", "slave_flash_page_size", g_wb_lpc_bmc->slave_flash_info->page_size); + buf_len = strlen(buf); + return buf_len; +err: + if (g_wb_lpc_bmc->flash_rw_enable == 0) { + disable_upgrade(); + } + mutex_unlock(&g_wb_lpc_bmc->update_lock); + return ret; +} + +static ssize_t reset_bmc_store(struct kobject *kobj, struct kobj_attribute *attr, const char *buf, size_t count) +{ + u8 cs; + int ret; + + ret = kstrtou8(buf, 0, &cs); + if (ret) { + DEBUG_ERROR("Invaild input value [%s], errno: %d\n", buf, ret); + return -EINVAL; + } + + if ((cs != 0) && (cs != 1)) { + DEBUG_ERROR("input value [%s] not equal 0 or 1\n", buf); + return -EINVAL; + } + + if (g_wb_lpc_bmc->flash_rw_enable <= 0) { + DEBUG_ERROR("flash rw not enable , can not reset bmc.\n"); + return -EPERM; + } + + mutex_lock(&g_wb_lpc_bmc->update_lock); + bmc_reboot(cs); + mutex_unlock(&g_wb_lpc_bmc->update_lock); + + return count; +} + +static ssize_t flash_erase_full_show(struct kobject *kobj, struct kobj_attribute *attr, char *buf) +{ + memset(buf, 0, PAGE_SIZE); + return snprintf(buf, PAGE_SIZE, "%d\n", g_wb_lpc_bmc->flash_erase_full); +} + +static ssize_t flash_erase_full_store(struct kobject *kobj, struct kobj_attribute *attr, const char *buf, size_t count) +{ + u8 val; + int ret; + + ret = kstrtou8(buf, 0, &val); + if (ret) { + DEBUG_ERROR("Invaild input value [%s], errno: %d\n", buf, ret); + return -EINVAL; + } + + if ((val != 0) && (val != 1)) { + DEBUG_ERROR("input value [%s] not equal 0 or 1\n", buf); + return -EINVAL; + } + + mutex_lock(&g_wb_lpc_bmc->update_lock); + if (val > 0) { + g_wb_lpc_bmc->flash_erase_full = 1; + } else { + g_wb_lpc_bmc->flash_erase_full = 0; + } + mutex_unlock(&g_wb_lpc_bmc->update_lock); + + return count; +} + +static struct kobj_attribute flash_rw_enable_attribute = __ATTR(flash_rw_enable, S_IRUGO | S_IWUSR, flash_rw_enable_show, flash_rw_enable_store); +static struct kobj_attribute bmc_id_attribute = __ATTR(bmc_id, S_IRUGO, bmc_id_show, NULL); +static struct kobj_attribute flash_info_attribute = __ATTR(flash_info, S_IRUGO, flash_info_show, NULL); +static struct kobj_attribute reset_bmc_attribute = __ATTR(reset_bmc, S_IWUSR, NULL, reset_bmc_store); +static struct kobj_attribute flash_erase_full_attribute = __ATTR(flash_erase_full, S_IRUGO | S_IWUSR, flash_erase_full_show, flash_erase_full_store); + +static struct attribute *lpc_bmc_attrs[] = { + &bmc_id_attribute.attr, + &flash_rw_enable_attribute.attr, + &flash_info_attribute.attr, + &reset_bmc_attribute.attr, + &flash_erase_full_attribute.attr, + NULL, +}; + +static struct attribute_group lpc_bmc_attr_group = { + .attrs = lpc_bmc_attrs, +}; + +static int register_bmc_dev(wb_lpc_bmc_t *wb_lpc_bmc) +{ + int ret; + struct miscdevice *bmc_reg_misc; + struct miscdevice *bmc_master_flash_misc; + struct miscdevice *bmc_slave_flash_misc; + + bmc_reg_misc = &wb_lpc_bmc->bmc_reg_misc; + bmc_reg_misc->minor = MISC_DYNAMIC_MINOR; + bmc_reg_misc->name = BMC_REG_DEV_NAME; + bmc_reg_misc->fops = &bmc_dev_fops; + bmc_reg_misc->mode = 0666; + + bmc_master_flash_misc = &wb_lpc_bmc->bmc_master_flash; + bmc_master_flash_misc->minor = MISC_DYNAMIC_MINOR; + bmc_master_flash_misc->name = BMC_MASTER_FLASH_NAME; + bmc_master_flash_misc->fops = &bmc_master_flash_dev_fops; + bmc_master_flash_misc->mode = 0666; + + bmc_slave_flash_misc = &wb_lpc_bmc->bmc_slave_flash; + bmc_slave_flash_misc->minor = MISC_DYNAMIC_MINOR; + bmc_slave_flash_misc->name = BMC_SLAVE_FLASH_NAME; + bmc_slave_flash_misc->fops = &bmc_slave_flash_dev_fops; + bmc_slave_flash_misc->mode = 0666; + + if (misc_register(bmc_reg_misc) != 0) { + pr_err("Failed to register %s device.\n", bmc_reg_misc->name); + ret = -ENXIO; + return ret; + } + + if (misc_register(bmc_master_flash_misc) != 0) { + pr_err("Failed to register %s device.\n", bmc_master_flash_misc->name); + ret = -ENXIO; + goto unregister_bmc_reg_misc; + } + + if (misc_register(bmc_slave_flash_misc) != 0) { + pr_err("Failed to register %s device.\n", bmc_slave_flash_misc->name); + ret = -ENXIO; + goto unregister_master_flash_misc; + } + + return 0; + +unregister_master_flash_misc: + misc_deregister(&wb_lpc_bmc->bmc_master_flash); +unregister_bmc_reg_misc: + misc_deregister(&wb_lpc_bmc->bmc_reg_misc); + return ret; +} + +static int __init wb_lpc_bmc_init(void) +{ + int ret; + + g_wb_lpc_bmc = kzalloc(sizeof(*g_wb_lpc_bmc), GFP_KERNEL); + if (!g_wb_lpc_bmc) { + pr_err("init g_wb_lpc_bmc fail"); + return -ENOMEM; + } + + switch (lpc_addr_mode) { + case MODE_2E: + lpc_addr_port = LPC_ADDR_PORT_2E; + lpc_data_port = LPC_DATA_PORT_2F; + break; + case MODE_4E: + default: + lpc_addr_port = LPC_ADDR_PORT_4E; + lpc_data_port = LPC_DATA_PORT_4F; + break; + } + + ret = get_bmc_type(g_wb_lpc_bmc); + if (ret) { + pr_err("get_bmc_type fail.\n"); + goto free_lpc_bmc; + } + + /* creat parent dir by dev name in /sys/logic_dev */ + ret = kobject_init_and_add(&g_wb_lpc_bmc->kobj, &lpc_bmc_ktype, logic_dev_kobj, "%s", BMC_REG_DEV_NAME); + if (ret) { + kobject_put(&g_wb_lpc_bmc->kobj); + pr_err("creat parent dir %s fail", BMC_REG_DEV_NAME); + goto free_lpc_bmc; + } + + g_wb_lpc_bmc->flash_rw_enable = 0; + g_wb_lpc_bmc->flash_erase_full = 0; + g_wb_lpc_bmc->flash_size = 0; + g_wb_lpc_bmc->master_flash_info = NULL; + g_wb_lpc_bmc->slave_flash_info = NULL; + mutex_init(&g_wb_lpc_bmc->update_lock); + + g_wb_lpc_bmc->sysfs_group = &lpc_bmc_attr_group; + ret = sysfs_create_group(&g_wb_lpc_bmc->kobj, g_wb_lpc_bmc->sysfs_group); + if (ret) { + pr_err("sysfs_create_group %s error", BMC_REG_DEV_NAME); + goto remove_parent_kobj; + } + + ret = register_bmc_dev(g_wb_lpc_bmc); + if (ret) { + pr_err("register_bmc_dev fail.\n"); + goto remove_sysfs_group; + } + + pr_info("register lpc bmc dev success\n"); + return 0; + +remove_sysfs_group: + sysfs_remove_group(&g_wb_lpc_bmc->kobj, (const struct attribute_group *)g_wb_lpc_bmc->sysfs_group); +remove_parent_kobj: + kobject_put(&g_wb_lpc_bmc->kobj); +free_lpc_bmc: + kfree(g_wb_lpc_bmc); + return ret; +} + +static void __exit wb_lpc_bmc_exit(void) +{ + if (g_wb_lpc_bmc) { + pr_info("unregister lpc bmc dev\n"); + misc_deregister(&g_wb_lpc_bmc->bmc_reg_misc); + misc_deregister(&g_wb_lpc_bmc->bmc_slave_flash); + misc_deregister(&g_wb_lpc_bmc->bmc_master_flash); + sysfs_remove_group(&g_wb_lpc_bmc->kobj, (const struct attribute_group *)g_wb_lpc_bmc->sysfs_group); + kobject_put(&g_wb_lpc_bmc->kobj); + kfree(g_wb_lpc_bmc); + } +} + +module_init(wb_lpc_bmc_init); +module_exit(wb_lpc_bmc_exit); +MODULE_DESCRIPTION("lpc bmc driver"); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("support"); diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_lpc_bmc.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_lpc_bmc.h new file mode 100644 index 00000000000..6a0ec58f343 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_lpc_bmc.h @@ -0,0 +1,537 @@ +#ifndef __WB_LPC_BMC_H__ +#define __WB_LPC_BMC_H__ + +/* LPC Interface */ +#define LPC_ADDR_PORT_4E (0x4E) +#define LPC_DATA_PORT_4F (0x4F) +#define LPC_ADDR_PORT_2E (0x2E) +#define LPC_DATA_PORT_2F (0x2F) + +#define BMC_REG_DEV_NAME "lpc_bmc" +#define BMC_MASTER_FLASH_NAME "bmc_flash_master" +#define BMC_SLAVE_FLASH_NAME "bmc_flash_slave" +#define DEV_RDWR_MAX_LEN (256) +#define DEV_WIDTH (4) +#define DEV_REG_MAX_LEN (0x20000000) +#define FLASH_WR_MAX_LEN (1024) + +#define TYPE_AST2500 (1) +#define TYPE_AST2600 (2) + +/* FMC REGISTER ADDR */ +#define FMC_BASE_ADDR (0x1E620000) +#define FMC_CE_TYPE_SETTING_REG (FMC_BASE_ADDR + 0x00) +#define CE_CONTROL_REGISTER (FMC_BASE_ADDR + 0x04) +#define INR_STATUS_CONTROL_REGISTER (FMC_BASE_ADDR + 0x08) +#define COMMAND_CONTROL_REGISTER (FMC_BASE_ADDR + 0x0C) +#define CE0_CONTROL_REGISTER (FMC_BASE_ADDR + 0x10) +#define CE1_CONTROL_REGISTER (FMC_BASE_ADDR + 0x14) +#define CE0_ADDRESS_RANGE_REGISTER (FMC_BASE_ADDR + 0x30) +#define CE1_ADDRESS_RANGE_REGISTER (FMC_BASE_ADDR + 0x34) +#define FMC_WDT2_CONTROL_STATUS_REGISTER (FMC_BASE_ADDR + 0x64) +#define FMC_WDT2_TIMER_RELOAD_VALUE_REGISTER (FMC_BASE_ADDR + 0x68) +#define WRITE_ADDR_FILTER_REGISTER (FMC_BASE_ADDR + 0xA4) + +/* SCU REGISTER ADDR */ +#define SCU_ADDR (0x1E6E2000) +/* AST25 */ +#define AST25_HARDWARE_STRAP_REGISTER (SCU_ADDR + 0x70) +#define AST25_REBOOT_CPU_REGISTER (SCU_ADDR + 0x7C) +#define AST25_SILICON_REVISION_ID_REGISTER (SCU_ADDR + 0x7C) + +/* AST26 */ +#define AST26_PROTECTION_KEY_REGISTER_1 (SCU_ADDR + 0) +#define AST26_SILICON_REVISION_ID_REGISTER (SCU_ADDR + 0x04) +#define AST26_PROTECTION_KEY_REGISTER_2 (SCU_ADDR + 0x10) +#define AST26_HARDWARE_STRAP_REGISTER (SCU_ADDR + 0x500) +#define AST26_HARDWARE_STRAP_REGISTER_CLEAR (SCU_ADDR + 0x504) + +/* SCU KEY */ +#define UNLOCK_SCU_KEY (0x1688A8A8) +#define LOCK_SCU_KEY (0x11111111) + +/* WATCHDOG REGISTER ADDR */ +#define WATCHDOG_ADDR (0x1E785000) +#define WATCHDOG1_RELOAD_VALUE (WATCHDOG_ADDR + 0x04) +#define WATCHDOG1_COUNTER_RST (WATCHDOG_ADDR + 0x08) +#define WATCHDOG1_CONTROL (WATCHDOG_ADDR + 0x0C) +#define WATCHDOG1_TSR (WATCHDOG_ADDR + 0x10) +#define WATCHDOG1_CLEAR_STATUS (WATCHDOG_ADDR + 0x14) +#define WATCHDOG1_RESET_FUN_MASK (WATCHDOG_ADDR + 0x1C) + +#define WATCHDOG2_RELOAD_VALUE (WATCHDOG_ADDR + 0x24) +#define WATCHDOG2_COUNTER_RST (WATCHDOG_ADDR + 0x28) +#define WATCHDOG2_CONTROL (WATCHDOG_ADDR + 0x2C) +#define WATCHDOG2_TSR (WATCHDOG_ADDR + 0x30) +#define WATCHDOG2_CLEAR_STATUS (WATCHDOG_ADDR + 0x34) +#define WATCHDOG2_RESET_FUN_MASK (WATCHDOG_ADDR + 0x3C) + +#define AST26_WATCHDOG2_ADDR_BASE (0x1E785040) +#define AST26_WATCHDOG2_RELOAD_VALUE (AST26_WATCHDOG2_ADDR_BASE + 0x04) +#define AST26_WATCHDOG2_COUNTER_RST (AST26_WATCHDOG2_ADDR_BASE + 0x08) +#define AST26_WATCHDOG2_CONTROL (AST26_WATCHDOG2_ADDR_BASE + 0x0C) +#define AST26_WATCHDOG2_TSR (AST26_WATCHDOG2_ADDR_BASE + 0x10) +#define AST26_WATCHDOG2_CLEAR_STATUS (AST26_WATCHDOG2_ADDR_BASE + 0x14) +#define AST26_WATCHDOG2_RESET_FUN_MASK_1 (AST26_WATCHDOG2_ADDR_BASE + 0x1C) +#define AST26_WATCHDOG2_RESET_FUN_MASK_2 (AST26_WATCHDOG2_ADDR_BASE + 0x20) + +/* User Mode Command */ +#define WRITE_STATUS (0x01) +#define COMMON_PAGE_PROGRAM (0x02) +#define COMMON_FLASH_READ (0x03) +#define WRITE_DISABLE_FLASH (0x04) +#define READ_FLASH_STATUS (0x05) +#define WRITE_ENABLE_FLASH (0x06) +#define PAGE_PROGRAM_FLASH (0x12) +#define SECTOR_ERASE (0x20) +#define CLEAR_FLAG (0x50) +#define SUBBLOCK_ERASE (0x52) +#define CHIP_ERASE_FLASH (0x60) +#define BLOCK_ERASE_64 (0xD8) +#define READID (0x9F) +#define ENABLE_BYTE4 (0xB7) +#define EXIT_OTP (0xC1) +#define RSTEN (0x66) +#define RST (0x99) + +#define BIT1 (0x01) +#define BIT2 (0x02) +#define BIT3 (0x04) +#define BIT4 (0x08) +#define BIT5 (0x10) +#define BIT6 (0x20) +#define BIT7 (0x40) +#define BIT8 (0x80) +#define RIGHT_SHIFT_8(reg) (reg >> 8) +#define RIGHT_SHIFT_16(reg) (reg >> 16) +#define RIGHT_SHIFT_24(reg) (reg >> 24) +#define MASK (0xFF) +#define FLASH_TYPE_MASK (BIT1 | BIT2) +#define BOOT_DEFAULT_MASK (BIT8) +#define HEAD_MASK (0x00FFFF00) +#define MASK_BYTE (0xFF000000) +#define BYTE1 (1) +#define BYTE2 (2) +#define BYTE4 (4) +#define BYTE1_VAL (0) +#define BYTE2_VAL (1) +#define BYTE4_VAL (2) +#define BYTE_RESERVED (3) + +/* SuperIO */ +#define SUPERIO_07 (0x07) +#define SUPERIO_30 (0x30) +#define SUPERIO_A0 (0xA0) +#define SUPERIO_A2 (0xA2) +#define SUPERIO_REG0 (0xF0) +#define SUPERIO_REG1 (0xF1) +#define SUPERIO_REG2 (0xF2) +#define SUPERIO_REG3 (0xF3) +#define SUPERIO_REG4 (0xF4) +#define SUPERIO_REG5 (0xF5) +#define SUPERIO_REG6 (0xF6) +#define SUPERIO_REG7 (0xF7) +#define SUPERIO_REG8 (0xF8) +#define SUPERIO_FE (0xFE) + +/* SPI Command */ +#define HIGH_CLOCK (0x00000000) +#define NORMAL_READ (0x00000000) +#define READ_MODE (0x00000001) +#define WRITE_MODE (0x00000002) +#define USER_MODE (0x00000003) +#define PULL_DOWN (0x00000000) +#define PULL_UP (0x00000004) +#define DISABLE_ADDR_LINE (0x000000F0) +#define DISABLE_DATA_LINE (0x0000000F) +#define ENABLE_ADDR_LINE (0x00000000) +#define ENABLE_DATA_LINE (0x00000000) + +#define CHIP_ERASE_TIME (60) /* Wait 60 seconds for full erase */ +#define CHIP_ERASE_TIMEOUT (300 * 1000 * 1000) /* The total chip erase timeout period of polling is 300s */ +#define CHIP_ERASE_SLEEP_TIME (5 * 1000 * 1000) /* Poll the whole tablet to erase the sleep time 5s */ +#define BLOCK_ERASE_TIMEOUT (10 * 1000 * 1000) /* The polling block erasing timeout period is 10s */ +#define BLOCK_ERASE_SLEEP_TIME (100 * 1000) /* Polling blocks erase sleep time 100ms */ +#define PAGE_PROGRAM_TIMEOUT (100 * 1000) /* The polling page program timeout duration is 100ms */ +#define PAGE_PROGRAM_SLEEP_TIME (1000) /* Polling page program Sleep time 1ms */ +#define FLASH_WEL_TIMEOUT (100 * 1000) /* The polling write status timeout duration is 100ms */ +#define FLASH_WEL_SLEEP_TIME (1000) /* Polling write enabled state Sleep duration 1ms */ +#define FLASH_WIP_MASK (0x00000001) +#define FLASH_WRITE_ENABLE_MASK (0x00000002) + +#define DATA_LENGTH_MASK (0xA2) +#define TOGGLE_WRITE (0xCF) +#define DISABLE_LPC (0xAA) +#define ENABLE_LPC (0xA5) +#define LPC_TO_AHB (0x0D) +#define ENABLE_LPC_TO_AHB (0x01) +#define DISABLE_LPC_TO_AHB (0x00) +#define ENABLE_BMC_CPU_BOOT (0xF10BD286) +#define DISABLE_BMC_CPU_BOOT (0xF10BD287) +#define SET_BMC_CPU_BOOT (0x01) +#define CLEAR_WATCHDOG_STATUS (0x01) +#define DISABLE_WATCHDOG (0x00000030) +#define ENABLE_WATCHDOG (0x00000033) +#define WATCHDOG_GATEMASK (0x033FFFF3) +#define WATCHDOG_NEW_COUNT (0x00050000) +#define WATCHDOG_RELOAD_COUNTER (0x4755) + +#define AST26_WATCHDOG_GATEMASK_2 (0x03FFFFF3) +#define DISABLE_AST26_WATCHDOG (0x00000000) +#define AST26_ENABLE_WATCH_CMD (0x33) +#define AST26_ENABLE_FMC_WATCH_CMD (0x1) +#define AST26_FMC_WATCHDOG_NEW_COUNT (0x3) +#define AST26_FMC_WATCHDOG_DISABLE (0x0) + +#define CE0_SPI_TYPE (0x00000002) +#define CE1_SPI_TYPE (0x00000008) +#define ERROR_COMMAND (0x00000400) +#define ADDRESS_PROTECT (0x00000200) +#define CLEAR_INR_STATUS_CONTROL (ERROR_COMMAND | ADDRESS_PROTECT) +#define USER_MODE_PULL_CE_DOWN (HIGH_CLOCK | USER_MODE | PULL_DOWN) +#define USER_MODE_PULL_CE_UP (HIGH_CLOCK | USER_MODE | PULL_UP) + +#define STEP_64 (64 * 1024) +#define STEP_256 (256 * 1024) +#define BYTE_256 (256) + +#define CE0 (0) +#define CE1 (1) +#define BOTHFLASH (2) +#define SOC_SYS (0) +#define FULL_CHIP (1) +#define ARM_CPU (2) +#define FULL_ERASE (0) +#define BLOCK_ERASE (1) +#define READ_ALL (2) +#define CURRENT_SLAVE (1) +#define CURRENT_MASTER (0) +#define REGISTER_HEAD (0x1e000000) +#define DEFAULT_WIDTH (16) +#define MAX_FILENAME_LENGTH (64) +#define AST26_AHB_BASE_PHY_ADDR (0x20000000) +#define AST25_SEGMENT_ADDR_START(_r) ((((_r) >> 16) & 0xFF) << 23) +#define AST26_SEGMENT_ADDR_START(_r) ((((_r) & 0xFFFF) << 16) | AST26_AHB_BASE_PHY_ADDR) + +#define CE0_ADDRESS_4 (0x00000001) +#define CE1_ADDRESS_4 (0x00000002) +#define CE2_ADDRESS_4 (0x00000004) +#define CE0_DIV2_MODE (0x00000100) +#define CE1_DIV2_MODE (0x00000200) +#define CE2_DIV2_MODE (0x00000400) +#define CE_CONTROL_SET (CE0_ADDRESS_4 | CE1_ADDRESS_4 | CE0_DIV2_MODE | \ + CE1_DIV2_MODE | CE2_DIV2_MODE) + +#define DEFAULT_BASE_VALUE (0x80000000) +#define CE0_WRITE_ENABLE (0x00010000) +#define CE1_WRITE_ENABLE (0x00020000) +#define CE2_WRITE_ENABLE (0x00040000) +#define CE0_SPI_TYPE (0x00000002) +#define CE1_SPI_TYPE (0x00000008) +#define CE2_SPI_TYPE (0x00000020) +#define BASE_SET (DEFAULT_BASE_VALUE | CE0_WRITE_ENABLE | CE1_WRITE_ENABLE | \ + CE2_WRITE_ENABLE | CE0_SPI_TYPE | CE1_SPI_TYPE | CE2_SPI_TYPE) + +#define WRITE_ADDR_FILTER_EN1 (0x00000002) +#define WRITE_ADDR_FILTER_EN2 (0x00000008) +#define WRITE_ADDR_FILTER_EN3 (0x00000020) +#define WRITE_ADDR_FILTER_EN4 (0x00000080) +#define WRITE_ADDR_FILTER_EN5 (0x00000200) +#define WRITE_ADDR_FILTER_ENABLE (WRITE_ADDR_FILTER_EN1 | WRITE_ADDR_FILTER_EN2 | \ + WRITE_ADDR_FILTER_EN3 | WRITE_ADDR_FILTER_EN4 | \ + WRITE_ADDR_FILTER_EN5) + +#define WRITE_ADDR_FILTER_DIS1 (0x00000000) +#define WRITE_ADDR_FILTER_DIS2 (0x00000000) +#define WRITE_ADDR_FILTER_DIS3 (0x00000000) +#define WRITE_ADDR_FILTER_DIS4 (0x00000000) +#define WRITE_ADDR_FILTER_DIS5 (0x00000000) +#define WRITE_ADDR_FILTER_DISABLE (WRITE_ADDR_FILTER_DIS1 | WRITE_ADDR_FILTER_DIS2 | \ + WRITE_ADDR_FILTER_DIS3 | WRITE_ADDR_FILTER_DIS4 | \ + WRITE_ADDR_FILTER_DIS5) + +#define DISABLE_ADDR_DATA_LINE (DISABLE_ADDR_LINE | DISABLE_DATA_LINE) + +/* Write/Read Command */ +#define FLASH_WRITE_ENABLE (0x00060000) + +#define DECODE_DATA (0x00000000) +#define WRITE_ENABLE (FLASH_WRITE_ENABLE | WRITE_MODE) + +#define ENABLE_ADDR_DATA_LINE (ENABLE_ADDR_LINE | ENABLE_DATA_LINE) + +typedef enum lpc_addr_type { + MODE_4E = 0, + MODE_2E = 1, +} lpc_addr_type_t; + +/* User Mode Command */ +#define MASK (0xFF) + +typedef struct flash_info { + uint32_t flash_size; + int cs; + int flash_type; + uint32_t flash_id; + int page_size; + char flash_name[64]; + int erase_block_command; + int page_program; + int block_size; + int full_erase; + uint32_t ce_control_reg; + uint32_t flash_base_addr; +} flash_info_t; + +typedef enum flash_id { + MX25L6433F = 0x1920c2, + S25FL512S = 0x200201, + MX25l512 = 0x1a20c2, + STM25P64 = 0x172020, + STM25P128 = 0x182020, + N25Q256 = 0x19ba20, + N25Q512 = 0x20ba20, + W25X16 = 0x1530ef, + W25X64 = 0x1730ef, + W25Q64BV = 0x1740ef, + W25Q128BV = 0x1840ef, + W25Q256FV = 0x1940ef, + MX25L1605D = 0x1520C2, + MX25L12805D = 0x1820C2, + MX66L1G45G = 0x1B20C2, + SST25VF016B = 0x4125bf, + SST25VF064C = 0x4b25bf, + SST25VF040B = 0x8d25bf, + AT25DF161 = 0x02461F, + AT25DF321 = 0x01471F, + GD25Q256 = 0X1940c8, +} flash_id_t; + +typedef enum flash_type { + NOR = 0, + SPI = 2, +} flash_type_t; + +typedef enum flash_size { + M1 = 0x00080000, + M3 = 0x00200000, /* 3M */ + M6 = 0x00400000, /* 6M */ + M12 = 0x00800000, /* 12M */ + M16 = 0x01000000, /* 16M */ + M32 = 0x02000000, /* 32M */ + M64 = 0x04000000, /* 64M */ + M128 = 0x08000000, /* 128M */ +} flash_size_t; + +typedef enum ast_bmc_id_list { + AST2500_A0 = 0x04000303, + AST2510_A0 = 0x04000103, + AST2520_A0 = 0x04000203, + AST2530_A0 = 0x04000403, + + AST2500_A1 = 0x04010303, + AST2510_A1 = 0x04010103, + AST2520_A1 = 0x04010203, + AST2530_A1 = 0x04010403, + + AST2500_A2 = 0x04030303, + AST2510_A2 = 0x04030103, + AST2520_A2 = 0x04030203, + AST2530_A2 = 0x04030403, + + AST2600_A0 = 0x05000303, + AST2600_A1 = 0x05010303, + AST2600_A2 = 0x05010303, + AST2600_A3 = 0x05030303, + + AST2620_A1 = 0x05010203, + AST2620_A2 = 0x05010203, + AST2620_A3 = 0x05030203, +} ast_bmc_id_list_t; + +typedef struct bmc_id_list_s { + uint32_t bmc_ids[64]; + int bmc_type; + uint32_t bmc_id_reg; +} bmc_id_list_t; + +static flash_info_t flash_info[] = { + { + .flash_name = "M25L6433F", + .flash_size = M32, + .flash_type = SPI, + .page_size = BYTE_256, + .flash_id = MX25L6433F, + .block_size = STEP_64, + .full_erase = 1, + .erase_block_command = BLOCK_ERASE_64, + .page_program = COMMON_PAGE_PROGRAM, + }, + { + .flash_name = "S25FL512S", + .flash_size = M64, + .flash_type = SPI, + .page_size = BYTE_256, + .flash_id = S25FL512S, + .block_size = STEP_256, + .full_erase = 0, + .erase_block_command = BLOCK_ERASE_64, + .page_program = COMMON_PAGE_PROGRAM, + }, + { + .flash_name = "MX25l512", + .flash_size = M64, + .flash_type = SPI, + .page_size = BYTE_256, + .flash_id = MX25l512, + .block_size = STEP_64, + .full_erase = 1, + .erase_block_command = BLOCK_ERASE_64, + .page_program = COMMON_PAGE_PROGRAM, + }, + { + .flash_name = "STM25P64", + .flash_size = M12, + .flash_type = SPI, + .page_size = BYTE_256, + .flash_id = STM25P64, + .block_size = STEP_256, + .full_erase = 1, + .erase_block_command = BLOCK_ERASE_64, + .page_program = COMMON_PAGE_PROGRAM, + }, + { + .flash_name = "STM25P128", + .flash_size = M16, + .flash_type = SPI, + .page_size = BYTE_256, + .flash_id = STM25P128, + .block_size = STEP_256, + .full_erase = 1, + .erase_block_command = BLOCK_ERASE_64, + .page_program = COMMON_PAGE_PROGRAM, + }, + { + .flash_name = "N25Q256", + .flash_size = M16, + .flash_type = SPI, + .page_size = BYTE_256, + .flash_id = N25Q256, + .block_size = STEP_256, + .full_erase = 1, + .erase_block_command = BLOCK_ERASE_64, + .page_program = COMMON_PAGE_PROGRAM, + }, + { + .flash_name = "N25Q512", + .flash_size = M16, + .flash_type = SPI, + .page_size = BYTE_256, + .flash_id = N25Q512, + .block_size = STEP_256, + .full_erase = 1, + .erase_block_command = BLOCK_ERASE_64, + .page_program = COMMON_PAGE_PROGRAM, + }, + { + .flash_name = "W25X16", + .flash_size = M3, + .flash_type = SPI, + .page_size = BYTE_256, + .flash_id = W25X16, + .block_size = STEP_256, + .full_erase = 1, + .erase_block_command = BLOCK_ERASE_64, + .page_program = COMMON_PAGE_PROGRAM, + }, + { + .flash_name = "W25X64", + .flash_size = M12, + .flash_type = SPI, + .page_size = BYTE_256, + .flash_id = W25X64, + .block_size = STEP_256, + .full_erase = 1, + .erase_block_command = BLOCK_ERASE_64, + .page_program = COMMON_PAGE_PROGRAM, + }, + { + .flash_name = "W25Q64BV", + .flash_size = M12, + .flash_type = SPI, + .page_size = BYTE_256, + .flash_id = W25Q64BV, + .block_size = STEP_256, + .full_erase = 1, + .erase_block_command = BLOCK_ERASE_64, + .page_program = COMMON_PAGE_PROGRAM, + }, + { + .flash_name = "W25Q128BV", + .flash_size = M16, + .flash_type = SPI, + .page_size = BYTE_256, + .flash_id = W25Q128BV, + .block_size = STEP_256, + .full_erase = 1, + .erase_block_command = BLOCK_ERASE_64, + .page_program = COMMON_PAGE_PROGRAM, + }, + { + .flash_name = "W25Q256FV", + .flash_size = M16, + .flash_type = SPI, + .page_size = BYTE_256, + .flash_id = W25Q256FV, + .block_size = STEP_256, + .full_erase = 1, + .erase_block_command = BLOCK_ERASE_64, + .page_program = COMMON_PAGE_PROGRAM, + }, + { + .flash_name = "MX25L1605D", + .flash_size = M32, + .flash_type = SPI, + .page_size = BYTE_256, + .flash_id = MX25L1605D, + .block_size = STEP_256, + .full_erase = 1, + .erase_block_command = BLOCK_ERASE_64, + .page_program = COMMON_PAGE_PROGRAM, + }, + { + .flash_name = "MX25L12805D", + .flash_size = M32, + .flash_type = SPI, + .page_size = BYTE_256, + .flash_id = MX25L12805D, + .block_size = STEP_256, + .full_erase = 1, + .erase_block_command = BLOCK_ERASE_64, + .page_program = COMMON_PAGE_PROGRAM, + }, + { + .flash_name = "MX66L1G45G", + .flash_size = M128, + .flash_type = SPI, + .page_size = BYTE_256, + .flash_id = MX66L1G45G, + .block_size = STEP_256, + .full_erase = 1, + .erase_block_command = BLOCK_ERASE_64, + .page_program = COMMON_PAGE_PROGRAM, + }, + { + .flash_name = "GD25Q256", + .flash_size = M16, + .flash_type = SPI, + .page_size = BYTE_256, + .flash_id = GD25Q256, + .block_size = STEP_256, + .full_erase = 1, + .erase_block_command = BLOCK_ERASE_64, + .page_program = COMMON_PAGE_PROGRAM, + }, +}; + +#endif diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_lpc_drv.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_lpc_drv.c index 45290ca843e..9509ea5442d 100644 --- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_lpc_drv.c +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_lpc_drv.c @@ -23,11 +23,13 @@ #include #include #include +#include #include #include #include #include #include +#include #include "wb_lpc_drv.h" @@ -133,7 +135,11 @@ static int wb_lpc_probe(struct platform_device *pdev) return 0; } +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 11, 0) static int wb_lpc_remove(struct platform_device *pdev) +#else +static void wb_lpc_remove(struct platform_device *pdev) +#endif { wb_lpc_dev_t *wb_lpc_dev; @@ -143,8 +149,9 @@ static int wb_lpc_remove(struct platform_device *pdev) LPC_DEV_DEBUG_VERBOSE("lpc base:0x%x, len:0x%x.\n", wb_lpc_dev->lpc_io_base, wb_lpc_dev->lpc_io_size); } LPC_DEV_DEBUG_VERBOSE("lpc remove.\n"); - +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 11, 0) return 0; +#endif } static struct of_device_id lpc_dev_match[] = { diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_mac_bsc.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_mac_bsc.c index ba9cd692f8e..62dd6b4ffad 100644 --- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_mac_bsc.c +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_mac_bsc.c @@ -1,7 +1,6 @@ /* - * An wb_mac_bsc driver for mac bsc function * - * Copyright (C) 2024 Micas Networks Inc. + * Copyright (c) 1998, 1999 Frodo Looijaard * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -29,6 +28,7 @@ #include #include #include +#include #define mem_clear(data, size) memset((data), 0, (size)) @@ -39,29 +39,15 @@ #define MAC_REG_DATA_WIDTH (4) #define MAC_BSC_MAX_TEMP_NUM (16) #define MAC_BSC_MAX_READ_REG_STEP (6) -#define MAC_BSC_MAX_SETUP_NUM (1) +#define MAC_BSC_MAX_SETUP_NUM (16) +#define MAC_BSC_AVS_SYSFS_MAX_NUM (16) +#define MAC_BSC_AVS_REG_MAX_NUM (2) #define MAC_BSC_MAX_RETRY (3) #define MAC_BSC_RETRY_SLEEP_TIME (10000) /* 10ms */ -static int g_wb_mac_bsc_debug = 0; -static int g_wb_mac_bsc_error = 0; - -module_param(g_wb_mac_bsc_debug, int, S_IRUGO | S_IWUSR); -module_param(g_wb_mac_bsc_error, int, S_IRUGO | S_IWUSR); - -#define WB_MAC_BSC_DEBUG(fmt, args...) do { \ - if (g_wb_mac_bsc_debug) { \ - printk(KERN_INFO "[MAC_BSC][VER][func:%s line:%d] "fmt, __func__, __LINE__, ## args); \ - } \ -} while (0) - -#define WB_MAC_BSC_ERROR(fmt, args...) do { \ - if (g_wb_mac_bsc_error) { \ - printk(KERN_ERR "[MAC_BSC][ERR][func:%s line:%d]"fmt, __func__, __LINE__, ## args); \ - } \ -} while (0) - +static int debug = 0; +module_param(debug, int, S_IRUGO | S_IWUSR); typedef enum{ MAC_TYPE_START, TD4_X9 = 0xb780, @@ -71,9 +57,16 @@ typedef enum{ TD3_X2 = 0xb274, TD4 = 0xb880, TH4 = 0xb990, + TH5 = 0x8900, + TH6 = 0x8910, MAC_TYPE_END, } mac_id; +typedef enum { + TYPE_VTMON = 0, + TYPE_AVS, +} reg_type; + typedef enum { MAC_TEMP_START, MAC_TEMP_INDEX1, @@ -106,20 +99,33 @@ typedef struct i2c_op_s { int read_back; } i2c_op_t; +typedef struct avs_info_s { + uint32_t avs_reg_addr; + uint32_t avs_reg_offset; + uint32_t avs_reg_mask; +} avs_info_t; + typedef struct dev_params_s { int mac_id; i2c_op_t sbus_setup[MAC_BSC_MAX_SETUP_NUM]; i2c_op_t vtmon_read[MAC_BSC_MAX_READ_REG_STEP]; + i2c_op_t avs_read[MAC_BSC_MAX_READ_REG_STEP]; uint32_t vtmon_reg_addrs[MAC_BSC_MAX_TEMP_NUM]; + uint32_t avs_reg_addrs[MAC_BSC_MAX_TEMP_NUM]; uint8_t vtmon_instances; uint32_t vtmon_data_width; + uint8_t avs_instances; + avs_info_t avs_info[MAC_BSC_AVS_SYSFS_MAX_NUM][MAC_BSC_AVS_REG_MAX_NUM]; + uint8_t avs_info_instances; int vtmon_scalar; int vtmon_offset; uint8_t sbus_setup_ops; int vtmon_read_ops; int sbus_addr_op; int sbus_error_op; + uint8_t avs_read_ops; uint32_t sbus_error_mask; + bool not_support_vtmon; } dev_params_t; static dev_params_t mac_temp_conf[] = { @@ -343,6 +349,85 @@ static dev_params_t mac_temp_conf[] = { .sbus_addr_op = 2, .sbus_error_op = -1, }, + { + .mac_id = TH5, + .sbus_setup = {{I2C_WRITE, 0x02879800, 0x00000000}, /* CMICX_M0_IDM_IDM_RESET_CONTROLr = 0x0 */ + {I2C_WRITE, 0x0287b800, 0x00000000}, /* CMICX_M1_IDM_IDM_RESET_CONTROLr = 0x0 */ + {I2C_WRITE, 0x0287a800, 0x00000000}, /* CMICX_M2_IDM_IDM_RESET_CONTROLr = 0x0 */ + {I2C_WRITE, 0x02872800, 0x00000000}, /* CMICX_S0_IDM_IDM_RESET_CONTROLr = 0x0 */ + {I2C_WRITE, 0x02810798, 0x02078000}, /* CMIC_CMNPL_SBUSPIO_CH15_CMPL_RING_BASE_ADDR_LOWERr = HOST_MEM_BASE */ + {I2C_WRITE, 0x0281079c, 0x00000000}, /* CMIC_CMNPL_SBUSPIO_CH15_CMPL_RING_BASE_ADDR_HIGHr = 0 */ + {I2C_WRITE, 0x028107a0, 0x00000000}, /* CMIC_CMNPL_SBUSPIO_CH15_CMPL_RING_SIZEr = 0x0 */ + {I2C_WRITE, 0x028107a4, 0x02079000}, /* CMIC_CMNPL_SBUSPIO_CH15_POINTER_HOST_ADDR_LOWERr = POINTER_MEM_BASE */ + {I2C_WRITE, 0x028107a8, 0x00000000}, /* CMIC_CMNPL_SBUSPIO_CH15_POINTER_HOST_ADDR_UPPERr = 0 */ + {I2C_WRITE, 0x0280f800, 0x2c200040}, /* CMIC_CMNPL_SBUSPIO_CH15_COMMAND_RING_MEMORYr[0] = 0x2c200040 */ + {I2C_WRITE, 0x028107ac, 0x00000008}}, /* CMIC_CMNPL_SBUSPIO_CH15_CMD_PRODUCER_INDEXr = 8 0x2c200040 */ + .vtmon_read = {{I2C_WRITE, 0x02810780, 0x00000200}, /* CMIC_CMNPL_SBUSPIO_CH15_CTRLr = 0x200 */ + {I2C_WRITE, 0x0280f804, 0x02008800}, /* CMIC_CMNPL_SBUSPIO_CH15_COMMAND_RING_MEMORYr[1] = TOP_PVTMON_0_RESULT_1r */ + {I2C_WRITE, 0x02810780, 0x00000201}, /* CMIC_CMNPL_SBUSPIO_CH15_CTRLr = 0x201 */ + {I2C_READ, 0x02810794}, /* CMIC_CMNPL_SBUSPIO_CH15_STATUSr */ + {I2C_READ, 0x02078000}}, /* Read HOST_MEM_BASE */ + .vtmon_reg_addrs = {0x02008800, 0x02009000, 0x02009800, 0x0200a000, + 0x0200a800, 0x0200b000, 0x0200b800, 0x0200c000, + 0x0200c800, 0x0200d000, 0x0200d800, 0x0200e000, + 0x0200e800, 0x0200f000, 0x0200f800, 0x02010000}, /* "TOP_PVTMON0_RESULT_1" @ 0x02008800, ..... TOP_PVTMON15_RESULT_1 @ 0x02010000 */ + .vtmon_instances = 16, /* TH5 has 16 VTMONs mainly for customer check */ + .vtmon_data_width = 11, /* check in regfile, TH5 TMON_DATA: 11bits */ + .vtmon_scalar = -3177, //Tj= 476.359 - 0.317704xData + .vtmon_offset = 4763590, //Tj= 476.359 - 0.317704xData + .sbus_setup_ops = 11, + .vtmon_read_ops = 5, + .sbus_addr_op = 1, + .sbus_error_op = 3, + .sbus_error_mask = 0x00000002, + }, + { + .mac_id = TH6, + .sbus_setup = {{I2C_WRITE, 0x02879800, 0x00000000}, /* CMICX_M0_IDM_IDM_RESET_CONTROLr = 0x0 */ + {I2C_WRITE, 0x0287b800, 0x00000000}, /* CMICX_M1_IDM_IDM_RESET_CONTROLr = 0x0 */ + {I2C_WRITE, 0x0287a800, 0x00000000}, /* CMICX_M2_IDM_IDM_RESET_CONTROLr = 0x0 */ + {I2C_WRITE, 0x02872800, 0x00000000},}, /* CMICX_S0_IDM_IDM_RESET_CONTROLr = 0x0 */ + .avs_read = {{I2C_READ, 0x02840060}}, /* Read DMU_MASTER_PCU_OTP_CONFIG_6r */ + .avs_reg_addrs = {0x02840060, 0x02840064, 0x02840068, 0x0284006c, 0x02840070}, /* DMU_MASTER_PCU_OTP_CONFIG_6r address offset=0x02840060; DMU_MASTER_PCU_OTP_CONFIG_6r:0x02840064; DMU_MASTER_PCU_OTP_CONFIG_6r:0x02840068... */ + .avs_instances = 5, /* Core die and phytile avs status */ + .avs_info = { + { + {0x02840060, 6, 0xff} + }, + { + {0x02840060, 14, 0xff} + }, + { + {0x02840060, 22, 0xff} + }, + { + {0x02840064, 0, 0x3f}, + {0x02840060, 30, 0x3} + }, + { + {0x02840064, 6, 0xff} + }, + { + {0x02840064, 14, 0xff} + }, + { + {0x02840068, 0, 0xff} + }, + { + {0x02840068, 8, 0xff} + }, + { + {0x02840068, 16, 0xff} + }, + }, + .avs_info_instances = 9, + .sbus_setup_ops = 4, + .avs_read_ops = 1, + .sbus_addr_op = 0, + .sbus_error_op = 3, + .sbus_error_mask = 0x00000002, + .not_support_vtmon = 1, + }, }; struct mac_data { @@ -378,14 +463,14 @@ static int bsc_i2c_read(struct i2c_client *client, uint32_t reg_addr, uint32_t * msgs_num = 2; ret = i2c_transfer(client->adapter, msgs, msgs_num); if (ret != msgs_num) { - WB_MAC_BSC_ERROR("i2c_transfer read failed, reg_addr: 0x%x, ret: %d\n", reg_addr, ret); + DEBUG_ERROR("i2c_transfer read failed, reg_addr: 0x%x, ret: %d\n", reg_addr, ret); return -EIO; } val = 0; for (i = 0; i < MAC_REG_DATA_WIDTH; i++) { val |= data_buf[i] << ((MAC_REG_DATA_WIDTH - i -1) * 8); } - WB_MAC_BSC_DEBUG("bsc_i2c_read success, reg_addr: 0x%x, reg_val: 0x%x\n", reg_addr, val); + DEBUG_VERBOSE("bsc_i2c_read success, reg_addr: 0x%x, reg_val: 0x%x\n", reg_addr, val); *reg_val = val; return 0; } @@ -412,11 +497,11 @@ static int bsc_i2c_write(struct i2c_client *client, uint32_t reg_addr, uint32_t ret = i2c_transfer(client->adapter, msgs, 1); if (ret < 0) { - WB_MAC_BSC_DEBUG("i2c_transfer write failed, reg_addr: 0x%x, reg_val: 0x%x, ret: %d\n", + DEBUG_VERBOSE("i2c_transfer write failed, reg_addr: 0x%x, reg_val: 0x%x, ret: %d\n", reg_addr, reg_val, ret); return ret; } - WB_MAC_BSC_DEBUG("i2c_transfer write reg_addr: 0x%x, reg_val: 0x%x success\n", + DEBUG_VERBOSE("i2c_transfer write reg_addr: 0x%x, reg_val: 0x%x success\n", reg_addr, reg_val); return 0; } @@ -427,16 +512,16 @@ static int handle_operation_write(struct i2c_client *client, i2c_op_t *operation uint32_t rd_back_val; ret = bsc_i2c_write(client, operation->reg_addr, operation->reg_val); - WB_MAC_BSC_DEBUG("bsc_i2c_write reg_addr: 0x%x, set val: 0x%x, ret: %d\n", + DEBUG_VERBOSE("bsc_i2c_write reg_addr: 0x%x, set val: 0x%x, ret: %d\n", operation->reg_addr, operation->reg_val, ret); if (operation->read_back) { ret = bsc_i2c_read(client, operation->reg_addr, &rd_back_val); if (rd_back_val != operation->reg_val) { - WB_MAC_BSC_ERROR("bsc_i2c_write failed, reg_addr: 0x%x, set val: 0x%x, read back valu: 0x%x\n", + DEBUG_ERROR("bsc_i2c_write failed, reg_addr: 0x%x, set val: 0x%x, read back valu: 0x%x\n", operation->reg_addr, operation->reg_val, rd_back_val); return -1; } - WB_MAC_BSC_DEBUG("bsc_i2c_write success, reg_addr: 0x%x, set val: 0x%x, read_back val: 0x%x\n", + DEBUG_VERBOSE("bsc_i2c_write success, reg_addr: 0x%x, set val: 0x%x, read_back val: 0x%x\n", operation->reg_addr, operation->reg_val, rd_back_val); } return 0; @@ -450,49 +535,63 @@ static int handle_operation(struct i2c_client *client, i2c_op_t *operation) for (i = 0; i < MAC_BSC_MAX_RETRY; i++) { ret = handle_operation_write(client, operation); if (ret == 0) { - WB_MAC_BSC_DEBUG("handle_operation_write success, retry: %d\n", i); + DEBUG_VERBOSE("handle_operation_write success, retry: %d\n", i); return 0; } if ((i + 1) < MAC_BSC_MAX_RETRY) { usleep_range(MAC_BSC_RETRY_SLEEP_TIME, MAC_BSC_RETRY_SLEEP_TIME + 1); } } - WB_MAC_BSC_DEBUG("handle_operation_write retry: %d failed, ret: %d, ignore it\n", i, ret); + DEBUG_VERBOSE("handle_operation_write retry: %d failed, ret: %d, ignore it\n", i, ret); return 0; } if (operation->op == I2C_READ) { ret = bsc_i2c_read(client, operation->reg_addr, &operation->reg_val); - WB_MAC_BSC_DEBUG("bsc_i2c_read reg_addr: 0x%x, get val: 0x%x, ret: %d\n", + DEBUG_VERBOSE("bsc_i2c_read reg_addr: 0x%x, get val: 0x%x, ret: %d\n", operation->reg_addr, operation->reg_val, ret); return ret; } - WB_MAC_BSC_ERROR("Unsupport operation type: %d\n", operation->op); + DEBUG_ERROR("Unsupport operation type: %d\n", operation->op); return -EINVAL; } -static int get_mac_reg(struct i2c_client *client, uint32_t reg_addr, uint32_t *reg_value) +static int get_mac_reg(struct i2c_client *client, uint32_t reg_addr, uint32_t *reg_value, uint8_t type) { int i, ret; - i2c_op_t *op; + i2c_op_t *op, *tmp_op; struct mac_data *data; dev_params_t *dev_params; uint32_t val_tmp; + int ops; data = i2c_get_clientdata(client); dev_params = &data->dev_param; + + if (type == TYPE_AVS) { + ops = dev_params->avs_read_ops; + tmp_op = dev_params->avs_read; + } else { + ops = dev_params->vtmon_read_ops; + tmp_op = dev_params->vtmon_read; + } + val_tmp = 0; - for (i = 0; i < dev_params->vtmon_read_ops; i++) { - op = &dev_params->vtmon_read[i]; + for (i = 0; i < ops; i++) { + op = tmp_op + i; if (i == dev_params->sbus_addr_op) { - op->reg_val = reg_addr; + if (type == TYPE_AVS) { + op->reg_addr = reg_addr; + } else { + op->reg_val = reg_addr; + } } - WB_MAC_BSC_DEBUG("Start to handle %s operation, step: %d, reg_addr: 0x%x, reg_value: 0x%x, read back flag: %d\n", + DEBUG_VERBOSE("Start to handle %s operation, step: %d, reg_addr: 0x%x, reg_value: 0x%x, read back flag: %d\n", op->op == I2C_READ ? "I2C_READ" : "I2C_WRITE", i, op->reg_addr, op->reg_val, op->read_back); ret = handle_operation(client, op); if (ret < 0) { - WB_MAC_BSC_ERROR("handle operation %d failed, ret: %d\n", i, ret); + DEBUG_ERROR("handle operation %d failed, ret: %d\n", i, ret); return ret; } if (op->op == I2C_READ) { @@ -501,22 +600,22 @@ static int get_mac_reg(struct i2c_client *client, uint32_t reg_addr, uint32_t *r if (i == dev_params->sbus_error_op) { if (val_tmp & dev_params->sbus_error_mask) { - WB_MAC_BSC_ERROR("SBUS error seen, status value: 0x%x\n", op->reg_val); + DEBUG_ERROR("SBUS error seen, status value: 0x%x\n", op->reg_val); return -EIO; } - WB_MAC_BSC_DEBUG("Error status check ok, status: 0x%x, error_mask: 0x%x \n", + DEBUG_VERBOSE("Error status check ok, status: 0x%x, error_mask: 0x%x \n", val_tmp, dev_params->sbus_error_mask); } } if (val_tmp == reg_addr) { - WB_MAC_BSC_ERROR("get mac register error, register value: 0x%x equal to reg_addr: 0x%x\n", + DEBUG_ERROR("get mac register error, register value: 0x%x equal to reg_addr: 0x%x\n", val_tmp, reg_addr); return -EIO; } *reg_value = val_tmp; - WB_MAC_BSC_DEBUG("get_mac_reg success, reg_addr: 0x%x, reg_value: 0x%x", reg_addr, *reg_value); + DEBUG_VERBOSE("get_mac_reg success, reg_addr: 0x%x, reg_value: 0x%x", reg_addr, *reg_value); return 0; } @@ -532,14 +631,15 @@ static int read_vtmon(struct i2c_client *client, uint8_t vtmon, int *temp) dev_params = &data->dev_param; if (vtmon >= dev_params->vtmon_instances) { - WB_MAC_BSC_ERROR("VTMON index [%d] greater or equal to VTMON instance number: %d\n", + DEBUG_ERROR("VTMON index [%d] greater or equal to VTMON instance number: %d\n", vtmon, dev_params->vtmon_instances); return -1; } + reg_addr = dev_params->vtmon_reg_addrs[vtmon]; - ret = get_mac_reg(client, reg_addr, ®_val); + ret = get_mac_reg(client, reg_addr, ®_val, TYPE_VTMON); if (ret < 0) { - WB_MAC_BSC_ERROR("Read VTMON[%d] failed, reg_addr: 0x%x, ret: %d\n", + DEBUG_ERROR("Read VTMON[%d] failed, reg_addr: 0x%x, ret: %d\n", vtmon, reg_addr, ret); return ret; } @@ -548,10 +648,62 @@ static int read_vtmon(struct i2c_client *client, uint8_t vtmon, int *temp) *temp = ((dev_params->vtmon_scalar * vtmon_val) + dev_params->vtmon_offset) / 10; if ((*temp / 1000 < -40) || (*temp / 1000 > 120)) { - WB_MAC_BSC_ERROR("MAC temp invalid, vtmon: %d, temp: %d\n", vtmon, *temp); + DEBUG_ERROR("MAC temp invalid, vtmon: %d, temp: %d\n", vtmon, *temp); return -EINVAL; } - WB_MAC_BSC_DEBUG("Read mac temp success, index: %d, value: %d\n", vtmon + 1, *temp); + DEBUG_VERBOSE("Read mac temp success, index: %d, value: %d\n", vtmon + 1, *temp); + return 0; +} + +static int read_avs(struct i2c_client *client, uint8_t avs_index, uint32_t *avs_val) +{ + struct mac_data *data; + dev_params_t *dev_params; + avs_info_t *avs_info; + int ret, i; + uint32_t tmp_avs_val; + uint32_t avs_reg_addr; + uint32_t avs_reg_offset; + uint32_t avs_reg_mask; + bool avs_read_success = false; + *avs_val = 0; + + data = i2c_get_clientdata(client); + dev_params = &data->dev_param; + + if (avs_index >= dev_params->avs_info_instances) { + DEBUG_ERROR("avs index [%d] greater or equal to avs instance number: %d\n", + avs_index, dev_params->avs_info_instances); + return -EINVAL; + } + + for (i = 0; i < MAC_BSC_AVS_REG_MAX_NUM; i++) { + avs_info = &dev_params->avs_info[avs_index][i]; + avs_reg_addr = avs_info->avs_reg_addr; + avs_reg_offset = avs_info->avs_reg_offset; + avs_reg_mask = avs_info->avs_reg_mask; + + if ((avs_reg_addr == 0) && (avs_reg_offset == 0) && (avs_reg_mask == 0)) { + break; + } + ret = get_mac_reg(client, avs_reg_addr, &tmp_avs_val, TYPE_AVS); + if (ret < 0) { + DEBUG_ERROR("Read avs[%d] index[%d] failed, avs_reg_addr: 0x%x, ret: %d\n", + avs_index, i, avs_reg_addr, ret); + return ret; + } + DEBUG_VERBOSE("Read avs val success, avs%d, index: %d, value: %x\n", avs_index, i, tmp_avs_val); + tmp_avs_val = (tmp_avs_val >> avs_reg_offset) & avs_reg_mask; + *avs_val = (*avs_val << fls(avs_reg_mask)) | tmp_avs_val; + avs_read_success = true; + } + + if (!avs_read_success) { + DEBUG_ERROR("Read avs val fail, avs config error\n"); + return -EINVAL; + } + + DEBUG_VERBOSE("Read avs val success, index: %d, value: %x\n", avs_index + 1, *avs_val); return 0; } @@ -566,12 +718,30 @@ static ssize_t show_mac_temp(struct device *dev, struct device_attribute *da, ch ret = read_vtmon(client, temp_index - 1, &temp); if (ret < 0) { temp = -MAC_TEMP_INVALID; - WB_MAC_BSC_ERROR("get_mactemp index: %d failed, ret = %d\n", temp_index, ret); + DEBUG_ERROR("get_mactemp index: %d failed, ret = %d\n", temp_index, ret); } mutex_unlock(&data->update_lock); return snprintf(buf, PAGE_SIZE, "%d\n", temp); } +static ssize_t show_mac_avs(struct device *dev, struct device_attribute *da, char *buf) +{ + struct mac_data *data = dev_get_drvdata(dev); + struct i2c_client *client = data->client; + u32 avs_index = to_sensor_dev_attr(da)->index; + int ret; + u32 avs_val; + + mutex_lock(&data->update_lock); + ret = read_avs(client, avs_index - 1, &avs_val); + mutex_unlock(&data->update_lock); + if (ret < 0) { + DEBUG_ERROR("get_mac_avs index: %d failed, ret = %d\n", avs_index, ret); + return ret; + } + return snprintf(buf, PAGE_SIZE, "0x%02x\n", avs_val); +} + static ssize_t show_mac_max_temp(struct device *dev, struct device_attribute *da, char *buf) { struct mac_data *data = dev_get_drvdata(dev); @@ -587,7 +757,7 @@ static ssize_t show_mac_max_temp(struct device *dev, struct device_attribute *da for (i = 0; i < dev_params->vtmon_instances ; i++) { ret = read_vtmon(client, i, &tmp); if (ret < 0) { - WB_MAC_BSC_ERROR("Get mactemp failed, temp index: %d, ret = %d\n", + DEBUG_ERROR("Get mactemp failed, temp index: %d, ret = %d\n", i, ret); tmp = -MAC_TEMP_INVALID; } @@ -616,6 +786,16 @@ static SENSOR_DEVICE_ATTR(temp14_input, S_IRUGO, show_mac_temp, NULL, MAC_TEMP_I static SENSOR_DEVICE_ATTR(temp15_input, S_IRUGO, show_mac_temp, NULL, MAC_TEMP_INDEX15); static SENSOR_DEVICE_ATTR(temp99_input, S_IRUGO, show_mac_max_temp, NULL, 0); +static SENSOR_DEVICE_ATTR(avs1, S_IRUGO, show_mac_avs, NULL, 1); +static SENSOR_DEVICE_ATTR(avs2, S_IRUGO, show_mac_avs, NULL, 2); +static SENSOR_DEVICE_ATTR(avs3, S_IRUGO, show_mac_avs, NULL, 3); +static SENSOR_DEVICE_ATTR(avs4, S_IRUGO, show_mac_avs, NULL, 4); +static SENSOR_DEVICE_ATTR(avs5, S_IRUGO, show_mac_avs, NULL, 5); +static SENSOR_DEVICE_ATTR(avs6, S_IRUGO, show_mac_avs, NULL, 6); +static SENSOR_DEVICE_ATTR(avs7, S_IRUGO, show_mac_avs, NULL, 7); +static SENSOR_DEVICE_ATTR(avs8, S_IRUGO, show_mac_avs, NULL, 8); +static SENSOR_DEVICE_ATTR(avs9, S_IRUGO, show_mac_avs, NULL, 9); + static struct attribute *mac_hwmon_attrs[] = { &sensor_dev_attr_temp1_input.dev_attr.attr, &sensor_dev_attr_temp2_input.dev_attr.attr, @@ -633,6 +813,15 @@ static struct attribute *mac_hwmon_attrs[] = { &sensor_dev_attr_temp14_input.dev_attr.attr, &sensor_dev_attr_temp15_input.dev_attr.attr, &sensor_dev_attr_temp99_input.dev_attr.attr, + &sensor_dev_attr_avs1.dev_attr.attr, + &sensor_dev_attr_avs2.dev_attr.attr, + &sensor_dev_attr_avs3.dev_attr.attr, + &sensor_dev_attr_avs4.dev_attr.attr, + &sensor_dev_attr_avs5.dev_attr.attr, + &sensor_dev_attr_avs6.dev_attr.attr, + &sensor_dev_attr_avs7.dev_attr.attr, + &sensor_dev_attr_avs8.dev_attr.attr, + &sensor_dev_attr_avs9.dev_attr.attr, NULL }; ATTRIBUTE_GROUPS(mac_hwmon); @@ -650,11 +839,11 @@ static void mac_bsc_setup(struct i2c_client *client) for (i = 0; i < dev_params->sbus_setup_ops; i++) { ret = bsc_i2c_read(client, dev_params->sbus_setup[i].reg_addr, ®_value); if ((ret < 0) || (reg_value != dev_params->sbus_setup[i].reg_val)) { - WB_MAC_BSC_DEBUG("bsc setup op%d, ret: %d, reg_addr: 0x%x, read value: 0x%x not equal to set value: 0x%x\n", + DEBUG_VERBOSE("bsc setup op%d, ret: %d, reg_addr: 0x%x, read value: 0x%x not equal to set value: 0x%x\n", i, ret, dev_params->sbus_setup[i].reg_addr, reg_value, dev_params->sbus_setup[i].reg_val); bsc_i2c_write(client, dev_params->sbus_setup[i].reg_addr, dev_params->sbus_setup[i].reg_val); } else { - WB_MAC_BSC_DEBUG("bsc setup op%d, reg_addr: 0x%x, read value: 0x%x equal to set value: 0x%x\n", + DEBUG_VERBOSE("bsc setup op%d, reg_addr: 0x%x, read value: 0x%x equal to set value: 0x%x\n", i, dev_params->sbus_setup[i].reg_addr, reg_value, dev_params->sbus_setup[i].reg_val); } } @@ -666,14 +855,14 @@ static int mac_bsc_init(struct i2c_client *client) int ret, mac_id; uint32_t reg_value; - ret = get_mac_reg(client, MAC_ID_REG, ®_value); + ret = get_mac_reg(client, MAC_ID_REG, ®_value, TYPE_VTMON); if (ret < 0) { - WB_MAC_BSC_ERROR("Get MAC ID failed, reg_addr: 0x%x, ret = %d\n", + DEBUG_ERROR("Get MAC ID failed, reg_addr: 0x%x, ret = %d\n", MAC_ID_REG, ret); return ret; } - WB_MAC_BSC_DEBUG("Get MAC ID success, reg_addr: 0x%x, value: 0x%x \n", + DEBUG_VERBOSE("Get MAC ID success, reg_addr: 0x%x, value: 0x%x \n", MAC_ID_REG, reg_value); mac_id = reg_value & 0xffff; return mac_id; @@ -699,10 +888,14 @@ static int mac_bsc_config_check(dev_params_t *dev_params) i2c_op_t *err_op; i2c_op_t *addr_op; + if (dev_params->not_support_vtmon) { + return 0; + } + /* vtmon_instances should not more than the MAC_BSC_MAX_TEMP_NUM */ if ((dev_params->vtmon_instances > MAC_BSC_MAX_TEMP_NUM) || (dev_params->vtmon_instances <= 0)) { - WB_MAC_BSC_ERROR("VTMON instance number %d more than the max number: %d\n", + DEBUG_ERROR("VTMON instance number %d more than the max number: %d\n", dev_params->vtmon_instances, MAC_BSC_MAX_TEMP_NUM); return -1; } @@ -710,7 +903,7 @@ static int mac_bsc_config_check(dev_params_t *dev_params) /* vtmon read operation steps should not more than the MAC_BSC_MAX_READ_REG_STEP */ if ((dev_params->vtmon_read_ops > MAC_BSC_MAX_READ_REG_STEP) || (dev_params->vtmon_read_ops <=0)) { - WB_MAC_BSC_ERROR("VTMON read ops number %d more than the max step: %d\n", + DEBUG_ERROR("VTMON read ops number %d more than the max step: %d\n", dev_params->vtmon_read_ops, MAC_BSC_MAX_READ_REG_STEP); return -1; } @@ -718,7 +911,7 @@ static int mac_bsc_config_check(dev_params_t *dev_params) /* the last operation must be I2C_READ to get temperature register value */ last_op = &dev_params->vtmon_read[dev_params->vtmon_read_ops - 1]; if (last_op->op != I2C_READ) { - WB_MAC_BSC_ERROR("VTMON read ops config error, last operation not I2C_READ, last step: %d, op_code: %d\n", + DEBUG_ERROR("VTMON read ops config error, last operation not I2C_READ, last step: %d, op_code: %d\n", dev_params->vtmon_read_ops - 1, last_op->op); return -1; } @@ -726,7 +919,7 @@ static int mac_bsc_config_check(dev_params_t *dev_params) /* the address operation steps should not more than the vtmon_read_ops and not the last step */ if ((dev_params->sbus_addr_op >= (dev_params->vtmon_read_ops - 1)) || (dev_params->sbus_addr_op < 0)) { - WB_MAC_BSC_ERROR("VTMON addr op step invalid, index %d, read ops: %d\n", + DEBUG_ERROR("VTMON addr op step invalid, index %d, read ops: %d\n", dev_params->sbus_addr_op, dev_params->vtmon_read_ops); return -1; } @@ -734,14 +927,14 @@ static int mac_bsc_config_check(dev_params_t *dev_params) /* the address operation must be I2C_WRITE to set temperature register address */ addr_op = &dev_params->vtmon_read[dev_params->sbus_addr_op]; if (addr_op->op != I2C_WRITE) { - WB_MAC_BSC_ERROR("VTMON addr op config error, addr operation not I2C_WRITE, addr op step: %d, op_code: %d\n", + DEBUG_ERROR("VTMON addr op config error, addr operation not I2C_WRITE, addr op step: %d, op_code: %d\n", dev_params->sbus_addr_op, addr_op->op); return -1; } /* the error status operation steps should not more than the vtmon_read_ops and not the last step */ if (dev_params->sbus_error_op >= (dev_params->vtmon_read_ops - 1)) { - WB_MAC_BSC_ERROR("VTMON error op step invalid, index %d, read ops: %d\n", + DEBUG_ERROR("VTMON error op step invalid, index %d, read ops: %d\n", dev_params->sbus_error_op, dev_params->vtmon_read_ops); return -1; } @@ -750,23 +943,30 @@ static int mac_bsc_config_check(dev_params_t *dev_params) if (dev_params->sbus_error_op >=0) { err_op = &dev_params->vtmon_read[dev_params->sbus_error_op]; if (err_op->op != I2C_READ) { - WB_MAC_BSC_ERROR("VTMON error op config error, error operation not I2C_READ, error op step: %d, op_code: %d\n", + DEBUG_ERROR("VTMON error op config error, error operation not I2C_READ, error op step: %d, op_code: %d\n", dev_params->sbus_error_op, err_op->op); return -1; } } - WB_MAC_BSC_DEBUG("dev_params check ok, instance number: %d, read_ops: %d, addr_op: %d, error_op: %d\n", + DEBUG_VERBOSE("dev_params check ok, instance number: %d, read_ops: %d, addr_op: %d, error_op: %d\n", dev_params->vtmon_instances, dev_params->vtmon_read_ops, dev_params->sbus_addr_op, dev_params->sbus_error_op); return 0; } +#if LINUX_VERSION_CODE < KERNEL_VERSION(6,0,0) static int mac_probe(struct i2c_client *client, const struct i2c_device_id *id) +#else +static int mac_probe(struct i2c_client *client) +#endif { +#if LINUX_VERSION_CODE >= KERNEL_VERSION(6,0,0) + const struct i2c_device_id *id = i2c_client_get_device_id(client); +#endif struct mac_data *data; int ret, mac_id, index; - WB_MAC_BSC_DEBUG("=========mac_probe(%d-%04x)===========\n", + DEBUG_VERBOSE("=========mac_probe(%d-%04x)===========\n", client->adapter->nr, client->addr); if (!client->adapter->algo->master_xfer) { @@ -820,7 +1020,7 @@ static int mac_probe(struct i2c_client *client, const struct i2c_device_id *id) } } - WB_MAC_BSC_DEBUG("mac_id: 0x%x, config index: %d\n", mac_id, index); + DEBUG_VERBOSE("mac_id: 0x%x, config index: %d\n", mac_id, index); mutex_init(&data->update_lock); data->hwmon_dev = hwmon_device_register_with_groups(&client->dev, client->name, data, mac_hwmon_groups); @@ -834,12 +1034,19 @@ static int mac_probe(struct i2c_client *client, const struct i2c_device_id *id) return 0; } +#if LINUX_VERSION_CODE < KERNEL_VERSION(6,0,0) +static int mac_remove(struct i2c_client *client) +#else static void mac_remove(struct i2c_client *client) +#endif { struct mac_data *data = i2c_get_clientdata(client); hwmon_device_unregister(data->hwmon_dev); - return; + +#if LINUX_VERSION_CODE < KERNEL_VERSION(6,0,0) + return 0; +#endif } static const struct i2c_device_id mac_id_table[] = { @@ -848,6 +1055,8 @@ static const struct i2c_device_id mac_id_table[] = { { "wb_mac_bsc_td4", TD4 }, { "wb_mac_bsc_th3", TH3 }, { "wb_mac_bsc_th4", TH4 }, + { "wb_mac_bsc_th5", TH5 }, + { "wb_mac_bsc_th6", TH6 }, {} }; MODULE_DEVICE_TABLE(i2c, mac_id_table); diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_mdio_dev.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_mdio_dev.c new file mode 100644 index 00000000000..de455b7a890 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_mdio_dev.c @@ -0,0 +1,600 @@ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "wb_mdio_dev.h" + +static int debug = 0; +module_param(debug, int, S_IRUGO | S_IWUSR); + +static int phy_read_ext(mdio_dev_info_t *phy, u32 reg_addr) +{ + int ret; + + ret = mdiobus_write(phy->bus, phy->addr, PHY_EXTERN_ADDR_REG, reg_addr); + if (ret < 0) + { + return ret; + } + + return mdiobus_read(phy->bus, phy->addr, PHY_EXTERN_DATA_REG); +} + +static int phy_write_ext(mdio_dev_info_t *phy, u32 reg_addr, u16 val) +{ + int ret; + + ret = mdiobus_write(phy->bus, phy->addr, PHY_EXTERN_ADDR_REG, reg_addr); + if (ret < 0) + { + return ret; + } + + return mdiobus_write(phy->bus, phy->addr, PHY_EXTERN_DATA_REG, val); +} + +static int phy_dev_read(mdio_dev_info_t *phy, u32 reg_addr) +{ + if (reg_addr > PHY_EXTERN_DATA_REG) { + return phy_read_ext(phy, reg_addr); + } + + return mdiobus_read(phy->bus, phy->addr, reg_addr); +} + +static int phy_dev_write(mdio_dev_info_t *phy, u32 reg_addr, u16 val) +{ + if (reg_addr > PHY_EXTERN_DATA_REG) { + return phy_write_ext(phy, reg_addr, val); + } + + return mdiobus_write(phy->bus, phy->addr, reg_addr, val); +} + +static bool ends_with_suffix(const char *str, const char *suffix) { + size_t str_len = strlen(str); + size_t suffix_len = strlen(suffix); + + if (str_len < suffix_len) { + return false; + } + + return strncmp(str + str_len - suffix_len, suffix, suffix_len) == 0; +} + +static int of_mdio_dev_config_init(mdio_dev_info_t *mdio_dev) +{ + struct device *dev; + int num_regs, i, ret = 0; + dev = mdio_dev->dev; + + ret += of_property_read_string(dev->of_node, "mdio_name", &mdio_dev->name); + ret += of_property_read_string(dev->of_node, "mdio_bus_name", &mdio_dev->mdio_bus_name); + ret += of_property_read_u32(dev->of_node, "addr", &mdio_dev->addr); + if (ret != 0) { + DEBUG_ERROR("Missing required properties\n"); + return -EINVAL; + } + + if (of_property_read_string(dev->of_node, "dev_alias", &mdio_dev->alias)) { + mdio_dev->alias = mdio_dev->name; + } + + num_regs = of_property_count_elems_of_size(dev->of_node, "phy_init_regs", sizeof(u32)); + if (num_regs < 0) { + mdio_dev->phy_need_init = 0; + dev_info(dev, "Not need init.\n"); + return 0; + } + if (num_regs == 0 || num_regs > PHY_REG_INIT_INFO_MAX) { + dev_err(dev, "Invalid reg count %d\n", num_regs); + return -EINVAL; + } + + mdio_dev->phy_need_init = 1; + mdio_dev->reg_init_num = 0; + for (i = 0; i < num_regs; i++) { + ret = of_property_read_u32_index(dev->of_node, "phy_init_regs", i, + &mdio_dev->phy_reg_init[i].phy_reg); + ret += of_property_read_u32_index(dev->of_node, "init_values", i, + &mdio_dev->phy_reg_init[i].init_value); + if (ret) { + dev_err(dev, "Failed to get config%d ret=%d.\n", i, ret); + return ret; + } + + mdio_dev->phy_reg_init[i].mask = 0xffff; + of_property_read_u32_index(dev->of_node, "masks", i, + &mdio_dev->phy_reg_init[i].mask); + + mdio_dev->phy_reg_init[i].delay = 0; + of_property_read_u32_index(dev->of_node, "delays", i, + &mdio_dev->phy_reg_init[i].delay); + + mdio_dev->reg_init_num++; + } + + return 0; +} + +static int mdio_dev_config_init(mdio_dev_info_t *mdio_dev) +{ + mdio_dev_device_t *mdio_dev_device; + + if (mdio_dev->dev->platform_data == NULL) { + dev_err(mdio_dev->dev, "Failed to get platform data config.\n"); + return -ENXIO; + } + mdio_dev_device = mdio_dev->dev->platform_data; + mdio_dev->name = mdio_dev_device->dev_name; + mdio_dev->alias = mdio_dev_device->dev_name; + mdio_dev->mdio_bus_name = mdio_dev_device->mdio_bus_name; + mdio_dev->addr = mdio_dev_device->addr; + mdio_dev->phy_need_init = 0; + + return 0; +} + +static int mdio_phy_reg_init(mdio_dev_info_t *mdio_dev) +{ + int ret, i; + int value; + + if (!mdio_dev->phy_need_init) { + dev_info(mdio_dev->dev, "Not need init, do nothing\n"); + return 0; + } + + for (i = 0; i < mdio_dev->reg_init_num; i++) { + /* read origin register value */ + DEBUG_VERBOSE("mdio_phy_reg_init: phy_reg:0x%x, init_value:0x%x, mask:0x%x", + mdio_dev->phy_reg_init[i].phy_reg, mdio_dev->phy_reg_init[i].init_value, mdio_dev->phy_reg_init[i].mask); + + if (mdio_dev->phy_reg_init[i].delay != 0) { + usleep_range(mdio_dev->phy_reg_init[i].delay, mdio_dev->phy_reg_init[i].delay + 1); + } + + value = phy_dev_read(mdio_dev, mdio_dev->phy_reg_init[i].phy_reg); + if (value < 0) { + DEBUG_ERROR("read phy addr: 0x%x failed, ret: %d\n", mdio_dev->phy_reg_init[i].phy_reg, value); + return -EIO; + } + DEBUG_VERBOSE("read phy addr 0x%x success, value: 0x%x\n", mdio_dev->phy_reg_init[i].phy_reg, value); + DEBUG_VERBOSE("write to phy raw value: 0x%x\n", mdio_dev->phy_reg_init[i].init_value); + value &= ~(mdio_dev->phy_reg_init[i].mask); + value |= mdio_dev->phy_reg_init[i].init_value; + + ret = phy_dev_write(mdio_dev, mdio_dev->phy_reg_init[i].phy_reg, value); + if (ret < 0) { + dev_err(mdio_dev->dev, "write phy addr: 0x%x failed, ret: %d\n", mdio_dev->phy_reg_init[i].phy_reg, ret); + return -EIO; + } + dev_info(mdio_dev->dev, "write phy addr 0x%x success, value: 0x%x\n", mdio_dev->phy_reg_init[i].phy_reg, value); + } + return 0; +} + +static ssize_t alias_show(struct kobject *kobj, struct kobj_attribute *attr, char *buf) +{ + mdio_dev_info_t *mdio_dev = container_of(kobj, mdio_dev_info_t, kobj); + + if (!mdio_dev) { + DEBUG_ERROR("alias show mdio dev is null.\n"); + return -ENODEV; + } + return snprintf(buf, PAGE_SIZE, "%s\n", mdio_dev->alias); +} + +static int phy_id_read(mdio_dev_info_t *mdio_dev, uint32_t *phy_id) +{ + int id1, id2; + + id1 = phy_dev_read(mdio_dev, MII_PHYSID1); + id2 = phy_dev_read(mdio_dev, MII_PHYSID2); + if (id1 < 0 || id2 < 0) { + DEBUG_ERROR("phy_id read fail, ret1:%d, ret2:%d.\n",id1, id2); + return -EIO; + } + + *phy_id = ((id1 << 16) | id2); + if (*phy_id == 0 || *phy_id == 0xffffffff) { + DEBUG_ERROR("illegal phy_id :0x%x.\n", *phy_id); + return -EINVAL; + } + + return 0; +} + +static ssize_t phy_id_show(struct kobject *kobj, struct kobj_attribute *attr, char *buf) +{ + mdio_dev_info_t *mdio_dev = container_of(kobj, mdio_dev_info_t, kobj); + int ret; + uint32_t phy_id; + + if (!mdio_dev) { + DEBUG_ERROR("phy_id show mdio dev is null.\n"); + return -ENODEV; + } + + mutex_lock(&mdio_dev->lock); + ret = phy_id_read(mdio_dev, &phy_id); + mutex_unlock(&mdio_dev->lock); + if (ret < 0) { + DEBUG_ERROR("phy_id read fail, ret:%d.\n", ret); + return ret; + } + + return snprintf(buf, PAGE_SIZE, "0x%x\n", phy_id); +} + +static ssize_t phy_type_show(struct kobject *kobj, struct kobj_attribute *attr, char *buf) +{ + mdio_dev_info_t *mdio_dev = container_of(kobj, mdio_dev_info_t, kobj); + int ret, phy_id, i; + + if (!mdio_dev) { + DEBUG_ERROR("phy_type show mdio dev is null.\n"); + return -ENODEV; + } + + mutex_lock(&mdio_dev->lock); + ret = phy_id_read(mdio_dev, &phy_id); + mutex_unlock(&mdio_dev->lock); + if (ret < 0) { + DEBUG_ERROR("phy_id read fail, ret:%d.\n", ret); + return ret; + } + + for (i = 0; i < ARRAY_SIZE(phy_type_infos); i++) { + if (phy_type_infos[i].phy_id == phy_id) { + return snprintf(buf, PAGE_SIZE, "%s\n", phy_type_infos[i].phy_type); + } + } + + return snprintf(buf, PAGE_SIZE, "%s\n", UNKNOWN_PHY_TYPE); +} + +static int phy_status_read(mdio_dev_info_t *mdio_dev) +{ + int ret, i; + + /* link status need read twice */ + for (i = 0; i < 2; i++) { + ret = phy_dev_read(mdio_dev, MII_BMSR); + if (ret < 0) { + DEBUG_ERROR("link_status read fail, ret:%d.\n", ret); + return -EIO; + } + } + DEBUG_VERBOSE("link_status read success, ret:0x%x.\n", ret); + return ret; +} + +static ssize_t phy_link_status_show(struct kobject *kobj, struct kobj_attribute *attr, char *buf) +{ + mdio_dev_info_t *mdio_dev = container_of(kobj, mdio_dev_info_t, kobj); + int phy_status; + + if (!mdio_dev) { + DEBUG_ERROR("phy_link_status show mdio dev is null.\n"); + return -ENODEV; + } + + mutex_lock(&mdio_dev->lock); + phy_status = phy_status_read(mdio_dev); + mutex_unlock(&mdio_dev->lock); + if (phy_status < 0) { + DEBUG_ERROR("phy_status read fail, ret:%d.\n", phy_status); + return -EIO; + } + + if (phy_status & BMSR_LSTATUS) { + return snprintf(buf, PAGE_SIZE, "%d\n", PHY_LINK_STS_UP); + } + return snprintf(buf, PAGE_SIZE, "%d\n", PHY_LINK_STS_DOWN); +} + +static ssize_t phy_reset_show(struct kobject *kobj, struct kobj_attribute *attr, char *buf) +{ + mdio_dev_info_t *mdio_dev = container_of(kobj, mdio_dev_info_t, kobj); + int phy_control; + + if (!mdio_dev) { + DEBUG_ERROR("phy_control show mdio dev is null.\n"); + return -ENODEV; + } + + mutex_lock(&mdio_dev->lock); + phy_control = phy_dev_read(mdio_dev, MII_BMCR); + mutex_unlock(&mdio_dev->lock); + if (phy_control < 0) { + DEBUG_ERROR("phy_control read fail, ret:%d.\n", phy_control); + return -EIO; + } + + if (phy_control & PHY_RESET_BIT) { + return snprintf(buf, PAGE_SIZE, "%d\n", PHY_RESET_ENABLE); + } + return snprintf(buf, PAGE_SIZE, "%d\n", PHY_RESET_DISABLE); +} + +static ssize_t phy_reset_store(struct kobject *kobj, struct kobj_attribute *attr, const char *buf, size_t count) +{ + mdio_dev_info_t *mdio_dev = container_of(kobj, mdio_dev_info_t, kobj); + u8 val; + int ret, phy_control; + u16 wr_val = 0; + + if (!mdio_dev) { + DEBUG_ERROR("phy_reset_store mdio dev is null.\n"); + return -ENODEV; + } + + val = 0; + ret = kstrtou8(buf, 0, &val); + if (ret) { + DEBUG_ERROR("Invaild input value [%s], errno: %d\n", buf, ret); + return -EINVAL; + } + + if ((val != PHY_RESET_ENABLE) && (val != PHY_RESET_DISABLE)) { + DEBUG_ERROR("input value [%d] not equal 0 or 1\n", val); + return -EINVAL; + } + + mutex_lock(&mdio_dev->lock); + phy_control = phy_dev_read(mdio_dev, MII_BMCR); + if (phy_control < 0) { + DEBUG_ERROR("phy_control read fail, ret:%d.\n", phy_control); + mutex_unlock(&mdio_dev->lock); + return -EIO; + } + + if (val == PHY_RESET_ENABLE) { + wr_val = phy_control | PHY_RESET_BIT; + } else { + wr_val = phy_control & ~PHY_RESET_BIT; + } + + ret = phy_dev_write(mdio_dev, MII_BMCR, wr_val); + mutex_unlock(&mdio_dev->lock); + if (ret < 0) { + DEBUG_ERROR("phy_reset failed, wr_val:0x%x, ret: %d\n", wr_val, ret); + return -EIO; + } + DEBUG_VERBOSE("phy_reset success, wr_val:0x%x\n", wr_val); + return count; +} + +static ssize_t phy_reg_dump(struct kobject *kobj, struct kobj_attribute *attr, char *buf) +{ + mdio_dev_info_t *mdio_dev = container_of(kobj, mdio_dev_info_t, kobj); + int i, offset = 0; + int rd_val; + + if (!mdio_dev) { + DEBUG_ERROR("phy_reg_dump mdio dev is null.\n"); + return -ENODEV; + } + + mutex_lock(&mdio_dev->lock); + for (i = 0; i < ARRAY_SIZE(phy_reg_infos); i++) { + rd_val = phy_dev_read(mdio_dev, phy_reg_infos[i].reg_addr); + if (rd_val < 0) { + offset += scnprintf(buf + offset, PAGE_SIZE - offset, "(0x%02x)%-20s: fail(%d)\n", phy_reg_infos[i].reg_addr, phy_reg_infos[i].reg_name, rd_val); + } else { + offset += scnprintf(buf + offset, PAGE_SIZE - offset, "(0x%02x)%-20s: 0x%04x\n", phy_reg_infos[i].reg_addr, phy_reg_infos[i].reg_name, rd_val); + } + } + mutex_unlock(&mdio_dev->lock); + return offset; +} + +static ssize_t mdio_status_show(struct kobject *kobj, struct kobj_attribute *attr, char *buf) +{ + mdio_dev_info_t *mdio_dev = container_of(kobj, mdio_dev_info_t, kobj); + int ret, i, mdio_status; + uint32_t phy_id; + + if (!mdio_dev) { + DEBUG_ERROR("mdio_status show mdio dev is null.\n"); + return -ENODEV; + } + + mutex_lock(&mdio_dev->lock); + for (i = 0; i < MAX_RETRY; i++) { + ret = phy_id_read(mdio_dev, &phy_id); + if (ret < 0) { + mdio_status = MDIO_STATUS_NOT_OK; + DEBUG_ERROR("phy_id read fail, ret:%d.\n", ret); + } else { + mdio_status = MDIO_STATUS_OK; + break; + } + } + mutex_unlock(&mdio_dev->lock); + return snprintf(buf, PAGE_SIZE, "%d\n", mdio_status); +} + +static struct kobj_attribute alias_attribute = __ATTR(alias, S_IRUGO, alias_show, NULL); +static struct kobj_attribute phy_id_attribute = __ATTR(phy_id, S_IRUGO, phy_id_show, NULL); +static struct kobj_attribute phy_type_attribute = __ATTR(phy_type, S_IRUGO, phy_type_show, NULL); +static struct kobj_attribute link_status_attribute = __ATTR(link_status, S_IRUGO, phy_link_status_show, NULL); +static struct kobj_attribute reset_attribute = __ATTR(reset, S_IRUGO | S_IWUSR, phy_reset_show, phy_reset_store); +static struct kobj_attribute phy_reg_dump_attribute = __ATTR(phy_reg_dump, S_IRUGO, phy_reg_dump, NULL); +static struct kobj_attribute mdio_status_attribute = __ATTR(mdio_status, S_IRUGO, mdio_status_show, NULL); + +static struct attribute *mdio_dev_attrs[] = { + &alias_attribute.attr, + &phy_id_attribute.attr, + &link_status_attribute.attr, + &reset_attribute.attr, + &phy_reg_dump_attribute.attr, + &phy_type_attribute.attr, + &mdio_status_attribute.attr, + NULL, +}; + +static struct attribute_group mdio_dev_attr_group = { + .attrs = mdio_dev_attrs, +}; + +static ssize_t mdio_dev_attr_show(struct kobject *kobj, struct attribute *attr, char *buf) +{ + struct kobj_attribute *attribute; + + attribute = container_of(attr, struct kobj_attribute, attr); + + if (!attribute->show) { + DEBUG_ERROR("mdio dev attr show is null.\n"); + return -ENOSYS; + } + + return attribute->show(kobj, attribute, buf); +} + +static ssize_t mdio_dev_attr_store(struct kobject *kobj, struct attribute *attr, const char *buf, + size_t len) +{ + struct kobj_attribute *attribute; + + attribute = container_of(attr, struct kobj_attribute, attr); + + if (!attribute->store) { + DEBUG_ERROR("mdio dev attr store is null.\n"); + return -ENOSYS; + } + + return attribute->store(kobj, attribute, buf, len); +} + +static const struct sysfs_ops mdio_dev_sysfs_ops = { + .show = mdio_dev_attr_show, + .store = mdio_dev_attr_store, +}; + +static void mdio_dev_obj_release(struct kobject *kobj) +{ + return; +} + +static struct kobj_type mdio_dev_ktype = { + .sysfs_ops = &mdio_dev_sysfs_ops, + .release = mdio_dev_obj_release, +#if LINUX_VERSION_CODE < KERNEL_VERSION(6,0,0) + .default_attrs = NULL, +#endif +}; + +static int mdio_dev_probe(struct platform_device *pdev) +{ + mdio_dev_info_t *mdio_dev; + int ret; + + mdio_dev = devm_kzalloc(&pdev->dev, sizeof(mdio_dev_info_t), GFP_KERNEL); + if (!mdio_dev) { + dev_err(&pdev->dev, "mdio_dev memory allocation failed\n"); + return -ENOMEM; + } + mdio_dev->dev = &pdev->dev; + mutex_init(&mdio_dev->lock); + + if (pdev->dev.of_node) { + ret = of_mdio_dev_config_init(mdio_dev); + } else { + ret = mdio_dev_config_init(mdio_dev); + } + if (ret) { + dev_err(&pdev->dev, "mdio_dev_config_init fail, ret: %d\n", ret); + return -EINVAL; + } + + if (!ends_with_suffix(mdio_dev->name, MDIO_NAME_SUFFIX)) { + dev_err(&pdev->dev, "mdio_name:%s config err, not end with phy:%s.\n", mdio_dev->name, MDIO_NAME_SUFFIX); + return -EINVAL; + } + + mdio_dev->bus = mdio_find_bus(mdio_dev->mdio_bus_name); + if (!mdio_dev->bus) { + dev_err(&pdev->dev, "find mdio bus name: %s fail.\n", mdio_dev->mdio_bus_name); + return -ENOMEM; + } + + ret = mdio_phy_reg_init(mdio_dev); + if (ret < 0) { + dev_err(&pdev->dev, "mdio_phy_reg_init fail, ret: %d\n", ret); + return ret; + } + + /* creat parent dir by dev name in /sys/logic_dev */ + ret = kobject_init_and_add(&mdio_dev->kobj, &mdio_dev_ktype, logic_dev_kobj, "%s", mdio_dev->name); + if (ret) { + kobject_put(&mdio_dev->kobj); + dev_err(&pdev->dev, "Failed to creat parent dir: %s, ret: %d\n", mdio_dev->name, ret); + return ret; + } + + mdio_dev->sysfs_group = &mdio_dev_attr_group; + ret = sysfs_create_group(&mdio_dev->kobj, mdio_dev->sysfs_group); + if (ret) { + dev_err(&pdev->dev, "Failed to create %s sysfs group, ret: %d\n", mdio_dev->name, ret); + goto remove_parent_kobj; + } + platform_set_drvdata(pdev, mdio_dev); + + dev_info(&pdev->dev, "registered %s with mdio bus: %s, phy address: 0x%x success\n", + mdio_dev->name, mdio_dev->mdio_bus_name, mdio_dev->addr); + return 0; +remove_parent_kobj: + kobject_put(&mdio_dev->kobj); + return ret; +} + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(6,11,0) +static void mdio_dev_remove(struct platform_device *pdev) +#else +static int mdio_dev_remove(struct platform_device *pdev) +#endif +{ + mdio_dev_info_t *mdio_dev; + mdio_dev = platform_get_drvdata(pdev); + + if (mdio_dev->sysfs_group) { + dev_dbg(&pdev->dev, "Unregister %s mdio_dev sysfs group\n", mdio_dev->name); + sysfs_remove_group(&mdio_dev->kobj, (const struct attribute_group *)mdio_dev->sysfs_group); + kobject_put(&mdio_dev->kobj); + mdio_dev->sysfs_group = NULL; + } + +#if LINUX_VERSION_CODE < KERNEL_VERSION(6,11,0) + return 0; +#endif +} + +static const struct of_device_id mdio_dev_of_match[] = { + { .compatible = MDIO_DEV_COMPATIBLE_NAME }, + {} +}; + +static struct platform_driver mdio_dev_driver = { + .probe = mdio_dev_probe, + .remove = mdio_dev_remove, + .driver = { + .name = "wb_mdio_dev", + .owner = THIS_MODULE, + .of_match_table = mdio_dev_of_match, + }, +}; + +module_platform_driver(mdio_dev_driver); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("support"); +MODULE_DESCRIPTION("MDIO Device Driver"); diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_mdio_dev.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_mdio_dev.h new file mode 100644 index 00000000000..47ee65e028e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_mdio_dev.h @@ -0,0 +1,97 @@ +#ifndef __WB_MDIO_DEV_H__ +#define __WB_MDIO_DEV_H__ +#include +#include +#include + +#define MDIO_DEV_COMPATIBLE_NAME "wb_mdio_dev" + +#define PHY_REG_INIT_INFO_MAX (16) +#define NAME_LEN (32) +#define MAX_RETRY (3) +#define PHY_EXTERN_ADDR_REG (0x1e) +#define PHY_EXTERN_DATA_REG (0x1f) + +#define PHY_LINK_STS_UP (1) +#define PHY_LINK_STS_DOWN (0) +#define PHY_RESET_BIT BIT(15) +#define PHY_RESET_ENABLE (1) +#define PHY_RESET_DISABLE (0) +#define MDIO_STATUS_OK (0) +#define MDIO_STATUS_NOT_OK (1) +#define UNKNOWN_PHY_TYPE "NA" +#define MDIO_NAME_SUFFIX "_phy" + +typedef struct { + const char phy_type[NAME_LEN]; + uint32_t phy_id; +} phy_type_info_t; + +phy_type_info_t phy_type_infos[] = { + {.phy_type = "BCM53134O_GPHY", .phy_id = 0xae025350}, + {.phy_type = "B50210S", .phy_id = 0x600d8595}, + {.phy_type = "YT8010", .phy_id = 0x00000309}, + {.phy_type = "YT8010AS", .phy_id = 0x4f51eb19}, + {.phy_type = "YT8510", .phy_id = 0x00000109}, + {.phy_type = "YT8511", .phy_id = 0x0000010a}, + {.phy_type = "YT8512", .phy_id = 0x00000118}, + {.phy_type = "YT8512B", .phy_id = 0x00000128}, + {.phy_type = "YT8521", .phy_id = 0x0000011a}, + {.phy_type = "YT8531S", .phy_id = 0x4f51e91a}, + {.phy_type = "YT8531", .phy_id = 0x4f51e91b}, + {.phy_type = "YT8614", .phy_id = 0x4F51E899}, + {.phy_type = "YT8618", .phy_id = 0x0000e889}, + {.phy_type = "YT8821", .phy_id = 0x4f51ea10}, + {.phy_type = "BCM53134O_SGMII", .phy_id = 0x143bff0}, +}; + +typedef struct { + const char reg_name[NAME_LEN]; + uint32_t reg_addr; +} phy_reg_info_t; + +phy_reg_info_t phy_reg_infos[] = { + {.reg_name = "CONTROL", .reg_addr = MII_BMCR}, + {.reg_name = "STATUS", .reg_addr = MII_BMSR}, + {.reg_name = "PHYS_ID1", .reg_addr = MII_PHYSID1}, + {.reg_name = "PHYS_ID2", .reg_addr = MII_PHYSID2}, + {.reg_name = "ADVERTISEMENT", .reg_addr = MII_ADVERTISE}, + {.reg_name = "LPA", .reg_addr = MII_LPA}, + {.reg_name = "EXPANSION", .reg_addr = MII_EXPANSION}, + {.reg_name = "CTRL1000", .reg_addr = MII_CTRL1000}, + {.reg_name = "STAT1000", .reg_addr = MII_STAT1000}, + {.reg_name = "MMD_CTRL", .reg_addr = MII_MMD_CTRL}, + {.reg_name = "MMD_DATA", .reg_addr = MII_MMD_DATA}, +}; + +typedef struct { + uint32_t phy_reg; + uint32_t init_value; + uint32_t mask; + uint32_t delay; +} phy_reg_init_info_t; + +typedef struct mdio_dev_info { + const char *name; + const char *alias; + const char *mdio_bus_name; + struct attribute_group *sysfs_group; + uint32_t addr; + struct mii_bus *bus; + phy_reg_init_info_t phy_reg_init[PHY_REG_INIT_INFO_MAX]; + int phy_need_init; + uint32_t reg_init_num; + struct device *dev; + struct kobject kobj; + struct mutex lock; +} mdio_dev_info_t; + +typedef struct mdio_dev_device_s { + const char *dev_name; + const char *alias; + const char *mdio_bus_name; + uint32_t addr; + int device_flag; +} mdio_dev_device_t; + +#endif /* __WB_MDIO_DEV_H__ */ diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_pcie_dev.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_pcie_dev.c index 83904d7960e..803d438bb9e 100644 --- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_pcie_dev.c +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_pcie_dev.c @@ -24,12 +24,14 @@ #include #include #include +#include #include #include #include #include #include #include +#include #include "wb_pcie_dev.h" @@ -865,7 +867,11 @@ static int pci_dev_probe(struct platform_device *pdev) return ret; } +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 11, 0) static int pci_dev_remove(struct platform_device *pdev) +#else +static void pci_dev_remove(struct platform_device *pdev) +#endif { int i; @@ -878,8 +884,9 @@ static int pci_dev_remove(struct platform_device *pdev) pcie_dev_arry[i] = NULL; } } - +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 11, 0) return 0; +#endif } static struct of_device_id pci_dev_match[] = { diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_platform_i2c_dev.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_platform_i2c_dev.c index 678a48483bd..5242b0be4b1 100644 --- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_platform_i2c_dev.c +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_platform_i2c_dev.c @@ -29,6 +29,7 @@ #include #include #include +#include #include "wb_platform_i2c_dev.h" @@ -721,7 +722,11 @@ static int platform_i2c_dev_probe(struct platform_device *pdev) return 0; } +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 11, 0) static int platform_i2c_dev_remove(struct platform_device *pdev) +#else +static void platform_i2c_dev_remove(struct platform_device *pdev) +#endif { int i; @@ -731,8 +736,9 @@ static int platform_i2c_dev_remove(struct platform_device *pdev) i2c_dev_arry[i] = NULL; } } - +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 11, 0) return 0; +#endif } static const struct of_device_id platform_i2c_dev_of_match[] = { diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_pmbus.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_pmbus.h new file mode 100644 index 00000000000..7f4a037b78a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_pmbus.h @@ -0,0 +1,626 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * wb_pmbus.h - Common defines and structures for PMBus devices + * + * Copyright (c) 2010, 2011 Ericsson AB. + * Copyright (c) 2012 Guenter Roeck + */ + +#ifndef WB_PMBUS_H +#define WB_PMBUS_H + +#include +#include +#include +#include + +#define mem_clear(data, size) memset((data), 0, (size)) +#define PMBUS_SYSFS_RV_UNSUPPORT (999) +#define PMBUS_READ_FAIL "ACCESS FAILED" +#define PMBUS_READ_NO_SUPPORT "NA" +#define MAX_UNIT_LEN (16) +#define DEV_NAME_LEN (64) +#define MAX_RW_LEN (256) +#define PMBUS_SENSOR_COEFFICIENT (1000LL) /* Keep three decimal places */ + +typedef enum { + BLOCK_DATA = 0, + BYTE_DATA = 1, + WORD_DATA = 2, + WIDTH_4BYTE = 4, +} pmbus_data_width_t; + +typedef enum { + RAWDATA_BYTE = 0, + RAWDATA_WORD, + RAWDATA_BUF, + STRING_DATA, + SENSOR_DATA, + LE_DATA, /* Little Endian Data */ + BE_DATA, /* Big Endian Data */ +} pmbus_data_type_t; + +typedef struct { + char pmbus_name[DEV_NAME_LEN]; + uint32_t page_mask; + int pmbus_reg; + pmbus_data_width_t width; + pmbus_data_type_t data_type; + char unit[MAX_UNIT_LEN]; + int pmbus_page; + int reg_val; +} pmbus_info_t; + +/* + * Registers + */ +enum pmbus_regs { + PMBUS_PAGE = 0x00, + PMBUS_OPERATION = 0x01, + PMBUS_ON_OFF_CONFIG = 0x02, + PMBUS_CLEAR_FAULTS = 0x03, + PMBUS_PHASE = 0x04, + + PMBUS_WRITE_PROTECT = 0x10, + + PMBUS_CAPABILITY = 0x19, + PMBUS_QUERY = 0x1A, + + PMBUS_VOUT_MODE = 0x20, + PMBUS_VOUT_COMMAND = 0x21, + PMBUS_VOUT_TRIM = 0x22, + PMBUS_VOUT_CAL_OFFSET = 0x23, + PMBUS_VOUT_MAX = 0x24, + PMBUS_VOUT_MARGIN_HIGH = 0x25, + PMBUS_VOUT_MARGIN_LOW = 0x26, + PMBUS_VOUT_TRANSITION_RATE = 0x27, + PMBUS_VOUT_DROOP = 0x28, + PMBUS_VOUT_SCALE_LOOP = 0x29, + PMBUS_VOUT_SCALE_MONITOR = 0x2A, + + PMBUS_COEFFICIENTS = 0x30, + PMBUS_POUT_MAX = 0x31, + + PMBUS_FAN_CONFIG_12 = 0x3A, + PMBUS_FAN_COMMAND_1 = 0x3B, + PMBUS_FAN_COMMAND_2 = 0x3C, + PMBUS_FAN_CONFIG_34 = 0x3D, + PMBUS_FAN_COMMAND_3 = 0x3E, + PMBUS_FAN_COMMAND_4 = 0x3F, + + PMBUS_VOUT_OV_FAULT_LIMIT = 0x40, + PMBUS_VOUT_OV_FAULT_RESPONSE = 0x41, + PMBUS_VOUT_OV_WARN_LIMIT = 0x42, + PMBUS_VOUT_UV_WARN_LIMIT = 0x43, + PMBUS_VOUT_UV_FAULT_LIMIT = 0x44, + PMBUS_VOUT_UV_FAULT_RESPONSE = 0x45, + PMBUS_IOUT_OC_FAULT_LIMIT = 0x46, + PMBUS_IOUT_OC_FAULT_RESPONSE = 0x47, + PMBUS_IOUT_OC_LV_FAULT_LIMIT = 0x48, + PMBUS_IOUT_OC_LV_FAULT_RESPONSE = 0x49, + PMBUS_IOUT_OC_WARN_LIMIT = 0x4A, + PMBUS_IOUT_UC_FAULT_LIMIT = 0x4B, + PMBUS_IOUT_UC_FAULT_RESPONSE = 0x4C, + + PMBUS_OT_FAULT_LIMIT = 0x4F, + PMBUS_OT_FAULT_RESPONSE = 0x50, + PMBUS_OT_WARN_LIMIT = 0x51, + PMBUS_UT_WARN_LIMIT = 0x52, + PMBUS_UT_FAULT_LIMIT = 0x53, + PMBUS_UT_FAULT_RESPONSE = 0x54, + PMBUS_VIN_OV_FAULT_LIMIT = 0x55, + PMBUS_VIN_OV_FAULT_RESPONSE = 0x56, + PMBUS_VIN_OV_WARN_LIMIT = 0x57, + PMBUS_VIN_UV_WARN_LIMIT = 0x58, + PMBUS_VIN_UV_FAULT_LIMIT = 0x59, + + PMBUS_IIN_OC_FAULT_LIMIT = 0x5B, + PMBUS_IIN_OC_WARN_LIMIT = 0x5D, + + PMBUS_POUT_OP_FAULT_LIMIT = 0x68, + PMBUS_POUT_OP_WARN_LIMIT = 0x6A, + PMBUS_PIN_OP_WARN_LIMIT = 0x6B, + + PMBUS_STATUS_BYTE = 0x78, + PMBUS_STATUS_WORD = 0x79, + PMBUS_STATUS_VOUT = 0x7A, + PMBUS_STATUS_IOUT = 0x7B, + PMBUS_STATUS_INPUT = 0x7C, + PMBUS_STATUS_TEMPERATURE = 0x7D, + PMBUS_STATUS_CML = 0x7E, + PMBUS_STATUS_OTHER = 0x7F, + PMBUS_STATUS_MFR_SPECIFIC = 0x80, + PMBUS_STATUS_FAN_12 = 0x81, + PMBUS_STATUS_FAN_34 = 0x82, + + PMBUS_READ_VIN = 0x88, + PMBUS_READ_IIN = 0x89, + PMBUS_READ_VCAP = 0x8A, + PMBUS_READ_VOUT = 0x8B, + PMBUS_READ_IOUT = 0x8C, + PMBUS_READ_TEMPERATURE_1 = 0x8D, + PMBUS_READ_TEMPERATURE_2 = 0x8E, + PMBUS_READ_TEMPERATURE_3 = 0x8F, + PMBUS_READ_FAN_SPEED_1 = 0x90, + PMBUS_READ_FAN_SPEED_2 = 0x91, + PMBUS_READ_FAN_SPEED_3 = 0x92, + PMBUS_READ_FAN_SPEED_4 = 0x93, + PMBUS_READ_DUTY_CYCLE = 0x94, + PMBUS_READ_FREQUENCY = 0x95, + PMBUS_READ_POUT = 0x96, + PMBUS_READ_PIN = 0x97, + + PMBUS_REVISION = 0x98, + PMBUS_MFR_ID = 0x99, + PMBUS_MFR_MODEL = 0x9A, + PMBUS_MFR_REVISION = 0x9B, + PMBUS_MFR_LOCATION = 0x9C, + PMBUS_MFR_DATE = 0x9D, + PMBUS_MFR_SERIAL = 0x9E, + + PMBUS_MFR_VIN_MIN = 0xA0, + PMBUS_MFR_VIN_MAX = 0xA1, + PMBUS_MFR_IIN_MAX = 0xA2, + PMBUS_MFR_PIN_MAX = 0xA3, + PMBUS_MFR_VOUT_MIN = 0xA4, + PMBUS_MFR_VOUT_MAX = 0xA5, + PMBUS_MFR_IOUT_MAX = 0xA6, + PMBUS_MFR_POUT_MAX = 0xA7, + + PMBUS_IC_DEVICE_ID = 0xAD, + PMBUS_IC_DEVICE_REV = 0xAE, + + PMBUS_MFR_MAX_TEMP_1 = 0xC0, + PMBUS_MFR_MAX_TEMP_2 = 0xC1, + PMBUS_MFR_MAX_TEMP_3 = 0xC2, + + PMBUS_PRI_FW_VER = 0xDD, + PMBUS_SEC_FW_VER = 0xD7, + PMBUS_MFR_POS_TOTAL = 0xE5, + PMBUS_MFR_POS_LAST = 0xE6, + +/* + * Virtual registers. + * Useful to support attributes which are not supported by standard PMBus + * registers but exist as manufacturer specific registers on individual chips. + * Must be mapped to real registers in device specific code. + * + * Semantics: + * Virtual registers are all word size. + * READ registers are read-only; writes are either ignored or return an error. + * RESET registers are read/write. Reading reset registers returns zero + * (used for detection), writing any value causes the associated history to be + * reset. + * Virtual registers have to be handled in device specific driver code. Chip + * driver code returns non-negative register values if a virtual register is + * supported, or a negative error code if not. The chip driver may return + * -ENODATA or any other error code in this case, though an error code other + * than -ENODATA is handled more efficiently and thus preferred. Either case, + * the calling PMBus core code will abort if the chip driver returns an error + * code when reading or writing virtual registers. + */ + PMBUS_VIRT_BASE = 0x100, + PMBUS_VIRT_READ_TEMP_AVG, + PMBUS_VIRT_READ_TEMP_MIN, + PMBUS_VIRT_READ_TEMP_MAX, + PMBUS_VIRT_RESET_TEMP_HISTORY, + PMBUS_VIRT_READ_VIN_AVG, + PMBUS_VIRT_READ_VIN_MIN, + PMBUS_VIRT_READ_VIN_MAX, + PMBUS_VIRT_RESET_VIN_HISTORY, + PMBUS_VIRT_READ_IIN_AVG, + PMBUS_VIRT_READ_IIN_MIN, + PMBUS_VIRT_READ_IIN_MAX, + PMBUS_VIRT_RESET_IIN_HISTORY, + PMBUS_VIRT_READ_PIN_AVG, + PMBUS_VIRT_READ_PIN_MIN, + PMBUS_VIRT_READ_PIN_MAX, + PMBUS_VIRT_RESET_PIN_HISTORY, + PMBUS_VIRT_READ_POUT_AVG, + PMBUS_VIRT_READ_POUT_MIN, + PMBUS_VIRT_READ_POUT_MAX, + PMBUS_VIRT_RESET_POUT_HISTORY, + PMBUS_VIRT_READ_VOUT_AVG, + PMBUS_VIRT_READ_VOUT_MIN, + PMBUS_VIRT_READ_VOUT_MAX, + PMBUS_VIRT_RESET_VOUT_HISTORY, + PMBUS_VIRT_READ_IOUT_AVG, + PMBUS_VIRT_READ_IOUT_MIN, + PMBUS_VIRT_READ_IOUT_MAX, + PMBUS_VIRT_RESET_IOUT_HISTORY, + PMBUS_VIRT_READ_TEMP2_AVG, + PMBUS_VIRT_READ_TEMP2_MIN, + PMBUS_VIRT_READ_TEMP2_MAX, + PMBUS_VIRT_RESET_TEMP2_HISTORY, + + PMBUS_VIRT_READ_VMON, + PMBUS_VIRT_VMON_UV_WARN_LIMIT, + PMBUS_VIRT_VMON_OV_WARN_LIMIT, + PMBUS_VIRT_VMON_UV_FAULT_LIMIT, + PMBUS_VIRT_VMON_OV_FAULT_LIMIT, + PMBUS_VIRT_STATUS_VMON, + + /* + * RPM and PWM Fan control + * + * Drivers wanting to expose PWM control must define the behaviour of + * PMBUS_VIRT_PWM_[1-4] and PMBUS_VIRT_PWM_ENABLE_[1-4] in the + * {read,write}_word_data callback. + * + * pmbus core provides a default implementation for + * PMBUS_VIRT_FAN_TARGET_[1-4]. + * + * TARGET, PWM and PWM_ENABLE members must be defined sequentially; + * pmbus core uses the difference between the provided register and + * it's _1 counterpart to calculate the FAN/PWM ID. + */ + PMBUS_VIRT_FAN_TARGET_1, + PMBUS_VIRT_FAN_TARGET_2, + PMBUS_VIRT_FAN_TARGET_3, + PMBUS_VIRT_FAN_TARGET_4, + PMBUS_VIRT_PWM_1, + PMBUS_VIRT_PWM_2, + PMBUS_VIRT_PWM_3, + PMBUS_VIRT_PWM_4, + PMBUS_VIRT_PWM_ENABLE_1, + PMBUS_VIRT_PWM_ENABLE_2, + PMBUS_VIRT_PWM_ENABLE_3, + PMBUS_VIRT_PWM_ENABLE_4, + + /* Samples for average + * + * Drivers wanting to expose functionality for changing the number of + * samples used for average values should implement support in + * {read,write}_word_data callback for either PMBUS_VIRT_SAMPLES if it + * applies to all types of measurements, or any number of specific + * PMBUS_VIRT_*_SAMPLES registers to allow for individual control. + */ + PMBUS_VIRT_SAMPLES, + PMBUS_VIRT_IN_SAMPLES, + PMBUS_VIRT_CURR_SAMPLES, + PMBUS_VIRT_POWER_SAMPLES, + PMBUS_VIRT_TEMP_SAMPLES, +}; + +/* + * OPERATION + */ +#define PB_OPERATION_CONTROL_ON BIT(7) + +/* + * WRITE_PROTECT + */ +#define PB_WP_ALL BIT(7) /* all but WRITE_PROTECT */ +#define PB_WP_OP BIT(6) /* all but WP, OPERATION, PAGE */ +#define PB_WP_VOUT BIT(5) /* all but WP, OPERATION, PAGE, VOUT, ON_OFF */ + +#define PB_WP_ANY (PB_WP_ALL | PB_WP_OP | PB_WP_VOUT) + +/* + * CAPABILITY + */ +#define PB_CAPABILITY_SMBALERT BIT(4) +#define PB_CAPABILITY_ERROR_CHECK BIT(7) + +/* + * VOUT_MODE + */ +#define PB_VOUT_MODE_MODE_MASK 0xe0 +#define PB_VOUT_MODE_PARAM_MASK 0x1f + +#define PB_VOUT_MODE_LINEAR 0x00 +#define PB_VOUT_MODE_VID 0x20 +#define PB_VOUT_MODE_DIRECT 0x40 + +/* + * Fan configuration + */ +#define PB_FAN_2_PULSE_MASK (BIT(0) | BIT(1)) +#define PB_FAN_2_RPM BIT(2) +#define PB_FAN_2_INSTALLED BIT(3) +#define PB_FAN_1_PULSE_MASK (BIT(4) | BIT(5)) +#define PB_FAN_1_RPM BIT(6) +#define PB_FAN_1_INSTALLED BIT(7) + +enum pmbus_fan_mode { percent = 0, rpm }; + +/* + * STATUS_BYTE, STATUS_WORD (lower) + */ +#define PB_STATUS_NONE_ABOVE BIT(0) +#define PB_STATUS_CML BIT(1) +#define PB_STATUS_TEMPERATURE BIT(2) +#define PB_STATUS_VIN_UV BIT(3) +#define PB_STATUS_IOUT_OC BIT(4) +#define PB_STATUS_VOUT_OV BIT(5) +#define PB_STATUS_OFF BIT(6) +#define PB_STATUS_BUSY BIT(7) + +/* + * STATUS_WORD (upper) + */ +#define PB_STATUS_UNKNOWN BIT(8) +#define PB_STATUS_OTHER BIT(9) +#define PB_STATUS_FANS BIT(10) +#define PB_STATUS_POWER_GOOD_N BIT(11) +#define PB_STATUS_WORD_MFR BIT(12) +#define PB_STATUS_INPUT BIT(13) +#define PB_STATUS_IOUT_POUT BIT(14) +#define PB_STATUS_VOUT BIT(15) + +/* + * STATUS_IOUT + */ +#define PB_POUT_OP_WARNING BIT(0) +#define PB_POUT_OP_FAULT BIT(1) +#define PB_POWER_LIMITING BIT(2) +#define PB_CURRENT_SHARE_FAULT BIT(3) +#define PB_IOUT_UC_FAULT BIT(4) +#define PB_IOUT_OC_WARNING BIT(5) +#define PB_IOUT_OC_LV_FAULT BIT(6) +#define PB_IOUT_OC_FAULT BIT(7) + +/* + * STATUS_VOUT, STATUS_INPUT + */ +#define PB_VOLTAGE_UV_FAULT BIT(4) +#define PB_VOLTAGE_UV_WARNING BIT(5) +#define PB_VOLTAGE_OV_WARNING BIT(6) +#define PB_VOLTAGE_OV_FAULT BIT(7) + +/* + * STATUS_INPUT + */ +#define PB_PIN_OP_WARNING BIT(0) +#define PB_IIN_OC_WARNING BIT(1) +#define PB_IIN_OC_FAULT BIT(2) + +/* + * STATUS_TEMPERATURE + */ +#define PB_TEMP_UT_FAULT BIT(4) +#define PB_TEMP_UT_WARNING BIT(5) +#define PB_TEMP_OT_WARNING BIT(6) +#define PB_TEMP_OT_FAULT BIT(7) + +/* + * STATUS_FAN + */ +#define PB_FAN_AIRFLOW_WARNING BIT(0) +#define PB_FAN_AIRFLOW_FAULT BIT(1) +#define PB_FAN_FAN2_SPEED_OVERRIDE BIT(2) +#define PB_FAN_FAN1_SPEED_OVERRIDE BIT(3) +#define PB_FAN_FAN2_WARNING BIT(4) +#define PB_FAN_FAN1_WARNING BIT(5) +#define PB_FAN_FAN2_FAULT BIT(6) +#define PB_FAN_FAN1_FAULT BIT(7) + +/* + * CML_FAULT_STATUS + */ +#define PB_CML_FAULT_OTHER_MEM_LOGIC BIT(0) +#define PB_CML_FAULT_OTHER_COMM BIT(1) +#define PB_CML_FAULT_PROCESSOR BIT(3) +#define PB_CML_FAULT_MEMORY BIT(4) +#define PB_CML_FAULT_PACKET_ERROR BIT(5) +#define PB_CML_FAULT_INVALID_DATA BIT(6) +#define PB_CML_FAULT_INVALID_COMMAND BIT(7) + +enum pmbus_sensor_classes { + PSC_VOLTAGE_IN = 0, + PSC_VOLTAGE_OUT, + PSC_CURRENT_IN, + PSC_CURRENT_OUT, + PSC_POWER, + PSC_TEMPERATURE, + PSC_FAN, + PSC_PWM, + PSC_NUM_CLASSES /* Number of power sensor classes */ +}; + +#define PMBUS_PAGES 32 /* Per PMBus specification */ +#define PMBUS_PHASES 8 /* Maximum number of phases per page */ + +/* Functionality bit mask */ +#define PMBUS_HAVE_VIN BIT(0) +#define PMBUS_HAVE_VCAP BIT(1) +#define PMBUS_HAVE_VOUT BIT(2) +#define PMBUS_HAVE_IIN BIT(3) +#define PMBUS_HAVE_IOUT BIT(4) +#define PMBUS_HAVE_PIN BIT(5) +#define PMBUS_HAVE_POUT BIT(6) +#define PMBUS_HAVE_FAN12 BIT(7) +#define PMBUS_HAVE_FAN34 BIT(8) +#define PMBUS_HAVE_TEMP BIT(9) +#define PMBUS_HAVE_TEMP2 BIT(10) +#define PMBUS_HAVE_TEMP3 BIT(11) +#define PMBUS_HAVE_STATUS_VOUT BIT(12) +#define PMBUS_HAVE_STATUS_IOUT BIT(13) +#define PMBUS_HAVE_STATUS_INPUT BIT(14) +#define PMBUS_HAVE_STATUS_TEMP BIT(15) +#define PMBUS_HAVE_STATUS_FAN12 BIT(16) +#define PMBUS_HAVE_STATUS_FAN34 BIT(17) +#define PMBUS_HAVE_VMON BIT(18) +#define PMBUS_HAVE_STATUS_VMON BIT(19) +#define PMBUS_HAVE_PWM12 BIT(20) +#define PMBUS_HAVE_PWM34 BIT(21) +#define PMBUS_HAVE_SAMPLES BIT(22) + +#define PMBUS_PHASE_VIRTUAL BIT(30) /* Phases on this page are virtual */ +#define PMBUS_PAGE_VIRTUAL BIT(31) /* Page is virtual */ + +enum pmbus_data_format { linear = 0, direct, vid }; +enum vrm_version { vr11 = 0, vr12, vr13, imvp9, amd625mv }; + +struct pmbus_driver_info { + int pages; /* Total number of pages */ + u8 phases[PMBUS_PAGES]; /* Number of phases per page */ + enum pmbus_data_format format[PSC_NUM_CLASSES]; + enum vrm_version vrm_version[PMBUS_PAGES]; /* vrm version per page */ + /* + * Support one set of coefficients for each sensor type + * Used for chips providing data in direct mode. + */ + int m[PSC_NUM_CLASSES]; /* mantissa for direct data format */ + int b[PSC_NUM_CLASSES]; /* offset */ + int R[PSC_NUM_CLASSES]; /* exponent */ + + u32 func[PMBUS_PAGES]; /* Functionality, per page */ + u32 pfunc[PMBUS_PHASES];/* Functionality, per phase */ + /* + * The following functions map manufacturing specific register values + * to PMBus standard register values. Specify only if mapping is + * necessary. + * Functions return the register value (read) or zero (write) if + * successful. A return value of -ENODATA indicates that there is no + * manufacturer specific register, but that a standard PMBus register + * may exist. Any other negative return value indicates that the + * register does not exist, and that no attempt should be made to read + * the standard register. + */ + int (*read_byte_data)(struct i2c_client *client, int page, int reg); + int (*read_word_data)(struct i2c_client *client, int page, int phase, + int reg); + int (*write_word_data)(struct i2c_client *client, int page, int reg, + u16 word); + int (*write_byte)(struct i2c_client *client, int page, u8 value); + /* + * The identify function determines supported PMBus functionality. + * This function is only necessary if a chip driver supports multiple + * chips, and the chip functionality is not pre-determined. + */ + int (*identify)(struct i2c_client *client, + struct pmbus_driver_info *info); + + /* Regulator functionality, if supported by this chip driver. */ + int num_regulators; + const struct regulator_desc *reg_desc; + + /* custom attributes */ + const struct attribute_group **groups; +}; + +/* Regulator ops */ + +extern const struct regulator_ops wb_pmbus_regulator_ops; + +/* Macro for filling in array of struct regulator_desc */ +#define PMBUS_REGULATOR(_name, _id) \ + [_id] = { \ + .name = (_name # _id), \ + .id = (_id), \ + .of_match = of_match_ptr(_name # _id), \ + .regulators_node = of_match_ptr("regulators"), \ + .ops = &wb_pmbus_regulator_ops, \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE, \ + } + +struct pmbus_data { + struct device *dev; + struct device *hwmon_dev; + + u32 flags; /* from platform data */ + + int exponent[PMBUS_PAGES]; /* linear mode: exponent for output voltages */ + + const struct pmbus_driver_info *info; + + int max_attributes; + int num_attributes; + struct attribute_group group; + const struct attribute_group **groups; + struct dentry *debugfs; /* debugfs device directory */ + + struct pmbus_sensor *sensors; + + struct mutex update_lock; + + bool has_status_word; /* device uses STATUS_WORD register */ + int (*read_status)(struct i2c_client *client, int page); + + s16 currpage; /* current page, -1 for unknown/unset */ + s16 currphase; /* current phase, 0xff for all, -1 for unknown/unset */ + int vout_max[PMBUS_PAGES]; /* pmbus maximum output voltage */ + int vout_min[PMBUS_PAGES]; /* pmbus minimum output voltage */ + bool is_support_block_read; + pmbus_info_t *pmbus_info_array; + int pmbus_info_array_size; +}; + +#define PMBUS_DEV_NAME_SIZE (256) + +typedef struct { + char device_name[I2C_NAME_SIZE]; + char chip_name[I2C_NAME_SIZE]; + uint8_t device_id[PMBUS_DEV_NAME_SIZE]; + uint32_t dev_id_len; +} pmbus_dev_info_t; + +pmbus_dev_info_t pmbus_dev_infos[] = { + {.device_name = "wb_xdpe12284", .chip_name = "XDPE12284C", .device_id = {0x79, 0x00}, .dev_id_len = 2}, + {.device_name = "wb_xdpe12284", .chip_name = "XDPE12284C", .device_id = {0x79, 0x01}, .dev_id_len = 2}, + {.device_name = "wb_xdpe12284", .chip_name = "XDPE12284C", .device_id = {0x79, 0x02}, .dev_id_len = 2}, + {.device_name = "wb_xdpe132g5c_pmbus", .chip_name = "XDPE132G5C", .device_id = {0x76}, .dev_id_len = 1}, + {.device_name = "wb_xdpe132g5c_pmbus", .chip_name = "XDPE132G5D", .device_id = {0x7c}, .dev_id_len = 1}, + /* The driver does not support RAA228248, using RAA228228 instead. */ + {.device_name = "wb_raa228228", .chip_name = "RAA228248", .device_id = {0x00, 0xbc, 0xd2, 0x49}, .dev_id_len = 4}, + /* The old manual ID is 0x49d26e00, and the new manual ID is 0x49d28100. */ + {.device_name = "wb_isl69260", .chip_name = "ISL69260", .device_id = {0x00, 0x81, 0xd2, 0x49}, .dev_id_len = 4}, +}; + +/* Function declarations */ +void wb_pmbus_clear_cache(struct i2c_client *client); +int wb_pmbus_set_page(struct i2c_client *client, int page, int phase); +int wb_pmbus_read_block_data(struct i2c_client *client, int page, u8 reg, char *data_buf); +int wb_pmbus_write_block_data(struct i2c_client *client, int page, u8 reg, u8 length, char *data_buf); +int wb_pmbus_read_i2c_block_data(struct i2c_client *client, int page, u8 reg, u8 length, char *data_buf); +int wb_pmbus_write_i2c_block_data(struct i2c_client *client, int page, u8 reg, u8 length, char *data_buf); +int wb_pmbus_read_word_data(struct i2c_client *client, int page, int phase, + u8 reg); +int wb_pmbus_write_word_data(struct i2c_client *client, int page, u8 reg, + u16 word); +int wb_pmbus_read_byte_data(struct i2c_client *client, int page, u8 reg); +int wb_pmbus_write_byte(struct i2c_client *client, int page, u8 value); +int wb_pmbus_write_byte_data(struct i2c_client *client, int page, u8 reg, + u8 value); +int wb_pmbus_update_byte_data(struct i2c_client *client, int page, u8 reg, + u8 mask, u8 value); +void wb_pmbus_clear_faults(struct i2c_client *client); +bool wb_pmbus_check_byte_register(struct i2c_client *client, int page, int reg); +bool wb_pmbus_check_word_register(struct i2c_client *client, int page, int reg); +int wb_pmbus_do_probe(struct i2c_client *client, struct pmbus_driver_info *info); +int wb_pmbus_do_remove(struct i2c_client *client); +const struct pmbus_driver_info *wb_pmbus_get_driver_info(struct i2c_client + *client); +int wb_pmbus_get_fan_rate_device(struct i2c_client *client, int page, int id, + enum pmbus_fan_mode mode); +int wb_pmbus_get_fan_rate_cached(struct i2c_client *client, int page, int id, + enum pmbus_fan_mode mode); +int wb_pmbus_update_fan(struct i2c_client *client, int page, int id, + u8 config, u8 mask, u16 command); +struct dentry *wb_pmbus_get_debugfs_dir(struct i2c_client *client); +int get_pmbus_sensor_data(struct pmbus_data *data, pmbus_info_t *info, char *buf, int buf_len); +int get_pmbus_info(struct i2c_client *client, char *buf, + int buf_len, int page, pmbus_info_t *pmbus_info_array, int a_size); +ssize_t pmbus_avs_vout_max_store(struct device *dev, + struct device_attribute *devattr, const char *buf, size_t count); +ssize_t pmbus_avs_vout_max_show(struct device *dev, + struct device_attribute *devattr, char *buf); +ssize_t pmbus_avs_vout_min_store(struct device *dev, + struct device_attribute *devattr, const char *buf, size_t count); +ssize_t pmbus_avs_vout_min_show(struct device *dev, + struct device_attribute *devattr, char *buf); +ssize_t show_pmbus_dfx_info(struct device *dev, struct device_attribute *da, char *buf); +ssize_t pmbus_block_data_show(struct device *dev, struct device_attribute *devattr, + char *buf); + +ssize_t pmbus_device_name_show(struct device *dev, struct device_attribute *devattr, + char *buf); +ssize_t pmbus_get_status_word_show(struct device *dev, + struct device_attribute *devattr, + char *buf); +ssize_t pmbus_get_status_byte_show(struct device *dev, + struct device_attribute *devattr, + char *buf); +#endif /* WB_PMBUS_H */ diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_pmbus_core.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_pmbus_core.c new file mode 100644 index 00000000000..0ba017e2fd2 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_pmbus_core.c @@ -0,0 +1,3717 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Hardware monitoring driver for PMBus devices + * + * Copyright (c) 2010, 2011 Ericsson AB. + * Copyright (c) 2012 Guenter Roeck + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "wb_pmbus.h" + +/* + * Number of additional attribute pointers to allocate + * with each call to krealloc + */ +#define PMBUS_ATTR_ALLOC_SIZE (32) +#define PMBUS_NAME_SIZE (24) +#define PMBUS_RETRY_SLEEP_TIME (10000) /* 10ms */ +#define PMBUS_RETRY_TIME (3) + +struct pmbus_sensor { + struct pmbus_sensor *next; + char name[PMBUS_NAME_SIZE]; /* sysfs sensor name */ + struct device_attribute attribute; + u8 page; /* page number */ + u8 phase; /* phase number, 0xff for all phases */ + u16 reg; /* register */ + enum pmbus_sensor_classes class; /* sensor class */ + bool update; /* runtime sensor update needed */ + bool convert; /* Whether or not to apply linear/vid/direct */ + int data; /* Sensor data. + Negative if there was a read error */ +}; +#define to_pmbus_sensor(_attr) \ + container_of(_attr, struct pmbus_sensor, attribute) + +struct pmbus_boolean { + char name[PMBUS_NAME_SIZE]; /* sysfs boolean name */ + struct sensor_device_attribute attribute; + struct pmbus_sensor *s1; + struct pmbus_sensor *s2; +}; +#define to_pmbus_boolean(_attr) \ + container_of(_attr, struct pmbus_boolean, attribute) + +struct pmbus_label { + char name[PMBUS_NAME_SIZE]; /* sysfs label name */ + struct device_attribute attribute; + char label[PMBUS_NAME_SIZE]; /* label */ +}; +#define to_pmbus_label(_attr) \ + container_of(_attr, struct pmbus_label, attribute) + +struct pmbus_attr_status { + char name[PMBUS_NAME_SIZE]; /* sysfs label name */ + struct sensor_device_attribute attribute; +}; +#define to_pmbus_attr_status(_attr) \ + container_of(_attr, struct pmbus_attr_status, attribute) + +/* Macros for converting between sensor index and register/page/status mask */ + +#define PB_STATUS_MASK 0xffff +#define PB_REG_SHIFT 16 +#define PB_REG_MASK 0x3ff +#define PB_PAGE_SHIFT 26 +#define PB_PAGE_MASK 0x3f + +#define pb_reg_to_index(page, reg, mask) (((page) << PB_PAGE_SHIFT) | \ + ((reg) << PB_REG_SHIFT) | (mask)) + +#define pb_index_to_page(index) (((index) >> PB_PAGE_SHIFT) & PB_PAGE_MASK) +#define pb_index_to_reg(index) (((index) >> PB_REG_SHIFT) & PB_REG_MASK) +#define pb_index_to_mask(index) ((index) & PB_STATUS_MASK) + +struct pmbus_debugfs_entry { + struct i2c_client *client; + u8 page; + u8 reg; +}; + +static const int pmbus_fan_rpm_mask[] = { + PB_FAN_1_RPM, + PB_FAN_2_RPM, + PB_FAN_1_RPM, + PB_FAN_2_RPM, +}; + +static const int pmbus_fan_config_registers[] = { + PMBUS_FAN_CONFIG_12, + PMBUS_FAN_CONFIG_12, + PMBUS_FAN_CONFIG_34, + PMBUS_FAN_CONFIG_34 +}; + +static const int pmbus_fan_command_registers[] = { + PMBUS_FAN_COMMAND_1, + PMBUS_FAN_COMMAND_2, + PMBUS_FAN_COMMAND_3, + PMBUS_FAN_COMMAND_4, +}; + +ssize_t pmbus_avs_vout_max_store(struct device *dev, + struct device_attribute *devattr, const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev->parent); + struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct pmbus_data *data = i2c_get_clientdata(client); + int ret, vout_threshold; + + if ((attr->index < 0) || (attr->index >= PMBUS_PAGES)) { + dev_dbg(dev, "Invalid index: %d\n", attr->index); + return -EINVAL; + } + + ret = kstrtoint(buf, 0, &vout_threshold); + if (ret) { + dev_dbg(dev, "Invalid value: %s\n", buf); + return -EINVAL; + } + + dev_dbg(dev, "avs_vout%d max threshold: %d\n", attr->index, vout_threshold); + + data->vout_max[attr->index] = vout_threshold; + return count; +} +EXPORT_SYMBOL_GPL(pmbus_avs_vout_max_store); + +ssize_t pmbus_avs_vout_max_show(struct device *dev, + struct device_attribute *devattr, char *buf) +{ + struct i2c_client *client = to_i2c_client(dev->parent); + struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct pmbus_data *data = i2c_get_clientdata(client); + + if ((attr->index < 0) || (attr->index >= PMBUS_PAGES)) { + dev_dbg(dev, "Invalid index: %d\n", attr->index); + return -EINVAL; + } + + return snprintf(buf, PAGE_SIZE, "%d\n", data->vout_max[attr->index]); +} +EXPORT_SYMBOL_GPL(pmbus_avs_vout_max_show); + +ssize_t pmbus_avs_vout_min_store(struct device *dev, + struct device_attribute *devattr, const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev->parent); + struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct pmbus_data *data = i2c_get_clientdata(client); + int ret, vout_threshold; + + if ((attr->index < 0) || (attr->index >= PMBUS_PAGES)) { + dev_dbg(dev, "Invalid index: %d\n", attr->index); + return -EINVAL; + } + + ret = kstrtoint(buf, 0, &vout_threshold); + if (ret) { + dev_dbg(dev, "Invalid value: %s\n", buf); + return -EINVAL; + } + dev_dbg(dev, "avs_vout%d min threshold: %d\n", attr->index, vout_threshold); + + data->vout_min[attr->index] = vout_threshold; + return count; +} +EXPORT_SYMBOL_GPL(pmbus_avs_vout_min_store); + +ssize_t pmbus_avs_vout_min_show(struct device *dev, + struct device_attribute *devattr, char *buf) +{ + struct i2c_client *client = to_i2c_client(dev->parent); + struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct pmbus_data *data = i2c_get_clientdata(client); + + if ((attr->index < 0) || (attr->index >= PMBUS_PAGES)) { + dev_dbg(dev, "Invalid index: %d\n", attr->index); + return -EINVAL; + } + + return snprintf(buf, PAGE_SIZE, "%d\n", data->vout_min[attr->index]); +} +EXPORT_SYMBOL_GPL(pmbus_avs_vout_min_show); + +void wb_pmbus_clear_cache(struct i2c_client *client) +{ + struct pmbus_data *data = i2c_get_clientdata(client); + struct pmbus_sensor *sensor; + + for (sensor = data->sensors; sensor; sensor = sensor->next) + sensor->data = -ENODATA; +} +EXPORT_SYMBOL_GPL(wb_pmbus_clear_cache); + +static int wb_pmbus_set_page_tmp(struct i2c_client *client, int page, int phase) +{ + struct pmbus_data *data = i2c_get_clientdata(client); + int rv; + struct device *dev = &client->dev; + + dev_dbg(dev, "data->info->pages: %d, target page: %d, currpage: %d, target phase: %d, currphase: %d\n", + data->info->pages, page, data->currpage, phase, data->currphase); + + if (page < 0) + return 0; + + if (((page >= data->info->pages) && (page != data->currpage)) || + (!(data->info->func[page] & PMBUS_PAGE_VIRTUAL) && + data->info->pages > 1 && page != data->currpage)) { + rv = i2c_smbus_write_byte_data(client, PMBUS_PAGE, page); + if (rv < 0) + return rv; + + rv = i2c_smbus_read_byte_data(client, PMBUS_PAGE); + if (rv < 0) + return rv; + + if (rv != page) + return -EIO; + } + data->currpage = page; + + if ((page < data->info->pages) && data->info->phases[page] && data->currphase != phase && + !(data->info->func[page] & PMBUS_PHASE_VIRTUAL)) { + rv = i2c_smbus_write_byte_data(client, PMBUS_PHASE, + phase); + if (rv) + return rv; + } + data->currphase = phase; + + return 0; +} + +int wb_pmbus_set_page(struct i2c_client *client, int page, int phase) +{ + int rv, i; + struct device *dev = &client->dev; + + for (i = 0; i < PMBUS_RETRY_TIME; i++) { + rv = wb_pmbus_set_page_tmp(client, page, phase); + if(rv >= 0){ + return rv; + } + if ((i + 1) < PMBUS_RETRY_TIME) { + usleep_range(PMBUS_RETRY_SLEEP_TIME, PMBUS_RETRY_SLEEP_TIME + 1); + } + } + dev_dbg(dev, "wb_pmbus_set_page failed, page=%d, phase=%d, rv=%d\n", + page, phase, rv); + return rv; +} +EXPORT_SYMBOL_GPL(wb_pmbus_set_page); + +static int wb_pmbus_write_byte_tmp(struct i2c_client *client, int page, u8 value) +{ + int rv; + + rv = wb_pmbus_set_page(client, page, 0xff); + if (rv < 0) + return rv; + + return i2c_smbus_write_byte(client, value); +} + +int wb_pmbus_write_byte(struct i2c_client *client, int page, u8 value) +{ + int rv, i; + struct device *dev = &client->dev; + + for (i = 0; i < PMBUS_RETRY_TIME; i++) { + rv = wb_pmbus_write_byte_tmp(client, page, value); + if(rv >= 0){ + return rv; + } + if ((i + 1) < PMBUS_RETRY_TIME) { + usleep_range(PMBUS_RETRY_SLEEP_TIME, PMBUS_RETRY_SLEEP_TIME + 1); + } + } + dev_dbg(dev, "wb_pmbus_write_byte failed, page=%d, value=0x%x, rv: %d\n", + page, value, rv); + return rv; +} + +EXPORT_SYMBOL_GPL(wb_pmbus_write_byte); + +/* + * _pmbus_write_byte() is similar to pmbus_write_byte(), but checks if + * a device specific mapping function exists and calls it if necessary. + */ +static int _pmbus_write_byte(struct i2c_client *client, int page, u8 value) +{ + struct pmbus_data *data = i2c_get_clientdata(client); + const struct pmbus_driver_info *info = data->info; + int status; + + if (info->write_byte) { + status = info->write_byte(client, page, value); + if (status != -ENODATA) + return status; + } + return wb_pmbus_write_byte(client, page, value); +} + +static int wb_pmbus_write_word_data_tmp(struct i2c_client *client, int page, u8 reg, + u16 word) +{ + int rv; + + rv = wb_pmbus_set_page(client, page, 0xff); + if (rv < 0) + return rv; + + return i2c_smbus_write_word_data(client, reg, word); +} + +int wb_pmbus_write_word_data(struct i2c_client *client, int page, u8 reg, + u16 word) +{ + int rv, i; + struct device *dev = &client->dev; + + for (i = 0; i < PMBUS_RETRY_TIME; i++) { + rv = wb_pmbus_write_word_data_tmp(client, page, reg, word); + if(rv >= 0){ + return rv; + } + if ((i + 1) < PMBUS_RETRY_TIME) { + usleep_range(PMBUS_RETRY_SLEEP_TIME, PMBUS_RETRY_SLEEP_TIME + 1); + } + } + dev_dbg(dev, "wb_pmbus_write_word_data failed, page: %d, reg: 0x%x, value: 0x%x, rv: %d\n", + page, reg, word, rv); + return rv; + +} +EXPORT_SYMBOL_GPL(wb_pmbus_write_word_data); + +static int pmbus_write_virt_reg(struct i2c_client *client, int page, int reg, + u16 word) +{ + int bit; + int id; + int rv; + + switch (reg) { + case PMBUS_VIRT_FAN_TARGET_1 ... PMBUS_VIRT_FAN_TARGET_4: + id = reg - PMBUS_VIRT_FAN_TARGET_1; + bit = pmbus_fan_rpm_mask[id]; + rv = wb_pmbus_update_fan(client, page, id, bit, bit, word); + break; + default: + rv = -ENXIO; + break; + } + + return rv; +} + +/* + * _pmbus_write_word_data() is similar to pmbus_write_word_data(), but checks if + * a device specific mapping function exists and calls it if necessary. + */ +static int _pmbus_write_word_data(struct i2c_client *client, int page, int reg, + u16 word) +{ + struct pmbus_data *data = i2c_get_clientdata(client); + const struct pmbus_driver_info *info = data->info; + int status; + + if (info->write_word_data) { + status = info->write_word_data(client, page, reg, word); + if (status != -ENODATA) + return status; + } + + if (reg >= PMBUS_VIRT_BASE) + return pmbus_write_virt_reg(client, page, reg, word); + + return wb_pmbus_write_word_data(client, page, reg, word); +} + +int wb_pmbus_update_fan(struct i2c_client *client, int page, int id, + u8 config, u8 mask, u16 command) +{ + int from; + int rv; + u8 to; + + from = wb_pmbus_read_byte_data(client, page, + pmbus_fan_config_registers[id]); + if (from < 0) + return from; + + to = (from & ~mask) | (config & mask); + if (to != from) { + rv = wb_pmbus_write_byte_data(client, page, + pmbus_fan_config_registers[id], to); + if (rv < 0) + return rv; + } + + return _pmbus_write_word_data(client, page, + pmbus_fan_command_registers[id], command); +} +EXPORT_SYMBOL_GPL(wb_pmbus_update_fan); + +static int wb_pmbus_read_block_data_tmp(struct i2c_client *client, int page, u8 reg, char *data_buf) +{ + int rv; + + rv = wb_pmbus_set_page(client, page, 0xff); + if (rv < 0) + return rv; + + return i2c_smbus_read_block_data(client, reg, data_buf); +} + +int wb_pmbus_read_block_data(struct i2c_client *client, int page, u8 reg, char *data_buf) +{ + int rv, i; + struct device *dev = &client->dev; + struct pmbus_data *data = i2c_get_clientdata(client); + + if (!data->is_support_block_read) { + dev_dbg(dev, "Block read capability is not support\n"); + return -PMBUS_SYSFS_RV_UNSUPPORT; + } + + for (i = 0; i < PMBUS_RETRY_TIME; i++) { + rv = wb_pmbus_read_block_data_tmp(client, page, reg, data_buf); + if(rv >= 0){ + return rv; + } + if ((i + 1) < PMBUS_RETRY_TIME) { + usleep_range(PMBUS_RETRY_SLEEP_TIME, PMBUS_RETRY_SLEEP_TIME + 1); + } + } + dev_dbg(dev, "wb_pmbus_read_block_data failed, page: %d, reg: 0x%x, rv: %d\n", + page, reg, rv); + return -EIO; +} +EXPORT_SYMBOL_GPL(wb_pmbus_read_block_data); + +static int wb_pmbus_write_block_data_tmp(struct i2c_client *client, int page, u8 reg, u8 length, char *data_buf) +{ + int rv; + + rv = wb_pmbus_set_page(client, page, 0xff); + if (rv < 0) + return rv; + + return i2c_smbus_write_block_data(client, reg, length, data_buf); +} + +int wb_pmbus_write_block_data(struct i2c_client *client, int page, u8 reg, u8 length, char *data_buf) +{ + int rv, i; + struct device *dev = &client->dev; + + for (i = 0; i < PMBUS_RETRY_TIME; i++) { + rv = wb_pmbus_write_block_data_tmp(client, page, reg, length, data_buf); + if(rv >= 0){ + return rv; + } + if ((i + 1) < PMBUS_RETRY_TIME) { + usleep_range(PMBUS_RETRY_SLEEP_TIME, PMBUS_RETRY_SLEEP_TIME + 1); + } + } + dev_dbg(dev, "wb_pmbus_write_block_data failed, page: %d, reg: 0x%x, length: %u, rv: %d\n", + page, reg, length, rv); + return rv; +} +EXPORT_SYMBOL_GPL(wb_pmbus_write_block_data); + +static int wb_pmbus_read_i2c_block_data_tmp(struct i2c_client *client, int page, u8 reg, u8 length, char *data_buf) +{ + int rv; + + rv = wb_pmbus_set_page(client, page, 0xff); + if (rv < 0) + return rv; + + return i2c_smbus_read_i2c_block_data(client, reg, length, data_buf); +} + +int wb_pmbus_read_i2c_block_data(struct i2c_client *client, int page, u8 reg, u8 length, char *data_buf) +{ + int rv, i; + struct device *dev = &client->dev; + + for (i = 0; i < PMBUS_RETRY_TIME; i++) { + rv = wb_pmbus_read_i2c_block_data_tmp(client, page, reg, length, data_buf); + if(rv >= 0){ + return rv; + } + if ((i + 1) < PMBUS_RETRY_TIME) { + usleep_range(PMBUS_RETRY_SLEEP_TIME, PMBUS_RETRY_SLEEP_TIME + 1); + } + } + dev_dbg(dev, "wb_pmbus_read_i2c_block_data failed, page: %d, reg: 0x%x,length: %u, rv: %d\n", + page, reg, length, rv); + return rv; +} +EXPORT_SYMBOL_GPL(wb_pmbus_read_i2c_block_data); + +static int wb_pmbus_write_i2c_block_data_tmp(struct i2c_client *client, int page, u8 reg, u8 length, char *data_buf) +{ + int rv; + + rv = wb_pmbus_set_page(client, page, 0xff); + if (rv < 0) + return rv; + + return i2c_smbus_write_i2c_block_data(client, reg, length, data_buf); +} + +int wb_pmbus_write_i2c_block_data(struct i2c_client *client, int page, u8 reg, u8 length, char *data_buf) +{ + int rv, i; + struct device *dev = &client->dev; + + for (i = 0; i < PMBUS_RETRY_TIME; i++) { + rv = wb_pmbus_write_i2c_block_data_tmp(client, page, reg, length, data_buf); + if(rv >= 0){ + return rv; + } + if ((i + 1) < PMBUS_RETRY_TIME) { + usleep_range(PMBUS_RETRY_SLEEP_TIME, PMBUS_RETRY_SLEEP_TIME + 1); + } + } + dev_dbg(dev, "wb_pmbus_write_i2c_block_data failed, page: %d, reg: 0x%x, length: %u, rv: %d\n", + page, reg, length, rv); + return rv; +} +EXPORT_SYMBOL_GPL(wb_pmbus_write_i2c_block_data); + +static int wb_pmbus_read_word_data_tmp(struct i2c_client *client, int page, int phase, u8 reg) +{ + int rv; + + rv = wb_pmbus_set_page(client, page, phase); + if (rv < 0) + return rv; + + return i2c_smbus_read_word_data(client, reg); +} + +int wb_pmbus_read_word_data(struct i2c_client *client, int page, int phase, u8 reg) +{ + int rv, i; + struct device *dev = &client->dev; + + for (i = 0; i < PMBUS_RETRY_TIME; i++) { + rv = wb_pmbus_read_word_data_tmp(client, page, phase, reg); + if(rv >= 0){ + return rv; + } + if ((i + 1) < PMBUS_RETRY_TIME) { + usleep_range(PMBUS_RETRY_SLEEP_TIME, PMBUS_RETRY_SLEEP_TIME + 1); + } + } + dev_dbg(dev, "wb_pmbus_read_word_data failed, page: %d, phase: %d, reg: 0x%x, rv: %d\n", + page, phase, reg, rv); + return rv; +} +EXPORT_SYMBOL_GPL(wb_pmbus_read_word_data); + +static int pmbus_read_virt_reg(struct i2c_client *client, int page, int reg) +{ + int rv; + int id; + + switch (reg) { + case PMBUS_VIRT_FAN_TARGET_1 ... PMBUS_VIRT_FAN_TARGET_4: + id = reg - PMBUS_VIRT_FAN_TARGET_1; + rv = wb_pmbus_get_fan_rate_device(client, page, id, rpm); + break; + default: + rv = -ENXIO; + break; + } + + return rv; +} + +/* + * _pmbus_read_word_data() is similar to wb_pmbus_read_word_data(), but checks if + * a device specific mapping function exists and calls it if necessary. + */ +static int _pmbus_read_word_data(struct i2c_client *client, int page, + int phase, int reg) +{ + struct pmbus_data *data = i2c_get_clientdata(client); + const struct pmbus_driver_info *info = data->info; + int status; + + if (info->read_word_data) { + status = info->read_word_data(client, page, phase, reg); + if (status != -ENODATA) + return status; + } + + if (reg >= PMBUS_VIRT_BASE) + return pmbus_read_virt_reg(client, page, reg); + + return wb_pmbus_read_word_data(client, page, phase, reg); +} + +/* Same as above, but without phase parameter, for use in check functions */ +static int __pmbus_read_word_data(struct i2c_client *client, int page, int reg) +{ + return _pmbus_read_word_data(client, page, 0xff, reg); +} + +static int wb_pmbus_read_byte_data_tmp(struct i2c_client *client, int page, u8 reg) +{ + int rv; + + rv = wb_pmbus_set_page(client, page, 0xff); + if (rv < 0) + return rv; + + return i2c_smbus_read_byte_data(client, reg); +} + +int wb_pmbus_read_byte_data(struct i2c_client *client, int page, u8 reg) +{ + int rv, i; + struct device *dev = &client->dev; + + for (i = 0; i < PMBUS_RETRY_TIME; i++) { + rv = wb_pmbus_read_byte_data_tmp(client, page, reg); + if(rv >= 0){ + return rv; + } + if ((i + 1) < PMBUS_RETRY_TIME) { + usleep_range(PMBUS_RETRY_SLEEP_TIME, PMBUS_RETRY_SLEEP_TIME + 1); + } + } + dev_dbg(dev, "wb_pmbus_read_byte_data failed, page: %d, reg: 0x%x, rv: %d\n", + page, reg, rv); + return rv; +} +EXPORT_SYMBOL_GPL(wb_pmbus_read_byte_data); + +static int wb_pmbus_write_byte_data_tmp(struct i2c_client *client, int page, u8 reg, u8 value) +{ + int rv; + + rv = wb_pmbus_set_page(client, page, 0xff); + if (rv < 0) + return rv; + + return i2c_smbus_write_byte_data(client, reg, value); +} + +int wb_pmbus_write_byte_data(struct i2c_client *client, int page, u8 reg, u8 value) +{ + int rv, i; + struct device *dev = &client->dev; + + for (i = 0; i < PMBUS_RETRY_TIME; i++) { + rv = wb_pmbus_write_byte_data_tmp(client, page, reg, value); + if(rv >= 0){ + return rv; + } + if ((i + 1) < PMBUS_RETRY_TIME) { + usleep_range(PMBUS_RETRY_SLEEP_TIME, PMBUS_RETRY_SLEEP_TIME + 1); + } + } + dev_dbg(dev, "wb_pmbus_write_byte_data failed, page: %d, reg: 0x%x, value: 0x%x, rv: %d\n", + page, reg, value, rv); + return rv; +} +EXPORT_SYMBOL_GPL(wb_pmbus_write_byte_data); + +int wb_pmbus_update_byte_data(struct i2c_client *client, int page, u8 reg, + u8 mask, u8 value) +{ + unsigned int tmp; + int rv; + + rv = wb_pmbus_read_byte_data(client, page, reg); + if (rv < 0) + return rv; + + tmp = (rv & ~mask) | (value & mask); + + if (tmp != rv) + rv = wb_pmbus_write_byte_data(client, page, reg, tmp); + + return rv; +} +EXPORT_SYMBOL_GPL(wb_pmbus_update_byte_data); + +/* + * _pmbus_read_byte_data() is similar to wb_pmbus_read_byte_data(), but checks if + * a device specific mapping function exists and calls it if necessary. + */ +static int _pmbus_read_byte_data(struct i2c_client *client, int page, int reg) +{ + struct pmbus_data *data = i2c_get_clientdata(client); + const struct pmbus_driver_info *info = data->info; + int status; + + if (info->read_byte_data) { + status = info->read_byte_data(client, page, reg); + if (status != -ENODATA) + return status; + } + return wb_pmbus_read_byte_data(client, page, reg); +} + +static struct pmbus_sensor *pmbus_find_sensor(struct pmbus_data *data, int page, + int reg) +{ + struct pmbus_sensor *sensor; + + for (sensor = data->sensors; sensor; sensor = sensor->next) { + if (sensor->page == page && sensor->reg == reg) + return sensor; + } + + return ERR_PTR(-EINVAL); +} + +static int pmbus_get_fan_rate(struct i2c_client *client, int page, int id, + enum pmbus_fan_mode mode, + bool from_cache) +{ + struct pmbus_data *data = i2c_get_clientdata(client); + bool want_rpm, have_rpm; + struct pmbus_sensor *s; + int config; + int reg; + + want_rpm = (mode == rpm); + + if (from_cache) { + reg = want_rpm ? PMBUS_VIRT_FAN_TARGET_1 : PMBUS_VIRT_PWM_1; + s = pmbus_find_sensor(data, page, reg + id); + if (IS_ERR(s)) + return PTR_ERR(s); + + return s->data; + } + + config = wb_pmbus_read_byte_data(client, page, + pmbus_fan_config_registers[id]); + if (config < 0) + return config; + + have_rpm = !!(config & pmbus_fan_rpm_mask[id]); + if (want_rpm == have_rpm) + return wb_pmbus_read_word_data(client, page, 0xff, + pmbus_fan_command_registers[id]); + + /* Can't sensibly map between RPM and PWM, just return zero */ + return 0; +} + +int wb_pmbus_get_fan_rate_device(struct i2c_client *client, int page, int id, + enum pmbus_fan_mode mode) +{ + return pmbus_get_fan_rate(client, page, id, mode, false); +} +EXPORT_SYMBOL_GPL(wb_pmbus_get_fan_rate_device); + +int wb_pmbus_get_fan_rate_cached(struct i2c_client *client, int page, int id, + enum pmbus_fan_mode mode) +{ + return pmbus_get_fan_rate(client, page, id, mode, true); +} +EXPORT_SYMBOL_GPL(wb_pmbus_get_fan_rate_cached); + +static void pmbus_clear_fault_page(struct i2c_client *client, int page) +{ + _pmbus_write_byte(client, page, PMBUS_CLEAR_FAULTS); +} + +void wb_pmbus_clear_faults(struct i2c_client *client) +{ + struct pmbus_data *data = i2c_get_clientdata(client); + int i; + + for (i = 0; i < data->info->pages; i++) + pmbus_clear_fault_page(client, i); +} +EXPORT_SYMBOL_GPL(wb_pmbus_clear_faults); + +static int pmbus_check_status_cml(struct i2c_client *client) +{ + struct pmbus_data *data = i2c_get_clientdata(client); + int status, status2; + + status = data->read_status(client, -1); + if (status < 0 || (status & PB_STATUS_CML)) { + status2 = _pmbus_read_byte_data(client, -1, PMBUS_STATUS_CML); + if (status2 < 0 || (status2 & PB_CML_FAULT_INVALID_COMMAND)) + return -EIO; + } + return 0; +} + +static bool pmbus_check_register(struct i2c_client *client, + int (*func)(struct i2c_client *client, + int page, int reg), + int page, int reg) +{ + int rv; + struct pmbus_data *data = i2c_get_clientdata(client); + + rv = func(client, page, reg); + if (rv >= 0 && !(data->flags & PMBUS_SKIP_STATUS_CHECK)) + rv = pmbus_check_status_cml(client); + pmbus_clear_fault_page(client, -1); + return rv >= 0; +} + +static bool pmbus_check_status_register(struct i2c_client *client, int page) +{ + int status; + struct pmbus_data *data = i2c_get_clientdata(client); + + status = data->read_status(client, page); + if (status >= 0 && !(data->flags & PMBUS_SKIP_STATUS_CHECK) && + (status & PB_STATUS_CML)) { + status = _pmbus_read_byte_data(client, -1, PMBUS_STATUS_CML); + if (status < 0 || (status & PB_CML_FAULT_INVALID_COMMAND)) + status = -EIO; + } + + pmbus_clear_fault_page(client, -1); + return status >= 0; +} + +bool wb_pmbus_check_byte_register(struct i2c_client *client, int page, int reg) +{ + return pmbus_check_register(client, _pmbus_read_byte_data, page, reg); +} +EXPORT_SYMBOL_GPL(wb_pmbus_check_byte_register); + +bool wb_pmbus_check_word_register(struct i2c_client *client, int page, int reg) +{ + return pmbus_check_register(client, __pmbus_read_word_data, page, reg); +} +EXPORT_SYMBOL_GPL(wb_pmbus_check_word_register); + +const struct pmbus_driver_info *wb_pmbus_get_driver_info(struct i2c_client *client) +{ + struct pmbus_data *data = i2c_get_clientdata(client); + + return data->info; +} +EXPORT_SYMBOL_GPL(wb_pmbus_get_driver_info); + +static int pmbus_read_status_byte(struct i2c_client *client, int page) +{ + return _pmbus_read_byte_data(client, page, PMBUS_STATUS_BYTE); +} + +static int pmbus_read_status_word(struct i2c_client *client, int page) +{ + return _pmbus_read_word_data(client, page, 0xff, PMBUS_STATUS_WORD); +} + +static int pmbus_get_status(struct i2c_client *client, int page, int reg) +{ + struct pmbus_data *data = i2c_get_clientdata(client); + int status; + + switch (reg) { + case PMBUS_STATUS_WORD: + status = data->read_status(client, page); + if ((status < 0) || (data->has_status_word && (status == 0xffff)) + || (!data->has_status_word && (status == 0xff))) { + if (data->has_status_word) { + data->read_status = pmbus_read_status_byte; + } else { + data->read_status = pmbus_read_status_word; + } + data->has_status_word = !data->has_status_word; + status = data->read_status(client, page); + } + break; + default: + status = _pmbus_read_byte_data(client, page, reg); + break; + } + if (status < 0) + wb_pmbus_clear_faults(client); + return status; +} + +static void pmbus_update_sensor_data(struct i2c_client *client, struct pmbus_sensor *sensor) +{ + if (sensor->data < 0 || sensor->update) + sensor->data = _pmbus_read_word_data(client, sensor->page, + sensor->phase, sensor->reg); +} + +/* + * Convert linear sensor values to milli- or micro-units + * depending on sensor type. + */ +static s64 pmbus_reg2data_linear(struct pmbus_data *data, + struct pmbus_sensor *sensor) +{ + s16 exponent; + s32 mantissa; + s64 val; + + if (sensor->class == PSC_VOLTAGE_OUT) { /* LINEAR16 */ + exponent = data->exponent[sensor->page]; + mantissa = (u16) sensor->data; + } else { /* LINEAR11 */ + exponent = ((s16)sensor->data) >> 11; + mantissa = ((s16)((sensor->data & 0x7ff) << 5)) >> 5; + } + + val = mantissa; + + /* scale result to milli-units for all sensors except fans */ + if (sensor->class != PSC_FAN) + val = val * 1000LL; + + /* scale result to micro-units for power sensors */ + if (sensor->class == PSC_POWER) + val = val * 1000LL; + + if (exponent >= 0) + val <<= exponent; + else + val >>= -exponent; + + return val; +} + +/* + * Convert direct sensor values to milli- or micro-units + * depending on sensor type. + */ +static s64 pmbus_reg2data_direct(struct pmbus_data *data, + struct pmbus_sensor *sensor) +{ + s64 b, val = (s16)sensor->data; + s32 m, R; + + m = data->info->m[sensor->class]; + b = data->info->b[sensor->class]; + R = data->info->R[sensor->class]; + + if (m == 0) + return 0; + + /* X = 1/m * (Y * 10^-R - b) */ + R = -R; + /* scale result to milli-units for everything but fans */ + if (!(sensor->class == PSC_FAN || sensor->class == PSC_PWM)) { + R += 3; + b *= 1000; + } + + /* scale result to micro-units for power sensors */ + if (sensor->class == PSC_POWER) { + R += 3; + b *= 1000; + } + + while (R > 0) { + val *= 10; + R--; + } + while (R < 0) { + val = div_s64(val + 5LL, 10L); /* round closest */ + R++; + } + + val = div_s64(val - b, m); + return val; +} + +/* + * Convert VID sensor values to milli- or micro-units + * depending on sensor type. + */ +static s64 pmbus_reg2data_vid(struct pmbus_data *data, + struct pmbus_sensor *sensor) +{ + long val = sensor->data; + long rv = 0; + + switch (data->info->vrm_version[sensor->page]) { + case vr11: + if (val >= 0x02 && val <= 0xb2) + rv = DIV_ROUND_CLOSEST(160000 - (val - 2) * 625, 100); + break; + case vr12: + if (val >= 0x01) + rv = 250 + (val - 1) * 5; + break; + case vr13: + if (val >= 0x01) + rv = 500 + (val - 1) * 10; + break; + case imvp9: + if (val >= 0x01) + rv = 200 + (val - 1) * 10; + break; + case amd625mv: + if (val >= 0x0 && val <= 0xd8) + rv = DIV_ROUND_CLOSEST(155000 - val * 625, 100); + break; + } + return rv; +} + +static s64 pmbus_reg2data(struct pmbus_data *data, struct pmbus_sensor *sensor) +{ + s64 val; + + if (!sensor->convert) + return sensor->data; + + switch (data->info->format[sensor->class]) { + case direct: + val = pmbus_reg2data_direct(data, sensor); + break; + case vid: + val = pmbus_reg2data_vid(data, sensor); + break; + case linear: + default: + val = pmbus_reg2data_linear(data, sensor); + break; + } + return val; +} + +#define MAX_MANTISSA (1023 * 1000) +#define MIN_MANTISSA (511 * 1000) + +static u16 pmbus_data2reg_linear(struct pmbus_data *data, + struct pmbus_sensor *sensor, s64 val) +{ + s16 exponent = 0, mantissa; + bool negative = false; + + /* simple case */ + if (val == 0) + return 0; + + if (sensor->class == PSC_VOLTAGE_OUT) { + /* LINEAR16 does not support negative voltages */ + if (val < 0) + return 0; + + /* + * For a static exponents, we don't have a choice + * but to adjust the value to it. + */ + if (data->exponent[sensor->page] < 0) + val <<= -data->exponent[sensor->page]; + else + val >>= data->exponent[sensor->page]; + val = DIV_ROUND_CLOSEST_ULL(val, 1000); + return clamp_val(val, 0, 0xffff); + } + + if (val < 0) { + negative = true; + val = -val; + } + + /* Power is in uW. Convert to mW before converting. */ + if (sensor->class == PSC_POWER) + val = DIV_ROUND_CLOSEST_ULL(val, 1000); + + /* + * For simplicity, convert fan data to milli-units + * before calculating the exponent. + */ + if (sensor->class == PSC_FAN) + val = val * 1000LL; + + /* Reduce large mantissa until it fits into 10 bit */ + while (val >= MAX_MANTISSA && exponent < 15) { + exponent++; + val >>= 1; + } + /* Increase small mantissa to improve precision */ + while (val < MIN_MANTISSA && exponent > -15) { + exponent--; + val <<= 1; + } + + /* Convert mantissa from milli-units to units */ + mantissa = clamp_val(DIV_ROUND_CLOSEST_ULL(val, 1000), 0, 0x3ff); + + /* restore sign */ + if (negative) + mantissa = -mantissa; + + /* Convert to 5 bit exponent, 11 bit mantissa */ + return (mantissa & 0x7ff) | ((exponent << 11) & 0xf800); +} + +static u16 pmbus_data2reg_direct(struct pmbus_data *data, + struct pmbus_sensor *sensor, s64 val) +{ + s64 b; + s32 m, R; + + m = data->info->m[sensor->class]; + b = data->info->b[sensor->class]; + R = data->info->R[sensor->class]; + + /* Power is in uW. Adjust R and b. */ + if (sensor->class == PSC_POWER) { + R -= 3; + b *= 1000; + } + + /* Calculate Y = (m * X + b) * 10^R */ + if (!(sensor->class == PSC_FAN || sensor->class == PSC_PWM)) { + R -= 3; /* Adjust R and b for data in milli-units */ + b *= 1000; + } + val = val * m + b; + + while (R > 0) { + val *= 10; + R--; + } + while (R < 0) { + val = div_s64(val + 5LL, 10L); /* round closest */ + R++; + } + + return (u16)clamp_val(val, S16_MIN, S16_MAX); +} + +static u16 pmbus_data2reg_vid(struct pmbus_data *data, + struct pmbus_sensor *sensor, s64 val) +{ + val = clamp_val(val, 500, 1600); + + return 2 + DIV_ROUND_CLOSEST_ULL((1600LL - val) * 100LL, 625); +} + +static u16 pmbus_data2reg(struct pmbus_data *data, + struct pmbus_sensor *sensor, s64 val) +{ + u16 regval; + + if (!sensor->convert) + return val; + + switch (data->info->format[sensor->class]) { + case direct: + regval = pmbus_data2reg_direct(data, sensor, val); + break; + case vid: + regval = pmbus_data2reg_vid(data, sensor, val); + break; + case linear: + default: + regval = pmbus_data2reg_linear(data, sensor, val); + break; + } + return regval; +} + +/* + * Return boolean calculated from converted data. + * defines a status register index and mask. + * The mask is in the lower 8 bits, the register index is in bits 8..23. + * + * The associated pmbus_boolean structure contains optional pointers to two + * sensor attributes. If specified, those attributes are compared against each + * other to determine if a limit has been exceeded. + * + * If the sensor attribute pointers are NULL, the function returns true if + * (status[reg] & mask) is true. + * + * If sensor attribute pointers are provided, a comparison against a specified + * limit has to be performed to determine the boolean result. + * In this case, the function returns true if v1 >= v2 (where v1 and v2 are + * sensor values referenced by sensor attribute pointers s1 and s2). + * + * To determine if an object exceeds upper limits, specify = . + * To determine if an object exceeds lower limits, specify = . + * + * If a negative value is stored in any of the referenced registers, this value + * reflects an error code which will be returned. + */ +static int pmbus_get_boolean(struct i2c_client *client, struct pmbus_boolean *b, + int index) +{ + struct pmbus_data *data = i2c_get_clientdata(client); + struct pmbus_sensor *s1 = b->s1; + struct pmbus_sensor *s2 = b->s2; + u16 mask = pb_index_to_mask(index); + u8 page = pb_index_to_page(index); + u16 reg = pb_index_to_reg(index); + int ret, status; + u16 regval; + + mutex_lock(&data->update_lock); + status = pmbus_get_status(client, page, reg); + if (status < 0) { + ret = status; + goto unlock; + } + + if (s1) + pmbus_update_sensor_data(client, s1); + if (s2) + pmbus_update_sensor_data(client, s2); + + regval = status & mask; + if (s1 && s2) { + s64 v1, v2; + + if (s1->data < 0) { + ret = s1->data; + goto unlock; + } + if (s2->data < 0) { + ret = s2->data; + goto unlock; + } + + v1 = pmbus_reg2data(data, s1); + v2 = pmbus_reg2data(data, s2); + ret = !!(regval && v1 >= v2); + } else { + ret = !!regval; + } +unlock: + mutex_unlock(&data->update_lock); + return ret; +} + +static ssize_t pmbus_show_boolean(struct device *dev, + struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct pmbus_boolean *boolean = to_pmbus_boolean(attr); + struct i2c_client *client = to_i2c_client(dev->parent); + int val; + + val = pmbus_get_boolean(client, boolean, attr->index); + if (val < 0) + return val; + return snprintf(buf, PAGE_SIZE, "%d\n", val); +} + +static ssize_t pmbus_show_sensor(struct device *dev, + struct device_attribute *devattr, char *buf) +{ + struct i2c_client *client = to_i2c_client(dev->parent); + struct pmbus_sensor *sensor = to_pmbus_sensor(devattr); + struct pmbus_data *data = i2c_get_clientdata(client); + ssize_t ret; + + mutex_lock(&data->update_lock); + pmbus_update_sensor_data(client, sensor); + if (sensor->data < 0) + ret = sensor->data; + else + ret = snprintf(buf, PAGE_SIZE, "%lld\n", pmbus_reg2data(data, sensor)); + mutex_unlock(&data->update_lock); + return ret; +} + +static ssize_t pmbus_set_sensor(struct device *dev, + struct device_attribute *devattr, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev->parent); + struct pmbus_data *data = i2c_get_clientdata(client); + struct pmbus_sensor *sensor = to_pmbus_sensor(devattr); + ssize_t rv = count; + s64 val; + int ret; + u16 regval; + + if (kstrtos64(buf, 10, &val) < 0) + return -EINVAL; + + mutex_lock(&data->update_lock); + regval = pmbus_data2reg(data, sensor, val); + ret = _pmbus_write_word_data(client, sensor->page, sensor->reg, regval); + if (ret < 0) + rv = ret; + else + sensor->data = regval; + mutex_unlock(&data->update_lock); + return rv; +} + +static ssize_t pmbus_show_label(struct device *dev, + struct device_attribute *da, char *buf) +{ + struct pmbus_label *label = to_pmbus_label(da); + + return snprintf(buf, PAGE_SIZE, "%s\n", label->label); +} + +static ssize_t pmbus_show_status(struct device *dev, + struct device_attribute *da, char *buf) +{ + struct i2c_client *client = to_i2c_client(dev->parent); + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + struct pmbus_data *pdata = i2c_get_clientdata(client); + int status; + int page; + + page = attr->index; + mutex_lock(&pdata->update_lock); + status = pdata->read_status(client, page); + mutex_unlock(&pdata->update_lock); + if (status < 0) { + return status; + } + + return snprintf(buf, PAGE_SIZE, "0x%04x\n", status); +} + +static int pmbus_add_attribute(struct pmbus_data *data, struct attribute *attr) +{ + if (data->num_attributes >= data->max_attributes - 1) { + int new_max_attrs = data->max_attributes + PMBUS_ATTR_ALLOC_SIZE; + void *new_attrs = devm_krealloc(data->dev, data->group.attrs, + new_max_attrs * sizeof(void *), + GFP_KERNEL); + if (!new_attrs) + return -ENOMEM; + data->group.attrs = new_attrs; + data->max_attributes = new_max_attrs; + } + + data->group.attrs[data->num_attributes++] = attr; + data->group.attrs[data->num_attributes] = NULL; + return 0; +} + +static void pmbus_dev_attr_init(struct device_attribute *dev_attr, + const char *name, + umode_t mode, + ssize_t (*show)(struct device *dev, + struct device_attribute *attr, + char *buf), + ssize_t (*store)(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count)) +{ + sysfs_attr_init(&dev_attr->attr); + dev_attr->attr.name = name; + dev_attr->attr.mode = mode; + dev_attr->show = show; + dev_attr->store = store; +} + +static void pmbus_attr_init(struct sensor_device_attribute *a, + const char *name, + umode_t mode, + ssize_t (*show)(struct device *dev, + struct device_attribute *attr, + char *buf), + ssize_t (*store)(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count), + int idx) +{ + pmbus_dev_attr_init(&a->dev_attr, name, mode, show, store); + a->index = idx; +} + +static int pmbus_add_boolean(struct pmbus_data *data, + const char *name, const char *type, int seq, + struct pmbus_sensor *s1, + struct pmbus_sensor *s2, + u8 page, u16 reg, u16 mask) +{ + struct pmbus_boolean *boolean; + struct sensor_device_attribute *a; + + if (WARN((s1 && !s2) || (!s1 && s2), "Bad s1/s2 parameters\n")) + return -EINVAL; + + boolean = devm_kzalloc(data->dev, sizeof(*boolean), GFP_KERNEL); + if (!boolean) + return -ENOMEM; + + a = &boolean->attribute; + + snprintf(boolean->name, sizeof(boolean->name), "%s%d_%s", + name, seq, type); + boolean->s1 = s1; + boolean->s2 = s2; + pmbus_attr_init(a, boolean->name, 0444, pmbus_show_boolean, NULL, + pb_reg_to_index(page, reg, mask)); + + return pmbus_add_attribute(data, &a->dev_attr.attr); +} + +static struct pmbus_sensor *pmbus_add_sensor(struct pmbus_data *data, + const char *name, const char *type, + int seq, int page, int phase, + int reg, + enum pmbus_sensor_classes class, + bool update, bool readonly, + bool convert) +{ + struct pmbus_sensor *sensor; + struct device_attribute *a; + + sensor = devm_kzalloc(data->dev, sizeof(*sensor), GFP_KERNEL); + if (!sensor) + return NULL; + a = &sensor->attribute; + + if (type) + snprintf(sensor->name, sizeof(sensor->name), "%s%d_%s", + name, seq, type); + else + snprintf(sensor->name, sizeof(sensor->name), "%s%d", + name, seq); + + if (data->flags & PMBUS_WRITE_PROTECTED) + readonly = true; + + sensor->page = page; + sensor->phase = phase; + sensor->reg = reg; + sensor->class = class; + sensor->update = update; + sensor->convert = convert; + sensor->data = -ENODATA; + pmbus_dev_attr_init(a, sensor->name, + readonly ? 0444 : 0644, + pmbus_show_sensor, pmbus_set_sensor); + + if (pmbus_add_attribute(data, &a->attr)) + return NULL; + + sensor->next = data->sensors; + data->sensors = sensor; + + return sensor; +} + +static int pmbus_add_label(struct pmbus_data *data, + const char *name, int seq, + const char *lstring, int index, int phase) +{ + struct pmbus_label *label; + struct device_attribute *a; + + label = devm_kzalloc(data->dev, sizeof(*label), GFP_KERNEL); + if (!label) + return -ENOMEM; + + a = &label->attribute; + + snprintf(label->name, sizeof(label->name), "%s%d_label", name, seq); + if (!index) { + if (phase == 0xff) + strscpy(label->label, lstring, + sizeof(label->label)); + else + snprintf(label->label, sizeof(label->label), "%s.%d", + lstring, phase); + } else { + if (phase == 0xff) + snprintf(label->label, sizeof(label->label), "%s%d", + lstring, index); + else + snprintf(label->label, sizeof(label->label), "%s%d.%d", + lstring, index, phase); + } + + pmbus_dev_attr_init(a, label->name, 0444, pmbus_show_label, NULL); + return pmbus_add_attribute(data, &a->attr); +} + +static int pmbus_add_status(struct pmbus_data *data, int page) +{ + struct pmbus_attr_status *attr_status; + struct sensor_device_attribute *a; + + attr_status = devm_kzalloc(data->dev, sizeof(*attr_status), GFP_KERNEL); + if (!attr_status) + return -ENOMEM; + + snprintf(attr_status->name, sizeof(attr_status->name), "status%d", page); + a = &attr_status->attribute; + + pmbus_attr_init(a, attr_status->name, S_IRUGO, pmbus_show_status, NULL, page); + return pmbus_add_attribute(data, &a->dev_attr.attr); +} + +/* + * Search for attributes. Allocate sensors, booleans, and labels as needed. + */ + +/* + * The pmbus_limit_attr structure describes a single limit attribute + * and its associated alarm attribute. + */ +struct pmbus_limit_attr { + u16 reg; /* Limit register */ + u16 sbit; /* Alarm attribute status bit */ + bool update; /* True if register needs updates */ + bool low; /* True if low limit; for limits with compare + functions only */ + const char *attr; /* Attribute name */ + const char *alarm; /* Alarm attribute name */ +}; + +/* + * The pmbus_sensor_attr structure describes one sensor attribute. This + * description includes a reference to the associated limit attributes. + */ +struct pmbus_sensor_attr { + u16 reg; /* sensor register */ + u16 gbit; /* generic status bit */ + u8 nlimit; /* # of limit registers */ + enum pmbus_sensor_classes class;/* sensor class */ + const char *label; /* sensor label */ + bool paged; /* true if paged sensor */ + bool update; /* true if update needed */ + bool compare; /* true if compare function needed */ + u32 func; /* sensor mask */ + u32 sfunc; /* sensor status mask */ + int sreg; /* status register */ + const struct pmbus_limit_attr *limit;/* limit registers */ +}; + +/* + * Add a set of limit attributes and, if supported, the associated + * alarm attributes. + * returns 0 if no alarm register found, 1 if an alarm register was found, + * < 0 on errors. + */ +static int pmbus_add_limit_attrs(struct i2c_client *client, + struct pmbus_data *data, + const struct pmbus_driver_info *info, + const char *name, int index, int page, + struct pmbus_sensor *base, + const struct pmbus_sensor_attr *attr) +{ + const struct pmbus_limit_attr *l = attr->limit; + int nlimit = attr->nlimit; + int have_alarm = 0; + int i, ret; + struct pmbus_sensor *curr; + + for (i = 0; i < nlimit; i++) { + if (wb_pmbus_check_word_register(client, page, l->reg)) { + curr = pmbus_add_sensor(data, name, l->attr, index, + page, 0xff, l->reg, attr->class, + attr->update || l->update, + false, true); + if (!curr) + return -ENOMEM; + if (l->sbit && (info->func[page] & attr->sfunc)) { + ret = pmbus_add_boolean(data, name, + l->alarm, index, + attr->compare ? l->low ? curr : base + : NULL, + attr->compare ? l->low ? base : curr + : NULL, + page, attr->sreg, l->sbit); + if (ret) + return ret; + have_alarm = 1; + } + } + l++; + } + return have_alarm; +} + +static int pmbus_add_sensor_attrs_one(struct i2c_client *client, + struct pmbus_data *data, + const struct pmbus_driver_info *info, + const char *name, + int index, int page, int phase, + const struct pmbus_sensor_attr *attr, + bool paged) +{ + struct pmbus_sensor *base; + bool upper = !!(attr->gbit & 0xff00); /* need to check STATUS_WORD */ + int ret; + + if (attr->label) { + ret = pmbus_add_label(data, name, index, attr->label, + paged ? page + 1 : 0, phase); + if (ret) + return ret; + } + base = pmbus_add_sensor(data, name, "input", index, page, phase, + attr->reg, attr->class, true, true, true); + if (!base) + return -ENOMEM; + /* No limit and alarm attributes for phase specific sensors */ + if (attr->sfunc && phase == 0xff) { + ret = pmbus_add_limit_attrs(client, data, info, name, + index, page, base, attr); + if (ret < 0) + return ret; + /* + * Add generic alarm attribute only if there are no individual + * alarm attributes, if there is a global alarm bit, and if + * the generic status register (word or byte, depending on + * which global bit is set) for this page is accessible. + */ + if (!ret && attr->gbit && + (!upper || (upper && data->has_status_word)) && + pmbus_check_status_register(client, page)) { + ret = pmbus_add_boolean(data, name, "alarm", index, + NULL, NULL, + page, PMBUS_STATUS_WORD, + attr->gbit); + if (ret) + return ret; + } + } + return 0; +} + +static bool pmbus_sensor_is_paged(const struct pmbus_driver_info *info, + const struct pmbus_sensor_attr *attr) +{ + int p; + + if (attr->paged) + return true; + + /* + * Some attributes may be present on more than one page despite + * not being marked with the paged attribute. If that is the case, + * then treat the sensor as being paged and add the page suffix to the + * attribute name. + * We don't just add the paged attribute to all such attributes, in + * order to maintain the un-suffixed labels in the case where the + * attribute is only on page 0. + */ + for (p = 1; p < info->pages; p++) { + if (info->func[p] & attr->func) + return true; + } + return false; +} + +static int pmbus_add_status_attrs(struct i2c_client *client, struct pmbus_data *data) +{ + const struct pmbus_driver_info *info = data->info; + int i; + int ret; + + for (i = 0; i < info->pages; i++) { + ret = pmbus_add_status(data, i); + if (ret) { + return ret; + } + } + + return 0; +} + +static int pmbus_add_sensor_attrs(struct i2c_client *client, + struct pmbus_data *data, + const char *name, + const struct pmbus_sensor_attr *attrs, + int nattrs) +{ + const struct pmbus_driver_info *info = data->info; + int index, i; + int ret; + + index = 1; + for (i = 0; i < nattrs; i++) { + int page, pages; + bool paged = pmbus_sensor_is_paged(info, attrs); + + pages = paged ? info->pages : 1; + for (page = 0; page < pages; page++) { + if (!(info->func[page] & attrs->func)) + continue; + ret = pmbus_add_sensor_attrs_one(client, data, info, + name, index, page, + 0xff, attrs, paged); + if (ret) + return ret; + index++; + if (info->phases[page]) { + int phase; + + for (phase = 0; phase < info->phases[page]; + phase++) { + if (!(info->pfunc[phase] & attrs->func)) + continue; + ret = pmbus_add_sensor_attrs_one(client, + data, info, name, index, page, + phase, attrs, paged); + if (ret) + return ret; + index++; + } + } + } + attrs++; + } + return 0; +} + +static const struct pmbus_limit_attr vin_limit_attrs[] = { + { + .reg = PMBUS_VIN_UV_WARN_LIMIT, + .attr = "min", + .alarm = "min_alarm", + .sbit = PB_VOLTAGE_UV_WARNING, + }, { + .reg = PMBUS_VIN_UV_FAULT_LIMIT, + .attr = "lcrit", + .alarm = "lcrit_alarm", + .sbit = PB_VOLTAGE_UV_FAULT, + }, { + .reg = PMBUS_VIN_OV_WARN_LIMIT, + .attr = "max", + .alarm = "max_alarm", + .sbit = PB_VOLTAGE_OV_WARNING, + }, { + .reg = PMBUS_VIN_OV_FAULT_LIMIT, + .attr = "crit", + .alarm = "crit_alarm", + .sbit = PB_VOLTAGE_OV_FAULT, + }, { + .reg = PMBUS_VIRT_READ_VIN_AVG, + .update = true, + .attr = "average", + }, { + .reg = PMBUS_VIRT_READ_VIN_MIN, + .update = true, + .attr = "lowest", + }, { + .reg = PMBUS_VIRT_READ_VIN_MAX, + .update = true, + .attr = "highest", + }, { + .reg = PMBUS_VIRT_RESET_VIN_HISTORY, + .attr = "reset_history", + }, { + .reg = PMBUS_MFR_VIN_MIN, + .attr = "rated_min", + }, { + .reg = PMBUS_MFR_VIN_MAX, + .attr = "rated_max", + }, +}; + +static const struct pmbus_limit_attr vmon_limit_attrs[] = { + { + .reg = PMBUS_VIRT_VMON_UV_WARN_LIMIT, + .attr = "min", + .alarm = "min_alarm", + .sbit = PB_VOLTAGE_UV_WARNING, + }, { + .reg = PMBUS_VIRT_VMON_UV_FAULT_LIMIT, + .attr = "lcrit", + .alarm = "lcrit_alarm", + .sbit = PB_VOLTAGE_UV_FAULT, + }, { + .reg = PMBUS_VIRT_VMON_OV_WARN_LIMIT, + .attr = "max", + .alarm = "max_alarm", + .sbit = PB_VOLTAGE_OV_WARNING, + }, { + .reg = PMBUS_VIRT_VMON_OV_FAULT_LIMIT, + .attr = "crit", + .alarm = "crit_alarm", + .sbit = PB_VOLTAGE_OV_FAULT, + } +}; + +static const struct pmbus_limit_attr vout_limit_attrs[] = { + { + .reg = PMBUS_VOUT_UV_WARN_LIMIT, + .attr = "min", + .alarm = "min_alarm", + .sbit = PB_VOLTAGE_UV_WARNING, + }, { + .reg = PMBUS_VOUT_UV_FAULT_LIMIT, + .attr = "lcrit", + .alarm = "lcrit_alarm", + .sbit = PB_VOLTAGE_UV_FAULT, + }, { + .reg = PMBUS_VOUT_OV_WARN_LIMIT, + .attr = "max", + .alarm = "max_alarm", + .sbit = PB_VOLTAGE_OV_WARNING, + }, { + .reg = PMBUS_VOUT_OV_FAULT_LIMIT, + .attr = "crit", + .alarm = "crit_alarm", + .sbit = PB_VOLTAGE_OV_FAULT, + }, { + .reg = PMBUS_VIRT_READ_VOUT_AVG, + .update = true, + .attr = "average", + }, { + .reg = PMBUS_VIRT_READ_VOUT_MIN, + .update = true, + .attr = "lowest", + }, { + .reg = PMBUS_VIRT_READ_VOUT_MAX, + .update = true, + .attr = "highest", + }, { + .reg = PMBUS_VIRT_RESET_VOUT_HISTORY, + .attr = "reset_history", + }, { + .reg = PMBUS_MFR_VOUT_MIN, + .attr = "rated_min", + }, { + .reg = PMBUS_MFR_VOUT_MAX, + .attr = "rated_max", + }, +}; + +static const struct pmbus_sensor_attr voltage_attributes[] = { + { + .reg = PMBUS_READ_VIN, + .class = PSC_VOLTAGE_IN, + .label = "vin", + .func = PMBUS_HAVE_VIN, + .sfunc = PMBUS_HAVE_STATUS_INPUT, + .sreg = PMBUS_STATUS_INPUT, + .gbit = PB_STATUS_VIN_UV, + .limit = vin_limit_attrs, + .nlimit = 0, + }, { + .reg = PMBUS_VIRT_READ_VMON, + .class = PSC_VOLTAGE_IN, + .label = "vmon", + .func = PMBUS_HAVE_VMON, + .sfunc = PMBUS_HAVE_STATUS_VMON, + .sreg = PMBUS_VIRT_STATUS_VMON, + .limit = vmon_limit_attrs, + .nlimit = 0, + }, { + .reg = PMBUS_READ_VCAP, + .class = PSC_VOLTAGE_IN, + .label = "vcap", + .func = PMBUS_HAVE_VCAP, + }, { + .reg = PMBUS_READ_VOUT, + .class = PSC_VOLTAGE_OUT, + .label = "vout", + .paged = true, + .func = PMBUS_HAVE_VOUT, + .sfunc = PMBUS_HAVE_STATUS_VOUT, + .sreg = PMBUS_STATUS_VOUT, + .gbit = PB_STATUS_VOUT_OV, + .limit = vout_limit_attrs, + .nlimit = 0, + } +}; + +/* Current attributes */ + +static const struct pmbus_limit_attr iin_limit_attrs[] = { + { + .reg = PMBUS_IIN_OC_WARN_LIMIT, + .attr = "max", + .alarm = "max_alarm", + .sbit = PB_IIN_OC_WARNING, + }, { + .reg = PMBUS_IIN_OC_FAULT_LIMIT, + .attr = "crit", + .alarm = "crit_alarm", + .sbit = PB_IIN_OC_FAULT, + }, { + .reg = PMBUS_VIRT_READ_IIN_AVG, + .update = true, + .attr = "average", + }, { + .reg = PMBUS_VIRT_READ_IIN_MIN, + .update = true, + .attr = "lowest", + }, { + .reg = PMBUS_VIRT_READ_IIN_MAX, + .update = true, + .attr = "highest", + }, { + .reg = PMBUS_VIRT_RESET_IIN_HISTORY, + .attr = "reset_history", + }, { + .reg = PMBUS_MFR_IIN_MAX, + .attr = "rated_max", + }, +}; + +static const struct pmbus_limit_attr iout_limit_attrs[] = { + { + .reg = PMBUS_IOUT_OC_WARN_LIMIT, + .attr = "max", + .alarm = "max_alarm", + .sbit = PB_IOUT_OC_WARNING, + }, { + .reg = PMBUS_IOUT_UC_FAULT_LIMIT, + .attr = "lcrit", + .alarm = "lcrit_alarm", + .sbit = PB_IOUT_UC_FAULT, + }, { + .reg = PMBUS_IOUT_OC_FAULT_LIMIT, + .attr = "crit", + .alarm = "crit_alarm", + .sbit = PB_IOUT_OC_FAULT, + }, { + .reg = PMBUS_VIRT_READ_IOUT_AVG, + .update = true, + .attr = "average", + }, { + .reg = PMBUS_VIRT_READ_IOUT_MIN, + .update = true, + .attr = "lowest", + }, { + .reg = PMBUS_VIRT_READ_IOUT_MAX, + .update = true, + .attr = "highest", + }, { + .reg = PMBUS_VIRT_RESET_IOUT_HISTORY, + .attr = "reset_history", + }, { + .reg = PMBUS_MFR_IOUT_MAX, + .attr = "rated_max", + }, +}; + +static const struct pmbus_sensor_attr current_attributes[] = { + { + .reg = PMBUS_READ_IIN, + .class = PSC_CURRENT_IN, + .label = "iin", + .func = PMBUS_HAVE_IIN, + .sfunc = PMBUS_HAVE_STATUS_INPUT, + .sreg = PMBUS_STATUS_INPUT, + .gbit = PB_STATUS_INPUT, + .limit = iin_limit_attrs, + .nlimit = 0, + }, { + .reg = PMBUS_READ_IOUT, + .class = PSC_CURRENT_OUT, + .label = "iout", + .paged = true, + .func = PMBUS_HAVE_IOUT, + .sfunc = PMBUS_HAVE_STATUS_IOUT, + .sreg = PMBUS_STATUS_IOUT, + .gbit = PB_STATUS_IOUT_OC, + .limit = iout_limit_attrs, + .nlimit = 0, + } +}; + +/* Power attributes */ + +static const struct pmbus_limit_attr pin_limit_attrs[] = { + { + .reg = PMBUS_PIN_OP_WARN_LIMIT, + .attr = "max", + .alarm = "alarm", + .sbit = PB_PIN_OP_WARNING, + }, { + .reg = PMBUS_VIRT_READ_PIN_AVG, + .update = true, + .attr = "average", + }, { + .reg = PMBUS_VIRT_READ_PIN_MIN, + .update = true, + .attr = "input_lowest", + }, { + .reg = PMBUS_VIRT_READ_PIN_MAX, + .update = true, + .attr = "input_highest", + }, { + .reg = PMBUS_VIRT_RESET_PIN_HISTORY, + .attr = "reset_history", + }, { + .reg = PMBUS_MFR_PIN_MAX, + .attr = "rated_max", + }, +}; + +static const struct pmbus_limit_attr pout_limit_attrs[] = { + { + .reg = PMBUS_POUT_MAX, + .attr = "cap", + .alarm = "cap_alarm", + .sbit = PB_POWER_LIMITING, + }, { + .reg = PMBUS_POUT_OP_WARN_LIMIT, + .attr = "max", + .alarm = "max_alarm", + .sbit = PB_POUT_OP_WARNING, + }, { + .reg = PMBUS_POUT_OP_FAULT_LIMIT, + .attr = "crit", + .alarm = "crit_alarm", + .sbit = PB_POUT_OP_FAULT, + }, { + .reg = PMBUS_VIRT_READ_POUT_AVG, + .update = true, + .attr = "average", + }, { + .reg = PMBUS_VIRT_READ_POUT_MIN, + .update = true, + .attr = "input_lowest", + }, { + .reg = PMBUS_VIRT_READ_POUT_MAX, + .update = true, + .attr = "input_highest", + }, { + .reg = PMBUS_VIRT_RESET_POUT_HISTORY, + .attr = "reset_history", + }, { + .reg = PMBUS_MFR_POUT_MAX, + .attr = "rated_max", + }, +}; + +static const struct pmbus_sensor_attr power_attributes[] = { + { + .reg = PMBUS_READ_PIN, + .class = PSC_POWER, + .label = "pin", + .func = PMBUS_HAVE_PIN, + .sfunc = PMBUS_HAVE_STATUS_INPUT, + .sreg = PMBUS_STATUS_INPUT, + .gbit = PB_STATUS_INPUT, + .limit = pin_limit_attrs, + .nlimit = 0, + }, { + .reg = PMBUS_READ_POUT, + .class = PSC_POWER, + .label = "pout", + .paged = true, + .func = PMBUS_HAVE_POUT, + .sfunc = PMBUS_HAVE_STATUS_IOUT, + .sreg = PMBUS_STATUS_IOUT, + .limit = pout_limit_attrs, + .nlimit = 0, + } +}; + +/* Temperature atributes */ + +static const struct pmbus_limit_attr temp_limit_attrs[] = { + { + .reg = PMBUS_UT_WARN_LIMIT, + .low = true, + .attr = "min", + .alarm = "min_alarm", + .sbit = PB_TEMP_UT_WARNING, + }, { + .reg = PMBUS_UT_FAULT_LIMIT, + .low = true, + .attr = "lcrit", + .alarm = "lcrit_alarm", + .sbit = PB_TEMP_UT_FAULT, + }, { + .reg = PMBUS_OT_WARN_LIMIT, + .attr = "max", + .alarm = "max_alarm", + .sbit = PB_TEMP_OT_WARNING, + }, { + .reg = PMBUS_OT_FAULT_LIMIT, + .attr = "crit", + .alarm = "crit_alarm", + .sbit = PB_TEMP_OT_FAULT, + }, { + .reg = PMBUS_VIRT_READ_TEMP_MIN, + .attr = "lowest", + }, { + .reg = PMBUS_VIRT_READ_TEMP_AVG, + .attr = "average", + }, { + .reg = PMBUS_VIRT_READ_TEMP_MAX, + .attr = "highest", + }, { + .reg = PMBUS_VIRT_RESET_TEMP_HISTORY, + .attr = "reset_history", + }, { + .reg = PMBUS_MFR_MAX_TEMP_1, + .attr = "rated_max", + }, +}; + +static const struct pmbus_limit_attr temp_limit_attrs2[] = { + { + .reg = PMBUS_UT_WARN_LIMIT, + .low = true, + .attr = "min", + .alarm = "min_alarm", + .sbit = PB_TEMP_UT_WARNING, + }, { + .reg = PMBUS_UT_FAULT_LIMIT, + .low = true, + .attr = "lcrit", + .alarm = "lcrit_alarm", + .sbit = PB_TEMP_UT_FAULT, + }, { + .reg = PMBUS_OT_WARN_LIMIT, + .attr = "max", + .alarm = "max_alarm", + .sbit = PB_TEMP_OT_WARNING, + }, { + .reg = PMBUS_OT_FAULT_LIMIT, + .attr = "crit", + .alarm = "crit_alarm", + .sbit = PB_TEMP_OT_FAULT, + }, { + .reg = PMBUS_VIRT_READ_TEMP2_MIN, + .attr = "lowest", + }, { + .reg = PMBUS_VIRT_READ_TEMP2_AVG, + .attr = "average", + }, { + .reg = PMBUS_VIRT_READ_TEMP2_MAX, + .attr = "highest", + }, { + .reg = PMBUS_VIRT_RESET_TEMP2_HISTORY, + .attr = "reset_history", + }, { + .reg = PMBUS_MFR_MAX_TEMP_2, + .attr = "rated_max", + }, +}; + +static const struct pmbus_limit_attr temp_limit_attrs3[] = { + { + .reg = PMBUS_UT_WARN_LIMIT, + .low = true, + .attr = "min", + .alarm = "min_alarm", + .sbit = PB_TEMP_UT_WARNING, + }, { + .reg = PMBUS_UT_FAULT_LIMIT, + .low = true, + .attr = "lcrit", + .alarm = "lcrit_alarm", + .sbit = PB_TEMP_UT_FAULT, + }, { + .reg = PMBUS_OT_WARN_LIMIT, + .attr = "max", + .alarm = "max_alarm", + .sbit = PB_TEMP_OT_WARNING, + }, { + .reg = PMBUS_OT_FAULT_LIMIT, + .attr = "crit", + .alarm = "crit_alarm", + .sbit = PB_TEMP_OT_FAULT, + }, { + .reg = PMBUS_MFR_MAX_TEMP_3, + .attr = "rated_max", + }, +}; + +static const struct pmbus_sensor_attr temp_attributes[] = { + { + .reg = PMBUS_READ_TEMPERATURE_1, + .class = PSC_TEMPERATURE, + .paged = true, + .update = true, + .compare = true, + .func = PMBUS_HAVE_TEMP, + .sfunc = PMBUS_HAVE_STATUS_TEMP, + .sreg = PMBUS_STATUS_TEMPERATURE, + .gbit = PB_STATUS_TEMPERATURE, + .limit = temp_limit_attrs, + .nlimit = 0, + }, { + .reg = PMBUS_READ_TEMPERATURE_2, + .class = PSC_TEMPERATURE, + .paged = true, + .update = true, + .compare = true, + .func = PMBUS_HAVE_TEMP2, + .sfunc = PMBUS_HAVE_STATUS_TEMP, + .sreg = PMBUS_STATUS_TEMPERATURE, + .gbit = PB_STATUS_TEMPERATURE, + .limit = temp_limit_attrs2, + .nlimit = 0, + }, { + .reg = PMBUS_READ_TEMPERATURE_3, + .class = PSC_TEMPERATURE, + .paged = true, + .update = true, + .compare = true, + .func = PMBUS_HAVE_TEMP3, + .sfunc = PMBUS_HAVE_STATUS_TEMP, + .sreg = PMBUS_STATUS_TEMPERATURE, + .gbit = PB_STATUS_TEMPERATURE, + .limit = temp_limit_attrs3, + .nlimit = 0, + } +}; + +static const int pmbus_fan_registers[] = { + PMBUS_READ_FAN_SPEED_1, + PMBUS_READ_FAN_SPEED_2, + PMBUS_READ_FAN_SPEED_3, + PMBUS_READ_FAN_SPEED_4 +}; + +static const int pmbus_fan_status_registers[] = { + PMBUS_STATUS_FAN_12, + PMBUS_STATUS_FAN_12, + PMBUS_STATUS_FAN_34, + PMBUS_STATUS_FAN_34 +}; + +static const u32 pmbus_fan_flags[] = { + PMBUS_HAVE_FAN12, + PMBUS_HAVE_FAN12, + PMBUS_HAVE_FAN34, + PMBUS_HAVE_FAN34 +}; + +static const u32 pmbus_fan_status_flags[] = { + PMBUS_HAVE_STATUS_FAN12, + PMBUS_HAVE_STATUS_FAN12, + PMBUS_HAVE_STATUS_FAN34, + PMBUS_HAVE_STATUS_FAN34 +}; + +/* Fans */ + +/* Precondition: FAN_CONFIG_x_y and FAN_COMMAND_x must exist for the fan ID */ +static int pmbus_add_fan_ctrl(struct i2c_client *client, + struct pmbus_data *data, int index, int page, int id, + u8 config) +{ + struct pmbus_sensor *sensor; + + sensor = pmbus_add_sensor(data, "fan", "target", index, page, + 0xff, PMBUS_VIRT_FAN_TARGET_1 + id, PSC_FAN, + false, false, true); + + if (!sensor) + return -ENOMEM; + + if (!((data->info->func[page] & PMBUS_HAVE_PWM12) || + (data->info->func[page] & PMBUS_HAVE_PWM34))) + return 0; + + sensor = pmbus_add_sensor(data, "pwm", NULL, index, page, + 0xff, PMBUS_VIRT_PWM_1 + id, PSC_PWM, + false, false, true); + + if (!sensor) + return -ENOMEM; + + sensor = pmbus_add_sensor(data, "pwm", "enable", index, page, + 0xff, PMBUS_VIRT_PWM_ENABLE_1 + id, PSC_PWM, + true, false, false); + + if (!sensor) + return -ENOMEM; + + return 0; +} + +static int pmbus_add_fan_attributes(struct i2c_client *client, + struct pmbus_data *data) +{ + const struct pmbus_driver_info *info = data->info; + int index = 1; + int page; + int ret; + + for (page = 0; page < info->pages; page++) { + int f; + + for (f = 0; f < ARRAY_SIZE(pmbus_fan_registers); f++) { + int regval; + + if (!(info->func[page] & pmbus_fan_flags[f])) + break; + + if (!wb_pmbus_check_word_register(client, page, + pmbus_fan_registers[f])) + break; + + /* + * Skip fan if not installed. + * Each fan configuration register covers multiple fans, + * so we have to do some magic. + */ + regval = _pmbus_read_byte_data(client, page, + pmbus_fan_config_registers[f]); + if (regval < 0 || + (!(regval & (PB_FAN_1_INSTALLED >> ((f & 1) * 4))))) + continue; + + if (pmbus_add_sensor(data, "fan", "input", index, + page, 0xff, pmbus_fan_registers[f], + PSC_FAN, true, true, true) == NULL) + return -ENOMEM; + + /* Fan control */ + if (wb_pmbus_check_word_register(client, page, + pmbus_fan_command_registers[f])) { + ret = pmbus_add_fan_ctrl(client, data, index, + page, f, regval); + if (ret < 0) + return ret; + } + + /* + * Each fan status register covers multiple fans, + * so we have to do some magic. + */ + if ((info->func[page] & pmbus_fan_status_flags[f]) && + wb_pmbus_check_byte_register(client, + page, pmbus_fan_status_registers[f])) { + int reg; + + if (f > 1) /* fan 3, 4 */ + reg = PMBUS_STATUS_FAN_34; + else + reg = PMBUS_STATUS_FAN_12; + ret = pmbus_add_boolean(data, "fan", + "alarm", index, NULL, NULL, page, reg, + PB_FAN_FAN1_WARNING >> (f & 1)); + if (ret) + return ret; + ret = pmbus_add_boolean(data, "fan", + "fault", index, NULL, NULL, page, reg, + PB_FAN_FAN1_FAULT >> (f & 1)); + if (ret) + return ret; + } + index++; + } + } + return 0; +} + +struct pmbus_samples_attr { + int reg; + char *name; +}; + +struct pmbus_samples_reg { + int page; + struct pmbus_samples_attr *attr; + struct device_attribute dev_attr; +}; + +static struct pmbus_samples_attr pmbus_samples_registers[] = { + { + .reg = PMBUS_VIRT_SAMPLES, + .name = "samples", + }, { + .reg = PMBUS_VIRT_IN_SAMPLES, + .name = "in_samples", + }, { + .reg = PMBUS_VIRT_CURR_SAMPLES, + .name = "curr_samples", + }, { + .reg = PMBUS_VIRT_POWER_SAMPLES, + .name = "power_samples", + }, { + .reg = PMBUS_VIRT_TEMP_SAMPLES, + .name = "temp_samples", + } +}; + +#define to_samples_reg(x) container_of(x, struct pmbus_samples_reg, dev_attr) + +static ssize_t pmbus_show_samples(struct device *dev, + struct device_attribute *devattr, char *buf) +{ + int val; + struct i2c_client *client = to_i2c_client(dev->parent); + struct pmbus_samples_reg *reg = to_samples_reg(devattr); + struct pmbus_data *data = i2c_get_clientdata(client); + + mutex_lock(&data->update_lock); + val = _pmbus_read_word_data(client, reg->page, 0xff, reg->attr->reg); + mutex_unlock(&data->update_lock); + if (val < 0) + return val; + + return snprintf(buf, PAGE_SIZE, "%d\n", val); +} + +static ssize_t pmbus_set_samples(struct device *dev, + struct device_attribute *devattr, + const char *buf, size_t count) +{ + int ret; + long val; + struct i2c_client *client = to_i2c_client(dev->parent); + struct pmbus_samples_reg *reg = to_samples_reg(devattr); + struct pmbus_data *data = i2c_get_clientdata(client); + + if (kstrtol(buf, 0, &val) < 0) + return -EINVAL; + + mutex_lock(&data->update_lock); + ret = _pmbus_write_word_data(client, reg->page, reg->attr->reg, val); + mutex_unlock(&data->update_lock); + + return ret ? : count; +} + +static int pmbus_add_samples_attr(struct pmbus_data *data, int page, + struct pmbus_samples_attr *attr) +{ + struct pmbus_samples_reg *reg; + + reg = devm_kzalloc(data->dev, sizeof(*reg), GFP_KERNEL); + if (!reg) + return -ENOMEM; + + reg->attr = attr; + reg->page = page; + + pmbus_dev_attr_init(®->dev_attr, attr->name, 0644, + pmbus_show_samples, pmbus_set_samples); + + return pmbus_add_attribute(data, ®->dev_attr.attr); +} + +static int pmbus_add_samples_attributes(struct i2c_client *client, + struct pmbus_data *data) +{ + const struct pmbus_driver_info *info = data->info; + int s; + + if (!(info->func[0] & PMBUS_HAVE_SAMPLES)) + return 0; + + for (s = 0; s < ARRAY_SIZE(pmbus_samples_registers); s++) { + struct pmbus_samples_attr *attr; + int ret; + + attr = &pmbus_samples_registers[s]; + if (!wb_pmbus_check_word_register(client, 0, attr->reg)) + continue; + + ret = pmbus_add_samples_attr(data, 0, attr); + if (ret) + return ret; + } + + return 0; +} + +static int pmbus_find_attributes(struct i2c_client *client, + struct pmbus_data *data) +{ + int ret; + + /* status attrs */ + ret = pmbus_add_status_attrs(client, data); + if (ret) + return ret; + + /* Voltage sensors */ + ret = pmbus_add_sensor_attrs(client, data, "in", voltage_attributes, + ARRAY_SIZE(voltage_attributes)); + if (ret) + return ret; + + /* Current sensors */ + ret = pmbus_add_sensor_attrs(client, data, "curr", current_attributes, + ARRAY_SIZE(current_attributes)); + if (ret) + return ret; + + /* Power sensors */ + ret = pmbus_add_sensor_attrs(client, data, "power", power_attributes, + ARRAY_SIZE(power_attributes)); + if (ret) + return ret; + + /* Temperature sensors */ + ret = pmbus_add_sensor_attrs(client, data, "temp", temp_attributes, + ARRAY_SIZE(temp_attributes)); + if (ret) + return ret; + + /* Fans */ + ret = pmbus_add_fan_attributes(client, data); + if (ret) + return ret; + + ret = pmbus_add_samples_attributes(client, data); + return ret; +} + +/* + * Identify chip parameters. + * This function is called for all chips. + */ +static int pmbus_identify_common(struct i2c_client *client, + struct pmbus_data *data, int page) +{ + int vout_mode = -1; + + if (wb_pmbus_check_byte_register(client, page, PMBUS_VOUT_MODE)) + vout_mode = _pmbus_read_byte_data(client, page, + PMBUS_VOUT_MODE); + if (vout_mode >= 0 && vout_mode != 0xff) { + /* + * Not all chips support the VOUT_MODE command, + * so a failure to read it is not an error. + */ + switch (vout_mode >> 5) { + case 0: /* linear mode */ + if (data->info->format[PSC_VOLTAGE_OUT] != linear) + return -ENODEV; + + data->exponent[page] = ((s8)(vout_mode << 3)) >> 3; + break; + case 1: /* VID mode */ + if (data->info->format[PSC_VOLTAGE_OUT] != vid) + return -ENODEV; + break; + case 2: /* direct mode */ + if (data->info->format[PSC_VOLTAGE_OUT] != direct) + return -ENODEV; + break; + default: + return -ENODEV; + } + } + + pmbus_clear_fault_page(client, page); + return 0; +} + +static int pmbus_init_common(struct i2c_client *client, struct pmbus_data *data, + struct pmbus_driver_info *info) +{ + struct device *dev = &client->dev; + int page, ret, i; + + /* + * Some PMBus chips don't support PMBUS_STATUS_WORD, so try + * to use PMBUS_STATUS_BYTE instead if that is the case. + * Bail out if both registers are not supported. + */ + for(i = 0; i < PMBUS_RETRY_TIME; i++) { + data->read_status = pmbus_read_status_word; + (void)i2c_smbus_write_byte_data(client, PMBUS_PAGE, 0); + ret = i2c_smbus_read_word_data(client, PMBUS_STATUS_WORD); + if (ret < 0 || ret == 0xffff) { + data->read_status = pmbus_read_status_byte; + ret = i2c_smbus_read_byte_data(client, PMBUS_STATUS_BYTE); + if (ret < 0 || ret == 0xff) { + usleep_range(PMBUS_RETRY_SLEEP_TIME, PMBUS_RETRY_SLEEP_TIME + 1); + continue; + } + } else { + data->has_status_word = true; + } + break; + } + + if(i == PMBUS_RETRY_TIME) { + dev_info(dev, "PMBus status register not found\n"); + return -ENODEV; + } + + /* Enable PEC if the controller supports it */ + for(i = 0; i < PMBUS_RETRY_TIME; i++) { + ret = i2c_smbus_read_byte_data(client, PMBUS_CAPABILITY); + if (ret >= 0) { + break; + } + usleep_range(PMBUS_RETRY_SLEEP_TIME, PMBUS_RETRY_SLEEP_TIME + 1); + } + + if (ret >= 0 && (ret & PB_CAPABILITY_ERROR_CHECK)) + client->flags |= I2C_CLIENT_PEC; + + /* + * Check if the chip is write protected. If it is, we can not clear + * faults, and we should not try it. Also, in that case, writes into + * limit registers need to be disabled. + */ + for(i = 0; i < PMBUS_RETRY_TIME; i++) { + ret = i2c_smbus_read_byte_data(client, PMBUS_WRITE_PROTECT); + if (ret >= 0) { + break; + } + usleep_range(PMBUS_RETRY_SLEEP_TIME, PMBUS_RETRY_SLEEP_TIME + 1); + } + + if (ret > 0 && (ret & PB_WP_ANY)) + data->flags |= PMBUS_WRITE_PROTECTED | PMBUS_SKIP_STATUS_CHECK; + + if (data->info->pages) + wb_pmbus_clear_faults(client); + else + pmbus_clear_fault_page(client, -1); + + if (info->identify) { + ret = (*info->identify)(client, info); + if (ret < 0) { + dev_info(dev, "Chip identification failed\n"); + return ret; + } + } + + if (info->pages <= 0 || info->pages > PMBUS_PAGES) { + dev_info(dev, "Bad number of PMBus pages: %d\n", info->pages); + return -ENODEV; + } + + for (page = 0; page < info->pages; page++) { + ret = pmbus_identify_common(client, data, page); + if (ret < 0) { + dev_info(dev, "Failed to identify chip capabilities\n"); + return ret; + } + } + return 0; +} + +static int buf_to_data(int data_type, u8 *data_buf, int data_len, u64 *val) +{ + int i; + u64 val_tmp; + + if ((data_len < 0) || (data_len > sizeof(val_tmp))) { + return -1; + } + + val_tmp = 0; + if (data_type == LE_DATA) { + for (i = 0; i < data_len; i++) { + val_tmp |= (data_buf[i] << (i * 8)); + } + } else { + for (i = 0; i < data_len; i++) { + val_tmp |= data_buf[i] << (8 * (data_len -i - 1)); + } + + } + + *val = val_tmp; + return 0; +} + +static int reg2sensor_class(int reg, int *sensor_class, char *unit, int len) +{ + switch(reg) { + /* VIN and VIN limit */ + case PMBUS_READ_VIN: + case PMBUS_VIN_UV_WARN_LIMIT: + case PMBUS_VIN_UV_FAULT_LIMIT: + case PMBUS_VIN_OV_WARN_LIMIT: + case PMBUS_VIN_OV_FAULT_LIMIT: + case PMBUS_VIRT_READ_VIN_AVG: + case PMBUS_VIRT_READ_VIN_MIN: + case PMBUS_VIRT_READ_VIN_MAX: + case PMBUS_VIRT_RESET_VIN_HISTORY: + case PMBUS_MFR_VIN_MIN: + case PMBUS_MFR_VIN_MAX: + /* VMON and VMON limit */ + case PMBUS_VIRT_READ_VMON: + case PMBUS_VIRT_VMON_UV_WARN_LIMIT: + case PMBUS_VIRT_VMON_UV_FAULT_LIMIT: + case PMBUS_VIRT_VMON_OV_WARN_LIMIT: + case PMBUS_VIRT_VMON_OV_FAULT_LIMIT: + /* VCAP */ + case PMBUS_READ_VCAP: + *sensor_class = PSC_VOLTAGE_IN; + snprintf(unit, len, "V"); + break; + /* VOUT and VOUT limit */ + case PMBUS_READ_VOUT: + case PMBUS_VOUT_UV_WARN_LIMIT: + case PMBUS_VOUT_UV_FAULT_LIMIT: + case PMBUS_VOUT_OV_WARN_LIMIT: + case PMBUS_VOUT_OV_FAULT_LIMIT: + case PMBUS_VIRT_READ_VOUT_AVG: + case PMBUS_VIRT_READ_VOUT_MIN: + case PMBUS_VIRT_READ_VOUT_MAX: + case PMBUS_VIRT_RESET_VOUT_HISTORY: + case PMBUS_MFR_VOUT_MIN: + case PMBUS_MFR_VOUT_MAX: + *sensor_class = PSC_VOLTAGE_OUT; + snprintf(unit, len, "V"); + break; + /* IIN and IIN limit*/ + case PMBUS_READ_IIN: + case PMBUS_IIN_OC_WARN_LIMIT: + case PMBUS_IIN_OC_FAULT_LIMIT: + case PMBUS_VIRT_READ_IIN_AVG: + case PMBUS_VIRT_READ_IIN_MIN: + case PMBUS_VIRT_READ_IIN_MAX: + case PMBUS_VIRT_RESET_IIN_HISTORY: + case PMBUS_MFR_IIN_MAX: + *sensor_class = PSC_CURRENT_IN; + snprintf(unit, len, "A"); + break; + /* IOUT and IOUT limit */ + case PMBUS_READ_IOUT: + case PMBUS_IOUT_OC_WARN_LIMIT: + case PMBUS_IOUT_UC_FAULT_LIMIT: + case PMBUS_IOUT_OC_FAULT_LIMIT: + case PMBUS_VIRT_READ_IOUT_AVG: + case PMBUS_VIRT_READ_IOUT_MIN: + case PMBUS_VIRT_READ_IOUT_MAX: + case PMBUS_VIRT_RESET_IOUT_HISTORY: + case PMBUS_MFR_IOUT_MAX: + *sensor_class = PSC_CURRENT_OUT; + snprintf(unit, len, "A"); + break; + /* PIN and PIN limit */ + case PMBUS_READ_PIN: + case PMBUS_VIRT_READ_PIN_AVG: + case PMBUS_VIRT_READ_PIN_MIN: + case PMBUS_VIRT_READ_PIN_MAX: + case PMBUS_VIRT_RESET_PIN_HISTORY: + case PMBUS_MFR_PIN_MAX: + /* POUT and POUT limit */ + case PMBUS_READ_POUT: + case PMBUS_POUT_MAX: + case PMBUS_POUT_OP_WARN_LIMIT: + case PMBUS_POUT_OP_FAULT_LIMIT: + case PMBUS_VIRT_READ_POUT_AVG: + case PMBUS_VIRT_READ_POUT_MIN: + case PMBUS_VIRT_READ_POUT_MAX: + case PMBUS_VIRT_RESET_POUT_HISTORY: + case PMBUS_MFR_POUT_MAX: + *sensor_class = PSC_POWER; + snprintf(unit, len, "W"); + break; + /* TEMP1 and TEMP1 limit */ + case PMBUS_READ_TEMPERATURE_1: + case PMBUS_UT_WARN_LIMIT: + case PMBUS_UT_FAULT_LIMIT: + case PMBUS_OT_WARN_LIMIT: + case PMBUS_OT_FAULT_LIMIT: + case PMBUS_VIRT_READ_TEMP_MIN: + case PMBUS_VIRT_READ_TEMP_AVG: + case PMBUS_VIRT_READ_TEMP_MAX: + case PMBUS_VIRT_RESET_TEMP_HISTORY: + case PMBUS_MFR_MAX_TEMP_1: + /* TEMP2 and TEMP2 limit */ + case PMBUS_READ_TEMPERATURE_2: + case PMBUS_VIRT_READ_TEMP2_MIN: + case PMBUS_VIRT_READ_TEMP2_AVG: + case PMBUS_VIRT_READ_TEMP2_MAX: + case PMBUS_VIRT_RESET_TEMP2_HISTORY: + case PMBUS_MFR_MAX_TEMP_2: + /* TEMP3 and TEMP3 limit */ + case PMBUS_READ_TEMPERATURE_3: + case PMBUS_MFR_MAX_TEMP_3: + *sensor_class = PSC_TEMPERATURE; + snprintf(unit, len, "C"); + break; + /* FAN */ + case PMBUS_READ_FAN_SPEED_1: + case PMBUS_READ_FAN_SPEED_2: + case PMBUS_READ_FAN_SPEED_3: + case PMBUS_READ_FAN_SPEED_4: + case PMBUS_VIRT_FAN_TARGET_1: + case PMBUS_VIRT_FAN_TARGET_2: + case PMBUS_VIRT_FAN_TARGET_3: + case PMBUS_VIRT_FAN_TARGET_4: + *sensor_class = PSC_FAN; + snprintf(unit, len, "RPM"); + break; + default: + return -EOPNOTSUPP; + } + + return 0; +} + +/* +* Removes trailing spaces from the end of a given string. +* @param str The string from which to remove trailing spaces. +*/ +static void trim_trailing_spaces(char *str) +{ + int i, len; + + if (str == NULL) { + return; + } + + len = strlen(str); + if (len == 0) { + return; + } + + /* Use a for loop to iterate from the end of the string to the beginning */ + for (i = len - 1; i >= 0; --i) { + if (str[i] != ' ') { + /* If a non-space character is found, break the loop */ + break; + } + str[i] = '\0'; /* Replace the space with the null terminator */ + } +} + +int get_pmbus_sensor_data(struct pmbus_data *data, pmbus_info_t *info, char *buf, int buf_len) +{ + struct pmbus_sensor sensor; + int sensor_class; + s64 val, div_result; + s32 div_mod; + int ret; + + char val_str[MAX_UNIT_LEN]; + + if ((data == NULL) || (info == NULL) || (buf == NULL) || (buf_len <= 0)) { + return -EINVAL; + } + + mem_clear(val_str, sizeof(val_str)); + mem_clear(buf, buf_len); + ret = reg2sensor_class(info->pmbus_reg, &sensor_class, info->unit, sizeof(info->unit)); + if (ret < 0) { + return scnprintf(buf, buf_len, "%-15s (0x%02X) : Convert pmbus sensor data failed, raw data 0x%04X\n", + info->pmbus_name, info->pmbus_reg, info->reg_val); + } + mem_clear(&sensor, sizeof(struct pmbus_sensor)); + sensor.convert = true; + sensor.class = sensor_class; + sensor.page = info->pmbus_page; + sensor.reg = info->pmbus_reg; + sensor.data =info->reg_val; + val = pmbus_reg2data(data, &sensor); + + if (sensor_class == PSC_FAN) { + scnprintf(val_str, sizeof(val_str), "%lld %s", val, info->unit); + return scnprintf(buf, buf_len, "%-15s (0x%02X) : %-13s (0x%04X)\n", + info->pmbus_name, info->pmbus_reg, val_str, info->reg_val); + } + + /* Convert the power unit from uW to mW */ + if (sensor_class == PSC_POWER) { + val = div_s64(val, 1000LL); + } + /* Keep it to three decimal places. */ + /* val = div_s64(val * PMBUS_SENSOR_COEFFICIENT, 1000LL); */ + + div_result = div_s64_rem(val, PMBUS_SENSOR_COEFFICIENT, &div_mod); + + scnprintf(val_str, sizeof(val_str), "%lld.%03d %s", div_result, div_mod, info->unit); + return scnprintf(buf, buf_len, "%-15s (0x%02X) : %-13s (0x%04X)\n", + info->pmbus_name, info->pmbus_reg, val_str, info->reg_val); +} +EXPORT_SYMBOL_GPL(get_pmbus_sensor_data); + +static int get_pmbus_info_single(struct i2c_client *client, char *buf, int buf_len, pmbus_info_t *info) +{ + int ret, tmp_value, size, i, offset = 0; + char block_data[I2C_SMBUS_BLOCK_MAX + 2] = { 0 }; + u64 val; + struct pmbus_data *data = i2c_get_clientdata(client); + struct device *dev = &client->dev; + char val_str[MAX_RW_LEN]; + + mem_clear(val_str, sizeof(val_str)); + mem_clear(buf, buf_len); + switch (info->width) { + case BLOCK_DATA: + tmp_value = wb_pmbus_read_block_data(client, info->pmbus_page, info->pmbus_reg, block_data); + break; + case BYTE_DATA: + tmp_value = _pmbus_read_byte_data(client, info->pmbus_page, info->pmbus_reg); + break; + case WORD_DATA: + tmp_value = _pmbus_read_word_data(client, info->pmbus_page, 0xff, info->pmbus_reg); + break; + default: + if ((info->width <= 0) || (info->width > I2C_SMBUS_BLOCK_MAX)) { + dev_dbg(dev, "%s page: %d, reg addr: 0x%02x, Invalid width: %d\n", + info->pmbus_name, info->pmbus_page, info->pmbus_reg, info->width); + return scnprintf(buf, buf_len, "%-15s (0x%02X) : Invalid width: %d\n", + info->pmbus_name, info->pmbus_reg, info->width); + } + tmp_value = wb_pmbus_read_i2c_block_data(client, info->pmbus_page, info->pmbus_reg, info->width, block_data); + break; + } + if (tmp_value < 0) { + dev_dbg(dev, "%s page: %d, reg addr: 0x%02x, read failed, ret: %d\n", + info->pmbus_name, info->pmbus_page, info->pmbus_reg, tmp_value); + if (tmp_value == -PMBUS_SYSFS_RV_UNSUPPORT) { + return scnprintf(buf, buf_len, "%-15s (0x%02X) : %s\n", + info->pmbus_name, info->pmbus_reg, PMBUS_READ_NO_SUPPORT); + } + return scnprintf(buf, buf_len, "%-15s (0x%02X) : %s\n", + info->pmbus_name, info->pmbus_reg, PMBUS_READ_FAIL); + } + + dev_dbg(dev, "%s page: %d, reg addr: 0x%02x, read success, ret: %d\n", + info->pmbus_name, info->pmbus_page, info->pmbus_reg, tmp_value); + + switch (info->data_type) { + case RAWDATA_BYTE: + size = scnprintf(buf, buf_len, "%-15s (0x%02X) : 0x%02X\n", + info->pmbus_name, info->pmbus_reg, tmp_value); + break; + case RAWDATA_WORD: + size = scnprintf(buf, buf_len, "%-15s (0x%02X) : 0x%04X\n", + info->pmbus_name, info->pmbus_reg, tmp_value); + break; + case RAWDATA_BUF: + offset += scnprintf(buf + offset, buf_len - offset, "%-15s (0x%02X) : ", + info->pmbus_name, info->pmbus_reg); + for (i = 0; i < info->width; i++) { + offset += scnprintf(buf + offset, buf_len - offset, "0x%02X ", block_data[i]); + } + buf[offset] = '\n'; + size = strlen(buf); + break; + case STRING_DATA: + trim_trailing_spaces(block_data); + size = scnprintf(buf, buf_len, "%-15s (0x%02X) : %s\n", + info->pmbus_name, info->pmbus_reg, block_data); + break; + case LE_DATA: + case BE_DATA: + ret = buf_to_data(info->data_type, block_data, info->width, &val); + if (ret < 0) { + size = scnprintf(buf, buf_len, "%-15s (0x%02X) : Invalid data width: %d, can't converted to value\n", + info->pmbus_name, info->pmbus_reg, info->width); + + } else { + scnprintf(val_str, sizeof(val_str), "%llu %s", val, info->unit); + size = scnprintf(buf, buf_len, "%-15s (0x%02X) : %-12s (", + info->pmbus_name, info->pmbus_reg, val_str); + for (i = 0; i < info->width; i++) { + if (i == (info->width - 1)) { /* the last one byte don't need space */ + size += scnprintf(buf + size, buf_len - size, "0x%02X", block_data[i]); + } else { + size += scnprintf(buf + size, buf_len - size, "0x%02X ", block_data[i]); + } + } + size += scnprintf(buf + size, buf_len - size, ")\n"); + } + break; + case SENSOR_DATA: + info->reg_val = tmp_value; + size = get_pmbus_sensor_data(data, info, buf, buf_len); + if (size < 0) { + size = scnprintf(buf, buf_len, "%-15s (0x%02X) : Convert pmbus sensor data failed, raw data 0x%04X\n", + info->pmbus_name, info->pmbus_reg, info->reg_val); + } + break; + default: + dev_dbg(dev, "%s page: %d, reg addr: 0x%02x, unsupport width: %d\n", + info->pmbus_name, info->pmbus_page, info->pmbus_reg, info->width); + size = scnprintf(buf, buf_len, "%-15s (0x%02X) : Unsupport pmbus data type: %d\n", + info->pmbus_name, info->pmbus_reg, info->data_type); + break; + } + + return size; +} + +int get_pmbus_info(struct i2c_client *client, char *buf, + int buf_len, int page, pmbus_info_t *pmbus_info_array, int a_size) +{ + int i, len, offset = 0; + char tmp_buf[MAX_RW_LEN]; + struct pmbus_data *data; + + if ((client == NULL) || (buf == NULL) || (buf_len <= 0) || + (pmbus_info_array == NULL) || (a_size <=0)) { + return -EINVAL; + } + + data = i2c_get_clientdata(client); + if (data == NULL) { + return snprintf(buf, buf_len, "i2c_get_clientdata failed, data is NULL\n"); + } + if ((page >= data->info->pages) || (page < 0)) { + return snprintf(buf, buf_len, "Invalid page: %d\n", page); + } + + for (i = 0; i < a_size; i++) { + if (((pmbus_info_array[i].page_mask >> page) & 1) == 0) { + dev_dbg(&client->dev, "%s reg addr: 0x%02x, page_mask: 0x%x, not suooprt page%d\n", + pmbus_info_array[i].pmbus_name, pmbus_info_array[i].pmbus_reg, pmbus_info_array[i].page_mask, page); + continue; + } + pmbus_info_array[i].pmbus_page = page; + (void)get_pmbus_info_single(client, tmp_buf, sizeof(tmp_buf), &pmbus_info_array[i]); + offset += scnprintf(buf + offset, buf_len - offset, "%s", tmp_buf); + } + len = strlen(buf); + if (len == 0) { + return snprintf(buf, buf_len, "Can't find pmbus info in page%d\n", page); + } + dev_dbg(&client->dev, "get_pmbus_info success, page: %d, buf_len: %d\n", page, len); + return len; +} +EXPORT_SYMBOL_GPL(get_pmbus_info); + +static ssize_t get_pmbus_dfx_page_info(struct pmbus_data *data, struct i2c_client *client, int page, char *buf, int buf_len) +{ + int ret, str_len, offset; + + offset = scnprintf(buf, buf_len, "%-23s: %d\n", "PAGE", page); + ret = get_pmbus_info(client, buf + offset, buf_len - offset, page, + data->pmbus_info_array, data->pmbus_info_array_size); + if (ret < 0) { + offset += scnprintf(buf + offset, buf_len - offset, "Failed to get page%d dfx information\n", page); + } else { + offset += ret; + } + offset += scnprintf(buf + offset, buf_len - offset, "%s\n", "----------------------------------------------"); + str_len = strlen(buf); + dev_dbg(&client->dev, "get page%d dfx information success, str_len: %d\n", page, str_len); + return str_len; +} + +ssize_t show_pmbus_dfx_info(struct device *dev, struct device_attribute *da, char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct pmbus_data *data; + struct sensor_device_attribute *attr; + ssize_t buf_len; + int i, page, offset=0; + + data = i2c_get_clientdata(client); + attr = to_sensor_dev_attr(da); + mem_clear(buf, PAGE_SIZE); + page = attr->index; + if (page >= data->info->pages) { + return snprintf(buf, PAGE_SIZE, "Invalid pmbus page: %d\n", page); + } + + mutex_lock(&data->update_lock); + if (page < 0) { /* Traverse all pages. */ + for (i = 0; i < data->info->pages; i++) { + offset += get_pmbus_dfx_page_info(data, client, i, buf + offset, PAGE_SIZE - offset); + } + } else { + offset = get_pmbus_dfx_page_info(data, client, page, buf, PAGE_SIZE); + } + + buf_len = strlen(buf); + dev_dbg(dev, "get dfx information success, buf_len: %zu\n", buf_len); + mutex_unlock(&data->update_lock); + return buf_len; +} +EXPORT_SYMBOL_GPL(show_pmbus_dfx_info); + +static int pmbus_init_avs_threshold(struct i2c_client *client) +{ + struct pmbus_data *data = i2c_get_clientdata(client); + struct device_node *of_node = client->dev.of_node; + struct device *dev = &client->dev; + char avs_max_name[DEV_NAME_LEN]; + char avs_min_name[DEV_NAME_LEN]; + int i, ret, rv, vout_max, vout_min; + + if (of_node == NULL) { + dev_dbg(dev, "Failed to init avs threshold, of_node is NULL\n"); + return -ENODEV; + } + + mem_clear(avs_max_name, sizeof(avs_max_name)); + mem_clear(avs_min_name, sizeof(avs_min_name)); + rv = 0; + for (i = 0; i < data->info->pages; i++) { + snprintf(avs_max_name, sizeof(avs_max_name), "avs%d_vout_max", i); + snprintf(avs_min_name, sizeof(avs_min_name), "avs%d_vout_min", i); + ret = 0; + ret += of_property_read_u32(of_node, avs_max_name, &vout_max); + ret += of_property_read_u32(of_node, avs_min_name, &vout_min); + if (ret == 0) { + data->vout_max[i] = vout_max; + data->vout_min[i] = vout_min; + } else { + rv = -EINVAL; + dev_dbg(dev, "Failed to init avs%d threshold, %s or %s config error\n", + i, avs_max_name, avs_min_name); + } + } + return rv; +} +ssize_t pmbus_block_data_show(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + int block_size, offset, i; + u8 block_data[I2C_SMBUS_BLOCK_MAX] = { 0 }; + /* for i2cdev not hwmon */ + struct i2c_client *client = to_i2c_client(dev); + struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct pmbus_data *data = i2c_get_clientdata(client); + char reg_val[PMBUS_DEV_NAME_SIZE]; + + mutex_lock(&data->update_lock); + block_size = wb_pmbus_read_block_data(client, 0, attr->index, block_data); + if (block_size < 0) { + dev_err(dev, "read reg: 0x%x failed, ret: %d\n", attr->index, block_size); + mutex_unlock(&data->update_lock); + return block_size; + } + mutex_unlock(&data->update_lock); + + offset = 0; + mem_clear(reg_val, sizeof(reg_val)); + for (i = 0; i < block_size; i++) { + offset += scnprintf(reg_val + offset, PMBUS_DEV_NAME_SIZE - offset, "%02x", block_data[i]); + } + + dev_dbg(dev, "read block data success, reg: 0x%x, value: %s, ret: %d\n", attr->index, reg_val, block_size); + return snprintf(buf, PAGE_SIZE, "0x%s\n", reg_val); +} +EXPORT_SYMBOL_GPL(pmbus_block_data_show); + +static int get_chip_name_by_id(u8 *id, int size, char *chip_name) +{ + int i = 0; + + for (i = 0; i < ARRAY_SIZE(pmbus_dev_infos); i++) { + if ((size == pmbus_dev_infos[i].dev_id_len) && (memcmp(id, pmbus_dev_infos[i].device_id, size) == 0)) { + strscpy(chip_name, pmbus_dev_infos[i].chip_name, I2C_NAME_SIZE); + return 0; + } + } + + return -ENODEV; +} + +ssize_t pmbus_device_name_show(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + int block_size, offset, i, ret; + u8 block_data[I2C_SMBUS_BLOCK_MAX] = { 0 }; + /* for i2cdev not hwmon */ + struct i2c_client *client = to_i2c_client(dev); + struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct pmbus_data *data = i2c_get_clientdata(client); + char device_id[PMBUS_DEV_NAME_SIZE]; + char chip_name[I2C_NAME_SIZE]; + + mutex_lock(&data->update_lock); + block_size = wb_pmbus_read_block_data(client, 0, attr->index, block_data); + if (block_size < 0) { + dev_err(dev, "read reg: 0x%x failed, ret: %d\n", attr->index, block_size); + mutex_unlock(&data->update_lock); + return block_size; + } + mutex_unlock(&data->update_lock); + + offset = 0; + mem_clear(device_id, sizeof(device_id)); + for (i = 0; i < block_size; i++) { + offset += scnprintf(device_id + offset, PMBUS_DEV_NAME_SIZE - offset, "%02x", block_data[i]); + } + dev_dbg(dev, "read device_id success, reg: 0x%x, value: %s, ret: %d\n", attr->index, device_id, block_size); + + mem_clear(chip_name, sizeof(chip_name)); + ret = get_chip_name_by_id(block_data, block_size, chip_name); + if (ret < 0) { + dev_err(dev, "get_chip_name_by_id failed, ret = %d\n", ret); + return ret; + } + dev_dbg(dev, "find chip name success, device name: %s.\n", pmbus_dev_infos[i].chip_name); + + return snprintf(buf, PAGE_SIZE, "%s\n", chip_name); +} +EXPORT_SYMBOL_GPL(pmbus_device_name_show); + +ssize_t pmbus_get_status_word_show(struct device *dev, + struct device_attribute *devattr, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct pmbus_data *data = i2c_get_clientdata(client); + int ret; + + mutex_lock(&data->update_lock); + + ret = wb_pmbus_read_word_data(client, attr->index, 0xff, PMBUS_STATUS_WORD); + if (ret < 0) { + dev_err(dev, "read page%d reg 0x%x failed. ret = %d\n", attr->index, PMBUS_STATUS_WORD, ret); + goto error; + } + + dev_dbg(dev, "read page%d reg 0x%x success. ret = %d\n", attr->index, PMBUS_STATUS_WORD, ret); + ret = snprintf(buf, PAGE_SIZE, "0x%04x\n", ret); + +error: + mutex_unlock(&data->update_lock); + return ret; +} +EXPORT_SYMBOL_GPL(pmbus_get_status_word_show); + +ssize_t pmbus_get_status_byte_show(struct device *dev, + struct device_attribute *devattr, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct pmbus_data *data = i2c_get_clientdata(client); + int ret; + + mutex_lock(&data->update_lock); + + ret = wb_pmbus_read_byte_data(client, attr->index, PMBUS_STATUS_BYTE); + if (ret < 0) { + dev_err(dev, "read page%d reg 0x%x failed. ret = %d\n", attr->index, PMBUS_STATUS_BYTE, ret); + goto error; + } + + dev_dbg(dev, "read page%d reg 0x%x success. ret = %d\n", attr->index, PMBUS_STATUS_BYTE, ret); + ret = snprintf(buf, PAGE_SIZE, "0x%02x\n", ret); + +error: + mutex_unlock(&data->update_lock); + return ret; +} +EXPORT_SYMBOL_GPL(pmbus_get_status_byte_show); + +#if IS_ENABLED(CONFIG_REGULATOR) +static int pmbus_regulator_is_enabled(struct regulator_dev *rdev) +{ + struct device *dev = rdev_get_dev(rdev); + struct i2c_client *client = to_i2c_client(dev->parent); + u8 page = rdev_get_id(rdev); + int ret; + + ret = wb_pmbus_read_byte_data(client, page, PMBUS_OPERATION); + if (ret < 0) + return ret; + + return !!(ret & PB_OPERATION_CONTROL_ON); +} + +static int _pmbus_regulator_on_off(struct regulator_dev *rdev, bool enable) +{ + struct device *dev = rdev_get_dev(rdev); + struct i2c_client *client = to_i2c_client(dev->parent); + u8 page = rdev_get_id(rdev); + + return wb_pmbus_update_byte_data(client, page, PMBUS_OPERATION, + PB_OPERATION_CONTROL_ON, + enable ? PB_OPERATION_CONTROL_ON : 0); +} + +static int pmbus_regulator_enable(struct regulator_dev *rdev) +{ + return _pmbus_regulator_on_off(rdev, 1); +} + +static int pmbus_regulator_disable(struct regulator_dev *rdev) +{ + return _pmbus_regulator_on_off(rdev, 0); +} + +const struct regulator_ops wb_pmbus_regulator_ops = { + .enable = pmbus_regulator_enable, + .disable = pmbus_regulator_disable, + .is_enabled = pmbus_regulator_is_enabled, +}; +EXPORT_SYMBOL_GPL(wb_pmbus_regulator_ops); + +static int pmbus_regulator_register(struct pmbus_data *data) +{ + struct device *dev = data->dev; + const struct pmbus_driver_info *info = data->info; + const struct pmbus_platform_data *pdata = dev_get_platdata(dev); + struct regulator_dev *rdev; + int i; + + for (i = 0; i < info->num_regulators; i++) { + struct regulator_config config = { }; + + config.dev = dev; + config.driver_data = data; + + if (pdata && pdata->reg_init_data) + config.init_data = &pdata->reg_init_data[i]; + + rdev = devm_regulator_register(dev, &info->reg_desc[i], + &config); + if (IS_ERR(rdev)) { + dev_info(dev, "Failed to register %s regulator\n", + info->reg_desc[i].name); + return PTR_ERR(rdev); + } + } + + return 0; +} +#else +static int pmbus_regulator_register(struct pmbus_data *data) +{ + return 0; +} +#endif + +static struct dentry *pmbus_debugfs_dir; /* pmbus debugfs directory */ + +#if IS_ENABLED(CONFIG_DEBUG_FS) +static int pmbus_debugfs_get(void *data, u64 *val) +{ + int rc; + struct pmbus_debugfs_entry *entry = data; + struct pmbus_data *pdata; + + pdata = i2c_get_clientdata(entry->client); + mutex_lock(&pdata->update_lock); + rc = _pmbus_read_byte_data(entry->client, entry->page, entry->reg); + mutex_unlock(&pdata->update_lock); + if (rc < 0) + return rc; + + *val = rc; + + return 0; +} +DEFINE_DEBUGFS_ATTRIBUTE(pmbus_debugfs_ops, pmbus_debugfs_get, NULL, + "0x%02llx\n"); + +static int pmbus_debugfs_get_status(void *data, u64 *val) +{ + int rc; + struct pmbus_debugfs_entry *entry = data; + struct pmbus_data *pdata; + + pdata = i2c_get_clientdata(entry->client); + mutex_lock(&pdata->update_lock); + rc = pdata->read_status(entry->client, entry->page); + mutex_unlock(&pdata->update_lock); + if (rc < 0) + return rc; + + *val = rc; + + return 0; +} +DEFINE_DEBUGFS_ATTRIBUTE(pmbus_debugfs_ops_status, pmbus_debugfs_get_status, + NULL, "0x%04llx\n"); + +static int pmbus_debugfs_get_pec(void *data, u64 *val) +{ + struct i2c_client *client = data; + struct pmbus_data *pdata; + + pdata = i2c_get_clientdata(client); + mutex_lock(&pdata->update_lock); + *val = !!(client->flags & I2C_CLIENT_PEC); + mutex_unlock(&pdata->update_lock); + + return 0; +} + +static int pmbus_debugfs_set_pec(void *data, u64 val) +{ + int rc; + struct i2c_client *client = data; + + if (!val) { + client->flags &= ~I2C_CLIENT_PEC; + return 0; + } + + if (val != 1) + return -EINVAL; + + rc = i2c_smbus_read_byte_data(client, PMBUS_CAPABILITY); + if (rc < 0) + return rc; + + if (!(rc & PB_CAPABILITY_ERROR_CHECK)) + return -EOPNOTSUPP; + + client->flags |= I2C_CLIENT_PEC; + + return 0; +} + +static int pmbus_debugfs_set_pec_safe(void *data, u64 val) +{ + int rc; struct i2c_client *client = data; + struct pmbus_data *pdata; + + pdata = i2c_get_clientdata(client); + mutex_lock(&pdata->update_lock); + rc = pmbus_debugfs_set_pec(data, val); + mutex_unlock(&pdata->update_lock); + + return rc; +} + +DEFINE_DEBUGFS_ATTRIBUTE(pmbus_debugfs_ops_pec, pmbus_debugfs_get_pec, + pmbus_debugfs_set_pec_safe, "%llu\n"); + +static int pmbus_debugfs_get_block_read_capability(void *data, u64 *val) +{ + struct i2c_client *client = data; + struct pmbus_data *p_data = i2c_get_clientdata(client); + + if (p_data->is_support_block_read) { + *val = 1; + } else { + *val = 0; + } + return 0; +} + +DEFINE_DEBUGFS_ATTRIBUTE(pmbus_debugfs_ops_block_read_capability, pmbus_debugfs_get_block_read_capability, + NULL, "%llu\n"); + +static int pmbus_init_debugfs(struct i2c_client *client, + struct pmbus_data *data) +{ + int i, idx = 0; + char name[PMBUS_NAME_SIZE]; + struct pmbus_debugfs_entry *entries; + + if (!pmbus_debugfs_dir) + return -ENODEV; + + /* + * Create the debugfs directory for this device. Use the hwmon device + * name to avoid conflicts (hwmon numbers are globally unique). + */ + data->debugfs = debugfs_create_dir(dev_name(data->hwmon_dev), + pmbus_debugfs_dir); + if (IS_ERR_OR_NULL(data->debugfs)) { + data->debugfs = NULL; + return -ENODEV; + } + + /* Allocate the max possible entries we need. */ + entries = devm_kcalloc(data->dev, + data->info->pages * 10, sizeof(*entries), + GFP_KERNEL); + if (!entries) + return -ENOMEM; + + debugfs_create_file("pec", 0664, data->debugfs, client, + &pmbus_debugfs_ops_pec); + + debugfs_create_file("block_read_capability", 0444, data->debugfs, client, + &pmbus_debugfs_ops_block_read_capability); + + for (i = 0; i < data->info->pages; ++i) { + /* Check accessibility of status register if it's not page 0 */ + if (!i || pmbus_check_status_register(client, i)) { + /* No need to set reg as we have special read op. */ + entries[idx].client = client; + entries[idx].page = i; + scnprintf(name, PMBUS_NAME_SIZE, "status%d", i); + debugfs_create_file(name, 0444, data->debugfs, + &entries[idx++], + &pmbus_debugfs_ops_status); + } + + if (data->info->func[i] & PMBUS_HAVE_STATUS_VOUT) { + entries[idx].client = client; + entries[idx].page = i; + entries[idx].reg = PMBUS_STATUS_VOUT; + scnprintf(name, PMBUS_NAME_SIZE, "status%d_vout", i); + debugfs_create_file(name, 0444, data->debugfs, + &entries[idx++], + &pmbus_debugfs_ops); + } + + if (data->info->func[i] & PMBUS_HAVE_STATUS_IOUT) { + entries[idx].client = client; + entries[idx].page = i; + entries[idx].reg = PMBUS_STATUS_IOUT; + scnprintf(name, PMBUS_NAME_SIZE, "status%d_iout", i); + debugfs_create_file(name, 0444, data->debugfs, + &entries[idx++], + &pmbus_debugfs_ops); + } + + if (data->info->func[i] & PMBUS_HAVE_STATUS_INPUT) { + entries[idx].client = client; + entries[idx].page = i; + entries[idx].reg = PMBUS_STATUS_INPUT; + scnprintf(name, PMBUS_NAME_SIZE, "status%d_input", i); + debugfs_create_file(name, 0444, data->debugfs, + &entries[idx++], + &pmbus_debugfs_ops); + } + + if (data->info->func[i] & PMBUS_HAVE_STATUS_TEMP) { + entries[idx].client = client; + entries[idx].page = i; + entries[idx].reg = PMBUS_STATUS_TEMPERATURE; + scnprintf(name, PMBUS_NAME_SIZE, "status%d_temp", i); + debugfs_create_file(name, 0444, data->debugfs, + &entries[idx++], + &pmbus_debugfs_ops); + } + + if (wb_pmbus_check_byte_register(client, i, PMBUS_STATUS_CML)) { + entries[idx].client = client; + entries[idx].page = i; + entries[idx].reg = PMBUS_STATUS_CML; + scnprintf(name, PMBUS_NAME_SIZE, "status%d_cml", i); + debugfs_create_file(name, 0444, data->debugfs, + &entries[idx++], + &pmbus_debugfs_ops); + } + + if (wb_pmbus_check_byte_register(client, i, PMBUS_STATUS_OTHER)) { + entries[idx].client = client; + entries[idx].page = i; + entries[idx].reg = PMBUS_STATUS_OTHER; + scnprintf(name, PMBUS_NAME_SIZE, "status%d_other", i); + debugfs_create_file(name, 0444, data->debugfs, + &entries[idx++], + &pmbus_debugfs_ops); + } + + if (wb_pmbus_check_byte_register(client, i, + PMBUS_STATUS_MFR_SPECIFIC)) { + entries[idx].client = client; + entries[idx].page = i; + entries[idx].reg = PMBUS_STATUS_MFR_SPECIFIC; + scnprintf(name, PMBUS_NAME_SIZE, "status%d_mfr", i); + debugfs_create_file(name, 0444, data->debugfs, + &entries[idx++], + &pmbus_debugfs_ops); + } + + if (data->info->func[i] & PMBUS_HAVE_STATUS_FAN12) { + entries[idx].client = client; + entries[idx].page = i; + entries[idx].reg = PMBUS_STATUS_FAN_12; + scnprintf(name, PMBUS_NAME_SIZE, "status%d_fan12", i); + debugfs_create_file(name, 0444, data->debugfs, + &entries[idx++], + &pmbus_debugfs_ops); + } + + if (data->info->func[i] & PMBUS_HAVE_STATUS_FAN34) { + entries[idx].client = client; + entries[idx].page = i; + entries[idx].reg = PMBUS_STATUS_FAN_34; + scnprintf(name, PMBUS_NAME_SIZE, "status%d_fan34", i); + debugfs_create_file(name, 0444, data->debugfs, + &entries[idx++], + &pmbus_debugfs_ops); + } + } + + return 0; +} +#else +static int pmbus_init_debugfs(struct i2c_client *client, + struct pmbus_data *data) +{ + return 0; +} +#endif /* IS_ENABLED(CONFIG_DEBUG_FS) */ + +int wb_pmbus_do_probe(struct i2c_client *client, struct pmbus_driver_info *info) +{ + struct device *dev = &client->dev; + const struct pmbus_platform_data *pdata = dev_get_platdata(dev); + struct pmbus_data *data; + size_t groups_num = 0; + int ret; + + if (!info) + return -ENODEV; + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_WRITE_BYTE + | I2C_FUNC_SMBUS_BYTE_DATA + | I2C_FUNC_SMBUS_WORD_DATA)) + return -ENODEV; + + data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + if (i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BLOCK_DATA)) { + data->is_support_block_read = true; + } else { + data->is_support_block_read = false; + } + + if (info->groups) + while (info->groups[groups_num]) + groups_num++; + + data->groups = devm_kcalloc(dev, groups_num + 2, sizeof(void *), + GFP_KERNEL); + if (!data->groups) + return -ENOMEM; + + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + data->dev = dev; + + if (pdata) + data->flags = pdata->flags; + data->info = info; + data->currpage = -1; + data->currphase = -1; + + ret = pmbus_init_common(client, data, info); + if (ret < 0) + return ret; + + ret = pmbus_find_attributes(client, data); + if (ret) + return ret; + + /* + * If there are no attributes, something is wrong. + * Bail out instead of trying to register nothing. + */ + if (!data->num_attributes) { + dev_info(dev, "No attributes found\n"); + return -ENODEV; + } + + data->groups[0] = &data->group; + memcpy(data->groups + 1, info->groups, sizeof(void *) * groups_num); + data->hwmon_dev = devm_hwmon_device_register_with_groups(dev, + client->name, data, data->groups); + if (IS_ERR(data->hwmon_dev)) { + dev_info(dev, "Failed to register hwmon device\n"); + return PTR_ERR(data->hwmon_dev); + } + + ret = pmbus_regulator_register(data); + if (ret) + return ret; + + ret = pmbus_init_debugfs(client, data); + if (ret) + dev_warn(dev, "Failed to register debugfs\n"); + + /* avs threshold init */ + ret = pmbus_init_avs_threshold(client); + if (ret) { + dev_dbg(dev, "Failed to init avs threshold, ret: %d\n", ret); + } + + return 0; +} +EXPORT_SYMBOL_GPL(wb_pmbus_do_probe); + +int wb_pmbus_do_remove(struct i2c_client *client) +{ + struct pmbus_data *data = i2c_get_clientdata(client); + + debugfs_remove_recursive(data->debugfs); + + return 0; +} +EXPORT_SYMBOL_GPL(wb_pmbus_do_remove); + +struct dentry *wb_pmbus_get_debugfs_dir(struct i2c_client *client) +{ + struct pmbus_data *data = i2c_get_clientdata(client); + + return data->debugfs; +} +EXPORT_SYMBOL_GPL(wb_pmbus_get_debugfs_dir); + +static int __init pmbus_core_init(void) +{ + pmbus_debugfs_dir = debugfs_create_dir("pmbus", NULL); + if (IS_ERR(pmbus_debugfs_dir)) + pmbus_debugfs_dir = NULL; + + return 0; +} + +static void __exit pmbus_core_exit(void) +{ + debugfs_remove_recursive(pmbus_debugfs_dir); +} + +module_init(pmbus_core_init); +module_exit(pmbus_core_exit); + +MODULE_AUTHOR("support"); +MODULE_DESCRIPTION("PMBus core driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_rc32312.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_rc32312.c new file mode 100644 index 00000000000..a85d0b05ff8 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_rc32312.c @@ -0,0 +1,895 @@ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define RC32312_PAGE_REG (0xfd) +#define RC32312_APLL_EVENT_REG (0x6e) +#define RC32312_APLL_CLEAR_VAL (0x03) +#define RC32312_APLL_CLEAR_MASK (0x03) +#define RC32312_APLL_LOL_EVENT_REG (0x6f) +#define RC32312_APLL_LOL_EVENT_CLEAR_VAL (0x0) +#define RC32312_APLL_LOL_EVENT_CLEAR_MASK (0x0f) +#define RC32312_APLL_EVENT_CLEAR_VAL (0x7f) +#define RC32312_APLL_EVENT_CLEAR_MASK (0x7f) +#define RC32312_APLL_EXT_EVENT_REG (0x70) +#define RC32312_XTAL_LOS_CNT_REG (0x79) + +#define RC32312_APLL_PAGE (2) +#define RC32312_APLL_STS_REG (0x71) +#define RC32312_OUT_CTRL_EN (0x0001) +#define RC32312_OUT_CTRL_DIS (0x0002) + +#define RC32312_XTAL_LOS_PAGE (1) +#define RC32312_XTAL_LOS_EVT_REG (0x78) +#define RC32312_XTAL_LOS_STS_REG (0x7a) + +#define RC32312_CLOCK_REG_INFO_MASK (0x1) +#define RC32312_CLOCK_FAULT_XTAL (0) +#define RC32312_CLOCK_FAULT_BUS (1) +#define RC32312_CLOCK_FAULT_APLL (4) + +#define RC32312_VENDOR_ID_PAGE (0) +#define RC32312_VENDOR_ID_REG (0x0) +#define RC32312_VENDOR_ID (0x1033) + +#define RC32312_CLOCK_STATUS_NORMAL (0) +#define RC32312_CLOCK_STATUS_ABNORMAL (1) + +#define RC21012_LOSMON_PAGE (0) +#define RC21012_LOSMON4_STS_REG (0x99) +#define RC21012_LOSMON4_CNT_REG (0x9b) +#define RC21012_LOSMON4_CNT_CLEAR_VAL (0x0) +#define RC21012_LOSMON4_CNT_CLEAR_MASK (0x0f) + +#define RC21012_APLL_PAGE (1) +#define RC21012_APLL_STS_REG (0x3f) +#define RC21012_APLL_LOL_CNT_REG (0x41) +#define RC21012_APLL_LOL_CNT_CLEAR_VAL (0x0) +#define RC21012_APLL_LOL_CNT_CLEAR_MASK (0x0f) + +/* RC38112 register definitions */ +#define RC38112_XTAL_PAGE (8) /* Page number for RC38112 registers */ +#define RC38112_XTAL_LOS_EVT_REG (0x08) +#define RC38112_XTAL_LOS_EVT_CLEAR_VAL (0x3) +#define RC38112_XTAL_LOS_EVT_CLEAR_MASK (0x3) + +#define RC38112_XTAL_LOS_CNT_REG (0x09) +#define RC38112_XTAL_LOS_CNT_CLEAR_VAL (0x0) +#define RC38112_XTAL_LOS_CNT_CLEAR_MASK (0x0f) + +#define RC38112_APLL_EVENT_REG (0xba) +#define RC38112_APLL_EVENT_CLEAR_VAL (0x7f) +#define RC38112_APLL_EVENT_CLEAR_MASK (0x7f) + +#define RC38112_APLL_LOL_EVENT_REG (0xbb) +#define RC38112_APLL_LOL_EVENT_CLEAR_VAL (0x0) +#define RC38112_APLL_LOL_EVENT_CLEAR_MASK (0x0f) + +#define RC38112_APLL_LOL_CLEAR_REG (0xbc) +#define RC38112_APLL_LOL_CLEAR_CLEAR_VAL (0x1) +#define RC38112_APLL_LOL_CLEAR_CLEAR_MASK (0x0f) + +#define RC38112_APLL_STS_REG (0xbd) +#define RC38112_APLL_STS_MASK (0x1) + +#define RC38112_XTAL_LOS_STS_REG (0x0a) +#define RC38112_XTAL_LOS_STS_MASK (0x1) + +#define RC38112_APLL_PAGE (0) /* Page number for RC38112 registers */ + +static int debug = 0; +module_param(debug, int, S_IRUGO | S_IWUSR); + +enum attrs { + APLL_STATUS, + APLL_COUNT, + APLL_EVENT, + XTAL_LOS_EVT, + XTAL_LOS_CNT, + XTAL_LOS_STS, + LOSMON4_STS, + LOSMON4_CNT, +}; + +typedef struct { + int attr; + int page; + int reg; +} rc32312_attr_match_t; + +rc32312_attr_match_t rc21012_attr_infos[] = { + {APLL_STATUS, RC21012_APLL_PAGE, RC21012_APLL_STS_REG}, + {APLL_COUNT, RC21012_APLL_PAGE, RC21012_APLL_LOL_CNT_REG}, + {LOSMON4_STS, RC21012_LOSMON_PAGE, RC21012_LOSMON4_STS_REG}, + {LOSMON4_CNT, RC21012_LOSMON_PAGE, RC21012_LOSMON4_CNT_REG}, +}; + +rc32312_attr_match_t rc32312_attr_infos[] = { + {APLL_STATUS, RC32312_APLL_PAGE, RC32312_APLL_STS_REG}, + {APLL_COUNT, RC32312_APLL_PAGE, RC32312_APLL_LOL_EVENT_REG}, + {APLL_EVENT, RC32312_APLL_PAGE, RC32312_APLL_EVENT_REG}, + {XTAL_LOS_EVT, RC32312_XTAL_LOS_PAGE, RC32312_XTAL_LOS_EVT_REG}, + {XTAL_LOS_CNT, RC32312_XTAL_LOS_PAGE, RC32312_XTAL_LOS_CNT_REG}, + {XTAL_LOS_STS, RC32312_XTAL_LOS_PAGE, RC32312_XTAL_LOS_STS_REG}, +}; + +rc32312_attr_match_t rc38112_attr_infos[] = { + {APLL_STATUS, RC38112_APLL_PAGE, RC38112_APLL_STS_REG}, + {APLL_COUNT, RC38112_APLL_PAGE, RC38112_APLL_LOL_EVENT_REG}, + {APLL_EVENT, RC38112_APLL_PAGE, RC38112_APLL_EVENT_REG}, + {XTAL_LOS_EVT, RC38112_XTAL_PAGE, RC38112_XTAL_LOS_EVT_REG}, + {XTAL_LOS_CNT, RC38112_XTAL_PAGE, RC38112_XTAL_LOS_CNT_REG}, + {XTAL_LOS_STS, RC38112_XTAL_PAGE, RC38112_XTAL_LOS_STS_REG}, +}; + +enum chips { + rc32312, + rc21012, + rc38112, +}; + +struct rc32312_data { + struct i2c_client *client; + struct mutex update_lock; + struct attribute_group *sysfs_group; + int page_reg; + int chip; + int vendor_id; +}; + +struct rc32312_clear_op { + int page; + u8 reg; + u8 val; + u8 mask; +}; + +static const struct rc32312_clear_op rc32312_clear_ops[] = { + { RC32312_APLL_PAGE, RC32312_APLL_EVENT_REG, RC32312_APLL_EVENT_CLEAR_VAL, RC32312_APLL_EVENT_CLEAR_MASK }, + { RC32312_APLL_PAGE, RC32312_APLL_LOL_EVENT_REG, RC32312_APLL_LOL_EVENT_CLEAR_VAL, RC32312_APLL_LOL_EVENT_CLEAR_MASK }, + { RC32312_APLL_PAGE, RC32312_APLL_EXT_EVENT_REG, RC32312_APLL_CLEAR_VAL, RC32312_APLL_LOL_EVENT_CLEAR_MASK }, + { RC32312_XTAL_LOS_PAGE, RC32312_XTAL_LOS_EVT_REG, RC32312_APLL_CLEAR_VAL, RC32312_APLL_LOL_EVENT_CLEAR_MASK }, + { RC32312_XTAL_LOS_PAGE, RC32312_XTAL_LOS_CNT_REG, RC32312_APLL_LOL_EVENT_CLEAR_VAL, RC32312_APLL_LOL_EVENT_CLEAR_MASK }, +}; + +static const struct rc32312_clear_op rc38112_clear_ops[] = { + { RC38112_XTAL_PAGE, RC38112_XTAL_LOS_EVT_REG, RC38112_XTAL_LOS_EVT_CLEAR_VAL, RC38112_XTAL_LOS_EVT_CLEAR_MASK }, + { RC38112_XTAL_PAGE, RC38112_XTAL_LOS_CNT_REG, RC38112_XTAL_LOS_CNT_CLEAR_VAL, RC38112_XTAL_LOS_CNT_CLEAR_MASK }, + { RC38112_APLL_PAGE, RC38112_APLL_EVENT_REG, RC38112_APLL_EVENT_CLEAR_VAL, RC38112_APLL_EVENT_CLEAR_MASK }, + { RC38112_APLL_PAGE, RC38112_APLL_LOL_EVENT_REG, RC38112_APLL_LOL_EVENT_CLEAR_VAL, RC38112_APLL_LOL_EVENT_CLEAR_MASK }, + { RC38112_APLL_PAGE, RC38112_APLL_LOL_CLEAR_REG, RC38112_APLL_LOL_CLEAR_CLEAR_VAL, RC38112_APLL_LOL_CLEAR_CLEAR_MASK }, +}; + + +int rc32312_set_page(struct i2c_client *client, int page) +{ + struct rc32312_data *data = i2c_get_clientdata(client); + int rv; + + rv = i2c_smbus_write_byte_data(client, data->page_reg, page); + if (rv < 0) { + DEBUG_ERROR("rc32312 wirte page failed page_reg 0x%x target page %d, errno: %d\n", data->page_reg, page, rv); + return rv; + } + + rv = i2c_smbus_read_byte_data(client, data->page_reg); + if (rv < 0) { + DEBUG_ERROR("rc32312 read page failed page_reg 0x%x target page %d, errno: %d\n", data->page_reg, page, rv); + return rv; + } + + if (rv != page) { + DEBUG_ERROR("rc32312 current page %d != target page %d \n", rv, page); + return -EIO; + } + DEBUG_VERBOSE("rc32312 set to page: %d success \n", page); + return 0; +} + +static s32 rc32312_read_byte_data(struct i2c_client *client, int page, u8 reg) +{ + int rv; + + rv = rc32312_set_page(client, page); + if (rv < 0) { + DEBUG_ERROR("rc32312 read byte setting page failed errno: %d\n", rv); + return rv; + } + + return i2c_smbus_read_byte_data(client, reg); +} + +static s32 rc32312_read_word_data(struct i2c_client *client, int page, u8 reg) +{ + int rv; + + rv = rc32312_set_page(client, page); + if (rv < 0) { + DEBUG_ERROR("rc32312 read word setting page failed errno: %d\n", rv); + return rv; + } + + return i2c_smbus_read_word_data(client, reg); +} + +static int rc32312_write_byte_data(struct i2c_client *client, int page, u8 reg, u8 value) +{ + int rv; + + rv = rc32312_set_page(client, page); + if (rv < 0) { + DEBUG_ERROR("rc32312 write byte setting page failed errno: %d\n", rv); + return rv; + } + + return i2c_smbus_write_byte_data(client, reg, value); +} + +static int rc32312_write_word_data(struct i2c_client *client, int page, u8 reg, u16 value) +{ + int rv; + + rv = rc32312_set_page(client, page); + if (rv < 0) { + DEBUG_ERROR("rc32312 write byte setting page failed errno: %d\n", rv); + return rv; + } + + return i2c_smbus_write_word_data(client, reg, value); +} + +static ssize_t show_rc32312_value_word(struct device *dev, struct device_attribute *da, char *buf) +{ + struct rc32312_data *data = dev_get_drvdata(dev); + struct i2c_client *client = data->client; + int reg = to_sensor_dev_attr_2(da)->index; + int page = to_sensor_dev_attr_2(da)->nr; + s32 status; + + status = -1; + mutex_lock(&data->update_lock); + status = rc32312_read_word_data(client, page, reg); + if (status < 0) { + DEBUG_ERROR("rc32312 show value failed page [%d] reg [0x%x], errno: %d\n", page, reg, status); + mutex_unlock(&data->update_lock); + return status; + } + DEBUG_VERBOSE("rc32312 show value success page [%d] reg[0x%x] read value[0x%x]\n", page, reg, status); + mutex_unlock(&data->update_lock); + return snprintf(buf, PAGE_SIZE, "0x%x\n", status & 0xffff); +} + +int rc32312_get_page_reg_from_attr(struct rc32312_data *data, int attr, int *page, int *reg) +{ + int i; + rc32312_attr_match_t *tmp_attr_infos; + int attr_infos_len; + + switch (data->chip) { + case rc32312: + tmp_attr_infos = rc32312_attr_infos; + attr_infos_len = ARRAY_SIZE(rc32312_attr_infos); + break; + case rc21012: + tmp_attr_infos = rc21012_attr_infos; + attr_infos_len = ARRAY_SIZE(rc21012_attr_infos); + break; + case rc38112: + tmp_attr_infos = rc38112_attr_infos; + attr_infos_len = ARRAY_SIZE(rc38112_attr_infos); + break; + default: + DEBUG_ERROR("Unknown chip %d\n", data->chip); + return -ENODEV; + } + for (i = 0; i < attr_infos_len; i++) { + if (tmp_attr_infos[i].attr == attr) { + *reg = tmp_attr_infos[i].reg; + *page = tmp_attr_infos[i].page; + DEBUG_VERBOSE("get_page_reg_from_attr success, chip[%d], attr[%d], page[%d], reg[%d]\n", + data->chip, attr, *page, *reg); + return 0; + } + } + + DEBUG_ERROR("get_page_reg_from_attr fail, chip[%d], attr[%d]\n", data->chip, attr); + return -ENODEV; +} + +static ssize_t show_common_value(struct device *dev, struct device_attribute *da, char *buf) +{ + struct rc32312_data *data = dev_get_drvdata(dev); + struct i2c_client *client = data->client; + int attr = to_sensor_dev_attr_2(da)->nr; + int reg, page; + int ret; + s32 status; + + ret = rc32312_get_page_reg_from_attr(data, attr, &page, ®); + if (ret < 0) { + return ret; + } + + status = -1; + mutex_lock(&data->update_lock); + status = rc32312_read_byte_data(client, page, reg); + if (status < 0) { + DEBUG_ERROR("rc32312 show value failed page [%d] reg [0x%x], errno: %d\n", page, reg, status); + mutex_unlock(&data->update_lock); + return status; + } + DEBUG_VERBOSE("rc32312 show value success page [%d] reg[0x%x] read value[0x%x]\n", page, reg, status); + mutex_unlock(&data->update_lock); + return snprintf(buf, PAGE_SIZE, "0x%x\n", status & 0xff); +} + +static ssize_t set_common_value(struct device *dev, struct device_attribute *da, const char *buf, size_t count) +{ + struct rc32312_data *data = dev_get_drvdata(dev); + struct i2c_client *client = data->client; + int attr = to_sensor_dev_attr_2(da)->nr; + int reg, page; + u8 val; + int ret; + + val = 0; + ret = kstrtou8(buf, 0, &val); + if (ret) { + DEBUG_ERROR("Invaild input value [%s], errno: %d\n", buf, ret); + return -EINVAL; + } + + ret = rc32312_get_page_reg_from_attr(data, attr, &page, ®); + if (ret < 0) { + return ret; + } + + mutex_lock(&data->update_lock); + ret = rc32312_write_byte_data(client, page, reg, val); + if (ret < 0) { + DEBUG_ERROR("rc32312 set value failed page [%d] reg [0x%x] val [0x%x], errno: %d\n", page, reg, val, ret); + mutex_unlock(&data->update_lock); + return ret; + } + DEBUG_VERBOSE("rc32312 set value success page [%d] reg[0x%x] value[0x%x]\n", page, reg, val); + mutex_unlock(&data->update_lock); + + return count; +} + +static ssize_t show_rc32312_out_ctrl_value(struct device *dev, struct device_attribute *da, char *buf) +{ + struct rc32312_data *data = dev_get_drvdata(dev); + struct i2c_client *client = data->client; + int reg = to_sensor_dev_attr_2(da)->index; + int page = to_sensor_dev_attr_2(da)->nr; + s32 status; + + status = -1; + mutex_lock(&data->update_lock); + status = rc32312_read_word_data(client, page, reg); + if (status < 0) { + DEBUG_ERROR("rc32312 read word data failed page [%d] reg [0x%x], errno: %d\n", page, reg, status); + mutex_unlock(&data->update_lock); + return status; + } + DEBUG_VERBOSE("rc32312 read word data success page [%d] reg[0x%x] read value[0x%x]\n", page, reg, status); + + mutex_unlock(&data->update_lock); + if (status == RC32312_OUT_CTRL_EN) { + return snprintf(buf, PAGE_SIZE, "1\n"); + } + + if (status == RC32312_OUT_CTRL_DIS) { + return snprintf(buf, PAGE_SIZE, "0\n"); + } + + return snprintf(buf, PAGE_SIZE, "0x%04x\n", status & 0xffff); +} + +static ssize_t show_rc32312_bus_status(struct device *dev, struct device_attribute *da, char *buf) +{ + struct rc32312_data *data = dev_get_drvdata(dev); + struct i2c_client *client; + s32 read_vendor_id; + int bus_status; + + if (!data || !data->client) { + DEBUG_ERROR("rc32312 invalid data or client pointer\n"); + return -EINVAL; + } + + if (data->vendor_id == 0) { + DEBUG_ERROR("rc32312 vendor_id is 0\n"); + return -EINVAL; + } + + client = data->client; + mutex_lock(&data->update_lock); + read_vendor_id = rc32312_read_word_data(client, RC32312_VENDOR_ID_PAGE, RC32312_VENDOR_ID_REG); + mutex_unlock(&data->update_lock); + if (read_vendor_id < 0) { + DEBUG_ERROR("rc32312 read vendor_id failed errno: %d\n", read_vendor_id); + return read_vendor_id; + } + + bus_status = ((read_vendor_id & 0xffff) == data->vendor_id) ? + RC32312_CLOCK_STATUS_NORMAL : RC32312_CLOCK_STATUS_ABNORMAL; + + return snprintf(buf, PAGE_SIZE, "%d\n", bus_status); +} + +static ssize_t set_rc32312_out_ctrl_value(struct device *dev, struct device_attribute *da, const char *buf, size_t count) +{ + struct rc32312_data *data = dev_get_drvdata(dev); + struct i2c_client *client = data->client; + int reg = to_sensor_dev_attr_2(da)->index; + int page = to_sensor_dev_attr_2(da)->nr; + u16 val; + int ret; + + val = 0; + ret = kstrtou16(buf, 0, &val); + if (ret) { + dev_err(&client->dev, "Invaild input value [%s], errno: %d\n", buf, ret); + return -EINVAL; + } + + if ((val != 0) && (val != 1)) { + dev_err(&client->dev, "Unsupport value: %d, please enter 0 or 1\n", val); + return -EINVAL; + } + + if (val == 0) { + val = RC32312_OUT_CTRL_DIS; + } else { + val = RC32312_OUT_CTRL_EN; + } + + mutex_lock(&data->update_lock); + ret = rc32312_write_word_data(client, page, reg, val); + if (ret < 0) { + DEBUG_ERROR("rc32312 write word data failed page [%d] reg [0x%x] val [0x%x], errno: %d\n", page, reg, val, ret); + mutex_unlock(&data->update_lock); + return ret; + } + DEBUG_VERBOSE("rc32312 write word data success page [%d] reg[0x%x] value[0x%x]\n", page, reg, val); + mutex_unlock(&data->update_lock); + return count; +} + +static int clear_rc32312_value(struct rc32312_data *data, int page, u8 reg, u8 val, u8 mask) +{ + struct i2c_client *client; + s32 ori_status; + u8 clear_value; + int ret; + + if (!data || !data->client) { + DEBUG_ERROR("Invalid data or client pointer\n"); + return -EINVAL; + } + client = data->client; + + mutex_lock(&data->update_lock); + ori_status = rc32312_read_byte_data(client, page, reg); + if (ori_status < 0) { + DEBUG_ERROR("rc32312 read value failed page [%d] reg [0x%x], errno: %d\n", page, reg, ori_status); + mutex_unlock(&data->update_lock); + return ori_status; + } + clear_value = (((u8)ori_status & ~(mask)) | (val & (mask))); + + ret = rc32312_write_byte_data(client, page, reg, clear_value); + if (ret < 0) { + DEBUG_ERROR("rc32312 write value failed page [%d] reg [0x%x] val [0x%x], errno: %d\n", page, reg, clear_value, ret); + mutex_unlock(&data->update_lock); + return ret; + } + + DEBUG_VERBOSE("rc32312 clear value success page [%d] reg [0x%x] value [0x%x]\n", page, reg, clear_value); + mutex_unlock(&data->update_lock); + + return 0; +} + +static int clear_common_values(struct rc32312_data *data) +{ + const struct rc32312_clear_op *clear_ops = NULL; + size_t clear_ops_size; + const struct rc32312_clear_op *op; + int ret; + int i; + + /* Select the appropriate clear operations based on chip type */ + switch (data->chip) { + case rc32312: + clear_ops = rc32312_clear_ops; + clear_ops_size = ARRAY_SIZE(rc32312_clear_ops); + break; + case rc38112: + clear_ops = rc38112_clear_ops; + clear_ops_size = ARRAY_SIZE(rc38112_clear_ops); + break; + case rc21012: + default: + DEBUG_ERROR("not support chip type %d\n", data->chip); + return -ENODEV; + } + + for (i = 0; i < clear_ops_size; i++) { + op = &clear_ops[i]; + ret = clear_rc32312_value(data, op->page, op->reg, op->val, op->mask); + if (ret < 0) { + DEBUG_ERROR("rc32312 clear reg[%d] failed, errno: %d\n", i, ret); + return ret; + } + } + + return 0; +} + +static int rc32312_get_status(struct rc32312_data *data, int *status) +{ + struct i2c_client *client; + s32 read_vendor_id; + s32 xtal_los_evt; + s32 xtal_los_sts; + s32 apll_los_evt; + s32 apll_los_sts; + int bus_status; + int xtal_status; + int apll_status; + + if (!data || !data->client || !status) { + DEBUG_ERROR("rc32312 invalid data, client or status pointer\n"); + return -EINVAL; + } + + if (data->vendor_id == 0) { + DEBUG_ERROR("rc32312 vendor_id is 0\n"); + return -EINVAL; + } + + client = data->client; + read_vendor_id = rc32312_read_word_data(client, RC32312_VENDOR_ID_PAGE, RC32312_VENDOR_ID_REG); + if (read_vendor_id < 0) { + DEBUG_ERROR("rc32312 read vendor_id failed errno: %d\n", read_vendor_id); + return read_vendor_id; + } + + xtal_los_evt = rc32312_read_byte_data(client, RC32312_XTAL_LOS_PAGE, RC32312_XTAL_LOS_EVT_REG); + if (xtal_los_evt < 0) { + DEBUG_ERROR("rc32312 read xtal_los_evt failed errno: %d\n", xtal_los_evt); + return xtal_los_evt; + } + + xtal_los_sts = rc32312_read_byte_data(client, RC32312_XTAL_LOS_PAGE, RC32312_XTAL_LOS_STS_REG); + if (xtal_los_sts < 0) { + DEBUG_ERROR("rc32312 read xtal_los_sts failed errno: %d\n", xtal_los_sts); + return xtal_los_sts; + } + + apll_los_evt = rc32312_read_byte_data(client, RC32312_APLL_PAGE, RC32312_APLL_EVENT_REG); + if (apll_los_evt < 0) { + DEBUG_ERROR("rc32312 read apll_event failed errno: %d\n", apll_los_evt); + return apll_los_evt; + } + + apll_los_sts = rc32312_read_byte_data(client, RC32312_APLL_PAGE, RC32312_APLL_STS_REG); + if (apll_los_sts < 0) { + DEBUG_ERROR("rc32312 read apll_los_sts failed errno: %d\n", apll_los_sts); + return apll_los_sts; + } + + bus_status = ((read_vendor_id & 0xffff) == data->vendor_id) ? + RC32312_CLOCK_STATUS_NORMAL : RC32312_CLOCK_STATUS_ABNORMAL; + + xtal_status = ((xtal_los_evt & RC32312_CLOCK_REG_INFO_MASK) | + (xtal_los_sts & RC32312_CLOCK_REG_INFO_MASK)) ? + RC32312_CLOCK_STATUS_ABNORMAL : RC32312_CLOCK_STATUS_NORMAL; + + apll_status = ((apll_los_evt & RC32312_CLOCK_REG_INFO_MASK) | + !(apll_los_sts & RC32312_CLOCK_REG_INFO_MASK)) ? + RC32312_CLOCK_STATUS_ABNORMAL : RC32312_CLOCK_STATUS_NORMAL; + + *status = (bus_status << RC32312_CLOCK_FAULT_BUS) | + (xtal_status << RC32312_CLOCK_FAULT_XTAL) | + (apll_status << RC32312_CLOCK_FAULT_APLL); + + return 0; +} + +static ssize_t show_rc32312_status(struct device *dev, struct device_attribute *da, char *buf) +{ + struct rc32312_data *data = dev_get_drvdata(dev); + int status; + int ret; + + if (!data || !data->client) { + DEBUG_ERROR("rc32312 invalid data or client pointer\n"); + return -EINVAL; + } + + mutex_lock(&data->update_lock); + ret = rc32312_get_status(data, &status); + mutex_unlock(&data->update_lock); + if (ret < 0) { + DEBUG_ERROR("rc32312 get status failed, errno: %d\n", ret); + return ret; + } + + ret = clear_common_values(data); + if (ret < 0) { + DEBUG_ERROR("rc32312 clear values failed, errno: %d\n", ret); + return ret; + } + + return snprintf(buf, PAGE_SIZE, "0x%x\n", status); +} + +static ssize_t clear_rc32312_reg_value(struct device *dev, struct device_attribute *da, const char *buf, size_t count) +{ + struct rc32312_data *data = dev_get_drvdata(dev); + u16 val; + int ret; + + if (!data || !data->client) { + return -EINVAL; + } + + val = 0; + ret = kstrtou16(buf, 0, &val); + if (ret) { + DEBUG_ERROR("Invaild input value [%s], errno: %d\n", buf, ret); + return -EINVAL; + } + + if (val != 1) { + DEBUG_ERROR("Unsupport value: %d, please enter 1\n", val); + return -EINVAL; + } + + ret = clear_common_values(data); + if (ret < 0) { + DEBUG_ERROR("rc32312 clear values failed, errno: %d\n", ret); + return ret; + } + + return count; +} + +static int rc32312_init(struct rc32312_data *data) +{ + int ret = 0; + + if (!data) { + DEBUG_ERROR("Invalid data pointer\n"); + return -EINVAL; + } + + switch (data->chip) { + case rc32312: + ret = clear_rc32312_value(data, RC32312_APLL_PAGE, RC32312_APLL_EVENT_REG, RC32312_APLL_CLEAR_VAL, RC32312_APLL_CLEAR_MASK); + ret += clear_rc32312_value(data, RC32312_APLL_PAGE, RC32312_APLL_LOL_EVENT_REG, RC32312_APLL_LOL_EVENT_CLEAR_VAL, RC32312_APLL_LOL_EVENT_CLEAR_MASK); + break; + case rc21012: + ret = clear_rc32312_value(data, RC21012_LOSMON_PAGE, RC21012_LOSMON4_CNT_REG, RC21012_LOSMON4_CNT_CLEAR_VAL, RC21012_LOSMON4_CNT_CLEAR_MASK); + ret += clear_rc32312_value(data, RC21012_APLL_PAGE, RC21012_APLL_LOL_CNT_REG, RC21012_APLL_LOL_CNT_CLEAR_VAL, RC21012_APLL_LOL_CNT_CLEAR_MASK); + break; + case rc38112: + ret += clear_rc32312_value(data, RC38112_APLL_PAGE, RC38112_APLL_EVENT_REG, RC38112_APLL_EVENT_CLEAR_VAL, RC38112_APLL_EVENT_CLEAR_MASK); + ret += clear_rc32312_value(data, RC38112_APLL_PAGE, RC38112_APLL_LOL_EVENT_REG, RC38112_APLL_LOL_EVENT_CLEAR_VAL, RC38112_APLL_LOL_EVENT_CLEAR_MASK); + break; + default: + dev_dbg(&data->client->dev, "Unknown chip id %d, skip\n", data->chip); + return -ENODEV; + } + + if (ret < 0) { + dev_warn(&data->client->dev, "RC32312 init fail\n"); + return ret; + } + dev_dbg(&data->client->dev, "RC32312 init success.\n"); + return ret; +} + +static SENSOR_DEVICE_ATTR_2(apll_event, S_IRUGO | S_IWUSR, show_common_value, set_common_value, APLL_EVENT, 0); +static SENSOR_DEVICE_ATTR_2(apll_lol_event, S_IRUGO | S_IWUSR, show_common_value, set_common_value, APLL_COUNT, 0); +static SENSOR_DEVICE_ATTR_2(apll_sts, S_IRUGO, show_common_value, NULL, APLL_STATUS, 0); +static SENSOR_DEVICE_ATTR_2(xtal_los_evt, S_IRUGO | S_IWUSR, show_common_value, set_common_value, XTAL_LOS_EVT, 0); +static SENSOR_DEVICE_ATTR_2(xtal_los_cnt, S_IRUGO | S_IWUSR, show_common_value, set_common_value, XTAL_LOS_CNT, 0); +static SENSOR_DEVICE_ATTR_2(xtal_los_sts, S_IRUGO, show_common_value, NULL, XTAL_LOS_STS, 0); +static SENSOR_DEVICE_ATTR_2(clear_reg, S_IWUSR, NULL, clear_rc32312_reg_value, 0, 0); +static SENSOR_DEVICE_ATTR_2(vendor_id, S_IRUGO, show_rc32312_value_word, NULL, 0, 0); +static SENSOR_DEVICE_ATTR_2(device_id, S_IRUGO, show_rc32312_value_word, NULL, 0, 0x2); +static SENSOR_DEVICE_ATTR_2(device_pgm, S_IRUGO, show_rc32312_value_word, NULL, 0, 0x6); +static SENSOR_DEVICE_ATTR_2(bus_status, S_IRUGO, show_rc32312_bus_status, NULL, 0, 0); +static SENSOR_DEVICE_ATTR_2(status, S_IRUGO, show_rc32312_status, NULL, 0, 0); +static SENSOR_DEVICE_ATTR_2(out_en_ctrl_0, S_IRUGO | S_IWUSR, show_rc32312_out_ctrl_value, set_rc32312_out_ctrl_value, 1, 0x04); +static SENSOR_DEVICE_ATTR_2(out_en_ctrl_1, S_IRUGO | S_IWUSR, show_rc32312_out_ctrl_value, set_rc32312_out_ctrl_value, 1, 0x0c); +static SENSOR_DEVICE_ATTR_2(out_en_ctrl_2, S_IRUGO | S_IWUSR, show_rc32312_out_ctrl_value, set_rc32312_out_ctrl_value, 1, 0x14); +static SENSOR_DEVICE_ATTR_2(out_en_ctrl_3, S_IRUGO | S_IWUSR, show_rc32312_out_ctrl_value, set_rc32312_out_ctrl_value, 1, 0x1c); +static SENSOR_DEVICE_ATTR_2(out_en_ctrl_4, S_IRUGO | S_IWUSR, show_rc32312_out_ctrl_value, set_rc32312_out_ctrl_value, 1, 0x24); +static SENSOR_DEVICE_ATTR_2(out_en_ctrl_5, S_IRUGO | S_IWUSR, show_rc32312_out_ctrl_value, set_rc32312_out_ctrl_value, 1, 0x2c); +static SENSOR_DEVICE_ATTR_2(out_en_ctrl_6, S_IRUGO | S_IWUSR, show_rc32312_out_ctrl_value, set_rc32312_out_ctrl_value, 1, 0x34); +static SENSOR_DEVICE_ATTR_2(out_en_ctrl_7, S_IRUGO | S_IWUSR, show_rc32312_out_ctrl_value, set_rc32312_out_ctrl_value, 1, 0x3c); +static SENSOR_DEVICE_ATTR_2(out_en_ctrl_8, S_IRUGO | S_IWUSR, show_rc32312_out_ctrl_value, set_rc32312_out_ctrl_value, 1, 0x44); +static SENSOR_DEVICE_ATTR_2(out_en_ctrl_9, S_IRUGO | S_IWUSR, show_rc32312_out_ctrl_value, set_rc32312_out_ctrl_value, 1, 0x4c); +static SENSOR_DEVICE_ATTR_2(out_en_ctrl_10, S_IRUGO | S_IWUSR, show_rc32312_out_ctrl_value, set_rc32312_out_ctrl_value, 1, 0x54); +static SENSOR_DEVICE_ATTR_2(out_en_ctrl_11, S_IRUGO | S_IWUSR, show_rc32312_out_ctrl_value, set_rc32312_out_ctrl_value, 1, 0x5c); + +static struct attribute *rc32312_sysfs_attrs[] = { + &sensor_dev_attr_apll_event.dev_attr.attr, + &sensor_dev_attr_apll_lol_event.dev_attr.attr, + &sensor_dev_attr_apll_sts.dev_attr.attr, + &sensor_dev_attr_xtal_los_evt.dev_attr.attr, + &sensor_dev_attr_xtal_los_cnt.dev_attr.attr, + &sensor_dev_attr_xtal_los_sts.dev_attr.attr, + &sensor_dev_attr_clear_reg.dev_attr.attr, + &sensor_dev_attr_vendor_id.dev_attr.attr, + &sensor_dev_attr_device_id.dev_attr.attr, + &sensor_dev_attr_device_pgm.dev_attr.attr, + &sensor_dev_attr_bus_status.dev_attr.attr, + &sensor_dev_attr_status.dev_attr.attr, + &sensor_dev_attr_out_en_ctrl_0.dev_attr.attr, + &sensor_dev_attr_out_en_ctrl_1.dev_attr.attr, + &sensor_dev_attr_out_en_ctrl_2.dev_attr.attr, + &sensor_dev_attr_out_en_ctrl_3.dev_attr.attr, + &sensor_dev_attr_out_en_ctrl_4.dev_attr.attr, + &sensor_dev_attr_out_en_ctrl_5.dev_attr.attr, + &sensor_dev_attr_out_en_ctrl_6.dev_attr.attr, + &sensor_dev_attr_out_en_ctrl_7.dev_attr.attr, + &sensor_dev_attr_out_en_ctrl_8.dev_attr.attr, + &sensor_dev_attr_out_en_ctrl_9.dev_attr.attr, + &sensor_dev_attr_out_en_ctrl_10.dev_attr.attr, + &sensor_dev_attr_out_en_ctrl_11.dev_attr.attr, + NULL +}; + +static struct attribute_group rc32312_sysfs_group = { + .attrs = rc32312_sysfs_attrs, +}; + +static SENSOR_DEVICE_ATTR_2(losmon4_sts, S_IRUGO, show_common_value, NULL, LOSMON4_STS, 0); +static SENSOR_DEVICE_ATTR_2(losmon4_cnt, S_IRUGO | S_IWUSR, show_common_value, set_common_value, LOSMON4_CNT, 0); + +static struct attribute *rc21012_sysfs_attrs[] = { + &sensor_dev_attr_vendor_id.dev_attr.attr, + &sensor_dev_attr_device_pgm.dev_attr.attr, + &sensor_dev_attr_apll_sts.dev_attr.attr, + &sensor_dev_attr_apll_lol_event.dev_attr.attr, + &sensor_dev_attr_losmon4_sts.dev_attr.attr, + &sensor_dev_attr_losmon4_cnt.dev_attr.attr, + NULL +}; + +static struct attribute_group rc21012_sysfs_group = { + .attrs = rc21012_sysfs_attrs, +}; + +static struct attribute *rc38112_sysfs_attrs[] = { + &sensor_dev_attr_apll_event.dev_attr.attr, + &sensor_dev_attr_apll_lol_event.dev_attr.attr, + &sensor_dev_attr_apll_sts.dev_attr.attr, + &sensor_dev_attr_xtal_los_evt.dev_attr.attr, + &sensor_dev_attr_xtal_los_cnt.dev_attr.attr, + &sensor_dev_attr_xtal_los_sts.dev_attr.attr, + &sensor_dev_attr_clear_reg.dev_attr.attr, + &sensor_dev_attr_vendor_id.dev_attr.attr, + &sensor_dev_attr_device_id.dev_attr.attr, + &sensor_dev_attr_device_pgm.dev_attr.attr, + &sensor_dev_attr_bus_status.dev_attr.attr, + &sensor_dev_attr_status.dev_attr.attr, + NULL +}; + +static struct attribute_group rc38112_sysfs_group = { + .attrs = rc38112_sysfs_attrs, +}; + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(6,0,0) +static int rc32312_probe(struct i2c_client *client) +#else +static int rc32312_probe(struct i2c_client *client, const struct i2c_device_id *id) +#endif +{ + struct rc32312_data *data; + int ret; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(6,0,0) + const struct i2c_device_id *id = i2c_client_get_device_id(client); +#endif + + dev_dbg(&client->dev, "RC32312 enter probe\n"); + data = devm_kzalloc(&client->dev, sizeof(struct rc32312_data), GFP_KERNEL); + if (!data) { + dev_err(&client->dev, "RC32312 alloc memory failed\n"); + return -ENOMEM; + } + + data->client = client; + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + data->chip = id->driver_data; + + switch (id->driver_data) { + case rc32312: + data->sysfs_group = &rc32312_sysfs_group; + data->page_reg = RC32312_PAGE_REG; + data->vendor_id = RC32312_VENDOR_ID; + break; + case rc21012: + data->sysfs_group = &rc21012_sysfs_group; + data->page_reg = RC32312_PAGE_REG; + data->vendor_id = RC32312_VENDOR_ID; + break; + case rc38112: + data->sysfs_group = &rc38112_sysfs_group; + data->page_reg = RC32312_PAGE_REG; + data->vendor_id = RC32312_VENDOR_ID; + break; + default: + dev_err(&client->dev, "Unknown chip id %ld\n", id->driver_data); + return -ENODEV; + } + + (void)rc32312_init(data); + ret = sysfs_create_group(&client->dev.kobj, data->sysfs_group); + if (ret < 0) { + dev_err(&client->dev, "RC32312 sysfs_create_group failed %d\n", ret); + } + + dev_info(&client->dev, "init %s success\n", client->name); + return 0; +} + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(6,0,0) +static void rc32312_remove(struct i2c_client *client) +#else +static int rc32312_remove(struct i2c_client *client) +#endif +{ + struct rc32312_data *data = i2c_get_clientdata(client); + + if (data->sysfs_group) { + dev_info(&client->dev, "RC32312 unregister sysfs group\n"); + sysfs_remove_group(&client->dev.kobj, (const struct attribute_group *)data->sysfs_group); + } + dev_info(&client->dev, "RC32312 removed\n"); +#if LINUX_VERSION_CODE < KERNEL_VERSION(6,0,0) + return 0; +#endif +} + +static const struct i2c_device_id rc32312_id[] = { + { "wb_rc32312", rc32312 }, + { "wb_rc21012", rc21012 }, + { "wb_rc38112", rc38112 }, + {} +}; +MODULE_DEVICE_TABLE(i2c, rc32312_id); + +static struct i2c_driver wb_rc32312_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "wb_rc32312", + }, + .probe = rc32312_probe, + .remove = rc32312_remove, + .id_table = rc32312_id, +}; + +module_i2c_driver(wb_rc32312_driver); +MODULE_AUTHOR("support"); +MODULE_DESCRIPTION("RC32312 driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spd.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spd.c new file mode 100644 index 00000000000..0ce2024cb70 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spd.c @@ -0,0 +1,466 @@ +/* + * wb_spd.c + * + * This module create sysfs to get mem info + * through spd pci id. + * + * History + * [Version] [Date] [Description] + * * v1.0 2024-09-08 Initial version + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "wb_spd.h" +#include + +static int debug = 0; +module_param(debug, int, S_IRUGO | S_IWUSR); + +typedef struct wb_spd_data { + struct pci_dev *pci_dev; + struct device *hwmon_dev; + struct mutex update_lock; + int cpu_type; +} wb_spd_data_t; + +static int intel_d1500_spd_rdata_valid(struct pci_dev *pdev, u32 *read_value) +{ + int timeout, ret; + + while (1) { + ret = pci_read_config_dword(pdev, INTEL_D1500_SMB_STAT, read_value); + if (ret) { + DEBUG_ERROR("intel_d1500_spd_rdata_valid pci_read_config_dword failed, reg: 0x%x, ret %d.\n", INTEL_D1500_SMB_STAT, ret); + return ret; + } + + if (!(*read_value & INTEL_D1500_SMBUS_RDO)) { + DEBUG_VERBOSE("intel_d1500_spd rdata invalid\n"); + if (timeout > WAIT_TIME) { + DEBUG_ERROR("intel_d1500_spd wait rdata valid timeout\n"); + return -ETIMEDOUT; + } + usleep_range(SLEEP_TIME, SLEEP_TIME+1); + timeout++; + } else { + break; + } + } + return 0; +} + +static int intel_d1500_spd_set_page(int spd_page, struct pci_dev *pdev) +{ + u32 write_val, read_value; + u32 smb_sa; + int timeout, ret; + + timeout = 0; + smb_sa = (spd_page == 0) ? INTEL_D1500_EE_PAGE_SEL0 : INTEL_D1500_EE_PAGE_SEL1; + /* Send CMD one */ + write_val = INTEL_D1500_CLOCK_OVERRIDE | INTEL_D1500_DTI_WP_EEPROM; + DEBUG_VERBOSE("intel_d1500_spd_set_page INTEL_D1500_SMB_CNTL write_val: 0x%x\n", write_val); + ret = pci_write_config_dword(pdev, INTEL_D1500_SMB_CNTL, write_val); + if (ret) { + DEBUG_ERROR("intel_d1500_spd_set_page pci_write_config_dword failed, reg: 0x%x, wr_value:0x%x, ret %d.\n", INTEL_D1500_SMB_CNTL, write_val, ret); + return ret; + } + /* Send CMD two */ + write_val = INTEL_D1500_CMD_SEND | INTEL_D1500_CMD_SMB_WRITE | (smb_sa & 0x7) << 24; + DEBUG_VERBOSE("intel_d1500_spd_set_page INTEL_D1500_SMB_CMD write_val: 0x%x\n", write_val); + ret = pci_write_config_dword(pdev, INTEL_D1500_SMB_CMD, write_val); + if (ret) { + DEBUG_ERROR("intel_d1700_spd_set_page pci_write_config_dword failed, reg: 0x%x, wr_value:0x%x, ret %d.\n", INTEL_D1500_SMB_CMD, write_val, ret); + return ret; + } + + usleep_range(WAIT_TIME, WAIT_TIME + 1); + ret = intel_d1500_spd_rdata_valid(pdev, &read_value); + if (ret) { + DEBUG_ERROR("intel_d1500_spd_set_page wait rdata valid fail, ret %d.\n", ret); + return ret; + } + return 0; +} + +static int intel_d1500_smb_read_dword(struct pci_dev *pdev, int type, int reg_offset, int slot_id, unsigned int *spd_result) +{ + u32 write_val, read_value; + int timeout, ret, spd_page; + + timeout = 0; + spd_page = 0; + + if ((reg_offset > 0xFF) && (type == SMB_EEPROM)) { + reg_offset = reg_offset - 0x100; + spd_page = 1; + } + if (type == SMB_EEPROM) { + ret = intel_d1500_spd_set_page(spd_page, pdev); + if (ret < 0) { + DEBUG_ERROR("intel_d1500_smb_read_dword SPD set page %d failed\n", spd_page); + return ret; + } + } + /* Send CMD one */ + write_val = INTEL_D1500_CLOCK_OVERRIDE; + write_val = (type == SMB_EEPROM) ? write_val | INTEL_D1500_SELECT_EEPROM : write_val | INTEL_D1500_SELECT_TSOD; + DEBUG_VERBOSE("intel_d1500_smb_read_dword INTEL_D1500_SMB_CNTL write_val:0x%x\n", write_val); + + ret = pci_write_config_dword(pdev, INTEL_D1500_SMB_CNTL, write_val); + if (ret) { + DEBUG_ERROR("intel_d1500_smb_read_dword pci_write_config_dword failed, reg: 0x%x, wr_value:0x%x, ret %d.\n", INTEL_D1500_SMB_CNTL, write_val, ret); + return ret; + } + + ret = pci_read_config_dword(pdev, INTEL_D1500_SMB_CNTL, &read_value); + if (ret) { + DEBUG_ERROR("intel_d1500_smb_read_dword pci_read_config_dword failed, reg: 0x%x ret %d.\n", INTEL_D1500_SMB_CNTL, ret); + return ret; + } + + DEBUG_VERBOSE("intel_d1500_smb_read_dword SMB_CNTL rd_value: 0x%08X\n", read_value); + /* Send CMD two */ + write_val = INTEL_D1500_CMD_SEND | (reg_offset & MASK_16) << 16 | (slot_id & 0x7) << 24; + write_val = (type == SMB_EEPROM) ? write_val : write_val | INTEL_D1500_CMD_WORD_MODE; + DEBUG_VERBOSE("intel_d1500_smb_read_dword INTEL_D1500_SMB_CMD write_val:0x%x\n", write_val); + + ret = pci_write_config_dword(pdev, INTEL_D1500_SMB_CMD, write_val); + if (ret) { + DEBUG_ERROR("intel_d1500_smb_read_dword pci_write_config_dword failed, reg: 0x%x, wr_value:0x%x, ret %d.\n", INTEL_D1500_SMB_CMD, write_val, ret); + return ret; + } + + ret = pci_read_config_dword(pdev, INTEL_D1500_SMB_CMD, &read_value); + if (ret) { + DEBUG_ERROR("intel_d1500_smb_read_dword pci_read_config_dword failed, reg: 0x%x ret %d.\n", INTEL_D1500_SMB_CMD, ret); + return ret; + } + DEBUG_VERBOSE("intel_d1500_smb_read_dword SMB_CNTL rd_value: 0x%08X\n", read_value); + + ret = intel_d1500_spd_rdata_valid(pdev, &read_value); + if (ret) { + DEBUG_ERROR("intel_d1500_smb_read_dword wait rdata valid fail, ret %d.\n", ret); + return ret; + } + + DEBUG_VERBOSE("intel_d1500_smb_read_dword SMB_STAT rd_value: 0x%08X\n", read_value); + if (read_value & INTEL_D1500_SMBUS_ERROR) { + DEBUG_ERROR("intel_d1500_smb_read_dword SMB_STAT rdata error, value: 0x%08X\n", read_value); + return -ENODATA; + } + *spd_result = read_value; + return 0; +} + +static void intel_d1700_do_tsod_en(struct pci_dev *pdev) +{ + u32 read_value; + int ret; + + ret = pci_read_config_dword(pdev, INTEL_D1700_SMB_CMD_CFG, &read_value); + if (ret) { + DEBUG_ERROR("intel_d1700_do_tsod_en pci_read_config_dword failed, reg: 0x%x ret %d.\n", INTEL_D1700_SMB_CMD_CFG, ret); + return; + } + + ret = pci_write_config_dword(pdev, INTEL_D1700_SMB_CMD_CFG, (read_value | INTEL_D1700_SMBUS_TSOD_EN)); + if (ret) { + DEBUG_ERROR("intel_d1700_do_tsod_en pci_write_config_dword failed, reg: 0x%x ret %d.\n", INTEL_D1700_SMB_CMD_CFG, ret); + return; + } + + return; +} + +static int intel_d1700_spd_is_busy(struct pci_dev *pdev, u32 *read_value) +{ + int timeout, ret; + + while (1) { + ret = pci_read_config_dword(pdev, INTEL_D1700_SMB_STAT_CFG, read_value); + if (ret) { + DEBUG_ERROR("intel_d1700_spd_is_busy pci_read_config_dword failed, reg: 0x%x, ret %d.\n", INTEL_D1700_SMB_STAT_CFG, ret); + return ret; + } + + if (*read_value & INTEL_D1700_SMBUS_BUSY) { + DEBUG_VERBOSE("intel_d1700_spd is busy\n"); + if (timeout > WAIT_TIME) { + DEBUG_ERROR("intel_d1700_spd wait spd busy timeout\n"); + return -ETIMEDOUT; + } + usleep_range(SLEEP_TIME, SLEEP_TIME+1); + timeout++; + } else { + break; + } + } + return 0; +} + +static int intel_d1700_spd_set_page(int spd_page, struct pci_dev *pdev) +{ + u32 write_val, read_value; + u32 smb_sa; + int timeout, ret; + + timeout = 0; + smb_sa = (spd_page == 0) ? INTEL_D1700_EE_PAGE_SEL0 : INTEL_D1700_EE_PAGE_SEL1; + write_val = INTEL_D1700_CLOCK_OVERRIDE | (smb_sa & 0x7) << 8 | INTEL_D1700_CMD_SEND | (INTEL_D1700_CMD_SMB_WRITE) | INTEL_D1700_DTI_WP_EEPROM; + DEBUG_VERBOSE("intel_d1700_spd_set_page SMB_CMD wr_value 0x%x\n", write_val); + + ret = pci_write_config_dword(pdev, INTEL_D1700_SMB_DATA_CFG, 0x0); + if (ret) { + DEBUG_ERROR("intel_d1700_spd_set_page pci_write_config_dword failed, reg: 0x%x, wr_value:0x0, ret %d.\n", INTEL_D1700_SMB_DATA_CFG, ret); + return ret; + } + ret = pci_write_config_dword(pdev, INTEL_D1700_SMB_CMD_CFG, write_val); + if (ret) { + DEBUG_ERROR("intel_d1700_spd_set_page pci_write_config_dword failed, reg: 0x%x, wr_value:0x%x, ret %d.\n", INTEL_D1700_SMB_DATA_CFG, write_val, ret); + return ret; + } + + usleep_range(WAIT_TIME, WAIT_TIME + 1); + ret = intel_d1700_spd_is_busy(pdev, &read_value); + if (ret) { + DEBUG_ERROR("intel_d1700_spd_set_page wait spd busy fail, ret %d.\n", ret); + return ret; + } + + intel_d1700_do_tsod_en(pdev); + return 0; +} + +static int intel_d1700_smb_read_dword(struct pci_dev *pdev, int type, int reg_offset, int slot_id, u32 *spd_result) +{ + u32 write_val, read_value; + int timeout, ret, spd_page; + + timeout = 0; + spd_page = 0; + if ((reg_offset > 0xFF) && (type == SMB_EEPROM)) { + reg_offset = reg_offset - 0x100; + spd_page = 1; + } + if (type == SMB_EEPROM) { + ret = intel_d1700_spd_set_page(spd_page, pdev); + if (ret < 0) { + DEBUG_ERROR("intel_d1700_smb_read_dword SPD set page %d failed\n", spd_page); + goto do_tsod_en; + } + } + /* Send CMD one */ + write_val = INTEL_D1700_CLOCK_OVERRIDE | (slot_id & 0x7) << 8 | (reg_offset & MASK_16) | INTEL_D1700_CMD_SEND; + write_val = (type == SMB_EEPROM) ? write_val | INTEL_D1700_SELECT_EEPROM: write_val | INTEL_D1700_SELECT_TSOD | INTEL_D1700_CMD_WORD_MODE; + DEBUG_VERBOSE("intel_d1700_smb_read_dword INTEL_D1700_SMB_CMD_CFG write_val:0x%x\n", write_val); + + ret = pci_write_config_dword(pdev, INTEL_D1700_SMB_CMD_CFG, write_val); + if (ret) { + DEBUG_ERROR("intel_d1700_smb_read_dword pci_write_config_dword failed, reg: 0x%x, wr_value:0x%x, ret %d.\n", INTEL_D1700_SMB_CMD_CFG, write_val, ret); + goto do_tsod_en; + } + + ret = pci_read_config_dword(pdev, INTEL_D1700_SMB_CMD_CFG, &read_value); + if (ret) { + DEBUG_ERROR("intel_d1700_smb_read_dword pci_read_config_dword failed, reg: 0x%x ret %d.\n", INTEL_D1700_SMB_CMD_CFG, ret); + goto do_tsod_en; + } + + DEBUG_VERBOSE("intel_d1700_smb_read_dword SMB_CMD_CFG rd_value: 0x%08X\n", read_value); + ret = intel_d1700_spd_is_busy(pdev, &read_value); + if (ret) { + DEBUG_ERROR("intel_d1700_smb_read_dword wait spd busy fail, ret %d.\n", ret); + goto do_tsod_en; + } + + if (read_value & INTEL_D1700_SMBUS_ERROR) { + DEBUG_ERROR("intel_d1700_smb_read_dword SMB_STAT rdata error, value: 0x%08X\n", read_value); + ret = -ENODATA; + goto do_tsod_en; + } + + ret = pci_read_config_dword(pdev, INTEL_D1700_SMB_DATA_CFG, &read_value); + if (ret) { + DEBUG_ERROR("intel_d1700_smb_read_dword pci_read_config_dword failed, reg: 0x%x ret %d.\n", INTEL_D1700_SMB_DATA_CFG, ret); + goto do_tsod_en; + } + + DEBUG_VERBOSE("intel_d1700_smb_read_dword SMB_DATA rd_value: 0x%08X\n", read_value); + *spd_result = read_value; +do_tsod_en: + intel_d1700_do_tsod_en(pdev); + return ret; +} + +static int smb_read_dword(struct pci_dev *pdev, int type, int reg_offset, int slot_id, u32 *spd_result, int cpu_type) +{ + switch (cpu_type) { + case TYPE_INTEL_D1700: + return intel_d1700_smb_read_dword(pdev, type, reg_offset, slot_id, spd_result); + case TYPE_INTEL_D1500: + return intel_d1500_smb_read_dword(pdev, type, reg_offset, slot_id, spd_result); + default: + DEBUG_ERROR("unsupport cpu type\n"); + return -EINVAL; + } +} + +static ssize_t spd_temp_show(struct device *dev, struct device_attribute *da, char *buf) +{ + uint32_t slot, reg, value; + int ret; + wb_spd_data_t *spd_data = dev_get_drvdata(dev); + int temp; + int decimal_bits; + int integer_bits; + int flag = 1; + + reg = to_sensor_dev_attr_2(da)->index; + slot = to_sensor_dev_attr_2(da)->nr; + + mutex_lock(&spd_data->update_lock); + ret = smb_read_dword(spd_data->pci_dev, SMB_TSOD, reg, slot, &value, spd_data->cpu_type); + if (ret) { + DEBUG_ERROR("spd_temp_show read reg failed ret %d.\n", ret); + mutex_unlock(&spd_data->update_lock); + return -EIO; + } + mutex_unlock(&spd_data->update_lock); + DEBUG_VERBOSE("spd_temp_show read reg success, rd_value: 0x%X\n", value); + + /* get valid value */ + value = (value & MEM_TEMP_VALID_VALUE_MASK) >> 2; + /* check the sign bit */ + if (value & MEM_TEMP_SIGN_BIT) { + value = ~value + 1; + flag = -1; + } + decimal_bits = value & MEM_TEMP_DECIMAL_BITS_MASK; + integer_bits = (value >> 2) & MEM_TEMP_INTEGER_BITS_MASK; + temp = (integer_bits * 1000 + (decimal_bits * 250)) * flag; + + return snprintf(buf, PAGE_SIZE, "%d\n", temp); +} + +static ssize_t spd_date_code_show(struct device *dev, struct device_attribute *da, char *buf) +{ + uint32_t slot, value; + int ret; + wb_spd_data_t *spd_data = dev_get_drvdata(dev); + + slot = to_sensor_dev_attr_2(da)->nr; + + mutex_lock(&spd_data->update_lock); + ret = smb_read_dword(spd_data->pci_dev, SMB_EEPROM, MEM_DATE_CODE_REG, slot, &value, spd_data->cpu_type); + if (ret) { + DEBUG_ERROR("spd_date_code_show read reg failed ret %d.\n", ret); + mutex_unlock(&spd_data->update_lock); + return -EIO; + } + mutex_unlock(&spd_data->update_lock); + DEBUG_VERBOSE("spd_date_code_show read reg success, rd_value: 0x%X\n", value); + + return snprintf(buf, PAGE_SIZE, "0x%04X\n", value); +} + +static SENSOR_DEVICE_ATTR_2(mem_temp_1, S_IRUGO, spd_temp_show, NULL, 0, MEM_TEMP_REG); +static SENSOR_DEVICE_ATTR_2(mem_temp_2, S_IRUGO, spd_temp_show, NULL, 1, MEM_TEMP_REG); +static SENSOR_DEVICE_ATTR_2(mem_temp_3, S_IRUGO, spd_temp_show, NULL, 2, MEM_TEMP_REG); +static SENSOR_DEVICE_ATTR_2(mem_temp_4, S_IRUGO, spd_temp_show, NULL, 3, MEM_TEMP_REG); +static SENSOR_DEVICE_ATTR_2(mem_date_code_1, S_IRUGO, spd_date_code_show, NULL, 0, 0); +static SENSOR_DEVICE_ATTR_2(mem_date_code_2, S_IRUGO, spd_date_code_show, NULL, 1, 0); +static SENSOR_DEVICE_ATTR_2(mem_date_code_3, S_IRUGO, spd_date_code_show, NULL, 2, 0); +static SENSOR_DEVICE_ATTR_2(mem_date_code_4, S_IRUGO, spd_date_code_show, NULL, 3, 0); + +static struct attribute *spd_hwmon_attrs[] = { + &sensor_dev_attr_mem_temp_1.dev_attr.attr, + &sensor_dev_attr_mem_temp_2.dev_attr.attr, + &sensor_dev_attr_mem_temp_3.dev_attr.attr, + &sensor_dev_attr_mem_temp_4.dev_attr.attr, + &sensor_dev_attr_mem_date_code_1.dev_attr.attr, + &sensor_dev_attr_mem_date_code_2.dev_attr.attr, + &sensor_dev_attr_mem_date_code_3.dev_attr.attr, + &sensor_dev_attr_mem_date_code_4.dev_attr.attr, + NULL +}; +ATTRIBUTE_GROUPS(spd_hwmon); + +static int spd_probe(struct pci_dev *pdev, const struct pci_device_id *id) +{ + wb_spd_data_t *wb_spd_data; + + DEBUG_VERBOSE("spd_probe.\n"); + wb_spd_data = devm_kzalloc(&pdev->dev, sizeof(wb_spd_data_t), GFP_KERNEL); + if (!wb_spd_data) { + dev_err(&pdev->dev, "devm_kzalloc failed.\n"); + return -ENOMEM; + } + + wb_spd_data->pci_dev = pdev; + wb_spd_data->cpu_type = id->driver_data; + wb_spd_data->hwmon_dev = hwmon_device_register_with_groups(&pdev->dev, pdev->driver->name, wb_spd_data, spd_hwmon_groups); + if (IS_ERR(wb_spd_data->hwmon_dev)) { + dev_err(&pdev->dev, "Failed to register spd hwmon\n"); + return PTR_ERR(wb_spd_data->hwmon_dev); + } + mutex_init(&wb_spd_data->update_lock); + pci_set_drvdata(pdev, wb_spd_data); + dev_info(&pdev->dev, "wb spd probe success.\n"); + return 0; +} + +static void spd_remove(struct pci_dev *pdev) +{ + wb_spd_data_t *wb_spd_data; + + DEBUG_VERBOSE("spd_remove.\n"); + wb_spd_data = pci_get_drvdata(pdev); + hwmon_device_unregister(wb_spd_data->hwmon_dev); + dev_info(&pdev->dev, "wb spd remove success.\n"); + + return; +} + +static const struct pci_device_id spd_pci_ids[] = { + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, INTEL_D1500_SPD_DEVICE_ID), .driver_data = TYPE_INTEL_D1500}, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, INTEL_D1700_SPD_DEVICE_ID), .driver_data = TYPE_INTEL_D1700}, + {0} +}; +MODULE_DEVICE_TABLE(pci, spd_pci_ids); + +static struct pci_driver wb_spd_driver = { + .name = "wb_spd", + .id_table = spd_pci_ids, + .probe = spd_probe, + .remove = spd_remove, +}; + +static int __init wb_spd_init(void) +{ + DEBUG_VERBOSE("wb_spd_init enter!\n"); + return pci_register_driver(&wb_spd_driver); +} + +static void __exit wb_spd_exit(void) +{ + DEBUG_VERBOSE("wb_spd_exit enter!\n"); + pci_unregister_driver(&wb_spd_driver); + return; +} + +module_init(wb_spd_init); +module_exit(wb_spd_exit); + +MODULE_AUTHOR("support"); +MODULE_DESCRIPTION("spd Driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spd.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spd.h new file mode 100644 index 00000000000..2a3f3ed6ff5 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spd.h @@ -0,0 +1,62 @@ +#ifndef _WB_SPD_H_ +#define _WB_SPD_H_ + +#define SMB_EEPROM (0) +#define SMB_TSOD (1) +/* Intel D1500 */ +#define INTEL_D1500_SPD_DEVICE_ID (0x6fa8) +#define INTEL_D1500_SELECT_EEPROM (0xA0000000) +#define INTEL_D1500_SELECT_TSOD (0x30000000) +#define INTEL_D1500_CMD_SEND BIT(31) +#define INTEL_D1500_CMD_WORD_MODE BIT(29) +#define INTEL_D1500_SMBUS_ERROR BIT(29) +#define INTEL_D1500_CLOCK_OVERRIDE BIT(27) +#define INTEL_D1500_SMBUS_RDO BIT(31) +#define INTEL_D1500_DTI_WP_EEPROM (0x06 << 28) +#define INTEL_D1500_CMD_SMB_READ (0x00 << 27) +#define INTEL_D1500_CMD_SMB_WRITE (0x01 << 27) +#define INTEL_D1500_EE_PAGE_SEL0 (0x06) +#define INTEL_D1500_EE_PAGE_SEL1 (0x07) + +#define INTEL_D1500_SMB_CNTL (0x188) +#define INTEL_D1500_SMB_CMD (0x184) +#define INTEL_D1500_SMB_STAT (0x180) +/* Intel D1700 */ +#define INTEL_D1700_SPD_DEVICE_ID (0x3448) +#define INTEL_D1700_SELECT_EEPROM (0x00005000) +#define INTEL_D1700_SELECT_TSOD (0x00001800) +#define INTEL_D1700_CLOCK_OVERRIDE BIT(29) +#define INTEL_D1700_CMD_SEND BIT(19) +#define INTEL_D1700_CMD_WORD_MODE BIT(17) +#define INTEL_D1700_CMD_SMB_READ (0x00 << 15) +#define INTEL_D1700_CMD_SMB_WRITE (0x01 << 15) +#define INTEL_D1700_DTI_WP_EEPROM (0x06 << 11) +#define INTEL_D1700_EE_PAGE_SEL0 (0x06) +#define INTEL_D1700_EE_PAGE_SEL1 (0x07) + +#define INTEL_D1700_SMBUS_ERROR BIT(1) +#define INTEL_D1700_SMBUS_BUSY BIT(0) +#define INTEL_D1700_SMBUS_TSOD_EN BIT(20) +#define INTEL_D1700_SMB_CMD_CFG (0x80) +#define INTEL_D1700_SMB_STAT_CFG (0x84) +#define INTEL_D1700_SMB_DATA_CFG (0x88) + +typedef enum cpu_type { + TYPE_INTEL_D1500 = 0, + TYPE_INTEL_D1700 = 1, +} cpu_type_t; + +#define MASK_16 (0xFF) +#define MASK_32 (0xFFFF) +#define MAX_REG (0x1FF) +#define WAIT_TIME (100) +#define SLEEP_TIME (50) + +#define MEM_TEMP_REG (0x5) +#define MEM_TEMP_VALID_VALUE_MASK (0x1FFC) +#define MEM_TEMP_SIGN_BIT (0x400) +#define MEM_TEMP_DECIMAL_BITS_MASK (0x03) +#define MEM_TEMP_INTEGER_BITS_MASK (0x7F) +#define MEM_DATE_CODE_REG (0x143) + +#endif /* _WB_SPD_H_ */ diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_dev.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_dev.c index dd13fe9a991..11c0d0c05b1 100644 --- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_dev.c +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_dev.c @@ -25,6 +25,7 @@ #include #include #include +#include #include #include #include diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_master.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_master.c new file mode 100644 index 00000000000..9f7ce7de568 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_master.c @@ -0,0 +1,111 @@ +/* Provides functionality spi_busnum_to_master() in earlier versions of the kernel */ + +#include +#include +#include + +#include "wb_spi_master.h" + +static int g_wb_spi_master_debug = 0; +static int g_wb_spi_master_error = 0; + +module_param(g_wb_spi_master_debug, int, S_IRUGO | S_IWUSR); +module_param(g_wb_spi_master_error, int, S_IRUGO | S_IWUSR); + +#define WB_SPI_MASTER_VERBOSE(fmt, args...) do { \ + if (g_wb_spi_master_debug) { \ + printk(KERN_INFO "[WB_SPI_MASTER][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +#define WB_SPI_MASTER_ERROR(fmt, args...) do { \ + if (g_wb_spi_master_error) { \ + printk(KERN_ERR "[WB_SPI_MASTER][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +static struct device g_wb_spi_device; +/* point to spi_master_class in drivers/spi/spi.c */ +static struct class *g_wb_spi_master_class = NULL; +static struct spi_controller *g_wb_spi_controller = NULL; + +static int __spi_controller_match(struct device *dev, const void *data) +{ + struct spi_controller *ctlr; + const u16 *bus_num = data; + + ctlr = container_of(dev, struct spi_controller, dev); + return ctlr->bus_num == *bus_num; +} + +/** + * wb_spi_master_busnum_to_master - look up master associated with bus_num + * @bus_num: the master's bus number + * Context: can sleep + * + * Return: the SPI master structure on success, else NULL. + */ +struct spi_controller *wb_spi_master_busnum_to_master(u16 bus_num) +{ + struct device *dev; + struct spi_controller *ctlr = NULL; + + WB_SPI_MASTER_VERBOSE("Enter.\n"); + + if (g_wb_spi_master_class == NULL) { + WB_SPI_MASTER_ERROR("get g_wb_spi_master_class fail.\n"); + return NULL; + } + + dev = class_find_device(g_wb_spi_master_class, NULL, &bus_num, __spi_controller_match); + if (dev) { + ctlr = container_of(dev, struct spi_controller, dev); + } + /* reference got in class_find_device */ + return ctlr; +} +EXPORT_SYMBOL_GPL(wb_spi_master_busnum_to_master); + +static int __init wb_spi_master_init(void) +{ + struct device *dev; + struct spi_board_info chip; + + WB_SPI_MASTER_VERBOSE("Enter!\n"); + + device_initialize(&g_wb_spi_device); + + g_wb_spi_controller = spi_alloc_master(&g_wb_spi_device, sizeof(struct spi_board_info)); + if (g_wb_spi_controller == NULL) { + WB_SPI_MASTER_ERROR("spi_alloc_master failed.\n"); + return -ENOMEM; + } + + g_wb_spi_master_class = g_wb_spi_controller->dev.class; + if (g_wb_spi_master_class == NULL) { + WB_SPI_MASTER_ERROR("get class_spi_master failed.\n"); + kfree(g_wb_spi_controller); + g_wb_spi_controller = NULL; + return -EINVAL; + } + printk(KERN_INFO "WB spi master init success."); + + return 0; +} + +static void __exit wb_spi_master_exit(void) +{ + WB_SPI_MASTER_VERBOSE("Enter!\n"); + if (g_wb_spi_controller != NULL) { + kfree(g_wb_spi_controller); + } + + return; +} + +module_init(wb_spi_master_init); +module_exit(wb_spi_master_exit); + +MODULE_AUTHOR("support"); +MODULE_DESCRIPTION("create spi device"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_ocores.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_ocores.c index f87dd63ecae..2046b592902 100644 --- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_ocores.c +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_ocores.c @@ -34,6 +34,7 @@ #include #include #include +#include #include "wb_spi_ocores.h" @@ -46,6 +47,14 @@ #define SPIOC_MAX_DIV (0x0E) #define SPIOC_DIV(div) (((div) & 0x0f) << 4) +/* spioc_mode = 1: divider occupies bit3~bit7 (5 bits), valid range 0~0x1E */ +#define SPIOC_DIV_5BIT_MASK (0xf8) +#define SPIOC_DIV_5BIT_MAX (0x1E) +#define SPIOC_DIV_5BIT(div) (((div) & 0x1f) << 3) + +#define SPIOC_MODE_DEFAULT (0) +#define SPIOC_MODE_DIV_5BIT (1) + #define SPIOC_STS (0x01) #define SPIOC_INTR_STS BIT(0) #define SPIOC_BUSY_STS BIT(1) @@ -125,6 +134,7 @@ struct spioc { uint32_t freq; uint32_t big_endian; uint32_t irq_flag; + uint32_t spioc_mode; struct device *dev; int transfer_busy_flag; }; @@ -454,10 +464,10 @@ static inline u32 oc_spi_getreg(struct spioc *spioc, int reg) static int spioc_get_clkdiv(struct spioc *spioc, u32 speed) { - u32 rate, div; + u32 rate, div, max_div; rate = spioc->freq; - SPI_OC_VERBOSE("clk get rate:%u, speed:%u\n", rate, speed); + SPI_OC_VERBOSE("clk get rate:%u, speed:%u, spioc_mode:%u\n", rate, speed, spioc->spioc_mode); /* fs = fw/((DIV+2)*2) */ if (speed > (rate / 4)) { @@ -467,8 +477,9 @@ static int spioc_get_clkdiv(struct spioc *spioc, u32 speed) return div; } div = (rate/(2 * speed)) - 2; - if (div > SPIOC_MAX_DIV) { - SPI_OC_ERROR("Unsupport spi device speed, div:%u.\n", div); + max_div = (spioc->spioc_mode == SPIOC_MODE_DIV_5BIT) ? SPIOC_DIV_5BIT_MAX : SPIOC_MAX_DIV; + if (div > max_div) { + SPI_OC_ERROR("Unsupport spi device speed, div:%u, max_div:%u.\n", div, max_div); return -1; } SPI_OC_VERBOSE("DIV is:0x%x\n", div); @@ -506,7 +517,7 @@ static void spioc_chipselect(struct spi_device *spi, int is_active) u8 tx_conf; int ret; - spioc = spi_master_get_devdata(spi->master); + spioc = spi_controller_get_devdata(spi->controller); spioc->transfer_busy_flag = 0; ret = spioc_wait_trans(spioc, msecs_to_jiffies(100)); if (ret < 0) { @@ -514,7 +525,7 @@ static void spioc_chipselect(struct spi_device *spi, int is_active) spioc->transfer_busy_flag = 1; return; } - spioc->chip_select = spi->chip_select; + spioc->chip_select = spi_get_chipselect(spi, 0); SPI_OC_VERBOSE("spioc_chipselect:%u, value:%d.\n", spioc->chip_select, is_active); tx_conf = 0; tx_conf |= SPIOC_CSID(spioc->chip_select); @@ -572,7 +583,7 @@ static int spioc_setup_transfer(struct spi_device *spi, struct spi_transfer *tra u32 hz; int div; - spioc = spi_master_get_devdata(spi->master); + spioc = spi_controller_get_devdata(spi->controller); ctrl = 0; if (spi->mode & SPI_LSB_FIRST) { @@ -608,7 +619,11 @@ static int spioc_setup_transfer(struct spi_device *spi, struct spi_transfer *tra SPI_OC_ERROR("get div error, div:%d.\n", div); return -EINVAL; } - ctrl |= SPIOC_DIV(div); + if (spioc->spioc_mode == SPIOC_MODE_DIV_5BIT) { + ctrl |= SPIOC_DIV_5BIT(div); + } else { + ctrl |= SPIOC_DIV(div); + } SPI_OC_VERBOSE("ctrl:[0x%x].\n", ctrl); @@ -625,14 +640,14 @@ static int spioc_spi_setup(struct spi_device *spi) return -EINVAL; } - spioc = spi_master_get_devdata(spi->master); - if (spi->chip_select >= spioc->num_chipselect) { + spioc = spi_controller_get_devdata(spi->controller); + if (spi_get_chipselect(spi, 0) >= spioc->num_chipselect) { SPI_OC_ERROR("Spi device chipselect:%u, more than max chipselect:%u.\n", - spi->chip_select, spioc->num_chipselect); + spi_get_chipselect(spi, 0), spioc->num_chipselect); return -EINVAL; } SPI_OC_VERBOSE("Support spi device mode:0x%x, chip_select:%u.\n", - spi->mode, spi->chip_select); + spi->mode, spi_get_chipselect(spi, 0)); return 0; } @@ -776,7 +791,7 @@ static int spioc_spi_txrx_bufs(struct spi_device *spi, struct spi_transfer *t) return 0; } - spioc = spi_master_get_devdata(spi->master); + spioc = spi_controller_get_devdata(spi->controller); if (spioc->transfer_busy_flag) { ret = -EBUSY; goto err; @@ -891,6 +906,10 @@ static int ocores_spi_config_init(struct spioc *spioc) spioc->irq_flag = 0; ret = 0; } + ret = of_property_read_u32(dev->of_node, "spioc_mode", &spioc->spioc_mode); + if (ret != 0) { + spioc->spioc_mode = SPIOC_MODE_DEFAULT; + } } else { if (spioc->dev->platform_data == NULL) { SPI_OC_ERROR("platform data config error.\n"); @@ -908,30 +927,31 @@ static int ocores_spi_config_init(struct spioc *spioc) spioc->reg_access_mode = spi_ocores_device->reg_access_mode; spioc->num_chipselect = spi_ocores_device->num_chipselect; spioc->irq_flag = spi_ocores_device->irq_flag; + spioc->spioc_mode = spi_ocores_device->spioc_mode; } SPI_OC_VERBOSE("name:%s, base:0x%x, reg_shift:0x%x, io_width:0x%x, clock-frequency:0x%x.\n", spioc->dev_name, spioc->base_addr, spioc->reg_shift, spioc->reg_io_width, spioc->freq); - SPI_OC_VERBOSE("reg access mode:%u, num_chipselect:%u, irq_flag: %u\n", - spioc->reg_access_mode, spioc->num_chipselect, spioc->irq_flag); + SPI_OC_VERBOSE("reg access mode:%u, num_chipselect:%u, irq_flag: %u, spioc_mode: %u\n", + spioc->reg_access_mode, spioc->num_chipselect, spioc->irq_flag, spioc->spioc_mode); return ret; } static int spioc_probe(struct platform_device *pdev) { - struct spi_master *master; + struct spi_controller *ctlr; struct spioc *spioc; int ret; bool be; ret = -1; - master = spi_alloc_master(&pdev->dev, sizeof(struct spioc)); - if (!master) { - dev_err(&pdev->dev, "Failed to alloc spi master.\n"); + ctlr = spi_alloc_master(&pdev->dev, sizeof(struct spioc)); + if (!ctlr) { + dev_err(&pdev->dev, "Failed to alloc spi controller.\n"); goto out; } - spioc = spi_master_get_devdata(master); + spioc = spi_controller_get_devdata(ctlr); platform_set_drvdata(pdev, spioc); spioc->dev = &pdev->dev; @@ -980,17 +1000,17 @@ static int spioc_probe(struct platform_device *pdev) } /* master state */ - master->num_chipselect = spioc->num_chipselect; - master->mode_bits = MODEBITS; - master->setup = spioc_spi_setup; + ctlr->num_chipselect = spioc->num_chipselect; + ctlr->mode_bits = MODEBITS; + ctlr->setup = spioc_spi_setup; if (spioc->dev->of_node) { - master->dev.of_node = pdev->dev.of_node; + ctlr->dev.of_node = pdev->dev.of_node; } else { - master->bus_num = spioc->bus_num; + ctlr->bus_num = spioc->bus_num; } /* setup the state for the bitbang driver */ - spioc->bitbang.master = master; + spioc->bitbang.ctlr = ctlr; spioc->bitbang.setup_transfer = spioc_setup_transfer; spioc->bitbang.chipselect = spioc_chipselect; spioc->bitbang.txrx_bufs = spioc_spi_txrx_bufs; @@ -1021,27 +1041,32 @@ static int spioc_probe(struct platform_device *pdev) goto free; } dev_info(spioc->dev, "registered spi-%d for %s with base address:0x%x success.\n", - master->bus_num, spioc->dev_name, spioc->base_addr); + ctlr->bus_num, spioc->dev_name, spioc->base_addr); return ret; free: - spi_master_put(master); + spi_controller_put(ctlr); out: return ret; } +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 11, 0) static int spioc_remove(struct platform_device *pdev) +#else +static void spioc_remove(struct platform_device *pdev) +#endif { struct spioc *spioc; - struct spi_master *master; + struct spi_controller *ctlr; spioc = platform_get_drvdata(pdev); - master = spioc->bitbang.master; + ctlr = spioc->bitbang.ctlr; spi_bitbang_stop(&spioc->bitbang); platform_set_drvdata(pdev, NULL); - spi_master_put(master); - + spi_controller_put(ctlr); +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 11, 0) return 0; +#endif } static const struct of_device_id spioc_match[] = { diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_ocores.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_ocores.h index e94a770552e..38f52d707f6 100644 --- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_ocores.h +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_ocores.h @@ -36,6 +36,7 @@ typedef struct spi_ocores_device_s { uint32_t clock_frequency; uint32_t num_chipselect; uint32_t irq_flag; + uint32_t spioc_mode; int device_flag; } spi_ocores_device_t; diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_switch_dev.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_switch_dev.c new file mode 100644 index 00000000000..18076cd4e7a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_switch_dev.c @@ -0,0 +1,269 @@ +#include +#include +#include +#include +#include +#include +#include +#include "wb_mdio_dev.h" +#include "wb_switch_dev.h" + +static int debug = 0; +module_param(debug, int, S_IRUGO | S_IWUSR); + +uint32_t bcm53134_phy_addr[BCM53134_MAX_DEV_NUMBER] = {0x0, 0x1, 0x2, 0x3, 0x04}; + +static const struct of_device_id wb_switch_match[] = { + { .compatible = "bcm53134", .data = (void *)BCM53134}, + {}, +}; +MODULE_DEVICE_TABLE(of, wb_switch_match); + +static const struct platform_device_id wb_switch_id_table[] = { + { "bcm53134", BCM53134 }, + { } +}; +MODULE_DEVICE_TABLE(platform, wb_switch_id_table); + + +static void switch_dev_device_release(struct device *dev) +{ + return; +} + +static int get_dev_reg_info(int dev_type, uint32_t **phy_addr, int *num) +{ + switch(dev_type) + { + case BCM53134: + *phy_addr = bcm53134_phy_addr; + *num = BCM53134_MAX_DEV_NUMBER; + break; + default: + return -EOPNOTSUPP; + } + return 0; +} + +static int of_switch_dev_config_init(switch_dev_info_t *switch_dev) +{ + struct device *dev; + int num_phys, i, ret = 0; + uint32_t *phy_addr; + int max_num_phy; + const struct of_device_id *match; + + dev = switch_dev->dev; + + /* Match device type from device tree */ + match = of_match_node(wb_switch_match, dev->of_node); + if (!match) { + dev_err(dev, "dev type match fail.\n"); + return -EINVAL; + } + switch_dev->dev_type = (enum chips)(unsigned long)of_device_get_match_data(dev); + + ret = get_dev_reg_info(switch_dev->dev_type, &phy_addr, &max_num_phy); + if (ret != 0) { + DEBUG_ERROR("get_dev_reg_info fail, ret:%d\n", ret); + return ret; + } + + ret = of_property_read_string(dev->of_node, "mdio_bus_name", &switch_dev->mdio_bus_name); + if (ret != 0) { + DEBUG_ERROR("Missing required properties\n"); + return -EINVAL; + } + + num_phys = of_property_count_strings(dev->of_node, "mdio_names"); + if (num_phys <= 0) { + dev_err(dev, "phy num[%d] err.\n", num_phys); + return -EINVAL; + } + + if ((num_phys != max_num_phy) || (num_phys > MAX_MDIO_DEVICES) ) { + dev_err(dev, "phy num[%d] config err, not equal dev_count:%d or exceed max:%d.\n", num_phys, max_num_phy, MAX_MDIO_DEVICES); + return -EINVAL; + } + + switch_dev->dev_num = 0; + for (i = 0; i < num_phys; i++) { + switch_dev->mdio_dev_device[i].mdio_bus_name = switch_dev->mdio_bus_name; + ret = of_property_read_string_index(dev->of_node, "mdio_names", i, + &switch_dev->mdio_dev_device[i].dev_name); + if (ret != 0) { + dev_err(dev, "mdio device[%d] config err.\n", i); + return -EINVAL; + } + + switch_dev->mdio_dev_device[i].addr = phy_addr[i]; + switch_dev->platform_device[i].name = MDIO_DEV_COMPATIBLE_NAME; + switch_dev->platform_device[i].id = i; + switch_dev->platform_device[i].dev.platform_data = &switch_dev->mdio_dev_device[i]; + switch_dev->platform_device[i].dev.release = switch_dev_device_release; + switch_dev->dev_num++; + } + + return 0; +} + +static void mdio_device_register(switch_dev_info_t *switch_dev) +{ + int i, ret = 0; + for (i = 0; i < switch_dev->dev_num; i++) { + ret = platform_device_register(&switch_dev->platform_device[i]); + if (ret < 0) { + switch_dev->mdio_dev_device[i].device_flag = -1; /* device register failed, set flag -1 */ + dev_info(switch_dev->dev, "wb-switch-dev.%d register failed!\n", i + 1); + } else { + switch_dev->mdio_dev_device[i].device_flag = 0; /* device register suucess, set flag 0 */ + } + } +} + +static void mdio_device_unregister(switch_dev_info_t *switch_dev) +{ + int i; + for (i = switch_dev->dev_num - 1; i >= 0; i--) { + if (switch_dev->mdio_dev_device[i].device_flag == 0) { + platform_device_unregister(&switch_dev->platform_device[i]); + } + } +} + + +static int switch_dev_config_init(switch_dev_info_t *switch_dev) +{ + switch_dev_info_t *platform_switch_info; + int i, ret; + uint32_t *phy_addr; + int max_num_phy, num_phys; + struct platform_device *pdev = to_platform_device(switch_dev->dev); + const struct platform_device_id *pid; + + num_phys = 0; + + platform_switch_info = switch_dev->dev->platform_data; + if (platform_switch_info == NULL) { + dev_err(switch_dev->dev, "Failed to get platform data config.\n"); + return -ENXIO; + } + + /* Configure switch_dev based on platform_switch_info */ + switch_dev->mdio_bus_name = platform_switch_info->mdio_bus_name; + + /* Get device type from platform_device_id table */ + pid = platform_get_device_id(pdev); + if (!pid) { + dev_err(switch_dev->dev, "Failed to get platform device ID\n"); + return -ENODEV; + } + + /* Set device type based on platform_device_id */ + switch_dev->dev_type = pid->driver_data; + + /* Get device configuration based on device type */ + ret = get_dev_reg_info(switch_dev->dev_type, &phy_addr, &max_num_phy); + if (ret != 0) { + dev_err(switch_dev->dev, "get_dev_reg_info fail, ret:%d\n", ret); + return ret; + } + + /* Calculate number of devices by checking valid dev_name in platform_switch_info */ + num_phys = 0; + for (i = 0; i < MAX_MDIO_DEVICES; i++) { + if (platform_switch_info->mdio_dev_device[i].dev_name) { + num_phys++; + } else { + break; + } + } + + if (num_phys <= 0 || num_phys > MAX_MDIO_DEVICES) { + dev_err(switch_dev->dev, "phy num[%d] err.\n", num_phys); + return -EINVAL; + } + + if (num_phys != max_num_phy) { + dev_err(switch_dev->dev, "phy num[%d] config err, not equal dev_count:%d.\n", + num_phys, max_num_phy); + return -EINVAL; + } + + switch_dev->dev_num = num_phys; + for (i = 0; i < num_phys; i++) { + switch_dev->mdio_dev_device[i].dev_name = platform_switch_info->mdio_dev_device[i].dev_name; + switch_dev->mdio_dev_device[i].alias = platform_switch_info->mdio_dev_device[i].dev_name; + switch_dev->mdio_dev_device[i].mdio_bus_name = switch_dev->mdio_bus_name; /* Use the switch device's bus name */ + switch_dev->mdio_dev_device[i].addr = phy_addr[i]; + switch_dev->mdio_dev_device[i].device_flag = 0; + + /* Setup platform device */ + switch_dev->platform_device[i].name = MDIO_DEV_COMPATIBLE_NAME; + switch_dev->platform_device[i].id = i; + switch_dev->platform_device[i].dev.platform_data = &switch_dev->mdio_dev_device[i]; + switch_dev->platform_device[i].dev.release = switch_dev_device_release; + } + + return 0; +} + +static int wb_switch_dev_probe(struct platform_device *pdev) +{ + switch_dev_info_t *switch_dev; + int ret; + + switch_dev = devm_kzalloc(&pdev->dev, sizeof(switch_dev_info_t), GFP_KERNEL); + if (!switch_dev) { + dev_err(&pdev->dev, "switch_dev memory allocation failed\n"); + return -ENOMEM; + } + + switch_dev->dev = &pdev->dev; + + /* Try to get device type from device tree if available */ + if (pdev->dev.of_node) { + ret = of_switch_dev_config_init(switch_dev); + } else { + ret = switch_dev_config_init(switch_dev); + } + + if (ret) { + dev_err(&pdev->dev, "wb_switch_dev config_init fail, ret: %d\n", ret); + return -EINVAL; + } + + platform_set_drvdata(pdev, switch_dev); + mdio_device_register(switch_dev); + return 0; +} + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(6,11,0) +static void wb_switch_dev_remove(struct platform_device *pdev) +#else +static int wb_switch_dev_remove(struct platform_device *pdev) +#endif +{ + switch_dev_info_t *switch_dev; + + switch_dev = platform_get_drvdata(pdev); + mdio_device_unregister(switch_dev); +#if LINUX_VERSION_CODE < KERNEL_VERSION(6,11,0) + return 0; +#endif +} + +static struct platform_driver wb_switch_driver = { + .driver = { + .name = KBUILD_MODNAME, + .of_match_table = wb_switch_match, + }, + .probe = wb_switch_dev_probe, + .remove = wb_switch_dev_remove, + .id_table = wb_switch_id_table, +}; + +module_platform_driver(wb_switch_driver); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("support"); +MODULE_DESCRIPTION("Driver for WB Switch Device with Multiple MDIO Devices"); \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_switch_dev.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_switch_dev.h new file mode 100644 index 00000000000..c07f99e51f3 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_switch_dev.h @@ -0,0 +1,22 @@ +#ifndef __WB_SWITCH_DEV_H__ +#define __WB_SWITCH_DEV_H__ + +#define MAX_MDIO_DEVICES 5 + +enum chips { + BCM53134 +}; + +typedef struct switch_dev_info { + mdio_dev_device_t mdio_dev_device[MAX_MDIO_DEVICES]; + struct device *dev; + uint32_t dev_num; + struct platform_device platform_device[MAX_MDIO_DEVICES]; + const char *mdio_bus_name; + int dev_type; + int device_flag; +} switch_dev_info_t; + +#define BCM53134_MAX_DEV_NUMBER (5) + +#endif /* __WB_SWITCH_DEV_H__ */ diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_ucd9000.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_ucd9000.c new file mode 100644 index 00000000000..bb3c15054ec --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_ucd9000.c @@ -0,0 +1,882 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Hardware monitoring driver for UCD90xxx Sequencer and System Health + * Controller series + * + * Copyright (C) 2011 Ericsson AB. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "wb_pmbus.h" +#include + +enum chips { ucd9000, ucd90120, ucd90124, ucd90160, ucd90320, ucd9090, + ucd90910 }; + +#define UCD9000_MONITOR_CONFIG (0xd5) +#define UCD9000_NUM_PAGES (0xd6) +#define UCD9000_FAN_CONFIG_INDEX (0xe7) +#define UCD9000_FAN_CONFIG (0xe8) +#define UCD9000_MFR_STATUS (0xf3) +#define UCD9000_GPIO_SELECT (0xfa) +#define UCD9000_GPIO_CONFIG (0xfb) +#define UCD9000_DEVICE_ID (0xfd) + +/* GPIO CONFIG bits */ +#define UCD9000_GPIO_CONFIG_ENABLE BIT(0) +#define UCD9000_GPIO_CONFIG_OUT_ENABLE BIT(1) +#define UCD9000_GPIO_CONFIG_OUT_VALUE BIT(2) +#define UCD9000_GPIO_CONFIG_STATUS BIT(3) +#define UCD9000_GPIO_INPUT (0) +#define UCD9000_GPIO_OUTPUT (1) + +#define UCD9000_MON_TYPE(x) (((x) >> 5) & 0x07) +#define UCD9000_MON_PAGE(x) ((x) & 0x1f) + +#define UCD9000_MON_VOLTAGE (1) +#define UCD9000_MON_TEMPERATURE (2) +#define UCD9000_MON_CURRENT (3) +#define UCD9000_MON_VOLTAGE_HW (4) + +#define UCD9000_NUM_FAN (4) + +#define UCD9000_GPIO_NAME_LEN (16) +#define UCD9090_NUM_GPIOS (23) +#define UCD901XX_NUM_GPIOS (26) +#define UCD90320_NUM_GPIOS (84) +#define UCD90910_NUM_GPIOS (26) + +#define UCD9000_DEBUGFS_NAME_LEN (24) +#define UCD9000_GPI_COUNT (8) +#define UCD90320_GPI_COUNT (32) + +#define UCD9000_RETRY_SLEEP_TIME (10000) /* 10ms */ +#define UCD9000_RETRY_TIME (3) +#define WB_DEV_NAME_MAX_LEN (64) + +static int debug = 0; +module_param(debug, int, S_IRUGO | S_IWUSR); +struct ucd9000_data { + u8 fan_data[UCD9000_NUM_FAN][I2C_SMBUS_BLOCK_MAX]; + struct pmbus_driver_info info; +#ifdef CONFIG_GPIOLIB + struct gpio_chip gpio; +#endif + struct dentry *debugfs; +}; +#define to_ucd9000_data(_info) container_of(_info, struct ucd9000_data, info) + +struct ucd9000_debugfs_entry { + struct i2c_client *client; + u8 index; +}; + +/* fault record */ +#define FAULT_RECORD_SIZE (512) + +#define LOGGED_FAULT_CLEAR (0xEA) +#define LOGGED_FAULT_DETAIL_INDEX (0xEB) +#define LOGGED_FAULT_INFO (0xEC) + +#define PAGE_FAULT BIT(31) + +#define FAULT_TYPE_OFFSET (27) +#define FAULT_TYPE_MASK (0xF) + +#define FAULT_PAGE_OFFSET (23) +#define FAULT_PAGE_MASK (0xF) + +#define FAULT_CLEAR_CMD (0xC) +#define FAULT_CLEAR_LENGTH (18) + +static ssize_t get_fault_record(struct device *dev, struct device_attribute *da, char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct pmbus_data *data = i2c_get_clientdata(client); + u8 block_buffer[I2C_SMBUS_BLOCK_MAX + 1]; + int ret; + int fault_num; + int fault_index; + int i; + u32 tmp_data; + int value; + u8 fault_type; + u8 fault_page; + int exponent; + int vout_mode; + + mutex_lock(&data->update_lock); + memset(buf, 0, FAULT_RECORD_SIZE); + memset(block_buffer, 0, sizeof(block_buffer)); + /* get fault index and number */ + ret = i2c_smbus_read_i2c_block_data(client, LOGGED_FAULT_DETAIL_INDEX, 2, block_buffer); + if (ret <= 0) { + dev_err(&client->dev, "Failed to read LOGGED_FAULT_DETAIL_INDEX, ret = %d\n", ret); + mutex_unlock(&data->update_lock); + return ret; + } + + fault_num = block_buffer[1]; + fault_index = block_buffer[0]; + DEBUG_VERBOSE("bus %d addr 0x%x, get_fault_record\n", client->adapter->nr, client->addr); + DEBUG_VERBOSE("fault_num = 0x%x", fault_num); + DEBUG_VERBOSE("fault_index = 0x%x", fault_index); + + if (fault_num > 0) { + for (i = 0; i < fault_num; i++) { + block_buffer[0] = i; + block_buffer[1] = fault_num; + /* set fault index */ + ret = i2c_smbus_write_i2c_block_data(client, LOGGED_FAULT_DETAIL_INDEX, 2, block_buffer); + if (ret != 0) { + dev_dbg(&client->dev, "Failed to write LOGGED_FAULT_DETAIL_INDEX, ret = %d\n", ret); + mutex_unlock(&data->update_lock); + return ret; + } + + /* get one fault record */ + ret = i2c_smbus_read_i2c_block_data(client, LOGGED_FAULT_INFO, 0xB, block_buffer); + if (ret <= 0) { + dev_dbg(&client->dev, "Failed to read LOGGED_FAULT_INFO, ret = %d\n", ret); + mutex_unlock(&data->update_lock); + return ret; + } + + /* fault id + days data */ + tmp_data = (u32)(block_buffer[5] << 24 | block_buffer[6] << 16 | block_buffer[7] << 8 | block_buffer[8]); + DEBUG_VERBOSE("tmp_data = 0x%x\n", tmp_data); + if (tmp_data & PAGE_FAULT) { + fault_type = tmp_data >> FAULT_TYPE_OFFSET & FAULT_TYPE_MASK; + DEBUG_VERBOSE("fault_type = 0x%x\n", fault_type); + + fault_page = tmp_data >> FAULT_PAGE_OFFSET & FAULT_PAGE_MASK; + DEBUG_VERBOSE("fault_page = 0x%x\n", fault_page); + + /* get page vout_mode */ + ret = wb_pmbus_read_byte_data(client, fault_page, PMBUS_VOUT_MODE); + if (ret < 0) { + dev_dbg(&client->dev, "Failed to read PMBUS_VOUT_MODE, ret = %d\n", ret); + mutex_unlock(&data->update_lock); + return ret; + } + vout_mode = ret; + DEBUG_VERBOSE("vout_mode = 0x%x\n", vout_mode); + exponent = ((s8)(vout_mode << 3)) >> 3; + DEBUG_VERBOSE("exponent = 0x%x\n", exponent); + block_buffer[11] = vout_mode; + + /* value data */ + value = (int)(block_buffer[10] << 8 | block_buffer[9]); + value = value * 1000; + if (exponent >= 0) { + value <<= exponent; + } else { + value >>= -exponent; + } + + DEBUG_VERBOSE("value = %d.%dv\n", value / 1000, value % 1000); + } else { /* not page fault */ + DEBUG_VERBOSE("bus %d addr 0x%x, not page fault\n", client->adapter->nr, client->addr); + } + + memcpy(buf + i * 16, &block_buffer[0], 16); + } + + block_buffer[0] = fault_index; + block_buffer[1] = fault_num; + /* set fault index to origin index */ + ret = i2c_smbus_write_i2c_block_data(client, LOGGED_FAULT_DETAIL_INDEX, 2, block_buffer); + if (ret != 0) { + dev_dbg(&client->dev, "Failed to write LOGGED_FAULT_DETAIL_INDEX2, ret = %d\n", ret); + mutex_unlock(&data->update_lock); + return ret; + } + } + + mutex_unlock(&data->update_lock); + return FAULT_RECORD_SIZE; +} + +static ssize_t clear_fault_record(struct device *dev, struct device_attribute *da, const char *buf, size_t count) +{ + char tmp_value[32]; + int err; + int ret; + struct i2c_client *client = to_i2c_client(dev); + struct pmbus_data *data = i2c_get_clientdata(client); + unsigned long val; + + err = kstrtoul(buf, 16, &val); + if (err) { + dev_dbg(&client->dev, "kstrtoul failed, err = %d\n", err); + return err; + } + + if (val != 0) { + dev_dbg(&client->dev, "please enter 0 to clear fault_record, val = %ld\n", val); + return -EINVAL; + } + + mutex_lock(&data->update_lock); + memset(tmp_value, 0, sizeof(tmp_value)); + tmp_value[0] = FAULT_CLEAR_LENGTH; + /* write 18 byte 0 to clear fault record */ + ret = i2c_smbus_write_i2c_block_data(client, LOGGED_FAULT_CLEAR, FAULT_CLEAR_LENGTH + 1, tmp_value); + if (ret != 0) { + dev_dbg(&client->dev, "Failed to write LOGGED_FAULT_CLEAR, ret = %d\n", ret); + mutex_unlock(&data->update_lock); + return ret; + } + + DEBUG_VERBOSE("bus %d addr 0x%x, clear_fault_record success\n", client->adapter->nr, client->addr); + mutex_unlock(&data->update_lock); + + return count; +} + +static int wb_i2c_smbus_read_block_data(const struct i2c_client *client, u8 command, u8 *values) +{ + int rv, i; + + for(i = 0; i < UCD9000_RETRY_TIME; i++) { + rv = i2c_smbus_read_block_data(client, command, values); + if(rv >= 0){ + return rv; + } + usleep_range(UCD9000_RETRY_SLEEP_TIME, UCD9000_RETRY_SLEEP_TIME + 1); + } + DEBUG_ERROR("read_block_data failed. nr: %d, addr: 0x%x, reg: 0x%x, rv: %d\n", + client->adapter->nr, client->addr, command, rv); + return rv; +} + +static int ucd9000_get_fan_config(struct i2c_client *client, int fan) +{ + int fan_config = 0; + struct ucd9000_data *data + = to_ucd9000_data(wb_pmbus_get_driver_info(client)); + + if (data->fan_data[fan][3] & 1) + fan_config |= PB_FAN_2_INSTALLED; /* Use lower bit position */ + + /* Pulses/revolution */ + fan_config |= (data->fan_data[fan][3] & 0x06) >> 1; + + return fan_config; +} + +static int ucd9000_read_byte_data(struct i2c_client *client, int page, int reg) +{ + int ret = 0; + int fan_config; + + switch (reg) { + case PMBUS_FAN_CONFIG_12: + if (page > 0) + return -ENXIO; + + ret = ucd9000_get_fan_config(client, 0); + if (ret < 0) + return ret; + fan_config = ret << 4; + ret = ucd9000_get_fan_config(client, 1); + if (ret < 0) + return ret; + fan_config |= ret; + ret = fan_config; + break; + case PMBUS_FAN_CONFIG_34: + if (page > 0) + return -ENXIO; + + ret = ucd9000_get_fan_config(client, 2); + if (ret < 0) + return ret; + fan_config = ret << 4; + ret = ucd9000_get_fan_config(client, 3); + if (ret < 0) + return ret; + fan_config |= ret; + ret = fan_config; + break; + default: + ret = -ENODATA; + break; + } + return ret; +} + +static ssize_t ucd9000_block_data_str_show(struct device *dev, struct device_attribute *da, char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + struct pmbus_data *data = i2c_get_clientdata(client); + u8 block_buffer[I2C_SMBUS_BLOCK_MAX + 1]; + u8 reg = to_sensor_dev_attr(da)->index; + int ret; + + memset(buf, 0, PAGE_SIZE); + memset(block_buffer, 0, sizeof(block_buffer)); + + mutex_lock(&data->update_lock); + ret = wb_pmbus_read_block_data(client, 0, reg, block_buffer); + if (ret < 0) { + dev_err(&client->dev, "Failed to read ucd9000 data, reg: 0x%x, ret = %d\n", reg, ret); + mutex_unlock(&data->update_lock); + return ret; + } + mutex_unlock(&data->update_lock); + + return snprintf(buf, PAGE_SIZE, "%s\n", block_buffer); +} + +static SENSOR_DEVICE_ATTR(version, S_IRUGO, ucd9000_block_data_str_show, NULL, PMBUS_MFR_REVISION); +static SENSOR_DEVICE_ATTR(fault_record, S_IRUGO | S_IWUSR , get_fault_record, clear_fault_record, 0); + +static struct attribute *ucd90160_attrs[] = { + &sensor_dev_attr_version.dev_attr.attr, + &sensor_dev_attr_fault_record.dev_attr.attr, + NULL +}; + +static const struct attribute_group ucd9000_sysfs_group = { + .attrs = ucd90160_attrs, +}; + +static const struct i2c_device_id ucd9000_id[] = { + {"wb_ucd9000", ucd9000}, + {"wb_ucd90120", ucd90120}, + {"wb_ucd90124", ucd90124}, + {"wb_ucd90160", ucd90160}, + {"wb_ucd90320", ucd90320}, + {"wb_ucd9090", ucd9090}, + {"wb_ucd90910", ucd90910}, + {} +}; +MODULE_DEVICE_TABLE(i2c, ucd9000_id); + +static const struct of_device_id __maybe_unused ucd9000_of_match[] = { + { + .compatible = "ti,wb_ucd9000", + .data = (void *)ucd9000 + }, + { + .compatible = "ti,wb_ucd90120", + .data = (void *)ucd90120 + }, + { + .compatible = "ti,wb_ucd90124", + .data = (void *)ucd90124 + }, + { + .compatible = "ti,wb_ucd90160", + .data = (void *)ucd90160 + }, + { + .compatible = "ti,wb_ucd90320", + .data = (void *)ucd90320 + }, + { + .compatible = "ti,wb_ucd9090", + .data = (void *)ucd9090 + }, + { + .compatible = "ti,wb_ucd90910", + .data = (void *)ucd90910 + }, + { }, +}; +MODULE_DEVICE_TABLE(of, ucd9000_of_match); + +#ifdef CONFIG_GPIOLIB +static int ucd9000_gpio_read_config(struct i2c_client *client, + unsigned int offset) +{ + int ret; + + /* No page set required */ + ret = i2c_smbus_write_byte_data(client, UCD9000_GPIO_SELECT, offset); + if (ret < 0) + return ret; + + return i2c_smbus_read_byte_data(client, UCD9000_GPIO_CONFIG); +} + +static int ucd9000_gpio_get(struct gpio_chip *gc, unsigned int offset) +{ + struct i2c_client *client = gpiochip_get_data(gc); + int ret; + + ret = ucd9000_gpio_read_config(client, offset); + if (ret < 0) + return ret; + + return !!(ret & UCD9000_GPIO_CONFIG_STATUS); +} + +static void ucd9000_gpio_set(struct gpio_chip *gc, unsigned int offset, + int value) +{ + struct i2c_client *client = gpiochip_get_data(gc); + int ret; + + ret = ucd9000_gpio_read_config(client, offset); + if (ret < 0) { + dev_dbg(&client->dev, "failed to read GPIO %d config: %d\n", + offset, ret); + return; + } + + if (value) { + if (ret & UCD9000_GPIO_CONFIG_STATUS) + return; + + ret |= UCD9000_GPIO_CONFIG_STATUS; + } else { + if (!(ret & UCD9000_GPIO_CONFIG_STATUS)) + return; + + ret &= ~UCD9000_GPIO_CONFIG_STATUS; + } + + ret |= UCD9000_GPIO_CONFIG_ENABLE; + + /* Page set not required */ + ret = i2c_smbus_write_byte_data(client, UCD9000_GPIO_CONFIG, ret); + if (ret < 0) { + dev_dbg(&client->dev, "Failed to write GPIO %d config: %d\n", + offset, ret); + return; + } + + ret &= ~UCD9000_GPIO_CONFIG_ENABLE; + + ret = i2c_smbus_write_byte_data(client, UCD9000_GPIO_CONFIG, ret); + if (ret < 0) + dev_dbg(&client->dev, "Failed to write GPIO %d config: %d\n", + offset, ret); +} + +static int ucd9000_gpio_get_direction(struct gpio_chip *gc, + unsigned int offset) +{ + struct i2c_client *client = gpiochip_get_data(gc); + int ret; + + ret = ucd9000_gpio_read_config(client, offset); + if (ret < 0) + return ret; + + return !(ret & UCD9000_GPIO_CONFIG_OUT_ENABLE); +} + +static int ucd9000_gpio_set_direction(struct gpio_chip *gc, + unsigned int offset, bool direction_out, + int requested_out) +{ + struct i2c_client *client = gpiochip_get_data(gc); + int ret, config, out_val; + + ret = ucd9000_gpio_read_config(client, offset); + if (ret < 0) + return ret; + + if (direction_out) { + out_val = requested_out ? UCD9000_GPIO_CONFIG_OUT_VALUE : 0; + + if (ret & UCD9000_GPIO_CONFIG_OUT_ENABLE) { + if ((ret & UCD9000_GPIO_CONFIG_OUT_VALUE) == out_val) + return 0; + } else { + ret |= UCD9000_GPIO_CONFIG_OUT_ENABLE; + } + + if (out_val) + ret |= UCD9000_GPIO_CONFIG_OUT_VALUE; + else + ret &= ~UCD9000_GPIO_CONFIG_OUT_VALUE; + + } else { + if (!(ret & UCD9000_GPIO_CONFIG_OUT_ENABLE)) + return 0; + + ret &= ~UCD9000_GPIO_CONFIG_OUT_ENABLE; + } + + ret |= UCD9000_GPIO_CONFIG_ENABLE; + config = ret; + + /* Page set not required */ + ret = i2c_smbus_write_byte_data(client, UCD9000_GPIO_CONFIG, config); + if (ret < 0) + return ret; + + config &= ~UCD9000_GPIO_CONFIG_ENABLE; + + return i2c_smbus_write_byte_data(client, UCD9000_GPIO_CONFIG, config); +} + +static int ucd9000_gpio_direction_input(struct gpio_chip *gc, + unsigned int offset) +{ + return ucd9000_gpio_set_direction(gc, offset, UCD9000_GPIO_INPUT, 0); +} + +static int ucd9000_gpio_direction_output(struct gpio_chip *gc, + unsigned int offset, int val) +{ + return ucd9000_gpio_set_direction(gc, offset, UCD9000_GPIO_OUTPUT, + val); +} + +static void ucd9000_probe_gpio(struct i2c_client *client, + const struct i2c_device_id *mid, + struct ucd9000_data *data) +{ + int rc; + + switch (mid->driver_data) { + case ucd9090: + data->gpio.ngpio = UCD9090_NUM_GPIOS; + break; + case ucd90120: + case ucd90124: + case ucd90160: + data->gpio.ngpio = UCD901XX_NUM_GPIOS; + break; + case ucd90320: + data->gpio.ngpio = UCD90320_NUM_GPIOS; + break; + case ucd90910: + data->gpio.ngpio = UCD90910_NUM_GPIOS; + break; + default: + return; /* GPIO support is optional. */ + } + + /* + * Pinmux support has not been added to the new gpio_chip. + * This support should be added when possible given the mux + * behavior of these IO devices. + */ + data->gpio.label = client->name; + data->gpio.get_direction = ucd9000_gpio_get_direction; + data->gpio.direction_input = ucd9000_gpio_direction_input; + data->gpio.direction_output = ucd9000_gpio_direction_output; + data->gpio.get = ucd9000_gpio_get; + data->gpio.set = ucd9000_gpio_set; + data->gpio.can_sleep = true; + data->gpio.base = -1; + data->gpio.parent = &client->dev; + + rc = devm_gpiochip_add_data(&client->dev, &data->gpio, client); + if (rc) + dev_warn(&client->dev, "Could not add gpiochip: %d\n", rc); +} +#else +static void ucd9000_probe_gpio(struct i2c_client *client, + const struct i2c_device_id *mid, + struct ucd9000_data *data) +{ +} +#endif /* CONFIG_GPIOLIB */ + +#ifdef CONFIG_DEBUG_FS +static int ucd9000_get_mfr_status(struct i2c_client *client, u8 *buffer) +{ + int ret = wb_pmbus_set_page(client, 0, 0xff); + + if (ret < 0) + return ret; + + return wb_i2c_smbus_read_block_data(client, UCD9000_MFR_STATUS, buffer); +} + +static int ucd9000_debugfs_show_mfr_status_bit(void *data, u64 *val) +{ + struct ucd9000_debugfs_entry *entry = data; + struct i2c_client *client = entry->client; + u8 buffer[I2C_SMBUS_BLOCK_MAX]; + int ret, i; + + ret = ucd9000_get_mfr_status(client, buffer); + if (ret < 0) + return ret; + + /* + * GPI fault bits are in sets of 8, two bytes from end of response. + */ + i = ret - 3 - entry->index / 8; + if (i >= 0) + *val = !!(buffer[i] & BIT(entry->index % 8)); + + return 0; +} +DEFINE_DEBUGFS_ATTRIBUTE(ucd9000_debugfs_mfr_status_bit, + ucd9000_debugfs_show_mfr_status_bit, NULL, "%1lld\n"); + +static ssize_t ucd9000_debugfs_read_mfr_status(struct file *file, + char __user *buf, size_t count, + loff_t *ppos) +{ + struct i2c_client *client = file->private_data; + u8 buffer[I2C_SMBUS_BLOCK_MAX]; + char str[(I2C_SMBUS_BLOCK_MAX * 2) + 2]; + char *res; + int rc; + + rc = ucd9000_get_mfr_status(client, buffer); + if (rc < 0) + return rc; + + res = bin2hex(str, buffer, min(rc, I2C_SMBUS_BLOCK_MAX)); + *res++ = '\n'; + *res = 0; + + return simple_read_from_buffer(buf, count, ppos, str, res - str); +} + +static const struct file_operations ucd9000_debugfs_show_mfr_status_fops = { + .llseek = noop_llseek, + .read = ucd9000_debugfs_read_mfr_status, + .open = simple_open, +}; + +static int ucd9000_init_debugfs(struct i2c_client *client, + const struct i2c_device_id *mid, + struct ucd9000_data *data) +{ + struct dentry *debugfs; + struct ucd9000_debugfs_entry *entries; + int i, gpi_count; + char name[UCD9000_DEBUGFS_NAME_LEN]; + + debugfs = wb_pmbus_get_debugfs_dir(client); + if (!debugfs) + return -ENOENT; + + data->debugfs = debugfs_create_dir(client->name, debugfs); + if (!data->debugfs) + return -ENOENT; + + /* + * Of the chips this driver supports, only the UCD9090, UCD90160, + * UCD90320, and UCD90910 report GPI faults in their MFR_STATUS + * register, so only create the GPI fault debugfs attributes for those + * chips. + */ + if (mid->driver_data == ucd9090 || mid->driver_data == ucd90160 || + mid->driver_data == ucd90320 || mid->driver_data == ucd90910) { + gpi_count = mid->driver_data == ucd90320 ? UCD90320_GPI_COUNT + : UCD9000_GPI_COUNT; + entries = devm_kcalloc(&client->dev, + gpi_count, sizeof(*entries), + GFP_KERNEL); + if (!entries) + return -ENOMEM; + + for (i = 0; i < gpi_count; i++) { + entries[i].client = client; + entries[i].index = i; + scnprintf(name, UCD9000_DEBUGFS_NAME_LEN, + "gpi%d_alarm", i + 1); + debugfs_create_file(name, 0444, data->debugfs, + &entries[i], + &ucd9000_debugfs_mfr_status_bit); + } + } + + scnprintf(name, UCD9000_DEBUGFS_NAME_LEN, "mfr_status"); + debugfs_create_file(name, 0444, data->debugfs, client, + &ucd9000_debugfs_show_mfr_status_fops); + + return 0; +} +#else +static int ucd9000_init_debugfs(struct i2c_client *client, + const struct i2c_device_id *mid, + struct ucd9000_data *data) +{ + return 0; +} +#endif /* CONFIG_DEBUG_FS */ + +static int ucd9000_probe(struct i2c_client *client) +{ + u8 block_buffer[I2C_SMBUS_BLOCK_MAX + 1]; + char wb_device_name[WB_DEV_NAME_MAX_LEN]; + struct ucd9000_data *data; + struct pmbus_driver_info *info; + const struct i2c_device_id *mid; + enum chips chip; + int i, ret; + + if (!i2c_check_functionality(client->adapter, + I2C_FUNC_SMBUS_BYTE_DATA | + I2C_FUNC_SMBUS_BLOCK_DATA)) + return -ENODEV; + + ret = wb_i2c_smbus_read_block_data(client, UCD9000_DEVICE_ID, + block_buffer); + if (ret < 0) { + dev_err(&client->dev, "Failed to read device ID\n"); + return ret; + } + block_buffer[ret] = '\0'; + dev_info(&client->dev, "Device ID %s\n", block_buffer); + + mem_clear(wb_device_name, sizeof(wb_device_name)); + snprintf(wb_device_name, sizeof(wb_device_name), "wb_%s", block_buffer); + + for (mid = ucd9000_id; mid->name[0]; mid++) { + if (!strncasecmp(mid->name, wb_device_name, strlen(mid->name))) + break; + } + if (!mid->name[0]) { + dev_err(&client->dev, "Unsupported device\n"); + return -ENODEV; + } + + if (client->dev.of_node) + chip = (enum chips)of_device_get_match_data(&client->dev); + else + chip = mid->driver_data; + + if (chip != ucd9000 && strcmp(client->name, mid->name) != 0) + dev_notice(&client->dev, + "Device mismatch: Configured %s, detected %s\n", + client->name, mid->name); + + data = devm_kzalloc(&client->dev, sizeof(struct ucd9000_data), + GFP_KERNEL); + if (!data) + return -ENOMEM; + info = &data->info; + + ret = i2c_smbus_read_byte_data(client, UCD9000_NUM_PAGES); + if (ret < 0) { + dev_err(&client->dev, + "Failed to read number of active pages\n"); + return ret; + } + info->pages = ret; + if (!info->pages) { + dev_err(&client->dev, "No pages configured\n"); + return -ENODEV; + } + + /* The internal temperature sensor is always active */ + /* ucd90160 have no temperature */ + /* info->func[0] = PMBUS_HAVE_TEMP; */ + + /* Everything else is configurable */ + ret = wb_i2c_smbus_read_block_data(client, UCD9000_MONITOR_CONFIG, + block_buffer); + if (ret <= 0) { + dev_err(&client->dev, "Failed to read configuration data\n"); + return -ENODEV; + } + for (i = 0; i < ret; i++) { + int page = UCD9000_MON_PAGE(block_buffer[i]); + + if (page >= info->pages) + continue; + + switch (UCD9000_MON_TYPE(block_buffer[i])) { + case UCD9000_MON_VOLTAGE: + case UCD9000_MON_VOLTAGE_HW: + info->func[page] |= PMBUS_HAVE_VOUT + | PMBUS_HAVE_STATUS_VOUT; + break; + case UCD9000_MON_TEMPERATURE: + info->func[page] |= PMBUS_HAVE_TEMP2 + | PMBUS_HAVE_STATUS_TEMP; + break; + case UCD9000_MON_CURRENT: + info->func[page] |= PMBUS_HAVE_IOUT + | PMBUS_HAVE_STATUS_IOUT; + break; + default: + break; + } + } + + /* Fan configuration */ + if (mid->driver_data == ucd90124) { + for (i = 0; i < UCD9000_NUM_FAN; i++) { + i2c_smbus_write_byte_data(client, + UCD9000_FAN_CONFIG_INDEX, i); + ret = wb_i2c_smbus_read_block_data(client, + UCD9000_FAN_CONFIG, + data->fan_data[i]); + if (ret < 0) + return ret; + } + i2c_smbus_write_byte_data(client, UCD9000_FAN_CONFIG_INDEX, 0); + + info->read_byte_data = ucd9000_read_byte_data; + info->func[0] |= PMBUS_HAVE_FAN12 | PMBUS_HAVE_STATUS_FAN12 + | PMBUS_HAVE_FAN34 | PMBUS_HAVE_STATUS_FAN34; + } + + ucd9000_probe_gpio(client, mid, data); + + ret = wb_pmbus_do_probe(client, info); + if (ret) { + dev_info(&client->dev, "ucd9000 pmbus probe error %d\n", ret); + return ret; + } + + ret = ucd9000_init_debugfs(client, mid, data); + if (ret) + dev_warn(&client->dev, "Failed to register debugfs: %d\n", + ret); + + ret = sysfs_create_group(&client->dev.kobj, &ucd9000_sysfs_group); + if (ret != 0) { + dev_err(&client->dev, "sysfs_create_group error\n"); + return ret; + } + + return 0; +} + +static void ucd9000_remove(struct i2c_client *client) +{ + int ret; + sysfs_remove_group(&client->dev.kobj, &ucd9000_sysfs_group); + + ret = wb_pmbus_do_remove(client); + if (ret != 0) { + DEBUG_ERROR("ucd9000 fail remove pmbus ,ret = %d\n", ret); + } + return; +} + +/* This is the driver that will be inserted */ +static struct i2c_driver ucd9000_driver = { + .driver = { + .name = "wb_ucd9000", + .of_match_table = of_match_ptr(ucd9000_of_match), + }, + .probe = ucd9000_probe, + .remove = ucd9000_remove, + .id_table = ucd9000_id, +}; + +module_i2c_driver(ucd9000_driver); + +MODULE_AUTHOR("support"); +MODULE_DESCRIPTION("PMBus driver for TI UCD90xxx"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_ucd9081.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_ucd9081.c index 2fae45c72ae..5214bd5894e 100644 --- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_ucd9081.c +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_ucd9081.c @@ -31,6 +31,7 @@ #include #include #include +#include #define WB_UCD9081_RAIL1H (0x00) /* Channel 1 voltage address, high 8 bits */ #define WB_UCD9081_RAIL1L (0x01) /* Channel 1 voltage address, low 8 bits */ @@ -283,7 +284,11 @@ static struct attribute *ucd9081_hwmon_attrs[] = { }; ATTRIBUTE_GROUPS(ucd9081_hwmon); +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int ucd9081_probe(struct i2c_client *client, const struct i2c_device_id *id) +#else +static int ucd9081_probe(struct i2c_client *client) +#endif { int ret; struct ucd9081_data *data; @@ -315,7 +320,11 @@ static int ucd9081_probe(struct i2c_client *client, const struct i2c_device_id * return 0; } +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0) +static int ucd9081_remove(struct i2c_client *client) +#else static void ucd9081_remove(struct i2c_client *client) +#endif { struct ucd9081_data *data; @@ -323,7 +332,11 @@ static void ucd9081_remove(struct i2c_client *client) dev_info(&client->dev, "ucd9081 do remove\n"); hwmon_device_unregister(data->hwmon_dev); +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0) + return 0; +#else return; +#endif } static const struct i2c_device_id ucd9081_id[] = { diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_uio_irq.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_uio_irq.c index 835386127fb..e4c36432e1d 100644 --- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_uio_irq.c +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_uio_irq.c @@ -246,7 +246,11 @@ static int dfd_irq_probe(struct platform_device *pdev) return ret; } +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 11, 0) static int dfd_irq_remove(struct platform_device *pdev) +#else +static void dfd_irq_remove(struct platform_device *pdev) +#endif { dfd_irq_t *dfd_irq; struct uio_info *dfd_irq_info; @@ -254,12 +258,13 @@ static int dfd_irq_remove(struct platform_device *pdev) dfd_irq = platform_get_drvdata(pdev); dfd_irq_info = &dfd_irq->dfd_irq_info; + sysfs_remove_group(&pdev->dev.kobj, &dfd_irq->attr_group); uio_unregister_device(dfd_irq_info); + platform_set_drvdata(pdev, NULL); kfree(dfd_irq); - - sysfs_remove_group(&pdev->dev.kobj, &dfd_irq->attr_group); - +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 11, 0) return 0; +#endif } static struct of_device_id dfd_irq_match[] = { diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_vr_common.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_vr_common.c new file mode 100644 index 00000000000..e08162abf25 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_vr_common.c @@ -0,0 +1,286 @@ +/* + * wb_vr_common.c + * ko to read the PMBUS_IC_DEVICE_ID to determine the VR device type and load the driver. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "pmbus.h" +#include "wb_vr_common.h" +#include + +#define PROXY_NAME "wb-vr-common" +#define PMBUS_RETRY_SLEEP_TIME (10000) /* 10ms */ +#define PMBUS_RETRY_TIME (3) + +static int g_wb_vr_common_debug = 0; +static int g_wb_vr_common_error = 0; + +module_param(g_wb_vr_common_debug, int, S_IRUGO | S_IWUSR); +module_param(g_wb_vr_common_error, int, S_IRUGO | S_IWUSR); + +#define WB_VR_COMMON_VERBOSE(fmt, args...) do { \ + if (g_wb_vr_common_debug) { \ + printk(KERN_INFO "[WB_VR_COMMON][VER][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +#define WB_VR_COMMON_ERROR(fmt, args...) do { \ + if (g_wb_vr_common_error) { \ + printk(KERN_ERR "[WB_VR_COMMON][ERR][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +static int of_vr_common_config_init(struct platform_device *pdev, wb_vr_common_t *wb_vr_common_dev) +{ + int ret = 0; + + ret += of_property_read_u32(pdev->dev.of_node, "i2c_bus", &wb_vr_common_dev->i2c_bus); + ret += of_property_read_u32(pdev->dev.of_node, "i2c_addr", &wb_vr_common_dev->i2c_addr); + if (ret != 0) { + dev_err(&pdev->dev, "Failed to get dts config, ret:%d.\n", ret); + return -ENXIO; + } + + WB_VR_COMMON_VERBOSE("i2c_bus: %d, i2c_addr: 0x%x\n", wb_vr_common_dev->i2c_bus, wb_vr_common_dev->i2c_addr); + + return 0; +} + +static int vr_common_config_init(struct platform_device *pdev, wb_vr_common_t *wb_vr_common_dev) +{ + wb_vr_common_device_t *wb_vr_common_device; + + if (pdev->dev.platform_data == NULL) { + dev_err(&pdev->dev, "Failed to get platform data config.\n"); + return -ENXIO; + } + wb_vr_common_device = pdev->dev.platform_data; + + wb_vr_common_dev->i2c_bus = wb_vr_common_device->i2c_bus; + wb_vr_common_dev->i2c_addr = wb_vr_common_device->i2c_addr; + + WB_VR_COMMON_VERBOSE("i2c_bus: %d, i2c_addr: 0x%x\n", wb_vr_common_dev->i2c_bus, wb_vr_common_dev->i2c_addr); + + return 0; +} + +static int vr_common_probe(struct platform_device *pdev) +{ + wb_vr_common_t *wb_vr_common_dev; + struct i2c_client *client = NULL; + char device_id[DEVICE_ID_LEN]; + struct i2c_adapter *adapter; + struct i2c_board_info board_info; + u8 buf[I2C_SMBUS_BLOCK_MAX]; + int i, ret, len, offset; + + wb_vr_common_dev = devm_kzalloc(&pdev->dev, sizeof(wb_vr_common_t), GFP_KERNEL); + if (!wb_vr_common_dev) { + dev_err(&pdev->dev, "devm_kzalloc failed.\n"); + return -ENOMEM; + } + + if (pdev->dev.of_node) { + ret = of_vr_common_config_init(pdev, wb_vr_common_dev); + } else { + ret = vr_common_config_init(pdev, wb_vr_common_dev); + } + + if (ret < 0) { + return ret; + } + + adapter = i2c_get_adapter(wb_vr_common_dev->i2c_bus); + if (!adapter) { + dev_err(&pdev->dev, "Failed to get I2C adapter for bus %d\n", wb_vr_common_dev->i2c_bus); + wb_vr_common_dev->adap = NULL; + return -ENODEV; + } + wb_vr_common_dev->adap = adapter; + + client = i2c_new_dummy_device(adapter, wb_vr_common_dev->i2c_addr); + if (IS_ERR(client)) { + dev_err(&pdev->dev, "%s: new dummy i2c device failed\n", __func__); + ret = PTR_ERR(client); + goto put_adapter; + } + + for(i = 0; i < PMBUS_RETRY_TIME; i++) { + ret = i2c_smbus_write_byte_data(client, PMBUS_PAGE, 0); + if (ret >= 0) { + break; + } + usleep_range(PMBUS_RETRY_SLEEP_TIME, PMBUS_RETRY_SLEEP_TIME + 1); + } + if (ret < 0) { + dev_info(&pdev->dev, "PMBus set page 0 failed!\n"); + } + + /* Enable PEC if the controller supports it */ + for(i = 0; i < PMBUS_RETRY_TIME; i++) { + ret = i2c_smbus_read_byte_data(client, PMBUS_CAPABILITY); + if (ret >= 0) { + break; + } + usleep_range(PMBUS_RETRY_SLEEP_TIME, PMBUS_RETRY_SLEEP_TIME + 1); + } + // if (ret >= 0 && (ret & PB_CAPABILITY_ERROR_CHECK)){ + // client->flags |= I2C_CLIENT_PEC; + // } + + for(i = 0; i < PMBUS_RETRY_TIME; i++) { + mem_clear(buf, sizeof(buf)); + len = i2c_smbus_read_block_data(client, PMBUS_IC_DEVICE_ID, buf); + if (len >= 0) { + break; + } + usleep_range(PMBUS_RETRY_SLEEP_TIME, PMBUS_RETRY_SLEEP_TIME + 1); + } + if (len < 0) { + dev_err(&pdev->dev, "read i2c block data failed, ret:%d.\n", len); + i2c_unregister_device(client); + ret = -ENODEV; + goto put_adapter; + } + i2c_unregister_device(client); + client = NULL; + + offset = 0; + mem_clear(device_id, sizeof(device_id)); + for (i = 0; i < len; i++) { + offset += scnprintf(device_id + offset, DEVICE_ID_LEN - offset, "0x%02x ", buf[i]); + } + dev_info(&pdev->dev, "get vr dev device id success, id: %s.\n", device_id); + + mem_clear(&board_info, sizeof(struct i2c_board_info)); + ret = -ENODEV; + for (i = 0; i < ARRAY_SIZE(pmbus_dev_infos); i++) { + if ((len == pmbus_dev_infos[i].dev_id_len) && (memcmp(buf, pmbus_dev_infos[i].device_id, len) == 0)) { + dev_info(&pdev->dev, "find vr device success, device name: %s, i2c bus: %d, i2c addr: 0x%x.\n", + pmbus_dev_infos[i].device_name, wb_vr_common_dev->i2c_bus, wb_vr_common_dev->i2c_addr); + strscpy(board_info.type, pmbus_dev_infos[i].device_name, I2C_NAME_SIZE); + board_info.addr = wb_vr_common_dev->i2c_addr; + client = i2c_new_client_device(adapter, &board_info); + if (IS_ERR(client)) { + dev_err(&pdev->dev, "register device i2c client fail, device name: %s, i2c bus: %d, i2c addr: 0x%x.\n", + pmbus_dev_infos[i].device_name, wb_vr_common_dev->i2c_bus, wb_vr_common_dev->i2c_addr); + ret = PTR_ERR(client); + goto put_adapter; + } + wb_vr_common_dev->client = client; + platform_set_drvdata(pdev, wb_vr_common_dev); + ret = 0; + break; + } + } + + if (ret == 0) { + dev_info(&pdev->dev, "register vr device success, device name: %s, i2c bus: %d, i2c addr: 0x%x.\n", + pmbus_dev_infos[i].device_name, wb_vr_common_dev->i2c_bus, wb_vr_common_dev->i2c_addr); + } else { + dev_err(&pdev->dev, "find vr device fail, not support device id : %s.\n", device_id); + } + +put_adapter: + i2c_put_adapter(adapter); + return ret; +} + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(6,11,0) +static void vr_common_remove(struct platform_device *pdev) +#else +static int vr_common_remove(struct platform_device *pdev) +#endif +{ + wb_vr_common_t *wb_vr_common_dev; + int i2c_bus, i2c_addr; + struct i2c_adapter *adap; + + wb_vr_common_dev = platform_get_drvdata(pdev); + if (wb_vr_common_dev == NULL) { + dev_warn(&pdev->dev, "wb_vr_common_dev is NULL, exit\n"); +#if LINUX_VERSION_CODE < KERNEL_VERSION(6,11,0) + return 0; +#endif + } + + i2c_bus = wb_vr_common_dev->i2c_bus; + i2c_addr = wb_vr_common_dev->i2c_addr; + WB_VR_COMMON_VERBOSE("Enter vr_common_remove, i2c_bus: %d, i2c addr: 0x%02x\n", i2c_bus, i2c_addr); + + adap = i2c_get_adapter(i2c_bus); + if (adap == NULL) { + dev_warn(&pdev->dev, "i2c adapter-%d is NULL, skip to unregister i2c client: %d-%04x\n", i2c_bus, i2c_bus, i2c_addr); + goto exit; + } + if (adap != wb_vr_common_dev->adap) { + dev_warn(&pdev->dev, "i2c adapter-%d address changed, origin addr: %pK, new addr: %pK, skip to unregister i2c client: %d-%04x\n", + i2c_bus, wb_vr_common_dev->adap, adap, i2c_bus, i2c_addr); + goto exit_i2c_put; + } + + if (wb_vr_common_dev->client != NULL) { + WB_VR_COMMON_VERBOSE("Starting unregister i2c client: %d-%04x\n", i2c_bus, i2c_addr); + if (device_is_registered(&wb_vr_common_dev->client->dev)) { + i2c_unregister_device(wb_vr_common_dev->client); + dev_info(&pdev->dev, "Unregister i2c client: %d-%04x success\n", i2c_bus, i2c_addr); + } else { + dev_warn(&pdev->dev, "i2c client: %d-%04x already unregister\n", i2c_bus,i2c_addr); + } + wb_vr_common_dev->client = NULL; + } else { + dev_warn(&pdev->dev, "i2c client: %d-%04x is NULL\n", i2c_bus,i2c_addr); + } +exit_i2c_put: + i2c_put_adapter(adap); +exit: + wb_vr_common_dev->adap = NULL; + platform_set_drvdata(pdev, NULL); + +#if LINUX_VERSION_CODE < KERNEL_VERSION(6,11,0) + return 0; +#endif +} + +static struct of_device_id vr_common_match[] = { + { + .compatible = "wb-vr-common", + }, + {}, +}; +MODULE_DEVICE_TABLE(of, vr_common_match); + +static struct platform_driver wb_vr_common_driver = { + .probe = vr_common_probe, + .remove = vr_common_remove, + .driver = { + .owner = THIS_MODULE, + .name = PROXY_NAME, + .of_match_table = vr_common_match, + }, +}; + +static int __init wb_vr_common_init(void) +{ + return platform_driver_register(&wb_vr_common_driver); +} + +static void __exit wb_vr_common_exit(void) +{ + platform_driver_unregister(&wb_vr_common_driver); +} + +module_init(wb_vr_common_init); +module_exit(wb_vr_common_exit); +MODULE_DESCRIPTION("vr common driver"); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("support"); diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_vr_common.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_vr_common.h new file mode 100644 index 00000000000..432af3d0183 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_vr_common.h @@ -0,0 +1,27 @@ +#ifndef __WB_VR_COMMON_H__ +#define __WB_VR_COMMON_H__ + +#include + +#define DEVICE_ID_LEN (256) + +typedef struct wb_vr_common_s { + uint32_t i2c_bus; + uint32_t i2c_addr; + struct i2c_client *client; + struct i2c_adapter *adap; +} wb_vr_common_t; + +typedef struct wb_vr_common_device_s { + uint32_t i2c_bus; + uint32_t i2c_addr; + int device_flag; +} wb_vr_common_device_t; + +typedef struct { + char device_name[I2C_NAME_SIZE]; + uint8_t device_id[DEVICE_ID_LEN]; + uint32_t dev_id_len; +} vr_dev_info_t; + +#endif diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_wdt.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_wdt.c index 899886a0390..ca5201a201a 100644 --- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_wdt.c +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_wdt.c @@ -21,7 +21,9 @@ #include #include #include -#include +#include +#include +#include #include #include #include @@ -30,6 +32,7 @@ #include #include #include +#include #include "wb_wdt.h" @@ -310,15 +313,15 @@ static void wdt_hwping(wb_wdt_priv_t *priv) case HW_ALGO_TOGGLE: gpio_wdt = &priv->gpio_wdt; gpio_wdt->state = !gpio_wdt->state; - gpio_set_value_cansleep(gpio_wdt->gpio, gpio_wdt->state); + gpiod_set_value_cansleep(gpio_wdt->gpiod, gpio_wdt->state); WDT_VERBOSE("gpio toggle wdt work. val:%u\n", gpio_wdt->state); break; case HW_ALGO_LEVEL: gpio_wdt = &priv->gpio_wdt; /* Pulse */ - gpio_set_value_cansleep(gpio_wdt->gpio, !gpio_wdt->active_low); + gpiod_set_value_cansleep(gpio_wdt->gpiod, !gpio_wdt->active_low); udelay(1); - gpio_set_value_cansleep(gpio_wdt->gpio, gpio_wdt->active_low); + gpiod_set_value_cansleep(gpio_wdt->gpiod, gpio_wdt->active_low); WDT_VERBOSE("gpio level wdt work.\n"); break; } @@ -795,7 +798,8 @@ static int gpio_wdt_init(wb_wdt_priv_t *priv, wb_wdt_device_t *wb_wdt_device) { struct device *dev; gpio_wdt_info_t *gpio_wdt; - enum of_gpio_flags flags; + unsigned long flags; + struct gpio_desc *gpiod; uint32_t f = 0; int ret; @@ -803,33 +807,42 @@ static int gpio_wdt_init(wb_wdt_priv_t *priv, wb_wdt_device_t *wb_wdt_device) gpio_wdt = &priv->gpio_wdt; if (dev->of_node) { - gpio_wdt->gpio = of_get_gpio_flags(dev->of_node, 0, &flags); + gpiod = devm_gpiod_get_index(dev, NULL, 0, GPIOD_ASIS); + if (IS_ERR(gpiod)) { + dev_err(dev, "Failed to get gpio descriptor, ret: %ld.\n", PTR_ERR(gpiod)); + return PTR_ERR(gpiod); + } + gpio_wdt->gpiod = gpiod; + gpio_wdt->gpio = desc_to_gpio(gpiod); + gpio_wdt->active_low = gpiod_is_active_low(gpiod); } else { gpio_wdt->gpio = wb_wdt_device->wdt_config_mode.gpio_wdt.gpio; flags = wb_wdt_device->wdt_config_mode.gpio_wdt.flags; - } - if (!gpio_is_valid(gpio_wdt->gpio)) { - dev_err(dev, "gpio is invalid.\n"); - return gpio_wdt->gpio; + gpio_wdt->gpiod = gpio_to_desc(gpio_wdt->gpio); + if (!gpio_wdt->gpiod) { + dev_err(dev, "gpio is invalid.\n"); + return -ENODEV; + } + gpio_wdt->active_low = !!(flags & GPIOF_ACTIVE_LOW); } - gpio_wdt->active_low = flags & OF_GPIO_ACTIVE_LOW; - if(priv->hw_algo == HW_ALGO_TOGGLE) { f = GPIOF_IN; } else { f = gpio_wdt->active_low ? GPIOF_OUT_INIT_HIGH : GPIOF_OUT_INIT_LOW; } - ret = devm_gpio_request_one(dev, gpio_wdt->gpio, f, - dev_name(dev)); - if (ret) { - dev_err(dev, "devm_gpio_request_one failed.\n"); - return ret; + if (!dev->of_node) { + ret = devm_gpio_request_one(dev, gpio_wdt->gpio, f, + dev_name(dev)); + if (ret) { + dev_err(dev, "devm_gpio_request_one failed.\n"); + return ret; + } } gpio_wdt->state = gpio_wdt->active_low; - gpio_direction_output(gpio_wdt->gpio, gpio_wdt->state); + gpiod_direction_output(gpio_wdt->gpiod, gpio_wdt->state); WDT_VERBOSE("active_low:%d\n", gpio_wdt->active_low); return 0; @@ -1164,10 +1177,10 @@ static void unregister_action(struct platform_device *pdev) if (priv->config_mode == GPIO_FEED_WDT_MODE) { gpio_wdt = &priv->gpio_wdt; - gpio_set_value_cansleep(gpio_wdt->gpio, !gpio_wdt->active_low); + gpiod_set_value_cansleep(gpio_wdt->gpiod, !gpio_wdt->active_low); if (priv->hw_algo == HW_ALGO_TOGGLE) { - gpio_direction_input(gpio_wdt->gpio); + gpiod_direction_input(gpio_wdt->gpiod); } } else { logic_wdt = &priv->logic_wdt; @@ -1182,13 +1195,18 @@ static void unregister_action(struct platform_device *pdev) return; } +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 11, 0) static int wb_wdt_remove(struct platform_device *pdev) +#else +static void wb_wdt_remove(struct platform_device *pdev) +#endif { WDT_VERBOSE("enter remove wdt.\n"); unregister_action(pdev); dev_info(&pdev->dev, "remove wdt finish.\n"); - +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 11, 0) return 0; +#endif } static void wb_wdt_shutdown(struct platform_device *pdev) diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_wdt.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_wdt.h index 43146468887..fbed3dca3b8 100644 --- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_wdt.h +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_wdt.h @@ -21,14 +21,17 @@ #ifndef __WB_WDT_H__ #define __WB_WDT_H__ -#include +#include #define SYSFS_NO_CFG (0xff) #define INVALID_REG_ADDR (0xffffffff) +struct gpio_desc; + typedef struct gpio_wdt_info_s { int gpio; - enum of_gpio_flags flags; + unsigned long flags; + struct gpio_desc *gpiod; bool active_low; bool state; }gpio_wdt_info_t; diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_xdpe12284.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_xdpe12284.c new file mode 100644 index 00000000000..90f595ba88f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_xdpe12284.c @@ -0,0 +1,897 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Hardware monitoring driver for Infineon Multi-phase Digital VR Controllers + * + * Copyright (c) 2020 Mellanox Technologies. All rights reserved. + */ + +#include +#include +#include +#include +#include +#include +#include +#include "wb_pmbus.h" +#include + +#define XDPE122_PROT_VR12_5MV (0x01) /* VR12.0 mode, 5-mV DAC */ +#define XDPE122_PROT_VR12_5_10MV (0x02) /* VR12.5 mode, 10-mV DAC */ +#define XDPE122_PROT_IMVP9_10MV (0x03) /* IMVP9 mode, 10-mV DAC */ +#define XDPE122_AMD_625MV (0x10) /* AMD mode 6.25mV */ +#define XDPE122_PAGE_NUM (2) +#define XDPE122_WRITE_PROTECT_CLOSE (0x00) +#define XDPE122_WRITE_PROTECT_OPEN (0x40) +#define XDPE122_LOOPA_STATUS_PAGE (0x60) +#define XDPE122_LOOPB_STATUS_PAGE (0x61) +#define XDPE122_I2C_READ_IOUT (0x0E) +#define XDPE122_I2C_READ_VOUT (0x12) +#define XDPE122_I2C_READ_TEMP (0x18) +#define XDPE122_I2C_READ_POUT (0x1B) +#define IOUT_REG_TO_VALUE(reg_val) ((((s16)(((reg_val) & 0x7fff) << 1)) >> 1) * 125 / 2) /* LSB: 62.5mA */ +#define VOUT_REG_TO_VALUE(reg_val) (((reg_val) & 0xfff) * 10 / 8) /* LSB: 1.25mV */ +#define TEMP_REG_TO_VALUE(reg_val) ((((s16)(((reg_val) & 0xfff) << 4)) >> 4) * 125) /* LSB: 0.125C */ +#define POUT_REG_TO_VALUE(reg_val) (((reg_val) & 0x7fff) * 31250) /* LSB: 31.25mW */ + +#define XDPE122_VERSION_PAGE (0x22) +#define XDPE122_VERSION1_REG (0x3f) +#define XDPE122_VERSION2_REG (0x40) + +#define XDPE122_LOOP_A (0) +#define XDPE122_LOOP_B (1) + +#define XDPE122_PHASE_CHANGE_REG (0x3) +#define XDPE122_PHASE_VALUE_REG (0x10) + +#define XDPE122_PHASE_REG_DEFAULT_VALUE (0x600) +#define XDPE122_PHASE1_REG_VALUE (0x608) +#define XDPE122_PHASE2_REG_VALUE (0x610) +#define XDPE122_PHASE3_REG_VALUE (0x618) +#define XDPE122_PHASE4_REG_VALUE (0x620) +#define XDPE122_PHASE5_REG_VALUE (0x628) +#define XDPE122_PHASE6_REG_VALUE (0x630) +#define XDPE122_PHASE7_REG_VALUE (0x638) +#define XDPE122_PHASE8_REG_VALUE (0x640) + +#define PHASE_CURR_REG_TO_VALUE(reg_val) ((((s16)(((reg_val) & 0xfff) << 4)) >> 4) * 125 / 2) /* LSB: 62.5mA */ + +static pmbus_info_t xdpe122_dfx_infos[] = { + {.page_mask = GENMASK(1,0), .pmbus_name = "STATUS_BYTE", .pmbus_reg = PMBUS_STATUS_BYTE, .width = BYTE_DATA, .data_type = RAWDATA_BYTE}, + {.page_mask = GENMASK(1,0), .pmbus_name = "STATUS_WORD", .pmbus_reg = PMBUS_STATUS_WORD, .width = WORD_DATA, .data_type = RAWDATA_WORD}, + {.page_mask = GENMASK(1,0), .pmbus_name = "STATUS_VOUT", .pmbus_reg = PMBUS_STATUS_VOUT, .width = BYTE_DATA, .data_type = RAWDATA_BYTE}, + {.page_mask = GENMASK(1,0), .pmbus_name = "STATUS_IOUT", .pmbus_reg = PMBUS_STATUS_IOUT, .width = BYTE_DATA, .data_type = RAWDATA_BYTE}, + {.page_mask = GENMASK(1,0), .pmbus_name = "STATUS_INPUT", .pmbus_reg = PMBUS_STATUS_INPUT, .width = BYTE_DATA, .data_type = RAWDATA_BYTE}, + {.page_mask = GENMASK(1,0), .pmbus_name = "STATUS_TEMP", .pmbus_reg = PMBUS_STATUS_TEMPERATURE, .width = BYTE_DATA, .data_type = RAWDATA_BYTE}, + {.page_mask = GENMASK(1,0), .pmbus_name = "STATUS_CML", .pmbus_reg = PMBUS_STATUS_CML, .width = BYTE_DATA, .data_type = RAWDATA_BYTE}, + {.page_mask = GENMASK(1,0), .pmbus_name = "STATUS_MFR_SPEC", .pmbus_reg = PMBUS_STATUS_MFR_SPECIFIC, .width = BYTE_DATA, .data_type = RAWDATA_BYTE}, + {.page_mask = GENMASK(1,0), .pmbus_name = "READ_VIN", .pmbus_reg = PMBUS_READ_VIN, .width = WORD_DATA, .data_type = SENSOR_DATA}, + {.page_mask = GENMASK(1,0), .pmbus_name = "READ_IIN", .pmbus_reg = PMBUS_READ_IIN, .width = WORD_DATA, .data_type = SENSOR_DATA}, + {.page_mask = GENMASK(1,0), .pmbus_name = "READ_VOUT", .pmbus_reg = PMBUS_READ_VOUT, .width = WORD_DATA, .data_type = SENSOR_DATA}, + {.page_mask = GENMASK(1,0), .pmbus_name = "READ_IOUT", .pmbus_reg = PMBUS_READ_IOUT, .width = WORD_DATA, .data_type = SENSOR_DATA}, + {.page_mask = GENMASK(1,0), .pmbus_name = "READ_TEMP1", .pmbus_reg = PMBUS_READ_TEMPERATURE_1, .width = WORD_DATA, .data_type = SENSOR_DATA}, + {.page_mask = GENMASK(1,0), .pmbus_name = "READ_POUT", .pmbus_reg = PMBUS_READ_POUT, .width = WORD_DATA, .data_type = SENSOR_DATA}, + {.page_mask = GENMASK(1,0), .pmbus_name = "READ_PIN", .pmbus_reg = PMBUS_READ_PIN, .width = WORD_DATA, .data_type = SENSOR_DATA}, + {.page_mask = GENMASK(1,0), .pmbus_name = "READ_DUTY_CYCLE", .pmbus_reg = PMBUS_READ_DUTY_CYCLE, .width = WORD_DATA, .data_type = RAWDATA_WORD}, +}; + +typedef struct xdpe122_phase_page_s { + u8 loop; + u8 phase_curr_change_page; + u8 phase_curr_value_page; +} xdpe122_phase_page_t; + +static xdpe122_phase_page_t g_xdpe122_phase_page_group[] = { + {.loop = XDPE122_LOOP_A, .phase_curr_change_page = 0x30, .phase_curr_value_page = 0x60}, + {.loop = XDPE122_LOOP_B, .phase_curr_change_page = 0x31, .phase_curr_value_page = 0x61}, +}; + +typedef struct xdpe122_phase_curr_reg_value_s { + u8 phase_index; + int phase_curr_reg_value; +} xdpe122_phase_curr_reg_value_t; + +static xdpe122_phase_curr_reg_value_t g_xdpe122_phase_curr_reg_value_group[] = { + {.phase_index = 1, .phase_curr_reg_value = XDPE122_PHASE1_REG_VALUE}, + {.phase_index = 2, .phase_curr_reg_value = XDPE122_PHASE2_REG_VALUE}, + {.phase_index = 3, .phase_curr_reg_value = XDPE122_PHASE3_REG_VALUE}, + {.phase_index = 4, .phase_curr_reg_value = XDPE122_PHASE4_REG_VALUE}, + {.phase_index = 5, .phase_curr_reg_value = XDPE122_PHASE5_REG_VALUE}, + {.phase_index = 6, .phase_curr_reg_value = XDPE122_PHASE6_REG_VALUE}, + {.phase_index = 7, .phase_curr_reg_value = XDPE122_PHASE7_REG_VALUE}, + {.phase_index = 8, .phase_curr_reg_value = XDPE122_PHASE8_REG_VALUE}, +}; + +static int debug = 0; +module_param(debug, int, S_IRUGO | S_IWUSR); + +static ssize_t show_cfg_reg_value(struct device *dev, struct device_attribute *da, char *buf) +{ + struct i2c_client *client = to_i2c_client(dev); + int reg = to_sensor_dev_attr_2(da)->index; + int page = to_sensor_dev_attr_2(da)->nr; + struct pmbus_data *data = i2c_get_clientdata(client); + int ret; + + mutex_lock(&data->update_lock); + ret = wb_pmbus_read_word_data(client, page, 0xff, reg); + if (ret < 0) { + DEBUG_ERROR("pmbus_read_word_data read page 0x%x 0x%x failed, errno: %d\n", page, reg, ret); + mutex_unlock(&data->update_lock); + return ret; + } + DEBUG_VERBOSE("Reading value 0x%x from page 0x%x reg 0x%x\n", ret, page, reg); + mutex_unlock(&data->update_lock); + return snprintf(buf, PAGE_SIZE, "0x%04x\n", ret); +} + +static ssize_t set_cfg_reg_value(struct device *dev, struct device_attribute *da, const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev); + int reg = to_sensor_dev_attr_2(da)->index; + int page = to_sensor_dev_attr_2(da)->nr; + struct pmbus_data *data = i2c_get_clientdata(client); + int ret, value; + + ret = kstrtoint(buf, 0, &value); + if (ret) { + DEBUG_ERROR("kstrtoint failed %s, errno: %d\n", buf, ret); + return ret; + } + mutex_lock(&data->update_lock); + DEBUG_VERBOSE("Writting 0x%x to page 0x%x reg 0x%x\n", value, page, reg); + ret = wb_pmbus_write_word_data(client, page, reg, value); + if (ret < 0) { + DEBUG_ERROR("pmbus_write_word_data write page 0x%x 0x%x value 0x%x failed, errno: %d\n", page, reg, value, ret); + mutex_unlock(&data->update_lock); + return ret; + } + mutex_unlock(&data->update_lock); + return count; +} + +static int xdpe122_data2reg_vid(struct pmbus_data *data, int page, long val) +{ + int vrm_version; + + vrm_version = data->info->vrm_version[page]; + DEBUG_VERBOSE("page%d, vrm_version: %d, data_val: %ld\n", + page, vrm_version, val); + /* Convert data to VID register. */ + switch (vrm_version) { + case vr13: + if (val >= 500) { + return 1 + DIV_ROUND_CLOSEST(val - 500, 10); + } + return 0; + case vr12: + if (val >= 250) { + return 1 + DIV_ROUND_CLOSEST(val - 250, 5); + } + return 0; + case imvp9: + if (val >= 200) { + return 1 + DIV_ROUND_CLOSEST(val - 200, 10); + } + return 0; + case amd625mv: + if (val >= 200 && val <= 1550) { + return DIV_ROUND_CLOSEST((1550 - val) * 100, 625); + } + return 0; + default: + DEBUG_ERROR("Unsupport vrm_version, page%d, vrm_version: %d\n", + page, vrm_version); + return -EINVAL; + } + return 0; +} + +/* + * Convert VID sensor values to milli- or micro-units + * depending on sensor type. + */ +static s64 xdpe122_reg2data_vid(struct pmbus_data *data, int page, long val) +{ + + long rv; + int vrm_version; + + rv = 0; + vrm_version = data->info->vrm_version[page]; + switch (vrm_version) { + case vr11: + if (val >= 0x02 && val <= 0xb2) + rv = DIV_ROUND_CLOSEST(160000 - (val - 2) * 625, 100); + break; + case vr12: + if (val >= 0x01) + rv = 250 + (val - 1) * 5; + break; + case vr13: + if (val >= 0x01) + rv = 500 + (val - 1) * 10; + break; + case imvp9: + if (val >= 0x01) + rv = 200 + (val - 1) * 10; + break; + case amd625mv: + if (val >= 0x0 && val <= 0xd8) + rv = DIV_ROUND_CLOSEST(155000 - val * 625, 100); + break; + } + DEBUG_VERBOSE("page%d, vrm_version: %d, reg_val: 0x%lx, data_val: %ld\n", + page, vrm_version, val, rv); + return rv; +} + +static ssize_t xdpe122_avs_vout_show(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev->parent); + struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct pmbus_data *data = i2c_get_clientdata(client); + int vout_cmd, vout; + + mutex_lock(&data->update_lock); + vout_cmd = wb_pmbus_read_word_data(client, attr->index, 0xff, PMBUS_VOUT_COMMAND); + if (vout_cmd < 0) { + DEBUG_ERROR("%d-%04x: read page%d, vout command reg: 0x%x failed, ret: %d\n", + client->adapter->nr, client->addr, attr->index, PMBUS_VOUT_COMMAND, vout_cmd); + mutex_unlock(&data->update_lock); + return vout_cmd; + } + + vout = xdpe122_reg2data_vid(data, attr->index, vout_cmd); + vout = vout * 1000; + DEBUG_VERBOSE("%d-%04x: page%d, vout command reg_val: 0x%x, vout: %d uV\n", + client->adapter->nr, client->addr, attr->index, vout_cmd, vout); + + mutex_unlock(&data->update_lock); + return snprintf(buf, PAGE_SIZE, "%d\n", vout); +} + +static ssize_t xdpe122_avs_vout_store(struct device *dev, struct device_attribute *devattr, + const char *buf, size_t count) +{ + struct i2c_client *client = to_i2c_client(dev->parent); + struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct pmbus_data *data = i2c_get_clientdata(client); + int vout, vout_max, vout_min, vout_mv; + int ret, vout_cmd, vout_cmd_set; + + if ((attr->index < 0) || (attr->index >= PMBUS_PAGES)) { + DEBUG_ERROR("%d-%04x: invalid index: %d \n", client->adapter->nr, client->addr, + attr->index); + return -EINVAL; + } + + ret = kstrtoint(buf, 0, &vout); + if (ret) { + DEBUG_ERROR("%d-%04x: invalid value: %s \n", client->adapter->nr, client->addr, buf); + return -EINVAL; + } + + if (vout <= 0) { + DEBUG_ERROR("%d-%04x: invalid value: %d \n", client->adapter->nr, client->addr, vout); + return -EINVAL; + } + + vout_max = data->vout_max[attr->index]; + vout_min = data->vout_min[attr->index]; + if ((vout > vout_max) || (vout < vout_min)) { + DEBUG_ERROR("%d-%04x: vout value: %d, out of range [%d, %d] \n", client->adapter->nr, + client->addr, vout, vout_min, vout_max); + return -EINVAL; + } + + /* calc VOUT_COMMAND set value Unit must be mV*/ + vout_mv = vout / 1000; + vout_cmd_set = xdpe122_data2reg_vid(data, attr->index, vout_mv); + if ((vout_cmd_set < 0) || (vout_cmd_set > 0xffff)) { + DEBUG_ERROR("%d-%04x: invalid value, vout %d uV, vout_cmd_set: %d\n", + client->adapter->nr, client->addr, vout, vout_cmd_set); + return -EINVAL; + } + + mutex_lock(&data->update_lock); + + /* Read the VOUT_COMMAND register to confirm whether it needs to be set */ + vout_cmd = wb_pmbus_read_word_data(client, attr->index, 0xff, PMBUS_VOUT_COMMAND); + if (vout_cmd < 0) { + DEBUG_ERROR("%d-%04x: read page%d vout command reg: 0x%x failed, ret: %d\n", + client->adapter->nr, client->addr, attr->index, PMBUS_VOUT_COMMAND, vout_cmd); + mutex_unlock(&data->update_lock); + return vout_cmd; + } + + /* compare vout_cmd and vout_cmd_set */ + if (vout_cmd == vout_cmd_set) { + DEBUG_VERBOSE("%d-%04x: page%d vout cmd read: 0x%x is equal to vout cmd set: 0x%x, do nothing\n", + client->adapter->nr, client->addr, attr->index, vout_cmd, vout_cmd_set); + mutex_unlock(&data->update_lock); + return count; + } + + /* close write protect */ + ret = wb_pmbus_write_byte_data(client, attr->index, PMBUS_WRITE_PROTECT, XDPE122_WRITE_PROTECT_CLOSE); + if (ret < 0) { + DEBUG_ERROR("%d-%04x: close page%d write protect failed, ret: %d\n", client->adapter->nr, + client->addr, attr->index, ret); + mutex_unlock(&data->update_lock); + return ret; + } + + /* set VOUT_COMMAND */ + ret = wb_pmbus_write_word_data(client, attr->index, PMBUS_VOUT_COMMAND, vout_cmd_set); + if (ret < 0) { + DEBUG_ERROR("%d-%04x: set page%d vout cmd reg: 0x%x, value: 0x%x failed, ret: %d\n", + client->adapter->nr, client->addr, attr->index, PMBUS_VOUT_COMMAND, vout_cmd_set, ret); + goto error; + } + + /* read back VOUT_COMMAND */ + vout_cmd = wb_pmbus_read_word_data(client, attr->index, 0xff, PMBUS_VOUT_COMMAND); + if (vout_cmd < 0) { + ret = vout_cmd; + DEBUG_ERROR("%d-%04x: read page%d vout command reg: 0x%x failed, ret: %d\n", + client->adapter->nr, client->addr, attr->index, PMBUS_VOUT_COMMAND, ret); + goto error; + } + + /* compare vout_cmd and vout_cmd_set */ + if (vout_cmd != vout_cmd_set) { + ret = -EIO; + DEBUG_ERROR("%d-%04x: vout cmd value check error, vout cmd read: 0x%x, vout cmd set: 0x%x\n", + client->adapter->nr, client->addr, vout_cmd, vout_cmd_set); + goto error; + } + + /* open write protect */ + wb_pmbus_write_byte_data(client, attr->index, PMBUS_WRITE_PROTECT, XDPE122_WRITE_PROTECT_OPEN); + mutex_unlock(&data->update_lock); + DEBUG_VERBOSE("%d-%04x: set page%d vout cmd success, vout %d uV, vout_cmd_set: 0x%x\n", + client->adapter->nr, client->addr, attr->index, vout, vout_cmd_set); + return count; +error: + wb_pmbus_write_byte_data(client, attr->index, PMBUS_WRITE_PROTECT, XDPE122_WRITE_PROTECT_OPEN); + mutex_unlock(&data->update_lock); + return ret; +} + +static ssize_t xdpe122_iout_show(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev->parent); + struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct pmbus_data *data = i2c_get_clientdata(client); + int reg_val; + s64 val; + + mutex_lock(&data->update_lock); + reg_val = wb_pmbus_read_word_data(client, attr->index, 0xff, XDPE122_I2C_READ_IOUT); + if (reg_val < 0) { + DEBUG_ERROR("%d-%04x: read page%d, iout reg: 0x%x failed, ret: %d\n", + client->adapter->nr, client->addr, attr->index, XDPE122_I2C_READ_IOUT, reg_val); + mutex_unlock(&data->update_lock); + return reg_val; + } + + val = IOUT_REG_TO_VALUE(reg_val); + + DEBUG_VERBOSE("%d-%04x: page%d, iout_reg_val: 0x%x, iout: %lld mA\n", + client->adapter->nr, client->addr, attr->index, reg_val, val); + + mutex_unlock(&data->update_lock); + return snprintf(buf, PAGE_SIZE, "%lld\n", val); +} + +static ssize_t xdpe122_vout_show(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev->parent); + struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct pmbus_data *data = i2c_get_clientdata(client); + int reg_val; + s64 val; + + mutex_lock(&data->update_lock); + reg_val = wb_pmbus_read_word_data(client, attr->index, 0xff, XDPE122_I2C_READ_VOUT); + if (reg_val < 0) { + DEBUG_ERROR("%d-%04x: read page%d, vout reg: 0x%x failed, ret: %d\n", + client->adapter->nr, client->addr, attr->index, XDPE122_I2C_READ_VOUT, reg_val); + mutex_unlock(&data->update_lock); + return reg_val; + } + + val = VOUT_REG_TO_VALUE(reg_val); + + DEBUG_VERBOSE("%d-%04x: page%d, vout_reg_val: 0x%x, vout: %lld mV\n", + client->adapter->nr, client->addr, attr->index, reg_val, val); + + mutex_unlock(&data->update_lock); + return snprintf(buf, PAGE_SIZE, "%lld\n", val); +} + +static ssize_t xdpe122_temp_show(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev->parent); + struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct pmbus_data *data = i2c_get_clientdata(client); + int reg_val; + s64 val; + + mutex_lock(&data->update_lock); + reg_val = wb_pmbus_read_word_data(client, attr->index, 0xff, XDPE122_I2C_READ_TEMP); + if (reg_val < 0) { + DEBUG_ERROR("%d-%04x: read page%d, temp reg: 0x%x failed, ret: %d\n", + client->adapter->nr, client->addr, attr->index, XDPE122_I2C_READ_TEMP, reg_val); + mutex_unlock(&data->update_lock); + return reg_val; + } + + val = TEMP_REG_TO_VALUE(reg_val); + + DEBUG_VERBOSE("%d-%04x: page%d, temp_reg_val: 0x%x, temp: %lld mC\n", + client->adapter->nr, client->addr, attr->index, reg_val, val); + + mutex_unlock(&data->update_lock); + return snprintf(buf, PAGE_SIZE, "%lld\n", val); +} + +static ssize_t xdpe122_pout_show(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev->parent); + struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); + struct pmbus_data *data = i2c_get_clientdata(client); + int reg_val; + s64 val; + + mutex_lock(&data->update_lock); + reg_val = wb_pmbus_read_word_data(client, attr->index, 0xff, XDPE122_I2C_READ_POUT); + if (reg_val < 0) { + DEBUG_ERROR("%d-%04x: read page%d, pout reg: 0x%x failed, ret: %d\n", + client->adapter->nr, client->addr, attr->index, XDPE122_I2C_READ_POUT, reg_val); + mutex_unlock(&data->update_lock); + return reg_val; + } + + val = POUT_REG_TO_VALUE(reg_val); + + DEBUG_VERBOSE("%d-%04x: page%d, pout_reg_val: 0x%x, pout: %lld uW\n", + client->adapter->nr, client->addr, attr->index, reg_val, val); + + mutex_unlock(&data->update_lock); + return snprintf(buf, PAGE_SIZE, "%lld\n", val); +} + +static ssize_t xdpe122_word_data_show(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + struct i2c_client *client = to_i2c_client(dev->parent); + u8 page = to_sensor_dev_attr_2(devattr)->nr; + u8 reg = to_sensor_dev_attr_2(devattr)->index; + struct pmbus_data *data = i2c_get_clientdata(client); + int word_data; + + mutex_lock(&data->update_lock); + word_data = wb_pmbus_read_word_data(client, page, 0xff, reg); + if (word_data < 0) { + DEBUG_ERROR("%d-%04x: read page%u, vout command reg: 0x%x failed, ret: %d\n", + client->adapter->nr, client->addr, page, reg, word_data); + mutex_unlock(&data->update_lock); + return word_data; + } + + DEBUG_VERBOSE("%d-%04x: read word data success, page%u, reg: 0x%x, value: 0x%04x\n", + client->adapter->nr, client->addr, page, reg, word_data); + mutex_unlock(&data->update_lock); + return snprintf(buf, PAGE_SIZE, "0x%04x\n", word_data); +} + +static ssize_t xdpe122_phase_curr_show(struct device *dev, struct device_attribute *devattr, + char *buf) +{ + int ret; + struct i2c_client *client = to_i2c_client(dev->parent); + u8 loop_index = to_sensor_dev_attr_2(devattr)->nr; + u8 phase_index = to_sensor_dev_attr_2(devattr)->index; + struct pmbus_data *data = i2c_get_clientdata(client); + int word_data; + int a_size; + int i; + u8 phase_curr_change_page, phase_curr_value_page; + s64 value; + int phase_curr_reg_value; + + mutex_lock(&data->update_lock); + + DEBUG_VERBOSE("%d-%04x: loop%u, phase_index: %u\n", + client->adapter->nr, client->addr, loop_index, phase_index); + + a_size = ARRAY_SIZE(g_xdpe122_phase_page_group); + for (i = 0; i < a_size; i++) { + if (g_xdpe122_phase_page_group[i].loop == loop_index) { + phase_curr_change_page = g_xdpe122_phase_page_group[i].phase_curr_change_page; + phase_curr_value_page = g_xdpe122_phase_page_group[i].phase_curr_value_page; + DEBUG_VERBOSE("%d-%04x: loop%u, phase_curr_change_page: 0x%x, phase_curr_value_page: 0x%x\n", + client->adapter->nr, client->addr, loop_index, phase_curr_change_page, phase_curr_value_page); + break; + } + } + if (i == a_size) { + DEBUG_ERROR("%d-%04x: invalid, loop_index%u\n",client->adapter->nr, client->addr, loop_index); + mutex_unlock(&data->update_lock); + return -EINVAL; + } + + a_size = ARRAY_SIZE(g_xdpe122_phase_curr_reg_value_group); + for (i = 0; i < a_size; i++) { + if (g_xdpe122_phase_curr_reg_value_group[i].phase_index == phase_index) { + phase_curr_reg_value = g_xdpe122_phase_curr_reg_value_group[i].phase_curr_reg_value; + DEBUG_VERBOSE("%d-%04x: loop%u, phase_index: %u, phase_curr_reg_value: 0x%x\n", + client->adapter->nr, client->addr, loop_index, phase_index, phase_curr_reg_value); + break; + } + } + if (i == a_size) { + DEBUG_ERROR("%d-%04x: invalid, phase_index%u\n",client->adapter->nr, client->addr, phase_index); + mutex_unlock(&data->update_lock); + return -EINVAL; + } + + ret = wb_pmbus_write_word_data(client, phase_curr_change_page, XDPE122_PHASE_CHANGE_REG, phase_curr_reg_value); + if (ret < 0) { + DEBUG_ERROR("%d-%04x: set loop%u phase curr reg, phase_page: 0x%x, phase_reg: 0x%x, value: 0x%x failed, ret: %d\n", + client->adapter->nr, client->addr, loop_index, phase_curr_change_page, XDPE122_PHASE_CHANGE_REG, phase_curr_reg_value, ret); + mutex_unlock(&data->update_lock); + return ret; + } + + word_data = wb_pmbus_read_word_data(client, phase_curr_value_page, 0xff, XDPE122_PHASE_VALUE_REG); + if (word_data < 0) { + DEBUG_ERROR("%d-%04x: read loop%u phase curr, phase_page: 0x%x, phase_reg: 0x%x, ret: %d\n", + client->adapter->nr, client->addr, loop_index, phase_curr_value_page, XDPE122_PHASE_VALUE_REG, word_data); + mutex_unlock(&data->update_lock); + return word_data; + } + + /* set PHASE_CHANGE_REG 0x600 */ + ret = wb_pmbus_write_word_data(client, phase_curr_change_page, XDPE122_PHASE_CHANGE_REG, XDPE122_PHASE_REG_DEFAULT_VALUE); + if (ret < 0) { + DEBUG_ERROR("%d-%04x: set loop%u phase curr reg, phase_page: 0x%x, phase_reg: 0x%x, value: 0x%x failed, ret: %d\n", + client->adapter->nr, client->addr, loop_index, phase_curr_change_page, XDPE122_PHASE_CHANGE_REG, XDPE122_PHASE_REG_DEFAULT_VALUE, ret); + mutex_unlock(&data->update_lock); + return ret; + } + + /* reg * 62.5mA */ + value = PHASE_CURR_REG_TO_VALUE(word_data); + + DEBUG_VERBOSE("%d-%04x: read phase curr word data success, reg: 0x%04x, value: %lld mA\n", + client->adapter->nr, client->addr, word_data, value); + + mutex_unlock(&data->update_lock); + return snprintf(buf, PAGE_SIZE, "%lld\n", value); +} + +static SENSOR_DEVICE_ATTR_RW(avs0_vout, xdpe122_avs_vout, 0); +static SENSOR_DEVICE_ATTR_RW(avs1_vout, xdpe122_avs_vout, 1); +static SENSOR_DEVICE_ATTR_RW(avs0_vout_max, pmbus_avs_vout_max, 0); +static SENSOR_DEVICE_ATTR_RW(avs0_vout_min, pmbus_avs_vout_min, 0); +static SENSOR_DEVICE_ATTR_RW(avs1_vout_max, pmbus_avs_vout_max, 1); +static SENSOR_DEVICE_ATTR_RW(avs1_vout_min, pmbus_avs_vout_min, 1); +static SENSOR_DEVICE_ATTR_RO(loopa_iout, xdpe122_iout, XDPE122_LOOPA_STATUS_PAGE); +static SENSOR_DEVICE_ATTR_RO(loopa_vout, xdpe122_vout, XDPE122_LOOPA_STATUS_PAGE); +static SENSOR_DEVICE_ATTR_RO(loopa_temp, xdpe122_temp, XDPE122_LOOPA_STATUS_PAGE); +static SENSOR_DEVICE_ATTR_RO(loopa_pout, xdpe122_pout, XDPE122_LOOPA_STATUS_PAGE); +static SENSOR_DEVICE_ATTR_RO(loopb_iout, xdpe122_iout, XDPE122_LOOPB_STATUS_PAGE); +static SENSOR_DEVICE_ATTR_RO(loopb_vout, xdpe122_vout, XDPE122_LOOPB_STATUS_PAGE); +static SENSOR_DEVICE_ATTR_RO(loopb_temp, xdpe122_temp, XDPE122_LOOPB_STATUS_PAGE); +static SENSOR_DEVICE_ATTR_RO(loopb_pout, xdpe122_pout, XDPE122_LOOPB_STATUS_PAGE); +static SENSOR_DEVICE_ATTR_2_RO(version1, xdpe122_word_data, XDPE122_VERSION_PAGE, XDPE122_VERSION1_REG); +static SENSOR_DEVICE_ATTR_2_RO(version2, xdpe122_word_data, XDPE122_VERSION_PAGE, XDPE122_VERSION2_REG); + +static SENSOR_DEVICE_ATTR_2_RO(loopa_phase1_curr, xdpe122_phase_curr, XDPE122_LOOP_A, 1); +static SENSOR_DEVICE_ATTR_2_RO(loopa_phase2_curr, xdpe122_phase_curr, XDPE122_LOOP_A, 2); +static SENSOR_DEVICE_ATTR_2_RO(loopa_phase3_curr, xdpe122_phase_curr, XDPE122_LOOP_A, 3); +static SENSOR_DEVICE_ATTR_2_RO(loopa_phase4_curr, xdpe122_phase_curr, XDPE122_LOOP_A, 4); +static SENSOR_DEVICE_ATTR_2_RO(loopa_phase5_curr, xdpe122_phase_curr, XDPE122_LOOP_A, 5); +static SENSOR_DEVICE_ATTR_2_RO(loopa_phase6_curr, xdpe122_phase_curr, XDPE122_LOOP_A, 6); +static SENSOR_DEVICE_ATTR_2_RO(loopa_phase7_curr, xdpe122_phase_curr, XDPE122_LOOP_A, 7); +static SENSOR_DEVICE_ATTR_2_RO(loopa_phase8_curr, xdpe122_phase_curr, XDPE122_LOOP_A, 8); + +static SENSOR_DEVICE_ATTR_2_RO(loopb_phase1_curr, xdpe122_phase_curr, XDPE122_LOOP_B, 1); +static SENSOR_DEVICE_ATTR_2_RO(loopb_phase2_curr, xdpe122_phase_curr, XDPE122_LOOP_B, 2); +static SENSOR_DEVICE_ATTR_2_RO(loopb_phase3_curr, xdpe122_phase_curr, XDPE122_LOOP_B, 3); +static SENSOR_DEVICE_ATTR_2_RO(loopb_phase4_curr, xdpe122_phase_curr, XDPE122_LOOP_B, 4); +static SENSOR_DEVICE_ATTR_2_RO(loopb_phase5_curr, xdpe122_phase_curr, XDPE122_LOOP_B, 5); +static SENSOR_DEVICE_ATTR_2_RO(loopb_phase6_curr, xdpe122_phase_curr, XDPE122_LOOP_B, 6); +static SENSOR_DEVICE_ATTR_2_RO(loopb_phase7_curr, xdpe122_phase_curr, XDPE122_LOOP_B, 7); +static SENSOR_DEVICE_ATTR_2_RO(loopb_phase8_curr, xdpe122_phase_curr, XDPE122_LOOP_B, 8); + +static struct attribute *avs_ctrl_attrs[] = { + &sensor_dev_attr_avs0_vout.dev_attr.attr, + &sensor_dev_attr_avs1_vout.dev_attr.attr, + &sensor_dev_attr_avs0_vout_max.dev_attr.attr, + &sensor_dev_attr_avs0_vout_min.dev_attr.attr, + &sensor_dev_attr_avs1_vout_max.dev_attr.attr, + &sensor_dev_attr_avs1_vout_min.dev_attr.attr, + NULL, +}; + +static const struct attribute_group avs_ctrl_group = { + .attrs = avs_ctrl_attrs, +}; + +static struct attribute *loop_status_attrs[] = { + &sensor_dev_attr_loopa_iout.dev_attr.attr, + &sensor_dev_attr_loopa_vout.dev_attr.attr, + &sensor_dev_attr_loopa_temp.dev_attr.attr, + &sensor_dev_attr_loopa_pout.dev_attr.attr, + &sensor_dev_attr_loopb_iout.dev_attr.attr, + &sensor_dev_attr_loopb_vout.dev_attr.attr, + &sensor_dev_attr_loopb_temp.dev_attr.attr, + &sensor_dev_attr_loopb_pout.dev_attr.attr, + NULL, +}; + +static const struct attribute_group loop_status_group = { + .attrs = loop_status_attrs, +}; + +static struct attribute *phase_curr_attrs[] = { + &sensor_dev_attr_loopa_phase1_curr.dev_attr.attr, + &sensor_dev_attr_loopa_phase2_curr.dev_attr.attr, + &sensor_dev_attr_loopa_phase3_curr.dev_attr.attr, + &sensor_dev_attr_loopa_phase4_curr.dev_attr.attr, + &sensor_dev_attr_loopa_phase5_curr.dev_attr.attr, + &sensor_dev_attr_loopa_phase6_curr.dev_attr.attr, + &sensor_dev_attr_loopa_phase7_curr.dev_attr.attr, + &sensor_dev_attr_loopa_phase8_curr.dev_attr.attr, + &sensor_dev_attr_loopb_phase1_curr.dev_attr.attr, + &sensor_dev_attr_loopb_phase2_curr.dev_attr.attr, + &sensor_dev_attr_loopb_phase3_curr.dev_attr.attr, + &sensor_dev_attr_loopb_phase4_curr.dev_attr.attr, + &sensor_dev_attr_loopb_phase5_curr.dev_attr.attr, + &sensor_dev_attr_loopb_phase6_curr.dev_attr.attr, + &sensor_dev_attr_loopb_phase7_curr.dev_attr.attr, + &sensor_dev_attr_loopb_phase8_curr.dev_attr.attr, + NULL, +}; + +static const struct attribute_group phase_curr_group = { + .attrs = phase_curr_attrs, +}; + +static struct attribute *others_attrs[] = { + &sensor_dev_attr_version1.dev_attr.attr, + &sensor_dev_attr_version2.dev_attr.attr, + NULL, +}; + +static const struct attribute_group others_group = { + .attrs = others_attrs, +}; + +static const struct attribute_group *xdpe122_attribute_groups[] = { + &avs_ctrl_group, + &loop_status_group, + &phase_curr_group, + &others_group, + NULL, +}; + +/******************** sysfs attr ***********************/ +static SENSOR_DEVICE_ATTR(dfx_info, S_IRUGO, show_pmbus_dfx_info, NULL, -1); +static SENSOR_DEVICE_ATTR(dfx_info0, S_IRUGO, show_pmbus_dfx_info, NULL, 0); +static SENSOR_DEVICE_ATTR(dfx_info1, S_IRUGO, show_pmbus_dfx_info, NULL, 1); +static SENSOR_DEVICE_ATTR_RO(device_name, pmbus_device_name, PMBUS_IC_DEVICE_ID); +static SENSOR_DEVICE_ATTR_RO(device_id, pmbus_block_data, PMBUS_IC_DEVICE_ID); +static SENSOR_DEVICE_ATTR_RO(ic_device_rev, pmbus_block_data, PMBUS_IC_DEVICE_REV); +static SENSOR_DEVICE_ATTR_RO(status0_byte, pmbus_get_status_byte, 0); +static SENSOR_DEVICE_ATTR_RO(status1_byte, pmbus_get_status_byte, 1); +static SENSOR_DEVICE_ATTR_RO(status0_word, pmbus_get_status_word, 0); +static SENSOR_DEVICE_ATTR_RO(status1_word, pmbus_get_status_word, 1); +/* Page: 0x22; Reg: 0x1f */ +static SENSOR_DEVICE_ATTR_2(cfg_reg_0x1f, S_IRUGO | S_IWUSR, show_cfg_reg_value, set_cfg_reg_value, 0x22, 0x1f); + +static struct attribute *xdpe12284_attrs[] = { + &sensor_dev_attr_dfx_info.dev_attr.attr, + &sensor_dev_attr_dfx_info0.dev_attr.attr, + &sensor_dev_attr_dfx_info1.dev_attr.attr, + &sensor_dev_attr_device_id.dev_attr.attr, + &sensor_dev_attr_device_name.dev_attr.attr, + &sensor_dev_attr_ic_device_rev.dev_attr.attr, + &sensor_dev_attr_status0_byte.dev_attr.attr, + &sensor_dev_attr_status1_byte.dev_attr.attr, + &sensor_dev_attr_status0_word.dev_attr.attr, + &sensor_dev_attr_status1_word.dev_attr.attr, + &sensor_dev_attr_cfg_reg_0x1f.dev_attr.attr, + NULL +}; + +static const struct attribute_group xdpe12284_sysfs_group = { + .attrs = xdpe12284_attrs, +}; + +static int xdpe122_read_word_data(struct i2c_client *client, int page, + int phase, int reg) +{ + const struct pmbus_driver_info *info = wb_pmbus_get_driver_info(client); + long val; + s16 exponent; + s32 mantissa; + int ret; + + switch (reg) { + case PMBUS_VOUT_OV_FAULT_LIMIT: + case PMBUS_VOUT_UV_FAULT_LIMIT: + ret = wb_pmbus_read_word_data(client, page, phase, reg); + if (ret < 0) + return ret; + + /* Convert register value to LINEAR11 data. */ + exponent = ((s16)ret) >> 11; + mantissa = ((s16)((ret & GENMASK(10, 0)) << 5)) >> 5; + val = mantissa * 1000L; + if (exponent >= 0) + val <<= exponent; + else + val >>= -exponent; + + /* Convert data to VID register. */ + switch (info->vrm_version[page]) { + case vr13: + if (val >= 500) + return 1 + DIV_ROUND_CLOSEST(val - 500, 10); + return 0; + case vr12: + if (val >= 250) + return 1 + DIV_ROUND_CLOSEST(val - 250, 5); + return 0; + case imvp9: + if (val >= 200) + return 1 + DIV_ROUND_CLOSEST(val - 200, 10); + return 0; + case amd625mv: + if (val >= 200 && val <= 1550) + return DIV_ROUND_CLOSEST((1550 - val) * 100, + 625); + return 0; + default: + return -EINVAL; + } + default: + return -ENODATA; + } + + return 0; +} + +static int xdpe122_identify(struct i2c_client *client, + struct pmbus_driver_info *info) +{ + u8 vout_params; + int i, ret; + + for (i = 0; i < XDPE122_PAGE_NUM; i++) { + /* Read the register with VOUT scaling value.*/ + ret = wb_pmbus_read_byte_data(client, i, PMBUS_VOUT_MODE); + if (ret < 0) + return ret; + + vout_params = ret & GENMASK(4, 0); + + switch (vout_params) { + case XDPE122_PROT_VR12_5_10MV: + info->vrm_version[i] = vr13; + break; + case XDPE122_PROT_VR12_5MV: + info->vrm_version[i] = vr12; + break; + case XDPE122_PROT_IMVP9_10MV: + info->vrm_version[i] = imvp9; + break; + case XDPE122_AMD_625MV: + info->vrm_version[i] = amd625mv; + break; + default: + return -EINVAL; + } + } + + return 0; +} + +static struct pmbus_driver_info xdpe122_info = { + .pages = XDPE122_PAGE_NUM, + .format[PSC_VOLTAGE_IN] = linear, + .format[PSC_VOLTAGE_OUT] = vid, + .format[PSC_TEMPERATURE] = linear, + .format[PSC_CURRENT_IN] = linear, + .format[PSC_CURRENT_OUT] = linear, + .format[PSC_POWER] = linear, + .func[0] = PMBUS_HAVE_VIN | PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT | + PMBUS_HAVE_IIN | PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT | + PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP | + PMBUS_HAVE_POUT | PMBUS_HAVE_PIN | PMBUS_HAVE_STATUS_INPUT, + .func[1] = PMBUS_HAVE_VIN | PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT | + PMBUS_HAVE_IIN | PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT | + PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP | + PMBUS_HAVE_POUT | PMBUS_HAVE_PIN | PMBUS_HAVE_STATUS_INPUT, + .groups = xdpe122_attribute_groups, + .identify = xdpe122_identify, + .read_word_data = xdpe122_read_word_data, +}; + +static int xdpe122_probe(struct i2c_client *client) +{ + struct pmbus_driver_info *info; + struct pmbus_data *data; + int ret; + + info = devm_kmemdup(&client->dev, &xdpe122_info, sizeof(*info), GFP_KERNEL); + if (!info) { + dev_info(&client->dev, "devm_kmemdup failed\n"); + return -ENOMEM; + } + + ret = wb_pmbus_do_probe(client, info); + if (ret != 0) { + dev_info(&client->dev, "wb_pmbus_do_probe failed, ret: %d.\n", ret); + return ret; + } + + data = i2c_get_clientdata(client); + data->pmbus_info_array = xdpe122_dfx_infos; + data->pmbus_info_array_size = ARRAY_SIZE(xdpe122_dfx_infos); + + ret = sysfs_create_group(&client->dev.kobj, &xdpe12284_sysfs_group); + if (ret != 0) { + dev_info(&client->dev, "Failed to create xdpe12284_sysfs_group, ret: %d.\n", ret); + wb_pmbus_do_remove(client); + return ret; + } + return 0; +} + +static void xdpe122_remove(struct i2c_client *client) +{ + sysfs_remove_group(&client->dev.kobj, &xdpe12284_sysfs_group); + (void)wb_pmbus_do_remove(client); + return; +} + +static const struct i2c_device_id xdpe122_id[] = { + {"wb_xdpe12254", 0}, + {"wb_xdpe12284", 0}, + {} +}; + +MODULE_DEVICE_TABLE(i2c, xdpe122_id); + +static const struct of_device_id __maybe_unused xdpe122_of_match[] = { + {.compatible = "infineon,wb_xdpe12254"}, + {.compatible = "infineon,wb_xdpe12284"}, + {} +}; +MODULE_DEVICE_TABLE(of, xdpe122_of_match); + +static struct i2c_driver xdpe122_driver = { + .driver = { + .name = "wb_xdpe12284", + .of_match_table = of_match_ptr(xdpe122_of_match), + }, + .probe = xdpe122_probe, + .remove = xdpe122_remove, + .id_table = xdpe122_id, +}; + +module_i2c_driver(xdpe122_driver); + +MODULE_AUTHOR("Vadim Pasternak "); +MODULE_DESCRIPTION("PMBus driver for Infineon XDPE122 family"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_xdpe132g5c.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_xdpe132g5c.c index 3d2b2ff0bab..c32a2d90965 100644 --- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_xdpe132g5c.c +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_xdpe132g5c.c @@ -29,6 +29,7 @@ #include #include #include +#include #define WB_I2C_RETRY_SLEEP_TIME (10000) /* 10ms */ #define WB_I2C_RETRY_TIME (10) @@ -513,7 +514,11 @@ static const struct attribute_group xdpe132g5c_sysfs_attrs_group = { .attrs = xdpe132g5c_sysfs_attrs, }; +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) static int xdpe132g5c_probe(struct i2c_client *client, const struct i2c_device_id *id) +#else +static int xdpe132g5c_probe(struct i2c_client *client) +#endif { struct xdpe_data *data; int ret; @@ -548,7 +553,11 @@ static int xdpe132g5c_probe(struct i2c_client *client, const struct i2c_device_i return 0; } +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0) +static int xdpe132g5c_remove(struct i2c_client *client) +#else static void xdpe132g5c_remove(struct i2c_client *client) +#endif { struct xdpe_data *data; @@ -556,7 +565,11 @@ static void xdpe132g5c_remove(struct i2c_client *client) data = i2c_get_clientdata(client); hwmon_device_unregister(data->hwmon_dev); sysfs_remove_group(&client->dev.kobj, &xdpe132g5c_sysfs_attrs_group); +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0) + return 0; +#else return; +#endif } static const struct i2c_device_id xdpe132g5c_id[] = { diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_xdpe132g5c_pmbus.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_xdpe132g5c_pmbus.c index 493f477a168..b16b4bca998 100644 --- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_xdpe132g5c_pmbus.c +++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_xdpe132g5c_pmbus.c @@ -28,6 +28,7 @@ #include #include #include +#include #include "pmbus.h" static int g_wb_xdpe132g5_pmbus_debug = 0; @@ -58,6 +59,11 @@ module_param(g_wb_xdpe132g5_pmbus_error, int, S_IRUGO | S_IWUSR); #define XDPE132G5C_PROT_VR13_5MV (0x07) /* VR13.0 mode, 5-mV DAC */ #define RETRY_TIME (15) +enum chips { + XDPE132G5C, + XDPE1A2G5B +}; + typedef struct xdpe_vout_data_s { u8 vout_mode; int vout_precision; @@ -328,39 +334,65 @@ static int xdpe132g5c_identify(struct i2c_client *client, struct pmbus_driver_in return 0; } -static struct pmbus_driver_info xdpe132g5c_info = { - .pages = XDPE132G5C_PAGE_NUM, - .format[PSC_VOLTAGE_IN] = linear, - .format[PSC_VOLTAGE_OUT] = linear, - .format[PSC_TEMPERATURE] = linear, - .format[PSC_CURRENT_IN] = linear, - .format[PSC_CURRENT_OUT] = linear, - .format[PSC_POWER] = linear, - .func[0] = PMBUS_HAVE_VIN | PMBUS_HAVE_IIN | PMBUS_HAVE_PIN +static struct pmbus_driver_info xdpe1x2g5_info[] = { + [XDPE132G5C] = { + .pages = XDPE132G5C_PAGE_NUM, + .format[PSC_VOLTAGE_IN] = linear, + .format[PSC_VOLTAGE_OUT] = linear, + .format[PSC_TEMPERATURE] = linear, + .format[PSC_CURRENT_IN] = linear, + .format[PSC_CURRENT_OUT] = linear, + .format[PSC_POWER] = linear, + .func[0] = PMBUS_HAVE_VIN | PMBUS_HAVE_IIN | PMBUS_HAVE_PIN | PMBUS_HAVE_STATUS_INPUT | PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP | PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT | PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT | PMBUS_HAVE_POUT, - .func[1] = PMBUS_HAVE_VIN | PMBUS_HAVE_IIN | PMBUS_HAVE_PIN + .func[1] = PMBUS_HAVE_VIN | PMBUS_HAVE_IIN | PMBUS_HAVE_PIN | PMBUS_HAVE_STATUS_INPUT | PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT | PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT | PMBUS_HAVE_POUT, - .groups = xdpe132g5_attribute_groups, - .identify = xdpe132g5c_identify, + .groups = xdpe132g5_attribute_groups, + .identify = xdpe132g5c_identify, + }, + [XDPE1A2G5B] = { + .pages = XDPE132G5C_PAGE_NUM, + .format[PSC_VOLTAGE_IN] = linear, + .format[PSC_VOLTAGE_OUT] = linear, + .format[PSC_TEMPERATURE] = linear, + .format[PSC_CURRENT_IN] = linear, + .format[PSC_CURRENT_OUT] = linear, + .format[PSC_POWER] = linear, + .func[0] = PMBUS_HAVE_VIN | PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT | + PMBUS_HAVE_IIN | PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT | + PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP | + PMBUS_HAVE_POUT | PMBUS_HAVE_PIN | PMBUS_HAVE_STATUS_INPUT, + .func[1] = PMBUS_HAVE_VIN | PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT | + PMBUS_HAVE_IIN | PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT | + PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP | + PMBUS_HAVE_POUT | PMBUS_HAVE_PIN | PMBUS_HAVE_STATUS_INPUT, + .groups = xdpe132g5_attribute_groups, + }, }; -static int xdpe132g5c_probe(struct i2c_client *client, - const struct i2c_device_id *id) +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 3, 0) +static int xdpe132g5c_probe(struct i2c_client *client, const struct i2c_device_id *id) +#else +static int xdpe132g5c_probe(struct i2c_client *client) +#endif { +#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 3, 0) + const struct i2c_device_id *id = i2c_client_get_device_id(client); +#endif int status; struct pmbus_driver_info *info; - info = devm_kmemdup(&client->dev, &xdpe132g5c_info, sizeof(*info), GFP_KERNEL); + info = devm_kmemdup(&client->dev, &xdpe1x2g5_info[id->driver_data], sizeof(*info), GFP_KERNEL); if (!info) { return -ENOMEM; } - status = pmbus_do_probe(client, &xdpe132g5c_info); + status = pmbus_do_probe(client, info); if (status != 0) { WB_XDPE132G5_PMBUS_ERROR("pmbus probe error %d\n", status); return status; @@ -375,21 +407,31 @@ static int xdpe132g5c_probe(struct i2c_client *client, return status; } +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0) +static int xdpe132g5c_remove(struct i2c_client *client) +#else static void xdpe132g5c_remove(struct i2c_client *client) +#endif { sysfs_remove_group(&client->dev.kobj, &xdpe132g5c_sysfs_attrs_group); +#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0) + return 0; +#else return; +#endif } static const struct i2c_device_id xdpe132g5c_id[] = { - {"wb_xdpe132g5c_pmbus", 0}, + {"wb_xdpe132g5c_pmbus", XDPE132G5C}, + {"wb_xdpe1a2g5b_pmbus", XDPE1A2G5B}, {} }; MODULE_DEVICE_TABLE(i2c, xdpe132g5c_id); static const struct of_device_id __maybe_unused xdpe132g5c_of_match[] = { - {.compatible = "infineon,wb_xdpe132g5c_pmbus"}, + {.compatible = "infineon,wb_xdpe132g5c_pmbus", .data = (void *)XDPE132G5C}, + {.compatible = "infineon,wb_xdpe1a2g5b_pmbus", .data = (void *)XDPE1A2G5B}, {} }; MODULE_DEVICE_TABLE(of, xdpe132g5c_of_match); diff --git a/platform/broadcom/sonic-platform-modules-micas/common/public/include/wb_bsp_i2c_debug.h b/platform/broadcom/sonic-platform-modules-micas/common/public/include/wb_bsp_i2c_debug.h new file mode 100644 index 00000000000..c0cd88891a7 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/public/include/wb_bsp_i2c_debug.h @@ -0,0 +1,280 @@ +/* wb_bsp_i2c_debug.h */ +#ifndef __WB_BSP_I2C_DEBUG_H__ +#define __WB_BSP_I2C_DEBUG_H__ + +#include +#include +#include +#include +#include +#include +#include "wb_bsp_kernel_debug.h" + +/* 0x12caddb9 looks a lot like "i2c ad dbg". */ +#define MAGIC_NUM (0x12caddb9) +#define DEBUG_ALL_VALID_BITS \ + (DEBUG_ERR_LEVEL | DEBUG_WARN_LEVEL | DEBUG_INFO_LEVEL | DEBUG_VER_LEVEL) +/* + * The struct i2c_adapter_debug must be the first member + * of the private structure of the I2C controller. + */ +struct i2c_adapter_debug { + int magic_num; + int debug_level; +}; + +/** + * create_adapter_dbg - Create debug info entry for the specified adapter + * @adapter: specified i2c_adapter + * + * Returns 0 on success, negative error code on failure + */ +static inline int create_adapter_dbg(struct i2c_adapter *adapter) +{ + struct i2c_adapter_debug *dbg; + + if (adapter == NULL) { + return -EINVAL; + } + + dbg = (struct i2c_adapter_debug *)(i2c_get_adapdata(adapter)); + if (dbg == NULL) { + return -EINVAL; + } + + dbg->magic_num = MAGIC_NUM; + dbg->debug_level = 0; + + return 0; +} + +/** + * destroy_adapter_dbg - Remove debug info entry for the specified adapter + * @adapter: specified i2c_adapter + */ +static inline void destroy_adapter_dbg(struct i2c_adapter *adapter) +{ + struct i2c_adapter_debug *dbg; + + if (adapter == NULL) { + return; + } + + dbg = (struct i2c_adapter_debug *)(i2c_get_adapdata(adapter)); + if (dbg == NULL) { + return; + } + dbg->magic_num = 0; + dbg->debug_level = 0; + + return; +} + +/** + * get_adapter_dbg - Get debug info pointer for the specified adapter + * @adapter: specified i2c_adapter + * + * Returns pointer to debug info, or NULL if not found + */ +static inline struct i2c_adapter_debug *get_adapter_dbg(struct i2c_adapter *adapter) +{ + struct i2c_adapter_debug *dbg; + + if (adapter == NULL) { + return NULL; + } + + dbg = (struct i2c_adapter_debug *)(i2c_get_adapdata(adapter)); + if ((dbg != NULL) && (dbg->magic_num != MAGIC_NUM)) { + return NULL; + } + + return dbg; +} + +/* sysfs show function, displays debug enable status */ +static ssize_t debug_show(struct kobject *kobj, struct kobj_attribute *attr, char *buf) +{ + struct i2c_adapter *adap; + struct i2c_adapter_debug *dbg; + int offset; + + adap = container_of(kobj, struct i2c_adapter, dev.kobj); + dbg = get_adapter_dbg(adap); + + if (dbg == NULL || dbg->magic_num != MAGIC_NUM || dbg->debug_level == 0) { + return scnprintf(buf, PAGE_SIZE, "Current debug status: %s\n", "disabled"); + } + + offset = scnprintf(buf, PAGE_SIZE, "Current debug status: %s\n", "enabled"); + if (dbg->debug_level & DEBUG_ERR_LEVEL) { + offset += scnprintf(buf + offset, PAGE_SIZE - offset, "\terror\n"); + } + if (dbg->debug_level & DEBUG_WARN_LEVEL) { + offset += scnprintf(buf + offset, PAGE_SIZE - offset, "\twarn\n"); + } + if (dbg->debug_level & DEBUG_INFO_LEVEL) { + offset += scnprintf(buf + offset, PAGE_SIZE - offset, "\tinfo\n"); + } + if (dbg->debug_level & DEBUG_VER_LEVEL) { + offset += scnprintf(buf + offset, PAGE_SIZE - offset, "\tverbose\n"); + } + + return offset; +} + +/* sysfs store function, sets debug enable status */ +static ssize_t debug_store(struct kobject *kobj, struct kobj_attribute *attr, + const char *buf, size_t count) +{ + struct i2c_adapter *adap; + struct i2c_adapter_debug *dbg; + unsigned long input_val; + int ret; + + adap = container_of(kobj, struct i2c_adapter, dev.kobj); + dbg = get_adapter_dbg(adap); + if (dbg == NULL) { + return -EINVAL; + } + + input_val = 0; + ret = kstrtoul(buf, 0, &input_val); + if (ret) { + return -EINVAL; + } + + if ((input_val & ~DEBUG_ALL_VALID_BITS) != 0) { + return -EINVAL; + } + + dbg->debug_level = input_val; + + pr_info("i2c adapter %d debug level set to 0x%lx\n", adap->nr, input_val); + + return count; +} + +static struct kobj_attribute debug_attribute = + __ATTR(debug, 0664, debug_show, debug_store); + +/** + * i2c_adapter_debug_init - Initialize debug info and create sysfs file for adapter + * @adap: specified i2c_adapter + * + * Returns 0 on success, negative error code on failure + */ +static inline int i2c_adapter_debug_init(struct i2c_adapter *adap) +{ + int ret; + + ret = create_adapter_dbg(adap); + if (ret) { + return ret; + } + + ret = sysfs_create_file(&adap->dev.kobj, &debug_attribute.attr); + if (ret) { + /* On failure, rollback created debug info */ + destroy_adapter_dbg(adap); + } + return ret; +} + +/** + * I2C_ADAPTER_DEBUG_INIT - Debug initialization macro (compile-time check + runtime init) + * @dev_type: Structure type (e.g., struct dw_i2c_dev) + * @dev_ptr: Pointer to the structure instance (e.g., dev) + * @dbg_member: Name of the debug member in the structure (e.g., i2c_ada_dbg) + * + * Description: + * 1. Compile-time check: Ensures the debug member is the first member of the structure + * (offset must be 0; fails compilation if not). + * 2. Runtime initialization: Calls the debug initialization function to bind I2C adapter + * with debug functionality (sysfs nodes, debug level management, etc.). + */ +#define I2C_ADAPTER_DEBUG_INIT(adapter, dev_type, dbg_member) do { \ + /* Compile-time check: Debug struct must be the first member (offset 0) */ \ + BUILD_BUG_ON(offsetof(dev_type, dbg_member) != 0); \ + /* Runtime initialization: Initialize debug features for the I2C adapter */ \ + (void)i2c_adapter_debug_init(adapter); \ +} while (0) + +/** + * i2c_adapter_debug_exit - Cleanup debug info and remove sysfs file for adapter + * @adap: specified i2c_adapter + */ +static inline void i2c_adapter_debug_exit(struct i2c_adapter *adap) +{ + struct i2c_adapter_debug *dbg; + + dbg = get_adapter_dbg(adap); + if (dbg == NULL) { + return; + } + + sysfs_remove_file(&adap->dev.kobj, &debug_attribute.attr); + destroy_adapter_dbg(adap); +} + +static inline bool i2c_adapter_debug_enabled(struct i2c_adapter *adap, int level) +{ + struct i2c_adapter_debug *dbg; + + if (adap == NULL) { + return false; + } + + dbg = get_adapter_dbg(adap); + if (dbg == NULL) { + return false; + } + + return (dbg->debug_level & level) != 0; +} + +static inline int i2c_adapter_get_nr(struct i2c_adapter *adap) +{ + return (adap == NULL) ? -1 : adap->nr; +} + +#define i2c_pr_fmt(fmt, nr) "[func:%s line:%d][i2c-%d]" fmt, __func__, __LINE__, (nr) + +/* Debug print macros, depend on external variable debug and DEBUG_*_LEVEL macros */ +#define DEBUG_ERROR_I2C_ADAPTER(adapter, fmt, ...) \ + do { \ + if ((debug & DEBUG_ERR_LEVEL) || i2c_adapter_debug_enabled(adapter, DEBUG_ERR_LEVEL)) { \ + printk(KERN_ERR "[ERR]"i2c_pr_fmt(fmt, i2c_adapter_get_nr(adapter)), ##__VA_ARGS__); \ + } else { \ + pr_debug(fmt, ##__VA_ARGS__); \ + } \ + } while(0) + +#define DEBUG_WARN_I2C_ADAPTER(adapter, fmt, ...) \ + do { \ + if ((debug & DEBUG_WARN_LEVEL) || i2c_adapter_debug_enabled(adapter, DEBUG_WARN_LEVEL)) { \ + printk(KERN_WARNING "[WARN]"i2c_pr_fmt(fmt, i2c_adapter_get_nr(adapter)), ##__VA_ARGS__); \ + } else { \ + pr_debug(fmt, ##__VA_ARGS__); \ + } \ + } while(0) + +#define DEBUG_INFO_I2C_ADAPTER(adapter, fmt, ...) \ + do { \ + if ((debug & DEBUG_INFO_LEVEL) || i2c_adapter_debug_enabled(adapter, DEBUG_INFO_LEVEL)) { \ + printk(KERN_INFO "[INFO]"i2c_pr_fmt(fmt, i2c_adapter_get_nr(adapter)), ##__VA_ARGS__); \ + } else { \ + pr_debug(fmt, ##__VA_ARGS__); \ + } \ + } while(0) + +#define DEBUG_VERBOSE_I2C_ADAPTER(adapter, fmt, ...) \ + do { \ + if ((debug & DEBUG_VER_LEVEL) || i2c_adapter_debug_enabled(adapter, DEBUG_VER_LEVEL)) { \ + printk(KERN_DEBUG "[VER]"i2c_pr_fmt(fmt, i2c_adapter_get_nr(adapter)), ##__VA_ARGS__); \ + } else { \ + pr_debug(fmt, ##__VA_ARGS__); \ + } \ + } while(0) + +#endif /* __WB_BSP_I2C_DEBUG_H__ */ diff --git a/platform/broadcom/sonic-platform-modules-micas/common/public/include/wb_bsp_kernel_debug.h b/platform/broadcom/sonic-platform-modules-micas/common/public/include/wb_bsp_kernel_debug.h new file mode 100644 index 00000000000..49979938066 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/public/include/wb_bsp_kernel_debug.h @@ -0,0 +1,65 @@ +/* kernel_debug.h */ +#include +#ifndef __WB_BSP_KERNEL_DEBUG_H__ +#define __WB_BSP_KERNEL_DEBUG_H__ + +/********************************** start ***********************************/ +/** + * Module input parameters control debug printing. + * Dynamic debug printing is used by default, controlled by debugfs + */ +#define DEBUG_ERR_LEVEL (0x1) +#define DEBUG_WARN_LEVEL (0x2) +#define DEBUG_INFO_LEVEL (0x4) +#define DEBUG_VER_LEVEL (0x8) +/* This macro definition is specifically designed for printing logic device driver data and is not intended for any other debugging purposes. */ +#define DEBUG_DUMP_DATA_LEVEL (0x8000) + +#define mem_clear(data, size) memset((data), 0, (size)) + +#define DEBUG_ERROR(fmt, args...) \ + do { \ + if (debug & DEBUG_ERR_LEVEL) { \ + printk(KERN_ERR "[ERR][func:%s line:%d] "fmt, __func__, __LINE__, ## args); \ + } else { \ + pr_debug(fmt, ## args); \ + } \ + } while(0) + +#define DEBUG_WARN(fmt, args...) \ + do { \ + if (debug & DEBUG_WARN_LEVEL) { \ + printk(KERN_WARNING "[WARN][func:%s line:%d] "fmt, __func__, __LINE__, ## args); \ + } else { \ + pr_debug(fmt, ## args); \ + } \ + } while(0) + +#define DEBUG_INFO(fmt, args...) \ + do { \ + if (debug & DEBUG_INFO_LEVEL) { \ + printk(KERN_INFO "[INFO][func:%s line:%d] "fmt, __func__, __LINE__, ## args); \ + } else { \ + pr_debug(fmt, ## args); \ + } \ + } while(0) + +#define DEBUG_VERBOSE(fmt, args...) \ + do { \ + if (debug & DEBUG_VER_LEVEL) { \ + printk(KERN_DEBUG "[VER][func:%s line:%d] "fmt, __func__, __LINE__, ## args); \ + } else { \ + pr_debug(fmt, ## args); \ + } \ + } while(0) + +#define PRINT_ERROR(fmt, args...) \ + do { \ + printk(KERN_ERR "[ERR][func:%s line:%d] "fmt, __func__, __LINE__, ## args); \ + } while(0) + +#define COMMON_ERROR_PRINT(buf, buf_size, fmt, ...) \ + snprintf((buf), (buf_size), "ERROR: "fmt"", ##__VA_ARGS__) +/********************************** end ***********************************/ + +#endif /* #ifndef __WB_BSP_KERNEL_DEBUG_H__ */ diff --git a/platform/broadcom/sonic-platform-modules-micas/common/public/include/wb_kernel_io.h b/platform/broadcom/sonic-platform-modules-micas/common/public/include/wb_kernel_io.h new file mode 100644 index 00000000000..3c12565c71d --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/public/include/wb_kernel_io.h @@ -0,0 +1,80 @@ +#ifndef __WB_KERNEL_IO_H__ +#define __WB_KERNEL_IO_H__ + +#include +#include +#include "wb_logic_dev_common.h" + +/* + * wb_io_fn_t - Function pointer type for read/write operations + * @file: pointer to struct file representing the file + * @buf: buffer to read from or write to + * @count: number of bytes to read/write + * @pos: pointer to file position offset + * + * Returns number of bytes read/written on success, negative error code on failure. + */ +typedef ssize_t (*wb_io_fn_t)(struct file *, char *, size_t, loff_t *); + +/* + * wb_iov_iter_read - Read data from file into iov_iter using buffer + * @iocb: pointer to kiocb structure containing file and position info + * @to: iov_iter representing destination of data (user or kernel space) + * @rw_func: callback function to perform actual read operation + * + * Returns total bytes read on success, or negative error code on failure. + */ +static inline ssize_t wb_iov_iter_read(struct kiocb *iocb, struct iov_iter *to, wb_io_fn_t rw_func) +{ + char buffer[MAX_RW_LEN]; + ssize_t ret; + size_t read_size; + + read_size = iov_iter_count(to); + if (read_size > MAX_RW_LEN) { + read_size = MAX_RW_LEN; + } + + /* Call user-provided read function */ + ret = rw_func(iocb->ki_filp, buffer, read_size, &iocb->ki_pos); + if (ret <= 0) { + return ret; + } + + return copy_to_iter(buffer, ret, to); +} + +/* + * wb_iov_iter_write - Write data from iov_iter to file using intermediate buffer + * @iocb: pointer to kiocb structure containing file and position info + * @from: iov_iter representing source of data (user or kernel space) + * @rw_func: callback function to perform actual write operation + * + * Returns total bytes written on success, or negative error code on failure. + */ +static inline ssize_t wb_iov_iter_write(struct kiocb *iocb, struct iov_iter *from, + wb_io_fn_t rw_func) +{ + char buffer[MAX_RW_LEN]; + ssize_t ret; + size_t write_size; + + write_size = iov_iter_count(from); + if (write_size > MAX_RW_LEN) { + write_size = MAX_RW_LEN; + } + + /* + * Copy data from iov_iter to internal buffer. + * copy_from_iter() returns bytes NOT copied. + */ + ret = copy_from_iter(buffer, write_size, from); + if (ret < 0) { + return -EFAULT; + } + + /* Call user-provided write function */ + return rw_func(iocb->ki_filp, buffer, write_size, &iocb->ki_pos); +} + +#endif /* __WB_KERNEL_IO_H__ */ diff --git a/platform/broadcom/sonic-platform-modules-micas/common/public/include/wb_logic_dev_common.h b/platform/broadcom/sonic-platform-modules-micas/common/public/include/wb_logic_dev_common.h new file mode 100644 index 00000000000..1d38ae72dd6 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/public/include/wb_logic_dev_common.h @@ -0,0 +1,301 @@ +#ifndef __WB_LOGIC_DEV_COMMON_H__ +#define __WB_LOGIC_DEV_COMMON_H__ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#ifndef PRIu64 +#define PRIu64 "llu" +#endif + +#ifndef PRIX64 +#define PRIX64 "llx" +#endif + +#define SYMBOL_I2C_DEV_MODE (1) +#define FILE_MODE (2) +#define SYMBOL_PCIE_DEV_MODE (3) +#define SYMBOL_IO_DEV_MODE (4) +#define SYMBOL_SPI_DEV_MODE (5) +#define SYMBOL_INDIRECT_DEV_MODE (6) +#define SYMBOL_PLATFORM_I2C_DEV_MODE (7) +#define SYMBOL_SPI_DEV_ATOMIC_MODE (8) /* spi atomic mode, use for irq mode access spi dev */ + +#define WIDTH_1Byte (1) +#define WIDTH_2Byte (2) +#define WIDTH_4Byte (4) +#define MAX_DATA_WIDTH (8) +#define MAX_DEV_NUM (64) +#define MAX_RW_LEN (256) +#define MAX_NAME_SIZE (32) +#define LOGIC_DEV_DUMP_NAME_LEN (64) +#define LOGIC_DEV_DUMP_MAX_NUM (8) +#define LOGIC_DEV_DUMP_REG_END_DEFAULT (0xff) + +#define CACHE_FILE_PATH "/tmp/.%s_cache" +#define MASK_FILE_PATH "/tmp/.%s_mask" + +#define LOGIC_DEV_RETRY_TIME (3) +#define LOGIC_DEV_RETRY_TIMEOUT (3000) +#define LOGIC_DEV_RETRY_DELAY_MS (10) +#define LOGIC_DEV_STATUS_OK (0) +#define LOGIC_DEV_STATUS_NOT_OK (1) + +static inline int wb_logic_get_retry_time(int retry_time) +{ + return retry_time > 0 ? retry_time : 1; +} + +#define TEST_REG_MAX_NUM (8) +#define INIT_TEST_DATA (0x5a) +#define MAX_REG_DATA_LEN (MAX_DATA_WIDTH * TEST_REG_MAX_NUM) + +/* Device read/write enable flag */ +#define WB_DEV_AVAILABLE_FLAG (1) +#define WB_DEV_UNAVAILABLE_FLAG (0) + +typedef enum dev_status_check_type_s { + NOT_SUPPORT_CHECK_STATUS = 0, /* Not support status check */ + READ_BACK_CHECK = 1, /* Readback verification */ + READ_BACK_NAGATIVE_CHECK = 2, /* Readback anti-verification */ + READ_ONLY_CHECK = 3, /* Read only */ + SUPPORT_CHECK_MAX, +} dev_status_check_type_t; + +typedef enum { + WB_SPIN_LOCK_MODE = 1, + WB_MUTEX_LOCK_MODE = 2, +} cs_lock_mode_t; + +#define BSP_KEY_DEVICE_LOG_SIZE (256) +#define BSP_KEY_DEVICE_NUM_MAX (64) +#define BSP_KEY_DEV_INDEX_TO_ADDR(index) ((index) & 0xffff) +#define BSP_KEY_DEV_INDEX_TO_SIZE(index) (((index) >> 16) & 0xffff) +#define BSP_LOG_DIR "/var/log/bsp_tech/" +#define BSP_LOG_TS_BUFF_SIZE (32) +#define WB_BSP_LOG_MAX (1 * 1024 * 1024) +#define BSP_LOG_DEV_NAME_MAX_LEN (64) + +/* CRAM */ +#define CRAM_REG_OFFSET (14) +#define CRAM_REG_BYTE_INDEX (1) +#define CRAM_REG_BYTE_OFFSET (6) +#define CRAM_REG_MASK (0x3) +#define CRAM_STATUS(value) ((value >> CRAM_REG_OFFSET) & CRAM_REG_MASK) +#define CRAM_STATUS_FROM_BYTE(value) ((value[CRAM_REG_BYTE_INDEX] >> CRAM_REG_BYTE_OFFSET) & CRAM_REG_MASK) +#define CRAM_CE_STATUS (0x1) +#define CRAM_UE_STATUS (0x2) +#define CRAM_STATUS_OK (0) +#define CRAM_ALL_BITS_SET (~0) +#define CRAM_CONFIG_MASK_MIN_COUNT (1) +#define CRAM_ERR_ADDR_DATA_OFFSET (2) +#define CRAM_ERR_ADDR_NUM_DEF (1) +#define CRAM_ERR_ADDR_REG_MASK_DEF (0xfc) +#define CRAM_STATUS_SINGLE_BIT_ERROR (0x1) +#define CRAM_STATUS_MULTI_BIT_ERROR (0x2) +#define CRAM_STATUS_SINGLE_MULTI_BIT_ERROR (0x3) +#define CRAM_DETAIL_SINGLE_BIT_ERROR "SingleBit_Error" +#define CRAM_DETAIL_MULTI_BIT_ERROR "MultiBit_Error" +#define CRAM_DETAIL_LOGICDEV_ERROR "LogicDevRead_Error" + + +typedef struct { + uint32_t log_num; + uint32_t log_index[BSP_KEY_DEVICE_NUM_MAX]; + struct mutex file_lock; +} wb_bsp_key_device_log_node_t; + +#define DEBUG_BUF_MAX_LEN (256) + +extern struct kobject *logic_dev_kobj; +extern unsigned long (*kallsyms_lookup_name_fun)(const char *name); + +typedef int (*device_func_write)(const char *, uint32_t, uint8_t *, size_t); +typedef int (*device_func_read)(const char *, uint32_t, uint8_t *, size_t ); +typedef int (*get_pci_dev_func)(const char *, struct pci_dev **); +typedef int (*wb_cs_func)(uint32_t cs_index); + +typedef struct logic_dev_dump_cfg_s { + char logic_dev_name[LOGIC_DEV_DUMP_NAME_LEN]; + int logic_dev_func_mode; + int logic_dev_reg_start; + int logic_dev_reg_end; +} logic_dev_dump_cfg_t; + +typedef struct logic_dev_dump_s { + const char *logic_dev_name; + uint32_t logic_dev_func_mode; + uint32_t logic_dev_reg_start; + uint32_t logic_dev_reg_end; + unsigned long logic_dev_write_intf_addr; + unsigned long logic_dev_read_intf_addr; +} logic_dev_dump_t; + +typedef struct logic_dev_dump_cfg_info_s { + uint32_t dump_logic_dev_num; + logic_dev_dump_cfg_t dump_logic_dev_cfg[LOGIC_DEV_DUMP_MAX_NUM]; +} logic_dev_dump_cfg_info_t; + +typedef struct logic_dev_dump_info_s { + uint32_t dump_logic_dev_num; + logic_dev_dump_t dump_logic_dev_cfg[LOGIC_DEV_DUMP_MAX_NUM]; +} logic_dev_dump_info_t; + +int find_intf_addr(unsigned long *write_intf_addr, unsigned long *read_intf_addr, uint32_t mode); +int cache_value_read(const char *mask_file_path, const char *cache_file_path, uint32_t offset, uint8_t *value, uint32_t width); +int cache_value_write(const char *mask_file_path, const char *cache_file_path, uint32_t offset, uint8_t *value, uint32_t width); +int dev_rw_check(uint8_t *rd_buf, uint8_t *wr_buf, uint32_t len, uint32_t type, uint32_t check_mode); +int wb_bsp_key_device_log(char *dev_name, char *log_name, int log_size, + wb_bsp_key_device_log_node_t *log_node, uint32_t offset, uint8_t *buf, size_t size); +void logic_dev_dump_data(const char *dev_name, uint32_t offset, u8 *val, size_t count, bool read_flag); +int find_cs_intf_addr(unsigned long *cs_enable_intf_addr, unsigned long *cs_disable_intf_addr); +int logic_dev_dump_of_node_init(logic_dev_dump_info_t *dump_info, struct device *dev); +int logic_dev_dump_cfg_info_init(logic_dev_dump_info_t *dump_info, struct device *dev, + const logic_dev_dump_cfg_info_t *dump_logic_dev_cfg_info); +void logic_dev_dump_regs(logic_dev_dump_info_t *dump_info, struct device *dev, const char *log_tag); + +typedef enum logic_dev_status_check_type_e { + STATUS_CHECK_SEU_E = 0, + STATUS_CHECK_SELFTEST_E = 1, + STATUS_CHECK_SCRATCH_E = 2, + STATUS_CHECK_CRAM_E = 3, + STATUS_CHECK_TYPE_MAX, +} logic_dev_status_check_type_t; + +typedef enum dev_status_check_mode_e { + WB_LOGIC_NORMAL = 0, + WB_LOGIC_NAGATIVE_MODE = 1, /* anti-verification */ + WB_LOGIC_SUPPORT_CHECK_MODE_MAX, +} dev_status_check_mode_t; + +typedef enum logic_dev_cram_check_type_e { + CRAM_CHECK_CE_E = 0, + CRAM_CHECK_UE_E = 1, + CRAM_TYPE_MAX, +} logic_dev_cram_check_type_t; + +/* status check function */ +#define STATUS_CHECK_BITS(type) (1UL << type) +#define STATUS_CHECK_SEU STATUS_CHECK_BITS(STATUS_CHECK_SEU_E) +#define STATUS_CHECK_SELFTEST STATUS_CHECK_BITS(STATUS_CHECK_SELFTEST_E) +#define STATUS_CHECK_SCRATCH STATUS_CHECK_BITS(STATUS_CHECK_SCRATCH_E) +#define STATUS_CHECK_CRAM STATUS_CHECK_BITS(STATUS_CHECK_CRAM_E) + +typedef struct reg_check { + u32 reg; + uint8_t value[MAX_DATA_WIDTH]; + uint8_t mask[MAX_DATA_WIDTH]; +} reg_check_t; + +struct seu_reg_check { + u32 reg; + uint8_t value[MAX_DATA_WIDTH]; + uint8_t mask[MAX_DATA_WIDTH]; +}; + +struct selftest_check { + u32 reg; + uint8_t write_value[MAX_DATA_WIDTH]; + u32 check_mode; /* write mode */ +}; + +struct scratch_check { + u32 reg; + uint8_t value[MAX_DATA_WIDTH]; + bool initialized; + u32 check_mode; /* write mode */ +}; + +struct cram_check { + u32 reg; + u32 cram_err_addr_reg_num; + u32 cram_err_addr_reg[TEST_REG_MAX_NUM]; + u32 cram_err_addr_reg_mask[TEST_REG_MAX_NUM]; +}; + +struct device_bus_ops { + device_func_read read; + device_func_write write; +}; + +typedef struct device_status_check { + u32 status_check_type_bmp; + char dev_name[MAX_NAME_SIZE]; + + u32 seu_check_num; + struct seu_reg_check seu_checks[TEST_REG_MAX_NUM]; + + u32 selftest_check_num; + struct selftest_check selftest_checks[TEST_REG_MAX_NUM]; + + u32 scratch_num; + struct scratch_check scratch_checks[TEST_REG_MAX_NUM]; + + struct cram_check cram_checks; + + struct device_bus_ops dev_bus_ops; + unsigned long last_jiffies; /* The number of jiffies when the device status was last obtained */ + u32 dev_status; /* Total status of check type */ + unsigned long type_last_jiffies[STATUS_CHECK_TYPE_MAX]; /* last jiffies by check type */ + u32 type_dev_status[STATUS_CHECK_TYPE_MAX]; /* status by check type */ +} device_status_check_t; + +int wb_logic_check_status_hw_init(struct device_status_check *status_check, + uint32_t data_byte_len); + +int wb_logic_dev_get_status(struct device_status_check *status_check, + uint32_t data_byte_len, + char *buf, + uint32_t buf_len); + +uint32_t wb_logic_status_type_get_number(uint32_t type); +int wb_logic_dev_get_status_with_type(struct device_status_check *status_check, + uint32_t data_byte_len, + char *buf, + uint32_t buf_len, + uint32_t type); + +int of_dev_status_check_config_init(struct device *dev, + struct device_status_check *status_check, + uint32_t data_byte_len, + device_func_write read, + device_func_write write, + const char *dev_name); + +int platform_dev_status_check_config_init(struct device *dev, + struct device_status_check *status_check, + uint32_t data_byte_len, + struct device_status_check *status_check_data, + device_func_write read, + device_func_write write, + const char *dev_name); + +int wb_logic_get_cache_status_with_type(struct device_status_check *status_check, + uint32_t check_type, + uint32_t status_cache_ms, + char *buf, + uint32_t buf_len); + +int wb_logic_clear_status(struct device_status_check *status_check, + uint32_t data_byte_len, + uint32_t type_bmp); + +/* end status check function */ +void sleep_by_lock_mode(int sleep_time, uint32_t lock_mode); + +int wb_logic_lock_mode_check(uint32_t lock_mode, uint32_t func_mode); + +#endif diff --git a/platform/broadcom/sonic-platform-modules-micas/common/public/include/wb_platform_common.h b/platform/broadcom/sonic-platform-modules-micas/common/public/include/wb_platform_common.h new file mode 100644 index 00000000000..ed7647283b2 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/public/include/wb_platform_common.h @@ -0,0 +1,14 @@ +#ifndef __WB_PLATFORM_COMMON_H__ +#define __WB_PLATFORM_COMMON_H__ + +#define PRODUCT_STRATEGY_DEFAULT 0 +#define PRODUCT_STRATEGY_1 1 +#define PRODUCT_STRATEGY_2 2 + +#define PRODUCT_STRATEGY PRODUCT_STRATEGY_DEFAULT +#define CONFIG_FILE_PATH "/etc/" +#define SWITCH_STATUS_UNKNOWN "UNKNOWN" +#define S3IP_SYSFS_NAME "s3ip" +#define WB_HOST_MISC_DIR "/etc/sonic/" + +#endif /* WB_PLATFORM_COMMON_H */ \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-micas/common/public/include/wb_spi_master.h b/platform/broadcom/sonic-platform-modules-micas/common/public/include/wb_spi_master.h new file mode 100644 index 00000000000..ac749e7dd78 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/public/include/wb_spi_master.h @@ -0,0 +1,16 @@ +#ifndef __WB_SPI_MASTER_H__ +#define __WB_SPI_MASTER_H__ + +#include +#include + +/** + * wb_spi_master_busnum_to_master - look up master associated with bus_num + * @bus_num: the master's bus number + * Context: can sleep + * + * Return: the SPI master structure on success, else NULL. + */ +struct spi_controller *wb_spi_master_busnum_to_master(u16 bus_num); + +#endif /* #ifndef __WB_SPI_MASTER_H__ */ \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/config-hwsku-cpo.sh b/platform/broadcom/sonic-platform-modules-micas/common/script/config-hwsku-cpo.sh new file mode 100644 index 00000000000..8a181ffc282 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/script/config-hwsku-cpo.sh @@ -0,0 +1,203 @@ +#!/bin/bash +# +# This script is used to print, list and set the hwskus under the same platform. +# Regular user can print and list the current hwsku and all available hwskus. +# To change the hwsku, you will need root access. The main idea of the script +# was that each hwsku reserves it's own portmaping, minigraph, json etc. When we change the hwsku, +# the script will pickup the right configuration files and reboot the box to take effect +# (script will ask for reboot confirmation). This will override the existing configuration. +# The following command line help should explain the syntax +# +display_help() { + echo "Usage: $0 [-h] [-p] [-l] [-s HWSKU]" >&2 + echo + echo " -h, --help Print this usage page" + echo " -p, --print Print the current HWSKU" + echo " -l, --list List the available HWSKUs" + echo " -s, --set Set the HWSKU" + exit 0 +} + +HWSKU_ROOT='/usr/share/sonic/device/' +onie_platform=`grep onie_platform /host/machine.conf` +platform=${onie_platform#*=} +printf -v target_hwsku "%s%s%s%s" $HWSKU_ROOT $platform '/' "default_sku" +default_sku=`cat ${target_hwsku}` +sku_array=($default_sku) +current_hwsku=${sku_array[0]} +RUNNING_PATH='/etc/sonic/' + +config_hwsku_exec_1803() { + config_hwsku=$1 + while true; do + read -p "This will reset to the initial configuration with the port mode specified and restart all services. [Y/N] " yn + case $yn in + [Yy]* ) break;; + [Nn]* ) echo "No changes were made"; exit;; + * ) echo "Please input yes or no.";; + esac + done + + printf -v hwsku_minigraph "%s%s%s%s%s" $HWSKU_ROOT $platform '/' $config_hwsku '/' "minigraph.xml" + printf -v target_minigraph "%s%s%s%s" $HWSKU_ROOT $platform '/' "minigraph.xml" + running_minigraph=$RUNNING_PATH + running_minigraph+="minigraph.xml" + # default_sku + printf -v hwsku "%s%s%s%s%s%s" $HWSKU_ROOT $platform '/' $config_hwsku '/' "default_sku" + printf -v target_hwsku "%s%s%s%s" $HWSKU_ROOT $platform '/' "default_sku" + + if [ ! -e $hwsku_minigraph ]; then echo "Error: $hwsku_minigraph: No such file"; exit 1; fi + if [ ! -e $hwsku ]; then echo "Error: $hwsku: No such file"; exit 1; fi + + #echo copy $hwsku_minigraph " to " $target_minigraph + cp $hwsku_minigraph $target_minigraph + cp $hwsku_minigraph $running_minigraph + #echo copy $hwsku " to " $target_hwsku + cp $hwsku $target_hwsku + + #load minigraph + echo "Loading the new configuration" + config load_minigraph -y + + # save the json after backup + echo "Backup the old config_db.json to .bak file and save the new one." + target_json=$RUNNING_PATH + target_json+="config_db.json" + backup_json=$target_json".bak" + #echo copy $target_json to $backup_json + cp $target_json $backup_json + + config save -y + sync + echo "The configuration has been updated. Please reboot the system!" +} + +config_hwsku_exec() { + config_hwsku=$1 + while true; do + read -p "This will reset to the initial configuration with the port mode specified. [Y/N] " yn + case $yn in + [Yy]* ) break;; + [Nn]* ) echo "No changes were made"; exit;; + * ) echo "Please input yes or no.";; + esac + done + + # default_sku + printf -v hwsku "%s%s%s%s%s%s" $HWSKU_ROOT $platform '/' $config_hwsku '/' "default_sku" + printf -v target_hwsku "%s%s%s%s" $HWSKU_ROOT $platform '/' "default_sku" + + #echo copy $hwsku " to " $target_hwsku + if [ ! -e $hwsku ]; then echo "Error: $hwsku: No such file"; exit 1; fi + cp $hwsku $target_hwsku + + # save the json after backup + echo "Backup the old config_db.json to .bak file and save the new one." + target_json=$RUNNING_PATH + target_json+="config_db.json" + backup_json=$target_json".bak" + #echo copy $target_json to $backup_json + cp $target_json $backup_json + + #load default_sku + CONFIG_DB_INDEX=4 + cursor=0 + Ethernet="*Ethernet*" + echo "Loading the new configuration" + PLATFORM=`sonic-cfggen -H -v DEVICE_METADATA.localhost.platform` + PRESET=(`head -n 1 /usr/share/sonic/device/$PLATFORM/default_sku`) + sonic-cfggen -H -k ${PRESET[0]} --preset ${PRESET[1]} > /etc/sonic/config_db.json + while true; do + result=$(redis-cli -n $CONFIG_DB_INDEX SCAN $cursor MATCH $Ethernet ) + cursor=$(echo "$result" | head -n 1) + + keys=$(echo "$result" | tail -n +2) + + if [ ! -z "$keys" ]; then + redis-cli -n $CONFIG_DB_INDEX DEL $keys >/dev/null 2>&1 + fi + + if [ "$cursor" == "0" ]; then + break + fi + done + + echo "The configuration is being updated, please wait for 20s." + sleep 20s + sonic-cfggen -j /etc/sonic/config_db.json --write-to-db + redis-cli -n $CONFIG_DB_INDEX SET "CONFIG_DB_INITIALIZED" "1" + + config save -y + sync + echo "The configuration has been updated. Please reboot the system!" +} + +check_supported_hwskus() { + # Check the available HWSKUs + platform_dir="$HWSKU_ROOT""$platform"/ + supported_hwskus=`ls -l $platform_dir | egrep '^d' | awk '{print $9}' | grep -v plugins | grep -v led-code | grep -v cancun | grep -v pycache` +} +config_hwsku_fun() { + + config_hwsku=$1 + # Check root privileges + if [ "$EUID" -ne 0 ] + then + echo "Please run as root" + exit + fi + + if [ "$config_hwsku" == "$current_hwsku" ]; then + echo "The input HWSKU configuration is running, no changes were made" + exit + fi + + + # Check the available HWSKUs + check_supported_hwskus + + sonic_version=`grep build_version /etc/sonic/sonic_version.yml` + array=(${sonic_version//./ }) + branch=`echo ${array[1]} | sed $'s/\'//g'` + for hwsku in $supported_hwskus + do + if [ $config_hwsku == $hwsku ]; then + if [[ $branch =~ "201803" ]]; then + config_hwsku_exec_1803 "$config_hwsku" + else + config_hwsku_exec "$config_hwsku" + fi + exit + fi + done + + # Not matching any HWSKU names, print error + echo "Please use one of the options:" + echo -e "$supported_hwskus" + exit 1 +} + +main() { + case "$1" in + -h | --help) + display_help + ;; + -p | --print) + echo $current_hwsku + ;; + -l | --list) + check_supported_hwskus + echo -e "$supported_hwskus" + ;; + -s | --set) + config_hwsku=$2 + config_hwsku_fun "$config_hwsku" + ;; + *) + echo "Please use options as following:" >&2 + display_help + ;; + esac +} + +main "$@" diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/config-hwsku.sh b/platform/broadcom/sonic-platform-modules-micas/common/script/config-hwsku.sh new file mode 100644 index 00000000000..19f650e68de --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/script/config-hwsku.sh @@ -0,0 +1,260 @@ +#!/bin/bash +########################################################################### +# SONiC default HwSKU Setup utility # +# # +# This script is used to set HWSKU in deafult_sku # +# # +########################################################################### + +# Check for user permissions +check_permissions() +{ + if [ "$EUID" != "0" ]; then + echo "Root privileges are required for this operation" + exit 1 + fi +} + +# Command usage and help +usage() +{ + cat << EOF + Usage: config-hwsku < list | set [-y]> + -l - Display supported list HWSKU for this platform. + -s - Set user provided HwSKU as default SKU. + -y - Use this option to skip user confirmation + -p - Display current HWSKU +EOF +} + +# Collect all information needed to get list of HWSKU +get_platform_info() +{ + # Initialize variables + PLATFORM="" + + # Method 1: Try sonic-cfggen + if command -v sonic-cfggen &> /dev/null; then + # Use printf to ensure clean output and remove any carriage returns + PLATFORM=$(sonic-cfggen -H -v DEVICE_METADATA.localhost.platform 2>/dev/null | tr -d '\r\n' | xargs) + fi + + # Method 2: Use machine.conf directly (most reliable) + if [ -z "$PLATFORM" ] && [ -f /host/machine.conf ]; then + PLATFORM=$(grep "^onie_platform=" /host/machine.conf | cut -d'=' -f2 | tr -d '\r\n' | xargs) + fi + + # Method 3: Use platform.json as fallback + if [ -z "$PLATFORM" ] && [ -f /etc/sonic/platform.json ]; then + PLATFORM=$(python3 -c "import json; f=open('/etc/sonic/platform.json'); d=json.load(f); print(d.get('platform', '')); f.close()" 2>/dev/null | tr -d '\r\n' | xargs) + fi + + # Final validation + if [ -z "$PLATFORM" ]; then + echo "Error: Cannot determine platform" + echo "Please check: /host/machine.conf or /etc/sonic/platform.json" + exit 1 + fi + + # Remove any remaining non-printable characters + PLATFORM=$(echo "$PLATFORM" | tr -cd '[:alnum:][:space:]-_.' | xargs) + + # Set platform directory + PLATFORM_DIR="/usr/share/sonic/device/$PLATFORM" + + if [ ! -d "$PLATFORM_DIR" ]; then + echo "Error: Platform directory not found: $PLATFORM_DIR" + echo "Available directories:" + ls -la /usr/share/sonic/device/ + exit 1 + fi + + # Get default SKU + if [ -f "$PLATFORM_DIR/default_sku" ]; then + # Read and clean the default_sku line + DEFAULT_SKU_LINE=$(head -n 1 "$PLATFORM_DIR/default_sku" | tr -d '\r\n' | xargs) + PRESET=($DEFAULT_SKU_LINE) + if [ ${#PRESET[@]} -ge 2 ]; then + HWSKU_STR_START=${PRESET[0]:0:4} + DEFAULT_PRESET=${PRESET[1]} + else + HWSKU_STR_START="" + DEFAULT_PRESET="" + fi + else + HWSKU_STR_START="" + DEFAULT_PRESET="" + echo "Warning: No default_sku found in $PLATFORM_DIR" + fi + + # Get current HWSKU + PRESENT_HWSKU="" + if command -v sonic-cfggen &> /dev/null; then + PRESENT_HWSKU=$(sonic-cfggen -d -v 'DEVICE_METADATA["localhost"]["hwsku"]' 2>/dev/null | tr -d '\r\n' | xargs) + fi + + if [ -z "$PRESENT_HWSKU" ] && [ -f /etc/sonic/config_db.json ]; then + PRESENT_HWSKU=$(python3 -c "import json; f=open('/etc/sonic/config_db.json'); d=json.load(f); print(d.get('DEVICE_METADATA', {}).get('localhost', {}).get('hwsku', '')); f.close()" 2>/dev/null | tr -d '\r\n' | xargs) + fi +} + +# Display HWSKUs supported on current platform +list_hwskus() +{ + echo "List of supported HWSKU:" + if [ ! -d "$PLATFORM_DIR" ]; then + echo "Error: Platform directory not found" + return 1 + fi + + for sku in "$PLATFORM_DIR"/*/; do + if [ -d "$sku" ]; then + sku="${sku%/}" + sku="${sku##*/}" + + # Skip non-matching prefixes if defined + if [ -n "$HWSKU_STR_START" ] && [ "$HWSKU_STR_START" != "${sku:0:4}" ]; then + continue + fi + + if [ "$sku" = "$PRESENT_HWSKU" ]; then + echo "$sku (Present)" + else + echo "$sku" + fi + fi + done +} + +# Set requested HWSKU +set_hwsku() +{ + # Parse arguments passed + HWSKU=$(echo "$1" | tr -d '\r\n' | xargs) + + # Validate HWSKU is not empty + if [ -z "$HWSKU" ]; then + echo "Error: HWSKU name cannot be empty" + exit 1 + fi + + # Validate in Supported list + valid_sku=0 + for sku in "$PLATFORM_DIR"/*/; do + if [ -d "$sku" ]; then + sku="${sku%/}" + sku="${sku##*/}" + + if [ -n "$HWSKU_STR_START" ] && [ "$HWSKU_STR_START" != "${sku:0:4}" ]; then + continue + fi + + if [ "$sku" = "$HWSKU" ]; then + valid_sku=1 + break + fi + fi + done + + if [ $valid_sku -eq 1 ]; then + if [ "$PRESENT_HWSKU" = "$HWSKU" ]; then + echo "Same as present HWSKU $HWSKU, no changes made" + else + echo -e "Warning: This deletes existing configurations and cause switch to reboot." + if [ "${EXECUTE}" = "no" ]; then + read -r -p "Are you sure you want to change? [y/N] " response + else + response='y' + fi + case $response in + [yY][eE][sS]|[yY]) + echo "Setting Default HWSKU to $HWSKU $DEFAULT_PRESET" + + # Write to default_sku + if [ -f "$PLATFORM_DIR/default_sku" ]; then + echo "$HWSKU $DEFAULT_PRESET" > "$PLATFORM_DIR/default_sku" + fi + + # Update sonic-environment + if [ -r /etc/sonic/sonic-environment ]; then + sed -i '/HWSKU.*/d' /etc/sonic/sonic-environment + echo "HWSKU=$HWSKU" >> /etc/sonic/sonic-environment + fi + + echo "Removing existing config_db.json" + if [ -r /etc/sonic/config_db.json ]; then + rm -rf /etc/sonic/config_db.json + fi + + # Remove and recreate hwsku directory + echo "Deleting hwsku directory..." + rm -rf /usr/share/sonic/hwsku + + echo "Please reboot manually to apply changes" + ;; + *) + exit 0 + ;; + esac + fi + else + echo "Invalid HWSKU - $HWSKU" + echo "Available SKUs:" + list_hwskus + exit 1 + fi +} + +# Main function +main() +{ + # Check permissions first + check_permissions + + # Get platform information + get_platform_info + + local cmd="$1" + + if [ "$cmd" = "-p" ]; then + echo "$PRESENT_HWSKU" + exit 0 + fi + + if [ "$cmd" = "help" ] || \ + [ "$cmd" = "-h" ] || [ "$cmd" = "--help" ]; then + usage + exit 0 + fi + + # Display supported HWSKU's for current platform + if [ "$cmd" = "-l" ]; then + list_hwskus + # Set user provided HWSKU as default_SKU + elif [ "$cmd" = "-s" ]; then + EXECUTE="no" + if [ "$3" = "-y" ]; then + EXECUTE="yes" + elif [ -n "$3" ] && [ "$3" != "-y" ]; then + usage + exit 1 + fi + + if [ -z "$2" ]; then + echo "Error: HWSKU name required" + usage + exit 1 + fi + + set_hwsku "$2" + # Validate supported commands + else + usage + exit 1 + fi + + exit 0 +} + +# Call main function with all arguments +main "$@" \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/config-ledswitch.sh b/platform/broadcom/sonic-platform-modules-micas/common/script/config-ledswitch.sh new file mode 100644 index 00000000000..0a71936f521 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/script/config-ledswitch.sh @@ -0,0 +1,265 @@ +#!/bin/bash +########################################################################### +# Script Name: ledswitch.sh +# Description: Control LED switch monitoring and display current status +# Usage: ./ledswitch.sh -l # Show current LED status +# ./ledswitch.sh -s {sdk|cpld} # Set LED status (sdk or cpld) +# ./ledswitch.sh -h # Show help information +########################################################################### + +SCRIPT_DIR="/usr/share/sonic/platform" +SCRIPT_NAME="ledswitch_monitor.py" +SCRIPT_PATH="${SCRIPT_DIR}/${SCRIPT_NAME}" +PID_FILE="/var/run/ledswitch_monitor.pid" +LOG_FILE="/var/log/ledswitch_monitor.log" + +# Logging function +log_info() { + echo "[INFO] $(date '+%Y-%m-%d %H:%M:%S') - $1" | tee -a ${LOG_FILE} +} + +log_error() { + echo "[ERROR] $(date '+%Y-%m-%d %H:%M:%S') - $1" | tee -a ${LOG_FILE} +} + +# Check if script exists +check_script() { + if [ ! -f "${SCRIPT_PATH}" ]; then + log_error "Script not found: ${SCRIPT_PATH}" + return 1 + fi + return 0 +} + +# Check if bcmcmd exists +check_bcmcmd() { + if ! command -v bcmcmd &> /dev/null; then + log_error "bcmcmd command not found" + return 1 + fi + return 0 +} + +# Start service (CPLD mode) +start_service() { + if check_script; then + # Check if already running + if [ -f "${PID_FILE}" ]; then + local pid=$(cat "${PID_FILE}") + if kill -0 "${pid}" 2>/dev/null; then + log_info "Service already running (PID: ${pid})" + return 0 + else + rm -f "${PID_FILE}" + fi + fi + + log_info "Starting LED switch monitoring service (CPLD mode)..." + nohup python3 "${SCRIPT_PATH}" start >> "${LOG_FILE}" 2>&1 & + local pid=$! + echo "${pid}" > "${PID_FILE}" + log_info "Service started (PID: ${pid})" + fi +} + +# Stop service (SDK mode) +stop_service() { + if [ -f "${PID_FILE}" ]; then + local pid=$(cat "${PID_FILE}") + if kill -0 "${pid}" 2>/dev/null; then + log_info "Stopping LED switch monitoring service (PID: ${pid})..." + kill -TERM "${pid}" + sleep 2 + if kill -0 "${pid}" 2>/dev/null; then + log_error "Service did not stop gracefully, force killing..." + kill -9 "${pid}" + fi + rm -f "${PID_FILE}" + log_info "Service stopped" + else + log_info "Service not running" + rm -f "${PID_FILE}" + fi + else + # Try to find by process name + local pid=$(pgrep -f "${SCRIPT_NAME}") + if [ -n "${pid}" ]; then + log_info "Found running service (PID: ${pid}), stopping..." + kill -TERM ${pid} + rm -f "${PID_FILE}" + log_info "Service stopped" + else + log_info "Service not running" + fi + fi +} + +# Check service status (returns 0 if running, 1 if not) +is_service_running() { + if [ -f "${PID_FILE}" ]; then + local pid=$(cat "${PID_FILE}") + if kill -0 "${pid}" 2>/dev/null; then + return 0 + else + rm -f "${PID_FILE}" + return 1 + fi + else + local pid=$(pgrep -f "${SCRIPT_NAME}") + if [ -n "${pid}" ]; then + echo "${pid}" > "${PID_FILE}" + return 0 + else + return 1 + fi + fi +} + +# Set CPLD mode (use Python monitoring service) +set_cpld_mode() { + log_info "Setting LED mode to CPLD..." + + # Stop SDK mode first (stop bcmcmd led) + if check_bcmcmd; then + log_info "Stopping bcmcmd led..." + bcmcmd "led stop" 2>/dev/null + if [ $? -eq 0 ]; then + log_info "bcmcmd led stop executed successfully" + else + log_error "Failed to execute bcmcmd led stop" + fi + fi + + # Start Python monitoring service + start_service + + log_info "LED mode switched to CPLD" +} + +# Set SDK mode (use bcmcmd led control) +set_sdk_mode() { + log_info "Setting LED mode to SDK..." + + # Stop Python monitoring service first + stop_service + + # Start bcmcmd led + if check_bcmcmd; then + log_info "Starting bcmcmd led..." + bcmcmd "led start" 2>/dev/null + if [ $? -eq 0 ]; then + log_info "bcmcmd led start executed successfully" + else + log_error "Failed to execute bcmcmd led start" + fi + fi + + log_info "LED mode switched to SDK" +} + +# Show current LED status +show_led_status() { + echo "" + echo "==========================================" + echo " LED Switch Status" + echo "==========================================" + + if is_service_running; then + echo " Current Mode: CPLD" + local pid=$(cat "${PID_FILE}" 2>/dev/null) + if [ -n "${pid}" ]; then + echo " PID: ${pid}" + fi + else + echo " Current Mode: SDK" + fi + + echo "==========================================" + echo "" +} + +# Show help information +show_help() { + cat << EOF +=========================================== + LED Switch Control Script +=========================================== + +USAGE: + ledswitch.sh -l Show current LED status + ledswitch.sh -s {sdk|cpld} Set LED mode (sdk or cpld) + ledswitch.sh -h Show this help message + +DESCRIPTION: + This script controls the LED switch monitoring service. + + - CPLD mode: Uses Python monitoring service to control LEDs based on + port status and breakout mode configuration. + + - SDK mode: Uses bcmcmd "led start/stop" commands to let the SDK + handle LED control directly. + +EXAMPLES: + ledswitch.sh -l # Display current mode (CPLD or SDK) + ledswitch.sh -s cpld # Switch to CPLD mode + ledswitch.sh -s sdk # Switch to SDK mode + ledswitch.sh -h # Display this help + +LOG FILE: + /var/log/ledswitch_monitor.log + +=========================================== +EOF +} + +# Main function +main() { + # Parse command line arguments + while getopts "ls:h" opt; do + case ${opt} in + l) + show_led_status + exit 0 + ;; + s) + MODE="$OPTARG" + case "${MODE}" in + sdk) + set_sdk_mode + ;; + cpld) + set_cpld_mode + ;; + *) + echo "Error: Invalid mode '$MODE'" + echo "Usage: ledswitch.sh -s {sdk|cpld}" + exit 1 + ;; + esac + exit 0 + ;; + h) + show_help + exit 0 + ;; + \?) + echo "Invalid option: -$OPTARG" >&2 + show_help + exit 1 + ;; + :) + echo "Option -$OPTARG requires an argument." >&2 + exit 1 + ;; + esac + done + + # If no arguments provided, show help + if [ $OPTIND -eq 1 ]; then + show_help + exit 0 + fi +} + +# Run main function +main "$@" diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/dev_monitor.py b/platform/broadcom/sonic-platform-modules-micas/common/script/dev_monitor.py index 23b39d3731a..245f49c5f7c 100755 --- a/platform/broadcom/sonic-platform-modules-micas/common/script/dev_monitor.py +++ b/platform/broadcom/sonic-platform-modules-micas/common/script/dev_monitor.py @@ -249,6 +249,23 @@ def slotsmonitor(self): val_t = getattr(DevMonitor, slotsattr, None) devdebuglog("slotsattr:value:%s" % (val_t)) return ret + + def binddevsmonitor(self): + binddevs_conf = DEV_MONITOR_PARAM.get('binddevs') + if binddevs_conf is None: + return 0 + binddevsattr = 'binddevsattr' + val_t = getattr(DevMonitor, binddevsattr, None) + if val_t == 'OK': + return 0 + ret = self.monitor(binddevs_conf) + if ret == 0: + setattr(DevMonitor, binddevsattr, 'OK') + else: + setattr(DevMonitor, binddevsattr, 'NOT OK') + val_t = getattr(DevMonitor, binddevsattr, None) + devdebuglog("binddevsattr:value:%s" % (val_t)) + return ret def othersmonitor(self): others_conf = DEV_MONITOR_PARAM.get('others') @@ -274,6 +291,7 @@ def doDevMonitor(devMonitor): ret_t += devMonitor.fansmonitor() ret_t += devMonitor.slotsmonitor() ret_t += devMonitor.othersmonitor() + ret_t += devMonitor.binddevsmonitor() return ret_t diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/hal_fanctrl.py b/platform/broadcom/sonic-platform-modules-micas/common/script/hal_fanctrl.py index a7bfa03942a..4c48c1cf2e7 100755 --- a/platform/broadcom/sonic-platform-modules-micas/common/script/hal_fanctrl.py +++ b/platform/broadcom/sonic-platform-modules-micas/common/script/hal_fanctrl.py @@ -199,6 +199,7 @@ def __init__(self): self.__config = baseutil.get_monitor_config() self.__pid_config = self.__config["pid"] self.__hyst_config = self.__config.get("hyst", {}) + self.__openloop_config = self.__config["openloop"] self.__temps_threshold_config = self.__config["temps_threshold"] for temp_threshold in self.__temps_threshold_config.values(): temp_threshold['temp'] = 0 @@ -256,6 +257,7 @@ def __init__(self): self.__temp_emergency_countdown = self.__fancontrol_para.get("temp_emergency_countdown", 60) self.__rotor_error_count = self.__fancontrol_para.get("rotor_error_count", 6) self.__inlet_mac_diff = self.__fancontrol_para.get("inlet_mac_diff", 50) + self.__inlet_mac_diff_flag = self.__fancontrol_para.get("check_inlet_mac_diff", 1) self.__check_crit_reboot_flag = self.__fancontrol_para.get("check_crit_reboot_flag", 1) self.__check_emerg_reboot_flag = self.__fancontrol_para.get("check_emerg_reboot_flag", 1) self.__check_crit_reboot_num = self.__fancontrol_para.get("check_crit_reboot_num", 3) @@ -840,9 +842,10 @@ def abnormal_check(self): pwm_list.append(psu_absent_pwm) fancontrol_debug("psu_absent_pwm = 0x%x" % psu_absent_pwm) - dev_err_pwm = self.checkDevError() - pwm_list.append(dev_err_pwm) - fancontrol_debug("dev_err_pwm = 0x%x" % dev_err_pwm) + if self.__inlet_mac_diff_flag == 1: + dev_err_pwm = self.checkDevError() + pwm_list.append(dev_err_pwm) + fancontrol_debug("dev_err_pwm = 0x%x" % dev_err_pwm) temp_fail_pwm = self.checktempfail() pwm_list.append(temp_fail_pwm) @@ -1018,19 +1021,30 @@ def do_fancontrol(self): # get_monitor_temp self.get_monitor_temp() fancontrol_debug("last_pwm = 0x%x" % self.__pwm) - # openloop - inlettemp = self.__temps_threshold_config.get(INLET_TEMP)['temp'] - linear_value = self.openloop.linear_cacl(inlettemp) - if linear_value is None: - linear_value = self.__min_pwm - pwm_list.append(linear_value) - fancontrol_debug("linear_value = 0x%x" % linear_value) - - curve_value = self.openloop.curve_cacl(inlettemp) - if curve_value is None: - curve_value = self.__min_pwm - pwm_list.append(curve_value) - fancontrol_debug("curve_value = 0x%x" % curve_value) + # openloop linear + linear_flag = self.__openloop_config.get("linear", {}).get("flag", 0) + if linear_flag == 0: + fancontrol_debug("openloop linear flag is 0, do nothing") + else: + inlettemp = self.__temps_threshold_config.get(INLET_TEMP)['temp'] + linear_value = self.openloop.linear_cacl(inlettemp) + if linear_value is None: + linear_value = self.__min_pwm + pwm_list.append(linear_value) + fancontrol_debug("linear_value = 0x%x" % linear_value) + + # openloop curve + curve_flag = self.__openloop_config.get("curve", {}).get("flag", 0) + if curve_flag == 0: + fancontrol_debug("openloop curve flag is 0, do nothing") + + else: + inlettemp = self.__temps_threshold_config.get(INLET_TEMP)['temp'] + curve_value = self.openloop.curve_cacl(inlettemp) + if curve_value is None: + curve_value = self.__min_pwm + pwm_list.append(curve_value) + fancontrol_debug("curve_value = 0x%x" % curve_value) # hyst for hyst_index in self.__hyst_config.values(): diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/hal_ledctrl.py b/platform/broadcom/sonic-platform-modules-micas/common/script/hal_ledctrl.py index 74fc1727ac7..8cdf34a7fe6 100755 --- a/platform/broadcom/sonic-platform-modules-micas/common/script/hal_ledctrl.py +++ b/platform/broadcom/sonic-platform-modules-micas/common/script/hal_ledctrl.py @@ -18,6 +18,7 @@ import time import syslog import traceback +import re from plat_hal.interface import interface from plat_hal.baseutil import baseutil from platform_util import get_value @@ -318,8 +319,10 @@ class ledcontrol(object): def __init__(self): self.fan_obj_list = [] self.psu_obj_list = [] + self.dcdc_dict = {} self.board_psu_led_status = COLOR_GREEN self.board_fan_led_status = COLOR_GREEN + self.board_smb_led_status = COLOR_GREEN self.__board_air_flow = "" self.int_case = interface() self.__config = baseutil.get_monitor_config() @@ -333,7 +336,9 @@ def __init__(self): self.__interval = self.__ledcontrol_para.get("interval", 5) self.__checkpsu = self.__ledcontrol_para.get("checkpsu", 0) self.__checkfan = self.__ledcontrol_para.get("checkfan", 0) + self.__checksmb = self.__ledcontrol_para.get("checksmb", 0) self.__psu_amber_num = self.__ledcontrol_para.get("psu_amber_num") + self.__psu_green_num = self.__ledcontrol_para.get("psu_green_num", 0) self.__fan_amber_num = self.__ledcontrol_para.get("fan_amber_num") self.__psu_air_flow_amber_num = self.__ledcontrol_para.get("psu_air_flow_amber_num", 0) self.__fan_air_flow_amber_num = self.__ledcontrol_para.get("fan_air_flow_amber_num", 0) @@ -341,6 +346,12 @@ def __init__(self): self.__board_psu_led = self.__ledcontrol_para.get("board_psu_led", []) self.__board_fan_led = self.__ledcontrol_para.get("board_fan_led", []) self.__board_smb_led = self.__ledcontrol_para.get("board_smb_led", []) + self.__board_scm_fru_led = self.__ledcontrol_para.get("board_scm_fru_led", []) + self.__board_smb_fru_led = self.__ledcontrol_para.get("board_smb_fru_led", []) + self.__board_smb_fru_dcdc_sensors = self.__ledcontrol_para.get("board_smb_fru_dcdc_sensors", []) + self.__board_scm_fru_dcdc_sensors = self.__ledcontrol_para.get("board_scm_fru_dcdc_sensors", []) + self.__board_smb_fru_temps = self.__ledcontrol_para.get("board_smb_fru_temps", []) + self.__board_scm_fru_temps = self.__ledcontrol_para.get("board_scm_fru_temps", []) self.__psu_air_flow_monitor = self.__ledcontrol_para.get("psu_air_flow_monitor", 0) self.__fan_air_flow_monitor = self.__ledcontrol_para.get("fan_air_flow_monitor", 0) self.__fan_mix_list = self.__ledcontrol_para.get("fan_mix_list", []) @@ -360,10 +371,18 @@ def checkpsu(self): def checkfan(self): return self.__checkfan + @property + def checksmb(self): + return self.__checksmb + @property def psu_amber_num(self): return self.__psu_amber_num + @property + def psu_green_num(self): + return self.__psu_green_num + @property def fan_amber_num(self): return self.__fan_amber_num @@ -400,6 +419,30 @@ def board_fan_led(self): def board_smb_led(self): return self.__board_smb_led + @property + def board_smb_fru_led(self): + return self.__board_smb_fru_led + + @property + def board_smb_fru_dcdc_sensors(self): + return self.__board_smb_fru_dcdc_sensors + + @property + def board_smb_fru_temps(self): + return self.__board_smb_fru_temps + + @property + def board_scm_fru_led(self): + return self.__board_scm_fru_led + + @property + def board_scm_fru_dcdc_sensors(self): + return self.__board_scm_fru_dcdc_sensors + + @property + def board_scm_fru_temps(self): + return self.__board_scm_fru_temps + @property def fan_mix_list(self): return self.__fan_mix_list @@ -446,6 +489,24 @@ def set_smb_led(self, color): else: ledcontrol_debug("set %s failed, color:%s," % (led_name, color)) + def set_smb_fru_led(self, color): + for led in self.board_smb_fru_led: + led_name = led.get("led_name") + ret = self.set_led_color(led_name, color) + if ret is True: + ledcontrol_debug("set %s success, color:%s," % (led_name, color)) + else: + ledcontrol_debug("set %s failed, color:%s," % (led_name, color)) + + def set_scm_fru_led(self, color): + for led in self.board_scm_fru_led: + led_name = led.get("led_name") + ret = self.set_led_color(led_name, color) + if ret is True: + ledcontrol_debug("set %s success, color:%s," % (led_name, color)) + else: + ledcontrol_debug("set %s failed, color:%s," % (led_name, color)) + def set_sys_led(self, color): for led in self.board_sys_led: led_name = led.get("led_name") @@ -523,22 +584,25 @@ def get_monitor_temp(self): ledcontrol_debug("%s = %d" % (temp_threshold['name'], temp_threshold['temp'])) ledcontrol_debug("warning = %d, critical = %d" % (temp_threshold['warning'], temp_threshold['critical'])) - def is_temp_warning(self): + def is_temp_warning(self, need_calcu_temps=[]): + # if need_calcu_temps is null, we calculate led_status based on all temps + # if need_calcu_temps is not null, we calculate led_status based on need_calcu_temps warning_flag = False for temp_threshold in self.__temps_threshold_config.values(): if temp_threshold['temp'] >= temp_threshold['warning']: - warning_flag = True - ledcontrol_debug("%s is over warning" % temp_threshold['name']) - ledcontrol_debug( - "%s = %d, warning = %d" % - (temp_threshold['name'], - temp_threshold['temp'], - temp_threshold['warning'])) + if need_calcu_temps == [] or self.is_str_in_regular_exp_list(temp_threshold['name'], need_calcu_temps): + warning_flag = True + ledcontrol_debug("%s is over warning" % temp_threshold['name']) + ledcontrol_debug( + "%s = %d, warning = %d" % + (temp_threshold['name'], + temp_threshold['temp'], + temp_threshold['warning'])) return warning_flag - def checkTempWarning(self): + def checkTempWarning(self, need_calcu_temps=[]): try: - if self.is_temp_warning(): + if self.is_temp_warning(need_calcu_temps): ledcontrol_debug("temp is over warning") return True except Exception as e: @@ -561,10 +625,19 @@ def is_temp_critical(self): temp_threshold['critical'])) return critical_flag - def checkTempCrit(self): + def checkTempCrit(self, need_calcu_temps=[]): try: if self.is_temp_critical(): temp_dict = dict(self.__temps_threshold_config) + if need_calcu_temps != []: + for temp_name, temp in temp_dict.items(): + if not self.is_str_in_regular_exp_list(temp_name, need_calcu_temps): + continue + if temp['critical_flag'] is True: + ledcontrol_debug("temp is over critical") + return True + return False + tmp = temp_dict.get(SWITCH_TEMP) if tmp['critical_flag'] is True: ledcontrol_debug("temp is over critical") @@ -608,13 +681,14 @@ def dcdc_whitelist_check(self, dcdc_name): ledcontrol_error('%%WHITELIST_CHECK: %s check error, msg: %s.' % (dcdc_name, str(e))) return False - def get_voltage_led_status(self): + def get_voltage_led_status(self, need_calcu_dcdcs=[]): try: led_status = COLOR_GREEN - dcdc_dict = self.int_case.get_dcdc_all_info() - for dcdc_name, item in dcdc_dict.items(): + for dcdc_name, item in self.dcdc_dict.items(): ret = self.dcdc_whitelist_check(dcdc_name) if ret is False: + if need_calcu_dcdcs != [] and not self.is_str_in_regular_exp_list(dcdc_name, need_calcu_dcdcs): + continue if item['Value'] is None or int(item['Value']) == self.int_case.error_ret: ledcontrol_error('The value of %s read failed.' % (dcdc_name)) elif float(item['Value']) > float(item['Max']): @@ -715,9 +789,9 @@ def get_monitor_psu_status(self): psu_obj.led_status = COLOR_GREEN ledcontrol_debug("psu error number: %d" % psuerrnum) - if psuerrnum == 0: + if 0 <= psuerrnum and psuerrnum <= self.psu_green_num: psu_led_status = COLOR_GREEN - elif psuerrnum <= self.psu_amber_num: + elif self.psu_green_num <= psuerrnum and psuerrnum <= self.psu_amber_num: psu_led_status = COLOR_AMBER else: psu_led_status = COLOR_RED @@ -837,10 +911,10 @@ def get_monitor_psu_air_flow(self): ledcontrol_debug("monitor psu air flow, set psu led: %s" % LED_STATUS_DICT.get(psu_led_status)) return psu_led_status - def get_temp_led_status(self): - if self.checkTempCrit() is True: + def get_temp_led_status(self, need_calcu_temps=[]): + if self.checkTempCrit(need_calcu_temps) is True: led_status = COLOR_RED - elif self.checkTempWarning() is True: + elif self.checkTempWarning(need_calcu_temps) is True: led_status = COLOR_AMBER else: led_status = COLOR_GREEN @@ -866,12 +940,19 @@ def get_sys_led_follow_psu_status(self): ledcontrol_debug("sys led don't follow psu led, set default green") return sys_led_status + def get_sys_led_follow_smb_status(self): + if self.checksmb: + sys_led_status = self.board_smb_led_status + ledcontrol_debug("sys led follow smb led, set sys led: %s" % LED_STATUS_DICT.get(sys_led_status)) + else: + sys_led_status = COLOR_GREEN + ledcontrol_debug("sys led don't follow psu led, set default green") + return sys_led_status + def dealSysLedStatus(self): sys_led_status_list = [] if self.sysled_check_temp == 1: ledcontrol_debug("sys led check temperature status") - # get_monitor_temp - self.get_monitor_temp() # monitor temp get sys led status sys_led_status = self.get_temp_led_status() ledcontrol_debug("monitor temperature to get sys led status: %s" % @@ -888,6 +969,10 @@ def dealSysLedStatus(self): sys_led_status = self.get_sys_led_follow_psu_status() sys_led_status_list.append(sys_led_status) + # check sys led follow smb led status + sys_led_status = self.get_sys_led_follow_smb_status() + sys_led_status_list.append(sys_led_status) + if self.sysled_check_fw_up == 1: ledcontrol_debug("sys led check firmware upgrade") # monitor firmware get sys led status @@ -952,8 +1037,6 @@ def dealSmbLedStatus(self): ledcontrol_debug("Start to control SMB led") smb_led_status_list = [] - # get_monitor_temp - self.get_monitor_temp() # monitor temp get smb led status smb_led_status = self.get_temp_led_status() smb_led_status_list.append(smb_led_status) @@ -967,14 +1050,74 @@ def dealSmbLedStatus(self): smb_led_status = max(smb_led_status_list) smb_led_color = LED_STATUS_DICT.get(smb_led_status) + self.board_smb_led_status = smb_led_status + # set smb led self.set_smb_led(smb_led_color) + def dealScmfruLedStatus(self): + if self.board_scm_fru_led == []: + ledcontrol_debug("Don't need to control SCM FRU led") + return + + ledcontrol_debug("Start to control SCM FRU led") + scm_fru_led_status_list = [] + + scm_fru_led_status = self.get_temp_led_status(need_calcu_temps=self.board_scm_fru_temps) + scm_fru_led_status_list.append(scm_fru_led_status) + ledcontrol_debug("monitor temperature to get scm fru led status: %s" % LED_STATUS_DICT.get(scm_fru_led_status)) + + scm_fru_led_status = self.get_voltage_led_status(need_calcu_dcdcs=self.board_scm_fru_dcdc_sensors) + scm_fru_led_status_list.append(scm_fru_led_status) + ledcontrol_debug("monitor voltage to get scm fru led status: %s" % LED_STATUS_DICT.get(scm_fru_led_status)) + + scm_fru_led_status = max(scm_fru_led_status_list) + scm_fru_led_color = LED_STATUS_DICT.get(scm_fru_led_status) + self.set_scm_fru_led(scm_fru_led_color) + + def dealSmbfruLedStatus(self): + if self.board_smb_fru_led == []: + ledcontrol_debug("Don't need to control SMB FRU led") + return + + ledcontrol_debug("Start to control SMB FRU led") + smb_fru_led_status_list = [] + + smb_fru_led_status = self.get_temp_led_status(need_calcu_temps=self.board_smb_fru_temps) + smb_fru_led_status_list.append(smb_fru_led_status) + ledcontrol_debug("monitor temperature to get smb fru led status: %s" % LED_STATUS_DICT.get(smb_fru_led_status)) + + smb_fru_led_status = self.get_voltage_led_status(need_calcu_dcdcs=self.board_smb_fru_dcdc_sensors) + smb_fru_led_status_list.append(smb_fru_led_status) + ledcontrol_debug("monitor voltage to get smb fru led status: %s" % LED_STATUS_DICT.get(smb_fru_led_status)) + + smb_fru_led_status = max(smb_fru_led_status_list) + smb_fru_led_color = LED_STATUS_DICT.get(smb_fru_led_status) + self.set_smb_fru_led(smb_fru_led_color) + + def update_dcdc_dict(self): + self.dcdc_dict = self.int_case.get_dcdc_all_info() + + def update_temp_info(self): + self.get_monitor_temp() + def do_ledcontrol(self): self.dealPsuLedStatus() self.dealFanLedStatus() - self.dealSysLedStatus() + # we only need to get dcdc and temp info ONCE every loop + self.update_dcdc_dict() + self.update_temp_info() + self.dealSmbLedStatus() + self.dealScmfruLedStatus() + self.dealSmbfruLedStatus() + self.dealSysLedStatus() + + def is_str_in_regular_exp_list(self, target_str, regular_exp_list): + for regular_exp in regular_exp_list: + if re.match(regular_exp, target_str): + return True + return False def fan_obj_init(self): fan_num = self.get_fan_total_number() diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/mgmt_ledctrl.py b/platform/broadcom/sonic-platform-modules-micas/common/script/mgmt_ledctrl.py new file mode 100644 index 00000000000..26a8c6c4f67 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/script/mgmt_ledctrl.py @@ -0,0 +1,124 @@ +#!/usr/bin/env python3 +# -*- coding: utf-8 -*- +import os +import logging +import time + +from platform_util import get_value, set_value, setup_logger, BSP_COMMON_LOG_DIR +from platform_config import MGMT_LED_CONFIG + +DEBUG_FILE = "/etc/.mgmt_ledcontrol_debug_flag" +LOG_FILE = BSP_COMMON_LOG_DIR + "mgmt_ledctrl_debug.log" +logger = setup_logger(LOG_FILE) + + +class PortConfig(object): + def __init__(self, name, link_path, led_path): + self.name = name + self.link_path = link_path + self.led_path = led_path + + +def debug_init(): + if os.path.exists(DEBUG_FILE): + logger.setLevel(logging.DEBUG) + else: + logger.setLevel(logging.INFO) + + +def mgmt_led_debug(msg): + logger.debug(msg) + + +def mgmt_led_error(msg): + logger.error(msg) + + +def read_link_status(path): + config = { + "gettype": "sysfs", + "loc": path, + "int_decode": 16, + } + ret, value = get_value(config) + if ret is not True: + raise RuntimeError("read link status failed, path:{}, msg:{}".format(path, value)) + if value not in (0, 1): + raise ValueError("unsupported link_status value:{} path:{}".format(value, path)) + mgmt_led_debug("read link status path:{} value:{}".format(path, value)) + return value + + +def write_led_status(path, value): + config = { + "gettype": "sysfs", + "loc": path, + "value": int(value), + "mask": 0, + } + ret, msg = set_value(config) + mgmt_led_debug("write led status path:{} value:{} ret:{} msg:{}".format(path, value, ret, msg)) + return ret, msg + + +def load_runtime_config_from_product(): + if MGMT_LED_CONFIG is None or not isinstance(MGMT_LED_CONFIG, dict): + raise ValueError("MGMT_LED_CONFIG error: %s" % MGMT_LED_CONFIG) + + interval = float(MGMT_LED_CONFIG.get("interval", 3)) + if interval <= 0: + raise ValueError("MGMT_LED_CONFIG.interval must be > 0") + + led_list = MGMT_LED_CONFIG.get("mgmt_led_list", []) + if not isinstance(led_list, list) or len(led_list) == 0: + raise ValueError("MGMT_LED_CONFIG.mgmt_led_list must be non-empty list") + + ports = [] + for idx, item in enumerate(led_list): + if not isinstance(item, dict): + raise ValueError("MGMT_LED_CONFIG.mgmt_led_list[{}] must be dict".format(idx)) + + name = item.get("name", "mgmt_led_{}".format(idx)) + link_path = item.get("link_path") + led_path = item.get("led_path") + + if not link_path: + raise ValueError("MGMT_LED_CONFIG.mgmt_led_list[{}].link_path is required".format(idx)) + if not led_path: + raise ValueError("MGMT_LED_CONFIG.mgmt_led_list[{}].led_path is required".format(idx)) + + ports.append(PortConfig(name, link_path, led_path)) + + mgmt_led_debug("load MGMT_LED_CONFIG success interval:{} port_num:{}".format(interval, len(ports))) + return ports, interval + + +def monitor_once(port): + link_status = read_link_status(port.link_path) + if link_status == 1: + led_status = 1 + else: + led_status = 0 + ret, msg = write_led_status(port.led_path, led_status) + if ret is not True: + raise RuntimeError("set led failed, path={}, value={}, msg={}" + .format(port.led_path, led_status, msg)) + mgmt_led_debug("monitor {} done link:{} led:{}".format(port.name, link_status, led_status)) + + +def main(): + debug_init() + ports, interval = load_runtime_config_from_product() + + while True: + debug_init() + for port in ports: + try: + monitor_once(port) + except Exception as exc: + mgmt_led_error("[{}] monitor error: {}".format(port.name, str(exc))) + time.sleep(interval) + + +if __name__ == "__main__": + main() diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_base.py b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_base.py new file mode 100644 index 00000000000..d4b6713d631 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_base.py @@ -0,0 +1,247 @@ +#!/usr/bin/env python3 +import os +import time +import sys +from platform_util import exec_os_cmd, log_to_file, get_value, set_value +from wbutil.baseutil import get_machine_info, get_platform_info, get_board_id + +SUB_VERSION_FILE = "/etc/sonic/.subversion" + +LOG_DIRECTORY = '/var/log/bsp_tech' +os.makedirs(LOG_DIRECTORY, exist_ok=True) +LOG_FILE_PATH = os.path.join(LOG_DIRECTORY, 'platform_base_debug.log') +LOG_WRITE_SIZE = 1 * 1024 * 1024 + + +def log_message(message): + log_to_file(message, LOG_FILE_PATH, LOG_WRITE_SIZE) + + +platform = get_platform_info(get_machine_info()) +board_id = get_board_id(get_machine_info()) +platform_productfile = (platform + "_base_config").replace("-", "_") +platformid_configfile = (platform + "_" + board_id + "_base_config").replace("-", "_") +configfile_pre = "/usr/local/bin/" +sys.path.append(configfile_pre) + +global module_product +if os.path.exists(configfile_pre + platformid_configfile + ".py"): + module_product = __import__(platformid_configfile, globals(), locals(), [], 0) +elif os.path.exists(configfile_pre + platform_productfile + ".py"): + module_product = __import__(platform_productfile, globals(), locals(), [], 0) +else: + log_message("platform base config file not exist, do nothing") + sys.exit(0) + + +def get_var(name, default): + global module_product + return getattr(module_product, name, default) + + +DRIVERLISTS = get_var("DRIVERLISTS", []) +DEVICE = get_var("DEVICE", []) +INIT_PARAM = get_var("INIT_PARAM", []) +FINISH_PARAM = get_var("FINISH_PARAM ", []) +SUBVERSION_CONFIG = get_var("SUBVERSION_CONFIG", {}) + + +def removeDev(bus, loc): + cmd = "echo 0x%02x > /sys/bus/i2c/devices/i2c-%d/delete_device" % (loc, bus) + devpath = "/sys/bus/i2c/devices/%d-%04x" % (bus, loc) + if os.path.exists(devpath): + log_message("%%PLATFORM_BASE: removeDev, bus: %s, loc: 0x%02x" % (bus, loc)) + ret, log = set_value({"gettype": "cmd", "cmd": cmd}) + if ret is False: + log_message("%%PLATFORM_BASE: run %s error, msg: %s" % (cmd, log)) + else: + log_message("%%PLATFORM_BASE: removeDev, bus: %s, loc: 0x%02x success" % (bus, loc)) + else: + log_message("%%PLATFORM_BASE: %s not found, don't run cmd: %s" % (devpath, cmd)) + + +def addDev(name, bus, loc): + pdevpath = "/sys/bus/i2c/devices/i2c-%d/" % bus + for i in range(1, 11): + if os.path.exists(pdevpath): + break + time.sleep(0.1) + if i % 10 == 0: + log_message("%%PLATFORM_BASE: %s not found ! i %d " % (pdevpath, i)) + return + + cmd = "echo %s 0x%02x > /sys/bus/i2c/devices/i2c-%d/new_device" % (name, loc, bus) + devpath = "/sys/bus/i2c/devices/%d-%04x" % (bus, loc) + if not os.path.exists(devpath): + log_message("%%PLATFORM_BASE: addDev, name: %s, bus: %s, loc: 0x%02x" % (name, bus, loc)) + ret, log = set_value({"gettype": "cmd", "cmd": cmd}) + if ret is False: + log_message("%%PLATFORM_BASE: run %s error, msg: %s" % (cmd, log)) + else: + log_message("%%PLATFORM_BASE: addDev, name: %s, bus: %s, loc: 0x%02x success" % (name, bus, loc)) + else: + log_message("%%PLATFORM_BASE: %s already exist, don't run cmd: %s" % (devpath, cmd)) + + +def removedevs(): + for index in range(len(DEVICE) - 1, -1, -1): + removeDev(DEVICE[index]["bus"], DEVICE[index]["loc"]) + + +def adddevs(): + for dev in DEVICE: + addDev(dev["name"], dev["bus"], dev["loc"]) + + +def checksignaldriver(name): + return os.path.exists("/sys/module/%s" % name) + + +def adddriver(name, delay): + realname = name.lstrip().split(" ")[0] + if delay > 0: + time.sleep(delay) + if checksignaldriver(realname): + log_message("%%PLATFORM_BASE: WARN: %s driver already loaded, skip to modprobe" % realname) + return + cmd = "modprobe %s" % name + log_message("%%PLATFORM_BASE: adddriver cmd: %s, delay: %s" % (cmd, delay)) + for i in range(6): + status, log = exec_os_cmd(cmd) + if status == 0: + if checksignaldriver(realname): + log_message("%%PLATFORM_BASE: add driver %s success" % realname) + return + log_message("%%PLATFORM_BASE: run %s success, but driver %s not load, retry: %d" % (cmd, realname, i)) + else: + log_message("%%PLATFORM_BASE: run %s error, status: %s, msg: %s, retry: %d" % (cmd, status, log, i)) + time.sleep(0.1) + log_message("%%PLATFORM_BASE: load %s driver failed, exit!" % realname) + sys.exit(1) + + +def removedriver(name, delay, removeable=1): + realname = name.lstrip().split(" ")[0] + if not removeable: + log_message("%%PLATFORM_BASE: driver name: %s not removeable" % realname) + return + if not checksignaldriver(realname): + log_message("%%PLATFORM_BASE: WARN: %s driver not loaded, skip to rmmod" % realname) + return + + cmd = "rmmod %s" % realname + log_message("%%PLATFORM_BASE: removedriver, driver name: %s, delay: %s" % (realname, delay)) + for i in range(6): + status, log = exec_os_cmd(cmd) + if status == 0: + if not checksignaldriver(realname): + log_message("%%PLATFORM_BASE: remove driver %s success" % realname) + if delay > 0: + time.sleep(delay) + return + log_message("%%PLATFORM_BASE: run %s success, but driver %s is loaded, retry: %d" % (cmd, realname, i)) + else: + log_message("%%PLATFORM_BASE: run %s error, status: %s, msg: %s, retry: %d" % (cmd, status, log, i)) + time.sleep(0.1) + log_message("%%PLATFORM_BASE: remove %s driver failed, exit!" % realname) + sys.exit(1) + + +def removedrivers(): + for index in range(len(DRIVERLISTS) - 1, -1, -1): + delay = 0 + removeable = DRIVERLISTS[index].get("removable", 1) + if isinstance(DRIVERLISTS[index], dict): + name = DRIVERLISTS[index].get("name") + delay = DRIVERLISTS[index].get("delay") + else: + name = DRIVERLISTS[index] + removedriver(name, delay, removeable) + + +def adddrivers(): + for driver in DRIVERLISTS: + delay = 0 + if isinstance(driver, dict): + name = driver.get("name") + delay = driver.get("delay", 0) + else: + name = driver + adddriver(name, delay) + + +def platform_base_init(): + for item in INIT_PARAM: + status, log = set_value(item) + if status is False: + log_message("%%PLATFORM_BASE: init set value failed, config: %s, log: %s" % (item, log)) + return False + log_message("%%PLATFORM_BASE: init set value success, config: %s" % item) + return True + + +def platform_base_finish(): + for item in FINISH_PARAM: + status, log = set_value(item) + if status is False: + log_message("%%PLATFORM_BASE: finish set value failed, config: %s, log: %s" % (item, log)) + else: + log_message("%%PLATFORM_BASE: finish set value success, config: %s" % item) + + +def unload_driver(): + removedevs() + removedrivers() + + +def load_driver(): + adddrivers() + adddevs() + + +def generate_sub_version(): + if not SUBVERSION_CONFIG: + log_message("%%PLATFORM_BASE: SUBVERSION_CONFIG is empty, do nothing") + return + + val_config = SUBVERSION_CONFIG["get_value"] + ret, value = get_value(val_config) + if ret is False: + log_message("%%PLATFORM_BASE: get value failed, config: %s, log: %s" % (val_config, value)) + return + + log_message("%%PLATFORM_BASE: get value success, value: 0x%02x" % value) + + val_mask = val_config.get("mask") + if val_mask is not None: + origin_value = value + value = origin_value & val_mask + log_message("%%PLATFORM_BASE: origin value: 0x%02x, mask: 0x%02x, mask_value: 0x%02x" % + (origin_value, val_mask, value)) + + decode_config = SUBVERSION_CONFIG.get("decode_value") + if decode_config is not None: + origin_value = value + value = decode_config.get(origin_value, origin_value) + log_message("%%PLATFORM_BASE: origin_value: 0x%02x, decode value: 0x%02x" % (origin_value, value)) + + out_file_dir = os.path.dirname(SUB_VERSION_FILE) + if len(out_file_dir) != 0: + exec_os_cmd("mkdir -p %s" % out_file_dir) + with open(SUB_VERSION_FILE, "w") as fd: + fd.write("v%02x\n" % value) + exec_os_cmd("sync") + + +def run(): + ret = platform_base_init() + if ret is False: + platform_base_finish() + return + load_driver() + generate_sub_version() + unload_driver() + + +if __name__ == '__main__': + run() diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_common.py b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_common.py index 025a22ce82c..ff6d1aab81e 100755 --- a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_common.py +++ b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_common.py @@ -42,6 +42,7 @@ "INIT_PARAM", "INIT_COMMAND", "SET_MAC_CONF", + "MGMT_LED_CONFIG", "DRVIER_UPDATE_CONF", "MONITOR_TEMP_MIN", "MONITOR_K", @@ -85,7 +86,8 @@ "DEV_LEDS", "fanloc", "PLATFORM_POWER_CONF", - "POWER_CTRL_CONF" + "POWER_CTRL_CONF", + "PRODUCT_NAME_CONF", ] # driver blacklist parameter @@ -152,6 +154,9 @@ # Set eth mac address parameters SET_MAC_CONF = [] +# mgmt led config parameters +MGMT_LED_CONFIG = [] + # driver update config DRVIER_UPDATE_CONF = {} @@ -161,6 +166,9 @@ # power control config POWER_CTRL_CONF = {} +# product name config +PRODUCT_NAME_CONF = {} + ################################ fancontrol parameter################################### MONITOR_TEMP_MIN = 38 MONITOR_K = 11 diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_config.py b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_config.py index 762f33dfbcf..854fe48df9a 100755 --- a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_config.py +++ b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_config.py @@ -20,6 +20,7 @@ from wbutil.baseutil import get_machine_info from wbutil.baseutil import get_platform_info from wbutil.baseutil import get_board_id +from wbutil.baseutil import get_sub_version __all__ = [ "MAILBOX_DIR", @@ -47,6 +48,7 @@ "GLOBALINITPARAM_PRE", "GLOBALINITCOMMAND_PRE", "SET_MAC_CONF", + "MGMT_LED_CONFIG", "DRVIER_UPDATE_CONF", "MONITOR_CONST", "PSU_FAN_FOLLOW", @@ -61,7 +63,8 @@ "DEV_LEDS", "fanloc", "PLATFORM_POWER_CONF", - "POWER_CTRL_CONF" + "POWER_CTRL_CONF", + "PRODUCT_NAME_CONF" ] @@ -75,17 +78,21 @@ def getdeviceplatform(): platform = get_platform_info(get_machine_info()) board_id = get_board_id(get_machine_info()) +sub_ver = get_sub_version() platformpath = getdeviceplatform() MAILBOX_DIR = "/sys/bus/i2c/devices/" grtd_productfile = (platform + "_config").replace("-", "_") common_productfile = "platform_common" platform_configfile = (platform + "_" + board_id + "_config").replace("-", "_") # platfrom + board_id +platform_subver_configfile = (platform + "_" + board_id + "_" + sub_ver + "_config").replace("-", "_") configfile_pre = "/usr/local/bin/" sys.path.append(platformpath) sys.path.append(configfile_pre) ############################################################################################ -if os.path.exists(configfile_pre + platform_configfile + ".py"): +if os.path.exists(configfile_pre + platform_subver_configfile + ".py"): + module_product = __import__(platform_subver_configfile, globals(), locals(), [], 0) +elif os.path.exists(configfile_pre + platform_configfile + ".py"): module_product = __import__(platform_configfile, globals(), locals(), [], 0) elif os.path.exists(configfile_pre + grtd_productfile + ".py"): module_product = __import__(grtd_productfile, globals(), locals(), [], 0) @@ -156,6 +163,9 @@ def getdeviceplatform(): # Set eth mac address parameters SET_MAC_CONF = module_product.SET_MAC_CONF +# mgmt led config parameters +MGMT_LED_CONFIG = module_product.MGMT_LED_CONFIG + # driver update config DRVIER_UPDATE_CONF = module_product.DRVIER_UPDATE_CONF @@ -165,6 +175,9 @@ def getdeviceplatform(): # power control config POWER_CTRL_CONF = module_product.POWER_CTRL_CONF +# product name config +PRODUCT_NAME_CONF = getattr(module_product, "PRODUCT_NAME_CONF", {}) + ################################ fancontrol parameter################################### diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_driver.py b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_driver.py index 290e3a93a38..203b2def3db 100755 --- a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_driver.py +++ b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_driver.py @@ -18,12 +18,23 @@ import os import subprocess import time +import sys import click from platform_config import GLOBALCONFIG, WARM_UPGRADE_STARTED_FLAG, WARM_UPG_FLAG, FW_UPGRADE_STARTED_FLAG +from platform_util import set_value +from platform_util import setup_logger, BSP_COMMON_LOG_DIR +# Constants +LOG_WRITE_SIZE = 1 * 1024 * 1024 # 1 MB +LOG_FILE = BSP_COMMON_LOG_DIR + "platform_driver_debug.log" +logger = setup_logger(LOG_FILE, LOG_WRITE_SIZE) -CONTEXT_SETTINGS = {"help_option_names": ['-h', '--help']} +def log_message(message): + logger.info(message) + +CONTEXT_SETTINGS = {"help_option_names": ['-h', '--help']} +PLATFORM_I2C_RETRY_TIME = 3 class AliasedGroup(click.Group): def get_command(self, ctx, cmd_name): @@ -142,12 +153,47 @@ def checksignaldriver(name): return False -def adddriver(name, delay): - cmd = "modprobe %s" % name - if delay != 0: +def process_init_commands(init): + if init is not None: + if isinstance(init, list): + for init_cmd in init: + ret, log = set_value(init_cmd) + if ret is True: + click.echo("%%PLATFORM_DRIVER: init success, cmd: %s" % init_cmd) + else: + click.echo("%%PLATFORM_DRIVER: init failed, cmd: %s, msg: %s" % (init_cmd, str(log))) + return + else: + click.echo("%%PLATFORM_DRIVER: init must be list (type is %s)" % type(init).__name__) + return + +def adddriver(name, delay, init=None): + realname = name.lstrip().split(" ")[0] + if delay > 0: time.sleep(delay) - if checksignaldriver(name) is not True: - log_os_system(cmd) + + ret = checksignaldriver(realname) + if ret is True: + log_message("%%PLATFORM_DRIVER: WARN: %s driver already loaded, skip to modprobe" % realname) + return + + cmd = "modprobe %s" % name + log_message("%%PLATFORM_DRIVER: adddriver cmd: %s, delay: %s" % (cmd, delay)) + retrytime = PLATFORM_I2C_RETRY_TIME + for i in range(retrytime): + process_init_commands(init) + status, log = log_os_system(cmd) + if status == 0: + ret = checksignaldriver(realname) + if ret is True: + log_message("%%PLATFORM_DRIVER: add driver %s success" % realname) + return + log_message("%%PLATFORM_DRIVER: run %s success, but driver %s not load, retry: %d" % (cmd, realname, i)) + else: + log_message("%%PLATFORM_DRIVER: run %s error, status: %s, msg: %s, retry: %d" % (cmd, status, log, i)) + time.sleep(0.1) + log_message("%%PLATFORM_DRIVER: load %s driver failed, exit!" % realname) + sys.exit(1) def removedriver(name, delay, removeable=1): @@ -181,21 +227,23 @@ def removedrivers(): def adddrivers(): if GLOBALCONFIG is None: - click.echo("%%WB_PLATFORM_DRIVER-INIT: load global config failed.") + click.echo("%%PLATFORM_DRIVER-INIT: load global config failed.") return drivers = GLOBALCONFIG.get("DRIVERLISTS", None) if drivers is None: - click.echo("%%WB_PLATFORM_DRIVER-INIT: load driver list failed.") + click.echo("%%PLATFORM_DRIVER-INIT: load driver list failed.") return for driver in drivers: delay = 0 name = "" + init = None if isinstance(driver, dict) and "delay" in driver: - name = driver.get("name") + name = driver.get("name", "") delay = driver["delay"] + init = driver.get("init", None) else: name = driver - adddriver(name, delay) + adddriver(name, delay, init) def blacklist_driver_remove(): diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_e2.py b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_e2.py index a3b7bb7c542..7848c12979d 100755 --- a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_e2.py +++ b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_e2.py @@ -31,6 +31,10 @@ import eepromutil.onietlv as ot from platform_config import PLATFORM_E2_CONF from platform_util import byteTostr, dev_file_read, exec_os_cmd +try: + from cpoutil import get_all_oe_vendor_info, get_all_rlm_vendor_info +except: + pass PYTHON_VERSION = sys.version_info.major GENERATE_RAWDATA_NUM = 0 @@ -980,6 +984,22 @@ def generate_eeprom_rawdata(file): return +def get_all_oe_rlm_vendor_info(): + try: + oe_vendor_info_dict = get_all_oe_vendor_info() + for oe_index, vendor_info in oe_vendor_info_dict.items(): + print("===================oe{}===================".format(oe_index)) + for key, value in vendor_info.items(): + print("{:40s} {}".format(key, value)) + rlm_vendor_info_dict = get_all_rlm_vendor_info() + for rlm_index, vendor_info in rlm_vendor_info_dict.items(): + print("===================rlm{}===================".format(rlm_index)) + for key, value in vendor_info.items(): + print("{:40s} {}".format(key, value)) + except Exception as e: + return + + @click.group(cls=AliasedGroup, invoke_without_command=True) @click.help_option('-h', '--help', help='show help info') @click.option('-p', '--parse', help='Parse eeprom rawdata of the specified path, support directory and file') @@ -1045,6 +1065,7 @@ def syseeprom(syseeprom_index): def all(): '''get all eeprom info''' get_all_eeprom_info() + get_all_oe_rlm_vendor_info() if __name__ == '__main__': diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_process.py b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_process.py index 3c76dd447a7..d782b57b0f6 100755 --- a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_process.py +++ b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_process.py @@ -175,6 +175,13 @@ def startSff_polling(): rets = getPid("sff_polling.py") if len(rets) == 0: log_os_system(cmd) + +def startMgmt_ledctrl(): + if STARTMODULE.get('mgmt_ledctrl', 0) == 1: + cmd = "nohup mgmt_ledctrl.py start > /dev/null 2>&1 &" + rets = getPid("mgmt_ledctrl.py") + if len(rets) == 0: + log_os_system(cmd) def generate_air_flow(): @@ -307,6 +314,12 @@ def stopSff_polling(): cmd = "kill " + ret log_os_system(cmd) +def stopMgmt_ledctrl(): + if STARTMODULE.get('mgmt_ledctrl', 0) == 1: + rets = getPid("mgmt_ledctrl.py") + for ret in rets: + cmd = "kill " + ret + log_os_system(cmd) def stopGenerate_air_flow(): if STARTMODULE.get('generate_airflow', 0) == 1: @@ -342,6 +355,7 @@ def otherinit_pre(): def unload_apps(): stopSff_polling() + stopMgmt_ledctrl() stopPMON_sys() stopSignalmonitor() stopIntelligentmonitor() @@ -396,6 +410,7 @@ def load_apps(): startSignalmonitor() startPMON_sys() startSff_polling() + startMgmt_ledctrl() otherinit() if STARTMODULE.get("macledreset", 0) == 1: MacLedSet("reset") diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_sensors_hal.py b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_sensors_hal.py index 7e505b59abe..c41b7ecb0b8 100755 --- a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_sensors_hal.py +++ b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_sensors_hal.py @@ -232,11 +232,11 @@ def print_boarddcdc(self): monitor_one_sensor_dict = OrderedDict() monitor_one_sensor_dict['id'] = sensor_key try: - monitor_one_sensor_dict['dcdc_input'] = float(sensor_info["Value"]) / 1000 + monitor_one_sensor_dict['dcdc_input'] = float(sensor_info["Value"]) monitor_one_sensor_dict['dcdc_unit'] = sensor_info["Unit"] - monitor_one_sensor_dict['dcdc_min'] = float(sensor_info["Min"]) / 1000 + monitor_one_sensor_dict['dcdc_min'] = float(sensor_info["Min"]) monitor_one_sensor_dict['dcdc_unit'] = sensor_info["Unit"] - monitor_one_sensor_dict['dcdc_max'] = float(sensor_info["Max"]) / 1000 + monitor_one_sensor_dict['dcdc_max'] = float(sensor_info["Max"]) monitor_one_sensor_dict['dcdc_unit'] = sensor_info["Unit"] monitor_one_sensor_dict["status"] = sensor_info["Status"] except Exception: diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_util.py b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_util.py index 2187b391a23..90e0988fc0d 100755 --- a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_util.py +++ b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_util.py @@ -27,10 +27,12 @@ import shutil import gzip import ast - +from typing import Tuple CONFIG_DB_PATH = "/etc/sonic/config_db.json" MAILBOX_DIR = "/sys/bus/i2c/devices/" +# bsp common log dir +BSP_COMMON_LOG_DIR = "/var/log/bsp_tech/" __all__ = [ @@ -62,7 +64,9 @@ "getSdkReg", "getMacTemp", "getMacTemp_sysfs", - "get_format_value" + "get_format_value", + "BSP_COMMON_LOG_DIR", + "setup_logger" ] class CodeVisitor(ast.NodeVisitor): @@ -258,6 +262,91 @@ def getplatform_name(): return getplatform_config_db() +def set_file_and_dir_permissions_if_root( + file_path: str, + dir_mode: int = 0o777, + file_mode: int = 0o666 +) -> Tuple[bool, str]: + """ + (Updated docstring) If the current user is root, atomically set permissions for the parent directory of the specified file (to `dir_mode`) + and the file itself (to `file_mode`). The operation is atomic: either both permissions are set successfully, or no changes are made. + + Parameters: + file_path (str): Absolute path to the file (e.g., /a/b/c.txt). + dir_mode (int): Permissions for the parent directory (default: 0o777, recommended for most directories). + file_mode (int): Permissions for the file (default: 0o666, recommended for most files). + + Returns: + Tuple[bool, str]: (True if successful, "Success") or (False if failed, detailed error message). + """ + # Check if the current user is root (only root can modify permissions of other users' files) + if os.geteuid() != 0: + return False, "Not running as root (requires root privileges)" + + # Check if the file path is absolute (relative paths may cause unexpected parent directory resolution) + if not os.path.isabs(file_path): + return False, "File path must be an absolute path (e.g., /a/b/c.txt)" + + # Check if the file exists (cannot set permissions for a non-existent file) + if not os.path.exists(file_path): + return False, f"File not found: {file_path} (verify the path is correct)" + + parent_dir = os.path.dirname(file_path) + + # Get the original permissions of the parent directory (to rollback if file permission setting fails) + try: + original_dir_stat = os.stat(parent_dir) + original_dir_mode = original_dir_stat.st_mode & 0o777 # Extract only the permission bits (ignore other flags) + except Exception as e: + return False, f"Failed to retrieve parent directory permissions: {str(e)}" + + # Attempt to set permissions for the parent directory + try: + os.chmod(parent_dir, dir_mode) + except Exception as e: + return False, f"Failed to set parent directory permissions: {str(e)}" + + # Attempt to set permissions for the file (rollback parent directory permissions if this fails) + try: + os.chmod(file_path, file_mode) + except Exception as e: + # Rollback: Restore the parent directory to its original permissions + try: + os.chmod(parent_dir, original_dir_mode) + except Exception as rollback_e: + return False, f"Failed to set file permissions (and rollback of parent directory permissions failed): {str(e)}; Rollback error: {str(rollback_e)}" + return False, f"Failed to set file permissions (parent directory permissions rolled back successfully): {str(e)}" + + return True, "Success" + +def setup_logger(log_file, max_bytes=1024*1024*5, backup_count=3, formatter_type="default"): + dir_path = os.path.dirname(log_file) + if not os.path.exists(dir_path): + os.makedirs(dir_path) + # creat logger + logger = logging.getLogger(log_file) + if not logger.hasHandlers(): + logger.setLevel(logging.INFO) + + # creat RotatingFileHandler set log file size and backupCount + handler = logging.handlers.RotatingFileHandler(log_file, maxBytes=max_bytes, backupCount=backup_count) + handler.setLevel(logging.DEBUG) + + # creat formatter and addd to handler + if formatter_type == "default": + formatter = logging.Formatter("%(asctime)s %(levelname)s %(filename)s[%(funcName)s][%(lineno)s]: %(message)s") + elif formatter_type == "simple": + formatter = logging.Formatter("%(message)s:%(asctime)s") + else: + formatter = logging.Formatter("%(asctime)s %(levelname)s %(filename)s[%(funcName)s][%(lineno)s]: %(message)s") + handler.setFormatter(formatter) + + logger.addHandler(handler) + + set_file_and_dir_permissions_if_root(log_file) + + return logger + def wbi2cget(bus, devno, address, word=None): if word is None: command_line = "i2cget -f -y %d 0x%02x 0x%02x " % (bus, devno, address) @@ -893,3 +982,11 @@ def get_format_value(format_str): ret = visitor.get_value() return ret +def log_to_file(content, log_file_path, max_size=5*1024*1024): + try: + logger = setup_logger(log_file_path, max_size) + logger.info(content) + + except Exception as e: + return False, (str(e) + "log_file_path[%s]" % log_file_path) + return True, "log_to_file success" diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/product_name.py b/platform/broadcom/sonic-platform-modules-micas/common/script/product_name.py new file mode 100644 index 00000000000..5c4011b1a25 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/script/product_name.py @@ -0,0 +1,187 @@ +#!/usr/bin/env python3 +# -*- coding: UTF-8 -*- +import os +import syslog +from platform_config import PRODUCT_NAME_CONF +from wbutil.baseutil import get_machine_info +from wbutil.baseutil import get_onie_machine +from wbutil.baseutil import get_sub_version + +BOARD_ID_PATH = "/sys/module/platform_common/parameters/dfd_my_type" +PRODUCT_DEBUG_FILE = "/etc/.product_debug_flag" +PRODUCT_RESULT_FILE = "/tmp/.productname" + +PRODUCTERROR = 1 +PRODUCTDEBUG = 2 + +debuglevel = 0 + + +def product_info(s): + syslog.openlog("PRODUCT", syslog.LOG_PID) + syslog.syslog(syslog.LOG_INFO, s) + + +def product_error(s): + syslog.openlog("PRODUCT", syslog.LOG_PID) + syslog.syslog(syslog.LOG_ERR, s) + + +def product_debug(s): + if PRODUCTDEBUG & debuglevel: + syslog.openlog("PRODUCT", syslog.LOG_PID) + syslog.syslog(syslog.LOG_DEBUG, s) + + +def product_debug_error(s): + if PRODUCTERROR & debuglevel: + syslog.openlog("PRODUCT", syslog.LOG_PID) + syslog.syslog(syslog.LOG_ERR, s) + + +def debug_init(): + global debuglevel + try: + with open(PRODUCT_DEBUG_FILE, "r") as fd: + value = fd.read() + debuglevel = int(value) + except Exception: + debuglevel = 0 + + +def get_td4_mac_id(loc): + if not os.path.exists(loc): + msg = "mac id path: %s, not exists" % loc + product_error(msg) + return False, msg + with open(loc) as fd: + id_str = fd.read().strip() + mac_id = "0x%x" % int(id_str, 10) + return True, mac_id + + +def get_func_value(funcname, params=None): + try: + allowed_func_map = { + "get_td4_mac_id": get_td4_mac_id, + "get_product_name_default": get_product_name_default, + "get_board_id_default": get_board_id_default, + } + func = allowed_func_map.get(funcname) + if func is None: + msg = "unsupported funcname: %s" % funcname + product_error(msg) + return False, msg + + if params is not None: + result = func(params) + else: + result = func() + + if isinstance(result, tuple) and len(result) == 2: + status, ret = result + else: + status, ret = True, result + return status, ret + except Exception as e: + product_error(str(e)) + return False, str(e) + + +def get_product_name_default(): + onie_machine = get_onie_machine(get_machine_info()) + if onie_machine is not None: + ret = onie_machine.strip().split("_", 1) + if len(ret) != 2: + product_error("unknow onie machine: %s" % onie_machine) + return None + product_name = ret[1] + product_debug("get product name: %s success" % product_name) + return product_name + product_error("onie machine is None, can't get product name") + return None + + +def get_board_id_default(): + if not os.path.exists(BOARD_ID_PATH): + product_error("board id path: %s, not exists" % BOARD_ID_PATH) + return None + with open(BOARD_ID_PATH) as fd: + id_str = fd.read().strip() + return "0x%x" % int(id_str, 10) + + +def deal_method(method): + try: + gettype = method.get("gettype") + if gettype == "config": + result = method.get("value") + product_debug("get info use config value: %s" % result) + return True, result + + if gettype == "func": + funcname = method.get("funcname") + params = method.get("params") + status, ret = get_func_value(funcname, params) + if status is False: + product_error("get info func: %s, params: %s failed, ret: %s" % (funcname, params, ret)) + return status, ret + decode_val = method.get("decode") + result = decode_val.get(ret) if decode_val is not None else ret + product_debug("get info func: %s, params: %s, ret: %s, result: %s" % (funcname, params, ret, result)) + return True, result + + msg = "unsupport get info method: %s " % gettype + product_error(msg) + return False, msg + except Exception as e: + return False, str(e) + + +def get_product_name(): + get_product_name_method = PRODUCT_NAME_CONF.get("get_product_name_method") + if get_product_name_method is None: + product_name = get_product_name_default() + product_debug("get product name use default method, product name: %s" % product_name) + return product_name + + status, ret = deal_method(get_product_name_method) + if status is False: + product_error("get product name faield, msg: %s" % ret) + return None + product_debug("get product name success, product name: %s" % ret) + return ret + + +def get_board_id(): + get_board_id_method = PRODUCT_NAME_CONF.get("get_board_id_method") + if get_board_id_method is None: + board_id = get_board_id_default() + product_debug("get board id use default method, board id: %s" % board_id) + return board_id + + status, ret = deal_method(get_board_id_method) + if status is False: + product_error("get board id faield, msg: %s" % ret) + return None + product_debug("get board id success, board id: %s" % ret) + return ret + + +def save_product_name(): + product_name = get_product_name() + board_id = get_board_id() + sub_ver = get_sub_version() + if sub_ver != "NA": + name = "%s_%s_%s\n" % (product_name, board_id, sub_ver) + else: + name = "%s_%s\n" % (product_name, board_id) + product_info("save product name: %s" % name) + with open(PRODUCT_RESULT_FILE, "w") as fd: + fd.write(name) + + +if __name__ == '__main__': + debug_init() + product_debug("enter main") + save_product_name() diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/saphy_script.sh b/platform/broadcom/sonic-platform-modules-micas/common/script/saphy_script.sh new file mode 100644 index 00000000000..1878655a682 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/script/saphy_script.sh @@ -0,0 +1,136 @@ +#!/bin/bash + +start() { + BDIR="/usr/share/sonic/device" + CURDEV="$(cat /host/machine.conf | grep onie_platform)" + DB_CONF_FILE="/var/run/redis/sonic-db/database_config.json" + array=(${CURDEV//=/ }) + PLTF=${array[1]} + DEVDIR=${BDIR}"/"${PLTF} + def_sku=${DEVDIR}"/default_sku" + cur_sku=${DEVDIR}"/current_sku" + SKU="" + + if [ ! -e "/usr/local/bin/saphy" ]; then + echo "Error: /usr/local/bin/saphy not found" + exit 0 + fi + + echo "Waiting for $DB_CONF_FILE to be ready..." + WAIT_TIME=0 + MAX_WAIT=10 + while [ ! -f "$DB_CONF_FILE" ] && [ $WAIT_TIME -lt $MAX_WAIT ]; do + sleep 1 + WAIT_TIME=$((WAIT_TIME + 1)) + echo "Waiting... ${WAIT_TIME}s / ${MAX_WAIT}s" + done + + if [ -f "$DB_CONF_FILE" ]; then + echo "$DB_CONF_FILE found. Proceeding..." + else + echo "Warning: $DB_CONF_FILE not found after ${MAX_WAIT} seconds, continuing anyway..." + fi + + if type config-hwsku.sh >/dev/null 2>&1; then + SKU="" + RETRY_COUNT=0 + MAX_RETRIES=10 + + echo "Trying to get SKU via config-hwsku.sh -p..." + while [ -z "$SKU" ] && [ $RETRY_COUNT -lt $MAX_RETRIES ]; do + SKU="$(config-hwsku.sh -p 2>/dev/null | xargs)" + if [ -n "$SKU" ]; then + echo "config-hwsku.sh get sku: ${SKU}" + break + fi + RETRY_COUNT=$((RETRY_COUNT + 1)) + if [ $RETRY_COUNT -lt $MAX_RETRIES ]; then + echo "Failed to get SKU (attempt ${RETRY_COUNT}/${MAX_RETRIES}), retrying in 1 second..." + sleep 1 + fi + done + + if [ -z "$SKU" ]; then + echo "Warning: Failed to get SKU via config-hwsku.sh after ${MAX_RETRIES} attempts" + fi + fi + + if [ -z "$SKU" ]; then + echo "Falling back to file-based SKU detection..." + if test -e "$cur_sku"; then + sku=${cur_sku} + echo "cur_sku: ${sku}" + elif test -e "$def_sku"; then + sku=${def_sku} + echo "def_sku: ${sku}" + else + echo "Error: sku file not found !!!" + exit 1 + fi + t="$(cat ${sku})" + array=(${t// / }) + SKU=${array[0]} + echo "Got SKU from file: ${SKU}" + fi + + if [ -z "$SKU" ]; then + echo "Error: Failed to get SKU from any source" + exit 1 + fi + + hwsku_dir="/usr/share/sonic/hwsku" + target_path="${BDIR}/${PLTF}/${SKU}" + + if [ ! -d "$target_path" ]; then + echo "Error: Target path not found: $target_path" + exit 1 + fi + + if [ -e "$hwsku_dir" ] || [ -L "$hwsku_dir" ]; then + echo "Removing existing $hwsku_dir" + rm -rf "$hwsku_dir" + fi + + echo "Creating symlink: $hwsku_dir -> $target_path" + ln -s "$target_path" "$hwsku_dir" + + if [ ! -L "$hwsku_dir" ]; then + echo "Error: Failed to create symlink" + exit 1 + fi + + platform_dir="/usr/share/sonic/platform" + target_platform_path="${BDIR}/${PLTF}" + + if [ -e "$platform_dir" ] || [ -L "$platform_dir" ]; then + echo "Removing existing $platform_dir" + rm -rf "$platform_dir" + fi + + ln -s "$target_platform_path" "$platform_dir" + + echo "Starting /usr/local/bin/saphy..." + sleep 1 + /usr/local/bin/saphy service +} + +wait() { + echo "wait /usr/local/bin/saphy..." +} + +stop() { + echo "Stopping /usr/local/bin/saphy..." + pkill -f "/usr/local/bin/saphy" 2>/dev/null + echo "Stopped /usr/local/bin/saphy..." + exit 0 +} + +case "$1" in + start|wait|stop) + $1 + ;; + *) + echo "Usage: $0 {start|wait|stop}" + exit 1 + ;; +esac diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/sfp_highest_temperatue.py b/platform/broadcom/sonic-platform-modules-micas/common/script/sfp_highest_temperatue.py index 21e14b04887..24ef71002c1 100755 --- a/platform/broadcom/sonic-platform-modules-micas/common/script/sfp_highest_temperatue.py +++ b/platform/broadcom/sonic-platform-modules-micas/common/script/sfp_highest_temperatue.py @@ -22,7 +22,7 @@ import subprocess import fcntl -sfp_temperature_file = "/tmp/highest_sff_temp" +sfp_temperature_file = "/etc/sonic/highest_sff_temp" SFP_TEMP_DEBUG_FILE = "/etc/.sfp_temp_debug_flag" SFP_TEMP_RECORD_DEBUG = 1 diff --git a/platform/broadcom/sonic-platform-modules-micas/common/service/platform_base.service b/platform/broadcom/sonic-platform-modules-micas/common/service/platform_base.service new file mode 100644 index 00000000000..efdc23f8457 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/service/platform_base.service @@ -0,0 +1,13 @@ +[Unit] +Description= Global Initialize platform base. +After=local-fs.target +Before=platform_driver.service +#DefaultDependencies=no + +[Service] +Type=oneshot +ExecStart=/usr/local/bin/platform_base.py +RemainAfterExit=yes + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-micas/common/service/platform_driver.service b/platform/broadcom/sonic-platform-modules-micas/common/service/platform_driver.service index 08a49d695c9..f583f0e4f79 100644 --- a/platform/broadcom/sonic-platform-modules-micas/common/service/platform_driver.service +++ b/platform/broadcom/sonic-platform-modules-micas/common/service/platform_driver.service @@ -1,7 +1,8 @@ [Unit] Description= Global Initialize platform drivers. -After=local-fs.target +After=local-fs.target platform_base.service Before=pmon.service platform_process.service +Requires=platform_base.service #DefaultDependencies=no [Service] @@ -12,4 +13,3 @@ RemainAfterExit=yes [Install] WantedBy=multi-user.target - diff --git a/platform/broadcom/sonic-platform-modules-micas/common/service/saphy.service b/platform/broadcom/sonic-platform-modules-micas/common/service/saphy.service new file mode 100644 index 00000000000..d80dd3d860f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/service/saphy.service @@ -0,0 +1,15 @@ +[Unit] +Description=saphy service +After=platform_driver.service +Requires=platform_driver.service + +[Service] +ExecStart=/usr/local/bin/saphy_script.sh start +ExecStop=/usr/local/bin/saphy_script.sh stop +KillMode=process +Restart=on-failure +RestartSec=60s +SuccessExitStatus=TERM + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/chassis.py b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/chassis.py index 8f07567207a..8ca740d64de 100644 --- a/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/chassis.py +++ b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/chassis.py @@ -19,7 +19,9 @@ import time import sys from sonic_platform_base.chassis_base import ChassisBase + from sonic_platform_base.sonic_xcvr.bailly_optoe_base import get_cpo_json_data from sonic_platform.sfp import Sfp + from sonic_platform.cpo import CPO from sonic_platform.psu import Psu # from sonic_platform.fan import Fan from sonic_platform.fan_drawer import FanDrawer @@ -27,7 +29,7 @@ # from sonic_platform.watchdog import Watchdog from sonic_platform.component import Component from sonic_platform.eeprom import Eeprom - from sonic_platform.dcdc import Dcdc + from sonic_platform.dcdc import Dcdc, VoltageSensor, CurrentSensor from plat_hal.baseutil import baseutil from plat_hal.interface import interface @@ -57,29 +59,42 @@ def __init__(self): self._dcdc_list = [] self.int_case = interface() # Initialize SFP list + if get_cpo_json_data(): + self._ports_config = get_cpo_json_data().get("interfaces", None) + self._oes_config = get_cpo_json_data().get("oes", None) # oe_config from cpo.json + self._cpo_eeprom_mode = get_cpo_json_data().get("cpo_eeprom_mode", "joint") + self._elss_config = get_cpo_json_data().get("elss", None) # ELS from cpo.json + self._init_port_mappings() + else: + # sfp.py will read eeprom contents and retrive the eeprom data. + # It will also provide support sfp controls like reset and setting + # low power mode. + # We pass the eeprom path and sfp control path from chassis.py + # So that sfp.py implementation can be generic to all platforms + try: + self._sfp_list = [] + self.port_num = baseutil.get_config().get("sfps", None).get("port_num", 0) + self.port_start_index = baseutil.get_config().get("sfps", None).get("port_index_start", 0) + # fix problem with first index is 1, we add a fake sfp node + if self.port_start_index == 1: + self._sfp_list.append(Sfp(1)) + + sfp_config = baseutil.get_config().get("sfps", {}) + logical_to_physical_sfp_map = sfp_config.get("logical_to_physical_sfp_map", {}) + + # sfp id always start at 1 + for index in range(1, self.port_num + 1): + physical_index = logical_to_physical_sfp_map.get(index, logical_to_physical_sfp_map.get(str(index), index)) + if physical_index != index: + self._sfp_list.append(self._sfp_list[physical_index - 1]) + else: + self._sfp_list.append(Sfp(index)) - # sfp.py will read eeprom contents and retrive the eeprom data. - # It will also provide support sfp controls like reset and setting - # low power mode. - # We pass the eeprom path and sfp control path from chassis.py - # So that sfp.py implementation can be generic to all platforms - try: - self._sfp_list = [] - self.port_num = baseutil.get_config().get("sfps", None).get("port_num", 0) - self.port_start_index = baseutil.get_config().get("sfps", None).get("port_index_start", 0) - # fix problem with first index is 1, we add a fake sfp node - if self.port_start_index == 1: - self._sfp_list.append(Sfp(1)) - - # sfp id always start at 1 - for index in range(1, self.port_num + 1): - self._sfp_list.append(Sfp(index)) - - for i in range(self.port_start_index, self.port_start_index + self.port_num): - self.sfp_present_dict[i] = self.STATUS_REMOVED + for i in range(self.port_start_index, self.port_start_index + self.port_num): + self.sfp_present_dict[i] = self.STATUS_REMOVED - except Exception as err: - print("SFP init error: %s" % str(err)) + except Exception as err: + print("SFP init error: %s" % str(err)) try: self._eeprom = Eeprom(self.int_case) @@ -110,9 +125,23 @@ def __init__(self): self._component_list.append(componentobj) dcdc_num = self.int_case.get_dcdc_total_number() + vol_index = 1 + curr_index = 1 for index in range(dcdc_num): dcdcobj = Dcdc(self.int_case, index + 1) self._dcdc_list.append(dcdcobj) + dcdc_id = "DCDC" + str(index + 1) + dcdc_unit = self.int_case.get_dcdc_unit_by_id(dcdc_id) + + if dcdc_unit == "V" or dcdc_unit == "mV": + volobj = VoltageSensor(self.int_case, index + 1, vol_index) + self._voltage_sensor_list.append(volobj) + vol_index += 1 + + if dcdc_unit == "A" or dcdc_unit == "mA": + currobj = CurrentSensor(self.int_case, index + 1, curr_index) + self._current_sensor_list.append(currobj) + curr_index += 1 def get_name(self): """ @@ -247,6 +276,30 @@ def get_status_led(self): return color return 'N/A' + def set_uid_led(self, color): + """ + Sets the state of the system UID LED + + Args: + color: A string representing the color with which to set the + system UID LED + + Returns: + bool: True if system LED state is set successfully, False if not + """ + return False + + def get_uid_led(self): + """ + Gets the state of the system UID LED + + Returns: + A string, one of the valid LED color strings which could be vendor + specified. + """ + return 'N/A' + + def get_base_mac(self): """ Retrieves the base MAC address for the chassis @@ -431,11 +484,23 @@ def get_change_event(self, timeout=0): try: while timeout >= 0: # check for sfp - sfp_change_dict = self.get_transceiver_change_event() + try: + sfp_change_dict = self.get_transceiver_change_event() + except Exception as e: + sfp_change_dict = {} + print("get_transceiver_change_event exception: %s" % e) # check for fan - fan_change_dict = self.get_fan_change_event() + try: + fan_change_dict = self.get_fan_change_event() + except Exception as e: + fan_change_dict = {} + print("get_fan_change_event exception: %s" % e) # check for voltage - voltage_change_dict = self.get_voltage_change_event() + try: + voltage_change_dict = self.get_voltage_change_event() + except Exception as e: + voltage_change_dict = {} + print("get_voltage_change_event exception: %s" % e) if sfp_change_dict or fan_change_dict or voltage_change_dict: change_event_dict["sfp"] = sfp_change_dict @@ -453,7 +518,7 @@ def get_change_event(self, timeout=0): time.sleep(timeout) return True, change_event_dict except Exception as e: - print(e) + print("get_change_event exception: %s" % e) print("get_change_event: Should not reach here.") return False, change_event_dict @@ -517,7 +582,13 @@ def get_voltage_change_event(self): value = dcdc.get_value() high = dcdc.get_high_threshold() low = dcdc.get_low_threshold() - if (value is None) or (value > high) or (value < low): + + # Hot-plug may temporarily return non-numeric values (e.g. "N/A"). Transfer potentially non-numeric values to None or float, and let the following logic to determine the status. + value_num = None if value is None else float(value) + high_num = None if high is None else float(high) + low_num = None if low is None else float(low) + + if (value_num is None) or ((high_num is not None) and (value_num > high_num)) or ((low_num is not None) and (value_num < low_num)): current_voltage_status_dict[name] = self.STATUS_ABNORMAL else: current_voltage_status_dict[name] = self.STATUS_NORMAL @@ -536,4 +607,23 @@ def get_voltage_change_event(self): self.voltage_status_dict = current_voltage_status_dict return ret_dict - + def is_cpo_device(self): + return self._oes_config is not None and len(self._oes_config) > 0 + + def _init_port_mappings(self): + self._sfp_list = [] + # fix problem with first index is 1, we add a fake sfp node, xcvrd get start at 1,not 0 + self.port_num = len(self._ports_config) + self.port_start_index = 1 + self._sfp_list.append(Sfp(1)) + + for eth_name, eth_info in self._ports_config.items(): + port_id = eth_info.get("index", 0).split(",")[0] + oe_id = eth_info.get("oe_id", None) + if oe_id != None: # cpo port + oe_bank_id= eth_info.get("oe_bank_id", None) + els_id = eth_info.get("els_id", None) + els_bank_id = eth_info.get("els_bank_id", None) + self._sfp_list.append(CPO(port_id, oe_id, oe_bank_id, els_id, els_bank_id)) + else: # None cpo port + self._sfp_list.append(Sfp(port_id)) diff --git a/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/cpo.py b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/cpo.py new file mode 100644 index 00000000000..0e7106af364 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/cpo.py @@ -0,0 +1,253 @@ +#!/usr/bin/python +# +# Copyright (C) 2024 Micas Networks Inc. +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +############################################################################# + +try: + import os + import logging + import math + from logging.handlers import RotatingFileHandler + from platform_intf import * + from sonic_platform_base.sonic_xcvr.bailly_optoe_base import CpoOptoeBase, get_cpo_json_data + from sonic_platform_base.sonic_xcvr.api.broadcom.bailly_rlm import BaillyApi + from sonic_platform_base.sonic_xcvr.mem_maps.broadcom.bailly_rlm import BaillyMemMap + from sonic_platform_base.sonic_xcvr.codes.broadcom.bailly_rlm import BaillyCodes + from sonic_platform_base.sonic_xcvr.xcvr_eeprom import XcvrEeprom + +except ImportError as error: + raise ImportError(str(error) + "- required module not found") from error + +OE_BANK_NUM = 8 + +LOG_TRACE_LEVEL = 0 +LOG_DEBUG_LEVEL = 1 +LOG_WARNING_LEVEL = 2 +LOG_ERROR_LEVEL = 3 + +class CPO(CpoOptoeBase): + def __init__(self, index, oe_id, oe_bank_id, els_id, els_bank_id): + super().__init__() + self._port_id = index + self._oe_id = oe_id + self._oe_bank_id = oe_bank_id + self._els_id = els_id + self._els_bank_id= els_bank_id + # need after _oe_bank_id init + self._log_level_config = logging.ERROR + self._setup_logging() + self.remove_xcvr_api() + self.get_xcvr_api() + self._cpolog(LOG_DEBUG_LEVEL, "cpo__init__ {},{},{}, {},{} ". + format(self._oe_id, self._port_id, self._oe_bank_id, self._els_id, self._els_bank_id)) + self.check_and_set_eeprom_bank_size() + + + def get_xcvr_api(self): + """ + Retrieves the XcvrApi associated with this SFP + + Returns: + An object derived from XcvrApi that corresponds to the SFP + """ + els_base_page = self.get_els_base_page() + loc_bank = int(self._oe_bank_id % OE_BANK_NUM) + self._cpolog(LOG_DEBUG_LEVEL, "get_xcvr_api bailly {},{},bank:{},{}, {},{} els_base_page:{}". + format(self._oe_id, self._port_id, self._oe_bank_id, loc_bank, self._els_id, self._els_bank_id, els_base_page)) + oe_xcvr_eeprom = XcvrEeprom(self.read_eeprom, self.write_eeprom, BaillyMemMap(BaillyCodes, bank=loc_bank, base_page=els_base_page)) + self._xcvr_api = BaillyApi(oe_xcvr_eeprom) + return self._xcvr_api + + def get_oe_eeprom_bank_size_path(self): + cpo_bus = self.get_oes_config().get("oe_cmis_path", None) + return cpo_bus + "max_bank_size" if cpo_bus is not None else None + + def get_eeprom_bank_size(self): + try: + bank_size_path = self.get_oe_eeprom_bank_size_path() + with open(bank_size_path, 'r', encoding='utf-8') as f: + content = f.read().strip() + return int(content) + except Exception as e: + return None + + def set_eeprom_bank_size(self, value): + try: + bank_size_path = self.get_oe_eeprom_bank_size_path() + with open(bank_size_path, 'w', encoding='utf-8') as f: + f.write(str(value)) + self._cpolog(LOG_DEBUG_LEVEL, f"set bank_size: {self._port_id}, {value}") + return True + except Exception as e: + self._cpolog(LOG_ERROR_LEVEL, f"set bank_size fail: {self._port_id}, {e}") + return False + + def check_and_set_eeprom_bank_size(self): + current_val = self.get_eeprom_bank_size() + if current_val is None: + self._cpolog(LOG_ERROR_LEVEL, f"bank_size is none: {self._port_id}") + return False + + api = self.get_xcvr_api() + api_size = api.get_max_supported_banks() + self._cpolog(LOG_DEBUG_LEVEL, f"max api_size is: {api_size}") + size_advt = api_size + if current_val == size_advt: + self._cpolog(LOG_DEBUG_LEVEL, f"bank_size is ok: {self._port_id}") + return True + else: + self._cpolog(LOG_DEBUG_LEVEL, f"bank_size cur: {self._port_id}, {current_val}, set:{size_advt}") + return self.set_eeprom_bank_size(size_advt) + + def get_eeprom_path(self): + return self.get_oe_eeprom_path() + + def _setup_logging(self): + log_dir = "/var/log/cpo" + os.makedirs(log_dir, exist_ok=True) + log_file = os.path.join(log_dir, "cpo_syslog.log") + + self.logger = logging.getLogger("cpo") + self.logger.setLevel(self._log_level_config) + + self.logger.propagate = False + + if not self.logger.handlers: + handler = RotatingFileHandler( + log_file, + maxBytes=10 * 1024 * 1024, + backupCount=5, + encoding='utf-8' + ) + formatter = logging.Formatter( + '[%(asctime)s] [%(levelname)s] %(message)s', + datefmt='%Y-%m-%d %H:%M:%S' + ) + handler.setFormatter(formatter) + self.logger.addHandler(handler) + + def _cpolog(self, log_level, msg): + try: + if log_level == LOG_DEBUG_LEVEL: + self.logger.debug(msg) + elif log_level == LOG_WARNING_LEVEL: + self.logger.warning(msg) + elif log_level == LOG_ERROR_LEVEL: + self.logger.error(msg) + else: + self.logger.info(msg) + except Exception as e: + print(f"write_log_failed: {e}") + import traceback + traceback.print_exc() + + def get_port_laser_ids(self): + ports_config = get_cpo_json_data().get("interfaces", None) + for eth_name, eth_info in ports_config.items(): + port_id = eth_info.get("index", 0).split(",")[0] + if port_id == self._port_id: + return eth_info.get("laser_ids", None) + return None + + def get_transceiver_dom_real_value(self): + info = super().get_transceiver_dom_real_value() + if info is None: + info = {} + + api = self.get_xcvr_api() + if api is None: + return info + + rlm_monitors = api.get_rlm_monitor_values() + if rlm_monitors: + info.update({ + key: value for key, value in rlm_monitors.items() + if value is not None + }) + + try: + els_laser_ids = self.get_port_laser_ids() + if els_laser_ids is None: + return info + + # add laser current info + laser_current = api.get_rlm_laser_current() + if not laser_current: + self._cpolog(LOG_ERROR_LEVEL, f"get_rlm_laser_current error: {self._port_id}: {els_laser_ids}") + return info + + laser_power = api.get_rlm_laser_power() + if not laser_power: + self._cpolog(LOG_ERROR_LEVEL, f"get_rlm_laser_power error: {self._port_id}: {els_laser_ids}") + return info + + for idx in els_laser_ids: + if idx < 0 or idx >= len(laser_current) or idx >= len(laser_power): + self._cpolog(LOG_ERROR_LEVEL, f"rlm_laser_ids idx error: {self._port_id}: {els_laser_ids}") + continue + + current_key = f"Laser{idx}CurrentMonitor" + if current_key not in laser_current: + self._cpolog(LOG_ERROR_LEVEL, f"current key not found: {current_key}") + continue + current_val = laser_current[current_key] + if isinstance(current_val, dict): + current_val = current_val.get(current_key) + if current_val is None: + self._cpolog(LOG_ERROR_LEVEL, f"current value not found: {current_key}") + continue + current_str = f"{current_val} mA" + + power_key = f"Laser{idx}OpticalPowerMonitor" + if power_key not in laser_power: + self._cpolog(LOG_ERROR_LEVEL, f"power key not found: {power_key}") + continue + PmW = laser_power[power_key] + if isinstance(PmW, dict): + PmW = PmW.get(power_key) + if PmW is None: + self._cpolog(LOG_ERROR_LEVEL, f"power value not found: {power_key}") + continue + if PmW > 0: + Pdb = 10 * math.log(PmW, 10) + else: + Pdb = -40 + power_str = '%.03f mW %.03f dBm' % (PmW, Pdb) + + info.update({f"RLM{self._els_id}_Laser{idx}_current" : current_str}) + info.update({f"RLM{self._els_id}_Laser{idx}_power" : power_str}) + except Exception as e: + self._cpolog(LOG_ERROR_LEVEL, f"get_rlm_laser_monitor error: {self._port_id}: {e}") + + self._cpolog(LOG_DEBUG_LEVEL, f"dom real info: {info}") + return info + + def check_fiber_dirty(self): + pass + def check_calibration(self): + pass + def is_els_power_sufficient(self): + pass + def is_calibration_checked(self): + pass + def is_fiber_checked(self): + pass + def is_els_tx_on(self): + pass + def is_els_tx_enabled(self): + pass + diff --git a/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/dcdc.py b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/dcdc.py index 920f4c2d3f6..c67940fcd1b 100644 --- a/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/dcdc.py +++ b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/dcdc.py @@ -16,9 +16,9 @@ # along with this program. If not, see . import time +from sonic_platform_base.sensor_base import SensorBase - -class Dcdc(object): +class Dcdc(SensorBase): def __init__(self, interface_obj, index): self.dcdc_dict = {} @@ -26,6 +26,12 @@ def __init__(self, interface_obj, index): self.index = index self.update_time = 0 self.dcdc_id = "DCDC" + str(index) + self.minimum = None + self.maximum = None + + @classmethod + def get_type(cls): + return "SENSOR_TYPE" def dcdc_dict_update(self): local_time = time.time() @@ -33,6 +39,76 @@ def dcdc_dict_update(self): self.update_time = local_time self.dcdc_dict = self.int_case.get_dcdc_by_id(self.dcdc_id) + def get_presence(self): + """ + Retrieves the presence of the device + + Returns: + bool: True if device is present, False if not + """ + return True + + def get_model(self): + """ + Retrieves the model number (or part number) of the device + + Returns: + string: Model/part number of device + """ + return "N/A" + + def get_serial(self): + """ + Retrieves the serial number of the device + + Returns: + string: Serial number of device + """ + return "N/A" + + def get_revision(self): + """ + Retrieves the hardware revision of the device + + Returns: + string: Revision value of device + """ + return "N/A" + + def get_status(self): + """ + Retrieves the operational status of the device + + Returns: + A boolean value, True if device is operating properly, False if not + """ + self.dcdc_dict_update() + if self.dcdc_dict["Max"] is not None and self.dcdc_dict["Value"] > self.dcdc_dict["Max"]: + return False + + if self.dcdc_dict["Min"] is not None and self.dcdc_dict["Value"] < self.dcdc_dict["Min"]: + return False + + return True + + def get_position_in_parent(self): + """ + Retrieves 1-based relative physical position in parent device. If the agent cannot determine the parent-relative position + for some reason, or if the associated value of entPhysicalContainedIn is '0', then the value '-1' is returned + Returns: + integer: The 1-based relative physical position in parent device or -1 if cannot determine the position + """ + return self.index + + def is_replaceable(self): + """ + Indicate whether this device is replaceable. + Returns: + bool: True if it is replaceable. + """ + return False + + def get_name(self): """ Retrieves the name of the sensor @@ -43,15 +119,31 @@ def get_name(self): self.dcdc_dict_update() return self.dcdc_dict["Name"] + def get_unit(self): + """ + Retrieves unit of measurement reported by sensor + + Returns: + Sensor measurement unit + """ + return self.int_case.get_dcdc_unit_by_id(self.dcdc_id) + def get_value(self): """ Retrieves current value reading from sensor """ self.dcdc_dict_update() - value = self.dcdc_dict["Value"] - if value is None: - value = 0 - return round(float(value), 3) + tmp_value = self.dcdc_dict["Value"] + if tmp_value is None or tmp_value == self.int_case.error_ret: + return "N/A" + value = round(float(tmp_value), 3) + if self.minimum is None or value < self.minimum: + self.minimum = value + + if self.maximum is None or value > self.maximum: + self.maximum = value + + return value def get_high_threshold(self): """ @@ -59,8 +151,8 @@ def get_high_threshold(self): """ self.dcdc_dict_update() value = self.dcdc_dict["High"] - if value is None: - value = 0 + if value is None or value == self.int_case.error_ret: + return self.get_high_critical_threshold() return round(float(value), 3) def get_low_threshold(self): @@ -69,18 +161,43 @@ def get_low_threshold(self): """ self.dcdc_dict_update() value = self.dcdc_dict["Low"] - if value is None: - value = 0 + if value is None or value == self.int_case.error_ret: + return self.get_low_critical_threshold() return round(float(value), 3) + def set_high_threshold(self, value): + """ + Sets the high threshold value of sensor + + Args: + value: High threshold value to set + + Returns: + A boolean, True if threshold is set successfully, False if not + """ + return False + + def set_low_threshold(self, value): + """ + Sets the low threshold value of sensor + + Args: + value: Value + + Returns: + A boolean, True if threshold is set successfully, False if not + """ + return False + + def get_high_critical_threshold(self): """ Retrieves the high critical threshold temperature of sensor """ self.dcdc_dict_update() value = self.dcdc_dict["Max"] - if value is None: - value = 0 + if value is None or value == self.int_case.error_ret: + return "N/A" return round(float(value), 3) def get_low_critical_threshold(self): @@ -89,6 +206,92 @@ def get_low_critical_threshold(self): """ self.dcdc_dict_update() value = self.dcdc_dict["Min"] - if value is None: - value = 0 + if value is None or value == self.int_case.error_ret: + return "N/A" return round(float(value), 3) + + def set_high_critical_threshold(self, value): + """ + Sets the critical high threshold value of sensor + + Args: + value: Critical high threshold Value + + Returns: + A boolean, True if threshold is set successfully, False if not + """ + return False + + def set_low_critical_threshold(self, value): + """ + Sets the critical low threshold value of sensor + + Args: + value: Critial low threshold Value + + Returns: + A boolean, True if threshold is set successfully, False if not + """ + return False + + def get_minimum_recorded(self): + """ + Retrieves the minimum recorded value of sensor + + Returns: + The minimum recorded value of sensor + """ + if self.minimum is None: + self.get_value() + if self.minimum is None: + return "N/A" + return self.minimum + + def get_maximum_recorded(self): + """ + Retrieves the maximum recorded value of sensor + + Returns: + The maximum recorded value of sensor + """ + if self.maximum is None: + self.get_value() + if self.maximum is None: + return "N/A" + return self.maximum + +class VoltageSensor(Dcdc): + def __init__(self, interface_obj, dcdc_index, vol_index): + super(VoltageSensor, self).__init__(interface_obj, dcdc_index) + self.index = vol_index + + @classmethod + def get_type(cls): + return "SENSOR_TYPE_VOLTAGE" + + def get_position_in_parent(self): + """ + Retrieves 1-based relative physical position in parent device. If the agent cannot determine the parent-relative position + for some reason, or if the associated value of entPhysicalContainedIn is '0', then the value '-1' is returned + Returns: + integer: The 1-based relative physical position in parent device or -1 if cannot determine the position + """ + return self.index + +class CurrentSensor(Dcdc): + def __init__(self, interface_obj, dcdc_index, curr_index): + super(CurrentSensor, self).__init__(interface_obj, dcdc_index) + self.index = curr_index + + @classmethod + def get_type(cls): + return "SENSOR_TYPE_CURRENT" + + def get_position_in_parent(self): + """ + Retrieves 1-based relative physical position in parent device. If the agent cannot determine the parent-relative position + for some reason, or if the associated value of entPhysicalContainedIn is '0', then the value '-1' is returned + Returns: + integer: The 1-based relative physical position in parent device or -1 if cannot determine the position + """ + return self.index diff --git a/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/psu.py b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/psu.py index da9d1883a3b..f62510130e3 100644 --- a/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/psu.py +++ b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/psu.py @@ -70,7 +70,7 @@ def get_name(self): Returns: string: The name of the device """ - return "PSU {}".format(self.index) + return "PSU{}".format(self.index) def get_presence(self): """ diff --git a/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/sfp.py b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/sfp.py index 847a9215387..70cb92eb5b8 100644 --- a/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/sfp.py +++ b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/sfp.py @@ -104,6 +104,9 @@ def get_eeprom_path(self): def read_eeprom(self, offset, num_bytes): return self._sfp_api.read_eeprom(offset, num_bytes) + def write_eeprom(self, offset, num_bytes, write_buffer): + return self._sfp_api.write_eeprom(offset, num_bytes, write_buffer) + def set_power_class(self): try: if self.sfp_type is None: @@ -122,9 +125,6 @@ def set_power_class(self): except Exception as e: print(traceback.format_exc()) - def write_eeprom(self, offset, num_bytes, write_buffer): - return self._sfp_api.write_eeprom(offset, num_bytes, write_buffer) - def get_presence(self): presence = self._sfp_api.get_presence() if (presence == True) and (self.presence != True): @@ -679,35 +679,44 @@ def _get_sfp_cpld_info(self, cpld_config): class SfpV2(SfpCust): def _init_config(self, index): super()._init_config(index) - # init eeprom path sfp_config = baseutil.get_config().get("sfps", None) - eeprom_path_config = sfp_config.get("eeprom_path", None) - eeprom_path_key = sfp_config.get("eeprom_path_key")[self._port_id - 1] - self.eeprom_path = None if eeprom_path_config is None else eeprom_path_config % ( - eeprom_path_key, eeprom_path_key) - self._sfplog(LOG_DEBUG_LEVEL, "Done init eeprom path: %s" % self.eeprom_path) + self.bp_port_list = self._convert_str_range_to_int_arr(sfp_config.get("bp_port_list", None)) + # init eeprom path + # "/sys/s3ip/transceiver/eth%d/eeprom" + path_config = sfp_config.get("eeprom_path", None) + if path_config is not None and self._port_id not in self.bp_port_list: + self.eeprom_path = path_config % (self._port_id) + else: + self.eeprom_path = None + self._sfplog(LOG_DEBUG_LEVEL, "Done init port %d eeprom path: %s" % (self._port_id, self.eeprom_path)) # init presence path - self.presence_path = None if sfp_config.get("presence_path", - None) is None else sfp_config.get("presence_path") % self._port_id + # /sys/s3ip/transceiver/eth%d/present + path_config = sfp_config.get("presence_path", None) + if path_config is not None and self._port_id not in self.bp_port_list: + self.presence_path = path_config % (self._port_id) + else: + self.presence_path = None self.presence_val_is_present = sfp_config.get("presence_val_is_present", 0) - self._sfplog(LOG_DEBUG_LEVEL, "Done init presence path: %s" % self.presence_path) + self._sfplog(LOG_DEBUG_LEVEL, "Done init port %d presence path: %s" % (self._port_id, self.presence_path)) # init optoe driver path optoe_driver_path = sfp_config.get("optoe_driver_path", None) - optoe_driver_key = sfp_config.get("optoe_driver_key")[self._port_id - 1] - self.dev_class_path = None if optoe_driver_path is None else optoe_driver_path % ( - optoe_driver_key, optoe_driver_key) - self._sfplog(LOG_DEBUG_LEVEL, "Done init optoe driver path: %s" % self.dev_class_path) + if optoe_driver_path is not None and self._port_id not in self.bp_port_list: + optoe_driver_key = sfp_config.get("optoe_driver_key")[self._port_id - 1] + self.dev_class_path = None if optoe_driver_path is None else optoe_driver_path % ( + optoe_driver_key, optoe_driver_key) + self._sfplog(LOG_DEBUG_LEVEL, "Done init port %d optoe driver path: %s" % (self._port_id, self.dev_class_path)) # init reset path - self.reset_path = None if sfp_config.get( - "reset_path", - None) is None else sfp_config.get( - "reset_path", - None) % self._port_id + # /sys/s3ip/transceiver/eth%d/present + path_config = sfp_config.get("reset_path", None) + if path_config is not None and self._port_id not in self.bp_port_list: + self.reset_path = path_config % (self._port_id) + else: + self.reset_path = None self.reset_val_is_reset = sfp_config.get("reset_val_is_reset", 0) - self._sfplog(LOG_DEBUG_LEVEL, "Done init reset path: %s" % self.reset_path) + self._sfplog(LOG_DEBUG_LEVEL, "Done init port %d reset path: %s" % (self._port_id, self.reset_path)) def get_presence(self): if self.presence_path is None: @@ -934,4 +943,4 @@ def _file_rw_unlock(self): return True except Exception as e: self._sfplog(LOG_ERROR_LEVEL, "file unlock err, msg:%s" % (str(e))) - return False + return False \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/control b/platform/broadcom/sonic-platform-modules-micas/debian/control index e272778df0a..e779b55e10a 100644 --- a/platform/broadcom/sonic-platform-modules-micas/debian/control +++ b/platform/broadcom/sonic-platform-modules-micas/debian/control @@ -20,6 +20,10 @@ Package: platform-modules-micas-m2-w6940-128qc Architecture: amd64 Description: kernel modules for platform devices such as fan, led, sfp +Package: platform-modules-micas-m2-w6940-128x1-fr4 +Architecture: amd64 +Description: kernel modules for platform devices such as fan, led, sfp + Package: platform-modules-micas-m2-w6930-64qc Architecture: amd64 Description: kernel modules for platform devices such as fan, led, sfp @@ -38,4 +42,12 @@ Description: kernel modules for platform devices such as fan, led, sfp Package: platform-modules-micas-m2-w6520-48c8qc Architecture: amd64 -Description: kernel modules for platform devices such as fan, led, sfp \ No newline at end of file +Description: kernel modules for platform devices such as fan, led, sfp + +Package: platform-modules-micas-m2-w6950-128oc +Architecture: amd64 +Description: kernel modules for platform devices such as fan, led, sfp + +Package: platform-modules-micas-m2-w6951-64hc-cp +Architecture: amd64 +Description: kernel modules for platform devices such as fan, led, sfp diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6940-128x1-fr4.install b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6940-128x1-fr4.install new file mode 100644 index 00000000000..7628a0bd33a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6940-128x1-fr4.install @@ -0,0 +1 @@ +m2-w6940-128x1-fr4/modules/sonic_platform-1.0-py3-none-any.whl /usr/share/sonic/device/x86_64-micas_m2-w6940-128x1-fr4-r0 diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6940-128x1-fr4.postinst b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6940-128x1-fr4.postinst new file mode 100644 index 00000000000..a8132f4f65a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6940-128x1-fr4.postinst @@ -0,0 +1,10 @@ +#!/bin/sh +# postinst + +kernel_version=$(uname -r) + +if [ -e /boot/System.map-${kernel_version} ]; then + depmod -a -F /boot/System.map-${kernel_version} ${kernel_version} || true +fi + +#DEBHELPER# diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6950-128oc.install b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6950-128oc.install new file mode 100644 index 00000000000..721c8ac7f39 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6950-128oc.install @@ -0,0 +1 @@ +m2-w6950-128oc/modules/sonic_platform-1.0-py3-none-any.whl /usr/share/sonic/device/x86_64-micas_m2-w6950-128oc-r0 diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6950-128oc.postinst b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6950-128oc.postinst new file mode 100644 index 00000000000..a8132f4f65a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6950-128oc.postinst @@ -0,0 +1,10 @@ +#!/bin/sh +# postinst + +kernel_version=$(uname -r) + +if [ -e /boot/System.map-${kernel_version} ]; then + depmod -a -F /boot/System.map-${kernel_version} ${kernel_version} || true +fi + +#DEBHELPER# diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6951-64hc-cp.install b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6951-64hc-cp.install new file mode 100644 index 00000000000..0d6afaedf91 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6951-64hc-cp.install @@ -0,0 +1 @@ +m2-w6951-64hc-cp/modules/sonic_platform-1.0-py3-none-any.whl /usr/share/sonic/device/x86_64-micas_m2-w6951-64hc-cp-r0 diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6951-64hc-cp.postinst b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6951-64hc-cp.postinst new file mode 100644 index 00000000000..a8132f4f65a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6951-64hc-cp.postinst @@ -0,0 +1,10 @@ +#!/bin/sh +# postinst + +kernel_version=$(uname -r) + +if [ -e /boot/System.map-${kernel_version} ]; then + depmod -a -F /boot/System.map-${kernel_version} ${kernel_version} || true +fi + +#DEBHELPER# diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/rule.mk b/platform/broadcom/sonic-platform-modules-micas/debian/rule.mk index fbcd72290ac..136c1146d5c 100644 --- a/platform/broadcom/sonic-platform-modules-micas/debian/rule.mk +++ b/platform/broadcom/sonic-platform-modules-micas/debian/rule.mk @@ -9,6 +9,8 @@ MODULE_DIRS += m2-w6940-64oc MODULE_DIRS += m2-w6920-32qc2x MODULE_DIRS += m2-w6510-32c MODULE_DIRS += m2-w6520-48c8qc - +MODULE_DIRS += m2-w6940-128x1-fr4 +MODULE_DIRS += m2-w6950-128oc +MODULE_DIRS += m2-w6951-64hc-cp export MODULE_DIRS diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/rules b/platform/broadcom/sonic-platform-modules-micas/debian/rules index baa92b2338e..ba89d3bc480 100755 --- a/platform/broadcom/sonic-platform-modules-micas/debian/rules +++ b/platform/broadcom/sonic-platform-modules-micas/debian/rules @@ -69,7 +69,7 @@ COMPILE_WHL: $(COMPILE_DIRS) binary: binary-indep @echo "=======================================================" -binary-indep: +binary-indep: build # Resuming debhelper scripts dh_testroot dh_install diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-32c/modules/driver/wb_i2c_dev_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-32c/modules/driver/wb_i2c_dev_device.c index 76f8911e0b6..0fb31ce9edb 100644 --- a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-32c/modules/driver/wb_i2c_dev_device.c +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-32c/modules/driver/wb_i2c_dev_device.c @@ -111,7 +111,7 @@ static int __init wb_i2c_dev_device_init(void) continue; } client = i2c_new_client_device(adap, &i2c_dev_device_info[i]); - if (!client) { + if (IS_ERR(client) || !client) { i2c_dev_device_data->client = NULL; printk(KERN_ERR "Failed to register i2c dev device %d at bus %d!\n", i2c_dev_device_data->i2c_addr, i2c_dev_device_data->i2c_bus); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-32c/modules/driver/wb_i2c_mux_pca954x_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-32c/modules/driver/wb_i2c_mux_pca954x_device.c index eb7d3294ab9..a2eb86f4a60 100644 --- a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-32c/modules/driver/wb_i2c_mux_pca954x_device.c +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-32c/modules/driver/wb_i2c_mux_pca954x_device.c @@ -210,7 +210,7 @@ static int __init wb_i2c_mux_pca954x_device_init(void) continue; } client = i2c_new_client_device(adap, &i2c_mux_pca954x_device_info[i]); - if (!client) { + if (IS_ERR(client) || !client) { i2c_mux_pca954x_device_data->client = NULL; printk(KERN_ERR "Failed to register pca954x device %d at bus %d!\n", i2c_mux_pca954x_device_data->i2c_addr, i2c_mux_pca954x_device_data->i2c_bus); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/modules/driver/wb_i2c_dev_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/modules/driver/wb_i2c_dev_device.c index 6e187eae979..5d6b28f7cbb 100644 --- a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/modules/driver/wb_i2c_dev_device.c +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/modules/driver/wb_i2c_dev_device.c @@ -111,7 +111,7 @@ static int __init wb_i2c_dev_device_init(void) continue; } client = i2c_new_client_device(adap, &i2c_dev_device_info[i]); - if (!client) { + if (IS_ERR(client) || !client) { i2c_dev_device_data->client = NULL; printk(KERN_ERR "Failed to register i2c dev device %d at bus %d!\n", i2c_dev_device_data->i2c_addr, i2c_dev_device_data->i2c_bus); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/modules/driver/wb_i2c_mux_pca954x_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/modules/driver/wb_i2c_mux_pca954x_device.c index 387ad5b223b..fbe0fe44d3d 100644 --- a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/modules/driver/wb_i2c_mux_pca954x_device.c +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48gt4v/modules/driver/wb_i2c_mux_pca954x_device.c @@ -112,7 +112,7 @@ static int __init wb_i2c_mux_pca954x_device_init(void) continue; } client = i2c_new_client_device(adap, &i2c_mux_pca954x_device_info[i]); - if (!client) { + if (IS_ERR(client) || !client) { i2c_mux_pca954x_device_data->client = NULL; printk(KERN_ERR "Failed to register pca954x device %d at bus %d!\n", i2c_mux_pca954x_device_data->i2c_addr, i2c_mux_pca954x_device_data->i2c_bus); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/wb_i2c_dev_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/wb_i2c_dev_device.c index 865e7afea44..d38091cf71b 100644 --- a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/wb_i2c_dev_device.c +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/wb_i2c_dev_device.c @@ -106,7 +106,7 @@ static int __init wb_i2c_dev_device_init(void) continue; } client = i2c_new_client_device(adap, &i2c_dev_device_info[i]); - if (!client) { + if (IS_ERR(client) || !client) { i2c_dev_device_data->client = NULL; printk(KERN_ERR "Failed to register i2c dev device %d at bus %d!\n", i2c_dev_device_data->i2c_addr, i2c_dev_device_data->i2c_bus); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/wb_i2c_mux_pca954x_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/wb_i2c_mux_pca954x_device.c index f12a7101345..cb7d47bd927 100644 --- a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/wb_i2c_mux_pca954x_device.c +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/wb_i2c_mux_pca954x_device.c @@ -262,7 +262,7 @@ static int __init wb_i2c_mux_pca954x_device_init(void) continue; } client = i2c_new_client_device(adap, &i2c_mux_pca954x_device_info[i]); - if (!client) { + if (IS_ERR(client) || !client) { i2c_mux_pca954x_device_data->client = NULL; printk(KERN_ERR "Failed to register pca954x device %d at bus %d!\n", i2c_mux_pca954x_device_data->i2c_addr, i2c_mux_pca954x_device_data->i2c_bus); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6520-24dc8qc/modules/driver/wb_fpga_pca954x_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6520-24dc8qc/modules/driver/wb_fpga_pca954x_device.c index 94a4ca54e51..fd22dc93a1f 100644 --- a/platform/broadcom/sonic-platform-modules-micas/m2-w6520-24dc8qc/modules/driver/wb_fpga_pca954x_device.c +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6520-24dc8qc/modules/driver/wb_fpga_pca954x_device.c @@ -295,7 +295,7 @@ static int __init wb_fpga_pca954x_device_init(void) continue; } client = i2c_new_client_device(adap, &fpga_pca954x_device_info[i]); - if (!client) { + if (IS_ERR(client) || !client) { fpga_pca954x_device_data->client = NULL; printk(KERN_ERR "Failed to register fpga pca954x device %d at bus %d!\n", fpga_pca954x_device_data->i2c_addr, fpga_pca954x_device_data->i2c_bus); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6520-24dc8qc/modules/driver/wb_i2c_dev_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6520-24dc8qc/modules/driver/wb_i2c_dev_device.c index 89e8f322130..1c963db00b2 100644 --- a/platform/broadcom/sonic-platform-modules-micas/m2-w6520-24dc8qc/modules/driver/wb_i2c_dev_device.c +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6520-24dc8qc/modules/driver/wb_i2c_dev_device.c @@ -141,7 +141,7 @@ static int __init wb_i2c_dev_device_init(void) continue; } client = i2c_new_client_device(adap, &i2c_dev_device_info[i]); - if (!client) { + if (IS_ERR(client) || !client) { i2c_dev_device_data->client = NULL; printk(KERN_ERR "Failed to register i2c dev device %d at bus %d!\n", i2c_dev_device_data->i2c_addr, i2c_dev_device_data->i2c_bus); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6520-48c8qc/modules/driver/wb_fpga_pca954x_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6520-48c8qc/modules/driver/wb_fpga_pca954x_device.c index ed0894c0953..3a017a2e429 100644 --- a/platform/broadcom/sonic-platform-modules-micas/m2-w6520-48c8qc/modules/driver/wb_fpga_pca954x_device.c +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6520-48c8qc/modules/driver/wb_fpga_pca954x_device.c @@ -103,7 +103,7 @@ static int __init wb_fpga_pca954x_device_init(void) continue; } client = i2c_new_client_device(adap, &fpga_pca954x_device_info[i]); - if (!client) { + if (IS_ERR(client) || !client) { fpga_pca954x_device_data->client = NULL; printk(KERN_ERR "Failed to register fpga pca954x device %d at bus %d!\n", fpga_pca954x_device_data->i2c_addr, fpga_pca954x_device_data->i2c_bus); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6520-48c8qc/modules/driver/wb_i2c_dev_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6520-48c8qc/modules/driver/wb_i2c_dev_device.c index bfeace96e17..1fb01e71147 100644 --- a/platform/broadcom/sonic-platform-modules-micas/m2-w6520-48c8qc/modules/driver/wb_i2c_dev_device.c +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6520-48c8qc/modules/driver/wb_i2c_dev_device.c @@ -126,7 +126,7 @@ static int __init wb_i2c_dev_device_init(void) continue; } client = i2c_new_client_device(adap, &i2c_dev_device_info[i]); - if (!client) { + if (IS_ERR(client) || !client) { i2c_dev_device_data->client = NULL; printk(KERN_ERR "Failed to register i2c dev device %d at bus %d!\n", i2c_dev_device_data->i2c_addr, i2c_dev_device_data->i2c_bus); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/modules/driver/wb_fpga_pca954x_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/modules/driver/wb_fpga_pca954x_device.c index 4e442d85440..cb7960d2188 100644 --- a/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/modules/driver/wb_fpga_pca954x_device.c +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/modules/driver/wb_fpga_pca954x_device.c @@ -379,7 +379,7 @@ static int __init wb_fpga_pca954x_device_init(void) continue; } client = i2c_new_client_device(adap, &fpga_pca954x_device_info[i]); - if (!client) { + if (IS_ERR(client) || !client) { fpga_pca954x_device_data->client = NULL; printk(KERN_ERR "Failed to register fpga pca954x device %d at bus %d!\n", fpga_pca954x_device_data->i2c_addr, fpga_pca954x_device_data->i2c_bus); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/modules/driver/wb_i2c_dev_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/modules/driver/wb_i2c_dev_device.c index 9a3aef32977..e6bb634ba24 100644 --- a/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/modules/driver/wb_i2c_dev_device.c +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6920-32qc2x/modules/driver/wb_i2c_dev_device.c @@ -112,7 +112,7 @@ static int __init wb_i2c_dev_device_init(void) continue; } client = i2c_new_client_device(adap, &i2c_dev_device_info[i]); - if (!client) { + if (IS_ERR(client) || !client) { i2c_dev_device_data->client = NULL; printk(KERN_ERR "Failed to register i2c dev device %d at bus %d!\n", i2c_dev_device_data->i2c_addr, i2c_dev_device_data->i2c_bus); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_fpga_pca954x_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_fpga_pca954x_device.c index ecb84604767..ef0bb81da41 100644 --- a/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_fpga_pca954x_device.c +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_fpga_pca954x_device.c @@ -798,7 +798,7 @@ static int __init wb_fpga_pca954x_device_init(void) continue; } client = i2c_new_client_device(adap, &fpga_pca954x_device_info[i]); - if (!client) { + if (IS_ERR(client) || !client) { fpga_pca954x_device_data->client = NULL; printk(KERN_ERR "Failed to register fpga pca954x device %d at bus %d!\n", fpga_pca954x_device_data->i2c_addr, fpga_pca954x_device_data->i2c_bus); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_i2c_dev_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_i2c_dev_device.c index 0f97f8f5e04..805004f5a48 100644 --- a/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_i2c_dev_device.c +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_i2c_dev_device.c @@ -156,7 +156,7 @@ static int __init wb_i2c_dev_device_init(void) continue; } client = i2c_new_client_device(adap, &i2c_dev_device_info[i]); - if (!client) { + if (IS_ERR(client) || !client) { i2c_dev_device_data->client = NULL; printk(KERN_ERR "Failed to register i2c dev device %d at bus %d!\n", i2c_dev_device_data->i2c_addr, i2c_dev_device_data->i2c_bus); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_i2c_mux_pca954x_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_i2c_mux_pca954x_device.c index dc54dee29fc..307dbe94231 100644 --- a/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_i2c_mux_pca954x_device.c +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_i2c_mux_pca954x_device.c @@ -112,7 +112,7 @@ static int __init wb_i2c_mux_pca954x_device_init(void) continue; } client = i2c_new_client_device(adap, &i2c_mux_pca954x_device_info[i]); - if (!client) { + if (IS_ERR(client) || !client) { i2c_mux_pca954x_device_data->client = NULL; printk(KERN_ERR "Failed to register pca954x device %d at bus %d!\n", i2c_mux_pca954x_device_data->i2c_addr, i2c_mux_pca954x_device_data->i2c_bus); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_spi_dev_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_spi_dev_device.c index 45f6038596b..27b3c49cc25 100644 --- a/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_spi_dev_device.c +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6930-64qc/modules/driver/wb_spi_dev_device.c @@ -72,7 +72,7 @@ struct spi_board_info spi_dev_device_info[] = { static int __init wb_spi_dev_device_init(void) { int i; - struct spi_master *master; + struct spi_controller *ctlr; struct spi_device *spi; int spi_dev_num; @@ -86,14 +86,14 @@ static int __init wb_spi_dev_device_init(void) } for (i = 0; i < ARRAY_SIZE(spi_dev_device_info); i++) { - master = wb_spi_master_busnum_to_master(spi_dev_device_info[i].bus_num); - if (!master) { + ctlr = wb_spi_master_busnum_to_master(spi_dev_device_info[i].bus_num); + if (!ctlr) { printk(KERN_ERR "get bus_num %u spi master failed.\n", spi_dev_device_info[i].bus_num); continue; } - spi = spi_new_device(master, &spi_dev_device_info[i]); - put_device(&master->dev); + spi = spi_new_device(ctlr, &spi_dev_device_info[i]); + spi_controller_put(ctlr); if (spi) { g_spi_device[i] = spi; } else { diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/modules/driver/wb_i2c_dev_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/modules/driver/wb_i2c_dev_device.c index c0a7e6c0021..6854f6cfc60 100644 --- a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/modules/driver/wb_i2c_dev_device.c +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/modules/driver/wb_i2c_dev_device.c @@ -127,7 +127,7 @@ static int __init wb_i2c_dev_device_init(void) continue; } client = i2c_new_client_device(adap, &i2c_dev_device_info[i]); - if (!client) { + if (IS_ERR(client) || !client) { i2c_dev_device_data->client = NULL; printk(KERN_ERR "Failed to register i2c dev device %d at bus %d!\n", i2c_dev_device_data->i2c_addr, i2c_dev_device_data->i2c_bus); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/modules/driver/wb_i2c_mux_pca954x_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/modules/driver/wb_i2c_mux_pca954x_device.c index 6d96bb56590..973d8779577 100644 --- a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/modules/driver/wb_i2c_mux_pca954x_device.c +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128qc/modules/driver/wb_i2c_mux_pca954x_device.c @@ -505,7 +505,7 @@ static int __init wb_i2c_mux_pca954x_device_init(void) continue; } client = i2c_new_client_device(adap, &i2c_mux_pca954x_device_info[i]); - if (!client) { + if (IS_ERR(client) || !client) { i2c_mux_pca954x_device_data->client = NULL; printk(KERN_ERR "Failed to register pca954x device %d at bus %d!\n", i2c_mux_pca954x_device_data->i2c_addr, i2c_mux_pca954x_device_data->i2c_bus); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/Makefile b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/Makefile new file mode 100755 index 00000000000..594b6cf7212 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/Makefile @@ -0,0 +1,29 @@ +PWD = $(shell pwd) +DIR_KERNEL_SRC = $(PWD)/modules/driver +EXTRA_CFLAGS:= -I$(M)/include +EXTRA_CFLAGS+= -Wall +SUB_BUILD_DIR = $(PWD)/build +INSTALL_DIR = $(SUB_BUILD_DIR)/$(KERNEL_SRC)/$(INSTALL_MOD_DIR) +INSTALL_SCRIPT_DIR = $(SUB_BUILD_DIR)/usr/local/bin +INSTALL_LIB_DIR = $(SUB_BUILD_DIR)/usr/lib/python3/dist-packages +INSTALL_UPGRADE_TEST_DIR = $(SUB_BUILD_DIR)/etc/.upgrade_test +INSTALL_S3IP_SYSFS_CFG_DIR = $(SUB_BUILD_DIR)/etc/s3ip_sysfs_cfg +cpo_dir = $(PWD)/cpo +all: + $(MAKE) -C $(cpo_dir) + $(MAKE) -C $(KBUILD_OUTPUT) M=$(DIR_KERNEL_SRC) modules + @if [ ! -d ${INSTALL_DIR} ]; then mkdir -p ${INSTALL_DIR} ;fi + cp -r $(DIR_KERNEL_SRC)/*.ko $(INSTALL_DIR) + @if [ ! -d ${INSTALL_SCRIPT_DIR} ]; then mkdir -p ${INSTALL_SCRIPT_DIR} ;fi + cp -r $(PWD)/config/* $(INSTALL_SCRIPT_DIR) + @if [ ! -d ${INSTALL_LIB_DIR} ]; then mkdir -p ${INSTALL_LIB_DIR} ;fi + @if [ -d $(PWD)/hal-config/ ]; then cp -r $(PWD)/hal-config/* ${INSTALL_LIB_DIR} ;fi + @if [ ! -d ${INSTALL_UPGRADE_TEST_DIR} ]; then mkdir -p ${INSTALL_UPGRADE_TEST_DIR} ;fi + @if [ -d $(PWD)/.upgrade_test/ ]; then cp -r $(PWD)/.upgrade_test/* ${INSTALL_UPGRADE_TEST_DIR} ;fi + @if [ ! -d ${INSTALL_S3IP_SYSFS_CFG_DIR} ]; then mkdir -p ${INSTALL_S3IP_SYSFS_CFG_DIR} ;fi + @if [ -d $(PWD)/s3ip_sysfs_cfg/ ]; then cp -r $(PWD)/s3ip_sysfs_cfg/* ${INSTALL_S3IP_SYSFS_CFG_DIR} ;fi +clean: + rm -f ${DIR_KERNEL_SRC}/*.o ${DIR_KERNEL_SRC}/*.ko ${DIR_KERNEL_SRC}/*.mod.c ${DIR_KERNEL_SRC}/.*.cmd + rm -f ${DIR_KERNEL_SRC}/Module.markers ${DIR_KERNEL_SRC}/Module.symvers ${DIR_KERNEL_SRC}/modules.order + rm -rf ${DIR_KERNEL_SRC}/.tmp_versions + rm -rf $(SUB_BUILD_DIR) diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/config/x86_64_micas_m2_w6940_128x1_fr4_r0_0x40d9_base_config.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/config/x86_64_micas_m2_w6940_128x1_fr4_r0_0x40d9_base_config.py new file mode 100755 index 00000000000..bf344da382a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/config/x86_64_micas_m2_w6940_128x1_fr4_r0_0x40d9_base_config.py @@ -0,0 +1,46 @@ +#!/usr/bin/python +# -*- coding: UTF-8 -*- + +DRIVERLISTS = [ + {"name": "wb_i2c_i801", "delay": 1, "removable": 0}, + {"name": "i2c_dev", "delay": 0, "removable": 0}, + {"name": "wb_i2c_algo_bit", "delay": 0}, + {"name": "wb_i2c_gpio", "delay": 0}, + {"name": "i2c_mux", "delay": 0, "removable": 0}, + {"name": "wb_i2c_gpio_device gpio_sda=181 gpio_scl=180 gpio_chip_name=INTC3001:00 bus_num=1", "delay": 0}, + {"name": "platform_common dfd_my_type=0x40d9", "delay": 0}, + {"name": "wb_logic_dev_common", "delay":0}, + {"name": "wb_fpga_pcie", "delay": 0}, + {"name": "wb_pcie_dev", "delay": 0}, + {"name": "wb_pcie_dev_device", "delay": 0}, + {"name": "wb_i2c_ocores", "delay": 0}, + {"name": "wb_i2c_ocores_device", "delay": 0}, + {"name": "wb_i2c_mux_pca9641", "delay": 0}, + {"name": "wb_i2c_mux_pca954x", "delay": 0}, + {"name": "wb_i2c_mux_pca954x_device_b3", "delay": 1}, + {"name": "wb_pmbus_core", "delay": 0}, + {"name": "wb_csu550", "delay": 0}, +] + +DEVICE = [ + {"name": "wb_fsp1200", "bus": 10, "loc": 0x58}, +] + +INIT_PARAM = [] + +FINISH_PARAM = [] + +SECONDARY_SUBVERSION_DECODE = {"ECD26020050":"DC", + "default":"AC"} + +SUBVERSION_CONFIG = {"get_value" : {"gettype":'io', 'io_addr':"0x907"}} + +SECONDARY_SUBVERSION_CONFIG ={"get_value" : {"loc": [ + "10-0058/hwmon/hwmon*/mfr_model", + "10-0058/mfr_model", + "10-0058/device_name", + "10-0058/name", + "10-0058/hwmon/hwmon*/device_name", + "10-0058/hwmon/hwmon*/name", + ],"gettype": "sysfs"}, + "decode_value":SECONDARY_SUBVERSION_DECODE, "default":"AC"} diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/config/x86_64_micas_m2_w6940_128x1_fr4_r0_0x40d9_config.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/config/x86_64_micas_m2_w6940_128x1_fr4_r0_0x40d9_config.py new file mode 100755 index 00000000000..c01df84a2e0 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/config/x86_64_micas_m2_w6940_128x1_fr4_r0_0x40d9_config.py @@ -0,0 +1,3221 @@ +#!/usr/bin/python +# -*- coding: UTF-8 -*- + +# CPO build3 configuration file + +from platform_common import * + +STARTMODULE = { + "hal_fanctrl": 1, + "hal_ledctrl": 1, + "avscontrol": 1, + "dev_monitor": 1, + "tty_console": 0, + "reboot_cause": 1, + "pmon_syslog": 1, + "sff_temp_polling": 1, + "generate_airflow": 0, + "product_name": 1, + "generate_mgmt_version": 0, + "set_fw_mac": 1, +} + +DEV_MONITOR_PARAM = { + "polling_time": 10, + "psus": [ + { + "name": "psu2", + "present": {"gettype": "i2c", "bus": 13, "loc": 0x1d, "offset": 0x42, "presentbit": 0, "okval": 0}, + "device": [ + {"id": "psu2pmbus", "name": "wb_fsp1200", "bus": 10, "loc": 0x58, "attr": "hwmon"}, + {"id": "psu2frue2", "name": "wb_24c02", "bus": 10, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "psu1", + "present": {"gettype": "i2c", "bus": 13, "loc": 0x1d, "offset": 0x42, "presentbit": 1, "okval": 0}, + "device": [ + {"id": "psu1pmbus", "name": "wb_fsp1200", "bus": 11, "loc": 0x58, "attr": "hwmon"}, + {"id": "psu1frue2", "name": "wb_24c02", "bus": 11, "loc": 0x50, "attr": "eeprom"}, + ], + }, + ], + "fans": [ + { + "name": "fan7", + "present": {"gettype": "i2c", "bus": 44, "loc": 0x0d, "offset": 0x5b, "presentbit": 0, "okval": 0}, + "device": [ + {"id": "fan7frue2", "name": "wb_24c64", "bus": 43, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "fan5", + "present": {"gettype": "i2c", "bus": 44, "loc": 0x0d, "offset": 0x5b, "presentbit": 1, "okval": 0}, + "device": [ + {"id": "fan5frue2", "name": "wb_24c64", "bus": 42, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "fan3", + "present": {"gettype": "i2c", "bus": 44, "loc": 0x0d, "offset": 0x5b, "presentbit": 2, "okval": 0}, + "device": [ + {"id": "fan3frue2", "name": "wb_24c64", "bus": 41, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "fan1", + "present": {"gettype": "i2c", "bus": 44, "loc": 0x0d, "offset": 0x5b, "presentbit": 3, "okval": 0}, + "device": [ + {"id": "fan1frue2", "name": "wb_24c64", "bus":40, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "fan8", + "present": {"gettype": "i2c", "bus": 52, "loc": 0x0d, "offset": 0x5b, "presentbit": 0, "okval": 0}, + "device": [ + {"id": "fan8frue2", "name": "wb_24c64", "bus": 51, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "fan6", + "present": {"gettype": "i2c", "bus": 52, "loc": 0x0d, "offset": 0x5b, "presentbit": 1, "okval": 0}, + "device": [ + {"id": "fan6frue2", "name": "wb_24c64", "bus": 50, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "fan4", + "present": {"gettype": "i2c", "bus": 52, "loc": 0x0d, "offset": 0x5b, "presentbit": 2, "okval": 0}, + "device": [ + {"id": "fan4frue2", "name": "wb_24c64", "bus": 49, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "fan2", + "present": {"gettype": "i2c", "bus": 52, "loc": 0x0d, "offset": 0x5b, "presentbit": 3, "okval": 0}, + "device": [ + {"id": "fan2frue2", "name": "wb_24c64", "bus": 48, "loc": 0x50, "attr": "eeprom"}, + ], + }, + ], + "others": [ + { + "name": "eeprom", + "device": [ + {"id": "eeprom_1", "name": "wb_24c02", "bus": 1, "loc": 0x56, "attr": "eeprom"}, + {"id": "eeprom_2", "name": "wb_24c02", "bus": 1, "loc": 0x57, "attr": "eeprom"}, + {"id": "eeprom_3", "name": "wb_24c02", "bus": 2, "loc": 0x51, "attr": "eeprom"}, + {"id": "eeprom_4", "name": "wb_24c02", "bus": 3, "loc": 0x51, "attr": "eeprom"}, + {"id": "eeprom_5", "name": "wb_24c02", "bus": 32, "loc": 0x52, "attr": "eeprom"}, + {"id": "eeprom_6", "name": "wb_24c02", "bus": 12, "loc": 0x57, "attr": "eeprom"}, + ], + }, + { + "name": "oe_mcu", + "device": [ + {"id": "oe_mcu_1", "name": "wb_24c02", "bus": 24, "loc": 0x50, "attr": "eeprom"}, + {"id": "oe_mcu_2", "name": "wb_24c02", "bus": 25, "loc": 0x50, "attr": "eeprom"}, + {"id": "oe_mcu_3", "name": "wb_24c02", "bus": 26, "loc": 0x50, "attr": "eeprom"}, + {"id": "oe_mcu_4", "name": "wb_24c02", "bus": 27, "loc": 0x50, "attr": "eeprom"}, + {"id": "oe_mcu_5", "name": "wb_24c02", "bus": 28, "loc": 0x50, "attr": "eeprom"}, + {"id": "oe_mcu_6", "name": "wb_24c02", "bus": 29, "loc": 0x50, "attr": "eeprom"}, + {"id": "oe_mcu_7", "name": "wb_24c02", "bus": 30, "loc": 0x50, "attr": "eeprom"}, + {"id": "oe_mcu_8", "name": "wb_24c02", "bus": 31, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "tmp275", + "device": [ + {"id": "tmp275_1", "name": "wb_tmp275", "bus": 34, "loc": 0x4c, "attr": "hwmon"}, + {"id": "tmp275_2", "name": "wb_tmp275", "bus": 35, "loc": 0x4d, "attr": "hwmon"}, + {"id": "tmp275_3", "name": "wb_tmp275", "bus": 8, "loc": 0x48, "attr": "hwmon"}, + {"id": "tmp275_4", "name": "wb_tmp275", "bus": 8, "loc": 0x49, "attr": "hwmon"}, + {"id": "tmp275_5", "name": "wb_tmp275", "bus": 9, "loc": 0x48, "attr": "hwmon"}, + {"id": "tmp275_6", "name": "wb_tmp275", "bus": 9, "loc": 0x49, "attr": "hwmon"}, + {"id": "tmp275_7", "name": "wb_tmp275", "bus": 14, "loc": 0x48, "attr": "hwmon"}, + {"id": "tmp275_8", "name": "wb_tmp275", "bus": 14, "loc": 0x49, "attr": "hwmon"}, + {"id": "tmp275_9", "name": "wb_tmp275", "bus": 14, "loc": 0x4b, "attr": "hwmon"}, + ], + }, + { + "name": "ina3221", + "device": [ + {"id": "ina3221_1", "name": "wb_ina3221", "bus": 33, "loc": 0x40, "attr": "hwmon"}, + {"id": "ina3221_2", "name": "wb_ina3221", "bus": 33, "loc": 0x41, "attr": "hwmon"}, + {"id": "ina3221_3", "name": "wb_ina3221", "bus": 33, "loc": 0x42, "attr": "hwmon"}, + {"id": "ina3221_4", "name": "wb_ina3221", "bus": 12, "loc": 0x40, "attr": "hwmon"}, + {"id": "ina3221_5", "name": "wb_ina3221", "bus": 12, "loc": 0x41, "attr": "hwmon"}, + {"id": "ina3221_6", "name": "wb_ina3221", "bus": 56, "loc": 0x40, "attr": "hwmon"}, + {"id": "ina3221_7", "name": "wb_ina3221", "bus": 56, "loc": 0x41, "attr": "hwmon"}, + {"id": "ina3221_8", "name": "wb_ina3221", "bus": 57, "loc": 0x40, "attr": "hwmon"}, + {"id": "ina3221_9", "name": "wb_ina3221", "bus": 58, "loc": 0x40, "attr": "hwmon"}, + {"id": "ina3221_10", "name": "wb_ina3221", "bus": 59, "loc": 0x40, "attr": "hwmon"}, + {"id": "ina3221_11", "name": "wb_ina3221", "bus": 60, "loc": 0x40, "attr": "hwmon"}, + {"id": "ina3221_12", "name": "wb_ina3221", "bus": 61, "loc": 0x40, "attr": "hwmon"}, + {"id": "ina3221_13", "name": "wb_ina3221", "bus": 62, "loc": 0x40, "attr": "hwmon"}, + {"id": "ina3221_14", "name": "wb_ina3221", "bus": 63, "loc": 0x40, "attr": "hwmon"}, + {"id": "ina3221_15", "name": "wb_ina3221", "bus": 88, "loc": 0x42, "attr": "hwmon"}, + {"id": "ina3221_16", "name": "wb_ina3221", "bus": 89, "loc": 0x42, "attr": "hwmon"}, + {"id": "ina3221_17", "name": "wb_ina3221", "bus": 90, "loc": 0x42, "attr": "hwmon"}, + ], + }, + { + "name": "xdpe12284", + "device": [ + {"id": "xdpe12284_1", "name": "wb_xdpe12284", "bus": 5, "loc": 0x5e, "attr": "hwmon"}, + {"id": "xdpe12284_2", "name": "wb_xdpe12284", "bus": 5, "loc": 0x68, "attr": "hwmon"}, + {"id": "xdpe12284_3", "name": "wb_xdpe12284", "bus": 5, "loc": 0x6e, "attr": "hwmon"}, + {"id": "xdpe12284_4", "name": "wb_xdpe12284", "bus": 5, "loc": 0x70, "attr": "hwmon"}, + {"id": "xdpe12284_5", "name": "wb_xdpe12284", "bus": 67, "loc": 0x68, "attr": "hwmon"}, + {"id": "xdpe12284_6", "name": "wb_xdpe12284", "bus": 67, "loc": 0x70, "attr": "hwmon"}, + {"id": "xdpe12284_7", "name": "wb_xdpe12284", "bus": 67, "loc": 0x60, "attr": "hwmon"}, + {"id": "xdpe12284_8", "name": "wb_xdpe12284", "bus": 67, "loc": 0x66, "attr": "hwmon"}, + {"id": "xdpe12284_9", "name": "wb_xdpe12284", "bus": 67, "loc": 0x6e, "attr": "hwmon"}, + {"id": "xdpe12284_10", "name": "wb_xdpe12284", "bus": 67, "loc": 0x5e, "attr": "hwmon"}, + {"id": "xdpe12284_11", "name": "wb_xdpe12284", "bus": 68, "loc": 0x68, "attr": "hwmon"}, + {"id": "xdpe12284_12", "name": "wb_xdpe12284", "bus": 68, "loc": 0x70, "attr": "hwmon"}, + {"id": "xdpe12284_13", "name": "wb_xdpe12284", "bus": 68, "loc": 0x60, "attr": "hwmon"}, + {"id": "xdpe12284_14", "name": "wb_xdpe12284", "bus": 68, "loc": 0x66, "attr": "hwmon"}, + {"id": "xdpe12284_15", "name": "wb_xdpe12284", "bus": 68, "loc": 0x6e, "attr": "hwmon"}, + {"id": "xdpe12284_16", "name": "wb_xdpe12284", "bus": 68, "loc": 0x5e, "attr": "hwmon"}, + {"id": "xdpe12284_17", "name": "wb_xdpe12284", "bus": 69, "loc": 0x68, "attr": "hwmon"}, + {"id": "xdpe12284_18", "name": "wb_xdpe12284", "bus": 69, "loc": 0x70, "attr": "hwmon"}, + {"id": "xdpe12284_19", "name": "wb_xdpe12284", "bus": 69, "loc": 0x60, "attr": "hwmon"}, + {"id": "xdpe12284_20", "name": "wb_xdpe12284", "bus": 69, "loc": 0x66, "attr": "hwmon"}, + {"id": "xdpe12284_21", "name": "wb_xdpe12284", "bus": 69, "loc": 0x6e, "attr": "hwmon"}, + {"id": "xdpe12284_22", "name": "wb_xdpe12284", "bus": 69, "loc": 0x5e, "attr": "hwmon"}, + {"id": "xdpe12284_23", "name": "wb_xdpe12284", "bus": 70, "loc": 0x68, "attr": "hwmon"}, + {"id": "xdpe12284_24", "name": "wb_xdpe12284", "bus": 70, "loc": 0x70, "attr": "hwmon"}, + {"id": "xdpe12284_25", "name": "wb_xdpe12284", "bus": 70, "loc": 0x60, "attr": "hwmon"}, + {"id": "xdpe12284_26", "name": "wb_xdpe12284", "bus": 70, "loc": 0x66, "attr": "hwmon"}, + {"id": "xdpe12284_27", "name": "wb_xdpe12284", "bus": 70, "loc": 0x6e, "attr": "hwmon"}, + {"id": "xdpe12284_28", "name": "wb_xdpe12284", "bus": 70, "loc": 0x5e, "attr": "hwmon"}, + {"id": "xdpe12284_29", "name": "wb_xdpe12284", "bus": 71, "loc": 0x68, "attr": "hwmon"}, + ], + }, + { + "name": "xdpe132g5c", + "device": [ + {"id": "xdpe132g5c_1", "name": "wb_xdpe132g5c_pmbus", "bus": 64, "loc": 0x40, "attr": "hwmon"}, + {"id": "xdpe132g5c_2", "name": "wb_xdpe132g5c_pmbus", "bus": 65, "loc": 0x40, "attr": "hwmon"}, + {"id": "xdpe132g5c_3", "name": "wb_xdpe132g5c_pmbus", "bus": 66, "loc": 0x40, "attr": "hwmon"}, + ], + }, + { + "name": "ucd90160", + "device": [ + {"id": "ucd90160_1", "name": "wb_ucd90160", "bus": 5, "loc": 0x5f, "attr": "hwmon"}, + ], + }, + ], +} + +MANUINFO_CONF = { + "bios": { + "key": "BIOS", + "head": True, + "next": "cpu" + }, + "bios_vendor": { + "parent": "bios", + "key": "Vendor", + "cmd": "dmidecode -t 0 |grep Vendor", + "pattern": r".*Vendor", + "separator": ":", + "arrt_index": 1, + }, + "bios_version": { + "parent": "bios", + "key": "Version", + "cmd": "dmidecode -t 0 |grep Version", + "pattern": r".*Version", + "separator": ":", + "arrt_index": 2, + }, + "bios_date": { + "parent": "bios", + "key": "Release Date", + "cmd": "dmidecode -t 0 |grep Release", + "pattern": r".*Release Date", + "separator": ":", + "arrt_index": 3, + }, + "bios_boot": { + "parent": "bios", + "key": "Boot From", + "devfile": { + "loc": "/dev/cpld1", + "offset":0x1d, + "len":1, + "bit_width":1 + }, + "decode": { + "01": "Master", + "02": "Slave" + }, + "arrt_index": 4, + }, + + "cpu": { + "key": "CPU", + "next": "cpld" + }, + "cpu_vendor": { + "parent": "cpu", + "key": "Vendor", + "cmd": "dmidecode --type processor |grep Manufacturer", + "pattern": r".*Manufacturer", + "separator": ":", + "arrt_index": 1, + }, + "cpu_model": { + "parent": "cpu", + "key": "Device Model", + "cmd": "dmidecode --type processor | grep Version", + "pattern": r".*Version", + "separator": ":", + "arrt_index": 2, + }, + "cpu_core": { + "parent": "cpu", + "key": "Core Count", + "cmd": "dmidecode --type processor | grep \"Core Count\"", + "pattern": r".*Core Count", + "separator": ":", + "arrt_index": 3, + }, + "cpu_thread": { + "parent": "cpu", + "key": "Thread Count", + "cmd": "dmidecode --type processor | grep \"Thread Count\"", + "pattern": r".*Thread Count", + "separator": ":", + "arrt_index": 4, + }, + + + "cpld": { + "key": "CPLD", + "next": "fpga" + }, + + "cpld1": { + "key": "CPLD1", + "parent": "cpld", + "arrt_index": 1, + }, + "cpld1_model": { + "key": "Device Model", + "parent": "cpld1", + "config": "LCMXO3LF-2100C-5BG256C", + "arrt_index": 1, + }, + "cpld1_vender": { + "key": "Vendor", + "parent": "cpld1", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld1_desc": { + "key": "Description", + "parent": "cpld1", + "config": "CPU CPLD", + "arrt_index": 3, + }, + "cpld1_version": { + "key": "Firmware Version", + "parent": "cpld1", + "reg": { + "loc": "/dev/port", + "offset": 0xa00, + "size": 4 + }, + "callback": "cpld_format", + "arrt_index": 4, + }, + + "cpld2": { + "key": "CPLD2", + "parent": "cpld", + "arrt_index": 2, + }, + "cpld2_model": { + "key": "Device Model", + "parent": "cpld2", + "config": "LCMXO3LF-2100C-5BG256C", + "arrt_index": 1, + }, + "cpld2_vender": { + "key": "Vendor", + "parent": "cpld2", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld2_desc": { + "key": "Description", + "parent": "cpld2", + "config": "SCM CPLD", + "arrt_index": 3, + }, + "cpld2_version": { + "key": "Firmware Version", + "parent": "cpld2", + "reg": { + "loc": "/dev/port", + "offset": 0x900, + "size": 4 + }, + "callback": "cpld_format", + "arrt_index": 4, + }, + "cpld2_boot": { + "parent": "cpld2", + "key": "Boot From", + "devfile": { + "loc": "/dev/cpld1", + "offset":0x06, + "len":1, + "bit_width":1 + }, + "decode": { + "01": "Main", + "02": "Golden" + }, + "arrt_index": 5, + }, + + "cpld3": { + "key": "CPLD3", + "parent": "cpld", + "arrt_index": 3, + }, + "cpld3_model": { + "key": "Device Model", + "parent": "cpld3", + "config": "LCMXO3LF-4300C-6BG324I", + "arrt_index": 1, + }, + "cpld3_vender": { + "key": "Vendor", + "parent": "cpld3", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld3_desc": { + "key": "Description", + "parent": "cpld3", + "config": "MCB CPLD", + "arrt_index": 3, + }, + "cpld3_version": { + "key": "Firmware Version", + "parent": "cpld3", + "i2c": { + "bus": "13", + "loc": "0x1d", + "offset": 0, + "size": 4 + }, + "callback": "cpld_format", + "arrt_index": 4, + }, + "cpld3_boot": { + "parent": "cpld3", + "key": "Boot From", + "devfile": { + "loc": "/dev/cpld3", + "offset":0x0d, + "len":1, + "bit_width":1 + }, + "decode": { + "01": "Main", + "02": "Golden" + }, + "arrt_index": 5, + }, + + "cpld4": { + "key": "CPLD4", + "parent": "cpld", + "arrt_index": 4, + }, + "cpld4_model": { + "key": "Device Model", + "parent": "cpld4", + "config": "LCMXO3LF-4300C-6BG324I", + "arrt_index": 1, + }, + "cpld4_vender": { + "key": "Vendor", + "parent": "cpld4", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld4_desc": { + "key": "Description", + "parent": "cpld4", + "config": "SMB CPLD", + "arrt_index": 3, + }, + "cpld4_version": { + "key": "Firmware Version", + "parent": "cpld4", + "i2c": { + "bus": "20", + "loc": "0x1e", + "offset": 0, + "size": 4 + }, + "callback": "cpld_format", + "arrt_index": 4, + }, + "cpld4_boot": { + "parent": "cpld4", + "key": "Boot From", + "devfile": { + "loc": "/dev/cpld4", + "offset":0x0d, + "len":1, + "bit_width":1 + }, + "decode": { + "01": "Main", + "02": "Golden" + }, + "arrt_index": 5, + }, + + "cpld5": { + "key": "CPLD5", + "parent": "cpld", + "arrt_index": 5, + }, + "cpld5_model": { + "key": "Device Model", + "parent": "cpld5", + "config": "LCMXO3LF-2100C-5BG256C", + "arrt_index": 1, + }, + "cpld5_vender": { + "key": "Vendor", + "parent": "cpld5", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld5_desc": { + "key": "Description", + "parent": "cpld5", + "config": "FCB_T CPLD", + "arrt_index": 3, + }, + "cpld5_version": { + "key": "Firmware Version", + "parent": "cpld5", + "i2c": { + "bus": "44", + "loc": "0x0d", + "offset": 0, + "size": 4 + }, + "callback": "cpld_format", + "arrt_index": 4, + }, + "cpld5_boot": { + "parent": "cpld5", + "key": "Boot From", + "devfile": { + "loc": "/dev/cpld5", + "offset":0x0d, + "len":1, + "bit_width":1 + }, + "decode": { + "01": "Main", + "02": "Golden" + }, + "arrt_index": 5, + }, + + "cpld6": { + "key": "CPLD6", + "parent": "cpld", + "arrt_index": 6, + }, + "cpld6_model": { + "key": "Device Model", + "parent": "cpld6", + "config": "LCMXO3LF-2100C-5BG256C", + "arrt_index": 1, + }, + "cpld6_vender": { + "key": "Vendor", + "parent": "cpld6", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld6_desc": { + "key": "Description", + "parent": "cpld6", + "config": "FCB_B CPLD", + "arrt_index": 3, + }, + "cpld6_version": { + "key": "Firmware Version", + "parent": "cpld6", + "i2c": { + "bus": "52", + "loc": "0x0d", + "offset": 0, + "size": 4 + }, + "callback": "cpld_format", + "arrt_index": 4, + }, + "cpld6_boot": { + "parent": "cpld6", + "key": "Boot From", + "devfile": { + "loc": "/dev/cpld6", + "offset":0x0d, + "len":1, + "bit_width":1 + }, + "decode": { + "01": "Main", + "02": "Golden" + }, + "arrt_index": 5, + }, + + + "psu": { + "key": "PSU", + "next": "fan" + }, + + "psu1": { + "parent": "psu", + "key": "PSU1", + "arrt_index": 1, + }, + "psu1_hw_version": { + "key": "Hardware Version", + "parent": "psu1", + "extra": { + "funcname": "getPsu", + "id": "psu1", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "psu1_fw_version": { + "key": "Firmware Version", + "parent": "psu1", + "config": "NA", + "arrt_index": 2, + }, + + "psu2": { + "parent": "psu", + "key": "PSU2", + "arrt_index": 2, + }, + "psu2_hw_version": { + "key": "Hardware Version", + "parent": "psu2", + "extra": { + "funcname": "getPsu", + "id": "psu2", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "psu2_fw_version": { + "key": "Firmware Version", + "parent": "psu2", + "config": "NA", + "arrt_index": 2, + }, + + "fan": { + "key": "FAN", + "next": "fpga" + }, + "fan1": { + "key": "FAN1", + "parent": "fan", + "arrt_index": 1, + }, + "fan1_hw_version": { + "key": "Hardware Version", + "parent": "fan1", + "extra": { + "funcname": "checkFan", + "id": "fan1", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan1_fw_version": { + "key": "Firmware Version", + "parent": "fan1", + "config": "NA", + "arrt_index": 2, + }, + + "fan2": { + "key": "FAN2", + "parent": "fan", + "arrt_index": 2, + }, + "fan2_hw_version": { + "key": "Hardware Version", + "parent": "fan2", + "extra": { + "funcname": "checkFan", + "id": "fan2", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan2_fw_version": { + "key": "Firmware Version", + "parent": "fan2", + "config": "NA", + "arrt_index": 2, + }, + + "fan3": { + "key": "FAN3", + "parent": "fan", + "arrt_index": 3, + }, + "fan3_hw_version": { + "key": "Hardware Version", + "parent": "fan3", + "extra": { + "funcname": "checkFan", + "id": "fan3", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan3_fw_version": { + "key": "Firmware Version", + "parent": "fan3", + "config": "NA", + "arrt_index": 2, + }, + + "fan4": { + "key": "FAN4", + "parent": "fan", + "arrt_index": 4, + }, + "fan4_hw_version": { + "key": "Hardware Version", + "parent": "fan4", + "extra": { + "funcname": "checkFan", + "id": "fan4", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan4_fw_version": { + "key": "Firmware Version", + "parent": "fan4", + "config": "NA", + "arrt_index": 2, + }, + + "fan5": { + "key": "FAN5", + "parent": "fan", + "arrt_index": 5, + }, + "fan5_hw_version": { + "key": "Hardware Version", + "parent": "fan5", + "extra": { + "funcname": "checkFan", + "id": "fan5", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan5_fw_version": { + "key": "Firmware Version", + "parent": "fan5", + "config": "NA", + "arrt_index": 2, + }, + + "fan6": { + "key": "FAN6", + "parent": "fan", + "arrt_index": 6, + }, + "fan6_hw_version": { + "key": "Hardware Version", + "parent": "fan6", + "extra": { + "funcname": "checkFan", + "id": "fan6", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan6_fw_version": { + "key": "Firmware Version", + "parent": "fan6", + "config": "NA", + "arrt_index": 2, + }, + + "fan7": { + "key": "FAN7", + "parent": "fan", + "arrt_index": 7, + }, + "fan7_hw_version": { + "key": "Hardware Version", + "parent": "fan7", + "extra": { + "funcname": "checkFan", + "id": "fan7", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan7_fw_version": { + "key": "Firmware Version", + "parent": "fan7", + "config": "NA", + "arrt_index": 2, + }, + + "fan8": { + "key": "FAN8", + "parent": "fan", + "arrt_index": 8, + }, + "fan8_hw_version": { + "key": "Hardware Version", + "parent": "fan8", + "extra": { + "funcname": "checkFan", + "id": "fan8", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan8_fw_version": { + "key": "Firmware Version", + "parent": "fan8", + "config": "NA", + "arrt_index": 2, + }, + + + "i210": { + "key": "NIC", + "next": "fpga" + }, + "i210_model": { + "parent": "i210", + "config": "NA", + "key": "Device Model", + "arrt_index": 1, + }, + "i210_vendor": { + "parent": "i210", + "config": "INTEL", + "key": "Vendor", + "arrt_index": 2, + }, + "i210_version": { + "parent": "i210", + "cmd": "ethtool -i eno1", + "pattern": r"firmware-version", + "separator": ":", + "key": "Firmware Version", + "arrt_index": 3, + }, + + "fpga": { + "key": "FPGA", + }, + + "fpga1": { + "key": "FPGA1", + "parent": "fpga", + "arrt_index": 1, + }, + "fpga1_model": { + "parent": "fpga1", + "config": "XC7A50T-2FGG484C", + "key": "Device Model", + "arrt_index": 1, + }, + "fpga1_vender": { + "parent": "fpga1", + "config": "XILINX", + "key": "Vendor", + "arrt_index": 2, + }, + "fpga1_desc": { + "key": "Description", + "parent": "fpga1", + "config": "IOB FPGA", + "arrt_index": 3, + }, + "fpga1_fw_version": { + "parent": "fpga1", + "devfile": { + "loc": "/dev/fpga0", + "offset": 0, + "len": 4, + "bit_width": 4 + }, + "key": "Firmware Version", + "arrt_index": 4, + }, + "fpga1_date": { + "parent": "fpga1", + "devfile": { + "loc": "/dev/fpga0", + "offset": 4, + "len": 4, + "bit_width": 4 + }, + "key": "Build Date", + "arrt_index": 5, + }, + "fpga1_boot": { + "parent": "fpga1", + "key": "Boot From", + "devfile": { + "loc": "/dev/fpga0", + "offset":0x00, + "len":1, + "bit_width":1 + }, + "decode": { + "00": "Golden", + "default": "Main" + }, + "arrt_index": 6, + }, + "fpga2": { + "key": "FPGA2", + "parent": "fpga", + "arrt_index": 2, + }, + "fpga2_model": { + "parent": "fpga2", + "config": "XC7A50T-2FGG484C", + "key": "Device Model", + "arrt_index": 1, + }, + "fpga2_vender": { + "parent": "fpga2", + "config": "XILINX", + "key": "Vendor", + "arrt_index": 2, + }, + "fpga2_desc": { + "key": "Description", + "parent": "fpga2", + "config": "DOM FPGA", + "arrt_index": 3, + }, + "fpga2_fw_version": { + "parent": "fpga2", + "devfile": { + "loc": "/dev/fpga1", + "offset": 0, + "len": 4, + "bit_width": 4 + }, + "key": "Firmware Version", + "arrt_index": 4, + }, + "fpga2_date": { + "parent": "fpga2", + "devfile": { + "loc": "/dev/fpga1", + "offset": 4, + "len": 4, + "bit_width": 4 + }, + "key": "Build Date", + "arrt_index": 5, + }, + "fpga2_boot": { + "parent": "fpga2", + "key": "Boot From", + "devfile": { + "loc": "/dev/fpga1", + "offset":0x00, + "len":1, + "bit_width":1 + }, + "decode": { + "00": "Golden", + "default": "Main" + }, + "arrt_index": 6, + }, +} + +PMON_SYSLOG_STATUS = { + "polling_time": 3, + "fans": { + "present": {"path": ["/sys/s3ip/fan/*/present"], "ABSENT": 0}, + "status": [ + {"path": "/sys/s3ip/fan/%s/motor1/status", 'okval': 1}, + {"path": "/sys/s3ip/fan/%s/motor2/status", 'okval': 1}, + ], + "nochangedmsgflag": 1, + "nochangedmsgtime": 60, + "noprintfirsttimeflag": 0, + "alias": { + "fan1": "FAN1", + "fan2": "FAN2", + "fan3": "FAN3", + "fan4": "FAN4", + "fan5": "FAN5", + "fan6": "FAN6", + "fan7": "FAN7", + "fan8": "FAN8" + } + }, + "psus": { + "present": {"path": ["/sys/s3ip/psu/*/present"], "ABSENT": 0}, + "status": [ + {"path": "/sys/s3ip/psu/%s/out_status", "okval": 1}, + {"path": "/sys/s3ip/psu/%s/alarm", "okval": 0}, + ], + "nochangedmsgflag": 1, + "nochangedmsgtime": 60, + "noprintfirsttimeflag": 0, + "alias": { + "psu1": "PSU1", + "psu2": "PSU2" + } + } +} + +##################### MAC Voltage adjust#################################### +MAC_DEFAULT_PARAM = [ + { + "name": "mac_core", # AVS name + "type": 0, # 1: used default value, if rov value not in range. 0: do nothing, if rov value not in range + "rov_source": 0, # 0: get rov value from cpld, 1: get rov value from SDK + "cpld_avs": {"bus": 20, "loc": 0x1e, "offset": 0x20, "gettype": "i2c"}, + "set_avs": { + "loc": "/sys/bus/i2c/devices/64-0040/hwmon/hwmon*/avs0_vout", + "gettype": "sysfs", "formula": "int((%f)*1000000)" + }, + "mac_avs_param": { + 0x92: 0.7471, + 0x90: 0.7600, + 0x8e: 0.7710, + 0x8c: 0.7839, + 0x8a: 0.7961, + 0x88: 0.8071, + 0x86: 0.8181, + 0x84: 0.8291, + 0x82: 0.8401 + } + } +] + +DRIVERLISTS = [ + {"name": "ice", "delay": 0, "removable": 0}, + {"name": "wb_i2c_i801", "delay": 1, "removable": 0}, + {"name": "i2c_dev", "delay": 0, "removable": 0}, + {"name": "wb_i2c_algo_bit", "delay": 0}, + {"name": "wb_i2c_gpio", "delay": 0}, + {"name": "i2c_mux", "delay": 0, "removable": 0}, + {"name": "wb_i2c_gpio_device gpio_sda=181 gpio_scl=180 gpio_chip_name=INTC3001:00 bus_num=1", "delay": 0}, + {"name": "platform_common dfd_my_type=0x40d9", "delay": 0}, + {"name": "wb_logic_dev_common", "delay":0}, + {"name": "wb_io_dev", "delay": 0}, + {"name": "wb_io_dev_device", "delay": 0}, + {"name": "wb_fpga_pcie", "delay": 0}, + {"name": "wb_pcie_dev", "delay": 0}, + {"name": "wb_pcie_dev_device", "delay": 0}, + {"name": "wb_i2c_dev", "delay": 0}, + {"name": "wb_i2c_ocores", "delay": 0}, + {"name": "wb_i2c_ocores_device", "delay": 0}, + {"name": "wb_i2c_mux_pca9641", "delay": 0}, + {"name": "wb_i2c_mux_pca954x", "delay": 0}, + {"name": "wb_i2c_mux_pca954x_device_b3", "delay": 1}, + {"name": "wb_i2c_dev_device", "delay": 1}, + {"name": "wb_lm75", "delay": 0}, + {"name": "wb_at24", "delay": 0}, + {"name": "wb_pmbus_core", "delay": 0}, + {"name": "wb_xdpe12284", "delay": 0}, + {"name": "wb_xdpe132g5c_pmbus", "delay": 0}, + {"name": "wb_csu550", "delay": 0}, + {"name": "wb_ina3221", "delay": 0}, + {"name": "wb_ucd9000", "delay": 0}, + {"name": "wb_xdpe132g5c", "delay": 0}, +# {"name": "firmware_driver_sysfs", "delay": 0}, + {"name": "wb_rc32312", "delay": 0}, + {"name": "s3ip_sysfs", "delay": 0}, + {"name": "wb_switch_driver", "delay": 0}, + {"name": "fan_device_driver", "delay": 0}, + {"name": "psu_device_driver", "delay": 0}, + {"name": "vol_sensor_device_driver", "delay": 0}, + {"name": "temp_sensor_device_driver", "delay": 0}, + {"name": "wb_spd", "delay": 0}, + {"name": "wb_lpc_bmc", "delay": 0}, +] + +DEVICE = [ + # eeprom + {"name": "wb_24c02", "bus": 1, "loc": 0x56}, + {"name": "wb_24c02", "bus": 1, "loc": 0x57}, + {"name": "wb_24c02", "bus": 2, "loc": 0x51}, + {"name": "wb_24c02", "bus": 3, "loc": 0x51}, + # SCM + {"name": "wb_24c02", "bus": 32, "loc": 0x52}, + {"name": "wb_ina3221", "bus": 33, "loc": 0x40}, + {"name": "wb_ina3221", "bus": 33, "loc": 0x41}, + {"name": "wb_ina3221", "bus": 33, "loc": 0x42}, + {"name": "wb_tmp275", "bus": 34, "loc": 0x4c}, + {"name": "wb_tmp275", "bus": 35, "loc": 0x4d}, + # CPU + {"name": "wb_ucd90160", "bus": 5, "loc": 0x5f}, + {"name": "wb_xdpe12284", "bus": 5, "loc": 0x5e}, + {"name": "wb_xdpe12284", "bus": 5, "loc": 0x68}, + {"name": "wb_xdpe12284", "bus": 5, "loc": 0x6e}, + {"name": "wb_xdpe12284", "bus": 5, "loc": 0x70}, + # fanA + {"name": "wb_tmp275", "bus": 8, "loc": 0x48}, + {"name": "wb_tmp275", "bus": 8, "loc": 0x49}, + {"name": "wb_24c64", "bus": 40, "loc": 0x50}, + {"name": "wb_24c64", "bus": 41, "loc": 0x50}, + {"name": "wb_24c64", "bus": 42, "loc": 0x50}, + {"name": "wb_24c64", "bus": 43, "loc": 0x50}, + # fanB + {"name": "wb_tmp275", "bus": 9, "loc": 0x48}, + {"name": "wb_tmp275", "bus": 9, "loc": 0x49}, + {"name": "wb_24c64", "bus": 48, "loc": 0x50}, + {"name": "wb_24c64", "bus": 49, "loc": 0x50}, + {"name": "wb_24c64", "bus": 50, "loc": 0x50}, + {"name": "wb_24c64", "bus": 51, "loc": 0x50}, + # psu + {"name": "wb_24c02", "bus": 10, "loc": 0x50}, + {"name": "wb_fsp1200", "bus": 10, "loc": 0x58}, + {"name": "wb_24c02", "bus": 11, "loc": 0x50}, + {"name": "wb_fsp1200", "bus": 11, "loc": 0x58}, + # MCB + {"name": "wb_ina3221", "bus": 12, "loc": 0x40}, + {"name": "wb_ina3221", "bus": 12, "loc": 0x41}, + {"name": "wb_24c02", "bus": 12, "loc": 0x57}, + # SMB + {"name": "wb_tmp275", "bus": 14, "loc": 0x48}, + {"name": "wb_tmp275", "bus": 14, "loc": 0x49}, + {"name": "wb_tmp275", "bus": 14, "loc": 0x4b}, + {"name": "wb_ina3221", "bus": 56, "loc": 0x40}, + {"name": "wb_ina3221", "bus": 56, "loc": 0x41}, + {"name": "wb_ina3221", "bus": 57, "loc": 0x40}, + {"name": "wb_ina3221", "bus": 58, "loc": 0x40}, + {"name": "wb_ina3221", "bus": 59, "loc": 0x40}, + {"name": "wb_ina3221", "bus": 60, "loc": 0x40}, + {"name": "wb_ina3221", "bus": 61, "loc": 0x40}, + {"name": "wb_ina3221", "bus": 62, "loc": 0x40}, + {"name": "wb_ina3221", "bus": 63, "loc": 0x40}, + {"name": "wb_xdpe132g5c_pmbus", "bus": 64, "loc": 0x40}, + {"name": "wb_xdpe132g5c_pmbus", "bus": 65, "loc": 0x40}, + {"name": "wb_xdpe132g5c_pmbus", "bus": 66, "loc": 0x40}, + # OE0 + {"name": "wb_xdpe12284", "bus": 67, "loc": 0x68}, + {"name": "wb_xdpe12284", "bus": 67, "loc": 0x70}, + {"name": "wb_xdpe12284", "bus": 67, "loc": 0x60}, + # OE7 + {"name": "wb_xdpe12284", "bus": 67, "loc": 0x66}, + {"name": "wb_xdpe12284", "bus": 67, "loc": 0x6e}, + {"name": "wb_xdpe12284", "bus": 67, "loc": 0x5e}, + # OE1 + {"name": "wb_xdpe12284", "bus": 68, "loc": 0x68}, + {"name": "wb_xdpe12284", "bus": 68, "loc": 0x70}, + {"name": "wb_xdpe12284", "bus": 68, "loc": 0x60}, + # OE2 + {"name": "wb_xdpe12284", "bus": 68, "loc": 0x66}, + {"name": "wb_xdpe12284", "bus": 68, "loc": 0x6e}, + {"name": "wb_xdpe12284", "bus": 68, "loc": 0x5e}, + # OE3 + {"name": "wb_xdpe12284", "bus": 69, "loc": 0x68}, + {"name": "wb_xdpe12284", "bus": 69, "loc": 0x70}, + {"name": "wb_xdpe12284", "bus": 69, "loc": 0x60}, + # OE4 + {"name": "wb_xdpe12284", "bus": 69, "loc": 0x66}, + {"name": "wb_xdpe12284", "bus": 69, "loc": 0x6e}, + {"name": "wb_xdpe12284", "bus": 69, "loc": 0x5e}, + # OE5 + {"name": "wb_xdpe12284", "bus": 70, "loc": 0x68}, + {"name": "wb_xdpe12284", "bus": 70, "loc": 0x70}, + {"name": "wb_xdpe12284", "bus": 70, "loc": 0x60}, + # OE6 + {"name": "wb_xdpe12284", "bus": 70, "loc": 0x66}, + {"name": "wb_xdpe12284", "bus": 70, "loc": 0x6e}, + {"name": "wb_xdpe12284", "bus": 70, "loc": 0x5e}, + # MAC_XDPE12284C_06 + {"name": "wb_xdpe12284", "bus": 71, "loc": 0x68}, + # fan DCDC + {"name": "wb_ina3221", "bus": 88, "loc": 0x42}, + {"name": "wb_ina3221", "bus": 89, "loc": 0x42}, + {"name": "wb_ina3221", "bus": 90, "loc": 0x42}, + # RC32312 + {"name": "wb_rc32312", "bus": 72, "loc": 0x09}, + {"name": "wb_24c64", "bus": 72, "loc": 0x50}, + {"name": "wb_rc32312", "bus": 73, "loc": 0x09}, + {"name": "wb_24c64", "bus": 73, "loc": 0x50}, + # xdpe132g5c i2c + {"name": "wb_xdpe132g5c", "bus": 64, "loc": 0x10}, + {"name": "wb_xdpe132g5c", "bus": 65, "loc": 0x10}, + {"name": "wb_xdpe132g5c", "bus": 66, "loc": 0x10}, +] + +OPTOE = [ + {"name": "wb_24c02", "startbus": 24, "endbus": 31}, +] + +REBOOT_CTRL_PARAM = {} + +INIT_PARAM_PRE = [ + # set ina3221 shunt_resistor + # SCM_VDD12.0_C + {"loc": "33-0041/hwmon/hwmon*/shunt1_resistor", "value": "1000"}, + # SCM_OCM_V12.0_C + {"loc": "33-0041/hwmon/hwmon*/shunt3_resistor", "value": "1000"}, + # MAC_PLL0_VDD0.9_C + {"loc": "56-0040/hwmon/hwmon*/shunt1_resistor", "value": "2000"}, + # MAC_PLL1_VDD0.9_C + {"loc": "56-0040/hwmon/hwmon*/shunt2_resistor", "value": "2000"}, + # MAC_PLL3_VDD0.9_C + {"loc": "61-0040/hwmon/hwmon*/shunt1_resistor", "value": "2000"}, + # MAC_PLL2_VDD0.9_C + {"loc": "61-0040/hwmon/hwmon*/shunt2_resistor", "value": "2000"}, + # FAN1_VDD12_C + {"loc": "88-0042/hwmon/hwmon*/shunt1_resistor", "value": "1000"}, + # FAN2_VDD12_C + {"loc": "88-0042/hwmon/hwmon*/shunt2_resistor", "value": "1000"}, + # FAN3_VDD12_C + {"loc": "88-0042/hwmon/hwmon*/shunt3_resistor", "value": "1000"}, + # FAN4_VDD12_C + {"loc": "89-0042/hwmon/hwmon*/shunt1_resistor", "value": "1000"}, + # FAN5_VDD12_C + {"loc": "89-0042/hwmon/hwmon*/shunt2_resistor", "value": "1000"}, + # FAN6_VDD12_C + {"loc": "89-0042/hwmon/hwmon*/shunt3_resistor", "value": "1000"}, + # FAN7_VDD12_C + {"loc": "90-0042/hwmon/hwmon*/shunt1_resistor", "value": "1000"}, + # FAN8_VDD12_C + {"loc": "90-0042/hwmon/hwmon*/shunt2_resistor", "value": "1000"}, + # set avs threshold + # MAC_CORE_V + {"loc": "64-0040/hwmon/hwmon*/avs0_vout_min", "value": "630000"}, + {"loc": "64-0040/hwmon/hwmon*/avs0_vout_max", "value": "858000"}, + # MAC_ANALOG0 V0.9_V + {"loc": "65-0040/hwmon/hwmon*/avs0_vout_min", "value": "810000"}, + {"loc": "65-0040/hwmon/hwmon*/avs0_vout_max", "value": "990000"}, + # MAC_ANALOG0 V0.75_V + {"loc": "65-0040/hwmon/hwmon*/avs1_vout_min", "value": "675000"}, + {"loc": "65-0040/hwmon/hwmon*/avs1_vout_max", "value": "825000"}, + # MAC_ANALOG1 V0.9_V + {"loc": "66-0040/hwmon/hwmon*/avs0_vout_min", "value": "810000"}, + {"loc": "66-0040/hwmon/hwmon*/avs0_vout_max", "value": "990000"}, + # MAC_ANALOG1 V0.75_V + {"loc": "66-0040/hwmon/hwmon*/avs1_vout_min", "value": "675000"}, + {"loc": "66-0040/hwmon/hwmon*/avs1_vout_max", "value": "825000"}, + # # OE0_AVDD_RX_1.8_V + # {"loc": "67-0070/hwmon/hwmon*/avs0_vout_min", "value": "1710000"}, + # {"loc": "67-0070/hwmon/hwmon*/avs0_vout_max", "value": "1890000"}, + # {"loc": "67-0070/hwmon/hwmon*/avs0_vout", "value": "1800000"}, + # # OE0_AVDD_RX_1.2_V + # {"loc": "67-0070/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "67-0070/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "67-0070/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE0_AVDD_TX_1.8_V + # {"loc": "67-0068/hwmon/hwmon*/avs0_vout_min", "value": "1750000"}, + # {"loc": "67-0068/hwmon/hwmon*/avs0_vout_max", "value": "1950000"}, + # {"loc": "67-0068/hwmon/hwmon*/avs0_vout", "value": "1850000"}, + # # OE0_AVDD_TX_1.2_V + # {"loc": "67-0068/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "67-0068/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "67-0068/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE0_AVDD_TRX_0.75_V + # {"loc": "67-0060/hwmon/hwmon*/avs0_vout_min", "value": "713000"}, + # {"loc": "67-0060/hwmon/hwmon*/avs0_vout_max", "value": "788000"}, + # {"loc": "67-0060/hwmon/hwmon*/avs0_vout", "value": "750000"}, + # # OE1_AVDD_RX_1.8_V + # {"loc": "68-0070/hwmon/hwmon*/avs0_vout_min", "value": "1710000"}, + # {"loc": "68-0070/hwmon/hwmon*/avs0_vout_max", "value": "1890000"}, + # {"loc": "68-0070/hwmon/hwmon*/avs0_vout", "value": "1800000"}, + # # OE1_AVDD_RX_1.2_V + # {"loc": "68-0070/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "68-0070/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "68-0070/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE1_AVDD_TX_1.8_V + # {"loc": "68-0068/hwmon/hwmon*/avs0_vout_min", "value": "1750000"}, + # {"loc": "68-0068/hwmon/hwmon*/avs0_vout_max", "value": "1950000"}, + # {"loc": "68-0068/hwmon/hwmon*/avs0_vout", "value": "1850000"}, + # # OE1_AVDD_TX_1.2_V + # {"loc": "68-0068/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "68-0068/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "68-0068/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE1_AVDD_TRX_0.75_V + # {"loc": "68-0060/hwmon/hwmon*/avs0_vout_min", "value": "713000"}, + # {"loc": "68-0060/hwmon/hwmon*/avs0_vout_max", "value": "788000"}, + # {"loc": "68-0060/hwmon/hwmon*/avs0_vout", "value": "750000"}, + # # OE2_AVDD_RX_1.8_V + # {"loc": "68-006e/hwmon/hwmon*/avs0_vout_min", "value": "1710000"}, + # {"loc": "68-006e/hwmon/hwmon*/avs0_vout_max", "value": "1890000"}, + # {"loc": "68-006e/hwmon/hwmon*/avs0_vout", "value": "1800000"}, + # # OE2_AVDD_RX_1.2_V + # {"loc": "68-006e/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "68-006e/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "68-006e/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE2_AVDD_TX_1.8_V + # {"loc": "68-0066/hwmon/hwmon*/avs0_vout_min", "value": "1750000"}, + # {"loc": "68-0066/hwmon/hwmon*/avs0_vout_max", "value": "1950000"}, + # {"loc": "68-0066/hwmon/hwmon*/avs0_vout", "value": "1850000"}, + # # OE2_AVDD_TX_1.2_V + # {"loc": "68-0066/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "68-0066/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "68-0066/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE2_AVDD_TRX_0.75_V + # {"loc": "68-005e/hwmon/hwmon*/avs0_vout_min", "value": "713000"}, + # {"loc": "68-005e/hwmon/hwmon*/avs0_vout_max", "value": "788000"}, + # {"loc": "68-005e/hwmon/hwmon*/avs0_vout", "value": "750000"}, + # # OE3_AVDD_RX_1.8_V + # {"loc": "69-0070/hwmon/hwmon*/avs0_vout_min", "value": "1710000"}, + # {"loc": "69-0070/hwmon/hwmon*/avs0_vout_max", "value": "1890000"}, + # {"loc": "69-0070/hwmon/hwmon*/avs0_vout", "value": "1800000"}, + # # OE3_AVDD_RX_1.2_V + # {"loc": "69-0070/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "69-0070/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "69-0070/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE3_AVDD_TX_1.8_V + # {"loc": "69-0068/hwmon/hwmon*/avs0_vout_min", "value": "1750000"}, + # {"loc": "69-0068/hwmon/hwmon*/avs0_vout_max", "value": "1950000"}, + # {"loc": "69-0068/hwmon/hwmon*/avs0_vout", "value": "1850000"}, + # # OE3_AVDD_TX_1.2_V + # {"loc": "69-0068/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "69-0068/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "69-0068/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE3_AVDD_TRX_0.75_V + # {"loc": "69-0060/hwmon/hwmon*/avs0_vout_min", "value": "713000"}, + # {"loc": "69-0060/hwmon/hwmon*/avs0_vout_max", "value": "788000"}, + # {"loc": "69-0060/hwmon/hwmon*/avs0_vout", "value": "750000"}, + # # OE4_AVDD_RX_1.8_V + # {"loc": "69-006e/hwmon/hwmon*/avs0_vout_min", "value": "1710000"}, + # {"loc": "69-006e/hwmon/hwmon*/avs0_vout_max", "value": "1890000"}, + # {"loc": "69-006e/hwmon/hwmon*/avs0_vout", "value": "1800000"}, + # # OE4_AVDD_RX_1.2_V + # {"loc": "69-006e/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "69-006e/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "69-006e/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE4_AVDD_TX_1.8_V + # {"loc": "69-0066/hwmon/hwmon*/avs0_vout_min", "value": "1750000"}, + # {"loc": "69-0066/hwmon/hwmon*/avs0_vout_max", "value": "1950000"}, + # {"loc": "69-0066/hwmon/hwmon*/avs0_vout", "value": "1850000"}, + # # OE4_AVDD_TX_1.2_V + # {"loc": "69-0066/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "69-0066/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "69-0066/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE4_AVDD_TRX_0.75_V + # {"loc": "69-005e/hwmon/hwmon*/avs0_vout_min", "value": "713000"}, + # {"loc": "69-005e/hwmon/hwmon*/avs0_vout_max", "value": "788000"}, + # {"loc": "69-005e/hwmon/hwmon*/avs0_vout", "value": "750000"}, + # # OE5_AVDD_RX_1.8_V + # {"loc": "70-0070/hwmon/hwmon*/avs0_vout_min", "value": "1710000"}, + # {"loc": "70-0070/hwmon/hwmon*/avs0_vout_max", "value": "1890000"}, + # {"loc": "70-0070/hwmon/hwmon*/avs0_vout", "value": "1800000"}, + # # OE5_AVDD_RX_1.2_V + # {"loc": "70-0070/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "70-0070/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "70-0070/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE5_AVDD_TX_1.8_V + # {"loc": "70-0068/hwmon/hwmon*/avs0_vout_min", "value": "1750000"}, + # {"loc": "70-0068/hwmon/hwmon*/avs0_vout_max", "value": "1950000"}, + # {"loc": "70-0068/hwmon/hwmon*/avs0_vout", "value": "1850000"}, + # # OE5_AVDD_TX_1.2_V + # {"loc": "70-0068/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "70-0068/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "70-0068/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE5_AVDD_TRX_0.75_V + # {"loc": "70-0060/hwmon/hwmon*/avs0_vout_min", "value": "713000"}, + # {"loc": "70-0060/hwmon/hwmon*/avs0_vout_max", "value": "788000"}, + # {"loc": "70-0060/hwmon/hwmon*/avs0_vout", "value": "750000"}, + # # OE6_AVDD_RX_1.8_V + # {"loc": "70-006e/hwmon/hwmon*/avs0_vout_min", "value": "1710000"}, + # {"loc": "70-006e/hwmon/hwmon*/avs0_vout_max", "value": "1890000"}, + # {"loc": "70-006e/hwmon/hwmon*/avs0_vout", "value": "1800000"}, + # # OE6_AVDD_RX_1.2_V + # {"loc": "70-006e/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "70-006e/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "70-006e/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE6_AVDD_TX_1.8_V + # {"loc": "70-0066/hwmon/hwmon*/avs0_vout_min", "value": "1750000"}, + # {"loc": "70-0066/hwmon/hwmon*/avs0_vout_max", "value": "1950000"}, + # {"loc": "70-0066/hwmon/hwmon*/avs0_vout", "value": "1850000"}, + # # OE6_AVDD_TX_1.2_V + # {"loc": "70-0066/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "70-0066/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "70-0066/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE6_AVDD_TRX_0.75_V + # {"loc": "70-005e/hwmon/hwmon*/avs0_vout_min", "value": "713000"}, + # {"loc": "70-005e/hwmon/hwmon*/avs0_vout_max", "value": "788000"}, + # {"loc": "70-005e/hwmon/hwmon*/avs0_vout", "value": "750000"}, + # # OE7_AVDD_RX_1.8_V + # {"loc": "67-006e/hwmon/hwmon*/avs0_vout_min", "value": "1710000"}, + # {"loc": "67-006e/hwmon/hwmon*/avs0_vout_max", "value": "1890000"}, + # {"loc": "67-006e/hwmon/hwmon*/avs0_vout", "value": "1800000"}, + # # OE7_AVDD_RX_1.2_V + # {"loc": "67-006e/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "67-006e/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "67-006e/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE7_AVDD_TX_1.8_V + # {"loc": "67-0066/hwmon/hwmon*/avs0_vout_min", "value": "1750000"}, + # {"loc": "67-0066/hwmon/hwmon*/avs0_vout_max", "value": "1950000"}, + # {"loc": "67-0066/hwmon/hwmon*/avs0_vout", "value": "1850000"}, + # # OE7_AVDD_TX_1.2_V + # {"loc": "67-0066/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "67-0066/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "67-0066/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE7_AVDD_TRX_0.75_V + # {"loc": "67-005e/hwmon/hwmon*/avs0_vout_min", "value": "713000"}, + # {"loc": "67-005e/hwmon/hwmon*/avs0_vout_max", "value": "788000"}, + # {"loc": "67-005e/hwmon/hwmon*/avs0_vout", "value": "750000"}, + # RLML_VDD V3.3_V *1.5 + {"loc": "71-0068/hwmon/hwmon*/avs0_vout_min", "value": "1980000"}, + {"loc": "71-0068/hwmon/hwmon*/avs0_vout_max", "value": "2420000"}, + # RLMH_VDD V3.3_V *1.5 + {"loc": "71-0068/hwmon/hwmon*/avs1_vout_min", "value": "1980000"}, + {"loc": "71-0068/hwmon/hwmon*/avs1_vout_max", "value": "2420000"}, + # OCM_XDPE_VCCIN_V + {"loc": "5-0070/hwmon/hwmon*/avs0_vout_min", "value": "1350000"}, + {"loc": "5-0070/hwmon/hwmon*/avs0_vout_max", "value": "2200000"}, + # OCM_XDPE_P1V8_V + {"loc": "5-0070/hwmon/hwmon*/avs1_vout_min", "value": "1690000"}, + {"loc": "5-0070/hwmon/hwmon*/avs1_vout_max", "value": "1910000"}, + # OCM_XDPE_P1V05_V + {"loc": "5-006e/hwmon/hwmon*/avs0_vout_min", "value": "954000"}, + {"loc": "5-006e/hwmon/hwmon*/avs0_vout_max", "value": "1160000"}, + # OCM_XDPE_VNN_PCH_V + {"loc": "5-006e/hwmon/hwmon*/avs1_vout_min", "value": "540000"}, + {"loc": "5-006e/hwmon/hwmon*/avs1_vout_max", "value": "1320000"}, + # OCM_XDPE_VNN_NAC_V + {"loc": "5-0068/hwmon/hwmon*/avs0_vout_min", "value": "540000"}, + {"loc": "5-0068/hwmon/hwmon*/avs0_vout_max", "value": "1320000"}, + # OCM_XDPE_VCC_ANA_V + {"loc": "5-0068/hwmon/hwmon*/avs1_vout_min", "value": "900000"}, + {"loc": "5-0068/hwmon/hwmon*/avs1_vout_max", "value": "1100000"}, + # OCM_XDPE_P1V2_VDDQ_V + {"loc": "5-005e/hwmon/hwmon*/avs0_vout_min", "value": "1120000"}, + {"loc": "5-005e/hwmon/hwmon*/avs0_vout_max", "value": "1280000"}, +] + +INIT_PARAM = [] + +INIT_COMMAND_PRE = [] + +INIT_COMMAND = [ + # enable fan watchdog + {"path": "/dev/cpld5", "offset": 0x22, "value": [0x01], "gettype": "devfile"}, + {"path": "/dev/cpld6", "offset": 0x22, "value": [0x01], "gettype": "devfile"}, +] + +UPGRADE_SUMMARY = { + "devtype": 0x40d9, + + "slot0": { + "subtype": 0, + "SPI-LOGIC-DEV": { + "chain1":{ + "name":"IOB_FPGA", + "is_support_warm_upg":0, + "init_cmd": [ + # firmware upgrade set sysled blue/amber alternate flashing + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x50, "value": [0x01]} + ] + }, + "chain2":{ + "name":"DOM_FPGA", + "is_support_warm_upg":0, + "init_cmd": [ + # firmware upgrade set sysled blue/amber alternate flashing + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x50, "value": [0x01]} + ] + }, + "chain3":{ + "name":"SCM_CPLD", + "is_support_warm_upg":0, + "init_cmd": [ + # firmware upgrade set sysled blue/amber alternate flashing + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x50, "value": [0x01]} + ] + }, + "chain4":{ + "name":"MCB_CPLD", + "is_support_warm_upg":0, + "init_cmd": [ + # firmware upgrade set sysled blue/amber alternate flashing + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x50, "value": [0x01]} + ] + }, + "chain5":{ + "name":"SMB_CPLD", + "is_support_warm_upg":0, + "init_cmd": [ + # firmware upgrade set sysled blue/amber alternate flashing + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x50, "value": [0x01]} + ] + }, + "chain6":{ + "name":"FCB_B_CPLD", + "is_support_warm_upg":0, + "init_cmd": [ + # firmware upgrade set sysled blue/amber alternate flashing + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x50, "value": [0x01]} + ] + }, + "chain7":{ + "name":"FCB_T_CPLD", + "is_support_warm_upg":0, + "init_cmd": [ + # firmware upgrade set sysled blue/amber alternate flashing + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x50, "value": [0x01]} + ] + }, + "chain8":{ + "name":"MAC_PCIe", + "is_support_warm_upg":0, + "init_cmd": [ + # firmware upgrade set sysled blue/amber alternate flashing + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x50, "value": [0x01]} + ] + }, + }, + + "TEST": { + "fpga": [ + {"chain": 1, "file": "/etc/.upgrade_test/0x40d9/iob_fpga_test_header.bin", "display_name": "IOB_FPGA"}, + {"chain": 2, "file": "/etc/.upgrade_test/0x40d9/dom_fpga_test_header.bin", "display_name": "DOM_FPGA"}, + ], + "cpld": [ + {"chain": 3, "file": "/etc/.upgrade_test/0x40d9/scm_cpld_spi_test_header.bin", "display_name": "SCM_CPLD_SPI"}, + {"chain": 4, "file": "/etc/.upgrade_test/0x40d9/mcb_cpld_spi_test_header.bin", "display_name": "MCB_CPLD_SPI"}, + {"chain": 5, "file": "/etc/.upgrade_test/0x40d9/smb_cpld_spi_test_header.bin", "display_name": "SMB_CPLD_SPI"}, + {"chain": 6, "file": "/etc/.upgrade_test/0x40d9/fcb_b_cpld_spi_test_header.bin", "display_name": "FCB_B_CPLD_SPI"}, + {"chain": 7, "file": "/etc/.upgrade_test/0x40d9/fcb_t_cpld_spi_test_header.bin", "display_name": "FCB_T_CPLD_SPI"}, + #{"chain": 8, "file": "/etc/.upgrade_test/0x40d9/mac_pcie_spi_test_header.bin", "display_name": "MAC_PCIe"}, + ], + }, + }, + + "BMC": { + "name": "BMC", + "init_cmd": [ + # firmware upgrade set sysled blue/amber alternate flashing + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x50, "value": [0x01]} + ], + "finish_cmd": [], + }, +} + +PLATFORM_E2_CONF = { + "fan": [ + {"name": "fan1", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/40-0050/eeprom"}, + {"name": "fan2", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/48-0050/eeprom"}, + {"name": "fan3", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/41-0050/eeprom"}, + {"name": "fan4", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/49-0050/eeprom"}, + {"name": "fan5", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/42-0050/eeprom"}, + {"name": "fan6", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/50-0050/eeprom"}, + {"name": "fan7", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/43-0050/eeprom"}, + {"name": "fan8", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/51-0050/eeprom"}, + ], + "psu": [ + {"name": "psu1", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/11-0050/eeprom"}, + {"name": "psu2", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/10-0050/eeprom"}, + ], + "syseeprom": [ + {"name": "syseeprom", "e2_type": "onie_tlv", "e2_path": "/sys/bus/i2c/devices/1-0056/eeprom"}, + ], + "scm": [ + {"name": "scm", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/32-0052/eeprom"}, + ], + "smb": [ + {"name": "smb", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/3-0051/eeprom"}, + ], + "chassis": [ + {"name": "chassis", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/2-0051/eeprom"}, + ], +} + +PLATFORM_POWER_CONF = [ + { + "name": "Input power total", + "unit": "W", + "children": [ + { + "name": "PSU1 input", + "pre_check": { + "loc": "/sys/s3ip/psu/psu1/present", + "gettype": "sysfs", "mask": 0x01, "okval": 1, + "not_ok_msg": "ABSENT" + }, + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/11-0058/hwmon/hwmon*/power1_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)/1000000)" + }, + { + "name": "PSU2 input", + "pre_check": { + "loc": "/sys/s3ip/psu/psu2/present", + "gettype": "sysfs", "mask": 0x01, "okval": 1, + "not_ok_msg": "ABSENT" + }, + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/10-0058/hwmon/hwmon*/power1_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)/1000000)" + }, + ] + }, + { + "name": "Output power total", + "unit": "W", + "children": [ + { + "name": "PSU1 output", + "pre_check": { + "loc": "/sys/s3ip/psu/psu1/present", + "gettype": "sysfs", "mask": 0x01, "okval": 1, + "not_ok_msg": "ABSENT" + }, + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/11-0058/hwmon/hwmon*/power2_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)/1000000)" + }, + { + "name": "PSU2 output", + "pre_check": { + "loc": "/sys/s3ip/psu/psu2/present", + "gettype": "sysfs", "mask": 0x01, "okval": 1, + "not_ok_msg": "ABSENT" + }, + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/10-0058/hwmon/hwmon*/power2_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)/1000000)" + }, + ] + }, + { + "name": "MAC power consumption", + "unit": "W", + "children": [ + { + "name": "MAC_CORE", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/64-0040/hwmon/hwmon*/power3_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*2/1000000)" + }, + { + "name": "MAC_ANALOG0 V0.9", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/65-0040/hwmon/hwmon*/power3_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)/1000000)" + }, + { + "name": "MAC_ANALOG0 V0.75", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/65-0040/hwmon/hwmon*/power4_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)/1000000)" + }, + { + "name": "MAC_ANALOG1 V0.9", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/66-0040/hwmon/hwmon*/power3_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)/1000000)" + }, + { + "name": "MAC_ANALOG1 V0.75", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/66-0040/hwmon/hwmon*/power4_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)/1000000)" + }, + { + "name": "MAC_PLL0_VDD0.9", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/56-0040/hwmon/hwmon*/in2_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/56-0040/hwmon/hwmon*/curr2_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "MAC_PLL1_VDD0.9", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/56-0040/hwmon/hwmon*/in1_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/56-0040/hwmon/hwmon*/curr1_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "MAC_PLL2_VDD0.9", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/58-0040/hwmon/hwmon*/in1_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/58-0040/hwmon/hwmon*/curr1_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "MAC_PLL3_VDD0.9", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/58-0040/hwmon/hwmon*/in3_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/58-0040/hwmon/hwmon*/curr3_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "MAC_VDD_0.8", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/58-0040/hwmon/hwmon*/in2_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/58-0040/hwmon/hwmon*/curr2_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "MAC_VDD_1.8", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/60-0040/hwmon/hwmon*/in1_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/60-0040/hwmon/hwmon*/curr1_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "MAC_VDD_1.5", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/60-0040/hwmon/hwmon*/in2_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/60-0040/hwmon/hwmon*/curr2_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "MAC_VDD_1.2", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/61-0040/hwmon/hwmon*/in1_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/61-0040/hwmon/hwmon*/curr1_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + } + ] + }, + { + "name": "CPO OE0 power consumption", + "unit": "W", + "children": [ + { + "name": "OE0_AVDD_RX_1.8", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/67-0070/hwmon/hwmon*/loopa_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/67-0070/hwmon/hwmon*/loopa_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.97+220)/1000000)" + }, + { + "name": "OE0_AVDD_RX_1.2", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/67-0070/hwmon/hwmon*/loopb_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/67-0070/hwmon/hwmon*/loopb_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.984+180)/1000000)" + }, + { + "name": "OE0_AVDD_TX_1.8", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/67-0068/hwmon/hwmon*/loopa_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/67-0068/hwmon/hwmon*/loopa_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.984+177)/1000000)" + }, + { + "name": "OE0_AVDD_TX_1.2", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/67-0068/hwmon/hwmon*/loopb_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/67-0068/hwmon/hwmon*/loopb_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.974+126)/1000000)" + }, + { + "name": "OE0_AVDD_TRX_0.75", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/67-0060/hwmon/hwmon*/loopa_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/67-0060/hwmon/hwmon*/loopa_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.984+140)/1000000)" + }, + ] + }, + { + "name": "CPO OE1 power consumption", + "unit": "W", + "children": [ + { + "name": "OE1_AVDD_RX_1.8", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/68-0070/hwmon/hwmon*/loopa_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/68-0070/hwmon/hwmon*/loopa_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.97+220)/1000000)" + }, + { + "name": "OE1_AVDD_RX_1.2", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/68-0070/hwmon/hwmon*/loopb_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/68-0070/hwmon/hwmon*/loopb_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.984+180)/1000000)" + }, + { + "name": "OE1_AVDD_TX_1.8", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/68-0068/hwmon/hwmon*/loopa_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/68-0068/hwmon/hwmon*/loopa_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.984+177)/1000000)" + }, + { + "name": "OE1_AVDD_TX_1.2", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/68-0068/hwmon/hwmon*/loopb_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/68-0068/hwmon/hwmon*/loopb_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.974+126)/1000000)" + }, + { + "name": "OE1_AVDD_TRX_0.75", + "val_conf": [ + { + "gettype": "sysfs", + "loc": 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"/sys/bus/i2c/devices/88-0042/hwmon/hwmon*/curr2_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "FAN4 power consumption", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/89-0042/hwmon/hwmon*/in3_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/89-0042/hwmon/hwmon*/curr3_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "FAN5 power consumption", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/88-0042/hwmon/hwmon*/in3_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/88-0042/hwmon/hwmon*/curr3_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "FAN6 power consumption", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/90-0042/hwmon/hwmon*/in1_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/90-0042/hwmon/hwmon*/curr1_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "FAN7 power consumption", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/89-0042/hwmon/hwmon*/in1_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/89-0042/hwmon/hwmon*/curr1_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "FAN8 power consumption", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/90-0042/hwmon/hwmon*/in2_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/90-0042/hwmon/hwmon*/curr2_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + + ] + }, +] + +REBOOT_CAUSE_PARA = { + "reboot_cause_list": [ + { + "name": "otp_switch_reboot", + "monitor_point": {"gettype": "file_exist", "judge_file": "/etc/.otp_switch_reboot_flag", "okval": True}, + "record": [ + {"record_type": "file", "mode": "cover", "log": "Thermal Overload: ASIC, ", + "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"}, + {"record_type": "file", "mode": "add", "log": "Thermal Overload: ASIC, ", + "path": "/etc/sonic/.reboot/.history-reboot-cause.txt", "file_max_size": 1 * 1024 * 1024} + ], + "finish_operation": [ + {"gettype": "cmd", "cmd": "rm -rf /etc/.otp_switch_reboot_flag"}, + ] + }, + { + "name": "otp_other_reboot", + "monitor_point": {"gettype": "file_exist", "judge_file": "/etc/.otp_other_reboot_flag", "okval": True}, + "record": [ + {"record_type": "file", "mode": "cover", "log": "Thermal Overload: Other, ", + "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"}, + {"record_type": "file", "mode": "add", "log": "Thermal Overload: Other, ", + "path": "/etc/sonic/.reboot/.history-reboot-cause.txt", "file_max_size": 1 * 1024 * 1024} + ], + "finish_operation": [ + {"gettype": "cmd", "cmd": "rm -rf /etc/.otp_other_reboot_flag"}, + ] + }, + ], + "other_reboot_cause_record": [ + {"record_type": "file", "mode": "cover", "log": "Other, ", "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"}, + {"record_type": "file", "mode": "add", "log": "Other, ", "path": "/etc/sonic/.reboot/.history-reboot-cause.txt"} + ], +} + +POWER_CTRL_CONF = { + "oe": [ + { + "name": "OE0", + "status": [ + { + "val_conf": {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x22, "mask": 0x01}, + "off": [0x00], + "on": [0x01], + } + ], + "on": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfe, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_7", "value": 0x00, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x81, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_7", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfe, "value": 0x01, "delay": 0.001}, + ], + "off": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfe, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_7", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x81, "value": 0xfe}, + ], + "cycle": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfe, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_7", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x81, "value": 0xfe, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x81, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_7", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfe, "value": 0x01, "delay": 0.001}, + ], + "reset": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfe, "value": 0x00}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfe, "value": 0x01, "delay": 0.01}, + ], + }, + { + "name": "OE1", + "status": [ + { + "val_conf": {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x22, "mask": 0x02}, + "off": [0x00], + "on": [0x02], + } + ], + "on": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfd, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_4", "value": 0x00, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x82, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_4", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfd, "value": 0x02, "delay": 0.001}, + ], + "off": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfd, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_4", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x82, "value": 0xfe}, + ], + "cycle": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfd, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_4", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x82, "value": 0xfe, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x82, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_4", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfd, "value": 0x02, "delay": 0.001}, + ], + "reset": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfd, "value": 0x00}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfd, "value": 0x02, "delay": 0.01}, + ], + }, + { + "name": "OE2", + "status": [ + { + "val_conf": {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x22, "mask": 0x04}, + "off": [0x00], + "on": [0x04], + } + ], + "on": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfb, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_3", "value": 0x00, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x83, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_3", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfb, "value": 0x04, "delay": 0.001}, + ], + "off": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfb, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_3", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x83, "value": 0xfe}, + ], + "cycle": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfb, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_3", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x83, "value": 0xfe, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x83, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_3", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfb, "value": 0x04, "delay": 0.001}, + ], + "reset": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfb, "value": 0x00}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfb, "value": 0x04, "delay": 0.01}, + ], + }, + { + "name": "OE3", + "status": [ + { + "val_conf": {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x22, "mask": 0x08}, + "off": [0x00], + "on": [0x08], + } + ], + "on": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xf7, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_0", "value": 0x00, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x84, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_0", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xf7, "value": 0x08, "delay": 0.001}, + ], + "off": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xf7, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_0", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x84, "value": 0xfe}, + ], + "cycle": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xf7, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_0", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x84, "value": 0xfe, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x84, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_0", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xf7, "value": 0x08, "delay": 0.001}, + ], + "reset": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xf7, "value": 0x00}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xf7, "value": 0x08, "delay": 0.01}, + ], + }, + { + "name": "OE4", + "status": [ + { + "val_conf": {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x22, "mask": 0x10}, + "off": [0x00], + "on": [0x10], + } + ], + "on": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xef, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_1", "value": 0x00, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x85, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_1", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xef, "value": 0x10, "delay": 0.001}, + ], + "off": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xef, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_1", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x85, "value": 0xfe}, + ], + "cycle": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xef, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_1", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x85, "value": 0xfe, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x85, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_1", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xef, "value": 0x10, "delay": 0.001}, + ], + "reset": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xef, "value": 0x00}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xef, "value": 0x10, "delay": 0.01}, + ], + }, + { + "name": "OE5", + "status": [ + { + "val_conf": {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x22, "mask": 0x20}, + "off": [0x00], + "on": [0x20], + } + ], + "on": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xdf, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_3", "value": 0x00, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x86, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_3", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xdf, "value": 0x20, "delay": 0.001}, + ], + "off": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xdf, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_3", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x86, "value": 0xfe}, + ], + "cycle": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xdf, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_3", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x86, "value": 0xfe, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x86, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_3", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xdf, "value": 0x20, "delay": 0.001}, + ], + "reset": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xdf, "value": 0x00}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xdf, "value": 0x20, "delay": 0.01}, + ], + }, + { + "name": "OE6", + "status": [ + { + "val_conf": {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x22, "mask": 0x40}, + "off": [0x00], + "on": [0x40], + } + ], + "on": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xbf, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_4", "value": 0x00, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x87, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_4", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xbf, "value": 0x40, "delay": 0.001}, + ], + "off": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xbf, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_4", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x87, "value": 0xfe}, + ], + "cycle": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xbf, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_4", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x87, "value": 0xfe, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x87, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_4", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xbf, "value": 0x40, "delay": 0.001}, + ], + "reset": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xbf, "value": 0x00}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xbf, "value": 0x40, "delay": 0.01}, + ], + }, + { + "name": "OE7", + "status": [ + { + "val_conf": {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x22, "mask": 0x80}, + "off": [0x00], + "on": [0x80], + } + ], + "on": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0x7f, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_7", "value": 0x00, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x88, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_7", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0x7f, "value": 0x80, "delay": 0.001}, + ], + "off": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0x7f, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_7", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x88, "value": 0xfe}, + ], + "cycle": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0x7f, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_7", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x88, "value": 0xfe, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x88, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_7", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0x7f, "value": 0x80, "delay": 0.001}, + ], + "reset": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0x7f, "value": 0x00}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0x7f, "value": 0x80, "delay": 0.01}, + ], + } + ] +} + +SET_FW_MAC_CONF = [ + { + "name": "eth0", + "e2_name": "syseeprom", + "get_act_mac": {"cmd": "ethtool -e eth0 offset 0 length 6 |grep 0x0000 | awk -F':' '{gsub(/ /, \":\", $2);print $2}'| sed 's/^[[:space:]]*//' | sed 's/:\s*$//'", "gettype": "cmd_str"}, + "set_mac_cfg": { + "type": 1, + "cmd": {"cmd": "ethtool -E eth0 magic 0x15338086 offset %s value 0x%s length 1", "gettype": "cmd", "delay": 0.1}, + }, + "check_mac_cfg": {"cmd": "ethtool -e eth0 offset 0 length 6 |grep 0x0000 | awk -F':' '{gsub(/ /, \":\", $2);print $2}'| sed 's/^[[:space:]]*//' | sed 's/:\s*$//'", "gettype": "cmd_str"}, + } +] + +SET_MAC_CONF = SET_FW_MAC_CONF +PRODUCT_NAME_CONF = {} diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/config/x86_64_micas_m2_w6940_128x1_fr4_r0_0x40d9_v01_ac_config.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/config/x86_64_micas_m2_w6940_128x1_fr4_r0_0x40d9_v01_ac_config.py new file mode 100755 index 00000000000..c2e60c14b32 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/config/x86_64_micas_m2_w6940_128x1_fr4_r0_0x40d9_v01_ac_config.py @@ -0,0 +1,3224 @@ +#!/usr/bin/python +# -*- coding: UTF-8 -*- + +# CPO 100 board modified configuration, support 2 AC PSUS + +from platform_common import * + +STARTMODULE = { + "hal_fanctrl": 1, + "hal_ledctrl": 1, + "avscontrol": 1, + "dev_monitor": 1, + "tty_console": 0, + "reboot_cause": 1, + "pmon_syslog": 1, + "sff_temp_polling": 1, + "generate_airflow": 0, + "product_name": 1, + "generate_mgmt_version": 0, + "set_fw_mac": 1, +} + +DEV_MONITOR_PARAM = { + "polling_time": 10, + "psus": [ + { + "name": "psu2", + "present": {"gettype": "i2c", "bus": 13, "loc": 0x1d, "offset": 0x42, "presentbit": 0, "okval": 0}, + "device": [ + {"id": "psu2pmbus", "name": "wb_fsp1200", "bus": 10, "loc": 0x58, "attr": "hwmon"}, + {"id": "psu2frue2", "name": "wb_24c02", "bus": 10, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "psu1", + "present": {"gettype": "i2c", "bus": 13, "loc": 0x1d, "offset": 0x42, "presentbit": 1, "okval": 0}, + "device": [ + {"id": "psu1pmbus", "name": "wb_fsp1200", "bus": 11, "loc": 0x58, "attr": "hwmon"}, + {"id": "psu1frue2", "name": "wb_24c02", "bus": 11, "loc": 0x50, "attr": "eeprom"}, + ], + }, + ], + "fans": [ + { + "name": "fan7", + "present": {"gettype": "i2c", "bus": 44, "loc": 0x0d, "offset": 0x5b, "presentbit": 0, "okval": 0}, + "device": [ + {"id": "fan7frue2", "name": "wb_24c64", "bus": 43, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "fan5", + "present": {"gettype": "i2c", "bus": 44, "loc": 0x0d, "offset": 0x5b, "presentbit": 1, "okval": 0}, + "device": [ + {"id": "fan5frue2", "name": "wb_24c64", "bus": 42, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "fan3", + "present": {"gettype": "i2c", "bus": 44, "loc": 0x0d, "offset": 0x5b, "presentbit": 2, "okval": 0}, + "device": [ + {"id": "fan3frue2", "name": "wb_24c64", "bus": 41, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "fan1", + "present": {"gettype": "i2c", "bus": 44, "loc": 0x0d, "offset": 0x5b, "presentbit": 3, "okval": 0}, + "device": [ + {"id": "fan1frue2", "name": "wb_24c64", "bus":40, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "fan8", + "present": {"gettype": "i2c", "bus": 52, "loc": 0x0d, "offset": 0x5b, "presentbit": 0, "okval": 0}, + "device": [ + {"id": "fan8frue2", "name": "wb_24c64", "bus": 51, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "fan6", + "present": {"gettype": "i2c", "bus": 52, "loc": 0x0d, "offset": 0x5b, "presentbit": 1, "okval": 0}, + "device": [ + {"id": "fan6frue2", "name": "wb_24c64", "bus": 50, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "fan4", + "present": {"gettype": "i2c", "bus": 52, "loc": 0x0d, "offset": 0x5b, "presentbit": 2, "okval": 0}, + "device": [ + {"id": "fan4frue2", "name": "wb_24c64", "bus": 49, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "fan2", + "present": {"gettype": "i2c", "bus": 52, "loc": 0x0d, "offset": 0x5b, "presentbit": 3, "okval": 0}, + "device": [ + {"id": "fan2frue2", "name": "wb_24c64", "bus": 48, "loc": 0x50, "attr": "eeprom"}, + ], + }, + ], + "others": [ + { + "name": "eeprom", + "device": [ + {"id": "eeprom_1", "name": "wb_24c02", "bus": 1, "loc": 0x56, "attr": "eeprom"}, + {"id": "eeprom_2", "name": "wb_24c02", "bus": 1, "loc": 0x57, "attr": "eeprom"}, + {"id": "eeprom_3", "name": "wb_24c02", "bus": 2, "loc": 0x51, "attr": "eeprom"}, + {"id": "eeprom_4", "name": "wb_24c02", "bus": 3, "loc": 0x51, "attr": "eeprom"}, + {"id": "eeprom_5", "name": "wb_24c02", "bus": 32, "loc": 0x52, "attr": "eeprom"}, + {"id": "eeprom_6", "name": "wb_24c02", "bus": 12, "loc": 0x57, "attr": "eeprom"}, + ], + }, + { + "name": "oe_mcu", + "device": [ + {"id": "oe_mcu_1", "name": "wb_24c02", "bus": 24, "loc": 0x50, "attr": "eeprom"}, + {"id": "oe_mcu_2", "name": "wb_24c02", "bus": 25, "loc": 0x50, "attr": "eeprom"}, + {"id": "oe_mcu_3", "name": "wb_24c02", "bus": 26, "loc": 0x50, "attr": "eeprom"}, + {"id": "oe_mcu_4", "name": "wb_24c02", "bus": 27, "loc": 0x50, "attr": "eeprom"}, + {"id": "oe_mcu_5", "name": "wb_24c02", "bus": 28, "loc": 0x50, "attr": "eeprom"}, + {"id": "oe_mcu_6", "name": "wb_24c02", "bus": 29, "loc": 0x50, "attr": "eeprom"}, + {"id": "oe_mcu_7", "name": "wb_24c02", "bus": 30, "loc": 0x50, "attr": "eeprom"}, + {"id": "oe_mcu_8", "name": "wb_24c02", "bus": 31, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "tmp275", + "device": [ + {"id": "tmp275_1", "name": "wb_tmp275", "bus": 34, "loc": 0x4c, "attr": "hwmon"}, + {"id": "tmp275_2", "name": "wb_tmp275", "bus": 35, "loc": 0x4d, "attr": "hwmon"}, + {"id": "tmp275_3", "name": "wb_tmp275", "bus": 8, "loc": 0x48, "attr": "hwmon"}, + {"id": "tmp275_4", "name": "wb_tmp275", "bus": 8, "loc": 0x49, "attr": "hwmon"}, + {"id": "tmp275_5", "name": "wb_tmp275", "bus": 9, "loc": 0x48, "attr": "hwmon"}, + {"id": "tmp275_6", "name": "wb_tmp275", "bus": 9, "loc": 0x49, "attr": "hwmon"}, + {"id": "tmp275_7", "name": "wb_tmp275", "bus": 14, "loc": 0x48, "attr": "hwmon"}, + {"id": "tmp275_8", "name": "wb_tmp275", "bus": 14, "loc": 0x49, "attr": "hwmon"}, + {"id": "tmp275_9", "name": "wb_tmp275", "bus": 14, "loc": 0x4b, "attr": "hwmon"}, + ], + }, + { + "name": "ina3221", + "device": [ + {"id": "ina3221_1", "name": "wb_ina3221", "bus": 33, "loc": 0x40, "attr": "hwmon"}, + {"id": "ina3221_2", "name": "wb_ina3221", "bus": 33, "loc": 0x41, "attr": "hwmon"}, + {"id": "ina3221_3", "name": "wb_ina3221", "bus": 33, "loc": 0x42, "attr": "hwmon"}, + {"id": "ina3221_4", "name": "wb_ina3221", "bus": 12, "loc": 0x40, "attr": "hwmon"}, + {"id": "ina3221_5", "name": "wb_ina3221", "bus": 12, "loc": 0x41, "attr": "hwmon"}, + {"id": "ina3221_6", "name": "wb_ina3221", "bus": 56, "loc": 0x40, "attr": "hwmon"}, + {"id": "ina3221_7", "name": "wb_ina3221", "bus": 56, "loc": 0x41, "attr": "hwmon"}, + {"id": "ina3221_8", "name": "wb_ina3221", "bus": 57, "loc": 0x40, "attr": "hwmon"}, + {"id": "ina3221_9", "name": "wb_ina3221", "bus": 58, "loc": 0x40, "attr": "hwmon"}, + {"id": "ina3221_10", "name": "wb_ina3221", "bus": 59, "loc": 0x40, "attr": "hwmon"}, + {"id": "ina3221_11", "name": "wb_ina3221", "bus": 60, "loc": 0x40, "attr": "hwmon"}, + {"id": "ina3221_12", "name": "wb_ina3221", "bus": 61, "loc": 0x40, "attr": "hwmon"}, + {"id": "ina3221_13", "name": "wb_ina3221", "bus": 62, "loc": 0x40, "attr": "hwmon"}, + {"id": "ina3221_14", "name": "wb_ina3221", "bus": 63, "loc": 0x40, "attr": "hwmon"}, + {"id": "ina3221_15", "name": "wb_ina3221", "bus": 88, "loc": 0x42, "attr": "hwmon"}, + {"id": "ina3221_16", "name": "wb_ina3221", "bus": 89, "loc": 0x42, "attr": "hwmon"}, + {"id": "ina3221_17", "name": "wb_ina3221", "bus": 90, "loc": 0x42, "attr": "hwmon"}, + {"id": "ina3221_18", "name": "wb_ina3221", "bus": 91, "loc": 0x42, "attr": "hwmon"}, + ], + }, + { + "name": "xdpe12284", + "device": [ + {"id": "xdpe12284_1", "name": "wb_xdpe12284", "bus": 5, "loc": 0x5e, "attr": "hwmon"}, + {"id": "xdpe12284_2", "name": "wb_xdpe12284", "bus": 5, "loc": 0x68, "attr": "hwmon"}, + {"id": "xdpe12284_3", "name": "wb_xdpe12284", "bus": 5, "loc": 0x6e, "attr": "hwmon"}, + {"id": "xdpe12284_4", "name": "wb_xdpe12284", "bus": 5, "loc": 0x70, "attr": "hwmon"}, + {"id": "xdpe12284_5", "name": "wb_xdpe12284", "bus": 67, "loc": 0x68, "attr": "hwmon"}, + {"id": "xdpe12284_6", "name": "wb_xdpe12284", "bus": 67, "loc": 0x70, "attr": "hwmon"}, + {"id": "xdpe12284_7", "name": "wb_xdpe12284", "bus": 67, "loc": 0x60, "attr": "hwmon"}, + {"id": "xdpe12284_8", "name": "wb_xdpe12284", "bus": 67, "loc": 0x66, "attr": "hwmon"}, + {"id": "xdpe12284_9", "name": "wb_xdpe12284", "bus": 67, "loc": 0x6e, "attr": "hwmon"}, + {"id": "xdpe12284_10", "name": "wb_xdpe12284", "bus": 67, "loc": 0x5e, "attr": "hwmon"}, + {"id": "xdpe12284_11", "name": "wb_xdpe12284", "bus": 68, "loc": 0x68, "attr": "hwmon"}, + {"id": "xdpe12284_12", "name": "wb_xdpe12284", "bus": 68, "loc": 0x70, "attr": "hwmon"}, + {"id": "xdpe12284_13", "name": "wb_xdpe12284", "bus": 68, "loc": 0x60, "attr": "hwmon"}, + {"id": "xdpe12284_14", "name": "wb_xdpe12284", "bus": 68, "loc": 0x66, "attr": "hwmon"}, + {"id": "xdpe12284_15", "name": "wb_xdpe12284", "bus": 68, "loc": 0x6e, "attr": "hwmon"}, + {"id": "xdpe12284_16", "name": "wb_xdpe12284", "bus": 68, "loc": 0x5e, "attr": "hwmon"}, + {"id": "xdpe12284_17", "name": "wb_xdpe12284", "bus": 69, "loc": 0x68, "attr": "hwmon"}, + {"id": "xdpe12284_18", "name": "wb_xdpe12284", "bus": 69, "loc": 0x70, "attr": "hwmon"}, + {"id": "xdpe12284_19", "name": "wb_xdpe12284", "bus": 69, "loc": 0x60, "attr": "hwmon"}, + {"id": "xdpe12284_20", "name": "wb_xdpe12284", "bus": 69, "loc": 0x66, "attr": "hwmon"}, + {"id": "xdpe12284_21", "name": "wb_xdpe12284", "bus": 69, "loc": 0x6e, "attr": "hwmon"}, + {"id": "xdpe12284_22", "name": "wb_xdpe12284", "bus": 69, "loc": 0x5e, "attr": "hwmon"}, + {"id": "xdpe12284_23", "name": "wb_xdpe12284", "bus": 70, "loc": 0x68, "attr": "hwmon"}, + {"id": "xdpe12284_24", "name": "wb_xdpe12284", "bus": 70, "loc": 0x70, "attr": "hwmon"}, + {"id": "xdpe12284_25", "name": "wb_xdpe12284", "bus": 70, "loc": 0x60, "attr": "hwmon"}, + {"id": "xdpe12284_26", "name": "wb_xdpe12284", "bus": 70, "loc": 0x66, "attr": "hwmon"}, + {"id": "xdpe12284_27", "name": "wb_xdpe12284", "bus": 70, "loc": 0x6e, "attr": "hwmon"}, + {"id": "xdpe12284_28", "name": "wb_xdpe12284", "bus": 70, "loc": 0x5e, "attr": "hwmon"}, + {"id": "xdpe12284_29", "name": "wb_xdpe12284", "bus": 71, "loc": 0x68, "attr": "hwmon"}, + ], + }, + { + "name": "xdpe132g5c", + "device": [ + {"id": "xdpe132g5c_1", "name": "wb_xdpe132g5c_pmbus", "bus": 64, "loc": 0x40, "attr": "hwmon"}, + {"id": "xdpe132g5c_2", "name": "wb_xdpe132g5c_pmbus", "bus": 65, "loc": 0x40, "attr": "hwmon"}, + {"id": "xdpe132g5c_3", "name": "wb_xdpe132g5c_pmbus", "bus": 66, "loc": 0x40, "attr": "hwmon"}, + ], + }, + { + "name": "ucd90160", + "device": [ + {"id": "ucd90160_1", "name": "wb_ucd90160", "bus": 5, "loc": 0x5f, "attr": "hwmon"}, + ], + }, + ], +} + +MANUINFO_CONF = { + "bios": { + "key": "BIOS", + "head": True, + "next": "cpu" + }, + "bios_vendor": { + "parent": "bios", + "key": "Vendor", + "cmd": "dmidecode -t 0 |grep Vendor", + "pattern": r".*Vendor", + "separator": ":", + "arrt_index": 1, + }, + "bios_version": { + "parent": "bios", + "key": "Version", + "cmd": "dmidecode -t 0 |grep Version", + "pattern": r".*Version", + "separator": ":", + "arrt_index": 2, + }, + "bios_date": { + "parent": "bios", + "key": "Release Date", + "cmd": "dmidecode -t 0 |grep Release", + "pattern": r".*Release Date", + "separator": ":", + "arrt_index": 3, + }, + "bios_boot": { + "parent": "bios", + "key": "Boot From", + "devfile": { + "loc": "/dev/cpld1", + "offset":0x1d, + "len":1, + "bit_width":1 + }, + "decode": { + "01": "Master", + "02": "Slave" + }, + "arrt_index": 4, + }, + + "cpu": { + "key": "CPU", + "next": "cpld" + }, + "cpu_vendor": { + "parent": "cpu", + "key": "Vendor", + "cmd": "dmidecode --type processor |grep Manufacturer", + "pattern": r".*Manufacturer", + "separator": ":", + "arrt_index": 1, + }, + "cpu_model": { + "parent": "cpu", + "key": "Device Model", + "cmd": "dmidecode --type processor | grep Version", + "pattern": r".*Version", + "separator": ":", + "arrt_index": 2, + }, + "cpu_core": { + "parent": "cpu", + "key": "Core Count", + "cmd": "dmidecode --type processor | grep \"Core Count\"", + "pattern": r".*Core Count", + "separator": ":", + "arrt_index": 3, + }, + "cpu_thread": { + "parent": "cpu", + "key": "Thread Count", + "cmd": "dmidecode --type processor | grep \"Thread Count\"", + "pattern": r".*Thread Count", + "separator": ":", + "arrt_index": 4, + }, + + + "cpld": { + "key": "CPLD", + "next": "fpga" + }, + + "cpld1": { + "key": "CPLD1", + "parent": "cpld", + "arrt_index": 1, + }, + "cpld1_model": { + "key": "Device Model", + "parent": "cpld1", + "config": "LCMXO3LF-2100C-5BG256C", + "arrt_index": 1, + }, + "cpld1_vender": { + "key": "Vendor", + "parent": "cpld1", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld1_desc": { + "key": "Description", + "parent": "cpld1", + "config": "CPU CPLD", + "arrt_index": 3, + }, + "cpld1_version": { + "key": "Firmware Version", + "parent": "cpld1", + "reg": { + "loc": "/dev/port", + "offset": 0xa00, + "size": 4 + }, + "callback": "cpld_format", + "arrt_index": 4, + }, + + "cpld2": { + "key": "CPLD2", + "parent": "cpld", + "arrt_index": 2, + }, + "cpld2_model": { + "key": "Device Model", + "parent": "cpld2", + "config": "LCMXO3LF-2100C-5BG256C", + "arrt_index": 1, + }, + "cpld2_vender": { + "key": "Vendor", + "parent": "cpld2", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld2_desc": { + "key": "Description", + "parent": "cpld2", + "config": "SCM CPLD", + "arrt_index": 3, + }, + "cpld2_version": { + "key": "Firmware Version", + "parent": "cpld2", + "reg": { + "loc": "/dev/port", + "offset": 0x900, + "size": 4 + }, + "callback": "cpld_format", + "arrt_index": 4, + }, + "cpld2_boot": { + "parent": "cpld2", + "key": "Boot From", + "devfile": { + "loc": "/dev/cpld1", + "offset":0x06, + "len":1, + "bit_width":1 + }, + "decode": { + "01": "Main", + "02": "Golden" + }, + "arrt_index": 5, + }, + + "cpld3": { + "key": "CPLD3", + "parent": "cpld", + "arrt_index": 3, + }, + "cpld3_model": { + "key": "Device Model", + "parent": "cpld3", + "config": "LCMXO3LF-4300C-6BG324I", + "arrt_index": 1, + }, + "cpld3_vender": { + "key": "Vendor", + "parent": "cpld3", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld3_desc": { + "key": "Description", + "parent": "cpld3", + "config": "MCB CPLD", + "arrt_index": 3, + }, + "cpld3_version": { + "key": "Firmware Version", + "parent": "cpld3", + "i2c": { + "bus": "13", + "loc": "0x1d", + "offset": 0, + "size": 4 + }, + "callback": "cpld_format", + "arrt_index": 4, + }, + "cpld3_boot": { + "parent": "cpld3", + "key": "Boot From", + "devfile": { + "loc": "/dev/cpld3", + "offset":0x0d, + "len":1, + "bit_width":1 + }, + "decode": { + "01": "Main", + "02": "Golden" + }, + "arrt_index": 5, + }, + + "cpld4": { + "key": "CPLD4", + "parent": "cpld", + "arrt_index": 4, + }, + "cpld4_model": { + "key": "Device Model", + "parent": "cpld4", + "config": "LCMXO3LF-4300C-6BG324I", + "arrt_index": 1, + }, + "cpld4_vender": { + "key": "Vendor", + "parent": "cpld4", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld4_desc": { + "key": "Description", + "parent": "cpld4", + "config": "SMB CPLD", + "arrt_index": 3, + }, + "cpld4_version": { + "key": "Firmware Version", + "parent": "cpld4", + "i2c": { + "bus": "20", + "loc": "0x1e", + "offset": 0, + "size": 4 + }, + "callback": "cpld_format", + "arrt_index": 4, + }, + "cpld4_boot": { + "parent": "cpld4", + "key": "Boot From", + "devfile": { + "loc": "/dev/cpld4", + "offset":0x0d, + "len":1, + "bit_width":1 + }, + "decode": { + "01": "Main", + "02": "Golden" + }, + "arrt_index": 5, + }, + + "cpld5": { + "key": "CPLD5", + "parent": "cpld", + "arrt_index": 5, + }, + "cpld5_model": { + "key": "Device Model", + "parent": "cpld5", + "config": "LCMXO3LF-2100C-5BG256C", + "arrt_index": 1, + }, + "cpld5_vender": { + "key": "Vendor", + "parent": "cpld5", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld5_desc": { + "key": "Description", + "parent": "cpld5", + "config": "FCB_T CPLD", + "arrt_index": 3, + }, + "cpld5_version": { + "key": "Firmware Version", + "parent": "cpld5", + "i2c": { + "bus": "44", + "loc": "0x0d", + "offset": 0, + "size": 4 + }, + "callback": "cpld_format", + "arrt_index": 4, + }, + "cpld5_boot": { + "parent": "cpld5", + "key": "Boot From", + "devfile": { + "loc": "/dev/cpld5", + "offset":0x0d, + "len":1, + "bit_width":1 + }, + "decode": { + "01": "Main", + "02": "Golden" + }, + "arrt_index": 5, + }, + + "cpld6": { + "key": "CPLD6", + "parent": "cpld", + "arrt_index": 6, + }, + "cpld6_model": { + "key": "Device Model", + "parent": "cpld6", + "config": "LCMXO3LF-2100C-5BG256C", + "arrt_index": 1, + }, + "cpld6_vender": { + "key": "Vendor", + "parent": "cpld6", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld6_desc": { + "key": "Description", + "parent": "cpld6", + "config": "FCB_B CPLD", + "arrt_index": 3, + }, + "cpld6_version": { + "key": "Firmware Version", + "parent": "cpld6", + "i2c": { + "bus": "52", + "loc": "0x0d", + "offset": 0, + "size": 4 + }, + "callback": "cpld_format", + "arrt_index": 4, + }, + "cpld6_boot": { + "parent": "cpld6", + "key": "Boot From", + "devfile": { + "loc": "/dev/cpld6", + "offset":0x0d, + "len":1, + "bit_width":1 + }, + "decode": { + "01": "Main", + "02": "Golden" + }, + "arrt_index": 5, + }, + + + "psu": { + "key": "PSU", + "next": "fan" + }, + + "psu1": { + "parent": "psu", + "key": "PSU1", + "arrt_index": 1, + }, + "psu1_hw_version": { + "key": "Hardware Version", + "parent": "psu1", + "extra": { + "funcname": "getPsu", + "id": "psu1", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "psu1_fw_version": { + "key": "Firmware Version", + "parent": "psu1", + "config": "NA", + "arrt_index": 2, + }, + + "psu2": { + "parent": "psu", + "key": "PSU2", + "arrt_index": 2, + }, + "psu2_hw_version": { + "key": "Hardware Version", + "parent": "psu2", + "extra": { + "funcname": "getPsu", + "id": "psu2", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "psu2_fw_version": { + "key": "Firmware Version", + "parent": "psu2", + "config": "NA", + "arrt_index": 2, + }, + + "fan": { + "key": "FAN", + "next": "fpga" + }, + "fan1": { + "key": "FAN1", + "parent": "fan", + "arrt_index": 1, + }, + "fan1_hw_version": { + "key": "Hardware Version", + "parent": "fan1", + "extra": { + "funcname": "checkFan", + "id": "fan1", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan1_fw_version": { + "key": "Firmware Version", + "parent": "fan1", + "config": "NA", + "arrt_index": 2, + }, + + "fan2": { + "key": "FAN2", + "parent": "fan", + "arrt_index": 2, + }, + "fan2_hw_version": { + "key": "Hardware Version", + "parent": "fan2", + "extra": { + "funcname": "checkFan", + "id": "fan2", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan2_fw_version": { + "key": "Firmware Version", + "parent": "fan2", + "config": "NA", + "arrt_index": 2, + }, + + "fan3": { + "key": "FAN3", + "parent": "fan", + "arrt_index": 3, + }, + "fan3_hw_version": { + "key": "Hardware Version", + "parent": "fan3", + "extra": { + "funcname": "checkFan", + "id": "fan3", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan3_fw_version": { + "key": "Firmware Version", + "parent": "fan3", + "config": "NA", + "arrt_index": 2, + }, + + "fan4": { + "key": "FAN4", + "parent": "fan", + "arrt_index": 4, + }, + "fan4_hw_version": { + "key": "Hardware Version", + "parent": "fan4", + "extra": { + "funcname": "checkFan", + "id": "fan4", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan4_fw_version": { + "key": "Firmware Version", + "parent": "fan4", + "config": "NA", + "arrt_index": 2, + }, + + "fan5": { + "key": "FAN5", + "parent": "fan", + "arrt_index": 5, + }, + "fan5_hw_version": { + "key": "Hardware Version", + "parent": "fan5", + "extra": { + "funcname": "checkFan", + "id": "fan5", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan5_fw_version": { + "key": "Firmware Version", + "parent": "fan5", + "config": "NA", + "arrt_index": 2, + }, + + "fan6": { + "key": "FAN6", + "parent": "fan", + "arrt_index": 6, + }, + "fan6_hw_version": { + "key": "Hardware Version", + "parent": "fan6", + "extra": { + "funcname": "checkFan", + "id": "fan6", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan6_fw_version": { + "key": "Firmware Version", + "parent": "fan6", + "config": "NA", + "arrt_index": 2, + }, + + "fan7": { + "key": "FAN7", + "parent": "fan", + "arrt_index": 7, + }, + "fan7_hw_version": { + "key": "Hardware Version", + "parent": "fan7", + "extra": { + "funcname": "checkFan", + "id": "fan7", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan7_fw_version": { + "key": "Firmware Version", + "parent": "fan7", + "config": "NA", + "arrt_index": 2, + }, + + "fan8": { + "key": "FAN8", + "parent": "fan", + "arrt_index": 8, + }, + "fan8_hw_version": { + "key": "Hardware Version", + "parent": "fan8", + "extra": { + "funcname": "checkFan", + "id": "fan8", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan8_fw_version": { + "key": "Firmware Version", + "parent": "fan8", + "config": "NA", + "arrt_index": 2, + }, + + + "i210": { + "key": "NIC", + "next": "fpga" + }, + "i210_model": { + "parent": "i210", + "config": "NA", + "key": "Device Model", + "arrt_index": 1, + }, + "i210_vendor": { + "parent": "i210", + "config": "INTEL", + "key": "Vendor", + "arrt_index": 2, + }, + "i210_version": { + "parent": "i210", + "cmd": "ethtool -i eno1", + "pattern": r"firmware-version", + "separator": ":", + "key": "Firmware Version", + "arrt_index": 3, + }, + + "fpga": { + "key": "FPGA", + }, + + "fpga1": { + "key": "FPGA1", + "parent": "fpga", + "arrt_index": 1, + }, + "fpga1_model": { + "parent": "fpga1", + "config": "XC7A50T-2FGG484C", + "key": "Device Model", + "arrt_index": 1, + }, + "fpga1_vender": { + "parent": "fpga1", + "config": "XILINX", + "key": "Vendor", + "arrt_index": 2, + }, + "fpga1_desc": { + "key": "Description", + "parent": "fpga1", + "config": "IOB FPGA", + "arrt_index": 3, + }, + "fpga1_fw_version": { + "parent": "fpga1", + "devfile": { + "loc": "/dev/fpga0", + "offset": 0, + "len": 4, + "bit_width": 4 + }, + "key": "Firmware Version", + "arrt_index": 4, + }, + "fpga1_date": { + "parent": "fpga1", + "devfile": { + "loc": "/dev/fpga0", + "offset": 4, + "len": 4, + "bit_width": 4 + }, + "key": "Build Date", + "arrt_index": 5, + }, + "fpga1_boot": { + "parent": "fpga1", + "key": "Boot From", + "devfile": { + "loc": "/dev/fpga0", + "offset":0x00, + "len":1, + "bit_width":1 + }, + "decode": { + "00": "Golden", + "default": "Main" + }, + "arrt_index": 6, + }, + "fpga2": { + "key": "FPGA2", + "parent": "fpga", + "arrt_index": 2, + }, + "fpga2_model": { + "parent": "fpga2", + "config": "XC7A50T-2FGG484C", + "key": "Device Model", + "arrt_index": 1, + }, + "fpga2_vender": { + "parent": "fpga2", + "config": "XILINX", + "key": "Vendor", + "arrt_index": 2, + }, + "fpga2_desc": { + "key": "Description", + "parent": "fpga2", + "config": "DOM FPGA", + "arrt_index": 3, + }, + "fpga2_fw_version": { + "parent": "fpga2", + "devfile": { + "loc": "/dev/fpga1", + "offset": 0, + "len": 4, + "bit_width": 4 + }, + "key": "Firmware Version", + "arrt_index": 4, + }, + "fpga2_date": { + "parent": "fpga2", + "devfile": { + "loc": "/dev/fpga1", + "offset": 4, + "len": 4, + "bit_width": 4 + }, + "key": "Build Date", + "arrt_index": 5, + }, + "fpga2_boot": { + "parent": "fpga2", + "key": "Boot From", + "devfile": { + "loc": "/dev/fpga1", + "offset":0x00, + "len":1, + "bit_width":1 + }, + "decode": { + "00": "Golden", + "default": "Main" + }, + "arrt_index": 6, + }, +} + +PMON_SYSLOG_STATUS = { + "polling_time": 3, + "fans": { + "present": {"path": ["/sys/s3ip/fan/*/present"], "ABSENT": 0}, + "status": [ + {"path": "/sys/s3ip/fan/%s/motor1/status", 'okval': 1}, + {"path": "/sys/s3ip/fan/%s/motor2/status", 'okval': 1}, + ], + "nochangedmsgflag": 1, + "nochangedmsgtime": 60, + "noprintfirsttimeflag": 0, + "alias": { + "fan1": "FAN1", + "fan2": "FAN2", + "fan3": "FAN3", + "fan4": "FAN4", + "fan5": "FAN5", + "fan6": "FAN6", + "fan7": "FAN7", + "fan8": "FAN8" + } + }, + "psus": { + "present": {"path": ["/sys/s3ip/psu/*/present"], "ABSENT": 0}, + "status": [ + {"path": "/sys/s3ip/psu/%s/out_status", "okval": 1}, + {"path": "/sys/s3ip/psu/%s/alarm", "okval": 0}, + ], + "nochangedmsgflag": 1, + "nochangedmsgtime": 60, + "noprintfirsttimeflag": 0, + "alias": { + "psu1": "PSU1", + "psu2": "PSU2" + } + } +} + +##################### MAC Voltage adjust#################################### +MAC_DEFAULT_PARAM = [ + { + "name": "mac_core", # AVS name + "type": 0, # 1: used default value, if rov value not in range. 0: do nothing, if rov value not in range + "rov_source": 0, # 0: get rov value from cpld, 1: get rov value from SDK + "cpld_avs": {"bus": 20, "loc": 0x1e, "offset": 0x20, "gettype": "i2c"}, + "set_avs": { + "loc": "/sys/bus/i2c/devices/64-0040/hwmon/hwmon*/avs0_vout", + "gettype": "sysfs", "formula": "int((%f)*1000000)" + }, + "mac_avs_param": { + 0x92: 0.7471, + 0x90: 0.7600, + 0x8e: 0.7710, + 0x8c: 0.7839, + 0x8a: 0.7961, + 0x88: 0.8071, + 0x86: 0.8181, + 0x84: 0.8291, + 0x82: 0.8401 + } + } +] + +DRIVERLISTS = [ + {"name": "ice", "delay": 0, "removable": 0}, + {"name": "wb_i2c_i801", "delay": 1, "removable": 0}, + {"name": "i2c_dev", "delay": 0, "removable": 0}, + {"name": "wb_i2c_algo_bit", "delay": 0}, + {"name": "wb_i2c_gpio", "delay": 0}, + {"name": "i2c_mux", "delay": 0, "removable": 0}, + {"name": "wb_i2c_gpio_device gpio_sda=181 gpio_scl=180 gpio_chip_name=INTC3001:00 bus_num=1", "delay": 0}, + {"name": "platform_common dfd_my_type=0x40d9", "delay": 0}, + {"name": "wb_logic_dev_common", "delay":0}, + {"name": "wb_io_dev", "delay": 0}, + {"name": "wb_io_dev_device", "delay": 0}, + {"name": "wb_fpga_pcie", "delay": 0}, + {"name": "wb_pcie_dev", "delay": 0}, + {"name": "wb_pcie_dev_device", "delay": 0}, + {"name": "wb_i2c_dev", "delay": 0}, + {"name": "wb_i2c_ocores", "delay": 0}, + {"name": "wb_i2c_ocores_device", "delay": 0}, + {"name": "wb_i2c_mux_pca9641", "delay": 0}, + {"name": "wb_i2c_mux_pca954x", "delay": 0}, + {"name": "wb_i2c_mux_pca954x_device_b3", "delay": 1}, + {"name": "wb_i2c_dev_device", "delay": 1}, + {"name": "wb_lm75", "delay": 0}, + {"name": "wb_at24", "delay": 0}, + {"name": "wb_pmbus_core", "delay": 0}, + {"name": "wb_xdpe12284", "delay": 0}, + {"name": "wb_xdpe132g5c_pmbus", "delay": 0}, + {"name": "wb_csu550", "delay": 0}, + {"name": "wb_ina3221", "delay": 0}, + {"name": "wb_ucd9000", "delay": 0}, + {"name": "wb_xdpe132g5c", "delay": 0}, +# {"name": "firmware_driver_sysfs", "delay": 0}, + {"name": "wb_rc32312", "delay": 0}, + {"name": "s3ip_sysfs", "delay": 0}, + {"name": "wb_switch_driver", "delay": 0}, + {"name": "fan_device_driver", "delay": 0}, + {"name": "psu_device_driver", "delay": 0}, + {"name": "vol_sensor_device_driver", "delay": 0}, + {"name": "temp_sensor_device_driver", "delay": 0}, + {"name": "wb_spd", "delay": 0}, + {"name": "wb_lpc_bmc", "delay": 0}, +] + +DEVICE = [ + # eeprom + {"name": "wb_24c02", "bus": 1, "loc": 0x56}, + {"name": "wb_24c02", "bus": 1, "loc": 0x57}, + {"name": "wb_24c02", "bus": 2, "loc": 0x51}, + {"name": "wb_24c02", "bus": 3, "loc": 0x51}, + # SCM + {"name": "wb_24c02", "bus": 32, "loc": 0x52}, + {"name": "wb_ina3221", "bus": 33, "loc": 0x40}, + {"name": "wb_ina3221", "bus": 33, "loc": 0x41}, + {"name": "wb_ina3221", "bus": 33, "loc": 0x42}, + {"name": "wb_tmp275", "bus": 34, "loc": 0x4c}, + {"name": "wb_tmp275", "bus": 35, "loc": 0x4d}, + # CPU + {"name": "wb_ucd90160", "bus": 5, "loc": 0x5f}, + {"name": "wb_xdpe12284", "bus": 5, "loc": 0x5e}, + {"name": "wb_xdpe12284", "bus": 5, "loc": 0x68}, + {"name": "wb_xdpe12284", "bus": 5, "loc": 0x6e}, + {"name": "wb_xdpe12284", "bus": 5, "loc": 0x70}, + # fanA + {"name": "wb_tmp275", "bus": 8, "loc": 0x48}, + {"name": "wb_tmp275", "bus": 8, "loc": 0x49}, + {"name": "wb_24c64", "bus": 40, "loc": 0x50}, + {"name": "wb_24c64", "bus": 41, "loc": 0x50}, + {"name": "wb_24c64", "bus": 42, "loc": 0x50}, + {"name": "wb_24c64", "bus": 43, "loc": 0x50}, + # fanB + {"name": "wb_tmp275", "bus": 9, "loc": 0x48}, + {"name": "wb_tmp275", "bus": 9, "loc": 0x49}, + {"name": "wb_24c64", "bus": 48, "loc": 0x50}, + {"name": "wb_24c64", "bus": 49, "loc": 0x50}, + {"name": "wb_24c64", "bus": 50, "loc": 0x50}, + {"name": "wb_24c64", "bus": 51, "loc": 0x50}, + # psu + {"name": "wb_24c02", "bus": 10, "loc": 0x50}, + {"name": "wb_fsp1200", "bus": 10, "loc": 0x58}, + {"name": "wb_24c02", "bus": 11, "loc": 0x50}, + {"name": "wb_fsp1200", "bus": 11, "loc": 0x58}, + # MCB + {"name": "wb_ina3221", "bus": 12, "loc": 0x40}, + {"name": "wb_ina3221", "bus": 12, "loc": 0x41}, + {"name": "wb_24c02", "bus": 12, "loc": 0x57}, + # SMB + {"name": "wb_tmp275", "bus": 14, "loc": 0x48}, + {"name": "wb_tmp275", "bus": 14, "loc": 0x49}, + {"name": "wb_tmp275", "bus": 14, "loc": 0x4b}, + {"name": "wb_ina3221", "bus": 56, "loc": 0x40}, + {"name": "wb_ina3221", "bus": 56, "loc": 0x41}, + {"name": "wb_ina3221", "bus": 57, "loc": 0x40}, + {"name": "wb_ina3221", "bus": 58, "loc": 0x40}, + {"name": "wb_ina3221", "bus": 59, "loc": 0x40}, + {"name": "wb_ina3221", "bus": 60, "loc": 0x40}, + {"name": "wb_ina3221", "bus": 61, "loc": 0x40}, + {"name": "wb_ina3221", "bus": 62, "loc": 0x40}, + {"name": "wb_ina3221", "bus": 63, "loc": 0x40}, + {"name": "wb_xdpe132g5c_pmbus", "bus": 64, "loc": 0x40}, + {"name": "wb_xdpe132g5c_pmbus", "bus": 65, "loc": 0x40}, + {"name": "wb_xdpe132g5c_pmbus", "bus": 66, "loc": 0x40}, + # OE0 + {"name": "wb_xdpe12284", "bus": 67, "loc": 0x68}, + {"name": "wb_xdpe12284", "bus": 67, "loc": 0x70}, + {"name": "wb_xdpe12284", "bus": 67, "loc": 0x60}, + # OE7 + {"name": "wb_xdpe12284", "bus": 67, "loc": 0x66}, + {"name": "wb_xdpe12284", "bus": 67, "loc": 0x6e}, + {"name": "wb_xdpe12284", "bus": 67, "loc": 0x5e}, + # OE1 + {"name": "wb_xdpe12284", "bus": 68, "loc": 0x68}, + {"name": "wb_xdpe12284", "bus": 68, "loc": 0x70}, + {"name": "wb_xdpe12284", "bus": 68, "loc": 0x60}, + # OE2 + {"name": "wb_xdpe12284", "bus": 68, "loc": 0x66}, + {"name": "wb_xdpe12284", "bus": 68, "loc": 0x6e}, + {"name": "wb_xdpe12284", "bus": 68, "loc": 0x5e}, + # OE3 + {"name": "wb_xdpe12284", "bus": 69, "loc": 0x68}, + {"name": "wb_xdpe12284", "bus": 69, "loc": 0x70}, + {"name": "wb_xdpe12284", "bus": 69, "loc": 0x60}, + # OE4 + {"name": "wb_xdpe12284", "bus": 69, "loc": 0x66}, + {"name": "wb_xdpe12284", "bus": 69, "loc": 0x6e}, + {"name": "wb_xdpe12284", "bus": 69, "loc": 0x5e}, + # OE5 + {"name": "wb_xdpe12284", "bus": 70, "loc": 0x68}, + {"name": "wb_xdpe12284", "bus": 70, "loc": 0x70}, + {"name": "wb_xdpe12284", "bus": 70, "loc": 0x60}, + # OE6 + {"name": "wb_xdpe12284", "bus": 70, "loc": 0x66}, + {"name": "wb_xdpe12284", "bus": 70, "loc": 0x6e}, + {"name": "wb_xdpe12284", "bus": 70, "loc": 0x5e}, + # MAC_XDPE12284C_06 + {"name": "wb_xdpe12284", "bus": 71, "loc": 0x68}, + # fan DCDC + {"name": "wb_ina3221", "bus": 88, "loc": 0x42}, + {"name": "wb_ina3221", "bus": 89, "loc": 0x42}, + {"name": "wb_ina3221", "bus": 90, "loc": 0x42}, + # RC32312 + {"name": "wb_rc32312", "bus": 72, "loc": 0x09}, + {"name": "wb_24c64", "bus": 72, "loc": 0x50}, + {"name": "wb_rc32312", "bus": 73, "loc": 0x09}, + {"name": "wb_24c64", "bus": 73, "loc": 0x50}, + # xdpe132g5c i2c + {"name": "wb_xdpe132g5c", "bus": 64, "loc": 0x10}, + {"name": "wb_xdpe132g5c", "bus": 65, "loc": 0x10}, + {"name": "wb_xdpe132g5c", "bus": 66, "loc": 0x10}, + # LED + {"name": "wb_ina3221", "bus": 91, "loc": 0x42}, +] + +OPTOE = [ + {"name": "wb_24c02", "startbus": 24, "endbus": 31}, +] + +REBOOT_CTRL_PARAM = {} + +INIT_PARAM_PRE = [ + # set ina3221 shunt_resistor + # SCM_VDD12.0_C + {"loc": "33-0041/hwmon/hwmon*/shunt1_resistor", "value": "1000"}, + # SCM_OCM_V12.0_C + {"loc": "33-0041/hwmon/hwmon*/shunt3_resistor", "value": "1000"}, + # MAC_PLL0_VDD0.9_C + {"loc": "56-0040/hwmon/hwmon*/shunt1_resistor", "value": "2000"}, + # MAC_PLL1_VDD0.9_C + {"loc": "56-0040/hwmon/hwmon*/shunt2_resistor", "value": "2000"}, + # MAC_PLL3_VDD0.9_C + {"loc": "61-0040/hwmon/hwmon*/shunt1_resistor", "value": "2000"}, + # MAC_PLL2_VDD0.9_C + {"loc": "61-0040/hwmon/hwmon*/shunt2_resistor", "value": "2000"}, + # FAN1_VDD12_C + {"loc": "88-0042/hwmon/hwmon*/shunt1_resistor", "value": "1000"}, + # FAN2_VDD12_C + {"loc": "88-0042/hwmon/hwmon*/shunt2_resistor", "value": "1000"}, + # FAN3_VDD12_C + {"loc": "88-0042/hwmon/hwmon*/shunt3_resistor", "value": "1000"}, + # FAN4_VDD12_C + {"loc": "89-0042/hwmon/hwmon*/shunt1_resistor", "value": "1000"}, + # FAN5_VDD12_C + {"loc": "89-0042/hwmon/hwmon*/shunt2_resistor", "value": "1000"}, + # FAN6_VDD12_C + {"loc": "89-0042/hwmon/hwmon*/shunt3_resistor", "value": "1000"}, + # FAN7_VDD12_C + {"loc": "90-0042/hwmon/hwmon*/shunt1_resistor", "value": "1000"}, + # FAN8_VDD12_C + {"loc": "90-0042/hwmon/hwmon*/shunt2_resistor", "value": "1000"}, + # set avs threshold + # MAC_CORE_V + {"loc": "64-0040/hwmon/hwmon*/avs0_vout_min", "value": "630000"}, + {"loc": "64-0040/hwmon/hwmon*/avs0_vout_max", "value": "858000"}, + # MAC_ANALOG0 V0.9_V + {"loc": "65-0040/hwmon/hwmon*/avs0_vout_min", "value": "810000"}, + {"loc": "65-0040/hwmon/hwmon*/avs0_vout_max", "value": "990000"}, + # MAC_ANALOG0 V0.75_V + {"loc": "65-0040/hwmon/hwmon*/avs1_vout_min", "value": "675000"}, + {"loc": "65-0040/hwmon/hwmon*/avs1_vout_max", "value": "825000"}, + # MAC_ANALOG1 V0.9_V + {"loc": "66-0040/hwmon/hwmon*/avs0_vout_min", "value": "810000"}, + {"loc": "66-0040/hwmon/hwmon*/avs0_vout_max", "value": "990000"}, + # MAC_ANALOG1 V0.75_V + {"loc": "66-0040/hwmon/hwmon*/avs1_vout_min", "value": "675000"}, + {"loc": "66-0040/hwmon/hwmon*/avs1_vout_max", "value": "825000"}, + # # OE0_AVDD_RX_1.8_V + # {"loc": "67-0070/hwmon/hwmon*/avs0_vout_min", "value": "1710000"}, + # {"loc": "67-0070/hwmon/hwmon*/avs0_vout_max", "value": "1890000"}, + # {"loc": "67-0070/hwmon/hwmon*/avs0_vout", "value": "1800000"}, + # # OE0_AVDD_RX_1.2_V + # {"loc": "67-0070/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "67-0070/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "67-0070/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE0_AVDD_TX_1.8_V + # {"loc": "67-0068/hwmon/hwmon*/avs0_vout_min", "value": "1750000"}, + # {"loc": "67-0068/hwmon/hwmon*/avs0_vout_max", "value": "1950000"}, + # {"loc": "67-0068/hwmon/hwmon*/avs0_vout", "value": "1850000"}, + # # OE0_AVDD_TX_1.2_V + # {"loc": "67-0068/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "67-0068/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "67-0068/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE0_AVDD_TRX_0.75_V + # {"loc": "67-0060/hwmon/hwmon*/avs0_vout_min", "value": "713000"}, + # {"loc": "67-0060/hwmon/hwmon*/avs0_vout_max", "value": "788000"}, + # {"loc": "67-0060/hwmon/hwmon*/avs0_vout", "value": "750000"}, + # # OE1_AVDD_RX_1.8_V + # {"loc": "68-0070/hwmon/hwmon*/avs0_vout_min", "value": "1710000"}, + # {"loc": "68-0070/hwmon/hwmon*/avs0_vout_max", "value": "1890000"}, + # {"loc": "68-0070/hwmon/hwmon*/avs0_vout", "value": "1800000"}, + # # OE1_AVDD_RX_1.2_V + # {"loc": "68-0070/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "68-0070/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "68-0070/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE1_AVDD_TX_1.8_V + # {"loc": "68-0068/hwmon/hwmon*/avs0_vout_min", "value": "1750000"}, + # {"loc": "68-0068/hwmon/hwmon*/avs0_vout_max", "value": "1950000"}, + # {"loc": "68-0068/hwmon/hwmon*/avs0_vout", "value": "1850000"}, + # # OE1_AVDD_TX_1.2_V + # {"loc": "68-0068/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "68-0068/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "68-0068/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE1_AVDD_TRX_0.75_V + # {"loc": "68-0060/hwmon/hwmon*/avs0_vout_min", "value": "713000"}, + # {"loc": "68-0060/hwmon/hwmon*/avs0_vout_max", "value": "788000"}, + # {"loc": "68-0060/hwmon/hwmon*/avs0_vout", "value": "750000"}, + # # OE2_AVDD_RX_1.8_V + # {"loc": "68-006e/hwmon/hwmon*/avs0_vout_min", "value": "1710000"}, + # {"loc": "68-006e/hwmon/hwmon*/avs0_vout_max", "value": "1890000"}, + # {"loc": "68-006e/hwmon/hwmon*/avs0_vout", "value": "1800000"}, + # # OE2_AVDD_RX_1.2_V + # {"loc": "68-006e/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "68-006e/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "68-006e/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE2_AVDD_TX_1.8_V + # {"loc": "68-0066/hwmon/hwmon*/avs0_vout_min", "value": "1750000"}, + # {"loc": "68-0066/hwmon/hwmon*/avs0_vout_max", "value": "1950000"}, + # {"loc": "68-0066/hwmon/hwmon*/avs0_vout", "value": "1850000"}, + # # OE2_AVDD_TX_1.2_V + # {"loc": "68-0066/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "68-0066/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "68-0066/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE2_AVDD_TRX_0.75_V + # {"loc": "68-005e/hwmon/hwmon*/avs0_vout_min", "value": "713000"}, + # {"loc": "68-005e/hwmon/hwmon*/avs0_vout_max", "value": "788000"}, + # {"loc": "68-005e/hwmon/hwmon*/avs0_vout", "value": "750000"}, + # # OE3_AVDD_RX_1.8_V + # {"loc": "69-0070/hwmon/hwmon*/avs0_vout_min", "value": "1710000"}, + # {"loc": "69-0070/hwmon/hwmon*/avs0_vout_max", "value": "1890000"}, + # {"loc": "69-0070/hwmon/hwmon*/avs0_vout", "value": "1800000"}, + # # OE3_AVDD_RX_1.2_V + # {"loc": "69-0070/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "69-0070/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "69-0070/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE3_AVDD_TX_1.8_V + # {"loc": "69-0068/hwmon/hwmon*/avs0_vout_min", "value": "1750000"}, + # {"loc": "69-0068/hwmon/hwmon*/avs0_vout_max", "value": "1950000"}, + # {"loc": "69-0068/hwmon/hwmon*/avs0_vout", "value": "1850000"}, + # # OE3_AVDD_TX_1.2_V + # {"loc": "69-0068/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "69-0068/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "69-0068/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE3_AVDD_TRX_0.75_V + # {"loc": "69-0060/hwmon/hwmon*/avs0_vout_min", "value": "713000"}, + # {"loc": "69-0060/hwmon/hwmon*/avs0_vout_max", "value": "788000"}, + # {"loc": "69-0060/hwmon/hwmon*/avs0_vout", "value": "750000"}, + # # OE4_AVDD_RX_1.8_V + # {"loc": "69-006e/hwmon/hwmon*/avs0_vout_min", "value": "1710000"}, + # {"loc": "69-006e/hwmon/hwmon*/avs0_vout_max", "value": "1890000"}, + # {"loc": "69-006e/hwmon/hwmon*/avs0_vout", "value": "1800000"}, + # # OE4_AVDD_RX_1.2_V + # {"loc": "69-006e/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "69-006e/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "69-006e/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE4_AVDD_TX_1.8_V + # {"loc": "69-0066/hwmon/hwmon*/avs0_vout_min", "value": "1750000"}, + # {"loc": "69-0066/hwmon/hwmon*/avs0_vout_max", "value": "1950000"}, + # {"loc": "69-0066/hwmon/hwmon*/avs0_vout", "value": "1850000"}, + # # OE4_AVDD_TX_1.2_V + # {"loc": "69-0066/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "69-0066/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "69-0066/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE4_AVDD_TRX_0.75_V + # {"loc": "69-005e/hwmon/hwmon*/avs0_vout_min", "value": "713000"}, + # {"loc": "69-005e/hwmon/hwmon*/avs0_vout_max", "value": "788000"}, + # {"loc": "69-005e/hwmon/hwmon*/avs0_vout", "value": "750000"}, + # # OE5_AVDD_RX_1.8_V + # {"loc": "70-0070/hwmon/hwmon*/avs0_vout_min", "value": "1710000"}, + # {"loc": "70-0070/hwmon/hwmon*/avs0_vout_max", "value": "1890000"}, + # {"loc": "70-0070/hwmon/hwmon*/avs0_vout", "value": "1800000"}, + # # OE5_AVDD_RX_1.2_V + # {"loc": "70-0070/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "70-0070/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "70-0070/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE5_AVDD_TX_1.8_V + # {"loc": "70-0068/hwmon/hwmon*/avs0_vout_min", "value": "1750000"}, + # {"loc": "70-0068/hwmon/hwmon*/avs0_vout_max", "value": "1950000"}, + # {"loc": "70-0068/hwmon/hwmon*/avs0_vout", "value": "1850000"}, + # # OE5_AVDD_TX_1.2_V + # {"loc": "70-0068/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "70-0068/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "70-0068/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE5_AVDD_TRX_0.75_V + # {"loc": "70-0060/hwmon/hwmon*/avs0_vout_min", "value": "713000"}, + # {"loc": "70-0060/hwmon/hwmon*/avs0_vout_max", "value": "788000"}, + # {"loc": "70-0060/hwmon/hwmon*/avs0_vout", "value": "750000"}, + # # OE6_AVDD_RX_1.8_V + # {"loc": "70-006e/hwmon/hwmon*/avs0_vout_min", "value": "1710000"}, + # {"loc": "70-006e/hwmon/hwmon*/avs0_vout_max", "value": "1890000"}, + # {"loc": "70-006e/hwmon/hwmon*/avs0_vout", "value": "1800000"}, + # # OE6_AVDD_RX_1.2_V + # {"loc": "70-006e/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "70-006e/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "70-006e/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE6_AVDD_TX_1.8_V + # {"loc": "70-0066/hwmon/hwmon*/avs0_vout_min", "value": "1750000"}, + # {"loc": "70-0066/hwmon/hwmon*/avs0_vout_max", "value": "1950000"}, + # {"loc": "70-0066/hwmon/hwmon*/avs0_vout", "value": "1850000"}, + # # OE6_AVDD_TX_1.2_V + # {"loc": "70-0066/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "70-0066/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "70-0066/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE6_AVDD_TRX_0.75_V + # {"loc": "70-005e/hwmon/hwmon*/avs0_vout_min", "value": "713000"}, + # {"loc": "70-005e/hwmon/hwmon*/avs0_vout_max", "value": "788000"}, + # {"loc": "70-005e/hwmon/hwmon*/avs0_vout", "value": "750000"}, + # # OE7_AVDD_RX_1.8_V + # {"loc": "67-006e/hwmon/hwmon*/avs0_vout_min", "value": "1710000"}, + # {"loc": "67-006e/hwmon/hwmon*/avs0_vout_max", "value": "1890000"}, + # {"loc": "67-006e/hwmon/hwmon*/avs0_vout", "value": "1800000"}, + # # OE7_AVDD_RX_1.2_V + # {"loc": "67-006e/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "67-006e/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "67-006e/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE7_AVDD_TX_1.8_V + # {"loc": "67-0066/hwmon/hwmon*/avs0_vout_min", "value": "1750000"}, + # {"loc": "67-0066/hwmon/hwmon*/avs0_vout_max", "value": "1950000"}, + # {"loc": "67-0066/hwmon/hwmon*/avs0_vout", "value": "1850000"}, + # # OE7_AVDD_TX_1.2_V + # {"loc": "67-0066/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "67-0066/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "67-0066/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE7_AVDD_TRX_0.75_V + # {"loc": "67-005e/hwmon/hwmon*/avs0_vout_min", "value": "713000"}, + # {"loc": "67-005e/hwmon/hwmon*/avs0_vout_max", "value": "788000"}, + # {"loc": "67-005e/hwmon/hwmon*/avs0_vout", "value": "750000"}, + # RLML_VDD V3.3_V *1.5 + {"loc": "71-0068/hwmon/hwmon*/avs0_vout_min", "value": "1980000"}, + {"loc": "71-0068/hwmon/hwmon*/avs0_vout_max", "value": "2420000"}, + # RLMH_VDD V3.3_V *1.5 + {"loc": "71-0068/hwmon/hwmon*/avs1_vout_min", "value": "1980000"}, + {"loc": "71-0068/hwmon/hwmon*/avs1_vout_max", "value": "2420000"}, + # OCM_XDPE_VCCIN_V + {"loc": "5-0070/hwmon/hwmon*/avs0_vout_min", "value": "1350000"}, + {"loc": "5-0070/hwmon/hwmon*/avs0_vout_max", "value": "2200000"}, + # OCM_XDPE_P1V8_V + {"loc": "5-0070/hwmon/hwmon*/avs1_vout_min", "value": "1690000"}, + {"loc": "5-0070/hwmon/hwmon*/avs1_vout_max", "value": "1910000"}, + # OCM_XDPE_P1V05_V + {"loc": "5-006e/hwmon/hwmon*/avs0_vout_min", "value": "954000"}, + {"loc": "5-006e/hwmon/hwmon*/avs0_vout_max", "value": "1160000"}, + # OCM_XDPE_VNN_PCH_V + {"loc": "5-006e/hwmon/hwmon*/avs1_vout_min", "value": "540000"}, + {"loc": "5-006e/hwmon/hwmon*/avs1_vout_max", "value": "1320000"}, + # OCM_XDPE_VNN_NAC_V + {"loc": "5-0068/hwmon/hwmon*/avs0_vout_min", "value": "540000"}, + {"loc": "5-0068/hwmon/hwmon*/avs0_vout_max", "value": "1320000"}, + # OCM_XDPE_VCC_ANA_V + {"loc": "5-0068/hwmon/hwmon*/avs1_vout_min", "value": "900000"}, + {"loc": "5-0068/hwmon/hwmon*/avs1_vout_max", "value": "1100000"}, + # OCM_XDPE_P1V2_VDDQ_V + {"loc": "5-005e/hwmon/hwmon*/avs0_vout_min", "value": "1120000"}, + {"loc": "5-005e/hwmon/hwmon*/avs0_vout_max", "value": "1280000"}, +] + +INIT_PARAM = [] + +INIT_COMMAND_PRE = [] + +INIT_COMMAND = [ + # enable fan watchdog + {"path": "/dev/cpld5", "offset": 0x22, "value": [0x01], "gettype": "devfile"}, + {"path": "/dev/cpld6", "offset": 0x22, "value": [0x01], "gettype": "devfile"}, +] + +UPGRADE_SUMMARY = { + "devtype": 0x40d9, + + "slot0": { + "subtype": 0, + "SPI-LOGIC-DEV": { + "chain1":{ + "name":"IOB_FPGA", + "is_support_warm_upg":0, + "init_cmd": [ + # firmware upgrade set sysled blue/amber alternate flashing + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x50, "value": [0x01]} + ] + }, + "chain2":{ + "name":"DOM_FPGA", + "is_support_warm_upg":0, + "init_cmd": [ + # firmware upgrade set sysled blue/amber alternate flashing + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x50, "value": [0x01]} + ] + }, + "chain3":{ + "name":"SCM_CPLD", + "is_support_warm_upg":0, + "init_cmd": [ + # firmware upgrade set sysled blue/amber alternate flashing + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x50, "value": [0x01]} + ] + }, + "chain4":{ + "name":"MCB_CPLD", + "is_support_warm_upg":0, + "init_cmd": [ + # firmware upgrade set sysled blue/amber alternate flashing + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x50, "value": [0x01]} + ] + }, + "chain5":{ + "name":"SMB_CPLD", + "is_support_warm_upg":0, + "init_cmd": [ + # firmware upgrade set sysled blue/amber alternate flashing + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x50, "value": [0x01]} + ] + }, + "chain6":{ + "name":"FCB_B_CPLD", + "is_support_warm_upg":0, + "init_cmd": [ + # firmware upgrade set sysled blue/amber alternate flashing + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x50, "value": [0x01]} + ] + }, + "chain7":{ + "name":"FCB_T_CPLD", + "is_support_warm_upg":0, + "init_cmd": [ + # firmware upgrade set sysled blue/amber alternate flashing + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x50, "value": [0x01]} + ] + }, + "chain8":{ + "name":"MAC_PCIe", + "is_support_warm_upg":0, + "init_cmd": [ + # firmware upgrade set sysled blue/amber alternate flashing + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x50, "value": [0x01]} + ] + }, + }, + + "TEST": { + "fpga": [ + {"chain": 1, "file": "/etc/.upgrade_test/0x40d9/iob_fpga_test_header.bin", "display_name": "IOB_FPGA"}, + {"chain": 2, "file": "/etc/.upgrade_test/0x40d9/dom_fpga_test_header.bin", "display_name": "DOM_FPGA"}, + ], + "cpld": [ + {"chain": 3, "file": "/etc/.upgrade_test/0x40d9/scm_cpld_spi_test_header.bin", "display_name": "SCM_CPLD_SPI"}, + {"chain": 4, "file": "/etc/.upgrade_test/0x40d9/mcb_cpld_spi_test_header.bin", "display_name": "MCB_CPLD_SPI"}, + {"chain": 5, "file": "/etc/.upgrade_test/0x40d9/smb_cpld_spi_test_header.bin", "display_name": "SMB_CPLD_SPI"}, + {"chain": 6, "file": "/etc/.upgrade_test/0x40d9/fcb_b_cpld_spi_test_header.bin", "display_name": "FCB_B_CPLD_SPI"}, + {"chain": 7, "file": "/etc/.upgrade_test/0x40d9/fcb_t_cpld_spi_test_header.bin", "display_name": "FCB_T_CPLD_SPI"}, + #{"chain": 8, "file": "/etc/.upgrade_test/0x40d9/mac_pcie_spi_test_header.bin", "display_name": "MAC_PCIe"}, + ], + }, + }, + + "BMC": { + "name": "BMC", + "init_cmd": [ + # firmware upgrade set sysled blue/amber alternate flashing + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x50, "value": [0x01]} + ], + "finish_cmd": [], + }, +} + +PLATFORM_E2_CONF = { + "fan": [ + {"name": "fan1", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/40-0050/eeprom"}, + {"name": "fan2", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/48-0050/eeprom"}, + {"name": "fan3", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/41-0050/eeprom"}, + {"name": "fan4", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/49-0050/eeprom"}, + {"name": "fan5", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/42-0050/eeprom"}, + {"name": "fan6", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/50-0050/eeprom"}, + {"name": "fan7", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/43-0050/eeprom"}, + {"name": "fan8", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/51-0050/eeprom"}, + ], + "psu": [ + {"name": "psu1", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/11-0050/eeprom"}, + {"name": "psu2", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/10-0050/eeprom"}, + ], + "syseeprom": [ + {"name": "syseeprom", "e2_type": "onie_tlv", "e2_path": "/sys/bus/i2c/devices/1-0056/eeprom"}, + ], + "scm": [ + {"name": "scm", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/32-0052/eeprom"}, + ], + "smb": [ + {"name": "smb", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/3-0051/eeprom"}, + ], + "chassis": [ + {"name": "chassis", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/2-0051/eeprom"}, + ], +} + +PLATFORM_POWER_CONF = [ + { + "name": "Input power total", + "unit": "W", + "children": [ + { + "name": "PSU1 input", + "pre_check": { + "loc": "/sys/s3ip/psu/psu1/present", + "gettype": "sysfs", "mask": 0x01, "okval": 1, + "not_ok_msg": "ABSENT" + }, + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/11-0058/hwmon/hwmon*/power1_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)/1000000)" + }, + { + "name": "PSU2 input", + "pre_check": { + "loc": "/sys/s3ip/psu/psu2/present", + "gettype": "sysfs", "mask": 0x01, "okval": 1, + "not_ok_msg": "ABSENT" + }, + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/10-0058/hwmon/hwmon*/power1_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)/1000000)" + }, + ] + }, + { + "name": "Output power total", + "unit": "W", + "children": [ + { + "name": "PSU1 output", + "pre_check": { + "loc": "/sys/s3ip/psu/psu1/present", + "gettype": "sysfs", "mask": 0x01, "okval": 1, + "not_ok_msg": "ABSENT" + }, + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/11-0058/hwmon/hwmon*/power2_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)/1000000)" + }, + { + "name": "PSU2 output", + "pre_check": { + "loc": "/sys/s3ip/psu/psu2/present", + "gettype": "sysfs", "mask": 0x01, "okval": 1, + "not_ok_msg": "ABSENT" + }, + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/10-0058/hwmon/hwmon*/power2_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)/1000000)" + }, + ] + }, + { + "name": "MAC power consumption", + "unit": "W", + "children": [ + { + "name": "MAC_CORE", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/64-0040/hwmon/hwmon*/power3_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*2/1000000)" + }, + { + "name": "MAC_ANALOG0 V0.9", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/65-0040/hwmon/hwmon*/power3_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)/1000000)" + }, + { + "name": "MAC_ANALOG0 V0.75", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/65-0040/hwmon/hwmon*/power4_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)/1000000)" + }, + { + "name": "MAC_ANALOG1 V0.9", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/66-0040/hwmon/hwmon*/power3_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)/1000000)" + }, + { + "name": "MAC_ANALOG1 V0.75", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/66-0040/hwmon/hwmon*/power4_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)/1000000)" + }, + { + "name": "MAC_PLL0_VDD0.9", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/56-0040/hwmon/hwmon*/in2_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/56-0040/hwmon/hwmon*/curr2_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "MAC_PLL1_VDD0.9", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/56-0040/hwmon/hwmon*/in1_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/56-0040/hwmon/hwmon*/curr1_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "MAC_PLL2_VDD0.9", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/58-0040/hwmon/hwmon*/in1_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/58-0040/hwmon/hwmon*/curr1_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "MAC_PLL3_VDD0.9", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/58-0040/hwmon/hwmon*/in3_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/58-0040/hwmon/hwmon*/curr3_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "MAC_VDD_0.8", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/58-0040/hwmon/hwmon*/in2_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/58-0040/hwmon/hwmon*/curr2_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "MAC_VDD_1.8", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/60-0040/hwmon/hwmon*/in1_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/60-0040/hwmon/hwmon*/curr1_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "MAC_VDD_1.5", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/60-0040/hwmon/hwmon*/in2_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/60-0040/hwmon/hwmon*/curr2_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "MAC_VDD_1.2", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/61-0040/hwmon/hwmon*/in1_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/61-0040/hwmon/hwmon*/curr1_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + } + ] + }, + { + "name": "CPO OE0 power consumption", + "unit": "W", + "children": [ + { + "name": "OE0_AVDD_RX_1.8", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/67-0070/hwmon/hwmon*/loopa_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/67-0070/hwmon/hwmon*/loopa_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.97+220)/1000000)" + }, + { + "name": "OE0_AVDD_RX_1.2", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/67-0070/hwmon/hwmon*/loopb_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/67-0070/hwmon/hwmon*/loopb_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.984+180)/1000000)" + }, + { + "name": "OE0_AVDD_TX_1.8", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/67-0068/hwmon/hwmon*/loopa_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/67-0068/hwmon/hwmon*/loopa_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.984+177)/1000000)" + }, + { + "name": "OE0_AVDD_TX_1.2", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/67-0068/hwmon/hwmon*/loopb_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/67-0068/hwmon/hwmon*/loopb_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.974+126)/1000000)" + }, + { + "name": "OE0_AVDD_TRX_0.75", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/67-0060/hwmon/hwmon*/loopa_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/67-0060/hwmon/hwmon*/loopa_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.984+140)/1000000)" + }, + ] + }, + { + "name": "CPO OE1 power consumption", + "unit": "W", + "children": [ + { + "name": "OE1_AVDD_RX_1.8", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/68-0070/hwmon/hwmon*/loopa_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/68-0070/hwmon/hwmon*/loopa_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.97+220)/1000000)" + }, + { + "name": "OE1_AVDD_RX_1.2", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/68-0070/hwmon/hwmon*/loopb_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/68-0070/hwmon/hwmon*/loopb_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.984+180)/1000000)" + }, + { + "name": "OE1_AVDD_TX_1.8", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/68-0068/hwmon/hwmon*/loopa_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/68-0068/hwmon/hwmon*/loopa_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.984+177)/1000000)" + }, + { + "name": "OE1_AVDD_TX_1.2", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/68-0068/hwmon/hwmon*/loopb_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/68-0068/hwmon/hwmon*/loopb_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.974+126)/1000000)" + }, + { + "name": "OE1_AVDD_TRX_0.75", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/68-0060/hwmon/hwmon*/loopa_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/68-0060/hwmon/hwmon*/loopa_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.984+140)/1000000)" + }, + ] + }, + { + "name": "CPO OE2 power consumption", + "unit": "W", + "children": [ + { + "name": "OE2_AVDD_RX_1.8", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/68-006e/hwmon/hwmon*/loopa_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/68-006e/hwmon/hwmon*/loopa_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.97+220)/1000000)" + }, + { + "name": "OE2_AVDD_RX_1.2", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/68-006e/hwmon/hwmon*/loopb_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/68-006e/hwmon/hwmon*/loopb_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.984+180)/1000000)" + }, + { + "name": "OE2_AVDD_TX_1.8", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/68-0066/hwmon/hwmon*/loopa_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/68-0066/hwmon/hwmon*/loopa_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.984+177)/1000000)" + }, + { + "name": "OE2_AVDD_TX_1.2", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/68-0066/hwmon/hwmon*/loopb_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/68-0066/hwmon/hwmon*/loopb_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.974+126)/1000000)" + }, + { + "name": "OE2_AVDD_TRX_0.75", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/68-005e/hwmon/hwmon*/loopa_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/68-005e/hwmon/hwmon*/loopa_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.984+140)/1000000)" + }, + ] + }, + { + "name": "CPO OE3 power consumption", + "unit": "W", + "children": [ + { + "name": "OE3_AVDD_RX_1.8", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/69-0070/hwmon/hwmon*/loopa_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/69-0070/hwmon/hwmon*/loopa_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.97+220)/1000000)" + }, + { + "name": "OE3_AVDD_RX_1.2", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/69-0070/hwmon/hwmon*/loopb_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/69-0070/hwmon/hwmon*/loopb_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.984+180)/1000000)" + }, + { + "name": "OE3_AVDD_TX_1.8", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/69-0068/hwmon/hwmon*/loopa_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/69-0068/hwmon/hwmon*/loopa_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.984+177)/1000000)" + }, + { + "name": "OE3_AVDD_TX_1.2", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/69-0068/hwmon/hwmon*/loopb_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/69-0068/hwmon/hwmon*/loopb_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.974+126)/1000000)" + }, + { + "name": "OE3_AVDD_TRX_0.75", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/69-0060/hwmon/hwmon*/loopa_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/69-0060/hwmon/hwmon*/loopa_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.984+140)/1000000)" + }, + ] + }, + { + "name": "CPO OE4 power consumption", + "unit": "W", + "children": [ + { + "name": "OE4_AVDD_RX_1.8", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/69-006e/hwmon/hwmon*/loopa_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/69-006e/hwmon/hwmon*/loopa_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.97+220)/1000000)" + }, + { + "name": "OE4_AVDD_RX_1.2", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/69-006e/hwmon/hwmon*/loopb_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/69-006e/hwmon/hwmon*/loopb_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.984+180)/1000000)" + }, + { + "name": "OE4_AVDD_TX_1.8", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/69-0066/hwmon/hwmon*/loopa_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/69-0066/hwmon/hwmon*/loopa_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.984+177)/1000000)" + }, + { + "name": "OE4_AVDD_TX_1.2", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/69-0066/hwmon/hwmon*/loopb_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/69-0066/hwmon/hwmon*/loopb_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.974+126)/1000000)" + }, + { + "name": "OE4_AVDD_TRX_0.75", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/69-005e/hwmon/hwmon*/loopa_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/69-005e/hwmon/hwmon*/loopa_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.984+140)/1000000)" + }, + ] + }, + { + "name": "CPO OE5 power consumption", + "unit": "W", + "children": [ + { + "name": "OE5_AVDD_RX_1.8", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/70-0070/hwmon/hwmon*/loopa_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/70-0070/hwmon/hwmon*/loopa_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.97+220)/1000000)" + }, + { + "name": "OE5_AVDD_RX_1.2", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/70-0070/hwmon/hwmon*/loopb_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/70-0070/hwmon/hwmon*/loopb_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.984+180)/1000000)" + }, + { + "name": "OE5_AVDD_TX_1.8", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/70-0068/hwmon/hwmon*/loopa_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/70-0068/hwmon/hwmon*/loopa_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.984+177)/1000000)" + }, + { + "name": "OE5_AVDD_TX_1.2", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/70-0068/hwmon/hwmon*/loopb_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/70-0068/hwmon/hwmon*/loopb_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.974+126)/1000000)" + }, + { + "name": "OE5_AVDD_TRX_0.75", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/70-0060/hwmon/hwmon*/loopa_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/70-0060/hwmon/hwmon*/loopa_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.984+140)/1000000)" + }, + ] + }, + { + "name": "CPO OE6 power consumption", + "unit": "W", + "children": [ + { + "name": "OE6_AVDD_RX_1.8", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/70-006e/hwmon/hwmon*/loopa_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/70-006e/hwmon/hwmon*/loopa_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.97+220)/1000000)" + }, + { + "name": "OE6_AVDD_RX_1.2", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/70-006e/hwmon/hwmon*/loopb_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/70-006e/hwmon/hwmon*/loopb_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.984+180)/1000000)" + }, + { + "name": "OE6_AVDD_TX_1.8", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/70-0066/hwmon/hwmon*/loopa_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/70-0066/hwmon/hwmon*/loopa_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.984+177)/1000000)" + }, + { + "name": "OE6_AVDD_TX_1.2", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/70-0066/hwmon/hwmon*/loopb_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/70-0066/hwmon/hwmon*/loopb_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.974+126)/1000000)" + }, + { + "name": "OE6_AVDD_TRX_0.75", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/70-005e/hwmon/hwmon*/loopa_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/70-005e/hwmon/hwmon*/loopa_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.984+140)/1000000)" + }, + ] + }, + { + "name": "CPO OE7 power consumption", + "unit": "W", + "children": [ + { + "name": "OE7_AVDD_RX_1.8", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/67-006e/hwmon/hwmon*/loopa_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/67-006e/hwmon/hwmon*/loopa_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.97+220)/1000000)" + }, + { + "name": "OE7_AVDD_RX_1.2", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/67-006e/hwmon/hwmon*/loopb_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/67-006e/hwmon/hwmon*/loopb_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.984+180)/1000000)" + }, + { + "name": "OE7_AVDD_TX_1.8", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/67-0066/hwmon/hwmon*/loopa_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/67-0066/hwmon/hwmon*/loopa_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.984+177)/1000000)" + }, + { + "name": "OE7_AVDD_TX_1.2", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/67-0066/hwmon/hwmon*/loopb_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/67-0066/hwmon/hwmon*/loopb_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.974+126)/1000000)" + }, + { + "name": "OE7_AVDD_TRX_0.75", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/67-005e/hwmon/hwmon*/loopa_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/67-005e/hwmon/hwmon*/loopa_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.984+140)/1000000)" + }, + ] + }, + { + "name": "RLM power consumption", + "unit": "W", + "children": [ + { + "name": "RLML_VDD V3.3", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/71-0068/hwmon/hwmon*/loopa_pout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*1.5/1000000)" + }, + { + "name": "RLMH_VDD V3.3", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/71-0068/hwmon/hwmon*/loopb_pout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*1.5/1000000)" + }, + ] + }, + { + "name": "CPU sub-module power consumption", + "unit": "W", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/33-0041/hwmon/hwmon*/in3_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/33-0041/hwmon/hwmon*/curr3_input", + "int_decode": 10, + } + ], + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "FAN power consumption total", + "unit": "W", + "children": [ + { + "name": "FAN1 power consumption", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/88-0042/hwmon/hwmon*/in1_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/88-0042/hwmon/hwmon*/curr1_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "FAN2 power consumption", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/89-0042/hwmon/hwmon*/in2_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/89-0042/hwmon/hwmon*/curr2_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "FAN3 power consumption", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/88-0042/hwmon/hwmon*/in2_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/88-0042/hwmon/hwmon*/curr2_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "FAN4 power consumption", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/89-0042/hwmon/hwmon*/in3_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/89-0042/hwmon/hwmon*/curr3_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "FAN5 power consumption", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/88-0042/hwmon/hwmon*/in3_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/88-0042/hwmon/hwmon*/curr3_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "FAN6 power consumption", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/90-0042/hwmon/hwmon*/in1_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/90-0042/hwmon/hwmon*/curr1_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "FAN7 power consumption", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/89-0042/hwmon/hwmon*/in1_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/89-0042/hwmon/hwmon*/curr1_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "FAN8 power consumption", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/90-0042/hwmon/hwmon*/in2_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/90-0042/hwmon/hwmon*/curr2_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + + ] + }, +] + +REBOOT_CAUSE_PARA = { + "reboot_cause_list": [ + { + "name": "otp_switch_reboot", + "monitor_point": {"gettype": "file_exist", "judge_file": "/etc/.otp_switch_reboot_flag", "okval": True}, + "record": [ + {"record_type": "file", "mode": "cover", "log": "Thermal Overload: ASIC, ", + "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"}, + {"record_type": "file", "mode": "add", "log": "Thermal Overload: ASIC, ", + "path": "/etc/sonic/.reboot/.history-reboot-cause.txt", "file_max_size": 1 * 1024 * 1024} + ], + "finish_operation": [ + {"gettype": "cmd", "cmd": "rm -rf /etc/.otp_switch_reboot_flag"}, + ] + }, + { + "name": "otp_other_reboot", + "monitor_point": {"gettype": "file_exist", "judge_file": "/etc/.otp_other_reboot_flag", "okval": True}, + "record": [ + {"record_type": "file", "mode": "cover", "log": "Thermal Overload: Other, ", + "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"}, + {"record_type": "file", "mode": "add", "log": "Thermal Overload: Other, ", + "path": "/etc/sonic/.reboot/.history-reboot-cause.txt", "file_max_size": 1 * 1024 * 1024} + ], + "finish_operation": [ + {"gettype": "cmd", "cmd": "rm -rf /etc/.otp_other_reboot_flag"}, + ] + }, + ], + "other_reboot_cause_record": [ + {"record_type": "file", "mode": "cover", "log": "Other, ", "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"}, + {"record_type": "file", "mode": "add", "log": "Other, ", "path": "/etc/sonic/.reboot/.history-reboot-cause.txt"} + ], +} + +POWER_CTRL_CONF = { + "oe": [ + { + "name": "OE0", + "status": [ + { + "val_conf": {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x22, "mask": 0x01}, + "off": [0x00], + "on": [0x01], + } + ], + "on": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfe, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_7", "value": 0x00, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x81, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_7", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfe, "value": 0x01, "delay": 0.001}, + ], + "off": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfe, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_7", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x81, "value": 0xfe}, + ], + "cycle": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfe, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_7", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x81, "value": 0xfe, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x81, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_7", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfe, "value": 0x01, "delay": 0.001}, + ], + "reset": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfe, "value": 0x00}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfe, "value": 0x01, "delay": 0.01}, + ], + }, + { + "name": "OE1", + "status": [ + { + "val_conf": {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x22, "mask": 0x02}, + "off": [0x00], + "on": [0x02], + } + ], + "on": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfd, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_4", "value": 0x00, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x82, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_4", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfd, "value": 0x02, "delay": 0.001}, + ], + "off": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfd, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_4", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x82, "value": 0xfe}, + ], + "cycle": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfd, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_4", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x82, "value": 0xfe, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x82, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_4", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfd, "value": 0x02, "delay": 0.001}, + ], + "reset": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfd, "value": 0x00}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfd, "value": 0x02, "delay": 0.01}, + ], + }, + { + "name": "OE2", + "status": [ + { + "val_conf": {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x22, "mask": 0x04}, + "off": [0x00], + "on": [0x04], + } + ], + "on": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfb, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_3", "value": 0x00, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x83, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_3", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfb, "value": 0x04, "delay": 0.001}, + ], + "off": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfb, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_3", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x83, "value": 0xfe}, + ], + "cycle": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfb, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_3", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x83, "value": 0xfe, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x83, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_3", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfb, "value": 0x04, "delay": 0.001}, + ], + "reset": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfb, "value": 0x00}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfb, "value": 0x04, "delay": 0.01}, + ], + }, + { + "name": "OE3", + "status": [ + { + "val_conf": {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x22, "mask": 0x08}, + "off": [0x00], + "on": [0x08], + } + ], + "on": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xf7, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_0", "value": 0x00, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x84, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_0", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xf7, "value": 0x08, "delay": 0.001}, + ], + "off": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xf7, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_0", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x84, "value": 0xfe}, + ], + "cycle": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xf7, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_0", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x84, "value": 0xfe, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x84, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_0", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xf7, "value": 0x08, "delay": 0.001}, + ], + "reset": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xf7, "value": 0x00}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xf7, "value": 0x08, "delay": 0.01}, + ], + }, + { + "name": "OE4", + "status": [ + { + "val_conf": {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x22, "mask": 0x10}, + "off": [0x00], + "on": [0x10], + } + ], + "on": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xef, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_1", "value": 0x00, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x85, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_1", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xef, "value": 0x10, "delay": 0.001}, + ], + "off": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xef, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_1", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x85, "value": 0xfe}, + ], + "cycle": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xef, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_1", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x85, "value": 0xfe, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x85, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_1", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xef, "value": 0x10, "delay": 0.001}, + ], + "reset": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xef, "value": 0x00}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xef, "value": 0x10, "delay": 0.01}, + ], + }, + { + "name": "OE5", + "status": [ + { + "val_conf": {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x22, "mask": 0x20}, + "off": [0x00], + "on": [0x20], + } + ], + "on": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xdf, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_3", "value": 0x00, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x86, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_3", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xdf, "value": 0x20, "delay": 0.001}, + ], + "off": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xdf, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_3", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x86, "value": 0xfe}, + ], + "cycle": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xdf, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_3", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x86, "value": 0xfe, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x86, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_3", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xdf, "value": 0x20, "delay": 0.001}, + ], + "reset": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xdf, "value": 0x00}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xdf, "value": 0x20, "delay": 0.01}, + ], + }, + { + "name": "OE6", + "status": [ + { + "val_conf": {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x22, "mask": 0x40}, + "off": [0x00], + "on": [0x40], + } + ], + "on": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xbf, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_4", "value": 0x00, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x87, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_4", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xbf, "value": 0x40, "delay": 0.001}, + ], + "off": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xbf, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_4", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x87, "value": 0xfe}, + ], + "cycle": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xbf, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_4", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x87, "value": 0xfe, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x87, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_4", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xbf, "value": 0x40, "delay": 0.001}, + ], + "reset": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xbf, "value": 0x00}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xbf, "value": 0x40, "delay": 0.01}, + ], + }, + { + "name": "OE7", + "status": [ + { + "val_conf": {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x22, "mask": 0x80}, + "off": [0x00], + "on": [0x80], + } + ], + "on": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0x7f, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_7", "value": 0x00, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x88, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_7", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0x7f, "value": 0x80, "delay": 0.001}, + ], + "off": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0x7f, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_7", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x88, "value": 0xfe}, + ], + "cycle": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0x7f, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_7", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x88, "value": 0xfe, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x88, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_7", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0x7f, "value": 0x80, "delay": 0.001}, + ], + "reset": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0x7f, "value": 0x00}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0x7f, "value": 0x80, "delay": 0.01}, + ], + } + ] +} + +SET_FW_MAC_CONF = [ + { + "name": "eth0", + "e2_name": "syseeprom", + "get_act_mac": {"cmd": "ethtool -e eth0 offset 0 length 6 |grep 0x0000 | awk -F':' '{gsub(/ /, \":\", $2);print $2}'| sed 's/^[[:space:]]*//' | sed 's/:\s*$//'", "gettype": "cmd_str"}, + "set_mac_cfg": { + "type": 1, + "cmd": {"cmd": "ethtool -E eth0 magic 0x15338086 offset %s value 0x%s length 1", "gettype": "cmd", "delay": 0.1}, + }, + "check_mac_cfg": {"cmd": "ethtool -e eth0 offset 0 length 6 |grep 0x0000 | awk -F':' '{gsub(/ /, \":\", $2);print $2}'| sed 's/^[[:space:]]*//' | sed 's/:\s*$//'", "gettype": "cmd_str"}, + } +] + +SET_MAC_CONF = SET_FW_MAC_CONF +PRODUCT_NAME_CONF = {} diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/config/x86_64_micas_m2_w6940_128x1_fr4_r0_0x40d9_v01_dc_config.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/config/x86_64_micas_m2_w6940_128x1_fr4_r0_0x40d9_v01_dc_config.py new file mode 100755 index 00000000000..62035875bb5 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/config/x86_64_micas_m2_w6940_128x1_fr4_r0_0x40d9_v01_dc_config.py @@ -0,0 +1,3143 @@ +#!/usr/bin/python +# -*- coding: UTF-8 -*- + +# CPO 100 board modified configuration, support 1 DC PSUS + +from platform_common import * + +STARTMODULE = { + "hal_fanctrl": 1, + "hal_ledctrl": 1, + "avscontrol": 1, + "dev_monitor": 1, + "tty_console": 0, + "reboot_cause": 1, + "pmon_syslog": 1, + "sff_temp_polling": 1, + "generate_airflow": 0, + "product_name": 1, + "generate_mgmt_version": 0, + "set_fw_mac": 1, +} + +DEV_MONITOR_PARAM = { + "polling_time": 10, + "psus": [ + { + "name": "psu2", + "present": {"gettype": "i2c", "bus": 13, "loc": 0x1d, "offset": 0x42, "presentbit": 0, "okval": 0}, + "device": [ + {"id": "psu2pmbus", "name": "wb_fsp1200", "bus": 10, "loc": 0x58, "attr": "hwmon"}, + {"id": "psu2frue2", "name": "wb_24c02", "bus": 10, "loc": 0x50, "attr": "eeprom"}, + ], + }, + ], + "fans": [ + { + "name": "fan7", + "present": {"gettype": "i2c", "bus": 44, "loc": 0x0d, "offset": 0x5b, "presentbit": 0, "okval": 0}, + "device": [ + {"id": "fan7frue2", "name": "wb_24c64", "bus": 43, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "fan5", + "present": {"gettype": "i2c", "bus": 44, "loc": 0x0d, "offset": 0x5b, "presentbit": 1, "okval": 0}, + "device": [ + {"id": "fan5frue2", "name": "wb_24c64", "bus": 42, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "fan3", + "present": {"gettype": "i2c", "bus": 44, "loc": 0x0d, "offset": 0x5b, "presentbit": 2, "okval": 0}, + "device": [ + {"id": "fan3frue2", "name": "wb_24c64", "bus": 41, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "fan1", + "present": {"gettype": "i2c", "bus": 44, "loc": 0x0d, "offset": 0x5b, "presentbit": 3, "okval": 0}, + "device": [ + {"id": "fan1frue2", "name": "wb_24c64", "bus":40, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "fan8", + "present": {"gettype": "i2c", "bus": 52, "loc": 0x0d, "offset": 0x5b, "presentbit": 0, "okval": 0}, + "device": [ + {"id": "fan8frue2", "name": "wb_24c64", "bus": 51, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "fan6", + "present": {"gettype": "i2c", "bus": 52, "loc": 0x0d, "offset": 0x5b, "presentbit": 1, "okval": 0}, + "device": [ + {"id": "fan6frue2", "name": "wb_24c64", "bus": 50, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "fan4", + "present": {"gettype": "i2c", "bus": 52, "loc": 0x0d, "offset": 0x5b, "presentbit": 2, "okval": 0}, + "device": [ + {"id": "fan4frue2", "name": "wb_24c64", "bus": 49, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "fan2", + "present": {"gettype": "i2c", "bus": 52, "loc": 0x0d, "offset": 0x5b, "presentbit": 3, "okval": 0}, + "device": [ + {"id": "fan2frue2", "name": "wb_24c64", "bus": 48, "loc": 0x50, "attr": "eeprom"}, + ], + }, + ], + "others": [ + { + "name": "eeprom", + "device": [ + {"id": "eeprom_1", "name": "wb_24c02", "bus": 1, "loc": 0x56, "attr": "eeprom"}, + {"id": "eeprom_2", "name": "wb_24c02", "bus": 1, "loc": 0x57, "attr": "eeprom"}, + {"id": "eeprom_3", "name": "wb_24c02", "bus": 2, "loc": 0x51, "attr": "eeprom"}, + {"id": "eeprom_4", "name": "wb_24c02", "bus": 3, "loc": 0x51, "attr": "eeprom"}, + {"id": "eeprom_5", "name": "wb_24c02", "bus": 32, "loc": 0x52, "attr": "eeprom"}, + {"id": "eeprom_6", "name": "wb_24c02", "bus": 12, "loc": 0x57, "attr": "eeprom"}, + ], + }, + { + "name": "oe_mcu", + "device": [ + {"id": "oe_mcu_1", "name": "wb_24c02", "bus": 24, "loc": 0x50, "attr": "eeprom"}, + {"id": "oe_mcu_2", "name": "wb_24c02", "bus": 25, "loc": 0x50, "attr": "eeprom"}, + {"id": "oe_mcu_3", "name": "wb_24c02", "bus": 26, "loc": 0x50, "attr": "eeprom"}, + {"id": "oe_mcu_4", "name": "wb_24c02", "bus": 27, "loc": 0x50, "attr": "eeprom"}, + {"id": "oe_mcu_5", "name": "wb_24c02", "bus": 28, "loc": 0x50, "attr": "eeprom"}, + {"id": "oe_mcu_6", "name": "wb_24c02", "bus": 29, "loc": 0x50, "attr": "eeprom"}, + {"id": "oe_mcu_7", "name": "wb_24c02", "bus": 30, "loc": 0x50, "attr": "eeprom"}, + {"id": "oe_mcu_8", "name": "wb_24c02", "bus": 31, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "tmp275", + "device": [ + {"id": "tmp275_1", "name": "wb_tmp275", "bus": 34, "loc": 0x4c, "attr": "hwmon"}, + {"id": "tmp275_2", "name": "wb_tmp275", "bus": 35, "loc": 0x4d, "attr": "hwmon"}, + {"id": "tmp275_3", "name": "wb_tmp275", "bus": 8, "loc": 0x48, "attr": "hwmon"}, + {"id": "tmp275_4", "name": "wb_tmp275", "bus": 8, "loc": 0x49, "attr": "hwmon"}, + {"id": "tmp275_5", "name": "wb_tmp275", "bus": 9, "loc": 0x48, "attr": "hwmon"}, + {"id": "tmp275_6", "name": "wb_tmp275", "bus": 9, "loc": 0x49, "attr": "hwmon"}, + {"id": "tmp275_7", "name": "wb_tmp275", "bus": 14, "loc": 0x48, "attr": "hwmon"}, + {"id": "tmp275_8", "name": "wb_tmp275", "bus": 14, "loc": 0x49, "attr": "hwmon"}, + {"id": "tmp275_9", "name": "wb_tmp275", "bus": 14, "loc": 0x4b, "attr": "hwmon"}, + ], + }, + { + "name": "ina3221", + "device": [ + {"id": "ina3221_1", "name": "wb_ina3221", "bus": 33, "loc": 0x40, "attr": "hwmon"}, + {"id": "ina3221_2", "name": "wb_ina3221", "bus": 33, "loc": 0x41, "attr": "hwmon"}, + {"id": "ina3221_3", "name": "wb_ina3221", "bus": 33, "loc": 0x42, "attr": "hwmon"}, + {"id": "ina3221_4", "name": "wb_ina3221", "bus": 12, "loc": 0x40, "attr": "hwmon"}, + {"id": "ina3221_5", "name": "wb_ina3221", "bus": 12, "loc": 0x41, "attr": "hwmon"}, + {"id": "ina3221_6", "name": "wb_ina3221", "bus": 56, "loc": 0x40, "attr": "hwmon"}, + {"id": "ina3221_7", "name": "wb_ina3221", "bus": 56, "loc": 0x41, "attr": "hwmon"}, + {"id": "ina3221_8", "name": "wb_ina3221", "bus": 57, "loc": 0x40, "attr": "hwmon"}, + {"id": "ina3221_9", "name": "wb_ina3221", "bus": 58, "loc": 0x40, "attr": "hwmon"}, + {"id": "ina3221_10", "name": "wb_ina3221", "bus": 59, "loc": 0x40, "attr": "hwmon"}, + {"id": "ina3221_11", "name": "wb_ina3221", "bus": 60, "loc": 0x40, "attr": "hwmon"}, + {"id": "ina3221_12", "name": "wb_ina3221", "bus": 61, "loc": 0x40, "attr": "hwmon"}, + {"id": "ina3221_13", "name": "wb_ina3221", "bus": 62, "loc": 0x40, "attr": "hwmon"}, + {"id": "ina3221_14", "name": "wb_ina3221", "bus": 63, "loc": 0x40, "attr": "hwmon"}, + {"id": "ina3221_15", "name": "wb_ina3221", "bus": 88, "loc": 0x42, "attr": "hwmon"}, + {"id": "ina3221_16", "name": "wb_ina3221", "bus": 89, "loc": 0x42, "attr": "hwmon"}, + {"id": "ina3221_17", "name": "wb_ina3221", "bus": 90, "loc": 0x42, "attr": "hwmon"}, + {"id": "ina3221_18", "name": "wb_ina3221", "bus": 91, "loc": 0x42, "attr": "hwmon"}, + ], + }, + { + "name": "xdpe12284", + "device": [ + {"id": "xdpe12284_1", "name": "wb_xdpe12284", "bus": 5, "loc": 0x5e, "attr": "hwmon"}, + {"id": "xdpe12284_2", "name": "wb_xdpe12284", "bus": 5, "loc": 0x68, "attr": "hwmon"}, + {"id": "xdpe12284_3", "name": "wb_xdpe12284", "bus": 5, "loc": 0x6e, "attr": "hwmon"}, + {"id": "xdpe12284_4", "name": "wb_xdpe12284", "bus": 5, "loc": 0x70, "attr": "hwmon"}, + {"id": "xdpe12284_5", "name": "wb_xdpe12284", "bus": 67, "loc": 0x68, "attr": "hwmon"}, + {"id": "xdpe12284_6", "name": "wb_xdpe12284", "bus": 67, "loc": 0x70, "attr": "hwmon"}, + {"id": "xdpe12284_7", "name": "wb_xdpe12284", "bus": 67, "loc": 0x60, "attr": "hwmon"}, + {"id": "xdpe12284_8", "name": "wb_xdpe12284", "bus": 67, "loc": 0x66, "attr": "hwmon"}, + {"id": "xdpe12284_9", "name": "wb_xdpe12284", "bus": 67, "loc": 0x6e, "attr": "hwmon"}, + {"id": "xdpe12284_10", "name": "wb_xdpe12284", "bus": 67, "loc": 0x5e, "attr": "hwmon"}, + {"id": "xdpe12284_11", "name": "wb_xdpe12284", "bus": 68, "loc": 0x68, "attr": "hwmon"}, + {"id": "xdpe12284_12", "name": "wb_xdpe12284", "bus": 68, "loc": 0x70, "attr": "hwmon"}, + {"id": "xdpe12284_13", "name": "wb_xdpe12284", "bus": 68, "loc": 0x60, "attr": "hwmon"}, + {"id": "xdpe12284_14", "name": "wb_xdpe12284", "bus": 68, "loc": 0x66, "attr": "hwmon"}, + {"id": "xdpe12284_15", "name": "wb_xdpe12284", "bus": 68, "loc": 0x6e, "attr": "hwmon"}, + {"id": "xdpe12284_16", "name": "wb_xdpe12284", "bus": 68, "loc": 0x5e, "attr": "hwmon"}, + {"id": "xdpe12284_17", "name": "wb_xdpe12284", "bus": 69, "loc": 0x68, "attr": "hwmon"}, + {"id": "xdpe12284_18", "name": "wb_xdpe12284", "bus": 69, "loc": 0x70, "attr": "hwmon"}, + {"id": "xdpe12284_19", "name": "wb_xdpe12284", "bus": 69, "loc": 0x60, "attr": "hwmon"}, + {"id": "xdpe12284_20", "name": "wb_xdpe12284", "bus": 69, "loc": 0x66, "attr": "hwmon"}, + {"id": "xdpe12284_21", "name": "wb_xdpe12284", "bus": 69, "loc": 0x6e, "attr": "hwmon"}, + {"id": "xdpe12284_22", "name": "wb_xdpe12284", "bus": 69, "loc": 0x5e, "attr": "hwmon"}, + {"id": "xdpe12284_23", "name": "wb_xdpe12284", "bus": 70, "loc": 0x68, "attr": "hwmon"}, + {"id": "xdpe12284_24", "name": "wb_xdpe12284", "bus": 70, "loc": 0x70, "attr": "hwmon"}, + {"id": "xdpe12284_25", "name": "wb_xdpe12284", "bus": 70, "loc": 0x60, "attr": "hwmon"}, + {"id": "xdpe12284_26", "name": "wb_xdpe12284", "bus": 70, "loc": 0x66, "attr": "hwmon"}, + {"id": "xdpe12284_27", "name": "wb_xdpe12284", "bus": 70, "loc": 0x6e, "attr": "hwmon"}, + {"id": "xdpe12284_28", "name": "wb_xdpe12284", "bus": 70, "loc": 0x5e, "attr": "hwmon"}, + {"id": "xdpe12284_29", "name": "wb_xdpe12284", "bus": 71, "loc": 0x68, "attr": "hwmon"}, + ], + }, + { + "name": "xdpe132g5c", + "device": [ + {"id": "xdpe132g5c_1", "name": "wb_xdpe132g5c_pmbus", "bus": 64, "loc": 0x40, "attr": "hwmon"}, + {"id": "xdpe132g5c_2", "name": "wb_xdpe132g5c_pmbus", "bus": 65, "loc": 0x40, "attr": "hwmon"}, + {"id": "xdpe132g5c_3", "name": "wb_xdpe132g5c_pmbus", "bus": 66, "loc": 0x40, "attr": "hwmon"}, + ], + }, + { + "name": "ucd90160", + "device": [ + {"id": "ucd90160_1", "name": "wb_ucd90160", "bus": 5, "loc": 0x5f, "attr": "hwmon"}, + ], + }, + ], +} + +MANUINFO_CONF = { + "bios": { + "key": "BIOS", + "head": True, + "next": "cpu" + }, + "bios_vendor": { + "parent": "bios", + "key": "Vendor", + "cmd": "dmidecode -t 0 |grep Vendor", + "pattern": r".*Vendor", + "separator": ":", + "arrt_index": 1, + }, + "bios_version": { + "parent": "bios", + "key": "Version", + "cmd": "dmidecode -t 0 |grep Version", + "pattern": r".*Version", + "separator": ":", + "arrt_index": 2, + }, + "bios_date": { + "parent": "bios", + "key": "Release Date", + "cmd": "dmidecode -t 0 |grep Release", + "pattern": r".*Release Date", + "separator": ":", + "arrt_index": 3, + }, + "bios_boot": { + "parent": "bios", + "key": "Boot From", + "devfile": { + "loc": "/dev/cpld1", + "offset":0x1d, + "len":1, + "bit_width":1 + }, + "decode": { + "01": "Master", + "02": "Slave" + }, + "arrt_index": 4, + }, + + "cpu": { + "key": "CPU", + "next": "cpld" + }, + "cpu_vendor": { + "parent": "cpu", + "key": "Vendor", + "cmd": "dmidecode --type processor |grep Manufacturer", + "pattern": r".*Manufacturer", + "separator": ":", + "arrt_index": 1, + }, + "cpu_model": { + "parent": "cpu", + "key": "Device Model", + "cmd": "dmidecode --type processor | grep Version", + "pattern": r".*Version", + "separator": ":", + "arrt_index": 2, + }, + "cpu_core": { + "parent": "cpu", + "key": "Core Count", + "cmd": "dmidecode --type processor | grep \"Core Count\"", + "pattern": r".*Core Count", + "separator": ":", + "arrt_index": 3, + }, + "cpu_thread": { + "parent": "cpu", + "key": "Thread Count", + "cmd": "dmidecode --type processor | grep \"Thread Count\"", + "pattern": r".*Thread Count", + "separator": ":", + "arrt_index": 4, + }, + + + "cpld": { + "key": "CPLD", + "next": "fpga" + }, + + "cpld1": { + "key": "CPLD1", + "parent": "cpld", + "arrt_index": 1, + }, + "cpld1_model": { + "key": "Device Model", + "parent": "cpld1", + "config": "LCMXO3LF-2100C-5BG256C", + "arrt_index": 1, + }, + "cpld1_vender": { + "key": "Vendor", + "parent": "cpld1", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld1_desc": { + "key": "Description", + "parent": "cpld1", + "config": "CPU CPLD", + "arrt_index": 3, + }, + "cpld1_version": { + "key": "Firmware Version", + "parent": "cpld1", + "reg": { + "loc": "/dev/port", + "offset": 0xa00, + "size": 4 + }, + "callback": "cpld_format", + "arrt_index": 4, + }, + + "cpld2": { + "key": "CPLD2", + "parent": "cpld", + "arrt_index": 2, + }, + "cpld2_model": { + "key": "Device Model", + "parent": "cpld2", + "config": "LCMXO3LF-2100C-5BG256C", + "arrt_index": 1, + }, + "cpld2_vender": { + "key": "Vendor", + "parent": "cpld2", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld2_desc": { + "key": "Description", + "parent": "cpld2", + "config": "SCM CPLD", + "arrt_index": 3, + }, + "cpld2_version": { + "key": "Firmware Version", + "parent": "cpld2", + "reg": { + "loc": "/dev/port", + "offset": 0x900, + "size": 4 + }, + "callback": "cpld_format", + "arrt_index": 4, + }, + "cpld2_boot": { + "parent": "cpld2", + "key": "Boot From", + "devfile": { + "loc": "/dev/cpld1", + "offset":0x06, + "len":1, + "bit_width":1 + }, + "decode": { + "01": "Main", + "02": "Golden" + }, + "arrt_index": 5, + }, + + "cpld3": { + "key": "CPLD3", + "parent": "cpld", + "arrt_index": 3, + }, + "cpld3_model": { + "key": "Device Model", + "parent": "cpld3", + "config": "LCMXO3LF-4300C-6BG324I", + "arrt_index": 1, + }, + "cpld3_vender": { + "key": "Vendor", + "parent": "cpld3", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld3_desc": { + "key": "Description", + "parent": "cpld3", + "config": "MCB CPLD", + "arrt_index": 3, + }, + "cpld3_version": { + "key": "Firmware Version", + "parent": "cpld3", + "i2c": { + "bus": "13", + "loc": "0x1d", + "offset": 0, + "size": 4 + }, + "callback": "cpld_format", + "arrt_index": 4, + }, + "cpld3_boot": { + "parent": "cpld3", + "key": "Boot From", + "devfile": { + "loc": "/dev/cpld3", + "offset":0x0d, + "len":1, + "bit_width":1 + }, + "decode": { + "01": "Main", + "02": "Golden" + }, + "arrt_index": 5, + }, + + "cpld4": { + "key": "CPLD4", + "parent": "cpld", + "arrt_index": 4, + }, + "cpld4_model": { + "key": "Device Model", + "parent": "cpld4", + "config": "LCMXO3LF-4300C-6BG324I", + "arrt_index": 1, + }, + "cpld4_vender": { + "key": "Vendor", + "parent": "cpld4", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld4_desc": { + "key": "Description", + "parent": "cpld4", + "config": "SMB CPLD", + "arrt_index": 3, + }, + "cpld4_version": { + "key": "Firmware Version", + "parent": "cpld4", + "i2c": { + "bus": "20", + "loc": "0x1e", + "offset": 0, + "size": 4 + }, + "callback": "cpld_format", + "arrt_index": 4, + }, + "cpld4_boot": { + "parent": "cpld4", + "key": "Boot From", + "devfile": { + "loc": "/dev/cpld4", + "offset":0x0d, + "len":1, + "bit_width":1 + }, + "decode": { + "01": "Main", + "02": "Golden" + }, + "arrt_index": 5, + }, + + "cpld5": { + "key": "CPLD5", + "parent": "cpld", + "arrt_index": 5, + }, + "cpld5_model": { + "key": "Device Model", + "parent": "cpld5", + "config": "LCMXO3LF-2100C-5BG256C", + "arrt_index": 1, + }, + "cpld5_vender": { + "key": "Vendor", + "parent": "cpld5", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld5_desc": { + "key": "Description", + "parent": "cpld5", + "config": "FCB_T CPLD", + "arrt_index": 3, + }, + "cpld5_version": { + "key": "Firmware Version", + "parent": "cpld5", + "i2c": { + "bus": "44", + "loc": "0x0d", + "offset": 0, + "size": 4 + }, + "callback": "cpld_format", + "arrt_index": 4, + }, + "cpld5_boot": { + "parent": "cpld5", + "key": "Boot From", + "devfile": { + "loc": "/dev/cpld5", + "offset":0x0d, + "len":1, + "bit_width":1 + }, + "decode": { + "01": "Main", + "02": "Golden" + }, + "arrt_index": 5, + }, + + "cpld6": { + "key": "CPLD6", + "parent": "cpld", + "arrt_index": 6, + }, + "cpld6_model": { + "key": "Device Model", + "parent": "cpld6", + "config": "LCMXO3LF-2100C-5BG256C", + "arrt_index": 1, + }, + "cpld6_vender": { + "key": "Vendor", + "parent": "cpld6", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld6_desc": { + "key": "Description", + "parent": "cpld6", + "config": "FCB_B CPLD", + "arrt_index": 3, + }, + "cpld6_version": { + "key": "Firmware Version", + "parent": "cpld6", + "i2c": { + "bus": "52", + "loc": "0x0d", + "offset": 0, + "size": 4 + }, + "callback": "cpld_format", + "arrt_index": 4, + }, + "cpld6_boot": { + "parent": "cpld6", + "key": "Boot From", + "devfile": { + "loc": "/dev/cpld6", + "offset":0x0d, + "len":1, + "bit_width":1 + }, + "decode": { + "01": "Main", + "02": "Golden" + }, + "arrt_index": 5, + }, + + + "psu": { + "key": "PSU", + "next": "fan" + }, + + "psu2": { + "parent": "psu", + "key": "PSU2", + "arrt_index": 2, + }, + "psu2_hw_version": { + "key": "Hardware Version", + "parent": "psu2", + "extra": { + "funcname": "getPsu", + "id": "psu2", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "psu2_fw_version": { + "key": "Firmware Version", + "parent": "psu2", + "config": "NA", + "arrt_index": 2, + }, + + "fan": { + "key": "FAN", + "next": "fpga" + }, + "fan1": { + "key": "FAN1", + "parent": "fan", + "arrt_index": 1, + }, + "fan1_hw_version": { + "key": "Hardware Version", + "parent": "fan1", + "extra": { + "funcname": "checkFan", + "id": "fan1", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan1_fw_version": { + "key": "Firmware Version", + "parent": "fan1", + "config": "NA", + "arrt_index": 2, + }, + + "fan2": { + "key": "FAN2", + "parent": "fan", + "arrt_index": 2, + }, + "fan2_hw_version": { + "key": "Hardware Version", + "parent": "fan2", + "extra": { + "funcname": "checkFan", + "id": "fan2", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan2_fw_version": { + "key": "Firmware Version", + "parent": "fan2", + "config": "NA", + "arrt_index": 2, + }, + + "fan3": { + "key": "FAN3", + "parent": "fan", + "arrt_index": 3, + }, + "fan3_hw_version": { + "key": "Hardware Version", + "parent": "fan3", + "extra": { + "funcname": "checkFan", + "id": "fan3", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan3_fw_version": { + "key": "Firmware Version", + "parent": "fan3", + "config": "NA", + "arrt_index": 2, + }, + + "fan4": { + "key": "FAN4", + "parent": "fan", + "arrt_index": 4, + }, + "fan4_hw_version": { + "key": "Hardware Version", + "parent": "fan4", + "extra": { + "funcname": "checkFan", + "id": "fan4", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan4_fw_version": { + "key": "Firmware Version", + "parent": "fan4", + "config": "NA", + "arrt_index": 2, + }, + + "fan5": { + "key": "FAN5", + "parent": "fan", + "arrt_index": 5, + }, + "fan5_hw_version": { + "key": "Hardware Version", + "parent": "fan5", + "extra": { + "funcname": "checkFan", + "id": "fan5", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan5_fw_version": { + "key": "Firmware Version", + "parent": "fan5", + "config": "NA", + "arrt_index": 2, + }, + + "fan6": { + "key": "FAN6", + "parent": "fan", + "arrt_index": 6, + }, + "fan6_hw_version": { + "key": "Hardware Version", + "parent": "fan6", + "extra": { + "funcname": "checkFan", + "id": "fan6", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan6_fw_version": { + "key": "Firmware Version", + "parent": "fan6", + "config": "NA", + "arrt_index": 2, + }, + + "fan7": { + "key": "FAN7", + "parent": "fan", + "arrt_index": 7, + }, + "fan7_hw_version": { + "key": "Hardware Version", + "parent": "fan7", + "extra": { + "funcname": "checkFan", + "id": "fan7", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan7_fw_version": { + "key": "Firmware Version", + "parent": "fan7", + "config": "NA", + "arrt_index": 2, + }, + + "fan8": { + "key": "FAN8", + "parent": "fan", + "arrt_index": 8, + }, + "fan8_hw_version": { + "key": "Hardware Version", + "parent": "fan8", + "extra": { + "funcname": "checkFan", + "id": "fan8", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan8_fw_version": { + "key": "Firmware Version", + "parent": "fan8", + "config": "NA", + "arrt_index": 2, + }, + + + "i210": { + "key": "NIC", + "next": "fpga" + }, + "i210_model": { + "parent": "i210", + "config": "NA", + "key": "Device Model", + "arrt_index": 1, + }, + "i210_vendor": { + "parent": "i210", + "config": "INTEL", + "key": "Vendor", + "arrt_index": 2, + }, + "i210_version": { + "parent": "i210", + "cmd": "ethtool -i eno1", + "pattern": r"firmware-version", + "separator": ":", + "key": "Firmware Version", + "arrt_index": 3, + }, + + "fpga": { + "key": "FPGA", + }, + + "fpga1": { + "key": "FPGA1", + "parent": "fpga", + "arrt_index": 1, + }, + "fpga1_model": { + "parent": "fpga1", + "config": "XC7A50T-2FGG484C", + "key": "Device Model", + "arrt_index": 1, + }, + "fpga1_vender": { + "parent": "fpga1", + "config": "XILINX", + "key": "Vendor", + "arrt_index": 2, + }, + "fpga1_desc": { + "key": "Description", + "parent": "fpga1", + "config": "IOB FPGA", + "arrt_index": 3, + }, + "fpga1_fw_version": { + "parent": "fpga1", + "devfile": { + "loc": "/dev/fpga0", + "offset": 0, + "len": 4, + "bit_width": 4 + }, + "key": "Firmware Version", + "arrt_index": 4, + }, + "fpga1_date": { + "parent": "fpga1", + "devfile": { + "loc": "/dev/fpga0", + "offset": 4, + "len": 4, + "bit_width": 4 + }, + "key": "Build Date", + "arrt_index": 5, + }, + "fpga1_boot": { + "parent": "fpga1", + "key": "Boot From", + "devfile": { + "loc": "/dev/fpga0", + "offset":0x00, + "len":1, + "bit_width":1 + }, + "decode": { + "00": "Golden", + "default": "Main" + }, + "arrt_index": 6, + }, + "fpga2": { + "key": "FPGA2", + "parent": "fpga", + "arrt_index": 2, + }, + "fpga2_model": { + "parent": "fpga2", + "config": "XC7A50T-2FGG484C", + "key": "Device Model", + "arrt_index": 1, + }, + "fpga2_vender": { + "parent": "fpga2", + "config": "XILINX", + "key": "Vendor", + "arrt_index": 2, + }, + "fpga2_desc": { + "key": "Description", + "parent": "fpga2", + "config": "DOM FPGA", + "arrt_index": 3, + }, + "fpga2_fw_version": { + "parent": "fpga2", + "devfile": { + "loc": "/dev/fpga1", + "offset": 0, + "len": 4, + "bit_width": 4 + }, + "key": "Firmware Version", + "arrt_index": 4, + }, + "fpga2_date": { + "parent": "fpga2", + "devfile": { + "loc": "/dev/fpga1", + "offset": 4, + "len": 4, + "bit_width": 4 + }, + "key": "Build Date", + "arrt_index": 5, + }, + "fpga2_boot": { + "parent": "fpga2", + "key": "Boot From", + "devfile": { + "loc": "/dev/fpga1", + "offset":0x00, + "len":1, + "bit_width":1 + }, + "decode": { + "00": "Golden", + "default": "Main" + }, + "arrt_index": 6, + }, +} + +PMON_SYSLOG_STATUS = { + "polling_time": 3, + "fans": { + "present": {"path": ["/sys/s3ip/fan/*/present"], "ABSENT": 0}, + "status": [ + {"path": "/sys/s3ip/fan/%s/motor1/status", 'okval': 1}, + {"path": "/sys/s3ip/fan/%s/motor2/status", 'okval': 1}, + ], + "nochangedmsgflag": 1, + "nochangedmsgtime": 60, + "noprintfirsttimeflag": 0, + "alias": { + "fan1": "FAN1", + "fan2": "FAN2", + "fan3": "FAN3", + "fan4": "FAN4", + "fan5": "FAN5", + "fan6": "FAN6", + "fan7": "FAN7", + "fan8": "FAN8" + } + } +} + +##################### MAC Voltage adjust#################################### +MAC_DEFAULT_PARAM = [ + { + "name": "mac_core", # AVS name + "type": 0, # 1: used default value, if rov value not in range. 0: do nothing, if rov value not in range + "rov_source": 0, # 0: get rov value from cpld, 1: get rov value from SDK + "cpld_avs": {"bus": 20, "loc": 0x1e, "offset": 0x20, "gettype": "i2c"}, + "set_avs": { + "loc": "/sys/bus/i2c/devices/64-0040/hwmon/hwmon*/avs0_vout", + "gettype": "sysfs", "formula": "int((%f)*1000000)" + }, + "mac_avs_param": { + 0x92: 0.7471, + 0x90: 0.7600, + 0x8e: 0.7710, + 0x8c: 0.7839, + 0x8a: 0.7961, + 0x88: 0.8071, + 0x86: 0.8181, + 0x84: 0.8291, + 0x82: 0.8401 + } + } +] + +DRIVERLISTS = [ + {"name": "ice", "delay": 0, "removable": 0}, + {"name": "wb_i2c_i801", "delay": 1, "removable": 0}, + {"name": "i2c_dev", "delay": 0, "removable": 0}, + {"name": "wb_i2c_algo_bit", "delay": 0}, + {"name": "wb_i2c_gpio", "delay": 0}, + {"name": "i2c_mux", "delay": 0, "removable": 0}, + {"name": "wb_i2c_gpio_device gpio_sda=181 gpio_scl=180 gpio_chip_name=INTC3001:00 bus_num=1", "delay": 0}, + {"name": "platform_common dfd_my_type=0x40d9", "delay": 0}, + {"name": "wb_logic_dev_common", "delay":0}, + {"name": "wb_io_dev", "delay": 0}, + {"name": "wb_io_dev_device", "delay": 0}, + {"name": "wb_fpga_pcie", "delay": 0}, + {"name": "wb_pcie_dev", "delay": 0}, + {"name": "wb_pcie_dev_device", "delay": 0}, + {"name": "wb_i2c_dev", "delay": 0}, + {"name": "wb_i2c_ocores", "delay": 0}, + {"name": "wb_i2c_ocores_device", "delay": 0}, + {"name": "wb_i2c_mux_pca9641", "delay": 0}, + {"name": "wb_i2c_mux_pca954x", "delay": 0}, + {"name": "wb_i2c_mux_pca954x_device_b3", "delay": 1}, + {"name": "wb_i2c_dev_device", "delay": 1}, + {"name": "wb_lm75", "delay": 0}, + {"name": "wb_at24", "delay": 0}, + {"name": "wb_pmbus_core", "delay": 0}, + {"name": "wb_xdpe12284", "delay": 0}, + {"name": "wb_xdpe132g5c_pmbus", "delay": 0}, + {"name": "wb_csu550", "delay": 0}, + {"name": "wb_ina3221", "delay": 0}, + {"name": "wb_ucd9000", "delay": 0}, + {"name": "wb_xdpe132g5c", "delay": 0}, +# {"name": "firmware_driver_sysfs", "delay": 0}, + {"name": "wb_rc32312", "delay": 0}, + {"name": "s3ip_sysfs", "delay": 0}, + {"name": "wb_switch_driver", "delay": 0}, + {"name": "fan_device_driver", "delay": 0}, + {"name": "psu_device_driver", "delay": 0}, + {"name": "vol_sensor_device_driver", "delay": 0}, + {"name": "temp_sensor_device_driver", "delay": 0}, + {"name": "wb_spd", "delay": 0}, + {"name": "wb_lpc_bmc", "delay": 0}, +] + +DEVICE = [ + # eeprom + {"name": "wb_24c02", "bus": 1, "loc": 0x56}, + {"name": "wb_24c02", "bus": 1, "loc": 0x57}, + {"name": "wb_24c02", "bus": 2, "loc": 0x51}, + {"name": "wb_24c02", "bus": 3, "loc": 0x51}, + # SCM + {"name": "wb_24c02", "bus": 32, "loc": 0x52}, + {"name": "wb_ina3221", "bus": 33, "loc": 0x40}, + {"name": "wb_ina3221", "bus": 33, "loc": 0x41}, + {"name": "wb_ina3221", "bus": 33, "loc": 0x42}, + {"name": "wb_tmp275", "bus": 34, "loc": 0x4c}, + {"name": "wb_tmp275", "bus": 35, "loc": 0x4d}, + # CPU + {"name": "wb_ucd90160", "bus": 5, "loc": 0x5f}, + {"name": "wb_xdpe12284", "bus": 5, "loc": 0x5e}, + {"name": "wb_xdpe12284", "bus": 5, "loc": 0x68}, + {"name": "wb_xdpe12284", "bus": 5, "loc": 0x6e}, + {"name": "wb_xdpe12284", "bus": 5, "loc": 0x70}, + # fanA + {"name": "wb_tmp275", "bus": 8, "loc": 0x48}, + {"name": "wb_tmp275", "bus": 8, "loc": 0x49}, + {"name": "wb_24c64", "bus": 40, "loc": 0x50}, + {"name": "wb_24c64", "bus": 41, "loc": 0x50}, + {"name": "wb_24c64", "bus": 42, "loc": 0x50}, + {"name": "wb_24c64", "bus": 43, "loc": 0x50}, + # fanB + {"name": "wb_tmp275", "bus": 9, "loc": 0x48}, + {"name": "wb_tmp275", "bus": 9, "loc": 0x49}, + {"name": "wb_24c64", "bus": 48, "loc": 0x50}, + {"name": "wb_24c64", "bus": 49, "loc": 0x50}, + {"name": "wb_24c64", "bus": 50, "loc": 0x50}, + {"name": "wb_24c64", "bus": 51, "loc": 0x50}, + # psu + {"name": "wb_24c02", "bus": 10, "loc": 0x50}, + {"name": "wb_fsp1200", "bus": 10, "loc": 0x58}, + # MCB + {"name": "wb_ina3221", "bus": 12, "loc": 0x40}, + {"name": "wb_ina3221", "bus": 12, "loc": 0x41}, + {"name": "wb_24c02", "bus": 12, "loc": 0x57}, + # SMB + {"name": "wb_tmp275", "bus": 14, "loc": 0x48}, + {"name": "wb_tmp275", "bus": 14, "loc": 0x49}, + {"name": "wb_tmp275", "bus": 14, "loc": 0x4b}, + {"name": "wb_ina3221", "bus": 56, "loc": 0x40}, + {"name": "wb_ina3221", "bus": 56, "loc": 0x41}, + {"name": "wb_ina3221", "bus": 57, "loc": 0x40}, + {"name": "wb_ina3221", "bus": 58, "loc": 0x40}, + {"name": "wb_ina3221", "bus": 59, "loc": 0x40}, + {"name": "wb_ina3221", "bus": 60, "loc": 0x40}, + {"name": "wb_ina3221", "bus": 61, "loc": 0x40}, + {"name": "wb_ina3221", "bus": 62, "loc": 0x40}, + {"name": "wb_ina3221", "bus": 63, "loc": 0x40}, + {"name": "wb_xdpe132g5c_pmbus", "bus": 64, "loc": 0x40}, + {"name": "wb_xdpe132g5c_pmbus", "bus": 65, "loc": 0x40}, + {"name": "wb_xdpe132g5c_pmbus", "bus": 66, "loc": 0x40}, + # OE0 + {"name": "wb_xdpe12284", "bus": 67, "loc": 0x68}, + {"name": "wb_xdpe12284", "bus": 67, "loc": 0x70}, + {"name": "wb_xdpe12284", "bus": 67, "loc": 0x60}, + # OE7 + {"name": "wb_xdpe12284", "bus": 67, "loc": 0x66}, + {"name": "wb_xdpe12284", "bus": 67, "loc": 0x6e}, + {"name": "wb_xdpe12284", "bus": 67, "loc": 0x5e}, + # OE1 + {"name": "wb_xdpe12284", "bus": 68, "loc": 0x68}, + {"name": "wb_xdpe12284", "bus": 68, "loc": 0x70}, + {"name": "wb_xdpe12284", "bus": 68, "loc": 0x60}, + # OE2 + {"name": "wb_xdpe12284", "bus": 68, "loc": 0x66}, + {"name": "wb_xdpe12284", "bus": 68, "loc": 0x6e}, + {"name": "wb_xdpe12284", "bus": 68, "loc": 0x5e}, + # OE3 + {"name": "wb_xdpe12284", "bus": 69, "loc": 0x68}, + {"name": "wb_xdpe12284", "bus": 69, "loc": 0x70}, + {"name": "wb_xdpe12284", "bus": 69, "loc": 0x60}, + # OE4 + {"name": "wb_xdpe12284", "bus": 69, "loc": 0x66}, + {"name": "wb_xdpe12284", "bus": 69, "loc": 0x6e}, + {"name": "wb_xdpe12284", "bus": 69, "loc": 0x5e}, + # OE5 + {"name": "wb_xdpe12284", "bus": 70, "loc": 0x68}, + {"name": "wb_xdpe12284", "bus": 70, "loc": 0x70}, + {"name": "wb_xdpe12284", "bus": 70, "loc": 0x60}, + # OE6 + {"name": "wb_xdpe12284", "bus": 70, "loc": 0x66}, + {"name": "wb_xdpe12284", "bus": 70, "loc": 0x6e}, + {"name": "wb_xdpe12284", "bus": 70, "loc": 0x5e}, + # MAC_XDPE12284C_06 + {"name": "wb_xdpe12284", "bus": 71, "loc": 0x68}, + # fan DCDC + {"name": "wb_ina3221", "bus": 88, "loc": 0x42}, + {"name": "wb_ina3221", "bus": 89, "loc": 0x42}, + {"name": "wb_ina3221", "bus": 90, "loc": 0x42}, + # RC32312 + {"name": "wb_rc32312", "bus": 72, "loc": 0x09}, + {"name": "wb_24c64", "bus": 72, "loc": 0x50}, + {"name": "wb_rc32312", "bus": 73, "loc": 0x09}, + {"name": "wb_24c64", "bus": 73, "loc": 0x50}, + # xdpe132g5c i2c + {"name": "wb_xdpe132g5c", "bus": 64, "loc": 0x10}, + {"name": "wb_xdpe132g5c", "bus": 65, "loc": 0x10}, + {"name": "wb_xdpe132g5c", "bus": 66, "loc": 0x10}, + # LED + {"name": "wb_ina3221", "bus": 91, "loc": 0x42}, +] + +OPTOE = [ + {"name": "wb_24c02", "startbus": 24, "endbus": 31}, +] + +REBOOT_CTRL_PARAM = {} + +INIT_PARAM_PRE = [ + # set ina3221 shunt_resistor + # SCM_VDD12.0_C + {"loc": "33-0041/hwmon/hwmon*/shunt1_resistor", "value": "1000"}, + # SCM_OCM_V12.0_C + {"loc": "33-0041/hwmon/hwmon*/shunt3_resistor", "value": "1000"}, + # MAC_PLL0_VDD0.9_C + {"loc": "56-0040/hwmon/hwmon*/shunt1_resistor", "value": "2000"}, + # MAC_PLL1_VDD0.9_C + {"loc": "56-0040/hwmon/hwmon*/shunt2_resistor", "value": "2000"}, + # MAC_PLL3_VDD0.9_C + {"loc": "61-0040/hwmon/hwmon*/shunt1_resistor", "value": "2000"}, + # MAC_PLL2_VDD0.9_C + {"loc": "61-0040/hwmon/hwmon*/shunt2_resistor", "value": "2000"}, + # FAN1_VDD12_C + {"loc": "88-0042/hwmon/hwmon*/shunt1_resistor", "value": "1000"}, + # FAN2_VDD12_C + {"loc": "88-0042/hwmon/hwmon*/shunt2_resistor", "value": "1000"}, + # FAN3_VDD12_C + {"loc": "88-0042/hwmon/hwmon*/shunt3_resistor", "value": "1000"}, + # FAN4_VDD12_C + {"loc": "89-0042/hwmon/hwmon*/shunt1_resistor", "value": "1000"}, + # FAN5_VDD12_C + {"loc": "89-0042/hwmon/hwmon*/shunt2_resistor", "value": "1000"}, + # FAN6_VDD12_C + {"loc": "89-0042/hwmon/hwmon*/shunt3_resistor", "value": "1000"}, + # FAN7_VDD12_C + {"loc": "90-0042/hwmon/hwmon*/shunt1_resistor", "value": "1000"}, + # FAN8_VDD12_C + {"loc": "90-0042/hwmon/hwmon*/shunt2_resistor", "value": "1000"}, + # set avs threshold + # MAC_CORE_V + {"loc": "64-0040/hwmon/hwmon*/avs0_vout_min", "value": "630000"}, + {"loc": "64-0040/hwmon/hwmon*/avs0_vout_max", "value": "858000"}, + # MAC_ANALOG0 V0.9_V + {"loc": "65-0040/hwmon/hwmon*/avs0_vout_min", "value": "810000"}, + {"loc": "65-0040/hwmon/hwmon*/avs0_vout_max", "value": "990000"}, + # MAC_ANALOG0 V0.75_V + {"loc": "65-0040/hwmon/hwmon*/avs1_vout_min", "value": "675000"}, + {"loc": "65-0040/hwmon/hwmon*/avs1_vout_max", "value": "825000"}, + # MAC_ANALOG1 V0.9_V + {"loc": "66-0040/hwmon/hwmon*/avs0_vout_min", "value": "810000"}, + {"loc": "66-0040/hwmon/hwmon*/avs0_vout_max", "value": "990000"}, + # MAC_ANALOG1 V0.75_V + {"loc": "66-0040/hwmon/hwmon*/avs1_vout_min", "value": "675000"}, + {"loc": "66-0040/hwmon/hwmon*/avs1_vout_max", "value": "825000"}, + # # OE0_AVDD_RX_1.8_V + # {"loc": "67-0070/hwmon/hwmon*/avs0_vout_min", "value": "1710000"}, + # {"loc": "67-0070/hwmon/hwmon*/avs0_vout_max", "value": "1890000"}, + # {"loc": "67-0070/hwmon/hwmon*/avs0_vout", "value": "1800000"}, + # # OE0_AVDD_RX_1.2_V + # {"loc": "67-0070/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "67-0070/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "67-0070/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE0_AVDD_TX_1.8_V + # {"loc": "67-0068/hwmon/hwmon*/avs0_vout_min", "value": "1750000"}, + # {"loc": "67-0068/hwmon/hwmon*/avs0_vout_max", "value": "1950000"}, + # {"loc": "67-0068/hwmon/hwmon*/avs0_vout", "value": "1850000"}, + # # OE0_AVDD_TX_1.2_V + # {"loc": "67-0068/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "67-0068/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "67-0068/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE0_AVDD_TRX_0.75_V + # {"loc": "67-0060/hwmon/hwmon*/avs0_vout_min", "value": "713000"}, + # {"loc": "67-0060/hwmon/hwmon*/avs0_vout_max", "value": "788000"}, + # {"loc": "67-0060/hwmon/hwmon*/avs0_vout", "value": "750000"}, + # # OE1_AVDD_RX_1.8_V + # {"loc": "68-0070/hwmon/hwmon*/avs0_vout_min", "value": "1710000"}, + # {"loc": "68-0070/hwmon/hwmon*/avs0_vout_max", "value": "1890000"}, + # {"loc": "68-0070/hwmon/hwmon*/avs0_vout", "value": "1800000"}, + # # OE1_AVDD_RX_1.2_V + # {"loc": "68-0070/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "68-0070/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "68-0070/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE1_AVDD_TX_1.8_V + # {"loc": "68-0068/hwmon/hwmon*/avs0_vout_min", "value": "1750000"}, + # {"loc": "68-0068/hwmon/hwmon*/avs0_vout_max", "value": "1950000"}, + # {"loc": "68-0068/hwmon/hwmon*/avs0_vout", "value": "1850000"}, + # # OE1_AVDD_TX_1.2_V + # {"loc": "68-0068/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "68-0068/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "68-0068/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE1_AVDD_TRX_0.75_V + # {"loc": "68-0060/hwmon/hwmon*/avs0_vout_min", "value": "713000"}, + # {"loc": "68-0060/hwmon/hwmon*/avs0_vout_max", "value": "788000"}, + # {"loc": "68-0060/hwmon/hwmon*/avs0_vout", "value": "750000"}, + # # OE2_AVDD_RX_1.8_V + # {"loc": "68-006e/hwmon/hwmon*/avs0_vout_min", "value": "1710000"}, + # {"loc": "68-006e/hwmon/hwmon*/avs0_vout_max", "value": "1890000"}, + # {"loc": "68-006e/hwmon/hwmon*/avs0_vout", "value": "1800000"}, + # # OE2_AVDD_RX_1.2_V + # {"loc": "68-006e/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "68-006e/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "68-006e/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE2_AVDD_TX_1.8_V + # {"loc": "68-0066/hwmon/hwmon*/avs0_vout_min", "value": "1750000"}, + # {"loc": "68-0066/hwmon/hwmon*/avs0_vout_max", "value": "1950000"}, + # {"loc": "68-0066/hwmon/hwmon*/avs0_vout", "value": "1850000"}, + # # OE2_AVDD_TX_1.2_V + # {"loc": "68-0066/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "68-0066/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "68-0066/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE2_AVDD_TRX_0.75_V + # {"loc": "68-005e/hwmon/hwmon*/avs0_vout_min", "value": "713000"}, + # {"loc": "68-005e/hwmon/hwmon*/avs0_vout_max", "value": "788000"}, + # {"loc": "68-005e/hwmon/hwmon*/avs0_vout", "value": "750000"}, + # # OE3_AVDD_RX_1.8_V + # {"loc": "69-0070/hwmon/hwmon*/avs0_vout_min", "value": "1710000"}, + # {"loc": "69-0070/hwmon/hwmon*/avs0_vout_max", "value": "1890000"}, + # {"loc": "69-0070/hwmon/hwmon*/avs0_vout", "value": "1800000"}, + # # OE3_AVDD_RX_1.2_V + # {"loc": "69-0070/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "69-0070/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "69-0070/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE3_AVDD_TX_1.8_V + # {"loc": "69-0068/hwmon/hwmon*/avs0_vout_min", "value": "1750000"}, + # {"loc": "69-0068/hwmon/hwmon*/avs0_vout_max", "value": "1950000"}, + # {"loc": "69-0068/hwmon/hwmon*/avs0_vout", "value": "1850000"}, + # # OE3_AVDD_TX_1.2_V + # {"loc": "69-0068/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "69-0068/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "69-0068/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE3_AVDD_TRX_0.75_V + # {"loc": "69-0060/hwmon/hwmon*/avs0_vout_min", "value": "713000"}, + # {"loc": "69-0060/hwmon/hwmon*/avs0_vout_max", "value": "788000"}, + # {"loc": "69-0060/hwmon/hwmon*/avs0_vout", "value": "750000"}, + # # OE4_AVDD_RX_1.8_V + # {"loc": "69-006e/hwmon/hwmon*/avs0_vout_min", "value": "1710000"}, + # {"loc": "69-006e/hwmon/hwmon*/avs0_vout_max", "value": "1890000"}, + # {"loc": "69-006e/hwmon/hwmon*/avs0_vout", "value": "1800000"}, + # # OE4_AVDD_RX_1.2_V + # {"loc": "69-006e/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "69-006e/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "69-006e/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE4_AVDD_TX_1.8_V + # {"loc": "69-0066/hwmon/hwmon*/avs0_vout_min", "value": "1750000"}, + # {"loc": "69-0066/hwmon/hwmon*/avs0_vout_max", "value": "1950000"}, + # {"loc": "69-0066/hwmon/hwmon*/avs0_vout", "value": "1850000"}, + # # OE4_AVDD_TX_1.2_V + # {"loc": "69-0066/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "69-0066/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "69-0066/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE4_AVDD_TRX_0.75_V + # {"loc": "69-005e/hwmon/hwmon*/avs0_vout_min", "value": "713000"}, + # {"loc": "69-005e/hwmon/hwmon*/avs0_vout_max", "value": "788000"}, + # {"loc": "69-005e/hwmon/hwmon*/avs0_vout", "value": "750000"}, + # # OE5_AVDD_RX_1.8_V + # {"loc": "70-0070/hwmon/hwmon*/avs0_vout_min", "value": "1710000"}, + # {"loc": "70-0070/hwmon/hwmon*/avs0_vout_max", "value": "1890000"}, + # {"loc": "70-0070/hwmon/hwmon*/avs0_vout", "value": "1800000"}, + # # OE5_AVDD_RX_1.2_V + # {"loc": "70-0070/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "70-0070/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "70-0070/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE5_AVDD_TX_1.8_V + # {"loc": "70-0068/hwmon/hwmon*/avs0_vout_min", "value": "1750000"}, + # {"loc": "70-0068/hwmon/hwmon*/avs0_vout_max", "value": "1950000"}, + # {"loc": "70-0068/hwmon/hwmon*/avs0_vout", "value": "1850000"}, + # # OE5_AVDD_TX_1.2_V + # {"loc": "70-0068/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "70-0068/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "70-0068/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE5_AVDD_TRX_0.75_V + # {"loc": "70-0060/hwmon/hwmon*/avs0_vout_min", "value": "713000"}, + # {"loc": "70-0060/hwmon/hwmon*/avs0_vout_max", "value": "788000"}, + # {"loc": "70-0060/hwmon/hwmon*/avs0_vout", "value": "750000"}, + # # OE6_AVDD_RX_1.8_V + # {"loc": "70-006e/hwmon/hwmon*/avs0_vout_min", "value": "1710000"}, + # {"loc": "70-006e/hwmon/hwmon*/avs0_vout_max", "value": "1890000"}, + # {"loc": "70-006e/hwmon/hwmon*/avs0_vout", "value": "1800000"}, + # # OE6_AVDD_RX_1.2_V + # {"loc": "70-006e/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "70-006e/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "70-006e/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE6_AVDD_TX_1.8_V + # {"loc": "70-0066/hwmon/hwmon*/avs0_vout_min", "value": "1750000"}, + # {"loc": "70-0066/hwmon/hwmon*/avs0_vout_max", "value": "1950000"}, + # {"loc": "70-0066/hwmon/hwmon*/avs0_vout", "value": "1850000"}, + # # OE6_AVDD_TX_1.2_V + # {"loc": "70-0066/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "70-0066/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "70-0066/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE6_AVDD_TRX_0.75_V + # {"loc": "70-005e/hwmon/hwmon*/avs0_vout_min", "value": "713000"}, + # {"loc": "70-005e/hwmon/hwmon*/avs0_vout_max", "value": "788000"}, + # {"loc": "70-005e/hwmon/hwmon*/avs0_vout", "value": "750000"}, + # # OE7_AVDD_RX_1.8_V + # {"loc": "67-006e/hwmon/hwmon*/avs0_vout_min", "value": "1710000"}, + # {"loc": "67-006e/hwmon/hwmon*/avs0_vout_max", "value": "1890000"}, + # {"loc": "67-006e/hwmon/hwmon*/avs0_vout", "value": "1800000"}, + # # OE7_AVDD_RX_1.2_V + # {"loc": "67-006e/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "67-006e/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "67-006e/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE7_AVDD_TX_1.8_V + # {"loc": "67-0066/hwmon/hwmon*/avs0_vout_min", "value": "1750000"}, + # {"loc": "67-0066/hwmon/hwmon*/avs0_vout_max", "value": "1950000"}, + # {"loc": "67-0066/hwmon/hwmon*/avs0_vout", "value": "1850000"}, + # # OE7_AVDD_TX_1.2_V + # {"loc": "67-0066/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "67-0066/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "67-0066/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE7_AVDD_TRX_0.75_V + # {"loc": "67-005e/hwmon/hwmon*/avs0_vout_min", "value": "713000"}, + # {"loc": "67-005e/hwmon/hwmon*/avs0_vout_max", "value": "788000"}, + # {"loc": "67-005e/hwmon/hwmon*/avs0_vout", "value": "750000"}, + # RLML_VDD V3.3_V *1.5 + {"loc": "71-0068/hwmon/hwmon*/avs0_vout_min", "value": "1980000"}, + {"loc": "71-0068/hwmon/hwmon*/avs0_vout_max", "value": "2420000"}, + # RLMH_VDD V3.3_V *1.5 + {"loc": "71-0068/hwmon/hwmon*/avs1_vout_min", "value": "1980000"}, + {"loc": "71-0068/hwmon/hwmon*/avs1_vout_max", "value": "2420000"}, + # OCM_XDPE_VCCIN_V + {"loc": "5-0070/hwmon/hwmon*/avs0_vout_min", "value": "1350000"}, + {"loc": "5-0070/hwmon/hwmon*/avs0_vout_max", "value": "2200000"}, + # OCM_XDPE_P1V8_V + {"loc": "5-0070/hwmon/hwmon*/avs1_vout_min", "value": "1690000"}, + {"loc": "5-0070/hwmon/hwmon*/avs1_vout_max", "value": "1910000"}, + # OCM_XDPE_P1V05_V + {"loc": "5-006e/hwmon/hwmon*/avs0_vout_min", "value": "954000"}, + {"loc": "5-006e/hwmon/hwmon*/avs0_vout_max", "value": "1160000"}, + # OCM_XDPE_VNN_PCH_V + {"loc": "5-006e/hwmon/hwmon*/avs1_vout_min", "value": "540000"}, + {"loc": "5-006e/hwmon/hwmon*/avs1_vout_max", "value": "1320000"}, + # OCM_XDPE_VNN_NAC_V + {"loc": "5-0068/hwmon/hwmon*/avs0_vout_min", "value": "540000"}, + {"loc": "5-0068/hwmon/hwmon*/avs0_vout_max", "value": "1320000"}, + # OCM_XDPE_VCC_ANA_V + {"loc": "5-0068/hwmon/hwmon*/avs1_vout_min", "value": "900000"}, + {"loc": "5-0068/hwmon/hwmon*/avs1_vout_max", "value": "1100000"}, + # OCM_XDPE_P1V2_VDDQ_V + {"loc": "5-005e/hwmon/hwmon*/avs0_vout_min", "value": "1120000"}, + {"loc": "5-005e/hwmon/hwmon*/avs0_vout_max", "value": "1280000"}, +] + +INIT_PARAM = [] + +INIT_COMMAND_PRE = [] + +INIT_COMMAND = [ + # enable fan watchdog + {"path": "/dev/cpld5", "offset": 0x22, "value": [0x01], "gettype": "devfile"}, + {"path": "/dev/cpld6", "offset": 0x22, "value": [0x01], "gettype": "devfile"}, +] + +UPGRADE_SUMMARY = { + "devtype": 0x40d9, + + "slot0": { + "subtype": 0, + "SPI-LOGIC-DEV": { + "chain1":{ + "name":"IOB_FPGA", + "is_support_warm_upg":0, + "init_cmd": [ + # firmware upgrade set sysled blue/amber alternate flashing + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x50, "value": [0x01]} + ] + }, + "chain2":{ + "name":"DOM_FPGA", + "is_support_warm_upg":0, + "init_cmd": [ + # firmware upgrade set sysled blue/amber alternate flashing + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x50, "value": [0x01]} + ] + }, + "chain3":{ + "name":"SCM_CPLD", + "is_support_warm_upg":0, + "init_cmd": [ + # firmware upgrade set sysled blue/amber alternate flashing + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x50, "value": [0x01]} + ] + }, + "chain4":{ + "name":"MCB_CPLD", + "is_support_warm_upg":0, + "init_cmd": [ + # firmware upgrade set sysled blue/amber alternate flashing + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x50, "value": [0x01]} + ] + }, + "chain5":{ + "name":"SMB_CPLD", + "is_support_warm_upg":0, + "init_cmd": [ + # firmware upgrade set sysled blue/amber alternate flashing + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x50, "value": [0x01]} + ] + }, + "chain6":{ + "name":"FCB_B_CPLD", + "is_support_warm_upg":0, + "init_cmd": [ + # firmware upgrade set sysled blue/amber alternate flashing + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x50, "value": [0x01]} + ] + }, + "chain7":{ + "name":"FCB_T_CPLD", + "is_support_warm_upg":0, + "init_cmd": [ + # firmware upgrade set sysled blue/amber alternate flashing + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x50, "value": [0x01]} + ] + }, + "chain8":{ + "name":"MAC_PCIe", + "is_support_warm_upg":0, + "init_cmd": [ + # firmware upgrade set sysled blue/amber alternate flashing + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x50, "value": [0x01]} + ] + }, + }, + + "TEST": { + "fpga": [ + {"chain": 1, "file": "/etc/.upgrade_test/0x40d9/iob_fpga_test_header.bin", "display_name": "IOB_FPGA"}, + {"chain": 2, "file": "/etc/.upgrade_test/0x40d9/dom_fpga_test_header.bin", "display_name": "DOM_FPGA"}, + ], + "cpld": [ + {"chain": 3, "file": "/etc/.upgrade_test/0x40d9/scm_cpld_spi_test_header.bin", "display_name": "SCM_CPLD_SPI"}, + {"chain": 4, "file": "/etc/.upgrade_test/0x40d9/mcb_cpld_spi_test_header.bin", "display_name": "MCB_CPLD_SPI"}, + {"chain": 5, "file": "/etc/.upgrade_test/0x40d9/smb_cpld_spi_test_header.bin", "display_name": "SMB_CPLD_SPI"}, + {"chain": 6, "file": "/etc/.upgrade_test/0x40d9/fcb_b_cpld_spi_test_header.bin", "display_name": "FCB_B_CPLD_SPI"}, + {"chain": 7, "file": "/etc/.upgrade_test/0x40d9/fcb_t_cpld_spi_test_header.bin", "display_name": "FCB_T_CPLD_SPI"}, + #{"chain": 8, "file": "/etc/.upgrade_test/0x40d9/mac_pcie_spi_test_header.bin", "display_name": "MAC_PCIe"}, + ], + }, + }, + + "BMC": { + "name": "BMC", + "init_cmd": [ + # firmware upgrade set sysled blue/amber alternate flashing + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x50, "value": [0x01]} + ], + "finish_cmd": [], + }, +} + +PLATFORM_E2_CONF = { + "fan": [ + {"name": "fan1", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/40-0050/eeprom"}, + {"name": "fan2", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/48-0050/eeprom"}, + {"name": "fan3", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/41-0050/eeprom"}, + {"name": "fan4", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/49-0050/eeprom"}, + {"name": "fan5", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/42-0050/eeprom"}, + {"name": "fan6", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/50-0050/eeprom"}, + {"name": "fan7", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/43-0050/eeprom"}, + {"name": "fan8", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/51-0050/eeprom"}, + ], + "psu": [ + {"name": "psu2", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/10-0050/eeprom"}, + ], + "syseeprom": [ + {"name": "syseeprom", "e2_type": "onie_tlv", "e2_path": "/sys/bus/i2c/devices/1-0056/eeprom"}, + ], + "scm": [ + {"name": "scm", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/32-0052/eeprom"}, + ], + "smb": [ + {"name": "smb", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/3-0051/eeprom"}, + ], + "chassis": [ + {"name": "chassis", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/2-0051/eeprom"}, + ], +} + +PLATFORM_POWER_CONF = [ + { + "name": "Input power total", + "unit": "W", + "children": [ + { + "name": "PSU2 input", + "pre_check": { + "loc": "/sys/s3ip/psu/psu2/present", + "gettype": "sysfs", "mask": 0x01, "okval": 1, + "not_ok_msg": "ABSENT" + }, + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/10-0058/hwmon/hwmon*/power1_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)/1000000)" + }, + ] + }, + { + "name": "Output power total", + "unit": "W", + "children": [ + { + "name": "PSU2 output", + "pre_check": { + "loc": "/sys/s3ip/psu/psu2/present", + "gettype": "sysfs", "mask": 0x01, "okval": 1, + "not_ok_msg": "ABSENT" + }, + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/10-0058/hwmon/hwmon*/power2_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)/1000000)" + }, + ] + }, + { + "name": "MAC power consumption", + "unit": "W", + "children": [ + { + "name": "MAC_CORE", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/64-0040/hwmon/hwmon*/power3_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*2/1000000)" + }, + { + "name": "MAC_ANALOG0 V0.9", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/65-0040/hwmon/hwmon*/power3_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)/1000000)" + }, + { + "name": "MAC_ANALOG0 V0.75", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/65-0040/hwmon/hwmon*/power4_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)/1000000)" + }, + { + "name": "MAC_ANALOG1 V0.9", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/66-0040/hwmon/hwmon*/power3_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)/1000000)" + }, + { + "name": "MAC_ANALOG1 V0.75", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/66-0040/hwmon/hwmon*/power4_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)/1000000)" + }, + { + "name": "MAC_PLL0_VDD0.9", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/56-0040/hwmon/hwmon*/in2_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/56-0040/hwmon/hwmon*/curr2_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "MAC_PLL1_VDD0.9", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/56-0040/hwmon/hwmon*/in1_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/56-0040/hwmon/hwmon*/curr1_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "MAC_PLL2_VDD0.9", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/58-0040/hwmon/hwmon*/in1_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/58-0040/hwmon/hwmon*/curr1_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "MAC_PLL3_VDD0.9", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/58-0040/hwmon/hwmon*/in3_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/58-0040/hwmon/hwmon*/curr3_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "MAC_VDD_0.8", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/58-0040/hwmon/hwmon*/in2_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/58-0040/hwmon/hwmon*/curr2_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "MAC_VDD_1.8", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/60-0040/hwmon/hwmon*/in1_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/60-0040/hwmon/hwmon*/curr1_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "MAC_VDD_1.5", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/60-0040/hwmon/hwmon*/in2_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/60-0040/hwmon/hwmon*/curr2_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "MAC_VDD_1.2", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/61-0040/hwmon/hwmon*/in1_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/61-0040/hwmon/hwmon*/curr1_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + } + ] + }, + { + "name": "CPO OE0 power consumption", + "unit": "W", + "children": [ + { + "name": "OE0_AVDD_RX_1.8", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/67-0070/hwmon/hwmon*/loopa_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/67-0070/hwmon/hwmon*/loopa_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.97+220)/1000000)" + }, + { + "name": "OE0_AVDD_RX_1.2", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/67-0070/hwmon/hwmon*/loopb_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/67-0070/hwmon/hwmon*/loopb_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.984+180)/1000000)" + }, + { + "name": "OE0_AVDD_TX_1.8", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/67-0068/hwmon/hwmon*/loopa_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/67-0068/hwmon/hwmon*/loopa_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.984+177)/1000000)" + }, + { + "name": "OE0_AVDD_TX_1.2", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/67-0068/hwmon/hwmon*/loopb_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/67-0068/hwmon/hwmon*/loopb_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.974+126)/1000000)" + }, + { + "name": "OE0_AVDD_TRX_0.75", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/67-0060/hwmon/hwmon*/loopa_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/67-0060/hwmon/hwmon*/loopa_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.984+140)/1000000)" + }, + ] + }, + { + "name": "CPO OE1 power consumption", + "unit": "W", + "children": [ + { + "name": "OE1_AVDD_RX_1.8", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/68-0070/hwmon/hwmon*/loopa_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/68-0070/hwmon/hwmon*/loopa_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.97+220)/1000000)" + }, + { + "name": "OE1_AVDD_RX_1.2", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/68-0070/hwmon/hwmon*/loopb_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/68-0070/hwmon/hwmon*/loopb_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.984+180)/1000000)" + }, + { + "name": "OE1_AVDD_TX_1.8", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/68-0068/hwmon/hwmon*/loopa_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/68-0068/hwmon/hwmon*/loopa_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.984+177)/1000000)" + }, + { + "name": "OE1_AVDD_TX_1.2", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/68-0068/hwmon/hwmon*/loopb_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/68-0068/hwmon/hwmon*/loopb_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.974+126)/1000000)" + }, + { + "name": "OE1_AVDD_TRX_0.75", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/68-0060/hwmon/hwmon*/loopa_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/68-0060/hwmon/hwmon*/loopa_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.984+140)/1000000)" + }, + ] + }, + { + "name": "CPO OE2 power consumption", + "unit": "W", + "children": [ + { + "name": "OE2_AVDD_RX_1.8", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/68-006e/hwmon/hwmon*/loopa_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/68-006e/hwmon/hwmon*/loopa_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.97+220)/1000000)" + }, + { + "name": "OE2_AVDD_RX_1.2", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/68-006e/hwmon/hwmon*/loopb_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/68-006e/hwmon/hwmon*/loopb_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.984+180)/1000000)" + }, + { + "name": "OE2_AVDD_TX_1.8", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/68-0066/hwmon/hwmon*/loopa_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/68-0066/hwmon/hwmon*/loopa_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.984+177)/1000000)" + }, + { + "name": "OE2_AVDD_TX_1.2", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/68-0066/hwmon/hwmon*/loopb_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/68-0066/hwmon/hwmon*/loopb_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.974+126)/1000000)" + }, + { + "name": "OE2_AVDD_TRX_0.75", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/68-005e/hwmon/hwmon*/loopa_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/68-005e/hwmon/hwmon*/loopa_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.984+140)/1000000)" + }, + ] + }, + { + "name": "CPO OE3 power consumption", + "unit": "W", + "children": [ + { + "name": "OE3_AVDD_RX_1.8", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/69-0070/hwmon/hwmon*/loopa_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/69-0070/hwmon/hwmon*/loopa_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.97+220)/1000000)" + }, + { + "name": "OE3_AVDD_RX_1.2", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/69-0070/hwmon/hwmon*/loopb_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/69-0070/hwmon/hwmon*/loopb_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.984+180)/1000000)" + }, + { + "name": "OE3_AVDD_TX_1.8", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/69-0068/hwmon/hwmon*/loopa_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/69-0068/hwmon/hwmon*/loopa_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.984+177)/1000000)" + }, + { + "name": "OE3_AVDD_TX_1.2", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/69-0068/hwmon/hwmon*/loopb_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/69-0068/hwmon/hwmon*/loopb_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.974+126)/1000000)" + }, + { + "name": "OE3_AVDD_TRX_0.75", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/69-0060/hwmon/hwmon*/loopa_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/69-0060/hwmon/hwmon*/loopa_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.984+140)/1000000)" + }, + ] + }, + { + "name": "CPO OE4 power consumption", + "unit": "W", + "children": [ + { + "name": "OE4_AVDD_RX_1.8", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/69-006e/hwmon/hwmon*/loopa_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/69-006e/hwmon/hwmon*/loopa_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.97+220)/1000000)" + }, + { + "name": "OE4_AVDD_RX_1.2", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/69-006e/hwmon/hwmon*/loopb_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/69-006e/hwmon/hwmon*/loopb_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.984+180)/1000000)" + }, + { + "name": "OE4_AVDD_TX_1.8", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/69-0066/hwmon/hwmon*/loopa_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/69-0066/hwmon/hwmon*/loopa_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.984+177)/1000000)" + }, + { + "name": "OE4_AVDD_TX_1.2", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/69-0066/hwmon/hwmon*/loopb_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/69-0066/hwmon/hwmon*/loopb_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.974+126)/1000000)" + }, + { + "name": "OE4_AVDD_TRX_0.75", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/69-005e/hwmon/hwmon*/loopa_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/69-005e/hwmon/hwmon*/loopa_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.984+140)/1000000)" + }, + ] + }, + { + "name": "CPO OE5 power consumption", + "unit": "W", + "children": [ + { + "name": "OE5_AVDD_RX_1.8", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/70-0070/hwmon/hwmon*/loopa_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/70-0070/hwmon/hwmon*/loopa_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.97+220)/1000000)" + }, + { + "name": "OE5_AVDD_RX_1.2", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/70-0070/hwmon/hwmon*/loopb_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/70-0070/hwmon/hwmon*/loopb_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.984+180)/1000000)" + }, + { + "name": "OE5_AVDD_TX_1.8", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/70-0068/hwmon/hwmon*/loopa_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/70-0068/hwmon/hwmon*/loopa_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.984+177)/1000000)" + }, + { + "name": "OE5_AVDD_TX_1.2", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/70-0068/hwmon/hwmon*/loopb_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/70-0068/hwmon/hwmon*/loopb_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.974+126)/1000000)" + }, + { + "name": "OE5_AVDD_TRX_0.75", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/70-0060/hwmon/hwmon*/loopa_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/70-0060/hwmon/hwmon*/loopa_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.984+140)/1000000)" + }, + ] + }, + { + "name": "CPO OE6 power consumption", + "unit": "W", + "children": [ + { + "name": "OE6_AVDD_RX_1.8", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/70-006e/hwmon/hwmon*/loopa_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/70-006e/hwmon/hwmon*/loopa_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.97+220)/1000000)" + }, + { + "name": "OE6_AVDD_RX_1.2", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/70-006e/hwmon/hwmon*/loopb_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/70-006e/hwmon/hwmon*/loopb_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.984+180)/1000000)" + }, + { + "name": "OE6_AVDD_TX_1.8", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/70-0066/hwmon/hwmon*/loopa_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/70-0066/hwmon/hwmon*/loopa_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.984+177)/1000000)" + }, + { + "name": "OE6_AVDD_TX_1.2", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/70-0066/hwmon/hwmon*/loopb_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/70-0066/hwmon/hwmon*/loopb_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.974+126)/1000000)" + }, + { + "name": "OE6_AVDD_TRX_0.75", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/70-005e/hwmon/hwmon*/loopa_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/70-005e/hwmon/hwmon*/loopa_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.984+140)/1000000)" + }, + ] + }, + { + "name": "CPO OE7 power consumption", + "unit": "W", + "children": [ + { + "name": "OE7_AVDD_RX_1.8", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/67-006e/hwmon/hwmon*/loopa_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/67-006e/hwmon/hwmon*/loopa_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.97+220)/1000000)" + }, + { + "name": "OE7_AVDD_RX_1.2", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/67-006e/hwmon/hwmon*/loopb_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/67-006e/hwmon/hwmon*/loopb_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.984+180)/1000000)" + }, + { + "name": "OE7_AVDD_TX_1.8", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/67-0066/hwmon/hwmon*/loopa_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/67-0066/hwmon/hwmon*/loopa_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.984+177)/1000000)" + }, + { + "name": "OE7_AVDD_TX_1.2", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/67-0066/hwmon/hwmon*/loopb_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/67-0066/hwmon/hwmon*/loopb_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.974+126)/1000000)" + }, + { + "name": "OE7_AVDD_TRX_0.75", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/67-005e/hwmon/hwmon*/loopa_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/67-005e/hwmon/hwmon*/loopa_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.984+140)/1000000)" + }, + ] + }, + { + "name": "RLM power consumption", + "unit": "W", + "children": [ + { + "name": "RLML_VDD V3.3", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/71-0068/hwmon/hwmon*/loopa_pout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*1.5/1000000)" + }, + { + "name": "RLMH_VDD V3.3", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/71-0068/hwmon/hwmon*/loopb_pout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*1.5/1000000)" + }, + ] + }, + { + "name": "CPU sub-module power consumption", + "unit": "W", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/33-0041/hwmon/hwmon*/in3_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/33-0041/hwmon/hwmon*/curr3_input", + "int_decode": 10, + } + ], + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "FAN power consumption total", + "unit": "W", + "children": [ + { + "name": "FAN1 power consumption", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/88-0042/hwmon/hwmon*/in1_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/88-0042/hwmon/hwmon*/curr1_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "FAN2 power consumption", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/89-0042/hwmon/hwmon*/in2_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/89-0042/hwmon/hwmon*/curr2_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "FAN3 power consumption", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/88-0042/hwmon/hwmon*/in2_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/88-0042/hwmon/hwmon*/curr2_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "FAN4 power consumption", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/89-0042/hwmon/hwmon*/in3_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/89-0042/hwmon/hwmon*/curr3_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "FAN5 power consumption", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/88-0042/hwmon/hwmon*/in3_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/88-0042/hwmon/hwmon*/curr3_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "FAN6 power consumption", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/90-0042/hwmon/hwmon*/in1_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/90-0042/hwmon/hwmon*/curr1_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "FAN7 power consumption", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/89-0042/hwmon/hwmon*/in1_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/89-0042/hwmon/hwmon*/curr1_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "FAN8 power consumption", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/90-0042/hwmon/hwmon*/in2_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/90-0042/hwmon/hwmon*/curr2_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + + ] + }, +] + +REBOOT_CAUSE_PARA = { + "reboot_cause_list": [ + { + "name": "otp_switch_reboot", + "monitor_point": {"gettype": "file_exist", "judge_file": "/etc/.otp_switch_reboot_flag", "okval": True}, + "record": [ + {"record_type": "file", "mode": "cover", "log": "Thermal Overload: ASIC, ", + "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"}, + {"record_type": "file", "mode": "add", "log": "Thermal Overload: ASIC, ", + "path": "/etc/sonic/.reboot/.history-reboot-cause.txt", "file_max_size": 1 * 1024 * 1024} + ], + "finish_operation": [ + {"gettype": "cmd", "cmd": "rm -rf /etc/.otp_switch_reboot_flag"}, + ] + }, + { + "name": "otp_other_reboot", + "monitor_point": {"gettype": "file_exist", "judge_file": "/etc/.otp_other_reboot_flag", "okval": True}, + "record": [ + {"record_type": "file", "mode": "cover", "log": "Thermal Overload: Other, ", + "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"}, + {"record_type": "file", "mode": "add", "log": "Thermal Overload: Other, ", + "path": "/etc/sonic/.reboot/.history-reboot-cause.txt", "file_max_size": 1 * 1024 * 1024} + ], + "finish_operation": [ + {"gettype": "cmd", "cmd": "rm -rf /etc/.otp_other_reboot_flag"}, + ] + }, + ], + "other_reboot_cause_record": [ + {"record_type": "file", "mode": "cover", "log": "Other, ", "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"}, + {"record_type": "file", "mode": "add", "log": "Other, ", "path": "/etc/sonic/.reboot/.history-reboot-cause.txt"} + ], +} + +POWER_CTRL_CONF = { + "oe": [ + { + "name": "OE0", + "status": [ + { + "val_conf": {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x22, "mask": 0x01}, + "off": [0x00], + "on": [0x01], + } + ], + "on": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfe, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_7", "value": 0x00, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x81, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_7", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfe, "value": 0x01, "delay": 0.001}, + ], + "off": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfe, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_7", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x81, "value": 0xfe}, + ], + "cycle": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfe, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_7", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x81, "value": 0xfe, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x81, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_7", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfe, "value": 0x01, "delay": 0.001}, + ], + "reset": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfe, "value": 0x00}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfe, "value": 0x01, "delay": 0.01}, + ], + }, + { + "name": "OE1", + "status": [ + { + "val_conf": {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x22, "mask": 0x02}, + "off": [0x00], + "on": [0x02], + } + ], + "on": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfd, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_4", "value": 0x00, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x82, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_4", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfd, "value": 0x02, "delay": 0.001}, + ], + "off": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfd, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_4", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x82, "value": 0xfe}, + ], + "cycle": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfd, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_4", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x82, "value": 0xfe, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x82, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_4", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfd, "value": 0x02, "delay": 0.001}, + ], + "reset": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfd, "value": 0x00}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfd, "value": 0x02, "delay": 0.01}, + ], + }, + { + "name": "OE2", + "status": [ + { + "val_conf": {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x22, "mask": 0x04}, + "off": [0x00], + "on": [0x04], + } + ], + "on": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfb, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_3", "value": 0x00, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x83, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_3", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfb, "value": 0x04, "delay": 0.001}, + ], + "off": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfb, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_3", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x83, "value": 0xfe}, + ], + "cycle": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfb, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_3", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x83, "value": 0xfe, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x83, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_3", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfb, "value": 0x04, "delay": 0.001}, + ], + "reset": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfb, "value": 0x00}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfb, "value": 0x04, "delay": 0.01}, + ], + }, + { + "name": "OE3", + "status": [ + { + "val_conf": {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x22, "mask": 0x08}, + "off": [0x00], + "on": [0x08], + } + ], + "on": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xf7, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_0", "value": 0x00, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x84, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_0", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xf7, "value": 0x08, "delay": 0.001}, + ], + "off": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xf7, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_0", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x84, "value": 0xfe}, + ], + "cycle": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xf7, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_0", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x84, "value": 0xfe, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x84, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_0", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xf7, "value": 0x08, "delay": 0.001}, + ], + "reset": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xf7, "value": 0x00}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xf7, "value": 0x08, "delay": 0.01}, + ], + }, + { + "name": "OE4", + "status": [ + { + "val_conf": {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x22, "mask": 0x10}, + "off": [0x00], + "on": [0x10], + } + ], + "on": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xef, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_1", "value": 0x00, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x85, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_1", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xef, "value": 0x10, "delay": 0.001}, + ], + "off": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xef, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_1", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x85, "value": 0xfe}, + ], + "cycle": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xef, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_1", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x85, "value": 0xfe, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x85, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_1", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xef, "value": 0x10, "delay": 0.001}, + ], + "reset": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xef, "value": 0x00}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xef, "value": 0x10, "delay": 0.01}, + ], + }, + { + "name": "OE5", + "status": [ + { + "val_conf": {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x22, "mask": 0x20}, + "off": [0x00], + "on": [0x20], + } + ], + "on": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xdf, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_3", "value": 0x00, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x86, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_3", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xdf, "value": 0x20, "delay": 0.001}, + ], + "off": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xdf, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_3", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x86, "value": 0xfe}, + ], + "cycle": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xdf, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_3", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x86, "value": 0xfe, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x86, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_3", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xdf, "value": 0x20, "delay": 0.001}, + ], + "reset": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xdf, "value": 0x00}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xdf, "value": 0x20, "delay": 0.01}, + ], + }, + { + "name": "OE6", + "status": [ + { + "val_conf": {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x22, "mask": 0x40}, + "off": [0x00], + "on": [0x40], + } + ], + "on": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xbf, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_4", "value": 0x00, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x87, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_4", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xbf, "value": 0x40, "delay": 0.001}, + ], + "off": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xbf, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_4", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x87, "value": 0xfe}, + ], + "cycle": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xbf, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_4", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x87, "value": 0xfe, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x87, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_4", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xbf, "value": 0x40, "delay": 0.001}, + ], + "reset": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xbf, "value": 0x00}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xbf, "value": 0x40, "delay": 0.01}, + ], + }, + { + "name": "OE7", + "status": [ + { + "val_conf": {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x22, "mask": 0x80}, + "off": [0x00], + "on": [0x80], + } + ], + "on": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0x7f, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_7", "value": 0x00, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x88, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_7", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0x7f, "value": 0x80, "delay": 0.001}, + ], + "off": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0x7f, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_7", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x88, "value": 0xfe}, + ], + "cycle": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0x7f, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_7", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x88, "value": 0xfe, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x88, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_7", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0x7f, "value": 0x80, "delay": 0.001}, + ], + "reset": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0x7f, "value": 0x00}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0x7f, "value": 0x80, "delay": 0.01}, + ], + } + ] +} + +SET_FW_MAC_CONF = [ + { + "name": "eth0", + "e2_name": "syseeprom", + "get_act_mac": {"cmd": "ethtool -e eth0 offset 0 length 6 |grep 0x0000 | awk -F':' '{gsub(/ /, \":\", $2);print $2}'| sed 's/^[[:space:]]*//' | sed 's/:\s*$//'", "gettype": "cmd_str"}, + "set_mac_cfg": { + "type": 1, + "cmd": {"cmd": "ethtool -E eth0 magic 0x15338086 offset %s value 0x%s length 1", "gettype": "cmd", "delay": 0.1}, + }, + "check_mac_cfg": {"cmd": "ethtool -e eth0 offset 0 length 6 |grep 0x0000 | awk -F':' '{gsub(/ /, \":\", $2);print $2}'| sed 's/^[[:space:]]*//' | sed 's/:\s*$//'", "gettype": "cmd_str"}, + } +] + +SET_MAC_CONF = SET_FW_MAC_CONF +PRODUCT_NAME_CONF = {} diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/config/x86_64_micas_m2_w6940_128x1_fr4_r0_config.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/config/x86_64_micas_m2_w6940_128x1_fr4_r0_config.py new file mode 100755 index 00000000000..987d334a8ed --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/config/x86_64_micas_m2_w6940_128x1_fr4_r0_config.py @@ -0,0 +1,2017 @@ +#!/usr/bin/python +# -*- coding: UTF-8 -*- +from platform_common import * + +STARTMODULE = { + "hal_fanctrl": 1, + "hal_ledctrl": 1, + "avscontrol": 1, + "dev_monitor": 1, + "tty_console": 0, + "reboot_cause": 1, + "pmon_syslog": 1, + "sff_temp_polling": 1, + "generate_airflow": 0, + "product_name": 1, + "generate_mgmt_version": 0, + "set_fw_mac": 1, +} + +DEV_MONITOR_PARAM = { + "polling_time": 10, + "psus": [ + { + "name": "psu2", + "present": {"gettype": "i2c", "bus": 13, "loc": 0x1d, "offset": 0x42, "presentbit": 0, "okval": 0}, + "device": [ + {"id": "psu2pmbus", "name": "wb_fsp1200", "bus": 10, "loc": 0x58, "attr": "hwmon"}, + {"id": "psu2frue2", "name": "wb_24c02", "bus": 10, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "psu1", + "present": {"gettype": "i2c", "bus": 13, "loc": 0x1d, "offset": 0x42, "presentbit": 1, "okval": 0}, + "device": [ + {"id": "psu1pmbus", "name": "wb_fsp1200", "bus": 11, "loc": 0x58, "attr": "hwmon"}, + {"id": "psu1frue2", "name": "wb_24c02", "bus": 11, "loc": 0x50, "attr": "eeprom"}, + ], + }, + ], + "fans": [ + { + "name": "fan7", + "present": {"gettype": "i2c", "bus": 44, "loc": 0x0d, "offset": 0x5b, "presentbit": 0, "okval": 0}, + "device": [ + {"id": "fan7frue2", "name": "wb_24c64", "bus": 43, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "fan5", + "present": {"gettype": "i2c", "bus": 44, "loc": 0x0d, "offset": 0x5b, "presentbit": 1, "okval": 0}, + "device": [ + {"id": "fan5frue2", "name": "wb_24c64", "bus": 42, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "fan3", + "present": {"gettype": "i2c", "bus": 44, "loc": 0x0d, "offset": 0x5b, "presentbit": 2, "okval": 0}, + "device": [ + {"id": "fan3frue2", "name": "wb_24c64", "bus": 41, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "fan1", + "present": {"gettype": "i2c", "bus": 44, "loc": 0x0d, "offset": 0x5b, "presentbit": 3, "okval": 0}, + "device": [ + {"id": "fan1frue2", "name": "wb_24c64", "bus":40, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "fan8", + "present": {"gettype": "i2c", "bus": 52, "loc": 0x0d, "offset": 0x5b, "presentbit": 0, "okval": 0}, + "device": [ + {"id": "fan8frue2", "name": "wb_24c64", "bus": 51, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "fan6", + "present": {"gettype": "i2c", "bus": 52, "loc": 0x0d, "offset": 0x5b, "presentbit": 1, "okval": 0}, + "device": [ + {"id": "fan6frue2", "name": "wb_24c64", "bus": 50, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "fan4", + "present": {"gettype": "i2c", "bus": 52, "loc": 0x0d, "offset": 0x5b, "presentbit": 2, "okval": 0}, + "device": [ + {"id": "fan4frue2", "name": "wb_24c64", "bus": 49, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "fan2", + "present": {"gettype": "i2c", "bus": 52, "loc": 0x0d, "offset": 0x5b, "presentbit": 3, "okval": 0}, + "device": [ + {"id": "fan2frue2", "name": "wb_24c64", "bus": 48, "loc": 0x50, "attr": "eeprom"}, + ], + }, + ], + "others": [ + { + "name": "eeprom", + "device": [ + {"id": "eeprom_1", "name": "wb_24c02", "bus": 1, "loc": 0x56, "attr": "eeprom"}, + {"id": "eeprom_2", "name": "wb_24c02", "bus": 1, "loc": 0x57, "attr": "eeprom"}, + {"id": "eeprom_3", "name": "wb_24c02", "bus": 2, "loc": 0x51, "attr": "eeprom"}, + {"id": "eeprom_4", "name": "wb_24c02", "bus": 3, "loc": 0x51, "attr": "eeprom"}, + {"id": "eeprom_5", "name": "wb_24c02", "bus": 32, "loc": 0x52, "attr": "eeprom"}, + {"id": "eeprom_6", "name": "wb_24c02", "bus": 12, "loc": 0x57, "attr": "eeprom"}, + ], + }, + { + "name": "oe_mcu", + "device": [ + {"id": "oe_mcu_1", "name": "wb_24c02", "bus": 24, "loc": 0x50, "attr": "eeprom"}, + {"id": "oe_mcu_2", "name": "wb_24c02", "bus": 25, "loc": 0x50, "attr": "eeprom"}, + {"id": "oe_mcu_3", "name": "wb_24c02", "bus": 26, "loc": 0x50, "attr": "eeprom"}, + {"id": "oe_mcu_4", "name": "wb_24c02", "bus": 27, "loc": 0x50, "attr": "eeprom"}, + {"id": "oe_mcu_5", "name": "wb_24c02", "bus": 28, "loc": 0x50, "attr": "eeprom"}, + {"id": "oe_mcu_6", "name": "wb_24c02", "bus": 29, "loc": 0x50, "attr": "eeprom"}, + {"id": "oe_mcu_7", "name": "wb_24c02", "bus": 30, "loc": 0x50, "attr": "eeprom"}, + {"id": "oe_mcu_8", "name": "wb_24c02", "bus": 31, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "tmp275", + "device": [ + {"id": "tmp275_1", "name": "wb_tmp275", "bus": 34, "loc": 0x4c, "attr": "hwmon"}, + {"id": "tmp275_2", "name": "wb_tmp275", "bus": 35, "loc": 0x4d, "attr": "hwmon"}, + {"id": "tmp275_3", "name": "wb_tmp275", "bus": 8, "loc": 0x48, "attr": "hwmon"}, + {"id": "tmp275_4", "name": "wb_tmp275", "bus": 8, "loc": 0x49, "attr": "hwmon"}, + {"id": "tmp275_5", "name": "wb_tmp275", "bus": 9, "loc": 0x48, "attr": "hwmon"}, + {"id": "tmp275_6", "name": "wb_tmp275", "bus": 9, "loc": 0x49, "attr": "hwmon"}, + {"id": "tmp275_7", "name": "wb_tmp275", "bus": 14, "loc": 0x48, "attr": "hwmon"}, + {"id": "tmp275_8", "name": "wb_tmp275", "bus": 14, "loc": 0x49, "attr": "hwmon"}, + {"id": "tmp275_9", "name": "wb_tmp275", "bus": 14, "loc": 0x4b, "attr": "hwmon"}, + ], + }, + { + "name": "ina3221", + "device": [ + {"id": "ina3221_1", "name": "wb_ina3221", "bus": 33, "loc": 0x40, "attr": "hwmon"}, + {"id": "ina3221_2", "name": "wb_ina3221", "bus": 33, "loc": 0x41, "attr": "hwmon"}, + {"id": "ina3221_3", "name": "wb_ina3221", "bus": 33, "loc": 0x42, "attr": "hwmon"}, + {"id": "ina3221_4", "name": "wb_ina3221", "bus": 12, "loc": 0x40, "attr": "hwmon"}, + {"id": "ina3221_5", "name": "wb_ina3221", "bus": 12, "loc": 0x41, "attr": "hwmon"}, + {"id": "ina3221_6", "name": "wb_ina3221", "bus": 56, "loc": 0x40, "attr": "hwmon"}, + {"id": "ina3221_7", "name": "wb_ina3221", "bus": 56, "loc": 0x41, "attr": "hwmon"}, + {"id": "ina3221_8", "name": "wb_ina3221", "bus": 57, "loc": 0x40, "attr": "hwmon"}, + {"id": "ina3221_9", "name": "wb_ina3221", "bus": 58, "loc": 0x40, "attr": "hwmon"}, + {"id": "ina3221_10", "name": "wb_ina3221", "bus": 59, "loc": 0x40, "attr": "hwmon"}, + {"id": "ina3221_11", "name": "wb_ina3221", "bus": 60, "loc": 0x40, "attr": "hwmon"}, + {"id": "ina3221_12", "name": "wb_ina3221", "bus": 61, "loc": 0x40, "attr": "hwmon"}, + {"id": "ina3221_13", "name": "wb_ina3221", "bus": 62, "loc": 0x40, "attr": "hwmon"}, + {"id": "ina3221_14", "name": "wb_ina3221", "bus": 63, "loc": 0x40, "attr": "hwmon"}, + ], + }, + { + "name": "xdpe12284", + "device": [ + {"id": "xdpe12284_1", "name": "wb_xdpe12284", "bus": 5, "loc": 0x5e, "attr": "hwmon"}, + {"id": "xdpe12284_2", "name": "wb_xdpe12284", "bus": 5, "loc": 0x68, "attr": "hwmon"}, + {"id": "xdpe12284_3", "name": "wb_xdpe12284", "bus": 5, "loc": 0x6e, "attr": "hwmon"}, + {"id": "xdpe12284_4", "name": "wb_xdpe12284", "bus": 5, "loc": 0x70, "attr": "hwmon"}, + {"id": "xdpe12284_5", "name": "wb_xdpe12284", "bus": 70, "loc": 0x68, "attr": "hwmon"}, + {"id": "xdpe12284_6", "name": "wb_xdpe12284", "bus": 71, "loc": 0x68, "attr": "hwmon"}, + ], + }, + { + "name": "xdpe132g5c", + "device": [ + {"id": "xdpe132g5c_1", "name": "wb_xdpe132g5c_pmbus", "bus": 64, "loc": 0x40, "attr": "hwmon"}, + {"id": "xdpe132g5c_2", "name": "wb_xdpe132g5c_pmbus", "bus": 65, "loc": 0x40, "attr": "hwmon"}, + {"id": "xdpe132g5c_3", "name": "wb_xdpe132g5c_pmbus", "bus": 66, "loc": 0x40, "attr": "hwmon"}, + {"id": "xdpe132g5c_4", "name": "wb_xdpe132g5c_pmbus", "bus": 69, "loc": 0x40, "attr": "hwmon"}, + ], + }, + { + "name": "ucd90160", + "device": [ + {"id": "ucd90160_1", "name": "wb_ucd90160", "bus": 5, "loc": 0x5f, "attr": "hwmon"}, + ], + }, + ], +} + +MANUINFO_CONF = { + "bios": { + "key": "BIOS", + "head": True, + "next": "cpu" + }, + "bios_vendor": { + "parent": "bios", + "key": "Vendor", + "cmd": "dmidecode -t 0 |grep Vendor", + "pattern": r".*Vendor", + "separator": ":", + "arrt_index": 1, + }, + "bios_version": { + "parent": "bios", + "key": "Version", + "cmd": "dmidecode -t 0 |grep Version", + "pattern": r".*Version", + "separator": ":", + "arrt_index": 2, + }, + "bios_date": { + "parent": "bios", + "key": "Release Date", + "cmd": "dmidecode -t 0 |grep Release", + "pattern": r".*Release Date", + "separator": ":", + "arrt_index": 3, + }, + "bios_boot": { + "parent": "bios", + "key": "Boot From", + "devfile": { + "loc": "/dev/cpld1", + "offset":0x1d, + "len":1, + "bit_width":1 + }, + "decode": { + "01": "Master", + "02": "Slave" + }, + "arrt_index": 4, + }, + + "cpu": { + "key": "CPU", + "next": "cpld" + }, + "cpu_vendor": { + "parent": "cpu", + "key": "Vendor", + "cmd": "dmidecode --type processor |grep Manufacturer", + "pattern": r".*Manufacturer", + "separator": ":", + "arrt_index": 1, + }, + "cpu_model": { + "parent": "cpu", + "key": "Device Model", + "cmd": "dmidecode --type processor | grep Version", + "pattern": r".*Version", + "separator": ":", + "arrt_index": 2, + }, + "cpu_core": { + "parent": "cpu", + "key": "Core Count", + "cmd": "dmidecode --type processor | grep \"Core Count\"", + "pattern": r".*Core Count", + "separator": ":", + "arrt_index": 3, + }, + "cpu_thread": { + "parent": "cpu", + "key": "Thread Count", + "cmd": "dmidecode --type processor | grep \"Thread Count\"", + "pattern": r".*Thread Count", + "separator": ":", + "arrt_index": 4, + }, + + + "cpld": { + "key": "CPLD", + "next": "fpga" + }, + + "cpld1": { + "key": "CPLD1", + "parent": "cpld", + "arrt_index": 1, + }, + "cpld1_model": { + "key": "Device Model", + "parent": "cpld1", + "config": "LCMXO3LF-2100C-5BG256C", + "arrt_index": 1, + }, + "cpld1_vender": { + "key": "Vendor", + "parent": "cpld1", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld1_desc": { + "key": "Description", + "parent": "cpld1", + "config": "CPU CPLD", + "arrt_index": 3, + }, + "cpld1_version": { + "key": "Firmware Version", + "parent": "cpld1", + "reg": { + "loc": "/dev/port", + "offset": 0xa00, + "size": 4 + }, + "callback": "cpld_format", + "arrt_index": 4, + }, + + "cpld2": { + "key": "CPLD2", + "parent": "cpld", + "arrt_index": 2, + }, + "cpld2_model": { + "key": "Device Model", + "parent": "cpld2", + "config": "LCMXO3LF-2100C-5BG256C", + "arrt_index": 1, + }, + "cpld2_vender": { + "key": "Vendor", + "parent": "cpld2", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld2_desc": { + "key": "Description", + "parent": "cpld2", + "config": "SCM CPLD", + "arrt_index": 3, + }, + "cpld2_version": { + "key": "Firmware Version", + "parent": "cpld2", + "reg": { + "loc": "/dev/port", + "offset": 0x900, + "size": 4 + }, + "callback": "cpld_format", + "arrt_index": 4, + }, + "cpld2_boot": { + "parent": "cpld2", + "key": "Boot From", + "devfile": { + "loc": "/dev/cpld1", + "offset":0x06, + "len":1, + "bit_width":1 + }, + "decode": { + "01": "Main", + "02": "Golden" + }, + "arrt_index": 5, + }, + + "cpld3": { + "key": "CPLD3", + "parent": "cpld", + "arrt_index": 3, + }, + "cpld3_model": { + "key": "Device Model", + "parent": "cpld3", + "config": "LCMXO3LF-4300C-6BG324I", + "arrt_index": 1, + }, + "cpld3_vender": { + "key": "Vendor", + "parent": "cpld3", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld3_desc": { + "key": "Description", + "parent": "cpld3", + "config": "MCB CPLD", + "arrt_index": 3, + }, + "cpld3_version": { + "key": "Firmware Version", + "parent": "cpld3", + "i2c": { + "bus": "13", + "loc": "0x1d", + "offset": 0, + "size": 4 + }, + "callback": "cpld_format", + "arrt_index": 4, + }, + "cpld3_boot": { + "parent": "cpld3", + "key": "Boot From", + "devfile": { + "loc": "/dev/cpld3", + "offset":0x0d, + "len":1, + "bit_width":1 + }, + "decode": { + "01": "Main", + "02": "Golden" + }, + "arrt_index": 5, + }, + + "cpld4": { + "key": "CPLD4", + "parent": "cpld", + "arrt_index": 4, + }, + "cpld4_model": { + "key": "Device Model", + "parent": "cpld4", + "config": "LCMXO3LF-4300C-6BG324I", + "arrt_index": 1, + }, + "cpld4_vender": { + "key": "Vendor", + "parent": "cpld4", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld4_desc": { + "key": "Description", + "parent": "cpld4", + "config": "SMB CPLD", + "arrt_index": 3, + }, + "cpld4_version": { + "key": "Firmware Version", + "parent": "cpld4", + "i2c": { + "bus": "20", + "loc": "0x1e", + "offset": 0, + "size": 4 + }, + "callback": "cpld_format", + "arrt_index": 4, + }, + "cpld4_boot": { + "parent": "cpld4", + "key": "Boot From", + "devfile": { + "loc": "/dev/cpld4", + "offset":0x0d, + "len":1, + "bit_width":1 + }, + "decode": { + "01": "Main", + "02": "Golden" + }, + "arrt_index": 5, + }, + + "cpld5": { + "key": "CPLD5", + "parent": "cpld", + "arrt_index": 5, + }, + "cpld5_model": { + "key": "Device Model", + "parent": "cpld5", + "config": "LCMXO3LF-2100C-5BG256C", + "arrt_index": 1, + }, + "cpld5_vender": { + "key": "Vendor", + "parent": "cpld5", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld5_desc": { + "key": "Description", + "parent": "cpld5", + "config": "FCB_T CPLD", + "arrt_index": 3, + }, + "cpld5_version": { + "key": "Firmware Version", + "parent": "cpld5", + "i2c": { + "bus": "44", + "loc": "0x0d", + "offset": 0, + "size": 4 + }, + "callback": "cpld_format", + "arrt_index": 4, + }, + "cpld5_boot": { + "parent": "cpld5", + "key": "Boot From", + "devfile": { + "loc": "/dev/cpld5", + "offset":0x0d, + "len":1, + "bit_width":1 + }, + "decode": { + "01": "Main", + "02": "Golden" + }, + "arrt_index": 5, + }, + + "cpld6": { + "key": "CPLD6", + "parent": "cpld", + "arrt_index": 6, + }, + "cpld6_model": { + "key": "Device Model", + "parent": "cpld6", + "config": "LCMXO3LF-2100C-5BG256C", + "arrt_index": 1, + }, + "cpld6_vender": { + "key": "Vendor", + "parent": "cpld6", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld6_desc": { + "key": "Description", + "parent": "cpld6", + "config": "FCB_B CPLD", + "arrt_index": 3, + }, + "cpld6_version": { + "key": "Firmware Version", + "parent": "cpld6", + "i2c": { + "bus": "52", + "loc": "0x0d", + "offset": 0, + "size": 4 + }, + "callback": "cpld_format", + "arrt_index": 4, + }, + "cpld6_boot": { + "parent": "cpld6", + "key": "Boot From", + "devfile": { + "loc": "/dev/cpld6", + "offset":0x0d, + "len":1, + "bit_width":1 + }, + "decode": { + "01": "Main", + "02": "Golden" + }, + "arrt_index": 5, + }, + + + "psu": { + "key": "PSU", + "next": "fan" + }, + + "psu1": { + "parent": "psu", + "key": "PSU1", + "arrt_index": 1, + }, + "psu1_hw_version": { + "key": "Hardware Version", + "parent": "psu1", + "extra": { + "funcname": "getPsu", + "id": "psu1", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "psu1_fw_version": { + "key": "Firmware Version", + "parent": "psu1", + "config": "NA", + "arrt_index": 2, + }, + + "psu2": { + "parent": "psu", + "key": "PSU2", + "arrt_index": 2, + }, + "psu2_hw_version": { + "key": "Hardware Version", + "parent": "psu2", + "extra": { + "funcname": "getPsu", + "id": "psu2", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "psu2_fw_version": { + "key": "Firmware Version", + "parent": "psu2", + "config": "NA", + "arrt_index": 2, + }, + + "fan": { + "key": "FAN", + "next": "fpga" + }, + "fan1": { + "key": "FAN1", + "parent": "fan", + "arrt_index": 1, + }, + "fan1_hw_version": { + "key": "Hardware Version", + "parent": "fan1", + "extra": { + "funcname": "checkFan", + "id": "fan1", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan1_fw_version": { + "key": "Firmware Version", + "parent": "fan1", + "config": "NA", + "arrt_index": 2, + }, + + "fan2": { + "key": "FAN2", + "parent": "fan", + "arrt_index": 2, + }, + "fan2_hw_version": { + "key": "Hardware Version", + "parent": "fan2", + "extra": { + "funcname": "checkFan", + "id": "fan2", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan2_fw_version": { + "key": "Firmware Version", + "parent": "fan2", + "config": "NA", + "arrt_index": 2, + }, + + "fan3": { + "key": "FAN3", + "parent": "fan", + "arrt_index": 3, + }, + "fan3_hw_version": { + "key": "Hardware Version", + "parent": "fan3", + "extra": { + "funcname": "checkFan", + "id": "fan3", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan3_fw_version": { + "key": "Firmware Version", + "parent": "fan3", + "config": "NA", + "arrt_index": 2, + }, + + "fan4": { + "key": "FAN4", + "parent": "fan", + "arrt_index": 4, + }, + "fan4_hw_version": { + "key": "Hardware Version", + "parent": "fan4", + "extra": { + "funcname": "checkFan", + "id": "fan4", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan4_fw_version": { + "key": "Firmware Version", + "parent": "fan4", + "config": "NA", + "arrt_index": 2, + }, + + "fan5": { + "key": "FAN5", + "parent": "fan", + "arrt_index": 5, + }, + "fan5_hw_version": { + "key": "Hardware Version", + "parent": "fan5", + "extra": { + "funcname": "checkFan", + "id": "fan5", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan5_fw_version": { + "key": "Firmware Version", + "parent": "fan5", + "config": "NA", + "arrt_index": 2, + }, + + "fan6": { + "key": "FAN6", + "parent": "fan", + "arrt_index": 6, + }, + "fan6_hw_version": { + "key": "Hardware Version", + "parent": "fan6", + "extra": { + "funcname": "checkFan", + "id": "fan6", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan6_fw_version": { + "key": "Firmware Version", + "parent": "fan6", + "config": "NA", + "arrt_index": 2, + }, + + "fan7": { + "key": "FAN7", + "parent": "fan", + "arrt_index": 7, + }, + "fan7_hw_version": { + "key": "Hardware Version", + "parent": "fan7", + "extra": { + "funcname": "checkFan", + "id": "fan7", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan7_fw_version": { + "key": "Firmware Version", + "parent": "fan7", + "config": "NA", + "arrt_index": 2, + }, + + "fan8": { + "key": "FAN8", + "parent": "fan", + "arrt_index": 8, + }, + "fan8_hw_version": { + "key": "Hardware Version", + "parent": "fan8", + "extra": { + "funcname": "checkFan", + "id": "fan8", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan8_fw_version": { + "key": "Firmware Version", + "parent": "fan8", + "config": "NA", + "arrt_index": 2, + }, + + + "i210": { + "key": "NIC", + "next": "fpga" + }, + "i210_model": { + "parent": "i210", + "config": "NA", + "key": "Device Model", + "arrt_index": 1, + }, + "i210_vendor": { + "parent": "i210", + "config": "INTEL", + "key": "Vendor", + "arrt_index": 2, + }, + "i210_version": { + "parent": "i210", + "cmd": "ethtool -i eno1", + "pattern": r"firmware-version", + "separator": ":", + "key": "Firmware Version", + "arrt_index": 3, + }, + + "fpga": { + "key": "FPGA", + }, + + "fpga1": { + "key": "FPGA1", + "parent": "fpga", + "arrt_index": 1, + }, + "fpga1_model": { + "parent": "fpga1", + "config": "XC7A50T-2FGG484C", + "key": "Device Model", + "arrt_index": 1, + }, + "fpga1_vender": { + "parent": "fpga1", + "config": "XILINX", + "key": "Vendor", + "arrt_index": 2, + }, + "fpga1_desc": { + "key": "Description", + "parent": "fpga1", + "config": "IOB FPGA", + "arrt_index": 3, + }, + "fpga1_fw_version": { + "parent": "fpga1", + "devfile": { + "loc": "/dev/fpga0", + "offset": 0, + "len": 4, + "bit_width": 4 + }, + "key": "Firmware Version", + "arrt_index": 4, + }, + "fpga1_date": { + "parent": "fpga1", + "devfile": { + "loc": "/dev/fpga0", + "offset": 4, + "len": 4, + "bit_width": 4 + }, + "key": "Build Date", + "arrt_index": 5, + }, + "fpga1_boot": { + "parent": "fpga1", + "key": "Boot From", + "devfile": { + "loc": "/dev/fpga0", + "offset":0x00, + "len":1, + "bit_width":1 + }, + "decode": { + "00": "Golden", + "default": "Main" + }, + "arrt_index": 6, + }, + "fpga2": { + "key": "FPGA2", + "parent": "fpga", + "arrt_index": 2, + }, + "fpga2_model": { + "parent": "fpga2", + "config": "XC7A50T-2FGG484C", + "key": "Device Model", + "arrt_index": 1, + }, + "fpga2_vender": { + "parent": "fpga2", + "config": "XILINX", + "key": "Vendor", + "arrt_index": 2, + }, + "fpga2_desc": { + "key": "Description", + "parent": "fpga2", + "config": "DOM FPGA", + "arrt_index": 3, + }, + "fpga2_fw_version": { + "parent": "fpga2", + "devfile": { + "loc": "/dev/fpga1", + "offset": 0, + "len": 4, + "bit_width": 4 + }, + "key": "Firmware Version", + "arrt_index": 4, + }, + "fpga2_date": { + "parent": "fpga2", + "devfile": { + "loc": "/dev/fpga1", + "offset": 4, + "len": 4, + "bit_width": 4 + }, + "key": "Build Date", + "arrt_index": 5, + }, + "fpga2_boot": { + "parent": "fpga2", + "key": "Boot From", + "devfile": { + "loc": "/dev/fpga1", + "offset":0x00, + "len":1, + "bit_width":1 + }, + "decode": { + "00": "Golden", + "default": "Main" + }, + "arrt_index": 6, + }, +} + +PMON_SYSLOG_STATUS = { + "polling_time": 3, + "fans": { + "present": {"path": ["/sys/s3ip/fan/*/present"], "ABSENT": 0}, + "status": [ + {"path": "/sys/s3ip/fan/%s/motor1/status", 'okval': 1}, + {"path": "/sys/s3ip/fan/%s/motor2/status", 'okval': 1}, + ], + "nochangedmsgflag": 1, + "nochangedmsgtime": 60, + "noprintfirsttimeflag": 0, + "alias": { + "fan1": "FAN1", + "fan2": "FAN2", + "fan3": "FAN3", + "fan4": "FAN4", + "fan5": "FAN5", + "fan6": "FAN6", + "fan7": "FAN7", + "fan8": "FAN8" + } + }, + "psus": { + "present": {"path": ["/sys/s3ip/psu/*/present"], "ABSENT": 0}, + "status": [ + {"path": "/sys/s3ip/psu/%s/out_status", "okval": 1}, + {"path": "/sys/s3ip/psu/%s/alarm", "okval": 0}, + ], + "nochangedmsgflag": 1, + "nochangedmsgtime": 60, + "noprintfirsttimeflag": 0, + "alias": { + "psu1": "PSU1", + "psu2": "PSU2" + } + } +} + +##################### MAC Voltage adjust#################################### +MAC_DEFAULT_PARAM = [ + { + "name": "mac_core", # AVS name + "type": 0, # 1: used default value, if rov value not in range. 0: do nothing, if rov value not in range + "rov_source": 0, # 0: get rov value from cpld, 1: get rov value from SDK + "cpld_avs": {"bus": 20, "loc": 0x1e, "offset": 0x20, "gettype": "i2c"}, + "set_avs": { + "loc": "/sys/bus/i2c/devices/64-0040/hwmon/hwmon*/avs0_vout", + "gettype": "sysfs", "formula": "int((%f)*1000000)" + }, + "mac_avs_param": { + 0x92: 0.7471, + 0x90: 0.7600, + 0x8e: 0.7710, + 0x8c: 0.7839, + 0x8a: 0.7961, + 0x88: 0.8071, + 0x86: 0.8181, + 0x84: 0.8291, + 0x82: 0.8401 + } + } +] + +DRIVERLISTS = [ + {"name": "ice", "delay": 0, "removable": 0}, + {"name": "wb_i2c_i801", "delay": 1, "removable": 0}, + {"name": "i2c_dev", "delay": 0, "removable": 0}, + {"name": "wb_i2c_algo_bit", "delay": 0}, + {"name": "wb_i2c_gpio", "delay": 0}, + {"name": "i2c_mux", "delay": 0, "removable": 0}, + {"name": "wb_i2c_gpio_device gpio_sda=181 gpio_scl=180 gpio_chip_name=INTC3001:00 bus_num=1", "delay": 0}, + {"name": "platform_common dfd_my_type=0x40bd", "delay": 0}, + {"name": "wb_logic_dev_common", "delay":0}, + {"name": "wb_io_dev", "delay": 0}, + {"name": "wb_io_dev_device", "delay": 0}, + {"name": "wb_fpga_pcie", "delay": 0}, + {"name": "wb_pcie_dev", "delay": 0}, + {"name": "wb_pcie_dev_device", "delay": 0}, + {"name": "wb_i2c_dev", "delay": 0}, + {"name": "wb_i2c_ocores", "delay": 0}, + {"name": "wb_i2c_ocores_device", "delay": 0}, + {"name": "wb_i2c_mux_pca9641", "delay": 0}, + {"name": "wb_i2c_mux_pca954x", "delay": 0}, + {"name": "wb_i2c_mux_pca954x_device", "delay": 0}, + {"name": "wb_i2c_dev_device", "delay": 0}, + {"name": "wb_lm75", "delay": 0}, + {"name": "wb_at24", "delay": 0}, + {"name": "wb_pmbus_core", "delay": 0}, + {"name": "wb_xdpe12284", "delay": 0}, + {"name": "wb_xdpe132g5c_pmbus", "delay": 0}, + {"name": "wb_csu550", "delay": 0}, + {"name": "wb_ina3221", "delay": 0}, + {"name": "wb_ucd9000", "delay": 0}, + {"name": "wb_xdpe132g5c", "delay": 0}, +# {"name": "firmware_driver_sysfs", "delay": 0}, + {"name": "s3ip_sysfs", "delay": 0}, + {"name": "wb_switch_driver", "delay": 0}, + {"name": "fan_device_driver", "delay": 0}, + {"name": "psu_device_driver", "delay": 0}, + {"name": "vol_sensor_device_driver", "delay": 0}, + {"name": "temp_sensor_device_driver", "delay": 0}, + {"name": "wb_spd", "delay": 0}, +] + +DEVICE = [ + # eeprom + {"name": "wb_24c02", "bus": 1, "loc": 0x56}, + {"name": "wb_24c02", "bus": 1, "loc": 0x57}, + {"name": "wb_24c02", "bus": 2, "loc": 0x51}, + {"name": "wb_24c02", "bus": 3, "loc": 0x51}, + # SCM + {"name": "wb_24c02", "bus": 32, "loc": 0x52}, + {"name": "wb_ina3221", "bus": 33, "loc": 0x40}, + {"name": "wb_ina3221", "bus": 33, "loc": 0x41}, + {"name": "wb_ina3221", "bus": 33, "loc": 0x42}, + {"name": "wb_tmp275", "bus": 34, "loc": 0x4c}, + {"name": "wb_tmp275", "bus": 35, "loc": 0x4d}, + # CPU + {"name": "wb_ucd90160", "bus": 5, "loc": 0x5f}, + {"name": "wb_xdpe12284", "bus": 5, "loc": 0x5e}, + {"name": "wb_xdpe12284", "bus": 5, "loc": 0x68}, + {"name": "wb_xdpe12284", "bus": 5, "loc": 0x6e}, + {"name": "wb_xdpe12284", "bus": 5, "loc": 0x70}, + # fanA + {"name": "wb_tmp275", "bus": 8, "loc": 0x48}, + {"name": "wb_tmp275", "bus": 8, "loc": 0x49}, + {"name": "wb_24c64", "bus": 40, "loc": 0x50}, + {"name": "wb_24c64", "bus": 41, "loc": 0x50}, + {"name": "wb_24c64", "bus": 42, "loc": 0x50}, + {"name": "wb_24c64", "bus": 43, "loc": 0x50}, + # fanB + {"name": "wb_tmp275", "bus": 9, "loc": 0x48}, + {"name": "wb_tmp275", "bus": 9, "loc": 0x49}, + {"name": "wb_24c64", "bus": 48, "loc": 0x50}, + {"name": "wb_24c64", "bus": 49, "loc": 0x50}, + {"name": "wb_24c64", "bus": 50, "loc": 0x50}, + {"name": "wb_24c64", "bus": 51, "loc": 0x50}, + # psu + {"name": "wb_24c02", "bus": 10, "loc": 0x50}, + {"name": "wb_fsp1200", "bus": 10, "loc": 0x58}, + {"name": "wb_24c02", "bus": 11, "loc": 0x50}, + {"name": "wb_fsp1200", "bus": 11, "loc": 0x58}, + # MCB + {"name": "wb_ina3221", "bus": 12, "loc": 0x40}, + {"name": "wb_ina3221", "bus": 12, "loc": 0x41}, + {"name": "wb_24c02", "bus": 12, "loc": 0x57}, + # SMB + {"name": "wb_tmp275", "bus": 14, "loc": 0x48}, + {"name": "wb_tmp275", "bus": 14, "loc": 0x49}, + {"name": "wb_tmp275", "bus": 14, "loc": 0x4b}, + {"name": "wb_ina3221", "bus": 56, "loc": 0x40}, + {"name": "wb_ina3221", "bus": 56, "loc": 0x41}, + {"name": "wb_ina3221", "bus": 57, "loc": 0x40}, + {"name": "wb_ina3221", "bus": 58, "loc": 0x40}, + {"name": "wb_ina3221", "bus": 59, "loc": 0x40}, + {"name": "wb_ina3221", "bus": 60, "loc": 0x40}, + {"name": "wb_ina3221", "bus": 61, "loc": 0x40}, + {"name": "wb_ina3221", "bus": 62, "loc": 0x40}, + {"name": "wb_ina3221", "bus": 63, "loc": 0x40}, + {"name": "wb_xdpe132g5c_pmbus", "bus": 64, "loc": 0x40}, + {"name": "wb_xdpe132g5c_pmbus", "bus": 65, "loc": 0x40}, + {"name": "wb_xdpe132g5c_pmbus", "bus": 66, "loc": 0x40}, + {"name": "wb_xdpe132g5c_pmbus", "bus": 69, "loc": 0x40}, + {"name": "wb_xdpe12284", "bus": 70, "loc": 0x68}, + {"name": "wb_xdpe12284", "bus": 71, "loc": 0x68}, + # fan DCDC + {"name": "wb_ina3221", "bus": 88, "loc": 0x42}, + {"name": "wb_ina3221", "bus": 89, "loc": 0x42}, + {"name": "wb_ina3221", "bus": 90, "loc": 0x42}, + # xdpe132g5c i2c + {"name": "wb_xdpe132g5c", "bus": 64, "loc": 0x10}, + {"name": "wb_xdpe132g5c", "bus": 65, "loc": 0x10}, + {"name": "wb_xdpe132g5c", "bus": 66, "loc": 0x10}, + {"name": "wb_xdpe132g5c", "bus": 69, "loc": 0x10}, +] + +OPTOE = [ + {"name": "wb_24c02", "startbus": 24, "endbus": 31}, +] + +REBOOT_CTRL_PARAM = {} + +INIT_PARAM_PRE = [ + # set ina3221 shunt_resistor + # SCM_VDD12.0_C + {"loc": "33-0041/hwmon/hwmon*/shunt1_resistor", "value": "1000"}, + # SCM_OCM_V12.0_C + {"loc": "33-0041/hwmon/hwmon*/shunt3_resistor", "value": "1000"}, + # MAC_PLL1_VDD0.9_C + {"loc": "56-0040/hwmon/hwmon*/shunt1_resistor", "value": "2000"}, + # MAC_PLL0_VDD0.9_C + {"loc": "56-0040/hwmon/hwmon*/shunt2_resistor", "value": "2000"}, + # MAC_PLL2_VDD0.9_C + {"loc": "58-0040/hwmon/hwmon*/shunt1_resistor", "value": "2000"}, + # MAC_PLL3_VDD0.9_C + {"loc": "58-0040/hwmon/hwmon*/shunt3_resistor", "value": "2000"}, + # FAN1_VDD12_C + {"loc": "88-0042/hwmon/hwmon*/shunt1_resistor", "value": "1000"}, + # FAN2_VDD12_C + {"loc": "88-0042/hwmon/hwmon*/shunt2_resistor", "value": "1000"}, + # FAN3_VDD12_C + {"loc": "88-0042/hwmon/hwmon*/shunt3_resistor", "value": "1000"}, + # FAN4_VDD12_C + {"loc": "89-0042/hwmon/hwmon*/shunt1_resistor", "value": "1000"}, + # FAN5_VDD12_C + {"loc": "89-0042/hwmon/hwmon*/shunt2_resistor", "value": "1000"}, + # FAN6_VDD12_C + {"loc": "89-0042/hwmon/hwmon*/shunt3_resistor", "value": "1000"}, + # FAN7_VDD12_C + {"loc": "90-0042/hwmon/hwmon*/shunt1_resistor", "value": "1000"}, + # FAN8_VDD12_C + {"loc": "90-0042/hwmon/hwmon*/shunt2_resistor", "value": "1000"}, + # set avs threshold + # MAC_CORE_V + {"loc": "64-0040/hwmon/hwmon*/avs0_vout_min", "value": "630000"}, + {"loc": "64-0040/hwmon/hwmon*/avs0_vout_max", "value": "858000"}, + # MAC_ANALOG0 V0.9_V + {"loc": "65-0040/hwmon/hwmon*/avs0_vout_min", "value": "810000"}, + {"loc": "65-0040/hwmon/hwmon*/avs0_vout_max", "value": "990000"}, + # MAC_ANALOG0 V0.75_V + {"loc": "65-0040/hwmon/hwmon*/avs1_vout_min", "value": "675000"}, + {"loc": "65-0040/hwmon/hwmon*/avs1_vout_max", "value": "825000"}, + # MAC_ANALOG1 V0.9_V + {"loc": "66-0040/hwmon/hwmon*/avs0_vout_min", "value": "810000"}, + {"loc": "66-0040/hwmon/hwmon*/avs0_vout_max", "value": "990000"}, + # MAC_ANALOG1 V0.75_V + {"loc": "66-0040/hwmon/hwmon*/avs1_vout_min", "value": "675000"}, + {"loc": "66-0040/hwmon/hwmon*/avs1_vout_max", "value": "825000"}, + # OE_AVDD_0.75_V + {"loc": "69-0040/hwmon/hwmon*/avs0_vout_min", "value": "675000"}, + {"loc": "69-0040/hwmon/hwmon*/avs0_vout_max", "value": "825000"}, + # OE_AVDD_1.2_V + {"loc": "69-0040/hwmon/hwmon*/avs1_vout_min", "value": "1080000"}, + {"loc": "69-0040/hwmon/hwmon*/avs1_vout_max", "value": "1320000"}, + # OE_AVDD_TX_1.8_V + {"loc": "70-0068/hwmon/hwmon*/avs0_vout_min", "value": "1620000"}, + {"loc": "70-0068/hwmon/hwmon*/avs0_vout_max", "value": "1980000"}, + # OE_AVDD_RX_1.8_V + {"loc": "70-0068/hwmon/hwmon*/avs1_vout_min", "value": "1620000"}, + {"loc": "70-0068/hwmon/hwmon*/avs1_vout_max", "value": "1980000"}, + # RLML_VDD V3.3_V *1.5 + {"loc": "71-0068/hwmon/hwmon*/avs0_vout_min", "value": "1980000"}, + {"loc": "71-0068/hwmon/hwmon*/avs0_vout_max", "value": "2420000"}, + # RLMH_VDD V3.3_V *1.5 + {"loc": "71-0068/hwmon/hwmon*/avs1_vout_min", "value": "1980000"}, + {"loc": "71-0068/hwmon/hwmon*/avs1_vout_max", "value": "2420000"}, + # OCM_XDPE_VCCIN_V + {"loc": "5-0070/hwmon/hwmon*/avs0_vout_min", "value": "1350000"}, + {"loc": "5-0070/hwmon/hwmon*/avs0_vout_max", "value": "2200000"}, + # OCM_XDPE_P1V8_V + {"loc": "5-0070/hwmon/hwmon*/avs1_vout_min", "value": "1690000"}, + {"loc": "5-0070/hwmon/hwmon*/avs1_vout_max", "value": "1910000"}, + # OCM_XDPE_P1V05_V + {"loc": "5-006e/hwmon/hwmon*/avs0_vout_min", "value": "954000"}, + {"loc": "5-006e/hwmon/hwmon*/avs0_vout_max", "value": "1160000"}, + # OCM_XDPE_VNN_PCH_V + {"loc": "5-006e/hwmon/hwmon*/avs1_vout_min", "value": "540000"}, + {"loc": "5-006e/hwmon/hwmon*/avs1_vout_max", "value": "1320000"}, + # OCM_XDPE_VNN_NAC_V + {"loc": "5-0068/hwmon/hwmon*/avs0_vout_min", "value": "540000"}, + {"loc": "5-0068/hwmon/hwmon*/avs0_vout_max", "value": "1320000"}, + # OCM_XDPE_VCC_ANA_V + {"loc": "5-0068/hwmon/hwmon*/avs1_vout_min", "value": "900000"}, + {"loc": "5-0068/hwmon/hwmon*/avs1_vout_max", "value": "1100000"}, + # OCM_XDPE_P1V2_VDDQ_V + {"loc": "5-005e/hwmon/hwmon*/avs0_vout_min", "value": "1120000"}, + {"loc": "5-005e/hwmon/hwmon*/avs0_vout_max", "value": "1280000"}, +] + +INIT_PARAM = [] + +INIT_COMMAND_PRE = [] + +INIT_COMMAND = [ + # enable fan watchdog + {"path": "/dev/cpld5", "offset": 0x22, "value": [0x01], "gettype": "devfile"}, + {"path": "/dev/cpld6", "offset": 0x22, "value": [0x01], "gettype": "devfile"}, +] + +UPGRADE_SUMMARY = { + "devtype": 0x40bd, + + "slot0": { + "subtype": 0, + "SPI-LOGIC-DEV": { + "chain1":{ + "name":"IOB_FPGA", + "is_support_warm_upg":0, + "init_cmd": [ + # firmware upgrade set sysled blue/amber alternate flashing + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x50, "value": [0x01]} + ] + }, + "chain2":{ + "name":"DOM_FPGA", + "is_support_warm_upg":0, + "init_cmd": [ + # firmware upgrade set sysled blue/amber alternate flashing + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x50, "value": [0x01]} + ] + }, + "chain3":{ + "name":"SCM_CPLD", + "is_support_warm_upg":0, + "init_cmd": [ + # firmware upgrade set sysled blue/amber alternate flashing + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x50, "value": [0x01]} + ] + }, + "chain4":{ + "name":"MCB_CPLD", + "is_support_warm_upg":0, + "init_cmd": [ + # firmware upgrade set sysled blue/amber alternate flashing + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x50, "value": [0x01]} + ] + }, + "chain5":{ + "name":"SMB_CPLD", + "is_support_warm_upg":0, + "init_cmd": [ + # firmware upgrade set sysled blue/amber alternate flashing + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x50, "value": [0x01]} + ] + }, + "chain6":{ + "name":"FCB_B_CPLD", + "is_support_warm_upg":0, + "init_cmd": [ + # firmware upgrade set sysled blue/amber alternate flashing + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x50, "value": [0x01]} + ] + }, + "chain7":{ + "name":"FCB_T_CPLD", + "is_support_warm_upg":0, + "init_cmd": [ + # firmware upgrade set sysled blue/amber alternate flashing + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x50, "value": [0x01]} + ] + }, + "chain8":{ + "name":"MAC_PCIe", + "is_support_warm_upg":0, + "init_cmd": [ + # firmware upgrade set sysled blue/amber alternate flashing + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x50, "value": [0x01]} + ] + }, + }, + + "TEST": { + "fpga": [ + {"chain": 1, "file": "/etc/.upgrade_test/0x40bd/iob_fpga_test_header.bin", "display_name": "IOB_FPGA"}, + {"chain": 2, "file": "/etc/.upgrade_test/0x40bd/dom_fpga_test_header.bin", "display_name": "DOM_FPGA"}, + ], + "cpld": [ + {"chain": 3, "file": "/etc/.upgrade_test/0x40bd/scm_cpld_spi_test_header.bin", "display_name": "SCM_CPLD_SPI"}, + {"chain": 4, "file": "/etc/.upgrade_test/0x40bd/mcb_cpld_spi_test_header.bin", "display_name": "MCB_CPLD_SPI"}, + {"chain": 5, "file": "/etc/.upgrade_test/0x40bd/smb_cpld_spi_test_header.bin", "display_name": "SMB_CPLD_SPI"}, + {"chain": 6, "file": "/etc/.upgrade_test/0x40bd/fcb_b_cpld_spi_test_header.bin", "display_name": "FCB_B_CPLD_SPI"}, + {"chain": 7, "file": "/etc/.upgrade_test/0x40bd/fcb_t_cpld_spi_test_header.bin", "display_name": "FCB_T_CPLD_SPI"}, + #{"chain": 8, "file": "/etc/.upgrade_test/0x40bd/mac_pcie_spi_test_header.bin", "display_name": "MAC_PCIe"}, + ], + }, + }, + + "BMC": { + "name": "BMC", + "init_cmd": [ + # firmware upgrade set sysled blue/amber alternate flashing + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x50, "value": [0x01]} + ], + "finish_cmd": [], + }, +} + +PLATFORM_E2_CONF = { + "fan": [ + {"name": "fan1", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/40-0050/eeprom"}, + {"name": "fan2", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/48-0050/eeprom"}, + {"name": "fan3", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/41-0050/eeprom"}, + {"name": "fan4", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/49-0050/eeprom"}, + {"name": "fan5", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/42-0050/eeprom"}, + {"name": "fan6", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/50-0050/eeprom"}, + {"name": "fan7", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/43-0050/eeprom"}, + {"name": "fan8", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/51-0050/eeprom"}, + ], + "psu": [ + {"name": "psu1", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/11-0050/eeprom"}, + {"name": "psu2", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/10-0050/eeprom"}, + ], + "syseeprom": [ + {"name": "syseeprom", "e2_type": "onie_tlv", "e2_path": "/sys/bus/i2c/devices/1-0056/eeprom"}, + ], + "scm": [ + {"name": "scm", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/32-0052/eeprom"}, + ], + "smb": [ + {"name": "smb", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/3-0051/eeprom"}, + ], + "chassis": [ + {"name": "chassis", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/2-0051/eeprom"}, + ], +} + +PLATFORM_POWER_CONF = [ + { + "name": "Input power total", + "unit": "W", + "children": [ + { + "name": "PSU1 input", + "pre_check": { + "loc": "/sys/s3ip/psu/psu1/present", + "gettype": "sysfs", "mask": 0x01, "okval": 1, + "not_ok_msg": "ABSENT" + }, + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/11-0058/hwmon/hwmon*/power1_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)/1000000)" + }, + { + "name": "PSU2 input", + "pre_check": { + "loc": "/sys/s3ip/psu/psu2/present", + "gettype": "sysfs", "mask": 0x01, "okval": 1, + "not_ok_msg": "ABSENT" + }, + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/10-0058/hwmon/hwmon*/power1_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)/1000000)" + }, + ] + }, + { + "name": "Output power total", + "unit": "W", + "children": [ + { + "name": "PSU1 output", + "pre_check": { + "loc": "/sys/s3ip/psu/psu1/present", + "gettype": "sysfs", "mask": 0x01, "okval": 1, + "not_ok_msg": "ABSENT" + }, + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/11-0058/hwmon/hwmon*/power2_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)/1000000)" + }, + { + "name": "PSU2 output", + "pre_check": { + "loc": "/sys/s3ip/psu/psu2/present", + "gettype": "sysfs", "mask": 0x01, "okval": 1, + "not_ok_msg": "ABSENT" + }, + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/10-0058/hwmon/hwmon*/power2_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)/1000000)" + }, + ] + }, + { + "name": "MAC power consumption", + "unit": "W", + "children": [ + { + "name": "MAC_CORE", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/64-0040/hwmon/hwmon*/power3_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*2/1000000)" + }, + { + "name": "MAC_ANALOG0 V0.9", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/65-0040/hwmon/hwmon*/power3_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)/1000000)" + }, + { + "name": "MAC_ANALOG0 V0.75", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/65-0040/hwmon/hwmon*/power4_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)/1000000)" + }, + { + "name": "MAC_ANALOG1 V0.9", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/66-0040/hwmon/hwmon*/power3_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)/1000000)" + }, + { + "name": "MAC_ANALOG1 V0.75", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/66-0040/hwmon/hwmon*/power4_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)/1000000)" + }, + { + "name": "MAC_PLL0_VDD0.9", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/56-0040/hwmon/hwmon*/in2_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/56-0040/hwmon/hwmon*/curr2_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "MAC_PLL1_VDD0.9", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/56-0040/hwmon/hwmon*/in1_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/56-0040/hwmon/hwmon*/curr1_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "MAC_PLL2_VDD0.9", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/58-0040/hwmon/hwmon*/in1_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/58-0040/hwmon/hwmon*/curr1_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "MAC_PLL3_VDD0.9", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/58-0040/hwmon/hwmon*/in3_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/58-0040/hwmon/hwmon*/curr3_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "MAC_VDD_0.8", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/58-0040/hwmon/hwmon*/in2_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/58-0040/hwmon/hwmon*/curr2_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "MAC_VDD_1.8", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/60-0040/hwmon/hwmon*/in1_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/60-0040/hwmon/hwmon*/curr1_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "MAC_VDD_1.5", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/60-0040/hwmon/hwmon*/in2_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/60-0040/hwmon/hwmon*/curr2_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "MAC_VDD_1.2", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/61-0040/hwmon/hwmon*/in1_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/61-0040/hwmon/hwmon*/curr1_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + } + ] + }, + + + { + "name": "CPO OE power consumption", + "unit": "W", + "children": [ + { + "name": "OE_AVDD_0.75", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/69-0040/hwmon/hwmon*/power3_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)/1000000)" + }, + { + "name": "OE_AVDD_1.2", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/69-0040/hwmon/hwmon*/power4_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)/1000000)" + }, + { + "name": "OE_AVDD_TX_1.8", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/70-0068/hwmon/hwmon*/power3_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)/1000000)" + }, + { + "name": "OE_AVDD_RX_1.8", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/70-0068/hwmon/hwmon*/power4_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)/1000000)" + }, + { + "name": "OE_HCSL_PLL_VDD0_0.75", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/56-0040/hwmon/hwmon*/in3_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/56-0040/hwmon/hwmon*/curr3_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "OE_HCSL_PLL_VDD1_0.75", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/57-0040/hwmon/hwmon*/in2_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/57-0040/hwmon/hwmon*/curr2_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "OE_AVDD_3.3", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/59-0040/hwmon/hwmon*/in1_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/59-0040/hwmon/hwmon*/curr1_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "OE_VDD_HCSL_PLL_1.8", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/59-0040/hwmon/hwmon*/in2_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/59-0040/hwmon/hwmon*/curr2_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "OE_VDD_1.8", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/60-0040/hwmon/hwmon*/in3_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/60-0040/hwmon/hwmon*/curr3_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + ] + }, + + { + "name": "RLM power consumption", + "unit": "W", + "children": [ + { + "name": "RLML_VDD V3.3", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/71-0068/hwmon/hwmon*/power3_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*1.5/1000000)" + }, + { + "name": "RLMH_VDD V3.3", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/71-0068/hwmon/hwmon*/power4_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*1.5/1000000)" + }, + ] + }, + { + "name": "CPU sub-module power consumption", + "unit": "W", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/33-0041/hwmon/hwmon*/in3_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/33-0041/hwmon/hwmon*/curr3_input", + "int_decode": 10, + } + ], + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "FAN power consumption total", + "unit": "W", + "children": [ + { + "name": "FAN1 power consumption", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/88-0042/hwmon/hwmon*/in1_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/88-0042/hwmon/hwmon*/curr1_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "FAN2 power consumption", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/89-0042/hwmon/hwmon*/in2_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/89-0042/hwmon/hwmon*/curr2_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "FAN3 power consumption", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/88-0042/hwmon/hwmon*/in2_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/88-0042/hwmon/hwmon*/curr2_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "FAN4 power consumption", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/89-0042/hwmon/hwmon*/in3_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/89-0042/hwmon/hwmon*/curr3_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "FAN5 power consumption", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/88-0042/hwmon/hwmon*/in3_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/88-0042/hwmon/hwmon*/curr3_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "FAN6 power consumption", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/90-0042/hwmon/hwmon*/in1_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/90-0042/hwmon/hwmon*/curr1_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "FAN7 power consumption", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/89-0042/hwmon/hwmon*/in1_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/89-0042/hwmon/hwmon*/curr1_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "FAN8 power consumption", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/90-0042/hwmon/hwmon*/in2_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/90-0042/hwmon/hwmon*/curr2_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + + ] + }, +] + +REBOOT_CAUSE_PARA = { + "reboot_cause_list": [ + { + "name": "otp_switch_reboot", + "monitor_point": {"gettype": "file_exist", "judge_file": "/etc/.otp_switch_reboot_flag", "okval": True}, + "record": [ + {"record_type": "file", "mode": "cover", "log": "Thermal Overload: ASIC, ", + "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"}, + {"record_type": "file", "mode": "add", "log": "Thermal Overload: ASIC, ", + "path": "/etc/sonic/.reboot/.history-reboot-cause.txt", "file_max_size": 1 * 1024 * 1024} + ], + "finish_operation": [ + {"gettype": "cmd", "cmd": "rm -rf /etc/.otp_switch_reboot_flag"}, + ] + }, + { + "name": "otp_other_reboot", + "monitor_point": {"gettype": "file_exist", "judge_file": "/etc/.otp_other_reboot_flag", "okval": True}, + "record": [ + {"record_type": "file", "mode": "cover", "log": "Thermal Overload: Other, ", + "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"}, + {"record_type": "file", "mode": "add", "log": "Thermal Overload: Other, ", + "path": "/etc/sonic/.reboot/.history-reboot-cause.txt", "file_max_size": 1 * 1024 * 1024} + ], + "finish_operation": [ + {"gettype": "cmd", "cmd": "rm -rf /etc/.otp_other_reboot_flag"}, + ] + }, + ], + "other_reboot_cause_record": [ + {"record_type": "file", "mode": "cover", "log": "Other, ", "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"}, + {"record_type": "file", "mode": "add", "log": "Other, ", "path": "/etc/sonic/.reboot/.history-reboot-cause.txt"} + ], +} + +SET_FW_MAC_CONF = [ + { + "name": "eth0", + "e2_name": "syseeprom", + "get_act_mac": {"cmd": "ethtool -e eth0 offset 0 length 6 |grep 0x0000 | awk -F':' '{gsub(/ /, \":\", $2);print $2}'| sed 's/^[[:space:]]*//' | sed 's/:\s*$//'", "gettype": "cmd_str"}, + "set_mac_cfg": { + "type": 1, + "cmd": {"cmd": "ethtool -E eth0 magic 0x15338086 offset %s value 0x%s length 1", "gettype": "cmd", "delay": 0.1}, + }, + "check_mac_cfg": {"cmd": "ethtool -e eth0 offset 0 length 6 |grep 0x0000 | awk -F':' '{gsub(/ /, \":\", $2);print $2}'| sed 's/^[[:space:]]*//' | sed 's/:\s*$//'", "gettype": "cmd_str"}, + } +] + +SET_MAC_CONF = SET_FW_MAC_CONF +PRODUCT_NAME_CONF = {} diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/config/x86_64_micas_m2_w6940_128x1_fr4_r0_port_config.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/config/x86_64_micas_m2_w6940_128x1_fr4_r0_port_config.py new file mode 100755 index 00000000000..99f69812df2 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/config/x86_64_micas_m2_w6940_128x1_fr4_r0_port_config.py @@ -0,0 +1,136 @@ +#!/usr/bin/python3 +# -*- coding: UTF-8 -*- + +PLATFORM_INTF_OPTOE = { + "port_num": 128, + "port_bus_map": { + 1 :24, + 2 :24, + 3 :24, + 4 :24, + 5 :24, + 6 :24, + 7 :24, + 8 :24, + 9 :24, + 10 :24, + 11 :24, + 12 :24, + 13 :24, + 14 :24, + 15 :24, + 16 :24, + 17 :25, + 18 :25, + 19 :25, + 20 :25, + 21 :25, + 22 :25, + 23 :25, + 24 :25, + 25 :25, + 26 :25, + 27 :25, + 28 :25, + 29 :25, + 30 :25, + 31 :25, + 32 :25, + 33 :26, + 34 :26, + 35 :26, + 36 :26, + 37 :26, + 38 :26, + 39 :26, + 40 :26, + 41 :26, + 42 :26, + 43 :26, + 44 :26, + 45 :26, + 46 :26, + 47 :26, + 48 :26, + 49 :27, + 50 :27, + 51 :27, + 52 :27, + 53 :27, + 54 :27, + 55 :27, + 56 :27, + 57 :27, + 58 :27, + 59 :27, + 60 :27, + 61 :27, + 62 :27, + 63 :27, + 64 :27, + 65 :28, + 66 :28, + 67 :28, + 68 :28, + 69 :28, + 70 :28, + 71 :28, + 72 :28, + 73 :28, + 74 :28, + 75 :28, + 76 :28, + 77 :28, + 78 :28, + 79 :28, + 80 :28, + 81 :29, + 82 :29, + 83 :29, + 84 :29, + 85 :29, + 86 :29, + 87 :29, + 88 :29, + 89 :29, + 90 :29, + 91 :29, + 92 :29, + 93 :29, + 94 :29, + 95 :29, + 96 :29, + 97 :30, + 98 :30, + 99 :30, + 100:30, + 101:30, + 102:30, + 103:30, + 104:30, + 105:30, + 106:30, + 107:30, + 108:30, + 109:30, + 110:30, + 111:30, + 112:30, + 113:31, + 114:31, + 115:31, + 116:31, + 117:31, + 118:31, + 119:31, + 120:31, + 121:31, + 122:31, + 123:31, + 124:31, + 125:31, + 126:31, + 127:31, + 128:31, + } +} diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/cpo/Makefile b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/cpo/Makefile new file mode 100755 index 00000000000..42e24f6b71a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/cpo/Makefile @@ -0,0 +1,16 @@ +PWD = $(shell pwd) +SUB_BUILD_DIR = $(PWD)/../build + +INSTALL_SCRIPT_DIR = $(SUB_BUILD_DIR)/usr/local/bin +INSTALL_LIB_DIR = $(SUB_BUILD_DIR)/usr/lib/python3/dist-packages +INSTALL_SERVICE_DIR = $(SUB_BUILD_DIR)/lib/systemd/system + +all: + @if [ ! -d ${INSTALL_SERVICE_DIR} ]; then mkdir -p ${INSTALL_SERVICE_DIR} ;fi + @if [ ! -d ${INSTALL_SCRIPT_DIR} ]; then mkdir -p ${INSTALL_SCRIPT_DIR} ;fi + @if [ ! -d ${INSTALL_LIB_DIR} ]; then mkdir -p ${INSTALL_LIB_DIR} ;fi + cp -r $(PWD)/service/* $(INSTALL_SERVICE_DIR) + cp -r $(PWD)/script/* $(INSTALL_SCRIPT_DIR) + cp -r $(PWD)/lib/* $(INSTALL_LIB_DIR) + cp -r $(PWD)/config/* $(INSTALL_SCRIPT_DIR) + @if [ -d ${INSTALL_SCRIPT_DIR} ]; then chmod +x ${INSTALL_SCRIPT_DIR}/*;fi \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/cpo/config/cpo_platform_config.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/cpo/config/cpo_platform_config.py new file mode 100755 index 00000000000..89a61c8aff1 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/cpo/config/cpo_platform_config.py @@ -0,0 +1,680 @@ +#!/usr/bin/python3 +import re + +__all__ = [ + "CPO_PLATFORM_CONFIG", + "CPO_PLATFORM_PORT_CONFIG", + "CPO_PLATFORM_MEDIA_SETTINGS", + "OE_NUM", + "OE_BANK_NUM", + "OE_RLM_NUM", + "OE_INDEX_LIST", + "RLM_INDEX_LIST", + "OE_BUS_MAP", + "OE_I2C_PATH_MAP", + "helper_logger", + "Port_Mapping", + "PORT_INDEX_LIST", + "BANK_LANE_NUM" +] + +debug_level = 1 + +CPO_PLATFORM_CONFIG = { + "oe_num": 8, + "oe_index_start_index": 0, + "port_index_start_index": 1, + "rlm_index_start_index": 0, + "oe_bank_num": 8, + "oe_rlm_num": 2, + "oe_index_list": list(range(0, 8)), + "rlm_index_list": list(range(0, 16)), + "oe_i2c_path_format": "/sys/bus/i2c/devices/{}-0050/eeprom", + "rlm_presence_fpga_dict": { + "/dev/fpga1": { + "offset": { + "0x64": [None]*8 + list(range(8)) + [None]*8 + list(range(8,16)) + } + } + }, + "oe_bus_map": { + 0: 24, + 1: 25, + 2: 26, + 3: 27, + 4: 28, + 5: 29, + 6: 30, + 7: 31 + }, + "rlm_oe_map": { + 0:0, 1:0, + 2:1, 3:1, + 4:2, 5:2, + 6:3, 7:3, + 8:4, 9:4, + 10:5, 11:5, + 12:6, 13:6, + 14:7, 15:7 + }, + "bank_oe_map": { + 0:0, 1:0, 2:0, 3:0, 4:0, 5:0, 6:0, 7:0, + 8:1, 9:1, 10:1, 11:1, 12:1, 13:1, 14:1, 15:1, + 16:2, 17:2, 18:2, 19:2, 20:2, 21:2, 22:2, 23:2, + 24:3, 25:3, 26:3, 27:3, 28:3, 29:3, 30:3, 31:3, + 32:4, 33:4, 34:4, 35:4, 36:4, 37:4, 38:4, 39:4, + 40:5, 41:5, 42:5, 43:5, 44:5, 45:5, 46:5, 47:5, + 48:6, 49:6, 50:6, 51:6, 52:6, 53:6, 54:6, 55:6, + 56:7, 57:7, 58:7, 59:7, 60:7, 61:7, 62:7, 63:7 + }, + "port_bank_map": { + 1:0, 3:1, 2:0, 4:1, 5:2, 7:3, 6:2, 8:3, 9:4, 10:4, 11:5, 12:5, 13:6, 14:6, 15:7, 16:7, + 17:8, 18:8, 19:9, 20:9, 21:10, 22:10, 23:11, 24:11, 25:12, 26:12, 27:13, 28:13, 29:14, 30:14, 31:15, 32:15, + 33:16, 34:16, 35:17, 36:17, 37:18, 38:18, 39:19, 40:19, 41:20, 42:20, 43:21, 44:21, 45:22, 46:22, 47:23, 48:23, + 49:24, 50:24, 51:25, 52:25, 53:26, 54:26, 55:27, 56:27, 57:28, 59:29, 58:28, 60:29, 61:30, 63:31, 62:30, 64:31, + 65:32, 67:33, 66:32, 68:33, 69:34, 71:35, 70:34, 72:35, 73:36, 74:36, 75:37, 76:37, 77:38, 78:38, 79:39, 80:39, + 81:40, 82:40, 83:41, 84:41, 85:42, 86:42, 87:43, 88:43, 89:44, 90:44, 91:45, 92:45, 93:46, 94:46, 95:47, 96:47, + 97:48, 98:48, 99:49, 100:49, 101:50, 102:50, 103:51, 104:51, 105:52, 106:52, 107:53, 108:53, 109:54, 110:54, 111:55, 112:55, + 113:56, 114:56, 115:57, 116:57, 117:58, 118:58, 119:59, 120:59, 121:60, 123:61, 122:60, 124:61, 125:62, 127:63, 126:62, 128:63 + }, + "port_lanemap": { + 1:0xf, 3:0xf, 2:0xf0, 4:0xf0, 5:0xf, 7:0xf, 6:0xf0, 8:0xf0, 9:0xf, 10:0xf0, 11:0xf, 12:0xf0, 13:0xf, 14:0xf0, 15:0xf, 16:0xf0, + 17:0xf, 18:0xf0, 19:0xf, 20:0xf0, 21:0xf, 22:0xf0, 23:0xf, 24:0xf0, 25:0xf, 26:0xf0, 27:0xf, 28:0xf0, 29:0xf, 30:0xf0, 31:0xf, 32:0xf0, + 33:0xf, 34:0xf0, 35:0xf, 36:0xf0, 37:0xf, 38:0xf0, 39:0xf, 40:0xf0, 41:0xf, 42:0xf0, 43:0xf, 44:0xf0, 45:0xf, 46:0xf0, 47:0xf, 48:0xf0, + 49:0xf, 50:0xf0, 51:0xf, 52:0xf0, 53:0xf, 54:0xf0, 55:0xf, 56:0xf0, 57:0xf, 59:0xf, 58:0xf0, 60:0xf0, 61:0xf, 63:0xf, 62:0xf0, 64:0xf0, + 65:0xf, 67:0xf, 66:0xf0, 68:0xf0, 69:0xf, 71:0xf, 70:0xf0, 72:0xf0, 73:0xf, 74:0xf0, 75:0xf, 76:0xf0, 77:0xf, 78:0xf0, 79:0xf, 80:0xf0, + 81:0xf, 82:0xf0, 83:0xf, 84:0xf0, 85:0xf, 86:0xf0, 87:0xf, 88:0xf0, 89:0xf, 90:0xf0, 91:0xf, 92:0xf0, 93:0xf, 94:0xf0, 95:0xf, 96:0xf0, + 97:0xf, 98:0xf0, 99:0xf, 100:0xf0, 101:0xf, 102:0xf0, 103:0xf, 104:0xf0, 105:0xf, 106:0xf0, 107:0xf, 108:0xf0, 109:0xf, 110:0xf0, 111:0xf, 112:0xf0, + 113:0xf, 114:0xf0, 115:0xf, 116:0xf0, 117:0xf, 118:0xf0, 119:0xf, 120:0xf0, 121:0xf, 123:0xf, 122:0xf0, 124:0xf0, 125:0xf, 127:0xf, 126:0xf0, 128:0xf0 + }, + "port_rlm_map": { + 1:0, 3:0, 2:0, 4:0, 5:0, 7:0, 6:0, 8:0, 9:1, 10:1, 11:1, 12:1, 13:1, 14:1, 15:1, 16:1, + 17:2, 18:2, 19:2, 20:2, 21:2, 22:2, 23:2, 24:2, 25:3, 26:3, 27:3, 28:3, 29:3, 30:3, 31:3, 32:3, + 33:4, 34:4, 35:4, 36:4, 37:4, 38:4, 39:4, 40:4, 41:5, 42:5, 43:5, 44:5, 45:5, 46:5, 47:5, 48:5, + 49:6, 50:6, 51:6, 52:6, 53:6, 54:6, 55:6, 56:6, 57:7, 59:7, 58:7, 60:7, 61:7, 63:7, 62:7, 64:7, + 65:8, 67:8, 66:8, 68:8, 69:8, 71:8, 70:8, 72:8, 73:9, 74:9, 75:9, 76:9, 77:9, 78:9, 79:9, 80:9, + 81:10, 82:10, 83:10, 84:10, 85:10, 86:10, 87:10, 88:10, 89:11, 90:11, 91:11, 92:11, 93:11, 94:11, 95:11, 96:11, + 97:12, 98:12, 99:12, 100:12, 101:12, 102:12, 103:12, 104:12, 105:13, 106:13, 107:13, 108:13, 109:13, 110:13, 111:13, 112:13, + 113:14, 114:14, 115:14, 116:14, 117:14, 118:14, 119:14, 120:14, 121:15, 123:15, 122:15, 124:15, 125:15, 127:15, 126:15, 128:15 + }, + "port_sdk_map": { + 1:1, 2:2, 3:3, 4:4, 5:11, 6:12, 7:13, 8:14, 9:22, 10:23, 11:24, 12:25, 13:33, 14:34, 15:35, 16:36, + 17:44, 18:45, 19:46, 20:47, 21:55, 22:56, 23:57, 24:58, 25:66, 26:67, 27:68, 28:69, 29:77, 30:78, 31:79, 32:80, + 33:88, 34:89, 35:90, 36:91, 37:99, 38:100, 39:101, 40:102, 41:110, 42:111, 43:112, 44:113, 45:121, 46:122, 47:123, 48:124, + 49:132, 50:133, 51:134, 52:135, 53:143, 54:144, 55:145, 56:146, 57:154, 58:155, 59:156, 60:157, 61:165, 62:166, 63:167, 64:168, + 65:176, 66:177, 67:178, 68:179, 69:187, 70:188, 71:189, 72:190, 73:198, 74:199, 75:200, 76:201, 77:209, 78:210, 79:211, 80:212, + 81:220, 82:221, 83:222, 84:223, 85:231, 86:232, 87:233, 88:234, 89:242, 90:243, 91:244, 92:245, 93:253, 94:254, 95:255, 96:256, + 97:264, 98:265, 99:266, 100:267, 101:275, 102:276, 103:277, 104:278, 105:286, 106:287, 107:288, 108:289, 109:297, 110:298, 111:299, 112:300, + 113:308, 114:309, 115:310, 116:311, 117:319, 118:320, 119:321, 120:322, 121:330, 122:331, 123:332, 124:333, 125:341, 126:342, 127:343, 128:344 + }, + "port_bank_map_800G": { + 1:0, 2:1, 3:2, 4:3, 5:4, 6:5, 7:6, 8:7, 9:8, 10:9, 11:10, 12:11, 13:12, 14:13, 15:14, 16:15, + 17:16, 18:17, 19:18, 20:19, 21:20, 22:21, 23:22, 24:23, 25:24, 26:25, 27:26, 28:27, 29:28, 30:29, 31:30, 32:31, + 33:32, 34:33, 35:34, 36:35, 37:36, 38:37, 39:38, 40:39, 41:40, 42:41, 43:42, 44:43, 45:44, 46:45, 47:46, 48:47, + 49:48, 50:49, 51:50, 52:51, 53:52, 54:53, 55:54, 56:55, 57:56, 58:57, 59:58, 60:59, 61:60, 62:61, 63:62, 64:63 + }, + "port_lanemap_800G": { + 1:0xff, 3:0xff, 2:0xff, 4:0xff, 5:0xff, 7:0xff, 6:0xff, 8:0xff, 9:0xff, 10:0xff, 11:0xff, 12:0xff, 13:0xff, 14:0xff, 15:0xff, 16:0xff, + 17:0xff, 18:0xff, 19:0xff, 20:0xff, 21:0xff, 22:0xff, 23:0xff, 24:0xff, 25:0xff, 26:0xff, 27:0xff, 28:0xff, 29:0xff, 30:0xff, 31:0xff, 32:0xff, + 33:0xff, 34:0xff, 35:0xff, 36:0xff, 37:0xff, 38:0xff, 39:0xff, 40:0xff, 41:0xff, 42:0xff, 43:0xff, 44:0xff, 45:0xff, 46:0xff, 47:0xff, 48:0xff, + 49:0xff, 50:0xff, 51:0xff, 52:0xff, 53:0xff, 54:0xff, 55:0xff, 56:0xff, 57:0xff, 59:0xff, 58:0xff, 60:0xff, 61:0xff, 63:0xff, 62:0xff, 64:0xff + }, + "port_rlm_map_800G": { + 1:0, 3:0, 2:0, 4:0, 5:1, 7:1, 6:1, 8:1, 9:2, 10:2, 11:2, 12:2, 13:3, 14:3, 15:3, 16:3, + 17:4, 18:4, 19:4, 20:4, 21:5, 22:5, 23:5, 24:5, 25:6, 26:6, 27:6, 28:6, 29:7, 30:7, 31:7, 32:7, + 33:8, 34:8, 35:8, 36:8, 37:9, 38:9, 39:9, 40:9, 41:10, 42:10, 43:10, 44:10, 45:11, 46:11, 47:11, 48:11, + 49:12, 50:12, 51:12, 52:12, 53:13, 54:13, 55:13, 56:13, 57:14, 59:14, 58:14, 60:14, 61:15, 63:15, 62:15, 64:15 + }, + "port_sdk_map_800G": { + 1:1, 2:2, 3:11, 4:12, 5:22, 6:23, 7:33, 8:34, 9:44, 10:45, 11:55, 12:56, 13:66, 14:67, 15:77, 16:78, + 17:88, 18:89, 19:99, 20:100, 21:110, 22:111, 23:121, 24:122, 25:132, 26:133, 27:143, 28:144, 29:154, 30:155, 31:165, 32:166, + 33:176, 34:177, 35:187, 36:188, 37:198, 38:199, 39:209, 40:210, 41:220, 42:221, 43:231, 44:232, 45:242, 46:243, 47:253, 48:254, + 49:264, 50:265, 51:275, 52:276, 53:286, 54:287, 55:297, 56:298, 57:308, 58:309, 59:319, 60:320, 61:330, 62:331, 63:341, 64:342 + } +} +CPO_PLATFORM_PORT_CONFIG = { + "M2-W6940-64X1-FR4": { + "1-64": { + "admin": "down", + "speed": 800000, + "lane": 8 + } + }, + "M2-W6940-128X1-FR4": { + "1-128": { + "admin": "down", + "speed": 400000, + "lane": 4 + } + }, + "M2-W6940-128X1-FR4-200G": { + "1-128": { + "admin": "down", + "speed": 200000, + "lane": 4 + } + }, + "M2-W6940-128X1-FR4-100G": { + "1-128": { + "admin": "down", + "speed": 100000, + "lane": 4 + } + } +} +CPO_PLATFORM_MEDIA_SETTINGS = { + "GLOBAL_MEDIA_SETTINGS": { + "1-128": { + "Default": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "pre2": { + "lane0": "0x00000001", + "lane1": "0x00000001", + "lane2": "0x00000001", + "lane3": "0x00000001" + }, + "pre1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8" + }, + "main": { + "lane0": "0x00000050", + "lane1": "0x00000050", + "lane2": "0x00000050", + "lane3": "0x00000050" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc" + }, + "post2": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + }, + "800000-8lane": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre2": { + "lane0": "0x00000001", + "lane1": "0x00000001", + "lane2": "0x00000001", + "lane3": "0x00000001", + "lane4": "0x00000001", + "lane5": "0x00000001", + "lane6": "0x00000001", + "lane7": "0x00000001" + }, + "pre1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "main": { + "lane0": "0x00000050", + "lane1": "0x00000050", + "lane2": "0x00000050", + "lane3": "0x00000050", + "lane4": "0x00000050", + "lane5": "0x00000050", + "lane6": "0x00000050", + "lane7": "0x00000050" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post2": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xffffffff" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + }, + "400000-4lane": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "pre2": { + "lane0": "0x00000001", + "lane1": "0x00000001", + "lane2": "0x00000001", + "lane3": "0x00000001" + }, + "pre1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8" + }, + "main": { + "lane0": "0x00000050", + "lane1": "0x00000050", + "lane2": "0x00000050", + "lane3": "0x00000050" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc" + }, + "post2": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + }, + "200000-4lane": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "pre1": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe" + }, + "main": { + "lane0": "0x0000004B", + "lane1": "0x0000004B", + "lane2": "0x0000004B", + "lane3": "0x0000004B" + }, + "post1": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + }, + "100000-4lane": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "pre1": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe" + }, + "main": { + "lane0": "0x0000004B", + "lane1": "0x0000004B", + "lane2": "0x0000004B", + "lane3": "0x0000004B" + }, + "post1": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + } + } +} + +default_sku_path="/usr/share/sonic/device/x86_64-micas_m2-w6940-128x1-fr4-r0/default_sku" +with open(default_sku_path, 'r', encoding='utf-8') as file: + sku_content = file.read().strip() + sku_match = re.search(r"M2-W6940-\d+X1-FR4", sku_content) + if sku_match: + default_sku = sku_match.group(0) + else: + default_sku = "M2-W6940-128X1-FR4" + +OE_NUM = CPO_PLATFORM_CONFIG.get("oe_num", 0) +OE_BANK_NUM = CPO_PLATFORM_CONFIG.get("oe_bank_num", 0) +OE_RLM_NUM = CPO_PLATFORM_CONFIG.get("oe_rlm_num", 0) +OE_INDEX_LIST = CPO_PLATFORM_CONFIG.get("oe_index_list", []) +RLM_INDEX_LIST = CPO_PLATFORM_CONFIG.get("rlm_index_list", []) +OE_BUS_MAP = CPO_PLATFORM_CONFIG.get("oe_bus_map", {}) +OE_I2C_PATH_FORMAT = CPO_PLATFORM_CONFIG.get("oe_i2c_path_format", "{}") +OE_I2C_PATH_MAP = dict.fromkeys(OE_INDEX_LIST) + +if default_sku == "M2-W6940-64X1-FR4": + PORT_INDEX_LIST = list(CPO_PLATFORM_CONFIG.get("port_bank_map_800G").keys()) +else: + PORT_INDEX_LIST = list(CPO_PLATFORM_CONFIG.get("port_bank_map").keys()) + +PORT_INDEX_LIST.sort() +BANK_LANE_NUM = 8 +for key in OE_I2C_PATH_MAP.keys(): + OE_I2C_PATH_MAP[key] = OE_I2C_PATH_FORMAT.format(OE_BUS_MAP[key]) + +import logging +from logging.handlers import RotatingFileHandler +logging.basicConfig(level=logging.DEBUG) +handler = RotatingFileHandler('/var/log/cpo_daemon_process.log', maxBytes=1024*1024*10, backupCount=5) +handler.setLevel(logging.DEBUG) +formatter = logging.Formatter('%(asctime)s - %(levelname)s - %(message)s') +handler.setFormatter(formatter) +logging.getLogger('').addHandler(handler) + +class helper_logger(): + def __init__(self) -> None: + pass + + @staticmethod + def log_error(message): + global debug_level + if (debug_level <= 5): + logging.error(message) + @staticmethod + def log_warn(message): + global debug_level + if (debug_level <= 4): + logging.warning(message) + @staticmethod + def log_notice(message): + global debug_level + if (debug_level <= 3): + logging.info(message) + @staticmethod + def log_info(message): + global debug_level + if (debug_level <= 2): + logging.info(message) + @staticmethod + def log_debug(message): + global debug_level + if (debug_level <= 1): + logging.debug(message) + @staticmethod + def log_trace(message): + global debug_level + if (debug_level <= 0): + logging.debug(message) + +def parse_port_range(input): + result = list() + if input.find(",") >= 0: + input_split = input.split(",") + for item in input_split: + result.extend(parse_port_range(item)) + elif input.find("-") >= 0: + input_split = input.split("-") + port_start = int(input_split[0]) + port_end = int(input_split[-1]) + 1 + result.extend(list(range(port_start, port_end))) + else: + result.append(int(input)) + return result + +def take_port_number(item): + # use first number + if isinstance(item, str): + return int(re.search("\d+", item).group()) + else: + return item + +class Port_Mapping(): + def __init__(self) -> None: + self.port_config_dict = dict() + def rlm_global_index_to_local_index(self, global_index): + oe_index = self.rlm_index_to_oe_index(global_index) + rlm_list = self.oe_index_to_rlm_index_list(oe_index) + return rlm_list.index(global_index) + def rlm_index_to_oe_index(self, rlm_index): + for _rlm_index, oe_index in CPO_PLATFORM_CONFIG.get("rlm_oe_map").items(): + if _rlm_index != rlm_index: + continue + return oe_index + def oe_index_to_rlm_index_list(self, oe_index): + rlm_list = list() + rlm_oe_map = CPO_PLATFORM_CONFIG.get("rlm_oe_map") + for rlm_index, _oe_index in rlm_oe_map.items(): + if _oe_index != oe_index: + continue + rlm_list.append(rlm_index) + return list(rlm_list) + def port_index_to_rlm_index(self, port_index): + if default_sku == "M2-W6940-64X1-FR4": + port_rlm_map = CPO_PLATFORM_CONFIG.get("port_rlm_map_800G") + else: + port_rlm_map = CPO_PLATFORM_CONFIG.get("port_rlm_map") + return port_rlm_map.get(port_index) + def bank_global_index_to_local_index(self, global_index): + oe_index = self.bank_index_to_oe_index(global_index) + bank_list = self.oe_index_to_bank_index_list(oe_index) + return bank_list.index(global_index) + def port_index_to_oe_index(self, port_index): + bank_index = self.port_index_to_bank_index(port_index) + return self.bank_index_to_oe_index(bank_index) + def port_index_to_bank_index(self, port_index): + if default_sku == "M2-W6940-64X1-FR4": + port_bank_map = CPO_PLATFORM_CONFIG.get("port_bank_map_800G") + else: + port_bank_map = CPO_PLATFORM_CONFIG.get("port_bank_map") + return port_bank_map.get(port_index) + def port_index_to_sdk_index(self, port_index): + if default_sku == "M2-W6940-64X1-FR4": + port_sdk_map = CPO_PLATFORM_CONFIG.get("port_sdk_map_800G") + else: + port_sdk_map = CPO_PLATFORM_CONFIG.get("port_sdk_map") + return port_sdk_map.get(port_index) + def oe_index_to_port_index_list(self, oe_index): + port_list = list() + bank_list = self.oe_index_to_bank_index_list(oe_index) + for bank_index in bank_list: + port_list.extend(self.bank_index_to_port_index_list(bank_index)) + return port_list + def bank_index_to_port_index_list(self, bank_index): + port_list = list() + if default_sku == "M2-W6940-64X1-FR4": + port_bank_map = CPO_PLATFORM_CONFIG.get("port_bank_map_800G") + else: + port_bank_map = CPO_PLATFORM_CONFIG.get("port_bank_map") + for port_index, _bank_index in port_bank_map.items(): + if _bank_index != bank_index: + continue + port_list.append(port_index) + return list(port_list) + def oe_index_to_bank_index_list(self, oe_index): + bank_list = list() + bank_oe_map = CPO_PLATFORM_CONFIG.get("bank_oe_map") + for bank_index, _oe_index in bank_oe_map.items(): + if _oe_index != oe_index: + continue + bank_list.append(bank_index) + return list(bank_list) + def bank_index_to_oe_index(self, bank_index): + bank_oe_map = CPO_PLATFORM_CONFIG.get("bank_oe_map") + return bank_oe_map.get(bank_index) + def port_config_init(self, hw_sku): + # for factest mode + port_config = CPO_PLATFORM_PORT_CONFIG.get(hw_sku, None) + if port_config == None: + return + for ports, values in port_config.items(): + port_index_list = parse_port_range(ports) + for port_index in port_index_list: + self.set_port(port_index, "Ethernet{}".format(port_index), values.get("speed", None), values.get("lane", None), values.get("admin", None)) + def get_port_lane_list(self, port_index): + if default_sku == "M2-W6940-64X1-FR4": + lanemap_dict = CPO_PLATFORM_CONFIG.get("port_lanemap_800G", None) + else: + lanemap_dict = CPO_PLATFORM_CONFIG.get("port_lanemap", None) + if lanemap_dict == None: + return [] + port_lanemap = lanemap_dict.get(port_index, None) + if port_lanemap == None: + return [] + lane_list = list() + for lane_index in range(8): + if 1<>> {}".format(physical_port, old_speed, speed)) + logical_port_dict["speed"] = speed + notify_media_setting = True + if lane and old_lane != lane: + helper_logger.log_debug("port_config update, port_index: {}, lane_change: {} --->>> {}".format(physical_port, old_lane, lane)) + logical_port_dict["lane"] = lane + notify_media_setting = True + if admin and old_admin != admin: + helper_logger.log_debug("port_config update, port_index: {}, admin_change: {} --->>> {}".format(physical_port, old_admin, admin)) + logical_port_dict["admin"] = admin + physical_port_dict[logical_port] = logical_port_dict + if logical_port_dict: + helper_logger.log_debug("port_config_need_update, port_index: {}, {} {}".format(physical_port, logical_port, physical_port_dict[logical_port])) + self.port_config_dict[physical_port] = physical_port_dict + return notify_media_setting + def del_port(self, physical_port, logical_port): + physical_port_dict = self.port_config_dict.get(physical_port, dict()) + try: + physical_port_dict.pop(logical_port) + except: + pass + self.port_config_dict[physical_port] = physical_port_dict + def get_logical_to_physical(self, logical_port): + for physical_port, physical_port_dict in self.port_config_dict.items(): + if logical_port in physical_port_dict.keys(): + return physical_port + return None + def get_physical_to_logical(self, physical_port): + physical_port_dict = self.port_config_dict.get(physical_port, dict()) + logical_port_list = list(physical_port_dict.keys()) + logical_port_list.sort(key=take_port_number) + return logical_port_list + def get_physical_port_media_key(self, physical_port): + try: + total_speed = 0 + total_lane = 0 + for logical_port_dict in self.port_config_dict.get(physical_port).values(): + total_speed += logical_port_dict["speed"] + total_lane += logical_port_dict["lane"] + return "{}-{}lane".format(total_speed, total_lane) + except Exception as e: + helper_logger.log_error("physical_port{} get_physical_port_media_key error: {}".format(physical_port, str(e))) + return None diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/cpo/lib/cmis_memory_map.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/cpo/lib/cmis_memory_map.py new file mode 100644 index 00000000000..17bd8b52cf3 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/cpo/lib/cmis_memory_map.py @@ -0,0 +1,847 @@ +import binascii +import copy +import math +import re + +def lane_bitval_mask_gen(key, bitvalue_map=None): + output = dict() + for offset in range(1): + for bit in range(8): + output["lane{:02d}{}".format(bit+offset*8, key)] = { + "offset": offset, + "bit": bit, + "outtype": 'str', + "type": 'bitvalue', + "bitvalue_map": bitvalue_map + } + return output + +def laser_mask_gen(key, bitvalue_map=None): + output = dict() + for offset in range(1): + for bit in range(8): + output["Laser{:02d}{}".format(bit+offset*8, key)] = { + "offset": offset, + "bit": bit, + "outtype": 'str', + "type": 'bitvalue', + "bitvalue_map": bitvalue_map + } + return output + +data_path_init_control_masks = lane_bitval_mask_gen("", ["Initialize", "De-initializ"]) +tx_ouput_disable_control_masks = lane_bitval_mask_gen("", ["Tx output enable", "Tx output disabled"]) +laser_power_control_masks = laser_mask_gen("", ["half-power", "full-power"]) +apply_datapath_init_control_masks = lane_bitval_mask_gen("", ["Not Apply", "Apply"]) + +default_sku_path="/usr/share/sonic/device/x86_64-micas_m2-w6940-128x1-fr4-r0/default_sku" +with open(default_sku_path, 'r', encoding='utf-8') as file: + sku_content = file.read().strip() + sku_match = re.search(r"M2-W6940-\d+X1-FR4", sku_content) + if sku_match: + default_sku = sku_match.group(0) + else: + default_sku = "M2-W6940-128X1-FR4" + +if default_sku == "M2-W6940-64X1-FR4": + apsel_code_num = { + '10': 800000, + '20': 200000, + '40': 100000 + } +else: + apsel_code_num = { + '10': 400000, + '20': 200000, + '40': 100000 + } + +def apsel_mask_gen(): + output = dict() + for lane_index in range(8): + output["lane{:02d}".format(lane_index)] = { + "offset": lane_index, + "outtype": 'int', + "type": 'enum', + 'bitmask': 0xf0, + 'decode': apsel_code_num + } + return output +lane_apsel_code_masks = apsel_mask_gen() + +def mw_to_dbm(mW): + if mW == 0: + return float("-inf") + elif mW < 0: + return float("NaN") + return 10. * math.log10(mW) + +def calc_power(eeprom_data, offset, size): + increments = 0.1 # μW + PmW = (int(eeprom_data[offset], 16) * 256 + int(eeprom_data[offset + 1], 16)) / (1000./increments) + return '%.03fdBm' % (mw_to_dbm(PmW)) + +def calc_bias(eeprom_data, offset, size): + retval = 'N/A' + try: + msb = int(eeprom_data[offset], 16) + lsb = int(eeprom_data[offset+1], 16) + result = (msb << 8) | (lsb & 0xff) + + result = float(result * 0.002 * 2) # increments 2μA + retval = "%.4f%s" % (result, "mA") + except Exception as err: + print("calc_power err %s" % str(err)) + return retval + +def lane_code_mask_gen_func(func): + output = dict() + for lane_index in range(8): + output["lane{:02d}".format(lane_index)] = { + "offset": lane_index*2, + "outtype": 'str', + "type": 'func', + "size": 2, + 'decode': { + 'func': func + } + } + return output + + +def lane_code_mask_gen_enum(enum, size=1): + output = dict() + for lane_index in range(8): + output["lane{:02d}".format(lane_index)] = { + "offset": lane_index*size, + "outtype": 'str', + "type": 'enum', + "size": size, + 'decode': enum + } + return output + +def lane_code_mask_gen_bitvalue(key, bitvalue_map=None): + output = dict() + for offset in range(1): + for bit in range(8): + output["lane{:02d}{}".format(bit+offset*8, key)] = { + "offset": offset, + "bit": bit, + "outtype": 'str', + "type": 'bitvalue', + "bitvalue_map": bitvalue_map + } + return output + +# lane_power_code_items = lane_power_code_mask_gen() +lane_dom_code_items = { + "Rx output status": { + 'offset': 0, + 'size': 1, + 'outtype': 'dict', + 'type': 'nested', + 'decode': lane_code_mask_gen_bitvalue('', ["output signal invalid or muted", "output signal valid"]) + }, + "Tx output status": { + 'offset': 1, + 'size': 1, + 'outtype': 'dict', + 'type': 'nested', + 'decode': lane_code_mask_gen_bitvalue('', ["output signal invalid or muted", "output signal valid"]) + }, + "L-Lane Data Path State Changed Flag": { + 'offset': 2, + 'size': 1, + 'outtype': 'dict', + 'type': 'nested', + 'decode': lane_code_mask_gen_bitvalue('', ["No flag", "Flag latched"]) + }, + "Tx Fault": { + 'offset': 3, + 'size': 1, + 'outtype': 'dict', + 'type': 'nested', + 'decode': lane_code_mask_gen_bitvalue('', ["No flag", "Flag latched"]) + }, + "Tx LOS": { + 'offset': 4, + 'size': 1, + 'outtype': 'dict', + 'type': 'nested', + 'decode': lane_code_mask_gen_bitvalue('', ["No flag", "Flag latched"]) + }, + # "L-Tx CDR LOL Flag. Not supported" + # "L-Tx Adaptive input EQ fault flag. Not supported" + "Tx Power High Alarm": { + 'offset': 7, + 'size': 1, + 'outtype': 'dict', + 'type': 'nested', + 'decode': lane_code_mask_gen_bitvalue('', ["No flag", "Flag latched"]) + }, + "Tx Power Low Alarm": { + 'offset': 8, + 'size': 1, + 'outtype': 'dict', + 'type': 'nested', + 'decode': lane_code_mask_gen_bitvalue('', ["No flag", "Flag latched"]) + }, + "Tx Power High Warning": { + 'offset': 9, + 'size': 1, + 'outtype': 'dict', + 'type': 'nested', + 'decode': lane_code_mask_gen_bitvalue('', ["No flag", "Flag latched"]) + }, + "Tx Power Low Warning": { + 'offset': 10, + 'size': 1, + 'outtype': 'dict', + 'type': 'nested', + 'decode': lane_code_mask_gen_bitvalue('', ["No flag", "Flag latched"]) + }, + "Tx Bias High Alarm": { + 'offset': 11, + 'size': 1, + 'outtype': 'dict', + 'type': 'nested', + 'decode': lane_code_mask_gen_bitvalue('', ["No flag", "Flag latched"]) + }, + "Tx Bias Low Alarm": { + 'offset': 12, + 'size': 1, + 'outtype': 'dict', + 'type': 'nested', + 'decode': lane_code_mask_gen_bitvalue('', ["No flag", "Flag latched"]) + }, + "Tx Bias High Warning": { + 'offset': 13, + 'size': 1, + 'outtype': 'dict', + 'type': 'nested', + 'decode': lane_code_mask_gen_bitvalue('', ["No flag", "Flag latched"]) + }, + "Tx Bias Low Warning": { + 'offset': 14, + 'size': 1, + 'outtype': 'dict', + 'type': 'nested', + 'decode': lane_code_mask_gen_bitvalue('', ["No flag", "Flag latched"]) + }, + "Rx LOS": { + 'offset': 15, + 'size': 1, + 'outtype': 'dict', + 'type': 'nested', + 'decode': lane_code_mask_gen_bitvalue('', ["No flag", "Flag latched"]) + }, + # "CDR LOL flag, Not supported" + "Rx Power High Alarm": { + 'offset': 17, + 'size': 1, + 'outtype': 'dict', + 'type': 'nested', + 'decode': lane_code_mask_gen_bitvalue('', ["No flag", "Flag latched"]) + }, + "Rx Power Low Alarm": { + 'offset': 18, + 'size': 1, + 'outtype': 'dict', + 'type': 'nested', + 'decode': lane_code_mask_gen_bitvalue('', ["No flag", "Flag latched"]) + }, + "Rx Power High Warning": { + 'offset': 19, + 'size': 1, + 'outtype': 'dict', + 'type': 'nested', + 'decode': lane_code_mask_gen_bitvalue('', ["No flag", "Flag latched"]) + }, + "Rx Power Low Warning": { + 'offset': 20, + 'size': 1, + 'outtype': 'dict', + 'type': 'nested', + 'decode': lane_code_mask_gen_bitvalue('', ["No flag", "Flag latched"]) + }, + "OutputStatusChangedFlagRx": { + 'offset': 21, + 'size': 1, + 'outtype': 'dict', + 'type': 'nested', + 'decode': lane_code_mask_gen_bitvalue('', ["No flag", "Flag latched"]) + }, + "TX Power": { + 'offset': 22, + 'size': 16, + "outtype": 'dict', + 'type': 'nested', + 'decode': lane_code_mask_gen_func(calc_power) + }, + "TX Bias": { + 'offset': 38, + 'size': 16, + "outtype": 'dict', + 'type': 'nested', + 'decode': lane_code_mask_gen_func(calc_bias) + }, + "RX Power": { + 'offset': 54, + 'size': 16, + "outtype": 'dict', + 'type': 'nested', + 'decode': lane_code_mask_gen_func(calc_power) + } +} + +def twos_comp(num, bits): + try: + if ((num & (1 << (bits - 1))) != 0): + num = num - (1 << bits) + return num + except Exception: + return 0 + +def calc_temperature(eeprom_data, offset, size): + # Internally measured temperature: signed 2’s complement in 1/256 degree Celsius increments + try: + cal_type = 1 + + msb = int(eeprom_data[offset], 16) + lsb = int(eeprom_data[offset + 1], 16) + + result = (msb << 8) | (lsb & 0xff) + result = twos_comp(result, 16) + + if cal_type == 1: + # Internal calibration + result = float(result / 256.0) + retval = '%.4f' %result + 'C' + else: + retval = 'Unknown' + except Exception as err: + retval = str(err) + + return retval + +data_path_state_indicator_enum = { + '00': "Reserved", + '01': "DataPathDeactivated", + '02': "DataPathInit", + '03': "DataPathDeinit", + '04': "DataPathActivated", + '05': "DataPathTxTurnOn", + '06': "DataPathTxTurnOff", + '07': "DataPathInitialized", + + '10': "DataPathDeactivated", + '20': "DataPathInit", + '30': "DataPathDeinit", + '40': "DataPathActivated", + '50': "DataPathTxTurnOn", + '60': "DataPathTxTurnOff", + '70': "DataPathInitialized", +} + +def data_path_state_indicator_lane_masks_gen(key, decode_enum=None): + output = dict() + for offset in range(4): + for lane in range(2): + lane_index = (offset*2) + lane + output["lane{:02d}{}".format(lane_index, key)] = { + 'offset': offset, + 'size': 1, + 'type': 'enum', + 'bitmask': 0x0f<<(lane*4), + 'decode': decode_enum + } + return output + +data_path_state_indicator_lane_masks = data_path_state_indicator_lane_masks_gen("", data_path_state_indicator_enum) + +memory_map = { + # RW + 'Module Global Controls': { + 'page': 0x00, + 'addr': 0x1a, + 'size': 1, + "outtype": 'dict', + 'type': 'nested', + 'decode': { + 'BankBoradcastEnable': { + "offset": 0, + "bit": 7, + "outtype": 'str', + "type": 'bitvalue', + "bitvalue_map": ["disabled", "enabled"] + }, + 'LowPwrAllowRequestHW': { + "offset": 0, + "bit": 6, + "outtype": 'str', + "type": 'bitvalue', + "bitvalue_map": ["disabled", "enabled"] + }, + 'Squelch control': { + "offset": 0, + "bit": 5, + "outtype": 'str', + "type": 'bitvalue', + "bitvalue_map": ["Tx squelch reduces OMA", "Tx squelch reduces Pave"] + }, + 'LowPwrRequestSW': { + "offset": 0, + "bit": 4, + "outtype": 'str', + "type": 'bitvalue', + "bitvalue_map": ["No request", "Request"] + }, + 'Software reset': { + "offset": 0, + "bit": 3, + "outtype": 'str', + "type": 'bitvalue', + "bitvalue_map": ["Not in reset", "Software reset"] + } + } + }, + #RW + 'Data Path Initialization Control': { + 'page': 0x10, + 'addr': 0x80, + 'size': 1, + 'outtype': 'dict', + 'type': 'nested', + 'decode': data_path_init_control_masks + }, + #RW + 'Tx output disable': { + 'page': 0x10, + 'addr': 0x82, + 'size': 1, + 'outtype': 'dict', + 'type': 'nested', + 'decode': tx_ouput_disable_control_masks + }, + #RO + 'Data Path State Indicator': { + 'page': 0x11, + 'addr': 0x80, + 'size': 4, + 'outtype': 'dict', + 'type': 'nested', + 'decode': data_path_state_indicator_lane_masks + }, + #RO + 'Module State': { + 'page': 0x0, + 'addr': 0x3, + 'bitmask': 0xe, + 'size': 1, + 'type': 'enum', + 'decode': { + '00': 'Reserved', + '02': 'ModuleLowPwr', + '04': 'ModulePwrUp', + '06': 'ModuleReady', + '08': 'ModulePwrDn', + '0a': 'ModuleFault', + '0c': 'Reserved', + '0e': 'Reserved' + } + }, + #RW + 'Laser power mode control 0': { + 'page': 0xb2, + 'addr': 0x80, + 'size': 1, + 'outtype': 'dict', + 'type': 'nested', + 'decode': laser_power_control_masks + }, + #RW + 'Laser power mode control 1': { + 'page': 0xb6, + 'addr': 0x80, + 'size': 1, + 'outtype': 'dict', + 'type': 'nested', + 'decode': laser_power_control_masks + }, + #RO + 'Active Application Control Set': { + 'page': 0x11, + 'addr': 0xce, + 'size': 8, + 'outtype': 'dict', + 'type': 'nested', + 'decode': lane_apsel_code_masks + }, + #RW + 'Application Select Controls': { + 'page': 0x10, + 'addr': 0x91, + 'size': 8, + 'outtype': 'dict', + 'type': 'nested', + 'decode': lane_apsel_code_masks + }, + #RW + 'Apply DataPathInit Controls': { + 'page': 0x10, + 'addr': 0x8f, + 'size': 1, + 'outtype': 'dict', + 'type': 'nested', + 'decode': apply_datapath_init_control_masks + }, + #RO + 'Vendor infomation': { + 'page': 0x00, + 'addr': 0x81, + 'size': 61, + "outtype": 'dict', + 'type': 'nested', + 'decode': { + 'Vendor Name': { + 'offset': 0, + 'size': 16, + 'type': 'str' + }, + 'Vendor OUI': { + 'offset': 16, + 'size': 3, + 'type': 'hex' + }, + 'Vendor PN': { + 'offset': 19, + 'size': 16, + 'type': 'str' + }, + 'Vendor Rev': { + 'offset': 35, + 'size': 2, + 'type': 'str' + }, + 'Vendor SN': { + 'offset': 37, + 'size': 16, + 'type': 'str' + }, + 'CPO Vendor SN': { + 'offset': 37, + 'size': 14, + 'type': 'str' + }, + 'Vendor Date': { + 'offset': 53, + 'size': 8, + 'type': 'date' + } + } + }, + #RO + 'lanes dom info': { + 'page': 0x11, + 'addr': 0x84, + 'size': 70, + "outtype": 'dict', + 'type': 'nested', + 'decode': lane_dom_code_items + }, + #RO + 'dom info': { + 'page': 0x00, + 'addr': 0xe, + 'size': 10, + "outtype": 'dict', + 'type': 'nested', + 'decode': { + 'temperature': { + "offset": 0, + "outtype": 'str', + "type": 'func', + "size": 2, + 'decode': { + 'func': calc_temperature + } + } + } + } +} + +class cmis_memory_helper_base(): + + def read(self, bank, page, addr, rd_len): + raise NotImplementedError + + def write(self, bank, page, addr, data): + raise NotImplementedError + + def convert_date_to_string(self, eeprom_data, offset, size): + try: + year_offset = 0 + month_offset = 2 + day_offset = 4 + lot_offset = 6 + + date = self.convert_hex_to_string(eeprom_data, offset, offset + size) + retval = "20"+ date[year_offset:month_offset] + "-" + \ + date[month_offset:day_offset] + "-" + \ + date[day_offset:lot_offset] + " " + \ + date[lot_offset:size] + except Exception as err: + retval = str(err) + return retval + + # Convert Hex to String + def convert_hex_to_string(self, arr, start, end): + try: + ret_str = '' + for n in range(start, end): + ret_str += arr[n] + return binascii.unhexlify(ret_str).decode("utf-8", "ignore").strip() + except Exception as err: + return str(err) + + def test_bit(self, n, bitpos): + try: + mask = 1 << bitpos + if (n & mask) == 0: + return 0 + else: + return 1 + except Exception: + return -1 + + def modify_bit(self, n, bitpos, val): + try: + mask = 1 << bitpos + return ((~mask) & 0xff & n) | (val << bitpos) + except Exception: + return -1 + + def parse_map_element(self, eeprom_data, eeprom_ele, start_pos): + value = None + offset = eeprom_ele.get('offset', 0) + start_pos + size = eeprom_ele.get('size') + type = eeprom_ele.get('type') + decode = eeprom_ele.get('decode') + bitmask = eeprom_ele.get('bitmask', None) + bitvalue_map = eeprom_ele.get('bitvalue_map', None) + eeprom_data_str = [hex(item)[2:].zfill(2) for item in eeprom_data] + + if type == 'enum': + # Get the matched value + if bitmask != None: + key_value_int = eeprom_data[offset] & bitmask + else: + key_value_int = eeprom_data[offset] + key_value_str = str(hex(key_value_int)[2:].zfill(2)) + value = decode.get(key_value_str, 'Unknown') + + elif type == 'bitmap': + # Get the 'on' bitname + bitvalue_dict = {} + for bitname, bitinfo in sorted(decode.items()): + bitinfo_offset = bitinfo.get('offset') + start_pos + bitinfo_pos = bitinfo.get('bit') + bitinfo_value = bitinfo.get('value') + data = eeprom_data[bitinfo_offset] + bit_value = self.test_bit(data, bitinfo_pos) + if bitinfo_value != None: + if bit_value == bitinfo_value: + value = bitname + break + elif bit_value == 1: + value = bitname + break + + elif type == 'bitvalue': + # Get the value of the bit + bitpos = eeprom_ele.get('bit') + data = eeprom_data[offset] + bitval = self.test_bit(data, bitpos) + if bitvalue_map != None: + value = bitvalue_map[bitval] + else: + value = ['Off', 'On'][bitval] + + elif type == 'func': + # Call the decode func to get the value + value = decode['func'](eeprom_data_str, offset, size) + + elif type == 'str': + value = self.convert_hex_to_string(eeprom_data_str, offset, + offset + size) + + elif type == 'int': + value = eeprom_data[offset] + if bitmask != None: + value = value & bitmask + + elif type == 'date': + value = self.convert_date_to_string(eeprom_data_str, offset, size) + + elif type == 'hex': + if size == 1: + value = "0x{}".format(hex(eeprom_data[offset])[2:]) + elif size > 1: + value = '-'.join(eeprom_data_str[offset:offset+size]) + + return value + + # Recursively parses sff data into dictionary + def parse_memory_map(self, eeprom_map, eeprom_data, start_pos): + outdict = {} + for name, meta_data in sorted(eeprom_map.items()): + type = meta_data.get('type') + # Initialize output value + value_dict = {} + value_dict['outtype'] = meta_data.get('outtype') + value_dict['short_name'] = meta_data.get('short_name') + if type != 'nested': + data = self.parse_map_element(eeprom_data, meta_data, start_pos) + else: + nested_map = meta_data.get('decode') + data = self.parse_memory_map(nested_map, eeprom_data, start_pos + meta_data.get('offset', 0)) + if data != None: + value_dict['value'] = data + outdict[name] = value_dict + return outdict + + # def parse(self, eeprom_map_key, eeprom_data, start_pos): + def parse(self, field_name): + """ Example Return format: + {'version': '1.0', 'data': {'Length50um(UnitsOf10m)': + {'outtype': None, 'value': 8, 'short_name': None}, + 'TransceiverCodes': {'outtype': None, 'value': + {'10GEthernetComplianceCode': {'outtype': None, 'value': + '10G Base-SR', 'short_name': None}}, 'short_name': None}, + 'ExtIdentOfTypeOfTransceiver': {'outtype': None, 'value': + 'GBIC/SFP func defined by two-wire interface ID', 'short_name': + None}, 'Length62.5um(UnitsOfm)': {'outtype': None,""" + return_data = {} + eeprom_map = memory_map[field_name] + page = eeprom_map['page'] + addr = eeprom_map['addr'] + size = eeprom_map['size'] + status, eeprom_data = self.read(page=page, addr=addr, rd_len=size) + eeprom_map = { + field_name: eeprom_map + } + outdict = self.parse_memory_map(eeprom_map, eeprom_data, 0) + return_data['data'] = outdict + return_data['version'] = '0x52' # addr 0x2 + return return_data + + def output_process(self, field_keys, field_value): + if field_value.get('outtype') == 'dict': + ret = dict() + for name, value in field_value.get('value').items(): + if field_keys and (name not in field_keys.keys()): + continue + if field_keys: + ret[name] = self.output_process(field_keys.get(name, None), value) + else: + ret[name] = self.output_process(None, value) + else: + ret = field_value['value'] + return ret + + def get_field(self, field_name): + if isinstance(field_name, dict): + ret_dict = dict() + for field in field_name.keys(): + parse_output = self.parse(field) + output_data = parse_output.get('data') + field_data = output_data.get(field) + ret_dict[field] = self.output_process(field_name[field], field_data) + return ret_dict + else: + parse_output = self.parse(field_name) + output_data = parse_output.get('data') + field_data = output_data.get(field_name) + return self.output_process(None, field_data) + + def modify_map_element(self, eeprom_data, eeprom_ele, start_pos, target_value): + value = None + offset = eeprom_ele.get('offset') + start_pos + size = eeprom_ele.get('size') + type = eeprom_ele.get('type') + decode = eeprom_ele.get('decode') + bitmask = eeprom_ele.get('bitmask', None) + bitvalue_map = eeprom_ele.get('bitvalue_map', None) + + if type == 'bitvalue': + # Get the value of the bit + bitpos = eeprom_ele.get('bit') + data = eeprom_data[offset] + if bitvalue_map != None: + target_index = bitvalue_map.index(target_value) + else: + target_index = ['Off', 'On'].index(target_value) + value = self.modify_bit(data, bitpos, target_index) + eeprom_data[offset] = value & 0xff + + elif type == 'enum': + # Get the matched value + enum_value = 'Unknown' + for key, value in decode.items(): + if value == target_value: + enum_value = key + break + enum_value = int(enum_value, 16) + eeprom_value = eeprom_data[offset] + if bitmask != None: + eeprom_value = eeprom_value & (~bitmask) + eeprom_value = eeprom_value | enum_value + else: + eeprom_value = enum_value + eeprom_data[offset] = eeprom_value & 0xff + return eeprom_data + + def modify_memory_map(self, eeprom_map, eeprom_data, start_pos, target:dict): + for target_key, target_value in target.items(): + for name, meta_data in sorted(eeprom_map.items()): + if name != target_key: + continue + type = meta_data.get('type') + # Initialize output value + value_dict = {} + value_dict['outtype'] = meta_data.get('outtype') + value_dict['short_name'] = meta_data.get('short_name') + + if type != 'nested': + data = self.modify_map_element(eeprom_data, + meta_data, start_pos, target_value) + else: + nested_map = meta_data.get('decode') + data = self.modify_memory_map(nested_map, + eeprom_data, start_pos, target_value) + eeprom_data = data + return eeprom_data + + def modify(self, field_name, field_value): + outdict = dict() + eeprom_map = memory_map[field_name] + page = eeprom_map['page'] + addr = eeprom_map['addr'] + size = eeprom_map['size'] + status, eeprom_data = self.read(page=page, addr=addr, rd_len=size) + field_value = { + field_name: field_value + } + eeprom_map = { + field_name: eeprom_map + } + output_eeprom_data = self.modify_memory_map(eeprom_map, copy.deepcopy(eeprom_data), 0, field_value) + if (eeprom_data != output_eeprom_data): + outdict[field_name] = self.write(page=page, addr=addr, data=output_eeprom_data) + else: + outdict[field_name] = (True, "same as before") + return outdict + + def set_field(self, field_name, field_value): + return self.modify(field_name=field_name, field_value=field_value) diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/cpo/lib/cpoutil.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/cpo/lib/cpoutil.py new file mode 100755 index 00000000000..e7a618193c7 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/cpo/lib/cpoutil.py @@ -0,0 +1,1801 @@ +import binascii +import fcntl +import math +import os +import sys +import threading +import time +import traceback +import subprocess +from cpo_platform_config import * +from cmis_memory_map import cmis_memory_helper_base +from oe_cmis_rw import oe_cmis_sysfs_rw +sys.path.append(os.path.dirname(os.path.realpath(__file__))) +try: + import fw_tools + from fw_tools.cdb_app import cdb + from fw_tools.cmis import debug +except Exception as e: + print(e) + pass + +RLMA_PAGE_BASE_OFFSET = 0x0 +RLMB_PAGE_BASE_OFFSET = 0x4 + +RLM_IDENTIFIER_PAGE = 0xb0 +RLM_IDENTIFIER_OFFSET = 0x80 +RLM_IDENTIFIER_WIDTH = 1 + +RLM_REVERSION_PAGE = 0xb0 +RLM_REVERSION_OFFSET = 0x81 +RLM_REVERSION_WIDTH = 1 + +RLM_LASER_GRID_AND_COUNT_PAGE = 0xb0 +RLM_LASER_GRID_AND_COUNT_OFFSET = 0x82 +RLM_LASER_GRID_AND_COUNT_WIDTH = 1 + +RLM_MODULE_STATE_AND_INTERRUPT_PAGE = 0xb0 +RLM_MODULE_STATE_AND_INTERRUPT_OFFSET = 0x83 +RLM_MODULE_STATE_AND_INTERRUPT_WIDTH = 1 + +RLM_MODULE_LOW_POWER_CONTROL_PAGE = 0xb0 +RLM_MODULE_LOW_POWER_CONTROL_OFFSET = 0x84 +RLM_MODULE_LOW_POWER_CONTROL_WIDTH = 1 + +RLM_LASER_DISABLE_CONTROL_PAGE = 0xb0 +RLM_LASER_DISABLE_CONTROL_OFFSET = 0x85 +RLM_LASER_DISABLE_CONTROL_WIDTH = 2 + +RLM_LASER_ACTIVE_STATUS_PAGE = 0xb0 +RLM_LASER_ACTIVE_STATUS_OFFSET = 0x87 +RLM_LASER_ACTIVE_STATUS_WIDTH = 2 + +RLM_VCC_AND_TEMPERATURE_WARNING_ALARM_PAGE = 0xb0 +RLM_VCC_AND_TEMPERATURE_WARNING_ALARM_OFFSET = 0x89 +RLM_VCC_AND_TEMPERATURE_WARNING_ALARM_WIDTH = 1 + +RLM_LASER_BIAS_WARNING_PAGE = 0xb0 +RLM_LASER_BIAS_WARNING_OFFSET = 0x8A +RLM_LASER_BIAS_WARNING_WIDTH = 2 + +RLM_LASER_BIAS_ALARM_PAGE = 0xb0 +RLM_LASER_BIAS_ALARM_OFFSET = 0x8C +RLM_LASER_BIAS_ALARM_WIDTH = 2 + +RLM_MODULE_TEMPERATURE_MONITOR_PAGE = 0xb0 +RLM_MODULE_TEMPERATURE_MONITOR_OFFSET = 0x96 +RLM_MODULE_TEMPERATURE_MONITOR_WIDTH = 2 + +RLM_MODULE_SUPPLY_VOLTAGE_MONITOR_PAGE = 0xb0 +RLM_MODULE_SUPPLY_VOLTAGE_MONITOR_OFFSET = 0x98 +RLM_MODULE_SUPPLY_VOLTAGE_MONITOR_WIDTH = 2 + +RLM_MONITOR_VALUES_PAGE = 0xb0 +RLM_MONITOR_VALUES_OFFSET = 0x9A +RLM_MONITOR_VALUES_WIDTH = 81 + +RLM_TEC_CURRENT_MONITOR_PAGE = 0xb0 +RLM_TEC_CURRENT_MONITOR_OFFSET = 0xfa +RLM_TEC_CURRENT_MONITOR_WIDTH = 2 + +RLM_VENDOR_INFOMATION_PAGE = 0xb1 +RLM_VENDOR_INFOMATION_OFFSET = 0x81 +RLM_VENDOR_INFOMATION_WIDTH = 122 + +RLM_MAXIMUM_POWER_CONSUMPTION_PAGE = 0xb1 +RLM_MAXIMUM_POWER_CONSUMPTION_OFFSET = 0xc8 +RLM_MAXIMUM_POWER_CONSUMPTION_WIDTH = 1 + +RLM_LASER_POWER_MODE_CONTROL_PAGE = 0xb2 +RLM_LASER_POWER_MODE_CONTROL_OFFSET = 0x80 +RLM_LASER_POWER_MODE_CONTROL_WIDTH = 1 + +RLM_DOM_THRESHOLD_PAGE = 0xb2 +RLM_DOM_THRESHOLD_OFFSET = 0xA2 +RLM_DOM_THRESHOLD_WIDTH = 28 + +RLM_B1_CEHCK_SUM_PAGE = 0xb1 +RLM_B1_CEHCK_SUM_OFFSET = 0xfb +RLM_B1_CEHCK_SUM_WIDTH = 1 + +def os_command_i2cset_oe_reset_byte(byte): + try: + cmd = ["i2cset", "-f", "-y", "20", "0x1e", "0x72", f"0x{byte:02X}"] + result = subprocess.run( + cmd, + stdout=subprocess.PIPE, + stderr=subprocess.PIPE, + text=True, + check=True + ) + return result.returncode + except subprocess.CalledProcessError as e: + print(f"i2cset set failed: {e.stderr}") + return e.returncode + except FileNotFoundError: + print("i2cset command not found") + return -1 + except Exception as e: + print(f"set i2cset error: {e}") + return -1 + +class CpoException(Exception): + def __init__(self, detailed_error_message): + super(CpoException, self).__init__(detailed_error_message) + +class cpoutilbase(object): + + def __init__(self) -> None: + self.cpo_api = cpo_v1() + # self.oe_list = list(range(8)) + + def get_dict_str_format(self, indict, indent): + output = '' + if indict != None: + for key, value in indict.items(): + if type(value) == dict: + output += "{}{}:\n{}".format(indent, key, self.get_dict_str_format(value, indent + (' ' * 8))) + else: + output += "{}{}: {}\n".format(indent, key, value) + return output + + def laser_count_implemented(self, indict, laser_count): + if type(indict) != dict: + return indict + + outdict = dict() + for key, value in indict.items(): + flag = True + if type(key) == str: + for i in range(laser_count+1, 16): + laser_name = "Laser{:02d}".format(i) + if key.find(laser_name) >= 0: + flag = False + break + if flag: + outdict[key] = self.laser_count_implemented(value, laser_count) + return outdict + + def mutil_reset_oe(self, oe_list: list): + retval = True + try: + for oe in oe_list: + if not self.cpo_api._file_rw_lock(oe): + raise CpoException("eeprom file lock failed!") + retval = self.cpo_api.reset_oe(oe_list) + except: + retval = False + finally: + for oe in oe_list: + self.cpo_api._file_rw_unlock(oe) + return retval + + def oe_dump_laser_pwr(self, oe): + try: + if not self.cpo_api._file_rw_lock(oe): + raise CpoException("eeprom file lock failed!") + with debug.DebugObj(oe_mcu=oe) as d: + d.debug_dump_laser_input_power() + except Exception as e: + pass + + finally: + self.cpo_api._file_rw_unlock(oe) + + def oe_fw_upgrade(self, oe, filename, size, rlm_num, verify=True): + try: + if not self.cpo_api._file_rw_lock(oe): + raise CpoException("eeprom file lock failed!") + with cdb.cdbObj(oe_num=oe) as c: + c.cmis_i2c.connect_mcu(oe) + print("Connected to MCU%d" % oe) + c.cdb_update_general(filename, size, rlm_num=rlm_num, verify=verify) + except: + pass + + finally: + self.cpo_api._file_rw_unlock(oe) + + def get_oe_list(self): + return self.cpo_api.get_oe_list() + + def get_rlm_list_by_oe(self, oe): + return self.cpo_api.get_rlm_list_by_oe(oe) + + def get_rlm_list(self): + return self.cpo_api.get_rlm_list() + + def get_oe_by_rlm(self, rlm): + return self.cpo_api.get_oe_by_rlm(rlm) + + def get_rlm_name(self, rlm): + return "RLM{}".format(rlm) + + def get_port_index_list(self): + return self.cpo_api.get_port_index_list() + + def get_port_index_list_by_oe(self, oe): + return self.cpo_api.get_port_index_list_by_oe(oe) + + def get_oe_by_port_index(self, port_index): + return self.cpo_api.get_oe_by_port_index(port_index) + + def get_bank_by_port_index(self, port_index): + return self.cpo_api.get_bank_by_port_index(port_index) + + def get_rlm_presence(self, rlm): + if rlm not in self.get_rlm_list(): + print("RLM index out of range!") + return False + # return self.cpo_api.get_rlm_presence(rlm) + oe = self.get_oe_by_rlm(rlm) + + retval = True + try: + if not self.cpo_api._file_rw_lock(oe): + raise CpoException("eeprom file lock failed!") + retval = self.cpo_api.get_rlm_presence(rlm) + except: + retval = False + finally: + self.cpo_api._file_rw_unlock(oe) + + return retval + + def get_rlm_info_dict(self, rlm): + if rlm not in self.get_rlm_list(): + return "RLM index out of range!" + oe = self.cpo_api.get_oe_by_rlm(rlm) + + if self.cpo_api.get_rlm_list_by_oe(oe).index(rlm) == 0: + RLM_PAGE_BASE_OFFSET = RLMA_PAGE_BASE_OFFSET + else: + RLM_PAGE_BASE_OFFSET = RLMB_PAGE_BASE_OFFSET + + rlm_info_dict = dict() + cpo_api = cpo_v1() + + try: + if not cpo_api._file_rw_lock(oe): + return "EEPROM file lock failed!" + + rlm_vendor_infomation_raw = cpo_api.read_eeprom(oe, RLM_VENDOR_INFOMATION_PAGE + RLM_PAGE_BASE_OFFSET, RLM_VENDOR_INFOMATION_OFFSET, RLM_VENDOR_INFOMATION_WIDTH) + rlm_b1_checksum_raw = cpo_api.read_eeprom(oe, RLM_B1_CEHCK_SUM_PAGE + RLM_PAGE_BASE_OFFSET, RLM_B1_CEHCK_SUM_OFFSET, RLM_B1_CEHCK_SUM_WIDTH) + + if not self.cpo_api.get_rlm_presence(rlm): + return "RLM not presence" + + rlm_identifier_raw = cpo_api.read_eeprom(oe, RLM_IDENTIFIER_PAGE + RLM_PAGE_BASE_OFFSET, RLM_IDENTIFIER_OFFSET, RLM_IDENTIFIER_WIDTH) + if rlm_identifier_raw is not None: + rlm_identifier_data = cpo_api.parse_identifier(rlm_identifier_raw, 0) + + rlm_reversion_raw = cpo_api.read_eeprom(oe, RLM_REVERSION_PAGE + RLM_PAGE_BASE_OFFSET, RLM_REVERSION_OFFSET, RLM_REVERSION_WIDTH) + if rlm_reversion_raw is not None: + rlm_reversion_data = cpo_api.parse_reversion(rlm_reversion_raw, 0) + + rlm_laser_grid_and_count_raw = cpo_api.read_eeprom(oe, RLM_LASER_GRID_AND_COUNT_PAGE + RLM_PAGE_BASE_OFFSET, RLM_LASER_GRID_AND_COUNT_OFFSET, RLM_LASER_GRID_AND_COUNT_WIDTH) + if rlm_laser_grid_and_count_raw is not None: + rlm_laser_grid_and_count_data = cpo_api.parse_laser_grid_and_count(rlm_laser_grid_and_count_raw, 0) + + rlm_module_state_and_interrupt_raw = cpo_api.read_eeprom(oe, RLM_MODULE_STATE_AND_INTERRUPT_PAGE + RLM_PAGE_BASE_OFFSET, RLM_MODULE_STATE_AND_INTERRUPT_OFFSET, RLM_MODULE_STATE_AND_INTERRUPT_WIDTH) + if rlm_module_state_and_interrupt_raw is not None: + rlm_module_state_and_interrupt_data = cpo_api.parse_module_state_and_interrupt(rlm_module_state_and_interrupt_raw, 0) + + rlm_module_low_power_control_raw = cpo_api.read_eeprom(oe, RLM_MODULE_LOW_POWER_CONTROL_PAGE + RLM_PAGE_BASE_OFFSET, RLM_MODULE_LOW_POWER_CONTROL_OFFSET, RLM_MODULE_LOW_POWER_CONTROL_WIDTH) + if rlm_module_low_power_control_raw is not None: + rlm_module_low_power_control_data = cpo_api.parse_module_low_power_control(rlm_module_low_power_control_raw, 0) + + rlm_laser_disable_control_raw = cpo_api.read_eeprom(oe, RLM_LASER_DISABLE_CONTROL_PAGE + RLM_PAGE_BASE_OFFSET, RLM_LASER_DISABLE_CONTROL_OFFSET, RLM_LASER_DISABLE_CONTROL_WIDTH) + if rlm_laser_disable_control_raw is not None: + rlm_laser_disable_control_data = cpo_api.parse_laser_disable_control(rlm_laser_disable_control_raw, 0) + + rlm_laser_active_status_raw = cpo_api.read_eeprom(oe, RLM_LASER_ACTIVE_STATUS_PAGE + RLM_PAGE_BASE_OFFSET, RLM_LASER_ACTIVE_STATUS_OFFSET, RLM_LASER_ACTIVE_STATUS_WIDTH) + if rlm_laser_active_status_raw is not None: + rlm_laser_active_status_data = cpo_api.parse_laser_active_status(rlm_laser_active_status_raw, 0) + + rlm_vcc_and_temperature_warning_alarm_raw = cpo_api.read_eeprom(oe, RLM_VCC_AND_TEMPERATURE_WARNING_ALARM_PAGE + RLM_PAGE_BASE_OFFSET, RLM_VCC_AND_TEMPERATURE_WARNING_ALARM_OFFSET, RLM_VCC_AND_TEMPERATURE_WARNING_ALARM_WIDTH) + if rlm_vcc_and_temperature_warning_alarm_raw is not None: + rlm_vcc_and_temperature_warning_alarm_data = cpo_api.parse_vcc_and_temperature_warning_alarm(rlm_vcc_and_temperature_warning_alarm_raw, 0) + + rlm_laser_bias_warning_raw = cpo_api.read_eeprom(oe, RLM_LASER_BIAS_WARNING_PAGE + RLM_PAGE_BASE_OFFSET, RLM_LASER_BIAS_WARNING_OFFSET, RLM_LASER_BIAS_WARNING_WIDTH) + if rlm_laser_bias_warning_raw is not None: + rlm_laser_bias_warning_data = cpo_api.parse_laser_bias_warning(rlm_laser_bias_warning_raw, 0) + + rlm_laser_bias_alarm_raw = cpo_api.read_eeprom(oe, RLM_LASER_BIAS_ALARM_PAGE + RLM_PAGE_BASE_OFFSET, RLM_LASER_BIAS_ALARM_OFFSET, RLM_LASER_BIAS_ALARM_WIDTH) + if rlm_laser_bias_alarm_raw is not None: + rlm_laser_bias_alarm_data = cpo_api.parse_laser_bias_alarm(rlm_laser_bias_alarm_raw, 0) + + rlm_module_temperature_monitor_raw = cpo_api.read_eeprom(oe, RLM_MODULE_TEMPERATURE_MONITOR_PAGE + RLM_PAGE_BASE_OFFSET, RLM_MODULE_TEMPERATURE_MONITOR_OFFSET, RLM_MODULE_TEMPERATURE_MONITOR_WIDTH) + if rlm_module_temperature_monitor_raw is not None: + rlm_module_temperature_monitor_data = cpo_api.parse_module_temperature_monitor(rlm_module_temperature_monitor_raw, 0) + + rlm_module_supply_voltage_monitor_raw = cpo_api.read_eeprom(oe, RLM_MODULE_SUPPLY_VOLTAGE_MONITOR_PAGE + RLM_PAGE_BASE_OFFSET, RLM_MODULE_SUPPLY_VOLTAGE_MONITOR_OFFSET, RLM_MODULE_SUPPLY_VOLTAGE_MONITOR_WIDTH) + if rlm_module_supply_voltage_monitor_raw is not None: + rlm_module_supply_voltage_monitor_data = cpo_api.parse_module_supply_voltage_monitor(rlm_module_supply_voltage_monitor_raw, 0) + + if rlm_vendor_infomation_raw is not None: + rlm_vendor_infomation_data = cpo_api.parse_vendor_infomation(rlm_vendor_infomation_raw, 0) + + rlm_maximum_power_consumption_raw = cpo_api.read_eeprom(oe, RLM_MAXIMUM_POWER_CONSUMPTION_PAGE + RLM_PAGE_BASE_OFFSET, RLM_MAXIMUM_POWER_CONSUMPTION_OFFSET, RLM_MAXIMUM_POWER_CONSUMPTION_WIDTH) + if rlm_maximum_power_consumption_raw is not None: + rlm_maximum_power_consumption_data = cpo_api.parse_maximum_power_consumption(rlm_maximum_power_consumption_raw, 0) + + rlm_laser_power_mode_control_raw = cpo_api.read_eeprom(oe, RLM_LASER_POWER_MODE_CONTROL_PAGE + RLM_PAGE_BASE_OFFSET, RLM_LASER_POWER_MODE_CONTROL_OFFSET, RLM_LASER_POWER_MODE_CONTROL_WIDTH) + if rlm_laser_power_mode_control_raw is not None: + rlm_laser_power_mode_control_data = cpo_api.parse_laser_power_mode_control(rlm_laser_power_mode_control_raw, 0) + + rlm_dom_threshold_raw = cpo_api.read_eeprom(oe, RLM_DOM_THRESHOLD_PAGE + RLM_PAGE_BASE_OFFSET, RLM_DOM_THRESHOLD_OFFSET, RLM_DOM_THRESHOLD_WIDTH) + if rlm_dom_threshold_raw is not None: + rlm_dom_threshold_data = cpo_api.parse_dom_threshold(rlm_dom_threshold_raw, 0) + + rlm_monitor_values_raw = cpo_api.read_eeprom(oe, RLM_MONITOR_VALUES_PAGE + RLM_PAGE_BASE_OFFSET, RLM_MONITOR_VALUES_OFFSET, RLM_MONITOR_VALUES_WIDTH) + if rlm_monitor_values_raw is not None: + rlm_monitor_values_data = cpo_api.parse_monitor_values(rlm_monitor_values_raw, 0) + + rlm_tec_current_monitor_raw = cpo_api.read_eeprom(oe, RLM_TEC_CURRENT_MONITOR_PAGE + RLM_PAGE_BASE_OFFSET, RLM_TEC_CURRENT_MONITOR_OFFSET, RLM_TEC_CURRENT_MONITOR_WIDTH) + if rlm_tec_current_monitor_raw is not None: + rlm_tec_current_monitor_data = cpo_api.parse_tec_current_monitor(rlm_tec_current_monitor_raw, 0) + + rlm_info_dict['Identifier'] = rlm_identifier_data['data']['Identifier'] + rlm_info_dict['Reversion'] = rlm_reversion_data['data']['Reversion'] + rlm_info_dict['Laser grid and count'] = rlm_laser_grid_and_count_data['data']['Laser grid and count'] + rlm_info_dict['Module state & Interrupt'] = rlm_module_state_and_interrupt_data['data']['Module state & Interrupt'] + rlm_info_dict['Module low power control'] = rlm_module_low_power_control_data['data']['Module low power control'] + rlm_info_dict['Laser disable control'] = rlm_laser_disable_control_data['data']['Laser disable control'] + rlm_info_dict['Laser active status'] = rlm_laser_active_status_data['data']['Laser active status'] + rlm_info_dict['Vcc 3.3V & temperature low/high warning/alarm'] = rlm_vcc_and_temperature_warning_alarm_data['data']['Vcc 3.3V & Temperature low/high warning/alarm'] + rlm_info_dict['Laser bias warning'] = rlm_laser_bias_warning_data['data']['Laser bias warning'] + rlm_info_dict['Laser bias alarm'] = rlm_laser_bias_alarm_data['data']['Laser bias alarm'] + rlm_info_dict['Module temperature monitor'] = rlm_module_temperature_monitor_data['data']['Module Temperature Monitor'] + rlm_info_dict['Module supply voltage monitor'] = rlm_module_supply_voltage_monitor_data['data']['Module supply voltage Monitor'] + rlm_info_dict['Vendor infomation'] = rlm_vendor_infomation_data['data']['Vendor infomation'] + rlm_info_dict['Maximum power consumption'] = rlm_maximum_power_consumption_data['data']['Maximum power consumption'] + rlm_info_dict['Laser power mode control'] = rlm_laser_power_mode_control_data['data']['Laser power mode control'] + rlm_info_dict['ThresholdValues'] = rlm_dom_threshold_data['data']['ThresholdValues'] + rlm_info_dict['Laser current monitor'] = rlm_monitor_values_data['data']['Laser current monitor'] + rlm_info_dict['Laser voltage monitor'] = rlm_monitor_values_data['data']['Laser voltage monitor'] + rlm_info_dict['Laser opitcal power monitor'] = rlm_monitor_values_data['data']['Laser opitcal power monitor'] + rlm_info_dict['TEC current monitor'] = rlm_tec_current_monitor_data['data']['TEC current monitor'] + + if (rlm_info_dict != None) and (rlm_info_dict['Laser grid and count'] != None): + laser_count = rlm_info_dict['Laser grid and count']['Laser count'] + rlm_info_dict = self.laser_count_implemented(rlm_info_dict, laser_count) + + except CpoException: + rlm_info_dict = None + except BaseException: + rlm_info_dict = None + print(traceback.format_exc()) + finally: + cpo_api._file_rw_unlock(oe) + + if rlm_info_dict == None: + return "RLM eeprom get failed!" + + return rlm_info_dict + + def get_rlm_dom_info_dict(self, rlm): + return self.get_rlm_info_dict(rlm) + + def get_rlm_lpmode(self, rlm): + oe = self.cpo_api.get_oe_by_rlm(rlm) + if self.cpo_api.get_rlm_list_by_oe(oe).index(rlm) == 0: + RLM_PAGE_BASE_OFFSET = RLMA_PAGE_BASE_OFFSET + else: + RLM_PAGE_BASE_OFFSET = RLMB_PAGE_BASE_OFFSET + rlm_enable = 0x00 + try: + if not self.cpo_api._file_rw_lock(oe): + return False, False + rlm_laser_power_mode_control_raw = self.cpo_api.read_eeprom(oe, RLM_LASER_POWER_MODE_CONTROL_PAGE + RLM_PAGE_BASE_OFFSET, RLM_LASER_POWER_MODE_CONTROL_OFFSET, RLM_LASER_POWER_MODE_CONTROL_WIDTH) + if rlm_laser_power_mode_control_raw is not None: + rlm_laser_power_mode_control_data = self.cpo_api.parse_laser_power_mode_control(rlm_laser_power_mode_control_raw, 0) + rlm_enable = rlm_laser_power_mode_control_data['data']['Laser power mode control'] + except BaseException: + print(traceback.format_exc()) + return False, False + finally: + self.cpo_api._file_rw_unlock(oe) + # return True if rlm is half power mode + return True, int(rlm_enable, 16) == 0x00 + + def set_rlm_lpmode_mutil(self, rlm_list:list, lpmode): + retval = False + oe_set = set() + oe_need_enable_set = set() + + for rlm in rlm_list: + oe_set.add(self.get_oe_by_rlm(rlm)) + + # FIXME: this will affect the other ports belong to this oe + # for oe in oe_set: + # if self.get_oe_enable(oe): + # oe_need_enable_set.add(oe) + + try: + # lock eeprom + for oe in oe_set: + if not self.cpo_api._file_rw_lock(oe): + raise CpoException("eeprom file lock failed!") + # disable oe + for oe in oe_need_enable_set: + self._set_oe_enable(oe, False) + # set rlm lpmode + if len(oe_need_enable_set): + time.sleep(1) + retval = self._set_rlm_lpmode_mutil(rlm_list, lpmode) + if len(oe_need_enable_set): + time.sleep(1) + except Exception: + retval = False + print(traceback.format_exc()) + finally: + # enable oe + for oe in oe_need_enable_set: + self._set_oe_enable(oe, True) + # unlock eeprom + for oe in oe_set: + self.cpo_api._file_rw_unlock(oe) + return retval + + + def _set_rlm_lpmode_mutil(self, rlm_list:list, lpmode): + for rlm in rlm_list: + oe = self.get_oe_by_rlm(rlm) + if lpmode == True: + if self.cpo_api.get_rlm_list_by_oe(oe).index(rlm) == 0: + # disable RLM from full power mode (AOP ~ 20dBm): write 0x00 to byte 0x80 on page 0xB2. + self.cpo_api.write_eeprom(oe=oe, page=0xB2, offset=0x80, num_bytes=1, write_buffer=bytearray([0x00])) + else: + # disable RLM from full power mode (AOP ~ 20dBm): write 0x00 to byte 0x80 on page 0xB6. + self.cpo_api.write_eeprom(oe=oe, page=0xB6, offset=0x80, num_bytes=1, write_buffer=bytearray([0x00])) + else: + if self.cpo_api.get_rlm_list_by_oe(oe).index(rlm) == 0: + # Enable RLM to full power mode (AOP ~ 20dBm): write 0xFF to byte 0x80 on page 0xB2. + self.cpo_api.write_eeprom(oe=oe, page=0xB2, offset=0x80, num_bytes=1, write_buffer=bytearray([0xFF])) + else: + # Enable RLM to full power mode (AOP ~ 20dBm): write 0xFF to byte 0x80 on page 0xB6. + self.cpo_api.write_eeprom(oe=oe, page=0xB6, offset=0x80, num_bytes=1, write_buffer=bytearray([0xFF])) + return True + + def _set_oe_enable(self, oe, enable): + if enable: + # # Exit low power mode: write 0x20 to byte 0x1A on page 0x00. enabled bit7, the broadcast bit. + # self.cpo_api.write_eeprom(oe=oe, page=0x00, offset=0x1A, num_bytes=1, write_buffer=bytearray([0xA0])) + # # Enable data path: write 0x00 to byte 0x80 on page 0x10. + # self.cpo_api.write_eeprom(oe=oe, page=0x10, offset=0x80, num_bytes=1, write_buffer=bytearray([0x00])) + # # Enable Tx: write 0x00 to byte 0x82 on page 0x10. + # self.cpo_api.write_eeprom(oe=oe, page=0x10, offset=0x82, num_bytes=1, write_buffer=bytearray([0x00])) + # # Exit low power mode: write 0x20 to byte 0x1A on page 0x00. + # self.cpo_api.write_eeprom(oe=oe, page=0x00, offset=0x1A, num_bytes=1, write_buffer=bytearray([0x20])) + + # Step 1: Soft Reset, bank0, byte 0x1A set to 0x18 + self.cpo_api.write_eeprom(oe=oe, page=0x00, offset=0x1A, num_bytes=1, write_buffer=bytearray([0x18])) + # Step 2: Wait 5 second + time.sleep(5) + # Step 3: Force stay at LowPwr Mode, and Broadcast En, bank0, byte 0x1A set to 0x90 + self.cpo_api.write_eeprom(oe=oe, page=0x00, offset=0x1A, num_bytes=1, write_buffer=bytearray([0x90])) + time.sleep(0.1) + # Step 4: Set bank0, page10h App Code 0x91-0x98 + # TODO + # Step 5: Set bank0, page10h byte 0x8F to 0xFF + self.cpo_api.write_eeprom(oe=oe, page=0x10, offset=0x8F, num_bytes=1, write_buffer=bytearray([0xFF])) + # Step 6: Set bank0, page10h byte 0x80-0x82 to 0x00 + self.cpo_api.write_eeprom(oe=oe, page=0x10, offset=0x80, num_bytes=1, write_buffer=bytearray([0x00])) + self.cpo_api.write_eeprom(oe=oe, page=0x10, offset=0x81, num_bytes=1, write_buffer=bytearray([0x00])) + self.cpo_api.write_eeprom(oe=oe, page=0x10, offset=0x82, num_bytes=1, write_buffer=bytearray([0x00])) + # Step 7: Set LowPwr Mode = False, and Broadcast En, bank0, byte 0x1A set to 0x80 + self.cpo_api.write_eeprom(oe=oe, page=0x00, offset=0x1A, num_bytes=1, write_buffer=bytearray([0x80])) + time.sleep(1) + else: + # # enter low power mode: write 0x30 to byte 0x1A on page 0x00. enabled bit7, the broadcast bit. + # self.cpo_api.write_eeprom(oe=oe, page=0x00, offset=0x1A, num_bytes=1, write_buffer=bytearray([0xB0])) + # # disable Tx: write 0xff to byte 0x82 on page 0x10. + # self.cpo_api.write_eeprom(oe=oe, page=0x10, offset=0x82, num_bytes=1, write_buffer=bytearray([0xff])) + # # disable data path: write 0xff to byte 0x80 on page 0x10. + # self.cpo_api.write_eeprom(oe=oe, page=0x10, offset=0x80, num_bytes=1, write_buffer=bytearray([0xff])) + # # enter low power mode: write 0x30 to byte 0x1A on page 0x00. + # self.cpo_api.write_eeprom(oe=oe, page=0x00, offset=0x1A, num_bytes=1, write_buffer=bytearray([0x30])) + + # enter low power mode: write 0x90 to byte 0x1A on page 0x00. enabled bit7, the broadcast bit. + self.cpo_api.write_eeprom(oe=oe, page=0x00, offset=0x1A, num_bytes=1, write_buffer=bytearray([0x90])) + # disable Tx: write 0xff to byte 0x82 on page 0x10. + self.cpo_api.write_eeprom(oe=oe, page=0x10, offset=0x82, num_bytes=1, write_buffer=bytearray([0xff])) + # disable data path: write 0xff to byte 0x80 on page 0x10. + self.cpo_api.write_eeprom(oe=oe, page=0x10, offset=0x80, num_bytes=1, write_buffer=bytearray([0xff])) + # disable the broadcast. + self.cpo_api.write_eeprom(oe=oe, page=0x00, offset=0x1A, num_bytes=1, write_buffer=bytearray([0x10])) + + return True + + def set_oe_enable(self, oe, enable): + if oe not in self.get_oe_list(): + return False + retval = True + try: + if not self.cpo_api._file_rw_lock(oe): + raise CpoException("eeprom file lock failed!") + retval = self._set_oe_enable(oe=oe, enable=enable) + except: + retval = False + finally: + self.cpo_api._file_rw_unlock(oe) + return retval + + def _get_oe_enable(self, oe): + raw_data = self.cpo_api.read_eeprom(oe=oe, page=0x00, offset=0x1A, num_bytes=1)[0] + # return True if oe is enabled + return (int(raw_data, 16) & 0x10) != 0x10 + + def get_oe_enable(self, oe): + if oe not in self.get_oe_list(): + # print("OE index out of range!") + return False, "OE index out of range!" + enable = False + try: + if not self.cpo_api._file_rw_lock(oe): + return False, "eeprom file lock failed!" + enable = self._get_oe_enable(oe) + except BaseException as err: + # print(traceback.format_exc()) + return False, "An error occurred: {}".format(str(err)) + finally: + self.cpo_api._file_rw_unlock(oe) + return True, enable + + def get_speed(self, port_index): + retval = 0 + try: + oe_index = self.cpo_api.get_oe_bank_by_port(port_index)["oe"] + if not self.cpo_api._file_rw_lock(oe_index): + raise CpoException("eeprom file lock failed!") + retval = self.cpo_api.get_speed(port_index) + except Exception as e: + print(str(e)) + retval = 0 + finally: + self.cpo_api._file_rw_unlock(oe_index) + return retval + + def set_speed(self, port_index, speed): + retval = True + try: + oe = self.cpo_api.get_oe_bank_by_port(port_index)["oe"] + if not self.cpo_api._file_rw_lock(oe): + raise CpoException("eeprom file lock failed!") + # self.set_oe_enable(oe, False) + # time.sleep(5) + retval = self.cpo_api.set_speed(port_index, speed) + except Exception as e: + print(str(e)) + retval = False + finally: + # self.set_oe_enable(oe, True) + # time.sleep(5) + self.cpo_api._file_rw_unlock(oe) + return retval + +class cpoutil_v2(cpoutilbase): + def __init__(self) -> None: + super().__init__() + + def get_rlm_sn(self, rlm_index): + if rlm_index not in self.get_rlm_list(): + return "RLM index out of range!" + oe = self.cpo_api.get_oe_by_rlm(rlm_index) + + if self.cpo_api.get_rlm_list_by_oe(oe).index(rlm_index) == 0: + RLM_PAGE_BASE_OFFSET = RLMA_PAGE_BASE_OFFSET + else: + RLM_PAGE_BASE_OFFSET = RLMB_PAGE_BASE_OFFSET + + rlm_info_dict = dict() + cpo_api = cpo_v1() + + try: + if not cpo_api._file_rw_lock(oe): + return "EEPROM file lock failed!" + + rlm_vendor_infomation_raw = cpo_api.read_eeprom(oe, RLM_VENDOR_INFOMATION_PAGE + RLM_PAGE_BASE_OFFSET, RLM_VENDOR_INFOMATION_OFFSET, RLM_VENDOR_INFOMATION_WIDTH) + + if rlm_vendor_infomation_raw is not None: + rlm_vendor_infomation_data = cpo_api.parse_vendor_infomation(rlm_vendor_infomation_raw, 0) + + rlm_info_dict['Vendor infomation'] = rlm_vendor_infomation_data['data']['Vendor infomation'] + + except CpoException: + rlm_info_dict = None + except BaseException: + rlm_info_dict = None + print(traceback.format_exc()) + finally: + cpo_api._file_rw_unlock(oe) + + if rlm_info_dict == None: + return "RLM eeprom get failed!" + + return rlm_info_dict + +type_of_module_state_and_interrupt = { + '00': "High power mode & Interrupt event occurred", + '01': "High power mode & Interrupt event cleared", + '02': "Low power mode & Interrupt event occurred", + '03': "Low power mode & Interrupt event cleared" +} + +type_of_module_low_power_control = { + '00': "High power mode", + '01': "Low power mode" +} + +type_of_identifier = { + '18': "QSFP-DD" +} + +class cpobase(object): + + def __init__(self) -> None: + self.version = 0.1 + self.eeprom_retry_times = 5 + self.eeprom_retry_break_sec = 0.2 + self.pidfile_dict = dict() + self.page_dict = dict() + self.bank_dict = dict() + self.oe_eeprom_lock_map = dict() + + def test_bit(self, n, bitpos): + try: + mask = 1 << bitpos + if (n & mask) == 0: + return 0 + else: + return 1 + except Exception: + return -1 + + def twos_comp(self, num, bits): + try: + if ((num & (1 << (bits - 1))) != 0): + num = num - (1 << bits) + return num + except Exception: + return 0 + + def mw_to_dbm(self, mW): + if mW == 0: + return float("-inf") + elif mW < 0: + return float("NaN") + return 10. * math.log10(mW) + + def power_in_dbm_str(self, mW): + return "%.4f%s" % (self.mw_to_dbm(mW), "dBm") + + # Convert Date to String + def convert_date_to_string(self, eeprom_data, offset, size): + try: + year_offset = 0 + month_offset = 2 + day_offset = 4 + lot_offset = 6 + + date = self.convert_hex_to_string(eeprom_data, offset, offset + size) + retval = "20"+ date[year_offset:month_offset] + "-" + \ + date[month_offset:day_offset] + "-" + \ + date[day_offset:lot_offset] + " " + \ + date[lot_offset:size] + except Exception as err: + retval = str(err) + return retval + + # Convert Hex to String + def convert_hex_to_string(self, arr, start, end): + try: + ret_str = '' + for n in range(start, end): + ret_str += arr[n] + return binascii.unhexlify(ret_str).decode("utf-8", "ignore").strip() + except Exception as err: + return str(err) + + def parse_rlm_element(self, eeprom_data, eeprom_ele, start_pos): + value = None + offset = eeprom_ele.get('offset') + start_pos + size = eeprom_ele.get('size') + type = eeprom_ele.get('type') + decode = eeprom_ele.get('decode') + bitmask = eeprom_ele.get('bitmask', None) + bitvalue_map = eeprom_ele.get('bitvalue_map', None) + + if type == 'enum': + # Get the matched value + if bitmask != None: + key_value_int = int(eeprom_data[offset], 16) & bitmask + key_value_str = str(hex(key_value_int)[2:].zfill(2)) + else: + key_value_str = str(eeprom_data[offset]) + value = decode.get(key_value_str, 'Unknown') + + elif type == 'bitmap': + # Get the 'on' bitname + bitvalue_dict = {} + for bitname, bitinfo in sorted(decode.items()): + bitinfo_offset = bitinfo.get('offset') + start_pos + bitinfo_pos = bitinfo.get('bit') + bitinfo_value = bitinfo.get('value') + data = int(eeprom_data[bitinfo_offset], 16) + bit_value = self.test_bit(data, bitinfo_pos) + if bitinfo_value != None: + if bit_value == bitinfo_value: + value = bitname + break + elif bit_value == 1: + value = bitname + break + + elif type == 'bitvalue': + # Get the value of the bit + bitpos = eeprom_ele.get('bit') + data = int(eeprom_data[offset], 16) + bitval = self.test_bit(data, bitpos) + if bitvalue_map != None: + value = bitvalue_map[bitval] + else: + value = ['Off', 'On'][bitval] + + elif type == 'func': + # Call the decode func to get the value + value = decode['func'](self, eeprom_data, + offset, size) + + elif type == 'str': + value = self.convert_hex_to_string(eeprom_data, offset, + offset + size) + + elif type == 'int': + value = int(eeprom_data[offset], 16) + if bitmask != None: + value = value & bitmask + + elif type == 'date': + value = self.convert_date_to_string(eeprom_data, offset, + size) + + elif type == 'hex': + if size == 1: + value = "0x{}".format(eeprom_data[offset]) + elif size > 1: + value = '-'.join(eeprom_data[offset:offset+size]) + + return value + + # Recursively parses sff data into dictionary + def parse_rlm(self, eeprom_map, eeprom_data, start_pos): + outdict = {} + for name, meta_data in sorted(eeprom_map.items()): + type = meta_data.get('type') + + # Initialize output value + value_dict = {} + value_dict['outtype'] = meta_data.get('outtype') + value_dict['short_name'] = meta_data.get('short_name') + + if type != 'nested': + data = self.parse_rlm_element(eeprom_data, + meta_data, start_pos) + else: + nested_map = meta_data.get('decode') + data = self.parse_rlm(nested_map, + eeprom_data, start_pos) + + if data != None: + value_dict['value'] = data + outdict[name] = value_dict + + return outdict + + def parse(self, eeprom_map, eeprom_data, start_pos): + """ Example Return format: + {'version': '1.0', 'data': {'Length50um(UnitsOf10m)': + {'outtype': None, 'value': 8, 'short_name': None}, + 'TransceiverCodes': {'outtype': None, 'value': + {'10GEthernetComplianceCode': {'outtype': None, 'value': + '10G Base-SR', 'short_name': None}}, 'short_name': None}, + 'ExtIdentOfTypeOfTransceiver': {'outtype': None, 'value': + 'GBIC/SFP func defined by two-wire interface ID', 'short_name': + None}, 'Length62.5um(UnitsOfm)': {'outtype': None,""" + + outdict = {} + return_dict = {} + + outdict = self.parse_rlm(eeprom_map, eeprom_data, start_pos) + + return_dict['version'] = self.version + return_dict['data'] = outdict + + return return_dict + + # Returns sff parsed data in a pretty dictionary format + def get_data_pretty_dict(self, indict): + outdict = {} + + for elem, elem_val in sorted(indict.items()): + value = elem_val.get('value') + if type(value) == dict: + outdict[elem] = self.get_data_pretty_dict(value) + else: + outdict[elem] = value + + return outdict + + def get_data_pretty(self, indata): + """Example Return format: + {'version': '1.0', 'data': {'Length50um(UnitsOf10m)': 8, + 'TransceiverCodes': {'10GEthernetComplianceCode': + '10G Base-SR'}, 'ExtIdentOfTypeOfTransceiver': 'GBIC/SFP func + defined by two-wire interface ID', 'Length62.5um(UnitsOfm)': 3, + 'VendorPN': 'FTLX8571D3BNL', 'RateIdentifier': 'Unspecified', + 'NominalSignallingRate(UnitsOf100Mbd)': 103, 'VendorOUI': ..}} + {'version': '1.0', 'data': {'AwThresholds': + {'TXPowerLowWarning': '-5.0004 dBm', 'TempHighWarning': + '88.0000C', 'RXPowerHighAlarm': '0.0000 dBm', + 'TXPowerHighAlarm': '-0.7998 dBm', 'RXPowerLowAlarm': + '-20.0000 dBm', 'RXPowerHighWarning': '-1.0002 dBm', + 'VoltageLowAlarm': '2.9000Volts'""" + + return_dict = {} + + return_dict['version'] = indata.get('version') + return_dict['data'] = self.get_data_pretty_dict(indata.get( + 'data')) + return return_dict + + def get_eeprom_path(self, oe): + raise NotImplementedError + + def read_eeprom(self, oe, page, offset, num_bytes): + self._oe_lock_auquire(oe) + try: + # temp solution for CPO byte0 bug, remove me when it fixed + if offset == 0: + self._switch_page(oe, page=0) + if offset >= 128: + self._switch_page(oe, page) + # for other page, need to convert flat_mem offset to single page offset + ret = self._read_eeprom(oe, offset, num_bytes) + except: + ret = None + finally: + self._oe_lock_release(oe) + + return ret + + def write_eeprom(self, oe, page, offset, num_bytes, write_buffer): + self._oe_lock_auquire(oe) + try: + # temp solution for CPO byte0 bug, remove me when it fixed + if offset == 0: + self._switch_page(oe, page=0) + if offset >= 128: + self._switch_page(oe, page) + # for other page, need to convert flat_mem offset to single page offset + ret = self._write_eeprom(oe, offset, num_bytes, write_buffer) + except: + ret = False + finally: + self._oe_lock_release(oe) + + return ret + + def _oe_lock_auquire(self, oe): + oe_lock = self.oe_eeprom_lock_map.get(oe, None) + if oe_lock == None: + oe_lock = threading.Lock() + self.oe_eeprom_lock_map[oe] = oe_lock + return oe_lock.acquire() + + def _oe_lock_release(self, oe): + oe_lock = self.oe_eeprom_lock_map.get(oe, None) + if oe_lock == None: + return None + return oe_lock.release() + + def _reset_page_bank_cache(self, oe): + self.page_dict[oe] = None + self.bank_dict[oe] = None + + def _switch_bank(self, oe, bank): + if self.bank_dict.get(oe, None) == bank: + return True + self.bank_dict[oe] = None + + bank_offset = 126 #0x7e + num_bytes = 1 + self._write_eeprom(oe, bank_offset, num_bytes, bytearray([bank])) + cur_bank = self._read_eeprom(oe, bank_offset, num_bytes)[0] + if cur_bank == bank: + self.bank_dict[oe] = cur_bank + return True + return False + + def _switch_page(self, oe, page): + if self.page_dict.get(oe, None) == page: + return True + self.page_dict[oe] = None + + page_offset = 127 #0x7f + num_bytes = 1 + self._write_eeprom(oe, page_offset, num_bytes, bytearray([page])) + cur_page = self._read_eeprom(oe, page_offset, num_bytes)[0] + if cur_page == page: + self.page_dict[oe] = cur_page + return True + return False + + def read_fpga(self, path, offset, num_bytes): + time.sleep(0.01) + eeprom_raw = [] + for i in range(0, num_bytes): + eeprom_raw.append("0x00") + try: + with open(path, mode='rb', buffering=0) as f: + f.seek(offset) + raw = f.read(num_bytes) + raw = bytearray(raw) + for n in range(0, num_bytes): + eeprom_raw[n] = hex(raw[n])[2:].zfill(2) + return eeprom_raw + except BaseException: + print(traceback.format_exc()) + # self._sfplog(LOG_ERROR_LEVEL, traceback.format_exc()) + pass + return None + + def _read_eeprom(self, oe, offset, num_bytes): + eeprom_raw = [] + for i in range(0, num_bytes): + eeprom_raw.append("0x00") + + try: + for i in range(self.eeprom_retry_times): + with open(self.get_eeprom_path(oe), mode='rb', buffering=0) as f: + f.seek(offset) + raw = f.read(num_bytes) + # temporary solution for a sonic202111 bug + raw = bytearray(raw) + + for n in range(0, num_bytes): + eeprom_raw[n] = hex(raw[n])[2:].zfill(2) + + return eeprom_raw + + except BaseException: + print(traceback.format_exc()) + # self._sfplog(LOG_ERROR_LEVEL, traceback.format_exc()) + pass + return None + + def _write_eeprom(self, oe, offset, num_bytes, write_buffer): + for i in range(self.eeprom_retry_times): + try: + with open(self.get_eeprom_path(oe), mode='r+b', buffering=0) as f: + f.seek(offset) + f.write(write_buffer[0:num_bytes]) + return True + except BaseException: + print(traceback.format_exc()) + time.sleep(self.eeprom_retry_break_sec) + return False + + def _file_rw_lock(self, oe): + pidfile = self.pidfile_dict.get(oe, None) + if pidfile == None: + pidfile = open(self.get_eeprom_path(oe), "r") + self.pidfile_dict[oe] = pidfile + if pidfile == None: + return False + # Retry 100 times to lock file + for i in range(0, 100): + try: + fcntl.flock(pidfile, fcntl.LOCK_EX | fcntl.LOCK_NB) + self._reset_page_bank_cache(oe) + return True + except Exception: + time.sleep(0.05) + continue + + pidfile.close() + self.pidfile_dict[oe] = None + return False + + def _file_rw_unlock(self, oe): + pidfile = self.pidfile_dict.get(oe, None) + if pidfile == None: + return True + try: + fcntl.flock(pidfile, fcntl.LOCK_UN) + pidfile.close() + self.pidfile_dict[oe] = None + return True + except Exception as e: + print("file unlock err, msg:%s" % (str(e))) + return False + + def calc_reversion(self, eeprom_data, offset, size): + # Management interface revision; the upper nibble is the whole number part and the lower nibble is the decimal part. + # Example: 01h indicates version 0.1, 21h indicates version 2.1. + int_data = int(eeprom_data[0], 16) + msb = (int_data & 0xF0) >> 4 + lsb = int_data & 0x0F + return ("{}.{}".format(int(msb), int(lsb))) + + def calc_maximum_power_consumption(self, eeprom_data, offset, size): + # Maximum worst case Module power consumption represented in increaments of 0.25w/bit. + # Example: 12W = 12/0.25 = 48 -->0x30 + try: + power_num = int(eeprom_data[offset], 16) + retval = '%.2f' %(power_num/4) + 'W' + except Exception as err: + retval = str(err) + return retval + + def calc_temperature(self, eeprom_data, offset, size): + # Internally measured temperature: signed 2’s complement in 1/256 degree Celsius increments + try: + cal_type = 1 + + msb = int(eeprom_data[offset], 16) + lsb = int(eeprom_data[offset + 1], 16) + + result = (msb << 8) | (lsb & 0xff) + result = self.twos_comp(result, 16) + + if cal_type == 1: + # Internal calibration + result = float(result / 256.0) + retval = '%.4f' %result + 'C' + else: + retval = 'Unknown' + except Exception as err: + retval = str(err) + + return retval + + def calc_voltage(self, eeprom_data, offset, size): + # Internally measured 3.3 Volt input supply voltage, signed 16 bit value in 100 μV increments + try: + cal_type = 1 + msb = int(eeprom_data[offset], 16) + lsb = int(eeprom_data[offset + 1], 16) + result = (msb << 8) | (lsb & 0xff) + if cal_type == 1: + # Internal Calibration + result = float(result * 0.0001) + #print(indent, name, ' : %.4f' %result, 'Volts') + retval = '%.4f' %result + 'Volts' + else: + #print(indent, name, ' : Unknown') + retval = 'Unknown' + except Exception as err: + retval = str(err) + return retval + + def calc_voltage_type_2(self, eeprom_data, offset, size): + # Internally measured laser bias voltage monitor. Unsigned integer in 10μV increments. + # print('Laser%d voltage: %.03f mV' % (i, pageL_data[58 + i] / 100)) + return '%.03f mV' % (int(eeprom_data[offset], 16)/100) + + def calc_bias(self, eeprom_data, offset, size): + # Internally measured laser bias current monitor. Unsigned integer in 100μA increments. + # print('Laser%d Current: %.03f mA' % (i, ((pageL_data[26 + 2 * i] * 256 + pageL_data[27 + 2 * i]) / 100))) + return '%.03f mA' % ((int(eeprom_data[offset], 16) * 256 + int(eeprom_data[offset + 1], 16))/100) + + def calc_power(self, eeprom_data, offset, size): + # Internally measured laser optical power monitor. Unsigned integer in 10μW increments. + # print('Laser%d power: %.03f mW %.03f dBm' % (i, PmW, Pdb)) + PmW = (int(eeprom_data[offset], 16) * 256 + int(eeprom_data[offset + 1], 16)) / 100 + if PmW > 0: + Pdb = 10 * math.log(PmW, 10) + else: + Pdb = -40 + return '%.03f mW %.03f dBm' % (PmW, Pdb) + + rlm_identifier = { + 'Identifier': { + 'offset':0, + 'size':1, + 'type': 'enum', + 'decode': type_of_identifier + } + } + + rlm_reversion = { + 'Reversion': { + 'offset':0, + 'size':1, + 'type': 'func', + 'decode': { + 'func': calc_reversion + } + } + } + + type_of_laser_grid = { + '00': "CWDM4", + '10': "DR4" + } + + laser_grid_and_count_items = { + 'Laser grid': { + 'offset': 0, + 'size': 1, + 'type': 'enum', + 'bitmask': 0x10, + 'decode': type_of_laser_grid + }, + # Number of lases implemented in module. Count start at 0. + 'Laser count': { + 'offset': 0, + 'size': 1, + 'type': 'int', + 'bitmask': 0x0F + } + } + + rlm_laser_grid_and_count = { + 'Laser grid and count': { + 'offset': 0, + 'size': 1, + 'type': 'nested', + 'decode': laser_grid_and_count_items + } + } + + rlm_module_state_and_interrupt = { + 'Module state & Interrupt': { + 'offset': 0, + 'size': 1, + 'type': 'enum', + 'decode': type_of_module_state_and_interrupt + } + } + + rlm_module_low_power_control = { + 'Module low power control': { + 'offset': 0, + 'size': 1, + 'type': 'enum', + 'decode': type_of_module_low_power_control + } + } + + def laser_mask_gen(key, bitvalue_map=None): + output = dict() + for offset in range(2): + for bit in range(8): + output["Laser{:02d} {}".format(bit+offset*8, key)] = { + "offset": offset, + "bit": bit, + "type": 'bitvalue', + "bitvalue_map": bitvalue_map + } + return output + + laser_active_status_masks = laser_mask_gen("active status", ["Inactive", "Active"]) + laser_disable_control_masks = laser_mask_gen("disable control", ["Enable", "Disable"]) + + vcc_and_temperature_warning_alarm_masks = { + 'Latched high temperature alarm flag': + {'offset':0, + 'bit': 0, + 'type': 'bitvalue'}, + 'Latched low temperature alarm flag': + {'offset':0, + 'bit': 1, + 'type': 'bitvalue'}, + 'Latched high temperaturer warning flag': + {'offset':0, + 'bit': 2, + 'type': 'bitvalue'}, + 'Latched low temperature warning flag': + {'offset':0, + 'bit': 3, + 'type': 'bitvalue'}, + 'Latched high Vcc alarm flag': + {'offset':0, + 'bit': 4, + 'type': 'bitvalue'}, + 'Latched low Vcc alarm flag': + {'offset':0, + 'bit': 5, + 'type': 'bitvalue'}, + 'Latched high Vcc warning flag': + {'offset':0, + 'bit': 6, + 'type': 'bitvalue'}, + 'Latched low Vcc warning flag': + {'offset':0, + 'bit': 7, + 'type': 'bitvalue'}, + } + + rlm_laser_disable_control = { + 'Laser disable control': { + 'offset': 0, + 'size': 2, + 'type': 'nested', + 'decode': laser_disable_control_masks + } + } + + rlm_laser_active_status = { + 'Laser active status': { + 'offset': 0, + 'size': 2, + 'type': 'nested', + 'decode': laser_active_status_masks + } + } + + rlm_vcc_and_temperature_warning_alarm = { + "Vcc 3.3V & Temperature low/high warning/alarm": { + 'offset': 0, + 'size': 1, + 'type': 'nested', + 'decode': vcc_and_temperature_warning_alarm_masks + } + } + + laser_bias_warning_masks = laser_mask_gen("bias warning") + laser_bias_alarm_masks = laser_mask_gen("bias alarm") + + rlm_laser_bias_warning = { + "Laser bias warning": { + 'offset': 0, + 'size': 2, + 'type': 'nested', + 'decode': laser_bias_warning_masks + } + } + + rlm_laser_bias_alarm = { + "Laser bias alarm": { + 'offset': 0, + 'size': 2, + 'type': 'nested', + 'decode': laser_bias_alarm_masks + } + } + + rlm_module_temperature_monitor = { + 'Module Temperature Monitor': { + 'offset': 0, + 'size': 2, + 'type': 'func', + 'decode': { + 'func': calc_temperature + } + } + } + + rlm_module_supply_voltage_monitor = { + 'Module supply voltage Monitor': { + 'offset': 0, + 'size': 2, + 'type': 'func', + 'decode': { + 'func': calc_voltage + } + } + } + + rlm_vendor_infomation_items = { + 'Vendor Name': { + 'offset': 0, + 'size': 16, + 'type': 'str' + }, + 'Vendor OUI': { + 'offset': 16, + 'size': 3, + 'type': 'hex' + }, + 'Vendor PN': { + 'offset': 19, + 'size': 16, + 'type': 'str' + }, + 'Vendor Rev': { + 'offset': 35, + 'size': 2, + 'type': 'str' + }, + 'Vendor SN': { + 'offset': 37, + 'size': 16, + 'type': 'str' + }, + # 'Vendor Date Code(YYYY-MM-DD Lot)': { + 'Vendor Date': { + 'offset': 53, + 'size': 8, + 'type': 'date' + } + } + + # TODO: CLEI Code + + rlm_vendor_infomation = { + 'Vendor infomation': { + 'offset': 0, + 'size': 61, + 'type': 'nested', + 'decode': rlm_vendor_infomation_items + } + } + + rlm_maximum_power_consumption = { + 'Maximum power consumption': { + 'offset': 0, + 'size': 1, + 'type': 'func', + 'decode': { + 'func': calc_maximum_power_consumption + } + } + } + + rlm_laser_power_mode_control = { + 'Laser power mode control': { + 'offset': 0, + 'size': 1, + 'type': 'hex' + } + } + + rlm_dom_threshold_items = { + 'Temp High Alarm': { + 'offset': 0, + 'size': 2, + 'type': 'func', + 'decode': { + 'func': calc_temperature + } + }, + 'Temp Low Alarm': { + 'offset': 2, + 'size': 2, + 'type': 'func', + 'decode': { + 'func': calc_temperature + } + }, + 'Temp High Warning': { + 'offset': 4, + 'size': 2, + 'type': 'func', + 'decode': { + 'func': calc_temperature + } + }, + 'Temp Low Warning': { + 'offset': 6, + 'size': 2, + 'type': 'func', + 'decode': { + 'func': calc_temperature + } + }, + 'Vcc High Alarm': { + 'offset': 8, + 'size': 2, + 'type': 'func', + 'decode': { + 'func': calc_voltage + } + }, + 'Vcc Low Alarm': { + 'offset': 10, + 'size': 2, + 'type': 'func', + 'decode': { + 'func': calc_voltage + } + }, + 'Vcc High Warning': { + 'offset': 12, + 'size': 2, + 'type': 'func', + 'decode': { + 'func': calc_voltage + } + }, + 'Vcc Low Warning': { + 'offset': 14, + 'size': 2, + 'type': 'func', + 'decode': { + 'func': calc_voltage + } + }, + 'TX Power High Alarm': { + 'offset': 16, + 'size': 2, + 'type': 'func', + 'decode': { + 'func': calc_power + } + }, + 'TX Power Low Alarm': { + 'offset': 18, + 'size': 2, + 'type': 'func', + 'decode': { + 'func': calc_power + } + }, + 'TX Power High Warning': { + 'offset': 20, + 'size': 2, + 'type': 'func', + 'decode': { + 'func': calc_power + } + }, + 'TX Power Low Warning': { + 'offset': 22, + 'size': 2, + 'type': 'func', + 'decode': { + 'func': calc_power + } + }, + 'Tx Bias High Alarm': { + 'offset': 24, + 'size': 2, + 'type': 'func', + 'decode': { + 'func': calc_bias + } + }, + 'Tx Bias High Warning': { + 'offset': 26, + 'size': 2, + 'type': 'func', + 'decode': { + 'func': calc_bias + } + } + } + + rlm_dom_threshold = { + 'ThresholdValues': { + 'offset': 0, + 'size': 28, + 'type': 'nested', + 'decode': rlm_dom_threshold_items + } + } + + def laser_items_gen(key, func, offset, size): + output = dict() + laser_size = int(size/16) + for laser_index in range(16): + output["Laser{:02d} {}".format(laser_index, key)] = { + "offset": offset + laser_size * laser_index, + "size": laser_size, + "type": 'func', + 'decode': { + 'func': func + } + } + return output + + rlm_monitor_values = { + 'Laser current monitor': { + 'offset': 0, + 'size': 32, + 'type': 'nested', + 'decode': laser_items_gen('current monitor', calc_bias, 0, 32) + }, + 'Laser voltage monitor': { + 'offset': 32, + 'size': 16, + 'type': 'nested', + 'decode': laser_items_gen('voltage monitor', calc_voltage_type_2, 32, 16) + }, + 'Laser opitcal power monitor': { + 'offset': 49, + 'size': 32, + 'type': 'nested', + 'decode': laser_items_gen('opitcal power monitor', calc_power, 49, 32) + } + } + + def calc_tec_current_monitor(self, eeprom_data, offset, size): + # TEC current monitor signed 2's complement number in 1/32767% increments + # +32767 is max TEC current (100%) - Max heating + # -32767 is min TEC current (100%) - Max cooling + try: + cal_type = 1 + msb = int(eeprom_data[offset], 16) + lsb = int(eeprom_data[offset + 1], 16) + result = (msb << 8) | (lsb & 0xff) + result = self.twos_comp(result, 16) + if cal_type == 1: + result = float(result / 32767)*100 + retval = '%.2f' %result + '%' + else: + #print(indent, name, ' : Unknown') + retval = 'Unknown' + except Exception as err: + retval = str(err) + return retval + + rlm_tec_current_monitor = { + 'TEC current monitor': { + 'offset': 0, + 'size': 2, + 'type': 'func', + 'decode': { + 'func': calc_tec_current_monitor + } + } + } + + def parse_identifier(self, sn_raw_data, start_pos): + return self.get_data_pretty(self.parse(self.rlm_identifier, sn_raw_data, start_pos)) + + def parse_reversion(self, sn_raw_data, start_pos): + return self.get_data_pretty(self.parse(self.rlm_reversion, sn_raw_data, start_pos)) + + def parse_laser_grid_and_count(self, sn_raw_data, start_pos): + return self.get_data_pretty(self.parse(self.rlm_laser_grid_and_count, sn_raw_data, start_pos)) + + def parse_module_state_and_interrupt(self, sn_raw_data, start_pos): + return self.get_data_pretty(self.parse(self.rlm_module_state_and_interrupt, sn_raw_data, start_pos)) + + def parse_module_low_power_control(self, sn_raw_data, start_pos): + return self.get_data_pretty(self.parse(self.rlm_module_low_power_control, sn_raw_data, start_pos)) + + def parse_laser_disable_control(self, sn_raw_data, start_pos): + return self.get_data_pretty(self.parse(self.rlm_laser_disable_control, sn_raw_data, start_pos)) + + def parse_laser_active_status(self, sn_raw_data, start_pos): + return self.get_data_pretty(self.parse(self.rlm_laser_active_status, sn_raw_data, start_pos)) + + def parse_vcc_and_temperature_warning_alarm(self, sn_raw_data, start_pos): + return self.get_data_pretty(self.parse(self.rlm_vcc_and_temperature_warning_alarm, sn_raw_data, start_pos)) + + def parse_laser_bias_warning(self, sn_raw_data, start_pos): + return self.get_data_pretty(self.parse(self.rlm_laser_bias_warning, sn_raw_data, start_pos)) + + def parse_laser_bias_alarm(self, sn_raw_data, start_pos): + return self.get_data_pretty(self.parse(self.rlm_laser_bias_alarm, sn_raw_data, start_pos)) + + def parse_module_temperature_monitor(self, sn_raw_data, start_pos): + return self.get_data_pretty(self.parse(self.rlm_module_temperature_monitor, sn_raw_data, start_pos)) + + def parse_module_supply_voltage_monitor(self, sn_raw_data, start_pos): + return self.get_data_pretty(self.parse(self.rlm_module_supply_voltage_monitor, sn_raw_data, start_pos)) + + def parse_vendor_infomation(self, sn_raw_data, start_pos): + return self.get_data_pretty(self.parse(self.rlm_vendor_infomation, sn_raw_data, start_pos)) + + def parse_maximum_power_consumption(self, sn_raw_data, start_pos): + return self.get_data_pretty(self.parse(self.rlm_maximum_power_consumption, sn_raw_data, start_pos)) + + def parse_laser_power_mode_control(self, sn_raw_data, start_pos): + return self.get_data_pretty(self.parse(self.rlm_laser_power_mode_control, sn_raw_data, start_pos)) + + # TODO + def parse_dom_threshold(self, sn_raw_data, start_pos): + return self.get_data_pretty(self.parse(self.rlm_dom_threshold, sn_raw_data, start_pos)) + + def parse_monitor_values(self, sn_raw_data, start_pos): + return self.get_data_pretty(self.parse(self.rlm_monitor_values, sn_raw_data, start_pos)) + + def parse_tec_current_monitor(self, sn_raw_data, start_pos): + return self.get_data_pretty(self.parse(self.rlm_tec_current_monitor, sn_raw_data, start_pos)) + + +class cpo_cust(cpobase): + + def __init__(self): + super().__init__() + self.port_mapping = Port_Mapping() + + def get_oe_list(self): + return CPO_PLATFORM_CONFIG.get("oe_index_list", list()) + + def get_rlm_list_by_oe(self, oe): + rlm_oe_map = CPO_PLATFORM_CONFIG.get("rlm_oe_map", dict()) + rlm_list = list() + for rlm_index, oe_index in rlm_oe_map.items(): + if oe_index != oe: + continue + rlm_list.append(rlm_index) + return rlm_list + + def get_rlm_list(self): + return CPO_PLATFORM_CONFIG.get("rlm_index_list", list()) + + def get_oe_by_rlm(self, rlm): + rlm_oe_map = CPO_PLATFORM_CONFIG.get("rlm_oe_map", dict()) + return rlm_oe_map.get(rlm, None) + + def get_port_index_list(self): + return PORT_INDEX_LIST + + def get_port_index_list_by_oe(self, oe_index): + return self.port_mapping.oe_index_to_port_index_list(oe_index) + + def get_oe_by_port_index(self, port_index): + return self.port_mapping.port_index_to_oe_index(port_index) + + def get_bank_by_port_index(self, port_index): + bank_global_index = self.port_mapping.port_index_to_bank_index(port_index) + return self.port_mapping.bank_global_index_to_local_index(bank_global_index) + + def write_eeprom_by_port_index(self, port_index, page, offset, num_bytes, write_buffer): + oe = self.get_oe_bank_by_port(port_index)["oe"] + bank = self.get_oe_bank_by_port(port_index)["bank"] + # TODO: should lock oe + self._switch_bank(oe, bank) + return self.write_eeprom(oe, page, offset, num_bytes, write_buffer) + + def read_eeprom_by_port_index(self, port_index, page, offset, num_bytes): + oe = self.get_oe_bank_by_port(port_index)["oe"] + bank = self.get_oe_bank_by_port(port_index)["bank"] + # TODO: should lock oe + self._switch_bank(oe, bank) + return self.read_eeprom(oe, page, offset, num_bytes) + + def get_eeprom_path(self, oe_index): + return OE_I2C_PATH_MAP.get(oe_index, None) + + def get_oe_bank_by_port(self, port_index): + if port_index not in self.get_port_index_list(): + raise CpoException("port_index out of range") + oe = self.get_oe_by_port_index(port_index) + bank = self.get_bank_by_port_index(port_index) + lane_list = self.port_mapping.get_port_lane_list(port_index) + lane = lane_list[0] + return {"oe": oe, "bank": bank, "lane": lane} + + def get_speed(self, port_index): + lane = self.get_oe_bank_by_port(port_index)["lane"] + + if lane == 0: + apsel_contrl_value = int(self.read_eeprom_by_port_index(port_index, 0x11, 0xce, 1)[0], 16) + else: + apsel_contrl_value = int(self.read_eeprom_by_port_index(port_index, 0x11, 0xd2, 1)[0], 16) + + apsel_contrl_value = apsel_contrl_value & 0xF0 + + if apsel_contrl_value == 0x10: + return 400000 + elif apsel_contrl_value == 0x20: + return 200000 + elif apsel_contrl_value == 0x40: + return 100000 + else: + raise CpoException("speed out of range, apsel_contrl_value: {}".format(apsel_contrl_value)) + + def get_rlm_presence(self, rlm): + presence = False + oe = self.get_oe_by_rlm(rlm) + if self.get_rlm_list(oe).index(rlm) == 0: + RLM_PAGE_BASE_OFFSET = RLMA_PAGE_BASE_OFFSET + else: + RLM_PAGE_BASE_OFFSET = RLMB_PAGE_BASE_OFFSET + try: + if not self._file_rw_lock(oe): + return False + rlm_vendor_infomation_raw = self.read_eeprom(oe, RLM_VENDOR_INFOMATION_PAGE + RLM_PAGE_BASE_OFFSET, RLM_VENDOR_INFOMATION_OFFSET, RLM_VENDOR_INFOMATION_WIDTH) + rlm_b1_checksum_raw = self.read_eeprom(oe, RLM_B1_CEHCK_SUM_PAGE + RLM_PAGE_BASE_OFFSET, RLM_B1_CEHCK_SUM_OFFSET, RLM_B1_CEHCK_SUM_WIDTH) + b1_page_sum = sum([int(byte, 16) for byte in rlm_vendor_infomation_raw])&0xff + if b1_page_sum != int(rlm_b1_checksum_raw[0], 16): + raise CpoException("page b1 byte 80 to byte 250 checksum failed, {} != {}".format(b1_page_sum, int(rlm_b1_checksum_raw[0], 16))) + if b1_page_sum != 0: + presence = True + except CpoException: + pass + except BaseException: + print(traceback.format_exc()) + finally: + self._file_rw_unlock(oe) + return presence + + def reset_oe(self, oe_list: list): + byte = 0xff + oe_list = [oe_index - CPO_PLATFORM_CONFIG.get("oe_index_start_index") for oe_index in oe_list] + for oe_index in oe_list: + byte = byte & ~(0x01 << oe_index) + result = os_command_i2cset_oe_reset_byte(byte) + if result != 0: + return False + time.sleep(0.5) + result = os_command_i2cset_oe_reset_byte("0xff") + time.sleep(5) + return result == 0 + +class cpo_v1(cpo_cust): + def __init__(self): + super().__init__() + self.presence_fpga_dict = CPO_PLATFORM_CONFIG.get("rlm_presence_fpga_dict", {}) + + def get_rlm_presence(self, rlm_index): + presence = False + if self.presence_fpga_dict == None: + return presence + try: + for dev, dev_value in self.presence_fpga_dict.items(): + for offset, offset_value in dev_value["offset"].items(): + if rlm_index not in offset_value: + continue + fpga_data = self.read_fpga(dev, int(offset, 16), 4) + if fpga_data == None: + continue + rlm_bit_index = offset_value.index(rlm_index) + presence = (~int(fpga_data[rlm_bit_index // 8], 16)) & (0x1 << (rlm_bit_index % 8)) + return presence + except BaseException: + print(traceback.format_exc()) + return presence + +class cmis_memory_map(cmis_memory_helper_base): + + def __init__(self, oe_index, bank_index=0) -> None: + super().__init__() + self.oe_index = oe_index + self.bank_index = bank_index + self.retry_times = 20 + + def read(self, page, addr, rd_len=1): + retry_count = 0 + status, output = cmis_util.cmis_read(self.oe_index, self.bank_index, page, addr, rd_len, lock=True) + if status == True: + helper_logger.log_trace("cmis_read, status: {}, page: {}, bank: {}, addr: {}, output: {}".format( + status, page, self.bank_index, addr, [hex(data) for data in output])) + while (status == False) and (retry_count < self.retry_times): + helper_logger.log_trace("cmis_read, status: {}, page: {}, bank: {}, addr: {}, output: {}".format( + status, page, self.bank_index, addr, output)) + retry_count += 1 + status, output = cmis_util.cmis_read(self.oe_index, self.bank_index, page, addr, rd_len, lock=True) + time.sleep(0.05) + if status == True: + helper_logger.log_trace("cmis_read, status: {}, page: {}, bank: {}, addr: {}, output: {}".format( + status, page, self.bank_index, addr, [hex(data) for data in output])) + return status, output + + def write(self, page, addr, data): + retry_count = 0 + status, output = cmis_util.cmis_write(self.oe_index, self.bank_index, page, addr, data, lock=True) + helper_logger.log_trace("cmis_write, status: {}, page: {}, bank: {}, addr: {}, input: {}".format( + status, page, self.bank_index, addr, [hex(item) for item in data])) + while (status == False) and (retry_count < self.retry_times): + helper_logger.log_trace("cmis_write, status: {}, page: {}, bank: {}, addr: {}, input: {}".format( + status, page, self.bank_index, addr, [hex(item) for item in data])) + retry_count += 1 + status, output = cmis_util.cmis_write(self.oe_index, self.bank_index, page, addr, data, lock=True) + time.sleep(0.05) + return status, output + +def get_all_oe_vendor_info(): + global cmis_util + cpoutil = cpoutil_v2() + ret = dict() + for oe_index in cpoutil.get_oe_list(): + cmis_util = oe_cmis_sysfs_rw() + cmis_mem = cmis_memory_map(oe_index) + ret[oe_index] = cmis_mem.get_field("Vendor infomation") + return ret + +def get_all_rlm_vendor_info(): + ret_dict = dict() + cpoutil = cpoutil_v2() + for rlm_index in cpoutil.get_rlm_list(): + rlm_vendor_info_dict = cpoutil.get_rlm_sn(rlm_index) + ret_dict[rlm_index] = rlm_vendor_info_dict["Vendor infomation"] + return ret_dict diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/cpo/lib/fw_tools/__init__.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/cpo/lib/fw_tools/__init__.py new file mode 100755 index 00000000000..e03e4ff9fba --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/cpo/lib/fw_tools/__init__.py @@ -0,0 +1,7 @@ +import sys +import os +sys.path.append(os.path.dirname(os.path.realpath(__file__))) +import cdb_app +import cmis +import i2c_driver +import utility \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/cpo/lib/fw_tools/cdb_app/__init__.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/cpo/lib/fw_tools/cdb_app/__init__.py new file mode 100755 index 00000000000..f19e5cb1d90 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/cpo/lib/fw_tools/cdb_app/__init__.py @@ -0,0 +1,3 @@ +import sys +import os +sys.path.append(os.path.dirname(os.path.realpath(__file__))) \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/cpo/lib/fw_tools/cdb_app/cdb.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/cpo/lib/fw_tools/cdb_app/cdb.py new file mode 100755 index 00000000000..c5cc8a754c4 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/cpo/lib/fw_tools/cdb_app/cdb.py @@ -0,0 +1,1084 @@ +""" +file cdb.py +author Broadcom OSD Firmware Team +date 09/22/2022 +version 1.01 - added file directory to path in order to import same level modules + +property $ Copyright: (c) 2022 Broadcom Limited All Rights Reserved $ + No portions of this material may be reproduced in any form + without the written permission of: + Broadcom Limited + 408 E. Plumeria Drive + San Jose, California 95134 + United States + All information contained in this document/file is Broadcom Limit company + private proprietary, trade secret, and remains the property of Broadcom + Limited. The intellectual and technical concepts contained herein are + proprietary to Broadcom Limited and may be covered by U.S. and Foreign Patents, + patents in process, and are protected by trade secret or copyright law. + Dissemination of this information or reproduction of this material is strictly + forbidden unless prior written permission is obtained from Broadcom Limited. + +brief This file includes all the cdb utilities + +section +""" +import os +import sys +import subprocess +import re +from util import UtilObj as u +import cmis_mcu_i2c as cmis_smb +from GS_timing import * +from array import array +from os import path +import math +import logging +import time +from oe_cmis_rw import oe_cmis_i2c_rw as oe_cmis_util + +logger = logging.getLogger() + +logger = logging.getLogger(__name__) +logger.setLevel(logging.INFO) +logger.addHandler(logging.StreamHandler(sys.stdout)) + +class cdb_cmd_fields(): + cmd_code_msb = 0x00 + cmd_code_lsb = 0x01 + epl_len_msb = 0x02 + epl_len_lsb = 0x03 + lpl_len = 0x04 + check_code = 0x05 + pwd_0 = 0x08 + addr_0 = 0x08 + pwd_1 = 0x09 + addr_1 = 0x09 + pwd_2 = 0x0A + addr_2 = 0x0A + pwd_3 = 0x0B + addr_3 = 0x0B + + +class cdbObj(object): + driver_obj = None + cmd_data = [0x00] * 12 + + def __init__(self, oe_num=0): + self.cmis_i2c = cmis_smb.cmis_mcu_mezz_smb(oe_mcu=oe_num) + self.oe_mcu = oe_num + self.cmis_util = oe_cmis_util() + + def __enter__(self): + self.cmis_i2c.open() + return self + + def __exit__(self, exc_type, exc_val, exc_tb): + self.cmis_i2c.close() + return + + def open(self): + self.cmis_i2c.open() + + def close(self): + self.cmis_i2c.close() + + def exec_rd_cmd(self, offset, rd_len, bank_num=0, page_num=0, verbose=False): + i = 0 + timeout = 25 + while i <= timeout: + try: + status, output = self.cmis_util.cmis_read(self.oe_mcu, bank_num, page_num, offset, rd_len, lock=False) + if status != True: + raise CdbException("oe_cmis_sysfs_rw READ ERROR {}".format(output)) + else: + break + except CdbException as e: + if (verbose == True): + print("An error occurred: {}".format(str(e))) + raise cmis_smb.cmis_mcu_mezz_smb_Exception('Exception on cmis_read') + if isinstance(output, list): + result = array('B', output) + else: + result = array('B', []) + return result + + def exec_wr_cmd(self, offset, wr_data_arr, bank_num=0x0, page_num=0x0, verbose=False): + try: + status, output = self.cmis_util.cmis_write(self.oe_mcu, bank_num, page_num, offset, wr_data_arr, lock=False) + if status != True: + raise CdbException("oe_cmis_sysfs_rw WRITE ERROR {}".format(output)) + except CdbException as e: + if (verbose == True): + print("An error occurred: {}".format(str(e))) + raise cmis_smb.cmis_mcu_mezz_smb_Exception('Exception on cmis_write') + offset = offset + 1 + + def set_cmd_field(self, field, val): + self.cmd_data[field] = val + + def set_word_field(self, field_msb, val): + data = [(val >> 8) & 0xFF, val & 0xFF] + self.cmd_data[field_msb] = data[0] + self.cmd_data[field_msb + 1] = data[1] + + def set_dword_field(self, field_msb, val): + data = [(val >> 24) & 0xFF, (val >> 16) & 0xFF, (val >> 8) & 0xFF, val & 0xFF] + self.cmd_data[field_msb] = data[0] + self.cmd_data[field_msb + 1] = data[1] + self.cmd_data[field_msb + 2] = data[2] + self.cmd_data[field_msb + 3] = data[3] + + def set_pwd_field(self, pwd): + self.set_cmd_field(cdb_cmd_fields.pwd_0, pwd[0]) + self.set_cmd_field(cdb_cmd_fields.pwd_1, pwd[1]) + self.set_cmd_field(cdb_cmd_fields.pwd_2, pwd[2]) + self.set_cmd_field(cdb_cmd_fields.pwd_3, pwd[3]) + + def clear_cmd_fields(self): + for i in range(len(self.cmd_data)): + self.cmd_data[i] = 0x00 + + def write_cmd_fields(self): + # self.cmis_i2c.set_page(0x9F) # set page + # self.cmis_i2c.reg_write(0x82, self.cmd_data[2:]) # write cmd fields + # self.cmis_i2c.reg_write(0x80, self.cmd_data[:2]) # write cmd + self.exec_wr_cmd(0x82, self.cmd_data[2:], 0, 0x9F) + self.exec_wr_cmd(0x80, self.cmd_data[:2], 0, 0x9F) + + def set_check_code(self, data_len=None, more_data=None): + check_sum = 0 + check_len = len(self.cmd_data) + if data_len is not None: + check_len = data_len + for i in range(check_len): + check_sum += self.cmd_data[i] + if more_data: + for data in more_data: + check_sum += data + check_sum ^= 0xFF + check_sum &= 0xFF + self.set_cmd_field(cdb_cmd_fields.check_code, check_sum) + + def poll_reg_status(self, status_reg, status_val, delay_ms=20, retry=100, ack_poll=False, verbose=False): + if ack_poll: + if not self.cmis_i2c.acknowledge_poll(timeout_ms=1000): + raise CdbException("Device I2C Nacked") + status = array('B', [status_val ^ 0xFF]) + reg_data = status_reg + if type(status_reg) != int: + reg_data = status_reg.value + for i in range(retry): + status = self.exec_rd_cmd(reg_data, 1) + # self.cmis_i2c.reg_read(reg_data, status) + if verbose: + print("Status: %02X Retry Counts: %d" % (status[0], i)) + if status[0] == status_val: + return True, status[0] + delay(delay_ms) + + return (status[0] == status_val), status[0] + + def poll_status(self, delay_ms=1, timeout=10000, force=False, get_ret=False, verbose=True): + i = 0 + status = array('B', [0]) + fw_mode = array('B', [0x55]) + while i <= timeout: + try: + status = self.exec_rd_cmd(0x25, 1) + fw_mode = self.exec_rd_cmd(0x53, 1) + # self.cmis_i2c.reg_read(0x25, status, verbose=False) + # self.cmis_i2c.reg_read(0x53, fw_mode, verbose=False) + except cmis_smb.cmis_mcu_mezz_smb_Exception: # module i2c not ready, continue to ack poll + delay(delay_ms) + i += 1 + continue + # if verbose: + # logger.debug("Status %02X Mode %02X" % (status[0], fw_mode[0])) + if not force and fw_mode[0] != 0xAA and status[0] == 0 and i > 500: # check if system is still in cdb mode, if not then probbaly reset happened + logger.error('CMD Readback Fw Mode: %02X Status Code: %02X' % (fw_mode[0], status[0])) + logger.error('CMD Failed Polling Status, Reset Occurred') + raise CdbException('CDB Mode Is No Longer Valid, A System Reset May Have Occurred') + if status[0] == 0x01: # if status is success + return True, status[0] + if (status[0] & 0x80 == 0x00) and (status[0] & 0xF0 == 0x40): # if currently not busy and failed bit is set + try: + status = self.exec_rd_cmd(0x25, 1) + # self.cmis_i2c.reg_read(0x25, status) # read the status one more time to make sure that it wasn't just the previous latched status + except cmis_smb.cmis_mcu_mezz_smb_Exception: # module i2c not ready, continue to ack poll + raise CdbException('I2C Nacked on Status Read') + if status[0] == 0x01: + return True, status[0] + if (status[0] & 0xF0 == 0x40): # check for failure again + if get_ret: + return False, status[0] + else: + logger.error('CMD Failed Status Code: %02X' % status[0]) + raise CdbException('CMD Failed Status Code: %02X' % status[0]) + delay(delay_ms) + i += 1 + if verbose: + logger.debug('CMD Poll Time Out Status Code: %02X' % status[0]) + return False, status[0] + + def cdb_unlock(self, poll_count=2, delay_s=1): + pwd = [0x00, 0x00, 0x10, 0x11] + for i in range(poll_count): + logger.debug('CDB Unlock Poll Count: %d' % i) + self.clear_cmd_fields() + self.set_pwd_field(pwd) + self.set_cmd_field(cdb_cmd_fields.lpl_len, 0x04) + self.set_word_field(cdb_cmd_fields.cmd_code_msb, 0x0001) + self.set_check_code() + self.write_cmd_fields() + ret, status = self.poll_status(delay_ms=100, timeout=100, force=True, verbose=True) + if ret: + return True + elif status == 0x46: + pwd[1] ^= 0x01 + delay(delay_s * 1000) + ret, status = self.poll_status(delay_ms=100, timeout=100, force=True, verbose=True) + if ret: + return True + else: + logger.error('CDB Failed to Unlock.') + raise CdbException('CDB Failed to Unlock.') + return False + + def cdb_lock(self, poll_count=2, delay_s=1): + pwd = [0x12, 0x34, 0x56, 0x78] + for i in range(poll_count): + logger.debug('CDB Unlock Poll Count: %d' % i) + self.clear_cmd_fields() + self.set_pwd_field(pwd) + self.set_cmd_field(cdb_cmd_fields.lpl_len, 0x04) + self.set_word_field(cdb_cmd_fields.cmd_code_msb, 0x0001) + self.set_check_code() + self.write_cmd_fields() + ret, status = self.poll_status(delay_ms=100, timeout=100, force=True, get_ret=True, verbose=True) + if status == 0x46: + return True + delay(delay_s * 1000) + ret, status = self.poll_status(delay_ms=100, timeout=100, force=True, get_ret=True, verbose=True) + if status == 0x46: + return True + else: + logger.error('CDB Failed to Lock.') + raise CdbException('CDB Failed to Lock.') + return False + + @staticmethod + def process_fw_status(fw_info, fw_info_extra=None, more=False): + img_1 = 'A' + img_2 = 'B' + fw_ver_1 = "%02X.%02X" % (fw_info[2], fw_info[3]) + fw_ver_2 = "%02X.%02X" % (fw_info[38], fw_info[39]) + if more: + fw_ver_1 = '%02X.%02X.%02X' % (fw_info[2], fw_info[3], fw_info[4]) + fw_ver_2 = '%02X.%02X.%02X' % (fw_info[38], fw_info[39], fw_info[40]) + fw_crc_1 = '%02X%02X%02X%02X' % (fw_info[6], fw_info[7], fw_info[8], fw_info[9]) + fw_crc_2 = '%02X%02X%02X%02X' % (fw_info[42], fw_info[43], fw_info[44], fw_info[45]) + ee_ver_1 = '%02X.%02X.%02X' % (fw_info[10], fw_info[11], fw_info[12]) + ee_ver_2 = '%02X.%02X.%02X' % (fw_info[46], fw_info[47], fw_info[48]) + ee_crc_1 = '%02X%02X%02X%02X' % (fw_info[13], fw_info[14], fw_info[15], fw_info[16]) + ee_crc_2 = '%02X%02X%02X%02X' % (fw_info[49], fw_info[50], fw_info[51], fw_info[52]) + if fw_info_extra is not None: + oe_fw_ver_1 = '%08X' % (u.uint8_to_uint32(fw_info_extra[0:4])) + oe_fw_ver_2 = '%08X' % (u.uint8_to_uint32(fw_info_extra[64:68])) + oe_fw_crc_1 = '%08X' % (u.uint8_to_uint32(fw_info_extra[4:8])) + oe_fw_crc_2 = '%08X' % (u.uint8_to_uint32(fw_info_extra[68:72])) + + bl_ver = '%02X.%02X.%02X' % (fw_info[74], fw_info[75], fw_info[76]) + + if fw_info[0] & 0x10: + img_1 = 'B' + img_2 = 'A' + fw_ver_2 = "%02X.%02X" % (fw_info[2], fw_info[3]) + fw_ver_1 = "%02X.%02X" % (fw_info[38], fw_info[39]) + if more: + fw_ver_2 = '%02X.%02X.%02X' % (fw_info[2], fw_info[3], fw_info[4]) + fw_ver_1 = '%02X.%02X.%02X' % (fw_info[38], fw_info[39], fw_info[40]) + fw_crc_2 = '%02X%02X%02X%02X' % (fw_info[6], fw_info[7], fw_info[8], fw_info[9]) + fw_crc_1 = '%02X%02X%02X%02X' % (fw_info[42], fw_info[43], fw_info[44], fw_info[45]) + ee_ver_2 = '%02X.%02X.%02X' % (fw_info[10], fw_info[11], fw_info[12]) + ee_ver_1 = '%02X.%02X.%02X' % (fw_info[46], fw_info[47], fw_info[48]) + ee_crc_2 = '%02X%02X%02X%02X' % (fw_info[13], fw_info[14], fw_info[15], fw_info[16]) + ee_crc_1 = '%02X%02X%02X%02X' % (fw_info[49], fw_info[50], fw_info[51], fw_info[52]) + logger.info('CDB Status: %02X' % fw_info[0]) + logger.info('Running Image: ' + img_1) + logger.info('FW Revision: ' + fw_ver_1) + logger.info('FW CRC: ' + fw_crc_1) + logger.info('EE Revision: ' + ee_ver_1) + logger.info('EE CRC: ' + ee_crc_1) + logger.info('') + logger.info('Not running Image: ' + img_2) + logger.info('FW Revision: ' + fw_ver_2) + logger.info('FW CRC: ' + fw_crc_2) + logger.info('EE Revision: ' + ee_ver_2) + logger.info('EE CRC: ' + ee_crc_2) + logger.info('') + if more: + logger.info('Bootloader Revision: ' + bl_ver) + logger.info('') + + @staticmethod + def get_fw_version_info(fw_info, fw_info_extra=None): + fw_ver = [{}, {}] + fw_ver[0]["CMIS_FW"] = {"version": bytearray(fw_info[2:4]), "crc": bytearray(fw_info[6:10])} + fw_ver[0]["CMIS_EE"] = {"version": bytearray(fw_info[10:13]), "crc": bytearray(fw_info[13:17])} + if fw_info_extra is not None: + fw_ver[0]["OE_FW"] = {"version": bytearray(fw_info_extra[2:4]), "crc": bytearray(fw_info_extra[4:8])} + fw_ver[0]["OE_EE"] = {"version": bytearray(fw_info_extra[10:12]), "crc": bytearray(fw_info_extra[12:16])} + fw_ver[0]["RLM_FW"] = {"version": bytearray(fw_info_extra[18:20]), "crc": bytearray(fw_info_extra[20:24])} + fw_ver[0]["RLM_EE"] = {"version": bytearray(fw_info_extra[26:28]), "crc": bytearray(fw_info_extra[28:32])} + + fw_ver[1]["CMIS_FW"] = {"version": bytearray(fw_info[38:40]), "crc": bytearray(fw_info[42:46])} + fw_ver[1]["CMIS_EE"] = {"version": bytearray(fw_info[46:49]), "crc": bytearray(fw_info[49:43])} + if fw_info_extra is not None: + fw_ver[1]["OE_FW"] = {"version": bytearray(fw_info_extra[66:68]), "crc": bytearray(fw_info_extra[68:72])} + fw_ver[1]["OE_EE"] = {"version": bytearray(fw_info_extra[74:76]), "crc": bytearray(fw_info_extra[76:80])} + fw_ver[1]["RLM_FW"] = {"version": bytearray(fw_info_extra[82:84]), "crc": bytearray(fw_info_extra[84:88])} + fw_ver[1]["RLM_EE"] = {"version": bytearray(fw_info_extra[90:92]), "crc": bytearray(fw_info_extra[92:96])} + + return fw_ver + + def fw_status(self, poll_count=2, delay_ms=1, verbose=True, more=True): + self.cdb_unlock(poll_count) + self.clear_cmd_fields() + self.set_word_field(cdb_cmd_fields.cmd_code_msb, 0x0100) + if more: + self.set_cmd_field(cdb_cmd_fields.lpl_len, 1) + self.set_check_code() + self.write_cmd_fields() + ret, status = self.poll_status(delay_ms=100) + if not ret: + raise CdbException('CDB FW Status Timed out from status polling') + fw_info = array('B', 120 * [0]) + # self.cmis_i2c.set_page(0x9F) + # self.cmis_i2c.reg_read(0x88, fw_info) # 120 bytes starting from byte 136 + fw_info = self.exec_rd_cmd(0x88, 120, 0, 0x9F) + fw_info_extra = array('B', 128 * [0]) + # self.cmis_i2c.set_page(0xA0) + # self.cmis_i2c.reg_read(0x80, fw_info_extra) + fw_info_extra = self.exec_rd_cmd(0x80, 128, 0, 0xA0) + if verbose: + self.process_fw_status(fw_info, fw_info_extra=fw_info_extra, more=more) + return True, fw_info, fw_info_extra + + def fw_run(self, bank=None, verbose=True): + if not self.cdb_unlock(): + return False + self.clear_cmd_fields() + self.set_word_field(cdb_cmd_fields.cmd_code_msb, 0x0109) + self.set_cmd_field(cdb_cmd_fields.lpl_len, 0x04) + if bank is not None: + self.set_cmd_field(cdb_cmd_fields.addr_1, bank) + self.set_check_code() + try: + self.write_cmd_fields() + except: + delay(5000) + if not self.cmis_i2c.acknowledge_poll(10000): + logger.info('Timed out from acknowledge polling') + raise CdbException('Timed out from acknowledge polling') + (status, info, extra_info) = self.fw_status(poll_count=100, delay_ms=5, verbose=verbose) + if not status: + logger.info('Failed running to the new loaded image') + raise CdbException('Failed running to the new loaded image') + + return True + delay(5000) + if not self.cmis_i2c.acknowledge_poll(10000): + logger.info('Timed out from acknowledge polling') + raise CdbException('Timed out from acknowledge polling') + (status, info, extra_info) = self.fw_status(poll_count=100, delay_ms=5, verbose=verbose) + if not status: + logger.info('Failed running to the new loaded image') + raise CdbException('Failed running to the new loaded image') + + return True + + def fw_commit(self): + for x in range(0, 1000): + try: + if not self.cdb_unlock(): + return False + self.clear_cmd_fields() + self.set_word_field(cdb_cmd_fields.cmd_code_msb, 0x010A) + self.set_check_code() + self.write_cmd_fields() + delay(100) + ret, status = self.poll_status(delay_ms=10, timeout=100) + if not ret: + raise CdbException('Failed committing to the new loaded image') + return True + except: + self.cmis_i2c.acknowledge_poll(timeout_ms=2000, delay_ms=1) + logger.error("CDB Commit Retry %d" % x) + continue + return True + + def fw_complete_load(self, poll_count=1000, delay_ms=10): + ret = True + for x in range(0, poll_count): + try: + self.clear_cmd_fields() + self.set_word_field(cdb_cmd_fields.cmd_code_msb, 0x0107) + self.set_check_code() + self.write_cmd_fields() + delay(100) + ret, status = self.poll_status(delay_ms=delay_ms, get_ret=True) + if not ret and status != 0x45: # return code 0x45 means cmd payload checksum error, i2c glitch may have occured, try to handle it here + logger.error('CDB Failed to complete loading.') + raise CdbException('CDB Failed complete fw load') + if ret and status == 0x01: + return True + except: + self.cmis_i2c.acknowledge_poll(timeout_ms=2000, delay_ms=1) + logger.error("CDB Complete Retry %d" % x) + continue + if not ret: + logger.error('CDB Failed to complete loading.') + raise CdbException('CDB Failed complete fw load') + return True + + def fw_start_download(self, header, image_size, start_addr=None, bootloader=False, rlm_num=None): + self.clear_cmd_fields() + self.set_dword_field(cdb_cmd_fields.addr_0, image_size) + # self.cmis_i2c.set_page(0x9F) + # self.cmis_i2c.reg_write(140, 116 * [0x00]) + # self.cmis_i2c.reg_write(144, header) + self.exec_wr_cmd(140, 116 * [0x00], 0, 0x9F) + self.exec_wr_cmd(144, header, 0, 0x9F) + more_data = header + if start_addr is not None: + start_addr_data = [(start_addr >> 24) & 0xFF, (start_addr >> 16) & 0xFF, (start_addr >> 8) & 0xFF, start_addr & 0xFF] + self.exec_wr_cmd(200, start_addr_data, 0, 0x9F) + # self.cmis_i2c.reg_write(200, start_addr_data) + more_data = header + start_addr_data + if rlm_num is not None: + self.exec_wr_cmd(204, [rlm_num], 0, 0x9F) + # self.cmis_i2c.reg_write(204, [rlm_num]) + more_data = more_data + [rlm_num] + self.set_word_field(cdb_cmd_fields.cmd_code_msb, 0x0101) + if rlm_num is not None: + self.set_cmd_field(cdb_cmd_fields.lpl_len, 121) + else: + self.set_cmd_field(cdb_cmd_fields.lpl_len, 120) + self.set_check_code(more_data=more_data) + self.write_cmd_fields() + if bootloader: + delay(500) + else: + delay(100) + ret, status = self.poll_status(delay_ms=10, force=True) + if not ret: + logger.error('CDB Failed to start loading.') + raise CdbException('CDB Failed start fw load') + return True + + def fw_abort_load(self): + self.clear_cmd_fields() + self.set_word_field(cdb_cmd_fields.cmd_code_msb, 0x0102) + self.set_check_code(data_len=8) + self.write_cmd_fields() + delay(100) + ret, status = self.poll_status(delay_ms=10) + if not ret: + logger.error('CDB Failed to abort loading.') + raise CdbException('CDB Failed abort fw load') + return True + + def fw_load_epl(self, data_buffer, data_length, addr=None): + page_num = int(data_length / 128) + remainder = data_length % 128 + i = 0 + while i < page_num: + # self.cmis_i2c.set_page(0xA0 + i) # Select page + # self.cmis_i2c.reg_write(0x80, data_buffer[0x80 * i: 0x80 * i + 0x80]) # Write to SRAM + self.exec_wr_cmd(0x80, data_buffer[0x80 * i: 0x80 * i + 0x80], 0, (0xA0 + i)) + i = i + 1 + if remainder > 0: + # self.cmis_i2c.set_page(0xA0 + i) + # self.cmis_i2c.reg_write(0x80, data_buffer[0x80 * i: 0x80 * i + remainder]) + self.exec_wr_cmd(0x80, data_buffer[0x80 * i: 0x80 * i + remainder], 0, (0xA0 + i)) + self.clear_cmd_fields() + self.set_word_field(cdb_cmd_fields.epl_len_msb, page_num * 0x80 + remainder) + self.set_cmd_field(cdb_cmd_fields.lpl_len, 0x04) + if addr is not None: + self.set_dword_field(cdb_cmd_fields.addr_0, addr) + self.set_word_field(cdb_cmd_fields.cmd_code_msb, 0x0104) + self.set_check_code() + self.write_cmd_fields() + delay(50) + ret, status = self.poll_status(delay_ms=20) + if not ret: + logger.error('Loading EPL Failed.') + raise CdbException('Failed loading EPL') + return True + + def cdb_read_serial_number(self): + sn_data = array('B', 16 * [0]) + # self.cmis_i2c.set_page(0x00) + # self.cmis_i2c.reg_read(166, sn_data) # 16 bytes starting from byte 166 + sn_data = self.exec_rd_cmd(166, 16) + sn_str = bytes(sn_data).decode('ascii').strip() + return sn_data, sn_str + + @staticmethod + def cdb_parse_serial_number_from_filename(filename): + fn_items = filename.split('_') + # product str, sn str, oe_num, ee type + print(fn_items) + return fn_items[0], fn_items[1], fn_items[2], fn_items[3] + + def cdb_check_cmis_ee_match(self, filename): + supported_products = ['Bailly'] + product_str, sn_str, oe_num_str, ee_type = self.cdb_parse_serial_number_from_filename(filename) + if product_str not in supported_products: + raise CdbException("Unsupported product or Invalid Image File. Please use the original provided image file without renaming") + try: + oe_num = int(oe_num_str[2]) + except: + raise CdbException("Invalid OE Number Conversion or Invalid Image File. Please use the original provided image file without renaming") + if oe_num > 7: + raise CdbException("Invalid OE Number or Invalid Image File. Please use the original provided image file without renaming") + sn_str += "%02X" % oe_num + if ee_type != 'CMIS': + raise CdbException("Unsupported image type or Invalid Image File. Please use the original provided image file without renaming") + try: + sn_data, rd_sn_str = self.cdb_read_serial_number() + except: + raise CdbException("Unable to read out serial number. Please check i2c communication to the CMIS interface") + if rd_sn_str != sn_str: + print(rd_sn_str, end='') + print(' vs ', end='') + print(sn_str) + raise CdbException("Mismatch Serial Number. Please use the image file with the matching serial number") + return True, product_str, sn_str, oe_num, ee_type + + def cdb_check_oe_ee_match(self, filename): + supported_products = ['Bailly'] + product_str, sn_str, oe_num_str, ee_type = self.cdb_parse_serial_number_from_filename(filename) + if product_str not in supported_products: + raise CdbException("Unsupported product or Invalid Image File. Please use the original provided image file without renaming") + try: + oe_num = int(oe_num_str[2]) + except: + raise CdbException("Invalid OE Number Conversion or Invalid Image File. Please use the original provided image file without renaming") + if oe_num > 7: + raise CdbException("Invalid OE Number or Invalid Image File. Please use the original provided image file without renaming") + sn_str += "%02X" % oe_num + if ee_type != 'OE': + raise CdbException("Unsupported image type or Invalid Image File. Please use the original provided image file without renaming") + try: + sn_data, rd_sn_str = self.cdb_read_serial_number() + except: + raise CdbException("Unable to read out serial number. Please check i2c communication to the CMIS interface") + if rd_sn_str != sn_str: + print(rd_sn_str, end='') + print(' vs ', end='') + print(sn_str) + raise CdbException("Mismatch Serial Number. Please use the image file with the matching serial number") + return True, product_str, sn_str, oe_num, ee_type + + @staticmethod + def parse_cdb_image_info(file_lines): + image_info = [] + img_num = int((len(file_lines) - 1) / 2) + + for i in range(img_num): + image = {} + img_header = file_lines[2 * i + 1].rstrip() + header_data = [int(img_header[n:n + 2], 16) for n in range(0, len(img_header), 2)] + img_line = file_lines[2 * i + 2].rstrip() + img_size = int(len(img_line) / 2) + image['HEADER'] = header_data + image['DATA_STR'] = img_line + image['SIZE'] = img_size + image['TYPE'] = header_data[0] + if (header_data[1] & 0x80): + image['IMG_FULL'] = 1 + else: + image['IMG_FULL'] = 0 + image['LOC'] = (header_data[1] & 0x03) + image['LOAD_OPT'] = header_data[2] + unique_id_str = bytes(header_data[3:]).hex().upper() + image['UNIQUE_ID'] = unique_id_str + image_info.append(image) + + return image_info + + @staticmethod + def cdb_parse_file_header(file_header): + file_info = {} + file_info['id'] = file_header[:16] + file_info['img_num'] = int(file_header[16:18], 16) + file_info['img_layout'] = [] + file_info['load_action'] = [] + for i in range(file_info['img_num']): + file_info['img_layout'].append(file_header[18+4*i:18+4*i+4]) + for i in range(file_info['img_num']): + file_info['load_action'].append(file_header[18+file_info['img_num']*4+4*i:18+file_info['img_num']*4+4*i+4]) + if file_info['load_action'][-1] == 'FFFF': + break + # print(file_info['id']) + # print(file_info['img_num']) + print(file_info['img_layout']) + print(file_info['load_action']) + return file_info + + def cdb_load_cmis_fw(self, image_info, size, verify=False): + ret, fw_info, extra_fw_info = self.fw_status() + image_dict = image_info + + check_image = image_dict['LOC'] - 1 # 0 -> BANK1, 1 -> BANK2 + via_bootloader = False + if image_dict['LOAD_OPT'] & 0x03 == 0x03: + via_bootloader = True + + logger.info('Upgrading Bank %d\n' % check_image) + logger.debug('FW Load Abort CMD') + self.fw_abort_load() + logger.debug('FW Load Abort CMD Done') + header = image_dict['HEADER'] + data_size = image_dict['SIZE'] + img_data = image_dict['DATA_STR'] + logger.debug('FW Download Start CMD') + self.fw_start_download(header=header, image_size=data_size, bootloader=via_bootloader) + logger.debug('FW Download Start CMD Done') + if via_bootloader: + self.poll_reg_status(status_reg=0x53, status_val=0xAA, ack_poll=True, verbose=True) + data_buffer = array('B', size * [0]) + img_line_idx = 0 + load_addr = 0 + logger.info('Start Updating MCU Bank%d...' % check_image) + total_iteration = math.ceil(data_size / size) + while data_size > 0: + if data_size >= size: + read_size = size + else: + read_size = data_size + for x in range(len(data_buffer)): # Initialize data_buffer to all zeroes + data_buffer[x] = 0 + raw_data = img_data[img_line_idx:img_line_idx + read_size * 2] + img_line_idx += read_size * 2 + for x in range(read_size): + data_buffer[x] = int(raw_data[2 * x:2 * x + 2], 16) + data_size -= read_size + if not self.fw_load_epl(data_buffer, read_size, addr=load_addr): + return False + load_addr += read_size + print('.', end='', flush=True) + logger.info('\n') + logger.info('Completed') + delay(100) + self.fw_complete_load() # cdb fw load complete cmd + ret, fw_info, extra_fw_info = self.fw_status() # get version & crc information + loaded_fw_ver = self.get_fw_version_info(fw_info) # extract only mcu info + self.cmis_i2c.acknowledge_poll(timeout_ms=2000, delay_ms=1) + logger.info('Jumpping to Bank %d' % image_dict['LOC']) + self.fw_run(bank=check_image, verbose=False) # jump to the bank with bew rev + try: + self.cmis_i2c.acknowledge_poll(timeout_ms=15000, delay_ms=500) + except cmis_smb.cmis_mcu_mezz_smb_Exception as e: + raise CdbException(e.detailed_error_message) + logger.info('Jumpping to Bank %d Completed' % image_dict['LOC']) + ret, fw_info, extra_fw_info = self.fw_status() # get version & crc info + actual_fw_ver = self.get_fw_version_info(fw_info) # extract only mcu info + logger.info('Commiting Image') + self.fw_commit() # commit new image, on next powerup/reset, fw will load new rev img + self.exec_wr_cmd(26, [0x08]) + # self.cmis_i2c.reg_write(offset=26, data=[0x08]) # msa soft reset + try: + self.cmis_i2c.acknowledge_poll(timeout_ms=15000, delay_ms=500) + except cmis_smb.cmis_mcu_mezz_smb_Exception as e: + raise CdbException(e.detailed_error_message) + logger.info('Finished MCU FW Upgrade') + return actual_fw_ver[check_image]["CMIS_FW"] # return version & crc for host to validate + + def cdb_load_oe_fw(self, image_info, size, verify=False): + IMG_TYPE_STR = ['Partial', 'Full'] + IMG_DATA_STR = ['Invalid', 'Bank 1', 'Bank 2', 'Both Banks'] + LOAD_OPT_STR = ['Invalid', 'Other Bank', 'Current Bank', 'Both Banks'] + image_dict = image_info + image_start_addr = int(image_dict['DATA_STR'][:8], 16) + ret, fw_info, fw_info_extra = self.fw_status() + + + logger.info('Image Type: %s Image, %s\n' % (IMG_TYPE_STR[image_dict['IMG_FULL']], IMG_DATA_STR[image_dict['LOC']])) + + logger.info('Upgrading OE %s\n' % LOAD_OPT_STR[image_dict['LOAD_OPT']]) + logger.debug('FW Load Abort CMD') + self.fw_abort_load() + logger.debug('FW Load Abort CMD Done') + header = image_dict['HEADER'] + data_size = image_dict['SIZE'] - 4 # first 4 bytes is address + img_data = image_dict['DATA_STR'][8:] # first 4 bytes is address + logger.debug('FW Download Start CMD') + self.fw_start_download(header=header, image_size=data_size, bootloader=False) + logger.debug('FW Download Start CMD Done') + data_buffer = array('B', size * [0]) # step size + img_line_idx = 0 + load_addr = image_start_addr + logger.info('Start Updating OE...') + total_iteration = math.ceil(data_size / size) + while data_size > 0: + if data_size >= size: + read_size = size + else: + read_size = data_size + for x in range(len(data_buffer)): # Initialize data_buffer to all zeroes + data_buffer[x] = 0 + raw_data = img_data[img_line_idx:img_line_idx + read_size * 2] + img_line_idx += read_size * 2 + for x in range(read_size): + data_buffer[x] = int(raw_data[2 * x:2 * x + 2], 16) + data_size -= read_size + if not self.fw_load_epl(data_buffer, read_size, addr=load_addr): + return False + load_addr += read_size + print('.', end='', flush=True) + logger.info('\n') + logger.info('Completed') + delay(10) + self.fw_complete_load() # cdb fw load complete cmd + ret, fw_info, fw_info_extra = self.fw_status() # get version & crc information + loaded_fw_ver = self.get_fw_version_info(fw_info=fw_info, fw_info_extra=fw_info_extra) # extract only mcu info + self.exec_wr_cmd(26, [0x08]) + # self.cmis_i2c.reg_write(offset=26, data=[0x08]) # msa soft reset + try: + self.cmis_i2c.acknowledge_poll(timeout_ms=15000, delay_ms=500) + except cmis_smb.cmis_mcu_mezz_smb_Exception as e: + raise CdbException(e.detailed_error_message) + logger.info('Finished OE FW Upgrade') + return loaded_fw_ver[0]["OE_FW"] # return version & crc for host to validate + + def cdb_load_oe_ee_full(self, image_info, size, verify=True): + IMG_TYPE_STR = ['Partial', 'Full'] + IMG_DATA_STR = ['Invalid', 'Bank 1', 'Bank 2', 'Both Banks'] + LOAD_OPT_STR = ['Invalid', 'Other Bank', 'Current Bank', 'Both Banks'] + image_dict = image_info + + if verify: + self.cdb_check_oe_ee_match(filename=image_dict['FILENAME']) + + image_start_addr = int(image_dict['DATA_STR'][:8], 16) + ret, fw_info, fw_info_extra = self.fw_status() + + logger.info('Image Type: %s Image, %s\n' % (IMG_TYPE_STR[image_dict['IMG_FULL']], IMG_DATA_STR[image_dict['LOC']])) + + logger.info('Upgrading OE %s\n' % LOAD_OPT_STR[image_dict['LOAD_OPT']]) + logger.debug('FW Load Abort CMD') + self.fw_abort_load() + logger.debug('FW Load Abort CMD Done') + header = image_dict['HEADER'] + data_size = image_dict['SIZE'] - 4 # first 4 bytes is address + img_data = image_dict['DATA_STR'][8:] # first 4 bytes is address + logger.debug('FW Download Start CMD') + self.fw_start_download(header=header, image_size=data_size, start_addr=image_start_addr, bootloader=False) + logger.debug('FW Download Start CMD Done') + data_buffer = array('B', size * [0]) # step size + img_line_idx = 0 + load_addr = image_start_addr + logger.info('Start Updating OE EE...') + total_iteration = math.ceil(data_size / size) + while data_size > 0: + if data_size >= size: + read_size = size + else: + read_size = data_size + for x in range(len(data_buffer)): # Initialize data_buffer to all zeroes + data_buffer[x] = 0 + raw_data = img_data[img_line_idx:img_line_idx + read_size * 2] + img_line_idx += read_size * 2 + for x in range(read_size): + data_buffer[x] = int(raw_data[2 * x:2 * x + 2], 16) + data_size -= read_size + if not self.fw_load_epl(data_buffer, read_size, addr=load_addr): + return False + load_addr += read_size + print('.', end='', flush=True) + logger.info('\n') + logger.info('Completed') + delay(10) + self.fw_complete_load() # cdb fw load complete cmd + ret, fw_info, fw_info_extra = self.fw_status() # get version & crc information + loaded_fw_ver = self.get_fw_version_info(fw_info=fw_info, fw_info_extra=fw_info_extra) # extract only mcu info + self.exec_wr_cmd(26, [0x08]) + # self.cmis_i2c.reg_write(offset=26, data=[0x08]) # msa soft reset + try: + self.cmis_i2c.acknowledge_poll(timeout_ms=15000, delay_ms=500) + except cmis_smb.cmis_mcu_mezz_smb_Exception as e: + raise CdbException(e.detailed_error_message) + logger.info('Finished OE EE Upgrade') + return loaded_fw_ver[0]["OE_EE"] # return version & crc for host to validate + + def cdb_load_cmis_ee_full(self, image_info, size, verify=True): + IMG_TYPE_STR = ['Partial', 'Full'] + IMG_DATA_STR = ['Invalid', 'Bank 1', 'Bank 2', 'Both Banks'] + LOAD_OPT_STR = ['Invalid', 'Other Bank', 'Current Bank', 'Both Banks'] + + image_dict = image_info + + if verify: + self.cdb_check_cmis_ee_match(filename=image_dict['FILENAME']) + + ret, fw_info, fw_info_extra = self.fw_status() + + logger.info('Input file contain image type: %s Image: %s Size: %d\n' % (IMG_TYPE_STR[image_dict['IMG_FULL']], IMG_DATA_STR[image_dict['LOC']], image_dict['SIZE'])) + + logger.info('Upgrading CMIS_EE %s\n' % LOAD_OPT_STR[image_dict['LOAD_OPT']]) + logger.debug('FW Load Abort CMD') + self.fw_abort_load() + logger.debug('FW Load Abort CMD Done') + header = image_dict['HEADER'] + data_size = image_dict['SIZE'] # total byte size + img_data = image_dict['DATA_STR'] # byte buffer + logger.debug('FW Download Start CMD') + self.fw_start_download(header=header, image_size=data_size, bootloader=False) + logger.debug('FW Download Start CMD Done') + data_buffer = array('B', size * [0]) # step size + img_line_idx = 0 + load_addr = 0 + logger.info('Start Updating CMIS_EE...') + total_iteration = math.ceil(data_size / size) + while data_size > 0: + if data_size >= size: + read_size = size + else: + read_size = data_size + for x in range(len(data_buffer)): # Initialize data_buffer to all zeroes + data_buffer[x] = 0 + raw_data = img_data[img_line_idx:img_line_idx + read_size * 2] + img_line_idx += read_size * 2 + for x in range(read_size): + data_buffer[x] = int(raw_data[2 * x:2 * x + 2], 16) + data_size -= read_size + if not self.fw_load_epl(data_buffer, read_size, addr=load_addr): + return False + load_addr += read_size + print('.', end='', flush=True) + logger.info('\n') + logger.info('Completed') + delay(10) + self.fw_complete_load() # cdb fw load complete cmd + ret, fw_info, fw_info_extra = self.fw_status() # get version & crc information + loaded_fw_ver = self.get_fw_version_info(fw_info=fw_info, fw_info_extra=fw_info_extra) # extract only mcu info + self.exec_wr_cmd(26, [0x08]) + # self.cmis_i2c.reg_write(offset=26, data=[0x08]) # msa soft reset + try: + self.cmis_i2c.acknowledge_poll(timeout_ms=15000, delay_ms=500) + except cmis_smb.cmis_mcu_mezz_smb_Exception as e: + raise CdbException(e.detailed_error_message) + logger.info('Finished CMIS EE Upgrade') + return loaded_fw_ver[0]["CMIS_EE"] # return version & crc for host to validate + + def cdb_load_rlm_fw(self, image_info, size, rlm_num=0, restart=True, verify=False): + ret, fw_info, extra_fw_info = self.fw_status() + image_dict = image_info + + check_image = image_dict['LOC'] - 1 # 0 -> BANK1, 1 -> BANK2 + via_bootloader = False + if image_dict['LOAD_OPT'] & 0x03 == 0x03: + via_bootloader = True + + logger.info('Upgrading Bank %d\n' % check_image) + logger.debug('FW Load Abort CMD') + self.fw_abort_load() + logger.debug('FW Load Abort CMD Done') + header = image_dict['HEADER'] + data_size = image_dict['SIZE'] + img_data = image_dict['DATA_STR'] + logger.debug('FW Download Start CMD') + self.fw_start_download(header=header, image_size=data_size, bootloader=via_bootloader, rlm_num=rlm_num) + logger.debug('FW Download Start CMD Done') + if via_bootloader: + self.poll_reg_status(status_reg=0x53, status_val=0xAA, ack_poll=True, verbose=True) + data_buffer = array('B', size * [0]) + img_line_idx = 0 + load_addr = 0 + logger.info('Start Updating RLM Bank%d...' % check_image) + total_iteration = math.ceil(data_size / size) + while data_size > 0: + if data_size >= size: + read_size = size + else: + read_size = data_size + for x in range(len(data_buffer)): # Initialize data_buffer to all zeroes + data_buffer[x] = 0 + raw_data = img_data[img_line_idx:img_line_idx + read_size * 2] + img_line_idx += read_size * 2 + for x in range(read_size): + data_buffer[x] = int(raw_data[2 * x:2 * x + 2], 16) + data_size -= read_size + if not self.fw_load_epl(data_buffer, read_size, addr=load_addr): + return False + load_addr += read_size + print('.', end='', flush=True) + logger.info('\n') + logger.info('Completed') + delay(10) + self.fw_complete_load(poll_count=10) # cdb fw load complete cmd + ret, fw_info, extra_fw_info = self.fw_status() # get version & crc information + loaded_fw_ver = self.get_fw_version_info(fw_info) # extract only mcu info + logger.info('Jumpping to Bank %d' % image_dict['LOC']) + self.fw_run(bank=check_image, verbose=False) # jump to the bank with bew rev + logger.info('Jumpping to Bank %d Completed' % image_dict['LOC']) + ret, fw_info, extra_fw_info = self.fw_status() # get version & crc info + actual_fw_ver = self.get_fw_version_info(fw_info) # extract only mcu info + logger.info('Commiting Image') + self.fw_commit() # commit new image, on next powerup/reset, fw will load new rev img + self.exec_wr_cmd(26, [0x08]) + # self.cmis_i2c.reg_write(offset=26, data=[0x08]) # msa soft reset + try: + self.cmis_i2c.acknowledge_poll(timeout_ms=15000, delay_ms=500) + except dd.QsfpDdException as e: + raise CdbException(e.detailed_error_message) + logger.info('Finished RLM FW Upgrade') + # return actual_fw_ver[check_image]["CMIS_FW"] # return version & crc for host to validate + + def cdb_load_rlm_ee_full(self, image_info, size, rlm_num=0, restart=True, verify=False): + IMG_TYPE_STR = ['Partial', 'Full'] + IMG_DATA_STR = ['Invalid', 'Bank 1', 'Bank 2', 'Both Banks'] + LOAD_OPT_STR = ['Invalid', 'Other Bank', 'Current Bank', 'Both Banks'] + + image_dict = image_info + + ret, fw_info, fw_info_extra = self.fw_status() + + logger.info('Input file contain image type: %s Image: %s Size: %d\n' % (IMG_TYPE_STR[image_dict['IMG_FULL']], IMG_DATA_STR[image_dict['LOC']], image_dict['SIZE'])) + + logger.info('Upgrading CMIS_EE %s\n' % LOAD_OPT_STR[image_dict['LOAD_OPT']]) + logger.debug('FW Load Abort CMD') + self.fw_abort_load() + logger.debug('FW Load Abort CMD Done') + header = image_dict['HEADER'] + data_size = image_dict['SIZE'] # total byte size + img_data = image_dict['DATA_STR'] # byte buffer + logger.debug('FW Download Start CMD') + self.fw_start_download(header=header, image_size=data_size, bootloader=False, rlm_num=rlm_num) + logger.debug('FW Download Start CMD Done') + data_buffer = array('B', size * [0]) # step size + img_line_idx = 0 + load_addr = 0 + logger.info('Start Updating RLM_EE...') + total_iteration = math.ceil(data_size / size) + while data_size > 0: + if data_size >= size: + read_size = size + else: + read_size = data_size + for x in range(len(data_buffer)): # Initialize data_buffer to all zeroes + data_buffer[x] = 0 + raw_data = img_data[img_line_idx:img_line_idx + read_size * 2] + img_line_idx += read_size * 2 + for x in range(read_size): + data_buffer[x] = int(raw_data[2 * x:2 * x + 2], 16) + data_size -= read_size + if not self.fw_load_epl(data_buffer, read_size, addr=load_addr): + return False + load_addr += read_size + print('.', end='', flush=True) + logger.info('\n') + logger.info('Completed') + delay(10) + self.fw_complete_load() # cdb fw load complete cmd + ret, fw_info, fw_info_extra = self.fw_status() # get version & crc information + loaded_fw_ver = self.get_fw_version_info(fw_info=fw_info, fw_info_extra=fw_info_extra) # extract only mcu info + self.exec_wr_cmd(26, [0x08]) + # self.cmis_i2c.reg_write(offset=26, data=[0x08]) # msa soft reset + try: + self.cmis_i2c.acknowledge_poll(timeout_ms=15000, delay_ms=500) + except dd.QsfpDdException as e: + raise CdbException(e.detailed_error_message) + logger.info('Finished CMIS EE Upgrade') + return loaded_fw_ver[0]["CMIS_EE"] # return version & crc for host to validate + + def cdb_update_general(self, filename, size, rlm_num, verify=True): + logger.info('input file: %s' % filename) + try: + hex_file = open(filename, 'r') # Open input hex file + except FileNotFoundError: + raise CdbException("file not found error") + + file_lines = hex_file.readlines() + hex_file.close() + + logger.info("File Header: %s" % file_lines[0]) + + file_info = self.cdb_parse_file_header(file_lines[0]) + + if file_info['id'] != '4252434D204F5344': + raise CdbException('Invalid File, Please use the Broadcom Official Released Upgrading Image') + + image_info = self.parse_cdb_image_info(file_lines) + + if file_info['img_num'] != len(image_info): + raise CdbException('Mismatch File Desciption, Please use Broadcom Official Released Upgrading Image') + + IMG_TYPE = [0xCF, 0xCE, 0xEF, 0xEE, 0xAF, 0xAE] + + for img in image_info: + if img.get('TYPE', 0x00) not in IMG_TYPE: + raise CdbException('Unsupported Image Type, Please use Official Broadcom Released Upgrading Image') + if img.get('UNIQUE_ID', '') != '4F534443504F4241494C4C594649524D57415245': + raise CdbException('Invalid Image Header, Please use the Broadcom Official Released Upgrading Image') + + for ld_ac in file_info['load_action']: + if ld_ac == 'FFFF': + logger.info('End of Loading Action, Upgrading Complete') + return + try: + img_idx = file_info['img_layout'].index(ld_ac) + except ValueError: + raise CdbException('Mismatch Image Loading Desciption, Please use Official Broadcom Released Upgrading Image') + logger.info('msa soft reset') + self.exec_wr_cmd(26, [0x08]) # msa soft reset + delay(5000) + logger.info('Loading Image %d' % img_idx) + image_dict = image_info[img_idx] + image_dict['FILENAME'] = os.path.basename(filename) + if image_dict['TYPE'] == 0xCF: + logger.info('Loading CMIS FW') + self.cdb_load_cmis_fw(image_info=image_dict, size=size, verify=verify) + delay(3000) + elif image_dict['TYPE'] == 0xCE: + logger.info('Loading CMIS EE') + self.cdb_load_cmis_ee_full(image_info=image_dict, size=size, verify=verify) + delay(3000) + elif image_dict['TYPE'] == 0xEF: + logger.info('Loading PRISM FW') + self.cdb_load_oe_fw(image_info=image_dict, size=size, verify=verify) + delay(3000) + elif image_dict['TYPE'] == 0xEE: + logger.info('Loading PRISM EE') + self.cdb_load_oe_ee_full(image_info=image_dict, size=size, verify=verify) + delay(3000) + elif image_dict['TYPE'] == 0xAF: + if rlm_num is None: + rlm_nums = [0, 1] + else: + rlm_nums = [rlm_num] + logger.info('Loading RLM FW') + for _rlm in rlm_nums: + self.cdb_load_rlm_fw(image_info=image_dict, size=size, rlm_num=_rlm, verify=verify) + delay(3000) + elif image_dict['TYPE'] == 0xAE: + if rlm_num is None: + rlm_nums = [0, 1] + else: + rlm_nums = [rlm_num] + logger.info('Loading RLM EE') + for _rlm in rlm_nums: + self.cdb_load_rlm_ee_full(image_info=image_dict, size=size, rlm_num=_rlm, verify=verify) + delay(3000) + + +class CdbException(Exception): + def __init__(self, detailed_error_message): + super(CdbException, self).__init__(detailed_error_message) + + +if __name__ == '__main__': + pass \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/cpo/lib/fw_tools/cmis/__init__.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/cpo/lib/fw_tools/cmis/__init__.py new file mode 100755 index 00000000000..f19e5cb1d90 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/cpo/lib/fw_tools/cmis/__init__.py @@ -0,0 +1,3 @@ +import sys +import os +sys.path.append(os.path.dirname(os.path.realpath(__file__))) \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/cpo/lib/fw_tools/cmis/cmis_mcu_i2c.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/cpo/lib/fw_tools/cmis/cmis_mcu_i2c.py new file mode 100755 index 00000000000..447e3a64d92 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/cpo/lib/fw_tools/cmis/cmis_mcu_i2c.py @@ -0,0 +1,578 @@ +""" +file qsfpdd.py +author Broadcom OSD Firmware Team +date 09/22/2022 +version 1.01 - added file directory to path in order to import same level modules + +property $ Copyright: (c) 2022 Broadcom Limited All Rights Reserved $ + No portions of this material may be reproduced in any form + without the written permission of: + Broadcom Limited + 408 E. Plumeria Drive + San Jose, California 95134 + United States + All information contained in this document/file is Broadcom Limit company + private proprietary, trade secret, and remains the property of Broadcom + Limited. The intellectual and technical concepts contained herein are + proprietary to Broadcom Limited and may be covered by U.S. and Foreign Patents, + patents in process, and are protected by trade secret or copyright law. + Dissemination of this information or reproduction of this material is strictly + forbidden unless prior written permission is obtained from Broadcom Limited. + +brief This file includes all the CMIS compliant I2C driver functions + +section +""" +import os +import sys +from array import array +from GS_timing import * +from micas_i2c import I2CException +from util import UtilObj as u +import micas_i2c as i2c_d +import logging +import math + + +logger = logging.getLogger(__name__) +logger.setLevel(logging.INFO) +logger.addHandler(logging.StreamHandler(sys.stdout)) + + +""" +logger.debug("This is a debug message") +logger.info("This is an info message") +logger.warning("This is a warning message") +logger.error("This is an error message") +logger.critical("This is a critical message") +""" + + +class cmis_mcu_mezz_smb(object): + mcu_bus_map = [24, 25, 26, 27, 28, 29, 30, 31] + dev_addr = 0x50 + dev = None + + def __init__(self, twi_dev=None, sn='255', + oe_mcu=0, cmis_mcu_select_byte=0x70, + delay_ms=50, + retry_open_max=10, delay_after_open_ms=15, delay_between_retry_ms=5): + if twi_dev: + self.dev = twi_dev + self.sn = sn + self.cmis_mcu_select_byte = cmis_mcu_select_byte + self.delay_ms = delay_ms + self.oe_mcu = oe_mcu + self.retry_open_max = retry_open_max + self.delay_after_open_ms = delay_after_open_ms + self.delay_between_retry_ms =delay_between_retry_ms + return + + def __enter__(self): + retry_open_max = self.retry_open_max + if self.dev is None: + self.dev = i2c_d.I2cHost(bus=self.mcu_bus_map[self.oe_mcu]) + self.connect_mcu(num=self.oe_mcu, verbose=True) + return self + + def __exit__(self, exc_type, exc_val, exc_tb): + return + + def open(self): + retry_open_max = self.retry_open_max + if self.dev is None: + self.dev = i2c_d.I2cHost(bus=self.mcu_bus_map[self.oe_mcu]) + self.connect_mcu(num=self.oe_mcu, verbose=True) + + def close(self): + return self + + def set_device_address(self, dev_addr): + self.dev_addr = dev_addr + + def set_page(self, page): + self.reg_write(0x7F, [page]) + + def set_bank(self, bank): + self.reg_write(0x7E, [bank]) + + def reg_read(self, offset, data, verbose=True): + try: + data_in = self.dev.reg_read(addr=0x50, offset=offset, n=len(data), verbose=verbose) + for i in range(len(data)): + data[i] = data_in[i] + except I2CException: + raise cmis_mcu_mezz_smb_Exception('Exception on reg_read, I2C Driver Error, I2C Client Device may have Nacked') + + def reg_write(self, offset, data, verbose=True): + try: + self.dev.reg_write(addr=0x50, offset=offset, data=data, verbose=verbose) + except I2CException: + if verbose: + print("reg_write offset: %02X data_size: %d" % (offset, len(data))) + raise cmis_mcu_mezz_smb_Exception('Exception on reg_write, I2C Driver Error, I2C Client Device may have Nacked') + + def enter_password(self, pwd): + self.reg_write(122, pwd) + + def connect_mcu(self, num, verbose=False): + try: + self.dev.set_bus(bus=self.mcu_bus_map[num]) + if verbose: + # do nothing as this information is not needed at cli level for ssh query + pass + except Exception as err: + logger.error(type(err)) + logger.error(str(err)) + + def enter_debug_mode(self, retry=3, verbose=False): + data = array('B', [0]) + self.reg_read(0x53, data) # read the current system mode + if verbose: + print("Requested Mode: %02X" % 0xCC) + print("System Mode: %02X" % data[0]) + if data[0] == 0xCC: # check if requested mode matches with the current system mode + return True + for i in range(retry): + if verbose: + print("Entering Pwd: %02X %02X %02X %02X" % (0xF4, 0xDE, 0xCA, 0xF3)) + self.reg_write(0x7A, [0xF4, 0xDE, 0xCA, 0xF3]) # enter password + delay(1000) + (ret, status) = self.poll_status(0x53, 0xCC, delay_ms=20, retry=100) + if verbose: + print('Retry: %d, Status: %02X' % (i, status)) + if ret: + return True + (ret, status) = self.poll_status(0x53, 0xCC, delay_ms=0, retry=1) + if not ret: + raise cmis_mcu_mezz_smb_Exception('Unable to enter service mode.') + return ret + + def read_from_data_page(self, data_page, data): + page = data_page + rd_num = len(data) + data_idx = 0 + while rd_num > 0: + if rd_num > 128: + rd_pg_byte = 128 + else: + rd_pg_byte = rd_num + rd_data = array('B', rd_pg_byte * [0]) + self.set_page(page) + self.reg_read(0x80, rd_data) + for i in range(rd_pg_byte): + data[data_idx] = rd_data[i] + data_idx += 1 + page += 1 + rd_num -= rd_pg_byte + + def write_to_data_page(self, data_page, data): + page = data_page + wr_num = len(data) + data_idx = 0 + while wr_num > 0: + if wr_num > 128: + wr_pg_byte = 128 + else: + wr_pg_byte = wr_num + wr_data = array('B', wr_pg_byte * [0]) + for i in range(wr_pg_byte): + wr_data[i] = data[data_idx] + data_idx += 1 + self.set_page(page) + self.reg_write(0x80, wr_data) + wr_num -= wr_pg_byte + page += 1 + + @staticmethod + def print_msa_page(offset, data_buffer): + row_header = ['00', '01', '02', '03', '04', '05', '06', '07', '08', '09', '0A', '0B', '0C', '0D', '0E', '0F'] + col_header = ['00', '10', '20', '30', '40', '50', '60', '70'] + if offset > 127: + col_header = ['80', '90', 'A0', 'B0', 'C0', 'D0', 'E0', 'F0'] + offset = (offset % 128) + arr = [['-' for i in range(16)] for j in range(8)] + idx = offset + for data in data_buffer: + x = idx % 16 + y = int(idx / 16) + arr[y][x] = "{:02X}".format(data) + idx = idx + 1 + + row_format = "{:>4}" * (len(row_header) + 1) + print(row_format.format("", *row_header)) + for col, row in zip(col_header, arr): + print(row_format.format(col, *row)) + + + def read_msa_info(self, bank=0): + msa_data = {} + page_data = array('B', 128 * [0]) + self.set_page(0x00) + self.reg_read(0x00, page_data) + data16 = page_data[14] * 256 + page_data[15] + data16 = u.twos_comp(data16, 16) + msa_data['Temperature'] = data16 / 256 + data16 = page_data[16] * 256 + page_data[17] + msa_data['Vcc'] = data16 * 0.0001 + + print('\nBank: %d\n' % bank) + self.set_bank(bank) + + self.set_page(0x11) + self.reg_read(0x80, page_data) + msa_data['TxLOS'] = bin(page_data[136 - 128])[2:].zfill(8) + msa_data['TxLOL'] = bin(page_data[137 - 128])[2:].zfill(8) + msa_data['RxLOS'] = bin(page_data[147 - 128])[2:].zfill(8) + msa_data['RxLOL'] = bin(page_data[148 - 128])[2:].zfill(8) + + for i in range(4): + data16 = page_data[154 - 128 + 2 * i] * 256 + page_data[155 - 128 + 2 * i] + PmW = data16 * 0.0001 + Pdb = 10 * math.log(PmW, 10) + msa_data['TxLOP%01d' % i] = '%.3fmW %.3fdBm' % (PmW, Pdb) + for i in range(4): + data16 = page_data[170 - 128 + 2 * i] * 256 + page_data[171 - 128 + 2 * i] + msa_data['TxBias%01d' % i] = '%.1fmA' % (data16 * 0.002 * 2) + for i in range(4): + data16 = page_data[186 - 128 + 2 * i] * 256 + page_data[187 - 128 + 2 * i] + PmW = data16 * 0.0001 + Pdb = 10 * math.log(PmW, 10) + msa_data['RXLIP%01d' % i] = '%.3fmW %.3fdBm' % (PmW, Pdb) + + msa_data['LOP Hi Alarm'] = bin(page_data[139 - 128])[2:].zfill(8) + msa_data['LOP Lo Alarm'] = bin(page_data[140 - 128])[2:].zfill(8) + msa_data['LOP Hi Warn'] = bin(page_data[141 - 128])[2:].zfill(8) + msa_data['LOP Lo Warn'] = bin(page_data[142 - 128])[2:].zfill(8) + msa_data['Bias Hi Alarm'] = bin(page_data[143 - 128])[2:].zfill(8) + msa_data['Bias Lo Alarm'] = bin(page_data[144 - 128])[2:].zfill(8) + msa_data['Bias Hi Warn'] = bin(page_data[145 - 128])[2:].zfill(8) + msa_data['Bias Lo Warn'] = bin(page_data[146 - 128])[2:].zfill(8) + msa_data['LIP Hi Alarm'] = bin(page_data[149 - 128])[2:].zfill(8) + msa_data['LIP Lo Alarm'] = bin(page_data[150 - 128])[2:].zfill(8) + msa_data['LIP Hi Warn'] = bin(page_data[151 - 128])[2:].zfill(8) + msa_data['LIP Lo Warn'] = bin(page_data[152 - 128])[2:].zfill(8) + + for item in msa_data: + print(item + ':', msa_data[item]) + + def read(self, msa_page, offset, size, bank=0, delay_ms=None, verbose=True): + msa_page = int(msa_page) + offset = int(offset) + size = int(size) + bank = int(bank) + + _rtn_data_buffer = [] + if msa_page > 0 and offset < 128: + print('MSA pages greater than 0 only supports upper page reading.') + return False, _rtn_data_buffer + self.set_bank(bank) + # print('Bank: %d' % bank) + if offset < 128: + remain_byte = 128 - offset + else: + remain_byte = 256 - offset + if remain_byte <= size: + read_byte = remain_byte + else: + read_byte = size + data_buffer = array('B', read_byte * [0]) + self.set_page(msa_page) + if delay_ms is not None: + delay(delay_ms) + self.reg_read(offset, data_buffer) + + _rtn_data_buffer = [] + if len(data_buffer) != size: + return False, _rtn_data_buffer + + _rtn_str = '' + for _byte in data_buffer: + offset = str('{:02X}'.format(_byte)) + _rtn_str += offset + + if verbose: + # do nothing as this information is not needed at cli level for ssh query + # print(f'MSA Page {hex(msa_page)}:') + # self.print_msa_page(offset, data_buffer) + pass + + # This is the only information, and most important to print to the cli output + print(_rtn_str) + + return True, data_buffer + + def i2c_read(self,msa_page, offset, size, bank=0, delay_ms=None, verbose=False): + """ + This is a high level i2c_read wrapper that will be used for generic cmis page read + """ + status,data_buffer = self.read(msa_page=msa_page, offset=offset, size=size, bank=bank, delay_ms=delay_ms, verbose=verbose) + return status,data_buffer + + def write(self, msa_page, offset, data, bank=0, delay_ms=None, verbose=False): + msa_page = int(msa_page) + offset = int(offset) + bank = int(bank) + + if msa_page > 0 and offset < 128: + return False + self.set_bank(bank) + if verbose: + # do nothing as this information is not needed at cli level for ssh query + # logger.info('Bank: %d' % bank) + pass + + if offset < 128: + remain_byte = 128 - offset + else: + remain_byte = 256 - offset + if remain_byte <= len(data): + write_byte = remain_byte + else: + write_byte = len(data) + data_out = array('B', write_byte * [0]) + for i in range(write_byte): + data_out[i] = data[i] + self.set_page(msa_page) + if delay_ms is not None: + delay(delay_ms) + self.reg_write(offset, data_out) + + def i2c_write(self, msa_page, offset, data, bank=0, delay_ms=None, verbose=False): + """ + This is a high level i2c_write wrapper that will be used for generic cmis page write + """ + return self.write(msa_page=msa_page, offset=offset, data=data, bank=bank, delay_ms=delay_ms, verbose=verbose) + + def poll_status(self, status_reg, status_val, delay_ms=20, retry=100, ack_poll=False, verbose=False): + if ack_poll: + if not self.acknowledge_poll(timeout_ms=1000): + raise cmis_mcu_mezz_smb_Exception("Device I2C Nacked") + status = array('B', [0]) + status[0] = status_val ^ 0xFF + reg_data = status_reg + if type(status_reg) != int: + reg_data = status_reg.value + for i in range(retry): + self.reg_read(reg_data, status) + if verbose: + print("Status: %02X Retry Counts: %d" % (status[0], i)) + if status[0] == status_val: + return True, status[0] + if delay_ms is not None: + delay(delay_ms) + + return (status[0] == status_val), status[0] + + def acknowledge_poll(self, timeout_ms=100, delay_ms=10): + return self.dev.ack_poll(self.dev_addr, timeout_ms=timeout_ms, delay_ms=delay_ms) + + def exit_service_mode(self, retry=3, delay_ms=100,verbose=False): + data = array('B', [0]) + self.reg_read(0x54, data) + if verbose: + print("System Mode: %02X" % data[0]) + if data[0] == 0x00: + return True + for i in range(retry): + pwd = [0x01, 0x02, 0x03, 0x04] + self.reg_write(0x7A, pwd) + delay(delay_ms) + (ret, status) = self.poll_status(0x54, 0x00, delay_ms=10, retry=5) + if verbose: + print('Retry: %d, Status: %02X' % (i, status)) + if ret: + return True + (ret, status) = self.poll_status(0x54, 0x00, delay_ms=0, retry=1) + if not ret: + raise cmis_mcu_mezz_smb_Exception('Unable to exit service mode.') + return ret + + def msa_pattern_setup(self, channel=9, interface=1, pattern=0, delay_ms=1000,enable=True): + if not self.exit_service_mode(): + print('Unable to exit service mode.') + return False + channel = channel - 1 + if channel < 8: + print("Channel(s): ", channel + 1) + else: + print("Channel(s): ALL") + interface_str = {0: "HOST", 1: "MEDIA"} + if interface < 0 or interface > 1: + print('Only host: 0 and media: 1 interface can be selected.') + return False + print("Interface: ", interface_str[interface]) + gen_byte = 144 + interface * 8 + sel_byte = 148 + interface * 8 + + pattern_str = {0: "PRBS31Q", 1: "PRBS31", 2: "PRBS23Q", 3: "PRBS23", + 4: "PRBS15Q", 5: "PRBS15", 6: "PRBS13Q", 7: "PRBS13", + 8: "PRBS9Q", 9: "PRBS9", 10: "PRBS7Q", 11: "PRBS7", + 12: "SSPRQ", 13: "Reserved", 14: "Custom", 15: "User Pattern"} + if pattern < 0 or pattern > 15: + print('Only pattern ID between 0 - 15 can be selected.') + return False + print("Selected Pattern: ", pattern_str[pattern]) + self.set_page(0x13) + if channel < 8: + cur_pattern = array('B', [0]) + self.reg_read(sel_byte + int(channel / 2), cur_pattern) + if channel % 2: + cur_pattern[0] = cur_pattern[0] & 0x0F + cur_pattern[0] = cur_pattern[0] | (pattern << 4) + else: + cur_pattern[0] = cur_pattern[0] & 0xF0 + cur_pattern[0] = cur_pattern[0] | (pattern & 0xF) + self.reg_write(sel_byte + int(channel / 2), cur_pattern) + elif channel == 8: + cur_pattern = array('B', 4 * [0]) + self.reg_read(sel_byte, cur_pattern) + for i in range(4): + cur_pattern[i] = (pattern << 4) | pattern + self.reg_write(sel_byte, cur_pattern) + delay(delay_ms) + cur_ctrl = array('B', [0]) + self.reg_read(gen_byte, cur_ctrl) + if channel < 8: + if enable: + cur_ctrl[0] = cur_ctrl[0] | (0x01 << channel) + else: + cur_ctrl[0] = cur_ctrl[0] & ~(0x01 << channel) + elif channel == 8: + if enable: + cur_ctrl[0] = 0xFF + else: + cur_ctrl[0] = 0x00 + self.reg_write(gen_byte, cur_ctrl) + delay(delay_ms) + + return True + + def tx_disable_handler(self, channel, set_dis): + self.set_page(0x10) + tx_dis_reg = array('B', [0]) + self.reg_read(130, tx_dis_reg) + print('Current Setting: ' + "{0:08b}".format(tx_dis_reg[0])) + if channel == 8: + if set_dis: + tx_dis_reg[0] = 0xFF + else: + tx_dis_reg[0] = 0x00 + else: + if set_dis: + tx_dis_reg[0] |= (0x01 << channel) + else: + tx_dis_reg[0] &= ~(0x01 << channel) + self.reg_write(130, tx_dis_reg) + delay(self.delay_ms) + self.reg_read(130, tx_dis_reg) + print('New Setting: ' + "{0:08b}".format(tx_dis_reg[0])) + return True, tx_dis_reg[0] + + @staticmethod + def calculate_ber(data): + s1 = (data[0] & 0xF8) >> 3 + m1 = ((data[0] & 0x7) << 8) | data[1] + return m1 * (10 ** (s1 - 24)) + + @staticmethod + def float_to_u16_sff8636(val): + shift_counter = 0 + s = 0 + m = 0 + if val < 0: + val = -1 * val + if val < 2047: + while val < 2047 and val != 0: + val *= 10 + shift_counter -= 1 + m = math.floor(val / 10) + s = 24 + shift_counter + 1 + else: + while val >= 2047 and val != 0: + val /= 10 + shift_counter += 1 + m = math.floor(val) + s = 24 + shift_counter + + ret = (s << 11) + m + return ret + + def msa_read_simple_ber(self, channel=9, pattern=0, device=0, interface=1, option=0, spacing=10): + if not self.exit_service_mode(): + print('Unable to exit service mode.') + return False + pattern_str = {0: "PRBS31Q", 1: "PRBS31", 2: "PRBS23Q", 3: "PRBS23", + 4: "PRBS15Q", 5: "PRBS15", 6: "PRBS13Q", 7: "PRBS13", + 8: "PRBS9Q", 9: "PRBS9", 10: "PRBS7Q", 11: "PRBS7", + 12: "SSPRQ", 13: "Reserved", 14: "Custom", 15: "User Pattern"} + if pattern < 0 or pattern > 15: + print('Only pattern ID between 0 - 15 can be selected.') + return False + print("Selected Pattern: ", pattern_str[pattern]) + ber_data_offset = 192 + ber_ctrl_offset = 160 + complete_flag_offset = 134 + mask = 0xFF + if interface == 1: + ber_data_offset = 208 + ber_ctrl_offset = 168 + complete_flag_offset = 135 + if device == 0: + mask = 0x0F + + channel = channel - 1 + data_in = array('B', 16 * [0]) + channel_size = 4 + if device == 1 or interface == 0: + channel_size = 8 + + if channel > channel_size: + print('Invalid channel selection') + return False + + if option == 1: + header = ['MSB'] * channel_size + elif option == 2: + header = ['LSB'] * channel_size + else: + header = ['COMB'] * channel_size + row_format = "{:^{spacing}}" * (len(header) + 1) + print(row_format.format("", *header, spacing=spacing)) + pattern_byte = ((pattern & 0x0F) << 4) | (pattern & 0x0F) + self.set_page(0x13) + self.reg_write(ber_ctrl_offset, [0xFF]) # enable + self.reg_write(ber_ctrl_offset + 1, [0x00]) + self.reg_write(ber_ctrl_offset + 2, [0x00]) + self.reg_write(ber_ctrl_offset + 4, [pattern_byte, pattern_byte, pattern_byte, pattern_byte]) # pattern select + delay(5000) + self.set_page(0x14) + try: + while True: + data_line = ['-'] * channel_size + status, ret = self.poll_status(complete_flag_offset, mask, 50, 150) + if not status: + print('Timed out waiting for complete flag set') + return False + self.reg_write(130, [0x00]) + self.reg_write(128, [0x11]) + delay(120) + self.reg_read(ber_data_offset, data_in) + if channel_size == channel: + for i in range(channel_size): + data_line[i] = "{:.2E}".format(self.calculate_ber(data_in[2 * i:2 * i + 2])) + else: + data_line[channel] = "{:.2E}".format(self.calculate_ber(data_in[2 * channel:2 * channel + 2])) + print(row_format.format("", *data_line, spacing=spacing)) + except KeyboardInterrupt: + self.set_page(0x13) + self.reg_write(ber_ctrl_offset, [0x00]) + print('Exiting BER Checker..') + + +class cmis_mcu_mezz_smb_Exception(Exception): + def __init__(self, detailed_error_message): + super(cmis_mcu_mezz_smb_Exception, self).__init__(detailed_error_message) + +if __name__ == "__main__": + logger.debug('cmis_mcu_i2c.py') diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/cpo/lib/fw_tools/cmis/debug.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/cpo/lib/fw_tools/cmis/debug.py new file mode 100644 index 00000000000..cfd8f75dceb --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/cpo/lib/fw_tools/cmis/debug.py @@ -0,0 +1,55 @@ +import os +import sys +from array import array +from GS_timing import * +from util import UtilObj as u +import cmis_mcu_i2c as cmis_smb +import logging +import math +from array import array +from oe_cmis_rw import oe_cmis_i2c_rw as oe_cmis_util + + +class DebugObj(cmis_smb.cmis_mcu_mezz_smb): + + def __init__(self, twi_dev=None, oe_mcu=0): + self.twi_dev = twi_dev + self.oe_mcu = oe_mcu + self.cmis_util = oe_cmis_util() + super().__init__(twi_dev=twi_dev, oe_mcu=oe_mcu) + + def __enter__(self): + self.open() + return self + + def __exit__(self, exc_type, exc_val, exc_tb): + self.close() + return + + def debug_enable_inline_debug(self): + self.enter_debug_mode() + + def debug_dump_laser_input_power(self): + self.debug_enable_inline_debug() + pwr_payload = array('B', 32 * [0]) + self.write(msa_page=0xBF, offset=130, data=[0x00, 0x00]) + self.write(msa_page=0xBF, offset=128, data=[0x00, 0x02]) + delay(1) + self.poll_status(status_reg=255, status_val=0x01) + self.read_from_data_page(data_page=0xC0, data=pwr_payload) + laser_pwr = [] + for ch in range(16): + laser_pwr.append(u.uint8_to_uint16(pwr_payload[2*ch:2*ch+2])) + for ch in range(16): + PmW = laser_pwr[ch]/100 + if PmW > 0: + Pdb = 10 * math.log(PmW, 10) + else: + Pdb = -40 + print('EIC Laser%d Input Power: %.03f mW %.03f dBm' % (ch, PmW, Pdb)) + print('') + return laser_pwr + +class DebugException(Exception): + def __init__(self, detailed_error_message): + super(DebugException, self).__init__(detailed_error_message) diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/cpo/lib/fw_tools/i2c_driver/__init__.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/cpo/lib/fw_tools/i2c_driver/__init__.py new file mode 100755 index 00000000000..f19e5cb1d90 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/cpo/lib/fw_tools/i2c_driver/__init__.py @@ -0,0 +1,3 @@ +import sys +import os +sys.path.append(os.path.dirname(os.path.realpath(__file__))) \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/cpo/lib/fw_tools/i2c_driver/micas_i2c.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/cpo/lib/fw_tools/i2c_driver/micas_i2c.py new file mode 100755 index 00000000000..a668ab3c78f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/cpo/lib/fw_tools/i2c_driver/micas_i2c.py @@ -0,0 +1,196 @@ +import sys +import io +import fcntl +from array import array +import struct +from GS_timing import * + +I2C_SLAVE = 0x0703 +I2C_SLAVE_FORCE = 0x0706 + +class i2c: + def __init__(self, bus): + self.bus = bus + self.fr = None + self.fw = None + # print(self.fw) + # set device address + + def __enter__(self): + return + + def __exit__(self, exc_type, exc_val, exc_tb): + self.close() + + def set_bus(self, bus:int): + self.bus = bus + + def open(self): + self.fr = io.open("/dev/i2c-" + str(self.bus), "rb", buffering=0) + self.fw = io.open("/dev/i2c-" + str(self.bus), "wb", buffering=0) + + def set_device_address(self, device_addr): + if self.bus == 1: + fcntl.ioctl(self.fr, I2C_SLAVE, device_addr) + fcntl.ioctl(self.fw, I2C_SLAVE, device_addr) + else: + fcntl.ioctl(self.fr, I2C_SLAVE_FORCE, device_addr) + fcntl.ioctl(self.fw, I2C_SLAVE_FORCE, device_addr) + + def write(self, byte_data): + self.fw.write(byte_data) + + def read(self, byte_num): + return self.fr.read(byte_num) + + def close(self): + self.fw.close() + self.fr.close() + + +class I2cHost(i2c): + frame_max_size = 128 + + def __init__(self, addr=0x50, bus=2, frm_max=128): + super().__init__(bus=bus) + self.bus = bus + self.frame_max_size=frm_max + + def host_read(self, addr, n, verbose=True): + try: + try: + self.set_device_address(device_addr=addr) + except: + self.close() + raise I2CException("host_read() cannot set dev addr") + data_in = [0] * n + idx = 0 + read_size = 0 + while n: + if n <= self.frame_max_size: + read_size = n + try: + data_raw = self.read(read_size) + except: + self.close() + raise I2CException("host_read() exception on i2c read") + n = 0 + else: + read_size = self.frame_max_size + try: + data_raw = self.read(read_size) + except: + self.close() + raise I2CException("host_read() exception on i2c read") + n = n - read_size + # print(data_raw) + data_readback = struct.unpack('B' * read_size, data_raw) + # print(data_readback) + for i in range (read_size): + data_in[idx + i] = data_readback[i] + idx = idx + read_size + return idx, data_in + except (IOError, OSError): + self.close() + if verbose: + print("I/O error occurred on read", flush=True) + raise I2CException("host_read() exception on i2c read") + + def host_write(self, addr, data, verbose=True): + try: + self.set_device_address(device_addr=addr) + except: + self.close() + raise I2CException("host_write() cannot set dev addr") + try: + data_raw = struct.pack('B' * len(data), *data) + self.write(data_raw) + except (IOError, OSError): + self.close() + if verbose: + print("I/O error occurred on write", flush=True) + raise I2CException("host_write() exception on i2c write") + + def dev_write(self, addr, data, verbose=True): + try: + data_raw = struct.pack('B' * len(data), *data) + self.write(data_raw) + except IOError: + self.close() + if verbose: + print("I/O error occurred on write", flush=True) + raise I2CException("dev_write() exception on i2c write") + + def ack_poll(self, addr, timeout_ms=100, delay_ms=10): + print("ack_poll address: %02X" % addr) + n = 0 + data_out = array('B', [0]) + while n < timeout_ms: + try: + data_in = self.reg_read(addr, 0x00, 1, verbose=False) + data_out[0] = data_in[0] + self.reg_write(addr, 0x00, data_out, verbose=False) + return n < timeout_ms + except (I2CException, IOError, OSError): # bypass I2CException due to Nack + pass + delay(delay_ms) + n += delay_ms + if n >= timeout_ms: + return False + return True + + def reg_write(self, addr, offset, data, verbose=True): + try: + self.open() + except: + self.close() + raise I2CException("reg_write() Cannot Open I2C Dev") + try: + iter(data) + except TypeError: + data = [data] + n = len(data) + idx = 0 + while n: + if n <= (self.frame_max_size - 1): + data_out = [0] * (n + 1) + data_out[0] = offset + for i in range(n): + data_out[i + 1] = data[idx+i] + offset = offset + n + idx = idx + n + n = 0 + else: + data_out = [0] * self.frame_max_size + data_out[0] = offset + for i in range(self.frame_max_size-1): + data_out[i + 1] = data[idx+i] + offset = offset + (self.frame_max_size - 1) + idx = idx + (self.frame_max_size - 1) + n = n - (self.frame_max_size - 1) + self.host_write(addr, data_out, verbose=verbose) + self.close() + + def word_write(self, addr, offset, data): + data_out = [0] * 3 + data_out[0] = offset + data_out[1] = (data & 0xFF00) >> 8 + data_out[2] = (data & 0xFF) + self.write(addr, data_out) + + def reg_read(self, addr, offset, n, verbose=True): + try: + self.open() + except: + self.close() + raise I2CException("reg_read() Cannot Open I2C Dev") + self.host_write(addr, [offset], verbose=verbose) + status, data_in = self.host_read(addr, n, verbose=verbose) + self.close() + return data_in + + +class I2CException(Exception): + def __init__(self, detailed_error_message): + super(I2CException, self).__init__(detailed_error_message) + diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/cpo/lib/fw_tools/i2c_driver/twiHost.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/cpo/lib/fw_tools/i2c_driver/twiHost.py new file mode 100755 index 00000000000..c954da0e486 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/cpo/lib/fw_tools/i2c_driver/twiHost.py @@ -0,0 +1,133 @@ +import sys +from array import array +import micas_i2c as i2c_dev +import struct +import logging +from GS_timing import * + + +class TwiHostObj(object): + frame_max_size = 11 + + def __init__(self, bus=1, verbose=False): + self.bus = bus + + def read(self, addr, n, verbose=True): + try: + data_in = [0] * n + idx = 0 + read_size = 0 + try: + dev = i2c_dev.i2c(self.bus) + except: + dev.close() + while n: + if n <= self.frame_max_size: + read_size = n + try: + data_raw = dev.read(read_size) + except: + dev.close() + n = 0 + else: + read_size = self.frame_max_size + try: + data_raw = dev.read(read_size) + except: + dev.close() + n = n - read_size + data_readback = struct.unpack('B' * read_size, data_raw) + for i in range (read_size): + data_in[idx + i] = data_readback[i] + idx = idx + read_size + dev.close() + return idx, data_in + except IOError: + if verbose: + print("I/O error occurred on read", flush=True) + return 0, None + + def write(self, addr, data, verbose=True): + try: + data_raw = struct.pack('B' * len(data), *data) + dev = i2c_dev.i2c(self.bus) + dev.host_write(addr, data_raw) + dev.close() + except IOError: + if verbose: + print("I/O error occurred on write", flush=True) + dev.close() + + def dev_write(self, addr, data, dev=None, verbose=True): + try: + data_raw = struct.pack('B' * len(data), *data) + if dev is None: + dev = i2c_dev.i2c(self.bus) + dev.host_write(addr, data_raw) + # dev.close() + except IOError: + if verbose: + print("I/O error occurred on write", flush=True) + dev.close() + + def ack_poll(self, addr, timeout_ms=100, delay_ms=10): + n = 0 + data_out = array('B', [0]) + while n < timeout_ms: + print('acknowledge_poll counts: %d' % n) + try: + data_in = self.reg_read(addr, 0x00, 1, verbose=False) + data_out[0] = data_in[0] + self.reg_write(addr, 0x00, data_out, verbose=False) + return n < timeout_ms + except IOError: # bypass I2CException due to Nack + pass + delay(delay_ms) + n += delay_ms + if n >= timeout_ms: + return False + return True + + def reg_write(self, addr, offset, data, verbose=True): + try: + dev = i2c_dev.i2c(addr, self.bus) + except: + dev.close() + n = len(data) + idx = 0 + while n: + if n <= (self.frame_max_size - 1): + data_out = [0] * (n + 1) + data_out[0] = offset + for i in range(n): + data_out[i + 1] = data[idx+i] + offset = offset + n + idx = idx + n + n = 0 + else: + data_out = [0] * self.frame_max_size + data_out[0] = offset + for i in range(self.frame_max_size-1): + data_out[i + 1] = data[idx+i] + offset = offset + (self.frame_max_size - 1) + idx = idx + (self.frame_max_size - 1) + n = n - (self.frame_max_size - 1) + self.dev_write(addr, data_out, dev=dev, verbose=verbose) + dev.close() + + def word_write(self, addr, offset, data): + data_out = [0] * 3 + data_out[0] = offset + data_out[1] = (data & 0xFF00) >> 8 + data_out[2] = (data & 0xFF) + self.write(addr, data_out) + + def reg_read(self, addr, offset, n, verbose=True): + self.write(addr, [offset]) + status, data_in = self.read(addr, n, verbose=verbose) + return data_in + + +class TwiHostException(Exception): + def __init__(self, detailed_error_message): + super(TwiHostException, self).__init__(detailed_error_message) diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/cpo/lib/fw_tools/utility/GS_timing.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/cpo/lib/fw_tools/utility/GS_timing.py new file mode 100755 index 00000000000..891f2185136 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/cpo/lib/fw_tools/utility/GS_timing.py @@ -0,0 +1,225 @@ +""" +GS_timing.py +-create some low-level Arduino-like millis() (milliseconds) and micros() + (microseconds) timing functions for Python +By Gabriel Staples +http://www.ElectricRCAircraftGuy.com +-click "Contact me" at the top of my website to find my email address +Started: 11 July 2016 +Updated: 13 Aug 2016 + +History (newest on top): +20160813 - v0.2.0 created - added Linux compatibility, using ctypes, so that it's compatible with pre-Python 3.3 (for Python 3.3 or later just use the built-in time functions for Linux, shown here: https://docs.python.org/3/library/time.html) +-ex: time.clock_gettime(time.CLOCK_MONOTONIC_RAW) +20160711 - v0.1.0 created - functions work for Windows *only* (via the QPC timer) + +References: +WINDOWS: +-personal (C++ code): GS_PCArduino.h +1) Acquiring high-resolution time stamps (Windows) + -https://msdn.microsoft.com/en-us/library/windows/desktop/dn553408(v=vs.85).aspx +2) QueryPerformanceCounter function (Windows) + -https://msdn.microsoft.com/en-us/library/windows/desktop/ms644904(v=vs.85).aspx +3) QueryPerformanceFrequency function (Windows) + -https://msdn.microsoft.com/en-us/library/windows/desktop/ms644905(v=vs.85).aspx +4) LARGE_INTEGER union (Windows) + -https://msdn.microsoft.com/en-us/library/windows/desktop/aa383713(v=vs.85).aspx + +-*****https://stackoverflow.com/questions/4430227/python-on-win32-how-to-get- +absolute-timing-cpu-cycle-count + +LINUX: +-https://stackoverflow.com/questions/1205722/how-do-i-get-monotonic-time-durations-in-python + + +""" + +import ctypes, os +import time, datetime, timeit + +# Constants: +VERSION = '0.2.0' + +# ------------------------------------------------------------------- +# FUNCTIONS: +# ------------------------------------------------------------------- +# OS-specific low-level timing functions: +if (os.name == 'nt'): # for Windows: + def micros(): + "return a timestamp in microseconds (us)" + tics = ctypes.c_int64() + freq = ctypes.c_int64() + + # get ticks on the internal ~2MHz QPC clock + ctypes.windll.Kernel32.QueryPerformanceCounter(ctypes.byref(tics)) + # get the actual freq. of the internal ~2MHz QPC clock + ctypes.windll.Kernel32.QueryPerformanceFrequency(ctypes.byref(freq)) + + t_us = tics.value * 1e6 / freq.value + return t_us + + + def millis(): + "return a timestamp in milliseconds (ms)" + tics = ctypes.c_int64() + freq = ctypes.c_int64() + + # get ticks on the internal ~2MHz QPC clock + ctypes.windll.Kernel32.QueryPerformanceCounter(ctypes.byref(tics)) + # get the actual freq. of the internal ~2MHz QPC clock + ctypes.windll.Kernel32.QueryPerformanceFrequency(ctypes.byref(freq)) + + t_ms = tics.value * 1e3 / freq.value + return t_ms + +elif (os.name == 'posix'): # for Linux: + + # Constants: + CLOCK_MONOTONIC_RAW = 4 # see here: https://github.com/torvalds/linux/blob/master/include/uapi/linux/time.h + + + # prepare ctype timespec structure of {long, long} + class timespec(ctypes.Structure): + _fields_ = \ + [ + ('tv_sec', ctypes.c_long), + ('tv_nsec', ctypes.c_long) + ] + + + # Configure Python access to the clock_gettime C library, via ctypes: + # Documentation: + # -ctypes.CDLL: https://docs.python.org/3.2/library/ctypes.html + # -librt.so.1 with clock_gettime: https://docs.oracle.com/cd/E36784_01/html/E36873/librt-3lib.html #- + # -Linux clock_gettime(): http://linux.die.net/man/3/clock_gettime + librt = ctypes.CDLL('librt.so.1', use_errno=True) + clock_gettime = librt.clock_gettime + # specify input arguments and types to the C clock_gettime() function + # (int clock_ID, timespec* t) + clock_gettime.argtypes = [ctypes.c_int, ctypes.POINTER(timespec)] + + + def monotonic_time(): + "return a timestamp in seconds (sec)" + t = timespec() + # (Note that clock_gettime() returns 0 for success, or -1 for failure, in + # which case errno is set appropriately) + # -see here: http://linux.die.net/man/3/clock_gettime + if clock_gettime(CLOCK_MONOTONIC_RAW, ctypes.pointer(t)) != 0: + # if clock_gettime() returns an error + errno_ = ctypes.get_errno() + raise OSError(errno_, os.strerror(errno_)) + return t.tv_sec + t.tv_nsec * 1e-9 # sec + + + def micros(): + "return a timestamp in microseconds (us)" + return monotonic_time() * 1e6 # us + + + def millis(): + "return a timestamp in milliseconds (ms)" + return monotonic_time() * 1e3 # ms + + +# Other timing functions: +def delay(delay_ms): + "delay for delay_ms milliseconds (ms)" + t_start = millis() + while (millis() - t_start < delay_ms): + pass # do nothing + return + + +def delayMicroseconds(delay_us): + "delay for delay_us microseconds (us)" + t_start = micros() + while (micros() - t_start < delay_us): + pass # do nothing + return + + +class Timer: + """Measure time used.""" + # Ref: https://stackoverflow.com/a/57931660/ + def __init__(self, round_ndigits: int = 0): + self._round_ndigits = round_ndigits + self._start_time = timeit.default_timer() + + def __call__(self) -> float: + return timeit.default_timer() - self._start_time + + def __str__(self) -> str: + return str(datetime.timedelta(seconds=round(self(), self._round_ndigits))) + + +def timerdemo(): + # begin timer + t00 = time.time() + timer = Timer() + + time.sleep(1) + print(f"{timer}") + print(type(timer()),timer()) + + time.sleep(5) + print(f"{timer}") + print(type(timer()),timer()) + + # reset timer + timer1 = Timer() + + time.sleep(1) + print(f"{timer}") + print(type(timer()),timer()) + print(f"{timer1}") + print(type(timer1()),timer1()) + + time.sleep(5) + print(f"{timer()}") + print(type(timer()),timer()) + print(f"{timer1}") + print(type(timer1()),timer1()) + + + + + +# ------------------------------------------------------------------- +# EXAMPLES: +# ------------------------------------------------------------------- +# Only executute this block of code if running this module directly, +# *not* if importing it +# -see here: http://effbot.org/pyfaq/tutor-what-is-if-name-main-for.htm +if __name__ == "__main__": # if running this module as a stand-alone program + + # print loop execution time 100 times, using micros() + tStart = micros() # us + for x in range(0, 100): + tNow = micros() # us + dt = tNow - tStart # us; delta time + tStart = tNow # us; update + print("dt(us) = " + str(dt)) + + # print loop execution time 100 times, using millis() + print("\n") + tStart = millis() # ms + for x in range(0, 100): + tNow = millis() # ms + dt = tNow - tStart # ms; delta time + tStart = tNow # ms; update + print("dt(ms) = " + str(dt)) + + # print a counter once per second, for 5 seconds, using delay + print("\nstart") + for i in range(1, 6): + delay(1000) + print(i) + + # print a counter once per second, for 5 seconds, using delayMicroseconds + print("\nstart") + for i in range(1, 6): + delayMicroseconds(1000000) + print(i) + + timerdemo() diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/cpo/lib/fw_tools/utility/__init__.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/cpo/lib/fw_tools/utility/__init__.py new file mode 100755 index 00000000000..f19e5cb1d90 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/cpo/lib/fw_tools/utility/__init__.py @@ -0,0 +1,3 @@ +import sys +import os +sys.path.append(os.path.dirname(os.path.realpath(__file__))) \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/cpo/lib/fw_tools/utility/util.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/cpo/lib/fw_tools/utility/util.py new file mode 100755 index 00000000000..ce9b9a9c651 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/cpo/lib/fw_tools/utility/util.py @@ -0,0 +1,389 @@ +# import numpy as np +import re +from typing import Iterable +import struct +import math +import os +import time +import datetime + +LITTLE_ENDIAN = 0 +BIG_ENDIAN = 1 +class UtilObj(object): + def __init__(self): + return + + @staticmethod + def uint8_to_uint16(data_bytes, data_type=LITTLE_ENDIAN): + if data_type == LITTLE_ENDIAN: + return (data_bytes[1] << 8) + data_bytes[0] + elif data_type ==BIG_ENDIAN: + return (data_bytes[0] << 8) + data_bytes[1] + + @staticmethod + def uint8_to_uint32(data_bytes, data_type=LITTLE_ENDIAN): + if data_type == LITTLE_ENDIAN: + return (data_bytes[3] << 24) + (data_bytes[2] << 16) + (data_bytes[1] << 8) + data_bytes[0] + elif data_type ==BIG_ENDIAN: + return (data_bytes[0] << 24) + (data_bytes[1] << 16) + (data_bytes[2] << 8) + data_bytes[3] + + @staticmethod + def get_str_line_checksum(text_line): + text_data = [text_line[x:x+2] for x in range(0, len(text_line), 2)] + cs = 0 + for item in text_data: + cs += int(item, 16) + cs = ~(cs & 0xFF) + 1 + return "%02X" % (cs & 0xFF) + + @staticmethod + def get_8bit_check_sum(data_buffer): + sum_value = 0 + for x in data_buffer: + sum_value += x + sum_value &= 0xFF + return sum_value + + @staticmethod + def get_8bit_xor_check_sum(data_buffer): + sum_value = 0 + for x in data_buffer: + sum_value += x + sum_value &= 0xFF + sum_value ^= 0xFF + sum_value &= 0xFF + return sum_value + + @staticmethod + def is_eol(c): + """is_eol() checks if the character is end of line. + Args: + (str) c + Returns: + True: end of line + False: not end of line""" + return (c == 10) or (c == 13) + + @classmethod + def check_sum_calculate(cls, hex_file): + sum_value = 0 + for c in iter(lambda: hex_file.read(1), ''): + if not cls.is_eol(ord(c)): + sum_value += ord(c) + + sum_value &= 0xFFFF + return sum_value + + @classmethod + def calculate_checksum(cls, hex_file): + sum_value = 0 + + with open(hex_file) as f: + for c in iter(lambda: f.read(1), ''): + if not cls.is_eol(ord(c)): + sum_value += ord(c) + + f.close() + sum_value &= 0xFFFF + + return sum_value + + @staticmethod + def calculate_crc(init_crc, input_data): + polynomial = 0x04C11DB7 + + crc_result = init_crc ^ input_data + + for i in range(32): + if crc_result & 0x80000000: + crc_result = (crc_result << 1) ^ polynomial + else: + crc_result = (crc_result << 1) + + return crc_result & 0xFFFFFFFF + + @classmethod + def calculate_buffer_crc(cls, data_buffer, init_crc=0xFFFFFFFF): + crc_result = init_crc + + for i in range(0, len(data_buffer), 4): + crc_data = (data_buffer[i] << 24) + (data_buffer[i + 1] << 16) + \ + (data_buffer[i + 2] << 8) + data_buffer[i + 3] + crc_result = cls.calculate_crc(crc_result, crc_data) + return crc_result & 0xFFFFFFFF + + @classmethod + def check_sum_valid(cls, hex_file, check_sum): + """check_sum_valid() checks the hex file to see if it has the correct checksum + Args: + (File) hex_file + (int) check_sum + Returns: + (bool) checksum success/fail""" + sum_value = 0 + + with open(hex_file) as f: + + for c in iter(lambda: f.read(1), ''): + if not cls.is_eol(ord(c)): + sum_value += ord(c) + f.close() + + sum_value &= 0xFFFF + + return sum_value == check_sum + + @staticmethod + def twos_comp(val, bits): + """compute the 2's complement of int value val""" + if (val & (1 << (bits - 1))) != 0: + val = val - (1 << bits) + return val + + @staticmethod + def read_hex_file_simple(filename): + hex_file = open(filename, 'r') + data_buffer = [] + idx = 0 + file_line = hex_file.readline() + while file_line != '': + data_length = int(file_line[1:3], 16) + data_type = int(file_line[7:9], 16) + if data_type == 0x00: + for n in range(data_length): + data_buffer.append(int(file_line[(9 + 2 * n):(11 + 2 * n)], 16)) + idx += 1 + file_line = hex_file.readline() + hex_file.close() + return data_buffer + + @staticmethod + def read_hex_file(filename, byte_size=0x8000): + hex_file = open(filename, 'r') + data_buffer = [[0 for i in range(2)] for j in range(byte_size)] + data_buffer_index = 0 + + file_line = hex_file.readline() + while file_line != '': + data_length = int(file_line[1:3], 16) + data_type = int(file_line[7:9], 16) + if data_type == 0x00: + eeprom_index = int(file_line[3:7], 16) + for i in range(eeprom_index, eeprom_index + data_length): + data_buffer[i][0] = 1 + data_buffer[i][1] = int(file_line[(9 + 2 * (i-eeprom_index)):(11 + 2 * (i-eeprom_index))], 16) + data_buffer_index += data_length + + if data_buffer_index > (byte_size + 1): + print('Total number of data bytes has exceeded %d.' % byte_size) + return False, None + + file_line = hex_file.readline() + hex_file.close() + return True, data_buffer + + @staticmethod + def extract_hex_one_page_spaced_data(hex_file, data_buffer): + """extract_one_page_data() extracts 256 bytes of data bytes from the hex file. + Args: + (File) hex_file + (Array) data_buffer + Returns: + (int) status""" + + page_size = len(data_buffer) + line_size = 32 + if page_size % line_size != 0: + return False + line_num = int(page_size / line_size) + + for i in range(line_num): + file_line = hex_file.readline() + for j in range(line_size): + data_buffer[int(i * line_size + j)] = int(file_line[int(3 * j):int(3 * j + 2)], 16) + + return True + + @staticmethod + def extract_intel_hex_one_page_data(hex_file, data_buffer): + """extract_one_page_data() extracts 256 bytes of data bytes from the hex file. + Args: + (File) hex_file + (Array) data_buffer + Returns: + (int) status""" + byte_number = 0 + page_size = len(data_buffer) + + while byte_number < page_size: # Extract one page + file_line = hex_file.readline() # Read one line + if file_line == '': # End of file + if byte_number < page_size: # Data buffer is not filled + for i in range(byte_number, page_size): # Fill the empty bytes with 0xFF + data_buffer[i] = 0xFF + return True + if int(file_line[7:9], 16) == 0x00: # If the hex line contains data + length = int(file_line[1:3], 16) # Calculate number of bytes in the hex line + for i in range(length): # Store each bytes into the data buffer + data_buffer[byte_number + i] = int(file_line[(9 + 2 * i): 11 + 2 * i], 16) + byte_number += length + return True + + @staticmethod + def write_to_file(hex_file, data_buffer): + if len(data_buffer) % 16 != 0: + return False + + with open(hex_file, 'w') as f: + f.write(':020000040000FA\n') + start_address = 0x0000 + for i in range(0, len(data_buffer), 16): + data_line = ':10%04X00' % start_address + chk_sum = 0x10 + chk_sum += (start_address >> 8) & 0xFF + chk_sum += start_address & 0xFF + + for j in range(16): + data_line = data_line + '%02X' % data_buffer[i + j] + chk_sum += int(data_buffer[i + j]) + chk_sum = ~(chk_sum & 0xFF) + 1 + data_line = data_line + '%02X\n' % (chk_sum & 0xFF) + f.write(data_line) + start_address += 0x10 + + f.write(':00000001FF\n') + f.close() + return True + + @staticmethod + def write_to_file_spaced_data(hex_file, data_buffer): + if len(data_buffer) % 32 != 0: + return False + + with open(hex_file, 'w') as f: + for i in range(0, len(data_buffer), 32): + data_line = " ".join(map("{:02x}".format, data_buffer[i:i+32])) + ' \n' + f.write(data_line) + + f.close() + return True + + @staticmethod + def print_data_table(col_header, row_header, data_buffer, spacing=8): + arr = [['-' for i in range(len(row_header))] for j in range(len(col_header))] + data_array = [None] * (len(row_header) * len(col_header)) + for i in range(len(data_buffer)): + if data_buffer[i] is not None: + data_array[i] = data_buffer[i] + for i in range(len(col_header)): + for j in range(len(row_header)): + if data_array[i * len(row_header) + j] is not None: + arr[i][j] = str(data_array[i * len(row_header) + j]) + row_format = "{:^{spacing}}" * (len(row_header) + 1) + print(row_format.format("", *row_header, spacing=spacing)) + for col, row in zip(col_header, arr): + print(row_format.format(col, *row, spacing=spacing)) + + @staticmethod + def parse_int_args(my_str: str, reverse=False): + if reverse not in [True, False]: + raise ValueError('reverse arg must be bool') + + my_str = my_str.strip() + try: + temp = [(lambda sub: range(sub[0], sub[-1] + 1))(list(map(int, ele.split('-')))) for ele in my_str.split(', ')] + except: + temp = [(lambda sub: range(sub[0], sub[-1] + 1))(list(map(int, ele.split('-')))) for ele in my_str.split(',')] + res = [b for a in temp for b in a] + # sort the + res = sorted(res, reverse=reverse) + return res + + @staticmethod + def gen_port_str(*ports, prefix='', verbose=True, **kwports) -> str: + """ + This function is to generate the ports string depends on the input + :param *ports: ports without specify the keywords, *ports can be single int, list and tuple of ints for + : multiple channels + :param *kwports: ports with specify the keywords, *kwports can be single int, list or tuple + : special for keyword with "start" and "end", for example, start = 10, end = 20 means 10-20 + :prefix is added so that for ports like cd0,cd1,cd3 etc, input [0,1,2,3], and later add the common prefix later. + :return the return value will be a string in format '1-2,4,10-20,25' + """ + pc_ports = set() + for item in ports: + if type(item) is int: + pc_ports.add(item) + elif isinstance(item, Iterable): + pc_ports.update(item) + else: + raise ValueError(f"Parameter '{item}' error, parameter must be int or list with int") + + specified_pair_start = [] + specified_pair_end = [] + for key, item in kwports.items(): + if 'start' in key.lower(): + specified_pair_start.append(item) + elif 'end' in key.lower() or 'stop' in key.lower(): + specified_pair_end.append(item) + + elif type(item) is int: + pc_ports.add(item) + elif isinstance(item, Iterable): + pc_ports.update(item) + else: + raise ValueError(f"Parameter '{key} = {item}' error, parameter must be int or list with int") + + # if len(specified_pair_start) > 0 and len(specified_pair_end) > 0: + if len(specified_pair_start) == len(specified_pair_end): + for _start, _end in zip(specified_pair_start, specified_pair_end): + pc_ports.update(range(_start, _end + 1)) + else: + raise ValueError("start and end must be used in pair") + + pc_ports_list = list(pc_ports) + pc_ports_list.sort() + + # merge the sections + pc_ports_sections = [] + start = pc_ports_list[0] + prev = pc_ports_list[0] + for _idx, item in enumerate(pc_ports_list): + + if item - prev > 1: + pc_ports_sections.append([start, prev]) + start = item + if _idx == len(pc_ports_list) - 1: + pc_ports_sections.append([start, item]) + prev = item + # logger.debug(f"All Ports: {pc_ports_list}") + + pc_ports_section_strs = [] + for section in pc_ports_sections: + if section[0] == section[1]: + pc_ports_section_strs.append(str(section[0])) + else: + pc_ports_section_strs.append(f"{section[0]}-{section[1]}") + _all_ports_str = ','.join(pc_ports_section_strs) + + # dealing with add prefix + all_ports_str = prefix + all_ports_str += _all_ports_str + all_ports_str = all_ports_str.replace('-', f'-{prefix}') + all_ports_str = all_ports_str.replace(',', f',{prefix}') + + if verbose: + print(f"Generated ASIC port string: {all_ports_str}") + return all_ports_str + + @staticmethod + def gen_sorted_port_lst(*ports, verbose=True): + if isinstance(ports, int): + ports = [ports] + + _port_str = UtilObj.gen_port_str(*ports, verbose=verbose) + _lc_ports_id = UtilObj.parse_int_args(_port_str) + + _rtn = sorted(list(set(_lc_ports_id))) + + return _rtn diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/cpo/lib/oe_cmis_rw.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/cpo/lib/oe_cmis_rw.py new file mode 100755 index 00000000000..bbe2b7657c5 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/cpo/lib/oe_cmis_rw.py @@ -0,0 +1,287 @@ +import os +import fcntl +import time +import io +import struct +from cpo_platform_config import CPO_PLATFORM_CONFIG, OE_I2C_PATH_MAP + +class oe_cmis_rw(): + + def cmis_oe_bus_get(self, oe_index): + return CPO_PLATFORM_CONFIG.get("oe_bus_map")[oe_index] + + def cmis_read(self, oe_index, bank, page, offset, rd_len, lock): + raise NotImplementedError + + def cmis_write(self, oe_index, bank, page, offset, wr_data, lock): + raise NotImplementedError + +class oe_cmis_sysfs_rw(oe_cmis_rw): + + def acquire_lock(self, fd): + fcntl.flock(fd, fcntl.LOCK_EX) + + def release_lock(self, fd): + fcntl.flock(fd, fcntl.LOCK_UN) + + def dfd_i2c_sysfs_read(self, fd, offset, rd_len): + val_list = [] + try: + os.lseek(fd, offset, os.SEEK_SET) + ret = os.read(fd, rd_len) + for item in ret: + val_list.append(item) + return True, val_list + except Exception as e: + return False, str(e) + + def dfd_i2c_sysfs_write(self, fd, offset, wr_buf): + try: + os.lseek(fd, offset, os.SEEK_SET) + ret = os.write(fd, bytes(wr_buf)) + if ret == len(wr_buf): + return True, "" + return False, "write buf len: %s, write len indeed: %s" % (len(wr_buf), ret) + except Exception as e: + return False, str(e) + + def cmis_read(self, oe_index, bank, page, offset, rd_len, lock=True): + """ + Read cmis data from /sys/bus/i2c/devices/XX-0050/eeprom + + Args : + bank: cmis bank + page: cmis page + offset: read data offset + rd_len: read length + + Returns: + True, value if read is successfully, False, errmsg if not + """ + + val_list = [] + msg = "" + ret = "" + fd = -1 + i2c_path = OE_I2C_PATH_MAP.get(oe_index) + if not os.path.exists(i2c_path): + msg = i2c_path + " not found!" + return False, msg + time.sleep(0.1) + try: + fd = os.open(i2c_path, os.O_RDWR) + if fd < 0: + msg = "cmis_sysfs_byte_read open %s failed, fd: %s" % (i2c_path, fd) + return False, msg + if (lock): + self.acquire_lock(fd) + # set bank + status, log = self.dfd_i2c_sysfs_write(fd, 0x7e, [bank]) + if status is False: + return status, log + # set page + status, log = self.dfd_i2c_sysfs_write(fd, 0x7f, [page]) + if status is False: + return status, log + # read data + for i in range(0, rd_len): + status, val = self.dfd_i2c_sysfs_read(fd, offset+i, 1) + if status is False: + return status, val + val_list.extend(val) + return True, val_list + except Exception as e: + return False, str(e) + finally: + if (fd > 0) and lock: + self.release_lock(fd) + if fd > 0: + os.close(fd) + + def cmis_write(self, oe_index, bank, page, offset, wr_data, lock=True): + """ + Write cmis data through /sys/bus/i2c/devices/XX-0050/eeprom + + Args : + bank: cmis bank + page: cmis page + offset: write data offset + wr_data: write data + + Returns: + True, "" if read is successfully, False, errmsg if not + """ + val_list = [] + msg = "" + ret = "" + fd = -1 + i2c_path = OE_I2C_PATH_MAP.get(oe_index) + if not os.path.exists(i2c_path): + msg = i2c_path + " not found!" + return False, msg + # time.sleep(0.1) + try: + fd = os.open(i2c_path, os.O_RDWR) + if fd < 0: + msg = "cmis_sysfs_byte_read open %s failed, fd: %s" % (i2c_path, fd) + return False, msg + if (lock): + self.acquire_lock(fd) + # set bank + status, log = self.dfd_i2c_sysfs_write(fd, 0x7e, [bank]) + if status is False: + return status, log + # set page + status, log = self.dfd_i2c_sysfs_write(fd, 0x7f, [page]) + if status is False: + return status, log + # write data + status, log = self.dfd_i2c_sysfs_write(fd, offset, wr_data) + return status, log + except Exception as e: + return False, str(e) + finally: + if (fd > 0) and lock: + self.release_lock(fd) + if fd > 0: + os.close(fd) + +class I2CException(Exception): + def __init__(self, detailed_error_message): + super(I2CException, self).__init__(detailed_error_message) + +I2C_SLAVE = 0x0703 +I2C_SLAVE_FORCE = 0x0706 + +class oe_cmis_i2c_rw(oe_cmis_rw): + + frame_max_size = 256 + + def write(self, byte_data): + self.i2c_fw.write(byte_data) + + def read(self, byte_num): + return self.i2c_fr.read(byte_num) + + def host_read(self, rd_len, verbose = False): + try: + data_in = [0] * rd_len + idx = 0 + read_size = 0 + while rd_len: + if rd_len <= self.frame_max_size: + read_size = rd_len + try: + data_raw = self.read(read_size) + except: + raise I2CException("host_read() exception on i2c read") + rd_len = 0 + else: + read_size = self.frame_max_size + try: + data_raw = self.read(read_size) + except: + raise I2CException("host_read() exception on i2c read") + rd_len = rd_len - read_size + # print(data_raw) + data_readback = struct.unpack('B' * read_size, data_raw) + # print(data_readback) + for i in range (read_size): + data_in[idx + i] = data_readback[i] + idx = idx + read_size + return idx, data_in + except (IOError, OSError): + if verbose: + print("I/O error occurred on read", flush=True) + raise I2CException("host_read() exception on i2c read") + + def host_write(self, data, verbose = False): + try: + data_raw = struct.pack('B' * len(data), *data) + self.write(data_raw) + except (IOError, OSError): + if verbose: + print("I/O error occurred on write", flush=True) + raise I2CException("host_write() exception on i2c write") + + def reg_read(self, offset, rd_len, verbose = False): + self.host_write([offset], verbose=verbose) + status, data = self.host_read(rd_len, verbose=verbose) + return status, data + + def reg_write(self, offset, data, verbose = False): + try: + iter(data) + except TypeError: + data = [data] + n = len(data) + idx = 0 + while n: + if n <= (self.frame_max_size - 1): + data_out = [0] * (n + 1) + data_out[0] = offset + for i in range(n): + data_out[i + 1] = data[idx+i] + offset = offset + n + idx = idx + n + n = 0 + else: + data_out = [0] * self.frame_max_size + data_out[0] = offset + for i in range(self.frame_max_size-1): + data_out[i + 1] = data[idx+i] + offset = offset + (self.frame_max_size - 1) + idx = idx + (self.frame_max_size - 1) + n = n - (self.frame_max_size - 1) + self.host_write(data_out, verbose=verbose) + + def set_page(self, page): + self.reg_write(0x7F, [page]) + + def set_bank(self, bank): + self.reg_write(0x7E, [bank]) + + def set_device_address(self, device_addr): + try: + if self.bus == 1: + fcntl.ioctl(self.i2c_fr, I2C_SLAVE, device_addr) + fcntl.ioctl(self.i2c_fw, I2C_SLAVE, device_addr) + else: + fcntl.ioctl(self.i2c_fr, I2C_SLAVE_FORCE, device_addr) + fcntl.ioctl(self.i2c_fw, I2C_SLAVE_FORCE, device_addr) + except: + raise I2CException("cmis_read() cannot set dev addr") + + def cmis_read(self, oe_index, bank, page, offset, rd_len, lock=True): + self.bus = self.cmis_oe_bus_get(oe_index=oe_index) + try: + self.i2c_fr = io.open("/dev/i2c-" + str(self.bus), "rb", buffering=0) + self.i2c_fw = io.open("/dev/i2c-" + str(self.bus), "wb", buffering=0) + self.set_device_address(0x50) + if (offset >= 128): + self.set_page(page=page) + self.set_bank(bank=bank) + status , data = self.reg_read(offset=offset, rd_len=rd_len) + return True if status > 0 else False, data + except Exception as e: + return False, str(e) + finally: + self.i2c_fr.close() + self.i2c_fw.close() + + def cmis_write(self, oe_index, bank, page, offset, wr_data, lock=True): + self.bus = self.cmis_oe_bus_get(oe_index=oe_index) + try: + self.i2c_fr = io.open("/dev/i2c-" + str(self.bus), "rb", buffering=0) + self.i2c_fw = io.open("/dev/i2c-" + str(self.bus), "wb", buffering=0) + self.set_device_address(0x50) + if (offset >= 128): + self.set_page(page=page) + self.set_bank(bank=bank) + self.reg_write(offset=offset, data=wr_data) + return True , "" + except Exception as e: + return False, str(e) + finally: + self.i2c_fr.close() + self.i2c_fw.close() \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/cpo/script/cpo_daemon.sh b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/cpo/script/cpo_daemon.sh new file mode 100755 index 00000000000..92f666a8970 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/cpo/script/cpo_daemon.sh @@ -0,0 +1,63 @@ +#!/bin/bash + +wait_syncd() { + # wait until bcm sdk is ready to get a request + while true; do + /usr/bin/bcmcmd -t 1 "show unit" | grep BCM >/dev/null 2>&1 + rv=$? + if [ $rv -eq 0 ]; then + break + fi + sleep 1 + done +} + +start() { + echo "Starting cpo_daemon_process..." + + platforms=( \ + "x86_64-micas_m2-w6940-128x1-fr4-r0" \ + ) + + result=$(cat /host/machine.conf | grep onie_platform | cut -d = -f 2) + echo "platform: $result" + + cpo_device=0 + for i in ${platforms[*]}; do + if [ $result == $i ]; + then + cpo_device=1 + break + fi + done + + if [ $cpo_device -eq 1 ]; + then + wait_syncd + cpo_daemon_process + else + echo "$result not support cpo_daemon_process" + exit 0 + fi +} + +wait() { + echo "wait cpo_daemon_process... do nothing" +} + +stop() { + echo "Stopping cpo_daemon_process..." + kill -9 `ps -ef | grep python3 | grep /usr/local/bin/cpo_daemon_process | awk '{print $2}'` + echo "Stopped cpo_daemon_process..." + exit 0 +} + +case "$1" in + start|wait|stop) + $1 + ;; + *) + echo "Usage: $0 {start|wait|stop}" + exit 1 + ;; +esac diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/cpo/script/cpo_daemon_process b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/cpo/script/cpo_daemon_process new file mode 100755 index 00000000000..0a07178b698 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/cpo/script/cpo_daemon_process @@ -0,0 +1,1516 @@ +#!/usr/bin/python3 +import traceback +import sys +import signal +import time +import threading +import socket +import select +import copy +import os +import json +import fcntl +import io +import subprocess +from sonic_py_common import device_info,daemon_base +from swsscommon import swsscommon +from oe_cmis_rw import oe_cmis_sysfs_rw, oe_cmis_i2c_rw +from cmis_memory_map import cmis_memory_helper_base as cmis_memory_map_base +from cpo_platform_config import CPO_PLATFORM_CONFIG +from cpo_platform_config import helper_logger, Port_Mapping, OE_I2C_PATH_MAP, BANK_LANE_NUM +from cpo_platform_config import CPO_PLATFORM_MEDIA_SETTINGS, OE_NUM, OE_BANK_NUM, OE_RLM_NUM +CPO_STATUS_CHECK_PERIOD_SECS = 1 +DATABASE_CHECK_PRTIOD_SECS = 0.01 +SELECT_TIMEOUT_MSECS = 1000 +global_oe_dict = dict() +global_bank_dict = dict() +global_rlm_dict = dict() +global_async_ret = dict() +global_oe_daemon_thread_dict = dict() +# Signal handler +def signal_handler(sig, frame): + global stop_event + stop_event.set() + +is_subset = lambda dict1, dict2: all(item in dict2.items() for item in dict1.items()) +def is_state_complete(target_state, active_state): + if target_state == active_state: + return True + if isinstance(target_state, dict) and isinstance(active_state, dict): + if is_subset(target_state, active_state): + return True + else: + for field_key, field_value in target_state.items(): + if not is_state_complete(field_value, active_state.get(field_key, None)): + return False + return True + if isinstance(target_state, list): + if active_state in target_state: + return True + else: + return False + return False + +def check_port_in_range(range_str, physical_port): + RANGE_SEPARATOR = '-' + range_list = range_str.split(RANGE_SEPARATOR) + start_num = int(range_list[0].strip()) + end_num = int(range_list[1].strip()) + if start_num <= physical_port <= end_num: + return True + return False + +def file_rw_lock(oe_index): + pidfile = open(OE_I2C_PATH_MAP.get(oe_index), "r") + if pidfile == None: + return pidfile + # Retry 100 times to lock file + for i in range(0, 100): + try: + fcntl.flock(pidfile, fcntl.LOCK_EX | fcntl.LOCK_NB) + return pidfile + except Exception: + time.sleep(0.05) + continue + pidfile.close() + return None + +def file_rw_unlock(pidfile): + if pidfile == None: + return True + try: + fcntl.flock(pidfile, fcntl.LOCK_UN) + pidfile.close() + return True + except Exception as e: + print("file unlock err, msg:%s" % (str(e))) + return False + +def convert_to_table_output(title, input_dict:dict): + row_split_char = '=' + def string_fill(input, target_len): + string_list = list(input) + string_list.extend([' '] * (target_len - len(string_list))) + return ''.join(string_list) + pad_len = 3 + pad_len2 = 5 + output_string = io.StringIO() + + table_info = dict() + for table, table_dict in input_dict.items(): + first_column_set = set() + head_keys_len = dict() + division = 0 + for key, value in table_dict.items(): + key_len = len(key) + if isinstance(value, dict): + max_value_len = max([len(item) for item in value.values()]) + first_column_set.update(set(value.keys())) + division = 2 + else: + max_value_len = len(str(value)) + first_column_set.add(key) + division = 1 + head_keys_len[key] = key_len if key_len > max_value_len else max_value_len + + table_info[table] = { + "first_column_set": first_column_set, + "head_keys_len": head_keys_len, + "division": division + } + + first_col_len = 0 + total_row_len = 0 + for table, table_cfg in table_info.items(): + max_col_len = max([len(item) for item in table_cfg["first_column_set"]]) + first_col_len = max_col_len if max_col_len > first_col_len else first_col_len + head_keys_len_sum = sum(table_cfg["head_keys_len"].values()) + (pad_len+1) * len(table_cfg["head_keys_len"].values()) + total_row_len = head_keys_len_sum if head_keys_len_sum > total_row_len else total_row_len + + total_row_len += (first_col_len + 1) + print(row_split_char*total_row_len, end='\n', file=output_string) + + print("|{}|".format(title.center(total_row_len-2)), end='\n', file=output_string) + # print(title.center(total_row_len), file=output_string) + + for table, table_cfg in table_info.items(): + print(row_split_char*total_row_len, end='\n', file=output_string) + if table_cfg["division"] == 2: + head_keys_len = table_cfg["head_keys_len"] + first_column_set = table_cfg["first_column_set"] + head_list = [key.center(key_len + pad_len) for key, key_len in head_keys_len.items()] + head_line = '|'.join(head_list) + + + print("|{}|".format(' '*(first_col_len - 1)), end='', file=output_string) + # print(' '*first_col_len, end='|', file=output_string) + print(head_line, end='|\n', file=output_string) + print(row_split_char*total_row_len, end='\n', file=output_string) + + first_column_list = list(first_column_set) + first_column_list.sort() + for first_column in first_column_list: + print("|{}|".format(first_column.center(first_col_len -1)), end='', file=output_string) + # print(first_column.center(first_col_len), end='|', file=output_string) + + value_row_list = [input_dict[table][head_key][first_column].center(key_len+pad_len) for head_key, key_len in head_keys_len.items()] + value_row = '|'.join(value_row_list) + print(value_row, end='|\n', file=output_string) + else: + head_keys_len = table_cfg["head_keys_len"] + first_column_set = table_cfg["first_column_set"] + first_column_list = list(first_column_set) + first_column_list.sort() + for column in first_column_list: + key = column + value = input_dict[table][key] + copp = "{}{}".format(string_fill(key, first_col_len+pad_len2), value) + string = "| {}|".format(string_fill(copp, total_row_len-3)) + print(string, file=output_string) + # print(string_fill(key, first_col_len+pad_len2), end='', file=output_string) + # print(value, file=output_string) + + print(row_split_char*total_row_len, end='\n', file=output_string) + return output_string + +def get_media_val_str_from_dict(media_dict): + LANE_STR = 'lane' + LANE_SEPARATOR = ',' + media_str = '' + tmp_dict = {} + for keys in media_dict: + lane_num = int(keys.strip()[len(LANE_STR):]) + tmp_dict[lane_num] = media_dict[keys] + for key in range(0, len(tmp_dict)): + media_str += tmp_dict[key] + if key != list(tmp_dict.keys())[-1]: + media_str += LANE_SEPARATOR + return media_str + +def get_media_val_str(num_logical_ports, lane_dict, logical_idx): + LANE_STR = 'lane' + logical_media_dict = {} + num_lanes_on_port = len(lane_dict) + # The physical ports has more than one logical port meaning it is + # in breakout mode. So fetch the corresponding lanes from the file + media_val_str = '' + if (num_logical_ports > 1) and \ + (num_lanes_on_port >= num_logical_ports): + num_lanes_per_logical_port = num_lanes_on_port//num_logical_ports + start_lane = logical_idx * num_lanes_per_logical_port + + for lane_idx in range(start_lane, start_lane + + num_lanes_per_logical_port): + lane_idx_str = LANE_STR + str(lane_idx) + logical_lane_idx_str = LANE_STR + str(lane_idx - start_lane) + logical_media_dict[logical_lane_idx_str] = lane_dict[lane_idx_str] + + media_val_str = get_media_val_str_from_dict(logical_media_dict) + else: + media_val_str = get_media_val_str_from_dict(lane_dict) + return media_val_str + +def show_status(args, port_mapping): + oe_index = args["oe_index"] + oe_object = global_oe_dict[oe_index] + bank_index_list = port_mapping.oe_index_to_bank_index_list(oe_index=oe_index) + rlm_index_list = port_mapping.oe_index_to_rlm_index_list(oe_index=oe_index) + info = {"OE{}".format(oe_index): oe_object.active_state} + for bank_global_index in bank_index_list: + bank_local_index = port_mapping.bank_global_index_to_local_index(bank_global_index) + info["OE{}-BANK{}".format(oe_index, bank_local_index)] = global_bank_dict[bank_global_index].active_state + for rlm_global_index in rlm_index_list: + rlm_local_index = port_mapping.rlm_global_index_to_local_index(rlm_global_index) + info["OE{}-RLM{}".format(oe_index, rlm_local_index)] = global_rlm_dict[rlm_global_index].active_state + return True, info + +def enter_mission_mode(args, port_mapping): + oe_index = args.get("oe_index", None) + manully = args.get("manully", False) + if oe_index == None: + return False, "" + # suspend oe_daemon + oe_object = global_oe_daemon_thread_dict[oe_index] + oe_object.suspend() + if manully: + oe_object.manully_enabled = True + if oe_object.mission_mode == True: + oe_object.resume() + return True, "" + try: + retval, info = global_oe_dict[oe_index].module_reset() + if (not retval): + helper_logger.log_warn("OE{}, module_reset timeout!".format(oe_index)) + else: + helper_logger.log_info("OE{}, module_reset succeed!".format(oe_index)) + # populate_staged_set + for bank_local_index in range(OE_BANK_NUM): + bank_global_index = (oe_index*OE_BANK_NUM) + bank_local_index + port_index_list = port_mapping.bank_index_to_port_index_list(bank_global_index) + ports_speed_set = set() + for port_index in port_index_list: + ports_speed_set.add(port_mapping.get_port_speed(port_index)) + if len(ports_speed_set) != 1: + continue + speed = ports_speed_set.pop() + if speed == None: + continue + retval, info = global_bank_dict[bank_global_index].apply_datapath_init_clear() + retval, info = global_bank_dict[bank_global_index].populate_staged_set(speed=speed) + # retval, info = global_bank_dict[bank_global_index].apply_datapath_init() # TODO: check + if (not retval): + helper_logger.log_warn("OE{}-BANK{}, populate_staged_set {} failed!".format(oe_index, bank_local_index, speed)) + else: + helper_logger.log_info("OE{}-BANK{}, populate_staged_set {} succeed!".format(oe_index, bank_local_index, speed)) + for bank_local_index in range(OE_BANK_NUM): + bank_global_index = (oe_index*OE_BANK_NUM) + bank_local_index + retval, info = global_bank_dict[bank_global_index].datapath_init() + if (not retval): + helper_logger.log_warn("OE{}-BANK{}, datapath_init failed!".format(oe_index, bank_local_index)) + else: + helper_logger.log_info("OE{}-BANK{}, datapath_init succeed!".format(oe_index, bank_local_index)) + for bank_local_index in range(OE_BANK_NUM): + bank_global_index = (oe_index*OE_BANK_NUM) + bank_local_index + retval, info = global_bank_dict[bank_global_index].tx_output_enabled() + if (not retval): + helper_logger.log_warn("OE{}-BANK{}, tx_output_enabled failed!".format(oe_index, bank_local_index)) + else: + helper_logger.log_info("OE{}-BANK{}, tx_output_enabled succeed!".format(oe_index, bank_local_index)) + retval, info = global_oe_dict[oe_index].module_exit_lpmode() + if (not retval): + helper_logger.log_warn("OE{}, module_exit_lpmode failed!".format(oe_index)) + else: + helper_logger.log_info("OE{}, module_exit_lpmode succeed!".format(oe_index)) + rlm_power_cfg_threads = list() + rlm_index_list = port_mapping.oe_index_to_rlm_index_list(oe_index) + for rlm_global_index in rlm_index_list: + thread = threading.Thread(target=rlm_power_cfg_thread, args=(rlm_global_index, "full-power"), daemon=True) + rlm_power_cfg_threads.append(thread) + thread.start() + for thread in rlm_power_cfg_threads: + thread.join() + # set true after config done + oe_object.mission_mode = True + # oe_object.manully_disabled = False + return True, "" + except Exception as e: + return False, str(e) + finally: + oe_object.resume() + +def enter_mission_mode_without_reset(args, port_mapping): + oe_index = args.get("oe_index", None) + manully = args.get("manully", False) + if oe_index == None: + return False, "" + # suspend oe_daemon + oe_object = global_oe_daemon_thread_dict[oe_index] + oe_object.suspend() + if manully: + oe_object.manully_enabled = True + if oe_object.mission_mode == True: + oe_object.resume() + return True, "" + try: + for bank_local_index in range(OE_BANK_NUM): + bank_global_index = (oe_index*OE_BANK_NUM) + bank_local_index + retval, info = global_bank_dict[bank_global_index].datapath_init() + if (not retval): + helper_logger.log_warn("OE{}-BANK{}, datapath_init failed!".format(oe_index, bank_local_index)) + else: + helper_logger.log_info("OE{}-BANK{}, datapath_init succeed!".format(oe_index, bank_local_index)) + for bank_local_index in range(OE_BANK_NUM): + bank_global_index = (oe_index*OE_BANK_NUM) + bank_local_index + retval, info = global_bank_dict[bank_global_index].tx_output_enabled() + if (not retval): + helper_logger.log_warn("OE{}-BANK{}, tx_output_enabled failed!".format(oe_index, bank_local_index)) + else: + helper_logger.log_info("OE{}-BANK{}, tx_output_enabled succeed!".format(oe_index, bank_local_index)) + oe_object.mission_mode = True + return True, "" + except Exception as e: + return False, str(e) + finally: + oe_object.resume() + +def exit_mission_mode(args, port_mapping): + oe_index = args.get("oe_index", None) + manully = args.get("manully", False) + if oe_index == None: + return False, "" + oe_object = global_oe_daemon_thread_dict[oe_index] + oe_object.suspend() + if manully: + oe_object.manully_disabled = True + if oe_object.mission_mode == False: + oe_object.resume() + return True, "" + try: + # set false before config + oe_object.mission_mode = False + for bank_local_index in range(OE_BANK_NUM): + bank_global_index = (oe_index*OE_BANK_NUM) + bank_local_index + ret, status = global_bank_dict[bank_global_index].datapath_deinit() + if (not ret): + helper_logger.log_warn("OE{}-BANK{}, datapath_deinit failed!".format(oe_index, bank_local_index)) + else: + helper_logger.log_info("OE{}-BANK{}, datapath_deinit succeed!".format(oe_index, bank_local_index)) + for bank_local_index in range(OE_BANK_NUM): + bank_global_index = (oe_index*OE_BANK_NUM) + bank_local_index + ret, status = global_bank_dict[bank_global_index].tx_output_disabled() + if (not ret): + helper_logger.log_warn("OE{}-BANK{}, tx_output_disabled failed!".format(oe_index, bank_local_index)) + else: + helper_logger.log_info("OE{}-BANK{}, tx_output_disabled succeed!".format(oe_index, bank_local_index)) + return True, "" + except Exception as e: + return False, str(e) + finally: + oe_object.resume() + +def dict_key_replace(input_dict, old_key, new_key): + if isinstance(input_dict, dict): + input_dict_copy = copy.deepcopy(input_dict) + for key, value in input_dict.items(): + if isinstance(value, dict): + input_dict_copy[key] = dict_key_replace(input_dict_copy[key], old_key, new_key) + else: + if key == old_key: + input_dict_copy[new_key] = value + if old_key in input_dict.keys(): + input_dict_copy.pop(old_key) + return input_dict_copy + else: + return None + +def dict_special_key(special_keys, input_value): + if isinstance(input_value, dict): + ret = dict() + for name, value in input_value.items(): + if special_keys and (name not in special_keys.keys()): + continue + if special_keys: + ret[name] = dict_special_key(special_keys.get(name, None), value) + else: + ret[name] = dict_special_key(None, value) + else: + ret = input_value + return ret + +def show_interface_dom_info(args, port_mapping): + info = dict() + oe_index_list = set() + target_port_index_list = args["port_index_list"] + output_format = "" + if "output_format" in args: + output_format = args["output_format"] + for port_index in target_port_index_list: + oe_index_list.add(port_mapping.port_index_to_oe_index(port_index)) + for oe_index in oe_index_list: + lock = file_rw_lock(oe_index) + try: + for global_bank_index in port_mapping.oe_index_to_bank_index_list(oe_index): + bank_port_index_list = port_mapping.bank_index_to_port_index_list(global_bank_index) + port_list = [port_index for port_index in bank_port_index_list if port_index in target_port_index_list] + if len(port_list) == 0: + continue + local_bank_index = port_mapping.bank_global_index_to_local_index(global_bank_index) + cmis_map = cmis_memory_map(cmis_i2c_util, oe_index, local_bank_index) + state_dict = { + "dom info": { + 'temperature': None + }, + "lanes dom info": { + "TX Power": None, + "RX Power": None, + "Tx LOS": None, + "Rx LOS": None, + "Tx Fault": None, + "TX Bias": None, + } + } + ret_state = cmis_map.get_field(state_dict) + for port_index in port_list: + lane_list = port_mapping.get_port_lane_list(port_index) + lane_list = ["lane{:02d}".format(lane_index) for lane_index in lane_list] + state_dict = { + "dom info": { + 'temperature': None + }, + "lanes dom info": { + "RX Power": dict.fromkeys(lane_list), + "TX Bias": dict.fromkeys(lane_list), + "TX Power": dict.fromkeys(lane_list), + "Rx LOS": dict.fromkeys(lane_list), + "Tx Fault": dict.fromkeys(lane_list), + "Tx LOS": dict.fromkeys(lane_list), + } + } + port_ret_state = dict_special_key(state_dict, ret_state) + for lane_index in range(len(lane_list)): + port_ret_state = dict_key_replace(port_ret_state, lane_list[lane_index], "lane{}".format(lane_index)) + info["port%d"%port_index] = port_ret_state + except Exception as e: + helper_logger.log_warn("OE{} show_interface_dom_info warn: {}".format(oe_index, str(e))) + helper_logger.log_warn(traceback.format_exc()) + return False, str(e) + finally: + file_rw_unlock(lock) + if output_format == "json": + return True, json.dumps(info) + ret_info = io.StringIO() + for port_index in target_port_index_list: + ret_info.write(convert_to_table_output("port%d"%port_index, info["port%d"%port_index]).getvalue()) + return True, ret_info.getvalue() + +def show_oe_temperature(args, port_mapping): + info = dict() + oe_index_list = args.get("oe_index_list", None) + oe_index = args.get("oe_index", None) + if (oe_index_list == None) and (oe_index != None): + oe_index_list = [oe_index] + for oe_index in oe_index_list: + cmis_map = cmis_memory_map(cmis_util, oe_index) + state_dict = { + "dom info": { + 'temperature': None + } + } + ret_state = cmis_map.get_field(state_dict) + info["oe{}".format(oe_index)] = ret_state["dom info"]["temperature"] + return True, info + +def show_interface_speed(args, port_mapping): + info = dict() + port_index_list = args.get("port_index_list", None) + port_index = args.get("port_index", None) + if (port_index_list == None) and (port_index != None): + port_index_list = [port_index] + for port_index in port_index_list: + oe_index = port_mapping.port_index_to_oe_index(port_index) + bank_index = port_mapping.port_index_to_bank_index(port_index) + oe_daemon = global_oe_daemon_thread_dict[oe_index] + bank_speed = oe_daemon.bank_speed_dict.get(bank_index, "NAN") + info["port{}".format(port_index)] = bank_speed + return True, info + +def show_portmap(args, port_mapping): + info = list() + port_index_list = args.get("port_index_list", None) + port_index = args.get("port_index", None) + if (port_index_list == None) and (port_index != None): + port_index_list = [port_index] + head_line = "{:20s}{:20s}{:20s}{:20s}".format("PORT_INDEX", "OE_INDEX", "BANK_INDEX", "RLM_INDEX") + info.append(head_line) + for port_index in port_index_list: + oe_index = port_mapping.port_index_to_oe_index(port_index) + bank_index = port_mapping.port_index_to_bank_index(port_index) + bank_index = port_mapping.bank_global_index_to_local_index(bank_index) + rlm_index = port_mapping.port_index_to_rlm_index(port_index) + data_line = "{:20s}{:20s}{:20s}{:20s}".format("port%d"%port_index, "oe%d"%oe_index, "bank%d"%bank_index, "rlm%d"%rlm_index) + info.append(data_line) + info = "\n".join(info) + return True, info + +def show_tx_output(args, port_mapping): + info = dict() + oe_index_list = set() + lane_index_list = args.get("lane_index_list", None) + for port_index in args["port_index_list"]: + oe_index_list.add(port_mapping.port_index_to_oe_index(port_index)) + for oe_index in oe_index_list: + # lock oe + lock = file_rw_lock(oe_index) + try: + for port_index in args["port_index_list"]: + if oe_index != port_mapping.port_index_to_oe_index(port_index): + continue + bank_index = port_mapping.port_index_to_bank_index(port_index) + local_bank_index = port_mapping.bank_global_index_to_local_index(bank_index) + cmis_map = cmis_memory_map(cmis_i2c_util, oe_index, local_bank_index) + lane_list = port_mapping.get_port_lane_list(port_index) + lane_list = ["lane{:02d}".format(lane_index) for lane_index in lane_list] + field_state = cmis_map.get_field("Tx output disable") + ret_state = dict() + for lane_index in range(len(lane_list)): + if (lane_index_list != None) and (lane_index not in lane_index_list): + continue + value = field_state.pop(lane_list[lane_index]) + ret_state["lane{}".format(lane_index)] = value + info["port%d"%port_index] = ret_state + except Exception as e: + helper_logger.log_warn("OE{} show_interface_dom_info warn: {}".format(oe_index, str(e))) + helper_logger.log_warn(traceback.format_exc()) + return False, str(e) + finally: + file_rw_unlock(lock) + return True, info + +def set_tx_output(args, port_mapping): + result = True + info = dict() + turn_on = args.get("turn_on", False) + lane_index_list = args.get("lane_index_list", list(range(BANK_LANE_NUM))) + if lane_index_list == None: + lane_index_list = list(range(BANK_LANE_NUM)) + target_port_index_list = args["port_index_list"] + for bank_global_index, bank_control in global_bank_dict.items(): + bank_port_index_list = port_mapping.bank_index_to_port_index_list(bank_global_index) + port_list = [port_index for port_index in bank_port_index_list if port_index in target_port_index_list] + if len(port_list) == 0: + continue + for port_index in port_list: + info[port_index] = "failed" + oe_index = port_mapping.bank_index_to_oe_index(bank_global_index) + oe_object = global_oe_daemon_thread_dict[oe_index] + oe_object.suspend() + try: + lane_list = list() + for port_index in port_list: + port_lane_list = port_mapping.get_port_lane_list(port_index) + min_lane_index = min(port_lane_list) + for lane_index in port_lane_list: + if lane_index-min_lane_index not in lane_index_list: + continue + lane_list.append(lane_index) + lane_list = ["lane{:02d}".format(lane_index) for lane_index in lane_list] + if turn_on: + ret, msg = bank_control.tx_output_enabled(lane_list) + else: + ret, msg = bank_control.tx_output_disabled(lane_list) + if ret != True: + result = False + else: + for port_index in port_list: + info[port_index] = "succeed" + except Exception as e: + helper_logger.log_warn("OE{} set_tx_output warn: {}".format(oe_index, str(e))) + helper_logger.log_warn(traceback.format_exc()) + return False, info + finally: + oe_object.resume() + return result, "" + +def set_rlm_power_mode(args, port_mapping): + oe_index_list = set() + rlm_index_list = args["rlm_index_list"] + for rlm_global_index in rlm_index_list: + oe_index_list.add(port_mapping.rlm_index_to_oe_index(rlm_global_index)) + for oe_index in oe_index_list: + oe_object = global_oe_daemon_thread_dict[oe_index] + oe_object.suspend() + try: + for rlm_global_index in rlm_index_list: + if oe_index != port_mapping.rlm_index_to_oe_index(rlm_global_index): + continue + rlm_power_cfg_thread(rlm_global_index, args["power_mode"]) + except Exception as e: + helper_logger.log_warn(traceback.format_exc()) + return False, str(e) + finally: + oe_object.resume() + return True, "" + +def show_rlm_power_mode(args, port_mapping): + info = dict() + rlm_index_list = args["rlm_index_list"] + for rlm_global_index in rlm_index_list: + rlm_local_index = port_mapping.rlm_global_index_to_local_index(rlm_global_index) + oe_index = port_mapping.rlm_index_to_oe_index(rlm_global_index) + cmis_map = cmis_memory_map(cmis_i2c_util, oe_index) + field_state = cmis_map.get_field('Laser power mode control {}'.format(rlm_local_index)) + info["rlm{}".format(rlm_global_index)] = field_state + return True, info + +def oe_reset(args, port_mapping): + oe_index_list = args.get("oe_index_list", None) + oe_index = args.get("oe_index", None) + if (oe_index_list == None) and (oe_index != None): + oe_index_list = [oe_index] + for oe_index in oe_index_list: + # suspend oe_daemon + oe_object = global_oe_daemon_thread_dict[oe_index] + oe_object.suspend() # should not raise exception, else oe_deamon suspended before will be locked. + try: + for oe_index in oe_index_list: + oe_object = global_oe_daemon_thread_dict[oe_index] + oe_object.reset() # software reset + flag = args.get("hardware_reset", False) + if flag == False: + return True, "" + # exec hardware reset + byte = 0xff + oe_list = [oe_index - CPO_PLATFORM_CONFIG.get("oe_index_start_index") for oe_index in oe_index_list] + for oe_index in oe_list: + byte = byte & ~(0x01 << oe_index) + from cpoutil import os_command_i2cset_oe_reset_byte + result = os_command_i2cset_oe_reset_byte(byte) + if result != 0: + return False, "" + time.sleep(0.5) + result = os_command_i2cset_oe_reset_byte("0xff") + time.sleep(5) + if result != 0: + return False, "" + return True, "" + except Exception as e: + helper_logger.log_warn(traceback.format_exc()) + return False, str(e) + finally: + for oe_index in oe_index_list: + # resume oe_daemon + oe_object = global_oe_daemon_thread_dict[oe_index] + oe_object.resume() + +cli_process_map = { + "show_status": show_status, + "enter_mission_mode": enter_mission_mode, + "exit_mission_mode": exit_mission_mode, + "show_interface_dom_info": show_interface_dom_info, + "show_oe_temperature": show_oe_temperature, + "show_interface_speed": show_interface_speed, + "show_portmap": show_portmap, + "show_tx_output": show_tx_output, + "set_tx_output": set_tx_output, + "set_rlm_power_mode": set_rlm_power_mode, + "show_rlm_power_mode": show_rlm_power_mode, + "oe_reset": oe_reset +} + +def bank_speed_change_thread(task_profile, bank_index, speed, lane_list = None): + retval, info = global_bank_dict[bank_index].apsel_speed_check(speed=speed, lane_list=lane_list) + if retval == True: + global_async_ret[task_profile] = (True, speed) + return + retval, info = global_bank_dict[bank_index].apply_datapath_init_clear(lane_list=lane_list) + if retval == False: + global_async_ret[task_profile] = (False, speed) + return + retval, info = global_bank_dict[bank_index].populate_staged_set(speed=speed, lane_list=lane_list) + if retval == False: + global_async_ret[task_profile] = (False, speed) + return + retval, info = global_bank_dict[bank_index].apply_datapath_init(lane_list=lane_list, timeout=20) + if retval == False: + global_async_ret[task_profile] = (False, speed) + return + # time.sleep(20) + retval, info = global_bank_dict[bank_index].apsel_speed_check(speed=speed, lane_list=lane_list) + if retval == True: + global_async_ret[task_profile] = (True, speed) + else: + global_async_ret[task_profile] = (False, speed) + +def rlm_power_cfg_thread(rlm_index, power_mode): + if power_mode == "full-power": + ret, status = global_rlm_dict[rlm_index].enter_full_power_mode() + if (not ret): + helper_logger.log_warn("RLM{}, enter_full_power_mode failed!".format(rlm_index)) + else: + helper_logger.log_info("RLM{}, enter_full_power_mode succeed!".format(rlm_index)) + elif power_mode == "half-power": + ret, status = global_rlm_dict[rlm_index].enter_half_power_mode() + if (not ret): + helper_logger.log_warn("RLM{}, enter_half_power_mode failed!".format(rlm_index)) + else: + helper_logger.log_info("RLM{}, enter_half_power_mode succeed!".format(rlm_index)) + else: + helper_logger.log_warn("RLM{}, set power mode failed, unknow power mode {}".format(rlm_index, power_mode)) + +class cpo_state_monitor_base(): + def __init__(self, index, stop_event) -> None: + self.index = index + self.stop_event = stop_event + self.__active_state = None + self.state_control_filed = list() + self.state_indicator_field = list() + @property + def name(self): + raise NotImplementedError + @property + def active_state(self): + return self.__active_state + @active_state.setter + def active_state(self, active_state): + if not isinstance(self.__active_state, dict): + if self.__active_state == active_state: + return + helper_logger.log_debug("{}, {} --->>> {}".format(self.name, self.__active_state, active_state)) + self.__active_state = active_state + + for new_state_key, new_state_value in active_state.items(): + active_state_value = self.__active_state.get(new_state_key, None) + if active_state_value == new_state_value: + continue + if new_state_key in self.state_control_filed: + flag = "control" + else: + flag = "indicator" + if not isinstance(new_state_value, dict): + helper_logger.log_debug("{}({}), {}: {} --->>> {}".format(self.name, flag, new_state_key, active_state_value, new_state_value)) + self.__active_state[new_state_key] = new_state_value + continue + if active_state_value == None: + self.__active_state[new_state_key] = dict() + for sub_state_key, sub_state_value in new_state_value.items(): + sub_active_value = self.__active_state[new_state_key].get(sub_state_key, None) + if sub_active_value == sub_state_value: + continue + helper_logger.log_debug("{}({}), {}, {}: {} --->>> {}".format(self.name, flag, new_state_key, sub_state_key, sub_active_value, sub_state_value)) + self.__active_state[new_state_key][sub_state_key] = sub_state_value + + def active_state_init(self): + state_field_keys = self.state_control_filed + self.state_indicator_field + self.active_state = dict.fromkeys(state_field_keys) + status, output = self.active_state_refresh() + while (status == False) and (not self.stop_event.wait(0.01)): + helper_logger.log_warn("active_state_refresh, status: {}, output: {}".format(status, output)) + status, output = self.active_state_refresh() + time.sleep(0.1) + + def active_state_refresh(self): + new_active_state = dict() + for state_key, state_value in self.active_state.items(): + new_state_value = self.cmis_map.get_field(state_key) + if new_state_value != state_value: + new_active_state[state_key] = new_state_value + if new_active_state: + tmp = copy.deepcopy(self.active_state) + tmp.update(new_active_state) + self.active_state = tmp + return True, self.active_state + + def wait_for_state(self, target_state, timeout, time_internal): + try: + count = 0 + while (count <= timeout) and (not self.stop_event.wait(0.01)): + self.active_state_refresh() + if is_state_complete(target_state, self.active_state): + return True + if time_internal == 0: + return False + else: + time.sleep(time_internal) + count += time_internal + return False + except Exception as e: + return False + finally: + pass + +class cmis_memory_map(cmis_memory_map_base): + def __init__(self, cmis_util, oe_index, bank_index=0) -> None: + super().__init__() + self.oe_index = oe_index + self.bank_index = bank_index + self.retry_times = 20 + self.cmis_util = cmis_util + + def read(self, page, addr, rd_len=1): + retry_count = 0 + status, output = self.cmis_util.cmis_read(self.oe_index, self.bank_index, page, addr, rd_len, lock=True) + if status == True: + helper_logger.log_trace("cmis_read, status: {}, page: {}, bank: {}, addr: {}, output: {}".format( + status, page, self.bank_index, addr, [hex(data) for data in output])) + while (status == False) and (retry_count < self.retry_times): + helper_logger.log_trace("cmis_read, status: {}, page: {}, bank: {}, addr: {}, output: {}".format( + status, page, self.bank_index, addr, output)) + retry_count += 1 + status, output = self.cmis_util.cmis_read(self.oe_index, self.bank_index, page, addr, rd_len, lock=True) + time.sleep(0.05) + if status == True: + helper_logger.log_trace("cmis_read, status: {}, page: {}, bank: {}, addr: {}, output: {}".format( + status, page, self.bank_index, addr, [hex(data) for data in output])) + return status, output + + def write(self, page, addr, data): + retry_count = 0 + status, output = self.cmis_util.cmis_write(self.oe_index, self.bank_index, page, addr, data, lock=True) + helper_logger.log_trace("cmis_write, status: {}, page: {}, bank: {}, addr: {}, input: {}".format( + status, page, self.bank_index, addr, [hex(item) for item in data])) + while (status == False) and (retry_count < self.retry_times): + helper_logger.log_trace("cmis_write, status: {}, page: {}, bank: {}, addr: {}, input: {}".format( + status, page, self.bank_index, addr, [hex(item) for item in data])) + retry_count += 1 + status, output = self.cmis_util.cmis_write(self.oe_index, self.bank_index, page, addr, data, lock=True) + time.sleep(0.05) + return status, output + + def set_field(self, field_name, field_value): + helper_logger.log_debug("OE{}-BANK{} field set: {}".format(self.oe_index, self.bank_index, {field_name: field_value})) + super().set_field(field_name, field_value) + +class rlm_state_monitor(cpo_state_monitor_base): + def __init__(self, index, oe_index, stop_event) -> None: + super().__init__(index, stop_event) + self.cmis_map = cmis_memory_map(cmis_util, oe_index, bank_index=0) + self.oe_index = oe_index + self.rlm_index = index + self.laser_list = ['Laser{:02d}'.format(laser_index) for laser_index in range(8)] + self.state_control_filed = ['Laser power mode control {}'.format(self.rlm_index)] + + @property + def name(self): + return "OE%d-RLM%d" % (self.oe_index, self.rlm_index) + + def enter_full_power_mode(self, timeout=2): + field_key = 'Laser power mode control {}'.format(self.rlm_index) + field_value_dict = dict() + for laser_index in self.laser_list: + field_value_dict[laser_index] = "full-power" + self.cmis_map.set_field(field_key, field_value_dict) + target_state = { + field_key : field_value_dict + } + time.sleep(20) + return self.wait_for_state(target_state, timeout=timeout, time_internal=0.1), None + + def enter_half_power_mode(self, timeout=2): + field_key = 'Laser power mode control {}'.format(self.rlm_index) + field_value_dict = dict() + for laser_index in self.laser_list: + field_value_dict[laser_index] = "half-power" + self.cmis_map.set_field(field_key, field_value_dict) + target_state = { + field_key : field_value_dict + } + return self.wait_for_state(target_state, timeout=timeout, time_internal=0.1), None + +class datapath_state_monitor(cpo_state_monitor_base): + def __init__(self, index, oe_index, stop_event) -> None: + super().__init__(index, stop_event) + self.cmis_map = cmis_memory_map(cmis_util, oe_index, bank_index=index) + self.oe_index = oe_index + self.bank_index = index + self.lane_list = ['lane0%d'%lane_index for lane_index in range(8)] + self.state_control_filed = ['Tx output disable', 'Data Path Initialization Control', 'Application Select Controls', 'Apply DataPathInit Controls'] + self.state_indicator_field = ['Data Path State Indicator', 'Active Application Control Set'] + + @property + def name(self): + return "OE%d-BANK%d" % (self.oe_index, self.index) + + def tx_output_enabled(self, lane_list=None, timeout=2): + target_state = { + 'Data Path State Indicator': dict() + } + if lane_list == None: + lane_list = copy.deepcopy(self.lane_list) + for lane in lane_list: + target_state["Data Path State Indicator"][lane] = ['DataPathTxTurnOn', 'DataPathActivated', 'DataPathDeactivated'] + field_value_dict = dict() + for lane in lane_list: + field_value_dict[lane] = "Tx output enable" + self.cmis_map.set_field('Tx output disable', field_value_dict) + return self.wait_for_state(target_state, timeout=timeout, time_internal=0.1), None + + def tx_output_disabled(self, lane_list=None, timeout=2): + target_state = { + 'Data Path State Indicator': dict() + } + if lane_list == None: + lane_list = copy.deepcopy(self.lane_list) + for lane in lane_list: + target_state["Data Path State Indicator"][lane] = ['DataPathTxTurnOff', 'DataPathDeactivated', 'DataPathInitialized'] + field_value_dict = dict() + for lane in lane_list: + field_value_dict[lane] = "Tx output disabled" + self.cmis_map.set_field('Tx output disable', field_value_dict) + return self.wait_for_state(target_state, timeout=timeout, time_internal=0.1), None + + def datapath_init(self, lane_list=None, timeout=20): + control_field_key = 'Data Path Initialization Control' + indicator_target_state = { + 'Data Path State Indicator': dict() + } + if lane_list == None: + lane_list = copy.deepcopy(self.lane_list) + for lane in lane_list: + indicator_target_state["Data Path State Indicator"][lane] = ['DataPathInitialized', 'DataPathActivated', 'DataPathDeactivated'] # fixme: DataPathDeactivated + control_field_value = dict() + for lane in lane_list: + control_field_value[lane] = "Initialize" + self.cmis_map.set_field(control_field_key, control_field_value) + indicator_target_state[control_field_key] = control_field_value + return self.wait_for_state(indicator_target_state, timeout=timeout, time_internal=0.1), None + + def datapath_deinit(self, lane_list=None, timeout=20): + target_state = { + 'Data Path State Indicator': dict() + } + if lane_list == None: + lane_list = copy.deepcopy(self.lane_list) + for lane in lane_list: + target_state["Data Path State Indicator"][lane] = ['DataPathDeinit', 'DataPathDeactivated'] + field_value_dict = dict() + for lane in lane_list: + field_value_dict[lane] = "De-initializ" + self.cmis_map.set_field('Data Path Initialization Control', field_value_dict) + return self.wait_for_state(target_state, timeout=timeout, time_internal=0.1), None + + def apply_datapath_init(self, lane_list=None, timeout=3): + field_value_dict = dict() + if lane_list == None: + lane_list = copy.deepcopy(self.lane_list) + for lane in lane_list: + field_value_dict[lane] = 'Apply' + self.cmis_map.set_field('Apply DataPathInit Controls', field_value_dict) + target_state = { + 'Apply DataPathInit Controls': dict() + } + for lane in lane_list: + target_state["Apply DataPathInit Controls"][lane] = "Not Apply" + # time.sleep(20) + return self.wait_for_state(target_state, timeout=timeout, time_internal=0.1), None + + def apply_datapath_init_clear(self, lane_list=None, timeout=1): + field_value_dict = dict() + if lane_list == None: + lane_list = copy.deepcopy(self.lane_list) + for lane in lane_list: + field_value_dict[lane] = 'Not Apply' + self.cmis_map.set_field('Apply DataPathInit Controls', field_value_dict) + return self.wait_for_state({'Apply DataPathInit Controls':field_value_dict}, timeout=timeout, time_internal=0.1), None + + def populate_staged_set(self, speed, lane_list=None, timeout=3): + # apply apsel code + target_state = dict() + field_value_dict = dict() + if lane_list == None: + lane_list = copy.deepcopy(self.lane_list) + for lane in lane_list: + field_value_dict[lane] = speed + self.cmis_map.set_field('Application Select Controls', field_value_dict) + target_state['Application Select Controls'] = field_value_dict + return self.wait_for_state(target_state, timeout=timeout, time_internal=0.1), None + + def apsel_speed_check(self, speed, lane_list=None, timeout=1): + if lane_list == None: + lane_list = copy.deepcopy(self.lane_list) + target_state = { + 'Active Application Control Set': dict() + } + for lane in lane_list: + target_state["Active Application Control Set"][lane] = speed + return self.wait_for_state(target_state, timeout=timeout, time_internal=0.1), None + +class module_state_monitor(cpo_state_monitor_base): + def __init__(self, index, stop_event) -> None: + super().__init__(index, stop_event) + self.cmis_map = cmis_memory_map(cmis_util, index) + self.state_control_filed = ['Module Global Controls'] + self.state_indicator_field = ['Module State'] + + @property + def name(self): + return "OE%d" % (self.index) + + def module_reset(self, timeout=20): + target_state = { + 'Module State': 'ModuleLowPwr' + } + self.cmis_map.set_field('Module Global Controls', {'Software reset': 'Software reset'}) + time.sleep(5) + return self.wait_for_state(target_state, timeout=timeout, time_internal=1), None + + def module_exit_lpmode(self, timeout=20): + target_state = { + 'Module State': 'ModuleReady' + } + self.cmis_map.set_field('Module Global Controls', {'LowPwrRequestSW': 'No request'}) + time.sleep(3) + return self.wait_for_state(target_state, timeout=timeout, time_internal=0.1), None + + def module_enter_lpmode(self, timeout=20): + target_state = { + 'Module State': 'ModuleLowPwr' + } + self.cmis_map.set_field('Module Global Controls', {'LowPwrRequestSW': 'Request'}) + return self.wait_for_state(target_state, timeout=timeout, time_internal=0.1), None + +class oe_daemon(threading.Thread): + def __init__(self, oe_index, port_mapping, main_thread_stop_event): + threading.Thread.__init__(self) + self.name = "OE%d_Thread" % oe_index + self.exc = None + self.task_stopping_event = threading.Event() + self.main_thread_stop_event = main_thread_stop_event + self.index = oe_index + self.port_mapping = port_mapping + self.mission_mode = False + self.standby = False + self.suspended = False + self.__manully_disabled = False + self.__manully_enabled = False + self.bank_speed_dict = dict() + self.port_speed_dict = dict() + self.task_thread_dict = dict() + self.lock = threading.RLock() + + @property + def manully_disabled(self): + return self.__manully_disabled + + @property + def manully_enabled(self): + return self.__manully_enabled + + @manully_disabled.setter + def manully_disabled(self, manully_disabled): + if manully_disabled == True: + self.__manully_enabled == False + self.__manully_disabled = manully_disabled + + @manully_enabled.setter + def manully_enabled(self, manully_enabled): + if manully_enabled == True: + self.__manully_disabled == False + self.__manully_enabled = manully_enabled + + def join(self): + self.task_stopping_event.set() + threading.Thread.join(self) + if self.exc: + raise self.exc + + def run(self): + self.thread_id = threading.current_thread().ident + if self.task_stopping_event.is_set(): + return + try: + self.task_worker() + except Exception as e: + helper_logger.log_error("Exception occured at {} thread due to {}".format(threading.current_thread().getName(), repr(e))) + exc_type, exc_value, exc_traceback = sys.exc_info() + msg = traceback.format_exception(exc_type, exc_value, exc_traceback) + for tb_line in msg: + for tb_line_split in tb_line.splitlines(): + helper_logger.log_error(tb_line_split) + self.exc = e + self.main_thread_stop_event.set() + + def state_machine_init(self): + self.state_machine_list = list() + oe_monitor = module_state_monitor(self.index, self.task_stopping_event) + global_oe_dict[self.index] = oe_monitor + self.state_machine_list.append(oe_monitor) + for local_bank_index in range(OE_BANK_NUM): + global_bank_index = (self.index * OE_BANK_NUM) + local_bank_index + datapath_monitor = datapath_state_monitor(index=local_bank_index, oe_index=self.index, stop_event=self.task_stopping_event) + global_bank_dict[global_bank_index] = datapath_monitor + self.state_machine_list.append(datapath_monitor) + for local_rlm_index in range(OE_RLM_NUM): + global_rlm_index = (self.index *OE_RLM_NUM) + local_rlm_index + rlm_monitor = rlm_state_monitor(index=local_rlm_index, oe_index=self.index, stop_event=self.task_stopping_event) + global_rlm_dict[global_rlm_index] = rlm_monitor + self.state_machine_list.append(rlm_monitor) + for state_machine in self.state_machine_list: + state_machine.active_state_init() + + def bank_port_en(self, bank_index, is_enable): + port_index_list = self.port_mapping.bank_index_to_port_index_list(bank_index) + for port_index in port_index_list: + port_admin = self.port_mapping.get_port_admin(port_index) + if not port_admin: + helper_logger.log_info("OE{}-BANK{}, port {} not enable skip sdk enable".format(self.index, bank_index, port_index)) + continue + sdk_index = self.port_mapping.port_index_to_sdk_index(port_index) + command = f"port {sdk_index} en={is_enable}" + executable_path = "/usr/bin/bcmcmd" + result = subprocess.run([executable_path, command], + text=True, + capture_output=True) + if result.stderr: + helper_logger.log_info("Standard Error:{}".format(result.stderr)) + + def bank_speed_apply(self, bank_index, speed): + task_profile = "bank{}-speed-change".format(bank_index) + bank_local_index = self.port_mapping.bank_global_index_to_local_index(bank_index) + pre_task = self.task_thread_dict.get(task_profile, None) + pre_task_ret = global_async_ret.get(task_profile, None) + if pre_task != None: + if pre_task_ret == None: + return + retval, info = pre_task_ret + if retval == True: + self.bank_speed_dict[bank_index] = info + helper_logger.log_info("OE{}-BANK{}, apsel_speed_change to {} succeed!".format(self.index, bank_local_index, info)) + else: + helper_logger.log_warn("OE{}-BANK{}, apsel_speed_change to {} failed!".format(self.index, bank_local_index, info)) + pre_task.join() + self.task_thread_dict.pop(task_profile) + global_async_ret.pop(task_profile) + # port workaround + time.sleep(0.5) + self.bank_port_en(bank_index, 0) + time.sleep(0.1) + self.bank_port_en(bank_index, 1) + else: + if (self.bank_speed_dict.get(bank_index, None) == speed): + return + helper_logger.log_info("OE{}-BANK{}, apply speed {}".format(self.index, bank_local_index, speed)) + thread = threading.Thread(target=bank_speed_change_thread, args=(task_profile, bank_index, speed), daemon=True) + thread.start() + self.task_thread_dict[task_profile] = thread + thread.join(timeout=1) + + def reset(self): + self.lock.acquire() + self.bank_speed_dict = dict() + self.mission_mode = False + self.standby = False + self.manully_disabled = False + self.manully_enabled = False + self.lock.release() + + def suspend(self): + self.lock.acquire() + + def resume(self): + self.lock.release() + + def task_worker(self): + helper_logger.log_info("Start {} loop".format(self.name)) + self.state_machine_init() + while not self.main_thread_stop_event.wait(CPO_STATUS_CHECK_PERIOD_SECS): + self.lock.acquire() + port_index_list = self.port_mapping.oe_index_to_port_index_list(self.index) + port_admin_list = [self.port_mapping.get_port_admin(port_index) for port_index in port_index_list] + if any(port_admin_list) and (self.mission_mode == False) and (not self.manully_disabled): + if self.standby: + enter_mission_mode_without_reset({"oe_index": self.index, "manully": False}, self.port_mapping) + else: + enter_mission_mode({"oe_index": self.index, "manully": False}, self.port_mapping) + self.standby = True + self.mission_mode = True + if (not any(port_admin_list)) and (self.mission_mode == True) and (not self.manully_enabled): + exit_mission_mode({"oe_index": self.index, "manully": False}, self.port_mapping) + self.mission_mode = False + if (self.mission_mode): + bank_index_list = self.port_mapping.oe_index_to_bank_index_list(self.index) + for bank_index in bank_index_list: + port_index_list = self.port_mapping.bank_index_to_port_index_list(bank_index) + ports_speed_set = set() + for port_index in port_index_list: + ports_speed_set.add(self.port_mapping.get_port_speed(port_index)) + if len(ports_speed_set) != 1: + continue + self.bank_speed_apply(bank_index, ports_speed_set.pop()) + self.lock.release() + helper_logger.log_info("Stop {} loop".format(self.name)) + +def cli_cmd_process(sock, cmd, port_mapping:Port_Mapping): + try: + helper_logger.log_debug(cmd) + process = cli_process_map.get(cmd.get("cmd", None), None) + if process == None: + return False + retval, info = process(cmd, port_mapping) + helper_logger.log_debug("{}, finished!".format(cmd)) + sock.sendall(bytes("{}".format(json.dumps({"retval": retval, "info": info}, indent=4)), encoding="utf-8")) + except Exception as e: + helper_logger.log_warn(traceback.format_exc()) + finally: + sock.close() + +class cli_server(threading.Thread): + def __init__(self, port_mapping, main_thread_stop_event): + threading.Thread.__init__(self) + self.name = "CLI_SERVER" + self.exc = None + self.task_stopping_event = threading.Event() + self.main_thread_stop_event = main_thread_stop_event + self.server_socket = None + self.port_mapping = port_mapping + + def init(self): + self.server_socket = socket.socket(socket.AF_UNIX, socket.SOCK_STREAM) + sock_file = "/tmp/cpo_socket" + if os.path.exists(sock_file): + os.remove(sock_file) + self.server_socket.bind(sock_file) + self.server_socket.listen(5) + self.server_socket.setblocking(False) + self.connected_clients = [] + + def join(self): + if not self.server_socket: + self.server_socket.close() + self.server_socket = None + self.task_stopping_event.set() + threading.Thread.join(self) + if self.exc: + raise self.exc + + def run(self): + self.thread_id = threading.current_thread().ident + if self.task_stopping_event.is_set(): + return + try: + self.task_worker() + except Exception as e: + helper_logger.log_error("Exception occured at {} thread due to {}".format(threading.current_thread().getName(), repr(e))) + exc_type, exc_value, exc_traceback = sys.exc_info() + msg = traceback.format_exception(exc_type, exc_value, exc_traceback) + for tb_line in msg: + for tb_line_split in tb_line.splitlines(): + helper_logger.log_error(tb_line_split) + self.exc = e + self.main_thread_stop_event.set() + finally: + if not self.server_socket: + self.server_socket.close() + self.server_socket = None + + def message_process(self, sock, data): + try: + import ast + cmd = ast.literal_eval(data) + thread = threading.Thread(target=cli_cmd_process, args=(sock, cmd, self.port_mapping), daemon=True) + thread.start() + except Exception as e: + print("Error occurred: {}".format(e)) + result = {"status": False, "message": "invalid cmd: {}".format(data)} + sock.sendall(bytes(str(result), encoding="utf-8")) + sock.close() + + def task_worker(self): + self.init() + helper_logger.log_info("Start {} loop".format(self.name)) + while not self.main_thread_stop_event.wait(0.01): + readable_sockets, _, _ = select.select([self.server_socket] + self.connected_clients, [], [], 1) + for sock in readable_sockets: + if sock is self.server_socket: + client_socket, client_address = self.server_socket.accept() + self.connected_clients.append(client_socket) + continue + try: + data = sock.recv(1024) + if data: + self.message_process(sock, data.decode()) + else: + sock.close() + except Exception as e: + print(f"Error occurred while receiving data from {sock.getpeername()}: {e}") + sock.close() + finally: + self.connected_clients.remove(sock) + helper_logger.log_info("Stop {} loop".format(self.name)) + +class database_monitor(threading.Thread): + def __init__(self, port_mapping:Port_Mapping, main_thread_stop_event): + threading.Thread.__init__(self) + self.name = "DATABASE_MONITOR" + self.exc = None + self.task_stopping_event = threading.Event() + self.main_thread_stop_event = main_thread_stop_event + self.port_mapping = port_mapping + self.port_config_done = False + + def join(self): + self.task_stopping_event.set() + threading.Thread.join(self) + if self.exc: + raise self.exc + + def run(self): + self.thread_id = threading.current_thread().ident + if self.task_stopping_event.is_set(): + return + try: + self.task_worker() + except Exception as e: + helper_logger.log_error("Exception occured at {} thread due to {}".format(threading.current_thread().getName(), repr(e))) + exc_type, exc_value, exc_traceback = sys.exc_info() + msg = traceback.format_exception(exc_type, exc_value, exc_traceback) + for tb_line in msg: + for tb_line_split in tb_line.splitlines(): + helper_logger.log_error(tb_line_split) + self.exc = e + self.main_thread_stop_event.set() + + def task_worker(self): + appl_db = daemon_base.db_connect("APPL_DB", namespace="") + sel = swsscommon.Select() + port_tbl = swsscommon.SubscriberStateTable(appl_db, swsscommon.APP_PORT_TABLE_NAME) + pro_port_tbl = swsscommon.ProducerStateTable(appl_db, swsscommon.APP_PORT_TABLE_NAME) + sel.addSelectable(port_tbl) + if port_config_init: + config_db = daemon_base.db_connect("CONFIG_DB", namespace="") + device_metadata_tbl = swsscommon.SubscriberStateTable(config_db, swsscommon.CFG_DEVICE_METADATA_TABLE_NAME) + sel.addSelectable(device_metadata_tbl) + # Make sure this daemon started after all port configured + helper_logger.log_info("Start {} loop".format(self.name)) + while not self.main_thread_stop_event.wait(DATABASE_CHECK_PRTIOD_SECS): + (state, c) = sel.select(SELECT_TIMEOUT_MSECS) + if state == swsscommon.Select.TIMEOUT: + helper_logger.log_trace("select timeout") + continue + if state != swsscommon.Select.OBJECT: + helper_logger.log_info("sel.select() did not return swsscommon.Select.OBJECT") + continue + if port_config_init: + (key, op, fvp) = device_metadata_tbl.pop() + self.device_tbl_subscribe_callback(key=key, op=op, fvp=fvp) + else: + (key, op, fvp) = port_tbl.pop() + self.port_tbl_subscribe_callback(key=key, op=op, fvp=fvp, port_tbl=pro_port_tbl) + helper_logger.log_info("Stop {} loop".format(self.name)) + + def device_tbl_subscribe_callback(self, key, op, fvp): + helper_logger.log_trace("key: {}, op: {}, fvp: {}".format(key, op, fvp)) + platform_path = None + hwsku = None + for item in fvp: + if item[0] == "platform": + platform_path = item[1] + if item[0] == "hwsku": + hwsku = item[1] + self.port_mapping.port_config_init(hwsku) + self.port_config_done = True + + def port_tbl_subscribe_callback(self, key, op, fvp, port_tbl): + if key in ["PortConfigDone", "PortInitDone"]: + self.port_config_done = True + return + helper_logger.log_trace("key: {}, op: {}, fvp: {}".format(key, op, fvp)) + port_index = None + port_speed = None + admin_status = None + lane = None + for item in fvp: + if item[0] == "index": + port_index = int(item[1]) + if item[0] == "speed": + port_speed = int(item[1]) + if item[0] == "admin_status": + admin_status = item[1] + if item[0] == "lanes": + lane = len(item[1].split(',')) + if self.port_mapping.set_port(port_index, key, port_speed, lane, admin_status): + self.notify_media_setting(key, port_tbl) + + def get_media_settings_value(self, physical_port): + GLOBAL_MEDIA_SETTINGS_KEY = 'GLOBAL_MEDIA_SETTINGS' + PORT_MEDIA_SETTINGS_KEY = 'PORT_MEDIA_SETTINGS' + DEFAULT_KEY = 'Default' + RANGE_SEPARATOR = '-' + COMMA_SEPARATOR = ',' + media_dict = {} + default_dict = {} + # Keys under global media settings can be a list or range or list of ranges + # of physical port numbers. Below are some examples + # 1-32 + # 1,2,3,4,5 + # 1-4,9-12 + media_key = self.port_mapping.get_physical_port_media_key(physical_port) + if GLOBAL_MEDIA_SETTINGS_KEY in CPO_PLATFORM_MEDIA_SETTINGS: + for keys in CPO_PLATFORM_MEDIA_SETTINGS[GLOBAL_MEDIA_SETTINGS_KEY]: + if COMMA_SEPARATOR in keys: + port_list = keys.split(COMMA_SEPARATOR) + for port in port_list: + if (RANGE_SEPARATOR in port) and (check_port_in_range(port, physical_port)): + media_dict = CPO_PLATFORM_MEDIA_SETTINGS[GLOBAL_MEDIA_SETTINGS_KEY][keys] + break + elif str(physical_port) == port: + media_dict = CPO_PLATFORM_MEDIA_SETTINGS[GLOBAL_MEDIA_SETTINGS_KEY][keys] + break + elif RANGE_SEPARATOR in keys: + if check_port_in_range(keys, physical_port): + media_dict = CPO_PLATFORM_MEDIA_SETTINGS[GLOBAL_MEDIA_SETTINGS_KEY][keys] + # If there is a match in the global profile for a media type, + # fetch those values + if media_key in media_dict: + return media_dict[media_key] + elif DEFAULT_KEY in media_dict: + default_dict = media_dict[DEFAULT_KEY] + media_dict = {} + if PORT_MEDIA_SETTINGS_KEY in CPO_PLATFORM_MEDIA_SETTINGS: + for keys in CPO_PLATFORM_MEDIA_SETTINGS[PORT_MEDIA_SETTINGS_KEY]: + if int(keys) == physical_port: + media_dict = CPO_PLATFORM_MEDIA_SETTINGS[PORT_MEDIA_SETTINGS_KEY][keys] + break + if len(media_dict) == 0: + if len(default_dict) != 0: + return default_dict + else: + helper_logger.log_warn("Error: No values for physical port '{}'".format(physical_port)) + return {} + if media_key in media_dict: + return media_dict[media_key] + elif DEFAULT_KEY in media_dict: + default_dict = media_dict[DEFAULT_KEY] + elif len(default_dict) != 0: + return default_dict + else: + if len(default_dict) != 0: + return default_dict + return {} + + def notify_media_setting(self, logical_port_name, app_port_tbl): + if not CPO_PLATFORM_MEDIA_SETTINGS: + return + physical_port = self.port_mapping.get_logical_to_physical(logical_port_name) + logical_port_list = self.port_mapping.get_physical_to_logical(physical_port) + num_logical_ports = len(logical_port_list) + logical_idx = logical_port_list.index(logical_port_name) + port_name = logical_port_name + media_dict = self.get_media_settings_value(physical_port) + if len(media_dict) == 0: + helper_logger.log_warn("Error in obtaining media setting for {}".format(logical_port_name)) + return + fvs = swsscommon.FieldValuePairs(len(media_dict)) + index = 0 + for media_key in media_dict: + if type(media_dict[media_key]) is dict: + media_val_str = get_media_val_str(num_logical_ports, media_dict[media_key], logical_idx) + else: + media_val_str = media_dict[media_key] + fvs[index] = (str(media_key), str(media_val_str)) + index += 1 + app_port_tbl.set(port_name, fvs) + + def wait_for_port_config_done(self): + # Make sure this daemon started after all port configured + while not self.main_thread_stop_event.wait(DATABASE_CHECK_PRTIOD_SECS): + if self.port_config_done: + return + +def main(): + global stop_event + global cmis_util + global cmis_i2c_util + cmis_util = oe_cmis_sysfs_rw() + cmis_i2c_util = oe_cmis_i2c_rw() + stop_event = threading.Event() + signal.signal(signal.SIGINT, signal_handler) + port_mapping = Port_Mapping() + database_monitor_thread = database_monitor(port_mapping=port_mapping, main_thread_stop_event=stop_event) + database_monitor_thread.start() + database_monitor_thread.wait_for_port_config_done() + # oe_daemon_thread_dict = dict() + for oe_index in range(OE_NUM): + global_oe_daemon_thread_dict[oe_index] = oe_daemon(oe_index=oe_index, port_mapping=port_mapping, main_thread_stop_event=stop_event) + cli_server_thread = cli_server(port_mapping = port_mapping, main_thread_stop_event=stop_event) + for oe_index, oe_daemon_thread in global_oe_daemon_thread_dict.items(): + oe_daemon_thread.start() + cli_server_thread.start() + stop_event.wait() + database_monitor_thread.join() + cli_server_thread.join() + for oe_index, oe_daemon_thread in global_oe_daemon_thread_dict.items(): + oe_daemon_thread.join() + sys.exit() + +if __name__=="__main__": + args = sys.argv[1:] + global port_config_init + port_config_init = False + if len(args) > 0: + helper_logger.log_info("input params: {}".format(args)) + if args[0] == "factest": + port_config_init = True + else: + helper_logger.log_info("no input params for process") + + main() diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/cpo/script/cpoutil b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/cpo/script/cpoutil new file mode 100755 index 00000000000..43eb1047202 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/cpo/script/cpoutil @@ -0,0 +1,591 @@ +#!/usr/bin/python3 + +import os +import sys +import logging +import click +import threading +import sonic_platform +from sonic_py_common import device_info, logger, multi_asic +import sonic_platform_base.sonic_sfp.sfputilhelper +import utilities_common.cli as clicommon +from cpo_platform_config import OE_INDEX_LIST, RLM_INDEX_LIST, PORT_INDEX_LIST +import socket +import json + +EXIT_FAIL = -1 +EXIT_SUCCESS = 0 +ERROR_PERMISSIONS = 1 +ERROR_CHASSIS_LOAD = 2 +ERROR_SFPUTILHELPER_LOAD = 3 +ERROR_PORT_CONFIG_LOAD = 4 +ERROR_NOT_IMPLEMENTED = 5 +ERROR_INVALID_PORT = 6 +ERROR_CPOUTIL_LOAD = 7 + +# Global platform-specific Chassis class instance +platform_chassis = None + +# Global platform-specific sfputil class instance +platform_sfputil = None + +# Global platform-specific cpoutil class instance +cpo_util = None + +if __name__ == "__main__": + logger = logging.getLogger() + logger.setLevel(logging.DEBUG) + logger.addHandler(logging.StreamHandler(sys.stdout)) +else: + logger = logging.getLogger(__name__) + +""" +logger.debug("This is a debug message") +logger.info("This is an info message") +logger.warning("This is a warning message") +logger.error("This is an error message") +logger.critical("This is a critical message") +""" + +revision_log = """\nMost Recent:\n +10/05/2023 Rev 00.01 +\t- Initial Creation +""" + +def eth_key(key): + key_len = len("Ethernet") + if len(key) < key_len: + return 0 + return int(key[key_len:]) + +# Instantiate SfpUtilHelper class +def load_sfputilhelper(): + global platform_sfputil + # we have to make use of sfputil for some features + # even though when new platform api is used for all vendors. + # in this sense, we treat it as a part of new platform api. + # we have already moved sfputil to sonic_platform_base + # which is the root of new platform api. + platform_sfputil = sonic_platform_base.sonic_sfp.sfputilhelper.SfpUtilHelper() + if not platform_sfputil: + return False + return True + +def load_port_config(): + try: + if multi_asic.is_multi_asic(): + # For multi ASIC platforms we pass DIR of port_config_file_path and the number of asics + (platform_path, hwsku_path) = device_info.get_paths_to_platform_and_hwsku_dirs() + + # Load platform module from source + platform_sfputil.read_all_porttab_mappings(hwsku_path, multi_asic.get_num_asics()) + else: + # For single ASIC platforms we pass port_config_file_path and the asic_inst as 0 + port_config_file_path = device_info.get_path_to_port_config_file() + platform_sfputil.read_porttab_mappings(port_config_file_path, 0) + except Exception as e: + print("Error reading port info ({})".format(str(e))) + return False + return True + +# Instantiate platform-specific Chassis class +def load_platform_chassis(): + global platform_chassis + # Load new platform api class + try: + platform_chassis = sonic_platform.platform.Platform().get_chassis() + except Exception as e: + print("Failed to instantiate Chassis due to {}".format(repr(e))) + if not platform_chassis: + return False + return True + +def print_all_valid_port_values(): + click.echo("Valid values for port: {}\n".format(str(platform_sfputil.logical))) + +def logical_port_name_to_physical_port_list(port_name): + if port_name.startswith("Ethernet"): + if platform_sfputil.is_logical_port(port_name): + return platform_sfputil.get_logical_to_physical(port_name) + else: + click.echo("Error: Invalid port '{}'".format(port_name)) + return None + else: + return [int(port_name)] + +def logical_port_to_physical_port_index(port_name): + if not platform_sfputil.is_logical_port(port_name): + click.echo("Error: invalid port '{}'\n".format(port_name)) + print_all_valid_port_values() + sys.exit(ERROR_INVALID_PORT) + + physical_port = logical_port_name_to_physical_port_list(port_name)[0] + if physical_port is None: + click.echo("Error: No physical port found for logical port '{}'".format(port_name)) + sys.exit(EXIT_FAIL) + + return physical_port + +try: + from cpoutil import cpoutilbase + cpo_util = cpoutilbase() +except KeyError: + cpo_util = None + +def get_dict_str_format(indict, indent): + output = '' + if indict != None: + for key, value in indict.items(): + if type(value) == dict: + output += "{}{}:\n{}".format(indent, key, get_dict_str_format(value, indent + (' ' * 4))) + else: + output += "{}{}: {}\n".format(indent, key, value) + return output + +def send_cmd(msg, strip=False): + client_socket = socket.socket(socket.AF_UNIX, socket.SOCK_STREAM) + sock_file = '/tmp/cpo_socket' + client_socket.connect(sock_file) + client_socket.sendall(bytes(msg, encoding="utf-8")) + chunk_size = 4096 + response = b'' + while True: + try: + data = client_socket.recv(chunk_size) + if not data: + break + response += data + except ConnectionResetError: + break + ret = json.loads(response.decode('utf-8')) + retval = ret.get("retval", False) + info = ret.get("info", None) + if retval: + if isinstance(info, dict): + if not strip: + click.echo(json.dumps(info, indent=4)) + else: + click.echo(get_dict_str_format(indict=info, indent='')) + elif isinstance(info, str) and len(info)>0: + click.echo(info) + else: + click.echo("rc: {}, msg: {}".format(retval, info)) + client_socket.close() + +def _get_rlm_list(paramater): + return get_list(paramater, "rlm") + +def _get_oe_list(paramater): + return get_list(paramater, "oe") + +def _get_port_list(paramater): + return get_list(paramater, "port") + +def get_list(paramater:str, list_type:str): + allowed_list = { + "OE_INDEX_LIST": OE_INDEX_LIST, + "RLM_INDEX_LIST": RLM_INDEX_LIST, + "PORT_INDEX_LIST": PORT_INDEX_LIST + } + INDEX_LIST = allowed_list.get("{}_INDEX_LIST".format(list_type.upper())) + if paramater == None: + return INDEX_LIST, "" + if isinstance(paramater, int) == True: + if paramater not in INDEX_LIST: + return None, "invalid paramater!" + else: + return [paramater], None + if isinstance(paramater, str) == False: + return None, "invalid paramater!" + paramater = paramater.lower() + if paramater == "all": + return INDEX_LIST, "" + num_list = list() + try: + _str_list = paramater.split(',') + for area_str in _str_list: + _num_list = None + _str_list = area_str.split('-') + _str_list = [item.replace(list_type.lower(), '') for item in _str_list] + _str_list = [item.replace(list_type.upper(), '') for item in _str_list] + _num_list = [int(item) for item in _str_list] + if len(_num_list) == 2: + _start = min(_num_list) + _end = max(_num_list) + if _start not in INDEX_LIST: + return None, "invalid paramater!" + if _end not in INDEX_LIST: + return None, "invalid paramater!" + _num_list = list(range(_start, _end+1)) + else: + if _num_list[0] not in INDEX_LIST: + return None, "invalid paramater!" + _num_list = [_num_list[0]] + num_list.extend(_num_list) + except Exception as e: + return None, str(e) + return num_list, "" + +_global_options = [ + click.option('-r', '--rlm', default=0, type=click.IntRange(RLM_INDEX_LIST[0], RLM_INDEX_LIST[-1]), help='RLM Index Number Ranges from {} to {}'.format(RLM_INDEX_LIST[0], RLM_INDEX_LIST[-1])) +] + +def global_options(func): + global _global_options + for option in reversed(_global_options): + func = option(func) + return func + +CONTEXT_SETTINGS = dict(help_option_names=['-h', '--help', '-?']) + +@click.group(cls=clicommon.AliasedGroup, context_settings=CONTEXT_SETTINGS) +@click.pass_context +def cli(ctx): + if os.geteuid() != 0: + click.echo("Root privileges are required for this operation") + sys.exit(ERROR_PERMISSIONS) + + # Load platform-specific Chassis class + if not load_platform_chassis(): + sys.exit(ERROR_CHASSIS_LOAD) + + # Load SfpUtilHelper class + if not load_sfputilhelper(): + sys.exit(ERROR_SFPUTILHELPER_LOAD) + + # Load port info + if not load_port_config(): + sys.exit(ERROR_PORT_CONFIG_LOAD) + +@cli.group(cls=clicommon.AbbreviationGroup, context_settings=CONTEXT_SETTINGS) +def show(): + pass + +@show.command('portmap') +@click.argument('port_index', metavar=''.format(PORT_INDEX_LIST[0], PORT_INDEX_LIST[-1]), required=False) +def show_portmap(port_index): + port_index_list, msg = _get_port_list(port_index) + if port_index_list == None: + click.echo(msg) + return -1 + cmd = (str({"port_index_list":port_index_list, "cmd":"show_portmap"})) + send_cmd(cmd) + +@show.group(cls=clicommon.AbbreviationGroup, context_settings=CONTEXT_SETTINGS) +def rlm(): + """Display status of RLM""" + pass + +@show.group(cls=clicommon.AbbreviationGroup, context_settings=CONTEXT_SETTINGS) +def interface(): + """Display status of interface""" + pass + +@interface.command('dom') +@click.argument('port_index', metavar=''.format(PORT_INDEX_LIST[0], PORT_INDEX_LIST[-1]), required=False) +@click.option('-s', '--strip', metavar='<>', is_flag=True) +@click.option('--json-format-output', '-j', is_flag=True, help="JSON format output") +def show_dom(port_index, strip, json_format_output): + port_index_list, msg = _get_port_list(port_index) + if port_index_list == None: + click.echo(msg) + return -1 + cmd = (str({"port_index_list":port_index_list, "output_format": "", "cmd":"show_interface_dom_info"})) + if json_format_output: + cmd = (str({"port_index_list":port_index_list, "output_format": "json", "cmd":"show_interface_dom_info"})) + send_cmd(cmd, strip) + +@interface.command('speed') +@click.argument('port_index', metavar=''.format(PORT_INDEX_LIST[0], PORT_INDEX_LIST[-1]), required=False) +def show_speed(port_index): + port_index_list, msg = _get_port_list(port_index) + if port_index_list == None: + click.echo(msg) + return -1 + cmd = (str({"port_index_list":port_index_list, "cmd":"show_interface_speed"})) + send_cmd(cmd) + +@interface.command('tx_disable') +@click.argument('port_index', metavar=''.format(PORT_INDEX_LIST[0], PORT_INDEX_LIST[-1]), required=False) +@click.option('-l', '--lane', metavar='', default=None, type=click.IntRange(0, 7)) +@click.option('-s', '--strip', metavar='<>', is_flag=True) +def show_tx_disable(port_index, lane, strip): + port_index_list, msg = _get_port_list(port_index) + if port_index_list == None: + click.echo(msg) + return -1 + if lane != None: + lane_index_list = [lane] + else: + lane_index_list = None + cmd = (str({"port_index_list":port_index_list, "lane_index_list": lane_index_list, "cmd":"show_tx_output"})) + send_cmd(cmd, strip) + +@rlm.command('eeprom') +@click.argument('rlm', metavar=''.format(RLM_INDEX_LIST[0], RLM_INDEX_LIST[-1]), required=False) +@click.option('--json-format-output', '-j', is_flag=True, help="JSON format output") +def show_eeprom(rlm, json_format_output): + """Display EEPROM data of RLM""" + global cpo_util + if cpo_util == None: + click.echo("Not supported!") + return -1 + + rlm_list, msg = _get_rlm_list(rlm) + if rlm_list == None: + click.echo(msg) + return -1 + + for rlm in rlm_list: + oe = cpo_util.get_oe_by_rlm(rlm) + rlm_name = cpo_util.get_rlm_name(rlm) + if json_format_output: + click.echo(json.dumps({"{}(OE{})".format(rlm_name, oe): cpo_util.get_rlm_info_dict(rlm)})) + continue + click.echo("{}(OE{}):".format(rlm_name, oe)) + rlm_info_dict = cpo_util.get_rlm_info_dict(rlm) + if type(rlm_info_dict) == dict: + rlm_info_dict = cpo_util.get_dict_str_format(indict=rlm_info_dict, indent=' ' * 8) + click.echo(rlm_info_dict) + +@rlm.command('presence') +@click.argument('rlm', metavar=''.format(RLM_INDEX_LIST[0], RLM_INDEX_LIST[-1]), required=False) +def show_presence(rlm): + """Display presence of RLM""" + global cpo_util + if cpo_util == None: + click.echo("Not supported!") + return -1 + + rlm_list, msg = _get_rlm_list(rlm) + if rlm_list == None: + click.echo(msg) + return -1 + + for rlm in rlm_list: + oe = cpo_util.get_oe_by_rlm(rlm) + rlm_name = cpo_util.get_rlm_name(rlm) + if cpo_util.get_rlm_presence(rlm) == False: + click.echo("{}(OE{}): Not Presence.".format(rlm_name, oe)) + else: + click.echo("{}(OE{}): Presence.".format(rlm_name, oe)) + +@rlm.command('lpmode') +@click.argument('rlm', metavar=''.format(RLM_INDEX_LIST[0], RLM_INDEX_LIST[-1]), required=False) +@click.option('-s', '--strip', metavar='<>', is_flag=True) +def show_lpmode(rlm, strip): + """Display laser power-mode of RLM""" + rlm_list, msg = _get_rlm_list(rlm) + if rlm_list == None: + click.echo(msg) + return -1 + cmd = (str({"rlm_index_list":rlm_list, "cmd":"show_rlm_power_mode"})) + send_cmd(cmd, strip) + +@show.group(cls=clicommon.AbbreviationGroup, context_settings=CONTEXT_SETTINGS) +def oe(): + """Display status of OE""" + pass + +@oe.command('status') +@click.argument('oe', metavar=''.format(OE_INDEX_LIST[0], OE_INDEX_LIST[-1]), required=True) +def show_oe_status(oe): + """Show oe module status""" + oe_list, msg = _get_oe_list(oe) + if oe_list == None: + click.echo(msg) + return -1 + threads = list() + for oe in oe_list: + if (int(oe) not in OE_INDEX_LIST): + click.echo("invalid oe!") + return -1 + cmd = (str({"oe_index":oe, "cmd":"show_status"})) + threads.append(threading.Thread(target=send_cmd, args=(cmd,))) + for t in threads: + t.start() + for t in threads: + t.join() + +@oe.command('temperature') +@click.argument('oe', metavar=''.format(OE_INDEX_LIST[0], OE_INDEX_LIST[-1]), required=False) +def show_oe_temperature(oe): + """Show oe module status""" + oe_list, msg = _get_oe_list(oe) + if oe_list == None: + click.echo(msg) + return -1 + cmd = (str({"oe_index_list":oe_list, "cmd":"show_oe_temperature"})) + send_cmd(cmd) + +@oe.command('speed') +@click.argument('oe', metavar=''.format(OE_INDEX_LIST[0], OE_INDEX_LIST[-1]), required=False) +def show_speed(oe): + """Display speed of OE""" + global cpo_util + if cpo_util == None: + click.echo("Not supported!") + return -1 + oe_list, msg = _get_oe_list(oe) + if oe_list == None: + click.echo(msg) + return -1 + port_index_list = cpo_util.get_port_index_list() + for port_index in port_index_list: + speed = cpo_util.get_speed(port_index) + click.echo("{}: {}".format(port_index, speed)) + +@cli.group(cls=clicommon.AbbreviationGroup, context_settings=CONTEXT_SETTINGS) +def config(): + pass + +@config.group(cls=clicommon.AbbreviationGroup, context_settings=CONTEXT_SETTINGS) +def rlm(): + pass + +# rlm: 1-16 +@rlm.command('lpmode') +@click.argument('rlm', metavar=''.format(RLM_INDEX_LIST[0], RLM_INDEX_LIST[-1]), required=True) +@click.argument('mode', metavar='', required=True, type=click.Choice(['full-power', 'half-power'])) +def rlm_lpmode(rlm, mode): + """Config RLM laser power-mode""" + rlm_index_list, msg = _get_rlm_list(rlm) + if rlm_index_list == None: + click.echo(msg) + return -1 + threads = list() + for rlm_index in rlm_index_list: + cmd = (str({"rlm_index_list":[rlm_index], "cmd":"set_rlm_power_mode", "power_mode": mode})) + threads.append(threading.Thread(target=send_cmd, args=(cmd,))) + for t in threads: + t.start() + for t in threads: + t.join() + +@config.group(cls=clicommon.AbbreviationGroup, context_settings=CONTEXT_SETTINGS) +def oe(): + pass + +@oe.command('enabled') +@click.argument('oe', metavar=''.format(OE_INDEX_LIST[0], OE_INDEX_LIST[-1]), required=True) +def oe_enabled(oe): + oe_list, msg = _get_oe_list(oe) + if oe_list == None: + click.echo(msg) + return -1 + threads = list() + for oe in oe_list: + if (int(oe) not in OE_INDEX_LIST): + click.echo("invalid oe!") + return -1 + cmd = (str({"oe_index":oe, "cmd":"enter_mission_mode", "manully": True})) + threads.append(threading.Thread(target=send_cmd, args=(cmd,))) + for t in threads: + t.start() + for t in threads: + t.join() + +@oe.command('disabled') +@click.argument('oe', metavar=''.format(OE_INDEX_LIST[0], OE_INDEX_LIST[-1]), required=True) +def oe_disabled(oe): + """Config OE disabled""" + oe_list, msg = _get_oe_list(oe) + if oe_list == None: + click.echo(msg) + return -1 + threads = list() + for oe in oe_list: + if (int(oe) not in OE_INDEX_LIST): + click.echo("invalid oe!") + return -1 + cmd = (str({"oe_index":oe, "cmd":"exit_mission_mode", "manully": True})) + threads.append(threading.Thread(target=send_cmd, args=(cmd,))) + for t in threads: + t.start() + for t in threads: + t.join() + +@oe.command('reset') +@click.argument('oe', metavar=''.format(OE_INDEX_LIST[0], OE_INDEX_LIST[-1]), required=True) +@click.option('-H', '--Hard', is_flag=True, help='Use hardware reset') +def reset_oe(oe, hard): + """Reset OE""" + oe_list, msg = _get_oe_list(oe) + if oe_list == None: + click.echo(msg) + return -1 + cmd = (str({"oe_index_list":oe_list, "cmd":"oe_reset", "hardware_reset": hard})) + send_cmd(cmd) + +@cli.group(cls=clicommon.AbbreviationGroup, context_settings=CONTEXT_SETTINGS) +def cdb(): + pass + +@cdb.command('load') +@click.argument('filename', type=click.Path(exists=True, readable=True)) +@click.option('-s', '--size', default=2048, type=click.IntRange(1, 2048)) +@click.option('-a', '--all', is_flag=True) +@click.option('-r', '--rlm', default=None, type=click.IntRange(0, 1)) +@click.option('-b', '--bypass', is_flag=True, help='Bypass serial number checking') +@click.option('-oe', default=0, type=click.IntRange(OE_INDEX_LIST[0], OE_INDEX_LIST[-1]), help='OE Number Ranges from {} to {}'.format(OE_INDEX_LIST[0], OE_INDEX_LIST[-1])) +def cdb_load_general_cli(filename, size, oe, all, rlm, bypass): + """Load cdb image""" + verify = True + if bypass: + verify = False + if all: + oe = None + oe_list, msg = _get_oe_list(oe) + if oe_list == None: + click.echo(msg) + return -1 + for _oe in oe_list: + cpo_util.oe_fw_upgrade(_oe, filename, size, rlm, verify) + +@cdb.command('laserPwr') +@click.argument('oe', metavar=''.format(OE_INDEX_LIST[0], OE_INDEX_LIST[-1]), required=True) +def cdb_mpd_sum(oe): + """Display EIC Laser Input Power""" + oe_list, msg = _get_oe_list(oe) + if oe_list == None: + click.echo(msg) + return -1 + for _oe in oe_list: + cpo_util.oe_dump_laser_pwr(_oe) + +@config.group(cls=clicommon.AbbreviationGroup, context_settings=CONTEXT_SETTINGS) +def interface(): + pass + +@interface.command('tx_disable') +@click.argument('port_index', metavar=''.format(PORT_INDEX_LIST[0], PORT_INDEX_LIST[-1]), required=True) +@click.option('-l', '--lane', metavar='', default=None, type=click.IntRange(0, 7)) +def set_tx_disable(port_index, lane): + port_index_list, msg = _get_port_list(port_index) + if port_index_list == None: + click.echo(msg) + return -1 + if lane != None: + lane_index_list = [lane] + else: + lane_index_list = None + cmd = (str({"port_index_list":port_index_list, "lane_index_list": lane_index_list, "cmd":"set_tx_output", "turn_on": False})) + send_cmd(cmd) + +@interface.command('tx_enable') +@click.argument('port_index', metavar=''.format(PORT_INDEX_LIST[0], PORT_INDEX_LIST[-1]), required=True) +@click.option('-l', '--lane', metavar='', default=None, type=click.IntRange(0, 7)) +def set_tx_disable(port_index, lane): + port_index_list, msg = _get_port_list(port_index) + if port_index_list == None: + click.echo(msg) + return -1 + if lane != None: + lane_index_list = [lane] + else: + lane_index_list = None + cmd = (str({"port_index_list":port_index_list, "lane_index_list": lane_index_list, "cmd":"set_tx_output", "turn_on": True})) + send_cmd(cmd) + +if __name__ == '__main__': + cli() diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/cpo/script/oe_cmis_sysfs_rw b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/cpo/script/oe_cmis_sysfs_rw new file mode 100755 index 00000000000..5103646519c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/cpo/script/oe_cmis_sysfs_rw @@ -0,0 +1,213 @@ +#!/usr/bin/python3 +import os +import sys +import fcntl +import click +import sonic_platform +from sonic_py_common import device_info, logger, multi_asic +import sonic_platform_base.sonic_sfp.sfputilhelper +import utilities_common.cli as clicommon +from oe_cmis_rw import oe_cmis_sysfs_rw + +def help(): + print("------------------------------OE CMIS sysfs RW Tool--------------------------------") + print("Read OE CMIS data:") + print("\toe_cmis_sysfs_rw.py rd [oe] [bank] [page] [offset] [rd_len]") + print("\t[oe] from 0 to 7 (decimal)") + print("\t[bank] from 0 to 7 (hexadecimal)") + print("\t[page] from 0 to 0xff (hexadecimal)") + print("\t[offset] from 0 to 0xff (hexadecimal)") + print("\t[rd_len] from 1 to 256 (decimal)") + print("Write OE CMIS data:") + print("\toe_cmis_sysfs_rw.py wr [oe] [bank] [page] [offset] [wr_data]") + print("\t[oe] from 0 to 7 (decimal)") + print("\t[bank] from 0 to 7 (hexadecimal)") + print("\t[page] from 0 to 0xff (hexadecimal)") + print("\t[offset] from 0 to 0xff (hexadecimal)") + print("\t[wr_data] from 0 to 0xff (hexadecimal)") + return + +def dfd_utest_printf_reg(buf, offset): + j = offset % 16 + tmp = j + offset -= j + print(" ", end="") + + for i in range(0,16): + print("%02X " %i, end="") + + for i in range(0, len(buf) + j): + if (i % 16) == 0: + print("\n%02X: " % offset, end="") + offset += 16 + if tmp: + print(" ", end="") + tmp -= 1 + else: + print("%02x " % buf[i-j], end="") + print("") + return + +# oe_cmis_sysfs_rw.py rd [oe] [bank] [page] [offset] [rd_len] +def cmis_sysfs_read_parse(argv, is_raw): + if len(argv) != 7: + print("Input invalid") + help() + return -1 + + oe_num = int(argv[2]) + if oe_num < 0 or oe_num > 7: + print("Invalid oe: %d\n" % oe_num) + help() + return -1 + + bank = int(argv[3], 16) + if bank < 0 or bank > 0xff: + print("Invalid bank: %d" % bank) + help() + return -1 + + page = int(argv[4], 16) + if page < 0 or page > 0xff: + print("Invalid page: %d" % page) + help() + return -1 + + offset = int(argv[5], 16) + if offset < 0 or offset > 0xff: + print("Invalid offset: %d" % offset) + help() + return -1 + + rd_len = int(argv[6]) + if rd_len < 0 or rd_len > 256: + print("Invalid offset: %d" % rd_len) + help() + return -1 + + # oe_bus = (oe_num % 8) + 24 + # i2c_path = cmis_util.cmis_sysfs_i2c_path(oe_num) + if (not is_raw): + # print("OE CMIS sysfs read, oe: %d, path: %s" % (oe_num, i2c_path)) + print("OE CMIS sysfs read, oe: %d, bank: 0x%02x, page: 0x%02x offset: 0x%02x, rd_len: %d" % + (oe_num, bank, page, offset, rd_len)) + + status, value = cmis_util.cmis_read(oe_num, bank, page, offset, rd_len) + if status is False: + print("Failed to read OE CMIS data, msg: %s" % value) + return -1 + if (not is_raw): + dfd_utest_printf_reg(value, offset) + else: + hex_string_list = ["{}".format(hex(item))[2:].zfill(2) for item in value] + output = "".join([item for item in hex_string_list]) + print(output) + return 0 + +# oe_cmis_sysfs_rw.py wr [oe] [bank] [page] [offset] [wr_data] +def cmis_sysfs_write_parse(argv, is_raw): + if len(argv) != 7: + print("Input invalid") + help() + return -1 + + oe_num = int(argv[2]) + if oe_num < 0 or oe_num > 7: + print("Invalid oe: %d\n" % oe_num) + help() + return -1 + + bank = int(argv[3], 16) + if bank < 0 or bank > 0xff: + print("Invalid bank: %d" % bank) + help() + return -1 + + page = int(argv[4], 16) + if page < 0 or page > 0xff: + print("Invalid page: %d" % page) + help() + return -1 + + offset = int(argv[5], 16) + if offset < 0 or offset > 0xff: + print("Invalid offset: %d" % offset) + help() + return -1 + + wr_data = argv[6] + wr_data = wr_data.strip() + if ((wr_data.find('[')>=0) and (wr_data.find(']')>=0)): + import ast + wr_data = ast.literal_eval(wr_data) + else: + wr_data = [int(wr_data, 16)] + + for byte_data in wr_data: + if byte_data < 0 or byte_data > 0xff: + print("Invalid wr_data: {}".format(wr_data)) + help() + return -1 + + # i2c_path = cmis_util.cmis_sysfs_i2c_path(oe_num) + # print("OE CMIS sysfs write, oe: %d, path: %s" % (oe_num, i2c_path)) + if (not is_raw): + print("OE CMIS sysfs write, oe: %d, bank: 0x%02x, page: 0x%02x offset: 0x%02x, wr_data: %s" % + (oe_num, bank, page, offset, str(["0x%02x"%byte_data for byte_data in wr_data]))) + + status, value = cmis_util.cmis_write(oe_num, bank, page, offset, wr_data) + if status is False: + print("Failed to write OE CMIS data, msg: %s" % value) + return -1 + if (not is_raw): + print("OE CMIS data success") + return 0 + +@click.group() +def cli(): + pass + +@cli.command() +@click.argument('oe', metavar='', required=True) +@click.argument('bank', metavar='', required=True) +@click.argument('page', metavar='', required=True) +@click.argument('offset', metavar='', required=True) +@click.argument('rd_len', metavar='', required=True) +@click.option('-raw', '--raw_data', is_flag=True, help='output raw data') +def rd(oe, bank, page, offset, rd_len, raw_data): + '''Read cmis data from /sys/bus/i2c/devices/XX-0050/eeprom''' + oe_list = oe.split('-') + if len(oe_list) > 1: + range_start = min(int(oe_list[0]), int(oe_list[1])) + range_end = max(int(oe_list[0]), int(oe_list[1])) + oe_list = range(range_start, range_end+1) + + for oe in oe_list: + # print(oe, bank, page, offset, rd_len) + argv = [0, 0, oe, bank, page, offset, rd_len] + cmis_sysfs_read_parse(argv, raw_data) + +@cli.command() +@click.argument('oe', metavar='', required=True) +@click.argument('bank', metavar='', required=True) +@click.argument('page', metavar='', required=True) +@click.argument('offset', metavar='', required=True) +@click.argument('wr_data', metavar='', required=True) +@click.option('-raw', '--raw_data', is_flag=True, help='write quietly') +def wr(oe, bank, page, offset, wr_data, raw_data): + '''Write cmis data through /sys/bus/i2c/devices/XX-0050/eeprom''' + oe_list = oe.split('-') + if len(oe_list) > 1: + range_start = min(int(oe_list[0]), int(oe_list[1])) + range_end = max(int(oe_list[0]), int(oe_list[1])) + oe_list = range(range_start, range_end+1) + + for oe in oe_list: + # print(oe, bank, page, offset, wr_data) + argv = [0, 0, oe, bank, page, offset, wr_data] + cmis_sysfs_write_parse(argv, raw_data) + +if __name__ == '__main__': + global cmis_util + cmis_util = oe_cmis_sysfs_rw() + cli() \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/cpo/script/oe_voltage_setting.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/cpo/script/oe_voltage_setting.py new file mode 100644 index 00000000000..b52fc40ce59 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/cpo/script/oe_voltage_setting.py @@ -0,0 +1,312 @@ +#!/usr/bin/env python3 +import syslog +import os +import glob + +from cpoutil import get_all_oe_vendor_info + +OE_AVDD_VOLTAGE_STATIC_PARAMETERS = [ + # OE0_AVDD_RX_1.8_V + {"loc": "67-0070/hwmon/hwmon*/avs0_vout_min", "value": "1710000"}, + {"loc": "67-0070/hwmon/hwmon*/avs0_vout_max", "value": "1890000"}, + {"loc": "67-0070/hwmon/hwmon*/avs0_vout", "value": "1800000"}, + # OE0_AVDD_RX_1.2_V + {"loc": "67-0070/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + {"loc": "67-0070/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + {"loc": "67-0070/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE0_AVDD_TX_1.8_V + {"loc": "67-0068/hwmon/hwmon*/avs0_vout_min", "value": "1750000"}, + {"loc": "67-0068/hwmon/hwmon*/avs0_vout_max", "value": "1950000"}, + # {"loc": "67-0068/hwmon/hwmon*/avs0_vout", "value": "1850000"}, + # OE0_AVDD_TX_1.2_V + {"loc": "67-0068/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + {"loc": "67-0068/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + {"loc": "67-0068/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # OE0_AVDD_TRX_0.75_V + {"loc": "67-0060/hwmon/hwmon*/avs0_vout_min", "value": "713000"}, + {"loc": "67-0060/hwmon/hwmon*/avs0_vout_max", "value": "788000"}, + {"loc": "67-0060/hwmon/hwmon*/avs0_vout", "value": "750000"}, + # OE1_AVDD_RX_1.8_V + {"loc": "68-0070/hwmon/hwmon*/avs0_vout_min", "value": "1710000"}, + {"loc": "68-0070/hwmon/hwmon*/avs0_vout_max", "value": "1890000"}, + {"loc": "68-0070/hwmon/hwmon*/avs0_vout", "value": "1800000"}, + # OE1_AVDD_RX_1.2_V + {"loc": "68-0070/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + {"loc": "68-0070/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + {"loc": "68-0070/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE1_AVDD_TX_1.8_V + {"loc": "68-0068/hwmon/hwmon*/avs0_vout_min", "value": "1750000"}, + {"loc": "68-0068/hwmon/hwmon*/avs0_vout_max", "value": "1950000"}, + # {"loc": "68-0068/hwmon/hwmon*/avs0_vout", "value": "1850000"}, + # OE1_AVDD_TX_1.2_V + {"loc": "68-0068/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + {"loc": "68-0068/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + {"loc": "68-0068/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # OE1_AVDD_TRX_0.75_V + {"loc": "68-0060/hwmon/hwmon*/avs0_vout_min", "value": "713000"}, + {"loc": "68-0060/hwmon/hwmon*/avs0_vout_max", "value": "788000"}, + {"loc": "68-0060/hwmon/hwmon*/avs0_vout", "value": "750000"}, + # OE2_AVDD_RX_1.8_V + {"loc": "68-006e/hwmon/hwmon*/avs0_vout_min", "value": "1710000"}, + {"loc": "68-006e/hwmon/hwmon*/avs0_vout_max", "value": "1890000"}, + {"loc": "68-006e/hwmon/hwmon*/avs0_vout", "value": "1800000"}, + # OE2_AVDD_RX_1.2_V + {"loc": "68-006e/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + {"loc": "68-006e/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + {"loc": "68-006e/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE2_AVDD_TX_1.8_V + {"loc": "68-0066/hwmon/hwmon*/avs0_vout_min", "value": "1750000"}, + {"loc": "68-0066/hwmon/hwmon*/avs0_vout_max", "value": "1950000"}, + # {"loc": "68-0066/hwmon/hwmon*/avs0_vout", "value": "1850000"}, + # OE2_AVDD_TX_1.2_V + {"loc": "68-0066/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + {"loc": "68-0066/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + {"loc": "68-0066/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # OE2_AVDD_TRX_0.75_V + {"loc": "68-005e/hwmon/hwmon*/avs0_vout_min", "value": "713000"}, + {"loc": "68-005e/hwmon/hwmon*/avs0_vout_max", "value": "788000"}, + {"loc": "68-005e/hwmon/hwmon*/avs0_vout", "value": "750000"}, + # OE3_AVDD_RX_1.8_V + {"loc": "69-0070/hwmon/hwmon*/avs0_vout_min", "value": "1710000"}, + {"loc": "69-0070/hwmon/hwmon*/avs0_vout_max", "value": "1890000"}, + {"loc": "69-0070/hwmon/hwmon*/avs0_vout", "value": "1800000"}, + # OE3_AVDD_RX_1.2_V + {"loc": "69-0070/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + {"loc": "69-0070/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + {"loc": "69-0070/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE3_AVDD_TX_1.8_V + {"loc": "69-0068/hwmon/hwmon*/avs0_vout_min", "value": "1750000"}, + {"loc": "69-0068/hwmon/hwmon*/avs0_vout_max", "value": "1950000"}, + # {"loc": "69-0068/hwmon/hwmon*/avs0_vout", "value": "1850000"}, + # OE3_AVDD_TX_1.2_V + {"loc": "69-0068/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + {"loc": "69-0068/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + {"loc": "69-0068/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # OE3_AVDD_TRX_0.75_V + {"loc": "69-0060/hwmon/hwmon*/avs0_vout_min", "value": "713000"}, + {"loc": "69-0060/hwmon/hwmon*/avs0_vout_max", "value": "788000"}, + {"loc": "69-0060/hwmon/hwmon*/avs0_vout", "value": "750000"}, + # OE4_AVDD_RX_1.8_V + {"loc": "69-006e/hwmon/hwmon*/avs0_vout_min", "value": "1710000"}, + {"loc": "69-006e/hwmon/hwmon*/avs0_vout_max", "value": "1890000"}, + {"loc": "69-006e/hwmon/hwmon*/avs0_vout", "value": "1800000"}, + # OE4_AVDD_RX_1.2_V + {"loc": "69-006e/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + {"loc": "69-006e/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + {"loc": "69-006e/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE4_AVDD_TX_1.8_V + {"loc": "69-0066/hwmon/hwmon*/avs0_vout_min", "value": "1750000"}, + {"loc": "69-0066/hwmon/hwmon*/avs0_vout_max", "value": "1950000"}, + # {"loc": "69-0066/hwmon/hwmon*/avs0_vout", "value": "1850000"}, + # OE4_AVDD_TX_1.2_V + {"loc": "69-0066/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + {"loc": "69-0066/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + {"loc": "69-0066/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # OE4_AVDD_TRX_0.75_V + {"loc": "69-005e/hwmon/hwmon*/avs0_vout_min", "value": "713000"}, + {"loc": "69-005e/hwmon/hwmon*/avs0_vout_max", "value": "788000"}, + {"loc": "69-005e/hwmon/hwmon*/avs0_vout", "value": "750000"}, + # OE5_AVDD_RX_1.8_V + {"loc": "70-0070/hwmon/hwmon*/avs0_vout_min", "value": "1710000"}, + {"loc": "70-0070/hwmon/hwmon*/avs0_vout_max", "value": "1890000"}, + {"loc": "70-0070/hwmon/hwmon*/avs0_vout", "value": "1800000"}, + # OE5_AVDD_RX_1.2_V + {"loc": "70-0070/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + {"loc": "70-0070/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + {"loc": "70-0070/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE5_AVDD_TX_1.8_V + {"loc": "70-0068/hwmon/hwmon*/avs0_vout_min", "value": "1750000"}, + {"loc": "70-0068/hwmon/hwmon*/avs0_vout_max", "value": "1950000"}, + # {"loc": "70-0068/hwmon/hwmon*/avs0_vout", "value": "1850000"}, + # OE5_AVDD_TX_1.2_V + {"loc": "70-0068/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + {"loc": "70-0068/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + {"loc": "70-0068/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # OE5_AVDD_TRX_0.75_V + {"loc": "70-0060/hwmon/hwmon*/avs0_vout_min", "value": "713000"}, + {"loc": "70-0060/hwmon/hwmon*/avs0_vout_max", "value": "788000"}, + {"loc": "70-0060/hwmon/hwmon*/avs0_vout", "value": "750000"}, + # OE6_AVDD_RX_1.8_V + {"loc": "70-006e/hwmon/hwmon*/avs0_vout_min", "value": "1710000"}, + {"loc": "70-006e/hwmon/hwmon*/avs0_vout_max", "value": "1890000"}, + {"loc": "70-006e/hwmon/hwmon*/avs0_vout", "value": "1800000"}, + # OE6_AVDD_RX_1.2_V + {"loc": "70-006e/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + {"loc": "70-006e/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + {"loc": "70-006e/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE6_AVDD_TX_1.8_V + {"loc": "70-0066/hwmon/hwmon*/avs0_vout_min", "value": "1750000"}, + {"loc": "70-0066/hwmon/hwmon*/avs0_vout_max", "value": "1950000"}, + # {"loc": "70-0066/hwmon/hwmon*/avs0_vout", "value": "1850000"}, + # OE6_AVDD_TX_1.2_V + {"loc": "70-0066/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + {"loc": "70-0066/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + {"loc": "70-0066/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # OE6_AVDD_TRX_0.75_V + {"loc": "70-005e/hwmon/hwmon*/avs0_vout_min", "value": "713000"}, + {"loc": "70-005e/hwmon/hwmon*/avs0_vout_max", "value": "788000"}, + {"loc": "70-005e/hwmon/hwmon*/avs0_vout", "value": "750000"}, + # OE7_AVDD_RX_1.8_V + {"loc": "67-006e/hwmon/hwmon*/avs0_vout_min", "value": "1710000"}, + {"loc": "67-006e/hwmon/hwmon*/avs0_vout_max", "value": "1890000"}, + {"loc": "67-006e/hwmon/hwmon*/avs0_vout", "value": "1800000"}, + # OE7_AVDD_RX_1.2_V + {"loc": "67-006e/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + {"loc": "67-006e/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + {"loc": "67-006e/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE7_AVDD_TX_1.8_V + {"loc": "67-0066/hwmon/hwmon*/avs0_vout_min", "value": "1750000"}, + {"loc": "67-0066/hwmon/hwmon*/avs0_vout_max", "value": "1950000"}, + # {"loc": "67-0066/hwmon/hwmon*/avs0_vout", "value": "1850000"}, + # OE7_AVDD_TX_1.2_V + {"loc": "67-0066/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + {"loc": "67-0066/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + {"loc": "67-0066/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # OE7_AVDD_TRX_0.75_V + {"loc": "67-005e/hwmon/hwmon*/avs0_vout_min", "value": "713000"}, + {"loc": "67-005e/hwmon/hwmon*/avs0_vout_max", "value": "788000"}, + {"loc": "67-005e/hwmon/hwmon*/avs0_vout", "value": "750000"} +] + +OE_AVDD_VOLTAGE_CUSTOM_PARAMETERS = { + # Strict ordering is required for this parameters + "OE_AVDD_TX_1_8":[ + # OE0_AVDD_TX + "67-0068/hwmon/hwmon*/avs0_vout", + # OE1_AVDD_TX + "68-0068/hwmon/hwmon*/avs0_vout", + # OE2_AVDD_TX + "68-0066/hwmon/hwmon*/avs0_vout", + # OE3_AVDD_TX + "69-0068/hwmon/hwmon*/avs0_vout", + # OE4_AVDD_TX + "69-0066/hwmon/hwmon*/avs0_vout", + # OE5_AVDD_TX + "70-0068/hwmon/hwmon*/avs0_vout", + # OE6_AVDD_TX + "70-0066/hwmon/hwmon*/avs0_vout", + # OE7_AVDD_TX + "67-0066/hwmon/hwmon*/avs0_vout" + ], +} + +CUSTOM_PARA_1_85 = "1850000" +CUSTOM_PARA_1_80 = "1810000" +SPECIAL_SN_CASES = ["SB244800G", + "SB2439006", + "SB2446006", + "SB2448004", + "SB244800A", + "SB244800F", + "SB244800J", + "SB244800L", + "SB244800R", + "SB244800V",] + +OE_VOLTAGE_SET_DEBUG_FILE = "/etc/.oe_voltage_set_debug_flag" + +debuglevel = 0 + + +def oe_voltage_set_debug(s): + if debuglevel == 1: + syslog.openlog("OE_VOLTAGE_SET", syslog.LOG_PID) + syslog.syslog(syslog.LOG_DEBUG, s) + +def oe_voltage_set_error(s): + # s = s.decode('utf-8').encode('gb2312') + syslog.openlog("OE_VOLTAGE_SET", syslog.LOG_PID) + syslog.syslog(syslog.LOG_ERR, s) + + +def oe_voltage_set_info(s): + syslog.openlog("OE_VOLTAGE_SET", syslog.LOG_PID) + syslog.syslog(syslog.LOG_INFO, s) + +def debug_init(): + global debuglevel + if os.path.exists(OE_VOLTAGE_SET_DEBUG_FILE): + debuglevel = 1 + else: + debuglevel = 0 + +def write_sysfs_value(reg_name, value): + mb_reg_file = "/sys/bus/i2c/devices/" + reg_name + locations = glob.glob(mb_reg_file) + if len(locations) == 0: + print("%s not found" % mb_reg_file) + return False, "{} not found".format(mb_reg_file) + sysfs_loc = locations[0] + try: + with open(sysfs_loc, 'w') as fd: + fd.write(value) + except Exception as e: + return False, e + return True,None + +def set_static_oe_avdd_parameters(): + for para_dic in OE_AVDD_VOLTAGE_STATIC_PARAMETERS: + oe_voltage_set_debug("Set {} to {}".format(para_dic["loc"], para_dic["value"])) + ret, log = write_sysfs_value(para_dic["loc"], para_dic["value"]) + if ret is False: + oe_voltage_set_error("Set {} failed, msg:{}".format(para_dic["loc"] ,log)) + +def get_OE_AVDD_TX_1_8_value(sn): + """ + rules: + format of SN : SByywwZZZ, yy: year, ww: work week, ZZZ: serial number + + the day after 2449(include 2449), return CUSTOM_PARA_1_80 + the dat before 2449, return CUSTOM_PARA_1_85 + + Special: + sn == SB244800G, return CUSTOM_PARA_1_80 + ... + """ + if sn in SPECIAL_SN_CASES: + return CUSTOM_PARA_1_80 + + try: + date = int(sn[2:6]) + except Exception as e: + oe_voltage_set_error("SN {} is not in expected format, return default value 1.8".format(sn)) + # return default value 1.8 + return CUSTOM_PARA_1_80 + + if date < 2449: + return CUSTOM_PARA_1_85 + else: + return CUSTOM_PARA_1_80 + +def set_OE_AVDD_TX_1_8_parameters(): + try: + oe_vendor_info_dict = get_all_oe_vendor_info() + except Exception as e: + oe_voltage_set_error("Get oe vender info failed: {}".format(e)) + oe_vendor_info_dict = {} + + for i in range(len(OE_AVDD_VOLTAGE_CUSTOM_PARAMETERS["OE_AVDD_TX_1_8"])): + cpo_vendor_sn = oe_vendor_info_dict.get(i,{}).get("CPO Vendor SN", "") + if cpo_vendor_sn == "": + oe_voltage_set_error("Failed to get num {} oe vendor info.".format(i)) + # Set to default value 1.8 + voltage_value = CUSTOM_PARA_1_80 + else: + voltage_value = get_OE_AVDD_TX_1_8_value(cpo_vendor_sn) + + oe_voltage_set_debug("Set num {} OE0_AVDD_TX1.8 to {}".format(i, voltage_value)) + ret, log = write_sysfs_value(OE_AVDD_VOLTAGE_CUSTOM_PARAMETERS["OE_AVDD_TX_1_8"][i], voltage_value) + if ret is False: + oe_voltage_set_error("Set {} failed, msg:{}".format(OE_AVDD_VOLTAGE_CUSTOM_PARAMETERS["OE_AVDD_TX_1_8"][i], log)) + + +if __name__ == '__main__': + debug_init() + + oe_voltage_set_info("Start setting static parameters of oe") + set_static_oe_avdd_parameters() + oe_voltage_set_info("End of setting static parameters of oe") + + oe_voltage_set_info("Start setting custom parameters of oe") + set_OE_AVDD_TX_1_8_parameters() + oe_voltage_set_info("End of setting custom parameters of oe") \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/cpo/script/platform_base.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/cpo/script/platform_base.py new file mode 100755 index 00000000000..011b3abefe7 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/cpo/script/platform_base.py @@ -0,0 +1,330 @@ +#!/usr/bin/env python3 +import os +import time +import sys +from platform_util import exec_os_cmd, log_to_file, get_value, set_value, get_sysfs_value +from wbutil.baseutil import get_machine_info, get_platform_info, get_board_id + +SUB_VERSION_FILE = "/etc/sonic/.subversion" + +# Constants +LOG_DIRECTORY = '/var/log/bsp_tech' +NO_CONFIG_ERR_CODE = 0 +READ_FAIL_ERR_CODE = -1 +MAX_RETRY = 6 + +# Ensure log directory exists +os.makedirs(LOG_DIRECTORY, exist_ok=True) +LOG_FILE_PATH = os.path.join(LOG_DIRECTORY, 'platform_base_debug.log') +LOG_WRITE_SIZE = 1 * 1024 * 1024 # 1 MB + +def log_message(message): + # Print the message and log it to the log file. + log_to_file(message, LOG_FILE_PATH, LOG_WRITE_SIZE) + + +platform = get_platform_info(get_machine_info()) +board_id = get_board_id(get_machine_info()) +platform_productfile = (platform + "_base_config").replace("-", "_") +platformid_configfile = (platform + "_" + board_id + "_base_config").replace("-", "_") # platfrom + board_id +configfile_pre = "/usr/local/bin/" +sys.path.append(configfile_pre) + +############################################################################################ +global module_product +if os.path.exists(configfile_pre + platformid_configfile + ".py"): + module_product = __import__(platformid_configfile, globals(), locals(), [], 0) +elif os.path.exists(configfile_pre + platform_productfile + ".py"): + module_product = __import__(platform_productfile, globals(), locals(), [], 0) +else: + log_message("platform base config file not exist, do nothing") + sys.exit(0) + +def get_var(name, default): + global module_product + var = getattr(module_product, name, default) + return var + +DRIVERLISTS = get_var("DRIVERLISTS", []) +DEVICE = get_var("DEVICE", []) +INIT_PARAM = get_var("INIT_PARAM", []) +FINISH_PARAM = get_var("FINISH_PARAM ", []) +SUBVERSION_CONFIG = get_var("SUBVERSION_CONFIG", {}) +SECONDARY_SUBVERSION_CONFIG = get_var("SECONDARY_SUBVERSION_CONFIG", {}) + + +def removeDev(bus, loc): + cmd = "echo 0x%02x > /sys/bus/i2c/devices/i2c-%d/delete_device" % (loc, bus) + devpath = "/sys/bus/i2c/devices/%d-%04x" % (bus, loc) + if os.path.exists(devpath): + log_message("%%PLATFORM_BASE: removeDev, bus: %s, loc: 0x%02x" % (bus, loc)) + tmp_config = { + "gettype": "cmd", + "cmd": cmd + } + ret, log = set_value(tmp_config) + if ret is False: + log_message("%%PLATFORM_BASE: run %s error, msg: %s" % (cmd, log)) + else: + log_message("%%PLATFORM_BASE: removeDev, bus: %s, loc: 0x%02x success" % (bus, loc)) + else: + log_message("%%PLATFORM_BASE: %s not found, don't run cmd: %s" % (devpath, cmd)) + + + +def addDev(name, bus, loc): + pdevpath = "/sys/bus/i2c/devices/i2c-%d/" % (bus) + for i in range(1, 11): + if os.path.exists(pdevpath) is True: + break + time.sleep(0.1) + if i % 10 == 0: + log_message("%%PLATFORM_BASE: %s not found ! i %d " % (pdevpath, i)) + return + + cmd = "echo %s 0x%02x > /sys/bus/i2c/devices/i2c-%d/new_device" % (name, loc, bus) + devpath = "/sys/bus/i2c/devices/%d-%04x" % (bus, loc) + if os.path.exists(devpath) is False: + log_message("%%PLATFORM_BASE: addDev, name: %s, bus: %s, loc: 0x%02x" % (name, bus, loc)) + tmp_config = { + "gettype": "cmd", + "cmd": cmd + } + ret, log = set_value(tmp_config) + if ret is False: + log_message("%%PLATFORM_BASE: run %s error, msg: %s" % (cmd, log)) + else: + log_message("%%PLATFORM_BASE: addDev, name: %s, bus: %s, loc: 0x%02x success" % (name, bus, loc)) + else: + log_message("%%PLATFORM_BASE: %s already exist, don't run cmd: %s" % (devpath, cmd)) + + +def removedevs(): + devs = DEVICE + for index in range(len(devs) - 1, -1, -1): + removeDev(devs[index]["bus"], devs[index]["loc"]) + + +def adddevs(): + for dev in DEVICE: + addDev(dev["name"], dev["bus"], dev["loc"]) + + +def checksignaldriver(name): + driver_path = "/sys/module/%s" % name + if os.path.exists(driver_path) is True: + return True + return False + + +def adddriver(name, delay): + realname = name.lstrip().split(" ")[0] + if delay > 0: + time.sleep(delay) + + ret = checksignaldriver(realname) + if ret is True: + log_message("%%PLATFORM_BASE: WARN: %s driver already loaded, skip to modprobe" % realname) + return + + cmd = "modprobe %s" % name + log_message("%%PLATFORM_BASE: adddriver cmd: %s, delay: %s" % (cmd, delay)) + retrytime = 6 + for i in range(retrytime): + status, log = exec_os_cmd(cmd) + if status == 0: + ret = checksignaldriver(realname) + if ret is True: + log_message("%%PLATFORM_BASE: add driver %s success" % realname) + return + log_message("%%PLATFORM_BASE: run %s success, but driver %s not load, retry: %d" % (cmd, realname, i)) + else: + log_message("%%PLATFORM_BASE: run %s error, status: %s, msg: %s, retry: %d" % (cmd, status, log, i)) + time.sleep(0.1) + log_message("%%PLATFORM_BASE: load %s driver failed, exit!" % realname) + sys.exit(1) + + +def removedriver(name, delay, removeable=1): + realname = name.lstrip().split(" ")[0] + if not removeable: + log_message("%%PLATFORM_BASE: driver name: %s not removeable" % realname) + return + ret = checksignaldriver(realname) + if ret is False: + log_message("%%PLATFORM_BASE: WARN: %s driver not loaded, skip to rmmod" % realname) + return + + cmd = "rmmod %s" % realname + log_message("%%PLATFORM_BASE: removedriver, driver name: %s, delay: %s" % (realname, delay)) + retrytime = 6 + for i in range(retrytime): + status, log = exec_os_cmd(cmd) + if status == 0: + ret = checksignaldriver(realname) + if ret is False: + log_message("%%PLATFORM_BASE: remove driver %s success" % realname) + if delay > 0: + time.sleep(delay) + return + log_message("%%PLATFORM_BASE: run %s success, but driver %s is load, retry: %d" % (cmd, realname, i)) + else: + log_message("%%PLATFORM_BASE: run %s error, status: %s, msg: %s, retry: %d" % (cmd, status, log, i)) + time.sleep(0.1) + log_message("%%PLATFORM_BASE: remove %s driver failed, exit!" % realname) + sys.exit(1) + + +def removedrivers(): + drivers = DRIVERLISTS + for index in range(len(drivers) - 1, -1, -1): + delay = 0 + name = "" + removeable = drivers[index].get("removable", 1) + if isinstance(drivers[index], dict): + name = drivers[index].get("name") + delay = drivers[index].get("delay") + else: + name = drivers[index] + removedriver(name, delay, removeable) + + +def adddrivers(): + for driver in DRIVERLISTS: + delay = 0 + name = "" + if isinstance(driver, dict): + name = driver.get("name") + delay = driver.get("delay", 0) + else: + name = driver + adddriver(name, delay) + + +def platform_base_init(): + for item in INIT_PARAM: + status, log = set_value(item) + if status is False: + log_message("%%PLATFORM_BASE: init set value failed, config: %s, log: %s" % (item, log)) + return False + log_message("%%PLATFORM_BASE: init set value success, config: %s" % item) + return True + + +def platform_base_finish(): + for item in FINISH_PARAM: + status, log = set_value(item) + if status is False: + log_message("%%PLATFORM_BASE: finish set value failed, config: %s, log: %s" % (item, log)) + else: + log_message("%%PLATFORM_BASE: finish set value success, config: %s" % item) + + +def unload_driver(): + removedevs() + removedrivers() + + +def load_driver(): + adddrivers() + adddevs() + +def get_main_sub_version(): + if not SUBVERSION_CONFIG: + log_message("%%PLATFORM_BASE: SUBVERSION_CONFIG is empty, do nothing") + return NO_CONFIG_ERR_CODE + + val_config = SUBVERSION_CONFIG["get_value"] + ret, value = get_value(val_config) + if ret is False: + log_message("%%PLATFORM_BASE: get value failed, config: %s, log: %s" % (val_config, value)) + return READ_FAIL_ERR_CODE + + log_message("%%PLATFORM_BASE: get value success, value: 0x%02x" % value) + + val_mask = val_config.get("mask") + if val_mask is not None: + origin_value = value + value = origin_value & val_mask + log_message("%%PLATFORM_BASE: origin value: 0x%02x, mask: 0x%02x, mask_value: 0x%02x" % + (origin_value, val_mask, value)) + + decode_config = SUBVERSION_CONFIG.get("decode_value") + if decode_config is not None: + origin_value = value + value = decode_config.get(origin_value, origin_value) + log_message("%%PLATFORM_BASE: origin_value: 0x%02x, decode value: 0x%02x" % (origin_value, value)) + + return "v%02x" % value + +def get_secondary_sub_version(): + if not SECONDARY_SUBVERSION_CONFIG: + log_message("%%PLATFORM_BASE: SECONDARY_SUBVERSION_CONFIG is empty, do nothing") + return NO_CONFIG_ERR_CODE + + val_config = SECONDARY_SUBVERSION_CONFIG.get("get_value", {}).get("loc") + val_configs = val_config if isinstance(val_config, list) else [val_config] + origin_value = "" + matched_config = None + + for i in range(MAX_RETRY): + for candidate in val_configs: + origin_value = get_sysfs_value(candidate) + if not (origin_value.startswith("ERR") or origin_value == ""): + matched_config = candidate + break + if matched_config is not None: + break + log_message("%%PLATFORM_BASE: get value failed, config: %s, log: %s, read count: %s" % (val_configs, origin_value, i)) + time.sleep(0.1) + + if matched_config is None: + return SECONDARY_SUBVERSION_CONFIG.get("default", READ_FAIL_ERR_CODE) + + log_message("%%PLATFORM_BASE: get value success, config: %s, value: %s" % (matched_config, origin_value)) + decode_config = SECONDARY_SUBVERSION_CONFIG.get("decode_value") + if decode_config is not None: + if origin_value in decode_config.keys(): + value = decode_config.get(origin_value) + elif "default" in decode_config.keys(): + value = decode_config.get("default") + else: + value = origin_value + else: + value = origin_value + return value + +def generate_sub_version(): + main_sub_version_str = get_main_sub_version() + if main_sub_version_str == NO_CONFIG_ERR_CODE or main_sub_version_str == READ_FAIL_ERR_CODE: + return + + secondary_sub_version_str = get_secondary_sub_version() + if secondary_sub_version_str == NO_CONFIG_ERR_CODE or secondary_sub_version_str == READ_FAIL_ERR_CODE: + sub_version_str = main_sub_version_str + else: + sub_version_str = "{}-{}".format(main_sub_version_str, secondary_sub_version_str) + + out_file_dir = os.path.dirname(SUB_VERSION_FILE) + if len(out_file_dir) != 0: + cmd = "mkdir -p %s" % out_file_dir + exec_os_cmd(cmd) + with open(SUB_VERSION_FILE, "w") as fd: + fd.write(sub_version_str.lower()) + exec_os_cmd("sync") + + +def run(): + ret = platform_base_init() + if ret is False: + platform_base_finish() + return + load_driver() + generate_sub_version() + unload_driver() + platform_base_finish() + + +if __name__ == '__main__': + log_message("enter platform base main") + run() diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/cpo/service/cpo_daemon.service b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/cpo/service/cpo_daemon.service new file mode 100755 index 00000000000..8a6267ca2ae --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/cpo/service/cpo_daemon.service @@ -0,0 +1,13 @@ +[Unit] +Description=cpo_daemon service +After=platform_driver.service + +[Service] +ExecStart=/usr/local/bin/cpo_daemon.sh start +ExecStop=/usr/local/bin/cpo_daemon.sh stop +KillMode=process +Restart=on-failure +RestartSec=60s + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/cpo/service/oe_voltage_setting.service b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/cpo/service/oe_voltage_setting.service new file mode 100644 index 00000000000..4c562f6b343 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/cpo/service/oe_voltage_setting.service @@ -0,0 +1,11 @@ +[Unit] +Description= +Requires=platform_driver.service +After=platform_driver.service + +[Service] +Type=oneshot +ExecStart=/usr/local/bin/oe_voltage_setting.py + +[Install] +WantedBy=multi-user.target \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/hal-config/x86_64_micas_m2_w6940_128x1_fr4_r0_0x40d9_device.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/hal-config/x86_64_micas_m2_w6940_128x1_fr4_r0_0x40d9_device.py new file mode 100755 index 00000000000..5ed478c016f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/hal-config/x86_64_micas_m2_w6940_128x1_fr4_r0_0x40d9_device.py @@ -0,0 +1,3847 @@ +#!/usr/bin/python3 + +# CPO build3 configuration file + +psu_fan_airflow = { + "intake": ['DLK3000AN12C31', 'CRPS3000CL', 'ECDL3000123'], + "exhaust": [] +} + +fanairflow = { + "intake": ['M2EFAN V-F'], + "exhaust": [], +} + +psu_display_name = { + "PA3000I-F": ['DLK3000AN12C31', 'CRPS3000CL', 'ECDL3000123'], +} + +psutypedecode = { + 0x00: 'N/A', + 0x01: 'AC', + 0x02: 'DC', +} + +class Unit: + Temperature = "C" + Voltage = "V" + Current = "A" + Power = "W" + Speed = "RPM" + +class threshold: + PSU_TEMP_MIN = -5 * 1000 + PSU_TEMP_MAX = 55 * 1000 + + PSU_FAN_SPEED_MIN = 3500 + PSU_FAN_SPEED_MAX = 32950 + + PSU_OUTPUT_VOLTAGE_MIN = 11 * 1000 + PSU_OUTPUT_VOLTAGE_MAX = 13 * 1000 + + PSU_AC_INPUT_VOLTAGE_MIN = 90 * 1000 + PSU_AC_INPUT_VOLTAGE_MAX = 264 * 1000 + + PSU_DC_INPUT_VOLTAGE_MIN = 180 * 1000 + PSU_DC_INPUT_VOLTAGE_MAX = 320 * 1000 + + ERR_VALUE = -9999999 + + PSU_OUTPUT_POWER_MIN = 0 * 1000 * 1000 + PSU_OUTPUT_POWER_MAX = 3000 * 1000 * 1000 + + PSU_INPUT_POWER_MIN = 0 * 1000 * 1000 + PSU_INPUT_POWER_MAX = 3100 * 1000 * 1000 + + PSU_OUTPUT_CURRENT_MIN = 0 * 1000 + PSU_OUTPUT_CURRENT_MAX = 246 * 1000 + + PSU_INPUT_CURRENT_MIN = 0 * 1000 + PSU_INPUT_CURRENT_MAX = 20 * 1000 + + FRONT_FAN_SPEED_MAX = 11700 + REAR_FAN_SPEED_MAX = 10200 + FAN_SPEED_MIN = 2000 + +devices = { + "onie_e2": [ + { + "name": "ONIE_E2", + "e2loc": {"loc": "/sys/bus/i2c/devices/1-0056/eeprom", "way": "sysfs"}, + "airflow": "intake" + }, + ], + "psus": [ + { + "e2loc": {"loc": "/sys/bus/i2c/devices/11-0050/eeprom", "way": "sysfs"}, + "pmbusloc": {"bus": 11, "addr": 0x58, "way": "i2c"}, + "present": {"loc": "/sys/s3ip/psu/psu1/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "name": "PSU1", + "psu_display_name": psu_display_name, + "psu_display_name": psu_display_name, + "airflow": psu_fan_airflow, + "TempStatus": {"bus": 11, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0004}, + "Temperature": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-11/11-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": threshold.PSU_TEMP_MIN, + "Max": threshold.PSU_TEMP_MAX, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + }, + "FanStatus": {"bus": 11, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0400}, + "FanSpeed": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-11/11-0058/hwmon/hwmon*/fan1_input", "way": "sysfs"}, + "Min": threshold.PSU_FAN_SPEED_MIN, + "Max": threshold.PSU_FAN_SPEED_MAX, + "Unit": Unit.Speed + }, + "psu_fan_tolerance": 40, + "InputsStatus": {"bus": 11, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x2000}, + "InputsType": {"bus": 11, "addr": 0x58, "offset": 0x80, "way": "i2c", 'psutypedecode': psutypedecode}, + "InputsVoltage": { + 'AC': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-11/11-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": threshold.PSU_AC_INPUT_VOLTAGE_MIN, + "Max": threshold.PSU_AC_INPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + + }, + 'DC': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-11/11-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": threshold.PSU_DC_INPUT_VOLTAGE_MIN, + "Max": threshold.PSU_DC_INPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + }, + 'other': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-11/11-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": threshold.ERR_VALUE, + "Max": threshold.ERR_VALUE, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + } + }, + "InputsCurrent": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-11/11-0058/hwmon/hwmon*/curr1_input", "way": "sysfs"}, + "Min": threshold.PSU_INPUT_CURRENT_MIN, + "Max": threshold.PSU_INPUT_CURRENT_MAX, + "Unit": Unit.Current, + "format": "float(float(%s)/1000)" + }, + "InputsPower": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-11/11-0058/hwmon/hwmon*/power1_input", "way": "sysfs"}, + "Min": threshold.PSU_INPUT_POWER_MIN, + "Max": threshold.PSU_INPUT_POWER_MAX, + "Unit": Unit.Power, + "format": "float(float(%s)/1000000)" + }, + "OutputsStatus": {"bus": 11, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x8800}, + "OutputsVoltage": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-11/11-0058/hwmon/hwmon*/in2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_VOLTAGE_MIN, + "Max": threshold.PSU_OUTPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + }, + "OutputsCurrent": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-11/11-0058/hwmon/hwmon*/curr2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_CURRENT_MIN, + "Max": threshold.PSU_OUTPUT_CURRENT_MAX, + "Unit": Unit.Current, + "format": "float(float(%s)/1000)" + }, + "OutputsPower": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-11/11-0058/hwmon/hwmon*/power2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_POWER_MIN, + "Max": threshold.PSU_OUTPUT_POWER_MAX, + "Unit": Unit.Power, + "format": "float(float(%s)/1000000)" + }, + }, + { + "e2loc": {"loc": "/sys/bus/i2c/devices/10-0050/eeprom", "way": "sysfs"}, + "pmbusloc": {"bus": 10, "addr": 0x58, "way": "i2c"}, + "present": {"loc": "/sys/s3ip/psu/psu2/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "name": "PSU2", + "psu_display_name": psu_display_name, + "airflow": psu_fan_airflow, + "TempStatus": {"bus": 10, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0004}, + "Temperature": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-10/10-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": threshold.PSU_TEMP_MIN, + "Max": threshold.PSU_TEMP_MAX, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + }, + "FanStatus": {"bus": 10, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0400}, + "FanSpeed": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-10/10-0058/hwmon/hwmon*/fan1_input", "way": "sysfs"}, + "Min": threshold.PSU_FAN_SPEED_MIN, + "Max": threshold.PSU_FAN_SPEED_MAX, + "Unit": Unit.Speed + }, + "psu_fan_tolerance": 40, + "InputsStatus": {"bus":10, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x2000}, + "InputsType": {"bus": 10, "addr": 0x58, "offset": 0x80, "way": "i2c", 'psutypedecode': psutypedecode}, + "InputsVoltage": { + 'AC': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-10/10-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": threshold.PSU_AC_INPUT_VOLTAGE_MIN, + "Max": threshold.PSU_AC_INPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + + }, + 'DC': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-10/10-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": threshold.PSU_DC_INPUT_VOLTAGE_MIN, + "Max": threshold.PSU_DC_INPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + }, + 'other': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-10/10-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": threshold.ERR_VALUE, + "Max": threshold.ERR_VALUE, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + } + }, + "InputsCurrent": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-10/10-0058/hwmon/hwmon*/curr1_input", "way": "sysfs"}, + "Min": threshold.PSU_INPUT_CURRENT_MIN, + "Max": threshold.PSU_INPUT_CURRENT_MAX, + "Unit": Unit.Current, + "format": "float(float(%s)/1000)" + }, + "InputsPower": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-10/10-0058/hwmon/hwmon*/power1_input", "way": "sysfs"}, + "Min": threshold.PSU_INPUT_POWER_MIN, + "Max": threshold.PSU_INPUT_POWER_MAX, + "Unit": Unit.Power, + "format": "float(float(%s)/1000000)" + }, + "OutputsStatus": {"bus": 10, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x8800}, + "OutputsVoltage": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-10/10-0058/hwmon/hwmon*/in2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_VOLTAGE_MIN, + "Max": threshold.PSU_OUTPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + }, + "OutputsCurrent": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-10/10-0058/hwmon/hwmon*/curr2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_CURRENT_MIN, + "Max": threshold.PSU_OUTPUT_CURRENT_MAX, + "Unit": Unit.Current, + "format": "float(float(%s)/1000)" + }, + "OutputsPower": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-10/10-0058/hwmon/hwmon*/power2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_POWER_MIN, + "Max": threshold.PSU_OUTPUT_POWER_MAX, + "Unit": Unit.Power, + "format": "float(float(%s)/1000000)" + }, + }, + ], + "temps": [ + { + "name": "CPU_TEMP", + "temp_id": "TEMP1", + "api_name": "CPU", + "Temperature": { + "value": {"loc": "/sys/bus/platform/devices/coretemp.0/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": -30000, + "Low": -10000, + "High": 95000, + "Max": 99000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "INLET_TEMP", + "temp_id": "TEMP2", + "api_name": "Inlet", + "Temperature": { + "value": {"loc": "/sys/bus/i2c/devices/35-004d/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": -37000, + "Low": -27000, + "High": 50000, + "Max": 55000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)-1" + } + }, + { + "name": "OUTLET_TEMP", + "temp_id": "TEMP3", + "api_name": "Outlet", + "Temperature": { + "value": [ + {"loc": "/sys/bus/i2c/devices/8-0048/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + {"loc": "/sys/bus/i2c/devices/8-0049/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + {"loc": "/sys/bus/i2c/devices/9-0048/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + {"loc": "/sys/bus/i2c/devices/9-0049/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + ], + "Min": -30000, + "Low": -20000, + "High": 70000, + "Max": 75000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "BOARD_TEMP", + "temp_id": "TEMP4", + "api_name": "Board", + "Temperature": { + "value": {"loc": "/sys/bus/i2c/devices/14-0048/hwmon/*/temp1_input", "way": "sysfs"}, + "Min": -30000, + "Low": -10000, + "High": 70000, + "Max": 75000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "SWITCH_TEMP", + "temp_id": "TEMP5", + "api_name": "ASIC_TEMP", + "Temperature": { + "value": {"loc": "/sys/s3ip/temp_sensor/temp2/value", "way": "sysfs"}, + "Min": -30000, + "Low": -20000, + "High": 100000, + "Max": 105000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + }, + "invalid": -100000, + "error": -99999, + }, + { + "name": "PSU1_TEMP", + "temp_id": "TEMP6", + "Temperature": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-11/11-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": -10000, + "Low": -5000, + "High": 50000, + "Max": 55000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "PSU2_TEMP", + "temp_id": "TEMP7", + "Temperature": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-10/10-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": -10000, + "Low": -5000, + "High": 50000, + "Max": 55000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "OE_TEMP", + "temp_id": "TEMP8", + "api_name": "OE_TEMP", + "Temperature": { + "value": {"loc": "/etc/sonic/highest_oe_temp", "way": "sysfs", "flock_path": "/etc/sonic/highest_oe_temp"}, + "Min": -30000, + "Low": -20000, + "High": 95000, + "Max": 100000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + }, + "invalid": -100000, + "error": -99999, + }, + { + "name": "RLM_TEMP", + "temp_id": "TEMP9", + "api_name": "RLM_TEMP", + "Temperature": { + "value": {"loc": "/etc/sonic/highest_rlm_temp", "way": "sysfs", "flock_path": "/etc/sonic/highest_rlm_temp"}, + "Min": -40000, + "Low": -30000, + "High": 50000, + "Max": 55000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + }, + "invalid": -100000, + "error": -99999, + }, + { + "name": "MOS_TEMP", + "temp_id": "TEMP10", + "api_name": "MOSFET_TEMP", + "Temperature": { + "value": {"loc": "/sys/bus/i2c/devices/64-0040/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": -30000, + "Low": -20000, + "High": 110000, + "Max": 125000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "Tout-Tin", + "Temperature": { + "value": { + "val_conf_list": [ + {"loc": "/sys/bus/i2c/devices/8-0048/hwmon/hwmon*/temp1_input", "way": "sysfs", "fail_val":-99999000}, + {"loc": "/sys/bus/i2c/devices/8-0049/hwmon/hwmon*/temp1_input", "way": "sysfs", "fail_val":-99999000}, + {"loc": "/sys/bus/i2c/devices/9-0048/hwmon/hwmon*/temp1_input", "way": "sysfs", "fail_val":-99999000}, + {"loc": "/sys/bus/i2c/devices/9-0049/hwmon/hwmon*/temp1_input", "way": "sysfs", "fail_val":-99999000}, + {"loc": "/sys/bus/i2c/devices/35-004d/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + ], + "fail_conf_set_list": [ + {0,1,2,3}, + ], + "format": "float(float(max(%s,%s,%s,%s)-float(%s))/1000)+3" + }, + #"Min": -10000, + #"Low": 0, + "High": 15000, + "Max": 20000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + ], + "leds": [ + { + "name": "FRONT_SYS_LED", + "led_type": "SYS_LED", + "led": {"loc": "/dev/cpld1", "offset": 0x50, "len": 1, "way": "devfile"}, + "led_attrs": { + "off": 0x00, "green": 0x02, "amber": 0x06, "red": 0x06, "mask": 0x07, + "flash": 0x01, "amber_flash": 0x05, + }, + "led_map": { + 0x00: "off", 0x02: "blue", 0x06: "amber", 0x01: "blue/amber alternate flashing", + 0x05: "amber flashing" + } + }, + { + "name": "FRONT_PSU_LED", + "led_type": "PSU_LED", + "led": {"loc": "/dev/cpld1", "offset": 0x51, "len": 1, "way": "devfile"}, + "led_attrs": { + "off": 0x00, "green": 0x02, "amber": 0x06, "red": 0x06, "mask": 0x07 + }, + "led_map": { + 0x00: "off", 0x02: "blue", 0x06: "amber" + } + }, + { + "name": "FRONT_SMB_LED", + "led_type": "SMB_LED", + + "led": {"loc": "/dev/cpld1", "offset": 0x52, "len": 1, "way": "devfile"}, + "led_attrs": { + "off": 0x00, "green": 0x02, "amber": 0x06, "red": 0x06, "mask": 0x07 + }, + "led_map": { + 0x00: "off", 0x02: "blue", 0x06: "amber" + } + }, + { + "name": "FRONT_FAN_LED", + "led_type": "FAN_LED", + "led": {"loc": "/dev/cpld1", "offset": 0x53, "len": 1, "way": "devfile"}, + "led_attrs": { + "off": 0x00, "green": 0x02, "amber": 0x06, "red": 0x06, "mask": 0x07 + }, + "led_map": { + 0x00: "off", 0x02: "blue", 0x06: "amber" + } + }, + ], + "fans": [ + { + "name": "FAN7", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-43/43-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "e2_type": ["wedge_v5", "fru"], + "present": {"loc": "/sys/s3ip/fan/fan7/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"bus": 44, "addr": 0x0d, "offset": 0x60, "way": "i2c"}, + "led_attrs": { + "off": 0x00, "green": 0x06, "amber": 0x01, "red": 0x01, "mask": 0x07 + }, + "led_map": { + 0x00: "off", 0x06: "blue", 0x01: "amber" + }, + "PowerMax": 80.64, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"bus": 44, "addr": 0x0d, "offset": 0x90, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan7/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan7/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan7/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"bus": 44, "addr": 0x0d, "offset": 0x90, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan7/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan7/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan7/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN5", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-42/42-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "e2_type": ["wedge_v5", "fru"], + "present": {"loc": "/sys/s3ip/fan/fan5/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"bus": 44, "addr": 0x0d, "offset": 0x61, "way": "i2c"}, + "led_attrs": { + "off": 0x00, "green": 0x06, "amber": 0x01, "red": 0x01, "mask": 0x07 + }, + "led_map": { + 0x00: "off", 0x06: "blue", 0x01: "amber" + }, + "PowerMax": 80.64, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"bus": 44, "addr": 0x0d, "offset": 0x91, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan5/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan5/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan5/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"bus": 44, "addr": 0x0d, "offset": 0x91, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan5/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan5/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan5/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN3", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-41/41-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "e2_type": ["wedge_v5", "fru"], + "present": {"loc": "/sys/s3ip/fan/fan3/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"bus": 44, "addr": 0x0d, "offset": 0x62, "way": "i2c"}, + "led_attrs": { + "off": 0x00, "green": 0x06, "amber": 0x01, "red": 0x01, "mask": 0x07 + }, + "led_map": { + 0x00: "off", 0x06: "blue", 0x01: "amber" + }, + "PowerMax": 80.64, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"bus": 44, "addr": 0x0d, "offset": 0x92, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan3/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan3/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan3/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"bus": 44, "addr": 0x0d, "offset": 0x92, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan3/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan3/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan3/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN1", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-40/40-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "e2_type": ["wedge_v5", "fru"], + "present": {"loc": "/sys/s3ip/fan/fan1/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"bus": 44, "addr": 0x0d, "offset": 0x63, "way": "i2c"}, + "led_attrs": { + "off": 0x00, "green": 0x06, "amber": 0x01, "red": 0x01, "mask": 0x07 + }, + "led_map": { + 0x00: "off", 0x06: "blue", 0x01: "amber" + }, + "PowerMax": 80.64, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"bus": 44, "addr": 0x0d, "offset": 0x93, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan1/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan1/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan1/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"bus": 44, "addr": 0x0d, "offset": 0x93, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan1/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan1/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan1/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN8", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-51/51-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "e2_type": ["wedge_v5", "fru"], + "present": {"loc": "/sys/s3ip/fan/fan8/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"bus": 52, "addr": 0x0d, "offset": 0x60, "way": "i2c"}, + "led_attrs": { + "off": 0x00, "green": 0x06, "amber": 0x01, "red": 0x01, "mask": 0x07 + }, + "led_map": { + 0x00: "off", 0x06: "blue", 0x01: "amber" + }, + "PowerMax": 80.64, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"bus": 52, "addr": 0x0d, "offset": 0x90, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan8/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan8/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan8/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"bus": 52, "addr": 0x0d, "offset": 0x90, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan8/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan8/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan8/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN6", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-50/50-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "e2_type": ["wedge_v5", "fru"], + "present": {"loc": "/sys/s3ip/fan/fan6/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"bus": 52, "addr": 0x0d, "offset": 0x61, "way": "i2c"}, + "led_attrs": { + "off": 0x00, "green": 0x06, "amber": 0x01, "red": 0x01, "mask": 0x07 + }, + "led_map": { + 0x00: "off", 0x06: "blue", 0x01: "amber" + }, + "PowerMax": 80.64, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"bus": 52, "addr": 0x0d, "offset": 0x91, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan6/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan6/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan6/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"bus": 52, "addr": 0x0d, "offset": 0x91, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan6/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan6/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan6/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN4", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-49/49-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "e2_type": ["wedge_v5", "fru"], + "present": {"loc": "/sys/s3ip/fan/fan4/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"bus": 52, "addr": 0x0d, "offset": 0x62, "way": "i2c"}, + "led_attrs": { + "off": 0x00, "green": 0x06, "amber": 0x01, "red": 0x01, "mask": 0x07 + }, + "led_map": { + 0x00: "off", 0x06: "blue", 0x01: "amber" + }, + "PowerMax": 80.64, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"bus": 52, "addr": 0x0d, "offset": 0x92, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan4/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan4/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan4/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"bus": 52, "addr": 0x0d, "offset": 0x92, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan4/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan4/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan4/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN2", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-48/48-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "e2_type": ["wedge_v5", "fru"], + "present": {"loc": "/sys/s3ip/fan/fan2/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"bus": 52, "addr": 0x0d, "offset": 0x63, "way": "i2c"}, + "led_attrs": { + "off": 0x00, "green": 0x06, "amber": 0x01, "red": 0x01, "mask": 0x07 + }, + "led_map": { + 0x00: "off", 0x06: "blue", 0x01: "amber" + }, + "PowerMax": 80.64, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"bus": 52, "addr": 0x0d, "offset": 0x93, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan2/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan2/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan2/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"bus": 52, "addr": 0x0d, "offset": 0x93, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan2/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan2/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan2/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + ], + "cplds": [ + { + "name": "CPU CPLD", + "cpld_id": "CPLD1", + "VersionFile": {"loc": "/dev/cpld0", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for system power", + "slot": 0, + "warm": 0, + }, + { + "name": "SCM CPLD", + "cpld_id": "CPLD2", + "VersionFile": {"loc": "/dev/cpld1", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for base functions", + "slot": 0, + "warm": 0, + }, + { + "name": "MCB CPLD", + "cpld_id": "CPLD3", + "VersionFile": {"loc": "/dev/cpld3", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for base functions", + "slot": 0, + "warm": 0, + }, + { + "name": "SMB CPLD", + "cpld_id": "CPLD4", + "VersionFile": {"loc": "/dev/cpld4", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for sff modules", + "slot": 0, + "warm": 0, + }, + { + "name": "FCB_T CPLD", + "cpld_id": "CPLD5", + "VersionFile": {"loc": "/dev/cpld5", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for fan modules", + "slot": 0, + "warm": 0, + }, + { + "name": "FCB_B CPLD", + "cpld_id": "CPLD6", + "VersionFile": {"loc": "/dev/cpld6", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for fan modules", + "slot": 0, + "warm": 0, + }, + { + "name": "IOB FPGA", + "cpld_id": "CPLD7", + "VersionFile": {"loc": "/dev/fpga0", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for base functions", + "slot": 0, + "format": "little_endian", + "warm": 0, + }, + { + "name": "DOM FPGA", + "cpld_id": "CPLD8", + "VersionFile": {"loc": "/dev/fpga1", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for sff functions", + "slot": 0, + "format": "little_endian", + "warm": 0, + }, + { + "name": "BIOS", + "cpld_id": "CPLD9", + "VersionFile": {"cmd": "dmidecode -s bios-version", "way": "cmd"}, + "desc": "Performs initialization of hardware components during booting", + "slot": 0, + "type": "str", + "warm": 0, + }, + ], + "dcdc": [ + { + "name": "SCM_53134O_V1.0_V", + "dcdc_id": "DCDC1", + "Min": 900, + "value": { + "loc": "/sys/bus/i2c/devices/33-0040/hwmon/hwmon*/in1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 1100, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SCM_I210_V3.3_V", + "dcdc_id": "DCDC2", + "Min": 2970, + "value": { + "loc": "/sys/bus/i2c/devices/33-0040/hwmon/hwmon*/in2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 3630, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SCM_VDD3.3_V", + "dcdc_id": "DCDC3", + "Min": 2970, + "value": { + "loc": "/sys/bus/i2c/devices/33-0040/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 3630, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SCM_VDD12.0_V", + "dcdc_id": "DCDC4", + "Min": 10800, + "value": { + "loc": "/sys/bus/i2c/devices/33-0041/hwmon/hwmon*/in1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 13200, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SCM_OCM_V12.0_V", + "dcdc_id": "DCDC5", + "Min": 10800, + "value": { + "loc": "/sys/bus/i2c/devices/33-0041/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 13200, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SCM_SSD_V3.3_V", + "dcdc_id": "DCDC6", + "Min": 2970, + "value": { + "loc": "/sys/bus/i2c/devices/33-0042/hwmon/hwmon*/in1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 3630, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SCM_BMC_V3.3_V", + "dcdc_id": "DCDC7", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/33-0042/hwmon/hwmon*/in2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 3630, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SCM_VDD5.0_V", + "dcdc_id": "DCDC8", + "Min": 4500, + "value": { + "loc": "/sys/bus/i2c/devices/33-0042/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 5500, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MAC_CORE_V", + "dcdc_id": "DCDC9", + "Min": 630, + "value": { + "loc": "/sys/bus/i2c/devices/64-0040/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 858, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MAC_ANALOG0 V0.9_V", + "dcdc_id": "DCDC10", + "Min": 810, + "value": { + "loc": "/sys/bus/i2c/devices/65-0040/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + 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"OE7_AVDD_RX_1.2_C", + "dcdc_id": "DCDC170", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/67-006e/hwmon/hwmon*/loopb_iout", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 5100, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OE7_AVDD_TX_1.8_C", + "dcdc_id": "DCDC171", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/67-0066/hwmon/hwmon*/loopa_iout", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 10000, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OE7_AVDD_TX_1.2_C", + "dcdc_id": "DCDC172", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/67-0066/hwmon/hwmon*/loopb_iout", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 9000, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OE7_AVDD_TRX_0.75_C", + "dcdc_id": "DCDC173", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/67-005e/hwmon/hwmon*/loopa_iout", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 9500, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OE_HCSL_PLL_VDD2.5_C", + "dcdc_id": "DCDC174", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/59-0040/hwmon/hwmon*/curr2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 2000, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OE_VDD_1.8_C", + "dcdc_id": "DCDC175", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/59-0040/hwmon/hwmon*/curr3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 550, + "format": "float(float(%s)/1000)", + }, + + { + "name": "RLML_VDD V3.3_C", + "dcdc_id": "DCDC176", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/71-0068/hwmon/hwmon*/loopa_iout", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 30000, + "format": "float(float(%s)/1000)", + }, + + { + "name": "RLMH_VDD V3.3_C", + "dcdc_id": "DCDC177", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/71-0068/hwmon/hwmon*/loopb_iout", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 30000, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SMB_CLK_VDD3.3_C", + "dcdc_id": "DCDC178", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/59-0040/hwmon/hwmon*/curr1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 1100, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SMB_CLK2_VDD1.8_C", + "dcdc_id": "DCDC179", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/56-0041/hwmon/hwmon*/curr3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 1100, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SMB_CLK_VDD1.8_C", + "dcdc_id": "DCDC180", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/56-0041/hwmon/hwmon*/curr2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 1100, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SMB_FPGA_VDD1.8_C", + "dcdc_id": "DCDC181", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/62-0040/hwmon/hwmon*/curr3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 550, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SMB_VDD_5.0_C", + "dcdc_id": "DCDC182", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/60-0040/hwmon/hwmon*/curr2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 3300, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SMB_FPGA_V1.0_C", + "dcdc_id": "DCDC183", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/62-0040/hwmon/hwmon*/curr2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 1188, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SMB_FPGA_V1.2_C", + "dcdc_id": "DCDC184", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/57-0040/hwmon/hwmon*/curr1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 550, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SMB_VDD_3.3_C", + "dcdc_id": "DCDC185", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/63-0040/hwmon/hwmon*/curr1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 1550, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SMB_CPLD_VDD_1.8_C", + "dcdc_id": "DCDC186", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/63-0040/hwmon/hwmon*/curr2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 330, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MCB_FPGA_VDD1.0_C", + "dcdc_id": "DCDC187", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/12-0040/hwmon/hwmon*/curr1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 1188, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MCB_FPGA_VDD1.8_C", + "dcdc_id": "DCDC188", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/12-0040/hwmon/hwmon*/curr2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 550, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MCB_FPGA_VDD1.2_C", + "dcdc_id": "DCDC189", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/12-0040/hwmon/hwmon*/curr3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 550, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MCB_CPLD_VDD3.3_C", + "dcdc_id": "DCDC190", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/12-0041/hwmon/hwmon*/curr1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 550, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MCB_VDD3.3_C", + "dcdc_id": "DCDC191", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/12-0041/hwmon/hwmon*/curr2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 550, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MCB_FPGA_VDD3.3_C", + "dcdc_id": "DCDC192", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/12-0041/hwmon/hwmon*/curr3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 550, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OCM_XDPE_VCCIN_C", + "dcdc_id": "DCDC193", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/5-0070/hwmon/hwmon*/loopa_iout", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 147000, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OCM_XDPE_P1V8_C", + "dcdc_id": "DCDC194", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/5-0070/hwmon/hwmon*/loopb_iout", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 2300, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OCM_XDPE_P1V05_C", + "dcdc_id": "DCDC195", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/5-006e/hwmon/hwmon*/loopa_iout", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 14300, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OCM_XDPE_VNN_PCH_C", + "dcdc_id": "DCDC196", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/5-006e/hwmon/hwmon*/loopb_iout", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 7400, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OCM_XDPE_VNN_NAC_C", + "dcdc_id": "DCDC197", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/5-0068/hwmon/hwmon*/loopa_iout", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 22000, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OCM_XDPE_VCC_ANA_C", + "dcdc_id": "DCDC198", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/5-0068/hwmon/hwmon*/loopb_iout", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 2210, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OCM_XDPE_P1V2_VDDQ_C", + "dcdc_id": "DCDC199", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/5-005e/hwmon/hwmon*/loopa_iout", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 19000, + "format": "float(float(%s)/1000)", + }, + + { + "name": "FAN1_VDD12_C", + "dcdc_id": "DCDC200", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/88-0042/hwmon/hwmon*/curr1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 10000, + "format": "float(float(%s)/1000)", + }, + + { + "name": "FAN2_VDD12_C", + "dcdc_id": "DCDC201", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/89-0042/hwmon/hwmon*/curr2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 10000, + "format": "float(float(%s)/1000)", + }, + + { + "name": "FAN3_VDD12_C", + "dcdc_id": "DCDC202", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/88-0042/hwmon/hwmon*/curr2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 10000, + "format": "float(float(%s)/1000)", + }, + + { + "name": "FAN4_VDD12_C", + "dcdc_id": "DCDC203", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/89-0042/hwmon/hwmon*/curr3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 10000, + "format": "float(float(%s)/1000)", + }, + + { + "name": "FAN5_VDD12_C", + "dcdc_id": "DCDC204", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/88-0042/hwmon/hwmon*/curr3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 10000, + "format": "float(float(%s)/1000)", + }, + + { + "name": "FAN6_VDD12_C", + "dcdc_id": "DCDC205", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/90-0042/hwmon/hwmon*/curr1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 10000, + "format": "float(float(%s)/1000)", + }, + + { + "name": "FAN7_VDD12_C", + "dcdc_id": "DCDC206", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/89-0042/hwmon/hwmon*/curr1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 10000, + "format": "float(float(%s)/1000)", + }, + + { + "name": "FAN8_VDD12_C", + "dcdc_id": "DCDC207", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/90-0042/hwmon/hwmon*/curr2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 10000, + "format": "float(float(%s)/1000)", + }, + ], + "cpu": [ + { + "name": "cpu", + "reboot_cause_path": "/etc/sonic/.reboot/.previous-reboot-cause.txt" + } + ], + "sfps": { + "ver": '3.0', + "port_index_start": 1, + "port_num": 128, + "log_level": 2, + "eeprom_retry_times": 5, + "eeprom_retry_break_sec": 0.2, + "presence_val_is_present": 0, + "eeprom_path": "/sys/bus/i2c/devices/i2c-%d/%d-0050/eeprom", + "eeprom_path_key": [24] * 16 + [25] * 16 + [26] * 16 + [27] * 16 + [28] * 16 + [29] * 16 + [30] * 16 + [31] * 16 + } +} diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/hal-config/x86_64_micas_m2_w6940_128x1_fr4_r0_0x40d9_v01_ac_device.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/hal-config/x86_64_micas_m2_w6940_128x1_fr4_r0_0x40d9_v01_ac_device.py new file mode 100755 index 00000000000..f503ec9166c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/hal-config/x86_64_micas_m2_w6940_128x1_fr4_r0_0x40d9_v01_ac_device.py @@ -0,0 +1,3960 @@ +#!/usr/bin/python3 + +# CPO 100 board modified configuration, support 2 AC PSUS + +psu_fan_airflow = { + "intake": ['DLK3000AN12C31', 'CRPS3000CL', 'ECDL3000123', 'ECD26020050'], + "exhaust": [] +} + +fanairflow = { + "intake": ['M2EFAN V-F'], + "exhaust": [], +} + +psu_display_name = { + "PA3000I-F": ['DLK3000AN12C31', 'CRPS3000CL', 'ECDL3000123'], + "PD3000I-F": ['ECD26020050'] +} + +psutypedecode = { + 0x00: 'N/A', + 0x01: 'AC', + 0x02: 'DC', +} + +class Unit: + Temperature = "C" + Voltage = "V" + Current = "A" + Power = "W" + Speed = "RPM" + +class threshold: + PSU_TEMP_MIN = -5 * 1000 + PSU_TEMP_MAX = 55 * 1000 + + PSU_FAN_SPEED_MIN = 3500 + PSU_FAN_SPEED_MAX = 32950 + + PSU_OUTPUT_VOLTAGE_MIN = 11 * 1000 + PSU_OUTPUT_VOLTAGE_MAX = 13 * 1000 + + PSU_AC_INPUT_VOLTAGE_MIN = 90 * 1000 + PSU_AC_INPUT_VOLTAGE_MAX = 264 * 1000 + + PSU_DC_INPUT_VOLTAGE_MIN = 180 * 1000 + PSU_DC_INPUT_VOLTAGE_MAX = 320 * 1000 + + PSU_DC_INPUT_VOLTAGE_MIN_2 = 45 * 1000 + PSU_DC_INPUT_VOLTAGE_MAX_2 = 53 * 1000 + + ERR_VALUE = -9999999 + + PSU_OUTPUT_POWER_MIN = 0 * 1000 * 1000 + PSU_OUTPUT_POWER_MAX = 3000 * 1000 * 1000 + + PSU_INPUT_POWER_MIN = 0 * 1000 * 1000 + PSU_INPUT_POWER_MAX = 3100 * 1000 * 1000 + + PSU_OUTPUT_CURRENT_MIN = 0 * 1000 + PSU_OUTPUT_CURRENT_MAX = 246 * 1000 + + PSU_DC_OUTPUT_CURRENT_MAX = 250 * 1000 + + PSU_INPUT_CURRENT_MIN = 0 * 1000 + PSU_INPUT_CURRENT_MAX = 20 * 1000 + + PSU_DC_INPUT_CURRENT_MAX = 80 * 1000 + + FRONT_FAN_SPEED_MAX = 11700 + REAR_FAN_SPEED_MAX = 10200 + FAN_SPEED_MIN = 2000 + +devices = { + "onie_e2": [ + { + "name": "ONIE_E2", + "e2loc": {"loc": "/sys/bus/i2c/devices/1-0056/eeprom", "way": "sysfs"}, + "airflow": "intake" + }, + ], + "psus": [ + { + "e2loc": {"loc": "/sys/bus/i2c/devices/11-0050/eeprom", "way": "sysfs"}, + "e2_type": ["wedge_v5", "fru"], + "pmbusloc": {"bus": 11, "addr": 0x58, "way": "i2c"}, + "present": {"loc": "/sys/s3ip/psu/psu1/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "name": "PSU1", + "psu_display_name": psu_display_name, + "psu_display_name": psu_display_name, + "airflow": psu_fan_airflow, + "TempStatus": {"bus": 11, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0004}, + "Temperature": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-11/11-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": threshold.PSU_TEMP_MIN, + "Max": threshold.PSU_TEMP_MAX, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + }, + "FanStatus": {"bus": 11, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0400}, + "FanSpeed": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-11/11-0058/hwmon/hwmon*/fan1_input", "way": "sysfs"}, + "Min": threshold.PSU_FAN_SPEED_MIN, + "Max": threshold.PSU_FAN_SPEED_MAX, + "Unit": Unit.Speed + }, + "psu_fan_tolerance": 40, + "InputsStatus": {"bus": 11, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x2000}, + "InputsType": {"bus": 11, "addr": 0x58, "offset": 0x80, "way": "i2c", 'psutypedecode': psutypedecode}, + "InputsVoltage": { + 'AC': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-11/11-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": threshold.PSU_AC_INPUT_VOLTAGE_MIN, + "Max": threshold.PSU_AC_INPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + + }, + 'DC': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-11/11-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": { + "other": threshold.PSU_DC_INPUT_VOLTAGE_MIN, + "ECD26020050": threshold.PSU_DC_INPUT_VOLTAGE_MIN_2, + }, + "Max": { + "other": threshold.PSU_DC_INPUT_VOLTAGE_MAX, + "ECD26020050": threshold.PSU_DC_INPUT_VOLTAGE_MAX_2, + }, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + }, + 'other': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-11/11-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": threshold.ERR_VALUE, + "Max": threshold.ERR_VALUE, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + } + }, + "InputsCurrent": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-11/11-0058/hwmon/hwmon*/curr1_input", "way": "sysfs"}, + "Min": threshold.PSU_INPUT_CURRENT_MIN, + "Max": { + "other":threshold.PSU_INPUT_CURRENT_MAX, + "ECD26020050":threshold.PSU_DC_INPUT_CURRENT_MAX, + }, + "Unit": Unit.Current, + "format": "float(float(%s)/1000)" + }, + "InputsPower": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-11/11-0058/hwmon/hwmon*/power1_input", "way": "sysfs"}, + "Min": threshold.PSU_INPUT_POWER_MIN, + "Max": threshold.PSU_INPUT_POWER_MAX, + "Unit": Unit.Power, + "format": "float(float(%s)/1000000)" + }, + "OutputsStatus": {"bus": 11, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x8800}, + "OutputsVoltage": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-11/11-0058/hwmon/hwmon*/in2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_VOLTAGE_MIN, + "Max": threshold.PSU_OUTPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + }, + "OutputsCurrent": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-11/11-0058/hwmon/hwmon*/curr2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_CURRENT_MIN, + "Max": { + "other":threshold.PSU_OUTPUT_CURRENT_MAX, + "ECD26020050":threshold.PSU_DC_OUTPUT_CURRENT_MAX, + }, + "Unit": Unit.Current, + "format": "float(float(%s)/1000)" + }, + "OutputsPower": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-11/11-0058/hwmon/hwmon*/power2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_POWER_MIN, + "Max": threshold.PSU_OUTPUT_POWER_MAX, + "Unit": Unit.Power, + "format": "float(float(%s)/1000000)" + }, + }, + { + "e2loc": {"loc": "/sys/bus/i2c/devices/10-0050/eeprom", "way": "sysfs"}, + "e2_type": ["wedge_v5", "fru"], + "pmbusloc": {"bus": 10, "addr": 0x58, "way": "i2c"}, + "present": {"loc": "/sys/s3ip/psu/psu2/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "name": "PSU2", + "psu_display_name": psu_display_name, + "airflow": psu_fan_airflow, + "TempStatus": {"bus": 10, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0004}, + "Temperature": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-10/10-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": threshold.PSU_TEMP_MIN, + "Max": threshold.PSU_TEMP_MAX, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + }, + "FanStatus": {"bus": 10, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0400}, + "FanSpeed": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-10/10-0058/hwmon/hwmon*/fan1_input", "way": "sysfs"}, + "Min": threshold.PSU_FAN_SPEED_MIN, + "Max": threshold.PSU_FAN_SPEED_MAX, + "Unit": Unit.Speed + }, + "psu_fan_tolerance": 40, + "InputsStatus": {"bus":10, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x2000}, + "InputsType": {"bus": 10, "addr": 0x58, "offset": 0x80, "way": "i2c", 'psutypedecode': psutypedecode}, + "InputsVoltage": { + 'AC': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-10/10-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": threshold.PSU_AC_INPUT_VOLTAGE_MIN, + "Max": threshold.PSU_AC_INPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + + }, + 'DC': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-10/10-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": { + "other": threshold.PSU_DC_INPUT_VOLTAGE_MIN, + "ECD26020050": threshold.PSU_DC_INPUT_VOLTAGE_MIN_2, + }, + "Max": { + "other": threshold.PSU_DC_INPUT_VOLTAGE_MAX, + "ECD26020050": threshold.PSU_DC_INPUT_VOLTAGE_MAX_2, + }, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + }, + 'other': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-10/10-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": threshold.ERR_VALUE, + "Max": threshold.ERR_VALUE, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + } + }, + "InputsCurrent": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-10/10-0058/hwmon/hwmon*/curr1_input", "way": "sysfs"}, + "Min": threshold.PSU_INPUT_CURRENT_MIN, + "Max": { + "other":threshold.PSU_INPUT_CURRENT_MAX, + "ECD26020050":threshold.PSU_DC_INPUT_CURRENT_MAX, + }, + "Unit": Unit.Current, + "format": "float(float(%s)/1000)" + }, + "InputsPower": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-10/10-0058/hwmon/hwmon*/power1_input", "way": "sysfs"}, + "Min": threshold.PSU_INPUT_POWER_MIN, + "Max": threshold.PSU_INPUT_POWER_MAX, + "Unit": Unit.Power, + "format": "float(float(%s)/1000000)" + }, + "OutputsStatus": {"bus": 10, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x8800}, + "OutputsVoltage": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-10/10-0058/hwmon/hwmon*/in2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_VOLTAGE_MIN, + "Max": threshold.PSU_OUTPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + }, + "OutputsCurrent": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-10/10-0058/hwmon/hwmon*/curr2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_CURRENT_MIN, + "Max": { + "other":threshold.PSU_OUTPUT_CURRENT_MAX, + "ECD26020050":threshold.PSU_DC_OUTPUT_CURRENT_MAX, + }, + "Unit": Unit.Current, + "format": "float(float(%s)/1000)" + }, + "OutputsPower": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-10/10-0058/hwmon/hwmon*/power2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_POWER_MIN, + "Max": threshold.PSU_OUTPUT_POWER_MAX, + "Unit": Unit.Power, + "format": "float(float(%s)/1000000)" + }, + }, + ], + "temps": [ + { + "name": "CPU_TEMP", + "temp_id": "TEMP1", + "api_name": "CPU", + "Temperature": { + "value": {"loc": "/sys/bus/platform/devices/coretemp.0/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": -30000, + "Low": -10000, + "High": 95000, + "Max": 99000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "INLET_TEMP", + "temp_id": "TEMP2", + "api_name": "Inlet", + "Temperature": { + "value": {"loc": "/sys/bus/i2c/devices/35-004d/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": -37000, + "Low": -27000, + "High": 50000, + "Max": 55000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)-1" + } + }, + { + "name": "OUTLET_TEMP", + "temp_id": "TEMP3", + "api_name": "Outlet", + "Temperature": { + "value": [ + {"loc": "/sys/bus/i2c/devices/8-0048/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + {"loc": "/sys/bus/i2c/devices/8-0049/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + {"loc": "/sys/bus/i2c/devices/9-0048/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + {"loc": "/sys/bus/i2c/devices/9-0049/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + ], + "Min": -30000, + "Low": -20000, + "High": 70000, + "Max": 75000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "BOARD_TEMP", + "temp_id": "TEMP4", + "api_name": "Board", + "Temperature": { + "value": {"loc": "/sys/bus/i2c/devices/14-0048/hwmon/*/temp1_input", "way": "sysfs"}, + "Min": -30000, + "Low": -10000, + "High": 70000, + "Max": 75000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "SWITCH_TEMP", + "temp_id": "TEMP5", + "api_name": "ASIC_TEMP", + "Temperature": { + "value": {"loc": "/sys/s3ip/temp_sensor/temp2/value", "way": "sysfs"}, + "Min": -30000, + "Low": -20000, + "High": 100000, + "Max": 105000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + }, + "invalid": -100000, + "error": -99999, + }, + { + "name": "PSU1_TEMP", + "temp_id": "TEMP6", + "Temperature": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-11/11-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": -10000, + "Low": -5000, + "High": 50000, + "Max": 55000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "PSU2_TEMP", + "temp_id": "TEMP7", + "Temperature": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-10/10-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": -10000, + "Low": -5000, + "High": 50000, + "Max": 55000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "OE_TEMP", + "temp_id": "TEMP8", + "api_name": "OE_TEMP", + "Temperature": { + "value": {"loc": "/etc/sonic/highest_oe_temp", "way": "sysfs", "flock_path": "/etc/sonic/highest_oe_temp"}, + "Min": -30000, + "Low": -20000, + "High": 95000, + "Max": 100000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + }, + "invalid": -100000, + "error": -99999, + }, + { + "name": "RLM_TEMP", + "temp_id": "TEMP9", + "api_name": "RLM_TEMP", + "Temperature": { + "value": {"loc": "/etc/sonic/highest_rlm_temp", "way": "sysfs", "flock_path": "/etc/sonic/highest_rlm_temp"}, + "Min": -40000, + "Low": -30000, + "High": 50000, + "Max": 55000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + }, + "invalid": -100000, + "error": -99999, + }, + { + "name": "MOS_TEMP", + "temp_id": "TEMP10", + "api_name": "MOSFET_TEMP", + "Temperature": { + "value": {"loc": "/sys/bus/i2c/devices/64-0040/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": -30000, + "Low": -20000, + "High": 110000, + "Max": 125000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "Tout-Tin", + "Temperature": { + "value": { + "val_conf_list": [ + {"loc": "/sys/bus/i2c/devices/8-0048/hwmon/hwmon*/temp1_input", "way": "sysfs", "fail_val":-99999000}, + {"loc": "/sys/bus/i2c/devices/8-0049/hwmon/hwmon*/temp1_input", "way": "sysfs", "fail_val":-99999000}, + {"loc": "/sys/bus/i2c/devices/9-0048/hwmon/hwmon*/temp1_input", "way": "sysfs", "fail_val":-99999000}, + {"loc": "/sys/bus/i2c/devices/9-0049/hwmon/hwmon*/temp1_input", "way": "sysfs", "fail_val":-99999000}, + {"loc": "/sys/bus/i2c/devices/35-004d/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + ], + "fail_conf_set_list": [ + {0,1,2,3}, + ], + "format": "float(float(max(%s,%s,%s,%s)-float(%s))/1000)+3" + }, + #"Min": -10000, + #"Low": 0, + "High": 15000, + "Max": 20000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + ], + "leds": [ + { + "name": "FRONT_SYS_LED", + "led_type": "SYS_LED", + "led": {"loc": "/dev/cpld1", "offset": 0x50, "len": 1, "way": "devfile"}, + "led_attrs": { + "off": 0x00, "green": 0x02, "amber": 0x06, "red": 0x06, "mask": 0x07, + "flash": 0x01, "amber_flash": 0x05, + }, + "led_map": { + 0x00: "off", 0x02: "blue", 0x06: "amber", 0x01: "blue/amber alternate flashing", + 0x05: "amber flashing" + } + }, + { + "name": "FRONT_PSU_LED", + "led_type": "PSU_LED", + "led": {"loc": "/dev/cpld1", "offset": 0x51, "len": 1, "way": "devfile"}, + "led_attrs": { + "off": 0x00, "green": 0x02, "amber": 0x06, "red": 0x06, "mask": 0x07 + }, + "led_map": { + 0x00: "off", 0x02: "blue", 0x06: "amber" + } + }, + { + "name": "FRONT_SMB_LED", + "led_type": "SMB_LED", + + "led": {"loc": "/dev/cpld1", "offset": 0x53, "len": 1, "way": "devfile"}, + "led_attrs": { + "off": 0x00, "green": 0x02, "amber": 0x06, "red": 0x06, "mask": 0x07 + }, + "led_map": { + 0x00: "off", 0x02: "blue", 0x06: "amber" + } + }, + { + "name": "FRONT_FAN_LED", + "led_type": "FAN_LED", + "led": {"loc": "/dev/cpld1", "offset": 0x52, "len": 1, "way": "devfile"}, + "led_attrs": { + "off": 0x00, "green": 0x02, "amber": 0x06, "red": 0x06, "mask": 0x07 + }, + "led_map": { + 0x00: "off", 0x02: "blue", 0x06: "amber" + } + }, + { + "name": "SCM_FRU_LED", + "led_type": "SMB_LED", + "led": {"loc": "/dev/cpld1", "offset": 0x54, "len": 1, "way": "devfile"}, + "led_attrs": { + "off": 0x00, "green": 0x02, "amber": 0x06, "red": 0x06, "mask": 0x07, + "amber_flash": 0x05, + }, + "led_map": { + 0x00: "off", 0x02: "blue", 0x06: "amber", 0x05: "amber flashing" + } + }, + { + "name": "SMB_FRU_LED", + "led_type": "SMB_LED", + "led": {"loc": "/dev/fpga1", "offset": 0x2c, "len": 1, "way": "devfile"}, + "led_attrs": { + "off": 0x07, "green": 0x03, "amber": 0x04, "red": 0x04, "mask": 0xf, + "amber_flash": 0x0c, + }, + "led_map": { + 0x07: "off", 0x03: "blue", 0x04: "amber", 0x0c: "amber flashing" + } + }, + ], + "fans": [ + { + "name": "FAN7", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-43/43-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "e2_type": ["wedge_v5", "fru"], + "present": {"loc": "/sys/s3ip/fan/fan7/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"bus": 44, "addr": 0x0d, "offset": 0x60, "way": "i2c"}, + "led_attrs": { + "off": 0x00, "green": 0x06, "amber": 0x01, "red": 0x01, "mask": 0x07 + }, + "led_map": { + 0x00: "off", 0x06: "blue", 0x01: "amber" + }, + "PowerMax": 80.64, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"bus": 44, "addr": 0x0d, "offset": 0x90, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan7/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan7/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan7/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"bus": 44, "addr": 0x0d, "offset": 0x90, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan7/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan7/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan7/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN5", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-42/42-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "e2_type": ["wedge_v5", "fru"], + "present": {"loc": "/sys/s3ip/fan/fan5/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"bus": 44, "addr": 0x0d, "offset": 0x61, "way": "i2c"}, + "led_attrs": { + "off": 0x00, "green": 0x06, "amber": 0x01, "red": 0x01, "mask": 0x07 + }, + "led_map": { + 0x00: "off", 0x06: "blue", 0x01: "amber" + }, + "PowerMax": 80.64, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"bus": 44, "addr": 0x0d, "offset": 0x91, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan5/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan5/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan5/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"bus": 44, "addr": 0x0d, "offset": 0x91, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan5/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan5/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan5/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN3", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-41/41-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "e2_type": ["wedge_v5", "fru"], + "present": {"loc": "/sys/s3ip/fan/fan3/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"bus": 44, "addr": 0x0d, "offset": 0x62, "way": "i2c"}, + "led_attrs": { + "off": 0x00, "green": 0x06, "amber": 0x01, "red": 0x01, "mask": 0x07 + }, + "led_map": { + 0x00: "off", 0x06: "blue", 0x01: "amber" + }, + "PowerMax": 80.64, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"bus": 44, "addr": 0x0d, "offset": 0x92, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan3/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan3/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan3/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"bus": 44, "addr": 0x0d, "offset": 0x92, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan3/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan3/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan3/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN1", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-40/40-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "e2_type": ["wedge_v5", "fru"], + "present": {"loc": "/sys/s3ip/fan/fan1/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"bus": 44, "addr": 0x0d, "offset": 0x63, "way": "i2c"}, + "led_attrs": { + "off": 0x00, "green": 0x06, "amber": 0x01, "red": 0x01, "mask": 0x07 + }, + "led_map": { + 0x00: "off", 0x06: "blue", 0x01: "amber" + }, + "PowerMax": 80.64, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"bus": 44, "addr": 0x0d, "offset": 0x93, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan1/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan1/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan1/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"bus": 44, "addr": 0x0d, "offset": 0x93, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan1/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan1/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan1/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN8", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-51/51-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "e2_type": ["wedge_v5", "fru"], + "present": {"loc": "/sys/s3ip/fan/fan8/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"bus": 52, "addr": 0x0d, "offset": 0x60, "way": "i2c"}, + "led_attrs": { + "off": 0x00, "green": 0x06, "amber": 0x01, "red": 0x01, "mask": 0x07 + }, + "led_map": { + 0x00: "off", 0x06: "blue", 0x01: "amber" + }, + "PowerMax": 80.64, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"bus": 52, "addr": 0x0d, "offset": 0x90, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan8/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan8/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan8/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"bus": 52, "addr": 0x0d, "offset": 0x90, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan8/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan8/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan8/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN6", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-50/50-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "e2_type": ["wedge_v5", "fru"], + "present": {"loc": "/sys/s3ip/fan/fan6/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"bus": 52, "addr": 0x0d, "offset": 0x61, "way": "i2c"}, + "led_attrs": { + "off": 0x00, "green": 0x06, "amber": 0x01, "red": 0x01, "mask": 0x07 + }, + "led_map": { + 0x00: "off", 0x06: "blue", 0x01: "amber" + }, + "PowerMax": 80.64, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"bus": 52, "addr": 0x0d, "offset": 0x91, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan6/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan6/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan6/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"bus": 52, "addr": 0x0d, "offset": 0x91, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan6/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan6/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan6/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN4", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-49/49-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "e2_type": ["wedge_v5", "fru"], + "present": {"loc": "/sys/s3ip/fan/fan4/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"bus": 52, "addr": 0x0d, "offset": 0x62, "way": "i2c"}, + "led_attrs": { + "off": 0x00, "green": 0x06, "amber": 0x01, "red": 0x01, "mask": 0x07 + }, + "led_map": { + 0x00: "off", 0x06: "blue", 0x01: "amber" + }, + "PowerMax": 80.64, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"bus": 52, "addr": 0x0d, "offset": 0x92, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan4/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan4/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan4/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"bus": 52, "addr": 0x0d, "offset": 0x92, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan4/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan4/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan4/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN2", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-48/48-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "e2_type": ["wedge_v5", "fru"], + "present": {"loc": "/sys/s3ip/fan/fan2/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"bus": 52, "addr": 0x0d, "offset": 0x63, "way": "i2c"}, + "led_attrs": { + "off": 0x00, "green": 0x06, "amber": 0x01, "red": 0x01, "mask": 0x07 + }, + "led_map": { + 0x00: "off", 0x06: "blue", 0x01: "amber" + }, + "PowerMax": 80.64, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"bus": 52, "addr": 0x0d, "offset": 0x93, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan2/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan2/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan2/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"bus": 52, "addr": 0x0d, "offset": 0x93, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan2/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan2/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan2/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + ], + "cplds": [ + { + "name": "CPU CPLD", + "cpld_id": "CPLD1", + "VersionFile": {"loc": "/dev/cpld0", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for system power", + "slot": 0, + "warm": 0, + }, + { + "name": "SCM CPLD", + "cpld_id": "CPLD2", + "VersionFile": {"loc": "/dev/cpld1", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for base functions", + "slot": 0, + "warm": 0, + }, + { + "name": "MCB CPLD", + "cpld_id": "CPLD3", + "VersionFile": {"loc": "/dev/cpld3", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for base functions", + "slot": 0, + "warm": 0, + }, + { + "name": "SMB CPLD", + "cpld_id": "CPLD4", + "VersionFile": {"loc": "/dev/cpld4", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for sff modules", + "slot": 0, + "warm": 0, + }, + { + "name": "FCB_T CPLD", + "cpld_id": "CPLD5", + "VersionFile": {"loc": "/dev/cpld5", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for fan modules", + "slot": 0, + "warm": 0, + }, + { + "name": "FCB_B CPLD", + "cpld_id": "CPLD6", + "VersionFile": {"loc": "/dev/cpld6", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for fan modules", + "slot": 0, + "warm": 0, + }, + { + "name": "IOB FPGA", + "cpld_id": "CPLD7", + "VersionFile": {"loc": "/dev/fpga0", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for base functions", + "slot": 0, + "format": "little_endian", + "warm": 0, + }, + { + "name": "DOM FPGA", + "cpld_id": "CPLD8", + "VersionFile": {"loc": "/dev/fpga1", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for sff functions", + "slot": 0, + "format": "little_endian", + "warm": 0, + }, + { + "name": "BIOS", + "cpld_id": "CPLD9", + "VersionFile": {"cmd": "dmidecode -s bios-version", "way": "cmd"}, + "desc": "Performs initialization of hardware components during booting", + "slot": 0, + "type": "str", + "warm": 0, + }, + ], + "dcdc": [ + { + "name": "SCM_53134O_V1.0_V", + "dcdc_id": "DCDC1", + "Min": 900, + "value": { + "loc": "/sys/bus/i2c/devices/33-0040/hwmon/hwmon*/in1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 1100, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SCM_I210_V3.3_V", + "dcdc_id": "DCDC2", + "Min": 2970, + "value": { + "loc": "/sys/bus/i2c/devices/33-0040/hwmon/hwmon*/in2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 3630, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SCM_VDD3.3_V", + "dcdc_id": "DCDC3", + "Min": 2970, + "value": { + "loc": "/sys/bus/i2c/devices/33-0040/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 3630, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SCM_VDD12.0_V", + "dcdc_id": "DCDC4", + "Min": 10800, + "value": { + "loc": "/sys/bus/i2c/devices/33-0041/hwmon/hwmon*/in1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 13200, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SCM_OCM_V12.0_V", + "dcdc_id": "DCDC5", + "Min": 10800, + "value": { + "loc": "/sys/bus/i2c/devices/33-0041/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 13200, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SCM_SSD_V3.3_V", + "dcdc_id": "DCDC6", + "Min": 2970, + "value": { + "loc": "/sys/bus/i2c/devices/33-0042/hwmon/hwmon*/in1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 3630, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SCM_BMC_V3.3_V", + "dcdc_id": "DCDC7", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/33-0042/hwmon/hwmon*/in2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 3630, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SCM_VDD5.0_V", + "dcdc_id": "DCDC8", + "Min": 4500, + "value": { + "loc": "/sys/bus/i2c/devices/33-0042/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 5500, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MAC_CORE_V", + "dcdc_id": "DCDC9", + "Min": 630, + "value": { + "loc": "/sys/bus/i2c/devices/64-0040/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 858, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MAC_ANALOG0 V0.9_V", + "dcdc_id": "DCDC10", + "Min": 810, + "value": { + "loc": "/sys/bus/i2c/devices/65-0040/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 990, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MAC_ANALOG0 V0.75_V", + "dcdc_id": "DCDC11", + "Min": 675, + "value": { + "loc": "/sys/bus/i2c/devices/65-0040/hwmon/hwmon*/in4_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 825, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MAC_ANALOG1 V0.9_V", + "dcdc_id": "DCDC12", + "Min": 810, + "value": { + "loc": "/sys/bus/i2c/devices/66-0040/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 990, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MAC_ANALOG1 V0.75_V", + "dcdc_id": "DCDC13", + "Min": 675, + "value": { + "loc": "/sys/bus/i2c/devices/66-0040/hwmon/hwmon*/in4_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 825, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MAC_PLL0_VDD0.9_V", + "dcdc_id": "DCDC14", + "Min": 810, + "value": { + "loc": "/sys/bus/i2c/devices/56-0040/hwmon/hwmon*/in1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 990, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MAC_PLL1_VDD0.9_V", + "dcdc_id": "DCDC15", + "Min": 810, + "value": { + "loc": "/sys/bus/i2c/devices/56-0040/hwmon/hwmon*/in2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 990, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MAC_PLL2_VDD0.9_V", + "dcdc_id": "DCDC16", + "Min": 810, + "value": { + "loc": "/sys/bus/i2c/devices/61-0040/hwmon/hwmon*/in2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 990, + "format": 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"/sys/bus/i2c/devices/62-0040/hwmon/hwmon*/curr3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 550, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SMB_VDD_5.0_C", + "dcdc_id": "DCDC182", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/60-0040/hwmon/hwmon*/curr2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 3300, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SMB_FPGA_V1.0_C", + "dcdc_id": "DCDC183", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/62-0040/hwmon/hwmon*/curr2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 1188, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SMB_FPGA_V1.2_C", + "dcdc_id": "DCDC184", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/57-0040/hwmon/hwmon*/curr1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 550, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SMB_VDD_3.3_C", + "dcdc_id": "DCDC185", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/63-0040/hwmon/hwmon*/curr1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 1550, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SMB_CPLD_VDD_1.8_C", + "dcdc_id": "DCDC186", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/63-0040/hwmon/hwmon*/curr2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 330, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MCB_FPGA_VDD1.0_C", + "dcdc_id": "DCDC187", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/12-0040/hwmon/hwmon*/curr1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 1188, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MCB_FPGA_VDD1.8_C", + "dcdc_id": "DCDC188", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/12-0040/hwmon/hwmon*/curr2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 550, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MCB_FPGA_VDD1.2_C", + "dcdc_id": "DCDC189", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/12-0040/hwmon/hwmon*/curr3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 550, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MCB_CPLD_VDD3.3_C", + "dcdc_id": "DCDC190", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/12-0041/hwmon/hwmon*/curr1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 550, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MCB_VDD3.3_C", + "dcdc_id": "DCDC191", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/12-0041/hwmon/hwmon*/curr2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 550, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MCB_FPGA_VDD3.3_C", + "dcdc_id": "DCDC192", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/12-0041/hwmon/hwmon*/curr3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 550, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MCB_LEDL_VDD3.3_C", + "dcdc_id": "DCDC210", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/91-0042/hwmon/hwmon*/curr1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 1200, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MCB_LEDR_VDD3.3_C", + "dcdc_id": "DCDC211", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/91-0042/hwmon/hwmon*/curr2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 1200, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OCM_XDPE_VCCIN_C", + "dcdc_id": "DCDC193", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/5-0070/hwmon/hwmon*/loopa_iout", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 147000, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OCM_XDPE_P1V8_C", + "dcdc_id": "DCDC194", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/5-0070/hwmon/hwmon*/loopb_iout", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 2300, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OCM_XDPE_P1V05_C", + "dcdc_id": "DCDC195", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/5-006e/hwmon/hwmon*/loopa_iout", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 14300, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OCM_XDPE_VNN_PCH_C", + "dcdc_id": "DCDC196", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/5-006e/hwmon/hwmon*/loopb_iout", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 7400, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OCM_XDPE_VNN_NAC_C", + "dcdc_id": "DCDC197", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/5-0068/hwmon/hwmon*/loopa_iout", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 22000, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OCM_XDPE_VCC_ANA_C", + "dcdc_id": "DCDC198", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/5-0068/hwmon/hwmon*/loopb_iout", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 2210, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OCM_XDPE_P1V2_VDDQ_C", + "dcdc_id": "DCDC199", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/5-005e/hwmon/hwmon*/loopa_iout", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 19000, + "format": "float(float(%s)/1000)", + }, + + { + "name": "FAN1_VDD12_C", + "dcdc_id": "DCDC200", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/88-0042/hwmon/hwmon*/curr1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 10000, + "format": "float(float(%s)/1000)", + }, + + { + "name": "FAN2_VDD12_C", + "dcdc_id": "DCDC201", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/89-0042/hwmon/hwmon*/curr2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 10000, + "format": "float(float(%s)/1000)", + }, + + { + "name": "FAN3_VDD12_C", + "dcdc_id": "DCDC202", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/88-0042/hwmon/hwmon*/curr2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 10000, + "format": "float(float(%s)/1000)", + }, + + { + "name": "FAN4_VDD12_C", + "dcdc_id": "DCDC203", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/89-0042/hwmon/hwmon*/curr3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 10000, + "format": "float(float(%s)/1000)", + }, + + { + "name": "FAN5_VDD12_C", + "dcdc_id": "DCDC204", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/88-0042/hwmon/hwmon*/curr3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 10000, + "format": "float(float(%s)/1000)", + }, + + { + "name": "FAN6_VDD12_C", + "dcdc_id": "DCDC205", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/90-0042/hwmon/hwmon*/curr1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 10000, + "format": "float(float(%s)/1000)", + }, + + { + "name": "FAN7_VDD12_C", + "dcdc_id": "DCDC206", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/89-0042/hwmon/hwmon*/curr1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 10000, + "format": "float(float(%s)/1000)", + }, + + { + "name": "FAN8_VDD12_C", + "dcdc_id": "DCDC207", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/90-0042/hwmon/hwmon*/curr2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 10000, + "format": "float(float(%s)/1000)", + }, + ], + "cpu": [ + { + "name": "cpu", + "reboot_cause_path": "/etc/sonic/.reboot/.previous-reboot-cause.txt" + } + ], + "sfps": { + "ver": '3.0', + "port_index_start": 1, + "port_num": 128, + "log_level": 2, + "eeprom_retry_times": 5, + "eeprom_retry_break_sec": 0.2, + "presence_val_is_present": 0, + "eeprom_path": "/sys/bus/i2c/devices/i2c-%d/%d-0050/eeprom", + "eeprom_path_key": [24] * 16 + [25] * 16 + [26] * 16 + [27] * 16 + [28] * 16 + [29] * 16 + [30] * 16 + [31] * 16 + } +} diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/hal-config/x86_64_micas_m2_w6940_128x1_fr4_r0_0x40d9_v01_ac_monitor.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/hal-config/x86_64_micas_m2_w6940_128x1_fr4_r0_0x40d9_v01_ac_monitor.py new file mode 100755 index 00000000000..10bd281d0ee --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/hal-config/x86_64_micas_m2_w6940_128x1_fr4_r0_0x40d9_v01_ac_monitor.py @@ -0,0 +1,239 @@ +# coding:utf-8 + + +monitor = { + "openloop": { + "linear": { + "name": "linear", + "flag": 0, + "pwm_min": 0x66, + "pwm_max": 0xcc, + "K": 11, + "tin_min": 38, + }, + "curve": { + "name": "curve", + "flag": 1, + "pwm_min": 0x66, + "pwm_max": 0xcc, + "a": -0.0249, + "b": 8.1615, + "c": -60.326, + "tin_min": 25, + }, + }, + + "pid": { + "CPU_TEMP": { + "name": "CPU_TEMP", + "flag": 1, + "type": "duty", + "pwm_min": 0x66, + "pwm_max": 0xcc, + "Kp": 0.8, + "Ki": 0.4, + "Kd": 0.3, + "target": 85, + "value": [None, None, None], + }, + "SWITCH_TEMP": { + "name": "SWITCH_TEMP", + "flag": 1, + "type": "duty", + "pwm_min": 0x66, + "pwm_max": 0xcc, + "Kp": 1.5, + "Ki": 1, + "Kd": 0.3, + "target": 80, + "value": [None, None, None], + }, + "OUTLET_TEMP": { + "name": "OUTLET_TEMP", + "flag": 1, + "type": "duty", + "pwm_min": 0x66, + "pwm_max": 0xcc, + "Kp": 2, + "Ki": 0.4, + "Kd": 0.3, + "target": 65, + "value": [None, None, None], + }, + "RLM_TEMP": { + "name": "RLM_TEMP", + "flag": 1, + "type": "duty", + "pwm_min": 0x66, + "pwm_max": 0xcc, + "Kp": 0.1, + "Ki": 0.4, + "Kd": 0, + "target": 40, + "value": [None, None, None], + }, + "BOARD_TEMP": { + "name": "BOARD_TEMP", + "flag": 1, + "type": "duty", + "pwm_min": 0x66, + "pwm_max": 0xcc, + "Kp": 2, + "Ki": 0.4, + "Kd": 0.3, + "target": 65, + "value": [None, None, None], + }, + "MOS_TEMP": { + "name": "MOS_TEMP", + "flag": 1, + "type": "duty", + "pwm_min": 0x66, + "pwm_max": 0xcc, + "Kp": 1, + "Ki": 0.4, + "Kd": 0.3, + "target": 85, + "value": [None, None, None], + }, + "Tout-Tin": { + "name": "Tout-Tin", + "flag": 0, + "type": "duty", + "pwm_min": 0x66, + "pwm_max": 0xcc, + "Kp": 8, + "Ki": 0.1, + "Kd": 0.4, + "target": 12, + "value": [None, None, None], + }, + "OE_TEMP": { + "name": "OE_TEMP", + "flag": 1, + "type": "duty", + "pwm_min": 0x66, # 40%(0x66 = 102, 102/255=0.4) + "pwm_max": 0xcc, # 80%(0xcc = 204, 204/255=0.8) + "Kp": 1.5, + "Ki": 1, + "Kd": 0.3, + "target": 85, + "value": [None, None, None], + } + }, + + "temps_threshold": { + "SWITCH_TEMP": {"name": "SWITCH_TEMP", "warning": 100, "critical": 105, "invalid": -100000, "error": -99999}, + "INLET_TEMP": {"name": "INLET_TEMP", "warning": 50, "critical": 55}, + "OUTLET_TEMP": {"name": "OUTLET_TEMP", "warning": 70, "critical": 75}, + "CPU_TEMP": {"name": "CPU_TEMP", "warning": 95, "critical": 99}, + "RLM_TEMP": {"name": "RLM_TEMP", "warning": 50, "critical": 55, "invalid": -100000, "error": -99999}, + #"Tout-Tin": {"name": "Tout-Tin", "warning": 15, "critical": 20}, + "OE_TEMP": {"name": "OE_TEMP", "warning": 95, "critical": 100, "invalid": -100000, "error": -99999}, + "BOARD_TEMP": {"name": "BOARD_TEMP", "warning": 70, "critical": 75}, + "MOS_TEMP": {"name": "MOS_TEMP", "warning": 110, "critical": 125}, + }, + + "fancontrol_para": { + "interval": 5, + "max_pwm": 0xff, + "min_pwm": 0x66, + "abnormal_pwm": 0xcc, + "warning_pwm": 0xcc, + "critical_pwm": 0xcc, + "temp_invalid_pid_pwm": 0x66, + "temp_error_pid_pwm": 0x66, + "temp_fail_num": 3, + "check_temp_fail": [ + {"temp_name": "INLET_TEMP"}, + {"temp_name": "SWITCH_TEMP"}, + {"temp_name": "CPU_TEMP"}, + {"temp_name": "MOS_TEMP"}, + {"temp_name": "BOARD_TEMP"}, + {"temp_name": "OUTLET_TEMP"}, + {"temp_name": "OE_TEMP"}, + ], + "check_temp_critical_reboot": [ + ["SWITCH_TEMP"], + ["OE_TEMP"], + ["INLET_TEMP", "OUTLET_TEMP", "CPU_TEMP", "RLM_TEMP", "BOARD_TEMP", "MOS_TEMP"], + ], + "temp_warning_num": 3, # temp over warning 3 times continuously + "temp_critical_num": 3, # temp over critical 3 times continuously + "temp_warning_countdown": 60, # 5 min warning speed after not warning + "temp_critical_countdown": 60, # 5 min full speed after not critical + "rotor_error_count": 6, # fan rotor error 6 times continuously + "inlet_mac_diff": 999, + "check_crit_reboot_flag": 1, + "check_crit_reboot_num": 3, + "check_crit_sleep_time": 20, + "psu_fan_control": 1, + "psu_absent_fullspeed_num": 0xFF, + "fan_absent_fullspeed_num": 1, + "rotor_error_fullspeed_num": 1, + "deal_over_temp_reboot_cmd": [ + {"way": "devfile", "loc": "/dev/cpld5", "offset": 0x22, "value": [0x00]}, # disable fan watchdog + {"way": "devfile", "loc": "/dev/cpld6", "offset": 0x22, "value": [0x00]}, # disable fan watchdog + {"way": "devfile", "loc": "/dev/cpld1", "offset": 0x15, "value": [0x0c]}, # cpu powroff + ], + "deal_over_temp_reboot_pwm": 0x80, # set pwm=50% + }, + + "ledcontrol_para": { + "interval": 5, + "checkpsu": 1, # 0: sys led don't follow psu led + "checkfan": 1, # 0: sys led don't follow fan led + "checksmb": 1, # 0: sys led don't follow smb led + "psu_amber_num": 2, + "psu_green_num": 0, # only psuerrnum <= this, psu led will be set green + "fan_amber_num": 1, + "sysled_check_temp": 0, + "sysled_check_fw_up": 1, + "smbled_ctrl": 1, + "board_sys_led": [ + {"led_name": "FRONT_SYS_LED"}, + ], + "board_psu_led": [ + {"led_name": "FRONT_PSU_LED"}, + ], + "board_fan_led": [ + {"led_name": "FRONT_FAN_LED"}, + ], + "board_smb_led": [ + {"led_name": "SMB_FRU_LED"}, + ], + "board_smb_fru_led": [ + {"led_name": "FRONT_SMB_LED"}, + ], + "board_smb_fru_dcdc_sensors": [ + "^MAC_", "^OE", "^RLM", "^SMB_", + ], + "board_smb_fru_temps": [ + "SWITCH_TEMP", "BOARD_TEMP", "MOS_TEMP", "OE_TEMP", "RLM_TEMP", + ], + "board_scm_fru_led": [ + {"led_name": "SCM_FRU_LED"}, + ], + "board_scm_fru_dcdc_sensors": [ + "^SCM_", "^OCM_", + ], + "board_scm_fru_temps": [ + "CPU_TEMP", "INLET_TEMP", + ], + "psu_air_flow_monitor": 0, + "fan_air_flow_monitor": 0, + "psu_air_flow_amber_num": 0, + "fan_air_flow_amber_num": 0, + }, + + "fw_upgrade_check": [ + [ + {"gettype": "file_exist", "judge_file": "/etc/sonic/.doing_fw_upg", "okval": True}, + ], + ], + + "otp_reboot_judge_file": { + "otp_switch_reboot_judge_file": "/etc/.otp_switch_reboot_flag", + "otp_other_reboot_judge_file": "/etc/.otp_other_reboot_flag", + }, +} diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/hal-config/x86_64_micas_m2_w6940_128x1_fr4_r0_0x40d9_v01_dc_device.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/hal-config/x86_64_micas_m2_w6940_128x1_fr4_r0_0x40d9_v01_dc_device.py new file mode 100755 index 00000000000..6c5781bca5f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/hal-config/x86_64_micas_m2_w6940_128x1_fr4_r0_0x40d9_v01_dc_device.py @@ -0,0 +1,3947 @@ +#!/usr/bin/python3 + +# CPO 100 board modified configuration, support 1 DC PSU + +psu_fan_airflow = { + "intake": ['DLK3000AN12C31', 'CRPS3000CL', 'ECDL3000123', 'ECD26020050'], + "exhaust": [] +} + +fanairflow = { + "intake": ['M2EFAN V-F'], + "exhaust": [], +} + +psu_display_name = { + "PA3000I-F": ['DLK3000AN12C31', 'CRPS3000CL', 'ECDL3000123'], + "PD3000I-F": ['ECD26020050'] +} + +psutypedecode = { + 0x00: 'N/A', + 0x01: 'AC', + 0x02: 'DC', +} + +class Unit: + Temperature = "C" + Voltage = "V" + Current = "A" + Power = "W" + Speed = "RPM" + +class threshold: + PSU_TEMP_MIN = -5 * 1000 + PSU_TEMP_MAX = 55 * 1000 + + PSU_FAN_SPEED_MIN = 3500 + PSU_FAN_SPEED_MAX = 32950 + + PSU_OUTPUT_VOLTAGE_MIN = 11 * 1000 + PSU_OUTPUT_VOLTAGE_MAX = 13 * 1000 + + PSU_AC_INPUT_VOLTAGE_MIN = 90 * 1000 + PSU_AC_INPUT_VOLTAGE_MAX = 264 * 1000 + + PSU_DC_INPUT_VOLTAGE_MIN = 180 * 1000 + PSU_DC_INPUT_VOLTAGE_MAX = 320 * 1000 + + PSU_DC_INPUT_VOLTAGE_MIN_2 = 45 * 1000 + PSU_DC_INPUT_VOLTAGE_MAX_2 = 53 * 1000 + + ERR_VALUE = -9999999 + + PSU_OUTPUT_POWER_MIN = 0 * 1000 * 1000 + PSU_OUTPUT_POWER_MAX = 3000 * 1000 * 1000 + + PSU_INPUT_POWER_MIN = 0 * 1000 * 1000 + PSU_INPUT_POWER_MAX = 3100 * 1000 * 1000 + + PSU_OUTPUT_CURRENT_MIN = 0 * 1000 + PSU_OUTPUT_CURRENT_MAX = 246 * 1000 + + PSU_DC_OUTPUT_CURRENT_MAX = 250 * 1000 + + PSU_INPUT_CURRENT_MIN = 0 * 1000 + PSU_INPUT_CURRENT_MAX = 20 * 1000 + + PSU_DC_INPUT_CURRENT_MAX = 80 * 1000 + + FRONT_FAN_SPEED_MAX = 11700 + REAR_FAN_SPEED_MAX = 10200 + FAN_SPEED_MIN = 2000 + +devices = { + "onie_e2": [ + { + "name": "ONIE_E2", + "e2loc": {"loc": "/sys/bus/i2c/devices/1-0056/eeprom", "way": "sysfs"}, + "airflow": "intake" + }, + ], + "psus": [ + { + "e2loc": {"loc": "/sys/bus/i2c/devices/11-0050/eeprom", "way": "sysfs"}, + "e2_type": ["wedge_v5", "fru"], + "pmbusloc": {"bus": 11, "addr": 0x58, "way": "i2c"}, + "present": {"loc": "/sys/s3ip/psu/psu1/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "name": "PSU1", + "psu_display_name": psu_display_name, + "psu_display_name": psu_display_name, + "airflow": psu_fan_airflow, + "TempStatus": {"bus": 11, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0004}, + "Temperature": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-11/11-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": threshold.PSU_TEMP_MIN, + "Max": threshold.PSU_TEMP_MAX, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + }, + "FanStatus": {"bus": 11, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0400}, + "FanSpeed": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-11/11-0058/hwmon/hwmon*/fan1_input", "way": "sysfs"}, + "Min": threshold.PSU_FAN_SPEED_MIN, + "Max": threshold.PSU_FAN_SPEED_MAX, + "Unit": Unit.Speed + }, + "psu_fan_tolerance": 40, + "InputsStatus": {"bus": 11, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x2000}, + "InputsType": {"bus": 11, "addr": 0x58, "offset": 0x80, "way": "i2c", 'psutypedecode': psutypedecode}, + "InputsVoltage": { + 'AC': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-11/11-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": threshold.PSU_AC_INPUT_VOLTAGE_MIN, + "Max": threshold.PSU_AC_INPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + + }, + 'DC': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-11/11-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": { + "other": threshold.PSU_DC_INPUT_VOLTAGE_MIN, + "ECD26020050": threshold.PSU_DC_INPUT_VOLTAGE_MIN_2, + }, + "Max": { + "other": threshold.PSU_DC_INPUT_VOLTAGE_MAX, + "ECD26020050": threshold.PSU_DC_INPUT_VOLTAGE_MAX_2, + }, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + }, + 'other': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-11/11-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": threshold.ERR_VALUE, + "Max": threshold.ERR_VALUE, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + } + }, + "InputsCurrent": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-11/11-0058/hwmon/hwmon*/curr1_input", "way": "sysfs"}, + "Min": threshold.PSU_INPUT_CURRENT_MIN, + "Max": { + "other":threshold.PSU_INPUT_CURRENT_MAX, + "ECD26020050":threshold.PSU_DC_INPUT_CURRENT_MAX, + }, + "Unit": Unit.Current, + "format": "float(float(%s)/1000)" + }, + "InputsPower": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-11/11-0058/hwmon/hwmon*/power1_input", "way": "sysfs"}, + "Min": threshold.PSU_INPUT_POWER_MIN, + "Max": threshold.PSU_INPUT_POWER_MAX, + "Unit": Unit.Power, + "format": "float(float(%s)/1000000)" + }, + "OutputsStatus": {"bus": 11, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x8800}, + "OutputsVoltage": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-11/11-0058/hwmon/hwmon*/in2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_VOLTAGE_MIN, + "Max": threshold.PSU_OUTPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + }, + "OutputsCurrent": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-11/11-0058/hwmon/hwmon*/curr2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_CURRENT_MIN, + "Max": { + "other":threshold.PSU_OUTPUT_CURRENT_MAX, + "ECD26020050":threshold.PSU_DC_OUTPUT_CURRENT_MAX, + }, + "Unit": Unit.Current, + "format": "float(float(%s)/1000)" + }, + "OutputsPower": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-11/11-0058/hwmon/hwmon*/power2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_POWER_MIN, + "Max": threshold.PSU_OUTPUT_POWER_MAX, + "Unit": Unit.Power, + "format": "float(float(%s)/1000000)" + }, + }, + { + "e2loc": {"loc": "/sys/bus/i2c/devices/10-0050/eeprom", "way": "sysfs"}, + "e2_type": ["wedge_v5", "fru"], + "pmbusloc": {"bus": 10, "addr": 0x58, "way": "i2c"}, + "present": {"loc": "/sys/s3ip/psu/psu2/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "name": "PSU2", + "psu_display_name": psu_display_name, + "airflow": psu_fan_airflow, + "TempStatus": {"bus": 10, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0004}, + "Temperature": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-10/10-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": threshold.PSU_TEMP_MIN, + "Max": threshold.PSU_TEMP_MAX, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + }, + "FanStatus": {"bus": 10, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0400}, + "FanSpeed": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-10/10-0058/hwmon/hwmon*/fan1_input", "way": "sysfs"}, + "Min": threshold.PSU_FAN_SPEED_MIN, + "Max": threshold.PSU_FAN_SPEED_MAX, + "Unit": Unit.Speed + }, + "psu_fan_tolerance": 40, + "InputsStatus": {"bus":10, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x2000}, + "InputsType": {"bus": 10, "addr": 0x58, "offset": 0x80, "way": "i2c", 'psutypedecode': psutypedecode}, + "InputsVoltage": { + 'AC': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-10/10-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": threshold.PSU_AC_INPUT_VOLTAGE_MIN, + "Max": threshold.PSU_AC_INPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + + }, + 'DC': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-10/10-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": { + "other": threshold.PSU_DC_INPUT_VOLTAGE_MIN, + "ECD26020050": threshold.PSU_DC_INPUT_VOLTAGE_MIN_2, + }, + "Max": { + "other": threshold.PSU_DC_INPUT_VOLTAGE_MAX, + "ECD26020050": threshold.PSU_DC_INPUT_VOLTAGE_MAX_2, + }, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + }, + 'other': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-10/10-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": threshold.ERR_VALUE, + "Max": threshold.ERR_VALUE, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + } + }, + "InputsCurrent": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-10/10-0058/hwmon/hwmon*/curr1_input", "way": "sysfs"}, + "Min": threshold.PSU_INPUT_CURRENT_MIN, + "Max": { + "other":threshold.PSU_INPUT_CURRENT_MAX, + "ECD26020050":threshold.PSU_DC_INPUT_CURRENT_MAX, + }, + "Unit": Unit.Current, + "format": "float(float(%s)/1000)" + }, + "InputsPower": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-10/10-0058/hwmon/hwmon*/power1_input", "way": "sysfs"}, + "Min": threshold.PSU_INPUT_POWER_MIN, + "Max": threshold.PSU_INPUT_POWER_MAX, + "Unit": Unit.Power, + "format": "float(float(%s)/1000000)" + }, + "OutputsStatus": {"bus": 10, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x8800}, + "OutputsVoltage": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-10/10-0058/hwmon/hwmon*/in2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_VOLTAGE_MIN, + "Max": threshold.PSU_OUTPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + }, + "OutputsCurrent": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-10/10-0058/hwmon/hwmon*/curr2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_CURRENT_MIN, + "Max": { + "other":threshold.PSU_OUTPUT_CURRENT_MAX, + "ECD26020050":threshold.PSU_DC_OUTPUT_CURRENT_MAX, + }, + "Unit": Unit.Current, + "format": "float(float(%s)/1000)" + }, + "OutputsPower": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-10/10-0058/hwmon/hwmon*/power2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_POWER_MIN, + "Max": threshold.PSU_OUTPUT_POWER_MAX, + "Unit": Unit.Power, + "format": "float(float(%s)/1000000)" + }, + }, + ], + "temps": [ + { + "name": "CPU_TEMP", + "temp_id": "TEMP1", + "api_name": "CPU", + "Temperature": { + "value": {"loc": "/sys/bus/platform/devices/coretemp.0/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": -30000, + "Low": -10000, + "High": 95000, + "Max": 99000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "INLET_TEMP", + "temp_id": "TEMP2", + "api_name": "Inlet", + "Temperature": { + "value": {"loc": "/sys/bus/i2c/devices/35-004d/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": -37000, + "Low": -27000, + "High": 50000, + "Max": 55000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)-1" + } + }, + { + "name": "OUTLET_TEMP", + "temp_id": "TEMP3", + "api_name": "Outlet", + "Temperature": { + "value": [ + {"loc": "/sys/bus/i2c/devices/8-0048/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + {"loc": "/sys/bus/i2c/devices/8-0049/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + {"loc": "/sys/bus/i2c/devices/9-0048/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + {"loc": "/sys/bus/i2c/devices/9-0049/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + ], + "Min": -30000, + "Low": -20000, + "High": 70000, + "Max": 75000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "BOARD_TEMP", + "temp_id": "TEMP4", + "api_name": "Board", + "Temperature": { + "value": {"loc": "/sys/bus/i2c/devices/14-0048/hwmon/*/temp1_input", "way": "sysfs"}, + "Min": -30000, + "Low": -10000, + "High": 70000, + "Max": 75000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "SWITCH_TEMP", + "temp_id": "TEMP5", + "api_name": "ASIC_TEMP", + "Temperature": { + "value": {"loc": "/sys/s3ip/temp_sensor/temp2/value", "way": "sysfs"}, + "Min": -30000, + "Low": -20000, + "High": 100000, + "Max": 105000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + }, + "invalid": -100000, + "error": -99999, + }, + { + "name": "PSU2_TEMP", + "temp_id": "TEMP6", + "Temperature": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-10/10-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": -10000, + "Low": -5000, + "High": 50000, + "Max": 55000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "OE_TEMP", + "temp_id": "TEMP7", + "api_name": "OE_TEMP", + "Temperature": { + "value": {"loc": "/etc/sonic/highest_oe_temp", "way": "sysfs", "flock_path": "/etc/sonic/highest_oe_temp"}, + "Min": -30000, + "Low": -20000, + "High": 95000, + "Max": 100000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + }, + "invalid": -100000, + "error": -99999, + }, + { + "name": "RLM_TEMP", + "temp_id": "TEMP8", + "api_name": "RLM_TEMP", + "Temperature": { + "value": {"loc": "/etc/sonic/highest_rlm_temp", "way": "sysfs", "flock_path": "/etc/sonic/highest_rlm_temp"}, + "Min": -40000, + "Low": -30000, + "High": 50000, + "Max": 55000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + }, + "invalid": -100000, + "error": -99999, + }, + { + "name": "MOS_TEMP", + "temp_id": "TEMP9", + "api_name": "MOSFET_TEMP", + "Temperature": { + "value": {"loc": "/sys/bus/i2c/devices/64-0040/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": -30000, + "Low": -20000, + "High": 110000, + "Max": 125000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "Tout-Tin", + "Temperature": { + "value": { + "val_conf_list": [ + {"loc": "/sys/bus/i2c/devices/8-0048/hwmon/hwmon*/temp1_input", "way": "sysfs", "fail_val":-99999000}, + {"loc": "/sys/bus/i2c/devices/8-0049/hwmon/hwmon*/temp1_input", "way": "sysfs", "fail_val":-99999000}, + {"loc": "/sys/bus/i2c/devices/9-0048/hwmon/hwmon*/temp1_input", "way": "sysfs", "fail_val":-99999000}, + {"loc": "/sys/bus/i2c/devices/9-0049/hwmon/hwmon*/temp1_input", "way": "sysfs", "fail_val":-99999000}, + {"loc": "/sys/bus/i2c/devices/35-004d/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + ], + "fail_conf_set_list": [ + {0,1,2,3}, + ], + "format": "float(float(max(%s,%s,%s,%s)-float(%s))/1000)+3" + }, + #"Min": -10000, + #"Low": 0, + "High": 15000, + "Max": 20000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + ], + "leds": [ + { + "name": "FRONT_SYS_LED", + "led_type": "SYS_LED", + "led": {"loc": "/dev/cpld1", "offset": 0x50, "len": 1, "way": "devfile"}, + "led_attrs": { + "off": 0x00, "green": 0x02, "amber": 0x06, "red": 0x06, "mask": 0x07, + "flash": 0x01, "amber_flash": 0x05, + }, + "led_map": { + 0x00: "off", 0x02: "blue", 0x06: "amber", 0x01: "blue/amber alternate flashing", + 0x05: "amber flashing" + } + }, + { + "name": "FRONT_PSU_LED", + "led_type": "PSU_LED", + "led": {"loc": "/dev/cpld1", "offset": 0x51, "len": 1, "way": "devfile"}, + "led_attrs": { + "off": 0x00, "green": 0x02, "amber": 0x06, "red": 0x06, "mask": 0x07 + }, + "led_map": { + 0x00: "off", 0x02: "blue", 0x06: "amber" + } + }, + { + "name": "FRONT_SMB_LED", + "led_type": "SMB_LED", + + "led": {"loc": "/dev/cpld1", "offset": 0x53, "len": 1, "way": "devfile"}, + "led_attrs": { + "off": 0x00, "green": 0x02, "amber": 0x06, "red": 0x06, "mask": 0x07 + }, + "led_map": { + 0x00: "off", 0x02: "blue", 0x06: "amber" + } + }, + { + "name": "FRONT_FAN_LED", + "led_type": "FAN_LED", + "led": {"loc": "/dev/cpld1", "offset": 0x52, "len": 1, "way": "devfile"}, + "led_attrs": { + "off": 0x00, "green": 0x02, "amber": 0x06, "red": 0x06, "mask": 0x07 + }, + "led_map": { + 0x00: "off", 0x02: "blue", 0x06: "amber" + } + }, + { + "name": "SCM_FRU_LED", + "led_type": "SMB_LED", + "led": {"loc": "/dev/cpld1", "offset": 0x54, "len": 1, "way": "devfile"}, + "led_attrs": { + "off": 0x00, "green": 0x02, "amber": 0x06, "red": 0x06, "mask": 0x07, + "amber_flash": 0x05, + }, + "led_map": { + 0x00: "off", 0x02: "blue", 0x06: "amber", 0x05: "amber flashing" + } + }, + { + "name": "SMB_FRU_LED", + "led_type": "SMB_LED", + "led": {"loc": "/dev/fpga1", "offset": 0x2c, "len": 1, "way": "devfile"}, + "led_attrs": { + "off": 0x07, "green": 0x03, "amber": 0x04, "red": 0x04, "mask": 0xf, + "amber_flash": 0x0c, + }, + "led_map": { + 0x07: "off", 0x03: "blue", 0x04: "amber", 0x0c: "amber flashing" + } + }, + ], + "fans": [ + { + "name": "FAN7", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-43/43-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "e2_type": ["wedge_v5", "fru"], + "present": {"loc": "/sys/s3ip/fan/fan7/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"bus": 44, "addr": 0x0d, "offset": 0x60, "way": "i2c"}, + "led_attrs": { + "off": 0x00, "green": 0x06, "amber": 0x01, "red": 0x01, "mask": 0x07 + }, + "led_map": { + 0x00: "off", 0x06: "blue", 0x01: "amber" + }, + "PowerMax": 80.64, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"bus": 44, "addr": 0x0d, "offset": 0x90, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan7/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan7/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan7/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"bus": 44, "addr": 0x0d, "offset": 0x90, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan7/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan7/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan7/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN5", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-42/42-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "e2_type": ["wedge_v5", "fru"], + "present": {"loc": "/sys/s3ip/fan/fan5/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"bus": 44, "addr": 0x0d, "offset": 0x61, "way": "i2c"}, + "led_attrs": { + "off": 0x00, "green": 0x06, "amber": 0x01, "red": 0x01, "mask": 0x07 + }, + "led_map": { + 0x00: "off", 0x06: "blue", 0x01: "amber" + }, + "PowerMax": 80.64, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"bus": 44, "addr": 0x0d, "offset": 0x91, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan5/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan5/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan5/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"bus": 44, "addr": 0x0d, "offset": 0x91, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan5/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan5/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan5/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN3", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-41/41-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "e2_type": ["wedge_v5", "fru"], + "present": {"loc": "/sys/s3ip/fan/fan3/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"bus": 44, "addr": 0x0d, "offset": 0x62, "way": "i2c"}, + "led_attrs": { + "off": 0x00, "green": 0x06, "amber": 0x01, "red": 0x01, "mask": 0x07 + }, + "led_map": { + 0x00: "off", 0x06: "blue", 0x01: "amber" + }, + "PowerMax": 80.64, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"bus": 44, "addr": 0x0d, "offset": 0x92, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan3/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan3/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan3/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"bus": 44, "addr": 0x0d, "offset": 0x92, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan3/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan3/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan3/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN1", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-40/40-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "e2_type": ["wedge_v5", "fru"], + "present": {"loc": "/sys/s3ip/fan/fan1/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"bus": 44, "addr": 0x0d, "offset": 0x63, "way": "i2c"}, + "led_attrs": { + "off": 0x00, "green": 0x06, "amber": 0x01, "red": 0x01, "mask": 0x07 + }, + "led_map": { + 0x00: "off", 0x06: "blue", 0x01: "amber" + }, + "PowerMax": 80.64, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"bus": 44, "addr": 0x0d, "offset": 0x93, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan1/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan1/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan1/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"bus": 44, "addr": 0x0d, "offset": 0x93, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan1/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan1/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan1/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN8", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-51/51-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "e2_type": ["wedge_v5", "fru"], + "present": {"loc": "/sys/s3ip/fan/fan8/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"bus": 52, "addr": 0x0d, "offset": 0x60, "way": "i2c"}, + "led_attrs": { + "off": 0x00, "green": 0x06, "amber": 0x01, "red": 0x01, "mask": 0x07 + }, + "led_map": { + 0x00: "off", 0x06: "blue", 0x01: "amber" + }, + "PowerMax": 80.64, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"bus": 52, "addr": 0x0d, "offset": 0x90, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan8/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan8/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan8/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"bus": 52, "addr": 0x0d, "offset": 0x90, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan8/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan8/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan8/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN6", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-50/50-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "e2_type": ["wedge_v5", "fru"], + "present": {"loc": "/sys/s3ip/fan/fan6/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"bus": 52, "addr": 0x0d, "offset": 0x61, "way": "i2c"}, + "led_attrs": { + "off": 0x00, "green": 0x06, "amber": 0x01, "red": 0x01, "mask": 0x07 + }, + "led_map": { + 0x00: "off", 0x06: "blue", 0x01: "amber" + }, + "PowerMax": 80.64, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"bus": 52, "addr": 0x0d, "offset": 0x91, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan6/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan6/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan6/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"bus": 52, "addr": 0x0d, "offset": 0x91, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan6/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan6/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan6/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN4", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-49/49-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "e2_type": ["wedge_v5", "fru"], + "present": {"loc": "/sys/s3ip/fan/fan4/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"bus": 52, "addr": 0x0d, "offset": 0x62, "way": "i2c"}, + "led_attrs": { + "off": 0x00, "green": 0x06, "amber": 0x01, "red": 0x01, "mask": 0x07 + }, + "led_map": { + 0x00: "off", 0x06: "blue", 0x01: "amber" + }, + "PowerMax": 80.64, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"bus": 52, "addr": 0x0d, "offset": 0x92, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan4/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan4/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan4/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"bus": 52, "addr": 0x0d, "offset": 0x92, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan4/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan4/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan4/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN2", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-48/48-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "e2_type": ["wedge_v5", "fru"], + "present": {"loc": "/sys/s3ip/fan/fan2/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"bus": 52, "addr": 0x0d, "offset": 0x63, "way": "i2c"}, + "led_attrs": { + "off": 0x00, "green": 0x06, "amber": 0x01, "red": 0x01, "mask": 0x07 + }, + "led_map": { + 0x00: "off", 0x06: "blue", 0x01: "amber" + }, + "PowerMax": 80.64, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"bus": 52, "addr": 0x0d, "offset": 0x93, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan2/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan2/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan2/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"bus": 52, "addr": 0x0d, "offset": 0x93, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan2/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan2/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan2/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + ], + "cplds": [ + { + "name": "CPU CPLD", + "cpld_id": "CPLD1", + "VersionFile": {"loc": "/dev/cpld0", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for system power", + "slot": 0, + "warm": 0, + }, + { + "name": "SCM CPLD", + "cpld_id": "CPLD2", + "VersionFile": {"loc": "/dev/cpld1", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for base functions", + "slot": 0, + "warm": 0, + }, + { + "name": "MCB CPLD", + "cpld_id": "CPLD3", + "VersionFile": {"loc": "/dev/cpld3", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for base functions", + "slot": 0, + "warm": 0, + }, + { + "name": "SMB CPLD", + "cpld_id": "CPLD4", + "VersionFile": {"loc": "/dev/cpld4", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for sff modules", + "slot": 0, + "warm": 0, + }, + { + "name": "FCB_T CPLD", + "cpld_id": "CPLD5", + "VersionFile": {"loc": "/dev/cpld5", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for fan modules", + "slot": 0, + "warm": 0, + }, + { + "name": "FCB_B CPLD", + "cpld_id": "CPLD6", + "VersionFile": {"loc": "/dev/cpld6", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for fan modules", + "slot": 0, + "warm": 0, + }, + { + "name": "IOB FPGA", + "cpld_id": "CPLD7", + "VersionFile": {"loc": "/dev/fpga0", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for base functions", + "slot": 0, + "format": "little_endian", + "warm": 0, + }, + { + "name": "DOM FPGA", + "cpld_id": "CPLD8", + "VersionFile": {"loc": "/dev/fpga1", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for sff functions", + "slot": 0, + "format": "little_endian", + "warm": 0, + }, + { + "name": "BIOS", + "cpld_id": "CPLD9", + "VersionFile": {"cmd": "dmidecode -s bios-version", "way": "cmd"}, + "desc": "Performs initialization of hardware components during booting", + "slot": 0, + "type": "str", + "warm": 0, + }, + ], + "dcdc": [ + { + "name": "SCM_53134O_V1.0_V", + "dcdc_id": "DCDC1", + "Min": 900, + "value": { + "loc": "/sys/bus/i2c/devices/33-0040/hwmon/hwmon*/in1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 1100, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SCM_I210_V3.3_V", + "dcdc_id": "DCDC2", + "Min": 2970, + "value": { + "loc": "/sys/bus/i2c/devices/33-0040/hwmon/hwmon*/in2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 3630, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SCM_VDD3.3_V", + "dcdc_id": "DCDC3", + "Min": 2970, + "value": { + "loc": "/sys/bus/i2c/devices/33-0040/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 3630, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SCM_VDD12.0_V", + "dcdc_id": "DCDC4", + "Min": 10800, + "value": { + "loc": "/sys/bus/i2c/devices/33-0041/hwmon/hwmon*/in1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 13200, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SCM_OCM_V12.0_V", + "dcdc_id": "DCDC5", + "Min": 10800, + "value": { + "loc": "/sys/bus/i2c/devices/33-0041/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 13200, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SCM_SSD_V3.3_V", + "dcdc_id": "DCDC6", + "Min": 2970, + "value": { + "loc": "/sys/bus/i2c/devices/33-0042/hwmon/hwmon*/in1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 3630, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SCM_BMC_V3.3_V", + "dcdc_id": "DCDC7", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/33-0042/hwmon/hwmon*/in2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 3630, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SCM_VDD5.0_V", + "dcdc_id": "DCDC8", + "Min": 4500, + "value": { + "loc": "/sys/bus/i2c/devices/33-0042/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 5500, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MAC_CORE_V", + "dcdc_id": "DCDC9", + "Min": 630, + "value": { + "loc": "/sys/bus/i2c/devices/64-0040/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 858, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MAC_ANALOG0 V0.9_V", + "dcdc_id": "DCDC10", + "Min": 810, + "value": { + "loc": "/sys/bus/i2c/devices/65-0040/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 990, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MAC_ANALOG0 V0.75_V", + "dcdc_id": "DCDC11", + "Min": 675, + "value": { + "loc": "/sys/bus/i2c/devices/65-0040/hwmon/hwmon*/in4_input", + "way": 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"/sys/bus/i2c/devices/67-006e/hwmon/hwmon*/loopa_iout", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 2000, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OE7_AVDD_RX_1.2_C", + "dcdc_id": "DCDC170", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/67-006e/hwmon/hwmon*/loopb_iout", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 5100, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OE7_AVDD_TX_1.8_C", + "dcdc_id": "DCDC171", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/67-0066/hwmon/hwmon*/loopa_iout", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 10000, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OE7_AVDD_TX_1.2_C", + "dcdc_id": "DCDC172", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/67-0066/hwmon/hwmon*/loopb_iout", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 9000, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OE7_AVDD_TRX_0.75_C", + "dcdc_id": "DCDC173", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/67-005e/hwmon/hwmon*/loopa_iout", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 9500, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OE_HCSL_PLL_VDD2.5_C", + "dcdc_id": "DCDC174", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/59-0040/hwmon/hwmon*/curr2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 2000, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OE_VDD_1.8_C", + "dcdc_id": "DCDC175", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/59-0040/hwmon/hwmon*/curr3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 550, + "format": "float(float(%s)/1000)", + }, + + { + "name": "RLML_VDD V3.3_C", + "dcdc_id": "DCDC176", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/71-0068/hwmon/hwmon*/loopa_iout", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 30000, + "format": "float(float(%s)/1000)", + }, + + { + "name": "RLMH_VDD V3.3_C", + "dcdc_id": "DCDC177", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/71-0068/hwmon/hwmon*/loopb_iout", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 30000, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SMB_CLK_VDD3.3_C", + "dcdc_id": "DCDC178", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/59-0040/hwmon/hwmon*/curr1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 1100, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SMB_CLK2_VDD1.8_C", + "dcdc_id": "DCDC179", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/56-0041/hwmon/hwmon*/curr3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 1100, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SMB_CLK_VDD1.8_C", + "dcdc_id": "DCDC180", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/56-0041/hwmon/hwmon*/curr2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 1100, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SMB_FPGA_VDD1.8_C", + "dcdc_id": "DCDC181", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/62-0040/hwmon/hwmon*/curr3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 550, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SMB_VDD_5.0_C", + "dcdc_id": "DCDC182", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/60-0040/hwmon/hwmon*/curr2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 3300, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SMB_FPGA_V1.0_C", + "dcdc_id": "DCDC183", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/62-0040/hwmon/hwmon*/curr2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 1188, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SMB_FPGA_V1.2_C", + "dcdc_id": "DCDC184", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/57-0040/hwmon/hwmon*/curr1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 550, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SMB_VDD_3.3_C", + "dcdc_id": "DCDC185", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/63-0040/hwmon/hwmon*/curr1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 1550, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SMB_CPLD_VDD_1.8_C", + "dcdc_id": "DCDC186", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/63-0040/hwmon/hwmon*/curr2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 330, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MCB_FPGA_VDD1.0_C", + "dcdc_id": "DCDC187", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/12-0040/hwmon/hwmon*/curr1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 1188, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MCB_FPGA_VDD1.8_C", + "dcdc_id": "DCDC188", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/12-0040/hwmon/hwmon*/curr2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 550, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MCB_FPGA_VDD1.2_C", + "dcdc_id": "DCDC189", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/12-0040/hwmon/hwmon*/curr3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 550, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MCB_CPLD_VDD3.3_C", + "dcdc_id": "DCDC190", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/12-0041/hwmon/hwmon*/curr1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 550, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MCB_VDD3.3_C", + "dcdc_id": "DCDC191", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/12-0041/hwmon/hwmon*/curr2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 550, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MCB_FPGA_VDD3.3_C", + "dcdc_id": "DCDC192", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/12-0041/hwmon/hwmon*/curr3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 550, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MCB_LEDL_VDD3.3_C", + "dcdc_id": "DCDC210", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/91-0042/hwmon/hwmon*/curr1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 1200, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MCB_LEDR_VDD3.3_C", + "dcdc_id": "DCDC211", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/91-0042/hwmon/hwmon*/curr2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 1200, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OCM_XDPE_VCCIN_C", + "dcdc_id": "DCDC193", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/5-0070/hwmon/hwmon*/loopa_iout", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 147000, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OCM_XDPE_P1V8_C", + "dcdc_id": "DCDC194", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/5-0070/hwmon/hwmon*/loopb_iout", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 2300, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OCM_XDPE_P1V05_C", + "dcdc_id": "DCDC195", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/5-006e/hwmon/hwmon*/loopa_iout", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 14300, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OCM_XDPE_VNN_PCH_C", + "dcdc_id": "DCDC196", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/5-006e/hwmon/hwmon*/loopb_iout", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 7400, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OCM_XDPE_VNN_NAC_C", + "dcdc_id": "DCDC197", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/5-0068/hwmon/hwmon*/loopa_iout", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 22000, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OCM_XDPE_VCC_ANA_C", + "dcdc_id": "DCDC198", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/5-0068/hwmon/hwmon*/loopb_iout", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 2210, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OCM_XDPE_P1V2_VDDQ_C", + "dcdc_id": "DCDC199", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/5-005e/hwmon/hwmon*/loopa_iout", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 19000, + "format": "float(float(%s)/1000)", + }, + + { + "name": "FAN1_VDD12_C", + "dcdc_id": "DCDC200", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/88-0042/hwmon/hwmon*/curr1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 10000, + "format": "float(float(%s)/1000)", + }, + + { + "name": "FAN2_VDD12_C", + "dcdc_id": "DCDC201", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/89-0042/hwmon/hwmon*/curr2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 10000, + "format": "float(float(%s)/1000)", + }, + + { + "name": "FAN3_VDD12_C", + "dcdc_id": "DCDC202", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/88-0042/hwmon/hwmon*/curr2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 10000, + "format": "float(float(%s)/1000)", + }, + + { + "name": "FAN4_VDD12_C", + "dcdc_id": "DCDC203", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/89-0042/hwmon/hwmon*/curr3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 10000, + "format": "float(float(%s)/1000)", + }, + + { + "name": "FAN5_VDD12_C", + "dcdc_id": "DCDC204", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/88-0042/hwmon/hwmon*/curr3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 10000, + "format": "float(float(%s)/1000)", + }, + + { + "name": "FAN6_VDD12_C", + "dcdc_id": "DCDC205", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/90-0042/hwmon/hwmon*/curr1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 10000, + "format": "float(float(%s)/1000)", + }, + + { + "name": "FAN7_VDD12_C", + "dcdc_id": "DCDC206", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/89-0042/hwmon/hwmon*/curr1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 10000, + "format": "float(float(%s)/1000)", + }, + + { + "name": "FAN8_VDD12_C", + "dcdc_id": "DCDC207", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/90-0042/hwmon/hwmon*/curr2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 10000, + "format": "float(float(%s)/1000)", + }, + ], + "cpu": [ + { + "name": "cpu", + "reboot_cause_path": "/etc/sonic/.reboot/.previous-reboot-cause.txt" + } + ], + "sfps": { + "ver": '3.0', + "port_index_start": 1, + "port_num": 128, + "log_level": 2, + "eeprom_retry_times": 5, + "eeprom_retry_break_sec": 0.2, + "presence_val_is_present": 0, + "eeprom_path": "/sys/bus/i2c/devices/i2c-%d/%d-0050/eeprom", + "eeprom_path_key": [24] * 16 + [25] * 16 + [26] * 16 + [27] * 16 + [28] * 16 + [29] * 16 + [30] * 16 + [31] * 16 + } +} diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/hal-config/x86_64_micas_m2_w6940_128x1_fr4_r0_0x40d9_v01_dc_monitor.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/hal-config/x86_64_micas_m2_w6940_128x1_fr4_r0_0x40d9_v01_dc_monitor.py new file mode 100755 index 00000000000..78d2bbbaf0c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/hal-config/x86_64_micas_m2_w6940_128x1_fr4_r0_0x40d9_v01_dc_monitor.py @@ -0,0 +1,239 @@ +# coding:utf-8 + + +monitor = { + "openloop": { + "linear": { + "name": "linear", + "flag": 0, + "pwm_min": 0x66, + "pwm_max": 0xcc, + "K": 11, + "tin_min": 38, + }, + "curve": { + "name": "curve", + "flag": 1, + "pwm_min": 0x66, + "pwm_max": 0xcc, + "a": -0.0249, + "b": 8.1615, + "c": -60.326, + "tin_min": 25, + }, + }, + + "pid": { + "CPU_TEMP": { + "name": "CPU_TEMP", + "flag": 1, + "type": "duty", + "pwm_min": 0x66, + "pwm_max": 0xcc, + "Kp": 0.8, + "Ki": 0.4, + "Kd": 0.3, + "target": 85, + "value": [None, None, None], + }, + "SWITCH_TEMP": { + "name": "SWITCH_TEMP", + "flag": 1, + "type": "duty", + "pwm_min": 0x66, + "pwm_max": 0xcc, + "Kp": 1.5, + "Ki": 1, + "Kd": 0.3, + "target": 80, + "value": [None, None, None], + }, + "OUTLET_TEMP": { + "name": "OUTLET_TEMP", + "flag": 1, + "type": "duty", + "pwm_min": 0x66, + "pwm_max": 0xcc, + "Kp": 2, + "Ki": 0.4, + "Kd": 0.3, + "target": 65, + "value": [None, None, None], + }, + "RLM_TEMP": { + "name": "RLM_TEMP", + "flag": 1, + "type": "duty", + "pwm_min": 0x66, + "pwm_max": 0xcc, + "Kp": 0.1, + "Ki": 0.4, + "Kd": 0, + "target": 40, + "value": [None, None, None], + }, + "BOARD_TEMP": { + "name": "BOARD_TEMP", + "flag": 1, + "type": "duty", + "pwm_min": 0x66, + "pwm_max": 0xcc, + "Kp": 2, + "Ki": 0.4, + "Kd": 0.3, + "target": 65, + "value": [None, None, None], + }, + "MOS_TEMP": { + "name": "MOS_TEMP", + "flag": 1, + "type": "duty", + "pwm_min": 0x66, + "pwm_max": 0xcc, + "Kp": 1, + "Ki": 0.4, + "Kd": 0.3, + "target": 85, + "value": [None, None, None], + }, + "Tout-Tin": { + "name": "Tout-Tin", + "flag": 0, + "type": "duty", + "pwm_min": 0x66, + "pwm_max": 0xcc, + "Kp": 8, + "Ki": 0.1, + "Kd": 0.4, + "target": 12, + "value": [None, None, None], + }, + "OE_TEMP": { + "name": "OE_TEMP", + "flag": 1, + "type": "duty", + "pwm_min": 0x66, # 40%(0x66 = 102, 102/255=0.4) + "pwm_max": 0xcc, # 80%(0xcc = 204, 204/255=0.8) + "Kp": 1.5, + "Ki": 1, + "Kd": 0.3, + "target": 85, + "value": [None, None, None], + } + }, + + "temps_threshold": { + "SWITCH_TEMP": {"name": "SWITCH_TEMP", "warning": 100, "critical": 105, "invalid": -100000, "error": -99999}, + "INLET_TEMP": {"name": "INLET_TEMP", "warning": 50, "critical": 55}, + "OUTLET_TEMP": {"name": "OUTLET_TEMP", "warning": 70, "critical": 75}, + "CPU_TEMP": {"name": "CPU_TEMP", "warning": 95, "critical": 99}, + "RLM_TEMP": {"name": "RLM_TEMP", "warning": 50, "critical": 55, "invalid": -100000, "error": -99999}, + #"Tout-Tin": {"name": "Tout-Tin", "warning": 15, "critical": 20}, + "OE_TEMP": {"name": "OE_TEMP", "warning": 95, "critical": 100, "invalid": -100000, "error": -99999}, + "BOARD_TEMP": {"name": "BOARD_TEMP", "warning": 70, "critical": 75}, + "MOS_TEMP": {"name": "MOS_TEMP", "warning": 110, "critical": 125}, + }, + + "fancontrol_para": { + "interval": 5, + "max_pwm": 0xff, + "min_pwm": 0x66, + "abnormal_pwm": 0xcc, + "warning_pwm": 0xcc, + "critical_pwm": 0xcc, + "temp_invalid_pid_pwm": 0x66, + "temp_error_pid_pwm": 0x66, + "temp_fail_num": 3, + "check_temp_fail": [ + {"temp_name": "INLET_TEMP"}, + {"temp_name": "SWITCH_TEMP"}, + {"temp_name": "CPU_TEMP"}, + {"temp_name": "MOS_TEMP"}, + {"temp_name": "BOARD_TEMP"}, + {"temp_name": "OUTLET_TEMP"}, + {"temp_name": "OE_TEMP"}, + ], + "check_temp_critical_reboot": [ + ["SWITCH_TEMP"], + ["OE_TEMP"], + ["INLET_TEMP", "OUTLET_TEMP", "CPU_TEMP", "RLM_TEMP", "BOARD_TEMP", "MOS_TEMP"], + ], + "temp_warning_num": 3, # temp over warning 3 times continuously + "temp_critical_num": 3, # temp over critical 3 times continuously + "temp_warning_countdown": 60, # 5 min warning speed after not warning + "temp_critical_countdown": 60, # 5 min full speed after not critical + "rotor_error_count": 6, # fan rotor error 6 times continuously + "inlet_mac_diff": 999, + "check_crit_reboot_flag": 1, + "check_crit_reboot_num": 3, + "check_crit_sleep_time": 20, + "psu_fan_control": 1, + "psu_absent_fullspeed_num": 0xFF, + "fan_absent_fullspeed_num": 1, + "rotor_error_fullspeed_num": 1, + "deal_over_temp_reboot_cmd": [ + {"way": "devfile", "loc": "/dev/cpld5", "offset": 0x22, "value": [0x00]}, # disable fan watchdog + {"way": "devfile", "loc": "/dev/cpld6", "offset": 0x22, "value": [0x00]}, # disable fan watchdog + {"way": "devfile", "loc": "/dev/cpld1", "offset": 0x15, "value": [0x0c]}, # cpu powroff + ], + "deal_over_temp_reboot_pwm": 0x80, # set pwm=50% + }, + + "ledcontrol_para": { + "interval": 5, + "checkpsu": 1, # 0: sys led don't follow psu led + "checkfan": 1, # 0: sys led don't follow fan led + "checksmb": 1, # 0: sys led don't follow smb led + "psu_amber_num": 2, + "psu_green_num": 1, # only psuerrnum <= this, psu led will be set green + "fan_amber_num": 1, + "sysled_check_temp": 0, + "sysled_check_fw_up": 1, + "smbled_ctrl": 1, + "board_sys_led": [ + {"led_name": "FRONT_SYS_LED"}, + ], + "board_psu_led": [ + {"led_name": "FRONT_PSU_LED"}, + ], + "board_fan_led": [ + {"led_name": "FRONT_FAN_LED"}, + ], + "board_smb_led": [ + {"led_name": "SMB_FRU_LED"}, + ], + "board_smb_fru_led": [ + {"led_name": "FRONT_SMB_LED"}, + ], + "board_smb_fru_dcdc_sensors": [ + "^MAC_", "^OE", "^RLM", "^SMB_", + ], + "board_smb_fru_temps": [ + "SWITCH_TEMP", "BOARD_TEMP", "MOS_TEMP", "OE_TEMP", "RLM_TEMP", + ], + "board_scm_fru_led": [ + {"led_name": "SCM_FRU_LED"}, + ], + "board_scm_fru_dcdc_sensors": [ + "^SCM_", "^OCM_", + ], + "board_scm_fru_temps": [ + "CPU_TEMP", "INLET_TEMP", + ], + "psu_air_flow_monitor": 0, + "fan_air_flow_monitor": 0, + "psu_air_flow_amber_num": 0, + "fan_air_flow_amber_num": 0, + }, + + "fw_upgrade_check": [ + [ + {"gettype": "file_exist", "judge_file": "/etc/sonic/.doing_fw_upg", "okval": True}, + ], + ], + + "otp_reboot_judge_file": { + "otp_switch_reboot_judge_file": "/etc/.otp_switch_reboot_flag", + "otp_other_reboot_judge_file": "/etc/.otp_other_reboot_flag", + }, +} diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/hal-config/x86_64_micas_m2_w6940_128x1_fr4_r0_device.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/hal-config/x86_64_micas_m2_w6940_128x1_fr4_r0_device.py new file mode 100755 index 00000000000..572c6b2273c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/hal-config/x86_64_micas_m2_w6940_128x1_fr4_r0_device.py @@ -0,0 +1,2050 @@ +#!/usr/bin/python3 + +psu_fan_airflow = { + "intake": ['DLK3000AN12C31', 'CRPS3000CL', 'ECDL3000123'], + "exhaust": [] +} + +fanairflow = { + "intake": ['M2EFAN V-F'], + "exhaust": [], +} + +psu_display_name = { + "PA3000I-F": ['DLK3000AN12C31', 'CRPS3000CL', 'ECDL3000123'], +} + +psutypedecode = { + 0x00: 'N/A', + 0x01: 'AC', + 0x02: 'DC', +} + +class Unit: + Temperature = "C" + Voltage = "V" + Current = "A" + Power = "W" + Speed = "RPM" + +class threshold: + PSU_TEMP_MIN = -5 * 1000 + PSU_TEMP_MAX = 55 * 1000 + + PSU_FAN_SPEED_MIN = 3500 + PSU_FAN_SPEED_MAX = 32950 + + PSU_OUTPUT_VOLTAGE_MIN = 11 * 1000 + PSU_OUTPUT_VOLTAGE_MAX = 13 * 1000 + + PSU_AC_INPUT_VOLTAGE_MIN = 90 * 1000 + PSU_AC_INPUT_VOLTAGE_MAX = 264 * 1000 + + PSU_DC_INPUT_VOLTAGE_MIN = 180 * 1000 + PSU_DC_INPUT_VOLTAGE_MAX = 320 * 1000 + + ERR_VALUE = -9999999 + + PSU_OUTPUT_POWER_MIN = 0 * 1000 * 1000 + PSU_OUTPUT_POWER_MAX = 3000 * 1000 * 1000 + + PSU_INPUT_POWER_MIN = 0 * 1000 * 1000 + PSU_INPUT_POWER_MAX = 3100 * 1000 * 1000 + + PSU_OUTPUT_CURRENT_MIN = 0 * 1000 + PSU_OUTPUT_CURRENT_MAX = 246 * 1000 + + PSU_INPUT_CURRENT_MIN = 0 * 1000 + PSU_INPUT_CURRENT_MAX = 20 * 1000 + + FRONT_FAN_SPEED_MAX = 11700 + REAR_FAN_SPEED_MAX = 10200 + FAN_SPEED_MIN = 2000 + +devices = { + "onie_e2": [ + { + "name": "ONIE_E2", + "e2loc": {"loc": "/sys/bus/i2c/devices/1-0056/eeprom", "way": "sysfs"}, + "airflow": "intake" + }, + ], + "psus": [ + { + "e2loc": {"loc": "/sys/bus/i2c/devices/11-0050/eeprom", "way": "sysfs"}, + "pmbusloc": {"bus": 11, "addr": 0x58, "way": "i2c"}, + "present": {"loc": "/sys/s3ip/psu/psu1/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "name": "PSU1", + "psu_display_name": psu_display_name, + "psu_display_name": psu_display_name, + "airflow": psu_fan_airflow, + "TempStatus": {"bus": 11, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0004}, + "Temperature": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-11/11-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": threshold.PSU_TEMP_MIN, + "Max": threshold.PSU_TEMP_MAX, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + }, + "FanStatus": {"bus": 11, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0400}, + "FanSpeed": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-11/11-0058/hwmon/hwmon*/fan1_input", "way": "sysfs"}, + "Min": threshold.PSU_FAN_SPEED_MIN, + "Max": threshold.PSU_FAN_SPEED_MAX, + "Unit": Unit.Speed + }, + "psu_fan_tolerance": 40, + "InputsStatus": {"bus": 11, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x2000}, + "InputsType": {"bus": 11, "addr": 0x58, "offset": 0x80, "way": "i2c", 'psutypedecode': psutypedecode}, + "InputsVoltage": { + 'AC': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-11/11-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": threshold.PSU_AC_INPUT_VOLTAGE_MIN, + "Max": threshold.PSU_AC_INPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + + }, + 'DC': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-11/11-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": threshold.PSU_DC_INPUT_VOLTAGE_MIN, + "Max": threshold.PSU_DC_INPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + }, + 'other': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-11/11-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": threshold.ERR_VALUE, + "Max": threshold.ERR_VALUE, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + } + }, + "InputsCurrent": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-11/11-0058/hwmon/hwmon*/curr1_input", "way": "sysfs"}, + "Min": threshold.PSU_INPUT_CURRENT_MIN, + "Max": threshold.PSU_INPUT_CURRENT_MAX, + "Unit": Unit.Current, + "format": "float(float(%s)/1000)" + }, + "InputsPower": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-11/11-0058/hwmon/hwmon*/power1_input", "way": "sysfs"}, + "Min": threshold.PSU_INPUT_POWER_MIN, + "Max": threshold.PSU_INPUT_POWER_MAX, + "Unit": Unit.Power, + "format": "float(float(%s)/1000000)" + }, + "OutputsStatus": {"bus": 11, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x8800}, + "OutputsVoltage": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-11/11-0058/hwmon/hwmon*/in2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_VOLTAGE_MIN, + "Max": threshold.PSU_OUTPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + }, + "OutputsCurrent": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-11/11-0058/hwmon/hwmon*/curr2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_CURRENT_MIN, + "Max": threshold.PSU_OUTPUT_CURRENT_MAX, + "Unit": Unit.Current, + "format": "float(float(%s)/1000)" + }, + "OutputsPower": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-11/11-0058/hwmon/hwmon*/power2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_POWER_MIN, + "Max": threshold.PSU_OUTPUT_POWER_MAX, + "Unit": Unit.Power, + "format": "float(float(%s)/1000000)" + }, + }, + { + "e2loc": {"loc": "/sys/bus/i2c/devices/10-0050/eeprom", "way": "sysfs"}, + "pmbusloc": {"bus": 10, "addr": 0x58, "way": "i2c"}, + "present": {"loc": "/sys/s3ip/psu/psu2/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "name": "PSU2", + "psu_display_name": psu_display_name, + "airflow": psu_fan_airflow, + "TempStatus": {"bus": 10, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0004}, + "Temperature": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-10/10-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": threshold.PSU_TEMP_MIN, + "Max": threshold.PSU_TEMP_MAX, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + }, + "FanStatus": {"bus": 10, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0400}, + "FanSpeed": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-10/10-0058/hwmon/hwmon*/fan1_input", "way": "sysfs"}, + "Min": threshold.PSU_FAN_SPEED_MIN, + "Max": threshold.PSU_FAN_SPEED_MAX, + "Unit": Unit.Speed + }, + "psu_fan_tolerance": 40, + "InputsStatus": {"bus":10, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x2000}, + "InputsType": {"bus": 10, "addr": 0x58, "offset": 0x80, "way": "i2c", 'psutypedecode': psutypedecode}, + "InputsVoltage": { + 'AC': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-10/10-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": threshold.PSU_AC_INPUT_VOLTAGE_MIN, + "Max": threshold.PSU_AC_INPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + + }, + 'DC': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-10/10-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": threshold.PSU_DC_INPUT_VOLTAGE_MIN, + "Max": threshold.PSU_DC_INPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + }, + 'other': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-10/10-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": threshold.ERR_VALUE, + "Max": threshold.ERR_VALUE, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + } + }, + "InputsCurrent": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-10/10-0058/hwmon/hwmon*/curr1_input", "way": "sysfs"}, + "Min": threshold.PSU_INPUT_CURRENT_MIN, + "Max": threshold.PSU_INPUT_CURRENT_MAX, + "Unit": Unit.Current, + "format": "float(float(%s)/1000)" + }, + "InputsPower": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-10/10-0058/hwmon/hwmon*/power1_input", "way": "sysfs"}, + "Min": threshold.PSU_INPUT_POWER_MIN, + "Max": threshold.PSU_INPUT_POWER_MAX, + "Unit": Unit.Power, + "format": "float(float(%s)/1000000)" + }, + "OutputsStatus": {"bus": 10, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x8800}, + "OutputsVoltage": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-10/10-0058/hwmon/hwmon*/in2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_VOLTAGE_MIN, + "Max": threshold.PSU_OUTPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + }, + "OutputsCurrent": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-10/10-0058/hwmon/hwmon*/curr2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_CURRENT_MIN, + "Max": threshold.PSU_OUTPUT_CURRENT_MAX, + "Unit": Unit.Current, + "format": "float(float(%s)/1000)" + }, + "OutputsPower": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-10/10-0058/hwmon/hwmon*/power2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_POWER_MIN, + "Max": threshold.PSU_OUTPUT_POWER_MAX, + "Unit": Unit.Power, + "format": "float(float(%s)/1000000)" + }, + }, + ], + "temps": [ + { + "name": "CPU_TEMP", + "temp_id": "TEMP1", + "api_name": "CPU", + "Temperature": { + "value": {"loc": "/sys/bus/platform/devices/coretemp.0/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": -30000, + "Low": -10000, + "High": 100000, + "Max": 102000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "INLET_TEMP", + "temp_id": "TEMP2", + "api_name": "Inlet", + "Temperature": { + "value": {"loc": "/sys/bus/i2c/devices/35-004d/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": -37000, + "Low": -27000, + "High": 53000, + "Max": 58000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)-3" + } + }, + { + "name": "OUTLET_TEMP", + "temp_id": "TEMP3", + "api_name": "Outlet", + "Temperature": { + "value": [ + {"loc": "/sys/bus/i2c/devices/8-0048/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + {"loc": "/sys/bus/i2c/devices/8-0049/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + {"loc": "/sys/bus/i2c/devices/9-0048/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + {"loc": "/sys/bus/i2c/devices/9-0049/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + ], + "Min": -30000, + "Low": -20000, + "High": 70000, + "Max": 75000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "BOARD_TEMP", + "temp_id": "TEMP4", + "api_name": "Board", + "Temperature": { + "value": {"loc": "/sys/bus/i2c/devices/14-0048/hwmon/*/temp1_input", "way": "sysfs"}, + "Min": -30000, + "Low": -10000, + "High": 70000, + "Max": 75000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "SWITCH_TEMP", + "temp_id": "TEMP5", + "api_name": "ASIC_TEMP", + "Temperature": { + "value": {"loc": "/sys/s3ip/temp_sensor/temp2/value", "way": "sysfs"}, + "Min": -30000, + "Low": -20000, + "High": 100000, + "Max": 105000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + }, + "invalid": -100000, + "error": -99999, + }, + { + "name": "PSU1_TEMP", + "temp_id": "TEMP6", + "Temperature": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-11/11-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": -10000, + "Low": -5000, + "High": 50000, + "Max": 55000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "PSU2_TEMP", + "temp_id": "TEMP7", + "Temperature": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-10/10-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": -10000, + "Low": -5000, + "High": 50000, + "Max": 55000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "OE_TEMP", + "temp_id": "TEMP8", + "api_name": "OE_TEMP", + "Temperature": { + "value": {"loc": "/etc/sonic/highest_oe_temp", "way": "sysfs", "flock_path": "/etc/sonic/highest_oe_temp"}, + "Min": -30000, + "Low": -20000, + "High": 100000, + "Max": 105000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + }, + "invalid": -100000, + "error": -99999, + }, + { + "name": "RLM_TEMP", + "temp_id": "TEMP9", + "api_name": "RLM_TEMP", + "Temperature": { + "value": {"loc": "/etc/sonic/highest_rlm_temp", "way": "sysfs", "flock_path": "/etc/sonic/highest_rlm_temp"}, + "Min": -40000, + "Low": -30000, + "High": 40000, + "Max": 45000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + }, + "invalid": -100000, + "error": -99999, + }, + { + "name": "MOS_TEMP", + "temp_id": "TEMP10", + "api_name": "MOSFET_TEMP", + "Temperature": { + "value": {"loc": "/sys/bus/i2c/devices/64-0040/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": -30000, + "Low": -20000, + "High": 110000, + "Max": 125000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "Tout-Tin", + "Temperature": { + "value": { + "val_conf_list": [ + {"loc": "/sys/bus/i2c/devices/8-0048/hwmon/hwmon*/temp1_input", "way": "sysfs", "fail_val":-99999000}, + {"loc": "/sys/bus/i2c/devices/8-0049/hwmon/hwmon*/temp1_input", "way": "sysfs", "fail_val":-99999000}, + {"loc": "/sys/bus/i2c/devices/9-0048/hwmon/hwmon*/temp1_input", "way": "sysfs", "fail_val":-99999000}, + {"loc": "/sys/bus/i2c/devices/9-0049/hwmon/hwmon*/temp1_input", "way": "sysfs", "fail_val":-99999000}, + {"loc": "/sys/bus/i2c/devices/35-004d/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + ], + "fail_conf_set_list": [ + {0,1,2,3}, + ], + "format": "float(float(max(%s,%s,%s,%s)-float(%s))/1000)+3" + }, + #"Min": -10000, + #"Low": 0, + "High": 15000, + "Max": 20000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + ], + "leds": [ + { + "name": "FRONT_SYS_LED", + "led_type": "SYS_LED", + "led": {"loc": "/dev/cpld1", "offset": 0x50, "len": 1, "way": "devfile"}, + "led_attrs": { + "off": 0x00, "green": 0x02, "amber": 0x06, "red": 0x06, "mask": 0x07, + "flash": 0x01, "amber_flash": 0x05, + }, + "led_map": { + 0x00: "off", 0x02: "blue", 0x06: "amber", 0x01: "blue/amber alternate flashing", + 0x05: "amber flashing" + } + }, + { + "name": "FRONT_PSU_LED", + "led_type": "PSU_LED", + "led": {"loc": "/dev/cpld1", "offset": 0x51, "len": 1, "way": "devfile"}, + "led_attrs": { + "off": 0x00, "green": 0x02, "amber": 0x06, "red": 0x06, "mask": 0x07 + }, + "led_map": { + 0x00: "off", 0x02: "blue", 0x06: "amber" + } + }, + { + "name": "FRONT_SMB_LED", + "led_type": "SMB_LED", + + "led": {"loc": "/dev/cpld1", "offset": 0x52, "len": 1, "way": "devfile"}, + "led_attrs": { + "off": 0x00, "green": 0x02, "amber": 0x06, "red": 0x06, "mask": 0x07 + }, + "led_map": { + 0x00: "off", 0x02: "blue", 0x06: "amber" + } + }, + { + "name": "FRONT_FAN_LED", + "led_type": "FAN_LED", + "led": {"loc": "/dev/cpld1", "offset": 0x53, "len": 1, "way": "devfile"}, + "led_attrs": { + "off": 0x00, "green": 0x02, "amber": 0x06, "red": 0x06, "mask": 0x07 + }, + "led_map": { + 0x00: "off", 0x02: "blue", 0x06: "amber" + } + }, + ], + "fans": [ + { + "name": "FAN7", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-43/43-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "e2_type": ["wedge_v5", "fru"], + "present": {"loc": "/sys/s3ip/fan/fan7/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"bus": 44, "addr": 0x0d, "offset": 0x60, "way": "i2c"}, + "led_attrs": { + "off": 0x00, "green": 0x06, "amber": 0x01, "red": 0x01, "mask": 0x07 + }, + "led_map": { + 0x00: "off", 0x06: "blue", 0x01: "amber" + }, + "PowerMax": 80.64, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"bus": 44, "addr": 0x0d, "offset": 0x90, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan7/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan7/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan7/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"bus": 44, "addr": 0x0d, "offset": 0x90, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan7/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan7/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan7/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN5", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-42/42-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "e2_type": ["wedge_v5", "fru"], + "present": {"loc": "/sys/s3ip/fan/fan5/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"bus": 44, "addr": 0x0d, "offset": 0x61, "way": "i2c"}, + "led_attrs": { + "off": 0x00, "green": 0x06, "amber": 0x01, "red": 0x01, "mask": 0x07 + }, + "led_map": { + 0x00: "off", 0x06: "blue", 0x01: "amber" + }, + "PowerMax": 80.64, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"bus": 44, "addr": 0x0d, "offset": 0x91, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan5/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan5/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan5/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"bus": 44, "addr": 0x0d, "offset": 0x91, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan5/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan5/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan5/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN3", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-41/41-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "e2_type": ["wedge_v5", "fru"], + "present": {"loc": "/sys/s3ip/fan/fan3/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"bus": 44, "addr": 0x0d, "offset": 0x62, "way": "i2c"}, + "led_attrs": { + "off": 0x00, "green": 0x06, "amber": 0x01, "red": 0x01, "mask": 0x07 + }, + "led_map": { + 0x00: "off", 0x06: "blue", 0x01: "amber" + }, + "PowerMax": 80.64, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"bus": 44, "addr": 0x0d, "offset": 0x92, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan3/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan3/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan3/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"bus": 44, "addr": 0x0d, "offset": 0x92, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan3/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan3/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan3/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN1", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-40/40-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "e2_type": ["wedge_v5", "fru"], + "present": {"loc": "/sys/s3ip/fan/fan1/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"bus": 44, "addr": 0x0d, "offset": 0x63, "way": "i2c"}, + "led_attrs": { + "off": 0x00, "green": 0x06, "amber": 0x01, "red": 0x01, "mask": 0x07 + }, + "led_map": { + 0x00: "off", 0x06: "blue", 0x01: "amber" + }, + "PowerMax": 80.64, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"bus": 44, "addr": 0x0d, "offset": 0x93, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan1/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan1/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan1/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"bus": 44, "addr": 0x0d, "offset": 0x93, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan1/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan1/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan1/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN8", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-51/51-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "e2_type": ["wedge_v5", "fru"], + "present": {"loc": "/sys/s3ip/fan/fan8/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"bus": 52, "addr": 0x0d, "offset": 0x60, "way": "i2c"}, + "led_attrs": { + "off": 0x00, "green": 0x06, "amber": 0x01, "red": 0x01, "mask": 0x07 + }, + "led_map": { + 0x00: "off", 0x06: "blue", 0x01: "amber" + }, + "PowerMax": 80.64, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"bus": 52, "addr": 0x0d, "offset": 0x90, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan8/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan8/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan8/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"bus": 52, "addr": 0x0d, "offset": 0x90, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan8/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan8/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan8/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN6", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-50/50-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "e2_type": ["wedge_v5", "fru"], + "present": {"loc": "/sys/s3ip/fan/fan6/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"bus": 52, "addr": 0x0d, "offset": 0x61, "way": "i2c"}, + "led_attrs": { + "off": 0x00, "green": 0x06, "amber": 0x01, "red": 0x01, "mask": 0x07 + }, + "led_map": { + 0x00: "off", 0x06: "blue", 0x01: "amber" + }, + "PowerMax": 80.64, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"bus": 52, "addr": 0x0d, "offset": 0x91, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan6/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan6/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan6/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"bus": 52, "addr": 0x0d, "offset": 0x91, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan6/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan6/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan6/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN4", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-49/49-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "e2_type": ["wedge_v5", "fru"], + "present": {"loc": "/sys/s3ip/fan/fan4/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"bus": 52, "addr": 0x0d, "offset": 0x62, "way": "i2c"}, + "led_attrs": { + "off": 0x00, "green": 0x06, "amber": 0x01, "red": 0x01, "mask": 0x07 + }, + "led_map": { + 0x00: "off", 0x06: "blue", 0x01: "amber" + }, + "PowerMax": 80.64, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"bus": 52, "addr": 0x0d, "offset": 0x92, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan4/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan4/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan4/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"bus": 52, "addr": 0x0d, "offset": 0x92, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan4/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan4/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan4/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN2", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-48/48-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "e2_type": ["wedge_v5", "fru"], + "present": {"loc": "/sys/s3ip/fan/fan2/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"bus": 52, "addr": 0x0d, "offset": 0x63, "way": "i2c"}, + "led_attrs": { + "off": 0x00, "green": 0x06, "amber": 0x01, "red": 0x01, "mask": 0x07 + }, + "led_map": { + 0x00: "off", 0x06: "blue", 0x01: "amber" + }, + "PowerMax": 80.64, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"bus": 52, "addr": 0x0d, "offset": 0x93, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan2/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan2/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan2/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"bus": 52, "addr": 0x0d, "offset": 0x93, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan2/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan2/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan2/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + ], + "cplds": [ + { + "name": "CPU CPLD", + "cpld_id": "CPLD1", + "VersionFile": {"loc": "/dev/cpld0", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for system power", + "slot": 0, + "warm": 0, + }, + { + "name": "SCM CPLD", + "cpld_id": "CPLD2", + "VersionFile": {"loc": "/dev/cpld1", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for base functions", + "slot": 0, + "warm": 0, + }, + { + "name": "MCB CPLD", + "cpld_id": "CPLD3", + "VersionFile": {"loc": "/dev/cpld3", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for base functions", + "slot": 0, + "warm": 0, + }, + { + "name": "SMB CPLD", + "cpld_id": "CPLD4", + "VersionFile": {"loc": "/dev/cpld4", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for sff modules", + "slot": 0, + "warm": 0, + }, + { + "name": "FCB_T CPLD", + "cpld_id": "CPLD5", + "VersionFile": {"loc": "/dev/cpld5", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for fan modules", + "slot": 0, + "warm": 0, + }, + { + "name": "FCB_B CPLD", + "cpld_id": "CPLD6", + "VersionFile": {"loc": "/dev/cpld6", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for fan modules", + "slot": 0, + "warm": 0, + }, + { + "name": "IOB FPGA", + "cpld_id": "CPLD7", + "VersionFile": {"loc": "/dev/fpga0", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for base functions", + "slot": 0, + "format": "little_endian", + "warm": 0, + }, + { + "name": "DOM FPGA", + "cpld_id": "CPLD8", + "VersionFile": {"loc": "/dev/fpga1", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for sff functions", + "slot": 0, + "format": "little_endian", + "warm": 0, + }, + { + "name": "BIOS", + "cpld_id": "CPLD9", + "VersionFile": {"cmd": "dmidecode -s bios-version", "way": "cmd"}, + "desc": "Performs initialization of hardware components during booting", + "slot": 0, + "type": "str", + "warm": 0, + }, + ], + "dcdc": [ + { + "name": "SCM_53134O_V1.0_V", + "dcdc_id": "DCDC1", + "Min": 900, + "value": { + "loc": "/sys/bus/i2c/devices/33-0040/hwmon/hwmon*/in1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 1100, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SCM_I210_V3.3_V", + "dcdc_id": "DCDC2", + "Min": 2970, + "value": { + "loc": "/sys/bus/i2c/devices/33-0040/hwmon/hwmon*/in2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 3630, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SCM_VDD3.3_V", + "dcdc_id": "DCDC3", + "Min": 2970, + "value": { + "loc": "/sys/bus/i2c/devices/33-0040/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 3630, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SCM_VDD12.0_V", + "dcdc_id": "DCDC4", + "Min": 10800, + "value": { + "loc": "/sys/bus/i2c/devices/33-0041/hwmon/hwmon*/in1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 13200, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SCM_OCM_V12.0_V", + "dcdc_id": "DCDC5", + "Min": 10800, + "value": { + "loc": "/sys/bus/i2c/devices/33-0041/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 13200, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SCM_SSD_V3.3_V", + "dcdc_id": "DCDC6", + "Min": 2970, + "value": { + "loc": "/sys/bus/i2c/devices/33-0042/hwmon/hwmon*/in1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 3630, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SCM_BMC_V3.3_V", + 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"name": "OCM_VNN_NAC_V", + "dcdc_id": "DCDC56", + "Min": 540, + "value": { + "loc": "/sys/bus/i2c/devices/5-005f/hwmon/hwmon*/in7_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 1320, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OCM_P2V5_VPP_V", + "dcdc_id": "DCDC57", + "Min": 2250, + "value": { + "loc": "/sys/bus/i2c/devices/5-005f/hwmon/hwmon*/in8_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 2750, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OCM_VCC_ANA_V", + "dcdc_id": "DCDC58", + "Min": 900, + "value": { + "loc": "/sys/bus/i2c/devices/5-005f/hwmon/hwmon*/in9_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 1100, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OCM_P3V3_STBY_V", + "dcdc_id": "DCDC59", + "Min": 2970, + "value": { + "loc": "/sys/bus/i2c/devices/5-005f/hwmon/hwmon*/in10_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 3630, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OCM_P5V_AUX_V", + "dcdc_id": "DCDC60", + "Min": 4000, + "value": { + "loc": "/sys/bus/i2c/devices/5-005f/hwmon/hwmon*/in11_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 5750, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OCM_P1V8_AUX_V", + "dcdc_id": "DCDC61", + "Min": 1690, + "value": { + "loc": "/sys/bus/i2c/devices/5-005f/hwmon/hwmon*/in12_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 1910, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OCM_P3V3_AUX_V", + "dcdc_id": "DCDC62", + "Min": 2970, + "value": { + "loc": "/sys/bus/i2c/devices/5-005f/hwmon/hwmon*/in13_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 3630, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OCM_V1P80_EMMC_V", + "dcdc_id": "DCDC63", + "Min": 1690, + "value": { + "loc": "/sys/bus/i2c/devices/5-005f/hwmon/hwmon*/in14_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 1910, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OCM_V3P3_EMMC_V", + "dcdc_id": "DCDC64", + "Min": 3100, + "value": { + "loc": "/sys/bus/i2c/devices/5-005f/hwmon/hwmon*/in15_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 3500, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OCM_XDPE_VCCIN_V", + "dcdc_id": "DCDC65", + "Min": 1350, + "value": { + "loc": "/sys/bus/i2c/devices/5-0070/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 2200, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OCM_XDPE_P1V8_V", + "dcdc_id": "DCDC66", + "Min": 1690, + "value": { + "loc": "/sys/bus/i2c/devices/5-0070/hwmon/hwmon*/in4_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 1910, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OCM_XDPE_P1V05_V", + "dcdc_id": "DCDC67", + "Min": 954, + "value": { + "loc": "/sys/bus/i2c/devices/5-006e/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 1160, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OCM_XDPE_VNN_PCH_V", + "dcdc_id": "DCDC68", + "Min": 540, + "value": { + "loc": "/sys/bus/i2c/devices/5-006e/hwmon/hwmon*/in4_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 1320, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OCM_XDPE_VNN_NAC_V", + "dcdc_id": "DCDC69", + "Min": 540, + "value": { + "loc": "/sys/bus/i2c/devices/5-0068/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 1320, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OCM_XDPE_VCC_ANA_V", + "dcdc_id": "DCDC70", + "Min": 900, + "value": { + "loc": "/sys/bus/i2c/devices/5-0068/hwmon/hwmon*/in4_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 1100, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OCM_XDPE_P1V2_VDDQ_V", + "dcdc_id": "DCDC71", + "Min": 1120, + "value": { + "loc": "/sys/bus/i2c/devices/5-005e/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 1280, + "format": "float(float(%s)/1000)", + }, + + { + "name": "FAN1_VDD12_V", + "dcdc_id": "DCDC72", + "Min": 7000, + "value": { + "loc": "/sys/bus/i2c/devices/88-0042/hwmon/hwmon*/in1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 13200, + "format": "float(float(%s)/1000)", + }, + + { + "name": "FAN3_VDD12_V", + "dcdc_id": "DCDC73", + "Min": 7000, + "value": { + "loc": "/sys/bus/i2c/devices/88-0042/hwmon/hwmon*/in2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 13200, + "format": "float(float(%s)/1000)", + }, + + { + "name": "FAN5_VDD12_V", + "dcdc_id": "DCDC74", + "Min": 7000, + "value": { + "loc": "/sys/bus/i2c/devices/88-0042/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 13200, + "format": "float(float(%s)/1000)", + }, + + { + "name": "FAN7_VDD12_V", + "dcdc_id": "DCDC75", + "Min": 7000, + "value": { + "loc": "/sys/bus/i2c/devices/89-0042/hwmon/hwmon*/in1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 13200, + "format": "float(float(%s)/1000)", + }, + + { + "name": "FAN2_VDD12_V", + "dcdc_id": "DCDC76", + "Min": 7000, + "value": { + "loc": "/sys/bus/i2c/devices/89-0042/hwmon/hwmon*/in2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 13200, + "format": "float(float(%s)/1000)", + }, + + { + "name": "FAN4_VDD12_V", + "dcdc_id": "DCDC77", + "Min": 7000, + "value": { + "loc": "/sys/bus/i2c/devices/89-0042/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 13200, + "format": "float(float(%s)/1000)", + }, + + { + "name": "FAN6_VDD12_V", + "dcdc_id": "DCDC78", + "Min": 7000, + "value": { + "loc": "/sys/bus/i2c/devices/90-0042/hwmon/hwmon*/in1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 13200, + "format": "float(float(%s)/1000)", + }, + + { + "name": "FAN8_VDD12_V", + "dcdc_id": "DCDC79", + "Min": 7000, + "value": { + "loc": "/sys/bus/i2c/devices/90-0042/hwmon/hwmon*/in2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 13200, + "format": "float(float(%s)/1000)", + }, + ], + "cpu": [ + { + "name": "cpu", + "reboot_cause_path": "/etc/sonic/.reboot/.previous-reboot-cause.txt" + } + ], + "sfps": { + "ver": '3.0', + "port_index_start": 1, + "port_num": 128, + "log_level": 2, + "eeprom_retry_times": 5, + "eeprom_retry_break_sec": 0.2, + "presence_val_is_present": 0, + "eeprom_path": "/sys/bus/i2c/devices/i2c-%d/%d-0050/eeprom", + "eeprom_path_key": [24] * 16 + [25] * 16 + [26] * 16 + [27] * 16 + [28] * 16 + [29] * 16 + [30] * 16 + [31] * 16 + } +} diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/hal-config/x86_64_micas_m2_w6940_128x1_fr4_r0_monitor.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/hal-config/x86_64_micas_m2_w6940_128x1_fr4_r0_monitor.py new file mode 100755 index 00000000000..0cbf49889c6 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/hal-config/x86_64_micas_m2_w6940_128x1_fr4_r0_monitor.py @@ -0,0 +1,219 @@ +# coding:utf-8 + + +monitor = { + "openloop": { + "linear": { + "name": "linear", + "flag": 0, + "pwm_min": 0x66, + "pwm_max": 0xcc, + "K": 11, + "tin_min": 38, + }, + "curve": { + "name": "curve", + "flag": 1, + "pwm_min": 0x66, + "pwm_max": 0xcc, + "a": -0.0249, + "b": 8.1615, + "c": -60.326, + "tin_min": 25, + }, + }, + + "pid": { + "CPU_TEMP": { + "name": "CPU_TEMP", + "flag": 1, + "type": "duty", + "pwm_min": 0x66, + "pwm_max": 0xcc, + "Kp": 0.8, + "Ki": 0.4, + "Kd": 0.3, + "target": 85, + "value": [None, None, None], + }, + "SWITCH_TEMP": { + "name": "SWITCH_TEMP", + "flag": 1, + "type": "duty", + "pwm_min": 0x66, + "pwm_max": 0xcc, + "Kp": 1.5, + "Ki": 1, + "Kd": 0.3, + "target": 80, + "value": [None, None, None], + }, + "OUTLET_TEMP": { + "name": "OUTLET_TEMP", + "flag": 1, + "type": "duty", + "pwm_min": 0x66, + "pwm_max": 0xcc, + "Kp": 2, + "Ki": 0.4, + "Kd": 0.3, + "target": 65, + "value": [None, None, None], + }, + "RLM_TEMP": { + "name": "RLM_TEMP", + "flag": 1, + "type": "duty", + "pwm_min": 0x66, + "pwm_max": 0xcc, + "Kp": 0.1, + "Ki": 0.4, + "Kd": 0, + "target": 40, + "value": [None, None, None], + }, + "BOARD_TEMP": { + "name": "BOARD_TEMP", + "flag": 1, + "type": "duty", + "pwm_min": 0x66, + "pwm_max": 0xcc, + "Kp": 2, + "Ki": 0.4, + "Kd": 0.3, + "target": 65, + "value": [None, None, None], + }, + "MOS_TEMP": { + "name": "MOS_TEMP", + "flag": 1, + "type": "duty", + "pwm_min": 0x66, + "pwm_max": 0xcc, + "Kp": 1, + "Ki": 0.4, + "Kd": 0.3, + "target": 85, + "value": [None, None, None], + }, + "Tout-Tin": { + "name": "Tout-Tin", + "flag": 0, + "type": "duty", + "pwm_min": 0x66, + "pwm_max": 0xcc, + "Kp": 8, + "Ki": 0.1, + "Kd": 0.4, + "target": 12, + "value": [None, None, None], + }, + "OE_TEMP": { + "name": "OE_TEMP", + "flag": 1, + "type": "duty", + "pwm_min": 0x66, # 40%(0x66 = 102, 102/255=0.4) + "pwm_max": 0xcc, # 80%(0xcc = 204, 204/255=0.8) + "Kp": 1.5, + "Ki": 1, + "Kd": 0.3, + "target": 85, + "value": [None, None, None], + } + }, + + "temps_threshold": { + "SWITCH_TEMP": {"name": "SWITCH_TEMP", "warning": 100, "critical": 105, "invalid": -100000, "error": -99999}, + "INLET_TEMP": {"name": "INLET_TEMP", "warning": 50, "critical": 55}, + "OUTLET_TEMP": {"name": "OUTLET_TEMP", "warning": 70, "critical": 75}, + "CPU_TEMP": {"name": "CPU_TEMP", "warning": 95, "critical": 99}, + "RLM_TEMP": {"name": "RLM_TEMP", "warning": 50, "critical": 55, "invalid": -100000, "error": -99999}, + #"Tout-Tin": {"name": "Tout-Tin", "warning": 15, "critical": 20}, + "OE_TEMP": {"name": "OE_TEMP", "warning": 95, "critical": 100, "invalid": -100000, "error": -99999}, + "BOARD_TEMP": {"name": "BOARD_TEMP", "warning": 70, "critical": 75}, + "MOS_TEMP": {"name": "MOS_TEMP", "warning": 110, "critical": 125}, + }, + + "fancontrol_para": { + "interval": 5, + "max_pwm": 0xff, + "min_pwm": 0x66, + "abnormal_pwm": 0xcc, + "warning_pwm": 0xcc, + "critical_pwm": 0xcc, + "temp_invalid_pid_pwm": 0x66, + "temp_error_pid_pwm": 0x66, + "temp_fail_num": 3, + "check_temp_fail": [ + {"temp_name": "INLET_TEMP"}, + {"temp_name": "SWITCH_TEMP"}, + {"temp_name": "CPU_TEMP"}, + {"temp_name": "MOS_TEMP"}, + {"temp_name": "BOARD_TEMP"}, + {"temp_name": "OUTLET_TEMP"}, + {"temp_name": "OE_TEMP"}, + ], + "check_temp_critical_reboot": [ + ["SWITCH_TEMP"], + ["OE_TEMP"], + ["INLET_TEMP", "OUTLET_TEMP", "CPU_TEMP", "RLM_TEMP", "BOARD_TEMP", "MOS_TEMP"], + ], + "temp_warning_num": 3, # temp over warning 3 times continuously + "temp_critical_num": 3, # temp over critical 3 times continuously + "temp_warning_countdown": 60, # 5 min warning speed after not warning + "temp_critical_countdown": 60, # 5 min full speed after not critical + "rotor_error_count": 6, # fan rotor error 6 times continuously + "inlet_mac_diff": 999, + "check_crit_reboot_flag": 1, + "check_crit_reboot_num": 3, + "check_crit_sleep_time": 20, + "psu_fan_control": 1, + "psu_absent_fullspeed_num": 0xFF, + "fan_absent_fullspeed_num": 1, + "rotor_error_fullspeed_num": 1, + "deal_over_temp_reboot_cmd": [ + {"way": "devfile", "loc": "/dev/cpld5", "offset": 0x22, "value": [0x00]}, # disable fan watchdog + {"way": "devfile", "loc": "/dev/cpld6", "offset": 0x22, "value": [0x00]}, # disable fan watchdog + {"way": "devfile", "loc": "/dev/cpld1", "offset": 0x15, "value": [0x0c]}, # cpu powroff + ], + "deal_over_temp_reboot_pwm": 0x80, # set pwm=50% + }, + + "ledcontrol_para": { + "interval": 5, + "checkpsu": 1, # 0: sys led don't follow psu led + "checkfan": 1, # 0: sys led don't follow fan led + "psu_amber_num": 1, + "fan_amber_num": 1, + "sysled_check_temp": 0, + "sysled_check_fw_up": 1, + "smbled_ctrl": 1, + "board_sys_led": [ + {"led_name": "FRONT_SYS_LED"}, + ], + "board_psu_led": [ + {"led_name": "FRONT_PSU_LED"}, + ], + "board_fan_led": [ + {"led_name": "FRONT_FAN_LED"}, + ], + "board_smb_led": [ + {"led_name": "FRONT_SMB_LED"}, + ], + "psu_air_flow_monitor": 0, + "fan_air_flow_monitor": 0, + "psu_air_flow_amber_num": 0, + "fan_air_flow_amber_num": 0, + }, + + "fw_upgrade_check": [ + [ + {"gettype": "file_exist", "judge_file": "/etc/sonic/.doing_fw_upg", "okval": True}, + ], + ], + + "otp_reboot_judge_file": { + "otp_switch_reboot_judge_file": "/etc/.otp_switch_reboot_flag", + "otp_other_reboot_judge_file": "/etc/.otp_other_reboot_flag", + }, +} diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/modules/driver/Makefile b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/modules/driver/Makefile new file mode 100644 index 00000000000..555b86425e6 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/modules/driver/Makefile @@ -0,0 +1,14 @@ +MAKEFILE_FILE_PATH = $(abspath $(lastword $(MAKEFILE_LIST))) +MAKEFILE_DIR = $(dir $(MAKEFILE_FILE_PATH)) +MODULES_DIR = $(abspath $(MAKEFILE_DIR)/../../../common/modules) +BSP_PUBLIC_PATH = $(abspath $(MAKEFILE_DIR)/../../../public/include) + +EXTRA_CFLAGS+= -I$(BSP_PUBLIC_PATH) +EXTRA_CFLAGS+= -I$(MODULES_DIR) + +obj-m := wb_pcie_dev_device.o +obj-m += wb_i2c_ocores_device.o +obj-m += wb_i2c_mux_pca954x_device.o +obj-m += wb_i2c_mux_pca954x_device_b3.o +obj-m += wb_i2c_dev_device.o +obj-m += wb_io_dev_device.o diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/modules/driver/wb_firmware_upgrade_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/modules/driver/wb_firmware_upgrade_device.c new file mode 100644 index 00000000000..39686b39af7 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/modules/driver/wb_firmware_upgrade_device.c @@ -0,0 +1,458 @@ +/* + * wb_firmware_upgrade.c + * + * ko for firmware device + */ +#include +#include +#include +#include +#include +#include + +static int g_wb_firmware_upgrade_debug = 0; +static int g_wb_firmware_upgrade_error = 0; + +module_param(g_wb_firmware_upgrade_debug, int, S_IRUGO | S_IWUSR); +module_param(g_wb_firmware_upgrade_error, int, S_IRUGO | S_IWUSR); + +#define WB_FIRMWARE_UPGRADE_DEBUG_VERBOSE(fmt, args...) do { \ + if (g_wb_firmware_upgrade_debug) { \ + printk(KERN_INFO "[WB_FIRMWARE_UPGRADE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +#define WB_FIRMWARE_UPGRADE_DEBUG_ERROR(fmt, args...) do { \ + if (g_wb_firmware_upgrade_error) { \ + printk(KERN_ERR "[WB_FIRMWARE_UPGRADE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +/* IOB FPGA */ +static firmware_upgrade_device_t firmware_upgrade_device_data0 = { + .type = "SPI_LOGIC", + .chain = 1, + .chip_index = 1, + .upg_type.sysfs = { + .dev_name = "/dev/fpga0", + .ctrl_base = 0x400, + .flash_base = 0x200000, + .test_base = 0x7F0000, + .test_size = 0x10000, + }, + .en_gpio_num = 0, + .en_logic_num = 0, +}; + +/* DOM FPGA */ +static firmware_upgrade_device_t firmware_upgrade_device_data1 = { + .type = "SPI_LOGIC", + .chain = 2, + .chip_index = 1, + .upg_type.sysfs = { + .dev_name = "/dev/fpga0", + .ctrl_base = 0x1800, + .flash_base = 0x200000, + .test_base = 0x7F0000, + .test_size = 0x10000, + }, + .en_gpio_num = 0, + .en_logic_num = 0, +}; + +/* SCM CPLD */ +static firmware_upgrade_device_t firmware_upgrade_device_data2 = { + .type = "SPI_LOGIC", + .chain = 3, + .chip_index = 1, + .upg_type.sysfs = { + .dev_name = "/dev/fpga0", + .ctrl_base = 0x1200, + .flash_base = 0x10000, + .test_base = 0x1F0000, + .test_size = 0x10000, + }, + .en_gpio_num = 0, + .en_logic_num = 0, +}; + +/* MCB CPLD */ +static firmware_upgrade_device_t firmware_upgrade_device_data3 = { + .type = "SPI_LOGIC", + .chain = 4, + .chip_index = 1, + .upg_type.sysfs = { + .dev_name = "/dev/fpga0", + .ctrl_base = 0x1000, + .flash_base = 0x10000, + .test_base = 0x1F0000, + .test_size = 0x10000, + }, + .en_gpio_num = 0, + .en_logic_num = 0, +}; + +/* SMB CPLD */ +static firmware_upgrade_device_t firmware_upgrade_device_data4 = { + .type = "SPI_LOGIC", + .chain = 5, + .chip_index = 1, + .upg_type.sysfs = { + .dev_name = "/dev/fpga0", + .ctrl_base = 0x1600, + .flash_base = 0x10000, + .test_base = 0x1F0000, + .test_size = 0x10000, + }, + .en_gpio_num = 0, + .en_logic_num = 0, +}; + +/* FCB_B CPLD */ +static firmware_upgrade_device_t firmware_upgrade_device_data5 = { + .type = "SPI_LOGIC", + .chain = 6, + .chip_index = 1, + .upg_type.sysfs = { + .dev_name = "/dev/fpga0", + .ctrl_base = 0x1a00, + .flash_base = 0x10000, + .test_base = 0x1F0000, + .test_size = 0x10000, + }, + .en_gpio_num = 0, + .en_logic_num = 0, +}; + +/* FCB_T CPLD */ +static firmware_upgrade_device_t firmware_upgrade_device_data6 = { + .type = "SPI_LOGIC", + .chain = 7, + .chip_index = 1, + .upg_type.sysfs = { + .dev_name = "/dev/fpga0", + .ctrl_base = 0x1c00, + .flash_base = 0x10000, + .test_base = 0x1F0000, + .test_size = 0x10000, + }, + .en_gpio_num = 0, + .en_logic_num = 0, +}; + +/* MAC PCIe */ +static firmware_upgrade_device_t firmware_upgrade_device_data7 = { + .type = "SPI_LOGIC", + .chain = 8, + .chip_index = 1, + .upg_type.sysfs = { + .dev_name = "/dev/fpga0", + .ctrl_base = 0x1400, + .flash_base = 0, + .test_base = 0xFF0000, + .test_size = 0x10000, + }, + .en_gpio_num = 0, + .en_logic_num = 0, +}; + +/* bios */ +static firmware_upgrade_device_t firmware_upgrade_device_data8 = { + .type = "MTD_DEV", + .chain = 9, + .chip_index = 1, + .upg_type.sysfs = { + .mtd_name = "BIOS", + .flash_base = 0x3000000, + }, + .en_gpio_num = 0, + .en_logic_num = 0, +}; + +/* IOB FPGA shaopian */ +static firmware_upgrade_device_t firmware_upgrade_device_data9 = { + .type = "SPI_LOGIC", + .chain = 10, + .chip_index = 1, + .upg_type.sysfs = { + .dev_name = "/dev/fpga0", + .ctrl_base = 0x400, + .flash_base = 0x0, + .test_base = 0x7F0000, + .test_size = 0x10000, + }, + .en_gpio_num = 0, + .en_logic_num = 0, +}; + +/* DOM FPGA shaopian */ +static firmware_upgrade_device_t firmware_upgrade_device_data10 = { + .type = "SPI_LOGIC", + .chain = 11, + .chip_index = 1, + .upg_type.sysfs = { + .dev_name = "/dev/fpga0", + .ctrl_base = 0x1800, + .flash_base = 0x0, + .test_base = 0x7F0000, + .test_size = 0x10000, + }, + .en_gpio_num = 0, + .en_logic_num = 0, +}; + +/* SCM CPLD shaopian */ +static firmware_upgrade_device_t firmware_upgrade_device_data11 = { + .type = "SPI_LOGIC", + .chain = 12, + .chip_index = 1, + .upg_type.sysfs = { + .dev_name = "/dev/fpga0", + .ctrl_base = 0x1200, + .flash_base = 0x0, + .test_base = 0x1F0000, + .test_size = 0x10000, + }, + .en_gpio_num = 0, + .en_logic_num = 0, +}; + +/* MCB CPLD shaopian */ +static firmware_upgrade_device_t firmware_upgrade_device_data12 = { + .type = "SPI_LOGIC", + .chain = 13, + .chip_index = 1, + .upg_type.sysfs = { + .dev_name = "/dev/fpga0", + .ctrl_base = 0x1000, + .flash_base = 0x0, + .test_base = 0x1F0000, + .test_size = 0x10000, + }, + .en_gpio_num = 0, + .en_logic_num = 0, +}; + +/* SMB CPLD shaopian */ +static firmware_upgrade_device_t firmware_upgrade_device_data13 = { + .type = "SPI_LOGIC", + .chain = 14, + .chip_index = 1, + .upg_type.sysfs = { + .dev_name = "/dev/fpga0", + .ctrl_base = 0x1600, + .flash_base = 0x0, + .test_base = 0x1F0000, + .test_size = 0x10000, + }, + .en_gpio_num = 0, + .en_logic_num = 0, +}; + +/* FCB_B CPLD shaopian */ +static firmware_upgrade_device_t firmware_upgrade_device_data14 = { + .type = "SPI_LOGIC", + .chain = 15, + .chip_index = 1, + .upg_type.sysfs = { + .dev_name = "/dev/fpga0", + .ctrl_base = 0x1a00, + .flash_base = 0x0, + .test_base = 0x1F0000, + .test_size = 0x10000, + }, + .en_gpio_num = 0, + .en_logic_num = 0, +}; + +/* FCB_T CPLD shaopian */ +static firmware_upgrade_device_t firmware_upgrade_device_data15 = { + .type = "SPI_LOGIC", + .chain = 16, + .chip_index = 1, + .upg_type.sysfs = { + .dev_name = "/dev/fpga0", + .ctrl_base = 0x1c00, + .flash_base = 0x0, + .test_base = 0x1F0000, + .test_size = 0x10000, + }, + .en_gpio_num = 0, + .en_logic_num = 0, +}; + +static void firmware_device_release(struct device *dev) +{ + return; +} + +static struct platform_device firmware_upgrade_device[] = { + { + .name = "firmware_sysfs", + .id = 1, + .dev = { + .platform_data = &firmware_upgrade_device_data0, + .release = firmware_device_release, + }, + }, + { + .name = "firmware_sysfs", + .id = 2, + .dev = { + .platform_data = &firmware_upgrade_device_data1, + .release = firmware_device_release, + }, + }, + { + .name = "firmware_sysfs", + .id = 3, + .dev = { + .platform_data = &firmware_upgrade_device_data2, + .release = firmware_device_release, + }, + }, + { + .name = "firmware_sysfs", + .id = 4, + .dev = { + .platform_data = &firmware_upgrade_device_data3, + .release = firmware_device_release, + }, + }, + { + .name = "firmware_sysfs", + .id = 5, + .dev = { + .platform_data = &firmware_upgrade_device_data4, + .release = firmware_device_release, + }, + }, + { + .name = "firmware_sysfs", + .id = 6, + .dev = { + .platform_data = &firmware_upgrade_device_data5, + .release = firmware_device_release, + }, + }, + { + .name = "firmware_sysfs", + .id = 7, + .dev = { + .platform_data = &firmware_upgrade_device_data6, + .release = firmware_device_release, + }, + }, + { + .name = "firmware_sysfs", + .id = 8, + .dev = { + .platform_data = &firmware_upgrade_device_data7, + .release = firmware_device_release, + }, + }, + { + .name = "firmware_sysfs", + .id = 9, + .dev = { + .platform_data = &firmware_upgrade_device_data8, + .release = firmware_device_release, + }, + }, + { + .name = "firmware_sysfs", + .id = 10, + .dev = { + .platform_data = &firmware_upgrade_device_data9, + .release = firmware_device_release, + }, + }, + { + .name = "firmware_sysfs", + .id = 11, + .dev = { + .platform_data = &firmware_upgrade_device_data10, + .release = firmware_device_release, + }, + }, + { + .name = "firmware_sysfs", + .id = 12, + .dev = { + .platform_data = &firmware_upgrade_device_data11, + .release = firmware_device_release, + }, + }, + { + .name = "firmware_sysfs", + .id = 13, + .dev = { + .platform_data = &firmware_upgrade_device_data12, + .release = firmware_device_release, + }, + }, + { + .name = "firmware_sysfs", + .id = 14, + .dev = { + .platform_data = &firmware_upgrade_device_data13, + .release = firmware_device_release, + }, + }, + { + .name = "firmware_sysfs", + .id = 15, + .dev = { + .platform_data = &firmware_upgrade_device_data14, + .release = firmware_device_release, + }, + }, + { + .name = "firmware_sysfs", + .id = 16, + .dev = { + .platform_data = &firmware_upgrade_device_data15, + .release = firmware_device_release, + }, + }, + }; + + static int __init firmware_upgrade_device_init(void) + { + int i; + int ret = 0; + firmware_upgrade_device_t *firmware_upgrade_device_data; + + WB_FIRMWARE_UPGRADE_DEBUG_VERBOSE("enter!\n"); + for (i = 0; i < ARRAY_SIZE(firmware_upgrade_device); i++) { + firmware_upgrade_device_data = firmware_upgrade_device[i].dev.platform_data; + ret = platform_device_register(&firmware_upgrade_device[i]); + if (ret < 0) { + firmware_upgrade_device_data->device_flag = -1; /* device register failed, set flag -1 */ + printk(KERN_ERR "firmware_upgrade_device id%d register failed!\n", i + 1); + } else { + firmware_upgrade_device_data->device_flag = 0; /* device register suucess, set flag 0 */ + } + } + return 0; + } + + static void __exit firmware_upgrade_device_exit(void) + { + int i; + firmware_upgrade_device_t *firmware_upgrade_device_data; + + WB_FIRMWARE_UPGRADE_DEBUG_VERBOSE("enter!\n"); + for (i = ARRAY_SIZE(firmware_upgrade_device) - 1; i >= 0; i--) { + firmware_upgrade_device_data = firmware_upgrade_device[i].dev.platform_data; + if (firmware_upgrade_device_data->device_flag == 0) { /* device register success, need unregister */ + platform_device_unregister(&firmware_upgrade_device[i]); + } + } + } + + module_init(firmware_upgrade_device_init); + module_exit(firmware_upgrade_device_exit); + MODULE_DESCRIPTION("FIRMWARE UPGRADE Devices"); + MODULE_LICENSE("GPL"); + MODULE_AUTHOR("support"); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/modules/driver/wb_i2c_dev_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/modules/driver/wb_i2c_dev_device.c new file mode 100644 index 00000000000..4fd77271d1c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/modules/driver/wb_i2c_dev_device.c @@ -0,0 +1,187 @@ +#include +#include +#include +#include +#include +#include + +#include + +static int g_wb_i2c_dev_device_debug = 0; +static int g_wb_i2c_dev_device_error = 0; + +module_param(g_wb_i2c_dev_device_debug, int, S_IRUGO | S_IWUSR); +module_param(g_wb_i2c_dev_device_error, int, S_IRUGO | S_IWUSR); + +#define WB_I2C_DEV_DEVICE_DEBUG_VERBOSE(fmt, args...) do { \ + if (g_wb_i2c_dev_device_debug) { \ + printk(KERN_INFO "[WB_I2C_DEV_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +#define WB_I2C_DEV_DEVICE_DEBUG_ERROR(fmt, args...) do { \ + if (g_wb_i2c_dev_device_error) { \ + printk(KERN_ERR "[WB_I2C_DEV_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +static i2c_dev_device_t i2c_dev_device_data0 = { + .i2c_bus = 4, + .i2c_addr = 0x0c, + .i2c_name = "cpld2", + .data_bus_width = 1, + .addr_bus_width = 1, + .per_rd_len = 256, + .per_wr_len = 256, + .i2c_len = 256, +}; + +static i2c_dev_device_t i2c_dev_device_data1 = { + .i2c_bus = 13, + .i2c_addr = 0x1d, + .i2c_name = "cpld3", + .data_bus_width = 1, + .addr_bus_width = 1, + .per_rd_len = 256, + .per_wr_len = 256, + .i2c_len = 256, +}; + +static i2c_dev_device_t i2c_dev_device_data2 = { + .i2c_bus = 20, + .i2c_addr = 0x1e, + .i2c_name = "cpld4", + .data_bus_width = 1, + .addr_bus_width = 1, + .per_rd_len = 256, + .per_wr_len = 256, + .i2c_len = 256, +}; + +static i2c_dev_device_t i2c_dev_device_data3 = { + .i2c_bus = 44, + .i2c_addr = 0x0d, + .i2c_name = "cpld5", + .data_bus_width = 1, + .addr_bus_width = 1, + .per_rd_len = 256, + .per_wr_len = 256, + .i2c_len = 256, +}; + +static i2c_dev_device_t i2c_dev_device_data4 = { + .i2c_bus = 52, + .i2c_addr = 0x0d, + .i2c_name = "cpld6", + .data_bus_width = 1, + .addr_bus_width = 1, + .per_rd_len = 256, + .per_wr_len = 256, + .i2c_len = 256, +}; + +struct i2c_board_info i2c_dev_device_info[] = { + { + .type = "wb-i2c-dev", + .platform_data = &i2c_dev_device_data0, + }, + { + .type = "wb-i2c-dev", + .platform_data = &i2c_dev_device_data1, + }, + { + .type = "wb-i2c-dev", + .platform_data = &i2c_dev_device_data2, + }, + { + .type = "wb-i2c-dev", + .platform_data = &i2c_dev_device_data3, + }, + { + .type = "wb-i2c-dev", + .platform_data = &i2c_dev_device_data4, + }, +}; + +static int __init wb_i2c_dev_device_init(void) +{ + int i; + struct i2c_adapter *adap; + struct i2c_client *client; + i2c_dev_device_t *i2c_dev_device_data; + + WB_I2C_DEV_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = 0; i < ARRAY_SIZE(i2c_dev_device_info); i++) { + i2c_dev_device_data = i2c_dev_device_info[i].platform_data; + i2c_dev_device_info[i].addr = i2c_dev_device_data->i2c_addr; + adap = i2c_get_adapter(i2c_dev_device_data->i2c_bus); + if (adap == NULL) { + i2c_dev_device_data->client = NULL; + i2c_dev_device_data->adap = NULL; + printk(KERN_ERR "get i2c bus %d adapter fail.\n", i2c_dev_device_data->i2c_bus); + continue; + } + i2c_dev_device_data->adap = adap; + client = i2c_new_client_device(adap, &i2c_dev_device_info[i]); + if (!client) { + i2c_dev_device_data->client = NULL; + printk(KERN_ERR "Failed to register i2c dev device %d at bus %d!\n", + i2c_dev_device_data->i2c_addr, i2c_dev_device_data->i2c_bus); + } else { + i2c_dev_device_data->client = client; + } + i2c_put_adapter(adap); + } + return 0; +} + +static void __exit wb_i2c_dev_device_exit(void) +{ + int i; + i2c_dev_device_t *i2c_dev_device_data; + int i2c_bus, i2c_addr; + struct i2c_adapter *adap; + + WB_I2C_DEV_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = ARRAY_SIZE(i2c_dev_device_info) - 1; i >= 0; i--) { + i2c_dev_device_data = i2c_dev_device_info[i].platform_data; + i2c_bus = i2c_dev_device_data->i2c_bus; + i2c_addr = i2c_dev_device_data->i2c_addr; + adap = i2c_get_adapter(i2c_bus); + if (adap == NULL) { + printk(KERN_WARNING "i2c adapter-%d is NULL, skip to unregister i2c client: %d-%04x\n", + i2c_bus, i2c_bus, i2c_addr); + i2c_dev_device_data->client = NULL; + i2c_dev_device_data->adap = NULL; + continue; + } + if (adap != i2c_dev_device_data->adap) { + printk(KERN_WARNING "i2c adapter-%d address changed, origin addr: %p, new addr: %p, skip to unregister i2c client: %d-%04x\n", + i2c_bus, i2c_dev_device_data->adap, adap, i2c_bus, i2c_addr); + i2c_put_adapter(adap); + i2c_dev_device_data->client = NULL; + i2c_dev_device_data->adap = NULL; + continue; + } + if (i2c_dev_device_data->client) { + WB_I2C_DEV_DEVICE_DEBUG_VERBOSE("Starting unregister i2c client: %d-%04x\n", i2c_bus, i2c_addr); + if (device_is_registered(&i2c_dev_device_data->client->dev)) { + i2c_unregister_device(i2c_dev_device_data->client); + printk(KERN_INFO "Unregister i2c client: %d-%04x success\n", i2c_bus, i2c_addr); + } else { + printk(KERN_WARNING "i2c client: %d-%04x already unregister\n", i2c_bus, i2c_addr); + } + i2c_dev_device_data->client = NULL; + } else { + printk(KERN_WARNING "i2c client: %d-%04x is NULL\n", i2c_bus, i2c_addr); + } + i2c_put_adapter(adap); + i2c_dev_device_data->adap = NULL; + } +} + +module_init(wb_i2c_dev_device_init); +module_exit(wb_i2c_dev_device_exit); +MODULE_DESCRIPTION("I2C DEV Devices"); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("support"); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/modules/driver/wb_i2c_mux_pca954x_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/modules/driver/wb_i2c_mux_pca954x_device.c new file mode 100644 index 00000000000..1996357c32b --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/modules/driver/wb_i2c_mux_pca954x_device.c @@ -0,0 +1,309 @@ +#include +#include +#include +#include +#include +#include + +#include + +static int g_wb_i2c_mux_pca954x_device_debug = 0; +static int g_wb_i2c_mux_pca954x_device_error = 0; + +module_param(g_wb_i2c_mux_pca954x_device_debug, int, S_IRUGO | S_IWUSR); +module_param(g_wb_i2c_mux_pca954x_device_error, int, S_IRUGO | S_IWUSR); + +#define WB_I2C_MUX_PCA954X_DEVICE_DEBUG_VERBOSE(fmt, args...) do { \ + if (g_wb_i2c_mux_pca954x_device_debug) { \ + printk(KERN_INFO "[WB_I2C_MUX_PCA954X_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +#define WB_I2C_MUX_PCA954X_DEVICE_DEBUG_ERROR(fmt, args...) do { \ + if (g_wb_i2c_mux_pca954x_device_error) { \ + printk(KERN_ERR "[WB_I2C_MUX_PCA954X_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data0 = { + .i2c_bus = 4, + .i2c_addr = 0x70, + .probe_disable = 1, + .select_chan_check = 0, + .close_chan_force_reset = 0, + .pca9548_base_nr = 32, + .pca9548_reset_type = PCA9548_RESET_FILE, + .rst_delay_b = 0, + .rst_delay = 1000, + .rst_delay_a = 1000, + .attr = { + .file_attr.dev_name = "/dev/cpld1", + .file_attr.offset = 0x31, + .file_attr.mask = 0x80, + .file_attr.reset_on = 0x00, + .file_attr.reset_off = 0x80, + }, +}; + +static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data1 = { + .i2c_bus = 8, + .i2c_addr = 0x70, + .probe_disable = 1, + .select_chan_check = 0, + .close_chan_force_reset = 0, + .pca9548_base_nr = 40, + .pca9548_reset_type = PCA9548_RESET_FILE, + .rst_delay_b = 0, + .rst_delay = 1000, + .rst_delay_a = 1000, + .attr = { + .file_attr.dev_name = "/dev/cpld3", + .file_attr.offset = 0x18, + .file_attr.mask = 0x01, + .file_attr.reset_on = 0x00, + .file_attr.reset_off = 0x01, + }, +}; + +static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data2 = { + .i2c_bus = 9, + .i2c_addr = 0x70, + .probe_disable = 1, + .select_chan_check = 0, + .close_chan_force_reset = 0, + .pca9548_base_nr = 48, + .pca9548_reset_type = PCA9548_RESET_FILE, + .rst_delay_b = 0, + .rst_delay = 1000, + .rst_delay_a = 1000, + .attr = { + .file_attr.dev_name = "/dev/cpld3", + .file_attr.offset = 0x16, + .file_attr.mask = 0x01, + .file_attr.reset_on = 0x00, + .file_attr.reset_off = 0x01, + }, +}; + +static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data3 = { + .i2c_bus = 15, + .i2c_addr = 0x70, + .probe_disable = 1, + .select_chan_check = 0, + .close_chan_force_reset = 0, + .pca9548_base_nr = 56, + .pca9548_reset_type = PCA9548_RESET_FILE, + .rst_delay_b = 0, + .rst_delay = 1000, + .rst_delay_a = 1000, + .attr = { + .file_attr.dev_name = "/dev/fpga0", + .file_attr.offset = 0x80, + .file_attr.mask = 0x00000004, + .file_attr.reset_on = 0x00, + .file_attr.reset_off = 0x00000004, + .file_attr.width = 4, + }, +}; + +static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data4 = { + .i2c_bus = 16, + .i2c_addr = 0x70, + .probe_disable = 1, + .select_chan_check = 0, + .close_chan_force_reset = 0, + .pca9548_base_nr = 64, + .pca9548_reset_type = PCA9548_RESET_FILE, + .rst_delay_b = 0, + .rst_delay = 1000, + .rst_delay_a = 1000, + .attr = { + .file_attr.dev_name = "/dev/fpga0", + .file_attr.offset = 0x80, + .file_attr.mask = 0x00000008, + .file_attr.reset_on = 0x00, + .file_attr.reset_off = 0x00000008, + .file_attr.width = 4, + }, +}; + +static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data5 = { + .i2c_bus = 17, + .i2c_addr = 0x70, + .probe_disable = 1, + .select_chan_check = 0, + .close_chan_force_reset = 0, + .pca9548_base_nr = 72, + .pca9548_reset_type = PCA9548_RESET_FILE, + .rst_delay_b = 0, + .rst_delay = 1000, + .rst_delay_a = 1000, + .attr = { + .file_attr.dev_name = "/dev/fpga0", + .file_attr.offset = 0x80, + .file_attr.mask = 0x00000010, + .file_attr.reset_on = 0x00, + .file_attr.reset_off = 0x00000010, + .file_attr.width = 4, + }, +}; + +static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data6 = { + .i2c_bus = 19, + .i2c_addr = 0x70, + .probe_disable = 1, + .select_chan_check = 0, + .close_chan_force_reset = 0, + .pca9548_base_nr = 80, + .pca9548_reset_type = PCA9548_RESET_FILE, + .rst_delay_b = 0, + .rst_delay = 1000, + .rst_delay_a = 1000, + .attr = { + .file_attr.dev_name = "/dev/fpga0", + .file_attr.offset = 0x80, + .file_attr.mask = 0x00000040, + .file_attr.reset_on = 0x00, + .file_attr.reset_off = 0x00000040, + .file_attr.width = 4, + }, +}; + +static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data7 = { + .i2c_bus = 12, + .i2c_addr = 0x70, + .probe_disable = 1, + .select_chan_check = 0, + .close_chan_force_reset = 0, + .pca9548_base_nr = 88, + .pca9548_reset_type = PCA9548_RESET_FILE, + .rst_delay_b = 0, + .rst_delay = 1000, + .rst_delay_a = 1000, + .attr = { + .file_attr.dev_name = "/dev/fpga0", + .file_attr.offset = 0x80, + .file_attr.mask = 0x00000400, + .file_attr.reset_on = 0x00, + .file_attr.reset_off = 0x00000400, + .file_attr.width = 4, + }, +}; + +struct i2c_board_info i2c_mux_pca954x_device_info[] = { + { + .type = "wb_pca9548", + .platform_data = &i2c_mux_pca954x_device_data0, + }, + { + .type = "wb_pca9548", + .platform_data = &i2c_mux_pca954x_device_data1, + }, + { + .type = "wb_pca9548", + .platform_data = &i2c_mux_pca954x_device_data2, + }, + { + .type = "wb_pca9548", + .platform_data = &i2c_mux_pca954x_device_data3, + }, + { + .type = "wb_pca9548", + .platform_data = &i2c_mux_pca954x_device_data4, + }, + { + .type = "wb_pca9548", + .platform_data = &i2c_mux_pca954x_device_data5, + }, + { + .type = "wb_pca9548", + .platform_data = &i2c_mux_pca954x_device_data6, + }, + { + .type = "wb_pca9548", + .platform_data = &i2c_mux_pca954x_device_data7, + }, +}; + +static int __init wb_i2c_mux_pca954x_device_init(void) +{ + int i; + struct i2c_adapter *adap; + struct i2c_client *client; + i2c_mux_pca954x_device_t *i2c_mux_pca954x_device_data; + + WB_I2C_MUX_PCA954X_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = 0; i < ARRAY_SIZE(i2c_mux_pca954x_device_info); i++) { + i2c_mux_pca954x_device_data = i2c_mux_pca954x_device_info[i].platform_data; + i2c_mux_pca954x_device_info[i].addr = i2c_mux_pca954x_device_data->i2c_addr; + adap = i2c_get_adapter(i2c_mux_pca954x_device_data->i2c_bus); + if (adap == NULL) { + i2c_mux_pca954x_device_data->adap = NULL; + i2c_mux_pca954x_device_data->client = NULL; + printk(KERN_ERR "get i2c bus %d adapter fail.\n", i2c_mux_pca954x_device_data->i2c_bus); + continue; + } + i2c_mux_pca954x_device_data->adap = adap; + client = i2c_new_client_device(adap, &i2c_mux_pca954x_device_info[i]); + if (!client) { + i2c_mux_pca954x_device_data->client = NULL; + printk(KERN_ERR "Failed to register pca954x device %d at bus %d!\n", + i2c_mux_pca954x_device_data->i2c_addr, i2c_mux_pca954x_device_data->i2c_bus); + } else { + i2c_mux_pca954x_device_data->client = client; + } + i2c_put_adapter(adap); + } + return 0; +} + +static void __exit wb_i2c_mux_pca954x_device_exit(void) +{ + int i; + i2c_mux_pca954x_device_t *i2c_mux_pca954x_device_data; + int i2c_bus, i2c_addr; + struct i2c_adapter *adap; + + WB_I2C_MUX_PCA954X_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = ARRAY_SIZE(i2c_mux_pca954x_device_info) - 1; i >= 0; i--) { + i2c_mux_pca954x_device_data = i2c_mux_pca954x_device_info[i].platform_data; + i2c_bus = i2c_mux_pca954x_device_data->i2c_bus; + i2c_addr = i2c_mux_pca954x_device_data->i2c_addr; + adap = i2c_get_adapter(i2c_bus); + if (adap == NULL) { + printk(KERN_WARNING "i2c adapter-%d is NULL, skip to unregister i2c client: %d-%04x\n", + i2c_bus, i2c_bus, i2c_addr); + i2c_mux_pca954x_device_data->client = NULL; + i2c_mux_pca954x_device_data->adap = NULL; + continue; + } + if (adap != i2c_mux_pca954x_device_data->adap) { + printk(KERN_WARNING "i2c adapter-%d address changed, origin addr: %p, new addr: %p, skip to unregister i2c client: %d-%04x\n", + i2c_bus, i2c_mux_pca954x_device_data->adap, adap, i2c_bus, i2c_addr); + i2c_put_adapter(adap); + i2c_mux_pca954x_device_data->client = NULL; + i2c_mux_pca954x_device_data->adap = NULL; + continue; + } + if (i2c_mux_pca954x_device_data->client) { + WB_I2C_MUX_PCA954X_DEVICE_DEBUG_VERBOSE("Starting unregister i2c client: %d-%04x\n", i2c_bus, i2c_addr); + if (device_is_registered(&i2c_mux_pca954x_device_data->client->dev)) { + i2c_unregister_device(i2c_mux_pca954x_device_data->client); + printk(KERN_INFO "Unregister i2c client: %d-%04x success\n", i2c_bus, i2c_addr); + } else { + printk(KERN_WARNING "i2c client: %d-%04x already unregister\n", i2c_bus,i2c_addr); + } + i2c_mux_pca954x_device_data->client = NULL; + } else { + printk(KERN_WARNING "i2c client: %d-%04x is NULL\n", i2c_bus,i2c_addr); + } + i2c_put_adapter(adap); + i2c_mux_pca954x_device_data->adap = NULL; + } +} + +module_init(wb_i2c_mux_pca954x_device_init); +module_exit(wb_i2c_mux_pca954x_device_exit); +MODULE_DESCRIPTION("I2C MUX PCA954X Devices"); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("support"); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/modules/driver/wb_i2c_mux_pca954x_device_b3.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/modules/driver/wb_i2c_mux_pca954x_device_b3.c new file mode 100644 index 00000000000..7fc76e14f1f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/modules/driver/wb_i2c_mux_pca954x_device_b3.c @@ -0,0 +1,314 @@ +/* + * wb_i2c_mux_pca954x_device_b3.c + * CPO build3 i2c-mux-pca9548 topology, fix the 9548 address under the i2c-16 to 0x74 + */ + +#include +#include +#include +#include +#include +#include + +#include + +static int g_wb_i2c_mux_pca954x_device_debug = 0; +static int g_wb_i2c_mux_pca954x_device_error = 0; + +module_param(g_wb_i2c_mux_pca954x_device_debug, int, S_IRUGO | S_IWUSR); +module_param(g_wb_i2c_mux_pca954x_device_error, int, S_IRUGO | S_IWUSR); + +#define WB_I2C_MUX_PCA954X_DEVICE_DEBUG_VERBOSE(fmt, args...) do { \ + if (g_wb_i2c_mux_pca954x_device_debug) { \ + printk(KERN_INFO "[WB_I2C_MUX_PCA954X_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +#define WB_I2C_MUX_PCA954X_DEVICE_DEBUG_ERROR(fmt, args...) do { \ + if (g_wb_i2c_mux_pca954x_device_error) { \ + printk(KERN_ERR "[WB_I2C_MUX_PCA954X_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data0 = { + .i2c_bus = 4, + .i2c_addr = 0x70, + .probe_disable = 1, + .select_chan_check = 0, + .close_chan_force_reset = 0, + .pca9548_base_nr = 32, + .pca9548_reset_type = PCA9548_RESET_FILE, + .rst_delay_b = 0, + .rst_delay = 1000, + .rst_delay_a = 1000, + .attr = { + .file_attr.dev_name = "/dev/cpld1", + .file_attr.offset = 0x31, + .file_attr.mask = 0x80, + .file_attr.reset_on = 0x00, + .file_attr.reset_off = 0x80, + }, +}; + +static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data1 = { + .i2c_bus = 8, + .i2c_addr = 0x70, + .probe_disable = 1, + .select_chan_check = 0, + .close_chan_force_reset = 0, + .pca9548_base_nr = 40, + .pca9548_reset_type = PCA9548_RESET_FILE, + .rst_delay_b = 0, + .rst_delay = 1000, + .rst_delay_a = 1000, + .attr = { + .file_attr.dev_name = "/dev/cpld3", + .file_attr.offset = 0x18, + .file_attr.mask = 0x01, + .file_attr.reset_on = 0x00, + .file_attr.reset_off = 0x01, + }, +}; + +static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data2 = { + .i2c_bus = 9, + .i2c_addr = 0x70, + .probe_disable = 1, + .select_chan_check = 0, + .close_chan_force_reset = 0, + .pca9548_base_nr = 48, + .pca9548_reset_type = PCA9548_RESET_FILE, + .rst_delay_b = 0, + .rst_delay = 1000, + .rst_delay_a = 1000, + .attr = { + .file_attr.dev_name = "/dev/cpld3", + .file_attr.offset = 0x16, + .file_attr.mask = 0x01, + .file_attr.reset_on = 0x00, + .file_attr.reset_off = 0x01, + }, +}; + +static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data3 = { + .i2c_bus = 15, + .i2c_addr = 0x70, + .probe_disable = 1, + .select_chan_check = 0, + .close_chan_force_reset = 0, + .pca9548_base_nr = 56, + .pca9548_reset_type = PCA9548_RESET_FILE, + .rst_delay_b = 0, + .rst_delay = 1000, + .rst_delay_a = 1000, + .attr = { + .file_attr.dev_name = "/dev/fpga0", + .file_attr.offset = 0x80, + .file_attr.mask = 0x00000004, + .file_attr.reset_on = 0x00, + .file_attr.reset_off = 0x00000004, + .file_attr.width = 4, + }, +}; + +static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data4 = { + .i2c_bus = 16, + .i2c_addr = 0x74, + .probe_disable = 1, + .select_chan_check = 0, + .close_chan_force_reset = 0, + .pca9548_base_nr = 64, + .pca9548_reset_type = PCA9548_RESET_FILE, + .rst_delay_b = 0, + .rst_delay = 1000, + .rst_delay_a = 1000, + .attr = { + .file_attr.dev_name = "/dev/fpga0", + .file_attr.offset = 0x80, + .file_attr.mask = 0x00000008, + .file_attr.reset_on = 0x00, + .file_attr.reset_off = 0x00000008, + .file_attr.width = 4, + }, +}; + +static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data5 = { + .i2c_bus = 17, + .i2c_addr = 0x70, + .probe_disable = 1, + .select_chan_check = 0, + .close_chan_force_reset = 0, + .pca9548_base_nr = 72, + .pca9548_reset_type = PCA9548_RESET_FILE, + .rst_delay_b = 0, + .rst_delay = 1000, + .rst_delay_a = 1000, + .attr = { + .file_attr.dev_name = "/dev/fpga0", + .file_attr.offset = 0x80, + .file_attr.mask = 0x00000010, + .file_attr.reset_on = 0x00, + .file_attr.reset_off = 0x00000010, + .file_attr.width = 4, + }, +}; + +static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data6 = { + .i2c_bus = 19, + .i2c_addr = 0x70, + .probe_disable = 1, + .select_chan_check = 0, + .close_chan_force_reset = 0, + .pca9548_base_nr = 80, + .pca9548_reset_type = PCA9548_RESET_FILE, + .rst_delay_b = 0, + .rst_delay = 1000, + .rst_delay_a = 1000, + .attr = { + .file_attr.dev_name = "/dev/fpga0", + .file_attr.offset = 0x80, + .file_attr.mask = 0x00000040, + .file_attr.reset_on = 0x00, + .file_attr.reset_off = 0x00000040, + .file_attr.width = 4, + }, +}; + +static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data7 = { + .i2c_bus = 12, + .i2c_addr = 0x70, + .probe_disable = 1, + .select_chan_check = 0, + .close_chan_force_reset = 0, + .pca9548_base_nr = 88, + .pca9548_reset_type = PCA9548_RESET_FILE, + .rst_delay_b = 0, + .rst_delay = 1000, + .rst_delay_a = 1000, + .attr = { + .file_attr.dev_name = "/dev/fpga0", + .file_attr.offset = 0x80, + .file_attr.mask = 0x00000400, + .file_attr.reset_on = 0x00, + .file_attr.reset_off = 0x00000400, + .file_attr.width = 4, + }, +}; + +struct i2c_board_info i2c_mux_pca954x_device_info[] = { + { + .type = "wb_pca9548", + .platform_data = &i2c_mux_pca954x_device_data0, + }, + { + .type = "wb_pca9548", + .platform_data = &i2c_mux_pca954x_device_data1, + }, + { + .type = "wb_pca9548", + .platform_data = &i2c_mux_pca954x_device_data2, + }, + { + .type = "wb_pca9548", + .platform_data = &i2c_mux_pca954x_device_data3, + }, + { + .type = "wb_pca9548", + .platform_data = &i2c_mux_pca954x_device_data4, + }, + { + .type = "wb_pca9548", + .platform_data = &i2c_mux_pca954x_device_data5, + }, + { + .type = "wb_pca9548", + .platform_data = &i2c_mux_pca954x_device_data6, + }, + { + .type = "wb_pca9548", + .platform_data = &i2c_mux_pca954x_device_data7, + }, +}; + +static int __init wb_i2c_mux_pca954x_device_init(void) +{ + int i; + struct i2c_adapter *adap; + struct i2c_client *client; + i2c_mux_pca954x_device_t *i2c_mux_pca954x_device_data; + + WB_I2C_MUX_PCA954X_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = 0; i < ARRAY_SIZE(i2c_mux_pca954x_device_info); i++) { + i2c_mux_pca954x_device_data = i2c_mux_pca954x_device_info[i].platform_data; + i2c_mux_pca954x_device_info[i].addr = i2c_mux_pca954x_device_data->i2c_addr; + adap = i2c_get_adapter(i2c_mux_pca954x_device_data->i2c_bus); + if (adap == NULL) { + i2c_mux_pca954x_device_data->adap = NULL; + i2c_mux_pca954x_device_data->client = NULL; + printk(KERN_ERR "get i2c bus %d adapter fail.\n", i2c_mux_pca954x_device_data->i2c_bus); + continue; + } + i2c_mux_pca954x_device_data->adap = adap; + client = i2c_new_client_device(adap, &i2c_mux_pca954x_device_info[i]); + if (!client) { + i2c_mux_pca954x_device_data->client = NULL; + printk(KERN_ERR "Failed to register pca954x device %d at bus %d!\n", + i2c_mux_pca954x_device_data->i2c_addr, i2c_mux_pca954x_device_data->i2c_bus); + } else { + i2c_mux_pca954x_device_data->client = client; + } + i2c_put_adapter(adap); + } + return 0; +} + +static void __exit wb_i2c_mux_pca954x_device_exit(void) +{ + int i; + i2c_mux_pca954x_device_t *i2c_mux_pca954x_device_data; + int i2c_bus, i2c_addr; + struct i2c_adapter *adap; + + WB_I2C_MUX_PCA954X_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = ARRAY_SIZE(i2c_mux_pca954x_device_info) - 1; i >= 0; i--) { + i2c_mux_pca954x_device_data = i2c_mux_pca954x_device_info[i].platform_data; + i2c_bus = i2c_mux_pca954x_device_data->i2c_bus; + i2c_addr = i2c_mux_pca954x_device_data->i2c_addr; + adap = i2c_get_adapter(i2c_bus); + if (adap == NULL) { + printk(KERN_WARNING "i2c adapter-%d is NULL, skip to unregister i2c client: %d-%04x\n", + i2c_bus, i2c_bus, i2c_addr); + i2c_mux_pca954x_device_data->client = NULL; + i2c_mux_pca954x_device_data->adap = NULL; + continue; + } + if (adap != i2c_mux_pca954x_device_data->adap) { + printk(KERN_WARNING "i2c adapter-%d address changed, origin addr: %p, new addr: %p, skip to unregister i2c client: %d-%04x\n", + i2c_bus, i2c_mux_pca954x_device_data->adap, adap, i2c_bus, i2c_addr); + i2c_put_adapter(adap); + i2c_mux_pca954x_device_data->client = NULL; + i2c_mux_pca954x_device_data->adap = NULL; + continue; + } + if (i2c_mux_pca954x_device_data->client) { + WB_I2C_MUX_PCA954X_DEVICE_DEBUG_VERBOSE("Starting unregister i2c client: %d-%04x\n", i2c_bus, i2c_addr); + if (device_is_registered(&i2c_mux_pca954x_device_data->client->dev)) { + i2c_unregister_device(i2c_mux_pca954x_device_data->client); + printk(KERN_INFO "Unregister i2c client: %d-%04x success\n", i2c_bus, i2c_addr); + } else { + printk(KERN_WARNING "i2c client: %d-%04x already unregister\n", i2c_bus,i2c_addr); + } + i2c_mux_pca954x_device_data->client = NULL; + } else { + printk(KERN_WARNING "i2c client: %d-%04x is NULL\n", i2c_bus,i2c_addr); + } + i2c_put_adapter(adap); + i2c_mux_pca954x_device_data->adap = NULL; + } +} + +module_init(wb_i2c_mux_pca954x_device_init); +module_exit(wb_i2c_mux_pca954x_device_exit); +MODULE_DESCRIPTION("I2C MUX PCA954X Devices"); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("support"); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/modules/driver/wb_i2c_ocores_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/modules/driver/wb_i2c_ocores_device.c new file mode 100644 index 00000000000..526922d4cda --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/modules/driver/wb_i2c_ocores_device.c @@ -0,0 +1,911 @@ +#include +#include +#include +#include +#include + +#include + +static int g_wb_i2c_ocores_device_debug = 0; +static int g_wb_i2c_ocores_device_error = 0; + +module_param(g_wb_i2c_ocores_device_debug, int, S_IRUGO | S_IWUSR); +module_param(g_wb_i2c_ocores_device_error, int, S_IRUGO | S_IWUSR); + +#define WB_I2C_OCORE_DEVICE_DEBUG_VERBOSE(fmt, args...) do { \ + if (g_wb_i2c_ocores_device_debug) { \ + printk(KERN_INFO "[WB_I2C_OCORE_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +#define WB_I2C_OCORE_DEVICE_DEBUG_ERROR(fmt, args...) do { \ + if (g_wb_i2c_ocores_device_error) { \ + printk(KERN_ERR "[WB_I2C_OCORE_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +static i2c_ocores_device_t i2c_ocores_device_data0 = { + .adap_nr = 2, + .big_endian = 0, + .dev_name = "/dev/fpga0", + .reg_access_mode = 3, + .dev_base = 0x0800, + .reg_shift = 2, + .reg_io_width = 4, + .ip_clock_khz = 125000, + .bus_clock_khz = 100, + .irq_type =1, + .irq_offset = 0, + .pci_domain = 0, + .pci_bus = 3, + .pci_slot = 0, + .pci_fn = 0, + .check_pci_id = 1, + .pci_id = 0x1ded7022, +}; + +static i2c_ocores_device_t i2c_ocores_device_data1 = { + .adap_nr = 3, + .big_endian = 0, + .dev_name = "/dev/fpga0", + .reg_access_mode = 3, + .dev_base = 0x0820, + .reg_shift = 2, + .reg_io_width = 4, + .ip_clock_khz = 125000, + .bus_clock_khz = 100, + .irq_type =1, + .irq_offset = 1, + .pci_domain = 0, + .pci_bus = 3, + .pci_slot = 0, + .pci_fn = 0, + .check_pci_id = 1, + .pci_id = 0x1ded7022, +}; + +static i2c_ocores_device_t i2c_ocores_device_data2 = { + .adap_nr = 4, + .big_endian = 0, + .dev_name = "/dev/fpga0", + .reg_access_mode = 3, + .dev_base = 0x0840, + .reg_shift = 2, + .reg_io_width = 4, + .ip_clock_khz = 125000, + .bus_clock_khz = 100, + .irq_type =1, + .irq_offset = 2, + .pci_domain = 0, + .pci_bus = 3, + .pci_slot = 0, + .pci_fn = 0, + .check_pci_id = 1, + .pci_id = 0x1ded7022, +}; + +static i2c_ocores_device_t i2c_ocores_device_data3 = { + .adap_nr = 5, + .big_endian = 0, + .dev_name = "/dev/fpga0", + .reg_access_mode = 3, + .dev_base = 0x0860, + .reg_shift = 2, + .reg_io_width = 4, + .ip_clock_khz = 125000, + .bus_clock_khz = 100, + .irq_type =1, + .irq_offset = 3, + .pci_domain = 0, + .pci_bus = 3, + .pci_slot = 0, + .pci_fn = 0, + .check_pci_id = 1, + .pci_id = 0x1ded7022, +}; + +static i2c_ocores_device_t i2c_ocores_device_data4 = { + .adap_nr = 6, + .big_endian = 0, + .dev_name = "/dev/fpga0", + .reg_access_mode = 3, + .dev_base = 0x0880, + .reg_shift = 2, + .reg_io_width = 4, + .ip_clock_khz = 125000, + .bus_clock_khz = 100, + .irq_type =1, + .irq_offset = 4, + .pci_domain = 0, + .pci_bus = 3, + .pci_slot = 0, + .pci_fn = 0, + .check_pci_id = 1, + .pci_id = 0x1ded7022, +}; + +static i2c_ocores_device_t i2c_ocores_device_data5 = { + .adap_nr = 7, + .big_endian = 0, + .dev_name = "/dev/fpga0", + .reg_access_mode = 3, + .dev_base = 0x08a0, + .reg_shift = 2, + .reg_io_width = 4, + .ip_clock_khz = 125000, + .bus_clock_khz = 100, + .irq_type =1, + .irq_offset = 5, + .pci_domain = 0, + .pci_bus = 3, + .pci_slot = 0, + .pci_fn = 0, + .check_pci_id = 1, + .pci_id = 0x1ded7022, +}; + +static i2c_ocores_device_t i2c_ocores_device_data6 = { + .adap_nr = 8, + .big_endian = 0, + .dev_name = "/dev/fpga0", + .reg_access_mode = 3, + .dev_base = 0x08c0, + .reg_shift = 2, + .reg_io_width = 4, + .ip_clock_khz = 125000, + .bus_clock_khz = 100, + .irq_type =1, + .irq_offset = 6, + .pci_domain = 0, + .pci_bus = 3, + .pci_slot = 0, + .pci_fn = 0, +}; + +static i2c_ocores_device_t i2c_ocores_device_data7 = { + .adap_nr = 9, + .big_endian = 0, + .dev_name = "/dev/fpga0", + .reg_access_mode = 3, + .dev_base = 0x08e0, + .reg_shift = 2, + .reg_io_width = 4, + .ip_clock_khz = 125000, + .bus_clock_khz = 100, + .irq_type =1, + .irq_offset = 7, + .pci_domain = 0, + .pci_bus = 3, + .pci_slot = 0, + .pci_fn = 0, + .check_pci_id = 1, + .pci_id = 0x1ded7022, +}; + +static i2c_ocores_device_t i2c_ocores_device_data8 = { + .adap_nr = 10, + .big_endian = 0, + .dev_name = "/dev/fpga0", + .reg_access_mode = 3, + .dev_base = 0x0900, + .reg_shift = 2, + .reg_io_width = 4, + .ip_clock_khz = 125000, + .bus_clock_khz = 100, + .irq_type =1, + .irq_offset = 8, + .pci_domain = 0, + .pci_bus = 3, + .pci_slot = 0, + .pci_fn = 0, + .check_pci_id = 1, + .pci_id = 0x1ded7022, +}; + +static i2c_ocores_device_t i2c_ocores_device_data9 = { + .adap_nr = 11, + .big_endian = 0, + .dev_name = "/dev/fpga0", + .reg_access_mode = 3, + .dev_base = 0x0920, + .reg_shift = 2, + .reg_io_width = 4, + .ip_clock_khz = 125000, + .bus_clock_khz = 100, + .irq_type =1, + .irq_offset = 9, + .pci_domain = 0, + .pci_bus = 3, + .pci_slot = 0, + .pci_fn = 0, + .check_pci_id = 1, + .pci_id = 0x1ded7022, +}; + +static i2c_ocores_device_t i2c_ocores_device_data10 = { + .adap_nr = 12, + .big_endian = 0, + .dev_name = "/dev/fpga0", + .reg_access_mode = 3, + .dev_base = 0x0940, + .reg_shift = 2, + .reg_io_width = 4, + .ip_clock_khz = 125000, + .bus_clock_khz = 100, + .irq_type =1, + .irq_offset = 10, + .pci_domain = 0, + .pci_bus = 3, + .pci_slot = 0, + .pci_fn = 0, + .check_pci_id = 1, + .pci_id = 0x1ded7022, +}; + +static i2c_ocores_device_t i2c_ocores_device_data11 = { + .adap_nr = 13, + .big_endian = 0, + .dev_name = "/dev/fpga0", + .reg_access_mode = 3, + .dev_base = 0x0960, + .reg_shift = 2, + .reg_io_width = 4, + .ip_clock_khz = 125000, + .bus_clock_khz = 100, + .irq_type =1, + .irq_offset = 11, + .pci_domain = 0, + .pci_bus = 3, + .pci_slot = 0, + .pci_fn = 0, + .check_pci_id = 1, + .pci_id = 0x1ded7022, +}; + +static i2c_ocores_device_t i2c_ocores_device_data12 = { + .adap_nr = 14, + .big_endian = 0, + .dev_name = "/dev/fpga0", + .reg_access_mode = 3, + .dev_base = 0x0980, + .reg_shift = 2, + .reg_io_width = 4, + .ip_clock_khz = 125000, + .bus_clock_khz = 100, + .irq_type =1, + .irq_offset = 12, + .pci_domain = 0, + .pci_bus = 3, + .pci_slot = 0, + .pci_fn = 0, + .check_pci_id = 1, + .pci_id = 0x1ded7022, +}; + +static i2c_ocores_device_t i2c_ocores_device_data13 = { + .adap_nr = 15, + .big_endian = 0, + .dev_name = "/dev/fpga0", + .reg_access_mode = 3, + .dev_base = 0x09a0, + .reg_shift = 2, + .reg_io_width = 4, + .ip_clock_khz = 125000, + .bus_clock_khz = 100, + .irq_type =1, + .irq_offset = 13, + .pci_domain = 0, + .pci_bus = 3, + .pci_slot = 0, + .pci_fn = 0, + .check_pci_id = 1, + .pci_id = 0x1ded7022, +}; + +static i2c_ocores_device_t i2c_ocores_device_data14 = { + .adap_nr = 16, + .big_endian = 0, + .dev_name = "/dev/fpga0", + .reg_access_mode = 3, + .dev_base = 0x09c0, + .reg_shift = 2, + .reg_io_width = 4, + .ip_clock_khz = 125000, + .bus_clock_khz = 100, + .irq_type =1, + .irq_offset = 14, + .pci_domain = 0, + .pci_bus = 3, + .pci_slot = 0, + .pci_fn = 0, + .check_pci_id = 1, + .pci_id = 0x1ded7022, +}; + +static i2c_ocores_device_t i2c_ocores_device_data15 = { + .adap_nr = 17, + .big_endian = 0, + .dev_name = "/dev/fpga0", + .reg_access_mode = 3, + .dev_base = 0x09e0, + .reg_shift = 2, + .reg_io_width = 4, + .ip_clock_khz = 125000, + .bus_clock_khz = 100, + .irq_type =1, + .irq_offset = 15, + .pci_domain = 0, + .pci_bus = 3, + .pci_slot = 0, + .pci_fn = 0, + .check_pci_id = 1, + .pci_id = 0x1ded7022, +}; + +static i2c_ocores_device_t i2c_ocores_device_data16 = { + .adap_nr = 18, + .big_endian = 0, + .dev_name = "/dev/fpga0", + .reg_access_mode = 3, + .dev_base = 0x0a00, + .reg_shift = 2, + .reg_io_width = 4, + .ip_clock_khz = 125000, + .bus_clock_khz = 100, + .irq_type =1, + .irq_offset = 16, + .pci_domain = 0, + .pci_bus = 3, + .pci_slot = 0, + .pci_fn = 0, + .check_pci_id = 1, + .pci_id = 0x1ded7022, +}; + +static i2c_ocores_device_t i2c_ocores_device_data17 = { + .adap_nr = 19, + .big_endian = 0, + .dev_name = "/dev/fpga0", + .reg_access_mode = 3, + .dev_base = 0x0a20, + .reg_shift = 2, + .reg_io_width = 4, + .ip_clock_khz = 125000, + .bus_clock_khz = 100, + .irq_type =1, + .irq_offset = 17, + .pci_domain = 0, + .pci_bus = 3, + .pci_slot = 0, + .pci_fn = 0, + .check_pci_id = 1, + .pci_id = 0x1ded7022, +}; + +static i2c_ocores_device_t i2c_ocores_device_data18 = { + .adap_nr = 20, + .big_endian = 0, + .dev_name = "/dev/fpga0", + .reg_access_mode = 3, + .dev_base = 0x0a40, + .reg_shift = 2, + .reg_io_width = 4, + .ip_clock_khz = 125000, + .bus_clock_khz = 100, + .irq_type =1, + .irq_offset = 18, + .pci_domain = 0, + .pci_bus = 3, + .pci_slot = 0, + .pci_fn = 0, + .check_pci_id = 1, + .pci_id = 0x1ded7022, +}; + +static i2c_ocores_device_t i2c_ocores_device_data19 = { + .adap_nr = 21, + .big_endian = 0, + .dev_name = "/dev/fpga0", + .reg_access_mode = 3, + .dev_base = 0x0a60, + .reg_shift = 2, + .reg_io_width = 4, + .ip_clock_khz = 125000, + .bus_clock_khz = 100, + .irq_type =1, + .irq_offset = 19, + .pci_domain = 0, + .pci_bus = 3, + .pci_slot = 0, + .pci_fn = 0, + .check_pci_id = 1, + .pci_id = 0x1ded7022, +}; + +static i2c_ocores_device_t i2c_ocores_device_data20 = { + .adap_nr = 22, + .big_endian = 0, + .dev_name = "/dev/fpga0", + .reg_access_mode = 3, + .dev_base = 0x0a80, + .reg_shift = 2, + .reg_io_width = 4, + .ip_clock_khz = 125000, + .bus_clock_khz = 100, + .irq_type =1, + .irq_offset = 20, + .pci_domain = 0, + .pci_bus = 3, + .pci_slot = 0, + .pci_fn = 0, + .check_pci_id = 1, + .pci_id = 0x1ded7022, +}; + +static i2c_ocores_device_t i2c_ocores_device_data21 = { + .adap_nr = 23, + .big_endian = 0, + .dev_name = "/dev/fpga0", + .reg_access_mode = 3, + .dev_base = 0x0aa0, + .reg_shift = 2, + .reg_io_width = 4, + .ip_clock_khz = 125000, + .bus_clock_khz = 100, + .irq_type =1, + .irq_offset = 21, + .pci_domain = 0, + .pci_bus = 3, + .pci_slot = 0, + .pci_fn = 0, + .check_pci_id = 1, + .pci_id = 0x1ded7022, +}; + +static i2c_ocores_device_t i2c_ocores_device_data22 = { + .adap_nr = 24, + .big_endian = 0, + .dev_name = "/dev/fpga1", + .reg_access_mode = 3, + .dev_base = 0x0800, + .reg_shift = 2, + .reg_io_width = 4, + .ip_clock_khz = 125000, + .bus_clock_khz = 100, + .irq_type =1, + .irq_offset = 0, + .pci_domain = 0, + .pci_bus = 4, + .pci_slot = 0, + .pci_fn = 0, + .check_pci_id = 1, + .pci_id = 0x1ded7021, +}; + +static i2c_ocores_device_t i2c_ocores_device_data23 = { + .adap_nr = 25, + .big_endian = 0, + .dev_name = "/dev/fpga1", + .reg_access_mode = 3, + .dev_base = 0x0820, + .reg_shift = 2, + .reg_io_width = 4, + .ip_clock_khz = 125000, + .bus_clock_khz = 100, + .irq_type =1, + .irq_offset = 1, + .pci_domain = 0, + .pci_bus = 4, + .pci_slot = 0, + .pci_fn = 0, + .check_pci_id = 1, + .pci_id = 0x1ded7021, +}; + +static i2c_ocores_device_t i2c_ocores_device_data24 = { + .adap_nr = 26, + .big_endian = 0, + .dev_name = "/dev/fpga1", + .reg_access_mode = 3, + .dev_base = 0x0840, + .reg_shift = 2, + .reg_io_width = 4, + .ip_clock_khz = 125000, + .bus_clock_khz = 100, + .irq_type =1, + .irq_offset = 2, + .pci_domain = 0, + .pci_bus = 4, + .pci_slot = 0, + .pci_fn = 0, + .check_pci_id = 1, + .pci_id = 0x1ded7021, +}; + +static i2c_ocores_device_t i2c_ocores_device_data25 = { + .adap_nr = 27, + .big_endian = 0, + .dev_name = "/dev/fpga1", + .reg_access_mode = 3, + .dev_base = 0x0860, + .reg_shift = 2, + .reg_io_width = 4, + .ip_clock_khz = 125000, + .bus_clock_khz = 100, + .irq_type =1, + .irq_offset = 3, + .pci_domain = 0, + .pci_bus = 4, + .pci_slot = 0, + .pci_fn = 0, + .check_pci_id = 1, + .pci_id = 0x1ded7021, +}; + +static i2c_ocores_device_t i2c_ocores_device_data26 = { + .adap_nr = 28, + .big_endian = 0, + .dev_name = "/dev/fpga1", + .reg_access_mode = 3, + .dev_base = 0x0880, + .reg_shift = 2, + .reg_io_width = 4, + .ip_clock_khz = 125000, + .bus_clock_khz = 100, + .irq_type =1, + .irq_offset = 4, + .pci_domain = 0, + .pci_bus = 4, + .pci_slot = 0, + .pci_fn = 0, + .check_pci_id = 1, + .pci_id = 0x1ded7021, +}; + +static i2c_ocores_device_t i2c_ocores_device_data27 = { + .adap_nr = 29, + .big_endian = 0, + .dev_name = "/dev/fpga1", + .reg_access_mode = 3, + .dev_base = 0x08a0, + .reg_shift = 2, + .reg_io_width = 4, + .ip_clock_khz = 125000, + .bus_clock_khz = 100, + .irq_type =1, + .irq_offset = 5, + .pci_domain = 0, + .pci_bus = 4, + .pci_slot = 0, + .pci_fn = 0, + .check_pci_id = 1, + .pci_id = 0x1ded7021, +}; + +static i2c_ocores_device_t i2c_ocores_device_data28 = { + .adap_nr = 30, + .big_endian = 0, + .dev_name = "/dev/fpga1", + .reg_access_mode = 3, + .dev_base = 0x08c0, + .reg_shift = 2, + .reg_io_width = 4, + .ip_clock_khz = 125000, + .bus_clock_khz = 100, + .irq_type =1, + .irq_offset = 6, + .pci_domain = 0, + .pci_bus = 4, + .pci_slot = 0, + .pci_fn = 0, + .check_pci_id = 1, + .pci_id = 0x1ded7021, +}; + +static i2c_ocores_device_t i2c_ocores_device_data29 = { + .adap_nr = 31, + .big_endian = 0, + .dev_name = "/dev/fpga1", + .reg_access_mode = 3, + .dev_base = 0x08e0, + .reg_shift = 2, + .reg_io_width = 4, + .ip_clock_khz = 125000, + .bus_clock_khz = 100, + .irq_type =1, + .irq_offset = 7, + .pci_domain = 0, + .pci_bus = 4, + .pci_slot = 0, + .pci_fn = 0, + .check_pci_id = 1, + .pci_id = 0x1ded7021, +}; + +static void wb_i2c_ocores_device_release(struct device *dev) +{ + return; +} + +static struct platform_device i2c_ocores_device[] = { + { + .name = "wb-ocores-i2c", + .id = 1, + .dev = { + .platform_data = &i2c_ocores_device_data0, + .release = wb_i2c_ocores_device_release, + }, + }, + { + .name = "wb-ocores-i2c", + .id = 2, + .dev = { + .platform_data = &i2c_ocores_device_data1, + .release = wb_i2c_ocores_device_release, + }, + }, + { + .name = "wb-ocores-i2c", + .id = 3, + .dev = { + .platform_data = &i2c_ocores_device_data2, + .release = wb_i2c_ocores_device_release, + }, + }, + { + .name = "wb-ocores-i2c", + .id = 4, + .dev = { + .platform_data = &i2c_ocores_device_data3, + .release = wb_i2c_ocores_device_release, + }, + }, + { + .name = "wb-ocores-i2c", + .id = 5, + .dev = { + .platform_data = &i2c_ocores_device_data4, + .release = wb_i2c_ocores_device_release, + }, + }, + { + .name = "wb-ocores-i2c", + .id = 6, + .dev = { + .platform_data = &i2c_ocores_device_data5, + .release = wb_i2c_ocores_device_release, + }, + }, + { + .name = "wb-ocores-i2c", + .id = 7, + .dev = { + .platform_data = &i2c_ocores_device_data6, + .release = wb_i2c_ocores_device_release, + }, + }, + { + .name = "wb-ocores-i2c", + .id = 8, + .dev = { + .platform_data = &i2c_ocores_device_data7, + .release = wb_i2c_ocores_device_release, + }, + }, + { + .name = "wb-ocores-i2c", + .id = 9, + .dev = { + .platform_data = &i2c_ocores_device_data8, + .release = wb_i2c_ocores_device_release, + }, + }, + { + .name = "wb-ocores-i2c", + .id = 10, + .dev = { + .platform_data = &i2c_ocores_device_data9, + .release = wb_i2c_ocores_device_release, + }, + }, + { + .name = "wb-ocores-i2c", + .id = 11, + .dev = { + .platform_data = &i2c_ocores_device_data10, + .release = wb_i2c_ocores_device_release, + }, + }, + { + .name = "wb-ocores-i2c", + .id = 12, + .dev = { + .platform_data = &i2c_ocores_device_data11, + .release = wb_i2c_ocores_device_release, + }, + }, + { + .name = "wb-ocores-i2c", + .id = 13, + .dev = { + .platform_data = &i2c_ocores_device_data12, + .release = wb_i2c_ocores_device_release, + }, + }, + { + .name = "wb-ocores-i2c", + .id = 14, + .dev = { + .platform_data = &i2c_ocores_device_data13, + .release = wb_i2c_ocores_device_release, + }, + }, + { + .name = "wb-ocores-i2c", + .id = 15, + .dev = { + .platform_data = &i2c_ocores_device_data14, + .release = wb_i2c_ocores_device_release, + }, + }, + { + .name = "wb-ocores-i2c", + .id = 16, + .dev = { + .platform_data = &i2c_ocores_device_data15, + .release = wb_i2c_ocores_device_release, + }, + }, + { + .name = "wb-ocores-i2c", + .id = 17, + .dev = { + .platform_data = &i2c_ocores_device_data16, + .release = wb_i2c_ocores_device_release, + }, + }, + { + .name = "wb-ocores-i2c", + .id = 18, + .dev = { + .platform_data = &i2c_ocores_device_data17, + .release = wb_i2c_ocores_device_release, + }, + }, + { + .name = "wb-ocores-i2c", + .id = 19, + .dev = { + .platform_data = &i2c_ocores_device_data18, + .release = wb_i2c_ocores_device_release, + }, + }, + { + .name = "wb-ocores-i2c", + .id = 20, + .dev = { + .platform_data = &i2c_ocores_device_data19, + .release = wb_i2c_ocores_device_release, + }, + }, + { + .name = "wb-ocores-i2c", + .id = 21, + .dev = { + .platform_data = &i2c_ocores_device_data20, + .release = wb_i2c_ocores_device_release, + }, + }, + { + .name = "wb-ocores-i2c", + .id = 22, + .dev = { + .platform_data = &i2c_ocores_device_data21, + .release = wb_i2c_ocores_device_release, + }, + }, + { + .name = "wb-ocores-i2c", + .id = 23, + .dev = { + .platform_data = &i2c_ocores_device_data22, + .release = wb_i2c_ocores_device_release, + }, + }, + { + .name = "wb-ocores-i2c", + .id = 24, + .dev = { + .platform_data = &i2c_ocores_device_data23, + .release = wb_i2c_ocores_device_release, + }, + }, + { + .name = "wb-ocores-i2c", + .id = 25, + .dev = { + .platform_data = &i2c_ocores_device_data24, + .release = wb_i2c_ocores_device_release, + }, + }, + { + .name = "wb-ocores-i2c", + .id = 26, + .dev = { + .platform_data = &i2c_ocores_device_data25, + .release = wb_i2c_ocores_device_release, + }, + }, + { + .name = "wb-ocores-i2c", + .id = 27, + .dev = { + .platform_data = &i2c_ocores_device_data26, + .release = wb_i2c_ocores_device_release, + }, + }, + { + .name = "wb-ocores-i2c", + .id = 28, + .dev = { + .platform_data = &i2c_ocores_device_data27, + .release = wb_i2c_ocores_device_release, + }, + }, + { + .name = "wb-ocores-i2c", + .id = 29, + .dev = { + .platform_data = &i2c_ocores_device_data28, + .release = wb_i2c_ocores_device_release, + }, + }, + { + .name = "wb-ocores-i2c", + .id = 30, + .dev = { + .platform_data = &i2c_ocores_device_data29, + .release = wb_i2c_ocores_device_release, + }, + }, +}; + +static int __init wb_i2c_ocores_device_init(void) +{ + int i; + int ret = 0; + i2c_ocores_device_t *i2c_ocores_device_data; + + WB_I2C_OCORE_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = 0; i < ARRAY_SIZE(i2c_ocores_device); i++) { + i2c_ocores_device_data = i2c_ocores_device[i].dev.platform_data; + ret = platform_device_register(&i2c_ocores_device[i]); + if (ret < 0) { + i2c_ocores_device_data->device_flag = -1; /* device register failed, set flag -1 */ + printk(KERN_ERR "wb-ocores-i2c.%d register failed!\n", i + 1); + } else { + i2c_ocores_device_data->device_flag = 0; /* device register suucess, set flag 0 */ + } + } + return 0; +} + +static void __exit wb_i2c_ocores_device_exit(void) +{ + int i; + i2c_ocores_device_t *i2c_ocores_device_data; + + WB_I2C_OCORE_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = ARRAY_SIZE(i2c_ocores_device) - 1; i >= 0; i--) { + i2c_ocores_device_data = i2c_ocores_device[i].dev.platform_data; + if (i2c_ocores_device_data->device_flag == 0) { /* device register success, need unregister */ + platform_device_unregister(&i2c_ocores_device[i]); + } + } +} + +module_init(wb_i2c_ocores_device_init); +module_exit(wb_i2c_ocores_device_exit); +MODULE_DESCRIPTION("I2C OCORES Devices"); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("support"); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/modules/driver/wb_io_dev_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/modules/driver/wb_io_dev_device.c new file mode 100644 index 00000000000..95ea874811e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/modules/driver/wb_io_dev_device.c @@ -0,0 +1,105 @@ +#include +#include +#include +#include +#include + +#include + +static int g_wb_io_dev_device_debug = 0; +static int g_wb_io_dev_device_error = 0; + +module_param(g_wb_io_dev_device_debug, int, S_IRUGO | S_IWUSR); +module_param(g_wb_io_dev_device_error, int, S_IRUGO | S_IWUSR); + +#define WB_IO_DEV_DEVICE_DEBUG_VERBOSE(fmt, args...) do { \ + if (g_wb_io_dev_device_debug) { \ + printk(KERN_INFO "[WB_IO_DEV_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +#define WB_IO_DEV_DEVICE_DEBUG_ERROR(fmt, args...) do { \ + if (g_wb_io_dev_device_error) { \ + printk(KERN_ERR "[WB_IO_DEV_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +/* CPU_CPLD */ +static io_dev_device_t io_dev_device_data0 = { + .io_dev_name = "cpld0", + .io_base = 0xa00, + .io_len = 0x100, + .indirect_addr = 0, +}; + +/* SCM CPLD */ +static io_dev_device_t io_dev_device_data1 = { + .io_dev_name = "cpld1", + .io_base = 0x900, + .io_len = 0x100, + .indirect_addr = 0, +}; + +static void wb_io_dev_device_release(struct device *dev) +{ + return; +} + +static struct platform_device io_dev_device[] = { + { + .name = "wb-io-dev", + .id = 1, + .dev = { + .platform_data = &io_dev_device_data0, + .release = wb_io_dev_device_release, + }, + }, + { + .name = "wb-io-dev", + .id = 2, + .dev = { + .platform_data = &io_dev_device_data1, + .release = wb_io_dev_device_release, + }, + }, +}; + +static int __init wb_io_dev_device_init(void) +{ + int i; + int ret = 0; + io_dev_device_t *io_dev_device_data; + + WB_IO_DEV_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = 0; i < ARRAY_SIZE(io_dev_device); i++) { + io_dev_device_data = io_dev_device[i].dev.platform_data; + ret = platform_device_register(&io_dev_device[i]); + if (ret < 0) { + io_dev_device_data->device_flag = -1; /* device register failed, set flag -1 */ + printk(KERN_ERR "wb-io-dev.%d register failed!\n", i + 1); + } else { + io_dev_device_data->device_flag = 0; /* device register suucess, set flag 0 */ + } + } + return 0; +} + +static void __exit wb_io_dev_device_exit(void) +{ + int i; + io_dev_device_t *io_dev_device_data; + + WB_IO_DEV_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = ARRAY_SIZE(io_dev_device) - 1; i >= 0; i--) { + io_dev_device_data = io_dev_device[i].dev.platform_data; + if (io_dev_device_data->device_flag == 0) { /* device register success, need unregister */ + platform_device_unregister(&io_dev_device[i]); + } + } +} + +module_init(wb_io_dev_device_init); +module_exit(wb_io_dev_device_exit); +MODULE_DESCRIPTION("IO DEV Devices"); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("support"); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/modules/driver/wb_pcie_dev_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/modules/driver/wb_pcie_dev_device.c new file mode 100644 index 00000000000..2cc5ea21ced --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/modules/driver/wb_pcie_dev_device.c @@ -0,0 +1,113 @@ +#include +#include +#include +#include +#include + +#include + +static int g_wb_pcie_dev_device_debug = 0; +static int g_wb_pcie_dev_device_error = 0; + +module_param(g_wb_pcie_dev_device_debug, int, S_IRUGO | S_IWUSR); +module_param(g_wb_pcie_dev_device_error, int, S_IRUGO | S_IWUSR); + +#define WB_PCIE_DEV_DEVICE_DEBUG_VERBOSE(fmt, args...) do { \ + if (g_wb_pcie_dev_device_debug) { \ + printk(KERN_INFO "[WB_PCIE_DEV_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +#define WB_PCIE_DEV_DEVICE_DEBUG_ERROR(fmt, args...) do { \ + if (g_wb_pcie_dev_device_error) { \ + printk(KERN_ERR "[WB_PCIE_DEV_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +static pci_dev_device_t pcie_dev_device_data0 = { + .pci_dev_name = "fpga0", + .pci_domain = 0x0000, + .pci_bus = 0x03, + .pci_slot = 0x00, + .pci_fn = 0, + .pci_bar = 0, + .bus_width = 4, + .check_pci_id = 1, + .pci_id = 0x1ded7022, +}; + +static pci_dev_device_t pcie_dev_device_data1 = { + .pci_dev_name = "fpga1", + .pci_domain = 0x0000, + .pci_bus = 0x04, + .pci_slot = 0x00, + .pci_fn = 0, + .pci_bar = 0, + .bus_width = 4, + .check_pci_id = 1, + .pci_id = 0x1ded7021, +}; + +static void wb_pcie_dev_device_release(struct device *dev) +{ + return; +} + +static struct platform_device pcie_dev_device[] = { + { + .name = "wb-pci-dev", + .id = 1, + .dev = { + .platform_data = &pcie_dev_device_data0, + .release = wb_pcie_dev_device_release, + }, + }, + { + .name = "wb-pci-dev", + .id = 2, + .dev = { + .platform_data = &pcie_dev_device_data1, + .release = wb_pcie_dev_device_release, + }, + }, +}; + +static int __init wb_pcie_dev_device_init(void) +{ + int i; + int ret = 0; + pci_dev_device_t *pcie_dev_device_data; + + WB_PCIE_DEV_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = 0; i < ARRAY_SIZE(pcie_dev_device); i++) { + pcie_dev_device_data = pcie_dev_device[i].dev.platform_data; + ret = platform_device_register(&pcie_dev_device[i]); + if (ret < 0) { + pcie_dev_device_data->device_flag = -1; /* device register failed, set flag -1 */ + printk(KERN_ERR "wb-pci-dev.%d register failed!\n", i + 1); + } else { + pcie_dev_device_data->device_flag = 0; /* device register suucess, set flag 0 */ + } + } + return 0; +} + +static void __exit wb_pcie_dev_device_exit(void) +{ + int i; + pci_dev_device_t *pcie_dev_device_data; + + WB_PCIE_DEV_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = ARRAY_SIZE(pcie_dev_device) - 1; i >= 0; i--) { + pcie_dev_device_data = pcie_dev_device[i].dev.platform_data; + if (pcie_dev_device_data->device_flag == 0) { /* device register success, need unregister */ + platform_device_unregister(&pcie_dev_device[i]); + } + } +} + +module_init(wb_pcie_dev_device_init); +module_exit(wb_pcie_dev_device_exit); +MODULE_DESCRIPTION("PCIE DEV Devices"); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("support"); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/s3ip_sysfs_cfg/cfg_file/CPLD.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/s3ip_sysfs_cfg/cfg_file/CPLD.cfg new file mode 100644 index 00000000000..20cbeb649c3 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/s3ip_sysfs_cfg/cfg_file/CPLD.cfg @@ -0,0 +1,44 @@ +# configuration item: I2C address of CPLD +# format: cpld_i2c_dev.bus_[cpld_slot]_[cpld_id] cpld_i2c_dev.addr_[cpld_slot]_[cpld_id] +# cpld_slot: Main card: 0, linear card: start from 1 +# cpld_id: start from 0 +# bus: I2C bus number of CPLD +# addr: I2C address of CPLD +cpld_i2c_dev.bus_0_2=4 +cpld_i2c_dev.addr_0_2=0x0c +cpld_i2c_dev.bus_0_3=13 +cpld_i2c_dev.addr_0_3=0x1d +cpld_i2c_dev.bus_0_4=20 +cpld_i2c_dev.addr_0_4=0x1e +cpld_i2c_dev.bus_0_5=44 +cpld_i2c_dev.addr_0_5=0x0d +cpld_i2c_dev.bus_0_6=52 +cpld_i2c_dev.addr_0_6=0x0d + +# configuration item: LPC address of CPLD +# format: cpld_lpc_addr_[cpld_slot]_[cpld_id] +# cpld_slot: Main card: 0, linear card: start from 1 +# cpld_id: start from 0 +cpld_lpc_dev_0_0=0xa00 +cpld_lpc_dev_0_1=0x900 + + +# configuration item: CPLD access method, lpc or i2c +# format: mode_cpld_[cpld_slot][cpld_slot]=lpc/i2c +# cpld_slot: Main card: 0, linear card: start from 1 +# cpld_id: start from 0 +mode_cpld_0_0=lpc +mode_cpld_0_1=lpc +mode_cpld_0_2=i2c +mode_cpld_0_3=i2c +mode_cpld_0_4=i2c +mode_cpld_0_5=i2c +mode_cpld_0_6=i2c + + + +# configuration item: the number of CPLD +# format: dev_num_[main_dev]_[minor_dev] +# main_dev: CPLD main_dev is 4 +# minor_dev: CPLD minor_dev not exist +dev_num_4_0=7 diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/s3ip_sysfs_cfg/cfg_file/FAN.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/s3ip_sysfs_cfg/cfg_file/FAN.cfg new file mode 100644 index 00000000000..aedb254ebd8 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/s3ip_sysfs_cfg/cfg_file/FAN.cfg @@ -0,0 +1,494 @@ +# configuration item: the number of fans +# format: dev_num_[main_dev]_[minor_dev] +# main_dev: fan main_dev is 1 +# minor_dev: fan minor_dev not exist(0) +dev_num_1_0=8 + +# configuration item: the number of rotors +# format: dev_num_[main_dev]_[minor_dev] +# main_dev: rotor main_dev is 1 +# minor_dev: rotor minor_dev is 5 +dev_num_1_5=2 + +# configuration item: fan presence status +# format: dev_present_status_[main_dev_id][fan_index] +# main_dev_id: fan main_dev_id is 1 +# fan_index: start from 1 +dev_present_status.mode_1_7=config +dev_present_status.src_1_7=cpld +dev_present_status.frmt_1_7=bit +dev_present_status.pola_1_7=negative +dev_present_status.addr_1_7=0x0005005b +dev_present_status.len_1_7=1 +dev_present_status.bit_offset_1_7=0 + +dev_present_status.mode_1_5=config +dev_present_status.src_1_5=cpld +dev_present_status.frmt_1_5=bit +dev_present_status.pola_1_5=negative +dev_present_status.addr_1_5=0x0005005b +dev_present_status.len_1_5=1 +dev_present_status.bit_offset_1_5=1 + +dev_present_status.mode_1_3=config +dev_present_status.src_1_3=cpld +dev_present_status.frmt_1_3=bit +dev_present_status.pola_1_3=negative +dev_present_status.addr_1_3=0x0005005b +dev_present_status.len_1_3=1 +dev_present_status.bit_offset_1_3=2 + +dev_present_status.mode_1_1=config +dev_present_status.src_1_1=cpld +dev_present_status.frmt_1_1=bit +dev_present_status.pola_1_1=negative +dev_present_status.addr_1_1=0x0005005b +dev_present_status.len_1_1=1 +dev_present_status.bit_offset_1_1=3 + +dev_present_status.mode_1_8=config +dev_present_status.src_1_8=cpld +dev_present_status.frmt_1_8=bit +dev_present_status.pola_1_8=negative +dev_present_status.addr_1_8=0x0006005b +dev_present_status.len_1_8=1 +dev_present_status.bit_offset_1_8=0 + +dev_present_status.mode_1_6=config +dev_present_status.src_1_6=cpld +dev_present_status.frmt_1_6=bit +dev_present_status.pola_1_6=negative +dev_present_status.addr_1_6=0x0006005b +dev_present_status.len_1_6=1 +dev_present_status.bit_offset_1_6=1 + +dev_present_status.mode_1_4=config +dev_present_status.src_1_4=cpld +dev_present_status.frmt_1_4=bit +dev_present_status.pola_1_4=negative +dev_present_status.addr_1_4=0x0006005b +dev_present_status.len_1_4=1 +dev_present_status.bit_offset_1_4=2 + +dev_present_status.mode_1_2=config +dev_present_status.src_1_2=cpld +dev_present_status.frmt_1_2=bit +dev_present_status.pola_1_2=negative +dev_present_status.addr_1_2=0x0006005b +dev_present_status.len_1_2=1 +dev_present_status.bit_offset_1_2=3 + + +# configuration item: fan rotor status +# format: fan_roll_status_[fan_id]_[motor_id] +# fan_id: start from 1 +# motor_id: start from 0 +fan_roll_status.mode_7_1=config +fan_roll_status.int_cons_7_1= +fan_roll_status.src_7_1=cpld +fan_roll_status.frmt_7_1=bit +fan_roll_status.pola_7_1=positive +fan_roll_status.fpath_7_1= +fan_roll_status.addr_7_1=0x0005005c +fan_roll_status.len_7_1=1 +fan_roll_status.bit_offset_7_1=0 + +fan_roll_status.mode_7_2=config +fan_roll_status.int_cons_7_2= +fan_roll_status.src_7_2=cpld +fan_roll_status.frmt_7_2=bit +fan_roll_status.pola_7_2=positive +fan_roll_status.fpath_7_2= +fan_roll_status.addr_7_2=0x0005005d +fan_roll_status.len_7_2=1 +fan_roll_status.bit_offset_7_2=0 + +fan_roll_status.mode_5_1=config +fan_roll_status.int_cons_5_1= +fan_roll_status.src_5_1=cpld +fan_roll_status.frmt_5_1=bit +fan_roll_status.pola_5_1=positive +fan_roll_status.fpath_5_1= +fan_roll_status.addr_5_1=0x0005005c +fan_roll_status.len_5_1=1 +fan_roll_status.bit_offset_5_1=1 + +fan_roll_status.mode_5_2=config +fan_roll_status.int_cons_5_2= +fan_roll_status.src_5_2=cpld +fan_roll_status.frmt_5_2=bit +fan_roll_status.pola_5_2=positive +fan_roll_status.fpath_5_2= +fan_roll_status.addr_5_2=0x0005005d +fan_roll_status.len_5_2=1 +fan_roll_status.bit_offset_5_2=1 + +fan_roll_status.mode_3_1=config +fan_roll_status.int_cons_3_1= +fan_roll_status.src_3_1=cpld +fan_roll_status.frmt_3_1=bit +fan_roll_status.pola_3_1=positive +fan_roll_status.fpath_3_1= +fan_roll_status.addr_3_1=0x0005005c +fan_roll_status.len_3_1=1 +fan_roll_status.bit_offset_3_1=2 + +fan_roll_status.mode_3_2=config +fan_roll_status.int_cons_3_2= +fan_roll_status.src_3_2=cpld +fan_roll_status.frmt_3_2=bit +fan_roll_status.pola_3_2=positive +fan_roll_status.fpath_3_2= +fan_roll_status.addr_3_2=0x0005005d +fan_roll_status.len_3_2=1 +fan_roll_status.bit_offset_3_2=2 + +fan_roll_status.mode_1_1=config +fan_roll_status.int_cons_1_1= +fan_roll_status.src_1_1=cpld +fan_roll_status.frmt_1_1=bit +fan_roll_status.pola_1_1=positive +fan_roll_status.fpath_1_1= +fan_roll_status.addr_1_1=0x0005005c +fan_roll_status.len_1_1=1 +fan_roll_status.bit_offset_1_1=3 + +fan_roll_status.mode_1_2=config +fan_roll_status.int_cons_1_2= +fan_roll_status.src_1_2=cpld +fan_roll_status.frmt_1_2=bit +fan_roll_status.pola_1_2=positive +fan_roll_status.fpath_1_2= +fan_roll_status.addr_1_2=0x0005005d +fan_roll_status.len_1_2=1 +fan_roll_status.bit_offset_1_2=3 + +fan_roll_status.mode_8_1=config +fan_roll_status.int_cons_8_1= +fan_roll_status.src_8_1=cpld +fan_roll_status.frmt_8_1=bit +fan_roll_status.pola_8_1=positive +fan_roll_status.fpath_8_1= +fan_roll_status.addr_8_1=0x0006005c +fan_roll_status.len_8_1=1 +fan_roll_status.bit_offset_8_1=0 + +fan_roll_status.mode_8_2=config +fan_roll_status.int_cons_8_2= +fan_roll_status.src_8_2=cpld +fan_roll_status.frmt_8_2=bit +fan_roll_status.pola_8_2=positive +fan_roll_status.fpath_8_2= +fan_roll_status.addr_8_2=0x0006005d +fan_roll_status.len_8_2=1 +fan_roll_status.bit_offset_8_2=0 + +fan_roll_status.mode_6_1=config +fan_roll_status.int_cons_6_1= +fan_roll_status.src_6_1=cpld +fan_roll_status.frmt_6_1=bit +fan_roll_status.pola_6_1=positive +fan_roll_status.fpath_6_1= +fan_roll_status.addr_6_1=0x0006005c +fan_roll_status.len_6_1=1 +fan_roll_status.bit_offset_6_1=1 + +fan_roll_status.mode_6_2=config +fan_roll_status.int_cons_6_2= +fan_roll_status.src_6_2=cpld +fan_roll_status.frmt_6_2=bit +fan_roll_status.pola_6_2=positive +fan_roll_status.fpath_6_2= +fan_roll_status.addr_6_2=0x0006005d +fan_roll_status.len_6_2=1 +fan_roll_status.bit_offset_6_2=1 + +fan_roll_status.mode_4_1=config +fan_roll_status.int_cons_4_1= +fan_roll_status.src_4_1=cpld +fan_roll_status.frmt_4_1=bit +fan_roll_status.pola_4_1=positive +fan_roll_status.fpath_4_1= +fan_roll_status.addr_4_1=0x0006005c +fan_roll_status.len_4_1=1 +fan_roll_status.bit_offset_4_1=2 + +fan_roll_status.mode_4_2=config +fan_roll_status.int_cons_4_2= +fan_roll_status.src_4_2=cpld +fan_roll_status.frmt_4_2=bit +fan_roll_status.pola_4_2=positive +fan_roll_status.fpath_4_2= +fan_roll_status.addr_4_2=0x0006005d +fan_roll_status.len_4_2=1 +fan_roll_status.bit_offset_4_2=2 + +fan_roll_status.mode_2_1=config +fan_roll_status.int_cons_2_1= +fan_roll_status.src_2_1=cpld +fan_roll_status.frmt_2_1=bit +fan_roll_status.pola_2_1=positive +fan_roll_status.fpath_2_1= +fan_roll_status.addr_2_1=0x0006005c +fan_roll_status.len_2_1=1 +fan_roll_status.bit_offset_2_1=3 + +fan_roll_status.mode_2_2=config +fan_roll_status.int_cons_2_2= +fan_roll_status.src_2_2=cpld +fan_roll_status.frmt_2_2=bit +fan_roll_status.pola_2_2=positive +fan_roll_status.fpath_2_2= +fan_roll_status.addr_2_2=0x0006005d +fan_roll_status.len_2_2=1 +fan_roll_status.bit_offset_2_2=3 + + +# configuration item: fan speed +# format: fan_speed_[fan_id]_[motor_id] +# fan_id: start from 1 +# motor_id: start from 0 +fan_speed.mode_7_1=config +fan_speed.int_cons_7_1= +fan_speed.src_7_1=cpld +fan_speed.frmt_7_1=num_bytes +fan_speed.pola_7_1=negative +fan_speed.fpath_7_1= +fan_speed.addr_7_1=0x00050094 +fan_speed.len_7_1=2 +fan_speed.bit_offset_7_1= + +fan_speed.mode_7_2=config +fan_speed.int_cons_7_2= +fan_speed.src_7_2=cpld +fan_speed.frmt_7_2=num_bytes +fan_speed.pola_7_2=negative +fan_speed.fpath_7_2= +fan_speed.addr_7_2=0x000500a0 +fan_speed.len_7_2=2 +fan_speed.bit_offset_7_2= + +fan_speed.mode_5_1=config +fan_speed.int_cons_5_1= +fan_speed.src_5_1=cpld +fan_speed.frmt_5_1=num_bytes +fan_speed.pola_5_1=negative +fan_speed.fpath_5_1= +fan_speed.addr_5_1=0x00050096 +fan_speed.len_5_1=2 +fan_speed.bit_offset_5_1= + +fan_speed.mode_5_2=config +fan_speed.int_cons_5_2= +fan_speed.src_5_2=cpld +fan_speed.frmt_5_2=num_bytes +fan_speed.pola_5_2=negative +fan_speed.fpath_5_2= +fan_speed.addr_5_2=0x000500a2 +fan_speed.len_5_2=2 +fan_speed.bit_offset_5_2= + +fan_speed.mode_3_1=config +fan_speed.int_cons_3_1= +fan_speed.src_3_1=cpld +fan_speed.frmt_3_1=num_bytes +fan_speed.pola_3_1=negative +fan_speed.fpath_3_1= +fan_speed.addr_3_1=0x00050098 +fan_speed.len_3_1=2 +fan_speed.bit_offset_3_1= + +fan_speed.mode_3_2=config +fan_speed.int_cons_3_2= +fan_speed.src_3_2=cpld +fan_speed.frmt_3_2=num_bytes +fan_speed.pola_3_2=negative +fan_speed.fpath_3_2= +fan_speed.addr_3_2=0x000500a4 +fan_speed.len_3_2=2 +fan_speed.bit_offset_3_2= + +fan_speed.mode_1_1=config +fan_speed.int_cons_1_1= +fan_speed.src_1_1=cpld +fan_speed.frmt_1_1=num_bytes +fan_speed.pola_1_1=negative +fan_speed.fpath_1_1= +fan_speed.addr_1_1=0x0005009a +fan_speed.len_1_1=2 +fan_speed.bit_offset_1_1= + +fan_speed.mode_1_2=config +fan_speed.int_cons_1_2= +fan_speed.src_1_2=cpld +fan_speed.frmt_1_2=num_bytes +fan_speed.pola_1_2=negative +fan_speed.fpath_1_2= +fan_speed.addr_1_2=0x000500a6 +fan_speed.len_1_2=2 +fan_speed.bit_offset_1_2= + +fan_speed.mode_8_1=config +fan_speed.int_cons_8_1= +fan_speed.src_8_1=cpld +fan_speed.frmt_8_1=num_bytes +fan_speed.pola_8_1=negative +fan_speed.fpath_8_1= +fan_speed.addr_8_1=0x00060094 +fan_speed.len_8_1=2 +fan_speed.bit_offset_8_1= + +fan_speed.mode_8_2=config +fan_speed.int_cons_8_2= +fan_speed.src_8_2=cpld +fan_speed.frmt_8_2=num_bytes +fan_speed.pola_8_2=negative +fan_speed.fpath_8_2= +fan_speed.addr_8_2=0x000600a0 +fan_speed.len_8_2=2 +fan_speed.bit_offset_8_2= + +fan_speed.mode_6_1=config +fan_speed.int_cons_6_1= +fan_speed.src_6_1=cpld +fan_speed.frmt_6_1=num_bytes +fan_speed.pola_6_1=negative +fan_speed.fpath_6_1= +fan_speed.addr_6_1=0x00060096 +fan_speed.len_6_1=2 +fan_speed.bit_offset_6_1= + +fan_speed.mode_6_2=config +fan_speed.int_cons_6_2= +fan_speed.src_6_2=cpld +fan_speed.frmt_6_2=num_bytes +fan_speed.pola_6_2=negative +fan_speed.fpath_6_2= +fan_speed.addr_6_2=0x000600a2 +fan_speed.len_6_2=2 +fan_speed.bit_offset_6_2= + +fan_speed.mode_4_1=config +fan_speed.int_cons_4_1= +fan_speed.src_4_1=cpld +fan_speed.frmt_4_1=num_bytes +fan_speed.pola_4_1=negative +fan_speed.fpath_4_1= +fan_speed.addr_4_1=0x00060098 +fan_speed.len_4_1=2 +fan_speed.bit_offset_4_1= + +fan_speed.mode_4_2=config +fan_speed.int_cons_4_2= +fan_speed.src_4_2=cpld +fan_speed.frmt_4_2=num_bytes +fan_speed.pola_4_2=negative +fan_speed.fpath_4_2= +fan_speed.addr_4_2=0x000600a4 +fan_speed.len_4_2=2 +fan_speed.bit_offset_4_2= + +fan_speed.mode_2_1=config +fan_speed.int_cons_2_1= +fan_speed.src_2_1=cpld +fan_speed.frmt_2_1=num_bytes +fan_speed.pola_2_1=negative +fan_speed.fpath_2_1= +fan_speed.addr_2_1=0x0006009a +fan_speed.len_2_1=2 +fan_speed.bit_offset_2_1= + +fan_speed.mode_2_2=config +fan_speed.int_cons_2_2= +fan_speed.src_2_2=cpld +fan_speed.frmt_2_2=num_bytes +fan_speed.pola_2_2=negative +fan_speed.fpath_2_2= +fan_speed.addr_2_2=0x000600a6 +fan_speed.len_2_2=2 +fan_speed.bit_offset_2_2= + + +# configuration item: fan pwm +# format: fan_ratio_[fan_id]_[motor_id] +# fan_id: start from 1 +# motor_id: start from 0 +fan_ratio.mode_7=config +fan_ratio.int_cons_7= +fan_ratio.src_7=cpld +fan_ratio.frmt_7=byte +fan_ratio.pola_7= +fan_ratio.fpath_7= +fan_ratio.addr_7=0x00050090 +fan_ratio.len_7=1 +fan_ratio.bit_offset_7= + +fan_ratio.mode_5=config +fan_ratio.int_cons_5= +fan_ratio.src_5=cpld +fan_ratio.frmt_5=byte +fan_ratio.pola_5= +fan_ratio.fpath_5= +fan_ratio.addr_5=0x00050091 +fan_ratio.len_5=1 +fan_ratio.bit_offset_5= + +fan_ratio.mode_3=config +fan_ratio.int_cons_3= +fan_ratio.src_3=cpld +fan_ratio.frmt_3=byte +fan_ratio.pola_3= +fan_ratio.fpath_3= +fan_ratio.addr_3=0x00050092 +fan_ratio.len_3=1 +fan_ratio.bit_offset_3= + +fan_ratio.mode_1=config +fan_ratio.int_cons_1= +fan_ratio.src_1=cpld +fan_ratio.frmt_1=byte +fan_ratio.pola_1= +fan_ratio.fpath_1= +fan_ratio.addr_1=0x00050093 +fan_ratio.len_1=1 +fan_ratio.bit_offset_1= + +fan_ratio.mode_8=config +fan_ratio.int_cons_8= +fan_ratio.src_8=cpld +fan_ratio.frmt_8=byte +fan_ratio.pola_8= +fan_ratio.fpath_8= +fan_ratio.addr_8=0x00060090 +fan_ratio.len_8=1 +fan_ratio.bit_offset_8= + +fan_ratio.mode_6=config +fan_ratio.int_cons_6= +fan_ratio.src_6=cpld +fan_ratio.frmt_6=byte +fan_ratio.pola_6= +fan_ratio.fpath_6= +fan_ratio.addr_6=0x00060091 +fan_ratio.len_6=1 +fan_ratio.bit_offset_6= + +fan_ratio.mode_4=config +fan_ratio.int_cons_4= +fan_ratio.src_4=cpld +fan_ratio.frmt_4=byte +fan_ratio.pola_4= +fan_ratio.fpath_4= +fan_ratio.addr_4=0x00060092 +fan_ratio.len_4=1 +fan_ratio.bit_offset_4= + +fan_ratio.mode_2=config +fan_ratio.int_cons_2= +fan_ratio.src_2=cpld +fan_ratio.frmt_2=byte +fan_ratio.pola_2= +fan_ratio.fpath_2= +fan_ratio.addr_2=0x00060093 +fan_ratio.len_2=1 +fan_ratio.bit_offset_2= diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/s3ip_sysfs_cfg/cfg_file/PSU.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/s3ip_sysfs_cfg/cfg_file/PSU.cfg new file mode 100644 index 00000000000..9ff2cd1b27c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/s3ip_sysfs_cfg/cfg_file/PSU.cfg @@ -0,0 +1,130 @@ +# configuration item: the number of psus +# format: dev_num_[main_dev]_[minor_dev] +# main_dev: psu main_dev is 2 +# minor_dev: psu minor_dev not exist(0) +dev_num_2_0=2 + +# Configuration items: PSU PMBUS i2c device +# Description: Format other_i2c_dev_[main_dev]_[psu_index] +# Note: main_dev, PSU is 2, psu_index starts from 5 for PMBUS path mapping +other_i2c_dev.bus_2_5=11 +other_i2c_dev.addr_2_5=0x58 +other_i2c_dev.bus_2_6=10 +other_i2c_dev.addr_2_6=0x58 + +# Configuration items: PMBUS register address of PSU status word +# Description: Format psu_pmbus_reg_[psu_index]_[reg_id] +# Note: reg_id 9: output status(0x79), 10: input status(0x79) +psu_pmbus_reg.mode_1_9=config +psu_pmbus_reg.src_1_9=other_i2c +psu_pmbus_reg.frmt_1_9=byte +psu_pmbus_reg.pola_1_9=negative +psu_pmbus_reg.addr_1_9=0x02050079 +psu_pmbus_reg.len_1_9=2 +psu_pmbus_reg.bit_offset_1_9= + +psu_pmbus_reg.mode_2_9=config +psu_pmbus_reg.src_2_9=other_i2c +psu_pmbus_reg.frmt_2_9=byte +psu_pmbus_reg.pola_2_9=negative +psu_pmbus_reg.addr_2_9=0x02060079 +psu_pmbus_reg.len_2_9=2 +psu_pmbus_reg.bit_offset_2_9= + +psu_pmbus_reg.mode_1_10=config +psu_pmbus_reg.src_1_10=other_i2c +psu_pmbus_reg.frmt_1_10=byte +psu_pmbus_reg.pola_1_10=negative +psu_pmbus_reg.addr_1_10=0x02050079 +psu_pmbus_reg.len_1_10=2 +psu_pmbus_reg.bit_offset_1_10= + +psu_pmbus_reg.mode_2_10=config +psu_pmbus_reg.src_2_10=other_i2c +psu_pmbus_reg.frmt_2_10=byte +psu_pmbus_reg.pola_2_10=negative +psu_pmbus_reg.addr_2_10=0x02060079 +psu_pmbus_reg.len_2_10=2 +psu_pmbus_reg.bit_offset_2_10= + + +# configuration item: psu status +# format: psu_status_[psu_index]_[status_id] +# psu_index: start from 1 +# status_id: 0: presence 1: output 2: alert +# psu2 presence status +psu_status.mode_2_0=config +psu_status.src_2_0=cpld +psu_status.frmt_2_0=bit +psu_status.pola_2_0=negative +psu_status.addr_2_0=0x00030042 +psu_status.len_2_0=1 +psu_status.bit_offset_2_0=0 + +# psu2 output status +psu_status.mode_2_1=config +psu_status.src_2_1=cpld +psu_status.frmt_2_1=bit +psu_status.pola_2_1=positive +psu_status.addr_2_1=0x00030066 +psu_status.len_2_1=1 +psu_status.bit_offset_2_1=0 + +# psu2 alert status +psu_status.mode_2_2=config +psu_status.src_2_2=cpld +psu_status.frmt_2_2=bit +psu_status.pola_2_2=negative +psu_status.addr_2_2=0x00030029 +psu_status.len_2_2=1 +psu_status.bit_offset_2_2=0 + +# psu1 presence status +psu_status.mode_1_0=config +psu_status.src_1_0=cpld +psu_status.frmt_1_0=bit +psu_status.pola_1_0=negative +psu_status.addr_1_0=0x00030042 +psu_status.len_1_0=1 +psu_status.bit_offset_1_0=1 + +# psu1 output status +psu_status.mode_1_1=config +psu_status.src_1_1=cpld +psu_status.frmt_1_1=bit +psu_status.pola_1_1=positive +psu_status.addr_1_1=0x00030066 +psu_status.len_1_1=1 +psu_status.bit_offset_1_1=1 + +# psu1 alert status +psu_status.mode_1_2=config +psu_status.src_1_2=cpld +psu_status.frmt_1_2=bit +psu_status.pola_1_2=negative +psu_status.addr_1_2=0x00030029 +psu_status.len_1_2=1 +psu_status.bit_offset_1_2=1 + +# Configuration items: Address of psu pmbus sysfs +# Description: Format hwmon_psu_[psu_index]_[config_id] +# Note: psu_index:Power supply number,start with 1 config_id 27:pmbus status reg +hwmon_psu.mode_1_27=config +hwmon_psu.int_cons_1_27=0 +hwmon_psu.src_1_27=file +hwmon_psu.frmt_1_27=buf +hwmon_psu.fpath_1_27=/sys/bus/i2c/devices/11-0058/hwmon/ +hwmon_psu.addr_1_27=0 +hwmon_psu.len_1_27=16 +hwmon_psu.bit_offset_1_27= +hwmon_psu.str_cons_1_27=status0 + +hwmon_psu.mode_2_27=config +hwmon_psu.int_cons_2_27= +hwmon_psu.src_2_27=file +hwmon_psu.frmt_2_27=buf +hwmon_psu.fpath_2_27=/sys/bus/i2c/devices/10-0058/hwmon/ +hwmon_psu.addr_2_27=0 +hwmon_psu.len_2_27=16 +hwmon_psu.bit_offset_2_27= +hwmon_psu.str_cons_2_27=status0 diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/s3ip_sysfs_cfg/cfg_file/SENSOR.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/s3ip_sysfs_cfg/cfg_file/SENSOR.cfg new file mode 100644 index 00000000000..f2cc335f100 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/s3ip_sysfs_cfg/cfg_file/SENSOR.cfg @@ -0,0 +1,78 @@ +# Number of temperature sensors on the mainboard +dev_num_0_1=2 + +# Number of voltage sensors on the mainboard +dev_num_0_2=1 + +#sensor in1 +hwmon_in.mode_0x0001_0x00=config +hwmon_in.int_cons_0x0001_0x00=0 +hwmon_in.src_0x0001_0x00=cpld +hwmon_in.frmt_0x0001_0x00=num_bytes +hwmon_in.addr_0x0001_0x00=0x000100ea +hwmon_in.len_0x0001_0x00=2 +hwmon_in.int_extra1_0x0001_0x00=0x000100ea +hwmon_in.int_extra2_0x0001_0x00=1000 +hwmon_in.int_extra3_0x0001_0x00=1 + +hwmon_in.mode_0x0001_0x01=str_constant +hwmon_in.str_cons_0x0001_0x01=RTC_V3.3_V + +hwmon_in.mode_0x0001_0x02=str_constant +hwmon_in.str_cons_0x0001_0x02=cpld + +hwmon_in.mode_0x0001_0x03=str_constant +hwmon_in.str_cons_0x0001_0x03=3300 + +hwmon_in.mode_0x0001_0x05=str_constant +hwmon_in.str_cons_0x0001_0x05=2000 + +# mac_temp_min +hwmon_temp.mode_0x0001_0x00=config +hwmon_temp.src_0x0001_0x00=cpld +hwmon_temp.addr_0x0001_0x00=0x0004002a +hwmon_temp.frmt_0x0001_0x00=num_bytes +hwmon_temp.len_0x0001_0x00=2 +hwmon_temp.pola_0x0001_0x00=positive +hwmon_temp.str_cons_0x0001_0x00=temp1_input +hwmon_temp.int_extra1_0x0001_0x00=4 + +hwmon_temp.mode_0x0001_0x01=str_constant +hwmon_temp.str_cons_0x0001_0x01=MAC_TEPM_MIN + +hwmon_temp.mode_0x0001_0x02=str_constant +hwmon_temp.str_cons_0x0001_0x02=CPLD + +hwmon_temp.mode_0x0001_0x03=str_constant +hwmon_temp.str_cons_0x0001_0x03=105000 + +hwmon_temp.mode_0x0001_0x04=str_constant +hwmon_temp.str_cons_0x0001_0x04=99000 + +hwmon_temp.mode_0x0001_0x05=str_constant +hwmon_temp.str_cons_0x0001_0x05=-30000 + +# mac_temp_max +hwmon_temp.mode_0x0002_0x00=config +hwmon_temp.src_0x0002_0x00=cpld +hwmon_temp.addr_0x0002_0x00=0x0004002c +hwmon_temp.frmt_0x0002_0x00=num_bytes +hwmon_temp.len_0x0002_0x00=2 +hwmon_temp.pola_0x0002_0x00=positive +hwmon_temp.str_cons_0x0002_0x00=temp1_input +hwmon_temp.int_extra1_0x0002_0x00=4 + +hwmon_temp.mode_0x0002_0x01=str_constant +hwmon_temp.str_cons_0x0002_0x01=MAC_TEPM_MAX + +hwmon_temp.mode_0x0002_0x02=str_constant +hwmon_temp.str_cons_0x0002_0x02=CPLD + +hwmon_temp.mode_0x0002_0x03=str_constant +hwmon_temp.str_cons_0x0002_0x03=105000 + +hwmon_temp.mode_0x0002_0x04=str_constant +hwmon_temp.str_cons_0x0002_0x04=99000 + +hwmon_temp.mode_0x0002_0x05=str_constant +hwmon_temp.str_cons_0x0002_0x05=-30000 \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/s3ip_sysfs_cfg/file_name/0x40bd b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/s3ip_sysfs_cfg/file_name/0x40bd new file mode 100644 index 00000000000..0ce456333ed --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/s3ip_sysfs_cfg/file_name/0x40bd @@ -0,0 +1,4 @@ +CPLD +FAN +PSU +SENSOR diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/s3ip_sysfs_cfg/file_name/0x40d9 b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/s3ip_sysfs_cfg/file_name/0x40d9 new file mode 100644 index 00000000000..0ce456333ed --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/s3ip_sysfs_cfg/file_name/0x40d9 @@ -0,0 +1,4 @@ +CPLD +FAN +PSU +SENSOR diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/setup.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/setup.py new file mode 100755 index 00000000000..6c3916921ab --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4-pure-pd/setup.py @@ -0,0 +1,39 @@ +from setuptools import setup + +setup( + name='sonic-platform', + version='1.0', + description='SONiC platform API implementation', + license='Apache 2.0', + author='SONiC Team', + author_email='support', + url='', + maintainer='support', + maintainer_email='', + packages=[ + 'sonic_platform', + 'plat_hal', + 'wbutil', + 'eepromutil', + 'hal-config', + 'config', + ], + py_modules=[ + 'hal_pltfm', + 'platform_util', + 'platform_intf', + ], + classifiers=[ + 'Development Status :: 3 - Alpha', + 'Environment :: Plugins', + 'Intended Audience :: Developers', + 'Intended Audience :: Information Technology', + 'Intended Audience :: System Administrators', + 'License :: OSI Approved :: Apache Software License', + 'Natural Language :: English', + 'Operating System :: POSIX :: Linux', + 'Programming Language :: Python :: 3.7', + 'Topic :: Utilities', + ], + keywords='sonic SONiC platform PLATFORM', +) diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/Makefile b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/Makefile new file mode 100755 index 00000000000..594b6cf7212 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/Makefile @@ -0,0 +1,29 @@ +PWD = $(shell pwd) +DIR_KERNEL_SRC = $(PWD)/modules/driver +EXTRA_CFLAGS:= -I$(M)/include +EXTRA_CFLAGS+= -Wall +SUB_BUILD_DIR = $(PWD)/build +INSTALL_DIR = $(SUB_BUILD_DIR)/$(KERNEL_SRC)/$(INSTALL_MOD_DIR) +INSTALL_SCRIPT_DIR = $(SUB_BUILD_DIR)/usr/local/bin +INSTALL_LIB_DIR = $(SUB_BUILD_DIR)/usr/lib/python3/dist-packages +INSTALL_UPGRADE_TEST_DIR = $(SUB_BUILD_DIR)/etc/.upgrade_test +INSTALL_S3IP_SYSFS_CFG_DIR = $(SUB_BUILD_DIR)/etc/s3ip_sysfs_cfg +cpo_dir = $(PWD)/cpo +all: + $(MAKE) -C $(cpo_dir) + $(MAKE) -C $(KBUILD_OUTPUT) M=$(DIR_KERNEL_SRC) modules + @if [ ! -d ${INSTALL_DIR} ]; then mkdir -p ${INSTALL_DIR} ;fi + cp -r $(DIR_KERNEL_SRC)/*.ko $(INSTALL_DIR) + @if [ ! -d ${INSTALL_SCRIPT_DIR} ]; then mkdir -p ${INSTALL_SCRIPT_DIR} ;fi + cp -r $(PWD)/config/* $(INSTALL_SCRIPT_DIR) + @if [ ! -d ${INSTALL_LIB_DIR} ]; then mkdir -p ${INSTALL_LIB_DIR} ;fi + @if [ -d $(PWD)/hal-config/ ]; then cp -r $(PWD)/hal-config/* ${INSTALL_LIB_DIR} ;fi + @if [ ! -d ${INSTALL_UPGRADE_TEST_DIR} ]; then mkdir -p ${INSTALL_UPGRADE_TEST_DIR} ;fi + @if [ -d $(PWD)/.upgrade_test/ ]; then cp -r $(PWD)/.upgrade_test/* ${INSTALL_UPGRADE_TEST_DIR} ;fi + @if [ ! -d ${INSTALL_S3IP_SYSFS_CFG_DIR} ]; then mkdir -p ${INSTALL_S3IP_SYSFS_CFG_DIR} ;fi + @if [ -d $(PWD)/s3ip_sysfs_cfg/ ]; then cp -r $(PWD)/s3ip_sysfs_cfg/* ${INSTALL_S3IP_SYSFS_CFG_DIR} ;fi +clean: + rm -f ${DIR_KERNEL_SRC}/*.o ${DIR_KERNEL_SRC}/*.ko ${DIR_KERNEL_SRC}/*.mod.c ${DIR_KERNEL_SRC}/.*.cmd + rm -f ${DIR_KERNEL_SRC}/Module.markers ${DIR_KERNEL_SRC}/Module.symvers ${DIR_KERNEL_SRC}/modules.order + rm -rf ${DIR_KERNEL_SRC}/.tmp_versions + rm -rf $(SUB_BUILD_DIR) diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/config/x86_64_micas_m2_w6940_128x1_fr4_r0_0x40d9_base_config.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/config/x86_64_micas_m2_w6940_128x1_fr4_r0_0x40d9_base_config.py new file mode 100755 index 00000000000..bf344da382a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/config/x86_64_micas_m2_w6940_128x1_fr4_r0_0x40d9_base_config.py @@ -0,0 +1,46 @@ +#!/usr/bin/python +# -*- coding: UTF-8 -*- + +DRIVERLISTS = [ + {"name": "wb_i2c_i801", "delay": 1, "removable": 0}, + {"name": "i2c_dev", "delay": 0, "removable": 0}, + {"name": "wb_i2c_algo_bit", "delay": 0}, + {"name": "wb_i2c_gpio", "delay": 0}, + {"name": "i2c_mux", "delay": 0, "removable": 0}, + {"name": "wb_i2c_gpio_device gpio_sda=181 gpio_scl=180 gpio_chip_name=INTC3001:00 bus_num=1", "delay": 0}, + {"name": "platform_common dfd_my_type=0x40d9", "delay": 0}, + {"name": "wb_logic_dev_common", "delay":0}, + {"name": "wb_fpga_pcie", "delay": 0}, + {"name": "wb_pcie_dev", "delay": 0}, + {"name": "wb_pcie_dev_device", "delay": 0}, + {"name": "wb_i2c_ocores", "delay": 0}, + {"name": "wb_i2c_ocores_device", "delay": 0}, + {"name": "wb_i2c_mux_pca9641", "delay": 0}, + {"name": "wb_i2c_mux_pca954x", "delay": 0}, + {"name": "wb_i2c_mux_pca954x_device_b3", "delay": 1}, + {"name": "wb_pmbus_core", "delay": 0}, + {"name": "wb_csu550", "delay": 0}, +] + +DEVICE = [ + {"name": "wb_fsp1200", "bus": 10, "loc": 0x58}, +] + +INIT_PARAM = [] + +FINISH_PARAM = [] + +SECONDARY_SUBVERSION_DECODE = {"ECD26020050":"DC", + "default":"AC"} + +SUBVERSION_CONFIG = {"get_value" : {"gettype":'io', 'io_addr':"0x907"}} + +SECONDARY_SUBVERSION_CONFIG ={"get_value" : {"loc": [ + "10-0058/hwmon/hwmon*/mfr_model", + "10-0058/mfr_model", + "10-0058/device_name", + "10-0058/name", + "10-0058/hwmon/hwmon*/device_name", + "10-0058/hwmon/hwmon*/name", + ],"gettype": "sysfs"}, + "decode_value":SECONDARY_SUBVERSION_DECODE, "default":"AC"} diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/config/x86_64_micas_m2_w6940_128x1_fr4_r0_0x40d9_config.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/config/x86_64_micas_m2_w6940_128x1_fr4_r0_0x40d9_config.py new file mode 100755 index 00000000000..6a09dc9be63 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/config/x86_64_micas_m2_w6940_128x1_fr4_r0_0x40d9_config.py @@ -0,0 +1,3223 @@ +#!/usr/bin/python +# -*- coding: UTF-8 -*- + +# CPO build3 configuration file + +from platform_common import * + +STARTMODULE = { + "hal_fanctrl": 1, + "hal_ledctrl": 1, + "avscontrol": 1, + "dev_monitor": 1, + "tty_console": 0, + "reboot_cause": 1, + "pmon_syslog": 1, + "sff_temp_polling": 1, + "generate_airflow": 0, + "product_name": 1, + "generate_mgmt_version": 0, + "set_fw_mac": 1, +} + +DEV_MONITOR_PARAM = { + "polling_time": 10, + "psus": [ + { + "name": "psu2", + "present": {"gettype": "i2c", "bus": 13, "loc": 0x1d, "offset": 0x42, "presentbit": 0, "okval": 0}, + "device": [ + {"id": "psu2pmbus", "name": "wb_fsp1200", "bus": 10, "loc": 0x58, "attr": "hwmon"}, + {"id": "psu2frue2", "name": "wb_24c02", "bus": 10, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "psu1", + "present": {"gettype": "i2c", "bus": 13, "loc": 0x1d, "offset": 0x42, "presentbit": 1, "okval": 0}, + "device": [ + {"id": "psu1pmbus", "name": "wb_fsp1200", "bus": 11, "loc": 0x58, "attr": "hwmon"}, + {"id": "psu1frue2", "name": "wb_24c02", "bus": 11, "loc": 0x50, "attr": "eeprom"}, + ], + }, + ], + "fans": [ + { + "name": "fan7", + "present": {"gettype": "i2c", "bus": 44, "loc": 0x0d, "offset": 0x5b, "presentbit": 0, "okval": 0}, + "device": [ + {"id": "fan7frue2", "name": "wb_24c64", "bus": 43, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "fan5", + "present": {"gettype": "i2c", "bus": 44, "loc": 0x0d, "offset": 0x5b, "presentbit": 1, "okval": 0}, + "device": [ + {"id": "fan5frue2", "name": "wb_24c64", "bus": 42, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "fan3", + "present": {"gettype": "i2c", "bus": 44, "loc": 0x0d, "offset": 0x5b, "presentbit": 2, "okval": 0}, + "device": [ + {"id": "fan3frue2", "name": "wb_24c64", "bus": 41, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "fan1", + "present": {"gettype": "i2c", "bus": 44, "loc": 0x0d, "offset": 0x5b, "presentbit": 3, "okval": 0}, + "device": [ + {"id": "fan1frue2", "name": "wb_24c64", "bus":40, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "fan8", + "present": {"gettype": "i2c", "bus": 52, "loc": 0x0d, "offset": 0x5b, "presentbit": 0, "okval": 0}, + "device": [ + {"id": "fan8frue2", "name": "wb_24c64", "bus": 51, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "fan6", + "present": {"gettype": "i2c", "bus": 52, "loc": 0x0d, "offset": 0x5b, "presentbit": 1, "okval": 0}, + "device": [ + {"id": "fan6frue2", "name": "wb_24c64", "bus": 50, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "fan4", + "present": {"gettype": "i2c", "bus": 52, "loc": 0x0d, "offset": 0x5b, "presentbit": 2, "okval": 0}, + "device": [ + {"id": "fan4frue2", "name": "wb_24c64", "bus": 49, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "fan2", + "present": {"gettype": "i2c", "bus": 52, "loc": 0x0d, "offset": 0x5b, "presentbit": 3, "okval": 0}, + "device": [ + {"id": "fan2frue2", "name": "wb_24c64", "bus": 48, "loc": 0x50, "attr": "eeprom"}, + ], + }, + ], + "others": [ + { + "name": "eeprom", + "device": [ + {"id": "eeprom_1", "name": "wb_24c02", "bus": 1, "loc": 0x56, "attr": "eeprom"}, + {"id": "eeprom_2", "name": "wb_24c02", "bus": 1, "loc": 0x57, "attr": "eeprom"}, + {"id": "eeprom_3", "name": "wb_24c02", "bus": 2, "loc": 0x51, "attr": "eeprom"}, + {"id": "eeprom_4", "name": "wb_24c02", "bus": 3, "loc": 0x51, "attr": "eeprom"}, + {"id": "eeprom_5", "name": "wb_24c02", "bus": 32, "loc": 0x52, "attr": "eeprom"}, + {"id": "eeprom_6", "name": "wb_24c02", "bus": 12, "loc": 0x57, "attr": "eeprom"}, + ], + }, + { + "name": "oe_mcu", + "device": [ + {"id": "oe_mcu_1", "name": "wb_24c02", "bus": 24, "loc": 0x50, "attr": "eeprom"}, + {"id": "oe_mcu_2", "name": "wb_24c02", "bus": 25, "loc": 0x50, "attr": "eeprom"}, + {"id": "oe_mcu_3", "name": "wb_24c02", "bus": 26, "loc": 0x50, "attr": "eeprom"}, + {"id": "oe_mcu_4", "name": "wb_24c02", "bus": 27, "loc": 0x50, "attr": "eeprom"}, + {"id": "oe_mcu_5", "name": "wb_24c02", "bus": 28, "loc": 0x50, "attr": "eeprom"}, + {"id": "oe_mcu_6", "name": "wb_24c02", "bus": 29, "loc": 0x50, "attr": "eeprom"}, + {"id": "oe_mcu_7", "name": "wb_24c02", "bus": 30, "loc": 0x50, "attr": "eeprom"}, + {"id": "oe_mcu_8", "name": "wb_24c02", "bus": 31, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "tmp275", + "device": [ + {"id": "tmp275_1", "name": "wb_tmp275", "bus": 34, "loc": 0x4c, "attr": "hwmon"}, + {"id": "tmp275_2", "name": "wb_tmp275", "bus": 35, "loc": 0x4d, "attr": "hwmon"}, + {"id": "tmp275_3", "name": "wb_tmp275", "bus": 8, "loc": 0x48, "attr": "hwmon"}, + {"id": "tmp275_4", "name": "wb_tmp275", "bus": 8, "loc": 0x49, "attr": "hwmon"}, + {"id": "tmp275_5", "name": "wb_tmp275", "bus": 9, "loc": 0x48, "attr": "hwmon"}, + {"id": "tmp275_6", "name": "wb_tmp275", "bus": 9, "loc": 0x49, "attr": "hwmon"}, + {"id": "tmp275_7", "name": "wb_tmp275", "bus": 14, "loc": 0x48, "attr": "hwmon"}, + {"id": "tmp275_8", "name": "wb_tmp275", "bus": 14, "loc": 0x49, "attr": "hwmon"}, + {"id": "tmp275_9", "name": "wb_tmp275", "bus": 14, "loc": 0x4b, "attr": "hwmon"}, + ], + }, + { + "name": "ina3221", + "device": [ + {"id": "ina3221_1", "name": "wb_ina3221", "bus": 33, "loc": 0x40, "attr": "hwmon"}, + {"id": "ina3221_2", "name": "wb_ina3221", "bus": 33, "loc": 0x41, "attr": "hwmon"}, + {"id": "ina3221_3", "name": "wb_ina3221", "bus": 33, "loc": 0x42, "attr": "hwmon"}, + {"id": "ina3221_4", "name": "wb_ina3221", "bus": 12, "loc": 0x40, "attr": "hwmon"}, + {"id": "ina3221_5", "name": "wb_ina3221", "bus": 12, "loc": 0x41, "attr": "hwmon"}, + {"id": "ina3221_6", "name": "wb_ina3221", "bus": 56, "loc": 0x40, "attr": "hwmon"}, + {"id": "ina3221_7", "name": "wb_ina3221", "bus": 56, "loc": 0x41, "attr": "hwmon"}, + {"id": "ina3221_8", "name": "wb_ina3221", "bus": 57, "loc": 0x40, "attr": "hwmon"}, + {"id": "ina3221_9", "name": "wb_ina3221", "bus": 58, "loc": 0x40, "attr": "hwmon"}, + {"id": "ina3221_10", "name": "wb_ina3221", "bus": 59, "loc": 0x40, "attr": "hwmon"}, + {"id": "ina3221_11", "name": "wb_ina3221", "bus": 60, "loc": 0x40, "attr": "hwmon"}, + {"id": "ina3221_12", "name": "wb_ina3221", "bus": 61, "loc": 0x40, "attr": "hwmon"}, + {"id": "ina3221_13", "name": "wb_ina3221", "bus": 62, "loc": 0x40, "attr": "hwmon"}, + {"id": "ina3221_14", "name": "wb_ina3221", "bus": 63, "loc": 0x40, "attr": "hwmon"}, + {"id": "ina3221_15", "name": "wb_ina3221", "bus": 88, "loc": 0x42, "attr": "hwmon"}, + {"id": "ina3221_16", "name": "wb_ina3221", "bus": 89, "loc": 0x42, "attr": "hwmon"}, + {"id": "ina3221_17", "name": "wb_ina3221", "bus": 90, "loc": 0x42, "attr": "hwmon"}, + ], + }, + { + "name": "xdpe12284", + "device": [ + {"id": "xdpe12284_1", "name": "wb_xdpe12284", "bus": 5, "loc": 0x5e, "attr": "hwmon"}, + {"id": "xdpe12284_2", "name": "wb_xdpe12284", "bus": 5, "loc": 0x68, "attr": "hwmon"}, + {"id": "xdpe12284_3", "name": "wb_xdpe12284", "bus": 5, "loc": 0x6e, "attr": "hwmon"}, + {"id": "xdpe12284_4", "name": "wb_xdpe12284", "bus": 5, "loc": 0x70, "attr": "hwmon"}, + {"id": "xdpe12284_5", "name": "wb_xdpe12284", "bus": 67, "loc": 0x68, "attr": "hwmon"}, + {"id": "xdpe12284_6", "name": "wb_xdpe12284", "bus": 67, "loc": 0x70, "attr": "hwmon"}, + {"id": "xdpe12284_7", "name": "wb_xdpe12284", "bus": 67, "loc": 0x60, "attr": "hwmon"}, + {"id": "xdpe12284_8", "name": "wb_xdpe12284", "bus": 67, "loc": 0x66, "attr": "hwmon"}, + {"id": "xdpe12284_9", "name": "wb_xdpe12284", "bus": 67, "loc": 0x6e, "attr": "hwmon"}, + {"id": "xdpe12284_10", "name": "wb_xdpe12284", "bus": 67, "loc": 0x5e, "attr": "hwmon"}, + {"id": "xdpe12284_11", "name": "wb_xdpe12284", "bus": 68, "loc": 0x68, "attr": "hwmon"}, + {"id": "xdpe12284_12", "name": "wb_xdpe12284", "bus": 68, "loc": 0x70, "attr": "hwmon"}, + {"id": "xdpe12284_13", "name": "wb_xdpe12284", "bus": 68, "loc": 0x60, "attr": "hwmon"}, + {"id": "xdpe12284_14", "name": "wb_xdpe12284", "bus": 68, "loc": 0x66, "attr": "hwmon"}, + {"id": "xdpe12284_15", "name": "wb_xdpe12284", "bus": 68, "loc": 0x6e, "attr": "hwmon"}, + {"id": "xdpe12284_16", "name": "wb_xdpe12284", "bus": 68, "loc": 0x5e, "attr": "hwmon"}, + {"id": "xdpe12284_17", "name": "wb_xdpe12284", "bus": 69, "loc": 0x68, "attr": "hwmon"}, + {"id": "xdpe12284_18", "name": "wb_xdpe12284", "bus": 69, "loc": 0x70, "attr": "hwmon"}, + {"id": "xdpe12284_19", "name": "wb_xdpe12284", "bus": 69, "loc": 0x60, "attr": "hwmon"}, + {"id": "xdpe12284_20", "name": "wb_xdpe12284", "bus": 69, "loc": 0x66, "attr": "hwmon"}, + {"id": "xdpe12284_21", "name": "wb_xdpe12284", "bus": 69, "loc": 0x6e, "attr": "hwmon"}, + {"id": "xdpe12284_22", "name": "wb_xdpe12284", "bus": 69, "loc": 0x5e, "attr": "hwmon"}, + {"id": "xdpe12284_23", "name": "wb_xdpe12284", "bus": 70, "loc": 0x68, "attr": "hwmon"}, + {"id": "xdpe12284_24", "name": "wb_xdpe12284", "bus": 70, "loc": 0x70, "attr": "hwmon"}, + {"id": "xdpe12284_25", "name": "wb_xdpe12284", "bus": 70, "loc": 0x60, "attr": "hwmon"}, + {"id": "xdpe12284_26", "name": "wb_xdpe12284", "bus": 70, "loc": 0x66, "attr": "hwmon"}, + {"id": "xdpe12284_27", "name": "wb_xdpe12284", "bus": 70, "loc": 0x6e, "attr": "hwmon"}, + {"id": "xdpe12284_28", "name": "wb_xdpe12284", "bus": 70, "loc": 0x5e, "attr": "hwmon"}, + {"id": "xdpe12284_29", "name": "wb_xdpe12284", "bus": 71, "loc": 0x68, "attr": "hwmon"}, + ], + }, + { + "name": "xdpe132g5c", + "device": [ + {"id": "xdpe132g5c_1", "name": "wb_xdpe132g5c_pmbus", "bus": 64, "loc": 0x40, "attr": "hwmon"}, + {"id": "xdpe132g5c_2", "name": "wb_xdpe132g5c_pmbus", "bus": 65, "loc": 0x40, "attr": "hwmon"}, + {"id": "xdpe132g5c_3", "name": "wb_xdpe132g5c_pmbus", "bus": 66, "loc": 0x40, "attr": "hwmon"}, + ], + }, + { + "name": "ucd90160", + "device": [ + {"id": "ucd90160_1", "name": "wb_ucd90160", "bus": 5, "loc": 0x5f, "attr": "hwmon"}, + ], + }, + ], +} + +MANUINFO_CONF = { + "bios": { + "key": "BIOS", + "head": True, + "next": "cpu" + }, + "bios_vendor": { + "parent": "bios", + "key": "Vendor", + "cmd": "dmidecode -t 0 |grep Vendor", + "pattern": r".*Vendor", + "separator": ":", + "arrt_index": 1, + }, + "bios_version": { + "parent": "bios", + "key": "Version", + "cmd": "dmidecode -t 0 |grep Version", + "pattern": r".*Version", + "separator": ":", + "arrt_index": 2, + }, + "bios_date": { + "parent": "bios", + "key": "Release Date", + "cmd": "dmidecode -t 0 |grep Release", + "pattern": r".*Release Date", + "separator": ":", + "arrt_index": 3, + }, + "bios_boot": { + "parent": "bios", + "key": "Boot From", + "devfile": { + "loc": "/dev/cpld1", + "offset":0x1d, + "len":1, + "bit_width":1 + }, + "decode": { + "01": "Master", + "02": "Slave" + }, + "arrt_index": 4, + }, + + "cpu": { + "key": "CPU", + "next": "cpld" + }, + "cpu_vendor": { + "parent": "cpu", + "key": "Vendor", + "cmd": "dmidecode --type processor |grep Manufacturer", + "pattern": r".*Manufacturer", + "separator": ":", + "arrt_index": 1, + }, + "cpu_model": { + "parent": "cpu", + "key": "Device Model", + "cmd": "dmidecode --type processor | grep Version", + "pattern": r".*Version", + "separator": ":", + "arrt_index": 2, + }, + "cpu_core": { + "parent": "cpu", + "key": "Core Count", + "cmd": "dmidecode --type processor | grep \"Core Count\"", + "pattern": r".*Core Count", + "separator": ":", + "arrt_index": 3, + }, + "cpu_thread": { + "parent": "cpu", + "key": "Thread Count", + "cmd": "dmidecode --type processor | grep \"Thread Count\"", + "pattern": r".*Thread Count", + "separator": ":", + "arrt_index": 4, + }, + + + "cpld": { + "key": "CPLD", + "next": "fpga" + }, + + "cpld1": { + "key": "CPLD1", + "parent": "cpld", + "arrt_index": 1, + }, + "cpld1_model": { + "key": "Device Model", + "parent": "cpld1", + "config": "LCMXO3LF-2100C-5BG256C", + "arrt_index": 1, + }, + "cpld1_vender": { + "key": "Vendor", + "parent": "cpld1", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld1_desc": { + "key": "Description", + "parent": "cpld1", + "config": "CPU CPLD", + "arrt_index": 3, + }, + "cpld1_version": { + "key": "Firmware Version", + "parent": "cpld1", + "reg": { + "loc": "/dev/port", + "offset": 0xa00, + "size": 4 + }, + "callback": "cpld_format", + "arrt_index": 4, + }, + + "cpld2": { + "key": "CPLD2", + "parent": "cpld", + "arrt_index": 2, + }, + "cpld2_model": { + "key": "Device Model", + "parent": "cpld2", + "config": "LCMXO3LF-2100C-5BG256C", + "arrt_index": 1, + }, + "cpld2_vender": { + "key": "Vendor", + "parent": "cpld2", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld2_desc": { + "key": "Description", + "parent": "cpld2", + "config": "SCM CPLD", + "arrt_index": 3, + }, + "cpld2_version": { + "key": "Firmware Version", + "parent": "cpld2", + "reg": { + "loc": "/dev/port", + "offset": 0x900, + "size": 4 + }, + "callback": "cpld_format", + "arrt_index": 4, + }, + "cpld2_boot": { + "parent": "cpld2", + "key": "Boot From", + "devfile": { + "loc": "/dev/cpld1", + "offset":0x06, + "len":1, + "bit_width":1 + }, + "decode": { + "01": "Main", + "02": "Golden" + }, + "arrt_index": 5, + }, + + "cpld3": { + "key": "CPLD3", + "parent": "cpld", + "arrt_index": 3, + }, + "cpld3_model": { + "key": "Device Model", + "parent": "cpld3", + "config": "LCMXO3LF-4300C-6BG324I", + "arrt_index": 1, + }, + "cpld3_vender": { + "key": "Vendor", + "parent": "cpld3", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld3_desc": { + "key": "Description", + "parent": "cpld3", + "config": "MCB CPLD", + "arrt_index": 3, + }, + "cpld3_version": { + "key": "Firmware Version", + "parent": "cpld3", + "i2c": { + "bus": "13", + "loc": "0x1d", + "offset": 0, + "size": 4 + }, + "callback": "cpld_format", + "arrt_index": 4, + }, + "cpld3_boot": { + "parent": "cpld3", + "key": "Boot From", + "devfile": { + "loc": "/dev/cpld3", + "offset":0x0d, + "len":1, + "bit_width":1 + }, + "decode": { + "01": "Main", + "02": "Golden" + }, + "arrt_index": 5, + }, + + "cpld4": { + "key": "CPLD4", + "parent": "cpld", + "arrt_index": 4, + }, + "cpld4_model": { + "key": "Device Model", + "parent": "cpld4", + "config": "LCMXO3LF-4300C-6BG324I", + "arrt_index": 1, + }, + "cpld4_vender": { + "key": "Vendor", + "parent": "cpld4", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld4_desc": { + "key": "Description", + "parent": "cpld4", + "config": "SMB CPLD", + "arrt_index": 3, + }, + "cpld4_version": { + "key": "Firmware Version", + "parent": "cpld4", + "i2c": { + "bus": "20", + "loc": "0x1e", + "offset": 0, + "size": 4 + }, + "callback": "cpld_format", + "arrt_index": 4, + }, + "cpld4_boot": { + "parent": "cpld4", + "key": "Boot From", + "devfile": { + "loc": "/dev/cpld4", + "offset":0x0d, + "len":1, + "bit_width":1 + }, + "decode": { + "01": "Main", + "02": "Golden" + }, + "arrt_index": 5, + }, + + "cpld5": { + "key": "CPLD5", + "parent": "cpld", + "arrt_index": 5, + }, + "cpld5_model": { + "key": "Device Model", + "parent": "cpld5", + "config": "LCMXO3LF-2100C-5BG256C", + "arrt_index": 1, + }, + "cpld5_vender": { + "key": "Vendor", + "parent": "cpld5", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld5_desc": { + "key": "Description", + "parent": "cpld5", + "config": "FCB_T CPLD", + "arrt_index": 3, + }, + "cpld5_version": { + "key": "Firmware Version", + "parent": "cpld5", + "i2c": { + "bus": "44", + "loc": "0x0d", + "offset": 0, + "size": 4 + }, + "callback": "cpld_format", + "arrt_index": 4, + }, + "cpld5_boot": { + "parent": "cpld5", + "key": "Boot From", + "devfile": { + "loc": "/dev/cpld5", + "offset":0x0d, + "len":1, + "bit_width":1 + }, + "decode": { + "01": "Main", + "02": "Golden" + }, + "arrt_index": 5, + }, + + "cpld6": { + "key": "CPLD6", + "parent": "cpld", + "arrt_index": 6, + }, + "cpld6_model": { + "key": "Device Model", + "parent": "cpld6", + "config": "LCMXO3LF-2100C-5BG256C", + "arrt_index": 1, + }, + "cpld6_vender": { + "key": "Vendor", + "parent": "cpld6", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld6_desc": { + "key": "Description", + "parent": "cpld6", + "config": "FCB_B CPLD", + "arrt_index": 3, + }, + "cpld6_version": { + "key": "Firmware Version", + "parent": "cpld6", + "i2c": { + "bus": "52", + "loc": "0x0d", + "offset": 0, + "size": 4 + }, + "callback": "cpld_format", + "arrt_index": 4, + }, + "cpld6_boot": { + "parent": "cpld6", + "key": "Boot From", + "devfile": { + "loc": "/dev/cpld6", + "offset":0x0d, + "len":1, + "bit_width":1 + }, + "decode": { + "01": "Main", + "02": "Golden" + }, + "arrt_index": 5, + }, + + + "psu": { + "key": "PSU", + "next": "fan" + }, + + "psu1": { + "parent": "psu", + "key": "PSU1", + "arrt_index": 1, + }, + "psu1_hw_version": { + "key": "Hardware Version", + "parent": "psu1", + "extra": { + "funcname": "getPsu", + "id": "psu1", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "psu1_fw_version": { + "key": "Firmware Version", + "parent": "psu1", + "config": "NA", + "arrt_index": 2, + }, + + "psu2": { + "parent": "psu", + "key": "PSU2", + "arrt_index": 2, + }, + "psu2_hw_version": { + "key": "Hardware Version", + "parent": "psu2", + "extra": { + "funcname": "getPsu", + "id": "psu2", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "psu2_fw_version": { + "key": "Firmware Version", + "parent": "psu2", + "config": "NA", + "arrt_index": 2, + }, + + "fan": { + "key": "FAN", + "next": "fpga" + }, + "fan1": { + "key": "FAN1", + "parent": "fan", + "arrt_index": 1, + }, + "fan1_hw_version": { + "key": "Hardware Version", + "parent": "fan1", + "extra": { + "funcname": "checkFan", + "id": "fan1", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan1_fw_version": { + "key": "Firmware Version", + "parent": "fan1", + "config": "NA", + "arrt_index": 2, + }, + + "fan2": { + "key": "FAN2", + "parent": "fan", + "arrt_index": 2, + }, + "fan2_hw_version": { + "key": "Hardware Version", + "parent": "fan2", + "extra": { + "funcname": "checkFan", + "id": "fan2", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan2_fw_version": { + "key": "Firmware Version", + "parent": "fan2", + "config": "NA", + "arrt_index": 2, + }, + + "fan3": { + "key": "FAN3", + "parent": "fan", + "arrt_index": 3, + }, + "fan3_hw_version": { + "key": "Hardware Version", + "parent": "fan3", + "extra": { + "funcname": "checkFan", + "id": "fan3", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan3_fw_version": { + "key": "Firmware Version", + "parent": "fan3", + "config": "NA", + "arrt_index": 2, + }, + + "fan4": { + "key": "FAN4", + "parent": "fan", + "arrt_index": 4, + }, + "fan4_hw_version": { + "key": "Hardware Version", + "parent": "fan4", + "extra": { + "funcname": "checkFan", + "id": "fan4", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan4_fw_version": { + "key": "Firmware Version", + "parent": "fan4", + "config": "NA", + "arrt_index": 2, + }, + + "fan5": { + "key": "FAN5", + "parent": "fan", + "arrt_index": 5, + }, + "fan5_hw_version": { + "key": "Hardware Version", + "parent": "fan5", + "extra": { + "funcname": "checkFan", + "id": "fan5", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan5_fw_version": { + "key": "Firmware Version", + "parent": "fan5", + "config": "NA", + "arrt_index": 2, + }, + + "fan6": { + "key": "FAN6", + "parent": "fan", + "arrt_index": 6, + }, + "fan6_hw_version": { + "key": "Hardware Version", + "parent": "fan6", + "extra": { + "funcname": "checkFan", + "id": "fan6", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan6_fw_version": { + "key": "Firmware Version", + "parent": "fan6", + "config": "NA", + "arrt_index": 2, + }, + + "fan7": { + "key": "FAN7", + "parent": "fan", + "arrt_index": 7, + }, + "fan7_hw_version": { + "key": "Hardware Version", + "parent": "fan7", + "extra": { + "funcname": "checkFan", + "id": "fan7", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan7_fw_version": { + "key": "Firmware Version", + "parent": "fan7", + "config": "NA", + "arrt_index": 2, + }, + + "fan8": { + "key": "FAN8", + "parent": "fan", + "arrt_index": 8, + }, + "fan8_hw_version": { + "key": "Hardware Version", + "parent": "fan8", + "extra": { + "funcname": "checkFan", + "id": "fan8", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan8_fw_version": { + "key": "Firmware Version", + "parent": "fan8", + "config": "NA", + "arrt_index": 2, + }, + + + "i210": { + "key": "NIC", + "next": "fpga" + }, + "i210_model": { + "parent": "i210", + "config": "NA", + "key": "Device Model", + "arrt_index": 1, + }, + "i210_vendor": { + "parent": "i210", + "config": "INTEL", + "key": "Vendor", + "arrt_index": 2, + }, + "i210_version": { + "parent": "i210", + "cmd": "ethtool -i eno1", + "pattern": r"firmware-version", + "separator": ":", + "key": "Firmware Version", + "arrt_index": 3, + }, + + "fpga": { + "key": "FPGA", + }, + + "fpga1": { + "key": "FPGA1", + "parent": "fpga", + "arrt_index": 1, + }, + "fpga1_model": { + "parent": "fpga1", + "config": "XC7A50T-2FGG484C", + "key": "Device Model", + "arrt_index": 1, + }, + "fpga1_vender": { + "parent": "fpga1", + "config": "XILINX", + "key": "Vendor", + "arrt_index": 2, + }, + "fpga1_desc": { + "key": "Description", + "parent": "fpga1", + "config": "IOB FPGA", + "arrt_index": 3, + }, + "fpga1_fw_version": { + "parent": "fpga1", + "devfile": { + "loc": "/dev/fpga0", + "offset": 0, + "len": 4, + "bit_width": 4 + }, + "key": "Firmware Version", + "arrt_index": 4, + }, + "fpga1_date": { + "parent": "fpga1", + "devfile": { + "loc": "/dev/fpga0", + "offset": 4, + "len": 4, + "bit_width": 4 + }, + "key": "Build Date", + "arrt_index": 5, + }, + "fpga1_boot": { + "parent": "fpga1", + "key": "Boot From", + "devfile": { + "loc": "/dev/fpga0", + "offset":0x00, + "len":1, + "bit_width":1 + }, + "decode": { + "00": "Golden", + "default": "Main" + }, + "arrt_index": 6, + }, + "fpga2": { + "key": "FPGA2", + "parent": "fpga", + "arrt_index": 2, + }, + "fpga2_model": { + "parent": "fpga2", + "config": "XC7A50T-2FGG484C", + "key": "Device Model", + "arrt_index": 1, + }, + "fpga2_vender": { + "parent": "fpga2", + "config": "XILINX", + "key": "Vendor", + "arrt_index": 2, + }, + "fpga2_desc": { + "key": "Description", + "parent": "fpga2", + "config": "DOM FPGA", + "arrt_index": 3, + }, + "fpga2_fw_version": { + "parent": "fpga2", + "devfile": { + "loc": "/dev/fpga1", + "offset": 0, + "len": 4, + "bit_width": 4 + }, + "key": "Firmware Version", + "arrt_index": 4, + }, + "fpga2_date": { + "parent": "fpga2", + "devfile": { + "loc": "/dev/fpga1", + "offset": 4, + "len": 4, + "bit_width": 4 + }, + "key": "Build Date", + "arrt_index": 5, + }, + "fpga2_boot": { + "parent": "fpga2", + "key": "Boot From", + "devfile": { + "loc": "/dev/fpga1", + "offset":0x00, + "len":1, + "bit_width":1 + }, + "decode": { + "00": "Golden", + "default": "Main" + }, + "arrt_index": 6, + }, +} + +PMON_SYSLOG_STATUS = { + "polling_time": 3, + "fans": { + "present": {"path": ["/sys/s3ip/fan/*/present"], "ABSENT": 0}, + "status": [ + {"path": "/sys/s3ip/fan/%s/motor1/status", 'okval': 1}, + {"path": "/sys/s3ip/fan/%s/motor2/status", 'okval': 1}, + ], + "nochangedmsgflag": 1, + "nochangedmsgtime": 60, + "noprintfirsttimeflag": 0, + "alias": { + "fan1": "FAN1", + "fan2": "FAN2", + "fan3": "FAN3", + "fan4": "FAN4", + "fan5": "FAN5", + "fan6": "FAN6", + "fan7": "FAN7", + "fan8": "FAN8" + } + }, + "psus": { + "present": {"path": ["/sys/s3ip/psu/*/present"], "ABSENT": 0}, + "status": [ + {"path": "/sys/s3ip/psu/%s/out_status", "okval": 1}, + {"path": "/sys/s3ip/psu/%s/alarm", "okval": 0}, + ], + "nochangedmsgflag": 1, + "nochangedmsgtime": 60, + "noprintfirsttimeflag": 0, + "alias": { + "psu1": "PSU1", + "psu2": "PSU2" + } + } +} + +##################### MAC Voltage adjust#################################### +MAC_DEFAULT_PARAM = [ + { + "name": "mac_core", # AVS name + "type": 0, # 1: used default value, if rov value not in range. 0: do nothing, if rov value not in range + "rov_source": 0, # 0: get rov value from cpld, 1: get rov value from SDK + "cpld_avs": {"bus": 20, "loc": 0x1e, "offset": 0x20, "gettype": "i2c"}, + "set_avs": { + "loc": "/sys/bus/i2c/devices/64-0040/hwmon/hwmon*/avs0_vout", + "gettype": "sysfs", "formula": "int((%f)*1000000)" + }, + "mac_avs_param": { + 0x92: 0.7471, + 0x90: 0.7600, + 0x8e: 0.7710, + 0x8c: 0.7839, + 0x8a: 0.7961, + 0x88: 0.8071, + 0x86: 0.8181, + 0x84: 0.8291, + 0x82: 0.8401 + } + } +] + +DRIVERLISTS = [ + {"name": "ice", "delay": 0, "removable": 0}, + {"name": "wb_i2c_i801", "delay": 1, "removable": 0}, + {"name": "i2c_dev", "delay": 0, "removable": 0}, + {"name": "wb_i2c_algo_bit", "delay": 0}, + {"name": "wb_i2c_gpio", "delay": 0}, + {"name": "i2c_mux", "delay": 0, "removable": 0}, + {"name": "wb_i2c_gpio_device gpio_sda=181 gpio_scl=180 gpio_chip_name=INTC3001:00 bus_num=1", "delay": 0}, + {"name": "platform_common dfd_my_type=0x40d9", "delay": 0}, + {"name": "wb_logic_dev_common", "delay":0}, + {"name": "wb_io_dev", "delay": 0}, + {"name": "wb_io_dev_device", "delay": 0}, + {"name": "wb_fpga_pcie", "delay": 0}, + {"name": "wb_pcie_dev", "delay": 0}, + {"name": "wb_pcie_dev_device", "delay": 0}, + {"name": "wb_i2c_dev", "delay": 0}, + {"name": "wb_i2c_ocores", "delay": 0}, + {"name": "wb_i2c_ocores_device", "delay": 0}, + {"name": "wb_i2c_mux_pca9641", "delay": 0}, + {"name": "wb_i2c_mux_pca954x", "delay": 0}, + {"name": "wb_i2c_mux_pca954x_device_b3", "delay": 1}, + {"name": "wb_i2c_dev_device", "delay": 1}, + {"name": "wb_lm75", "delay": 0}, +# {"name": "wb_at24", "delay": 0}, + {"name": "optoe", "delay": 0}, + {"name": "wb_pmbus_core", "delay": 0}, + {"name": "wb_xdpe12284", "delay": 0}, + {"name": "wb_xdpe132g5c_pmbus", "delay": 0}, + {"name": "wb_csu550", "delay": 0}, + {"name": "wb_ina3221", "delay": 0}, + {"name": "wb_ucd9000", "delay": 0}, + {"name": "wb_xdpe132g5c", "delay": 0}, +# {"name": "firmware_driver_sysfs", "delay": 0}, + {"name": "wb_rc32312", "delay": 0}, + {"name": "s3ip_sysfs", "delay": 0}, + {"name": "wb_switch_driver", "delay": 0}, + {"name": "fan_device_driver", "delay": 0}, + {"name": "psu_device_driver", "delay": 0}, + {"name": "vol_sensor_device_driver", "delay": 0}, + {"name": "temp_sensor_device_driver", "delay": 0}, + {"name": "wb_spd", "delay": 0}, + {"name": "wb_lpc_bmc", "delay": 0}, +] + +DEVICE = [ + # eeprom + {"name": "wb_24c02", "bus": 1, "loc": 0x56}, + {"name": "wb_24c02", "bus": 1, "loc": 0x57}, + {"name": "wb_24c02", "bus": 2, "loc": 0x51}, + {"name": "wb_24c02", "bus": 3, "loc": 0x51}, + # SCM + {"name": "wb_24c02", "bus": 32, "loc": 0x52}, + {"name": "wb_ina3221", "bus": 33, "loc": 0x40}, + {"name": "wb_ina3221", "bus": 33, "loc": 0x41}, + {"name": "wb_ina3221", "bus": 33, "loc": 0x42}, + {"name": "wb_tmp275", "bus": 34, "loc": 0x4c}, + {"name": "wb_tmp275", "bus": 35, "loc": 0x4d}, + # CPU + {"name": "wb_ucd90160", "bus": 5, "loc": 0x5f}, + {"name": "wb_xdpe12284", "bus": 5, "loc": 0x5e}, + {"name": "wb_xdpe12284", "bus": 5, "loc": 0x68}, + {"name": "wb_xdpe12284", "bus": 5, "loc": 0x6e}, + {"name": "wb_xdpe12284", "bus": 5, "loc": 0x70}, + # fanA + {"name": "wb_tmp275", "bus": 8, "loc": 0x48}, + {"name": "wb_tmp275", "bus": 8, "loc": 0x49}, + {"name": "wb_24c64", "bus": 40, "loc": 0x50}, + {"name": "wb_24c64", "bus": 41, "loc": 0x50}, + {"name": "wb_24c64", "bus": 42, "loc": 0x50}, + {"name": "wb_24c64", "bus": 43, "loc": 0x50}, + # fanB + {"name": "wb_tmp275", "bus": 9, "loc": 0x48}, + {"name": "wb_tmp275", "bus": 9, "loc": 0x49}, + {"name": "wb_24c64", "bus": 48, "loc": 0x50}, + {"name": "wb_24c64", "bus": 49, "loc": 0x50}, + {"name": "wb_24c64", "bus": 50, "loc": 0x50}, + {"name": "wb_24c64", "bus": 51, "loc": 0x50}, + # psu + {"name": "wb_24c02", "bus": 10, "loc": 0x50}, + {"name": "wb_fsp1200", "bus": 10, "loc": 0x58}, + {"name": "wb_24c02", "bus": 11, "loc": 0x50}, + {"name": "wb_fsp1200", "bus": 11, "loc": 0x58}, + # MCB + {"name": "wb_ina3221", "bus": 12, "loc": 0x40}, + {"name": "wb_ina3221", "bus": 12, "loc": 0x41}, + {"name": "wb_24c02", "bus": 12, "loc": 0x57}, + # SMB + {"name": "wb_tmp275", "bus": 14, "loc": 0x48}, + {"name": "wb_tmp275", "bus": 14, "loc": 0x49}, + {"name": "wb_tmp275", "bus": 14, "loc": 0x4b}, + {"name": "wb_ina3221", "bus": 56, "loc": 0x40}, + {"name": "wb_ina3221", "bus": 56, "loc": 0x41}, + {"name": "wb_ina3221", "bus": 57, "loc": 0x40}, + {"name": "wb_ina3221", "bus": 58, "loc": 0x40}, + {"name": "wb_ina3221", "bus": 59, "loc": 0x40}, + {"name": "wb_ina3221", "bus": 60, "loc": 0x40}, + {"name": "wb_ina3221", "bus": 61, "loc": 0x40}, + {"name": "wb_ina3221", "bus": 62, "loc": 0x40}, + {"name": "wb_ina3221", "bus": 63, "loc": 0x40}, + {"name": "wb_xdpe132g5c_pmbus", "bus": 64, "loc": 0x40}, + {"name": "wb_xdpe132g5c_pmbus", "bus": 65, "loc": 0x40}, + {"name": "wb_xdpe132g5c_pmbus", "bus": 66, "loc": 0x40}, + # OE0 + {"name": "wb_xdpe12284", "bus": 67, "loc": 0x68}, + {"name": "wb_xdpe12284", "bus": 67, "loc": 0x70}, + {"name": "wb_xdpe12284", "bus": 67, "loc": 0x60}, + # OE7 + {"name": "wb_xdpe12284", "bus": 67, "loc": 0x66}, + {"name": "wb_xdpe12284", "bus": 67, "loc": 0x6e}, + {"name": "wb_xdpe12284", "bus": 67, "loc": 0x5e}, + # OE1 + {"name": "wb_xdpe12284", "bus": 68, "loc": 0x68}, + {"name": "wb_xdpe12284", "bus": 68, "loc": 0x70}, + {"name": "wb_xdpe12284", "bus": 68, "loc": 0x60}, + # OE2 + {"name": "wb_xdpe12284", "bus": 68, "loc": 0x66}, + {"name": "wb_xdpe12284", "bus": 68, "loc": 0x6e}, + {"name": "wb_xdpe12284", "bus": 68, "loc": 0x5e}, + # OE3 + {"name": "wb_xdpe12284", "bus": 69, "loc": 0x68}, + {"name": "wb_xdpe12284", "bus": 69, "loc": 0x70}, + {"name": "wb_xdpe12284", "bus": 69, "loc": 0x60}, + # OE4 + {"name": "wb_xdpe12284", "bus": 69, "loc": 0x66}, + {"name": "wb_xdpe12284", "bus": 69, "loc": 0x6e}, + {"name": "wb_xdpe12284", "bus": 69, "loc": 0x5e}, + # OE5 + {"name": "wb_xdpe12284", "bus": 70, "loc": 0x68}, + {"name": "wb_xdpe12284", "bus": 70, "loc": 0x70}, + {"name": "wb_xdpe12284", "bus": 70, "loc": 0x60}, + # OE6 + {"name": "wb_xdpe12284", "bus": 70, "loc": 0x66}, + {"name": "wb_xdpe12284", "bus": 70, "loc": 0x6e}, + {"name": "wb_xdpe12284", "bus": 70, "loc": 0x5e}, + # MAC_XDPE12284C_06 + {"name": "wb_xdpe12284", "bus": 71, "loc": 0x68}, + # fan DCDC + {"name": "wb_ina3221", "bus": 88, "loc": 0x42}, + {"name": "wb_ina3221", "bus": 89, "loc": 0x42}, + {"name": "wb_ina3221", "bus": 90, "loc": 0x42}, + # RC32312 + {"name": "wb_rc32312", "bus": 72, "loc": 0x09}, + {"name": "wb_24c64", "bus": 72, "loc": 0x50}, + {"name": "wb_rc32312", "bus": 73, "loc": 0x09}, + {"name": "wb_24c64", "bus": 73, "loc": 0x50}, + # xdpe132g5c i2c + {"name": "wb_xdpe132g5c", "bus": 64, "loc": 0x10}, + {"name": "wb_xdpe132g5c", "bus": 65, "loc": 0x10}, + {"name": "wb_xdpe132g5c", "bus": 66, "loc": 0x10}, +] + +OPTOE = [ +# {"name": "wb_24c02", "startbus": 24, "endbus": 31}, + {"name": "optoe3", "startbus": 24, "endbus": 31}, +] + +REBOOT_CTRL_PARAM = {} + +INIT_PARAM_PRE = [ + # set ina3221 shunt_resistor + # SCM_VDD12.0_C + {"loc": "33-0041/hwmon/hwmon*/shunt1_resistor", "value": "1000"}, + # SCM_OCM_V12.0_C + {"loc": "33-0041/hwmon/hwmon*/shunt3_resistor", "value": "1000"}, + # MAC_PLL0_VDD0.9_C + {"loc": "56-0040/hwmon/hwmon*/shunt1_resistor", "value": "2000"}, + # MAC_PLL1_VDD0.9_C + {"loc": "56-0040/hwmon/hwmon*/shunt2_resistor", "value": "2000"}, + # MAC_PLL3_VDD0.9_C + {"loc": "61-0040/hwmon/hwmon*/shunt1_resistor", "value": "2000"}, + # MAC_PLL2_VDD0.9_C + {"loc": "61-0040/hwmon/hwmon*/shunt2_resistor", "value": "2000"}, + # FAN1_VDD12_C + {"loc": "88-0042/hwmon/hwmon*/shunt1_resistor", "value": "1000"}, + # FAN2_VDD12_C + {"loc": "88-0042/hwmon/hwmon*/shunt2_resistor", "value": "1000"}, + # FAN3_VDD12_C + {"loc": "88-0042/hwmon/hwmon*/shunt3_resistor", "value": "1000"}, + # FAN4_VDD12_C + {"loc": "89-0042/hwmon/hwmon*/shunt1_resistor", "value": "1000"}, + # FAN5_VDD12_C + {"loc": "89-0042/hwmon/hwmon*/shunt2_resistor", "value": "1000"}, + # FAN6_VDD12_C + {"loc": "89-0042/hwmon/hwmon*/shunt3_resistor", "value": "1000"}, + # FAN7_VDD12_C + {"loc": "90-0042/hwmon/hwmon*/shunt1_resistor", "value": "1000"}, + # FAN8_VDD12_C + {"loc": "90-0042/hwmon/hwmon*/shunt2_resistor", "value": "1000"}, + # set avs threshold + # MAC_CORE_V + {"loc": "64-0040/hwmon/hwmon*/avs0_vout_min", "value": "630000"}, + {"loc": "64-0040/hwmon/hwmon*/avs0_vout_max", "value": "858000"}, + # MAC_ANALOG0 V0.9_V + {"loc": "65-0040/hwmon/hwmon*/avs0_vout_min", "value": "810000"}, + {"loc": "65-0040/hwmon/hwmon*/avs0_vout_max", "value": "990000"}, + # MAC_ANALOG0 V0.75_V + {"loc": "65-0040/hwmon/hwmon*/avs1_vout_min", "value": "675000"}, + {"loc": "65-0040/hwmon/hwmon*/avs1_vout_max", "value": "825000"}, + # MAC_ANALOG1 V0.9_V + {"loc": "66-0040/hwmon/hwmon*/avs0_vout_min", "value": "810000"}, + {"loc": "66-0040/hwmon/hwmon*/avs0_vout_max", "value": "990000"}, + # MAC_ANALOG1 V0.75_V + {"loc": "66-0040/hwmon/hwmon*/avs1_vout_min", "value": "675000"}, + {"loc": "66-0040/hwmon/hwmon*/avs1_vout_max", "value": "825000"}, + # # OE0_AVDD_RX_1.8_V + # {"loc": "67-0070/hwmon/hwmon*/avs0_vout_min", "value": "1710000"}, + # {"loc": "67-0070/hwmon/hwmon*/avs0_vout_max", "value": "1890000"}, + # {"loc": "67-0070/hwmon/hwmon*/avs0_vout", "value": "1800000"}, + # # OE0_AVDD_RX_1.2_V + # {"loc": "67-0070/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "67-0070/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "67-0070/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE0_AVDD_TX_1.8_V + # {"loc": "67-0068/hwmon/hwmon*/avs0_vout_min", "value": "1750000"}, + # {"loc": "67-0068/hwmon/hwmon*/avs0_vout_max", "value": "1950000"}, + # {"loc": "67-0068/hwmon/hwmon*/avs0_vout", "value": "1850000"}, + # # OE0_AVDD_TX_1.2_V + # {"loc": "67-0068/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "67-0068/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "67-0068/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE0_AVDD_TRX_0.75_V + # {"loc": "67-0060/hwmon/hwmon*/avs0_vout_min", "value": "713000"}, + # {"loc": "67-0060/hwmon/hwmon*/avs0_vout_max", "value": "788000"}, + # {"loc": "67-0060/hwmon/hwmon*/avs0_vout", "value": "750000"}, + # # OE1_AVDD_RX_1.8_V + # {"loc": "68-0070/hwmon/hwmon*/avs0_vout_min", "value": "1710000"}, + # {"loc": "68-0070/hwmon/hwmon*/avs0_vout_max", "value": "1890000"}, + # {"loc": "68-0070/hwmon/hwmon*/avs0_vout", "value": "1800000"}, + # # OE1_AVDD_RX_1.2_V + # {"loc": "68-0070/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "68-0070/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "68-0070/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE1_AVDD_TX_1.8_V + # {"loc": "68-0068/hwmon/hwmon*/avs0_vout_min", "value": "1750000"}, + # {"loc": "68-0068/hwmon/hwmon*/avs0_vout_max", "value": "1950000"}, + # {"loc": "68-0068/hwmon/hwmon*/avs0_vout", "value": "1850000"}, + # # OE1_AVDD_TX_1.2_V + # {"loc": "68-0068/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "68-0068/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "68-0068/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE1_AVDD_TRX_0.75_V + # {"loc": "68-0060/hwmon/hwmon*/avs0_vout_min", "value": "713000"}, + # {"loc": "68-0060/hwmon/hwmon*/avs0_vout_max", "value": "788000"}, + # {"loc": "68-0060/hwmon/hwmon*/avs0_vout", "value": "750000"}, + # # OE2_AVDD_RX_1.8_V + # {"loc": "68-006e/hwmon/hwmon*/avs0_vout_min", "value": "1710000"}, + # {"loc": "68-006e/hwmon/hwmon*/avs0_vout_max", "value": "1890000"}, + # {"loc": "68-006e/hwmon/hwmon*/avs0_vout", "value": "1800000"}, + # # OE2_AVDD_RX_1.2_V + # {"loc": "68-006e/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "68-006e/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "68-006e/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE2_AVDD_TX_1.8_V + # {"loc": "68-0066/hwmon/hwmon*/avs0_vout_min", "value": "1750000"}, + # {"loc": "68-0066/hwmon/hwmon*/avs0_vout_max", "value": "1950000"}, + # {"loc": "68-0066/hwmon/hwmon*/avs0_vout", "value": "1850000"}, + # # OE2_AVDD_TX_1.2_V + # {"loc": "68-0066/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "68-0066/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "68-0066/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE2_AVDD_TRX_0.75_V + # {"loc": "68-005e/hwmon/hwmon*/avs0_vout_min", "value": "713000"}, + # {"loc": "68-005e/hwmon/hwmon*/avs0_vout_max", "value": "788000"}, + # {"loc": "68-005e/hwmon/hwmon*/avs0_vout", "value": "750000"}, + # # OE3_AVDD_RX_1.8_V + # {"loc": "69-0070/hwmon/hwmon*/avs0_vout_min", "value": "1710000"}, + # {"loc": "69-0070/hwmon/hwmon*/avs0_vout_max", "value": "1890000"}, + # {"loc": "69-0070/hwmon/hwmon*/avs0_vout", "value": "1800000"}, + # # OE3_AVDD_RX_1.2_V + # {"loc": "69-0070/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "69-0070/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "69-0070/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE3_AVDD_TX_1.8_V + # {"loc": "69-0068/hwmon/hwmon*/avs0_vout_min", "value": "1750000"}, + # {"loc": "69-0068/hwmon/hwmon*/avs0_vout_max", "value": "1950000"}, + # {"loc": "69-0068/hwmon/hwmon*/avs0_vout", "value": "1850000"}, + # # OE3_AVDD_TX_1.2_V + # {"loc": "69-0068/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "69-0068/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "69-0068/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE3_AVDD_TRX_0.75_V + # {"loc": "69-0060/hwmon/hwmon*/avs0_vout_min", "value": "713000"}, + # {"loc": "69-0060/hwmon/hwmon*/avs0_vout_max", "value": "788000"}, + # {"loc": "69-0060/hwmon/hwmon*/avs0_vout", "value": "750000"}, + # # OE4_AVDD_RX_1.8_V + # {"loc": "69-006e/hwmon/hwmon*/avs0_vout_min", "value": "1710000"}, + # {"loc": "69-006e/hwmon/hwmon*/avs0_vout_max", "value": "1890000"}, + # {"loc": "69-006e/hwmon/hwmon*/avs0_vout", "value": "1800000"}, + # # OE4_AVDD_RX_1.2_V + # {"loc": "69-006e/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "69-006e/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "69-006e/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE4_AVDD_TX_1.8_V + # {"loc": "69-0066/hwmon/hwmon*/avs0_vout_min", "value": "1750000"}, + # {"loc": "69-0066/hwmon/hwmon*/avs0_vout_max", "value": "1950000"}, + # {"loc": "69-0066/hwmon/hwmon*/avs0_vout", "value": "1850000"}, + # # OE4_AVDD_TX_1.2_V + # {"loc": "69-0066/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "69-0066/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "69-0066/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE4_AVDD_TRX_0.75_V + # {"loc": "69-005e/hwmon/hwmon*/avs0_vout_min", "value": "713000"}, + # {"loc": "69-005e/hwmon/hwmon*/avs0_vout_max", "value": "788000"}, + # {"loc": "69-005e/hwmon/hwmon*/avs0_vout", "value": "750000"}, + # # OE5_AVDD_RX_1.8_V + # {"loc": "70-0070/hwmon/hwmon*/avs0_vout_min", "value": "1710000"}, + # {"loc": "70-0070/hwmon/hwmon*/avs0_vout_max", "value": "1890000"}, + # {"loc": "70-0070/hwmon/hwmon*/avs0_vout", "value": "1800000"}, + # # OE5_AVDD_RX_1.2_V + # {"loc": "70-0070/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "70-0070/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "70-0070/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE5_AVDD_TX_1.8_V + # {"loc": "70-0068/hwmon/hwmon*/avs0_vout_min", "value": "1750000"}, + # {"loc": "70-0068/hwmon/hwmon*/avs0_vout_max", "value": "1950000"}, + # {"loc": "70-0068/hwmon/hwmon*/avs0_vout", "value": "1850000"}, + # # OE5_AVDD_TX_1.2_V + # {"loc": "70-0068/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "70-0068/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "70-0068/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE5_AVDD_TRX_0.75_V + # {"loc": "70-0060/hwmon/hwmon*/avs0_vout_min", "value": "713000"}, + # {"loc": "70-0060/hwmon/hwmon*/avs0_vout_max", "value": "788000"}, + # {"loc": "70-0060/hwmon/hwmon*/avs0_vout", "value": "750000"}, + # # OE6_AVDD_RX_1.8_V + # {"loc": "70-006e/hwmon/hwmon*/avs0_vout_min", "value": "1710000"}, + # {"loc": "70-006e/hwmon/hwmon*/avs0_vout_max", "value": "1890000"}, + # {"loc": "70-006e/hwmon/hwmon*/avs0_vout", "value": "1800000"}, + # # OE6_AVDD_RX_1.2_V + # {"loc": "70-006e/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "70-006e/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "70-006e/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE6_AVDD_TX_1.8_V + # {"loc": "70-0066/hwmon/hwmon*/avs0_vout_min", "value": "1750000"}, + # {"loc": "70-0066/hwmon/hwmon*/avs0_vout_max", "value": "1950000"}, + # {"loc": "70-0066/hwmon/hwmon*/avs0_vout", "value": "1850000"}, + # # OE6_AVDD_TX_1.2_V + # {"loc": "70-0066/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "70-0066/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "70-0066/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE6_AVDD_TRX_0.75_V + # {"loc": "70-005e/hwmon/hwmon*/avs0_vout_min", "value": "713000"}, + # {"loc": "70-005e/hwmon/hwmon*/avs0_vout_max", "value": "788000"}, + # {"loc": "70-005e/hwmon/hwmon*/avs0_vout", "value": "750000"}, + # # OE7_AVDD_RX_1.8_V + # {"loc": "67-006e/hwmon/hwmon*/avs0_vout_min", "value": "1710000"}, + # {"loc": "67-006e/hwmon/hwmon*/avs0_vout_max", "value": "1890000"}, + # {"loc": "67-006e/hwmon/hwmon*/avs0_vout", "value": "1800000"}, + # # OE7_AVDD_RX_1.2_V + # {"loc": "67-006e/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "67-006e/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "67-006e/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE7_AVDD_TX_1.8_V + # {"loc": "67-0066/hwmon/hwmon*/avs0_vout_min", "value": "1750000"}, + # {"loc": "67-0066/hwmon/hwmon*/avs0_vout_max", "value": "1950000"}, + # {"loc": "67-0066/hwmon/hwmon*/avs0_vout", "value": "1850000"}, + # # OE7_AVDD_TX_1.2_V + # {"loc": "67-0066/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "67-0066/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "67-0066/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE7_AVDD_TRX_0.75_V + # {"loc": "67-005e/hwmon/hwmon*/avs0_vout_min", "value": "713000"}, + # {"loc": "67-005e/hwmon/hwmon*/avs0_vout_max", "value": "788000"}, + # {"loc": "67-005e/hwmon/hwmon*/avs0_vout", "value": "750000"}, + # RLML_VDD V3.3_V *1.5 + {"loc": "71-0068/hwmon/hwmon*/avs0_vout_min", "value": "1980000"}, + {"loc": "71-0068/hwmon/hwmon*/avs0_vout_max", "value": "2420000"}, + # RLMH_VDD V3.3_V *1.5 + {"loc": "71-0068/hwmon/hwmon*/avs1_vout_min", "value": "1980000"}, + {"loc": "71-0068/hwmon/hwmon*/avs1_vout_max", "value": "2420000"}, + # OCM_XDPE_VCCIN_V + {"loc": "5-0070/hwmon/hwmon*/avs0_vout_min", "value": "1350000"}, + {"loc": "5-0070/hwmon/hwmon*/avs0_vout_max", "value": "2200000"}, + # OCM_XDPE_P1V8_V + {"loc": "5-0070/hwmon/hwmon*/avs1_vout_min", "value": "1690000"}, + {"loc": "5-0070/hwmon/hwmon*/avs1_vout_max", "value": "1910000"}, + # OCM_XDPE_P1V05_V + {"loc": "5-006e/hwmon/hwmon*/avs0_vout_min", "value": "954000"}, + {"loc": "5-006e/hwmon/hwmon*/avs0_vout_max", "value": "1160000"}, + # OCM_XDPE_VNN_PCH_V + {"loc": "5-006e/hwmon/hwmon*/avs1_vout_min", "value": "540000"}, + {"loc": "5-006e/hwmon/hwmon*/avs1_vout_max", "value": "1320000"}, + # OCM_XDPE_VNN_NAC_V + {"loc": "5-0068/hwmon/hwmon*/avs0_vout_min", "value": "540000"}, + {"loc": "5-0068/hwmon/hwmon*/avs0_vout_max", "value": "1320000"}, + # OCM_XDPE_VCC_ANA_V + {"loc": "5-0068/hwmon/hwmon*/avs1_vout_min", "value": "900000"}, + {"loc": "5-0068/hwmon/hwmon*/avs1_vout_max", "value": "1100000"}, + # OCM_XDPE_P1V2_VDDQ_V + {"loc": "5-005e/hwmon/hwmon*/avs0_vout_min", "value": "1120000"}, + {"loc": "5-005e/hwmon/hwmon*/avs0_vout_max", "value": "1280000"}, +] + +INIT_PARAM = [] + +INIT_COMMAND_PRE = [] + +INIT_COMMAND = [ + # enable fan watchdog + {"path": "/dev/cpld5", "offset": 0x22, "value": [0x01], "gettype": "devfile"}, + {"path": "/dev/cpld6", "offset": 0x22, "value": [0x01], "gettype": "devfile"}, +] + +UPGRADE_SUMMARY = { + "devtype": 0x40d9, + + "slot0": { + "subtype": 0, + "SPI-LOGIC-DEV": { + "chain1":{ + "name":"IOB_FPGA", + "is_support_warm_upg":0, + "init_cmd": [ + # firmware upgrade set sysled blue/amber alternate flashing + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x50, "value": [0x01]} + ] + }, + "chain2":{ + "name":"DOM_FPGA", + "is_support_warm_upg":0, + "init_cmd": [ + # firmware upgrade set sysled blue/amber alternate flashing + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x50, "value": [0x01]} + ] + }, + "chain3":{ + "name":"SCM_CPLD", + "is_support_warm_upg":0, + "init_cmd": [ + # firmware upgrade set sysled blue/amber alternate flashing + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x50, "value": [0x01]} + ] + }, + "chain4":{ + "name":"MCB_CPLD", + "is_support_warm_upg":0, + "init_cmd": [ + # firmware upgrade set sysled blue/amber alternate flashing + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x50, "value": [0x01]} + ] + }, + "chain5":{ + "name":"SMB_CPLD", + "is_support_warm_upg":0, + "init_cmd": [ + # firmware upgrade set sysled blue/amber alternate flashing + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x50, "value": [0x01]} + ] + }, + "chain6":{ + "name":"FCB_B_CPLD", + "is_support_warm_upg":0, + "init_cmd": [ + # firmware upgrade set sysled blue/amber alternate flashing + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x50, "value": [0x01]} + ] + }, + "chain7":{ + "name":"FCB_T_CPLD", + "is_support_warm_upg":0, + "init_cmd": [ + # firmware upgrade set sysled blue/amber alternate flashing + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x50, "value": [0x01]} + ] + }, + "chain8":{ + "name":"MAC_PCIe", + "is_support_warm_upg":0, + "init_cmd": [ + # firmware upgrade set sysled blue/amber alternate flashing + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x50, "value": [0x01]} + ] + }, + }, + + "TEST": { + "fpga": [ + {"chain": 1, "file": "/etc/.upgrade_test/0x40d9/iob_fpga_test_header.bin", "display_name": "IOB_FPGA"}, + {"chain": 2, "file": "/etc/.upgrade_test/0x40d9/dom_fpga_test_header.bin", "display_name": "DOM_FPGA"}, + ], + "cpld": [ + {"chain": 3, "file": "/etc/.upgrade_test/0x40d9/scm_cpld_spi_test_header.bin", "display_name": "SCM_CPLD_SPI"}, + {"chain": 4, "file": "/etc/.upgrade_test/0x40d9/mcb_cpld_spi_test_header.bin", "display_name": "MCB_CPLD_SPI"}, + {"chain": 5, "file": "/etc/.upgrade_test/0x40d9/smb_cpld_spi_test_header.bin", "display_name": "SMB_CPLD_SPI"}, + {"chain": 6, "file": "/etc/.upgrade_test/0x40d9/fcb_b_cpld_spi_test_header.bin", "display_name": "FCB_B_CPLD_SPI"}, + {"chain": 7, "file": "/etc/.upgrade_test/0x40d9/fcb_t_cpld_spi_test_header.bin", "display_name": "FCB_T_CPLD_SPI"}, + #{"chain": 8, "file": "/etc/.upgrade_test/0x40d9/mac_pcie_spi_test_header.bin", "display_name": "MAC_PCIe"}, + ], + }, + }, + + "BMC": { + "name": "BMC", + "init_cmd": [ + # firmware upgrade set sysled blue/amber alternate flashing + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x50, "value": [0x01]} + ], + "finish_cmd": [], + }, +} + +PLATFORM_E2_CONF = { + "fan": [ + {"name": "fan1", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/40-0050/eeprom"}, + {"name": "fan2", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/48-0050/eeprom"}, + {"name": "fan3", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/41-0050/eeprom"}, + {"name": "fan4", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/49-0050/eeprom"}, + {"name": "fan5", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/42-0050/eeprom"}, + {"name": "fan6", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/50-0050/eeprom"}, + {"name": "fan7", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/43-0050/eeprom"}, + {"name": "fan8", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/51-0050/eeprom"}, + ], + "psu": [ + {"name": "psu1", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/11-0050/eeprom"}, + {"name": "psu2", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/10-0050/eeprom"}, + ], + "syseeprom": [ + {"name": "syseeprom", "e2_type": "onie_tlv", "e2_path": "/sys/bus/i2c/devices/1-0056/eeprom"}, + ], + "scm": [ + {"name": "scm", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/32-0052/eeprom"}, + ], + "smb": [ + {"name": "smb", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/3-0051/eeprom"}, + ], + "chassis": [ + {"name": "chassis", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/2-0051/eeprom"}, + ], +} + +PLATFORM_POWER_CONF = [ + { + "name": "Input power total", + "unit": "W", + "children": [ + { + "name": "PSU1 input", + "pre_check": { + "loc": "/sys/s3ip/psu/psu1/present", + "gettype": "sysfs", "mask": 0x01, "okval": 1, + "not_ok_msg": "ABSENT" + }, + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/11-0058/hwmon/hwmon*/power1_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)/1000000)" + }, + { + "name": "PSU2 input", + "pre_check": { + "loc": "/sys/s3ip/psu/psu2/present", + "gettype": "sysfs", "mask": 0x01, "okval": 1, + "not_ok_msg": "ABSENT" + }, + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/10-0058/hwmon/hwmon*/power1_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)/1000000)" + }, + ] + }, + { + "name": "Output power total", + "unit": "W", + "children": [ + { + "name": "PSU1 output", + "pre_check": { + "loc": "/sys/s3ip/psu/psu1/present", + "gettype": "sysfs", "mask": 0x01, "okval": 1, + "not_ok_msg": "ABSENT" + }, + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/11-0058/hwmon/hwmon*/power2_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)/1000000)" + }, + { + "name": "PSU2 output", + "pre_check": { + "loc": "/sys/s3ip/psu/psu2/present", + "gettype": "sysfs", "mask": 0x01, "okval": 1, + "not_ok_msg": "ABSENT" + }, + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/10-0058/hwmon/hwmon*/power2_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)/1000000)" + }, + ] + }, + { + "name": "MAC power consumption", + "unit": "W", + "children": [ + { + "name": "MAC_CORE", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/64-0040/hwmon/hwmon*/power3_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*2/1000000)" + }, + { + "name": "MAC_ANALOG0 V0.9", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/65-0040/hwmon/hwmon*/power3_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)/1000000)" + }, + { + "name": "MAC_ANALOG0 V0.75", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/65-0040/hwmon/hwmon*/power4_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)/1000000)" + }, + { + "name": "MAC_ANALOG1 V0.9", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/66-0040/hwmon/hwmon*/power3_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)/1000000)" + }, + { + "name": "MAC_ANALOG1 V0.75", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/66-0040/hwmon/hwmon*/power4_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)/1000000)" + }, + { + "name": "MAC_PLL0_VDD0.9", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/56-0040/hwmon/hwmon*/in2_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/56-0040/hwmon/hwmon*/curr2_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "MAC_PLL1_VDD0.9", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/56-0040/hwmon/hwmon*/in1_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/56-0040/hwmon/hwmon*/curr1_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "MAC_PLL2_VDD0.9", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/58-0040/hwmon/hwmon*/in1_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/58-0040/hwmon/hwmon*/curr1_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "MAC_PLL3_VDD0.9", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/58-0040/hwmon/hwmon*/in3_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/58-0040/hwmon/hwmon*/curr3_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "MAC_VDD_0.8", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/58-0040/hwmon/hwmon*/in2_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/58-0040/hwmon/hwmon*/curr2_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "MAC_VDD_1.8", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/60-0040/hwmon/hwmon*/in1_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/60-0040/hwmon/hwmon*/curr1_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "MAC_VDD_1.5", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/60-0040/hwmon/hwmon*/in2_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/60-0040/hwmon/hwmon*/curr2_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "MAC_VDD_1.2", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/61-0040/hwmon/hwmon*/in1_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/61-0040/hwmon/hwmon*/curr1_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + } + ] + }, + { + "name": "CPO OE0 power consumption", + "unit": "W", + "children": [ + { + "name": "OE0_AVDD_RX_1.8", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/67-0070/hwmon/hwmon*/loopa_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/67-0070/hwmon/hwmon*/loopa_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.97+220)/1000000)" + }, + { + "name": "OE0_AVDD_RX_1.2", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/67-0070/hwmon/hwmon*/loopb_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/67-0070/hwmon/hwmon*/loopb_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.984+180)/1000000)" + }, + { + "name": "OE0_AVDD_TX_1.8", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/67-0068/hwmon/hwmon*/loopa_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/67-0068/hwmon/hwmon*/loopa_iout", + "int_decode": 10, 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"float(float(%s)*(float(%s)*0.984+177)/1000000)" + }, + { + "name": "OE7_AVDD_TX_1.2", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/67-0066/hwmon/hwmon*/loopb_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/67-0066/hwmon/hwmon*/loopb_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.974+126)/1000000)" + }, + { + "name": "OE7_AVDD_TRX_0.75", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/67-005e/hwmon/hwmon*/loopa_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/67-005e/hwmon/hwmon*/loopa_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.984+140)/1000000)" + }, + ] + }, + { + "name": "RLM power consumption", + "unit": "W", + "children": [ + { + "name": "RLML_VDD V3.3", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/71-0068/hwmon/hwmon*/loopa_pout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*1.5/1000000)" + }, + { + "name": "RLMH_VDD V3.3", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/71-0068/hwmon/hwmon*/loopb_pout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*1.5/1000000)" + }, + ] + }, + { + "name": "CPU sub-module power consumption", + "unit": "W", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/33-0041/hwmon/hwmon*/in3_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/33-0041/hwmon/hwmon*/curr3_input", + "int_decode": 10, + } + ], + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "FAN power consumption total", + "unit": "W", + "children": [ + { + "name": "FAN1 power consumption", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/88-0042/hwmon/hwmon*/in1_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/88-0042/hwmon/hwmon*/curr1_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "FAN2 power consumption", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/89-0042/hwmon/hwmon*/in2_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/89-0042/hwmon/hwmon*/curr2_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "FAN3 power consumption", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/88-0042/hwmon/hwmon*/in2_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/88-0042/hwmon/hwmon*/curr2_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "FAN4 power consumption", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/89-0042/hwmon/hwmon*/in3_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/89-0042/hwmon/hwmon*/curr3_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "FAN5 power consumption", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/88-0042/hwmon/hwmon*/in3_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/88-0042/hwmon/hwmon*/curr3_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "FAN6 power consumption", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/90-0042/hwmon/hwmon*/in1_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/90-0042/hwmon/hwmon*/curr1_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "FAN7 power consumption", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/89-0042/hwmon/hwmon*/in1_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/89-0042/hwmon/hwmon*/curr1_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "FAN8 power consumption", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/90-0042/hwmon/hwmon*/in2_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/90-0042/hwmon/hwmon*/curr2_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + + ] + }, +] + +REBOOT_CAUSE_PARA = { + "reboot_cause_list": [ + { + "name": "otp_switch_reboot", + "monitor_point": {"gettype": "file_exist", "judge_file": "/etc/.otp_switch_reboot_flag", "okval": True}, + "record": [ + {"record_type": "file", "mode": "cover", "log": "Thermal Overload: ASIC, ", + "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"}, + {"record_type": "file", "mode": "add", "log": "Thermal Overload: ASIC, ", + "path": "/etc/sonic/.reboot/.history-reboot-cause.txt", "file_max_size": 1 * 1024 * 1024} + ], + "finish_operation": [ + {"gettype": "cmd", "cmd": "rm -rf /etc/.otp_switch_reboot_flag"}, + ] + }, + { + "name": "otp_other_reboot", + "monitor_point": {"gettype": "file_exist", "judge_file": "/etc/.otp_other_reboot_flag", "okval": True}, + "record": [ + {"record_type": "file", "mode": "cover", "log": "Thermal Overload: Other, ", + "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"}, + {"record_type": "file", "mode": "add", "log": "Thermal Overload: Other, ", + "path": "/etc/sonic/.reboot/.history-reboot-cause.txt", "file_max_size": 1 * 1024 * 1024} + ], + "finish_operation": [ + {"gettype": "cmd", "cmd": "rm -rf /etc/.otp_other_reboot_flag"}, + ] + }, + ], + "other_reboot_cause_record": [ + {"record_type": "file", "mode": "cover", "log": "Other, ", "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"}, + {"record_type": "file", "mode": "add", "log": "Other, ", "path": "/etc/sonic/.reboot/.history-reboot-cause.txt"} + ], +} + +POWER_CTRL_CONF = { + "oe": [ + { + "name": "OE0", + "status": [ + { + "val_conf": {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x22, "mask": 0x01}, + "off": [0x00], + "on": [0x01], + } + ], + "on": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfe, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_7", "value": 0x00, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x81, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_7", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfe, "value": 0x01, "delay": 0.001}, + ], + "off": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfe, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_7", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x81, "value": 0xfe}, + ], + "cycle": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfe, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_7", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x81, "value": 0xfe, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x81, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_7", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfe, "value": 0x01, "delay": 0.001}, + ], + "reset": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfe, "value": 0x00}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfe, "value": 0x01, "delay": 0.01}, + ], + }, + { + "name": "OE1", + "status": [ + { + "val_conf": {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x22, "mask": 0x02}, + "off": [0x00], + "on": [0x02], + } + ], + "on": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfd, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_4", "value": 0x00, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x82, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_4", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfd, "value": 0x02, "delay": 0.001}, + ], + "off": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfd, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_4", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x82, "value": 0xfe}, + ], + "cycle": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfd, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_4", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x82, "value": 0xfe, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x82, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_4", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfd, "value": 0x02, "delay": 0.001}, + ], + "reset": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfd, "value": 0x00}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfd, "value": 0x02, "delay": 0.01}, + ], + }, + { + "name": "OE2", + "status": [ + { + "val_conf": {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x22, "mask": 0x04}, + "off": [0x00], + "on": [0x04], + } + ], + "on": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfb, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_3", "value": 0x00, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x83, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_3", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfb, "value": 0x04, "delay": 0.001}, + ], + "off": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfb, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_3", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x83, "value": 0xfe}, + ], + "cycle": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfb, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_3", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x83, "value": 0xfe, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x83, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_3", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfb, "value": 0x04, "delay": 0.001}, + ], + "reset": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfb, "value": 0x00}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfb, "value": 0x04, "delay": 0.01}, + ], + }, + { + "name": "OE3", + "status": [ + { + "val_conf": {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x22, "mask": 0x08}, + "off": [0x00], + "on": [0x08], + } + ], + "on": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xf7, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_0", "value": 0x00, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x84, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_0", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xf7, "value": 0x08, "delay": 0.001}, + ], + "off": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xf7, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_0", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x84, "value": 0xfe}, + ], + "cycle": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xf7, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_0", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x84, "value": 0xfe, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x84, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_0", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xf7, "value": 0x08, "delay": 0.001}, + ], + "reset": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xf7, "value": 0x00}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xf7, "value": 0x08, "delay": 0.01}, + ], + }, + { + "name": "OE4", + "status": [ + { + "val_conf": {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x22, "mask": 0x10}, + "off": [0x00], + "on": [0x10], + } + ], + "on": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xef, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_1", "value": 0x00, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x85, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_1", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xef, "value": 0x10, "delay": 0.001}, + ], + "off": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xef, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_1", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x85, "value": 0xfe}, + ], + "cycle": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xef, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_1", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x85, "value": 0xfe, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x85, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_1", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xef, "value": 0x10, "delay": 0.001}, + ], + "reset": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xef, "value": 0x00}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xef, "value": 0x10, "delay": 0.01}, + ], + }, + { + "name": "OE5", + "status": [ + { + "val_conf": {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x22, "mask": 0x20}, + "off": [0x00], + "on": [0x20], + } + ], + "on": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xdf, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_3", "value": 0x00, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x86, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_3", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xdf, "value": 0x20, "delay": 0.001}, + ], + "off": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xdf, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_3", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x86, "value": 0xfe}, + ], + "cycle": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xdf, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_3", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x86, "value": 0xfe, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x86, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_3", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xdf, "value": 0x20, "delay": 0.001}, + ], + "reset": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xdf, "value": 0x00}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xdf, "value": 0x20, "delay": 0.01}, + ], + }, + { + "name": "OE6", + "status": [ + { + "val_conf": {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x22, "mask": 0x40}, + "off": [0x00], + "on": [0x40], + } + ], + "on": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xbf, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_4", "value": 0x00, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x87, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_4", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xbf, "value": 0x40, "delay": 0.001}, + ], + "off": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xbf, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_4", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x87, "value": 0xfe}, + ], + "cycle": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xbf, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_4", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x87, "value": 0xfe, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x87, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_4", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xbf, "value": 0x40, "delay": 0.001}, + ], + "reset": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xbf, "value": 0x00}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xbf, "value": 0x40, "delay": 0.01}, + ], + }, + { + "name": "OE7", + "status": [ + { + "val_conf": {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x22, "mask": 0x80}, + "off": [0x00], + "on": [0x80], + } + ], + "on": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0x7f, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_7", "value": 0x00, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x88, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_7", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0x7f, "value": 0x80, "delay": 0.001}, + ], + "off": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0x7f, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_7", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x88, "value": 0xfe}, + ], + "cycle": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0x7f, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_7", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x88, "value": 0xfe, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x88, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_7", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0x7f, "value": 0x80, "delay": 0.001}, + ], + "reset": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0x7f, "value": 0x00}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0x7f, "value": 0x80, "delay": 0.01}, + ], + } + ] +} + +SET_FW_MAC_CONF = [ + { + "name": "eth0", + "e2_name": "syseeprom", + "get_act_mac": {"cmd": "ethtool -e eth0 offset 0 length 6 |grep 0x0000 | awk -F':' '{gsub(/ /, \":\", $2);print $2}'| sed 's/^[[:space:]]*//' | sed 's/:\s*$//'", "gettype": "cmd_str"}, + "set_mac_cfg": { + "type": 1, + "cmd": {"cmd": "ethtool -E eth0 magic 0x15338086 offset %s value 0x%s length 1", "gettype": "cmd", "delay": 0.1}, + }, + "check_mac_cfg": {"cmd": "ethtool -e eth0 offset 0 length 6 |grep 0x0000 | awk -F':' '{gsub(/ /, \":\", $2);print $2}'| sed 's/^[[:space:]]*//' | sed 's/:\s*$//'", "gettype": "cmd_str"}, + } +] + +SET_MAC_CONF = SET_FW_MAC_CONF +PRODUCT_NAME_CONF = {} diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/config/x86_64_micas_m2_w6940_128x1_fr4_r0_0x40d9_v01_ac_config.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/config/x86_64_micas_m2_w6940_128x1_fr4_r0_0x40d9_v01_ac_config.py new file mode 100755 index 00000000000..998486753b9 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/config/x86_64_micas_m2_w6940_128x1_fr4_r0_0x40d9_v01_ac_config.py @@ -0,0 +1,3226 @@ +#!/usr/bin/python +# -*- coding: UTF-8 -*- + +# CPO 100 board modified configuration, support 2 AC PSUS + +from platform_common import * + +STARTMODULE = { + "hal_fanctrl": 1, + "hal_ledctrl": 1, + "avscontrol": 1, + "dev_monitor": 1, + "tty_console": 0, + "reboot_cause": 1, + "pmon_syslog": 1, + "sff_temp_polling": 1, + "generate_airflow": 0, + "product_name": 1, + "generate_mgmt_version": 0, + "set_fw_mac": 1, +} + +DEV_MONITOR_PARAM = { + "polling_time": 10, + "psus": [ + { + "name": "psu2", + "present": {"gettype": "i2c", "bus": 13, "loc": 0x1d, "offset": 0x42, "presentbit": 0, "okval": 0}, + "device": [ + {"id": "psu2pmbus", "name": "wb_fsp1200", "bus": 10, "loc": 0x58, "attr": "hwmon"}, + {"id": "psu2frue2", "name": "wb_24c02", "bus": 10, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "psu1", + "present": {"gettype": "i2c", "bus": 13, "loc": 0x1d, "offset": 0x42, "presentbit": 1, "okval": 0}, + "device": [ + {"id": "psu1pmbus", "name": "wb_fsp1200", "bus": 11, "loc": 0x58, "attr": "hwmon"}, + {"id": "psu1frue2", "name": "wb_24c02", "bus": 11, "loc": 0x50, "attr": "eeprom"}, + ], + }, + ], + "fans": [ + { + "name": "fan7", + "present": {"gettype": "i2c", "bus": 44, "loc": 0x0d, "offset": 0x5b, "presentbit": 0, "okval": 0}, + "device": [ + {"id": "fan7frue2", "name": "wb_24c64", "bus": 43, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "fan5", + "present": {"gettype": "i2c", "bus": 44, "loc": 0x0d, "offset": 0x5b, "presentbit": 1, "okval": 0}, + "device": [ + {"id": "fan5frue2", "name": "wb_24c64", "bus": 42, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "fan3", + "present": {"gettype": "i2c", "bus": 44, "loc": 0x0d, "offset": 0x5b, "presentbit": 2, "okval": 0}, + "device": [ + {"id": "fan3frue2", "name": "wb_24c64", "bus": 41, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "fan1", + "present": {"gettype": "i2c", "bus": 44, "loc": 0x0d, "offset": 0x5b, "presentbit": 3, "okval": 0}, + "device": [ + {"id": "fan1frue2", "name": "wb_24c64", "bus":40, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "fan8", + "present": {"gettype": "i2c", "bus": 52, "loc": 0x0d, "offset": 0x5b, "presentbit": 0, "okval": 0}, + "device": [ + {"id": "fan8frue2", "name": "wb_24c64", "bus": 51, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "fan6", + "present": {"gettype": "i2c", "bus": 52, "loc": 0x0d, "offset": 0x5b, "presentbit": 1, "okval": 0}, + "device": [ + {"id": "fan6frue2", "name": "wb_24c64", "bus": 50, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "fan4", + "present": {"gettype": "i2c", "bus": 52, "loc": 0x0d, "offset": 0x5b, "presentbit": 2, "okval": 0}, + "device": [ + {"id": "fan4frue2", "name": "wb_24c64", "bus": 49, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "fan2", + "present": {"gettype": "i2c", "bus": 52, "loc": 0x0d, "offset": 0x5b, "presentbit": 3, "okval": 0}, + "device": [ + {"id": "fan2frue2", "name": "wb_24c64", "bus": 48, "loc": 0x50, "attr": "eeprom"}, + ], + }, + ], + "others": [ + { + "name": "eeprom", + "device": [ + {"id": "eeprom_1", "name": "wb_24c02", "bus": 1, "loc": 0x56, "attr": "eeprom"}, + {"id": "eeprom_2", "name": "wb_24c02", "bus": 1, "loc": 0x57, "attr": "eeprom"}, + {"id": "eeprom_3", "name": "wb_24c02", "bus": 2, "loc": 0x51, "attr": "eeprom"}, + {"id": "eeprom_4", "name": "wb_24c02", "bus": 3, "loc": 0x51, "attr": "eeprom"}, + {"id": "eeprom_5", "name": "wb_24c02", "bus": 32, "loc": 0x52, "attr": "eeprom"}, + {"id": "eeprom_6", "name": "wb_24c02", "bus": 12, "loc": 0x57, "attr": "eeprom"}, + ], + }, + { + "name": "oe_mcu", + "device": [ + {"id": "oe_mcu_1", "name": "wb_24c02", "bus": 24, "loc": 0x50, "attr": "eeprom"}, + {"id": "oe_mcu_2", "name": "wb_24c02", "bus": 25, "loc": 0x50, "attr": "eeprom"}, + {"id": "oe_mcu_3", "name": "wb_24c02", "bus": 26, "loc": 0x50, "attr": "eeprom"}, + {"id": "oe_mcu_4", "name": "wb_24c02", "bus": 27, "loc": 0x50, "attr": "eeprom"}, + {"id": "oe_mcu_5", "name": "wb_24c02", "bus": 28, "loc": 0x50, "attr": "eeprom"}, + {"id": "oe_mcu_6", "name": "wb_24c02", "bus": 29, "loc": 0x50, "attr": "eeprom"}, + {"id": "oe_mcu_7", "name": "wb_24c02", "bus": 30, "loc": 0x50, "attr": "eeprom"}, + {"id": "oe_mcu_8", "name": "wb_24c02", "bus": 31, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "tmp275", + "device": [ + {"id": "tmp275_1", "name": "wb_tmp275", "bus": 34, "loc": 0x4c, "attr": "hwmon"}, + {"id": "tmp275_2", "name": "wb_tmp275", "bus": 35, "loc": 0x4d, "attr": "hwmon"}, + {"id": "tmp275_3", "name": "wb_tmp275", "bus": 8, "loc": 0x48, "attr": "hwmon"}, + {"id": "tmp275_4", "name": "wb_tmp275", "bus": 8, "loc": 0x49, "attr": "hwmon"}, + {"id": "tmp275_5", "name": "wb_tmp275", "bus": 9, "loc": 0x48, "attr": "hwmon"}, + {"id": "tmp275_6", "name": "wb_tmp275", "bus": 9, "loc": 0x49, "attr": "hwmon"}, + {"id": "tmp275_7", "name": "wb_tmp275", "bus": 14, "loc": 0x48, "attr": "hwmon"}, + {"id": "tmp275_8", "name": "wb_tmp275", "bus": 14, "loc": 0x49, "attr": "hwmon"}, + {"id": "tmp275_9", "name": "wb_tmp275", "bus": 14, "loc": 0x4b, "attr": "hwmon"}, + ], + }, + { + "name": "ina3221", + "device": [ + {"id": "ina3221_1", "name": "wb_ina3221", "bus": 33, "loc": 0x40, "attr": "hwmon"}, + {"id": "ina3221_2", "name": "wb_ina3221", "bus": 33, "loc": 0x41, "attr": "hwmon"}, + {"id": "ina3221_3", "name": "wb_ina3221", "bus": 33, "loc": 0x42, "attr": "hwmon"}, + {"id": "ina3221_4", "name": "wb_ina3221", "bus": 12, "loc": 0x40, "attr": "hwmon"}, + {"id": "ina3221_5", "name": "wb_ina3221", "bus": 12, "loc": 0x41, "attr": "hwmon"}, + {"id": "ina3221_6", "name": "wb_ina3221", "bus": 56, "loc": 0x40, "attr": "hwmon"}, + {"id": "ina3221_7", "name": "wb_ina3221", "bus": 56, "loc": 0x41, "attr": "hwmon"}, + {"id": "ina3221_8", "name": "wb_ina3221", "bus": 57, "loc": 0x40, "attr": "hwmon"}, + {"id": "ina3221_9", "name": "wb_ina3221", "bus": 58, "loc": 0x40, "attr": "hwmon"}, + {"id": "ina3221_10", "name": "wb_ina3221", "bus": 59, "loc": 0x40, "attr": "hwmon"}, + {"id": "ina3221_11", "name": "wb_ina3221", "bus": 60, "loc": 0x40, "attr": "hwmon"}, + {"id": "ina3221_12", "name": "wb_ina3221", "bus": 61, "loc": 0x40, "attr": "hwmon"}, + {"id": "ina3221_13", "name": "wb_ina3221", "bus": 62, "loc": 0x40, "attr": "hwmon"}, + {"id": "ina3221_14", "name": "wb_ina3221", "bus": 63, "loc": 0x40, "attr": "hwmon"}, + {"id": "ina3221_15", "name": "wb_ina3221", "bus": 88, "loc": 0x42, "attr": "hwmon"}, + {"id": "ina3221_16", "name": "wb_ina3221", "bus": 89, "loc": 0x42, "attr": "hwmon"}, + {"id": "ina3221_17", "name": "wb_ina3221", "bus": 90, "loc": 0x42, "attr": "hwmon"}, + {"id": "ina3221_18", "name": "wb_ina3221", "bus": 91, "loc": 0x42, "attr": "hwmon"}, + ], + }, + { + "name": "xdpe12284", + "device": [ + {"id": "xdpe12284_1", "name": "wb_xdpe12284", "bus": 5, "loc": 0x5e, "attr": "hwmon"}, + {"id": "xdpe12284_2", "name": "wb_xdpe12284", "bus": 5, "loc": 0x68, "attr": "hwmon"}, + {"id": "xdpe12284_3", "name": "wb_xdpe12284", "bus": 5, "loc": 0x6e, "attr": "hwmon"}, + {"id": "xdpe12284_4", "name": "wb_xdpe12284", "bus": 5, "loc": 0x70, "attr": "hwmon"}, + {"id": "xdpe12284_5", "name": "wb_xdpe12284", "bus": 67, "loc": 0x68, "attr": "hwmon"}, + {"id": "xdpe12284_6", "name": "wb_xdpe12284", "bus": 67, "loc": 0x70, "attr": "hwmon"}, + {"id": "xdpe12284_7", "name": "wb_xdpe12284", "bus": 67, "loc": 0x60, "attr": "hwmon"}, + {"id": "xdpe12284_8", "name": "wb_xdpe12284", "bus": 67, "loc": 0x66, "attr": "hwmon"}, + {"id": "xdpe12284_9", "name": "wb_xdpe12284", "bus": 67, "loc": 0x6e, "attr": "hwmon"}, + {"id": "xdpe12284_10", "name": "wb_xdpe12284", "bus": 67, "loc": 0x5e, "attr": "hwmon"}, + {"id": "xdpe12284_11", "name": "wb_xdpe12284", "bus": 68, "loc": 0x68, "attr": "hwmon"}, + {"id": "xdpe12284_12", "name": "wb_xdpe12284", "bus": 68, "loc": 0x70, "attr": "hwmon"}, + {"id": "xdpe12284_13", "name": "wb_xdpe12284", "bus": 68, "loc": 0x60, "attr": "hwmon"}, + {"id": "xdpe12284_14", "name": "wb_xdpe12284", "bus": 68, "loc": 0x66, "attr": "hwmon"}, + {"id": "xdpe12284_15", "name": "wb_xdpe12284", "bus": 68, "loc": 0x6e, "attr": "hwmon"}, + {"id": "xdpe12284_16", "name": "wb_xdpe12284", "bus": 68, "loc": 0x5e, "attr": "hwmon"}, + {"id": "xdpe12284_17", "name": "wb_xdpe12284", "bus": 69, "loc": 0x68, "attr": "hwmon"}, + {"id": "xdpe12284_18", "name": "wb_xdpe12284", "bus": 69, "loc": 0x70, "attr": "hwmon"}, + {"id": "xdpe12284_19", "name": "wb_xdpe12284", "bus": 69, "loc": 0x60, "attr": "hwmon"}, + {"id": "xdpe12284_20", "name": "wb_xdpe12284", "bus": 69, "loc": 0x66, "attr": "hwmon"}, + {"id": "xdpe12284_21", "name": "wb_xdpe12284", "bus": 69, "loc": 0x6e, "attr": "hwmon"}, + {"id": "xdpe12284_22", "name": "wb_xdpe12284", "bus": 69, "loc": 0x5e, "attr": "hwmon"}, + {"id": "xdpe12284_23", "name": "wb_xdpe12284", "bus": 70, "loc": 0x68, "attr": "hwmon"}, + {"id": "xdpe12284_24", "name": "wb_xdpe12284", "bus": 70, "loc": 0x70, "attr": "hwmon"}, + {"id": "xdpe12284_25", "name": "wb_xdpe12284", "bus": 70, "loc": 0x60, "attr": "hwmon"}, + {"id": "xdpe12284_26", "name": "wb_xdpe12284", "bus": 70, "loc": 0x66, "attr": "hwmon"}, + {"id": "xdpe12284_27", "name": "wb_xdpe12284", "bus": 70, "loc": 0x6e, "attr": "hwmon"}, + {"id": "xdpe12284_28", "name": "wb_xdpe12284", "bus": 70, "loc": 0x5e, "attr": "hwmon"}, + {"id": "xdpe12284_29", "name": "wb_xdpe12284", "bus": 71, "loc": 0x68, "attr": "hwmon"}, + ], + }, + { + "name": "xdpe132g5c", + "device": [ + {"id": "xdpe132g5c_1", "name": "wb_xdpe132g5c_pmbus", "bus": 64, "loc": 0x40, "attr": "hwmon"}, + {"id": "xdpe132g5c_2", "name": "wb_xdpe132g5c_pmbus", "bus": 65, "loc": 0x40, "attr": "hwmon"}, + {"id": "xdpe132g5c_3", "name": "wb_xdpe132g5c_pmbus", "bus": 66, "loc": 0x40, "attr": "hwmon"}, + ], + }, + { + "name": "ucd90160", + "device": [ + {"id": "ucd90160_1", "name": "wb_ucd90160", "bus": 5, "loc": 0x5f, "attr": "hwmon"}, + ], + }, + ], +} + +MANUINFO_CONF = { + "bios": { + "key": "BIOS", + "head": True, + "next": "cpu" + }, + "bios_vendor": { + "parent": "bios", + "key": "Vendor", + "cmd": "dmidecode -t 0 |grep Vendor", + "pattern": r".*Vendor", + "separator": ":", + "arrt_index": 1, + }, + "bios_version": { + "parent": "bios", + "key": "Version", + "cmd": "dmidecode -t 0 |grep Version", + "pattern": r".*Version", + "separator": ":", + "arrt_index": 2, + }, + "bios_date": { + "parent": "bios", + "key": "Release Date", + "cmd": "dmidecode -t 0 |grep Release", + "pattern": r".*Release Date", + "separator": ":", + "arrt_index": 3, + }, + "bios_boot": { + "parent": "bios", + "key": "Boot From", + "devfile": { + "loc": "/dev/cpld1", + "offset":0x1d, + "len":1, + "bit_width":1 + }, + "decode": { + "01": "Master", + "02": "Slave" + }, + "arrt_index": 4, + }, + + "cpu": { + "key": "CPU", + "next": "cpld" + }, + "cpu_vendor": { + "parent": "cpu", + "key": "Vendor", + "cmd": "dmidecode --type processor |grep Manufacturer", + "pattern": r".*Manufacturer", + "separator": ":", + "arrt_index": 1, + }, + "cpu_model": { + "parent": "cpu", + "key": "Device Model", + "cmd": "dmidecode --type processor | grep Version", + "pattern": r".*Version", + "separator": ":", + "arrt_index": 2, + }, + "cpu_core": { + "parent": "cpu", + "key": "Core Count", + "cmd": "dmidecode --type processor | grep \"Core Count\"", + "pattern": r".*Core Count", + "separator": ":", + "arrt_index": 3, + }, + "cpu_thread": { + "parent": "cpu", + "key": "Thread Count", + "cmd": "dmidecode --type processor | grep \"Thread Count\"", + "pattern": r".*Thread Count", + "separator": ":", + "arrt_index": 4, + }, + + + "cpld": { + "key": "CPLD", + "next": "fpga" + }, + + "cpld1": { + "key": "CPLD1", + "parent": "cpld", + "arrt_index": 1, + }, + "cpld1_model": { + "key": "Device Model", + "parent": "cpld1", + "config": "LCMXO3LF-2100C-5BG256C", + "arrt_index": 1, + }, + "cpld1_vender": { + "key": "Vendor", + "parent": "cpld1", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld1_desc": { + "key": "Description", + "parent": "cpld1", + "config": "CPU CPLD", + "arrt_index": 3, + }, + "cpld1_version": { + "key": "Firmware Version", + "parent": "cpld1", + "reg": { + "loc": "/dev/port", + "offset": 0xa00, + "size": 4 + }, + "callback": "cpld_format", + "arrt_index": 4, + }, + + "cpld2": { + "key": "CPLD2", + "parent": "cpld", + "arrt_index": 2, + }, + "cpld2_model": { + "key": "Device Model", + "parent": "cpld2", + "config": "LCMXO3LF-2100C-5BG256C", + "arrt_index": 1, + }, + "cpld2_vender": { + "key": "Vendor", + "parent": "cpld2", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld2_desc": { + "key": "Description", + "parent": "cpld2", + "config": "SCM CPLD", + "arrt_index": 3, + }, + "cpld2_version": { + "key": "Firmware Version", + "parent": "cpld2", + "reg": { + "loc": "/dev/port", + "offset": 0x900, + "size": 4 + }, + "callback": "cpld_format", + "arrt_index": 4, + }, + "cpld2_boot": { + "parent": "cpld2", + "key": "Boot From", + "devfile": { + "loc": "/dev/cpld1", + "offset":0x06, + "len":1, + "bit_width":1 + }, + "decode": { + "01": "Main", + "02": "Golden" + }, + "arrt_index": 5, + }, + + "cpld3": { + "key": "CPLD3", + "parent": "cpld", + "arrt_index": 3, + }, + "cpld3_model": { + "key": "Device Model", + "parent": "cpld3", + "config": "LCMXO3LF-4300C-6BG324I", + "arrt_index": 1, + }, + "cpld3_vender": { + "key": "Vendor", + "parent": "cpld3", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld3_desc": { + "key": "Description", + "parent": "cpld3", + "config": "MCB CPLD", + "arrt_index": 3, + }, + "cpld3_version": { + "key": "Firmware Version", + "parent": "cpld3", + "i2c": { + "bus": "13", + "loc": "0x1d", + "offset": 0, + "size": 4 + }, + "callback": "cpld_format", + "arrt_index": 4, + }, + "cpld3_boot": { + "parent": "cpld3", + "key": "Boot From", + "devfile": { + "loc": "/dev/cpld3", + "offset":0x0d, + "len":1, + "bit_width":1 + }, + "decode": { + "01": "Main", + "02": "Golden" + }, + "arrt_index": 5, + }, + + "cpld4": { + "key": "CPLD4", + "parent": "cpld", + "arrt_index": 4, + }, + "cpld4_model": { + "key": "Device Model", + "parent": "cpld4", + "config": "LCMXO3LF-4300C-6BG324I", + "arrt_index": 1, + }, + "cpld4_vender": { + "key": "Vendor", + "parent": "cpld4", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld4_desc": { + "key": "Description", + "parent": "cpld4", + "config": "SMB CPLD", + "arrt_index": 3, + }, + "cpld4_version": { + "key": "Firmware Version", + "parent": "cpld4", + "i2c": { + "bus": "20", + "loc": "0x1e", + "offset": 0, + "size": 4 + }, + "callback": "cpld_format", + "arrt_index": 4, + }, + "cpld4_boot": { + "parent": "cpld4", + "key": "Boot From", + "devfile": { + "loc": "/dev/cpld4", + "offset":0x0d, + "len":1, + "bit_width":1 + }, + "decode": { + "01": "Main", + "02": "Golden" + }, + "arrt_index": 5, + }, + + "cpld5": { + "key": "CPLD5", + "parent": "cpld", + "arrt_index": 5, + }, + "cpld5_model": { + "key": "Device Model", + "parent": "cpld5", + "config": "LCMXO3LF-2100C-5BG256C", + "arrt_index": 1, + }, + "cpld5_vender": { + "key": "Vendor", + "parent": "cpld5", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld5_desc": { + "key": "Description", + "parent": "cpld5", + "config": "FCB_T CPLD", + "arrt_index": 3, + }, + "cpld5_version": { + "key": "Firmware Version", + "parent": "cpld5", + "i2c": { + "bus": "44", + "loc": "0x0d", + "offset": 0, + "size": 4 + }, + "callback": "cpld_format", + "arrt_index": 4, + }, + "cpld5_boot": { + "parent": "cpld5", + "key": "Boot From", + "devfile": { + "loc": "/dev/cpld5", + "offset":0x0d, + "len":1, + "bit_width":1 + }, + "decode": { + "01": "Main", + "02": "Golden" + }, + "arrt_index": 5, + }, + + "cpld6": { + "key": "CPLD6", + "parent": "cpld", + "arrt_index": 6, + }, + "cpld6_model": { + "key": "Device Model", + "parent": "cpld6", + "config": "LCMXO3LF-2100C-5BG256C", + "arrt_index": 1, + }, + "cpld6_vender": { + "key": "Vendor", + "parent": "cpld6", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld6_desc": { + "key": "Description", + "parent": "cpld6", + "config": "FCB_B CPLD", + "arrt_index": 3, + }, + "cpld6_version": { + "key": "Firmware Version", + "parent": "cpld6", + "i2c": { + "bus": "52", + "loc": "0x0d", + "offset": 0, + "size": 4 + }, + "callback": "cpld_format", + "arrt_index": 4, + }, + "cpld6_boot": { + "parent": "cpld6", + "key": "Boot From", + "devfile": { + "loc": "/dev/cpld6", + "offset":0x0d, + "len":1, + "bit_width":1 + }, + "decode": { + "01": "Main", + "02": "Golden" + }, + "arrt_index": 5, + }, + + + "psu": { + "key": "PSU", + "next": "fan" + }, + + "psu1": { + "parent": "psu", + "key": "PSU1", + "arrt_index": 1, + }, + "psu1_hw_version": { + "key": "Hardware Version", + "parent": "psu1", + "extra": { + "funcname": "getPsu", + "id": "psu1", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "psu1_fw_version": { + "key": "Firmware Version", + "parent": "psu1", + "config": "NA", + "arrt_index": 2, + }, + + "psu2": { + "parent": "psu", + "key": "PSU2", + "arrt_index": 2, + }, + "psu2_hw_version": { + "key": "Hardware Version", + "parent": "psu2", + "extra": { + "funcname": "getPsu", + "id": "psu2", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "psu2_fw_version": { + "key": "Firmware Version", + "parent": "psu2", + "config": "NA", + "arrt_index": 2, + }, + + "fan": { + "key": "FAN", + "next": "fpga" + }, + "fan1": { + "key": "FAN1", + "parent": "fan", + "arrt_index": 1, + }, + "fan1_hw_version": { + "key": "Hardware Version", + "parent": "fan1", + "extra": { + "funcname": "checkFan", + "id": "fan1", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan1_fw_version": { + "key": "Firmware Version", + "parent": "fan1", + "config": "NA", + "arrt_index": 2, + }, + + "fan2": { + "key": "FAN2", + "parent": "fan", + "arrt_index": 2, + }, + "fan2_hw_version": { + "key": "Hardware Version", + "parent": "fan2", + "extra": { + "funcname": "checkFan", + "id": "fan2", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan2_fw_version": { + "key": "Firmware Version", + "parent": "fan2", + "config": "NA", + "arrt_index": 2, + }, + + "fan3": { + "key": "FAN3", + "parent": "fan", + "arrt_index": 3, + }, + "fan3_hw_version": { + "key": "Hardware Version", + "parent": "fan3", + "extra": { + "funcname": "checkFan", + "id": "fan3", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan3_fw_version": { + "key": "Firmware Version", + "parent": "fan3", + "config": "NA", + "arrt_index": 2, + }, + + "fan4": { + "key": "FAN4", + "parent": "fan", + "arrt_index": 4, + }, + "fan4_hw_version": { + "key": "Hardware Version", + "parent": "fan4", + "extra": { + "funcname": "checkFan", + "id": "fan4", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan4_fw_version": { + "key": "Firmware Version", + "parent": "fan4", + "config": "NA", + "arrt_index": 2, + }, + + "fan5": { + "key": "FAN5", + "parent": "fan", + "arrt_index": 5, + }, + "fan5_hw_version": { + "key": "Hardware Version", + "parent": "fan5", + "extra": { + "funcname": "checkFan", + "id": "fan5", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan5_fw_version": { + "key": "Firmware Version", + "parent": "fan5", + "config": "NA", + "arrt_index": 2, + }, + + "fan6": { + "key": "FAN6", + "parent": "fan", + "arrt_index": 6, + }, + "fan6_hw_version": { + "key": "Hardware Version", + "parent": "fan6", + "extra": { + "funcname": "checkFan", + "id": "fan6", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan6_fw_version": { + "key": "Firmware Version", + "parent": "fan6", + "config": "NA", + "arrt_index": 2, + }, + + "fan7": { + "key": "FAN7", + "parent": "fan", + "arrt_index": 7, + }, + "fan7_hw_version": { + "key": "Hardware Version", + "parent": "fan7", + "extra": { + "funcname": "checkFan", + "id": "fan7", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan7_fw_version": { + "key": "Firmware Version", + "parent": "fan7", + "config": "NA", + "arrt_index": 2, + }, + + "fan8": { + "key": "FAN8", + "parent": "fan", + "arrt_index": 8, + }, + "fan8_hw_version": { + "key": "Hardware Version", + "parent": "fan8", + "extra": { + "funcname": "checkFan", + "id": "fan8", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan8_fw_version": { + "key": "Firmware Version", + "parent": "fan8", + "config": "NA", + "arrt_index": 2, + }, + + + "i210": { + "key": "NIC", + "next": "fpga" + }, + "i210_model": { + "parent": "i210", + "config": "NA", + "key": "Device Model", + "arrt_index": 1, + }, + "i210_vendor": { + "parent": "i210", + "config": "INTEL", + "key": "Vendor", + "arrt_index": 2, + }, + "i210_version": { + "parent": "i210", + "cmd": "ethtool -i eno1", + "pattern": r"firmware-version", + "separator": ":", + "key": "Firmware Version", + "arrt_index": 3, + }, + + "fpga": { + "key": "FPGA", + }, + + "fpga1": { + "key": "FPGA1", + "parent": "fpga", + "arrt_index": 1, + }, + "fpga1_model": { + "parent": "fpga1", + "config": "XC7A50T-2FGG484C", + "key": "Device Model", + "arrt_index": 1, + }, + "fpga1_vender": { + "parent": "fpga1", + "config": "XILINX", + "key": "Vendor", + "arrt_index": 2, + }, + "fpga1_desc": { + "key": "Description", + "parent": "fpga1", + "config": "IOB FPGA", + "arrt_index": 3, + }, + "fpga1_fw_version": { + "parent": "fpga1", + "devfile": { + "loc": "/dev/fpga0", + "offset": 0, + "len": 4, + "bit_width": 4 + }, + "key": "Firmware Version", + "arrt_index": 4, + }, + "fpga1_date": { + "parent": "fpga1", + "devfile": { + "loc": "/dev/fpga0", + "offset": 4, + "len": 4, + "bit_width": 4 + }, + "key": "Build Date", + "arrt_index": 5, + }, + "fpga1_boot": { + "parent": "fpga1", + "key": "Boot From", + "devfile": { + "loc": "/dev/fpga0", + "offset":0x00, + "len":1, + "bit_width":1 + }, + "decode": { + "00": "Golden", + "default": "Main" + }, + "arrt_index": 6, + }, + "fpga2": { + "key": "FPGA2", + "parent": "fpga", + "arrt_index": 2, + }, + "fpga2_model": { + "parent": "fpga2", + "config": "XC7A50T-2FGG484C", + "key": "Device Model", + "arrt_index": 1, + }, + "fpga2_vender": { + "parent": "fpga2", + "config": "XILINX", + "key": "Vendor", + "arrt_index": 2, + }, + "fpga2_desc": { + "key": "Description", + "parent": "fpga2", + "config": "DOM FPGA", + "arrt_index": 3, + }, + "fpga2_fw_version": { + "parent": "fpga2", + "devfile": { + "loc": "/dev/fpga1", + "offset": 0, + "len": 4, + "bit_width": 4 + }, + "key": "Firmware Version", + "arrt_index": 4, + }, + "fpga2_date": { + "parent": "fpga2", + "devfile": { + "loc": "/dev/fpga1", + "offset": 4, + "len": 4, + "bit_width": 4 + }, + "key": "Build Date", + "arrt_index": 5, + }, + "fpga2_boot": { + "parent": "fpga2", + "key": "Boot From", + "devfile": { + "loc": "/dev/fpga1", + "offset":0x00, + "len":1, + "bit_width":1 + }, + "decode": { + "00": "Golden", + "default": "Main" + }, + "arrt_index": 6, + }, +} + +PMON_SYSLOG_STATUS = { + "polling_time": 3, + "fans": { + "present": {"path": ["/sys/s3ip/fan/*/present"], "ABSENT": 0}, + "status": [ + {"path": "/sys/s3ip/fan/%s/motor1/status", 'okval': 1}, + {"path": "/sys/s3ip/fan/%s/motor2/status", 'okval': 1}, + ], + "nochangedmsgflag": 1, + "nochangedmsgtime": 60, + "noprintfirsttimeflag": 0, + "alias": { + "fan1": "FAN1", + "fan2": "FAN2", + "fan3": "FAN3", + "fan4": "FAN4", + "fan5": "FAN5", + "fan6": "FAN6", + "fan7": "FAN7", + "fan8": "FAN8" + } + }, + "psus": { + "present": {"path": ["/sys/s3ip/psu/*/present"], "ABSENT": 0}, + "status": [ + {"path": "/sys/s3ip/psu/%s/out_status", "okval": 1}, + {"path": "/sys/s3ip/psu/%s/alarm", "okval": 0}, + ], + "nochangedmsgflag": 1, + "nochangedmsgtime": 60, + "noprintfirsttimeflag": 0, + "alias": { + "psu1": "PSU1", + "psu2": "PSU2" + } + } +} + +##################### MAC Voltage adjust#################################### +MAC_DEFAULT_PARAM = [ + { + "name": "mac_core", # AVS name + "type": 0, # 1: used default value, if rov value not in range. 0: do nothing, if rov value not in range + "rov_source": 0, # 0: get rov value from cpld, 1: get rov value from SDK + "cpld_avs": {"bus": 20, "loc": 0x1e, "offset": 0x20, "gettype": "i2c"}, + "set_avs": { + "loc": "/sys/bus/i2c/devices/64-0040/hwmon/hwmon*/avs0_vout", + "gettype": "sysfs", "formula": "int((%f)*1000000)" + }, + "mac_avs_param": { + 0x92: 0.7471, + 0x90: 0.7600, + 0x8e: 0.7710, + 0x8c: 0.7839, + 0x8a: 0.7961, + 0x88: 0.8071, + 0x86: 0.8181, + 0x84: 0.8291, + 0x82: 0.8401 + } + } +] + +DRIVERLISTS = [ + {"name": "ice", "delay": 0, "removable": 0}, + {"name": "wb_i2c_i801", "delay": 1, "removable": 0}, + {"name": "i2c_dev", "delay": 0, "removable": 0}, + {"name": "wb_i2c_algo_bit", "delay": 0}, + {"name": "wb_i2c_gpio", "delay": 0}, + {"name": "i2c_mux", "delay": 0, "removable": 0}, + {"name": "wb_i2c_gpio_device gpio_sda=181 gpio_scl=180 gpio_chip_name=INTC3001:00 bus_num=1", "delay": 0}, + {"name": "platform_common dfd_my_type=0x40d9", "delay": 0}, + {"name": "wb_logic_dev_common", "delay":0}, + {"name": "wb_io_dev", "delay": 0}, + {"name": "wb_io_dev_device", "delay": 0}, + {"name": "wb_fpga_pcie", "delay": 0}, + {"name": "wb_pcie_dev", "delay": 0}, + {"name": "wb_pcie_dev_device", "delay": 0}, + {"name": "wb_i2c_dev", "delay": 0}, + {"name": "wb_i2c_ocores", "delay": 0}, + {"name": "wb_i2c_ocores_device", "delay": 0}, + {"name": "wb_i2c_mux_pca9641", "delay": 0}, + {"name": "wb_i2c_mux_pca954x", "delay": 0}, + {"name": "wb_i2c_mux_pca954x_device_b3", "delay": 1}, + {"name": "wb_i2c_dev_device", "delay": 1}, + {"name": "wb_lm75", "delay": 0}, +# {"name": "wb_at24", "delay": 0}, + {"name": "optoe", "delay": 0}, + {"name": "wb_pmbus_core", "delay": 0}, + {"name": "wb_xdpe12284", "delay": 0}, + {"name": "wb_xdpe132g5c_pmbus", "delay": 0}, + {"name": "wb_csu550", "delay": 0}, + {"name": "wb_ina3221", "delay": 0}, + {"name": "wb_ucd9000", "delay": 0}, + {"name": "wb_xdpe132g5c", "delay": 0}, +# {"name": "firmware_driver_sysfs", "delay": 0}, + {"name": "wb_rc32312", "delay": 0}, + {"name": "s3ip_sysfs", "delay": 0}, + {"name": "wb_switch_driver", "delay": 0}, + {"name": "fan_device_driver", "delay": 0}, + {"name": "psu_device_driver", "delay": 0}, + {"name": "vol_sensor_device_driver", "delay": 0}, + {"name": "temp_sensor_device_driver", "delay": 0}, + {"name": "wb_spd", "delay": 0}, + {"name": "wb_lpc_bmc", "delay": 0}, +] + +DEVICE = [ + # eeprom + {"name": "wb_24c02", "bus": 1, "loc": 0x56}, + {"name": "wb_24c02", "bus": 1, "loc": 0x57}, + {"name": "wb_24c02", "bus": 2, "loc": 0x51}, + {"name": "wb_24c02", "bus": 3, "loc": 0x51}, + # SCM + {"name": "wb_24c02", "bus": 32, "loc": 0x52}, + {"name": "wb_ina3221", "bus": 33, "loc": 0x40}, + {"name": "wb_ina3221", "bus": 33, "loc": 0x41}, + {"name": "wb_ina3221", "bus": 33, "loc": 0x42}, + {"name": "wb_tmp275", "bus": 34, "loc": 0x4c}, + {"name": "wb_tmp275", "bus": 35, "loc": 0x4d}, + # CPU + {"name": "wb_ucd90160", "bus": 5, "loc": 0x5f}, + {"name": "wb_xdpe12284", "bus": 5, "loc": 0x5e}, + {"name": "wb_xdpe12284", "bus": 5, "loc": 0x68}, + {"name": "wb_xdpe12284", "bus": 5, "loc": 0x6e}, + {"name": "wb_xdpe12284", "bus": 5, "loc": 0x70}, + # fanA + {"name": "wb_tmp275", "bus": 8, "loc": 0x48}, + {"name": "wb_tmp275", "bus": 8, "loc": 0x49}, + {"name": "wb_24c64", "bus": 40, "loc": 0x50}, + {"name": "wb_24c64", "bus": 41, "loc": 0x50}, + {"name": "wb_24c64", "bus": 42, "loc": 0x50}, + {"name": "wb_24c64", "bus": 43, "loc": 0x50}, + # fanB + {"name": "wb_tmp275", "bus": 9, "loc": 0x48}, + {"name": "wb_tmp275", "bus": 9, "loc": 0x49}, + {"name": "wb_24c64", "bus": 48, "loc": 0x50}, + {"name": "wb_24c64", "bus": 49, "loc": 0x50}, + {"name": "wb_24c64", "bus": 50, "loc": 0x50}, + {"name": "wb_24c64", "bus": 51, "loc": 0x50}, + # psu + {"name": "wb_24c02", "bus": 10, "loc": 0x50}, + {"name": "wb_fsp1200", "bus": 10, "loc": 0x58}, + {"name": "wb_24c02", "bus": 11, "loc": 0x50}, + {"name": "wb_fsp1200", "bus": 11, "loc": 0x58}, + # MCB + {"name": "wb_ina3221", "bus": 12, "loc": 0x40}, + {"name": "wb_ina3221", "bus": 12, "loc": 0x41}, + {"name": "wb_24c02", "bus": 12, "loc": 0x57}, + # SMB + {"name": "wb_tmp275", "bus": 14, "loc": 0x48}, + {"name": "wb_tmp275", "bus": 14, "loc": 0x49}, + {"name": "wb_tmp275", "bus": 14, "loc": 0x4b}, + {"name": "wb_ina3221", "bus": 56, "loc": 0x40}, + {"name": "wb_ina3221", "bus": 56, "loc": 0x41}, + {"name": "wb_ina3221", "bus": 57, "loc": 0x40}, + {"name": "wb_ina3221", "bus": 58, "loc": 0x40}, + {"name": "wb_ina3221", "bus": 59, "loc": 0x40}, + {"name": "wb_ina3221", "bus": 60, "loc": 0x40}, + {"name": "wb_ina3221", "bus": 61, "loc": 0x40}, + {"name": "wb_ina3221", "bus": 62, "loc": 0x40}, + {"name": "wb_ina3221", "bus": 63, "loc": 0x40}, + {"name": "wb_xdpe132g5c_pmbus", "bus": 64, "loc": 0x40}, + {"name": "wb_xdpe132g5c_pmbus", "bus": 65, "loc": 0x40}, + {"name": "wb_xdpe132g5c_pmbus", "bus": 66, "loc": 0x40}, + # OE0 + {"name": "wb_xdpe12284", "bus": 67, "loc": 0x68}, + {"name": "wb_xdpe12284", "bus": 67, "loc": 0x70}, + {"name": "wb_xdpe12284", "bus": 67, "loc": 0x60}, + # OE7 + {"name": "wb_xdpe12284", "bus": 67, "loc": 0x66}, + {"name": "wb_xdpe12284", "bus": 67, "loc": 0x6e}, + {"name": "wb_xdpe12284", "bus": 67, "loc": 0x5e}, + # OE1 + {"name": "wb_xdpe12284", "bus": 68, "loc": 0x68}, + {"name": "wb_xdpe12284", "bus": 68, "loc": 0x70}, + {"name": "wb_xdpe12284", "bus": 68, "loc": 0x60}, + # OE2 + {"name": "wb_xdpe12284", "bus": 68, "loc": 0x66}, + {"name": "wb_xdpe12284", "bus": 68, "loc": 0x6e}, + {"name": "wb_xdpe12284", "bus": 68, "loc": 0x5e}, + # OE3 + {"name": "wb_xdpe12284", "bus": 69, "loc": 0x68}, + {"name": "wb_xdpe12284", "bus": 69, "loc": 0x70}, + {"name": "wb_xdpe12284", "bus": 69, "loc": 0x60}, + # OE4 + {"name": "wb_xdpe12284", "bus": 69, "loc": 0x66}, + {"name": "wb_xdpe12284", "bus": 69, "loc": 0x6e}, + {"name": "wb_xdpe12284", "bus": 69, "loc": 0x5e}, + # OE5 + {"name": "wb_xdpe12284", "bus": 70, "loc": 0x68}, + {"name": "wb_xdpe12284", "bus": 70, "loc": 0x70}, + {"name": "wb_xdpe12284", "bus": 70, "loc": 0x60}, + # OE6 + {"name": "wb_xdpe12284", "bus": 70, "loc": 0x66}, + {"name": "wb_xdpe12284", "bus": 70, "loc": 0x6e}, + {"name": "wb_xdpe12284", "bus": 70, "loc": 0x5e}, + # MAC_XDPE12284C_06 + {"name": "wb_xdpe12284", "bus": 71, "loc": 0x68}, + # fan DCDC + {"name": "wb_ina3221", "bus": 88, "loc": 0x42}, + {"name": "wb_ina3221", "bus": 89, "loc": 0x42}, + {"name": "wb_ina3221", "bus": 90, "loc": 0x42}, + # RC32312 + {"name": "wb_rc32312", "bus": 72, "loc": 0x09}, + {"name": "wb_24c64", "bus": 72, "loc": 0x50}, + {"name": "wb_rc32312", "bus": 73, "loc": 0x09}, + {"name": "wb_24c64", "bus": 73, "loc": 0x50}, + # xdpe132g5c i2c + {"name": "wb_xdpe132g5c", "bus": 64, "loc": 0x10}, + {"name": "wb_xdpe132g5c", "bus": 65, "loc": 0x10}, + {"name": "wb_xdpe132g5c", "bus": 66, "loc": 0x10}, + # LED + {"name": "wb_ina3221", "bus": 91, "loc": 0x42}, +] + +OPTOE = [ +# {"name": "wb_24c02", "startbus": 24, "endbus": 31}, + {"name": "optoe3", "startbus": 24, "endbus": 31}, +] + +REBOOT_CTRL_PARAM = {} + +INIT_PARAM_PRE = [ + # set ina3221 shunt_resistor + # SCM_VDD12.0_C + {"loc": "33-0041/hwmon/hwmon*/shunt1_resistor", "value": "1000"}, + # SCM_OCM_V12.0_C + {"loc": "33-0041/hwmon/hwmon*/shunt3_resistor", "value": "1000"}, + # MAC_PLL0_VDD0.9_C + {"loc": "56-0040/hwmon/hwmon*/shunt1_resistor", "value": "2000"}, + # MAC_PLL1_VDD0.9_C + {"loc": "56-0040/hwmon/hwmon*/shunt2_resistor", "value": "2000"}, + # MAC_PLL3_VDD0.9_C + {"loc": "61-0040/hwmon/hwmon*/shunt1_resistor", "value": "2000"}, + # MAC_PLL2_VDD0.9_C + {"loc": "61-0040/hwmon/hwmon*/shunt2_resistor", "value": "2000"}, + # FAN1_VDD12_C + {"loc": "88-0042/hwmon/hwmon*/shunt1_resistor", "value": "1000"}, + # FAN2_VDD12_C + {"loc": "88-0042/hwmon/hwmon*/shunt2_resistor", "value": "1000"}, + # FAN3_VDD12_C + {"loc": "88-0042/hwmon/hwmon*/shunt3_resistor", "value": "1000"}, + # FAN4_VDD12_C + {"loc": "89-0042/hwmon/hwmon*/shunt1_resistor", "value": "1000"}, + # FAN5_VDD12_C + {"loc": "89-0042/hwmon/hwmon*/shunt2_resistor", "value": "1000"}, + # FAN6_VDD12_C + {"loc": "89-0042/hwmon/hwmon*/shunt3_resistor", "value": "1000"}, + # FAN7_VDD12_C + {"loc": "90-0042/hwmon/hwmon*/shunt1_resistor", "value": "1000"}, + # FAN8_VDD12_C + {"loc": "90-0042/hwmon/hwmon*/shunt2_resistor", "value": "1000"}, + # set avs threshold + # MAC_CORE_V + {"loc": "64-0040/hwmon/hwmon*/avs0_vout_min", "value": "630000"}, + {"loc": "64-0040/hwmon/hwmon*/avs0_vout_max", "value": "858000"}, + # MAC_ANALOG0 V0.9_V + {"loc": "65-0040/hwmon/hwmon*/avs0_vout_min", "value": "810000"}, + {"loc": "65-0040/hwmon/hwmon*/avs0_vout_max", "value": "990000"}, + # MAC_ANALOG0 V0.75_V + {"loc": "65-0040/hwmon/hwmon*/avs1_vout_min", "value": "675000"}, + {"loc": "65-0040/hwmon/hwmon*/avs1_vout_max", "value": "825000"}, + # MAC_ANALOG1 V0.9_V + {"loc": "66-0040/hwmon/hwmon*/avs0_vout_min", "value": "810000"}, + {"loc": "66-0040/hwmon/hwmon*/avs0_vout_max", "value": "990000"}, + # MAC_ANALOG1 V0.75_V + {"loc": "66-0040/hwmon/hwmon*/avs1_vout_min", "value": "675000"}, + {"loc": "66-0040/hwmon/hwmon*/avs1_vout_max", "value": "825000"}, + # # OE0_AVDD_RX_1.8_V + # {"loc": "67-0070/hwmon/hwmon*/avs0_vout_min", "value": "1710000"}, + # {"loc": "67-0070/hwmon/hwmon*/avs0_vout_max", "value": "1890000"}, + # {"loc": "67-0070/hwmon/hwmon*/avs0_vout", "value": "1800000"}, + # # OE0_AVDD_RX_1.2_V + # {"loc": "67-0070/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "67-0070/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "67-0070/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE0_AVDD_TX_1.8_V + # {"loc": "67-0068/hwmon/hwmon*/avs0_vout_min", "value": "1750000"}, + # {"loc": "67-0068/hwmon/hwmon*/avs0_vout_max", "value": "1950000"}, + # {"loc": "67-0068/hwmon/hwmon*/avs0_vout", "value": "1850000"}, + # # OE0_AVDD_TX_1.2_V + # {"loc": "67-0068/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "67-0068/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "67-0068/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE0_AVDD_TRX_0.75_V + # {"loc": "67-0060/hwmon/hwmon*/avs0_vout_min", "value": "713000"}, + # {"loc": "67-0060/hwmon/hwmon*/avs0_vout_max", "value": "788000"}, + # {"loc": "67-0060/hwmon/hwmon*/avs0_vout", "value": "750000"}, + # # OE1_AVDD_RX_1.8_V + # {"loc": "68-0070/hwmon/hwmon*/avs0_vout_min", "value": "1710000"}, + # {"loc": "68-0070/hwmon/hwmon*/avs0_vout_max", "value": "1890000"}, + # {"loc": "68-0070/hwmon/hwmon*/avs0_vout", "value": "1800000"}, + # # OE1_AVDD_RX_1.2_V + # {"loc": "68-0070/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "68-0070/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "68-0070/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE1_AVDD_TX_1.8_V + # {"loc": "68-0068/hwmon/hwmon*/avs0_vout_min", "value": "1750000"}, + # {"loc": "68-0068/hwmon/hwmon*/avs0_vout_max", "value": "1950000"}, + # {"loc": "68-0068/hwmon/hwmon*/avs0_vout", "value": "1850000"}, + # # OE1_AVDD_TX_1.2_V + # {"loc": "68-0068/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "68-0068/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "68-0068/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE1_AVDD_TRX_0.75_V + # {"loc": "68-0060/hwmon/hwmon*/avs0_vout_min", "value": "713000"}, + # {"loc": "68-0060/hwmon/hwmon*/avs0_vout_max", "value": "788000"}, + # {"loc": "68-0060/hwmon/hwmon*/avs0_vout", "value": "750000"}, + # # OE2_AVDD_RX_1.8_V + # {"loc": "68-006e/hwmon/hwmon*/avs0_vout_min", "value": "1710000"}, + # {"loc": "68-006e/hwmon/hwmon*/avs0_vout_max", "value": "1890000"}, + # {"loc": "68-006e/hwmon/hwmon*/avs0_vout", "value": "1800000"}, + # # OE2_AVDD_RX_1.2_V + # {"loc": "68-006e/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "68-006e/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "68-006e/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE2_AVDD_TX_1.8_V + # {"loc": "68-0066/hwmon/hwmon*/avs0_vout_min", "value": "1750000"}, + # {"loc": "68-0066/hwmon/hwmon*/avs0_vout_max", "value": "1950000"}, + # {"loc": "68-0066/hwmon/hwmon*/avs0_vout", "value": "1850000"}, + # # OE2_AVDD_TX_1.2_V + # {"loc": "68-0066/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "68-0066/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "68-0066/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE2_AVDD_TRX_0.75_V + # {"loc": "68-005e/hwmon/hwmon*/avs0_vout_min", "value": "713000"}, + # {"loc": "68-005e/hwmon/hwmon*/avs0_vout_max", "value": "788000"}, + # {"loc": "68-005e/hwmon/hwmon*/avs0_vout", "value": "750000"}, + # # OE3_AVDD_RX_1.8_V + # {"loc": "69-0070/hwmon/hwmon*/avs0_vout_min", "value": "1710000"}, + # {"loc": "69-0070/hwmon/hwmon*/avs0_vout_max", "value": "1890000"}, + # {"loc": "69-0070/hwmon/hwmon*/avs0_vout", "value": "1800000"}, + # # OE3_AVDD_RX_1.2_V + # {"loc": "69-0070/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "69-0070/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "69-0070/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE3_AVDD_TX_1.8_V + # {"loc": "69-0068/hwmon/hwmon*/avs0_vout_min", "value": "1750000"}, + # {"loc": "69-0068/hwmon/hwmon*/avs0_vout_max", "value": "1950000"}, + # {"loc": "69-0068/hwmon/hwmon*/avs0_vout", "value": "1850000"}, + # # OE3_AVDD_TX_1.2_V + # {"loc": "69-0068/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "69-0068/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "69-0068/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE3_AVDD_TRX_0.75_V + # {"loc": "69-0060/hwmon/hwmon*/avs0_vout_min", "value": "713000"}, + # {"loc": "69-0060/hwmon/hwmon*/avs0_vout_max", "value": "788000"}, + # {"loc": "69-0060/hwmon/hwmon*/avs0_vout", "value": "750000"}, + # # OE4_AVDD_RX_1.8_V + # {"loc": "69-006e/hwmon/hwmon*/avs0_vout_min", "value": "1710000"}, + # {"loc": "69-006e/hwmon/hwmon*/avs0_vout_max", "value": "1890000"}, + # {"loc": "69-006e/hwmon/hwmon*/avs0_vout", "value": "1800000"}, + # # OE4_AVDD_RX_1.2_V + # {"loc": "69-006e/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "69-006e/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "69-006e/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE4_AVDD_TX_1.8_V + # {"loc": "69-0066/hwmon/hwmon*/avs0_vout_min", "value": "1750000"}, + # {"loc": "69-0066/hwmon/hwmon*/avs0_vout_max", "value": "1950000"}, + # {"loc": "69-0066/hwmon/hwmon*/avs0_vout", "value": "1850000"}, + # # OE4_AVDD_TX_1.2_V + # {"loc": "69-0066/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "69-0066/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "69-0066/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE4_AVDD_TRX_0.75_V + # {"loc": "69-005e/hwmon/hwmon*/avs0_vout_min", "value": "713000"}, + # {"loc": "69-005e/hwmon/hwmon*/avs0_vout_max", "value": "788000"}, + # {"loc": "69-005e/hwmon/hwmon*/avs0_vout", "value": "750000"}, + # # OE5_AVDD_RX_1.8_V + # {"loc": "70-0070/hwmon/hwmon*/avs0_vout_min", "value": "1710000"}, + # {"loc": "70-0070/hwmon/hwmon*/avs0_vout_max", "value": "1890000"}, + # {"loc": "70-0070/hwmon/hwmon*/avs0_vout", "value": "1800000"}, + # # OE5_AVDD_RX_1.2_V + # {"loc": "70-0070/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "70-0070/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "70-0070/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE5_AVDD_TX_1.8_V + # {"loc": "70-0068/hwmon/hwmon*/avs0_vout_min", "value": "1750000"}, + # {"loc": "70-0068/hwmon/hwmon*/avs0_vout_max", "value": "1950000"}, + # {"loc": "70-0068/hwmon/hwmon*/avs0_vout", "value": "1850000"}, + # # OE5_AVDD_TX_1.2_V + # {"loc": "70-0068/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "70-0068/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "70-0068/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE5_AVDD_TRX_0.75_V + # {"loc": "70-0060/hwmon/hwmon*/avs0_vout_min", "value": "713000"}, + # {"loc": "70-0060/hwmon/hwmon*/avs0_vout_max", "value": "788000"}, + # {"loc": "70-0060/hwmon/hwmon*/avs0_vout", "value": "750000"}, + # # OE6_AVDD_RX_1.8_V + # {"loc": "70-006e/hwmon/hwmon*/avs0_vout_min", "value": "1710000"}, + # {"loc": "70-006e/hwmon/hwmon*/avs0_vout_max", "value": "1890000"}, + # {"loc": "70-006e/hwmon/hwmon*/avs0_vout", "value": "1800000"}, + # # OE6_AVDD_RX_1.2_V + # {"loc": "70-006e/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "70-006e/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "70-006e/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE6_AVDD_TX_1.8_V + # {"loc": "70-0066/hwmon/hwmon*/avs0_vout_min", "value": "1750000"}, + # {"loc": "70-0066/hwmon/hwmon*/avs0_vout_max", "value": "1950000"}, + # {"loc": "70-0066/hwmon/hwmon*/avs0_vout", "value": "1850000"}, + # # OE6_AVDD_TX_1.2_V + # {"loc": "70-0066/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "70-0066/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "70-0066/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE6_AVDD_TRX_0.75_V + # {"loc": "70-005e/hwmon/hwmon*/avs0_vout_min", "value": "713000"}, + # {"loc": "70-005e/hwmon/hwmon*/avs0_vout_max", "value": "788000"}, + # {"loc": "70-005e/hwmon/hwmon*/avs0_vout", "value": "750000"}, + # # OE7_AVDD_RX_1.8_V + # {"loc": "67-006e/hwmon/hwmon*/avs0_vout_min", "value": "1710000"}, + # {"loc": "67-006e/hwmon/hwmon*/avs0_vout_max", "value": "1890000"}, + # {"loc": "67-006e/hwmon/hwmon*/avs0_vout", "value": "1800000"}, + # # OE7_AVDD_RX_1.2_V + # {"loc": "67-006e/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "67-006e/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "67-006e/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE7_AVDD_TX_1.8_V + # {"loc": "67-0066/hwmon/hwmon*/avs0_vout_min", "value": "1750000"}, + # {"loc": "67-0066/hwmon/hwmon*/avs0_vout_max", "value": "1950000"}, + # {"loc": "67-0066/hwmon/hwmon*/avs0_vout", "value": "1850000"}, + # # OE7_AVDD_TX_1.2_V + # {"loc": "67-0066/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "67-0066/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "67-0066/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE7_AVDD_TRX_0.75_V + # {"loc": "67-005e/hwmon/hwmon*/avs0_vout_min", "value": "713000"}, + # {"loc": "67-005e/hwmon/hwmon*/avs0_vout_max", "value": "788000"}, + # {"loc": "67-005e/hwmon/hwmon*/avs0_vout", "value": "750000"}, + # RLML_VDD V3.3_V *1.5 + {"loc": "71-0068/hwmon/hwmon*/avs0_vout_min", "value": "1980000"}, + {"loc": "71-0068/hwmon/hwmon*/avs0_vout_max", "value": "2420000"}, + # RLMH_VDD V3.3_V *1.5 + {"loc": "71-0068/hwmon/hwmon*/avs1_vout_min", "value": "1980000"}, + {"loc": "71-0068/hwmon/hwmon*/avs1_vout_max", "value": "2420000"}, + # OCM_XDPE_VCCIN_V + {"loc": "5-0070/hwmon/hwmon*/avs0_vout_min", "value": "1350000"}, + {"loc": "5-0070/hwmon/hwmon*/avs0_vout_max", "value": "2200000"}, + # OCM_XDPE_P1V8_V + {"loc": "5-0070/hwmon/hwmon*/avs1_vout_min", "value": "1690000"}, + {"loc": "5-0070/hwmon/hwmon*/avs1_vout_max", "value": "1910000"}, + # OCM_XDPE_P1V05_V + {"loc": "5-006e/hwmon/hwmon*/avs0_vout_min", "value": "954000"}, + {"loc": "5-006e/hwmon/hwmon*/avs0_vout_max", "value": "1160000"}, + # OCM_XDPE_VNN_PCH_V + {"loc": "5-006e/hwmon/hwmon*/avs1_vout_min", "value": "540000"}, + {"loc": "5-006e/hwmon/hwmon*/avs1_vout_max", "value": "1320000"}, + # OCM_XDPE_VNN_NAC_V + {"loc": "5-0068/hwmon/hwmon*/avs0_vout_min", "value": "540000"}, + {"loc": "5-0068/hwmon/hwmon*/avs0_vout_max", "value": "1320000"}, + # OCM_XDPE_VCC_ANA_V + {"loc": "5-0068/hwmon/hwmon*/avs1_vout_min", "value": "900000"}, + {"loc": "5-0068/hwmon/hwmon*/avs1_vout_max", "value": "1100000"}, + # OCM_XDPE_P1V2_VDDQ_V + {"loc": "5-005e/hwmon/hwmon*/avs0_vout_min", "value": "1120000"}, + {"loc": "5-005e/hwmon/hwmon*/avs0_vout_max", "value": "1280000"}, +] + +INIT_PARAM = [] + +INIT_COMMAND_PRE = [] + +INIT_COMMAND = [ + # enable fan watchdog + {"path": "/dev/cpld5", "offset": 0x22, "value": [0x01], "gettype": "devfile"}, + {"path": "/dev/cpld6", "offset": 0x22, "value": [0x01], "gettype": "devfile"}, +] + +UPGRADE_SUMMARY = { + "devtype": 0x40d9, + + "slot0": { + "subtype": 0, + "SPI-LOGIC-DEV": { + "chain1":{ + "name":"IOB_FPGA", + "is_support_warm_upg":0, + "init_cmd": [ + # firmware upgrade set sysled blue/amber alternate flashing + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x50, "value": [0x01]} + ] + }, + "chain2":{ + "name":"DOM_FPGA", + "is_support_warm_upg":0, + "init_cmd": [ + # firmware upgrade set sysled blue/amber alternate flashing + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x50, "value": [0x01]} + ] + }, + "chain3":{ + "name":"SCM_CPLD", + "is_support_warm_upg":0, + "init_cmd": [ + # firmware upgrade set sysled blue/amber alternate flashing + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x50, "value": [0x01]} + ] + }, + "chain4":{ + "name":"MCB_CPLD", + "is_support_warm_upg":0, + "init_cmd": [ + # firmware upgrade set sysled blue/amber alternate flashing + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x50, "value": [0x01]} + ] + }, + "chain5":{ + "name":"SMB_CPLD", + "is_support_warm_upg":0, + "init_cmd": [ + # firmware upgrade set sysled blue/amber alternate flashing + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x50, "value": [0x01]} + ] + }, + "chain6":{ + "name":"FCB_B_CPLD", + "is_support_warm_upg":0, + "init_cmd": [ + # firmware upgrade set sysled blue/amber alternate flashing + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x50, "value": [0x01]} + ] + }, + "chain7":{ + "name":"FCB_T_CPLD", + "is_support_warm_upg":0, + "init_cmd": [ + # firmware upgrade set sysled blue/amber alternate flashing + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x50, "value": [0x01]} + ] + }, + "chain8":{ + "name":"MAC_PCIe", + "is_support_warm_upg":0, + "init_cmd": [ + # firmware upgrade set sysled blue/amber alternate flashing + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x50, "value": [0x01]} + ] + }, + }, + + "TEST": { + "fpga": [ + {"chain": 1, "file": "/etc/.upgrade_test/0x40d9/iob_fpga_test_header.bin", "display_name": "IOB_FPGA"}, + {"chain": 2, "file": "/etc/.upgrade_test/0x40d9/dom_fpga_test_header.bin", "display_name": "DOM_FPGA"}, + ], + "cpld": [ + {"chain": 3, "file": "/etc/.upgrade_test/0x40d9/scm_cpld_spi_test_header.bin", "display_name": "SCM_CPLD_SPI"}, + {"chain": 4, "file": "/etc/.upgrade_test/0x40d9/mcb_cpld_spi_test_header.bin", "display_name": "MCB_CPLD_SPI"}, + {"chain": 5, "file": "/etc/.upgrade_test/0x40d9/smb_cpld_spi_test_header.bin", "display_name": "SMB_CPLD_SPI"}, + {"chain": 6, "file": "/etc/.upgrade_test/0x40d9/fcb_b_cpld_spi_test_header.bin", "display_name": "FCB_B_CPLD_SPI"}, + {"chain": 7, "file": "/etc/.upgrade_test/0x40d9/fcb_t_cpld_spi_test_header.bin", "display_name": "FCB_T_CPLD_SPI"}, + #{"chain": 8, "file": "/etc/.upgrade_test/0x40d9/mac_pcie_spi_test_header.bin", "display_name": "MAC_PCIe"}, + ], + }, + }, + + "BMC": { + "name": "BMC", + "init_cmd": [ + # firmware upgrade set sysled blue/amber alternate flashing + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x50, "value": [0x01]} + ], + "finish_cmd": [], + }, +} + +PLATFORM_E2_CONF = { + "fan": [ + {"name": "fan1", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/40-0050/eeprom"}, + {"name": "fan2", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/48-0050/eeprom"}, + {"name": "fan3", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/41-0050/eeprom"}, + {"name": "fan4", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/49-0050/eeprom"}, + {"name": "fan5", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/42-0050/eeprom"}, + {"name": "fan6", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/50-0050/eeprom"}, + {"name": "fan7", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/43-0050/eeprom"}, + {"name": "fan8", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/51-0050/eeprom"}, + ], + "psu": [ + {"name": "psu1", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/11-0050/eeprom"}, + {"name": "psu2", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/10-0050/eeprom"}, + ], + "syseeprom": [ + {"name": "syseeprom", "e2_type": "onie_tlv", "e2_path": "/sys/bus/i2c/devices/1-0056/eeprom"}, + ], + "scm": [ + {"name": "scm", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/32-0052/eeprom"}, + ], + "smb": [ + {"name": "smb", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/3-0051/eeprom"}, + ], + "chassis": [ + {"name": "chassis", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/2-0051/eeprom"}, + ], +} + +PLATFORM_POWER_CONF = [ + { + "name": "Input power total", + "unit": "W", + "children": [ + { + "name": "PSU1 input", + "pre_check": { + "loc": "/sys/s3ip/psu/psu1/present", + "gettype": "sysfs", "mask": 0x01, "okval": 1, + "not_ok_msg": "ABSENT" + }, + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/11-0058/hwmon/hwmon*/power1_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)/1000000)" + }, + { + "name": "PSU2 input", + "pre_check": { + "loc": "/sys/s3ip/psu/psu2/present", + "gettype": "sysfs", "mask": 0x01, "okval": 1, + "not_ok_msg": "ABSENT" + }, + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/10-0058/hwmon/hwmon*/power1_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)/1000000)" + }, + ] + }, + { + "name": "Output power total", + "unit": "W", + "children": [ + { + "name": "PSU1 output", + "pre_check": { + "loc": "/sys/s3ip/psu/psu1/present", + "gettype": "sysfs", "mask": 0x01, "okval": 1, + "not_ok_msg": "ABSENT" + }, + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/11-0058/hwmon/hwmon*/power2_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)/1000000)" + }, + { + "name": "PSU2 output", + "pre_check": { + "loc": "/sys/s3ip/psu/psu2/present", + "gettype": "sysfs", "mask": 0x01, "okval": 1, + "not_ok_msg": "ABSENT" + }, + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/10-0058/hwmon/hwmon*/power2_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)/1000000)" + }, + ] + }, + { + "name": "MAC power consumption", + "unit": "W", + "children": [ + { + "name": "MAC_CORE", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/64-0040/hwmon/hwmon*/power3_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*2/1000000)" + }, + { + "name": "MAC_ANALOG0 V0.9", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/65-0040/hwmon/hwmon*/power3_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)/1000000)" + }, + { + "name": "MAC_ANALOG0 V0.75", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/65-0040/hwmon/hwmon*/power4_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)/1000000)" + }, + { + "name": "MAC_ANALOG1 V0.9", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/66-0040/hwmon/hwmon*/power3_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)/1000000)" + }, + { + "name": "MAC_ANALOG1 V0.75", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/66-0040/hwmon/hwmon*/power4_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)/1000000)" + }, + { + "name": "MAC_PLL0_VDD0.9", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/56-0040/hwmon/hwmon*/in2_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/56-0040/hwmon/hwmon*/curr2_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "MAC_PLL1_VDD0.9", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/56-0040/hwmon/hwmon*/in1_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/56-0040/hwmon/hwmon*/curr1_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "MAC_PLL2_VDD0.9", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/58-0040/hwmon/hwmon*/in1_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/58-0040/hwmon/hwmon*/curr1_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "MAC_PLL3_VDD0.9", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/58-0040/hwmon/hwmon*/in3_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/58-0040/hwmon/hwmon*/curr3_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "MAC_VDD_0.8", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/58-0040/hwmon/hwmon*/in2_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/58-0040/hwmon/hwmon*/curr2_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "MAC_VDD_1.8", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/60-0040/hwmon/hwmon*/in1_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/60-0040/hwmon/hwmon*/curr1_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "MAC_VDD_1.5", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/60-0040/hwmon/hwmon*/in2_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/60-0040/hwmon/hwmon*/curr2_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "MAC_VDD_1.2", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/61-0040/hwmon/hwmon*/in1_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/61-0040/hwmon/hwmon*/curr1_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + } + ] + }, + { + "name": "CPO OE0 power consumption", + "unit": "W", + "children": [ + { + "name": "OE0_AVDD_RX_1.8", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/67-0070/hwmon/hwmon*/loopa_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/67-0070/hwmon/hwmon*/loopa_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.97+220)/1000000)" + }, + { + "name": "OE0_AVDD_RX_1.2", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/67-0070/hwmon/hwmon*/loopb_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/67-0070/hwmon/hwmon*/loopb_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.984+180)/1000000)" + }, + { + "name": "OE0_AVDD_TX_1.8", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/67-0068/hwmon/hwmon*/loopa_vout", + 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"float(float(%s)*(float(%s)*0.984+177)/1000000)" + }, + { + "name": "OE7_AVDD_TX_1.2", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/67-0066/hwmon/hwmon*/loopb_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/67-0066/hwmon/hwmon*/loopb_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.974+126)/1000000)" + }, + { + "name": "OE7_AVDD_TRX_0.75", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/67-005e/hwmon/hwmon*/loopa_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/67-005e/hwmon/hwmon*/loopa_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.984+140)/1000000)" + }, + ] + }, + { + "name": "RLM power consumption", + "unit": "W", + "children": [ + { + "name": "RLML_VDD V3.3", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/71-0068/hwmon/hwmon*/loopa_pout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*1.5/1000000)" + }, + { + "name": "RLMH_VDD V3.3", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/71-0068/hwmon/hwmon*/loopb_pout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*1.5/1000000)" + }, + ] + }, + { + "name": "CPU sub-module power consumption", + "unit": "W", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/33-0041/hwmon/hwmon*/in3_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/33-0041/hwmon/hwmon*/curr3_input", + "int_decode": 10, + } + ], + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "FAN power consumption total", + "unit": "W", + "children": [ + { + "name": "FAN1 power consumption", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/88-0042/hwmon/hwmon*/in1_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/88-0042/hwmon/hwmon*/curr1_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "FAN2 power consumption", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/89-0042/hwmon/hwmon*/in2_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/89-0042/hwmon/hwmon*/curr2_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "FAN3 power consumption", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/88-0042/hwmon/hwmon*/in2_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/88-0042/hwmon/hwmon*/curr2_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "FAN4 power consumption", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/89-0042/hwmon/hwmon*/in3_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/89-0042/hwmon/hwmon*/curr3_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "FAN5 power consumption", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/88-0042/hwmon/hwmon*/in3_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/88-0042/hwmon/hwmon*/curr3_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "FAN6 power consumption", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/90-0042/hwmon/hwmon*/in1_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/90-0042/hwmon/hwmon*/curr1_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "FAN7 power consumption", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/89-0042/hwmon/hwmon*/in1_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/89-0042/hwmon/hwmon*/curr1_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "FAN8 power consumption", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/90-0042/hwmon/hwmon*/in2_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/90-0042/hwmon/hwmon*/curr2_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + + ] + }, +] + +REBOOT_CAUSE_PARA = { + "reboot_cause_list": [ + { + "name": "otp_switch_reboot", + "monitor_point": {"gettype": "file_exist", "judge_file": "/etc/.otp_switch_reboot_flag", "okval": True}, + "record": [ + {"record_type": "file", "mode": "cover", "log": "Thermal Overload: ASIC, ", + "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"}, + {"record_type": "file", "mode": "add", "log": "Thermal Overload: ASIC, ", + "path": "/etc/sonic/.reboot/.history-reboot-cause.txt", "file_max_size": 1 * 1024 * 1024} + ], + "finish_operation": [ + {"gettype": "cmd", "cmd": "rm -rf /etc/.otp_switch_reboot_flag"}, + ] + }, + { + "name": "otp_other_reboot", + "monitor_point": {"gettype": "file_exist", "judge_file": "/etc/.otp_other_reboot_flag", "okval": True}, + "record": [ + {"record_type": "file", "mode": "cover", "log": "Thermal Overload: Other, ", + "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"}, + {"record_type": "file", "mode": "add", "log": "Thermal Overload: Other, ", + "path": "/etc/sonic/.reboot/.history-reboot-cause.txt", "file_max_size": 1 * 1024 * 1024} + ], + "finish_operation": [ + {"gettype": "cmd", "cmd": "rm -rf /etc/.otp_other_reboot_flag"}, + ] + }, + ], + "other_reboot_cause_record": [ + {"record_type": "file", "mode": "cover", "log": "Other, ", "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"}, + {"record_type": "file", "mode": "add", "log": "Other, ", "path": "/etc/sonic/.reboot/.history-reboot-cause.txt"} + ], +} + +POWER_CTRL_CONF = { + "oe": [ + { + "name": "OE0", + "status": [ + { + "val_conf": {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x22, "mask": 0x01}, + "off": [0x00], + "on": [0x01], + } + ], + "on": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfe, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_7", "value": 0x00, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x81, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_7", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfe, "value": 0x01, "delay": 0.001}, + ], + "off": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfe, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_7", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x81, "value": 0xfe}, + ], + "cycle": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfe, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_7", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x81, "value": 0xfe, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x81, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_7", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfe, "value": 0x01, "delay": 0.001}, + ], + "reset": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfe, "value": 0x00}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfe, "value": 0x01, "delay": 0.01}, + ], + }, + { + "name": "OE1", + "status": [ + { + "val_conf": {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x22, "mask": 0x02}, + "off": [0x00], + "on": [0x02], + } + ], + "on": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfd, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_4", "value": 0x00, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x82, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_4", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfd, "value": 0x02, "delay": 0.001}, + ], + "off": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfd, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_4", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x82, "value": 0xfe}, + ], + "cycle": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfd, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_4", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x82, "value": 0xfe, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x82, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_4", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfd, "value": 0x02, "delay": 0.001}, + ], + "reset": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfd, "value": 0x00}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfd, "value": 0x02, "delay": 0.01}, + ], + }, + { + "name": "OE2", + "status": [ + { + "val_conf": {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x22, "mask": 0x04}, + "off": [0x00], + "on": [0x04], + } + ], + "on": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfb, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_3", "value": 0x00, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x83, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_3", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfb, "value": 0x04, "delay": 0.001}, + ], + "off": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfb, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_3", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x83, "value": 0xfe}, + ], + "cycle": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfb, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_3", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x83, "value": 0xfe, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x83, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_3", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfb, "value": 0x04, "delay": 0.001}, + ], + "reset": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfb, "value": 0x00}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfb, "value": 0x04, "delay": 0.01}, + ], + }, + { + "name": "OE3", + "status": [ + { + "val_conf": {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x22, "mask": 0x08}, + "off": [0x00], + "on": [0x08], + } + ], + "on": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xf7, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_0", "value": 0x00, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x84, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_0", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xf7, "value": 0x08, "delay": 0.001}, + ], + "off": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xf7, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_0", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x84, "value": 0xfe}, + ], + "cycle": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xf7, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_0", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x84, "value": 0xfe, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x84, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_0", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xf7, "value": 0x08, "delay": 0.001}, + ], + "reset": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xf7, "value": 0x00}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xf7, "value": 0x08, "delay": 0.01}, + ], + }, + { + "name": "OE4", + "status": [ + { + "val_conf": {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x22, "mask": 0x10}, + "off": [0x00], + "on": [0x10], + } + ], + "on": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xef, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_1", "value": 0x00, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x85, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_1", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xef, "value": 0x10, "delay": 0.001}, + ], + "off": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xef, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_1", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x85, "value": 0xfe}, + ], + "cycle": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xef, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_1", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x85, "value": 0xfe, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x85, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_1", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xef, "value": 0x10, "delay": 0.001}, + ], + "reset": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xef, "value": 0x00}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xef, "value": 0x10, "delay": 0.01}, + ], + }, + { + "name": "OE5", + "status": [ + { + "val_conf": {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x22, "mask": 0x20}, + "off": [0x00], + "on": [0x20], + } + ], + "on": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xdf, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_3", "value": 0x00, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x86, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_3", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xdf, "value": 0x20, "delay": 0.001}, + ], + "off": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xdf, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_3", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x86, "value": 0xfe}, + ], + "cycle": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xdf, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_3", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x86, "value": 0xfe, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x86, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_3", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xdf, "value": 0x20, "delay": 0.001}, + ], + "reset": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xdf, "value": 0x00}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xdf, "value": 0x20, "delay": 0.01}, + ], + }, + { + "name": "OE6", + "status": [ + { + "val_conf": {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x22, "mask": 0x40}, + "off": [0x00], + "on": [0x40], + } + ], + "on": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xbf, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_4", "value": 0x00, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x87, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_4", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xbf, "value": 0x40, "delay": 0.001}, + ], + "off": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xbf, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_4", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x87, "value": 0xfe}, + ], + "cycle": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xbf, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_4", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x87, "value": 0xfe, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x87, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_4", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xbf, "value": 0x40, "delay": 0.001}, + ], + "reset": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xbf, "value": 0x00}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xbf, "value": 0x40, "delay": 0.01}, + ], + }, + { + "name": "OE7", + "status": [ + { + "val_conf": {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x22, "mask": 0x80}, + "off": [0x00], + "on": [0x80], + } + ], + "on": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0x7f, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_7", "value": 0x00, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x88, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_7", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0x7f, "value": 0x80, "delay": 0.001}, + ], + "off": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0x7f, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_7", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x88, "value": 0xfe}, + ], + "cycle": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0x7f, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_7", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x88, "value": 0xfe, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x88, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_7", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0x7f, "value": 0x80, "delay": 0.001}, + ], + "reset": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0x7f, "value": 0x00}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0x7f, "value": 0x80, "delay": 0.01}, + ], + } + ] +} + +SET_FW_MAC_CONF = [ + { + "name": "eth0", + "e2_name": "syseeprom", + "get_act_mac": {"cmd": "ethtool -e eth0 offset 0 length 6 |grep 0x0000 | awk -F':' '{gsub(/ /, \":\", $2);print $2}'| sed 's/^[[:space:]]*//' | sed 's/:\s*$//'", "gettype": "cmd_str"}, + "set_mac_cfg": { + "type": 1, + "cmd": {"cmd": "ethtool -E eth0 magic 0x15338086 offset %s value 0x%s length 1", "gettype": "cmd", "delay": 0.1}, + }, + "check_mac_cfg": {"cmd": "ethtool -e eth0 offset 0 length 6 |grep 0x0000 | awk -F':' '{gsub(/ /, \":\", $2);print $2}'| sed 's/^[[:space:]]*//' | sed 's/:\s*$//'", "gettype": "cmd_str"}, + } +] + +SET_MAC_CONF = SET_FW_MAC_CONF +PRODUCT_NAME_CONF = {} diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/config/x86_64_micas_m2_w6940_128x1_fr4_r0_0x40d9_v01_dc_config.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/config/x86_64_micas_m2_w6940_128x1_fr4_r0_0x40d9_v01_dc_config.py new file mode 100755 index 00000000000..df8033645b8 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/config/x86_64_micas_m2_w6940_128x1_fr4_r0_0x40d9_v01_dc_config.py @@ -0,0 +1,3145 @@ +#!/usr/bin/python +# -*- coding: UTF-8 -*- + +# CPO 100 board modified configuration, support 1 DC PSUS + +from platform_common import * + +STARTMODULE = { + "hal_fanctrl": 1, + "hal_ledctrl": 1, + "avscontrol": 1, + "dev_monitor": 1, + "tty_console": 0, + "reboot_cause": 1, + "pmon_syslog": 1, + "sff_temp_polling": 1, + "generate_airflow": 0, + "product_name": 1, + "generate_mgmt_version": 0, + "set_fw_mac": 1, +} + +DEV_MONITOR_PARAM = { + "polling_time": 10, + "psus": [ + { + "name": "psu2", + "present": {"gettype": "i2c", "bus": 13, "loc": 0x1d, "offset": 0x42, "presentbit": 0, "okval": 0}, + "device": [ + {"id": "psu2pmbus", "name": "wb_fsp1200", "bus": 10, "loc": 0x58, "attr": "hwmon"}, + {"id": "psu2frue2", "name": "wb_24c02", "bus": 10, "loc": 0x50, "attr": "eeprom"}, + ], + }, + ], + "fans": [ + { + "name": "fan7", + "present": {"gettype": "i2c", "bus": 44, "loc": 0x0d, "offset": 0x5b, "presentbit": 0, "okval": 0}, + "device": [ + {"id": "fan7frue2", "name": "wb_24c64", "bus": 43, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "fan5", + "present": {"gettype": "i2c", "bus": 44, "loc": 0x0d, "offset": 0x5b, "presentbit": 1, "okval": 0}, + "device": [ + {"id": "fan5frue2", "name": "wb_24c64", "bus": 42, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "fan3", + "present": {"gettype": "i2c", "bus": 44, "loc": 0x0d, "offset": 0x5b, "presentbit": 2, "okval": 0}, + "device": [ + {"id": "fan3frue2", "name": "wb_24c64", "bus": 41, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "fan1", + "present": {"gettype": "i2c", "bus": 44, "loc": 0x0d, "offset": 0x5b, "presentbit": 3, "okval": 0}, + "device": [ + {"id": "fan1frue2", "name": "wb_24c64", "bus":40, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "fan8", + "present": {"gettype": "i2c", "bus": 52, "loc": 0x0d, "offset": 0x5b, "presentbit": 0, "okval": 0}, + "device": [ + {"id": "fan8frue2", "name": "wb_24c64", "bus": 51, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "fan6", + "present": {"gettype": "i2c", "bus": 52, "loc": 0x0d, "offset": 0x5b, "presentbit": 1, "okval": 0}, + "device": [ + {"id": "fan6frue2", "name": "wb_24c64", "bus": 50, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "fan4", + "present": {"gettype": "i2c", "bus": 52, "loc": 0x0d, "offset": 0x5b, "presentbit": 2, "okval": 0}, + "device": [ + {"id": "fan4frue2", "name": "wb_24c64", "bus": 49, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "fan2", + "present": {"gettype": "i2c", "bus": 52, "loc": 0x0d, "offset": 0x5b, "presentbit": 3, "okval": 0}, + "device": [ + {"id": "fan2frue2", "name": "wb_24c64", "bus": 48, "loc": 0x50, "attr": "eeprom"}, + ], + }, + ], + "others": [ + { + "name": "eeprom", + "device": [ + {"id": "eeprom_1", "name": "wb_24c02", "bus": 1, "loc": 0x56, "attr": "eeprom"}, + {"id": "eeprom_2", "name": "wb_24c02", "bus": 1, "loc": 0x57, "attr": "eeprom"}, + {"id": "eeprom_3", "name": "wb_24c02", "bus": 2, "loc": 0x51, "attr": "eeprom"}, + {"id": "eeprom_4", "name": "wb_24c02", "bus": 3, "loc": 0x51, "attr": "eeprom"}, + {"id": "eeprom_5", "name": "wb_24c02", "bus": 32, "loc": 0x52, "attr": "eeprom"}, + {"id": "eeprom_6", "name": "wb_24c02", "bus": 12, "loc": 0x57, "attr": "eeprom"}, + ], + }, + { + "name": "oe_mcu", + "device": [ + {"id": "oe_mcu_1", "name": "wb_24c02", "bus": 24, "loc": 0x50, "attr": "eeprom"}, + {"id": "oe_mcu_2", "name": "wb_24c02", "bus": 25, "loc": 0x50, "attr": "eeprom"}, + {"id": "oe_mcu_3", "name": "wb_24c02", "bus": 26, "loc": 0x50, "attr": "eeprom"}, + {"id": "oe_mcu_4", "name": "wb_24c02", "bus": 27, "loc": 0x50, "attr": "eeprom"}, + {"id": "oe_mcu_5", "name": "wb_24c02", "bus": 28, "loc": 0x50, "attr": "eeprom"}, + {"id": "oe_mcu_6", "name": "wb_24c02", "bus": 29, "loc": 0x50, "attr": "eeprom"}, + {"id": "oe_mcu_7", "name": "wb_24c02", "bus": 30, "loc": 0x50, "attr": "eeprom"}, + {"id": "oe_mcu_8", "name": "wb_24c02", "bus": 31, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "tmp275", + "device": [ + {"id": "tmp275_1", "name": "wb_tmp275", "bus": 34, "loc": 0x4c, "attr": "hwmon"}, + {"id": "tmp275_2", "name": "wb_tmp275", "bus": 35, "loc": 0x4d, "attr": "hwmon"}, + {"id": "tmp275_3", "name": "wb_tmp275", "bus": 8, "loc": 0x48, "attr": "hwmon"}, + {"id": "tmp275_4", "name": "wb_tmp275", "bus": 8, "loc": 0x49, "attr": "hwmon"}, + {"id": "tmp275_5", "name": "wb_tmp275", "bus": 9, "loc": 0x48, "attr": "hwmon"}, + {"id": "tmp275_6", "name": "wb_tmp275", "bus": 9, "loc": 0x49, "attr": "hwmon"}, + {"id": "tmp275_7", "name": "wb_tmp275", "bus": 14, "loc": 0x48, "attr": "hwmon"}, + {"id": "tmp275_8", "name": "wb_tmp275", "bus": 14, "loc": 0x49, "attr": "hwmon"}, + {"id": "tmp275_9", "name": "wb_tmp275", "bus": 14, "loc": 0x4b, "attr": "hwmon"}, + ], + }, + { + "name": "ina3221", + "device": [ + {"id": "ina3221_1", "name": "wb_ina3221", "bus": 33, "loc": 0x40, "attr": "hwmon"}, + {"id": "ina3221_2", "name": "wb_ina3221", "bus": 33, "loc": 0x41, "attr": "hwmon"}, + {"id": "ina3221_3", "name": "wb_ina3221", "bus": 33, "loc": 0x42, "attr": "hwmon"}, + {"id": "ina3221_4", "name": "wb_ina3221", "bus": 12, "loc": 0x40, "attr": "hwmon"}, + {"id": "ina3221_5", "name": "wb_ina3221", "bus": 12, "loc": 0x41, "attr": "hwmon"}, + {"id": "ina3221_6", "name": "wb_ina3221", "bus": 56, "loc": 0x40, "attr": "hwmon"}, + {"id": "ina3221_7", "name": "wb_ina3221", "bus": 56, "loc": 0x41, "attr": "hwmon"}, + {"id": "ina3221_8", "name": "wb_ina3221", "bus": 57, "loc": 0x40, "attr": "hwmon"}, + {"id": "ina3221_9", "name": "wb_ina3221", "bus": 58, "loc": 0x40, "attr": "hwmon"}, + {"id": "ina3221_10", "name": "wb_ina3221", "bus": 59, "loc": 0x40, "attr": "hwmon"}, + {"id": "ina3221_11", "name": "wb_ina3221", "bus": 60, "loc": 0x40, "attr": "hwmon"}, + {"id": "ina3221_12", "name": "wb_ina3221", "bus": 61, "loc": 0x40, "attr": "hwmon"}, + {"id": "ina3221_13", "name": "wb_ina3221", "bus": 62, "loc": 0x40, "attr": "hwmon"}, + {"id": "ina3221_14", "name": "wb_ina3221", "bus": 63, "loc": 0x40, "attr": "hwmon"}, + {"id": "ina3221_15", "name": "wb_ina3221", "bus": 88, "loc": 0x42, "attr": "hwmon"}, + {"id": "ina3221_16", "name": "wb_ina3221", "bus": 89, "loc": 0x42, "attr": "hwmon"}, + {"id": "ina3221_17", "name": "wb_ina3221", "bus": 90, "loc": 0x42, "attr": "hwmon"}, + {"id": "ina3221_18", "name": "wb_ina3221", "bus": 91, "loc": 0x42, "attr": "hwmon"}, + ], + }, + { + "name": "xdpe12284", + "device": [ + {"id": "xdpe12284_1", "name": "wb_xdpe12284", "bus": 5, "loc": 0x5e, "attr": "hwmon"}, + {"id": "xdpe12284_2", "name": "wb_xdpe12284", "bus": 5, "loc": 0x68, "attr": "hwmon"}, + {"id": "xdpe12284_3", "name": "wb_xdpe12284", "bus": 5, "loc": 0x6e, "attr": "hwmon"}, + {"id": "xdpe12284_4", "name": "wb_xdpe12284", "bus": 5, "loc": 0x70, "attr": "hwmon"}, + {"id": "xdpe12284_5", "name": "wb_xdpe12284", "bus": 67, "loc": 0x68, "attr": "hwmon"}, + {"id": "xdpe12284_6", "name": "wb_xdpe12284", "bus": 67, "loc": 0x70, "attr": "hwmon"}, + {"id": "xdpe12284_7", "name": "wb_xdpe12284", "bus": 67, "loc": 0x60, "attr": "hwmon"}, + {"id": "xdpe12284_8", "name": "wb_xdpe12284", "bus": 67, "loc": 0x66, "attr": "hwmon"}, + {"id": "xdpe12284_9", "name": "wb_xdpe12284", "bus": 67, "loc": 0x6e, "attr": "hwmon"}, + {"id": "xdpe12284_10", "name": "wb_xdpe12284", "bus": 67, "loc": 0x5e, "attr": "hwmon"}, + {"id": "xdpe12284_11", "name": "wb_xdpe12284", "bus": 68, "loc": 0x68, "attr": "hwmon"}, + {"id": "xdpe12284_12", "name": "wb_xdpe12284", "bus": 68, "loc": 0x70, "attr": "hwmon"}, + {"id": "xdpe12284_13", "name": "wb_xdpe12284", "bus": 68, "loc": 0x60, "attr": "hwmon"}, + {"id": "xdpe12284_14", "name": "wb_xdpe12284", "bus": 68, "loc": 0x66, "attr": "hwmon"}, + {"id": "xdpe12284_15", "name": "wb_xdpe12284", "bus": 68, "loc": 0x6e, "attr": "hwmon"}, + {"id": "xdpe12284_16", "name": "wb_xdpe12284", "bus": 68, "loc": 0x5e, "attr": "hwmon"}, + {"id": "xdpe12284_17", "name": "wb_xdpe12284", "bus": 69, "loc": 0x68, "attr": "hwmon"}, + {"id": "xdpe12284_18", "name": "wb_xdpe12284", "bus": 69, "loc": 0x70, "attr": "hwmon"}, + {"id": "xdpe12284_19", "name": "wb_xdpe12284", "bus": 69, "loc": 0x60, "attr": "hwmon"}, + {"id": "xdpe12284_20", "name": "wb_xdpe12284", "bus": 69, "loc": 0x66, "attr": "hwmon"}, + {"id": "xdpe12284_21", "name": "wb_xdpe12284", "bus": 69, "loc": 0x6e, "attr": "hwmon"}, + {"id": "xdpe12284_22", "name": "wb_xdpe12284", "bus": 69, "loc": 0x5e, "attr": "hwmon"}, + {"id": "xdpe12284_23", "name": "wb_xdpe12284", "bus": 70, "loc": 0x68, "attr": "hwmon"}, + {"id": "xdpe12284_24", "name": "wb_xdpe12284", "bus": 70, "loc": 0x70, "attr": "hwmon"}, + {"id": "xdpe12284_25", "name": "wb_xdpe12284", "bus": 70, "loc": 0x60, "attr": "hwmon"}, + {"id": "xdpe12284_26", "name": "wb_xdpe12284", "bus": 70, "loc": 0x66, "attr": "hwmon"}, + {"id": "xdpe12284_27", "name": "wb_xdpe12284", "bus": 70, "loc": 0x6e, "attr": "hwmon"}, + {"id": "xdpe12284_28", "name": "wb_xdpe12284", "bus": 70, "loc": 0x5e, "attr": "hwmon"}, + {"id": "xdpe12284_29", "name": "wb_xdpe12284", "bus": 71, "loc": 0x68, "attr": "hwmon"}, + ], + }, + { + "name": "xdpe132g5c", + "device": [ + {"id": "xdpe132g5c_1", "name": "wb_xdpe132g5c_pmbus", "bus": 64, "loc": 0x40, "attr": "hwmon"}, + {"id": "xdpe132g5c_2", "name": "wb_xdpe132g5c_pmbus", "bus": 65, "loc": 0x40, "attr": "hwmon"}, + {"id": "xdpe132g5c_3", "name": "wb_xdpe132g5c_pmbus", "bus": 66, "loc": 0x40, "attr": "hwmon"}, + ], + }, + { + "name": "ucd90160", + "device": [ + {"id": "ucd90160_1", "name": "wb_ucd90160", "bus": 5, "loc": 0x5f, "attr": "hwmon"}, + ], + }, + ], +} + +MANUINFO_CONF = { + "bios": { + "key": "BIOS", + "head": True, + "next": "cpu" + }, + "bios_vendor": { + "parent": "bios", + "key": "Vendor", + "cmd": "dmidecode -t 0 |grep Vendor", + "pattern": r".*Vendor", + "separator": ":", + "arrt_index": 1, + }, + "bios_version": { + "parent": "bios", + "key": "Version", + "cmd": "dmidecode -t 0 |grep Version", + "pattern": r".*Version", + "separator": ":", + "arrt_index": 2, + }, + "bios_date": { + "parent": "bios", + "key": "Release Date", + "cmd": "dmidecode -t 0 |grep Release", + "pattern": r".*Release Date", + "separator": ":", + "arrt_index": 3, + }, + "bios_boot": { + "parent": "bios", + "key": "Boot From", + "devfile": { + "loc": "/dev/cpld1", + "offset":0x1d, + "len":1, + "bit_width":1 + }, + "decode": { + "01": "Master", + "02": "Slave" + }, + "arrt_index": 4, + }, + + "cpu": { + "key": "CPU", + "next": "cpld" + }, + "cpu_vendor": { + "parent": "cpu", + "key": "Vendor", + "cmd": "dmidecode --type processor |grep Manufacturer", + "pattern": r".*Manufacturer", + "separator": ":", + "arrt_index": 1, + }, + "cpu_model": { + "parent": "cpu", + "key": "Device Model", + "cmd": "dmidecode --type processor | grep Version", + "pattern": r".*Version", + "separator": ":", + "arrt_index": 2, + }, + "cpu_core": { + "parent": "cpu", + "key": "Core Count", + "cmd": "dmidecode --type processor | grep \"Core Count\"", + "pattern": r".*Core Count", + "separator": ":", + "arrt_index": 3, + }, + "cpu_thread": { + "parent": "cpu", + "key": "Thread Count", + "cmd": "dmidecode --type processor | grep \"Thread Count\"", + "pattern": r".*Thread Count", + "separator": ":", + "arrt_index": 4, + }, + + + "cpld": { + "key": "CPLD", + "next": "fpga" + }, + + "cpld1": { + "key": "CPLD1", + "parent": "cpld", + "arrt_index": 1, + }, + "cpld1_model": { + "key": "Device Model", + "parent": "cpld1", + "config": "LCMXO3LF-2100C-5BG256C", + "arrt_index": 1, + }, + "cpld1_vender": { + "key": "Vendor", + "parent": "cpld1", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld1_desc": { + "key": "Description", + "parent": "cpld1", + "config": "CPU CPLD", + "arrt_index": 3, + }, + "cpld1_version": { + "key": "Firmware Version", + "parent": "cpld1", + "reg": { + "loc": "/dev/port", + "offset": 0xa00, + "size": 4 + }, + "callback": "cpld_format", + "arrt_index": 4, + }, + + "cpld2": { + "key": "CPLD2", + "parent": "cpld", + "arrt_index": 2, + }, + "cpld2_model": { + "key": "Device Model", + "parent": "cpld2", + "config": "LCMXO3LF-2100C-5BG256C", + "arrt_index": 1, + }, + "cpld2_vender": { + "key": "Vendor", + "parent": "cpld2", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld2_desc": { + "key": "Description", + "parent": "cpld2", + "config": "SCM CPLD", + "arrt_index": 3, + }, + "cpld2_version": { + "key": "Firmware Version", + "parent": "cpld2", + "reg": { + "loc": "/dev/port", + "offset": 0x900, + "size": 4 + }, + "callback": "cpld_format", + "arrt_index": 4, + }, + "cpld2_boot": { + "parent": "cpld2", + "key": "Boot From", + "devfile": { + "loc": "/dev/cpld1", + "offset":0x06, + "len":1, + "bit_width":1 + }, + "decode": { + "01": "Main", + "02": "Golden" + }, + "arrt_index": 5, + }, + + "cpld3": { + "key": "CPLD3", + "parent": "cpld", + "arrt_index": 3, + }, + "cpld3_model": { + "key": "Device Model", + "parent": "cpld3", + "config": "LCMXO3LF-4300C-6BG324I", + "arrt_index": 1, + }, + "cpld3_vender": { + "key": "Vendor", + "parent": "cpld3", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld3_desc": { + "key": "Description", + "parent": "cpld3", + "config": "MCB CPLD", + "arrt_index": 3, + }, + "cpld3_version": { + "key": "Firmware Version", + "parent": "cpld3", + "i2c": { + "bus": "13", + "loc": "0x1d", + "offset": 0, + "size": 4 + }, + "callback": "cpld_format", + "arrt_index": 4, + }, + "cpld3_boot": { + "parent": "cpld3", + "key": "Boot From", + "devfile": { + "loc": "/dev/cpld3", + "offset":0x0d, + "len":1, + "bit_width":1 + }, + "decode": { + "01": "Main", + "02": "Golden" + }, + "arrt_index": 5, + }, + + "cpld4": { + "key": "CPLD4", + "parent": "cpld", + "arrt_index": 4, + }, + "cpld4_model": { + "key": "Device Model", + "parent": "cpld4", + "config": "LCMXO3LF-4300C-6BG324I", + "arrt_index": 1, + }, + "cpld4_vender": { + "key": "Vendor", + "parent": "cpld4", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld4_desc": { + "key": "Description", + "parent": "cpld4", + "config": "SMB CPLD", + "arrt_index": 3, + }, + "cpld4_version": { + "key": "Firmware Version", + "parent": "cpld4", + "i2c": { + "bus": "20", + "loc": "0x1e", + "offset": 0, + "size": 4 + }, + "callback": "cpld_format", + "arrt_index": 4, + }, + "cpld4_boot": { + "parent": "cpld4", + "key": "Boot From", + "devfile": { + "loc": "/dev/cpld4", + "offset":0x0d, + "len":1, + "bit_width":1 + }, + "decode": { + "01": "Main", + "02": "Golden" + }, + "arrt_index": 5, + }, + + "cpld5": { + "key": "CPLD5", + "parent": "cpld", + "arrt_index": 5, + }, + "cpld5_model": { + "key": "Device Model", + "parent": "cpld5", + "config": "LCMXO3LF-2100C-5BG256C", + "arrt_index": 1, + }, + "cpld5_vender": { + "key": "Vendor", + "parent": "cpld5", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld5_desc": { + "key": "Description", + "parent": "cpld5", + "config": "FCB_T CPLD", + "arrt_index": 3, + }, + "cpld5_version": { + "key": "Firmware Version", + "parent": "cpld5", + "i2c": { + "bus": "44", + "loc": "0x0d", + "offset": 0, + "size": 4 + }, + "callback": "cpld_format", + "arrt_index": 4, + }, + "cpld5_boot": { + "parent": "cpld5", + "key": "Boot From", + "devfile": { + "loc": "/dev/cpld5", + "offset":0x0d, + "len":1, + "bit_width":1 + }, + "decode": { + "01": "Main", + "02": "Golden" + }, + "arrt_index": 5, + }, + + "cpld6": { + "key": "CPLD6", + "parent": "cpld", + "arrt_index": 6, + }, + "cpld6_model": { + "key": "Device Model", + "parent": "cpld6", + "config": "LCMXO3LF-2100C-5BG256C", + "arrt_index": 1, + }, + "cpld6_vender": { + "key": "Vendor", + "parent": "cpld6", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld6_desc": { + "key": "Description", + "parent": "cpld6", + "config": "FCB_B CPLD", + "arrt_index": 3, + }, + "cpld6_version": { + "key": "Firmware Version", + "parent": "cpld6", + "i2c": { + "bus": "52", + "loc": "0x0d", + "offset": 0, + "size": 4 + }, + "callback": "cpld_format", + "arrt_index": 4, + }, + "cpld6_boot": { + "parent": "cpld6", + "key": "Boot From", + "devfile": { + "loc": "/dev/cpld6", + "offset":0x0d, + "len":1, + "bit_width":1 + }, + "decode": { + "01": "Main", + "02": "Golden" + }, + "arrt_index": 5, + }, + + + "psu": { + "key": "PSU", + "next": "fan" + }, + + "psu2": { + "parent": "psu", + "key": "PSU2", + "arrt_index": 2, + }, + "psu2_hw_version": { + "key": "Hardware Version", + "parent": "psu2", + "extra": { + "funcname": "getPsu", + "id": "psu2", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "psu2_fw_version": { + "key": "Firmware Version", + "parent": "psu2", + "config": "NA", + "arrt_index": 2, + }, + + "fan": { + "key": "FAN", + "next": "fpga" + }, + "fan1": { + "key": "FAN1", + "parent": "fan", + "arrt_index": 1, + }, + "fan1_hw_version": { + "key": "Hardware Version", + "parent": "fan1", + "extra": { + "funcname": "checkFan", + "id": "fan1", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan1_fw_version": { + "key": "Firmware Version", + "parent": "fan1", + "config": "NA", + "arrt_index": 2, + }, + + "fan2": { + "key": "FAN2", + "parent": "fan", + "arrt_index": 2, + }, + "fan2_hw_version": { + "key": "Hardware Version", + "parent": "fan2", + "extra": { + "funcname": "checkFan", + "id": "fan2", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan2_fw_version": { + "key": "Firmware Version", + "parent": "fan2", + "config": "NA", + "arrt_index": 2, + }, + + "fan3": { + "key": "FAN3", + "parent": "fan", + "arrt_index": 3, + }, + "fan3_hw_version": { + "key": "Hardware Version", + "parent": "fan3", + "extra": { + "funcname": "checkFan", + "id": "fan3", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan3_fw_version": { + "key": "Firmware Version", + "parent": "fan3", + "config": "NA", + "arrt_index": 2, + }, + + "fan4": { + "key": "FAN4", + "parent": "fan", + "arrt_index": 4, + }, + "fan4_hw_version": { + "key": "Hardware Version", + "parent": "fan4", + "extra": { + "funcname": "checkFan", + "id": "fan4", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan4_fw_version": { + "key": "Firmware Version", + "parent": "fan4", + "config": "NA", + "arrt_index": 2, + }, + + "fan5": { + "key": "FAN5", + "parent": "fan", + "arrt_index": 5, + }, + "fan5_hw_version": { + "key": "Hardware Version", + "parent": "fan5", + "extra": { + "funcname": "checkFan", + "id": "fan5", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan5_fw_version": { + "key": "Firmware Version", + "parent": "fan5", + "config": "NA", + "arrt_index": 2, + }, + + "fan6": { + "key": "FAN6", + "parent": "fan", + "arrt_index": 6, + }, + "fan6_hw_version": { + "key": "Hardware Version", + "parent": "fan6", + "extra": { + "funcname": "checkFan", + "id": "fan6", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan6_fw_version": { + "key": "Firmware Version", + "parent": "fan6", + "config": "NA", + "arrt_index": 2, + }, + + "fan7": { + "key": "FAN7", + "parent": "fan", + "arrt_index": 7, + }, + "fan7_hw_version": { + "key": "Hardware Version", + "parent": "fan7", + "extra": { + "funcname": "checkFan", + "id": "fan7", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan7_fw_version": { + "key": "Firmware Version", + "parent": "fan7", + "config": "NA", + "arrt_index": 2, + }, + + "fan8": { + "key": "FAN8", + "parent": "fan", + "arrt_index": 8, + }, + "fan8_hw_version": { + "key": "Hardware Version", + "parent": "fan8", + "extra": { + "funcname": "checkFan", + "id": "fan8", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan8_fw_version": { + "key": "Firmware Version", + "parent": "fan8", + "config": "NA", + "arrt_index": 2, + }, + + + "i210": { + "key": "NIC", + "next": "fpga" + }, + "i210_model": { + "parent": "i210", + "config": "NA", + "key": "Device Model", + "arrt_index": 1, + }, + "i210_vendor": { + "parent": "i210", + "config": "INTEL", + "key": "Vendor", + "arrt_index": 2, + }, + "i210_version": { + "parent": "i210", + "cmd": "ethtool -i eno1", + "pattern": r"firmware-version", + "separator": ":", + "key": "Firmware Version", + "arrt_index": 3, + }, + + "fpga": { + "key": "FPGA", + }, + + "fpga1": { + "key": "FPGA1", + "parent": "fpga", + "arrt_index": 1, + }, + "fpga1_model": { + "parent": "fpga1", + "config": "XC7A50T-2FGG484C", + "key": "Device Model", + "arrt_index": 1, + }, + "fpga1_vender": { + "parent": "fpga1", + "config": "XILINX", + "key": "Vendor", + "arrt_index": 2, + }, + "fpga1_desc": { + "key": "Description", + "parent": "fpga1", + "config": "IOB FPGA", + "arrt_index": 3, + }, + "fpga1_fw_version": { + "parent": "fpga1", + "devfile": { + "loc": "/dev/fpga0", + "offset": 0, + "len": 4, + "bit_width": 4 + }, + "key": "Firmware Version", + "arrt_index": 4, + }, + "fpga1_date": { + "parent": "fpga1", + "devfile": { + "loc": "/dev/fpga0", + "offset": 4, + "len": 4, + "bit_width": 4 + }, + "key": "Build Date", + "arrt_index": 5, + }, + "fpga1_boot": { + "parent": "fpga1", + "key": "Boot From", + "devfile": { + "loc": "/dev/fpga0", + "offset":0x00, + "len":1, + "bit_width":1 + }, + "decode": { + "00": "Golden", + "default": "Main" + }, + "arrt_index": 6, + }, + "fpga2": { + "key": "FPGA2", + "parent": "fpga", + "arrt_index": 2, + }, + "fpga2_model": { + "parent": "fpga2", + "config": "XC7A50T-2FGG484C", + "key": "Device Model", + "arrt_index": 1, + }, + "fpga2_vender": { + "parent": "fpga2", + "config": "XILINX", + "key": "Vendor", + "arrt_index": 2, + }, + "fpga2_desc": { + "key": "Description", + "parent": "fpga2", + "config": "DOM FPGA", + "arrt_index": 3, + }, + "fpga2_fw_version": { + "parent": "fpga2", + "devfile": { + "loc": "/dev/fpga1", + "offset": 0, + "len": 4, + "bit_width": 4 + }, + "key": "Firmware Version", + "arrt_index": 4, + }, + "fpga2_date": { + "parent": "fpga2", + "devfile": { + "loc": "/dev/fpga1", + "offset": 4, + "len": 4, + "bit_width": 4 + }, + "key": "Build Date", + "arrt_index": 5, + }, + "fpga2_boot": { + "parent": "fpga2", + "key": "Boot From", + "devfile": { + "loc": "/dev/fpga1", + "offset":0x00, + "len":1, + "bit_width":1 + }, + "decode": { + "00": "Golden", + "default": "Main" + }, + "arrt_index": 6, + }, +} + +PMON_SYSLOG_STATUS = { + "polling_time": 3, + "fans": { + "present": {"path": ["/sys/s3ip/fan/*/present"], "ABSENT": 0}, + "status": [ + {"path": "/sys/s3ip/fan/%s/motor1/status", 'okval': 1}, + {"path": "/sys/s3ip/fan/%s/motor2/status", 'okval': 1}, + ], + "nochangedmsgflag": 1, + "nochangedmsgtime": 60, + "noprintfirsttimeflag": 0, + "alias": { + "fan1": "FAN1", + "fan2": "FAN2", + "fan3": "FAN3", + "fan4": "FAN4", + "fan5": "FAN5", + "fan6": "FAN6", + "fan7": "FAN7", + "fan8": "FAN8" + } + } +} + +##################### MAC Voltage adjust#################################### +MAC_DEFAULT_PARAM = [ + { + "name": "mac_core", # AVS name + "type": 0, # 1: used default value, if rov value not in range. 0: do nothing, if rov value not in range + "rov_source": 0, # 0: get rov value from cpld, 1: get rov value from SDK + "cpld_avs": {"bus": 20, "loc": 0x1e, "offset": 0x20, "gettype": "i2c"}, + "set_avs": { + "loc": "/sys/bus/i2c/devices/64-0040/hwmon/hwmon*/avs0_vout", + "gettype": "sysfs", "formula": "int((%f)*1000000)" + }, + "mac_avs_param": { + 0x92: 0.7471, + 0x90: 0.7600, + 0x8e: 0.7710, + 0x8c: 0.7839, + 0x8a: 0.7961, + 0x88: 0.8071, + 0x86: 0.8181, + 0x84: 0.8291, + 0x82: 0.8401 + } + } +] + +DRIVERLISTS = [ + {"name": "ice", "delay": 0, "removable": 0}, + {"name": "wb_i2c_i801", "delay": 1, "removable": 0}, + {"name": "i2c_dev", "delay": 0, "removable": 0}, + {"name": "wb_i2c_algo_bit", "delay": 0}, + {"name": "wb_i2c_gpio", "delay": 0}, + {"name": "i2c_mux", "delay": 0, "removable": 0}, + {"name": "wb_i2c_gpio_device gpio_sda=181 gpio_scl=180 gpio_chip_name=INTC3001:00 bus_num=1", "delay": 0}, + {"name": "platform_common dfd_my_type=0x40d9", "delay": 0}, + {"name": "wb_logic_dev_common", "delay":0}, + {"name": "wb_io_dev", "delay": 0}, + {"name": "wb_io_dev_device", "delay": 0}, + {"name": "wb_fpga_pcie", "delay": 0}, + {"name": "wb_pcie_dev", "delay": 0}, + {"name": "wb_pcie_dev_device", "delay": 0}, + {"name": "wb_i2c_dev", "delay": 0}, + {"name": "wb_i2c_ocores", "delay": 0}, + {"name": "wb_i2c_ocores_device", "delay": 0}, + {"name": "wb_i2c_mux_pca9641", "delay": 0}, + {"name": "wb_i2c_mux_pca954x", "delay": 0}, + {"name": "wb_i2c_mux_pca954x_device_b3", "delay": 1}, + {"name": "wb_i2c_dev_device", "delay": 1}, + {"name": "wb_lm75", "delay": 0}, +# {"name": "wb_at24", "delay": 0}, + {"name": "optoe", "delay": 0}, + {"name": "wb_pmbus_core", "delay": 0}, + {"name": "wb_xdpe12284", "delay": 0}, + {"name": "wb_xdpe132g5c_pmbus", "delay": 0}, + {"name": "wb_csu550", "delay": 0}, + {"name": "wb_ina3221", "delay": 0}, + {"name": "wb_ucd9000", "delay": 0}, + {"name": "wb_xdpe132g5c", "delay": 0}, +# {"name": "firmware_driver_sysfs", "delay": 0}, + {"name": "wb_rc32312", "delay": 0}, + {"name": "s3ip_sysfs", "delay": 0}, + {"name": "wb_switch_driver", "delay": 0}, + {"name": "fan_device_driver", "delay": 0}, + {"name": "psu_device_driver", "delay": 0}, + {"name": "vol_sensor_device_driver", "delay": 0}, + {"name": "temp_sensor_device_driver", "delay": 0}, + {"name": "wb_spd", "delay": 0}, + {"name": "wb_lpc_bmc", "delay": 0}, +] + +DEVICE = [ + # eeprom + {"name": "wb_24c02", "bus": 1, "loc": 0x56}, + {"name": "wb_24c02", "bus": 1, "loc": 0x57}, + {"name": "wb_24c02", "bus": 2, "loc": 0x51}, + {"name": "wb_24c02", "bus": 3, "loc": 0x51}, + # SCM + {"name": "wb_24c02", "bus": 32, "loc": 0x52}, + {"name": "wb_ina3221", "bus": 33, "loc": 0x40}, + {"name": "wb_ina3221", "bus": 33, "loc": 0x41}, + {"name": "wb_ina3221", "bus": 33, "loc": 0x42}, + {"name": "wb_tmp275", "bus": 34, "loc": 0x4c}, + {"name": "wb_tmp275", "bus": 35, "loc": 0x4d}, + # CPU + {"name": "wb_ucd90160", "bus": 5, "loc": 0x5f}, + {"name": "wb_xdpe12284", "bus": 5, "loc": 0x5e}, + {"name": "wb_xdpe12284", "bus": 5, "loc": 0x68}, + {"name": "wb_xdpe12284", "bus": 5, "loc": 0x6e}, + {"name": "wb_xdpe12284", "bus": 5, "loc": 0x70}, + # fanA + {"name": "wb_tmp275", "bus": 8, "loc": 0x48}, + {"name": "wb_tmp275", "bus": 8, "loc": 0x49}, + {"name": "wb_24c64", "bus": 40, "loc": 0x50}, + {"name": "wb_24c64", "bus": 41, "loc": 0x50}, + {"name": "wb_24c64", "bus": 42, "loc": 0x50}, + {"name": "wb_24c64", "bus": 43, "loc": 0x50}, + # fanB + {"name": "wb_tmp275", "bus": 9, "loc": 0x48}, + {"name": "wb_tmp275", "bus": 9, "loc": 0x49}, + {"name": "wb_24c64", "bus": 48, "loc": 0x50}, + {"name": "wb_24c64", "bus": 49, "loc": 0x50}, + {"name": "wb_24c64", "bus": 50, "loc": 0x50}, + {"name": "wb_24c64", "bus": 51, "loc": 0x50}, + # psu + {"name": "wb_24c02", "bus": 10, "loc": 0x50}, + {"name": "wb_fsp1200", "bus": 10, "loc": 0x58}, + # MCB + {"name": "wb_ina3221", "bus": 12, "loc": 0x40}, + {"name": "wb_ina3221", "bus": 12, "loc": 0x41}, + {"name": "wb_24c02", "bus": 12, "loc": 0x57}, + # SMB + {"name": "wb_tmp275", "bus": 14, "loc": 0x48}, + {"name": "wb_tmp275", "bus": 14, "loc": 0x49}, + {"name": "wb_tmp275", "bus": 14, "loc": 0x4b}, + {"name": "wb_ina3221", "bus": 56, "loc": 0x40}, + {"name": "wb_ina3221", "bus": 56, "loc": 0x41}, + {"name": "wb_ina3221", "bus": 57, "loc": 0x40}, + {"name": "wb_ina3221", "bus": 58, "loc": 0x40}, + {"name": "wb_ina3221", "bus": 59, "loc": 0x40}, + {"name": "wb_ina3221", "bus": 60, "loc": 0x40}, + {"name": "wb_ina3221", "bus": 61, "loc": 0x40}, + {"name": "wb_ina3221", "bus": 62, "loc": 0x40}, + {"name": "wb_ina3221", "bus": 63, "loc": 0x40}, + {"name": "wb_xdpe132g5c_pmbus", "bus": 64, "loc": 0x40}, + {"name": "wb_xdpe132g5c_pmbus", "bus": 65, "loc": 0x40}, + {"name": "wb_xdpe132g5c_pmbus", "bus": 66, "loc": 0x40}, + # OE0 + {"name": "wb_xdpe12284", "bus": 67, "loc": 0x68}, + {"name": "wb_xdpe12284", "bus": 67, "loc": 0x70}, + {"name": "wb_xdpe12284", "bus": 67, "loc": 0x60}, + # OE7 + {"name": "wb_xdpe12284", "bus": 67, "loc": 0x66}, + {"name": "wb_xdpe12284", "bus": 67, "loc": 0x6e}, + {"name": "wb_xdpe12284", "bus": 67, "loc": 0x5e}, + # OE1 + {"name": "wb_xdpe12284", "bus": 68, "loc": 0x68}, + {"name": "wb_xdpe12284", "bus": 68, "loc": 0x70}, + {"name": "wb_xdpe12284", "bus": 68, "loc": 0x60}, + # OE2 + {"name": "wb_xdpe12284", "bus": 68, "loc": 0x66}, + {"name": "wb_xdpe12284", "bus": 68, "loc": 0x6e}, + {"name": "wb_xdpe12284", "bus": 68, "loc": 0x5e}, + # OE3 + {"name": "wb_xdpe12284", "bus": 69, "loc": 0x68}, + {"name": "wb_xdpe12284", "bus": 69, "loc": 0x70}, + {"name": "wb_xdpe12284", "bus": 69, "loc": 0x60}, + # OE4 + {"name": "wb_xdpe12284", "bus": 69, "loc": 0x66}, + {"name": "wb_xdpe12284", "bus": 69, "loc": 0x6e}, + {"name": "wb_xdpe12284", "bus": 69, "loc": 0x5e}, + # OE5 + {"name": "wb_xdpe12284", "bus": 70, "loc": 0x68}, + {"name": "wb_xdpe12284", "bus": 70, "loc": 0x70}, + {"name": "wb_xdpe12284", "bus": 70, "loc": 0x60}, + # OE6 + {"name": "wb_xdpe12284", "bus": 70, "loc": 0x66}, + {"name": "wb_xdpe12284", "bus": 70, "loc": 0x6e}, + {"name": "wb_xdpe12284", "bus": 70, "loc": 0x5e}, + # MAC_XDPE12284C_06 + {"name": "wb_xdpe12284", "bus": 71, "loc": 0x68}, + # fan DCDC + {"name": "wb_ina3221", "bus": 88, "loc": 0x42}, + {"name": "wb_ina3221", "bus": 89, "loc": 0x42}, + {"name": "wb_ina3221", "bus": 90, "loc": 0x42}, + # RC32312 + {"name": "wb_rc32312", "bus": 72, "loc": 0x09}, + {"name": "wb_24c64", "bus": 72, "loc": 0x50}, + {"name": "wb_rc32312", "bus": 73, "loc": 0x09}, + {"name": "wb_24c64", "bus": 73, "loc": 0x50}, + # xdpe132g5c i2c + {"name": "wb_xdpe132g5c", "bus": 64, "loc": 0x10}, + {"name": "wb_xdpe132g5c", "bus": 65, "loc": 0x10}, + {"name": "wb_xdpe132g5c", "bus": 66, "loc": 0x10}, + # LED + {"name": "wb_ina3221", "bus": 91, "loc": 0x42}, +] + +OPTOE = [ +# {"name": "wb_24c02", "startbus": 24, "endbus": 31}, + {"name": "optoe3", "startbus": 24, "endbus": 31}, +] + +REBOOT_CTRL_PARAM = {} + +INIT_PARAM_PRE = [ + # set ina3221 shunt_resistor + # SCM_VDD12.0_C + {"loc": "33-0041/hwmon/hwmon*/shunt1_resistor", "value": "1000"}, + # SCM_OCM_V12.0_C + {"loc": "33-0041/hwmon/hwmon*/shunt3_resistor", "value": "1000"}, + # MAC_PLL0_VDD0.9_C + {"loc": "56-0040/hwmon/hwmon*/shunt1_resistor", "value": "2000"}, + # MAC_PLL1_VDD0.9_C + {"loc": "56-0040/hwmon/hwmon*/shunt2_resistor", "value": "2000"}, + # MAC_PLL3_VDD0.9_C + {"loc": "61-0040/hwmon/hwmon*/shunt1_resistor", "value": "2000"}, + # MAC_PLL2_VDD0.9_C + {"loc": "61-0040/hwmon/hwmon*/shunt2_resistor", "value": "2000"}, + # FAN1_VDD12_C + {"loc": "88-0042/hwmon/hwmon*/shunt1_resistor", "value": "1000"}, + # FAN2_VDD12_C + {"loc": "88-0042/hwmon/hwmon*/shunt2_resistor", "value": "1000"}, + # FAN3_VDD12_C + {"loc": "88-0042/hwmon/hwmon*/shunt3_resistor", "value": "1000"}, + # FAN4_VDD12_C + {"loc": "89-0042/hwmon/hwmon*/shunt1_resistor", "value": "1000"}, + # FAN5_VDD12_C + {"loc": "89-0042/hwmon/hwmon*/shunt2_resistor", "value": "1000"}, + # FAN6_VDD12_C + {"loc": "89-0042/hwmon/hwmon*/shunt3_resistor", "value": "1000"}, + # FAN7_VDD12_C + {"loc": "90-0042/hwmon/hwmon*/shunt1_resistor", "value": "1000"}, + # FAN8_VDD12_C + {"loc": "90-0042/hwmon/hwmon*/shunt2_resistor", "value": "1000"}, + # set avs threshold + # MAC_CORE_V + {"loc": "64-0040/hwmon/hwmon*/avs0_vout_min", "value": "630000"}, + {"loc": "64-0040/hwmon/hwmon*/avs0_vout_max", "value": "858000"}, + # MAC_ANALOG0 V0.9_V + {"loc": "65-0040/hwmon/hwmon*/avs0_vout_min", "value": "810000"}, + {"loc": "65-0040/hwmon/hwmon*/avs0_vout_max", "value": "990000"}, + # MAC_ANALOG0 V0.75_V + {"loc": "65-0040/hwmon/hwmon*/avs1_vout_min", "value": "675000"}, + {"loc": "65-0040/hwmon/hwmon*/avs1_vout_max", "value": "825000"}, + # MAC_ANALOG1 V0.9_V + {"loc": "66-0040/hwmon/hwmon*/avs0_vout_min", "value": "810000"}, + {"loc": "66-0040/hwmon/hwmon*/avs0_vout_max", "value": "990000"}, + # MAC_ANALOG1 V0.75_V + {"loc": "66-0040/hwmon/hwmon*/avs1_vout_min", "value": "675000"}, + {"loc": "66-0040/hwmon/hwmon*/avs1_vout_max", "value": "825000"}, + # # OE0_AVDD_RX_1.8_V + # {"loc": "67-0070/hwmon/hwmon*/avs0_vout_min", "value": "1710000"}, + # {"loc": "67-0070/hwmon/hwmon*/avs0_vout_max", "value": "1890000"}, + # {"loc": "67-0070/hwmon/hwmon*/avs0_vout", "value": "1800000"}, + # # OE0_AVDD_RX_1.2_V + # {"loc": "67-0070/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "67-0070/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "67-0070/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE0_AVDD_TX_1.8_V + # {"loc": "67-0068/hwmon/hwmon*/avs0_vout_min", "value": "1750000"}, + # {"loc": "67-0068/hwmon/hwmon*/avs0_vout_max", "value": "1950000"}, + # {"loc": "67-0068/hwmon/hwmon*/avs0_vout", "value": "1850000"}, + # # OE0_AVDD_TX_1.2_V + # {"loc": "67-0068/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "67-0068/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "67-0068/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE0_AVDD_TRX_0.75_V + # {"loc": "67-0060/hwmon/hwmon*/avs0_vout_min", "value": "713000"}, + # {"loc": "67-0060/hwmon/hwmon*/avs0_vout_max", "value": "788000"}, + # {"loc": "67-0060/hwmon/hwmon*/avs0_vout", "value": "750000"}, + # # OE1_AVDD_RX_1.8_V + # {"loc": "68-0070/hwmon/hwmon*/avs0_vout_min", "value": "1710000"}, + # {"loc": "68-0070/hwmon/hwmon*/avs0_vout_max", "value": "1890000"}, + # {"loc": "68-0070/hwmon/hwmon*/avs0_vout", "value": "1800000"}, + # # OE1_AVDD_RX_1.2_V + # {"loc": "68-0070/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "68-0070/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "68-0070/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE1_AVDD_TX_1.8_V + # {"loc": "68-0068/hwmon/hwmon*/avs0_vout_min", "value": "1750000"}, + # {"loc": "68-0068/hwmon/hwmon*/avs0_vout_max", "value": "1950000"}, + # {"loc": "68-0068/hwmon/hwmon*/avs0_vout", "value": "1850000"}, + # # OE1_AVDD_TX_1.2_V + # {"loc": "68-0068/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "68-0068/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "68-0068/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE1_AVDD_TRX_0.75_V + # {"loc": "68-0060/hwmon/hwmon*/avs0_vout_min", "value": "713000"}, + # {"loc": "68-0060/hwmon/hwmon*/avs0_vout_max", "value": "788000"}, + # {"loc": "68-0060/hwmon/hwmon*/avs0_vout", "value": "750000"}, + # # OE2_AVDD_RX_1.8_V + # {"loc": "68-006e/hwmon/hwmon*/avs0_vout_min", "value": "1710000"}, + # {"loc": "68-006e/hwmon/hwmon*/avs0_vout_max", "value": "1890000"}, + # {"loc": "68-006e/hwmon/hwmon*/avs0_vout", "value": "1800000"}, + # # OE2_AVDD_RX_1.2_V + # {"loc": "68-006e/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "68-006e/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "68-006e/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE2_AVDD_TX_1.8_V + # {"loc": "68-0066/hwmon/hwmon*/avs0_vout_min", "value": "1750000"}, + # {"loc": "68-0066/hwmon/hwmon*/avs0_vout_max", "value": "1950000"}, + # {"loc": "68-0066/hwmon/hwmon*/avs0_vout", "value": "1850000"}, + # # OE2_AVDD_TX_1.2_V + # {"loc": "68-0066/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "68-0066/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "68-0066/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE2_AVDD_TRX_0.75_V + # {"loc": "68-005e/hwmon/hwmon*/avs0_vout_min", "value": "713000"}, + # {"loc": "68-005e/hwmon/hwmon*/avs0_vout_max", "value": "788000"}, + # {"loc": "68-005e/hwmon/hwmon*/avs0_vout", "value": "750000"}, + # # OE3_AVDD_RX_1.8_V + # {"loc": "69-0070/hwmon/hwmon*/avs0_vout_min", "value": "1710000"}, + # {"loc": "69-0070/hwmon/hwmon*/avs0_vout_max", "value": "1890000"}, + # {"loc": "69-0070/hwmon/hwmon*/avs0_vout", "value": "1800000"}, + # # OE3_AVDD_RX_1.2_V + # {"loc": "69-0070/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "69-0070/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "69-0070/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE3_AVDD_TX_1.8_V + # {"loc": "69-0068/hwmon/hwmon*/avs0_vout_min", "value": "1750000"}, + # {"loc": "69-0068/hwmon/hwmon*/avs0_vout_max", "value": "1950000"}, + # {"loc": "69-0068/hwmon/hwmon*/avs0_vout", "value": "1850000"}, + # # OE3_AVDD_TX_1.2_V + # {"loc": "69-0068/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "69-0068/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "69-0068/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE3_AVDD_TRX_0.75_V + # {"loc": "69-0060/hwmon/hwmon*/avs0_vout_min", "value": "713000"}, + # {"loc": "69-0060/hwmon/hwmon*/avs0_vout_max", "value": "788000"}, + # {"loc": "69-0060/hwmon/hwmon*/avs0_vout", "value": "750000"}, + # # OE4_AVDD_RX_1.8_V + # {"loc": "69-006e/hwmon/hwmon*/avs0_vout_min", "value": "1710000"}, + # {"loc": "69-006e/hwmon/hwmon*/avs0_vout_max", "value": "1890000"}, + # {"loc": "69-006e/hwmon/hwmon*/avs0_vout", "value": "1800000"}, + # # OE4_AVDD_RX_1.2_V + # {"loc": "69-006e/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "69-006e/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "69-006e/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE4_AVDD_TX_1.8_V + # {"loc": "69-0066/hwmon/hwmon*/avs0_vout_min", "value": "1750000"}, + # {"loc": "69-0066/hwmon/hwmon*/avs0_vout_max", "value": "1950000"}, + # {"loc": "69-0066/hwmon/hwmon*/avs0_vout", "value": "1850000"}, + # # OE4_AVDD_TX_1.2_V + # {"loc": "69-0066/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "69-0066/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "69-0066/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE4_AVDD_TRX_0.75_V + # {"loc": "69-005e/hwmon/hwmon*/avs0_vout_min", "value": "713000"}, + # {"loc": "69-005e/hwmon/hwmon*/avs0_vout_max", "value": "788000"}, + # {"loc": "69-005e/hwmon/hwmon*/avs0_vout", "value": "750000"}, + # # OE5_AVDD_RX_1.8_V + # {"loc": "70-0070/hwmon/hwmon*/avs0_vout_min", "value": "1710000"}, + # {"loc": "70-0070/hwmon/hwmon*/avs0_vout_max", "value": "1890000"}, + # {"loc": "70-0070/hwmon/hwmon*/avs0_vout", "value": "1800000"}, + # # OE5_AVDD_RX_1.2_V + # {"loc": "70-0070/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "70-0070/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "70-0070/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE5_AVDD_TX_1.8_V + # {"loc": "70-0068/hwmon/hwmon*/avs0_vout_min", "value": "1750000"}, + # {"loc": "70-0068/hwmon/hwmon*/avs0_vout_max", "value": "1950000"}, + # {"loc": "70-0068/hwmon/hwmon*/avs0_vout", "value": "1850000"}, + # # OE5_AVDD_TX_1.2_V + # {"loc": "70-0068/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "70-0068/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "70-0068/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE5_AVDD_TRX_0.75_V + # {"loc": "70-0060/hwmon/hwmon*/avs0_vout_min", "value": "713000"}, + # {"loc": "70-0060/hwmon/hwmon*/avs0_vout_max", "value": "788000"}, + # {"loc": "70-0060/hwmon/hwmon*/avs0_vout", "value": "750000"}, + # # OE6_AVDD_RX_1.8_V + # {"loc": "70-006e/hwmon/hwmon*/avs0_vout_min", "value": "1710000"}, + # {"loc": "70-006e/hwmon/hwmon*/avs0_vout_max", "value": "1890000"}, + # {"loc": "70-006e/hwmon/hwmon*/avs0_vout", "value": "1800000"}, + # # OE6_AVDD_RX_1.2_V + # {"loc": "70-006e/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "70-006e/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "70-006e/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE6_AVDD_TX_1.8_V + # {"loc": "70-0066/hwmon/hwmon*/avs0_vout_min", "value": "1750000"}, + # {"loc": "70-0066/hwmon/hwmon*/avs0_vout_max", "value": "1950000"}, + # {"loc": "70-0066/hwmon/hwmon*/avs0_vout", "value": "1850000"}, + # # OE6_AVDD_TX_1.2_V + # {"loc": "70-0066/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "70-0066/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "70-0066/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE6_AVDD_TRX_0.75_V + # {"loc": "70-005e/hwmon/hwmon*/avs0_vout_min", "value": "713000"}, + # {"loc": "70-005e/hwmon/hwmon*/avs0_vout_max", "value": "788000"}, + # {"loc": "70-005e/hwmon/hwmon*/avs0_vout", "value": "750000"}, + # # OE7_AVDD_RX_1.8_V + # {"loc": "67-006e/hwmon/hwmon*/avs0_vout_min", "value": "1710000"}, + # {"loc": "67-006e/hwmon/hwmon*/avs0_vout_max", "value": "1890000"}, + # {"loc": "67-006e/hwmon/hwmon*/avs0_vout", "value": "1800000"}, + # # OE7_AVDD_RX_1.2_V + # {"loc": "67-006e/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "67-006e/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "67-006e/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE7_AVDD_TX_1.8_V + # {"loc": "67-0066/hwmon/hwmon*/avs0_vout_min", "value": "1750000"}, + # {"loc": "67-0066/hwmon/hwmon*/avs0_vout_max", "value": "1950000"}, + # {"loc": "67-0066/hwmon/hwmon*/avs0_vout", "value": "1850000"}, + # # OE7_AVDD_TX_1.2_V + # {"loc": "67-0066/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + # {"loc": "67-0066/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + # {"loc": "67-0066/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE7_AVDD_TRX_0.75_V + # {"loc": "67-005e/hwmon/hwmon*/avs0_vout_min", "value": "713000"}, + # {"loc": "67-005e/hwmon/hwmon*/avs0_vout_max", "value": "788000"}, + # {"loc": "67-005e/hwmon/hwmon*/avs0_vout", "value": "750000"}, + # RLML_VDD V3.3_V *1.5 + {"loc": "71-0068/hwmon/hwmon*/avs0_vout_min", "value": "1980000"}, + {"loc": "71-0068/hwmon/hwmon*/avs0_vout_max", "value": "2420000"}, + # RLMH_VDD V3.3_V *1.5 + {"loc": "71-0068/hwmon/hwmon*/avs1_vout_min", "value": "1980000"}, + {"loc": "71-0068/hwmon/hwmon*/avs1_vout_max", "value": "2420000"}, + # OCM_XDPE_VCCIN_V + {"loc": "5-0070/hwmon/hwmon*/avs0_vout_min", "value": "1350000"}, + {"loc": "5-0070/hwmon/hwmon*/avs0_vout_max", "value": "2200000"}, + # OCM_XDPE_P1V8_V + {"loc": "5-0070/hwmon/hwmon*/avs1_vout_min", "value": "1690000"}, + {"loc": "5-0070/hwmon/hwmon*/avs1_vout_max", "value": "1910000"}, + # OCM_XDPE_P1V05_V + {"loc": "5-006e/hwmon/hwmon*/avs0_vout_min", "value": "954000"}, + {"loc": "5-006e/hwmon/hwmon*/avs0_vout_max", "value": "1160000"}, + # OCM_XDPE_VNN_PCH_V + {"loc": "5-006e/hwmon/hwmon*/avs1_vout_min", "value": "540000"}, + {"loc": "5-006e/hwmon/hwmon*/avs1_vout_max", "value": "1320000"}, + # OCM_XDPE_VNN_NAC_V + {"loc": "5-0068/hwmon/hwmon*/avs0_vout_min", "value": "540000"}, + {"loc": "5-0068/hwmon/hwmon*/avs0_vout_max", "value": "1320000"}, + # OCM_XDPE_VCC_ANA_V + {"loc": "5-0068/hwmon/hwmon*/avs1_vout_min", "value": "900000"}, + {"loc": "5-0068/hwmon/hwmon*/avs1_vout_max", "value": "1100000"}, + # OCM_XDPE_P1V2_VDDQ_V + {"loc": "5-005e/hwmon/hwmon*/avs0_vout_min", "value": "1120000"}, + {"loc": "5-005e/hwmon/hwmon*/avs0_vout_max", "value": "1280000"}, +] + +INIT_PARAM = [] + +INIT_COMMAND_PRE = [] + +INIT_COMMAND = [ + # enable fan watchdog + {"path": "/dev/cpld5", "offset": 0x22, "value": [0x01], "gettype": "devfile"}, + {"path": "/dev/cpld6", "offset": 0x22, "value": [0x01], "gettype": "devfile"}, +] + +UPGRADE_SUMMARY = { + "devtype": 0x40d9, + + "slot0": { + "subtype": 0, + "SPI-LOGIC-DEV": { + "chain1":{ + "name":"IOB_FPGA", + "is_support_warm_upg":0, + "init_cmd": [ + # firmware upgrade set sysled blue/amber alternate flashing + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x50, "value": [0x01]} + ] + }, + "chain2":{ + "name":"DOM_FPGA", + "is_support_warm_upg":0, + "init_cmd": [ + # firmware upgrade set sysled blue/amber alternate flashing + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x50, "value": [0x01]} + ] + }, + "chain3":{ + "name":"SCM_CPLD", + "is_support_warm_upg":0, + "init_cmd": [ + # firmware upgrade set sysled blue/amber alternate flashing + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x50, "value": [0x01]} + ] + }, + "chain4":{ + "name":"MCB_CPLD", + "is_support_warm_upg":0, + "init_cmd": [ + # firmware upgrade set sysled blue/amber alternate flashing + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x50, "value": [0x01]} + ] + }, + "chain5":{ + "name":"SMB_CPLD", + "is_support_warm_upg":0, + "init_cmd": [ + # firmware upgrade set sysled blue/amber alternate flashing + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x50, "value": [0x01]} + ] + }, + "chain6":{ + "name":"FCB_B_CPLD", + "is_support_warm_upg":0, + "init_cmd": [ + # firmware upgrade set sysled blue/amber alternate flashing + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x50, "value": [0x01]} + ] + }, + "chain7":{ + "name":"FCB_T_CPLD", + "is_support_warm_upg":0, + "init_cmd": [ + # firmware upgrade set sysled blue/amber alternate flashing + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x50, "value": [0x01]} + ] + }, + "chain8":{ + "name":"MAC_PCIe", + "is_support_warm_upg":0, + "init_cmd": [ + # firmware upgrade set sysled blue/amber alternate flashing + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x50, "value": [0x01]} + ] + }, + }, + + "TEST": { + "fpga": [ + {"chain": 1, "file": "/etc/.upgrade_test/0x40d9/iob_fpga_test_header.bin", "display_name": "IOB_FPGA"}, + {"chain": 2, "file": "/etc/.upgrade_test/0x40d9/dom_fpga_test_header.bin", "display_name": "DOM_FPGA"}, + ], + "cpld": [ + {"chain": 3, "file": "/etc/.upgrade_test/0x40d9/scm_cpld_spi_test_header.bin", "display_name": "SCM_CPLD_SPI"}, + {"chain": 4, "file": "/etc/.upgrade_test/0x40d9/mcb_cpld_spi_test_header.bin", "display_name": "MCB_CPLD_SPI"}, + {"chain": 5, "file": "/etc/.upgrade_test/0x40d9/smb_cpld_spi_test_header.bin", "display_name": "SMB_CPLD_SPI"}, + {"chain": 6, "file": "/etc/.upgrade_test/0x40d9/fcb_b_cpld_spi_test_header.bin", "display_name": "FCB_B_CPLD_SPI"}, + {"chain": 7, "file": "/etc/.upgrade_test/0x40d9/fcb_t_cpld_spi_test_header.bin", "display_name": "FCB_T_CPLD_SPI"}, + #{"chain": 8, "file": "/etc/.upgrade_test/0x40d9/mac_pcie_spi_test_header.bin", "display_name": "MAC_PCIe"}, + ], + }, + }, + + "BMC": { + "name": "BMC", + "init_cmd": [ + # firmware upgrade set sysled blue/amber alternate flashing + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x50, "value": [0x01]} + ], + "finish_cmd": [], + }, +} + +PLATFORM_E2_CONF = { + "fan": [ + {"name": "fan1", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/40-0050/eeprom"}, + {"name": "fan2", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/48-0050/eeprom"}, + {"name": "fan3", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/41-0050/eeprom"}, + {"name": "fan4", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/49-0050/eeprom"}, + {"name": "fan5", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/42-0050/eeprom"}, + {"name": "fan6", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/50-0050/eeprom"}, + {"name": "fan7", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/43-0050/eeprom"}, + {"name": "fan8", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/51-0050/eeprom"}, + ], + "psu": [ + {"name": "psu2", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/10-0050/eeprom"}, + ], + "syseeprom": [ + {"name": "syseeprom", "e2_type": "onie_tlv", "e2_path": "/sys/bus/i2c/devices/1-0056/eeprom"}, + ], + "scm": [ + {"name": "scm", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/32-0052/eeprom"}, + ], + "smb": [ + {"name": "smb", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/3-0051/eeprom"}, + ], + "chassis": [ + {"name": "chassis", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/2-0051/eeprom"}, + ], +} + +PLATFORM_POWER_CONF = [ + { + "name": "Input power total", + "unit": "W", + "children": [ + { + "name": "PSU2 input", + "pre_check": { + "loc": "/sys/s3ip/psu/psu2/present", + "gettype": "sysfs", "mask": 0x01, "okval": 1, + "not_ok_msg": "ABSENT" + }, + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/10-0058/hwmon/hwmon*/power1_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)/1000000)" + }, + ] + }, + { + "name": "Output power total", + "unit": "W", + "children": [ + { + "name": "PSU2 output", + "pre_check": { + "loc": "/sys/s3ip/psu/psu2/present", + "gettype": "sysfs", "mask": 0x01, "okval": 1, + "not_ok_msg": "ABSENT" + }, + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/10-0058/hwmon/hwmon*/power2_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)/1000000)" + }, + ] + }, + { + "name": "MAC power consumption", + "unit": "W", + "children": [ + { + "name": "MAC_CORE", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/64-0040/hwmon/hwmon*/power3_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*2/1000000)" + }, + { + "name": "MAC_ANALOG0 V0.9", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/65-0040/hwmon/hwmon*/power3_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)/1000000)" + }, + { + "name": "MAC_ANALOG0 V0.75", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/65-0040/hwmon/hwmon*/power4_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)/1000000)" + }, + { + "name": "MAC_ANALOG1 V0.9", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/66-0040/hwmon/hwmon*/power3_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)/1000000)" + }, + { + "name": "MAC_ANALOG1 V0.75", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/66-0040/hwmon/hwmon*/power4_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)/1000000)" + }, + { + "name": "MAC_PLL0_VDD0.9", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/56-0040/hwmon/hwmon*/in2_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/56-0040/hwmon/hwmon*/curr2_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "MAC_PLL1_VDD0.9", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/56-0040/hwmon/hwmon*/in1_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/56-0040/hwmon/hwmon*/curr1_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "MAC_PLL2_VDD0.9", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/58-0040/hwmon/hwmon*/in1_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/58-0040/hwmon/hwmon*/curr1_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "MAC_PLL3_VDD0.9", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/58-0040/hwmon/hwmon*/in3_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/58-0040/hwmon/hwmon*/curr3_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "MAC_VDD_0.8", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/58-0040/hwmon/hwmon*/in2_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/58-0040/hwmon/hwmon*/curr2_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "MAC_VDD_1.8", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/60-0040/hwmon/hwmon*/in1_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/60-0040/hwmon/hwmon*/curr1_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "MAC_VDD_1.5", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/60-0040/hwmon/hwmon*/in2_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/60-0040/hwmon/hwmon*/curr2_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "MAC_VDD_1.2", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/61-0040/hwmon/hwmon*/in1_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/61-0040/hwmon/hwmon*/curr1_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + } + ] + }, + { + "name": "CPO OE0 power consumption", + "unit": "W", + "children": [ + { + "name": "OE0_AVDD_RX_1.8", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/67-0070/hwmon/hwmon*/loopa_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/67-0070/hwmon/hwmon*/loopa_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.97+220)/1000000)" + }, + { + "name": "OE0_AVDD_RX_1.2", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/67-0070/hwmon/hwmon*/loopb_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/67-0070/hwmon/hwmon*/loopb_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.984+180)/1000000)" + }, + { + "name": "OE0_AVDD_TX_1.8", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/67-0068/hwmon/hwmon*/loopa_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/67-0068/hwmon/hwmon*/loopa_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.984+177)/1000000)" + }, + { + "name": "OE0_AVDD_TX_1.2", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/67-0068/hwmon/hwmon*/loopb_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/67-0068/hwmon/hwmon*/loopb_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.974+126)/1000000)" + }, + { + "name": "OE0_AVDD_TRX_0.75", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/67-0060/hwmon/hwmon*/loopa_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/67-0060/hwmon/hwmon*/loopa_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.984+140)/1000000)" + }, + ] + }, + { + "name": "CPO OE1 power consumption", + "unit": "W", + "children": [ + { + "name": "OE1_AVDD_RX_1.8", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/68-0070/hwmon/hwmon*/loopa_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/68-0070/hwmon/hwmon*/loopa_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.97+220)/1000000)" + }, + { + "name": "OE1_AVDD_RX_1.2", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/68-0070/hwmon/hwmon*/loopb_vout", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/68-0070/hwmon/hwmon*/loopb_iout", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*(float(%s)*0.984+180)/1000000)" + }, + { + "name": "OE1_AVDD_TX_1.8", + "val_conf": [ + { + "gettype": "sysfs", + "loc": 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consumption total", + "unit": "W", + "children": [ + { + "name": "FAN1 power consumption", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/88-0042/hwmon/hwmon*/in1_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/88-0042/hwmon/hwmon*/curr1_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "FAN2 power consumption", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/89-0042/hwmon/hwmon*/in2_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/89-0042/hwmon/hwmon*/curr2_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "FAN3 power consumption", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/88-0042/hwmon/hwmon*/in2_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/88-0042/hwmon/hwmon*/curr2_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "FAN4 power consumption", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/89-0042/hwmon/hwmon*/in3_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/89-0042/hwmon/hwmon*/curr3_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "FAN5 power consumption", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/88-0042/hwmon/hwmon*/in3_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/88-0042/hwmon/hwmon*/curr3_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "FAN6 power consumption", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/90-0042/hwmon/hwmon*/in1_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/90-0042/hwmon/hwmon*/curr1_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "FAN7 power consumption", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/89-0042/hwmon/hwmon*/in1_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/89-0042/hwmon/hwmon*/curr1_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "FAN8 power consumption", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/90-0042/hwmon/hwmon*/in2_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/90-0042/hwmon/hwmon*/curr2_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + + ] + }, +] + +REBOOT_CAUSE_PARA = { + "reboot_cause_list": [ + { + "name": "otp_switch_reboot", + "monitor_point": {"gettype": "file_exist", "judge_file": "/etc/.otp_switch_reboot_flag", "okval": True}, + "record": [ + {"record_type": "file", "mode": "cover", "log": "Thermal Overload: ASIC, ", + "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"}, + {"record_type": "file", "mode": "add", "log": "Thermal Overload: ASIC, ", + "path": "/etc/sonic/.reboot/.history-reboot-cause.txt", "file_max_size": 1 * 1024 * 1024} + ], + "finish_operation": [ + {"gettype": "cmd", "cmd": "rm -rf /etc/.otp_switch_reboot_flag"}, + ] + }, + { + "name": "otp_other_reboot", + "monitor_point": {"gettype": "file_exist", "judge_file": "/etc/.otp_other_reboot_flag", "okval": True}, + "record": [ + {"record_type": "file", "mode": "cover", "log": "Thermal Overload: Other, ", + "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"}, + {"record_type": "file", "mode": "add", "log": "Thermal Overload: Other, ", + "path": "/etc/sonic/.reboot/.history-reboot-cause.txt", "file_max_size": 1 * 1024 * 1024} + ], + "finish_operation": [ + {"gettype": "cmd", "cmd": "rm -rf /etc/.otp_other_reboot_flag"}, + ] + }, + ], + "other_reboot_cause_record": [ + {"record_type": "file", "mode": "cover", "log": "Other, ", "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"}, + {"record_type": "file", "mode": "add", "log": "Other, ", "path": "/etc/sonic/.reboot/.history-reboot-cause.txt"} + ], +} + +POWER_CTRL_CONF = { + "oe": [ + { + "name": "OE0", + "status": [ + { + "val_conf": {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x22, "mask": 0x01}, + "off": [0x00], + "on": [0x01], + } + ], + "on": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfe, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_7", "value": 0x00, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x81, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_7", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfe, "value": 0x01, "delay": 0.001}, + ], + "off": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfe, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_7", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x81, "value": 0xfe}, + ], + "cycle": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfe, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_7", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x81, "value": 0xfe, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x81, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_7", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfe, "value": 0x01, "delay": 0.001}, + ], + "reset": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfe, "value": 0x00}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfe, "value": 0x01, "delay": 0.01}, + ], + }, + { + "name": "OE1", + "status": [ + { + "val_conf": {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x22, "mask": 0x02}, + "off": [0x00], + "on": [0x02], + } + ], + "on": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfd, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_4", "value": 0x00, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x82, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_4", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfd, "value": 0x02, "delay": 0.001}, + ], + "off": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfd, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_4", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x82, "value": 0xfe}, + ], + "cycle": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfd, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_4", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x82, "value": 0xfe, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x82, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_4", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfd, "value": 0x02, "delay": 0.001}, + ], + "reset": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfd, "value": 0x00}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfd, "value": 0x02, "delay": 0.01}, + ], + }, + { + "name": "OE2", + "status": [ + { + "val_conf": {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x22, "mask": 0x04}, + "off": [0x00], + "on": [0x04], + } + ], + "on": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfb, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_3", "value": 0x00, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x83, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_3", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfb, "value": 0x04, "delay": 0.001}, + ], + "off": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfb, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_3", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x83, "value": 0xfe}, + ], + "cycle": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfb, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_3", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x83, "value": 0xfe, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x83, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_3", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfb, "value": 0x04, "delay": 0.001}, + ], + "reset": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfb, "value": 0x00}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xfb, "value": 0x04, "delay": 0.01}, + ], + }, + { + "name": "OE3", + "status": [ + { + "val_conf": {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x22, "mask": 0x08}, + "off": [0x00], + "on": [0x08], + } + ], + "on": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xf7, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_0", "value": 0x00, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x84, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_0", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xf7, "value": 0x08, "delay": 0.001}, + ], + "off": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xf7, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_0", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x84, "value": 0xfe}, + ], + "cycle": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xf7, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_0", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x84, "value": 0xfe, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x84, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/72-0009/out_en_ctrl_0", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xf7, "value": 0x08, "delay": 0.001}, + ], + "reset": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xf7, "value": 0x00}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xf7, "value": 0x08, "delay": 0.01}, + ], + }, + { + "name": "OE4", + "status": [ + { + "val_conf": {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x22, "mask": 0x10}, + "off": [0x00], + "on": [0x10], + } + ], + "on": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xef, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_1", "value": 0x00, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x85, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_1", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xef, "value": 0x10, "delay": 0.001}, + ], + "off": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xef, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_1", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x85, "value": 0xfe}, + ], + "cycle": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xef, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_1", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x85, "value": 0xfe, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x85, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_1", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xef, "value": 0x10, "delay": 0.001}, + ], + "reset": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xef, "value": 0x00}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xef, "value": 0x10, "delay": 0.01}, + ], + }, + { + "name": "OE5", + "status": [ + { + "val_conf": {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x22, "mask": 0x20}, + "off": [0x00], + "on": [0x20], + } + ], + "on": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xdf, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_3", "value": 0x00, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x86, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_3", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xdf, "value": 0x20, "delay": 0.001}, + ], + "off": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xdf, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_3", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x86, "value": 0xfe}, + ], + "cycle": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xdf, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_3", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x86, "value": 0xfe, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x86, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_3", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xdf, "value": 0x20, "delay": 0.001}, + ], + "reset": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xdf, "value": 0x00}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xdf, "value": 0x20, "delay": 0.01}, + ], + }, + { + "name": "OE6", + "status": [ + { + "val_conf": {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x22, "mask": 0x40}, + "off": [0x00], + "on": [0x40], + } + ], + "on": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xbf, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_4", "value": 0x00, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x87, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_4", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xbf, "value": 0x40, "delay": 0.001}, + ], + "off": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xbf, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_4", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x87, "value": 0xfe}, + ], + "cycle": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xbf, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_4", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x87, "value": 0xfe, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x87, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_4", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xbf, "value": 0x40, "delay": 0.001}, + ], + "reset": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xbf, "value": 0x00}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0xbf, "value": 0x40, "delay": 0.01}, + ], + }, + { + "name": "OE7", + "status": [ + { + "val_conf": {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x22, "mask": 0x80}, + "off": [0x00], + "on": [0x80], + } + ], + "on": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0x7f, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_7", "value": 0x00, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x88, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_7", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0x7f, "value": 0x80, "delay": 0.001}, + ], + "off": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0x7f, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_7", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x88, "value": 0xfe}, + ], + "cycle": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0x7f, "value": 0x00, "delay": 0.001}, + # disable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_7", "value": 0x00, "delay": 0.001}, + # power off OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x88, "value": 0xfe, "delay": 0.001}, + # power on OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x88, "value": 0xff, "delay": 0.001}, + # enable OE REFCLK + {"gettype": "sysfs", "loc": "/sys/bus/i2c/devices/73-0009/out_en_ctrl_7", "value": 0x01, "delay": 0.001}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0x7f, "value": 0x80, "delay": 0.001}, + ], + "reset": [ + # reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0x7f, "value": 0x00}, + # un reset OE + {"gettype": "i2c", "bus": 20, "loc": 0x1e, "offset": 0x72, "mask": 0x7f, "value": 0x80, "delay": 0.01}, + ], + } + ] +} + +SET_FW_MAC_CONF = [ + { + "name": "eth0", + "e2_name": "syseeprom", + "get_act_mac": {"cmd": "ethtool -e eth0 offset 0 length 6 |grep 0x0000 | awk -F':' '{gsub(/ /, \":\", $2);print $2}'| sed 's/^[[:space:]]*//' | sed 's/:\s*$//'", "gettype": "cmd_str"}, + "set_mac_cfg": { + "type": 1, + "cmd": {"cmd": "ethtool -E eth0 magic 0x15338086 offset %s value 0x%s length 1", "gettype": "cmd", "delay": 0.1}, + }, + "check_mac_cfg": {"cmd": "ethtool -e eth0 offset 0 length 6 |grep 0x0000 | awk -F':' '{gsub(/ /, \":\", $2);print $2}'| sed 's/^[[:space:]]*//' | sed 's/:\s*$//'", "gettype": "cmd_str"}, + } +] + +SET_MAC_CONF = SET_FW_MAC_CONF +PRODUCT_NAME_CONF = {} diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/config/x86_64_micas_m2_w6940_128x1_fr4_r0_config.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/config/x86_64_micas_m2_w6940_128x1_fr4_r0_config.py new file mode 100755 index 00000000000..5f86a05520b --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/config/x86_64_micas_m2_w6940_128x1_fr4_r0_config.py @@ -0,0 +1,2019 @@ +#!/usr/bin/python +# -*- coding: UTF-8 -*- +from platform_common import * + +STARTMODULE = { + "hal_fanctrl": 1, + "hal_ledctrl": 1, + "avscontrol": 1, + "dev_monitor": 1, + "tty_console": 0, + "reboot_cause": 1, + "pmon_syslog": 1, + "sff_temp_polling": 1, + "generate_airflow": 0, + "product_name": 1, + "generate_mgmt_version": 0, + "set_fw_mac": 1, +} + +DEV_MONITOR_PARAM = { + "polling_time": 10, + "psus": [ + { + "name": "psu2", + "present": {"gettype": "i2c", "bus": 13, "loc": 0x1d, "offset": 0x42, "presentbit": 0, "okval": 0}, + "device": [ + {"id": "psu2pmbus", "name": "wb_fsp1200", "bus": 10, "loc": 0x58, "attr": "hwmon"}, + {"id": "psu2frue2", "name": "wb_24c02", "bus": 10, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "psu1", + "present": {"gettype": "i2c", "bus": 13, "loc": 0x1d, "offset": 0x42, "presentbit": 1, "okval": 0}, + "device": [ + {"id": "psu1pmbus", "name": "wb_fsp1200", "bus": 11, "loc": 0x58, "attr": "hwmon"}, + {"id": "psu1frue2", "name": "wb_24c02", "bus": 11, "loc": 0x50, "attr": "eeprom"}, + ], + }, + ], + "fans": [ + { + "name": "fan7", + "present": {"gettype": "i2c", "bus": 44, "loc": 0x0d, "offset": 0x5b, "presentbit": 0, "okval": 0}, + "device": [ + {"id": "fan7frue2", "name": "wb_24c64", "bus": 43, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "fan5", + "present": {"gettype": "i2c", "bus": 44, "loc": 0x0d, "offset": 0x5b, "presentbit": 1, "okval": 0}, + "device": [ + {"id": "fan5frue2", "name": "wb_24c64", "bus": 42, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "fan3", + "present": {"gettype": "i2c", "bus": 44, "loc": 0x0d, "offset": 0x5b, "presentbit": 2, "okval": 0}, + "device": [ + {"id": "fan3frue2", "name": "wb_24c64", "bus": 41, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "fan1", + "present": {"gettype": "i2c", "bus": 44, "loc": 0x0d, "offset": 0x5b, "presentbit": 3, "okval": 0}, + "device": [ + {"id": "fan1frue2", "name": "wb_24c64", "bus":40, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "fan8", + "present": {"gettype": "i2c", "bus": 52, "loc": 0x0d, "offset": 0x5b, "presentbit": 0, "okval": 0}, + "device": [ + {"id": "fan8frue2", "name": "wb_24c64", "bus": 51, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "fan6", + "present": {"gettype": "i2c", "bus": 52, "loc": 0x0d, "offset": 0x5b, "presentbit": 1, "okval": 0}, + "device": [ + {"id": "fan6frue2", "name": "wb_24c64", "bus": 50, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "fan4", + "present": {"gettype": "i2c", "bus": 52, "loc": 0x0d, "offset": 0x5b, "presentbit": 2, "okval": 0}, + "device": [ + {"id": "fan4frue2", "name": "wb_24c64", "bus": 49, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "fan2", + "present": {"gettype": "i2c", "bus": 52, "loc": 0x0d, "offset": 0x5b, "presentbit": 3, "okval": 0}, + "device": [ + {"id": "fan2frue2", "name": "wb_24c64", "bus": 48, "loc": 0x50, "attr": "eeprom"}, + ], + }, + ], + "others": [ + { + "name": "eeprom", + "device": [ + {"id": "eeprom_1", "name": "wb_24c02", "bus": 1, "loc": 0x56, "attr": "eeprom"}, + {"id": "eeprom_2", "name": "wb_24c02", "bus": 1, "loc": 0x57, "attr": "eeprom"}, + {"id": "eeprom_3", "name": "wb_24c02", "bus": 2, "loc": 0x51, "attr": "eeprom"}, + {"id": "eeprom_4", "name": "wb_24c02", "bus": 3, "loc": 0x51, "attr": "eeprom"}, + {"id": "eeprom_5", "name": "wb_24c02", "bus": 32, "loc": 0x52, "attr": "eeprom"}, + {"id": "eeprom_6", "name": "wb_24c02", "bus": 12, "loc": 0x57, "attr": "eeprom"}, + ], + }, + { + "name": "oe_mcu", + "device": [ + {"id": "oe_mcu_1", "name": "wb_24c02", "bus": 24, "loc": 0x50, "attr": "eeprom"}, + {"id": "oe_mcu_2", "name": "wb_24c02", "bus": 25, "loc": 0x50, "attr": "eeprom"}, + {"id": "oe_mcu_3", "name": "wb_24c02", "bus": 26, "loc": 0x50, "attr": "eeprom"}, + {"id": "oe_mcu_4", "name": "wb_24c02", "bus": 27, "loc": 0x50, "attr": "eeprom"}, + {"id": "oe_mcu_5", "name": "wb_24c02", "bus": 28, "loc": 0x50, "attr": "eeprom"}, + {"id": "oe_mcu_6", "name": "wb_24c02", "bus": 29, "loc": 0x50, "attr": "eeprom"}, + {"id": "oe_mcu_7", "name": "wb_24c02", "bus": 30, "loc": 0x50, "attr": "eeprom"}, + {"id": "oe_mcu_8", "name": "wb_24c02", "bus": 31, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "tmp275", + "device": [ + {"id": "tmp275_1", "name": "wb_tmp275", "bus": 34, "loc": 0x4c, "attr": "hwmon"}, + {"id": "tmp275_2", "name": "wb_tmp275", "bus": 35, "loc": 0x4d, "attr": "hwmon"}, + {"id": "tmp275_3", "name": "wb_tmp275", "bus": 8, "loc": 0x48, "attr": "hwmon"}, + {"id": "tmp275_4", "name": "wb_tmp275", "bus": 8, "loc": 0x49, "attr": "hwmon"}, + {"id": "tmp275_5", "name": "wb_tmp275", "bus": 9, "loc": 0x48, "attr": "hwmon"}, + {"id": "tmp275_6", "name": "wb_tmp275", "bus": 9, "loc": 0x49, "attr": "hwmon"}, + {"id": "tmp275_7", "name": "wb_tmp275", "bus": 14, "loc": 0x48, "attr": "hwmon"}, + {"id": "tmp275_8", "name": "wb_tmp275", "bus": 14, "loc": 0x49, "attr": "hwmon"}, + {"id": "tmp275_9", "name": "wb_tmp275", "bus": 14, "loc": 0x4b, "attr": "hwmon"}, + ], + }, + { + "name": "ina3221", + "device": [ + {"id": "ina3221_1", "name": "wb_ina3221", "bus": 33, "loc": 0x40, "attr": "hwmon"}, + {"id": "ina3221_2", "name": "wb_ina3221", "bus": 33, "loc": 0x41, "attr": "hwmon"}, + {"id": "ina3221_3", "name": "wb_ina3221", "bus": 33, "loc": 0x42, "attr": "hwmon"}, + {"id": "ina3221_4", "name": "wb_ina3221", "bus": 12, "loc": 0x40, "attr": "hwmon"}, + {"id": "ina3221_5", "name": "wb_ina3221", "bus": 12, "loc": 0x41, "attr": "hwmon"}, + {"id": "ina3221_6", "name": "wb_ina3221", "bus": 56, "loc": 0x40, "attr": "hwmon"}, + {"id": "ina3221_7", "name": "wb_ina3221", "bus": 56, "loc": 0x41, "attr": "hwmon"}, + {"id": "ina3221_8", "name": "wb_ina3221", "bus": 57, "loc": 0x40, "attr": "hwmon"}, + {"id": "ina3221_9", "name": "wb_ina3221", "bus": 58, "loc": 0x40, "attr": "hwmon"}, + {"id": "ina3221_10", "name": "wb_ina3221", "bus": 59, "loc": 0x40, "attr": "hwmon"}, + {"id": "ina3221_11", "name": "wb_ina3221", "bus": 60, "loc": 0x40, "attr": "hwmon"}, + {"id": "ina3221_12", "name": "wb_ina3221", "bus": 61, "loc": 0x40, "attr": "hwmon"}, + {"id": "ina3221_13", "name": "wb_ina3221", "bus": 62, "loc": 0x40, "attr": "hwmon"}, + {"id": "ina3221_14", "name": "wb_ina3221", "bus": 63, "loc": 0x40, "attr": "hwmon"}, + ], + }, + { + "name": "xdpe12284", + "device": [ + {"id": "xdpe12284_1", "name": "wb_xdpe12284", "bus": 5, "loc": 0x5e, "attr": "hwmon"}, + {"id": "xdpe12284_2", "name": "wb_xdpe12284", "bus": 5, "loc": 0x68, "attr": "hwmon"}, + {"id": "xdpe12284_3", "name": "wb_xdpe12284", "bus": 5, "loc": 0x6e, "attr": "hwmon"}, + {"id": "xdpe12284_4", "name": "wb_xdpe12284", "bus": 5, "loc": 0x70, "attr": "hwmon"}, + {"id": "xdpe12284_5", "name": "wb_xdpe12284", "bus": 70, "loc": 0x68, "attr": "hwmon"}, + {"id": "xdpe12284_6", "name": "wb_xdpe12284", "bus": 71, "loc": 0x68, "attr": "hwmon"}, + ], + }, + { + "name": "xdpe132g5c", + "device": [ + {"id": "xdpe132g5c_1", "name": "wb_xdpe132g5c_pmbus", "bus": 64, "loc": 0x40, "attr": "hwmon"}, + {"id": "xdpe132g5c_2", "name": "wb_xdpe132g5c_pmbus", "bus": 65, "loc": 0x40, "attr": "hwmon"}, + {"id": "xdpe132g5c_3", "name": "wb_xdpe132g5c_pmbus", "bus": 66, "loc": 0x40, "attr": "hwmon"}, + {"id": "xdpe132g5c_4", "name": "wb_xdpe132g5c_pmbus", "bus": 69, "loc": 0x40, "attr": "hwmon"}, + ], + }, + { + "name": "ucd90160", + "device": [ + {"id": "ucd90160_1", "name": "wb_ucd90160", "bus": 5, "loc": 0x5f, "attr": "hwmon"}, + ], + }, + ], +} + +MANUINFO_CONF = { + "bios": { + "key": "BIOS", + "head": True, + "next": "cpu" + }, + "bios_vendor": { + "parent": "bios", + "key": "Vendor", + "cmd": "dmidecode -t 0 |grep Vendor", + "pattern": r".*Vendor", + "separator": ":", + "arrt_index": 1, + }, + "bios_version": { + "parent": "bios", + "key": "Version", + "cmd": "dmidecode -t 0 |grep Version", + "pattern": r".*Version", + "separator": ":", + "arrt_index": 2, + }, + "bios_date": { + "parent": "bios", + "key": "Release Date", + "cmd": "dmidecode -t 0 |grep Release", + "pattern": r".*Release Date", + "separator": ":", + "arrt_index": 3, + }, + "bios_boot": { + "parent": "bios", + "key": "Boot From", + "devfile": { + "loc": "/dev/cpld1", + "offset":0x1d, + "len":1, + "bit_width":1 + }, + "decode": { + "01": "Master", + "02": "Slave" + }, + "arrt_index": 4, + }, + + "cpu": { + "key": "CPU", + "next": "cpld" + }, + "cpu_vendor": { + "parent": "cpu", + "key": "Vendor", + "cmd": "dmidecode --type processor |grep Manufacturer", + "pattern": r".*Manufacturer", + "separator": ":", + "arrt_index": 1, + }, + "cpu_model": { + "parent": "cpu", + "key": "Device Model", + "cmd": "dmidecode --type processor | grep Version", + "pattern": r".*Version", + "separator": ":", + "arrt_index": 2, + }, + "cpu_core": { + "parent": "cpu", + "key": "Core Count", + "cmd": "dmidecode --type processor | grep \"Core Count\"", + "pattern": r".*Core Count", + "separator": ":", + "arrt_index": 3, + }, + "cpu_thread": { + "parent": "cpu", + "key": "Thread Count", + "cmd": "dmidecode --type processor | grep \"Thread Count\"", + "pattern": r".*Thread Count", + "separator": ":", + "arrt_index": 4, + }, + + + "cpld": { + "key": "CPLD", + "next": "fpga" + }, + + "cpld1": { + "key": "CPLD1", + "parent": "cpld", + "arrt_index": 1, + }, + "cpld1_model": { + "key": "Device Model", + "parent": "cpld1", + "config": "LCMXO3LF-2100C-5BG256C", + "arrt_index": 1, + }, + "cpld1_vender": { + "key": "Vendor", + "parent": "cpld1", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld1_desc": { + "key": "Description", + "parent": "cpld1", + "config": "CPU CPLD", + "arrt_index": 3, + }, + "cpld1_version": { + "key": "Firmware Version", + "parent": "cpld1", + "reg": { + "loc": "/dev/port", + "offset": 0xa00, + "size": 4 + }, + "callback": "cpld_format", + "arrt_index": 4, + }, + + "cpld2": { + "key": "CPLD2", + "parent": "cpld", + "arrt_index": 2, + }, + "cpld2_model": { + "key": "Device Model", + "parent": "cpld2", + "config": "LCMXO3LF-2100C-5BG256C", + "arrt_index": 1, + }, + "cpld2_vender": { + "key": "Vendor", + "parent": "cpld2", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld2_desc": { + "key": "Description", + "parent": "cpld2", + "config": "SCM CPLD", + "arrt_index": 3, + }, + "cpld2_version": { + "key": "Firmware Version", + "parent": "cpld2", + "reg": { + "loc": "/dev/port", + "offset": 0x900, + "size": 4 + }, + "callback": "cpld_format", + "arrt_index": 4, + }, + "cpld2_boot": { + "parent": "cpld2", + "key": "Boot From", + "devfile": { + "loc": "/dev/cpld1", + "offset":0x06, + "len":1, + "bit_width":1 + }, + "decode": { + "01": "Main", + "02": "Golden" + }, + "arrt_index": 5, + }, + + "cpld3": { + "key": "CPLD3", + "parent": "cpld", + "arrt_index": 3, + }, + "cpld3_model": { + "key": "Device Model", + "parent": "cpld3", + "config": "LCMXO3LF-4300C-6BG324I", + "arrt_index": 1, + }, + "cpld3_vender": { + "key": "Vendor", + "parent": "cpld3", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld3_desc": { + "key": "Description", + "parent": "cpld3", + "config": "MCB CPLD", + "arrt_index": 3, + }, + "cpld3_version": { + "key": "Firmware Version", + "parent": "cpld3", + "i2c": { + "bus": "13", + "loc": "0x1d", + "offset": 0, + "size": 4 + }, + "callback": "cpld_format", + "arrt_index": 4, + }, + "cpld3_boot": { + "parent": "cpld3", + "key": "Boot From", + "devfile": { + "loc": "/dev/cpld3", + "offset":0x0d, + "len":1, + "bit_width":1 + }, + "decode": { + "01": "Main", + "02": "Golden" + }, + "arrt_index": 5, + }, + + "cpld4": { + "key": "CPLD4", + "parent": "cpld", + "arrt_index": 4, + }, + "cpld4_model": { + "key": "Device Model", + "parent": "cpld4", + "config": "LCMXO3LF-4300C-6BG324I", + "arrt_index": 1, + }, + "cpld4_vender": { + "key": "Vendor", + "parent": "cpld4", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld4_desc": { + "key": "Description", + "parent": "cpld4", + "config": "SMB CPLD", + "arrt_index": 3, + }, + "cpld4_version": { + "key": "Firmware Version", + "parent": "cpld4", + "i2c": { + "bus": "20", + "loc": "0x1e", + "offset": 0, + "size": 4 + }, + "callback": "cpld_format", + "arrt_index": 4, + }, + "cpld4_boot": { + "parent": "cpld4", + "key": "Boot From", + "devfile": { + "loc": "/dev/cpld4", + "offset":0x0d, + "len":1, + "bit_width":1 + }, + "decode": { + "01": "Main", + "02": "Golden" + }, + "arrt_index": 5, + }, + + "cpld5": { + "key": "CPLD5", + "parent": "cpld", + "arrt_index": 5, + }, + "cpld5_model": { + "key": "Device Model", + "parent": "cpld5", + "config": "LCMXO3LF-2100C-5BG256C", + "arrt_index": 1, + }, + "cpld5_vender": { + "key": "Vendor", + "parent": "cpld5", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld5_desc": { + "key": "Description", + "parent": "cpld5", + "config": "FCB_T CPLD", + "arrt_index": 3, + }, + "cpld5_version": { + "key": "Firmware Version", + "parent": "cpld5", + "i2c": { + "bus": "44", + "loc": "0x0d", + "offset": 0, + "size": 4 + }, + "callback": "cpld_format", + "arrt_index": 4, + }, + "cpld5_boot": { + "parent": "cpld5", + "key": "Boot From", + "devfile": { + "loc": "/dev/cpld5", + "offset":0x0d, + "len":1, + "bit_width":1 + }, + "decode": { + "01": "Main", + "02": "Golden" + }, + "arrt_index": 5, + }, + + "cpld6": { + "key": "CPLD6", + "parent": "cpld", + "arrt_index": 6, + }, + "cpld6_model": { + "key": "Device Model", + "parent": "cpld6", + "config": "LCMXO3LF-2100C-5BG256C", + "arrt_index": 1, + }, + "cpld6_vender": { + "key": "Vendor", + "parent": "cpld6", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld6_desc": { + "key": "Description", + "parent": "cpld6", + "config": "FCB_B CPLD", + "arrt_index": 3, + }, + "cpld6_version": { + "key": "Firmware Version", + "parent": "cpld6", + "i2c": { + "bus": "52", + "loc": "0x0d", + "offset": 0, + "size": 4 + }, + "callback": "cpld_format", + "arrt_index": 4, + }, + "cpld6_boot": { + "parent": "cpld6", + "key": "Boot From", + "devfile": { + "loc": "/dev/cpld6", + "offset":0x0d, + "len":1, + "bit_width":1 + }, + "decode": { + "01": "Main", + "02": "Golden" + }, + "arrt_index": 5, + }, + + + "psu": { + "key": "PSU", + "next": "fan" + }, + + "psu1": { + "parent": "psu", + "key": "PSU1", + "arrt_index": 1, + }, + "psu1_hw_version": { + "key": "Hardware Version", + "parent": "psu1", + "extra": { + "funcname": "getPsu", + "id": "psu1", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "psu1_fw_version": { + "key": "Firmware Version", + "parent": "psu1", + "config": "NA", + "arrt_index": 2, + }, + + "psu2": { + "parent": "psu", + "key": "PSU2", + "arrt_index": 2, + }, + "psu2_hw_version": { + "key": "Hardware Version", + "parent": "psu2", + "extra": { + "funcname": "getPsu", + "id": "psu2", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "psu2_fw_version": { + "key": "Firmware Version", + "parent": "psu2", + "config": "NA", + "arrt_index": 2, + }, + + "fan": { + "key": "FAN", + "next": "fpga" + }, + "fan1": { + "key": "FAN1", + "parent": "fan", + "arrt_index": 1, + }, + "fan1_hw_version": { + "key": "Hardware Version", + "parent": "fan1", + "extra": { + "funcname": "checkFan", + "id": "fan1", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan1_fw_version": { + "key": "Firmware Version", + "parent": "fan1", + "config": "NA", + "arrt_index": 2, + }, + + "fan2": { + "key": "FAN2", + "parent": "fan", + "arrt_index": 2, + }, + "fan2_hw_version": { + "key": "Hardware Version", + "parent": "fan2", + "extra": { + "funcname": "checkFan", + "id": "fan2", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan2_fw_version": { + "key": "Firmware Version", + "parent": "fan2", + "config": "NA", + "arrt_index": 2, + }, + + "fan3": { + "key": "FAN3", + "parent": "fan", + "arrt_index": 3, + }, + "fan3_hw_version": { + "key": "Hardware Version", + "parent": "fan3", + "extra": { + "funcname": "checkFan", + "id": "fan3", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan3_fw_version": { + "key": "Firmware Version", + "parent": "fan3", + "config": "NA", + "arrt_index": 2, + }, + + "fan4": { + "key": "FAN4", + "parent": "fan", + "arrt_index": 4, + }, + "fan4_hw_version": { + "key": "Hardware Version", + "parent": "fan4", + "extra": { + "funcname": "checkFan", + "id": "fan4", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan4_fw_version": { + "key": "Firmware Version", + "parent": "fan4", + "config": "NA", + "arrt_index": 2, + }, + + "fan5": { + "key": "FAN5", + "parent": "fan", + "arrt_index": 5, + }, + "fan5_hw_version": { + "key": "Hardware Version", + "parent": "fan5", + "extra": { + "funcname": "checkFan", + "id": "fan5", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan5_fw_version": { + "key": "Firmware Version", + "parent": "fan5", + "config": "NA", + "arrt_index": 2, + }, + + "fan6": { + "key": "FAN6", + "parent": "fan", + "arrt_index": 6, + }, + "fan6_hw_version": { + "key": "Hardware Version", + "parent": "fan6", + "extra": { + "funcname": "checkFan", + "id": "fan6", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan6_fw_version": { + "key": "Firmware Version", + "parent": "fan6", + "config": "NA", + "arrt_index": 2, + }, + + "fan7": { + "key": "FAN7", + "parent": "fan", + "arrt_index": 7, + }, + "fan7_hw_version": { + "key": "Hardware Version", + "parent": "fan7", + "extra": { + "funcname": "checkFan", + "id": "fan7", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan7_fw_version": { + "key": "Firmware Version", + "parent": "fan7", + "config": "NA", + "arrt_index": 2, + }, + + "fan8": { + "key": "FAN8", + "parent": "fan", + "arrt_index": 8, + }, + "fan8_hw_version": { + "key": "Hardware Version", + "parent": "fan8", + "extra": { + "funcname": "checkFan", + "id": "fan8", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan8_fw_version": { + "key": "Firmware Version", + "parent": "fan8", + "config": "NA", + "arrt_index": 2, + }, + + + "i210": { + "key": "NIC", + "next": "fpga" + }, + "i210_model": { + "parent": "i210", + "config": "NA", + "key": "Device Model", + "arrt_index": 1, + }, + "i210_vendor": { + "parent": "i210", + "config": "INTEL", + "key": "Vendor", + "arrt_index": 2, + }, + "i210_version": { + "parent": "i210", + "cmd": "ethtool -i eno1", + "pattern": r"firmware-version", + "separator": ":", + "key": "Firmware Version", + "arrt_index": 3, + }, + + "fpga": { + "key": "FPGA", + }, + + "fpga1": { + "key": "FPGA1", + "parent": "fpga", + "arrt_index": 1, + }, + "fpga1_model": { + "parent": "fpga1", + "config": "XC7A50T-2FGG484C", + "key": "Device Model", + "arrt_index": 1, + }, + "fpga1_vender": { + "parent": "fpga1", + "config": "XILINX", + "key": "Vendor", + "arrt_index": 2, + }, + "fpga1_desc": { + "key": "Description", + "parent": "fpga1", + "config": "IOB FPGA", + "arrt_index": 3, + }, + "fpga1_fw_version": { + "parent": "fpga1", + "devfile": { + "loc": "/dev/fpga0", + "offset": 0, + "len": 4, + "bit_width": 4 + }, + "key": "Firmware Version", + "arrt_index": 4, + }, + "fpga1_date": { + "parent": "fpga1", + "devfile": { + "loc": "/dev/fpga0", + "offset": 4, + "len": 4, + "bit_width": 4 + }, + "key": "Build Date", + "arrt_index": 5, + }, + "fpga1_boot": { + "parent": "fpga1", + "key": "Boot From", + "devfile": { + "loc": "/dev/fpga0", + "offset":0x00, + "len":1, + "bit_width":1 + }, + "decode": { + "00": "Golden", + "default": "Main" + }, + "arrt_index": 6, + }, + "fpga2": { + "key": "FPGA2", + "parent": "fpga", + "arrt_index": 2, + }, + "fpga2_model": { + "parent": "fpga2", + "config": "XC7A50T-2FGG484C", + "key": "Device Model", + "arrt_index": 1, + }, + "fpga2_vender": { + "parent": "fpga2", + "config": "XILINX", + "key": "Vendor", + "arrt_index": 2, + }, + "fpga2_desc": { + "key": "Description", + "parent": "fpga2", + "config": "DOM FPGA", + "arrt_index": 3, + }, + "fpga2_fw_version": { + "parent": "fpga2", + "devfile": { + "loc": "/dev/fpga1", + "offset": 0, + "len": 4, + "bit_width": 4 + }, + "key": "Firmware Version", + "arrt_index": 4, + }, + "fpga2_date": { + "parent": "fpga2", + "devfile": { + "loc": "/dev/fpga1", + "offset": 4, + "len": 4, + "bit_width": 4 + }, + "key": "Build Date", + "arrt_index": 5, + }, + "fpga2_boot": { + "parent": "fpga2", + "key": "Boot From", + "devfile": { + "loc": "/dev/fpga1", + "offset":0x00, + "len":1, + "bit_width":1 + }, + "decode": { + "00": "Golden", + "default": "Main" + }, + "arrt_index": 6, + }, +} + +PMON_SYSLOG_STATUS = { + "polling_time": 3, + "fans": { + "present": {"path": ["/sys/s3ip/fan/*/present"], "ABSENT": 0}, + "status": [ + {"path": "/sys/s3ip/fan/%s/motor1/status", 'okval': 1}, + {"path": "/sys/s3ip/fan/%s/motor2/status", 'okval': 1}, + ], + "nochangedmsgflag": 1, + "nochangedmsgtime": 60, + "noprintfirsttimeflag": 0, + "alias": { + "fan1": "FAN1", + "fan2": "FAN2", + "fan3": "FAN3", + "fan4": "FAN4", + "fan5": "FAN5", + "fan6": "FAN6", + "fan7": "FAN7", + "fan8": "FAN8" + } + }, + "psus": { + "present": {"path": ["/sys/s3ip/psu/*/present"], "ABSENT": 0}, + "status": [ + {"path": "/sys/s3ip/psu/%s/out_status", "okval": 1}, + {"path": "/sys/s3ip/psu/%s/alarm", "okval": 0}, + ], + "nochangedmsgflag": 1, + "nochangedmsgtime": 60, + "noprintfirsttimeflag": 0, + "alias": { + "psu1": "PSU1", + "psu2": "PSU2" + } + } +} + +##################### MAC Voltage adjust#################################### +MAC_DEFAULT_PARAM = [ + { + "name": "mac_core", # AVS name + "type": 0, # 1: used default value, if rov value not in range. 0: do nothing, if rov value not in range + "rov_source": 0, # 0: get rov value from cpld, 1: get rov value from SDK + "cpld_avs": {"bus": 20, "loc": 0x1e, "offset": 0x20, "gettype": "i2c"}, + "set_avs": { + "loc": "/sys/bus/i2c/devices/64-0040/hwmon/hwmon*/avs0_vout", + "gettype": "sysfs", "formula": "int((%f)*1000000)" + }, + "mac_avs_param": { + 0x92: 0.7471, + 0x90: 0.7600, + 0x8e: 0.7710, + 0x8c: 0.7839, + 0x8a: 0.7961, + 0x88: 0.8071, + 0x86: 0.8181, + 0x84: 0.8291, + 0x82: 0.8401 + } + } +] + +DRIVERLISTS = [ + {"name": "ice", "delay": 0, "removable": 0}, + {"name": "wb_i2c_i801", "delay": 1, "removable": 0}, + {"name": "i2c_dev", "delay": 0, "removable": 0}, + {"name": "wb_i2c_algo_bit", "delay": 0}, + {"name": "wb_i2c_gpio", "delay": 0}, + {"name": "i2c_mux", "delay": 0, "removable": 0}, + {"name": "wb_i2c_gpio_device gpio_sda=181 gpio_scl=180 gpio_chip_name=INTC3001:00 bus_num=1", "delay": 0}, + {"name": "platform_common dfd_my_type=0x40bd", "delay": 0}, + {"name": "wb_logic_dev_common", "delay":0}, + {"name": "wb_io_dev", "delay": 0}, + {"name": "wb_io_dev_device", "delay": 0}, + {"name": "wb_fpga_pcie", "delay": 0}, + {"name": "wb_pcie_dev", "delay": 0}, + {"name": "wb_pcie_dev_device", "delay": 0}, + {"name": "wb_i2c_dev", "delay": 0}, + {"name": "wb_i2c_ocores", "delay": 0}, + {"name": "wb_i2c_ocores_device", "delay": 0}, + {"name": "wb_i2c_mux_pca9641", "delay": 0}, + {"name": "wb_i2c_mux_pca954x", "delay": 0}, + {"name": "wb_i2c_mux_pca954x_device", "delay": 0}, + {"name": "wb_i2c_dev_device", "delay": 0}, + {"name": "wb_lm75", "delay": 0}, +# {"name": "wb_at24", "delay": 0}, + {"name": "optoe", "delay": 0}, + {"name": "wb_pmbus_core", "delay": 0}, + {"name": "wb_xdpe12284", "delay": 0}, + {"name": "wb_xdpe132g5c_pmbus", "delay": 0}, + {"name": "wb_csu550", "delay": 0}, + {"name": "wb_ina3221", "delay": 0}, + {"name": "wb_ucd9000", "delay": 0}, + {"name": "wb_xdpe132g5c", "delay": 0}, +# {"name": "firmware_driver_sysfs", "delay": 0}, + {"name": "s3ip_sysfs", "delay": 0}, + {"name": "wb_switch_driver", "delay": 0}, + {"name": "fan_device_driver", "delay": 0}, + {"name": "psu_device_driver", "delay": 0}, + {"name": "vol_sensor_device_driver", "delay": 0}, + {"name": "temp_sensor_device_driver", "delay": 0}, + {"name": "wb_spd", "delay": 0}, +] + +DEVICE = [ + # eeprom + {"name": "wb_24c02", "bus": 1, "loc": 0x56}, + {"name": "wb_24c02", "bus": 1, "loc": 0x57}, + {"name": "wb_24c02", "bus": 2, "loc": 0x51}, + {"name": "wb_24c02", "bus": 3, "loc": 0x51}, + # SCM + {"name": "wb_24c02", "bus": 32, "loc": 0x52}, + {"name": "wb_ina3221", "bus": 33, "loc": 0x40}, + {"name": "wb_ina3221", "bus": 33, "loc": 0x41}, + {"name": "wb_ina3221", "bus": 33, "loc": 0x42}, + {"name": "wb_tmp275", "bus": 34, "loc": 0x4c}, + {"name": "wb_tmp275", "bus": 35, "loc": 0x4d}, + # CPU + {"name": "wb_ucd90160", "bus": 5, "loc": 0x5f}, + {"name": "wb_xdpe12284", "bus": 5, "loc": 0x5e}, + {"name": "wb_xdpe12284", "bus": 5, "loc": 0x68}, + {"name": "wb_xdpe12284", "bus": 5, "loc": 0x6e}, + {"name": "wb_xdpe12284", "bus": 5, "loc": 0x70}, + # fanA + {"name": "wb_tmp275", "bus": 8, "loc": 0x48}, + {"name": "wb_tmp275", "bus": 8, "loc": 0x49}, + {"name": "wb_24c64", "bus": 40, "loc": 0x50}, + {"name": "wb_24c64", "bus": 41, "loc": 0x50}, + {"name": "wb_24c64", "bus": 42, "loc": 0x50}, + {"name": "wb_24c64", "bus": 43, "loc": 0x50}, + # fanB + {"name": "wb_tmp275", "bus": 9, "loc": 0x48}, + {"name": "wb_tmp275", "bus": 9, "loc": 0x49}, + {"name": "wb_24c64", "bus": 48, "loc": 0x50}, + {"name": "wb_24c64", "bus": 49, "loc": 0x50}, + {"name": "wb_24c64", "bus": 50, "loc": 0x50}, + {"name": "wb_24c64", "bus": 51, "loc": 0x50}, + # psu + {"name": "wb_24c02", "bus": 10, "loc": 0x50}, + {"name": "wb_fsp1200", "bus": 10, "loc": 0x58}, + {"name": "wb_24c02", "bus": 11, "loc": 0x50}, + {"name": "wb_fsp1200", "bus": 11, "loc": 0x58}, + # MCB + {"name": "wb_ina3221", "bus": 12, "loc": 0x40}, + {"name": "wb_ina3221", "bus": 12, "loc": 0x41}, + {"name": "wb_24c02", "bus": 12, "loc": 0x57}, + # SMB + {"name": "wb_tmp275", "bus": 14, "loc": 0x48}, + {"name": "wb_tmp275", "bus": 14, "loc": 0x49}, + {"name": "wb_tmp275", "bus": 14, "loc": 0x4b}, + {"name": "wb_ina3221", "bus": 56, "loc": 0x40}, + {"name": "wb_ina3221", "bus": 56, "loc": 0x41}, + {"name": "wb_ina3221", "bus": 57, "loc": 0x40}, + {"name": "wb_ina3221", "bus": 58, "loc": 0x40}, + {"name": "wb_ina3221", "bus": 59, "loc": 0x40}, + {"name": "wb_ina3221", "bus": 60, "loc": 0x40}, + {"name": "wb_ina3221", "bus": 61, "loc": 0x40}, + {"name": "wb_ina3221", "bus": 62, "loc": 0x40}, + {"name": "wb_ina3221", "bus": 63, "loc": 0x40}, + {"name": "wb_xdpe132g5c_pmbus", "bus": 64, "loc": 0x40}, + {"name": "wb_xdpe132g5c_pmbus", "bus": 65, "loc": 0x40}, + {"name": "wb_xdpe132g5c_pmbus", "bus": 66, "loc": 0x40}, + {"name": "wb_xdpe132g5c_pmbus", "bus": 69, "loc": 0x40}, + {"name": "wb_xdpe12284", "bus": 70, "loc": 0x68}, + {"name": "wb_xdpe12284", "bus": 71, "loc": 0x68}, + # fan DCDC + {"name": "wb_ina3221", "bus": 88, "loc": 0x42}, + {"name": "wb_ina3221", "bus": 89, "loc": 0x42}, + {"name": "wb_ina3221", "bus": 90, "loc": 0x42}, + # xdpe132g5c i2c + {"name": "wb_xdpe132g5c", "bus": 64, "loc": 0x10}, + {"name": "wb_xdpe132g5c", "bus": 65, "loc": 0x10}, + {"name": "wb_xdpe132g5c", "bus": 66, "loc": 0x10}, + {"name": "wb_xdpe132g5c", "bus": 69, "loc": 0x10}, +] + +OPTOE = [ +# {"name": "wb_24c02", "startbus": 24, "endbus": 31}, + {"name": "optoe3", "startbus": 24, "endbus": 31}, +] + +REBOOT_CTRL_PARAM = {} + +INIT_PARAM_PRE = [ + # set ina3221 shunt_resistor + # SCM_VDD12.0_C + {"loc": "33-0041/hwmon/hwmon*/shunt1_resistor", "value": "1000"}, + # SCM_OCM_V12.0_C + {"loc": "33-0041/hwmon/hwmon*/shunt3_resistor", "value": "1000"}, + # MAC_PLL1_VDD0.9_C + {"loc": "56-0040/hwmon/hwmon*/shunt1_resistor", "value": "2000"}, + # MAC_PLL0_VDD0.9_C + {"loc": "56-0040/hwmon/hwmon*/shunt2_resistor", "value": "2000"}, + # MAC_PLL2_VDD0.9_C + {"loc": "58-0040/hwmon/hwmon*/shunt1_resistor", "value": "2000"}, + # MAC_PLL3_VDD0.9_C + {"loc": "58-0040/hwmon/hwmon*/shunt3_resistor", "value": "2000"}, + # FAN1_VDD12_C + {"loc": "88-0042/hwmon/hwmon*/shunt1_resistor", "value": "1000"}, + # FAN2_VDD12_C + {"loc": "88-0042/hwmon/hwmon*/shunt2_resistor", "value": "1000"}, + # FAN3_VDD12_C + {"loc": "88-0042/hwmon/hwmon*/shunt3_resistor", "value": "1000"}, + # FAN4_VDD12_C + {"loc": "89-0042/hwmon/hwmon*/shunt1_resistor", "value": "1000"}, + # FAN5_VDD12_C + {"loc": "89-0042/hwmon/hwmon*/shunt2_resistor", "value": "1000"}, + # FAN6_VDD12_C + {"loc": "89-0042/hwmon/hwmon*/shunt3_resistor", "value": "1000"}, + # FAN7_VDD12_C + {"loc": "90-0042/hwmon/hwmon*/shunt1_resistor", "value": "1000"}, + # FAN8_VDD12_C + {"loc": "90-0042/hwmon/hwmon*/shunt2_resistor", "value": "1000"}, + # set avs threshold + # MAC_CORE_V + {"loc": "64-0040/hwmon/hwmon*/avs0_vout_min", "value": "630000"}, + {"loc": "64-0040/hwmon/hwmon*/avs0_vout_max", "value": "858000"}, + # MAC_ANALOG0 V0.9_V + {"loc": "65-0040/hwmon/hwmon*/avs0_vout_min", "value": "810000"}, + {"loc": "65-0040/hwmon/hwmon*/avs0_vout_max", "value": "990000"}, + # MAC_ANALOG0 V0.75_V + {"loc": "65-0040/hwmon/hwmon*/avs1_vout_min", "value": "675000"}, + {"loc": "65-0040/hwmon/hwmon*/avs1_vout_max", "value": "825000"}, + # MAC_ANALOG1 V0.9_V + {"loc": "66-0040/hwmon/hwmon*/avs0_vout_min", "value": "810000"}, + {"loc": "66-0040/hwmon/hwmon*/avs0_vout_max", "value": "990000"}, + # MAC_ANALOG1 V0.75_V + {"loc": "66-0040/hwmon/hwmon*/avs1_vout_min", "value": "675000"}, + {"loc": "66-0040/hwmon/hwmon*/avs1_vout_max", "value": "825000"}, + # OE_AVDD_0.75_V + {"loc": "69-0040/hwmon/hwmon*/avs0_vout_min", "value": "675000"}, + {"loc": "69-0040/hwmon/hwmon*/avs0_vout_max", "value": "825000"}, + # OE_AVDD_1.2_V + {"loc": "69-0040/hwmon/hwmon*/avs1_vout_min", "value": "1080000"}, + {"loc": "69-0040/hwmon/hwmon*/avs1_vout_max", "value": "1320000"}, + # OE_AVDD_TX_1.8_V + {"loc": "70-0068/hwmon/hwmon*/avs0_vout_min", "value": "1620000"}, + {"loc": "70-0068/hwmon/hwmon*/avs0_vout_max", "value": "1980000"}, + # OE_AVDD_RX_1.8_V + {"loc": "70-0068/hwmon/hwmon*/avs1_vout_min", "value": "1620000"}, + {"loc": "70-0068/hwmon/hwmon*/avs1_vout_max", "value": "1980000"}, + # RLML_VDD V3.3_V *1.5 + {"loc": "71-0068/hwmon/hwmon*/avs0_vout_min", "value": "1980000"}, + {"loc": "71-0068/hwmon/hwmon*/avs0_vout_max", "value": "2420000"}, + # RLMH_VDD V3.3_V *1.5 + {"loc": "71-0068/hwmon/hwmon*/avs1_vout_min", "value": "1980000"}, + {"loc": "71-0068/hwmon/hwmon*/avs1_vout_max", "value": "2420000"}, + # OCM_XDPE_VCCIN_V + {"loc": "5-0070/hwmon/hwmon*/avs0_vout_min", "value": "1350000"}, + {"loc": "5-0070/hwmon/hwmon*/avs0_vout_max", "value": "2200000"}, + # OCM_XDPE_P1V8_V + {"loc": "5-0070/hwmon/hwmon*/avs1_vout_min", "value": "1690000"}, + {"loc": "5-0070/hwmon/hwmon*/avs1_vout_max", "value": "1910000"}, + # OCM_XDPE_P1V05_V + {"loc": "5-006e/hwmon/hwmon*/avs0_vout_min", "value": "954000"}, + {"loc": "5-006e/hwmon/hwmon*/avs0_vout_max", "value": "1160000"}, + # OCM_XDPE_VNN_PCH_V + {"loc": "5-006e/hwmon/hwmon*/avs1_vout_min", "value": "540000"}, + {"loc": "5-006e/hwmon/hwmon*/avs1_vout_max", "value": "1320000"}, + # OCM_XDPE_VNN_NAC_V + {"loc": "5-0068/hwmon/hwmon*/avs0_vout_min", "value": "540000"}, + {"loc": "5-0068/hwmon/hwmon*/avs0_vout_max", "value": "1320000"}, + # OCM_XDPE_VCC_ANA_V + {"loc": "5-0068/hwmon/hwmon*/avs1_vout_min", "value": "900000"}, + {"loc": "5-0068/hwmon/hwmon*/avs1_vout_max", "value": "1100000"}, + # OCM_XDPE_P1V2_VDDQ_V + {"loc": "5-005e/hwmon/hwmon*/avs0_vout_min", "value": "1120000"}, + {"loc": "5-005e/hwmon/hwmon*/avs0_vout_max", "value": "1280000"}, +] + +INIT_PARAM = [] + +INIT_COMMAND_PRE = [] + +INIT_COMMAND = [ + # enable fan watchdog + {"path": "/dev/cpld5", "offset": 0x22, "value": [0x01], "gettype": "devfile"}, + {"path": "/dev/cpld6", "offset": 0x22, "value": [0x01], "gettype": "devfile"}, +] + +UPGRADE_SUMMARY = { + "devtype": 0x40bd, + + "slot0": { + "subtype": 0, + "SPI-LOGIC-DEV": { + "chain1":{ + "name":"IOB_FPGA", + "is_support_warm_upg":0, + "init_cmd": [ + # firmware upgrade set sysled blue/amber alternate flashing + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x50, "value": [0x01]} + ] + }, + "chain2":{ + "name":"DOM_FPGA", + "is_support_warm_upg":0, + "init_cmd": [ + # firmware upgrade set sysled blue/amber alternate flashing + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x50, "value": [0x01]} + ] + }, + "chain3":{ + "name":"SCM_CPLD", + "is_support_warm_upg":0, + "init_cmd": [ + # firmware upgrade set sysled blue/amber alternate flashing + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x50, "value": [0x01]} + ] + }, + "chain4":{ + "name":"MCB_CPLD", + "is_support_warm_upg":0, + "init_cmd": [ + # firmware upgrade set sysled blue/amber alternate flashing + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x50, "value": [0x01]} + ] + }, + "chain5":{ + "name":"SMB_CPLD", + "is_support_warm_upg":0, + "init_cmd": [ + # firmware upgrade set sysled blue/amber alternate flashing + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x50, "value": [0x01]} + ] + }, + "chain6":{ + "name":"FCB_B_CPLD", + "is_support_warm_upg":0, + "init_cmd": [ + # firmware upgrade set sysled blue/amber alternate flashing + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x50, "value": [0x01]} + ] + }, + "chain7":{ + "name":"FCB_T_CPLD", + "is_support_warm_upg":0, + "init_cmd": [ + # firmware upgrade set sysled blue/amber alternate flashing + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x50, "value": [0x01]} + ] + }, + "chain8":{ + "name":"MAC_PCIe", + "is_support_warm_upg":0, + "init_cmd": [ + # firmware upgrade set sysled blue/amber alternate flashing + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x50, "value": [0x01]} + ] + }, + }, + + "TEST": { + "fpga": [ + {"chain": 1, "file": "/etc/.upgrade_test/0x40bd/iob_fpga_test_header.bin", "display_name": "IOB_FPGA"}, + {"chain": 2, "file": "/etc/.upgrade_test/0x40bd/dom_fpga_test_header.bin", "display_name": "DOM_FPGA"}, + ], + "cpld": [ + {"chain": 3, "file": "/etc/.upgrade_test/0x40bd/scm_cpld_spi_test_header.bin", "display_name": "SCM_CPLD_SPI"}, + {"chain": 4, "file": "/etc/.upgrade_test/0x40bd/mcb_cpld_spi_test_header.bin", "display_name": "MCB_CPLD_SPI"}, + {"chain": 5, "file": "/etc/.upgrade_test/0x40bd/smb_cpld_spi_test_header.bin", "display_name": "SMB_CPLD_SPI"}, + {"chain": 6, "file": "/etc/.upgrade_test/0x40bd/fcb_b_cpld_spi_test_header.bin", "display_name": "FCB_B_CPLD_SPI"}, + {"chain": 7, "file": "/etc/.upgrade_test/0x40bd/fcb_t_cpld_spi_test_header.bin", "display_name": "FCB_T_CPLD_SPI"}, + #{"chain": 8, "file": "/etc/.upgrade_test/0x40bd/mac_pcie_spi_test_header.bin", "display_name": "MAC_PCIe"}, + ], + }, + }, + + "BMC": { + "name": "BMC", + "init_cmd": [ + # firmware upgrade set sysled blue/amber alternate flashing + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x50, "value": [0x01]} + ], + "finish_cmd": [], + }, +} + +PLATFORM_E2_CONF = { + "fan": [ + {"name": "fan1", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/40-0050/eeprom"}, + {"name": "fan2", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/48-0050/eeprom"}, + {"name": "fan3", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/41-0050/eeprom"}, + {"name": "fan4", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/49-0050/eeprom"}, + {"name": "fan5", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/42-0050/eeprom"}, + {"name": "fan6", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/50-0050/eeprom"}, + {"name": "fan7", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/43-0050/eeprom"}, + {"name": "fan8", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/51-0050/eeprom"}, + ], + "psu": [ + {"name": "psu1", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/11-0050/eeprom"}, + {"name": "psu2", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/10-0050/eeprom"}, + ], + "syseeprom": [ + {"name": "syseeprom", "e2_type": "onie_tlv", "e2_path": "/sys/bus/i2c/devices/1-0056/eeprom"}, + ], + "scm": [ + {"name": "scm", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/32-0052/eeprom"}, + ], + "smb": [ + {"name": "smb", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/3-0051/eeprom"}, + ], + "chassis": [ + {"name": "chassis", "e2_type": ["wedge_v5","fru"], "e2_path": "/sys/bus/i2c/devices/2-0051/eeprom"}, + ], +} + +PLATFORM_POWER_CONF = [ + { + "name": "Input power total", + "unit": "W", + "children": [ + { + "name": "PSU1 input", + "pre_check": { + "loc": "/sys/s3ip/psu/psu1/present", + "gettype": "sysfs", "mask": 0x01, "okval": 1, + "not_ok_msg": "ABSENT" + }, + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/11-0058/hwmon/hwmon*/power1_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)/1000000)" + }, + { + "name": "PSU2 input", + "pre_check": { + "loc": "/sys/s3ip/psu/psu2/present", + "gettype": "sysfs", "mask": 0x01, "okval": 1, + "not_ok_msg": "ABSENT" + }, + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/10-0058/hwmon/hwmon*/power1_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)/1000000)" + }, + ] + }, + { + "name": "Output power total", + "unit": "W", + "children": [ + { + "name": "PSU1 output", + "pre_check": { + "loc": "/sys/s3ip/psu/psu1/present", + "gettype": "sysfs", "mask": 0x01, "okval": 1, + "not_ok_msg": "ABSENT" + }, + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/11-0058/hwmon/hwmon*/power2_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)/1000000)" + }, + { + "name": "PSU2 output", + "pre_check": { + "loc": "/sys/s3ip/psu/psu2/present", + "gettype": "sysfs", "mask": 0x01, "okval": 1, + "not_ok_msg": "ABSENT" + }, + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/10-0058/hwmon/hwmon*/power2_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)/1000000)" + }, + ] + }, + { + "name": "MAC power consumption", + "unit": "W", + "children": [ + { + "name": "MAC_CORE", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/64-0040/hwmon/hwmon*/power3_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*2/1000000)" + }, + { + "name": "MAC_ANALOG0 V0.9", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/65-0040/hwmon/hwmon*/power3_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)/1000000)" + }, + { + "name": "MAC_ANALOG0 V0.75", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/65-0040/hwmon/hwmon*/power4_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)/1000000)" + }, + { + "name": "MAC_ANALOG1 V0.9", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/66-0040/hwmon/hwmon*/power3_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)/1000000)" + }, + { + "name": "MAC_ANALOG1 V0.75", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/66-0040/hwmon/hwmon*/power4_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)/1000000)" + }, + { + "name": "MAC_PLL0_VDD0.9", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/56-0040/hwmon/hwmon*/in2_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/56-0040/hwmon/hwmon*/curr2_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "MAC_PLL1_VDD0.9", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/56-0040/hwmon/hwmon*/in1_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/56-0040/hwmon/hwmon*/curr1_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "MAC_PLL2_VDD0.9", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/58-0040/hwmon/hwmon*/in1_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/58-0040/hwmon/hwmon*/curr1_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "MAC_PLL3_VDD0.9", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/58-0040/hwmon/hwmon*/in3_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/58-0040/hwmon/hwmon*/curr3_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "MAC_VDD_0.8", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/58-0040/hwmon/hwmon*/in2_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/58-0040/hwmon/hwmon*/curr2_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "MAC_VDD_1.8", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/60-0040/hwmon/hwmon*/in1_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/60-0040/hwmon/hwmon*/curr1_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "MAC_VDD_1.5", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/60-0040/hwmon/hwmon*/in2_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/60-0040/hwmon/hwmon*/curr2_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "MAC_VDD_1.2", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/61-0040/hwmon/hwmon*/in1_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/61-0040/hwmon/hwmon*/curr1_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + } + ] + }, + + + { + "name": "CPO OE power consumption", + "unit": "W", + "children": [ + { + "name": "OE_AVDD_0.75", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/69-0040/hwmon/hwmon*/power3_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)/1000000)" + }, + { + "name": "OE_AVDD_1.2", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/69-0040/hwmon/hwmon*/power4_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)/1000000)" + }, + { + "name": "OE_AVDD_TX_1.8", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/70-0068/hwmon/hwmon*/power3_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)/1000000)" + }, + { + "name": "OE_AVDD_RX_1.8", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/70-0068/hwmon/hwmon*/power4_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)/1000000)" + }, + { + "name": "OE_HCSL_PLL_VDD0_0.75", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/56-0040/hwmon/hwmon*/in3_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/56-0040/hwmon/hwmon*/curr3_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "OE_HCSL_PLL_VDD1_0.75", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/57-0040/hwmon/hwmon*/in2_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/57-0040/hwmon/hwmon*/curr2_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "OE_AVDD_3.3", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/59-0040/hwmon/hwmon*/in1_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/59-0040/hwmon/hwmon*/curr1_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "OE_VDD_HCSL_PLL_1.8", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/59-0040/hwmon/hwmon*/in2_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/59-0040/hwmon/hwmon*/curr2_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "OE_VDD_1.8", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/60-0040/hwmon/hwmon*/in3_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/60-0040/hwmon/hwmon*/curr3_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + ] + }, + + { + "name": "RLM power consumption", + "unit": "W", + "children": [ + { + "name": "RLML_VDD V3.3", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/71-0068/hwmon/hwmon*/power3_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*1.5/1000000)" + }, + { + "name": "RLMH_VDD V3.3", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/71-0068/hwmon/hwmon*/power4_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*1.5/1000000)" + }, + ] + }, + { + "name": "CPU sub-module power consumption", + "unit": "W", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/33-0041/hwmon/hwmon*/in3_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/33-0041/hwmon/hwmon*/curr3_input", + "int_decode": 10, + } + ], + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "FAN power consumption total", + "unit": "W", + "children": [ + { + "name": "FAN1 power consumption", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/88-0042/hwmon/hwmon*/in1_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/88-0042/hwmon/hwmon*/curr1_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "FAN2 power consumption", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/89-0042/hwmon/hwmon*/in2_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/89-0042/hwmon/hwmon*/curr2_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "FAN3 power consumption", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/88-0042/hwmon/hwmon*/in2_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/88-0042/hwmon/hwmon*/curr2_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "FAN4 power consumption", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/89-0042/hwmon/hwmon*/in3_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/89-0042/hwmon/hwmon*/curr3_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "FAN5 power consumption", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/88-0042/hwmon/hwmon*/in3_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/88-0042/hwmon/hwmon*/curr3_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "FAN6 power consumption", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/90-0042/hwmon/hwmon*/in1_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/90-0042/hwmon/hwmon*/curr1_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "FAN7 power consumption", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/89-0042/hwmon/hwmon*/in1_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/89-0042/hwmon/hwmon*/curr1_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + { + "name": "FAN8 power consumption", + "val_conf": [ + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/90-0042/hwmon/hwmon*/in2_input", + "int_decode": 10, + }, + { + "gettype": "sysfs", + "loc": "/sys/bus/i2c/devices/90-0042/hwmon/hwmon*/curr2_input", + "int_decode": 10, + } + ], + "unit": "W", + "format": "float(float(%s)*float(%s)/1000000)" + }, + + ] + }, +] + +REBOOT_CAUSE_PARA = { + "reboot_cause_list": [ + { + "name": "otp_switch_reboot", + "monitor_point": {"gettype": "file_exist", "judge_file": "/etc/.otp_switch_reboot_flag", "okval": True}, + "record": [ + {"record_type": "file", "mode": "cover", "log": "Thermal Overload: ASIC, ", + "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"}, + {"record_type": "file", "mode": "add", "log": "Thermal Overload: ASIC, ", + "path": "/etc/sonic/.reboot/.history-reboot-cause.txt", "file_max_size": 1 * 1024 * 1024} + ], + "finish_operation": [ + {"gettype": "cmd", "cmd": "rm -rf /etc/.otp_switch_reboot_flag"}, + ] + }, + { + "name": "otp_other_reboot", + "monitor_point": {"gettype": "file_exist", "judge_file": "/etc/.otp_other_reboot_flag", "okval": True}, + "record": [ + {"record_type": "file", "mode": "cover", "log": "Thermal Overload: Other, ", + "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"}, + {"record_type": "file", "mode": "add", "log": "Thermal Overload: Other, ", + "path": "/etc/sonic/.reboot/.history-reboot-cause.txt", "file_max_size": 1 * 1024 * 1024} + ], + "finish_operation": [ + {"gettype": "cmd", "cmd": "rm -rf /etc/.otp_other_reboot_flag"}, + ] + }, + ], + "other_reboot_cause_record": [ + {"record_type": "file", "mode": "cover", "log": "Other, ", "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"}, + {"record_type": "file", "mode": "add", "log": "Other, ", "path": "/etc/sonic/.reboot/.history-reboot-cause.txt"} + ], +} + +SET_FW_MAC_CONF = [ + { + "name": "eth0", + "e2_name": "syseeprom", + "get_act_mac": {"cmd": "ethtool -e eth0 offset 0 length 6 |grep 0x0000 | awk -F':' '{gsub(/ /, \":\", $2);print $2}'| sed 's/^[[:space:]]*//' | sed 's/:\s*$//'", "gettype": "cmd_str"}, + "set_mac_cfg": { + "type": 1, + "cmd": {"cmd": "ethtool -E eth0 magic 0x15338086 offset %s value 0x%s length 1", "gettype": "cmd", "delay": 0.1}, + }, + "check_mac_cfg": {"cmd": "ethtool -e eth0 offset 0 length 6 |grep 0x0000 | awk -F':' '{gsub(/ /, \":\", $2);print $2}'| sed 's/^[[:space:]]*//' | sed 's/:\s*$//'", "gettype": "cmd_str"}, + } +] + +SET_MAC_CONF = SET_FW_MAC_CONF +PRODUCT_NAME_CONF = {} diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/config/x86_64_micas_m2_w6940_128x1_fr4_r0_port_config.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/config/x86_64_micas_m2_w6940_128x1_fr4_r0_port_config.py new file mode 100755 index 00000000000..99f69812df2 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/config/x86_64_micas_m2_w6940_128x1_fr4_r0_port_config.py @@ -0,0 +1,136 @@ +#!/usr/bin/python3 +# -*- coding: UTF-8 -*- + +PLATFORM_INTF_OPTOE = { + "port_num": 128, + "port_bus_map": { + 1 :24, + 2 :24, + 3 :24, + 4 :24, + 5 :24, + 6 :24, + 7 :24, + 8 :24, + 9 :24, + 10 :24, + 11 :24, + 12 :24, + 13 :24, + 14 :24, + 15 :24, + 16 :24, + 17 :25, + 18 :25, + 19 :25, + 20 :25, + 21 :25, + 22 :25, + 23 :25, + 24 :25, + 25 :25, + 26 :25, + 27 :25, + 28 :25, + 29 :25, + 30 :25, + 31 :25, + 32 :25, + 33 :26, + 34 :26, + 35 :26, + 36 :26, + 37 :26, + 38 :26, + 39 :26, + 40 :26, + 41 :26, + 42 :26, + 43 :26, + 44 :26, + 45 :26, + 46 :26, + 47 :26, + 48 :26, + 49 :27, + 50 :27, + 51 :27, + 52 :27, + 53 :27, + 54 :27, + 55 :27, + 56 :27, + 57 :27, + 58 :27, + 59 :27, + 60 :27, + 61 :27, + 62 :27, + 63 :27, + 64 :27, + 65 :28, + 66 :28, + 67 :28, + 68 :28, + 69 :28, + 70 :28, + 71 :28, + 72 :28, + 73 :28, + 74 :28, + 75 :28, + 76 :28, + 77 :28, + 78 :28, + 79 :28, + 80 :28, + 81 :29, + 82 :29, + 83 :29, + 84 :29, + 85 :29, + 86 :29, + 87 :29, + 88 :29, + 89 :29, + 90 :29, + 91 :29, + 92 :29, + 93 :29, + 94 :29, + 95 :29, + 96 :29, + 97 :30, + 98 :30, + 99 :30, + 100:30, + 101:30, + 102:30, + 103:30, + 104:30, + 105:30, + 106:30, + 107:30, + 108:30, + 109:30, + 110:30, + 111:30, + 112:30, + 113:31, + 114:31, + 115:31, + 116:31, + 117:31, + 118:31, + 119:31, + 120:31, + 121:31, + 122:31, + 123:31, + 124:31, + 125:31, + 126:31, + 127:31, + 128:31, + } +} diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/cpo/Makefile b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/cpo/Makefile new file mode 100755 index 00000000000..42e24f6b71a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/cpo/Makefile @@ -0,0 +1,16 @@ +PWD = $(shell pwd) +SUB_BUILD_DIR = $(PWD)/../build + +INSTALL_SCRIPT_DIR = $(SUB_BUILD_DIR)/usr/local/bin +INSTALL_LIB_DIR = $(SUB_BUILD_DIR)/usr/lib/python3/dist-packages +INSTALL_SERVICE_DIR = $(SUB_BUILD_DIR)/lib/systemd/system + +all: + @if [ ! -d ${INSTALL_SERVICE_DIR} ]; then mkdir -p ${INSTALL_SERVICE_DIR} ;fi + @if [ ! -d ${INSTALL_SCRIPT_DIR} ]; then mkdir -p ${INSTALL_SCRIPT_DIR} ;fi + @if [ ! -d ${INSTALL_LIB_DIR} ]; then mkdir -p ${INSTALL_LIB_DIR} ;fi + cp -r $(PWD)/service/* $(INSTALL_SERVICE_DIR) + cp -r $(PWD)/script/* $(INSTALL_SCRIPT_DIR) + cp -r $(PWD)/lib/* $(INSTALL_LIB_DIR) + cp -r $(PWD)/config/* $(INSTALL_SCRIPT_DIR) + @if [ -d ${INSTALL_SCRIPT_DIR} ]; then chmod +x ${INSTALL_SCRIPT_DIR}/*;fi \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/cpo/config/cpo_platform_config.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/cpo/config/cpo_platform_config.py new file mode 100755 index 00000000000..89a61c8aff1 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/cpo/config/cpo_platform_config.py @@ -0,0 +1,680 @@ +#!/usr/bin/python3 +import re + +__all__ = [ + "CPO_PLATFORM_CONFIG", + "CPO_PLATFORM_PORT_CONFIG", + "CPO_PLATFORM_MEDIA_SETTINGS", + "OE_NUM", + "OE_BANK_NUM", + "OE_RLM_NUM", + "OE_INDEX_LIST", + "RLM_INDEX_LIST", + "OE_BUS_MAP", + "OE_I2C_PATH_MAP", + "helper_logger", + "Port_Mapping", + "PORT_INDEX_LIST", + "BANK_LANE_NUM" +] + +debug_level = 1 + +CPO_PLATFORM_CONFIG = { + "oe_num": 8, + "oe_index_start_index": 0, + "port_index_start_index": 1, + "rlm_index_start_index": 0, + "oe_bank_num": 8, + "oe_rlm_num": 2, + "oe_index_list": list(range(0, 8)), + "rlm_index_list": list(range(0, 16)), + "oe_i2c_path_format": "/sys/bus/i2c/devices/{}-0050/eeprom", + "rlm_presence_fpga_dict": { + "/dev/fpga1": { + "offset": { + "0x64": [None]*8 + list(range(8)) + [None]*8 + list(range(8,16)) + } + } + }, + "oe_bus_map": { + 0: 24, + 1: 25, + 2: 26, + 3: 27, + 4: 28, + 5: 29, + 6: 30, + 7: 31 + }, + "rlm_oe_map": { + 0:0, 1:0, + 2:1, 3:1, + 4:2, 5:2, + 6:3, 7:3, + 8:4, 9:4, + 10:5, 11:5, + 12:6, 13:6, + 14:7, 15:7 + }, + "bank_oe_map": { + 0:0, 1:0, 2:0, 3:0, 4:0, 5:0, 6:0, 7:0, + 8:1, 9:1, 10:1, 11:1, 12:1, 13:1, 14:1, 15:1, + 16:2, 17:2, 18:2, 19:2, 20:2, 21:2, 22:2, 23:2, + 24:3, 25:3, 26:3, 27:3, 28:3, 29:3, 30:3, 31:3, + 32:4, 33:4, 34:4, 35:4, 36:4, 37:4, 38:4, 39:4, + 40:5, 41:5, 42:5, 43:5, 44:5, 45:5, 46:5, 47:5, + 48:6, 49:6, 50:6, 51:6, 52:6, 53:6, 54:6, 55:6, + 56:7, 57:7, 58:7, 59:7, 60:7, 61:7, 62:7, 63:7 + }, + "port_bank_map": { + 1:0, 3:1, 2:0, 4:1, 5:2, 7:3, 6:2, 8:3, 9:4, 10:4, 11:5, 12:5, 13:6, 14:6, 15:7, 16:7, + 17:8, 18:8, 19:9, 20:9, 21:10, 22:10, 23:11, 24:11, 25:12, 26:12, 27:13, 28:13, 29:14, 30:14, 31:15, 32:15, + 33:16, 34:16, 35:17, 36:17, 37:18, 38:18, 39:19, 40:19, 41:20, 42:20, 43:21, 44:21, 45:22, 46:22, 47:23, 48:23, + 49:24, 50:24, 51:25, 52:25, 53:26, 54:26, 55:27, 56:27, 57:28, 59:29, 58:28, 60:29, 61:30, 63:31, 62:30, 64:31, + 65:32, 67:33, 66:32, 68:33, 69:34, 71:35, 70:34, 72:35, 73:36, 74:36, 75:37, 76:37, 77:38, 78:38, 79:39, 80:39, + 81:40, 82:40, 83:41, 84:41, 85:42, 86:42, 87:43, 88:43, 89:44, 90:44, 91:45, 92:45, 93:46, 94:46, 95:47, 96:47, + 97:48, 98:48, 99:49, 100:49, 101:50, 102:50, 103:51, 104:51, 105:52, 106:52, 107:53, 108:53, 109:54, 110:54, 111:55, 112:55, + 113:56, 114:56, 115:57, 116:57, 117:58, 118:58, 119:59, 120:59, 121:60, 123:61, 122:60, 124:61, 125:62, 127:63, 126:62, 128:63 + }, + "port_lanemap": { + 1:0xf, 3:0xf, 2:0xf0, 4:0xf0, 5:0xf, 7:0xf, 6:0xf0, 8:0xf0, 9:0xf, 10:0xf0, 11:0xf, 12:0xf0, 13:0xf, 14:0xf0, 15:0xf, 16:0xf0, + 17:0xf, 18:0xf0, 19:0xf, 20:0xf0, 21:0xf, 22:0xf0, 23:0xf, 24:0xf0, 25:0xf, 26:0xf0, 27:0xf, 28:0xf0, 29:0xf, 30:0xf0, 31:0xf, 32:0xf0, + 33:0xf, 34:0xf0, 35:0xf, 36:0xf0, 37:0xf, 38:0xf0, 39:0xf, 40:0xf0, 41:0xf, 42:0xf0, 43:0xf, 44:0xf0, 45:0xf, 46:0xf0, 47:0xf, 48:0xf0, + 49:0xf, 50:0xf0, 51:0xf, 52:0xf0, 53:0xf, 54:0xf0, 55:0xf, 56:0xf0, 57:0xf, 59:0xf, 58:0xf0, 60:0xf0, 61:0xf, 63:0xf, 62:0xf0, 64:0xf0, + 65:0xf, 67:0xf, 66:0xf0, 68:0xf0, 69:0xf, 71:0xf, 70:0xf0, 72:0xf0, 73:0xf, 74:0xf0, 75:0xf, 76:0xf0, 77:0xf, 78:0xf0, 79:0xf, 80:0xf0, + 81:0xf, 82:0xf0, 83:0xf, 84:0xf0, 85:0xf, 86:0xf0, 87:0xf, 88:0xf0, 89:0xf, 90:0xf0, 91:0xf, 92:0xf0, 93:0xf, 94:0xf0, 95:0xf, 96:0xf0, + 97:0xf, 98:0xf0, 99:0xf, 100:0xf0, 101:0xf, 102:0xf0, 103:0xf, 104:0xf0, 105:0xf, 106:0xf0, 107:0xf, 108:0xf0, 109:0xf, 110:0xf0, 111:0xf, 112:0xf0, + 113:0xf, 114:0xf0, 115:0xf, 116:0xf0, 117:0xf, 118:0xf0, 119:0xf, 120:0xf0, 121:0xf, 123:0xf, 122:0xf0, 124:0xf0, 125:0xf, 127:0xf, 126:0xf0, 128:0xf0 + }, + "port_rlm_map": { + 1:0, 3:0, 2:0, 4:0, 5:0, 7:0, 6:0, 8:0, 9:1, 10:1, 11:1, 12:1, 13:1, 14:1, 15:1, 16:1, + 17:2, 18:2, 19:2, 20:2, 21:2, 22:2, 23:2, 24:2, 25:3, 26:3, 27:3, 28:3, 29:3, 30:3, 31:3, 32:3, + 33:4, 34:4, 35:4, 36:4, 37:4, 38:4, 39:4, 40:4, 41:5, 42:5, 43:5, 44:5, 45:5, 46:5, 47:5, 48:5, + 49:6, 50:6, 51:6, 52:6, 53:6, 54:6, 55:6, 56:6, 57:7, 59:7, 58:7, 60:7, 61:7, 63:7, 62:7, 64:7, + 65:8, 67:8, 66:8, 68:8, 69:8, 71:8, 70:8, 72:8, 73:9, 74:9, 75:9, 76:9, 77:9, 78:9, 79:9, 80:9, + 81:10, 82:10, 83:10, 84:10, 85:10, 86:10, 87:10, 88:10, 89:11, 90:11, 91:11, 92:11, 93:11, 94:11, 95:11, 96:11, + 97:12, 98:12, 99:12, 100:12, 101:12, 102:12, 103:12, 104:12, 105:13, 106:13, 107:13, 108:13, 109:13, 110:13, 111:13, 112:13, + 113:14, 114:14, 115:14, 116:14, 117:14, 118:14, 119:14, 120:14, 121:15, 123:15, 122:15, 124:15, 125:15, 127:15, 126:15, 128:15 + }, + "port_sdk_map": { + 1:1, 2:2, 3:3, 4:4, 5:11, 6:12, 7:13, 8:14, 9:22, 10:23, 11:24, 12:25, 13:33, 14:34, 15:35, 16:36, + 17:44, 18:45, 19:46, 20:47, 21:55, 22:56, 23:57, 24:58, 25:66, 26:67, 27:68, 28:69, 29:77, 30:78, 31:79, 32:80, + 33:88, 34:89, 35:90, 36:91, 37:99, 38:100, 39:101, 40:102, 41:110, 42:111, 43:112, 44:113, 45:121, 46:122, 47:123, 48:124, + 49:132, 50:133, 51:134, 52:135, 53:143, 54:144, 55:145, 56:146, 57:154, 58:155, 59:156, 60:157, 61:165, 62:166, 63:167, 64:168, + 65:176, 66:177, 67:178, 68:179, 69:187, 70:188, 71:189, 72:190, 73:198, 74:199, 75:200, 76:201, 77:209, 78:210, 79:211, 80:212, + 81:220, 82:221, 83:222, 84:223, 85:231, 86:232, 87:233, 88:234, 89:242, 90:243, 91:244, 92:245, 93:253, 94:254, 95:255, 96:256, + 97:264, 98:265, 99:266, 100:267, 101:275, 102:276, 103:277, 104:278, 105:286, 106:287, 107:288, 108:289, 109:297, 110:298, 111:299, 112:300, + 113:308, 114:309, 115:310, 116:311, 117:319, 118:320, 119:321, 120:322, 121:330, 122:331, 123:332, 124:333, 125:341, 126:342, 127:343, 128:344 + }, + "port_bank_map_800G": { + 1:0, 2:1, 3:2, 4:3, 5:4, 6:5, 7:6, 8:7, 9:8, 10:9, 11:10, 12:11, 13:12, 14:13, 15:14, 16:15, + 17:16, 18:17, 19:18, 20:19, 21:20, 22:21, 23:22, 24:23, 25:24, 26:25, 27:26, 28:27, 29:28, 30:29, 31:30, 32:31, + 33:32, 34:33, 35:34, 36:35, 37:36, 38:37, 39:38, 40:39, 41:40, 42:41, 43:42, 44:43, 45:44, 46:45, 47:46, 48:47, + 49:48, 50:49, 51:50, 52:51, 53:52, 54:53, 55:54, 56:55, 57:56, 58:57, 59:58, 60:59, 61:60, 62:61, 63:62, 64:63 + }, + "port_lanemap_800G": { + 1:0xff, 3:0xff, 2:0xff, 4:0xff, 5:0xff, 7:0xff, 6:0xff, 8:0xff, 9:0xff, 10:0xff, 11:0xff, 12:0xff, 13:0xff, 14:0xff, 15:0xff, 16:0xff, + 17:0xff, 18:0xff, 19:0xff, 20:0xff, 21:0xff, 22:0xff, 23:0xff, 24:0xff, 25:0xff, 26:0xff, 27:0xff, 28:0xff, 29:0xff, 30:0xff, 31:0xff, 32:0xff, + 33:0xff, 34:0xff, 35:0xff, 36:0xff, 37:0xff, 38:0xff, 39:0xff, 40:0xff, 41:0xff, 42:0xff, 43:0xff, 44:0xff, 45:0xff, 46:0xff, 47:0xff, 48:0xff, + 49:0xff, 50:0xff, 51:0xff, 52:0xff, 53:0xff, 54:0xff, 55:0xff, 56:0xff, 57:0xff, 59:0xff, 58:0xff, 60:0xff, 61:0xff, 63:0xff, 62:0xff, 64:0xff + }, + "port_rlm_map_800G": { + 1:0, 3:0, 2:0, 4:0, 5:1, 7:1, 6:1, 8:1, 9:2, 10:2, 11:2, 12:2, 13:3, 14:3, 15:3, 16:3, + 17:4, 18:4, 19:4, 20:4, 21:5, 22:5, 23:5, 24:5, 25:6, 26:6, 27:6, 28:6, 29:7, 30:7, 31:7, 32:7, + 33:8, 34:8, 35:8, 36:8, 37:9, 38:9, 39:9, 40:9, 41:10, 42:10, 43:10, 44:10, 45:11, 46:11, 47:11, 48:11, + 49:12, 50:12, 51:12, 52:12, 53:13, 54:13, 55:13, 56:13, 57:14, 59:14, 58:14, 60:14, 61:15, 63:15, 62:15, 64:15 + }, + "port_sdk_map_800G": { + 1:1, 2:2, 3:11, 4:12, 5:22, 6:23, 7:33, 8:34, 9:44, 10:45, 11:55, 12:56, 13:66, 14:67, 15:77, 16:78, + 17:88, 18:89, 19:99, 20:100, 21:110, 22:111, 23:121, 24:122, 25:132, 26:133, 27:143, 28:144, 29:154, 30:155, 31:165, 32:166, + 33:176, 34:177, 35:187, 36:188, 37:198, 38:199, 39:209, 40:210, 41:220, 42:221, 43:231, 44:232, 45:242, 46:243, 47:253, 48:254, + 49:264, 50:265, 51:275, 52:276, 53:286, 54:287, 55:297, 56:298, 57:308, 58:309, 59:319, 60:320, 61:330, 62:331, 63:341, 64:342 + } +} +CPO_PLATFORM_PORT_CONFIG = { + "M2-W6940-64X1-FR4": { + "1-64": { + "admin": "down", + "speed": 800000, + "lane": 8 + } + }, + "M2-W6940-128X1-FR4": { + "1-128": { + "admin": "down", + "speed": 400000, + "lane": 4 + } + }, + "M2-W6940-128X1-FR4-200G": { + "1-128": { + "admin": "down", + "speed": 200000, + "lane": 4 + } + }, + "M2-W6940-128X1-FR4-100G": { + "1-128": { + "admin": "down", + "speed": 100000, + "lane": 4 + } + } +} +CPO_PLATFORM_MEDIA_SETTINGS = { + "GLOBAL_MEDIA_SETTINGS": { + "1-128": { + "Default": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "pre2": { + "lane0": "0x00000001", + "lane1": "0x00000001", + "lane2": "0x00000001", + "lane3": "0x00000001" + }, + "pre1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8" + }, + "main": { + "lane0": "0x00000050", + "lane1": "0x00000050", + "lane2": "0x00000050", + "lane3": "0x00000050" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc" + }, + "post2": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + }, + "800000-8lane": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + }, + "pre2": { + "lane0": "0x00000001", + "lane1": "0x00000001", + "lane2": "0x00000001", + "lane3": "0x00000001", + "lane4": "0x00000001", + "lane5": "0x00000001", + "lane6": "0x00000001", + "lane7": "0x00000001" + }, + "pre1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8", + "lane4": "0xfffffff8", + "lane5": "0xfffffff8", + "lane6": "0xfffffff8", + "lane7": "0xfffffff8" + }, + "main": { + "lane0": "0x00000050", + "lane1": "0x00000050", + "lane2": "0x00000050", + "lane3": "0x00000050", + "lane4": "0x00000050", + "lane5": "0x00000050", + "lane6": "0x00000050", + "lane7": "0x00000050" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc", + "lane4": "0xfffffffc", + "lane5": "0xfffffffc", + "lane6": "0xfffffffc", + "lane7": "0xfffffffc" + }, + "post2": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff", + "lane4": "0xffffffff", + "lane5": "0xffffffff", + "lane6": "0xffffffff", + "lane7": "0xffffffff" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000", + "lane4": "0x00000000", + "lane5": "0x00000000", + "lane6": "0x00000000", + "lane7": "0x00000000" + } + }, + "400000-4lane": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "pre2": { + "lane0": "0x00000001", + "lane1": "0x00000001", + "lane2": "0x00000001", + "lane3": "0x00000001" + }, + "pre1": { + "lane0": "0xfffffff8", + "lane1": "0xfffffff8", + "lane2": "0xfffffff8", + "lane3": "0xfffffff8" + }, + "main": { + "lane0": "0x00000050", + "lane1": "0x00000050", + "lane2": "0x00000050", + "lane3": "0x00000050" + }, + "post1": { + "lane0": "0xfffffffc", + "lane1": "0xfffffffc", + "lane2": "0xfffffffc", + "lane3": "0xfffffffc" + }, + "post2": { + "lane0": "0xffffffff", + "lane1": "0xffffffff", + "lane2": "0xffffffff", + "lane3": "0xffffffff" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + }, + "200000-4lane": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "pre1": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe" + }, + "main": { + "lane0": "0x0000004B", + "lane1": "0x0000004B", + "lane2": "0x0000004B", + "lane3": "0x0000004B" + }, + "post1": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + }, + "100000-4lane": { + "pre3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "pre2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "pre1": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe" + }, + "main": { + "lane0": "0x0000004B", + "lane1": "0x0000004B", + "lane2": "0x0000004B", + "lane3": "0x0000004B" + }, + "post1": { + "lane0": "0xfffffffe", + "lane1": "0xfffffffe", + "lane2": "0xfffffffe", + "lane3": "0xfffffffe" + }, + "post2": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + }, + "post3": { + "lane0": "0x00000000", + "lane1": "0x00000000", + "lane2": "0x00000000", + "lane3": "0x00000000" + } + } + } + } +} + +default_sku_path="/usr/share/sonic/device/x86_64-micas_m2-w6940-128x1-fr4-r0/default_sku" +with open(default_sku_path, 'r', encoding='utf-8') as file: + sku_content = file.read().strip() + sku_match = re.search(r"M2-W6940-\d+X1-FR4", sku_content) + if sku_match: + default_sku = sku_match.group(0) + else: + default_sku = "M2-W6940-128X1-FR4" + +OE_NUM = CPO_PLATFORM_CONFIG.get("oe_num", 0) +OE_BANK_NUM = CPO_PLATFORM_CONFIG.get("oe_bank_num", 0) +OE_RLM_NUM = CPO_PLATFORM_CONFIG.get("oe_rlm_num", 0) +OE_INDEX_LIST = CPO_PLATFORM_CONFIG.get("oe_index_list", []) +RLM_INDEX_LIST = CPO_PLATFORM_CONFIG.get("rlm_index_list", []) +OE_BUS_MAP = CPO_PLATFORM_CONFIG.get("oe_bus_map", {}) +OE_I2C_PATH_FORMAT = CPO_PLATFORM_CONFIG.get("oe_i2c_path_format", "{}") +OE_I2C_PATH_MAP = dict.fromkeys(OE_INDEX_LIST) + +if default_sku == "M2-W6940-64X1-FR4": + PORT_INDEX_LIST = list(CPO_PLATFORM_CONFIG.get("port_bank_map_800G").keys()) +else: + PORT_INDEX_LIST = list(CPO_PLATFORM_CONFIG.get("port_bank_map").keys()) + +PORT_INDEX_LIST.sort() +BANK_LANE_NUM = 8 +for key in OE_I2C_PATH_MAP.keys(): + OE_I2C_PATH_MAP[key] = OE_I2C_PATH_FORMAT.format(OE_BUS_MAP[key]) + +import logging +from logging.handlers import RotatingFileHandler +logging.basicConfig(level=logging.DEBUG) +handler = RotatingFileHandler('/var/log/cpo_daemon_process.log', maxBytes=1024*1024*10, backupCount=5) +handler.setLevel(logging.DEBUG) +formatter = logging.Formatter('%(asctime)s - %(levelname)s - %(message)s') +handler.setFormatter(formatter) +logging.getLogger('').addHandler(handler) + +class helper_logger(): + def __init__(self) -> None: + pass + + @staticmethod + def log_error(message): + global debug_level + if (debug_level <= 5): + logging.error(message) + @staticmethod + def log_warn(message): + global debug_level + if (debug_level <= 4): + logging.warning(message) + @staticmethod + def log_notice(message): + global debug_level + if (debug_level <= 3): + logging.info(message) + @staticmethod + def log_info(message): + global debug_level + if (debug_level <= 2): + logging.info(message) + @staticmethod + def log_debug(message): + global debug_level + if (debug_level <= 1): + logging.debug(message) + @staticmethod + def log_trace(message): + global debug_level + if (debug_level <= 0): + logging.debug(message) + +def parse_port_range(input): + result = list() + if input.find(",") >= 0: + input_split = input.split(",") + for item in input_split: + result.extend(parse_port_range(item)) + elif input.find("-") >= 0: + input_split = input.split("-") + port_start = int(input_split[0]) + port_end = int(input_split[-1]) + 1 + result.extend(list(range(port_start, port_end))) + else: + result.append(int(input)) + return result + +def take_port_number(item): + # use first number + if isinstance(item, str): + return int(re.search("\d+", item).group()) + else: + return item + +class Port_Mapping(): + def __init__(self) -> None: + self.port_config_dict = dict() + def rlm_global_index_to_local_index(self, global_index): + oe_index = self.rlm_index_to_oe_index(global_index) + rlm_list = self.oe_index_to_rlm_index_list(oe_index) + return rlm_list.index(global_index) + def rlm_index_to_oe_index(self, rlm_index): + for _rlm_index, oe_index in CPO_PLATFORM_CONFIG.get("rlm_oe_map").items(): + if _rlm_index != rlm_index: + continue + return oe_index + def oe_index_to_rlm_index_list(self, oe_index): + rlm_list = list() + rlm_oe_map = CPO_PLATFORM_CONFIG.get("rlm_oe_map") + for rlm_index, _oe_index in rlm_oe_map.items(): + if _oe_index != oe_index: + continue + rlm_list.append(rlm_index) + return list(rlm_list) + def port_index_to_rlm_index(self, port_index): + if default_sku == "M2-W6940-64X1-FR4": + port_rlm_map = CPO_PLATFORM_CONFIG.get("port_rlm_map_800G") + else: + port_rlm_map = CPO_PLATFORM_CONFIG.get("port_rlm_map") + return port_rlm_map.get(port_index) + def bank_global_index_to_local_index(self, global_index): + oe_index = self.bank_index_to_oe_index(global_index) + bank_list = self.oe_index_to_bank_index_list(oe_index) + return bank_list.index(global_index) + def port_index_to_oe_index(self, port_index): + bank_index = self.port_index_to_bank_index(port_index) + return self.bank_index_to_oe_index(bank_index) + def port_index_to_bank_index(self, port_index): + if default_sku == "M2-W6940-64X1-FR4": + port_bank_map = CPO_PLATFORM_CONFIG.get("port_bank_map_800G") + else: + port_bank_map = CPO_PLATFORM_CONFIG.get("port_bank_map") + return port_bank_map.get(port_index) + def port_index_to_sdk_index(self, port_index): + if default_sku == "M2-W6940-64X1-FR4": + port_sdk_map = CPO_PLATFORM_CONFIG.get("port_sdk_map_800G") + else: + port_sdk_map = CPO_PLATFORM_CONFIG.get("port_sdk_map") + return port_sdk_map.get(port_index) + def oe_index_to_port_index_list(self, oe_index): + port_list = list() + bank_list = self.oe_index_to_bank_index_list(oe_index) + for bank_index in bank_list: + port_list.extend(self.bank_index_to_port_index_list(bank_index)) + return port_list + def bank_index_to_port_index_list(self, bank_index): + port_list = list() + if default_sku == "M2-W6940-64X1-FR4": + port_bank_map = CPO_PLATFORM_CONFIG.get("port_bank_map_800G") + else: + port_bank_map = CPO_PLATFORM_CONFIG.get("port_bank_map") + for port_index, _bank_index in port_bank_map.items(): + if _bank_index != bank_index: + continue + port_list.append(port_index) + return list(port_list) + def oe_index_to_bank_index_list(self, oe_index): + bank_list = list() + bank_oe_map = CPO_PLATFORM_CONFIG.get("bank_oe_map") + for bank_index, _oe_index in bank_oe_map.items(): + if _oe_index != oe_index: + continue + bank_list.append(bank_index) + return list(bank_list) + def bank_index_to_oe_index(self, bank_index): + bank_oe_map = CPO_PLATFORM_CONFIG.get("bank_oe_map") + return bank_oe_map.get(bank_index) + def port_config_init(self, hw_sku): + # for factest mode + port_config = CPO_PLATFORM_PORT_CONFIG.get(hw_sku, None) + if port_config == None: + return + for ports, values in port_config.items(): + port_index_list = parse_port_range(ports) + for port_index in port_index_list: + self.set_port(port_index, "Ethernet{}".format(port_index), values.get("speed", None), values.get("lane", None), values.get("admin", None)) + def get_port_lane_list(self, port_index): + if default_sku == "M2-W6940-64X1-FR4": + lanemap_dict = CPO_PLATFORM_CONFIG.get("port_lanemap_800G", None) + else: + lanemap_dict = CPO_PLATFORM_CONFIG.get("port_lanemap", None) + if lanemap_dict == None: + return [] + port_lanemap = lanemap_dict.get(port_index, None) + if port_lanemap == None: + return [] + lane_list = list() + for lane_index in range(8): + if 1<>> {}".format(physical_port, old_speed, speed)) + logical_port_dict["speed"] = speed + notify_media_setting = True + if lane and old_lane != lane: + helper_logger.log_debug("port_config update, port_index: {}, lane_change: {} --->>> {}".format(physical_port, old_lane, lane)) + logical_port_dict["lane"] = lane + notify_media_setting = True + if admin and old_admin != admin: + helper_logger.log_debug("port_config update, port_index: {}, admin_change: {} --->>> {}".format(physical_port, old_admin, admin)) + logical_port_dict["admin"] = admin + physical_port_dict[logical_port] = logical_port_dict + if logical_port_dict: + helper_logger.log_debug("port_config_need_update, port_index: {}, {} {}".format(physical_port, logical_port, physical_port_dict[logical_port])) + self.port_config_dict[physical_port] = physical_port_dict + return notify_media_setting + def del_port(self, physical_port, logical_port): + physical_port_dict = self.port_config_dict.get(physical_port, dict()) + try: + physical_port_dict.pop(logical_port) + except: + pass + self.port_config_dict[physical_port] = physical_port_dict + def get_logical_to_physical(self, logical_port): + for physical_port, physical_port_dict in self.port_config_dict.items(): + if logical_port in physical_port_dict.keys(): + return physical_port + return None + def get_physical_to_logical(self, physical_port): + physical_port_dict = self.port_config_dict.get(physical_port, dict()) + logical_port_list = list(physical_port_dict.keys()) + logical_port_list.sort(key=take_port_number) + return logical_port_list + def get_physical_port_media_key(self, physical_port): + try: + total_speed = 0 + total_lane = 0 + for logical_port_dict in self.port_config_dict.get(physical_port).values(): + total_speed += logical_port_dict["speed"] + total_lane += logical_port_dict["lane"] + return "{}-{}lane".format(total_speed, total_lane) + except Exception as e: + helper_logger.log_error("physical_port{} get_physical_port_media_key error: {}".format(physical_port, str(e))) + return None diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/cpo/lib/cmis_memory_map.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/cpo/lib/cmis_memory_map.py new file mode 100644 index 00000000000..17bd8b52cf3 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/cpo/lib/cmis_memory_map.py @@ -0,0 +1,847 @@ +import binascii +import copy +import math +import re + +def lane_bitval_mask_gen(key, bitvalue_map=None): + output = dict() + for offset in range(1): + for bit in range(8): + output["lane{:02d}{}".format(bit+offset*8, key)] = { + "offset": offset, + "bit": bit, + "outtype": 'str', + "type": 'bitvalue', + "bitvalue_map": bitvalue_map + } + return output + +def laser_mask_gen(key, bitvalue_map=None): + output = dict() + for offset in range(1): + for bit in range(8): + output["Laser{:02d}{}".format(bit+offset*8, key)] = { + "offset": offset, + "bit": bit, + "outtype": 'str', + "type": 'bitvalue', + "bitvalue_map": bitvalue_map + } + return output + +data_path_init_control_masks = lane_bitval_mask_gen("", ["Initialize", "De-initializ"]) +tx_ouput_disable_control_masks = lane_bitval_mask_gen("", ["Tx output enable", "Tx output disabled"]) +laser_power_control_masks = laser_mask_gen("", ["half-power", "full-power"]) +apply_datapath_init_control_masks = lane_bitval_mask_gen("", ["Not Apply", "Apply"]) + +default_sku_path="/usr/share/sonic/device/x86_64-micas_m2-w6940-128x1-fr4-r0/default_sku" +with open(default_sku_path, 'r', encoding='utf-8') as file: + sku_content = file.read().strip() + sku_match = re.search(r"M2-W6940-\d+X1-FR4", sku_content) + if sku_match: + default_sku = sku_match.group(0) + else: + default_sku = "M2-W6940-128X1-FR4" + +if default_sku == "M2-W6940-64X1-FR4": + apsel_code_num = { + '10': 800000, + '20': 200000, + '40': 100000 + } +else: + apsel_code_num = { + '10': 400000, + '20': 200000, + '40': 100000 + } + +def apsel_mask_gen(): + output = dict() + for lane_index in range(8): + output["lane{:02d}".format(lane_index)] = { + "offset": lane_index, + "outtype": 'int', + "type": 'enum', + 'bitmask': 0xf0, + 'decode': apsel_code_num + } + return output +lane_apsel_code_masks = apsel_mask_gen() + +def mw_to_dbm(mW): + if mW == 0: + return float("-inf") + elif mW < 0: + return float("NaN") + return 10. * math.log10(mW) + +def calc_power(eeprom_data, offset, size): + increments = 0.1 # μW + PmW = (int(eeprom_data[offset], 16) * 256 + int(eeprom_data[offset + 1], 16)) / (1000./increments) + return '%.03fdBm' % (mw_to_dbm(PmW)) + +def calc_bias(eeprom_data, offset, size): + retval = 'N/A' + try: + msb = int(eeprom_data[offset], 16) + lsb = int(eeprom_data[offset+1], 16) + result = (msb << 8) | (lsb & 0xff) + + result = float(result * 0.002 * 2) # increments 2μA + retval = "%.4f%s" % (result, "mA") + except Exception as err: + print("calc_power err %s" % str(err)) + return retval + +def lane_code_mask_gen_func(func): + output = dict() + for lane_index in range(8): + output["lane{:02d}".format(lane_index)] = { + "offset": lane_index*2, + "outtype": 'str', + "type": 'func', + "size": 2, + 'decode': { + 'func': func + } + } + return output + + +def lane_code_mask_gen_enum(enum, size=1): + output = dict() + for lane_index in range(8): + output["lane{:02d}".format(lane_index)] = { + "offset": lane_index*size, + "outtype": 'str', + "type": 'enum', + "size": size, + 'decode': enum + } + return output + +def lane_code_mask_gen_bitvalue(key, bitvalue_map=None): + output = dict() + for offset in range(1): + for bit in range(8): + output["lane{:02d}{}".format(bit+offset*8, key)] = { + "offset": offset, + "bit": bit, + "outtype": 'str', + "type": 'bitvalue', + "bitvalue_map": bitvalue_map + } + return output + +# lane_power_code_items = lane_power_code_mask_gen() +lane_dom_code_items = { + "Rx output status": { + 'offset': 0, + 'size': 1, + 'outtype': 'dict', + 'type': 'nested', + 'decode': lane_code_mask_gen_bitvalue('', ["output signal invalid or muted", "output signal valid"]) + }, + "Tx output status": { + 'offset': 1, + 'size': 1, + 'outtype': 'dict', + 'type': 'nested', + 'decode': lane_code_mask_gen_bitvalue('', ["output signal invalid or muted", "output signal valid"]) + }, + "L-Lane Data Path State Changed Flag": { + 'offset': 2, + 'size': 1, + 'outtype': 'dict', + 'type': 'nested', + 'decode': lane_code_mask_gen_bitvalue('', ["No flag", "Flag latched"]) + }, + "Tx Fault": { + 'offset': 3, + 'size': 1, + 'outtype': 'dict', + 'type': 'nested', + 'decode': lane_code_mask_gen_bitvalue('', ["No flag", "Flag latched"]) + }, + "Tx LOS": { + 'offset': 4, + 'size': 1, + 'outtype': 'dict', + 'type': 'nested', + 'decode': lane_code_mask_gen_bitvalue('', ["No flag", "Flag latched"]) + }, + # "L-Tx CDR LOL Flag. Not supported" + # "L-Tx Adaptive input EQ fault flag. Not supported" + "Tx Power High Alarm": { + 'offset': 7, + 'size': 1, + 'outtype': 'dict', + 'type': 'nested', + 'decode': lane_code_mask_gen_bitvalue('', ["No flag", "Flag latched"]) + }, + "Tx Power Low Alarm": { + 'offset': 8, + 'size': 1, + 'outtype': 'dict', + 'type': 'nested', + 'decode': lane_code_mask_gen_bitvalue('', ["No flag", "Flag latched"]) + }, + "Tx Power High Warning": { + 'offset': 9, + 'size': 1, + 'outtype': 'dict', + 'type': 'nested', + 'decode': lane_code_mask_gen_bitvalue('', ["No flag", "Flag latched"]) + }, + "Tx Power Low Warning": { + 'offset': 10, + 'size': 1, + 'outtype': 'dict', + 'type': 'nested', + 'decode': lane_code_mask_gen_bitvalue('', ["No flag", "Flag latched"]) + }, + "Tx Bias High Alarm": { + 'offset': 11, + 'size': 1, + 'outtype': 'dict', + 'type': 'nested', + 'decode': lane_code_mask_gen_bitvalue('', ["No flag", "Flag latched"]) + }, + "Tx Bias Low Alarm": { + 'offset': 12, + 'size': 1, + 'outtype': 'dict', + 'type': 'nested', + 'decode': lane_code_mask_gen_bitvalue('', ["No flag", "Flag latched"]) + }, + "Tx Bias High Warning": { + 'offset': 13, + 'size': 1, + 'outtype': 'dict', + 'type': 'nested', + 'decode': lane_code_mask_gen_bitvalue('', ["No flag", "Flag latched"]) + }, + "Tx Bias Low Warning": { + 'offset': 14, + 'size': 1, + 'outtype': 'dict', + 'type': 'nested', + 'decode': lane_code_mask_gen_bitvalue('', ["No flag", "Flag latched"]) + }, + "Rx LOS": { + 'offset': 15, + 'size': 1, + 'outtype': 'dict', + 'type': 'nested', + 'decode': lane_code_mask_gen_bitvalue('', ["No flag", "Flag latched"]) + }, + # "CDR LOL flag, Not supported" + "Rx Power High Alarm": { + 'offset': 17, + 'size': 1, + 'outtype': 'dict', + 'type': 'nested', + 'decode': lane_code_mask_gen_bitvalue('', ["No flag", "Flag latched"]) + }, + "Rx Power Low Alarm": { + 'offset': 18, + 'size': 1, + 'outtype': 'dict', + 'type': 'nested', + 'decode': lane_code_mask_gen_bitvalue('', ["No flag", "Flag latched"]) + }, + "Rx Power High Warning": { + 'offset': 19, + 'size': 1, + 'outtype': 'dict', + 'type': 'nested', + 'decode': lane_code_mask_gen_bitvalue('', ["No flag", "Flag latched"]) + }, + "Rx Power Low Warning": { + 'offset': 20, + 'size': 1, + 'outtype': 'dict', + 'type': 'nested', + 'decode': lane_code_mask_gen_bitvalue('', ["No flag", "Flag latched"]) + }, + "OutputStatusChangedFlagRx": { + 'offset': 21, + 'size': 1, + 'outtype': 'dict', + 'type': 'nested', + 'decode': lane_code_mask_gen_bitvalue('', ["No flag", "Flag latched"]) + }, + "TX Power": { + 'offset': 22, + 'size': 16, + "outtype": 'dict', + 'type': 'nested', + 'decode': lane_code_mask_gen_func(calc_power) + }, + "TX Bias": { + 'offset': 38, + 'size': 16, + "outtype": 'dict', + 'type': 'nested', + 'decode': lane_code_mask_gen_func(calc_bias) + }, + "RX Power": { + 'offset': 54, + 'size': 16, + "outtype": 'dict', + 'type': 'nested', + 'decode': lane_code_mask_gen_func(calc_power) + } +} + +def twos_comp(num, bits): + try: + if ((num & (1 << (bits - 1))) != 0): + num = num - (1 << bits) + return num + except Exception: + return 0 + +def calc_temperature(eeprom_data, offset, size): + # Internally measured temperature: signed 2’s complement in 1/256 degree Celsius increments + try: + cal_type = 1 + + msb = int(eeprom_data[offset], 16) + lsb = int(eeprom_data[offset + 1], 16) + + result = (msb << 8) | (lsb & 0xff) + result = twos_comp(result, 16) + + if cal_type == 1: + # Internal calibration + result = float(result / 256.0) + retval = '%.4f' %result + 'C' + else: + retval = 'Unknown' + except Exception as err: + retval = str(err) + + return retval + +data_path_state_indicator_enum = { + '00': "Reserved", + '01': "DataPathDeactivated", + '02': "DataPathInit", + '03': "DataPathDeinit", + '04': "DataPathActivated", + '05': "DataPathTxTurnOn", + '06': "DataPathTxTurnOff", + '07': "DataPathInitialized", + + '10': "DataPathDeactivated", + '20': "DataPathInit", + '30': "DataPathDeinit", + '40': "DataPathActivated", + '50': "DataPathTxTurnOn", + '60': "DataPathTxTurnOff", + '70': "DataPathInitialized", +} + +def data_path_state_indicator_lane_masks_gen(key, decode_enum=None): + output = dict() + for offset in range(4): + for lane in range(2): + lane_index = (offset*2) + lane + output["lane{:02d}{}".format(lane_index, key)] = { + 'offset': offset, + 'size': 1, + 'type': 'enum', + 'bitmask': 0x0f<<(lane*4), + 'decode': decode_enum + } + return output + +data_path_state_indicator_lane_masks = data_path_state_indicator_lane_masks_gen("", data_path_state_indicator_enum) + +memory_map = { + # RW + 'Module Global Controls': { + 'page': 0x00, + 'addr': 0x1a, + 'size': 1, + "outtype": 'dict', + 'type': 'nested', + 'decode': { + 'BankBoradcastEnable': { + "offset": 0, + "bit": 7, + "outtype": 'str', + "type": 'bitvalue', + "bitvalue_map": ["disabled", "enabled"] + }, + 'LowPwrAllowRequestHW': { + "offset": 0, + "bit": 6, + "outtype": 'str', + "type": 'bitvalue', + "bitvalue_map": ["disabled", "enabled"] + }, + 'Squelch control': { + "offset": 0, + "bit": 5, + "outtype": 'str', + "type": 'bitvalue', + "bitvalue_map": ["Tx squelch reduces OMA", "Tx squelch reduces Pave"] + }, + 'LowPwrRequestSW': { + "offset": 0, + "bit": 4, + "outtype": 'str', + "type": 'bitvalue', + "bitvalue_map": ["No request", "Request"] + }, + 'Software reset': { + "offset": 0, + "bit": 3, + "outtype": 'str', + "type": 'bitvalue', + "bitvalue_map": ["Not in reset", "Software reset"] + } + } + }, + #RW + 'Data Path Initialization Control': { + 'page': 0x10, + 'addr': 0x80, + 'size': 1, + 'outtype': 'dict', + 'type': 'nested', + 'decode': data_path_init_control_masks + }, + #RW + 'Tx output disable': { + 'page': 0x10, + 'addr': 0x82, + 'size': 1, + 'outtype': 'dict', + 'type': 'nested', + 'decode': tx_ouput_disable_control_masks + }, + #RO + 'Data Path State Indicator': { + 'page': 0x11, + 'addr': 0x80, + 'size': 4, + 'outtype': 'dict', + 'type': 'nested', + 'decode': data_path_state_indicator_lane_masks + }, + #RO + 'Module State': { + 'page': 0x0, + 'addr': 0x3, + 'bitmask': 0xe, + 'size': 1, + 'type': 'enum', + 'decode': { + '00': 'Reserved', + '02': 'ModuleLowPwr', + '04': 'ModulePwrUp', + '06': 'ModuleReady', + '08': 'ModulePwrDn', + '0a': 'ModuleFault', + '0c': 'Reserved', + '0e': 'Reserved' + } + }, + #RW + 'Laser power mode control 0': { + 'page': 0xb2, + 'addr': 0x80, + 'size': 1, + 'outtype': 'dict', + 'type': 'nested', + 'decode': laser_power_control_masks + }, + #RW + 'Laser power mode control 1': { + 'page': 0xb6, + 'addr': 0x80, + 'size': 1, + 'outtype': 'dict', + 'type': 'nested', + 'decode': laser_power_control_masks + }, + #RO + 'Active Application Control Set': { + 'page': 0x11, + 'addr': 0xce, + 'size': 8, + 'outtype': 'dict', + 'type': 'nested', + 'decode': lane_apsel_code_masks + }, + #RW + 'Application Select Controls': { + 'page': 0x10, + 'addr': 0x91, + 'size': 8, + 'outtype': 'dict', + 'type': 'nested', + 'decode': lane_apsel_code_masks + }, + #RW + 'Apply DataPathInit Controls': { + 'page': 0x10, + 'addr': 0x8f, + 'size': 1, + 'outtype': 'dict', + 'type': 'nested', + 'decode': apply_datapath_init_control_masks + }, + #RO + 'Vendor infomation': { + 'page': 0x00, + 'addr': 0x81, + 'size': 61, + "outtype": 'dict', + 'type': 'nested', + 'decode': { + 'Vendor Name': { + 'offset': 0, + 'size': 16, + 'type': 'str' + }, + 'Vendor OUI': { + 'offset': 16, + 'size': 3, + 'type': 'hex' + }, + 'Vendor PN': { + 'offset': 19, + 'size': 16, + 'type': 'str' + }, + 'Vendor Rev': { + 'offset': 35, + 'size': 2, + 'type': 'str' + }, + 'Vendor SN': { + 'offset': 37, + 'size': 16, + 'type': 'str' + }, + 'CPO Vendor SN': { + 'offset': 37, + 'size': 14, + 'type': 'str' + }, + 'Vendor Date': { + 'offset': 53, + 'size': 8, + 'type': 'date' + } + } + }, + #RO + 'lanes dom info': { + 'page': 0x11, + 'addr': 0x84, + 'size': 70, + "outtype": 'dict', + 'type': 'nested', + 'decode': lane_dom_code_items + }, + #RO + 'dom info': { + 'page': 0x00, + 'addr': 0xe, + 'size': 10, + "outtype": 'dict', + 'type': 'nested', + 'decode': { + 'temperature': { + "offset": 0, + "outtype": 'str', + "type": 'func', + "size": 2, + 'decode': { + 'func': calc_temperature + } + } + } + } +} + +class cmis_memory_helper_base(): + + def read(self, bank, page, addr, rd_len): + raise NotImplementedError + + def write(self, bank, page, addr, data): + raise NotImplementedError + + def convert_date_to_string(self, eeprom_data, offset, size): + try: + year_offset = 0 + month_offset = 2 + day_offset = 4 + lot_offset = 6 + + date = self.convert_hex_to_string(eeprom_data, offset, offset + size) + retval = "20"+ date[year_offset:month_offset] + "-" + \ + date[month_offset:day_offset] + "-" + \ + date[day_offset:lot_offset] + " " + \ + date[lot_offset:size] + except Exception as err: + retval = str(err) + return retval + + # Convert Hex to String + def convert_hex_to_string(self, arr, start, end): + try: + ret_str = '' + for n in range(start, end): + ret_str += arr[n] + return binascii.unhexlify(ret_str).decode("utf-8", "ignore").strip() + except Exception as err: + return str(err) + + def test_bit(self, n, bitpos): + try: + mask = 1 << bitpos + if (n & mask) == 0: + return 0 + else: + return 1 + except Exception: + return -1 + + def modify_bit(self, n, bitpos, val): + try: + mask = 1 << bitpos + return ((~mask) & 0xff & n) | (val << bitpos) + except Exception: + return -1 + + def parse_map_element(self, eeprom_data, eeprom_ele, start_pos): + value = None + offset = eeprom_ele.get('offset', 0) + start_pos + size = eeprom_ele.get('size') + type = eeprom_ele.get('type') + decode = eeprom_ele.get('decode') + bitmask = eeprom_ele.get('bitmask', None) + bitvalue_map = eeprom_ele.get('bitvalue_map', None) + eeprom_data_str = [hex(item)[2:].zfill(2) for item in eeprom_data] + + if type == 'enum': + # Get the matched value + if bitmask != None: + key_value_int = eeprom_data[offset] & bitmask + else: + key_value_int = eeprom_data[offset] + key_value_str = str(hex(key_value_int)[2:].zfill(2)) + value = decode.get(key_value_str, 'Unknown') + + elif type == 'bitmap': + # Get the 'on' bitname + bitvalue_dict = {} + for bitname, bitinfo in sorted(decode.items()): + bitinfo_offset = bitinfo.get('offset') + start_pos + bitinfo_pos = bitinfo.get('bit') + bitinfo_value = bitinfo.get('value') + data = eeprom_data[bitinfo_offset] + bit_value = self.test_bit(data, bitinfo_pos) + if bitinfo_value != None: + if bit_value == bitinfo_value: + value = bitname + break + elif bit_value == 1: + value = bitname + break + + elif type == 'bitvalue': + # Get the value of the bit + bitpos = eeprom_ele.get('bit') + data = eeprom_data[offset] + bitval = self.test_bit(data, bitpos) + if bitvalue_map != None: + value = bitvalue_map[bitval] + else: + value = ['Off', 'On'][bitval] + + elif type == 'func': + # Call the decode func to get the value + value = decode['func'](eeprom_data_str, offset, size) + + elif type == 'str': + value = self.convert_hex_to_string(eeprom_data_str, offset, + offset + size) + + elif type == 'int': + value = eeprom_data[offset] + if bitmask != None: + value = value & bitmask + + elif type == 'date': + value = self.convert_date_to_string(eeprom_data_str, offset, size) + + elif type == 'hex': + if size == 1: + value = "0x{}".format(hex(eeprom_data[offset])[2:]) + elif size > 1: + value = '-'.join(eeprom_data_str[offset:offset+size]) + + return value + + # Recursively parses sff data into dictionary + def parse_memory_map(self, eeprom_map, eeprom_data, start_pos): + outdict = {} + for name, meta_data in sorted(eeprom_map.items()): + type = meta_data.get('type') + # Initialize output value + value_dict = {} + value_dict['outtype'] = meta_data.get('outtype') + value_dict['short_name'] = meta_data.get('short_name') + if type != 'nested': + data = self.parse_map_element(eeprom_data, meta_data, start_pos) + else: + nested_map = meta_data.get('decode') + data = self.parse_memory_map(nested_map, eeprom_data, start_pos + meta_data.get('offset', 0)) + if data != None: + value_dict['value'] = data + outdict[name] = value_dict + return outdict + + # def parse(self, eeprom_map_key, eeprom_data, start_pos): + def parse(self, field_name): + """ Example Return format: + {'version': '1.0', 'data': {'Length50um(UnitsOf10m)': + {'outtype': None, 'value': 8, 'short_name': None}, + 'TransceiverCodes': {'outtype': None, 'value': + {'10GEthernetComplianceCode': {'outtype': None, 'value': + '10G Base-SR', 'short_name': None}}, 'short_name': None}, + 'ExtIdentOfTypeOfTransceiver': {'outtype': None, 'value': + 'GBIC/SFP func defined by two-wire interface ID', 'short_name': + None}, 'Length62.5um(UnitsOfm)': {'outtype': None,""" + return_data = {} + eeprom_map = memory_map[field_name] + page = eeprom_map['page'] + addr = eeprom_map['addr'] + size = eeprom_map['size'] + status, eeprom_data = self.read(page=page, addr=addr, rd_len=size) + eeprom_map = { + field_name: eeprom_map + } + outdict = self.parse_memory_map(eeprom_map, eeprom_data, 0) + return_data['data'] = outdict + return_data['version'] = '0x52' # addr 0x2 + return return_data + + def output_process(self, field_keys, field_value): + if field_value.get('outtype') == 'dict': + ret = dict() + for name, value in field_value.get('value').items(): + if field_keys and (name not in field_keys.keys()): + continue + if field_keys: + ret[name] = self.output_process(field_keys.get(name, None), value) + else: + ret[name] = self.output_process(None, value) + else: + ret = field_value['value'] + return ret + + def get_field(self, field_name): + if isinstance(field_name, dict): + ret_dict = dict() + for field in field_name.keys(): + parse_output = self.parse(field) + output_data = parse_output.get('data') + field_data = output_data.get(field) + ret_dict[field] = self.output_process(field_name[field], field_data) + return ret_dict + else: + parse_output = self.parse(field_name) + output_data = parse_output.get('data') + field_data = output_data.get(field_name) + return self.output_process(None, field_data) + + def modify_map_element(self, eeprom_data, eeprom_ele, start_pos, target_value): + value = None + offset = eeprom_ele.get('offset') + start_pos + size = eeprom_ele.get('size') + type = eeprom_ele.get('type') + decode = eeprom_ele.get('decode') + bitmask = eeprom_ele.get('bitmask', None) + bitvalue_map = eeprom_ele.get('bitvalue_map', None) + + if type == 'bitvalue': + # Get the value of the bit + bitpos = eeprom_ele.get('bit') + data = eeprom_data[offset] + if bitvalue_map != None: + target_index = bitvalue_map.index(target_value) + else: + target_index = ['Off', 'On'].index(target_value) + value = self.modify_bit(data, bitpos, target_index) + eeprom_data[offset] = value & 0xff + + elif type == 'enum': + # Get the matched value + enum_value = 'Unknown' + for key, value in decode.items(): + if value == target_value: + enum_value = key + break + enum_value = int(enum_value, 16) + eeprom_value = eeprom_data[offset] + if bitmask != None: + eeprom_value = eeprom_value & (~bitmask) + eeprom_value = eeprom_value | enum_value + else: + eeprom_value = enum_value + eeprom_data[offset] = eeprom_value & 0xff + return eeprom_data + + def modify_memory_map(self, eeprom_map, eeprom_data, start_pos, target:dict): + for target_key, target_value in target.items(): + for name, meta_data in sorted(eeprom_map.items()): + if name != target_key: + continue + type = meta_data.get('type') + # Initialize output value + value_dict = {} + value_dict['outtype'] = meta_data.get('outtype') + value_dict['short_name'] = meta_data.get('short_name') + + if type != 'nested': + data = self.modify_map_element(eeprom_data, + meta_data, start_pos, target_value) + else: + nested_map = meta_data.get('decode') + data = self.modify_memory_map(nested_map, + eeprom_data, start_pos, target_value) + eeprom_data = data + return eeprom_data + + def modify(self, field_name, field_value): + outdict = dict() + eeprom_map = memory_map[field_name] + page = eeprom_map['page'] + addr = eeprom_map['addr'] + size = eeprom_map['size'] + status, eeprom_data = self.read(page=page, addr=addr, rd_len=size) + field_value = { + field_name: field_value + } + eeprom_map = { + field_name: eeprom_map + } + output_eeprom_data = self.modify_memory_map(eeprom_map, copy.deepcopy(eeprom_data), 0, field_value) + if (eeprom_data != output_eeprom_data): + outdict[field_name] = self.write(page=page, addr=addr, data=output_eeprom_data) + else: + outdict[field_name] = (True, "same as before") + return outdict + + def set_field(self, field_name, field_value): + return self.modify(field_name=field_name, field_value=field_value) diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/cpo/lib/cpoutil.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/cpo/lib/cpoutil.py new file mode 100755 index 00000000000..e7a618193c7 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/cpo/lib/cpoutil.py @@ -0,0 +1,1801 @@ +import binascii +import fcntl +import math +import os +import sys +import threading +import time +import traceback +import subprocess +from cpo_platform_config import * +from cmis_memory_map import cmis_memory_helper_base +from oe_cmis_rw import oe_cmis_sysfs_rw +sys.path.append(os.path.dirname(os.path.realpath(__file__))) +try: + import fw_tools + from fw_tools.cdb_app import cdb + from fw_tools.cmis import debug +except Exception as e: + print(e) + pass + +RLMA_PAGE_BASE_OFFSET = 0x0 +RLMB_PAGE_BASE_OFFSET = 0x4 + +RLM_IDENTIFIER_PAGE = 0xb0 +RLM_IDENTIFIER_OFFSET = 0x80 +RLM_IDENTIFIER_WIDTH = 1 + +RLM_REVERSION_PAGE = 0xb0 +RLM_REVERSION_OFFSET = 0x81 +RLM_REVERSION_WIDTH = 1 + +RLM_LASER_GRID_AND_COUNT_PAGE = 0xb0 +RLM_LASER_GRID_AND_COUNT_OFFSET = 0x82 +RLM_LASER_GRID_AND_COUNT_WIDTH = 1 + +RLM_MODULE_STATE_AND_INTERRUPT_PAGE = 0xb0 +RLM_MODULE_STATE_AND_INTERRUPT_OFFSET = 0x83 +RLM_MODULE_STATE_AND_INTERRUPT_WIDTH = 1 + +RLM_MODULE_LOW_POWER_CONTROL_PAGE = 0xb0 +RLM_MODULE_LOW_POWER_CONTROL_OFFSET = 0x84 +RLM_MODULE_LOW_POWER_CONTROL_WIDTH = 1 + +RLM_LASER_DISABLE_CONTROL_PAGE = 0xb0 +RLM_LASER_DISABLE_CONTROL_OFFSET = 0x85 +RLM_LASER_DISABLE_CONTROL_WIDTH = 2 + +RLM_LASER_ACTIVE_STATUS_PAGE = 0xb0 +RLM_LASER_ACTIVE_STATUS_OFFSET = 0x87 +RLM_LASER_ACTIVE_STATUS_WIDTH = 2 + +RLM_VCC_AND_TEMPERATURE_WARNING_ALARM_PAGE = 0xb0 +RLM_VCC_AND_TEMPERATURE_WARNING_ALARM_OFFSET = 0x89 +RLM_VCC_AND_TEMPERATURE_WARNING_ALARM_WIDTH = 1 + +RLM_LASER_BIAS_WARNING_PAGE = 0xb0 +RLM_LASER_BIAS_WARNING_OFFSET = 0x8A +RLM_LASER_BIAS_WARNING_WIDTH = 2 + +RLM_LASER_BIAS_ALARM_PAGE = 0xb0 +RLM_LASER_BIAS_ALARM_OFFSET = 0x8C +RLM_LASER_BIAS_ALARM_WIDTH = 2 + +RLM_MODULE_TEMPERATURE_MONITOR_PAGE = 0xb0 +RLM_MODULE_TEMPERATURE_MONITOR_OFFSET = 0x96 +RLM_MODULE_TEMPERATURE_MONITOR_WIDTH = 2 + +RLM_MODULE_SUPPLY_VOLTAGE_MONITOR_PAGE = 0xb0 +RLM_MODULE_SUPPLY_VOLTAGE_MONITOR_OFFSET = 0x98 +RLM_MODULE_SUPPLY_VOLTAGE_MONITOR_WIDTH = 2 + +RLM_MONITOR_VALUES_PAGE = 0xb0 +RLM_MONITOR_VALUES_OFFSET = 0x9A +RLM_MONITOR_VALUES_WIDTH = 81 + +RLM_TEC_CURRENT_MONITOR_PAGE = 0xb0 +RLM_TEC_CURRENT_MONITOR_OFFSET = 0xfa +RLM_TEC_CURRENT_MONITOR_WIDTH = 2 + +RLM_VENDOR_INFOMATION_PAGE = 0xb1 +RLM_VENDOR_INFOMATION_OFFSET = 0x81 +RLM_VENDOR_INFOMATION_WIDTH = 122 + +RLM_MAXIMUM_POWER_CONSUMPTION_PAGE = 0xb1 +RLM_MAXIMUM_POWER_CONSUMPTION_OFFSET = 0xc8 +RLM_MAXIMUM_POWER_CONSUMPTION_WIDTH = 1 + +RLM_LASER_POWER_MODE_CONTROL_PAGE = 0xb2 +RLM_LASER_POWER_MODE_CONTROL_OFFSET = 0x80 +RLM_LASER_POWER_MODE_CONTROL_WIDTH = 1 + +RLM_DOM_THRESHOLD_PAGE = 0xb2 +RLM_DOM_THRESHOLD_OFFSET = 0xA2 +RLM_DOM_THRESHOLD_WIDTH = 28 + +RLM_B1_CEHCK_SUM_PAGE = 0xb1 +RLM_B1_CEHCK_SUM_OFFSET = 0xfb +RLM_B1_CEHCK_SUM_WIDTH = 1 + +def os_command_i2cset_oe_reset_byte(byte): + try: + cmd = ["i2cset", "-f", "-y", "20", "0x1e", "0x72", f"0x{byte:02X}"] + result = subprocess.run( + cmd, + stdout=subprocess.PIPE, + stderr=subprocess.PIPE, + text=True, + check=True + ) + return result.returncode + except subprocess.CalledProcessError as e: + print(f"i2cset set failed: {e.stderr}") + return e.returncode + except FileNotFoundError: + print("i2cset command not found") + return -1 + except Exception as e: + print(f"set i2cset error: {e}") + return -1 + +class CpoException(Exception): + def __init__(self, detailed_error_message): + super(CpoException, self).__init__(detailed_error_message) + +class cpoutilbase(object): + + def __init__(self) -> None: + self.cpo_api = cpo_v1() + # self.oe_list = list(range(8)) + + def get_dict_str_format(self, indict, indent): + output = '' + if indict != None: + for key, value in indict.items(): + if type(value) == dict: + output += "{}{}:\n{}".format(indent, key, self.get_dict_str_format(value, indent + (' ' * 8))) + else: + output += "{}{}: {}\n".format(indent, key, value) + return output + + def laser_count_implemented(self, indict, laser_count): + if type(indict) != dict: + return indict + + outdict = dict() + for key, value in indict.items(): + flag = True + if type(key) == str: + for i in range(laser_count+1, 16): + laser_name = "Laser{:02d}".format(i) + if key.find(laser_name) >= 0: + flag = False + break + if flag: + outdict[key] = self.laser_count_implemented(value, laser_count) + return outdict + + def mutil_reset_oe(self, oe_list: list): + retval = True + try: + for oe in oe_list: + if not self.cpo_api._file_rw_lock(oe): + raise CpoException("eeprom file lock failed!") + retval = self.cpo_api.reset_oe(oe_list) + except: + retval = False + finally: + for oe in oe_list: + self.cpo_api._file_rw_unlock(oe) + return retval + + def oe_dump_laser_pwr(self, oe): + try: + if not self.cpo_api._file_rw_lock(oe): + raise CpoException("eeprom file lock failed!") + with debug.DebugObj(oe_mcu=oe) as d: + d.debug_dump_laser_input_power() + except Exception as e: + pass + + finally: + self.cpo_api._file_rw_unlock(oe) + + def oe_fw_upgrade(self, oe, filename, size, rlm_num, verify=True): + try: + if not self.cpo_api._file_rw_lock(oe): + raise CpoException("eeprom file lock failed!") + with cdb.cdbObj(oe_num=oe) as c: + c.cmis_i2c.connect_mcu(oe) + print("Connected to MCU%d" % oe) + c.cdb_update_general(filename, size, rlm_num=rlm_num, verify=verify) + except: + pass + + finally: + self.cpo_api._file_rw_unlock(oe) + + def get_oe_list(self): + return self.cpo_api.get_oe_list() + + def get_rlm_list_by_oe(self, oe): + return self.cpo_api.get_rlm_list_by_oe(oe) + + def get_rlm_list(self): + return self.cpo_api.get_rlm_list() + + def get_oe_by_rlm(self, rlm): + return self.cpo_api.get_oe_by_rlm(rlm) + + def get_rlm_name(self, rlm): + return "RLM{}".format(rlm) + + def get_port_index_list(self): + return self.cpo_api.get_port_index_list() + + def get_port_index_list_by_oe(self, oe): + return self.cpo_api.get_port_index_list_by_oe(oe) + + def get_oe_by_port_index(self, port_index): + return self.cpo_api.get_oe_by_port_index(port_index) + + def get_bank_by_port_index(self, port_index): + return self.cpo_api.get_bank_by_port_index(port_index) + + def get_rlm_presence(self, rlm): + if rlm not in self.get_rlm_list(): + print("RLM index out of range!") + return False + # return self.cpo_api.get_rlm_presence(rlm) + oe = self.get_oe_by_rlm(rlm) + + retval = True + try: + if not self.cpo_api._file_rw_lock(oe): + raise CpoException("eeprom file lock failed!") + retval = self.cpo_api.get_rlm_presence(rlm) + except: + retval = False + finally: + self.cpo_api._file_rw_unlock(oe) + + return retval + + def get_rlm_info_dict(self, rlm): + if rlm not in self.get_rlm_list(): + return "RLM index out of range!" + oe = self.cpo_api.get_oe_by_rlm(rlm) + + if self.cpo_api.get_rlm_list_by_oe(oe).index(rlm) == 0: + RLM_PAGE_BASE_OFFSET = RLMA_PAGE_BASE_OFFSET + else: + RLM_PAGE_BASE_OFFSET = RLMB_PAGE_BASE_OFFSET + + rlm_info_dict = dict() + cpo_api = cpo_v1() + + try: + if not cpo_api._file_rw_lock(oe): + return "EEPROM file lock failed!" + + rlm_vendor_infomation_raw = cpo_api.read_eeprom(oe, RLM_VENDOR_INFOMATION_PAGE + RLM_PAGE_BASE_OFFSET, RLM_VENDOR_INFOMATION_OFFSET, RLM_VENDOR_INFOMATION_WIDTH) + rlm_b1_checksum_raw = cpo_api.read_eeprom(oe, RLM_B1_CEHCK_SUM_PAGE + RLM_PAGE_BASE_OFFSET, RLM_B1_CEHCK_SUM_OFFSET, RLM_B1_CEHCK_SUM_WIDTH) + + if not self.cpo_api.get_rlm_presence(rlm): + return "RLM not presence" + + rlm_identifier_raw = cpo_api.read_eeprom(oe, RLM_IDENTIFIER_PAGE + RLM_PAGE_BASE_OFFSET, RLM_IDENTIFIER_OFFSET, RLM_IDENTIFIER_WIDTH) + if rlm_identifier_raw is not None: + rlm_identifier_data = cpo_api.parse_identifier(rlm_identifier_raw, 0) + + rlm_reversion_raw = cpo_api.read_eeprom(oe, RLM_REVERSION_PAGE + RLM_PAGE_BASE_OFFSET, RLM_REVERSION_OFFSET, RLM_REVERSION_WIDTH) + if rlm_reversion_raw is not None: + rlm_reversion_data = cpo_api.parse_reversion(rlm_reversion_raw, 0) + + rlm_laser_grid_and_count_raw = cpo_api.read_eeprom(oe, RLM_LASER_GRID_AND_COUNT_PAGE + RLM_PAGE_BASE_OFFSET, RLM_LASER_GRID_AND_COUNT_OFFSET, RLM_LASER_GRID_AND_COUNT_WIDTH) + if rlm_laser_grid_and_count_raw is not None: + rlm_laser_grid_and_count_data = cpo_api.parse_laser_grid_and_count(rlm_laser_grid_and_count_raw, 0) + + rlm_module_state_and_interrupt_raw = cpo_api.read_eeprom(oe, RLM_MODULE_STATE_AND_INTERRUPT_PAGE + RLM_PAGE_BASE_OFFSET, RLM_MODULE_STATE_AND_INTERRUPT_OFFSET, RLM_MODULE_STATE_AND_INTERRUPT_WIDTH) + if rlm_module_state_and_interrupt_raw is not None: + rlm_module_state_and_interrupt_data = cpo_api.parse_module_state_and_interrupt(rlm_module_state_and_interrupt_raw, 0) + + rlm_module_low_power_control_raw = cpo_api.read_eeprom(oe, RLM_MODULE_LOW_POWER_CONTROL_PAGE + RLM_PAGE_BASE_OFFSET, RLM_MODULE_LOW_POWER_CONTROL_OFFSET, RLM_MODULE_LOW_POWER_CONTROL_WIDTH) + if rlm_module_low_power_control_raw is not None: + rlm_module_low_power_control_data = cpo_api.parse_module_low_power_control(rlm_module_low_power_control_raw, 0) + + rlm_laser_disable_control_raw = cpo_api.read_eeprom(oe, RLM_LASER_DISABLE_CONTROL_PAGE + RLM_PAGE_BASE_OFFSET, RLM_LASER_DISABLE_CONTROL_OFFSET, RLM_LASER_DISABLE_CONTROL_WIDTH) + if rlm_laser_disable_control_raw is not None: + rlm_laser_disable_control_data = cpo_api.parse_laser_disable_control(rlm_laser_disable_control_raw, 0) + + rlm_laser_active_status_raw = cpo_api.read_eeprom(oe, RLM_LASER_ACTIVE_STATUS_PAGE + RLM_PAGE_BASE_OFFSET, RLM_LASER_ACTIVE_STATUS_OFFSET, RLM_LASER_ACTIVE_STATUS_WIDTH) + if rlm_laser_active_status_raw is not None: + rlm_laser_active_status_data = cpo_api.parse_laser_active_status(rlm_laser_active_status_raw, 0) + + rlm_vcc_and_temperature_warning_alarm_raw = cpo_api.read_eeprom(oe, RLM_VCC_AND_TEMPERATURE_WARNING_ALARM_PAGE + RLM_PAGE_BASE_OFFSET, RLM_VCC_AND_TEMPERATURE_WARNING_ALARM_OFFSET, RLM_VCC_AND_TEMPERATURE_WARNING_ALARM_WIDTH) + if rlm_vcc_and_temperature_warning_alarm_raw is not None: + rlm_vcc_and_temperature_warning_alarm_data = cpo_api.parse_vcc_and_temperature_warning_alarm(rlm_vcc_and_temperature_warning_alarm_raw, 0) + + rlm_laser_bias_warning_raw = cpo_api.read_eeprom(oe, RLM_LASER_BIAS_WARNING_PAGE + RLM_PAGE_BASE_OFFSET, RLM_LASER_BIAS_WARNING_OFFSET, RLM_LASER_BIAS_WARNING_WIDTH) + if rlm_laser_bias_warning_raw is not None: + rlm_laser_bias_warning_data = cpo_api.parse_laser_bias_warning(rlm_laser_bias_warning_raw, 0) + + rlm_laser_bias_alarm_raw = cpo_api.read_eeprom(oe, RLM_LASER_BIAS_ALARM_PAGE + RLM_PAGE_BASE_OFFSET, RLM_LASER_BIAS_ALARM_OFFSET, RLM_LASER_BIAS_ALARM_WIDTH) + if rlm_laser_bias_alarm_raw is not None: + rlm_laser_bias_alarm_data = cpo_api.parse_laser_bias_alarm(rlm_laser_bias_alarm_raw, 0) + + rlm_module_temperature_monitor_raw = cpo_api.read_eeprom(oe, RLM_MODULE_TEMPERATURE_MONITOR_PAGE + RLM_PAGE_BASE_OFFSET, RLM_MODULE_TEMPERATURE_MONITOR_OFFSET, RLM_MODULE_TEMPERATURE_MONITOR_WIDTH) + if rlm_module_temperature_monitor_raw is not None: + rlm_module_temperature_monitor_data = cpo_api.parse_module_temperature_monitor(rlm_module_temperature_monitor_raw, 0) + + rlm_module_supply_voltage_monitor_raw = cpo_api.read_eeprom(oe, RLM_MODULE_SUPPLY_VOLTAGE_MONITOR_PAGE + RLM_PAGE_BASE_OFFSET, RLM_MODULE_SUPPLY_VOLTAGE_MONITOR_OFFSET, RLM_MODULE_SUPPLY_VOLTAGE_MONITOR_WIDTH) + if rlm_module_supply_voltage_monitor_raw is not None: + rlm_module_supply_voltage_monitor_data = cpo_api.parse_module_supply_voltage_monitor(rlm_module_supply_voltage_monitor_raw, 0) + + if rlm_vendor_infomation_raw is not None: + rlm_vendor_infomation_data = cpo_api.parse_vendor_infomation(rlm_vendor_infomation_raw, 0) + + rlm_maximum_power_consumption_raw = cpo_api.read_eeprom(oe, RLM_MAXIMUM_POWER_CONSUMPTION_PAGE + RLM_PAGE_BASE_OFFSET, RLM_MAXIMUM_POWER_CONSUMPTION_OFFSET, RLM_MAXIMUM_POWER_CONSUMPTION_WIDTH) + if rlm_maximum_power_consumption_raw is not None: + rlm_maximum_power_consumption_data = cpo_api.parse_maximum_power_consumption(rlm_maximum_power_consumption_raw, 0) + + rlm_laser_power_mode_control_raw = cpo_api.read_eeprom(oe, RLM_LASER_POWER_MODE_CONTROL_PAGE + RLM_PAGE_BASE_OFFSET, RLM_LASER_POWER_MODE_CONTROL_OFFSET, RLM_LASER_POWER_MODE_CONTROL_WIDTH) + if rlm_laser_power_mode_control_raw is not None: + rlm_laser_power_mode_control_data = cpo_api.parse_laser_power_mode_control(rlm_laser_power_mode_control_raw, 0) + + rlm_dom_threshold_raw = cpo_api.read_eeprom(oe, RLM_DOM_THRESHOLD_PAGE + RLM_PAGE_BASE_OFFSET, RLM_DOM_THRESHOLD_OFFSET, RLM_DOM_THRESHOLD_WIDTH) + if rlm_dom_threshold_raw is not None: + rlm_dom_threshold_data = cpo_api.parse_dom_threshold(rlm_dom_threshold_raw, 0) + + rlm_monitor_values_raw = cpo_api.read_eeprom(oe, RLM_MONITOR_VALUES_PAGE + RLM_PAGE_BASE_OFFSET, RLM_MONITOR_VALUES_OFFSET, RLM_MONITOR_VALUES_WIDTH) + if rlm_monitor_values_raw is not None: + rlm_monitor_values_data = cpo_api.parse_monitor_values(rlm_monitor_values_raw, 0) + + rlm_tec_current_monitor_raw = cpo_api.read_eeprom(oe, RLM_TEC_CURRENT_MONITOR_PAGE + RLM_PAGE_BASE_OFFSET, RLM_TEC_CURRENT_MONITOR_OFFSET, RLM_TEC_CURRENT_MONITOR_WIDTH) + if rlm_tec_current_monitor_raw is not None: + rlm_tec_current_monitor_data = cpo_api.parse_tec_current_monitor(rlm_tec_current_monitor_raw, 0) + + rlm_info_dict['Identifier'] = rlm_identifier_data['data']['Identifier'] + rlm_info_dict['Reversion'] = rlm_reversion_data['data']['Reversion'] + rlm_info_dict['Laser grid and count'] = rlm_laser_grid_and_count_data['data']['Laser grid and count'] + rlm_info_dict['Module state & Interrupt'] = rlm_module_state_and_interrupt_data['data']['Module state & Interrupt'] + rlm_info_dict['Module low power control'] = rlm_module_low_power_control_data['data']['Module low power control'] + rlm_info_dict['Laser disable control'] = rlm_laser_disable_control_data['data']['Laser disable control'] + rlm_info_dict['Laser active status'] = rlm_laser_active_status_data['data']['Laser active status'] + rlm_info_dict['Vcc 3.3V & temperature low/high warning/alarm'] = rlm_vcc_and_temperature_warning_alarm_data['data']['Vcc 3.3V & Temperature low/high warning/alarm'] + rlm_info_dict['Laser bias warning'] = rlm_laser_bias_warning_data['data']['Laser bias warning'] + rlm_info_dict['Laser bias alarm'] = rlm_laser_bias_alarm_data['data']['Laser bias alarm'] + rlm_info_dict['Module temperature monitor'] = rlm_module_temperature_monitor_data['data']['Module Temperature Monitor'] + rlm_info_dict['Module supply voltage monitor'] = rlm_module_supply_voltage_monitor_data['data']['Module supply voltage Monitor'] + rlm_info_dict['Vendor infomation'] = rlm_vendor_infomation_data['data']['Vendor infomation'] + rlm_info_dict['Maximum power consumption'] = rlm_maximum_power_consumption_data['data']['Maximum power consumption'] + rlm_info_dict['Laser power mode control'] = rlm_laser_power_mode_control_data['data']['Laser power mode control'] + rlm_info_dict['ThresholdValues'] = rlm_dom_threshold_data['data']['ThresholdValues'] + rlm_info_dict['Laser current monitor'] = rlm_monitor_values_data['data']['Laser current monitor'] + rlm_info_dict['Laser voltage monitor'] = rlm_monitor_values_data['data']['Laser voltage monitor'] + rlm_info_dict['Laser opitcal power monitor'] = rlm_monitor_values_data['data']['Laser opitcal power monitor'] + rlm_info_dict['TEC current monitor'] = rlm_tec_current_monitor_data['data']['TEC current monitor'] + + if (rlm_info_dict != None) and (rlm_info_dict['Laser grid and count'] != None): + laser_count = rlm_info_dict['Laser grid and count']['Laser count'] + rlm_info_dict = self.laser_count_implemented(rlm_info_dict, laser_count) + + except CpoException: + rlm_info_dict = None + except BaseException: + rlm_info_dict = None + print(traceback.format_exc()) + finally: + cpo_api._file_rw_unlock(oe) + + if rlm_info_dict == None: + return "RLM eeprom get failed!" + + return rlm_info_dict + + def get_rlm_dom_info_dict(self, rlm): + return self.get_rlm_info_dict(rlm) + + def get_rlm_lpmode(self, rlm): + oe = self.cpo_api.get_oe_by_rlm(rlm) + if self.cpo_api.get_rlm_list_by_oe(oe).index(rlm) == 0: + RLM_PAGE_BASE_OFFSET = RLMA_PAGE_BASE_OFFSET + else: + RLM_PAGE_BASE_OFFSET = RLMB_PAGE_BASE_OFFSET + rlm_enable = 0x00 + try: + if not self.cpo_api._file_rw_lock(oe): + return False, False + rlm_laser_power_mode_control_raw = self.cpo_api.read_eeprom(oe, RLM_LASER_POWER_MODE_CONTROL_PAGE + RLM_PAGE_BASE_OFFSET, RLM_LASER_POWER_MODE_CONTROL_OFFSET, RLM_LASER_POWER_MODE_CONTROL_WIDTH) + if rlm_laser_power_mode_control_raw is not None: + rlm_laser_power_mode_control_data = self.cpo_api.parse_laser_power_mode_control(rlm_laser_power_mode_control_raw, 0) + rlm_enable = rlm_laser_power_mode_control_data['data']['Laser power mode control'] + except BaseException: + print(traceback.format_exc()) + return False, False + finally: + self.cpo_api._file_rw_unlock(oe) + # return True if rlm is half power mode + return True, int(rlm_enable, 16) == 0x00 + + def set_rlm_lpmode_mutil(self, rlm_list:list, lpmode): + retval = False + oe_set = set() + oe_need_enable_set = set() + + for rlm in rlm_list: + oe_set.add(self.get_oe_by_rlm(rlm)) + + # FIXME: this will affect the other ports belong to this oe + # for oe in oe_set: + # if self.get_oe_enable(oe): + # oe_need_enable_set.add(oe) + + try: + # lock eeprom + for oe in oe_set: + if not self.cpo_api._file_rw_lock(oe): + raise CpoException("eeprom file lock failed!") + # disable oe + for oe in oe_need_enable_set: + self._set_oe_enable(oe, False) + # set rlm lpmode + if len(oe_need_enable_set): + time.sleep(1) + retval = self._set_rlm_lpmode_mutil(rlm_list, lpmode) + if len(oe_need_enable_set): + time.sleep(1) + except Exception: + retval = False + print(traceback.format_exc()) + finally: + # enable oe + for oe in oe_need_enable_set: + self._set_oe_enable(oe, True) + # unlock eeprom + for oe in oe_set: + self.cpo_api._file_rw_unlock(oe) + return retval + + + def _set_rlm_lpmode_mutil(self, rlm_list:list, lpmode): + for rlm in rlm_list: + oe = self.get_oe_by_rlm(rlm) + if lpmode == True: + if self.cpo_api.get_rlm_list_by_oe(oe).index(rlm) == 0: + # disable RLM from full power mode (AOP ~ 20dBm): write 0x00 to byte 0x80 on page 0xB2. + self.cpo_api.write_eeprom(oe=oe, page=0xB2, offset=0x80, num_bytes=1, write_buffer=bytearray([0x00])) + else: + # disable RLM from full power mode (AOP ~ 20dBm): write 0x00 to byte 0x80 on page 0xB6. + self.cpo_api.write_eeprom(oe=oe, page=0xB6, offset=0x80, num_bytes=1, write_buffer=bytearray([0x00])) + else: + if self.cpo_api.get_rlm_list_by_oe(oe).index(rlm) == 0: + # Enable RLM to full power mode (AOP ~ 20dBm): write 0xFF to byte 0x80 on page 0xB2. + self.cpo_api.write_eeprom(oe=oe, page=0xB2, offset=0x80, num_bytes=1, write_buffer=bytearray([0xFF])) + else: + # Enable RLM to full power mode (AOP ~ 20dBm): write 0xFF to byte 0x80 on page 0xB6. + self.cpo_api.write_eeprom(oe=oe, page=0xB6, offset=0x80, num_bytes=1, write_buffer=bytearray([0xFF])) + return True + + def _set_oe_enable(self, oe, enable): + if enable: + # # Exit low power mode: write 0x20 to byte 0x1A on page 0x00. enabled bit7, the broadcast bit. + # self.cpo_api.write_eeprom(oe=oe, page=0x00, offset=0x1A, num_bytes=1, write_buffer=bytearray([0xA0])) + # # Enable data path: write 0x00 to byte 0x80 on page 0x10. + # self.cpo_api.write_eeprom(oe=oe, page=0x10, offset=0x80, num_bytes=1, write_buffer=bytearray([0x00])) + # # Enable Tx: write 0x00 to byte 0x82 on page 0x10. + # self.cpo_api.write_eeprom(oe=oe, page=0x10, offset=0x82, num_bytes=1, write_buffer=bytearray([0x00])) + # # Exit low power mode: write 0x20 to byte 0x1A on page 0x00. + # self.cpo_api.write_eeprom(oe=oe, page=0x00, offset=0x1A, num_bytes=1, write_buffer=bytearray([0x20])) + + # Step 1: Soft Reset, bank0, byte 0x1A set to 0x18 + self.cpo_api.write_eeprom(oe=oe, page=0x00, offset=0x1A, num_bytes=1, write_buffer=bytearray([0x18])) + # Step 2: Wait 5 second + time.sleep(5) + # Step 3: Force stay at LowPwr Mode, and Broadcast En, bank0, byte 0x1A set to 0x90 + self.cpo_api.write_eeprom(oe=oe, page=0x00, offset=0x1A, num_bytes=1, write_buffer=bytearray([0x90])) + time.sleep(0.1) + # Step 4: Set bank0, page10h App Code 0x91-0x98 + # TODO + # Step 5: Set bank0, page10h byte 0x8F to 0xFF + self.cpo_api.write_eeprom(oe=oe, page=0x10, offset=0x8F, num_bytes=1, write_buffer=bytearray([0xFF])) + # Step 6: Set bank0, page10h byte 0x80-0x82 to 0x00 + self.cpo_api.write_eeprom(oe=oe, page=0x10, offset=0x80, num_bytes=1, write_buffer=bytearray([0x00])) + self.cpo_api.write_eeprom(oe=oe, page=0x10, offset=0x81, num_bytes=1, write_buffer=bytearray([0x00])) + self.cpo_api.write_eeprom(oe=oe, page=0x10, offset=0x82, num_bytes=1, write_buffer=bytearray([0x00])) + # Step 7: Set LowPwr Mode = False, and Broadcast En, bank0, byte 0x1A set to 0x80 + self.cpo_api.write_eeprom(oe=oe, page=0x00, offset=0x1A, num_bytes=1, write_buffer=bytearray([0x80])) + time.sleep(1) + else: + # # enter low power mode: write 0x30 to byte 0x1A on page 0x00. enabled bit7, the broadcast bit. + # self.cpo_api.write_eeprom(oe=oe, page=0x00, offset=0x1A, num_bytes=1, write_buffer=bytearray([0xB0])) + # # disable Tx: write 0xff to byte 0x82 on page 0x10. + # self.cpo_api.write_eeprom(oe=oe, page=0x10, offset=0x82, num_bytes=1, write_buffer=bytearray([0xff])) + # # disable data path: write 0xff to byte 0x80 on page 0x10. + # self.cpo_api.write_eeprom(oe=oe, page=0x10, offset=0x80, num_bytes=1, write_buffer=bytearray([0xff])) + # # enter low power mode: write 0x30 to byte 0x1A on page 0x00. + # self.cpo_api.write_eeprom(oe=oe, page=0x00, offset=0x1A, num_bytes=1, write_buffer=bytearray([0x30])) + + # enter low power mode: write 0x90 to byte 0x1A on page 0x00. enabled bit7, the broadcast bit. + self.cpo_api.write_eeprom(oe=oe, page=0x00, offset=0x1A, num_bytes=1, write_buffer=bytearray([0x90])) + # disable Tx: write 0xff to byte 0x82 on page 0x10. + self.cpo_api.write_eeprom(oe=oe, page=0x10, offset=0x82, num_bytes=1, write_buffer=bytearray([0xff])) + # disable data path: write 0xff to byte 0x80 on page 0x10. + self.cpo_api.write_eeprom(oe=oe, page=0x10, offset=0x80, num_bytes=1, write_buffer=bytearray([0xff])) + # disable the broadcast. + self.cpo_api.write_eeprom(oe=oe, page=0x00, offset=0x1A, num_bytes=1, write_buffer=bytearray([0x10])) + + return True + + def set_oe_enable(self, oe, enable): + if oe not in self.get_oe_list(): + return False + retval = True + try: + if not self.cpo_api._file_rw_lock(oe): + raise CpoException("eeprom file lock failed!") + retval = self._set_oe_enable(oe=oe, enable=enable) + except: + retval = False + finally: + self.cpo_api._file_rw_unlock(oe) + return retval + + def _get_oe_enable(self, oe): + raw_data = self.cpo_api.read_eeprom(oe=oe, page=0x00, offset=0x1A, num_bytes=1)[0] + # return True if oe is enabled + return (int(raw_data, 16) & 0x10) != 0x10 + + def get_oe_enable(self, oe): + if oe not in self.get_oe_list(): + # print("OE index out of range!") + return False, "OE index out of range!" + enable = False + try: + if not self.cpo_api._file_rw_lock(oe): + return False, "eeprom file lock failed!" + enable = self._get_oe_enable(oe) + except BaseException as err: + # print(traceback.format_exc()) + return False, "An error occurred: {}".format(str(err)) + finally: + self.cpo_api._file_rw_unlock(oe) + return True, enable + + def get_speed(self, port_index): + retval = 0 + try: + oe_index = self.cpo_api.get_oe_bank_by_port(port_index)["oe"] + if not self.cpo_api._file_rw_lock(oe_index): + raise CpoException("eeprom file lock failed!") + retval = self.cpo_api.get_speed(port_index) + except Exception as e: + print(str(e)) + retval = 0 + finally: + self.cpo_api._file_rw_unlock(oe_index) + return retval + + def set_speed(self, port_index, speed): + retval = True + try: + oe = self.cpo_api.get_oe_bank_by_port(port_index)["oe"] + if not self.cpo_api._file_rw_lock(oe): + raise CpoException("eeprom file lock failed!") + # self.set_oe_enable(oe, False) + # time.sleep(5) + retval = self.cpo_api.set_speed(port_index, speed) + except Exception as e: + print(str(e)) + retval = False + finally: + # self.set_oe_enable(oe, True) + # time.sleep(5) + self.cpo_api._file_rw_unlock(oe) + return retval + +class cpoutil_v2(cpoutilbase): + def __init__(self) -> None: + super().__init__() + + def get_rlm_sn(self, rlm_index): + if rlm_index not in self.get_rlm_list(): + return "RLM index out of range!" + oe = self.cpo_api.get_oe_by_rlm(rlm_index) + + if self.cpo_api.get_rlm_list_by_oe(oe).index(rlm_index) == 0: + RLM_PAGE_BASE_OFFSET = RLMA_PAGE_BASE_OFFSET + else: + RLM_PAGE_BASE_OFFSET = RLMB_PAGE_BASE_OFFSET + + rlm_info_dict = dict() + cpo_api = cpo_v1() + + try: + if not cpo_api._file_rw_lock(oe): + return "EEPROM file lock failed!" + + rlm_vendor_infomation_raw = cpo_api.read_eeprom(oe, RLM_VENDOR_INFOMATION_PAGE + RLM_PAGE_BASE_OFFSET, RLM_VENDOR_INFOMATION_OFFSET, RLM_VENDOR_INFOMATION_WIDTH) + + if rlm_vendor_infomation_raw is not None: + rlm_vendor_infomation_data = cpo_api.parse_vendor_infomation(rlm_vendor_infomation_raw, 0) + + rlm_info_dict['Vendor infomation'] = rlm_vendor_infomation_data['data']['Vendor infomation'] + + except CpoException: + rlm_info_dict = None + except BaseException: + rlm_info_dict = None + print(traceback.format_exc()) + finally: + cpo_api._file_rw_unlock(oe) + + if rlm_info_dict == None: + return "RLM eeprom get failed!" + + return rlm_info_dict + +type_of_module_state_and_interrupt = { + '00': "High power mode & Interrupt event occurred", + '01': "High power mode & Interrupt event cleared", + '02': "Low power mode & Interrupt event occurred", + '03': "Low power mode & Interrupt event cleared" +} + +type_of_module_low_power_control = { + '00': "High power mode", + '01': "Low power mode" +} + +type_of_identifier = { + '18': "QSFP-DD" +} + +class cpobase(object): + + def __init__(self) -> None: + self.version = 0.1 + self.eeprom_retry_times = 5 + self.eeprom_retry_break_sec = 0.2 + self.pidfile_dict = dict() + self.page_dict = dict() + self.bank_dict = dict() + self.oe_eeprom_lock_map = dict() + + def test_bit(self, n, bitpos): + try: + mask = 1 << bitpos + if (n & mask) == 0: + return 0 + else: + return 1 + except Exception: + return -1 + + def twos_comp(self, num, bits): + try: + if ((num & (1 << (bits - 1))) != 0): + num = num - (1 << bits) + return num + except Exception: + return 0 + + def mw_to_dbm(self, mW): + if mW == 0: + return float("-inf") + elif mW < 0: + return float("NaN") + return 10. * math.log10(mW) + + def power_in_dbm_str(self, mW): + return "%.4f%s" % (self.mw_to_dbm(mW), "dBm") + + # Convert Date to String + def convert_date_to_string(self, eeprom_data, offset, size): + try: + year_offset = 0 + month_offset = 2 + day_offset = 4 + lot_offset = 6 + + date = self.convert_hex_to_string(eeprom_data, offset, offset + size) + retval = "20"+ date[year_offset:month_offset] + "-" + \ + date[month_offset:day_offset] + "-" + \ + date[day_offset:lot_offset] + " " + \ + date[lot_offset:size] + except Exception as err: + retval = str(err) + return retval + + # Convert Hex to String + def convert_hex_to_string(self, arr, start, end): + try: + ret_str = '' + for n in range(start, end): + ret_str += arr[n] + return binascii.unhexlify(ret_str).decode("utf-8", "ignore").strip() + except Exception as err: + return str(err) + + def parse_rlm_element(self, eeprom_data, eeprom_ele, start_pos): + value = None + offset = eeprom_ele.get('offset') + start_pos + size = eeprom_ele.get('size') + type = eeprom_ele.get('type') + decode = eeprom_ele.get('decode') + bitmask = eeprom_ele.get('bitmask', None) + bitvalue_map = eeprom_ele.get('bitvalue_map', None) + + if type == 'enum': + # Get the matched value + if bitmask != None: + key_value_int = int(eeprom_data[offset], 16) & bitmask + key_value_str = str(hex(key_value_int)[2:].zfill(2)) + else: + key_value_str = str(eeprom_data[offset]) + value = decode.get(key_value_str, 'Unknown') + + elif type == 'bitmap': + # Get the 'on' bitname + bitvalue_dict = {} + for bitname, bitinfo in sorted(decode.items()): + bitinfo_offset = bitinfo.get('offset') + start_pos + bitinfo_pos = bitinfo.get('bit') + bitinfo_value = bitinfo.get('value') + data = int(eeprom_data[bitinfo_offset], 16) + bit_value = self.test_bit(data, bitinfo_pos) + if bitinfo_value != None: + if bit_value == bitinfo_value: + value = bitname + break + elif bit_value == 1: + value = bitname + break + + elif type == 'bitvalue': + # Get the value of the bit + bitpos = eeprom_ele.get('bit') + data = int(eeprom_data[offset], 16) + bitval = self.test_bit(data, bitpos) + if bitvalue_map != None: + value = bitvalue_map[bitval] + else: + value = ['Off', 'On'][bitval] + + elif type == 'func': + # Call the decode func to get the value + value = decode['func'](self, eeprom_data, + offset, size) + + elif type == 'str': + value = self.convert_hex_to_string(eeprom_data, offset, + offset + size) + + elif type == 'int': + value = int(eeprom_data[offset], 16) + if bitmask != None: + value = value & bitmask + + elif type == 'date': + value = self.convert_date_to_string(eeprom_data, offset, + size) + + elif type == 'hex': + if size == 1: + value = "0x{}".format(eeprom_data[offset]) + elif size > 1: + value = '-'.join(eeprom_data[offset:offset+size]) + + return value + + # Recursively parses sff data into dictionary + def parse_rlm(self, eeprom_map, eeprom_data, start_pos): + outdict = {} + for name, meta_data in sorted(eeprom_map.items()): + type = meta_data.get('type') + + # Initialize output value + value_dict = {} + value_dict['outtype'] = meta_data.get('outtype') + value_dict['short_name'] = meta_data.get('short_name') + + if type != 'nested': + data = self.parse_rlm_element(eeprom_data, + meta_data, start_pos) + else: + nested_map = meta_data.get('decode') + data = self.parse_rlm(nested_map, + eeprom_data, start_pos) + + if data != None: + value_dict['value'] = data + outdict[name] = value_dict + + return outdict + + def parse(self, eeprom_map, eeprom_data, start_pos): + """ Example Return format: + {'version': '1.0', 'data': {'Length50um(UnitsOf10m)': + {'outtype': None, 'value': 8, 'short_name': None}, + 'TransceiverCodes': {'outtype': None, 'value': + {'10GEthernetComplianceCode': {'outtype': None, 'value': + '10G Base-SR', 'short_name': None}}, 'short_name': None}, + 'ExtIdentOfTypeOfTransceiver': {'outtype': None, 'value': + 'GBIC/SFP func defined by two-wire interface ID', 'short_name': + None}, 'Length62.5um(UnitsOfm)': {'outtype': None,""" + + outdict = {} + return_dict = {} + + outdict = self.parse_rlm(eeprom_map, eeprom_data, start_pos) + + return_dict['version'] = self.version + return_dict['data'] = outdict + + return return_dict + + # Returns sff parsed data in a pretty dictionary format + def get_data_pretty_dict(self, indict): + outdict = {} + + for elem, elem_val in sorted(indict.items()): + value = elem_val.get('value') + if type(value) == dict: + outdict[elem] = self.get_data_pretty_dict(value) + else: + outdict[elem] = value + + return outdict + + def get_data_pretty(self, indata): + """Example Return format: + {'version': '1.0', 'data': {'Length50um(UnitsOf10m)': 8, + 'TransceiverCodes': {'10GEthernetComplianceCode': + '10G Base-SR'}, 'ExtIdentOfTypeOfTransceiver': 'GBIC/SFP func + defined by two-wire interface ID', 'Length62.5um(UnitsOfm)': 3, + 'VendorPN': 'FTLX8571D3BNL', 'RateIdentifier': 'Unspecified', + 'NominalSignallingRate(UnitsOf100Mbd)': 103, 'VendorOUI': ..}} + {'version': '1.0', 'data': {'AwThresholds': + {'TXPowerLowWarning': '-5.0004 dBm', 'TempHighWarning': + '88.0000C', 'RXPowerHighAlarm': '0.0000 dBm', + 'TXPowerHighAlarm': '-0.7998 dBm', 'RXPowerLowAlarm': + '-20.0000 dBm', 'RXPowerHighWarning': '-1.0002 dBm', + 'VoltageLowAlarm': '2.9000Volts'""" + + return_dict = {} + + return_dict['version'] = indata.get('version') + return_dict['data'] = self.get_data_pretty_dict(indata.get( + 'data')) + return return_dict + + def get_eeprom_path(self, oe): + raise NotImplementedError + + def read_eeprom(self, oe, page, offset, num_bytes): + self._oe_lock_auquire(oe) + try: + # temp solution for CPO byte0 bug, remove me when it fixed + if offset == 0: + self._switch_page(oe, page=0) + if offset >= 128: + self._switch_page(oe, page) + # for other page, need to convert flat_mem offset to single page offset + ret = self._read_eeprom(oe, offset, num_bytes) + except: + ret = None + finally: + self._oe_lock_release(oe) + + return ret + + def write_eeprom(self, oe, page, offset, num_bytes, write_buffer): + self._oe_lock_auquire(oe) + try: + # temp solution for CPO byte0 bug, remove me when it fixed + if offset == 0: + self._switch_page(oe, page=0) + if offset >= 128: + self._switch_page(oe, page) + # for other page, need to convert flat_mem offset to single page offset + ret = self._write_eeprom(oe, offset, num_bytes, write_buffer) + except: + ret = False + finally: + self._oe_lock_release(oe) + + return ret + + def _oe_lock_auquire(self, oe): + oe_lock = self.oe_eeprom_lock_map.get(oe, None) + if oe_lock == None: + oe_lock = threading.Lock() + self.oe_eeprom_lock_map[oe] = oe_lock + return oe_lock.acquire() + + def _oe_lock_release(self, oe): + oe_lock = self.oe_eeprom_lock_map.get(oe, None) + if oe_lock == None: + return None + return oe_lock.release() + + def _reset_page_bank_cache(self, oe): + self.page_dict[oe] = None + self.bank_dict[oe] = None + + def _switch_bank(self, oe, bank): + if self.bank_dict.get(oe, None) == bank: + return True + self.bank_dict[oe] = None + + bank_offset = 126 #0x7e + num_bytes = 1 + self._write_eeprom(oe, bank_offset, num_bytes, bytearray([bank])) + cur_bank = self._read_eeprom(oe, bank_offset, num_bytes)[0] + if cur_bank == bank: + self.bank_dict[oe] = cur_bank + return True + return False + + def _switch_page(self, oe, page): + if self.page_dict.get(oe, None) == page: + return True + self.page_dict[oe] = None + + page_offset = 127 #0x7f + num_bytes = 1 + self._write_eeprom(oe, page_offset, num_bytes, bytearray([page])) + cur_page = self._read_eeprom(oe, page_offset, num_bytes)[0] + if cur_page == page: + self.page_dict[oe] = cur_page + return True + return False + + def read_fpga(self, path, offset, num_bytes): + time.sleep(0.01) + eeprom_raw = [] + for i in range(0, num_bytes): + eeprom_raw.append("0x00") + try: + with open(path, mode='rb', buffering=0) as f: + f.seek(offset) + raw = f.read(num_bytes) + raw = bytearray(raw) + for n in range(0, num_bytes): + eeprom_raw[n] = hex(raw[n])[2:].zfill(2) + return eeprom_raw + except BaseException: + print(traceback.format_exc()) + # self._sfplog(LOG_ERROR_LEVEL, traceback.format_exc()) + pass + return None + + def _read_eeprom(self, oe, offset, num_bytes): + eeprom_raw = [] + for i in range(0, num_bytes): + eeprom_raw.append("0x00") + + try: + for i in range(self.eeprom_retry_times): + with open(self.get_eeprom_path(oe), mode='rb', buffering=0) as f: + f.seek(offset) + raw = f.read(num_bytes) + # temporary solution for a sonic202111 bug + raw = bytearray(raw) + + for n in range(0, num_bytes): + eeprom_raw[n] = hex(raw[n])[2:].zfill(2) + + return eeprom_raw + + except BaseException: + print(traceback.format_exc()) + # self._sfplog(LOG_ERROR_LEVEL, traceback.format_exc()) + pass + return None + + def _write_eeprom(self, oe, offset, num_bytes, write_buffer): + for i in range(self.eeprom_retry_times): + try: + with open(self.get_eeprom_path(oe), mode='r+b', buffering=0) as f: + f.seek(offset) + f.write(write_buffer[0:num_bytes]) + return True + except BaseException: + print(traceback.format_exc()) + time.sleep(self.eeprom_retry_break_sec) + return False + + def _file_rw_lock(self, oe): + pidfile = self.pidfile_dict.get(oe, None) + if pidfile == None: + pidfile = open(self.get_eeprom_path(oe), "r") + self.pidfile_dict[oe] = pidfile + if pidfile == None: + return False + # Retry 100 times to lock file + for i in range(0, 100): + try: + fcntl.flock(pidfile, fcntl.LOCK_EX | fcntl.LOCK_NB) + self._reset_page_bank_cache(oe) + return True + except Exception: + time.sleep(0.05) + continue + + pidfile.close() + self.pidfile_dict[oe] = None + return False + + def _file_rw_unlock(self, oe): + pidfile = self.pidfile_dict.get(oe, None) + if pidfile == None: + return True + try: + fcntl.flock(pidfile, fcntl.LOCK_UN) + pidfile.close() + self.pidfile_dict[oe] = None + return True + except Exception as e: + print("file unlock err, msg:%s" % (str(e))) + return False + + def calc_reversion(self, eeprom_data, offset, size): + # Management interface revision; the upper nibble is the whole number part and the lower nibble is the decimal part. + # Example: 01h indicates version 0.1, 21h indicates version 2.1. + int_data = int(eeprom_data[0], 16) + msb = (int_data & 0xF0) >> 4 + lsb = int_data & 0x0F + return ("{}.{}".format(int(msb), int(lsb))) + + def calc_maximum_power_consumption(self, eeprom_data, offset, size): + # Maximum worst case Module power consumption represented in increaments of 0.25w/bit. + # Example: 12W = 12/0.25 = 48 -->0x30 + try: + power_num = int(eeprom_data[offset], 16) + retval = '%.2f' %(power_num/4) + 'W' + except Exception as err: + retval = str(err) + return retval + + def calc_temperature(self, eeprom_data, offset, size): + # Internally measured temperature: signed 2’s complement in 1/256 degree Celsius increments + try: + cal_type = 1 + + msb = int(eeprom_data[offset], 16) + lsb = int(eeprom_data[offset + 1], 16) + + result = (msb << 8) | (lsb & 0xff) + result = self.twos_comp(result, 16) + + if cal_type == 1: + # Internal calibration + result = float(result / 256.0) + retval = '%.4f' %result + 'C' + else: + retval = 'Unknown' + except Exception as err: + retval = str(err) + + return retval + + def calc_voltage(self, eeprom_data, offset, size): + # Internally measured 3.3 Volt input supply voltage, signed 16 bit value in 100 μV increments + try: + cal_type = 1 + msb = int(eeprom_data[offset], 16) + lsb = int(eeprom_data[offset + 1], 16) + result = (msb << 8) | (lsb & 0xff) + if cal_type == 1: + # Internal Calibration + result = float(result * 0.0001) + #print(indent, name, ' : %.4f' %result, 'Volts') + retval = '%.4f' %result + 'Volts' + else: + #print(indent, name, ' : Unknown') + retval = 'Unknown' + except Exception as err: + retval = str(err) + return retval + + def calc_voltage_type_2(self, eeprom_data, offset, size): + # Internally measured laser bias voltage monitor. Unsigned integer in 10μV increments. + # print('Laser%d voltage: %.03f mV' % (i, pageL_data[58 + i] / 100)) + return '%.03f mV' % (int(eeprom_data[offset], 16)/100) + + def calc_bias(self, eeprom_data, offset, size): + # Internally measured laser bias current monitor. Unsigned integer in 100μA increments. + # print('Laser%d Current: %.03f mA' % (i, ((pageL_data[26 + 2 * i] * 256 + pageL_data[27 + 2 * i]) / 100))) + return '%.03f mA' % ((int(eeprom_data[offset], 16) * 256 + int(eeprom_data[offset + 1], 16))/100) + + def calc_power(self, eeprom_data, offset, size): + # Internally measured laser optical power monitor. Unsigned integer in 10μW increments. + # print('Laser%d power: %.03f mW %.03f dBm' % (i, PmW, Pdb)) + PmW = (int(eeprom_data[offset], 16) * 256 + int(eeprom_data[offset + 1], 16)) / 100 + if PmW > 0: + Pdb = 10 * math.log(PmW, 10) + else: + Pdb = -40 + return '%.03f mW %.03f dBm' % (PmW, Pdb) + + rlm_identifier = { + 'Identifier': { + 'offset':0, + 'size':1, + 'type': 'enum', + 'decode': type_of_identifier + } + } + + rlm_reversion = { + 'Reversion': { + 'offset':0, + 'size':1, + 'type': 'func', + 'decode': { + 'func': calc_reversion + } + } + } + + type_of_laser_grid = { + '00': "CWDM4", + '10': "DR4" + } + + laser_grid_and_count_items = { + 'Laser grid': { + 'offset': 0, + 'size': 1, + 'type': 'enum', + 'bitmask': 0x10, + 'decode': type_of_laser_grid + }, + # Number of lases implemented in module. Count start at 0. + 'Laser count': { + 'offset': 0, + 'size': 1, + 'type': 'int', + 'bitmask': 0x0F + } + } + + rlm_laser_grid_and_count = { + 'Laser grid and count': { + 'offset': 0, + 'size': 1, + 'type': 'nested', + 'decode': laser_grid_and_count_items + } + } + + rlm_module_state_and_interrupt = { + 'Module state & Interrupt': { + 'offset': 0, + 'size': 1, + 'type': 'enum', + 'decode': type_of_module_state_and_interrupt + } + } + + rlm_module_low_power_control = { + 'Module low power control': { + 'offset': 0, + 'size': 1, + 'type': 'enum', + 'decode': type_of_module_low_power_control + } + } + + def laser_mask_gen(key, bitvalue_map=None): + output = dict() + for offset in range(2): + for bit in range(8): + output["Laser{:02d} {}".format(bit+offset*8, key)] = { + "offset": offset, + "bit": bit, + "type": 'bitvalue', + "bitvalue_map": bitvalue_map + } + return output + + laser_active_status_masks = laser_mask_gen("active status", ["Inactive", "Active"]) + laser_disable_control_masks = laser_mask_gen("disable control", ["Enable", "Disable"]) + + vcc_and_temperature_warning_alarm_masks = { + 'Latched high temperature alarm flag': + {'offset':0, + 'bit': 0, + 'type': 'bitvalue'}, + 'Latched low temperature alarm flag': + {'offset':0, + 'bit': 1, + 'type': 'bitvalue'}, + 'Latched high temperaturer warning flag': + {'offset':0, + 'bit': 2, + 'type': 'bitvalue'}, + 'Latched low temperature warning flag': + {'offset':0, + 'bit': 3, + 'type': 'bitvalue'}, + 'Latched high Vcc alarm flag': + {'offset':0, + 'bit': 4, + 'type': 'bitvalue'}, + 'Latched low Vcc alarm flag': + {'offset':0, + 'bit': 5, + 'type': 'bitvalue'}, + 'Latched high Vcc warning flag': + {'offset':0, + 'bit': 6, + 'type': 'bitvalue'}, + 'Latched low Vcc warning flag': + {'offset':0, + 'bit': 7, + 'type': 'bitvalue'}, + } + + rlm_laser_disable_control = { + 'Laser disable control': { + 'offset': 0, + 'size': 2, + 'type': 'nested', + 'decode': laser_disable_control_masks + } + } + + rlm_laser_active_status = { + 'Laser active status': { + 'offset': 0, + 'size': 2, + 'type': 'nested', + 'decode': laser_active_status_masks + } + } + + rlm_vcc_and_temperature_warning_alarm = { + "Vcc 3.3V & Temperature low/high warning/alarm": { + 'offset': 0, + 'size': 1, + 'type': 'nested', + 'decode': vcc_and_temperature_warning_alarm_masks + } + } + + laser_bias_warning_masks = laser_mask_gen("bias warning") + laser_bias_alarm_masks = laser_mask_gen("bias alarm") + + rlm_laser_bias_warning = { + "Laser bias warning": { + 'offset': 0, + 'size': 2, + 'type': 'nested', + 'decode': laser_bias_warning_masks + } + } + + rlm_laser_bias_alarm = { + "Laser bias alarm": { + 'offset': 0, + 'size': 2, + 'type': 'nested', + 'decode': laser_bias_alarm_masks + } + } + + rlm_module_temperature_monitor = { + 'Module Temperature Monitor': { + 'offset': 0, + 'size': 2, + 'type': 'func', + 'decode': { + 'func': calc_temperature + } + } + } + + rlm_module_supply_voltage_monitor = { + 'Module supply voltage Monitor': { + 'offset': 0, + 'size': 2, + 'type': 'func', + 'decode': { + 'func': calc_voltage + } + } + } + + rlm_vendor_infomation_items = { + 'Vendor Name': { + 'offset': 0, + 'size': 16, + 'type': 'str' + }, + 'Vendor OUI': { + 'offset': 16, + 'size': 3, + 'type': 'hex' + }, + 'Vendor PN': { + 'offset': 19, + 'size': 16, + 'type': 'str' + }, + 'Vendor Rev': { + 'offset': 35, + 'size': 2, + 'type': 'str' + }, + 'Vendor SN': { + 'offset': 37, + 'size': 16, + 'type': 'str' + }, + # 'Vendor Date Code(YYYY-MM-DD Lot)': { + 'Vendor Date': { + 'offset': 53, + 'size': 8, + 'type': 'date' + } + } + + # TODO: CLEI Code + + rlm_vendor_infomation = { + 'Vendor infomation': { + 'offset': 0, + 'size': 61, + 'type': 'nested', + 'decode': rlm_vendor_infomation_items + } + } + + rlm_maximum_power_consumption = { + 'Maximum power consumption': { + 'offset': 0, + 'size': 1, + 'type': 'func', + 'decode': { + 'func': calc_maximum_power_consumption + } + } + } + + rlm_laser_power_mode_control = { + 'Laser power mode control': { + 'offset': 0, + 'size': 1, + 'type': 'hex' + } + } + + rlm_dom_threshold_items = { + 'Temp High Alarm': { + 'offset': 0, + 'size': 2, + 'type': 'func', + 'decode': { + 'func': calc_temperature + } + }, + 'Temp Low Alarm': { + 'offset': 2, + 'size': 2, + 'type': 'func', + 'decode': { + 'func': calc_temperature + } + }, + 'Temp High Warning': { + 'offset': 4, + 'size': 2, + 'type': 'func', + 'decode': { + 'func': calc_temperature + } + }, + 'Temp Low Warning': { + 'offset': 6, + 'size': 2, + 'type': 'func', + 'decode': { + 'func': calc_temperature + } + }, + 'Vcc High Alarm': { + 'offset': 8, + 'size': 2, + 'type': 'func', + 'decode': { + 'func': calc_voltage + } + }, + 'Vcc Low Alarm': { + 'offset': 10, + 'size': 2, + 'type': 'func', + 'decode': { + 'func': calc_voltage + } + }, + 'Vcc High Warning': { + 'offset': 12, + 'size': 2, + 'type': 'func', + 'decode': { + 'func': calc_voltage + } + }, + 'Vcc Low Warning': { + 'offset': 14, + 'size': 2, + 'type': 'func', + 'decode': { + 'func': calc_voltage + } + }, + 'TX Power High Alarm': { + 'offset': 16, + 'size': 2, + 'type': 'func', + 'decode': { + 'func': calc_power + } + }, + 'TX Power Low Alarm': { + 'offset': 18, + 'size': 2, + 'type': 'func', + 'decode': { + 'func': calc_power + } + }, + 'TX Power High Warning': { + 'offset': 20, + 'size': 2, + 'type': 'func', + 'decode': { + 'func': calc_power + } + }, + 'TX Power Low Warning': { + 'offset': 22, + 'size': 2, + 'type': 'func', + 'decode': { + 'func': calc_power + } + }, + 'Tx Bias High Alarm': { + 'offset': 24, + 'size': 2, + 'type': 'func', + 'decode': { + 'func': calc_bias + } + }, + 'Tx Bias High Warning': { + 'offset': 26, + 'size': 2, + 'type': 'func', + 'decode': { + 'func': calc_bias + } + } + } + + rlm_dom_threshold = { + 'ThresholdValues': { + 'offset': 0, + 'size': 28, + 'type': 'nested', + 'decode': rlm_dom_threshold_items + } + } + + def laser_items_gen(key, func, offset, size): + output = dict() + laser_size = int(size/16) + for laser_index in range(16): + output["Laser{:02d} {}".format(laser_index, key)] = { + "offset": offset + laser_size * laser_index, + "size": laser_size, + "type": 'func', + 'decode': { + 'func': func + } + } + return output + + rlm_monitor_values = { + 'Laser current monitor': { + 'offset': 0, + 'size': 32, + 'type': 'nested', + 'decode': laser_items_gen('current monitor', calc_bias, 0, 32) + }, + 'Laser voltage monitor': { + 'offset': 32, + 'size': 16, + 'type': 'nested', + 'decode': laser_items_gen('voltage monitor', calc_voltage_type_2, 32, 16) + }, + 'Laser opitcal power monitor': { + 'offset': 49, + 'size': 32, + 'type': 'nested', + 'decode': laser_items_gen('opitcal power monitor', calc_power, 49, 32) + } + } + + def calc_tec_current_monitor(self, eeprom_data, offset, size): + # TEC current monitor signed 2's complement number in 1/32767% increments + # +32767 is max TEC current (100%) - Max heating + # -32767 is min TEC current (100%) - Max cooling + try: + cal_type = 1 + msb = int(eeprom_data[offset], 16) + lsb = int(eeprom_data[offset + 1], 16) + result = (msb << 8) | (lsb & 0xff) + result = self.twos_comp(result, 16) + if cal_type == 1: + result = float(result / 32767)*100 + retval = '%.2f' %result + '%' + else: + #print(indent, name, ' : Unknown') + retval = 'Unknown' + except Exception as err: + retval = str(err) + return retval + + rlm_tec_current_monitor = { + 'TEC current monitor': { + 'offset': 0, + 'size': 2, + 'type': 'func', + 'decode': { + 'func': calc_tec_current_monitor + } + } + } + + def parse_identifier(self, sn_raw_data, start_pos): + return self.get_data_pretty(self.parse(self.rlm_identifier, sn_raw_data, start_pos)) + + def parse_reversion(self, sn_raw_data, start_pos): + return self.get_data_pretty(self.parse(self.rlm_reversion, sn_raw_data, start_pos)) + + def parse_laser_grid_and_count(self, sn_raw_data, start_pos): + return self.get_data_pretty(self.parse(self.rlm_laser_grid_and_count, sn_raw_data, start_pos)) + + def parse_module_state_and_interrupt(self, sn_raw_data, start_pos): + return self.get_data_pretty(self.parse(self.rlm_module_state_and_interrupt, sn_raw_data, start_pos)) + + def parse_module_low_power_control(self, sn_raw_data, start_pos): + return self.get_data_pretty(self.parse(self.rlm_module_low_power_control, sn_raw_data, start_pos)) + + def parse_laser_disable_control(self, sn_raw_data, start_pos): + return self.get_data_pretty(self.parse(self.rlm_laser_disable_control, sn_raw_data, start_pos)) + + def parse_laser_active_status(self, sn_raw_data, start_pos): + return self.get_data_pretty(self.parse(self.rlm_laser_active_status, sn_raw_data, start_pos)) + + def parse_vcc_and_temperature_warning_alarm(self, sn_raw_data, start_pos): + return self.get_data_pretty(self.parse(self.rlm_vcc_and_temperature_warning_alarm, sn_raw_data, start_pos)) + + def parse_laser_bias_warning(self, sn_raw_data, start_pos): + return self.get_data_pretty(self.parse(self.rlm_laser_bias_warning, sn_raw_data, start_pos)) + + def parse_laser_bias_alarm(self, sn_raw_data, start_pos): + return self.get_data_pretty(self.parse(self.rlm_laser_bias_alarm, sn_raw_data, start_pos)) + + def parse_module_temperature_monitor(self, sn_raw_data, start_pos): + return self.get_data_pretty(self.parse(self.rlm_module_temperature_monitor, sn_raw_data, start_pos)) + + def parse_module_supply_voltage_monitor(self, sn_raw_data, start_pos): + return self.get_data_pretty(self.parse(self.rlm_module_supply_voltage_monitor, sn_raw_data, start_pos)) + + def parse_vendor_infomation(self, sn_raw_data, start_pos): + return self.get_data_pretty(self.parse(self.rlm_vendor_infomation, sn_raw_data, start_pos)) + + def parse_maximum_power_consumption(self, sn_raw_data, start_pos): + return self.get_data_pretty(self.parse(self.rlm_maximum_power_consumption, sn_raw_data, start_pos)) + + def parse_laser_power_mode_control(self, sn_raw_data, start_pos): + return self.get_data_pretty(self.parse(self.rlm_laser_power_mode_control, sn_raw_data, start_pos)) + + # TODO + def parse_dom_threshold(self, sn_raw_data, start_pos): + return self.get_data_pretty(self.parse(self.rlm_dom_threshold, sn_raw_data, start_pos)) + + def parse_monitor_values(self, sn_raw_data, start_pos): + return self.get_data_pretty(self.parse(self.rlm_monitor_values, sn_raw_data, start_pos)) + + def parse_tec_current_monitor(self, sn_raw_data, start_pos): + return self.get_data_pretty(self.parse(self.rlm_tec_current_monitor, sn_raw_data, start_pos)) + + +class cpo_cust(cpobase): + + def __init__(self): + super().__init__() + self.port_mapping = Port_Mapping() + + def get_oe_list(self): + return CPO_PLATFORM_CONFIG.get("oe_index_list", list()) + + def get_rlm_list_by_oe(self, oe): + rlm_oe_map = CPO_PLATFORM_CONFIG.get("rlm_oe_map", dict()) + rlm_list = list() + for rlm_index, oe_index in rlm_oe_map.items(): + if oe_index != oe: + continue + rlm_list.append(rlm_index) + return rlm_list + + def get_rlm_list(self): + return CPO_PLATFORM_CONFIG.get("rlm_index_list", list()) + + def get_oe_by_rlm(self, rlm): + rlm_oe_map = CPO_PLATFORM_CONFIG.get("rlm_oe_map", dict()) + return rlm_oe_map.get(rlm, None) + + def get_port_index_list(self): + return PORT_INDEX_LIST + + def get_port_index_list_by_oe(self, oe_index): + return self.port_mapping.oe_index_to_port_index_list(oe_index) + + def get_oe_by_port_index(self, port_index): + return self.port_mapping.port_index_to_oe_index(port_index) + + def get_bank_by_port_index(self, port_index): + bank_global_index = self.port_mapping.port_index_to_bank_index(port_index) + return self.port_mapping.bank_global_index_to_local_index(bank_global_index) + + def write_eeprom_by_port_index(self, port_index, page, offset, num_bytes, write_buffer): + oe = self.get_oe_bank_by_port(port_index)["oe"] + bank = self.get_oe_bank_by_port(port_index)["bank"] + # TODO: should lock oe + self._switch_bank(oe, bank) + return self.write_eeprom(oe, page, offset, num_bytes, write_buffer) + + def read_eeprom_by_port_index(self, port_index, page, offset, num_bytes): + oe = self.get_oe_bank_by_port(port_index)["oe"] + bank = self.get_oe_bank_by_port(port_index)["bank"] + # TODO: should lock oe + self._switch_bank(oe, bank) + return self.read_eeprom(oe, page, offset, num_bytes) + + def get_eeprom_path(self, oe_index): + return OE_I2C_PATH_MAP.get(oe_index, None) + + def get_oe_bank_by_port(self, port_index): + if port_index not in self.get_port_index_list(): + raise CpoException("port_index out of range") + oe = self.get_oe_by_port_index(port_index) + bank = self.get_bank_by_port_index(port_index) + lane_list = self.port_mapping.get_port_lane_list(port_index) + lane = lane_list[0] + return {"oe": oe, "bank": bank, "lane": lane} + + def get_speed(self, port_index): + lane = self.get_oe_bank_by_port(port_index)["lane"] + + if lane == 0: + apsel_contrl_value = int(self.read_eeprom_by_port_index(port_index, 0x11, 0xce, 1)[0], 16) + else: + apsel_contrl_value = int(self.read_eeprom_by_port_index(port_index, 0x11, 0xd2, 1)[0], 16) + + apsel_contrl_value = apsel_contrl_value & 0xF0 + + if apsel_contrl_value == 0x10: + return 400000 + elif apsel_contrl_value == 0x20: + return 200000 + elif apsel_contrl_value == 0x40: + return 100000 + else: + raise CpoException("speed out of range, apsel_contrl_value: {}".format(apsel_contrl_value)) + + def get_rlm_presence(self, rlm): + presence = False + oe = self.get_oe_by_rlm(rlm) + if self.get_rlm_list(oe).index(rlm) == 0: + RLM_PAGE_BASE_OFFSET = RLMA_PAGE_BASE_OFFSET + else: + RLM_PAGE_BASE_OFFSET = RLMB_PAGE_BASE_OFFSET + try: + if not self._file_rw_lock(oe): + return False + rlm_vendor_infomation_raw = self.read_eeprom(oe, RLM_VENDOR_INFOMATION_PAGE + RLM_PAGE_BASE_OFFSET, RLM_VENDOR_INFOMATION_OFFSET, RLM_VENDOR_INFOMATION_WIDTH) + rlm_b1_checksum_raw = self.read_eeprom(oe, RLM_B1_CEHCK_SUM_PAGE + RLM_PAGE_BASE_OFFSET, RLM_B1_CEHCK_SUM_OFFSET, RLM_B1_CEHCK_SUM_WIDTH) + b1_page_sum = sum([int(byte, 16) for byte in rlm_vendor_infomation_raw])&0xff + if b1_page_sum != int(rlm_b1_checksum_raw[0], 16): + raise CpoException("page b1 byte 80 to byte 250 checksum failed, {} != {}".format(b1_page_sum, int(rlm_b1_checksum_raw[0], 16))) + if b1_page_sum != 0: + presence = True + except CpoException: + pass + except BaseException: + print(traceback.format_exc()) + finally: + self._file_rw_unlock(oe) + return presence + + def reset_oe(self, oe_list: list): + byte = 0xff + oe_list = [oe_index - CPO_PLATFORM_CONFIG.get("oe_index_start_index") for oe_index in oe_list] + for oe_index in oe_list: + byte = byte & ~(0x01 << oe_index) + result = os_command_i2cset_oe_reset_byte(byte) + if result != 0: + return False + time.sleep(0.5) + result = os_command_i2cset_oe_reset_byte("0xff") + time.sleep(5) + return result == 0 + +class cpo_v1(cpo_cust): + def __init__(self): + super().__init__() + self.presence_fpga_dict = CPO_PLATFORM_CONFIG.get("rlm_presence_fpga_dict", {}) + + def get_rlm_presence(self, rlm_index): + presence = False + if self.presence_fpga_dict == None: + return presence + try: + for dev, dev_value in self.presence_fpga_dict.items(): + for offset, offset_value in dev_value["offset"].items(): + if rlm_index not in offset_value: + continue + fpga_data = self.read_fpga(dev, int(offset, 16), 4) + if fpga_data == None: + continue + rlm_bit_index = offset_value.index(rlm_index) + presence = (~int(fpga_data[rlm_bit_index // 8], 16)) & (0x1 << (rlm_bit_index % 8)) + return presence + except BaseException: + print(traceback.format_exc()) + return presence + +class cmis_memory_map(cmis_memory_helper_base): + + def __init__(self, oe_index, bank_index=0) -> None: + super().__init__() + self.oe_index = oe_index + self.bank_index = bank_index + self.retry_times = 20 + + def read(self, page, addr, rd_len=1): + retry_count = 0 + status, output = cmis_util.cmis_read(self.oe_index, self.bank_index, page, addr, rd_len, lock=True) + if status == True: + helper_logger.log_trace("cmis_read, status: {}, page: {}, bank: {}, addr: {}, output: {}".format( + status, page, self.bank_index, addr, [hex(data) for data in output])) + while (status == False) and (retry_count < self.retry_times): + helper_logger.log_trace("cmis_read, status: {}, page: {}, bank: {}, addr: {}, output: {}".format( + status, page, self.bank_index, addr, output)) + retry_count += 1 + status, output = cmis_util.cmis_read(self.oe_index, self.bank_index, page, addr, rd_len, lock=True) + time.sleep(0.05) + if status == True: + helper_logger.log_trace("cmis_read, status: {}, page: {}, bank: {}, addr: {}, output: {}".format( + status, page, self.bank_index, addr, [hex(data) for data in output])) + return status, output + + def write(self, page, addr, data): + retry_count = 0 + status, output = cmis_util.cmis_write(self.oe_index, self.bank_index, page, addr, data, lock=True) + helper_logger.log_trace("cmis_write, status: {}, page: {}, bank: {}, addr: {}, input: {}".format( + status, page, self.bank_index, addr, [hex(item) for item in data])) + while (status == False) and (retry_count < self.retry_times): + helper_logger.log_trace("cmis_write, status: {}, page: {}, bank: {}, addr: {}, input: {}".format( + status, page, self.bank_index, addr, [hex(item) for item in data])) + retry_count += 1 + status, output = cmis_util.cmis_write(self.oe_index, self.bank_index, page, addr, data, lock=True) + time.sleep(0.05) + return status, output + +def get_all_oe_vendor_info(): + global cmis_util + cpoutil = cpoutil_v2() + ret = dict() + for oe_index in cpoutil.get_oe_list(): + cmis_util = oe_cmis_sysfs_rw() + cmis_mem = cmis_memory_map(oe_index) + ret[oe_index] = cmis_mem.get_field("Vendor infomation") + return ret + +def get_all_rlm_vendor_info(): + ret_dict = dict() + cpoutil = cpoutil_v2() + for rlm_index in cpoutil.get_rlm_list(): + rlm_vendor_info_dict = cpoutil.get_rlm_sn(rlm_index) + ret_dict[rlm_index] = rlm_vendor_info_dict["Vendor infomation"] + return ret_dict diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/cpo/lib/fw_tools/__init__.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/cpo/lib/fw_tools/__init__.py new file mode 100755 index 00000000000..e03e4ff9fba --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/cpo/lib/fw_tools/__init__.py @@ -0,0 +1,7 @@ +import sys +import os +sys.path.append(os.path.dirname(os.path.realpath(__file__))) +import cdb_app +import cmis +import i2c_driver +import utility \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/cpo/lib/fw_tools/cdb_app/__init__.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/cpo/lib/fw_tools/cdb_app/__init__.py new file mode 100755 index 00000000000..f19e5cb1d90 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/cpo/lib/fw_tools/cdb_app/__init__.py @@ -0,0 +1,3 @@ +import sys +import os +sys.path.append(os.path.dirname(os.path.realpath(__file__))) \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/cpo/lib/fw_tools/cdb_app/cdb.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/cpo/lib/fw_tools/cdb_app/cdb.py new file mode 100755 index 00000000000..c5cc8a754c4 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/cpo/lib/fw_tools/cdb_app/cdb.py @@ -0,0 +1,1084 @@ +""" +file cdb.py +author Broadcom OSD Firmware Team +date 09/22/2022 +version 1.01 - added file directory to path in order to import same level modules + +property $ Copyright: (c) 2022 Broadcom Limited All Rights Reserved $ + No portions of this material may be reproduced in any form + without the written permission of: + Broadcom Limited + 408 E. Plumeria Drive + San Jose, California 95134 + United States + All information contained in this document/file is Broadcom Limit company + private proprietary, trade secret, and remains the property of Broadcom + Limited. The intellectual and technical concepts contained herein are + proprietary to Broadcom Limited and may be covered by U.S. and Foreign Patents, + patents in process, and are protected by trade secret or copyright law. + Dissemination of this information or reproduction of this material is strictly + forbidden unless prior written permission is obtained from Broadcom Limited. + +brief This file includes all the cdb utilities + +section +""" +import os +import sys +import subprocess +import re +from util import UtilObj as u +import cmis_mcu_i2c as cmis_smb +from GS_timing import * +from array import array +from os import path +import math +import logging +import time +from oe_cmis_rw import oe_cmis_i2c_rw as oe_cmis_util + +logger = logging.getLogger() + +logger = logging.getLogger(__name__) +logger.setLevel(logging.INFO) +logger.addHandler(logging.StreamHandler(sys.stdout)) + +class cdb_cmd_fields(): + cmd_code_msb = 0x00 + cmd_code_lsb = 0x01 + epl_len_msb = 0x02 + epl_len_lsb = 0x03 + lpl_len = 0x04 + check_code = 0x05 + pwd_0 = 0x08 + addr_0 = 0x08 + pwd_1 = 0x09 + addr_1 = 0x09 + pwd_2 = 0x0A + addr_2 = 0x0A + pwd_3 = 0x0B + addr_3 = 0x0B + + +class cdbObj(object): + driver_obj = None + cmd_data = [0x00] * 12 + + def __init__(self, oe_num=0): + self.cmis_i2c = cmis_smb.cmis_mcu_mezz_smb(oe_mcu=oe_num) + self.oe_mcu = oe_num + self.cmis_util = oe_cmis_util() + + def __enter__(self): + self.cmis_i2c.open() + return self + + def __exit__(self, exc_type, exc_val, exc_tb): + self.cmis_i2c.close() + return + + def open(self): + self.cmis_i2c.open() + + def close(self): + self.cmis_i2c.close() + + def exec_rd_cmd(self, offset, rd_len, bank_num=0, page_num=0, verbose=False): + i = 0 + timeout = 25 + while i <= timeout: + try: + status, output = self.cmis_util.cmis_read(self.oe_mcu, bank_num, page_num, offset, rd_len, lock=False) + if status != True: + raise CdbException("oe_cmis_sysfs_rw READ ERROR {}".format(output)) + else: + break + except CdbException as e: + if (verbose == True): + print("An error occurred: {}".format(str(e))) + raise cmis_smb.cmis_mcu_mezz_smb_Exception('Exception on cmis_read') + if isinstance(output, list): + result = array('B', output) + else: + result = array('B', []) + return result + + def exec_wr_cmd(self, offset, wr_data_arr, bank_num=0x0, page_num=0x0, verbose=False): + try: + status, output = self.cmis_util.cmis_write(self.oe_mcu, bank_num, page_num, offset, wr_data_arr, lock=False) + if status != True: + raise CdbException("oe_cmis_sysfs_rw WRITE ERROR {}".format(output)) + except CdbException as e: + if (verbose == True): + print("An error occurred: {}".format(str(e))) + raise cmis_smb.cmis_mcu_mezz_smb_Exception('Exception on cmis_write') + offset = offset + 1 + + def set_cmd_field(self, field, val): + self.cmd_data[field] = val + + def set_word_field(self, field_msb, val): + data = [(val >> 8) & 0xFF, val & 0xFF] + self.cmd_data[field_msb] = data[0] + self.cmd_data[field_msb + 1] = data[1] + + def set_dword_field(self, field_msb, val): + data = [(val >> 24) & 0xFF, (val >> 16) & 0xFF, (val >> 8) & 0xFF, val & 0xFF] + self.cmd_data[field_msb] = data[0] + self.cmd_data[field_msb + 1] = data[1] + self.cmd_data[field_msb + 2] = data[2] + self.cmd_data[field_msb + 3] = data[3] + + def set_pwd_field(self, pwd): + self.set_cmd_field(cdb_cmd_fields.pwd_0, pwd[0]) + self.set_cmd_field(cdb_cmd_fields.pwd_1, pwd[1]) + self.set_cmd_field(cdb_cmd_fields.pwd_2, pwd[2]) + self.set_cmd_field(cdb_cmd_fields.pwd_3, pwd[3]) + + def clear_cmd_fields(self): + for i in range(len(self.cmd_data)): + self.cmd_data[i] = 0x00 + + def write_cmd_fields(self): + # self.cmis_i2c.set_page(0x9F) # set page + # self.cmis_i2c.reg_write(0x82, self.cmd_data[2:]) # write cmd fields + # self.cmis_i2c.reg_write(0x80, self.cmd_data[:2]) # write cmd + self.exec_wr_cmd(0x82, self.cmd_data[2:], 0, 0x9F) + self.exec_wr_cmd(0x80, self.cmd_data[:2], 0, 0x9F) + + def set_check_code(self, data_len=None, more_data=None): + check_sum = 0 + check_len = len(self.cmd_data) + if data_len is not None: + check_len = data_len + for i in range(check_len): + check_sum += self.cmd_data[i] + if more_data: + for data in more_data: + check_sum += data + check_sum ^= 0xFF + check_sum &= 0xFF + self.set_cmd_field(cdb_cmd_fields.check_code, check_sum) + + def poll_reg_status(self, status_reg, status_val, delay_ms=20, retry=100, ack_poll=False, verbose=False): + if ack_poll: + if not self.cmis_i2c.acknowledge_poll(timeout_ms=1000): + raise CdbException("Device I2C Nacked") + status = array('B', [status_val ^ 0xFF]) + reg_data = status_reg + if type(status_reg) != int: + reg_data = status_reg.value + for i in range(retry): + status = self.exec_rd_cmd(reg_data, 1) + # self.cmis_i2c.reg_read(reg_data, status) + if verbose: + print("Status: %02X Retry Counts: %d" % (status[0], i)) + if status[0] == status_val: + return True, status[0] + delay(delay_ms) + + return (status[0] == status_val), status[0] + + def poll_status(self, delay_ms=1, timeout=10000, force=False, get_ret=False, verbose=True): + i = 0 + status = array('B', [0]) + fw_mode = array('B', [0x55]) + while i <= timeout: + try: + status = self.exec_rd_cmd(0x25, 1) + fw_mode = self.exec_rd_cmd(0x53, 1) + # self.cmis_i2c.reg_read(0x25, status, verbose=False) + # self.cmis_i2c.reg_read(0x53, fw_mode, verbose=False) + except cmis_smb.cmis_mcu_mezz_smb_Exception: # module i2c not ready, continue to ack poll + delay(delay_ms) + i += 1 + continue + # if verbose: + # logger.debug("Status %02X Mode %02X" % (status[0], fw_mode[0])) + if not force and fw_mode[0] != 0xAA and status[0] == 0 and i > 500: # check if system is still in cdb mode, if not then probbaly reset happened + logger.error('CMD Readback Fw Mode: %02X Status Code: %02X' % (fw_mode[0], status[0])) + logger.error('CMD Failed Polling Status, Reset Occurred') + raise CdbException('CDB Mode Is No Longer Valid, A System Reset May Have Occurred') + if status[0] == 0x01: # if status is success + return True, status[0] + if (status[0] & 0x80 == 0x00) and (status[0] & 0xF0 == 0x40): # if currently not busy and failed bit is set + try: + status = self.exec_rd_cmd(0x25, 1) + # self.cmis_i2c.reg_read(0x25, status) # read the status one more time to make sure that it wasn't just the previous latched status + except cmis_smb.cmis_mcu_mezz_smb_Exception: # module i2c not ready, continue to ack poll + raise CdbException('I2C Nacked on Status Read') + if status[0] == 0x01: + return True, status[0] + if (status[0] & 0xF0 == 0x40): # check for failure again + if get_ret: + return False, status[0] + else: + logger.error('CMD Failed Status Code: %02X' % status[0]) + raise CdbException('CMD Failed Status Code: %02X' % status[0]) + delay(delay_ms) + i += 1 + if verbose: + logger.debug('CMD Poll Time Out Status Code: %02X' % status[0]) + return False, status[0] + + def cdb_unlock(self, poll_count=2, delay_s=1): + pwd = [0x00, 0x00, 0x10, 0x11] + for i in range(poll_count): + logger.debug('CDB Unlock Poll Count: %d' % i) + self.clear_cmd_fields() + self.set_pwd_field(pwd) + self.set_cmd_field(cdb_cmd_fields.lpl_len, 0x04) + self.set_word_field(cdb_cmd_fields.cmd_code_msb, 0x0001) + self.set_check_code() + self.write_cmd_fields() + ret, status = self.poll_status(delay_ms=100, timeout=100, force=True, verbose=True) + if ret: + return True + elif status == 0x46: + pwd[1] ^= 0x01 + delay(delay_s * 1000) + ret, status = self.poll_status(delay_ms=100, timeout=100, force=True, verbose=True) + if ret: + return True + else: + logger.error('CDB Failed to Unlock.') + raise CdbException('CDB Failed to Unlock.') + return False + + def cdb_lock(self, poll_count=2, delay_s=1): + pwd = [0x12, 0x34, 0x56, 0x78] + for i in range(poll_count): + logger.debug('CDB Unlock Poll Count: %d' % i) + self.clear_cmd_fields() + self.set_pwd_field(pwd) + self.set_cmd_field(cdb_cmd_fields.lpl_len, 0x04) + self.set_word_field(cdb_cmd_fields.cmd_code_msb, 0x0001) + self.set_check_code() + self.write_cmd_fields() + ret, status = self.poll_status(delay_ms=100, timeout=100, force=True, get_ret=True, verbose=True) + if status == 0x46: + return True + delay(delay_s * 1000) + ret, status = self.poll_status(delay_ms=100, timeout=100, force=True, get_ret=True, verbose=True) + if status == 0x46: + return True + else: + logger.error('CDB Failed to Lock.') + raise CdbException('CDB Failed to Lock.') + return False + + @staticmethod + def process_fw_status(fw_info, fw_info_extra=None, more=False): + img_1 = 'A' + img_2 = 'B' + fw_ver_1 = "%02X.%02X" % (fw_info[2], fw_info[3]) + fw_ver_2 = "%02X.%02X" % (fw_info[38], fw_info[39]) + if more: + fw_ver_1 = '%02X.%02X.%02X' % (fw_info[2], fw_info[3], fw_info[4]) + fw_ver_2 = '%02X.%02X.%02X' % (fw_info[38], fw_info[39], fw_info[40]) + fw_crc_1 = '%02X%02X%02X%02X' % (fw_info[6], fw_info[7], fw_info[8], fw_info[9]) + fw_crc_2 = '%02X%02X%02X%02X' % (fw_info[42], fw_info[43], fw_info[44], fw_info[45]) + ee_ver_1 = '%02X.%02X.%02X' % (fw_info[10], fw_info[11], fw_info[12]) + ee_ver_2 = '%02X.%02X.%02X' % (fw_info[46], fw_info[47], fw_info[48]) + ee_crc_1 = '%02X%02X%02X%02X' % (fw_info[13], fw_info[14], fw_info[15], fw_info[16]) + ee_crc_2 = '%02X%02X%02X%02X' % (fw_info[49], fw_info[50], fw_info[51], fw_info[52]) + if fw_info_extra is not None: + oe_fw_ver_1 = '%08X' % (u.uint8_to_uint32(fw_info_extra[0:4])) + oe_fw_ver_2 = '%08X' % (u.uint8_to_uint32(fw_info_extra[64:68])) + oe_fw_crc_1 = '%08X' % (u.uint8_to_uint32(fw_info_extra[4:8])) + oe_fw_crc_2 = '%08X' % (u.uint8_to_uint32(fw_info_extra[68:72])) + + bl_ver = '%02X.%02X.%02X' % (fw_info[74], fw_info[75], fw_info[76]) + + if fw_info[0] & 0x10: + img_1 = 'B' + img_2 = 'A' + fw_ver_2 = "%02X.%02X" % (fw_info[2], fw_info[3]) + fw_ver_1 = "%02X.%02X" % (fw_info[38], fw_info[39]) + if more: + fw_ver_2 = '%02X.%02X.%02X' % (fw_info[2], fw_info[3], fw_info[4]) + fw_ver_1 = '%02X.%02X.%02X' % (fw_info[38], fw_info[39], fw_info[40]) + fw_crc_2 = '%02X%02X%02X%02X' % (fw_info[6], fw_info[7], fw_info[8], fw_info[9]) + fw_crc_1 = '%02X%02X%02X%02X' % (fw_info[42], fw_info[43], fw_info[44], fw_info[45]) + ee_ver_2 = '%02X.%02X.%02X' % (fw_info[10], fw_info[11], fw_info[12]) + ee_ver_1 = '%02X.%02X.%02X' % (fw_info[46], fw_info[47], fw_info[48]) + ee_crc_2 = '%02X%02X%02X%02X' % (fw_info[13], fw_info[14], fw_info[15], fw_info[16]) + ee_crc_1 = '%02X%02X%02X%02X' % (fw_info[49], fw_info[50], fw_info[51], fw_info[52]) + logger.info('CDB Status: %02X' % fw_info[0]) + logger.info('Running Image: ' + img_1) + logger.info('FW Revision: ' + fw_ver_1) + logger.info('FW CRC: ' + fw_crc_1) + logger.info('EE Revision: ' + ee_ver_1) + logger.info('EE CRC: ' + ee_crc_1) + logger.info('') + logger.info('Not running Image: ' + img_2) + logger.info('FW Revision: ' + fw_ver_2) + logger.info('FW CRC: ' + fw_crc_2) + logger.info('EE Revision: ' + ee_ver_2) + logger.info('EE CRC: ' + ee_crc_2) + logger.info('') + if more: + logger.info('Bootloader Revision: ' + bl_ver) + logger.info('') + + @staticmethod + def get_fw_version_info(fw_info, fw_info_extra=None): + fw_ver = [{}, {}] + fw_ver[0]["CMIS_FW"] = {"version": bytearray(fw_info[2:4]), "crc": bytearray(fw_info[6:10])} + fw_ver[0]["CMIS_EE"] = {"version": bytearray(fw_info[10:13]), "crc": bytearray(fw_info[13:17])} + if fw_info_extra is not None: + fw_ver[0]["OE_FW"] = {"version": bytearray(fw_info_extra[2:4]), "crc": bytearray(fw_info_extra[4:8])} + fw_ver[0]["OE_EE"] = {"version": bytearray(fw_info_extra[10:12]), "crc": bytearray(fw_info_extra[12:16])} + fw_ver[0]["RLM_FW"] = {"version": bytearray(fw_info_extra[18:20]), "crc": bytearray(fw_info_extra[20:24])} + fw_ver[0]["RLM_EE"] = {"version": bytearray(fw_info_extra[26:28]), "crc": bytearray(fw_info_extra[28:32])} + + fw_ver[1]["CMIS_FW"] = {"version": bytearray(fw_info[38:40]), "crc": bytearray(fw_info[42:46])} + fw_ver[1]["CMIS_EE"] = {"version": bytearray(fw_info[46:49]), "crc": bytearray(fw_info[49:43])} + if fw_info_extra is not None: + fw_ver[1]["OE_FW"] = {"version": bytearray(fw_info_extra[66:68]), "crc": bytearray(fw_info_extra[68:72])} + fw_ver[1]["OE_EE"] = {"version": bytearray(fw_info_extra[74:76]), "crc": bytearray(fw_info_extra[76:80])} + fw_ver[1]["RLM_FW"] = {"version": bytearray(fw_info_extra[82:84]), "crc": bytearray(fw_info_extra[84:88])} + fw_ver[1]["RLM_EE"] = {"version": bytearray(fw_info_extra[90:92]), "crc": bytearray(fw_info_extra[92:96])} + + return fw_ver + + def fw_status(self, poll_count=2, delay_ms=1, verbose=True, more=True): + self.cdb_unlock(poll_count) + self.clear_cmd_fields() + self.set_word_field(cdb_cmd_fields.cmd_code_msb, 0x0100) + if more: + self.set_cmd_field(cdb_cmd_fields.lpl_len, 1) + self.set_check_code() + self.write_cmd_fields() + ret, status = self.poll_status(delay_ms=100) + if not ret: + raise CdbException('CDB FW Status Timed out from status polling') + fw_info = array('B', 120 * [0]) + # self.cmis_i2c.set_page(0x9F) + # self.cmis_i2c.reg_read(0x88, fw_info) # 120 bytes starting from byte 136 + fw_info = self.exec_rd_cmd(0x88, 120, 0, 0x9F) + fw_info_extra = array('B', 128 * [0]) + # self.cmis_i2c.set_page(0xA0) + # self.cmis_i2c.reg_read(0x80, fw_info_extra) + fw_info_extra = self.exec_rd_cmd(0x80, 128, 0, 0xA0) + if verbose: + self.process_fw_status(fw_info, fw_info_extra=fw_info_extra, more=more) + return True, fw_info, fw_info_extra + + def fw_run(self, bank=None, verbose=True): + if not self.cdb_unlock(): + return False + self.clear_cmd_fields() + self.set_word_field(cdb_cmd_fields.cmd_code_msb, 0x0109) + self.set_cmd_field(cdb_cmd_fields.lpl_len, 0x04) + if bank is not None: + self.set_cmd_field(cdb_cmd_fields.addr_1, bank) + self.set_check_code() + try: + self.write_cmd_fields() + except: + delay(5000) + if not self.cmis_i2c.acknowledge_poll(10000): + logger.info('Timed out from acknowledge polling') + raise CdbException('Timed out from acknowledge polling') + (status, info, extra_info) = self.fw_status(poll_count=100, delay_ms=5, verbose=verbose) + if not status: + logger.info('Failed running to the new loaded image') + raise CdbException('Failed running to the new loaded image') + + return True + delay(5000) + if not self.cmis_i2c.acknowledge_poll(10000): + logger.info('Timed out from acknowledge polling') + raise CdbException('Timed out from acknowledge polling') + (status, info, extra_info) = self.fw_status(poll_count=100, delay_ms=5, verbose=verbose) + if not status: + logger.info('Failed running to the new loaded image') + raise CdbException('Failed running to the new loaded image') + + return True + + def fw_commit(self): + for x in range(0, 1000): + try: + if not self.cdb_unlock(): + return False + self.clear_cmd_fields() + self.set_word_field(cdb_cmd_fields.cmd_code_msb, 0x010A) + self.set_check_code() + self.write_cmd_fields() + delay(100) + ret, status = self.poll_status(delay_ms=10, timeout=100) + if not ret: + raise CdbException('Failed committing to the new loaded image') + return True + except: + self.cmis_i2c.acknowledge_poll(timeout_ms=2000, delay_ms=1) + logger.error("CDB Commit Retry %d" % x) + continue + return True + + def fw_complete_load(self, poll_count=1000, delay_ms=10): + ret = True + for x in range(0, poll_count): + try: + self.clear_cmd_fields() + self.set_word_field(cdb_cmd_fields.cmd_code_msb, 0x0107) + self.set_check_code() + self.write_cmd_fields() + delay(100) + ret, status = self.poll_status(delay_ms=delay_ms, get_ret=True) + if not ret and status != 0x45: # return code 0x45 means cmd payload checksum error, i2c glitch may have occured, try to handle it here + logger.error('CDB Failed to complete loading.') + raise CdbException('CDB Failed complete fw load') + if ret and status == 0x01: + return True + except: + self.cmis_i2c.acknowledge_poll(timeout_ms=2000, delay_ms=1) + logger.error("CDB Complete Retry %d" % x) + continue + if not ret: + logger.error('CDB Failed to complete loading.') + raise CdbException('CDB Failed complete fw load') + return True + + def fw_start_download(self, header, image_size, start_addr=None, bootloader=False, rlm_num=None): + self.clear_cmd_fields() + self.set_dword_field(cdb_cmd_fields.addr_0, image_size) + # self.cmis_i2c.set_page(0x9F) + # self.cmis_i2c.reg_write(140, 116 * [0x00]) + # self.cmis_i2c.reg_write(144, header) + self.exec_wr_cmd(140, 116 * [0x00], 0, 0x9F) + self.exec_wr_cmd(144, header, 0, 0x9F) + more_data = header + if start_addr is not None: + start_addr_data = [(start_addr >> 24) & 0xFF, (start_addr >> 16) & 0xFF, (start_addr >> 8) & 0xFF, start_addr & 0xFF] + self.exec_wr_cmd(200, start_addr_data, 0, 0x9F) + # self.cmis_i2c.reg_write(200, start_addr_data) + more_data = header + start_addr_data + if rlm_num is not None: + self.exec_wr_cmd(204, [rlm_num], 0, 0x9F) + # self.cmis_i2c.reg_write(204, [rlm_num]) + more_data = more_data + [rlm_num] + self.set_word_field(cdb_cmd_fields.cmd_code_msb, 0x0101) + if rlm_num is not None: + self.set_cmd_field(cdb_cmd_fields.lpl_len, 121) + else: + self.set_cmd_field(cdb_cmd_fields.lpl_len, 120) + self.set_check_code(more_data=more_data) + self.write_cmd_fields() + if bootloader: + delay(500) + else: + delay(100) + ret, status = self.poll_status(delay_ms=10, force=True) + if not ret: + logger.error('CDB Failed to start loading.') + raise CdbException('CDB Failed start fw load') + return True + + def fw_abort_load(self): + self.clear_cmd_fields() + self.set_word_field(cdb_cmd_fields.cmd_code_msb, 0x0102) + self.set_check_code(data_len=8) + self.write_cmd_fields() + delay(100) + ret, status = self.poll_status(delay_ms=10) + if not ret: + logger.error('CDB Failed to abort loading.') + raise CdbException('CDB Failed abort fw load') + return True + + def fw_load_epl(self, data_buffer, data_length, addr=None): + page_num = int(data_length / 128) + remainder = data_length % 128 + i = 0 + while i < page_num: + # self.cmis_i2c.set_page(0xA0 + i) # Select page + # self.cmis_i2c.reg_write(0x80, data_buffer[0x80 * i: 0x80 * i + 0x80]) # Write to SRAM + self.exec_wr_cmd(0x80, data_buffer[0x80 * i: 0x80 * i + 0x80], 0, (0xA0 + i)) + i = i + 1 + if remainder > 0: + # self.cmis_i2c.set_page(0xA0 + i) + # self.cmis_i2c.reg_write(0x80, data_buffer[0x80 * i: 0x80 * i + remainder]) + self.exec_wr_cmd(0x80, data_buffer[0x80 * i: 0x80 * i + remainder], 0, (0xA0 + i)) + self.clear_cmd_fields() + self.set_word_field(cdb_cmd_fields.epl_len_msb, page_num * 0x80 + remainder) + self.set_cmd_field(cdb_cmd_fields.lpl_len, 0x04) + if addr is not None: + self.set_dword_field(cdb_cmd_fields.addr_0, addr) + self.set_word_field(cdb_cmd_fields.cmd_code_msb, 0x0104) + self.set_check_code() + self.write_cmd_fields() + delay(50) + ret, status = self.poll_status(delay_ms=20) + if not ret: + logger.error('Loading EPL Failed.') + raise CdbException('Failed loading EPL') + return True + + def cdb_read_serial_number(self): + sn_data = array('B', 16 * [0]) + # self.cmis_i2c.set_page(0x00) + # self.cmis_i2c.reg_read(166, sn_data) # 16 bytes starting from byte 166 + sn_data = self.exec_rd_cmd(166, 16) + sn_str = bytes(sn_data).decode('ascii').strip() + return sn_data, sn_str + + @staticmethod + def cdb_parse_serial_number_from_filename(filename): + fn_items = filename.split('_') + # product str, sn str, oe_num, ee type + print(fn_items) + return fn_items[0], fn_items[1], fn_items[2], fn_items[3] + + def cdb_check_cmis_ee_match(self, filename): + supported_products = ['Bailly'] + product_str, sn_str, oe_num_str, ee_type = self.cdb_parse_serial_number_from_filename(filename) + if product_str not in supported_products: + raise CdbException("Unsupported product or Invalid Image File. Please use the original provided image file without renaming") + try: + oe_num = int(oe_num_str[2]) + except: + raise CdbException("Invalid OE Number Conversion or Invalid Image File. Please use the original provided image file without renaming") + if oe_num > 7: + raise CdbException("Invalid OE Number or Invalid Image File. Please use the original provided image file without renaming") + sn_str += "%02X" % oe_num + if ee_type != 'CMIS': + raise CdbException("Unsupported image type or Invalid Image File. Please use the original provided image file without renaming") + try: + sn_data, rd_sn_str = self.cdb_read_serial_number() + except: + raise CdbException("Unable to read out serial number. Please check i2c communication to the CMIS interface") + if rd_sn_str != sn_str: + print(rd_sn_str, end='') + print(' vs ', end='') + print(sn_str) + raise CdbException("Mismatch Serial Number. Please use the image file with the matching serial number") + return True, product_str, sn_str, oe_num, ee_type + + def cdb_check_oe_ee_match(self, filename): + supported_products = ['Bailly'] + product_str, sn_str, oe_num_str, ee_type = self.cdb_parse_serial_number_from_filename(filename) + if product_str not in supported_products: + raise CdbException("Unsupported product or Invalid Image File. Please use the original provided image file without renaming") + try: + oe_num = int(oe_num_str[2]) + except: + raise CdbException("Invalid OE Number Conversion or Invalid Image File. Please use the original provided image file without renaming") + if oe_num > 7: + raise CdbException("Invalid OE Number or Invalid Image File. Please use the original provided image file without renaming") + sn_str += "%02X" % oe_num + if ee_type != 'OE': + raise CdbException("Unsupported image type or Invalid Image File. Please use the original provided image file without renaming") + try: + sn_data, rd_sn_str = self.cdb_read_serial_number() + except: + raise CdbException("Unable to read out serial number. Please check i2c communication to the CMIS interface") + if rd_sn_str != sn_str: + print(rd_sn_str, end='') + print(' vs ', end='') + print(sn_str) + raise CdbException("Mismatch Serial Number. Please use the image file with the matching serial number") + return True, product_str, sn_str, oe_num, ee_type + + @staticmethod + def parse_cdb_image_info(file_lines): + image_info = [] + img_num = int((len(file_lines) - 1) / 2) + + for i in range(img_num): + image = {} + img_header = file_lines[2 * i + 1].rstrip() + header_data = [int(img_header[n:n + 2], 16) for n in range(0, len(img_header), 2)] + img_line = file_lines[2 * i + 2].rstrip() + img_size = int(len(img_line) / 2) + image['HEADER'] = header_data + image['DATA_STR'] = img_line + image['SIZE'] = img_size + image['TYPE'] = header_data[0] + if (header_data[1] & 0x80): + image['IMG_FULL'] = 1 + else: + image['IMG_FULL'] = 0 + image['LOC'] = (header_data[1] & 0x03) + image['LOAD_OPT'] = header_data[2] + unique_id_str = bytes(header_data[3:]).hex().upper() + image['UNIQUE_ID'] = unique_id_str + image_info.append(image) + + return image_info + + @staticmethod + def cdb_parse_file_header(file_header): + file_info = {} + file_info['id'] = file_header[:16] + file_info['img_num'] = int(file_header[16:18], 16) + file_info['img_layout'] = [] + file_info['load_action'] = [] + for i in range(file_info['img_num']): + file_info['img_layout'].append(file_header[18+4*i:18+4*i+4]) + for i in range(file_info['img_num']): + file_info['load_action'].append(file_header[18+file_info['img_num']*4+4*i:18+file_info['img_num']*4+4*i+4]) + if file_info['load_action'][-1] == 'FFFF': + break + # print(file_info['id']) + # print(file_info['img_num']) + print(file_info['img_layout']) + print(file_info['load_action']) + return file_info + + def cdb_load_cmis_fw(self, image_info, size, verify=False): + ret, fw_info, extra_fw_info = self.fw_status() + image_dict = image_info + + check_image = image_dict['LOC'] - 1 # 0 -> BANK1, 1 -> BANK2 + via_bootloader = False + if image_dict['LOAD_OPT'] & 0x03 == 0x03: + via_bootloader = True + + logger.info('Upgrading Bank %d\n' % check_image) + logger.debug('FW Load Abort CMD') + self.fw_abort_load() + logger.debug('FW Load Abort CMD Done') + header = image_dict['HEADER'] + data_size = image_dict['SIZE'] + img_data = image_dict['DATA_STR'] + logger.debug('FW Download Start CMD') + self.fw_start_download(header=header, image_size=data_size, bootloader=via_bootloader) + logger.debug('FW Download Start CMD Done') + if via_bootloader: + self.poll_reg_status(status_reg=0x53, status_val=0xAA, ack_poll=True, verbose=True) + data_buffer = array('B', size * [0]) + img_line_idx = 0 + load_addr = 0 + logger.info('Start Updating MCU Bank%d...' % check_image) + total_iteration = math.ceil(data_size / size) + while data_size > 0: + if data_size >= size: + read_size = size + else: + read_size = data_size + for x in range(len(data_buffer)): # Initialize data_buffer to all zeroes + data_buffer[x] = 0 + raw_data = img_data[img_line_idx:img_line_idx + read_size * 2] + img_line_idx += read_size * 2 + for x in range(read_size): + data_buffer[x] = int(raw_data[2 * x:2 * x + 2], 16) + data_size -= read_size + if not self.fw_load_epl(data_buffer, read_size, addr=load_addr): + return False + load_addr += read_size + print('.', end='', flush=True) + logger.info('\n') + logger.info('Completed') + delay(100) + self.fw_complete_load() # cdb fw load complete cmd + ret, fw_info, extra_fw_info = self.fw_status() # get version & crc information + loaded_fw_ver = self.get_fw_version_info(fw_info) # extract only mcu info + self.cmis_i2c.acknowledge_poll(timeout_ms=2000, delay_ms=1) + logger.info('Jumpping to Bank %d' % image_dict['LOC']) + self.fw_run(bank=check_image, verbose=False) # jump to the bank with bew rev + try: + self.cmis_i2c.acknowledge_poll(timeout_ms=15000, delay_ms=500) + except cmis_smb.cmis_mcu_mezz_smb_Exception as e: + raise CdbException(e.detailed_error_message) + logger.info('Jumpping to Bank %d Completed' % image_dict['LOC']) + ret, fw_info, extra_fw_info = self.fw_status() # get version & crc info + actual_fw_ver = self.get_fw_version_info(fw_info) # extract only mcu info + logger.info('Commiting Image') + self.fw_commit() # commit new image, on next powerup/reset, fw will load new rev img + self.exec_wr_cmd(26, [0x08]) + # self.cmis_i2c.reg_write(offset=26, data=[0x08]) # msa soft reset + try: + self.cmis_i2c.acknowledge_poll(timeout_ms=15000, delay_ms=500) + except cmis_smb.cmis_mcu_mezz_smb_Exception as e: + raise CdbException(e.detailed_error_message) + logger.info('Finished MCU FW Upgrade') + return actual_fw_ver[check_image]["CMIS_FW"] # return version & crc for host to validate + + def cdb_load_oe_fw(self, image_info, size, verify=False): + IMG_TYPE_STR = ['Partial', 'Full'] + IMG_DATA_STR = ['Invalid', 'Bank 1', 'Bank 2', 'Both Banks'] + LOAD_OPT_STR = ['Invalid', 'Other Bank', 'Current Bank', 'Both Banks'] + image_dict = image_info + image_start_addr = int(image_dict['DATA_STR'][:8], 16) + ret, fw_info, fw_info_extra = self.fw_status() + + + logger.info('Image Type: %s Image, %s\n' % (IMG_TYPE_STR[image_dict['IMG_FULL']], IMG_DATA_STR[image_dict['LOC']])) + + logger.info('Upgrading OE %s\n' % LOAD_OPT_STR[image_dict['LOAD_OPT']]) + logger.debug('FW Load Abort CMD') + self.fw_abort_load() + logger.debug('FW Load Abort CMD Done') + header = image_dict['HEADER'] + data_size = image_dict['SIZE'] - 4 # first 4 bytes is address + img_data = image_dict['DATA_STR'][8:] # first 4 bytes is address + logger.debug('FW Download Start CMD') + self.fw_start_download(header=header, image_size=data_size, bootloader=False) + logger.debug('FW Download Start CMD Done') + data_buffer = array('B', size * [0]) # step size + img_line_idx = 0 + load_addr = image_start_addr + logger.info('Start Updating OE...') + total_iteration = math.ceil(data_size / size) + while data_size > 0: + if data_size >= size: + read_size = size + else: + read_size = data_size + for x in range(len(data_buffer)): # Initialize data_buffer to all zeroes + data_buffer[x] = 0 + raw_data = img_data[img_line_idx:img_line_idx + read_size * 2] + img_line_idx += read_size * 2 + for x in range(read_size): + data_buffer[x] = int(raw_data[2 * x:2 * x + 2], 16) + data_size -= read_size + if not self.fw_load_epl(data_buffer, read_size, addr=load_addr): + return False + load_addr += read_size + print('.', end='', flush=True) + logger.info('\n') + logger.info('Completed') + delay(10) + self.fw_complete_load() # cdb fw load complete cmd + ret, fw_info, fw_info_extra = self.fw_status() # get version & crc information + loaded_fw_ver = self.get_fw_version_info(fw_info=fw_info, fw_info_extra=fw_info_extra) # extract only mcu info + self.exec_wr_cmd(26, [0x08]) + # self.cmis_i2c.reg_write(offset=26, data=[0x08]) # msa soft reset + try: + self.cmis_i2c.acknowledge_poll(timeout_ms=15000, delay_ms=500) + except cmis_smb.cmis_mcu_mezz_smb_Exception as e: + raise CdbException(e.detailed_error_message) + logger.info('Finished OE FW Upgrade') + return loaded_fw_ver[0]["OE_FW"] # return version & crc for host to validate + + def cdb_load_oe_ee_full(self, image_info, size, verify=True): + IMG_TYPE_STR = ['Partial', 'Full'] + IMG_DATA_STR = ['Invalid', 'Bank 1', 'Bank 2', 'Both Banks'] + LOAD_OPT_STR = ['Invalid', 'Other Bank', 'Current Bank', 'Both Banks'] + image_dict = image_info + + if verify: + self.cdb_check_oe_ee_match(filename=image_dict['FILENAME']) + + image_start_addr = int(image_dict['DATA_STR'][:8], 16) + ret, fw_info, fw_info_extra = self.fw_status() + + logger.info('Image Type: %s Image, %s\n' % (IMG_TYPE_STR[image_dict['IMG_FULL']], IMG_DATA_STR[image_dict['LOC']])) + + logger.info('Upgrading OE %s\n' % LOAD_OPT_STR[image_dict['LOAD_OPT']]) + logger.debug('FW Load Abort CMD') + self.fw_abort_load() + logger.debug('FW Load Abort CMD Done') + header = image_dict['HEADER'] + data_size = image_dict['SIZE'] - 4 # first 4 bytes is address + img_data = image_dict['DATA_STR'][8:] # first 4 bytes is address + logger.debug('FW Download Start CMD') + self.fw_start_download(header=header, image_size=data_size, start_addr=image_start_addr, bootloader=False) + logger.debug('FW Download Start CMD Done') + data_buffer = array('B', size * [0]) # step size + img_line_idx = 0 + load_addr = image_start_addr + logger.info('Start Updating OE EE...') + total_iteration = math.ceil(data_size / size) + while data_size > 0: + if data_size >= size: + read_size = size + else: + read_size = data_size + for x in range(len(data_buffer)): # Initialize data_buffer to all zeroes + data_buffer[x] = 0 + raw_data = img_data[img_line_idx:img_line_idx + read_size * 2] + img_line_idx += read_size * 2 + for x in range(read_size): + data_buffer[x] = int(raw_data[2 * x:2 * x + 2], 16) + data_size -= read_size + if not self.fw_load_epl(data_buffer, read_size, addr=load_addr): + return False + load_addr += read_size + print('.', end='', flush=True) + logger.info('\n') + logger.info('Completed') + delay(10) + self.fw_complete_load() # cdb fw load complete cmd + ret, fw_info, fw_info_extra = self.fw_status() # get version & crc information + loaded_fw_ver = self.get_fw_version_info(fw_info=fw_info, fw_info_extra=fw_info_extra) # extract only mcu info + self.exec_wr_cmd(26, [0x08]) + # self.cmis_i2c.reg_write(offset=26, data=[0x08]) # msa soft reset + try: + self.cmis_i2c.acknowledge_poll(timeout_ms=15000, delay_ms=500) + except cmis_smb.cmis_mcu_mezz_smb_Exception as e: + raise CdbException(e.detailed_error_message) + logger.info('Finished OE EE Upgrade') + return loaded_fw_ver[0]["OE_EE"] # return version & crc for host to validate + + def cdb_load_cmis_ee_full(self, image_info, size, verify=True): + IMG_TYPE_STR = ['Partial', 'Full'] + IMG_DATA_STR = ['Invalid', 'Bank 1', 'Bank 2', 'Both Banks'] + LOAD_OPT_STR = ['Invalid', 'Other Bank', 'Current Bank', 'Both Banks'] + + image_dict = image_info + + if verify: + self.cdb_check_cmis_ee_match(filename=image_dict['FILENAME']) + + ret, fw_info, fw_info_extra = self.fw_status() + + logger.info('Input file contain image type: %s Image: %s Size: %d\n' % (IMG_TYPE_STR[image_dict['IMG_FULL']], IMG_DATA_STR[image_dict['LOC']], image_dict['SIZE'])) + + logger.info('Upgrading CMIS_EE %s\n' % LOAD_OPT_STR[image_dict['LOAD_OPT']]) + logger.debug('FW Load Abort CMD') + self.fw_abort_load() + logger.debug('FW Load Abort CMD Done') + header = image_dict['HEADER'] + data_size = image_dict['SIZE'] # total byte size + img_data = image_dict['DATA_STR'] # byte buffer + logger.debug('FW Download Start CMD') + self.fw_start_download(header=header, image_size=data_size, bootloader=False) + logger.debug('FW Download Start CMD Done') + data_buffer = array('B', size * [0]) # step size + img_line_idx = 0 + load_addr = 0 + logger.info('Start Updating CMIS_EE...') + total_iteration = math.ceil(data_size / size) + while data_size > 0: + if data_size >= size: + read_size = size + else: + read_size = data_size + for x in range(len(data_buffer)): # Initialize data_buffer to all zeroes + data_buffer[x] = 0 + raw_data = img_data[img_line_idx:img_line_idx + read_size * 2] + img_line_idx += read_size * 2 + for x in range(read_size): + data_buffer[x] = int(raw_data[2 * x:2 * x + 2], 16) + data_size -= read_size + if not self.fw_load_epl(data_buffer, read_size, addr=load_addr): + return False + load_addr += read_size + print('.', end='', flush=True) + logger.info('\n') + logger.info('Completed') + delay(10) + self.fw_complete_load() # cdb fw load complete cmd + ret, fw_info, fw_info_extra = self.fw_status() # get version & crc information + loaded_fw_ver = self.get_fw_version_info(fw_info=fw_info, fw_info_extra=fw_info_extra) # extract only mcu info + self.exec_wr_cmd(26, [0x08]) + # self.cmis_i2c.reg_write(offset=26, data=[0x08]) # msa soft reset + try: + self.cmis_i2c.acknowledge_poll(timeout_ms=15000, delay_ms=500) + except cmis_smb.cmis_mcu_mezz_smb_Exception as e: + raise CdbException(e.detailed_error_message) + logger.info('Finished CMIS EE Upgrade') + return loaded_fw_ver[0]["CMIS_EE"] # return version & crc for host to validate + + def cdb_load_rlm_fw(self, image_info, size, rlm_num=0, restart=True, verify=False): + ret, fw_info, extra_fw_info = self.fw_status() + image_dict = image_info + + check_image = image_dict['LOC'] - 1 # 0 -> BANK1, 1 -> BANK2 + via_bootloader = False + if image_dict['LOAD_OPT'] & 0x03 == 0x03: + via_bootloader = True + + logger.info('Upgrading Bank %d\n' % check_image) + logger.debug('FW Load Abort CMD') + self.fw_abort_load() + logger.debug('FW Load Abort CMD Done') + header = image_dict['HEADER'] + data_size = image_dict['SIZE'] + img_data = image_dict['DATA_STR'] + logger.debug('FW Download Start CMD') + self.fw_start_download(header=header, image_size=data_size, bootloader=via_bootloader, rlm_num=rlm_num) + logger.debug('FW Download Start CMD Done') + if via_bootloader: + self.poll_reg_status(status_reg=0x53, status_val=0xAA, ack_poll=True, verbose=True) + data_buffer = array('B', size * [0]) + img_line_idx = 0 + load_addr = 0 + logger.info('Start Updating RLM Bank%d...' % check_image) + total_iteration = math.ceil(data_size / size) + while data_size > 0: + if data_size >= size: + read_size = size + else: + read_size = data_size + for x in range(len(data_buffer)): # Initialize data_buffer to all zeroes + data_buffer[x] = 0 + raw_data = img_data[img_line_idx:img_line_idx + read_size * 2] + img_line_idx += read_size * 2 + for x in range(read_size): + data_buffer[x] = int(raw_data[2 * x:2 * x + 2], 16) + data_size -= read_size + if not self.fw_load_epl(data_buffer, read_size, addr=load_addr): + return False + load_addr += read_size + print('.', end='', flush=True) + logger.info('\n') + logger.info('Completed') + delay(10) + self.fw_complete_load(poll_count=10) # cdb fw load complete cmd + ret, fw_info, extra_fw_info = self.fw_status() # get version & crc information + loaded_fw_ver = self.get_fw_version_info(fw_info) # extract only mcu info + logger.info('Jumpping to Bank %d' % image_dict['LOC']) + self.fw_run(bank=check_image, verbose=False) # jump to the bank with bew rev + logger.info('Jumpping to Bank %d Completed' % image_dict['LOC']) + ret, fw_info, extra_fw_info = self.fw_status() # get version & crc info + actual_fw_ver = self.get_fw_version_info(fw_info) # extract only mcu info + logger.info('Commiting Image') + self.fw_commit() # commit new image, on next powerup/reset, fw will load new rev img + self.exec_wr_cmd(26, [0x08]) + # self.cmis_i2c.reg_write(offset=26, data=[0x08]) # msa soft reset + try: + self.cmis_i2c.acknowledge_poll(timeout_ms=15000, delay_ms=500) + except dd.QsfpDdException as e: + raise CdbException(e.detailed_error_message) + logger.info('Finished RLM FW Upgrade') + # return actual_fw_ver[check_image]["CMIS_FW"] # return version & crc for host to validate + + def cdb_load_rlm_ee_full(self, image_info, size, rlm_num=0, restart=True, verify=False): + IMG_TYPE_STR = ['Partial', 'Full'] + IMG_DATA_STR = ['Invalid', 'Bank 1', 'Bank 2', 'Both Banks'] + LOAD_OPT_STR = ['Invalid', 'Other Bank', 'Current Bank', 'Both Banks'] + + image_dict = image_info + + ret, fw_info, fw_info_extra = self.fw_status() + + logger.info('Input file contain image type: %s Image: %s Size: %d\n' % (IMG_TYPE_STR[image_dict['IMG_FULL']], IMG_DATA_STR[image_dict['LOC']], image_dict['SIZE'])) + + logger.info('Upgrading CMIS_EE %s\n' % LOAD_OPT_STR[image_dict['LOAD_OPT']]) + logger.debug('FW Load Abort CMD') + self.fw_abort_load() + logger.debug('FW Load Abort CMD Done') + header = image_dict['HEADER'] + data_size = image_dict['SIZE'] # total byte size + img_data = image_dict['DATA_STR'] # byte buffer + logger.debug('FW Download Start CMD') + self.fw_start_download(header=header, image_size=data_size, bootloader=False, rlm_num=rlm_num) + logger.debug('FW Download Start CMD Done') + data_buffer = array('B', size * [0]) # step size + img_line_idx = 0 + load_addr = 0 + logger.info('Start Updating RLM_EE...') + total_iteration = math.ceil(data_size / size) + while data_size > 0: + if data_size >= size: + read_size = size + else: + read_size = data_size + for x in range(len(data_buffer)): # Initialize data_buffer to all zeroes + data_buffer[x] = 0 + raw_data = img_data[img_line_idx:img_line_idx + read_size * 2] + img_line_idx += read_size * 2 + for x in range(read_size): + data_buffer[x] = int(raw_data[2 * x:2 * x + 2], 16) + data_size -= read_size + if not self.fw_load_epl(data_buffer, read_size, addr=load_addr): + return False + load_addr += read_size + print('.', end='', flush=True) + logger.info('\n') + logger.info('Completed') + delay(10) + self.fw_complete_load() # cdb fw load complete cmd + ret, fw_info, fw_info_extra = self.fw_status() # get version & crc information + loaded_fw_ver = self.get_fw_version_info(fw_info=fw_info, fw_info_extra=fw_info_extra) # extract only mcu info + self.exec_wr_cmd(26, [0x08]) + # self.cmis_i2c.reg_write(offset=26, data=[0x08]) # msa soft reset + try: + self.cmis_i2c.acknowledge_poll(timeout_ms=15000, delay_ms=500) + except dd.QsfpDdException as e: + raise CdbException(e.detailed_error_message) + logger.info('Finished CMIS EE Upgrade') + return loaded_fw_ver[0]["CMIS_EE"] # return version & crc for host to validate + + def cdb_update_general(self, filename, size, rlm_num, verify=True): + logger.info('input file: %s' % filename) + try: + hex_file = open(filename, 'r') # Open input hex file + except FileNotFoundError: + raise CdbException("file not found error") + + file_lines = hex_file.readlines() + hex_file.close() + + logger.info("File Header: %s" % file_lines[0]) + + file_info = self.cdb_parse_file_header(file_lines[0]) + + if file_info['id'] != '4252434D204F5344': + raise CdbException('Invalid File, Please use the Broadcom Official Released Upgrading Image') + + image_info = self.parse_cdb_image_info(file_lines) + + if file_info['img_num'] != len(image_info): + raise CdbException('Mismatch File Desciption, Please use Broadcom Official Released Upgrading Image') + + IMG_TYPE = [0xCF, 0xCE, 0xEF, 0xEE, 0xAF, 0xAE] + + for img in image_info: + if img.get('TYPE', 0x00) not in IMG_TYPE: + raise CdbException('Unsupported Image Type, Please use Official Broadcom Released Upgrading Image') + if img.get('UNIQUE_ID', '') != '4F534443504F4241494C4C594649524D57415245': + raise CdbException('Invalid Image Header, Please use the Broadcom Official Released Upgrading Image') + + for ld_ac in file_info['load_action']: + if ld_ac == 'FFFF': + logger.info('End of Loading Action, Upgrading Complete') + return + try: + img_idx = file_info['img_layout'].index(ld_ac) + except ValueError: + raise CdbException('Mismatch Image Loading Desciption, Please use Official Broadcom Released Upgrading Image') + logger.info('msa soft reset') + self.exec_wr_cmd(26, [0x08]) # msa soft reset + delay(5000) + logger.info('Loading Image %d' % img_idx) + image_dict = image_info[img_idx] + image_dict['FILENAME'] = os.path.basename(filename) + if image_dict['TYPE'] == 0xCF: + logger.info('Loading CMIS FW') + self.cdb_load_cmis_fw(image_info=image_dict, size=size, verify=verify) + delay(3000) + elif image_dict['TYPE'] == 0xCE: + logger.info('Loading CMIS EE') + self.cdb_load_cmis_ee_full(image_info=image_dict, size=size, verify=verify) + delay(3000) + elif image_dict['TYPE'] == 0xEF: + logger.info('Loading PRISM FW') + self.cdb_load_oe_fw(image_info=image_dict, size=size, verify=verify) + delay(3000) + elif image_dict['TYPE'] == 0xEE: + logger.info('Loading PRISM EE') + self.cdb_load_oe_ee_full(image_info=image_dict, size=size, verify=verify) + delay(3000) + elif image_dict['TYPE'] == 0xAF: + if rlm_num is None: + rlm_nums = [0, 1] + else: + rlm_nums = [rlm_num] + logger.info('Loading RLM FW') + for _rlm in rlm_nums: + self.cdb_load_rlm_fw(image_info=image_dict, size=size, rlm_num=_rlm, verify=verify) + delay(3000) + elif image_dict['TYPE'] == 0xAE: + if rlm_num is None: + rlm_nums = [0, 1] + else: + rlm_nums = [rlm_num] + logger.info('Loading RLM EE') + for _rlm in rlm_nums: + self.cdb_load_rlm_ee_full(image_info=image_dict, size=size, rlm_num=_rlm, verify=verify) + delay(3000) + + +class CdbException(Exception): + def __init__(self, detailed_error_message): + super(CdbException, self).__init__(detailed_error_message) + + +if __name__ == '__main__': + pass \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/cpo/lib/fw_tools/cmis/__init__.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/cpo/lib/fw_tools/cmis/__init__.py new file mode 100755 index 00000000000..f19e5cb1d90 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/cpo/lib/fw_tools/cmis/__init__.py @@ -0,0 +1,3 @@ +import sys +import os +sys.path.append(os.path.dirname(os.path.realpath(__file__))) \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/cpo/lib/fw_tools/cmis/cmis_mcu_i2c.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/cpo/lib/fw_tools/cmis/cmis_mcu_i2c.py new file mode 100755 index 00000000000..447e3a64d92 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/cpo/lib/fw_tools/cmis/cmis_mcu_i2c.py @@ -0,0 +1,578 @@ +""" +file qsfpdd.py +author Broadcom OSD Firmware Team +date 09/22/2022 +version 1.01 - added file directory to path in order to import same level modules + +property $ Copyright: (c) 2022 Broadcom Limited All Rights Reserved $ + No portions of this material may be reproduced in any form + without the written permission of: + Broadcom Limited + 408 E. Plumeria Drive + San Jose, California 95134 + United States + All information contained in this document/file is Broadcom Limit company + private proprietary, trade secret, and remains the property of Broadcom + Limited. The intellectual and technical concepts contained herein are + proprietary to Broadcom Limited and may be covered by U.S. and Foreign Patents, + patents in process, and are protected by trade secret or copyright law. + Dissemination of this information or reproduction of this material is strictly + forbidden unless prior written permission is obtained from Broadcom Limited. + +brief This file includes all the CMIS compliant I2C driver functions + +section +""" +import os +import sys +from array import array +from GS_timing import * +from micas_i2c import I2CException +from util import UtilObj as u +import micas_i2c as i2c_d +import logging +import math + + +logger = logging.getLogger(__name__) +logger.setLevel(logging.INFO) +logger.addHandler(logging.StreamHandler(sys.stdout)) + + +""" +logger.debug("This is a debug message") +logger.info("This is an info message") +logger.warning("This is a warning message") +logger.error("This is an error message") +logger.critical("This is a critical message") +""" + + +class cmis_mcu_mezz_smb(object): + mcu_bus_map = [24, 25, 26, 27, 28, 29, 30, 31] + dev_addr = 0x50 + dev = None + + def __init__(self, twi_dev=None, sn='255', + oe_mcu=0, cmis_mcu_select_byte=0x70, + delay_ms=50, + retry_open_max=10, delay_after_open_ms=15, delay_between_retry_ms=5): + if twi_dev: + self.dev = twi_dev + self.sn = sn + self.cmis_mcu_select_byte = cmis_mcu_select_byte + self.delay_ms = delay_ms + self.oe_mcu = oe_mcu + self.retry_open_max = retry_open_max + self.delay_after_open_ms = delay_after_open_ms + self.delay_between_retry_ms =delay_between_retry_ms + return + + def __enter__(self): + retry_open_max = self.retry_open_max + if self.dev is None: + self.dev = i2c_d.I2cHost(bus=self.mcu_bus_map[self.oe_mcu]) + self.connect_mcu(num=self.oe_mcu, verbose=True) + return self + + def __exit__(self, exc_type, exc_val, exc_tb): + return + + def open(self): + retry_open_max = self.retry_open_max + if self.dev is None: + self.dev = i2c_d.I2cHost(bus=self.mcu_bus_map[self.oe_mcu]) + self.connect_mcu(num=self.oe_mcu, verbose=True) + + def close(self): + return self + + def set_device_address(self, dev_addr): + self.dev_addr = dev_addr + + def set_page(self, page): + self.reg_write(0x7F, [page]) + + def set_bank(self, bank): + self.reg_write(0x7E, [bank]) + + def reg_read(self, offset, data, verbose=True): + try: + data_in = self.dev.reg_read(addr=0x50, offset=offset, n=len(data), verbose=verbose) + for i in range(len(data)): + data[i] = data_in[i] + except I2CException: + raise cmis_mcu_mezz_smb_Exception('Exception on reg_read, I2C Driver Error, I2C Client Device may have Nacked') + + def reg_write(self, offset, data, verbose=True): + try: + self.dev.reg_write(addr=0x50, offset=offset, data=data, verbose=verbose) + except I2CException: + if verbose: + print("reg_write offset: %02X data_size: %d" % (offset, len(data))) + raise cmis_mcu_mezz_smb_Exception('Exception on reg_write, I2C Driver Error, I2C Client Device may have Nacked') + + def enter_password(self, pwd): + self.reg_write(122, pwd) + + def connect_mcu(self, num, verbose=False): + try: + self.dev.set_bus(bus=self.mcu_bus_map[num]) + if verbose: + # do nothing as this information is not needed at cli level for ssh query + pass + except Exception as err: + logger.error(type(err)) + logger.error(str(err)) + + def enter_debug_mode(self, retry=3, verbose=False): + data = array('B', [0]) + self.reg_read(0x53, data) # read the current system mode + if verbose: + print("Requested Mode: %02X" % 0xCC) + print("System Mode: %02X" % data[0]) + if data[0] == 0xCC: # check if requested mode matches with the current system mode + return True + for i in range(retry): + if verbose: + print("Entering Pwd: %02X %02X %02X %02X" % (0xF4, 0xDE, 0xCA, 0xF3)) + self.reg_write(0x7A, [0xF4, 0xDE, 0xCA, 0xF3]) # enter password + delay(1000) + (ret, status) = self.poll_status(0x53, 0xCC, delay_ms=20, retry=100) + if verbose: + print('Retry: %d, Status: %02X' % (i, status)) + if ret: + return True + (ret, status) = self.poll_status(0x53, 0xCC, delay_ms=0, retry=1) + if not ret: + raise cmis_mcu_mezz_smb_Exception('Unable to enter service mode.') + return ret + + def read_from_data_page(self, data_page, data): + page = data_page + rd_num = len(data) + data_idx = 0 + while rd_num > 0: + if rd_num > 128: + rd_pg_byte = 128 + else: + rd_pg_byte = rd_num + rd_data = array('B', rd_pg_byte * [0]) + self.set_page(page) + self.reg_read(0x80, rd_data) + for i in range(rd_pg_byte): + data[data_idx] = rd_data[i] + data_idx += 1 + page += 1 + rd_num -= rd_pg_byte + + def write_to_data_page(self, data_page, data): + page = data_page + wr_num = len(data) + data_idx = 0 + while wr_num > 0: + if wr_num > 128: + wr_pg_byte = 128 + else: + wr_pg_byte = wr_num + wr_data = array('B', wr_pg_byte * [0]) + for i in range(wr_pg_byte): + wr_data[i] = data[data_idx] + data_idx += 1 + self.set_page(page) + self.reg_write(0x80, wr_data) + wr_num -= wr_pg_byte + page += 1 + + @staticmethod + def print_msa_page(offset, data_buffer): + row_header = ['00', '01', '02', '03', '04', '05', '06', '07', '08', '09', '0A', '0B', '0C', '0D', '0E', '0F'] + col_header = ['00', '10', '20', '30', '40', '50', '60', '70'] + if offset > 127: + col_header = ['80', '90', 'A0', 'B0', 'C0', 'D0', 'E0', 'F0'] + offset = (offset % 128) + arr = [['-' for i in range(16)] for j in range(8)] + idx = offset + for data in data_buffer: + x = idx % 16 + y = int(idx / 16) + arr[y][x] = "{:02X}".format(data) + idx = idx + 1 + + row_format = "{:>4}" * (len(row_header) + 1) + print(row_format.format("", *row_header)) + for col, row in zip(col_header, arr): + print(row_format.format(col, *row)) + + + def read_msa_info(self, bank=0): + msa_data = {} + page_data = array('B', 128 * [0]) + self.set_page(0x00) + self.reg_read(0x00, page_data) + data16 = page_data[14] * 256 + page_data[15] + data16 = u.twos_comp(data16, 16) + msa_data['Temperature'] = data16 / 256 + data16 = page_data[16] * 256 + page_data[17] + msa_data['Vcc'] = data16 * 0.0001 + + print('\nBank: %d\n' % bank) + self.set_bank(bank) + + self.set_page(0x11) + self.reg_read(0x80, page_data) + msa_data['TxLOS'] = bin(page_data[136 - 128])[2:].zfill(8) + msa_data['TxLOL'] = bin(page_data[137 - 128])[2:].zfill(8) + msa_data['RxLOS'] = bin(page_data[147 - 128])[2:].zfill(8) + msa_data['RxLOL'] = bin(page_data[148 - 128])[2:].zfill(8) + + for i in range(4): + data16 = page_data[154 - 128 + 2 * i] * 256 + page_data[155 - 128 + 2 * i] + PmW = data16 * 0.0001 + Pdb = 10 * math.log(PmW, 10) + msa_data['TxLOP%01d' % i] = '%.3fmW %.3fdBm' % (PmW, Pdb) + for i in range(4): + data16 = page_data[170 - 128 + 2 * i] * 256 + page_data[171 - 128 + 2 * i] + msa_data['TxBias%01d' % i] = '%.1fmA' % (data16 * 0.002 * 2) + for i in range(4): + data16 = page_data[186 - 128 + 2 * i] * 256 + page_data[187 - 128 + 2 * i] + PmW = data16 * 0.0001 + Pdb = 10 * math.log(PmW, 10) + msa_data['RXLIP%01d' % i] = '%.3fmW %.3fdBm' % (PmW, Pdb) + + msa_data['LOP Hi Alarm'] = bin(page_data[139 - 128])[2:].zfill(8) + msa_data['LOP Lo Alarm'] = bin(page_data[140 - 128])[2:].zfill(8) + msa_data['LOP Hi Warn'] = bin(page_data[141 - 128])[2:].zfill(8) + msa_data['LOP Lo Warn'] = bin(page_data[142 - 128])[2:].zfill(8) + msa_data['Bias Hi Alarm'] = bin(page_data[143 - 128])[2:].zfill(8) + msa_data['Bias Lo Alarm'] = bin(page_data[144 - 128])[2:].zfill(8) + msa_data['Bias Hi Warn'] = bin(page_data[145 - 128])[2:].zfill(8) + msa_data['Bias Lo Warn'] = bin(page_data[146 - 128])[2:].zfill(8) + msa_data['LIP Hi Alarm'] = bin(page_data[149 - 128])[2:].zfill(8) + msa_data['LIP Lo Alarm'] = bin(page_data[150 - 128])[2:].zfill(8) + msa_data['LIP Hi Warn'] = bin(page_data[151 - 128])[2:].zfill(8) + msa_data['LIP Lo Warn'] = bin(page_data[152 - 128])[2:].zfill(8) + + for item in msa_data: + print(item + ':', msa_data[item]) + + def read(self, msa_page, offset, size, bank=0, delay_ms=None, verbose=True): + msa_page = int(msa_page) + offset = int(offset) + size = int(size) + bank = int(bank) + + _rtn_data_buffer = [] + if msa_page > 0 and offset < 128: + print('MSA pages greater than 0 only supports upper page reading.') + return False, _rtn_data_buffer + self.set_bank(bank) + # print('Bank: %d' % bank) + if offset < 128: + remain_byte = 128 - offset + else: + remain_byte = 256 - offset + if remain_byte <= size: + read_byte = remain_byte + else: + read_byte = size + data_buffer = array('B', read_byte * [0]) + self.set_page(msa_page) + if delay_ms is not None: + delay(delay_ms) + self.reg_read(offset, data_buffer) + + _rtn_data_buffer = [] + if len(data_buffer) != size: + return False, _rtn_data_buffer + + _rtn_str = '' + for _byte in data_buffer: + offset = str('{:02X}'.format(_byte)) + _rtn_str += offset + + if verbose: + # do nothing as this information is not needed at cli level for ssh query + # print(f'MSA Page {hex(msa_page)}:') + # self.print_msa_page(offset, data_buffer) + pass + + # This is the only information, and most important to print to the cli output + print(_rtn_str) + + return True, data_buffer + + def i2c_read(self,msa_page, offset, size, bank=0, delay_ms=None, verbose=False): + """ + This is a high level i2c_read wrapper that will be used for generic cmis page read + """ + status,data_buffer = self.read(msa_page=msa_page, offset=offset, size=size, bank=bank, delay_ms=delay_ms, verbose=verbose) + return status,data_buffer + + def write(self, msa_page, offset, data, bank=0, delay_ms=None, verbose=False): + msa_page = int(msa_page) + offset = int(offset) + bank = int(bank) + + if msa_page > 0 and offset < 128: + return False + self.set_bank(bank) + if verbose: + # do nothing as this information is not needed at cli level for ssh query + # logger.info('Bank: %d' % bank) + pass + + if offset < 128: + remain_byte = 128 - offset + else: + remain_byte = 256 - offset + if remain_byte <= len(data): + write_byte = remain_byte + else: + write_byte = len(data) + data_out = array('B', write_byte * [0]) + for i in range(write_byte): + data_out[i] = data[i] + self.set_page(msa_page) + if delay_ms is not None: + delay(delay_ms) + self.reg_write(offset, data_out) + + def i2c_write(self, msa_page, offset, data, bank=0, delay_ms=None, verbose=False): + """ + This is a high level i2c_write wrapper that will be used for generic cmis page write + """ + return self.write(msa_page=msa_page, offset=offset, data=data, bank=bank, delay_ms=delay_ms, verbose=verbose) + + def poll_status(self, status_reg, status_val, delay_ms=20, retry=100, ack_poll=False, verbose=False): + if ack_poll: + if not self.acknowledge_poll(timeout_ms=1000): + raise cmis_mcu_mezz_smb_Exception("Device I2C Nacked") + status = array('B', [0]) + status[0] = status_val ^ 0xFF + reg_data = status_reg + if type(status_reg) != int: + reg_data = status_reg.value + for i in range(retry): + self.reg_read(reg_data, status) + if verbose: + print("Status: %02X Retry Counts: %d" % (status[0], i)) + if status[0] == status_val: + return True, status[0] + if delay_ms is not None: + delay(delay_ms) + + return (status[0] == status_val), status[0] + + def acknowledge_poll(self, timeout_ms=100, delay_ms=10): + return self.dev.ack_poll(self.dev_addr, timeout_ms=timeout_ms, delay_ms=delay_ms) + + def exit_service_mode(self, retry=3, delay_ms=100,verbose=False): + data = array('B', [0]) + self.reg_read(0x54, data) + if verbose: + print("System Mode: %02X" % data[0]) + if data[0] == 0x00: + return True + for i in range(retry): + pwd = [0x01, 0x02, 0x03, 0x04] + self.reg_write(0x7A, pwd) + delay(delay_ms) + (ret, status) = self.poll_status(0x54, 0x00, delay_ms=10, retry=5) + if verbose: + print('Retry: %d, Status: %02X' % (i, status)) + if ret: + return True + (ret, status) = self.poll_status(0x54, 0x00, delay_ms=0, retry=1) + if not ret: + raise cmis_mcu_mezz_smb_Exception('Unable to exit service mode.') + return ret + + def msa_pattern_setup(self, channel=9, interface=1, pattern=0, delay_ms=1000,enable=True): + if not self.exit_service_mode(): + print('Unable to exit service mode.') + return False + channel = channel - 1 + if channel < 8: + print("Channel(s): ", channel + 1) + else: + print("Channel(s): ALL") + interface_str = {0: "HOST", 1: "MEDIA"} + if interface < 0 or interface > 1: + print('Only host: 0 and media: 1 interface can be selected.') + return False + print("Interface: ", interface_str[interface]) + gen_byte = 144 + interface * 8 + sel_byte = 148 + interface * 8 + + pattern_str = {0: "PRBS31Q", 1: "PRBS31", 2: "PRBS23Q", 3: "PRBS23", + 4: "PRBS15Q", 5: "PRBS15", 6: "PRBS13Q", 7: "PRBS13", + 8: "PRBS9Q", 9: "PRBS9", 10: "PRBS7Q", 11: "PRBS7", + 12: "SSPRQ", 13: "Reserved", 14: "Custom", 15: "User Pattern"} + if pattern < 0 or pattern > 15: + print('Only pattern ID between 0 - 15 can be selected.') + return False + print("Selected Pattern: ", pattern_str[pattern]) + self.set_page(0x13) + if channel < 8: + cur_pattern = array('B', [0]) + self.reg_read(sel_byte + int(channel / 2), cur_pattern) + if channel % 2: + cur_pattern[0] = cur_pattern[0] & 0x0F + cur_pattern[0] = cur_pattern[0] | (pattern << 4) + else: + cur_pattern[0] = cur_pattern[0] & 0xF0 + cur_pattern[0] = cur_pattern[0] | (pattern & 0xF) + self.reg_write(sel_byte + int(channel / 2), cur_pattern) + elif channel == 8: + cur_pattern = array('B', 4 * [0]) + self.reg_read(sel_byte, cur_pattern) + for i in range(4): + cur_pattern[i] = (pattern << 4) | pattern + self.reg_write(sel_byte, cur_pattern) + delay(delay_ms) + cur_ctrl = array('B', [0]) + self.reg_read(gen_byte, cur_ctrl) + if channel < 8: + if enable: + cur_ctrl[0] = cur_ctrl[0] | (0x01 << channel) + else: + cur_ctrl[0] = cur_ctrl[0] & ~(0x01 << channel) + elif channel == 8: + if enable: + cur_ctrl[0] = 0xFF + else: + cur_ctrl[0] = 0x00 + self.reg_write(gen_byte, cur_ctrl) + delay(delay_ms) + + return True + + def tx_disable_handler(self, channel, set_dis): + self.set_page(0x10) + tx_dis_reg = array('B', [0]) + self.reg_read(130, tx_dis_reg) + print('Current Setting: ' + "{0:08b}".format(tx_dis_reg[0])) + if channel == 8: + if set_dis: + tx_dis_reg[0] = 0xFF + else: + tx_dis_reg[0] = 0x00 + else: + if set_dis: + tx_dis_reg[0] |= (0x01 << channel) + else: + tx_dis_reg[0] &= ~(0x01 << channel) + self.reg_write(130, tx_dis_reg) + delay(self.delay_ms) + self.reg_read(130, tx_dis_reg) + print('New Setting: ' + "{0:08b}".format(tx_dis_reg[0])) + return True, tx_dis_reg[0] + + @staticmethod + def calculate_ber(data): + s1 = (data[0] & 0xF8) >> 3 + m1 = ((data[0] & 0x7) << 8) | data[1] + return m1 * (10 ** (s1 - 24)) + + @staticmethod + def float_to_u16_sff8636(val): + shift_counter = 0 + s = 0 + m = 0 + if val < 0: + val = -1 * val + if val < 2047: + while val < 2047 and val != 0: + val *= 10 + shift_counter -= 1 + m = math.floor(val / 10) + s = 24 + shift_counter + 1 + else: + while val >= 2047 and val != 0: + val /= 10 + shift_counter += 1 + m = math.floor(val) + s = 24 + shift_counter + + ret = (s << 11) + m + return ret + + def msa_read_simple_ber(self, channel=9, pattern=0, device=0, interface=1, option=0, spacing=10): + if not self.exit_service_mode(): + print('Unable to exit service mode.') + return False + pattern_str = {0: "PRBS31Q", 1: "PRBS31", 2: "PRBS23Q", 3: "PRBS23", + 4: "PRBS15Q", 5: "PRBS15", 6: "PRBS13Q", 7: "PRBS13", + 8: "PRBS9Q", 9: "PRBS9", 10: "PRBS7Q", 11: "PRBS7", + 12: "SSPRQ", 13: "Reserved", 14: "Custom", 15: "User Pattern"} + if pattern < 0 or pattern > 15: + print('Only pattern ID between 0 - 15 can be selected.') + return False + print("Selected Pattern: ", pattern_str[pattern]) + ber_data_offset = 192 + ber_ctrl_offset = 160 + complete_flag_offset = 134 + mask = 0xFF + if interface == 1: + ber_data_offset = 208 + ber_ctrl_offset = 168 + complete_flag_offset = 135 + if device == 0: + mask = 0x0F + + channel = channel - 1 + data_in = array('B', 16 * [0]) + channel_size = 4 + if device == 1 or interface == 0: + channel_size = 8 + + if channel > channel_size: + print('Invalid channel selection') + return False + + if option == 1: + header = ['MSB'] * channel_size + elif option == 2: + header = ['LSB'] * channel_size + else: + header = ['COMB'] * channel_size + row_format = "{:^{spacing}}" * (len(header) + 1) + print(row_format.format("", *header, spacing=spacing)) + pattern_byte = ((pattern & 0x0F) << 4) | (pattern & 0x0F) + self.set_page(0x13) + self.reg_write(ber_ctrl_offset, [0xFF]) # enable + self.reg_write(ber_ctrl_offset + 1, [0x00]) + self.reg_write(ber_ctrl_offset + 2, [0x00]) + self.reg_write(ber_ctrl_offset + 4, [pattern_byte, pattern_byte, pattern_byte, pattern_byte]) # pattern select + delay(5000) + self.set_page(0x14) + try: + while True: + data_line = ['-'] * channel_size + status, ret = self.poll_status(complete_flag_offset, mask, 50, 150) + if not status: + print('Timed out waiting for complete flag set') + return False + self.reg_write(130, [0x00]) + self.reg_write(128, [0x11]) + delay(120) + self.reg_read(ber_data_offset, data_in) + if channel_size == channel: + for i in range(channel_size): + data_line[i] = "{:.2E}".format(self.calculate_ber(data_in[2 * i:2 * i + 2])) + else: + data_line[channel] = "{:.2E}".format(self.calculate_ber(data_in[2 * channel:2 * channel + 2])) + print(row_format.format("", *data_line, spacing=spacing)) + except KeyboardInterrupt: + self.set_page(0x13) + self.reg_write(ber_ctrl_offset, [0x00]) + print('Exiting BER Checker..') + + +class cmis_mcu_mezz_smb_Exception(Exception): + def __init__(self, detailed_error_message): + super(cmis_mcu_mezz_smb_Exception, self).__init__(detailed_error_message) + +if __name__ == "__main__": + logger.debug('cmis_mcu_i2c.py') diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/cpo/lib/fw_tools/cmis/debug.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/cpo/lib/fw_tools/cmis/debug.py new file mode 100644 index 00000000000..cfd8f75dceb --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/cpo/lib/fw_tools/cmis/debug.py @@ -0,0 +1,55 @@ +import os +import sys +from array import array +from GS_timing import * +from util import UtilObj as u +import cmis_mcu_i2c as cmis_smb +import logging +import math +from array import array +from oe_cmis_rw import oe_cmis_i2c_rw as oe_cmis_util + + +class DebugObj(cmis_smb.cmis_mcu_mezz_smb): + + def __init__(self, twi_dev=None, oe_mcu=0): + self.twi_dev = twi_dev + self.oe_mcu = oe_mcu + self.cmis_util = oe_cmis_util() + super().__init__(twi_dev=twi_dev, oe_mcu=oe_mcu) + + def __enter__(self): + self.open() + return self + + def __exit__(self, exc_type, exc_val, exc_tb): + self.close() + return + + def debug_enable_inline_debug(self): + self.enter_debug_mode() + + def debug_dump_laser_input_power(self): + self.debug_enable_inline_debug() + pwr_payload = array('B', 32 * [0]) + self.write(msa_page=0xBF, offset=130, data=[0x00, 0x00]) + self.write(msa_page=0xBF, offset=128, data=[0x00, 0x02]) + delay(1) + self.poll_status(status_reg=255, status_val=0x01) + self.read_from_data_page(data_page=0xC0, data=pwr_payload) + laser_pwr = [] + for ch in range(16): + laser_pwr.append(u.uint8_to_uint16(pwr_payload[2*ch:2*ch+2])) + for ch in range(16): + PmW = laser_pwr[ch]/100 + if PmW > 0: + Pdb = 10 * math.log(PmW, 10) + else: + Pdb = -40 + print('EIC Laser%d Input Power: %.03f mW %.03f dBm' % (ch, PmW, Pdb)) + print('') + return laser_pwr + +class DebugException(Exception): + def __init__(self, detailed_error_message): + super(DebugException, self).__init__(detailed_error_message) diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/cpo/lib/fw_tools/i2c_driver/__init__.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/cpo/lib/fw_tools/i2c_driver/__init__.py new file mode 100755 index 00000000000..f19e5cb1d90 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/cpo/lib/fw_tools/i2c_driver/__init__.py @@ -0,0 +1,3 @@ +import sys +import os +sys.path.append(os.path.dirname(os.path.realpath(__file__))) \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/cpo/lib/fw_tools/i2c_driver/micas_i2c.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/cpo/lib/fw_tools/i2c_driver/micas_i2c.py new file mode 100755 index 00000000000..a668ab3c78f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/cpo/lib/fw_tools/i2c_driver/micas_i2c.py @@ -0,0 +1,196 @@ +import sys +import io +import fcntl +from array import array +import struct +from GS_timing import * + +I2C_SLAVE = 0x0703 +I2C_SLAVE_FORCE = 0x0706 + +class i2c: + def __init__(self, bus): + self.bus = bus + self.fr = None + self.fw = None + # print(self.fw) + # set device address + + def __enter__(self): + return + + def __exit__(self, exc_type, exc_val, exc_tb): + self.close() + + def set_bus(self, bus:int): + self.bus = bus + + def open(self): + self.fr = io.open("/dev/i2c-" + str(self.bus), "rb", buffering=0) + self.fw = io.open("/dev/i2c-" + str(self.bus), "wb", buffering=0) + + def set_device_address(self, device_addr): + if self.bus == 1: + fcntl.ioctl(self.fr, I2C_SLAVE, device_addr) + fcntl.ioctl(self.fw, I2C_SLAVE, device_addr) + else: + fcntl.ioctl(self.fr, I2C_SLAVE_FORCE, device_addr) + fcntl.ioctl(self.fw, I2C_SLAVE_FORCE, device_addr) + + def write(self, byte_data): + self.fw.write(byte_data) + + def read(self, byte_num): + return self.fr.read(byte_num) + + def close(self): + self.fw.close() + self.fr.close() + + +class I2cHost(i2c): + frame_max_size = 128 + + def __init__(self, addr=0x50, bus=2, frm_max=128): + super().__init__(bus=bus) + self.bus = bus + self.frame_max_size=frm_max + + def host_read(self, addr, n, verbose=True): + try: + try: + self.set_device_address(device_addr=addr) + except: + self.close() + raise I2CException("host_read() cannot set dev addr") + data_in = [0] * n + idx = 0 + read_size = 0 + while n: + if n <= self.frame_max_size: + read_size = n + try: + data_raw = self.read(read_size) + except: + self.close() + raise I2CException("host_read() exception on i2c read") + n = 0 + else: + read_size = self.frame_max_size + try: + data_raw = self.read(read_size) + except: + self.close() + raise I2CException("host_read() exception on i2c read") + n = n - read_size + # print(data_raw) + data_readback = struct.unpack('B' * read_size, data_raw) + # print(data_readback) + for i in range (read_size): + data_in[idx + i] = data_readback[i] + idx = idx + read_size + return idx, data_in + except (IOError, OSError): + self.close() + if verbose: + print("I/O error occurred on read", flush=True) + raise I2CException("host_read() exception on i2c read") + + def host_write(self, addr, data, verbose=True): + try: + self.set_device_address(device_addr=addr) + except: + self.close() + raise I2CException("host_write() cannot set dev addr") + try: + data_raw = struct.pack('B' * len(data), *data) + self.write(data_raw) + except (IOError, OSError): + self.close() + if verbose: + print("I/O error occurred on write", flush=True) + raise I2CException("host_write() exception on i2c write") + + def dev_write(self, addr, data, verbose=True): + try: + data_raw = struct.pack('B' * len(data), *data) + self.write(data_raw) + except IOError: + self.close() + if verbose: + print("I/O error occurred on write", flush=True) + raise I2CException("dev_write() exception on i2c write") + + def ack_poll(self, addr, timeout_ms=100, delay_ms=10): + print("ack_poll address: %02X" % addr) + n = 0 + data_out = array('B', [0]) + while n < timeout_ms: + try: + data_in = self.reg_read(addr, 0x00, 1, verbose=False) + data_out[0] = data_in[0] + self.reg_write(addr, 0x00, data_out, verbose=False) + return n < timeout_ms + except (I2CException, IOError, OSError): # bypass I2CException due to Nack + pass + delay(delay_ms) + n += delay_ms + if n >= timeout_ms: + return False + return True + + def reg_write(self, addr, offset, data, verbose=True): + try: + self.open() + except: + self.close() + raise I2CException("reg_write() Cannot Open I2C Dev") + try: + iter(data) + except TypeError: + data = [data] + n = len(data) + idx = 0 + while n: + if n <= (self.frame_max_size - 1): + data_out = [0] * (n + 1) + data_out[0] = offset + for i in range(n): + data_out[i + 1] = data[idx+i] + offset = offset + n + idx = idx + n + n = 0 + else: + data_out = [0] * self.frame_max_size + data_out[0] = offset + for i in range(self.frame_max_size-1): + data_out[i + 1] = data[idx+i] + offset = offset + (self.frame_max_size - 1) + idx = idx + (self.frame_max_size - 1) + n = n - (self.frame_max_size - 1) + self.host_write(addr, data_out, verbose=verbose) + self.close() + + def word_write(self, addr, offset, data): + data_out = [0] * 3 + data_out[0] = offset + data_out[1] = (data & 0xFF00) >> 8 + data_out[2] = (data & 0xFF) + self.write(addr, data_out) + + def reg_read(self, addr, offset, n, verbose=True): + try: + self.open() + except: + self.close() + raise I2CException("reg_read() Cannot Open I2C Dev") + self.host_write(addr, [offset], verbose=verbose) + status, data_in = self.host_read(addr, n, verbose=verbose) + self.close() + return data_in + + +class I2CException(Exception): + def __init__(self, detailed_error_message): + super(I2CException, self).__init__(detailed_error_message) + diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/cpo/lib/fw_tools/i2c_driver/twiHost.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/cpo/lib/fw_tools/i2c_driver/twiHost.py new file mode 100755 index 00000000000..c954da0e486 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/cpo/lib/fw_tools/i2c_driver/twiHost.py @@ -0,0 +1,133 @@ +import sys +from array import array +import micas_i2c as i2c_dev +import struct +import logging +from GS_timing import * + + +class TwiHostObj(object): + frame_max_size = 11 + + def __init__(self, bus=1, verbose=False): + self.bus = bus + + def read(self, addr, n, verbose=True): + try: + data_in = [0] * n + idx = 0 + read_size = 0 + try: + dev = i2c_dev.i2c(self.bus) + except: + dev.close() + while n: + if n <= self.frame_max_size: + read_size = n + try: + data_raw = dev.read(read_size) + except: + dev.close() + n = 0 + else: + read_size = self.frame_max_size + try: + data_raw = dev.read(read_size) + except: + dev.close() + n = n - read_size + data_readback = struct.unpack('B' * read_size, data_raw) + for i in range (read_size): + data_in[idx + i] = data_readback[i] + idx = idx + read_size + dev.close() + return idx, data_in + except IOError: + if verbose: + print("I/O error occurred on read", flush=True) + return 0, None + + def write(self, addr, data, verbose=True): + try: + data_raw = struct.pack('B' * len(data), *data) + dev = i2c_dev.i2c(self.bus) + dev.host_write(addr, data_raw) + dev.close() + except IOError: + if verbose: + print("I/O error occurred on write", flush=True) + dev.close() + + def dev_write(self, addr, data, dev=None, verbose=True): + try: + data_raw = struct.pack('B' * len(data), *data) + if dev is None: + dev = i2c_dev.i2c(self.bus) + dev.host_write(addr, data_raw) + # dev.close() + except IOError: + if verbose: + print("I/O error occurred on write", flush=True) + dev.close() + + def ack_poll(self, addr, timeout_ms=100, delay_ms=10): + n = 0 + data_out = array('B', [0]) + while n < timeout_ms: + print('acknowledge_poll counts: %d' % n) + try: + data_in = self.reg_read(addr, 0x00, 1, verbose=False) + data_out[0] = data_in[0] + self.reg_write(addr, 0x00, data_out, verbose=False) + return n < timeout_ms + except IOError: # bypass I2CException due to Nack + pass + delay(delay_ms) + n += delay_ms + if n >= timeout_ms: + return False + return True + + def reg_write(self, addr, offset, data, verbose=True): + try: + dev = i2c_dev.i2c(addr, self.bus) + except: + dev.close() + n = len(data) + idx = 0 + while n: + if n <= (self.frame_max_size - 1): + data_out = [0] * (n + 1) + data_out[0] = offset + for i in range(n): + data_out[i + 1] = data[idx+i] + offset = offset + n + idx = idx + n + n = 0 + else: + data_out = [0] * self.frame_max_size + data_out[0] = offset + for i in range(self.frame_max_size-1): + data_out[i + 1] = data[idx+i] + offset = offset + (self.frame_max_size - 1) + idx = idx + (self.frame_max_size - 1) + n = n - (self.frame_max_size - 1) + self.dev_write(addr, data_out, dev=dev, verbose=verbose) + dev.close() + + def word_write(self, addr, offset, data): + data_out = [0] * 3 + data_out[0] = offset + data_out[1] = (data & 0xFF00) >> 8 + data_out[2] = (data & 0xFF) + self.write(addr, data_out) + + def reg_read(self, addr, offset, n, verbose=True): + self.write(addr, [offset]) + status, data_in = self.read(addr, n, verbose=verbose) + return data_in + + +class TwiHostException(Exception): + def __init__(self, detailed_error_message): + super(TwiHostException, self).__init__(detailed_error_message) diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/cpo/lib/fw_tools/utility/GS_timing.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/cpo/lib/fw_tools/utility/GS_timing.py new file mode 100755 index 00000000000..891f2185136 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/cpo/lib/fw_tools/utility/GS_timing.py @@ -0,0 +1,225 @@ +""" +GS_timing.py +-create some low-level Arduino-like millis() (milliseconds) and micros() + (microseconds) timing functions for Python +By Gabriel Staples +http://www.ElectricRCAircraftGuy.com +-click "Contact me" at the top of my website to find my email address +Started: 11 July 2016 +Updated: 13 Aug 2016 + +History (newest on top): +20160813 - v0.2.0 created - added Linux compatibility, using ctypes, so that it's compatible with pre-Python 3.3 (for Python 3.3 or later just use the built-in time functions for Linux, shown here: https://docs.python.org/3/library/time.html) +-ex: time.clock_gettime(time.CLOCK_MONOTONIC_RAW) +20160711 - v0.1.0 created - functions work for Windows *only* (via the QPC timer) + +References: +WINDOWS: +-personal (C++ code): GS_PCArduino.h +1) Acquiring high-resolution time stamps (Windows) + -https://msdn.microsoft.com/en-us/library/windows/desktop/dn553408(v=vs.85).aspx +2) QueryPerformanceCounter function (Windows) + -https://msdn.microsoft.com/en-us/library/windows/desktop/ms644904(v=vs.85).aspx +3) QueryPerformanceFrequency function (Windows) + -https://msdn.microsoft.com/en-us/library/windows/desktop/ms644905(v=vs.85).aspx +4) LARGE_INTEGER union (Windows) + -https://msdn.microsoft.com/en-us/library/windows/desktop/aa383713(v=vs.85).aspx + +-*****https://stackoverflow.com/questions/4430227/python-on-win32-how-to-get- +absolute-timing-cpu-cycle-count + +LINUX: +-https://stackoverflow.com/questions/1205722/how-do-i-get-monotonic-time-durations-in-python + + +""" + +import ctypes, os +import time, datetime, timeit + +# Constants: +VERSION = '0.2.0' + +# ------------------------------------------------------------------- +# FUNCTIONS: +# ------------------------------------------------------------------- +# OS-specific low-level timing functions: +if (os.name == 'nt'): # for Windows: + def micros(): + "return a timestamp in microseconds (us)" + tics = ctypes.c_int64() + freq = ctypes.c_int64() + + # get ticks on the internal ~2MHz QPC clock + ctypes.windll.Kernel32.QueryPerformanceCounter(ctypes.byref(tics)) + # get the actual freq. of the internal ~2MHz QPC clock + ctypes.windll.Kernel32.QueryPerformanceFrequency(ctypes.byref(freq)) + + t_us = tics.value * 1e6 / freq.value + return t_us + + + def millis(): + "return a timestamp in milliseconds (ms)" + tics = ctypes.c_int64() + freq = ctypes.c_int64() + + # get ticks on the internal ~2MHz QPC clock + ctypes.windll.Kernel32.QueryPerformanceCounter(ctypes.byref(tics)) + # get the actual freq. of the internal ~2MHz QPC clock + ctypes.windll.Kernel32.QueryPerformanceFrequency(ctypes.byref(freq)) + + t_ms = tics.value * 1e3 / freq.value + return t_ms + +elif (os.name == 'posix'): # for Linux: + + # Constants: + CLOCK_MONOTONIC_RAW = 4 # see here: https://github.com/torvalds/linux/blob/master/include/uapi/linux/time.h + + + # prepare ctype timespec structure of {long, long} + class timespec(ctypes.Structure): + _fields_ = \ + [ + ('tv_sec', ctypes.c_long), + ('tv_nsec', ctypes.c_long) + ] + + + # Configure Python access to the clock_gettime C library, via ctypes: + # Documentation: + # -ctypes.CDLL: https://docs.python.org/3.2/library/ctypes.html + # -librt.so.1 with clock_gettime: https://docs.oracle.com/cd/E36784_01/html/E36873/librt-3lib.html #- + # -Linux clock_gettime(): http://linux.die.net/man/3/clock_gettime + librt = ctypes.CDLL('librt.so.1', use_errno=True) + clock_gettime = librt.clock_gettime + # specify input arguments and types to the C clock_gettime() function + # (int clock_ID, timespec* t) + clock_gettime.argtypes = [ctypes.c_int, ctypes.POINTER(timespec)] + + + def monotonic_time(): + "return a timestamp in seconds (sec)" + t = timespec() + # (Note that clock_gettime() returns 0 for success, or -1 for failure, in + # which case errno is set appropriately) + # -see here: http://linux.die.net/man/3/clock_gettime + if clock_gettime(CLOCK_MONOTONIC_RAW, ctypes.pointer(t)) != 0: + # if clock_gettime() returns an error + errno_ = ctypes.get_errno() + raise OSError(errno_, os.strerror(errno_)) + return t.tv_sec + t.tv_nsec * 1e-9 # sec + + + def micros(): + "return a timestamp in microseconds (us)" + return monotonic_time() * 1e6 # us + + + def millis(): + "return a timestamp in milliseconds (ms)" + return monotonic_time() * 1e3 # ms + + +# Other timing functions: +def delay(delay_ms): + "delay for delay_ms milliseconds (ms)" + t_start = millis() + while (millis() - t_start < delay_ms): + pass # do nothing + return + + +def delayMicroseconds(delay_us): + "delay for delay_us microseconds (us)" + t_start = micros() + while (micros() - t_start < delay_us): + pass # do nothing + return + + +class Timer: + """Measure time used.""" + # Ref: https://stackoverflow.com/a/57931660/ + def __init__(self, round_ndigits: int = 0): + self._round_ndigits = round_ndigits + self._start_time = timeit.default_timer() + + def __call__(self) -> float: + return timeit.default_timer() - self._start_time + + def __str__(self) -> str: + return str(datetime.timedelta(seconds=round(self(), self._round_ndigits))) + + +def timerdemo(): + # begin timer + t00 = time.time() + timer = Timer() + + time.sleep(1) + print(f"{timer}") + print(type(timer()),timer()) + + time.sleep(5) + print(f"{timer}") + print(type(timer()),timer()) + + # reset timer + timer1 = Timer() + + time.sleep(1) + print(f"{timer}") + print(type(timer()),timer()) + print(f"{timer1}") + print(type(timer1()),timer1()) + + time.sleep(5) + print(f"{timer()}") + print(type(timer()),timer()) + print(f"{timer1}") + print(type(timer1()),timer1()) + + + + + +# ------------------------------------------------------------------- +# EXAMPLES: +# ------------------------------------------------------------------- +# Only executute this block of code if running this module directly, +# *not* if importing it +# -see here: http://effbot.org/pyfaq/tutor-what-is-if-name-main-for.htm +if __name__ == "__main__": # if running this module as a stand-alone program + + # print loop execution time 100 times, using micros() + tStart = micros() # us + for x in range(0, 100): + tNow = micros() # us + dt = tNow - tStart # us; delta time + tStart = tNow # us; update + print("dt(us) = " + str(dt)) + + # print loop execution time 100 times, using millis() + print("\n") + tStart = millis() # ms + for x in range(0, 100): + tNow = millis() # ms + dt = tNow - tStart # ms; delta time + tStart = tNow # ms; update + print("dt(ms) = " + str(dt)) + + # print a counter once per second, for 5 seconds, using delay + print("\nstart") + for i in range(1, 6): + delay(1000) + print(i) + + # print a counter once per second, for 5 seconds, using delayMicroseconds + print("\nstart") + for i in range(1, 6): + delayMicroseconds(1000000) + print(i) + + timerdemo() diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/cpo/lib/fw_tools/utility/__init__.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/cpo/lib/fw_tools/utility/__init__.py new file mode 100755 index 00000000000..f19e5cb1d90 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/cpo/lib/fw_tools/utility/__init__.py @@ -0,0 +1,3 @@ +import sys +import os +sys.path.append(os.path.dirname(os.path.realpath(__file__))) \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/cpo/lib/fw_tools/utility/util.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/cpo/lib/fw_tools/utility/util.py new file mode 100755 index 00000000000..ce9b9a9c651 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/cpo/lib/fw_tools/utility/util.py @@ -0,0 +1,389 @@ +# import numpy as np +import re +from typing import Iterable +import struct +import math +import os +import time +import datetime + +LITTLE_ENDIAN = 0 +BIG_ENDIAN = 1 +class UtilObj(object): + def __init__(self): + return + + @staticmethod + def uint8_to_uint16(data_bytes, data_type=LITTLE_ENDIAN): + if data_type == LITTLE_ENDIAN: + return (data_bytes[1] << 8) + data_bytes[0] + elif data_type ==BIG_ENDIAN: + return (data_bytes[0] << 8) + data_bytes[1] + + @staticmethod + def uint8_to_uint32(data_bytes, data_type=LITTLE_ENDIAN): + if data_type == LITTLE_ENDIAN: + return (data_bytes[3] << 24) + (data_bytes[2] << 16) + (data_bytes[1] << 8) + data_bytes[0] + elif data_type ==BIG_ENDIAN: + return (data_bytes[0] << 24) + (data_bytes[1] << 16) + (data_bytes[2] << 8) + data_bytes[3] + + @staticmethod + def get_str_line_checksum(text_line): + text_data = [text_line[x:x+2] for x in range(0, len(text_line), 2)] + cs = 0 + for item in text_data: + cs += int(item, 16) + cs = ~(cs & 0xFF) + 1 + return "%02X" % (cs & 0xFF) + + @staticmethod + def get_8bit_check_sum(data_buffer): + sum_value = 0 + for x in data_buffer: + sum_value += x + sum_value &= 0xFF + return sum_value + + @staticmethod + def get_8bit_xor_check_sum(data_buffer): + sum_value = 0 + for x in data_buffer: + sum_value += x + sum_value &= 0xFF + sum_value ^= 0xFF + sum_value &= 0xFF + return sum_value + + @staticmethod + def is_eol(c): + """is_eol() checks if the character is end of line. + Args: + (str) c + Returns: + True: end of line + False: not end of line""" + return (c == 10) or (c == 13) + + @classmethod + def check_sum_calculate(cls, hex_file): + sum_value = 0 + for c in iter(lambda: hex_file.read(1), ''): + if not cls.is_eol(ord(c)): + sum_value += ord(c) + + sum_value &= 0xFFFF + return sum_value + + @classmethod + def calculate_checksum(cls, hex_file): + sum_value = 0 + + with open(hex_file) as f: + for c in iter(lambda: f.read(1), ''): + if not cls.is_eol(ord(c)): + sum_value += ord(c) + + f.close() + sum_value &= 0xFFFF + + return sum_value + + @staticmethod + def calculate_crc(init_crc, input_data): + polynomial = 0x04C11DB7 + + crc_result = init_crc ^ input_data + + for i in range(32): + if crc_result & 0x80000000: + crc_result = (crc_result << 1) ^ polynomial + else: + crc_result = (crc_result << 1) + + return crc_result & 0xFFFFFFFF + + @classmethod + def calculate_buffer_crc(cls, data_buffer, init_crc=0xFFFFFFFF): + crc_result = init_crc + + for i in range(0, len(data_buffer), 4): + crc_data = (data_buffer[i] << 24) + (data_buffer[i + 1] << 16) + \ + (data_buffer[i + 2] << 8) + data_buffer[i + 3] + crc_result = cls.calculate_crc(crc_result, crc_data) + return crc_result & 0xFFFFFFFF + + @classmethod + def check_sum_valid(cls, hex_file, check_sum): + """check_sum_valid() checks the hex file to see if it has the correct checksum + Args: + (File) hex_file + (int) check_sum + Returns: + (bool) checksum success/fail""" + sum_value = 0 + + with open(hex_file) as f: + + for c in iter(lambda: f.read(1), ''): + if not cls.is_eol(ord(c)): + sum_value += ord(c) + f.close() + + sum_value &= 0xFFFF + + return sum_value == check_sum + + @staticmethod + def twos_comp(val, bits): + """compute the 2's complement of int value val""" + if (val & (1 << (bits - 1))) != 0: + val = val - (1 << bits) + return val + + @staticmethod + def read_hex_file_simple(filename): + hex_file = open(filename, 'r') + data_buffer = [] + idx = 0 + file_line = hex_file.readline() + while file_line != '': + data_length = int(file_line[1:3], 16) + data_type = int(file_line[7:9], 16) + if data_type == 0x00: + for n in range(data_length): + data_buffer.append(int(file_line[(9 + 2 * n):(11 + 2 * n)], 16)) + idx += 1 + file_line = hex_file.readline() + hex_file.close() + return data_buffer + + @staticmethod + def read_hex_file(filename, byte_size=0x8000): + hex_file = open(filename, 'r') + data_buffer = [[0 for i in range(2)] for j in range(byte_size)] + data_buffer_index = 0 + + file_line = hex_file.readline() + while file_line != '': + data_length = int(file_line[1:3], 16) + data_type = int(file_line[7:9], 16) + if data_type == 0x00: + eeprom_index = int(file_line[3:7], 16) + for i in range(eeprom_index, eeprom_index + data_length): + data_buffer[i][0] = 1 + data_buffer[i][1] = int(file_line[(9 + 2 * (i-eeprom_index)):(11 + 2 * (i-eeprom_index))], 16) + data_buffer_index += data_length + + if data_buffer_index > (byte_size + 1): + print('Total number of data bytes has exceeded %d.' % byte_size) + return False, None + + file_line = hex_file.readline() + hex_file.close() + return True, data_buffer + + @staticmethod + def extract_hex_one_page_spaced_data(hex_file, data_buffer): + """extract_one_page_data() extracts 256 bytes of data bytes from the hex file. + Args: + (File) hex_file + (Array) data_buffer + Returns: + (int) status""" + + page_size = len(data_buffer) + line_size = 32 + if page_size % line_size != 0: + return False + line_num = int(page_size / line_size) + + for i in range(line_num): + file_line = hex_file.readline() + for j in range(line_size): + data_buffer[int(i * line_size + j)] = int(file_line[int(3 * j):int(3 * j + 2)], 16) + + return True + + @staticmethod + def extract_intel_hex_one_page_data(hex_file, data_buffer): + """extract_one_page_data() extracts 256 bytes of data bytes from the hex file. + Args: + (File) hex_file + (Array) data_buffer + Returns: + (int) status""" + byte_number = 0 + page_size = len(data_buffer) + + while byte_number < page_size: # Extract one page + file_line = hex_file.readline() # Read one line + if file_line == '': # End of file + if byte_number < page_size: # Data buffer is not filled + for i in range(byte_number, page_size): # Fill the empty bytes with 0xFF + data_buffer[i] = 0xFF + return True + if int(file_line[7:9], 16) == 0x00: # If the hex line contains data + length = int(file_line[1:3], 16) # Calculate number of bytes in the hex line + for i in range(length): # Store each bytes into the data buffer + data_buffer[byte_number + i] = int(file_line[(9 + 2 * i): 11 + 2 * i], 16) + byte_number += length + return True + + @staticmethod + def write_to_file(hex_file, data_buffer): + if len(data_buffer) % 16 != 0: + return False + + with open(hex_file, 'w') as f: + f.write(':020000040000FA\n') + start_address = 0x0000 + for i in range(0, len(data_buffer), 16): + data_line = ':10%04X00' % start_address + chk_sum = 0x10 + chk_sum += (start_address >> 8) & 0xFF + chk_sum += start_address & 0xFF + + for j in range(16): + data_line = data_line + '%02X' % data_buffer[i + j] + chk_sum += int(data_buffer[i + j]) + chk_sum = ~(chk_sum & 0xFF) + 1 + data_line = data_line + '%02X\n' % (chk_sum & 0xFF) + f.write(data_line) + start_address += 0x10 + + f.write(':00000001FF\n') + f.close() + return True + + @staticmethod + def write_to_file_spaced_data(hex_file, data_buffer): + if len(data_buffer) % 32 != 0: + return False + + with open(hex_file, 'w') as f: + for i in range(0, len(data_buffer), 32): + data_line = " ".join(map("{:02x}".format, data_buffer[i:i+32])) + ' \n' + f.write(data_line) + + f.close() + return True + + @staticmethod + def print_data_table(col_header, row_header, data_buffer, spacing=8): + arr = [['-' for i in range(len(row_header))] for j in range(len(col_header))] + data_array = [None] * (len(row_header) * len(col_header)) + for i in range(len(data_buffer)): + if data_buffer[i] is not None: + data_array[i] = data_buffer[i] + for i in range(len(col_header)): + for j in range(len(row_header)): + if data_array[i * len(row_header) + j] is not None: + arr[i][j] = str(data_array[i * len(row_header) + j]) + row_format = "{:^{spacing}}" * (len(row_header) + 1) + print(row_format.format("", *row_header, spacing=spacing)) + for col, row in zip(col_header, arr): + print(row_format.format(col, *row, spacing=spacing)) + + @staticmethod + def parse_int_args(my_str: str, reverse=False): + if reverse not in [True, False]: + raise ValueError('reverse arg must be bool') + + my_str = my_str.strip() + try: + temp = [(lambda sub: range(sub[0], sub[-1] + 1))(list(map(int, ele.split('-')))) for ele in my_str.split(', ')] + except: + temp = [(lambda sub: range(sub[0], sub[-1] + 1))(list(map(int, ele.split('-')))) for ele in my_str.split(',')] + res = [b for a in temp for b in a] + # sort the + res = sorted(res, reverse=reverse) + return res + + @staticmethod + def gen_port_str(*ports, prefix='', verbose=True, **kwports) -> str: + """ + This function is to generate the ports string depends on the input + :param *ports: ports without specify the keywords, *ports can be single int, list and tuple of ints for + : multiple channels + :param *kwports: ports with specify the keywords, *kwports can be single int, list or tuple + : special for keyword with "start" and "end", for example, start = 10, end = 20 means 10-20 + :prefix is added so that for ports like cd0,cd1,cd3 etc, input [0,1,2,3], and later add the common prefix later. + :return the return value will be a string in format '1-2,4,10-20,25' + """ + pc_ports = set() + for item in ports: + if type(item) is int: + pc_ports.add(item) + elif isinstance(item, Iterable): + pc_ports.update(item) + else: + raise ValueError(f"Parameter '{item}' error, parameter must be int or list with int") + + specified_pair_start = [] + specified_pair_end = [] + for key, item in kwports.items(): + if 'start' in key.lower(): + specified_pair_start.append(item) + elif 'end' in key.lower() or 'stop' in key.lower(): + specified_pair_end.append(item) + + elif type(item) is int: + pc_ports.add(item) + elif isinstance(item, Iterable): + pc_ports.update(item) + else: + raise ValueError(f"Parameter '{key} = {item}' error, parameter must be int or list with int") + + # if len(specified_pair_start) > 0 and len(specified_pair_end) > 0: + if len(specified_pair_start) == len(specified_pair_end): + for _start, _end in zip(specified_pair_start, specified_pair_end): + pc_ports.update(range(_start, _end + 1)) + else: + raise ValueError("start and end must be used in pair") + + pc_ports_list = list(pc_ports) + pc_ports_list.sort() + + # merge the sections + pc_ports_sections = [] + start = pc_ports_list[0] + prev = pc_ports_list[0] + for _idx, item in enumerate(pc_ports_list): + + if item - prev > 1: + pc_ports_sections.append([start, prev]) + start = item + if _idx == len(pc_ports_list) - 1: + pc_ports_sections.append([start, item]) + prev = item + # logger.debug(f"All Ports: {pc_ports_list}") + + pc_ports_section_strs = [] + for section in pc_ports_sections: + if section[0] == section[1]: + pc_ports_section_strs.append(str(section[0])) + else: + pc_ports_section_strs.append(f"{section[0]}-{section[1]}") + _all_ports_str = ','.join(pc_ports_section_strs) + + # dealing with add prefix + all_ports_str = prefix + all_ports_str += _all_ports_str + all_ports_str = all_ports_str.replace('-', f'-{prefix}') + all_ports_str = all_ports_str.replace(',', f',{prefix}') + + if verbose: + print(f"Generated ASIC port string: {all_ports_str}") + return all_ports_str + + @staticmethod + def gen_sorted_port_lst(*ports, verbose=True): + if isinstance(ports, int): + ports = [ports] + + _port_str = UtilObj.gen_port_str(*ports, verbose=verbose) + _lc_ports_id = UtilObj.parse_int_args(_port_str) + + _rtn = sorted(list(set(_lc_ports_id))) + + return _rtn diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/cpo/lib/oe_cmis_rw.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/cpo/lib/oe_cmis_rw.py new file mode 100755 index 00000000000..bbe2b7657c5 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/cpo/lib/oe_cmis_rw.py @@ -0,0 +1,287 @@ +import os +import fcntl +import time +import io +import struct +from cpo_platform_config import CPO_PLATFORM_CONFIG, OE_I2C_PATH_MAP + +class oe_cmis_rw(): + + def cmis_oe_bus_get(self, oe_index): + return CPO_PLATFORM_CONFIG.get("oe_bus_map")[oe_index] + + def cmis_read(self, oe_index, bank, page, offset, rd_len, lock): + raise NotImplementedError + + def cmis_write(self, oe_index, bank, page, offset, wr_data, lock): + raise NotImplementedError + +class oe_cmis_sysfs_rw(oe_cmis_rw): + + def acquire_lock(self, fd): + fcntl.flock(fd, fcntl.LOCK_EX) + + def release_lock(self, fd): + fcntl.flock(fd, fcntl.LOCK_UN) + + def dfd_i2c_sysfs_read(self, fd, offset, rd_len): + val_list = [] + try: + os.lseek(fd, offset, os.SEEK_SET) + ret = os.read(fd, rd_len) + for item in ret: + val_list.append(item) + return True, val_list + except Exception as e: + return False, str(e) + + def dfd_i2c_sysfs_write(self, fd, offset, wr_buf): + try: + os.lseek(fd, offset, os.SEEK_SET) + ret = os.write(fd, bytes(wr_buf)) + if ret == len(wr_buf): + return True, "" + return False, "write buf len: %s, write len indeed: %s" % (len(wr_buf), ret) + except Exception as e: + return False, str(e) + + def cmis_read(self, oe_index, bank, page, offset, rd_len, lock=True): + """ + Read cmis data from /sys/bus/i2c/devices/XX-0050/eeprom + + Args : + bank: cmis bank + page: cmis page + offset: read data offset + rd_len: read length + + Returns: + True, value if read is successfully, False, errmsg if not + """ + + val_list = [] + msg = "" + ret = "" + fd = -1 + i2c_path = OE_I2C_PATH_MAP.get(oe_index) + if not os.path.exists(i2c_path): + msg = i2c_path + " not found!" + return False, msg + time.sleep(0.1) + try: + fd = os.open(i2c_path, os.O_RDWR) + if fd < 0: + msg = "cmis_sysfs_byte_read open %s failed, fd: %s" % (i2c_path, fd) + return False, msg + if (lock): + self.acquire_lock(fd) + # set bank + status, log = self.dfd_i2c_sysfs_write(fd, 0x7e, [bank]) + if status is False: + return status, log + # set page + status, log = self.dfd_i2c_sysfs_write(fd, 0x7f, [page]) + if status is False: + return status, log + # read data + for i in range(0, rd_len): + status, val = self.dfd_i2c_sysfs_read(fd, offset+i, 1) + if status is False: + return status, val + val_list.extend(val) + return True, val_list + except Exception as e: + return False, str(e) + finally: + if (fd > 0) and lock: + self.release_lock(fd) + if fd > 0: + os.close(fd) + + def cmis_write(self, oe_index, bank, page, offset, wr_data, lock=True): + """ + Write cmis data through /sys/bus/i2c/devices/XX-0050/eeprom + + Args : + bank: cmis bank + page: cmis page + offset: write data offset + wr_data: write data + + Returns: + True, "" if read is successfully, False, errmsg if not + """ + val_list = [] + msg = "" + ret = "" + fd = -1 + i2c_path = OE_I2C_PATH_MAP.get(oe_index) + if not os.path.exists(i2c_path): + msg = i2c_path + " not found!" + return False, msg + # time.sleep(0.1) + try: + fd = os.open(i2c_path, os.O_RDWR) + if fd < 0: + msg = "cmis_sysfs_byte_read open %s failed, fd: %s" % (i2c_path, fd) + return False, msg + if (lock): + self.acquire_lock(fd) + # set bank + status, log = self.dfd_i2c_sysfs_write(fd, 0x7e, [bank]) + if status is False: + return status, log + # set page + status, log = self.dfd_i2c_sysfs_write(fd, 0x7f, [page]) + if status is False: + return status, log + # write data + status, log = self.dfd_i2c_sysfs_write(fd, offset, wr_data) + return status, log + except Exception as e: + return False, str(e) + finally: + if (fd > 0) and lock: + self.release_lock(fd) + if fd > 0: + os.close(fd) + +class I2CException(Exception): + def __init__(self, detailed_error_message): + super(I2CException, self).__init__(detailed_error_message) + +I2C_SLAVE = 0x0703 +I2C_SLAVE_FORCE = 0x0706 + +class oe_cmis_i2c_rw(oe_cmis_rw): + + frame_max_size = 256 + + def write(self, byte_data): + self.i2c_fw.write(byte_data) + + def read(self, byte_num): + return self.i2c_fr.read(byte_num) + + def host_read(self, rd_len, verbose = False): + try: + data_in = [0] * rd_len + idx = 0 + read_size = 0 + while rd_len: + if rd_len <= self.frame_max_size: + read_size = rd_len + try: + data_raw = self.read(read_size) + except: + raise I2CException("host_read() exception on i2c read") + rd_len = 0 + else: + read_size = self.frame_max_size + try: + data_raw = self.read(read_size) + except: + raise I2CException("host_read() exception on i2c read") + rd_len = rd_len - read_size + # print(data_raw) + data_readback = struct.unpack('B' * read_size, data_raw) + # print(data_readback) + for i in range (read_size): + data_in[idx + i] = data_readback[i] + idx = idx + read_size + return idx, data_in + except (IOError, OSError): + if verbose: + print("I/O error occurred on read", flush=True) + raise I2CException("host_read() exception on i2c read") + + def host_write(self, data, verbose = False): + try: + data_raw = struct.pack('B' * len(data), *data) + self.write(data_raw) + except (IOError, OSError): + if verbose: + print("I/O error occurred on write", flush=True) + raise I2CException("host_write() exception on i2c write") + + def reg_read(self, offset, rd_len, verbose = False): + self.host_write([offset], verbose=verbose) + status, data = self.host_read(rd_len, verbose=verbose) + return status, data + + def reg_write(self, offset, data, verbose = False): + try: + iter(data) + except TypeError: + data = [data] + n = len(data) + idx = 0 + while n: + if n <= (self.frame_max_size - 1): + data_out = [0] * (n + 1) + data_out[0] = offset + for i in range(n): + data_out[i + 1] = data[idx+i] + offset = offset + n + idx = idx + n + n = 0 + else: + data_out = [0] * self.frame_max_size + data_out[0] = offset + for i in range(self.frame_max_size-1): + data_out[i + 1] = data[idx+i] + offset = offset + (self.frame_max_size - 1) + idx = idx + (self.frame_max_size - 1) + n = n - (self.frame_max_size - 1) + self.host_write(data_out, verbose=verbose) + + def set_page(self, page): + self.reg_write(0x7F, [page]) + + def set_bank(self, bank): + self.reg_write(0x7E, [bank]) + + def set_device_address(self, device_addr): + try: + if self.bus == 1: + fcntl.ioctl(self.i2c_fr, I2C_SLAVE, device_addr) + fcntl.ioctl(self.i2c_fw, I2C_SLAVE, device_addr) + else: + fcntl.ioctl(self.i2c_fr, I2C_SLAVE_FORCE, device_addr) + fcntl.ioctl(self.i2c_fw, I2C_SLAVE_FORCE, device_addr) + except: + raise I2CException("cmis_read() cannot set dev addr") + + def cmis_read(self, oe_index, bank, page, offset, rd_len, lock=True): + self.bus = self.cmis_oe_bus_get(oe_index=oe_index) + try: + self.i2c_fr = io.open("/dev/i2c-" + str(self.bus), "rb", buffering=0) + self.i2c_fw = io.open("/dev/i2c-" + str(self.bus), "wb", buffering=0) + self.set_device_address(0x50) + if (offset >= 128): + self.set_page(page=page) + self.set_bank(bank=bank) + status , data = self.reg_read(offset=offset, rd_len=rd_len) + return True if status > 0 else False, data + except Exception as e: + return False, str(e) + finally: + self.i2c_fr.close() + self.i2c_fw.close() + + def cmis_write(self, oe_index, bank, page, offset, wr_data, lock=True): + self.bus = self.cmis_oe_bus_get(oe_index=oe_index) + try: + self.i2c_fr = io.open("/dev/i2c-" + str(self.bus), "rb", buffering=0) + self.i2c_fw = io.open("/dev/i2c-" + str(self.bus), "wb", buffering=0) + self.set_device_address(0x50) + if (offset >= 128): + self.set_page(page=page) + self.set_bank(bank=bank) + self.reg_write(offset=offset, data=wr_data) + return True , "" + except Exception as e: + return False, str(e) + finally: + self.i2c_fr.close() + self.i2c_fw.close() \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/cpo/script/cpo_daemon.sh b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/cpo/script/cpo_daemon.sh new file mode 100755 index 00000000000..92f666a8970 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/cpo/script/cpo_daemon.sh @@ -0,0 +1,63 @@ +#!/bin/bash + +wait_syncd() { + # wait until bcm sdk is ready to get a request + while true; do + /usr/bin/bcmcmd -t 1 "show unit" | grep BCM >/dev/null 2>&1 + rv=$? + if [ $rv -eq 0 ]; then + break + fi + sleep 1 + done +} + +start() { + echo "Starting cpo_daemon_process..." + + platforms=( \ + "x86_64-micas_m2-w6940-128x1-fr4-r0" \ + ) + + result=$(cat /host/machine.conf | grep onie_platform | cut -d = -f 2) + echo "platform: $result" + + cpo_device=0 + for i in ${platforms[*]}; do + if [ $result == $i ]; + then + cpo_device=1 + break + fi + done + + if [ $cpo_device -eq 1 ]; + then + wait_syncd + cpo_daemon_process + else + echo "$result not support cpo_daemon_process" + exit 0 + fi +} + +wait() { + echo "wait cpo_daemon_process... do nothing" +} + +stop() { + echo "Stopping cpo_daemon_process..." + kill -9 `ps -ef | grep python3 | grep /usr/local/bin/cpo_daemon_process | awk '{print $2}'` + echo "Stopped cpo_daemon_process..." + exit 0 +} + +case "$1" in + start|wait|stop) + $1 + ;; + *) + echo "Usage: $0 {start|wait|stop}" + exit 1 + ;; +esac diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/cpo/script/cpo_daemon_process b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/cpo/script/cpo_daemon_process new file mode 100755 index 00000000000..0a07178b698 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/cpo/script/cpo_daemon_process @@ -0,0 +1,1516 @@ +#!/usr/bin/python3 +import traceback +import sys +import signal +import time +import threading +import socket +import select +import copy +import os +import json +import fcntl +import io +import subprocess +from sonic_py_common import device_info,daemon_base +from swsscommon import swsscommon +from oe_cmis_rw import oe_cmis_sysfs_rw, oe_cmis_i2c_rw +from cmis_memory_map import cmis_memory_helper_base as cmis_memory_map_base +from cpo_platform_config import CPO_PLATFORM_CONFIG +from cpo_platform_config import helper_logger, Port_Mapping, OE_I2C_PATH_MAP, BANK_LANE_NUM +from cpo_platform_config import CPO_PLATFORM_MEDIA_SETTINGS, OE_NUM, OE_BANK_NUM, OE_RLM_NUM +CPO_STATUS_CHECK_PERIOD_SECS = 1 +DATABASE_CHECK_PRTIOD_SECS = 0.01 +SELECT_TIMEOUT_MSECS = 1000 +global_oe_dict = dict() +global_bank_dict = dict() +global_rlm_dict = dict() +global_async_ret = dict() +global_oe_daemon_thread_dict = dict() +# Signal handler +def signal_handler(sig, frame): + global stop_event + stop_event.set() + +is_subset = lambda dict1, dict2: all(item in dict2.items() for item in dict1.items()) +def is_state_complete(target_state, active_state): + if target_state == active_state: + return True + if isinstance(target_state, dict) and isinstance(active_state, dict): + if is_subset(target_state, active_state): + return True + else: + for field_key, field_value in target_state.items(): + if not is_state_complete(field_value, active_state.get(field_key, None)): + return False + return True + if isinstance(target_state, list): + if active_state in target_state: + return True + else: + return False + return False + +def check_port_in_range(range_str, physical_port): + RANGE_SEPARATOR = '-' + range_list = range_str.split(RANGE_SEPARATOR) + start_num = int(range_list[0].strip()) + end_num = int(range_list[1].strip()) + if start_num <= physical_port <= end_num: + return True + return False + +def file_rw_lock(oe_index): + pidfile = open(OE_I2C_PATH_MAP.get(oe_index), "r") + if pidfile == None: + return pidfile + # Retry 100 times to lock file + for i in range(0, 100): + try: + fcntl.flock(pidfile, fcntl.LOCK_EX | fcntl.LOCK_NB) + return pidfile + except Exception: + time.sleep(0.05) + continue + pidfile.close() + return None + +def file_rw_unlock(pidfile): + if pidfile == None: + return True + try: + fcntl.flock(pidfile, fcntl.LOCK_UN) + pidfile.close() + return True + except Exception as e: + print("file unlock err, msg:%s" % (str(e))) + return False + +def convert_to_table_output(title, input_dict:dict): + row_split_char = '=' + def string_fill(input, target_len): + string_list = list(input) + string_list.extend([' '] * (target_len - len(string_list))) + return ''.join(string_list) + pad_len = 3 + pad_len2 = 5 + output_string = io.StringIO() + + table_info = dict() + for table, table_dict in input_dict.items(): + first_column_set = set() + head_keys_len = dict() + division = 0 + for key, value in table_dict.items(): + key_len = len(key) + if isinstance(value, dict): + max_value_len = max([len(item) for item in value.values()]) + first_column_set.update(set(value.keys())) + division = 2 + else: + max_value_len = len(str(value)) + first_column_set.add(key) + division = 1 + head_keys_len[key] = key_len if key_len > max_value_len else max_value_len + + table_info[table] = { + "first_column_set": first_column_set, + "head_keys_len": head_keys_len, + "division": division + } + + first_col_len = 0 + total_row_len = 0 + for table, table_cfg in table_info.items(): + max_col_len = max([len(item) for item in table_cfg["first_column_set"]]) + first_col_len = max_col_len if max_col_len > first_col_len else first_col_len + head_keys_len_sum = sum(table_cfg["head_keys_len"].values()) + (pad_len+1) * len(table_cfg["head_keys_len"].values()) + total_row_len = head_keys_len_sum if head_keys_len_sum > total_row_len else total_row_len + + total_row_len += (first_col_len + 1) + print(row_split_char*total_row_len, end='\n', file=output_string) + + print("|{}|".format(title.center(total_row_len-2)), end='\n', file=output_string) + # print(title.center(total_row_len), file=output_string) + + for table, table_cfg in table_info.items(): + print(row_split_char*total_row_len, end='\n', file=output_string) + if table_cfg["division"] == 2: + head_keys_len = table_cfg["head_keys_len"] + first_column_set = table_cfg["first_column_set"] + head_list = [key.center(key_len + pad_len) for key, key_len in head_keys_len.items()] + head_line = '|'.join(head_list) + + + print("|{}|".format(' '*(first_col_len - 1)), end='', file=output_string) + # print(' '*first_col_len, end='|', file=output_string) + print(head_line, end='|\n', file=output_string) + print(row_split_char*total_row_len, end='\n', file=output_string) + + first_column_list = list(first_column_set) + first_column_list.sort() + for first_column in first_column_list: + print("|{}|".format(first_column.center(first_col_len -1)), end='', file=output_string) + # print(first_column.center(first_col_len), end='|', file=output_string) + + value_row_list = [input_dict[table][head_key][first_column].center(key_len+pad_len) for head_key, key_len in head_keys_len.items()] + value_row = '|'.join(value_row_list) + print(value_row, end='|\n', file=output_string) + else: + head_keys_len = table_cfg["head_keys_len"] + first_column_set = table_cfg["first_column_set"] + first_column_list = list(first_column_set) + first_column_list.sort() + for column in first_column_list: + key = column + value = input_dict[table][key] + copp = "{}{}".format(string_fill(key, first_col_len+pad_len2), value) + string = "| {}|".format(string_fill(copp, total_row_len-3)) + print(string, file=output_string) + # print(string_fill(key, first_col_len+pad_len2), end='', file=output_string) + # print(value, file=output_string) + + print(row_split_char*total_row_len, end='\n', file=output_string) + return output_string + +def get_media_val_str_from_dict(media_dict): + LANE_STR = 'lane' + LANE_SEPARATOR = ',' + media_str = '' + tmp_dict = {} + for keys in media_dict: + lane_num = int(keys.strip()[len(LANE_STR):]) + tmp_dict[lane_num] = media_dict[keys] + for key in range(0, len(tmp_dict)): + media_str += tmp_dict[key] + if key != list(tmp_dict.keys())[-1]: + media_str += LANE_SEPARATOR + return media_str + +def get_media_val_str(num_logical_ports, lane_dict, logical_idx): + LANE_STR = 'lane' + logical_media_dict = {} + num_lanes_on_port = len(lane_dict) + # The physical ports has more than one logical port meaning it is + # in breakout mode. So fetch the corresponding lanes from the file + media_val_str = '' + if (num_logical_ports > 1) and \ + (num_lanes_on_port >= num_logical_ports): + num_lanes_per_logical_port = num_lanes_on_port//num_logical_ports + start_lane = logical_idx * num_lanes_per_logical_port + + for lane_idx in range(start_lane, start_lane + + num_lanes_per_logical_port): + lane_idx_str = LANE_STR + str(lane_idx) + logical_lane_idx_str = LANE_STR + str(lane_idx - start_lane) + logical_media_dict[logical_lane_idx_str] = lane_dict[lane_idx_str] + + media_val_str = get_media_val_str_from_dict(logical_media_dict) + else: + media_val_str = get_media_val_str_from_dict(lane_dict) + return media_val_str + +def show_status(args, port_mapping): + oe_index = args["oe_index"] + oe_object = global_oe_dict[oe_index] + bank_index_list = port_mapping.oe_index_to_bank_index_list(oe_index=oe_index) + rlm_index_list = port_mapping.oe_index_to_rlm_index_list(oe_index=oe_index) + info = {"OE{}".format(oe_index): oe_object.active_state} + for bank_global_index in bank_index_list: + bank_local_index = port_mapping.bank_global_index_to_local_index(bank_global_index) + info["OE{}-BANK{}".format(oe_index, bank_local_index)] = global_bank_dict[bank_global_index].active_state + for rlm_global_index in rlm_index_list: + rlm_local_index = port_mapping.rlm_global_index_to_local_index(rlm_global_index) + info["OE{}-RLM{}".format(oe_index, rlm_local_index)] = global_rlm_dict[rlm_global_index].active_state + return True, info + +def enter_mission_mode(args, port_mapping): + oe_index = args.get("oe_index", None) + manully = args.get("manully", False) + if oe_index == None: + return False, "" + # suspend oe_daemon + oe_object = global_oe_daemon_thread_dict[oe_index] + oe_object.suspend() + if manully: + oe_object.manully_enabled = True + if oe_object.mission_mode == True: + oe_object.resume() + return True, "" + try: + retval, info = global_oe_dict[oe_index].module_reset() + if (not retval): + helper_logger.log_warn("OE{}, module_reset timeout!".format(oe_index)) + else: + helper_logger.log_info("OE{}, module_reset succeed!".format(oe_index)) + # populate_staged_set + for bank_local_index in range(OE_BANK_NUM): + bank_global_index = (oe_index*OE_BANK_NUM) + bank_local_index + port_index_list = port_mapping.bank_index_to_port_index_list(bank_global_index) + ports_speed_set = set() + for port_index in port_index_list: + ports_speed_set.add(port_mapping.get_port_speed(port_index)) + if len(ports_speed_set) != 1: + continue + speed = ports_speed_set.pop() + if speed == None: + continue + retval, info = global_bank_dict[bank_global_index].apply_datapath_init_clear() + retval, info = global_bank_dict[bank_global_index].populate_staged_set(speed=speed) + # retval, info = global_bank_dict[bank_global_index].apply_datapath_init() # TODO: check + if (not retval): + helper_logger.log_warn("OE{}-BANK{}, populate_staged_set {} failed!".format(oe_index, bank_local_index, speed)) + else: + helper_logger.log_info("OE{}-BANK{}, populate_staged_set {} succeed!".format(oe_index, bank_local_index, speed)) + for bank_local_index in range(OE_BANK_NUM): + bank_global_index = (oe_index*OE_BANK_NUM) + bank_local_index + retval, info = global_bank_dict[bank_global_index].datapath_init() + if (not retval): + helper_logger.log_warn("OE{}-BANK{}, datapath_init failed!".format(oe_index, bank_local_index)) + else: + helper_logger.log_info("OE{}-BANK{}, datapath_init succeed!".format(oe_index, bank_local_index)) + for bank_local_index in range(OE_BANK_NUM): + bank_global_index = (oe_index*OE_BANK_NUM) + bank_local_index + retval, info = global_bank_dict[bank_global_index].tx_output_enabled() + if (not retval): + helper_logger.log_warn("OE{}-BANK{}, tx_output_enabled failed!".format(oe_index, bank_local_index)) + else: + helper_logger.log_info("OE{}-BANK{}, tx_output_enabled succeed!".format(oe_index, bank_local_index)) + retval, info = global_oe_dict[oe_index].module_exit_lpmode() + if (not retval): + helper_logger.log_warn("OE{}, module_exit_lpmode failed!".format(oe_index)) + else: + helper_logger.log_info("OE{}, module_exit_lpmode succeed!".format(oe_index)) + rlm_power_cfg_threads = list() + rlm_index_list = port_mapping.oe_index_to_rlm_index_list(oe_index) + for rlm_global_index in rlm_index_list: + thread = threading.Thread(target=rlm_power_cfg_thread, args=(rlm_global_index, "full-power"), daemon=True) + rlm_power_cfg_threads.append(thread) + thread.start() + for thread in rlm_power_cfg_threads: + thread.join() + # set true after config done + oe_object.mission_mode = True + # oe_object.manully_disabled = False + return True, "" + except Exception as e: + return False, str(e) + finally: + oe_object.resume() + +def enter_mission_mode_without_reset(args, port_mapping): + oe_index = args.get("oe_index", None) + manully = args.get("manully", False) + if oe_index == None: + return False, "" + # suspend oe_daemon + oe_object = global_oe_daemon_thread_dict[oe_index] + oe_object.suspend() + if manully: + oe_object.manully_enabled = True + if oe_object.mission_mode == True: + oe_object.resume() + return True, "" + try: + for bank_local_index in range(OE_BANK_NUM): + bank_global_index = (oe_index*OE_BANK_NUM) + bank_local_index + retval, info = global_bank_dict[bank_global_index].datapath_init() + if (not retval): + helper_logger.log_warn("OE{}-BANK{}, datapath_init failed!".format(oe_index, bank_local_index)) + else: + helper_logger.log_info("OE{}-BANK{}, datapath_init succeed!".format(oe_index, bank_local_index)) + for bank_local_index in range(OE_BANK_NUM): + bank_global_index = (oe_index*OE_BANK_NUM) + bank_local_index + retval, info = global_bank_dict[bank_global_index].tx_output_enabled() + if (not retval): + helper_logger.log_warn("OE{}-BANK{}, tx_output_enabled failed!".format(oe_index, bank_local_index)) + else: + helper_logger.log_info("OE{}-BANK{}, tx_output_enabled succeed!".format(oe_index, bank_local_index)) + oe_object.mission_mode = True + return True, "" + except Exception as e: + return False, str(e) + finally: + oe_object.resume() + +def exit_mission_mode(args, port_mapping): + oe_index = args.get("oe_index", None) + manully = args.get("manully", False) + if oe_index == None: + return False, "" + oe_object = global_oe_daemon_thread_dict[oe_index] + oe_object.suspend() + if manully: + oe_object.manully_disabled = True + if oe_object.mission_mode == False: + oe_object.resume() + return True, "" + try: + # set false before config + oe_object.mission_mode = False + for bank_local_index in range(OE_BANK_NUM): + bank_global_index = (oe_index*OE_BANK_NUM) + bank_local_index + ret, status = global_bank_dict[bank_global_index].datapath_deinit() + if (not ret): + helper_logger.log_warn("OE{}-BANK{}, datapath_deinit failed!".format(oe_index, bank_local_index)) + else: + helper_logger.log_info("OE{}-BANK{}, datapath_deinit succeed!".format(oe_index, bank_local_index)) + for bank_local_index in range(OE_BANK_NUM): + bank_global_index = (oe_index*OE_BANK_NUM) + bank_local_index + ret, status = global_bank_dict[bank_global_index].tx_output_disabled() + if (not ret): + helper_logger.log_warn("OE{}-BANK{}, tx_output_disabled failed!".format(oe_index, bank_local_index)) + else: + helper_logger.log_info("OE{}-BANK{}, tx_output_disabled succeed!".format(oe_index, bank_local_index)) + return True, "" + except Exception as e: + return False, str(e) + finally: + oe_object.resume() + +def dict_key_replace(input_dict, old_key, new_key): + if isinstance(input_dict, dict): + input_dict_copy = copy.deepcopy(input_dict) + for key, value in input_dict.items(): + if isinstance(value, dict): + input_dict_copy[key] = dict_key_replace(input_dict_copy[key], old_key, new_key) + else: + if key == old_key: + input_dict_copy[new_key] = value + if old_key in input_dict.keys(): + input_dict_copy.pop(old_key) + return input_dict_copy + else: + return None + +def dict_special_key(special_keys, input_value): + if isinstance(input_value, dict): + ret = dict() + for name, value in input_value.items(): + if special_keys and (name not in special_keys.keys()): + continue + if special_keys: + ret[name] = dict_special_key(special_keys.get(name, None), value) + else: + ret[name] = dict_special_key(None, value) + else: + ret = input_value + return ret + +def show_interface_dom_info(args, port_mapping): + info = dict() + oe_index_list = set() + target_port_index_list = args["port_index_list"] + output_format = "" + if "output_format" in args: + output_format = args["output_format"] + for port_index in target_port_index_list: + oe_index_list.add(port_mapping.port_index_to_oe_index(port_index)) + for oe_index in oe_index_list: + lock = file_rw_lock(oe_index) + try: + for global_bank_index in port_mapping.oe_index_to_bank_index_list(oe_index): + bank_port_index_list = port_mapping.bank_index_to_port_index_list(global_bank_index) + port_list = [port_index for port_index in bank_port_index_list if port_index in target_port_index_list] + if len(port_list) == 0: + continue + local_bank_index = port_mapping.bank_global_index_to_local_index(global_bank_index) + cmis_map = cmis_memory_map(cmis_i2c_util, oe_index, local_bank_index) + state_dict = { + "dom info": { + 'temperature': None + }, + "lanes dom info": { + "TX Power": None, + "RX Power": None, + "Tx LOS": None, + "Rx LOS": None, + "Tx Fault": None, + "TX Bias": None, + } + } + ret_state = cmis_map.get_field(state_dict) + for port_index in port_list: + lane_list = port_mapping.get_port_lane_list(port_index) + lane_list = ["lane{:02d}".format(lane_index) for lane_index in lane_list] + state_dict = { + "dom info": { + 'temperature': None + }, + "lanes dom info": { + "RX Power": dict.fromkeys(lane_list), + "TX Bias": dict.fromkeys(lane_list), + "TX Power": dict.fromkeys(lane_list), + "Rx LOS": dict.fromkeys(lane_list), + "Tx Fault": dict.fromkeys(lane_list), + "Tx LOS": dict.fromkeys(lane_list), + } + } + port_ret_state = dict_special_key(state_dict, ret_state) + for lane_index in range(len(lane_list)): + port_ret_state = dict_key_replace(port_ret_state, lane_list[lane_index], "lane{}".format(lane_index)) + info["port%d"%port_index] = port_ret_state + except Exception as e: + helper_logger.log_warn("OE{} show_interface_dom_info warn: {}".format(oe_index, str(e))) + helper_logger.log_warn(traceback.format_exc()) + return False, str(e) + finally: + file_rw_unlock(lock) + if output_format == "json": + return True, json.dumps(info) + ret_info = io.StringIO() + for port_index in target_port_index_list: + ret_info.write(convert_to_table_output("port%d"%port_index, info["port%d"%port_index]).getvalue()) + return True, ret_info.getvalue() + +def show_oe_temperature(args, port_mapping): + info = dict() + oe_index_list = args.get("oe_index_list", None) + oe_index = args.get("oe_index", None) + if (oe_index_list == None) and (oe_index != None): + oe_index_list = [oe_index] + for oe_index in oe_index_list: + cmis_map = cmis_memory_map(cmis_util, oe_index) + state_dict = { + "dom info": { + 'temperature': None + } + } + ret_state = cmis_map.get_field(state_dict) + info["oe{}".format(oe_index)] = ret_state["dom info"]["temperature"] + return True, info + +def show_interface_speed(args, port_mapping): + info = dict() + port_index_list = args.get("port_index_list", None) + port_index = args.get("port_index", None) + if (port_index_list == None) and (port_index != None): + port_index_list = [port_index] + for port_index in port_index_list: + oe_index = port_mapping.port_index_to_oe_index(port_index) + bank_index = port_mapping.port_index_to_bank_index(port_index) + oe_daemon = global_oe_daemon_thread_dict[oe_index] + bank_speed = oe_daemon.bank_speed_dict.get(bank_index, "NAN") + info["port{}".format(port_index)] = bank_speed + return True, info + +def show_portmap(args, port_mapping): + info = list() + port_index_list = args.get("port_index_list", None) + port_index = args.get("port_index", None) + if (port_index_list == None) and (port_index != None): + port_index_list = [port_index] + head_line = "{:20s}{:20s}{:20s}{:20s}".format("PORT_INDEX", "OE_INDEX", "BANK_INDEX", "RLM_INDEX") + info.append(head_line) + for port_index in port_index_list: + oe_index = port_mapping.port_index_to_oe_index(port_index) + bank_index = port_mapping.port_index_to_bank_index(port_index) + bank_index = port_mapping.bank_global_index_to_local_index(bank_index) + rlm_index = port_mapping.port_index_to_rlm_index(port_index) + data_line = "{:20s}{:20s}{:20s}{:20s}".format("port%d"%port_index, "oe%d"%oe_index, "bank%d"%bank_index, "rlm%d"%rlm_index) + info.append(data_line) + info = "\n".join(info) + return True, info + +def show_tx_output(args, port_mapping): + info = dict() + oe_index_list = set() + lane_index_list = args.get("lane_index_list", None) + for port_index in args["port_index_list"]: + oe_index_list.add(port_mapping.port_index_to_oe_index(port_index)) + for oe_index in oe_index_list: + # lock oe + lock = file_rw_lock(oe_index) + try: + for port_index in args["port_index_list"]: + if oe_index != port_mapping.port_index_to_oe_index(port_index): + continue + bank_index = port_mapping.port_index_to_bank_index(port_index) + local_bank_index = port_mapping.bank_global_index_to_local_index(bank_index) + cmis_map = cmis_memory_map(cmis_i2c_util, oe_index, local_bank_index) + lane_list = port_mapping.get_port_lane_list(port_index) + lane_list = ["lane{:02d}".format(lane_index) for lane_index in lane_list] + field_state = cmis_map.get_field("Tx output disable") + ret_state = dict() + for lane_index in range(len(lane_list)): + if (lane_index_list != None) and (lane_index not in lane_index_list): + continue + value = field_state.pop(lane_list[lane_index]) + ret_state["lane{}".format(lane_index)] = value + info["port%d"%port_index] = ret_state + except Exception as e: + helper_logger.log_warn("OE{} show_interface_dom_info warn: {}".format(oe_index, str(e))) + helper_logger.log_warn(traceback.format_exc()) + return False, str(e) + finally: + file_rw_unlock(lock) + return True, info + +def set_tx_output(args, port_mapping): + result = True + info = dict() + turn_on = args.get("turn_on", False) + lane_index_list = args.get("lane_index_list", list(range(BANK_LANE_NUM))) + if lane_index_list == None: + lane_index_list = list(range(BANK_LANE_NUM)) + target_port_index_list = args["port_index_list"] + for bank_global_index, bank_control in global_bank_dict.items(): + bank_port_index_list = port_mapping.bank_index_to_port_index_list(bank_global_index) + port_list = [port_index for port_index in bank_port_index_list if port_index in target_port_index_list] + if len(port_list) == 0: + continue + for port_index in port_list: + info[port_index] = "failed" + oe_index = port_mapping.bank_index_to_oe_index(bank_global_index) + oe_object = global_oe_daemon_thread_dict[oe_index] + oe_object.suspend() + try: + lane_list = list() + for port_index in port_list: + port_lane_list = port_mapping.get_port_lane_list(port_index) + min_lane_index = min(port_lane_list) + for lane_index in port_lane_list: + if lane_index-min_lane_index not in lane_index_list: + continue + lane_list.append(lane_index) + lane_list = ["lane{:02d}".format(lane_index) for lane_index in lane_list] + if turn_on: + ret, msg = bank_control.tx_output_enabled(lane_list) + else: + ret, msg = bank_control.tx_output_disabled(lane_list) + if ret != True: + result = False + else: + for port_index in port_list: + info[port_index] = "succeed" + except Exception as e: + helper_logger.log_warn("OE{} set_tx_output warn: {}".format(oe_index, str(e))) + helper_logger.log_warn(traceback.format_exc()) + return False, info + finally: + oe_object.resume() + return result, "" + +def set_rlm_power_mode(args, port_mapping): + oe_index_list = set() + rlm_index_list = args["rlm_index_list"] + for rlm_global_index in rlm_index_list: + oe_index_list.add(port_mapping.rlm_index_to_oe_index(rlm_global_index)) + for oe_index in oe_index_list: + oe_object = global_oe_daemon_thread_dict[oe_index] + oe_object.suspend() + try: + for rlm_global_index in rlm_index_list: + if oe_index != port_mapping.rlm_index_to_oe_index(rlm_global_index): + continue + rlm_power_cfg_thread(rlm_global_index, args["power_mode"]) + except Exception as e: + helper_logger.log_warn(traceback.format_exc()) + return False, str(e) + finally: + oe_object.resume() + return True, "" + +def show_rlm_power_mode(args, port_mapping): + info = dict() + rlm_index_list = args["rlm_index_list"] + for rlm_global_index in rlm_index_list: + rlm_local_index = port_mapping.rlm_global_index_to_local_index(rlm_global_index) + oe_index = port_mapping.rlm_index_to_oe_index(rlm_global_index) + cmis_map = cmis_memory_map(cmis_i2c_util, oe_index) + field_state = cmis_map.get_field('Laser power mode control {}'.format(rlm_local_index)) + info["rlm{}".format(rlm_global_index)] = field_state + return True, info + +def oe_reset(args, port_mapping): + oe_index_list = args.get("oe_index_list", None) + oe_index = args.get("oe_index", None) + if (oe_index_list == None) and (oe_index != None): + oe_index_list = [oe_index] + for oe_index in oe_index_list: + # suspend oe_daemon + oe_object = global_oe_daemon_thread_dict[oe_index] + oe_object.suspend() # should not raise exception, else oe_deamon suspended before will be locked. + try: + for oe_index in oe_index_list: + oe_object = global_oe_daemon_thread_dict[oe_index] + oe_object.reset() # software reset + flag = args.get("hardware_reset", False) + if flag == False: + return True, "" + # exec hardware reset + byte = 0xff + oe_list = [oe_index - CPO_PLATFORM_CONFIG.get("oe_index_start_index") for oe_index in oe_index_list] + for oe_index in oe_list: + byte = byte & ~(0x01 << oe_index) + from cpoutil import os_command_i2cset_oe_reset_byte + result = os_command_i2cset_oe_reset_byte(byte) + if result != 0: + return False, "" + time.sleep(0.5) + result = os_command_i2cset_oe_reset_byte("0xff") + time.sleep(5) + if result != 0: + return False, "" + return True, "" + except Exception as e: + helper_logger.log_warn(traceback.format_exc()) + return False, str(e) + finally: + for oe_index in oe_index_list: + # resume oe_daemon + oe_object = global_oe_daemon_thread_dict[oe_index] + oe_object.resume() + +cli_process_map = { + "show_status": show_status, + "enter_mission_mode": enter_mission_mode, + "exit_mission_mode": exit_mission_mode, + "show_interface_dom_info": show_interface_dom_info, + "show_oe_temperature": show_oe_temperature, + "show_interface_speed": show_interface_speed, + "show_portmap": show_portmap, + "show_tx_output": show_tx_output, + "set_tx_output": set_tx_output, + "set_rlm_power_mode": set_rlm_power_mode, + "show_rlm_power_mode": show_rlm_power_mode, + "oe_reset": oe_reset +} + +def bank_speed_change_thread(task_profile, bank_index, speed, lane_list = None): + retval, info = global_bank_dict[bank_index].apsel_speed_check(speed=speed, lane_list=lane_list) + if retval == True: + global_async_ret[task_profile] = (True, speed) + return + retval, info = global_bank_dict[bank_index].apply_datapath_init_clear(lane_list=lane_list) + if retval == False: + global_async_ret[task_profile] = (False, speed) + return + retval, info = global_bank_dict[bank_index].populate_staged_set(speed=speed, lane_list=lane_list) + if retval == False: + global_async_ret[task_profile] = (False, speed) + return + retval, info = global_bank_dict[bank_index].apply_datapath_init(lane_list=lane_list, timeout=20) + if retval == False: + global_async_ret[task_profile] = (False, speed) + return + # time.sleep(20) + retval, info = global_bank_dict[bank_index].apsel_speed_check(speed=speed, lane_list=lane_list) + if retval == True: + global_async_ret[task_profile] = (True, speed) + else: + global_async_ret[task_profile] = (False, speed) + +def rlm_power_cfg_thread(rlm_index, power_mode): + if power_mode == "full-power": + ret, status = global_rlm_dict[rlm_index].enter_full_power_mode() + if (not ret): + helper_logger.log_warn("RLM{}, enter_full_power_mode failed!".format(rlm_index)) + else: + helper_logger.log_info("RLM{}, enter_full_power_mode succeed!".format(rlm_index)) + elif power_mode == "half-power": + ret, status = global_rlm_dict[rlm_index].enter_half_power_mode() + if (not ret): + helper_logger.log_warn("RLM{}, enter_half_power_mode failed!".format(rlm_index)) + else: + helper_logger.log_info("RLM{}, enter_half_power_mode succeed!".format(rlm_index)) + else: + helper_logger.log_warn("RLM{}, set power mode failed, unknow power mode {}".format(rlm_index, power_mode)) + +class cpo_state_monitor_base(): + def __init__(self, index, stop_event) -> None: + self.index = index + self.stop_event = stop_event + self.__active_state = None + self.state_control_filed = list() + self.state_indicator_field = list() + @property + def name(self): + raise NotImplementedError + @property + def active_state(self): + return self.__active_state + @active_state.setter + def active_state(self, active_state): + if not isinstance(self.__active_state, dict): + if self.__active_state == active_state: + return + helper_logger.log_debug("{}, {} --->>> {}".format(self.name, self.__active_state, active_state)) + self.__active_state = active_state + + for new_state_key, new_state_value in active_state.items(): + active_state_value = self.__active_state.get(new_state_key, None) + if active_state_value == new_state_value: + continue + if new_state_key in self.state_control_filed: + flag = "control" + else: + flag = "indicator" + if not isinstance(new_state_value, dict): + helper_logger.log_debug("{}({}), {}: {} --->>> {}".format(self.name, flag, new_state_key, active_state_value, new_state_value)) + self.__active_state[new_state_key] = new_state_value + continue + if active_state_value == None: + self.__active_state[new_state_key] = dict() + for sub_state_key, sub_state_value in new_state_value.items(): + sub_active_value = self.__active_state[new_state_key].get(sub_state_key, None) + if sub_active_value == sub_state_value: + continue + helper_logger.log_debug("{}({}), {}, {}: {} --->>> {}".format(self.name, flag, new_state_key, sub_state_key, sub_active_value, sub_state_value)) + self.__active_state[new_state_key][sub_state_key] = sub_state_value + + def active_state_init(self): + state_field_keys = self.state_control_filed + self.state_indicator_field + self.active_state = dict.fromkeys(state_field_keys) + status, output = self.active_state_refresh() + while (status == False) and (not self.stop_event.wait(0.01)): + helper_logger.log_warn("active_state_refresh, status: {}, output: {}".format(status, output)) + status, output = self.active_state_refresh() + time.sleep(0.1) + + def active_state_refresh(self): + new_active_state = dict() + for state_key, state_value in self.active_state.items(): + new_state_value = self.cmis_map.get_field(state_key) + if new_state_value != state_value: + new_active_state[state_key] = new_state_value + if new_active_state: + tmp = copy.deepcopy(self.active_state) + tmp.update(new_active_state) + self.active_state = tmp + return True, self.active_state + + def wait_for_state(self, target_state, timeout, time_internal): + try: + count = 0 + while (count <= timeout) and (not self.stop_event.wait(0.01)): + self.active_state_refresh() + if is_state_complete(target_state, self.active_state): + return True + if time_internal == 0: + return False + else: + time.sleep(time_internal) + count += time_internal + return False + except Exception as e: + return False + finally: + pass + +class cmis_memory_map(cmis_memory_map_base): + def __init__(self, cmis_util, oe_index, bank_index=0) -> None: + super().__init__() + self.oe_index = oe_index + self.bank_index = bank_index + self.retry_times = 20 + self.cmis_util = cmis_util + + def read(self, page, addr, rd_len=1): + retry_count = 0 + status, output = self.cmis_util.cmis_read(self.oe_index, self.bank_index, page, addr, rd_len, lock=True) + if status == True: + helper_logger.log_trace("cmis_read, status: {}, page: {}, bank: {}, addr: {}, output: {}".format( + status, page, self.bank_index, addr, [hex(data) for data in output])) + while (status == False) and (retry_count < self.retry_times): + helper_logger.log_trace("cmis_read, status: {}, page: {}, bank: {}, addr: {}, output: {}".format( + status, page, self.bank_index, addr, output)) + retry_count += 1 + status, output = self.cmis_util.cmis_read(self.oe_index, self.bank_index, page, addr, rd_len, lock=True) + time.sleep(0.05) + if status == True: + helper_logger.log_trace("cmis_read, status: {}, page: {}, bank: {}, addr: {}, output: {}".format( + status, page, self.bank_index, addr, [hex(data) for data in output])) + return status, output + + def write(self, page, addr, data): + retry_count = 0 + status, output = self.cmis_util.cmis_write(self.oe_index, self.bank_index, page, addr, data, lock=True) + helper_logger.log_trace("cmis_write, status: {}, page: {}, bank: {}, addr: {}, input: {}".format( + status, page, self.bank_index, addr, [hex(item) for item in data])) + while (status == False) and (retry_count < self.retry_times): + helper_logger.log_trace("cmis_write, status: {}, page: {}, bank: {}, addr: {}, input: {}".format( + status, page, self.bank_index, addr, [hex(item) for item in data])) + retry_count += 1 + status, output = self.cmis_util.cmis_write(self.oe_index, self.bank_index, page, addr, data, lock=True) + time.sleep(0.05) + return status, output + + def set_field(self, field_name, field_value): + helper_logger.log_debug("OE{}-BANK{} field set: {}".format(self.oe_index, self.bank_index, {field_name: field_value})) + super().set_field(field_name, field_value) + +class rlm_state_monitor(cpo_state_monitor_base): + def __init__(self, index, oe_index, stop_event) -> None: + super().__init__(index, stop_event) + self.cmis_map = cmis_memory_map(cmis_util, oe_index, bank_index=0) + self.oe_index = oe_index + self.rlm_index = index + self.laser_list = ['Laser{:02d}'.format(laser_index) for laser_index in range(8)] + self.state_control_filed = ['Laser power mode control {}'.format(self.rlm_index)] + + @property + def name(self): + return "OE%d-RLM%d" % (self.oe_index, self.rlm_index) + + def enter_full_power_mode(self, timeout=2): + field_key = 'Laser power mode control {}'.format(self.rlm_index) + field_value_dict = dict() + for laser_index in self.laser_list: + field_value_dict[laser_index] = "full-power" + self.cmis_map.set_field(field_key, field_value_dict) + target_state = { + field_key : field_value_dict + } + time.sleep(20) + return self.wait_for_state(target_state, timeout=timeout, time_internal=0.1), None + + def enter_half_power_mode(self, timeout=2): + field_key = 'Laser power mode control {}'.format(self.rlm_index) + field_value_dict = dict() + for laser_index in self.laser_list: + field_value_dict[laser_index] = "half-power" + self.cmis_map.set_field(field_key, field_value_dict) + target_state = { + field_key : field_value_dict + } + return self.wait_for_state(target_state, timeout=timeout, time_internal=0.1), None + +class datapath_state_monitor(cpo_state_monitor_base): + def __init__(self, index, oe_index, stop_event) -> None: + super().__init__(index, stop_event) + self.cmis_map = cmis_memory_map(cmis_util, oe_index, bank_index=index) + self.oe_index = oe_index + self.bank_index = index + self.lane_list = ['lane0%d'%lane_index for lane_index in range(8)] + self.state_control_filed = ['Tx output disable', 'Data Path Initialization Control', 'Application Select Controls', 'Apply DataPathInit Controls'] + self.state_indicator_field = ['Data Path State Indicator', 'Active Application Control Set'] + + @property + def name(self): + return "OE%d-BANK%d" % (self.oe_index, self.index) + + def tx_output_enabled(self, lane_list=None, timeout=2): + target_state = { + 'Data Path State Indicator': dict() + } + if lane_list == None: + lane_list = copy.deepcopy(self.lane_list) + for lane in lane_list: + target_state["Data Path State Indicator"][lane] = ['DataPathTxTurnOn', 'DataPathActivated', 'DataPathDeactivated'] + field_value_dict = dict() + for lane in lane_list: + field_value_dict[lane] = "Tx output enable" + self.cmis_map.set_field('Tx output disable', field_value_dict) + return self.wait_for_state(target_state, timeout=timeout, time_internal=0.1), None + + def tx_output_disabled(self, lane_list=None, timeout=2): + target_state = { + 'Data Path State Indicator': dict() + } + if lane_list == None: + lane_list = copy.deepcopy(self.lane_list) + for lane in lane_list: + target_state["Data Path State Indicator"][lane] = ['DataPathTxTurnOff', 'DataPathDeactivated', 'DataPathInitialized'] + field_value_dict = dict() + for lane in lane_list: + field_value_dict[lane] = "Tx output disabled" + self.cmis_map.set_field('Tx output disable', field_value_dict) + return self.wait_for_state(target_state, timeout=timeout, time_internal=0.1), None + + def datapath_init(self, lane_list=None, timeout=20): + control_field_key = 'Data Path Initialization Control' + indicator_target_state = { + 'Data Path State Indicator': dict() + } + if lane_list == None: + lane_list = copy.deepcopy(self.lane_list) + for lane in lane_list: + indicator_target_state["Data Path State Indicator"][lane] = ['DataPathInitialized', 'DataPathActivated', 'DataPathDeactivated'] # fixme: DataPathDeactivated + control_field_value = dict() + for lane in lane_list: + control_field_value[lane] = "Initialize" + self.cmis_map.set_field(control_field_key, control_field_value) + indicator_target_state[control_field_key] = control_field_value + return self.wait_for_state(indicator_target_state, timeout=timeout, time_internal=0.1), None + + def datapath_deinit(self, lane_list=None, timeout=20): + target_state = { + 'Data Path State Indicator': dict() + } + if lane_list == None: + lane_list = copy.deepcopy(self.lane_list) + for lane in lane_list: + target_state["Data Path State Indicator"][lane] = ['DataPathDeinit', 'DataPathDeactivated'] + field_value_dict = dict() + for lane in lane_list: + field_value_dict[lane] = "De-initializ" + self.cmis_map.set_field('Data Path Initialization Control', field_value_dict) + return self.wait_for_state(target_state, timeout=timeout, time_internal=0.1), None + + def apply_datapath_init(self, lane_list=None, timeout=3): + field_value_dict = dict() + if lane_list == None: + lane_list = copy.deepcopy(self.lane_list) + for lane in lane_list: + field_value_dict[lane] = 'Apply' + self.cmis_map.set_field('Apply DataPathInit Controls', field_value_dict) + target_state = { + 'Apply DataPathInit Controls': dict() + } + for lane in lane_list: + target_state["Apply DataPathInit Controls"][lane] = "Not Apply" + # time.sleep(20) + return self.wait_for_state(target_state, timeout=timeout, time_internal=0.1), None + + def apply_datapath_init_clear(self, lane_list=None, timeout=1): + field_value_dict = dict() + if lane_list == None: + lane_list = copy.deepcopy(self.lane_list) + for lane in lane_list: + field_value_dict[lane] = 'Not Apply' + self.cmis_map.set_field('Apply DataPathInit Controls', field_value_dict) + return self.wait_for_state({'Apply DataPathInit Controls':field_value_dict}, timeout=timeout, time_internal=0.1), None + + def populate_staged_set(self, speed, lane_list=None, timeout=3): + # apply apsel code + target_state = dict() + field_value_dict = dict() + if lane_list == None: + lane_list = copy.deepcopy(self.lane_list) + for lane in lane_list: + field_value_dict[lane] = speed + self.cmis_map.set_field('Application Select Controls', field_value_dict) + target_state['Application Select Controls'] = field_value_dict + return self.wait_for_state(target_state, timeout=timeout, time_internal=0.1), None + + def apsel_speed_check(self, speed, lane_list=None, timeout=1): + if lane_list == None: + lane_list = copy.deepcopy(self.lane_list) + target_state = { + 'Active Application Control Set': dict() + } + for lane in lane_list: + target_state["Active Application Control Set"][lane] = speed + return self.wait_for_state(target_state, timeout=timeout, time_internal=0.1), None + +class module_state_monitor(cpo_state_monitor_base): + def __init__(self, index, stop_event) -> None: + super().__init__(index, stop_event) + self.cmis_map = cmis_memory_map(cmis_util, index) + self.state_control_filed = ['Module Global Controls'] + self.state_indicator_field = ['Module State'] + + @property + def name(self): + return "OE%d" % (self.index) + + def module_reset(self, timeout=20): + target_state = { + 'Module State': 'ModuleLowPwr' + } + self.cmis_map.set_field('Module Global Controls', {'Software reset': 'Software reset'}) + time.sleep(5) + return self.wait_for_state(target_state, timeout=timeout, time_internal=1), None + + def module_exit_lpmode(self, timeout=20): + target_state = { + 'Module State': 'ModuleReady' + } + self.cmis_map.set_field('Module Global Controls', {'LowPwrRequestSW': 'No request'}) + time.sleep(3) + return self.wait_for_state(target_state, timeout=timeout, time_internal=0.1), None + + def module_enter_lpmode(self, timeout=20): + target_state = { + 'Module State': 'ModuleLowPwr' + } + self.cmis_map.set_field('Module Global Controls', {'LowPwrRequestSW': 'Request'}) + return self.wait_for_state(target_state, timeout=timeout, time_internal=0.1), None + +class oe_daemon(threading.Thread): + def __init__(self, oe_index, port_mapping, main_thread_stop_event): + threading.Thread.__init__(self) + self.name = "OE%d_Thread" % oe_index + self.exc = None + self.task_stopping_event = threading.Event() + self.main_thread_stop_event = main_thread_stop_event + self.index = oe_index + self.port_mapping = port_mapping + self.mission_mode = False + self.standby = False + self.suspended = False + self.__manully_disabled = False + self.__manully_enabled = False + self.bank_speed_dict = dict() + self.port_speed_dict = dict() + self.task_thread_dict = dict() + self.lock = threading.RLock() + + @property + def manully_disabled(self): + return self.__manully_disabled + + @property + def manully_enabled(self): + return self.__manully_enabled + + @manully_disabled.setter + def manully_disabled(self, manully_disabled): + if manully_disabled == True: + self.__manully_enabled == False + self.__manully_disabled = manully_disabled + + @manully_enabled.setter + def manully_enabled(self, manully_enabled): + if manully_enabled == True: + self.__manully_disabled == False + self.__manully_enabled = manully_enabled + + def join(self): + self.task_stopping_event.set() + threading.Thread.join(self) + if self.exc: + raise self.exc + + def run(self): + self.thread_id = threading.current_thread().ident + if self.task_stopping_event.is_set(): + return + try: + self.task_worker() + except Exception as e: + helper_logger.log_error("Exception occured at {} thread due to {}".format(threading.current_thread().getName(), repr(e))) + exc_type, exc_value, exc_traceback = sys.exc_info() + msg = traceback.format_exception(exc_type, exc_value, exc_traceback) + for tb_line in msg: + for tb_line_split in tb_line.splitlines(): + helper_logger.log_error(tb_line_split) + self.exc = e + self.main_thread_stop_event.set() + + def state_machine_init(self): + self.state_machine_list = list() + oe_monitor = module_state_monitor(self.index, self.task_stopping_event) + global_oe_dict[self.index] = oe_monitor + self.state_machine_list.append(oe_monitor) + for local_bank_index in range(OE_BANK_NUM): + global_bank_index = (self.index * OE_BANK_NUM) + local_bank_index + datapath_monitor = datapath_state_monitor(index=local_bank_index, oe_index=self.index, stop_event=self.task_stopping_event) + global_bank_dict[global_bank_index] = datapath_monitor + self.state_machine_list.append(datapath_monitor) + for local_rlm_index in range(OE_RLM_NUM): + global_rlm_index = (self.index *OE_RLM_NUM) + local_rlm_index + rlm_monitor = rlm_state_monitor(index=local_rlm_index, oe_index=self.index, stop_event=self.task_stopping_event) + global_rlm_dict[global_rlm_index] = rlm_monitor + self.state_machine_list.append(rlm_monitor) + for state_machine in self.state_machine_list: + state_machine.active_state_init() + + def bank_port_en(self, bank_index, is_enable): + port_index_list = self.port_mapping.bank_index_to_port_index_list(bank_index) + for port_index in port_index_list: + port_admin = self.port_mapping.get_port_admin(port_index) + if not port_admin: + helper_logger.log_info("OE{}-BANK{}, port {} not enable skip sdk enable".format(self.index, bank_index, port_index)) + continue + sdk_index = self.port_mapping.port_index_to_sdk_index(port_index) + command = f"port {sdk_index} en={is_enable}" + executable_path = "/usr/bin/bcmcmd" + result = subprocess.run([executable_path, command], + text=True, + capture_output=True) + if result.stderr: + helper_logger.log_info("Standard Error:{}".format(result.stderr)) + + def bank_speed_apply(self, bank_index, speed): + task_profile = "bank{}-speed-change".format(bank_index) + bank_local_index = self.port_mapping.bank_global_index_to_local_index(bank_index) + pre_task = self.task_thread_dict.get(task_profile, None) + pre_task_ret = global_async_ret.get(task_profile, None) + if pre_task != None: + if pre_task_ret == None: + return + retval, info = pre_task_ret + if retval == True: + self.bank_speed_dict[bank_index] = info + helper_logger.log_info("OE{}-BANK{}, apsel_speed_change to {} succeed!".format(self.index, bank_local_index, info)) + else: + helper_logger.log_warn("OE{}-BANK{}, apsel_speed_change to {} failed!".format(self.index, bank_local_index, info)) + pre_task.join() + self.task_thread_dict.pop(task_profile) + global_async_ret.pop(task_profile) + # port workaround + time.sleep(0.5) + self.bank_port_en(bank_index, 0) + time.sleep(0.1) + self.bank_port_en(bank_index, 1) + else: + if (self.bank_speed_dict.get(bank_index, None) == speed): + return + helper_logger.log_info("OE{}-BANK{}, apply speed {}".format(self.index, bank_local_index, speed)) + thread = threading.Thread(target=bank_speed_change_thread, args=(task_profile, bank_index, speed), daemon=True) + thread.start() + self.task_thread_dict[task_profile] = thread + thread.join(timeout=1) + + def reset(self): + self.lock.acquire() + self.bank_speed_dict = dict() + self.mission_mode = False + self.standby = False + self.manully_disabled = False + self.manully_enabled = False + self.lock.release() + + def suspend(self): + self.lock.acquire() + + def resume(self): + self.lock.release() + + def task_worker(self): + helper_logger.log_info("Start {} loop".format(self.name)) + self.state_machine_init() + while not self.main_thread_stop_event.wait(CPO_STATUS_CHECK_PERIOD_SECS): + self.lock.acquire() + port_index_list = self.port_mapping.oe_index_to_port_index_list(self.index) + port_admin_list = [self.port_mapping.get_port_admin(port_index) for port_index in port_index_list] + if any(port_admin_list) and (self.mission_mode == False) and (not self.manully_disabled): + if self.standby: + enter_mission_mode_without_reset({"oe_index": self.index, "manully": False}, self.port_mapping) + else: + enter_mission_mode({"oe_index": self.index, "manully": False}, self.port_mapping) + self.standby = True + self.mission_mode = True + if (not any(port_admin_list)) and (self.mission_mode == True) and (not self.manully_enabled): + exit_mission_mode({"oe_index": self.index, "manully": False}, self.port_mapping) + self.mission_mode = False + if (self.mission_mode): + bank_index_list = self.port_mapping.oe_index_to_bank_index_list(self.index) + for bank_index in bank_index_list: + port_index_list = self.port_mapping.bank_index_to_port_index_list(bank_index) + ports_speed_set = set() + for port_index in port_index_list: + ports_speed_set.add(self.port_mapping.get_port_speed(port_index)) + if len(ports_speed_set) != 1: + continue + self.bank_speed_apply(bank_index, ports_speed_set.pop()) + self.lock.release() + helper_logger.log_info("Stop {} loop".format(self.name)) + +def cli_cmd_process(sock, cmd, port_mapping:Port_Mapping): + try: + helper_logger.log_debug(cmd) + process = cli_process_map.get(cmd.get("cmd", None), None) + if process == None: + return False + retval, info = process(cmd, port_mapping) + helper_logger.log_debug("{}, finished!".format(cmd)) + sock.sendall(bytes("{}".format(json.dumps({"retval": retval, "info": info}, indent=4)), encoding="utf-8")) + except Exception as e: + helper_logger.log_warn(traceback.format_exc()) + finally: + sock.close() + +class cli_server(threading.Thread): + def __init__(self, port_mapping, main_thread_stop_event): + threading.Thread.__init__(self) + self.name = "CLI_SERVER" + self.exc = None + self.task_stopping_event = threading.Event() + self.main_thread_stop_event = main_thread_stop_event + self.server_socket = None + self.port_mapping = port_mapping + + def init(self): + self.server_socket = socket.socket(socket.AF_UNIX, socket.SOCK_STREAM) + sock_file = "/tmp/cpo_socket" + if os.path.exists(sock_file): + os.remove(sock_file) + self.server_socket.bind(sock_file) + self.server_socket.listen(5) + self.server_socket.setblocking(False) + self.connected_clients = [] + + def join(self): + if not self.server_socket: + self.server_socket.close() + self.server_socket = None + self.task_stopping_event.set() + threading.Thread.join(self) + if self.exc: + raise self.exc + + def run(self): + self.thread_id = threading.current_thread().ident + if self.task_stopping_event.is_set(): + return + try: + self.task_worker() + except Exception as e: + helper_logger.log_error("Exception occured at {} thread due to {}".format(threading.current_thread().getName(), repr(e))) + exc_type, exc_value, exc_traceback = sys.exc_info() + msg = traceback.format_exception(exc_type, exc_value, exc_traceback) + for tb_line in msg: + for tb_line_split in tb_line.splitlines(): + helper_logger.log_error(tb_line_split) + self.exc = e + self.main_thread_stop_event.set() + finally: + if not self.server_socket: + self.server_socket.close() + self.server_socket = None + + def message_process(self, sock, data): + try: + import ast + cmd = ast.literal_eval(data) + thread = threading.Thread(target=cli_cmd_process, args=(sock, cmd, self.port_mapping), daemon=True) + thread.start() + except Exception as e: + print("Error occurred: {}".format(e)) + result = {"status": False, "message": "invalid cmd: {}".format(data)} + sock.sendall(bytes(str(result), encoding="utf-8")) + sock.close() + + def task_worker(self): + self.init() + helper_logger.log_info("Start {} loop".format(self.name)) + while not self.main_thread_stop_event.wait(0.01): + readable_sockets, _, _ = select.select([self.server_socket] + self.connected_clients, [], [], 1) + for sock in readable_sockets: + if sock is self.server_socket: + client_socket, client_address = self.server_socket.accept() + self.connected_clients.append(client_socket) + continue + try: + data = sock.recv(1024) + if data: + self.message_process(sock, data.decode()) + else: + sock.close() + except Exception as e: + print(f"Error occurred while receiving data from {sock.getpeername()}: {e}") + sock.close() + finally: + self.connected_clients.remove(sock) + helper_logger.log_info("Stop {} loop".format(self.name)) + +class database_monitor(threading.Thread): + def __init__(self, port_mapping:Port_Mapping, main_thread_stop_event): + threading.Thread.__init__(self) + self.name = "DATABASE_MONITOR" + self.exc = None + self.task_stopping_event = threading.Event() + self.main_thread_stop_event = main_thread_stop_event + self.port_mapping = port_mapping + self.port_config_done = False + + def join(self): + self.task_stopping_event.set() + threading.Thread.join(self) + if self.exc: + raise self.exc + + def run(self): + self.thread_id = threading.current_thread().ident + if self.task_stopping_event.is_set(): + return + try: + self.task_worker() + except Exception as e: + helper_logger.log_error("Exception occured at {} thread due to {}".format(threading.current_thread().getName(), repr(e))) + exc_type, exc_value, exc_traceback = sys.exc_info() + msg = traceback.format_exception(exc_type, exc_value, exc_traceback) + for tb_line in msg: + for tb_line_split in tb_line.splitlines(): + helper_logger.log_error(tb_line_split) + self.exc = e + self.main_thread_stop_event.set() + + def task_worker(self): + appl_db = daemon_base.db_connect("APPL_DB", namespace="") + sel = swsscommon.Select() + port_tbl = swsscommon.SubscriberStateTable(appl_db, swsscommon.APP_PORT_TABLE_NAME) + pro_port_tbl = swsscommon.ProducerStateTable(appl_db, swsscommon.APP_PORT_TABLE_NAME) + sel.addSelectable(port_tbl) + if port_config_init: + config_db = daemon_base.db_connect("CONFIG_DB", namespace="") + device_metadata_tbl = swsscommon.SubscriberStateTable(config_db, swsscommon.CFG_DEVICE_METADATA_TABLE_NAME) + sel.addSelectable(device_metadata_tbl) + # Make sure this daemon started after all port configured + helper_logger.log_info("Start {} loop".format(self.name)) + while not self.main_thread_stop_event.wait(DATABASE_CHECK_PRTIOD_SECS): + (state, c) = sel.select(SELECT_TIMEOUT_MSECS) + if state == swsscommon.Select.TIMEOUT: + helper_logger.log_trace("select timeout") + continue + if state != swsscommon.Select.OBJECT: + helper_logger.log_info("sel.select() did not return swsscommon.Select.OBJECT") + continue + if port_config_init: + (key, op, fvp) = device_metadata_tbl.pop() + self.device_tbl_subscribe_callback(key=key, op=op, fvp=fvp) + else: + (key, op, fvp) = port_tbl.pop() + self.port_tbl_subscribe_callback(key=key, op=op, fvp=fvp, port_tbl=pro_port_tbl) + helper_logger.log_info("Stop {} loop".format(self.name)) + + def device_tbl_subscribe_callback(self, key, op, fvp): + helper_logger.log_trace("key: {}, op: {}, fvp: {}".format(key, op, fvp)) + platform_path = None + hwsku = None + for item in fvp: + if item[0] == "platform": + platform_path = item[1] + if item[0] == "hwsku": + hwsku = item[1] + self.port_mapping.port_config_init(hwsku) + self.port_config_done = True + + def port_tbl_subscribe_callback(self, key, op, fvp, port_tbl): + if key in ["PortConfigDone", "PortInitDone"]: + self.port_config_done = True + return + helper_logger.log_trace("key: {}, op: {}, fvp: {}".format(key, op, fvp)) + port_index = None + port_speed = None + admin_status = None + lane = None + for item in fvp: + if item[0] == "index": + port_index = int(item[1]) + if item[0] == "speed": + port_speed = int(item[1]) + if item[0] == "admin_status": + admin_status = item[1] + if item[0] == "lanes": + lane = len(item[1].split(',')) + if self.port_mapping.set_port(port_index, key, port_speed, lane, admin_status): + self.notify_media_setting(key, port_tbl) + + def get_media_settings_value(self, physical_port): + GLOBAL_MEDIA_SETTINGS_KEY = 'GLOBAL_MEDIA_SETTINGS' + PORT_MEDIA_SETTINGS_KEY = 'PORT_MEDIA_SETTINGS' + DEFAULT_KEY = 'Default' + RANGE_SEPARATOR = '-' + COMMA_SEPARATOR = ',' + media_dict = {} + default_dict = {} + # Keys under global media settings can be a list or range or list of ranges + # of physical port numbers. Below are some examples + # 1-32 + # 1,2,3,4,5 + # 1-4,9-12 + media_key = self.port_mapping.get_physical_port_media_key(physical_port) + if GLOBAL_MEDIA_SETTINGS_KEY in CPO_PLATFORM_MEDIA_SETTINGS: + for keys in CPO_PLATFORM_MEDIA_SETTINGS[GLOBAL_MEDIA_SETTINGS_KEY]: + if COMMA_SEPARATOR in keys: + port_list = keys.split(COMMA_SEPARATOR) + for port in port_list: + if (RANGE_SEPARATOR in port) and (check_port_in_range(port, physical_port)): + media_dict = CPO_PLATFORM_MEDIA_SETTINGS[GLOBAL_MEDIA_SETTINGS_KEY][keys] + break + elif str(physical_port) == port: + media_dict = CPO_PLATFORM_MEDIA_SETTINGS[GLOBAL_MEDIA_SETTINGS_KEY][keys] + break + elif RANGE_SEPARATOR in keys: + if check_port_in_range(keys, physical_port): + media_dict = CPO_PLATFORM_MEDIA_SETTINGS[GLOBAL_MEDIA_SETTINGS_KEY][keys] + # If there is a match in the global profile for a media type, + # fetch those values + if media_key in media_dict: + return media_dict[media_key] + elif DEFAULT_KEY in media_dict: + default_dict = media_dict[DEFAULT_KEY] + media_dict = {} + if PORT_MEDIA_SETTINGS_KEY in CPO_PLATFORM_MEDIA_SETTINGS: + for keys in CPO_PLATFORM_MEDIA_SETTINGS[PORT_MEDIA_SETTINGS_KEY]: + if int(keys) == physical_port: + media_dict = CPO_PLATFORM_MEDIA_SETTINGS[PORT_MEDIA_SETTINGS_KEY][keys] + break + if len(media_dict) == 0: + if len(default_dict) != 0: + return default_dict + else: + helper_logger.log_warn("Error: No values for physical port '{}'".format(physical_port)) + return {} + if media_key in media_dict: + return media_dict[media_key] + elif DEFAULT_KEY in media_dict: + default_dict = media_dict[DEFAULT_KEY] + elif len(default_dict) != 0: + return default_dict + else: + if len(default_dict) != 0: + return default_dict + return {} + + def notify_media_setting(self, logical_port_name, app_port_tbl): + if not CPO_PLATFORM_MEDIA_SETTINGS: + return + physical_port = self.port_mapping.get_logical_to_physical(logical_port_name) + logical_port_list = self.port_mapping.get_physical_to_logical(physical_port) + num_logical_ports = len(logical_port_list) + logical_idx = logical_port_list.index(logical_port_name) + port_name = logical_port_name + media_dict = self.get_media_settings_value(physical_port) + if len(media_dict) == 0: + helper_logger.log_warn("Error in obtaining media setting for {}".format(logical_port_name)) + return + fvs = swsscommon.FieldValuePairs(len(media_dict)) + index = 0 + for media_key in media_dict: + if type(media_dict[media_key]) is dict: + media_val_str = get_media_val_str(num_logical_ports, media_dict[media_key], logical_idx) + else: + media_val_str = media_dict[media_key] + fvs[index] = (str(media_key), str(media_val_str)) + index += 1 + app_port_tbl.set(port_name, fvs) + + def wait_for_port_config_done(self): + # Make sure this daemon started after all port configured + while not self.main_thread_stop_event.wait(DATABASE_CHECK_PRTIOD_SECS): + if self.port_config_done: + return + +def main(): + global stop_event + global cmis_util + global cmis_i2c_util + cmis_util = oe_cmis_sysfs_rw() + cmis_i2c_util = oe_cmis_i2c_rw() + stop_event = threading.Event() + signal.signal(signal.SIGINT, signal_handler) + port_mapping = Port_Mapping() + database_monitor_thread = database_monitor(port_mapping=port_mapping, main_thread_stop_event=stop_event) + database_monitor_thread.start() + database_monitor_thread.wait_for_port_config_done() + # oe_daemon_thread_dict = dict() + for oe_index in range(OE_NUM): + global_oe_daemon_thread_dict[oe_index] = oe_daemon(oe_index=oe_index, port_mapping=port_mapping, main_thread_stop_event=stop_event) + cli_server_thread = cli_server(port_mapping = port_mapping, main_thread_stop_event=stop_event) + for oe_index, oe_daemon_thread in global_oe_daemon_thread_dict.items(): + oe_daemon_thread.start() + cli_server_thread.start() + stop_event.wait() + database_monitor_thread.join() + cli_server_thread.join() + for oe_index, oe_daemon_thread in global_oe_daemon_thread_dict.items(): + oe_daemon_thread.join() + sys.exit() + +if __name__=="__main__": + args = sys.argv[1:] + global port_config_init + port_config_init = False + if len(args) > 0: + helper_logger.log_info("input params: {}".format(args)) + if args[0] == "factest": + port_config_init = True + else: + helper_logger.log_info("no input params for process") + + main() diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/cpo/script/cpoutil b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/cpo/script/cpoutil new file mode 100755 index 00000000000..43eb1047202 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/cpo/script/cpoutil @@ -0,0 +1,591 @@ +#!/usr/bin/python3 + +import os +import sys +import logging +import click +import threading +import sonic_platform +from sonic_py_common import device_info, logger, multi_asic +import sonic_platform_base.sonic_sfp.sfputilhelper +import utilities_common.cli as clicommon +from cpo_platform_config import OE_INDEX_LIST, RLM_INDEX_LIST, PORT_INDEX_LIST +import socket +import json + +EXIT_FAIL = -1 +EXIT_SUCCESS = 0 +ERROR_PERMISSIONS = 1 +ERROR_CHASSIS_LOAD = 2 +ERROR_SFPUTILHELPER_LOAD = 3 +ERROR_PORT_CONFIG_LOAD = 4 +ERROR_NOT_IMPLEMENTED = 5 +ERROR_INVALID_PORT = 6 +ERROR_CPOUTIL_LOAD = 7 + +# Global platform-specific Chassis class instance +platform_chassis = None + +# Global platform-specific sfputil class instance +platform_sfputil = None + +# Global platform-specific cpoutil class instance +cpo_util = None + +if __name__ == "__main__": + logger = logging.getLogger() + logger.setLevel(logging.DEBUG) + logger.addHandler(logging.StreamHandler(sys.stdout)) +else: + logger = logging.getLogger(__name__) + +""" +logger.debug("This is a debug message") +logger.info("This is an info message") +logger.warning("This is a warning message") +logger.error("This is an error message") +logger.critical("This is a critical message") +""" + +revision_log = """\nMost Recent:\n +10/05/2023 Rev 00.01 +\t- Initial Creation +""" + +def eth_key(key): + key_len = len("Ethernet") + if len(key) < key_len: + return 0 + return int(key[key_len:]) + +# Instantiate SfpUtilHelper class +def load_sfputilhelper(): + global platform_sfputil + # we have to make use of sfputil for some features + # even though when new platform api is used for all vendors. + # in this sense, we treat it as a part of new platform api. + # we have already moved sfputil to sonic_platform_base + # which is the root of new platform api. + platform_sfputil = sonic_platform_base.sonic_sfp.sfputilhelper.SfpUtilHelper() + if not platform_sfputil: + return False + return True + +def load_port_config(): + try: + if multi_asic.is_multi_asic(): + # For multi ASIC platforms we pass DIR of port_config_file_path and the number of asics + (platform_path, hwsku_path) = device_info.get_paths_to_platform_and_hwsku_dirs() + + # Load platform module from source + platform_sfputil.read_all_porttab_mappings(hwsku_path, multi_asic.get_num_asics()) + else: + # For single ASIC platforms we pass port_config_file_path and the asic_inst as 0 + port_config_file_path = device_info.get_path_to_port_config_file() + platform_sfputil.read_porttab_mappings(port_config_file_path, 0) + except Exception as e: + print("Error reading port info ({})".format(str(e))) + return False + return True + +# Instantiate platform-specific Chassis class +def load_platform_chassis(): + global platform_chassis + # Load new platform api class + try: + platform_chassis = sonic_platform.platform.Platform().get_chassis() + except Exception as e: + print("Failed to instantiate Chassis due to {}".format(repr(e))) + if not platform_chassis: + return False + return True + +def print_all_valid_port_values(): + click.echo("Valid values for port: {}\n".format(str(platform_sfputil.logical))) + +def logical_port_name_to_physical_port_list(port_name): + if port_name.startswith("Ethernet"): + if platform_sfputil.is_logical_port(port_name): + return platform_sfputil.get_logical_to_physical(port_name) + else: + click.echo("Error: Invalid port '{}'".format(port_name)) + return None + else: + return [int(port_name)] + +def logical_port_to_physical_port_index(port_name): + if not platform_sfputil.is_logical_port(port_name): + click.echo("Error: invalid port '{}'\n".format(port_name)) + print_all_valid_port_values() + sys.exit(ERROR_INVALID_PORT) + + physical_port = logical_port_name_to_physical_port_list(port_name)[0] + if physical_port is None: + click.echo("Error: No physical port found for logical port '{}'".format(port_name)) + sys.exit(EXIT_FAIL) + + return physical_port + +try: + from cpoutil import cpoutilbase + cpo_util = cpoutilbase() +except KeyError: + cpo_util = None + +def get_dict_str_format(indict, indent): + output = '' + if indict != None: + for key, value in indict.items(): + if type(value) == dict: + output += "{}{}:\n{}".format(indent, key, get_dict_str_format(value, indent + (' ' * 4))) + else: + output += "{}{}: {}\n".format(indent, key, value) + return output + +def send_cmd(msg, strip=False): + client_socket = socket.socket(socket.AF_UNIX, socket.SOCK_STREAM) + sock_file = '/tmp/cpo_socket' + client_socket.connect(sock_file) + client_socket.sendall(bytes(msg, encoding="utf-8")) + chunk_size = 4096 + response = b'' + while True: + try: + data = client_socket.recv(chunk_size) + if not data: + break + response += data + except ConnectionResetError: + break + ret = json.loads(response.decode('utf-8')) + retval = ret.get("retval", False) + info = ret.get("info", None) + if retval: + if isinstance(info, dict): + if not strip: + click.echo(json.dumps(info, indent=4)) + else: + click.echo(get_dict_str_format(indict=info, indent='')) + elif isinstance(info, str) and len(info)>0: + click.echo(info) + else: + click.echo("rc: {}, msg: {}".format(retval, info)) + client_socket.close() + +def _get_rlm_list(paramater): + return get_list(paramater, "rlm") + +def _get_oe_list(paramater): + return get_list(paramater, "oe") + +def _get_port_list(paramater): + return get_list(paramater, "port") + +def get_list(paramater:str, list_type:str): + allowed_list = { + "OE_INDEX_LIST": OE_INDEX_LIST, + "RLM_INDEX_LIST": RLM_INDEX_LIST, + "PORT_INDEX_LIST": PORT_INDEX_LIST + } + INDEX_LIST = allowed_list.get("{}_INDEX_LIST".format(list_type.upper())) + if paramater == None: + return INDEX_LIST, "" + if isinstance(paramater, int) == True: + if paramater not in INDEX_LIST: + return None, "invalid paramater!" + else: + return [paramater], None + if isinstance(paramater, str) == False: + return None, "invalid paramater!" + paramater = paramater.lower() + if paramater == "all": + return INDEX_LIST, "" + num_list = list() + try: + _str_list = paramater.split(',') + for area_str in _str_list: + _num_list = None + _str_list = area_str.split('-') + _str_list = [item.replace(list_type.lower(), '') for item in _str_list] + _str_list = [item.replace(list_type.upper(), '') for item in _str_list] + _num_list = [int(item) for item in _str_list] + if len(_num_list) == 2: + _start = min(_num_list) + _end = max(_num_list) + if _start not in INDEX_LIST: + return None, "invalid paramater!" + if _end not in INDEX_LIST: + return None, "invalid paramater!" + _num_list = list(range(_start, _end+1)) + else: + if _num_list[0] not in INDEX_LIST: + return None, "invalid paramater!" + _num_list = [_num_list[0]] + num_list.extend(_num_list) + except Exception as e: + return None, str(e) + return num_list, "" + +_global_options = [ + click.option('-r', '--rlm', default=0, type=click.IntRange(RLM_INDEX_LIST[0], RLM_INDEX_LIST[-1]), help='RLM Index Number Ranges from {} to {}'.format(RLM_INDEX_LIST[0], RLM_INDEX_LIST[-1])) +] + +def global_options(func): + global _global_options + for option in reversed(_global_options): + func = option(func) + return func + +CONTEXT_SETTINGS = dict(help_option_names=['-h', '--help', '-?']) + +@click.group(cls=clicommon.AliasedGroup, context_settings=CONTEXT_SETTINGS) +@click.pass_context +def cli(ctx): + if os.geteuid() != 0: + click.echo("Root privileges are required for this operation") + sys.exit(ERROR_PERMISSIONS) + + # Load platform-specific Chassis class + if not load_platform_chassis(): + sys.exit(ERROR_CHASSIS_LOAD) + + # Load SfpUtilHelper class + if not load_sfputilhelper(): + sys.exit(ERROR_SFPUTILHELPER_LOAD) + + # Load port info + if not load_port_config(): + sys.exit(ERROR_PORT_CONFIG_LOAD) + +@cli.group(cls=clicommon.AbbreviationGroup, context_settings=CONTEXT_SETTINGS) +def show(): + pass + +@show.command('portmap') +@click.argument('port_index', metavar=''.format(PORT_INDEX_LIST[0], PORT_INDEX_LIST[-1]), required=False) +def show_portmap(port_index): + port_index_list, msg = _get_port_list(port_index) + if port_index_list == None: + click.echo(msg) + return -1 + cmd = (str({"port_index_list":port_index_list, "cmd":"show_portmap"})) + send_cmd(cmd) + +@show.group(cls=clicommon.AbbreviationGroup, context_settings=CONTEXT_SETTINGS) +def rlm(): + """Display status of RLM""" + pass + +@show.group(cls=clicommon.AbbreviationGroup, context_settings=CONTEXT_SETTINGS) +def interface(): + """Display status of interface""" + pass + +@interface.command('dom') +@click.argument('port_index', metavar=''.format(PORT_INDEX_LIST[0], PORT_INDEX_LIST[-1]), required=False) +@click.option('-s', '--strip', metavar='<>', is_flag=True) +@click.option('--json-format-output', '-j', is_flag=True, help="JSON format output") +def show_dom(port_index, strip, json_format_output): + port_index_list, msg = _get_port_list(port_index) + if port_index_list == None: + click.echo(msg) + return -1 + cmd = (str({"port_index_list":port_index_list, "output_format": "", "cmd":"show_interface_dom_info"})) + if json_format_output: + cmd = (str({"port_index_list":port_index_list, "output_format": "json", "cmd":"show_interface_dom_info"})) + send_cmd(cmd, strip) + +@interface.command('speed') +@click.argument('port_index', metavar=''.format(PORT_INDEX_LIST[0], PORT_INDEX_LIST[-1]), required=False) +def show_speed(port_index): + port_index_list, msg = _get_port_list(port_index) + if port_index_list == None: + click.echo(msg) + return -1 + cmd = (str({"port_index_list":port_index_list, "cmd":"show_interface_speed"})) + send_cmd(cmd) + +@interface.command('tx_disable') +@click.argument('port_index', metavar=''.format(PORT_INDEX_LIST[0], PORT_INDEX_LIST[-1]), required=False) +@click.option('-l', '--lane', metavar='', default=None, type=click.IntRange(0, 7)) +@click.option('-s', '--strip', metavar='<>', is_flag=True) +def show_tx_disable(port_index, lane, strip): + port_index_list, msg = _get_port_list(port_index) + if port_index_list == None: + click.echo(msg) + return -1 + if lane != None: + lane_index_list = [lane] + else: + lane_index_list = None + cmd = (str({"port_index_list":port_index_list, "lane_index_list": lane_index_list, "cmd":"show_tx_output"})) + send_cmd(cmd, strip) + +@rlm.command('eeprom') +@click.argument('rlm', metavar=''.format(RLM_INDEX_LIST[0], RLM_INDEX_LIST[-1]), required=False) +@click.option('--json-format-output', '-j', is_flag=True, help="JSON format output") +def show_eeprom(rlm, json_format_output): + """Display EEPROM data of RLM""" + global cpo_util + if cpo_util == None: + click.echo("Not supported!") + return -1 + + rlm_list, msg = _get_rlm_list(rlm) + if rlm_list == None: + click.echo(msg) + return -1 + + for rlm in rlm_list: + oe = cpo_util.get_oe_by_rlm(rlm) + rlm_name = cpo_util.get_rlm_name(rlm) + if json_format_output: + click.echo(json.dumps({"{}(OE{})".format(rlm_name, oe): cpo_util.get_rlm_info_dict(rlm)})) + continue + click.echo("{}(OE{}):".format(rlm_name, oe)) + rlm_info_dict = cpo_util.get_rlm_info_dict(rlm) + if type(rlm_info_dict) == dict: + rlm_info_dict = cpo_util.get_dict_str_format(indict=rlm_info_dict, indent=' ' * 8) + click.echo(rlm_info_dict) + +@rlm.command('presence') +@click.argument('rlm', metavar=''.format(RLM_INDEX_LIST[0], RLM_INDEX_LIST[-1]), required=False) +def show_presence(rlm): + """Display presence of RLM""" + global cpo_util + if cpo_util == None: + click.echo("Not supported!") + return -1 + + rlm_list, msg = _get_rlm_list(rlm) + if rlm_list == None: + click.echo(msg) + return -1 + + for rlm in rlm_list: + oe = cpo_util.get_oe_by_rlm(rlm) + rlm_name = cpo_util.get_rlm_name(rlm) + if cpo_util.get_rlm_presence(rlm) == False: + click.echo("{}(OE{}): Not Presence.".format(rlm_name, oe)) + else: + click.echo("{}(OE{}): Presence.".format(rlm_name, oe)) + +@rlm.command('lpmode') +@click.argument('rlm', metavar=''.format(RLM_INDEX_LIST[0], RLM_INDEX_LIST[-1]), required=False) +@click.option('-s', '--strip', metavar='<>', is_flag=True) +def show_lpmode(rlm, strip): + """Display laser power-mode of RLM""" + rlm_list, msg = _get_rlm_list(rlm) + if rlm_list == None: + click.echo(msg) + return -1 + cmd = (str({"rlm_index_list":rlm_list, "cmd":"show_rlm_power_mode"})) + send_cmd(cmd, strip) + +@show.group(cls=clicommon.AbbreviationGroup, context_settings=CONTEXT_SETTINGS) +def oe(): + """Display status of OE""" + pass + +@oe.command('status') +@click.argument('oe', metavar=''.format(OE_INDEX_LIST[0], OE_INDEX_LIST[-1]), required=True) +def show_oe_status(oe): + """Show oe module status""" + oe_list, msg = _get_oe_list(oe) + if oe_list == None: + click.echo(msg) + return -1 + threads = list() + for oe in oe_list: + if (int(oe) not in OE_INDEX_LIST): + click.echo("invalid oe!") + return -1 + cmd = (str({"oe_index":oe, "cmd":"show_status"})) + threads.append(threading.Thread(target=send_cmd, args=(cmd,))) + for t in threads: + t.start() + for t in threads: + t.join() + +@oe.command('temperature') +@click.argument('oe', metavar=''.format(OE_INDEX_LIST[0], OE_INDEX_LIST[-1]), required=False) +def show_oe_temperature(oe): + """Show oe module status""" + oe_list, msg = _get_oe_list(oe) + if oe_list == None: + click.echo(msg) + return -1 + cmd = (str({"oe_index_list":oe_list, "cmd":"show_oe_temperature"})) + send_cmd(cmd) + +@oe.command('speed') +@click.argument('oe', metavar=''.format(OE_INDEX_LIST[0], OE_INDEX_LIST[-1]), required=False) +def show_speed(oe): + """Display speed of OE""" + global cpo_util + if cpo_util == None: + click.echo("Not supported!") + return -1 + oe_list, msg = _get_oe_list(oe) + if oe_list == None: + click.echo(msg) + return -1 + port_index_list = cpo_util.get_port_index_list() + for port_index in port_index_list: + speed = cpo_util.get_speed(port_index) + click.echo("{}: {}".format(port_index, speed)) + +@cli.group(cls=clicommon.AbbreviationGroup, context_settings=CONTEXT_SETTINGS) +def config(): + pass + +@config.group(cls=clicommon.AbbreviationGroup, context_settings=CONTEXT_SETTINGS) +def rlm(): + pass + +# rlm: 1-16 +@rlm.command('lpmode') +@click.argument('rlm', metavar=''.format(RLM_INDEX_LIST[0], RLM_INDEX_LIST[-1]), required=True) +@click.argument('mode', metavar='', required=True, type=click.Choice(['full-power', 'half-power'])) +def rlm_lpmode(rlm, mode): + """Config RLM laser power-mode""" + rlm_index_list, msg = _get_rlm_list(rlm) + if rlm_index_list == None: + click.echo(msg) + return -1 + threads = list() + for rlm_index in rlm_index_list: + cmd = (str({"rlm_index_list":[rlm_index], "cmd":"set_rlm_power_mode", "power_mode": mode})) + threads.append(threading.Thread(target=send_cmd, args=(cmd,))) + for t in threads: + t.start() + for t in threads: + t.join() + +@config.group(cls=clicommon.AbbreviationGroup, context_settings=CONTEXT_SETTINGS) +def oe(): + pass + +@oe.command('enabled') +@click.argument('oe', metavar=''.format(OE_INDEX_LIST[0], OE_INDEX_LIST[-1]), required=True) +def oe_enabled(oe): + oe_list, msg = _get_oe_list(oe) + if oe_list == None: + click.echo(msg) + return -1 + threads = list() + for oe in oe_list: + if (int(oe) not in OE_INDEX_LIST): + click.echo("invalid oe!") + return -1 + cmd = (str({"oe_index":oe, "cmd":"enter_mission_mode", "manully": True})) + threads.append(threading.Thread(target=send_cmd, args=(cmd,))) + for t in threads: + t.start() + for t in threads: + t.join() + +@oe.command('disabled') +@click.argument('oe', metavar=''.format(OE_INDEX_LIST[0], OE_INDEX_LIST[-1]), required=True) +def oe_disabled(oe): + """Config OE disabled""" + oe_list, msg = _get_oe_list(oe) + if oe_list == None: + click.echo(msg) + return -1 + threads = list() + for oe in oe_list: + if (int(oe) not in OE_INDEX_LIST): + click.echo("invalid oe!") + return -1 + cmd = (str({"oe_index":oe, "cmd":"exit_mission_mode", "manully": True})) + threads.append(threading.Thread(target=send_cmd, args=(cmd,))) + for t in threads: + t.start() + for t in threads: + t.join() + +@oe.command('reset') +@click.argument('oe', metavar=''.format(OE_INDEX_LIST[0], OE_INDEX_LIST[-1]), required=True) +@click.option('-H', '--Hard', is_flag=True, help='Use hardware reset') +def reset_oe(oe, hard): + """Reset OE""" + oe_list, msg = _get_oe_list(oe) + if oe_list == None: + click.echo(msg) + return -1 + cmd = (str({"oe_index_list":oe_list, "cmd":"oe_reset", "hardware_reset": hard})) + send_cmd(cmd) + +@cli.group(cls=clicommon.AbbreviationGroup, context_settings=CONTEXT_SETTINGS) +def cdb(): + pass + +@cdb.command('load') +@click.argument('filename', type=click.Path(exists=True, readable=True)) +@click.option('-s', '--size', default=2048, type=click.IntRange(1, 2048)) +@click.option('-a', '--all', is_flag=True) +@click.option('-r', '--rlm', default=None, type=click.IntRange(0, 1)) +@click.option('-b', '--bypass', is_flag=True, help='Bypass serial number checking') +@click.option('-oe', default=0, type=click.IntRange(OE_INDEX_LIST[0], OE_INDEX_LIST[-1]), help='OE Number Ranges from {} to {}'.format(OE_INDEX_LIST[0], OE_INDEX_LIST[-1])) +def cdb_load_general_cli(filename, size, oe, all, rlm, bypass): + """Load cdb image""" + verify = True + if bypass: + verify = False + if all: + oe = None + oe_list, msg = _get_oe_list(oe) + if oe_list == None: + click.echo(msg) + return -1 + for _oe in oe_list: + cpo_util.oe_fw_upgrade(_oe, filename, size, rlm, verify) + +@cdb.command('laserPwr') +@click.argument('oe', metavar=''.format(OE_INDEX_LIST[0], OE_INDEX_LIST[-1]), required=True) +def cdb_mpd_sum(oe): + """Display EIC Laser Input Power""" + oe_list, msg = _get_oe_list(oe) + if oe_list == None: + click.echo(msg) + return -1 + for _oe in oe_list: + cpo_util.oe_dump_laser_pwr(_oe) + +@config.group(cls=clicommon.AbbreviationGroup, context_settings=CONTEXT_SETTINGS) +def interface(): + pass + +@interface.command('tx_disable') +@click.argument('port_index', metavar=''.format(PORT_INDEX_LIST[0], PORT_INDEX_LIST[-1]), required=True) +@click.option('-l', '--lane', metavar='', default=None, type=click.IntRange(0, 7)) +def set_tx_disable(port_index, lane): + port_index_list, msg = _get_port_list(port_index) + if port_index_list == None: + click.echo(msg) + return -1 + if lane != None: + lane_index_list = [lane] + else: + lane_index_list = None + cmd = (str({"port_index_list":port_index_list, "lane_index_list": lane_index_list, "cmd":"set_tx_output", "turn_on": False})) + send_cmd(cmd) + +@interface.command('tx_enable') +@click.argument('port_index', metavar=''.format(PORT_INDEX_LIST[0], PORT_INDEX_LIST[-1]), required=True) +@click.option('-l', '--lane', metavar='', default=None, type=click.IntRange(0, 7)) +def set_tx_disable(port_index, lane): + port_index_list, msg = _get_port_list(port_index) + if port_index_list == None: + click.echo(msg) + return -1 + if lane != None: + lane_index_list = [lane] + else: + lane_index_list = None + cmd = (str({"port_index_list":port_index_list, "lane_index_list": lane_index_list, "cmd":"set_tx_output", "turn_on": True})) + send_cmd(cmd) + +if __name__ == '__main__': + cli() diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/cpo/script/oe_cmis_sysfs_rw b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/cpo/script/oe_cmis_sysfs_rw new file mode 100755 index 00000000000..5103646519c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/cpo/script/oe_cmis_sysfs_rw @@ -0,0 +1,213 @@ +#!/usr/bin/python3 +import os +import sys +import fcntl +import click +import sonic_platform +from sonic_py_common import device_info, logger, multi_asic +import sonic_platform_base.sonic_sfp.sfputilhelper +import utilities_common.cli as clicommon +from oe_cmis_rw import oe_cmis_sysfs_rw + +def help(): + print("------------------------------OE CMIS sysfs RW Tool--------------------------------") + print("Read OE CMIS data:") + print("\toe_cmis_sysfs_rw.py rd [oe] [bank] [page] [offset] [rd_len]") + print("\t[oe] from 0 to 7 (decimal)") + print("\t[bank] from 0 to 7 (hexadecimal)") + print("\t[page] from 0 to 0xff (hexadecimal)") + print("\t[offset] from 0 to 0xff (hexadecimal)") + print("\t[rd_len] from 1 to 256 (decimal)") + print("Write OE CMIS data:") + print("\toe_cmis_sysfs_rw.py wr [oe] [bank] [page] [offset] [wr_data]") + print("\t[oe] from 0 to 7 (decimal)") + print("\t[bank] from 0 to 7 (hexadecimal)") + print("\t[page] from 0 to 0xff (hexadecimal)") + print("\t[offset] from 0 to 0xff (hexadecimal)") + print("\t[wr_data] from 0 to 0xff (hexadecimal)") + return + +def dfd_utest_printf_reg(buf, offset): + j = offset % 16 + tmp = j + offset -= j + print(" ", end="") + + for i in range(0,16): + print("%02X " %i, end="") + + for i in range(0, len(buf) + j): + if (i % 16) == 0: + print("\n%02X: " % offset, end="") + offset += 16 + if tmp: + print(" ", end="") + tmp -= 1 + else: + print("%02x " % buf[i-j], end="") + print("") + return + +# oe_cmis_sysfs_rw.py rd [oe] [bank] [page] [offset] [rd_len] +def cmis_sysfs_read_parse(argv, is_raw): + if len(argv) != 7: + print("Input invalid") + help() + return -1 + + oe_num = int(argv[2]) + if oe_num < 0 or oe_num > 7: + print("Invalid oe: %d\n" % oe_num) + help() + return -1 + + bank = int(argv[3], 16) + if bank < 0 or bank > 0xff: + print("Invalid bank: %d" % bank) + help() + return -1 + + page = int(argv[4], 16) + if page < 0 or page > 0xff: + print("Invalid page: %d" % page) + help() + return -1 + + offset = int(argv[5], 16) + if offset < 0 or offset > 0xff: + print("Invalid offset: %d" % offset) + help() + return -1 + + rd_len = int(argv[6]) + if rd_len < 0 or rd_len > 256: + print("Invalid offset: %d" % rd_len) + help() + return -1 + + # oe_bus = (oe_num % 8) + 24 + # i2c_path = cmis_util.cmis_sysfs_i2c_path(oe_num) + if (not is_raw): + # print("OE CMIS sysfs read, oe: %d, path: %s" % (oe_num, i2c_path)) + print("OE CMIS sysfs read, oe: %d, bank: 0x%02x, page: 0x%02x offset: 0x%02x, rd_len: %d" % + (oe_num, bank, page, offset, rd_len)) + + status, value = cmis_util.cmis_read(oe_num, bank, page, offset, rd_len) + if status is False: + print("Failed to read OE CMIS data, msg: %s" % value) + return -1 + if (not is_raw): + dfd_utest_printf_reg(value, offset) + else: + hex_string_list = ["{}".format(hex(item))[2:].zfill(2) for item in value] + output = "".join([item for item in hex_string_list]) + print(output) + return 0 + +# oe_cmis_sysfs_rw.py wr [oe] [bank] [page] [offset] [wr_data] +def cmis_sysfs_write_parse(argv, is_raw): + if len(argv) != 7: + print("Input invalid") + help() + return -1 + + oe_num = int(argv[2]) + if oe_num < 0 or oe_num > 7: + print("Invalid oe: %d\n" % oe_num) + help() + return -1 + + bank = int(argv[3], 16) + if bank < 0 or bank > 0xff: + print("Invalid bank: %d" % bank) + help() + return -1 + + page = int(argv[4], 16) + if page < 0 or page > 0xff: + print("Invalid page: %d" % page) + help() + return -1 + + offset = int(argv[5], 16) + if offset < 0 or offset > 0xff: + print("Invalid offset: %d" % offset) + help() + return -1 + + wr_data = argv[6] + wr_data = wr_data.strip() + if ((wr_data.find('[')>=0) and (wr_data.find(']')>=0)): + import ast + wr_data = ast.literal_eval(wr_data) + else: + wr_data = [int(wr_data, 16)] + + for byte_data in wr_data: + if byte_data < 0 or byte_data > 0xff: + print("Invalid wr_data: {}".format(wr_data)) + help() + return -1 + + # i2c_path = cmis_util.cmis_sysfs_i2c_path(oe_num) + # print("OE CMIS sysfs write, oe: %d, path: %s" % (oe_num, i2c_path)) + if (not is_raw): + print("OE CMIS sysfs write, oe: %d, bank: 0x%02x, page: 0x%02x offset: 0x%02x, wr_data: %s" % + (oe_num, bank, page, offset, str(["0x%02x"%byte_data for byte_data in wr_data]))) + + status, value = cmis_util.cmis_write(oe_num, bank, page, offset, wr_data) + if status is False: + print("Failed to write OE CMIS data, msg: %s" % value) + return -1 + if (not is_raw): + print("OE CMIS data success") + return 0 + +@click.group() +def cli(): + pass + +@cli.command() +@click.argument('oe', metavar='', required=True) +@click.argument('bank', metavar='', required=True) +@click.argument('page', metavar='', required=True) +@click.argument('offset', metavar='', required=True) +@click.argument('rd_len', metavar='', required=True) +@click.option('-raw', '--raw_data', is_flag=True, help='output raw data') +def rd(oe, bank, page, offset, rd_len, raw_data): + '''Read cmis data from /sys/bus/i2c/devices/XX-0050/eeprom''' + oe_list = oe.split('-') + if len(oe_list) > 1: + range_start = min(int(oe_list[0]), int(oe_list[1])) + range_end = max(int(oe_list[0]), int(oe_list[1])) + oe_list = range(range_start, range_end+1) + + for oe in oe_list: + # print(oe, bank, page, offset, rd_len) + argv = [0, 0, oe, bank, page, offset, rd_len] + cmis_sysfs_read_parse(argv, raw_data) + +@cli.command() +@click.argument('oe', metavar='', required=True) +@click.argument('bank', metavar='', required=True) +@click.argument('page', metavar='', required=True) +@click.argument('offset', metavar='', required=True) +@click.argument('wr_data', metavar='', required=True) +@click.option('-raw', '--raw_data', is_flag=True, help='write quietly') +def wr(oe, bank, page, offset, wr_data, raw_data): + '''Write cmis data through /sys/bus/i2c/devices/XX-0050/eeprom''' + oe_list = oe.split('-') + if len(oe_list) > 1: + range_start = min(int(oe_list[0]), int(oe_list[1])) + range_end = max(int(oe_list[0]), int(oe_list[1])) + oe_list = range(range_start, range_end+1) + + for oe in oe_list: + # print(oe, bank, page, offset, wr_data) + argv = [0, 0, oe, bank, page, offset, wr_data] + cmis_sysfs_write_parse(argv, raw_data) + +if __name__ == '__main__': + global cmis_util + cmis_util = oe_cmis_sysfs_rw() + cli() \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/cpo/script/oe_voltage_setting.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/cpo/script/oe_voltage_setting.py new file mode 100644 index 00000000000..b52fc40ce59 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/cpo/script/oe_voltage_setting.py @@ -0,0 +1,312 @@ +#!/usr/bin/env python3 +import syslog +import os +import glob + +from cpoutil import get_all_oe_vendor_info + +OE_AVDD_VOLTAGE_STATIC_PARAMETERS = [ + # OE0_AVDD_RX_1.8_V + {"loc": "67-0070/hwmon/hwmon*/avs0_vout_min", "value": "1710000"}, + {"loc": "67-0070/hwmon/hwmon*/avs0_vout_max", "value": "1890000"}, + {"loc": "67-0070/hwmon/hwmon*/avs0_vout", "value": "1800000"}, + # OE0_AVDD_RX_1.2_V + {"loc": "67-0070/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + {"loc": "67-0070/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + {"loc": "67-0070/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE0_AVDD_TX_1.8_V + {"loc": "67-0068/hwmon/hwmon*/avs0_vout_min", "value": "1750000"}, + {"loc": "67-0068/hwmon/hwmon*/avs0_vout_max", "value": "1950000"}, + # {"loc": "67-0068/hwmon/hwmon*/avs0_vout", "value": "1850000"}, + # OE0_AVDD_TX_1.2_V + {"loc": "67-0068/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + {"loc": "67-0068/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + {"loc": "67-0068/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # OE0_AVDD_TRX_0.75_V + {"loc": "67-0060/hwmon/hwmon*/avs0_vout_min", "value": "713000"}, + {"loc": "67-0060/hwmon/hwmon*/avs0_vout_max", "value": "788000"}, + {"loc": "67-0060/hwmon/hwmon*/avs0_vout", "value": "750000"}, + # OE1_AVDD_RX_1.8_V + {"loc": "68-0070/hwmon/hwmon*/avs0_vout_min", "value": "1710000"}, + {"loc": "68-0070/hwmon/hwmon*/avs0_vout_max", "value": "1890000"}, + {"loc": "68-0070/hwmon/hwmon*/avs0_vout", "value": "1800000"}, + # OE1_AVDD_RX_1.2_V + {"loc": "68-0070/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + {"loc": "68-0070/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + {"loc": "68-0070/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE1_AVDD_TX_1.8_V + {"loc": "68-0068/hwmon/hwmon*/avs0_vout_min", "value": "1750000"}, + {"loc": "68-0068/hwmon/hwmon*/avs0_vout_max", "value": "1950000"}, + # {"loc": "68-0068/hwmon/hwmon*/avs0_vout", "value": "1850000"}, + # OE1_AVDD_TX_1.2_V + {"loc": "68-0068/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + {"loc": "68-0068/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + {"loc": "68-0068/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # OE1_AVDD_TRX_0.75_V + {"loc": "68-0060/hwmon/hwmon*/avs0_vout_min", "value": "713000"}, + {"loc": "68-0060/hwmon/hwmon*/avs0_vout_max", "value": "788000"}, + {"loc": "68-0060/hwmon/hwmon*/avs0_vout", "value": "750000"}, + # OE2_AVDD_RX_1.8_V + {"loc": "68-006e/hwmon/hwmon*/avs0_vout_min", "value": "1710000"}, + {"loc": "68-006e/hwmon/hwmon*/avs0_vout_max", "value": "1890000"}, + {"loc": "68-006e/hwmon/hwmon*/avs0_vout", "value": "1800000"}, + # OE2_AVDD_RX_1.2_V + {"loc": "68-006e/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + {"loc": "68-006e/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + {"loc": "68-006e/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE2_AVDD_TX_1.8_V + {"loc": "68-0066/hwmon/hwmon*/avs0_vout_min", "value": "1750000"}, + {"loc": "68-0066/hwmon/hwmon*/avs0_vout_max", "value": "1950000"}, + # {"loc": "68-0066/hwmon/hwmon*/avs0_vout", "value": "1850000"}, + # OE2_AVDD_TX_1.2_V + {"loc": "68-0066/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + {"loc": "68-0066/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + {"loc": "68-0066/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # OE2_AVDD_TRX_0.75_V + {"loc": "68-005e/hwmon/hwmon*/avs0_vout_min", "value": "713000"}, + {"loc": "68-005e/hwmon/hwmon*/avs0_vout_max", "value": "788000"}, + {"loc": "68-005e/hwmon/hwmon*/avs0_vout", "value": "750000"}, + # OE3_AVDD_RX_1.8_V + {"loc": "69-0070/hwmon/hwmon*/avs0_vout_min", "value": "1710000"}, + {"loc": "69-0070/hwmon/hwmon*/avs0_vout_max", "value": "1890000"}, + {"loc": "69-0070/hwmon/hwmon*/avs0_vout", "value": "1800000"}, + # OE3_AVDD_RX_1.2_V + {"loc": "69-0070/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + {"loc": "69-0070/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + {"loc": "69-0070/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE3_AVDD_TX_1.8_V + {"loc": "69-0068/hwmon/hwmon*/avs0_vout_min", "value": "1750000"}, + {"loc": "69-0068/hwmon/hwmon*/avs0_vout_max", "value": "1950000"}, + # {"loc": "69-0068/hwmon/hwmon*/avs0_vout", "value": "1850000"}, + # OE3_AVDD_TX_1.2_V + {"loc": "69-0068/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + {"loc": "69-0068/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + {"loc": "69-0068/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # OE3_AVDD_TRX_0.75_V + {"loc": "69-0060/hwmon/hwmon*/avs0_vout_min", "value": "713000"}, + {"loc": "69-0060/hwmon/hwmon*/avs0_vout_max", "value": "788000"}, + {"loc": "69-0060/hwmon/hwmon*/avs0_vout", "value": "750000"}, + # OE4_AVDD_RX_1.8_V + {"loc": "69-006e/hwmon/hwmon*/avs0_vout_min", "value": "1710000"}, + {"loc": "69-006e/hwmon/hwmon*/avs0_vout_max", "value": "1890000"}, + {"loc": "69-006e/hwmon/hwmon*/avs0_vout", "value": "1800000"}, + # OE4_AVDD_RX_1.2_V + {"loc": "69-006e/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + {"loc": "69-006e/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + {"loc": "69-006e/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE4_AVDD_TX_1.8_V + {"loc": "69-0066/hwmon/hwmon*/avs0_vout_min", "value": "1750000"}, + {"loc": "69-0066/hwmon/hwmon*/avs0_vout_max", "value": "1950000"}, + # {"loc": "69-0066/hwmon/hwmon*/avs0_vout", "value": "1850000"}, + # OE4_AVDD_TX_1.2_V + {"loc": "69-0066/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + {"loc": "69-0066/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + {"loc": "69-0066/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # OE4_AVDD_TRX_0.75_V + {"loc": "69-005e/hwmon/hwmon*/avs0_vout_min", "value": "713000"}, + {"loc": "69-005e/hwmon/hwmon*/avs0_vout_max", "value": "788000"}, + {"loc": "69-005e/hwmon/hwmon*/avs0_vout", "value": "750000"}, + # OE5_AVDD_RX_1.8_V + {"loc": "70-0070/hwmon/hwmon*/avs0_vout_min", "value": "1710000"}, + {"loc": "70-0070/hwmon/hwmon*/avs0_vout_max", "value": "1890000"}, + {"loc": "70-0070/hwmon/hwmon*/avs0_vout", "value": "1800000"}, + # OE5_AVDD_RX_1.2_V + {"loc": "70-0070/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + {"loc": "70-0070/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + {"loc": "70-0070/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE5_AVDD_TX_1.8_V + {"loc": "70-0068/hwmon/hwmon*/avs0_vout_min", "value": "1750000"}, + {"loc": "70-0068/hwmon/hwmon*/avs0_vout_max", "value": "1950000"}, + # {"loc": "70-0068/hwmon/hwmon*/avs0_vout", "value": "1850000"}, + # OE5_AVDD_TX_1.2_V + {"loc": "70-0068/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + {"loc": "70-0068/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + {"loc": "70-0068/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # OE5_AVDD_TRX_0.75_V + {"loc": "70-0060/hwmon/hwmon*/avs0_vout_min", "value": "713000"}, + {"loc": "70-0060/hwmon/hwmon*/avs0_vout_max", "value": "788000"}, + {"loc": "70-0060/hwmon/hwmon*/avs0_vout", "value": "750000"}, + # OE6_AVDD_RX_1.8_V + {"loc": "70-006e/hwmon/hwmon*/avs0_vout_min", "value": "1710000"}, + {"loc": "70-006e/hwmon/hwmon*/avs0_vout_max", "value": "1890000"}, + {"loc": "70-006e/hwmon/hwmon*/avs0_vout", "value": "1800000"}, + # OE6_AVDD_RX_1.2_V + {"loc": "70-006e/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + {"loc": "70-006e/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + {"loc": "70-006e/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE6_AVDD_TX_1.8_V + {"loc": "70-0066/hwmon/hwmon*/avs0_vout_min", "value": "1750000"}, + {"loc": "70-0066/hwmon/hwmon*/avs0_vout_max", "value": "1950000"}, + # {"loc": "70-0066/hwmon/hwmon*/avs0_vout", "value": "1850000"}, + # OE6_AVDD_TX_1.2_V + {"loc": "70-0066/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + {"loc": "70-0066/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + {"loc": "70-0066/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # OE6_AVDD_TRX_0.75_V + {"loc": "70-005e/hwmon/hwmon*/avs0_vout_min", "value": "713000"}, + {"loc": "70-005e/hwmon/hwmon*/avs0_vout_max", "value": "788000"}, + {"loc": "70-005e/hwmon/hwmon*/avs0_vout", "value": "750000"}, + # OE7_AVDD_RX_1.8_V + {"loc": "67-006e/hwmon/hwmon*/avs0_vout_min", "value": "1710000"}, + {"loc": "67-006e/hwmon/hwmon*/avs0_vout_max", "value": "1890000"}, + {"loc": "67-006e/hwmon/hwmon*/avs0_vout", "value": "1800000"}, + # OE7_AVDD_RX_1.2_V + {"loc": "67-006e/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + {"loc": "67-006e/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + {"loc": "67-006e/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # # OE7_AVDD_TX_1.8_V + {"loc": "67-0066/hwmon/hwmon*/avs0_vout_min", "value": "1750000"}, + {"loc": "67-0066/hwmon/hwmon*/avs0_vout_max", "value": "1950000"}, + # {"loc": "67-0066/hwmon/hwmon*/avs0_vout", "value": "1850000"}, + # OE7_AVDD_TX_1.2_V + {"loc": "67-0066/hwmon/hwmon*/avs1_vout_min", "value": "1140000"}, + {"loc": "67-0066/hwmon/hwmon*/avs1_vout_max", "value": "1260000"}, + {"loc": "67-0066/hwmon/hwmon*/avs1_vout", "value": "1200000"}, + # OE7_AVDD_TRX_0.75_V + {"loc": "67-005e/hwmon/hwmon*/avs0_vout_min", "value": "713000"}, + {"loc": "67-005e/hwmon/hwmon*/avs0_vout_max", "value": "788000"}, + {"loc": "67-005e/hwmon/hwmon*/avs0_vout", "value": "750000"} +] + +OE_AVDD_VOLTAGE_CUSTOM_PARAMETERS = { + # Strict ordering is required for this parameters + "OE_AVDD_TX_1_8":[ + # OE0_AVDD_TX + "67-0068/hwmon/hwmon*/avs0_vout", + # OE1_AVDD_TX + "68-0068/hwmon/hwmon*/avs0_vout", + # OE2_AVDD_TX + "68-0066/hwmon/hwmon*/avs0_vout", + # OE3_AVDD_TX + "69-0068/hwmon/hwmon*/avs0_vout", + # OE4_AVDD_TX + "69-0066/hwmon/hwmon*/avs0_vout", + # OE5_AVDD_TX + "70-0068/hwmon/hwmon*/avs0_vout", + # OE6_AVDD_TX + "70-0066/hwmon/hwmon*/avs0_vout", + # OE7_AVDD_TX + "67-0066/hwmon/hwmon*/avs0_vout" + ], +} + +CUSTOM_PARA_1_85 = "1850000" +CUSTOM_PARA_1_80 = "1810000" +SPECIAL_SN_CASES = ["SB244800G", + "SB2439006", + "SB2446006", + "SB2448004", + "SB244800A", + "SB244800F", + "SB244800J", + "SB244800L", + "SB244800R", + "SB244800V",] + +OE_VOLTAGE_SET_DEBUG_FILE = "/etc/.oe_voltage_set_debug_flag" + +debuglevel = 0 + + +def oe_voltage_set_debug(s): + if debuglevel == 1: + syslog.openlog("OE_VOLTAGE_SET", syslog.LOG_PID) + syslog.syslog(syslog.LOG_DEBUG, s) + +def oe_voltage_set_error(s): + # s = s.decode('utf-8').encode('gb2312') + syslog.openlog("OE_VOLTAGE_SET", syslog.LOG_PID) + syslog.syslog(syslog.LOG_ERR, s) + + +def oe_voltage_set_info(s): + syslog.openlog("OE_VOLTAGE_SET", syslog.LOG_PID) + syslog.syslog(syslog.LOG_INFO, s) + +def debug_init(): + global debuglevel + if os.path.exists(OE_VOLTAGE_SET_DEBUG_FILE): + debuglevel = 1 + else: + debuglevel = 0 + +def write_sysfs_value(reg_name, value): + mb_reg_file = "/sys/bus/i2c/devices/" + reg_name + locations = glob.glob(mb_reg_file) + if len(locations) == 0: + print("%s not found" % mb_reg_file) + return False, "{} not found".format(mb_reg_file) + sysfs_loc = locations[0] + try: + with open(sysfs_loc, 'w') as fd: + fd.write(value) + except Exception as e: + return False, e + return True,None + +def set_static_oe_avdd_parameters(): + for para_dic in OE_AVDD_VOLTAGE_STATIC_PARAMETERS: + oe_voltage_set_debug("Set {} to {}".format(para_dic["loc"], para_dic["value"])) + ret, log = write_sysfs_value(para_dic["loc"], para_dic["value"]) + if ret is False: + oe_voltage_set_error("Set {} failed, msg:{}".format(para_dic["loc"] ,log)) + +def get_OE_AVDD_TX_1_8_value(sn): + """ + rules: + format of SN : SByywwZZZ, yy: year, ww: work week, ZZZ: serial number + + the day after 2449(include 2449), return CUSTOM_PARA_1_80 + the dat before 2449, return CUSTOM_PARA_1_85 + + Special: + sn == SB244800G, return CUSTOM_PARA_1_80 + ... + """ + if sn in SPECIAL_SN_CASES: + return CUSTOM_PARA_1_80 + + try: + date = int(sn[2:6]) + except Exception as e: + oe_voltage_set_error("SN {} is not in expected format, return default value 1.8".format(sn)) + # return default value 1.8 + return CUSTOM_PARA_1_80 + + if date < 2449: + return CUSTOM_PARA_1_85 + else: + return CUSTOM_PARA_1_80 + +def set_OE_AVDD_TX_1_8_parameters(): + try: + oe_vendor_info_dict = get_all_oe_vendor_info() + except Exception as e: + oe_voltage_set_error("Get oe vender info failed: {}".format(e)) + oe_vendor_info_dict = {} + + for i in range(len(OE_AVDD_VOLTAGE_CUSTOM_PARAMETERS["OE_AVDD_TX_1_8"])): + cpo_vendor_sn = oe_vendor_info_dict.get(i,{}).get("CPO Vendor SN", "") + if cpo_vendor_sn == "": + oe_voltage_set_error("Failed to get num {} oe vendor info.".format(i)) + # Set to default value 1.8 + voltage_value = CUSTOM_PARA_1_80 + else: + voltage_value = get_OE_AVDD_TX_1_8_value(cpo_vendor_sn) + + oe_voltage_set_debug("Set num {} OE0_AVDD_TX1.8 to {}".format(i, voltage_value)) + ret, log = write_sysfs_value(OE_AVDD_VOLTAGE_CUSTOM_PARAMETERS["OE_AVDD_TX_1_8"][i], voltage_value) + if ret is False: + oe_voltage_set_error("Set {} failed, msg:{}".format(OE_AVDD_VOLTAGE_CUSTOM_PARAMETERS["OE_AVDD_TX_1_8"][i], log)) + + +if __name__ == '__main__': + debug_init() + + oe_voltage_set_info("Start setting static parameters of oe") + set_static_oe_avdd_parameters() + oe_voltage_set_info("End of setting static parameters of oe") + + oe_voltage_set_info("Start setting custom parameters of oe") + set_OE_AVDD_TX_1_8_parameters() + oe_voltage_set_info("End of setting custom parameters of oe") \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/cpo/script/platform_base.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/cpo/script/platform_base.py new file mode 100755 index 00000000000..011b3abefe7 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/cpo/script/platform_base.py @@ -0,0 +1,330 @@ +#!/usr/bin/env python3 +import os +import time +import sys +from platform_util import exec_os_cmd, log_to_file, get_value, set_value, get_sysfs_value +from wbutil.baseutil import get_machine_info, get_platform_info, get_board_id + +SUB_VERSION_FILE = "/etc/sonic/.subversion" + +# Constants +LOG_DIRECTORY = '/var/log/bsp_tech' +NO_CONFIG_ERR_CODE = 0 +READ_FAIL_ERR_CODE = -1 +MAX_RETRY = 6 + +# Ensure log directory exists +os.makedirs(LOG_DIRECTORY, exist_ok=True) +LOG_FILE_PATH = os.path.join(LOG_DIRECTORY, 'platform_base_debug.log') +LOG_WRITE_SIZE = 1 * 1024 * 1024 # 1 MB + +def log_message(message): + # Print the message and log it to the log file. + log_to_file(message, LOG_FILE_PATH, LOG_WRITE_SIZE) + + +platform = get_platform_info(get_machine_info()) +board_id = get_board_id(get_machine_info()) +platform_productfile = (platform + "_base_config").replace("-", "_") +platformid_configfile = (platform + "_" + board_id + "_base_config").replace("-", "_") # platfrom + board_id +configfile_pre = "/usr/local/bin/" +sys.path.append(configfile_pre) + +############################################################################################ +global module_product +if os.path.exists(configfile_pre + platformid_configfile + ".py"): + module_product = __import__(platformid_configfile, globals(), locals(), [], 0) +elif os.path.exists(configfile_pre + platform_productfile + ".py"): + module_product = __import__(platform_productfile, globals(), locals(), [], 0) +else: + log_message("platform base config file not exist, do nothing") + sys.exit(0) + +def get_var(name, default): + global module_product + var = getattr(module_product, name, default) + return var + +DRIVERLISTS = get_var("DRIVERLISTS", []) +DEVICE = get_var("DEVICE", []) +INIT_PARAM = get_var("INIT_PARAM", []) +FINISH_PARAM = get_var("FINISH_PARAM ", []) +SUBVERSION_CONFIG = get_var("SUBVERSION_CONFIG", {}) +SECONDARY_SUBVERSION_CONFIG = get_var("SECONDARY_SUBVERSION_CONFIG", {}) + + +def removeDev(bus, loc): + cmd = "echo 0x%02x > /sys/bus/i2c/devices/i2c-%d/delete_device" % (loc, bus) + devpath = "/sys/bus/i2c/devices/%d-%04x" % (bus, loc) + if os.path.exists(devpath): + log_message("%%PLATFORM_BASE: removeDev, bus: %s, loc: 0x%02x" % (bus, loc)) + tmp_config = { + "gettype": "cmd", + "cmd": cmd + } + ret, log = set_value(tmp_config) + if ret is False: + log_message("%%PLATFORM_BASE: run %s error, msg: %s" % (cmd, log)) + else: + log_message("%%PLATFORM_BASE: removeDev, bus: %s, loc: 0x%02x success" % (bus, loc)) + else: + log_message("%%PLATFORM_BASE: %s not found, don't run cmd: %s" % (devpath, cmd)) + + + +def addDev(name, bus, loc): + pdevpath = "/sys/bus/i2c/devices/i2c-%d/" % (bus) + for i in range(1, 11): + if os.path.exists(pdevpath) is True: + break + time.sleep(0.1) + if i % 10 == 0: + log_message("%%PLATFORM_BASE: %s not found ! i %d " % (pdevpath, i)) + return + + cmd = "echo %s 0x%02x > /sys/bus/i2c/devices/i2c-%d/new_device" % (name, loc, bus) + devpath = "/sys/bus/i2c/devices/%d-%04x" % (bus, loc) + if os.path.exists(devpath) is False: + log_message("%%PLATFORM_BASE: addDev, name: %s, bus: %s, loc: 0x%02x" % (name, bus, loc)) + tmp_config = { + "gettype": "cmd", + "cmd": cmd + } + ret, log = set_value(tmp_config) + if ret is False: + log_message("%%PLATFORM_BASE: run %s error, msg: %s" % (cmd, log)) + else: + log_message("%%PLATFORM_BASE: addDev, name: %s, bus: %s, loc: 0x%02x success" % (name, bus, loc)) + else: + log_message("%%PLATFORM_BASE: %s already exist, don't run cmd: %s" % (devpath, cmd)) + + +def removedevs(): + devs = DEVICE + for index in range(len(devs) - 1, -1, -1): + removeDev(devs[index]["bus"], devs[index]["loc"]) + + +def adddevs(): + for dev in DEVICE: + addDev(dev["name"], dev["bus"], dev["loc"]) + + +def checksignaldriver(name): + driver_path = "/sys/module/%s" % name + if os.path.exists(driver_path) is True: + return True + return False + + +def adddriver(name, delay): + realname = name.lstrip().split(" ")[0] + if delay > 0: + time.sleep(delay) + + ret = checksignaldriver(realname) + if ret is True: + log_message("%%PLATFORM_BASE: WARN: %s driver already loaded, skip to modprobe" % realname) + return + + cmd = "modprobe %s" % name + log_message("%%PLATFORM_BASE: adddriver cmd: %s, delay: %s" % (cmd, delay)) + retrytime = 6 + for i in range(retrytime): + status, log = exec_os_cmd(cmd) + if status == 0: + ret = checksignaldriver(realname) + if ret is True: + log_message("%%PLATFORM_BASE: add driver %s success" % realname) + return + log_message("%%PLATFORM_BASE: run %s success, but driver %s not load, retry: %d" % (cmd, realname, i)) + else: + log_message("%%PLATFORM_BASE: run %s error, status: %s, msg: %s, retry: %d" % (cmd, status, log, i)) + time.sleep(0.1) + log_message("%%PLATFORM_BASE: load %s driver failed, exit!" % realname) + sys.exit(1) + + +def removedriver(name, delay, removeable=1): + realname = name.lstrip().split(" ")[0] + if not removeable: + log_message("%%PLATFORM_BASE: driver name: %s not removeable" % realname) + return + ret = checksignaldriver(realname) + if ret is False: + log_message("%%PLATFORM_BASE: WARN: %s driver not loaded, skip to rmmod" % realname) + return + + cmd = "rmmod %s" % realname + log_message("%%PLATFORM_BASE: removedriver, driver name: %s, delay: %s" % (realname, delay)) + retrytime = 6 + for i in range(retrytime): + status, log = exec_os_cmd(cmd) + if status == 0: + ret = checksignaldriver(realname) + if ret is False: + log_message("%%PLATFORM_BASE: remove driver %s success" % realname) + if delay > 0: + time.sleep(delay) + return + log_message("%%PLATFORM_BASE: run %s success, but driver %s is load, retry: %d" % (cmd, realname, i)) + else: + log_message("%%PLATFORM_BASE: run %s error, status: %s, msg: %s, retry: %d" % (cmd, status, log, i)) + time.sleep(0.1) + log_message("%%PLATFORM_BASE: remove %s driver failed, exit!" % realname) + sys.exit(1) + + +def removedrivers(): + drivers = DRIVERLISTS + for index in range(len(drivers) - 1, -1, -1): + delay = 0 + name = "" + removeable = drivers[index].get("removable", 1) + if isinstance(drivers[index], dict): + name = drivers[index].get("name") + delay = drivers[index].get("delay") + else: + name = drivers[index] + removedriver(name, delay, removeable) + + +def adddrivers(): + for driver in DRIVERLISTS: + delay = 0 + name = "" + if isinstance(driver, dict): + name = driver.get("name") + delay = driver.get("delay", 0) + else: + name = driver + adddriver(name, delay) + + +def platform_base_init(): + for item in INIT_PARAM: + status, log = set_value(item) + if status is False: + log_message("%%PLATFORM_BASE: init set value failed, config: %s, log: %s" % (item, log)) + return False + log_message("%%PLATFORM_BASE: init set value success, config: %s" % item) + return True + + +def platform_base_finish(): + for item in FINISH_PARAM: + status, log = set_value(item) + if status is False: + log_message("%%PLATFORM_BASE: finish set value failed, config: %s, log: %s" % (item, log)) + else: + log_message("%%PLATFORM_BASE: finish set value success, config: %s" % item) + + +def unload_driver(): + removedevs() + removedrivers() + + +def load_driver(): + adddrivers() + adddevs() + +def get_main_sub_version(): + if not SUBVERSION_CONFIG: + log_message("%%PLATFORM_BASE: SUBVERSION_CONFIG is empty, do nothing") + return NO_CONFIG_ERR_CODE + + val_config = SUBVERSION_CONFIG["get_value"] + ret, value = get_value(val_config) + if ret is False: + log_message("%%PLATFORM_BASE: get value failed, config: %s, log: %s" % (val_config, value)) + return READ_FAIL_ERR_CODE + + log_message("%%PLATFORM_BASE: get value success, value: 0x%02x" % value) + + val_mask = val_config.get("mask") + if val_mask is not None: + origin_value = value + value = origin_value & val_mask + log_message("%%PLATFORM_BASE: origin value: 0x%02x, mask: 0x%02x, mask_value: 0x%02x" % + (origin_value, val_mask, value)) + + decode_config = SUBVERSION_CONFIG.get("decode_value") + if decode_config is not None: + origin_value = value + value = decode_config.get(origin_value, origin_value) + log_message("%%PLATFORM_BASE: origin_value: 0x%02x, decode value: 0x%02x" % (origin_value, value)) + + return "v%02x" % value + +def get_secondary_sub_version(): + if not SECONDARY_SUBVERSION_CONFIG: + log_message("%%PLATFORM_BASE: SECONDARY_SUBVERSION_CONFIG is empty, do nothing") + return NO_CONFIG_ERR_CODE + + val_config = SECONDARY_SUBVERSION_CONFIG.get("get_value", {}).get("loc") + val_configs = val_config if isinstance(val_config, list) else [val_config] + origin_value = "" + matched_config = None + + for i in range(MAX_RETRY): + for candidate in val_configs: + origin_value = get_sysfs_value(candidate) + if not (origin_value.startswith("ERR") or origin_value == ""): + matched_config = candidate + break + if matched_config is not None: + break + log_message("%%PLATFORM_BASE: get value failed, config: %s, log: %s, read count: %s" % (val_configs, origin_value, i)) + time.sleep(0.1) + + if matched_config is None: + return SECONDARY_SUBVERSION_CONFIG.get("default", READ_FAIL_ERR_CODE) + + log_message("%%PLATFORM_BASE: get value success, config: %s, value: %s" % (matched_config, origin_value)) + decode_config = SECONDARY_SUBVERSION_CONFIG.get("decode_value") + if decode_config is not None: + if origin_value in decode_config.keys(): + value = decode_config.get(origin_value) + elif "default" in decode_config.keys(): + value = decode_config.get("default") + else: + value = origin_value + else: + value = origin_value + return value + +def generate_sub_version(): + main_sub_version_str = get_main_sub_version() + if main_sub_version_str == NO_CONFIG_ERR_CODE or main_sub_version_str == READ_FAIL_ERR_CODE: + return + + secondary_sub_version_str = get_secondary_sub_version() + if secondary_sub_version_str == NO_CONFIG_ERR_CODE or secondary_sub_version_str == READ_FAIL_ERR_CODE: + sub_version_str = main_sub_version_str + else: + sub_version_str = "{}-{}".format(main_sub_version_str, secondary_sub_version_str) + + out_file_dir = os.path.dirname(SUB_VERSION_FILE) + if len(out_file_dir) != 0: + cmd = "mkdir -p %s" % out_file_dir + exec_os_cmd(cmd) + with open(SUB_VERSION_FILE, "w") as fd: + fd.write(sub_version_str.lower()) + exec_os_cmd("sync") + + +def run(): + ret = platform_base_init() + if ret is False: + platform_base_finish() + return + load_driver() + generate_sub_version() + unload_driver() + platform_base_finish() + + +if __name__ == '__main__': + log_message("enter platform base main") + run() diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/cpo/service/oe_voltage_setting.service b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/cpo/service/oe_voltage_setting.service new file mode 100644 index 00000000000..4c562f6b343 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/cpo/service/oe_voltage_setting.service @@ -0,0 +1,11 @@ +[Unit] +Description= +Requires=platform_driver.service +After=platform_driver.service + +[Service] +Type=oneshot +ExecStart=/usr/local/bin/oe_voltage_setting.py + +[Install] +WantedBy=multi-user.target \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/hal-config/x86_64_micas_m2_w6940_128x1_fr4_r0_0x40d9_device.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/hal-config/x86_64_micas_m2_w6940_128x1_fr4_r0_0x40d9_device.py new file mode 100755 index 00000000000..5ed478c016f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/hal-config/x86_64_micas_m2_w6940_128x1_fr4_r0_0x40d9_device.py @@ -0,0 +1,3847 @@ +#!/usr/bin/python3 + +# CPO build3 configuration file + +psu_fan_airflow = { + "intake": ['DLK3000AN12C31', 'CRPS3000CL', 'ECDL3000123'], + "exhaust": [] +} + +fanairflow = { + "intake": ['M2EFAN V-F'], + "exhaust": [], +} + +psu_display_name = { + "PA3000I-F": ['DLK3000AN12C31', 'CRPS3000CL', 'ECDL3000123'], +} + +psutypedecode = { + 0x00: 'N/A', + 0x01: 'AC', + 0x02: 'DC', +} + +class Unit: + Temperature = "C" + Voltage = "V" + Current = "A" + Power = "W" + Speed = "RPM" + +class threshold: + PSU_TEMP_MIN = -5 * 1000 + PSU_TEMP_MAX = 55 * 1000 + + PSU_FAN_SPEED_MIN = 3500 + PSU_FAN_SPEED_MAX = 32950 + + PSU_OUTPUT_VOLTAGE_MIN = 11 * 1000 + PSU_OUTPUT_VOLTAGE_MAX = 13 * 1000 + + PSU_AC_INPUT_VOLTAGE_MIN = 90 * 1000 + PSU_AC_INPUT_VOLTAGE_MAX = 264 * 1000 + + PSU_DC_INPUT_VOLTAGE_MIN = 180 * 1000 + PSU_DC_INPUT_VOLTAGE_MAX = 320 * 1000 + + ERR_VALUE = -9999999 + + PSU_OUTPUT_POWER_MIN = 0 * 1000 * 1000 + PSU_OUTPUT_POWER_MAX = 3000 * 1000 * 1000 + + PSU_INPUT_POWER_MIN = 0 * 1000 * 1000 + PSU_INPUT_POWER_MAX = 3100 * 1000 * 1000 + + PSU_OUTPUT_CURRENT_MIN = 0 * 1000 + PSU_OUTPUT_CURRENT_MAX = 246 * 1000 + + PSU_INPUT_CURRENT_MIN = 0 * 1000 + PSU_INPUT_CURRENT_MAX = 20 * 1000 + + FRONT_FAN_SPEED_MAX = 11700 + REAR_FAN_SPEED_MAX = 10200 + FAN_SPEED_MIN = 2000 + +devices = { + "onie_e2": [ + { + "name": "ONIE_E2", + "e2loc": {"loc": "/sys/bus/i2c/devices/1-0056/eeprom", "way": "sysfs"}, + "airflow": "intake" + }, + ], + "psus": [ + { + "e2loc": {"loc": "/sys/bus/i2c/devices/11-0050/eeprom", "way": "sysfs"}, + "pmbusloc": {"bus": 11, "addr": 0x58, "way": "i2c"}, + "present": {"loc": "/sys/s3ip/psu/psu1/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "name": "PSU1", + "psu_display_name": psu_display_name, + "psu_display_name": psu_display_name, + "airflow": psu_fan_airflow, + "TempStatus": {"bus": 11, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0004}, + "Temperature": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-11/11-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": threshold.PSU_TEMP_MIN, + "Max": threshold.PSU_TEMP_MAX, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + }, + "FanStatus": {"bus": 11, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0400}, + "FanSpeed": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-11/11-0058/hwmon/hwmon*/fan1_input", "way": "sysfs"}, + "Min": threshold.PSU_FAN_SPEED_MIN, + "Max": threshold.PSU_FAN_SPEED_MAX, + "Unit": Unit.Speed + }, + "psu_fan_tolerance": 40, + "InputsStatus": {"bus": 11, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x2000}, + "InputsType": {"bus": 11, "addr": 0x58, "offset": 0x80, "way": "i2c", 'psutypedecode': psutypedecode}, + "InputsVoltage": { + 'AC': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-11/11-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": threshold.PSU_AC_INPUT_VOLTAGE_MIN, + "Max": threshold.PSU_AC_INPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + + }, + 'DC': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-11/11-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": threshold.PSU_DC_INPUT_VOLTAGE_MIN, + "Max": threshold.PSU_DC_INPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + }, + 'other': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-11/11-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": threshold.ERR_VALUE, + "Max": threshold.ERR_VALUE, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + } + }, + "InputsCurrent": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-11/11-0058/hwmon/hwmon*/curr1_input", "way": "sysfs"}, + "Min": threshold.PSU_INPUT_CURRENT_MIN, + "Max": threshold.PSU_INPUT_CURRENT_MAX, + "Unit": Unit.Current, + "format": "float(float(%s)/1000)" + }, + "InputsPower": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-11/11-0058/hwmon/hwmon*/power1_input", "way": "sysfs"}, + "Min": threshold.PSU_INPUT_POWER_MIN, + "Max": threshold.PSU_INPUT_POWER_MAX, + "Unit": Unit.Power, + "format": "float(float(%s)/1000000)" + }, + "OutputsStatus": {"bus": 11, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x8800}, + "OutputsVoltage": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-11/11-0058/hwmon/hwmon*/in2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_VOLTAGE_MIN, + "Max": threshold.PSU_OUTPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + }, + "OutputsCurrent": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-11/11-0058/hwmon/hwmon*/curr2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_CURRENT_MIN, + "Max": threshold.PSU_OUTPUT_CURRENT_MAX, + "Unit": Unit.Current, + "format": "float(float(%s)/1000)" + }, + "OutputsPower": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-11/11-0058/hwmon/hwmon*/power2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_POWER_MIN, + "Max": threshold.PSU_OUTPUT_POWER_MAX, + "Unit": Unit.Power, + "format": "float(float(%s)/1000000)" + }, + }, + { + "e2loc": {"loc": "/sys/bus/i2c/devices/10-0050/eeprom", "way": "sysfs"}, + "pmbusloc": {"bus": 10, "addr": 0x58, "way": "i2c"}, + "present": {"loc": "/sys/s3ip/psu/psu2/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "name": "PSU2", + "psu_display_name": psu_display_name, + "airflow": psu_fan_airflow, + "TempStatus": {"bus": 10, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0004}, + "Temperature": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-10/10-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": threshold.PSU_TEMP_MIN, + "Max": threshold.PSU_TEMP_MAX, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + }, + "FanStatus": {"bus": 10, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0400}, + "FanSpeed": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-10/10-0058/hwmon/hwmon*/fan1_input", "way": "sysfs"}, + "Min": threshold.PSU_FAN_SPEED_MIN, + "Max": threshold.PSU_FAN_SPEED_MAX, + "Unit": Unit.Speed + }, + "psu_fan_tolerance": 40, + "InputsStatus": {"bus":10, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x2000}, + "InputsType": {"bus": 10, "addr": 0x58, "offset": 0x80, "way": "i2c", 'psutypedecode': psutypedecode}, + "InputsVoltage": { + 'AC': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-10/10-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": threshold.PSU_AC_INPUT_VOLTAGE_MIN, + "Max": threshold.PSU_AC_INPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + + }, + 'DC': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-10/10-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": threshold.PSU_DC_INPUT_VOLTAGE_MIN, + "Max": threshold.PSU_DC_INPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + }, + 'other': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-10/10-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": threshold.ERR_VALUE, + "Max": threshold.ERR_VALUE, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + } + }, + "InputsCurrent": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-10/10-0058/hwmon/hwmon*/curr1_input", "way": "sysfs"}, + "Min": threshold.PSU_INPUT_CURRENT_MIN, + "Max": threshold.PSU_INPUT_CURRENT_MAX, + "Unit": Unit.Current, + "format": "float(float(%s)/1000)" + }, + "InputsPower": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-10/10-0058/hwmon/hwmon*/power1_input", "way": "sysfs"}, + "Min": threshold.PSU_INPUT_POWER_MIN, + "Max": threshold.PSU_INPUT_POWER_MAX, + "Unit": Unit.Power, + "format": "float(float(%s)/1000000)" + }, + "OutputsStatus": {"bus": 10, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x8800}, + "OutputsVoltage": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-10/10-0058/hwmon/hwmon*/in2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_VOLTAGE_MIN, + "Max": threshold.PSU_OUTPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + }, + "OutputsCurrent": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-10/10-0058/hwmon/hwmon*/curr2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_CURRENT_MIN, + "Max": threshold.PSU_OUTPUT_CURRENT_MAX, + "Unit": Unit.Current, + "format": "float(float(%s)/1000)" + }, + "OutputsPower": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-10/10-0058/hwmon/hwmon*/power2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_POWER_MIN, + "Max": threshold.PSU_OUTPUT_POWER_MAX, + "Unit": Unit.Power, + "format": "float(float(%s)/1000000)" + }, + }, + ], + "temps": [ + { + "name": "CPU_TEMP", + "temp_id": "TEMP1", + "api_name": "CPU", + "Temperature": { + "value": {"loc": "/sys/bus/platform/devices/coretemp.0/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": -30000, + "Low": -10000, + "High": 95000, + "Max": 99000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "INLET_TEMP", + "temp_id": "TEMP2", + "api_name": "Inlet", + "Temperature": { + "value": {"loc": "/sys/bus/i2c/devices/35-004d/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": -37000, + "Low": -27000, + "High": 50000, + "Max": 55000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)-1" + } + }, + { + "name": "OUTLET_TEMP", + "temp_id": "TEMP3", + "api_name": "Outlet", + "Temperature": { + "value": [ + {"loc": "/sys/bus/i2c/devices/8-0048/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + {"loc": "/sys/bus/i2c/devices/8-0049/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + {"loc": "/sys/bus/i2c/devices/9-0048/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + {"loc": "/sys/bus/i2c/devices/9-0049/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + ], + "Min": -30000, + "Low": -20000, + "High": 70000, + "Max": 75000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "BOARD_TEMP", + "temp_id": "TEMP4", + "api_name": "Board", + "Temperature": { + "value": {"loc": "/sys/bus/i2c/devices/14-0048/hwmon/*/temp1_input", "way": "sysfs"}, + "Min": -30000, + "Low": -10000, + "High": 70000, + "Max": 75000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "SWITCH_TEMP", + "temp_id": "TEMP5", + "api_name": "ASIC_TEMP", + "Temperature": { + "value": {"loc": "/sys/s3ip/temp_sensor/temp2/value", "way": "sysfs"}, + "Min": -30000, + "Low": -20000, + "High": 100000, + "Max": 105000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + }, + "invalid": -100000, + "error": -99999, + }, + { + "name": "PSU1_TEMP", + "temp_id": "TEMP6", + "Temperature": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-11/11-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": -10000, + "Low": -5000, + "High": 50000, + "Max": 55000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "PSU2_TEMP", + "temp_id": "TEMP7", + "Temperature": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-10/10-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": -10000, + "Low": -5000, + "High": 50000, + "Max": 55000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "OE_TEMP", + "temp_id": "TEMP8", + "api_name": "OE_TEMP", + "Temperature": { + "value": {"loc": "/etc/sonic/highest_oe_temp", "way": "sysfs", "flock_path": "/etc/sonic/highest_oe_temp"}, + "Min": -30000, + "Low": -20000, + "High": 95000, + "Max": 100000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + }, + "invalid": -100000, + "error": -99999, + }, + { + "name": "RLM_TEMP", + "temp_id": "TEMP9", + "api_name": "RLM_TEMP", + "Temperature": { + "value": {"loc": "/etc/sonic/highest_rlm_temp", "way": "sysfs", "flock_path": "/etc/sonic/highest_rlm_temp"}, + "Min": -40000, + "Low": -30000, + "High": 50000, + "Max": 55000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + }, + "invalid": -100000, + "error": -99999, + }, + { + "name": "MOS_TEMP", + "temp_id": "TEMP10", + "api_name": "MOSFET_TEMP", + "Temperature": { + "value": {"loc": "/sys/bus/i2c/devices/64-0040/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": -30000, + "Low": -20000, + "High": 110000, + "Max": 125000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "Tout-Tin", + "Temperature": { + "value": { + "val_conf_list": [ + {"loc": "/sys/bus/i2c/devices/8-0048/hwmon/hwmon*/temp1_input", "way": "sysfs", "fail_val":-99999000}, + {"loc": "/sys/bus/i2c/devices/8-0049/hwmon/hwmon*/temp1_input", "way": "sysfs", "fail_val":-99999000}, + {"loc": "/sys/bus/i2c/devices/9-0048/hwmon/hwmon*/temp1_input", "way": "sysfs", "fail_val":-99999000}, + {"loc": "/sys/bus/i2c/devices/9-0049/hwmon/hwmon*/temp1_input", "way": "sysfs", "fail_val":-99999000}, + {"loc": "/sys/bus/i2c/devices/35-004d/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + ], + "fail_conf_set_list": [ + {0,1,2,3}, + ], + "format": "float(float(max(%s,%s,%s,%s)-float(%s))/1000)+3" + }, + #"Min": -10000, + #"Low": 0, + "High": 15000, + "Max": 20000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + ], + "leds": [ + { + "name": "FRONT_SYS_LED", + "led_type": "SYS_LED", + "led": {"loc": "/dev/cpld1", "offset": 0x50, "len": 1, "way": "devfile"}, + "led_attrs": { + "off": 0x00, "green": 0x02, "amber": 0x06, "red": 0x06, "mask": 0x07, + "flash": 0x01, "amber_flash": 0x05, + }, + "led_map": { + 0x00: "off", 0x02: "blue", 0x06: "amber", 0x01: "blue/amber alternate flashing", + 0x05: "amber flashing" + } + }, + { + "name": "FRONT_PSU_LED", + "led_type": "PSU_LED", + "led": {"loc": "/dev/cpld1", "offset": 0x51, "len": 1, "way": "devfile"}, + "led_attrs": { + "off": 0x00, "green": 0x02, "amber": 0x06, "red": 0x06, "mask": 0x07 + }, + "led_map": { + 0x00: "off", 0x02: "blue", 0x06: "amber" + } + }, + { + "name": "FRONT_SMB_LED", + "led_type": "SMB_LED", + + "led": {"loc": "/dev/cpld1", "offset": 0x52, "len": 1, "way": "devfile"}, + "led_attrs": { + "off": 0x00, "green": 0x02, "amber": 0x06, "red": 0x06, "mask": 0x07 + }, + "led_map": { + 0x00: "off", 0x02: "blue", 0x06: "amber" + } + }, + { + "name": "FRONT_FAN_LED", + "led_type": "FAN_LED", + "led": {"loc": "/dev/cpld1", "offset": 0x53, "len": 1, "way": "devfile"}, + "led_attrs": { + "off": 0x00, "green": 0x02, "amber": 0x06, "red": 0x06, "mask": 0x07 + }, + "led_map": { + 0x00: "off", 0x02: "blue", 0x06: "amber" + } + }, + ], + "fans": [ + { + "name": "FAN7", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-43/43-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "e2_type": ["wedge_v5", "fru"], + "present": {"loc": "/sys/s3ip/fan/fan7/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"bus": 44, "addr": 0x0d, "offset": 0x60, "way": "i2c"}, + "led_attrs": { + "off": 0x00, "green": 0x06, "amber": 0x01, "red": 0x01, "mask": 0x07 + }, + "led_map": { + 0x00: "off", 0x06: "blue", 0x01: "amber" + }, + "PowerMax": 80.64, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"bus": 44, "addr": 0x0d, "offset": 0x90, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan7/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan7/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan7/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"bus": 44, "addr": 0x0d, "offset": 0x90, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan7/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan7/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan7/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN5", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-42/42-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "e2_type": ["wedge_v5", "fru"], + "present": {"loc": "/sys/s3ip/fan/fan5/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"bus": 44, "addr": 0x0d, "offset": 0x61, "way": "i2c"}, + "led_attrs": { + "off": 0x00, "green": 0x06, "amber": 0x01, "red": 0x01, "mask": 0x07 + }, + "led_map": { + 0x00: "off", 0x06: "blue", 0x01: "amber" + }, + "PowerMax": 80.64, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"bus": 44, "addr": 0x0d, "offset": 0x91, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan5/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan5/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan5/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"bus": 44, "addr": 0x0d, "offset": 0x91, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan5/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan5/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan5/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN3", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-41/41-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "e2_type": ["wedge_v5", "fru"], + "present": {"loc": "/sys/s3ip/fan/fan3/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"bus": 44, "addr": 0x0d, "offset": 0x62, "way": "i2c"}, + "led_attrs": { + "off": 0x00, "green": 0x06, "amber": 0x01, "red": 0x01, "mask": 0x07 + }, + "led_map": { + 0x00: "off", 0x06: "blue", 0x01: "amber" + }, + "PowerMax": 80.64, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"bus": 44, "addr": 0x0d, "offset": 0x92, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan3/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan3/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan3/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"bus": 44, "addr": 0x0d, "offset": 0x92, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan3/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan3/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan3/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN1", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-40/40-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "e2_type": ["wedge_v5", "fru"], + "present": {"loc": "/sys/s3ip/fan/fan1/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"bus": 44, "addr": 0x0d, "offset": 0x63, "way": "i2c"}, + "led_attrs": { + "off": 0x00, "green": 0x06, "amber": 0x01, "red": 0x01, "mask": 0x07 + }, + "led_map": { + 0x00: "off", 0x06: "blue", 0x01: "amber" + }, + "PowerMax": 80.64, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"bus": 44, "addr": 0x0d, "offset": 0x93, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan1/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan1/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan1/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"bus": 44, "addr": 0x0d, "offset": 0x93, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan1/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan1/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan1/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN8", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-51/51-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "e2_type": ["wedge_v5", "fru"], + "present": {"loc": "/sys/s3ip/fan/fan8/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"bus": 52, "addr": 0x0d, "offset": 0x60, "way": "i2c"}, + "led_attrs": { + "off": 0x00, "green": 0x06, "amber": 0x01, "red": 0x01, "mask": 0x07 + }, + "led_map": { + 0x00: "off", 0x06: "blue", 0x01: "amber" + }, + "PowerMax": 80.64, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"bus": 52, "addr": 0x0d, "offset": 0x90, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan8/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan8/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan8/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"bus": 52, "addr": 0x0d, "offset": 0x90, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan8/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan8/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan8/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN6", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-50/50-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "e2_type": ["wedge_v5", "fru"], + "present": {"loc": "/sys/s3ip/fan/fan6/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"bus": 52, "addr": 0x0d, "offset": 0x61, "way": "i2c"}, + "led_attrs": { + "off": 0x00, "green": 0x06, "amber": 0x01, "red": 0x01, "mask": 0x07 + }, + "led_map": { + 0x00: "off", 0x06: "blue", 0x01: "amber" + }, + "PowerMax": 80.64, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"bus": 52, "addr": 0x0d, "offset": 0x91, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan6/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan6/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan6/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"bus": 52, "addr": 0x0d, "offset": 0x91, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan6/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan6/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan6/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN4", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-49/49-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "e2_type": ["wedge_v5", "fru"], + "present": {"loc": "/sys/s3ip/fan/fan4/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"bus": 52, "addr": 0x0d, "offset": 0x62, "way": "i2c"}, + "led_attrs": { + "off": 0x00, "green": 0x06, "amber": 0x01, "red": 0x01, "mask": 0x07 + }, + "led_map": { + 0x00: "off", 0x06: "blue", 0x01: "amber" + }, + "PowerMax": 80.64, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"bus": 52, "addr": 0x0d, "offset": 0x92, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan4/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan4/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan4/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"bus": 52, "addr": 0x0d, "offset": 0x92, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan4/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan4/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan4/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN2", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-48/48-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "e2_type": ["wedge_v5", "fru"], + "present": {"loc": "/sys/s3ip/fan/fan2/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"bus": 52, "addr": 0x0d, "offset": 0x63, "way": "i2c"}, + "led_attrs": { + "off": 0x00, "green": 0x06, "amber": 0x01, "red": 0x01, "mask": 0x07 + }, + "led_map": { + 0x00: "off", 0x06: "blue", 0x01: "amber" + }, + "PowerMax": 80.64, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"bus": 52, "addr": 0x0d, "offset": 0x93, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan2/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan2/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan2/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"bus": 52, "addr": 0x0d, "offset": 0x93, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan2/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan2/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan2/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + ], + "cplds": [ + { + "name": "CPU CPLD", + "cpld_id": "CPLD1", + "VersionFile": {"loc": "/dev/cpld0", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for system power", + "slot": 0, + "warm": 0, + }, + { + "name": "SCM CPLD", + "cpld_id": "CPLD2", + "VersionFile": {"loc": "/dev/cpld1", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for base functions", + "slot": 0, + "warm": 0, + }, + { + "name": "MCB CPLD", + "cpld_id": "CPLD3", + "VersionFile": {"loc": "/dev/cpld3", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for base functions", + "slot": 0, + "warm": 0, + }, + { + "name": "SMB CPLD", + "cpld_id": "CPLD4", + "VersionFile": {"loc": "/dev/cpld4", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for sff modules", + "slot": 0, + "warm": 0, + }, + { + "name": "FCB_T CPLD", + "cpld_id": "CPLD5", + "VersionFile": {"loc": "/dev/cpld5", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for fan modules", + "slot": 0, + "warm": 0, + }, + { + "name": "FCB_B CPLD", + "cpld_id": "CPLD6", + "VersionFile": {"loc": "/dev/cpld6", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for fan modules", + "slot": 0, + "warm": 0, + }, + { + "name": "IOB FPGA", + "cpld_id": "CPLD7", + "VersionFile": {"loc": "/dev/fpga0", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for base functions", + "slot": 0, + "format": "little_endian", + "warm": 0, + }, + { + "name": "DOM FPGA", + "cpld_id": "CPLD8", + "VersionFile": {"loc": "/dev/fpga1", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for sff functions", + "slot": 0, + "format": "little_endian", + "warm": 0, + }, + { + "name": "BIOS", + "cpld_id": "CPLD9", + "VersionFile": {"cmd": "dmidecode -s bios-version", "way": "cmd"}, + "desc": "Performs initialization of hardware components during booting", + "slot": 0, + "type": "str", + "warm": 0, + }, + ], + "dcdc": [ + { + "name": "SCM_53134O_V1.0_V", + "dcdc_id": "DCDC1", + "Min": 900, + "value": { + "loc": "/sys/bus/i2c/devices/33-0040/hwmon/hwmon*/in1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 1100, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SCM_I210_V3.3_V", + "dcdc_id": "DCDC2", + "Min": 2970, + "value": { + "loc": "/sys/bus/i2c/devices/33-0040/hwmon/hwmon*/in2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 3630, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SCM_VDD3.3_V", + "dcdc_id": "DCDC3", + "Min": 2970, + "value": { + "loc": "/sys/bus/i2c/devices/33-0040/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 3630, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SCM_VDD12.0_V", + "dcdc_id": "DCDC4", + "Min": 10800, + "value": { + "loc": "/sys/bus/i2c/devices/33-0041/hwmon/hwmon*/in1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 13200, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SCM_OCM_V12.0_V", + "dcdc_id": "DCDC5", + "Min": 10800, + "value": { + "loc": "/sys/bus/i2c/devices/33-0041/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 13200, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SCM_SSD_V3.3_V", + "dcdc_id": "DCDC6", + "Min": 2970, + "value": { + "loc": "/sys/bus/i2c/devices/33-0042/hwmon/hwmon*/in1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 3630, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SCM_BMC_V3.3_V", + "dcdc_id": "DCDC7", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/33-0042/hwmon/hwmon*/in2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 3630, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SCM_VDD5.0_V", + "dcdc_id": "DCDC8", + "Min": 4500, + "value": { + "loc": "/sys/bus/i2c/devices/33-0042/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 5500, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MAC_CORE_V", + "dcdc_id": "DCDC9", + "Min": 630, + "value": { + "loc": "/sys/bus/i2c/devices/64-0040/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 858, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MAC_ANALOG0 V0.9_V", + "dcdc_id": "DCDC10", + "Min": 810, + "value": { + "loc": "/sys/bus/i2c/devices/65-0040/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 990, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MAC_ANALOG0 V0.75_V", + "dcdc_id": "DCDC11", + "Min": 675, + "value": { + "loc": "/sys/bus/i2c/devices/65-0040/hwmon/hwmon*/in4_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 825, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MAC_ANALOG1 V0.9_V", + "dcdc_id": "DCDC12", + "Min": 810, + "value": { + "loc": "/sys/bus/i2c/devices/66-0040/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 990, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MAC_ANALOG1 V0.75_V", + "dcdc_id": "DCDC13", + "Min": 675, + "value": { + "loc": "/sys/bus/i2c/devices/66-0040/hwmon/hwmon*/in4_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 825, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MAC_PLL0_VDD0.9_V", + "dcdc_id": "DCDC14", + "Min": 810, + "value": { + "loc": "/sys/bus/i2c/devices/56-0040/hwmon/hwmon*/in1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 990, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MAC_PLL1_VDD0.9_V", + "dcdc_id": "DCDC15", + "Min": 810, + "value": { + "loc": "/sys/bus/i2c/devices/56-0040/hwmon/hwmon*/in2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 990, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MAC_PLL2_VDD0.9_V", + "dcdc_id": "DCDC16", + "Min": 810, + "value": { + "loc": "/sys/bus/i2c/devices/61-0040/hwmon/hwmon*/in2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 990, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MAC_PLL3_VDD0.9_V", + "dcdc_id": "DCDC17", + "Min": 810, + "value": { + "loc": "/sys/bus/i2c/devices/61-0040/hwmon/hwmon*/in1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 990, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MAC_VDD_0.8_V", + "dcdc_id": "DCDC18", + "Min": 720, + "value": { + "loc": "/sys/bus/i2c/devices/58-0040/hwmon/hwmon*/in2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 880, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MAC_VDD_1.8_V", + "dcdc_id": "DCDC19", + "Min": 1620, + "value": { + "loc": "/sys/bus/i2c/devices/60-0040/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 1980, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MAC_VDD_1.5_V", + "dcdc_id": "DCDC20", + "Min": 1350, + "value": { + "loc": "/sys/bus/i2c/devices/58-0040/hwmon/hwmon*/in1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 1650, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MAC_VDD_1.2_V", + "dcdc_id": "DCDC21", + "Min": 1080, + "value": { + "loc": "/sys/bus/i2c/devices/58-0040/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 1320, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OE0_AVDD_RX_1.8_V", + "dcdc_id": "DCDC22", + "Min": 1620, + "value": { + "loc": "/sys/bus/i2c/devices/67-0070/hwmon/hwmon*/loopa_vout", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 1935, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OE0_AVDD_RX_1.2_V", + "dcdc_id": "DCDC23", + "Min": 1080, + "value": { + "loc": "/sys/bus/i2c/devices/67-0070/hwmon/hwmon*/loopb_vout", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 1260, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OE0_AVDD_TX_1.8_V", + "dcdc_id": "DCDC24", + "Min": 1620, + "value": { + "loc": "/sys/bus/i2c/devices/67-0068/hwmon/hwmon*/loopa_vout", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 1935, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OE0_AVDD_TX_1.2_V", + "dcdc_id": "DCDC25", + "Min": 1080, + "value": { + "loc": "/sys/bus/i2c/devices/67-0068/hwmon/hwmon*/loopb_vout", + "way": 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"loc": "/sys/bus/i2c/devices/68-0068/hwmon/hwmon*/loopa_vout", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 1935, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OE1_AVDD_TX_1.2_V", + "dcdc_id": "DCDC30", + "Min": 1080, + "value": { + "loc": "/sys/bus/i2c/devices/68-0068/hwmon/hwmon*/loopb_vout", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 1260, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OE1_AVDD_TRX_0.75_V", + "dcdc_id": "DCDC31", + "Min": 630, + "value": { + "loc": "/sys/bus/i2c/devices/68-0060/hwmon/hwmon*/loopa_vout", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 788, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OE2_AVDD_RX_1.8_V", + "dcdc_id": "DCDC32", + "Min": 1620, + "value": { + "loc": "/sys/bus/i2c/devices/68-006e/hwmon/hwmon*/loopa_vout", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 1935, + "format": "float(float(%s)/1000)", + }, + + { + "name": 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"Max": 788, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OE3_AVDD_RX_1.8_V", + "dcdc_id": "DCDC37", + "Min": 1620, + "value": { + "loc": "/sys/bus/i2c/devices/69-0070/hwmon/hwmon*/loopa_vout", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 1935, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OE3_AVDD_RX_1.2_V", + "dcdc_id": "DCDC38", + "Min": 1080, + "value": { + "loc": "/sys/bus/i2c/devices/69-0070/hwmon/hwmon*/loopb_vout", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 1260, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OE3_AVDD_TX_1.8_V", + "dcdc_id": "DCDC39", + "Min": 1620, + "value": { + "loc": "/sys/bus/i2c/devices/69-0068/hwmon/hwmon*/loopa_vout", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 1935, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OE3_AVDD_TX_1.2_V", + "dcdc_id": "DCDC40", + "Min": 1080, + "value": { + "loc": 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"Max": 1935, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OE5_AVDD_RX_1.2_V", + "dcdc_id": "DCDC48", + "Min": 1080, + "value": { + "loc": "/sys/bus/i2c/devices/70-0070/hwmon/hwmon*/loopb_vout", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 1260, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OE5_AVDD_TX_1.8_V", + "dcdc_id": "DCDC49", + "Min": 1620, + "value": { + "loc": "/sys/bus/i2c/devices/70-0068/hwmon/hwmon*/loopa_vout", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 1935, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OE5_AVDD_TX_1.2_V", + "dcdc_id": "DCDC50", + "Min": 1080, + "value": { + "loc": "/sys/bus/i2c/devices/70-0068/hwmon/hwmon*/loopb_vout", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 1260, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OE5_AVDD_TRX_0.75_V", + "dcdc_id": "DCDC51", + "Min": 630, + "value": { + "loc": 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"/sys/bus/i2c/devices/70-0066/hwmon/hwmon*/loopa_iout", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 10000, + "format": "float(float(%s)/1000)", + }, + + + { + "name": "OE6_AVDD_TX_1.2_C", + "dcdc_id": "DCDC167", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/70-0066/hwmon/hwmon*/loopb_iout", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 9000, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OE6_AVDD_TRX_0.75_C", + "dcdc_id": "DCDC168", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/70-005e/hwmon/hwmon*/loopa_iout", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 9500, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OE7_AVDD_RX_1.8_C", + "dcdc_id": "DCDC169", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/67-006e/hwmon/hwmon*/loopa_iout", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 2000, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OE7_AVDD_RX_1.2_C", + "dcdc_id": "DCDC170", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/67-006e/hwmon/hwmon*/loopb_iout", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 5100, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OE7_AVDD_TX_1.8_C", + "dcdc_id": "DCDC171", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/67-0066/hwmon/hwmon*/loopa_iout", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 10000, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OE7_AVDD_TX_1.2_C", + "dcdc_id": "DCDC172", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/67-0066/hwmon/hwmon*/loopb_iout", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 9000, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OE7_AVDD_TRX_0.75_C", + "dcdc_id": "DCDC173", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/67-005e/hwmon/hwmon*/loopa_iout", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 9500, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OE_HCSL_PLL_VDD2.5_C", + "dcdc_id": "DCDC174", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/59-0040/hwmon/hwmon*/curr2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 2000, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OE_VDD_1.8_C", + "dcdc_id": "DCDC175", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/59-0040/hwmon/hwmon*/curr3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 550, + "format": "float(float(%s)/1000)", + }, + + { + "name": "RLML_VDD V3.3_C", + "dcdc_id": "DCDC176", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/71-0068/hwmon/hwmon*/loopa_iout", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 30000, + "format": "float(float(%s)/1000)", + }, + + { + "name": "RLMH_VDD V3.3_C", + "dcdc_id": "DCDC177", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/71-0068/hwmon/hwmon*/loopb_iout", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 30000, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SMB_CLK_VDD3.3_C", + "dcdc_id": "DCDC178", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/59-0040/hwmon/hwmon*/curr1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 1100, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SMB_CLK2_VDD1.8_C", + "dcdc_id": "DCDC179", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/56-0041/hwmon/hwmon*/curr3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 1100, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SMB_CLK_VDD1.8_C", + "dcdc_id": "DCDC180", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/56-0041/hwmon/hwmon*/curr2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 1100, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SMB_FPGA_VDD1.8_C", + "dcdc_id": "DCDC181", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/62-0040/hwmon/hwmon*/curr3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 550, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SMB_VDD_5.0_C", + "dcdc_id": "DCDC182", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/60-0040/hwmon/hwmon*/curr2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 3300, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SMB_FPGA_V1.0_C", + "dcdc_id": "DCDC183", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/62-0040/hwmon/hwmon*/curr2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 1188, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SMB_FPGA_V1.2_C", + "dcdc_id": "DCDC184", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/57-0040/hwmon/hwmon*/curr1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 550, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SMB_VDD_3.3_C", + "dcdc_id": "DCDC185", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/63-0040/hwmon/hwmon*/curr1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 1550, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SMB_CPLD_VDD_1.8_C", + "dcdc_id": "DCDC186", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/63-0040/hwmon/hwmon*/curr2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 330, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MCB_FPGA_VDD1.0_C", + "dcdc_id": "DCDC187", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/12-0040/hwmon/hwmon*/curr1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 1188, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MCB_FPGA_VDD1.8_C", + "dcdc_id": "DCDC188", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/12-0040/hwmon/hwmon*/curr2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 550, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MCB_FPGA_VDD1.2_C", + "dcdc_id": "DCDC189", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/12-0040/hwmon/hwmon*/curr3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 550, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MCB_CPLD_VDD3.3_C", + "dcdc_id": "DCDC190", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/12-0041/hwmon/hwmon*/curr1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 550, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MCB_VDD3.3_C", + "dcdc_id": "DCDC191", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/12-0041/hwmon/hwmon*/curr2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 550, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MCB_FPGA_VDD3.3_C", + "dcdc_id": "DCDC192", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/12-0041/hwmon/hwmon*/curr3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 550, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OCM_XDPE_VCCIN_C", + "dcdc_id": "DCDC193", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/5-0070/hwmon/hwmon*/loopa_iout", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 147000, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OCM_XDPE_P1V8_C", + "dcdc_id": "DCDC194", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/5-0070/hwmon/hwmon*/loopb_iout", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 2300, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OCM_XDPE_P1V05_C", + "dcdc_id": "DCDC195", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/5-006e/hwmon/hwmon*/loopa_iout", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 14300, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OCM_XDPE_VNN_PCH_C", + "dcdc_id": "DCDC196", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/5-006e/hwmon/hwmon*/loopb_iout", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 7400, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OCM_XDPE_VNN_NAC_C", + "dcdc_id": "DCDC197", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/5-0068/hwmon/hwmon*/loopa_iout", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 22000, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OCM_XDPE_VCC_ANA_C", + "dcdc_id": "DCDC198", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/5-0068/hwmon/hwmon*/loopb_iout", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 2210, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OCM_XDPE_P1V2_VDDQ_C", + "dcdc_id": "DCDC199", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/5-005e/hwmon/hwmon*/loopa_iout", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 19000, + "format": "float(float(%s)/1000)", + }, + + { + "name": "FAN1_VDD12_C", + "dcdc_id": "DCDC200", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/88-0042/hwmon/hwmon*/curr1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 10000, + "format": "float(float(%s)/1000)", + }, + + { + "name": "FAN2_VDD12_C", + "dcdc_id": "DCDC201", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/89-0042/hwmon/hwmon*/curr2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 10000, + "format": "float(float(%s)/1000)", + }, + + { + "name": "FAN3_VDD12_C", + "dcdc_id": "DCDC202", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/88-0042/hwmon/hwmon*/curr2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 10000, + "format": "float(float(%s)/1000)", + }, + + { + "name": "FAN4_VDD12_C", + "dcdc_id": "DCDC203", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/89-0042/hwmon/hwmon*/curr3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 10000, + "format": "float(float(%s)/1000)", + }, + + { + "name": "FAN5_VDD12_C", + "dcdc_id": "DCDC204", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/88-0042/hwmon/hwmon*/curr3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 10000, + "format": "float(float(%s)/1000)", + }, + + { + "name": "FAN6_VDD12_C", + "dcdc_id": "DCDC205", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/90-0042/hwmon/hwmon*/curr1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 10000, + "format": "float(float(%s)/1000)", + }, + + { + "name": "FAN7_VDD12_C", + "dcdc_id": "DCDC206", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/89-0042/hwmon/hwmon*/curr1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 10000, + "format": "float(float(%s)/1000)", + }, + + { + "name": "FAN8_VDD12_C", + "dcdc_id": "DCDC207", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/90-0042/hwmon/hwmon*/curr2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 10000, + "format": "float(float(%s)/1000)", + }, + ], + "cpu": [ + { + "name": "cpu", + "reboot_cause_path": "/etc/sonic/.reboot/.previous-reboot-cause.txt" + } + ], + "sfps": { + "ver": '3.0', + "port_index_start": 1, + "port_num": 128, + "log_level": 2, + "eeprom_retry_times": 5, + "eeprom_retry_break_sec": 0.2, + "presence_val_is_present": 0, + "eeprom_path": "/sys/bus/i2c/devices/i2c-%d/%d-0050/eeprom", + "eeprom_path_key": [24] * 16 + [25] * 16 + [26] * 16 + [27] * 16 + [28] * 16 + [29] * 16 + [30] * 16 + [31] * 16 + } +} diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/hal-config/x86_64_micas_m2_w6940_128x1_fr4_r0_0x40d9_v01_ac_device.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/hal-config/x86_64_micas_m2_w6940_128x1_fr4_r0_0x40d9_v01_ac_device.py new file mode 100755 index 00000000000..f503ec9166c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/hal-config/x86_64_micas_m2_w6940_128x1_fr4_r0_0x40d9_v01_ac_device.py @@ -0,0 +1,3960 @@ +#!/usr/bin/python3 + +# CPO 100 board modified configuration, support 2 AC PSUS + +psu_fan_airflow = { + "intake": ['DLK3000AN12C31', 'CRPS3000CL', 'ECDL3000123', 'ECD26020050'], + "exhaust": [] +} + +fanairflow = { + "intake": ['M2EFAN V-F'], + "exhaust": [], +} + +psu_display_name = { + "PA3000I-F": ['DLK3000AN12C31', 'CRPS3000CL', 'ECDL3000123'], + "PD3000I-F": ['ECD26020050'] +} + +psutypedecode = { + 0x00: 'N/A', + 0x01: 'AC', + 0x02: 'DC', +} + +class Unit: + Temperature = "C" + Voltage = "V" + Current = "A" + Power = "W" + Speed = "RPM" + +class threshold: + PSU_TEMP_MIN = -5 * 1000 + PSU_TEMP_MAX = 55 * 1000 + + PSU_FAN_SPEED_MIN = 3500 + PSU_FAN_SPEED_MAX = 32950 + + PSU_OUTPUT_VOLTAGE_MIN = 11 * 1000 + PSU_OUTPUT_VOLTAGE_MAX = 13 * 1000 + + PSU_AC_INPUT_VOLTAGE_MIN = 90 * 1000 + PSU_AC_INPUT_VOLTAGE_MAX = 264 * 1000 + + PSU_DC_INPUT_VOLTAGE_MIN = 180 * 1000 + PSU_DC_INPUT_VOLTAGE_MAX = 320 * 1000 + + PSU_DC_INPUT_VOLTAGE_MIN_2 = 45 * 1000 + PSU_DC_INPUT_VOLTAGE_MAX_2 = 53 * 1000 + + ERR_VALUE = -9999999 + + PSU_OUTPUT_POWER_MIN = 0 * 1000 * 1000 + PSU_OUTPUT_POWER_MAX = 3000 * 1000 * 1000 + + PSU_INPUT_POWER_MIN = 0 * 1000 * 1000 + PSU_INPUT_POWER_MAX = 3100 * 1000 * 1000 + + PSU_OUTPUT_CURRENT_MIN = 0 * 1000 + PSU_OUTPUT_CURRENT_MAX = 246 * 1000 + + PSU_DC_OUTPUT_CURRENT_MAX = 250 * 1000 + + PSU_INPUT_CURRENT_MIN = 0 * 1000 + PSU_INPUT_CURRENT_MAX = 20 * 1000 + + PSU_DC_INPUT_CURRENT_MAX = 80 * 1000 + + FRONT_FAN_SPEED_MAX = 11700 + REAR_FAN_SPEED_MAX = 10200 + FAN_SPEED_MIN = 2000 + +devices = { + "onie_e2": [ + { + "name": "ONIE_E2", + "e2loc": {"loc": "/sys/bus/i2c/devices/1-0056/eeprom", "way": "sysfs"}, + "airflow": "intake" + }, + ], + "psus": [ + { + "e2loc": {"loc": "/sys/bus/i2c/devices/11-0050/eeprom", "way": "sysfs"}, + "e2_type": ["wedge_v5", "fru"], + "pmbusloc": {"bus": 11, "addr": 0x58, "way": "i2c"}, + "present": {"loc": "/sys/s3ip/psu/psu1/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "name": "PSU1", + "psu_display_name": psu_display_name, + "psu_display_name": psu_display_name, + "airflow": psu_fan_airflow, + "TempStatus": {"bus": 11, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0004}, + "Temperature": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-11/11-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": threshold.PSU_TEMP_MIN, + "Max": threshold.PSU_TEMP_MAX, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + }, + "FanStatus": {"bus": 11, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0400}, + "FanSpeed": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-11/11-0058/hwmon/hwmon*/fan1_input", "way": "sysfs"}, + "Min": threshold.PSU_FAN_SPEED_MIN, + "Max": threshold.PSU_FAN_SPEED_MAX, + "Unit": Unit.Speed + }, + "psu_fan_tolerance": 40, + "InputsStatus": {"bus": 11, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x2000}, + "InputsType": {"bus": 11, "addr": 0x58, "offset": 0x80, "way": "i2c", 'psutypedecode': psutypedecode}, + "InputsVoltage": { + 'AC': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-11/11-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": threshold.PSU_AC_INPUT_VOLTAGE_MIN, + "Max": threshold.PSU_AC_INPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + + }, + 'DC': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-11/11-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": { + "other": threshold.PSU_DC_INPUT_VOLTAGE_MIN, + "ECD26020050": threshold.PSU_DC_INPUT_VOLTAGE_MIN_2, + }, + "Max": { + "other": threshold.PSU_DC_INPUT_VOLTAGE_MAX, + "ECD26020050": threshold.PSU_DC_INPUT_VOLTAGE_MAX_2, + }, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + }, + 'other': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-11/11-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": threshold.ERR_VALUE, + "Max": threshold.ERR_VALUE, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + } + }, + "InputsCurrent": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-11/11-0058/hwmon/hwmon*/curr1_input", "way": "sysfs"}, + "Min": threshold.PSU_INPUT_CURRENT_MIN, + "Max": { + "other":threshold.PSU_INPUT_CURRENT_MAX, + "ECD26020050":threshold.PSU_DC_INPUT_CURRENT_MAX, + }, + "Unit": Unit.Current, + "format": "float(float(%s)/1000)" + }, + "InputsPower": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-11/11-0058/hwmon/hwmon*/power1_input", "way": "sysfs"}, + "Min": threshold.PSU_INPUT_POWER_MIN, + "Max": threshold.PSU_INPUT_POWER_MAX, + "Unit": Unit.Power, + "format": "float(float(%s)/1000000)" + }, + "OutputsStatus": {"bus": 11, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x8800}, + "OutputsVoltage": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-11/11-0058/hwmon/hwmon*/in2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_VOLTAGE_MIN, + "Max": threshold.PSU_OUTPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + }, + "OutputsCurrent": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-11/11-0058/hwmon/hwmon*/curr2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_CURRENT_MIN, + "Max": { + "other":threshold.PSU_OUTPUT_CURRENT_MAX, + "ECD26020050":threshold.PSU_DC_OUTPUT_CURRENT_MAX, + }, + "Unit": Unit.Current, + "format": "float(float(%s)/1000)" + }, + "OutputsPower": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-11/11-0058/hwmon/hwmon*/power2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_POWER_MIN, + "Max": threshold.PSU_OUTPUT_POWER_MAX, + "Unit": Unit.Power, + "format": "float(float(%s)/1000000)" + }, + }, + { + "e2loc": {"loc": "/sys/bus/i2c/devices/10-0050/eeprom", "way": "sysfs"}, + "e2_type": ["wedge_v5", "fru"], + "pmbusloc": {"bus": 10, "addr": 0x58, "way": "i2c"}, + "present": {"loc": "/sys/s3ip/psu/psu2/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "name": "PSU2", + "psu_display_name": psu_display_name, + "airflow": psu_fan_airflow, + "TempStatus": {"bus": 10, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0004}, + "Temperature": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-10/10-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": threshold.PSU_TEMP_MIN, + "Max": threshold.PSU_TEMP_MAX, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + }, + "FanStatus": {"bus": 10, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0400}, + "FanSpeed": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-10/10-0058/hwmon/hwmon*/fan1_input", "way": "sysfs"}, + "Min": threshold.PSU_FAN_SPEED_MIN, + "Max": threshold.PSU_FAN_SPEED_MAX, + "Unit": Unit.Speed + }, + "psu_fan_tolerance": 40, + "InputsStatus": {"bus":10, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x2000}, + "InputsType": {"bus": 10, "addr": 0x58, "offset": 0x80, "way": "i2c", 'psutypedecode': psutypedecode}, + "InputsVoltage": { + 'AC': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-10/10-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": threshold.PSU_AC_INPUT_VOLTAGE_MIN, + "Max": threshold.PSU_AC_INPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + + }, + 'DC': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-10/10-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": { + "other": threshold.PSU_DC_INPUT_VOLTAGE_MIN, + "ECD26020050": threshold.PSU_DC_INPUT_VOLTAGE_MIN_2, + }, + "Max": { + "other": threshold.PSU_DC_INPUT_VOLTAGE_MAX, + "ECD26020050": threshold.PSU_DC_INPUT_VOLTAGE_MAX_2, + }, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + }, + 'other': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-10/10-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": threshold.ERR_VALUE, + "Max": threshold.ERR_VALUE, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + } + }, + "InputsCurrent": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-10/10-0058/hwmon/hwmon*/curr1_input", "way": "sysfs"}, + "Min": threshold.PSU_INPUT_CURRENT_MIN, + "Max": { + "other":threshold.PSU_INPUT_CURRENT_MAX, + "ECD26020050":threshold.PSU_DC_INPUT_CURRENT_MAX, + }, + "Unit": Unit.Current, + "format": "float(float(%s)/1000)" + }, + "InputsPower": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-10/10-0058/hwmon/hwmon*/power1_input", "way": "sysfs"}, + "Min": threshold.PSU_INPUT_POWER_MIN, + "Max": threshold.PSU_INPUT_POWER_MAX, + "Unit": Unit.Power, + "format": "float(float(%s)/1000000)" + }, + "OutputsStatus": {"bus": 10, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x8800}, + "OutputsVoltage": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-10/10-0058/hwmon/hwmon*/in2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_VOLTAGE_MIN, + "Max": threshold.PSU_OUTPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + }, + "OutputsCurrent": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-10/10-0058/hwmon/hwmon*/curr2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_CURRENT_MIN, + "Max": { + "other":threshold.PSU_OUTPUT_CURRENT_MAX, + "ECD26020050":threshold.PSU_DC_OUTPUT_CURRENT_MAX, + }, + "Unit": Unit.Current, + "format": "float(float(%s)/1000)" + }, + "OutputsPower": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-10/10-0058/hwmon/hwmon*/power2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_POWER_MIN, + "Max": threshold.PSU_OUTPUT_POWER_MAX, + "Unit": Unit.Power, + "format": "float(float(%s)/1000000)" + }, + }, + ], + "temps": [ + { + "name": "CPU_TEMP", + "temp_id": "TEMP1", + "api_name": "CPU", + "Temperature": { + "value": {"loc": "/sys/bus/platform/devices/coretemp.0/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": -30000, + "Low": -10000, + "High": 95000, + "Max": 99000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "INLET_TEMP", + "temp_id": "TEMP2", + "api_name": "Inlet", + "Temperature": { + "value": {"loc": "/sys/bus/i2c/devices/35-004d/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": -37000, + "Low": -27000, + "High": 50000, + "Max": 55000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)-1" + } + }, + { + "name": "OUTLET_TEMP", + "temp_id": "TEMP3", + "api_name": "Outlet", + "Temperature": { + "value": [ + {"loc": "/sys/bus/i2c/devices/8-0048/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + {"loc": "/sys/bus/i2c/devices/8-0049/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + {"loc": "/sys/bus/i2c/devices/9-0048/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + {"loc": "/sys/bus/i2c/devices/9-0049/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + ], + "Min": -30000, + "Low": -20000, + "High": 70000, + "Max": 75000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "BOARD_TEMP", + "temp_id": "TEMP4", + "api_name": "Board", + "Temperature": { + "value": {"loc": "/sys/bus/i2c/devices/14-0048/hwmon/*/temp1_input", "way": "sysfs"}, + "Min": -30000, + "Low": -10000, + "High": 70000, + "Max": 75000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "SWITCH_TEMP", + "temp_id": "TEMP5", + "api_name": "ASIC_TEMP", + "Temperature": { + "value": {"loc": "/sys/s3ip/temp_sensor/temp2/value", "way": "sysfs"}, + "Min": -30000, + "Low": -20000, + "High": 100000, + "Max": 105000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + }, + "invalid": -100000, + "error": -99999, + }, + { + "name": "PSU1_TEMP", + "temp_id": "TEMP6", + "Temperature": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-11/11-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": -10000, + "Low": -5000, + "High": 50000, + "Max": 55000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "PSU2_TEMP", + "temp_id": "TEMP7", + "Temperature": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-10/10-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": -10000, + "Low": -5000, + "High": 50000, + "Max": 55000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "OE_TEMP", + "temp_id": "TEMP8", + "api_name": "OE_TEMP", + "Temperature": { + "value": {"loc": "/etc/sonic/highest_oe_temp", "way": "sysfs", "flock_path": "/etc/sonic/highest_oe_temp"}, + "Min": -30000, + "Low": -20000, + "High": 95000, + "Max": 100000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + }, + "invalid": -100000, + "error": -99999, + }, + { + "name": "RLM_TEMP", + "temp_id": "TEMP9", + "api_name": "RLM_TEMP", + "Temperature": { + "value": {"loc": "/etc/sonic/highest_rlm_temp", "way": "sysfs", "flock_path": "/etc/sonic/highest_rlm_temp"}, + "Min": -40000, + "Low": -30000, + "High": 50000, + "Max": 55000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + }, + "invalid": -100000, + "error": -99999, + }, + { + "name": "MOS_TEMP", + "temp_id": "TEMP10", + "api_name": "MOSFET_TEMP", + "Temperature": { + "value": {"loc": "/sys/bus/i2c/devices/64-0040/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": -30000, + "Low": -20000, + "High": 110000, + "Max": 125000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "Tout-Tin", + "Temperature": { + "value": { + "val_conf_list": [ + {"loc": "/sys/bus/i2c/devices/8-0048/hwmon/hwmon*/temp1_input", "way": "sysfs", "fail_val":-99999000}, + {"loc": "/sys/bus/i2c/devices/8-0049/hwmon/hwmon*/temp1_input", "way": "sysfs", "fail_val":-99999000}, + {"loc": "/sys/bus/i2c/devices/9-0048/hwmon/hwmon*/temp1_input", "way": "sysfs", "fail_val":-99999000}, + {"loc": "/sys/bus/i2c/devices/9-0049/hwmon/hwmon*/temp1_input", "way": "sysfs", "fail_val":-99999000}, + {"loc": "/sys/bus/i2c/devices/35-004d/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + ], + "fail_conf_set_list": [ + {0,1,2,3}, + ], + "format": "float(float(max(%s,%s,%s,%s)-float(%s))/1000)+3" + }, + #"Min": -10000, + #"Low": 0, + "High": 15000, + "Max": 20000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + ], + "leds": [ + { + "name": "FRONT_SYS_LED", + "led_type": "SYS_LED", + "led": {"loc": "/dev/cpld1", "offset": 0x50, "len": 1, "way": "devfile"}, + "led_attrs": { + "off": 0x00, "green": 0x02, "amber": 0x06, "red": 0x06, "mask": 0x07, + "flash": 0x01, "amber_flash": 0x05, + }, + "led_map": { + 0x00: "off", 0x02: "blue", 0x06: "amber", 0x01: "blue/amber alternate flashing", + 0x05: "amber flashing" + } + }, + { + "name": "FRONT_PSU_LED", + "led_type": "PSU_LED", + "led": {"loc": "/dev/cpld1", "offset": 0x51, "len": 1, "way": "devfile"}, + "led_attrs": { + "off": 0x00, "green": 0x02, "amber": 0x06, "red": 0x06, "mask": 0x07 + }, + "led_map": { + 0x00: "off", 0x02: "blue", 0x06: "amber" + } + }, + { + "name": "FRONT_SMB_LED", + "led_type": "SMB_LED", + + "led": {"loc": "/dev/cpld1", "offset": 0x53, "len": 1, "way": "devfile"}, + "led_attrs": { + "off": 0x00, "green": 0x02, "amber": 0x06, "red": 0x06, "mask": 0x07 + }, + "led_map": { + 0x00: "off", 0x02: "blue", 0x06: "amber" + } + }, + { + "name": "FRONT_FAN_LED", + "led_type": "FAN_LED", + "led": {"loc": "/dev/cpld1", "offset": 0x52, "len": 1, "way": "devfile"}, + "led_attrs": { + "off": 0x00, "green": 0x02, "amber": 0x06, "red": 0x06, "mask": 0x07 + }, + "led_map": { + 0x00: "off", 0x02: "blue", 0x06: "amber" + } + }, + { + "name": "SCM_FRU_LED", + "led_type": "SMB_LED", + "led": {"loc": "/dev/cpld1", "offset": 0x54, "len": 1, "way": "devfile"}, + "led_attrs": { + "off": 0x00, "green": 0x02, "amber": 0x06, "red": 0x06, "mask": 0x07, + "amber_flash": 0x05, + }, + "led_map": { + 0x00: "off", 0x02: "blue", 0x06: "amber", 0x05: "amber flashing" + } + }, + { + "name": "SMB_FRU_LED", + "led_type": "SMB_LED", + "led": {"loc": "/dev/fpga1", "offset": 0x2c, "len": 1, "way": "devfile"}, + "led_attrs": { + "off": 0x07, "green": 0x03, "amber": 0x04, "red": 0x04, "mask": 0xf, + "amber_flash": 0x0c, + }, + "led_map": { + 0x07: "off", 0x03: "blue", 0x04: "amber", 0x0c: "amber flashing" + } + }, + ], + "fans": [ + { + "name": "FAN7", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-43/43-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "e2_type": ["wedge_v5", "fru"], + "present": {"loc": "/sys/s3ip/fan/fan7/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"bus": 44, "addr": 0x0d, "offset": 0x60, "way": "i2c"}, + "led_attrs": { + "off": 0x00, "green": 0x06, "amber": 0x01, "red": 0x01, "mask": 0x07 + }, + "led_map": { + 0x00: "off", 0x06: "blue", 0x01: "amber" + }, + "PowerMax": 80.64, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"bus": 44, "addr": 0x0d, "offset": 0x90, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan7/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan7/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan7/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"bus": 44, "addr": 0x0d, "offset": 0x90, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan7/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan7/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan7/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN5", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-42/42-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "e2_type": ["wedge_v5", "fru"], + "present": {"loc": "/sys/s3ip/fan/fan5/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"bus": 44, "addr": 0x0d, "offset": 0x61, "way": "i2c"}, + "led_attrs": { + "off": 0x00, "green": 0x06, "amber": 0x01, "red": 0x01, "mask": 0x07 + }, + "led_map": { + 0x00: "off", 0x06: "blue", 0x01: "amber" + }, + "PowerMax": 80.64, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"bus": 44, "addr": 0x0d, "offset": 0x91, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan5/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan5/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan5/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"bus": 44, "addr": 0x0d, "offset": 0x91, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan5/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan5/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan5/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN3", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-41/41-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "e2_type": ["wedge_v5", "fru"], + "present": {"loc": "/sys/s3ip/fan/fan3/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"bus": 44, "addr": 0x0d, "offset": 0x62, "way": "i2c"}, + "led_attrs": { + "off": 0x00, "green": 0x06, "amber": 0x01, "red": 0x01, "mask": 0x07 + }, + "led_map": { + 0x00: "off", 0x06: "blue", 0x01: "amber" + }, + "PowerMax": 80.64, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"bus": 44, "addr": 0x0d, "offset": 0x92, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan3/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan3/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan3/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"bus": 44, "addr": 0x0d, "offset": 0x92, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan3/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan3/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan3/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN1", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-40/40-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "e2_type": ["wedge_v5", "fru"], + "present": {"loc": "/sys/s3ip/fan/fan1/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"bus": 44, "addr": 0x0d, "offset": 0x63, "way": "i2c"}, + "led_attrs": { + "off": 0x00, "green": 0x06, "amber": 0x01, "red": 0x01, "mask": 0x07 + }, + "led_map": { + 0x00: "off", 0x06: "blue", 0x01: "amber" + }, + "PowerMax": 80.64, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"bus": 44, "addr": 0x0d, "offset": 0x93, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan1/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan1/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan1/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"bus": 44, "addr": 0x0d, "offset": 0x93, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan1/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan1/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan1/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN8", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-51/51-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "e2_type": ["wedge_v5", "fru"], + "present": {"loc": "/sys/s3ip/fan/fan8/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"bus": 52, "addr": 0x0d, "offset": 0x60, "way": "i2c"}, + "led_attrs": { + "off": 0x00, "green": 0x06, "amber": 0x01, "red": 0x01, "mask": 0x07 + }, + "led_map": { + 0x00: "off", 0x06: "blue", 0x01: "amber" + }, + "PowerMax": 80.64, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"bus": 52, "addr": 0x0d, "offset": 0x90, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan8/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan8/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan8/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"bus": 52, "addr": 0x0d, "offset": 0x90, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan8/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan8/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan8/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN6", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-50/50-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "e2_type": ["wedge_v5", "fru"], + "present": {"loc": "/sys/s3ip/fan/fan6/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"bus": 52, "addr": 0x0d, "offset": 0x61, "way": "i2c"}, + "led_attrs": { + "off": 0x00, "green": 0x06, "amber": 0x01, "red": 0x01, "mask": 0x07 + }, + "led_map": { + 0x00: "off", 0x06: "blue", 0x01: "amber" + }, + "PowerMax": 80.64, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"bus": 52, "addr": 0x0d, "offset": 0x91, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan6/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan6/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan6/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"bus": 52, "addr": 0x0d, "offset": 0x91, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan6/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan6/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan6/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN4", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-49/49-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "e2_type": ["wedge_v5", "fru"], + "present": {"loc": "/sys/s3ip/fan/fan4/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"bus": 52, "addr": 0x0d, "offset": 0x62, "way": "i2c"}, + "led_attrs": { + "off": 0x00, "green": 0x06, "amber": 0x01, "red": 0x01, "mask": 0x07 + }, + "led_map": { + 0x00: "off", 0x06: "blue", 0x01: "amber" + }, + "PowerMax": 80.64, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"bus": 52, "addr": 0x0d, "offset": 0x92, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan4/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan4/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan4/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"bus": 52, "addr": 0x0d, "offset": 0x92, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan4/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan4/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan4/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN2", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-48/48-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "e2_type": ["wedge_v5", "fru"], + "present": {"loc": "/sys/s3ip/fan/fan2/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"bus": 52, "addr": 0x0d, "offset": 0x63, "way": "i2c"}, + "led_attrs": { + "off": 0x00, "green": 0x06, "amber": 0x01, "red": 0x01, "mask": 0x07 + }, + "led_map": { + 0x00: "off", 0x06: "blue", 0x01: "amber" + }, + "PowerMax": 80.64, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"bus": 52, "addr": 0x0d, "offset": 0x93, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan2/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan2/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan2/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"bus": 52, "addr": 0x0d, "offset": 0x93, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan2/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan2/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan2/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + ], + "cplds": [ + { + "name": "CPU CPLD", + "cpld_id": "CPLD1", + "VersionFile": {"loc": "/dev/cpld0", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for system power", + "slot": 0, + "warm": 0, + }, + { + "name": "SCM CPLD", + "cpld_id": "CPLD2", + "VersionFile": {"loc": "/dev/cpld1", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for base functions", + "slot": 0, + "warm": 0, + }, + { + "name": "MCB CPLD", + "cpld_id": "CPLD3", + "VersionFile": {"loc": "/dev/cpld3", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for base functions", + "slot": 0, + "warm": 0, + }, + { + "name": "SMB CPLD", + "cpld_id": "CPLD4", + "VersionFile": {"loc": "/dev/cpld4", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for sff modules", + "slot": 0, + "warm": 0, + }, + { + "name": "FCB_T CPLD", + "cpld_id": "CPLD5", + "VersionFile": {"loc": "/dev/cpld5", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for fan modules", + "slot": 0, + "warm": 0, + }, + { + "name": "FCB_B CPLD", + "cpld_id": "CPLD6", + "VersionFile": {"loc": "/dev/cpld6", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for fan modules", + "slot": 0, + "warm": 0, + }, + { + "name": "IOB FPGA", + "cpld_id": "CPLD7", + "VersionFile": {"loc": "/dev/fpga0", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for base functions", + "slot": 0, + "format": "little_endian", + "warm": 0, + }, + { + "name": "DOM FPGA", + "cpld_id": "CPLD8", + "VersionFile": {"loc": "/dev/fpga1", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for sff functions", + "slot": 0, + "format": "little_endian", + "warm": 0, + }, + { + "name": "BIOS", + "cpld_id": "CPLD9", + "VersionFile": {"cmd": "dmidecode -s bios-version", "way": "cmd"}, + "desc": "Performs initialization of hardware components during booting", + "slot": 0, + "type": "str", + "warm": 0, + }, + ], + "dcdc": [ + { + "name": "SCM_53134O_V1.0_V", + "dcdc_id": "DCDC1", + "Min": 900, + "value": { + "loc": "/sys/bus/i2c/devices/33-0040/hwmon/hwmon*/in1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 1100, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SCM_I210_V3.3_V", + "dcdc_id": "DCDC2", + "Min": 2970, + "value": { + "loc": "/sys/bus/i2c/devices/33-0040/hwmon/hwmon*/in2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 3630, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SCM_VDD3.3_V", + "dcdc_id": "DCDC3", + "Min": 2970, + "value": { + "loc": "/sys/bus/i2c/devices/33-0040/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 3630, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SCM_VDD12.0_V", + "dcdc_id": "DCDC4", + "Min": 10800, + "value": { + "loc": "/sys/bus/i2c/devices/33-0041/hwmon/hwmon*/in1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 13200, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SCM_OCM_V12.0_V", + "dcdc_id": "DCDC5", + "Min": 10800, + "value": { + "loc": "/sys/bus/i2c/devices/33-0041/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 13200, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SCM_SSD_V3.3_V", + "dcdc_id": "DCDC6", + "Min": 2970, + "value": { + "loc": "/sys/bus/i2c/devices/33-0042/hwmon/hwmon*/in1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 3630, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SCM_BMC_V3.3_V", + "dcdc_id": "DCDC7", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/33-0042/hwmon/hwmon*/in2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 3630, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SCM_VDD5.0_V", + "dcdc_id": "DCDC8", + "Min": 4500, + "value": { + "loc": "/sys/bus/i2c/devices/33-0042/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 5500, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MAC_CORE_V", + "dcdc_id": "DCDC9", + "Min": 630, + "value": { + "loc": "/sys/bus/i2c/devices/64-0040/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 858, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MAC_ANALOG0 V0.9_V", + "dcdc_id": "DCDC10", + "Min": 810, + "value": { + "loc": "/sys/bus/i2c/devices/65-0040/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 990, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MAC_ANALOG0 V0.75_V", + "dcdc_id": "DCDC11", + "Min": 675, + "value": { + "loc": "/sys/bus/i2c/devices/65-0040/hwmon/hwmon*/in4_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 825, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MAC_ANALOG1 V0.9_V", + "dcdc_id": "DCDC12", + "Min": 810, + "value": { + "loc": "/sys/bus/i2c/devices/66-0040/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 990, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MAC_ANALOG1 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"float(float(%s)/1000)", + }, + + { + "name": "MAC_PLL3_VDD0.9_V", + "dcdc_id": "DCDC17", + "Min": 810, + "value": { + "loc": "/sys/bus/i2c/devices/61-0040/hwmon/hwmon*/in1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 990, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MAC_VDD_0.8_V", + "dcdc_id": "DCDC18", + "Min": 720, + "value": { + "loc": "/sys/bus/i2c/devices/58-0040/hwmon/hwmon*/in2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 880, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MAC_VDD_1.8_V", + "dcdc_id": "DCDC19", + "Min": 1620, + "value": { + "loc": "/sys/bus/i2c/devices/60-0040/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 1980, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MAC_VDD_1.5_V", + "dcdc_id": "DCDC20", + "Min": 1350, + "value": { + "loc": "/sys/bus/i2c/devices/58-0040/hwmon/hwmon*/in1_input", + "way": "sysfs", + }, + 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"Max": 30000, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SMB_CLK_VDD3.3_C", + "dcdc_id": "DCDC178", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/59-0040/hwmon/hwmon*/curr1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 1100, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SMB_CLK2_VDD1.8_C", + "dcdc_id": "DCDC179", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/56-0041/hwmon/hwmon*/curr3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 1100, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SMB_CLK_VDD1.8_C", + "dcdc_id": "DCDC180", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/56-0041/hwmon/hwmon*/curr2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 1100, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SMB_FPGA_VDD1.8_C", + "dcdc_id": "DCDC181", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/62-0040/hwmon/hwmon*/curr3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 550, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SMB_VDD_5.0_C", + "dcdc_id": "DCDC182", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/60-0040/hwmon/hwmon*/curr2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 3300, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SMB_FPGA_V1.0_C", + "dcdc_id": "DCDC183", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/62-0040/hwmon/hwmon*/curr2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 1188, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SMB_FPGA_V1.2_C", + "dcdc_id": "DCDC184", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/57-0040/hwmon/hwmon*/curr1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 550, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SMB_VDD_3.3_C", + "dcdc_id": "DCDC185", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/63-0040/hwmon/hwmon*/curr1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 1550, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SMB_CPLD_VDD_1.8_C", + "dcdc_id": "DCDC186", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/63-0040/hwmon/hwmon*/curr2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 330, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MCB_FPGA_VDD1.0_C", + "dcdc_id": "DCDC187", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/12-0040/hwmon/hwmon*/curr1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 1188, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MCB_FPGA_VDD1.8_C", + "dcdc_id": "DCDC188", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/12-0040/hwmon/hwmon*/curr2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 550, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MCB_FPGA_VDD1.2_C", + "dcdc_id": "DCDC189", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/12-0040/hwmon/hwmon*/curr3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 550, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MCB_CPLD_VDD3.3_C", + "dcdc_id": "DCDC190", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/12-0041/hwmon/hwmon*/curr1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 550, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MCB_VDD3.3_C", + "dcdc_id": "DCDC191", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/12-0041/hwmon/hwmon*/curr2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 550, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MCB_FPGA_VDD3.3_C", + "dcdc_id": "DCDC192", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/12-0041/hwmon/hwmon*/curr3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 550, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MCB_LEDL_VDD3.3_C", + "dcdc_id": "DCDC210", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/91-0042/hwmon/hwmon*/curr1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 1200, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MCB_LEDR_VDD3.3_C", + "dcdc_id": "DCDC211", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/91-0042/hwmon/hwmon*/curr2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 1200, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OCM_XDPE_VCCIN_C", + "dcdc_id": "DCDC193", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/5-0070/hwmon/hwmon*/loopa_iout", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 147000, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OCM_XDPE_P1V8_C", + "dcdc_id": "DCDC194", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/5-0070/hwmon/hwmon*/loopb_iout", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 2300, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OCM_XDPE_P1V05_C", + "dcdc_id": "DCDC195", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/5-006e/hwmon/hwmon*/loopa_iout", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 14300, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OCM_XDPE_VNN_PCH_C", + "dcdc_id": "DCDC196", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/5-006e/hwmon/hwmon*/loopb_iout", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 7400, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OCM_XDPE_VNN_NAC_C", + "dcdc_id": "DCDC197", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/5-0068/hwmon/hwmon*/loopa_iout", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 22000, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OCM_XDPE_VCC_ANA_C", + "dcdc_id": "DCDC198", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/5-0068/hwmon/hwmon*/loopb_iout", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 2210, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OCM_XDPE_P1V2_VDDQ_C", + "dcdc_id": "DCDC199", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/5-005e/hwmon/hwmon*/loopa_iout", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 19000, + "format": "float(float(%s)/1000)", + }, + + { + "name": "FAN1_VDD12_C", + "dcdc_id": "DCDC200", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/88-0042/hwmon/hwmon*/curr1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 10000, + "format": "float(float(%s)/1000)", + }, + + { + "name": "FAN2_VDD12_C", + "dcdc_id": "DCDC201", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/89-0042/hwmon/hwmon*/curr2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 10000, + "format": "float(float(%s)/1000)", + }, + + { + "name": "FAN3_VDD12_C", + "dcdc_id": "DCDC202", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/88-0042/hwmon/hwmon*/curr2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 10000, + "format": "float(float(%s)/1000)", + }, + + { + "name": "FAN4_VDD12_C", + "dcdc_id": "DCDC203", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/89-0042/hwmon/hwmon*/curr3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 10000, + "format": "float(float(%s)/1000)", + }, + + { + "name": "FAN5_VDD12_C", + "dcdc_id": "DCDC204", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/88-0042/hwmon/hwmon*/curr3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 10000, + "format": "float(float(%s)/1000)", + }, + + { + "name": "FAN6_VDD12_C", + "dcdc_id": "DCDC205", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/90-0042/hwmon/hwmon*/curr1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 10000, + "format": "float(float(%s)/1000)", + }, + + { + "name": "FAN7_VDD12_C", + "dcdc_id": "DCDC206", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/89-0042/hwmon/hwmon*/curr1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 10000, + "format": "float(float(%s)/1000)", + }, + + { + "name": "FAN8_VDD12_C", + "dcdc_id": "DCDC207", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/90-0042/hwmon/hwmon*/curr2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 10000, + "format": "float(float(%s)/1000)", + }, + ], + "cpu": [ + { + "name": "cpu", + "reboot_cause_path": "/etc/sonic/.reboot/.previous-reboot-cause.txt" + } + ], + "sfps": { + "ver": '3.0', + "port_index_start": 1, + "port_num": 128, + "log_level": 2, + "eeprom_retry_times": 5, + "eeprom_retry_break_sec": 0.2, + "presence_val_is_present": 0, + "eeprom_path": "/sys/bus/i2c/devices/i2c-%d/%d-0050/eeprom", + "eeprom_path_key": [24] * 16 + [25] * 16 + [26] * 16 + [27] * 16 + [28] * 16 + [29] * 16 + [30] * 16 + [31] * 16 + } +} diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/hal-config/x86_64_micas_m2_w6940_128x1_fr4_r0_0x40d9_v01_ac_monitor.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/hal-config/x86_64_micas_m2_w6940_128x1_fr4_r0_0x40d9_v01_ac_monitor.py new file mode 100755 index 00000000000..10bd281d0ee --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/hal-config/x86_64_micas_m2_w6940_128x1_fr4_r0_0x40d9_v01_ac_monitor.py @@ -0,0 +1,239 @@ +# coding:utf-8 + + +monitor = { + "openloop": { + "linear": { + "name": "linear", + "flag": 0, + "pwm_min": 0x66, + "pwm_max": 0xcc, + "K": 11, + "tin_min": 38, + }, + "curve": { + "name": "curve", + "flag": 1, + "pwm_min": 0x66, + "pwm_max": 0xcc, + "a": -0.0249, + "b": 8.1615, + "c": -60.326, + "tin_min": 25, + }, + }, + + "pid": { + "CPU_TEMP": { + "name": "CPU_TEMP", + "flag": 1, + "type": "duty", + "pwm_min": 0x66, + "pwm_max": 0xcc, + "Kp": 0.8, + "Ki": 0.4, + "Kd": 0.3, + "target": 85, + "value": [None, None, None], + }, + "SWITCH_TEMP": { + "name": "SWITCH_TEMP", + "flag": 1, + "type": "duty", + "pwm_min": 0x66, + "pwm_max": 0xcc, + "Kp": 1.5, + "Ki": 1, + "Kd": 0.3, + "target": 80, + "value": [None, None, None], + }, + "OUTLET_TEMP": { + "name": "OUTLET_TEMP", + "flag": 1, + "type": "duty", + "pwm_min": 0x66, + "pwm_max": 0xcc, + "Kp": 2, + "Ki": 0.4, + "Kd": 0.3, + "target": 65, + "value": [None, None, None], + }, + "RLM_TEMP": { + "name": "RLM_TEMP", + "flag": 1, + "type": "duty", + "pwm_min": 0x66, + "pwm_max": 0xcc, + "Kp": 0.1, + "Ki": 0.4, + "Kd": 0, + "target": 40, + "value": [None, None, None], + }, + "BOARD_TEMP": { + "name": "BOARD_TEMP", + "flag": 1, + "type": "duty", + "pwm_min": 0x66, + "pwm_max": 0xcc, + "Kp": 2, + "Ki": 0.4, + "Kd": 0.3, + "target": 65, + "value": [None, None, None], + }, + "MOS_TEMP": { + "name": "MOS_TEMP", + "flag": 1, + "type": "duty", + "pwm_min": 0x66, + "pwm_max": 0xcc, + "Kp": 1, + "Ki": 0.4, + "Kd": 0.3, + "target": 85, + "value": [None, None, None], + }, + "Tout-Tin": { + "name": "Tout-Tin", + "flag": 0, + "type": "duty", + "pwm_min": 0x66, + "pwm_max": 0xcc, + "Kp": 8, + "Ki": 0.1, + "Kd": 0.4, + "target": 12, + "value": [None, None, None], + }, + "OE_TEMP": { + "name": "OE_TEMP", + "flag": 1, + "type": "duty", + "pwm_min": 0x66, # 40%(0x66 = 102, 102/255=0.4) + "pwm_max": 0xcc, # 80%(0xcc = 204, 204/255=0.8) + "Kp": 1.5, + "Ki": 1, + "Kd": 0.3, + "target": 85, + "value": [None, None, None], + } + }, + + "temps_threshold": { + "SWITCH_TEMP": {"name": "SWITCH_TEMP", "warning": 100, "critical": 105, "invalid": -100000, "error": -99999}, + "INLET_TEMP": {"name": "INLET_TEMP", "warning": 50, "critical": 55}, + "OUTLET_TEMP": {"name": "OUTLET_TEMP", "warning": 70, "critical": 75}, + "CPU_TEMP": {"name": "CPU_TEMP", "warning": 95, "critical": 99}, + "RLM_TEMP": {"name": "RLM_TEMP", "warning": 50, "critical": 55, "invalid": -100000, "error": -99999}, + #"Tout-Tin": {"name": "Tout-Tin", "warning": 15, "critical": 20}, + "OE_TEMP": {"name": "OE_TEMP", "warning": 95, "critical": 100, "invalid": -100000, "error": -99999}, + "BOARD_TEMP": {"name": "BOARD_TEMP", "warning": 70, "critical": 75}, + "MOS_TEMP": {"name": "MOS_TEMP", "warning": 110, "critical": 125}, + }, + + "fancontrol_para": { + "interval": 5, + "max_pwm": 0xff, + "min_pwm": 0x66, + "abnormal_pwm": 0xcc, + "warning_pwm": 0xcc, + "critical_pwm": 0xcc, + "temp_invalid_pid_pwm": 0x66, + "temp_error_pid_pwm": 0x66, + "temp_fail_num": 3, + "check_temp_fail": [ + {"temp_name": "INLET_TEMP"}, + {"temp_name": "SWITCH_TEMP"}, + {"temp_name": "CPU_TEMP"}, + {"temp_name": "MOS_TEMP"}, + {"temp_name": "BOARD_TEMP"}, + {"temp_name": "OUTLET_TEMP"}, + {"temp_name": "OE_TEMP"}, + ], + "check_temp_critical_reboot": [ + ["SWITCH_TEMP"], + ["OE_TEMP"], + ["INLET_TEMP", "OUTLET_TEMP", "CPU_TEMP", "RLM_TEMP", "BOARD_TEMP", "MOS_TEMP"], + ], + "temp_warning_num": 3, # temp over warning 3 times continuously + "temp_critical_num": 3, # temp over critical 3 times continuously + "temp_warning_countdown": 60, # 5 min warning speed after not warning + "temp_critical_countdown": 60, # 5 min full speed after not critical + "rotor_error_count": 6, # fan rotor error 6 times continuously + "inlet_mac_diff": 999, + "check_crit_reboot_flag": 1, + "check_crit_reboot_num": 3, + "check_crit_sleep_time": 20, + "psu_fan_control": 1, + "psu_absent_fullspeed_num": 0xFF, + "fan_absent_fullspeed_num": 1, + "rotor_error_fullspeed_num": 1, + "deal_over_temp_reboot_cmd": [ + {"way": "devfile", "loc": "/dev/cpld5", "offset": 0x22, "value": [0x00]}, # disable fan watchdog + {"way": "devfile", "loc": "/dev/cpld6", "offset": 0x22, "value": [0x00]}, # disable fan watchdog + {"way": "devfile", "loc": "/dev/cpld1", "offset": 0x15, "value": [0x0c]}, # cpu powroff + ], + "deal_over_temp_reboot_pwm": 0x80, # set pwm=50% + }, + + "ledcontrol_para": { + "interval": 5, + "checkpsu": 1, # 0: sys led don't follow psu led + "checkfan": 1, # 0: sys led don't follow fan led + "checksmb": 1, # 0: sys led don't follow smb led + "psu_amber_num": 2, + "psu_green_num": 0, # only psuerrnum <= this, psu led will be set green + "fan_amber_num": 1, + "sysled_check_temp": 0, + "sysled_check_fw_up": 1, + "smbled_ctrl": 1, + "board_sys_led": [ + {"led_name": "FRONT_SYS_LED"}, + ], + "board_psu_led": [ + {"led_name": "FRONT_PSU_LED"}, + ], + "board_fan_led": [ + {"led_name": "FRONT_FAN_LED"}, + ], + "board_smb_led": [ + {"led_name": "SMB_FRU_LED"}, + ], + "board_smb_fru_led": [ + {"led_name": "FRONT_SMB_LED"}, + ], + "board_smb_fru_dcdc_sensors": [ + "^MAC_", "^OE", "^RLM", "^SMB_", + ], + "board_smb_fru_temps": [ + "SWITCH_TEMP", "BOARD_TEMP", "MOS_TEMP", "OE_TEMP", "RLM_TEMP", + ], + "board_scm_fru_led": [ + {"led_name": "SCM_FRU_LED"}, + ], + "board_scm_fru_dcdc_sensors": [ + "^SCM_", "^OCM_", + ], + "board_scm_fru_temps": [ + "CPU_TEMP", "INLET_TEMP", + ], + "psu_air_flow_monitor": 0, + "fan_air_flow_monitor": 0, + "psu_air_flow_amber_num": 0, + "fan_air_flow_amber_num": 0, + }, + + "fw_upgrade_check": [ + [ + {"gettype": "file_exist", "judge_file": "/etc/sonic/.doing_fw_upg", "okval": True}, + ], + ], + + "otp_reboot_judge_file": { + "otp_switch_reboot_judge_file": "/etc/.otp_switch_reboot_flag", + "otp_other_reboot_judge_file": "/etc/.otp_other_reboot_flag", + }, +} diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/hal-config/x86_64_micas_m2_w6940_128x1_fr4_r0_0x40d9_v01_dc_device.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/hal-config/x86_64_micas_m2_w6940_128x1_fr4_r0_0x40d9_v01_dc_device.py new file mode 100755 index 00000000000..6c5781bca5f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/hal-config/x86_64_micas_m2_w6940_128x1_fr4_r0_0x40d9_v01_dc_device.py @@ -0,0 +1,3947 @@ +#!/usr/bin/python3 + +# CPO 100 board modified configuration, support 1 DC PSU + +psu_fan_airflow = { + "intake": ['DLK3000AN12C31', 'CRPS3000CL', 'ECDL3000123', 'ECD26020050'], + "exhaust": [] +} + +fanairflow = { + "intake": ['M2EFAN V-F'], + "exhaust": [], +} + +psu_display_name = { + "PA3000I-F": ['DLK3000AN12C31', 'CRPS3000CL', 'ECDL3000123'], + "PD3000I-F": ['ECD26020050'] +} + +psutypedecode = { + 0x00: 'N/A', + 0x01: 'AC', + 0x02: 'DC', +} + +class Unit: + Temperature = "C" + Voltage = "V" + Current = "A" + Power = "W" + Speed = "RPM" + +class threshold: + PSU_TEMP_MIN = -5 * 1000 + PSU_TEMP_MAX = 55 * 1000 + + PSU_FAN_SPEED_MIN = 3500 + PSU_FAN_SPEED_MAX = 32950 + + PSU_OUTPUT_VOLTAGE_MIN = 11 * 1000 + PSU_OUTPUT_VOLTAGE_MAX = 13 * 1000 + + PSU_AC_INPUT_VOLTAGE_MIN = 90 * 1000 + PSU_AC_INPUT_VOLTAGE_MAX = 264 * 1000 + + PSU_DC_INPUT_VOLTAGE_MIN = 180 * 1000 + PSU_DC_INPUT_VOLTAGE_MAX = 320 * 1000 + + PSU_DC_INPUT_VOLTAGE_MIN_2 = 45 * 1000 + PSU_DC_INPUT_VOLTAGE_MAX_2 = 53 * 1000 + + ERR_VALUE = -9999999 + + PSU_OUTPUT_POWER_MIN = 0 * 1000 * 1000 + PSU_OUTPUT_POWER_MAX = 3000 * 1000 * 1000 + + PSU_INPUT_POWER_MIN = 0 * 1000 * 1000 + PSU_INPUT_POWER_MAX = 3100 * 1000 * 1000 + + PSU_OUTPUT_CURRENT_MIN = 0 * 1000 + PSU_OUTPUT_CURRENT_MAX = 246 * 1000 + + PSU_DC_OUTPUT_CURRENT_MAX = 250 * 1000 + + PSU_INPUT_CURRENT_MIN = 0 * 1000 + PSU_INPUT_CURRENT_MAX = 20 * 1000 + + PSU_DC_INPUT_CURRENT_MAX = 80 * 1000 + + FRONT_FAN_SPEED_MAX = 11700 + REAR_FAN_SPEED_MAX = 10200 + FAN_SPEED_MIN = 2000 + +devices = { + "onie_e2": [ + { + "name": "ONIE_E2", + "e2loc": {"loc": "/sys/bus/i2c/devices/1-0056/eeprom", "way": "sysfs"}, + "airflow": "intake" + }, + ], + "psus": [ + { + "e2loc": {"loc": "/sys/bus/i2c/devices/11-0050/eeprom", "way": "sysfs"}, + "e2_type": ["wedge_v5", "fru"], + "pmbusloc": {"bus": 11, "addr": 0x58, "way": "i2c"}, + "present": {"loc": "/sys/s3ip/psu/psu1/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "name": "PSU1", + "psu_display_name": psu_display_name, + "psu_display_name": psu_display_name, + "airflow": psu_fan_airflow, + "TempStatus": {"bus": 11, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0004}, + "Temperature": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-11/11-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": threshold.PSU_TEMP_MIN, + "Max": threshold.PSU_TEMP_MAX, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + }, + "FanStatus": {"bus": 11, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0400}, + "FanSpeed": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-11/11-0058/hwmon/hwmon*/fan1_input", "way": "sysfs"}, + "Min": threshold.PSU_FAN_SPEED_MIN, + "Max": threshold.PSU_FAN_SPEED_MAX, + "Unit": Unit.Speed + }, + "psu_fan_tolerance": 40, + "InputsStatus": {"bus": 11, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x2000}, + "InputsType": {"bus": 11, "addr": 0x58, "offset": 0x80, "way": "i2c", 'psutypedecode': psutypedecode}, + "InputsVoltage": { + 'AC': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-11/11-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": threshold.PSU_AC_INPUT_VOLTAGE_MIN, + "Max": threshold.PSU_AC_INPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + + }, + 'DC': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-11/11-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": { + "other": threshold.PSU_DC_INPUT_VOLTAGE_MIN, + "ECD26020050": threshold.PSU_DC_INPUT_VOLTAGE_MIN_2, + }, + "Max": { + "other": threshold.PSU_DC_INPUT_VOLTAGE_MAX, + "ECD26020050": threshold.PSU_DC_INPUT_VOLTAGE_MAX_2, + }, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + }, + 'other': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-11/11-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": threshold.ERR_VALUE, + "Max": threshold.ERR_VALUE, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + } + }, + "InputsCurrent": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-11/11-0058/hwmon/hwmon*/curr1_input", "way": "sysfs"}, + "Min": threshold.PSU_INPUT_CURRENT_MIN, + "Max": { + "other":threshold.PSU_INPUT_CURRENT_MAX, + "ECD26020050":threshold.PSU_DC_INPUT_CURRENT_MAX, + }, + "Unit": Unit.Current, + "format": "float(float(%s)/1000)" + }, + "InputsPower": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-11/11-0058/hwmon/hwmon*/power1_input", "way": "sysfs"}, + "Min": threshold.PSU_INPUT_POWER_MIN, + "Max": threshold.PSU_INPUT_POWER_MAX, + "Unit": Unit.Power, + "format": "float(float(%s)/1000000)" + }, + "OutputsStatus": {"bus": 11, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x8800}, + "OutputsVoltage": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-11/11-0058/hwmon/hwmon*/in2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_VOLTAGE_MIN, + "Max": threshold.PSU_OUTPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + }, + "OutputsCurrent": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-11/11-0058/hwmon/hwmon*/curr2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_CURRENT_MIN, + "Max": { + "other":threshold.PSU_OUTPUT_CURRENT_MAX, + "ECD26020050":threshold.PSU_DC_OUTPUT_CURRENT_MAX, + }, + "Unit": Unit.Current, + "format": "float(float(%s)/1000)" + }, + "OutputsPower": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-11/11-0058/hwmon/hwmon*/power2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_POWER_MIN, + "Max": threshold.PSU_OUTPUT_POWER_MAX, + "Unit": Unit.Power, + "format": "float(float(%s)/1000000)" + }, + }, + { + "e2loc": {"loc": "/sys/bus/i2c/devices/10-0050/eeprom", "way": "sysfs"}, + "e2_type": ["wedge_v5", "fru"], + "pmbusloc": {"bus": 10, "addr": 0x58, "way": "i2c"}, + "present": {"loc": "/sys/s3ip/psu/psu2/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "name": "PSU2", + "psu_display_name": psu_display_name, + "airflow": psu_fan_airflow, + "TempStatus": {"bus": 10, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0004}, + "Temperature": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-10/10-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": threshold.PSU_TEMP_MIN, + "Max": threshold.PSU_TEMP_MAX, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + }, + "FanStatus": {"bus": 10, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0400}, + "FanSpeed": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-10/10-0058/hwmon/hwmon*/fan1_input", "way": "sysfs"}, + "Min": threshold.PSU_FAN_SPEED_MIN, + "Max": threshold.PSU_FAN_SPEED_MAX, + "Unit": Unit.Speed + }, + "psu_fan_tolerance": 40, + "InputsStatus": {"bus":10, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x2000}, + "InputsType": {"bus": 10, "addr": 0x58, "offset": 0x80, "way": "i2c", 'psutypedecode': psutypedecode}, + "InputsVoltage": { + 'AC': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-10/10-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": threshold.PSU_AC_INPUT_VOLTAGE_MIN, + "Max": threshold.PSU_AC_INPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + + }, + 'DC': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-10/10-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": { + "other": threshold.PSU_DC_INPUT_VOLTAGE_MIN, + "ECD26020050": threshold.PSU_DC_INPUT_VOLTAGE_MIN_2, + }, + "Max": { + "other": threshold.PSU_DC_INPUT_VOLTAGE_MAX, + "ECD26020050": threshold.PSU_DC_INPUT_VOLTAGE_MAX_2, + }, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + }, + 'other': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-10/10-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": threshold.ERR_VALUE, + "Max": threshold.ERR_VALUE, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + } + }, + "InputsCurrent": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-10/10-0058/hwmon/hwmon*/curr1_input", "way": "sysfs"}, + "Min": threshold.PSU_INPUT_CURRENT_MIN, + "Max": { + "other":threshold.PSU_INPUT_CURRENT_MAX, + "ECD26020050":threshold.PSU_DC_INPUT_CURRENT_MAX, + }, + "Unit": Unit.Current, + "format": "float(float(%s)/1000)" + }, + "InputsPower": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-10/10-0058/hwmon/hwmon*/power1_input", "way": "sysfs"}, + "Min": threshold.PSU_INPUT_POWER_MIN, + "Max": threshold.PSU_INPUT_POWER_MAX, + "Unit": Unit.Power, + "format": "float(float(%s)/1000000)" + }, + "OutputsStatus": {"bus": 10, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x8800}, + "OutputsVoltage": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-10/10-0058/hwmon/hwmon*/in2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_VOLTAGE_MIN, + "Max": threshold.PSU_OUTPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + }, + "OutputsCurrent": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-10/10-0058/hwmon/hwmon*/curr2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_CURRENT_MIN, + "Max": { + "other":threshold.PSU_OUTPUT_CURRENT_MAX, + "ECD26020050":threshold.PSU_DC_OUTPUT_CURRENT_MAX, + }, + "Unit": Unit.Current, + "format": "float(float(%s)/1000)" + }, + "OutputsPower": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-10/10-0058/hwmon/hwmon*/power2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_POWER_MIN, + "Max": threshold.PSU_OUTPUT_POWER_MAX, + "Unit": Unit.Power, + "format": "float(float(%s)/1000000)" + }, + }, + ], + "temps": [ + { + "name": "CPU_TEMP", + "temp_id": "TEMP1", + "api_name": "CPU", + "Temperature": { + "value": {"loc": "/sys/bus/platform/devices/coretemp.0/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": -30000, + "Low": -10000, + "High": 95000, + "Max": 99000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "INLET_TEMP", + "temp_id": "TEMP2", + "api_name": "Inlet", + "Temperature": { + "value": {"loc": "/sys/bus/i2c/devices/35-004d/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": -37000, + "Low": -27000, + "High": 50000, + "Max": 55000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)-1" + } + }, + { + "name": "OUTLET_TEMP", + "temp_id": "TEMP3", + "api_name": "Outlet", + "Temperature": { + "value": [ + {"loc": "/sys/bus/i2c/devices/8-0048/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + {"loc": "/sys/bus/i2c/devices/8-0049/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + {"loc": "/sys/bus/i2c/devices/9-0048/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + {"loc": "/sys/bus/i2c/devices/9-0049/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + ], + "Min": -30000, + "Low": -20000, + "High": 70000, + "Max": 75000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "BOARD_TEMP", + "temp_id": "TEMP4", + "api_name": "Board", + "Temperature": { + "value": {"loc": "/sys/bus/i2c/devices/14-0048/hwmon/*/temp1_input", "way": "sysfs"}, + "Min": -30000, + "Low": -10000, + "High": 70000, + "Max": 75000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "SWITCH_TEMP", + "temp_id": "TEMP5", + "api_name": "ASIC_TEMP", + "Temperature": { + "value": {"loc": "/sys/s3ip/temp_sensor/temp2/value", "way": "sysfs"}, + "Min": -30000, + "Low": -20000, + "High": 100000, + "Max": 105000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + }, + "invalid": -100000, + "error": -99999, + }, + { + "name": "PSU2_TEMP", + "temp_id": "TEMP6", + "Temperature": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-10/10-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": -10000, + "Low": -5000, + "High": 50000, + "Max": 55000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "OE_TEMP", + "temp_id": "TEMP7", + "api_name": "OE_TEMP", + "Temperature": { + "value": {"loc": "/etc/sonic/highest_oe_temp", "way": "sysfs", "flock_path": "/etc/sonic/highest_oe_temp"}, + "Min": -30000, + "Low": -20000, + "High": 95000, + "Max": 100000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + }, + "invalid": -100000, + "error": -99999, + }, + { + "name": "RLM_TEMP", + "temp_id": "TEMP8", + "api_name": "RLM_TEMP", + "Temperature": { + "value": {"loc": "/etc/sonic/highest_rlm_temp", "way": "sysfs", "flock_path": "/etc/sonic/highest_rlm_temp"}, + "Min": -40000, + "Low": -30000, + "High": 50000, + "Max": 55000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + }, + "invalid": -100000, + "error": -99999, + }, + { + "name": "MOS_TEMP", + "temp_id": "TEMP9", + "api_name": "MOSFET_TEMP", + "Temperature": { + "value": {"loc": "/sys/bus/i2c/devices/64-0040/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": -30000, + "Low": -20000, + "High": 110000, + "Max": 125000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "Tout-Tin", + "Temperature": { + "value": { + "val_conf_list": [ + {"loc": "/sys/bus/i2c/devices/8-0048/hwmon/hwmon*/temp1_input", "way": "sysfs", "fail_val":-99999000}, + {"loc": "/sys/bus/i2c/devices/8-0049/hwmon/hwmon*/temp1_input", "way": "sysfs", "fail_val":-99999000}, + {"loc": "/sys/bus/i2c/devices/9-0048/hwmon/hwmon*/temp1_input", "way": "sysfs", "fail_val":-99999000}, + {"loc": "/sys/bus/i2c/devices/9-0049/hwmon/hwmon*/temp1_input", "way": "sysfs", "fail_val":-99999000}, + {"loc": "/sys/bus/i2c/devices/35-004d/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + ], + "fail_conf_set_list": [ + {0,1,2,3}, + ], + "format": "float(float(max(%s,%s,%s,%s)-float(%s))/1000)+3" + }, + #"Min": -10000, + #"Low": 0, + "High": 15000, + "Max": 20000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + ], + "leds": [ + { + "name": "FRONT_SYS_LED", + "led_type": "SYS_LED", + "led": {"loc": "/dev/cpld1", "offset": 0x50, "len": 1, "way": "devfile"}, + "led_attrs": { + "off": 0x00, "green": 0x02, "amber": 0x06, "red": 0x06, "mask": 0x07, + "flash": 0x01, "amber_flash": 0x05, + }, + "led_map": { + 0x00: "off", 0x02: "blue", 0x06: "amber", 0x01: "blue/amber alternate flashing", + 0x05: "amber flashing" + } + }, + { + "name": "FRONT_PSU_LED", + "led_type": "PSU_LED", + "led": {"loc": "/dev/cpld1", "offset": 0x51, "len": 1, "way": "devfile"}, + "led_attrs": { + "off": 0x00, "green": 0x02, "amber": 0x06, "red": 0x06, "mask": 0x07 + }, + "led_map": { + 0x00: "off", 0x02: "blue", 0x06: "amber" + } + }, + { + "name": "FRONT_SMB_LED", + "led_type": "SMB_LED", + + "led": {"loc": "/dev/cpld1", "offset": 0x53, "len": 1, "way": "devfile"}, + "led_attrs": { + "off": 0x00, "green": 0x02, "amber": 0x06, "red": 0x06, "mask": 0x07 + }, + "led_map": { + 0x00: "off", 0x02: "blue", 0x06: "amber" + } + }, + { + "name": "FRONT_FAN_LED", + "led_type": "FAN_LED", + "led": {"loc": "/dev/cpld1", "offset": 0x52, "len": 1, "way": "devfile"}, + "led_attrs": { + "off": 0x00, "green": 0x02, "amber": 0x06, "red": 0x06, "mask": 0x07 + }, + "led_map": { + 0x00: "off", 0x02: "blue", 0x06: "amber" + } + }, + { + "name": "SCM_FRU_LED", + "led_type": "SMB_LED", + "led": {"loc": "/dev/cpld1", "offset": 0x54, "len": 1, "way": "devfile"}, + "led_attrs": { + "off": 0x00, "green": 0x02, "amber": 0x06, "red": 0x06, "mask": 0x07, + "amber_flash": 0x05, + }, + "led_map": { + 0x00: "off", 0x02: "blue", 0x06: "amber", 0x05: "amber flashing" + } + }, + { + "name": "SMB_FRU_LED", + "led_type": "SMB_LED", + "led": {"loc": "/dev/fpga1", "offset": 0x2c, "len": 1, "way": "devfile"}, + "led_attrs": { + "off": 0x07, "green": 0x03, "amber": 0x04, "red": 0x04, "mask": 0xf, + "amber_flash": 0x0c, + }, + "led_map": { + 0x07: "off", 0x03: "blue", 0x04: "amber", 0x0c: "amber flashing" + } + }, + ], + "fans": [ + { + "name": "FAN7", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-43/43-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "e2_type": ["wedge_v5", "fru"], + "present": {"loc": "/sys/s3ip/fan/fan7/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"bus": 44, "addr": 0x0d, "offset": 0x60, "way": "i2c"}, + "led_attrs": { + "off": 0x00, "green": 0x06, "amber": 0x01, "red": 0x01, "mask": 0x07 + }, + "led_map": { + 0x00: "off", 0x06: "blue", 0x01: "amber" + }, + "PowerMax": 80.64, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"bus": 44, "addr": 0x0d, "offset": 0x90, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan7/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan7/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan7/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"bus": 44, "addr": 0x0d, "offset": 0x90, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan7/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan7/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan7/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN5", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-42/42-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "e2_type": ["wedge_v5", "fru"], + "present": {"loc": "/sys/s3ip/fan/fan5/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"bus": 44, "addr": 0x0d, "offset": 0x61, "way": "i2c"}, + "led_attrs": { + "off": 0x00, "green": 0x06, "amber": 0x01, "red": 0x01, "mask": 0x07 + }, + "led_map": { + 0x00: "off", 0x06: "blue", 0x01: "amber" + }, + "PowerMax": 80.64, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"bus": 44, "addr": 0x0d, "offset": 0x91, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan5/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan5/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan5/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"bus": 44, "addr": 0x0d, "offset": 0x91, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan5/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan5/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan5/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN3", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-41/41-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "e2_type": ["wedge_v5", "fru"], + "present": {"loc": "/sys/s3ip/fan/fan3/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"bus": 44, "addr": 0x0d, "offset": 0x62, "way": "i2c"}, + "led_attrs": { + "off": 0x00, "green": 0x06, "amber": 0x01, "red": 0x01, "mask": 0x07 + }, + "led_map": { + 0x00: "off", 0x06: "blue", 0x01: "amber" + }, + "PowerMax": 80.64, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"bus": 44, "addr": 0x0d, "offset": 0x92, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan3/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan3/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan3/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"bus": 44, "addr": 0x0d, "offset": 0x92, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan3/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan3/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan3/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN1", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-40/40-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "e2_type": ["wedge_v5", "fru"], + "present": {"loc": "/sys/s3ip/fan/fan1/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"bus": 44, "addr": 0x0d, "offset": 0x63, "way": "i2c"}, + "led_attrs": { + "off": 0x00, "green": 0x06, "amber": 0x01, "red": 0x01, "mask": 0x07 + }, + "led_map": { + 0x00: "off", 0x06: "blue", 0x01: "amber" + }, + "PowerMax": 80.64, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"bus": 44, "addr": 0x0d, "offset": 0x93, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan1/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan1/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan1/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"bus": 44, "addr": 0x0d, "offset": 0x93, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan1/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan1/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan1/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN8", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-51/51-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "e2_type": ["wedge_v5", "fru"], + "present": {"loc": "/sys/s3ip/fan/fan8/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"bus": 52, "addr": 0x0d, "offset": 0x60, "way": "i2c"}, + "led_attrs": { + "off": 0x00, "green": 0x06, "amber": 0x01, "red": 0x01, "mask": 0x07 + }, + "led_map": { + 0x00: "off", 0x06: "blue", 0x01: "amber" + }, + "PowerMax": 80.64, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"bus": 52, "addr": 0x0d, "offset": 0x90, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan8/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan8/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan8/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"bus": 52, "addr": 0x0d, "offset": 0x90, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan8/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan8/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan8/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN6", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-50/50-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "e2_type": ["wedge_v5", "fru"], + "present": {"loc": "/sys/s3ip/fan/fan6/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"bus": 52, "addr": 0x0d, "offset": 0x61, "way": "i2c"}, + "led_attrs": { + "off": 0x00, "green": 0x06, "amber": 0x01, "red": 0x01, "mask": 0x07 + }, + "led_map": { + 0x00: "off", 0x06: "blue", 0x01: "amber" + }, + "PowerMax": 80.64, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"bus": 52, "addr": 0x0d, "offset": 0x91, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan6/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan6/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan6/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"bus": 52, "addr": 0x0d, "offset": 0x91, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan6/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan6/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan6/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN4", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-49/49-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "e2_type": ["wedge_v5", "fru"], + "present": {"loc": "/sys/s3ip/fan/fan4/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"bus": 52, "addr": 0x0d, "offset": 0x62, "way": "i2c"}, + "led_attrs": { + "off": 0x00, "green": 0x06, "amber": 0x01, "red": 0x01, "mask": 0x07 + }, + "led_map": { + 0x00: "off", 0x06: "blue", 0x01: "amber" + }, + "PowerMax": 80.64, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"bus": 52, "addr": 0x0d, "offset": 0x92, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan4/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan4/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan4/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"bus": 52, "addr": 0x0d, "offset": 0x92, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan4/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan4/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan4/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN2", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-48/48-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "e2_type": ["wedge_v5", "fru"], + "present": {"loc": "/sys/s3ip/fan/fan2/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"bus": 52, "addr": 0x0d, "offset": 0x63, "way": "i2c"}, + "led_attrs": { + "off": 0x00, "green": 0x06, "amber": 0x01, "red": 0x01, "mask": 0x07 + }, + "led_map": { + 0x00: "off", 0x06: "blue", 0x01: "amber" + }, + "PowerMax": 80.64, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"bus": 52, "addr": 0x0d, "offset": 0x93, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan2/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan2/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan2/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"bus": 52, "addr": 0x0d, "offset": 0x93, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan2/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan2/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan2/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + ], + "cplds": [ + { + "name": "CPU CPLD", + "cpld_id": "CPLD1", + "VersionFile": {"loc": "/dev/cpld0", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for system power", + "slot": 0, + "warm": 0, + }, + { + "name": "SCM CPLD", + "cpld_id": "CPLD2", + "VersionFile": {"loc": "/dev/cpld1", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for base functions", + "slot": 0, + "warm": 0, + }, + { + "name": "MCB CPLD", + "cpld_id": "CPLD3", + "VersionFile": {"loc": "/dev/cpld3", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for base functions", + "slot": 0, + "warm": 0, + }, + { + "name": "SMB CPLD", + "cpld_id": "CPLD4", + "VersionFile": {"loc": "/dev/cpld4", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for sff modules", + "slot": 0, + "warm": 0, + }, + { + "name": "FCB_T CPLD", + "cpld_id": "CPLD5", + "VersionFile": {"loc": "/dev/cpld5", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for fan modules", + "slot": 0, + "warm": 0, + }, + { + "name": "FCB_B CPLD", + "cpld_id": "CPLD6", + "VersionFile": {"loc": "/dev/cpld6", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for fan modules", + "slot": 0, + "warm": 0, + }, + { + "name": "IOB FPGA", + "cpld_id": "CPLD7", + "VersionFile": {"loc": "/dev/fpga0", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for base functions", + "slot": 0, + "format": "little_endian", + "warm": 0, + }, + { + "name": "DOM FPGA", + "cpld_id": "CPLD8", + "VersionFile": {"loc": "/dev/fpga1", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for sff functions", + "slot": 0, + "format": "little_endian", + "warm": 0, + }, + { + "name": "BIOS", + "cpld_id": "CPLD9", + "VersionFile": {"cmd": "dmidecode -s bios-version", "way": "cmd"}, + "desc": "Performs initialization of hardware components during booting", + "slot": 0, + "type": "str", + "warm": 0, + }, + ], + "dcdc": [ + { + "name": "SCM_53134O_V1.0_V", + "dcdc_id": "DCDC1", + "Min": 900, + "value": { + "loc": "/sys/bus/i2c/devices/33-0040/hwmon/hwmon*/in1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 1100, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SCM_I210_V3.3_V", + "dcdc_id": "DCDC2", + "Min": 2970, + "value": { + "loc": "/sys/bus/i2c/devices/33-0040/hwmon/hwmon*/in2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 3630, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SCM_VDD3.3_V", + "dcdc_id": "DCDC3", + "Min": 2970, + "value": { + "loc": "/sys/bus/i2c/devices/33-0040/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 3630, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SCM_VDD12.0_V", + "dcdc_id": "DCDC4", + "Min": 10800, + "value": { + "loc": "/sys/bus/i2c/devices/33-0041/hwmon/hwmon*/in1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 13200, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SCM_OCM_V12.0_V", + "dcdc_id": "DCDC5", + "Min": 10800, + "value": { + "loc": "/sys/bus/i2c/devices/33-0041/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 13200, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SCM_SSD_V3.3_V", + "dcdc_id": "DCDC6", + "Min": 2970, + "value": { + "loc": "/sys/bus/i2c/devices/33-0042/hwmon/hwmon*/in1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 3630, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SCM_BMC_V3.3_V", + "dcdc_id": "DCDC7", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/33-0042/hwmon/hwmon*/in2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + 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"A", + "Max": 5100, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OE6_AVDD_TX_1.8_C", + "dcdc_id": "DCDC166", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/70-0066/hwmon/hwmon*/loopa_iout", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 10000, + "format": "float(float(%s)/1000)", + }, + + + { + "name": "OE6_AVDD_TX_1.2_C", + "dcdc_id": "DCDC167", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/70-0066/hwmon/hwmon*/loopb_iout", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 9000, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OE6_AVDD_TRX_0.75_C", + "dcdc_id": "DCDC168", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/70-005e/hwmon/hwmon*/loopa_iout", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 9500, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OE7_AVDD_RX_1.8_C", + "dcdc_id": "DCDC169", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/67-006e/hwmon/hwmon*/loopa_iout", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 2000, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OE7_AVDD_RX_1.2_C", + "dcdc_id": "DCDC170", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/67-006e/hwmon/hwmon*/loopb_iout", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 5100, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OE7_AVDD_TX_1.8_C", + "dcdc_id": "DCDC171", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/67-0066/hwmon/hwmon*/loopa_iout", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 10000, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OE7_AVDD_TX_1.2_C", + "dcdc_id": "DCDC172", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/67-0066/hwmon/hwmon*/loopb_iout", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 9000, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OE7_AVDD_TRX_0.75_C", + "dcdc_id": "DCDC173", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/67-005e/hwmon/hwmon*/loopa_iout", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 9500, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OE_HCSL_PLL_VDD2.5_C", + "dcdc_id": "DCDC174", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/59-0040/hwmon/hwmon*/curr2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 2000, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OE_VDD_1.8_C", + "dcdc_id": "DCDC175", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/59-0040/hwmon/hwmon*/curr3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 550, + "format": "float(float(%s)/1000)", + }, + + { + "name": "RLML_VDD V3.3_C", + "dcdc_id": "DCDC176", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/71-0068/hwmon/hwmon*/loopa_iout", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 30000, + "format": "float(float(%s)/1000)", + }, + + { + "name": "RLMH_VDD V3.3_C", + "dcdc_id": "DCDC177", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/71-0068/hwmon/hwmon*/loopb_iout", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 30000, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SMB_CLK_VDD3.3_C", + "dcdc_id": "DCDC178", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/59-0040/hwmon/hwmon*/curr1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 1100, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SMB_CLK2_VDD1.8_C", + "dcdc_id": "DCDC179", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/56-0041/hwmon/hwmon*/curr3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 1100, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SMB_CLK_VDD1.8_C", + "dcdc_id": "DCDC180", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/56-0041/hwmon/hwmon*/curr2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 1100, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SMB_FPGA_VDD1.8_C", + "dcdc_id": "DCDC181", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/62-0040/hwmon/hwmon*/curr3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 550, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SMB_VDD_5.0_C", + "dcdc_id": "DCDC182", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/60-0040/hwmon/hwmon*/curr2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 3300, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SMB_FPGA_V1.0_C", + "dcdc_id": "DCDC183", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/62-0040/hwmon/hwmon*/curr2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 1188, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SMB_FPGA_V1.2_C", + "dcdc_id": "DCDC184", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/57-0040/hwmon/hwmon*/curr1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 550, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SMB_VDD_3.3_C", + "dcdc_id": "DCDC185", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/63-0040/hwmon/hwmon*/curr1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 1550, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SMB_CPLD_VDD_1.8_C", + "dcdc_id": "DCDC186", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/63-0040/hwmon/hwmon*/curr2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 330, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MCB_FPGA_VDD1.0_C", + "dcdc_id": "DCDC187", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/12-0040/hwmon/hwmon*/curr1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 1188, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MCB_FPGA_VDD1.8_C", + "dcdc_id": "DCDC188", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/12-0040/hwmon/hwmon*/curr2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 550, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MCB_FPGA_VDD1.2_C", + "dcdc_id": "DCDC189", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/12-0040/hwmon/hwmon*/curr3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 550, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MCB_CPLD_VDD3.3_C", + "dcdc_id": "DCDC190", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/12-0041/hwmon/hwmon*/curr1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 550, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MCB_VDD3.3_C", + "dcdc_id": "DCDC191", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/12-0041/hwmon/hwmon*/curr2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 550, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MCB_FPGA_VDD3.3_C", + "dcdc_id": "DCDC192", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/12-0041/hwmon/hwmon*/curr3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 550, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MCB_LEDL_VDD3.3_C", + "dcdc_id": "DCDC210", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/91-0042/hwmon/hwmon*/curr1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 1200, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MCB_LEDR_VDD3.3_C", + "dcdc_id": "DCDC211", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/91-0042/hwmon/hwmon*/curr2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 1200, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OCM_XDPE_VCCIN_C", + "dcdc_id": "DCDC193", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/5-0070/hwmon/hwmon*/loopa_iout", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 147000, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OCM_XDPE_P1V8_C", + "dcdc_id": "DCDC194", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/5-0070/hwmon/hwmon*/loopb_iout", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 2300, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OCM_XDPE_P1V05_C", + "dcdc_id": "DCDC195", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/5-006e/hwmon/hwmon*/loopa_iout", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 14300, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OCM_XDPE_VNN_PCH_C", + "dcdc_id": "DCDC196", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/5-006e/hwmon/hwmon*/loopb_iout", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 7400, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OCM_XDPE_VNN_NAC_C", + "dcdc_id": "DCDC197", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/5-0068/hwmon/hwmon*/loopa_iout", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 22000, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OCM_XDPE_VCC_ANA_C", + "dcdc_id": "DCDC198", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/5-0068/hwmon/hwmon*/loopb_iout", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 2210, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OCM_XDPE_P1V2_VDDQ_C", + "dcdc_id": "DCDC199", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/5-005e/hwmon/hwmon*/loopa_iout", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 19000, + "format": "float(float(%s)/1000)", + }, + + { + "name": "FAN1_VDD12_C", + "dcdc_id": "DCDC200", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/88-0042/hwmon/hwmon*/curr1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 10000, + "format": "float(float(%s)/1000)", + }, + + { + "name": "FAN2_VDD12_C", + "dcdc_id": "DCDC201", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/89-0042/hwmon/hwmon*/curr2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 10000, + "format": "float(float(%s)/1000)", + }, + + { + "name": "FAN3_VDD12_C", + "dcdc_id": "DCDC202", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/88-0042/hwmon/hwmon*/curr2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 10000, + "format": "float(float(%s)/1000)", + }, + + { + "name": "FAN4_VDD12_C", + "dcdc_id": "DCDC203", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/89-0042/hwmon/hwmon*/curr3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 10000, + "format": "float(float(%s)/1000)", + }, + + { + "name": "FAN5_VDD12_C", + "dcdc_id": "DCDC204", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/88-0042/hwmon/hwmon*/curr3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 10000, + "format": "float(float(%s)/1000)", + }, + + { + "name": "FAN6_VDD12_C", + "dcdc_id": "DCDC205", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/90-0042/hwmon/hwmon*/curr1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 10000, + "format": "float(float(%s)/1000)", + }, + + { + "name": "FAN7_VDD12_C", + "dcdc_id": "DCDC206", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/89-0042/hwmon/hwmon*/curr1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 10000, + "format": "float(float(%s)/1000)", + }, + + { + "name": "FAN8_VDD12_C", + "dcdc_id": "DCDC207", + "Min": -3100, + "value": { + "loc": "/sys/bus/i2c/devices/90-0042/hwmon/hwmon*/curr2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "A", + "Max": 10000, + "format": "float(float(%s)/1000)", + }, + ], + "cpu": [ + { + "name": "cpu", + "reboot_cause_path": "/etc/sonic/.reboot/.previous-reboot-cause.txt" + } + ], + "sfps": { + "ver": '3.0', + "port_index_start": 1, + "port_num": 128, + "log_level": 2, + "eeprom_retry_times": 5, + "eeprom_retry_break_sec": 0.2, + "presence_val_is_present": 0, + "eeprom_path": "/sys/bus/i2c/devices/i2c-%d/%d-0050/eeprom", + "eeprom_path_key": [24] * 16 + [25] * 16 + [26] * 16 + [27] * 16 + [28] * 16 + [29] * 16 + [30] * 16 + [31] * 16 + } +} diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/hal-config/x86_64_micas_m2_w6940_128x1_fr4_r0_0x40d9_v01_dc_monitor.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/hal-config/x86_64_micas_m2_w6940_128x1_fr4_r0_0x40d9_v01_dc_monitor.py new file mode 100755 index 00000000000..78d2bbbaf0c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/hal-config/x86_64_micas_m2_w6940_128x1_fr4_r0_0x40d9_v01_dc_monitor.py @@ -0,0 +1,239 @@ +# coding:utf-8 + + +monitor = { + "openloop": { + "linear": { + "name": "linear", + "flag": 0, + "pwm_min": 0x66, + "pwm_max": 0xcc, + "K": 11, + "tin_min": 38, + }, + "curve": { + "name": "curve", + "flag": 1, + "pwm_min": 0x66, + "pwm_max": 0xcc, + "a": -0.0249, + "b": 8.1615, + "c": -60.326, + "tin_min": 25, + }, + }, + + "pid": { + "CPU_TEMP": { + "name": "CPU_TEMP", + "flag": 1, + "type": "duty", + "pwm_min": 0x66, + "pwm_max": 0xcc, + "Kp": 0.8, + "Ki": 0.4, + "Kd": 0.3, + "target": 85, + "value": [None, None, None], + }, + "SWITCH_TEMP": { + "name": "SWITCH_TEMP", + "flag": 1, + "type": "duty", + "pwm_min": 0x66, + "pwm_max": 0xcc, + "Kp": 1.5, + "Ki": 1, + "Kd": 0.3, + "target": 80, + "value": [None, None, None], + }, + "OUTLET_TEMP": { + "name": "OUTLET_TEMP", + "flag": 1, + "type": "duty", + "pwm_min": 0x66, + "pwm_max": 0xcc, + "Kp": 2, + "Ki": 0.4, + "Kd": 0.3, + "target": 65, + "value": [None, None, None], + }, + "RLM_TEMP": { + "name": "RLM_TEMP", + "flag": 1, + "type": "duty", + "pwm_min": 0x66, + "pwm_max": 0xcc, + "Kp": 0.1, + "Ki": 0.4, + "Kd": 0, + "target": 40, + "value": [None, None, None], + }, + "BOARD_TEMP": { + "name": "BOARD_TEMP", + "flag": 1, + "type": "duty", + "pwm_min": 0x66, + "pwm_max": 0xcc, + "Kp": 2, + "Ki": 0.4, + "Kd": 0.3, + "target": 65, + "value": [None, None, None], + }, + "MOS_TEMP": { + "name": "MOS_TEMP", + "flag": 1, + "type": "duty", + "pwm_min": 0x66, + "pwm_max": 0xcc, + "Kp": 1, + "Ki": 0.4, + "Kd": 0.3, + "target": 85, + "value": [None, None, None], + }, + "Tout-Tin": { + "name": "Tout-Tin", + "flag": 0, + "type": "duty", + "pwm_min": 0x66, + "pwm_max": 0xcc, + "Kp": 8, + "Ki": 0.1, + "Kd": 0.4, + "target": 12, + "value": [None, None, None], + }, + "OE_TEMP": { + "name": "OE_TEMP", + "flag": 1, + "type": "duty", + "pwm_min": 0x66, # 40%(0x66 = 102, 102/255=0.4) + "pwm_max": 0xcc, # 80%(0xcc = 204, 204/255=0.8) + "Kp": 1.5, + "Ki": 1, + "Kd": 0.3, + "target": 85, + "value": [None, None, None], + } + }, + + "temps_threshold": { + "SWITCH_TEMP": {"name": "SWITCH_TEMP", "warning": 100, "critical": 105, "invalid": -100000, "error": -99999}, + "INLET_TEMP": {"name": "INLET_TEMP", "warning": 50, "critical": 55}, + "OUTLET_TEMP": {"name": "OUTLET_TEMP", "warning": 70, "critical": 75}, + "CPU_TEMP": {"name": "CPU_TEMP", "warning": 95, "critical": 99}, + "RLM_TEMP": {"name": "RLM_TEMP", "warning": 50, "critical": 55, "invalid": -100000, "error": -99999}, + #"Tout-Tin": {"name": "Tout-Tin", "warning": 15, "critical": 20}, + "OE_TEMP": {"name": "OE_TEMP", "warning": 95, "critical": 100, "invalid": -100000, "error": -99999}, + "BOARD_TEMP": {"name": "BOARD_TEMP", "warning": 70, "critical": 75}, + "MOS_TEMP": {"name": "MOS_TEMP", "warning": 110, "critical": 125}, + }, + + "fancontrol_para": { + "interval": 5, + "max_pwm": 0xff, + "min_pwm": 0x66, + "abnormal_pwm": 0xcc, + "warning_pwm": 0xcc, + "critical_pwm": 0xcc, + "temp_invalid_pid_pwm": 0x66, + "temp_error_pid_pwm": 0x66, + "temp_fail_num": 3, + "check_temp_fail": [ + {"temp_name": "INLET_TEMP"}, + {"temp_name": "SWITCH_TEMP"}, + {"temp_name": "CPU_TEMP"}, + {"temp_name": "MOS_TEMP"}, + {"temp_name": "BOARD_TEMP"}, + {"temp_name": "OUTLET_TEMP"}, + {"temp_name": "OE_TEMP"}, + ], + "check_temp_critical_reboot": [ + ["SWITCH_TEMP"], + ["OE_TEMP"], + ["INLET_TEMP", "OUTLET_TEMP", "CPU_TEMP", "RLM_TEMP", "BOARD_TEMP", "MOS_TEMP"], + ], + "temp_warning_num": 3, # temp over warning 3 times continuously + "temp_critical_num": 3, # temp over critical 3 times continuously + "temp_warning_countdown": 60, # 5 min warning speed after not warning + "temp_critical_countdown": 60, # 5 min full speed after not critical + "rotor_error_count": 6, # fan rotor error 6 times continuously + "inlet_mac_diff": 999, + "check_crit_reboot_flag": 1, + "check_crit_reboot_num": 3, + "check_crit_sleep_time": 20, + "psu_fan_control": 1, + "psu_absent_fullspeed_num": 0xFF, + "fan_absent_fullspeed_num": 1, + "rotor_error_fullspeed_num": 1, + "deal_over_temp_reboot_cmd": [ + {"way": "devfile", "loc": "/dev/cpld5", "offset": 0x22, "value": [0x00]}, # disable fan watchdog + {"way": "devfile", "loc": "/dev/cpld6", "offset": 0x22, "value": [0x00]}, # disable fan watchdog + {"way": "devfile", "loc": "/dev/cpld1", "offset": 0x15, "value": [0x0c]}, # cpu powroff + ], + "deal_over_temp_reboot_pwm": 0x80, # set pwm=50% + }, + + "ledcontrol_para": { + "interval": 5, + "checkpsu": 1, # 0: sys led don't follow psu led + "checkfan": 1, # 0: sys led don't follow fan led + "checksmb": 1, # 0: sys led don't follow smb led + "psu_amber_num": 2, + "psu_green_num": 1, # only psuerrnum <= this, psu led will be set green + "fan_amber_num": 1, + "sysled_check_temp": 0, + "sysled_check_fw_up": 1, + "smbled_ctrl": 1, + "board_sys_led": [ + {"led_name": "FRONT_SYS_LED"}, + ], + "board_psu_led": [ + {"led_name": "FRONT_PSU_LED"}, + ], + "board_fan_led": [ + {"led_name": "FRONT_FAN_LED"}, + ], + "board_smb_led": [ + {"led_name": "SMB_FRU_LED"}, + ], + "board_smb_fru_led": [ + {"led_name": "FRONT_SMB_LED"}, + ], + "board_smb_fru_dcdc_sensors": [ + "^MAC_", "^OE", "^RLM", "^SMB_", + ], + "board_smb_fru_temps": [ + "SWITCH_TEMP", "BOARD_TEMP", "MOS_TEMP", "OE_TEMP", "RLM_TEMP", + ], + "board_scm_fru_led": [ + {"led_name": "SCM_FRU_LED"}, + ], + "board_scm_fru_dcdc_sensors": [ + "^SCM_", "^OCM_", + ], + "board_scm_fru_temps": [ + "CPU_TEMP", "INLET_TEMP", + ], + "psu_air_flow_monitor": 0, + "fan_air_flow_monitor": 0, + "psu_air_flow_amber_num": 0, + "fan_air_flow_amber_num": 0, + }, + + "fw_upgrade_check": [ + [ + {"gettype": "file_exist", "judge_file": "/etc/sonic/.doing_fw_upg", "okval": True}, + ], + ], + + "otp_reboot_judge_file": { + "otp_switch_reboot_judge_file": "/etc/.otp_switch_reboot_flag", + "otp_other_reboot_judge_file": "/etc/.otp_other_reboot_flag", + }, +} diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/hal-config/x86_64_micas_m2_w6940_128x1_fr4_r0_device.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/hal-config/x86_64_micas_m2_w6940_128x1_fr4_r0_device.py new file mode 100755 index 00000000000..572c6b2273c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/hal-config/x86_64_micas_m2_w6940_128x1_fr4_r0_device.py @@ -0,0 +1,2050 @@ +#!/usr/bin/python3 + +psu_fan_airflow = { + "intake": ['DLK3000AN12C31', 'CRPS3000CL', 'ECDL3000123'], + "exhaust": [] +} + +fanairflow = { + "intake": ['M2EFAN V-F'], + "exhaust": [], +} + +psu_display_name = { + "PA3000I-F": ['DLK3000AN12C31', 'CRPS3000CL', 'ECDL3000123'], +} + +psutypedecode = { + 0x00: 'N/A', + 0x01: 'AC', + 0x02: 'DC', +} + +class Unit: + Temperature = "C" + Voltage = "V" + Current = "A" + Power = "W" + Speed = "RPM" + +class threshold: + PSU_TEMP_MIN = -5 * 1000 + PSU_TEMP_MAX = 55 * 1000 + + PSU_FAN_SPEED_MIN = 3500 + PSU_FAN_SPEED_MAX = 32950 + + PSU_OUTPUT_VOLTAGE_MIN = 11 * 1000 + PSU_OUTPUT_VOLTAGE_MAX = 13 * 1000 + + PSU_AC_INPUT_VOLTAGE_MIN = 90 * 1000 + PSU_AC_INPUT_VOLTAGE_MAX = 264 * 1000 + + PSU_DC_INPUT_VOLTAGE_MIN = 180 * 1000 + PSU_DC_INPUT_VOLTAGE_MAX = 320 * 1000 + + ERR_VALUE = -9999999 + + PSU_OUTPUT_POWER_MIN = 0 * 1000 * 1000 + PSU_OUTPUT_POWER_MAX = 3000 * 1000 * 1000 + + PSU_INPUT_POWER_MIN = 0 * 1000 * 1000 + PSU_INPUT_POWER_MAX = 3100 * 1000 * 1000 + + PSU_OUTPUT_CURRENT_MIN = 0 * 1000 + PSU_OUTPUT_CURRENT_MAX = 246 * 1000 + + PSU_INPUT_CURRENT_MIN = 0 * 1000 + PSU_INPUT_CURRENT_MAX = 20 * 1000 + + FRONT_FAN_SPEED_MAX = 11700 + REAR_FAN_SPEED_MAX = 10200 + FAN_SPEED_MIN = 2000 + +devices = { + "onie_e2": [ + { + "name": "ONIE_E2", + "e2loc": {"loc": "/sys/bus/i2c/devices/1-0056/eeprom", "way": "sysfs"}, + "airflow": "intake" + }, + ], + "psus": [ + { + "e2loc": {"loc": "/sys/bus/i2c/devices/11-0050/eeprom", "way": "sysfs"}, + "pmbusloc": {"bus": 11, "addr": 0x58, "way": "i2c"}, + "present": {"loc": "/sys/s3ip/psu/psu1/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "name": "PSU1", + "psu_display_name": psu_display_name, + "psu_display_name": psu_display_name, + "airflow": psu_fan_airflow, + "TempStatus": {"bus": 11, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0004}, + "Temperature": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-11/11-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": threshold.PSU_TEMP_MIN, + "Max": threshold.PSU_TEMP_MAX, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + }, + "FanStatus": {"bus": 11, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0400}, + "FanSpeed": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-11/11-0058/hwmon/hwmon*/fan1_input", "way": "sysfs"}, + "Min": threshold.PSU_FAN_SPEED_MIN, + "Max": threshold.PSU_FAN_SPEED_MAX, + "Unit": Unit.Speed + }, + "psu_fan_tolerance": 40, + "InputsStatus": {"bus": 11, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x2000}, + "InputsType": {"bus": 11, "addr": 0x58, "offset": 0x80, "way": "i2c", 'psutypedecode': psutypedecode}, + "InputsVoltage": { + 'AC': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-11/11-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": threshold.PSU_AC_INPUT_VOLTAGE_MIN, + "Max": threshold.PSU_AC_INPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + + }, + 'DC': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-11/11-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": threshold.PSU_DC_INPUT_VOLTAGE_MIN, + "Max": threshold.PSU_DC_INPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + }, + 'other': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-11/11-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": threshold.ERR_VALUE, + "Max": threshold.ERR_VALUE, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + } + }, + "InputsCurrent": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-11/11-0058/hwmon/hwmon*/curr1_input", "way": "sysfs"}, + "Min": threshold.PSU_INPUT_CURRENT_MIN, + "Max": threshold.PSU_INPUT_CURRENT_MAX, + "Unit": Unit.Current, + "format": "float(float(%s)/1000)" + }, + "InputsPower": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-11/11-0058/hwmon/hwmon*/power1_input", "way": "sysfs"}, + "Min": threshold.PSU_INPUT_POWER_MIN, + "Max": threshold.PSU_INPUT_POWER_MAX, + "Unit": Unit.Power, + "format": "float(float(%s)/1000000)" + }, + "OutputsStatus": {"bus": 11, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x8800}, + "OutputsVoltage": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-11/11-0058/hwmon/hwmon*/in2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_VOLTAGE_MIN, + "Max": threshold.PSU_OUTPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + }, + "OutputsCurrent": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-11/11-0058/hwmon/hwmon*/curr2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_CURRENT_MIN, + "Max": threshold.PSU_OUTPUT_CURRENT_MAX, + "Unit": Unit.Current, + "format": "float(float(%s)/1000)" + }, + "OutputsPower": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-11/11-0058/hwmon/hwmon*/power2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_POWER_MIN, + "Max": threshold.PSU_OUTPUT_POWER_MAX, + "Unit": Unit.Power, + "format": "float(float(%s)/1000000)" + }, + }, + { + "e2loc": {"loc": "/sys/bus/i2c/devices/10-0050/eeprom", "way": "sysfs"}, + "pmbusloc": {"bus": 10, "addr": 0x58, "way": "i2c"}, + "present": {"loc": "/sys/s3ip/psu/psu2/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "name": "PSU2", + "psu_display_name": psu_display_name, + "airflow": psu_fan_airflow, + "TempStatus": {"bus": 10, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0004}, + "Temperature": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-10/10-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": threshold.PSU_TEMP_MIN, + "Max": threshold.PSU_TEMP_MAX, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + }, + "FanStatus": {"bus": 10, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0400}, + "FanSpeed": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-10/10-0058/hwmon/hwmon*/fan1_input", "way": "sysfs"}, + "Min": threshold.PSU_FAN_SPEED_MIN, + "Max": threshold.PSU_FAN_SPEED_MAX, + "Unit": Unit.Speed + }, + "psu_fan_tolerance": 40, + "InputsStatus": {"bus":10, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x2000}, + "InputsType": {"bus": 10, "addr": 0x58, "offset": 0x80, "way": "i2c", 'psutypedecode': psutypedecode}, + "InputsVoltage": { + 'AC': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-10/10-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": threshold.PSU_AC_INPUT_VOLTAGE_MIN, + "Max": threshold.PSU_AC_INPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + + }, + 'DC': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-10/10-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": threshold.PSU_DC_INPUT_VOLTAGE_MIN, + "Max": threshold.PSU_DC_INPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + }, + 'other': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-10/10-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": threshold.ERR_VALUE, + "Max": threshold.ERR_VALUE, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + } + }, + "InputsCurrent": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-10/10-0058/hwmon/hwmon*/curr1_input", "way": "sysfs"}, + "Min": threshold.PSU_INPUT_CURRENT_MIN, + "Max": threshold.PSU_INPUT_CURRENT_MAX, + "Unit": Unit.Current, + "format": "float(float(%s)/1000)" + }, + "InputsPower": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-10/10-0058/hwmon/hwmon*/power1_input", "way": "sysfs"}, + "Min": threshold.PSU_INPUT_POWER_MIN, + "Max": threshold.PSU_INPUT_POWER_MAX, + "Unit": Unit.Power, + "format": "float(float(%s)/1000000)" + }, + "OutputsStatus": {"bus": 10, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x8800}, + "OutputsVoltage": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-10/10-0058/hwmon/hwmon*/in2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_VOLTAGE_MIN, + "Max": threshold.PSU_OUTPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + }, + "OutputsCurrent": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-10/10-0058/hwmon/hwmon*/curr2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_CURRENT_MIN, + "Max": threshold.PSU_OUTPUT_CURRENT_MAX, + "Unit": Unit.Current, + "format": "float(float(%s)/1000)" + }, + "OutputsPower": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-10/10-0058/hwmon/hwmon*/power2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_POWER_MIN, + "Max": threshold.PSU_OUTPUT_POWER_MAX, + "Unit": Unit.Power, + "format": "float(float(%s)/1000000)" + }, + }, + ], + "temps": [ + { + "name": "CPU_TEMP", + "temp_id": "TEMP1", + "api_name": "CPU", + "Temperature": { + "value": {"loc": "/sys/bus/platform/devices/coretemp.0/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": -30000, + "Low": -10000, + "High": 100000, + "Max": 102000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "INLET_TEMP", + "temp_id": "TEMP2", + "api_name": "Inlet", + "Temperature": { + "value": {"loc": "/sys/bus/i2c/devices/35-004d/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": -37000, + "Low": -27000, + "High": 53000, + "Max": 58000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)-3" + } + }, + { + "name": "OUTLET_TEMP", + "temp_id": "TEMP3", + "api_name": "Outlet", + "Temperature": { + "value": [ + {"loc": "/sys/bus/i2c/devices/8-0048/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + {"loc": "/sys/bus/i2c/devices/8-0049/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + {"loc": "/sys/bus/i2c/devices/9-0048/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + {"loc": "/sys/bus/i2c/devices/9-0049/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + ], + "Min": -30000, + "Low": -20000, + "High": 70000, + "Max": 75000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "BOARD_TEMP", + "temp_id": "TEMP4", + "api_name": "Board", + "Temperature": { + "value": {"loc": "/sys/bus/i2c/devices/14-0048/hwmon/*/temp1_input", "way": "sysfs"}, + "Min": -30000, + "Low": -10000, + "High": 70000, + "Max": 75000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "SWITCH_TEMP", + "temp_id": "TEMP5", + "api_name": "ASIC_TEMP", + "Temperature": { + "value": {"loc": "/sys/s3ip/temp_sensor/temp2/value", "way": "sysfs"}, + "Min": -30000, + "Low": -20000, + "High": 100000, + "Max": 105000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + }, + "invalid": -100000, + "error": -99999, + }, + { + "name": "PSU1_TEMP", + "temp_id": "TEMP6", + "Temperature": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-11/11-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": -10000, + "Low": -5000, + "High": 50000, + "Max": 55000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "PSU2_TEMP", + "temp_id": "TEMP7", + "Temperature": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-10/10-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": -10000, + "Low": -5000, + "High": 50000, + "Max": 55000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "OE_TEMP", + "temp_id": "TEMP8", + "api_name": "OE_TEMP", + "Temperature": { + "value": {"loc": "/etc/sonic/highest_oe_temp", "way": "sysfs", "flock_path": "/etc/sonic/highest_oe_temp"}, + "Min": -30000, + "Low": -20000, + "High": 100000, + "Max": 105000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + }, + "invalid": -100000, + "error": -99999, + }, + { + "name": "RLM_TEMP", + "temp_id": "TEMP9", + "api_name": "RLM_TEMP", + "Temperature": { + "value": {"loc": "/etc/sonic/highest_rlm_temp", "way": "sysfs", "flock_path": "/etc/sonic/highest_rlm_temp"}, + "Min": -40000, + "Low": -30000, + "High": 40000, + "Max": 45000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + }, + "invalid": -100000, + "error": -99999, + }, + { + "name": "MOS_TEMP", + "temp_id": "TEMP10", + "api_name": "MOSFET_TEMP", + "Temperature": { + "value": {"loc": "/sys/bus/i2c/devices/64-0040/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": -30000, + "Low": -20000, + "High": 110000, + "Max": 125000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "Tout-Tin", + "Temperature": { + "value": { + "val_conf_list": [ + {"loc": "/sys/bus/i2c/devices/8-0048/hwmon/hwmon*/temp1_input", "way": "sysfs", "fail_val":-99999000}, + {"loc": "/sys/bus/i2c/devices/8-0049/hwmon/hwmon*/temp1_input", "way": "sysfs", "fail_val":-99999000}, + {"loc": "/sys/bus/i2c/devices/9-0048/hwmon/hwmon*/temp1_input", "way": "sysfs", "fail_val":-99999000}, + {"loc": "/sys/bus/i2c/devices/9-0049/hwmon/hwmon*/temp1_input", "way": "sysfs", "fail_val":-99999000}, + {"loc": "/sys/bus/i2c/devices/35-004d/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + ], + "fail_conf_set_list": [ + {0,1,2,3}, + ], + "format": "float(float(max(%s,%s,%s,%s)-float(%s))/1000)+3" + }, + #"Min": -10000, + #"Low": 0, + "High": 15000, + "Max": 20000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + ], + "leds": [ + { + "name": "FRONT_SYS_LED", + "led_type": "SYS_LED", + "led": {"loc": "/dev/cpld1", "offset": 0x50, "len": 1, "way": "devfile"}, + "led_attrs": { + "off": 0x00, "green": 0x02, "amber": 0x06, "red": 0x06, "mask": 0x07, + "flash": 0x01, "amber_flash": 0x05, + }, + "led_map": { + 0x00: "off", 0x02: "blue", 0x06: "amber", 0x01: "blue/amber alternate flashing", + 0x05: "amber flashing" + } + }, + { + "name": "FRONT_PSU_LED", + "led_type": "PSU_LED", + "led": {"loc": "/dev/cpld1", "offset": 0x51, "len": 1, "way": "devfile"}, + "led_attrs": { + "off": 0x00, "green": 0x02, "amber": 0x06, "red": 0x06, "mask": 0x07 + }, + "led_map": { + 0x00: "off", 0x02: "blue", 0x06: "amber" + } + }, + { + "name": "FRONT_SMB_LED", + "led_type": "SMB_LED", + + "led": {"loc": "/dev/cpld1", "offset": 0x52, "len": 1, "way": "devfile"}, + "led_attrs": { + "off": 0x00, "green": 0x02, "amber": 0x06, "red": 0x06, "mask": 0x07 + }, + "led_map": { + 0x00: "off", 0x02: "blue", 0x06: "amber" + } + }, + { + "name": "FRONT_FAN_LED", + "led_type": "FAN_LED", + "led": {"loc": "/dev/cpld1", "offset": 0x53, "len": 1, "way": "devfile"}, + "led_attrs": { + "off": 0x00, "green": 0x02, "amber": 0x06, "red": 0x06, "mask": 0x07 + }, + "led_map": { + 0x00: "off", 0x02: "blue", 0x06: "amber" + } + }, + ], + "fans": [ + { + "name": "FAN7", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-43/43-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "e2_type": ["wedge_v5", "fru"], + "present": {"loc": "/sys/s3ip/fan/fan7/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"bus": 44, "addr": 0x0d, "offset": 0x60, "way": "i2c"}, + "led_attrs": { + "off": 0x00, "green": 0x06, "amber": 0x01, "red": 0x01, "mask": 0x07 + }, + "led_map": { + 0x00: "off", 0x06: "blue", 0x01: "amber" + }, + "PowerMax": 80.64, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"bus": 44, "addr": 0x0d, "offset": 0x90, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan7/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan7/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan7/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"bus": 44, "addr": 0x0d, "offset": 0x90, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan7/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan7/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan7/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN5", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-42/42-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "e2_type": ["wedge_v5", "fru"], + "present": {"loc": "/sys/s3ip/fan/fan5/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"bus": 44, "addr": 0x0d, "offset": 0x61, "way": "i2c"}, + "led_attrs": { + "off": 0x00, "green": 0x06, "amber": 0x01, "red": 0x01, "mask": 0x07 + }, + "led_map": { + 0x00: "off", 0x06: "blue", 0x01: "amber" + }, + "PowerMax": 80.64, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"bus": 44, "addr": 0x0d, "offset": 0x91, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan5/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan5/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan5/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"bus": 44, "addr": 0x0d, "offset": 0x91, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan5/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan5/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan5/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN3", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-41/41-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "e2_type": ["wedge_v5", "fru"], + "present": {"loc": "/sys/s3ip/fan/fan3/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"bus": 44, "addr": 0x0d, "offset": 0x62, "way": "i2c"}, + "led_attrs": { + "off": 0x00, "green": 0x06, "amber": 0x01, "red": 0x01, "mask": 0x07 + }, + "led_map": { + 0x00: "off", 0x06: "blue", 0x01: "amber" + }, + "PowerMax": 80.64, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"bus": 44, "addr": 0x0d, "offset": 0x92, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan3/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan3/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan3/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"bus": 44, "addr": 0x0d, "offset": 0x92, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan3/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan3/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan3/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN1", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-40/40-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "e2_type": ["wedge_v5", "fru"], + "present": {"loc": "/sys/s3ip/fan/fan1/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"bus": 44, "addr": 0x0d, "offset": 0x63, "way": "i2c"}, + "led_attrs": { + "off": 0x00, "green": 0x06, "amber": 0x01, "red": 0x01, "mask": 0x07 + }, + "led_map": { + 0x00: "off", 0x06: "blue", 0x01: "amber" + }, + "PowerMax": 80.64, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"bus": 44, "addr": 0x0d, "offset": 0x93, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan1/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan1/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan1/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"bus": 44, "addr": 0x0d, "offset": 0x93, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan1/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan1/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan1/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN8", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-51/51-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "e2_type": ["wedge_v5", "fru"], + "present": {"loc": "/sys/s3ip/fan/fan8/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"bus": 52, "addr": 0x0d, "offset": 0x60, "way": "i2c"}, + "led_attrs": { + "off": 0x00, "green": 0x06, "amber": 0x01, "red": 0x01, "mask": 0x07 + }, + "led_map": { + 0x00: "off", 0x06: "blue", 0x01: "amber" + }, + "PowerMax": 80.64, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"bus": 52, "addr": 0x0d, "offset": 0x90, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan8/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan8/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan8/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"bus": 52, "addr": 0x0d, "offset": 0x90, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan8/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan8/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan8/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN6", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-50/50-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "e2_type": ["wedge_v5", "fru"], + "present": {"loc": "/sys/s3ip/fan/fan6/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"bus": 52, "addr": 0x0d, "offset": 0x61, "way": "i2c"}, + "led_attrs": { + "off": 0x00, "green": 0x06, "amber": 0x01, "red": 0x01, "mask": 0x07 + }, + "led_map": { + 0x00: "off", 0x06: "blue", 0x01: "amber" + }, + "PowerMax": 80.64, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"bus": 52, "addr": 0x0d, "offset": 0x91, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan6/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan6/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan6/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"bus": 52, "addr": 0x0d, "offset": 0x91, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan6/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan6/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan6/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN4", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-49/49-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "e2_type": ["wedge_v5", "fru"], + "present": {"loc": "/sys/s3ip/fan/fan4/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"bus": 52, "addr": 0x0d, "offset": 0x62, "way": "i2c"}, + "led_attrs": { + "off": 0x00, "green": 0x06, "amber": 0x01, "red": 0x01, "mask": 0x07 + }, + "led_map": { + 0x00: "off", 0x06: "blue", 0x01: "amber" + }, + "PowerMax": 80.64, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"bus": 52, "addr": 0x0d, "offset": 0x92, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan4/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan4/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan4/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"bus": 52, "addr": 0x0d, "offset": 0x92, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan4/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan4/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan4/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN2", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-48/48-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "e2_type": ["wedge_v5", "fru"], + "present": {"loc": "/sys/s3ip/fan/fan2/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"bus": 52, "addr": 0x0d, "offset": 0x63, "way": "i2c"}, + "led_attrs": { + "off": 0x00, "green": 0x06, "amber": 0x01, "red": 0x01, "mask": 0x07 + }, + "led_map": { + 0x00: "off", 0x06: "blue", 0x01: "amber" + }, + "PowerMax": 80.64, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"bus": 52, "addr": 0x0d, "offset": 0x93, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan2/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan2/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan2/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"bus": 52, "addr": 0x0d, "offset": 0x93, "way": "i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan2/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan2/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan2/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + ], + "cplds": [ + { + "name": "CPU CPLD", + "cpld_id": "CPLD1", + "VersionFile": {"loc": "/dev/cpld0", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for system power", + "slot": 0, + "warm": 0, + }, + { + "name": "SCM CPLD", + "cpld_id": "CPLD2", + "VersionFile": {"loc": "/dev/cpld1", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for base functions", + "slot": 0, + "warm": 0, + }, + { + "name": "MCB CPLD", + "cpld_id": "CPLD3", + "VersionFile": {"loc": "/dev/cpld3", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for base functions", + "slot": 0, + "warm": 0, + }, + { + "name": "SMB CPLD", + "cpld_id": "CPLD4", + "VersionFile": {"loc": "/dev/cpld4", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for sff modules", + "slot": 0, + "warm": 0, + }, + { + "name": "FCB_T CPLD", + "cpld_id": "CPLD5", + "VersionFile": {"loc": "/dev/cpld5", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for fan modules", + "slot": 0, + "warm": 0, + }, + { + "name": "FCB_B CPLD", + "cpld_id": "CPLD6", + "VersionFile": {"loc": "/dev/cpld6", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for fan modules", + "slot": 0, + "warm": 0, + }, + { + "name": "IOB FPGA", + "cpld_id": "CPLD7", + "VersionFile": {"loc": "/dev/fpga0", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for base functions", + "slot": 0, + "format": "little_endian", + "warm": 0, + }, + { + "name": "DOM FPGA", + "cpld_id": "CPLD8", + "VersionFile": {"loc": "/dev/fpga1", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for sff functions", + "slot": 0, + "format": "little_endian", + "warm": 0, + }, + { + "name": "BIOS", + "cpld_id": "CPLD9", + "VersionFile": {"cmd": "dmidecode -s bios-version", "way": "cmd"}, + "desc": "Performs initialization of hardware components during booting", + "slot": 0, + "type": "str", + "warm": 0, + }, + ], + "dcdc": [ + { + "name": "SCM_53134O_V1.0_V", + "dcdc_id": "DCDC1", + "Min": 900, + "value": { + "loc": "/sys/bus/i2c/devices/33-0040/hwmon/hwmon*/in1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 1100, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SCM_I210_V3.3_V", + "dcdc_id": "DCDC2", + "Min": 2970, + "value": { + "loc": "/sys/bus/i2c/devices/33-0040/hwmon/hwmon*/in2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 3630, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SCM_VDD3.3_V", + "dcdc_id": "DCDC3", + "Min": 2970, + "value": { + "loc": "/sys/bus/i2c/devices/33-0040/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 3630, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SCM_VDD12.0_V", + "dcdc_id": "DCDC4", + "Min": 10800, + "value": { + "loc": "/sys/bus/i2c/devices/33-0041/hwmon/hwmon*/in1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 13200, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SCM_OCM_V12.0_V", + "dcdc_id": "DCDC5", + "Min": 10800, + "value": { + "loc": "/sys/bus/i2c/devices/33-0041/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 13200, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SCM_SSD_V3.3_V", + "dcdc_id": "DCDC6", + "Min": 2970, + "value": { + "loc": "/sys/bus/i2c/devices/33-0042/hwmon/hwmon*/in1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 3630, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SCM_BMC_V3.3_V", + "dcdc_id": "DCDC7", + "Min": -1000, + "value": { + "loc": "/sys/bus/i2c/devices/33-0042/hwmon/hwmon*/in2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 3630, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SCM_VDD5.0_V", + "dcdc_id": "DCDC8", + "Min": 4500, + "value": { + "loc": "/sys/bus/i2c/devices/33-0042/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 5500, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MAC_CORE_V", + "dcdc_id": "DCDC9", + "Min": 630, + "value": { + "loc": "/sys/bus/i2c/devices/64-0040/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 858, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MAC_ANALOG0 V0.9_V", + "dcdc_id": "DCDC10", + "Min": 810, + "value": { + "loc": "/sys/bus/i2c/devices/65-0040/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 990, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MAC_ANALOG0 V0.75_V", + "dcdc_id": "DCDC11", + "Min": 675, + "value": { + "loc": "/sys/bus/i2c/devices/65-0040/hwmon/hwmon*/in4_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 825, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MAC_ANALOG1 V0.9_V", + "dcdc_id": "DCDC12", + "Min": 810, + "value": { + "loc": "/sys/bus/i2c/devices/66-0040/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 990, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MAC_ANALOG1 V0.75_V", + "dcdc_id": "DCDC13", + "Min": 675, + "value": { + "loc": "/sys/bus/i2c/devices/66-0040/hwmon/hwmon*/in4_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 825, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MAC_PLL0_VDD0.9_V", + "dcdc_id": "DCDC14", + "Min": 810, + "value": { + "loc": "/sys/bus/i2c/devices/56-0040/hwmon/hwmon*/in2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 990, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MAC_PLL1_VDD0.9_V", + "dcdc_id": "DCDC15", + "Min": 810, + "value": { + "loc": "/sys/bus/i2c/devices/56-0040/hwmon/hwmon*/in1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 990, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MAC_PLL2_VDD0.9_V", + "dcdc_id": "DCDC16", + "Min": 810, + "value": { + "loc": "/sys/bus/i2c/devices/58-0040/hwmon/hwmon*/in1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 990, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MAC_PLL3_VDD0.9_V", + "dcdc_id": "DCDC17", + "Min": 810, + "value": { + "loc": "/sys/bus/i2c/devices/58-0040/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 990, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MAC_VDD_0.8_V", + "dcdc_id": "DCDC18", + "Min": 720, + "value": { + "loc": "/sys/bus/i2c/devices/58-0040/hwmon/hwmon*/in2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 880, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MAC_VDD_1.8_V", + "dcdc_id": "DCDC19", + "Min": 1620, + "value": { + "loc": "/sys/bus/i2c/devices/60-0040/hwmon/hwmon*/in1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 1980, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MAC_VDD_1.5_V", + "dcdc_id": "DCDC20", + "Min": 1350, + "value": { + "loc": "/sys/bus/i2c/devices/60-0040/hwmon/hwmon*/in2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 1650, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MAC_VDD_1.2_V", + "dcdc_id": "DCDC21", + "Min": 1080, + "value": { + "loc": "/sys/bus/i2c/devices/61-0040/hwmon/hwmon*/in1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 1320, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OE_AVDD_0.75_V", + "dcdc_id": "DCDC22", + "Min": 675, + "value": { + "loc": "/sys/bus/i2c/devices/69-0040/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 825, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OE_AVDD_1.2_V", + "dcdc_id": "DCDC23", + "Min": 1080, + "value": { + "loc": "/sys/bus/i2c/devices/69-0040/hwmon/hwmon*/in4_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 1320, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OE_AVDD_TX_1.8_V", + "dcdc_id": "DCDC24", + "Min": 1620, + "value": { + "loc": "/sys/bus/i2c/devices/70-0068/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 1980, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OE_AVDD_RX_1.8_V", + "dcdc_id": "DCDC25", + "Min": 1620, + "value": { + "loc": "/sys/bus/i2c/devices/70-0068/hwmon/hwmon*/in4_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 1980, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OE_HCSL_PLL_VDD0_0.75_V", + "dcdc_id": "DCDC26", + "Min": 675, + "value": { + "loc": "/sys/bus/i2c/devices/56-0040/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 825, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OE_HCSL_PLL_VDD1_0.75_V", + "dcdc_id": "DCDC27", + "Min": 675, + "value": { + "loc": "/sys/bus/i2c/devices/57-0040/hwmon/hwmon*/in2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 825, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OE_AVDD_3.3_V", + "dcdc_id": "DCDC28", + "Min": 2970, + "value": { + "loc": "/sys/bus/i2c/devices/59-0040/hwmon/hwmon*/in1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 3630, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OE_VDD_HCSL_PLL_1.8_V", + "dcdc_id": "DCDC29", + "Min": 1620, + "value": { + "loc": "/sys/bus/i2c/devices/59-0040/hwmon/hwmon*/in2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 1980, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OE_VDD_1.8_V", + "dcdc_id": "DCDC30", + "Min": 1620, + "value": { + "loc": "/sys/bus/i2c/devices/60-0040/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 1980, + "format": "float(float(%s)/1000)", + }, + + { + "name": "RLML_VDD V3.3_V", + "dcdc_id": "DCDC31", + "Min": 1980, + "value": { + "loc": "/sys/bus/i2c/devices/71-0068/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 2420, + "format": "float(float(%s)*1.5/1000)", + }, + + { + "name": "RLMH_VDD V3.3_V", + "dcdc_id": "DCDC32", + "Min": 1980, + "value": { + "loc": "/sys/bus/i2c/devices/71-0068/hwmon/hwmon*/in4_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 2420, + "format": "float(float(%s)*1.5/1000)", + }, + + { + "name": "SMB_CLK_VDD3.3_V", + "dcdc_id": "DCDC33", + "Min": 2970, + "value": { + "loc": "/sys/bus/i2c/devices/56-0041/hwmon/hwmon*/in1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 3630, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SMB_CLK2_VDD1.8_V", + "dcdc_id": "DCDC34", + "Min": 1620, + "value": { + "loc": "/sys/bus/i2c/devices/56-0041/hwmon/hwmon*/in2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 1980, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SMB_CLK_VDD1.8_V", + "dcdc_id": "DCDC35", + "Min": 1620, + "value": { + "loc": "/sys/bus/i2c/devices/56-0041/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 1980, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SMB_FPGA_VDD1.8_V", + "dcdc_id": "DCDC36", + "Min": 1620, + "value": { + "loc": "/sys/bus/i2c/devices/57-0040/hwmon/hwmon*/in1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 1980, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SMB_VDD_5.0_V", + "dcdc_id": "DCDC37", + "Min": 4500, + "value": { + "loc": "/sys/bus/i2c/devices/61-0040/hwmon/hwmon*/in2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 5500, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SMB_FPGA_V3.3_V", + "dcdc_id": "DCDC38", + "Min": 2970, + "value": { + "loc": "/sys/bus/i2c/devices/62-0040/hwmon/hwmon*/in1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 3630, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SMB_FPGA_V1.0_V", + "dcdc_id": "DCDC39", + "Min": 900, + "value": { + "loc": "/sys/bus/i2c/devices/62-0040/hwmon/hwmon*/in2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 1100, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SMB_FPGA_V1.2_V", + "dcdc_id": "DCDC40", + "Min": 1080, + "value": { + "loc": "/sys/bus/i2c/devices/62-0040/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 1320, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SMB_VDD_3.3_V", + "dcdc_id": "DCDC41", + "Min": 2970, + "value": { + "loc": "/sys/bus/i2c/devices/63-0040/hwmon/hwmon*/in1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 3630, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SMB_CPLD_VDD_1.8_V", + "dcdc_id": "DCDC42", + "Min": 1620, + "value": { + "loc": "/sys/bus/i2c/devices/63-0040/hwmon/hwmon*/in2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 1980, + "format": "float(float(%s)/1000)", + }, + + { + "name": "SMB_CPLD_VDD_3.3_V", + "dcdc_id": "DCDC43", + "Min": 2970, + "value": { + "loc": "/sys/bus/i2c/devices/63-0040/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 3630, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MCB_FPGA_VDD1.0_V", + "dcdc_id": "DCDC44", + "Min": 900, + "value": { + "loc": "/sys/bus/i2c/devices/12-0040/hwmon/hwmon*/in1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 1100, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MCB_FPGA_VDD1.8_V", + "dcdc_id": "DCDC45", + "Min": 1620, + "value": { + "loc": "/sys/bus/i2c/devices/12-0040/hwmon/hwmon*/in2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 1980, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MCB_FPGA_VDD1.2_V", + "dcdc_id": "DCDC46", + "Min": 1080, + "value": { + "loc": "/sys/bus/i2c/devices/12-0040/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 1320, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MCB_CPLD_VDD3.3_V", + "dcdc_id": "DCDC47", + "Min": 2970, + "value": { + "loc": "/sys/bus/i2c/devices/12-0041/hwmon/hwmon*/in1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 3630, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MCB_VDD3.3_V", + "dcdc_id": "DCDC48", + "Min": 2970, + "value": { + "loc": "/sys/bus/i2c/devices/12-0041/hwmon/hwmon*/in2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 3630, + "format": "float(float(%s)/1000)", + }, + + { + "name": "MCB_FPGA_VDD3.3_V", + "dcdc_id": "DCDC49", + "Min": 2970, + "value": { + "loc": "/sys/bus/i2c/devices/12-0041/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 3630, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OCM_P1V05_V", + "dcdc_id": "DCDC50", + "Min": 954, + "value": { + "loc": "/sys/bus/i2c/devices/5-005f/hwmon/hwmon*/in1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 1160, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OCM_VCCIN_V", + "dcdc_id": "DCDC51", + "Min": 1350, + "value": { + "loc": "/sys/bus/i2c/devices/5-005f/hwmon/hwmon*/in2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 2200, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OCM_P1V2_VDDQ_V", + "dcdc_id": "DCDC52", + "Min": 1120, + "value": { + "loc": "/sys/bus/i2c/devices/5-005f/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 1280, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OCM_P1V8_V", + "dcdc_id": "DCDC53", + "Min": 1690, + "value": { + "loc": "/sys/bus/i2c/devices/5-005f/hwmon/hwmon*/in4_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 1910, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OCM_P0V6_VTT_V", + "dcdc_id": "DCDC54", + "Min": 558, + "value": { + "loc": "/sys/bus/i2c/devices/5-005f/hwmon/hwmon*/in5_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 682, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OCM_VNN_PCH_V", + "dcdc_id": "DCDC55", + "Min": 540, + "value": { + "loc": "/sys/bus/i2c/devices/5-005f/hwmon/hwmon*/in6_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 1320, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OCM_VNN_NAC_V", + "dcdc_id": "DCDC56", + "Min": 540, + "value": { + "loc": "/sys/bus/i2c/devices/5-005f/hwmon/hwmon*/in7_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 1320, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OCM_P2V5_VPP_V", + "dcdc_id": "DCDC57", + "Min": 2250, + "value": { + "loc": "/sys/bus/i2c/devices/5-005f/hwmon/hwmon*/in8_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 2750, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OCM_VCC_ANA_V", + "dcdc_id": "DCDC58", + "Min": 900, + "value": { + "loc": "/sys/bus/i2c/devices/5-005f/hwmon/hwmon*/in9_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 1100, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OCM_P3V3_STBY_V", + "dcdc_id": "DCDC59", + "Min": 2970, + "value": { + "loc": "/sys/bus/i2c/devices/5-005f/hwmon/hwmon*/in10_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 3630, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OCM_P5V_AUX_V", + "dcdc_id": "DCDC60", + "Min": 4000, + "value": { + "loc": "/sys/bus/i2c/devices/5-005f/hwmon/hwmon*/in11_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 5750, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OCM_P1V8_AUX_V", + "dcdc_id": "DCDC61", + "Min": 1690, + "value": { + "loc": "/sys/bus/i2c/devices/5-005f/hwmon/hwmon*/in12_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 1910, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OCM_P3V3_AUX_V", + "dcdc_id": "DCDC62", + "Min": 2970, + "value": { + "loc": "/sys/bus/i2c/devices/5-005f/hwmon/hwmon*/in13_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 3630, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OCM_V1P80_EMMC_V", + "dcdc_id": "DCDC63", + "Min": 1690, + "value": { + "loc": "/sys/bus/i2c/devices/5-005f/hwmon/hwmon*/in14_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 1910, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OCM_V3P3_EMMC_V", + "dcdc_id": "DCDC64", + "Min": 3100, + "value": { + "loc": "/sys/bus/i2c/devices/5-005f/hwmon/hwmon*/in15_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 3500, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OCM_XDPE_VCCIN_V", + "dcdc_id": "DCDC65", + "Min": 1350, + "value": { + "loc": "/sys/bus/i2c/devices/5-0070/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 2200, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OCM_XDPE_P1V8_V", + "dcdc_id": "DCDC66", + "Min": 1690, + "value": { + "loc": "/sys/bus/i2c/devices/5-0070/hwmon/hwmon*/in4_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 1910, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OCM_XDPE_P1V05_V", + "dcdc_id": "DCDC67", + "Min": 954, + "value": { + "loc": "/sys/bus/i2c/devices/5-006e/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 1160, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OCM_XDPE_VNN_PCH_V", + "dcdc_id": "DCDC68", + "Min": 540, + "value": { + "loc": "/sys/bus/i2c/devices/5-006e/hwmon/hwmon*/in4_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 1320, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OCM_XDPE_VNN_NAC_V", + "dcdc_id": "DCDC69", + "Min": 540, + "value": { + "loc": "/sys/bus/i2c/devices/5-0068/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 1320, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OCM_XDPE_VCC_ANA_V", + "dcdc_id": "DCDC70", + "Min": 900, + "value": { + "loc": "/sys/bus/i2c/devices/5-0068/hwmon/hwmon*/in4_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 1100, + "format": "float(float(%s)/1000)", + }, + + { + "name": "OCM_XDPE_P1V2_VDDQ_V", + "dcdc_id": "DCDC71", + "Min": 1120, + "value": { + "loc": "/sys/bus/i2c/devices/5-005e/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 1280, + "format": "float(float(%s)/1000)", + }, + + { + "name": "FAN1_VDD12_V", + "dcdc_id": "DCDC72", + "Min": 7000, + "value": { + "loc": "/sys/bus/i2c/devices/88-0042/hwmon/hwmon*/in1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 13200, + "format": "float(float(%s)/1000)", + }, + + { + "name": "FAN3_VDD12_V", + "dcdc_id": "DCDC73", + "Min": 7000, + "value": { + "loc": "/sys/bus/i2c/devices/88-0042/hwmon/hwmon*/in2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 13200, + "format": "float(float(%s)/1000)", + }, + + { + "name": "FAN5_VDD12_V", + "dcdc_id": "DCDC74", + "Min": 7000, + "value": { + "loc": "/sys/bus/i2c/devices/88-0042/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 13200, + "format": "float(float(%s)/1000)", + }, + + { + "name": "FAN7_VDD12_V", + "dcdc_id": "DCDC75", + "Min": 7000, + "value": { + "loc": "/sys/bus/i2c/devices/89-0042/hwmon/hwmon*/in1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 13200, + "format": "float(float(%s)/1000)", + }, + + { + "name": "FAN2_VDD12_V", + "dcdc_id": "DCDC76", + "Min": 7000, + "value": { + "loc": "/sys/bus/i2c/devices/89-0042/hwmon/hwmon*/in2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 13200, + "format": "float(float(%s)/1000)", + }, + + { + "name": "FAN4_VDD12_V", + "dcdc_id": "DCDC77", + "Min": 7000, + "value": { + "loc": "/sys/bus/i2c/devices/89-0042/hwmon/hwmon*/in3_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 13200, + "format": "float(float(%s)/1000)", + }, + + { + "name": "FAN6_VDD12_V", + "dcdc_id": "DCDC78", + "Min": 7000, + "value": { + "loc": "/sys/bus/i2c/devices/90-0042/hwmon/hwmon*/in1_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 13200, + "format": "float(float(%s)/1000)", + }, + + { + "name": "FAN8_VDD12_V", + "dcdc_id": "DCDC79", + "Min": 7000, + "value": { + "loc": "/sys/bus/i2c/devices/90-0042/hwmon/hwmon*/in2_input", + "way": "sysfs", + }, + "read_times": 3, + "Unit": "V", + "Max": 13200, + "format": "float(float(%s)/1000)", + }, + ], + "cpu": [ + { + "name": "cpu", + "reboot_cause_path": "/etc/sonic/.reboot/.previous-reboot-cause.txt" + } + ], + "sfps": { + "ver": '3.0', + "port_index_start": 1, + "port_num": 128, + "log_level": 2, + "eeprom_retry_times": 5, + "eeprom_retry_break_sec": 0.2, + "presence_val_is_present": 0, + "eeprom_path": "/sys/bus/i2c/devices/i2c-%d/%d-0050/eeprom", + "eeprom_path_key": [24] * 16 + [25] * 16 + [26] * 16 + [27] * 16 + [28] * 16 + [29] * 16 + [30] * 16 + [31] * 16 + } +} diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/hal-config/x86_64_micas_m2_w6940_128x1_fr4_r0_monitor.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/hal-config/x86_64_micas_m2_w6940_128x1_fr4_r0_monitor.py new file mode 100755 index 00000000000..0cbf49889c6 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/hal-config/x86_64_micas_m2_w6940_128x1_fr4_r0_monitor.py @@ -0,0 +1,219 @@ +# coding:utf-8 + + +monitor = { + "openloop": { + "linear": { + "name": "linear", + "flag": 0, + "pwm_min": 0x66, + "pwm_max": 0xcc, + "K": 11, + "tin_min": 38, + }, + "curve": { + "name": "curve", + "flag": 1, + "pwm_min": 0x66, + "pwm_max": 0xcc, + "a": -0.0249, + "b": 8.1615, + "c": -60.326, + "tin_min": 25, + }, + }, + + "pid": { + "CPU_TEMP": { + "name": "CPU_TEMP", + "flag": 1, + "type": "duty", + "pwm_min": 0x66, + "pwm_max": 0xcc, + "Kp": 0.8, + "Ki": 0.4, + "Kd": 0.3, + "target": 85, + "value": [None, None, None], + }, + "SWITCH_TEMP": { + "name": "SWITCH_TEMP", + "flag": 1, + "type": "duty", + "pwm_min": 0x66, + "pwm_max": 0xcc, + "Kp": 1.5, + "Ki": 1, + "Kd": 0.3, + "target": 80, + "value": [None, None, None], + }, + "OUTLET_TEMP": { + "name": "OUTLET_TEMP", + "flag": 1, + "type": "duty", + "pwm_min": 0x66, + "pwm_max": 0xcc, + "Kp": 2, + "Ki": 0.4, + "Kd": 0.3, + "target": 65, + "value": [None, None, None], + }, + "RLM_TEMP": { + "name": "RLM_TEMP", + "flag": 1, + "type": "duty", + "pwm_min": 0x66, + "pwm_max": 0xcc, + "Kp": 0.1, + "Ki": 0.4, + "Kd": 0, + "target": 40, + "value": [None, None, None], + }, + "BOARD_TEMP": { + "name": "BOARD_TEMP", + "flag": 1, + "type": "duty", + "pwm_min": 0x66, + "pwm_max": 0xcc, + "Kp": 2, + "Ki": 0.4, + "Kd": 0.3, + "target": 65, + "value": [None, None, None], + }, + "MOS_TEMP": { + "name": "MOS_TEMP", + "flag": 1, + "type": "duty", + "pwm_min": 0x66, + "pwm_max": 0xcc, + "Kp": 1, + "Ki": 0.4, + "Kd": 0.3, + "target": 85, + "value": [None, None, None], + }, + "Tout-Tin": { + "name": "Tout-Tin", + "flag": 0, + "type": "duty", + "pwm_min": 0x66, + "pwm_max": 0xcc, + "Kp": 8, + "Ki": 0.1, + "Kd": 0.4, + "target": 12, + "value": [None, None, None], + }, + "OE_TEMP": { + "name": "OE_TEMP", + "flag": 1, + "type": "duty", + "pwm_min": 0x66, # 40%(0x66 = 102, 102/255=0.4) + "pwm_max": 0xcc, # 80%(0xcc = 204, 204/255=0.8) + "Kp": 1.5, + "Ki": 1, + "Kd": 0.3, + "target": 85, + "value": [None, None, None], + } + }, + + "temps_threshold": { + "SWITCH_TEMP": {"name": "SWITCH_TEMP", "warning": 100, "critical": 105, "invalid": -100000, "error": -99999}, + "INLET_TEMP": {"name": "INLET_TEMP", "warning": 50, "critical": 55}, + "OUTLET_TEMP": {"name": "OUTLET_TEMP", "warning": 70, "critical": 75}, + "CPU_TEMP": {"name": "CPU_TEMP", "warning": 95, "critical": 99}, + "RLM_TEMP": {"name": "RLM_TEMP", "warning": 50, "critical": 55, "invalid": -100000, "error": -99999}, + #"Tout-Tin": {"name": "Tout-Tin", "warning": 15, "critical": 20}, + "OE_TEMP": {"name": "OE_TEMP", "warning": 95, "critical": 100, "invalid": -100000, "error": -99999}, + "BOARD_TEMP": {"name": "BOARD_TEMP", "warning": 70, "critical": 75}, + "MOS_TEMP": {"name": "MOS_TEMP", "warning": 110, "critical": 125}, + }, + + "fancontrol_para": { + "interval": 5, + "max_pwm": 0xff, + "min_pwm": 0x66, + "abnormal_pwm": 0xcc, + "warning_pwm": 0xcc, + "critical_pwm": 0xcc, + "temp_invalid_pid_pwm": 0x66, + "temp_error_pid_pwm": 0x66, + "temp_fail_num": 3, + "check_temp_fail": [ + {"temp_name": "INLET_TEMP"}, + {"temp_name": "SWITCH_TEMP"}, + {"temp_name": "CPU_TEMP"}, + {"temp_name": "MOS_TEMP"}, + {"temp_name": "BOARD_TEMP"}, + {"temp_name": "OUTLET_TEMP"}, + {"temp_name": "OE_TEMP"}, + ], + "check_temp_critical_reboot": [ + ["SWITCH_TEMP"], + ["OE_TEMP"], + ["INLET_TEMP", "OUTLET_TEMP", "CPU_TEMP", "RLM_TEMP", "BOARD_TEMP", "MOS_TEMP"], + ], + "temp_warning_num": 3, # temp over warning 3 times continuously + "temp_critical_num": 3, # temp over critical 3 times continuously + "temp_warning_countdown": 60, # 5 min warning speed after not warning + "temp_critical_countdown": 60, # 5 min full speed after not critical + "rotor_error_count": 6, # fan rotor error 6 times continuously + "inlet_mac_diff": 999, + "check_crit_reboot_flag": 1, + "check_crit_reboot_num": 3, + "check_crit_sleep_time": 20, + "psu_fan_control": 1, + "psu_absent_fullspeed_num": 0xFF, + "fan_absent_fullspeed_num": 1, + "rotor_error_fullspeed_num": 1, + "deal_over_temp_reboot_cmd": [ + {"way": "devfile", "loc": "/dev/cpld5", "offset": 0x22, "value": [0x00]}, # disable fan watchdog + {"way": "devfile", "loc": "/dev/cpld6", "offset": 0x22, "value": [0x00]}, # disable fan watchdog + {"way": "devfile", "loc": "/dev/cpld1", "offset": 0x15, "value": [0x0c]}, # cpu powroff + ], + "deal_over_temp_reboot_pwm": 0x80, # set pwm=50% + }, + + "ledcontrol_para": { + "interval": 5, + "checkpsu": 1, # 0: sys led don't follow psu led + "checkfan": 1, # 0: sys led don't follow fan led + "psu_amber_num": 1, + "fan_amber_num": 1, + "sysled_check_temp": 0, + "sysled_check_fw_up": 1, + "smbled_ctrl": 1, + "board_sys_led": [ + {"led_name": "FRONT_SYS_LED"}, + ], + "board_psu_led": [ + {"led_name": "FRONT_PSU_LED"}, + ], + "board_fan_led": [ + {"led_name": "FRONT_FAN_LED"}, + ], + "board_smb_led": [ + {"led_name": "FRONT_SMB_LED"}, + ], + "psu_air_flow_monitor": 0, + "fan_air_flow_monitor": 0, + "psu_air_flow_amber_num": 0, + "fan_air_flow_amber_num": 0, + }, + + "fw_upgrade_check": [ + [ + {"gettype": "file_exist", "judge_file": "/etc/sonic/.doing_fw_upg", "okval": True}, + ], + ], + + "otp_reboot_judge_file": { + "otp_switch_reboot_judge_file": "/etc/.otp_switch_reboot_flag", + "otp_other_reboot_judge_file": "/etc/.otp_other_reboot_flag", + }, +} diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/modules/driver/Makefile b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/modules/driver/Makefile new file mode 100644 index 00000000000..d640249fc5f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/modules/driver/Makefile @@ -0,0 +1,14 @@ +MAKEFILE_FILE_PATH = $(abspath $(lastword $(MAKEFILE_LIST))) +MAKEFILE_DIR = $(dir $(MAKEFILE_FILE_PATH)) +MODULES_DIR = $(abspath $(MAKEFILE_DIR)/../../../common/modules) +BSP_PUBLIC_PATH = $(abspath $(MAKEFILE_FILE_PATH)/../../../../common/public/include) + +EXTRA_CFLAGS+= -I$(BSP_PUBLIC_PATH) +EXTRA_CFLAGS+= -I$(MODULES_DIR) + +obj-m := wb_pcie_dev_device.o +obj-m += wb_i2c_ocores_device.o +obj-m += wb_i2c_mux_pca954x_device.o +obj-m += wb_i2c_mux_pca954x_device_b3.o +obj-m += wb_i2c_dev_device.o +obj-m += wb_io_dev_device.o diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/modules/driver/wb_firmware_upgrade_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/modules/driver/wb_firmware_upgrade_device.c new file mode 100644 index 00000000000..39686b39af7 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/modules/driver/wb_firmware_upgrade_device.c @@ -0,0 +1,458 @@ +/* + * wb_firmware_upgrade.c + * + * ko for firmware device + */ +#include +#include +#include +#include +#include +#include + +static int g_wb_firmware_upgrade_debug = 0; +static int g_wb_firmware_upgrade_error = 0; + +module_param(g_wb_firmware_upgrade_debug, int, S_IRUGO | S_IWUSR); +module_param(g_wb_firmware_upgrade_error, int, S_IRUGO | S_IWUSR); + +#define WB_FIRMWARE_UPGRADE_DEBUG_VERBOSE(fmt, args...) do { \ + if (g_wb_firmware_upgrade_debug) { \ + printk(KERN_INFO "[WB_FIRMWARE_UPGRADE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +#define WB_FIRMWARE_UPGRADE_DEBUG_ERROR(fmt, args...) do { \ + if (g_wb_firmware_upgrade_error) { \ + printk(KERN_ERR "[WB_FIRMWARE_UPGRADE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +/* IOB FPGA */ +static firmware_upgrade_device_t firmware_upgrade_device_data0 = { + .type = "SPI_LOGIC", + .chain = 1, + .chip_index = 1, + .upg_type.sysfs = { + .dev_name = "/dev/fpga0", + .ctrl_base = 0x400, + .flash_base = 0x200000, + .test_base = 0x7F0000, + .test_size = 0x10000, + }, + .en_gpio_num = 0, + .en_logic_num = 0, +}; + +/* DOM FPGA */ +static firmware_upgrade_device_t firmware_upgrade_device_data1 = { + .type = "SPI_LOGIC", + .chain = 2, + .chip_index = 1, + .upg_type.sysfs = { + .dev_name = "/dev/fpga0", + .ctrl_base = 0x1800, + .flash_base = 0x200000, + .test_base = 0x7F0000, + .test_size = 0x10000, + }, + .en_gpio_num = 0, + .en_logic_num = 0, +}; + +/* SCM CPLD */ +static firmware_upgrade_device_t firmware_upgrade_device_data2 = { + .type = "SPI_LOGIC", + .chain = 3, + .chip_index = 1, + .upg_type.sysfs = { + .dev_name = "/dev/fpga0", + .ctrl_base = 0x1200, + .flash_base = 0x10000, + .test_base = 0x1F0000, + .test_size = 0x10000, + }, + .en_gpio_num = 0, + .en_logic_num = 0, +}; + +/* MCB CPLD */ +static firmware_upgrade_device_t firmware_upgrade_device_data3 = { + .type = "SPI_LOGIC", + .chain = 4, + .chip_index = 1, + .upg_type.sysfs = { + .dev_name = "/dev/fpga0", + .ctrl_base = 0x1000, + .flash_base = 0x10000, + .test_base = 0x1F0000, + .test_size = 0x10000, + }, + .en_gpio_num = 0, + .en_logic_num = 0, +}; + +/* SMB CPLD */ +static firmware_upgrade_device_t firmware_upgrade_device_data4 = { + .type = "SPI_LOGIC", + .chain = 5, + .chip_index = 1, + .upg_type.sysfs = { + .dev_name = "/dev/fpga0", + .ctrl_base = 0x1600, + .flash_base = 0x10000, + .test_base = 0x1F0000, + .test_size = 0x10000, + }, + .en_gpio_num = 0, + .en_logic_num = 0, +}; + +/* FCB_B CPLD */ +static firmware_upgrade_device_t firmware_upgrade_device_data5 = { + .type = "SPI_LOGIC", + .chain = 6, + .chip_index = 1, + .upg_type.sysfs = { + .dev_name = "/dev/fpga0", + .ctrl_base = 0x1a00, + .flash_base = 0x10000, + .test_base = 0x1F0000, + .test_size = 0x10000, + }, + .en_gpio_num = 0, + .en_logic_num = 0, +}; + +/* FCB_T CPLD */ +static firmware_upgrade_device_t firmware_upgrade_device_data6 = { + .type = "SPI_LOGIC", + .chain = 7, + .chip_index = 1, + .upg_type.sysfs = { + .dev_name = "/dev/fpga0", + .ctrl_base = 0x1c00, + .flash_base = 0x10000, + .test_base = 0x1F0000, + .test_size = 0x10000, + }, + .en_gpio_num = 0, + .en_logic_num = 0, +}; + +/* MAC PCIe */ +static firmware_upgrade_device_t firmware_upgrade_device_data7 = { + .type = "SPI_LOGIC", + .chain = 8, + .chip_index = 1, + .upg_type.sysfs = { + .dev_name = "/dev/fpga0", + .ctrl_base = 0x1400, + .flash_base = 0, + .test_base = 0xFF0000, + .test_size = 0x10000, + }, + .en_gpio_num = 0, + .en_logic_num = 0, +}; + +/* bios */ +static firmware_upgrade_device_t firmware_upgrade_device_data8 = { + .type = "MTD_DEV", + .chain = 9, + .chip_index = 1, + .upg_type.sysfs = { + .mtd_name = "BIOS", + .flash_base = 0x3000000, + }, + .en_gpio_num = 0, + .en_logic_num = 0, +}; + +/* IOB FPGA shaopian */ +static firmware_upgrade_device_t firmware_upgrade_device_data9 = { + .type = "SPI_LOGIC", + .chain = 10, + .chip_index = 1, + .upg_type.sysfs = { + .dev_name = "/dev/fpga0", + .ctrl_base = 0x400, + .flash_base = 0x0, + .test_base = 0x7F0000, + .test_size = 0x10000, + }, + .en_gpio_num = 0, + .en_logic_num = 0, +}; + +/* DOM FPGA shaopian */ +static firmware_upgrade_device_t firmware_upgrade_device_data10 = { + .type = "SPI_LOGIC", + .chain = 11, + .chip_index = 1, + .upg_type.sysfs = { + .dev_name = "/dev/fpga0", + .ctrl_base = 0x1800, + .flash_base = 0x0, + .test_base = 0x7F0000, + .test_size = 0x10000, + }, + .en_gpio_num = 0, + .en_logic_num = 0, +}; + +/* SCM CPLD shaopian */ +static firmware_upgrade_device_t firmware_upgrade_device_data11 = { + .type = "SPI_LOGIC", + .chain = 12, + .chip_index = 1, + .upg_type.sysfs = { + .dev_name = "/dev/fpga0", + .ctrl_base = 0x1200, + .flash_base = 0x0, + .test_base = 0x1F0000, + .test_size = 0x10000, + }, + .en_gpio_num = 0, + .en_logic_num = 0, +}; + +/* MCB CPLD shaopian */ +static firmware_upgrade_device_t firmware_upgrade_device_data12 = { + .type = "SPI_LOGIC", + .chain = 13, + .chip_index = 1, + .upg_type.sysfs = { + .dev_name = "/dev/fpga0", + .ctrl_base = 0x1000, + .flash_base = 0x0, + .test_base = 0x1F0000, + .test_size = 0x10000, + }, + .en_gpio_num = 0, + .en_logic_num = 0, +}; + +/* SMB CPLD shaopian */ +static firmware_upgrade_device_t firmware_upgrade_device_data13 = { + .type = "SPI_LOGIC", + .chain = 14, + .chip_index = 1, + .upg_type.sysfs = { + .dev_name = "/dev/fpga0", + .ctrl_base = 0x1600, + .flash_base = 0x0, + .test_base = 0x1F0000, + .test_size = 0x10000, + }, + .en_gpio_num = 0, + .en_logic_num = 0, +}; + +/* FCB_B CPLD shaopian */ +static firmware_upgrade_device_t firmware_upgrade_device_data14 = { + .type = "SPI_LOGIC", + .chain = 15, + .chip_index = 1, + .upg_type.sysfs = { + .dev_name = "/dev/fpga0", + .ctrl_base = 0x1a00, + .flash_base = 0x0, + .test_base = 0x1F0000, + .test_size = 0x10000, + }, + .en_gpio_num = 0, + .en_logic_num = 0, +}; + +/* FCB_T CPLD shaopian */ +static firmware_upgrade_device_t firmware_upgrade_device_data15 = { + .type = "SPI_LOGIC", + .chain = 16, + .chip_index = 1, + .upg_type.sysfs = { + .dev_name = "/dev/fpga0", + .ctrl_base = 0x1c00, + .flash_base = 0x0, + .test_base = 0x1F0000, + .test_size = 0x10000, + }, + .en_gpio_num = 0, + .en_logic_num = 0, +}; + +static void firmware_device_release(struct device *dev) +{ + return; +} + +static struct platform_device firmware_upgrade_device[] = { + { + .name = "firmware_sysfs", + .id = 1, + .dev = { + .platform_data = &firmware_upgrade_device_data0, + .release = firmware_device_release, + }, + }, + { + .name = "firmware_sysfs", + .id = 2, + .dev = { + .platform_data = &firmware_upgrade_device_data1, + .release = firmware_device_release, + }, + }, + { + .name = "firmware_sysfs", + .id = 3, + .dev = { + .platform_data = &firmware_upgrade_device_data2, + .release = firmware_device_release, + }, + }, + { + .name = "firmware_sysfs", + .id = 4, + .dev = { + .platform_data = &firmware_upgrade_device_data3, + .release = firmware_device_release, + }, + }, + { + .name = "firmware_sysfs", + .id = 5, + .dev = { + .platform_data = &firmware_upgrade_device_data4, + .release = firmware_device_release, + }, + }, + { + .name = "firmware_sysfs", + .id = 6, + .dev = { + .platform_data = &firmware_upgrade_device_data5, + .release = firmware_device_release, + }, + }, + { + .name = "firmware_sysfs", + .id = 7, + .dev = { + .platform_data = &firmware_upgrade_device_data6, + .release = firmware_device_release, + }, + }, + { + .name = "firmware_sysfs", + .id = 8, + .dev = { + .platform_data = &firmware_upgrade_device_data7, + .release = firmware_device_release, + }, + }, + { + .name = "firmware_sysfs", + .id = 9, + .dev = { + .platform_data = &firmware_upgrade_device_data8, + .release = firmware_device_release, + }, + }, + { + .name = "firmware_sysfs", + .id = 10, + .dev = { + .platform_data = &firmware_upgrade_device_data9, + .release = firmware_device_release, + }, + }, + { + .name = "firmware_sysfs", + .id = 11, + .dev = { + .platform_data = &firmware_upgrade_device_data10, + .release = firmware_device_release, + }, + }, + { + .name = "firmware_sysfs", + .id = 12, + .dev = { + .platform_data = &firmware_upgrade_device_data11, + .release = firmware_device_release, + }, + }, + { + .name = "firmware_sysfs", + .id = 13, + .dev = { + .platform_data = &firmware_upgrade_device_data12, + .release = firmware_device_release, + }, + }, + { + .name = "firmware_sysfs", + .id = 14, + .dev = { + .platform_data = &firmware_upgrade_device_data13, + .release = firmware_device_release, + }, + }, + { + .name = "firmware_sysfs", + .id = 15, + .dev = { + .platform_data = &firmware_upgrade_device_data14, + .release = firmware_device_release, + }, + }, + { + .name = "firmware_sysfs", + .id = 16, + .dev = { + .platform_data = &firmware_upgrade_device_data15, + .release = firmware_device_release, + }, + }, + }; + + static int __init firmware_upgrade_device_init(void) + { + int i; + int ret = 0; + firmware_upgrade_device_t *firmware_upgrade_device_data; + + WB_FIRMWARE_UPGRADE_DEBUG_VERBOSE("enter!\n"); + for (i = 0; i < ARRAY_SIZE(firmware_upgrade_device); i++) { + firmware_upgrade_device_data = firmware_upgrade_device[i].dev.platform_data; + ret = platform_device_register(&firmware_upgrade_device[i]); + if (ret < 0) { + firmware_upgrade_device_data->device_flag = -1; /* device register failed, set flag -1 */ + printk(KERN_ERR "firmware_upgrade_device id%d register failed!\n", i + 1); + } else { + firmware_upgrade_device_data->device_flag = 0; /* device register suucess, set flag 0 */ + } + } + return 0; + } + + static void __exit firmware_upgrade_device_exit(void) + { + int i; + firmware_upgrade_device_t *firmware_upgrade_device_data; + + WB_FIRMWARE_UPGRADE_DEBUG_VERBOSE("enter!\n"); + for (i = ARRAY_SIZE(firmware_upgrade_device) - 1; i >= 0; i--) { + firmware_upgrade_device_data = firmware_upgrade_device[i].dev.platform_data; + if (firmware_upgrade_device_data->device_flag == 0) { /* device register success, need unregister */ + platform_device_unregister(&firmware_upgrade_device[i]); + } + } + } + + module_init(firmware_upgrade_device_init); + module_exit(firmware_upgrade_device_exit); + MODULE_DESCRIPTION("FIRMWARE UPGRADE Devices"); + MODULE_LICENSE("GPL"); + MODULE_AUTHOR("support"); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/modules/driver/wb_i2c_dev_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/modules/driver/wb_i2c_dev_device.c new file mode 100644 index 00000000000..4fd77271d1c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/modules/driver/wb_i2c_dev_device.c @@ -0,0 +1,187 @@ +#include +#include +#include +#include +#include +#include + +#include + +static int g_wb_i2c_dev_device_debug = 0; +static int g_wb_i2c_dev_device_error = 0; + +module_param(g_wb_i2c_dev_device_debug, int, S_IRUGO | S_IWUSR); +module_param(g_wb_i2c_dev_device_error, int, S_IRUGO | S_IWUSR); + +#define WB_I2C_DEV_DEVICE_DEBUG_VERBOSE(fmt, args...) do { \ + if (g_wb_i2c_dev_device_debug) { \ + printk(KERN_INFO "[WB_I2C_DEV_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +#define WB_I2C_DEV_DEVICE_DEBUG_ERROR(fmt, args...) do { \ + if (g_wb_i2c_dev_device_error) { \ + printk(KERN_ERR "[WB_I2C_DEV_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +static i2c_dev_device_t i2c_dev_device_data0 = { + .i2c_bus = 4, + .i2c_addr = 0x0c, + .i2c_name = "cpld2", + .data_bus_width = 1, + .addr_bus_width = 1, + .per_rd_len = 256, + .per_wr_len = 256, + .i2c_len = 256, +}; + +static i2c_dev_device_t i2c_dev_device_data1 = { + .i2c_bus = 13, + .i2c_addr = 0x1d, + .i2c_name = "cpld3", + .data_bus_width = 1, + .addr_bus_width = 1, + .per_rd_len = 256, + .per_wr_len = 256, + .i2c_len = 256, +}; + +static i2c_dev_device_t i2c_dev_device_data2 = { + .i2c_bus = 20, + .i2c_addr = 0x1e, + .i2c_name = "cpld4", + .data_bus_width = 1, + .addr_bus_width = 1, + .per_rd_len = 256, + .per_wr_len = 256, + .i2c_len = 256, +}; + +static i2c_dev_device_t i2c_dev_device_data3 = { + .i2c_bus = 44, + .i2c_addr = 0x0d, + .i2c_name = "cpld5", + .data_bus_width = 1, + .addr_bus_width = 1, + .per_rd_len = 256, + .per_wr_len = 256, + .i2c_len = 256, +}; + +static i2c_dev_device_t i2c_dev_device_data4 = { + .i2c_bus = 52, + .i2c_addr = 0x0d, + .i2c_name = "cpld6", + .data_bus_width = 1, + .addr_bus_width = 1, + .per_rd_len = 256, + .per_wr_len = 256, + .i2c_len = 256, +}; + +struct i2c_board_info i2c_dev_device_info[] = { + { + .type = "wb-i2c-dev", + .platform_data = &i2c_dev_device_data0, + }, + { + .type = "wb-i2c-dev", + .platform_data = &i2c_dev_device_data1, + }, + { + .type = "wb-i2c-dev", + .platform_data = &i2c_dev_device_data2, + }, + { + .type = "wb-i2c-dev", + .platform_data = &i2c_dev_device_data3, + }, + { + .type = "wb-i2c-dev", + .platform_data = &i2c_dev_device_data4, + }, +}; + +static int __init wb_i2c_dev_device_init(void) +{ + int i; + struct i2c_adapter *adap; + struct i2c_client *client; + i2c_dev_device_t *i2c_dev_device_data; + + WB_I2C_DEV_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = 0; i < ARRAY_SIZE(i2c_dev_device_info); i++) { + i2c_dev_device_data = i2c_dev_device_info[i].platform_data; + i2c_dev_device_info[i].addr = i2c_dev_device_data->i2c_addr; + adap = i2c_get_adapter(i2c_dev_device_data->i2c_bus); + if (adap == NULL) { + i2c_dev_device_data->client = NULL; + i2c_dev_device_data->adap = NULL; + printk(KERN_ERR "get i2c bus %d adapter fail.\n", i2c_dev_device_data->i2c_bus); + continue; + } + i2c_dev_device_data->adap = adap; + client = i2c_new_client_device(adap, &i2c_dev_device_info[i]); + if (!client) { + i2c_dev_device_data->client = NULL; + printk(KERN_ERR "Failed to register i2c dev device %d at bus %d!\n", + i2c_dev_device_data->i2c_addr, i2c_dev_device_data->i2c_bus); + } else { + i2c_dev_device_data->client = client; + } + i2c_put_adapter(adap); + } + return 0; +} + +static void __exit wb_i2c_dev_device_exit(void) +{ + int i; + i2c_dev_device_t *i2c_dev_device_data; + int i2c_bus, i2c_addr; + struct i2c_adapter *adap; + + WB_I2C_DEV_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = ARRAY_SIZE(i2c_dev_device_info) - 1; i >= 0; i--) { + i2c_dev_device_data = i2c_dev_device_info[i].platform_data; + i2c_bus = i2c_dev_device_data->i2c_bus; + i2c_addr = i2c_dev_device_data->i2c_addr; + adap = i2c_get_adapter(i2c_bus); + if (adap == NULL) { + printk(KERN_WARNING "i2c adapter-%d is NULL, skip to unregister i2c client: %d-%04x\n", + i2c_bus, i2c_bus, i2c_addr); + i2c_dev_device_data->client = NULL; + i2c_dev_device_data->adap = NULL; + continue; + } + if (adap != i2c_dev_device_data->adap) { + printk(KERN_WARNING "i2c adapter-%d address changed, origin addr: %p, new addr: %p, skip to unregister i2c client: %d-%04x\n", + i2c_bus, i2c_dev_device_data->adap, adap, i2c_bus, i2c_addr); + i2c_put_adapter(adap); + i2c_dev_device_data->client = NULL; + i2c_dev_device_data->adap = NULL; + continue; + } + if (i2c_dev_device_data->client) { + WB_I2C_DEV_DEVICE_DEBUG_VERBOSE("Starting unregister i2c client: %d-%04x\n", i2c_bus, i2c_addr); + if (device_is_registered(&i2c_dev_device_data->client->dev)) { + i2c_unregister_device(i2c_dev_device_data->client); + printk(KERN_INFO "Unregister i2c client: %d-%04x success\n", i2c_bus, i2c_addr); + } else { + printk(KERN_WARNING "i2c client: %d-%04x already unregister\n", i2c_bus, i2c_addr); + } + i2c_dev_device_data->client = NULL; + } else { + printk(KERN_WARNING "i2c client: %d-%04x is NULL\n", i2c_bus, i2c_addr); + } + i2c_put_adapter(adap); + i2c_dev_device_data->adap = NULL; + } +} + +module_init(wb_i2c_dev_device_init); +module_exit(wb_i2c_dev_device_exit); +MODULE_DESCRIPTION("I2C DEV Devices"); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("support"); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/modules/driver/wb_i2c_mux_pca954x_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/modules/driver/wb_i2c_mux_pca954x_device.c new file mode 100644 index 00000000000..1996357c32b --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/modules/driver/wb_i2c_mux_pca954x_device.c @@ -0,0 +1,309 @@ +#include +#include +#include +#include +#include +#include + +#include + +static int g_wb_i2c_mux_pca954x_device_debug = 0; +static int g_wb_i2c_mux_pca954x_device_error = 0; + +module_param(g_wb_i2c_mux_pca954x_device_debug, int, S_IRUGO | S_IWUSR); +module_param(g_wb_i2c_mux_pca954x_device_error, int, S_IRUGO | S_IWUSR); + +#define WB_I2C_MUX_PCA954X_DEVICE_DEBUG_VERBOSE(fmt, args...) do { \ + if (g_wb_i2c_mux_pca954x_device_debug) { \ + printk(KERN_INFO "[WB_I2C_MUX_PCA954X_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +#define WB_I2C_MUX_PCA954X_DEVICE_DEBUG_ERROR(fmt, args...) do { \ + if (g_wb_i2c_mux_pca954x_device_error) { \ + printk(KERN_ERR "[WB_I2C_MUX_PCA954X_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data0 = { + .i2c_bus = 4, + .i2c_addr = 0x70, + .probe_disable = 1, + .select_chan_check = 0, + .close_chan_force_reset = 0, + .pca9548_base_nr = 32, + .pca9548_reset_type = PCA9548_RESET_FILE, + .rst_delay_b = 0, + .rst_delay = 1000, + .rst_delay_a = 1000, + .attr = { + .file_attr.dev_name = "/dev/cpld1", + .file_attr.offset = 0x31, + .file_attr.mask = 0x80, + .file_attr.reset_on = 0x00, + .file_attr.reset_off = 0x80, + }, +}; + +static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data1 = { + .i2c_bus = 8, + .i2c_addr = 0x70, + .probe_disable = 1, + .select_chan_check = 0, + .close_chan_force_reset = 0, + .pca9548_base_nr = 40, + .pca9548_reset_type = PCA9548_RESET_FILE, + .rst_delay_b = 0, + .rst_delay = 1000, + .rst_delay_a = 1000, + .attr = { + .file_attr.dev_name = "/dev/cpld3", + .file_attr.offset = 0x18, + .file_attr.mask = 0x01, + .file_attr.reset_on = 0x00, + .file_attr.reset_off = 0x01, + }, +}; + +static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data2 = { + .i2c_bus = 9, + .i2c_addr = 0x70, + .probe_disable = 1, + .select_chan_check = 0, + .close_chan_force_reset = 0, + .pca9548_base_nr = 48, + .pca9548_reset_type = PCA9548_RESET_FILE, + .rst_delay_b = 0, + .rst_delay = 1000, + .rst_delay_a = 1000, + .attr = { + .file_attr.dev_name = "/dev/cpld3", + .file_attr.offset = 0x16, + .file_attr.mask = 0x01, + .file_attr.reset_on = 0x00, + .file_attr.reset_off = 0x01, + }, +}; + +static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data3 = { + .i2c_bus = 15, + .i2c_addr = 0x70, + .probe_disable = 1, + .select_chan_check = 0, + .close_chan_force_reset = 0, + .pca9548_base_nr = 56, + .pca9548_reset_type = PCA9548_RESET_FILE, + .rst_delay_b = 0, + .rst_delay = 1000, + .rst_delay_a = 1000, + .attr = { + .file_attr.dev_name = "/dev/fpga0", + .file_attr.offset = 0x80, + .file_attr.mask = 0x00000004, + .file_attr.reset_on = 0x00, + .file_attr.reset_off = 0x00000004, + .file_attr.width = 4, + }, +}; + +static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data4 = { + .i2c_bus = 16, + .i2c_addr = 0x70, + .probe_disable = 1, + .select_chan_check = 0, + .close_chan_force_reset = 0, + .pca9548_base_nr = 64, + .pca9548_reset_type = PCA9548_RESET_FILE, + .rst_delay_b = 0, + .rst_delay = 1000, + .rst_delay_a = 1000, + .attr = { + .file_attr.dev_name = "/dev/fpga0", + .file_attr.offset = 0x80, + .file_attr.mask = 0x00000008, + .file_attr.reset_on = 0x00, + .file_attr.reset_off = 0x00000008, + .file_attr.width = 4, + }, +}; + +static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data5 = { + .i2c_bus = 17, + .i2c_addr = 0x70, + .probe_disable = 1, + .select_chan_check = 0, + .close_chan_force_reset = 0, + .pca9548_base_nr = 72, + .pca9548_reset_type = PCA9548_RESET_FILE, + .rst_delay_b = 0, + .rst_delay = 1000, + .rst_delay_a = 1000, + .attr = { + .file_attr.dev_name = "/dev/fpga0", + .file_attr.offset = 0x80, + .file_attr.mask = 0x00000010, + .file_attr.reset_on = 0x00, + .file_attr.reset_off = 0x00000010, + .file_attr.width = 4, + }, +}; + +static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data6 = { + .i2c_bus = 19, + .i2c_addr = 0x70, + .probe_disable = 1, + .select_chan_check = 0, + .close_chan_force_reset = 0, + .pca9548_base_nr = 80, + .pca9548_reset_type = PCA9548_RESET_FILE, + .rst_delay_b = 0, + .rst_delay = 1000, + .rst_delay_a = 1000, + .attr = { + .file_attr.dev_name = "/dev/fpga0", + .file_attr.offset = 0x80, + .file_attr.mask = 0x00000040, + .file_attr.reset_on = 0x00, + .file_attr.reset_off = 0x00000040, + .file_attr.width = 4, + }, +}; + +static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data7 = { + .i2c_bus = 12, + .i2c_addr = 0x70, + .probe_disable = 1, + .select_chan_check = 0, + .close_chan_force_reset = 0, + .pca9548_base_nr = 88, + .pca9548_reset_type = PCA9548_RESET_FILE, + .rst_delay_b = 0, + .rst_delay = 1000, + .rst_delay_a = 1000, + .attr = { + .file_attr.dev_name = "/dev/fpga0", + .file_attr.offset = 0x80, + .file_attr.mask = 0x00000400, + .file_attr.reset_on = 0x00, + .file_attr.reset_off = 0x00000400, + .file_attr.width = 4, + }, +}; + +struct i2c_board_info i2c_mux_pca954x_device_info[] = { + { + .type = "wb_pca9548", + .platform_data = &i2c_mux_pca954x_device_data0, + }, + { + .type = "wb_pca9548", + .platform_data = &i2c_mux_pca954x_device_data1, + }, + { + .type = "wb_pca9548", + .platform_data = &i2c_mux_pca954x_device_data2, + }, + { + .type = "wb_pca9548", + .platform_data = &i2c_mux_pca954x_device_data3, + }, + { + .type = "wb_pca9548", + .platform_data = &i2c_mux_pca954x_device_data4, + }, + { + .type = "wb_pca9548", + .platform_data = &i2c_mux_pca954x_device_data5, + }, + { + .type = "wb_pca9548", + .platform_data = &i2c_mux_pca954x_device_data6, + }, + { + .type = "wb_pca9548", + .platform_data = &i2c_mux_pca954x_device_data7, + }, +}; + +static int __init wb_i2c_mux_pca954x_device_init(void) +{ + int i; + struct i2c_adapter *adap; + struct i2c_client *client; + i2c_mux_pca954x_device_t *i2c_mux_pca954x_device_data; + + WB_I2C_MUX_PCA954X_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = 0; i < ARRAY_SIZE(i2c_mux_pca954x_device_info); i++) { + i2c_mux_pca954x_device_data = i2c_mux_pca954x_device_info[i].platform_data; + i2c_mux_pca954x_device_info[i].addr = i2c_mux_pca954x_device_data->i2c_addr; + adap = i2c_get_adapter(i2c_mux_pca954x_device_data->i2c_bus); + if (adap == NULL) { + i2c_mux_pca954x_device_data->adap = NULL; + i2c_mux_pca954x_device_data->client = NULL; + printk(KERN_ERR "get i2c bus %d adapter fail.\n", i2c_mux_pca954x_device_data->i2c_bus); + continue; + } + i2c_mux_pca954x_device_data->adap = adap; + client = i2c_new_client_device(adap, &i2c_mux_pca954x_device_info[i]); + if (!client) { + i2c_mux_pca954x_device_data->client = NULL; + printk(KERN_ERR "Failed to register pca954x device %d at bus %d!\n", + i2c_mux_pca954x_device_data->i2c_addr, i2c_mux_pca954x_device_data->i2c_bus); + } else { + i2c_mux_pca954x_device_data->client = client; + } + i2c_put_adapter(adap); + } + return 0; +} + +static void __exit wb_i2c_mux_pca954x_device_exit(void) +{ + int i; + i2c_mux_pca954x_device_t *i2c_mux_pca954x_device_data; + int i2c_bus, i2c_addr; + struct i2c_adapter *adap; + + WB_I2C_MUX_PCA954X_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = ARRAY_SIZE(i2c_mux_pca954x_device_info) - 1; i >= 0; i--) { + i2c_mux_pca954x_device_data = i2c_mux_pca954x_device_info[i].platform_data; + i2c_bus = i2c_mux_pca954x_device_data->i2c_bus; + i2c_addr = i2c_mux_pca954x_device_data->i2c_addr; + adap = i2c_get_adapter(i2c_bus); + if (adap == NULL) { + printk(KERN_WARNING "i2c adapter-%d is NULL, skip to unregister i2c client: %d-%04x\n", + i2c_bus, i2c_bus, i2c_addr); + i2c_mux_pca954x_device_data->client = NULL; + i2c_mux_pca954x_device_data->adap = NULL; + continue; + } + if (adap != i2c_mux_pca954x_device_data->adap) { + printk(KERN_WARNING "i2c adapter-%d address changed, origin addr: %p, new addr: %p, skip to unregister i2c client: %d-%04x\n", + i2c_bus, i2c_mux_pca954x_device_data->adap, adap, i2c_bus, i2c_addr); + i2c_put_adapter(adap); + i2c_mux_pca954x_device_data->client = NULL; + i2c_mux_pca954x_device_data->adap = NULL; + continue; + } + if (i2c_mux_pca954x_device_data->client) { + WB_I2C_MUX_PCA954X_DEVICE_DEBUG_VERBOSE("Starting unregister i2c client: %d-%04x\n", i2c_bus, i2c_addr); + if (device_is_registered(&i2c_mux_pca954x_device_data->client->dev)) { + i2c_unregister_device(i2c_mux_pca954x_device_data->client); + printk(KERN_INFO "Unregister i2c client: %d-%04x success\n", i2c_bus, i2c_addr); + } else { + printk(KERN_WARNING "i2c client: %d-%04x already unregister\n", i2c_bus,i2c_addr); + } + i2c_mux_pca954x_device_data->client = NULL; + } else { + printk(KERN_WARNING "i2c client: %d-%04x is NULL\n", i2c_bus,i2c_addr); + } + i2c_put_adapter(adap); + i2c_mux_pca954x_device_data->adap = NULL; + } +} + +module_init(wb_i2c_mux_pca954x_device_init); +module_exit(wb_i2c_mux_pca954x_device_exit); +MODULE_DESCRIPTION("I2C MUX PCA954X Devices"); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("support"); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/modules/driver/wb_i2c_mux_pca954x_device_b3.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/modules/driver/wb_i2c_mux_pca954x_device_b3.c new file mode 100644 index 00000000000..7fc76e14f1f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/modules/driver/wb_i2c_mux_pca954x_device_b3.c @@ -0,0 +1,314 @@ +/* + * wb_i2c_mux_pca954x_device_b3.c + * CPO build3 i2c-mux-pca9548 topology, fix the 9548 address under the i2c-16 to 0x74 + */ + +#include +#include +#include +#include +#include +#include + +#include + +static int g_wb_i2c_mux_pca954x_device_debug = 0; +static int g_wb_i2c_mux_pca954x_device_error = 0; + +module_param(g_wb_i2c_mux_pca954x_device_debug, int, S_IRUGO | S_IWUSR); +module_param(g_wb_i2c_mux_pca954x_device_error, int, S_IRUGO | S_IWUSR); + +#define WB_I2C_MUX_PCA954X_DEVICE_DEBUG_VERBOSE(fmt, args...) do { \ + if (g_wb_i2c_mux_pca954x_device_debug) { \ + printk(KERN_INFO "[WB_I2C_MUX_PCA954X_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +#define WB_I2C_MUX_PCA954X_DEVICE_DEBUG_ERROR(fmt, args...) do { \ + if (g_wb_i2c_mux_pca954x_device_error) { \ + printk(KERN_ERR "[WB_I2C_MUX_PCA954X_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data0 = { + .i2c_bus = 4, + .i2c_addr = 0x70, + .probe_disable = 1, + .select_chan_check = 0, + .close_chan_force_reset = 0, + .pca9548_base_nr = 32, + .pca9548_reset_type = PCA9548_RESET_FILE, + .rst_delay_b = 0, + .rst_delay = 1000, + .rst_delay_a = 1000, + .attr = { + .file_attr.dev_name = "/dev/cpld1", + .file_attr.offset = 0x31, + .file_attr.mask = 0x80, + .file_attr.reset_on = 0x00, + .file_attr.reset_off = 0x80, + }, +}; + +static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data1 = { + .i2c_bus = 8, + .i2c_addr = 0x70, + .probe_disable = 1, + .select_chan_check = 0, + .close_chan_force_reset = 0, + .pca9548_base_nr = 40, + .pca9548_reset_type = PCA9548_RESET_FILE, + .rst_delay_b = 0, + .rst_delay = 1000, + .rst_delay_a = 1000, + .attr = { + .file_attr.dev_name = "/dev/cpld3", + .file_attr.offset = 0x18, + .file_attr.mask = 0x01, + .file_attr.reset_on = 0x00, + .file_attr.reset_off = 0x01, + }, +}; + +static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data2 = { + .i2c_bus = 9, + .i2c_addr = 0x70, + .probe_disable = 1, + .select_chan_check = 0, + .close_chan_force_reset = 0, + .pca9548_base_nr = 48, + .pca9548_reset_type = PCA9548_RESET_FILE, + .rst_delay_b = 0, + .rst_delay = 1000, + .rst_delay_a = 1000, + .attr = { + .file_attr.dev_name = "/dev/cpld3", + .file_attr.offset = 0x16, + .file_attr.mask = 0x01, + .file_attr.reset_on = 0x00, + .file_attr.reset_off = 0x01, + }, +}; + +static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data3 = { + .i2c_bus = 15, + .i2c_addr = 0x70, + .probe_disable = 1, + .select_chan_check = 0, + .close_chan_force_reset = 0, + .pca9548_base_nr = 56, + .pca9548_reset_type = PCA9548_RESET_FILE, + .rst_delay_b = 0, + .rst_delay = 1000, + .rst_delay_a = 1000, + .attr = { + .file_attr.dev_name = "/dev/fpga0", + .file_attr.offset = 0x80, + .file_attr.mask = 0x00000004, + .file_attr.reset_on = 0x00, + .file_attr.reset_off = 0x00000004, + .file_attr.width = 4, + }, +}; + +static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data4 = { + .i2c_bus = 16, + .i2c_addr = 0x74, + .probe_disable = 1, + .select_chan_check = 0, + .close_chan_force_reset = 0, + .pca9548_base_nr = 64, + .pca9548_reset_type = PCA9548_RESET_FILE, + .rst_delay_b = 0, + .rst_delay = 1000, + .rst_delay_a = 1000, + .attr = { + .file_attr.dev_name = "/dev/fpga0", + .file_attr.offset = 0x80, + .file_attr.mask = 0x00000008, + .file_attr.reset_on = 0x00, + .file_attr.reset_off = 0x00000008, + .file_attr.width = 4, + }, +}; + +static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data5 = { + .i2c_bus = 17, + .i2c_addr = 0x70, + .probe_disable = 1, + .select_chan_check = 0, + .close_chan_force_reset = 0, + .pca9548_base_nr = 72, + .pca9548_reset_type = PCA9548_RESET_FILE, + .rst_delay_b = 0, + .rst_delay = 1000, + .rst_delay_a = 1000, + .attr = { + .file_attr.dev_name = "/dev/fpga0", + .file_attr.offset = 0x80, + .file_attr.mask = 0x00000010, + .file_attr.reset_on = 0x00, + .file_attr.reset_off = 0x00000010, + .file_attr.width = 4, + }, +}; + +static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data6 = { + .i2c_bus = 19, + .i2c_addr = 0x70, + .probe_disable = 1, + .select_chan_check = 0, + .close_chan_force_reset = 0, + .pca9548_base_nr = 80, + .pca9548_reset_type = PCA9548_RESET_FILE, + .rst_delay_b = 0, + .rst_delay = 1000, + .rst_delay_a = 1000, + .attr = { + .file_attr.dev_name = "/dev/fpga0", + .file_attr.offset = 0x80, + .file_attr.mask = 0x00000040, + .file_attr.reset_on = 0x00, + .file_attr.reset_off = 0x00000040, + .file_attr.width = 4, + }, +}; + +static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data7 = { + .i2c_bus = 12, + .i2c_addr = 0x70, + .probe_disable = 1, + .select_chan_check = 0, + .close_chan_force_reset = 0, + .pca9548_base_nr = 88, + .pca9548_reset_type = PCA9548_RESET_FILE, + .rst_delay_b = 0, + .rst_delay = 1000, + .rst_delay_a = 1000, + .attr = { + .file_attr.dev_name = "/dev/fpga0", + .file_attr.offset = 0x80, + .file_attr.mask = 0x00000400, + .file_attr.reset_on = 0x00, + .file_attr.reset_off = 0x00000400, + .file_attr.width = 4, + }, +}; + +struct i2c_board_info i2c_mux_pca954x_device_info[] = { + { + .type = "wb_pca9548", + .platform_data = &i2c_mux_pca954x_device_data0, + }, + { + .type = "wb_pca9548", + .platform_data = &i2c_mux_pca954x_device_data1, + }, + { + .type = "wb_pca9548", + .platform_data = &i2c_mux_pca954x_device_data2, + }, + { + .type = "wb_pca9548", + .platform_data = &i2c_mux_pca954x_device_data3, + }, + { + .type = "wb_pca9548", + .platform_data = &i2c_mux_pca954x_device_data4, + }, + { + .type = "wb_pca9548", + .platform_data = &i2c_mux_pca954x_device_data5, + }, + { + .type = "wb_pca9548", + .platform_data = &i2c_mux_pca954x_device_data6, + }, + { + .type = "wb_pca9548", + .platform_data = &i2c_mux_pca954x_device_data7, + }, +}; + +static int __init wb_i2c_mux_pca954x_device_init(void) +{ + int i; + struct i2c_adapter *adap; + struct i2c_client *client; + i2c_mux_pca954x_device_t *i2c_mux_pca954x_device_data; + + WB_I2C_MUX_PCA954X_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = 0; i < ARRAY_SIZE(i2c_mux_pca954x_device_info); i++) { + i2c_mux_pca954x_device_data = i2c_mux_pca954x_device_info[i].platform_data; + i2c_mux_pca954x_device_info[i].addr = i2c_mux_pca954x_device_data->i2c_addr; + adap = i2c_get_adapter(i2c_mux_pca954x_device_data->i2c_bus); + if (adap == NULL) { + i2c_mux_pca954x_device_data->adap = NULL; + i2c_mux_pca954x_device_data->client = NULL; + printk(KERN_ERR "get i2c bus %d adapter fail.\n", i2c_mux_pca954x_device_data->i2c_bus); + continue; + } + i2c_mux_pca954x_device_data->adap = adap; + client = i2c_new_client_device(adap, &i2c_mux_pca954x_device_info[i]); + if (!client) { + i2c_mux_pca954x_device_data->client = NULL; + printk(KERN_ERR "Failed to register pca954x device %d at bus %d!\n", + i2c_mux_pca954x_device_data->i2c_addr, i2c_mux_pca954x_device_data->i2c_bus); + } else { + i2c_mux_pca954x_device_data->client = client; + } + i2c_put_adapter(adap); + } + return 0; +} + +static void __exit wb_i2c_mux_pca954x_device_exit(void) +{ + int i; + i2c_mux_pca954x_device_t *i2c_mux_pca954x_device_data; + int i2c_bus, i2c_addr; + struct i2c_adapter *adap; + + WB_I2C_MUX_PCA954X_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = ARRAY_SIZE(i2c_mux_pca954x_device_info) - 1; i >= 0; i--) { + i2c_mux_pca954x_device_data = i2c_mux_pca954x_device_info[i].platform_data; + i2c_bus = i2c_mux_pca954x_device_data->i2c_bus; + i2c_addr = i2c_mux_pca954x_device_data->i2c_addr; + adap = i2c_get_adapter(i2c_bus); + if (adap == NULL) { + printk(KERN_WARNING "i2c adapter-%d is NULL, skip to unregister i2c client: %d-%04x\n", + i2c_bus, i2c_bus, i2c_addr); + i2c_mux_pca954x_device_data->client = NULL; + i2c_mux_pca954x_device_data->adap = NULL; + continue; + } + if (adap != i2c_mux_pca954x_device_data->adap) { + printk(KERN_WARNING "i2c adapter-%d address changed, origin addr: %p, new addr: %p, skip to unregister i2c client: %d-%04x\n", + i2c_bus, i2c_mux_pca954x_device_data->adap, adap, i2c_bus, i2c_addr); + i2c_put_adapter(adap); + i2c_mux_pca954x_device_data->client = NULL; + i2c_mux_pca954x_device_data->adap = NULL; + continue; + } + if (i2c_mux_pca954x_device_data->client) { + WB_I2C_MUX_PCA954X_DEVICE_DEBUG_VERBOSE("Starting unregister i2c client: %d-%04x\n", i2c_bus, i2c_addr); + if (device_is_registered(&i2c_mux_pca954x_device_data->client->dev)) { + i2c_unregister_device(i2c_mux_pca954x_device_data->client); + printk(KERN_INFO "Unregister i2c client: %d-%04x success\n", i2c_bus, i2c_addr); + } else { + printk(KERN_WARNING "i2c client: %d-%04x already unregister\n", i2c_bus,i2c_addr); + } + i2c_mux_pca954x_device_data->client = NULL; + } else { + printk(KERN_WARNING "i2c client: %d-%04x is NULL\n", i2c_bus,i2c_addr); + } + i2c_put_adapter(adap); + i2c_mux_pca954x_device_data->adap = NULL; + } +} + +module_init(wb_i2c_mux_pca954x_device_init); +module_exit(wb_i2c_mux_pca954x_device_exit); +MODULE_DESCRIPTION("I2C MUX PCA954X Devices"); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("support"); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/modules/driver/wb_i2c_ocores_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/modules/driver/wb_i2c_ocores_device.c new file mode 100644 index 00000000000..526922d4cda --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/modules/driver/wb_i2c_ocores_device.c @@ -0,0 +1,911 @@ +#include +#include +#include +#include +#include + +#include + +static int g_wb_i2c_ocores_device_debug = 0; +static int g_wb_i2c_ocores_device_error = 0; + +module_param(g_wb_i2c_ocores_device_debug, int, S_IRUGO | S_IWUSR); +module_param(g_wb_i2c_ocores_device_error, int, S_IRUGO | S_IWUSR); + +#define WB_I2C_OCORE_DEVICE_DEBUG_VERBOSE(fmt, args...) do { \ + if (g_wb_i2c_ocores_device_debug) { \ + printk(KERN_INFO "[WB_I2C_OCORE_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +#define WB_I2C_OCORE_DEVICE_DEBUG_ERROR(fmt, args...) do { \ + if (g_wb_i2c_ocores_device_error) { \ + printk(KERN_ERR "[WB_I2C_OCORE_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +static i2c_ocores_device_t i2c_ocores_device_data0 = { + .adap_nr = 2, + .big_endian = 0, + .dev_name = "/dev/fpga0", + .reg_access_mode = 3, + .dev_base = 0x0800, + .reg_shift = 2, + .reg_io_width = 4, + .ip_clock_khz = 125000, + .bus_clock_khz = 100, + .irq_type =1, + .irq_offset = 0, + .pci_domain = 0, + .pci_bus = 3, + .pci_slot = 0, + .pci_fn = 0, + .check_pci_id = 1, + .pci_id = 0x1ded7022, +}; + +static i2c_ocores_device_t i2c_ocores_device_data1 = { + .adap_nr = 3, + .big_endian = 0, + .dev_name = "/dev/fpga0", + .reg_access_mode = 3, + .dev_base = 0x0820, + .reg_shift = 2, + .reg_io_width = 4, + .ip_clock_khz = 125000, + .bus_clock_khz = 100, + .irq_type =1, + .irq_offset = 1, + .pci_domain = 0, + .pci_bus = 3, + .pci_slot = 0, + .pci_fn = 0, + .check_pci_id = 1, + .pci_id = 0x1ded7022, +}; + +static i2c_ocores_device_t i2c_ocores_device_data2 = { + .adap_nr = 4, + .big_endian = 0, + .dev_name = "/dev/fpga0", + .reg_access_mode = 3, + .dev_base = 0x0840, + .reg_shift = 2, + .reg_io_width = 4, + .ip_clock_khz = 125000, + .bus_clock_khz = 100, + .irq_type =1, + .irq_offset = 2, + .pci_domain = 0, + .pci_bus = 3, + .pci_slot = 0, + .pci_fn = 0, + .check_pci_id = 1, + .pci_id = 0x1ded7022, +}; + +static i2c_ocores_device_t i2c_ocores_device_data3 = { + .adap_nr = 5, + .big_endian = 0, + .dev_name = "/dev/fpga0", + .reg_access_mode = 3, + .dev_base = 0x0860, + .reg_shift = 2, + .reg_io_width = 4, + .ip_clock_khz = 125000, + .bus_clock_khz = 100, + .irq_type =1, + .irq_offset = 3, + .pci_domain = 0, + .pci_bus = 3, + .pci_slot = 0, + .pci_fn = 0, + .check_pci_id = 1, + .pci_id = 0x1ded7022, +}; + +static i2c_ocores_device_t i2c_ocores_device_data4 = { + .adap_nr = 6, + .big_endian = 0, + .dev_name = "/dev/fpga0", + .reg_access_mode = 3, + .dev_base = 0x0880, + .reg_shift = 2, + .reg_io_width = 4, + .ip_clock_khz = 125000, + .bus_clock_khz = 100, + .irq_type =1, + .irq_offset = 4, + .pci_domain = 0, + .pci_bus = 3, + .pci_slot = 0, + .pci_fn = 0, + .check_pci_id = 1, + .pci_id = 0x1ded7022, +}; + +static i2c_ocores_device_t i2c_ocores_device_data5 = { + .adap_nr = 7, + .big_endian = 0, + .dev_name = "/dev/fpga0", + .reg_access_mode = 3, + .dev_base = 0x08a0, + .reg_shift = 2, + .reg_io_width = 4, + .ip_clock_khz = 125000, + .bus_clock_khz = 100, + .irq_type =1, + .irq_offset = 5, + .pci_domain = 0, + .pci_bus = 3, + .pci_slot = 0, + .pci_fn = 0, + .check_pci_id = 1, + .pci_id = 0x1ded7022, +}; + +static i2c_ocores_device_t i2c_ocores_device_data6 = { + .adap_nr = 8, + .big_endian = 0, + .dev_name = "/dev/fpga0", + .reg_access_mode = 3, + .dev_base = 0x08c0, + .reg_shift = 2, + .reg_io_width = 4, + .ip_clock_khz = 125000, + .bus_clock_khz = 100, + .irq_type =1, + .irq_offset = 6, + .pci_domain = 0, + .pci_bus = 3, + .pci_slot = 0, + .pci_fn = 0, +}; + +static i2c_ocores_device_t i2c_ocores_device_data7 = { + .adap_nr = 9, + .big_endian = 0, + .dev_name = "/dev/fpga0", + .reg_access_mode = 3, + .dev_base = 0x08e0, + .reg_shift = 2, + .reg_io_width = 4, + .ip_clock_khz = 125000, + .bus_clock_khz = 100, + .irq_type =1, + .irq_offset = 7, + .pci_domain = 0, + .pci_bus = 3, + .pci_slot = 0, + .pci_fn = 0, + .check_pci_id = 1, + .pci_id = 0x1ded7022, +}; + +static i2c_ocores_device_t i2c_ocores_device_data8 = { + .adap_nr = 10, + .big_endian = 0, + .dev_name = "/dev/fpga0", + .reg_access_mode = 3, + .dev_base = 0x0900, + .reg_shift = 2, + .reg_io_width = 4, + .ip_clock_khz = 125000, + .bus_clock_khz = 100, + .irq_type =1, + .irq_offset = 8, + .pci_domain = 0, + .pci_bus = 3, + .pci_slot = 0, + .pci_fn = 0, + .check_pci_id = 1, + .pci_id = 0x1ded7022, +}; + +static i2c_ocores_device_t i2c_ocores_device_data9 = { + .adap_nr = 11, + .big_endian = 0, + .dev_name = "/dev/fpga0", + .reg_access_mode = 3, + .dev_base = 0x0920, + .reg_shift = 2, + .reg_io_width = 4, + .ip_clock_khz = 125000, + .bus_clock_khz = 100, + .irq_type =1, + .irq_offset = 9, + .pci_domain = 0, + .pci_bus = 3, + .pci_slot = 0, + .pci_fn = 0, + .check_pci_id = 1, + .pci_id = 0x1ded7022, +}; + +static i2c_ocores_device_t i2c_ocores_device_data10 = { + .adap_nr = 12, + .big_endian = 0, + .dev_name = "/dev/fpga0", + .reg_access_mode = 3, + .dev_base = 0x0940, + .reg_shift = 2, + .reg_io_width = 4, + .ip_clock_khz = 125000, + .bus_clock_khz = 100, + .irq_type =1, + .irq_offset = 10, + .pci_domain = 0, + .pci_bus = 3, + .pci_slot = 0, + .pci_fn = 0, + .check_pci_id = 1, + .pci_id = 0x1ded7022, +}; + +static i2c_ocores_device_t i2c_ocores_device_data11 = { + .adap_nr = 13, + .big_endian = 0, + .dev_name = "/dev/fpga0", + .reg_access_mode = 3, + .dev_base = 0x0960, + .reg_shift = 2, + .reg_io_width = 4, + .ip_clock_khz = 125000, + .bus_clock_khz = 100, + .irq_type =1, + .irq_offset = 11, + .pci_domain = 0, + .pci_bus = 3, + .pci_slot = 0, + .pci_fn = 0, + .check_pci_id = 1, + .pci_id = 0x1ded7022, +}; + +static i2c_ocores_device_t i2c_ocores_device_data12 = { + .adap_nr = 14, + .big_endian = 0, + .dev_name = "/dev/fpga0", + .reg_access_mode = 3, + .dev_base = 0x0980, + .reg_shift = 2, + .reg_io_width = 4, + .ip_clock_khz = 125000, + .bus_clock_khz = 100, + .irq_type =1, + .irq_offset = 12, + .pci_domain = 0, + .pci_bus = 3, + .pci_slot = 0, + .pci_fn = 0, + .check_pci_id = 1, + .pci_id = 0x1ded7022, +}; + +static i2c_ocores_device_t i2c_ocores_device_data13 = { + .adap_nr = 15, + .big_endian = 0, + .dev_name = "/dev/fpga0", + .reg_access_mode = 3, + .dev_base = 0x09a0, + .reg_shift = 2, + .reg_io_width = 4, + .ip_clock_khz = 125000, + .bus_clock_khz = 100, + .irq_type =1, + .irq_offset = 13, + .pci_domain = 0, + .pci_bus = 3, + .pci_slot = 0, + .pci_fn = 0, + .check_pci_id = 1, + .pci_id = 0x1ded7022, +}; + +static i2c_ocores_device_t i2c_ocores_device_data14 = { + .adap_nr = 16, + .big_endian = 0, + .dev_name = "/dev/fpga0", + .reg_access_mode = 3, + .dev_base = 0x09c0, + .reg_shift = 2, + .reg_io_width = 4, + .ip_clock_khz = 125000, + .bus_clock_khz = 100, + .irq_type =1, + .irq_offset = 14, + .pci_domain = 0, + .pci_bus = 3, + .pci_slot = 0, + .pci_fn = 0, + .check_pci_id = 1, + .pci_id = 0x1ded7022, +}; + +static i2c_ocores_device_t i2c_ocores_device_data15 = { + .adap_nr = 17, + .big_endian = 0, + .dev_name = "/dev/fpga0", + .reg_access_mode = 3, + .dev_base = 0x09e0, + .reg_shift = 2, + .reg_io_width = 4, + .ip_clock_khz = 125000, + .bus_clock_khz = 100, + .irq_type =1, + .irq_offset = 15, + .pci_domain = 0, + .pci_bus = 3, + .pci_slot = 0, + .pci_fn = 0, + .check_pci_id = 1, + .pci_id = 0x1ded7022, +}; + +static i2c_ocores_device_t i2c_ocores_device_data16 = { + .adap_nr = 18, + .big_endian = 0, + .dev_name = "/dev/fpga0", + .reg_access_mode = 3, + .dev_base = 0x0a00, + .reg_shift = 2, + .reg_io_width = 4, + .ip_clock_khz = 125000, + .bus_clock_khz = 100, + .irq_type =1, + .irq_offset = 16, + .pci_domain = 0, + .pci_bus = 3, + .pci_slot = 0, + .pci_fn = 0, + .check_pci_id = 1, + .pci_id = 0x1ded7022, +}; + +static i2c_ocores_device_t i2c_ocores_device_data17 = { + .adap_nr = 19, + .big_endian = 0, + .dev_name = "/dev/fpga0", + .reg_access_mode = 3, + .dev_base = 0x0a20, + .reg_shift = 2, + .reg_io_width = 4, + .ip_clock_khz = 125000, + .bus_clock_khz = 100, + .irq_type =1, + .irq_offset = 17, + .pci_domain = 0, + .pci_bus = 3, + .pci_slot = 0, + .pci_fn = 0, + .check_pci_id = 1, + .pci_id = 0x1ded7022, +}; + +static i2c_ocores_device_t i2c_ocores_device_data18 = { + .adap_nr = 20, + .big_endian = 0, + .dev_name = "/dev/fpga0", + .reg_access_mode = 3, + .dev_base = 0x0a40, + .reg_shift = 2, + .reg_io_width = 4, + .ip_clock_khz = 125000, + .bus_clock_khz = 100, + .irq_type =1, + .irq_offset = 18, + .pci_domain = 0, + .pci_bus = 3, + .pci_slot = 0, + .pci_fn = 0, + .check_pci_id = 1, + .pci_id = 0x1ded7022, +}; + +static i2c_ocores_device_t i2c_ocores_device_data19 = { + .adap_nr = 21, + .big_endian = 0, + .dev_name = "/dev/fpga0", + .reg_access_mode = 3, + .dev_base = 0x0a60, + .reg_shift = 2, + .reg_io_width = 4, + .ip_clock_khz = 125000, + .bus_clock_khz = 100, + .irq_type =1, + .irq_offset = 19, + .pci_domain = 0, + .pci_bus = 3, + .pci_slot = 0, + .pci_fn = 0, + .check_pci_id = 1, + .pci_id = 0x1ded7022, +}; + +static i2c_ocores_device_t i2c_ocores_device_data20 = { + .adap_nr = 22, + .big_endian = 0, + .dev_name = "/dev/fpga0", + .reg_access_mode = 3, + .dev_base = 0x0a80, + .reg_shift = 2, + .reg_io_width = 4, + .ip_clock_khz = 125000, + .bus_clock_khz = 100, + .irq_type =1, + .irq_offset = 20, + .pci_domain = 0, + .pci_bus = 3, + .pci_slot = 0, + .pci_fn = 0, + .check_pci_id = 1, + .pci_id = 0x1ded7022, +}; + +static i2c_ocores_device_t i2c_ocores_device_data21 = { + .adap_nr = 23, + .big_endian = 0, + .dev_name = "/dev/fpga0", + .reg_access_mode = 3, + .dev_base = 0x0aa0, + .reg_shift = 2, + .reg_io_width = 4, + .ip_clock_khz = 125000, + .bus_clock_khz = 100, + .irq_type =1, + .irq_offset = 21, + .pci_domain = 0, + .pci_bus = 3, + .pci_slot = 0, + .pci_fn = 0, + .check_pci_id = 1, + .pci_id = 0x1ded7022, +}; + +static i2c_ocores_device_t i2c_ocores_device_data22 = { + .adap_nr = 24, + .big_endian = 0, + .dev_name = "/dev/fpga1", + .reg_access_mode = 3, + .dev_base = 0x0800, + .reg_shift = 2, + .reg_io_width = 4, + .ip_clock_khz = 125000, + .bus_clock_khz = 100, + .irq_type =1, + .irq_offset = 0, + .pci_domain = 0, + .pci_bus = 4, + .pci_slot = 0, + .pci_fn = 0, + .check_pci_id = 1, + .pci_id = 0x1ded7021, +}; + +static i2c_ocores_device_t i2c_ocores_device_data23 = { + .adap_nr = 25, + .big_endian = 0, + .dev_name = "/dev/fpga1", + .reg_access_mode = 3, + .dev_base = 0x0820, + .reg_shift = 2, + .reg_io_width = 4, + .ip_clock_khz = 125000, + .bus_clock_khz = 100, + .irq_type =1, + .irq_offset = 1, + .pci_domain = 0, + .pci_bus = 4, + .pci_slot = 0, + .pci_fn = 0, + .check_pci_id = 1, + .pci_id = 0x1ded7021, +}; + +static i2c_ocores_device_t i2c_ocores_device_data24 = { + .adap_nr = 26, + .big_endian = 0, + .dev_name = "/dev/fpga1", + .reg_access_mode = 3, + .dev_base = 0x0840, + .reg_shift = 2, + .reg_io_width = 4, + .ip_clock_khz = 125000, + .bus_clock_khz = 100, + .irq_type =1, + .irq_offset = 2, + .pci_domain = 0, + .pci_bus = 4, + .pci_slot = 0, + .pci_fn = 0, + .check_pci_id = 1, + .pci_id = 0x1ded7021, +}; + +static i2c_ocores_device_t i2c_ocores_device_data25 = { + .adap_nr = 27, + .big_endian = 0, + .dev_name = "/dev/fpga1", + .reg_access_mode = 3, + .dev_base = 0x0860, + .reg_shift = 2, + .reg_io_width = 4, + .ip_clock_khz = 125000, + .bus_clock_khz = 100, + .irq_type =1, + .irq_offset = 3, + .pci_domain = 0, + .pci_bus = 4, + .pci_slot = 0, + .pci_fn = 0, + .check_pci_id = 1, + .pci_id = 0x1ded7021, +}; + +static i2c_ocores_device_t i2c_ocores_device_data26 = { + .adap_nr = 28, + .big_endian = 0, + .dev_name = "/dev/fpga1", + .reg_access_mode = 3, + .dev_base = 0x0880, + .reg_shift = 2, + .reg_io_width = 4, + .ip_clock_khz = 125000, + .bus_clock_khz = 100, + .irq_type =1, + .irq_offset = 4, + .pci_domain = 0, + .pci_bus = 4, + .pci_slot = 0, + .pci_fn = 0, + .check_pci_id = 1, + .pci_id = 0x1ded7021, +}; + +static i2c_ocores_device_t i2c_ocores_device_data27 = { + .adap_nr = 29, + .big_endian = 0, + .dev_name = "/dev/fpga1", + .reg_access_mode = 3, + .dev_base = 0x08a0, + .reg_shift = 2, + .reg_io_width = 4, + .ip_clock_khz = 125000, + .bus_clock_khz = 100, + .irq_type =1, + .irq_offset = 5, + .pci_domain = 0, + .pci_bus = 4, + .pci_slot = 0, + .pci_fn = 0, + .check_pci_id = 1, + .pci_id = 0x1ded7021, +}; + +static i2c_ocores_device_t i2c_ocores_device_data28 = { + .adap_nr = 30, + .big_endian = 0, + .dev_name = "/dev/fpga1", + .reg_access_mode = 3, + .dev_base = 0x08c0, + .reg_shift = 2, + .reg_io_width = 4, + .ip_clock_khz = 125000, + .bus_clock_khz = 100, + .irq_type =1, + .irq_offset = 6, + .pci_domain = 0, + .pci_bus = 4, + .pci_slot = 0, + .pci_fn = 0, + .check_pci_id = 1, + .pci_id = 0x1ded7021, +}; + +static i2c_ocores_device_t i2c_ocores_device_data29 = { + .adap_nr = 31, + .big_endian = 0, + .dev_name = "/dev/fpga1", + .reg_access_mode = 3, + .dev_base = 0x08e0, + .reg_shift = 2, + .reg_io_width = 4, + .ip_clock_khz = 125000, + .bus_clock_khz = 100, + .irq_type =1, + .irq_offset = 7, + .pci_domain = 0, + .pci_bus = 4, + .pci_slot = 0, + .pci_fn = 0, + .check_pci_id = 1, + .pci_id = 0x1ded7021, +}; + +static void wb_i2c_ocores_device_release(struct device *dev) +{ + return; +} + +static struct platform_device i2c_ocores_device[] = { + { + .name = "wb-ocores-i2c", + .id = 1, + .dev = { + .platform_data = &i2c_ocores_device_data0, + .release = wb_i2c_ocores_device_release, + }, + }, + { + .name = "wb-ocores-i2c", + .id = 2, + .dev = { + .platform_data = &i2c_ocores_device_data1, + .release = wb_i2c_ocores_device_release, + }, + }, + { + .name = "wb-ocores-i2c", + .id = 3, + .dev = { + .platform_data = &i2c_ocores_device_data2, + .release = wb_i2c_ocores_device_release, + }, + }, + { + .name = "wb-ocores-i2c", + .id = 4, + .dev = { + .platform_data = &i2c_ocores_device_data3, + .release = wb_i2c_ocores_device_release, + }, + }, + { + .name = "wb-ocores-i2c", + .id = 5, + .dev = { + .platform_data = &i2c_ocores_device_data4, + .release = wb_i2c_ocores_device_release, + }, + }, + { + .name = "wb-ocores-i2c", + .id = 6, + .dev = { + .platform_data = &i2c_ocores_device_data5, + .release = wb_i2c_ocores_device_release, + }, + }, + { + .name = "wb-ocores-i2c", + .id = 7, + .dev = { + .platform_data = &i2c_ocores_device_data6, + .release = wb_i2c_ocores_device_release, + }, + }, + { + .name = "wb-ocores-i2c", + .id = 8, + .dev = { + .platform_data = &i2c_ocores_device_data7, + .release = wb_i2c_ocores_device_release, + }, + }, + { + .name = "wb-ocores-i2c", + .id = 9, + .dev = { + .platform_data = &i2c_ocores_device_data8, + .release = wb_i2c_ocores_device_release, + }, + }, + { + .name = "wb-ocores-i2c", + .id = 10, + .dev = { + .platform_data = &i2c_ocores_device_data9, + .release = wb_i2c_ocores_device_release, + }, + }, + { + .name = "wb-ocores-i2c", + .id = 11, + .dev = { + .platform_data = &i2c_ocores_device_data10, + .release = wb_i2c_ocores_device_release, + }, + }, + { + .name = "wb-ocores-i2c", + .id = 12, + .dev = { + .platform_data = &i2c_ocores_device_data11, + .release = wb_i2c_ocores_device_release, + }, + }, + { + .name = "wb-ocores-i2c", + .id = 13, + .dev = { + .platform_data = &i2c_ocores_device_data12, + .release = wb_i2c_ocores_device_release, + }, + }, + { + .name = "wb-ocores-i2c", + .id = 14, + .dev = { + .platform_data = &i2c_ocores_device_data13, + .release = wb_i2c_ocores_device_release, + }, + }, + { + .name = "wb-ocores-i2c", + .id = 15, + .dev = { + .platform_data = &i2c_ocores_device_data14, + .release = wb_i2c_ocores_device_release, + }, + }, + { + .name = "wb-ocores-i2c", + .id = 16, + .dev = { + .platform_data = &i2c_ocores_device_data15, + .release = wb_i2c_ocores_device_release, + }, + }, + { + .name = "wb-ocores-i2c", + .id = 17, + .dev = { + .platform_data = &i2c_ocores_device_data16, + .release = wb_i2c_ocores_device_release, + }, + }, + { + .name = "wb-ocores-i2c", + .id = 18, + .dev = { + .platform_data = &i2c_ocores_device_data17, + .release = wb_i2c_ocores_device_release, + }, + }, + { + .name = "wb-ocores-i2c", + .id = 19, + .dev = { + .platform_data = &i2c_ocores_device_data18, + .release = wb_i2c_ocores_device_release, + }, + }, + { + .name = "wb-ocores-i2c", + .id = 20, + .dev = { + .platform_data = &i2c_ocores_device_data19, + .release = wb_i2c_ocores_device_release, + }, + }, + { + .name = "wb-ocores-i2c", + .id = 21, + .dev = { + .platform_data = &i2c_ocores_device_data20, + .release = wb_i2c_ocores_device_release, + }, + }, + { + .name = "wb-ocores-i2c", + .id = 22, + .dev = { + .platform_data = &i2c_ocores_device_data21, + .release = wb_i2c_ocores_device_release, + }, + }, + { + .name = "wb-ocores-i2c", + .id = 23, + .dev = { + .platform_data = &i2c_ocores_device_data22, + .release = wb_i2c_ocores_device_release, + }, + }, + { + .name = "wb-ocores-i2c", + .id = 24, + .dev = { + .platform_data = &i2c_ocores_device_data23, + .release = wb_i2c_ocores_device_release, + }, + }, + { + .name = "wb-ocores-i2c", + .id = 25, + .dev = { + .platform_data = &i2c_ocores_device_data24, + .release = wb_i2c_ocores_device_release, + }, + }, + { + .name = "wb-ocores-i2c", + .id = 26, + .dev = { + .platform_data = &i2c_ocores_device_data25, + .release = wb_i2c_ocores_device_release, + }, + }, + { + .name = "wb-ocores-i2c", + .id = 27, + .dev = { + .platform_data = &i2c_ocores_device_data26, + .release = wb_i2c_ocores_device_release, + }, + }, + { + .name = "wb-ocores-i2c", + .id = 28, + .dev = { + .platform_data = &i2c_ocores_device_data27, + .release = wb_i2c_ocores_device_release, + }, + }, + { + .name = "wb-ocores-i2c", + .id = 29, + .dev = { + .platform_data = &i2c_ocores_device_data28, + .release = wb_i2c_ocores_device_release, + }, + }, + { + .name = "wb-ocores-i2c", + .id = 30, + .dev = { + .platform_data = &i2c_ocores_device_data29, + .release = wb_i2c_ocores_device_release, + }, + }, +}; + +static int __init wb_i2c_ocores_device_init(void) +{ + int i; + int ret = 0; + i2c_ocores_device_t *i2c_ocores_device_data; + + WB_I2C_OCORE_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = 0; i < ARRAY_SIZE(i2c_ocores_device); i++) { + i2c_ocores_device_data = i2c_ocores_device[i].dev.platform_data; + ret = platform_device_register(&i2c_ocores_device[i]); + if (ret < 0) { + i2c_ocores_device_data->device_flag = -1; /* device register failed, set flag -1 */ + printk(KERN_ERR "wb-ocores-i2c.%d register failed!\n", i + 1); + } else { + i2c_ocores_device_data->device_flag = 0; /* device register suucess, set flag 0 */ + } + } + return 0; +} + +static void __exit wb_i2c_ocores_device_exit(void) +{ + int i; + i2c_ocores_device_t *i2c_ocores_device_data; + + WB_I2C_OCORE_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = ARRAY_SIZE(i2c_ocores_device) - 1; i >= 0; i--) { + i2c_ocores_device_data = i2c_ocores_device[i].dev.platform_data; + if (i2c_ocores_device_data->device_flag == 0) { /* device register success, need unregister */ + platform_device_unregister(&i2c_ocores_device[i]); + } + } +} + +module_init(wb_i2c_ocores_device_init); +module_exit(wb_i2c_ocores_device_exit); +MODULE_DESCRIPTION("I2C OCORES Devices"); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("support"); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/modules/driver/wb_io_dev_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/modules/driver/wb_io_dev_device.c new file mode 100644 index 00000000000..95ea874811e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/modules/driver/wb_io_dev_device.c @@ -0,0 +1,105 @@ +#include +#include +#include +#include +#include + +#include + +static int g_wb_io_dev_device_debug = 0; +static int g_wb_io_dev_device_error = 0; + +module_param(g_wb_io_dev_device_debug, int, S_IRUGO | S_IWUSR); +module_param(g_wb_io_dev_device_error, int, S_IRUGO | S_IWUSR); + +#define WB_IO_DEV_DEVICE_DEBUG_VERBOSE(fmt, args...) do { \ + if (g_wb_io_dev_device_debug) { \ + printk(KERN_INFO "[WB_IO_DEV_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +#define WB_IO_DEV_DEVICE_DEBUG_ERROR(fmt, args...) do { \ + if (g_wb_io_dev_device_error) { \ + printk(KERN_ERR "[WB_IO_DEV_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +/* CPU_CPLD */ +static io_dev_device_t io_dev_device_data0 = { + .io_dev_name = "cpld0", + .io_base = 0xa00, + .io_len = 0x100, + .indirect_addr = 0, +}; + +/* SCM CPLD */ +static io_dev_device_t io_dev_device_data1 = { + .io_dev_name = "cpld1", + .io_base = 0x900, + .io_len = 0x100, + .indirect_addr = 0, +}; + +static void wb_io_dev_device_release(struct device *dev) +{ + return; +} + +static struct platform_device io_dev_device[] = { + { + .name = "wb-io-dev", + .id = 1, + .dev = { + .platform_data = &io_dev_device_data0, + .release = wb_io_dev_device_release, + }, + }, + { + .name = "wb-io-dev", + .id = 2, + .dev = { + .platform_data = &io_dev_device_data1, + .release = wb_io_dev_device_release, + }, + }, +}; + +static int __init wb_io_dev_device_init(void) +{ + int i; + int ret = 0; + io_dev_device_t *io_dev_device_data; + + WB_IO_DEV_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = 0; i < ARRAY_SIZE(io_dev_device); i++) { + io_dev_device_data = io_dev_device[i].dev.platform_data; + ret = platform_device_register(&io_dev_device[i]); + if (ret < 0) { + io_dev_device_data->device_flag = -1; /* device register failed, set flag -1 */ + printk(KERN_ERR "wb-io-dev.%d register failed!\n", i + 1); + } else { + io_dev_device_data->device_flag = 0; /* device register suucess, set flag 0 */ + } + } + return 0; +} + +static void __exit wb_io_dev_device_exit(void) +{ + int i; + io_dev_device_t *io_dev_device_data; + + WB_IO_DEV_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = ARRAY_SIZE(io_dev_device) - 1; i >= 0; i--) { + io_dev_device_data = io_dev_device[i].dev.platform_data; + if (io_dev_device_data->device_flag == 0) { /* device register success, need unregister */ + platform_device_unregister(&io_dev_device[i]); + } + } +} + +module_init(wb_io_dev_device_init); +module_exit(wb_io_dev_device_exit); +MODULE_DESCRIPTION("IO DEV Devices"); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("support"); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/modules/driver/wb_pcie_dev_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/modules/driver/wb_pcie_dev_device.c new file mode 100644 index 00000000000..2cc5ea21ced --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/modules/driver/wb_pcie_dev_device.c @@ -0,0 +1,113 @@ +#include +#include +#include +#include +#include + +#include + +static int g_wb_pcie_dev_device_debug = 0; +static int g_wb_pcie_dev_device_error = 0; + +module_param(g_wb_pcie_dev_device_debug, int, S_IRUGO | S_IWUSR); +module_param(g_wb_pcie_dev_device_error, int, S_IRUGO | S_IWUSR); + +#define WB_PCIE_DEV_DEVICE_DEBUG_VERBOSE(fmt, args...) do { \ + if (g_wb_pcie_dev_device_debug) { \ + printk(KERN_INFO "[WB_PCIE_DEV_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +#define WB_PCIE_DEV_DEVICE_DEBUG_ERROR(fmt, args...) do { \ + if (g_wb_pcie_dev_device_error) { \ + printk(KERN_ERR "[WB_PCIE_DEV_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +static pci_dev_device_t pcie_dev_device_data0 = { + .pci_dev_name = "fpga0", + .pci_domain = 0x0000, + .pci_bus = 0x03, + .pci_slot = 0x00, + .pci_fn = 0, + .pci_bar = 0, + .bus_width = 4, + .check_pci_id = 1, + .pci_id = 0x1ded7022, +}; + +static pci_dev_device_t pcie_dev_device_data1 = { + .pci_dev_name = "fpga1", + .pci_domain = 0x0000, + .pci_bus = 0x04, + .pci_slot = 0x00, + .pci_fn = 0, + .pci_bar = 0, + .bus_width = 4, + .check_pci_id = 1, + .pci_id = 0x1ded7021, +}; + +static void wb_pcie_dev_device_release(struct device *dev) +{ + return; +} + +static struct platform_device pcie_dev_device[] = { + { + .name = "wb-pci-dev", + .id = 1, + .dev = { + .platform_data = &pcie_dev_device_data0, + .release = wb_pcie_dev_device_release, + }, + }, + { + .name = "wb-pci-dev", + .id = 2, + .dev = { + .platform_data = &pcie_dev_device_data1, + .release = wb_pcie_dev_device_release, + }, + }, +}; + +static int __init wb_pcie_dev_device_init(void) +{ + int i; + int ret = 0; + pci_dev_device_t *pcie_dev_device_data; + + WB_PCIE_DEV_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = 0; i < ARRAY_SIZE(pcie_dev_device); i++) { + pcie_dev_device_data = pcie_dev_device[i].dev.platform_data; + ret = platform_device_register(&pcie_dev_device[i]); + if (ret < 0) { + pcie_dev_device_data->device_flag = -1; /* device register failed, set flag -1 */ + printk(KERN_ERR "wb-pci-dev.%d register failed!\n", i + 1); + } else { + pcie_dev_device_data->device_flag = 0; /* device register suucess, set flag 0 */ + } + } + return 0; +} + +static void __exit wb_pcie_dev_device_exit(void) +{ + int i; + pci_dev_device_t *pcie_dev_device_data; + + WB_PCIE_DEV_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = ARRAY_SIZE(pcie_dev_device) - 1; i >= 0; i--) { + pcie_dev_device_data = pcie_dev_device[i].dev.platform_data; + if (pcie_dev_device_data->device_flag == 0) { /* device register success, need unregister */ + platform_device_unregister(&pcie_dev_device[i]); + } + } +} + +module_init(wb_pcie_dev_device_init); +module_exit(wb_pcie_dev_device_exit); +MODULE_DESCRIPTION("PCIE DEV Devices"); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("support"); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/s3ip_sysfs_cfg/cfg_file/CPLD.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/s3ip_sysfs_cfg/cfg_file/CPLD.cfg new file mode 100644 index 00000000000..20cbeb649c3 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/s3ip_sysfs_cfg/cfg_file/CPLD.cfg @@ -0,0 +1,44 @@ +# configuration item: I2C address of CPLD +# format: cpld_i2c_dev.bus_[cpld_slot]_[cpld_id] cpld_i2c_dev.addr_[cpld_slot]_[cpld_id] +# cpld_slot: Main card: 0, linear card: start from 1 +# cpld_id: start from 0 +# bus: I2C bus number of CPLD +# addr: I2C address of CPLD +cpld_i2c_dev.bus_0_2=4 +cpld_i2c_dev.addr_0_2=0x0c +cpld_i2c_dev.bus_0_3=13 +cpld_i2c_dev.addr_0_3=0x1d +cpld_i2c_dev.bus_0_4=20 +cpld_i2c_dev.addr_0_4=0x1e +cpld_i2c_dev.bus_0_5=44 +cpld_i2c_dev.addr_0_5=0x0d +cpld_i2c_dev.bus_0_6=52 +cpld_i2c_dev.addr_0_6=0x0d + +# configuration item: LPC address of CPLD +# format: cpld_lpc_addr_[cpld_slot]_[cpld_id] +# cpld_slot: Main card: 0, linear card: start from 1 +# cpld_id: start from 0 +cpld_lpc_dev_0_0=0xa00 +cpld_lpc_dev_0_1=0x900 + + +# configuration item: CPLD access method, lpc or i2c +# format: mode_cpld_[cpld_slot][cpld_slot]=lpc/i2c +# cpld_slot: Main card: 0, linear card: start from 1 +# cpld_id: start from 0 +mode_cpld_0_0=lpc +mode_cpld_0_1=lpc +mode_cpld_0_2=i2c +mode_cpld_0_3=i2c +mode_cpld_0_4=i2c +mode_cpld_0_5=i2c +mode_cpld_0_6=i2c + + + +# configuration item: the number of CPLD +# format: dev_num_[main_dev]_[minor_dev] +# main_dev: CPLD main_dev is 4 +# minor_dev: CPLD minor_dev not exist +dev_num_4_0=7 diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/s3ip_sysfs_cfg/cfg_file/FAN.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/s3ip_sysfs_cfg/cfg_file/FAN.cfg new file mode 100644 index 00000000000..aedb254ebd8 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/s3ip_sysfs_cfg/cfg_file/FAN.cfg @@ -0,0 +1,494 @@ +# configuration item: the number of fans +# format: dev_num_[main_dev]_[minor_dev] +# main_dev: fan main_dev is 1 +# minor_dev: fan minor_dev not exist(0) +dev_num_1_0=8 + +# configuration item: the number of rotors +# format: dev_num_[main_dev]_[minor_dev] +# main_dev: rotor main_dev is 1 +# minor_dev: rotor minor_dev is 5 +dev_num_1_5=2 + +# configuration item: fan presence status +# format: dev_present_status_[main_dev_id][fan_index] +# main_dev_id: fan main_dev_id is 1 +# fan_index: start from 1 +dev_present_status.mode_1_7=config +dev_present_status.src_1_7=cpld +dev_present_status.frmt_1_7=bit +dev_present_status.pola_1_7=negative +dev_present_status.addr_1_7=0x0005005b +dev_present_status.len_1_7=1 +dev_present_status.bit_offset_1_7=0 + +dev_present_status.mode_1_5=config +dev_present_status.src_1_5=cpld +dev_present_status.frmt_1_5=bit +dev_present_status.pola_1_5=negative +dev_present_status.addr_1_5=0x0005005b +dev_present_status.len_1_5=1 +dev_present_status.bit_offset_1_5=1 + +dev_present_status.mode_1_3=config +dev_present_status.src_1_3=cpld +dev_present_status.frmt_1_3=bit +dev_present_status.pola_1_3=negative +dev_present_status.addr_1_3=0x0005005b +dev_present_status.len_1_3=1 +dev_present_status.bit_offset_1_3=2 + +dev_present_status.mode_1_1=config +dev_present_status.src_1_1=cpld +dev_present_status.frmt_1_1=bit +dev_present_status.pola_1_1=negative +dev_present_status.addr_1_1=0x0005005b +dev_present_status.len_1_1=1 +dev_present_status.bit_offset_1_1=3 + +dev_present_status.mode_1_8=config +dev_present_status.src_1_8=cpld +dev_present_status.frmt_1_8=bit +dev_present_status.pola_1_8=negative +dev_present_status.addr_1_8=0x0006005b +dev_present_status.len_1_8=1 +dev_present_status.bit_offset_1_8=0 + +dev_present_status.mode_1_6=config +dev_present_status.src_1_6=cpld +dev_present_status.frmt_1_6=bit +dev_present_status.pola_1_6=negative +dev_present_status.addr_1_6=0x0006005b +dev_present_status.len_1_6=1 +dev_present_status.bit_offset_1_6=1 + +dev_present_status.mode_1_4=config +dev_present_status.src_1_4=cpld +dev_present_status.frmt_1_4=bit +dev_present_status.pola_1_4=negative +dev_present_status.addr_1_4=0x0006005b +dev_present_status.len_1_4=1 +dev_present_status.bit_offset_1_4=2 + +dev_present_status.mode_1_2=config +dev_present_status.src_1_2=cpld +dev_present_status.frmt_1_2=bit +dev_present_status.pola_1_2=negative +dev_present_status.addr_1_2=0x0006005b +dev_present_status.len_1_2=1 +dev_present_status.bit_offset_1_2=3 + + +# configuration item: fan rotor status +# format: fan_roll_status_[fan_id]_[motor_id] +# fan_id: start from 1 +# motor_id: start from 0 +fan_roll_status.mode_7_1=config +fan_roll_status.int_cons_7_1= +fan_roll_status.src_7_1=cpld +fan_roll_status.frmt_7_1=bit +fan_roll_status.pola_7_1=positive +fan_roll_status.fpath_7_1= +fan_roll_status.addr_7_1=0x0005005c +fan_roll_status.len_7_1=1 +fan_roll_status.bit_offset_7_1=0 + +fan_roll_status.mode_7_2=config +fan_roll_status.int_cons_7_2= +fan_roll_status.src_7_2=cpld +fan_roll_status.frmt_7_2=bit +fan_roll_status.pola_7_2=positive +fan_roll_status.fpath_7_2= +fan_roll_status.addr_7_2=0x0005005d +fan_roll_status.len_7_2=1 +fan_roll_status.bit_offset_7_2=0 + +fan_roll_status.mode_5_1=config +fan_roll_status.int_cons_5_1= +fan_roll_status.src_5_1=cpld +fan_roll_status.frmt_5_1=bit +fan_roll_status.pola_5_1=positive +fan_roll_status.fpath_5_1= +fan_roll_status.addr_5_1=0x0005005c +fan_roll_status.len_5_1=1 +fan_roll_status.bit_offset_5_1=1 + +fan_roll_status.mode_5_2=config +fan_roll_status.int_cons_5_2= +fan_roll_status.src_5_2=cpld +fan_roll_status.frmt_5_2=bit +fan_roll_status.pola_5_2=positive +fan_roll_status.fpath_5_2= +fan_roll_status.addr_5_2=0x0005005d +fan_roll_status.len_5_2=1 +fan_roll_status.bit_offset_5_2=1 + +fan_roll_status.mode_3_1=config +fan_roll_status.int_cons_3_1= +fan_roll_status.src_3_1=cpld +fan_roll_status.frmt_3_1=bit +fan_roll_status.pola_3_1=positive +fan_roll_status.fpath_3_1= +fan_roll_status.addr_3_1=0x0005005c +fan_roll_status.len_3_1=1 +fan_roll_status.bit_offset_3_1=2 + +fan_roll_status.mode_3_2=config +fan_roll_status.int_cons_3_2= +fan_roll_status.src_3_2=cpld +fan_roll_status.frmt_3_2=bit +fan_roll_status.pola_3_2=positive +fan_roll_status.fpath_3_2= +fan_roll_status.addr_3_2=0x0005005d +fan_roll_status.len_3_2=1 +fan_roll_status.bit_offset_3_2=2 + +fan_roll_status.mode_1_1=config +fan_roll_status.int_cons_1_1= +fan_roll_status.src_1_1=cpld +fan_roll_status.frmt_1_1=bit +fan_roll_status.pola_1_1=positive +fan_roll_status.fpath_1_1= +fan_roll_status.addr_1_1=0x0005005c +fan_roll_status.len_1_1=1 +fan_roll_status.bit_offset_1_1=3 + +fan_roll_status.mode_1_2=config +fan_roll_status.int_cons_1_2= +fan_roll_status.src_1_2=cpld +fan_roll_status.frmt_1_2=bit +fan_roll_status.pola_1_2=positive +fan_roll_status.fpath_1_2= +fan_roll_status.addr_1_2=0x0005005d +fan_roll_status.len_1_2=1 +fan_roll_status.bit_offset_1_2=3 + +fan_roll_status.mode_8_1=config +fan_roll_status.int_cons_8_1= +fan_roll_status.src_8_1=cpld +fan_roll_status.frmt_8_1=bit +fan_roll_status.pola_8_1=positive +fan_roll_status.fpath_8_1= +fan_roll_status.addr_8_1=0x0006005c +fan_roll_status.len_8_1=1 +fan_roll_status.bit_offset_8_1=0 + +fan_roll_status.mode_8_2=config +fan_roll_status.int_cons_8_2= +fan_roll_status.src_8_2=cpld +fan_roll_status.frmt_8_2=bit +fan_roll_status.pola_8_2=positive +fan_roll_status.fpath_8_2= +fan_roll_status.addr_8_2=0x0006005d +fan_roll_status.len_8_2=1 +fan_roll_status.bit_offset_8_2=0 + +fan_roll_status.mode_6_1=config +fan_roll_status.int_cons_6_1= +fan_roll_status.src_6_1=cpld +fan_roll_status.frmt_6_1=bit +fan_roll_status.pola_6_1=positive +fan_roll_status.fpath_6_1= +fan_roll_status.addr_6_1=0x0006005c +fan_roll_status.len_6_1=1 +fan_roll_status.bit_offset_6_1=1 + +fan_roll_status.mode_6_2=config +fan_roll_status.int_cons_6_2= +fan_roll_status.src_6_2=cpld +fan_roll_status.frmt_6_2=bit +fan_roll_status.pola_6_2=positive +fan_roll_status.fpath_6_2= +fan_roll_status.addr_6_2=0x0006005d +fan_roll_status.len_6_2=1 +fan_roll_status.bit_offset_6_2=1 + +fan_roll_status.mode_4_1=config +fan_roll_status.int_cons_4_1= +fan_roll_status.src_4_1=cpld +fan_roll_status.frmt_4_1=bit +fan_roll_status.pola_4_1=positive +fan_roll_status.fpath_4_1= +fan_roll_status.addr_4_1=0x0006005c +fan_roll_status.len_4_1=1 +fan_roll_status.bit_offset_4_1=2 + +fan_roll_status.mode_4_2=config +fan_roll_status.int_cons_4_2= +fan_roll_status.src_4_2=cpld +fan_roll_status.frmt_4_2=bit +fan_roll_status.pola_4_2=positive +fan_roll_status.fpath_4_2= +fan_roll_status.addr_4_2=0x0006005d +fan_roll_status.len_4_2=1 +fan_roll_status.bit_offset_4_2=2 + +fan_roll_status.mode_2_1=config +fan_roll_status.int_cons_2_1= +fan_roll_status.src_2_1=cpld +fan_roll_status.frmt_2_1=bit +fan_roll_status.pola_2_1=positive +fan_roll_status.fpath_2_1= +fan_roll_status.addr_2_1=0x0006005c +fan_roll_status.len_2_1=1 +fan_roll_status.bit_offset_2_1=3 + +fan_roll_status.mode_2_2=config +fan_roll_status.int_cons_2_2= +fan_roll_status.src_2_2=cpld +fan_roll_status.frmt_2_2=bit +fan_roll_status.pola_2_2=positive +fan_roll_status.fpath_2_2= +fan_roll_status.addr_2_2=0x0006005d +fan_roll_status.len_2_2=1 +fan_roll_status.bit_offset_2_2=3 + + +# configuration item: fan speed +# format: fan_speed_[fan_id]_[motor_id] +# fan_id: start from 1 +# motor_id: start from 0 +fan_speed.mode_7_1=config +fan_speed.int_cons_7_1= +fan_speed.src_7_1=cpld +fan_speed.frmt_7_1=num_bytes +fan_speed.pola_7_1=negative +fan_speed.fpath_7_1= +fan_speed.addr_7_1=0x00050094 +fan_speed.len_7_1=2 +fan_speed.bit_offset_7_1= + +fan_speed.mode_7_2=config +fan_speed.int_cons_7_2= +fan_speed.src_7_2=cpld +fan_speed.frmt_7_2=num_bytes +fan_speed.pola_7_2=negative +fan_speed.fpath_7_2= +fan_speed.addr_7_2=0x000500a0 +fan_speed.len_7_2=2 +fan_speed.bit_offset_7_2= + +fan_speed.mode_5_1=config +fan_speed.int_cons_5_1= +fan_speed.src_5_1=cpld +fan_speed.frmt_5_1=num_bytes +fan_speed.pola_5_1=negative +fan_speed.fpath_5_1= +fan_speed.addr_5_1=0x00050096 +fan_speed.len_5_1=2 +fan_speed.bit_offset_5_1= + +fan_speed.mode_5_2=config +fan_speed.int_cons_5_2= +fan_speed.src_5_2=cpld +fan_speed.frmt_5_2=num_bytes +fan_speed.pola_5_2=negative +fan_speed.fpath_5_2= +fan_speed.addr_5_2=0x000500a2 +fan_speed.len_5_2=2 +fan_speed.bit_offset_5_2= + +fan_speed.mode_3_1=config +fan_speed.int_cons_3_1= +fan_speed.src_3_1=cpld +fan_speed.frmt_3_1=num_bytes +fan_speed.pola_3_1=negative +fan_speed.fpath_3_1= +fan_speed.addr_3_1=0x00050098 +fan_speed.len_3_1=2 +fan_speed.bit_offset_3_1= + +fan_speed.mode_3_2=config +fan_speed.int_cons_3_2= +fan_speed.src_3_2=cpld +fan_speed.frmt_3_2=num_bytes +fan_speed.pola_3_2=negative +fan_speed.fpath_3_2= +fan_speed.addr_3_2=0x000500a4 +fan_speed.len_3_2=2 +fan_speed.bit_offset_3_2= + +fan_speed.mode_1_1=config +fan_speed.int_cons_1_1= +fan_speed.src_1_1=cpld +fan_speed.frmt_1_1=num_bytes +fan_speed.pola_1_1=negative +fan_speed.fpath_1_1= +fan_speed.addr_1_1=0x0005009a +fan_speed.len_1_1=2 +fan_speed.bit_offset_1_1= + +fan_speed.mode_1_2=config +fan_speed.int_cons_1_2= +fan_speed.src_1_2=cpld +fan_speed.frmt_1_2=num_bytes +fan_speed.pola_1_2=negative +fan_speed.fpath_1_2= +fan_speed.addr_1_2=0x000500a6 +fan_speed.len_1_2=2 +fan_speed.bit_offset_1_2= + +fan_speed.mode_8_1=config +fan_speed.int_cons_8_1= +fan_speed.src_8_1=cpld +fan_speed.frmt_8_1=num_bytes +fan_speed.pola_8_1=negative +fan_speed.fpath_8_1= +fan_speed.addr_8_1=0x00060094 +fan_speed.len_8_1=2 +fan_speed.bit_offset_8_1= + +fan_speed.mode_8_2=config +fan_speed.int_cons_8_2= +fan_speed.src_8_2=cpld +fan_speed.frmt_8_2=num_bytes +fan_speed.pola_8_2=negative +fan_speed.fpath_8_2= +fan_speed.addr_8_2=0x000600a0 +fan_speed.len_8_2=2 +fan_speed.bit_offset_8_2= + +fan_speed.mode_6_1=config +fan_speed.int_cons_6_1= +fan_speed.src_6_1=cpld +fan_speed.frmt_6_1=num_bytes +fan_speed.pola_6_1=negative +fan_speed.fpath_6_1= +fan_speed.addr_6_1=0x00060096 +fan_speed.len_6_1=2 +fan_speed.bit_offset_6_1= + +fan_speed.mode_6_2=config +fan_speed.int_cons_6_2= +fan_speed.src_6_2=cpld +fan_speed.frmt_6_2=num_bytes +fan_speed.pola_6_2=negative +fan_speed.fpath_6_2= +fan_speed.addr_6_2=0x000600a2 +fan_speed.len_6_2=2 +fan_speed.bit_offset_6_2= + +fan_speed.mode_4_1=config +fan_speed.int_cons_4_1= +fan_speed.src_4_1=cpld +fan_speed.frmt_4_1=num_bytes +fan_speed.pola_4_1=negative +fan_speed.fpath_4_1= +fan_speed.addr_4_1=0x00060098 +fan_speed.len_4_1=2 +fan_speed.bit_offset_4_1= + +fan_speed.mode_4_2=config +fan_speed.int_cons_4_2= +fan_speed.src_4_2=cpld +fan_speed.frmt_4_2=num_bytes +fan_speed.pola_4_2=negative +fan_speed.fpath_4_2= +fan_speed.addr_4_2=0x000600a4 +fan_speed.len_4_2=2 +fan_speed.bit_offset_4_2= + +fan_speed.mode_2_1=config +fan_speed.int_cons_2_1= +fan_speed.src_2_1=cpld +fan_speed.frmt_2_1=num_bytes +fan_speed.pola_2_1=negative +fan_speed.fpath_2_1= +fan_speed.addr_2_1=0x0006009a +fan_speed.len_2_1=2 +fan_speed.bit_offset_2_1= + +fan_speed.mode_2_2=config +fan_speed.int_cons_2_2= +fan_speed.src_2_2=cpld +fan_speed.frmt_2_2=num_bytes +fan_speed.pola_2_2=negative +fan_speed.fpath_2_2= +fan_speed.addr_2_2=0x000600a6 +fan_speed.len_2_2=2 +fan_speed.bit_offset_2_2= + + +# configuration item: fan pwm +# format: fan_ratio_[fan_id]_[motor_id] +# fan_id: start from 1 +# motor_id: start from 0 +fan_ratio.mode_7=config +fan_ratio.int_cons_7= +fan_ratio.src_7=cpld +fan_ratio.frmt_7=byte +fan_ratio.pola_7= +fan_ratio.fpath_7= +fan_ratio.addr_7=0x00050090 +fan_ratio.len_7=1 +fan_ratio.bit_offset_7= + +fan_ratio.mode_5=config +fan_ratio.int_cons_5= +fan_ratio.src_5=cpld +fan_ratio.frmt_5=byte +fan_ratio.pola_5= +fan_ratio.fpath_5= +fan_ratio.addr_5=0x00050091 +fan_ratio.len_5=1 +fan_ratio.bit_offset_5= + +fan_ratio.mode_3=config +fan_ratio.int_cons_3= +fan_ratio.src_3=cpld +fan_ratio.frmt_3=byte +fan_ratio.pola_3= +fan_ratio.fpath_3= +fan_ratio.addr_3=0x00050092 +fan_ratio.len_3=1 +fan_ratio.bit_offset_3= + +fan_ratio.mode_1=config +fan_ratio.int_cons_1= +fan_ratio.src_1=cpld +fan_ratio.frmt_1=byte +fan_ratio.pola_1= +fan_ratio.fpath_1= +fan_ratio.addr_1=0x00050093 +fan_ratio.len_1=1 +fan_ratio.bit_offset_1= + +fan_ratio.mode_8=config +fan_ratio.int_cons_8= +fan_ratio.src_8=cpld +fan_ratio.frmt_8=byte +fan_ratio.pola_8= +fan_ratio.fpath_8= +fan_ratio.addr_8=0x00060090 +fan_ratio.len_8=1 +fan_ratio.bit_offset_8= + +fan_ratio.mode_6=config +fan_ratio.int_cons_6= +fan_ratio.src_6=cpld +fan_ratio.frmt_6=byte +fan_ratio.pola_6= +fan_ratio.fpath_6= +fan_ratio.addr_6=0x00060091 +fan_ratio.len_6=1 +fan_ratio.bit_offset_6= + +fan_ratio.mode_4=config +fan_ratio.int_cons_4= +fan_ratio.src_4=cpld +fan_ratio.frmt_4=byte +fan_ratio.pola_4= +fan_ratio.fpath_4= +fan_ratio.addr_4=0x00060092 +fan_ratio.len_4=1 +fan_ratio.bit_offset_4= + +fan_ratio.mode_2=config +fan_ratio.int_cons_2= +fan_ratio.src_2=cpld +fan_ratio.frmt_2=byte +fan_ratio.pola_2= +fan_ratio.fpath_2= +fan_ratio.addr_2=0x00060093 +fan_ratio.len_2=1 +fan_ratio.bit_offset_2= diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/s3ip_sysfs_cfg/cfg_file/PSU.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/s3ip_sysfs_cfg/cfg_file/PSU.cfg new file mode 100644 index 00000000000..9ff2cd1b27c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/s3ip_sysfs_cfg/cfg_file/PSU.cfg @@ -0,0 +1,130 @@ +# configuration item: the number of psus +# format: dev_num_[main_dev]_[minor_dev] +# main_dev: psu main_dev is 2 +# minor_dev: psu minor_dev not exist(0) +dev_num_2_0=2 + +# Configuration items: PSU PMBUS i2c device +# Description: Format other_i2c_dev_[main_dev]_[psu_index] +# Note: main_dev, PSU is 2, psu_index starts from 5 for PMBUS path mapping +other_i2c_dev.bus_2_5=11 +other_i2c_dev.addr_2_5=0x58 +other_i2c_dev.bus_2_6=10 +other_i2c_dev.addr_2_6=0x58 + +# Configuration items: PMBUS register address of PSU status word +# Description: Format psu_pmbus_reg_[psu_index]_[reg_id] +# Note: reg_id 9: output status(0x79), 10: input status(0x79) +psu_pmbus_reg.mode_1_9=config +psu_pmbus_reg.src_1_9=other_i2c +psu_pmbus_reg.frmt_1_9=byte +psu_pmbus_reg.pola_1_9=negative +psu_pmbus_reg.addr_1_9=0x02050079 +psu_pmbus_reg.len_1_9=2 +psu_pmbus_reg.bit_offset_1_9= + +psu_pmbus_reg.mode_2_9=config +psu_pmbus_reg.src_2_9=other_i2c +psu_pmbus_reg.frmt_2_9=byte +psu_pmbus_reg.pola_2_9=negative +psu_pmbus_reg.addr_2_9=0x02060079 +psu_pmbus_reg.len_2_9=2 +psu_pmbus_reg.bit_offset_2_9= + +psu_pmbus_reg.mode_1_10=config +psu_pmbus_reg.src_1_10=other_i2c +psu_pmbus_reg.frmt_1_10=byte +psu_pmbus_reg.pola_1_10=negative +psu_pmbus_reg.addr_1_10=0x02050079 +psu_pmbus_reg.len_1_10=2 +psu_pmbus_reg.bit_offset_1_10= + +psu_pmbus_reg.mode_2_10=config +psu_pmbus_reg.src_2_10=other_i2c +psu_pmbus_reg.frmt_2_10=byte +psu_pmbus_reg.pola_2_10=negative +psu_pmbus_reg.addr_2_10=0x02060079 +psu_pmbus_reg.len_2_10=2 +psu_pmbus_reg.bit_offset_2_10= + + +# configuration item: psu status +# format: psu_status_[psu_index]_[status_id] +# psu_index: start from 1 +# status_id: 0: presence 1: output 2: alert +# psu2 presence status +psu_status.mode_2_0=config +psu_status.src_2_0=cpld +psu_status.frmt_2_0=bit +psu_status.pola_2_0=negative +psu_status.addr_2_0=0x00030042 +psu_status.len_2_0=1 +psu_status.bit_offset_2_0=0 + +# psu2 output status +psu_status.mode_2_1=config +psu_status.src_2_1=cpld +psu_status.frmt_2_1=bit +psu_status.pola_2_1=positive +psu_status.addr_2_1=0x00030066 +psu_status.len_2_1=1 +psu_status.bit_offset_2_1=0 + +# psu2 alert status +psu_status.mode_2_2=config +psu_status.src_2_2=cpld +psu_status.frmt_2_2=bit +psu_status.pola_2_2=negative +psu_status.addr_2_2=0x00030029 +psu_status.len_2_2=1 +psu_status.bit_offset_2_2=0 + +# psu1 presence status +psu_status.mode_1_0=config +psu_status.src_1_0=cpld +psu_status.frmt_1_0=bit +psu_status.pola_1_0=negative +psu_status.addr_1_0=0x00030042 +psu_status.len_1_0=1 +psu_status.bit_offset_1_0=1 + +# psu1 output status +psu_status.mode_1_1=config +psu_status.src_1_1=cpld +psu_status.frmt_1_1=bit +psu_status.pola_1_1=positive +psu_status.addr_1_1=0x00030066 +psu_status.len_1_1=1 +psu_status.bit_offset_1_1=1 + +# psu1 alert status +psu_status.mode_1_2=config +psu_status.src_1_2=cpld +psu_status.frmt_1_2=bit +psu_status.pola_1_2=negative +psu_status.addr_1_2=0x00030029 +psu_status.len_1_2=1 +psu_status.bit_offset_1_2=1 + +# Configuration items: Address of psu pmbus sysfs +# Description: Format hwmon_psu_[psu_index]_[config_id] +# Note: psu_index:Power supply number,start with 1 config_id 27:pmbus status reg +hwmon_psu.mode_1_27=config +hwmon_psu.int_cons_1_27=0 +hwmon_psu.src_1_27=file +hwmon_psu.frmt_1_27=buf +hwmon_psu.fpath_1_27=/sys/bus/i2c/devices/11-0058/hwmon/ +hwmon_psu.addr_1_27=0 +hwmon_psu.len_1_27=16 +hwmon_psu.bit_offset_1_27= +hwmon_psu.str_cons_1_27=status0 + +hwmon_psu.mode_2_27=config +hwmon_psu.int_cons_2_27= +hwmon_psu.src_2_27=file +hwmon_psu.frmt_2_27=buf +hwmon_psu.fpath_2_27=/sys/bus/i2c/devices/10-0058/hwmon/ +hwmon_psu.addr_2_27=0 +hwmon_psu.len_2_27=16 +hwmon_psu.bit_offset_2_27= +hwmon_psu.str_cons_2_27=status0 diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/s3ip_sysfs_cfg/cfg_file/SENSOR.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/s3ip_sysfs_cfg/cfg_file/SENSOR.cfg new file mode 100644 index 00000000000..f2cc335f100 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/s3ip_sysfs_cfg/cfg_file/SENSOR.cfg @@ -0,0 +1,78 @@ +# Number of temperature sensors on the mainboard +dev_num_0_1=2 + +# Number of voltage sensors on the mainboard +dev_num_0_2=1 + +#sensor in1 +hwmon_in.mode_0x0001_0x00=config +hwmon_in.int_cons_0x0001_0x00=0 +hwmon_in.src_0x0001_0x00=cpld +hwmon_in.frmt_0x0001_0x00=num_bytes +hwmon_in.addr_0x0001_0x00=0x000100ea +hwmon_in.len_0x0001_0x00=2 +hwmon_in.int_extra1_0x0001_0x00=0x000100ea +hwmon_in.int_extra2_0x0001_0x00=1000 +hwmon_in.int_extra3_0x0001_0x00=1 + +hwmon_in.mode_0x0001_0x01=str_constant +hwmon_in.str_cons_0x0001_0x01=RTC_V3.3_V + +hwmon_in.mode_0x0001_0x02=str_constant +hwmon_in.str_cons_0x0001_0x02=cpld + +hwmon_in.mode_0x0001_0x03=str_constant +hwmon_in.str_cons_0x0001_0x03=3300 + +hwmon_in.mode_0x0001_0x05=str_constant +hwmon_in.str_cons_0x0001_0x05=2000 + +# mac_temp_min +hwmon_temp.mode_0x0001_0x00=config +hwmon_temp.src_0x0001_0x00=cpld +hwmon_temp.addr_0x0001_0x00=0x0004002a +hwmon_temp.frmt_0x0001_0x00=num_bytes +hwmon_temp.len_0x0001_0x00=2 +hwmon_temp.pola_0x0001_0x00=positive +hwmon_temp.str_cons_0x0001_0x00=temp1_input +hwmon_temp.int_extra1_0x0001_0x00=4 + +hwmon_temp.mode_0x0001_0x01=str_constant +hwmon_temp.str_cons_0x0001_0x01=MAC_TEPM_MIN + +hwmon_temp.mode_0x0001_0x02=str_constant +hwmon_temp.str_cons_0x0001_0x02=CPLD + +hwmon_temp.mode_0x0001_0x03=str_constant +hwmon_temp.str_cons_0x0001_0x03=105000 + +hwmon_temp.mode_0x0001_0x04=str_constant +hwmon_temp.str_cons_0x0001_0x04=99000 + +hwmon_temp.mode_0x0001_0x05=str_constant +hwmon_temp.str_cons_0x0001_0x05=-30000 + +# mac_temp_max +hwmon_temp.mode_0x0002_0x00=config +hwmon_temp.src_0x0002_0x00=cpld +hwmon_temp.addr_0x0002_0x00=0x0004002c +hwmon_temp.frmt_0x0002_0x00=num_bytes +hwmon_temp.len_0x0002_0x00=2 +hwmon_temp.pola_0x0002_0x00=positive +hwmon_temp.str_cons_0x0002_0x00=temp1_input +hwmon_temp.int_extra1_0x0002_0x00=4 + +hwmon_temp.mode_0x0002_0x01=str_constant +hwmon_temp.str_cons_0x0002_0x01=MAC_TEPM_MAX + +hwmon_temp.mode_0x0002_0x02=str_constant +hwmon_temp.str_cons_0x0002_0x02=CPLD + +hwmon_temp.mode_0x0002_0x03=str_constant +hwmon_temp.str_cons_0x0002_0x03=105000 + +hwmon_temp.mode_0x0002_0x04=str_constant +hwmon_temp.str_cons_0x0002_0x04=99000 + +hwmon_temp.mode_0x0002_0x05=str_constant +hwmon_temp.str_cons_0x0002_0x05=-30000 \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/s3ip_sysfs_cfg/file_name/0x40bd b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/s3ip_sysfs_cfg/file_name/0x40bd new file mode 100644 index 00000000000..0ce456333ed --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/s3ip_sysfs_cfg/file_name/0x40bd @@ -0,0 +1,4 @@ +CPLD +FAN +PSU +SENSOR diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/s3ip_sysfs_cfg/file_name/0x40d9 b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/s3ip_sysfs_cfg/file_name/0x40d9 new file mode 100644 index 00000000000..0ce456333ed --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/s3ip_sysfs_cfg/file_name/0x40d9 @@ -0,0 +1,4 @@ +CPLD +FAN +PSU +SENSOR diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/setup.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/setup.py new file mode 100755 index 00000000000..6c3916921ab --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-128x1-fr4/setup.py @@ -0,0 +1,39 @@ +from setuptools import setup + +setup( + name='sonic-platform', + version='1.0', + description='SONiC platform API implementation', + license='Apache 2.0', + author='SONiC Team', + author_email='support', + url='', + maintainer='support', + maintainer_email='', + packages=[ + 'sonic_platform', + 'plat_hal', + 'wbutil', + 'eepromutil', + 'hal-config', + 'config', + ], + py_modules=[ + 'hal_pltfm', + 'platform_util', + 'platform_intf', + ], + classifiers=[ + 'Development Status :: 3 - Alpha', + 'Environment :: Plugins', + 'Intended Audience :: Developers', + 'Intended Audience :: Information Technology', + 'Intended Audience :: System Administrators', + 'License :: OSI Approved :: Apache Software License', + 'Natural Language :: English', + 'Operating System :: POSIX :: Linux', + 'Programming Language :: Python :: 3.7', + 'Topic :: Utilities', + ], + keywords='sonic SONiC platform PLATFORM', +) diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/config/x86_64_micas_m2_w6940_64oc_r0_config.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/config/x86_64_micas_m2_w6940_64oc_r0_config.py index 638ad724e50..de33d9605b7 100644 --- a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/config/x86_64_micas_m2_w6940_64oc_r0_config.py +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/config/x86_64_micas_m2_w6940_64oc_r0_config.py @@ -11,6 +11,7 @@ "pmon_syslog": 1, "sff_temp_polling": 1, "reboot_cause": 1, + "generate_airflow": 1, } DEV_MONITOR_PARAM = { @@ -1641,3 +1642,69 @@ {"name": "syseeprom", "e2_type": "onie_tlv", "e2_path": "/sys/bus/i2c/devices/1-0056/eeprom"}, ], } + +AIR_FLOW_CONF = { + "psu_fan_airflow": { + "intake": ['PA3000I-F', 'CRPS3000CL', 'ECDL3000123'], + "exhaust": ['PA3000I-R', 'CRPS3000CLR'] + }, + + "fanairflow": { + "intake": ['FAN80-02-F'], + "exhaust": ['FAN80-02-R'] + }, + + "fans": [ + { + "name": "FAN1", + "e2_type": "fru", + "e2_path": "/sys/bus/i2c/devices/52-0050/eeprom", + "area": "productInfoArea", + "field": "productName", + "decode": "fanairflow" + }, + { + "name": "FAN2", + "e2_type": "fru", + "e2_path": "/sys/bus/i2c/devices/53-0050/eeprom", + "area": "productInfoArea", + "field": "productName", + "decode": "fanairflow" + }, + { + "name": "FAN3", + "e2_type": "fru", + "e2_path": "/sys/bus/i2c/devices/54-0050/eeprom", + "area": "productInfoArea", + "field": "productName", + "decode": "fanairflow" + }, + { + "name": "FAN4", + "e2_type": "fru", + "e2_path": "/sys/bus/i2c/devices/55-0050/eeprom", + "area": "productInfoArea", + "field": "productName", + "decode": "fanairflow" + } + ], + + "psus": [ + { + "name": "PSU1", + "e2_type": "fru", + "e2_path": "/sys/bus/i2c/devices/42-0050/eeprom", + "area": "productInfoArea", + "field": "productPartModelName", + "decode": "psu_fan_airflow" + }, + { + "name": "PSU2", + "e2_type": "fru", + "e2_path": "/sys/bus/i2c/devices/43-0050/eeprom", + "area": "productInfoArea", + "field": "productPartModelName", + "decode": "psu_fan_airflow" + } + ] +} diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/hal-config/x86_64_micas_m2_w6940_64oc_r0_device.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/hal-config/x86_64_micas_m2_w6940_64oc_r0_device.py index b79db186fd5..e2eaafefeb2 100644 --- a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/hal-config/x86_64_micas_m2_w6940_64oc_r0_device.py +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/hal-config/x86_64_micas_m2_w6940_64oc_r0_device.py @@ -2,16 +2,17 @@ psu_fan_airflow = { "intake": ['CRPS3000CL', 'ECDL3000123'], - "exhaust": [] + "exhaust": ['CRPS3000CLR'], } fanairflow = { "intake": ['FAN80-02-F'], - "exhaust": [], + "exhaust": ['FAN80-02-R'], } psu_display_name = { "PA3000I-F": ['CRPS3000CL', 'ECDL3000123'], + "PA3000I-R": ['CRPS3000CLR'] } psutypedecode = { @@ -119,6 +120,7 @@ class threshold: "Max": { "ECDL3000123": threshold.PSU_FAN_SPEED_MAX, "CRPS3000CL": threshold.PSU_A_FAN_SPEED_MAX, + "CRPS3000CLR": threshold.PSU_A_FAN_SPEED_MAX, }, "Unit": Unit.Speed }, @@ -208,6 +210,7 @@ class threshold: "Max": { "ECDL3000123": threshold.PSU_FAN_SPEED_MAX, "CRPS3000CL": threshold.PSU_A_FAN_SPEED_MAX, + "CRPS3000CLR": threshold.PSU_A_FAN_SPEED_MAX, }, "Unit": Unit.Speed }, @@ -445,7 +448,7 @@ class threshold: "present": {"loc": "/sys/s3ip/fan/fan1/present", "way": "sysfs", "mask": 0x01, "okval": 1}, "SpeedMin": threshold.FAN_SPEED_MIN, "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, - "led": {"loc": "/dev/cpld10", "offset":0xd0, "len": 1, "way":"devfile"}, + "led": {"bus": 50, "addr": 0x0d, "offset":0xd0, "len": 1, "way":"i2c"}, "led_attrs": { "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04, "flash": 0xff, "light": 0xff, "off": 0xff, "mask": 0x07 @@ -454,7 +457,7 @@ class threshold: "Rotor": { "Rotor1_config": { "name": "Rotor1", - "Set_speed": {"loc": "/dev/cpld10", "offset":0x90, "len": 1, "way":"devfile"}, + "Set_speed": {"bus": 50, "addr": 0x0d, "offset":0x90, "len": 1, "way":"i2c"}, "Running": {"loc": "/sys/s3ip/fan/fan1/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, "HwAlarm": {"loc": "/sys/s3ip/fan/fan1/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, "SpeedMin": threshold.FAN_SPEED_MIN, @@ -468,7 +471,7 @@ class threshold: }, "Rotor2_config": { "name": "Rotor2", - "Set_speed": {"loc": "/dev/cpld10", "offset":0x90, "len": 1, "way":"devfile"}, + "Set_speed": {"bus": 50, "addr": 0x0d, "offset":0x90, "len": 1, "way":"i2c"}, "Running": {"loc": "/sys/s3ip/fan/fan1/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, "HwAlarm": {"loc": "/sys/s3ip/fan/fan1/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, "SpeedMin": threshold.FAN_SPEED_MIN, @@ -489,7 +492,7 @@ class threshold: "present": {"loc": "/sys/s3ip/fan/fan2/present", "way": "sysfs", "mask": 0x01, "okval": 1}, "SpeedMin": threshold.FAN_SPEED_MIN, "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, - "led": {"loc": "/dev/cpld10", "offset":0xd1, "len": 1, "way":"devfile"}, + "led": {"bus": 50, "addr": 0x0d, "offset":0xd1, "len": 1, "way":"i2c"}, "led_attrs": { "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04, "flash": 0xff, "light": 0xff, "off": 0xff, "mask": 0x07 @@ -498,7 +501,7 @@ class threshold: "Rotor": { "Rotor1_config": { "name": "Rotor1", - "Set_speed": {"loc": "/dev/cpld10", "offset":0x91, "len": 1, "way":"devfile"}, + "Set_speed": {"bus": 50, "addr": 0x0d, "offset":0x91, "len": 1, "way":"i2c"}, "Running": {"loc": "/sys/s3ip/fan/fan2/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, "HwAlarm": {"loc": "/sys/s3ip/fan/fan2/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, "SpeedMin": threshold.FAN_SPEED_MIN, @@ -512,7 +515,7 @@ class threshold: }, "Rotor2_config": { "name": "Rotor2", - "Set_speed": {"loc": "/dev/cpld10", "offset":0x91, "len": 1, "way":"devfile"}, + "Set_speed": {"bus": 50, "addr": 0x0d, "offset":0x91, "len": 1, "way":"i2c"}, "Running": {"loc": "/sys/s3ip/fan/fan2/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, "HwAlarm": {"loc": "/sys/s3ip/fan/fan2/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, "SpeedMin": threshold.FAN_SPEED_MIN, @@ -533,7 +536,7 @@ class threshold: "present": {"loc": "/sys/s3ip/fan/fan3/present", "way": "sysfs", "mask": 0x01, "okval": 1}, "SpeedMin": threshold.FAN_SPEED_MIN, "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, - "led": {"loc": "/dev/cpld10", "offset":0xd2, "len": 1, "way":"devfile"}, + "led": {"bus": 50, "addr": 0x0d, "offset":0xd2, "len": 1, "way":"i2c"}, "led_attrs": { "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04, "flash": 0xff, "light": 0xff, "off": 0xff, "mask": 0x07 @@ -542,7 +545,7 @@ class threshold: "Rotor": { "Rotor1_config": { "name": "Rotor1", - "Set_speed": {"loc": "/dev/cpld10", "offset":0x92, "len": 1, "way":"devfile"}, + "Set_speed": {"bus": 50, "addr": 0x0d, "offset":0x92, "len": 1, "way":"i2c"}, "Running": {"loc": "/sys/s3ip/fan/fan3/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, "HwAlarm": {"loc": "/sys/s3ip/fan/fan3/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, "SpeedMin": threshold.FAN_SPEED_MIN, @@ -556,7 +559,7 @@ class threshold: }, "Rotor2_config": { "name": "Rotor2", - "Set_speed": {"loc": "/dev/cpld10", "offset":0x92, "len": 1, "way":"devfile"}, + "Set_speed": {"bus": 50, "addr": 0x0d, "offset":0x92, "len": 1, "way":"i2c"}, "Running": {"loc": "/sys/s3ip/fan/fan3/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, "HwAlarm": {"loc": "/sys/s3ip/fan/fan3/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, "SpeedMin": threshold.FAN_SPEED_MIN, @@ -577,7 +580,7 @@ class threshold: "present": {"loc": "/sys/s3ip/fan/fan4/present", "way": "sysfs", "mask": 0x01, "okval": 1}, "SpeedMin": threshold.FAN_SPEED_MIN, "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, - "led": {"loc": "/dev/cpld10", "offset":0xd3, "len": 1, "way":"devfile"}, + "led": {"bus": 50, "addr": 0x0d, "offset":0xd3, "len": 1, "way":"i2c"}, "led_attrs": { "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04, "flash": 0xff, "light": 0xff, "off": 0xff, "mask": 0x07 @@ -586,7 +589,7 @@ class threshold: "Rotor": { "Rotor1_config": { "name": "Rotor1", - "Set_speed": {"loc": "/dev/cpld10", "offset":0x93, "len": 1, "way":"devfile"}, + "Set_speed": {"bus": 50, "addr": 0x0d, "offset":0x93, "len": 1, "way":"i2c"}, "Running": {"loc": "/sys/s3ip/fan/fan4/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, "HwAlarm": {"loc": "/sys/s3ip/fan/fan4/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, "SpeedMin": threshold.FAN_SPEED_MIN, @@ -600,7 +603,7 @@ class threshold: }, "Rotor2_config": { "name": "Rotor2", - "Set_speed": {"loc": "/dev/cpld10", "offset":0x93, "len": 1, "way":"devfile"}, + "Set_speed": {"bus": 50, "addr": 0x0d, "offset":0x93, "len": 1, "way":"i2c"}, "Running": {"loc": "/sys/s3ip/fan/fan4/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, "HwAlarm": {"loc": "/sys/s3ip/fan/fan4/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, "SpeedMin": threshold.FAN_SPEED_MIN, diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/hal-config/x86_64_micas_m2_w6940_64oc_r0_exhaust_device.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/hal-config/x86_64_micas_m2_w6940_64oc_r0_exhaust_device.py new file mode 100644 index 00000000000..ed0a87f4d0c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/hal-config/x86_64_micas_m2_w6940_64oc_r0_exhaust_device.py @@ -0,0 +1,763 @@ +#!/usr/bin/python3 + +psu_fan_airflow = { + "intake": ['CRPS3000CL', 'ECDL3000123'], + "exhaust": ['CRPS3000CLR'], +} + +fanairflow = { + "intake": ['FAN80-02-F'], + "exhaust": ['FAN80-02-R'], +} + +psu_display_name = { + "PA3000I-F": ['CRPS3000CL', 'ECDL3000123'], + "PA3000I-R": ['CRPS3000CLR'] +} + +psutypedecode = { + 0x00: 'N/A', + 0x01: 'AC', + 0x02: 'DC', +} + +class Unit: + Temperature = "C" + Voltage = "V" + Current = "A" + Power = "W" + Speed = "RPM" + + +class threshold: + PSU_TEMP_MIN = -20 * 1000 + PSU_TEMP_MAX = 65 * 1000 + + PSU_FAN_SPEED_MIN = 3500 + PSU_FAN_SPEED_MAX = 23500 + PSU_A_FAN_SPEED_MAX = 39000 + + PSU_OUTPUT_VOLTAGE_MIN = 11 * 1000 + PSU_OUTPUT_VOLTAGE_MAX = 13 * 1000 + + PSU_AC_INPUT_VOLTAGE_MIN = 90 * 1000 + PSU_AC_INPUT_VOLTAGE_MAX = 264 * 1000 + + PSU_DC_INPUT_VOLTAGE_MIN = 180 * 1000 + PSU_DC_INPUT_VOLTAGE_MAX = 320 * 1000 + + ERR_VALUE = -9999999 + + PSU_OUTPUT_POWER_MIN = 0* 1000 * 1000 + PSU_OUTPUT_POWER_MAX = 3000 * 1000 * 1000 + + PSU_INPUT_POWER_MIN = 0 * 1000 * 1000 + PSU_INPUT_POWER_MAX = 3100* 1000 * 1000 + + PSU_OUTPUT_CURRENT_MIN = 0 * 1000 + PSU_OUTPUT_CURRENT_MAX = 246 * 1000 + + PSU_INPUT_CURRENT_MIN = 0 * 1000 + PSU_INPUT_CURRENT_MAX = 20 * 1000 + + FRONT_FAN_SPEED_MAX = 18000 + REAR_FAN_SPEED_MAX = 16000 + FAN_SPEED_MIN = 3200 + + +devices = { + "sensor_print_src": "s3ip", + + "dcdc_data_source": [ + { + "path": "/sys/s3ip/vol_sensor", + "type": "vol", + "Unit": Unit.Voltage, + "read_times": 3, + }, + { + "path": "/sys/s3ip/curr_sensor", + "type": "curr", + "Unit": Unit.Current, + "read_times": 3, + }, + ], + "temp_data_source": [ + { + "path": "/sys/s3ip/temp_sensor", + "type": "temp", + "Unit": Unit.Temperature, + }, + ], + + "onie_e2": [ + { + "name": "ONIE_E2", + "e2loc": {"loc": "/sys/bus/i2c/devices/1-0056/eeprom", "way": "sysfs"}, + "airflow": "exhaust" + }, + ], + "psus": [ + { + "e2loc": {"loc": "/sys/bus/i2c/devices/42-0050/eeprom", "way": "sysfs"}, + "pmbusloc": {"bus": 42, "addr": 0x58, "way": "i2c"}, + "present": {"loc": "/sys/s3ip/psu/psu1/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "name": "PSU1", + "psu_display_name": psu_display_name, + "airflow": psu_fan_airflow, + "TempStatus": {"bus": 42, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0004}, + "Temperature": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-42/42-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": threshold.PSU_TEMP_MIN, + "Max": threshold.PSU_TEMP_MAX, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + }, + "FanStatus": {"bus": 42, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0400}, + "FanSpeed": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-42/42-0058/hwmon/hwmon*/fan1_input", "way": "sysfs"}, + "Min": threshold.PSU_FAN_SPEED_MIN, + "Max": { + "ECDL3000123": threshold.PSU_FAN_SPEED_MAX, + "CRPS3000CL": threshold.PSU_A_FAN_SPEED_MAX, + "CRPS3000CLR": threshold.PSU_A_FAN_SPEED_MAX, + }, + "Unit": Unit.Speed + }, + "psu_fan_tolerance": 40, + "InputsStatus": {"bus": 42, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x2000}, + "InputsType": {"bus": 42, "addr": 0x58, "offset": 0x80, "way": "i2c", 'psutypedecode': psutypedecode}, + "InputsVoltage": { + 'AC': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-42/42-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": threshold.PSU_AC_INPUT_VOLTAGE_MIN, + "Max": threshold.PSU_AC_INPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + + }, + 'DC': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-42/42-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": threshold.PSU_DC_INPUT_VOLTAGE_MIN, + "Max": threshold.PSU_DC_INPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + }, + 'other': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-42/42-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": threshold.ERR_VALUE, + "Max": threshold.ERR_VALUE, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + } + }, + "InputsCurrent": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-42/42-0058/hwmon/hwmon*/curr1_input", "way": "sysfs"}, + "Min": threshold.PSU_INPUT_CURRENT_MIN, + "Max": threshold.PSU_INPUT_CURRENT_MAX, + "Unit": Unit.Current, + "format": "float(float(%s)/1000)" + }, + "InputsPower": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-42/42-0058/hwmon/hwmon*/power1_input", "way": "sysfs"}, + "Min": threshold.PSU_INPUT_POWER_MIN, + "Max": threshold.PSU_INPUT_POWER_MAX, + "Unit": Unit.Power, + "format": "float(float(%s)/1000000)" + }, + "OutputsStatus": {"bus": 42, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x8800}, + "OutputsVoltage": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-42/42-0058/hwmon/hwmon*/in2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_VOLTAGE_MIN, + "Max": threshold.PSU_OUTPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + }, + "OutputsCurrent": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-42/42-0058/hwmon/hwmon*/curr2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_CURRENT_MIN, + "Max": threshold.PSU_OUTPUT_CURRENT_MAX, + "Unit": Unit.Current, + "format": "float(float(%s)/1000)" + }, + "OutputsPower": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-42/42-0058/hwmon/hwmon*/power2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_POWER_MIN, + "Max": threshold.PSU_OUTPUT_POWER_MAX, + "Unit": Unit.Power, + "format": "float(float(%s)/1000000)" + }, + }, + { + "e2loc": {"loc": "/sys/bus/i2c/devices/43-0050/eeprom", "way": "sysfs"}, + "pmbusloc": {"bus": 43, "addr": 0x58, "way": "i2c"}, + "present": {"loc": "/sys/s3ip/psu/psu2/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "name": "PSU2", + "psu_display_name": psu_display_name, + "airflow": psu_fan_airflow, + "TempStatus": {"bus": 43, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0004}, + "Temperature": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-43/43-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": threshold.PSU_TEMP_MIN, + "Max": threshold.PSU_TEMP_MAX, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + }, + "FanStatus": {"bus": 43, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0400}, + "FanSpeed": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-43/43-0058/hwmon/hwmon*/fan1_input", "way": "sysfs"}, + "Min": threshold.PSU_FAN_SPEED_MIN, + "Max": { + "ECDL3000123": threshold.PSU_FAN_SPEED_MAX, + "CRPS3000CL": threshold.PSU_A_FAN_SPEED_MAX, + "CRPS3000CLR": threshold.PSU_A_FAN_SPEED_MAX, + }, + "Unit": Unit.Speed + }, + "psu_fan_tolerance": 40, + "InputsStatus": {"bus": 43, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x2000}, + "InputsType": {"bus": 43, "addr": 0x58, "offset": 0x80, "way": "i2c", 'psutypedecode': psutypedecode}, + "InputsVoltage": { + 'AC': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-43/43-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": threshold.PSU_AC_INPUT_VOLTAGE_MIN, + "Max": threshold.PSU_AC_INPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + + }, + 'DC': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-43/43-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": threshold.PSU_DC_INPUT_VOLTAGE_MIN, + "Max": threshold.PSU_DC_INPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + }, + 'other': { + "value": {"loc": "/sys/bus/i2c/devices/i2c-43/43-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, + "Min": threshold.ERR_VALUE, + "Max": threshold.ERR_VALUE, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + } + }, + "InputsCurrent": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-43/43-0058/hwmon/hwmon*/curr1_input", "way": "sysfs"}, + "Min": threshold.PSU_INPUT_CURRENT_MIN, + "Max": threshold.PSU_INPUT_CURRENT_MAX, + "Unit": Unit.Current, + "format": "float(float(%s)/1000)" + }, + "InputsPower": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-43/43-0058/hwmon/hwmon*/power1_input", "way": "sysfs"}, + "Min": threshold.PSU_INPUT_POWER_MIN, + "Max": threshold.PSU_INPUT_POWER_MAX, + "Unit": Unit.Power, + "format": "float(float(%s)/1000000)" + }, + "OutputsStatus": {"bus": 43, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x8800}, + "OutputsVoltage": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-43/43-0058/hwmon/hwmon*/in2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_VOLTAGE_MIN, + "Max": threshold.PSU_OUTPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + }, + "OutputsCurrent": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-43/43-0058/hwmon/hwmon*/curr2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_CURRENT_MIN, + "Max": threshold.PSU_OUTPUT_CURRENT_MAX, + "Unit": Unit.Current, + "format": "float(float(%s)/1000)" + }, + "OutputsPower": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-43/43-0058/hwmon/hwmon*/power2_input", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_POWER_MIN, + "Max": threshold.PSU_OUTPUT_POWER_MAX, + "Unit": Unit.Power, + "format": "float(float(%s)/1000000)" + }, + } + ], + "temps": [ + { + "name": "BOARD_TEMP", + "temp_id": "TEMP1", + "Temperature": { + "value": [ + {"loc": "/sys/s3ip/temp_sensor/temp13/value", "way": "sysfs"}, + {"loc": "/sys/s3ip/temp_sensor/temp14/value", "way": "sysfs"}, + {"loc": "/sys/s3ip/temp_sensor/temp15/value", "way": "sysfs"}, + ], + "Min": -10000, + "Low": 0, + "High": 70000, + "Max": 75000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "CPU_TEMP", + "temp_id": "TEMP2", + "Temperature": { + "value": {"loc": "/sys/bus/platform/devices/coretemp.0/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": -15000, + "Low": 10000, + "High": 98000, + "Max": 100000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "INLET_TEMP", + "temp_id": "TEMP3", + "Temperature": { + "value": [ + {"loc": "/sys/s3ip/temp_sensor/temp11/value", "way": "sysfs"}, + {"loc": "/sys/s3ip/temp_sensor/temp12/value", "way": "sysfs"}, + ], + "Min": -30000, + "Low": 0, + "High": 40000, + "Max": 60000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "OUTLET_TEMP", + "temp_id": "TEMP4", + "Temperature": { + "value": [ + {"loc": "/sys/s3ip/temp_sensor/temp10/value", "way": "sysfs"}, + ], + "Min": -30000, + "Low": 0, + "High": 70000, + "Max": 80000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "SWITCH_TEMP", + "temp_id": "TEMP5", + "api_name": "ASIC_TEMP", + "Temperature": { + "value": {"loc": "/sys/s3ip/temp_sensor/temp17/value", "way": "sysfs"}, + "Min": -30000, + "Low": 10000, + "High": 100000, + "Max": 105000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "PSU1_TEMP", + "temp_id": "TEMP6", + "Temperature": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-42/42-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": -10000, + "Low": 0, + "High": 55000, + "Max": 60000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "PSU2_TEMP", + "temp_id": "TEMP7", + "Temperature": { + "value": {"loc": "/sys/bus/i2c/devices/i2c-43/43-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"}, + "Min": -10000, + "Low": 0, + "High": 55000, + "Max": 60000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "MOS_TEMP", + "temp_id": "TEMP8", + "Temperature": { + "value": [ + {"loc": "/sys/s3ip/temp_sensor/temp18/value", "way": "sysfs"}, + {"loc": "/sys/s3ip/temp_sensor/temp19/value", "way": "sysfs"}, + {"loc": "/sys/s3ip/temp_sensor/temp20/value", "way": "sysfs"}, + ], + "Min": -30000, + "Low": 10000, + "High": 100000, + "Max":125000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "SFF_TEMP", + "Temperature": { + "value": {"loc": "/tmp/highest_sff_temp", "way": "sysfs", "flock_path": "/tmp/highest_sff_temp"}, + "Min": -15000, + "Low": 0, + "High": 80000, + "Max": 100000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + ], + "leds": [ + { + "name": "FRONT_SYS_LED", + "led_type": "SYS_LED", + "led": {"loc": "/dev/cpld1", "offset": 0xd2, "len": 1, "way": "devfile"}, + "led_attrs": { + "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04, + "flash": 0xff, "light": 0xff, "off": 0, "mask": 0x07 + }, + }, + { + "name": "FRONT_PSU_LED", + "led_type": "PSU_LED", + "led": {"loc": "/dev/cpld1", "offset": 0xd3, "len": 1, "way": "devfile"}, + "led_attrs": { + "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04, + "flash": 0xff, "light": 0xff, "off": 0, "mask": 0x07 + }, + }, + { + "name": "FRONT_FAN_LED", + "led_type": "FAN_LED", + "led": {"loc": "/dev/cpld1", "offset": 0xd4, "len": 1, "way": "devfile"}, + "led_attrs": { + "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04, + "flash": 0xff, "light": 0xff, "off": 0, "mask": 0x07 + }, + }, + ], + "fans": [ + { + "name": "FAN1", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-52/52-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "present": {"loc": "/sys/s3ip/fan/fan1/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"bus": 50, "addr": 0x0d, "offset":0xd0, "len": 1, "way":"i2c"}, + "led_attrs": { + "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04, + "flash": 0xff, "light": 0xff, "off": 0xff, "mask": 0x07 + }, + "PowerMax": 192, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"bus": 50, "addr": 0x0d, "offset":0x90, "len": 1, "way":"i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan1/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan1/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan1/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"bus": 50, "addr": 0x0d, "offset":0x90, "len": 1, "way":"i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan1/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan1/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan1/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN2", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-53/53-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "present": {"loc": "/sys/s3ip/fan/fan2/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"bus": 50, "addr": 0x0d, "offset":0xd1, "len": 1, "way":"i2c"}, + "led_attrs": { + "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04, + "flash": 0xff, "light": 0xff, "off": 0xff, "mask": 0x07 + }, + "PowerMax": 192, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"bus": 50, "addr": 0x0d, "offset":0x91, "len": 1, "way":"i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan2/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan2/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan2/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"bus": 50, "addr": 0x0d, "offset":0x91, "len": 1, "way":"i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan2/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan2/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan2/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN3", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-54/54-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "present": {"loc": "/sys/s3ip/fan/fan3/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"bus": 50, "addr": 0x0d, "offset":0xd2, "len": 1, "way":"i2c"}, + "led_attrs": { + "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04, + "flash": 0xff, "light": 0xff, "off": 0xff, "mask": 0x07 + }, + "PowerMax": 192, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"bus": 50, "addr": 0x0d, "offset":0x92, "len": 1, "way":"i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan3/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan3/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan3/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"bus": 50, "addr": 0x0d, "offset":0x92, "len": 1, "way":"i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan3/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan3/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan3/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN4", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-55/55-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "present": {"loc": "/sys/s3ip/fan/fan4/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"bus": 50, "addr": 0x0d, "offset":0xd3, "len": 1, "way":"i2c"}, + "led_attrs": { + "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04, + "flash": 0xff, "light": 0xff, "off": 0xff, "mask": 0x07 + }, + "PowerMax": 192, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"bus": 50, "addr": 0x0d, "offset":0x93, "len": 1, "way":"i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan4/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan4/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan4/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"bus": 50, "addr": 0x0d, "offset":0x93, "len": 1, "way":"i2c"}, + "Running": {"loc": "/sys/s3ip/fan/fan4/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan4/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan4/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + ], + "cplds": [ + { + "name": "CPU_CPLD", + "cpld_id": "CPLD1", + "VersionFile": {"loc": "/dev/cpld0", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for system power", + "slot": 0, + "warm": 1, + }, + { + "name": "CONNECT_CPLD", + "cpld_id": "CPLD2", + "VersionFile": {"loc": "/dev/cpld1", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for base functions", + "slot": 0, + "warm": 1, + }, + { + "name": "MAC_CPLDA", + "cpld_id": "CPLD3", + "VersionFile": {"loc": "/dev/cpld6", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for sff modules", + "slot": 0, + "warm": 1, + }, + { + "name": "MAC_CPLDB", + "cpld_id": "CPLD4", + "VersionFile": {"loc": "/dev/cpld7", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for sff modules", + "slot": 0, + "warm": 1, + }, + { + "name": "MAC_CPLDC", + "cpld_id": "CPLD5", + "VersionFile": {"loc": "/dev/cpld8", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for sff modules", + "slot": 0, + "warm": 1, + }, + { + "name": "MGMT_CPLD", + "cpld_id": "CPLD6", + "VersionFile": {"loc": "/dev/cpld9", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for sff modules", + "slot": 0, + "warm": 1, + }, + { + "name": "FAN_CPLD", + "cpld_id": "CPLD7", + "VersionFile": {"loc": "/dev/cpld10", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for fan modules", + "slot": 0, + "warm": 1, + }, + { + "name": "MAC_FPGA", + "cpld_id": "CPLD8", + "VersionFile": {"loc": "/dev/fpga0", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for base functions", + "slot": 0, + "format": "little_endian", + "warm": 1, + }, + { + "name": "BIOS", + "cpld_id": "CPLD9", + "VersionFile": {"cmd": "dmidecode -s bios-version", "way": "cmd"}, + "desc": "Performs initialization of hardware components during booting", + "slot": 0, + "type": "str", + "warm": 0, + }, + ], + "cpu": [ + { + "name": "cpu", + "CpuResetCntReg": {"loc": "/dev/cpld1", "offset": 0x10, "len": 1, "way": "devfile_ascii"}, + "reboot_cause_path": "/etc/sonic/.reboot/.previous-reboot-cause.txt" + } + ], + "sfps": { + "ver": '1.0', + "port_index_start": 0, + "port_num": 66, + "log_level": 2, + "eeprom_retry_times": 5, + "eeprom_retry_break_sec": 0.2, + "presence_cpld": { + "dev_id": { + 6: { + "offset": { + 0x73: "17-24", + 0x74: "9-16", + 0x75: "1-8", + }, + }, + 7: { + "offset": { + 0x76: "57-64", + 0x77: "49-56", + 0x78: "41-48", + 0x79: "33-40", + 0x7a: "25-32", + }, + }, + 9: { + "offset": { + 0x69: "65-66", + }, + }, + }, + }, + "presence_val_is_present": 0, + "eeprom_path": "/sys/bus/i2c/devices/i2c-%d/%d-0050/eeprom", + "eeprom_path_key": list(range(106, 170)) + [59, 60], + "optoe_driver_path": "/sys/bus/i2c/devices/i2c-%d/%d-0050/dev_class", + "optoe_driver_key": list(range(106, 170)) + [59, 60], + "reset_cpld": { + "dev_id": { + 6: { + "offset": { + 0x70: "17-24", + 0x71: "9-16", + 0x72: "1-8", + }, + }, + 7: { + "offset": { + 0x70: "57-64", + 0x71: "49-56", + 0x72: "41-48", + 0x73: "33-40", + 0x74: "25-32", + }, + }, + }, + }, + "reset_val_is_reset": 0, + } +} diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/hal-config/x86_64_micas_m2_w6940_64oc_r0_exhaust_monitor.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/hal-config/x86_64_micas_m2_w6940_64oc_r0_exhaust_monitor.py new file mode 100644 index 00000000000..5958ab25b34 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/hal-config/x86_64_micas_m2_w6940_64oc_r0_exhaust_monitor.py @@ -0,0 +1,164 @@ +# coding:utf-8 + + +monitor = { + "openloop": { + "linear": { + "name": "linear", + "flag": 0, + "pwm_min": 0x9c, + "pwm_max": 0xff, + "K": 11, + "tin_min": 38, + }, + "curve": { + "name": "curve", + "flag": 1, + "pwm_min": 0x9c, + "pwm_max": 0xff, + "a": -0.33, + "b": 33.68, + "c": -480, + "tin_min": 27, + }, + }, + + "pid": { + "CPU_TEMP": { + "name": "CPU_TEMP", + "flag": 1, + "type": "duty", + "pwm_min": 0x99, + "pwm_max": 0xff, + "Kp": 1.5, + "Ki": 0.3, + "Kd": 0.3, + "target": 80, + "value": [None, None, None], + }, + "SWITCH_TEMP": { + "name": "SWITCH_TEMP", + "flag": 1, + "type": "duty", + "pwm_min": 0x99, + "pwm_max": 0xff, + "Kp": 1.5, + "Ki": 0.3, + "Kd": 0.3, + "target": 90, + "value": [None, None, None], + }, + "OUTLET_TEMP": { + "name": "OUTLET_TEMP", + "flag": 1, + "type": "duty", + "pwm_min": 0x99, + "pwm_max": 0xff, + "Kp": 2, + "Ki": 0.4, + "Kd": 0.3, + "target": 65, + "value": [None, None, None], + }, + "MOS_TEMP": { + "name": "MOS_TEMP", + "flag": 1, + "type": "duty", + "pwm_min": 0x99, + "pwm_max": 0xff, + "Kp": 1, + "Ki": 0.1, + "Kd": 0.3, + "target": 97, + "value": [None, None, None], + }, + "SFF_TEMP": { + "name": "SFF_TEMP", + "flag": 1, + "type": "duty", + "pwm_min": 0x99, + "pwm_max": 0xff, + "Kp": 2, + "Ki": 0.3, + "Kd": 0, + "target": 62, + "value": [None, None, None], + }, + }, + + "temps_threshold": { + "SWITCH_TEMP": {"name": "SWITCH_TEMP", "warning": 100, "critical": 105, "invalid": -100000, "error": -99999}, + "INLET_TEMP": {"name": "INLET_TEMP", "warning": 50, "critical": 55, "fix": -2}, + "OUTLET_TEMP": {"name": "OUTLET_TEMP", "warning": 70, "critical": 75}, + "CPU_TEMP": {"name": "CPU_TEMP", "warning": 95, "critical": 100}, + "MOS_TEMP": {"name": "MOS_TEMP", "warning": 115, "critical": 125}, + "BOARD_TEMP": {"name": "BOARD_TEMP", "warning": 95, "critical": 100}, + "SFF_TEMP": {"name": "SFF_TEMP", "warning": 999, "critical": 1000, "ignore_threshold": 1, "invalid": -10000, "error": -9999}, + }, + + "fancontrol_para": { + "fan_air_flow_monitor":1, + "psu_air_flow_monitor":1, + "interval": 5, + "max_pwm": 0xff, + "min_pwm": 0x99, + "abnormal_pwm": 0xff, + "warning_pwm": 0xff, + "temp_invalid_pid_pwm": 0x99, + "temp_error_pid_pwm": 0x99, + "temp_fail_num": 3, + "check_temp_fail": [ + {"temp_name": "INLET_TEMP"}, + {"temp_name": "SWITCH_TEMP"}, + {"temp_name": "CPU_TEMP"}, + {"temp_name": "MOS_TEMP"}, + {"temp_name": "OUTLET_TEMP"}, + {"temp_name": "BOARD_TEMP"}, + ], + "temp_warning_num": 3, # temp over warning 3 times continuously + "temp_critical_num": 3, # temp over critical 3 times continuously + "temp_warning_countdown": 60, # 5 min warning speed after not warning + "temp_critical_countdown": 60, # 5 min full speed after not critical + "rotor_error_count": 6, # fan rotor error 6 times continuously + "inlet_mac_diff": 999, + "check_crit_reboot_flag": 1, + "check_crit_reboot_num": 3, + "check_crit_sleep_time": 20, + "psu_fan_control": 1, + "psu_absent_fullspeed_num": 0xFF, + "fan_absent_fullspeed_num": 1, + "rotor_error_fullspeed_num": 1, + "deal_all_fan_error_method_flag": 1, + "all_fan_error_switch_temp_critical_temp": 80, + "all_fan_error_recover_log": "Power off base and mac board.", + "all_fan_error_recover_cmd": "dfd_debug io_wr 0x93a 0x01", + "all_fan_error_check_crit_reboot_num": 3, + "all_fan_error_check_crit_sleep_time": 2, + }, + + "ledcontrol_para": { + "interval":5, + "checkpsu": 0, # 0: sys led don't follow psu led + "checkfan": 0, # 0: sys led don't follow fan led + "psu_amber_num": 1, + "fan_amber_num": 1, + "board_sys_led": [ + {"led_name": "FRONT_SYS_LED"}, + ], + "board_psu_led": [ + {"led_name": "FRONT_PSU_LED"}, + ], + "board_fan_led": [ + {"led_name": "FRONT_FAN_LED"}, + ], + "fan_air_flow_monitor":1, + "psu_air_flow_monitor":1, + "psu_air_flow_amber_num":1, + "fan_air_flow_amber_num":1, + }, + + "otp_reboot_judge_file": { + "otp_switch_reboot_judge_file": "/etc/.otp_switch_reboot_flag", + "otp_other_reboot_judge_file": "/etc/.otp_other_reboot_flag", + }, +} diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/hal-config/x86_64_micas_m2_w6940_64oc_r0_monitor.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/hal-config/x86_64_micas_m2_w6940_64oc_r0_monitor.py index 4e95787950f..b08320c4743 100644 --- a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/hal-config/x86_64_micas_m2_w6940_64oc_r0_monitor.py +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/hal-config/x86_64_micas_m2_w6940_64oc_r0_monitor.py @@ -43,7 +43,7 @@ "pwm_min": 0x80, "pwm_max": 0xff, "Kp": 1.5, - "Ki": 1, + "Ki": 0.3, "Kd": 0.3, "target": 90, "value": [None, None, None], @@ -90,13 +90,15 @@ "SWITCH_TEMP": {"name": "SWITCH_TEMP", "warning": 100, "critical": 105, "invalid": -100000, "error": -99999}, "INLET_TEMP": {"name": "INLET_TEMP", "warning": 50, "critical": 55, "fix": -2}, "OUTLET_TEMP": {"name": "OUTLET_TEMP", "warning": 70, "critical": 75}, - "CPU_TEMP": {"name": "CPU_TEMP", "warning": 90, "critical": 95}, - "MOS_TEMP": {"name": "MOS_TEMP", "warning": 100, "critical": 125}, + "CPU_TEMP": {"name": "CPU_TEMP", "warning": 95, "critical": 100}, + "MOS_TEMP": {"name": "MOS_TEMP", "warning": 115, "critical": 125}, "BOARD_TEMP": {"name": "BOARD_TEMP", "warning": 95, "critical": 100}, "SFF_TEMP": {"name": "SFF_TEMP", "warning": 999, "critical": 1000, "ignore_threshold": 1, "invalid": -10000, "error": -9999}, }, "fancontrol_para": { + "fan_air_flow_monitor":1, + "psu_air_flow_monitor":1, "interval": 5, "max_pwm": 0xff, "min_pwm": 0x80, @@ -149,6 +151,10 @@ "board_fan_led": [ {"led_name": "FRONT_FAN_LED"}, ], + "fan_air_flow_monitor":1, + "psu_air_flow_monitor":1, + "psu_air_flow_amber_num":1, + "fan_air_flow_amber_num":1, }, "otp_reboot_judge_file": { diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/Makefile b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/Makefile index 8c39927af73..5bc3d1ef5f6 100644 --- a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/Makefile +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/Makefile @@ -1,7 +1,9 @@ MAKEFILE_FILE_PATH = $(abspath $(lastword $(MAKEFILE_LIST))) MODULES_DIR = $(abspath $(MAKEFILE_FILE_PATH)/../../../../common/modules) +BSP_PUBLIC_PATH = $(abspath $(MAKEFILE_FILE_PATH)/../../../../common/public/include) EXTRA_CFLAGS+= -I$(MODULES_DIR) +EXTRA_CFLAGS+= -I$(BSP_PUBLIC_PATH) obj-m += wb_pcie_dev_device.o obj-m += wb_io_dev_device.o diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_fpga_pca954x_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_fpga_pca954x_device.c index 043ec82366e..e252c7ea5d7 100644 --- a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_fpga_pca954x_device.c +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_fpga_pca954x_device.c @@ -455,7 +455,7 @@ static int __init wb_fpga_pca954x_device_init(void) continue; } client = i2c_new_client_device(adap, &fpga_pca954x_device_info[i]); - if (!client) { + if (IS_ERR(client) || !client) { fpga_pca954x_device_data->client = NULL; printk(KERN_ERR "Failed to register fpga pca954x device %d at bus %d!\n", fpga_pca954x_device_data->i2c_addr, fpga_pca954x_device_data->i2c_bus); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_i2c_dev_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_i2c_dev_device.c index 92bced35580..af01167d319 100644 --- a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_i2c_dev_device.c +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_i2c_dev_device.c @@ -147,7 +147,7 @@ static int __init wb_i2c_dev_device_init(void) continue; } client = i2c_new_client_device(adap, &i2c_dev_device_info[i]); - if (!client) { + if (IS_ERR(client) || !client) { i2c_dev_device_data->client = NULL; printk(KERN_ERR "Failed to register i2c dev device %d at bus %d!\n", i2c_dev_device_data->i2c_addr, i2c_dev_device_data->i2c_bus); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_i2c_mux_pca954x_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_i2c_mux_pca954x_device.c index 1bc2aafed2a..13511bf168b 100644 --- a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_i2c_mux_pca954x_device.c +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_i2c_mux_pca954x_device.c @@ -88,7 +88,7 @@ static int __init wb_i2c_mux_pca954x_device_init(void) continue; } client = i2c_new_client_device(adap, &i2c_mux_pca954x_device_info[i]); - if (!client) { + if (IS_ERR(client) || !client) { i2c_mux_pca954x_device_data->client = NULL; printk(KERN_ERR "Failed to register pca954x device %d at bus %d!\n", i2c_mux_pca954x_device_data->i2c_addr, i2c_mux_pca954x_device_data->i2c_bus); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_indirect_dev_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_indirect_dev_device.c index 82b692e414c..3f0af72ba66 100644 --- a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_indirect_dev_device.c +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_indirect_dev_device.c @@ -50,13 +50,10 @@ static indirect_dev_device_t indirect_dev_device_data0 = { .dev_name = "cpld2", .logic_dev_name = "/dev/cpld1", .data_bus_width = 4, - .addr_bus_width = 1, .wr_data = 0x70, - .wr_data_width = 4, .addr_low = 0x74, .addr_high = 0x75, .rd_data = 0x76, - .rd_data_width = 4, .opt_ctl = 0x7a, .indirect_len = 0x230, }; @@ -67,13 +64,10 @@ static indirect_dev_device_t indirect_dev_device_data1 = { .dev_name = "cpld3", .logic_dev_name = "/dev/cpld1", .data_bus_width = 4, - .addr_bus_width = 1, .wr_data = 0x80, - .wr_data_width = 4, .addr_low = 0x84, .addr_high = 0x85, .rd_data = 0x86, - .rd_data_width = 4, .opt_ctl = 0x8a, .indirect_len = 0x230, }; @@ -84,13 +78,10 @@ static indirect_dev_device_t indirect_dev_device_data2 = { .dev_name = "cpld4", .logic_dev_name = "/dev/cpld1", .data_bus_width = 4, - .addr_bus_width = 1, .wr_data = 0x90, - .wr_data_width = 4, .addr_low = 0x94, .addr_high = 0x95, .rd_data = 0x96, - .rd_data_width = 4, .opt_ctl = 0x9a, .indirect_len = 0x230, }; @@ -101,13 +92,10 @@ static indirect_dev_device_t indirect_dev_device_data3 = { .dev_name = "cpld5", .logic_dev_name = "/dev/cpld1", .data_bus_width = 4, - .addr_bus_width = 1, .wr_data = 0xa0, - .wr_data_width = 4, .addr_low = 0xa4, .addr_high = 0xa5, .rd_data = 0xa6, - .rd_data_width = 4, .opt_ctl = 0xaa, .indirect_len = 0x230, }; diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_wdt_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_wdt_device.c index e40ed10639f..5fd6e4ffbad 100644 --- a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_wdt_device.c +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/modules/driver/wb_wdt_device.c @@ -49,7 +49,7 @@ static wb_wdt_device_t wb_wdt_device_data_0 = { .feed_time = 9000, .config_dev_name = "/dev/cpld1", .config_mode = 1, - .priv_func_mode = 3, + .priv_func_mode = 4, .enable_reg = 0xb0, .enable_val = 0x1, .disable_val = 0x0, @@ -58,7 +58,7 @@ static wb_wdt_device_t wb_wdt_device_data_0 = { .timeleft_cfg_reg = 0xb2, .hw_algo = "toggle", .wdt_config_mode.gpio_wdt = { - .gpio = 346, + .gpio = 10074, .flags = 1 }, .timer_accuracy = 1600, /* 1.6s */ @@ -72,7 +72,7 @@ static wb_wdt_device_t wb_wdt_device_data_1 = { .feed_time = 30000, .config_dev_name = "/dev/cpld1", .config_mode = 2, - .priv_func_mode = 3, + .priv_func_mode = 4, .enable_reg = 0xba, .enable_val = 0x1, .disable_val = 0x0, @@ -87,7 +87,6 @@ static wb_wdt_device_t wb_wdt_device_data_1 = { .logic_func_mode = 4, }, .timer_accuracy = 6000, /* 6s */ - .sysfs_index = SYSFS_NO_CFG, }; static void wb_wdt_device_release(struct device *dev) diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/cfg_file/SENSOR.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/cfg_file/SENSOR.cfg index 7442d55dd14..7fa5874002d 100644 --- a/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/cfg_file/SENSOR.cfg +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6940-64oc/s3ip_sysfs_cfg/cfg_file/SENSOR.cfg @@ -3460,4 +3460,3 @@ hwmon_curr.mode_0x0007_0x03=constant hwmon_curr.int_cons_0x0007_0x03=19000 hwmon_curr.mode_0x0007_0x05=constant hwmon_curr.int_cons_0x0007_0x05=-3100 - diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/Makefile b/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/Makefile new file mode 100644 index 00000000000..6114c2aa222 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/Makefile @@ -0,0 +1,34 @@ +PWD = $(shell pwd) +DIR_KERNEL_SRC = $(PWD)/modules/driver +EXTRA_CFLAGS:= -I$(M)/include +EXTRA_CFLAGS+= -Wall +SUB_BUILD_DIR = $(PWD)/build +INSTALL_DIR = $(SUB_BUILD_DIR)/$(KERNEL_SRC)/$(INSTALL_MOD_DIR) +INSTALL_SCRIPT_DIR = $(SUB_BUILD_DIR)/usr/local/bin +INSTALL_LIB_DIR = $(SUB_BUILD_DIR)/usr/lib/python3/dist-packages +INSTALL_UPGRADE_TEST_DIR = $(SUB_BUILD_DIR)/etc/.upgrade_test +INSTALL_CPLD_REFRESH_DIR = $(SUB_BUILD_DIR)/etc/.cpld_refresh +INSTALL_S3IP_SYSFS_CFG_DIR = $(SUB_BUILD_DIR)/etc/s3ip_sysfs_cfg +INSTALL_S3IP_CONFIG_DIR = $(SUB_BUILD_DIR)/etc/s3ip + +all: + $(MAKE) -C $(KBUILD_OUTPUT) M=$(DIR_KERNEL_SRC) modules + @if [ ! -d ${INSTALL_DIR} ]; then mkdir -p ${INSTALL_DIR} ;fi + cp -r $(DIR_KERNEL_SRC)/*.ko $(INSTALL_DIR) + @if [ ! -d ${INSTALL_SCRIPT_DIR} ]; then mkdir -p ${INSTALL_SCRIPT_DIR} ;fi + cp -r $(PWD)/config/* $(INSTALL_SCRIPT_DIR) + @if [ ! -d ${INSTALL_LIB_DIR} ]; then mkdir -p ${INSTALL_LIB_DIR} ;fi + @if [ -d $(PWD)/hal-config/ ]; then cp -r $(PWD)/hal-config/* ${INSTALL_LIB_DIR} ;fi + @if [ ! -d ${INSTALL_UPGRADE_TEST_DIR} ]; then mkdir -p ${INSTALL_UPGRADE_TEST_DIR} ;fi + @if [ -d $(PWD)/.upgrade_test/ ]; then cp -r $(PWD)/.upgrade_test/* ${INSTALL_UPGRADE_TEST_DIR} ;fi + @if [ ! -d ${INSTALL_CPLD_REFRESH_DIR} ]; then mkdir -p ${INSTALL_CPLD_REFRESH_DIR} ;fi + @if [ -d $(PWD)/.cpld_refresh/ ]; then cp -r $(PWD)/.cpld_refresh/* ${INSTALL_CPLD_REFRESH_DIR} ;fi + @if [ ! -d ${INSTALL_S3IP_CONFIG_DIR} ]; then mkdir -p ${INSTALL_S3IP_CONFIG_DIR} ;fi + @if [ -d $(PWD)/s3ip_config/ ]; then cp -r $(PWD)/s3ip_config/* ${INSTALL_S3IP_CONFIG_DIR} ;fi + @if [ ! -d ${INSTALL_S3IP_SYSFS_CFG_DIR} ]; then mkdir -p ${INSTALL_S3IP_SYSFS_CFG_DIR} ;fi + @if [ -d $(PWD)/s3ip_sysfs_cfg/ ]; then cp -r $(PWD)/s3ip_sysfs_cfg/* ${INSTALL_S3IP_SYSFS_CFG_DIR} ;fi +clean: + rm -f ${DIR_KERNEL_SRC}/*.o ${DIR_KERNEL_SRC}/*.ko ${DIR_KERNEL_SRC}/*.mod.c ${DIR_KERNEL_SRC}/.*.cmd ${DIR_KERNEL_SRC}/*.mod + rm -f ${DIR_KERNEL_SRC}/Module.markers ${DIR_KERNEL_SRC}/Module.symvers ${DIR_KERNEL_SRC}/modules.order + rm -rf ${DIR_KERNEL_SRC}/.tmp_versions + rm -rf $(SUB_BUILD_DIR) diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/config/x86_64_micas_m2_w6950_128oc_r0_config.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/config/x86_64_micas_m2_w6950_128oc_r0_config.py new file mode 100644 index 00000000000..e749c1e2241 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/config/x86_64_micas_m2_w6950_128oc_r0_config.py @@ -0,0 +1,2271 @@ +#!/usr/bin/env python_nos +# -*- coding: UTF-8 -*- +from platform_common import * + +STARTMODULE = { + "hal_fanctrl": 1, + "hal_ledctrl": 1, + "avscontrol": 0, + "tty_console": 0, + "dev_monitor": 1, + "pmon_syslog": 1, + "sff_temp_polling": 1, + "reboot_cause": 0, + "product_name": 1, + "dfx_xdpe_monitor": 0, + "mgmt_ledctrl": 1, +} + +DEV_MONITOR_PARAM = { + "polling_time": 10, + "psus": [ + { + "name": "psu1", + "present": {"gettype": "sysfs", "loc": "/sys/s3ip/psu/psu1/present", "okval": 1}, + "device": [ + {"id": "psu1pmbus", "name": "wb_fsp1200", "bus": 67, "loc": 0x58, "attr": "hwmon"}, + {"id": "psu1frue2", "name": "24c02", "bus": 67, "loc": 0x50, "attr": "eeprom"} + ], + }, + { + "name": "psu2", + "present": {"gettype": "sysfs", "loc": "/sys/s3ip/psu/psu2/present", "okval": 1}, + "device": [ + {"id": "psu2pmbus", "name": "wb_fsp1200", "bus": 68, "loc": 0x58, "attr": "hwmon"}, + {"id": "psu2frue2", "name": "24c02", "bus": 68, "loc": 0x50, "attr": "eeprom"} + ], + }, + { + "name": "psu3", + "present": {"gettype": "sysfs", "loc": "/sys/s3ip/psu/psu3/present", "okval": 1}, + "device": [ + {"id": "psu3pmbus", "name": "wb_fsp1200", "bus": 69, "loc": 0x58, "attr": "hwmon"}, + {"id": "psu3frue2", "name": "24c02", "bus": 69, "loc": 0x50, "attr": "eeprom"} + ], + }, + { + "name": "psu4", + "present": {"gettype": "sysfs", "loc": "/sys/s3ip/psu/psu4/present", "okval": 1}, + "device": [ + {"id": "psu4pmbus", "name": "wb_fsp1200", "bus": 70, "loc": 0x58, "attr": "hwmon"}, + {"id": "psu4frue2", "name": "24c02", "bus": 70, "loc": 0x50, "attr": "eeprom"} + ], + }, + ], + "fans": [ + { + "name": "fan1", + "present": {"gettype": "sysfs", "loc": "/sys/s3ip/fan/fan1/present", "okval": 1}, + "device": [ + {"id": "fan1frue2", "name": "24c64", "bus": 77, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "fan2", + "present": {"gettype": "sysfs", "loc": "/sys/s3ip/fan/fan2/present", "okval": 1}, + "device": [ + {"id": "fan2frue2", "name": "24c64", "bus": 85, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "fan3", + "present": {"gettype": "sysfs", "loc": "/sys/s3ip/fan/fan3/present", "okval": 1}, + "device": [ + {"id": "fan3frue2", "name": "24c64", "bus": 78, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "fan4", + "present": {"gettype": "sysfs", "loc": "/sys/s3ip/fan/fan4/present", "okval": 1}, + "device": [ + {"id": "fan4frue2", "name": "24c64", "bus": 86, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "fan5", + "present": {"gettype": "sysfs", "loc": "/sys/s3ip/fan/fan5/present", "okval": 1}, + "device": [ + {"id": "fan5frue2", "name": "24c64", "bus": 79, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "fan6", + "present": {"gettype": "sysfs", "loc": "/sys/s3ip/fan/fan6/present", "okval": 1}, + "device": [ + {"id": "fan6frue2", "name": "24c64", "bus": 87, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "fan7", + "present": {"gettype": "sysfs", "loc": "/sys/s3ip/fan/fan7/present", "okval": 1}, + "device": [ + {"id": "fan7frue2", "name": "24c64", "bus": 80, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "fan7", + "present": {"gettype": "sysfs", "loc": "/sys/s3ip/fan/fan8/present", "okval": 1}, + "device": [ + {"id": "fan8frue2", "name": "24c64", "bus": 88, "loc": 0x50, "attr": "eeprom"}, + ], + }, + ], + "others": [ + { + "name": "eeprom", + "device": [ + {"id": "eeprom_1", "name": "24c02", "bus": 1, "loc": 0x56, "attr": "eeprom"}, + {"id": "eeprom_2", "name": "24c02", "bus": 1, "loc": 0x57, "attr": "eeprom"}, + {"id": "eeprom_3", "name": "24c02", "bus": 51, "loc": 0x57, "attr": "eeprom"}, + {"id": "eeprom_4", "name": "24c02", "bus": 97, "loc": 0x57, "attr": "eeprom"}, + {"id": "eeprom_5", "name": "24c02", "bus": 99, "loc": 0x57, "attr": "eeprom"}, + ], + }, + { + "name": "lm75", + "device": [ + {"id": "lm75_1", "name": "lm75", "bus": 54, "loc": 0x4a, "attr": "hwmon"}, + {"id": "lm75_2", "name": "lm75", "bus": 55, "loc": 0x4b, "attr": "hwmon"}, + {"id": "lm75_3", "name": "lm75", "bus": 56, "loc": 0x4b, "attr": "hwmon"}, + {"id": "lm75_4", "name": "lm75", "bus": 76, "loc": 0x4b, "attr": "hwmon"}, + {"id": "lm75_5", "name": "lm75", "bus": 84, "loc": 0x4b, "attr": "hwmon"}, + {"id": "lm75_6", "name": "lm75", "bus": 93, "loc": 0x4b, "attr": "hwmon"}, + {"id": "lm75_7", "name": "lm75", "bus": 101, "loc": 0x4b, "attr": "hwmon"}, + {"id": "lm75_8", "name": "lm75", "bus": 123, "loc": 0x4b, "attr": "hwmon"}, + {"id": "lm75_9", "name": "lm75", "bus": 124, "loc": 0x4f, "attr": "hwmon"}, + ], + }, + { + "name": "ucd90160", + "device": [ + {"id": "ucd90160_1", "name": "ucd90160", "bus": 53, "loc": 0x5b, "attr": "hwmon"}, + {"id": "ucd90160_2", "name": "ucd90160", "bus": 54, "loc": 0x5f, "attr": "hwmon"}, + {"id": "ucd90160_3", "name": "ucd90160", "bus": 92, "loc": 0x5b, "attr": "hwmon"}, + {"id": "ucd90160_4", "name": "ucd90160", "bus": 100, "loc": 0x5b, "attr": "hwmon"}, + {"id": "ucd90160_5", "name": "ucd90160", "bus": 128, "loc": 0x5b, "attr": "hwmon"}, + {"id": "ucd90160_6", "name": "ucd90160", "bus": 129, "loc": 0x5b, "attr": "hwmon"}, + {"id": "ucd90160_7", "name": "ucd90160", "bus": 130, "loc": 0x5b, "attr": "hwmon"}, + {"id": "ucd90160_8", "name": "ucd90160", "bus": 57, "loc": 0x68, "attr": "hwmon"}, + ], + }, + { + "name": "ads7828", + "device": [ + {"id": "ads7828_1", "name": "ads7828", "bus": 60, "loc": 0x48, "attr": "hwmon"}, + ], + }, + ], + "binddevs": [ + { + "name": "wb-vr-common", + "driver_type": "platform", + "device": [ + {"id": "vr_1", "name": "wb-vr-common.1", "bus": 54, "loc": 0x72, "attr": "hwmon"}, + {"id": "vr_2", "name": "wb-vr-common.2", "bus": 54, "loc": 0x74, "attr": "hwmon"}, + {"id": "vr_3", "name": "wb-vr-common.3", "bus": 94, "loc": 0x60, "attr": "hwmon"}, + {"id": "vr_4", "name": "wb-vr-common.4", "bus": 95, "loc": 0x60, "attr": "hwmon"}, + {"id": "vr_5", "name": "wb-vr-common.5", "bus": 96, "loc": 0x60, "attr": "hwmon"}, + {"id": "vr_6", "name": "wb-vr-common.6", "bus": 97, "loc": 0x60, "attr": "hwmon"}, + {"id": "vr_7", "name": "wb-vr-common.7", "bus": 102, "loc": 0x60, "attr": "hwmon"}, + {"id": "vr_8", "name": "wb-vr-common.8", "bus": 103, "loc": 0x60, "attr": "hwmon"}, + {"id": "vr_9", "name": "wb-vr-common.9", "bus": 104, "loc": 0x60, "attr": "hwmon"}, + {"id": "vr_10", "name": "wb-vr-common.10", "bus": 105, "loc": 0x60, "attr": "hwmon"}, + {"id": "vr_11", "name": "wb-vr-common.11", "bus": 107, "loc": 0x60, "attr": "hwmon"}, + {"id": "vr_12", "name": "wb-vr-common.12", "bus": 108, "loc": 0x60, "attr": "hwmon"}, + {"id": "vr_13", "name": "wb-vr-common.13", "bus": 109, "loc": 0x60, "attr": "hwmon"}, + {"id": "vr_14", "name": "wb-vr-common.14", "bus": 110, "loc": 0x60, "attr": "hwmon"}, + {"id": "vr_15", "name": "wb-vr-common.15", "bus": 111, "loc": 0x60, "attr": "hwmon"}, + {"id": "vr_16", "name": "wb-vr-common.16", "bus": 112, "loc": 0x60, "attr": "hwmon"}, + {"id": "vr_17", "name": "wb-vr-common.17", "bus": 113, "loc": 0x60, "attr": "hwmon"}, + {"id": "vr_18", "name": "wb-vr-common.18", "bus": 114, "loc": 0x60, "attr": "hwmon"}, + {"id": "vr_19", "name": "wb-vr-common.19", "bus": 115, "loc": 0x60, "attr": "hwmon"}, + {"id": "vr_20", "name": "wb-vr-common.20", "bus": 116, "loc": 0x60, "attr": "hwmon"}, + {"id": "vr_21", "name": "wb-vr-common.21", "bus": 117, "loc": 0x60, "attr": "hwmon"}, + {"id": "vr_22", "name": "wb-vr-common.22", "bus": 118, "loc": 0x60, "attr": "hwmon"}, + {"id": "vr_23", "name": "wb-vr-common.23", "bus": 119, "loc": 0x60, "attr": "hwmon"}, + {"id": "vr_24", "name": "wb-vr-common.24", "bus": 120, "loc": 0x60, "attr": "hwmon"}, + {"id": "vr_25", "name": "wb-vr-common.25", "bus": 121, "loc": 0x60, "attr": "hwmon"}, + {"id": "vr_26", "name": "wb-vr-common.26", "bus": 122, "loc": 0x60, "attr": "hwmon"}, + {"id": "vr_27", "name": "wb-vr-common.27", "bus": 136, "loc": 0x60, "attr": "hwmon"}, + ], + }, + ], +} + + +MANUINFO_CONF = { + "bios": { + "key": "BIOS", + "head": True, + "next": "onie" + }, + "bios_vendor": { + "parent": "bios", + "key": "Vendor", + "cmd": "dmidecode -t 0 |grep Vendor", + "pattern": r".*Vendor", + "separator": ":", + "arrt_index": 1, + }, + "bios_version": { + "parent": "bios", + "key": "Version", + "cmd": "dmidecode -t 0 |grep Version", + "pattern": r".*Version", + "separator": ":", + "arrt_index": 2, + }, + "bios_date": { + "parent": "bios", + "key": "Release Date", + "cmd": "dmidecode -t 0 |grep Release", + "pattern": r".*Release Date", + "separator": ":", + "arrt_index": 3, + }, + "onie": { + "key": "ONIE", + "next": "cpu" + }, + "onie_date": { + "parent": "onie", + "key": "Build Date", + "file": "/host/machine.conf", + "pattern": r"^onie_build_date", + "separator": "=", + "arrt_index": 1, + }, + "onie_version": { + "parent": "onie", + "key": "Version", + "file": "/host/machine.conf", + "pattern": r"^onie_version", + "separator": "=", + "arrt_index": 2, + }, + + "cpu": { + "key": "CPU", + "next": "ssd" + }, + "cpu_vendor": { + "parent": "cpu", + "key": "Vendor", + "cmd": "dmidecode --type processor |grep Manufacturer", + "pattern": r".*Manufacturer", + "separator": ":", + "arrt_index": 1, + }, + "cpu_model": { + "parent": "cpu", + "key": "Device Model", + "cmd": "dmidecode --type processor | grep Version", + "pattern": r".*Version", + "separator": ":", + "arrt_index": 2, + }, + "cpu_core": { + "parent": "cpu", + "key": "Core Count", + "cmd": "dmidecode --type processor | grep \"Core Count\"", + "pattern": r".*Core Count", + "separator": ":", + "arrt_index": 3, + }, + "cpu_thread": { + "parent": "cpu", + "key": "Thread Count", + "cmd": "dmidecode --type processor | grep \"Thread Count\"", + "pattern": r".*Thread Count", + "separator": ":", + "arrt_index": 4, + }, + "ssd": { + "key": "SSD", + "next": "cpld" + }, + "ssd_model": { + "parent": "ssd", + "key": "Model Number", + "cmd": "smartctl -i /dev/nvme0n1 |grep \"Model Number\"", + "pattern": r".*Model Number", + "separator": ":", + "arrt_index": 1, + }, + "ssd_fw": { + "parent": "ssd", + "key": "Firmware Version", + "cmd": "smartctl -i /dev/nvme0n1 |grep \"Firmware Version\"", + "pattern": r".*Firmware Version", + "separator": ":", + "arrt_index": 2, + }, + "ssd_user_cap": { + "parent": "ssd", + "key": "User Capacity", + "cmd": "smartctl -i /dev/nvme0n1 |grep \"Namespace 1 Size/Capacity\"", + "pattern": r".*Namespace 1 Size/Capacity", + "separator": ":", + "arrt_index": 3, + }, + + "cpld": { + "key": "CPLD", + "next": "psu" + }, + + "cpld1": { + "key": "CPLD1", + "parent": "cpld", + "arrt_index": 1, + }, + "cpld1_model": { + "key": "Device Model", + "parent": "cpld1", + "config": "LCMXO3LF-6900C-5BG400C", + "arrt_index": 1, + }, + "cpld1_vender": { + "key": "Vendor", + "parent": "cpld1", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld1_desc": { + "key": "Description", + "parent": "cpld1", + "config": "CPU_CPLD", + "arrt_index": 3, + }, + "cpld1_version": { + "key": "Firmware Version", + "parent": "cpld1", + "reg": { + "loc": "/dev/cpld0", + "offset": 0, + "size": 4 + }, + "callback": "cpld_format", + "arrt_index": 4, + }, + + "cpld2": { + "key": "CPLD2", + "parent": "cpld", + "arrt_index": 2, + }, + "cpld2_model": { + "key": "Device Model", + "parent": "cpld2", + "config": "LCMXO3LF-6900C-5BG400C", + "arrt_index": 1, + }, + "cpld2_vender": { + "key": "Vendor", + "parent": "cpld2", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld2_desc": { + "key": "Description", + "parent": "cpld2", + "config": "MGMT_CPLD", + "arrt_index": 3, + }, + "cpld2_version": { + "key": "Firmware Version", + "parent": "cpld2", + "reg": { + "loc": "/dev/cpld1", + "offset": 0, + "size": 4 + }, + "callback": "cpld_format", + "arrt_index": 4, + }, + + "cpld3": { + "key": "CPLD3", + "parent": "cpld", + "arrt_index": 3, + }, + "cpld3_model": { + "key": "Device Model", + "parent": "cpld3", + "config": "LCMXO3LF-6900C-5BG400C", + "arrt_index": 1, + }, + "cpld3_vender": { + "key": "Vendor", + "parent": "cpld3", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld3_desc": { + "key": "Description", + "parent": "cpld3", + "config": "MAC_CPLD_A", + "arrt_index": 3, + }, + "cpld3_version": { + "key": "Firmware Version", + "parent": "cpld3", + "reg": { + "loc": "/dev/cpld2", + "offset": 0, + "size": 4 + }, + "callback": "cpld_format", + "arrt_index": 4, + }, + + "cpld4": { + "key": "CPLD4", + "parent": "cpld", + "arrt_index": 4, + }, + "cpld4_model": { + "key": "Device Model", + "parent": "cpld4", + "config": "LCMXO3LF-4300C-5BG324C", + "arrt_index": 1, + }, + "cpld4_vender": { + "key": "Vendor", + "parent": "cpld4", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld4_desc": { + "key": "Description", + "parent": "cpld4", + "config": "MAC_CPLD_B", + "arrt_index": 3, + }, + "cpld4_version": { + "key": "Firmware Version", + "parent": "cpld4", + "reg": { + "loc": "/dev/cpld3", + "offset": 0, + "size": 4 + }, + "callback": "cpld_format", + "arrt_index": 4, + }, + + "cpld5": { + "key": "CPLD5", + "parent": "cpld", + "arrt_index": 5, + }, + "cpld5_model": { + "key": "Device Model", + "parent": "cpld5", + "config": "LCMXO3LF-6900C-5BG400C", + "arrt_index": 1, + }, + "cpld5_vender": { + "key": "Vendor", + "parent": "cpld5", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld5_desc": { + "key": "Description", + "parent": "cpld5", + "config": "MAC_CPLD_C", + "arrt_index": 3, + }, + "cpld5_version": { + "key": "Firmware Version", + "parent": "cpld5", + "reg": { + "loc": "/dev/cpld4", + "offset": 0, + "size": 4 + }, + "callback": "cpld_format", + "arrt_index": 4, + }, + + "cpld6": { + "key": "CPLD6", + "parent": "cpld", + "arrt_index": 6, + }, + "cpld6_model": { + "key": "Device Model", + "parent": "cpld6", + "config": "LCMXO3LF-6900C-5BG400C", + "arrt_index": 1, + }, + "cpld6_vender": { + "key": "Vendor", + "parent": "cpld6", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld6_desc": { + "key": "Description", + "parent": "cpld6", + "config": "UPORT_CPLD", + "arrt_index": 3, + }, + "cpld6_version": { + "key": "Firmware Version", + "parent": "cpld6", + "reg": { + "loc": "/dev/cpld5", + "offset": 0, + "size": 4 + }, + "callback": "cpld_format", + "arrt_index": 4, + }, + "cpld7": { + "key": "CPLD7", + "parent": "cpld", + "arrt_index": 7, + }, + "cpld7_model": { + "key": "Device Model", + "parent": "cpld7", + "config": "LCMXO3LF-6900C-5BG400C", + "arrt_index": 1, + }, + "cpld7_vender": { + "key": "Vendor", + "parent": "cpld7", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld7_desc": { + "key": "Description", + "parent": "cpld7", + "config": "DPORT_CPLD", + "arrt_index": 3, + }, + "cpld7_version": { + "key": "Firmware Version", + "parent": "cpld7", + "reg": { + "loc": "/dev/cpld6", + "offset": 0, + "size": 4 + }, + "callback": "cpld_format", + "arrt_index": 4, + }, + + "cpld8": { + "key": "CPLD8", + "parent": "cpld", + "arrt_index": 8, + }, + "cpld8_model": { + "key": "Device Model", + "parent": "cpld8", + "config": "LCMXO3LF-2100C-5BG256C", + "arrt_index": 1, + }, + "cpld8_vender": { + "key": "Vendor", + "parent": "cpld8", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld8_desc": { + "key": "Description", + "parent": "cpld8", + "config": "UFAN_CPLD", + "arrt_index": 3, + }, + "cpld8_version": { + "key": "Firmware Version", + "parent": "cpld8", + "reg": { + "loc": "/dev/cpld7", + "offset": 0, + "size": 4 + }, + "callback": "cpld_format", + "arrt_index": 4, + }, + + "cpld9": { + "key": "CPLD9", + "parent": "cpld", + "arrt_index": 9, + }, + "cpld9_model": { + "key": "Device Model", + "parent": "cpld9", + "config": "LCMXO3LF-2100C-5BG256C", + "arrt_index": 1, + }, + "cpld9_vender": { + "key": "Vendor", + "parent": "cpld9", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld9_desc": { + "key": "Description", + "parent": "cpld9", + "config": "DFAN_CPLD", + "arrt_index": 3, + }, + "cpld9_version": { + "key": "Firmware Version", + "parent": "cpld9", + "reg": { + "loc": "/dev/cpld8", + "offset": 0, + "size": 4 + }, + "callback": "cpld_format", + "arrt_index": 4, + }, + + "cpld10": { + "key": "CPLD10", + "parent": "cpld", + "arrt_index": 10, + }, + "cpld10_model": { + "key": "Device Model", + "parent": "cpld10", + "config": "LCMXO3LF-2100C-5BG256C", + "arrt_index": 1, + }, + "cpld10_vender": { + "key": "Vendor", + "parent": "cpld10", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld10_desc": { + "key": "Description", + "parent": "cpld10", + "config": "MAC_CPLD_D", + "arrt_index": 3, + }, + "cpld10_version": { + "key": "Firmware Version", + "parent": "cpld10", + "reg": { + "loc": "/dev/cpld9", + "offset": 0, + "size": 4 + }, + "callback": "cpld_format", + "arrt_index": 4, + }, + "psu": { + "key": "PSU", + "next": "fan" + }, + + "psu1": { + "parent": "psu", + "key": "PSU1", + "arrt_index": 1, + }, + "psu1_hw_version": { + "key": "Hardware Version", + "parent": "psu1", + "extra": { + "funcname": "getPsu", + "id": "psu1", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "psu1_fw_version": { + "key": "Firmware Version", + "parent": "psu1", + "config": "NA", + "arrt_index": 2, + }, + + "psu2": { + "parent": "psu", + "key": "PSU2", + "arrt_index": 2, + }, + "psu2_hw_version": { + "key": "Hardware Version", + "parent": "psu2", + "extra": { + "funcname": "getPsu", + "id": "psu2", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "psu2_fw_version": { + "key": "Firmware Version", + "parent": "psu2", + "config": "NA", + "arrt_index": 2, + }, + + "psu3": { + "parent": "psu", + "key": "PSU3", + "arrt_index": 3, + }, + "psu3_hw_version": { + "key": "Hardware Version", + "parent": "psu3", + "extra": { + "funcname": "getPsu", + "id": "psu3", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "psu3_fw_version": { + "key": "Firmware Version", + "parent": "psu3", + "config": "NA", + "arrt_index": 2, + }, + + "psu4": { + "parent": "psu", + "key": "PSU4", + "arrt_index": 4, + }, + "psu4_hw_version": { + "key": "Hardware Version", + "parent": "psu4", + "extra": { + "funcname": "getPsu", + "id": "psu4", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "psu4_fw_version": { + "key": "Firmware Version", + "parent": "psu4", + "config": "NA", + "arrt_index": 2, + }, + "fan": { + "key": "FAN", + "next": "i210" + }, + "fan1": { + "key": "FAN1", + "parent": "fan", + "arrt_index": 1, + }, + "fan1_hw_version": { + "key": "Hardware Version", + "parent": "fan1", + "extra": { + "funcname": "checkFan", + "id": "fan1", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan1_fw_version": { + "key": "Firmware Version", + "parent": "fan1", + "config": "NA", + "arrt_index": 2, + }, + + "fan2": { + "key": "FAN2", + "parent": "fan", + "arrt_index": 2, + }, + "fan2_hw_version": { + "key": "Hardware Version", + "parent": "fan2", + "extra": { + "funcname": "checkFan", + "id": "fan2", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan2_fw_version": { + "key": "Firmware Version", + "parent": "fan2", + "config": "NA", + "arrt_index": 2, + }, + + "fan3": { + "key": "FAN3", + "parent": "fan", + "arrt_index": 3, + }, + "fan3_hw_version": { + "key": "Hardware Version", + "parent": "fan3", + "extra": { + "funcname": "checkFan", + "id": "fan3", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan3_fw_version": { + "key": "Firmware Version", + "parent": "fan3", + "config": "NA", + "arrt_index": 2, + }, + + "fan4": { + "key": "FAN4", + "parent": "fan", + "arrt_index": 4, + }, + "fan4_hw_version": { + "key": "Hardware Version", + "parent": "fan4", + "extra": { + "funcname": "checkFan", + "id": "fan4", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan4_fw_version": { + "key": "Firmware Version", + "parent": "fan4", + "config": "NA", + "arrt_index": 2, + }, + + "fan5": { + "key": "FAN5", + "parent": "fan", + "arrt_index": 5, + }, + "fan5_hw_version": { + "key": "Hardware Version", + "parent": "fan5", + "extra": { + "funcname": "checkFan", + "id": "fan5", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan5_fw_version": { + "key": "Firmware Version", + "parent": "fan5", + "config": "NA", + "arrt_index": 2, + }, + + "fan6": { + "key": "FAN6", + "parent": "fan", + "arrt_index": 6, + }, + "fan6_hw_version": { + "key": "Hardware Version", + "parent": "fan6", + "extra": { + "funcname": "checkFan", + "id": "fan6", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan6_fw_version": { + "key": "Firmware Version", + "parent": "fan6", + "config": "NA", + "arrt_index": 2, + }, + + "fan7": { + "key": "FAN7", + "parent": "fan", + "arrt_index": 7, + }, + "fan7_hw_version": { + "key": "Hardware Version", + "parent": "fan7", + "extra": { + "funcname": "checkFan", + "id": "fan7", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan7_fw_version": { + "key": "Firmware Version", + "parent": "fan7", + "config": "NA", + "arrt_index": 2, + }, + + "fan8": { + "key": "FAN8", + "parent": "fan", + "arrt_index": 8, + }, + "fan8_hw_version": { + "key": "Hardware Version", + "parent": "fan8", + "extra": { + "funcname": "checkFan", + "id": "fan8", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan8_fw_version": { + "key": "Firmware Version", + "parent": "fan8", + "config": "NA", + "arrt_index": 2, + }, + "i210": { + "key": "NIC", + "next": "fpga" + }, + "i210_model": { + "parent": "i210", + "config": "NA", + "key": "Device Model", + "arrt_index": 1, + }, + "i210_vendor": { + "parent": "i210", + "config": "INTEL", + "key": "Vendor", + "arrt_index": 2, + }, + "i210_version": { + "parent": "i210", + "cmd": "ethtool -i eth0", + "pattern": r"firmware-version", + "separator": ":", + "key": "Firmware Version", + "arrt_index": 3, + }, + "fpga": { + "key": "FPGA", + "next": "others" + }, + + "fpga1": { + "key": "FPGA1", + "parent": "fpga", + "arrt_index": 1, + }, + "fpga1_model": { + "parent": "fpga1", + "devfile": { + "loc": "/dev/fpga0", + "offset":0x10, + "len":4, + "bit_width":4 + }, + "decode": { + "00000050": "XC7A50T-2FGG484I", + "00000100": "XC7A100T-2FGG484I" + }, + "key": "Device Model", + "arrt_index": 1, + }, + "fpga1_vender": { + "parent": "fpga1", + "config": "XILINX", + "key": "Vendor", + "arrt_index": 2, + }, + "fpga1_desc": { + "key": "Description", + "parent": "fpga1", + "config": "MAC_FPGA", + "arrt_index": 3, + }, + "fpga1_hw_version": { + "parent": "fpga1", + "config": "NA", + "key": "Hardware Version", + "arrt_index": 4, + }, + "fpga1_fw_version": { + "parent": "fpga1", + "devfile": { + "loc": "/dev/fpga0", + "offset":0, + "len":4, + "bit_width":4 + }, + "key": "Firmware Version", + "arrt_index": 5, + }, + "fpga1_date": { + "parent": "fpga1", + "devfile": { + "loc": "/dev/fpga0", + "offset":4, + "len":4, + "bit_width":4 + }, + "key": "Build Date", + "arrt_index": 6, + }, + + "fpga2": { + "key": "FPGA2", + "parent": "fpga", + "arrt_index": 2, + }, + "fpga2_model": { + "parent": "fpga2", + "devfile": { + "loc": "/dev/fpga1", + "offset":0x10, + "len":4, + "bit_width":4 + }, + "decode": { + "00000050": "XC7A50T-2FGG484I", + "00000100": "XC7A100T-2FGG484I" + }, + "key": "Device Model", + "arrt_index": 2, + }, + "fpga2_vender": { + "parent": "fpga2", + "config": "XILINX", + "key": "Vendor", + "arrt_index": 2, + }, + "fpga2_desc": { + "key": "Description", + "parent": "fpga2", + "config": "UPORT_FPGA", + "arrt_index": 3, + }, + "fpga2_hw_version": { + "parent": "fpga2", + "config": "NA", + "key": "Hardware Version", + "arrt_index": 4, + }, + "fpga2_fw_version": { + "parent": "fpga2", + "devfile": { + "loc": "/dev/fpga1", + "offset":0, + "len":4, + "bit_width":4 + }, + "key": "Firmware Version", + "arrt_index": 5, + }, + "fpga2_date": { + "parent": "fpga2", + "devfile": { + "loc": "/dev/fpga1", + "offset":4, + "len":4, + "bit_width":4 + }, + "key": "Build Date", + "arrt_index": 6, + }, + + "fpga3": { + "key": "FPGA3", + "parent": "fpga", + "arrt_index": 3, + }, + "fpga3_model": { + "parent": "fpga3", + "devfile": { + "loc": "/dev/fpga2", + "offset":0x10, + "len":4, + "bit_width":4 + }, + "decode": { + "00000050": "XC7A50T-2FGG484I", + "00000100": "XC7A100T-2FGG484I" + }, + "key": "Device Model", + "arrt_index": 3, + }, + "fpga3_vender": { + "parent": "fpga3", + "config": "XILINX", + "key": "Vendor", + "arrt_index": 3, + }, + "fpga3_desc": { + "key": "Description", + "parent": "fpga3", + "config": "DPORT_FPGA", + "arrt_index": 3, + }, + "fpga3_hw_version": { + "parent": "fpga3", + "config": "NA", + "key": "Hardware Version", + "arrt_index": 4, + }, + "fpga3_fw_version": { + "parent": "fpga3", + "devfile": { + "loc": "/dev/fpga2", + "offset":0, + "len":4, + "bit_width":4 + }, + "key": "Firmware Version", + "arrt_index": 5, + }, + "fpga3_date": { + "parent": "fpga3", + "devfile": { + "loc": "/dev/fpga2", + "offset":4, + "len":4, + "bit_width":4 + }, + "key": "Build Date", + "arrt_index": 6, + }, + "others": { + "key": "OTHERS", + }, + "53134": { + "parent": "others", + "key": "CPU-BMC-SWITCH", + "arrt_index": 1, + }, + "53134_model": { + "parent": "53134", + "config": "BCM53134O", + "key": "Device Model", + "arrt_index": 1, + }, + "53134_vendor": { + "parent": "53134", + "config": "Broadcom", + "key": "Vendor", + "arrt_index": 2, + }, + "53134_hw_version": { + "parent": "53134", + "key": "Hardware Version", + "func": { + "funcname": "get_bcm5387_version", + "params": { + "before": [ + # enable tocm_jtag_en + {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x9d, "value": 0xa5}, + # OE high + {"gettype": "cmd", "cmd": "echo 596 > /sys/class/gpio/export"}, + {"gettype": "cmd", "cmd": "echo high > /sys/class/gpio/gpio596/direction"}, + # SEL1 high + {"gettype": "cmd", "cmd": "echo 597 > /sys/class/gpio/export"}, + {"gettype": "cmd", "cmd": "echo high > /sys/class/gpio/gpio597/direction"}, + # enable 53134 update + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x54, "value": 0x01}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x55, "value": 0x05}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x4c, "value": 0xb2}, + # {"gettype": "cmd", "cmd": "modprobe wb_spi_gpio"}, + {"gettype": "cmd", "cmd": "modprobe wb_spi_gpio_device sck=7 mosi=5 miso=6 cs=8 bus=0 gpio_chip_name=AMDI0030:00"}, + {"gettype": "cmd", "cmd": "modprobe wb_spi_93xx46 eeprom_name=gt93c56a"}, + ], + "get_version": "md5sum /sys/bus/spi/devices/spi0.0/eeprom | awk '{print $1}'", + "after": [ + {"gettype": "cmd", "cmd": "echo 0 > /sys/class/gpio/gpio597/value"}, + {"gettype": "cmd", "cmd": "echo 597 > /sys/class/gpio/unexport"}, + {"gettype": "cmd", "cmd": "echo 0 > /sys/class/gpio/gpio596/value"}, + {"gettype": "cmd", "cmd": "echo 596 > /sys/class/gpio/unexport"}, + ], + "finally": [ + {"gettype": "cmd", "cmd": "rmmod wb_spi_93xx46"}, + {"gettype": "cmd", "cmd": "rmmod wb_spi_gpio_device"}, + # {"gettype": "cmd", "cmd": "rmmod wb_spi_gpio"}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x4c, "value": 0xb3}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x55, "value": 0x00}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x54, "value": 0x00}, + # disable tocm_jtag_en + {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x9d, "value": 0xa4}, + ], + }, + }, + "arrt_index": 3, + }, + +} + +PMON_SYSLOG_STATUS = { + "polling_time": 3, + "sffs": { + "present": {"path": ["/sys/s3ip/transceiver/*/present"], "ABSENT": 0}, + "nochangedmsgflag": 0, + "nochangedmsgtime": 60, + "noprintfirsttimeflag": 1, + "alias": { + "sff1": "Ethernet1", + "sff2": "Ethernet2", + "sff3": "Ethernet3", + "sff4": "Ethernet4", + "sff5": "Ethernet5", + "sff6": "Ethernet6", + "sff7": "Ethernet7", + "sff8": "Ethernet8", + "sff9": "Ethernet9", + "sff10": "Ethernet10", + "sff11": "Ethernet11", + "sff12": "Ethernet12", + "sff13": "Ethernet13", + "sff14": "Ethernet14", + "sff15": "Ethernet15", + "sff16": "Ethernet16", + "sff17": "Ethernet17", + "sff18": "Ethernet18", + "sff19": "Ethernet19", + "sff20": "Ethernet20", + "sff21": "Ethernet21", + "sff22": "Ethernet22", + "sff23": "Ethernet23", + "sff24": "Ethernet24", + "sff25": "Ethernet25", + "sff26": "Ethernet26", + "sff27": "Ethernet27", + "sff28": "Ethernet28", + "sff29": "Ethernet29", + "sff30": "Ethernet30", + "sff31": "Ethernet31", + "sff32": "Ethernet32", + "sff33": "Ethernet33", + "sff34": "Ethernet34", + "sff35": "Ethernet35", + "sff36": "Ethernet36", + "sff37": "Ethernet37", + "sff38": "Ethernet38", + "sff39": "Ethernet39", + "sff40": "Ethernet40", + "sff41": "Ethernet41", + "sff42": "Ethernet42", + "sff43": "Ethernet43", + "sff44": "Ethernet44", + "sff45": "Ethernet45", + "sff46": "Ethernet46", + "sff47": "Ethernet47", + "sff48": "Ethernet48", + "sff49": "Ethernet49", + "sff50": "Ethernet50", + "sff51": "Ethernet51", + "sff52": "Ethernet52", + "sff53": "Ethernet53", + "sff54": "Ethernet54", + "sff55": "Ethernet55", + "sff56": "Ethernet56", + "sff57": "Ethernet57", + "sff58": "Ethernet58", + "sff59": "Ethernet59", + "sff60": "Ethernet60", + "sff61": "Ethernet61", + "sff62": "Ethernet62", + "sff63": "Ethernet63", + "sff64": "Ethernet64", + "sff65": "Ethernet65", + "sff66": "Ethernet66", + "sff67": "Ethernet67", + "sff68": "Ethernet68", + "sff69": "Ethernet69", + "sff70": "Ethernet70", + "sff71": "Ethernet71", + "sff72": "Ethernet72", + "sff73": "Ethernet73", + "sff74": "Ethernet74", + "sff75": "Ethernet75", + "sff76": "Ethernet76", + "sff77": "Ethernet77", + "sff78": "Ethernet78", + "sff79": "Ethernet79", + "sff80": "Ethernet80", + "sff81": "Ethernet81", + "sff82": "Ethernet82", + "sff83": "Ethernet83", + "sff84": "Ethernet84", + "sff85": "Ethernet85", + "sff86": "Ethernet86", + "sff87": "Ethernet87", + "sff88": "Ethernet88", + "sff89": "Ethernet89", + "sff90": "Ethernet90", + "sff91": "Ethernet91", + "sff92": "Ethernet92", + "sff93": "Ethernet93", + "sff94": "Ethernet94", + "sff95": "Ethernet95", + "sff96": "Ethernet96", + "sff97": "Ethernet97", + "sff98": "Ethernet98", + "sff99": "Ethernet99", + "sff100": "Ethernet100", + "sff101": "Ethernet101", + "sff102": "Ethernet102", + "sff103": "Ethernet103", + "sff104": "Ethernet104", + "sff105": "Ethernet105", + "sff106": "Ethernet106", + "sff107": "Ethernet107", + "sff108": "Ethernet108", + "sff109": "Ethernet109", + "sff110": "Ethernet110", + "sff111": "Ethernet111", + "sff112": "Ethernet112", + "sff113": "Ethernet113", + "sff114": "Ethernet114", + "sff115": "Ethernet115", + "sff116": "Ethernet116", + "sff117": "Ethernet117", + "sff118": "Ethernet118", + "sff119": "Ethernet119", + "sff120": "Ethernet120", + "sff121": "Ethernet121", + "sff122": "Ethernet122", + "sff123": "Ethernet123", + "sff124": "Ethernet124", + "sff125": "Ethernet125", + "sff126": "Ethernet126", + "sff127": "Ethernet127", + "sff128": "Ethernet128", + "sff129": "Ethernet129" + } + }, + "fans": { + "present": {"path": ["/sys/s3ip/fan/*/present"], "ABSENT": 0}, + "status": [ + {"path": "/sys/s3ip/fan/%s/status", 'okval': 1}, + ], + "nochangedmsgflag": 1, + "nochangedmsgtime": 60, + "noprintfirsttimeflag": 0, + "alias": { + "fan1": "FAN1", + "fan2": "FAN2", + "fan3": "FAN3", + "fan4": "FAN4", + "fan5": "FAN5", + "fan6": "FAN6", + "fan7": "FAN7", + "fan8": "FAN8" + } + }, + "psus": { + "present": {"path": ["/sys/s3ip/psu/*/present"], "ABSENT": 0}, + "status": [ + {"path": "/sys/s3ip/psu/%s/out_status", "okval":1}, + ], + "nochangedmsgflag": 1, + "nochangedmsgtime": 60, + "noprintfirsttimeflag": 0, + "alias": { + "psu1": "PSU1", + "psu2": "PSU2", + "psu3": "PSU3", + "psu4": "PSU4" + } + } +} + +REBOOT_CAUSE_PARA = { + "reboot_cause_list": [ + { + "name": "cold_reboot", + "monitor_point": {"gettype":"devfile", "path":"/dev/cpld1", "offset":0x1d, "read_len":1, "okval":0x09}, + "record": [ + {"record_type": "file", "mode": "cover", "log": "Power Loss, ", "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"}, + {"record_type": "file", "mode": "add", "log": "Power Loss, ", "path": "/etc/sonic/.reboot/.history-reboot-cause.txt"} + ] + }, + { + "name": "wdt_reboot", + "monitor_point": {"gettype":"devfile", "path":"/dev/cpld1", "offset":0x1d, "read_len":1, "okval":0x05}, + "record": [ + {"record_type": "file", "mode": "cover", "log": "Watchdog, ", "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"}, + {"record_type": "file", "mode": "add", "log": "Watchdog, ", "path": "/etc/sonic/.reboot/.history-reboot-cause.txt"} + ], + }, + { + "name": "bmc_reboot", + "monitor_point": {"gettype":"devfile", "path":"/dev/cpld1", "offset":0x1d, "read_len":1, "okval":0x06}, + "record": [ + {"record_type": "file", "mode": "cover", "log": "BMC reboot, ", "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"}, + {"record_type": "file", "mode": "add", "log": "BMC reboot, ", "path": "/etc/sonic/.reboot/.history-reboot-cause.txt"} + ], + }, + { + "name": "cpu_reboot", + "monitor_point": {"gettype":"devfile", "path":"/dev/cpld1", "offset":0x1d, "read_len":1, "okval":[0x03, 0x04]}, + "record": [ + {"record_type": "file", "mode":"cover", "log":"CPU reboot, ", "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"}, + {"record_type": "file", "mode": "add", "log": "CPU reboot, ", "path": "/etc/sonic/.reboot/.history-reboot-cause.txt"} + ], + }, + { + "name": "bmc_powerdown", + "monitor_point": {"gettype":"devfile", "path":"/dev/cpld1", "offset":0x1d, "read_len":1, "okval":[0x02, 0x07, 0x0a]}, + "record": [ + {"record_type": "file", "mode": "cover", "log": "BMC powerdown, ", "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"}, + {"record_type": "file", "mode": "add", "log": "BMC powerdown, ", "path": "/etc/sonic/.reboot/.history-reboot-cause.txt"} + ], + }, + { + "name": "otp_switch_reboot", + "monitor_point": {"gettype": "file_exist", "judge_file": "/etc/.otp_switch_reboot_flag", "okval": True}, + "record": [ + {"record_type": "file", "mode": "cover", "log": "Thermal Overload: ASIC, ", "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"}, + {"record_type": "file", "mode": "add", "log": "Thermal Overload: ASIC, ", "path": "/etc/sonic/.reboot/.history-reboot-cause.txt"} + ], + "finish_operation": [ + {"gettype": "cmd", "cmd": "rm -rf /etc/.otp_switch_reboot_flag"}, + ] + }, + { + "name": "otp_other_reboot", + "monitor_point": {"gettype": "file_exist", "judge_file": "/etc/.otp_other_reboot_flag", "okval": True}, + "record": [ + {"record_type": "file", "mode": "cover", "log": "Thermal Overload: Other, ", "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"}, + {"record_type": "file", "mode": "add", "log": "Thermal Overload: Other, ", "path": "/etc/sonic/.reboot/.history-reboot-cause.txt"} + ], + "finish_operation": [ + {"gettype": "cmd", "cmd": "rm -rf /etc/.otp_other_reboot_flag"}, + ] + }, + ], + "other_reboot_cause_record": [ + {"record_type": "file", "mode": "cover", "log": "Other, ", "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"}, + {"record_type": "file", "mode": "add", "log": "Other, ", "path": "/etc/sonic/.reboot/.history-reboot-cause.txt"} + ], +} + +##################### MAC Voltage adjust#################################### +MAC_DEFAULT_PARAM = [ + { + "name": "MAC_CORE_V", # AVS name + "type": 1, # 1: used default value, if rov value not in range. 0: do nothing, if rov value not in range + "default" : 0x8a, + "rov_source": 0, # 0: get rov value from cpld, 1: get rov value from SDK + # bsc unsupport, use default value 725000 + "cpld_avs": {"loc": "/sys/bus/i2c/devices/131-0044/hwmon/hwmon*/avs1", "gettype": "sysfs"}, + "set_avs": { + "loc": "/sys/bus/i2c/devices/136-0060/hwmon/hwmon*/avs0_vout", + "gettype": "sysfs", "formula": "int((%f)*1000000)" + }, + "mac_avs_param": { + 0x8c : 0.794245, + 0x8a : 0.851800, + 0x88 : 0.864700, + 0x86 : 0.877600, + 0x84 : 0.83898, + 0x82 : 0.851795, + 0x80 : 0.864745, + }, + }, + { + "name": "MAC_PT0_VDDC_V", # AVS name + "type": 1, # 1: used default value, if rov value not in range. 0: do nothing, if rov value not in range + "default" : 0x8e, + "rov_source": 0, # 0: get rov value from cpld, 1: get rov value from SDK + # bsc unsupport, use default value 725000 + "cpld_avs": {"loc": "/sys/bus/i2c/devices/131-0044/hwmon/hwmon*/avs2", "gettype": "sysfs"}, + "set_avs": { + "loc": "/sys/bus/i2c/devices/107-0060/hwmon/hwmon*/avs0_vout", + "gettype": "sysfs", "formula": "int((%f)*1000000)" + }, + "mac_avs_param": { + 0x92 : 0.7000, + 0x90 : 0.7125, + 0x8e : 0.7250, + 0x8c : 0.7375, + 0x8a : 0.7500, + 0x88 : 0.7625, + 0x86 : 0.7750, + 0x84 : 0.7875, + 0x82 : 0.8000, + 0x80 : 0.8125, + }, + }, + { + "name": "MAC_PT1_VDDC_V", # AVS name + "type": 1, # 1: used default value, if rov value not in range. 0: do nothing, if rov value not in range + "default" : 0x8e, + "rov_source": 0, # 0: get rov value from cpld, 1: get rov value from SDK + # bsc unsupport, use default value 725000 + "cpld_avs": {"loc": "/sys/bus/i2c/devices/131-0044/hwmon/hwmon*/avs3", "gettype": "sysfs"}, + "set_avs": { + "loc": "/sys/bus/i2c/devices/107-0060/hwmon/hwmon*/avs1_vout", + "gettype": "sysfs", "formula": "int((%f)*1000000)" + }, + "mac_avs_param": { + 0x92 : 0.7000, + 0x90 : 0.7125, + 0x8e : 0.7250, + 0x8c : 0.7375, + 0x8a : 0.7500, + 0x88 : 0.7625, + 0x86 : 0.7750, + 0x84 : 0.7875, + 0x82 : 0.8000, + 0x80 : 0.8125, + }, + }, + { + "name": "MAC_PT2_VDDC_V", # AVS name + "type": 1, # 1: used default value, if rov value not in range. 0: do nothing, if rov value not in range + "default" : 0x8e, + "rov_source": 0, # 0: get rov value from cpld, 1: get rov value from SDK + # bsc unsupport, use default value 725000 + "cpld_avs": {"loc": "/sys/bus/i2c/devices/131-0044/hwmon/hwmon*/avs4", "gettype": "sysfs"}, + "set_avs": { + "loc": "/sys/bus/i2c/devices/108-0060/hwmon/hwmon*/avs0_vout", + "gettype": "sysfs", "formula": "int((%f)*1000000)" + }, + "mac_avs_param": { + 0x92 : 0.7000, + 0x90 : 0.7125, + 0x8e : 0.7250, + 0x8c : 0.7375, + 0x8a : 0.7500, + 0x88 : 0.7625, + 0x86 : 0.7750, + 0x84 : 0.7875, + 0x82 : 0.8000, + 0x80 : 0.8125, + }, + }, + { + "name": "MAC_PT3_VDDC_V", # AVS name + "type": 1, # 1: used default value, if rov value not in range. 0: do nothing, if rov value not in range + "default" : 0x8e, + "rov_source": 0, # 0: get rov value from cpld, 1: get rov value from SDK + # bsc unsupport, use default value 725000 + "cpld_avs": {"loc": "/sys/bus/i2c/devices/131-0044/hwmon/hwmon*/avs5", "gettype": "sysfs"}, + "set_avs": { + "loc": "/sys/bus/i2c/devices/108-0060/hwmon/hwmon*/avs1_vout", + "gettype": "sysfs", "formula": "int((%f)*1000000)" + }, + "mac_avs_param": { + 0x92 : 0.7000, + 0x90 : 0.7125, + 0x8e : 0.7250, + 0x8c : 0.7375, + 0x8a : 0.7500, + 0x88 : 0.7625, + 0x86 : 0.7750, + 0x84 : 0.7875, + 0x82 : 0.8000, + 0x80 : 0.8125, + }, + }, + { + "name": "MAC_PT4_VDDC_V", # AVS name + "type": 1, # 1: used default value, if rov value not in range. 0: do nothing, if rov value not in range + "default" : 0x8e, + "rov_source": 0, # 0: get rov value from cpld, 1: get rov value from SDK + # bsc unsupport, use default value 725000 + "cpld_avs": {"loc": "/sys/bus/i2c/devices/131-0044/hwmon/hwmon*/avs6", "gettype": "sysfs"}, + "set_avs": { + "loc": "/sys/bus/i2c/devices/109-0060/hwmon/hwmon*/avs0_vout", + "gettype": "sysfs", "formula": "int((%f)*1000000)" + }, + "mac_avs_param": { + 0x92 : 0.7000, + 0x90 : 0.7125, + 0x8e : 0.7250, + 0x8c : 0.7375, + 0x8a : 0.7500, + 0x88 : 0.7625, + 0x86 : 0.7750, + 0x84 : 0.7875, + 0x82 : 0.8000, + 0x80 : 0.8125, + }, + }, + { + "name": "MAC_PT5_VDDC_V", # AVS name + "type": 1, # 1: used default value, if rov value not in range. 0: do nothing, if rov value not in range + "default" : 0x8e, + "rov_source": 0, # 0: get rov value from cpld, 1: get rov value from SDK + # bsc unsupport, use default value 725000 + "cpld_avs": {"loc": "/sys/bus/i2c/devices/131-0044/hwmon/hwmon*/avs7", "gettype": "sysfs"}, + "set_avs": { + "loc": "/sys/bus/i2c/devices/109-0060/hwmon/hwmon*/avs1_vout", + "gettype": "sysfs", "formula": "int((%f)*1000000)" + }, + "mac_avs_param": { + 0x92 : 0.7000, + 0x90 : 0.7125, + 0x8e : 0.7250, + 0x8c : 0.7375, + 0x8a : 0.7500, + 0x88 : 0.7625, + 0x86 : 0.7750, + 0x84 : 0.7875, + 0x82 : 0.8000, + 0x80 : 0.8125, + }, + }, + { + "name": "MAC_PT6_VDDC_V", # AVS name + "type": 1, # 1: used default value, if rov value not in range. 0: do nothing, if rov value not in range + "default" : 0x8e, + "rov_source": 0, # 0: get rov value from cpld, 1: get rov value from SDK + # bsc unsupport, use default value 725000 + "cpld_avs": {"loc": "/sys/bus/i2c/devices/131-0044/hwmon/hwmon*/avs8", "gettype": "sysfs"}, + "set_avs": { + "loc": "/sys/bus/i2c/devices/110-0060/hwmon/hwmon*/avs0_vout", + "gettype": "sysfs", "formula": "int((%f)*1000000)" + }, + "mac_avs_param": { + 0x92 : 0.7000, + 0x90 : 0.7125, + 0x8e : 0.7250, + 0x8c : 0.7375, + 0x8a : 0.7500, + 0x88 : 0.7625, + 0x86 : 0.7750, + 0x84 : 0.7875, + 0x82 : 0.8000, + 0x80 : 0.8125, + }, + }, + { + "name": "MAC_PT7_VDDC_V", # AVS name + "type": 1, # 1: used default value, if rov value not in range. 0: do nothing, if rov value not in range + "default" : 0x8e, + "rov_source": 0, # 0: get rov value from cpld, 1: get rov value from SDK + # bsc unsupport, use default value 725000 + "cpld_avs": {"loc": "/sys/bus/i2c/devices/131-0044/hwmon/hwmon*/avs9", "gettype": "sysfs"}, + "set_avs": { + "loc": "/sys/bus/i2c/devices/110-0060/hwmon/hwmon*/avs1_vout", + "gettype": "sysfs", "formula": "int((%f)*1000000)" + }, + "mac_avs_param": { + 0x92 : 0.7000, + 0x90 : 0.7125, + 0x8e : 0.7250, + 0x8c : 0.7375, + 0x8a : 0.7500, + 0x88 : 0.7625, + 0x86 : 0.7750, + 0x84 : 0.7875, + 0x82 : 0.8000, + 0x80 : 0.8125, + }, + }, +] + +DRIVERLISTS = [ + {"name": "wb_ixgbe", "delay": 0, "removable": 0}, + {"name": "ice", "delay": 0, "removable": 0}, + {"name": "i2c_dev", "delay": 0}, + {"name": "wb_i2c_designware_core", "delay": 0}, + {"name": "wb_i2c_designware_platform sda_fall_ns=320 scl_fall_ns=1006 bus_freq_hz=100000", "delay": 0}, + # {"name": "i2c_algo_bit", "delay": 0}, + # {"name": "i2c_gpio", "delay": 0}, + {"name": "i2c_mux", "delay": 0}, + # {"name": "wb_i2c_gpio_device gpio_sda=116 gpio_scl=115 gpio_chip_name=AMDI0030:00 bus_num=2", "delay": 0}, + {"name": "i2c_piix4", "delay": 0.1}, + {"name": "platform_common dfd_my_type=0x414e", "delay": 0}, + {"name": "wb_logic_dev_common", "delay":0}, + {"name": "wb_fpga_pcie", "delay": 0}, + {"name": "wb_pcie_dev", "delay": 0}, + {"name": "wb_pcie_dev_device", "delay": 0}, + {"name": "wb_spi_gpio", "delay": 0}, + {"name": "wb_spi_gpio_device_cpld", "delay": 0}, + #{"name": "wb_io_dev", "delay": 0}, + #{"name": "wb_io_dev_device", "delay": 0}, + {"name": "wb_i2c_dev", "delay": 0}, + {"name": "wb_spi_dev", "delay": 0}, + {"name": "wb_spi_dev_device", "delay": 0.1}, + # {"name": "wb_indirect_dev", "delay": 0}, + {"name": "wb_fpga_i2c_bus_drv", "delay": 0}, + {"name": "wb_fpga_i2c_bus_device", "delay": 0}, + {"name": "wb_i2c_mux_pca954x", "delay": 0}, + {"name": "wb_i2c_mux_pca954x_device", "delay": 0}, + {"name": "wb_fpga_pca954x_drv", "delay": 0}, + {"name": "wb_fpga_pca954x_device", "delay": 0}, + {"name": "wb_i2c_dev_device", "delay": 0}, + # {"name": "wb_indirect_dev_device", "delay": 0}, + {"name": "wb_cpld_i2c_bus_device", "delay": 0.1}, + {"name": "wb_cpld_pca954x_device", "delay": 0}, + { + "init": [ + # disable mdio to avoid 81349 mdio error + {"path":"/dev/cpld1", "offset":0x41, "value":0x0, "gettype":"devfile"}, + ], + "name": "mdio_bitbang", "delay": 0 + }, + {"name": "mdio_gpio", "delay": 0}, + {"name": "wb_mdio_gpio_device gpio_mdc=131 gpio_mdio=132 gpio_chip_name=AMDI0030:00","delay": 0.1}, + {"name": "wb_wdt", "delay": 0}, + {"name": "wb_wdt_device", "delay": 0}, + #{"name": "wb_eeprom_93xx46", "delay": 0}, + {"name": "lm75", "delay": 0}, + {"name": "tmp401", "delay": 0}, + {"name": "ads7828", "delay": 0}, + {"name": "wb_rc32312", "delay": 0}, + {"name": "optoe", "delay": 0}, + {"name": "at24", "delay": 0}, + {"name": "pmbus_core", "delay": 0}, + {"name": "wb_csu550", "delay": 0}, + {"name": "ucd9000", "delay": 0}, + {"name": "wb_ucd9081", "delay": 0}, + {"name": "xdpe12284", "delay": 0}, + {"name": "wb_xdpe132g5c_pmbus", "delay":0}, + {"name": "isl68137", "delay": 0}, + {"name": "wb_xdpe132g5c", "delay": 0}, + {"name": "wb_vr_common", "delay": 0}, + {"name": "wb_vr_common_dev_device", "delay": 0}, + #{"name": "firmware_driver_cpld", "delay": 0}, + #{"name": "firmware_driver_ispvme", "delay": 0}, + #{"name": "firmware_driver_sysfs", "delay": 0}, + #{"name": "wb_firmware_upgrade_device", "delay": 0}, + {"name": "hw_test", "delay": 0}, + {"name": "s3ip_sysfs", "delay": 0}, + {"name": "wb_switch_driver", "delay": 0}, + {"name": "syseeprom_device_driver", "delay": 0}, + {"name": "fan_device_driver", "delay": 0}, + {"name": "cpld_device_driver", "delay": 0}, + {"name": "sysled_device_driver", "delay": 0}, + {"name": "psu_device_driver", "delay": 0}, + {"name": "transceiver_device_driver", "delay": 0}, + {"name": "temp_sensor_device_driver", "delay": 0}, + {"name": "vol_sensor_device_driver", "delay": 0}, + #{"name": "curr_sensor_device_driver", "delay": 0}, + {"name": "fpga_device_driver", "delay": 0}, + {"name": "wb_mdio_dev", "delay": 0}, + {"name": "wb_switch_dev", "delay": 0}, + {"name": "wb_switch_dev_device", "delay": 0}, + +] + +DEVICE = [ + # CPU & MGMT board + {"name": "24c02", "bus": 1, "loc": 0x56}, + {"name": "24c02", "bus": 1, "loc": 0x57}, + {"name": "24c02", "bus": 51, "loc": 0x57}, + {"name": "ucd90160", "bus": 53, "loc": 0x5b}, + {"name": "lm75", "bus": 54, "loc": 0x4a}, # TMP1075DR + {"name": "ucd90160", "bus": 54, "loc": 0x5f}, + {"name": "lm75", "bus": 55, "loc": 0x4b}, # CT75 + {"name": "lm75", "bus": 56, "loc": 0x4b}, # CT75 + {"name": "ucd90160", "bus": 57, "loc": 0x68}, + {"name": "ads7828", "bus": 60, "loc": 0x48}, + # psu + {"name": "24c02", "bus": 67, "loc": 0x50}, + {"name": "wb_fsp1200", "bus": 67, "loc": 0x58}, + {"name": "24c02", "bus": 68, "loc": 0x50}, + {"name": "wb_fsp1200", "bus": 68, "loc": 0x58}, + {"name": "24c02", "bus": 69, "loc": 0x50}, + {"name": "wb_fsp1200", "bus": 69, "loc": 0x58}, + {"name": "24c02", "bus": 70, "loc": 0x50}, + {"name": "wb_fsp1200", "bus": 70, "loc": 0x58}, + # fcb + {"name": "lm75", "bus": 76, "loc": 0x4b}, # CT75 + {"name": "24c64", "bus": 77, "loc": 0x50}, + {"name": "24c64", "bus": 78, "loc": 0x50}, + {"name": "24c64", "bus": 79, "loc": 0x50}, + {"name": "24c64", "bus": 80, "loc": 0x50}, + {"name": "lm75", "bus": 84, "loc": 0x4b}, # CT75 + {"name": "24c64", "bus": 85, "loc": 0x50}, + {"name": "24c64", "bus": 86, "loc": 0x50}, + {"name": "24c64", "bus": 87, "loc": 0x50}, + {"name": "24c64", "bus": 88, "loc": 0x50}, + # uport + {"name": "24c02", "bus": 91, "loc": 0x57}, + {"name": "ucd90160", "bus": 92, "loc": 0x5b}, + {"name": "lm75", "bus": 93, "loc": 0x4b}, # CT75 + # dport + {"name": "24c02", "bus": 99, "loc": 0x57}, + {"name": "ucd90160", "bus": 100, "loc": 0x5b}, + {"name": "lm75", "bus": 101, "loc": 0x4b}, # CT75 + # mac board + {"name": "lm75", "bus": 123, "loc": 0x4b}, # CT75 + {"name": "lm75", "bus": 124, "loc": 0x4f}, # CT75 + {"name": "ucd90160", "bus": 128, "loc": 0x5b}, + {"name": "ucd90160", "bus": 129, "loc": 0x5b}, + {"name": "ucd90160", "bus": 130, "loc": 0x5b}, + {"name": "wb_mac_bsc_th6", "bus": 131, "loc": 0x44}, + {"name": "wb_rc32312", "bus": 134, "loc": 0x09}, + {"name": "wb_rc32312", "bus": 135, "loc": 0x09}, +] + +OPTOE = [ + {"name": "optoe3", "startbus": 201, "endbus": 328}, + {"name": "optoe1", "startbus": 329, "endbus": 329}, + {"name": "optoe2", "startbus": 330, "endbus": 330}, +] + +INIT_PARAM_PRE = [ + # MAC_CORE min and max value + # {"loc": "136-0060/hwmon/hwmon*/avs0_vout_min", "value": "747100", "gettype": "sysfs"}, + # {"loc": "136-0060/hwmon/hwmon*/avs0_vout_max", "value": "828900", "gettype": "sysfs"}, + # {"loc": "136-0060/hwmon/hwmon*/avs0_vout_min", "value": "600000", "gettype": "sysfs"}, + # {"loc": "136-0060/hwmon/hwmon*/avs0_vout_max", "value": "900000", "gettype": "sysfs"}, + # {"loc": "107-0060/hwmon/hwmon*/avs0_vout_min", "value": "600000", "gettype": "sysfs"}, + # {"loc": "107-0060/hwmon/hwmon*/avs0_vout_max", "value": "900000", "gettype": "sysfs"}, + # {"loc": "108-0060/hwmon/hwmon*/avs0_vout_min", "value": "600000", "gettype": "sysfs"}, + # {"loc": "108-0060/hwmon/hwmon*/avs0_vout_max", "value": "900000", "gettype": "sysfs"}, + # {"loc": "109-0060/hwmon/hwmon*/avs0_vout_min", "value": "600000", "gettype": "sysfs"}, + # {"loc": "109-0060/hwmon/hwmon*/avs0_vout_max", "value": "900000", "gettype": "sysfs"}, + # {"loc": "110-0060/hwmon/hwmon*/avs0_vout_min", "value": "600000", "gettype": "sysfs"}, + # {"loc": "110-0060/hwmon/hwmon*/avs0_vout_max", "value": "900000", "gettype": "sysfs"}, + # {"loc": "107-0060/hwmon/hwmon*/avs1_vout_min", "value": "600000", "gettype": "sysfs"}, + # {"loc": "107-0060/hwmon/hwmon*/avs1_vout_max", "value": "900000", "gettype": "sysfs"}, + # {"loc": "108-0060/hwmon/hwmon*/avs1_vout_min", "value": "600000", "gettype": "sysfs"}, + # {"loc": "108-0060/hwmon/hwmon*/avs1_vout_max", "value": "900000", "gettype": "sysfs"}, + # {"loc": "109-0060/hwmon/hwmon*/avs1_vout_min", "value": "600000", "gettype": "sysfs"}, + # {"loc": "109-0060/hwmon/hwmon*/avs1_vout_max", "value": "900000", "gettype": "sysfs"}, + # {"loc": "110-0060/hwmon/hwmon*/avs1_vout_min", "value": "600000", "gettype": "sysfs"}, + # {"loc": "110-0060/hwmon/hwmon*/avs1_vout_max", "value": "900000", "gettype": "sysfs"}, +] + +INIT_COMMAND = [ + # UPORT OSFP_VDD3V3 EN + "dfd_debug sysfs_data_wr /dev/cpld5 0x23 0xdd", + "dfd_debug sysfs_data_wr /dev/cpld5 0x24 0xdb", + "dfd_debug sysfs_data_wr /dev/cpld5 0x25 0xdb", + "dfd_debug sysfs_data_wr /dev/cpld5 0x26 0xd9", + "dfd_debug sysfs_data_wr /dev/cpld5 0x27 0xd9", + "dfd_debug sysfs_data_wr /dev/cpld5 0x28 0xd7", + "dfd_debug sysfs_data_wr /dev/cpld5 0x29 0xd7", + "dfd_debug sysfs_data_wr /dev/cpld5 0x2a 0xd5", + + # MAC OSFP_VDD3V3 EN + "dfd_debug sysfs_data_wr /dev/cpld4 0x30 0xcf", + "dfd_debug sysfs_data_wr /dev/cpld4 0x31 0xcf", + "dfd_debug sysfs_data_wr /dev/cpld4 0x32 0xcd", + "dfd_debug sysfs_data_wr /dev/cpld4 0x33 0xcd", + "dfd_debug sysfs_data_wr /dev/cpld4 0x34 0xcb", + "dfd_debug sysfs_data_wr /dev/cpld4 0x35 0xcb", + "dfd_debug sysfs_data_wr /dev/cpld4 0x36 0xc9", + "dfd_debug sysfs_data_wr /dev/cpld4 0x37 0xc9", + "dfd_debug sysfs_data_wr /dev/cpld4 0x38 0xc7", + "dfd_debug sysfs_data_wr /dev/cpld4 0x39 0xc7", + "dfd_debug sysfs_data_wr /dev/cpld4 0x3a 0xc5", + "dfd_debug sysfs_data_wr /dev/cpld4 0x3b 0xc5", + "dfd_debug sysfs_data_wr /dev/cpld4 0x3c 0xc3", + "dfd_debug sysfs_data_wr /dev/cpld4 0x3d 0xc3", + "dfd_debug sysfs_data_wr /dev/cpld4 0x3e 0xc1", + "dfd_debug sysfs_data_wr /dev/cpld4 0x3f 0xc1", + # DPORT OSFP_VDD3V3 EN + "dfd_debug sysfs_data_wr /dev/cpld6 0x23 0xdd", + "dfd_debug sysfs_data_wr /dev/cpld6 0x24 0xdb", + "dfd_debug sysfs_data_wr /dev/cpld6 0x25 0xdb", + "dfd_debug sysfs_data_wr /dev/cpld6 0x26 0xd9", + "dfd_debug sysfs_data_wr /dev/cpld6 0x27 0xd9", + "dfd_debug sysfs_data_wr /dev/cpld6 0x28 0xd7", + "dfd_debug sysfs_data_wr /dev/cpld6 0x29 0xd7", + "dfd_debug sysfs_data_wr /dev/cpld6 0x2a 0xd5", + # UPORT efuse en + "dfd_debug sysfs_data_wr /dev/fpga1 0x58 0xff 0xff 0xff 0xff", + # MAC efuse EN + "dfd_debug sysfs_data_wr /dev/cpld9 0x20 0xDF", + "dfd_debug sysfs_data_wr /dev/cpld9 0x21 0xDF", + "dfd_debug sysfs_data_wr /dev/cpld9 0x22 0xDD", + "dfd_debug sysfs_data_wr /dev/cpld9 0x23 0xDD", + "dfd_debug sysfs_data_wr /dev/cpld9 0x24 0xDB", + "dfd_debug sysfs_data_wr /dev/cpld9 0x25 0xDB", + "dfd_debug sysfs_data_wr /dev/cpld9 0x26 0xD9", + "dfd_debug sysfs_data_wr /dev/cpld9 0x27 0xD9", + "dfd_debug sysfs_data_wr /dev/cpld9 0x28 0xD7", + "dfd_debug sysfs_data_wr /dev/cpld9 0x29 0xD7", + "dfd_debug sysfs_data_wr /dev/cpld9 0x2A 0xD5", + "dfd_debug sysfs_data_wr /dev/cpld9 0x2B 0xD5", + "dfd_debug sysfs_data_wr /dev/cpld9 0x2C 0xD3", + "dfd_debug sysfs_data_wr /dev/cpld9 0x2D 0xD3", + "dfd_debug sysfs_data_wr /dev/cpld9 0x2E 0xD1", + "dfd_debug sysfs_data_wr /dev/cpld9 0x2F 0xD1", + "dfd_debug sysfs_data_wr /dev/cpld9 0x30 0xCF", + "dfd_debug sysfs_data_wr /dev/cpld9 0x31 0xCF", + "dfd_debug sysfs_data_wr /dev/cpld9 0x32 0xCD", + "dfd_debug sysfs_data_wr /dev/cpld9 0x33 0xCD", + "dfd_debug sysfs_data_wr /dev/cpld9 0x34 0xCB", + "dfd_debug sysfs_data_wr /dev/cpld9 0x35 0xCB", + "dfd_debug sysfs_data_wr /dev/cpld9 0x36 0xC9", + "dfd_debug sysfs_data_wr /dev/cpld9 0x37 0xC9", + "dfd_debug sysfs_data_wr /dev/cpld9 0x38 0xC7", + "dfd_debug sysfs_data_wr /dev/cpld9 0x39 0xC7", + "dfd_debug sysfs_data_wr /dev/cpld9 0x3A 0xC5", + "dfd_debug sysfs_data_wr /dev/cpld9 0x3B 0xC5", + "dfd_debug sysfs_data_wr /dev/cpld9 0x3C 0xC3", + "dfd_debug sysfs_data_wr /dev/cpld9 0x3D 0xC3", + "dfd_debug sysfs_data_wr /dev/cpld9 0x3E 0xC1", + "dfd_debug sysfs_data_wr /dev/cpld9 0x3F 0xC1", + "dfd_debug sysfs_data_wr /dev/cpld9 0x40 0xBF", + "dfd_debug sysfs_data_wr /dev/cpld9 0x41 0xBF", + "dfd_debug sysfs_data_wr /dev/cpld9 0x42 0xBD", + "dfd_debug sysfs_data_wr /dev/cpld9 0x43 0xBD", + "dfd_debug sysfs_data_wr /dev/cpld9 0x44 0xBB", + "dfd_debug sysfs_data_wr /dev/cpld9 0x45 0xBB", + "dfd_debug sysfs_data_wr /dev/cpld9 0x46 0xB9", + "dfd_debug sysfs_data_wr /dev/cpld9 0x47 0xB9", + "dfd_debug sysfs_data_wr /dev/cpld9 0x48 0xB7", + "dfd_debug sysfs_data_wr /dev/cpld9 0x49 0xB7", + "dfd_debug sysfs_data_wr /dev/cpld9 0x4A 0xB5", + "dfd_debug sysfs_data_wr /dev/cpld9 0x4B 0xB5", + "dfd_debug sysfs_data_wr /dev/cpld9 0x4C 0xB3", + "dfd_debug sysfs_data_wr /dev/cpld9 0x4D 0xB3", + "dfd_debug sysfs_data_wr /dev/cpld9 0x4E 0xB1", + "dfd_debug sysfs_data_wr /dev/cpld9 0x4F 0xB1", + "dfd_debug sysfs_data_wr /dev/cpld9 0x50 0xAF", + "dfd_debug sysfs_data_wr /dev/cpld9 0x51 0xAF", + "dfd_debug sysfs_data_wr /dev/cpld9 0x52 0xAD", + "dfd_debug sysfs_data_wr /dev/cpld9 0x53 0xAD", + "dfd_debug sysfs_data_wr /dev/cpld9 0x54 0xAB", + "dfd_debug sysfs_data_wr /dev/cpld9 0x55 0xAB", + "dfd_debug sysfs_data_wr /dev/cpld9 0x56 0xA9", + "dfd_debug sysfs_data_wr /dev/cpld9 0x57 0xA9", + "dfd_debug sysfs_data_wr /dev/cpld9 0x58 0xA7", + "dfd_debug sysfs_data_wr /dev/cpld9 0x59 0xA7", + "dfd_debug sysfs_data_wr /dev/cpld9 0x5A 0xA5", + "dfd_debug sysfs_data_wr /dev/cpld9 0x5B 0xA5", + "dfd_debug sysfs_data_wr /dev/cpld9 0x5C 0xA3", + "dfd_debug sysfs_data_wr /dev/cpld9 0x5D 0xA3", + "dfd_debug sysfs_data_wr /dev/cpld9 0x5E 0xA1", + "dfd_debug sysfs_data_wr /dev/cpld9 0x5F 0xA1", + # DOORT efuse en + "dfd_debug sysfs_data_wr /dev/fpga2 0x58 0xff 0xff 0xff 0xff", + # Enable port129 power + "dfd_debug sysfs_data_wr /dev/cpld1 0x5d 0xa3", + # saphy bcm81394 mdio access enable + "dfd_debug sysfs_data_wr /dev/cpld1 0x41 0x03", + # write CPU_READY to release sys led control + "dfd_debug sysfs_data_wr /dev/cpld1 0x8f 0x01", +] + +UPGRADE_SUMMARY = { + "devtype": 0x414e, + + "slot0": { + "subtype": 0, + "VME": { + "chain1": { + "name": "CPU_CPLD", + "is_support_warm_upg": 0, + "init_cmd": [ + {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x9d, "value": 0xa5}, + ], + "finish_cmd": [ + {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x9d, "value": 0xa4}, + ], + }, + "chain2": { + "name": "MGMT_CPLD", + "is_support_warm_upg": 0, + "init_cmd": [ + {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x9d, "value": 0xa5}, + ], + "finish_cmd": [ + {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x9d, "value": 0xa4}, + ], + }, + "chain3": { + "name": "MAC_CPLD_AB", + "is_support_warm_upg": 0, + "init_cmd": [ + {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x9d, "value": 0xa5}, + ], + "finish_cmd": [ + {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x9d, "value": 0xa4}, + ], + }, + "chain4": { + "name": "MAC_CPLD_C", + "is_support_warm_upg": 0, + "init_cmd": [ + {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x9d, "value": 0xa5}, + ], + "finish_cmd": [ + {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x9d, "value": 0xa4}, + ], + }, + "chain5": { + "name": "UPORT_CPLD", + "is_support_warm_upg": 0, + "init_cmd": [ + {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x9d, "value": 0xa5}, + ], + "finish_cmd": [ + {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x9d, "value": 0xa4}, + ], + }, + "chain6": { + "name": "DPORT_CPLD", + "is_support_warm_upg": 0, + "init_cmd": [ + {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x9d, "value": 0xa5}, + ], + "finish_cmd": [ + {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x9d, "value": 0xa4}, + ], + }, + "chain7": { + "name": "UFAN_CPLD", + "is_support_warm_upg": 0, + "init_cmd": [ + {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x9d, "value": 0xa5}, + ], + "finish_cmd": [ + {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x9d, "value": 0xa4}, + ], + }, + "chain8": { + "name": "DFAN_CPLD", + "is_support_warm_upg": 0, + "init_cmd": [ + {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x9d, "value": 0xa5}, + ], + "finish_cmd": [ + {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x9d, "value": 0xa4}, + ], + }, + "chain9": { + "name": "MAC_CPLD_D", + "is_support_warm_upg": 0, + "init_cmd": [ + {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x9d, "value": 0xa5}, + ], + "finish_cmd": [ + {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x9d, "value": 0xa4}, + ], + }, + }, + + "SPI-LOGIC-DEV": { + "chain1": { + "name": "MAC_FPGA", + "is_support_warm_upg": 0, + }, + "chain2": { + "name": "MAC_FPGA_SHAOPIAN", + "is_support_warm_upg": 0, + }, + "chain3": { + "name": "UPORT_FPGA", + "is_support_warm_upg": 0, + }, + "chain4": { + "name": "UPORT_FPGA_SHAOPIAN", + "is_support_warm_upg": 0, + }, + "chain5": { + "name": "DPORT_FPGA", + "is_support_warm_upg": 0, + }, + "chain6": { + "name": "DPORT_FPGA_SHAOPIAN", + "is_support_warm_upg": 0, + }, + }, + + "SYSFS": { + "chain8": { + "name": "BCM53134", + "is_support_warm_upg": 0, + "init_cmd": [ + # {"cmd": "modprobe wb_spi_gpio", "gettype": "cmd"}, + {"cmd": "modprobe wb_spi_gpio_device sck=7 mosi=5 miso=6 cs=8 bus=0 gpio_chip_name=AMDI0030:00", "gettype": "cmd"}, + {"cmd": "modprobe wb_spi_93xx46 eeprom_name=gt93c56a", "gettype": "cmd", "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x9d, "value": 0xa5}, + ], + "finish_cmd": [ + {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x9d, "value": 0xa4}, + {"cmd": "rmmod wb_spi_93xx46", "gettype": "cmd"}, + {"cmd": "rmmod wb_spi_gpio_device", "gettype": "cmd"}, + # {"cmd": "rmmod wb_spi_gpio", "gettype": "cmd", "delay": 0.1}, + ], + }, + }, + + #"BASH": { + # "chain1": { + # "name": "SATA", + # "upgrade_way": UPGRADE_BY_HDPARM, + # "dev_name": "sda", + # }, + #}, + + "TEST": { + "fpga": [ + {"chain": 1, "file": "/etc/.upgrade_test/mac_fpga_test_header.bin", "display_name": "MAC_FPGA"}, + {"chain": 3, "file": "/etc/.upgrade_test/uport_fpga_test_header.bin", "display_name": "UPORT_FPGA"}, + {"chain": 5, "file": "/etc/.upgrade_test/dport_fpga_test_header.bin", "display_name": "DPORT_FPGA"}, + ], + "cpld": [ + {"chain": 1, "file": "/etc/.upgrade_test/cpu_cpld_test_header.vme", "display_name": "CPU_CPLD"}, + {"chain": 2, "file": "/etc/.upgrade_test/mgmt_cpld_test_header.vme", "display_name": "MGMT_CPLD"}, + {"chain": 3, "file": "/etc/.upgrade_test/mac_cpldab_test_header.vme", "display_name": "MAC_CPLD_AB"}, + {"chain": 4, "file": "/etc/.upgrade_test/mac_cpldc_test_header.vme", "display_name": "MAC_CPLD_C"}, + {"chain": 5, "file": "/etc/.upgrade_test/uport_cpld_test_header.vme", "display_name": "UPORT_CPLD"}, + {"chain": 6, "file": "/etc/.upgrade_test/dport_cpld_test_header.vme", "display_name": "DPORT_CPLD"}, + {"chain": 7, "file": "/etc/.upgrade_test/ufan_cpld_test_header.vme", "display_name": "UFAN_CPLD"}, + {"chain": 8, "file": "/etc/.upgrade_test/dfan_cpld_test_header.vme", "display_name": "DFAN_CPLD"}, + {"chain": 9, "file": "/etc/.upgrade_test/mac_cpldd_test_header.vme", "display_name": "MAC_CPLD_D"}, + ], + }, + }, +} + +PLATFORM_E2_CONF = { + "fan": [ + {"name": "fan1", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/77-0050/eeprom"}, + {"name": "fan2", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/85-0050/eeprom"}, + {"name": "fan3", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/78-0050/eeprom"}, + {"name": "fan4", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/86-0050/eeprom"}, + {"name": "fan5", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/79-0050/eeprom"}, + {"name": "fan6", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/87-0050/eeprom"}, + {"name": "fan7", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/80-0050/eeprom"}, + {"name": "fan8", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/88-0050/eeprom"}, + ], + "psu": [ + {"name": "psu1", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/67-0050/eeprom"}, + {"name": "psu2", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/68-0050/eeprom"}, + {"name": "psu3", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/69-0050/eeprom"}, + {"name": "psu4", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/70-0050/eeprom"}, + ], + "syseeprom": [ + {"name": "syseeprom", "e2_type": "onie_tlv", "e2_path": "/sys/bus/i2c/devices/1-0056/eeprom"}, + ], + "mgmt": [ + {"name": "MGMT card", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/51-0057/eeprom"}, + ], + "uport": [ + {"name": "Uport board", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/91-0057/eeprom"}, + ], + "dport": [ + {"name": "Dport board", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/99-0057/eeprom"}, + ], + "mac": [ + {"name": "MAC board", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/1-0057/eeprom"}, + ], +} + +AIR_FLOW_CONF = { +} + +# DFX_XDPE_MONITOR_INFO = { +# "device_list": [ +# { +# "name": "wb_isl69260", +# "loc": "70-0070", +# "page": [0, 1], +# }, +# { +# "name": "wb_isl69260", +# "loc": "70-006e", +# "page": [0, 1], +# }, +# { +# "name": "wb_isl69260", +# "loc": "70-005e", +# "page": [0, 1], +# }, +# { +# "name": "wb_isl69260", +# "loc": "70-0068", +# "page": [0, 1], +# }, +# { +# "name": "wb_xdpe1a2g5b", +# "loc": "85-0060", +# "page": [0, 1], +# }, +# { +# "name": "wb_xdpe12284c", +# "loc": "86-0062", +# "page": [0, 1], +# }, +# { +# "name": "wb_xdpe12284c", +# "loc": "87-0062", +# "page": [0, 1], +# }, +# { +# "name": "wb_xdpe12284c", +# "loc": "88-0060", +# "page": [0, 1], +# }, +# { +# "name": "wb_xdpe12284c", +# "loc": "89-0060", +# "page": [0, 1], +# }, +# { +# "name": "wb_xdpe12284c", +# "loc": "90-0060", +# "page": [0, 1], +# }, +# { +# "name": "wb_xdpe12284c", +# "loc": "91-0060", +# "page": [0, 1], +# }, +# { +# "name": "wb_xdpe12284c", +# "loc": "92-0060", +# "page": [0, 1], +# }, +# { +# "name": "wb_xdpe12284c", +# "loc": "93-0062", +# "page": [0, 1], +# }, +# { +# "name": "wb_xdpe12284c", +# "loc": "94-0062", +# "page": [0, 1], +# }, +# { +# "name": "wb_xdpe12284c", +# "loc": "95-0060", +# "page": [0, 1], +# }, +# { +# "name": "wb_xdpe12284c", +# "loc": "96-0074", +# "page": [0, 1], +# }, +# { +# "name": "wb_xdpe12284c", +# "loc": "97-0074", +# "page": [0, 1], +# }, +# { +# "name": "wb_xdpe12284c", +# "loc": "98-0074", +# "page": [0, 1], +# }, +# ] +# } + +MGMT_LED_CONFIG = { + "interval": 3, + "mgmt_led_list": [ + { + "name": "sfp_phy", + "link_path": "/sys/logic_dev/sfp_phy/link_status", + "led_path": "/sys/s3ip/sysled/lan_led_status", + }, + ] +} diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/config/x86_64_micas_m2_w6950_128oc_r0_port_config.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/config/x86_64_micas_m2_w6950_128oc_r0_port_config.py new file mode 100644 index 00000000000..4f727afc8a2 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/config/x86_64_micas_m2_w6950_128oc_r0_port_config.py @@ -0,0 +1,6 @@ +#!/usr/bin/env python_nos +# -*- coding: UTF-8 -*- +PLATFORM_INTF_OPTOE = { + "port_num": 129, + "optoe_start_bus": 201, +} diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/hal-config/x86_64_micas_m2_w6950_128oc_r0_device.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/hal-config/x86_64_micas_m2_w6950_128oc_r0_device.py new file mode 100644 index 00000000000..1a31793f43a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/hal-config/x86_64_micas_m2_w6950_128oc_r0_device.py @@ -0,0 +1,1079 @@ +#!/usr/bin/env python_nos + +psutypedecode = { + 0x00: 'N/A', + 0x01: 'AC', + 0x02: 'DC', +} + +psu_fan_airflow = { + "intake": ['CRPS2700D2','AP-CA3200F12DT'], + "exhaust": [] +} + +fanairflow = { + "intake": ['FAN80-04H-F'], + "exhaust": [], +} + + +s3ip_led_decode = { + "red flash": 0x07, "red": 0x03, "green flash": 0x05, "green": 0x01, + "amber flash": 0x06, "amber": 0x02, "off": 0, "mask": 0x0ff +} + +class Unit: + Temperature = "C" + Voltage = "V" + Current = "A" + Power = "W" + Speed = "RPM" + + +class threshold: + PSU_TEMP_MIN = -20 * 1000 + PSU_TEMP_MAX = 65 * 1000 + + PSU_FAN_SPEED_MIN = 1000 + PSU_FAN_SPEED_MAX = 37000 + PSU_A_FAN_SPEED_MAX = 39000 + + PSU_OUTPUT_VOLTAGE_MIN = 11 * 1000 + PSU_OUTPUT_VOLTAGE_MAX = 13 * 1000 + + PSU_AC_INPUT_VOLTAGE_MIN = 90 * 1000 + PSU_AC_INPUT_VOLTAGE_MAX = 264 * 1000 + + PSU_DC_INPUT_VOLTAGE_MIN = 180 * 1000 + PSU_DC_INPUT_VOLTAGE_MAX = 320 * 1000 + + ERR_VALUE = -9999999 + + PSU_OUTPUT_POWER_MIN = 0* 1000 * 1000 + PSU_OUTPUT_POWER_MAX = 3000 * 1000 * 1000 + + PSU_INPUT_POWER_MIN = 0 * 1000 * 1000 + PSU_INPUT_POWER_MAX = 3100* 1000 * 1000 + + PSU_OUTPUT_CURRENT_MIN = 0 * 1000 + PSU_OUTPUT_CURRENT_MAX = 246 * 1000 + + PSU_INPUT_CURRENT_MIN = 0 * 1000 + PSU_INPUT_CURRENT_MAX = 20 * 1000 + + FRONT_FAN_SPEED_MAX = 18000 + REAR_FAN_SPEED_MAX = 16000 + FAN_SPEED_MIN = 3200 + + +devices = { + "sensor_print_src": "s3ip", + + "dcdc_data_source": [ + { + "path": "/sys/s3ip/vol_sensor", + "type": "vol", + "Unit": Unit.Voltage, + "read_times": 3, + }, + { + "path": "/sys/s3ip/curr_sensor", + "type": "curr", + "Unit": Unit.Current, + "read_times": 3, + }, + ], + "temp_data_source": [ + { + "path": "/sys/s3ip/temp_sensor", + "type": "temp", + "Unit": Unit.Temperature, + }, + ], + + "onie_e2": [ + { + "name": "ONIE_E2", + "e2loc": {"loc": "/sys/bus/i2c/devices/1-0056/eeprom", "way": "sysfs"}, + "airflow": "intake" + }, + ], + "psus": [ + { + "e2loc": {"loc": "/sys/bus/i2c/devices/67-0050/eeprom", "way": "sysfs"}, + "psu_sn": {"loc": "/sys/s3ip/psu/psu1/serial_number", "way": "sysfs"}, + "psu_hw": {"loc": "/sys/s3ip/psu/psu1/hardware_version", "way": "sysfs"}, + "psu_pn": {"loc": "/sys/s3ip/psu/psu1/part_number", "way": "sysfs"}, + "psu_vendor": {"loc": "/sys/s3ip/psu/psu1/vendor", "way": "sysfs"}, + "pmbusloc": {"bus": 67, "addr": 0x58, "way": "i2c"}, + "present": {"loc": "/sys/s3ip/psu/psu1/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "name": "PSU1", + "airflow": psu_fan_airflow, + "TempStatus": {"bus": 67, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0004}, + "Temperature": { + "value": {"loc": "/sys/s3ip/psu/psu1/temp1/value", "way": "sysfs"}, + "Min": threshold.PSU_TEMP_MIN, + "Max": threshold.PSU_TEMP_MAX, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + }, + "FanStatus": {"bus": 67, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0400}, + "FanSpeed": { + "value": {"loc": "/sys/s3ip/psu/psu1/fan_speed", "way": "sysfs"}, + "Min": threshold.PSU_FAN_SPEED_MIN, + "Max": threshold.PSU_FAN_SPEED_MAX, + "Unit": Unit.Speed + }, + "psu_fan_tolerance": 40, + "InputsStatus": {"bus": 67, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x2000}, + "InputsType": {"bus": 67, "addr": 0x58, "offset": 0x80, "way": "i2c", 'psutypedecode': psutypedecode}, + "InputsVoltage": { + 'DC': { + "value": {"loc": "/sys/s3ip/psu/psu1/in_vol", "way": "sysfs"}, + "Min": threshold.PSU_DC_INPUT_VOLTAGE_MIN, + "Max": threshold.PSU_DC_INPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + }, + 'other': { + "value": {"loc": "/sys/s3ip/psu/psu1/in_vol", "way": "sysfs"}, + "Min": threshold.ERR_VALUE, + "Max": threshold.ERR_VALUE, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + } + }, + "InputsCurrent": { + "value": {"loc": "/sys/s3ip/psu/psu1/in_curr", "way": "sysfs"}, + "Min": threshold.PSU_INPUT_CURRENT_MIN, + "Max": threshold.PSU_INPUT_CURRENT_MAX, + "Unit": Unit.Current, + "format": "float(float(%s)/1000)" + }, + "InputsPower": { + "value": {"loc": "/sys/s3ip/psu/psu1/in_power", "way": "sysfs"}, + "Min": threshold.PSU_INPUT_POWER_MIN, + "Max": threshold.PSU_INPUT_POWER_MAX, + "Unit": Unit.Power, + "format": "float(float(%s)/1000000)" + }, + "OutputsStatus": {"bus": 67, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x8800}, + "OutputsVoltage": { + "value": {"loc": "/sys/s3ip/psu/psu1/out_vol", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_VOLTAGE_MIN, + "Max": threshold.PSU_OUTPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + }, + "OutputsCurrent": { + "value": {"loc": "/sys/s3ip/psu/psu1/out_curr", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_CURRENT_MIN, + "Max": threshold.PSU_OUTPUT_CURRENT_MAX, + "Unit": Unit.Current, + "format": "float(float(%s)/1000)" + }, + "OutputsPower": { + "value": {"loc": "/sys/s3ip/psu/psu1/out_power", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_POWER_MIN, + "Max": threshold.PSU_OUTPUT_POWER_MAX, + "Unit": Unit.Power, + "format": "float(float(%s)/1000000)" + } + }, + { + "e2loc": {"loc": "/sys/bus/i2c/devices/68-0050/eeprom", "way": "sysfs"}, + "psu_sn": {"loc": "/sys/s3ip/psu/psu2/serial_number", "way": "sysfs"}, + "psu_hw": {"loc": "/sys/s3ip/psu/psu2/hardware_version", "way": "sysfs"}, + "psu_pn": {"loc": "/sys/s3ip/psu/psu2/part_number", "way": "sysfs"}, + "psu_vendor": {"loc": "/sys/s3ip/psu/psu2/vendor", "way": "sysfs"}, + "pmbusloc": {"bus": 68, "addr": 0x58, "way": "i2c"}, + "present": {"loc": "/sys/s3ip/psu/psu2/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "name": "PSU2", + "airflow": psu_fan_airflow, + "TempStatus": {"bus": 68, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0004}, + "Temperature": { + "value": {"loc": "/sys/s3ip/psu/psu2/temp1/value", "way": "sysfs"}, + "Min": threshold.PSU_TEMP_MIN, + "Max": threshold.PSU_TEMP_MAX, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + }, + "FanStatus": {"bus": 68, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0400}, + "FanSpeed": { + "value": {"loc": "/sys/s3ip/psu/psu2/fan_speed", "way": "sysfs"}, + "Min": threshold.PSU_FAN_SPEED_MIN, + "Max": threshold.PSU_FAN_SPEED_MAX, + "Unit": Unit.Speed + }, + "psu_fan_tolerance": 40, + "InputsStatus": {"bus": 68, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x2000}, + "InputsType": {"bus": 68, "addr": 0x58, "offset": 0x80, "way": "i2c", 'psutypedecode': psutypedecode}, + "InputsVoltage": { + 'DC': { + "value": {"loc": "/sys/s3ip/psu/psu2/in_vol", "way": "sysfs"}, + "Min": threshold.PSU_DC_INPUT_VOLTAGE_MIN, + "Max": threshold.PSU_DC_INPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + }, + 'other': { + "value": {"loc": "/sys/s3ip/psu/psu2/in_vol", "way": "sysfs"}, + "Min": threshold.ERR_VALUE, + "Max": threshold.ERR_VALUE, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + } + }, + "InputsCurrent": { + "value": {"loc": "/sys/s3ip/psu/psu2/in_curr", "way": "sysfs"}, + "Min": threshold.PSU_INPUT_CURRENT_MIN, + "Max": threshold.PSU_INPUT_CURRENT_MAX, + "Unit": Unit.Current, + "format": "float(float(%s)/1000)" + }, + "InputsPower": { + "value": {"loc": "/sys/s3ip/psu/psu2/in_power", "way": "sysfs"}, + "Min": threshold.PSU_INPUT_POWER_MIN, + "Max": threshold.PSU_INPUT_POWER_MAX, + "Unit": Unit.Power, + "format": "float(float(%s)/1000000)" + }, + "OutputsStatus": {"bus": 68, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x8800}, + "OutputsVoltage": { + "value": {"loc": "/sys/s3ip/psu/psu2/out_vol", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_VOLTAGE_MIN, + "Max": threshold.PSU_OUTPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + }, + "OutputsCurrent": { + "value": {"loc": "/sys/s3ip/psu/psu2/out_curr", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_CURRENT_MIN, + "Max": threshold.PSU_OUTPUT_CURRENT_MAX, + "Unit": Unit.Current, + "format": "float(float(%s)/1000)" + }, + "OutputsPower": { + "value": {"loc": "/sys/s3ip/psu/psu2/out_power", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_POWER_MIN, + "Max": threshold.PSU_OUTPUT_POWER_MAX, + "Unit": Unit.Power, + "format": "float(float(%s)/1000000)" + } + }, + { + "e2loc": {"loc": "/sys/bus/i2c/devices/69-0050/eeprom", "way": "sysfs"}, + "psu_sn": {"loc": "/sys/s3ip/psu/psu3/serial_number", "way": "sysfs"}, + "psu_hw": {"loc": "/sys/s3ip/psu/psu3/hardware_version", "way": "sysfs"}, + "psu_pn": {"loc": "/sys/s3ip/psu/psu3/part_number", "way": "sysfs"}, + "psu_vendor": {"loc": "/sys/s3ip/psu/psu3/vendor", "way": "sysfs"}, + "pmbusloc": {"bus": 69, "addr": 0x58, "way": "i2c"}, + "present": {"loc": "/sys/s3ip/psu/psu3/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "name": "PSU3", + "airflow": psu_fan_airflow, + "TempStatus": {"bus": 69, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0004}, + "Temperature": { + "value": {"loc": "/sys/s3ip/psu/psu3/temp1/value", "way": "sysfs"}, + "Min": threshold.PSU_TEMP_MIN, + "Max": threshold.PSU_TEMP_MAX, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + }, + "FanStatus": {"bus": 69, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0400}, + "FanSpeed": { + "value": {"loc": "/sys/s3ip/psu/psu3/fan_speed", "way": "sysfs"}, + "Min": threshold.PSU_FAN_SPEED_MIN, + "Max": threshold.PSU_FAN_SPEED_MAX, + "Unit": Unit.Speed + }, + "psu_fan_tolerance": 40, + "InputsStatus": {"bus": 69, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x2000}, + "InputsType": {"bus": 69, "addr": 0x58, "offset": 0x80, "way": "i2c", 'psutypedecode': psutypedecode}, + "InputsVoltage": { + 'DC': { + "value": {"loc": "/sys/s3ip/psu/psu3/in_vol", "way": "sysfs"}, + "Min": threshold.PSU_DC_INPUT_VOLTAGE_MIN, + "Max": threshold.PSU_DC_INPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + }, + 'other': { + "value": {"loc": "/sys/s3ip/psu/psu3/in_vol", "way": "sysfs"}, + "Min": threshold.ERR_VALUE, + "Max": threshold.ERR_VALUE, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + } + }, + "InputsCurrent": { + "value": {"loc": "/sys/s3ip/psu/psu3/in_curr", "way": "sysfs"}, + "Min": threshold.PSU_INPUT_CURRENT_MIN, + "Max": threshold.PSU_INPUT_CURRENT_MAX, + "Unit": Unit.Current, + "format": "float(float(%s)/1000)" + }, + "InputsPower": { + "value": {"loc": "/sys/s3ip/psu/psu3/in_power", "way": "sysfs"}, + "Min": threshold.PSU_INPUT_POWER_MIN, + "Max": threshold.PSU_INPUT_POWER_MAX, + "Unit": Unit.Power, + "format": "float(float(%s)/1000000)" + }, + "OutputsStatus": {"bus": 69, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x8800}, + "OutputsVoltage": { + "value": {"loc": "/sys/s3ip/psu/psu3/out_vol", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_VOLTAGE_MIN, + "Max": threshold.PSU_OUTPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + }, + "OutputsCurrent": { + "value": {"loc": "/sys/s3ip/psu/psu3/out_curr", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_CURRENT_MIN, + "Max": threshold.PSU_OUTPUT_CURRENT_MAX, + "Unit": Unit.Current, + "format": "float(float(%s)/1000)" + }, + "OutputsPower": { + "value": {"loc": "/sys/s3ip/psu/psu3/out_power", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_POWER_MIN, + "Max": threshold.PSU_OUTPUT_POWER_MAX, + "Unit": Unit.Power, + "format": "float(float(%s)/1000000)" + } + }, + { + "e2loc": {"loc": "/sys/bus/i2c/devices/70-0050/eeprom", "way": "sysfs"}, + "psu_sn": {"loc": "/sys/s3ip/psu/psu4/serial_number", "way": "sysfs"}, + "psu_hw": {"loc": "/sys/s3ip/psu/psu4/hardware_version", "way": "sysfs"}, + "psu_pn": {"loc": "/sys/s3ip/psu/psu4/part_number", "way": "sysfs"}, + "psu_vendor": {"loc": "/sys/s3ip/psu/psu4/vendor", "way": "sysfs"}, + "pmbusloc": {"bus": 70, "addr": 0x58, "way": "i2c"}, + "present": {"loc": "/sys/s3ip/psu/psu4/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "name": "PSU4", + "airflow": psu_fan_airflow, + "TempStatus": {"bus": 70, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0004}, + "Temperature": { + "value": {"loc": "/sys/s3ip/psu/psu4/temp1/value", "way": "sysfs"}, + "Min": threshold.PSU_TEMP_MIN, + "Max": threshold.PSU_TEMP_MAX, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + }, + "FanStatus": {"bus": 70, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0400}, + "FanSpeed": { + "value": {"loc": "/sys/s3ip/psu/psu4/fan_speed", "way": "sysfs"}, + "Min": threshold.PSU_FAN_SPEED_MIN, + "Max": threshold.PSU_FAN_SPEED_MAX, + "Unit": Unit.Speed + }, + "psu_fan_tolerance": 40, + "InputsStatus": {"bus": 70, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x2000}, + "InputsType": {"bus": 70, "addr": 0x58, "offset": 0x80, "way": "i2c", 'psutypedecode': psutypedecode}, + "InputsVoltage": { + 'DC': { + "value": {"loc": "/sys/s3ip/psu/psu4/in_vol", "way": "sysfs"}, + "Min": threshold.PSU_DC_INPUT_VOLTAGE_MIN, + "Max": threshold.PSU_DC_INPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + }, + 'other': { + "value": {"loc": "/sys/s3ip/psu/psu4/in_vol", "way": "sysfs"}, + "Min": threshold.ERR_VALUE, + "Max": threshold.ERR_VALUE, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + } + }, + "InputsCurrent": { + "value": {"loc": "/sys/s3ip/psu/psu4/in_curr", "way": "sysfs"}, + "Min": threshold.PSU_INPUT_CURRENT_MIN, + "Max": threshold.PSU_INPUT_CURRENT_MAX, + "Unit": Unit.Current, + "format": "float(float(%s)/1000)" + }, + "InputsPower": { + "value": {"loc": "/sys/s3ip/psu/psu4/in_power", "way": "sysfs"}, + "Min": threshold.PSU_INPUT_POWER_MIN, + "Max": threshold.PSU_INPUT_POWER_MAX, + "Unit": Unit.Power, + "format": "float(float(%s)/1000000)" + }, + "OutputsStatus": {"bus": 70, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x8800}, + "OutputsVoltage": { + "value": {"loc": "/sys/s3ip/psu/psu4/out_vol", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_VOLTAGE_MIN, + "Max": threshold.PSU_OUTPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + }, + "OutputsCurrent": { + "value": {"loc": "/sys/s3ip/psu/psu4/out_curr", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_CURRENT_MIN, + "Max": threshold.PSU_OUTPUT_CURRENT_MAX, + "Unit": Unit.Current, + "format": "float(float(%s)/1000)" + }, + "OutputsPower": { + "value": {"loc": "/sys/s3ip/psu/psu4/out_power", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_POWER_MIN, + "Max": threshold.PSU_OUTPUT_POWER_MAX, + "Unit": Unit.Power, + "format": "float(float(%s)/1000000)" + } + } + ], + "temps": [ + { + "name": "CPU_TEMP", + "temp_id": "TEMP1", + "api_name": "CPU", + "Temperature": { + "value": {"loc": "/sys/s3ip/temp_sensor/temp11/value", "way": "sysfs"}, + "Min": -30000, + "Low": -20000, + "High": 90000, + "Max": 95000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "INLET_TEMP", + "temp_id": "TEMP2", + "api_name": "Inlet", + "Temperature": { + "value": {"loc": "/sys/s3ip/temp_sensor/temp2/value", "way": "sysfs"}, + "Min": -30000, + "Low": -20000, + "High": 60000, + "Max": 70000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "OUTLET_TEMP", + "temp_id": "TEMP3", + "api_name": "Outlet", + "Temperature": { + "value": [ + {"loc": "/sys/s3ip/temp_sensor/temp3/value", "way": "sysfs"}, + {"loc": "/sys/s3ip/temp_sensor/temp4/value", "way": "sysfs"}, + ], + "Min": -30000, + "Low": -20000, + "High": 70000, + "Max": 75000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "SWITCH_TEMP", + "temp_id": "TEMP4", + "api_name": "ASIC_TEMP", + "Temperature": { + "value": {"loc": "/sys/s3ip/temp_sensor/temp13/value", "way": "sysfs"}, + "Min": -30000, + "Low": -20000, + "High": 100000, + "Max": 105000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + }, + "invalid": -100000, + "error": -99999, + }, + { + "name": "MOS_TEMP", + "temp_id": "TEMP5", + "Temperature": { + "value": [ + {"loc": "/sys/s3ip/temp_sensor/temp14/value", "way": "sysfs"}, + {"loc": "/sys/s3ip/temp_sensor/temp15/value", "way": "sysfs"}, + {"loc": "/sys/s3ip/temp_sensor/temp16/value", "way": "sysfs"}, + {"loc": "/sys/s3ip/temp_sensor/temp17/value", "way": "sysfs"}, + {"loc": "/sys/s3ip/temp_sensor/temp18/value", "way": "sysfs"}, + {"loc": "/sys/s3ip/temp_sensor/temp19/value", "way": "sysfs"}, + {"loc": "/sys/s3ip/temp_sensor/temp20/value", "way": "sysfs"}, + {"loc": "/sys/s3ip/temp_sensor/temp21/value", "way": "sysfs"}, + {"loc": "/sys/s3ip/temp_sensor/temp22/value", "way": "sysfs"}, + {"loc": "/sys/s3ip/temp_sensor/temp23/value", "way": "sysfs"}, + {"loc": "/sys/s3ip/temp_sensor/temp24/value", "way": "sysfs"}, + {"loc": "/sys/s3ip/temp_sensor/temp25/value", "way": "sysfs"}, + {"loc": "/sys/s3ip/temp_sensor/temp26/value", "way": "sysfs"}, + {"loc": "/sys/s3ip/temp_sensor/temp27/value", "way": "sysfs"}, + {"loc": "/sys/s3ip/temp_sensor/temp28/value", "way": "sysfs"}, + {"loc": "/sys/s3ip/temp_sensor/temp29/value", "way": "sysfs"}, + {"loc": "/sys/s3ip/temp_sensor/temp30/value", "way": "sysfs"}, + {"loc": "/sys/s3ip/temp_sensor/temp31/value", "way": "sysfs"}, + {"loc": "/sys/s3ip/temp_sensor/temp32/value", "way": "sysfs"}, + {"loc": "/sys/s3ip/temp_sensor/temp33/value", "way": "sysfs"}, + {"loc": "/sys/s3ip/temp_sensor/temp34/value", "way": "sysfs"}, + {"loc": "/sys/s3ip/temp_sensor/temp35/value", "way": "sysfs"}, + {"loc": "/sys/s3ip/temp_sensor/temp36/value", "way": "sysfs"}, + {"loc": "/sys/s3ip/temp_sensor/temp37/value", "way": "sysfs"}, + {"loc": "/sys/s3ip/temp_sensor/temp38/value", "way": "sysfs"}, + {"loc": "/sys/s3ip/temp_sensor/temp39/value", "way": "sysfs"}, + {"loc": "/sys/s3ip/temp_sensor/temp40/value", "way": "sysfs"}, + {"loc": "/sys/s3ip/temp_sensor/temp41/value", "way": "sysfs"}, + {"loc": "/sys/s3ip/temp_sensor/temp42/value", "way": "sysfs"}, + {"loc": "/sys/s3ip/temp_sensor/temp43/value", "way": "sysfs"}, + {"loc": "/sys/s3ip/temp_sensor/temp44/value", "way": "sysfs"}, + {"loc": "/sys/s3ip/temp_sensor/temp45/value", "way": "sysfs"}, + {"loc": "/sys/s3ip/temp_sensor/temp46/value", "way": "sysfs"}, + {"loc": "/sys/s3ip/temp_sensor/temp47/value", "way": "sysfs"}, + {"loc": "/sys/s3ip/temp_sensor/temp48/value", "way": "sysfs"}, + {"loc": "/sys/s3ip/temp_sensor/temp49/value", "way": "sysfs"}, + {"loc": "/sys/s3ip/temp_sensor/temp50/value", "way": "sysfs"}, + {"loc": "/sys/s3ip/temp_sensor/temp51/value", "way": "sysfs"}, + {"loc": "/sys/s3ip/temp_sensor/temp52/value", "way": "sysfs"}, + {"loc": "/sys/s3ip/temp_sensor/temp53/value", "way": "sysfs"}, + {"loc": "/sys/s3ip/temp_sensor/temp54/value", "way": "sysfs"}, + {"loc": "/sys/s3ip/temp_sensor/temp55/value", "way": "sysfs"}, + {"loc": "/sys/s3ip/temp_sensor/temp56/value", "way": "sysfs"}, + {"loc": "/sys/s3ip/temp_sensor/temp57/value", "way": "sysfs"}, + {"loc": "/sys/s3ip/temp_sensor/temp58/value", "way": "sysfs"}, + {"loc": "/sys/s3ip/temp_sensor/temp59/value", "way": "sysfs"}, + {"loc": "/sys/s3ip/temp_sensor/temp60/value", "way": "sysfs"}, + {"loc": "/sys/s3ip/temp_sensor/temp61/value", "way": "sysfs"}, + {"loc": "/sys/s3ip/temp_sensor/temp62/value", "way": "sysfs"}, + ], + "Min": -30000, + "Low": -20000, + "High": 110000, + "Max": 125000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "BOARD_TEMP", + "temp_id": "TEMP6", + "Temperature": { + "value": {"loc": "/sys/s3ip/temp_sensor/temp6/value", "way": "sysfs"}, + "Min": -30000, + "Low": -20000, + "High": 95000, + "Max": 105000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "SFF_TEMP", + "temp_id": "TEMP7", + "Temperature": { + "value": {"loc": "/etc/sonic/highest_sff_temp", "way": "sysfs", "flock_path": "/etc/sonic/highest_sff_temp"}, + "Min": -30000, + "Low": -20000, + "High": 80000, + "Max": 100000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + ], + "leds": [ + { + "name": "FRONT_SYS_LED", + "led_type": "SYS_LED", + "led": {"loc": "/sys/s3ip/sysled/sys_led_status", "way": "sysfs"}, + "led_attrs": s3ip_led_decode, + }, + { + "name": "FRONT_BMC_LED", + "led_type": "BMC_LED", + "led": {"loc": "/sys/s3ip/sysled/bmc_led_status", "way": "sysfs"}, + "led_attrs": s3ip_led_decode, + }, + { + "name": "FRONT_PSU_LED", + "led_type": "PSU_LED", + "led": {"loc": "/sys/s3ip/sysled/psu_led_status", "way": "sysfs"}, + "led_attrs": s3ip_led_decode, + }, + { + "name": "FRONT_FAN_LED", + "led_type": "FAN_LED", + "led": {"loc": "/sys/s3ip/sysled/fan_led_status", "way": "sysfs"}, + "led_attrs": s3ip_led_decode, + }, + ], + "fans": [ + { + "name": "FAN1", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/77-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "present": {"loc": "/sys/s3ip/fan/fan1/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"loc": "/sys/s3ip/fan/fan1/led_status", "way": "sysfs"}, + "led_attrs": s3ip_led_decode, + "PowerMax": 168, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"loc": "/dev/cpld7", "offset": 0x90, "len": 1, "way": "devfile"}, + "Running": {"loc": "/sys/s3ip/fan/fan1/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan1/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan1/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"loc": "/dev/cpld7", "offset": 0x90, "len": 1, "way": "devfile"}, + "Running": {"loc": "/sys/s3ip/fan/fan1/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan1/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan1/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN2", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/85-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "present": {"loc": "/sys/s3ip/fan/fan2/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"loc": "/sys/s3ip/fan/fan2/led_status", "way": "sysfs"}, + "led_attrs": s3ip_led_decode, + "PowerMax": 168, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"loc": "/dev/cpld8", "offset": 0x90, "len": 1, "way": "devfile"}, + "Running": {"loc": "/sys/s3ip/fan/fan2/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan2/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan2/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"loc": "/dev/cpld8", "offset": 0x90, "len": 1, "way": "devfile"}, + "Running": {"loc": "/sys/s3ip/fan/fan2/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan2/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan2/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN3", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/78-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "present": {"loc": "/sys/s3ip/fan/fan3/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"loc": "/sys/s3ip/fan/fan3/led_status", "way": "sysfs"}, + "led_attrs": s3ip_led_decode, + "PowerMax": 168, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"loc": "/dev/cpld7", "offset": 0x91, "len": 1, "way": "devfile"}, + "Running": {"loc": "/sys/s3ip/fan/fan3/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan3/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan3/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"loc": "/dev/cpld7", "offset": 0x91, "len": 1, "way": "devfile"}, + "Running": {"loc": "/sys/s3ip/fan/fan3/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan3/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan3/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN4", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/86-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "present": {"loc": "/sys/s3ip/fan/fan4/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"loc": "/sys/s3ip/fan/fan4/led_status", "way": "sysfs"}, + "led_attrs": s3ip_led_decode, + "PowerMax": 168, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"loc": "/dev/cpld8", "offset": 0x91, "len": 1, "way": "devfile"}, + "Running": {"loc": "/sys/s3ip/fan/fan4/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan4/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan4/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"loc": "/dev/cpld8", "offset": 0x91, "len": 1, "way": "devfile"}, + "Running": {"loc": "/sys/s3ip/fan/fan4/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan4/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan4/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN5", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/79-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "present": {"loc": "/sys/s3ip/fan/fan5/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"loc": "/sys/s3ip/fan/fan5/led_status", "way": "sysfs"}, + "led_attrs": s3ip_led_decode, + "PowerMax": 168, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"loc": "/dev/cpld7", "offset": 0x92, "len": 1, "way": "devfile"}, + "Running": {"loc": "/sys/s3ip/fan/fan5/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan5/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan5/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"loc": "/dev/cpld7", "offset": 0x92, "len": 1, "way": "devfile"}, + "Running": {"loc": "/sys/s3ip/fan/fan5/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan5/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan5/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN6", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/87-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "present": {"loc": "/sys/s3ip/fan/fan6/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"loc": "/sys/s3ip/fan/fan6/led_status", "way": "sysfs"}, + "led_attrs": s3ip_led_decode, + "PowerMax": 168, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"loc": "/dev/cpld8", "offset": 0x92, "len": 1, "way": "devfile"}, + "Running": {"loc": "/sys/s3ip/fan/fan6/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan6/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan6/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"loc": "/dev/cpld8", "offset": 0x92, "len": 1, "way": "devfile"}, + "Running": {"loc": "/sys/s3ip/fan/fan6/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan6/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan6/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN7", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/80-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "present": {"loc": "/sys/s3ip/fan/fan7/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"loc": "/sys/s3ip/fan/fan7/led_status", "way": "sysfs"}, + "led_attrs": s3ip_led_decode, + "PowerMax": 168, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"loc": "/dev/cpld7", "offset": 0x93, "len": 1, "way": "devfile"}, + "Running": {"loc": "/sys/s3ip/fan/fan7/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan7/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan7/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"loc": "/dev/cpld7", "offset": 0x93, "len": 1, "way": "devfile"}, + "Running": {"loc": "/sys/s3ip/fan/fan7/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan7/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan7/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN8", + "airflow": fanairflow, + "e2loc": {'loc': '/sys/bus/i2c/devices/88-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "present": {"loc": "/sys/s3ip/fan/fan8/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"loc": "/sys/s3ip/fan/fan8/led_status", "way": "sysfs"}, + "led_attrs": s3ip_led_decode, + "PowerMax": 168, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"loc": "/dev/cpld8", "offset": 0x93, "len": 1, "way": "devfile"}, + "Running": {"loc": "/sys/s3ip/fan/fan8/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan8/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan8/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"loc": "/dev/cpld8", "offset": 0x93, "len": 1, "way": "devfile"}, + "Running": {"loc": "/sys/s3ip/fan/fan8/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan8/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan8/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + } + ], + "cplds": [ + { + "name": "CPU_CPLD", + "cpld_id": "CPLD1", + "VersionFile": {"loc": "/dev/cpld0", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for system power", + "slot": 0, + "warm": 1, + }, + { + "name": "MGMT_CPLD", + "cpld_id": "CPLD2", + "VersionFile": {"loc": "/dev/cpld1", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for sff modules", + "slot": 0, + "warm": 1, + }, + { + "name": "MAC_CPLDA", + "cpld_id": "CPLD3", + "VersionFile": {"loc": "/dev/cpld2", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for sff modules", + "slot": 0, + "warm": 1, + }, + { + "name": "MAC_CPLDB", + "cpld_id": "CPLD4", + "VersionFile": {"loc": "/dev/cpld3", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for sff modules", + "slot": 0, + "warm": 1, + }, + { + "name": "MAC_CPLDC", + "cpld_id": "CPLD5", + "VersionFile": {"loc": "/dev/cpld4", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for sff modules", + "slot": 0, + "warm": 1, + }, + { + "name": "UPORT_CPLD", + "cpld_id": "CPLD6", + "VersionFile": {"loc": "/dev/cpld5", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for sff modules", + "slot": 0, + "warm": 1, + }, + { + "name": "DPORT_CPLD", + "cpld_id": "CPLD7", + "VersionFile": {"loc": "/dev/cpld6", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for sff modules", + "slot": 0, + "warm": 1, + }, + { + "name": "UFAN_CPLD", + "cpld_id": "CPLD8", + "VersionFile": {"loc": "/dev/cpld7", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for fan modules", + "slot": 0, + "warm": 1, + }, + { + "name": "DFAN_CPLD", + "cpld_id": "CPLD9", + "VersionFile": {"loc": "/dev/cpld8", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for fan modules", + "slot": 0, + "warm": 1, + }, + { + "name": "MAC_CPLDD", + "cpld_id": "CPLD10", + "VersionFile": {"loc": "/dev/cpld9", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for sff modules", + "slot": 0, + "warm": 1, + }, + { + "name": "MAC_FPGA", + "cpld_id": "CPLD11", + "VersionFile": {"loc": "/dev/fpga0", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for base functions", + "slot": 0, + "format": "little_endian", + "warm": 1, + }, + { + "name": "UPORT_FPGA", + "cpld_id": "CPLD12", + "VersionFile": {"loc": "/dev/fpga1", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for base functions", + "slot": 0, + "format": "little_endian", + "warm": 1, + }, + { + "name": "DPORT_FPGA", + "cpld_id": "CPLD13", + "VersionFile": {"loc": "/dev/fpga2", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for base functions", + "slot": 0, + "format": "little_endian", + "warm": 1, + }, + { + "name": "BIOS", + "cpld_id": "CPLD14", + "VersionFile": {"cmd": "dmidecode -s bios-version", "way": "cmd"}, + "desc": "Performs initialization of hardware components during booting", + "slot": 0, + "type": "str", + "warm": 0, + }, + ], + "cpu": [ + { + "name": "cpu", + "CpuResetCntReg": {"loc": "/dev/cpld1", "offset": 0x10, "len": 1, "way": "devfile_ascii"}, + "reboot_cause_path": "/etc/sonic/.reboot/.previous-reboot-cause.txt" + } + ], + "sfps": { + "ver": '2.0', + "port_index_start": 1, + "port_num": 129, + "log_level": 2, + "eeprom_retry_times": 5, + "eeprom_retry_break_sec": 0.2, + "presence_path": "/sys/s3ip/transceiver/eth%d/present", + "presence_val_is_present": 1, + "eeprom_path": "/sys/s3ip/transceiver/eth%d/eeprom", + "optoe_driver_path": "/sys/bus/i2c/devices/i2c-%d/%d-0050/dev_class", + "optoe_driver_key": list(range(201, 330)), + "lpmode_path": "/sys/s3ip/transceiver/eth%d/low_power_mode", + "reset_path": "/sys/s3ip/transceiver/eth%d/reset", + "reset_val_is_reset": 0, + "tx_dis_path": "/sys/s3ip/transceiver/eth%d/tx_disable", + "rx_los_path": "/sys/s3ip/transceiver/eth%d/rx_los", + "tx_fault_path": "/sys/s3ip/transceiver/eth%d/tx_fault", + } +} diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/hal-config/x86_64_micas_m2_w6950_128oc_r0_monitor.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/hal-config/x86_64_micas_m2_w6950_128oc_r0_monitor.py new file mode 100644 index 00000000000..250f76906e4 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/hal-config/x86_64_micas_m2_w6950_128oc_r0_monitor.py @@ -0,0 +1,186 @@ +# coding:utf-8 + +monitor = { + "openloop": { + "linear": { + "name": "linear", + "flag": 0, + "pwm_min": 0x66, + "pwm_max": 0xff, + "K": 11, + "tin_min": 38, + }, + "curve": { + "name": "curve", + "flag": 1, + "pwm_min": 0x66, + "pwm_max": 0xff, + "a": 0.4, + "b": -15.7, + "c": 245.3, + "tin_min": 25, + }, + }, + + "pid": { + "CPU_TEMP": { + "name": "CPU_TEMP", + "flag": 1, + "type": "duty", + "pwm_min": 0x66, + "pwm_max": 0xff, + "Kp": 0.5, + "Ki": 0.3, + "Kd": 0.3, + "target": 80, + "value": [None, None, None], + }, + "SWITCH_TEMP": { + "name": "SWITCH_TEMP", + "flag": 1, + "type": "duty", + "pwm_min": 0x66, + "pwm_max": 0xff, + "Kp": 0.5, + "Ki": 0.3, + "Kd": 0.3, + "target": 90, + "value": [None, None, None], + }, + "OUTLET_TEMP": { + "name": "OUTLET_TEMP", + "flag": 1, + "type": "duty", + "pwm_min": 0x66, + "pwm_max": 0xff, + "Kp": 0, + "Ki": 0.4, + "Kd": 0.3, + "target": 65, + "value": [None, None, None], + }, + "SFF_TEMP": { + "name": "SFF_TEMP", + "flag": 1, + "type": "duty", + "pwm_min": 0x66, + "pwm_max": 0xff, + "Kp": 2, + "Ki": 0.3, + "Kd": 0, + "target": 63, + "value": [None, None, None], + }, + "BOARD_TEMP": { + "name": "BOARD_TEMP", + "flag": 1, + "type": "duty", + "pwm_min": 0x66, + "pwm_max": 0xff, + "Kp": 2, + "Ki": 0.4, + "Kd": 0.3, + "target": 80, + "value": [None, None, None], + }, + "MOS_TEMP": { + "name": "MOS_TEMP", + "flag": 1, + "type": "duty", + "pwm_min": 0x66, + "pwm_max": 0xff, + "Kp": 1, + "Ki": 0.1, + "Kd": 0.3, + "target": 95, + "value": [None, None, None], + }, + }, + + "temps_threshold": { + "CPU_TEMP": {"name": "CPU_TEMP", "warning": 90, "critical": 95}, + "SWITCH_TEMP": {"name": "SWITCH_TEMP", "warning": 100, "critical": 105, "alert": 110, "invalid": -100000, "error": -99999}, + "INLET_TEMP": {"name": "INLET_TEMP", "warning": 60, "critical": 70}, + "OUTLET_TEMP": {"name": "OUTLET_TEMP", "warning": 70, "critical": 75}, + "BOARD_TEMP": {"name": "BOARD_TEMP", "warning": 95, "critical": 105}, + "MOS_TEMP": {"name": "MOS_TEMP", "warning": 110, "critical": 125}, + "SFF_TEMP": {"name": "SFF_TEMP", "warning": 999, "critical": 1000, "ignore_threshold": 1, "invalid": -10000, "error": -9999}, + }, + + "fancontrol_para": { + "interval": 5, + "max_pwm": 0xff, + "min_pwm": 0x66, + "abnormal_pwm": 0xff, + "warning_pwm": 0xff, + "temp_invalid_pid_pwm": 0x66, + "temp_error_pid_pwm": 0x66, + "temp_fail_num": 3, + "check_temp_fail": [ + {"temp_name": "INLET_TEMP"}, + {"temp_name": "SWITCH_TEMP"}, + {"temp_name": "CPU_TEMP"}, + {"temp_name": "OUTLET_TEMP"}, + {"temp_name": "BOARD_TEMP"}, + {"temp_name": "MOS_TEMP"}, + ], + "temp_warning_num": 3, # temp over warning 3 times continuously + "temp_critical_num": 3, # temp over critical 3 times continuously + "temp_alert_num": 1, # temp over alert 1 times continuously + "temp_warning_countdown": 60, # 5 min warning speed after not warning + "temp_critical_countdown": 60, # 5 min full speed after not critical + "rotor_error_count": 3, # fan rotor error 3 times continuously + "inlet_mac_diff": 999, + "check_crit_reboot_flag": 1, + "check_crit_reboot_num": 3, + "check_crit_sleep_time": 5, + "check_temp_critical_reboot": [ + ["SWITCH_TEMP"], + ["INLET_TEMP", "OUTLET_TEMP", "BOARD_TEMP", "CPU_TEMP", "MOS_TEMP"], + ], + "check_alert_reboot_flag": 1, + "check_alert_reboot_num": 3, + "check_alert_sleep_time": 0.05, + "check_temp_alert_reboot": [ + ["SWITCH_TEMP"], + ], + "psu_fan_control": 1, + "psu_absent_fullspeed_num": 0xFF, + "fan_absent_fullspeed_num": 3, + "rotor_error_fullspeed_num": 6, + "deal_over_temp_reboot_cmd": [ + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0x86, "value": 0x06}, + ] + }, + + "ledcontrol_para": { + "interval": 5, + "checkpsu": 0, # 1: sys led follow psu led + "checkfan": 0, # 1: sys led follow fan led + "psu_amber_num": 1, + "fan_amber_num": 1, + "bios_boot_source_check": 0, + "bmcled_ctrl": 0, + "board_sys_led": [ + {"led_name": "FRONT_SYS_LED"}, + ], + "board_psu_led": [ + {"led_name": "FRONT_PSU_LED"}, + ], + "board_fan_led": [ + {"led_name": "FRONT_FAN_LED"}, + ], + "board_bmc_led": [ + {"led_name": "FRONT_BMC_LED"}, + ], + "psu_air_flow_monitor": 0, + "fan_air_flow_monitor": 0, + "psu_air_flow_amber_num": 0, + "fan_air_flow_amber_num": 0, + }, + + "otp_reboot_judge_file": { + "otp_switch_reboot_judge_file": "/etc/.otp_switch_reboot_flag", + "otp_other_reboot_judge_file": "/etc/.otp_other_reboot_flag", + }, +} diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/modules/driver/Makefile b/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/modules/driver/Makefile new file mode 100644 index 00000000000..26bc7caa791 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/modules/driver/Makefile @@ -0,0 +1,29 @@ +MAKEFILE_FILE_PATH = $(abspath $(lastword $(MAKEFILE_LIST))) +MODULES_DIR = $(abspath $(MAKEFILE_FILE_PATH)/../../../../common/modules) +KERNEL_MODULES_DIR = $(abspath $(MAKEFILE_FILE_PATH)/../../../../common/modules) +FIRMWARE_UPGRADE_PATH = $(abspath $(MAKEFILE_FILE_PATH)/../../../../common/app/firmware_upgrade/firmware_driver/include) +BSP_PUBLIC_PATH = $(abspath $(MAKEFILE_FILE_PATH)/../../../../common/public/include) +COMMON_MODULE_SYMVERS = $(KERNEL_MODULES_DIR)/Module.symvers + +ifneq ($(wildcard $(COMMON_MODULE_SYMVERS)),) +KBUILD_EXTRA_SYMBOLS += $(COMMON_MODULE_SYMVERS) +endif + +EXTRA_CFLAGS+= -I$(BSP_PUBLIC_PATH) +EXTRA_CFLAGS+= -I$(MODULES_DIR) +EXTRA_CFLAGS+= -I$(FIRMWARE_UPGRADE_PATH) + +obj-m += wb_pcie_dev_device.o +obj-m += wb_fpga_i2c_bus_device.o +obj-m += wb_i2c_mux_pca954x_device.o +obj-m += wb_fpga_pca954x_device.o +obj-m += wb_i2c_dev_device.o +#obj-m += wb_firmware_upgrade_device.o +obj-m += wb_wdt_device.o +obj-m += wb_vr_common_dev_device.o +obj-m += wb_cpld_i2c_bus_device.o +obj-m += wb_cpld_pca954x_device.o +obj-m += wb_spi_gpio_device_cpld.o +obj-m += wb_spi_dev_device.o +obj-m += wb_switch_dev_device.o +obj-m += wb_spi_gpio.o diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/modules/driver/spi-bitbang-txrx.h b/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/modules/driver/spi-bitbang-txrx.h new file mode 100644 index 00000000000..0cab48b7875 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/modules/driver/spi-bitbang-txrx.h @@ -0,0 +1,176 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Mix this utility code with some glue code to get one of several types of + * simple SPI master driver. Two do polled word-at-a-time I/O: + * + * - GPIO/parport bitbangers. Provide chipselect() and txrx_word[](), + * expanding the per-word routines from the inline templates below. + * + * - Drivers for controllers resembling bare shift registers. Provide + * chipselect() and txrx_word[](), with custom setup()/cleanup() methods + * that use your controller's clock and chipselect registers. + * + * Some hardware works well with requests at spi_transfer scope: + * + * - Drivers leveraging smarter hardware, with fifos or DMA; or for half + * duplex (MicroWire) controllers. Provide chipselect() and txrx_bufs(), + * and custom setup()/cleanup() methods. + */ + +/* + * The code that knows what GPIO pins do what should have declared four + * functions, ideally as inlines, before including this header: + * + * void setsck(struct spi_device *, int is_on); + * void setmosi(struct spi_device *, int is_on); + * int getmiso(struct spi_device *); + * void spidelay(unsigned); + * + * setsck()'s is_on parameter is a zero/nonzero boolean. + * + * setmosi()'s is_on parameter is a zero/nonzero boolean. + * + * getmiso() is required to return 0 or 1 only. Any other value is invalid + * and will result in improper operation. + * + * A non-inlined routine would call bitbang_txrx_*() routines. The + * main loop could easily compile down to a handful of instructions, + * especially if the delay is a NOP (to run at peak speed). + * + * Since this is software, the timings may not be exactly what your board's + * chips need ... there may be several reasons you'd need to tweak timings + * in these routines, not just to make it faster or slower to match a + * particular CPU clock rate. + * + * ToDo: Maybe the bitrev macros can be used to improve the code? + */ + +static inline u32 +bitbang_txrx_be_cpha0(struct spi_device *spi, + unsigned nsecs, unsigned cpol, unsigned flags, + u32 word, u8 bits) +{ + /* if (cpol == 0) this is SPI_MODE_0; else this is SPI_MODE_2 */ + + u32 oldbit = (!(word & (1<<(bits-1)))) << 31; + /* clock starts at inactive polarity */ + for (word <<= (32 - bits); likely(bits); bits--) { + + /* setup MSB (to slave) on trailing edge */ + if ((flags & SPI_CONTROLLER_NO_TX) == 0) { + if ((word & (1 << 31)) != oldbit) { + setmosi(spi, word & (1 << 31)); + oldbit = word & (1 << 31); + } + } + spidelay(nsecs); /* T(setup) */ + + setsck(spi, !cpol); + spidelay(nsecs); + + /* sample MSB (from slave) on leading edge */ + word <<= 1; + if ((flags & SPI_CONTROLLER_NO_RX) == 0) + word |= getmiso(spi); + setsck(spi, cpol); + } + return word; +} + +static inline u32 +bitbang_txrx_be_cpha1(struct spi_device *spi, + unsigned nsecs, unsigned cpol, unsigned flags, + u32 word, u8 bits) +{ + /* if (cpol == 0) this is SPI_MODE_1; else this is SPI_MODE_3 */ + + u32 oldbit = (!(word & (1<<(bits-1)))) << 31; + /* clock starts at inactive polarity */ + for (word <<= (32 - bits); likely(bits); bits--) { + + /* setup MSB (to slave) on leading edge */ + setsck(spi, !cpol); + if ((flags & SPI_CONTROLLER_NO_TX) == 0) { + if ((word & (1 << 31)) != oldbit) { + setmosi(spi, word & (1 << 31)); + oldbit = word & (1 << 31); + } + } + spidelay(nsecs); /* T(setup) */ + + setsck(spi, cpol); + spidelay(nsecs); + + /* sample MSB (from slave) on trailing edge */ + word <<= 1; + if ((flags & SPI_CONTROLLER_NO_RX) == 0) + word |= getmiso(spi); + } + return word; +} + +static inline u32 +bitbang_txrx_le_cpha0(struct spi_device *spi, + unsigned int nsecs, unsigned int cpol, unsigned int flags, + u32 word, u8 bits) +{ + /* if (cpol == 0) this is SPI_MODE_0; else this is SPI_MODE_2 */ + + u8 rxbit = bits - 1; + u32 oldbit = !(word & 1); + /* clock starts at inactive polarity */ + for (; likely(bits); bits--) { + + /* setup LSB (to slave) on trailing edge */ + if ((flags & SPI_CONTROLLER_NO_TX) == 0) { + if ((word & 1) != oldbit) { + setmosi(spi, word & 1); + oldbit = word & 1; + } + } + spidelay(nsecs); /* T(setup) */ + + setsck(spi, !cpol); + spidelay(nsecs); + + /* sample LSB (from slave) on leading edge */ + word >>= 1; + if ((flags & SPI_CONTROLLER_NO_RX) == 0) + word |= getmiso(spi) << rxbit; + setsck(spi, cpol); + } + return word; +} + +static inline u32 +bitbang_txrx_le_cpha1(struct spi_device *spi, + unsigned int nsecs, unsigned int cpol, unsigned int flags, + u32 word, u8 bits) +{ + /* if (cpol == 0) this is SPI_MODE_1; else this is SPI_MODE_3 */ + + u8 rxbit = bits - 1; + u32 oldbit = !(word & 1); + /* clock starts at inactive polarity */ + for (; likely(bits); bits--) { + + /* setup LSB (to slave) on leading edge */ + setsck(spi, !cpol); + if ((flags & SPI_CONTROLLER_NO_TX) == 0) { + if ((word & 1) != oldbit) { + setmosi(spi, word & 1); + oldbit = word & 1; + } + } + spidelay(nsecs); /* T(setup) */ + + setsck(spi, cpol); + spidelay(nsecs); + + /* sample LSB (from slave) on trailing edge */ + word >>= 1; + if ((flags & SPI_CONTROLLER_NO_RX) == 0) + word |= getmiso(spi) << rxbit; + } + return word; +} diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/modules/driver/wb_cpld_i2c_bus_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/modules/driver/wb_cpld_i2c_bus_device.c new file mode 100644 index 00000000000..bf99e5478f6 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/modules/driver/wb_cpld_i2c_bus_device.c @@ -0,0 +1,101 @@ +#include +#include +#include +#include +#include + +#include +#include + +static int debug = 0; +module_param(debug, int, S_IRUGO | S_IWUSR); + +/* CPLD-I2C-MASTER-1 */ +static fpga_i2c_bus_device_t cpld_i2c_bus_device_data0 = { + .adap_nr = 445, + .i2c_timeout = 3000, + .i2c_scale = 0x00, + .i2c_filter = 0x04, + .i2c_stretch = 0x08, + .i2c_ext_9548_exits_flag = 0x0c, + .i2c_ext_9548_addr = 0x10, + .i2c_ext_9548_chan = 0x14, + .i2c_in_9548_chan = 0x18, + .i2c_slave = 0x1c, + .i2c_reg = 0x20, + .i2c_reg_len = 0x30, + .i2c_data_len = 0x34, + .i2c_ctrl = 0x38, + .i2c_status = 0x3c, + .i2c_err_vec = 0x48, + .i2c_data_buf = 0x100, + .i2c_data_buf_len = 256, + .dev_name = "/dev/cpld10", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 5, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x7c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +static void wb_fpga_i2c_bus_device_release(struct device *dev) +{ + return; +} + +static struct platform_device fpga_i2c_bus_device[] = { + { + .name = "wb-fpga-i2c", + .id = 45, + .dev = { + .platform_data = &cpld_i2c_bus_device_data0, + .release = wb_fpga_i2c_bus_device_release, + }, + }, +}; + +static int __init wb_fpga_i2c_bus_device_init(void) +{ + int i; + int ret = 0; + fpga_i2c_bus_device_t *fpga_i2c_bus_device_data; + + DEBUG_VERBOSE("enter!\n"); + for (i = 0; i < ARRAY_SIZE(fpga_i2c_bus_device); i++) { + fpga_i2c_bus_device_data = fpga_i2c_bus_device[i].dev.platform_data; + ret = platform_device_register(&fpga_i2c_bus_device[i]); + if (ret < 0) { + fpga_i2c_bus_device_data->device_flag = -1; /* device register failed, set flag -1 */ + printk(KERN_ERR "wb-fpga-i2c.%d register failed!\n", i + 1); + } else { + fpga_i2c_bus_device_data->device_flag = 0; /* device register suucess, set flag 0 */ + } + } + return 0; +} + +static void __exit wb_fpga_i2c_bus_device_exit(void) +{ + int i; + fpga_i2c_bus_device_t *fpga_i2c_bus_device_data; + + DEBUG_VERBOSE("enter!\n"); + for (i = ARRAY_SIZE(fpga_i2c_bus_device) - 1; i >= 0; i--) { + fpga_i2c_bus_device_data = fpga_i2c_bus_device[i].dev.platform_data; + if (fpga_i2c_bus_device_data->device_flag == 0) { /* device register success, need unregister */ + platform_device_unregister(&fpga_i2c_bus_device[i]); + } + } +} + +module_init(wb_fpga_i2c_bus_device_init); +module_exit(wb_fpga_i2c_bus_device_exit); +MODULE_DESCRIPTION("FPGA I2C Devices"); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("support"); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/modules/driver/wb_cpld_pca954x_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/modules/driver/wb_cpld_pca954x_device.c new file mode 100644 index 00000000000..534d3ebd014 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/modules/driver/wb_cpld_pca954x_device.c @@ -0,0 +1,78 @@ +#include +#include +#include +#include +#include +#include + +#include +#include + +#define FPGA_INTERNAL_PCA9548 (1) +#define FPGA_EXTERNAL_PCA9548 (2) + +static int debug = 0; +module_param(debug, int, S_IRUGO | S_IWUSR); + +static fpga_pca954x_device_t fpga_pca954x_device_data0 = { + .i2c_bus = 445, + .i2c_addr = 0x70, + .pca9548_base_nr = 329, + .fpga_9548_flag = FPGA_INTERNAL_PCA9548, + .fpga_9548_reset_flag = 0, +}; + +struct i2c_board_info fpga_pca954x_device_info[] = { + { .type = "wb_fpga_pca9548", .platform_data = &fpga_pca954x_device_data0,}, +}; + +static int __init wb_fpga_pca954x_device_init(void) +{ + int i; + struct i2c_adapter *adap; + struct i2c_client *client; + fpga_pca954x_device_t *fpga_pca954x_device_data; + + DEBUG_VERBOSE("enter!\n"); + for (i = 0; i < ARRAY_SIZE(fpga_pca954x_device_info); i++) { + fpga_pca954x_device_data = fpga_pca954x_device_info[i].platform_data; + fpga_pca954x_device_info[i].addr = fpga_pca954x_device_data->i2c_addr; + adap = i2c_get_adapter(fpga_pca954x_device_data->i2c_bus); + if (adap == NULL) { + fpga_pca954x_device_data->client = NULL; + printk(KERN_ERR "get i2c bus %d adapter fail.\n", fpga_pca954x_device_data->i2c_bus); + continue; + } + client = i2c_new_client_device(adap, &fpga_pca954x_device_info[i]); + if (IS_ERR(client)) { + fpga_pca954x_device_data->client = NULL; + printk(KERN_ERR "Failed to register fpga pca954x device %d at bus %d!\n", + fpga_pca954x_device_data->i2c_addr, fpga_pca954x_device_data->i2c_bus); + } else { + fpga_pca954x_device_data->client = client; + } + i2c_put_adapter(adap); + } + return 0; +} + +static void __exit wb_fpga_pca954x_device_exit(void) +{ + int i; + fpga_pca954x_device_t *fpga_pca954x_device_data; + + DEBUG_VERBOSE("enter!\n"); + for (i = ARRAY_SIZE(fpga_pca954x_device_info) - 1; i >= 0; i--) { + fpga_pca954x_device_data = fpga_pca954x_device_info[i].platform_data; + if (fpga_pca954x_device_data->client) { + i2c_unregister_device(fpga_pca954x_device_data->client); + fpga_pca954x_device_data->client = NULL; + } + } +} + +module_init(wb_fpga_pca954x_device_init); +module_exit(wb_fpga_pca954x_device_exit); +MODULE_DESCRIPTION("FPGA PCA954X Devices"); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("support"); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/modules/driver/wb_firmware_upgrade_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/modules/driver/wb_firmware_upgrade_device.c new file mode 100644 index 00000000000..18414536195 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/modules/driver/wb_firmware_upgrade_device.c @@ -0,0 +1,816 @@ +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define GPIO_NUM (256) /* GPIO number */ +#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 1, 0) +#define GPIO_OFFSET (GPIO_DYNAMIC_BASE) /* Formula of gpio base number in Kernel */ +#else +#define GPIO_OFFSET (ARCH_NR_GPIOS - GPIO_NUM) /* Formula of gpio base number in Kernel */ +#endif + +static int debug = 0; +module_param(debug, int, S_IRUGO | S_IWUSR); + +/* cpu cpld */ +static firmware_upgrade_device_t firmware_upgrade_device_data0 = { + .type = "JTAG", + .upg_type.jtag = { + .tdi = 5 + GPIO_OFFSET, + .tck = 7 + GPIO_OFFSET, + .tms = 8 + GPIO_OFFSET, + .tdo = 6 + GPIO_OFFSET, + }, + .chain = 1, + .chip_index = 1, + .en_gpio[0] = 84 + GPIO_OFFSET, + .en_level[0] = 1, + .en_gpio[1] = 85 + GPIO_OFFSET, + .en_level[1] = 1, + + .en_logic_dev[0] = "/dev/cpld1", + .en_logic_addr[0] = 0x54, + .en_logic_mask[0] = 0xfc, + .en_logic_en_val[0] = 0x1, + .en_logic_dis_val[0] = 0x0, + .en_logic_width[0] = 0x1, + + .en_logic_dev[1] = "/dev/cpld1", + .en_logic_addr[1] = 0x55, + .en_logic_mask[1] = 0xf8, + .en_logic_en_val[1] = 0x1, + .en_logic_dis_val[1] = 0x0, + .en_logic_width[1] = 0x1, + + .en_gpio_num = 2, + .en_logic_num = 2, +}; + +/* mgmt cpld */ +static firmware_upgrade_device_t firmware_upgrade_device_data1 = { + .type = "JTAG", + .upg_type.jtag = { + .tdi = 5 + GPIO_OFFSET, + .tck = 7 + GPIO_OFFSET, + .tms = 8 + GPIO_OFFSET, + .tdo = 6 + GPIO_OFFSET, + }, + .chain = 2, + .chip_index = 1, + .en_gpio[0] = 91 + GPIO_OFFSET, + .en_level[0] = 1, + + .en_logic_dev[0] = "/dev/cpld1", + .en_logic_addr[0] = 0x54, + .en_logic_mask[0] = 0xfc, + .en_logic_en_val[0] = 0x1, + .en_logic_dis_val[0] = 0x0, + .en_logic_width[0] = 0x1, + + .en_gpio_num = 1, + .en_logic_num = 0, +}; + +/* mac cpld a/b */ +static firmware_upgrade_device_t firmware_upgrade_device_data2 = { + .type = "JTAG", + .upg_type.jtag = { + .tdi = 5 + GPIO_OFFSET, + .tck = 7 + GPIO_OFFSET, + .tms = 8 + GPIO_OFFSET, + .tdo = 6 + GPIO_OFFSET, + }, + .chain = 3, + .chip_index = 1, + .en_gpio[0] = 84 + GPIO_OFFSET, + .en_level[0] = 1, + .en_gpio[1] = 85 + GPIO_OFFSET, + .en_level[1] = 1, + + .en_logic_dev[0] = "/dev/cpld1", + .en_logic_addr[0] = 0x54, + .en_logic_mask[0] = 0xfc, + .en_logic_en_val[0] = 0x1, + .en_logic_dis_val[0] = 0x0, + .en_logic_width[0] = 0x1, + + .en_logic_dev[1] = "/dev/cpld1", + .en_logic_addr[1] = 0x55, + .en_logic_mask[1] = 0xf8, + .en_logic_en_val[1] = 0x2, + .en_logic_dis_val[1] = 0x0, + .en_logic_width[1] = 0x1, + + .en_logic_dev[2] = "/dev/cpld1", + .en_logic_addr[2] = 0x44, + .en_logic_mask[2] = 0, + .en_logic_en_val[2] = 0xba, + .en_logic_dis_val[2] = 0xbb, + .en_logic_width[2] = 0x1, + + .en_logic_dev[3] = "/dev/cpld1", + .en_logic_addr[3] = 0x4d, + .en_logic_mask[3] = 0, + .en_logic_en_val[3] = 0xb2, + .en_logic_dis_val[3] = 0xb3, + .en_logic_width[3] = 0x1, + + .en_logic_dev[4] = "/dev/cpld4", + .en_logic_addr[4] = 0x53, + .en_logic_mask[4] = 0, + .en_logic_en_val[4] = 0xad, + .en_logic_dis_val[4] = 0xac, + .en_logic_width[4] = 0x1, + + .en_logic_dev[5] = "/dev/cpld4", + .en_logic_addr[5] = 0x54, + .en_logic_mask[5] = 0, + .en_logic_en_val[5] = 0x1, + .en_logic_dis_val[5] = 0x0, + .en_logic_width[5] = 0x1, + + .en_gpio_num = 2, + .en_logic_num = 6, +}; + +/* mac cpld c */ +static firmware_upgrade_device_t firmware_upgrade_device_data3 = { + .type = "JTAG", + .upg_type.jtag = { + .tdi = 5 + GPIO_OFFSET, + .tck = 7 + GPIO_OFFSET, + .tms = 8 + GPIO_OFFSET, + .tdo = 6 + GPIO_OFFSET, + }, + .chain = 4, + .chip_index = 1, + .en_gpio[0] = 84 + GPIO_OFFSET, + .en_level[0] = 1, + .en_gpio[1] = 85 + GPIO_OFFSET, + .en_level[1] = 1, + + .en_logic_dev[0] = "/dev/cpld1", + .en_logic_addr[0] = 0x54, + .en_logic_mask[0] = 0xfc, + .en_logic_en_val[0] = 0x1, + .en_logic_dis_val[0] = 0x0, + .en_logic_width[0] = 0x1, + + .en_logic_dev[1] = "/dev/cpld1", + .en_logic_addr[1] = 0x55, + .en_logic_mask[1] = 0xf8, + .en_logic_en_val[1] = 0x2, + .en_logic_dis_val[1] = 0x0, + .en_logic_width[1] = 0x1, + + .en_logic_dev[2] = "/dev/cpld1", + .en_logic_addr[2] = 0x43, + .en_logic_mask[2] = 0, + .en_logic_en_val[2] = 0xbc, + .en_logic_dis_val[2] = 0xbd, + .en_logic_width[2] = 0x1, + + .en_gpio_num = 2, + .en_logic_num = 3, +}; + +/* uport cpld */ +static firmware_upgrade_device_t firmware_upgrade_device_data4 = { + .type = "JTAG", + .upg_type.jtag = { + .tdi = 5 + GPIO_OFFSET, + .tck = 7 + GPIO_OFFSET, + .tms = 8 + GPIO_OFFSET, + .tdo = 6 + GPIO_OFFSET, + }, + .chain = 5, + .chip_index = 1, + .en_gpio[0] = 84 + GPIO_OFFSET, + .en_level[0] = 1, + .en_gpio[1] = 85 + GPIO_OFFSET, + .en_level[1] = 1, + + .en_logic_dev[0] = "/dev/cpld1", + .en_logic_addr[0] = 0x54, + .en_logic_mask[0] = 0xfc, + .en_logic_en_val[0] = 0x1, + .en_logic_dis_val[0] = 0x0, + .en_logic_width[0] = 0x1, + + .en_logic_dev[1] = "/dev/cpld1", + .en_logic_addr[1] = 0x55, + .en_logic_mask[1] = 0xf8, + .en_logic_en_val[1] = 0x2, + .en_logic_dis_val[1] = 0x0, + .en_logic_width[1] = 0x1, + + .en_logic_dev[2] = "/dev/cpld1", + .en_logic_addr[2] = 0x47, + .en_logic_mask[2] = 0, + .en_logic_en_val[2] = 0xb8, + .en_logic_dis_val[2] = 0xb9, + .en_logic_width[2] = 0x1, + + .en_logic_dev[3] = "/dev/cpld1", + .en_logic_addr[3] = 0x4d, + .en_logic_mask[3] = 0, + .en_logic_en_val[3] = 0xb2, + .en_logic_dis_val[3] = 0xb3, + .en_logic_width[3] = 0x1, + + .en_logic_dev[4] = "/dev/cpld4", + .en_logic_addr[4] = 0x53, + .en_logic_mask[4] = 0, + .en_logic_en_val[4] = 0xad, + .en_logic_dis_val[4] = 0xac, + .en_logic_width[4] = 0x1, + + .en_logic_dev[5] = "/dev/cpld4", + .en_logic_addr[5] = 0x54, + .en_logic_mask[5] = 0, + .en_logic_en_val[5] = 0x6, + .en_logic_dis_val[5] = 0x0, + .en_logic_width[5] = 0x1, + + .en_gpio_num = 2, + .en_logic_num = 6, +}; + +/* dport cpld */ +static firmware_upgrade_device_t firmware_upgrade_device_data5 = { + .type = "JTAG", + .upg_type.jtag = { + .tdi = 5 + GPIO_OFFSET, + .tck = 7 + GPIO_OFFSET, + .tms = 8 + GPIO_OFFSET, + .tdo = 6 + GPIO_OFFSET, + }, + .chain = 6, + .chip_index = 1, + .en_gpio[0] = 84 + GPIO_OFFSET, + .en_level[0] = 1, + .en_gpio[1] = 85 + GPIO_OFFSET, + .en_level[1] = 1, + + .en_logic_dev[0] = "/dev/cpld1", + .en_logic_addr[0] = 0x54, + .en_logic_mask[0] = 0xfc, + .en_logic_en_val[0] = 0x1, + .en_logic_dis_val[0] = 0x0, + .en_logic_width[0] = 0x1, + + .en_logic_dev[1] = "/dev/cpld1", + .en_logic_addr[1] = 0x55, + .en_logic_mask[1] = 0xf8, + .en_logic_en_val[1] = 0x2, + .en_logic_dis_val[1] = 0x0, + .en_logic_width[1] = 0x1, + + .en_logic_dev[2] = "/dev/cpld1", + .en_logic_addr[2] = 0x49, + .en_logic_mask[2] = 0, + .en_logic_en_val[2] = 0xb6, + .en_logic_dis_val[2] = 0xb7, + .en_logic_width[2] = 0x1, + + .en_logic_dev[3] = "/dev/cpld1", + .en_logic_addr[3] = 0x4d, + .en_logic_mask[3] = 0, + .en_logic_en_val[3] = 0xb2, + .en_logic_dis_val[3] = 0xb3, + .en_logic_width[3] = 0x1, + + .en_logic_dev[4] = "/dev/cpld4", + .en_logic_addr[4] = 0x53, + .en_logic_mask[4] = 0, + .en_logic_en_val[4] = 0xad, + .en_logic_dis_val[4] = 0xac, + .en_logic_width[4] = 0x1, + + .en_logic_dev[5] = "/dev/cpld4", + .en_logic_addr[5] = 0x54, + .en_logic_mask[5] = 0, + .en_logic_en_val[5] = 0x8, + .en_logic_dis_val[5] = 0x0, + .en_logic_width[5] = 0x1, + + .en_gpio_num = 2, + .en_logic_num = 6, +}; + +/* ufan cpld */ +static firmware_upgrade_device_t firmware_upgrade_device_data6 = { + .type = "JTAG", + .upg_type.jtag = { + .tdi = 5 + GPIO_OFFSET, + .tck = 7 + GPIO_OFFSET, + .tms = 8 + GPIO_OFFSET, + .tdo = 6 + GPIO_OFFSET, + }, + .chain = 7, + .chip_index = 1, + .en_gpio[0] = 84 + GPIO_OFFSET, + .en_level[0] = 1, + .en_gpio[1] = 85 + GPIO_OFFSET, + .en_level[1] = 1, + + .en_logic_dev[0] = "/dev/cpld1", + .en_logic_addr[0] = 0x54, + .en_logic_mask[0] = 0xfc, + .en_logic_en_val[0] = 0x1, + .en_logic_dis_val[0] = 0x0, + .en_logic_width[0] = 0x1, + + .en_logic_dev[1] = "/dev/cpld1", + .en_logic_addr[1] = 0x55, + .en_logic_mask[1] = 0xf8, + .en_logic_en_val[1] = 0x2, + .en_logic_dis_val[1] = 0x0, + .en_logic_width[1] = 0x1, + + .en_logic_dev[2] = "/dev/cpld1", + .en_logic_addr[2] = 0x4a, + .en_logic_mask[2] = 0, + .en_logic_en_val[2] = 0xb4, + .en_logic_dis_val[2] = 0xb5, + .en_logic_width[2] = 0x1, + + .en_logic_dev[3] = "/dev/cpld1", + .en_logic_addr[3] = 0x4d, + .en_logic_mask[3] = 0, + .en_logic_en_val[3] = 0xb2, + .en_logic_dis_val[3] = 0xb3, + .en_logic_width[3] = 0x1, + + .en_logic_dev[4] = "/dev/cpld4", + .en_logic_addr[4] = 0x53, + .en_logic_mask[4] = 0, + .en_logic_en_val[4] = 0xad, + .en_logic_dis_val[4] = 0xac, + .en_logic_width[4] = 0x1, + + .en_logic_dev[5] = "/dev/cpld4", + .en_logic_addr[5] = 0x54, + .en_logic_mask[5] = 0, + .en_logic_en_val[5] = 0x4, + .en_logic_dis_val[5] = 0x0, + .en_logic_width[5] = 0x1, + + .en_gpio_num = 2, + .en_logic_num = 6, +}; + +/* dfan cpld */ +static firmware_upgrade_device_t firmware_upgrade_device_data7 = { + .type = "JTAG", + .upg_type.jtag = { + .tdi = 5 + GPIO_OFFSET, + .tck = 7 + GPIO_OFFSET, + .tms = 8 + GPIO_OFFSET, + .tdo = 6 + GPIO_OFFSET, + }, + .chain = 8, + .chip_index = 1, + .en_gpio[0] = 84 + GPIO_OFFSET, + .en_level[0] = 1, + .en_gpio[1] = 85 + GPIO_OFFSET, + .en_level[1] = 1, + + .en_logic_dev[0] = "/dev/cpld1", + .en_logic_addr[0] = 0x54, + .en_logic_mask[0] = 0xfc, + .en_logic_en_val[0] = 0x1, + .en_logic_dis_val[0] = 0x0, + .en_logic_width[0] = 0x1, + + .en_logic_dev[1] = "/dev/cpld1", + .en_logic_addr[1] = 0x55, + .en_logic_mask[1] = 0xf8, + .en_logic_en_val[1] = 0x2, + .en_logic_dis_val[1] = 0x0, + .en_logic_width[1] = 0x1, + + .en_logic_dev[2] = "/dev/cpld1", + .en_logic_addr[2] = 0x4b, + .en_logic_mask[2] = 0, + .en_logic_en_val[2] = 0xb4, + .en_logic_dis_val[2] = 0xb5, + .en_logic_width[2] = 0x1, + + .en_logic_dev[3] = "/dev/cpld1", + .en_logic_addr[3] = 0x4d, + .en_logic_mask[3] = 0, + .en_logic_en_val[3] = 0xb2, + .en_logic_dis_val[3] = 0xb3, + .en_logic_width[3] = 0x1, + + .en_logic_dev[4] = "/dev/cpld4", + .en_logic_addr[4] = 0x53, + .en_logic_mask[4] = 0, + .en_logic_en_val[4] = 0xad, + .en_logic_dis_val[4] = 0xac, + .en_logic_width[4] = 0x1, + + .en_logic_dev[5] = "/dev/cpld4", + .en_logic_addr[5] = 0x54, + .en_logic_mask[5] = 0, + .en_logic_en_val[5] = 0x5, + .en_logic_dis_val[5] = 0x0, + .en_logic_width[5] = 0x1, + + .en_gpio_num = 2, + .en_logic_num = 6, +}; + +/* mac cpldd */ +static firmware_upgrade_device_t firmware_upgrade_device_data8 = { + .type = "JTAG", + .upg_type.jtag = { + .tdi = 5 + GPIO_OFFSET, + .tck = 7 + GPIO_OFFSET, + .tms = 8 + GPIO_OFFSET, + .tdo = 6 + GPIO_OFFSET, + }, + .chain = 9, + .chip_index = 1, + .en_gpio[0] = 84 + GPIO_OFFSET, + .en_level[0] = 1, + .en_gpio[1] = 85 + GPIO_OFFSET, + .en_level[1] = 1, + + .en_logic_dev[0] = "/dev/cpld1", + .en_logic_addr[0] = 0x54, + .en_logic_mask[0] = 0xfc, + .en_logic_en_val[0] = 0x1, + .en_logic_dis_val[0] = 0x0, + .en_logic_width[0] = 0x1, + + .en_logic_dev[1] = "/dev/cpld1", + .en_logic_addr[1] = 0x55, + .en_logic_mask[1] = 0xf8, + .en_logic_en_val[1] = 0x2, + .en_logic_dis_val[1] = 0x0, + .en_logic_width[1] = 0x1, + + .en_logic_dev[2] = "/dev/cpld1", + .en_logic_addr[2] = 0x4d, + .en_logic_mask[2] = 0, + .en_logic_en_val[2] = 0xb2, + .en_logic_dis_val[2] = 0xb3, + .en_logic_width[2] = 0x1, + + .en_logic_dev[3] = "/dev/cpld4", + .en_logic_addr[3] = 0x53, + .en_logic_mask[3] = 0, + .en_logic_en_val[3] = 0xad, + .en_logic_dis_val[3] = 0xac, + .en_logic_width[3] = 0x1, + + .en_logic_dev[4] = "/dev/cpld4", + .en_logic_addr[4] = 0x54, + .en_logic_mask[4] = 0, + .en_logic_en_val[4] = 0xa, + .en_logic_dis_val[4] = 0x0, + .en_logic_width[4] = 0x1, + + .en_gpio_num = 2, + .en_logic_num = 5, +}; + +/* mac fpga */ +static firmware_upgrade_device_t firmware_upgrade_device_data9 = { + .type = "SPI_LOGIC", + .chain = 1, + .chip_index = 1, + .upg_type.sysfs = { + .dev_name = "/dev/fpga0", + .ctrl_base = 0xa00, + .flash_base = 0x2f0000, + .test_base = 0x7F0000, + .test_size = 0x10000, + }, + .en_gpio_num = 0, + .en_logic_num = 0, +}; + +/* mac fpga shaopian */ +static firmware_upgrade_device_t firmware_upgrade_device_data10 = { + .type = "SPI_LOGIC", + .chain = 2, + .chip_index = 1, + .upg_type.sysfs = { + .dev_name = "/dev/fpga0", + .ctrl_base = 0xa00, + .flash_base = 0x0, + .test_base = 0x7F0000, + .test_size = 0x10000, + }, + .en_gpio_num = 0, + .en_logic_num = 0, +}; + +/* uport fpga */ +static firmware_upgrade_device_t firmware_upgrade_device_data11 = { + .type = "SPI_LOGIC", + .chain = 3, + .chip_index = 1, + .upg_type.sysfs = { + .dev_name = "/dev/fpga1", + .ctrl_base = 0xa00, + .flash_base = 0x2f0000, + .test_base = 0x7F0000, + .test_size = 0x10000, + }, + .en_gpio_num = 0, + .en_logic_num = 0, +}; + +/* uport fpga shaopian */ +static firmware_upgrade_device_t firmware_upgrade_device_data12 = { + .type = "SPI_LOGIC", + .chain = 4, + .chip_index = 1, + .upg_type.sysfs = { + .dev_name = "/dev/fpga1", + .ctrl_base = 0xa00, + .flash_base = 0x0, + .test_base = 0x7F0000, + .test_size = 0x10000, + }, + .en_gpio_num = 0, + .en_logic_num = 0, +}; + +/* dport fpga */ +static firmware_upgrade_device_t firmware_upgrade_device_data13 = { + .type = "SPI_LOGIC", + .chain = 5, + .chip_index = 1, + .upg_type.sysfs = { + .dev_name = "/dev/fpga2", + .ctrl_base = 0xa00, + .flash_base = 0x2f0000, + .test_base = 0x7F0000, + .test_size = 0x10000, + }, + .en_gpio_num = 0, + .en_logic_num = 0, +}; + +/* dport fpga shaopian */ +static firmware_upgrade_device_t firmware_upgrade_device_data14 = { + .type = "SPI_LOGIC", + .chain = 6, + .chip_index = 1, + .upg_type.sysfs = { + .dev_name = "/dev/fpga2", + .ctrl_base = 0xa00, + .flash_base = 0x0, + .test_base = 0x7F0000, + .test_size = 0x10000, + }, + .en_gpio_num = 0, + .en_logic_num = 0, +}; + +/* bcm53134 */ +static firmware_upgrade_device_t firmware_upgrade_device_data15 = { + .type = "SYSFS", + .chain = 8, + .chip_index = 1, + .upg_type.sysfs = { + .sysfs_name = "/sys/bus/spi/devices/spi0.0/eeprom", + }, + .en_gpio[0] = 85 + GPIO_OFFSET, + .en_level[0] = 1, + .en_gpio[1] = 84 + GPIO_OFFSET, + .en_level[1] = 1, + + .en_logic_dev[0] = "/dev/cpld1", + .en_logic_addr[0] = 0x54, + .en_logic_mask[0] = 0xfc, + .en_logic_en_val[0] = 0x1, + .en_logic_dis_val[0] = 0x0, + .en_logic_width[0] = 0x1, + + .en_logic_dev[1] = "/dev/cpld1", + .en_logic_addr[1] = 0x55, + .en_logic_mask[1] = 0xf8, + .en_logic_en_val[1] = 0x5, + .en_logic_dis_val[1] = 0x0, + .en_logic_width[1] = 0x1, + + .en_logic_dev[2] = "/dev/cpld1", + .en_logic_addr[2] = 0x4c, + .en_logic_mask[2] = 0x00, + .en_logic_en_val[2] = 0xb2, + .en_logic_dis_val[2] = 0xb3, + .en_logic_width[2] = 0x1, + + .en_gpio_num = 2, + .en_logic_num = 3, +}; + +/* MAC-PCIE */ +static firmware_upgrade_device_t firmware_upgrade_device_data16 = { + .type = "MTD_DEV", + .chain = 9, + .chip_index = 1, + .upg_type.sysfs = { + .mtd_name = "spi0.0", + .flash_base = 0, + }, + + .en_gpio_num = 0, + .en_logic_num = 0, +}; + +static void firmware_device_release(struct device *dev) +{ + return; +} + +static struct platform_device firmware_upgrade_device[] = { + { + .name = "firmware_cpld_ispvme", + .id = 1, + .dev = { + .platform_data = &firmware_upgrade_device_data0, + .release = firmware_device_release, + }, + }, + { + .name = "firmware_cpld_ispvme", + .id = 2, + .dev = { + .platform_data = &firmware_upgrade_device_data1, + .release = firmware_device_release, + }, + }, + { + .name = "firmware_cpld_ispvme", + .id = 3, + .dev = { + .platform_data = &firmware_upgrade_device_data2, + .release = firmware_device_release, + }, + }, + { + .name = "firmware_cpld_ispvme", + .id = 4, + .dev = { + .platform_data = &firmware_upgrade_device_data3, + .release = firmware_device_release, + }, + }, + { + .name = "firmware_cpld_ispvme", + .id = 5, + .dev = { + .platform_data = &firmware_upgrade_device_data4, + .release = firmware_device_release, + }, + }, + { + .name = "firmware_cpld_ispvme", + .id = 6, + .dev = { + .platform_data = &firmware_upgrade_device_data5, + .release = firmware_device_release, + }, + }, + { + .name = "firmware_cpld_ispvme", + .id = 7, + .dev = { + .platform_data = &firmware_upgrade_device_data6, + .release = firmware_device_release, + }, + }, + { + .name = "firmware_cpld_ispvme", + .id = 8, + .dev = { + .platform_data = &firmware_upgrade_device_data7, + .release = firmware_device_release, + }, + }, + { + .name = "firmware_cpld_ispvme", + .id = 9, + .dev = { + .platform_data = &firmware_upgrade_device_data8, + .release = firmware_device_release, + }, + }, + { + .name = "firmware_sysfs", + .id = 10, + .dev = { + .platform_data = &firmware_upgrade_device_data9, + .release = firmware_device_release, + }, + }, + { + .name = "firmware_sysfs", + .id = 11, + .dev = { + .platform_data = &firmware_upgrade_device_data10, + .release = firmware_device_release, + }, + }, + { + .name = "firmware_sysfs", + .id = 12, + .dev = { + .platform_data = &firmware_upgrade_device_data11, + .release = firmware_device_release, + }, + }, + { + .name = "firmware_sysfs", + .id = 13, + .dev = { + .platform_data = &firmware_upgrade_device_data12, + .release = firmware_device_release, + }, + }, + { + .name = "firmware_sysfs", + .id = 14, + .dev = { + .platform_data = &firmware_upgrade_device_data13, + .release = firmware_device_release, + }, + }, + { + .name = "firmware_sysfs", + .id = 15, + .dev = { + .platform_data = &firmware_upgrade_device_data14, + .release = firmware_device_release, + }, + }, + { + .name = "firmware_sysfs", + .id = 16, + .dev = { + .platform_data = &firmware_upgrade_device_data15, + .release = firmware_device_release, + }, + }, + { + .name = "firmware_sysfs", + .id = 17, + .dev = { + .platform_data = &firmware_upgrade_device_data16, + .release = firmware_device_release, + }, + }, +}; + +static int __init firmware_upgrade_device_init(void) +{ + int i; + int ret = 0; + firmware_upgrade_device_t *firmware_upgrade_device_data; + + DEBUG_VERBOSE("enter!\n"); + for (i = 0; i < ARRAY_SIZE(firmware_upgrade_device); i++) { + firmware_upgrade_device_data = firmware_upgrade_device[i].dev.platform_data; + ret = platform_device_register(&firmware_upgrade_device[i]); + if (ret < 0) { + firmware_upgrade_device_data->device_flag = -1; /* device register failed, set flag -1 */ + printk(KERN_ERR "firmware_upgrade_device id%d register failed!\n", i + 1); + } else { + firmware_upgrade_device_data->device_flag = 0; /* device register suucess, set flag 0 */ + } + } + return 0; +} + +static void __exit firmware_upgrade_device_exit(void) +{ + int i; + firmware_upgrade_device_t *firmware_upgrade_device_data; + + DEBUG_VERBOSE("enter!\n"); + for (i = ARRAY_SIZE(firmware_upgrade_device) - 1; i >= 0; i--) { + firmware_upgrade_device_data = firmware_upgrade_device[i].dev.platform_data; + if (firmware_upgrade_device_data->device_flag == 0) { /* device register success, need unregister */ + platform_device_unregister(&firmware_upgrade_device[i]); + } + } +} + +module_init(firmware_upgrade_device_init); +module_exit(firmware_upgrade_device_exit); +MODULE_DESCRIPTION("FIRMWARE UPGRADE Devices"); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("support"); \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/modules/driver/wb_fpga_i2c_bus_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/modules/driver/wb_fpga_i2c_bus_device.c new file mode 100644 index 00000000000..d036db8abc5 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/modules/driver/wb_fpga_i2c_bus_device.c @@ -0,0 +1,1840 @@ +#include +#include +#include +#include +#include + +#include +#include + +static int debug = 0; +module_param(debug, int, S_IRUGO | S_IWUSR); + +/* mac fpga i2c master */ +static fpga_i2c_bus_device_t fpga0_i2c_bus_device_data0 = { + .adap_nr = 401, + .i2c_timeout = 3000, + .i2c_scale = 0x2000, + .i2c_filter = 0x2004, + .i2c_stretch = 0x2008, + .i2c_ext_9548_exits_flag = 0x200c, + .i2c_ext_9548_addr = 0x2010, + .i2c_ext_9548_chan = 0x2014, + .i2c_in_9548_chan = 0x2018, + .i2c_slave = 0x201c, + .i2c_reg = 0x2020, + .i2c_reg_len = 0x2030, + .i2c_data_len = 0x2034, + .i2c_ctrl = 0x2038, + .i2c_status = 0x203c, + .i2c_err_vec = 0x2048, + .i2c_data_buf = 0x2100, + .i2c_data_buf_len = 256, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 2, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x207c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +static fpga_i2c_bus_device_t fpga0_i2c_bus_device_data1 = { + .adap_nr = 402, + .i2c_timeout = 3000, + .i2c_scale = 0x2200, + .i2c_filter = 0x2204, + .i2c_stretch = 0x2208, + .i2c_ext_9548_exits_flag = 0x220c, + .i2c_ext_9548_addr = 0x2210, + .i2c_ext_9548_chan = 0x2214, + .i2c_in_9548_chan = 0x2218, + .i2c_slave = 0x221c, + .i2c_reg = 0x2220, + .i2c_reg_len = 0x2230, + .i2c_data_len = 0x2234, + .i2c_ctrl = 0x2238, + .i2c_status = 0x223c, + .i2c_err_vec = 0x2248, + .i2c_data_buf = 0x2300, + .i2c_data_buf_len = 256, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 2, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x227c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +static fpga_i2c_bus_device_t fpga0_i2c_bus_device_data2 = { + .adap_nr = 403, + .i2c_timeout = 3000, + .i2c_scale = 0x2400, + .i2c_filter = 0x2404, + .i2c_stretch = 0x2408, + .i2c_ext_9548_exits_flag = 0x240c, + .i2c_ext_9548_addr = 0x2410, + .i2c_ext_9548_chan = 0x2414, + .i2c_in_9548_chan = 0x2418, + .i2c_slave = 0x241c, + .i2c_reg = 0x2420, + .i2c_reg_len = 0x2430, + .i2c_data_len = 0x2434, + .i2c_ctrl = 0x2438, + .i2c_status = 0x243c, + .i2c_err_vec = 0x2448, + .i2c_data_buf = 0x2500, + .i2c_data_buf_len = 256, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 2, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x247c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +static fpga_i2c_bus_device_t fpga0_i2c_bus_device_data3 = { + .adap_nr = 404, + .i2c_timeout = 3000, + .i2c_scale = 0x2600, + .i2c_filter = 0x2604, + .i2c_stretch = 0x2608, + .i2c_ext_9548_exits_flag = 0x260c, + .i2c_ext_9548_addr = 0x2610, + .i2c_ext_9548_chan = 0x2614, + .i2c_in_9548_chan = 0x2618, + .i2c_slave = 0x261c, + .i2c_reg = 0x2620, + .i2c_reg_len = 0x2630, + .i2c_data_len = 0x2634, + .i2c_ctrl = 0x2638, + .i2c_status = 0x263c, + .i2c_err_vec = 0x2648, + .i2c_data_buf = 0x2700, + .i2c_data_buf_len = 256, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 2, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x267c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +static fpga_i2c_bus_device_t fpga0_i2c_bus_device_data4 = { + .adap_nr = 405, + .i2c_timeout = 3000, + .i2c_scale = 0x2800, + .i2c_filter = 0x2804, + .i2c_stretch = 0x2808, + .i2c_ext_9548_exits_flag = 0x280c, + .i2c_ext_9548_addr = 0x2810, + .i2c_ext_9548_chan = 0x2814, + .i2c_in_9548_chan = 0x2818, + .i2c_slave = 0x281c, + .i2c_reg = 0x2820, + .i2c_reg_len = 0x2830, + .i2c_data_len = 0x2834, + .i2c_ctrl = 0x2838, + .i2c_status = 0x283c, + .i2c_err_vec = 0x2848, + .i2c_data_buf = 0x2900, + .i2c_data_buf_len = 256, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 2, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x287c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +static fpga_i2c_bus_device_t fpga0_i2c_bus_device_data5 = { + .adap_nr = 406, + .i2c_timeout = 3000, + .i2c_scale = 0x2a00, + .i2c_filter = 0x2a04, + .i2c_stretch = 0x2a08, + .i2c_ext_9548_exits_flag = 0x2a0c, + .i2c_ext_9548_addr = 0x2a10, + .i2c_ext_9548_chan = 0x2a14, + .i2c_in_9548_chan = 0x2a18, + .i2c_slave = 0x2a1c, + .i2c_reg = 0x2a20, + .i2c_reg_len = 0x2a30, + .i2c_data_len = 0x2a34, + .i2c_ctrl = 0x2a38, + .i2c_status = 0x2a3c, + .i2c_err_vec = 0x2a48, + .i2c_data_buf = 0x2b00, + .i2c_data_buf_len = 256, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 2, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x2a7c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +static fpga_i2c_bus_device_t fpga0_i2c_bus_device_data6 = { + .adap_nr = 407, + .i2c_timeout = 3000, + .i2c_scale = 0x2c00, + .i2c_filter = 0x2c04, + .i2c_stretch = 0x2c08, + .i2c_ext_9548_exits_flag = 0x2c0c, + .i2c_ext_9548_addr = 0x2c10, + .i2c_ext_9548_chan = 0x2c14, + .i2c_in_9548_chan = 0x2c18, + .i2c_slave = 0x2c1c, + .i2c_reg = 0x2c20, + .i2c_reg_len = 0x2c30, + .i2c_data_len = 0x2c34, + .i2c_ctrl = 0x2c38, + .i2c_status = 0x2c3c, + .i2c_err_vec = 0x2c48, + .i2c_data_buf = 0x2d00, + .i2c_data_buf_len = 256, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 2, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x2c7c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +static fpga_i2c_bus_device_t fpga0_i2c_bus_device_data7 = { + .adap_nr = 408, + .i2c_timeout = 3000, + .i2c_scale = 0x2e00, + .i2c_filter = 0x2e04, + .i2c_stretch = 0x2e08, + .i2c_ext_9548_exits_flag = 0x2e0c, + .i2c_ext_9548_addr = 0x2e10, + .i2c_ext_9548_chan = 0x2e14, + .i2c_in_9548_chan = 0x2e18, + .i2c_slave = 0x2e1c, + .i2c_reg = 0x2e20, + .i2c_reg_len = 0x2e30, + .i2c_data_len = 0x2e34, + .i2c_ctrl = 0x2e38, + .i2c_status = 0x2e3c, + .i2c_err_vec = 0x2e48, + .i2c_data_buf = 0x2f00, + .i2c_data_buf_len = 256, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 2, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x2e7c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +static fpga_i2c_bus_device_t fpga0_i2c_bus_device_data8= { + .adap_nr = 409, + .i2c_timeout = 3000, + .i2c_scale = 0x3000, + .i2c_filter = 0x3004, + .i2c_stretch = 0x3008, + .i2c_ext_9548_exits_flag = 0x300c, + .i2c_ext_9548_addr = 0x3010, + .i2c_ext_9548_chan = 0x3014, + .i2c_in_9548_chan = 0x3018, + .i2c_slave = 0x301c, + .i2c_reg = 0x3020, + .i2c_reg_len = 0x3030, + .i2c_data_len = 0x3034, + .i2c_ctrl = 0x3038, + .i2c_status = 0x303c, + .i2c_err_vec = 0x3048, + .i2c_data_buf = 0x3100, + .i2c_data_buf_len = 256, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 2, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x307c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +static fpga_i2c_bus_device_t fpga0_i2c_bus_device_data9 = { + .adap_nr = 410, + .i2c_timeout = 3000, + .i2c_scale = 0x3200, + .i2c_filter = 0x3204, + .i2c_stretch = 0x3208, + .i2c_ext_9548_exits_flag = 0x320c, + .i2c_ext_9548_addr = 0x3210, + .i2c_ext_9548_chan = 0x3214, + .i2c_in_9548_chan = 0x3218, + .i2c_slave = 0x321c, + .i2c_reg = 0x3220, + .i2c_reg_len = 0x3230, + .i2c_data_len = 0x3234, + .i2c_ctrl = 0x3238, + .i2c_status = 0x323c, + .i2c_err_vec = 0x3248, + .i2c_data_buf = 0x3300, + .i2c_data_buf_len = 256, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 2, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x327c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +static fpga_i2c_bus_device_t fpga0_dom_i2c_bus_device_data0 = { + .adap_nr = 411, + .i2c_timeout = 3000, + .i2c_scale = 0x4000, + .i2c_filter = 0x4004, + .i2c_stretch = 0x4008, + .i2c_ext_9548_exits_flag = 0x400c, + .i2c_ext_9548_addr = 0x4010, + .i2c_ext_9548_chan = 0x4014, + .i2c_in_9548_chan = 0x4018, + .i2c_slave = 0x401c, + .i2c_reg = 0x4020, + .i2c_reg_len = 0x4030, + .i2c_data_len = 0x4034, + .i2c_ctrl = 0x4038, + .i2c_status = 0x403c, + .i2c_err_vec = 0x4048, + .i2c_data_buf = 0x4100, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 2, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x407c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +static fpga_i2c_bus_device_t fpga0_dom_i2c_bus_device_data1 = { + .adap_nr = 412, + .i2c_timeout = 3000, + .i2c_scale = 0x4200, + .i2c_filter = 0x4204, + .i2c_stretch = 0x4208, + .i2c_ext_9548_exits_flag = 0x420c, + .i2c_ext_9548_addr = 0x4210, + .i2c_ext_9548_chan = 0x4214, + .i2c_in_9548_chan = 0x4218, + .i2c_slave = 0x421c, + .i2c_reg = 0x4220, + .i2c_reg_len = 0x4230, + .i2c_data_len = 0x4234, + .i2c_ctrl = 0x4238, + .i2c_status = 0x423c, + .i2c_err_vec = 0x4248, + .i2c_data_buf = 0x4300, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 2, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x427c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +static fpga_i2c_bus_device_t fpga0_dom_i2c_bus_device_data2 = { + .adap_nr = 413, + .i2c_timeout = 3000, + .i2c_scale = 0x4400, + .i2c_filter = 0x4404, + .i2c_stretch = 0x4408, + .i2c_ext_9548_exits_flag = 0x440c, + .i2c_ext_9548_addr = 0x4410, + .i2c_ext_9548_chan = 0x4414, + .i2c_in_9548_chan = 0x4418, + .i2c_slave = 0x441c, + .i2c_reg = 0x4420, + .i2c_reg_len = 0x4430, + .i2c_data_len = 0x4434, + .i2c_ctrl = 0x4438, + .i2c_status = 0x443c, + .i2c_err_vec = 0x4448, + .i2c_data_buf = 0x4500, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 2, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x447c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga0_dom_i2c_bus_device_data3 = { + .adap_nr = 414, + .i2c_timeout = 3000, + .i2c_scale = 0x4600, + .i2c_filter = 0x4604, + .i2c_stretch = 0x4608, + .i2c_ext_9548_exits_flag = 0x460c, + .i2c_ext_9548_addr = 0x4610, + .i2c_ext_9548_chan = 0x4614, + .i2c_in_9548_chan = 0x4618, + .i2c_slave = 0x461c, + .i2c_reg = 0x4620, + .i2c_reg_len = 0x4630, + .i2c_data_len = 0x4634, + .i2c_ctrl = 0x4638, + .i2c_status = 0x463c, + .i2c_err_vec = 0x4648, + .i2c_data_buf = 0x4700, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 2, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x467c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga0_dom_i2c_bus_device_data4 = { + .adap_nr = 415, + .i2c_timeout = 3000, + .i2c_scale = 0x4800, + .i2c_filter = 0x4804, + .i2c_stretch = 0x4808, + .i2c_ext_9548_exits_flag = 0x480c, + .i2c_ext_9548_addr = 0x4810, + .i2c_ext_9548_chan = 0x4814, + .i2c_in_9548_chan = 0x4818, + .i2c_slave = 0x481c, + .i2c_reg = 0x4820, + .i2c_reg_len = 0x4830, + .i2c_data_len = 0x4834, + .i2c_ctrl = 0x4838, + .i2c_status = 0x483c, + .i2c_err_vec = 0x4848, + .i2c_data_buf = 0x4900, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 2, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x487c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga0_dom_i2c_bus_device_data5 = { + .adap_nr = 416, + .i2c_timeout = 3000, + .i2c_scale = 0x4a00, + .i2c_filter = 0x4a04, + .i2c_stretch = 0x4a08, + .i2c_ext_9548_exits_flag = 0x4a0c, + .i2c_ext_9548_addr = 0x4a10, + .i2c_ext_9548_chan = 0x4a14, + .i2c_in_9548_chan = 0x4a18, + .i2c_slave = 0x4a1c, + .i2c_reg = 0x4a20, + .i2c_reg_len = 0x4a30, + .i2c_data_len = 0x4a34, + .i2c_ctrl = 0x4a38, + .i2c_status = 0x4a3c, + .i2c_err_vec = 0x4a48, + .i2c_data_buf = 0x4b00, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 2, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x4a7c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga0_dom_i2c_bus_device_data6 = { + .adap_nr = 417, + .i2c_timeout = 3000, + .i2c_scale = 0x4c00, + .i2c_filter = 0x4c04, + .i2c_stretch = 0x4c08, + .i2c_ext_9548_exits_flag = 0x4c0c, + .i2c_ext_9548_addr = 0x4c10, + .i2c_ext_9548_chan = 0x4c14, + .i2c_in_9548_chan = 0x4c18, + .i2c_slave = 0x4c1c, + .i2c_reg = 0x4c20, + .i2c_reg_len = 0x4c30, + .i2c_data_len = 0x4c34, + .i2c_ctrl = 0x4c38, + .i2c_status = 0x4c3c, + .i2c_err_vec = 0x4c48, + .i2c_data_buf = 0x4d00, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 2, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x4c7c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga0_dom_i2c_bus_device_data7 = { + .adap_nr = 418, + .i2c_timeout = 3000, + .i2c_scale = 0x4e00, + .i2c_filter = 0x4e04, + .i2c_stretch = 0x4e08, + .i2c_ext_9548_exits_flag = 0x4e0c, + .i2c_ext_9548_addr = 0x4e10, + .i2c_ext_9548_chan = 0x4e14, + .i2c_in_9548_chan = 0x4e18, + .i2c_slave = 0x4e1c, + .i2c_reg = 0x4e20, + .i2c_reg_len = 0x4e30, + .i2c_data_len = 0x4e34, + .i2c_ctrl = 0x4e38, + .i2c_status = 0x4e3c, + .i2c_err_vec = 0x4e48, + .i2c_data_buf = 0x4f00, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 2, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x4e7c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga0_dom_i2c_bus_device_data8 = { + .adap_nr = 419, + .i2c_timeout = 3000, + .i2c_scale = 0x5000, + .i2c_filter = 0x5004, + .i2c_stretch = 0x5008, + .i2c_ext_9548_exits_flag = 0x500c, + .i2c_ext_9548_addr = 0x5010, + .i2c_ext_9548_chan = 0x5014, + .i2c_in_9548_chan = 0x5018, + .i2c_slave = 0x501c, + .i2c_reg = 0x5020, + .i2c_reg_len = 0x5030, + .i2c_data_len = 0x5034, + .i2c_ctrl = 0x5038, + .i2c_status = 0x503c, + .i2c_err_vec = 0x5048, + .i2c_data_buf = 0x5100, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 2, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x507c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga0_dom_i2c_bus_device_data9 = { + .adap_nr = 420, + .i2c_timeout = 3000, + .i2c_scale = 0x5200, + .i2c_filter = 0x5204, + .i2c_stretch = 0x5208, + .i2c_ext_9548_exits_flag = 0x520c, + .i2c_ext_9548_addr = 0x5210, + .i2c_ext_9548_chan = 0x5214, + .i2c_in_9548_chan = 0x5218, + .i2c_slave = 0x521c, + .i2c_reg = 0x5220, + .i2c_reg_len = 0x5230, + .i2c_data_len = 0x5234, + .i2c_ctrl = 0x5238, + .i2c_status = 0x523c, + .i2c_err_vec = 0x5248, + .i2c_data_buf = 0x5300, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 2, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x527c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga0_dom_i2c_bus_device_data10 = { + .adap_nr = 421, + .i2c_timeout = 3000, + .i2c_scale = 0x5400, + .i2c_filter = 0x5404, + .i2c_stretch = 0x5408, + .i2c_ext_9548_exits_flag = 0x540c, + .i2c_ext_9548_addr = 0x5410, + .i2c_ext_9548_chan = 0x5414, + .i2c_in_9548_chan = 0x5418, + .i2c_slave = 0x541c, + .i2c_reg = 0x5420, + .i2c_reg_len = 0x5430, + .i2c_data_len = 0x5434, + .i2c_ctrl = 0x5438, + .i2c_status = 0x543c, + .i2c_err_vec = 0x5448, + .i2c_data_buf = 0x5500, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 2, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x547c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga0_dom_i2c_bus_device_data11 = { + .adap_nr = 422, + .i2c_timeout = 3000, + .i2c_scale = 0x5600, + .i2c_filter = 0x5604, + .i2c_stretch = 0x5608, + .i2c_ext_9548_exits_flag = 0x560c, + .i2c_ext_9548_addr = 0x5610, + .i2c_ext_9548_chan = 0x5614, + .i2c_in_9548_chan = 0x5618, + .i2c_slave = 0x561c, + .i2c_reg = 0x5620, + .i2c_reg_len = 0x5630, + .i2c_data_len = 0x5634, + .i2c_ctrl = 0x5638, + .i2c_status = 0x563c, + .i2c_err_vec = 0x5648, + .i2c_data_buf = 0x5700, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 2, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x567c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga0_dom_i2c_bus_device_data12 = { + .adap_nr = 423, + .i2c_timeout = 3000, + .i2c_scale = 0x5800, + .i2c_filter = 0x5804, + .i2c_stretch = 0x5808, + .i2c_ext_9548_exits_flag = 0x580c, + .i2c_ext_9548_addr = 0x5810, + .i2c_ext_9548_chan = 0x5814, + .i2c_in_9548_chan = 0x5818, + .i2c_slave = 0x581c, + .i2c_reg = 0x5820, + .i2c_reg_len = 0x5830, + .i2c_data_len = 0x5834, + .i2c_ctrl = 0x5838, + .i2c_status = 0x583c, + .i2c_err_vec = 0x5848, + .i2c_data_buf = 0x5900, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 2, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x587c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga0_dom_i2c_bus_device_data13 = { + .adap_nr = 424, + .i2c_timeout = 3000, + .i2c_scale = 0x5a00, + .i2c_filter = 0x5a04, + .i2c_stretch = 0x5a08, + .i2c_ext_9548_exits_flag = 0x5a0c, + .i2c_ext_9548_addr = 0x5a10, + .i2c_ext_9548_chan = 0x5a14, + .i2c_in_9548_chan = 0x5a18, + .i2c_slave = 0x5a1c, + .i2c_reg = 0x5a20, + .i2c_reg_len = 0x5a30, + .i2c_data_len = 0x5a34, + .i2c_ctrl = 0x5a38, + .i2c_status = 0x5a3c, + .i2c_err_vec = 0x5a48, + .i2c_data_buf = 0x5b00, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 2, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x5a7c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga0_dom_i2c_bus_device_data14 = { + .adap_nr = 425, + .i2c_timeout = 3000, + .i2c_scale = 0x5c00, + .i2c_filter = 0x5c04, + .i2c_stretch = 0x5c08, + .i2c_ext_9548_exits_flag = 0x5c0c, + .i2c_ext_9548_addr = 0x5c10, + .i2c_ext_9548_chan = 0x5c14, + .i2c_in_9548_chan = 0x5c18, + .i2c_slave = 0x5c1c, + .i2c_reg = 0x5c20, + .i2c_reg_len = 0x5c30, + .i2c_data_len = 0x5c34, + .i2c_ctrl = 0x5c38, + .i2c_status = 0x5c3c, + .i2c_err_vec = 0x5c48, + .i2c_data_buf = 0x5d00, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 2, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x5c7c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga0_dom_i2c_bus_device_data15 = { + .adap_nr = 426, + .i2c_timeout = 3000, + .i2c_scale = 0x5e00, + .i2c_filter = 0x5e04, + .i2c_stretch = 0x5e08, + .i2c_ext_9548_exits_flag = 0x5e0c, + .i2c_ext_9548_addr = 0x5e10, + .i2c_ext_9548_chan = 0x5e14, + .i2c_in_9548_chan = 0x5e18, + .i2c_slave = 0x5e1c, + .i2c_reg = 0x5e20, + .i2c_reg_len = 0x5e30, + .i2c_data_len = 0x5e34, + .i2c_ctrl = 0x5e38, + .i2c_status = 0x5e3c, + .i2c_err_vec = 0x5e48, + .i2c_data_buf = 0x5f00, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 2, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x5e7c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +/* uport fpga i2c master */ +static fpga_i2c_bus_device_t fpga1_i2c_bus_device_data0 = { + .adap_nr = 427, + .i2c_timeout = 3000, + .i2c_scale = 0x2000, + .i2c_filter = 0x2004, + .i2c_stretch = 0x2008, + .i2c_ext_9548_exits_flag = 0x200c, + .i2c_ext_9548_addr = 0x2010, + .i2c_ext_9548_chan = 0x2014, + .i2c_in_9548_chan = 0x2018, + .i2c_slave = 0x201c, + .i2c_reg = 0x2020, + .i2c_reg_len = 0x2030, + .i2c_data_len = 0x2034, + .i2c_ctrl = 0x2038, + .i2c_status = 0x203c, + .i2c_err_vec = 0x2048, + .i2c_data_buf = 0x2100, + .i2c_data_buf_len = 256, + .dev_name = "/dev/fpga1", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x207c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data0 = { + .adap_nr = 428, + .i2c_timeout = 3000, + .i2c_scale = 0x4000, + .i2c_filter = 0x4004, + .i2c_stretch = 0x4008, + .i2c_ext_9548_exits_flag = 0x400c, + .i2c_ext_9548_addr = 0x4010, + .i2c_ext_9548_chan = 0x4014, + .i2c_in_9548_chan = 0x4018, + .i2c_slave = 0x401c, + .i2c_reg = 0x4020, + .i2c_reg_len = 0x4030, + .i2c_data_len = 0x4034, + .i2c_ctrl = 0x4038, + .i2c_status = 0x403c, + .i2c_err_vec = 0x4048, + .i2c_data_buf = 0x4100, + .dev_name = "/dev/fpga1", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 2, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x407c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data1 = { + .adap_nr = 429, + .i2c_timeout = 3000, + .i2c_scale = 0x4200, + .i2c_filter = 0x4204, + .i2c_stretch = 0x4208, + .i2c_ext_9548_exits_flag = 0x420c, + .i2c_ext_9548_addr = 0x4210, + .i2c_ext_9548_chan = 0x4214, + .i2c_in_9548_chan = 0x4218, + .i2c_slave = 0x421c, + .i2c_reg = 0x4220, + .i2c_reg_len = 0x4230, + .i2c_data_len = 0x4234, + .i2c_ctrl = 0x4238, + .i2c_status = 0x423c, + .i2c_err_vec = 0x4248, + .i2c_data_buf = 0x4300, + .dev_name = "/dev/fpga1", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 2, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x427c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data2 = { + .adap_nr = 430, + .i2c_timeout = 3000, + .i2c_scale = 0x4400, + .i2c_filter = 0x4404, + .i2c_stretch = 0x4408, + .i2c_ext_9548_exits_flag = 0x440c, + .i2c_ext_9548_addr = 0x4410, + .i2c_ext_9548_chan = 0x4414, + .i2c_in_9548_chan = 0x4418, + .i2c_slave = 0x441c, + .i2c_reg = 0x4420, + .i2c_reg_len = 0x4430, + .i2c_data_len = 0x4434, + .i2c_ctrl = 0x4438, + .i2c_status = 0x443c, + .i2c_err_vec = 0x4448, + .i2c_data_buf = 0x4500, + .dev_name = "/dev/fpga1", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 2, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x447c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data3 = { + .adap_nr = 431, + .i2c_timeout = 3000, + .i2c_scale = 0x4600, + .i2c_filter = 0x4604, + .i2c_stretch = 0x4608, + .i2c_ext_9548_exits_flag = 0x460c, + .i2c_ext_9548_addr = 0x4610, + .i2c_ext_9548_chan = 0x4614, + .i2c_in_9548_chan = 0x4618, + .i2c_slave = 0x461c, + .i2c_reg = 0x4620, + .i2c_reg_len = 0x4630, + .i2c_data_len = 0x4634, + .i2c_ctrl = 0x4638, + .i2c_status = 0x463c, + .i2c_err_vec = 0x4648, + .i2c_data_buf = 0x4700, + .dev_name = "/dev/fpga1", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 2, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x467c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data4 = { + .adap_nr = 432, + .i2c_timeout = 3000, + .i2c_scale = 0x4800, + .i2c_filter = 0x4804, + .i2c_stretch = 0x4808, + .i2c_ext_9548_exits_flag = 0x480c, + .i2c_ext_9548_addr = 0x4810, + .i2c_ext_9548_chan = 0x4814, + .i2c_in_9548_chan = 0x4818, + .i2c_slave = 0x481c, + .i2c_reg = 0x4820, + .i2c_reg_len = 0x4830, + .i2c_data_len = 0x4834, + .i2c_ctrl = 0x4838, + .i2c_status = 0x483c, + .i2c_err_vec = 0x4848, + .i2c_data_buf = 0x4900, + .dev_name = "/dev/fpga1", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 2, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x487c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data5 = { + .adap_nr = 433, + .i2c_timeout = 3000, + .i2c_scale = 0x4a00, + .i2c_filter = 0x4a04, + .i2c_stretch = 0x4a08, + .i2c_ext_9548_exits_flag = 0x4a0c, + .i2c_ext_9548_addr = 0x4a10, + .i2c_ext_9548_chan = 0x4a14, + .i2c_in_9548_chan = 0x4a18, + .i2c_slave = 0x4a1c, + .i2c_reg = 0x4a20, + .i2c_reg_len = 0x4a30, + .i2c_data_len = 0x4a34, + .i2c_ctrl = 0x4a38, + .i2c_status = 0x4a3c, + .i2c_err_vec = 0x4a48, + .i2c_data_buf = 0x4b00, + .dev_name = "/dev/fpga1", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 2, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x4a7c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data6 = { + .adap_nr = 434, + .i2c_timeout = 3000, + .i2c_scale = 0x4c00, + .i2c_filter = 0x4c04, + .i2c_stretch = 0x4c08, + .i2c_ext_9548_exits_flag = 0x4c0c, + .i2c_ext_9548_addr = 0x4c10, + .i2c_ext_9548_chan = 0x4c14, + .i2c_in_9548_chan = 0x4c18, + .i2c_slave = 0x4c1c, + .i2c_reg = 0x4c20, + .i2c_reg_len = 0x4c30, + .i2c_data_len = 0x4c34, + .i2c_ctrl = 0x4c38, + .i2c_status = 0x4c3c, + .i2c_err_vec = 0x4c48, + .i2c_data_buf = 0x4d00, + .dev_name = "/dev/fpga1", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 2, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x4c7c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data7 = { + .adap_nr = 435, + .i2c_timeout = 3000, + .i2c_scale = 0x4e00, + .i2c_filter = 0x4e04, + .i2c_stretch = 0x4e08, + .i2c_ext_9548_exits_flag = 0x4e0c, + .i2c_ext_9548_addr = 0x4e10, + .i2c_ext_9548_chan = 0x4e14, + .i2c_in_9548_chan = 0x4e18, + .i2c_slave = 0x4e1c, + .i2c_reg = 0x4e20, + .i2c_reg_len = 0x4e30, + .i2c_data_len = 0x4e34, + .i2c_ctrl = 0x4e38, + .i2c_status = 0x4e3c, + .i2c_err_vec = 0x4e48, + .i2c_data_buf = 0x4f00, + .dev_name = "/dev/fpga1", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 2, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x4e7c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +/* dport fpga i2c master */ +static fpga_i2c_bus_device_t fpga2_i2c_bus_device_data0 = { + .adap_nr = 436, + .i2c_timeout = 3000, + .i2c_scale = 0x2000, + .i2c_filter = 0x2004, + .i2c_stretch = 0x2008, + .i2c_ext_9548_exits_flag = 0x200c, + .i2c_ext_9548_addr = 0x2010, + .i2c_ext_9548_chan = 0x2014, + .i2c_in_9548_chan = 0x2018, + .i2c_slave = 0x201c, + .i2c_reg = 0x2020, + .i2c_reg_len = 0x2030, + .i2c_data_len = 0x2034, + .i2c_ctrl = 0x2038, + .i2c_status = 0x203c, + .i2c_err_vec = 0x2048, + .i2c_data_buf = 0x2100, + .i2c_data_buf_len = 256, + .dev_name = "/dev/fpga2", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x207c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +static fpga_i2c_bus_device_t fpga2_dom_i2c_bus_device_data0 = { + .adap_nr = 437, + .i2c_timeout = 3000, + .i2c_scale = 0x4000, + .i2c_filter = 0x4004, + .i2c_stretch = 0x4008, + .i2c_ext_9548_exits_flag = 0x400c, + .i2c_ext_9548_addr = 0x4010, + .i2c_ext_9548_chan = 0x4014, + .i2c_in_9548_chan = 0x4018, + .i2c_slave = 0x401c, + .i2c_reg = 0x4020, + .i2c_reg_len = 0x4030, + .i2c_data_len = 0x4034, + .i2c_ctrl = 0x4038, + .i2c_status = 0x403c, + .i2c_err_vec = 0x4048, + .i2c_data_buf = 0x4100, + .dev_name = "/dev/fpga2", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 2, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x407c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga2_dom_i2c_bus_device_data1 = { + .adap_nr = 438, + .i2c_timeout = 3000, + .i2c_scale = 0x4200, + .i2c_filter = 0x4204, + .i2c_stretch = 0x4208, + .i2c_ext_9548_exits_flag = 0x420c, + .i2c_ext_9548_addr = 0x4210, + .i2c_ext_9548_chan = 0x4214, + .i2c_in_9548_chan = 0x4218, + .i2c_slave = 0x421c, + .i2c_reg = 0x4220, + .i2c_reg_len = 0x4230, + .i2c_data_len = 0x4234, + .i2c_ctrl = 0x4238, + .i2c_status = 0x423c, + .i2c_err_vec = 0x4248, + .i2c_data_buf = 0x4300, + .dev_name = "/dev/fpga2", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 2, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x427c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga2_dom_i2c_bus_device_data2 = { + .adap_nr = 439, + .i2c_timeout = 3000, + .i2c_scale = 0x4400, + .i2c_filter = 0x4404, + .i2c_stretch = 0x4408, + .i2c_ext_9548_exits_flag = 0x440c, + .i2c_ext_9548_addr = 0x4410, + .i2c_ext_9548_chan = 0x4414, + .i2c_in_9548_chan = 0x4418, + .i2c_slave = 0x441c, + .i2c_reg = 0x4420, + .i2c_reg_len = 0x4430, + .i2c_data_len = 0x4434, + .i2c_ctrl = 0x4438, + .i2c_status = 0x443c, + .i2c_err_vec = 0x4448, + .i2c_data_buf = 0x4500, + .dev_name = "/dev/fpga2", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 2, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x447c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga2_dom_i2c_bus_device_data3 = { + .adap_nr = 440, + .i2c_timeout = 3000, + .i2c_scale = 0x4600, + .i2c_filter = 0x4604, + .i2c_stretch = 0x4608, + .i2c_ext_9548_exits_flag = 0x460c, + .i2c_ext_9548_addr = 0x4610, + .i2c_ext_9548_chan = 0x4614, + .i2c_in_9548_chan = 0x4618, + .i2c_slave = 0x461c, + .i2c_reg = 0x4620, + .i2c_reg_len = 0x4630, + .i2c_data_len = 0x4634, + .i2c_ctrl = 0x4638, + .i2c_status = 0x463c, + .i2c_err_vec = 0x4648, + .i2c_data_buf = 0x4700, + .dev_name = "/dev/fpga2", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 2, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x467c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga2_dom_i2c_bus_device_data4 = { + .adap_nr = 441, + .i2c_timeout = 3000, + .i2c_scale = 0x4800, + .i2c_filter = 0x4804, + .i2c_stretch = 0x4808, + .i2c_ext_9548_exits_flag = 0x480c, + .i2c_ext_9548_addr = 0x4810, + .i2c_ext_9548_chan = 0x4814, + .i2c_in_9548_chan = 0x4818, + .i2c_slave = 0x481c, + .i2c_reg = 0x4820, + .i2c_reg_len = 0x4830, + .i2c_data_len = 0x4834, + .i2c_ctrl = 0x4838, + .i2c_status = 0x483c, + .i2c_err_vec = 0x4848, + .i2c_data_buf = 0x4900, + .dev_name = "/dev/fpga2", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 2, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x487c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga2_dom_i2c_bus_device_data5 = { + .adap_nr = 442, + .i2c_timeout = 3000, + .i2c_scale = 0x4a00, + .i2c_filter = 0x4a04, + .i2c_stretch = 0x4a08, + .i2c_ext_9548_exits_flag = 0x4a0c, + .i2c_ext_9548_addr = 0x4a10, + .i2c_ext_9548_chan = 0x4a14, + .i2c_in_9548_chan = 0x4a18, + .i2c_slave = 0x4a1c, + .i2c_reg = 0x4a20, + .i2c_reg_len = 0x4a30, + .i2c_data_len = 0x4a34, + .i2c_ctrl = 0x4a38, + .i2c_status = 0x4a3c, + .i2c_err_vec = 0x4a48, + .i2c_data_buf = 0x4b00, + .dev_name = "/dev/fpga2", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 2, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x4a7c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga2_dom_i2c_bus_device_data6 = { + .adap_nr = 443, + .i2c_timeout = 3000, + .i2c_scale = 0x4c00, + .i2c_filter = 0x4c04, + .i2c_stretch = 0x4c08, + .i2c_ext_9548_exits_flag = 0x4c0c, + .i2c_ext_9548_addr = 0x4c10, + .i2c_ext_9548_chan = 0x4c14, + .i2c_in_9548_chan = 0x4c18, + .i2c_slave = 0x4c1c, + .i2c_reg = 0x4c20, + .i2c_reg_len = 0x4c30, + .i2c_data_len = 0x4c34, + .i2c_ctrl = 0x4c38, + .i2c_status = 0x4c3c, + .i2c_err_vec = 0x4c48, + .i2c_data_buf = 0x4d00, + .dev_name = "/dev/fpga2", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 2, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x4c7c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static fpga_i2c_bus_device_t fpga2_dom_i2c_bus_device_data7 = { + .adap_nr = 444, + .i2c_timeout = 3000, + .i2c_scale = 0x4e00, + .i2c_filter = 0x4e04, + .i2c_stretch = 0x4e08, + .i2c_ext_9548_exits_flag = 0x4e0c, + .i2c_ext_9548_addr = 0x4e10, + .i2c_ext_9548_chan = 0x4e14, + .i2c_in_9548_chan = 0x4e18, + .i2c_slave = 0x4e1c, + .i2c_reg = 0x4e20, + .i2c_reg_len = 0x4e30, + .i2c_data_len = 0x4e34, + .i2c_ctrl = 0x4e38, + .i2c_status = 0x4e3c, + .i2c_err_vec = 0x4e48, + .i2c_data_buf = 0x4f00, + .dev_name = "/dev/fpga2", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 2, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x4e7c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, + .i2c_rst_delay = 1, + .i2c_rst_delay_a = 1, +}; + +static void wb_fpga_i2c_bus_device_release(struct device *dev) +{ + return; +} + +static struct platform_device fpga_i2c_bus_device[] = { + /* fpga0 i2c master */ + { + .name = "wb-fpga-i2c", + .id = 1, + .dev = { + .platform_data = &fpga0_i2c_bus_device_data0, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 2, + .dev = { + .platform_data = &fpga0_i2c_bus_device_data1, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 3, + .dev = { + .platform_data = &fpga0_i2c_bus_device_data2, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 4, + .dev = { + .platform_data = &fpga0_i2c_bus_device_data3, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 5, + .dev = { + .platform_data = &fpga0_i2c_bus_device_data4, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 6, + .dev = { + .platform_data = &fpga0_i2c_bus_device_data5, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 7, + .dev = { + .platform_data = &fpga0_i2c_bus_device_data6, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 8, + .dev = { + .platform_data = &fpga0_i2c_bus_device_data7, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 9, + .dev = { + .platform_data = &fpga0_i2c_bus_device_data8, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 10, + .dev = { + .platform_data = &fpga0_i2c_bus_device_data9, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + /* fpga0 dom i2c master */ + { + .name = "wb-fpga-i2c", + .id = 11, + .dev = { + .platform_data = &fpga0_dom_i2c_bus_device_data0, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 12, + .dev = { + .platform_data = &fpga0_dom_i2c_bus_device_data1, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 13, + .dev = { + .platform_data = &fpga0_dom_i2c_bus_device_data2, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 14, + .dev = { + .platform_data = &fpga0_dom_i2c_bus_device_data3, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 15, + .dev = { + .platform_data = &fpga0_dom_i2c_bus_device_data4, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 16, + .dev = { + .platform_data = &fpga0_dom_i2c_bus_device_data5, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 17, + .dev = { + .platform_data = &fpga0_dom_i2c_bus_device_data6, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 18, + .dev = { + .platform_data = &fpga0_dom_i2c_bus_device_data7, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 19, + .dev = { + .platform_data = &fpga0_dom_i2c_bus_device_data8, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 20, + .dev = { + .platform_data = &fpga0_dom_i2c_bus_device_data9, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 21, + .dev = { + .platform_data = &fpga0_dom_i2c_bus_device_data10, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 22, + .dev = { + .platform_data = &fpga0_dom_i2c_bus_device_data11, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 23, + .dev = { + .platform_data = &fpga0_dom_i2c_bus_device_data12, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 24, + .dev = { + .platform_data = &fpga0_dom_i2c_bus_device_data13, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 25, + .dev = { + .platform_data = &fpga0_dom_i2c_bus_device_data14, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 26, + .dev = { + .platform_data = &fpga0_dom_i2c_bus_device_data15, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + /* fpga1 i2c master */ + { + .name = "wb-fpga-i2c", + .id = 27, + .dev = { + .platform_data = &fpga1_i2c_bus_device_data0, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + /* fpga1 dom i2c master */ + { + .name = "wb-fpga-i2c", + .id = 28, + .dev = { + .platform_data = &fpga1_dom_i2c_bus_device_data0, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 29, + .dev = { + .platform_data = &fpga1_dom_i2c_bus_device_data1, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 30, + .dev = { + .platform_data = &fpga1_dom_i2c_bus_device_data2, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 31, + .dev = { + .platform_data = &fpga1_dom_i2c_bus_device_data3, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 32, + .dev = { + .platform_data = &fpga1_dom_i2c_bus_device_data4, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 33, + .dev = { + .platform_data = &fpga1_dom_i2c_bus_device_data5, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 34, + .dev = { + .platform_data = &fpga1_dom_i2c_bus_device_data6, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 35, + .dev = { + .platform_data = &fpga1_dom_i2c_bus_device_data7, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + /* fpga2 i2c master */ + { + .name = "wb-fpga-i2c", + .id = 36, + .dev = { + .platform_data = &fpga2_i2c_bus_device_data0, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + /* fpga2 dom i2c master */ + { + .name = "wb-fpga-i2c", + .id = 37, + .dev = { + .platform_data = &fpga2_dom_i2c_bus_device_data0, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 38, + .dev = { + .platform_data = &fpga2_dom_i2c_bus_device_data1, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 39, + .dev = { + .platform_data = &fpga2_dom_i2c_bus_device_data2, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 40, + .dev = { + .platform_data = &fpga2_dom_i2c_bus_device_data3, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 41, + .dev = { + .platform_data = &fpga2_dom_i2c_bus_device_data4, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 42, + .dev = { + .platform_data = &fpga2_dom_i2c_bus_device_data5, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 43, + .dev = { + .platform_data = &fpga2_dom_i2c_bus_device_data6, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 44, + .dev = { + .platform_data = &fpga2_dom_i2c_bus_device_data7, + .release = wb_fpga_i2c_bus_device_release, + }, + }, +}; + +static int __init wb_fpga_i2c_bus_device_init(void) +{ + int i; + int ret = 0; + fpga_i2c_bus_device_t *fpga_i2c_bus_device_data; + + DEBUG_VERBOSE("enter!\n"); + for (i = 0; i < ARRAY_SIZE(fpga_i2c_bus_device); i++) { + fpga_i2c_bus_device_data = fpga_i2c_bus_device[i].dev.platform_data; + ret = platform_device_register(&fpga_i2c_bus_device[i]); + if (ret < 0) { + fpga_i2c_bus_device_data->device_flag = -1; /* device register failed, set flag -1 */ + printk(KERN_ERR "wb-fpga-i2c.%d register failed!\n", i + 1); + } else { + fpga_i2c_bus_device_data->device_flag = 0; /* device register suucess, set flag 0 */ + } + } + return 0; +} + +static void __exit wb_fpga_i2c_bus_device_exit(void) +{ + int i; + fpga_i2c_bus_device_t *fpga_i2c_bus_device_data; + + DEBUG_VERBOSE("enter!\n"); + for (i = ARRAY_SIZE(fpga_i2c_bus_device) - 1; i >= 0; i--) { + fpga_i2c_bus_device_data = fpga_i2c_bus_device[i].dev.platform_data; + if (fpga_i2c_bus_device_data->device_flag == 0) { /* device register success, need unregister */ + platform_device_unregister(&fpga_i2c_bus_device[i]); + } + } +} + +module_init(wb_fpga_i2c_bus_device_init); +module_exit(wb_fpga_i2c_bus_device_exit); +MODULE_DESCRIPTION("FPGA I2C Devices"); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("support"); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/modules/driver/wb_fpga_pca954x_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/modules/driver/wb_fpga_pca954x_device.c new file mode 100644 index 00000000000..d465cdf9bf8 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/modules/driver/wb_fpga_pca954x_device.c @@ -0,0 +1,564 @@ +#include +#include +#include +#include +#include +#include + +#include +#include + +#define FPGA_INTERNAL_PCA9548 (1) +#define FPGA_EXTERNAL_PCA9548 (2) + +static int debug = 0; +module_param(debug, int, S_IRUGO | S_IWUSR); + +static fpga_pca954x_device_t fpga_pca954x_device_data0 = { + .i2c_bus = 401, + .i2c_addr = 0x70, + .pca9548_base_nr = 451, + .fpga_9548_flag = FPGA_INTERNAL_PCA9548, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data1 = { + .i2c_bus = 451, + .i2c_addr = 0x77, + .pca9548_base_nr = 51, + .fpga_9548_flag = FPGA_EXTERNAL_PCA9548, + .fpga_9548_reset_flag = 1, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data2 = { + .i2c_bus = 451, + .i2c_addr = 0x75, + .pca9548_base_nr = 59, + .fpga_9548_flag = FPGA_EXTERNAL_PCA9548, + .fpga_9548_reset_flag = 1, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data3 = { + .i2c_bus = 402, + .i2c_addr = 0x70, + .pca9548_base_nr = 452, + .fpga_9548_flag = FPGA_INTERNAL_PCA9548, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data4 = { + .i2c_bus = 452, + .i2c_addr = 0x76, + .pca9548_base_nr = 67, + .fpga_9548_flag = FPGA_EXTERNAL_PCA9548, + .fpga_9548_reset_flag = 1, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data5 = { + .i2c_bus = 403, + .i2c_addr = 0x70, + .pca9548_base_nr = 453, + .fpga_9548_flag = FPGA_INTERNAL_PCA9548, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data6 = { + .i2c_bus = 453, + .i2c_addr = 0x77, + .pca9548_base_nr = 75, + .fpga_9548_flag = FPGA_EXTERNAL_PCA9548, + .fpga_9548_reset_flag = 1, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data7 = { + .i2c_bus = 404, + .i2c_addr = 0x70, + .pca9548_base_nr = 454, + .fpga_9548_flag = FPGA_INTERNAL_PCA9548, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data8 = { + .i2c_bus = 454, + .i2c_addr = 0x77, + .pca9548_base_nr = 83, + .fpga_9548_flag = FPGA_EXTERNAL_PCA9548, + .fpga_9548_reset_flag = 1, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data9 = { + .i2c_bus = 405, + .i2c_addr = 0x70, + .pca9548_base_nr = 455, + .fpga_9548_flag = FPGA_INTERNAL_PCA9548, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data10 = { + .i2c_bus = 455, + .i2c_addr = 0x71, + .pca9548_base_nr = 91, + .fpga_9548_flag = FPGA_EXTERNAL_PCA9548, + .fpga_9548_reset_flag = 1, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data11 = { + .i2c_bus = 455, + .i2c_addr = 0x72, + .pca9548_base_nr = 99, + .fpga_9548_flag = FPGA_EXTERNAL_PCA9548, + .fpga_9548_reset_flag = 1, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data12 = { + .i2c_bus = 406, + .i2c_addr = 0x70, + .pca9548_base_nr = 456, + .fpga_9548_flag = FPGA_INTERNAL_PCA9548, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data13 = { + .i2c_bus = 456, + .i2c_addr = 0x71, + .pca9548_base_nr = 107, + .fpga_9548_flag = FPGA_EXTERNAL_PCA9548, + .fpga_9548_reset_flag = 1, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data14 = { + .i2c_bus = 407, + .i2c_addr = 0x70, + .pca9548_base_nr = 457, + .fpga_9548_flag = FPGA_INTERNAL_PCA9548, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data15 = { + .i2c_bus = 457, + .i2c_addr = 0x72, + .pca9548_base_nr = 115, + .fpga_9548_flag = FPGA_EXTERNAL_PCA9548, + .fpga_9548_reset_flag = 1, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data16 = { + .i2c_bus = 408, + .i2c_addr = 0x70, + .pca9548_base_nr = 458, + .fpga_9548_flag = FPGA_INTERNAL_PCA9548, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data17 = { + .i2c_bus = 458, + .i2c_addr = 0x73, + .pca9548_base_nr = 123, + .fpga_9548_flag = FPGA_EXTERNAL_PCA9548, + .fpga_9548_reset_flag = 1, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data18 = { + .i2c_bus = 409, + .i2c_addr = 0x70, + .pca9548_base_nr = 459, + .fpga_9548_flag = FPGA_INTERNAL_PCA9548, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data19 = { + .i2c_bus = 459, + .i2c_addr = 0x74, + .pca9548_base_nr = 131, + .fpga_9548_flag = FPGA_EXTERNAL_PCA9548, + .fpga_9548_reset_flag = 1, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data20 = { + .i2c_bus = 410, + .i2c_addr = 0x70, + .pca9548_base_nr = 139, + .fpga_9548_flag = FPGA_INTERNAL_PCA9548, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data21 = { + .i2c_bus = 411, + .i2c_addr = 0x70, + .pca9548_base_nr = 233, + .fpga_9548_flag = FPGA_INTERNAL_PCA9548, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data22 = { + .i2c_bus = 412, + .i2c_addr = 0x70, + .pca9548_base_nr = 237, + .fpga_9548_flag = FPGA_INTERNAL_PCA9548, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data23 = { + .i2c_bus = 413, + .i2c_addr = 0x70, + .pca9548_base_nr = 241, + .fpga_9548_flag = FPGA_INTERNAL_PCA9548, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data24 = { + .i2c_bus = 414, + .i2c_addr = 0x70, + .pca9548_base_nr = 245, + .fpga_9548_flag = FPGA_INTERNAL_PCA9548, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data25 = { + .i2c_bus = 415, + .i2c_addr = 0x70, + .pca9548_base_nr = 249, + .fpga_9548_flag = FPGA_INTERNAL_PCA9548, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data26 = { + .i2c_bus = 416, + .i2c_addr = 0x70, + .pca9548_base_nr = 253, + .fpga_9548_flag = FPGA_INTERNAL_PCA9548, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data27 = { + .i2c_bus = 417, + .i2c_addr = 0x70, + .pca9548_base_nr = 257, + .fpga_9548_flag = FPGA_INTERNAL_PCA9548, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data28 = { + .i2c_bus = 418, + .i2c_addr = 0x70, + .pca9548_base_nr = 261, + .fpga_9548_flag = FPGA_INTERNAL_PCA9548, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data29 = { + .i2c_bus = 419, + .i2c_addr = 0x70, + .pca9548_base_nr = 265, + .fpga_9548_flag = FPGA_INTERNAL_PCA9548, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data30 = { + .i2c_bus = 420, + .i2c_addr = 0x70, + .pca9548_base_nr = 269, + .fpga_9548_flag = FPGA_INTERNAL_PCA9548, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data31 = { + .i2c_bus = 421, + .i2c_addr = 0x70, + .pca9548_base_nr = 273, + .fpga_9548_flag = FPGA_INTERNAL_PCA9548, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data32 = { + .i2c_bus = 422, + .i2c_addr = 0x70, + .pca9548_base_nr = 277, + .fpga_9548_flag = FPGA_INTERNAL_PCA9548, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data33 = { + .i2c_bus = 423, + .i2c_addr = 0x70, + .pca9548_base_nr = 281, + .fpga_9548_flag = FPGA_INTERNAL_PCA9548, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data34 = { + .i2c_bus = 424, + .i2c_addr = 0x70, + .pca9548_base_nr = 285, + .fpga_9548_flag = FPGA_INTERNAL_PCA9548, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data35 = { + .i2c_bus = 425, + .i2c_addr = 0x70, + .pca9548_base_nr = 289, + .fpga_9548_flag = FPGA_INTERNAL_PCA9548, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data36 = { + .i2c_bus = 426, + .i2c_addr = 0x70, + .pca9548_base_nr = 293, + .fpga_9548_flag = FPGA_INTERNAL_PCA9548, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data37 = { + .i2c_bus = 427, + .i2c_addr = 0x70, + .pca9548_base_nr = 147, + .fpga_9548_flag = FPGA_INTERNAL_PCA9548, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data38 = { + .i2c_bus = 428, + .i2c_addr = 0x70, + .pca9548_base_nr = 201, + .fpga_9548_flag = FPGA_INTERNAL_PCA9548, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data39 = { + .i2c_bus = 429, + .i2c_addr = 0x70, + .pca9548_base_nr = 205, + .fpga_9548_flag = FPGA_INTERNAL_PCA9548, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data40 = { + .i2c_bus = 430, + .i2c_addr = 0x70, + .pca9548_base_nr = 209, + .fpga_9548_flag = FPGA_INTERNAL_PCA9548, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data41 = { + .i2c_bus = 431, + .i2c_addr = 0x70, + .pca9548_base_nr = 213, + .fpga_9548_flag = FPGA_INTERNAL_PCA9548, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data42 = { + .i2c_bus = 432, + .i2c_addr = 0x70, + .pca9548_base_nr = 217, + .fpga_9548_flag = FPGA_INTERNAL_PCA9548, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data43 = { + .i2c_bus = 433, + .i2c_addr = 0x70, + .pca9548_base_nr = 221, + .fpga_9548_flag = FPGA_INTERNAL_PCA9548, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data44 = { + .i2c_bus = 434, + .i2c_addr = 0x70, + .pca9548_base_nr = 225, + .fpga_9548_flag = FPGA_INTERNAL_PCA9548, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data45 = { + .i2c_bus = 435, + .i2c_addr = 0x70, + .pca9548_base_nr = 229, + .fpga_9548_flag = FPGA_INTERNAL_PCA9548, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data46 = { + .i2c_bus = 436, + .i2c_addr = 0x70, + .pca9548_base_nr = 155, + .fpga_9548_flag = FPGA_INTERNAL_PCA9548, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data47 = { + .i2c_bus = 437, + .i2c_addr = 0x70, + .pca9548_base_nr = 297, + .fpga_9548_flag = FPGA_INTERNAL_PCA9548, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data48 = { + .i2c_bus = 438, + .i2c_addr = 0x70, + .pca9548_base_nr = 301, + .fpga_9548_flag = FPGA_INTERNAL_PCA9548, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data49 = { + .i2c_bus = 439, + .i2c_addr = 0x70, + .pca9548_base_nr = 305, + .fpga_9548_flag = FPGA_INTERNAL_PCA9548, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data50 = { + .i2c_bus = 440, + .i2c_addr = 0x70, + .pca9548_base_nr = 309, + .fpga_9548_flag = FPGA_INTERNAL_PCA9548, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data51 = { + .i2c_bus = 441, + .i2c_addr = 0x70, + .pca9548_base_nr = 313, + .fpga_9548_flag = FPGA_INTERNAL_PCA9548, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data52 = { + .i2c_bus = 442, + .i2c_addr = 0x70, + .pca9548_base_nr = 317, + .fpga_9548_flag = FPGA_INTERNAL_PCA9548, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data53 = { + .i2c_bus = 443, + .i2c_addr = 0x70, + .pca9548_base_nr = 321, + .fpga_9548_flag = FPGA_INTERNAL_PCA9548, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data54 = { + .i2c_bus = 444, + .i2c_addr = 0x70, + .pca9548_base_nr = 325, + .fpga_9548_flag = FPGA_INTERNAL_PCA9548, + .fpga_9548_reset_flag = 0, +}; + +struct i2c_board_info fpga_pca954x_device_info[] = { + { .type = "wb_fpga_pca9541", .platform_data = &fpga_pca954x_device_data0,}, + { .type = "wb_fpga_pca9548", .platform_data = &fpga_pca954x_device_data1,}, + { .type = "wb_fpga_pca9548", .platform_data = &fpga_pca954x_device_data2,}, + { .type = "wb_fpga_pca9541", .platform_data = &fpga_pca954x_device_data3,}, + { .type = "wb_fpga_pca9548", .platform_data = &fpga_pca954x_device_data4,}, + { .type = "wb_fpga_pca9541", .platform_data = &fpga_pca954x_device_data5,}, + { .type = "wb_fpga_pca9548", .platform_data = &fpga_pca954x_device_data6,}, + { .type = "wb_fpga_pca9541", .platform_data = &fpga_pca954x_device_data7,}, + { .type = "wb_fpga_pca9548", .platform_data = &fpga_pca954x_device_data8,}, + { .type = "wb_fpga_pca9541", .platform_data = &fpga_pca954x_device_data9,}, + { .type = "wb_fpga_pca9548", .platform_data = &fpga_pca954x_device_data10,}, + { .type = "wb_fpga_pca9548", .platform_data = &fpga_pca954x_device_data11,}, + { .type = "wb_fpga_pca9541", .platform_data = &fpga_pca954x_device_data12,}, + { .type = "wb_fpga_pca9548", .platform_data = &fpga_pca954x_device_data13,}, + { .type = "wb_fpga_pca9541", .platform_data = &fpga_pca954x_device_data14,}, + { .type = "wb_fpga_pca9548", .platform_data = &fpga_pca954x_device_data15,}, + { .type = "wb_fpga_pca9541", .platform_data = &fpga_pca954x_device_data16,}, + { .type = "wb_fpga_pca9548", .platform_data = &fpga_pca954x_device_data17,}, + { .type = "wb_fpga_pca9541", .platform_data = &fpga_pca954x_device_data18,}, + { .type = "wb_fpga_pca9548", .platform_data = &fpga_pca954x_device_data19,}, + { .type = "wb_fpga_pca9548", .platform_data = &fpga_pca954x_device_data20,}, + { .type = "wb_fpga_pca9544", .platform_data = &fpga_pca954x_device_data21,}, + { .type = "wb_fpga_pca9544", .platform_data = &fpga_pca954x_device_data22,}, + { .type = "wb_fpga_pca9544", .platform_data = &fpga_pca954x_device_data23,}, + { .type = "wb_fpga_pca9544", .platform_data = &fpga_pca954x_device_data24,}, + { .type = "wb_fpga_pca9544", .platform_data = &fpga_pca954x_device_data25,}, + { .type = "wb_fpga_pca9544", .platform_data = &fpga_pca954x_device_data26,}, + { .type = "wb_fpga_pca9544", .platform_data = &fpga_pca954x_device_data27,}, + { .type = "wb_fpga_pca9544", .platform_data = &fpga_pca954x_device_data28,}, + { .type = "wb_fpga_pca9544", .platform_data = &fpga_pca954x_device_data29,}, + { .type = "wb_fpga_pca9544", .platform_data = &fpga_pca954x_device_data30,}, + { .type = "wb_fpga_pca9544", .platform_data = &fpga_pca954x_device_data31,}, + { .type = "wb_fpga_pca9544", .platform_data = &fpga_pca954x_device_data32,}, + { .type = "wb_fpga_pca9544", .platform_data = &fpga_pca954x_device_data33,}, + { .type = "wb_fpga_pca9544", .platform_data = &fpga_pca954x_device_data34,}, + { .type = "wb_fpga_pca9544", .platform_data = &fpga_pca954x_device_data35,}, + { .type = "wb_fpga_pca9544", .platform_data = &fpga_pca954x_device_data36,}, + { .type = "wb_fpga_pca9548", .platform_data = &fpga_pca954x_device_data37,}, + { .type = "wb_fpga_pca9544", .platform_data = &fpga_pca954x_device_data38,}, + { .type = "wb_fpga_pca9544", .platform_data = &fpga_pca954x_device_data39,}, + { .type = "wb_fpga_pca9544", .platform_data = &fpga_pca954x_device_data40,}, + { .type = "wb_fpga_pca9544", .platform_data = &fpga_pca954x_device_data41,}, + { .type = "wb_fpga_pca9544", .platform_data = &fpga_pca954x_device_data42,}, + { .type = "wb_fpga_pca9544", .platform_data = &fpga_pca954x_device_data43,}, + { .type = "wb_fpga_pca9544", .platform_data = &fpga_pca954x_device_data44,}, + { .type = "wb_fpga_pca9544", .platform_data = &fpga_pca954x_device_data45,}, + { .type = "wb_fpga_pca9548", .platform_data = &fpga_pca954x_device_data46,}, + { .type = "wb_fpga_pca9544", .platform_data = &fpga_pca954x_device_data47,}, + { .type = "wb_fpga_pca9544", .platform_data = &fpga_pca954x_device_data48,}, + { .type = "wb_fpga_pca9544", .platform_data = &fpga_pca954x_device_data49,}, + { .type = "wb_fpga_pca9544", .platform_data = &fpga_pca954x_device_data50,}, + { .type = "wb_fpga_pca9544", .platform_data = &fpga_pca954x_device_data51,}, + { .type = "wb_fpga_pca9544", .platform_data = &fpga_pca954x_device_data52,}, + { .type = "wb_fpga_pca9544", .platform_data = &fpga_pca954x_device_data53,}, + { .type = "wb_fpga_pca9544", .platform_data = &fpga_pca954x_device_data54,}, +}; + +static int __init wb_fpga_pca954x_device_init(void) +{ + int i; + struct i2c_adapter *adap; + struct i2c_client *client; + fpga_pca954x_device_t *fpga_pca954x_device_data; + + DEBUG_VERBOSE("enter!\n"); + for (i = 0; i < ARRAY_SIZE(fpga_pca954x_device_info); i++) { + fpga_pca954x_device_data = fpga_pca954x_device_info[i].platform_data; + fpga_pca954x_device_info[i].addr = fpga_pca954x_device_data->i2c_addr; + adap = i2c_get_adapter(fpga_pca954x_device_data->i2c_bus); + if (adap == NULL) { + fpga_pca954x_device_data->client = NULL; + printk(KERN_ERR "get i2c bus %d adapter fail.\n", fpga_pca954x_device_data->i2c_bus); + continue; + } + client = i2c_new_client_device(adap, &fpga_pca954x_device_info[i]); + if (IS_ERR(client)) { + fpga_pca954x_device_data->client = NULL; + printk(KERN_ERR "Failed to register fpga pca954x device %d at bus %d!\n", + fpga_pca954x_device_data->i2c_addr, fpga_pca954x_device_data->i2c_bus); + } else { + fpga_pca954x_device_data->client = client; + } + i2c_put_adapter(adap); + } + return 0; +} + +static void __exit wb_fpga_pca954x_device_exit(void) +{ + int i; + fpga_pca954x_device_t *fpga_pca954x_device_data; + + DEBUG_VERBOSE("enter!\n"); + for (i = ARRAY_SIZE(fpga_pca954x_device_info) - 1; i >= 0; i--) { + fpga_pca954x_device_data = fpga_pca954x_device_info[i].platform_data; + if (fpga_pca954x_device_data->client) { + i2c_unregister_device(fpga_pca954x_device_data->client); + fpga_pca954x_device_data->client = NULL; + } + } +} + +module_init(wb_fpga_pca954x_device_init); +module_exit(wb_fpga_pca954x_device_exit); +MODULE_DESCRIPTION("FPGA PCA954X Devices"); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("support"); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/modules/driver/wb_i2c_dev_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/modules/driver/wb_i2c_dev_device.c new file mode 100644 index 00000000000..785e59477af --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/modules/driver/wb_i2c_dev_device.c @@ -0,0 +1,340 @@ +#include +#include +#include +#include +#include +#include + +#include +#include + +static int debug = 0; +module_param(debug, int, S_IRUGO | S_IWUSR); + +/* CPU CPLD */ +static i2c_dev_device_t i2c_dev_device_data0 = { + .i2c_bus = 0, + .i2c_addr = 0x0d, + .i2c_name = "cpld0", + .data_bus_width = 1, + .addr_bus_width = 1, + .per_rd_len = 256, + .per_wr_len = 256, + .i2c_len = 256, +}; + +/* MGMT CPLD */ +static i2c_dev_device_t i2c_dev_device_data1 = { + .i2c_bus = 52, + .i2c_addr = 0x3d, + .i2c_name = "cpld1", + .data_bus_width = 1, + .addr_bus_width = 1, + .per_rd_len = 256, + .per_wr_len = 256, + .i2c_len = 256, +}; + +/* MAC CPLD A */ +static i2c_dev_device_t i2c_dev_device_data2 = { + .i2c_bus = 139, + .i2c_addr = 0x1d, + .i2c_name = "cpld2", + .data_bus_width = 1, + .addr_bus_width = 1, + .per_rd_len = 256, + .per_wr_len = 256, + .i2c_len = 256, +}; + +/* MAC CPLD B */ +static i2c_dev_device_t i2c_dev_device_data3 = { + .i2c_bus = 140, + .i2c_addr = 0x2D, + .i2c_name = "cpld3", + .data_bus_width = 1, + .addr_bus_width = 1, + .per_rd_len = 256, + .per_wr_len = 256, + .i2c_len = 256, +}; + +/* MAC CPLD C */ +static i2c_dev_device_t i2c_dev_device_data4 = { + .i2c_bus = 141, + .i2c_addr = 0x3D, + .i2c_name = "cpld4", + .data_bus_width = 1, + .addr_bus_width = 1, + .per_rd_len = 256, + .per_wr_len = 256, + .i2c_len = 256, +}; + +/* UPORT CPLD */ +static i2c_dev_device_t i2c_dev_device_data5 = { + .i2c_bus = 147, + .i2c_addr = 0x3d, + .i2c_name = "cpld5", + .data_bus_width = 1, + .addr_bus_width = 1, + .per_rd_len = 256, + .per_wr_len = 256, + .i2c_len = 256, +}; + +/* DPORT CPLD */ +static i2c_dev_device_t i2c_dev_device_data6 = { + .i2c_bus = 155, + .i2c_addr = 0x3d, + .i2c_name = "cpld6", + .data_bus_width = 1, + .addr_bus_width = 1, + .per_rd_len = 256, + .per_wr_len = 256, + .i2c_len = 256, +}; + +/* UFAN CPLD */ +static i2c_dev_device_t i2c_dev_device_data7 = { + .i2c_bus = 75, + .i2c_addr = 0x0d, + .i2c_name = "cpld7", + .data_bus_width = 1, + .addr_bus_width = 1, + .per_rd_len = 256, + .per_wr_len = 256, + .i2c_len = 256, +}; + +/* DFAN CPLD */ +static i2c_dev_device_t i2c_dev_device_data8 = { + .i2c_bus = 83, + .i2c_addr = 0x0d, + .i2c_name = "cpld8", + .data_bus_width = 1, + .addr_bus_width = 1, + .per_rd_len = 256, + .per_wr_len = 256, + .i2c_len = 256, +}; + +/* MAC CPLD D */ +static i2c_dev_device_t i2c_dev_device_data9 = { + .i2c_bus = 142, + .i2c_addr = 0x4D, + .i2c_name = "cpld9", + .data_bus_width = 1, + .addr_bus_width = 1, + .per_rd_len = 256, + .per_wr_len = 256, + .i2c_len = 256, +}; +#if 0 +/* MGMT CPLD */ +static i2c_dev_device_t i2c_dev_device_data10 = { + .i2c_bus = 2, + .i2c_addr = 0x3a, + .i2c_name = "cpld10", + .data_bus_width = 1, + .addr_bus_width = 1, + .per_rd_len = 256, + .per_wr_len = 256, + .i2c_len = 256, +}; +#endif +/* MAC CPLD A */ +static i2c_dev_device_t i2c_dev_device_data11 = { + .i2c_bus = 12, + .i2c_addr = 0x1c, + .i2c_name = "cpld11", + .data_bus_width = 1, + .addr_bus_width = 1, + .per_rd_len = 256, + .per_wr_len = 256, + .i2c_len = 256, +}; + +/* MAC CPLD B */ +static i2c_dev_device_t i2c_dev_device_data12 = { + .i2c_bus = 13, + .i2c_addr = 0x2c, + .i2c_name = "cpld12", + .data_bus_width = 1, + .addr_bus_width = 1, + .per_rd_len = 256, + .per_wr_len = 256, + .i2c_len = 256, +}; + +/* MAC CPLD C */ +static i2c_dev_device_t i2c_dev_device_data13 = { + .i2c_bus = 11, + .i2c_addr = 0x3c, + .i2c_name = "cpld13", + .data_bus_width = 1, + .addr_bus_width = 1, + .per_rd_len = 256, + .per_wr_len = 256, + .i2c_len = 256, +}; + +/* MAC CPLD D */ +static i2c_dev_device_t i2c_dev_device_data14 = { + .i2c_bus = 1, + .i2c_addr = 0x4a, + .i2c_name = "cpld14", + .data_bus_width = 1, + .addr_bus_width = 1, + .per_rd_len = 256, + .per_wr_len = 256, + .i2c_len = 256, +}; + +/* UPORT CPLD */ +static i2c_dev_device_t i2c_dev_device_data15 = { + .i2c_bus = 15, + .i2c_addr = 0x3c, + .i2c_name = "cpld15", + .data_bus_width = 1, + .addr_bus_width = 1, + .per_rd_len = 256, + .per_wr_len = 256, + .i2c_len = 256, +}; + +/* DPORT CPLD */ +static i2c_dev_device_t i2c_dev_device_data16 = { + .i2c_bus = 17, + .i2c_addr = 0x3c, + .i2c_name = "cpld16", + .data_bus_width = 1, + .addr_bus_width = 1, + .per_rd_len = 256, + .per_wr_len = 256, + .i2c_len = 256, +}; + +struct i2c_board_info i2c_dev_device_info[] = { + { + .type = "wb-i2c-dev", + .platform_data = &i2c_dev_device_data0, + }, + { + .type = "wb-i2c-dev", + .platform_data = &i2c_dev_device_data1, + }, + { + .type = "wb-i2c-dev", + .platform_data = &i2c_dev_device_data2, + }, + { + .type = "wb-i2c-dev", + .platform_data = &i2c_dev_device_data3, + }, + { + .type = "wb-i2c-dev", + .platform_data = &i2c_dev_device_data4, + }, + { + .type = "wb-i2c-dev", + .platform_data = &i2c_dev_device_data5, + }, + { + .type = "wb-i2c-dev", + .platform_data = &i2c_dev_device_data6, + }, + { + .type = "wb-i2c-dev", + .platform_data = &i2c_dev_device_data7, + }, + { + .type = "wb-i2c-dev", + .platform_data = &i2c_dev_device_data8, + }, + { + .type = "wb-i2c-dev", + .platform_data = &i2c_dev_device_data9, + }, +#if 0 + { + .type = "wb-i2c-dev", + .platform_data = &i2c_dev_device_data10, + }, +#endif + { + .type = "wb-i2c-dev", + .platform_data = &i2c_dev_device_data11, + }, + { + .type = "wb-i2c-dev", + .platform_data = &i2c_dev_device_data12, + }, + { + .type = "wb-i2c-dev", + .platform_data = &i2c_dev_device_data13, + }, + { + .type = "wb-i2c-dev", + .platform_data = &i2c_dev_device_data14, + }, + { + .type = "wb-i2c-dev", + .platform_data = &i2c_dev_device_data15, + }, + { + .type = "wb-i2c-dev", + .platform_data = &i2c_dev_device_data16, + }, +}; + +static int __init wb_i2c_dev_device_init(void) +{ + int i; + struct i2c_adapter *adap; + struct i2c_client *client; + i2c_dev_device_t *i2c_dev_device_data; + + DEBUG_VERBOSE("enter!\n"); + for (i = 0; i < ARRAY_SIZE(i2c_dev_device_info); i++) { + i2c_dev_device_data = i2c_dev_device_info[i].platform_data; + i2c_dev_device_info[i].addr = i2c_dev_device_data->i2c_addr; + adap = i2c_get_adapter(i2c_dev_device_data->i2c_bus); + if (adap == NULL) { + i2c_dev_device_data->client = NULL; + printk(KERN_ERR "get i2c bus %d adapter fail.\n", i2c_dev_device_data->i2c_bus); + continue; + } + client = i2c_new_client_device(adap, &i2c_dev_device_info[i]); + if (IS_ERR(client)) { + i2c_dev_device_data->client = NULL; + printk(KERN_ERR "Failed to register i2c dev device %d at bus %d!\n", + i2c_dev_device_data->i2c_addr, i2c_dev_device_data->i2c_bus); + } else { + i2c_dev_device_data->client = client; + } + i2c_put_adapter(adap); + } + return 0; +} + +static void __exit wb_i2c_dev_device_exit(void) +{ + int i; + i2c_dev_device_t *i2c_dev_device_data; + + DEBUG_VERBOSE("enter!\n"); + for (i = ARRAY_SIZE(i2c_dev_device_info) - 1; i >= 0; i--) { + i2c_dev_device_data = i2c_dev_device_info[i].platform_data; + if (i2c_dev_device_data->client) { + i2c_unregister_device(i2c_dev_device_data->client); + i2c_dev_device_data->client = NULL; + } + } +} + +module_init(wb_i2c_dev_device_init); +module_exit(wb_i2c_dev_device_exit); +MODULE_DESCRIPTION("I2C DEV Devices"); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("support"); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/modules/driver/wb_i2c_mux_pca954x_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/modules/driver/wb_i2c_mux_pca954x_device.c new file mode 100644 index 00000000000..36879f03f8b --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/modules/driver/wb_i2c_mux_pca954x_device.c @@ -0,0 +1,89 @@ +#include +#include +#include +#include +#include +#include + +#include +#include + +static int debug = 0; +module_param(debug, int, S_IRUGO | S_IWUSR); + +static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data0 = { + .i2c_bus = 1, + .i2c_addr = 0x70, + .probe_disable = 1, + .select_chan_check = 0, + .close_chan_force_reset = 0, + .pca9548_base_nr = 11, + .pca9548_reset_type = PCA9548_RESET_FILE, + .rst_delay_b = 0, + .rst_delay = 1000, + .rst_delay_a = 1000, + .attr = { + .file_attr.dev_name = "/dev/cpld1", + .file_attr.offset = 0x2b, + .file_attr.mask = 0xff, + .file_attr.reset_on = 0xd4, + .file_attr.reset_off = 0xd5, + }, +}; + +struct i2c_board_info i2c_mux_pca954x_device_info[] = { + { + .type = "wb_pca9548", + .platform_data = &i2c_mux_pca954x_device_data0, + }, +}; + +static int __init wb_i2c_mux_pca954x_device_init(void) +{ + int i; + struct i2c_adapter *adap; + struct i2c_client *client; + i2c_mux_pca954x_device_t *i2c_mux_pca954x_device_data; + DEBUG_VERBOSE("enter!\n"); + for (i = 0; i < ARRAY_SIZE(i2c_mux_pca954x_device_info); i++) { + i2c_mux_pca954x_device_data = i2c_mux_pca954x_device_info[i].platform_data; + i2c_mux_pca954x_device_info[i].addr = i2c_mux_pca954x_device_data->i2c_addr; + adap = i2c_get_adapter(i2c_mux_pca954x_device_data->i2c_bus); + if (adap == NULL) { + i2c_mux_pca954x_device_data->client = NULL; + printk(KERN_ERR "get i2c bus %d adapter fail.\n", i2c_mux_pca954x_device_data->i2c_bus); + continue; + } + client = i2c_new_client_device(adap, &i2c_mux_pca954x_device_info[i]); + if (IS_ERR(client)) { + i2c_mux_pca954x_device_data->client = NULL; + printk(KERN_ERR "Failed to register pca954x device %d at bus %d!\n", + i2c_mux_pca954x_device_data->i2c_addr, i2c_mux_pca954x_device_data->i2c_bus); + } else { + i2c_mux_pca954x_device_data->client = client; + } + i2c_put_adapter(adap); + } + return 0; +} + +static void __exit wb_i2c_mux_pca954x_device_exit(void) +{ + int i; + i2c_mux_pca954x_device_t *i2c_mux_pca954x_device_data; + + DEBUG_VERBOSE("enter!\n"); + for (i = ARRAY_SIZE(i2c_mux_pca954x_device_info) - 1; i >= 0; i--) { + i2c_mux_pca954x_device_data = i2c_mux_pca954x_device_info[i].platform_data; + if (i2c_mux_pca954x_device_data->client) { + i2c_unregister_device(i2c_mux_pca954x_device_data->client); + i2c_mux_pca954x_device_data->client = NULL; + } + } +} + +module_init(wb_i2c_mux_pca954x_device_init); +module_exit(wb_i2c_mux_pca954x_device_exit); +MODULE_DESCRIPTION("WB I2C MUX PCA954X Devices"); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("support"); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/modules/driver/wb_pcie_dev_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/modules/driver/wb_pcie_dev_device.c new file mode 100644 index 00000000000..328119227c7 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/modules/driver/wb_pcie_dev_device.c @@ -0,0 +1,126 @@ +#include +#include +#include +#include +#include + +#include +#include + +static int debug = 0; +module_param(debug, int, S_IRUGO | S_IWUSR); + +static pci_dev_device_t pcie_dev_device_data0 = { + .pci_dev_name = "fpga0", + .pci_domain = 0x0000, + .pci_bus = 0x0a, + .pci_slot = 0x00, + .pci_fn = 0, + .pci_bar = 0, + .bus_width = 4, + .search_mode = 1, + .bridge_bus = 0, + .bridge_slot = 0x03, + .bridge_fn = 3, +}; + +static pci_dev_device_t pcie_dev_device_data1 = { + .pci_dev_name = "fpga1", + .pci_domain = 0x0000, + .pci_bus = 8, + .pci_slot = 0x00, + .pci_fn = 0, + .pci_bar = 0, + .bus_width = 4, + .search_mode = 1, + .bridge_bus = 0, + .bridge_slot = 0x03, + .bridge_fn = 1, +}; + +static pci_dev_device_t pcie_dev_device_data2 = { + .pci_dev_name = "fpga2", + .pci_domain = 0x0000, + .pci_bus = 9, + .pci_slot = 0x00, + .pci_fn = 0, + .pci_bar = 0, + .bus_width = 4, + .search_mode = 1, + .bridge_bus = 0, + .bridge_slot = 0x03, + .bridge_fn = 2, +}; + + +static void wb_pcie_dev_device_release(struct device *dev) +{ + return; +} + +static struct platform_device pcie_dev_device[] = { + { + .name = "wb-pci-dev", + .id = 1, + .dev = { + .platform_data = &pcie_dev_device_data0, + .release = wb_pcie_dev_device_release, + }, + }, + { + .name = "wb-pci-dev", + .id = 2, + .dev = { + .platform_data = &pcie_dev_device_data1, + .release = wb_pcie_dev_device_release, + }, + }, + { + .name = "wb-pci-dev", + .id = 3, + .dev = { + .platform_data = &pcie_dev_device_data2, + .release = wb_pcie_dev_device_release, + }, + }, +}; + +static int __init wb_pcie_dev_device_init(void) +{ + int i; + int ret = 0; + pci_dev_device_t *pcie_dev_device_data; + + DEBUG_VERBOSE("enter!\n"); + for (i = 0; i < ARRAY_SIZE(pcie_dev_device); i++) { + pcie_dev_device_data = pcie_dev_device[i].dev.platform_data; + ret = platform_device_register(&pcie_dev_device[i]); + if (ret < 0) { + pcie_dev_device_data->device_flag = -1; /* device register failed, set flag -1 */ + printk(KERN_ERR "wb-pci-dev.%d register failed!\n", i + 1); + } else { + pcie_dev_device_data->device_flag = 0; /* device register suucess, set flag 0 */ + } + } + return 0; +} + +static void __exit wb_pcie_dev_device_exit(void) +{ + int i; + pci_dev_device_t *pcie_dev_device_data; + + DEBUG_VERBOSE("enter!\n"); + for (i = ARRAY_SIZE(pcie_dev_device) - 1; i >= 0; i--) { + pcie_dev_device_data = pcie_dev_device[i].dev.platform_data; + if (pcie_dev_device_data->device_flag == 0) { /* device register success, need unregister */ + platform_device_unregister(&pcie_dev_device[i]); + } + } +} + +module_init(wb_pcie_dev_device_init); +module_exit(wb_pcie_dev_device_exit); +MODULE_DESCRIPTION("PCIE DEV Devices"); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("support"); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/modules/driver/wb_spi_dev_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/modules/driver/wb_spi_dev_device.c new file mode 100644 index 00000000000..0486278e9f9 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/modules/driver/wb_spi_dev_device.c @@ -0,0 +1,126 @@ +/* + * An wb_spi_dev_device driver for spi device function + * + * Copyright (C) 2024 Micas Networks Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include + +#include +#include "wb_spi_master.h" + +#define SPI_DEVICE_MAX_NUM (64) + +static int g_wb_spi_dev_device_debug = 0; +static int g_wb_spi_dev_device_error = 0; + +module_param(g_wb_spi_dev_device_debug, int, S_IRUGO | S_IWUSR); +module_param(g_wb_spi_dev_device_error, int, S_IRUGO | S_IWUSR); + +#define WB_SPI_DEV_DEVICE_DEBUG_VERBOSE(fmt, args...) do { \ + if (g_wb_spi_dev_device_debug) { \ + printk(KERN_INFO "[WB_SPI_DEV_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +#define WB_SPI_DEV_DEVICE_DEBUG_ERROR(fmt, args...) do { \ + if (g_wb_spi_dev_device_error) { \ + printk(KERN_ERR "[WB_SPI_DEV_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +static spi_dev_device_t spi_dev_device_data0 = { + .spi_dev_name = "cpld10", + .data_bus_width = 4, + .addr_bus_width = 2, + .per_rd_len = 4, + .per_wr_len = 4, + .spi_len = 0x200, +}; + +static struct spi_device *g_spi_device[SPI_DEVICE_MAX_NUM]; + +struct spi_board_info spi_dev_device_info[] = { + { + .modalias = "wb-spi-dev", + .max_speed_hz = 6250000, + .bus_num = 1, + .chip_select = 0, + .mode = SPI_MODE_3, + .platform_data = &spi_dev_device_data0, + }, +}; + +static int __init wb_spi_dev_device_init(void) +{ + int i; + struct spi_controller *ctlr; + struct spi_device *spi; + int spi_dev_num; + + WB_SPI_DEV_DEVICE_DEBUG_VERBOSE("enter!\n"); + + spi_dev_num = ARRAY_SIZE(spi_dev_device_info); + if (spi_dev_num > SPI_DEVICE_MAX_NUM) { + printk(KERN_ERR "spi_dev_num[%d] is bigger than max_num[%d].\n", + spi_dev_num, SPI_DEVICE_MAX_NUM); + return -EINVAL; + } + + for (i = 0; i < ARRAY_SIZE(spi_dev_device_info); i++) { + ctlr = wb_spi_master_busnum_to_master(spi_dev_device_info[i].bus_num); + if (!ctlr) { + printk(KERN_ERR "get bus_num %u spi master failed.\n", + spi_dev_device_info[i].bus_num); + continue; + } + spi = spi_new_device(ctlr, &spi_dev_device_info[i]); + spi_controller_put(ctlr); + if (spi) { + g_spi_device[i] = spi; + } else { + g_spi_device[i] = NULL; + printk(KERN_ERR "Failed to register spi dev device %s at bus %d!\n", + spi_dev_device_info[i].modalias, spi_dev_device_info[i].bus_num); + continue; + } + } + return 0; +} + +static void __exit wb_spi_dev_device_exit(void) +{ + int i; + + WB_SPI_DEV_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = ARRAY_SIZE(spi_dev_device_info) - 1; i >= 0; i--) { + if (g_spi_device[i]) { + spi_unregister_device(g_spi_device[i]); + g_spi_device[i] = NULL; + } + } +} + +module_init(wb_spi_dev_device_init); +module_exit(wb_spi_dev_device_exit); +MODULE_DESCRIPTION("SPI DEV Devices"); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("support"); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/modules/driver/wb_spi_gpio.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/modules/driver/wb_spi_gpio.c new file mode 100644 index 00000000000..971c7abff27 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/modules/driver/wb_spi_gpio.c @@ -0,0 +1,521 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * SPI host driver using generic bitbanged GPIO + * + * Copyright (C) 2006,2008 David Brownell + * Copyright (C) 2017 Linus Walleij + */ +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +static int nsecs_debug_time = 0; +module_param(nsecs_debug_time, int, S_IRUGO | S_IWUSR); + +/* + * This bitbanging SPI host driver should help make systems usable + * when a native hardware SPI engine is not available, perhaps because + * its driver isn't yet working or because the I/O pins it requires + * are used for other purposes. + * + * platform_device->driver_data ... points to spi_gpio + * + * spi->controller_state ... reserved for bitbang framework code + * + * spi->controller->dev.driver_data ... points to spi_gpio->bitbang + */ + +struct spi_gpio { + struct spi_bitbang bitbang; + struct gpio_desc *sck; + struct gpio_desc *miso; + struct gpio_desc *mosi; + struct gpio_desc **cs_gpios; +}; + +/*----------------------------------------------------------------------*/ + +/* + * Because the overhead of going through four GPIO procedure calls + * per transferred bit can make performance a problem, this code + * is set up so that you can use it in either of two ways: + * + * - The slow generic way: set up platform_data to hold the GPIO + * numbers used for MISO/MOSI/SCK, and issue procedure calls for + * each of them. This driver can handle several such busses. + * + * - The quicker inlined way: only helps with platform GPIO code + * that inlines operations for constant GPIOs. This can give + * you tight (fast!) inner loops, but each such bus needs a + * new driver. You'll define a new C file, with Makefile and + * Kconfig support; the C code can be a total of six lines: + * + * #define DRIVER_NAME "myboard_spi2" + * #define SPI_MISO_GPIO 119 + * #define SPI_MOSI_GPIO 120 + * #define SPI_SCK_GPIO 121 + * #define SPI_N_CHIPSEL 4 + * #include "spi-gpio.c" + */ + +#ifndef DRIVER_NAME +#define DRIVER_NAME "wb_spi_gpio" + +#define GENERIC_BITBANG /* vs tight inlines */ + +#endif + +/*----------------------------------------------------------------------*/ + +static inline struct spi_gpio *__pure +spi_to_spi_gpio(const struct spi_device *spi) +{ + const struct spi_bitbang *bang; + struct spi_gpio *spi_gpio; + + bang = spi_controller_get_devdata(spi->controller); + spi_gpio = container_of(bang, struct spi_gpio, bitbang); + return spi_gpio; +} + +/* These helpers are in turn called by the bitbang inlines */ +static inline void setsck(const struct spi_device *spi, int is_on) +{ + struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi); + + gpiod_set_value_cansleep(spi_gpio->sck, is_on); +} + +static inline void setmosi(const struct spi_device *spi, int is_on) +{ + struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi); + + gpiod_set_value_cansleep(spi_gpio->mosi, is_on); +} + +static inline int getmiso(const struct spi_device *spi) +{ + struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi); + + if (spi->mode & SPI_3WIRE) + return !!gpiod_get_value_cansleep(spi_gpio->mosi); + else + return !!gpiod_get_value_cansleep(spi_gpio->miso); +} + +/* + * NOTE: this clocks "as fast as we can". It "should" be a function of the + * requested device clock. Software overhead means we usually have trouble + * reaching even one Mbit/sec (except when we can inline bitops), so for now + * we'll just assume we never need additional per-bit slowdowns. + */ + #if 0 +#define spidelay(nsecs) do {} while (0) +#endif +static int spi_gpio_get_delay_time(unsigned nsecs) +{ + int delay_time_us; + + /* Frequency greater than 1M, return 0 as fast as we can */ + if (nsecs < 1000) { + return 0; + } + + /* Convert ns to us and round up */ + delay_time_us = (nsecs + 1000 - 1) / 1000; + + return delay_time_us; +} + +static void spidelay(unsigned nsecs) +{ + u32 delay_time_us; + /* Convert ns to us and round up */ + delay_time_us = spi_gpio_get_delay_time(nsecs); + if (delay_time_us >= 1) { + udelay(delay_time_us); + } + return; +} + +static void print_spi_debug_info(const char *mode, unsigned nsecs) +{ + if (nsecs_debug_time > 0) { + nsecs_debug_time--; + printk("%s, nsecs = %d, delay = %d\n", mode, nsecs, spi_gpio_get_delay_time(nsecs)); + } +} +#include "spi-bitbang-txrx.h" + +/* + * These functions can leverage inline expansion of GPIO calls to shrink + * costs for a txrx bit, often by factors of around ten (by instruction + * count). That is particularly visible for larger word sizes, but helps + * even with default 8-bit words. + * + * REVISIT overheads calling these functions for each word also have + * significant performance costs. Having txrx_bufs() calls that inline + * the txrx_word() logic would help performance, e.g. on larger blocks + * used with flash storage or MMC/SD. There should also be ways to make + * GCC be less stupid about reloading registers inside the I/O loops, + * even without inlined GPIO calls; __attribute__((hot)) on GCC 4.3? + */ + +static u32 spi_gpio_txrx_word_mode0(struct spi_device *spi, + unsigned nsecs, u32 word, u8 bits, unsigned flags) +{ + print_spi_debug_info(__func__, nsecs); + + if (unlikely(spi->mode & SPI_LSB_FIRST)) + return bitbang_txrx_le_cpha0(spi, nsecs, 0, flags, word, bits); + else + return bitbang_txrx_be_cpha0(spi, nsecs, 0, flags, word, bits); +} + +static u32 spi_gpio_txrx_word_mode1(struct spi_device *spi, + unsigned nsecs, u32 word, u8 bits, unsigned flags) +{ + print_spi_debug_info(__func__, nsecs); + + if (unlikely(spi->mode & SPI_LSB_FIRST)) + return bitbang_txrx_le_cpha1(spi, nsecs, 0, flags, word, bits); + else + return bitbang_txrx_be_cpha1(spi, nsecs, 0, flags, word, bits); +} + +static u32 spi_gpio_txrx_word_mode2(struct spi_device *spi, + unsigned nsecs, u32 word, u8 bits, unsigned flags) +{ + print_spi_debug_info(__func__, nsecs); + + if (unlikely(spi->mode & SPI_LSB_FIRST)) + return bitbang_txrx_le_cpha0(spi, nsecs, 1, flags, word, bits); + else + return bitbang_txrx_be_cpha0(spi, nsecs, 1, flags, word, bits); +} + +static u32 spi_gpio_txrx_word_mode3(struct spi_device *spi, + unsigned nsecs, u32 word, u8 bits, unsigned flags) +{ + print_spi_debug_info(__func__, nsecs); + + if (unlikely(spi->mode & SPI_LSB_FIRST)) + return bitbang_txrx_le_cpha1(spi, nsecs, 1, flags, word, bits); + else + return bitbang_txrx_be_cpha1(spi, nsecs, 1, flags, word, bits); +} + +/* + * These functions do not call setmosi or getmiso if respective flag + * (SPI_CONTROLLER_NO_RX or SPI_CONTROLLER_NO_TX) is set, so they are safe to + * call when such pin is not present or defined in the controller. + * A separate set of callbacks is defined to get highest possible + * speed in the generic case (when both MISO and MOSI lines are + * available), as optimiser will remove the checks when argument is + * constant. + */ + +static u32 spi_gpio_spec_txrx_word_mode0(struct spi_device *spi, + unsigned nsecs, u32 word, u8 bits, unsigned flags) +{ + print_spi_debug_info(__func__, nsecs); + + flags = spi->controller->flags; + if (unlikely(spi->mode & SPI_LSB_FIRST)) + return bitbang_txrx_le_cpha0(spi, nsecs, 0, flags, word, bits); + else + return bitbang_txrx_be_cpha0(spi, nsecs, 0, flags, word, bits); +} + +static u32 spi_gpio_spec_txrx_word_mode1(struct spi_device *spi, + unsigned nsecs, u32 word, u8 bits, unsigned flags) +{ + print_spi_debug_info(__func__, nsecs); + + flags = spi->controller->flags; + if (unlikely(spi->mode & SPI_LSB_FIRST)) + return bitbang_txrx_le_cpha1(spi, nsecs, 0, flags, word, bits); + else + return bitbang_txrx_be_cpha1(spi, nsecs, 0, flags, word, bits); +} + +static u32 spi_gpio_spec_txrx_word_mode2(struct spi_device *spi, + unsigned nsecs, u32 word, u8 bits, unsigned flags) +{ + print_spi_debug_info(__func__, nsecs); + + flags = spi->controller->flags; + if (unlikely(spi->mode & SPI_LSB_FIRST)) + return bitbang_txrx_le_cpha0(spi, nsecs, 1, flags, word, bits); + else + return bitbang_txrx_be_cpha0(spi, nsecs, 1, flags, word, bits); +} + +static u32 spi_gpio_spec_txrx_word_mode3(struct spi_device *spi, + unsigned nsecs, u32 word, u8 bits, unsigned flags) +{ + print_spi_debug_info(__func__, nsecs); + + flags = spi->controller->flags; + if (unlikely(spi->mode & SPI_LSB_FIRST)) + return bitbang_txrx_le_cpha1(spi, nsecs, 1, flags, word, bits); + else + return bitbang_txrx_be_cpha1(spi, nsecs, 1, flags, word, bits); +} + +/*----------------------------------------------------------------------*/ + +static void spi_gpio_chipselect(struct spi_device *spi, int is_active) +{ + struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi); + + /* set initial clock line level */ + if (is_active) + gpiod_set_value_cansleep(spi_gpio->sck, spi->mode & SPI_CPOL); + + /* Drive chip select line, if we have one */ + if (spi_gpio->cs_gpios) { + struct gpio_desc *cs = spi_gpio->cs_gpios[spi_get_chipselect(spi, 0)]; + + /* SPI chip selects are normally active-low */ + gpiod_set_value_cansleep(cs, (spi->mode & SPI_CS_HIGH) ? is_active : !is_active); + } +} + +static void spi_gpio_set_mosi_idle(struct spi_device *spi) +{ + struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi); + + gpiod_set_value_cansleep(spi_gpio->mosi, + !!(spi->mode & SPI_MOSI_IDLE_HIGH)); +} + +static int spi_gpio_setup(struct spi_device *spi) +{ + struct gpio_desc *cs; + struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi); + int ret; + + /* + * The CS GPIOs have already been + * initialized from the descriptor lookup. + */ + if (spi_gpio->cs_gpios) { + cs = spi_gpio->cs_gpios[spi_get_chipselect(spi, 0)]; + if (!spi->controller_state && cs) { + ret = gpiod_direction_output(cs, !(spi->mode & SPI_CS_HIGH)); + if (ret) + return ret; + } + } + + return spi_bitbang_setup(spi); +} + +static int spi_gpio_set_direction(struct spi_device *spi, bool output) +{ + struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi); + int ret; + + if (output) + return gpiod_direction_output(spi_gpio->mosi, 1); + + /* + * Only change MOSI to an input if using 3WIRE mode. + * Otherwise, MOSI could be left floating if there is + * no pull resistor connected to the I/O pin, or could + * be left logic high if there is a pull-up. Transmitting + * logic high when only clocking MISO data in can put some + * SPI devices in to a bad state. + */ + if (spi->mode & SPI_3WIRE) { + ret = gpiod_direction_input(spi_gpio->mosi); + if (ret) + return ret; + } + /* + * Send a turnaround high impedance cycle when switching + * from output to input. Theoretically there should be + * a clock delay here, but as has been noted above, the + * nsec delay function for bit-banged GPIO is simply + * {} because bit-banging just doesn't get fast enough + * anyway. + */ + if (spi->mode & SPI_3WIRE_HIZ) { + gpiod_set_value_cansleep(spi_gpio->sck, + !(spi->mode & SPI_CPOL)); + gpiod_set_value_cansleep(spi_gpio->sck, + !!(spi->mode & SPI_CPOL)); + } + return 0; +} + +static void spi_gpio_cleanup(struct spi_device *spi) +{ + spi_bitbang_cleanup(spi); +} + +/* + * It can be convenient to use this driver with pins that have alternate + * functions associated with a "native" SPI controller if a driver for that + * controller is not available, or is missing important functionality. + * + * On platforms which can do so, configure MISO with a weak pullup unless + * there's an external pullup on that signal. That saves power by avoiding + * floating signals. (A weak pulldown would save power too, but many + * drivers expect to see all-ones data as the no target "response".) + */ +static int spi_gpio_request(struct device *dev, struct spi_gpio *spi_gpio) +{ + spi_gpio->mosi = devm_gpiod_get_optional(dev, "mosi", GPIOD_OUT_LOW); + if (IS_ERR(spi_gpio->mosi)) + return PTR_ERR(spi_gpio->mosi); + + spi_gpio->miso = devm_gpiod_get_optional(dev, "miso", GPIOD_IN); + if (IS_ERR(spi_gpio->miso)) + return PTR_ERR(spi_gpio->miso); + + spi_gpio->sck = devm_gpiod_get(dev, "sck", GPIOD_OUT_LOW); + return PTR_ERR_OR_ZERO(spi_gpio->sck); +} + +static int spi_gpio_probe_pdata(struct platform_device *pdev, + struct spi_controller *host) +{ + struct device *dev = &pdev->dev; + struct spi_gpio_platform_data *pdata = dev_get_platdata(dev); + struct spi_gpio *spi_gpio = spi_controller_get_devdata(host); + int i; + +#ifdef GENERIC_BITBANG + if (!pdata || !pdata->num_chipselect) + return -ENODEV; +#endif + /* + * The host needs to think there is a chipselect even if not + * connected + */ + host->num_chipselect = pdata->num_chipselect ?: 1; + + spi_gpio->cs_gpios = devm_kcalloc(dev, host->num_chipselect, + sizeof(*spi_gpio->cs_gpios), + GFP_KERNEL); + if (!spi_gpio->cs_gpios) + return -ENOMEM; + + for (i = 0; i < host->num_chipselect; i++) { + spi_gpio->cs_gpios[i] = devm_gpiod_get_index(dev, "cs", i, + GPIOD_OUT_HIGH); + if (IS_ERR(spi_gpio->cs_gpios[i])) + return PTR_ERR(spi_gpio->cs_gpios[i]); + } + + return 0; +} + +static int spi_gpio_probe(struct platform_device *pdev) +{ + int status; + struct spi_controller *host; + struct spi_gpio *spi_gpio; + struct device *dev = &pdev->dev; + struct fwnode_handle *fwnode = dev_fwnode(dev); + struct spi_bitbang *bb; + + host = devm_spi_alloc_host(dev, sizeof(*spi_gpio)); + if (!host) + return -ENOMEM; + + if (fwnode) { + device_set_node(&host->dev, fwnode); + host->use_gpio_descriptors = true; + } else { + status = spi_gpio_probe_pdata(pdev, host); + if (status) + return status; + } + + spi_gpio = spi_controller_get_devdata(host); + + status = spi_gpio_request(dev, spi_gpio); + if (status) + return status; + + host->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32); + host->mode_bits = SPI_3WIRE | SPI_3WIRE_HIZ | SPI_CPHA | SPI_CPOL | + SPI_CS_HIGH | SPI_LSB_FIRST | SPI_MOSI_IDLE_LOW | + SPI_MOSI_IDLE_HIGH; + if (!spi_gpio->mosi) { + /* HW configuration without MOSI pin + * + * No setting SPI_CONTROLLER_NO_RX here - if there is only + * a MOSI pin connected the host can still do RX by + * changing the direction of the line. + */ + host->flags = SPI_CONTROLLER_NO_TX; + } + + host->bus_num = pdev->id; + host->setup = spi_gpio_setup; + host->cleanup = spi_gpio_cleanup; + + bb = &spi_gpio->bitbang; + bb->ctlr = host; + /* + * There is some additional business, apart from driving the CS GPIO + * line, that we need to do on selection. This makes the local + * callback for chipselect always get called. + */ + host->flags |= SPI_CONTROLLER_GPIO_SS; + bb->chipselect = spi_gpio_chipselect; + bb->set_line_direction = spi_gpio_set_direction; + bb->set_mosi_idle = spi_gpio_set_mosi_idle; + + if (host->flags & SPI_CONTROLLER_NO_TX) { + bb->txrx_word[SPI_MODE_0] = spi_gpio_spec_txrx_word_mode0; + bb->txrx_word[SPI_MODE_1] = spi_gpio_spec_txrx_word_mode1; + bb->txrx_word[SPI_MODE_2] = spi_gpio_spec_txrx_word_mode2; + bb->txrx_word[SPI_MODE_3] = spi_gpio_spec_txrx_word_mode3; + } else { + bb->txrx_word[SPI_MODE_0] = spi_gpio_txrx_word_mode0; + bb->txrx_word[SPI_MODE_1] = spi_gpio_txrx_word_mode1; + bb->txrx_word[SPI_MODE_2] = spi_gpio_txrx_word_mode2; + bb->txrx_word[SPI_MODE_3] = spi_gpio_txrx_word_mode3; + } + bb->setup_transfer = spi_bitbang_setup_transfer; + + status = spi_bitbang_init(&spi_gpio->bitbang); + if (status) + return status; + + return devm_spi_register_controller(&pdev->dev, host); +} + +MODULE_ALIAS("platform:" DRIVER_NAME); + +static const struct of_device_id spi_gpio_dt_ids[] = { + { .compatible = "wb-spi-gpio" }, + {} +}; +MODULE_DEVICE_TABLE(of, spi_gpio_dt_ids); + +static struct platform_driver spi_gpio_driver = { + .driver = { + .name = DRIVER_NAME, + .of_match_table = spi_gpio_dt_ids, + }, + .probe = spi_gpio_probe, +}; +module_platform_driver(spi_gpio_driver); + +MODULE_DESCRIPTION("SPI host driver using generic bitbanged GPIO "); +MODULE_AUTHOR("support"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/modules/driver/wb_spi_gpio_device_cpld.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/modules/driver/wb_spi_gpio_device_cpld.c new file mode 100644 index 00000000000..46bd398d284 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/modules/driver/wb_spi_gpio_device_cpld.c @@ -0,0 +1,148 @@ +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include + + +#define DEFAULT_GPIO_SCK (115) +#define DEFAULT_GPIO_MISO (92) +#define DEFAULT_GPIO_MOSI (116) +#define DEFAULT_GPIO_CS (38) +#define DEFAULT_SPI_BUS (1) + +static int sck = DEFAULT_GPIO_SCK; +module_param(sck, int, S_IRUGO | S_IWUSR); + +static int miso = DEFAULT_GPIO_MISO; +module_param(miso, int, S_IRUGO | S_IWUSR); + +static int mosi = DEFAULT_GPIO_MOSI; +module_param(mosi, int, S_IRUGO | S_IWUSR); + +static int cs = DEFAULT_GPIO_CS; +module_param(cs, int, S_IRUGO | S_IWUSR); + +static int bus = DEFAULT_SPI_BUS; +module_param(bus, int, S_IRUGO | S_IWUSR); + +static int debug = 0; +module_param(debug, int, S_IRUGO | S_IWUSR); + +static char gpiod_lookup_table_devid[64]; + +static char *gpio_chip_name = NULL; +module_param(gpio_chip_name, charp, 0644); +MODULE_PARM_DESC(str_var, "A string variable for GPIO controller"); + +static struct gpiod_lookup_table wb_spi_gpio_table = { + .table = { + GPIO_LOOKUP("AMDI0030:00", DEFAULT_GPIO_SCK, + "sck", GPIO_ACTIVE_HIGH), + GPIO_LOOKUP("AMDI0030:00", DEFAULT_GPIO_MOSI, + "mosi", GPIO_ACTIVE_HIGH), + GPIO_LOOKUP("AMDI0030:00", DEFAULT_GPIO_MISO, + "miso", GPIO_ACTIVE_HIGH), + GPIO_LOOKUP("AMDI0030:00", DEFAULT_GPIO_CS, + "cs", GPIO_ACTIVE_HIGH), + { }, + }, +}; + +static struct spi_gpio_platform_data spi_pdata = { + .num_chipselect = 1, +}; + +static void spi_gpio_release(struct device *dev) +{ + return; +} + +static struct platform_device wb_spi_gpio_device = { + .name = "wb_spi_gpio", + .num_resources = 0, + .id = -1, + + .dev = { + .platform_data = &spi_pdata, + .release = spi_gpio_release, + } +}; + +static void wb_spi_gpio_table_devid_name_set(void) { + int size; + + size = sizeof(gpiod_lookup_table_devid); + wb_spi_gpio_device.id = bus; + + mem_clear(gpiod_lookup_table_devid, size); + switch (bus) { + case PLATFORM_DEVID_NONE: + snprintf(gpiod_lookup_table_devid, size, "%s", wb_spi_gpio_device.name); + break; + case PLATFORM_DEVID_AUTO: + snprintf(gpiod_lookup_table_devid, size, "%s.%d.auto", wb_spi_gpio_device.name, bus); + break; + default: + snprintf(gpiod_lookup_table_devid, size, "%s.%d", wb_spi_gpio_device.name, bus); + break; + } + + wb_spi_gpio_table.dev_id = gpiod_lookup_table_devid; + return ; +} +static int __init wb_spi_gpio_device_init(void) +{ + int err; + struct gpiod_lookup *p; + + DEBUG_VERBOSE("enter!\n"); + wb_spi_gpio_table.table[0].chip_hwnum = sck; + wb_spi_gpio_table.table[1].chip_hwnum = mosi; + wb_spi_gpio_table.table[2].chip_hwnum = miso; + wb_spi_gpio_table.table[3].chip_hwnum = cs; + if (gpio_chip_name) { + wb_spi_gpio_table.table[0].key = gpio_chip_name; + wb_spi_gpio_table.table[1].key = gpio_chip_name; + wb_spi_gpio_table.table[2].key = gpio_chip_name; + wb_spi_gpio_table.table[3].key = gpio_chip_name; + } + wb_spi_gpio_table_devid_name_set(); + DEBUG_VERBOSE("spi gpi device table bus[%d] dev id[%s]\n", bus, wb_spi_gpio_table.dev_id); + for (p = &wb_spi_gpio_table.table[0]; p->key; p++) { + DEBUG_VERBOSE("con_id:%s gpio:%d\n", p->con_id, p->chip_hwnum); + } + + gpiod_add_lookup_table(&wb_spi_gpio_table); + err = platform_device_register(&wb_spi_gpio_device); + if (err < 0) { + printk(KERN_ERR "register spi gpio device fail(%d). \n", err); + gpiod_remove_lookup_table(&wb_spi_gpio_table); + return -1; + } + + return 0; +} + +static void __exit wb_spi_gpio_device_exit(void) +{ + DEBUG_VERBOSE("enter!\n"); + platform_device_unregister(&wb_spi_gpio_device); + gpiod_remove_lookup_table(&wb_spi_gpio_table); +} + +module_init(wb_spi_gpio_device_init); +module_exit(wb_spi_gpio_device_exit); +MODULE_DESCRIPTION("SPI GPIO Devices"); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("support"); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/modules/driver/wb_switch_dev_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/modules/driver/wb_switch_dev_device.c new file mode 100644 index 00000000000..979683c6c76 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/modules/driver/wb_switch_dev_device.c @@ -0,0 +1,81 @@ +#include +#include +#include +#include +#include + +#include +#include + +static int debug = 0; +module_param(debug, int, S_IRUGO | S_IWUSR); + +static void wb_switch_dev_device_release(struct device *dev) +{ + return; +} + +static switch_dev_info_t switch_dev_info_array[] = { + { + .mdio_bus_name = "gpio", + .mdio_dev_device = { + { .dev_name = "cpu_phy" }, + { .dev_name = "mgmt_phy"}, + { .dev_name = "port2_phy"}, + { .dev_name = "port3_phy"}, + { .dev_name = "sfp_phy"}, + }, + }, +}; + +/* Platform devices for switches */ +static struct platform_device switch_dev_device_array[] = { + { + .name = "bcm53134", + .id = 1, /* Device ID for switch 0 */ + .dev = { + .platform_data = &switch_dev_info_array[0], + .release = wb_switch_dev_device_release, + }, + }, +}; + +static int __init wb_switch_dev_device_init(void) +{ + int i; + int ret = 0; + switch_dev_info_t *switch_dev_info; + + DEBUG_VERBOSE("enter!\n"); + for (i = 0; i < ARRAY_SIZE(switch_dev_device_array); i++) { + switch_dev_info = switch_dev_device_array[i].dev.platform_data; + ret = platform_device_register(&switch_dev_device_array[i]); + if (ret < 0) { + switch_dev_info->device_flag = -1; /* device register failed, set flag -1 */ + printk(KERN_ERR "switch device.%d register failed!\n", i + 1); + } else { + switch_dev_info->device_flag = 0; /* device register success, set flag 0 */ + } + } + return 0; +} + +static void __exit wb_switch_dev_device_exit(void) +{ + int i; + switch_dev_info_t *switch_dev_info; + + DEBUG_VERBOSE("enter!\n"); + for (i = ARRAY_SIZE(switch_dev_device_array) - 1; i >= 0; i--) { + switch_dev_info = switch_dev_device_array[i].dev.platform_data; + if (switch_dev_info->device_flag == 0) { /* device register success, need unregister */ + platform_device_unregister(&switch_dev_device_array[i]); + } + } +} + +module_init(wb_switch_dev_device_init); +module_exit(wb_switch_dev_device_exit); +MODULE_DESCRIPTION("Generic Switch Devices"); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("support"); \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/modules/driver/wb_vr_common_dev_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/modules/driver/wb_vr_common_dev_device.c new file mode 100644 index 00000000000..613169b7dd4 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/modules/driver/wb_vr_common_dev_device.c @@ -0,0 +1,130 @@ +#include +#include +#include +#include +#include + +#include +#include + +static int debug = 0; +module_param(debug, int, S_IRUGO | S_IWUSR); + +#define WB_VR_DEVICE_NAME(_bus, _addr) vr_device_data##_bus##_##_addr + +#define WB_VR_DEVICE_DEFINE(_bus, _addr) \ + wb_vr_common_device_t WB_VR_DEVICE_NAME(_bus, _addr) = \ + { .i2c_bus = (_bus), .i2c_addr = (_addr), .device_flag = 0 } + +static WB_VR_DEVICE_DEFINE(54 , 0x72); +static WB_VR_DEVICE_DEFINE(54 , 0x74); +static WB_VR_DEVICE_DEFINE(94 , 0x60); +static WB_VR_DEVICE_DEFINE(95 , 0x60); +static WB_VR_DEVICE_DEFINE(96 , 0x60); +static WB_VR_DEVICE_DEFINE(97 , 0x60); +static WB_VR_DEVICE_DEFINE(102, 0x60); +static WB_VR_DEVICE_DEFINE(103, 0x60); +static WB_VR_DEVICE_DEFINE(104, 0x60); +static WB_VR_DEVICE_DEFINE(105, 0x60); +static WB_VR_DEVICE_DEFINE(107, 0x60); +static WB_VR_DEVICE_DEFINE(108, 0x60); +static WB_VR_DEVICE_DEFINE(109, 0x60); +static WB_VR_DEVICE_DEFINE(110, 0x60); +static WB_VR_DEVICE_DEFINE(111, 0x60); +static WB_VR_DEVICE_DEFINE(112, 0x60); +static WB_VR_DEVICE_DEFINE(113, 0x60); +static WB_VR_DEVICE_DEFINE(114, 0x60); +static WB_VR_DEVICE_DEFINE(115, 0x60); +static WB_VR_DEVICE_DEFINE(116, 0x60); +static WB_VR_DEVICE_DEFINE(117, 0x60); +static WB_VR_DEVICE_DEFINE(118, 0x60); +static WB_VR_DEVICE_DEFINE(119, 0x60); +static WB_VR_DEVICE_DEFINE(120, 0x60); +static WB_VR_DEVICE_DEFINE(121, 0x60); +static WB_VR_DEVICE_DEFINE(122, 0x60); +static WB_VR_DEVICE_DEFINE(136, 0x60); + +static void wb_io_dev_device_release(struct device *dev) +{ + return; +} + +#define WB_VR_DEV_ENTRY(_id, _bus, _addr) \ + { \ + .name = "wb-vr-common", \ + .id = (_id), \ + .dev = { \ + .platform_data = &WB_VR_DEVICE_NAME(_bus, _addr), \ + .release = wb_io_dev_device_release, \ + }, \ + } + +static struct platform_device vr_dev_devices[] = { + WB_VR_DEV_ENTRY(1, 54, 0x72), + WB_VR_DEV_ENTRY(2, 54, 0x74), + WB_VR_DEV_ENTRY(3, 94, 0x60), + WB_VR_DEV_ENTRY(4, 95, 0x60), + WB_VR_DEV_ENTRY(5, 96, 0x60), + WB_VR_DEV_ENTRY(6, 97, 0x60), + WB_VR_DEV_ENTRY(7, 102, 0x60), + WB_VR_DEV_ENTRY(8, 103, 0x60), + WB_VR_DEV_ENTRY(9, 104, 0x60), + WB_VR_DEV_ENTRY(10, 105, 0x60), + WB_VR_DEV_ENTRY(11, 107, 0x60), + WB_VR_DEV_ENTRY(12, 108, 0x60), + WB_VR_DEV_ENTRY(13, 109, 0x60), + WB_VR_DEV_ENTRY(14, 110, 0x60), + WB_VR_DEV_ENTRY(15, 111, 0x60), + WB_VR_DEV_ENTRY(16, 112, 0x60), + WB_VR_DEV_ENTRY(17, 113, 0x60), + WB_VR_DEV_ENTRY(18, 114, 0x60), + WB_VR_DEV_ENTRY(19, 115, 0x60), + WB_VR_DEV_ENTRY(20, 116, 0x60), + WB_VR_DEV_ENTRY(21, 117, 0x60), + WB_VR_DEV_ENTRY(22, 118, 0x60), + WB_VR_DEV_ENTRY(23, 119, 0x60), + WB_VR_DEV_ENTRY(24, 120, 0x60), + WB_VR_DEV_ENTRY(25, 121, 0x60), + WB_VR_DEV_ENTRY(26, 122, 0x60), + WB_VR_DEV_ENTRY(27, 136, 0x60), +}; + +static int __init wb_vr_dev_device_init(void) +{ + int i; + int ret = 0; + wb_vr_common_device_t *vr_dev_data; + + DEBUG_VERBOSE("enter!\n"); + for (i = 0; i < ARRAY_SIZE(vr_dev_devices); i++) { + vr_dev_data = vr_dev_devices[i].dev.platform_data; + ret = platform_device_register(&vr_dev_devices[i]); + if (ret < 0) { + vr_dev_data->device_flag = -1; /* device register failed, set flag -1 */ + printk(KERN_ERR "wb-vr-dev.%d register failed!\n", i + 1); + } else { + vr_dev_data->device_flag = 0; /* device register suucess, set flag 0 */ + } + } + return 0; +} + +static void __exit wb_vr_dev_device_exit(void) +{ + int i; + wb_vr_common_device_t *vr_dev_data; + + DEBUG_VERBOSE("enter!\n"); + for (i = ARRAY_SIZE(vr_dev_devices) - 1; i >= 0; i--) { + vr_dev_data = vr_dev_devices[i].dev.platform_data; + if (vr_dev_data->device_flag == 0) { /* device register success, need unregister */ + platform_device_unregister(&vr_dev_devices[i]); + } + } +} + +module_init(wb_vr_dev_device_init); +module_exit(wb_vr_dev_device_exit); +MODULE_DESCRIPTION("VR DEV Devices"); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("support"); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/modules/driver/wb_wdt_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/modules/driver/wb_wdt_device.c new file mode 100644 index 00000000000..dc2327c1c58 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/modules/driver/wb_wdt_device.c @@ -0,0 +1,120 @@ +#include +#include +#include +#include +#include + +#include +#include + +static int debug = 0; +module_param(debug, int, S_IRUGO | S_IWUSR); + +static wb_wdt_device_t wb_wdt_device_data_0 = { + .feed_wdt_type = 1, /* 0: WATCHDOG_DEVICE 1: HRTIMER, 2: THREAD */ + .hw_margin = 90000, + .feed_time = 5000, + .config_dev_name = "/dev/cpld1", + .config_mode = 1, /* GPIO_FEED_WDT */ + .priv_func_mode = 1, /* SYMBOL_I2C_DEV */ + .enable_reg = 0xb0, + .enable_val = 0x1, + .disable_val = 0x0, + .enable_mask = 0x1, + .timeout_cfg_reg = 0xb2, + .timeleft_cfg_reg = 0xb3, + .hw_algo = "toggle", + .wdt_config_mode.gpio_wdt = { + .gpio = 642, /* AGPIO130 */ + .flags = 1 + }, + .timer_accuracy = 1600, /* 1.6s */ +}; + +/* sys led */ +static wb_wdt_device_t wb_wdt_device_data_1 = { + .feed_wdt_type = 2, /* 0: WATCHDOG_DEVICE 1: HRTIMER, 2: THREAD */ + .hw_margin = 180000, + .feed_time = 30000, + .config_dev_name = "/dev/cpld1", + .config_mode = 2, /* LOGIC_FEED_WDT */ + .priv_func_mode = 1, /* SYMBOL_I2C_DEV */ + .enable_reg = 0xc0, + .enable_val = 0x1, + .disable_val = 0x0, + .enable_mask = 0x1, + .timeout_cfg_reg = 0xc2, + .timeleft_cfg_reg = 0xc3, + .hw_algo = "eigenvalues", + .wdt_config_mode.logic_wdt = { + .feed_dev_name = "/dev/cpld1", + .feed_reg = 0xc4, + .active_val = 0x01, + .logic_func_mode = 1, /* SYMBOL_I2C_DEV */ + }, + .timer_accuracy = 1600, /* 1.6s */ +}; + +static void wb_wdt_device_release(struct device *dev) +{ + return; +} + +static struct platform_device wb_wdt_device[] = { + { + .name = "wb_wdt", + .id = 0, + .dev = { + .platform_data = &wb_wdt_device_data_0, + .release = wb_wdt_device_release, + }, + }, + { + .name = "wb_wdt", + .id = 1, + .dev = { + .platform_data = &wb_wdt_device_data_1, + .release = wb_wdt_device_release, + }, + }, +}; + +static int __init wb_wdt_device_init(void) +{ + int i; + int ret = 0; + wb_wdt_device_t *wb_wdt_device_data; + + DEBUG_VERBOSE("enter!\n"); + for (i = 0; i < ARRAY_SIZE(wb_wdt_device); i++) { + wb_wdt_device_data = wb_wdt_device[i].dev.platform_data; + ret = platform_device_register(&wb_wdt_device[i]); + if (ret < 0) { + wb_wdt_device_data->device_flag = -1; /* device register failed, set flag -1 */ + printk(KERN_ERR "wb-wdt.%d register failed!\n", i + 1); + } else { + wb_wdt_device_data->device_flag = 0; /* device register suucess, set flag 0 */ + } + } + return 0; +} + +static void __exit wb_wdt_device_exit(void) +{ + int i; + wb_wdt_device_t *wb_wdt_device_data; + + DEBUG_VERBOSE("enter!\n"); + for (i = ARRAY_SIZE(wb_wdt_device) - 1; i >= 0; i--) { + wb_wdt_device_data = wb_wdt_device[i].dev.platform_data; + if (wb_wdt_device_data->device_flag == 0) { /* device register success, need unregister */ + platform_device_unregister(&wb_wdt_device[i]); + } + } +} + +module_init(wb_wdt_device_init); +module_exit(wb_wdt_device_exit); +MODULE_DESCRIPTION("WB WDT Devices"); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("support"); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/s3ip_sysfs_cfg/cfg_file/CPLD.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/s3ip_sysfs_cfg/cfg_file/CPLD.cfg new file mode 100644 index 00000000000..5e79ed022fe --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/s3ip_sysfs_cfg/cfg_file/CPLD.cfg @@ -0,0 +1,412 @@ +# +# @Fill in the agreement +# 1. Complete comments must be filled in before configuration items. Comments must not be filled in the same line of +# configuration items and invalid Spaces must not be added between configuration items +# 2. The value can be in 10 or hexadecimal format. The hexadecimal value starts with "0x" +# 3. Some configuration items do not need to be filled in a specific product. To facilitate other products to copy and +# fill in the configuration items, do not delete them +# 4. Configuration item + +# Set item: System E2 i2c bus address +# Description: Format other_i2c_dev.bus_[main_dev]_[minor_dev] other_i2c_dev.addr_[main_dev]_[minor_dev], +# .bus is configuration item corresponds to the bus number (/dev/i2c-bus) +# .addr is address of the device corresponding to the configuration item on the bus +# Note: main_dev look rg_main_dev_type_t definition, main board is 0, minor_dev is 0 +other_i2c_dev.bus_0_0=1 +other_i2c_dev.addr_0_0=0x56 + +# Configuration item: System E2 path +eeprom_path_0_0=/sys/bus/i2c/devices/1-0056/eeprom + +# Configuration item: System E2 size +eeprom_size_0_0=256 + +# Configuration item: cpld logic_dev patch +# Description: Format cpld_logic_dev_[cpld_slot]_[cpld_id] +# All cpld numbers of each product are customized and do not have to be repeated. +# The numbers are reflected in the upper eight digits of the offset address of the cpld device +# cpld_id: 0:X86_CPLD, 1:MAC_CPLDA, 2:MAC_CPLDB +# Note: This field is optional. This field is not required for CPLDS that are not accessed by logic_dev +cpld_logic_dev_0_0=/dev/cpld0 +cpld_logic_dev_0_1=/dev/cpld1 +cpld_logic_dev_0_2=/dev/cpld2 +cpld_logic_dev_0_3=/dev/cpld3 +cpld_logic_dev_0_4=/dev/cpld4 +cpld_logic_dev_0_5=/dev/cpld5 +cpld_logic_dev_0_6=/dev/cpld6 +cpld_logic_dev_0_7=/dev/cpld7 +cpld_logic_dev_0_8=/dev/cpld8 +cpld_logic_dev_0_9=/dev/cpld9 + + +# Configuration item: Access mode of each cpld(LPC/I2C) +# Description: Format mode_cpld_[cpld_slot][cpld_slot]=lpc/i2c/logic_dev, cpld_id is cpld number,Start at 0 +# Note: This field is required +mode_cpld_0_0=logic_dev +mode_cpld_0_1=logic_dev +mode_cpld_0_2=logic_dev +mode_cpld_0_3=logic_dev +mode_cpld_0_4=logic_dev +mode_cpld_0_5=logic_dev +mode_cpld_0_6=logic_dev +mode_cpld_0_7=logic_dev +mode_cpld_0_8=logic_dev +mode_cpld_0_9=logic_dev + + +# Configuration item: the number of CPLD +# Description: Format dev_num_[main_dev]_[minor_dev] +# Note: main_dev: indicates that the mainboard is 0, the subPLD is 5, and the minor_dev: CPLD is 8 +dev_num_0_8=10 + +# Configuration item: Name of each cpld +# Description: Format cpld_name_[cpld_id] cpld_id is cpld number,start with 1 +# Note: This field is required +cpld_name_0_0=CPU_CPLD +cpld_name_0_1=MGMT_CPLD +cpld_name_0_2=MAC_CPLD_A +cpld_name_0_3=MAC_CPLD_B +cpld_name_0_4=MAC_CPLD_C +cpld_name_0_5=UPORT_CPLD +cpld_name_0_6=DPORT_CPLD +cpld_name_0_7=UFAN_CPLD +cpld_name_0_8=DFAN_CPLD +cpld_name_0_9=MAC_CPLD_D + +# Configuration item: Model of each cpld +# Description: Format cpld_type_[cpld_id] cpld_idis cpld number,start with 1 +# Note: This frequired +cpld_type_0_0=LCMXO3LF-6900C-5BG400C +cpld_type_0_1=LCMXO3LF-6900C-5BG400C +cpld_type_0_2=LCMXO3LF-6900C-5BG400C +cpld_type_0_3=LCMXO3LF-4300C-5BG324C +cpld_type_0_4=LCMXO3LF-6900C-5BG400C +cpld_type_0_5=LCMXO3LF-6900C-5BG400C +cpld_type_0_6=LCMXO3LF-6900C-5BG400C +cpld_type_0_7=LCMXO3LF-2100C-5BG256C +cpld_type_0_8=LCMXO3LF-2100C-5BG256C +cpld_type_0_9=LCMXO3LF-2100C-5BG256C + +cpld_vendor_0_0=LATTICE +cpld_vendor_0_1=LATTICE +cpld_vendor_0_2=LATTICE +cpld_vendor_0_3=LATTICE +cpld_vendor_0_4=LATTICE +cpld_vendor_0_5=LATTICE +cpld_vendor_0_6=LATTICE +cpld_vendor_0_7=LATTICE +cpld_vendor_0_8=LATTICE +cpld_vendor_0_9=LATTICE + +# Configuration item: Version register of each CPLD +# Description: Format cpld_version_[cpld_id] cpld_id is cpld number,start with 1 +# Note: This field is required +cpld_version.mode_0_0=config +cpld_version.int_cons_0_0= +cpld_version.src_0_0=logic_file +cpld_version.frmt_0_0=num_bytes +cpld_version.pola_0_0= +cpld_version.fpath_0_0=/dev/cpld0 +cpld_version.addr_0_0=0x0 +cpld_version.len_0_0=4 +cpld_version.bit_offset_0_0= + +cpld_version.mode_0_1=config +cpld_version.int_cons_0_1= +cpld_version.src_0_1=logic_file +cpld_version.frmt_0_1=num_bytes +cpld_version.pola_0_1= +cpld_version.fpath_0_1=/dev/cpld1 +cpld_version.addr_0_1=0x0 +cpld_version.len_0_1=4 +cpld_version.bit_offset_0_1= + +cpld_version.mode_0_2=config +cpld_version.int_cons_0_2= +cpld_version.src_0_2=logic_file +cpld_version.frmt_0_2=num_bytes +cpld_version.pola_0_2= +cpld_version.fpath_0_2=/dev/cpld2 +cpld_version.addr_0_2=0x0 +cpld_version.len_0_2=4 +cpld_version.bit_offset_0_2= + +cpld_version.mode_0_3=config +cpld_version.int_cons_0_3= +cpld_version.src_0_3=logic_file +cpld_version.frmt_0_3=num_bytes +cpld_version.pola_0_3= +cpld_version.fpath_0_3=/dev/cpld3 +cpld_version.addr_0_3=0x0 +cpld_version.len_0_3=4 +cpld_version.bit_offset_0_3= + +cpld_version.mode_0_4=config +cpld_version.int_cons_0_4= +cpld_version.src_0_4=logic_file +cpld_version.frmt_0_4=num_bytes +cpld_version.pola_0_4= +cpld_version.fpath_0_4=/dev/cpld4 +cpld_version.addr_0_4=0x0 +cpld_version.len_0_4=4 +cpld_version.bit_offset_0_4= + +cpld_version.mode_0_5=config +cpld_version.int_cons_0_5= +cpld_version.src_0_5=logic_file +cpld_version.frmt_0_5=num_bytes +cpld_version.pola_0_5= +cpld_version.fpath_0_5=/dev/cpld5 +cpld_version.addr_0_5=0x0 +cpld_version.len_0_5=4 +cpld_version.bit_offset_0_5= + +cpld_version.mode_0_6=config +cpld_version.int_cons_0_6= +cpld_version.src_0_6=logic_file +cpld_version.frmt_0_6=num_bytes +cpld_version.pola_0_6= +cpld_version.fpath_0_6=/dev/cpld6 +cpld_version.addr_0_6=0x0 +cpld_version.len_0_6=4 +cpld_version.bit_offset_0_6= + +cpld_version.mode_0_7=config +cpld_version.int_cons_0_7= +cpld_version.src_0_7=logic_file +cpld_version.frmt_0_7=num_bytes +cpld_version.pola_0_7= +cpld_version.fpath_0_7=/dev/cpld7 +cpld_version.addr_0_7=0x0 +cpld_version.len_0_7=4 +cpld_version.bit_offset_0_7= + +cpld_version.mode_0_8=config +cpld_version.int_cons_0_8= +cpld_version.src_0_8=logic_file +cpld_version.frmt_0_8=num_bytes +cpld_version.pola_0_8= +cpld_version.fpath_0_8=/dev/cpld8 +cpld_version.addr_0_8=0x0 +cpld_version.len_0_8=4 +cpld_version.bit_offset_0_8= + +cpld_version.mode_0_9=config +cpld_version.int_cons_0_9= +cpld_version.src_0_9=logic_file +cpld_version.frmt_0_9=num_bytes +cpld_version.pola_0_9= +cpld_version.fpath_0_9=/dev/cpld9 +cpld_version.addr_0_9=0x0 +cpld_version.len_0_9=4 +cpld_version.bit_offset_0_9= + +# Configuration item: Test register for each CPLD +# Description: Format cpld_test_reg_[cpld_id] cpld_id is cpld number,start with 1 +# Note: This field is required + +cpld_test_reg.mode_0_0=config +cpld_test_reg.int_cons_0_0= +cpld_test_reg.src_0_0=logic_file +cpld_test_reg.frmt_0_0=byte +cpld_test_reg.pola_0_0= +cpld_test_reg.fpath_0_0=/dev/cpld0 +cpld_test_reg.addr_0_0=0xf +cpld_test_reg.len_0_0=1 +cpld_test_reg.bit_offset_0_0= + +cpld_test_reg.mode_0_1=config +cpld_test_reg.int_cons_0_1= +cpld_test_reg.src_0_1=logic_file +cpld_test_reg.frmt_0_1=byte +cpld_test_reg.pola_0_1= +cpld_test_reg.fpath_0_1=/dev/cpld1 +cpld_test_reg.addr_0_1=0xf +cpld_test_reg.len_0_1=1 +cpld_test_reg.bit_offset_0_1= + +cpld_test_reg.mode_0_2=config +cpld_test_reg.int_cons_0_2= +cpld_test_reg.src_0_2=logic_file +cpld_test_reg.frmt_0_2=byte +cpld_test_reg.pola_0_2= +cpld_test_reg.fpath_0_2=/dev/cpld2 +cpld_test_reg.addr_0_2=0xf +cpld_test_reg.len_0_2=1 +cpld_test_reg.bit_offset_0_2= + +cpld_test_reg.mode_0_3=config +cpld_test_reg.int_cons_0_3= +cpld_test_reg.src_0_3=logic_file +cpld_test_reg.frmt_0_3=byte +cpld_test_reg.pola_0_3= +cpld_test_reg.fpath_0_3=/dev/cpld3 +cpld_test_reg.addr_0_3=0xf +cpld_test_reg.len_0_3=1 +cpld_test_reg.bit_offset_0_3= + +cpld_test_reg.mode_0_4=config +cpld_test_reg.int_cons_0_4= +cpld_test_reg.src_0_4=logic_file +cpld_test_reg.frmt_0_4=byte +cpld_test_reg.pola_0_4= +cpld_test_reg.fpath_0_4=/dev/cpld4 +cpld_test_reg.addr_0_4=0xf +cpld_test_reg.len_0_4=1 +cpld_test_reg.bit_offset_0_4= + +cpld_test_reg.mode_0_5=config +cpld_test_reg.int_cons_0_5= +cpld_test_reg.src_0_5=logic_file +cpld_test_reg.frmt_0_5=byte +cpld_test_reg.pola_0_5= +cpld_test_reg.fpath_0_5=/dev/cpld5 +cpld_test_reg.addr_0_5=0xf +cpld_test_reg.len_0_5=1 +cpld_test_reg.bit_offset_0_5= + +cpld_test_reg.mode_0_6=config +cpld_test_reg.int_cons_0_6= +cpld_test_reg.src_0_6=logic_file +cpld_test_reg.frmt_0_6=byte +cpld_test_reg.pola_0_6= +cpld_test_reg.fpath_0_6=/dev/cpld6 +cpld_test_reg.addr_0_6=0xf +cpld_test_reg.len_0_6=1 +cpld_test_reg.bit_offset_0_6= + +cpld_test_reg.mode_0_7=config +cpld_test_reg.int_cons_0_7= +cpld_test_reg.src_0_7=logic_file +cpld_test_reg.frmt_0_7=byte +cpld_test_reg.pola_0_7= +cpld_test_reg.fpath_0_7=/dev/cpld7 +cpld_test_reg.addr_0_7=0x55 +cpld_test_reg.len_0_7=1 +cpld_test_reg.bit_offset_0_7= + +cpld_test_reg.mode_0_8=config +cpld_test_reg.int_cons_0_8= +cpld_test_reg.src_0_8=logic_file +cpld_test_reg.frmt_0_8=byte +cpld_test_reg.pola_0_8= +cpld_test_reg.fpath_0_8=/dev/cpld8 +cpld_test_reg.addr_0_8=0x55 +cpld_test_reg.len_0_8=1 +cpld_test_reg.bit_offset_0_8= + +cpld_test_reg.mode_0_9=config +cpld_test_reg.int_cons_0_9= +cpld_test_reg.src_0_9=logic_file +cpld_test_reg.frmt_0_9=byte +cpld_test_reg.pola_0_9= +cpld_test_reg.fpath_0_9=/dev/cpld9 +cpld_test_reg.addr_0_9=0x55 +cpld_test_reg.len_0_9=1 +cpld_test_reg.bit_offset_0_9= + +# Configuration item: Hardware version register of each CPLD +# Description: Format cpld_hw_version_[cpld_id] cpld_id is cpld number,start with 1 +# Note: Optional + +cpld_hw_version.mode_0_0=config +cpld_hw_version.int_cons_0_0= +cpld_hw_version.src_0_0=logic_file +cpld_hw_version.frmt_0_0=byte +cpld_hw_version.pola_0_0= +cpld_hw_version.fpath_0_0=/dev/cpld0 +cpld_hw_version.addr_0_0=0x7 +cpld_hw_version.len_0_0=1 +cpld_hw_version.bit_offset_0_0= + +cpld_hw_version.mode_0_1=config +cpld_hw_version.int_cons_0_1= +cpld_hw_version.src_0_1=logic_file +cpld_hw_version.frmt_0_1=byte +cpld_hw_version.pola_0_1= +cpld_hw_version.fpath_0_1=/dev/cpld1 +cpld_hw_version.addr_0_1=0xc +cpld_hw_version.len_0_1=1 +cpld_hw_version.bit_offset_0_1= + +cpld_hw_version.mode_0_2=config +cpld_hw_version.int_cons_0_2= +cpld_hw_version.src_0_2=logic_file +cpld_hw_version.frmt_0_2=byte +cpld_hw_version.pola_0_2= +cpld_hw_version.fpath_0_2=/dev/cpld2 +cpld_hw_version.addr_0_2=0xc +cpld_hw_version.len_0_2=1 +cpld_hw_version.bit_offset_0_2= + +cpld_hw_version.mode_0_3=config +cpld_hw_version.int_cons_0_3= +cpld_hw_version.src_0_3=logic_file +cpld_hw_version.frmt_0_3=byte +cpld_hw_version.pola_0_3= +cpld_hw_version.fpath_0_3=/dev/cpld3 +cpld_hw_version.addr_0_3=0xc +cpld_hw_version.len_0_3=1 +cpld_hw_version.bit_offset_0_3= + +cpld_hw_version.mode_0_4=config +cpld_hw_version.int_cons_0_4= +cpld_hw_version.src_0_4=logic_file +cpld_hw_version.frmt_0_4=byte +cpld_hw_version.pola_0_4= +cpld_hw_version.fpath_0_4=/dev/cpld4 +cpld_hw_version.addr_0_4=0xc +cpld_hw_version.len_0_4=1 +cpld_hw_version.bit_offset_0_4= + +cpld_hw_version.mode_0_5=config +cpld_hw_version.int_cons_0_5= +cpld_hw_version.src_0_5=logic_file +cpld_hw_version.frmt_0_5=byte +cpld_hw_version.pola_0_5= +cpld_hw_version.fpath_0_5=/dev/cpld5 +cpld_hw_version.addr_0_5=0xc +cpld_hw_version.len_0_5=1 +cpld_hw_version.bit_offset_0_5= + +cpld_hw_version.mode_0_6=config +cpld_hw_version.int_cons_0_6= +cpld_hw_version.src_0_6=logic_file +cpld_hw_version.frmt_0_6=byte +cpld_hw_version.pola_0_6= +cpld_hw_version.fpath_0_6=/dev/cpld6 +cpld_hw_version.addr_0_6=0xc +cpld_hw_version.len_0_6=1 +cpld_hw_version.bit_offset_0_6= + +cpld_hw_version.mode_0_7=config +cpld_hw_version.int_cons_0_7= +cpld_hw_version.src_0_7=logic_file +cpld_hw_version.frmt_0_7=byte +cpld_hw_version.pola_0_7= +cpld_hw_version.fpath_0_7=/dev/cpld7 +cpld_hw_version.addr_0_7=0x9 +cpld_hw_version.len_0_7=1 +cpld_hw_version.bit_offset_0_7= + +cpld_hw_version.mode_0_8=config +cpld_hw_version.int_cons_0_8= +cpld_hw_version.src_0_8=logic_file +cpld_hw_version.frmt_0_8=byte +cpld_hw_version.pola_0_8= +cpld_hw_version.fpath_0_8=/dev/cpld8 +cpld_hw_version.addr_0_8=0x9 +cpld_hw_version.len_0_8=1 +cpld_hw_version.bit_offset_0_8= + +cpld_hw_version.mode_0_9=config +cpld_hw_version.int_cons_0_9= +cpld_hw_version.src_0_9=logic_file +cpld_hw_version.frmt_0_9=byte +cpld_hw_version.pola_0_9= +cpld_hw_version.fpath_0_9=/dev/cpld9 +cpld_hw_version.addr_0_9=0x9 +cpld_hw_version.len_0_9=1 +cpld_hw_version.bit_offset_0_9= + + diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/s3ip_sysfs_cfg/cfg_file/FAN.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/s3ip_sysfs_cfg/cfg_file/FAN.cfg new file mode 100644 index 00000000000..104f4ceeed3 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/s3ip_sysfs_cfg/cfg_file/FAN.cfg @@ -0,0 +1,608 @@ +# +# @Fill in the agreement +# 1. Complete comments must be filled in before configuration items. Comments must not be filled in the same line of +# configuration items and invalid Spaces must not be added between configuration items +# 2. The value can be in 10 or hexadecimal format. The hexadecimal value starts with "0x" +# 3. Some configuration items do not need to be filled in a specific product. To facilitate other products to copy and +# fill in the configuration items, do not delete them +# 4. Configuration item + +# Configuration items: E2 i2c bus address +# Description: Format other_i2c_dev.bus_[main_dev]_[minor_dev] other_i2c_dev.addr_[main_dev]_[minor_dev], +# .bus is configuration item corresponds to the bus number (/dev/i2c-bus) +# .addr is address of the device corresponding to the configuration item on the bus +# Note: main_dev is defined in rg_main_dev_type_t. mainboard is 0, fan is 1, dev_index is device index +other_i2c_dev.bus_1_1=77 +other_i2c_dev.addr_1_1=0x50 +other_i2c_dev.bus_1_2=85 +other_i2c_dev.addr_1_2=0x50 +other_i2c_dev.bus_1_3=78 +other_i2c_dev.addr_1_3=0x50 +other_i2c_dev.bus_1_4=86 +other_i2c_dev.addr_1_4=0x50 +other_i2c_dev.bus_1_5=79 +other_i2c_dev.addr_1_5=0x50 +other_i2c_dev.bus_1_6=87 +other_i2c_dev.addr_1_6=0x50 +other_i2c_dev.bus_1_7=80 +other_i2c_dev.addr_1_7=0x50 +other_i2c_dev.bus_1_8=88 +other_i2c_dev.addr_1_8=0x50 + +# Configuration items: Fan dependent constant +# Description: Format dev_num_[main_dev]_[minor_dev] +# Note: main_dev,Fan is 1 minor_dev, 0: does not exist, 5: motor + + +# Number of fans +dev_num_1_0=8 + +# Number of motors +dev_num_1_5=2 + +# Configuration items: Product fan E2 format +# Description: Format fan_e2_mode +# Note: required +fan_e2_mode=fru + +# Configuration items: Mode of reading fan E2 +# Description: Format fan_sysfs_name +# Note: If not configured, it is read by i2c, otherwise it is read by sysfs +fan_sysfs_name=eeprom + +# Configuration items: Fan air duct type +# Filling instructions: fan_direction_[fan_type]__[fan_sub_type] = [direction] +# direction is air duct 0:F2B 1:B2F +# Note: required +fan_direction_1_1=0 + +# Configuration items: Fan status CPLD register address +# Description: Format dev_present_status_[main_dev_id][fan_index] fan_indexstart with 1 +# Note: fan main_dev_id is 1 +dev_present_status.mode_1_1=config +dev_present_status.src_1_1=logic_file +dev_present_status.frmt_1_1=bit +dev_present_status.pola_1_1=negative +dev_present_status.fpath_1_1=/dev/cpld7 +dev_present_status.addr_1_1=0x5b +dev_present_status.len_1_1=1 +dev_present_status.bit_offset_1_1=0 + +dev_present_status.mode_1_2=config +dev_present_status.src_1_2=logic_file +dev_present_status.frmt_1_2=bit +dev_present_status.pola_1_2=negative +dev_present_status.fpath_1_2=/dev/cpld8 +dev_present_status.addr_1_2=0x5b +dev_present_status.len_1_2=1 +dev_present_status.bit_offset_1_2=0 + +dev_present_status.mode_1_3=config +dev_present_status.src_1_3=logic_file +dev_present_status.frmt_1_3=bit +dev_present_status.pola_1_3=negative +dev_present_status.fpath_1_3=/dev/cpld7 +dev_present_status.addr_1_3=0x5b +dev_present_status.len_1_3=1 +dev_present_status.bit_offset_1_3=1 + +dev_present_status.mode_1_4=config +dev_present_status.src_1_4=logic_file +dev_present_status.frmt_1_4=bit +dev_present_status.pola_1_4=negative +dev_present_status.fpath_1_4=/dev/cpld8 +dev_present_status.addr_1_4=0x5b +dev_present_status.len_1_4=1 +dev_present_status.bit_offset_1_4=1 + +dev_present_status.mode_1_5=config +dev_present_status.src_1_5=logic_file +dev_present_status.frmt_1_5=bit +dev_present_status.pola_1_5=negative +dev_present_status.fpath_1_5=/dev/cpld7 +dev_present_status.addr_1_5=0x5b +dev_present_status.len_1_5=1 +dev_present_status.bit_offset_1_5=2 + +dev_present_status.mode_1_6=config +dev_present_status.src_1_6=logic_file +dev_present_status.frmt_1_6=bit +dev_present_status.pola_1_6=negative +dev_present_status.fpath_1_6=/dev/cpld8 +dev_present_status.addr_1_6=0x5b +dev_present_status.len_1_6=1 +dev_present_status.bit_offset_1_6=2 + +dev_present_status.mode_1_7=config +dev_present_status.src_1_7=logic_file +dev_present_status.frmt_1_7=bit +dev_present_status.pola_1_7=negative +dev_present_status.fpath_1_7=/dev/cpld7 +dev_present_status.addr_1_7=0x5b +dev_present_status.len_1_7=1 +dev_present_status.bit_offset_1_7=3 + +dev_present_status.mode_1_8=config +dev_present_status.src_1_8=logic_file +dev_present_status.frmt_1_8=bit +dev_present_status.pola_1_8=negative +dev_present_status.fpath_1_8=/dev/cpld8 +dev_present_status.addr_1_8=0x5b +dev_present_status.len_1_8=1 +dev_present_status.bit_offset_1_8=3 + +# Configuration items: Fan rotation status CPLD register address +# Description: Format fan_roll_status_[fan_id]_[motor_id] fan_idstart with 1, motor_idstart with 1 +# Note: required +fan_roll_status.mode_1_1=config +fan_roll_status.int_cons_1_1= +fan_roll_status.src_1_1=logic_file +fan_roll_status.frmt_1_1=bit +fan_roll_status.pola_1_1=positive +fan_roll_status.fpath_1_1=/dev/cpld7 +fan_roll_status.addr_1_1=0x5c +fan_roll_status.len_1_1=1 +fan_roll_status.bit_offset_1_1=0 + +fan_roll_status.mode_1_2=config +fan_roll_status.int_cons_1_2= +fan_roll_status.src_1_2=logic_file +fan_roll_status.frmt_1_2=bit +fan_roll_status.pola_1_2=positive +fan_roll_status.fpath_1_2=/dev/cpld7 +fan_roll_status.addr_1_2=0x5d +fan_roll_status.len_1_2=1/dev/cpld +fan_roll_status.bit_offset_1_2=0 + +fan_roll_status.mode_2_1=config +fan_roll_status.int_cons_2_1= +fan_roll_status.src_2_1=logic_file +fan_roll_status.frmt_2_1=bit +fan_roll_status.pola_2_1=positive +fan_roll_status.fpath_2_1=/dev/cpld8 +fan_roll_status.addr_2_1=0x5c +fan_roll_status.len_2_1=1 +fan_roll_status.bit_offset_2_1=0 + +fan_roll_status.mode_2_2=config +fan_roll_status.int_cons_2_2= +fan_roll_status.src_2_2=logic_file +fan_roll_status.frmt_2_2=bit +fan_roll_status.pola_2_2=positive +fan_roll_status.fpath_2_2=/dev/cpld8 +fan_roll_status.addr_2_2=0x5d +fan_roll_status.len_2_2=1 +fan_roll_status.bit_offset_2_2=0 + +fan_roll_status.mode_3_1=config +fan_roll_status.int_cons_3_1= +fan_roll_status.src_3_1=logic_file +fan_roll_status.frmt_3_1=bit +fan_roll_status.pola_3_1=positive +fan_roll_status.fpath_3_1=/dev/cpld7 +fan_roll_status.addr_3_1=0x5c +fan_roll_status.len_3_1=1 +fan_roll_status.bit_offset_3_1=1 + +fan_roll_status.mode_3_2=config +fan_roll_status.int_cons_3_2= +fan_roll_status.src_3_2=logic_file +fan_roll_status.frmt_3_2=bit +fan_roll_status.pola_3_2=positive +fan_roll_status.fpath_3_2=/dev/cpld7 +fan_roll_status.addr_3_2=0x5d +fan_roll_status.len_3_2=1 +fan_roll_status.bit_offset_3_2=1 + +fan_roll_status.mode_4_1=config +fan_roll_status.int_cons_4_1= +fan_roll_status.src_4_1=logic_file +fan_roll_status.frmt_4_1=bit +fan_roll_status.pola_4_1=positive +fan_roll_status.fpath_4_1=/dev/cpld8 +fan_roll_status.addr_4_1=0x5c +fan_roll_status.len_4_1=1 +fan_roll_status.bit_offset_4_1=1 + +fan_roll_status.mode_4_2=config +fan_roll_status.int_cons_4_2= +fan_roll_status.src_4_2=logic_file +fan_roll_status.frmt_4_2=bit +fan_roll_status.pola_4_2=positive +fan_roll_status.fpath_4_2=/dev/cpld8 +fan_roll_status.addr_4_2=0x5d +fan_roll_status.len_4_2=1 +fan_roll_status.bit_offset_4_2=1 + +fan_roll_status.mode_5_1=config +fan_roll_status.int_cons_5_1= +fan_roll_status.src_5_1=logic_file +fan_roll_status.frmt_5_1=bit +fan_roll_status.pola_5_1=positive +fan_roll_status.fpath_5_1=/dev/cpld7 +fan_roll_status.addr_5_1=0x5c +fan_roll_status.len_5_1=1 +fan_roll_status.bit_offset_5_1=2 + +fan_roll_status.mode_5_2=config +fan_roll_status.int_cons_5_2= +fan_roll_status.src_5_2=logic_file +fan_roll_status.frmt_5_2=bit +fan_roll_status.pola_5_2=positive +fan_roll_status.fpath_5_2=/dev/cpld7 +fan_roll_status.addr_5_2=0x5d +fan_roll_status.len_5_2=1 +fan_roll_status.bit_offset_5_2=2 + +fan_roll_status.mode_6_1=config +fan_roll_status.int_cons_6_1= +fan_roll_status.src_6_1=logic_file +fan_roll_status.frmt_6_1=bit +fan_roll_status.pola_6_1=positive +fan_roll_status.fpath_6_1=/dev/cpld8 +fan_roll_status.addr_6_1=0x5c +fan_roll_status.len_6_1=1 +fan_roll_status.bit_offset_6_1=2 + +fan_roll_status.mode_6_2=config +fan_roll_status.int_cons_6_2= +fan_roll_status.src_6_2=logic_file +fan_roll_status.frmt_6_2=bit +fan_roll_status.pola_6_2=positive +fan_roll_status.fpath_6_2=/dev/cpld8 +fan_roll_status.addr_6_2=0x5d +fan_roll_status.len_6_2=1 +fan_roll_status.bit_offset_6_2=2 + +fan_roll_status.mode_7_1=config +fan_roll_status.int_cons_7_1= +fan_roll_status.src_7_1=logic_file +fan_roll_status.frmt_7_1=bit +fan_roll_status.pola_7_1=positive +fan_roll_status.fpath_7_1=/dev/cpld7 +fan_roll_status.addr_7_1=0x5c +fan_roll_status.len_7_1=1 +fan_roll_status.bit_offset_7_1=3 + +fan_roll_status.mode_7_2=config +fan_roll_status.int_cons_7_2= +fan_roll_status.src_7_2=logic_file +fan_roll_status.frmt_7_2=bit +fan_roll_status.pola_7_2=positive +fan_roll_status.fpath_7_2=/dev/cpld7 +fan_roll_status.addr_7_2=0x5d +fan_roll_status.len_7_2=1 +fan_roll_status.bit_offset_7_2=3 + +fan_roll_status.mode_8_1=config +fan_roll_status.int_cons_8_1= +fan_roll_status.src_8_1=logic_file +fan_roll_status.frmt_8_1=bit +fan_roll_status.pola_8_1=positive +fan_roll_status.fpath_8_1=/dev/cpld8 +fan_roll_status.addr_8_1=0x5c +fan_roll_status.len_8_1=1 +fan_roll_status.bit_offset_8_1=3 + +fan_roll_status.mode_8_2=config +fan_roll_status.int_cons_8_2= +fan_roll_status.src_8_2=logic_file +fan_roll_status.frmt_8_2=bit +fan_roll_status.pola_8_2=positive +fan_roll_status.fpath_8_2=/dev/cpld8 +fan_roll_status.addr_8_2=0x5d +fan_roll_status.len_8_2=1 +fan_roll_status.bit_offset_8_2=3 + +# Configuration items: Fan rotation status CPLD register address +# Description: Format fan_roll_status_[fan_id]_[motor_id] fan_idstart with 1, motor_idstart with 1 +# Note: required +fan_speed.mode_1_1=config +fan_speed.int_cons_1_1= +fan_speed.src_1_1=logic_file +fan_speed.frmt_1_1=num_bytes +fan_speed.pola_1_1=negative +fan_speed.fpath_1_1=/dev/cpld7 +fan_speed.addr_1_1=0x94 +fan_speed.len_1_1=2 +fan_speed.bit_offset_1_1= + +fan_speed.mode_1_2=config +fan_speed.int_cons_1_2= +fan_speed.src_1_2=logic_file +fan_speed.frmt_1_2=num_bytes +fan_speed.pola_1_2=negative +fan_speed.fpath_1_2=/dev/cpld7 +fan_speed.addr_1_2=0xa0 +fan_speed.len_1_2=2 +fan_speed.bit_offset_1_2= + +fan_speed.mode_2_1=config +fan_speed.int_cons_2_1= +fan_speed.src_2_1=logic_file +fan_speed.frmt_2_1=num_bytes +fan_speed.pola_2_1=negative +fan_speed.fpath_2_1=/dev/cpld8 +fan_speed.addr_2_1=0x94 +fan_speed.len_2_1=2 +fan_speed.bit_offset_2_1= + +fan_speed.mode_2_2=config +fan_speed.int_cons_2_2= +fan_speed.src_2_2=logic_file +fan_speed.frmt_2_2=num_bytes +fan_speed.pola_2_2=negative +fan_speed.fpath_2_2=/dev/cpld8 +fan_speed.addr_2_2=0xa0 +fan_speed.len_2_2=2 +fan_speed.bit_offset_2_2= + +fan_speed.mode_3_1=config +fan_speed.int_cons_3_1= +fan_speed.src_3_1=logic_file +fan_speed.frmt_3_1=num_bytes +fan_speed.pola_3_1=negative +fan_speed.fpath_3_1=/dev/cpld7 +fan_speed.addr_3_1=0x96 +fan_speed.len_3_1=2 +fan_speed.bit_offset_3_1= + +fan_speed.mode_3_2=config +fan_speed.int_cons_3_2= +fan_speed.src_3_2=logic_file +fan_speed.frmt_3_2=num_bytes +fan_speed.pola_3_2=negative +fan_speed.fpath_3_2=/dev/cpld7 +fan_speed.addr_3_2=0xa2 +fan_speed.len_3_2=2 +fan_speed.bit_offset_3_2= + +fan_speed.mode_4_1=config +fan_speed.int_cons_4_1= +fan_speed.src_4_1=logic_file +fan_speed.frmt_4_1=num_bytes +fan_speed.pola_4_1=negative +fan_speed.fpath_4_1=/dev/cpld8 +fan_speed.addr_4_1=0x96 +fan_speed.len_4_1=2 +fan_speed.bit_offset_4_1= + +fan_speed.mode_4_2=config +fan_speed.int_cons_4_2= +fan_speed.src_4_2=logic_file +fan_speed.frmt_4_2=num_bytes +fan_speed.pola_4_2=negative +fan_speed.fpath_4_2=/dev/cpld8 +fan_speed.addr_4_2=0xa2 +fan_speed.len_4_2=2 +fan_speed.bit_offset_4_2= + +fan_speed.mode_5_1=config +fan_speed.int_cons_5_1= +fan_speed.src_5_1=logic_file +fan_speed.frmt_5_1=num_bytes +fan_speed.pola_5_1=negative +fan_speed.fpath_5_1=/dev/cpld7 +fan_speed.addr_5_1=0x98 +fan_speed.len_5_1=2 +fan_speed.bit_offset_5_1= + +fan_speed.mode_5_2=config +fan_speed.int_cons_5_2= +fan_speed.src_5_2=logic_file +fan_speed.frmt_5_2=num_bytes +fan_speed.pola_5_2=negative +fan_speed.fpath_5_2=/dev/cpld7 +fan_speed.addr_5_2=0xa4 +fan_speed.len_5_2=2 +fan_speed.bit_offset_5_2= + +fan_speed.mode_6_1=config +fan_speed.int_cons_6_1= +fan_speed.src_6_1=logic_file +fan_speed.frmt_6_1=num_bytes +fan_speed.pola_6_1=negative +fan_speed.fpath_6_1=/dev/cpld8 +fan_speed.addr_6_1=0x98 +fan_speed.len_6_1=2 +fan_speed.bit_offset_6_1= + +fan_speed.mode_6_2=config +fan_speed.int_cons_6_2= +fan_speed.src_6_2=logic_file +fan_speed.frmt_6_2=num_bytes +fan_speed.pola_6_2=negative +fan_speed.fpath_6_2=/dev/cpld8 +fan_speed.addr_6_2=0xa4 +fan_speed.len_6_2=2 +fan_speed.bit_offset_6_2= + +fan_speed.mode_7_1=config +fan_speed.int_cons_7_1= +fan_speed.src_7_1=logic_file +fan_speed.frmt_7_1=num_bytes +fan_speed.pola_7_1=negative +fan_speed.fpath_7_1=/dev/cpld7 +fan_speed.addr_7_1=0x9a +fan_speed.len_7_1=2 +fan_speed.bit_offset_7_1= + +fan_speed.mode_7_2=config +fan_speed.int_cons_7_2= +fan_speed.src_7_2=logic_file +fan_speed.frmt_7_2=num_bytes +fan_speed.pola_7_2=negative +fan_speed.fpath_7_2=/dev/cpld7 +fan_speed.addr_7_2=0xa6 +fan_speed.len_7_2=2 +fan_speed.bit_offset_7_2= + +fan_speed.mode_8_1=config +fan_speed.int_cons_8_1= +fan_speed.src_8_1=logic_file +fan_speed.frmt_8_1=num_bytes +fan_speed.pola_8_1=negative +fan_speed.fpath_8_1=/dev/cpld8 +fan_speed.addr_8_1=0x9a +fan_speed.len_8_1=2 +fan_speed.bit_offset_8_1= + +fan_speed.mode_8_2=config +fan_speed.int_cons_8_2= +fan_speed.src_8_2=logic_file +fan_speed.frmt_8_2=num_bytes +fan_speed.pola_8_2=negative +fan_speed.fpath_8_2=/dev/cpld8 +fan_speed.addr_8_2=0xa6 +fan_speed.len_8_2=2 +fan_speed.bit_offset_8_2= + +# Configuration items: Fan speed level CPLD register address +# Description: Format fan_ratio_[fan_id]_[motor_id] fan_idstart with 1, motor_idstart with 1 +# Note: required +fan_ratio.mode_1=config +fan_ratio.int_cons_1= +fan_ratio.src_1=logic_file +fan_ratio.frmt_1=byte +fan_ratio.pola_1= +fan_ratio.fpath_1=/dev/cpld7 +fan_ratio.addr_1=0x90 +fan_ratio.len_1=1 +fan_ratio.bit_offset_1= + +fan_ratio.mode_2=config +fan_ratio.int_cons_2= +fan_ratio.src_2=logic_file +fan_ratio.frmt_2=byte +fan_ratio.pola_2= +fan_ratio.fpath_2=/dev/cpld8 +fan_ratio.addr_2=0x90 +fan_ratio.len_2=1 +fan_ratio.bit_offset_2= + +fan_ratio.mode_3=config +fan_ratio.int_cons_3= +fan_ratio.src_3=logic_file +fan_ratio.frmt_3=byte +fan_ratio.pola_3= +fan_ratio.fpath_3=/dev/cpld7 +fan_ratio.addr_3=0x91 +fan_ratio.len_3=1 +fan_ratio.bit_offset_3= + +fan_ratio.mode_4=config +fan_ratio.int_cons_4= +fan_ratio.src_4=logic_file +fan_ratio.frmt_4=byte +fan_ratio.pola_4= +fan_ratio.fpath_4=/dev/cpld8 +fan_ratio.addr_4=0x91 +fan_ratio.len_4=1 +fan_ratio.bit_offset_4= + +fan_ratio.mode_5=config +fan_ratio.int_cons_5= +fan_ratio.src_5=logic_file +fan_ratio.frmt_5=byte +fan_ratio.pola_5= +fan_ratio.fpath_5=/dev/cpld7 +fan_ratio.addr_5=0x92 +fan_ratio.len_5=1 +fan_ratio.bit_offset_5= + +fan_ratio.mode_6=config +fan_ratio.int_cons_6= +fan_ratio.src_6=logic_file +fan_ratio.frmt_6=byte +fan_ratio.pola_6= +fan_ratio.fpath_6=/dev/cpld8 +fan_ratio.addr_6=0x92 +fan_ratio.len_6=1 +fan_ratio.bit_offset_6= + +fan_ratio.mode_7=config +fan_ratio.int_cons_7= +fan_ratio.src_7=logic_file +fan_ratio.frmt_7=byte +fan_ratio.pola_7= +fan_ratio.fpath_7=/dev/cpld7 +fan_ratio.addr_7=0x93 +fan_ratio.len_7=1 +fan_ratio.bit_offset_7= + +fan_ratio.mode_8=config +fan_ratio.int_cons_8= +fan_ratio.src_8=logic_file +fan_ratio.frmt_8=byte +fan_ratio.pola_8= +fan_ratio.fpath_8=/dev/cpld8 +fan_ratio.addr_8=0x93 +fan_ratio.len_8=1 +fan_ratio.bit_offset_8= + +# Fan speed tolerance +fan_threshold_0x0301_0x11=30 +fan_threshold_0x0301_0x12=30 + +# Maximum fan speed +fan_threshold_0x0201_0x11=21600 +fan_threshold_0x0201_0x12=19200 + +# Minimum fan speed +fan_threshold_0x0101_0x11=2880 +fan_threshold_0x0101_0x12=2560 + +# Rated fan speed +fan_threshold_0x1001_0x11=0 +fan_threshold_0x1001_0x12=0 + +fan_threshold_0x1101_0x11=0 +fan_threshold_0x1101_0x12=0 + +fan_threshold_0x1201_0x11=3600 +fan_threshold_0x1201_0x12=3200 + +fan_threshold_0x1301_0x11=5400 +fan_threshold_0x1301_0x12=4800 + +fan_threshold_0x1401_0x11=7200 +fan_threshold_0x1401_0x12=6400 + +fan_threshold_0x1501_0x11=9000 +fan_threshold_0x1501_0x12=8000 + +fan_threshold_0x1601_0x11=10800 +fan_threshold_0x1601_0x12=9600 + +fan_threshold_0x1701_0x11=12600 +fan_threshold_0x1701_0x12=11200 + +fan_threshold_0x1801_0x11=14400 +fan_threshold_0x1801_0x12=12800 + +fan_threshold_0x1901_0x11=16200 +fan_threshold_0x1901_0x12=14400 + +fan_threshold_0x1a01_0x11=18000 +fan_threshold_0x1a01_0x12=16000 + +# Configuration items: the number of fan names displayed in the product +# Description: Format dev_num_[main_dev]_[minor_dev] +# Note: main_dev,FAN is 1, minor_dev, 7: The number of fan names displayed +dev_num_1_7=1 + +# Configuration items: number of fan types supported by each fan name +# Description: Format fan_type_num_[fan type] +# Note: fan_id start with 1 +fan_type_num_1=1 + +# Configuration items: product Fan type Name +# Description: Format fan_name_[index1]_[index2] +# Note: index1 indicates the fan type that is displayed, start with 1, +# index2 Indicates different fan sub_type with the same fan_type, start with 1, correspond to fan_type_num +fan_name_1_1=FAN80-180F-BD + +# Configuration items: fan name is displayed +# Description: Format decode_fan_name_[fan_type] +# Note: fan_type indicates the fan_type of the fan that is displayed +decode_fan_name_1=FAN80-180F-BD diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/s3ip_sysfs_cfg/cfg_file/FPGA.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/s3ip_sysfs_cfg/cfg_file/FPGA.cfg new file mode 100644 index 00000000000..007c82260e5 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/s3ip_sysfs_cfg/cfg_file/FPGA.cfg @@ -0,0 +1,131 @@ +# +# @Fill in the agreement +# 1. Complete comments must be filled in before configuration items. Comments must not be filled in the same line of +# configuration items and invalid Spaces must not be added between configuration items +# 2. The value can be in 10 or hexadecimal format. The hexadecimal value starts with "0x" +# 3. Some configuration items do not need to be filled in a specific product. To facilitate other products to copy and +# fill in the configuration items, do not delete them +# 4. Configuration item + + +# Configuration item: motherboard FPGA number +# Description: Format dev_num_[main_dev]_[minor_dev] +# Note: main_dev: motherboard is 0,daughter card is 5, minor_dev: FPGA is 9 +dev_num_0_9=3 + +# Configuration item: name of each fpga +# Description: Format fpga_name_[fpga_id] fpga_id is fpga number,Start at 0 +# Note: required +fpga_name_0_0=MAC_FPGA +fpga_name_0_1=UPORT_FPGA +fpga_name_0_2=DPORT_FPGA + +# Configuration item: Version register for each FPGA +# Description: Format fpga_version_[fpga_id] fpga_id is fpga number,Start at 0 +# Note: required +fpga_version.mode_0_0=config +fpga_version.int_cons_0_0= +fpga_version.src_0_0=logic_file +fpga_version.frmt_0_0=num_bytes +fpga_version.pola_0_0=negative +fpga_version.fpath_0_0=/dev/fpga0 +fpga_version.addr_0_0=0x0 +fpga_version.len_0_0=4 +fpga_version.bit_offset_0_0= + +fpga_version.mode_0_1=config +fpga_version.int_cons_0_1= +fpga_version.src_0_1=logic_file +fpga_version.frmt_0_1=num_bytes +fpga_version.pola_0_1=negative +fpga_version.fpath_0_1=/dev/fpga1 +fpga_version.addr_0_1=0x0 +fpga_version.len_0_1=4 +fpga_version.bit_offset_0_1= + +fpga_version.mode_0_2=config +fpga_version.int_cons_0_2= +fpga_version.src_0_2=logic_file +fpga_version.frmt_0_2=num_bytes +fpga_version.pola_0_2=negative +fpga_version.fpath_0_2=/dev/fpga2 +fpga_version.addr_0_2=0x0 +fpga_version.len_0_2=4 +fpga_version.bit_offset_0_2= + +# Configuration item: Test registers for each FPGA +# Description: Format fpga_test_reg_[fpga_id] fpga_id is fpga number,Start at 0 +# Note: required +fpga_test_reg.mode_0_0=config +fpga_test_reg.int_cons_0_0= +fpga_test_reg.src_0_0=logic_file +fpga_test_reg.frmt_0_0=num_bytes +fpga_test_reg.pola_0_0=negative +fpga_test_reg.fpath_0_0=/dev/fpga0 +fpga_test_reg.addr_0_0=0x08 +fpga_test_reg.len_0_0=4 +fpga_test_reg.bit_offset_0_0= + +fpga_test_reg.mode_0_1=config +fpga_test_reg.int_cons_0_1= +fpga_test_reg.src_0_1=logic_file +fpga_test_reg.frmt_0_1=num_bytes +fpga_test_reg.pola_0_1=negative +fpga_test_reg.fpath_0_1=/dev/fpga1 +fpga_test_reg.addr_0_1=0x08 +fpga_test_reg.len_0_1=4 +fpga_test_reg.bit_offset_0_1= + +fpga_test_reg.mode_0_2=config +fpga_test_reg.int_cons_0_2= +fpga_test_reg.src_0_2=logic_file +fpga_test_reg.frmt_0_2=num_bytes +fpga_test_reg.pola_0_2=negative +fpga_test_reg.fpath_0_2=/dev/fpga2 +fpga_test_reg.addr_0_2=0x08 +fpga_test_reg.len_0_2=4 +fpga_test_reg.bit_offset_0_2= + +# Configuration item: Device type register for each FPGA +# Description: Format fpga_model_reg_[main_dev]_[fpga_id] +# Note: main_dev: motherboard is 0, daughter card is 5, fpga_id is fpga number,Start at 0 +fpga_model_reg.mode_0_0=config +fpga_model_reg.int_cons_0_0= +fpga_model_reg.src_0_0=logic_file +fpga_model_reg.frmt_0_0=num_bytes +fpga_model_reg.pola_0_0=negative +fpga_model_reg.fpath_0_0=/dev/fpga0 +fpga_model_reg.addr_0_0=0x10 +fpga_model_reg.len_0_0=4 +fpga_model_reg.bit_offset_0_0= + +fpga_model_reg.mode_0_1=config +fpga_model_reg.int_cons_0_1= +fpga_model_reg.src_0_1=logic_file +fpga_model_reg.frmt_0_1=num_bytes +fpga_model_reg.pola_0_1=negative +fpga_model_reg.fpath_0_1=/dev/fpga1 +fpga_model_reg.addr_0_1=0x10 +fpga_model_reg.len_0_1=4 +fpga_model_reg.bit_offset_0_1= + +fpga_model_reg.mode_0_2=config +fpga_model_reg.int_cons_0_2= +fpga_model_reg.src_0_2=logic_file +fpga_model_reg.frmt_0_2=num_bytes +fpga_model_reg.pola_0_2=negative +fpga_model_reg.fpath_0_2=/dev/fpga2 +fpga_model_reg.addr_0_2=0x10 +fpga_model_reg.len_0_2=4 +fpga_model_reg.bit_offset_0_2= + +# Configuration item: Device conversion configuration for each FPGA +# Description: Format fpga_model_decode_[origin_value] +# Note: origin_value is the value read from the FPGA device model register cannot exceed 0xffff +fpga_model_decode_0x50=XC7A50T-2FGG484I +fpga_model_decode_0x100=XC7A100T-2FGG484I + +fpga_vendor_0_0=XILINX +fpga_vendor_0_1=XILINX +fpga_vendor_0_2=XILINX + diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/s3ip_sysfs_cfg/cfg_file/LED.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/s3ip_sysfs_cfg/cfg_file/LED.cfg new file mode 100644 index 00000000000..0edec676da5 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/s3ip_sysfs_cfg/cfg_file/LED.cfg @@ -0,0 +1,209 @@ +# +# @Fill in the agreement +# 1. Complete comments must be filled in before configuration items. Comments must not be filled in the same line of +# configuration items and invalid Spaces must not be added between configuration items +# 2. The value can be in 10 or hexadecimal format. The hexadecimal value starts with "0x" +# 3. Some configuration items do not need to be filled in a specific product. To facilitate other products to copy and +# fill in the configuration items, do not delete them +# 4. Configuration item + +# Configuration item: LED CPLD register address +# Description: Formatled_status_[led_id]_[led_index] +# Note: led_id By definition wb_led_t +# led_index:If there is no index, fill in 0. If there is an index (such as a fan light), the number starts from 1 + +# Front panel SYS light +led_status.mode_0_0=config +led_status.src_0_0=logic_file +led_status.frmt_0_0=bit +led_status.fpath_0_0=/dev/cpld1 +led_status.addr_0_0=0x6c +led_status.len_0_0=3 + +# Configuration item: LED indicator CPLD register value converted to standard value +# Description: Format led_status_decode_[led_id]_[origin_value] origin_value:Original CPLD value +# led_id Same LED light type defined, 0- Front panel SYS light +led_status_decode_0_0=0 +led_status_decode_0_1=7 +led_status_decode_0_2=3 +led_status_decode_0_3=5 +led_status_decode_0_4=1 +led_status_decode_0_5=6 +led_status_decode_0_6=2 +led_status_decode_0_17=5 +led_status_decode_0_18=7 +led_status_decode_0_19=6 +led_status_decode_0_33=5 +led_status_decode_0_34=7 +led_status_decode_0_35=6 +led_status_decode_0_65=5 +led_status_decode_0_66=7 +led_status_decode_0_67=6 +led_status_decode_0_129=5 +led_status_decode_0_130=7 +led_status_decode_0_131=6 +led_status_decode_0_255=0 + +# Front panel BMC light +led_status.mode_2_0=config +led_status.src_2_0=logic_file +led_status.frmt_2_0=bit +led_status.fpath_2_0=/dev/cpld1 +led_status.addr_2_0=0x6d +led_status.len_2_0=3 + +led_status_decode_2_0=0 +led_status_decode_2_1=7 +led_status_decode_2_2=3 +led_status_decode_2_3=5 +led_status_decode_2_4=1 +led_status_decode_2_5=6 +led_status_decode_2_6=2 +led_status_decode_2_7=0 + +# Front panel FAN light +led_status.mode_4_0=config +led_status.src_4_0=logic_file +led_status.frmt_4_0=bit +led_status.fpath_4_0=/dev/cpld1 +led_status.addr_4_0=0x6e +led_status.len_4_0=3 + +# Configuration item: LED indicator CPLD register value converted to standard value +# Description: Format led_status_decode_[led_id]_[origin_value] origin_value:Original CPLD value +# led_id Same LED light type defined, 4-Front panel FAN light +led_status_decode_4_0=0 +led_status_decode_4_1=7 +led_status_decode_4_2=3 +led_status_decode_4_3=5 +led_status_decode_4_4=1 +led_status_decode_4_5=6 +led_status_decode_4_6=2 +led_status_decode_4_7=0 + +# Front panel PSU light +led_status.mode_6_0=config +led_status.src_6_0=logic_file +led_status.frmt_6_0=bit +led_status.fpath_6_0=/dev/cpld1 +led_status.addr_6_0=0x6f +led_status.len_6_0=3 + +# Configuration item: LED indicator CPLD register value converted to standard value +# Description: Format led_status_decode_[led_id]_[origin_value] origin_value:Original CPLD value +# led_id Same LED light type defined, 6-Front panel PSU light +led_status_decode_6_0=0 +led_status_decode_6_1=7 +led_status_decode_6_2=3 +led_status_decode_6_3=5 +led_status_decode_6_4=1 +led_status_decode_6_5=6 +led_status_decode_6_6=2 +led_status_decode_6_7=0 + +# Front panel positioning light +led_status.mode_8_0=config +led_status.src_8_0=logic_file +led_status.frmt_8_0=bit +led_status.fpath_8_0=/dev/cpld1 +led_status.addr_8_0=0x6b +led_status.len_8_0=1 + +# Configuration item: The LED light CPLD register value is converted to the standard value +# Description: format led_status_decode_[led_id]_[origin_value] origin_value: indicates the original CPLD value +# led_id defined with LED light type 8- Front panel positioning light +led_status_decode_8_0=0 +led_status_decode_8_1=4 + +# Fan body lamp1 +led_status.mode_10_1=config +led_status.src_10_1=logic_file +led_status.frmt_10_1=bit +led_status.fpath_10_1=/dev/cpld7 +led_status.addr_10_1=0xd0 +led_status.len_10_1=3 + +# Fan body lamp2 +led_status.mode_10_2=config +led_status.src_10_2=logic_file +led_status.frmt_10_2=bit +led_status.fpath_10_2=/dev/cpld8 +led_status.addr_10_2=0xd0 +led_status.len_10_2=3 + +# Fan body lamp3 +led_status.mode_10_3=config +led_status.src_10_3=logic_file +led_status.frmt_10_3=bit +led_status.fpath_10_3=/dev/cpld7 +led_status.addr_10_3=0xd1 +led_status.len_10_3=3 + +# Fan body lamp4 +led_status.mode_10_4=config +led_status.src_10_4=logic_file +led_status.frmt_10_4=bit +led_status.fpath_10_4=/dev/cpld8 +led_status.addr_10_4=0xd1 +led_status.len_10_4=3 + +# Fan body lamp5 +led_status.mode_10_5=config +led_status.src_10_5=logic_file +led_status.frmt_10_5=bit +led_status.fpath_10_5=/dev/cpld7 +led_status.addr_10_5=0xd2 +led_status.len_10_5=3 + +# Fan body lamp6 +led_status.mode_10_6=config +led_status.src_10_6=logic_file +led_status.frmt_10_6=bit +led_status.fpath_10_6=/dev/cpld8 +led_status.addr_10_6=0xd2 +led_status.len_10_6=3 + +# Fan body lamp7 +led_status.mode_10_7=config +led_status.src_10_7=logic_file +led_status.frmt_10_7=bit +led_status.fpath_10_7=/dev/cpld7 +led_status.addr_10_7=0xd3 +led_status.len_10_7=3 + +# Fan body lamp8 +led_status.mode_10_8=config +led_status.src_10_8=logic_file +led_status.frmt_10_8=bit +led_status.fpath_10_8=/dev/cpld8 +led_status.addr_10_8=0xd3 +led_status.len_10_8=3 + +# Configuration item: LED indicator CPLD register value converted to standard value +# Description: Format led_status_decode_[led_id]_[origin_value] origin_value:Original CPLD value +# led_id Same LED light type defined, 10-Fan body lamp +led_status_decode_10_0=0 +led_status_decode_10_1=7 +led_status_decode_10_2=3 +led_status_decode_10_3=5 +led_status_decode_10_4=1 +led_status_decode_10_5=6 +led_status_decode_10_6=2 + + +# Front sfp light +led_status.mode_13_0=config +led_status.src_13_0=logic_file +led_status.frmt_13_0=bit +led_status.fpath_13_0=/dev/cpld1 +led_status.addr_13_0=0x6b +led_status.len_13_0=3 + +led_status_decode_13_0=0 +led_status_decode_13_1=7 +led_status_decode_13_2=3 +led_status_decode_13_3=5 +led_status_decode_13_4=1 +led_status_decode_13_5=6 +led_status_decode_13_6=2 +led_status_decode_13_7=0 diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/s3ip_sysfs_cfg/cfg_file/PSU.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/s3ip_sysfs_cfg/cfg_file/PSU.cfg new file mode 100644 index 00000000000..cb63114f184 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/s3ip_sysfs_cfg/cfg_file/PSU.cfg @@ -0,0 +1,1179 @@ +# +# @Fill in the agreement +# 1. Complete comments must be filled in before configuration items. Comments must not be filled in the same line of +# configuration items and invalid Spaces must not be added between configuration items +# 2. The value can be in 10 or hexadecimal format. The hexadecimal value starts with "0x" +# 3. Some configuration items do not need to be filled in a specific product. To facilitate other products to copy and +# fill in the configuration items, do not delete them +# 4. Configuration item + +# Configuration items: PSU number +# Description: Format dev_num_[main_dev]_[minor_dev] +# Note: main_dev,PSU is 2, minor_dev,0 indicates the obtained number +dev_num_2_0=4 + +# Configuration items: PSU temperature sensors number +# Description: Format dev_num_[main_dev]_[minor_dev] +# Note: main_dev,PSU is 2, minor_dev, 1:temperature +dev_num_2_1=1 + +# psu eeprom +eeprom_size_2_1=256 +eeprom_size_2_2=256 +eeprom_size_2_3=256 +eeprom_size_2_4=256 + +eeprom_path_2_1=/sys/bus/i2c/devices/67-0050/eeprom +eeprom_path_2_2=/sys/bus/i2c/devices/68-0050/eeprom +eeprom_path_2_3=/sys/bus/i2c/devices/69-0050/eeprom +eeprom_path_2_4=/sys/bus/i2c/devices/70-0050/eeprom + +# Configuration item: Method of reading power FRU information +# Description: Format psu_fru_mode +# Note: If not configured, read through EEPROM, otherwise read through pmbus + + +# Configuration item: Method of reading power FRU information +# Fill in the description: format psu_fru_pmbus_[psu_index]_[fruid] +# Note: psu_index: indicates the power supply number, starting from 1 +# Note: fruid: 3:serial_number(mfr_serial), 5:hardware_version(mfr_revision), 8:part_number(mfr_model), 12:date(mfr_date), 13:vendor(mfr_id), +# mfr_serial +psu_fru_pmbus.mode_1_3=config +psu_fru_pmbus.int_cons_1_3=0 +psu_fru_pmbus.src_1_3=file +psu_fru_pmbus.frmt_1_3=buf +psu_fru_pmbus.fpath_1_3=/sys/bus/i2c/devices/67-0058/mfr_serial +psu_fru_pmbus.addr_1_3=0 +psu_fru_pmbus.len_1_3=32 +psu_fru_pmbus.bit_offset_1_3= +psu_fru_pmbus.str_cons_1_3= + +# mfr_revision +psu_fru_pmbus.mode_1_5=config +psu_fru_pmbus.int_cons_1_5=0 +psu_fru_pmbus.src_1_5=file +psu_fru_pmbus.frmt_1_5=buf +psu_fru_pmbus.fpath_1_5=/sys/bus/i2c/devices/67-0058/mfr_revision +psu_fru_pmbus.addr_1_5=0 +psu_fru_pmbus.len_1_5=32 +psu_fru_pmbus.bit_offset_1_5= +psu_fru_pmbus.str_cons_1_5= + +# mfr_model +psu_fru_pmbus.mode_1_8=config +psu_fru_pmbus.int_cons_1_8=0 +psu_fru_pmbus.src_1_8=file +psu_fru_pmbus.frmt_1_8=buf +psu_fru_pmbus.fpath_1_8=/sys/bus/i2c/devices/67-0058/mfr_model +psu_fru_pmbus.addr_1_8=0 +psu_fru_pmbus.len_1_8=32 +psu_fru_pmbus.bit_offset_1_8= +psu_fru_pmbus.str_cons_1_8= + +# mfr_date +psu_fru_pmbus.mode_1_12=config +psu_fru_pmbus.int_cons_1_12=0 +psu_fru_pmbus.src_1_12=file +psu_fru_pmbus.frmt_1_12=buf +psu_fru_pmbus.fpath_1_12=/sys/bus/i2c/devices/67-0058/mfr_date +psu_fru_pmbus.addr_1_12=0 +psu_fru_pmbus.len_1_12=32 +psu_fru_pmbus.bit_offset_1_12= +psu_fru_pmbus.str_cons_1_12= + +# mfr_id +psu_fru_pmbus.mode_1_13=config +psu_fru_pmbus.int_cons_1_13=0 +psu_fru_pmbus.src_1_13=file +psu_fru_pmbus.frmt_1_13=buf +psu_fru_pmbus.fpath_1_13=/sys/bus/i2c/devices/67-0058/mfr_id +psu_fru_pmbus.addr_1_13=0 +psu_fru_pmbus.len_1_13=32 +psu_fru_pmbus.bit_offset_1_13= +psu_fru_pmbus.str_cons_1_13= + + +# mfr_serial +psu_fru_pmbus.mode_2_3=config +psu_fru_pmbus.int_cons_2_3=0 +psu_fru_pmbus.src_2_3=file +psu_fru_pmbus.frmt_2_3=buf +psu_fru_pmbus.fpath_2_3=/sys/bus/i2c/devices/68-0058/mfr_serial +psu_fru_pmbus.addr_2_3=0 +psu_fru_pmbus.len_2_3=32 +psu_fru_pmbus.bit_offset_2_3= +psu_fru_pmbus.str_cons_2_3= + +# mfr_revision +psu_fru_pmbus.mode_2_5=config +psu_fru_pmbus.int_cons_2_5=0 +psu_fru_pmbus.src_2_5=file +psu_fru_pmbus.frmt_2_5=buf +psu_fru_pmbus.fpath_2_5=/sys/bus/i2c/devices/68-0058/mfr_revision +psu_fru_pmbus.addr_2_5=0 +psu_fru_pmbus.len_2_5=32 +psu_fru_pmbus.bit_offset_2_5= +psu_fru_pmbus.str_cons_2_5= + +# mfr_model +psu_fru_pmbus.mode_2_8=config +psu_fru_pmbus.int_cons_2_8=0 +psu_fru_pmbus.src_2_8=file +psu_fru_pmbus.frmt_2_8=buf +psu_fru_pmbus.fpath_2_8=/sys/bus/i2c/devices/68-0058/mfr_model +psu_fru_pmbus.addr_2_8=0 +psu_fru_pmbus.len_2_8=32 +psu_fru_pmbus.bit_offset_2_8= +psu_fru_pmbus.str_cons_2_8= + +# mfr_date +psu_fru_pmbus.mode_2_12=config +psu_fru_pmbus.int_cons_2_12=0 +psu_fru_pmbus.src_2_12=file +psu_fru_pmbus.frmt_2_12=buf +psu_fru_pmbus.fpath_2_12=/sys/bus/i2c/devices/68-0058/mfr_date +psu_fru_pmbus.addr_2_12=0 +psu_fru_pmbus.len_2_12=32 +psu_fru_pmbus.bit_offset_2_12= +psu_fru_pmbus.str_cons_2_12= + +# mfr_id +psu_fru_pmbus.mode_2_13=config +psu_fru_pmbus.int_cons_2_13=0 +psu_fru_pmbus.src_2_13=file +psu_fru_pmbus.frmt_2_13=buf +psu_fru_pmbus.fpath_2_13=/sys/bus/i2c/devices/68-0058/mfr_id +psu_fru_pmbus.addr_2_13=0 +psu_fru_pmbus.len_2_13=32 +psu_fru_pmbus.bit_offset_2_13= +psu_fru_pmbus.str_cons_2_13= + + +# mfr_serial +psu_fru_pmbus.mode_3_3=config +psu_fru_pmbus.int_cons_3_3=0 +psu_fru_pmbus.src_3_3=file +psu_fru_pmbus.frmt_3_3=buf +psu_fru_pmbus.fpath_3_3=/sys/bus/i2c/devices/69-0058/mfr_serial +psu_fru_pmbus.addr_3_3=0 +psu_fru_pmbus.len_3_3=32 +psu_fru_pmbus.bit_offset_3_3= +psu_fru_pmbus.str_cons_3_3= + +# mfr_revision +psu_fru_pmbus.mode_3_5=config +psu_fru_pmbus.int_cons_3_5=0 +psu_fru_pmbus.src_3_5=file +psu_fru_pmbus.frmt_3_5=buf +psu_fru_pmbus.fpath_3_5=/sys/bus/i2c/devices/69-0058/mfr_revision +psu_fru_pmbus.addr_3_5=0 +psu_fru_pmbus.len_3_5=32 +psu_fru_pmbus.bit_offset_3_5= +psu_fru_pmbus.str_cons_3_5= + +# mfr_model +psu_fru_pmbus.mode_3_8=config +psu_fru_pmbus.int_cons_3_8=0 +psu_fru_pmbus.src_3_8=file +psu_fru_pmbus.frmt_3_8=buf +psu_fru_pmbus.fpath_3_8=/sys/bus/i2c/devices/69-0058/mfr_model +psu_fru_pmbus.addr_3_8=0 +psu_fru_pmbus.len_3_8=32 +psu_fru_pmbus.bit_offset_3_8= +psu_fru_pmbus.str_cons_3_8= + +# mfr_date +psu_fru_pmbus.mode_3_12=config +psu_fru_pmbus.int_cons_3_12=0 +psu_fru_pmbus.src_3_12=file +psu_fru_pmbus.frmt_3_12=buf +psu_fru_pmbus.fpath_3_12=/sys/bus/i2c/devices/69-0058/mfr_date +psu_fru_pmbus.addr_3_12=0 +psu_fru_pmbus.len_3_12=32 +psu_fru_pmbus.bit_offset_3_12= +psu_fru_pmbus.str_cons_3_12= + +# mfr_id +psu_fru_pmbus.mode_3_13=config +psu_fru_pmbus.int_cons_3_13=0 +psu_fru_pmbus.src_3_13=file +psu_fru_pmbus.frmt_3_13=buf +psu_fru_pmbus.fpath_3_13=/sys/bus/i2c/devices/69-0058/mfr_id +psu_fru_pmbus.addr_3_13=0 +psu_fru_pmbus.len_3_13=32 +psu_fru_pmbus.bit_offset_3_13= +psu_fru_pmbus.str_cons_3_13= + + +# mfr_serial +psu_fru_pmbus.mode_4_3=config +psu_fru_pmbus.int_cons_4_3=0 +psu_fru_pmbus.src_4_3=file +psu_fru_pmbus.frmt_4_3=buf +psu_fru_pmbus.fpath_4_3=/sys/bus/i2c/devices/70-0058/mfr_serial +psu_fru_pmbus.addr_4_3=0 +psu_fru_pmbus.len_4_3=32 +psu_fru_pmbus.bit_offset_4_3= +psu_fru_pmbus.str_cons_4_3= + +# mfr_revision +psu_fru_pmbus.mode_4_5=config +psu_fru_pmbus.int_cons_4_5=0 +psu_fru_pmbus.src_4_5=file +psu_fru_pmbus.frmt_4_5=buf +psu_fru_pmbus.fpath_4_5=/sys/bus/i2c/devices/70-0058/mfr_revision +psu_fru_pmbus.addr_4_5=0 +psu_fru_pmbus.len_4_5=32 +psu_fru_pmbus.bit_offset_4_5= +psu_fru_pmbus.str_cons_4_5= + +# mfr_model +psu_fru_pmbus.mode_4_8=config +psu_fru_pmbus.int_cons_4_8=0 +psu_fru_pmbus.src_4_8=file +psu_fru_pmbus.frmt_4_8=buf +psu_fru_pmbus.fpath_4_8=/sys/bus/i2c/devices/70-0058/mfr_model +psu_fru_pmbus.addr_4_8=0 +psu_fru_pmbus.len_4_8=32 +psu_fru_pmbus.bit_offset_4_8= +psu_fru_pmbus.str_cons_4_8= + +# mfr_date +psu_fru_pmbus.mode_4_12=config +psu_fru_pmbus.int_cons_4_12=0 +psu_fru_pmbus.src_4_12=file +psu_fru_pmbus.frmt_4_12=buf +psu_fru_pmbus.fpath_4_12=/sys/bus/i2c/devices/70-0058/mfr_date +psu_fru_pmbus.addr_4_12=0 +psu_fru_pmbus.len_4_12=32 +psu_fru_pmbus.bit_offset_4_12= +psu_fru_pmbus.str_cons_4_12= + +# mfr_id +psu_fru_pmbus.mode_4_13=config +psu_fru_pmbus.int_cons_4_13=0 +psu_fru_pmbus.src_4_13=file +psu_fru_pmbus.frmt_4_13=buf +psu_fru_pmbus.fpath_4_13=/sys/bus/i2c/devices/70-0058/mfr_id +psu_fru_pmbus.addr_4_13=0 +psu_fru_pmbus.len_4_13=32 +psu_fru_pmbus.bit_offset_4_13= +psu_fru_pmbus.str_cons_4_13= + +# Configuration items: PSU E2 information +# Description: Format other_i2c_dev_[main_dev]_[psu_index] +# Note: main_dev,PSU is 2, psu_index:Power supply number, start with 1 +other_i2c_dev.bus_2_1=67 +other_i2c_dev.addr_2_1=0x50 +other_i2c_dev.bus_2_2=68 +other_i2c_dev.addr_2_2=0x50 +other_i2c_dev.bus_2_3=69 +other_i2c_dev.addr_2_3=0x50 +other_i2c_dev.bus_2_4=70 +other_i2c_dev.addr_2_4=0x50 + +# Configuration items: Mode of reading power supply E2 +# Description: Format psu_sysfs_name +# Note: If not configured, it is read by i2c, otherwise it is read by sysfs +psu_sysfs_name=eeprom + +other_i2c_dev.bus_2_5=67 +other_i2c_dev.addr_2_5=0x58 +other_i2c_dev.bus_2_6=68 +other_i2c_dev.addr_2_6=0x58 +other_i2c_dev.bus_2_7=69 +other_i2c_dev.addr_2_7=0x58 +other_i2c_dev.bus_2_8=70 +other_i2c_dev.addr_2_8=0x58 + +# Configuration items: PMBUS register address of the power supply +# Description: Format psu_status_[psu_index]_[reg_id] +# Note:psu_index:Power supply number,start with 1 reg_id, 9:Power Output Status (0x79) +psu_pmbus_reg.mode_1_9=config +psu_pmbus_reg.src_1_9=other_i2c +psu_pmbus_reg.frmt_1_9=byte +psu_pmbus_reg.pola_1_9=negative +psu_pmbus_reg.addr_1_9=0x02050079 +psu_pmbus_reg.len_1_9=2 +psu_pmbus_reg.bit_offset_1_9= + +psu_pmbus_reg.mode_2_9=config +psu_pmbus_reg.src_2_9=other_i2c +psu_pmbus_reg.frmt_2_9=byte +psu_pmbus_reg.pola_2_9=negative +psu_pmbus_reg.addr_2_9=0x02060079 +psu_pmbus_reg.len_2_9=2 +psu_pmbus_reg.bit_offset_2_9= + +psu_pmbus_reg.mode_3_9=config +psu_pmbus_reg.src_3_9=other_i2c +psu_pmbus_reg.frmt_3_9=byte +psu_pmbus_reg.pola_3_9=negative +psu_pmbus_reg.addr_3_9=0x02070079 +psu_pmbus_reg.len_3_9=2 +psu_pmbus_reg.bit_offset_3_9= + +psu_pmbus_reg.mode_4_9=config +psu_pmbus_reg.src_4_9=other_i2c +psu_pmbus_reg.frmt_4_9=byte +psu_pmbus_reg.pola_4_9=negative +psu_pmbus_reg.addr_4_9=0x02080079 +psu_pmbus_reg.len_4_9=2 +psu_pmbus_reg.bit_offset_4_9= + +# Configuration items:PMBUS register address of the power supply +# Description: Format psu_status_[psu_index]_[reg_id] +# Note:psu_index:Power supply number,start with 1 reg_id, 10:Power input Status (0x79) +psu_pmbus_reg.mode_1_10=config +psu_pmbus_reg.src_1_10=other_i2c +psu_pmbus_reg.frmt_1_10=byte +psu_pmbus_reg.pola_1_10=negative +psu_pmbus_reg.addr_1_10=0x02050079 +psu_pmbus_reg.len_1_10=2 +psu_pmbus_reg.bit_offset_1_10= + +psu_pmbus_reg.mode_2_10=config +psu_pmbus_reg.src_2_10=other_i2c +psu_pmbus_reg.frmt_2_10=byte +psu_pmbus_reg.pola_2_10=negative +psu_pmbus_reg.addr_2_10=0x02060079 +psu_pmbus_reg.len_2_10=2 +psu_pmbus_reg.bit_offset_2_10= + +psu_pmbus_reg.mode_3_10=config +psu_pmbus_reg.src_3_10=other_i2c +psu_pmbus_reg.frmt_3_10=byte +psu_pmbus_reg.pola_3_10=negative +psu_pmbus_reg.addr_3_10=0x02070079 +psu_pmbus_reg.len_3_10=2 +psu_pmbus_reg.bit_offset_3_10= + +psu_pmbus_reg.mode_4_10=config +psu_pmbus_reg.src_4_10=other_i2c +psu_pmbus_reg.frmt_4_10=byte +psu_pmbus_reg.pola_4_10=negative +psu_pmbus_reg.addr_4_10=0x02080079 +psu_pmbus_reg.len_4_10=2 +psu_pmbus_reg.bit_offset_4_10= + +# Configuration items:PMBUS register address of the power supply +# Description: Format psu_status_[psu_index]_[reg_id] +# Note:psu_index:Power supply number,,start with 1 reg_id 11:Power Input type (0x80) +psu_pmbus_reg.mode_1_11=config +psu_pmbus_reg.src_1_11=other_i2c +psu_pmbus_reg.frmt_1_11=byte +psu_pmbus_reg.pola_1_11=positive +psu_pmbus_reg.addr_1_11=0x02050080 +psu_pmbus_reg.len_1_11=1 +psu_pmbus_reg.bit_offset_1_11= + +psu_pmbus_reg.mode_2_11=config +psu_pmbus_reg.src_2_11=other_i2c +psu_pmbus_reg.frmt_2_11=byte +psu_pmbus_reg.pola_2_11=positive +psu_pmbus_reg.addr_2_11=0x02060080 +psu_pmbus_reg.len_2_11=1 +psu_pmbus_reg.bit_offset_2_11= + +psu_pmbus_reg.mode_3_11=config +psu_pmbus_reg.src_3_11=other_i2c +psu_pmbus_reg.frmt_3_11=byte +psu_pmbus_reg.pola_3_11=positive +psu_pmbus_reg.addr_3_11=0x02070080 +psu_pmbus_reg.len_3_11=1 +psu_pmbus_reg.bit_offset_3_11= + +psu_pmbus_reg.mode_4_11=config +psu_pmbus_reg.src_4_11=other_i2c +psu_pmbus_reg.frmt_4_11=byte +psu_pmbus_reg.pola_4_11=positive +psu_pmbus_reg.addr_4_11=0x02080080 +psu_pmbus_reg.len_4_11=1 +psu_pmbus_reg.bit_offset_4_11= + +psu_pmbus_reg.mode_1_12=config +psu_pmbus_reg.src_1_12=other_i2c +psu_pmbus_reg.frmt_1_12=byte +psu_pmbus_reg.pola_1_12=positive +psu_pmbus_reg.addr_1_12=0x0205003b +psu_pmbus_reg.len_1_12=1 +psu_pmbus_reg.bit_offset_1_12= + +psu_pmbus_reg.mode_2_12=config +psu_pmbus_reg.src_2_12=other_i2c +psu_pmbus_reg.frmt_2_12=byte +psu_pmbus_reg.pola_2_12=positive +psu_pmbus_reg.addr_2_12=0x0206003b +psu_pmbus_reg.len_2_12=1 +psu_pmbus_reg.bit_offset_2_12= + +psu_pmbus_reg.mode_3_12=config +psu_pmbus_reg.src_3_12=other_i2c +psu_pmbus_reg.frmt_3_12=byte +psu_pmbus_reg.pola_3_12=positive +psu_pmbus_reg.addr_3_12=0x0207003b +psu_pmbus_reg.len_3_12=1 +psu_pmbus_reg.bit_offset_3_12= + +psu_pmbus_reg.mode_4_12=config +psu_pmbus_reg.src_4_12=other_i2c +psu_pmbus_reg.frmt_4_12=byte +psu_pmbus_reg.pola_4_12=positive +psu_pmbus_reg.addr_4_12=0x0208003b +psu_pmbus_reg.len_4_12=1 +psu_pmbus_reg.bit_offset_4_12= + +# Configuration items: PSU number +# Description: Format dev_num_[main_dev]_[minor_dev] +# Note: main_dev,PSU is 2, minor_dev,0 indicates the obtained number +dev_num_2_0=4 + +# Configuration items: Input status of the power module +# Description: Format psu_pmbus_id_[psu_index]_[psu_sensor_type]=value +# Note: psu_index is Power supply number,start with 1, psu_sensor_type is PMBUS type,Input stateis 10 +# value value:bus[8]_addr[16]_offset[8] +psu_status.mode_1_0=config +psu_status.src_1_0=logic_file +psu_status.frmt_1_0=bit +psu_status.pola_1_0=negative +psu_status.fpath_1_0=/dev/cpld4 +psu_status.addr_1_0=0x57 +psu_status.len_1_0=1 +psu_status.bit_offset_1_0=1 + +psu_status.mode_1_1=config +psu_status.src_1_1=logic_file +psu_status.frmt_1_1=bit +psu_status.pola_1_1=positive +psu_status.fpath_1_1=/dev/cpld4 +psu_status.addr_1_1=0x57 +psu_status.len_1_1=1 +psu_status.bit_offset_1_1=0 + +psu_status.mode_1_2=config +psu_status.src_1_2=logic_file +psu_status.frmt_1_2=bit +psu_status.pola_1_2=negative +psu_status.fpath_1_2=/dev/cpld4 +psu_status.addr_1_2=0x57 +psu_status.len_1_2=1 +psu_status.bit_offset_1_2=2 + +psu_status.mode_2_0=config +psu_status.src_2_0=logic_file +psu_status.frmt_2_0=bit +psu_status.pola_2_0=negative +psu_status.fpath_2_0=/dev/cpld4 +psu_status.addr_2_0=0x57 +psu_status.len_2_0=1 +psu_status.bit_offset_2_0=5 + +psu_status.mode_2_1=config +psu_status.src_2_1=logic_file +psu_status.frmt_2_1=bit +psu_status.pola_2_1=positive +psu_status.fpath_2_1=/dev/cpld4 +psu_status.addr_2_1=0x57 +psu_status.len_2_1=1 +psu_status.bit_offset_2_1=4 + +psu_status.mode_2_2=config +psu_status.src_2_2=logic_file +psu_status.frmt_2_2=bit +psu_status.pola_2_2=negative +psu_status.fpath_2_2=/dev/cpld4 +psu_status.addr_2_2=0x57 +psu_status.len_2_2=1 +psu_status.bit_offset_2_2=6 + +psu_status.mode_3_0=config +psu_status.src_3_0=logic_file +psu_status.frmt_3_0=bit +psu_status.pola_3_0=negative +psu_status.fpath_3_0=/dev/cpld4 +psu_status.addr_3_0=0x58 +psu_status.len_3_0=1 +psu_status.bit_offset_3_0=1 + +psu_status.mode_3_1=config +psu_status.src_3_1=logic_file +psu_status.frmt_3_1=bit +psu_status.pola_3_1=positive +psu_status.fpath_3_1=/dev/cpld4 +psu_status.addr_3_1=0x58 +psu_status.len_3_1=1 +psu_status.bit_offset_3_1=0 + +psu_status.mode_3_2=config +psu_status.src_3_2=logic_file +psu_status.frmt_3_2=bit +psu_status.pola_3_2=negative +psu_status.fpath_3_2=/dev/cpld4 +psu_status.addr_3_2=0x58 +psu_status.len_3_2=1 +psu_status.bit_offset_3_2=2 + +psu_status.mode_4_0=config +psu_status.src_4_0=logic_file +psu_status.frmt_4_0=bit +psu_status.pola_4_0=negative +psu_status.fpath_4_0=/dev/cpld4 +psu_status.addr_4_0=0x58 +psu_status.len_4_0=1 +psu_status.bit_offset_4_0=5 + +psu_status.mode_4_1=config +psu_status.src_4_1=logic_file +psu_status.frmt_4_1=bit +psu_status.pola_4_1=positive +psu_status.fpath_4_1=/dev/cpld4 +psu_status.addr_4_1=0x58 +psu_status.len_4_1=1 +psu_status.bit_offset_4_1=4 + +psu_status.mode_4_2=config +psu_status.src_4_2=logic_file +psu_status.frmt_4_2=bit +psu_status.pola_4_2=negative +psu_status.fpath_4_2=/dev/cpld4 +psu_status.addr_4_2=0x58 +psu_status.len_4_2=1 +psu_status.bit_offset_4_2=6 + + +# 0:None 1:in_vol 2:in_curr 3:in_power 4:out_vol 5:out_curr 6:out_power 7:fan +# psu1 in_vol +hwmon_psu.mode_1_1=config +hwmon_psu.int_cons_1_1=0 +hwmon_psu.src_1_1=file +hwmon_psu.frmt_1_1=buf +hwmon_psu.fpath_1_1=/sys/bus/i2c/devices/67-0058/hwmon/ +hwmon_psu.addr_1_1=0 +hwmon_psu.len_1_1=8 +hwmon_psu.bit_offset_1_1= +hwmon_psu.str_cons_1_1=in1_input + +# psu1 in_curr +hwmon_psu.mode_1_2=config +hwmon_psu.int_cons_1_2=0 +hwmon_psu.src_1_2=file +hwmon_psu.frmt_1_2=buf +hwmon_psu.fpath_1_2=/sys/bus/i2c/devices/67-0058/hwmon/ +hwmon_psu.addr_1_2=0 +hwmon_psu.len_1_2=8 +hwmon_psu.bit_offset_1_2= +hwmon_psu.str_cons_1_2=curr1_input + +# psu1 in_power +hwmon_psu.mode_1_3=config +hwmon_psu.int_cons_1_3=0 +hwmon_psu.src_1_3=file +hwmon_psu.frmt_1_3=buf +hwmon_psu.fpath_1_3=/sys/bus/i2c/devices/67-0058/hwmon/ +hwmon_psu.addr_1_3=0 +hwmon_psu.len_1_3=16 +hwmon_psu.bit_offset_1_3=0 +hwmon_psu.str_cons_1_3=power1_input + +# psu1 out_vol +hwmon_psu.mode_1_4=config +hwmon_psu.int_cons_1_4=0 +hwmon_psu.src_1_4=file +hwmon_psu.frmt_1_4=buf +hwmon_psu.fpath_1_4=/sys/bus/i2c/devices/67-0058/hwmon/ +hwmon_psu.addr_1_4=0 +hwmon_psu.len_1_4=8 +hwmon_psu.bit_offset_1_4= +hwmon_psu.str_cons_1_4=in2_input + +# psu1 out_curr +hwmon_psu.mode_1_5=config +hwmon_psu.int_cons_1_5=0 +hwmon_psu.src_1_5=file +hwmon_psu.frmt_1_5=buf +hwmon_psu.fpath_1_5=/sys/bus/i2c/devices/67-0058/hwmon/ +hwmon_psu.addr_1_5=0 +hwmon_psu.len_1_5=8 +hwmon_psu.bit_offset_1_5= +hwmon_psu.str_cons_1_5=curr2_input + +# psu1 out_power +hwmon_psu.mode_1_6=config +hwmon_psu.int_cons_1_6=0 +hwmon_psu.src_1_6=file +hwmon_psu.frmt_1_6=buf +hwmon_psu.fpath_1_6=/sys/bus/i2c/devices/67-0058/hwmon/ +hwmon_psu.addr_1_6=0 +hwmon_psu.len_1_6=16 +hwmon_psu.bit_offset_1_6=0 +hwmon_psu.str_cons_1_6=power2_input + +# psu1 fan +hwmon_psu.mode_1_7=config +hwmon_psu.int_cons_1_7= +hwmon_psu.src_1_7=file +hwmon_psu.frmt_1_7=buf +hwmon_psu.fpath_1_7=/sys/bus/i2c/devices/67-0058/hwmon/ +hwmon_psu.addr_1_7=0 +hwmon_psu.len_1_7=8 +hwmon_psu.bit_offset_1_7= +hwmon_psu.str_cons_1_7=fan1_input + +# psu2 in_vol +hwmon_psu.mode_2_1=config +hwmon_psu.int_cons_2_1=0 +hwmon_psu.src_2_1=file +hwmon_psu.frmt_2_1=buf +hwmon_psu.fpath_2_1=/sys/bus/i2c/devices/68-0058/hwmon/ +hwmon_psu.addr_2_1=0 +hwmon_psu.len_2_1=8 +hwmon_psu.bit_offset_2_1= +hwmon_psu.str_cons_2_1=in1_input + +# psu2 in_curr +hwmon_psu.mode_2_2=config +hwmon_psu.int_cons_2_2=0 +hwmon_psu.src_2_2=file +hwmon_psu.frmt_2_2=buf +hwmon_psu.fpath_2_2=/sys/bus/i2c/devices/68-0058/hwmon/ +hwmon_psu.addr_2_2=0 +hwmon_psu.len_2_2=8 +hwmon_psu.bit_offset_2_2= +hwmon_psu.str_cons_2_2=curr1_input + +# psu2 in_power +hwmon_psu.mode_2_3=config +hwmon_psu.int_cons_2_3=0 +hwmon_psu.src_2_3=file +hwmon_psu.frmt_2_3=buf +hwmon_psu.fpath_2_3=/sys/bus/i2c/devices/68-0058/hwmon/ +hwmon_psu.addr_2_3=0 +hwmon_psu.len_2_3=16 +hwmon_psu.bit_offset_2_3=0 +hwmon_psu.str_cons_2_3=power1_input + +# psu2 out_vol +hwmon_psu.mode_2_4=config +hwmon_psu.int_cons_2_4=0 +hwmon_psu.src_2_4=file +hwmon_psu.frmt_2_4=buf +hwmon_psu.fpath_2_4=/sys/bus/i2c/devices/68-0058/hwmon/ +hwmon_psu.addr_2_4=0 +hwmon_psu.len_2_4=8 +hwmon_psu.bit_offset_2_4= +hwmon_psu.str_cons_2_4=in2_input + +# psu2 out_curr +hwmon_psu.mode_2_5=config +hwmon_psu.int_cons_2_5=0 +hwmon_psu.src_2_5=file +hwmon_psu.frmt_2_5=buf +hwmon_psu.fpath_2_5=/sys/bus/i2c/devices/68-0058/hwmon/ +hwmon_psu.addr_2_5=0 +hwmon_psu.len_2_5=8 +hwmon_psu.bit_offset_2_5= +hwmon_psu.str_cons_2_5=curr2_input + +# psu2 out_power +hwmon_psu.mode_2_6=config +hwmon_psu.int_cons_2_6=0 +hwmon_psu.src_2_6=file +hwmon_psu.frmt_2_6=buf +hwmon_psu.fpath_2_6=/sys/bus/i2c/devices/68-0058/hwmon/ +hwmon_psu.addr_2_6=0 +hwmon_psu.len_2_6=16 +hwmon_psu.bit_offset_2_6=0 +hwmon_psu.str_cons_2_6=power2_input + +# psu2 fan +hwmon_psu.mode_2_7=config +hwmon_psu.int_cons_2_7= +hwmon_psu.src_2_7=file +hwmon_psu.frmt_2_7=buf +hwmon_psu.fpath_2_7=/sys/bus/i2c/devices/68-0058/hwmon/ +hwmon_psu.addr_2_7=0 +hwmon_psu.len_2_7=8 +hwmon_psu.bit_offset_2_7= +hwmon_psu.str_cons_2_7=fan1_input + +# psu3 in_vol +hwmon_psu.mode_3_1=config +hwmon_psu.int_cons_3_1=0 +hwmon_psu.src_3_1=file +hwmon_psu.frmt_3_1=buf +hwmon_psu.fpath_3_1=/sys/bus/i2c/devices/69-0058/hwmon/ +hwmon_psu.addr_3_1=0 +hwmon_psu.len_3_1=8 +hwmon_psu.bit_offset_3_1= +hwmon_psu.str_cons_3_1=in1_input +# psu3 in_curr +hwmon_psu.mode_3_2=config +hwmon_psu.int_cons_3_2=0 +hwmon_psu.src_3_2=file +hwmon_psu.frmt_3_2=buf +hwmon_psu.fpath_3_2=/sys/bus/i2c/devices/69-0058/hwmon/ +hwmon_psu.addr_3_2=0 +hwmon_psu.len_3_2=8 +hwmon_psu.bit_offset_3_2= +hwmon_psu.str_cons_3_2=curr1_input + +# psu3 in_power +hwmon_psu.mode_3_3=config +hwmon_psu.int_cons_3_3=0 +hwmon_psu.src_3_3=file +hwmon_psu.frmt_3_3=buf +hwmon_psu.fpath_3_3=/sys/bus/i2c/devices/69-0058/hwmon/ +hwmon_psu.addr_3_3=0 +hwmon_psu.len_3_3=16 +hwmon_psu.bit_offset_3_3=0 +hwmon_psu.str_cons_3_3=power1_input + +# psu3 out_vol +hwmon_psu.mode_3_4=config +hwmon_psu.int_cons_3_4=0 +hwmon_psu.src_3_4=file +hwmon_psu.frmt_3_4=buf +hwmon_psu.fpath_3_4=/sys/bus/i2c/devices/69-0058/hwmon/ +hwmon_psu.addr_3_4=0 +hwmon_psu.len_3_4=8 +hwmon_psu.bit_offset_3_4= +hwmon_psu.str_cons_3_4=in2_input + +# psu3 out_curr +hwmon_psu.mode_3_5=config +hwmon_psu.int_cons_3_5=0 +hwmon_psu.src_3_5=file +hwmon_psu.frmt_3_5=buf +hwmon_psu.fpath_3_5=/sys/bus/i2c/devices/69-0058/hwmon/ +hwmon_psu.addr_3_5=0 +hwmon_psu.len_3_5=8 +hwmon_psu.bit_offset_3_5= +hwmon_psu.str_cons_3_5=curr2_input + +# psu3 out_power +hwmon_psu.mode_3_6=config +hwmon_psu.int_cons_3_6=0 +hwmon_psu.src_3_6=file +hwmon_psu.frmt_3_6=buf +hwmon_psu.fpath_3_6=/sys/bus/i2c/devices/69-0058/hwmon/ +hwmon_psu.addr_3_6=0 +hwmon_psu.len_3_6=16 +hwmon_psu.bit_offset_3_6=0 +hwmon_psu.str_cons_3_6=power2_input + +# psu3 fan +hwmon_psu.mode_3_7=config +hwmon_psu.int_cons_3_7= +hwmon_psu.src_3_7=file +hwmon_psu.frmt_3_7=buf +hwmon_psu.fpath_3_7=/sys/bus/i2c/devices/69-0058/hwmon/ +hwmon_psu.addr_3_7=0 +hwmon_psu.len_3_7=8 +hwmon_psu.bit_offset_3_7= +hwmon_psu.str_cons_3_7=fan1_input + +# psu4 in_vol +hwmon_psu.mode_4_1=config +hwmon_psu.int_cons_4_1=0 +hwmon_psu.src_4_1=file +hwmon_psu.frmt_4_1=buf +hwmon_psu.fpath_4_1=/sys/bus/i2c/devices/70-0058/hwmon/ +hwmon_psu.addr_4_1=0 +hwmon_psu.len_4_1=8 +hwmon_psu.bit_offset_4_1= +hwmon_psu.str_cons_4_1=in1_input + +# psu4 in_curr +hwmon_psu.mode_4_2=config +hwmon_psu.int_cons_4_2=0 +hwmon_psu.src_4_2=file +hwmon_psu.frmt_4_2=buf +hwmon_psu.fpath_4_2=/sys/bus/i2c/devices/70-0058/hwmon/ +hwmon_psu.addr_4_2=0 +hwmon_psu.len_4_2=8 +hwmon_psu.bit_offset_4_2= +hwmon_psu.str_cons_4_2=curr1_input + +# psu4 in_power +hwmon_psu.mode_4_3=config +hwmon_psu.int_cons_4_3=0 +hwmon_psu.src_4_3=file +hwmon_psu.frmt_4_3=buf +hwmon_psu.fpath_4_3=/sys/bus/i2c/devices/70-0058/hwmon/ +hwmon_psu.addr_4_3=0 +hwmon_psu.len_4_3=16 +hwmon_psu.bit_offset_4_3=0 +hwmon_psu.str_cons_4_3=power1_input + +# psu4 out_vol +hwmon_psu.mode_4_4=config +hwmon_psu.int_cons_4_4=0 +hwmon_psu.src_4_4=file +hwmon_psu.frmt_4_4=buf +hwmon_psu.fpath_4_4=/sys/bus/i2c/devices/70-0058/hwmon/ +hwmon_psu.addr_4_4=0 +hwmon_psu.len_4_4=8 +hwmon_psu.bit_offset_4_4= +hwmon_psu.str_cons_4_4=in2_input + +# psu4 out_curr +hwmon_psu.mode_4_5=config +hwmon_psu.int_cons_4_5=0 +hwmon_psu.src_4_5=file +hwmon_psu.frmt_4_5=buf +hwmon_psu.fpath_4_5=/sys/bus/i2c/devices/70-0058/hwmon/ +hwmon_psu.addr_4_5=0 +hwmon_psu.len_4_5=8 +hwmon_psu.bit_offset_4_5= +hwmon_psu.str_cons_4_5=curr2_input + +# psu4 out_power +hwmon_psu.mode_4_6=config +hwmon_psu.int_cons_4_6=0 +hwmon_psu.src_4_6=file +hwmon_psu.frmt_4_6=buf +hwmon_psu.fpath_4_6=/sys/bus/i2c/devices/70-0058/hwmon/ +hwmon_psu.addr_4_6=0 +hwmon_psu.len_4_6=16 +hwmon_psu.bit_offset_4_6=0 +hwmon_psu.str_cons_4_6=power2_input + +# psu4 fan +hwmon_psu.mode_4_7=config +hwmon_psu.int_cons_4_7= +hwmon_psu.src_4_7=file +hwmon_psu.frmt_4_7=buf +hwmon_psu.fpath_4_7=/sys/bus/i2c/devices/70-0058/hwmon/ +hwmon_psu.addr_4_7=0 +hwmon_psu.len_4_7=8 +hwmon_psu.bit_offset_4_7= +hwmon_psu.str_cons_4_7=fan1_input + +# Configuration item: temperature hwmon path +# Format: hwmon_temp[key1]_[key2] +# Note: key1: High 8bit indicates the index of the device, starting from 1; low 8bit indicates the temperature index, starting from 1 +# key2: High 4bit indicates the master device type, power supply is 5, low 4bit indicates the temperature type 0:input 1:alias +# 2:type 3:max 4:max_hyst 5:min 6:crit +# mode: str_constant takes the value of str_cons directly and config reads it in the way specified by src +# int_cons:N Original value /(10^N) +# fpath: indicates the first half of the hwmon path +# bit_offset: specifies the number of decimal places. If not configured, the original precision is retained +# str_cons: when mode is str_constant, its value is the result of reading, and when reading from a file, the name of the file being read + +# psu1 temp1 input +hwmon_temp.mode_0x0101_0x20=config +hwmon_temp.int_cons_0x0101_0x20=0 +hwmon_temp.src_0x0101_0x20=file +hwmon_temp.frmt_0x0101_0x20=buf +hwmon_temp.fpath_0x0101_0x20=/sys/bus/i2c/devices/67-0058/hwmon/ +hwmon_temp.addr_0x0101_0x20=0 +hwmon_temp.len_0x0101_0x20=8 +hwmon_temp.bit_offset_0x0101_0x20= +hwmon_temp.str_cons_0x0101_0x20=temp1_input + +# psu1 temp1 alias +hwmon_temp.mode_0x0101_0x21=str_constant +hwmon_temp.str_cons_0x0101_0x21=temp0 +# psu1 temp1 max +hwmon_temp.mode_0x0101_0x23=str_constant +hwmon_temp.str_cons_0x0101_0x23=65000 +# psu1 temp1 min +hwmon_temp.mode_0x0101_0x25=str_constant +hwmon_temp.str_cons_0x0101_0x25=-20000 +# psu1 temp1 high +hwmon_temp.mode_0x0101_0x29=str_constant +hwmon_temp.str_cons_0x0101_0x29=55000 +# psu1 temp1 low +hwmon_temp.mode_0x0101_0x2a=str_constant +hwmon_temp.str_cons_0x0101_0x2a=-5000 +# psu1 temp1 type +hwmon_temp.mode_0x0101_0x22=str_constant +hwmon_temp.str_cons_0x0101_0x22=psu_pmbus + +# psu2 temp1 input +hwmon_temp.mode_0x0201_0x20=config +hwmon_temp.int_cons_0x0201_0x20=0 +hwmon_temp.src_0x0201_0x20=file +hwmon_temp.frmt_0x0201_0x20=buf +hwmon_temp.fpath_0x0201_0x20=/sys/bus/i2c/devices/68-0058/hwmon/ +hwmon_temp.addr_0x0201_0x20=0 +hwmon_temp.len_0x0201_0x20=8 +hwmon_temp.bit_offset_0x0201_0x20= +hwmon_temp.str_cons_0x0201_0x20=temp1_input + +# psu2 temp1 alias +hwmon_temp.mode_0x0201_0x21=str_constant +hwmon_temp.str_cons_0x0201_0x21=temp0 +# psu2 temp1 max +hwmon_temp.mode_0x0201_0x23=str_constant +hwmon_temp.str_cons_0x0201_0x23=65000 +# psu2 temp1 min +hwmon_temp.mode_0x0201_0x25=str_constant +hwmon_temp.str_cons_0x0201_0x25=-20000 +# psu2 temp1 high +hwmon_temp.mode_0x0201_0x29=str_constant +hwmon_temp.str_cons_0x0201_0x29=55000 +# psu2 temp1 low +hwmon_temp.mode_0x0201_0x2a=str_constant +hwmon_temp.str_cons_0x0201_0x2a=-5000 +# psu2 temp1 type +hwmon_temp.mode_0x0201_0x22=str_constant +hwmon_temp.str_cons_0x0201_0x22=psu_pmbus + +# psu3 temp1 input +hwmon_temp.mode_0x0301_0x20=config +hwmon_temp.int_cons_0x0301_0x20=0 +hwmon_temp.src_0x0301_0x20=file +hwmon_temp.frmt_0x0301_0x20=buf +hwmon_temp.fpath_0x0301_0x20=/sys/bus/i2c/devices/69-0058/hwmon/ +hwmon_temp.addr_0x0301_0x20=0 +hwmon_temp.len_0x0301_0x20=8 +hwmon_temp.bit_offset_0x0301_0x20= +hwmon_temp.str_cons_0x0301_0x20=temp1_input + +# psu3 temp1 alias +hwmon_temp.mode_0x0301_0x21=str_constant +hwmon_temp.str_cons_0x0301_0x21=temp0 +# psu3 temp1 max +hwmon_temp.mode_0x0301_0x23=str_constant +hwmon_temp.str_cons_0x0301_0x23=65000 +# psu3 temp1 min +hwmon_temp.mode_0x0301_0x25=str_constant +hwmon_temp.str_cons_0x0301_0x25=-20000 +# psu3 temp1 high +hwmon_temp.mode_0x0301_0x29=str_constant +hwmon_temp.str_cons_0x0301_0x29=55000 +# psu3 temp1 low +hwmon_temp.mode_0x0301_0x2a=str_constant +hwmon_temp.str_cons_0x0301_0x2a=-5000 +# psu3 temp1 type +hwmon_temp.mode_0x0301_0x22=str_constant +hwmon_temp.str_cons_0x0301_0x22=psu_pmbus + +# psu4 temp1 input +hwmon_temp.mode_0x0401_0x20=config +hwmon_temp.int_cons_0x0401_0x20=0 +hwmon_temp.src_0x0401_0x20=file +hwmon_temp.frmt_0x0401_0x20=buf +hwmon_temp.fpath_0x0401_0x20=/sys/bus/i2c/devices/70-0058/hwmon/ +hwmon_temp.addr_0x0401_0x20=0 +hwmon_temp.len_0x0401_0x20=8 +hwmon_temp.bit_offset_0x0401_0x20= +hwmon_temp.str_cons_0x0401_0x20=temp1_input + +# psu4 temp1 alias +hwmon_temp.mode_0x0401_0x21=str_constant +hwmon_temp.str_cons_0x0401_0x21=temp0 +# psu4 temp1 max +hwmon_temp.mode_0x0401_0x23=str_constant +hwmon_temp.str_cons_0x0401_0x23=65000 +# psu4 temp1 min +hwmon_temp.mode_0x0401_0x25=str_constant +hwmon_temp.str_cons_0x0401_0x25=-20000 +# psu4 temp1 high +hwmon_temp.mode_0x0401_0x29=str_constant +hwmon_temp.str_cons_0x0401_0x29=55000 +# psu4 temp1 low +hwmon_temp.mode_0x0401_0x2a=str_constant +hwmon_temp.str_cons_0x0401_0x2a=-5000 +# psu4 temp1 type +hwmon_temp.mode_0x0401_0x22=str_constant +hwmon_temp.str_cons_0x0401_0x22=psu_pmbus + +# Configuration item: The number of power supply names displayed by the product +# Format: dev_num_[main_dev]_[minor_dev] +# Note: main_dev,PSU is 2, minor_dev, 6: Number of power supply names displayed +dev_num_2_6=2 + +# Configuration item: product power type name +# Fill in instructions: format power_name_[index1]_[index2] +# Note: index1 indicates the power supply ID displayed, starting from 1, index2 indicates different power supplies with the same ID, starting from 1 +power_name_1_1=GW-CRPS1600D +power_name_1_2=DPS-1600AB-5 +power_name_1_3=CRPS2700D2 +power_name_1_4=DLG2700AN12C11 +power_name_1_5=AP-CA2700F12SA + +# Configuration item: Displays the power supply name +# Fill in instructions: format decode_power_name_[index] +# Note: index indicates the ID of the power supply that is displayed +decode_power_name_1=PA2700II-F-BD + +# Configuration item: rated power of power supply +# Fill in instructions: format power_rate_supply_[index] +# Note: index indicates the ID of the power supply that is displayed +power_rate_supply_1=1600000000 +power_rate_supply_2=1600000000 + +# Configuration item: Show the type of power duct +# Fill in instructions: format decode_power_fan_dir_[index] +# Note: index indicates the ID of the power supply that is displayed +decode_power_fan_dir_1=0 +decode_power_fan_dir_2=1 + +# Psu in voltage max min +hwmon_psu.mode_1_13=str_constant +hwmon_psu.str_cons_1_13=320000 +hwmon_psu.mode_1_15=str_constant +hwmon_psu.str_cons_1_15=180000 +# Psu in current max min +hwmon_psu.mode_1_14=str_constant +hwmon_psu.str_cons_1_14=16000 +hwmon_psu.mode_1_16=str_constant +hwmon_psu.str_cons_1_16=0 +# Psu out voltage max min +hwmon_psu.mode_1_17=str_constant +hwmon_psu.str_cons_1_17=12800 +hwmon_psu.mode_1_19=str_constant +hwmon_psu.str_cons_1_19=11600 +# Psu out current max min +hwmon_psu.mode_1_18=str_constant +hwmon_psu.str_cons_1_18=222000 +hwmon_psu.mode_1_20=str_constant +hwmon_psu.str_cons_1_20=10 +# Psu fan Max min +hwmon_psu.mode_1_21=str_constant +hwmon_psu.str_cons_1_21=37000 +hwmon_psu.mode_1_22=str_constant +hwmon_psu.str_cons_1_22=1000 +# Psu in power max min +hwmon_psu.mode_1_23=str_constant +hwmon_psu.str_cons_1_23=3000000000 +hwmon_psu.mode_1_24=str_constant +hwmon_psu.str_cons_1_24=10000 +# Psu out power max min +hwmon_psu.mode_1_25=str_constant +hwmon_psu.str_cons_1_25=2700000000 +hwmon_psu.mode_1_26=str_constant +hwmon_psu.str_cons_1_26=10000 + +# Psu in voltage max min +hwmon_psu.mode_2_13=str_constant +hwmon_psu.str_cons_2_13=320000 +hwmon_psu.mode_2_15=str_constant +hwmon_psu.str_cons_2_15=180000 +# Psu in current max min +hwmon_psu.mode_2_14=str_constant +hwmon_psu.str_cons_2_14=16000 +hwmon_psu.mode_2_16=str_constant +hwmon_psu.str_cons_2_16=0 +# Psu out voltage max min +hwmon_psu.mode_2_17=str_constant +hwmon_psu.str_cons_2_17=12800 +hwmon_psu.mode_2_19=str_constant +hwmon_psu.str_cons_2_19=11600 +# Psu out current max min +hwmon_psu.mode_2_18=str_constant +hwmon_psu.str_cons_2_18=222000 +hwmon_psu.mode_2_20=str_constant +hwmon_psu.str_cons_2_20=10 +# Psu fan Max min +hwmon_psu.mode_2_21=str_constant +hwmon_psu.str_cons_2_21=37000 +hwmon_psu.mode_2_22=str_constant +hwmon_psu.str_cons_2_22=1000 +# Psu in power max min +hwmon_psu.mode_2_23=str_constant +hwmon_psu.str_cons_2_23=3000000000 +hwmon_psu.mode_2_24=str_constant +hwmon_psu.str_cons_2_24=10000 +# Psu out power max min +hwmon_psu.mode_2_25=str_constant +hwmon_psu.str_cons_2_25=2700000000 +hwmon_psu.mode_2_26=str_constant +hwmon_psu.str_cons_2_26=10000 + +# Psu in voltage max min +hwmon_psu.mode_3_13=str_constant +hwmon_psu.str_cons_3_13=320000 +hwmon_psu.mode_3_15=str_constant +hwmon_psu.str_cons_3_15=180000 +# Psu in current max min +hwmon_psu.mode_3_14=str_constant +hwmon_psu.str_cons_3_14=16000 +hwmon_psu.mode_3_16=str_constant +hwmon_psu.str_cons_3_16=0 +# Psu out voltage max min +hwmon_psu.mode_3_17=str_constant +hwmon_psu.str_cons_3_17=12800 +hwmon_psu.mode_3_19=str_constant +hwmon_psu.str_cons_3_19=11600 +# Psu out current max min +hwmon_psu.mode_3_18=str_constant +hwmon_psu.str_cons_3_18=222000 +hwmon_psu.mode_3_20=str_constant +hwmon_psu.str_cons_3_20=10 +# Psu fan Max min +hwmon_psu.mode_3_21=str_constant +hwmon_psu.str_cons_3_21=37000 +hwmon_psu.mode_3_22=str_constant +hwmon_psu.str_cons_3_22=1000 +# Psu in power max min +hwmon_psu.mode_3_23=str_constant +hwmon_psu.str_cons_3_23=3000000000 +hwmon_psu.mode_3_24=str_constant +hwmon_psu.str_cons_3_24=10000 +# Psu out power max min +hwmon_psu.mode_3_25=str_constant +hwmon_psu.str_cons_3_25=2700000000 +hwmon_psu.mode_3_26=str_constant +hwmon_psu.str_cons_3_26=10000 + +# Psu in voltage max min +hwmon_psu.mode_4_13=str_constant +hwmon_psu.str_cons_4_13=320000 +hwmon_psu.mode_4_15=str_constant +hwmon_psu.str_cons_4_15=180000 +# Psu in current max min +hwmon_psu.mode_4_14=str_constant +hwmon_psu.str_cons_4_14=16000 +hwmon_psu.mode_4_16=str_constant +hwmon_psu.str_cons_4_16=0 +# Psu out voltage max min +hwmon_psu.mode_4_17=str_constant +hwmon_psu.str_cons_4_17=12800 +hwmon_psu.mode_4_19=str_constant +hwmon_psu.str_cons_4_19=11600 +# Psu out current max min +hwmon_psu.mode_4_18=str_constant +hwmon_psu.str_cons_4_18=222000 +hwmon_psu.mode_4_20=str_constant +hwmon_psu.str_cons_4_20=10 +# Psu fan Max min +hwmon_psu.mode_4_21=str_constant +hwmon_psu.str_cons_4_21=37000 +hwmon_psu.mode_4_22=str_constant +hwmon_psu.str_cons_4_22=1000 +# Psu in power max min +hwmon_psu.mode_4_23=str_constant +hwmon_psu.str_cons_4_23=3000000000 +hwmon_psu.mode_4_24=str_constant +hwmon_psu.str_cons_4_24=10000 +# Psu out power max min +hwmon_psu.mode_4_25=str_constant +hwmon_psu.str_cons_4_25=2700000000 +hwmon_psu.mode_4_26=str_constant +hwmon_psu.str_cons_4_26=10000 + +# blackbox info path +psu_blackbox_path_1=/proc/psu/67-0058/blackbox_info +psu_blackbox_path_2=/proc/psu/68-0058/blackbox_info +psu_blackbox_path_3=/proc/psu/69-0058/blackbox_info +psu_blackbox_path_4=/proc/psu/70-0058/blackbox_info + +# blackbox info clear +psu_clear_blackbox_1=/sys/bus/i2c/devices/67-0058/clear_blackbox +psu_clear_blackbox_2=/sys/bus/i2c/devices/68-0058/clear_blackbox +psu_clear_blackbox_3=/sys/bus/i2c/devices/69-0058/clear_blackbox +psu_clear_blackbox_4=/sys/bus/i2c/devices/70-0058/clear_blackbox + +# pmbus info +psu_pmbus_info_1=/sys/bus/i2c/devices/67-0058/pmbus_info +psu_pmbus_info_2=/sys/bus/i2c/devices/68-0058/pmbus_info +psu_pmbus_info_3=/sys/bus/i2c/devices/69-0058/pmbus_info +psu_pmbus_info_4=/sys/bus/i2c/devices/70-0058/pmbus_info + +psu_pmbus_addr_1 = 0x00430058 +psu_pmbus_addr_2 = 0x00440058 +psu_pmbus_addr_3 = 0x00450058 +psu_pmbus_addr_4 = 0x00460058 diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/s3ip_sysfs_cfg/cfg_file/SENSOR.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/s3ip_sysfs_cfg/cfg_file/SENSOR.cfg new file mode 100644 index 00000000000..4d8275fb84b --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/s3ip_sysfs_cfg/cfg_file/SENSOR.cfg @@ -0,0 +1,8120 @@ +# +# @Fill in the agreement +# 1. Complete comments must be filled in before configuration items. Comments must not be filled in the same line of configuration items +# and invalid Spaces must not be added between configuration items +# 2. The configuration item value can be in 10 or hexadecimal format. The hexadecimal value starts with "0x" +# 3. Some configuration items do not need to be filled in in a specific product. In order to facilitate other products to copy and fill in, do not delete them +# 4. Configure items + +# Configuration item: temperature hwmon path +# Format: hwmon_temp[key1]_[key2] +# Note: key1: High 8bit indicates the index of the device, starting from 1; low 8bit indicates the temperature index, starting from 1 +# key2: The high 4bit indicates the primary device type, the sub-card is 5, and the low 4bit indicates the temperature type 0:input 1:alias +# 2:type 3:max 4:max_hyst 5:min 6:crit +# mode: str_constant takes the value of str_cons directly and config reads it in the way specified by src +# int_cons:N Original value /(10^N) +# fpath: indicates the first half of the hwmon path +# bit_offset: specifies the number of decimal places. If not configured, the original precision is retained +# str_cons: when mode is str_constant, its value is the result of reading, and when reading from a file, the name of the file being read + +# Number of motherboard temperature sensors +dev_num_0_1=66 + +# Number of main board voltage sensors +dev_num_0_2=212 + +# Number of current sensors on the mainboard +dev_num_0_3=0 + +# value : 0 +# alias : 1 +# type : 2 +# max : 3 +# hyst : 4 +# min : 5 +# crit : 6 +# range : 7 +# nominal_value : 8 +# high : 9 +# low : 10 + +# temp1 +# temp1 +hwmon_temp.mode_0x0001_0x00=config +hwmon_temp.int_cons_0x0001_0x00=0 +hwmon_temp.src_0x0001_0x00=file +hwmon_temp.frmt_0x0001_0x00=buf +hwmon_temp.fpath_0x0001_0x00=/sys/bus/i2c/devices/55-004b/hwmon/ +hwmon_temp.addr_0x0001_0x00=0 +hwmon_temp.len_0x0001_0x00=8 +hwmon_temp.bit_offset_0x0001_0x00= +hwmon_temp.str_cons_0x0001_0x00=temp1_input + +hwmon_temp.mode_0x0001_0x01=str_constant +hwmon_temp.str_cons_0x0001_0x01=MGMT_AIR_TEMP_01 + +hwmon_temp.mode_0x0001_0x02=str_constant +hwmon_temp.str_cons_0x0001_0x02=CT75_01 + +hwmon_temp.mode_0x0001_0x03=str_constant +hwmon_temp.str_cons_0x0001_0x03=70000 + +hwmon_temp.mode_0x0001_0x05=str_constant +hwmon_temp.str_cons_0x0001_0x05=-30000 + +hwmon_temp.mode_0x0001_0x09=str_constant +hwmon_temp.str_cons_0x0001_0x09=60000 + +hwmon_temp.mode_0x0001_0x0a=str_constant +hwmon_temp.str_cons_0x0001_0x0a=-20000 + +# temp2 +hwmon_temp.mode_0x0002_0x00=config +hwmon_temp.int_cons_0x0002_0x00=0 +hwmon_temp.src_0x0002_0x00=file +hwmon_temp.frmt_0x0002_0x00=buf +hwmon_temp.fpath_0x0002_0x00=/sys/bus/i2c/devices/56-004b/hwmon/ +hwmon_temp.addr_0x0002_0x00=0 +hwmon_temp.len_0x0002_0x00=8 +hwmon_temp.bit_offset_0x0002_0x00=0 +hwmon_temp.str_cons_0x0002_0x00=temp1_input +hwmon_temp.int_extra2_0x0002_0x00=-1000 + +hwmon_temp.mode_0x0002_0x01=str_constant +hwmon_temp.str_cons_0x0002_0x01=MGMT_INLET_TEMP_02 + +hwmon_temp.mode_0x0002_0x02=str_constant +hwmon_temp.str_cons_0x0002_0x02=CT75_02 + +hwmon_temp.mode_0x0002_0x03=str_constant +hwmon_temp.str_cons_0x0002_0x03=70000 + +hwmon_temp.mode_0x0002_0x05=str_constant +hwmon_temp.str_cons_0x0002_0x05=-30000 + +hwmon_temp.mode_0x0002_0x09=str_constant +hwmon_temp.str_cons_0x0002_0x09=60000 + +hwmon_temp.mode_0x0002_0x0a=str_constant +hwmon_temp.str_cons_0x0002_0x0a=-20000 + + +# temp3 +hwmon_temp.mode_0x0003_0x00=config +hwmon_temp.int_cons_0x0003_0x00=0 +hwmon_temp.src_0x0003_0x00=file +hwmon_temp.frmt_0x0003_0x00=buf +hwmon_temp.fpath_0x0003_0x00=/sys/bus/i2c/devices/76-004b/hwmon/ +hwmon_temp.addr_0x0003_0x00=0 +hwmon_temp.len_0x0003_0x00=8 +hwmon_temp.bit_offset_0x0003_0x00= +hwmon_temp.str_cons_0x0003_0x00=temp1_input + +hwmon_temp.mode_0x0003_0x01=str_constant +hwmon_temp.str_cons_0x0003_0x01=FCB_UP_TEMP_03 + +hwmon_temp.mode_0x0003_0x02=str_constant +hwmon_temp.str_cons_0x0003_0x02=CT75_03 + +hwmon_temp.mode_0x0003_0x03=str_constant +hwmon_temp.str_cons_0x0003_0x03=75000 + +hwmon_temp.mode_0x0003_0x05=str_constant +hwmon_temp.str_cons_0x0003_0x05=-30000 + +hwmon_temp.mode_0x0003_0x09=str_constant +hwmon_temp.str_cons_0x0003_0x09=70000 + +hwmon_temp.mode_0x0003_0x0a=str_constant +hwmon_temp.str_cons_0x0003_0x0a=-20000 + +# temp4 +hwmon_temp.mode_0x0004_0x00=config +hwmon_temp.int_cons_0x0004_0x00=0 +hwmon_temp.src_0x0004_0x00=file +hwmon_temp.frmt_0x0004_0x00=buf +hwmon_temp.fpath_0x0004_0x00=/sys/bus/i2c/devices/84-004b/hwmon/ +hwmon_temp.addr_0x0004_0x00=0 +hwmon_temp.len_0x0004_0x00=8 +hwmon_temp.bit_offset_0x0004_0x00= +hwmon_temp.str_cons_0x0004_0x00=temp1_input + +hwmon_temp.mode_0x0004_0x01=str_constant +hwmon_temp.str_cons_0x0004_0x01=FCB_DOWN_TEMP_04 + +hwmon_temp.mode_0x0004_0x02=str_constant +hwmon_temp.str_cons_0x0004_0x02=CT75_04 + +hwmon_temp.mode_0x0004_0x03=str_constant +hwmon_temp.str_cons_0x0004_0x03=75000 + +hwmon_temp.mode_0x0004_0x05=str_constant +hwmon_temp.str_cons_0x0004_0x05=-30000 + +hwmon_temp.mode_0x0004_0x09=str_constant +hwmon_temp.str_cons_0x0004_0x09=70000 + +hwmon_temp.mode_0x0004_0x0a=str_constant +hwmon_temp.str_cons_0x0004_0x0a=-20000 + +# temp5 +hwmon_temp.mode_0x0005_0x00=config +hwmon_temp.int_cons_0x0005_0x00=0 +hwmon_temp.src_0x0005_0x00=file +hwmon_temp.frmt_0x0005_0x00=buf +hwmon_temp.fpath_0x0005_0x00=/sys/bus/i2c/devices/123-004b/hwmon/ +hwmon_temp.addr_0x0005_0x00=0 +hwmon_temp.len_0x0005_0x00=8 +hwmon_temp.bit_offset_0x0005_0x00= +hwmon_temp.str_cons_0x0005_0x00=temp1_input + +hwmon_temp.mode_0x0005_0x01=str_constant +hwmon_temp.str_cons_0x0005_0x01=MAC_TEMP_05 + +hwmon_temp.mode_0x0005_0x02=str_constant +hwmon_temp.str_cons_0x0005_0x02=CT75_05 + +hwmon_temp.mode_0x0005_0x03=str_constant +hwmon_temp.str_cons_0x0005_0x03=105000 + +hwmon_temp.mode_0x0005_0x05=str_constant +hwmon_temp.str_cons_0x0005_0x05=-30000 + +hwmon_temp.mode_0x0005_0x09=str_constant +hwmon_temp.str_cons_0x0005_0x09=90000 + +hwmon_temp.mode_0x0005_0x0a=str_constant +hwmon_temp.str_cons_0x0005_0x0a=-20000 + +# temp6 +hwmon_temp.mode_0x0006_0x00=config +hwmon_temp.int_cons_0x0006_0x00=0 +hwmon_temp.src_0x0006_0x00=file +hwmon_temp.frmt_0x0006_0x00=buf +hwmon_temp.fpath_0x0006_0x00=/sys/bus/i2c/devices/124-004f/hwmon/ +hwmon_temp.addr_0x0006_0x00=0 +hwmon_temp.len_0x0006_0x00=8 +hwmon_temp.bit_offset_0x0006_0x00= +hwmon_temp.str_cons_0x0006_0x00=temp1_input + +hwmon_temp.mode_0x0006_0x01=str_constant +hwmon_temp.str_cons_0x0006_0x01=MAC_TBOARD_TEMP_06 + +hwmon_temp.mode_0x0006_0x02=str_constant +hwmon_temp.str_cons_0x0006_0x02=CT75_06 + +hwmon_temp.mode_0x0006_0x03=str_constant +hwmon_temp.str_cons_0x0006_0x03=105000 + +hwmon_temp.mode_0x0006_0x05=str_constant +hwmon_temp.str_cons_0x0006_0x05=-30000 + +hwmon_temp.mode_0x0006_0x09=str_constant +hwmon_temp.str_cons_0x0006_0x09=95000 + +hwmon_temp.mode_0x0006_0x0a=str_constant +hwmon_temp.str_cons_0x0006_0x0a=-20000 + +# fix temp7 +hwmon_temp.mode_0x0007_0x00=config +hwmon_temp.int_cons_0x0007_0x00=0 +hwmon_temp.src_0x0007_0x00=file +hwmon_temp.frmt_0x0007_0x00=buf +hwmon_temp.fpath_0x0007_0x00=/sys/bus/i2c/devices/124-004f/hwmon/ +hwmon_temp.addr_0x0007_0x00=0 +hwmon_temp.len_0x0007_0x00=8 +hwmon_temp.bit_offset_0x0007_0x00= +hwmon_temp.str_cons_0x0007_0x00=temp1_input + +hwmon_temp.mode_0x0007_0x01=str_constant +hwmon_temp.str_cons_0x0007_0x01=BMC_TEMP_07 + +hwmon_temp.mode_0x0007_0x02=str_constant +hwmon_temp.str_cons_0x0007_0x02=CT75_07 + +hwmon_temp.mode_0x0007_0x03=str_constant +hwmon_temp.str_cons_0x0007_0x03=70000 + +hwmon_temp.mode_0x0007_0x05=str_constant +hwmon_temp.str_cons_0x0007_0x05=-30000 + +hwmon_temp.mode_0x0007_0x09=str_constant +hwmon_temp.str_cons_0x0007_0x09=60000 + +hwmon_temp.mode_0x0007_0x0a=str_constant +hwmon_temp.str_cons_0x0007_0x0a=-20000 + +# temp8 +hwmon_temp.mode_0x0008_0x00=config +hwmon_temp.int_cons_0x0008_0x00=0 +hwmon_temp.src_0x0008_0x00=file +hwmon_temp.frmt_0x0008_0x00=buf +hwmon_temp.fpath_0x0008_0x00=/sys/bus/i2c/devices/93-004b/hwmon/ +hwmon_temp.addr_0x0008_0x00=0 +hwmon_temp.len_0x0008_0x00=8 +hwmon_temp.bit_offset_0x0008_0x00= +hwmon_temp.str_cons_0x0008_0x00=temp1_input + +hwmon_temp.mode_0x0008_0x01=str_constant +hwmon_temp.str_cons_0x0008_0x01=UPORT_TEMP_08 + +hwmon_temp.mode_0x0008_0x02=str_constant +hwmon_temp.str_cons_0x0008_0x02=CT75_08 + +hwmon_temp.mode_0x0008_0x03=str_constant +hwmon_temp.str_cons_0x0008_0x03=105000 + +hwmon_temp.mode_0x0008_0x05=str_constant +hwmon_temp.str_cons_0x0008_0x05=-30000 + +hwmon_temp.mode_0x0008_0x09=str_constant +hwmon_temp.str_cons_0x0008_0x09=90000 + +hwmon_temp.mode_0x0008_0x0a=str_constant +hwmon_temp.str_cons_0x0008_0x0a=-20000 + +# temp9 +hwmon_temp.mode_0x0009_0x00=config +hwmon_temp.int_cons_0x0009_0x00=0 +hwmon_temp.src_0x0009_0x00=file +hwmon_temp.frmt_0x0009_0x00=buf +hwmon_temp.fpath_0x0009_0x00=/sys/bus/i2c/devices/101-004b/hwmon/ +hwmon_temp.addr_0x0009_0x00=0 +hwmon_temp.len_0x0009_0x00=8 +hwmon_temp.bit_offset_0x0009_0x00= +hwmon_temp.str_cons_0x0009_0x00=temp1_input + +hwmon_temp.mode_0x0009_0x01=str_constant +hwmon_temp.str_cons_0x0009_0x01=DPORT_TEMP_09 + +hwmon_temp.mode_0x0009_0x02=str_constant +hwmon_temp.str_cons_0x0009_0x02=CT75_09 + +hwmon_temp.mode_0x0009_0x03=str_constant +hwmon_temp.str_cons_0x0009_0x03=105000 + +hwmon_temp.mode_0x0009_0x05=str_constant +hwmon_temp.str_cons_0x0009_0x05=-30000 + +hwmon_temp.mode_0x0009_0x09=str_constant +hwmon_temp.str_cons_0x0009_0x09=90000 + +hwmon_temp.mode_0x0009_0x0a=str_constant +hwmon_temp.str_cons_0x0009_0x0a=-20000 + +# temp10 +hwmon_temp.mode_0x000a_0x00=config +hwmon_temp.int_cons_0x000a_0x00=0 +hwmon_temp.src_0x000a_0x00=file +hwmon_temp.frmt_0x000a_0x00=buf +hwmon_temp.fpath_0x000a_0x00=/etc/sonic/highest_sff_temp +hwmon_temp.addr_0x000a_0x00=0 +hwmon_temp.len_0x000a_0x00=8 +hwmon_temp.bit_offset_0x000a_0x00= +hwmon_temp.str_cons_0x000a_0x00= + +hwmon_temp.mode_0x000a_0x01=str_constant +hwmon_temp.str_cons_0x000a_0x01=SFP_MAX_TEMP + +hwmon_temp.mode_0x000a_0x02=str_constant +hwmon_temp.str_cons_0x000a_0x02=SFP + +hwmon_temp.mode_0x000a_0x03=str_constant +hwmon_temp.str_cons_0x000a_0x03=70000 + +hwmon_temp.mode_0x000a_0x05=str_constant +hwmon_temp.str_cons_0x000a_0x05=-30000 + +hwmon_temp.mode_0x000a_0x09=str_constant +hwmon_temp.str_cons_0x000a_0x09=68000 + +hwmon_temp.mode_0x000a_0x0a=str_constant +hwmon_temp.str_cons_0x000a_0x0a=-20000 + +# temp11 +hwmon_temp.mode_0x000b_0x00=config +hwmon_temp.int_cons_0x000b_0x00=0 +hwmon_temp.src_0x000b_0x00=file +hwmon_temp.frmt_0x000b_0x00=buf +hwmon_temp.fpath_0x000b_0x00=/sys/devices/pci0000:00/0000:00:18.3/hwmon/ +hwmon_temp.addr_0x000b_0x00=0 +hwmon_temp.len_0x000b_0x00=8 +hwmon_temp.bit_offset_0x000b_0x00= +hwmon_temp.str_cons_0x000b_0x00=temp1_input + +hwmon_temp.mode_0x000b_0x01=str_constant +hwmon_temp.str_cons_0x000b_0x01=CPU_TEMP + +hwmon_temp.mode_0x000b_0x02=str_constant +hwmon_temp.str_cons_0x000b_0x02=CPU + +hwmon_temp.mode_0x000b_0x03=str_constant +hwmon_temp.str_cons_0x000b_0x03=95000 + +hwmon_temp.mode_0x000b_0x05=str_constant +hwmon_temp.str_cons_0x000b_0x05=-30000 + +hwmon_temp.mode_0x000b_0x09=str_constant +hwmon_temp.str_cons_0x000b_0x09=90000 + +hwmon_temp.mode_0x000b_0x0a=str_constant +hwmon_temp.str_cons_0x000b_0x0a=-20000 + +# temp12 +hwmon_temp.mode_0x000c_0x00=config +hwmon_temp.int_cons_0x000c_0x00=0 +hwmon_temp.src_0x000c_0x00=logic_file +hwmon_temp.frmt_0x000c_0x00=num_bytes +hwmon_temp.fpath_0x000c_0x00=/dev/cpld2 +hwmon_temp.addr_0x000c_0x00=0x37 +hwmon_temp.len_0x000c_0x00=2 +hwmon_temp.bit_offset_0x000c_0x00= +hwmon_temp.str_cons_0x000c_0x00=temp0_input +hwmon_temp.int_extra1_0x000c_0x00=8 + +hwmon_temp.mode_0x000c_0x01=str_constant +hwmon_temp.str_cons_0x000c_0x01=MAC_TEMP_MIN + +hwmon_temp.mode_0x000c_0x02=str_constant +hwmon_temp.str_cons_0x000c_0x02=CPLD_04 + +hwmon_temp.mode_0x000c_0x03=str_constant +hwmon_temp.str_cons_0x000c_0x03=105000 + +hwmon_temp.mode_0x000c_0x05=str_constant +hwmon_temp.str_cons_0x000c_0x05=-30000 + +hwmon_temp.mode_0x000c_0x09=str_constant +hwmon_temp.str_cons_0x000c_0x09=100000 + +hwmon_temp.mode_0x000c_0x0a=str_constant +hwmon_temp.str_cons_0x000c_0x0a=-20000 + +# temp13 +hwmon_temp.mode_0x000d_0x00=config +hwmon_temp.int_cons_0x000d_0x00=0 +hwmon_temp.src_0x000d_0x00=logic_file +hwmon_temp.frmt_0x000d_0x00=num_bytes +hwmon_temp.fpath_0x000d_0x00=/dev/cpld2 +hwmon_temp.addr_0x000d_0x00=0x39 +hwmon_temp.len_0x000d_0x00=2 +hwmon_temp.bit_offset_0x000d_0x00= +hwmon_temp.str_cons_0x000d_0x00=temp1_input +hwmon_temp.int_extra1_0x000d_0x00=8 + +hwmon_temp.mode_0x000d_0x01=str_constant +hwmon_temp.str_cons_0x000d_0x01=MAC_TEMP_MAX + +hwmon_temp.mode_0x000d_0x02=str_constant +hwmon_temp.str_cons_0x000d_0x02=CPLD_04 + +hwmon_temp.mode_0x000d_0x03=str_constant +hwmon_temp.str_cons_0x000d_0x03=105000 + +hwmon_temp.mode_0x000d_0x05=str_constant +hwmon_temp.str_cons_0x000d_0x05=-30000 + +hwmon_temp.mode_0x000d_0x09=str_constant +hwmon_temp.str_cons_0x000d_0x09=100000 + +hwmon_temp.mode_0x000d_0x0a=str_constant +hwmon_temp.str_cons_0x000d_0x0a=-20000 + +# temp14 +hwmon_temp.mode_0x000e_0x00=config +hwmon_temp.int_cons_0x000e_0x00=0 +hwmon_temp.src_0x000e_0x00=file +hwmon_temp.frmt_0x000e_0x00=buf +hwmon_temp.fpath_0x000e_0x00=/sys/bus/i2c/devices/136-0060/hwmon/ +hwmon_temp.addr_0x000e_0x00=0 +hwmon_temp.len_0x000e_0x00=8 +hwmon_temp.bit_offset_0x000e_0x00= +hwmon_temp.str_cons_0x000e_0x00=temp1_input + +hwmon_temp.mode_0x000e_0x01=str_constant +hwmon_temp.str_cons_0x000e_0x01=TMOS_MAC_VDDC_0V8 + +hwmon_temp.mode_0x000e_0x02=str_constant +hwmon_temp.str_cons_0x000e_0x02=XDPE1A2G5B_01 + +hwmon_temp.mode_0x000e_0x03=str_constant +hwmon_temp.str_cons_0x000e_0x03=125000 + +hwmon_temp.mode_0x000e_0x05=str_constant +hwmon_temp.str_cons_0x000e_0x05=-30000 + +hwmon_temp.mode_0x000e_0x09=str_constant +hwmon_temp.str_cons_0x000e_0x09=110000 + +hwmon_temp.mode_0x000e_0x0a=str_constant +hwmon_temp.str_cons_0x000e_0x0a=-20000 + +# temp15 +hwmon_temp.mode_0x000f_0x00=config +hwmon_temp.int_cons_0x000f_0x00=0 +hwmon_temp.src_0x000f_0x00=file +hwmon_temp.frmt_0x000f_0x00=buf +hwmon_temp.fpath_0x000f_0x00=/sys/bus/i2c/devices/107-0060/hwmon/ +hwmon_temp.addr_0x000f_0x00=0 +hwmon_temp.len_0x000f_0x00=8 +hwmon_temp.bit_offset_0x000f_0x00= +hwmon_temp.str_cons_0x000f_0x00=temp1_input + +hwmon_temp.mode_0x000f_0x01=str_constant +hwmon_temp.str_cons_0x000f_0x01=TMOS_MAC_PT0_VDDC_0V8 + +hwmon_temp.mode_0x000f_0x02=str_constant +hwmon_temp.str_cons_0x000f_0x02=XDPE12284C_05 + +hwmon_temp.mode_0x000f_0x03=str_constant +hwmon_temp.str_cons_0x000f_0x03=125000 + +hwmon_temp.mode_0x000f_0x05=str_constant +hwmon_temp.str_cons_0x000f_0x05=-30000 + +hwmon_temp.mode_0x000f_0x09=str_constant +hwmon_temp.str_cons_0x000f_0x09=110000 + +hwmon_temp.mode_0x000f_0x0a=str_constant +hwmon_temp.str_cons_0x000f_0x0a=-20000 + +# temp16 +hwmon_temp.mode_0x0010_0x00=config +hwmon_temp.int_cons_0x0010_0x00=0 +hwmon_temp.src_0x0010_0x00=file +hwmon_temp.frmt_0x0010_0x00=buf +hwmon_temp.fpath_0x0010_0x00=/sys/bus/i2c/devices/107-0060/hwmon/ +hwmon_temp.addr_0x0010_0x00=0 +hwmon_temp.len_0x0010_0x00=8 +hwmon_temp.bit_offset_0x0010_0x00= +hwmon_temp.str_cons_0x0010_0x00=temp2_input + +hwmon_temp.mode_0x0010_0x01=str_constant +hwmon_temp.str_cons_0x0010_0x01=TMOS_MAC_PT1_VDDC_0V8 + +hwmon_temp.mode_0x0010_0x02=str_constant +hwmon_temp.str_cons_0x0010_0x02=XDPE12284C_05 + +hwmon_temp.mode_0x0010_0x03=str_constant +hwmon_temp.str_cons_0x0010_0x03=125000 + +hwmon_temp.mode_0x0010_0x05=str_constant +hwmon_temp.str_cons_0x0010_0x05=-30000 + +hwmon_temp.mode_0x0010_0x09=str_constant +hwmon_temp.str_cons_0x0010_0x09=110000 + +hwmon_temp.mode_0x0010_0x0a=str_constant +hwmon_temp.str_cons_0x0010_0x0a=-20000 + +# temp17 +hwmon_temp.mode_0x0011_0x00=config +hwmon_temp.int_cons_0x0011_0x00=0 +hwmon_temp.src_0x0011_0x00=file +hwmon_temp.frmt_0x0011_0x00=buf +hwmon_temp.fpath_0x0011_0x00=/sys/bus/i2c/devices/108-0060/hwmon/ +hwmon_temp.addr_0x0011_0x00=0 +hwmon_temp.len_0x0011_0x00=8 +hwmon_temp.bit_offset_0x0011_0x00= +hwmon_temp.str_cons_0x0011_0x00=temp1_input + +hwmon_temp.mode_0x0011_0x01=str_constant +hwmon_temp.str_cons_0x0011_0x01=TMOS_MAC_PT2_VDDC_0V8 + +hwmon_temp.mode_0x0011_0x02=str_constant +hwmon_temp.str_cons_0x0011_0x02=XDPE12284C_06 + +hwmon_temp.mode_0x0011_0x03=str_constant +hwmon_temp.str_cons_0x0011_0x03=125000 + +hwmon_temp.mode_0x0011_0x05=str_constant +hwmon_temp.str_cons_0x0011_0x05=-30000 + +hwmon_temp.mode_0x0011_0x09=str_constant +hwmon_temp.str_cons_0x0011_0x09=110000 + +hwmon_temp.mode_0x0011_0x0a=str_constant +hwmon_temp.str_cons_0x0011_0x0a=-20000 + +# temp18 +hwmon_temp.mode_0x0012_0x00=config +hwmon_temp.int_cons_0x0012_0x00=0 +hwmon_temp.src_0x0012_0x00=file +hwmon_temp.frmt_0x0012_0x00=buf +hwmon_temp.fpath_0x0012_0x00=/sys/bus/i2c/devices/108-0060/hwmon/ +hwmon_temp.addr_0x0012_0x00=0 +hwmon_temp.len_0x0012_0x00=8 +hwmon_temp.bit_offset_0x0012_0x00= +hwmon_temp.str_cons_0x0012_0x00=temp2_input + +hwmon_temp.mode_0x0012_0x01=str_constant +hwmon_temp.str_cons_0x0012_0x01=TMOS_MAC_PT3_VDDC_0V8 + +hwmon_temp.mode_0x0012_0x02=str_constant +hwmon_temp.str_cons_0x0012_0x02=XDPE12284C_06 + +hwmon_temp.mode_0x0012_0x03=str_constant +hwmon_temp.str_cons_0x0012_0x03=125000 + +hwmon_temp.mode_0x0012_0x05=str_constant +hwmon_temp.str_cons_0x0012_0x05=-30000 + +hwmon_temp.mode_0x0012_0x09=str_constant +hwmon_temp.str_cons_0x0012_0x09=110000 + +hwmon_temp.mode_0x0012_0x0a=str_constant +hwmon_temp.str_cons_0x0012_0x0a=-20000 + +# temp19 +hwmon_temp.mode_0x0013_0x00=config +hwmon_temp.int_cons_0x0013_0x00=0 +hwmon_temp.src_0x0013_0x00=file +hwmon_temp.frmt_0x0013_0x00=buf +hwmon_temp.fpath_0x0013_0x00=/sys/bus/i2c/devices/109-0060/hwmon/ +hwmon_temp.addr_0x0013_0x00=0 +hwmon_temp.len_0x0013_0x00=8 +hwmon_temp.bit_offset_0x0013_0x00= +hwmon_temp.str_cons_0x0013_0x00=temp1_input + +hwmon_temp.mode_0x0013_0x01=str_constant +hwmon_temp.str_cons_0x0013_0x01=TMOS_MAC_PT4_VDDC_0V8 + +hwmon_temp.mode_0x0013_0x02=str_constant +hwmon_temp.str_cons_0x0013_0x02=XDPE12284C_07 + +hwmon_temp.mode_0x0013_0x03=str_constant +hwmon_temp.str_cons_0x0013_0x03=125000 + +hwmon_temp.mode_0x0013_0x05=str_constant +hwmon_temp.str_cons_0x0013_0x05=-30000 + +hwmon_temp.mode_0x0013_0x09=str_constant +hwmon_temp.str_cons_0x0013_0x09=110000 + +hwmon_temp.mode_0x0013_0x0a=str_constant +hwmon_temp.str_cons_0x0013_0x0a=-20000 + +# temp20 +hwmon_temp.mode_0x0014_0x00=config +hwmon_temp.int_cons_0x0014_0x00=0 +hwmon_temp.src_0x0014_0x00=file +hwmon_temp.frmt_0x0014_0x00=buf +hwmon_temp.fpath_0x0014_0x00=/sys/bus/i2c/devices/109-0060/hwmon/ +hwmon_temp.addr_0x0014_0x00=0 +hwmon_temp.len_0x0014_0x00=8 +hwmon_temp.bit_offset_0x0014_0x00= +hwmon_temp.str_cons_0x0014_0x00=temp2_input + +hwmon_temp.mode_0x0014_0x01=str_constant +hwmon_temp.str_cons_0x0014_0x01=TMOS_MAC_PT5_VDDC_0V8 + +hwmon_temp.mode_0x0014_0x02=str_constant +hwmon_temp.str_cons_0x0014_0x02=XDPE12284C_07 + +hwmon_temp.mode_0x0014_0x03=str_constant +hwmon_temp.str_cons_0x0014_0x03=125000 + +hwmon_temp.mode_0x0014_0x05=str_constant +hwmon_temp.str_cons_0x0014_0x05=-30000 + +hwmon_temp.mode_0x0014_0x09=str_constant +hwmon_temp.str_cons_0x0014_0x09=110000 + +hwmon_temp.mode_0x0014_0x0a=str_constant +hwmon_temp.str_cons_0x0014_0x0a=-20000 + +# temp21 +hwmon_temp.mode_0x0015_0x00=config +hwmon_temp.int_cons_0x0015_0x00=0 +hwmon_temp.src_0x0015_0x00=file +hwmon_temp.frmt_0x0015_0x00=buf +hwmon_temp.fpath_0x0015_0x00=/sys/bus/i2c/devices/110-0060/hwmon/ +hwmon_temp.addr_0x0015_0x00=0 +hwmon_temp.len_0x0015_0x00=8 +hwmon_temp.bit_offset_0x0015_0x00= +hwmon_temp.str_cons_0x0015_0x00=temp1_input + +hwmon_temp.mode_0x0015_0x01=str_constant +hwmon_temp.str_cons_0x0015_0x01=TMOS_MAC_PT6_VDDC_0V8 + +hwmon_temp.mode_0x0015_0x02=str_constant +hwmon_temp.str_cons_0x0015_0x02=XDPE12284C_08 + +hwmon_temp.mode_0x0015_0x03=str_constant +hwmon_temp.str_cons_0x0015_0x03=125000 + +hwmon_temp.mode_0x0015_0x05=str_constant +hwmon_temp.str_cons_0x0015_0x05=-30000 + +hwmon_temp.mode_0x0015_0x09=str_constant +hwmon_temp.str_cons_0x0015_0x09=110000 + +hwmon_temp.mode_0x0015_0x0a=str_constant +hwmon_temp.str_cons_0x0015_0x0a=-20000 + +# temp22 +hwmon_temp.mode_0x0016_0x00=config +hwmon_temp.int_cons_0x0016_0x00=0 +hwmon_temp.src_0x0016_0x00=file +hwmon_temp.frmt_0x0016_0x00=buf +hwmon_temp.fpath_0x0016_0x00=/sys/bus/i2c/devices/110-0060/hwmon/ +hwmon_temp.addr_0x0016_0x00=0 +hwmon_temp.len_0x0016_0x00=8 +hwmon_temp.bit_offset_0x0016_0x00= +hwmon_temp.str_cons_0x0016_0x00=temp2_input + +hwmon_temp.mode_0x0016_0x01=str_constant +hwmon_temp.str_cons_0x0016_0x01=TMOS_MAC_PT7_VDDC_0V8 + +hwmon_temp.mode_0x0016_0x02=str_constant +hwmon_temp.str_cons_0x0016_0x02=XDPE12284C_08 + +hwmon_temp.mode_0x0016_0x03=str_constant +hwmon_temp.str_cons_0x0016_0x03=125000 + +hwmon_temp.mode_0x0016_0x05=str_constant +hwmon_temp.str_cons_0x0016_0x05=-30000 + +hwmon_temp.mode_0x0016_0x09=str_constant +hwmon_temp.str_cons_0x0016_0x09=110000 + +hwmon_temp.mode_0x0016_0x0a=str_constant +hwmon_temp.str_cons_0x0016_0x0a=-20000 + +# temp23 +hwmon_temp.mode_0x0017_0x00=config +hwmon_temp.int_cons_0x0017_0x00=0 +hwmon_temp.src_0x0017_0x00=file +hwmon_temp.frmt_0x0017_0x00=buf +hwmon_temp.fpath_0x0017_0x00=/sys/bus/i2c/devices/111-0060/hwmon/ +hwmon_temp.addr_0x0017_0x00=0 +hwmon_temp.len_0x0017_0x00=8 +hwmon_temp.bit_offset_0x0017_0x00= +hwmon_temp.str_cons_0x0017_0x00=temp1_input + +hwmon_temp.mode_0x0017_0x01=str_constant +hwmon_temp.str_cons_0x0017_0x01=TMOS_MAC_PB0_PB7_TRVDD + +hwmon_temp.mode_0x0017_0x02=str_constant +hwmon_temp.str_cons_0x0017_0x02=XDPE12284C_09 + +hwmon_temp.mode_0x0017_0x03=str_constant +hwmon_temp.str_cons_0x0017_0x03=125000 + +hwmon_temp.mode_0x0017_0x05=str_constant +hwmon_temp.str_cons_0x0017_0x05=-30000 + +hwmon_temp.mode_0x0017_0x09=str_constant +hwmon_temp.str_cons_0x0017_0x09=110000 + +hwmon_temp.mode_0x0017_0x0a=str_constant +hwmon_temp.str_cons_0x0017_0x0a=-20000 + +# temp24 +hwmon_temp.mode_0x0018_0x00=config +hwmon_temp.int_cons_0x0018_0x00=0 +hwmon_temp.src_0x0018_0x00=file +hwmon_temp.frmt_0x0018_0x00=buf +hwmon_temp.fpath_0x0018_0x00=/sys/bus/i2c/devices/111-0060/hwmon/ +hwmon_temp.addr_0x0018_0x00=0 +hwmon_temp.len_0x0018_0x00=8 +hwmon_temp.bit_offset_0x0018_0x00= +hwmon_temp.str_cons_0x0018_0x00=temp2_input + +hwmon_temp.mode_0x0018_0x01=str_constant +hwmon_temp.str_cons_0x0018_0x01=TMOS_MAC_PB1_PB2_TRVDD + +hwmon_temp.mode_0x0018_0x02=str_constant +hwmon_temp.str_cons_0x0018_0x02=XDPE12284C_09 + +hwmon_temp.mode_0x0018_0x03=str_constant +hwmon_temp.str_cons_0x0018_0x03=125000 + +hwmon_temp.mode_0x0018_0x05=str_constant +hwmon_temp.str_cons_0x0018_0x05=-30000 + +hwmon_temp.mode_0x0018_0x09=str_constant +hwmon_temp.str_cons_0x0018_0x09=110000 + +hwmon_temp.mode_0x0018_0x0a=str_constant +hwmon_temp.str_cons_0x0018_0x0a=-20000 + +# temp25 +hwmon_temp.mode_0x0019_0x00=config +hwmon_temp.int_cons_0x0019_0x00=0 +hwmon_temp.src_0x0019_0x00=file +hwmon_temp.frmt_0x0019_0x00=buf +hwmon_temp.fpath_0x0019_0x00=/sys/bus/i2c/devices/112-0060/hwmon/ +hwmon_temp.addr_0x0019_0x00=0 +hwmon_temp.len_0x0019_0x00=8 +hwmon_temp.bit_offset_0x0019_0x00= +hwmon_temp.str_cons_0x0019_0x00=temp1_input + +hwmon_temp.mode_0x0019_0x01=str_constant +hwmon_temp.str_cons_0x0019_0x01=TMOS_MAC_PB3_PB4_TRVDD + +hwmon_temp.mode_0x0019_0x02=str_constant +hwmon_temp.str_cons_0x0019_0x02=XDPE12284C_10 + +hwmon_temp.mode_0x0019_0x03=str_constant +hwmon_temp.str_cons_0x0019_0x03=125000 + +hwmon_temp.mode_0x0019_0x05=str_constant +hwmon_temp.str_cons_0x0019_0x05=-30000 + +hwmon_temp.mode_0x0019_0x09=str_constant +hwmon_temp.str_cons_0x0019_0x09=110000 + +hwmon_temp.mode_0x0019_0x0a=str_constant +hwmon_temp.str_cons_0x0019_0x0a=-20000 + +# temp26 +hwmon_temp.mode_0x001a_0x00=config +hwmon_temp.int_cons_0x001a_0x00=0 +hwmon_temp.src_0x001a_0x00=file +hwmon_temp.frmt_0x001a_0x00=buf +hwmon_temp.fpath_0x001a_0x00=/sys/bus/i2c/devices/112-0060/hwmon/ +hwmon_temp.addr_0x001a_0x00=0 +hwmon_temp.len_0x001a_0x00=8 +hwmon_temp.bit_offset_0x001a_0x00= +hwmon_temp.str_cons_0x001a_0x00=temp2_input + +hwmon_temp.mode_0x001a_0x01=str_constant +hwmon_temp.str_cons_0x001a_0x01=TMOS_MAC_PB5_PB6_TRVDD + +hwmon_temp.mode_0x001a_0x02=str_constant +hwmon_temp.str_cons_0x001a_0x02=XDPE12284C_10 + +hwmon_temp.mode_0x001a_0x03=str_constant +hwmon_temp.str_cons_0x001a_0x03=125000 + +hwmon_temp.mode_0x001a_0x05=str_constant +hwmon_temp.str_cons_0x001a_0x05=-30000 + +hwmon_temp.mode_0x001a_0x09=str_constant +hwmon_temp.str_cons_0x001a_0x09=110000 + +hwmon_temp.mode_0x001a_0x0a=str_constant +hwmon_temp.str_cons_0x001a_0x0a=-20000 + +# temp27 +hwmon_temp.mode_0x001b_0x00=config +hwmon_temp.int_cons_0x001b_0x00=0 +hwmon_temp.src_0x001b_0x00=file +hwmon_temp.frmt_0x001b_0x00=buf +hwmon_temp.fpath_0x001b_0x00=/sys/bus/i2c/devices/113-0060/hwmon/ +hwmon_temp.addr_0x001b_0x00=0 +hwmon_temp.len_0x001b_0x00=8 +hwmon_temp.bit_offset_0x001b_0x00= +hwmon_temp.str_cons_0x001b_0x00=temp1_input + +hwmon_temp.mode_0x001b_0x01=str_constant +hwmon_temp.str_cons_0x001b_0x01=TMOS_MAC_TRVDD0_0V9 + +hwmon_temp.mode_0x001b_0x02=str_constant +hwmon_temp.str_cons_0x001b_0x02=XDPE12284C_11 + +hwmon_temp.mode_0x001b_0x03=str_constant +hwmon_temp.str_cons_0x001b_0x03=125000 + +hwmon_temp.mode_0x001b_0x05=str_constant +hwmon_temp.str_cons_0x001b_0x05=-30000 + +hwmon_temp.mode_0x001b_0x09=str_constant +hwmon_temp.str_cons_0x001b_0x09=110000 + +hwmon_temp.mode_0x001b_0x0a=str_constant +hwmon_temp.str_cons_0x001b_0x0a=-20000 + +# temp28 +hwmon_temp.mode_0x001c_0x00=config +hwmon_temp.int_cons_0x001c_0x00=0 +hwmon_temp.src_0x001c_0x00=file +hwmon_temp.frmt_0x001c_0x00=buf +hwmon_temp.fpath_0x001c_0x00=/sys/bus/i2c/devices/113-0060/hwmon/ +hwmon_temp.addr_0x001c_0x00=0 +hwmon_temp.len_0x001c_0x00=8 +hwmon_temp.bit_offset_0x001c_0x00= +hwmon_temp.str_cons_0x001c_0x00=temp2_input + +hwmon_temp.mode_0x001c_0x01=str_constant +hwmon_temp.str_cons_0x001c_0x01=TMOS_MAC_TRVDD0_0V75 + +hwmon_temp.mode_0x001c_0x02=str_constant +hwmon_temp.str_cons_0x001c_0x02=XDPE12284C_11 + +hwmon_temp.mode_0x001c_0x03=str_constant +hwmon_temp.str_cons_0x001c_0x03=125000 + +hwmon_temp.mode_0x001c_0x05=str_constant +hwmon_temp.str_cons_0x001c_0x05=-30000 + +hwmon_temp.mode_0x001c_0x09=str_constant +hwmon_temp.str_cons_0x001c_0x09=110000 + +hwmon_temp.mode_0x001c_0x0a=str_constant +hwmon_temp.str_cons_0x001c_0x0a=-20000 + +# temp29 +hwmon_temp.mode_0x001d_0x00=config +hwmon_temp.int_cons_0x001d_0x00=0 +hwmon_temp.src_0x001d_0x00=file +hwmon_temp.frmt_0x001d_0x00=buf +hwmon_temp.fpath_0x001d_0x00=/sys/bus/i2c/devices/114-0060/hwmon/ +hwmon_temp.addr_0x001d_0x00=0 +hwmon_temp.len_0x001d_0x00=8 +hwmon_temp.bit_offset_0x001d_0x00= +hwmon_temp.str_cons_0x001d_0x00=temp1_input + +hwmon_temp.mode_0x001d_0x01=str_constant +hwmon_temp.str_cons_0x001d_0x01=TMOS_MAC_TRVDD1_0V9 + +hwmon_temp.mode_0x001d_0x02=str_constant +hwmon_temp.str_cons_0x001d_0x02=XDPE12284C_12 + +hwmon_temp.mode_0x001d_0x03=str_constant +hwmon_temp.str_cons_0x001d_0x03=125000 + +hwmon_temp.mode_0x001d_0x05=str_constant +hwmon_temp.str_cons_0x001d_0x05=-30000 + +hwmon_temp.mode_0x001d_0x09=str_constant +hwmon_temp.str_cons_0x001d_0x09=110000 + +hwmon_temp.mode_0x001d_0x0a=str_constant +hwmon_temp.str_cons_0x001d_0x0a=-20000 + +# temp30 +hwmon_temp.mode_0x001e_0x00=config +hwmon_temp.int_cons_0x001e_0x00=0 +hwmon_temp.src_0x001e_0x00=file +hwmon_temp.frmt_0x001e_0x00=buf +hwmon_temp.fpath_0x001e_0x00=/sys/bus/i2c/devices/114-0060/hwmon/ +hwmon_temp.addr_0x001e_0x00=0 +hwmon_temp.len_0x001e_0x00=8 +hwmon_temp.bit_offset_0x001e_0x00= +hwmon_temp.str_cons_0x001e_0x00=temp2_input + +hwmon_temp.mode_0x001e_0x01=str_constant +hwmon_temp.str_cons_0x001e_0x01=TMOS_MAC_TRVDD1_0V75 + +hwmon_temp.mode_0x001e_0x02=str_constant +hwmon_temp.str_cons_0x001e_0x02=XDPE12284C_12 + +hwmon_temp.mode_0x001e_0x03=str_constant +hwmon_temp.str_cons_0x001e_0x03=125000 + +hwmon_temp.mode_0x001e_0x05=str_constant +hwmon_temp.str_cons_0x001e_0x05=-30000 + +hwmon_temp.mode_0x001e_0x09=str_constant +hwmon_temp.str_cons_0x001e_0x09=110000 + +hwmon_temp.mode_0x001e_0x0a=str_constant +hwmon_temp.str_cons_0x001e_0x0a=-20000 + +# temp31 +hwmon_temp.mode_0x001f_0x00=config +hwmon_temp.int_cons_0x001f_0x00=0 +hwmon_temp.src_0x001f_0x00=file +hwmon_temp.frmt_0x001f_0x00=buf +hwmon_temp.fpath_0x001f_0x00=/sys/bus/i2c/devices/115-0060/hwmon/ +hwmon_temp.addr_0x001f_0x00=0 +hwmon_temp.len_0x001f_0x00=8 +hwmon_temp.bit_offset_0x001f_0x00= +hwmon_temp.str_cons_0x001f_0x00=temp1_input + +hwmon_temp.mode_0x001f_0x01=str_constant +hwmon_temp.str_cons_0x001f_0x01=TMOS_MAC_OSFP_VDD3V3_A1 + +hwmon_temp.mode_0x001f_0x02=str_constant +hwmon_temp.str_cons_0x001f_0x02=XDPE12284C_13 + +hwmon_temp.mode_0x001f_0x03=str_constant +hwmon_temp.str_cons_0x001f_0x03=125000 + +hwmon_temp.mode_0x001f_0x05=str_constant +hwmon_temp.str_cons_0x001f_0x05=-30000 + +hwmon_temp.mode_0x001f_0x09=str_constant +hwmon_temp.str_cons_0x001f_0x09=110000 + +hwmon_temp.mode_0x001f_0x0a=str_constant +hwmon_temp.str_cons_0x001f_0x0a=-20000 + +# temp32 +hwmon_temp.mode_0x0020_0x00=config +hwmon_temp.int_cons_0x0020_0x00=0 +hwmon_temp.src_0x0020_0x00=file +hwmon_temp.frmt_0x0020_0x00=buf +hwmon_temp.fpath_0x0020_0x00=/sys/bus/i2c/devices/115-0060/hwmon/ +hwmon_temp.addr_0x0020_0x00=0 +hwmon_temp.len_0x0020_0x00=8 +hwmon_temp.bit_offset_0x0020_0x00= +hwmon_temp.str_cons_0x0020_0x00=temp2_input + +hwmon_temp.mode_0x0020_0x01=str_constant +hwmon_temp.str_cons_0x0020_0x01=TMOS_MAC_OSFP_VDD3V3_B1 + +hwmon_temp.mode_0x0020_0x02=str_constant +hwmon_temp.str_cons_0x0020_0x02=XDPE12284C_13 + +hwmon_temp.mode_0x0020_0x03=str_constant +hwmon_temp.str_cons_0x0020_0x03=125000 + +hwmon_temp.mode_0x0020_0x05=str_constant +hwmon_temp.str_cons_0x0020_0x05=-30000 + +hwmon_temp.mode_0x0020_0x09=str_constant +hwmon_temp.str_cons_0x0020_0x09=110000 + +hwmon_temp.mode_0x0020_0x0a=str_constant +hwmon_temp.str_cons_0x0020_0x0a=-20000 + +# temp33 +hwmon_temp.mode_0x0021_0x00=config +hwmon_temp.int_cons_0x0021_0x00=0 +hwmon_temp.src_0x0021_0x00=file +hwmon_temp.frmt_0x0021_0x00=buf +hwmon_temp.fpath_0x0021_0x00=/sys/bus/i2c/devices/116-0060/hwmon/ +hwmon_temp.addr_0x0021_0x00=0 +hwmon_temp.len_0x0021_0x00=8 +hwmon_temp.bit_offset_0x0021_0x00= +hwmon_temp.str_cons_0x0021_0x00=temp1_input + +hwmon_temp.mode_0x0021_0x01=str_constant +hwmon_temp.str_cons_0x0021_0x01=TMOS_MAC_OSFP_VDD3V3_A2 + +hwmon_temp.mode_0x0021_0x02=str_constant +hwmon_temp.str_cons_0x0021_0x02=XDPE12284C_14 + +hwmon_temp.mode_0x0021_0x03=str_constant +hwmon_temp.str_cons_0x0021_0x03=125000 + +hwmon_temp.mode_0x0021_0x05=str_constant +hwmon_temp.str_cons_0x0021_0x05=-30000 + +hwmon_temp.mode_0x0021_0x09=str_constant +hwmon_temp.str_cons_0x0021_0x09=110000 + +hwmon_temp.mode_0x0021_0x0a=str_constant +hwmon_temp.str_cons_0x0021_0x0a=-20000 + +# temp34 +hwmon_temp.mode_0x0022_0x00=config +hwmon_temp.int_cons_0x0022_0x00=0 +hwmon_temp.src_0x0022_0x00=file +hwmon_temp.frmt_0x0022_0x00=buf +hwmon_temp.fpath_0x0022_0x00=/sys/bus/i2c/devices/116-0060/hwmon/ +hwmon_temp.addr_0x0022_0x00=0 +hwmon_temp.len_0x0022_0x00=8 +hwmon_temp.bit_offset_0x0022_0x00= +hwmon_temp.str_cons_0x0022_0x00=temp2_input + +hwmon_temp.mode_0x0022_0x01=str_constant +hwmon_temp.str_cons_0x0022_0x01=TMOS_MAC_OSFP_VDD3V3_B2 + +hwmon_temp.mode_0x0022_0x02=str_constant +hwmon_temp.str_cons_0x0022_0x02=XDPE12284C_14 + +hwmon_temp.mode_0x0022_0x03=str_constant +hwmon_temp.str_cons_0x0022_0x03=125000 + +hwmon_temp.mode_0x0022_0x05=str_constant +hwmon_temp.str_cons_0x0022_0x05=-30000 + +hwmon_temp.mode_0x0022_0x09=str_constant +hwmon_temp.str_cons_0x0022_0x09=110000 + +hwmon_temp.mode_0x0022_0x0a=str_constant +hwmon_temp.str_cons_0x0022_0x0a=-20000 + +# temp35 +hwmon_temp.mode_0x0023_0x00=config +hwmon_temp.int_cons_0x0023_0x00=0 +hwmon_temp.src_0x0023_0x00=file +hwmon_temp.frmt_0x0023_0x00=buf +hwmon_temp.fpath_0x0023_0x00=/sys/bus/i2c/devices/117-0060/hwmon/ +hwmon_temp.addr_0x0023_0x00=0 +hwmon_temp.len_0x0023_0x00=8 +hwmon_temp.bit_offset_0x0023_0x00= +hwmon_temp.str_cons_0x0023_0x00=temp1_input + +hwmon_temp.mode_0x0023_0x01=str_constant +hwmon_temp.str_cons_0x0023_0x01=TMOS_MAC_OSFP_VDD3V3_A3 + +hwmon_temp.mode_0x0023_0x02=str_constant +hwmon_temp.str_cons_0x0023_0x02=XDPE12284C_15 + +hwmon_temp.mode_0x0023_0x03=str_constant +hwmon_temp.str_cons_0x0023_0x03=125000 + +hwmon_temp.mode_0x0023_0x05=str_constant +hwmon_temp.str_cons_0x0023_0x05=-30000 + +hwmon_temp.mode_0x0023_0x09=str_constant +hwmon_temp.str_cons_0x0023_0x09=110000 + +hwmon_temp.mode_0x0023_0x0a=str_constant +hwmon_temp.str_cons_0x0023_0x0a=-20000 + +# temp36 +hwmon_temp.mode_0x0024_0x00=config +hwmon_temp.int_cons_0x0024_0x00=0 +hwmon_temp.src_0x0024_0x00=file +hwmon_temp.frmt_0x0024_0x00=buf +hwmon_temp.fpath_0x0024_0x00=/sys/bus/i2c/devices/117-0060/hwmon/ +hwmon_temp.addr_0x0024_0x00=0 +hwmon_temp.len_0x0024_0x00=8 +hwmon_temp.bit_offset_0x0024_0x00= +hwmon_temp.str_cons_0x0024_0x00=temp2_input + +hwmon_temp.mode_0x0024_0x01=str_constant +hwmon_temp.str_cons_0x0024_0x01=TMOS_MAC_OSFP_VDD3V3_B3 + +hwmon_temp.mode_0x0024_0x02=str_constant +hwmon_temp.str_cons_0x0024_0x02=XDPE12284C_15 + +hwmon_temp.mode_0x0024_0x03=str_constant +hwmon_temp.str_cons_0x0024_0x03=125000 + +hwmon_temp.mode_0x0024_0x05=str_constant +hwmon_temp.str_cons_0x0024_0x05=-30000 + +hwmon_temp.mode_0x0024_0x09=str_constant +hwmon_temp.str_cons_0x0024_0x09=110000 + +hwmon_temp.mode_0x0024_0x0a=str_constant +hwmon_temp.str_cons_0x0024_0x0a=-20000 + +# temp37 +hwmon_temp.mode_0x0025_0x00=config +hwmon_temp.int_cons_0x0025_0x00=0 +hwmon_temp.src_0x0025_0x00=file +hwmon_temp.frmt_0x0025_0x00=buf +hwmon_temp.fpath_0x0025_0x00=/sys/bus/i2c/devices/118-0060/hwmon/ +hwmon_temp.addr_0x0025_0x00=0 +hwmon_temp.len_0x0025_0x00=8 +hwmon_temp.bit_offset_0x0025_0x00= +hwmon_temp.str_cons_0x0025_0x00=temp1_input + +hwmon_temp.mode_0x0025_0x01=str_constant +hwmon_temp.str_cons_0x0025_0x01=TMOS_MAC_OSFP_VDD3V3_A4 + +hwmon_temp.mode_0x0025_0x02=str_constant +hwmon_temp.str_cons_0x0025_0x02=XDPE12284C_16 + +hwmon_temp.mode_0x0025_0x03=str_constant +hwmon_temp.str_cons_0x0025_0x03=125000 + +hwmon_temp.mode_0x0025_0x05=str_constant +hwmon_temp.str_cons_0x0025_0x05=-30000 + +hwmon_temp.mode_0x0025_0x09=str_constant +hwmon_temp.str_cons_0x0025_0x09=110000 + +hwmon_temp.mode_0x0025_0x0a=str_constant +hwmon_temp.str_cons_0x0025_0x0a=-20000 + +# temp38 +hwmon_temp.mode_0x0026_0x00=config +hwmon_temp.int_cons_0x0026_0x00=0 +hwmon_temp.src_0x0026_0x00=file +hwmon_temp.frmt_0x0026_0x00=buf +hwmon_temp.fpath_0x0026_0x00=/sys/bus/i2c/devices/118-0060/hwmon/ +hwmon_temp.addr_0x0026_0x00=0 +hwmon_temp.len_0x0026_0x00=8 +hwmon_temp.bit_offset_0x0026_0x00= +hwmon_temp.str_cons_0x0026_0x00=temp2_input + +hwmon_temp.mode_0x0026_0x01=str_constant +hwmon_temp.str_cons_0x0026_0x01=TMOS_MAC_OSFP_VDD3V3_B4 + +hwmon_temp.mode_0x0026_0x02=str_constant +hwmon_temp.str_cons_0x0026_0x02=XDPE12284C_16 + +hwmon_temp.mode_0x0026_0x03=str_constant +hwmon_temp.str_cons_0x0026_0x03=125000 + +hwmon_temp.mode_0x0026_0x05=str_constant +hwmon_temp.str_cons_0x0026_0x05=-30000 + +hwmon_temp.mode_0x0026_0x09=str_constant +hwmon_temp.str_cons_0x0026_0x09=110000 + +hwmon_temp.mode_0x0026_0x0a=str_constant +hwmon_temp.str_cons_0x0026_0x0a=-20000 + +# temp39 +hwmon_temp.mode_0x0027_0x00=config +hwmon_temp.int_cons_0x0027_0x00=0 +hwmon_temp.src_0x0027_0x00=file +hwmon_temp.frmt_0x0027_0x00=buf +hwmon_temp.fpath_0x0027_0x00=/sys/bus/i2c/devices/119-0060/hwmon/ +hwmon_temp.addr_0x0027_0x00=0 +hwmon_temp.len_0x0027_0x00=8 +hwmon_temp.bit_offset_0x0027_0x00= +hwmon_temp.str_cons_0x0027_0x00=temp1_input + +hwmon_temp.mode_0x0027_0x01=str_constant +hwmon_temp.str_cons_0x0027_0x01=TMOS_MAC_OSFP_VDD3V3_A5 + +hwmon_temp.mode_0x0027_0x02=str_constant +hwmon_temp.str_cons_0x0027_0x02=XDPE12284C_17 + +hwmon_temp.mode_0x0027_0x03=str_constant +hwmon_temp.str_cons_0x0027_0x03=125000 + +hwmon_temp.mode_0x0027_0x05=str_constant +hwmon_temp.str_cons_0x0027_0x05=-30000 + +hwmon_temp.mode_0x0027_0x09=str_constant +hwmon_temp.str_cons_0x0027_0x09=110000 + +hwmon_temp.mode_0x0027_0x0a=str_constant +hwmon_temp.str_cons_0x0027_0x0a=-20000 + +# temp40 +hwmon_temp.mode_0x0028_0x00=config +hwmon_temp.int_cons_0x0028_0x00=0 +hwmon_temp.src_0x0028_0x00=file +hwmon_temp.frmt_0x0028_0x00=buf +hwmon_temp.fpath_0x0028_0x00=/sys/bus/i2c/devices/119-0060/hwmon/ +hwmon_temp.addr_0x0028_0x00=0 +hwmon_temp.len_0x0028_0x00=8 +hwmon_temp.bit_offset_0x0028_0x00= +hwmon_temp.str_cons_0x0028_0x00=temp2_input + +hwmon_temp.mode_0x0028_0x01=str_constant +hwmon_temp.str_cons_0x0028_0x01=TMOS_MAC_OSFP_VDD3V3_B5 + +hwmon_temp.mode_0x0028_0x02=str_constant +hwmon_temp.str_cons_0x0028_0x02=XDPE12284C_17 + +hwmon_temp.mode_0x0028_0x03=str_constant +hwmon_temp.str_cons_0x0028_0x03=125000 + +hwmon_temp.mode_0x0028_0x05=str_constant +hwmon_temp.str_cons_0x0028_0x05=-30000 + +hwmon_temp.mode_0x0028_0x09=str_constant +hwmon_temp.str_cons_0x0028_0x09=110000 + +hwmon_temp.mode_0x0028_0x0a=str_constant +hwmon_temp.str_cons_0x0028_0x0a=-20000 + +# temp41 +hwmon_temp.mode_0x0029_0x00=config +hwmon_temp.int_cons_0x0029_0x00=0 +hwmon_temp.src_0x0029_0x00=file +hwmon_temp.frmt_0x0029_0x00=buf +hwmon_temp.fpath_0x0029_0x00=/sys/bus/i2c/devices/120-0060/hwmon/ +hwmon_temp.addr_0x0029_0x00=0 +hwmon_temp.len_0x0029_0x00=8 +hwmon_temp.bit_offset_0x0029_0x00= +hwmon_temp.str_cons_0x0029_0x00=temp1_input + +hwmon_temp.mode_0x0029_0x01=str_constant +hwmon_temp.str_cons_0x0029_0x01=TMOS_MAC_OSFP_VDD3V3_A6 + +hwmon_temp.mode_0x0029_0x02=str_constant +hwmon_temp.str_cons_0x0029_0x02=XDPE12284C_18 + +hwmon_temp.mode_0x0029_0x03=str_constant +hwmon_temp.str_cons_0x0029_0x03=125000 + +hwmon_temp.mode_0x0029_0x05=str_constant +hwmon_temp.str_cons_0x0029_0x05=-30000 + +hwmon_temp.mode_0x0029_0x09=str_constant +hwmon_temp.str_cons_0x0029_0x09=110000 + +hwmon_temp.mode_0x0029_0x0a=str_constant +hwmon_temp.str_cons_0x0029_0x0a=-20000 + +# temp42 +hwmon_temp.mode_0x002a_0x00=config +hwmon_temp.int_cons_0x002a_0x00=0 +hwmon_temp.src_0x002a_0x00=file +hwmon_temp.frmt_0x002a_0x00=buf +hwmon_temp.fpath_0x002a_0x00=/sys/bus/i2c/devices/120-0060/hwmon/ +hwmon_temp.addr_0x002a_0x00=0 +hwmon_temp.len_0x002a_0x00=8 +hwmon_temp.bit_offset_0x002a_0x00= +hwmon_temp.str_cons_0x002a_0x00=temp2_input + +hwmon_temp.mode_0x002a_0x01=str_constant +hwmon_temp.str_cons_0x002a_0x01=TMOS_MAC_OSFP_VDD3V3_B6 + +hwmon_temp.mode_0x002a_0x02=str_constant +hwmon_temp.str_cons_0x002a_0x02=XDPE12284C_18 + +hwmon_temp.mode_0x002a_0x03=str_constant +hwmon_temp.str_cons_0x002a_0x03=125000 + +hwmon_temp.mode_0x002a_0x05=str_constant +hwmon_temp.str_cons_0x002a_0x05=-30000 + +hwmon_temp.mode_0x002a_0x09=str_constant +hwmon_temp.str_cons_0x002a_0x09=110000 + +hwmon_temp.mode_0x002a_0x0a=str_constant +hwmon_temp.str_cons_0x002a_0x0a=-20000 + +# temp43 +hwmon_temp.mode_0x002b_0x00=config +hwmon_temp.int_cons_0x002b_0x00=0 +hwmon_temp.src_0x002b_0x00=file +hwmon_temp.frmt_0x002b_0x00=buf +hwmon_temp.fpath_0x002b_0x00=/sys/bus/i2c/devices/121-0060/hwmon/ +hwmon_temp.addr_0x002b_0x00=0 +hwmon_temp.len_0x002b_0x00=8 +hwmon_temp.bit_offset_0x002b_0x00= +hwmon_temp.str_cons_0x002b_0x00=temp1_input + +hwmon_temp.mode_0x002b_0x01=str_constant +hwmon_temp.str_cons_0x002b_0x01=TMOS_MAC_OSFP_VDD3V3_A7 + +hwmon_temp.mode_0x002b_0x02=str_constant +hwmon_temp.str_cons_0x002b_0x02=XDPE12284C_19 + +hwmon_temp.mode_0x002b_0x03=str_constant +hwmon_temp.str_cons_0x002b_0x03=125000 + +hwmon_temp.mode_0x002b_0x05=str_constant +hwmon_temp.str_cons_0x002b_0x05=-30000 + +hwmon_temp.mode_0x002b_0x09=str_constant +hwmon_temp.str_cons_0x002b_0x09=110000 + +hwmon_temp.mode_0x002b_0x0a=str_constant +hwmon_temp.str_cons_0x002b_0x0a=-20000 + +# temp44 +hwmon_temp.mode_0x002c_0x00=config +hwmon_temp.int_cons_0x002c_0x00=0 +hwmon_temp.src_0x002c_0x00=file +hwmon_temp.frmt_0x002c_0x00=buf +hwmon_temp.fpath_0x002c_0x00=/sys/bus/i2c/devices/121-0060/hwmon/ +hwmon_temp.addr_0x002c_0x00=0 +hwmon_temp.len_0x002c_0x00=8 +hwmon_temp.bit_offset_0x002c_0x00= +hwmon_temp.str_cons_0x002c_0x00=temp2_input + +hwmon_temp.mode_0x002c_0x01=str_constant +hwmon_temp.str_cons_0x002c_0x01=TMOS_MAC_OSFP_VDD3V3_B7 + +hwmon_temp.mode_0x002c_0x02=str_constant +hwmon_temp.str_cons_0x002c_0x02=XDPE12284C_19 + +hwmon_temp.mode_0x002c_0x03=str_constant +hwmon_temp.str_cons_0x002c_0x03=125000 + +hwmon_temp.mode_0x002c_0x05=str_constant +hwmon_temp.str_cons_0x002c_0x05=-30000 + +hwmon_temp.mode_0x002c_0x09=str_constant +hwmon_temp.str_cons_0x002c_0x09=110000 + +hwmon_temp.mode_0x002c_0x0a=str_constant +hwmon_temp.str_cons_0x002c_0x0a=-20000 + +# temp45 +hwmon_temp.mode_0x002d_0x00=config +hwmon_temp.int_cons_0x002d_0x00=0 +hwmon_temp.src_0x002d_0x00=file +hwmon_temp.frmt_0x002d_0x00=buf +hwmon_temp.fpath_0x002d_0x00=/sys/bus/i2c/devices/122-0060/hwmon/ +hwmon_temp.addr_0x002d_0x00=0 +hwmon_temp.len_0x002d_0x00=8 +hwmon_temp.bit_offset_0x002d_0x00= +hwmon_temp.str_cons_0x002d_0x00=temp1_input + +hwmon_temp.mode_0x002d_0x01=str_constant +hwmon_temp.str_cons_0x002d_0x01=TMOS_MAC_OSFP_VDD3V3_A8 + +hwmon_temp.mode_0x002d_0x02=str_constant +hwmon_temp.str_cons_0x002d_0x02=XDPE12284C_20 + +hwmon_temp.mode_0x002d_0x03=str_constant +hwmon_temp.str_cons_0x002d_0x03=125000 + +hwmon_temp.mode_0x002d_0x05=str_constant +hwmon_temp.str_cons_0x002d_0x05=-30000 + +hwmon_temp.mode_0x002d_0x09=str_constant +hwmon_temp.str_cons_0x002d_0x09=110000 + +hwmon_temp.mode_0x002d_0x0a=str_constant +hwmon_temp.str_cons_0x002d_0x0a=-20000 + +# temp46 +hwmon_temp.mode_0x002e_0x00=config +hwmon_temp.int_cons_0x002e_0x00=0 +hwmon_temp.src_0x002e_0x00=file +hwmon_temp.frmt_0x002e_0x00=buf +hwmon_temp.fpath_0x002e_0x00=/sys/bus/i2c/devices/122-0060/hwmon/ +hwmon_temp.addr_0x002e_0x00=0 +hwmon_temp.len_0x002e_0x00=8 +hwmon_temp.bit_offset_0x002e_0x00= +hwmon_temp.str_cons_0x002e_0x00=temp2_input + +hwmon_temp.mode_0x002e_0x01=str_constant +hwmon_temp.str_cons_0x002e_0x01=TMOS_MAC_OSFP_VDD3V3_B8 + +hwmon_temp.mode_0x002e_0x02=str_constant +hwmon_temp.str_cons_0x002e_0x02=XDPE12284C_20 + +hwmon_temp.mode_0x002e_0x03=str_constant +hwmon_temp.str_cons_0x002e_0x03=125000 + +hwmon_temp.mode_0x002e_0x05=str_constant +hwmon_temp.str_cons_0x002e_0x05=-30000 + +hwmon_temp.mode_0x002e_0x09=str_constant +hwmon_temp.str_cons_0x002e_0x09=110000 + +hwmon_temp.mode_0x002e_0x0a=str_constant +hwmon_temp.str_cons_0x002e_0x0a=-20000 + +# temp47 +hwmon_temp.mode_0x002f_0x00=config +hwmon_temp.int_cons_0x002f_0x00=0 +hwmon_temp.src_0x002f_0x00=file +hwmon_temp.frmt_0x002f_0x00=buf +hwmon_temp.fpath_0x002f_0x00=/sys/bus/i2c/devices/94-0060/hwmon/ +hwmon_temp.addr_0x002f_0x00=0 +hwmon_temp.len_0x002f_0x00=8 +hwmon_temp.bit_offset_0x002f_0x00= +hwmon_temp.str_cons_0x002f_0x00=temp1_input + +hwmon_temp.mode_0x002f_0x01=str_constant +hwmon_temp.str_cons_0x002f_0x01=TMOS_UPORT_OSFP_VDD3V3_A1 + +hwmon_temp.mode_0x002f_0x02=str_constant +hwmon_temp.str_cons_0x002f_0x02=XDPE12284C_21 + +hwmon_temp.mode_0x002f_0x03=str_constant +hwmon_temp.str_cons_0x002f_0x03=125000 + +hwmon_temp.mode_0x002f_0x05=str_constant +hwmon_temp.str_cons_0x002f_0x05=-30000 + +hwmon_temp.mode_0x002f_0x09=str_constant +hwmon_temp.str_cons_0x002f_0x09=110000 + +hwmon_temp.mode_0x002f_0x0a=str_constant +hwmon_temp.str_cons_0x002f_0x0a=-20000 + +# temp48 +hwmon_temp.mode_0x0030_0x00=config +hwmon_temp.int_cons_0x0030_0x00=0 +hwmon_temp.src_0x0030_0x00=file +hwmon_temp.frmt_0x0030_0x00=buf +hwmon_temp.fpath_0x0030_0x00=/sys/bus/i2c/devices/94-0060/hwmon/ +hwmon_temp.addr_0x0030_0x00=0 +hwmon_temp.len_0x0030_0x00=8 +hwmon_temp.bit_offset_0x0030_0x00= +hwmon_temp.str_cons_0x0030_0x00=temp2_input + +hwmon_temp.mode_0x0030_0x01=str_constant +hwmon_temp.str_cons_0x0030_0x01=TMOS_UPORT_OSFP_VDD3V3_B1 + +hwmon_temp.mode_0x0030_0x02=str_constant +hwmon_temp.str_cons_0x0030_0x02=XDPE12284C_21 + +hwmon_temp.mode_0x0030_0x03=str_constant +hwmon_temp.str_cons_0x0030_0x03=125000 + +hwmon_temp.mode_0x0030_0x05=str_constant +hwmon_temp.str_cons_0x0030_0x05=-30000 + +hwmon_temp.mode_0x0030_0x09=str_constant +hwmon_temp.str_cons_0x0030_0x09=110000 + +hwmon_temp.mode_0x0030_0x0a=str_constant +hwmon_temp.str_cons_0x0030_0x0a=-20000 + +# temp49 +hwmon_temp.mode_0x0031_0x00=config +hwmon_temp.int_cons_0x0031_0x00=0 +hwmon_temp.src_0x0031_0x00=file +hwmon_temp.frmt_0x0031_0x00=buf +hwmon_temp.fpath_0x0031_0x00=/sys/bus/i2c/devices/95-0060/hwmon/ +hwmon_temp.addr_0x0031_0x00=0 +hwmon_temp.len_0x0031_0x00=8 +hwmon_temp.bit_offset_0x0031_0x00= +hwmon_temp.str_cons_0x0031_0x00=temp1_input + +hwmon_temp.mode_0x0031_0x01=str_constant +hwmon_temp.str_cons_0x0031_0x01=TMOS_UPORT_OSFP_VDD3V3_A2 + +hwmon_temp.mode_0x0031_0x02=str_constant +hwmon_temp.str_cons_0x0031_0x02=XDPE12284C_22 + +hwmon_temp.mode_0x0031_0x03=str_constant +hwmon_temp.str_cons_0x0031_0x03=125000 + +hwmon_temp.mode_0x0031_0x05=str_constant +hwmon_temp.str_cons_0x0031_0x05=-30000 + +hwmon_temp.mode_0x0031_0x09=str_constant +hwmon_temp.str_cons_0x0031_0x09=110000 + +hwmon_temp.mode_0x0031_0x0a=str_constant +hwmon_temp.str_cons_0x0031_0x0a=-20000 + +# temp50 +hwmon_temp.mode_0x0032_0x00=config +hwmon_temp.int_cons_0x0032_0x00=0 +hwmon_temp.src_0x0032_0x00=file +hwmon_temp.frmt_0x0032_0x00=buf +hwmon_temp.fpath_0x0032_0x00=/sys/bus/i2c/devices/95-0060/hwmon/ +hwmon_temp.addr_0x0032_0x00=0 +hwmon_temp.len_0x0032_0x00=8 +hwmon_temp.bit_offset_0x0032_0x00= +hwmon_temp.str_cons_0x0032_0x00=temp2_input + +hwmon_temp.mode_0x0032_0x01=str_constant +hwmon_temp.str_cons_0x0032_0x01=TMOS_UPORT_OSFP_VDD3V3_B2 + +hwmon_temp.mode_0x0032_0x02=str_constant +hwmon_temp.str_cons_0x0032_0x02=XDPE12284C_22 + +hwmon_temp.mode_0x0032_0x03=str_constant +hwmon_temp.str_cons_0x0032_0x03=125000 + +hwmon_temp.mode_0x0032_0x05=str_constant +hwmon_temp.str_cons_0x0032_0x05=-30000 + +hwmon_temp.mode_0x0032_0x09=str_constant +hwmon_temp.str_cons_0x0032_0x09=110000 + +hwmon_temp.mode_0x0032_0x0a=str_constant +hwmon_temp.str_cons_0x0032_0x0a=-20000 + +# temp51 +hwmon_temp.mode_0x0033_0x00=config +hwmon_temp.int_cons_0x0033_0x00=0 +hwmon_temp.src_0x0033_0x00=file +hwmon_temp.frmt_0x0033_0x00=buf +hwmon_temp.fpath_0x0033_0x00=/sys/bus/i2c/devices/96-0060/hwmon/ +hwmon_temp.addr_0x0033_0x00=0 +hwmon_temp.len_0x0033_0x00=8 +hwmon_temp.bit_offset_0x0033_0x00= +hwmon_temp.str_cons_0x0033_0x00=temp1_input + +hwmon_temp.mode_0x0033_0x01=str_constant +hwmon_temp.str_cons_0x0033_0x01=TMOS_UPORT_OSFP_VDD3V3_A3 + +hwmon_temp.mode_0x0033_0x02=str_constant +hwmon_temp.str_cons_0x0033_0x02=XDPE12284C_23 + +hwmon_temp.mode_0x0033_0x03=str_constant +hwmon_temp.str_cons_0x0033_0x03=125000 + +hwmon_temp.mode_0x0033_0x05=str_constant +hwmon_temp.str_cons_0x0033_0x05=-30000 + +hwmon_temp.mode_0x0033_0x09=str_constant +hwmon_temp.str_cons_0x0033_0x09=110000 + +hwmon_temp.mode_0x0033_0x0a=str_constant +hwmon_temp.str_cons_0x0033_0x0a=-20000 + +# temp52 +hwmon_temp.mode_0x0034_0x00=config +hwmon_temp.int_cons_0x0034_0x00=0 +hwmon_temp.src_0x0034_0x00=file +hwmon_temp.frmt_0x0034_0x00=buf +hwmon_temp.fpath_0x0034_0x00=/sys/bus/i2c/devices/96-0060/hwmon/ +hwmon_temp.addr_0x0034_0x00=0 +hwmon_temp.len_0x0034_0x00=8 +hwmon_temp.bit_offset_0x0034_0x00= +hwmon_temp.str_cons_0x0034_0x00=temp2_input + +hwmon_temp.mode_0x0034_0x01=str_constant +hwmon_temp.str_cons_0x0034_0x01=TMOS_UPORT_OSFP_VDD3V3_B3 + +hwmon_temp.mode_0x0034_0x02=str_constant +hwmon_temp.str_cons_0x0034_0x02=XDPE12284C_23 + +hwmon_temp.mode_0x0034_0x03=str_constant +hwmon_temp.str_cons_0x0034_0x03=125000 + +hwmon_temp.mode_0x0034_0x05=str_constant +hwmon_temp.str_cons_0x0034_0x05=-30000 + +hwmon_temp.mode_0x0034_0x09=str_constant +hwmon_temp.str_cons_0x0034_0x09=110000 + +hwmon_temp.mode_0x0034_0x0a=str_constant +hwmon_temp.str_cons_0x0034_0x0a=-20000 + +# temp53 +hwmon_temp.mode_0x0035_0x00=config +hwmon_temp.int_cons_0x0035_0x00=0 +hwmon_temp.src_0x0035_0x00=file +hwmon_temp.frmt_0x0035_0x00=buf +hwmon_temp.fpath_0x0035_0x00=/sys/bus/i2c/devices/97-0060/hwmon/ +hwmon_temp.addr_0x0035_0x00=0 +hwmon_temp.len_0x0035_0x00=8 +hwmon_temp.bit_offset_0x0035_0x00= +hwmon_temp.str_cons_0x0035_0x00=temp1_input + +hwmon_temp.mode_0x0035_0x01=str_constant +hwmon_temp.str_cons_0x0035_0x01=TMOS_UPORT_OSFP_VDD3V3_A4 + +hwmon_temp.mode_0x0035_0x02=str_constant +hwmon_temp.str_cons_0x0035_0x02=XDPE12284C_24 + +hwmon_temp.mode_0x0035_0x03=str_constant +hwmon_temp.str_cons_0x0035_0x03=125000 + +hwmon_temp.mode_0x0035_0x05=str_constant +hwmon_temp.str_cons_0x0035_0x05=-30000 + +hwmon_temp.mode_0x0035_0x09=str_constant +hwmon_temp.str_cons_0x0035_0x09=110000 + +hwmon_temp.mode_0x0035_0x0a=str_constant +hwmon_temp.str_cons_0x0035_0x0a=-20000 + +# temp54 +hwmon_temp.mode_0x0036_0x00=config +hwmon_temp.int_cons_0x0036_0x00=0 +hwmon_temp.src_0x0036_0x00=file +hwmon_temp.frmt_0x0036_0x00=buf +hwmon_temp.fpath_0x0036_0x00=/sys/bus/i2c/devices/97-0060/hwmon/ +hwmon_temp.addr_0x0036_0x00=0 +hwmon_temp.len_0x0036_0x00=8 +hwmon_temp.bit_offset_0x0036_0x00= +hwmon_temp.str_cons_0x0036_0x00=temp2_input + +hwmon_temp.mode_0x0036_0x01=str_constant +hwmon_temp.str_cons_0x0036_0x01=TMOS_UPORT_OSFP_VDD3V3_B4 + +hwmon_temp.mode_0x0036_0x02=str_constant +hwmon_temp.str_cons_0x0036_0x02=XDPE12284C_24 + +hwmon_temp.mode_0x0036_0x03=str_constant +hwmon_temp.str_cons_0x0036_0x03=125000 + +hwmon_temp.mode_0x0036_0x05=str_constant +hwmon_temp.str_cons_0x0036_0x05=-30000 + +hwmon_temp.mode_0x0036_0x09=str_constant +hwmon_temp.str_cons_0x0036_0x09=110000 + +hwmon_temp.mode_0x0036_0x0a=str_constant +hwmon_temp.str_cons_0x0036_0x0a=-20000 + +# temp55 +hwmon_temp.mode_0x0037_0x00=config +hwmon_temp.int_cons_0x0037_0x00=0 +hwmon_temp.src_0x0037_0x00=file +hwmon_temp.frmt_0x0037_0x00=buf +hwmon_temp.fpath_0x0037_0x00=/sys/bus/i2c/devices/102-0060/hwmon/ +hwmon_temp.addr_0x0037_0x00=0 +hwmon_temp.len_0x0037_0x00=8 +hwmon_temp.bit_offset_0x0037_0x00= +hwmon_temp.str_cons_0x0037_0x00=temp1_input + +hwmon_temp.mode_0x0037_0x01=str_constant +hwmon_temp.str_cons_0x0037_0x01=TMOS_DPORT_OSFP_VDD3V3_A1 + +hwmon_temp.mode_0x0037_0x02=str_constant +hwmon_temp.str_cons_0x0037_0x02=XDPE12284C_25 + +hwmon_temp.mode_0x0037_0x03=str_constant +hwmon_temp.str_cons_0x0037_0x03=125000 + +hwmon_temp.mode_0x0037_0x05=str_constant +hwmon_temp.str_cons_0x0037_0x05=-30000 + +hwmon_temp.mode_0x0037_0x09=str_constant +hwmon_temp.str_cons_0x0037_0x09=110000 + +hwmon_temp.mode_0x0037_0x0a=str_constant +hwmon_temp.str_cons_0x0037_0x0a=-20000 + +# temp56 +hwmon_temp.mode_0x0038_0x00=config +hwmon_temp.int_cons_0x0038_0x00=0 +hwmon_temp.src_0x0038_0x00=file +hwmon_temp.frmt_0x0038_0x00=buf +hwmon_temp.fpath_0x0038_0x00=/sys/bus/i2c/devices/102-0060/hwmon/ +hwmon_temp.addr_0x0038_0x00=0 +hwmon_temp.len_0x0038_0x00=8 +hwmon_temp.bit_offset_0x0038_0x00= +hwmon_temp.str_cons_0x0038_0x00=temp2_input + +hwmon_temp.mode_0x0038_0x01=str_constant +hwmon_temp.str_cons_0x0038_0x01=TMOS_DPORT_OSFP_VDD3V3_B1 + +hwmon_temp.mode_0x0038_0x02=str_constant +hwmon_temp.str_cons_0x0038_0x02=XDPE12284C_25 + +hwmon_temp.mode_0x0038_0x03=str_constant +hwmon_temp.str_cons_0x0038_0x03=125000 + +hwmon_temp.mode_0x0038_0x05=str_constant +hwmon_temp.str_cons_0x0038_0x05=-30000 + +hwmon_temp.mode_0x0038_0x09=str_constant +hwmon_temp.str_cons_0x0038_0x09=110000 + +hwmon_temp.mode_0x0038_0x0a=str_constant +hwmon_temp.str_cons_0x0038_0x0a=-20000 + +# temp57 +hwmon_temp.mode_0x0039_0x00=config +hwmon_temp.int_cons_0x0039_0x00=0 +hwmon_temp.src_0x0039_0x00=file +hwmon_temp.frmt_0x0039_0x00=buf +hwmon_temp.fpath_0x0039_0x00=/sys/bus/i2c/devices/103-0060/hwmon/ +hwmon_temp.addr_0x0039_0x00=0 +hwmon_temp.len_0x0039_0x00=8 +hwmon_temp.bit_offset_0x0039_0x00= +hwmon_temp.str_cons_0x0039_0x00=temp1_input + +hwmon_temp.mode_0x0039_0x01=str_constant +hwmon_temp.str_cons_0x0039_0x01=TMOS_DPORT_OSFP_VDD3V3_A2 + +hwmon_temp.mode_0x0039_0x02=str_constant +hwmon_temp.str_cons_0x0039_0x02=XDPE12284C_26 + +hwmon_temp.mode_0x0039_0x03=str_constant +hwmon_temp.str_cons_0x0039_0x03=125000 + +hwmon_temp.mode_0x0039_0x05=str_constant +hwmon_temp.str_cons_0x0039_0x05=-30000 + +hwmon_temp.mode_0x0039_0x09=str_constant +hwmon_temp.str_cons_0x0039_0x09=110000 + +hwmon_temp.mode_0x0039_0x0a=str_constant +hwmon_temp.str_cons_0x0039_0x0a=-20000 + +# temp58 +hwmon_temp.mode_0x003a_0x00=config +hwmon_temp.int_cons_0x003a_0x00=0 +hwmon_temp.src_0x003a_0x00=file +hwmon_temp.frmt_0x003a_0x00=buf +hwmon_temp.fpath_0x003a_0x00=/sys/bus/i2c/devices/103-0060/hwmon/ +hwmon_temp.addr_0x003a_0x00=0 +hwmon_temp.len_0x003a_0x00=8 +hwmon_temp.bit_offset_0x003a_0x00= +hwmon_temp.str_cons_0x003a_0x00=temp2_input + +hwmon_temp.mode_0x003a_0x01=str_constant +hwmon_temp.str_cons_0x003a_0x01=TMOS_DPORT_OSFP_VDD3V3_B2 + +hwmon_temp.mode_0x003a_0x02=str_constant +hwmon_temp.str_cons_0x003a_0x02=XDPE12284C_26 + +hwmon_temp.mode_0x003a_0x03=str_constant +hwmon_temp.str_cons_0x003a_0x03=125000 + +hwmon_temp.mode_0x003a_0x05=str_constant +hwmon_temp.str_cons_0x003a_0x05=-30000 + +hwmon_temp.mode_0x003a_0x09=str_constant +hwmon_temp.str_cons_0x003a_0x09=110000 + +hwmon_temp.mode_0x003a_0x0a=str_constant +hwmon_temp.str_cons_0x003a_0x0a=-20000 + +# temp59 +hwmon_temp.mode_0x003b_0x00=config +hwmon_temp.int_cons_0x003b_0x00=0 +hwmon_temp.src_0x003b_0x00=file +hwmon_temp.frmt_0x003b_0x00=buf +hwmon_temp.fpath_0x003b_0x00=/sys/bus/i2c/devices/104-0060/hwmon/ +hwmon_temp.addr_0x003b_0x00=0 +hwmon_temp.len_0x003b_0x00=8 +hwmon_temp.bit_offset_0x003b_0x00= +hwmon_temp.str_cons_0x003b_0x00=temp1_input + +hwmon_temp.mode_0x003b_0x01=str_constant +hwmon_temp.str_cons_0x003b_0x01=TMOS_DPORT_OSFP_VDD3V3_A3 + +hwmon_temp.mode_0x003b_0x02=str_constant +hwmon_temp.str_cons_0x003b_0x02=XDPE12284C_27 + +hwmon_temp.mode_0x003b_0x03=str_constant +hwmon_temp.str_cons_0x003b_0x03=125000 + +hwmon_temp.mode_0x003b_0x05=str_constant +hwmon_temp.str_cons_0x003b_0x05=-30000 + +hwmon_temp.mode_0x003b_0x09=str_constant +hwmon_temp.str_cons_0x003b_0x09=110000 + +hwmon_temp.mode_0x003b_0x0a=str_constant +hwmon_temp.str_cons_0x003b_0x0a=-20000 + +# temp60 +hwmon_temp.mode_0x003c_0x00=config +hwmon_temp.int_cons_0x003c_0x00=0 +hwmon_temp.src_0x003c_0x00=file +hwmon_temp.frmt_0x003c_0x00=buf +hwmon_temp.fpath_0x003c_0x00=/sys/bus/i2c/devices/104-0060/hwmon/ +hwmon_temp.addr_0x003c_0x00=0 +hwmon_temp.len_0x003c_0x00=8 +hwmon_temp.bit_offset_0x003c_0x00= +hwmon_temp.str_cons_0x003c_0x00=temp2_input + +hwmon_temp.mode_0x003c_0x01=str_constant +hwmon_temp.str_cons_0x003c_0x01=TMOS_DPORT_OSFP_VDD3V3_B3 + +hwmon_temp.mode_0x003c_0x02=str_constant +hwmon_temp.str_cons_0x003c_0x02=XDPE12284C_27 + +hwmon_temp.mode_0x003c_0x03=str_constant +hwmon_temp.str_cons_0x003c_0x03=125000 + +hwmon_temp.mode_0x003c_0x05=str_constant +hwmon_temp.str_cons_0x003c_0x05=-30000 + +hwmon_temp.mode_0x003c_0x09=str_constant +hwmon_temp.str_cons_0x003c_0x09=110000 + +hwmon_temp.mode_0x003c_0x0a=str_constant +hwmon_temp.str_cons_0x003c_0x0a=-20000 + +# temp61 +hwmon_temp.mode_0x003d_0x00=config +hwmon_temp.int_cons_0x003d_0x00=0 +hwmon_temp.src_0x003d_0x00=file +hwmon_temp.frmt_0x003d_0x00=buf +hwmon_temp.fpath_0x003d_0x00=/sys/bus/i2c/devices/105-0060/hwmon/ +hwmon_temp.addr_0x003d_0x00=0 +hwmon_temp.len_0x003d_0x00=8 +hwmon_temp.bit_offset_0x003d_0x00= +hwmon_temp.str_cons_0x003d_0x00=temp1_input + +hwmon_temp.mode_0x003d_0x01=str_constant +hwmon_temp.str_cons_0x003d_0x01=TMOS_DPORT_OSFP_VDD3V3_A4 + +hwmon_temp.mode_0x003d_0x02=str_constant +hwmon_temp.str_cons_0x003d_0x02=XDPE12284C_28 + +hwmon_temp.mode_0x003d_0x03=str_constant +hwmon_temp.str_cons_0x003d_0x03=125000 + +hwmon_temp.mode_0x003d_0x05=str_constant +hwmon_temp.str_cons_0x003d_0x05=-30000 + +hwmon_temp.mode_0x003d_0x09=str_constant +hwmon_temp.str_cons_0x003d_0x09=110000 + +hwmon_temp.mode_0x003d_0x0a=str_constant +hwmon_temp.str_cons_0x003d_0x0a=-20000 + +# temp62 +hwmon_temp.mode_0x003e_0x00=config +hwmon_temp.int_cons_0x003e_0x00=0 +hwmon_temp.src_0x003e_0x00=file +hwmon_temp.frmt_0x003e_0x00=buf +hwmon_temp.fpath_0x003e_0x00=/sys/bus/i2c/devices/105-0060/hwmon/ +hwmon_temp.addr_0x003e_0x00=0 +hwmon_temp.len_0x003e_0x00=8 +hwmon_temp.bit_offset_0x003e_0x00= +hwmon_temp.str_cons_0x003e_0x00=temp2_input + +hwmon_temp.mode_0x003e_0x01=str_constant +hwmon_temp.str_cons_0x003e_0x01=TMOS_DPORT_OSFP_VDD3V3_B4 + +hwmon_temp.mode_0x003e_0x02=str_constant +hwmon_temp.str_cons_0x003e_0x02=XDPE12284C_28 + +hwmon_temp.mode_0x003e_0x03=str_constant +hwmon_temp.str_cons_0x003e_0x03=125000 + +hwmon_temp.mode_0x003e_0x05=str_constant +hwmon_temp.str_cons_0x003e_0x05=-30000 + +hwmon_temp.mode_0x003e_0x09=str_constant +hwmon_temp.str_cons_0x003e_0x09=110000 + +hwmon_temp.mode_0x003e_0x0a=str_constant +hwmon_temp.str_cons_0x003e_0x0a=-20000 + +# temp63 +hwmon_temp.mode_0x003f_0x00=config +hwmon_temp.int_cons_0x003f_0x00=0 +hwmon_temp.src_0x003f_0x00=file +hwmon_temp.frmt_0x003f_0x00=buf +hwmon_temp.fpath_0x003f_0x00=/sys/bus/i2c/devices/67-0058/hwmon/ +hwmon_temp.addr_0x003f_0x00=0 +hwmon_temp.len_0x003f_0x00=8 +hwmon_temp.bit_offset_0x003f_0x00= +hwmon_temp.str_cons_0x003f_0x00=temp1_input + +hwmon_temp.mode_0x003f_0x01=str_constant +hwmon_temp.str_cons_0x003f_0x01=PSU1_TEMP + +hwmon_temp.mode_0x003f_0x02=str_constant +hwmon_temp.str_cons_0x003f_0x02=PSU + +hwmon_temp.mode_0x003f_0x03=str_constant +hwmon_temp.str_cons_0x003f_0x03=65000 + +hwmon_temp.mode_0x003f_0x05=str_constant +hwmon_temp.str_cons_0x003f_0x05=-20000 + +hwmon_temp.mode_0x003f_0x09=str_constant +hwmon_temp.str_cons_0x003f_0x09=55000 + +hwmon_temp.mode_0x003f_0x0a=str_constant +hwmon_temp.str_cons_0x003f_0x0a=-5000 + +# temp64 +hwmon_temp.mode_0x0040_0x00=config +hwmon_temp.int_cons_0x0040_0x00=0 +hwmon_temp.src_0x0040_0x00=file +hwmon_temp.frmt_0x0040_0x00=buf +hwmon_temp.fpath_0x0040_0x00=/sys/bus/i2c/devices/68-0058/hwmon/ +hwmon_temp.addr_0x0040_0x00=0 +hwmon_temp.len_0x0040_0x00=8 +hwmon_temp.bit_offset_0x0040_0x00= +hwmon_temp.str_cons_0x0040_0x00=temp1_input + +hwmon_temp.mode_0x0040_0x01=str_constant +hwmon_temp.str_cons_0x0040_0x01=PSU2_TEMP + +hwmon_temp.mode_0x0040_0x02=str_constant +hwmon_temp.str_cons_0x0040_0x02=PSU + +hwmon_temp.mode_0x0040_0x03=str_constant +hwmon_temp.str_cons_0x0040_0x03=65000 + +hwmon_temp.mode_0x0040_0x05=str_constant +hwmon_temp.str_cons_0x0040_0x05=-20000 + +hwmon_temp.mode_0x0040_0x09=str_constant +hwmon_temp.str_cons_0x0040_0x09=55000 + +hwmon_temp.mode_0x0040_0x0a=str_constant +hwmon_temp.str_cons_0x0040_0x0a=-5000 + +# temp65 +hwmon_temp.mode_0x0041_0x00=config +hwmon_temp.int_cons_0x0041_0x00=0 +hwmon_temp.src_0x0041_0x00=file +hwmon_temp.frmt_0x0041_0x00=buf +hwmon_temp.fpath_0x0041_0x00=/sys/bus/i2c/devices/69-0058/hwmon/ +hwmon_temp.addr_0x0041_0x00=0 +hwmon_temp.len_0x0041_0x00=8 +hwmon_temp.bit_offset_0x0041_0x00= +hwmon_temp.str_cons_0x0041_0x00=temp1_input + +hwmon_temp.mode_0x0041_0x01=str_constant +hwmon_temp.str_cons_0x0041_0x01=PSU3_TEMP + +hwmon_temp.mode_0x0041_0x02=str_constant +hwmon_temp.str_cons_0x0041_0x02=PSU + +hwmon_temp.mode_0x0041_0x03=str_constant +hwmon_temp.str_cons_0x0041_0x03=65000 + +hwmon_temp.mode_0x0041_0x05=str_constant +hwmon_temp.str_cons_0x0041_0x05=-20000 + +hwmon_temp.mode_0x0041_0x09=str_constant +hwmon_temp.str_cons_0x0041_0x09=55000 + +hwmon_temp.mode_0x0041_0x0a=str_constant +hwmon_temp.str_cons_0x0041_0x0a=-5000 + +# temp66 +hwmon_temp.mode_0x0042_0x00=config +hwmon_temp.int_cons_0x0042_0x00=0 +hwmon_temp.src_0x0042_0x00=file +hwmon_temp.frmt_0x0042_0x00=buf +hwmon_temp.fpath_0x0042_0x00=/sys/bus/i2c/devices/70-0058/hwmon/ +hwmon_temp.addr_0x0042_0x00=0 +hwmon_temp.len_0x0042_0x00=8 +hwmon_temp.bit_offset_0x0042_0x00= +hwmon_temp.str_cons_0x0042_0x00=temp1_input + +hwmon_temp.mode_0x0042_0x01=str_constant +hwmon_temp.str_cons_0x0042_0x01=PSU4_TEMP + +hwmon_temp.mode_0x0042_0x02=str_constant +hwmon_temp.str_cons_0x0042_0x02=PSU + +hwmon_temp.mode_0x0042_0x03=str_constant +hwmon_temp.str_cons_0x0042_0x03=65000 + +hwmon_temp.mode_0x0042_0x05=str_constant +hwmon_temp.str_cons_0x0042_0x05=-20000 + +hwmon_temp.mode_0x0042_0x09=str_constant +hwmon_temp.str_cons_0x0042_0x09=55000 + +hwmon_temp.mode_0x0042_0x0a=str_constant +hwmon_temp.str_cons_0x0042_0x0a=-5000 + + +# sensor vol +# value : 0 +# alias : 1 +# type : 2 +# max : 3 +# hyst : 4 +# min : 5 +# crit : 6 +# range : 7 +# nominal_value : 8 +# high : 9 +# low : 10 +# vol sensor 1 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +# vol sensor 1 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0001_0x00=config +hwmon_in.src_0x0001_0x00=file +hwmon_in.int_cons_0x0001_0x00=0 +hwmon_in.frmt_0x0001_0x00=buf +hwmon_in.fpath_0x0001_0x00=/sys/bus/i2c/devices/54-005f/hwmon/ +hwmon_in.addr_0x0001_0x00=0 +hwmon_in.len_0x0001_0x00=8 +hwmon_in.str_cons_0x0001_0x00=in1_input +hwmon_in.int_extra1_0x0001_0x00=0 +hwmon_in.int_extra2_0x0001_0x00=0 + +hwmon_in.mode_0x0001_0x01=str_constant +hwmon_in.str_cons_0x0001_0x01=UCD90160_01_P12V0_V + +hwmon_in.mode_0x0001_0x02=str_constant +hwmon_in.str_cons_0x0001_0x02=UCD90160_01 + +hwmon_in.mode_0x0001_0x03=constant +hwmon_in.int_cons_0x0001_0x03=13200 + +hwmon_in.mode_0x0001_0x05=constant +hwmon_in.int_cons_0x0001_0x05=10800 + +monitor_flag_hwmon_in.mode_0x0001_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0001_0x00=1 + + +# vol sensor 2 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0002_0x00=config +hwmon_in.src_0x0002_0x00=file +hwmon_in.int_cons_0x0002_0x00=0 +hwmon_in.frmt_0x0002_0x00=buf +hwmon_in.fpath_0x0002_0x00=/sys/bus/i2c/devices/54-005f/hwmon/ +hwmon_in.addr_0x0002_0x00=0 +hwmon_in.len_0x0002_0x00=8 +hwmon_in.str_cons_0x0002_0x00=in2_input +hwmon_in.int_extra1_0x0002_0x00=0 +hwmon_in.int_extra2_0x0002_0x00=0 + +hwmon_in.mode_0x0002_0x01=str_constant +hwmon_in.str_cons_0x0002_0x01=UCD90160_01_P5V0_STBY_V + +hwmon_in.mode_0x0002_0x02=str_constant +hwmon_in.str_cons_0x0002_0x02=UCD90160_01 + +hwmon_in.mode_0x0002_0x03=constant +hwmon_in.int_cons_0x0002_0x03=5500 + +hwmon_in.mode_0x0002_0x05=constant +hwmon_in.int_cons_0x0002_0x05=4500 + +monitor_flag_hwmon_in.mode_0x0002_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0002_0x00=1 + + +# vol sensor 3 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0003_0x00=config +hwmon_in.src_0x0003_0x00=file +hwmon_in.int_cons_0x0003_0x00=0 +hwmon_in.frmt_0x0003_0x00=buf +hwmon_in.fpath_0x0003_0x00=/sys/bus/i2c/devices/54-005f/hwmon/ +hwmon_in.addr_0x0003_0x00=0 +hwmon_in.len_0x0003_0x00=8 +hwmon_in.str_cons_0x0003_0x00=in3_input +hwmon_in.int_extra1_0x0003_0x00=0 +hwmon_in.int_extra2_0x0003_0x00=0 + +hwmon_in.mode_0x0003_0x01=str_constant +hwmon_in.str_cons_0x0003_0x01=UCD90160_01_P3V3_FR_S5 + +hwmon_in.mode_0x0003_0x02=str_constant +hwmon_in.str_cons_0x0003_0x02=UCD90160_01 + +hwmon_in.mode_0x0003_0x03=constant +hwmon_in.int_cons_0x0003_0x03=3485 + +hwmon_in.mode_0x0003_0x05=constant +hwmon_in.int_cons_0x0003_0x05=3115 + +monitor_flag_hwmon_in.mode_0x0003_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0003_0x00=1 + + +# vol sensor 4 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0004_0x00=config +hwmon_in.src_0x0004_0x00=file +hwmon_in.int_cons_0x0004_0x00=0 +hwmon_in.frmt_0x0004_0x00=buf +hwmon_in.fpath_0x0004_0x00=/sys/bus/i2c/devices/54-005f/hwmon/ +hwmon_in.addr_0x0004_0x00=0 +hwmon_in.len_0x0004_0x00=8 +hwmon_in.str_cons_0x0004_0x00=in4_input +hwmon_in.int_extra1_0x0004_0x00=0 +hwmon_in.int_extra2_0x0004_0x00=0 + +hwmon_in.mode_0x0004_0x01=str_constant +hwmon_in.str_cons_0x0004_0x01=UCD90160_01_P1V8_FR_S5 + +hwmon_in.mode_0x0004_0x02=str_constant +hwmon_in.str_cons_0x0004_0x02=UCD90160_01 + +hwmon_in.mode_0x0004_0x03=constant +hwmon_in.int_cons_0x0004_0x03=1910 + +hwmon_in.mode_0x0004_0x05=constant +hwmon_in.int_cons_0x0004_0x05=1690 + +monitor_flag_hwmon_in.mode_0x0004_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0004_0x00=1 + + +# vol sensor 5 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0005_0x00=config +hwmon_in.src_0x0005_0x00=file +hwmon_in.int_cons_0x0005_0x00=0 +hwmon_in.frmt_0x0005_0x00=buf +hwmon_in.fpath_0x0005_0x00=/sys/bus/i2c/devices/54-005f/hwmon/ +hwmon_in.addr_0x0005_0x00=0 +hwmon_in.len_0x0005_0x00=8 +hwmon_in.str_cons_0x0005_0x00=in5_input +hwmon_in.int_extra1_0x0005_0x00=0 +hwmon_in.int_extra2_0x0005_0x00=0 + +hwmon_in.mode_0x0005_0x01=str_constant +hwmon_in.str_cons_0x0005_0x01=UCD90160_01_P0V75_FR_MISC_S5 + +hwmon_in.mode_0x0005_0x02=str_constant +hwmon_in.str_cons_0x0005_0x02=UCD90160_01 + +hwmon_in.mode_0x0005_0x03=constant +hwmon_in.int_cons_0x0005_0x03=807 + +hwmon_in.mode_0x0005_0x05=constant +hwmon_in.int_cons_0x0005_0x05=692 + +monitor_flag_hwmon_in.mode_0x0005_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0005_0x00=1 + + +# vol sensor 6 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0006_0x00=config +hwmon_in.src_0x0006_0x00=file +hwmon_in.int_cons_0x0006_0x00=0 +hwmon_in.frmt_0x0006_0x00=buf +hwmon_in.fpath_0x0006_0x00=/sys/bus/i2c/devices/54-005f/hwmon/ +hwmon_in.addr_0x0006_0x00=0 +hwmon_in.len_0x0006_0x00=8 +hwmon_in.str_cons_0x0006_0x00=in6_input +hwmon_in.int_extra1_0x0006_0x00=0 +hwmon_in.int_extra2_0x0006_0x00=0 + +hwmon_in.mode_0x0006_0x01=str_constant +hwmon_in.str_cons_0x0006_0x01=UCD90160_01_P3V3_FR_S0 + +hwmon_in.mode_0x0006_0x02=str_constant +hwmon_in.str_cons_0x0006_0x02=UCD90160_01 + +hwmon_in.mode_0x0006_0x03=constant +hwmon_in.int_cons_0x0006_0x03=3485 + +hwmon_in.mode_0x0006_0x05=constant +hwmon_in.int_cons_0x0006_0x05=3115 + +monitor_flag_hwmon_in.mode_0x0006_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0006_0x00=1 + + +# vol sensor 7 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0007_0x00=config +hwmon_in.src_0x0007_0x00=file +hwmon_in.int_cons_0x0007_0x00=0 +hwmon_in.frmt_0x0007_0x00=buf +hwmon_in.fpath_0x0007_0x00=/sys/bus/i2c/devices/54-005f/hwmon/ +hwmon_in.addr_0x0007_0x00=0 +hwmon_in.len_0x0007_0x00=8 +hwmon_in.str_cons_0x0007_0x00=in7_input +hwmon_in.int_extra1_0x0007_0x00=0 +hwmon_in.int_extra2_0x0007_0x00=0 + +hwmon_in.mode_0x0007_0x01=str_constant +hwmon_in.str_cons_0x0007_0x01=UCD90160_01_P1V8_FR_S0 + +hwmon_in.mode_0x0007_0x02=str_constant +hwmon_in.str_cons_0x0007_0x02=UCD90160_01 + +hwmon_in.mode_0x0007_0x03=constant +hwmon_in.int_cons_0x0007_0x03=1910 + +hwmon_in.mode_0x0007_0x05=constant +hwmon_in.int_cons_0x0007_0x05=1690 + +monitor_flag_hwmon_in.mode_0x0007_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0007_0x00=1 + + +# vol sensor 8 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0008_0x00=config +hwmon_in.src_0x0008_0x00=file +hwmon_in.int_cons_0x0008_0x00=0 +hwmon_in.frmt_0x0008_0x00=buf +hwmon_in.fpath_0x0008_0x00=/sys/bus/i2c/devices/54-005f/hwmon/ +hwmon_in.addr_0x0008_0x00=0 +hwmon_in.len_0x0008_0x00=8 +hwmon_in.str_cons_0x0008_0x00=in8_input +hwmon_in.int_extra1_0x0008_0x00=0 +hwmon_in.int_extra2_0x0008_0x00=0 + +hwmon_in.mode_0x0008_0x01=str_constant +hwmon_in.str_cons_0x0008_0x01=UCD90160_01_P1V1_NIC_AVDDH + +hwmon_in.mode_0x0008_0x02=str_constant +hwmon_in.str_cons_0x0008_0x02=UCD90160_01 + +hwmon_in.mode_0x0008_0x03=constant +hwmon_in.int_cons_0x0008_0x03=1175 + +hwmon_in.mode_0x0008_0x05=constant +hwmon_in.int_cons_0x0008_0x05=1025 + +monitor_flag_hwmon_in.mode_0x0008_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0008_0x00=1 + + +# vol sensor 9 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0009_0x00=config +hwmon_in.src_0x0009_0x00=file +hwmon_in.int_cons_0x0009_0x00=0 +hwmon_in.frmt_0x0009_0x00=buf +hwmon_in.fpath_0x0009_0x00=/sys/bus/i2c/devices/54-005f/hwmon/ +hwmon_in.addr_0x0009_0x00=0 +hwmon_in.len_0x0009_0x00=8 +hwmon_in.str_cons_0x0009_0x00=in9_input +hwmon_in.int_extra1_0x0009_0x00=0 +hwmon_in.int_extra2_0x0009_0x00=0 + +hwmon_in.mode_0x0009_0x01=str_constant +hwmon_in.str_cons_0x0009_0x01=UCD90160_01_P0V9_NIC_AVDD_PCIE + +hwmon_in.mode_0x0009_0x02=str_constant +hwmon_in.str_cons_0x0009_0x02=UCD90160_01 + +hwmon_in.mode_0x0009_0x03=constant +hwmon_in.int_cons_0x0009_0x03=965 + +hwmon_in.mode_0x0009_0x05=constant +hwmon_in.int_cons_0x0009_0x05=835 + +monitor_flag_hwmon_in.mode_0x0009_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0009_0x00=1 + + +# vol sensor 10 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x000a_0x00=config +hwmon_in.src_0x000a_0x00=file +hwmon_in.int_cons_0x000a_0x00=0 +hwmon_in.frmt_0x000a_0x00=buf +hwmon_in.fpath_0x000a_0x00=/sys/bus/i2c/devices/54-005f/hwmon/ +hwmon_in.addr_0x000a_0x00=0 +hwmon_in.len_0x000a_0x00=8 +hwmon_in.str_cons_0x000a_0x00=in10_input +hwmon_in.int_extra1_0x000a_0x00=0 +hwmon_in.int_extra2_0x000a_0x00=0 + +hwmon_in.mode_0x000a_0x01=str_constant +hwmon_in.str_cons_0x000a_0x01=UCD90160_01_P0V9_NIC_AVDD_ETH + +hwmon_in.mode_0x000a_0x02=str_constant +hwmon_in.str_cons_0x000a_0x02=UCD90160_01 + +hwmon_in.mode_0x000a_0x03=constant +hwmon_in.int_cons_0x000a_0x03=965 + +hwmon_in.mode_0x000a_0x05=constant +hwmon_in.int_cons_0x000a_0x05=835 + +monitor_flag_hwmon_in.mode_0x000a_0x00=constant +monitor_flag_hwmon_in.int_cons_0x000a_0x00=1 + + +# vol sensor 11 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x000b_0x00=config +hwmon_in.src_0x000b_0x00=file +hwmon_in.int_cons_0x000b_0x00=0 +hwmon_in.frmt_0x000b_0x00=buf +hwmon_in.fpath_0x000b_0x00=/sys/bus/i2c/devices/54-005f/hwmon/ +hwmon_in.addr_0x000b_0x00=0 +hwmon_in.len_0x000b_0x00=8 +hwmon_in.str_cons_0x000b_0x00=in11_input +hwmon_in.int_extra1_0x000b_0x00=0 +hwmon_in.int_extra2_0x000b_0x00=0 + +hwmon_in.mode_0x000b_0x01=str_constant +hwmon_in.str_cons_0x000b_0x01=UCD90160_01_P0V8_NIC_VDD + +hwmon_in.mode_0x000b_0x02=str_constant +hwmon_in.str_cons_0x000b_0x02=UCD90160_01 + +hwmon_in.mode_0x000b_0x03=constant +hwmon_in.int_cons_0x000b_0x03=860 + +hwmon_in.mode_0x000b_0x05=constant +hwmon_in.int_cons_0x000b_0x05=740 + +monitor_flag_hwmon_in.mode_0x000b_0x00=constant +monitor_flag_hwmon_in.int_cons_0x000b_0x00=1 + + +# vol sensor 12 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x000c_0x00=config +hwmon_in.src_0x000c_0x00=file +hwmon_in.int_cons_0x000c_0x00=0 +hwmon_in.frmt_0x000c_0x00=buf +hwmon_in.fpath_0x000c_0x00=/sys/bus/i2c/devices/54-005f/hwmon/ +hwmon_in.addr_0x000c_0x00=0 +hwmon_in.len_0x000c_0x00=8 +hwmon_in.str_cons_0x000c_0x00=in12_input +hwmon_in.int_extra1_0x000c_0x00=0 +hwmon_in.int_extra2_0x000c_0x00=0 + +hwmon_in.mode_0x000c_0x01=str_constant +hwmon_in.str_cons_0x000c_0x01=UCD90160_01_P1V1_FR_MEM_S3 + +hwmon_in.mode_0x000c_0x02=str_constant +hwmon_in.str_cons_0x000c_0x02=UCD90160_01 + +hwmon_in.mode_0x000c_0x03=constant +hwmon_in.int_cons_0x000c_0x03=1186 + +hwmon_in.mode_0x000c_0x05=constant +hwmon_in.int_cons_0x000c_0x05=1047 + +monitor_flag_hwmon_in.mode_0x000c_0x00=constant +monitor_flag_hwmon_in.int_cons_0x000c_0x00=1 + + +# vol sensor 13 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x000d_0x00=config +hwmon_in.src_0x000d_0x00=file +hwmon_in.int_cons_0x000d_0x00=0 +hwmon_in.frmt_0x000d_0x00=buf +hwmon_in.fpath_0x000d_0x00=/sys/bus/i2c/devices/54-005f/hwmon/ +hwmon_in.addr_0x000d_0x00=0 +hwmon_in.len_0x000d_0x00=8 +hwmon_in.str_cons_0x000d_0x00=in13_input +hwmon_in.int_extra1_0x000d_0x00=0 +hwmon_in.int_extra2_0x000d_0x00=0 + +hwmon_in.mode_0x000d_0x01=str_constant +hwmon_in.str_cons_0x000d_0x01=UCD90160_01_VR_P0V8_FR_MISC_S0 + +hwmon_in.mode_0x000d_0x02=str_constant +hwmon_in.str_cons_0x000d_0x02=UCD90160_01 + +hwmon_in.mode_0x000d_0x03=constant +hwmon_in.int_cons_0x000d_0x03=1240 + +hwmon_in.mode_0x000d_0x05=constant +hwmon_in.int_cons_0x000d_0x05=560 + +monitor_flag_hwmon_in.mode_0x000d_0x00=constant +monitor_flag_hwmon_in.int_cons_0x000d_0x00=1 + + +# vol sensor 14 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x000e_0x00=config +hwmon_in.src_0x000e_0x00=file +hwmon_in.int_cons_0x000e_0x00=0 +hwmon_in.frmt_0x000e_0x00=buf +hwmon_in.fpath_0x000e_0x00=/sys/bus/i2c/devices/54-005f/hwmon/ +hwmon_in.addr_0x000e_0x00=0 +hwmon_in.len_0x000e_0x00=8 +hwmon_in.str_cons_0x000e_0x00=in14_input +hwmon_in.int_extra1_0x000e_0x00=0 +hwmon_in.int_extra2_0x000e_0x00=0 + +hwmon_in.mode_0x000e_0x01=str_constant +hwmon_in.str_cons_0x000e_0x01=UCD90160_01_VR_P0V8_FR_SOC + +hwmon_in.mode_0x000e_0x02=str_constant +hwmon_in.str_cons_0x000e_0x02=UCD90160_01 + +hwmon_in.mode_0x000e_0x03=constant +hwmon_in.int_cons_0x000e_0x03=1240 + +hwmon_in.mode_0x000e_0x05=constant +hwmon_in.int_cons_0x000e_0x05=560 + +monitor_flag_hwmon_in.mode_0x000e_0x00=constant +monitor_flag_hwmon_in.int_cons_0x000e_0x00=1 + + +# vol sensor 15 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x000f_0x00=config +hwmon_in.src_0x000f_0x00=file +hwmon_in.int_cons_0x000f_0x00=0 +hwmon_in.frmt_0x000f_0x00=buf +hwmon_in.fpath_0x000f_0x00=/sys/bus/i2c/devices/54-005f/hwmon/ +hwmon_in.addr_0x000f_0x00=0 +hwmon_in.len_0x000f_0x00=8 +hwmon_in.str_cons_0x000f_0x00=in15_input +hwmon_in.int_extra1_0x000f_0x00=0 +hwmon_in.int_extra2_0x000f_0x00=0 + +hwmon_in.mode_0x000f_0x01=str_constant +hwmon_in.str_cons_0x000f_0x01=UCD90160_01_VR_P0V8_FR_CORE + +hwmon_in.mode_0x000f_0x02=str_constant +hwmon_in.str_cons_0x000f_0x02=UCD90160_01 + +hwmon_in.mode_0x000f_0x03=constant +hwmon_in.int_cons_0x000f_0x03=1550 + +hwmon_in.mode_0x000f_0x05=constant +hwmon_in.int_cons_0x000f_0x05=560 + +monitor_flag_hwmon_in.mode_0x000f_0x00=constant +monitor_flag_hwmon_in.int_cons_0x000f_0x00=1 + + +# vol sensor 16 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0010_0x00=config +hwmon_in.src_0x0010_0x00=file +hwmon_in.int_cons_0x0010_0x00=0 +hwmon_in.frmt_0x0010_0x00=buf +hwmon_in.fpath_0x0010_0x00=/sys/bus/i2c/devices/54-005f/hwmon/ +hwmon_in.addr_0x0010_0x00=0 +hwmon_in.len_0x0010_0x00=8 +hwmon_in.str_cons_0x0010_0x00=in16_input +hwmon_in.int_extra1_0x0010_0x00=0 +hwmon_in.int_extra2_0x0010_0x00=0 + +hwmon_in.mode_0x0010_0x01=str_constant +hwmon_in.str_cons_0x0010_0x01=UCD90160_01_P1V8_STBY + +hwmon_in.mode_0x0010_0x02=str_constant +hwmon_in.str_cons_0x0010_0x02=UCD90160_01 + +hwmon_in.mode_0x0010_0x03=constant +hwmon_in.int_cons_0x0010_0x03=1910 + +hwmon_in.mode_0x0010_0x05=constant +hwmon_in.int_cons_0x0010_0x05=1690 + +monitor_flag_hwmon_in.mode_0x0010_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0010_0x00=1 + + +# vol sensor 17 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0011_0x00=config +hwmon_in.src_0x0011_0x00=file +hwmon_in.int_cons_0x0011_0x00=0 +hwmon_in.frmt_0x0011_0x00=buf +hwmon_in.fpath_0x0011_0x00=/sys/bus/i2c/devices/57-0068/hwmon/ +hwmon_in.addr_0x0011_0x00=0 +hwmon_in.len_0x0011_0x00=8 +hwmon_in.str_cons_0x0011_0x00=in1_input +hwmon_in.int_extra1_0x0011_0x00=0 +hwmon_in.int_extra2_0x0011_0x00=0 + +hwmon_in.mode_0x0011_0x01=str_constant +hwmon_in.str_cons_0x0011_0x01=UCD90160_VCC_3V3_BMC + +hwmon_in.mode_0x0011_0x02=str_constant +hwmon_in.str_cons_0x0011_0x02=UCD90160 + +hwmon_in.mode_0x0011_0x03=constant +hwmon_in.int_cons_0x0011_0x03=3630 + +hwmon_in.mode_0x0011_0x05=constant +hwmon_in.int_cons_0x0011_0x05=2970 + +monitor_flag_hwmon_in.mode_0x0011_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0011_0x00=1 + + +# vol sensor 18 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0012_0x00=config +hwmon_in.src_0x0012_0x00=file +hwmon_in.int_cons_0x0012_0x00=0 +hwmon_in.frmt_0x0012_0x00=buf +hwmon_in.fpath_0x0012_0x00=/sys/bus/i2c/devices/57-0068/hwmon/ +hwmon_in.addr_0x0012_0x00=0 +hwmon_in.len_0x0012_0x00=8 +hwmon_in.str_cons_0x0012_0x00=in2_input +hwmon_in.int_extra1_0x0012_0x00=0 +hwmon_in.int_extra2_0x0012_0x00=0 + +hwmon_in.mode_0x0012_0x01=str_constant +hwmon_in.str_cons_0x0012_0x01=UCD90160_VCC_1V0 + +hwmon_in.mode_0x0012_0x02=str_constant +hwmon_in.str_cons_0x0012_0x02=UCD90160 + +hwmon_in.mode_0x0012_0x03=constant +hwmon_in.int_cons_0x0012_0x03=1100 + +hwmon_in.mode_0x0012_0x05=constant +hwmon_in.int_cons_0x0012_0x05=900 + +monitor_flag_hwmon_in.mode_0x0012_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0012_0x00=1 + + +# vol sensor 19 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0013_0x00=config +hwmon_in.src_0x0013_0x00=file +hwmon_in.int_cons_0x0013_0x00=0 +hwmon_in.frmt_0x0013_0x00=buf +hwmon_in.fpath_0x0013_0x00=/sys/bus/i2c/devices/57-0068/hwmon/ +hwmon_in.addr_0x0013_0x00=0 +hwmon_in.len_0x0013_0x00=8 +hwmon_in.str_cons_0x0013_0x00=in3_input +hwmon_in.int_extra1_0x0013_0x00=0 +hwmon_in.int_extra2_0x0013_0x00=0 + +hwmon_in.mode_0x0013_0x01=str_constant +hwmon_in.str_cons_0x0013_0x01=UCD90160_VCC_1V8_BMC + +hwmon_in.mode_0x0013_0x02=str_constant +hwmon_in.str_cons_0x0013_0x02=UCD90160 + +hwmon_in.mode_0x0013_0x03=constant +hwmon_in.int_cons_0x0013_0x03=1980 + +hwmon_in.mode_0x0013_0x05=constant +hwmon_in.int_cons_0x0013_0x05=1620 + +monitor_flag_hwmon_in.mode_0x0013_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0013_0x00=1 + + +# vol sensor 20 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0014_0x00=config +hwmon_in.src_0x0014_0x00=file +hwmon_in.int_cons_0x0014_0x00=0 +hwmon_in.frmt_0x0014_0x00=buf +hwmon_in.fpath_0x0014_0x00=/sys/bus/i2c/devices/57-0068/hwmon/ +hwmon_in.addr_0x0014_0x00=0 +hwmon_in.len_0x0014_0x00=8 +hwmon_in.str_cons_0x0014_0x00=in4_input +hwmon_in.int_extra1_0x0014_0x00=0 +hwmon_in.int_extra2_0x0014_0x00=0 + +hwmon_in.mode_0x0014_0x01=str_constant +hwmon_in.str_cons_0x0014_0x01=UCD90160_VCC_1V2_BMC + +hwmon_in.mode_0x0014_0x02=str_constant +hwmon_in.str_cons_0x0014_0x02=UCD90160 + +hwmon_in.mode_0x0014_0x03=constant +hwmon_in.int_cons_0x0014_0x03=1353 + +hwmon_in.mode_0x0014_0x05=constant +hwmon_in.int_cons_0x0014_0x05=1107 + +monitor_flag_hwmon_in.mode_0x0014_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0014_0x00=1 + + +# vol sensor 21 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0015_0x00=config +hwmon_in.src_0x0015_0x00=file +hwmon_in.int_cons_0x0015_0x00=0 +hwmon_in.frmt_0x0015_0x00=buf +hwmon_in.fpath_0x0015_0x00=/sys/bus/i2c/devices/57-0068/hwmon/ +hwmon_in.addr_0x0015_0x00=0 +hwmon_in.len_0x0015_0x00=8 +hwmon_in.str_cons_0x0015_0x00=in5_input +hwmon_in.int_extra1_0x0015_0x00=0 +hwmon_in.int_extra2_0x0015_0x00=0 + +hwmon_in.mode_0x0015_0x01=str_constant +hwmon_in.str_cons_0x0015_0x01=UCD90160_VCC_1V1_BMC + +hwmon_in.mode_0x0015_0x02=str_constant +hwmon_in.str_cons_0x0015_0x02=UCD90160 + +hwmon_in.mode_0x0015_0x03=constant +hwmon_in.int_cons_0x0015_0x03=1265 + +hwmon_in.mode_0x0015_0x05=constant +hwmon_in.int_cons_0x0015_0x05=1035 + +monitor_flag_hwmon_in.mode_0x0015_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0015_0x00=1 + + +# vol sensor 22 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0016_0x00=config +hwmon_in.src_0x0016_0x00=file +hwmon_in.int_cons_0x0016_0x00=0 +hwmon_in.frmt_0x0016_0x00=buf +hwmon_in.fpath_0x0016_0x00=/sys/bus/i2c/devices/57-0068/hwmon/ +hwmon_in.addr_0x0016_0x00=0 +hwmon_in.len_0x0016_0x00=8 +hwmon_in.str_cons_0x0016_0x00=in6_input +hwmon_in.int_extra1_0x0016_0x00=0 +hwmon_in.int_extra2_0x0016_0x00=0 + +hwmon_in.mode_0x0016_0x01=str_constant +hwmon_in.str_cons_0x0016_0x01=UCD90160_VCC_1V15_DDRVDDQ + +hwmon_in.mode_0x0016_0x02=str_constant +hwmon_in.str_cons_0x0016_0x02=UCD90160 + +hwmon_in.mode_0x0016_0x03=constant +hwmon_in.int_cons_0x0016_0x03=1265 + +hwmon_in.mode_0x0016_0x05=constant +hwmon_in.int_cons_0x0016_0x05=1035 + +monitor_flag_hwmon_in.mode_0x0016_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0016_0x00=1 + + +# vol sensor 23 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0017_0x00=config +hwmon_in.src_0x0017_0x00=file +hwmon_in.int_cons_0x0017_0x00=0 +hwmon_in.frmt_0x0017_0x00=buf +hwmon_in.fpath_0x0017_0x00=/sys/bus/i2c/devices/57-0068/hwmon/ +hwmon_in.addr_0x0017_0x00=0 +hwmon_in.len_0x0017_0x00=8 +hwmon_in.str_cons_0x0017_0x00=in7_input +hwmon_in.int_extra1_0x0017_0x00=0 +hwmon_in.int_extra2_0x0017_0x00=0 + +hwmon_in.mode_0x0017_0x01=str_constant +hwmon_in.str_cons_0x0017_0x01=UCD90160_VCC_0V8_BMC + +hwmon_in.mode_0x0017_0x02=str_constant +hwmon_in.str_cons_0x0017_0x02=UCD90160 + +hwmon_in.mode_0x0017_0x03=constant +hwmon_in.int_cons_0x0017_0x03=946 + +hwmon_in.mode_0x0017_0x05=constant +hwmon_in.int_cons_0x0017_0x05=774 + +monitor_flag_hwmon_in.mode_0x0017_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0017_0x00=1 + + +# vol sensor 24 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0018_0x00=config +hwmon_in.src_0x0018_0x00=file +hwmon_in.int_cons_0x0018_0x00=0 +hwmon_in.frmt_0x0018_0x00=buf +hwmon_in.fpath_0x0018_0x00=/sys/bus/i2c/devices/57-0068/hwmon/ +hwmon_in.addr_0x0018_0x00=0 +hwmon_in.len_0x0018_0x00=8 +hwmon_in.str_cons_0x0018_0x00=in8_input +hwmon_in.int_extra1_0x0018_0x00=0 +hwmon_in.int_extra2_0x0018_0x00=0 + +hwmon_in.mode_0x0018_0x01=str_constant +hwmon_in.str_cons_0x0018_0x01=UCD90160_V3P3_EMMC_OUT + +hwmon_in.mode_0x0018_0x02=str_constant +hwmon_in.str_cons_0x0018_0x02=UCD90160 + +hwmon_in.mode_0x0018_0x03=constant +hwmon_in.int_cons_0x0018_0x03=3630 + +hwmon_in.mode_0x0018_0x05=constant +hwmon_in.int_cons_0x0018_0x05=2970 + +monitor_flag_hwmon_in.mode_0x0018_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0018_0x00=1 + + +# vol sensor 25 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0019_0x00=config +hwmon_in.src_0x0019_0x00=file +hwmon_in.int_cons_0x0019_0x00=0 +hwmon_in.frmt_0x0019_0x00=buf +hwmon_in.fpath_0x0019_0x00=/sys/bus/i2c/devices/57-0068/hwmon/ +hwmon_in.addr_0x0019_0x00=0 +hwmon_in.len_0x0019_0x00=8 +hwmon_in.str_cons_0x0019_0x00=in9_input +hwmon_in.int_extra1_0x0019_0x00=0 +hwmon_in.int_extra2_0x0019_0x00=0 + +hwmon_in.mode_0x0019_0x01=str_constant +hwmon_in.str_cons_0x0019_0x01=UCD90160_V1P80_EMMC_OUT + +hwmon_in.mode_0x0019_0x02=str_constant +hwmon_in.str_cons_0x0019_0x02=UCD90160 + +hwmon_in.mode_0x0019_0x03=constant +hwmon_in.int_cons_0x0019_0x03=1980 + +hwmon_in.mode_0x0019_0x05=constant +hwmon_in.int_cons_0x0019_0x05=1620 + +monitor_flag_hwmon_in.mode_0x0019_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0019_0x00=1 + + +# vol sensor 26 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x001a_0x00=config +hwmon_in.src_0x001a_0x00=file +hwmon_in.int_cons_0x001a_0x00=0 +hwmon_in.frmt_0x001a_0x00=buf +hwmon_in.fpath_0x001a_0x00=/sys/bus/i2c/devices/57-0068/hwmon/ +hwmon_in.addr_0x001a_0x00=0 +hwmon_in.len_0x001a_0x00=8 +hwmon_in.str_cons_0x001a_0x00=in10_input +hwmon_in.int_extra1_0x001a_0x00=0 +hwmon_in.int_extra2_0x001a_0x00=0 + +hwmon_in.mode_0x001a_0x01=str_constant +hwmon_in.str_cons_0x001a_0x01=UCD90160_VCC_3V3 + +hwmon_in.mode_0x001a_0x02=str_constant +hwmon_in.str_cons_0x001a_0x02=UCD90160 + +hwmon_in.mode_0x001a_0x03=constant +hwmon_in.int_cons_0x001a_0x03=3630 + +hwmon_in.mode_0x001a_0x05=constant +hwmon_in.int_cons_0x001a_0x05=2970 + +monitor_flag_hwmon_in.mode_0x001a_0x00=constant +monitor_flag_hwmon_in.int_cons_0x001a_0x00=1 + + +# vol sensor 27 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x001b_0x00=config +hwmon_in.src_0x001b_0x00=file +hwmon_in.int_cons_0x001b_0x00=0 +hwmon_in.frmt_0x001b_0x00=buf +hwmon_in.fpath_0x001b_0x00=/sys/bus/i2c/devices/53-005b/hwmon/ +hwmon_in.addr_0x001b_0x00=0 +hwmon_in.len_0x001b_0x00=8 +hwmon_in.str_cons_0x001b_0x00=in1_input +hwmon_in.int_extra1_0x001b_0x00=0 +hwmon_in.int_extra2_0x001b_0x00=0 + +hwmon_in.mode_0x001b_0x01=str_constant +hwmon_in.str_cons_0x001b_0x01=UCD90160_02_VDD12V_MGMT_V + +hwmon_in.mode_0x001b_0x02=str_constant +hwmon_in.str_cons_0x001b_0x02=UCD90160_02 + +hwmon_in.mode_0x001b_0x03=constant +hwmon_in.int_cons_0x001b_0x03=13200 + +hwmon_in.mode_0x001b_0x05=constant +hwmon_in.int_cons_0x001b_0x05=10800 + +monitor_flag_hwmon_in.mode_0x001b_0x00=constant +monitor_flag_hwmon_in.int_cons_0x001b_0x00=1 + + +# vol sensor 28 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x001c_0x00=config +hwmon_in.src_0x001c_0x00=file +hwmon_in.int_cons_0x001c_0x00=0 +hwmon_in.frmt_0x001c_0x00=buf +hwmon_in.fpath_0x001c_0x00=/sys/bus/i2c/devices/53-005b/hwmon/ +hwmon_in.addr_0x001c_0x00=0 +hwmon_in.len_0x001c_0x00=8 +hwmon_in.str_cons_0x001c_0x00=in2_input +hwmon_in.int_extra1_0x001c_0x00=0 +hwmon_in.int_extra2_0x001c_0x00=0 + +hwmon_in.mode_0x001c_0x01=str_constant +hwmon_in.str_cons_0x001c_0x01=UCD90160_02_VDD3V3_STBY_V + +hwmon_in.mode_0x001c_0x02=str_constant +hwmon_in.str_cons_0x001c_0x02=UCD90160_02 + +hwmon_in.mode_0x001c_0x03=constant +hwmon_in.int_cons_0x001c_0x03=3630 + +hwmon_in.mode_0x001c_0x05=constant +hwmon_in.int_cons_0x001c_0x05=2970 + +monitor_flag_hwmon_in.mode_0x001c_0x00=constant +monitor_flag_hwmon_in.int_cons_0x001c_0x00=1 + + +# vol sensor 29 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x001d_0x00=config +hwmon_in.src_0x001d_0x00=file +hwmon_in.int_cons_0x001d_0x00=0 +hwmon_in.frmt_0x001d_0x00=buf +hwmon_in.fpath_0x001d_0x00=/sys/bus/i2c/devices/53-005b/hwmon/ +hwmon_in.addr_0x001d_0x00=0 +hwmon_in.len_0x001d_0x00=8 +hwmon_in.str_cons_0x001d_0x00=in3_input +hwmon_in.int_extra1_0x001d_0x00=0 +hwmon_in.int_extra2_0x001d_0x00=0 + +hwmon_in.mode_0x001d_0x01=str_constant +hwmon_in.str_cons_0x001d_0x01=UCD90160_02_VDD5V_USB_V + +hwmon_in.mode_0x001d_0x02=str_constant +hwmon_in.str_cons_0x001d_0x02=UCD90160_02 + +hwmon_in.mode_0x001d_0x03=constant +hwmon_in.int_cons_0x001d_0x03=5500 + +hwmon_in.mode_0x001d_0x05=constant +hwmon_in.int_cons_0x001d_0x05=4500 + +monitor_flag_hwmon_in.mode_0x001d_0x00=constant +monitor_flag_hwmon_in.int_cons_0x001d_0x00=1 + + +# vol sensor 30 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x001e_0x00=config +hwmon_in.src_0x001e_0x00=file +hwmon_in.int_cons_0x001e_0x00=0 +hwmon_in.frmt_0x001e_0x00=buf +hwmon_in.fpath_0x001e_0x00=/sys/bus/i2c/devices/53-005b/hwmon/ +hwmon_in.addr_0x001e_0x00=0 +hwmon_in.len_0x001e_0x00=8 +hwmon_in.str_cons_0x001e_0x00=in4_input +hwmon_in.int_extra1_0x001e_0x00=0 +hwmon_in.int_extra2_0x001e_0x00=0 + +hwmon_in.mode_0x001e_0x01=str_constant +hwmon_in.str_cons_0x001e_0x01=UCD90160_02_PHY_VDD1V0_V + +hwmon_in.mode_0x001e_0x02=str_constant +hwmon_in.str_cons_0x001e_0x02=UCD90160_02 + +hwmon_in.mode_0x001e_0x03=constant +hwmon_in.int_cons_0x001e_0x03=1100 + +hwmon_in.mode_0x001e_0x05=constant +hwmon_in.int_cons_0x001e_0x05=900 + +monitor_flag_hwmon_in.mode_0x001e_0x00=constant +monitor_flag_hwmon_in.int_cons_0x001e_0x00=1 + + +# vol sensor 31 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x001f_0x00=config +hwmon_in.src_0x001f_0x00=file +hwmon_in.int_cons_0x001f_0x00=0 +hwmon_in.frmt_0x001f_0x00=buf +hwmon_in.fpath_0x001f_0x00=/sys/bus/i2c/devices/53-005b/hwmon/ +hwmon_in.addr_0x001f_0x00=0 +hwmon_in.len_0x001f_0x00=8 +hwmon_in.str_cons_0x001f_0x00=in5_input +hwmon_in.int_extra1_0x001f_0x00=0 +hwmon_in.int_extra2_0x001f_0x00=0 + +hwmon_in.mode_0x001f_0x01=str_constant +hwmon_in.str_cons_0x001f_0x01=UCD90160_02_VDD3V3_MGMT_V + +hwmon_in.mode_0x001f_0x02=str_constant +hwmon_in.str_cons_0x001f_0x02=UCD90160_02 + +hwmon_in.mode_0x001f_0x03=constant +hwmon_in.int_cons_0x001f_0x03=3630 + +hwmon_in.mode_0x001f_0x05=constant +hwmon_in.int_cons_0x001f_0x05=2970 + +monitor_flag_hwmon_in.mode_0x001f_0x00=constant +monitor_flag_hwmon_in.int_cons_0x001f_0x00=1 + + +# vol sensor 32 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0020_0x00=config +hwmon_in.src_0x0020_0x00=file +hwmon_in.int_cons_0x0020_0x00=0 +hwmon_in.frmt_0x0020_0x00=buf +hwmon_in.fpath_0x0020_0x00=/sys/bus/i2c/devices/53-005b/hwmon/ +hwmon_in.addr_0x0020_0x00=0 +hwmon_in.len_0x0020_0x00=8 +hwmon_in.str_cons_0x0020_0x00=in6_input +hwmon_in.int_extra1_0x0020_0x00=0 +hwmon_in.int_extra2_0x0020_0x00=0 + +hwmon_in.mode_0x0020_0x01=str_constant +hwmon_in.str_cons_0x0020_0x01=UCD90160_02_VDD3V3_CLK_MGMT_V + +hwmon_in.mode_0x0020_0x02=str_constant +hwmon_in.str_cons_0x0020_0x02=UCD90160_02 + +hwmon_in.mode_0x0020_0x03=constant +hwmon_in.int_cons_0x0020_0x03=3630 + +hwmon_in.mode_0x0020_0x05=constant +hwmon_in.int_cons_0x0020_0x05=2970 + +monitor_flag_hwmon_in.mode_0x0020_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0020_0x00=1 + + +# vol sensor 33 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0021_0x00=config +hwmon_in.src_0x0021_0x00=file +hwmon_in.int_cons_0x0021_0x00=0 +hwmon_in.frmt_0x0021_0x00=buf +hwmon_in.fpath_0x0021_0x00=/sys/bus/i2c/devices/53-005b/hwmon/ +hwmon_in.addr_0x0021_0x00=0 +hwmon_in.len_0x0021_0x00=8 +hwmon_in.str_cons_0x0021_0x00=in7_input +hwmon_in.int_extra1_0x0021_0x00=0 +hwmon_in.int_extra2_0x0021_0x00=0 + +hwmon_in.mode_0x0021_0x01=str_constant +hwmon_in.str_cons_0x0021_0x01=UCD90160_02_BMC_VCC3V3_OUT_V + +hwmon_in.mode_0x0021_0x02=str_constant +hwmon_in.str_cons_0x0021_0x02=UCD90160_02 + +hwmon_in.mode_0x0021_0x03=constant +hwmon_in.int_cons_0x0021_0x03=3630 + +hwmon_in.mode_0x0021_0x05=constant +hwmon_in.int_cons_0x0021_0x05=2970 + +monitor_flag_hwmon_in.mode_0x0021_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0021_0x00=1 + + +# vol sensor 34 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0022_0x00=config +hwmon_in.src_0x0022_0x00=file +hwmon_in.int_cons_0x0022_0x00=0 +hwmon_in.frmt_0x0022_0x00=buf +hwmon_in.fpath_0x0022_0x00=/sys/bus/i2c/devices/53-005b/hwmon/ +hwmon_in.addr_0x0022_0x00=0 +hwmon_in.len_0x0022_0x00=8 +hwmon_in.str_cons_0x0022_0x00=in8_input +hwmon_in.int_extra1_0x0022_0x00=0 +hwmon_in.int_extra2_0x0022_0x00=0 + +hwmon_in.mode_0x0022_0x01=str_constant +hwmon_in.str_cons_0x0022_0x01=UCD90160_02_SSD_VDD3V3_V + +hwmon_in.mode_0x0022_0x02=str_constant +hwmon_in.str_cons_0x0022_0x02=UCD90160_02 + +hwmon_in.mode_0x0022_0x03=constant +hwmon_in.int_cons_0x0022_0x03=3630 + +hwmon_in.mode_0x0022_0x05=constant +hwmon_in.int_cons_0x0022_0x05=2970 + +monitor_flag_hwmon_in.mode_0x0022_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0022_0x00=1 + + +# vol sensor 35 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0023_0x00=config +hwmon_in.src_0x0023_0x00=file +hwmon_in.int_cons_0x0023_0x00=0 +hwmon_in.frmt_0x0023_0x00=buf +hwmon_in.fpath_0x0023_0x00=/sys/bus/i2c/devices/53-005b/hwmon/ +hwmon_in.addr_0x0023_0x00=0 +hwmon_in.len_0x0023_0x00=8 +hwmon_in.str_cons_0x0023_0x00=in9_input +hwmon_in.int_extra1_0x0023_0x00=0 +hwmon_in.int_extra2_0x0023_0x00=0 + +hwmon_in.mode_0x0023_0x01=str_constant +hwmon_in.str_cons_0x0023_0x01=UCD90160_02_VDD3V8_CLK_V + +hwmon_in.mode_0x0023_0x02=str_constant +hwmon_in.str_cons_0x0023_0x02=UCD90160_02 + +hwmon_in.mode_0x0023_0x03=constant +hwmon_in.int_cons_0x0023_0x03=3993 + +hwmon_in.mode_0x0023_0x05=constant +hwmon_in.int_cons_0x0023_0x05=3267 + +monitor_flag_hwmon_in.mode_0x0023_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0023_0x00=1 + + +# vol sensor 36 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0024_0x00=config +hwmon_in.src_0x0024_0x00=file +hwmon_in.int_cons_0x0024_0x00=0 +hwmon_in.frmt_0x0024_0x00=buf +hwmon_in.fpath_0x0024_0x00=/sys/bus/i2c/devices/53-005b/hwmon/ +hwmon_in.addr_0x0024_0x00=0 +hwmon_in.len_0x0024_0x00=8 +hwmon_in.str_cons_0x0024_0x00=in10_input +hwmon_in.int_extra1_0x0024_0x00=0 +hwmon_in.int_extra2_0x0024_0x00=0 + +hwmon_in.mode_0x0024_0x01=str_constant +hwmon_in.str_cons_0x0024_0x01=UCD90160_02_AVDD0_8V + +hwmon_in.mode_0x0024_0x02=str_constant +hwmon_in.str_cons_0x0024_0x02=UCD90160_02 + +hwmon_in.mode_0x0024_0x03=constant +hwmon_in.int_cons_0x0024_0x03=880 + +hwmon_in.mode_0x0024_0x05=constant +hwmon_in.int_cons_0x0024_0x05=720 + +monitor_flag_hwmon_in.mode_0x0024_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0024_0x00=1 + + +# vol sensor 37 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0025_0x00=config +hwmon_in.src_0x0025_0x00=file +hwmon_in.int_cons_0x0025_0x00=0 +hwmon_in.frmt_0x0025_0x00=buf +hwmon_in.fpath_0x0025_0x00=/sys/bus/i2c/devices/53-005b/hwmon/ +hwmon_in.addr_0x0025_0x00=0 +hwmon_in.len_0x0025_0x00=8 +hwmon_in.str_cons_0x0025_0x00=in11_input +hwmon_in.int_extra1_0x0025_0x00=0 +hwmon_in.int_extra2_0x0025_0x00=0 + +hwmon_in.mode_0x0025_0x01=str_constant +hwmon_in.str_cons_0x0025_0x01=UCD90160_02_DVDD0_8V + +hwmon_in.mode_0x0025_0x02=str_constant +hwmon_in.str_cons_0x0025_0x02=UCD90160_02 + +hwmon_in.mode_0x0025_0x03=constant +hwmon_in.int_cons_0x0025_0x03=968 + +hwmon_in.mode_0x0025_0x05=constant +hwmon_in.int_cons_0x0025_0x05=792 + +monitor_flag_hwmon_in.mode_0x0025_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0025_0x00=1 + + +# vol sensor 38 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0026_0x00=config +hwmon_in.src_0x0026_0x00=file +hwmon_in.int_cons_0x0026_0x00=0 +hwmon_in.frmt_0x0026_0x00=buf +hwmon_in.fpath_0x0026_0x00=/sys/bus/i2c/devices/53-005b/hwmon/ +hwmon_in.addr_0x0026_0x00=0 +hwmon_in.len_0x0026_0x00=8 +hwmon_in.str_cons_0x0026_0x00=in12_input +hwmon_in.int_extra1_0x0026_0x00=0 +hwmon_in.int_extra2_0x0026_0x00=0 + +hwmon_in.mode_0x0026_0x01=str_constant +hwmon_in.str_cons_0x0026_0x01=UCD90160_02_PORT_VCC3.3V + +hwmon_in.mode_0x0026_0x02=str_constant +hwmon_in.str_cons_0x0026_0x02=UCD90160_02 + +hwmon_in.mode_0x0026_0x03=constant +hwmon_in.int_cons_0x0026_0x03=3630 + +hwmon_in.mode_0x0026_0x05=constant +hwmon_in.int_cons_0x0026_0x05=2970 + +monitor_flag_hwmon_in.mode_0x0026_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0026_0x00=1 + + +# vol sensor 39 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0027_0x00=config +hwmon_in.src_0x0027_0x00=file +hwmon_in.int_cons_0x0027_0x00=0 +hwmon_in.frmt_0x0027_0x00=buf +hwmon_in.fpath_0x0027_0x00=/sys/bus/i2c/devices/53-005b/hwmon/ +hwmon_in.addr_0x0027_0x00=0 +hwmon_in.len_0x0027_0x00=8 +hwmon_in.str_cons_0x0027_0x00=in13_input +hwmon_in.int_extra1_0x0027_0x00=0 +hwmon_in.int_extra2_0x0027_0x00=0 + +hwmon_in.mode_0x0027_0x01=str_constant +hwmon_in.str_cons_0x0027_0x01=UCD90160_02_VDD1.1V_HUB + +hwmon_in.mode_0x0027_0x02=str_constant +hwmon_in.str_cons_0x0027_0x02=UCD90160_02 + +hwmon_in.mode_0x0027_0x03=constant +hwmon_in.int_cons_0x0027_0x03=1210 + +hwmon_in.mode_0x0027_0x05=constant +hwmon_in.int_cons_0x0027_0x05=990 + +monitor_flag_hwmon_in.mode_0x0027_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0027_0x00=1 + + +# vol sensor 40 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0028_0x00=config +hwmon_in.src_0x0028_0x00=file +hwmon_in.int_cons_0x0028_0x00=0 +hwmon_in.frmt_0x0028_0x00=buf +hwmon_in.fpath_0x0028_0x00=/sys/bus/i2c/devices/53-005b/hwmon/ +hwmon_in.addr_0x0028_0x00=0 +hwmon_in.len_0x0028_0x00=8 +hwmon_in.str_cons_0x0028_0x00=in14_input +hwmon_in.int_extra1_0x0028_0x00=0 +hwmon_in.int_extra2_0x0028_0x00=0 + +hwmon_in.mode_0x0028_0x01=str_constant +hwmon_in.str_cons_0x0028_0x01=UCD90160_02_VDD1.8V + +hwmon_in.mode_0x0028_0x02=str_constant +hwmon_in.str_cons_0x0028_0x02=UCD90160_02 + +hwmon_in.mode_0x0028_0x03=constant +hwmon_in.int_cons_0x0028_0x03=1980 + +hwmon_in.mode_0x0028_0x05=constant +hwmon_in.int_cons_0x0028_0x05=1620 + +monitor_flag_hwmon_in.mode_0x0028_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0028_0x00=1 + + +# vol sensor 41 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0029_0x00=config +hwmon_in.src_0x0029_0x00=file +hwmon_in.int_cons_0x0029_0x00=0 +hwmon_in.frmt_0x0029_0x00=buf +hwmon_in.fpath_0x0029_0x00=/sys/bus/i2c/devices/53-005b/hwmon/ +hwmon_in.addr_0x0029_0x00=0 +hwmon_in.len_0x0029_0x00=8 +hwmon_in.str_cons_0x0029_0x00=in15_input +hwmon_in.int_extra1_0x0029_0x00=0 +hwmon_in.int_extra2_0x0029_0x00=0 + +hwmon_in.mode_0x0029_0x01=str_constant +hwmon_in.str_cons_0x0029_0x01=UCD90160_02_SSD2_VDD3V3_V + +hwmon_in.mode_0x0029_0x02=str_constant +hwmon_in.str_cons_0x0029_0x02=UCD90160_02 + +hwmon_in.mode_0x0029_0x03=constant +hwmon_in.int_cons_0x0029_0x03=3630 + +hwmon_in.mode_0x0029_0x05=constant +hwmon_in.int_cons_0x0029_0x05=2970 + +monitor_flag_hwmon_in.mode_0x0029_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0029_0x00=1 + + +# vol sensor 42 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x002a_0x00=config +hwmon_in.src_0x002a_0x00=file +hwmon_in.int_cons_0x002a_0x00=3 +hwmon_in.frmt_0x002a_0x00=buf +hwmon_in.fpath_0x002a_0x00=/sys/bus/i2c/devices/60-0048/hwmon/ +hwmon_in.addr_0x002a_0x00=0 +hwmon_in.len_0x002a_0x00=8 +hwmon_in.str_cons_0x002a_0x00=in0_input +hwmon_in.int_extra1_0x002a_0x00=1833 +hwmon_in.int_extra2_0x002a_0x00=0 + +hwmon_in.mode_0x002a_0x01=str_constant +hwmon_in.str_cons_0x002a_0x01=ADS7828E_01_VDD3.3V_NIC + +hwmon_in.mode_0x002a_0x02=str_constant +hwmon_in.str_cons_0x002a_0x02=ADS7828E_01 + +hwmon_in.mode_0x002a_0x03=constant +hwmon_in.int_cons_0x002a_0x03=3630 + +hwmon_in.mode_0x002a_0x05=constant +hwmon_in.int_cons_0x002a_0x05=2970 + +monitor_flag_hwmon_in.mode_0x002a_0x00=constant +monitor_flag_hwmon_in.int_cons_0x002a_0x00=1 + + +# vol sensor 43 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x002b_0x00=config +hwmon_in.src_0x002b_0x00=file +hwmon_in.int_cons_0x002b_0x00=0 +hwmon_in.frmt_0x002b_0x00=buf +hwmon_in.fpath_0x002b_0x00=/sys/bus/i2c/devices/60-0048/hwmon/ +hwmon_in.addr_0x002b_0x00=0 +hwmon_in.len_0x002b_0x00=8 +hwmon_in.str_cons_0x002b_0x00=in1_input +hwmon_in.int_extra1_0x002b_0x00=0 +hwmon_in.int_extra2_0x002b_0x00=0 + +hwmon_in.mode_0x002b_0x01=str_constant +hwmon_in.str_cons_0x002b_0x01=ADS7828E_01_VDD1.8V_2 + +hwmon_in.mode_0x002b_0x02=str_constant +hwmon_in.str_cons_0x002b_0x02=ADS7828E_01 + +hwmon_in.mode_0x002b_0x03=constant +hwmon_in.int_cons_0x002b_0x03=1980 + +hwmon_in.mode_0x002b_0x05=constant +hwmon_in.int_cons_0x002b_0x05=1620 + +monitor_flag_hwmon_in.mode_0x002b_0x00=constant +monitor_flag_hwmon_in.int_cons_0x002b_0x00=1 + + +# vol sensor 44 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x002c_0x00=config +hwmon_in.src_0x002c_0x00=file +hwmon_in.int_cons_0x002c_0x00=0 +hwmon_in.frmt_0x002c_0x00=buf +hwmon_in.fpath_0x002c_0x00=/sys/bus/i2c/devices/60-0048/hwmon/ +hwmon_in.addr_0x002c_0x00=0 +hwmon_in.len_0x002c_0x00=8 +hwmon_in.str_cons_0x002c_0x00=in2_input +hwmon_in.int_extra1_0x002c_0x00=0 +hwmon_in.int_extra2_0x002c_0x00=0 + +hwmon_in.mode_0x002c_0x01=str_constant +hwmon_in.str_cons_0x002c_0x01=ADS7828E_01_VDD0.85V + +hwmon_in.mode_0x002c_0x02=str_constant +hwmon_in.str_cons_0x002c_0x02=ADS7828E_01 + +hwmon_in.mode_0x002c_0x03=constant +hwmon_in.int_cons_0x002c_0x03=935 + +hwmon_in.mode_0x002c_0x05=constant +hwmon_in.int_cons_0x002c_0x05=765 + +monitor_flag_hwmon_in.mode_0x002c_0x00=constant +monitor_flag_hwmon_in.int_cons_0x002c_0x00=1 + + +# vol sensor 45 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x002d_0x00=config +hwmon_in.src_0x002d_0x00=file +hwmon_in.int_cons_0x002d_0x00=0 +hwmon_in.frmt_0x002d_0x00=buf +hwmon_in.fpath_0x002d_0x00=/sys/bus/i2c/devices/60-0048/hwmon/ +hwmon_in.addr_0x002d_0x00=0 +hwmon_in.len_0x002d_0x00=8 +hwmon_in.str_cons_0x002d_0x00=in3_input +hwmon_in.int_extra1_0x002d_0x00=0 +hwmon_in.int_extra2_0x002d_0x00=0 + +hwmon_in.mode_0x002d_0x01=str_constant +hwmon_in.str_cons_0x002d_0x01=ADS7828E_01_VDD2.3V + +hwmon_in.mode_0x002d_0x02=str_constant +hwmon_in.str_cons_0x002d_0x02=ADS7828E_01 + +hwmon_in.mode_0x002d_0x03=constant +hwmon_in.int_cons_0x002d_0x03=2530 + +hwmon_in.mode_0x002d_0x05=constant +hwmon_in.int_cons_0x002d_0x05=2070 + +monitor_flag_hwmon_in.mode_0x002d_0x00=constant +monitor_flag_hwmon_in.int_cons_0x002d_0x00=1 + + +# vol sensor 46 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x002e_0x00=config +hwmon_in.src_0x002e_0x00=file +hwmon_in.int_cons_0x002e_0x00=0 +hwmon_in.frmt_0x002e_0x00=buf +hwmon_in.fpath_0x002e_0x00=/sys/bus/i2c/devices/60-0048/hwmon/ +hwmon_in.addr_0x002e_0x00=0 +hwmon_in.len_0x002e_0x00=8 +hwmon_in.str_cons_0x002e_0x00=in4_input +hwmon_in.int_extra1_0x002e_0x00=0 +hwmon_in.int_extra2_0x002e_0x00=0 + +hwmon_in.mode_0x002e_0x01=str_constant +hwmon_in.str_cons_0x002e_0x01=ADS7828E_01_VDD0.9V + +hwmon_in.mode_0x002e_0x02=str_constant +hwmon_in.str_cons_0x002e_0x02=ADS7828E_01 + +hwmon_in.mode_0x002e_0x03=constant +hwmon_in.int_cons_0x002e_0x03=990 + +hwmon_in.mode_0x002e_0x05=constant +hwmon_in.int_cons_0x002e_0x05=810 + +monitor_flag_hwmon_in.mode_0x002e_0x00=constant +monitor_flag_hwmon_in.int_cons_0x002e_0x00=1 + + +# vol sensor 47 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x002f_0x00=config +hwmon_in.src_0x002f_0x00=file +hwmon_in.int_cons_0x002f_0x00=0 +hwmon_in.frmt_0x002f_0x00=buf +hwmon_in.fpath_0x002f_0x00=/sys/bus/i2c/devices/60-0048/hwmon/ +hwmon_in.addr_0x002f_0x00=0 +hwmon_in.len_0x002f_0x00=8 +hwmon_in.str_cons_0x002f_0x00=in5_input +hwmon_in.int_extra1_0x002f_0x00=0 +hwmon_in.int_extra2_0x002f_0x00=0 + +hwmon_in.mode_0x002f_0x01=str_constant +hwmon_in.str_cons_0x002f_0x01=ADS7828E_01_VDD0.65V + +hwmon_in.mode_0x002f_0x02=str_constant +hwmon_in.str_cons_0x002f_0x02=ADS7828E_01 + +hwmon_in.mode_0x002f_0x03=constant +hwmon_in.int_cons_0x002f_0x03=715 + +hwmon_in.mode_0x002f_0x05=constant +hwmon_in.int_cons_0x002f_0x05=585 + +monitor_flag_hwmon_in.mode_0x002f_0x00=constant +monitor_flag_hwmon_in.int_cons_0x002f_0x00=1 + + +# vol sensor 48 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0030_0x00=config +hwmon_in.src_0x0030_0x00=file +hwmon_in.int_cons_0x0030_0x00=0 +hwmon_in.frmt_0x0030_0x00=buf +hwmon_in.fpath_0x0030_0x00=/sys/bus/i2c/devices/60-0048/hwmon/ +hwmon_in.addr_0x0030_0x00=0 +hwmon_in.len_0x0030_0x00=8 +hwmon_in.str_cons_0x0030_0x00=in6_input +hwmon_in.int_extra1_0x0030_0x00=0 +hwmon_in.int_extra2_0x0030_0x00=0 + +hwmon_in.mode_0x0030_0x01=str_constant +hwmon_in.str_cons_0x0030_0x01=ADS7828E_01_VDD0.75V + +hwmon_in.mode_0x0030_0x02=str_constant +hwmon_in.str_cons_0x0030_0x02=ADS7828E_01 + +hwmon_in.mode_0x0030_0x03=constant +hwmon_in.int_cons_0x0030_0x03=825 + +hwmon_in.mode_0x0030_0x05=constant +hwmon_in.int_cons_0x0030_0x05=675 + +monitor_flag_hwmon_in.mode_0x0030_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0030_0x00=1 + + +# vol sensor 49 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0031_0x00=config +hwmon_in.src_0x0031_0x00=file +hwmon_in.int_cons_0x0031_0x00=0 +hwmon_in.frmt_0x0031_0x00=buf +hwmon_in.fpath_0x0031_0x00=/sys/bus/i2c/devices/60-0048/hwmon/ +hwmon_in.addr_0x0031_0x00=0 +hwmon_in.len_0x0031_0x00=8 +hwmon_in.str_cons_0x0031_0x00=in7_input +hwmon_in.int_extra1_0x0031_0x00=0 +hwmon_in.int_extra2_0x0031_0x00=0 + +hwmon_in.mode_0x0031_0x01=str_constant +hwmon_in.str_cons_0x0031_0x01=ADS7828E_01_VDD1.2V + +hwmon_in.mode_0x0031_0x02=str_constant +hwmon_in.str_cons_0x0031_0x02=ADS7828E_01 + +hwmon_in.mode_0x0031_0x03=constant +hwmon_in.int_cons_0x0031_0x03=1320 + +hwmon_in.mode_0x0031_0x05=constant +hwmon_in.int_cons_0x0031_0x05=1080 + +monitor_flag_hwmon_in.mode_0x0031_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0031_0x00=1 + + +# vol sensor 50 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0032_0x00=config +hwmon_in.src_0x0032_0x00=file +hwmon_in.int_cons_0x0032_0x00=0 +hwmon_in.frmt_0x0032_0x00=buf +hwmon_in.fpath_0x0032_0x00=/sys/bus/i2c/devices/128-005b/hwmon/ +hwmon_in.addr_0x0032_0x00=0 +hwmon_in.len_0x0032_0x00=8 +hwmon_in.str_cons_0x0032_0x00=in1_input +hwmon_in.int_extra1_0x0032_0x00=0 +hwmon_in.int_extra2_0x0032_0x00=0 + +hwmon_in.mode_0x0032_0x01=str_constant +hwmon_in.str_cons_0x0032_0x01=UCD90160_03_VDD12V_MAC_V + +hwmon_in.mode_0x0032_0x02=str_constant +hwmon_in.str_cons_0x0032_0x02=UCD90160_03 + +hwmon_in.mode_0x0032_0x03=constant +hwmon_in.int_cons_0x0032_0x03=13200 + +hwmon_in.mode_0x0032_0x05=constant +hwmon_in.int_cons_0x0032_0x05=10800 + +monitor_flag_hwmon_in.mode_0x0032_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0032_0x00=1 + + +# vol sensor 51 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0033_0x00=config +hwmon_in.src_0x0033_0x00=file +hwmon_in.int_cons_0x0033_0x00=0 +hwmon_in.frmt_0x0033_0x00=buf +hwmon_in.fpath_0x0033_0x00=/sys/bus/i2c/devices/128-005b/hwmon/ +hwmon_in.addr_0x0033_0x00=0 +hwmon_in.len_0x0033_0x00=8 +hwmon_in.str_cons_0x0033_0x00=in2_input +hwmon_in.int_extra1_0x0033_0x00=0 +hwmon_in.int_extra2_0x0033_0x00=0 + +hwmon_in.mode_0x0033_0x01=str_constant +hwmon_in.str_cons_0x0033_0x01=UCD90160_03_MAC_PLL_1V2_V + +hwmon_in.mode_0x0033_0x02=str_constant +hwmon_in.str_cons_0x0033_0x02=UCD90160_03 + +hwmon_in.mode_0x0033_0x03=constant +hwmon_in.int_cons_0x0033_0x03=1320 + +hwmon_in.mode_0x0033_0x05=constant +hwmon_in.int_cons_0x0033_0x05=1080 + +monitor_flag_hwmon_in.mode_0x0033_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0033_0x00=1 + + +# vol sensor 52 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0034_0x00=config +hwmon_in.src_0x0034_0x00=file +hwmon_in.int_cons_0x0034_0x00=0 +hwmon_in.frmt_0x0034_0x00=buf +hwmon_in.fpath_0x0034_0x00=/sys/bus/i2c/devices/128-005b/hwmon/ +hwmon_in.addr_0x0034_0x00=0 +hwmon_in.len_0x0034_0x00=8 +hwmon_in.str_cons_0x0034_0x00=in3_input +hwmon_in.int_extra1_0x0034_0x00=0 +hwmon_in.int_extra2_0x0034_0x00=0 + +hwmon_in.mode_0x0034_0x01=str_constant +hwmon_in.str_cons_0x0034_0x01=UCD90160_03_MAC_PLL_1V2_1_V + +hwmon_in.mode_0x0034_0x02=str_constant +hwmon_in.str_cons_0x0034_0x02=UCD90160_03 + +hwmon_in.mode_0x0034_0x03=constant +hwmon_in.int_cons_0x0034_0x03=1320 + +hwmon_in.mode_0x0034_0x05=constant +hwmon_in.int_cons_0x0034_0x05=1080 + +monitor_flag_hwmon_in.mode_0x0034_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0034_0x00=1 + + +# vol sensor 53 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0035_0x00=config +hwmon_in.src_0x0035_0x00=file +hwmon_in.int_cons_0x0035_0x00=0 +hwmon_in.frmt_0x0035_0x00=buf +hwmon_in.fpath_0x0035_0x00=/sys/bus/i2c/devices/128-005b/hwmon/ +hwmon_in.addr_0x0035_0x00=0 +hwmon_in.len_0x0035_0x00=8 +hwmon_in.str_cons_0x0035_0x00=in4_input +hwmon_in.int_extra1_0x0035_0x00=0 +hwmon_in.int_extra2_0x0035_0x00=0 + +hwmon_in.mode_0x0035_0x01=str_constant +hwmon_in.str_cons_0x0035_0x01=UCD90160_03_FPGA_VDD_1V0_V + +hwmon_in.mode_0x0035_0x02=str_constant +hwmon_in.str_cons_0x0035_0x02=UCD90160_03 + +hwmon_in.mode_0x0035_0x03=constant +hwmon_in.int_cons_0x0035_0x03=1100 + +hwmon_in.mode_0x0035_0x05=constant +hwmon_in.int_cons_0x0035_0x05=900 + +monitor_flag_hwmon_in.mode_0x0035_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0035_0x00=1 + + +# vol sensor 54 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0036_0x00=config +hwmon_in.src_0x0036_0x00=file +hwmon_in.int_cons_0x0036_0x00=0 +hwmon_in.frmt_0x0036_0x00=buf +hwmon_in.fpath_0x0036_0x00=/sys/bus/i2c/devices/128-005b/hwmon/ +hwmon_in.addr_0x0036_0x00=0 +hwmon_in.len_0x0036_0x00=8 +hwmon_in.str_cons_0x0036_0x00=in5_input +hwmon_in.int_extra1_0x0036_0x00=0 +hwmon_in.int_extra2_0x0036_0x00=0 + +hwmon_in.mode_0x0036_0x01=str_constant +hwmon_in.str_cons_0x0036_0x01=UCD90160_03_FPGA_VDD_1V8_V + +hwmon_in.mode_0x0036_0x02=str_constant +hwmon_in.str_cons_0x0036_0x02=UCD90160_03 + +hwmon_in.mode_0x0036_0x03=constant +hwmon_in.int_cons_0x0036_0x03=1980 + +hwmon_in.mode_0x0036_0x05=constant +hwmon_in.int_cons_0x0036_0x05=1620 + +monitor_flag_hwmon_in.mode_0x0036_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0036_0x00=1 + + +# vol sensor 55 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0037_0x00=config +hwmon_in.src_0x0037_0x00=file +hwmon_in.int_cons_0x0037_0x00=0 +hwmon_in.frmt_0x0037_0x00=buf +hwmon_in.fpath_0x0037_0x00=/sys/bus/i2c/devices/128-005b/hwmon/ +hwmon_in.addr_0x0037_0x00=0 +hwmon_in.len_0x0037_0x00=8 +hwmon_in.str_cons_0x0037_0x00=in6_input +hwmon_in.int_extra1_0x0037_0x00=0 +hwmon_in.int_extra2_0x0037_0x00=0 + +hwmon_in.mode_0x0037_0x01=str_constant +hwmon_in.str_cons_0x0037_0x01=UCD90160_03_FPGA_VDD_1V2_V + +hwmon_in.mode_0x0037_0x02=str_constant +hwmon_in.str_cons_0x0037_0x02=UCD90160_03 + +hwmon_in.mode_0x0037_0x03=constant +hwmon_in.int_cons_0x0037_0x03=1320 + +hwmon_in.mode_0x0037_0x05=constant +hwmon_in.int_cons_0x0037_0x05=1080 + +monitor_flag_hwmon_in.mode_0x0037_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0037_0x00=1 + + +# vol sensor 56 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0038_0x00=config +hwmon_in.src_0x0038_0x00=file +hwmon_in.int_cons_0x0038_0x00=0 +hwmon_in.frmt_0x0038_0x00=buf +hwmon_in.fpath_0x0038_0x00=/sys/bus/i2c/devices/128-005b/hwmon/ +hwmon_in.addr_0x0038_0x00=0 +hwmon_in.len_0x0038_0x00=8 +hwmon_in.str_cons_0x0038_0x00=in7_input +hwmon_in.int_extra1_0x0038_0x00=0 +hwmon_in.int_extra2_0x0038_0x00=0 + +hwmon_in.mode_0x0038_0x01=str_constant +hwmon_in.str_cons_0x0038_0x01=UCD90160_03_VDD_3V3_V + +hwmon_in.mode_0x0038_0x02=str_constant +hwmon_in.str_cons_0x0038_0x02=UCD90160_03 + +hwmon_in.mode_0x0038_0x03=constant +hwmon_in.int_cons_0x0038_0x03=3630 + +hwmon_in.mode_0x0038_0x05=constant +hwmon_in.int_cons_0x0038_0x05=2970 + +monitor_flag_hwmon_in.mode_0x0038_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0038_0x00=1 + + +# vol sensor 57 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0039_0x00=config +hwmon_in.src_0x0039_0x00=file +hwmon_in.int_cons_0x0039_0x00=0 +hwmon_in.frmt_0x0039_0x00=buf +hwmon_in.fpath_0x0039_0x00=/sys/bus/i2c/devices/128-005b/hwmon/ +hwmon_in.addr_0x0039_0x00=0 +hwmon_in.len_0x0039_0x00=8 +hwmon_in.str_cons_0x0039_0x00=in8_input +hwmon_in.int_extra1_0x0039_0x00=0 +hwmon_in.int_extra2_0x0039_0x00=0 + +hwmon_in.mode_0x0039_0x01=str_constant +hwmon_in.str_cons_0x0039_0x01=UCD90160_03_PWR_VDD_5V0_V + +hwmon_in.mode_0x0039_0x02=str_constant +hwmon_in.str_cons_0x0039_0x02=UCD90160_03 + +hwmon_in.mode_0x0039_0x03=constant +hwmon_in.int_cons_0x0039_0x03=5500 + +hwmon_in.mode_0x0039_0x05=constant +hwmon_in.int_cons_0x0039_0x05=4500 + +monitor_flag_hwmon_in.mode_0x0039_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0039_0x00=1 + + +# vol sensor 58 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x003a_0x00=config +hwmon_in.src_0x003a_0x00=file +hwmon_in.int_cons_0x003a_0x00=0 +hwmon_in.frmt_0x003a_0x00=buf +hwmon_in.fpath_0x003a_0x00=/sys/bus/i2c/devices/128-005b/hwmon/ +hwmon_in.addr_0x003a_0x00=0 +hwmon_in.len_0x003a_0x00=8 +hwmon_in.str_cons_0x003a_0x00=in9_input +hwmon_in.int_extra1_0x003a_0x00=0 +hwmon_in.int_extra2_0x003a_0x00=0 + +hwmon_in.mode_0x003a_0x01=str_constant +hwmon_in.str_cons_0x003a_0x01=UCD90160_03_PWR_VDD_5V0_1_V + +hwmon_in.mode_0x003a_0x02=str_constant +hwmon_in.str_cons_0x003a_0x02=UCD90160_03 + +hwmon_in.mode_0x003a_0x03=constant +hwmon_in.int_cons_0x003a_0x03=5500 + +hwmon_in.mode_0x003a_0x05=constant +hwmon_in.int_cons_0x003a_0x05=4500 + +monitor_flag_hwmon_in.mode_0x003a_0x00=constant +monitor_flag_hwmon_in.int_cons_0x003a_0x00=1 + + +# vol sensor 59 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x003b_0x00=config +hwmon_in.src_0x003b_0x00=file +hwmon_in.int_cons_0x003b_0x00=0 +hwmon_in.frmt_0x003b_0x00=buf +hwmon_in.fpath_0x003b_0x00=/sys/bus/i2c/devices/128-005b/hwmon/ +hwmon_in.addr_0x003b_0x00=0 +hwmon_in.len_0x003b_0x00=8 +hwmon_in.str_cons_0x003b_0x00=in10_input +hwmon_in.int_extra1_0x003b_0x00=0 +hwmon_in.int_extra2_0x003b_0x00=0 + +hwmon_in.mode_0x003b_0x01=str_constant +hwmon_in.str_cons_0x003b_0x01=UCD90160_03_PWR_VDD_5V0_2_V + +hwmon_in.mode_0x003b_0x02=str_constant +hwmon_in.str_cons_0x003b_0x02=UCD90160_03 + +hwmon_in.mode_0x003b_0x03=constant +hwmon_in.int_cons_0x003b_0x03=5500 + +hwmon_in.mode_0x003b_0x05=constant +hwmon_in.int_cons_0x003b_0x05=4500 + +monitor_flag_hwmon_in.mode_0x003b_0x00=constant +monitor_flag_hwmon_in.int_cons_0x003b_0x00=1 + + +# vol sensor 60 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x003c_0x00=config +hwmon_in.src_0x003c_0x00=file +hwmon_in.int_cons_0x003c_0x00=0 +hwmon_in.frmt_0x003c_0x00=buf +hwmon_in.fpath_0x003c_0x00=/sys/bus/i2c/devices/128-005b/hwmon/ +hwmon_in.addr_0x003c_0x00=0 +hwmon_in.len_0x003c_0x00=8 +hwmon_in.str_cons_0x003c_0x00=in11_input +hwmon_in.int_extra1_0x003c_0x00=0 +hwmon_in.int_extra2_0x003c_0x00=0 + +hwmon_in.mode_0x003c_0x01=str_constant +hwmon_in.str_cons_0x003c_0x01=UCD90160_03_CLK_VDD_3V3_V + +hwmon_in.mode_0x003c_0x02=str_constant +hwmon_in.str_cons_0x003c_0x02=UCD90160_03 + +hwmon_in.mode_0x003c_0x03=constant +hwmon_in.int_cons_0x003c_0x03=3630 + +hwmon_in.mode_0x003c_0x05=constant +hwmon_in.int_cons_0x003c_0x05=2970 + +monitor_flag_hwmon_in.mode_0x003c_0x00=constant +monitor_flag_hwmon_in.int_cons_0x003c_0x00=1 + + +# vol sensor 61 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x003d_0x00=config +hwmon_in.src_0x003d_0x00=file +hwmon_in.int_cons_0x003d_0x00=0 +hwmon_in.frmt_0x003d_0x00=buf +hwmon_in.fpath_0x003d_0x00=/sys/bus/i2c/devices/128-005b/hwmon/ +hwmon_in.addr_0x003d_0x00=0 +hwmon_in.len_0x003d_0x00=8 +hwmon_in.str_cons_0x003d_0x00=in12_input +hwmon_in.int_extra1_0x003d_0x00=0 +hwmon_in.int_extra2_0x003d_0x00=0 + +hwmon_in.mode_0x003d_0x01=str_constant +hwmon_in.str_cons_0x003d_0x01=UCD90160_03_CLK_VDD_1V8_V + +hwmon_in.mode_0x003d_0x02=str_constant +hwmon_in.str_cons_0x003d_0x02=UCD90160_03 + +hwmon_in.mode_0x003d_0x03=constant +hwmon_in.int_cons_0x003d_0x03=1980 + +hwmon_in.mode_0x003d_0x05=constant +hwmon_in.int_cons_0x003d_0x05=1620 + +monitor_flag_hwmon_in.mode_0x003d_0x00=constant +monitor_flag_hwmon_in.int_cons_0x003d_0x00=1 + + +# vol sensor 62 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x003e_0x00=config +hwmon_in.src_0x003e_0x00=file +hwmon_in.int_cons_0x003e_0x00=0 +hwmon_in.frmt_0x003e_0x00=buf +hwmon_in.fpath_0x003e_0x00=/sys/bus/i2c/devices/128-005b/hwmon/ +hwmon_in.addr_0x003e_0x00=0 +hwmon_in.len_0x003e_0x00=8 +hwmon_in.str_cons_0x003e_0x00=in13_input +hwmon_in.int_extra1_0x003e_0x00=0 +hwmon_in.int_extra2_0x003e_0x00=0 + +hwmon_in.mode_0x003e_0x01=str_constant +hwmon_in.str_cons_0x003e_0x01=UCD90160_03_MAC_VDDO_1V2_V + +hwmon_in.mode_0x003e_0x02=str_constant +hwmon_in.str_cons_0x003e_0x02=UCD90160_03 + +hwmon_in.mode_0x003e_0x03=constant +hwmon_in.int_cons_0x003e_0x03=1320 + +hwmon_in.mode_0x003e_0x05=constant +hwmon_in.int_cons_0x003e_0x05=1080 + +monitor_flag_hwmon_in.mode_0x003e_0x00=constant +monitor_flag_hwmon_in.int_cons_0x003e_0x00=1 + + +# vol sensor 63 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x003f_0x00=config +hwmon_in.src_0x003f_0x00=file +hwmon_in.int_cons_0x003f_0x00=0 +hwmon_in.frmt_0x003f_0x00=buf +hwmon_in.fpath_0x003f_0x00=/sys/bus/i2c/devices/128-005b/hwmon/ +hwmon_in.addr_0x003f_0x00=0 +hwmon_in.len_0x003f_0x00=8 +hwmon_in.str_cons_0x003f_0x00=in14_input +hwmon_in.int_extra1_0x003f_0x00=0 +hwmon_in.int_extra2_0x003f_0x00=0 + +hwmon_in.mode_0x003f_0x01=str_constant +hwmon_in.str_cons_0x003f_0x01=UCD90160_03_MAC_VDDO_1V8_V + +hwmon_in.mode_0x003f_0x02=str_constant +hwmon_in.str_cons_0x003f_0x02=UCD90160_03 + +hwmon_in.mode_0x003f_0x03=constant +hwmon_in.int_cons_0x003f_0x03=1980 + +hwmon_in.mode_0x003f_0x05=constant +hwmon_in.int_cons_0x003f_0x05=1620 + +monitor_flag_hwmon_in.mode_0x003f_0x00=constant +monitor_flag_hwmon_in.int_cons_0x003f_0x00=1 + + +# vol sensor 64 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0040_0x00=config +hwmon_in.src_0x0040_0x00=file +hwmon_in.int_cons_0x0040_0x00=0 +hwmon_in.frmt_0x0040_0x00=buf +hwmon_in.fpath_0x0040_0x00=/sys/bus/i2c/devices/128-005b/hwmon/ +hwmon_in.addr_0x0040_0x00=0 +hwmon_in.len_0x0040_0x00=8 +hwmon_in.str_cons_0x0040_0x00=in15_input +hwmon_in.int_extra1_0x0040_0x00=0 +hwmon_in.int_extra2_0x0040_0x00=0 + +hwmon_in.mode_0x0040_0x01=str_constant +hwmon_in.str_cons_0x0040_0x01=UCD90160_03_MAC_VDDC_0V8_V + +hwmon_in.mode_0x0040_0x02=str_constant +hwmon_in.str_cons_0x0040_0x02=UCD90160_03 + +hwmon_in.mode_0x0040_0x03=constant +hwmon_in.int_cons_0x0040_0x03=900 + +hwmon_in.mode_0x0040_0x05=constant +hwmon_in.int_cons_0x0040_0x05=600 + +monitor_flag_hwmon_in.mode_0x0040_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0040_0x00=1 + + +# vol sensor 65 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0041_0x00=config +hwmon_in.src_0x0041_0x00=file +hwmon_in.int_cons_0x0041_0x00=0 +hwmon_in.frmt_0x0041_0x00=buf +hwmon_in.fpath_0x0041_0x00=/sys/bus/i2c/devices/128-005b/hwmon/ +hwmon_in.addr_0x0041_0x00=0 +hwmon_in.len_0x0041_0x00=8 +hwmon_in.str_cons_0x0041_0x00=in16_input +hwmon_in.int_extra1_0x0041_0x00=0 +hwmon_in.int_extra2_0x0041_0x00=0 + +hwmon_in.mode_0x0041_0x01=str_constant +hwmon_in.str_cons_0x0041_0x01=UCD90160_03_MAC_VDDHTX_1V2_V + +hwmon_in.mode_0x0041_0x02=str_constant +hwmon_in.str_cons_0x0041_0x02=UCD90160_03 + +hwmon_in.mode_0x0041_0x03=constant +hwmon_in.int_cons_0x0041_0x03=1320 + +hwmon_in.mode_0x0041_0x05=constant +hwmon_in.int_cons_0x0041_0x05=1080 + +monitor_flag_hwmon_in.mode_0x0041_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0041_0x00=1 + + +# vol sensor 66 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0042_0x00=config +hwmon_in.src_0x0042_0x00=file +hwmon_in.int_cons_0x0042_0x00=0 +hwmon_in.frmt_0x0042_0x00=buf +hwmon_in.fpath_0x0042_0x00=/sys/bus/i2c/devices/129-005b/hwmon/ +hwmon_in.addr_0x0042_0x00=0 +hwmon_in.len_0x0042_0x00=8 +hwmon_in.str_cons_0x0042_0x00=in1_input +hwmon_in.int_extra1_0x0042_0x00=0 +hwmon_in.int_extra2_0x0042_0x00=0 + +hwmon_in.mode_0x0042_0x01=str_constant +hwmon_in.str_cons_0x0042_0x01=UCD90160_04_MAC_PT0_VDDC_0V8_V + +hwmon_in.mode_0x0042_0x02=str_constant +hwmon_in.str_cons_0x0042_0x02=UCD90160_04 + +hwmon_in.mode_0x0042_0x03=constant +hwmon_in.int_cons_0x0042_0x03=900 + +hwmon_in.mode_0x0042_0x05=constant +hwmon_in.int_cons_0x0042_0x05=600 + +monitor_flag_hwmon_in.mode_0x0042_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0042_0x00=1 + + +# vol sensor 67 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0043_0x00=config +hwmon_in.src_0x0043_0x00=file +hwmon_in.int_cons_0x0043_0x00=0 +hwmon_in.frmt_0x0043_0x00=buf +hwmon_in.fpath_0x0043_0x00=/sys/bus/i2c/devices/129-005b/hwmon/ +hwmon_in.addr_0x0043_0x00=0 +hwmon_in.len_0x0043_0x00=8 +hwmon_in.str_cons_0x0043_0x00=in2_input +hwmon_in.int_extra1_0x0043_0x00=0 +hwmon_in.int_extra2_0x0043_0x00=0 + +hwmon_in.mode_0x0043_0x01=str_constant +hwmon_in.str_cons_0x0043_0x01=UCD90160_04_MAC_PT1_VDDC_0V8_V + +hwmon_in.mode_0x0043_0x02=str_constant +hwmon_in.str_cons_0x0043_0x02=UCD90160_04 + +hwmon_in.mode_0x0043_0x03=constant +hwmon_in.int_cons_0x0043_0x03=900 + +hwmon_in.mode_0x0043_0x05=constant +hwmon_in.int_cons_0x0043_0x05=600 + +monitor_flag_hwmon_in.mode_0x0043_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0043_0x00=1 + + +# vol sensor 68 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0044_0x00=config +hwmon_in.src_0x0044_0x00=file +hwmon_in.int_cons_0x0044_0x00=0 +hwmon_in.frmt_0x0044_0x00=buf +hwmon_in.fpath_0x0044_0x00=/sys/bus/i2c/devices/129-005b/hwmon/ +hwmon_in.addr_0x0044_0x00=0 +hwmon_in.len_0x0044_0x00=8 +hwmon_in.str_cons_0x0044_0x00=in3_input +hwmon_in.int_extra1_0x0044_0x00=0 +hwmon_in.int_extra2_0x0044_0x00=0 + +hwmon_in.mode_0x0044_0x01=str_constant +hwmon_in.str_cons_0x0044_0x01=UCD90160_04_MAC_PT2_VDDC_0V8_V + +hwmon_in.mode_0x0044_0x02=str_constant +hwmon_in.str_cons_0x0044_0x02=UCD90160_04 + +hwmon_in.mode_0x0044_0x03=constant +hwmon_in.int_cons_0x0044_0x03=900 + +hwmon_in.mode_0x0044_0x05=constant +hwmon_in.int_cons_0x0044_0x05=600 + +monitor_flag_hwmon_in.mode_0x0044_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0044_0x00=1 + + +# vol sensor 69 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0045_0x00=config +hwmon_in.src_0x0045_0x00=file +hwmon_in.int_cons_0x0045_0x00=0 +hwmon_in.frmt_0x0045_0x00=buf +hwmon_in.fpath_0x0045_0x00=/sys/bus/i2c/devices/129-005b/hwmon/ +hwmon_in.addr_0x0045_0x00=0 +hwmon_in.len_0x0045_0x00=8 +hwmon_in.str_cons_0x0045_0x00=in4_input +hwmon_in.int_extra1_0x0045_0x00=0 +hwmon_in.int_extra2_0x0045_0x00=0 + +hwmon_in.mode_0x0045_0x01=str_constant +hwmon_in.str_cons_0x0045_0x01=UCD90160_04_MAC_PT3_VDDC_0V8_V + +hwmon_in.mode_0x0045_0x02=str_constant +hwmon_in.str_cons_0x0045_0x02=UCD90160_04 + +hwmon_in.mode_0x0045_0x03=constant +hwmon_in.int_cons_0x0045_0x03=900 + +hwmon_in.mode_0x0045_0x05=constant +hwmon_in.int_cons_0x0045_0x05=600 + +monitor_flag_hwmon_in.mode_0x0045_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0045_0x00=1 + + +# vol sensor 70 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0046_0x00=config +hwmon_in.src_0x0046_0x00=file +hwmon_in.int_cons_0x0046_0x00=0 +hwmon_in.frmt_0x0046_0x00=buf +hwmon_in.fpath_0x0046_0x00=/sys/bus/i2c/devices/129-005b/hwmon/ +hwmon_in.addr_0x0046_0x00=0 +hwmon_in.len_0x0046_0x00=8 +hwmon_in.str_cons_0x0046_0x00=in5_input +hwmon_in.int_extra1_0x0046_0x00=0 +hwmon_in.int_extra2_0x0046_0x00=0 + +hwmon_in.mode_0x0046_0x01=str_constant +hwmon_in.str_cons_0x0046_0x01=UCD90160_04_MAC_PT4_VDDC_0V8_V + +hwmon_in.mode_0x0046_0x02=str_constant +hwmon_in.str_cons_0x0046_0x02=UCD90160_04 + +hwmon_in.mode_0x0046_0x03=constant +hwmon_in.int_cons_0x0046_0x03=900 + +hwmon_in.mode_0x0046_0x05=constant +hwmon_in.int_cons_0x0046_0x05=600 + +monitor_flag_hwmon_in.mode_0x0046_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0046_0x00=1 + + +# vol sensor 71 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0047_0x00=config +hwmon_in.src_0x0047_0x00=file +hwmon_in.int_cons_0x0047_0x00=0 +hwmon_in.frmt_0x0047_0x00=buf +hwmon_in.fpath_0x0047_0x00=/sys/bus/i2c/devices/129-005b/hwmon/ +hwmon_in.addr_0x0047_0x00=0 +hwmon_in.len_0x0047_0x00=8 +hwmon_in.str_cons_0x0047_0x00=in6_input +hwmon_in.int_extra1_0x0047_0x00=0 +hwmon_in.int_extra2_0x0047_0x00=0 + +hwmon_in.mode_0x0047_0x01=str_constant +hwmon_in.str_cons_0x0047_0x01=UCD90160_04_MAC_PT5_VDDC_0V8_V + +hwmon_in.mode_0x0047_0x02=str_constant +hwmon_in.str_cons_0x0047_0x02=UCD90160_04 + +hwmon_in.mode_0x0047_0x03=constant +hwmon_in.int_cons_0x0047_0x03=900 + +hwmon_in.mode_0x0047_0x05=constant +hwmon_in.int_cons_0x0047_0x05=600 + +monitor_flag_hwmon_in.mode_0x0047_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0047_0x00=1 + + +# vol sensor 72 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0048_0x00=config +hwmon_in.src_0x0048_0x00=file +hwmon_in.int_cons_0x0048_0x00=0 +hwmon_in.frmt_0x0048_0x00=buf +hwmon_in.fpath_0x0048_0x00=/sys/bus/i2c/devices/129-005b/hwmon/ +hwmon_in.addr_0x0048_0x00=0 +hwmon_in.len_0x0048_0x00=8 +hwmon_in.str_cons_0x0048_0x00=in7_input +hwmon_in.int_extra1_0x0048_0x00=0 +hwmon_in.int_extra2_0x0048_0x00=0 + +hwmon_in.mode_0x0048_0x01=str_constant +hwmon_in.str_cons_0x0048_0x01=UCD90160_04_MAC_PT6_VDDC_0V8_V + +hwmon_in.mode_0x0048_0x02=str_constant +hwmon_in.str_cons_0x0048_0x02=UCD90160_04 + +hwmon_in.mode_0x0048_0x03=constant +hwmon_in.int_cons_0x0048_0x03=900 + +hwmon_in.mode_0x0048_0x05=constant +hwmon_in.int_cons_0x0048_0x05=600 + +monitor_flag_hwmon_in.mode_0x0048_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0048_0x00=1 + + +# vol sensor 73 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0049_0x00=config +hwmon_in.src_0x0049_0x00=file +hwmon_in.int_cons_0x0049_0x00=0 +hwmon_in.frmt_0x0049_0x00=buf +hwmon_in.fpath_0x0049_0x00=/sys/bus/i2c/devices/129-005b/hwmon/ +hwmon_in.addr_0x0049_0x00=0 +hwmon_in.len_0x0049_0x00=8 +hwmon_in.str_cons_0x0049_0x00=in8_input +hwmon_in.int_extra1_0x0049_0x00=0 +hwmon_in.int_extra2_0x0049_0x00=0 + +hwmon_in.mode_0x0049_0x01=str_constant +hwmon_in.str_cons_0x0049_0x01=UCD90160_04_MAC_PT7_VDDC_0V8_V + +hwmon_in.mode_0x0049_0x02=str_constant +hwmon_in.str_cons_0x0049_0x02=UCD90160_04 + +hwmon_in.mode_0x0049_0x03=constant +hwmon_in.int_cons_0x0049_0x03=900 + +hwmon_in.mode_0x0049_0x05=constant +hwmon_in.int_cons_0x0049_0x05=600 + +monitor_flag_hwmon_in.mode_0x0049_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0049_0x00=1 + + +# vol sensor 74 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x004a_0x00=config +hwmon_in.src_0x004a_0x00=file +hwmon_in.int_cons_0x004a_0x00=0 +hwmon_in.frmt_0x004a_0x00=buf +hwmon_in.fpath_0x004a_0x00=/sys/bus/i2c/devices/129-005b/hwmon/ +hwmon_in.addr_0x004a_0x00=0 +hwmon_in.len_0x004a_0x00=8 +hwmon_in.str_cons_0x004a_0x00=in9_input +hwmon_in.int_extra1_0x004a_0x00=0 +hwmon_in.int_extra2_0x004a_0x00=0 + +hwmon_in.mode_0x004a_0x01=str_constant +hwmon_in.str_cons_0x004a_0x01=UCD90160_04_MAC_PB0_PB7_TRVDD_0V72_V + +hwmon_in.mode_0x004a_0x02=str_constant +hwmon_in.str_cons_0x004a_0x02=UCD90160_04 + +hwmon_in.mode_0x004a_0x03=constant +hwmon_in.int_cons_0x004a_0x03=880 + +hwmon_in.mode_0x004a_0x05=constant +hwmon_in.int_cons_0x004a_0x05=650 + +monitor_flag_hwmon_in.mode_0x004a_0x00=constant +monitor_flag_hwmon_in.int_cons_0x004a_0x00=1 + + +# vol sensor 75 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x004b_0x00=config +hwmon_in.src_0x004b_0x00=file +hwmon_in.int_cons_0x004b_0x00=0 +hwmon_in.frmt_0x004b_0x00=buf +hwmon_in.fpath_0x004b_0x00=/sys/bus/i2c/devices/129-005b/hwmon/ +hwmon_in.addr_0x004b_0x00=0 +hwmon_in.len_0x004b_0x00=8 +hwmon_in.str_cons_0x004b_0x00=in10_input +hwmon_in.int_extra1_0x004b_0x00=0 +hwmon_in.int_extra2_0x004b_0x00=0 + +hwmon_in.mode_0x004b_0x01=str_constant +hwmon_in.str_cons_0x004b_0x01=UCD90160_04_MAC_PB1_PB2_TRVDD_0V72_V + +hwmon_in.mode_0x004b_0x02=str_constant +hwmon_in.str_cons_0x004b_0x02=UCD90160_04 + +hwmon_in.mode_0x004b_0x03=constant +hwmon_in.int_cons_0x004b_0x03=880 + +hwmon_in.mode_0x004b_0x05=constant +hwmon_in.int_cons_0x004b_0x05=650 + +monitor_flag_hwmon_in.mode_0x004b_0x00=constant +monitor_flag_hwmon_in.int_cons_0x004b_0x00=1 + + +# vol sensor 76 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x004c_0x00=config +hwmon_in.src_0x004c_0x00=file +hwmon_in.int_cons_0x004c_0x00=0 +hwmon_in.frmt_0x004c_0x00=buf +hwmon_in.fpath_0x004c_0x00=/sys/bus/i2c/devices/129-005b/hwmon/ +hwmon_in.addr_0x004c_0x00=0 +hwmon_in.len_0x004c_0x00=8 +hwmon_in.str_cons_0x004c_0x00=in11_input +hwmon_in.int_extra1_0x004c_0x00=0 +hwmon_in.int_extra2_0x004c_0x00=0 + +hwmon_in.mode_0x004c_0x01=str_constant +hwmon_in.str_cons_0x004c_0x01=UCD90160_04_MAC_PB3_PB4_TRVDD_0V72_V + +hwmon_in.mode_0x004c_0x02=str_constant +hwmon_in.str_cons_0x004c_0x02=UCD90160_04 + +hwmon_in.mode_0x004c_0x03=constant +hwmon_in.int_cons_0x004c_0x03=880 + +hwmon_in.mode_0x004c_0x05=constant +hwmon_in.int_cons_0x004c_0x05=650 + +monitor_flag_hwmon_in.mode_0x004c_0x00=constant +monitor_flag_hwmon_in.int_cons_0x004c_0x00=1 + + +# vol sensor 77 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x004d_0x00=config +hwmon_in.src_0x004d_0x00=file +hwmon_in.int_cons_0x004d_0x00=0 +hwmon_in.frmt_0x004d_0x00=buf +hwmon_in.fpath_0x004d_0x00=/sys/bus/i2c/devices/129-005b/hwmon/ +hwmon_in.addr_0x004d_0x00=0 +hwmon_in.len_0x004d_0x00=8 +hwmon_in.str_cons_0x004d_0x00=in12_input +hwmon_in.int_extra1_0x004d_0x00=0 +hwmon_in.int_extra2_0x004d_0x00=0 + +hwmon_in.mode_0x004d_0x01=str_constant +hwmon_in.str_cons_0x004d_0x01=UCD90160_04_MAC_PB5_PB6_TRVDD_0V72_V + +hwmon_in.mode_0x004d_0x02=str_constant +hwmon_in.str_cons_0x004d_0x02=UCD90160_04 + +hwmon_in.mode_0x004d_0x03=constant +hwmon_in.int_cons_0x004d_0x03=880 + +hwmon_in.mode_0x004d_0x05=constant +hwmon_in.int_cons_0x004d_0x05=650 + +monitor_flag_hwmon_in.mode_0x004d_0x00=constant +monitor_flag_hwmon_in.int_cons_0x004d_0x00=1 + + +# vol sensor 78 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x004e_0x00=config +hwmon_in.src_0x004e_0x00=file +hwmon_in.int_cons_0x004e_0x00=0 +hwmon_in.frmt_0x004e_0x00=buf +hwmon_in.fpath_0x004e_0x00=/sys/bus/i2c/devices/129-005b/hwmon/ +hwmon_in.addr_0x004e_0x00=0 +hwmon_in.len_0x004e_0x00=8 +hwmon_in.str_cons_0x004e_0x00=in13_input +hwmon_in.int_extra1_0x004e_0x00=0 +hwmon_in.int_extra2_0x004e_0x00=0 + +hwmon_in.mode_0x004e_0x01=str_constant +hwmon_in.str_cons_0x004e_0x01=UCD90160_04_MAC_TRVDD0_0V75_V + +hwmon_in.mode_0x004e_0x02=str_constant +hwmon_in.str_cons_0x004e_0x02=UCD90160_04 + +hwmon_in.mode_0x004e_0x03=constant +hwmon_in.int_cons_0x004e_0x03=825 + +hwmon_in.mode_0x004e_0x05=constant +hwmon_in.int_cons_0x004e_0x05=675 + +monitor_flag_hwmon_in.mode_0x004e_0x00=constant +monitor_flag_hwmon_in.int_cons_0x004e_0x00=1 + + +# vol sensor 79 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x004f_0x00=config +hwmon_in.src_0x004f_0x00=file +hwmon_in.int_cons_0x004f_0x00=0 +hwmon_in.frmt_0x004f_0x00=buf +hwmon_in.fpath_0x004f_0x00=/sys/bus/i2c/devices/129-005b/hwmon/ +hwmon_in.addr_0x004f_0x00=0 +hwmon_in.len_0x004f_0x00=8 +hwmon_in.str_cons_0x004f_0x00=in14_input +hwmon_in.int_extra1_0x004f_0x00=0 +hwmon_in.int_extra2_0x004f_0x00=0 + +hwmon_in.mode_0x004f_0x01=str_constant +hwmon_in.str_cons_0x004f_0x01=UCD90160_04_MAC_TRVDD1_0V75_V + +hwmon_in.mode_0x004f_0x02=str_constant +hwmon_in.str_cons_0x004f_0x02=UCD90160_04 + +hwmon_in.mode_0x004f_0x03=constant +hwmon_in.int_cons_0x004f_0x03=825 + +hwmon_in.mode_0x004f_0x05=constant +hwmon_in.int_cons_0x004f_0x05=675 + +monitor_flag_hwmon_in.mode_0x004f_0x00=constant +monitor_flag_hwmon_in.int_cons_0x004f_0x00=1 + + +# vol sensor 80 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0050_0x00=config +hwmon_in.src_0x0050_0x00=file +hwmon_in.int_cons_0x0050_0x00=0 +hwmon_in.frmt_0x0050_0x00=buf +hwmon_in.fpath_0x0050_0x00=/sys/bus/i2c/devices/129-005b/hwmon/ +hwmon_in.addr_0x0050_0x00=0 +hwmon_in.len_0x0050_0x00=8 +hwmon_in.str_cons_0x0050_0x00=in15_input +hwmon_in.int_extra1_0x0050_0x00=0 +hwmon_in.int_extra2_0x0050_0x00=0 + +hwmon_in.mode_0x0050_0x01=str_constant +hwmon_in.str_cons_0x0050_0x01=UCD90160_04_MAC_TRVDD0_0V9_V + +hwmon_in.mode_0x0050_0x02=str_constant +hwmon_in.str_cons_0x0050_0x02=UCD90160_04 + +hwmon_in.mode_0x0050_0x03=constant +hwmon_in.int_cons_0x0050_0x03=990 + +hwmon_in.mode_0x0050_0x05=constant +hwmon_in.int_cons_0x0050_0x05=810 + +monitor_flag_hwmon_in.mode_0x0050_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0050_0x00=1 + + +# vol sensor 81 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0051_0x00=config +hwmon_in.src_0x0051_0x00=file +hwmon_in.int_cons_0x0051_0x00=0 +hwmon_in.frmt_0x0051_0x00=buf +hwmon_in.fpath_0x0051_0x00=/sys/bus/i2c/devices/129-005b/hwmon/ +hwmon_in.addr_0x0051_0x00=0 +hwmon_in.len_0x0051_0x00=8 +hwmon_in.str_cons_0x0051_0x00=in16_input +hwmon_in.int_extra1_0x0051_0x00=0 +hwmon_in.int_extra2_0x0051_0x00=0 + +hwmon_in.mode_0x0051_0x01=str_constant +hwmon_in.str_cons_0x0051_0x01=UCD90160_04_MAC_TRVDD1_0V9_V + +hwmon_in.mode_0x0051_0x02=str_constant +hwmon_in.str_cons_0x0051_0x02=UCD90160_04 + +hwmon_in.mode_0x0051_0x03=constant +hwmon_in.int_cons_0x0051_0x03=990 + +hwmon_in.mode_0x0051_0x05=constant +hwmon_in.int_cons_0x0051_0x05=810 + +monitor_flag_hwmon_in.mode_0x0051_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0051_0x00=1 + + +# vol sensor 82 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0052_0x00=config +hwmon_in.src_0x0052_0x00=file +hwmon_in.int_cons_0x0052_0x00=0 +hwmon_in.frmt_0x0052_0x00=buf +hwmon_in.fpath_0x0052_0x00=/sys/bus/i2c/devices/130-005b/hwmon/ +hwmon_in.addr_0x0052_0x00=0 +hwmon_in.len_0x0052_0x00=8 +hwmon_in.str_cons_0x0052_0x00=in1_input +hwmon_in.int_extra1_0x0052_0x00=0 +hwmon_in.int_extra2_0x0052_0x00=0 + +hwmon_in.mode_0x0052_0x01=str_constant +hwmon_in.str_cons_0x0052_0x01=UCD90160_05_MAC_TSC15_0_PLL0_PVDD_0V9_V + +hwmon_in.mode_0x0052_0x02=str_constant +hwmon_in.str_cons_0x0052_0x02=UCD90160_05 + +hwmon_in.mode_0x0052_0x03=constant +hwmon_in.int_cons_0x0052_0x03=990 + +hwmon_in.mode_0x0052_0x05=constant +hwmon_in.int_cons_0x0052_0x05=810 + +monitor_flag_hwmon_in.mode_0x0052_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0052_0x00=1 + + +# vol sensor 83 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0053_0x00=config +hwmon_in.src_0x0053_0x00=file +hwmon_in.int_cons_0x0053_0x00=0 +hwmon_in.frmt_0x0053_0x00=buf +hwmon_in.fpath_0x0053_0x00=/sys/bus/i2c/devices/130-005b/hwmon/ +hwmon_in.addr_0x0053_0x00=0 +hwmon_in.len_0x0053_0x00=8 +hwmon_in.str_cons_0x0053_0x00=in2_input +hwmon_in.int_extra1_0x0053_0x00=0 +hwmon_in.int_extra2_0x0053_0x00=0 + +hwmon_in.mode_0x0053_0x01=str_constant +hwmon_in.str_cons_0x0053_0x01=UCD90160_05_MAC_TSC31_16_PLL0_PVDD_0V9_V + +hwmon_in.mode_0x0053_0x02=str_constant +hwmon_in.str_cons_0x0053_0x02=UCD90160_05 + +hwmon_in.mode_0x0053_0x03=constant +hwmon_in.int_cons_0x0053_0x03=990 + +hwmon_in.mode_0x0053_0x05=constant +hwmon_in.int_cons_0x0053_0x05=810 + +monitor_flag_hwmon_in.mode_0x0053_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0053_0x00=1 + + +# vol sensor 84 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0054_0x00=config +hwmon_in.src_0x0054_0x00=file +hwmon_in.int_cons_0x0054_0x00=0 +hwmon_in.frmt_0x0054_0x00=buf +hwmon_in.fpath_0x0054_0x00=/sys/bus/i2c/devices/130-005b/hwmon/ +hwmon_in.addr_0x0054_0x00=0 +hwmon_in.len_0x0054_0x00=8 +hwmon_in.str_cons_0x0054_0x00=in3_input +hwmon_in.int_extra1_0x0054_0x00=0 +hwmon_in.int_extra2_0x0054_0x00=0 + +hwmon_in.mode_0x0054_0x01=str_constant +hwmon_in.str_cons_0x0054_0x01=UCD90160_05_MAC_TSC47_32_PLL0_PVDD_0V9_V + +hwmon_in.mode_0x0054_0x02=str_constant +hwmon_in.str_cons_0x0054_0x02=UCD90160_05 + +hwmon_in.mode_0x0054_0x03=constant +hwmon_in.int_cons_0x0054_0x03=990 + +hwmon_in.mode_0x0054_0x05=constant +hwmon_in.int_cons_0x0054_0x05=810 + +monitor_flag_hwmon_in.mode_0x0054_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0054_0x00=1 + + +# vol sensor 85 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0055_0x00=config +hwmon_in.src_0x0055_0x00=file +hwmon_in.int_cons_0x0055_0x00=0 +hwmon_in.frmt_0x0055_0x00=buf +hwmon_in.fpath_0x0055_0x00=/sys/bus/i2c/devices/130-005b/hwmon/ +hwmon_in.addr_0x0055_0x00=0 +hwmon_in.len_0x0055_0x00=8 +hwmon_in.str_cons_0x0055_0x00=in4_input +hwmon_in.int_extra1_0x0055_0x00=0 +hwmon_in.int_extra2_0x0055_0x00=0 + +hwmon_in.mode_0x0055_0x01=str_constant +hwmon_in.str_cons_0x0055_0x01=UCD90160_05_MAC_TSC63_48_PLL0_PVDD_0V9_V + +hwmon_in.mode_0x0055_0x02=str_constant +hwmon_in.str_cons_0x0055_0x02=UCD90160_05 + +hwmon_in.mode_0x0055_0x03=constant +hwmon_in.int_cons_0x0055_0x03=990 + +hwmon_in.mode_0x0055_0x05=constant +hwmon_in.int_cons_0x0055_0x05=810 + +monitor_flag_hwmon_in.mode_0x0055_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0055_0x00=1 + + +# vol sensor 86 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0056_0x00=config +hwmon_in.src_0x0056_0x00=file +hwmon_in.int_cons_0x0056_0x00=0 +hwmon_in.frmt_0x0056_0x00=buf +hwmon_in.fpath_0x0056_0x00=/sys/bus/i2c/devices/130-005b/hwmon/ +hwmon_in.addr_0x0056_0x00=0 +hwmon_in.len_0x0056_0x00=8 +hwmon_in.str_cons_0x0056_0x00=in5_input +hwmon_in.int_extra1_0x0056_0x00=0 +hwmon_in.int_extra2_0x0056_0x00=0 + +hwmon_in.mode_0x0056_0x01=str_constant +hwmon_in.str_cons_0x0056_0x01=UCD90160_05_MAC_TSC79_64_PLL0_PVDD_0V9_V + +hwmon_in.mode_0x0056_0x02=str_constant +hwmon_in.str_cons_0x0056_0x02=UCD90160_05 + +hwmon_in.mode_0x0056_0x03=constant +hwmon_in.int_cons_0x0056_0x03=990 + +hwmon_in.mode_0x0056_0x05=constant +hwmon_in.int_cons_0x0056_0x05=810 + +monitor_flag_hwmon_in.mode_0x0056_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0056_0x00=1 + + +# vol sensor 87 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0057_0x00=config +hwmon_in.src_0x0057_0x00=file +hwmon_in.int_cons_0x0057_0x00=0 +hwmon_in.frmt_0x0057_0x00=buf +hwmon_in.fpath_0x0057_0x00=/sys/bus/i2c/devices/130-005b/hwmon/ +hwmon_in.addr_0x0057_0x00=0 +hwmon_in.len_0x0057_0x00=8 +hwmon_in.str_cons_0x0057_0x00=in6_input +hwmon_in.int_extra1_0x0057_0x00=0 +hwmon_in.int_extra2_0x0057_0x00=0 + +hwmon_in.mode_0x0057_0x01=str_constant +hwmon_in.str_cons_0x0057_0x01=UCD90160_05_MAC_TSC95_80_PLL0_PVDD_0V9_V + +hwmon_in.mode_0x0057_0x02=str_constant +hwmon_in.str_cons_0x0057_0x02=UCD90160_05 + +hwmon_in.mode_0x0057_0x03=constant +hwmon_in.int_cons_0x0057_0x03=990 + +hwmon_in.mode_0x0057_0x05=constant +hwmon_in.int_cons_0x0057_0x05=810 + +monitor_flag_hwmon_in.mode_0x0057_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0057_0x00=1 + + +# vol sensor 88 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0058_0x00=config +hwmon_in.src_0x0058_0x00=file +hwmon_in.int_cons_0x0058_0x00=0 +hwmon_in.frmt_0x0058_0x00=buf +hwmon_in.fpath_0x0058_0x00=/sys/bus/i2c/devices/130-005b/hwmon/ +hwmon_in.addr_0x0058_0x00=0 +hwmon_in.len_0x0058_0x00=8 +hwmon_in.str_cons_0x0058_0x00=in7_input +hwmon_in.int_extra1_0x0058_0x00=0 +hwmon_in.int_extra2_0x0058_0x00=0 + +hwmon_in.mode_0x0058_0x01=str_constant +hwmon_in.str_cons_0x0058_0x01=UCD90160_05_MAC_TSC111_96_PLL0_PVDD_0V9_V + +hwmon_in.mode_0x0058_0x02=str_constant +hwmon_in.str_cons_0x0058_0x02=UCD90160_05 + +hwmon_in.mode_0x0058_0x03=constant +hwmon_in.int_cons_0x0058_0x03=990 + +hwmon_in.mode_0x0058_0x05=constant +hwmon_in.int_cons_0x0058_0x05=810 + +monitor_flag_hwmon_in.mode_0x0058_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0058_0x00=1 + + +# vol sensor 89 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0059_0x00=config +hwmon_in.src_0x0059_0x00=file +hwmon_in.int_cons_0x0059_0x00=0 +hwmon_in.frmt_0x0059_0x00=buf +hwmon_in.fpath_0x0059_0x00=/sys/bus/i2c/devices/130-005b/hwmon/ +hwmon_in.addr_0x0059_0x00=0 +hwmon_in.len_0x0059_0x00=8 +hwmon_in.str_cons_0x0059_0x00=in8_input +hwmon_in.int_extra1_0x0059_0x00=0 +hwmon_in.int_extra2_0x0059_0x00=0 + +hwmon_in.mode_0x0059_0x01=str_constant +hwmon_in.str_cons_0x0059_0x01=UCD90160_05_MAC_TSC127_112_PLL0_PVDD_0V9_V + +hwmon_in.mode_0x0059_0x02=str_constant +hwmon_in.str_cons_0x0059_0x02=UCD90160_05 + +hwmon_in.mode_0x0059_0x03=constant +hwmon_in.int_cons_0x0059_0x03=990 + +hwmon_in.mode_0x0059_0x05=constant +hwmon_in.int_cons_0x0059_0x05=810 + +monitor_flag_hwmon_in.mode_0x0059_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0059_0x00=1 + + +# vol sensor 90 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x005a_0x00=config +hwmon_in.src_0x005a_0x00=file +hwmon_in.int_cons_0x005a_0x00=0 +hwmon_in.frmt_0x005a_0x00=buf +hwmon_in.fpath_0x005a_0x00=/sys/bus/i2c/devices/130-005b/hwmon/ +hwmon_in.addr_0x005a_0x00=0 +hwmon_in.len_0x005a_0x00=8 +hwmon_in.str_cons_0x005a_0x00=in9_input +hwmon_in.int_extra1_0x005a_0x00=0 +hwmon_in.int_extra2_0x005a_0x00=0 + +hwmon_in.mode_0x005a_0x01=str_constant +hwmon_in.str_cons_0x005a_0x01=UCD90160_05_MAC_TSC63_0_PLL0_PVDD_1V5_V + +hwmon_in.mode_0x005a_0x02=str_constant +hwmon_in.str_cons_0x005a_0x02=UCD90160_05 + +hwmon_in.mode_0x005a_0x03=constant +hwmon_in.int_cons_0x005a_0x03=1650 + +hwmon_in.mode_0x005a_0x05=constant +hwmon_in.int_cons_0x005a_0x05=1350 + +monitor_flag_hwmon_in.mode_0x005a_0x00=constant +monitor_flag_hwmon_in.int_cons_0x005a_0x00=1 + + +# vol sensor 91 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x005b_0x00=config +hwmon_in.src_0x005b_0x00=file +hwmon_in.int_cons_0x005b_0x00=0 +hwmon_in.frmt_0x005b_0x00=buf +hwmon_in.fpath_0x005b_0x00=/sys/bus/i2c/devices/130-005b/hwmon/ +hwmon_in.addr_0x005b_0x00=0 +hwmon_in.len_0x005b_0x00=8 +hwmon_in.str_cons_0x005b_0x00=in10_input +hwmon_in.int_extra1_0x005b_0x00=0 +hwmon_in.int_extra2_0x005b_0x00=0 + +hwmon_in.mode_0x005b_0x01=str_constant +hwmon_in.str_cons_0x005b_0x01=UCD90160_05_MAC_TSC127_64_PLL0_PVDD_1V5_V + +hwmon_in.mode_0x005b_0x02=str_constant +hwmon_in.str_cons_0x005b_0x02=UCD90160_05 + +hwmon_in.mode_0x005b_0x03=constant +hwmon_in.int_cons_0x005b_0x03=1650 + +hwmon_in.mode_0x005b_0x05=constant +hwmon_in.int_cons_0x005b_0x05=1350 + +monitor_flag_hwmon_in.mode_0x005b_0x00=constant +monitor_flag_hwmon_in.int_cons_0x005b_0x00=1 + + +# vol sensor 92 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x005c_0x00=config +hwmon_in.src_0x005c_0x00=file +hwmon_in.int_cons_0x005c_0x00=0 +hwmon_in.frmt_0x005c_0x00=buf +hwmon_in.fpath_0x005c_0x00=/sys/bus/i2c/devices/130-005b/hwmon/ +hwmon_in.addr_0x005c_0x00=0 +hwmon_in.len_0x005c_0x00=8 +hwmon_in.str_cons_0x005c_0x00=in11_input +hwmon_in.int_extra1_0x005c_0x00=0 +hwmon_in.int_extra2_0x005c_0x00=0 + +hwmon_in.mode_0x005c_0x01=str_constant +hwmon_in.str_cons_0x005c_0x01=UCD90160_05_MAC_AVDD_1V5_V + +hwmon_in.mode_0x005c_0x02=str_constant +hwmon_in.str_cons_0x005c_0x02=UCD90160_05 + +hwmon_in.mode_0x005c_0x03=constant +hwmon_in.int_cons_0x005c_0x03=1650 + +hwmon_in.mode_0x005c_0x05=constant +hwmon_in.int_cons_0x005c_0x05=1350 + +monitor_flag_hwmon_in.mode_0x005c_0x00=constant +monitor_flag_hwmon_in.int_cons_0x005c_0x00=1 + + +# vol sensor 93 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x005d_0x00=config +hwmon_in.src_0x005d_0x00=file +hwmon_in.int_cons_0x005d_0x00=0 +hwmon_in.frmt_0x005d_0x00=buf +hwmon_in.fpath_0x005d_0x00=/sys/bus/i2c/devices/130-005b/hwmon/ +hwmon_in.addr_0x005d_0x00=0 +hwmon_in.len_0x005d_0x00=8 +hwmon_in.str_cons_0x005d_0x00=in12_input +hwmon_in.int_extra1_0x005d_0x00=0 +hwmon_in.int_extra2_0x005d_0x00=0 + +hwmon_in.mode_0x005d_0x01=str_constant +hwmon_in.str_cons_0x005d_0x01=UCD90160_05_MAC_PB0_PB1_AVDD_1V45_V + +hwmon_in.mode_0x005d_0x02=str_constant +hwmon_in.str_cons_0x005d_0x02=UCD90160_05 + +hwmon_in.mode_0x005d_0x03=constant +hwmon_in.int_cons_0x005d_0x03=1650 + +hwmon_in.mode_0x005d_0x05=constant +hwmon_in.int_cons_0x005d_0x05=1300 + +monitor_flag_hwmon_in.mode_0x005d_0x00=constant +monitor_flag_hwmon_in.int_cons_0x005d_0x00=1 + + +# vol sensor 94 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x005e_0x00=config +hwmon_in.src_0x005e_0x00=file +hwmon_in.int_cons_0x005e_0x00=0 +hwmon_in.frmt_0x005e_0x00=buf +hwmon_in.fpath_0x005e_0x00=/sys/bus/i2c/devices/130-005b/hwmon/ +hwmon_in.addr_0x005e_0x00=0 +hwmon_in.len_0x005e_0x00=8 +hwmon_in.str_cons_0x005e_0x00=in13_input +hwmon_in.int_extra1_0x005e_0x00=0 +hwmon_in.int_extra2_0x005e_0x00=0 + +hwmon_in.mode_0x005e_0x01=str_constant +hwmon_in.str_cons_0x005e_0x01=UCD90160_05_MAC_PB2_PB3_AVDD_1V45_V + +hwmon_in.mode_0x005e_0x02=str_constant +hwmon_in.str_cons_0x005e_0x02=UCD90160_05 + +hwmon_in.mode_0x005e_0x03=constant +hwmon_in.int_cons_0x005e_0x03=1650 + +hwmon_in.mode_0x005e_0x05=constant +hwmon_in.int_cons_0x005e_0x05=1300 + +monitor_flag_hwmon_in.mode_0x005e_0x00=constant +monitor_flag_hwmon_in.int_cons_0x005e_0x00=1 + + +# vol sensor 95 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x005f_0x00=config +hwmon_in.src_0x005f_0x00=file +hwmon_in.int_cons_0x005f_0x00=0 +hwmon_in.frmt_0x005f_0x00=buf +hwmon_in.fpath_0x005f_0x00=/sys/bus/i2c/devices/130-005b/hwmon/ +hwmon_in.addr_0x005f_0x00=0 +hwmon_in.len_0x005f_0x00=8 +hwmon_in.str_cons_0x005f_0x00=in14_input +hwmon_in.int_extra1_0x005f_0x00=0 +hwmon_in.int_extra2_0x005f_0x00=0 + +hwmon_in.mode_0x005f_0x01=str_constant +hwmon_in.str_cons_0x005f_0x01=UCD90160_05_MAC_PB4_PB5_AVDD_1V45_V + +hwmon_in.mode_0x005f_0x02=str_constant +hwmon_in.str_cons_0x005f_0x02=UCD90160_05 + +hwmon_in.mode_0x005f_0x03=constant +hwmon_in.int_cons_0x005f_0x03=1650 + +hwmon_in.mode_0x005f_0x05=constant +hwmon_in.int_cons_0x005f_0x05=1300 + +monitor_flag_hwmon_in.mode_0x005f_0x00=constant +monitor_flag_hwmon_in.int_cons_0x005f_0x00=1 + + +# vol sensor 96 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0060_0x00=config +hwmon_in.src_0x0060_0x00=file +hwmon_in.int_cons_0x0060_0x00=0 +hwmon_in.frmt_0x0060_0x00=buf +hwmon_in.fpath_0x0060_0x00=/sys/bus/i2c/devices/130-005b/hwmon/ +hwmon_in.addr_0x0060_0x00=0 +hwmon_in.len_0x0060_0x00=8 +hwmon_in.str_cons_0x0060_0x00=in15_input +hwmon_in.int_extra1_0x0060_0x00=0 +hwmon_in.int_extra2_0x0060_0x00=0 + +hwmon_in.mode_0x0060_0x01=str_constant +hwmon_in.str_cons_0x0060_0x01=UCD90160_05_MAC_PB6_PB7_AVDD_1V45_V + +hwmon_in.mode_0x0060_0x02=str_constant +hwmon_in.str_cons_0x0060_0x02=UCD90160_05 + +hwmon_in.mode_0x0060_0x03=constant +hwmon_in.int_cons_0x0060_0x03=1650 + +hwmon_in.mode_0x0060_0x05=constant +hwmon_in.int_cons_0x0060_0x05=1300 + +monitor_flag_hwmon_in.mode_0x0060_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0060_0x00=1 + + +# vol sensor 97 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0061_0x00=config +hwmon_in.src_0x0061_0x00=file +hwmon_in.int_cons_0x0061_0x00=0 +hwmon_in.frmt_0x0061_0x00=buf +hwmon_in.fpath_0x0061_0x00=/sys/bus/i2c/devices/130-005b/hwmon/ +hwmon_in.addr_0x0061_0x00=0 +hwmon_in.len_0x0061_0x00=8 +hwmon_in.str_cons_0x0061_0x00=in16_input +hwmon_in.int_extra1_0x0061_0x00=0 +hwmon_in.int_extra2_0x0061_0x00=0 + +hwmon_in.mode_0x0061_0x01=str_constant +hwmon_in.str_cons_0x0061_0x01=UCD90160_05_MAC_AVDD_0V8_V + +hwmon_in.mode_0x0061_0x02=str_constant +hwmon_in.str_cons_0x0061_0x02=UCD90160_05 + +hwmon_in.mode_0x0061_0x03=constant +hwmon_in.int_cons_0x0061_0x03=880 + +hwmon_in.mode_0x0061_0x05=constant +hwmon_in.int_cons_0x0061_0x05=720 + +monitor_flag_hwmon_in.mode_0x0061_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0061_0x00=1 + + +# vol sensor 98 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0062_0x00=config +hwmon_in.src_0x0062_0x00=file +hwmon_in.int_cons_0x0062_0x00=0 +hwmon_in.frmt_0x0062_0x00=buf +hwmon_in.fpath_0x0062_0x00=/sys/bus/i2c/devices/136-0060/hwmon/ +hwmon_in.addr_0x0062_0x00=0 +hwmon_in.len_0x0062_0x00=8 +hwmon_in.str_cons_0x0062_0x00=in3_input +hwmon_in.int_extra1_0x0062_0x00=0 +hwmon_in.int_extra2_0x0062_0x00=0 + +hwmon_in.mode_0x0062_0x01=str_constant +hwmon_in.str_cons_0x0062_0x01=XDPE1A2G5B_01_MAC_VDDC_0V8_V + +hwmon_in.mode_0x0062_0x02=str_constant +hwmon_in.str_cons_0x0062_0x02=XDPE1A2G5B_01 + +hwmon_in.mode_0x0062_0x03=constant +hwmon_in.int_cons_0x0062_0x03=900 + +hwmon_in.mode_0x0062_0x05=constant +hwmon_in.int_cons_0x0062_0x05=600 + +monitor_flag_hwmon_in.mode_0x0062_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0062_0x00=1 + + +# vol sensor 99 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0063_0x00=config +hwmon_in.src_0x0063_0x00=file +hwmon_in.int_cons_0x0063_0x00=0 +hwmon_in.frmt_0x0063_0x00=buf +hwmon_in.fpath_0x0063_0x00=/sys/bus/i2c/devices/107-0060/hwmon/ +hwmon_in.addr_0x0063_0x00=0 +hwmon_in.len_0x0063_0x00=8 +hwmon_in.str_cons_0x0063_0x00=in3_input +hwmon_in.int_extra1_0x0063_0x00=0 +hwmon_in.int_extra2_0x0063_0x00=0 + +hwmon_in.mode_0x0063_0x01=str_constant +hwmon_in.str_cons_0x0063_0x01=XDPE12284C_05_MAC_PT0_VDDC_0V8_V + +hwmon_in.mode_0x0063_0x02=str_constant +hwmon_in.str_cons_0x0063_0x02=XDPE12284C_05 + +hwmon_in.mode_0x0063_0x03=constant +hwmon_in.int_cons_0x0063_0x03=900 + +hwmon_in.mode_0x0063_0x05=constant +hwmon_in.int_cons_0x0063_0x05=600 + +monitor_flag_hwmon_in.mode_0x0063_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0063_0x00=1 + + +# vol sensor 100 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0064_0x00=config +hwmon_in.src_0x0064_0x00=file +hwmon_in.int_cons_0x0064_0x00=0 +hwmon_in.frmt_0x0064_0x00=buf +hwmon_in.fpath_0x0064_0x00=/sys/bus/i2c/devices/107-0060/hwmon/ +hwmon_in.addr_0x0064_0x00=0 +hwmon_in.len_0x0064_0x00=8 +hwmon_in.str_cons_0x0064_0x00=in4_input +hwmon_in.int_extra1_0x0064_0x00=0 +hwmon_in.int_extra2_0x0064_0x00=0 + +hwmon_in.mode_0x0064_0x01=str_constant +hwmon_in.str_cons_0x0064_0x01=XDPE12284C_05_MAC_PT1_VDDC_0V8_V + +hwmon_in.mode_0x0064_0x02=str_constant +hwmon_in.str_cons_0x0064_0x02=XDPE12284C_05 + +hwmon_in.mode_0x0064_0x03=constant +hwmon_in.int_cons_0x0064_0x03=900 + +hwmon_in.mode_0x0064_0x05=constant +hwmon_in.int_cons_0x0064_0x05=600 + +monitor_flag_hwmon_in.mode_0x0064_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0064_0x00=1 + + +# vol sensor 101 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0065_0x00=config +hwmon_in.src_0x0065_0x00=file +hwmon_in.int_cons_0x0065_0x00=0 +hwmon_in.frmt_0x0065_0x00=buf +hwmon_in.fpath_0x0065_0x00=/sys/bus/i2c/devices/108-0060/hwmon/ +hwmon_in.addr_0x0065_0x00=0 +hwmon_in.len_0x0065_0x00=8 +hwmon_in.str_cons_0x0065_0x00=in3_input +hwmon_in.int_extra1_0x0065_0x00=0 +hwmon_in.int_extra2_0x0065_0x00=0 + +hwmon_in.mode_0x0065_0x01=str_constant +hwmon_in.str_cons_0x0065_0x01=XDPE12284C_06_MAC_PT2_VDDC_0V8_V + +hwmon_in.mode_0x0065_0x02=str_constant +hwmon_in.str_cons_0x0065_0x02=XDPE12284C_06 + +hwmon_in.mode_0x0065_0x03=constant +hwmon_in.int_cons_0x0065_0x03=900 + +hwmon_in.mode_0x0065_0x05=constant +hwmon_in.int_cons_0x0065_0x05=600 + +monitor_flag_hwmon_in.mode_0x0065_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0065_0x00=1 + + +# vol sensor 102 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0066_0x00=config +hwmon_in.src_0x0066_0x00=file +hwmon_in.int_cons_0x0066_0x00=0 +hwmon_in.frmt_0x0066_0x00=buf +hwmon_in.fpath_0x0066_0x00=/sys/bus/i2c/devices/108-0060/hwmon/ +hwmon_in.addr_0x0066_0x00=0 +hwmon_in.len_0x0066_0x00=8 +hwmon_in.str_cons_0x0066_0x00=in4_input +hwmon_in.int_extra1_0x0066_0x00=0 +hwmon_in.int_extra2_0x0066_0x00=0 + +hwmon_in.mode_0x0066_0x01=str_constant +hwmon_in.str_cons_0x0066_0x01=XDPE12284C_06_MAC_PT3_VDDC_0V8_V + +hwmon_in.mode_0x0066_0x02=str_constant +hwmon_in.str_cons_0x0066_0x02=XDPE12284C_06 + +hwmon_in.mode_0x0066_0x03=constant +hwmon_in.int_cons_0x0066_0x03=900 + +hwmon_in.mode_0x0066_0x05=constant +hwmon_in.int_cons_0x0066_0x05=600 + +monitor_flag_hwmon_in.mode_0x0066_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0066_0x00=1 + + +# vol sensor 103 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0067_0x00=config +hwmon_in.src_0x0067_0x00=file +hwmon_in.int_cons_0x0067_0x00=0 +hwmon_in.frmt_0x0067_0x00=buf +hwmon_in.fpath_0x0067_0x00=/sys/bus/i2c/devices/109-0060/hwmon/ +hwmon_in.addr_0x0067_0x00=0 +hwmon_in.len_0x0067_0x00=8 +hwmon_in.str_cons_0x0067_0x00=in3_input +hwmon_in.int_extra1_0x0067_0x00=0 +hwmon_in.int_extra2_0x0067_0x00=0 + +hwmon_in.mode_0x0067_0x01=str_constant +hwmon_in.str_cons_0x0067_0x01=XDPE12284C_07_MAC_PT4_VDDC_0V8_V + +hwmon_in.mode_0x0067_0x02=str_constant +hwmon_in.str_cons_0x0067_0x02=XDPE12284C_07 + +hwmon_in.mode_0x0067_0x03=constant +hwmon_in.int_cons_0x0067_0x03=900 + +hwmon_in.mode_0x0067_0x05=constant +hwmon_in.int_cons_0x0067_0x05=600 + +monitor_flag_hwmon_in.mode_0x0067_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0067_0x00=1 + + +# vol sensor 104 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0068_0x00=config +hwmon_in.src_0x0068_0x00=file +hwmon_in.int_cons_0x0068_0x00=0 +hwmon_in.frmt_0x0068_0x00=buf +hwmon_in.fpath_0x0068_0x00=/sys/bus/i2c/devices/109-0060/hwmon/ +hwmon_in.addr_0x0068_0x00=0 +hwmon_in.len_0x0068_0x00=8 +hwmon_in.str_cons_0x0068_0x00=in4_input +hwmon_in.int_extra1_0x0068_0x00=0 +hwmon_in.int_extra2_0x0068_0x00=0 + +hwmon_in.mode_0x0068_0x01=str_constant +hwmon_in.str_cons_0x0068_0x01=XDPE12284C_07_MAC_PT5_VDDC_0V8_V + +hwmon_in.mode_0x0068_0x02=str_constant +hwmon_in.str_cons_0x0068_0x02=XDPE12284C_07 + +hwmon_in.mode_0x0068_0x03=constant +hwmon_in.int_cons_0x0068_0x03=900 + +hwmon_in.mode_0x0068_0x05=constant +hwmon_in.int_cons_0x0068_0x05=600 + +monitor_flag_hwmon_in.mode_0x0068_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0068_0x00=1 + + +# vol sensor 105 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0069_0x00=config +hwmon_in.src_0x0069_0x00=file +hwmon_in.int_cons_0x0069_0x00=0 +hwmon_in.frmt_0x0069_0x00=buf +hwmon_in.fpath_0x0069_0x00=/sys/bus/i2c/devices/110-0060/hwmon/ +hwmon_in.addr_0x0069_0x00=0 +hwmon_in.len_0x0069_0x00=8 +hwmon_in.str_cons_0x0069_0x00=in3_input +hwmon_in.int_extra1_0x0069_0x00=0 +hwmon_in.int_extra2_0x0069_0x00=0 + +hwmon_in.mode_0x0069_0x01=str_constant +hwmon_in.str_cons_0x0069_0x01=XDPE12284C_08_MAC_PT6_VDDC_0V8_V + +hwmon_in.mode_0x0069_0x02=str_constant +hwmon_in.str_cons_0x0069_0x02=XDPE12284C_08 + +hwmon_in.mode_0x0069_0x03=constant +hwmon_in.int_cons_0x0069_0x03=900 + +hwmon_in.mode_0x0069_0x05=constant +hwmon_in.int_cons_0x0069_0x05=600 + +monitor_flag_hwmon_in.mode_0x0069_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0069_0x00=1 + + +# vol sensor 106 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x006a_0x00=config +hwmon_in.src_0x006a_0x00=file +hwmon_in.int_cons_0x006a_0x00=0 +hwmon_in.frmt_0x006a_0x00=buf +hwmon_in.fpath_0x006a_0x00=/sys/bus/i2c/devices/110-0060/hwmon/ +hwmon_in.addr_0x006a_0x00=0 +hwmon_in.len_0x006a_0x00=8 +hwmon_in.str_cons_0x006a_0x00=in4_input +hwmon_in.int_extra1_0x006a_0x00=0 +hwmon_in.int_extra2_0x006a_0x00=0 + +hwmon_in.mode_0x006a_0x01=str_constant +hwmon_in.str_cons_0x006a_0x01=XDPE12284C_08_MAC_PT7_VDDC_0V8_V + +hwmon_in.mode_0x006a_0x02=str_constant +hwmon_in.str_cons_0x006a_0x02=XDPE12284C_08 + +hwmon_in.mode_0x006a_0x03=constant +hwmon_in.int_cons_0x006a_0x03=900 + +hwmon_in.mode_0x006a_0x05=constant +hwmon_in.int_cons_0x006a_0x05=600 + +monitor_flag_hwmon_in.mode_0x006a_0x00=constant +monitor_flag_hwmon_in.int_cons_0x006a_0x00=1 + + +# vol sensor 107 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x006b_0x00=config +hwmon_in.src_0x006b_0x00=file +hwmon_in.int_cons_0x006b_0x00=0 +hwmon_in.frmt_0x006b_0x00=buf +hwmon_in.fpath_0x006b_0x00=/sys/bus/i2c/devices/111-0060/hwmon/ +hwmon_in.addr_0x006b_0x00=0 +hwmon_in.len_0x006b_0x00=8 +hwmon_in.str_cons_0x006b_0x00=in3_input +hwmon_in.int_extra1_0x006b_0x00=0 +hwmon_in.int_extra2_0x006b_0x00=0 + +hwmon_in.mode_0x006b_0x01=str_constant +hwmon_in.str_cons_0x006b_0x01=XDPE12284C_09_MAC_PB0_PB7_TRVDD_V + +hwmon_in.mode_0x006b_0x02=str_constant +hwmon_in.str_cons_0x006b_0x02=XDPE12284C_09 + +hwmon_in.mode_0x006b_0x03=constant +hwmon_in.int_cons_0x006b_0x03=880 + +hwmon_in.mode_0x006b_0x05=constant +hwmon_in.int_cons_0x006b_0x05=650 + +monitor_flag_hwmon_in.mode_0x006b_0x00=constant +monitor_flag_hwmon_in.int_cons_0x006b_0x00=1 + + +# vol sensor 108 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x006c_0x00=config +hwmon_in.src_0x006c_0x00=file +hwmon_in.int_cons_0x006c_0x00=0 +hwmon_in.frmt_0x006c_0x00=buf +hwmon_in.fpath_0x006c_0x00=/sys/bus/i2c/devices/111-0060/hwmon/ +hwmon_in.addr_0x006c_0x00=0 +hwmon_in.len_0x006c_0x00=8 +hwmon_in.str_cons_0x006c_0x00=in4_input +hwmon_in.int_extra1_0x006c_0x00=0 +hwmon_in.int_extra2_0x006c_0x00=0 + +hwmon_in.mode_0x006c_0x01=str_constant +hwmon_in.str_cons_0x006c_0x01=XDPE12284C_09_MAC_PB1_PB2_TRVDD_V + +hwmon_in.mode_0x006c_0x02=str_constant +hwmon_in.str_cons_0x006c_0x02=XDPE12284C_09 + +hwmon_in.mode_0x006c_0x03=constant +hwmon_in.int_cons_0x006c_0x03=880 + +hwmon_in.mode_0x006c_0x05=constant +hwmon_in.int_cons_0x006c_0x05=650 + +monitor_flag_hwmon_in.mode_0x006c_0x00=constant +monitor_flag_hwmon_in.int_cons_0x006c_0x00=1 + + +# vol sensor 109 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x006d_0x00=config +hwmon_in.src_0x006d_0x00=file +hwmon_in.int_cons_0x006d_0x00=0 +hwmon_in.frmt_0x006d_0x00=buf +hwmon_in.fpath_0x006d_0x00=/sys/bus/i2c/devices/112-0060/hwmon/ +hwmon_in.addr_0x006d_0x00=0 +hwmon_in.len_0x006d_0x00=8 +hwmon_in.str_cons_0x006d_0x00=in3_input +hwmon_in.int_extra1_0x006d_0x00=0 +hwmon_in.int_extra2_0x006d_0x00=0 + +hwmon_in.mode_0x006d_0x01=str_constant +hwmon_in.str_cons_0x006d_0x01=XDPE12284C_10_MAC_PB3_PB4_TRVDD_V + +hwmon_in.mode_0x006d_0x02=str_constant +hwmon_in.str_cons_0x006d_0x02=XDPE12284C_10 + +hwmon_in.mode_0x006d_0x03=constant +hwmon_in.int_cons_0x006d_0x03=880 + +hwmon_in.mode_0x006d_0x05=constant +hwmon_in.int_cons_0x006d_0x05=650 + +monitor_flag_hwmon_in.mode_0x006d_0x00=constant +monitor_flag_hwmon_in.int_cons_0x006d_0x00=1 + + +# vol sensor 110 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x006e_0x00=config +hwmon_in.src_0x006e_0x00=file +hwmon_in.int_cons_0x006e_0x00=0 +hwmon_in.frmt_0x006e_0x00=buf +hwmon_in.fpath_0x006e_0x00=/sys/bus/i2c/devices/112-0060/hwmon/ +hwmon_in.addr_0x006e_0x00=0 +hwmon_in.len_0x006e_0x00=8 +hwmon_in.str_cons_0x006e_0x00=in4_input +hwmon_in.int_extra1_0x006e_0x00=0 +hwmon_in.int_extra2_0x006e_0x00=0 + +hwmon_in.mode_0x006e_0x01=str_constant +hwmon_in.str_cons_0x006e_0x01=XDPE12284C_10_MAC_PB5_PB6_TRVDD_V + +hwmon_in.mode_0x006e_0x02=str_constant +hwmon_in.str_cons_0x006e_0x02=XDPE12284C_10 + +hwmon_in.mode_0x006e_0x03=constant +hwmon_in.int_cons_0x006e_0x03=880 + +hwmon_in.mode_0x006e_0x05=constant +hwmon_in.int_cons_0x006e_0x05=650 + +monitor_flag_hwmon_in.mode_0x006e_0x00=constant +monitor_flag_hwmon_in.int_cons_0x006e_0x00=1 + + +# vol sensor 111 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x006f_0x00=config +hwmon_in.src_0x006f_0x00=file +hwmon_in.int_cons_0x006f_0x00=0 +hwmon_in.frmt_0x006f_0x00=buf +hwmon_in.fpath_0x006f_0x00=/sys/bus/i2c/devices/113-0060/hwmon/ +hwmon_in.addr_0x006f_0x00=0 +hwmon_in.len_0x006f_0x00=8 +hwmon_in.str_cons_0x006f_0x00=in3_input +hwmon_in.int_extra1_0x006f_0x00=0 +hwmon_in.int_extra2_0x006f_0x00=0 + +hwmon_in.mode_0x006f_0x01=str_constant +hwmon_in.str_cons_0x006f_0x01=XDPE12284C_11_MAC_TRVDD0_0V9_V + +hwmon_in.mode_0x006f_0x02=str_constant +hwmon_in.str_cons_0x006f_0x02=XDPE12284C_11 + +hwmon_in.mode_0x006f_0x03=constant +hwmon_in.int_cons_0x006f_0x03=990 + +hwmon_in.mode_0x006f_0x05=constant +hwmon_in.int_cons_0x006f_0x05=810 + +monitor_flag_hwmon_in.mode_0x006f_0x00=constant +monitor_flag_hwmon_in.int_cons_0x006f_0x00=1 + + +# vol sensor 112 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0070_0x00=config +hwmon_in.src_0x0070_0x00=file +hwmon_in.int_cons_0x0070_0x00=0 +hwmon_in.frmt_0x0070_0x00=buf +hwmon_in.fpath_0x0070_0x00=/sys/bus/i2c/devices/113-0060/hwmon/ +hwmon_in.addr_0x0070_0x00=0 +hwmon_in.len_0x0070_0x00=8 +hwmon_in.str_cons_0x0070_0x00=in4_input +hwmon_in.int_extra1_0x0070_0x00=0 +hwmon_in.int_extra2_0x0070_0x00=0 + +hwmon_in.mode_0x0070_0x01=str_constant +hwmon_in.str_cons_0x0070_0x01=XDPE12284C_11_MAC_TRVDD0_0V75_V + +hwmon_in.mode_0x0070_0x02=str_constant +hwmon_in.str_cons_0x0070_0x02=XDPE12284C_11 + +hwmon_in.mode_0x0070_0x03=constant +hwmon_in.int_cons_0x0070_0x03=825 + +hwmon_in.mode_0x0070_0x05=constant +hwmon_in.int_cons_0x0070_0x05=675 + +monitor_flag_hwmon_in.mode_0x0070_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0070_0x00=1 + + +# vol sensor 113 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0071_0x00=config +hwmon_in.src_0x0071_0x00=file +hwmon_in.int_cons_0x0071_0x00=0 +hwmon_in.frmt_0x0071_0x00=buf +hwmon_in.fpath_0x0071_0x00=/sys/bus/i2c/devices/114-0060/hwmon/ +hwmon_in.addr_0x0071_0x00=0 +hwmon_in.len_0x0071_0x00=8 +hwmon_in.str_cons_0x0071_0x00=in3_input +hwmon_in.int_extra1_0x0071_0x00=0 +hwmon_in.int_extra2_0x0071_0x00=0 + +hwmon_in.mode_0x0071_0x01=str_constant +hwmon_in.str_cons_0x0071_0x01=XDPE12284C_12_MAC_TRVDD1_0V9_V + +hwmon_in.mode_0x0071_0x02=str_constant +hwmon_in.str_cons_0x0071_0x02=XDPE12284C_12 + +hwmon_in.mode_0x0071_0x03=constant +hwmon_in.int_cons_0x0071_0x03=990 + +hwmon_in.mode_0x0071_0x05=constant +hwmon_in.int_cons_0x0071_0x05=810 + +monitor_flag_hwmon_in.mode_0x0071_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0071_0x00=1 + + +# vol sensor 114 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0072_0x00=config +hwmon_in.src_0x0072_0x00=file +hwmon_in.int_cons_0x0072_0x00=0 +hwmon_in.frmt_0x0072_0x00=buf +hwmon_in.fpath_0x0072_0x00=/sys/bus/i2c/devices/114-0060/hwmon/ +hwmon_in.addr_0x0072_0x00=0 +hwmon_in.len_0x0072_0x00=8 +hwmon_in.str_cons_0x0072_0x00=in4_input +hwmon_in.int_extra1_0x0072_0x00=0 +hwmon_in.int_extra2_0x0072_0x00=0 + +hwmon_in.mode_0x0072_0x01=str_constant +hwmon_in.str_cons_0x0072_0x01=XDPE12284C_12_MAC_TRVDD1_0V75_V + +hwmon_in.mode_0x0072_0x02=str_constant +hwmon_in.str_cons_0x0072_0x02=XDPE12284C_12 + +hwmon_in.mode_0x0072_0x03=constant +hwmon_in.int_cons_0x0072_0x03=825 + +hwmon_in.mode_0x0072_0x05=constant +hwmon_in.int_cons_0x0072_0x05=675 + +monitor_flag_hwmon_in.mode_0x0072_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0072_0x00=1 + + +# vol sensor 115 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0073_0x00=config +hwmon_in.src_0x0073_0x00=file +hwmon_in.int_cons_0x0073_0x00=3 +hwmon_in.frmt_0x0073_0x00=buf +hwmon_in.fpath_0x0073_0x00=/sys/bus/i2c/devices/115-0060/hwmon/ +hwmon_in.addr_0x0073_0x00=0 +hwmon_in.len_0x0073_0x00=8 +hwmon_in.str_cons_0x0073_0x00=in3_input +hwmon_in.int_extra1_0x0073_0x00=1500 +hwmon_in.int_extra2_0x0073_0x00=0 + +hwmon_in.mode_0x0073_0x01=str_constant +hwmon_in.str_cons_0x0073_0x01=XDPE12284C_13_OSFP_VDD3V3_A1_V + +hwmon_in.mode_0x0073_0x02=str_constant +hwmon_in.str_cons_0x0073_0x02=XDPE12284C_13 + +hwmon_in.mode_0x0073_0x03=constant +hwmon_in.int_cons_0x0073_0x03=3630 + +hwmon_in.mode_0x0073_0x05=constant +hwmon_in.int_cons_0x0073_0x05=2970 + +monitor_flag_hwmon_in.mode_0x0073_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0073_0x00=1 + + +# vol sensor 116 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0074_0x00=config +hwmon_in.src_0x0074_0x00=file +hwmon_in.int_cons_0x0074_0x00=3 +hwmon_in.frmt_0x0074_0x00=buf +hwmon_in.fpath_0x0074_0x00=/sys/bus/i2c/devices/115-0060/hwmon/ +hwmon_in.addr_0x0074_0x00=0 +hwmon_in.len_0x0074_0x00=8 +hwmon_in.str_cons_0x0074_0x00=in4_input +hwmon_in.int_extra1_0x0074_0x00=1500 +hwmon_in.int_extra2_0x0074_0x00=0 + +hwmon_in.mode_0x0074_0x01=str_constant +hwmon_in.str_cons_0x0074_0x01=XDPE12284C_13_OSFP_VDD3V3_B1_V + +hwmon_in.mode_0x0074_0x02=str_constant +hwmon_in.str_cons_0x0074_0x02=XDPE12284C_13 + +hwmon_in.mode_0x0074_0x03=constant +hwmon_in.int_cons_0x0074_0x03=3630 + +hwmon_in.mode_0x0074_0x05=constant +hwmon_in.int_cons_0x0074_0x05=2970 + +monitor_flag_hwmon_in.mode_0x0074_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0074_0x00=1 + + +# vol sensor 117 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0075_0x00=config +hwmon_in.src_0x0075_0x00=file +hwmon_in.int_cons_0x0075_0x00=3 +hwmon_in.frmt_0x0075_0x00=buf +hwmon_in.fpath_0x0075_0x00=/sys/bus/i2c/devices/116-0060/hwmon/ +hwmon_in.addr_0x0075_0x00=0 +hwmon_in.len_0x0075_0x00=8 +hwmon_in.str_cons_0x0075_0x00=in3_input +hwmon_in.int_extra1_0x0075_0x00=1500 +hwmon_in.int_extra2_0x0075_0x00=0 + +hwmon_in.mode_0x0075_0x01=str_constant +hwmon_in.str_cons_0x0075_0x01=XDPE12284C_14_OSFP_VDD3V3_A2_V + +hwmon_in.mode_0x0075_0x02=str_constant +hwmon_in.str_cons_0x0075_0x02=XDPE12284C_14 + +hwmon_in.mode_0x0075_0x03=constant +hwmon_in.int_cons_0x0075_0x03=3630 + +hwmon_in.mode_0x0075_0x05=constant +hwmon_in.int_cons_0x0075_0x05=2970 + +monitor_flag_hwmon_in.mode_0x0075_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0075_0x00=1 + + +# vol sensor 118 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0076_0x00=config +hwmon_in.src_0x0076_0x00=file +hwmon_in.int_cons_0x0076_0x00=3 +hwmon_in.frmt_0x0076_0x00=buf +hwmon_in.fpath_0x0076_0x00=/sys/bus/i2c/devices/116-0060/hwmon/ +hwmon_in.addr_0x0076_0x00=0 +hwmon_in.len_0x0076_0x00=8 +hwmon_in.str_cons_0x0076_0x00=in4_input +hwmon_in.int_extra1_0x0076_0x00=1500 +hwmon_in.int_extra2_0x0076_0x00=0 + +hwmon_in.mode_0x0076_0x01=str_constant +hwmon_in.str_cons_0x0076_0x01=XDPE12284C_14_OSFP_VDD3V3_B2_V + +hwmon_in.mode_0x0076_0x02=str_constant +hwmon_in.str_cons_0x0076_0x02=XDPE12284C_14 + +hwmon_in.mode_0x0076_0x03=constant +hwmon_in.int_cons_0x0076_0x03=3630 + +hwmon_in.mode_0x0076_0x05=constant +hwmon_in.int_cons_0x0076_0x05=2970 + +monitor_flag_hwmon_in.mode_0x0076_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0076_0x00=1 + + +# vol sensor 119 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0077_0x00=config +hwmon_in.src_0x0077_0x00=file +hwmon_in.int_cons_0x0077_0x00=3 +hwmon_in.frmt_0x0077_0x00=buf +hwmon_in.fpath_0x0077_0x00=/sys/bus/i2c/devices/117-0060/hwmon/ +hwmon_in.addr_0x0077_0x00=0 +hwmon_in.len_0x0077_0x00=8 +hwmon_in.str_cons_0x0077_0x00=in3_input +hwmon_in.int_extra1_0x0077_0x00=1500 +hwmon_in.int_extra2_0x0077_0x00=0 + +hwmon_in.mode_0x0077_0x01=str_constant +hwmon_in.str_cons_0x0077_0x01=XDPE12284C_15_OSFP_VDD3V3_A3_V + +hwmon_in.mode_0x0077_0x02=str_constant +hwmon_in.str_cons_0x0077_0x02=XDPE12284C_15 + +hwmon_in.mode_0x0077_0x03=constant +hwmon_in.int_cons_0x0077_0x03=3630 + +hwmon_in.mode_0x0077_0x05=constant +hwmon_in.int_cons_0x0077_0x05=2970 + +monitor_flag_hwmon_in.mode_0x0077_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0077_0x00=1 + + +# vol sensor 120 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0078_0x00=config +hwmon_in.src_0x0078_0x00=file +hwmon_in.int_cons_0x0078_0x00=3 +hwmon_in.frmt_0x0078_0x00=buf +hwmon_in.fpath_0x0078_0x00=/sys/bus/i2c/devices/117-0060/hwmon/ +hwmon_in.addr_0x0078_0x00=0 +hwmon_in.len_0x0078_0x00=8 +hwmon_in.str_cons_0x0078_0x00=in4_input +hwmon_in.int_extra1_0x0078_0x00=1500 +hwmon_in.int_extra2_0x0078_0x00=0 + +hwmon_in.mode_0x0078_0x01=str_constant +hwmon_in.str_cons_0x0078_0x01=XDPE12284C_15_OSFP_VDD3V3_B3_V + +hwmon_in.mode_0x0078_0x02=str_constant +hwmon_in.str_cons_0x0078_0x02=XDPE12284C_15 + +hwmon_in.mode_0x0078_0x03=constant +hwmon_in.int_cons_0x0078_0x03=3630 + +hwmon_in.mode_0x0078_0x05=constant +hwmon_in.int_cons_0x0078_0x05=2970 + +monitor_flag_hwmon_in.mode_0x0078_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0078_0x00=1 + + +# vol sensor 121 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0079_0x00=config +hwmon_in.src_0x0079_0x00=file +hwmon_in.int_cons_0x0079_0x00=3 +hwmon_in.frmt_0x0079_0x00=buf +hwmon_in.fpath_0x0079_0x00=/sys/bus/i2c/devices/118-0060/hwmon/ +hwmon_in.addr_0x0079_0x00=0 +hwmon_in.len_0x0079_0x00=8 +hwmon_in.str_cons_0x0079_0x00=in3_input +hwmon_in.int_extra1_0x0079_0x00=1500 +hwmon_in.int_extra2_0x0079_0x00=0 + +hwmon_in.mode_0x0079_0x01=str_constant +hwmon_in.str_cons_0x0079_0x01=XDPE12284C_16_OSFP_VDD3V3_A4_V + +hwmon_in.mode_0x0079_0x02=str_constant +hwmon_in.str_cons_0x0079_0x02=XDPE12284C_16 + +hwmon_in.mode_0x0079_0x03=constant +hwmon_in.int_cons_0x0079_0x03=3630 + +hwmon_in.mode_0x0079_0x05=constant +hwmon_in.int_cons_0x0079_0x05=2970 + +monitor_flag_hwmon_in.mode_0x0079_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0079_0x00=1 + + +# vol sensor 122 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x007a_0x00=config +hwmon_in.src_0x007a_0x00=file +hwmon_in.int_cons_0x007a_0x00=3 +hwmon_in.frmt_0x007a_0x00=buf +hwmon_in.fpath_0x007a_0x00=/sys/bus/i2c/devices/118-0060/hwmon/ +hwmon_in.addr_0x007a_0x00=0 +hwmon_in.len_0x007a_0x00=8 +hwmon_in.str_cons_0x007a_0x00=in4_input +hwmon_in.int_extra1_0x007a_0x00=1500 +hwmon_in.int_extra2_0x007a_0x00=0 + +hwmon_in.mode_0x007a_0x01=str_constant +hwmon_in.str_cons_0x007a_0x01=XDPE12284C_16_OSFP_VDD3V3_B4_V + +hwmon_in.mode_0x007a_0x02=str_constant +hwmon_in.str_cons_0x007a_0x02=XDPE12284C_16 + +hwmon_in.mode_0x007a_0x03=constant +hwmon_in.int_cons_0x007a_0x03=3630 + +hwmon_in.mode_0x007a_0x05=constant +hwmon_in.int_cons_0x007a_0x05=2970 + +monitor_flag_hwmon_in.mode_0x007a_0x00=constant +monitor_flag_hwmon_in.int_cons_0x007a_0x00=1 + + +# vol sensor 123 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x007b_0x00=config +hwmon_in.src_0x007b_0x00=file +hwmon_in.int_cons_0x007b_0x00=3 +hwmon_in.frmt_0x007b_0x00=buf +hwmon_in.fpath_0x007b_0x00=/sys/bus/i2c/devices/119-0060/hwmon/ +hwmon_in.addr_0x007b_0x00=0 +hwmon_in.len_0x007b_0x00=8 +hwmon_in.str_cons_0x007b_0x00=in3_input +hwmon_in.int_extra1_0x007b_0x00=1500 +hwmon_in.int_extra2_0x007b_0x00=0 + +hwmon_in.mode_0x007b_0x01=str_constant +hwmon_in.str_cons_0x007b_0x01=XDPE12284C_17_OSFP_VDD3V3_A5_V + +hwmon_in.mode_0x007b_0x02=str_constant +hwmon_in.str_cons_0x007b_0x02=XDPE12284C_17 + +hwmon_in.mode_0x007b_0x03=constant +hwmon_in.int_cons_0x007b_0x03=3630 + +hwmon_in.mode_0x007b_0x05=constant +hwmon_in.int_cons_0x007b_0x05=2970 + +monitor_flag_hwmon_in.mode_0x007b_0x00=constant +monitor_flag_hwmon_in.int_cons_0x007b_0x00=1 + + +# vol sensor 124 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x007c_0x00=config +hwmon_in.src_0x007c_0x00=file +hwmon_in.int_cons_0x007c_0x00=3 +hwmon_in.frmt_0x007c_0x00=buf +hwmon_in.fpath_0x007c_0x00=/sys/bus/i2c/devices/119-0060/hwmon/ +hwmon_in.addr_0x007c_0x00=0 +hwmon_in.len_0x007c_0x00=8 +hwmon_in.str_cons_0x007c_0x00=in4_input +hwmon_in.int_extra1_0x007c_0x00=1500 +hwmon_in.int_extra2_0x007c_0x00=0 + +hwmon_in.mode_0x007c_0x01=str_constant +hwmon_in.str_cons_0x007c_0x01=XDPE12284C_17_OSFP_VDD3V3_B5_V + +hwmon_in.mode_0x007c_0x02=str_constant +hwmon_in.str_cons_0x007c_0x02=XDPE12284C_17 + +hwmon_in.mode_0x007c_0x03=constant +hwmon_in.int_cons_0x007c_0x03=3630 + +hwmon_in.mode_0x007c_0x05=constant +hwmon_in.int_cons_0x007c_0x05=2970 + +monitor_flag_hwmon_in.mode_0x007c_0x00=constant +monitor_flag_hwmon_in.int_cons_0x007c_0x00=1 + + +# vol sensor 125 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x007d_0x00=config +hwmon_in.src_0x007d_0x00=file +hwmon_in.int_cons_0x007d_0x00=3 +hwmon_in.frmt_0x007d_0x00=buf +hwmon_in.fpath_0x007d_0x00=/sys/bus/i2c/devices/120-0060/hwmon/ +hwmon_in.addr_0x007d_0x00=0 +hwmon_in.len_0x007d_0x00=8 +hwmon_in.str_cons_0x007d_0x00=in3_input +hwmon_in.int_extra1_0x007d_0x00=1500 +hwmon_in.int_extra2_0x007d_0x00=0 + +hwmon_in.mode_0x007d_0x01=str_constant +hwmon_in.str_cons_0x007d_0x01=XDPE12284C_18_OSFP_VDD3V3_A6_V + +hwmon_in.mode_0x007d_0x02=str_constant +hwmon_in.str_cons_0x007d_0x02=XDPE12284C_18 + +hwmon_in.mode_0x007d_0x03=constant +hwmon_in.int_cons_0x007d_0x03=3630 + +hwmon_in.mode_0x007d_0x05=constant +hwmon_in.int_cons_0x007d_0x05=2970 + +monitor_flag_hwmon_in.mode_0x007d_0x00=constant +monitor_flag_hwmon_in.int_cons_0x007d_0x00=1 + + +# vol sensor 126 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x007e_0x00=config +hwmon_in.src_0x007e_0x00=file +hwmon_in.int_cons_0x007e_0x00=3 +hwmon_in.frmt_0x007e_0x00=buf +hwmon_in.fpath_0x007e_0x00=/sys/bus/i2c/devices/120-0060/hwmon/ +hwmon_in.addr_0x007e_0x00=0 +hwmon_in.len_0x007e_0x00=8 +hwmon_in.str_cons_0x007e_0x00=in4_input +hwmon_in.int_extra1_0x007e_0x00=1500 +hwmon_in.int_extra2_0x007e_0x00=0 + +hwmon_in.mode_0x007e_0x01=str_constant +hwmon_in.str_cons_0x007e_0x01=XDPE12284C_18_OSFP_VDD3V3_B6_V + +hwmon_in.mode_0x007e_0x02=str_constant +hwmon_in.str_cons_0x007e_0x02=XDPE12284C_18 + +hwmon_in.mode_0x007e_0x03=constant +hwmon_in.int_cons_0x007e_0x03=3630 + +hwmon_in.mode_0x007e_0x05=constant +hwmon_in.int_cons_0x007e_0x05=2970 + +monitor_flag_hwmon_in.mode_0x007e_0x00=constant +monitor_flag_hwmon_in.int_cons_0x007e_0x00=1 + + +# vol sensor 127 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x007f_0x00=config +hwmon_in.src_0x007f_0x00=file +hwmon_in.int_cons_0x007f_0x00=3 +hwmon_in.frmt_0x007f_0x00=buf +hwmon_in.fpath_0x007f_0x00=/sys/bus/i2c/devices/121-0060/hwmon/ +hwmon_in.addr_0x007f_0x00=0 +hwmon_in.len_0x007f_0x00=8 +hwmon_in.str_cons_0x007f_0x00=in3_input +hwmon_in.int_extra1_0x007f_0x00=1500 +hwmon_in.int_extra2_0x007f_0x00=0 + +hwmon_in.mode_0x007f_0x01=str_constant +hwmon_in.str_cons_0x007f_0x01=XDPE12284C_19_OSFP_VDD3V3_A7_V + +hwmon_in.mode_0x007f_0x02=str_constant +hwmon_in.str_cons_0x007f_0x02=XDPE12284C_19 + +hwmon_in.mode_0x007f_0x03=constant +hwmon_in.int_cons_0x007f_0x03=3630 + +hwmon_in.mode_0x007f_0x05=constant +hwmon_in.int_cons_0x007f_0x05=2970 + +monitor_flag_hwmon_in.mode_0x007f_0x00=constant +monitor_flag_hwmon_in.int_cons_0x007f_0x00=1 + + +# vol sensor 128 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0080_0x00=config +hwmon_in.src_0x0080_0x00=file +hwmon_in.int_cons_0x0080_0x00=3 +hwmon_in.frmt_0x0080_0x00=buf +hwmon_in.fpath_0x0080_0x00=/sys/bus/i2c/devices/121-0060/hwmon/ +hwmon_in.addr_0x0080_0x00=0 +hwmon_in.len_0x0080_0x00=8 +hwmon_in.str_cons_0x0080_0x00=in4_input +hwmon_in.int_extra1_0x0080_0x00=1500 +hwmon_in.int_extra2_0x0080_0x00=0 + +hwmon_in.mode_0x0080_0x01=str_constant +hwmon_in.str_cons_0x0080_0x01=XDPE12284C_19_OSFP_VDD3V3_B7_V + +hwmon_in.mode_0x0080_0x02=str_constant +hwmon_in.str_cons_0x0080_0x02=XDPE12284C_19 + +hwmon_in.mode_0x0080_0x03=constant +hwmon_in.int_cons_0x0080_0x03=3630 + +hwmon_in.mode_0x0080_0x05=constant +hwmon_in.int_cons_0x0080_0x05=2970 + +monitor_flag_hwmon_in.mode_0x0080_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0080_0x00=1 + + +# vol sensor 129 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0081_0x00=config +hwmon_in.src_0x0081_0x00=file +hwmon_in.int_cons_0x0081_0x00=3 +hwmon_in.frmt_0x0081_0x00=buf +hwmon_in.fpath_0x0081_0x00=/sys/bus/i2c/devices/122-0060/hwmon/ +hwmon_in.addr_0x0081_0x00=0 +hwmon_in.len_0x0081_0x00=8 +hwmon_in.str_cons_0x0081_0x00=in3_input +hwmon_in.int_extra1_0x0081_0x00=1500 +hwmon_in.int_extra2_0x0081_0x00=0 + +hwmon_in.mode_0x0081_0x01=str_constant +hwmon_in.str_cons_0x0081_0x01=XDPE12284C_20_OSFP_VDD3V3_A8_V + +hwmon_in.mode_0x0081_0x02=str_constant +hwmon_in.str_cons_0x0081_0x02=XDPE12284C_20 + +hwmon_in.mode_0x0081_0x03=constant +hwmon_in.int_cons_0x0081_0x03=3630 + +hwmon_in.mode_0x0081_0x05=constant +hwmon_in.int_cons_0x0081_0x05=2970 + +monitor_flag_hwmon_in.mode_0x0081_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0081_0x00=1 + + +# vol sensor 130 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0082_0x00=config +hwmon_in.src_0x0082_0x00=file +hwmon_in.int_cons_0x0082_0x00=3 +hwmon_in.frmt_0x0082_0x00=buf +hwmon_in.fpath_0x0082_0x00=/sys/bus/i2c/devices/122-0060/hwmon/ +hwmon_in.addr_0x0082_0x00=0 +hwmon_in.len_0x0082_0x00=8 +hwmon_in.str_cons_0x0082_0x00=in4_input +hwmon_in.int_extra1_0x0082_0x00=1500 +hwmon_in.int_extra2_0x0082_0x00=0 + +hwmon_in.mode_0x0082_0x01=str_constant +hwmon_in.str_cons_0x0082_0x01=XDPE12284C_20_OSFP_VDD3V3_B8_V + +hwmon_in.mode_0x0082_0x02=str_constant +hwmon_in.str_cons_0x0082_0x02=XDPE12284C_20 + +hwmon_in.mode_0x0082_0x03=constant +hwmon_in.int_cons_0x0082_0x03=3630 + +hwmon_in.mode_0x0082_0x05=constant +hwmon_in.int_cons_0x0082_0x05=2970 + +monitor_flag_hwmon_in.mode_0x0082_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0082_0x00=1 + + +# vol sensor 131 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0083_0x00=config +hwmon_in.src_0x0083_0x00=logic_file +hwmon_in.int_cons_0x0083_0x00=0 +hwmon_in.frmt_0x0083_0x00=num_bytes +hwmon_in.fpath_0x0083_0x00=/dev/cpld4 +hwmon_in.addr_0x0083_0x00=0xe2 +hwmon_in.len_0x0083_0x00=2 +hwmon_in.int_extra1_0x0083_0x00=0 +hwmon_in.int_extra2_0x0083_0x00=2000 +hwmon_in.int_extra3_0x0083_0x00=1 + +hwmon_in.mode_0x0083_0x01=str_constant +hwmon_in.str_cons_0x0083_0x01=CPLD_01_VDD_STB_3V3_V + +hwmon_in.mode_0x0083_0x02=str_constant +hwmon_in.str_cons_0x0083_0x02=CPLD_01 + +hwmon_in.mode_0x0083_0x03=constant +hwmon_in.int_cons_0x0083_0x03=3630 + +hwmon_in.mode_0x0083_0x05=constant +hwmon_in.int_cons_0x0083_0x05=2970 + +monitor_flag_hwmon_in.mode_0x0083_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0083_0x00=1 + + +# vol sensor 132 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0084_0x00=config +hwmon_in.src_0x0084_0x00=logic_file +hwmon_in.int_cons_0x0084_0x00=0 +hwmon_in.frmt_0x0084_0x00=num_bytes +hwmon_in.fpath_0x0084_0x00=/dev/cpld4 +hwmon_in.addr_0x0084_0x00=0xe4 +hwmon_in.len_0x0084_0x00=2 +hwmon_in.int_extra1_0x0084_0x00=0 +hwmon_in.int_extra2_0x0084_0x00=1000 +hwmon_in.int_extra3_0x0084_0x00=1 + +hwmon_in.mode_0x0084_0x01=str_constant +hwmon_in.str_cons_0x0084_0x01=CPLD_01_PB_VDD_V + +hwmon_in.mode_0x0084_0x02=str_constant +hwmon_in.str_cons_0x0084_0x02=CPLD_01 + +hwmon_in.mode_0x0084_0x03=constant +hwmon_in.int_cons_0x0084_0x03=2290 + +hwmon_in.mode_0x0084_0x05=constant +hwmon_in.int_cons_0x0084_0x05=1860 + +monitor_flag_hwmon_in.mode_0x0084_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0084_0x00=1 + + +# vol sensor 133 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0085_0x00=config +hwmon_in.src_0x0085_0x00=logic_file +hwmon_in.int_cons_0x0085_0x00=0 +hwmon_in.frmt_0x0085_0x00=num_bytes +hwmon_in.fpath_0x0085_0x00=/dev/cpld4 +hwmon_in.addr_0x0085_0x00=0xc4 +hwmon_in.len_0x0085_0x00=2 +hwmon_in.int_extra1_0x0085_0x00=0 +hwmon_in.int_extra2_0x0085_0x00=2000 +hwmon_in.int_extra3_0x0085_0x00=1 + +hwmon_in.mode_0x0085_0x01=str_constant +hwmon_in.str_cons_0x0085_0x01=CPLD_01_CLK_VDD_3V8V + +hwmon_in.mode_0x0085_0x02=str_constant +hwmon_in.str_cons_0x0085_0x02=CPLD_01 + +hwmon_in.mode_0x0085_0x03=constant +hwmon_in.int_cons_0x0085_0x03=4180 + +hwmon_in.mode_0x0085_0x05=constant +hwmon_in.int_cons_0x0085_0x05=3420 + +monitor_flag_hwmon_in.mode_0x0085_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0085_0x00=1 + + +# vol sensor 134 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0086_0x00=config +hwmon_in.src_0x0086_0x00=logic_file +hwmon_in.int_cons_0x0086_0x00=0 +hwmon_in.frmt_0x0086_0x00=num_bytes +hwmon_in.fpath_0x0086_0x00=/dev/cpld4 +hwmon_in.addr_0x0086_0x00=0xc6 +hwmon_in.len_0x0086_0x00=2 +hwmon_in.int_extra1_0x0086_0x00=0 +hwmon_in.int_extra2_0x0086_0x00=2000 +hwmon_in.int_extra3_0x0086_0x00=1 + +hwmon_in.mode_0x0086_0x01=str_constant +hwmon_in.str_cons_0x0086_0x01=CPLD_01_CLK_VDD_2V3_V + +hwmon_in.mode_0x0086_0x02=str_constant +hwmon_in.str_cons_0x0086_0x02=CPLD_01 + +hwmon_in.mode_0x0086_0x03=constant +hwmon_in.int_cons_0x0086_0x03=2530 + +hwmon_in.mode_0x0086_0x05=constant +hwmon_in.int_cons_0x0086_0x05=2070 + +monitor_flag_hwmon_in.mode_0x0086_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0086_0x00=1 + + +# vol sensor 135 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0087_0x00=config +hwmon_in.src_0x0087_0x00=logic_file +hwmon_in.int_cons_0x0087_0x00=0 +hwmon_in.frmt_0x0087_0x00=num_bytes +hwmon_in.fpath_0x0087_0x00=/dev/cpld4 +hwmon_in.addr_0x0087_0x00=0x60 +hwmon_in.len_0x0087_0x00=2 +hwmon_in.int_extra1_0x0087_0x00=0 +hwmon_in.int_extra2_0x0087_0x00=2000 +hwmon_in.int_extra3_0x0087_0x00=1 + +hwmon_in.mode_0x0087_0x01=str_constant +hwmon_in.str_cons_0x0087_0x01=CPLD_01_OSFP_VDD3V3_A1_V + +hwmon_in.mode_0x0087_0x02=str_constant +hwmon_in.str_cons_0x0087_0x02=CPLD_01 + +hwmon_in.mode_0x0087_0x03=constant +hwmon_in.int_cons_0x0087_0x03=3630 + +hwmon_in.mode_0x0087_0x05=constant +hwmon_in.int_cons_0x0087_0x05=2970 + +monitor_flag_hwmon_in.mode_0x0087_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0087_0x00=1 + + +# vol sensor 136 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0088_0x00=config +hwmon_in.src_0x0088_0x00=logic_file +hwmon_in.int_cons_0x0088_0x00=0 +hwmon_in.frmt_0x0088_0x00=num_bytes +hwmon_in.fpath_0x0088_0x00=/dev/cpld4 +hwmon_in.addr_0x0088_0x00=0x62 +hwmon_in.len_0x0088_0x00=2 +hwmon_in.int_extra1_0x0088_0x00=0 +hwmon_in.int_extra2_0x0088_0x00=2000 +hwmon_in.int_extra3_0x0088_0x00=1 + +hwmon_in.mode_0x0088_0x01=str_constant +hwmon_in.str_cons_0x0088_0x01=CPLD_01_OSFP_VDD3V3_B1_V + +hwmon_in.mode_0x0088_0x02=str_constant +hwmon_in.str_cons_0x0088_0x02=CPLD_01 + +hwmon_in.mode_0x0088_0x03=constant +hwmon_in.int_cons_0x0088_0x03=3630 + +hwmon_in.mode_0x0088_0x05=constant +hwmon_in.int_cons_0x0088_0x05=2970 + +monitor_flag_hwmon_in.mode_0x0088_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0088_0x00=1 + + +# vol sensor 137 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0089_0x00=config +hwmon_in.src_0x0089_0x00=logic_file +hwmon_in.int_cons_0x0089_0x00=0 +hwmon_in.frmt_0x0089_0x00=num_bytes +hwmon_in.fpath_0x0089_0x00=/dev/cpld4 +hwmon_in.addr_0x0089_0x00=0x64 +hwmon_in.len_0x0089_0x00=2 +hwmon_in.int_extra1_0x0089_0x00=0 +hwmon_in.int_extra2_0x0089_0x00=2000 +hwmon_in.int_extra3_0x0089_0x00=1 + +hwmon_in.mode_0x0089_0x01=str_constant +hwmon_in.str_cons_0x0089_0x01=CPLD_01_OSFP_VDD3V3_A2_V + +hwmon_in.mode_0x0089_0x02=str_constant +hwmon_in.str_cons_0x0089_0x02=CPLD_01 + +hwmon_in.mode_0x0089_0x03=constant +hwmon_in.int_cons_0x0089_0x03=3630 + +hwmon_in.mode_0x0089_0x05=constant +hwmon_in.int_cons_0x0089_0x05=2970 + +monitor_flag_hwmon_in.mode_0x0089_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0089_0x00=1 + + +# vol sensor 138 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x008a_0x00=config +hwmon_in.src_0x008a_0x00=logic_file +hwmon_in.int_cons_0x008a_0x00=0 +hwmon_in.frmt_0x008a_0x00=num_bytes +hwmon_in.fpath_0x008a_0x00=/dev/cpld4 +hwmon_in.addr_0x008a_0x00=0x66 +hwmon_in.len_0x008a_0x00=2 +hwmon_in.int_extra1_0x008a_0x00=0 +hwmon_in.int_extra2_0x008a_0x00=2000 +hwmon_in.int_extra3_0x008a_0x00=1 + +hwmon_in.mode_0x008a_0x01=str_constant +hwmon_in.str_cons_0x008a_0x01=CPLD_01_OSFP_VDD3V3_B2_V + +hwmon_in.mode_0x008a_0x02=str_constant +hwmon_in.str_cons_0x008a_0x02=CPLD_01 + +hwmon_in.mode_0x008a_0x03=constant +hwmon_in.int_cons_0x008a_0x03=3630 + +hwmon_in.mode_0x008a_0x05=constant +hwmon_in.int_cons_0x008a_0x05=2970 + +monitor_flag_hwmon_in.mode_0x008a_0x00=constant +monitor_flag_hwmon_in.int_cons_0x008a_0x00=1 + + +# vol sensor 139 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x008b_0x00=config +hwmon_in.src_0x008b_0x00=logic_file +hwmon_in.int_cons_0x008b_0x00=0 +hwmon_in.frmt_0x008b_0x00=num_bytes +hwmon_in.fpath_0x008b_0x00=/dev/cpld4 +hwmon_in.addr_0x008b_0x00=0x68 +hwmon_in.len_0x008b_0x00=2 +hwmon_in.int_extra1_0x008b_0x00=0 +hwmon_in.int_extra2_0x008b_0x00=2000 +hwmon_in.int_extra3_0x008b_0x00=1 + +hwmon_in.mode_0x008b_0x01=str_constant +hwmon_in.str_cons_0x008b_0x01=CPLD_01_OSFP_VDD3V3_A3_V + +hwmon_in.mode_0x008b_0x02=str_constant +hwmon_in.str_cons_0x008b_0x02=CPLD_01 + +hwmon_in.mode_0x008b_0x03=constant +hwmon_in.int_cons_0x008b_0x03=3630 + +hwmon_in.mode_0x008b_0x05=constant +hwmon_in.int_cons_0x008b_0x05=2970 + +monitor_flag_hwmon_in.mode_0x008b_0x00=constant +monitor_flag_hwmon_in.int_cons_0x008b_0x00=1 + + +# vol sensor 140 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x008c_0x00=config +hwmon_in.src_0x008c_0x00=logic_file +hwmon_in.int_cons_0x008c_0x00=0 +hwmon_in.frmt_0x008c_0x00=num_bytes +hwmon_in.fpath_0x008c_0x00=/dev/cpld4 +hwmon_in.addr_0x008c_0x00=0x6a +hwmon_in.len_0x008c_0x00=2 +hwmon_in.int_extra1_0x008c_0x00=0 +hwmon_in.int_extra2_0x008c_0x00=2000 +hwmon_in.int_extra3_0x008c_0x00=1 + +hwmon_in.mode_0x008c_0x01=str_constant +hwmon_in.str_cons_0x008c_0x01=CPLD_01_OSFP_VDD3V3_B3_V + +hwmon_in.mode_0x008c_0x02=str_constant +hwmon_in.str_cons_0x008c_0x02=CPLD_01 + +hwmon_in.mode_0x008c_0x03=constant +hwmon_in.int_cons_0x008c_0x03=3630 + +hwmon_in.mode_0x008c_0x05=constant +hwmon_in.int_cons_0x008c_0x05=2970 + +monitor_flag_hwmon_in.mode_0x008c_0x00=constant +monitor_flag_hwmon_in.int_cons_0x008c_0x00=1 + + +# vol sensor 141 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x008d_0x00=config +hwmon_in.src_0x008d_0x00=logic_file +hwmon_in.int_cons_0x008d_0x00=0 +hwmon_in.frmt_0x008d_0x00=num_bytes +hwmon_in.fpath_0x008d_0x00=/dev/cpld4 +hwmon_in.addr_0x008d_0x00=0x6c +hwmon_in.len_0x008d_0x00=2 +hwmon_in.int_extra1_0x008d_0x00=0 +hwmon_in.int_extra2_0x008d_0x00=2000 +hwmon_in.int_extra3_0x008d_0x00=1 + +hwmon_in.mode_0x008d_0x01=str_constant +hwmon_in.str_cons_0x008d_0x01=CPLD_01_OSFP_VDD3V3_A4_V + +hwmon_in.mode_0x008d_0x02=str_constant +hwmon_in.str_cons_0x008d_0x02=CPLD_01 + +hwmon_in.mode_0x008d_0x03=constant +hwmon_in.int_cons_0x008d_0x03=3630 + +hwmon_in.mode_0x008d_0x05=constant +hwmon_in.int_cons_0x008d_0x05=2970 + +monitor_flag_hwmon_in.mode_0x008d_0x00=constant +monitor_flag_hwmon_in.int_cons_0x008d_0x00=1 + + +# vol sensor 142 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x008e_0x00=config +hwmon_in.src_0x008e_0x00=logic_file +hwmon_in.int_cons_0x008e_0x00=0 +hwmon_in.frmt_0x008e_0x00=num_bytes +hwmon_in.fpath_0x008e_0x00=/dev/cpld4 +hwmon_in.addr_0x008e_0x00=0x6e +hwmon_in.len_0x008e_0x00=2 +hwmon_in.int_extra1_0x008e_0x00=0 +hwmon_in.int_extra2_0x008e_0x00=2000 +hwmon_in.int_extra3_0x008e_0x00=1 + +hwmon_in.mode_0x008e_0x01=str_constant +hwmon_in.str_cons_0x008e_0x01=CPLD_01_OSFP_VDD3V3_B4_V + +hwmon_in.mode_0x008e_0x02=str_constant +hwmon_in.str_cons_0x008e_0x02=CPLD_01 + +hwmon_in.mode_0x008e_0x03=constant +hwmon_in.int_cons_0x008e_0x03=3630 + +hwmon_in.mode_0x008e_0x05=constant +hwmon_in.int_cons_0x008e_0x05=2970 + +monitor_flag_hwmon_in.mode_0x008e_0x00=constant +monitor_flag_hwmon_in.int_cons_0x008e_0x00=1 + + +# vol sensor 143 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x008f_0x00=config +hwmon_in.src_0x008f_0x00=logic_file +hwmon_in.int_cons_0x008f_0x00=0 +hwmon_in.frmt_0x008f_0x00=num_bytes +hwmon_in.fpath_0x008f_0x00=/dev/cpld4 +hwmon_in.addr_0x008f_0x00=0x70 +hwmon_in.len_0x008f_0x00=2 +hwmon_in.int_extra1_0x008f_0x00=0 +hwmon_in.int_extra2_0x008f_0x00=2000 +hwmon_in.int_extra3_0x008f_0x00=1 + +hwmon_in.mode_0x008f_0x01=str_constant +hwmon_in.str_cons_0x008f_0x01=CPLD_01_OSFP_VDD3V3_A5_V + +hwmon_in.mode_0x008f_0x02=str_constant +hwmon_in.str_cons_0x008f_0x02=CPLD_01 + +hwmon_in.mode_0x008f_0x03=constant +hwmon_in.int_cons_0x008f_0x03=3630 + +hwmon_in.mode_0x008f_0x05=constant +hwmon_in.int_cons_0x008f_0x05=2970 + +monitor_flag_hwmon_in.mode_0x008f_0x00=constant +monitor_flag_hwmon_in.int_cons_0x008f_0x00=1 + + +# vol sensor 144 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0090_0x00=config +hwmon_in.src_0x0090_0x00=logic_file +hwmon_in.int_cons_0x0090_0x00=0 +hwmon_in.frmt_0x0090_0x00=num_bytes +hwmon_in.fpath_0x0090_0x00=/dev/cpld4 +hwmon_in.addr_0x0090_0x00=0x72 +hwmon_in.len_0x0090_0x00=2 +hwmon_in.int_extra1_0x0090_0x00=0 +hwmon_in.int_extra2_0x0090_0x00=2000 +hwmon_in.int_extra3_0x0090_0x00=1 + +hwmon_in.mode_0x0090_0x01=str_constant +hwmon_in.str_cons_0x0090_0x01=CPLD_01_OSFP_VDD3V3_B5_V + +hwmon_in.mode_0x0090_0x02=str_constant +hwmon_in.str_cons_0x0090_0x02=CPLD_01 + +hwmon_in.mode_0x0090_0x03=constant +hwmon_in.int_cons_0x0090_0x03=3630 + +hwmon_in.mode_0x0090_0x05=constant +hwmon_in.int_cons_0x0090_0x05=2970 + +monitor_flag_hwmon_in.mode_0x0090_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0090_0x00=1 + + +# vol sensor 145 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0091_0x00=config +hwmon_in.src_0x0091_0x00=logic_file +hwmon_in.int_cons_0x0091_0x00=0 +hwmon_in.frmt_0x0091_0x00=num_bytes +hwmon_in.fpath_0x0091_0x00=/dev/cpld4 +hwmon_in.addr_0x0091_0x00=0x74 +hwmon_in.len_0x0091_0x00=2 +hwmon_in.int_extra1_0x0091_0x00=0 +hwmon_in.int_extra2_0x0091_0x00=2000 +hwmon_in.int_extra3_0x0091_0x00=1 + +hwmon_in.mode_0x0091_0x01=str_constant +hwmon_in.str_cons_0x0091_0x01=CPLD_01_OSFP_VDD3V3_A6_V + +hwmon_in.mode_0x0091_0x02=str_constant +hwmon_in.str_cons_0x0091_0x02=CPLD_01 + +hwmon_in.mode_0x0091_0x03=constant +hwmon_in.int_cons_0x0091_0x03=3630 + +hwmon_in.mode_0x0091_0x05=constant +hwmon_in.int_cons_0x0091_0x05=2970 + +monitor_flag_hwmon_in.mode_0x0091_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0091_0x00=1 + + +# vol sensor 146 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0092_0x00=config +hwmon_in.src_0x0092_0x00=logic_file +hwmon_in.int_cons_0x0092_0x00=0 +hwmon_in.frmt_0x0092_0x00=num_bytes +hwmon_in.fpath_0x0092_0x00=/dev/cpld4 +hwmon_in.addr_0x0092_0x00=0x76 +hwmon_in.len_0x0092_0x00=2 +hwmon_in.int_extra1_0x0092_0x00=0 +hwmon_in.int_extra2_0x0092_0x00=2000 +hwmon_in.int_extra3_0x0092_0x00=1 + +hwmon_in.mode_0x0092_0x01=str_constant +hwmon_in.str_cons_0x0092_0x01=CPLD_01_OSFP_VDD3V3_B6_V + +hwmon_in.mode_0x0092_0x02=str_constant +hwmon_in.str_cons_0x0092_0x02=CPLD_01 + +hwmon_in.mode_0x0092_0x03=constant +hwmon_in.int_cons_0x0092_0x03=3630 + +hwmon_in.mode_0x0092_0x05=constant +hwmon_in.int_cons_0x0092_0x05=2970 + +monitor_flag_hwmon_in.mode_0x0092_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0092_0x00=1 + + +# vol sensor 147 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0093_0x00=config +hwmon_in.src_0x0093_0x00=logic_file +hwmon_in.int_cons_0x0093_0x00=0 +hwmon_in.frmt_0x0093_0x00=num_bytes +hwmon_in.fpath_0x0093_0x00=/dev/cpld4 +hwmon_in.addr_0x0093_0x00=0x78 +hwmon_in.len_0x0093_0x00=2 +hwmon_in.int_extra1_0x0093_0x00=0 +hwmon_in.int_extra2_0x0093_0x00=2000 +hwmon_in.int_extra3_0x0093_0x00=1 + +hwmon_in.mode_0x0093_0x01=str_constant +hwmon_in.str_cons_0x0093_0x01=CPLD_01_OSFP_VDD3V3_A7_V + +hwmon_in.mode_0x0093_0x02=str_constant +hwmon_in.str_cons_0x0093_0x02=CPLD_01 + +hwmon_in.mode_0x0093_0x03=constant +hwmon_in.int_cons_0x0093_0x03=3630 + +hwmon_in.mode_0x0093_0x05=constant +hwmon_in.int_cons_0x0093_0x05=2970 + +monitor_flag_hwmon_in.mode_0x0093_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0093_0x00=1 + + +# vol sensor 148 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0094_0x00=config +hwmon_in.src_0x0094_0x00=logic_file +hwmon_in.int_cons_0x0094_0x00=0 +hwmon_in.frmt_0x0094_0x00=num_bytes +hwmon_in.fpath_0x0094_0x00=/dev/cpld4 +hwmon_in.addr_0x0094_0x00=0x7a +hwmon_in.len_0x0094_0x00=2 +hwmon_in.int_extra1_0x0094_0x00=0 +hwmon_in.int_extra2_0x0094_0x00=2000 +hwmon_in.int_extra3_0x0094_0x00=1 + +hwmon_in.mode_0x0094_0x01=str_constant +hwmon_in.str_cons_0x0094_0x01=CPLD_01_OSFP_VDD3V3_B7_V + +hwmon_in.mode_0x0094_0x02=str_constant +hwmon_in.str_cons_0x0094_0x02=CPLD_01 + +hwmon_in.mode_0x0094_0x03=constant +hwmon_in.int_cons_0x0094_0x03=3630 + +hwmon_in.mode_0x0094_0x05=constant +hwmon_in.int_cons_0x0094_0x05=2970 + +monitor_flag_hwmon_in.mode_0x0094_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0094_0x00=1 + + +# vol sensor 149 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0095_0x00=config +hwmon_in.src_0x0095_0x00=logic_file +hwmon_in.int_cons_0x0095_0x00=0 +hwmon_in.frmt_0x0095_0x00=num_bytes +hwmon_in.fpath_0x0095_0x00=/dev/cpld4 +hwmon_in.addr_0x0095_0x00=0x7c +hwmon_in.len_0x0095_0x00=2 +hwmon_in.int_extra1_0x0095_0x00=0 +hwmon_in.int_extra2_0x0095_0x00=2000 +hwmon_in.int_extra3_0x0095_0x00=1 + +hwmon_in.mode_0x0095_0x01=str_constant +hwmon_in.str_cons_0x0095_0x01=CPLD_01_OSFP_VDD3V3_A8_V + +hwmon_in.mode_0x0095_0x02=str_constant +hwmon_in.str_cons_0x0095_0x02=CPLD_01 + +hwmon_in.mode_0x0095_0x03=constant +hwmon_in.int_cons_0x0095_0x03=3630 + +hwmon_in.mode_0x0095_0x05=constant +hwmon_in.int_cons_0x0095_0x05=2970 + +monitor_flag_hwmon_in.mode_0x0095_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0095_0x00=1 + + +# vol sensor 150 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0096_0x00=config +hwmon_in.src_0x0096_0x00=logic_file +hwmon_in.int_cons_0x0096_0x00=0 +hwmon_in.frmt_0x0096_0x00=num_bytes +hwmon_in.fpath_0x0096_0x00=/dev/cpld4 +hwmon_in.addr_0x0096_0x00=0x7e +hwmon_in.len_0x0096_0x00=2 +hwmon_in.int_extra1_0x0096_0x00=0 +hwmon_in.int_extra2_0x0096_0x00=2000 +hwmon_in.int_extra3_0x0096_0x00=1 + +hwmon_in.mode_0x0096_0x01=str_constant +hwmon_in.str_cons_0x0096_0x01=CPLD_01_OSFP_VDD3V3_B8_V + +hwmon_in.mode_0x0096_0x02=str_constant +hwmon_in.str_cons_0x0096_0x02=CPLD_01 + +hwmon_in.mode_0x0096_0x03=constant +hwmon_in.int_cons_0x0096_0x03=3630 + +hwmon_in.mode_0x0096_0x05=constant +hwmon_in.int_cons_0x0096_0x05=2970 + +monitor_flag_hwmon_in.mode_0x0096_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0096_0x00=1 + + +# vol sensor 151 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0097_0x00=config +hwmon_in.src_0x0097_0x00=file +hwmon_in.int_cons_0x0097_0x00=0 +hwmon_in.frmt_0x0097_0x00=buf +hwmon_in.fpath_0x0097_0x00=/sys/bus/i2c/devices/92-005b/hwmon/ +hwmon_in.addr_0x0097_0x00=0 +hwmon_in.len_0x0097_0x00=8 +hwmon_in.str_cons_0x0097_0x00=in15_input +hwmon_in.int_extra1_0x0097_0x00=0 +hwmon_in.int_extra2_0x0097_0x00=0 + +hwmon_in.mode_0x0097_0x01=str_constant +hwmon_in.str_cons_0x0097_0x01=UCD90160_06_VDD12V_UPORT_V + +hwmon_in.mode_0x0097_0x02=str_constant +hwmon_in.str_cons_0x0097_0x02=UCD90160_06 + +hwmon_in.mode_0x0097_0x03=constant +hwmon_in.int_cons_0x0097_0x03=13200 + +hwmon_in.mode_0x0097_0x05=constant +hwmon_in.int_cons_0x0097_0x05=10800 + +monitor_flag_hwmon_in.mode_0x0097_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0097_0x00=1 + + +# vol sensor 152 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0098_0x00=config +hwmon_in.src_0x0098_0x00=file +hwmon_in.int_cons_0x0098_0x00=0 +hwmon_in.frmt_0x0098_0x00=buf +hwmon_in.fpath_0x0098_0x00=/sys/bus/i2c/devices/92-005b/hwmon/ +hwmon_in.addr_0x0098_0x00=0 +hwmon_in.len_0x0098_0x00=8 +hwmon_in.str_cons_0x0098_0x00=in14_input +hwmon_in.int_extra1_0x0098_0x00=0 +hwmon_in.int_extra2_0x0098_0x00=0 + +hwmon_in.mode_0x0098_0x01=str_constant +hwmon_in.str_cons_0x0098_0x01=UCD90160_06_VDD3V3_STANDBY_V + +hwmon_in.mode_0x0098_0x02=str_constant +hwmon_in.str_cons_0x0098_0x02=UCD90160_06 + +hwmon_in.mode_0x0098_0x03=constant +hwmon_in.int_cons_0x0098_0x03=3630 + +hwmon_in.mode_0x0098_0x05=constant +hwmon_in.int_cons_0x0098_0x05=2970 + +monitor_flag_hwmon_in.mode_0x0098_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0098_0x00=1 + + +# vol sensor 153 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x0099_0x00=config +hwmon_in.src_0x0099_0x00=file +hwmon_in.int_cons_0x0099_0x00=0 +hwmon_in.frmt_0x0099_0x00=buf +hwmon_in.fpath_0x0099_0x00=/sys/bus/i2c/devices/92-005b/hwmon/ +hwmon_in.addr_0x0099_0x00=0 +hwmon_in.len_0x0099_0x00=8 +hwmon_in.str_cons_0x0099_0x00=in1_input +hwmon_in.int_extra1_0x0099_0x00=0 +hwmon_in.int_extra2_0x0099_0x00=0 + +hwmon_in.mode_0x0099_0x01=str_constant +hwmon_in.str_cons_0x0099_0x01=UCD90160_06_FPGA_VDD_1V0_V + +hwmon_in.mode_0x0099_0x02=str_constant +hwmon_in.str_cons_0x0099_0x02=UCD90160_06 + +hwmon_in.mode_0x0099_0x03=constant +hwmon_in.int_cons_0x0099_0x03=1100 + +hwmon_in.mode_0x0099_0x05=constant +hwmon_in.int_cons_0x0099_0x05=900 + +monitor_flag_hwmon_in.mode_0x0099_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0099_0x00=1 + + +# vol sensor 154 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x009a_0x00=config +hwmon_in.src_0x009a_0x00=file +hwmon_in.int_cons_0x009a_0x00=0 +hwmon_in.frmt_0x009a_0x00=buf +hwmon_in.fpath_0x009a_0x00=/sys/bus/i2c/devices/92-005b/hwmon/ +hwmon_in.addr_0x009a_0x00=0 +hwmon_in.len_0x009a_0x00=8 +hwmon_in.str_cons_0x009a_0x00=in2_input +hwmon_in.int_extra1_0x009a_0x00=0 +hwmon_in.int_extra2_0x009a_0x00=0 + +hwmon_in.mode_0x009a_0x01=str_constant +hwmon_in.str_cons_0x009a_0x01=UCD90160_06_FPGA_VDD_1V8_V + +hwmon_in.mode_0x009a_0x02=str_constant +hwmon_in.str_cons_0x009a_0x02=UCD90160_06 + +hwmon_in.mode_0x009a_0x03=constant +hwmon_in.int_cons_0x009a_0x03=1980 + +hwmon_in.mode_0x009a_0x05=constant +hwmon_in.int_cons_0x009a_0x05=1620 + +monitor_flag_hwmon_in.mode_0x009a_0x00=constant +monitor_flag_hwmon_in.int_cons_0x009a_0x00=1 + + +# vol sensor 155 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x009b_0x00=config +hwmon_in.src_0x009b_0x00=file +hwmon_in.int_cons_0x009b_0x00=0 +hwmon_in.frmt_0x009b_0x00=buf +hwmon_in.fpath_0x009b_0x00=/sys/bus/i2c/devices/92-005b/hwmon/ +hwmon_in.addr_0x009b_0x00=0 +hwmon_in.len_0x009b_0x00=8 +hwmon_in.str_cons_0x009b_0x00=in3_input +hwmon_in.int_extra1_0x009b_0x00=0 +hwmon_in.int_extra2_0x009b_0x00=0 + +hwmon_in.mode_0x009b_0x01=str_constant +hwmon_in.str_cons_0x009b_0x01=UCD90160_06_FPGA_VDD_1V2_V + +hwmon_in.mode_0x009b_0x02=str_constant +hwmon_in.str_cons_0x009b_0x02=UCD90160_06 + +hwmon_in.mode_0x009b_0x03=constant +hwmon_in.int_cons_0x009b_0x03=1320 + +hwmon_in.mode_0x009b_0x05=constant +hwmon_in.int_cons_0x009b_0x05=1080 + +monitor_flag_hwmon_in.mode_0x009b_0x00=constant +monitor_flag_hwmon_in.int_cons_0x009b_0x00=1 + + +# vol sensor 156 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x009c_0x00=config +hwmon_in.src_0x009c_0x00=file +hwmon_in.int_cons_0x009c_0x00=0 +hwmon_in.frmt_0x009c_0x00=buf +hwmon_in.fpath_0x009c_0x00=/sys/bus/i2c/devices/92-005b/hwmon/ +hwmon_in.addr_0x009c_0x00=0 +hwmon_in.len_0x009c_0x00=8 +hwmon_in.str_cons_0x009c_0x00=in4_input +hwmon_in.int_extra1_0x009c_0x00=0 +hwmon_in.int_extra2_0x009c_0x00=0 + +hwmon_in.mode_0x009c_0x01=str_constant +hwmon_in.str_cons_0x009c_0x01=UCD90160_06_VDD_3V3_V + +hwmon_in.mode_0x009c_0x02=str_constant +hwmon_in.str_cons_0x009c_0x02=UCD90160_06 + +hwmon_in.mode_0x009c_0x03=constant +hwmon_in.int_cons_0x009c_0x03=3630 + +hwmon_in.mode_0x009c_0x05=constant +hwmon_in.int_cons_0x009c_0x05=2970 + +monitor_flag_hwmon_in.mode_0x009c_0x00=constant +monitor_flag_hwmon_in.int_cons_0x009c_0x00=1 + + +# vol sensor 157 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x009d_0x00=config +hwmon_in.src_0x009d_0x00=file +hwmon_in.int_cons_0x009d_0x00=0 +hwmon_in.frmt_0x009d_0x00=buf +hwmon_in.fpath_0x009d_0x00=/sys/bus/i2c/devices/92-005b/hwmon/ +hwmon_in.addr_0x009d_0x00=0 +hwmon_in.len_0x009d_0x00=8 +hwmon_in.str_cons_0x009d_0x00=in5_input +hwmon_in.int_extra1_0x009d_0x00=0 +hwmon_in.int_extra2_0x009d_0x00=0 + +hwmon_in.mode_0x009d_0x01=str_constant +hwmon_in.str_cons_0x009d_0x01=UCD90160_06_PWR_VDD_5V0_V + +hwmon_in.mode_0x009d_0x02=str_constant +hwmon_in.str_cons_0x009d_0x02=UCD90160_06 + +hwmon_in.mode_0x009d_0x03=constant +hwmon_in.int_cons_0x009d_0x03=5500 + +hwmon_in.mode_0x009d_0x05=constant +hwmon_in.int_cons_0x009d_0x05=4500 + +monitor_flag_hwmon_in.mode_0x009d_0x00=constant +monitor_flag_hwmon_in.int_cons_0x009d_0x00=1 + + +# vol sensor 158 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x009e_0x00=config +hwmon_in.src_0x009e_0x00=file +hwmon_in.int_cons_0x009e_0x00=0 +hwmon_in.frmt_0x009e_0x00=buf +hwmon_in.fpath_0x009e_0x00=/sys/bus/i2c/devices/92-005b/hwmon/ +hwmon_in.addr_0x009e_0x00=0 +hwmon_in.len_0x009e_0x00=8 +hwmon_in.str_cons_0x009e_0x00=in6_input +hwmon_in.int_extra1_0x009e_0x00=0 +hwmon_in.int_extra2_0x009e_0x00=0 + +hwmon_in.mode_0x009e_0x01=str_constant +hwmon_in.str_cons_0x009e_0x01=UCD90160_06_OSFP_VDD3V3_A1_V + +hwmon_in.mode_0x009e_0x02=str_constant +hwmon_in.str_cons_0x009e_0x02=UCD90160_06 + +hwmon_in.mode_0x009e_0x03=constant +hwmon_in.int_cons_0x009e_0x03=3630 + +hwmon_in.mode_0x009e_0x05=constant +hwmon_in.int_cons_0x009e_0x05=2970 + +monitor_flag_hwmon_in.mode_0x009e_0x00=constant +monitor_flag_hwmon_in.int_cons_0x009e_0x00=1 + + +# vol sensor 159 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x009f_0x00=config +hwmon_in.src_0x009f_0x00=file +hwmon_in.int_cons_0x009f_0x00=0 +hwmon_in.frmt_0x009f_0x00=buf +hwmon_in.fpath_0x009f_0x00=/sys/bus/i2c/devices/92-005b/hwmon/ +hwmon_in.addr_0x009f_0x00=0 +hwmon_in.len_0x009f_0x00=8 +hwmon_in.str_cons_0x009f_0x00=in7_input +hwmon_in.int_extra1_0x009f_0x00=0 +hwmon_in.int_extra2_0x009f_0x00=0 + +hwmon_in.mode_0x009f_0x01=str_constant +hwmon_in.str_cons_0x009f_0x01=UCD90160_06_OSFP_VDD3V3_B1_V + +hwmon_in.mode_0x009f_0x02=str_constant +hwmon_in.str_cons_0x009f_0x02=UCD90160_06 + +hwmon_in.mode_0x009f_0x03=constant +hwmon_in.int_cons_0x009f_0x03=3630 + +hwmon_in.mode_0x009f_0x05=constant +hwmon_in.int_cons_0x009f_0x05=2970 + +monitor_flag_hwmon_in.mode_0x009f_0x00=constant +monitor_flag_hwmon_in.int_cons_0x009f_0x00=1 + + +# vol sensor 160 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x00a0_0x00=config +hwmon_in.src_0x00a0_0x00=file +hwmon_in.int_cons_0x00a0_0x00=0 +hwmon_in.frmt_0x00a0_0x00=buf +hwmon_in.fpath_0x00a0_0x00=/sys/bus/i2c/devices/92-005b/hwmon/ +hwmon_in.addr_0x00a0_0x00=0 +hwmon_in.len_0x00a0_0x00=8 +hwmon_in.str_cons_0x00a0_0x00=in8_input +hwmon_in.int_extra1_0x00a0_0x00=0 +hwmon_in.int_extra2_0x00a0_0x00=0 + +hwmon_in.mode_0x00a0_0x01=str_constant +hwmon_in.str_cons_0x00a0_0x01=UCD90160_06_OSFP_VDD3V3_A2_V + +hwmon_in.mode_0x00a0_0x02=str_constant +hwmon_in.str_cons_0x00a0_0x02=UCD90160_06 + +hwmon_in.mode_0x00a0_0x03=constant +hwmon_in.int_cons_0x00a0_0x03=3630 + +hwmon_in.mode_0x00a0_0x05=constant +hwmon_in.int_cons_0x00a0_0x05=2970 + +monitor_flag_hwmon_in.mode_0x00a0_0x00=constant +monitor_flag_hwmon_in.int_cons_0x00a0_0x00=1 + + +# vol sensor 161 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x00a1_0x00=config +hwmon_in.src_0x00a1_0x00=file +hwmon_in.int_cons_0x00a1_0x00=0 +hwmon_in.frmt_0x00a1_0x00=buf +hwmon_in.fpath_0x00a1_0x00=/sys/bus/i2c/devices/92-005b/hwmon/ +hwmon_in.addr_0x00a1_0x00=0 +hwmon_in.len_0x00a1_0x00=8 +hwmon_in.str_cons_0x00a1_0x00=in9_input +hwmon_in.int_extra1_0x00a1_0x00=0 +hwmon_in.int_extra2_0x00a1_0x00=0 + +hwmon_in.mode_0x00a1_0x01=str_constant +hwmon_in.str_cons_0x00a1_0x01=UCD90160_06_OSFP_VDD3V3_B2_V + +hwmon_in.mode_0x00a1_0x02=str_constant +hwmon_in.str_cons_0x00a1_0x02=UCD90160_06 + +hwmon_in.mode_0x00a1_0x03=constant +hwmon_in.int_cons_0x00a1_0x03=3630 + +hwmon_in.mode_0x00a1_0x05=constant +hwmon_in.int_cons_0x00a1_0x05=2970 + +monitor_flag_hwmon_in.mode_0x00a1_0x00=constant +monitor_flag_hwmon_in.int_cons_0x00a1_0x00=1 + + +# vol sensor 162 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x00a2_0x00=config +hwmon_in.src_0x00a2_0x00=file +hwmon_in.int_cons_0x00a2_0x00=0 +hwmon_in.frmt_0x00a2_0x00=buf +hwmon_in.fpath_0x00a2_0x00=/sys/bus/i2c/devices/92-005b/hwmon/ +hwmon_in.addr_0x00a2_0x00=0 +hwmon_in.len_0x00a2_0x00=8 +hwmon_in.str_cons_0x00a2_0x00=in10_input +hwmon_in.int_extra1_0x00a2_0x00=0 +hwmon_in.int_extra2_0x00a2_0x00=0 + +hwmon_in.mode_0x00a2_0x01=str_constant +hwmon_in.str_cons_0x00a2_0x01=UCD90160_06_OSFP_VDD3V3_A3_V + +hwmon_in.mode_0x00a2_0x02=str_constant +hwmon_in.str_cons_0x00a2_0x02=UCD90160_06 + +hwmon_in.mode_0x00a2_0x03=constant +hwmon_in.int_cons_0x00a2_0x03=3630 + +hwmon_in.mode_0x00a2_0x05=constant +hwmon_in.int_cons_0x00a2_0x05=2970 + +monitor_flag_hwmon_in.mode_0x00a2_0x00=constant +monitor_flag_hwmon_in.int_cons_0x00a2_0x00=1 + + +# vol sensor 163 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x00a3_0x00=config +hwmon_in.src_0x00a3_0x00=file +hwmon_in.int_cons_0x00a3_0x00=0 +hwmon_in.frmt_0x00a3_0x00=buf +hwmon_in.fpath_0x00a3_0x00=/sys/bus/i2c/devices/92-005b/hwmon/ +hwmon_in.addr_0x00a3_0x00=0 +hwmon_in.len_0x00a3_0x00=8 +hwmon_in.str_cons_0x00a3_0x00=in11_input +hwmon_in.int_extra1_0x00a3_0x00=0 +hwmon_in.int_extra2_0x00a3_0x00=0 + +hwmon_in.mode_0x00a3_0x01=str_constant +hwmon_in.str_cons_0x00a3_0x01=UCD90160_06_OSFP_VDD3V3_B3_V + +hwmon_in.mode_0x00a3_0x02=str_constant +hwmon_in.str_cons_0x00a3_0x02=UCD90160_06 + +hwmon_in.mode_0x00a3_0x03=constant +hwmon_in.int_cons_0x00a3_0x03=3630 + +hwmon_in.mode_0x00a3_0x05=constant +hwmon_in.int_cons_0x00a3_0x05=2970 + +monitor_flag_hwmon_in.mode_0x00a3_0x00=constant +monitor_flag_hwmon_in.int_cons_0x00a3_0x00=1 + + +# vol sensor 164 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x00a4_0x00=config +hwmon_in.src_0x00a4_0x00=file +hwmon_in.int_cons_0x00a4_0x00=0 +hwmon_in.frmt_0x00a4_0x00=buf +hwmon_in.fpath_0x00a4_0x00=/sys/bus/i2c/devices/92-005b/hwmon/ +hwmon_in.addr_0x00a4_0x00=0 +hwmon_in.len_0x00a4_0x00=8 +hwmon_in.str_cons_0x00a4_0x00=in12_input +hwmon_in.int_extra1_0x00a4_0x00=0 +hwmon_in.int_extra2_0x00a4_0x00=0 + +hwmon_in.mode_0x00a4_0x01=str_constant +hwmon_in.str_cons_0x00a4_0x01=UCD90160_06_OSFP_VDD3V3_A4_V + +hwmon_in.mode_0x00a4_0x02=str_constant +hwmon_in.str_cons_0x00a4_0x02=UCD90160_06 + +hwmon_in.mode_0x00a4_0x03=constant +hwmon_in.int_cons_0x00a4_0x03=3630 + +hwmon_in.mode_0x00a4_0x05=constant +hwmon_in.int_cons_0x00a4_0x05=2970 + +monitor_flag_hwmon_in.mode_0x00a4_0x00=constant +monitor_flag_hwmon_in.int_cons_0x00a4_0x00=1 + + +# vol sensor 165 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x00a5_0x00=config +hwmon_in.src_0x00a5_0x00=file +hwmon_in.int_cons_0x00a5_0x00=0 +hwmon_in.frmt_0x00a5_0x00=buf +hwmon_in.fpath_0x00a5_0x00=/sys/bus/i2c/devices/92-005b/hwmon/ +hwmon_in.addr_0x00a5_0x00=0 +hwmon_in.len_0x00a5_0x00=8 +hwmon_in.str_cons_0x00a5_0x00=in13_input +hwmon_in.int_extra1_0x00a5_0x00=0 +hwmon_in.int_extra2_0x00a5_0x00=0 + +hwmon_in.mode_0x00a5_0x01=str_constant +hwmon_in.str_cons_0x00a5_0x01=UCD90160_06_OSFP_VDD3V3_B4_V + +hwmon_in.mode_0x00a5_0x02=str_constant +hwmon_in.str_cons_0x00a5_0x02=UCD90160_06 + +hwmon_in.mode_0x00a5_0x03=constant +hwmon_in.int_cons_0x00a5_0x03=3630 + +hwmon_in.mode_0x00a5_0x05=constant +hwmon_in.int_cons_0x00a5_0x05=2970 + +monitor_flag_hwmon_in.mode_0x00a5_0x00=constant +monitor_flag_hwmon_in.int_cons_0x00a5_0x00=1 + + +# vol sensor 166 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x00a6_0x00=config +hwmon_in.src_0x00a6_0x00=file +hwmon_in.int_cons_0x00a6_0x00=3 +hwmon_in.frmt_0x00a6_0x00=buf +hwmon_in.fpath_0x00a6_0x00=/sys/bus/i2c/devices/94-0060/hwmon/ +hwmon_in.addr_0x00a6_0x00=0 +hwmon_in.len_0x00a6_0x00=8 +hwmon_in.str_cons_0x00a6_0x00=in3_input +hwmon_in.int_extra1_0x00a6_0x00=1500 +hwmon_in.int_extra2_0x00a6_0x00=0 + +hwmon_in.mode_0x00a6_0x01=str_constant +hwmon_in.str_cons_0x00a6_0x01=XDPE12284C_21_OSFP_VDD3V3_A1_V + +hwmon_in.mode_0x00a6_0x02=str_constant +hwmon_in.str_cons_0x00a6_0x02=XDPE12284C_21 + +hwmon_in.mode_0x00a6_0x03=constant +hwmon_in.int_cons_0x00a6_0x03=3630 + +hwmon_in.mode_0x00a6_0x05=constant +hwmon_in.int_cons_0x00a6_0x05=2970 + +monitor_flag_hwmon_in.mode_0x00a6_0x00=constant +monitor_flag_hwmon_in.int_cons_0x00a6_0x00=1 + + +# vol sensor 167 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x00a7_0x00=config +hwmon_in.src_0x00a7_0x00=file +hwmon_in.int_cons_0x00a7_0x00=3 +hwmon_in.frmt_0x00a7_0x00=buf +hwmon_in.fpath_0x00a7_0x00=/sys/bus/i2c/devices/94-0060/hwmon/ +hwmon_in.addr_0x00a7_0x00=0 +hwmon_in.len_0x00a7_0x00=8 +hwmon_in.str_cons_0x00a7_0x00=in4_input +hwmon_in.int_extra1_0x00a7_0x00=1500 +hwmon_in.int_extra2_0x00a7_0x00=0 + +hwmon_in.mode_0x00a7_0x01=str_constant +hwmon_in.str_cons_0x00a7_0x01=XDPE12284C_21_OSFP_VDD3V3_B1_V + +hwmon_in.mode_0x00a7_0x02=str_constant +hwmon_in.str_cons_0x00a7_0x02=XDPE12284C_21 + +hwmon_in.mode_0x00a7_0x03=constant +hwmon_in.int_cons_0x00a7_0x03=3630 + +hwmon_in.mode_0x00a7_0x05=constant +hwmon_in.int_cons_0x00a7_0x05=2970 + +monitor_flag_hwmon_in.mode_0x00a7_0x00=constant +monitor_flag_hwmon_in.int_cons_0x00a7_0x00=1 + + +# vol sensor 168 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x00a8_0x00=config +hwmon_in.src_0x00a8_0x00=file +hwmon_in.int_cons_0x00a8_0x00=3 +hwmon_in.frmt_0x00a8_0x00=buf +hwmon_in.fpath_0x00a8_0x00=/sys/bus/i2c/devices/95-0060/hwmon/ +hwmon_in.addr_0x00a8_0x00=0 +hwmon_in.len_0x00a8_0x00=8 +hwmon_in.str_cons_0x00a8_0x00=in3_input +hwmon_in.int_extra1_0x00a8_0x00=1500 +hwmon_in.int_extra2_0x00a8_0x00=0 + +hwmon_in.mode_0x00a8_0x01=str_constant +hwmon_in.str_cons_0x00a8_0x01=XDPE12284C_22_OSFP_VDD3V3_A2_V + +hwmon_in.mode_0x00a8_0x02=str_constant +hwmon_in.str_cons_0x00a8_0x02=XDPE12284C_22 + +hwmon_in.mode_0x00a8_0x03=constant +hwmon_in.int_cons_0x00a8_0x03=3630 + +hwmon_in.mode_0x00a8_0x05=constant +hwmon_in.int_cons_0x00a8_0x05=2970 + +monitor_flag_hwmon_in.mode_0x00a8_0x00=constant +monitor_flag_hwmon_in.int_cons_0x00a8_0x00=1 + + +# vol sensor 169 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x00a9_0x00=config +hwmon_in.src_0x00a9_0x00=file +hwmon_in.int_cons_0x00a9_0x00=3 +hwmon_in.frmt_0x00a9_0x00=buf +hwmon_in.fpath_0x00a9_0x00=/sys/bus/i2c/devices/95-0060/hwmon/ +hwmon_in.addr_0x00a9_0x00=0 +hwmon_in.len_0x00a9_0x00=8 +hwmon_in.str_cons_0x00a9_0x00=in4_input +hwmon_in.int_extra1_0x00a9_0x00=1500 +hwmon_in.int_extra2_0x00a9_0x00=0 + +hwmon_in.mode_0x00a9_0x01=str_constant +hwmon_in.str_cons_0x00a9_0x01=XDPE12284C_22_OSFP_VDD3V3_B2_V + +hwmon_in.mode_0x00a9_0x02=str_constant +hwmon_in.str_cons_0x00a9_0x02=XDPE12284C_22 + +hwmon_in.mode_0x00a9_0x03=constant +hwmon_in.int_cons_0x00a9_0x03=3630 + +hwmon_in.mode_0x00a9_0x05=constant +hwmon_in.int_cons_0x00a9_0x05=2970 + +monitor_flag_hwmon_in.mode_0x00a9_0x00=constant +monitor_flag_hwmon_in.int_cons_0x00a9_0x00=1 + + +# vol sensor 170 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x00aa_0x00=config +hwmon_in.src_0x00aa_0x00=file +hwmon_in.int_cons_0x00aa_0x00=3 +hwmon_in.frmt_0x00aa_0x00=buf +hwmon_in.fpath_0x00aa_0x00=/sys/bus/i2c/devices/96-0060/hwmon/ +hwmon_in.addr_0x00aa_0x00=0 +hwmon_in.len_0x00aa_0x00=8 +hwmon_in.str_cons_0x00aa_0x00=in3_input +hwmon_in.int_extra1_0x00aa_0x00=1500 +hwmon_in.int_extra2_0x00aa_0x00=0 + +hwmon_in.mode_0x00aa_0x01=str_constant +hwmon_in.str_cons_0x00aa_0x01=XDPE12284C_23_OSFP_VDD3V3_A3_V + +hwmon_in.mode_0x00aa_0x02=str_constant +hwmon_in.str_cons_0x00aa_0x02=XDPE12284C_23 + +hwmon_in.mode_0x00aa_0x03=constant +hwmon_in.int_cons_0x00aa_0x03=3630 + +hwmon_in.mode_0x00aa_0x05=constant +hwmon_in.int_cons_0x00aa_0x05=2970 + +monitor_flag_hwmon_in.mode_0x00aa_0x00=constant +monitor_flag_hwmon_in.int_cons_0x00aa_0x00=1 + + +# vol sensor 171 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x00ab_0x00=config +hwmon_in.src_0x00ab_0x00=file +hwmon_in.int_cons_0x00ab_0x00=3 +hwmon_in.frmt_0x00ab_0x00=buf +hwmon_in.fpath_0x00ab_0x00=/sys/bus/i2c/devices/96-0060/hwmon/ +hwmon_in.addr_0x00ab_0x00=0 +hwmon_in.len_0x00ab_0x00=8 +hwmon_in.str_cons_0x00ab_0x00=in4_input +hwmon_in.int_extra1_0x00ab_0x00=1500 +hwmon_in.int_extra2_0x00ab_0x00=0 + +hwmon_in.mode_0x00ab_0x01=str_constant +hwmon_in.str_cons_0x00ab_0x01=XDPE12284C_23_OSFP_VDD3V3_B3_V + +hwmon_in.mode_0x00ab_0x02=str_constant +hwmon_in.str_cons_0x00ab_0x02=XDPE12284C_23 + +hwmon_in.mode_0x00ab_0x03=constant +hwmon_in.int_cons_0x00ab_0x03=3630 + +hwmon_in.mode_0x00ab_0x05=constant +hwmon_in.int_cons_0x00ab_0x05=2970 + +monitor_flag_hwmon_in.mode_0x00ab_0x00=constant +monitor_flag_hwmon_in.int_cons_0x00ab_0x00=1 + + +# vol sensor 172 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x00ac_0x00=config +hwmon_in.src_0x00ac_0x00=file +hwmon_in.int_cons_0x00ac_0x00=3 +hwmon_in.frmt_0x00ac_0x00=buf +hwmon_in.fpath_0x00ac_0x00=/sys/bus/i2c/devices/97-0060/hwmon/ +hwmon_in.addr_0x00ac_0x00=0 +hwmon_in.len_0x00ac_0x00=8 +hwmon_in.str_cons_0x00ac_0x00=in3_input +hwmon_in.int_extra1_0x00ac_0x00=1500 +hwmon_in.int_extra2_0x00ac_0x00=0 + +hwmon_in.mode_0x00ac_0x01=str_constant +hwmon_in.str_cons_0x00ac_0x01=XDPE12284C_24_OSFP_VDD3V3_A4_V + +hwmon_in.mode_0x00ac_0x02=str_constant +hwmon_in.str_cons_0x00ac_0x02=XDPE12284C_24 + +hwmon_in.mode_0x00ac_0x03=constant +hwmon_in.int_cons_0x00ac_0x03=3630 + +hwmon_in.mode_0x00ac_0x05=constant +hwmon_in.int_cons_0x00ac_0x05=2970 + +monitor_flag_hwmon_in.mode_0x00ac_0x00=constant +monitor_flag_hwmon_in.int_cons_0x00ac_0x00=1 + + +# vol sensor 173 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x00ad_0x00=config +hwmon_in.src_0x00ad_0x00=file +hwmon_in.int_cons_0x00ad_0x00=3 +hwmon_in.frmt_0x00ad_0x00=buf +hwmon_in.fpath_0x00ad_0x00=/sys/bus/i2c/devices/97-0060/hwmon/ +hwmon_in.addr_0x00ad_0x00=0 +hwmon_in.len_0x00ad_0x00=8 +hwmon_in.str_cons_0x00ad_0x00=in4_input +hwmon_in.int_extra1_0x00ad_0x00=1500 +hwmon_in.int_extra2_0x00ad_0x00=0 + +hwmon_in.mode_0x00ad_0x01=str_constant +hwmon_in.str_cons_0x00ad_0x01=XDPE12284C_24_OSFP_VDD3V3_B4_V + +hwmon_in.mode_0x00ad_0x02=str_constant +hwmon_in.str_cons_0x00ad_0x02=XDPE12284C_24 + +hwmon_in.mode_0x00ad_0x03=constant +hwmon_in.int_cons_0x00ad_0x03=3630 + +hwmon_in.mode_0x00ad_0x05=constant +hwmon_in.int_cons_0x00ad_0x05=2970 + +monitor_flag_hwmon_in.mode_0x00ad_0x00=constant +monitor_flag_hwmon_in.int_cons_0x00ad_0x00=1 + + +# vol sensor 174 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x00ae_0x00=config +hwmon_in.src_0x00ae_0x00=file +hwmon_in.int_cons_0x00ae_0x00=0 +hwmon_in.frmt_0x00ae_0x00=buf +hwmon_in.fpath_0x00ae_0x00=/sys/bus/i2c/devices/100-005b/hwmon/ +hwmon_in.addr_0x00ae_0x00=0 +hwmon_in.len_0x00ae_0x00=8 +hwmon_in.str_cons_0x00ae_0x00=in15_input +hwmon_in.int_extra1_0x00ae_0x00=0 +hwmon_in.int_extra2_0x00ae_0x00=0 + +hwmon_in.mode_0x00ae_0x01=str_constant +hwmon_in.str_cons_0x00ae_0x01=UCD90160_07_VDD12V_DPORT_V + +hwmon_in.mode_0x00ae_0x02=str_constant +hwmon_in.str_cons_0x00ae_0x02=UCD90160_07 + +hwmon_in.mode_0x00ae_0x03=constant +hwmon_in.int_cons_0x00ae_0x03=13200 + +hwmon_in.mode_0x00ae_0x05=constant +hwmon_in.int_cons_0x00ae_0x05=10800 + +monitor_flag_hwmon_in.mode_0x00ae_0x00=constant +monitor_flag_hwmon_in.int_cons_0x00ae_0x00=1 + + +# vol sensor 175 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x00af_0x00=config +hwmon_in.src_0x00af_0x00=file +hwmon_in.int_cons_0x00af_0x00=0 +hwmon_in.frmt_0x00af_0x00=buf +hwmon_in.fpath_0x00af_0x00=/sys/bus/i2c/devices/100-005b/hwmon/ +hwmon_in.addr_0x00af_0x00=0 +hwmon_in.len_0x00af_0x00=8 +hwmon_in.str_cons_0x00af_0x00=in14_input +hwmon_in.int_extra1_0x00af_0x00=0 +hwmon_in.int_extra2_0x00af_0x00=0 + +hwmon_in.mode_0x00af_0x01=str_constant +hwmon_in.str_cons_0x00af_0x01=UCD90160_07_VDD3V3_STANDBY_V + +hwmon_in.mode_0x00af_0x02=str_constant +hwmon_in.str_cons_0x00af_0x02=UCD90160_07 + +hwmon_in.mode_0x00af_0x03=constant +hwmon_in.int_cons_0x00af_0x03=3630 + +hwmon_in.mode_0x00af_0x05=constant +hwmon_in.int_cons_0x00af_0x05=2970 + +monitor_flag_hwmon_in.mode_0x00af_0x00=constant +monitor_flag_hwmon_in.int_cons_0x00af_0x00=1 + + +# vol sensor 176 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x00b0_0x00=config +hwmon_in.src_0x00b0_0x00=file +hwmon_in.int_cons_0x00b0_0x00=0 +hwmon_in.frmt_0x00b0_0x00=buf +hwmon_in.fpath_0x00b0_0x00=/sys/bus/i2c/devices/100-005b/hwmon/ +hwmon_in.addr_0x00b0_0x00=0 +hwmon_in.len_0x00b0_0x00=8 +hwmon_in.str_cons_0x00b0_0x00=in1_input +hwmon_in.int_extra1_0x00b0_0x00=0 +hwmon_in.int_extra2_0x00b0_0x00=0 + +hwmon_in.mode_0x00b0_0x01=str_constant +hwmon_in.str_cons_0x00b0_0x01=UCD90160_07_FPGA_VDD_1V0_V + +hwmon_in.mode_0x00b0_0x02=str_constant +hwmon_in.str_cons_0x00b0_0x02=UCD90160_07 + +hwmon_in.mode_0x00b0_0x03=constant +hwmon_in.int_cons_0x00b0_0x03=1100 + +hwmon_in.mode_0x00b0_0x05=constant +hwmon_in.int_cons_0x00b0_0x05=900 + +monitor_flag_hwmon_in.mode_0x00b0_0x00=constant +monitor_flag_hwmon_in.int_cons_0x00b0_0x00=1 + + +# vol sensor 177 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x00b1_0x00=config +hwmon_in.src_0x00b1_0x00=file +hwmon_in.int_cons_0x00b1_0x00=0 +hwmon_in.frmt_0x00b1_0x00=buf +hwmon_in.fpath_0x00b1_0x00=/sys/bus/i2c/devices/100-005b/hwmon/ +hwmon_in.addr_0x00b1_0x00=0 +hwmon_in.len_0x00b1_0x00=8 +hwmon_in.str_cons_0x00b1_0x00=in2_input +hwmon_in.int_extra1_0x00b1_0x00=0 +hwmon_in.int_extra2_0x00b1_0x00=0 + +hwmon_in.mode_0x00b1_0x01=str_constant +hwmon_in.str_cons_0x00b1_0x01=UCD90160_07_FPGA_VDD_1V8_V + +hwmon_in.mode_0x00b1_0x02=str_constant +hwmon_in.str_cons_0x00b1_0x02=UCD90160_07 + +hwmon_in.mode_0x00b1_0x03=constant +hwmon_in.int_cons_0x00b1_0x03=1980 + +hwmon_in.mode_0x00b1_0x05=constant +hwmon_in.int_cons_0x00b1_0x05=1620 + +monitor_flag_hwmon_in.mode_0x00b1_0x00=constant +monitor_flag_hwmon_in.int_cons_0x00b1_0x00=1 + + +# vol sensor 178 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x00b2_0x00=config +hwmon_in.src_0x00b2_0x00=file +hwmon_in.int_cons_0x00b2_0x00=0 +hwmon_in.frmt_0x00b2_0x00=buf +hwmon_in.fpath_0x00b2_0x00=/sys/bus/i2c/devices/100-005b/hwmon/ +hwmon_in.addr_0x00b2_0x00=0 +hwmon_in.len_0x00b2_0x00=8 +hwmon_in.str_cons_0x00b2_0x00=in3_input +hwmon_in.int_extra1_0x00b2_0x00=0 +hwmon_in.int_extra2_0x00b2_0x00=0 + +hwmon_in.mode_0x00b2_0x01=str_constant +hwmon_in.str_cons_0x00b2_0x01=UCD90160_07_FPGA_VDD_1V2_V + +hwmon_in.mode_0x00b2_0x02=str_constant +hwmon_in.str_cons_0x00b2_0x02=UCD90160_07 + +hwmon_in.mode_0x00b2_0x03=constant +hwmon_in.int_cons_0x00b2_0x03=1320 + +hwmon_in.mode_0x00b2_0x05=constant +hwmon_in.int_cons_0x00b2_0x05=1080 + +monitor_flag_hwmon_in.mode_0x00b2_0x00=constant +monitor_flag_hwmon_in.int_cons_0x00b2_0x00=1 + + +# vol sensor 179 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x00b3_0x00=config +hwmon_in.src_0x00b3_0x00=file +hwmon_in.int_cons_0x00b3_0x00=0 +hwmon_in.frmt_0x00b3_0x00=buf +hwmon_in.fpath_0x00b3_0x00=/sys/bus/i2c/devices/100-005b/hwmon/ +hwmon_in.addr_0x00b3_0x00=0 +hwmon_in.len_0x00b3_0x00=8 +hwmon_in.str_cons_0x00b3_0x00=in4_input +hwmon_in.int_extra1_0x00b3_0x00=0 +hwmon_in.int_extra2_0x00b3_0x00=0 + +hwmon_in.mode_0x00b3_0x01=str_constant +hwmon_in.str_cons_0x00b3_0x01=UCD90160_07_VDD_3V3_V + +hwmon_in.mode_0x00b3_0x02=str_constant +hwmon_in.str_cons_0x00b3_0x02=UCD90160_07 + +hwmon_in.mode_0x00b3_0x03=constant +hwmon_in.int_cons_0x00b3_0x03=3630 + +hwmon_in.mode_0x00b3_0x05=constant +hwmon_in.int_cons_0x00b3_0x05=2970 + +monitor_flag_hwmon_in.mode_0x00b3_0x00=constant +monitor_flag_hwmon_in.int_cons_0x00b3_0x00=1 + + +# vol sensor 180 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x00b4_0x00=config +hwmon_in.src_0x00b4_0x00=file +hwmon_in.int_cons_0x00b4_0x00=0 +hwmon_in.frmt_0x00b4_0x00=buf +hwmon_in.fpath_0x00b4_0x00=/sys/bus/i2c/devices/100-005b/hwmon/ +hwmon_in.addr_0x00b4_0x00=0 +hwmon_in.len_0x00b4_0x00=8 +hwmon_in.str_cons_0x00b4_0x00=in5_input +hwmon_in.int_extra1_0x00b4_0x00=0 +hwmon_in.int_extra2_0x00b4_0x00=0 + +hwmon_in.mode_0x00b4_0x01=str_constant +hwmon_in.str_cons_0x00b4_0x01=UCD90160_07_PWR_VDD_5V0_V + +hwmon_in.mode_0x00b4_0x02=str_constant +hwmon_in.str_cons_0x00b4_0x02=UCD90160_07 + +hwmon_in.mode_0x00b4_0x03=constant +hwmon_in.int_cons_0x00b4_0x03=5500 + +hwmon_in.mode_0x00b4_0x05=constant +hwmon_in.int_cons_0x00b4_0x05=4500 + +monitor_flag_hwmon_in.mode_0x00b4_0x00=constant +monitor_flag_hwmon_in.int_cons_0x00b4_0x00=1 + + +# vol sensor 181 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x00b5_0x00=config +hwmon_in.src_0x00b5_0x00=file +hwmon_in.int_cons_0x00b5_0x00=0 +hwmon_in.frmt_0x00b5_0x00=buf +hwmon_in.fpath_0x00b5_0x00=/sys/bus/i2c/devices/100-005b/hwmon/ +hwmon_in.addr_0x00b5_0x00=0 +hwmon_in.len_0x00b5_0x00=8 +hwmon_in.str_cons_0x00b5_0x00=in6_input +hwmon_in.int_extra1_0x00b5_0x00=0 +hwmon_in.int_extra2_0x00b5_0x00=0 + +hwmon_in.mode_0x00b5_0x01=str_constant +hwmon_in.str_cons_0x00b5_0x01=UCD90160_07_OSFP_VDD3V3_A1_V + +hwmon_in.mode_0x00b5_0x02=str_constant +hwmon_in.str_cons_0x00b5_0x02=UCD90160_07 + +hwmon_in.mode_0x00b5_0x03=constant +hwmon_in.int_cons_0x00b5_0x03=3630 + +hwmon_in.mode_0x00b5_0x05=constant +hwmon_in.int_cons_0x00b5_0x05=2970 + +monitor_flag_hwmon_in.mode_0x00b5_0x00=constant +monitor_flag_hwmon_in.int_cons_0x00b5_0x00=1 + + +# vol sensor 182 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x00b6_0x00=config +hwmon_in.src_0x00b6_0x00=file +hwmon_in.int_cons_0x00b6_0x00=0 +hwmon_in.frmt_0x00b6_0x00=buf +hwmon_in.fpath_0x00b6_0x00=/sys/bus/i2c/devices/100-005b/hwmon/ +hwmon_in.addr_0x00b6_0x00=0 +hwmon_in.len_0x00b6_0x00=8 +hwmon_in.str_cons_0x00b6_0x00=in7_input +hwmon_in.int_extra1_0x00b6_0x00=0 +hwmon_in.int_extra2_0x00b6_0x00=0 + +hwmon_in.mode_0x00b6_0x01=str_constant +hwmon_in.str_cons_0x00b6_0x01=UCD90160_07_OSFP_VDD3V3_B1_V + +hwmon_in.mode_0x00b6_0x02=str_constant +hwmon_in.str_cons_0x00b6_0x02=UCD90160_07 + +hwmon_in.mode_0x00b6_0x03=constant +hwmon_in.int_cons_0x00b6_0x03=3630 + +hwmon_in.mode_0x00b6_0x05=constant +hwmon_in.int_cons_0x00b6_0x05=2970 + +monitor_flag_hwmon_in.mode_0x00b6_0x00=constant +monitor_flag_hwmon_in.int_cons_0x00b6_0x00=1 + + +# vol sensor 183 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x00b7_0x00=config +hwmon_in.src_0x00b7_0x00=file +hwmon_in.int_cons_0x00b7_0x00=0 +hwmon_in.frmt_0x00b7_0x00=buf +hwmon_in.fpath_0x00b7_0x00=/sys/bus/i2c/devices/100-005b/hwmon/ +hwmon_in.addr_0x00b7_0x00=0 +hwmon_in.len_0x00b7_0x00=8 +hwmon_in.str_cons_0x00b7_0x00=in8_input +hwmon_in.int_extra1_0x00b7_0x00=0 +hwmon_in.int_extra2_0x00b7_0x00=0 + +hwmon_in.mode_0x00b7_0x01=str_constant +hwmon_in.str_cons_0x00b7_0x01=UCD90160_07_OSFP_VDD3V3_A2_V + +hwmon_in.mode_0x00b7_0x02=str_constant +hwmon_in.str_cons_0x00b7_0x02=UCD90160_07 + +hwmon_in.mode_0x00b7_0x03=constant +hwmon_in.int_cons_0x00b7_0x03=3630 + +hwmon_in.mode_0x00b7_0x05=constant +hwmon_in.int_cons_0x00b7_0x05=2970 + +monitor_flag_hwmon_in.mode_0x00b7_0x00=constant +monitor_flag_hwmon_in.int_cons_0x00b7_0x00=1 + + +# vol sensor 184 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x00b8_0x00=config +hwmon_in.src_0x00b8_0x00=file +hwmon_in.int_cons_0x00b8_0x00=0 +hwmon_in.frmt_0x00b8_0x00=buf +hwmon_in.fpath_0x00b8_0x00=/sys/bus/i2c/devices/100-005b/hwmon/ +hwmon_in.addr_0x00b8_0x00=0 +hwmon_in.len_0x00b8_0x00=8 +hwmon_in.str_cons_0x00b8_0x00=in9_input +hwmon_in.int_extra1_0x00b8_0x00=0 +hwmon_in.int_extra2_0x00b8_0x00=0 + +hwmon_in.mode_0x00b8_0x01=str_constant +hwmon_in.str_cons_0x00b8_0x01=UCD90160_07_OSFP_VDD3V3_B2_V + +hwmon_in.mode_0x00b8_0x02=str_constant +hwmon_in.str_cons_0x00b8_0x02=UCD90160_07 + +hwmon_in.mode_0x00b8_0x03=constant +hwmon_in.int_cons_0x00b8_0x03=3630 + +hwmon_in.mode_0x00b8_0x05=constant +hwmon_in.int_cons_0x00b8_0x05=2970 + +monitor_flag_hwmon_in.mode_0x00b8_0x00=constant +monitor_flag_hwmon_in.int_cons_0x00b8_0x00=1 + + +# vol sensor 185 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x00b9_0x00=config +hwmon_in.src_0x00b9_0x00=file +hwmon_in.int_cons_0x00b9_0x00=0 +hwmon_in.frmt_0x00b9_0x00=buf +hwmon_in.fpath_0x00b9_0x00=/sys/bus/i2c/devices/100-005b/hwmon/ +hwmon_in.addr_0x00b9_0x00=0 +hwmon_in.len_0x00b9_0x00=8 +hwmon_in.str_cons_0x00b9_0x00=in10_input +hwmon_in.int_extra1_0x00b9_0x00=0 +hwmon_in.int_extra2_0x00b9_0x00=0 + +hwmon_in.mode_0x00b9_0x01=str_constant +hwmon_in.str_cons_0x00b9_0x01=UCD90160_07_OSFP_VDD3V3_A3_V + +hwmon_in.mode_0x00b9_0x02=str_constant +hwmon_in.str_cons_0x00b9_0x02=UCD90160_07 + +hwmon_in.mode_0x00b9_0x03=constant +hwmon_in.int_cons_0x00b9_0x03=3630 + +hwmon_in.mode_0x00b9_0x05=constant +hwmon_in.int_cons_0x00b9_0x05=2970 + +monitor_flag_hwmon_in.mode_0x00b9_0x00=constant +monitor_flag_hwmon_in.int_cons_0x00b9_0x00=1 + + +# vol sensor 186 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x00ba_0x00=config +hwmon_in.src_0x00ba_0x00=file +hwmon_in.int_cons_0x00ba_0x00=0 +hwmon_in.frmt_0x00ba_0x00=buf +hwmon_in.fpath_0x00ba_0x00=/sys/bus/i2c/devices/100-005b/hwmon/ +hwmon_in.addr_0x00ba_0x00=0 +hwmon_in.len_0x00ba_0x00=8 +hwmon_in.str_cons_0x00ba_0x00=in11_input +hwmon_in.int_extra1_0x00ba_0x00=0 +hwmon_in.int_extra2_0x00ba_0x00=0 + +hwmon_in.mode_0x00ba_0x01=str_constant +hwmon_in.str_cons_0x00ba_0x01=UCD90160_07_OSFP_VDD3V3_B3_V + +hwmon_in.mode_0x00ba_0x02=str_constant +hwmon_in.str_cons_0x00ba_0x02=UCD90160_07 + +hwmon_in.mode_0x00ba_0x03=constant +hwmon_in.int_cons_0x00ba_0x03=3630 + +hwmon_in.mode_0x00ba_0x05=constant +hwmon_in.int_cons_0x00ba_0x05=2970 + +monitor_flag_hwmon_in.mode_0x00ba_0x00=constant +monitor_flag_hwmon_in.int_cons_0x00ba_0x00=1 + + +# vol sensor 187 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x00bb_0x00=config +hwmon_in.src_0x00bb_0x00=file +hwmon_in.int_cons_0x00bb_0x00=0 +hwmon_in.frmt_0x00bb_0x00=buf +hwmon_in.fpath_0x00bb_0x00=/sys/bus/i2c/devices/100-005b/hwmon/ +hwmon_in.addr_0x00bb_0x00=0 +hwmon_in.len_0x00bb_0x00=8 +hwmon_in.str_cons_0x00bb_0x00=in12_input +hwmon_in.int_extra1_0x00bb_0x00=0 +hwmon_in.int_extra2_0x00bb_0x00=0 + +hwmon_in.mode_0x00bb_0x01=str_constant +hwmon_in.str_cons_0x00bb_0x01=UCD90160_07_OSFP_VDD3V3_A4_V + +hwmon_in.mode_0x00bb_0x02=str_constant +hwmon_in.str_cons_0x00bb_0x02=UCD90160_07 + +hwmon_in.mode_0x00bb_0x03=constant +hwmon_in.int_cons_0x00bb_0x03=3630 + +hwmon_in.mode_0x00bb_0x05=constant +hwmon_in.int_cons_0x00bb_0x05=2970 + +monitor_flag_hwmon_in.mode_0x00bb_0x00=constant +monitor_flag_hwmon_in.int_cons_0x00bb_0x00=1 + + +# vol sensor 188 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x00bc_0x00=config +hwmon_in.src_0x00bc_0x00=file +hwmon_in.int_cons_0x00bc_0x00=0 +hwmon_in.frmt_0x00bc_0x00=buf +hwmon_in.fpath_0x00bc_0x00=/sys/bus/i2c/devices/100-005b/hwmon/ +hwmon_in.addr_0x00bc_0x00=0 +hwmon_in.len_0x00bc_0x00=8 +hwmon_in.str_cons_0x00bc_0x00=in13_input +hwmon_in.int_extra1_0x00bc_0x00=0 +hwmon_in.int_extra2_0x00bc_0x00=0 + +hwmon_in.mode_0x00bc_0x01=str_constant +hwmon_in.str_cons_0x00bc_0x01=UCD90160_07_OSFP_VDD3V3_B4_V + +hwmon_in.mode_0x00bc_0x02=str_constant +hwmon_in.str_cons_0x00bc_0x02=UCD90160_07 + +hwmon_in.mode_0x00bc_0x03=constant +hwmon_in.int_cons_0x00bc_0x03=3630 + +hwmon_in.mode_0x00bc_0x05=constant +hwmon_in.int_cons_0x00bc_0x05=2970 + +monitor_flag_hwmon_in.mode_0x00bc_0x00=constant +monitor_flag_hwmon_in.int_cons_0x00bc_0x00=1 + + +# vol sensor 189 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x00bd_0x00=config +hwmon_in.src_0x00bd_0x00=file +hwmon_in.int_cons_0x00bd_0x00=3 +hwmon_in.frmt_0x00bd_0x00=buf +hwmon_in.fpath_0x00bd_0x00=/sys/bus/i2c/devices/102-0060/hwmon/ +hwmon_in.addr_0x00bd_0x00=0 +hwmon_in.len_0x00bd_0x00=8 +hwmon_in.str_cons_0x00bd_0x00=in3_input +hwmon_in.int_extra1_0x00bd_0x00=1500 +hwmon_in.int_extra2_0x00bd_0x00=0 + +hwmon_in.mode_0x00bd_0x01=str_constant +hwmon_in.str_cons_0x00bd_0x01=XDPE12284C_25_OSFP_VDD3V3_A1_V + +hwmon_in.mode_0x00bd_0x02=str_constant +hwmon_in.str_cons_0x00bd_0x02=XDPE12284C_25 + +hwmon_in.mode_0x00bd_0x03=constant +hwmon_in.int_cons_0x00bd_0x03=3630 + +hwmon_in.mode_0x00bd_0x05=constant +hwmon_in.int_cons_0x00bd_0x05=2970 + +monitor_flag_hwmon_in.mode_0x00bd_0x00=constant +monitor_flag_hwmon_in.int_cons_0x00bd_0x00=1 + + +# vol sensor 190 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x00be_0x00=config +hwmon_in.src_0x00be_0x00=file +hwmon_in.int_cons_0x00be_0x00=3 +hwmon_in.frmt_0x00be_0x00=buf +hwmon_in.fpath_0x00be_0x00=/sys/bus/i2c/devices/102-0060/hwmon/ +hwmon_in.addr_0x00be_0x00=0 +hwmon_in.len_0x00be_0x00=8 +hwmon_in.str_cons_0x00be_0x00=in4_input +hwmon_in.int_extra1_0x00be_0x00=1500 +hwmon_in.int_extra2_0x00be_0x00=0 + +hwmon_in.mode_0x00be_0x01=str_constant +hwmon_in.str_cons_0x00be_0x01=XDPE12284C_25_OSFP_VDD3V3_B1_V + +hwmon_in.mode_0x00be_0x02=str_constant +hwmon_in.str_cons_0x00be_0x02=XDPE12284C_25 + +hwmon_in.mode_0x00be_0x03=constant +hwmon_in.int_cons_0x00be_0x03=3630 + +hwmon_in.mode_0x00be_0x05=constant +hwmon_in.int_cons_0x00be_0x05=2970 + +monitor_flag_hwmon_in.mode_0x00be_0x00=constant +monitor_flag_hwmon_in.int_cons_0x00be_0x00=1 + + +# vol sensor 191 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x00bf_0x00=config +hwmon_in.src_0x00bf_0x00=file +hwmon_in.int_cons_0x00bf_0x00=3 +hwmon_in.frmt_0x00bf_0x00=buf +hwmon_in.fpath_0x00bf_0x00=/sys/bus/i2c/devices/103-0060/hwmon/ +hwmon_in.addr_0x00bf_0x00=0 +hwmon_in.len_0x00bf_0x00=8 +hwmon_in.str_cons_0x00bf_0x00=in3_input +hwmon_in.int_extra1_0x00bf_0x00=1500 +hwmon_in.int_extra2_0x00bf_0x00=0 + +hwmon_in.mode_0x00bf_0x01=str_constant +hwmon_in.str_cons_0x00bf_0x01=XDPE12284C_26_OSFP_VDD3V3_A2_V + +hwmon_in.mode_0x00bf_0x02=str_constant +hwmon_in.str_cons_0x00bf_0x02=XDPE12284C_26 + +hwmon_in.mode_0x00bf_0x03=constant +hwmon_in.int_cons_0x00bf_0x03=3630 + +hwmon_in.mode_0x00bf_0x05=constant +hwmon_in.int_cons_0x00bf_0x05=2970 + +monitor_flag_hwmon_in.mode_0x00bf_0x00=constant +monitor_flag_hwmon_in.int_cons_0x00bf_0x00=1 + + +# vol sensor 192 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x00c0_0x00=config +hwmon_in.src_0x00c0_0x00=file +hwmon_in.int_cons_0x00c0_0x00=3 +hwmon_in.frmt_0x00c0_0x00=buf +hwmon_in.fpath_0x00c0_0x00=/sys/bus/i2c/devices/103-0060/hwmon/ +hwmon_in.addr_0x00c0_0x00=0 +hwmon_in.len_0x00c0_0x00=8 +hwmon_in.str_cons_0x00c0_0x00=in4_input +hwmon_in.int_extra1_0x00c0_0x00=1500 +hwmon_in.int_extra2_0x00c0_0x00=0 + +hwmon_in.mode_0x00c0_0x01=str_constant +hwmon_in.str_cons_0x00c0_0x01=XDPE12284C_26_OSFP_VDD3V3_B2_V + +hwmon_in.mode_0x00c0_0x02=str_constant +hwmon_in.str_cons_0x00c0_0x02=XDPE12284C_26 + +hwmon_in.mode_0x00c0_0x03=constant +hwmon_in.int_cons_0x00c0_0x03=3630 + +hwmon_in.mode_0x00c0_0x05=constant +hwmon_in.int_cons_0x00c0_0x05=2970 + +monitor_flag_hwmon_in.mode_0x00c0_0x00=constant +monitor_flag_hwmon_in.int_cons_0x00c0_0x00=1 + + +# vol sensor 193 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x00c1_0x00=config +hwmon_in.src_0x00c1_0x00=file +hwmon_in.int_cons_0x00c1_0x00=3 +hwmon_in.frmt_0x00c1_0x00=buf +hwmon_in.fpath_0x00c1_0x00=/sys/bus/i2c/devices/104-0060/hwmon/ +hwmon_in.addr_0x00c1_0x00=0 +hwmon_in.len_0x00c1_0x00=8 +hwmon_in.str_cons_0x00c1_0x00=in3_input +hwmon_in.int_extra1_0x00c1_0x00=1500 +hwmon_in.int_extra2_0x00c1_0x00=0 + +hwmon_in.mode_0x00c1_0x01=str_constant +hwmon_in.str_cons_0x00c1_0x01=XDPE12284C_27_OSFP_VDD3V3_A3_V + +hwmon_in.mode_0x00c1_0x02=str_constant +hwmon_in.str_cons_0x00c1_0x02=XDPE12284C_27 + +hwmon_in.mode_0x00c1_0x03=constant +hwmon_in.int_cons_0x00c1_0x03=3630 + +hwmon_in.mode_0x00c1_0x05=constant +hwmon_in.int_cons_0x00c1_0x05=2970 + +monitor_flag_hwmon_in.mode_0x00c1_0x00=constant +monitor_flag_hwmon_in.int_cons_0x00c1_0x00=1 + + +# vol sensor 194 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x00c2_0x00=config +hwmon_in.src_0x00c2_0x00=file +hwmon_in.int_cons_0x00c2_0x00=3 +hwmon_in.frmt_0x00c2_0x00=buf +hwmon_in.fpath_0x00c2_0x00=/sys/bus/i2c/devices/104-0060/hwmon/ +hwmon_in.addr_0x00c2_0x00=0 +hwmon_in.len_0x00c2_0x00=8 +hwmon_in.str_cons_0x00c2_0x00=in4_input +hwmon_in.int_extra1_0x00c2_0x00=1500 +hwmon_in.int_extra2_0x00c2_0x00=0 + +hwmon_in.mode_0x00c2_0x01=str_constant +hwmon_in.str_cons_0x00c2_0x01=XDPE12284C_27_OSFP_VDD3V3_B3_V + +hwmon_in.mode_0x00c2_0x02=str_constant +hwmon_in.str_cons_0x00c2_0x02=XDPE12284C_27 + +hwmon_in.mode_0x00c2_0x03=constant +hwmon_in.int_cons_0x00c2_0x03=3630 + +hwmon_in.mode_0x00c2_0x05=constant +hwmon_in.int_cons_0x00c2_0x05=2970 + +monitor_flag_hwmon_in.mode_0x00c2_0x00=constant +monitor_flag_hwmon_in.int_cons_0x00c2_0x00=1 + + +# vol sensor 195 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x00c3_0x00=config +hwmon_in.src_0x00c3_0x00=file +hwmon_in.int_cons_0x00c3_0x00=3 +hwmon_in.frmt_0x00c3_0x00=buf +hwmon_in.fpath_0x00c3_0x00=/sys/bus/i2c/devices/105-0060/hwmon/ +hwmon_in.addr_0x00c3_0x00=0 +hwmon_in.len_0x00c3_0x00=8 +hwmon_in.str_cons_0x00c3_0x00=in3_input +hwmon_in.int_extra1_0x00c3_0x00=1500 +hwmon_in.int_extra2_0x00c3_0x00=0 + +hwmon_in.mode_0x00c3_0x01=str_constant +hwmon_in.str_cons_0x00c3_0x01=XDPE12284C_28_OSFP_VDD3V3_A4_V + +hwmon_in.mode_0x00c3_0x02=str_constant +hwmon_in.str_cons_0x00c3_0x02=XDPE12284C_28 + +hwmon_in.mode_0x00c3_0x03=constant +hwmon_in.int_cons_0x00c3_0x03=3630 + +hwmon_in.mode_0x00c3_0x05=constant +hwmon_in.int_cons_0x00c3_0x05=2970 + +monitor_flag_hwmon_in.mode_0x00c3_0x00=constant +monitor_flag_hwmon_in.int_cons_0x00c3_0x00=1 + + +# vol sensor 196 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x00c4_0x00=config +hwmon_in.src_0x00c4_0x00=file +hwmon_in.int_cons_0x00c4_0x00=3 +hwmon_in.frmt_0x00c4_0x00=buf +hwmon_in.fpath_0x00c4_0x00=/sys/bus/i2c/devices/105-0060/hwmon/ +hwmon_in.addr_0x00c4_0x00=0 +hwmon_in.len_0x00c4_0x00=8 +hwmon_in.str_cons_0x00c4_0x00=in4_input +hwmon_in.int_extra1_0x00c4_0x00=1500 +hwmon_in.int_extra2_0x00c4_0x00=0 + +hwmon_in.mode_0x00c4_0x01=str_constant +hwmon_in.str_cons_0x00c4_0x01=XDPE12284C_28_OSFP_VDD3V3_B4_V + +hwmon_in.mode_0x00c4_0x02=str_constant +hwmon_in.str_cons_0x00c4_0x02=XDPE12284C_28 + +hwmon_in.mode_0x00c4_0x03=constant +hwmon_in.int_cons_0x00c4_0x03=3630 + +hwmon_in.mode_0x00c4_0x05=constant +hwmon_in.int_cons_0x00c4_0x05=2970 + +monitor_flag_hwmon_in.mode_0x00c4_0x00=constant +monitor_flag_hwmon_in.int_cons_0x00c4_0x00=1 + + +# vol sensor 197 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x00c5_0x00=config +hwmon_in.src_0x00c5_0x00=logic_file +hwmon_in.int_cons_0x00c5_0x00=0 +hwmon_in.frmt_0x00c5_0x00=num_bytes +hwmon_in.fpath_0x00c5_0x00=/dev/cpld7 +hwmon_in.addr_0x00c5_0x00=0xe8 +hwmon_in.len_0x00c5_0x00=2 +hwmon_in.int_extra1_0x00c5_0x00=0 +hwmon_in.int_extra2_0x00c5_0x00=2000 +hwmon_in.int_extra3_0x00c5_0x00=1 + +hwmon_in.mode_0x00c5_0x01=str_constant +hwmon_in.str_cons_0x00c5_0x01=CPLD_02_UFANA_VDD3V3_V + +hwmon_in.mode_0x00c5_0x02=str_constant +hwmon_in.str_cons_0x00c5_0x02=CPLD_02 + +hwmon_in.mode_0x00c5_0x03=constant +hwmon_in.int_cons_0x00c5_0x03=3630 + +hwmon_in.mode_0x00c5_0x05=constant +hwmon_in.int_cons_0x00c5_0x05=2970 + +monitor_flag_hwmon_in.mode_0x00c5_0x00=constant +monitor_flag_hwmon_in.int_cons_0x00c5_0x00=1 + + +# vol sensor 198 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x00c6_0x00=config +hwmon_in.src_0x00c6_0x00=logic_file +hwmon_in.int_cons_0x00c6_0x00=0 +hwmon_in.frmt_0x00c6_0x00=num_bytes +hwmon_in.fpath_0x00c6_0x00=/dev/cpld7 +hwmon_in.addr_0x00c6_0x00=0xea +hwmon_in.len_0x00c6_0x00=2 +hwmon_in.int_extra1_0x00c6_0x00=0 +hwmon_in.int_extra2_0x00c6_0x00=2000 +hwmon_in.int_extra3_0x00c6_0x00=1 + +hwmon_in.mode_0x00c6_0x01=str_constant +hwmon_in.str_cons_0x00c6_0x01=CPLD_02_UFANB_VDD3V3_V + +hwmon_in.mode_0x00c6_0x02=str_constant +hwmon_in.str_cons_0x00c6_0x02=CPLD_02 + +hwmon_in.mode_0x00c6_0x03=constant +hwmon_in.int_cons_0x00c6_0x03=3630 + +hwmon_in.mode_0x00c6_0x05=constant +hwmon_in.int_cons_0x00c6_0x05=2970 + +monitor_flag_hwmon_in.mode_0x00c6_0x00=constant +monitor_flag_hwmon_in.int_cons_0x00c6_0x00=1 + + +# vol sensor 199 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x00c7_0x00=config +hwmon_in.src_0x00c7_0x00=logic_file +hwmon_in.int_cons_0x00c7_0x00=0 +hwmon_in.frmt_0x00c7_0x00=num_bytes +hwmon_in.fpath_0x00c7_0x00=/dev/cpld7 +hwmon_in.addr_0x00c7_0x00=0xec +hwmon_in.len_0x00c7_0x00=2 +hwmon_in.int_extra1_0x00c7_0x00=0 +hwmon_in.int_extra2_0x00c7_0x00=2000 +hwmon_in.int_extra3_0x00c7_0x00=1 + +hwmon_in.mode_0x00c7_0x01=str_constant +hwmon_in.str_cons_0x00c7_0x01=CPLD_02_UFANC_VDD3V3_V + +hwmon_in.mode_0x00c7_0x02=str_constant +hwmon_in.str_cons_0x00c7_0x02=CPLD_02 + +hwmon_in.mode_0x00c7_0x03=constant +hwmon_in.int_cons_0x00c7_0x03=3630 + +hwmon_in.mode_0x00c7_0x05=constant +hwmon_in.int_cons_0x00c7_0x05=2970 + +monitor_flag_hwmon_in.mode_0x00c7_0x00=constant +monitor_flag_hwmon_in.int_cons_0x00c7_0x00=1 + + +# vol sensor 200 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x00c8_0x00=config +hwmon_in.src_0x00c8_0x00=logic_file +hwmon_in.int_cons_0x00c8_0x00=0 +hwmon_in.frmt_0x00c8_0x00=num_bytes +hwmon_in.fpath_0x00c8_0x00=/dev/cpld7 +hwmon_in.addr_0x00c8_0x00=0xee +hwmon_in.len_0x00c8_0x00=2 +hwmon_in.int_extra1_0x00c8_0x00=0 +hwmon_in.int_extra2_0x00c8_0x00=2000 +hwmon_in.int_extra3_0x00c8_0x00=1 + +hwmon_in.mode_0x00c8_0x01=str_constant +hwmon_in.str_cons_0x00c8_0x01=CPLD_02_UFAND_VDD3V3_V + +hwmon_in.mode_0x00c8_0x02=str_constant +hwmon_in.str_cons_0x00c8_0x02=CPLD_02 + +hwmon_in.mode_0x00c8_0x03=constant +hwmon_in.int_cons_0x00c8_0x03=3630 + +hwmon_in.mode_0x00c8_0x05=constant +hwmon_in.int_cons_0x00c8_0x05=2970 + +monitor_flag_hwmon_in.mode_0x00c8_0x00=constant +monitor_flag_hwmon_in.int_cons_0x00c8_0x00=1 + + +# vol sensor 201 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x00c9_0x00=config +hwmon_in.src_0x00c9_0x00=logic_file +hwmon_in.int_cons_0x00c9_0x00=0 +hwmon_in.frmt_0x00c9_0x00=num_bytes +hwmon_in.fpath_0x00c9_0x00=/dev/cpld7 +hwmon_in.addr_0x00c9_0x00=0xe0 +hwmon_in.len_0x00c9_0x00=2 +hwmon_in.int_extra1_0x00c9_0x00=0 +hwmon_in.int_extra2_0x00c9_0x00=7096 +hwmon_in.int_extra3_0x00c9_0x00=1 + +hwmon_in.mode_0x00c9_0x01=str_constant +hwmon_in.str_cons_0x00c9_0x01=CPLD_02_UFAN_VDD12V_1_V + +hwmon_in.mode_0x00c9_0x02=str_constant +hwmon_in.str_cons_0x00c9_0x02=CPLD_02 + +hwmon_in.mode_0x00c9_0x03=constant +hwmon_in.int_cons_0x00c9_0x03=13200 + +hwmon_in.mode_0x00c9_0x05=constant +hwmon_in.int_cons_0x00c9_0x05=10800 + +monitor_flag_hwmon_in.mode_0x00c9_0x00=constant +monitor_flag_hwmon_in.int_cons_0x00c9_0x00=1 + + +# vol sensor 202 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x00ca_0x00=config +hwmon_in.src_0x00ca_0x00=logic_file +hwmon_in.int_cons_0x00ca_0x00=0 +hwmon_in.frmt_0x00ca_0x00=num_bytes +hwmon_in.fpath_0x00ca_0x00=/dev/cpld7 +hwmon_in.addr_0x00ca_0x00=0xe2 +hwmon_in.len_0x00ca_0x00=2 +hwmon_in.int_extra1_0x00ca_0x00=0 +hwmon_in.int_extra2_0x00ca_0x00=7096 +hwmon_in.int_extra3_0x00ca_0x00=1 + +hwmon_in.mode_0x00ca_0x01=str_constant +hwmon_in.str_cons_0x00ca_0x01=CPLD_02_UFAN_VDD12V_2_V + +hwmon_in.mode_0x00ca_0x02=str_constant +hwmon_in.str_cons_0x00ca_0x02=CPLD_02 + +hwmon_in.mode_0x00ca_0x03=constant +hwmon_in.int_cons_0x00ca_0x03=13200 + +hwmon_in.mode_0x00ca_0x05=constant +hwmon_in.int_cons_0x00ca_0x05=10800 + +monitor_flag_hwmon_in.mode_0x00ca_0x00=constant +monitor_flag_hwmon_in.int_cons_0x00ca_0x00=1 + + +# vol sensor 203 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x00cb_0x00=config +hwmon_in.src_0x00cb_0x00=logic_file +hwmon_in.int_cons_0x00cb_0x00=0 +hwmon_in.frmt_0x00cb_0x00=num_bytes +hwmon_in.fpath_0x00cb_0x00=/dev/cpld7 +hwmon_in.addr_0x00cb_0x00=0xe4 +hwmon_in.len_0x00cb_0x00=2 +hwmon_in.int_extra1_0x00cb_0x00=0 +hwmon_in.int_extra2_0x00cb_0x00=7096 +hwmon_in.int_extra3_0x00cb_0x00=1 + +hwmon_in.mode_0x00cb_0x01=str_constant +hwmon_in.str_cons_0x00cb_0x01=CPLD_02_UFAN_VDD12V_3_V + +hwmon_in.mode_0x00cb_0x02=str_constant +hwmon_in.str_cons_0x00cb_0x02=CPLD_02 + +hwmon_in.mode_0x00cb_0x03=constant +hwmon_in.int_cons_0x00cb_0x03=13200 + +hwmon_in.mode_0x00cb_0x05=constant +hwmon_in.int_cons_0x00cb_0x05=10800 + +monitor_flag_hwmon_in.mode_0x00cb_0x00=constant +monitor_flag_hwmon_in.int_cons_0x00cb_0x00=1 + + +# vol sensor 204 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x00cc_0x00=config +hwmon_in.src_0x00cc_0x00=logic_file +hwmon_in.int_cons_0x00cc_0x00=0 +hwmon_in.frmt_0x00cc_0x00=num_bytes +hwmon_in.fpath_0x00cc_0x00=/dev/cpld7 +hwmon_in.addr_0x00cc_0x00=0xe6 +hwmon_in.len_0x00cc_0x00=2 +hwmon_in.int_extra1_0x00cc_0x00=0 +hwmon_in.int_extra2_0x00cc_0x00=7096 +hwmon_in.int_extra3_0x00cc_0x00=1 + +hwmon_in.mode_0x00cc_0x01=str_constant +hwmon_in.str_cons_0x00cc_0x01=CPLD_02_UFAN_VDD12V_4_V + +hwmon_in.mode_0x00cc_0x02=str_constant +hwmon_in.str_cons_0x00cc_0x02=CPLD_02 + +hwmon_in.mode_0x00cc_0x03=constant +hwmon_in.int_cons_0x00cc_0x03=13200 + +hwmon_in.mode_0x00cc_0x05=constant +hwmon_in.int_cons_0x00cc_0x05=10800 + +monitor_flag_hwmon_in.mode_0x00cc_0x00=constant +monitor_flag_hwmon_in.int_cons_0x00cc_0x00=1 + + +# vol sensor 205 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x00cd_0x00=config +hwmon_in.src_0x00cd_0x00=logic_file +hwmon_in.int_cons_0x00cd_0x00=0 +hwmon_in.frmt_0x00cd_0x00=num_bytes +hwmon_in.fpath_0x00cd_0x00=/dev/cpld8 +hwmon_in.addr_0x00cd_0x00=0xe8 +hwmon_in.len_0x00cd_0x00=2 +hwmon_in.int_extra1_0x00cd_0x00=0 +hwmon_in.int_extra2_0x00cd_0x00=2000 +hwmon_in.int_extra3_0x00cd_0x00=1 + +hwmon_in.mode_0x00cd_0x01=str_constant +hwmon_in.str_cons_0x00cd_0x01=CPLD_03_DFANA_VDD3V3_V + +hwmon_in.mode_0x00cd_0x02=str_constant +hwmon_in.str_cons_0x00cd_0x02=CPLD_03 + +hwmon_in.mode_0x00cd_0x03=constant +hwmon_in.int_cons_0x00cd_0x03=3630 + +hwmon_in.mode_0x00cd_0x05=constant +hwmon_in.int_cons_0x00cd_0x05=2970 + +monitor_flag_hwmon_in.mode_0x00cd_0x00=constant +monitor_flag_hwmon_in.int_cons_0x00cd_0x00=1 + + +# vol sensor 206 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x00ce_0x00=config +hwmon_in.src_0x00ce_0x00=logic_file +hwmon_in.int_cons_0x00ce_0x00=0 +hwmon_in.frmt_0x00ce_0x00=num_bytes +hwmon_in.fpath_0x00ce_0x00=/dev/cpld8 +hwmon_in.addr_0x00ce_0x00=0xea +hwmon_in.len_0x00ce_0x00=2 +hwmon_in.int_extra1_0x00ce_0x00=0 +hwmon_in.int_extra2_0x00ce_0x00=2000 +hwmon_in.int_extra3_0x00ce_0x00=1 + +hwmon_in.mode_0x00ce_0x01=str_constant +hwmon_in.str_cons_0x00ce_0x01=CPLD_03_DFANB_VDD3V3_V + +hwmon_in.mode_0x00ce_0x02=str_constant +hwmon_in.str_cons_0x00ce_0x02=CPLD_03 + +hwmon_in.mode_0x00ce_0x03=constant +hwmon_in.int_cons_0x00ce_0x03=3630 + +hwmon_in.mode_0x00ce_0x05=constant +hwmon_in.int_cons_0x00ce_0x05=2970 + +monitor_flag_hwmon_in.mode_0x00ce_0x00=constant +monitor_flag_hwmon_in.int_cons_0x00ce_0x00=1 + + +# vol sensor 207 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x00cf_0x00=config +hwmon_in.src_0x00cf_0x00=logic_file +hwmon_in.int_cons_0x00cf_0x00=0 +hwmon_in.frmt_0x00cf_0x00=num_bytes +hwmon_in.fpath_0x00cf_0x00=/dev/cpld8 +hwmon_in.addr_0x00cf_0x00=0xec +hwmon_in.len_0x00cf_0x00=2 +hwmon_in.int_extra1_0x00cf_0x00=0 +hwmon_in.int_extra2_0x00cf_0x00=2000 +hwmon_in.int_extra3_0x00cf_0x00=1 + +hwmon_in.mode_0x00cf_0x01=str_constant +hwmon_in.str_cons_0x00cf_0x01=CPLD_03_DFANC_VDD3V3_V + +hwmon_in.mode_0x00cf_0x02=str_constant +hwmon_in.str_cons_0x00cf_0x02=CPLD_03 + +hwmon_in.mode_0x00cf_0x03=constant +hwmon_in.int_cons_0x00cf_0x03=3630 + +hwmon_in.mode_0x00cf_0x05=constant +hwmon_in.int_cons_0x00cf_0x05=2970 + +monitor_flag_hwmon_in.mode_0x00cf_0x00=constant +monitor_flag_hwmon_in.int_cons_0x00cf_0x00=1 + + +# vol sensor 208 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x00d0_0x00=config +hwmon_in.src_0x00d0_0x00=logic_file +hwmon_in.int_cons_0x00d0_0x00=0 +hwmon_in.frmt_0x00d0_0x00=num_bytes +hwmon_in.fpath_0x00d0_0x00=/dev/cpld8 +hwmon_in.addr_0x00d0_0x00=0xee +hwmon_in.len_0x00d0_0x00=2 +hwmon_in.int_extra1_0x00d0_0x00=0 +hwmon_in.int_extra2_0x00d0_0x00=2000 +hwmon_in.int_extra3_0x00d0_0x00=1 + +hwmon_in.mode_0x00d0_0x01=str_constant +hwmon_in.str_cons_0x00d0_0x01=CPLD_03_DFAND_VDD3V3_V + +hwmon_in.mode_0x00d0_0x02=str_constant +hwmon_in.str_cons_0x00d0_0x02=CPLD_03 + +hwmon_in.mode_0x00d0_0x03=constant +hwmon_in.int_cons_0x00d0_0x03=3630 + +hwmon_in.mode_0x00d0_0x05=constant +hwmon_in.int_cons_0x00d0_0x05=2970 + +monitor_flag_hwmon_in.mode_0x00d0_0x00=constant +monitor_flag_hwmon_in.int_cons_0x00d0_0x00=1 + + +# vol sensor 209 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x00d1_0x00=config +hwmon_in.src_0x00d1_0x00=logic_file +hwmon_in.int_cons_0x00d1_0x00=0 +hwmon_in.frmt_0x00d1_0x00=num_bytes +hwmon_in.fpath_0x00d1_0x00=/dev/cpld8 +hwmon_in.addr_0x00d1_0x00=0xe0 +hwmon_in.len_0x00d1_0x00=2 +hwmon_in.int_extra1_0x00d1_0x00=0 +hwmon_in.int_extra2_0x00d1_0x00=7096 +hwmon_in.int_extra3_0x00d1_0x00=1 + +hwmon_in.mode_0x00d1_0x01=str_constant +hwmon_in.str_cons_0x00d1_0x01=CPLD_03_DFAN_VDD12V_1_V + +hwmon_in.mode_0x00d1_0x02=str_constant +hwmon_in.str_cons_0x00d1_0x02=CPLD_03 + +hwmon_in.mode_0x00d1_0x03=constant +hwmon_in.int_cons_0x00d1_0x03=13200 + +hwmon_in.mode_0x00d1_0x05=constant +hwmon_in.int_cons_0x00d1_0x05=10800 + +monitor_flag_hwmon_in.mode_0x00d1_0x00=constant +monitor_flag_hwmon_in.int_cons_0x00d1_0x00=1 + + +# vol sensor 210 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x00d2_0x00=config +hwmon_in.src_0x00d2_0x00=logic_file +hwmon_in.int_cons_0x00d2_0x00=0 +hwmon_in.frmt_0x00d2_0x00=num_bytes +hwmon_in.fpath_0x00d2_0x00=/dev/cpld8 +hwmon_in.addr_0x00d2_0x00=0xe2 +hwmon_in.len_0x00d2_0x00=2 +hwmon_in.int_extra1_0x00d2_0x00=0 +hwmon_in.int_extra2_0x00d2_0x00=7096 +hwmon_in.int_extra3_0x00d2_0x00=1 + +hwmon_in.mode_0x00d2_0x01=str_constant +hwmon_in.str_cons_0x00d2_0x01=CPLD_03_DFAN_VDD12V_2_V + +hwmon_in.mode_0x00d2_0x02=str_constant +hwmon_in.str_cons_0x00d2_0x02=CPLD_03 + +hwmon_in.mode_0x00d2_0x03=constant +hwmon_in.int_cons_0x00d2_0x03=13200 + +hwmon_in.mode_0x00d2_0x05=constant +hwmon_in.int_cons_0x00d2_0x05=10800 + +monitor_flag_hwmon_in.mode_0x00d2_0x00=constant +monitor_flag_hwmon_in.int_cons_0x00d2_0x00=1 + + +# vol sensor 211 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x00d3_0x00=config +hwmon_in.src_0x00d3_0x00=logic_file +hwmon_in.int_cons_0x00d3_0x00=0 +hwmon_in.frmt_0x00d3_0x00=num_bytes +hwmon_in.fpath_0x00d3_0x00=/dev/cpld8 +hwmon_in.addr_0x00d3_0x00=0xe4 +hwmon_in.len_0x00d3_0x00=2 +hwmon_in.int_extra1_0x00d3_0x00=0 +hwmon_in.int_extra2_0x00d3_0x00=7096 +hwmon_in.int_extra3_0x00d3_0x00=1 + +hwmon_in.mode_0x00d3_0x01=str_constant +hwmon_in.str_cons_0x00d3_0x01=CPLD_03_DFAN_VDD12V_3_V + +hwmon_in.mode_0x00d3_0x02=str_constant +hwmon_in.str_cons_0x00d3_0x02=CPLD_03 + +hwmon_in.mode_0x00d3_0x03=constant +hwmon_in.int_cons_0x00d3_0x03=13200 + +hwmon_in.mode_0x00d3_0x05=constant +hwmon_in.int_cons_0x00d3_0x05=10800 + +monitor_flag_hwmon_in.mode_0x00d3_0x00=constant +monitor_flag_hwmon_in.int_cons_0x00d3_0x00=1 + + +# vol sensor 212 alias(0x01) type(0x02) max(0x03) min(0x05) range(0x07) nominal_value(0x08) +# high(0x09) low(0x0a) notice_high(0x0b) notice_low(0x0c) monitor_flag +hwmon_in.mode_0x00d4_0x00=config +hwmon_in.src_0x00d4_0x00=logic_file +hwmon_in.int_cons_0x00d4_0x00=0 +hwmon_in.frmt_0x00d4_0x00=num_bytes +hwmon_in.fpath_0x00d4_0x00=/dev/cpld8 +hwmon_in.addr_0x00d4_0x00=0xe6 +hwmon_in.len_0x00d4_0x00=2 +hwmon_in.int_extra1_0x00d4_0x00=0 +hwmon_in.int_extra2_0x00d4_0x00=7096 +hwmon_in.int_extra3_0x00d4_0x00=1 + +hwmon_in.mode_0x00d4_0x01=str_constant +hwmon_in.str_cons_0x00d4_0x01=CPLD_03_DFAN_VDD12V_4_V + +hwmon_in.mode_0x00d4_0x02=str_constant +hwmon_in.str_cons_0x00d4_0x02=CPLD_03 + +hwmon_in.mode_0x00d4_0x03=constant +hwmon_in.int_cons_0x00d4_0x03=13200 + +hwmon_in.mode_0x00d4_0x05=constant +hwmon_in.int_cons_0x00d4_0x05=10800 + +monitor_flag_hwmon_in.mode_0x00d4_0x00=constant +monitor_flag_hwmon_in.int_cons_0x00d4_0x00=1 diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/s3ip_sysfs_cfg/cfg_file/SFF.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/s3ip_sysfs_cfg/cfg_file/SFF.cfg new file mode 100644 index 00000000000..0881381f2b9 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/s3ip_sysfs_cfg/cfg_file/SFF.cfg @@ -0,0 +1,6527 @@ +# +# @Fill in the agreement +# 1. Complete comments must be filled in before configuration items. Comments must not be filled in the same line of +# configuration items and invalid Spaces must not be added between configuration items +# 2. The value can be in 10 or hexadecimal format. The hexadecimal value starts with "0x" +# 3. Some configuration items do not need to be filled in a specific product. To facilitate other products to copy and +# fill in the configuration items, do not delete them +# 4. Configuration item + +# Configuration item: Number of optical modules +# Description: Format dev_num_[main_dev]_[minor_dev] +# Note: main_dev,optical module is 3, minor_dev, 0:does not exist +dev_num_3_0=130 + +# Configuration items: optical module EEPROM sysfs path +# Description: Format eeprom_path_[main_dev]_[index] +# Note: main_dev,optical module is 3, index, Optical module index, starting from 1 + +eeprom_size_3_1=0x8180 +eeprom_size_3_2=0x8180 +eeprom_size_3_3=0x8180 +eeprom_size_3_4=0x8180 +eeprom_size_3_5=0x8180 +eeprom_size_3_6=0x8180 +eeprom_size_3_7=0x8180 +eeprom_size_3_8=0x8180 +eeprom_size_3_9=0x8180 +eeprom_size_3_10=0x8180 +eeprom_size_3_11=0x8180 +eeprom_size_3_12=0x8180 +eeprom_size_3_13=0x8180 +eeprom_size_3_14=0x8180 +eeprom_size_3_15=0x8180 +eeprom_size_3_16=0x8180 +eeprom_size_3_17=0x8180 +eeprom_size_3_18=0x8180 +eeprom_size_3_19=0x8180 +eeprom_size_3_20=0x8180 +eeprom_size_3_21=0x8180 +eeprom_size_3_22=0x8180 +eeprom_size_3_23=0x8180 +eeprom_size_3_24=0x8180 +eeprom_size_3_25=0x8180 +eeprom_size_3_26=0x8180 +eeprom_size_3_27=0x8180 +eeprom_size_3_28=0x8180 +eeprom_size_3_29=0x8180 +eeprom_size_3_30=0x8180 +eeprom_size_3_31=0x8180 +eeprom_size_3_32=0x8180 +eeprom_size_3_33=0x8180 +eeprom_size_3_34=0x8180 +eeprom_size_3_35=0x8180 +eeprom_size_3_36=0x8180 +eeprom_size_3_37=0x8180 +eeprom_size_3_38=0x8180 +eeprom_size_3_39=0x8180 +eeprom_size_3_40=0x8180 +eeprom_size_3_41=0x8180 +eeprom_size_3_42=0x8180 +eeprom_size_3_43=0x8180 +eeprom_size_3_44=0x8180 +eeprom_size_3_45=0x8180 +eeprom_size_3_46=0x8180 +eeprom_size_3_47=0x8180 +eeprom_size_3_48=0x8180 +eeprom_size_3_49=0x8180 +eeprom_size_3_50=0x8180 +eeprom_size_3_51=0x8180 +eeprom_size_3_52=0x8180 +eeprom_size_3_53=0x8180 +eeprom_size_3_54=0x8180 +eeprom_size_3_55=0x8180 +eeprom_size_3_56=0x8180 +eeprom_size_3_57=0x8180 +eeprom_size_3_58=0x8180 +eeprom_size_3_59=0x8180 +eeprom_size_3_60=0x8180 +eeprom_size_3_61=0x8180 +eeprom_size_3_62=0x8180 +eeprom_size_3_63=0x8180 +eeprom_size_3_64=0x8180 +eeprom_size_3_65=0x8180 +eeprom_size_3_66=0x8180 +eeprom_size_3_67=0x8180 +eeprom_size_3_68=0x8180 +eeprom_size_3_69=0x8180 +eeprom_size_3_70=0x8180 +eeprom_size_3_71=0x8180 +eeprom_size_3_72=0x8180 +eeprom_size_3_73=0x8180 +eeprom_size_3_74=0x8180 +eeprom_size_3_75=0x8180 +eeprom_size_3_76=0x8180 +eeprom_size_3_77=0x8180 +eeprom_size_3_78=0x8180 +eeprom_size_3_79=0x8180 +eeprom_size_3_80=0x8180 +eeprom_size_3_81=0x8180 +eeprom_size_3_82=0x8180 +eeprom_size_3_83=0x8180 +eeprom_size_3_84=0x8180 +eeprom_size_3_85=0x8180 +eeprom_size_3_86=0x8180 +eeprom_size_3_87=0x8180 +eeprom_size_3_88=0x8180 +eeprom_size_3_89=0x8180 +eeprom_size_3_90=0x8180 +eeprom_size_3_91=0x8180 +eeprom_size_3_92=0x8180 +eeprom_size_3_93=0x8180 +eeprom_size_3_94=0x8180 +eeprom_size_3_95=0x8180 +eeprom_size_3_96=0x8180 +eeprom_size_3_97=0x8180 +eeprom_size_3_98=0x8180 +eeprom_size_3_99=0x8180 +eeprom_size_3_100=0x8180 +eeprom_size_3_101=0x8180 +eeprom_size_3_102=0x8180 +eeprom_size_3_103=0x8180 +eeprom_size_3_104=0x8180 +eeprom_size_3_105=0x8180 +eeprom_size_3_106=0x8180 +eeprom_size_3_107=0x8180 +eeprom_size_3_108=0x8180 +eeprom_size_3_109=0x8180 +eeprom_size_3_110=0x8180 +eeprom_size_3_111=0x8180 +eeprom_size_3_112=0x8180 +eeprom_size_3_113=0x8180 +eeprom_size_3_114=0x8180 +eeprom_size_3_115=0x8180 +eeprom_size_3_116=0x8180 +eeprom_size_3_117=0x8180 +eeprom_size_3_118=0x8180 +eeprom_size_3_119=0x8180 +eeprom_size_3_120=0x8180 +eeprom_size_3_121=0x8180 +eeprom_size_3_122=0x8180 +eeprom_size_3_123=0x8180 +eeprom_size_3_124=0x8180 +eeprom_size_3_125=0x8180 +eeprom_size_3_126=0x8180 +eeprom_size_3_127=0x8180 +eeprom_size_3_128=0x8180 +eeprom_size_3_129=0x8180 +eeprom_size_3_130=0x8180 + +eeprom_path_3_1=/sys/bus/i2c/devices/201-0050/eeprom +eeprom_path_3_2=/sys/bus/i2c/devices/202-0050/eeprom +eeprom_path_3_3=/sys/bus/i2c/devices/203-0050/eeprom +eeprom_path_3_4=/sys/bus/i2c/devices/204-0050/eeprom +eeprom_path_3_5=/sys/bus/i2c/devices/205-0050/eeprom +eeprom_path_3_6=/sys/bus/i2c/devices/206-0050/eeprom +eeprom_path_3_7=/sys/bus/i2c/devices/207-0050/eeprom +eeprom_path_3_8=/sys/bus/i2c/devices/208-0050/eeprom +eeprom_path_3_9=/sys/bus/i2c/devices/209-0050/eeprom +eeprom_path_3_10=/sys/bus/i2c/devices/210-0050/eeprom +eeprom_path_3_11=/sys/bus/i2c/devices/211-0050/eeprom +eeprom_path_3_12=/sys/bus/i2c/devices/212-0050/eeprom +eeprom_path_3_13=/sys/bus/i2c/devices/213-0050/eeprom +eeprom_path_3_14=/sys/bus/i2c/devices/214-0050/eeprom +eeprom_path_3_15=/sys/bus/i2c/devices/215-0050/eeprom +eeprom_path_3_16=/sys/bus/i2c/devices/216-0050/eeprom +eeprom_path_3_17=/sys/bus/i2c/devices/217-0050/eeprom +eeprom_path_3_18=/sys/bus/i2c/devices/218-0050/eeprom +eeprom_path_3_19=/sys/bus/i2c/devices/219-0050/eeprom +eeprom_path_3_20=/sys/bus/i2c/devices/220-0050/eeprom +eeprom_path_3_21=/sys/bus/i2c/devices/221-0050/eeprom +eeprom_path_3_22=/sys/bus/i2c/devices/222-0050/eeprom +eeprom_path_3_23=/sys/bus/i2c/devices/223-0050/eeprom +eeprom_path_3_24=/sys/bus/i2c/devices/224-0050/eeprom +eeprom_path_3_25=/sys/bus/i2c/devices/225-0050/eeprom +eeprom_path_3_26=/sys/bus/i2c/devices/226-0050/eeprom +eeprom_path_3_27=/sys/bus/i2c/devices/227-0050/eeprom +eeprom_path_3_28=/sys/bus/i2c/devices/228-0050/eeprom +eeprom_path_3_29=/sys/bus/i2c/devices/229-0050/eeprom +eeprom_path_3_30=/sys/bus/i2c/devices/230-0050/eeprom +eeprom_path_3_31=/sys/bus/i2c/devices/231-0050/eeprom +eeprom_path_3_32=/sys/bus/i2c/devices/232-0050/eeprom +eeprom_path_3_33=/sys/bus/i2c/devices/233-0050/eeprom +eeprom_path_3_34=/sys/bus/i2c/devices/234-0050/eeprom +eeprom_path_3_35=/sys/bus/i2c/devices/235-0050/eeprom +eeprom_path_3_36=/sys/bus/i2c/devices/236-0050/eeprom +eeprom_path_3_37=/sys/bus/i2c/devices/237-0050/eeprom +eeprom_path_3_38=/sys/bus/i2c/devices/238-0050/eeprom +eeprom_path_3_39=/sys/bus/i2c/devices/239-0050/eeprom +eeprom_path_3_40=/sys/bus/i2c/devices/240-0050/eeprom +eeprom_path_3_41=/sys/bus/i2c/devices/241-0050/eeprom +eeprom_path_3_42=/sys/bus/i2c/devices/242-0050/eeprom +eeprom_path_3_43=/sys/bus/i2c/devices/243-0050/eeprom +eeprom_path_3_44=/sys/bus/i2c/devices/244-0050/eeprom +eeprom_path_3_45=/sys/bus/i2c/devices/245-0050/eeprom +eeprom_path_3_46=/sys/bus/i2c/devices/246-0050/eeprom +eeprom_path_3_47=/sys/bus/i2c/devices/247-0050/eeprom +eeprom_path_3_48=/sys/bus/i2c/devices/248-0050/eeprom +eeprom_path_3_49=/sys/bus/i2c/devices/249-0050/eeprom +eeprom_path_3_50=/sys/bus/i2c/devices/250-0050/eeprom +eeprom_path_3_51=/sys/bus/i2c/devices/251-0050/eeprom +eeprom_path_3_52=/sys/bus/i2c/devices/252-0050/eeprom +eeprom_path_3_53=/sys/bus/i2c/devices/253-0050/eeprom +eeprom_path_3_54=/sys/bus/i2c/devices/254-0050/eeprom +eeprom_path_3_55=/sys/bus/i2c/devices/255-0050/eeprom +eeprom_path_3_56=/sys/bus/i2c/devices/256-0050/eeprom +eeprom_path_3_57=/sys/bus/i2c/devices/257-0050/eeprom +eeprom_path_3_58=/sys/bus/i2c/devices/258-0050/eeprom +eeprom_path_3_59=/sys/bus/i2c/devices/259-0050/eeprom +eeprom_path_3_60=/sys/bus/i2c/devices/260-0050/eeprom +eeprom_path_3_61=/sys/bus/i2c/devices/261-0050/eeprom +eeprom_path_3_62=/sys/bus/i2c/devices/262-0050/eeprom +eeprom_path_3_63=/sys/bus/i2c/devices/263-0050/eeprom +eeprom_path_3_64=/sys/bus/i2c/devices/264-0050/eeprom +eeprom_path_3_65=/sys/bus/i2c/devices/265-0050/eeprom +eeprom_path_3_66=/sys/bus/i2c/devices/266-0050/eeprom +eeprom_path_3_67=/sys/bus/i2c/devices/267-0050/eeprom +eeprom_path_3_68=/sys/bus/i2c/devices/268-0050/eeprom +eeprom_path_3_69=/sys/bus/i2c/devices/269-0050/eeprom +eeprom_path_3_70=/sys/bus/i2c/devices/270-0050/eeprom +eeprom_path_3_71=/sys/bus/i2c/devices/271-0050/eeprom +eeprom_path_3_72=/sys/bus/i2c/devices/272-0050/eeprom +eeprom_path_3_73=/sys/bus/i2c/devices/273-0050/eeprom +eeprom_path_3_74=/sys/bus/i2c/devices/274-0050/eeprom +eeprom_path_3_75=/sys/bus/i2c/devices/275-0050/eeprom +eeprom_path_3_76=/sys/bus/i2c/devices/276-0050/eeprom +eeprom_path_3_77=/sys/bus/i2c/devices/277-0050/eeprom +eeprom_path_3_78=/sys/bus/i2c/devices/278-0050/eeprom +eeprom_path_3_79=/sys/bus/i2c/devices/279-0050/eeprom +eeprom_path_3_80=/sys/bus/i2c/devices/280-0050/eeprom +eeprom_path_3_81=/sys/bus/i2c/devices/281-0050/eeprom +eeprom_path_3_82=/sys/bus/i2c/devices/282-0050/eeprom +eeprom_path_3_83=/sys/bus/i2c/devices/283-0050/eeprom +eeprom_path_3_84=/sys/bus/i2c/devices/284-0050/eeprom +eeprom_path_3_85=/sys/bus/i2c/devices/285-0050/eeprom +eeprom_path_3_86=/sys/bus/i2c/devices/286-0050/eeprom +eeprom_path_3_87=/sys/bus/i2c/devices/287-0050/eeprom +eeprom_path_3_88=/sys/bus/i2c/devices/288-0050/eeprom +eeprom_path_3_89=/sys/bus/i2c/devices/289-0050/eeprom +eeprom_path_3_90=/sys/bus/i2c/devices/290-0050/eeprom +eeprom_path_3_91=/sys/bus/i2c/devices/291-0050/eeprom +eeprom_path_3_92=/sys/bus/i2c/devices/292-0050/eeprom +eeprom_path_3_93=/sys/bus/i2c/devices/293-0050/eeprom +eeprom_path_3_94=/sys/bus/i2c/devices/294-0050/eeprom +eeprom_path_3_95=/sys/bus/i2c/devices/295-0050/eeprom +eeprom_path_3_96=/sys/bus/i2c/devices/296-0050/eeprom +eeprom_path_3_97=/sys/bus/i2c/devices/297-0050/eeprom +eeprom_path_3_98=/sys/bus/i2c/devices/298-0050/eeprom +eeprom_path_3_99=/sys/bus/i2c/devices/299-0050/eeprom +eeprom_path_3_100=/sys/bus/i2c/devices/300-0050/eeprom +eeprom_path_3_101=/sys/bus/i2c/devices/301-0050/eeprom +eeprom_path_3_102=/sys/bus/i2c/devices/302-0050/eeprom +eeprom_path_3_103=/sys/bus/i2c/devices/303-0050/eeprom +eeprom_path_3_104=/sys/bus/i2c/devices/304-0050/eeprom +eeprom_path_3_105=/sys/bus/i2c/devices/305-0050/eeprom +eeprom_path_3_106=/sys/bus/i2c/devices/306-0050/eeprom +eeprom_path_3_107=/sys/bus/i2c/devices/307-0050/eeprom +eeprom_path_3_108=/sys/bus/i2c/devices/308-0050/eeprom +eeprom_path_3_109=/sys/bus/i2c/devices/309-0050/eeprom +eeprom_path_3_110=/sys/bus/i2c/devices/310-0050/eeprom +eeprom_path_3_111=/sys/bus/i2c/devices/311-0050/eeprom +eeprom_path_3_112=/sys/bus/i2c/devices/312-0050/eeprom +eeprom_path_3_113=/sys/bus/i2c/devices/313-0050/eeprom +eeprom_path_3_114=/sys/bus/i2c/devices/314-0050/eeprom +eeprom_path_3_115=/sys/bus/i2c/devices/315-0050/eeprom +eeprom_path_3_116=/sys/bus/i2c/devices/316-0050/eeprom +eeprom_path_3_117=/sys/bus/i2c/devices/317-0050/eeprom +eeprom_path_3_118=/sys/bus/i2c/devices/318-0050/eeprom +eeprom_path_3_119=/sys/bus/i2c/devices/319-0050/eeprom +eeprom_path_3_120=/sys/bus/i2c/devices/320-0050/eeprom +eeprom_path_3_121=/sys/bus/i2c/devices/321-0050/eeprom +eeprom_path_3_122=/sys/bus/i2c/devices/322-0050/eeprom +eeprom_path_3_123=/sys/bus/i2c/devices/323-0050/eeprom +eeprom_path_3_124=/sys/bus/i2c/devices/324-0050/eeprom +eeprom_path_3_125=/sys/bus/i2c/devices/325-0050/eeprom +eeprom_path_3_126=/sys/bus/i2c/devices/326-0050/eeprom +eeprom_path_3_127=/sys/bus/i2c/devices/327-0050/eeprom +eeprom_path_3_128=/sys/bus/i2c/devices/328-0050/eeprom +eeprom_path_3_129=/sys/bus/i2c/devices/329-0050/eeprom +eeprom_path_3_130=/sys/bus/i2c/devices/330-0050/eeprom + +# 1:SFP 2:QSFP, 3:CMIS(QSFP-DD), 4:rj45 +sff_cage_type_1=3 +sff_cage_type_2=3 +sff_cage_type_3=3 +sff_cage_type_4=3 +sff_cage_type_5=3 +sff_cage_type_6=3 +sff_cage_type_7=3 +sff_cage_type_8=3 +sff_cage_type_9=3 +sff_cage_type_10=3 +sff_cage_type_11=3 +sff_cage_type_12=3 +sff_cage_type_13=3 +sff_cage_type_14=3 +sff_cage_type_15=3 +sff_cage_type_16=3 +sff_cage_type_17=3 +sff_cage_type_18=3 +sff_cage_type_19=3 +sff_cage_type_20=3 +sff_cage_type_21=3 +sff_cage_type_22=3 +sff_cage_type_23=3 +sff_cage_type_24=3 +sff_cage_type_25=3 +sff_cage_type_26=3 +sff_cage_type_27=3 +sff_cage_type_28=3 +sff_cage_type_29=3 +sff_cage_type_30=3 +sff_cage_type_31=3 +sff_cage_type_32=3 +sff_cage_type_33=3 +sff_cage_type_34=3 +sff_cage_type_35=3 +sff_cage_type_36=3 +sff_cage_type_37=3 +sff_cage_type_38=3 +sff_cage_type_39=3 +sff_cage_type_40=3 +sff_cage_type_41=3 +sff_cage_type_42=3 +sff_cage_type_43=3 +sff_cage_type_44=3 +sff_cage_type_45=3 +sff_cage_type_46=3 +sff_cage_type_47=3 +sff_cage_type_48=3 +sff_cage_type_49=3 +sff_cage_type_50=3 +sff_cage_type_51=3 +sff_cage_type_52=3 +sff_cage_type_53=3 +sff_cage_type_54=3 +sff_cage_type_55=3 +sff_cage_type_56=3 +sff_cage_type_57=3 +sff_cage_type_58=3 +sff_cage_type_59=3 +sff_cage_type_60=3 +sff_cage_type_61=3 +sff_cage_type_62=3 +sff_cage_type_63=3 +sff_cage_type_64=3 +sff_cage_type_65=3 +sff_cage_type_66=3 +sff_cage_type_67=3 +sff_cage_type_68=3 +sff_cage_type_69=3 +sff_cage_type_70=3 +sff_cage_type_71=3 +sff_cage_type_72=3 +sff_cage_type_73=3 +sff_cage_type_74=3 +sff_cage_type_75=3 +sff_cage_type_76=3 +sff_cage_type_77=3 +sff_cage_type_78=3 +sff_cage_type_79=3 +sff_cage_type_80=3 +sff_cage_type_81=3 +sff_cage_type_82=3 +sff_cage_type_83=3 +sff_cage_type_84=3 +sff_cage_type_85=3 +sff_cage_type_86=3 +sff_cage_type_87=3 +sff_cage_type_88=3 +sff_cage_type_89=3 +sff_cage_type_90=3 +sff_cage_type_91=3 +sff_cage_type_92=3 +sff_cage_type_93=3 +sff_cage_type_94=3 +sff_cage_type_95=3 +sff_cage_type_96=3 +sff_cage_type_97=3 +sff_cage_type_98=3 +sff_cage_type_99=3 +sff_cage_type_100=3 +sff_cage_type_101=3 +sff_cage_type_102=3 +sff_cage_type_103=3 +sff_cage_type_104=3 +sff_cage_type_105=3 +sff_cage_type_106=3 +sff_cage_type_107=3 +sff_cage_type_108=3 +sff_cage_type_109=3 +sff_cage_type_110=3 +sff_cage_type_111=3 +sff_cage_type_112=3 +sff_cage_type_113=3 +sff_cage_type_114=3 +sff_cage_type_115=3 +sff_cage_type_116=3 +sff_cage_type_117=3 +sff_cage_type_118=3 +sff_cage_type_119=3 +sff_cage_type_120=3 +sff_cage_type_121=3 +sff_cage_type_122=3 +sff_cage_type_123=3 +sff_cage_type_124=3 +sff_cage_type_125=3 +sff_cage_type_126=3 +sff_cage_type_127=3 +sff_cage_type_128=3 +sff_cage_type_129=2 +sff_cage_type_130=1 + +# Configuration items: Optical module CPLD register +# Description: Format sff_cpld_reg_[sff_index]_[cpld_reg] +# Note: sff_index indicates the optical module number, starting from 1. 0 indicates that the power_on register is useful +# cpld_reg 1:power_on 2:tx_fault, 3:tx_dis 4:reserve 5:rx_los +# 6:reset 7:lpmode 8:module_present 9:interrupt + +# 800G module reset signal +reg_key_0x0306_0x00=0x01 +reg_key_0x0306_0x01=0x00 + +sysfs_decode_0x0306_0x00=1 +sysfs_decode_0x0306_0x01=0 + +sff_cpld_reg.mode_1_6=config +sff_cpld_reg.src_1_6=logic_file +sff_cpld_reg.frmt_1_6=byte +sff_cpld_reg.pola_1_6=positive +sff_cpld_reg.fpath_1_6=/dev/cpld5 +sff_cpld_reg.addr_1_6=0x50 +sff_cpld_reg.len_1_6=1 +sff_cpld_reg.val_type_1_6=nega_key + +sff_cpld_reg.mode_2_6=config +sff_cpld_reg.src_2_6=logic_file +sff_cpld_reg.frmt_2_6=byte +sff_cpld_reg.pola_2_6=positive +sff_cpld_reg.fpath_2_6=/dev/cpld5 +sff_cpld_reg.addr_2_6=0x51 +sff_cpld_reg.len_2_6=1 +sff_cpld_reg.val_type_2_6=nega_key + +sff_cpld_reg.mode_3_6=config +sff_cpld_reg.src_3_6=logic_file +sff_cpld_reg.frmt_3_6=byte +sff_cpld_reg.pola_3_6=positive +sff_cpld_reg.fpath_3_6=/dev/cpld5 +sff_cpld_reg.addr_3_6=0x52 +sff_cpld_reg.len_3_6=1 +sff_cpld_reg.val_type_3_6=nega_key + +sff_cpld_reg.mode_4_6=config +sff_cpld_reg.src_4_6=logic_file +sff_cpld_reg.frmt_4_6=byte +sff_cpld_reg.pola_4_6=positive +sff_cpld_reg.fpath_4_6=/dev/cpld5 +sff_cpld_reg.addr_4_6=0x53 +sff_cpld_reg.len_4_6=1 +sff_cpld_reg.val_type_4_6=nega_key + +sff_cpld_reg.mode_5_6=config +sff_cpld_reg.src_5_6=logic_file +sff_cpld_reg.frmt_5_6=byte +sff_cpld_reg.pola_5_6=positive +sff_cpld_reg.fpath_5_6=/dev/cpld5 +sff_cpld_reg.addr_5_6=0x54 +sff_cpld_reg.len_5_6=1 +sff_cpld_reg.val_type_5_6=nega_key + +sff_cpld_reg.mode_6_6=config +sff_cpld_reg.src_6_6=logic_file +sff_cpld_reg.frmt_6_6=byte +sff_cpld_reg.pola_6_6=positive +sff_cpld_reg.fpath_6_6=/dev/cpld5 +sff_cpld_reg.addr_6_6=0x55 +sff_cpld_reg.len_6_6=1 +sff_cpld_reg.val_type_6_6=nega_key + +sff_cpld_reg.mode_7_6=config +sff_cpld_reg.src_7_6=logic_file +sff_cpld_reg.frmt_7_6=byte +sff_cpld_reg.pola_7_6=positive +sff_cpld_reg.fpath_7_6=/dev/cpld5 +sff_cpld_reg.addr_7_6=0x56 +sff_cpld_reg.len_7_6=1 +sff_cpld_reg.val_type_7_6=nega_key + +sff_cpld_reg.mode_8_6=config +sff_cpld_reg.src_8_6=logic_file +sff_cpld_reg.frmt_8_6=byte +sff_cpld_reg.pola_8_6=positive +sff_cpld_reg.fpath_8_6=/dev/cpld5 +sff_cpld_reg.addr_8_6=0x57 +sff_cpld_reg.len_8_6=1 +sff_cpld_reg.val_type_8_6=nega_key + +sff_cpld_reg.mode_9_6=config +sff_cpld_reg.src_9_6=logic_file +sff_cpld_reg.frmt_9_6=byte +sff_cpld_reg.pola_9_6=positive +sff_cpld_reg.fpath_9_6=/dev/cpld5 +sff_cpld_reg.addr_9_6=0x58 +sff_cpld_reg.len_9_6=1 +sff_cpld_reg.val_type_9_6=nega_key + +sff_cpld_reg.mode_10_6=config +sff_cpld_reg.src_10_6=logic_file +sff_cpld_reg.frmt_10_6=byte +sff_cpld_reg.pola_10_6=positive +sff_cpld_reg.fpath_10_6=/dev/cpld5 +sff_cpld_reg.addr_10_6=0x59 +sff_cpld_reg.len_10_6=1 +sff_cpld_reg.val_type_10_6=nega_key + +sff_cpld_reg.mode_11_6=config +sff_cpld_reg.src_11_6=logic_file +sff_cpld_reg.frmt_11_6=byte +sff_cpld_reg.pola_11_6=positive +sff_cpld_reg.fpath_11_6=/dev/cpld5 +sff_cpld_reg.addr_11_6=0x5a +sff_cpld_reg.len_11_6=1 +sff_cpld_reg.val_type_11_6=nega_key + +sff_cpld_reg.mode_12_6=config +sff_cpld_reg.src_12_6=logic_file +sff_cpld_reg.frmt_12_6=byte +sff_cpld_reg.pola_12_6=positive +sff_cpld_reg.fpath_12_6=/dev/cpld5 +sff_cpld_reg.addr_12_6=0x5b +sff_cpld_reg.len_12_6=1 +sff_cpld_reg.val_type_12_6=nega_key + +sff_cpld_reg.mode_13_6=config +sff_cpld_reg.src_13_6=logic_file +sff_cpld_reg.frmt_13_6=byte +sff_cpld_reg.pola_13_6=positive +sff_cpld_reg.fpath_13_6=/dev/cpld5 +sff_cpld_reg.addr_13_6=0x5c +sff_cpld_reg.len_13_6=1 +sff_cpld_reg.val_type_13_6=nega_key + +sff_cpld_reg.mode_14_6=config +sff_cpld_reg.src_14_6=logic_file +sff_cpld_reg.frmt_14_6=byte +sff_cpld_reg.pola_14_6=positive +sff_cpld_reg.fpath_14_6=/dev/cpld5 +sff_cpld_reg.addr_14_6=0x5d +sff_cpld_reg.len_14_6=1 +sff_cpld_reg.val_type_14_6=nega_key + +sff_cpld_reg.mode_15_6=config +sff_cpld_reg.src_15_6=logic_file +sff_cpld_reg.frmt_15_6=byte +sff_cpld_reg.pola_15_6=positive +sff_cpld_reg.fpath_15_6=/dev/cpld5 +sff_cpld_reg.addr_15_6=0x5e +sff_cpld_reg.len_15_6=1 +sff_cpld_reg.val_type_15_6=nega_key + +sff_cpld_reg.mode_16_6=config +sff_cpld_reg.src_16_6=logic_file +sff_cpld_reg.frmt_16_6=byte +sff_cpld_reg.pola_16_6=positive +sff_cpld_reg.fpath_16_6=/dev/cpld5 +sff_cpld_reg.addr_16_6=0x5f +sff_cpld_reg.len_16_6=1 +sff_cpld_reg.val_type_16_6=nega_key + +sff_cpld_reg.mode_17_6=config +sff_cpld_reg.src_17_6=logic_file +sff_cpld_reg.frmt_17_6=byte +sff_cpld_reg.pola_17_6=positive +sff_cpld_reg.fpath_17_6=/dev/cpld5 +sff_cpld_reg.addr_17_6=0x60 +sff_cpld_reg.len_17_6=1 +sff_cpld_reg.val_type_17_6=nega_key + +sff_cpld_reg.mode_18_6=config +sff_cpld_reg.src_18_6=logic_file +sff_cpld_reg.frmt_18_6=byte +sff_cpld_reg.pola_18_6=positive +sff_cpld_reg.fpath_18_6=/dev/cpld5 +sff_cpld_reg.addr_18_6=0x61 +sff_cpld_reg.len_18_6=1 +sff_cpld_reg.val_type_18_6=nega_key + +sff_cpld_reg.mode_19_6=config +sff_cpld_reg.src_19_6=logic_file +sff_cpld_reg.frmt_19_6=byte +sff_cpld_reg.pola_19_6=positive +sff_cpld_reg.fpath_19_6=/dev/cpld5 +sff_cpld_reg.addr_19_6=0x62 +sff_cpld_reg.len_19_6=1 +sff_cpld_reg.val_type_19_6=nega_key + +sff_cpld_reg.mode_20_6=config +sff_cpld_reg.src_20_6=logic_file +sff_cpld_reg.frmt_20_6=byte +sff_cpld_reg.pola_20_6=positive +sff_cpld_reg.fpath_20_6=/dev/cpld5 +sff_cpld_reg.addr_20_6=0x63 +sff_cpld_reg.len_20_6=1 +sff_cpld_reg.val_type_20_6=nega_key + +sff_cpld_reg.mode_21_6=config +sff_cpld_reg.src_21_6=logic_file +sff_cpld_reg.frmt_21_6=byte +sff_cpld_reg.pola_21_6=positive +sff_cpld_reg.fpath_21_6=/dev/cpld5 +sff_cpld_reg.addr_21_6=0x64 +sff_cpld_reg.len_21_6=1 +sff_cpld_reg.val_type_21_6=nega_key + +sff_cpld_reg.mode_22_6=config +sff_cpld_reg.src_22_6=logic_file +sff_cpld_reg.frmt_22_6=byte +sff_cpld_reg.pola_22_6=positive +sff_cpld_reg.fpath_22_6=/dev/cpld5 +sff_cpld_reg.addr_22_6=0x65 +sff_cpld_reg.len_22_6=1 +sff_cpld_reg.val_type_22_6=nega_key + +sff_cpld_reg.mode_23_6=config +sff_cpld_reg.src_23_6=logic_file +sff_cpld_reg.frmt_23_6=byte +sff_cpld_reg.pola_23_6=positive +sff_cpld_reg.fpath_23_6=/dev/cpld5 +sff_cpld_reg.addr_23_6=0x66 +sff_cpld_reg.len_23_6=1 +sff_cpld_reg.val_type_23_6=nega_key + +sff_cpld_reg.mode_24_6=config +sff_cpld_reg.src_24_6=logic_file +sff_cpld_reg.frmt_24_6=byte +sff_cpld_reg.pola_24_6=positive +sff_cpld_reg.fpath_24_6=/dev/cpld5 +sff_cpld_reg.addr_24_6=0x67 +sff_cpld_reg.len_24_6=1 +sff_cpld_reg.val_type_24_6=nega_key + +sff_cpld_reg.mode_25_6=config +sff_cpld_reg.src_25_6=logic_file +sff_cpld_reg.frmt_25_6=byte +sff_cpld_reg.pola_25_6=positive +sff_cpld_reg.fpath_25_6=/dev/cpld5 +sff_cpld_reg.addr_25_6=0x68 +sff_cpld_reg.len_25_6=1 +sff_cpld_reg.val_type_25_6=nega_key + +sff_cpld_reg.mode_26_6=config +sff_cpld_reg.src_26_6=logic_file +sff_cpld_reg.frmt_26_6=byte +sff_cpld_reg.pola_26_6=positive +sff_cpld_reg.fpath_26_6=/dev/cpld5 +sff_cpld_reg.addr_26_6=0x69 +sff_cpld_reg.len_26_6=1 +sff_cpld_reg.val_type_26_6=nega_key + +sff_cpld_reg.mode_27_6=config +sff_cpld_reg.src_27_6=logic_file +sff_cpld_reg.frmt_27_6=byte +sff_cpld_reg.pola_27_6=positive +sff_cpld_reg.fpath_27_6=/dev/cpld5 +sff_cpld_reg.addr_27_6=0x6a +sff_cpld_reg.len_27_6=1 +sff_cpld_reg.val_type_27_6=nega_key + +sff_cpld_reg.mode_28_6=config +sff_cpld_reg.src_28_6=logic_file +sff_cpld_reg.frmt_28_6=byte +sff_cpld_reg.pola_28_6=positive +sff_cpld_reg.fpath_28_6=/dev/cpld5 +sff_cpld_reg.addr_28_6=0x6b +sff_cpld_reg.len_28_6=1 +sff_cpld_reg.val_type_28_6=nega_key + +sff_cpld_reg.mode_29_6=config +sff_cpld_reg.src_29_6=logic_file +sff_cpld_reg.frmt_29_6=byte +sff_cpld_reg.pola_29_6=positive +sff_cpld_reg.fpath_29_6=/dev/cpld5 +sff_cpld_reg.addr_29_6=0x6c +sff_cpld_reg.len_29_6=1 +sff_cpld_reg.val_type_29_6=nega_key + +sff_cpld_reg.mode_30_6=config +sff_cpld_reg.src_30_6=logic_file +sff_cpld_reg.frmt_30_6=byte +sff_cpld_reg.pola_30_6=positive +sff_cpld_reg.fpath_30_6=/dev/cpld5 +sff_cpld_reg.addr_30_6=0x6d +sff_cpld_reg.len_30_6=1 +sff_cpld_reg.val_type_30_6=nega_key + +sff_cpld_reg.mode_31_6=config +sff_cpld_reg.src_31_6=logic_file +sff_cpld_reg.frmt_31_6=byte +sff_cpld_reg.pola_31_6=positive +sff_cpld_reg.fpath_31_6=/dev/cpld5 +sff_cpld_reg.addr_31_6=0x6e +sff_cpld_reg.len_31_6=1 +sff_cpld_reg.val_type_31_6=nega_key + +sff_cpld_reg.mode_32_6=config +sff_cpld_reg.src_32_6=logic_file +sff_cpld_reg.frmt_32_6=byte +sff_cpld_reg.pola_32_6=positive +sff_cpld_reg.fpath_32_6=/dev/cpld5 +sff_cpld_reg.addr_32_6=0x6f +sff_cpld_reg.len_32_6=1 +sff_cpld_reg.val_type_32_6=nega_key + +sff_cpld_reg.mode_33_6=config +sff_cpld_reg.src_33_6=logic_file +sff_cpld_reg.frmt_33_6=byte +sff_cpld_reg.pola_33_6=positive +sff_cpld_reg.fpath_33_6=/dev/cpld2 +sff_cpld_reg.addr_33_6=0x60 +sff_cpld_reg.len_33_6=1 +sff_cpld_reg.val_type_33_6=nega_key + +sff_cpld_reg.mode_34_6=config +sff_cpld_reg.src_34_6=logic_file +sff_cpld_reg.frmt_34_6=byte +sff_cpld_reg.pola_34_6=positive +sff_cpld_reg.fpath_34_6=/dev/cpld2 +sff_cpld_reg.addr_34_6=0x61 +sff_cpld_reg.len_34_6=1 +sff_cpld_reg.val_type_34_6=nega_key + +sff_cpld_reg.mode_35_6=config +sff_cpld_reg.src_35_6=logic_file +sff_cpld_reg.frmt_35_6=byte +sff_cpld_reg.pola_35_6=positive +sff_cpld_reg.fpath_35_6=/dev/cpld2 +sff_cpld_reg.addr_35_6=0x62 +sff_cpld_reg.len_35_6=1 +sff_cpld_reg.val_type_35_6=nega_key + +sff_cpld_reg.mode_36_6=config +sff_cpld_reg.src_36_6=logic_file +sff_cpld_reg.frmt_36_6=byte +sff_cpld_reg.pola_36_6=positive +sff_cpld_reg.fpath_36_6=/dev/cpld2 +sff_cpld_reg.addr_36_6=0x63 +sff_cpld_reg.len_36_6=1 +sff_cpld_reg.val_type_36_6=nega_key + +sff_cpld_reg.mode_37_6=config +sff_cpld_reg.src_37_6=logic_file +sff_cpld_reg.frmt_37_6=byte +sff_cpld_reg.pola_37_6=positive +sff_cpld_reg.fpath_37_6=/dev/cpld2 +sff_cpld_reg.addr_37_6=0x64 +sff_cpld_reg.len_37_6=1 +sff_cpld_reg.val_type_37_6=nega_key + +sff_cpld_reg.mode_38_6=config +sff_cpld_reg.src_38_6=logic_file +sff_cpld_reg.frmt_38_6=byte +sff_cpld_reg.pola_38_6=positive +sff_cpld_reg.fpath_38_6=/dev/cpld2 +sff_cpld_reg.addr_38_6=0x65 +sff_cpld_reg.len_38_6=1 +sff_cpld_reg.val_type_38_6=nega_key + +sff_cpld_reg.mode_39_6=config +sff_cpld_reg.src_39_6=logic_file +sff_cpld_reg.frmt_39_6=byte +sff_cpld_reg.pola_39_6=positive +sff_cpld_reg.fpath_39_6=/dev/cpld2 +sff_cpld_reg.addr_39_6=0x66 +sff_cpld_reg.len_39_6=1 +sff_cpld_reg.val_type_39_6=nega_key + +sff_cpld_reg.mode_40_6=config +sff_cpld_reg.src_40_6=logic_file +sff_cpld_reg.frmt_40_6=byte +sff_cpld_reg.pola_40_6=positive +sff_cpld_reg.fpath_40_6=/dev/cpld2 +sff_cpld_reg.addr_40_6=0x67 +sff_cpld_reg.len_40_6=1 +sff_cpld_reg.val_type_40_6=nega_key + +sff_cpld_reg.mode_41_6=config +sff_cpld_reg.src_41_6=logic_file +sff_cpld_reg.frmt_41_6=byte +sff_cpld_reg.pola_41_6=positive +sff_cpld_reg.fpath_41_6=/dev/cpld2 +sff_cpld_reg.addr_41_6=0x68 +sff_cpld_reg.len_41_6=1 +sff_cpld_reg.val_type_41_6=nega_key + +sff_cpld_reg.mode_42_6=config +sff_cpld_reg.src_42_6=logic_file +sff_cpld_reg.frmt_42_6=byte +sff_cpld_reg.pola_42_6=positive +sff_cpld_reg.fpath_42_6=/dev/cpld2 +sff_cpld_reg.addr_42_6=0x69 +sff_cpld_reg.len_42_6=1 +sff_cpld_reg.val_type_42_6=nega_key + +sff_cpld_reg.mode_43_6=config +sff_cpld_reg.src_43_6=logic_file +sff_cpld_reg.frmt_43_6=byte +sff_cpld_reg.pola_43_6=positive +sff_cpld_reg.fpath_43_6=/dev/cpld3 +sff_cpld_reg.addr_43_6=0x50 +sff_cpld_reg.len_43_6=1 +sff_cpld_reg.val_type_43_6=nega_key + +sff_cpld_reg.mode_44_6=config +sff_cpld_reg.src_44_6=logic_file +sff_cpld_reg.frmt_44_6=byte +sff_cpld_reg.pola_44_6=positive +sff_cpld_reg.fpath_44_6=/dev/cpld3 +sff_cpld_reg.addr_44_6=0x51 +sff_cpld_reg.len_44_6=1 +sff_cpld_reg.val_type_44_6=nega_key + +sff_cpld_reg.mode_45_6=config +sff_cpld_reg.src_45_6=logic_file +sff_cpld_reg.frmt_45_6=byte +sff_cpld_reg.pola_45_6=positive +sff_cpld_reg.fpath_45_6=/dev/cpld3 +sff_cpld_reg.addr_45_6=0x52 +sff_cpld_reg.len_45_6=1 +sff_cpld_reg.val_type_45_6=nega_key + +sff_cpld_reg.mode_46_6=config +sff_cpld_reg.src_46_6=logic_file +sff_cpld_reg.frmt_46_6=byte +sff_cpld_reg.pola_46_6=positive +sff_cpld_reg.fpath_46_6=/dev/cpld3 +sff_cpld_reg.addr_46_6=0x53 +sff_cpld_reg.len_46_6=1 +sff_cpld_reg.val_type_46_6=nega_key + +sff_cpld_reg.mode_47_6=config +sff_cpld_reg.src_47_6=logic_file +sff_cpld_reg.frmt_47_6=byte +sff_cpld_reg.pola_47_6=positive +sff_cpld_reg.fpath_47_6=/dev/cpld3 +sff_cpld_reg.addr_47_6=0x54 +sff_cpld_reg.len_47_6=1 +sff_cpld_reg.val_type_47_6=nega_key + +sff_cpld_reg.mode_48_6=config +sff_cpld_reg.src_48_6=logic_file +sff_cpld_reg.frmt_48_6=byte +sff_cpld_reg.pola_48_6=positive +sff_cpld_reg.fpath_48_6=/dev/cpld3 +sff_cpld_reg.addr_48_6=0x55 +sff_cpld_reg.len_48_6=1 +sff_cpld_reg.val_type_48_6=nega_key + +sff_cpld_reg.mode_49_6=config +sff_cpld_reg.src_49_6=logic_file +sff_cpld_reg.frmt_49_6=byte +sff_cpld_reg.pola_49_6=positive +sff_cpld_reg.fpath_49_6=/dev/cpld3 +sff_cpld_reg.addr_49_6=0x56 +sff_cpld_reg.len_49_6=1 +sff_cpld_reg.val_type_49_6=nega_key + +sff_cpld_reg.mode_50_6=config +sff_cpld_reg.src_50_6=logic_file +sff_cpld_reg.frmt_50_6=byte +sff_cpld_reg.pola_50_6=positive +sff_cpld_reg.fpath_50_6=/dev/cpld3 +sff_cpld_reg.addr_50_6=0x57 +sff_cpld_reg.len_50_6=1 +sff_cpld_reg.val_type_50_6=nega_key + +sff_cpld_reg.mode_51_6=config +sff_cpld_reg.src_51_6=logic_file +sff_cpld_reg.frmt_51_6=byte +sff_cpld_reg.pola_51_6=positive +sff_cpld_reg.fpath_51_6=/dev/cpld3 +sff_cpld_reg.addr_51_6=0x58 +sff_cpld_reg.len_51_6=1 +sff_cpld_reg.val_type_51_6=nega_key + +sff_cpld_reg.mode_52_6=config +sff_cpld_reg.src_52_6=logic_file +sff_cpld_reg.frmt_52_6=byte +sff_cpld_reg.pola_52_6=positive +sff_cpld_reg.fpath_52_6=/dev/cpld3 +sff_cpld_reg.addr_52_6=0x59 +sff_cpld_reg.len_52_6=1 +sff_cpld_reg.val_type_52_6=nega_key + +sff_cpld_reg.mode_53_6=config +sff_cpld_reg.src_53_6=logic_file +sff_cpld_reg.frmt_53_6=byte +sff_cpld_reg.pola_53_6=positive +sff_cpld_reg.fpath_53_6=/dev/cpld3 +sff_cpld_reg.addr_53_6=0x5a +sff_cpld_reg.len_53_6=1 +sff_cpld_reg.val_type_53_6=nega_key + +sff_cpld_reg.mode_54_6=config +sff_cpld_reg.src_54_6=logic_file +sff_cpld_reg.frmt_54_6=byte +sff_cpld_reg.pola_54_6=positive +sff_cpld_reg.fpath_54_6=/dev/cpld3 +sff_cpld_reg.addr_54_6=0x5b +sff_cpld_reg.len_54_6=1 +sff_cpld_reg.val_type_54_6=nega_key + +sff_cpld_reg.mode_55_6=config +sff_cpld_reg.src_55_6=logic_file +sff_cpld_reg.frmt_55_6=byte +sff_cpld_reg.pola_55_6=positive +sff_cpld_reg.fpath_55_6=/dev/cpld3 +sff_cpld_reg.addr_55_6=0x5c +sff_cpld_reg.len_55_6=1 +sff_cpld_reg.val_type_55_6=nega_key + +sff_cpld_reg.mode_56_6=config +sff_cpld_reg.src_56_6=logic_file +sff_cpld_reg.frmt_56_6=byte +sff_cpld_reg.pola_56_6=positive +sff_cpld_reg.fpath_56_6=/dev/cpld3 +sff_cpld_reg.addr_56_6=0x5d +sff_cpld_reg.len_56_6=1 +sff_cpld_reg.val_type_56_6=nega_key + +sff_cpld_reg.mode_57_6=config +sff_cpld_reg.src_57_6=logic_file +sff_cpld_reg.frmt_57_6=byte +sff_cpld_reg.pola_57_6=positive +sff_cpld_reg.fpath_57_6=/dev/cpld3 +sff_cpld_reg.addr_57_6=0x5e +sff_cpld_reg.len_57_6=1 +sff_cpld_reg.val_type_57_6=nega_key + +sff_cpld_reg.mode_58_6=config +sff_cpld_reg.src_58_6=logic_file +sff_cpld_reg.frmt_58_6=byte +sff_cpld_reg.pola_58_6=positive +sff_cpld_reg.fpath_58_6=/dev/cpld3 +sff_cpld_reg.addr_58_6=0x5f +sff_cpld_reg.len_58_6=1 +sff_cpld_reg.val_type_58_6=nega_key + +sff_cpld_reg.mode_59_6=config +sff_cpld_reg.src_59_6=logic_file +sff_cpld_reg.frmt_59_6=byte +sff_cpld_reg.pola_59_6=positive +sff_cpld_reg.fpath_59_6=/dev/cpld3 +sff_cpld_reg.addr_59_6=0x60 +sff_cpld_reg.len_59_6=1 +sff_cpld_reg.val_type_59_6=nega_key + +sff_cpld_reg.mode_60_6=config +sff_cpld_reg.src_60_6=logic_file +sff_cpld_reg.frmt_60_6=byte +sff_cpld_reg.pola_60_6=positive +sff_cpld_reg.fpath_60_6=/dev/cpld3 +sff_cpld_reg.addr_60_6=0x61 +sff_cpld_reg.len_60_6=1 +sff_cpld_reg.val_type_60_6=nega_key + +sff_cpld_reg.mode_61_6=config +sff_cpld_reg.src_61_6=logic_file +sff_cpld_reg.frmt_61_6=byte +sff_cpld_reg.pola_61_6=positive +sff_cpld_reg.fpath_61_6=/dev/cpld3 +sff_cpld_reg.addr_61_6=0x62 +sff_cpld_reg.len_61_6=1 +sff_cpld_reg.val_type_61_6=nega_key + +sff_cpld_reg.mode_62_6=config +sff_cpld_reg.src_62_6=logic_file +sff_cpld_reg.frmt_62_6=byte +sff_cpld_reg.pola_62_6=positive +sff_cpld_reg.fpath_62_6=/dev/cpld3 +sff_cpld_reg.addr_62_6=0x63 +sff_cpld_reg.len_62_6=1 +sff_cpld_reg.val_type_62_6=nega_key + +sff_cpld_reg.mode_63_6=config +sff_cpld_reg.src_63_6=logic_file +sff_cpld_reg.frmt_63_6=byte +sff_cpld_reg.pola_63_6=positive +sff_cpld_reg.fpath_63_6=/dev/cpld3 +sff_cpld_reg.addr_63_6=0x64 +sff_cpld_reg.len_63_6=1 +sff_cpld_reg.val_type_63_6=nega_key + +sff_cpld_reg.mode_64_6=config +sff_cpld_reg.src_64_6=logic_file +sff_cpld_reg.frmt_64_6=byte +sff_cpld_reg.pola_64_6=positive +sff_cpld_reg.fpath_64_6=/dev/cpld3 +sff_cpld_reg.addr_64_6=0x65 +sff_cpld_reg.len_64_6=1 +sff_cpld_reg.val_type_64_6=nega_key + +sff_cpld_reg.mode_65_6=config +sff_cpld_reg.src_65_6=logic_file +sff_cpld_reg.frmt_65_6=byte +sff_cpld_reg.pola_65_6=positive +sff_cpld_reg.fpath_65_6=/dev/cpld2 +sff_cpld_reg.addr_65_6=0x6a +sff_cpld_reg.len_65_6=1 +sff_cpld_reg.val_type_65_6=nega_key + +sff_cpld_reg.mode_66_6=config +sff_cpld_reg.src_66_6=logic_file +sff_cpld_reg.frmt_66_6=byte +sff_cpld_reg.pola_66_6=positive +sff_cpld_reg.fpath_66_6=/dev/cpld2 +sff_cpld_reg.addr_66_6=0x6b +sff_cpld_reg.len_66_6=1 +sff_cpld_reg.val_type_66_6=nega_key + +sff_cpld_reg.mode_67_6=config +sff_cpld_reg.src_67_6=logic_file +sff_cpld_reg.frmt_67_6=byte +sff_cpld_reg.pola_67_6=positive +sff_cpld_reg.fpath_67_6=/dev/cpld2 +sff_cpld_reg.addr_67_6=0x6c +sff_cpld_reg.len_67_6=1 +sff_cpld_reg.val_type_67_6=nega_key + +sff_cpld_reg.mode_68_6=config +sff_cpld_reg.src_68_6=logic_file +sff_cpld_reg.frmt_68_6=byte +sff_cpld_reg.pola_68_6=positive +sff_cpld_reg.fpath_68_6=/dev/cpld2 +sff_cpld_reg.addr_68_6=0x6d +sff_cpld_reg.len_68_6=1 +sff_cpld_reg.val_type_68_6=nega_key + +sff_cpld_reg.mode_69_6=config +sff_cpld_reg.src_69_6=logic_file +sff_cpld_reg.frmt_69_6=byte +sff_cpld_reg.pola_69_6=positive +sff_cpld_reg.fpath_69_6=/dev/cpld2 +sff_cpld_reg.addr_69_6=0x6e +sff_cpld_reg.len_69_6=1 +sff_cpld_reg.val_type_69_6=nega_key + +sff_cpld_reg.mode_70_6=config +sff_cpld_reg.src_70_6=logic_file +sff_cpld_reg.frmt_70_6=byte +sff_cpld_reg.pola_70_6=positive +sff_cpld_reg.fpath_70_6=/dev/cpld2 +sff_cpld_reg.addr_70_6=0x6f +sff_cpld_reg.len_70_6=1 +sff_cpld_reg.val_type_70_6=nega_key + +sff_cpld_reg.mode_71_6=config +sff_cpld_reg.src_71_6=logic_file +sff_cpld_reg.frmt_71_6=byte +sff_cpld_reg.pola_71_6=positive +sff_cpld_reg.fpath_71_6=/dev/cpld2 +sff_cpld_reg.addr_71_6=0x70 +sff_cpld_reg.len_71_6=1 +sff_cpld_reg.val_type_71_6=nega_key + +sff_cpld_reg.mode_72_6=config +sff_cpld_reg.src_72_6=logic_file +sff_cpld_reg.frmt_72_6=byte +sff_cpld_reg.pola_72_6=positive +sff_cpld_reg.fpath_72_6=/dev/cpld2 +sff_cpld_reg.addr_72_6=0x71 +sff_cpld_reg.len_72_6=1 +sff_cpld_reg.val_type_72_6=nega_key + +sff_cpld_reg.mode_73_6=config +sff_cpld_reg.src_73_6=logic_file +sff_cpld_reg.frmt_73_6=byte +sff_cpld_reg.pola_73_6=positive +sff_cpld_reg.fpath_73_6=/dev/cpld2 +sff_cpld_reg.addr_73_6=0x72 +sff_cpld_reg.len_73_6=1 +sff_cpld_reg.val_type_73_6=nega_key + +sff_cpld_reg.mode_74_6=config +sff_cpld_reg.src_74_6=logic_file +sff_cpld_reg.frmt_74_6=byte +sff_cpld_reg.pola_74_6=positive +sff_cpld_reg.fpath_74_6=/dev/cpld2 +sff_cpld_reg.addr_74_6=0x73 +sff_cpld_reg.len_74_6=1 +sff_cpld_reg.val_type_74_6=nega_key + +sff_cpld_reg.mode_75_6=config +sff_cpld_reg.src_75_6=logic_file +sff_cpld_reg.frmt_75_6=byte +sff_cpld_reg.pola_75_6=positive +sff_cpld_reg.fpath_75_6=/dev/cpld3 +sff_cpld_reg.addr_75_6=0x66 +sff_cpld_reg.len_75_6=1 +sff_cpld_reg.val_type_75_6=nega_key + +sff_cpld_reg.mode_76_6=config +sff_cpld_reg.src_76_6=logic_file +sff_cpld_reg.frmt_76_6=byte +sff_cpld_reg.pola_76_6=positive +sff_cpld_reg.fpath_76_6=/dev/cpld3 +sff_cpld_reg.addr_76_6=0x67 +sff_cpld_reg.len_76_6=1 +sff_cpld_reg.val_type_76_6=nega_key + +sff_cpld_reg.mode_77_6=config +sff_cpld_reg.src_77_6=logic_file +sff_cpld_reg.frmt_77_6=byte +sff_cpld_reg.pola_77_6=positive +sff_cpld_reg.fpath_77_6=/dev/cpld3 +sff_cpld_reg.addr_77_6=0x68 +sff_cpld_reg.len_77_6=1 +sff_cpld_reg.val_type_77_6=nega_key + +sff_cpld_reg.mode_78_6=config +sff_cpld_reg.src_78_6=logic_file +sff_cpld_reg.frmt_78_6=byte +sff_cpld_reg.pola_78_6=positive +sff_cpld_reg.fpath_78_6=/dev/cpld3 +sff_cpld_reg.addr_78_6=0x69 +sff_cpld_reg.len_78_6=1 +sff_cpld_reg.val_type_78_6=nega_key + +sff_cpld_reg.mode_79_6=config +sff_cpld_reg.src_79_6=logic_file +sff_cpld_reg.frmt_79_6=byte +sff_cpld_reg.pola_79_6=positive +sff_cpld_reg.fpath_79_6=/dev/cpld3 +sff_cpld_reg.addr_79_6=0x6a +sff_cpld_reg.len_79_6=1 +sff_cpld_reg.val_type_79_6=nega_key + +sff_cpld_reg.mode_80_6=config +sff_cpld_reg.src_80_6=logic_file +sff_cpld_reg.frmt_80_6=byte +sff_cpld_reg.pola_80_6=positive +sff_cpld_reg.fpath_80_6=/dev/cpld3 +sff_cpld_reg.addr_80_6=0x6b +sff_cpld_reg.len_80_6=1 +sff_cpld_reg.val_type_80_6=nega_key + +sff_cpld_reg.mode_81_6=config +sff_cpld_reg.src_81_6=logic_file +sff_cpld_reg.frmt_81_6=byte +sff_cpld_reg.pola_81_6=positive +sff_cpld_reg.fpath_81_6=/dev/cpld3 +sff_cpld_reg.addr_81_6=0x6c +sff_cpld_reg.len_81_6=1 +sff_cpld_reg.val_type_81_6=nega_key + +sff_cpld_reg.mode_82_6=config +sff_cpld_reg.src_82_6=logic_file +sff_cpld_reg.frmt_82_6=byte +sff_cpld_reg.pola_82_6=positive +sff_cpld_reg.fpath_82_6=/dev/cpld3 +sff_cpld_reg.addr_82_6=0x6d +sff_cpld_reg.len_82_6=1 +sff_cpld_reg.val_type_82_6=nega_key + +sff_cpld_reg.mode_83_6=config +sff_cpld_reg.src_83_6=logic_file +sff_cpld_reg.frmt_83_6=byte +sff_cpld_reg.pola_83_6=positive +sff_cpld_reg.fpath_83_6=/dev/cpld3 +sff_cpld_reg.addr_83_6=0x6e +sff_cpld_reg.len_83_6=1 +sff_cpld_reg.val_type_83_6=nega_key + +sff_cpld_reg.mode_84_6=config +sff_cpld_reg.src_84_6=logic_file +sff_cpld_reg.frmt_84_6=byte +sff_cpld_reg.pola_84_6=positive +sff_cpld_reg.fpath_84_6=/dev/cpld3 +sff_cpld_reg.addr_84_6=0x6f +sff_cpld_reg.len_84_6=1 +sff_cpld_reg.val_type_84_6=nega_key + +sff_cpld_reg.mode_85_6=config +sff_cpld_reg.src_85_6=logic_file +sff_cpld_reg.frmt_85_6=byte +sff_cpld_reg.pola_85_6=positive +sff_cpld_reg.fpath_85_6=/dev/cpld3 +sff_cpld_reg.addr_85_6=0x70 +sff_cpld_reg.len_85_6=1 +sff_cpld_reg.val_type_85_6=nega_key + +sff_cpld_reg.mode_86_6=config +sff_cpld_reg.src_86_6=logic_file +sff_cpld_reg.frmt_86_6=byte +sff_cpld_reg.pola_86_6=positive +sff_cpld_reg.fpath_86_6=/dev/cpld3 +sff_cpld_reg.addr_86_6=0x71 +sff_cpld_reg.len_86_6=1 +sff_cpld_reg.val_type_86_6=nega_key + +sff_cpld_reg.mode_87_6=config +sff_cpld_reg.src_87_6=logic_file +sff_cpld_reg.frmt_87_6=byte +sff_cpld_reg.pola_87_6=positive +sff_cpld_reg.fpath_87_6=/dev/cpld3 +sff_cpld_reg.addr_87_6=0x72 +sff_cpld_reg.len_87_6=1 +sff_cpld_reg.val_type_87_6=nega_key + +sff_cpld_reg.mode_88_6=config +sff_cpld_reg.src_88_6=logic_file +sff_cpld_reg.frmt_88_6=byte +sff_cpld_reg.pola_88_6=positive +sff_cpld_reg.fpath_88_6=/dev/cpld3 +sff_cpld_reg.addr_88_6=0x73 +sff_cpld_reg.len_88_6=1 +sff_cpld_reg.val_type_88_6=nega_key + +sff_cpld_reg.mode_89_6=config +sff_cpld_reg.src_89_6=logic_file +sff_cpld_reg.frmt_89_6=byte +sff_cpld_reg.pola_89_6=positive +sff_cpld_reg.fpath_89_6=/dev/cpld3 +sff_cpld_reg.addr_89_6=0x74 +sff_cpld_reg.len_89_6=1 +sff_cpld_reg.val_type_89_6=nega_key + +sff_cpld_reg.mode_90_6=config +sff_cpld_reg.src_90_6=logic_file +sff_cpld_reg.frmt_90_6=byte +sff_cpld_reg.pola_90_6=positive +sff_cpld_reg.fpath_90_6=/dev/cpld3 +sff_cpld_reg.addr_90_6=0x75 +sff_cpld_reg.len_90_6=1 +sff_cpld_reg.val_type_90_6=nega_key + +sff_cpld_reg.mode_91_6=config +sff_cpld_reg.src_91_6=logic_file +sff_cpld_reg.frmt_91_6=byte +sff_cpld_reg.pola_91_6=positive +sff_cpld_reg.fpath_91_6=/dev/cpld3 +sff_cpld_reg.addr_91_6=0x76 +sff_cpld_reg.len_91_6=1 +sff_cpld_reg.val_type_91_6=nega_key + +sff_cpld_reg.mode_92_6=config +sff_cpld_reg.src_92_6=logic_file +sff_cpld_reg.frmt_92_6=byte +sff_cpld_reg.pola_92_6=positive +sff_cpld_reg.fpath_92_6=/dev/cpld3 +sff_cpld_reg.addr_92_6=0x77 +sff_cpld_reg.len_92_6=1 +sff_cpld_reg.val_type_92_6=nega_key + +sff_cpld_reg.mode_93_6=config +sff_cpld_reg.src_93_6=logic_file +sff_cpld_reg.frmt_93_6=byte +sff_cpld_reg.pola_93_6=positive +sff_cpld_reg.fpath_93_6=/dev/cpld3 +sff_cpld_reg.addr_93_6=0x78 +sff_cpld_reg.len_93_6=1 +sff_cpld_reg.val_type_93_6=nega_key + +sff_cpld_reg.mode_94_6=config +sff_cpld_reg.src_94_6=logic_file +sff_cpld_reg.frmt_94_6=byte +sff_cpld_reg.pola_94_6=positive +sff_cpld_reg.fpath_94_6=/dev/cpld3 +sff_cpld_reg.addr_94_6=0x79 +sff_cpld_reg.len_94_6=1 +sff_cpld_reg.val_type_94_6=nega_key + +sff_cpld_reg.mode_95_6=config +sff_cpld_reg.src_95_6=logic_file +sff_cpld_reg.frmt_95_6=byte +sff_cpld_reg.pola_95_6=positive +sff_cpld_reg.fpath_95_6=/dev/cpld3 +sff_cpld_reg.addr_95_6=0x7a +sff_cpld_reg.len_95_6=1 +sff_cpld_reg.val_type_95_6=nega_key + +sff_cpld_reg.mode_96_6=config +sff_cpld_reg.src_96_6=logic_file +sff_cpld_reg.frmt_96_6=byte +sff_cpld_reg.pola_96_6=positive +sff_cpld_reg.fpath_96_6=/dev/cpld3 +sff_cpld_reg.addr_96_6=0x7b +sff_cpld_reg.len_96_6=1 +sff_cpld_reg.val_type_96_6=nega_key + +sff_cpld_reg.mode_97_6=config +sff_cpld_reg.src_97_6=logic_file +sff_cpld_reg.frmt_97_6=byte +sff_cpld_reg.pola_97_6=positive +sff_cpld_reg.fpath_97_6=/dev/cpld6 +sff_cpld_reg.addr_97_6=0x50 +sff_cpld_reg.len_97_6=1 +sff_cpld_reg.val_type_97_6=nega_key + +sff_cpld_reg.mode_98_6=config +sff_cpld_reg.src_98_6=logic_file +sff_cpld_reg.frmt_98_6=byte +sff_cpld_reg.pola_98_6=positive +sff_cpld_reg.fpath_98_6=/dev/cpld6 +sff_cpld_reg.addr_98_6=0x51 +sff_cpld_reg.len_98_6=1 +sff_cpld_reg.val_type_98_6=nega_key + +sff_cpld_reg.mode_99_6=config +sff_cpld_reg.src_99_6=logic_file +sff_cpld_reg.frmt_99_6=byte +sff_cpld_reg.pola_99_6=positive +sff_cpld_reg.fpath_99_6=/dev/cpld6 +sff_cpld_reg.addr_99_6=0x52 +sff_cpld_reg.len_99_6=1 +sff_cpld_reg.val_type_99_6=nega_key + +sff_cpld_reg.mode_100_6=config +sff_cpld_reg.src_100_6=logic_file +sff_cpld_reg.frmt_100_6=byte +sff_cpld_reg.pola_100_6=positive +sff_cpld_reg.fpath_100_6=/dev/cpld6 +sff_cpld_reg.addr_100_6=0x53 +sff_cpld_reg.len_100_6=1 +sff_cpld_reg.val_type_100_6=nega_key + +sff_cpld_reg.mode_101_6=config +sff_cpld_reg.src_101_6=logic_file +sff_cpld_reg.frmt_101_6=byte +sff_cpld_reg.pola_101_6=positive +sff_cpld_reg.fpath_101_6=/dev/cpld6 +sff_cpld_reg.addr_101_6=0x54 +sff_cpld_reg.len_101_6=1 +sff_cpld_reg.val_type_101_6=nega_key + +sff_cpld_reg.mode_102_6=config +sff_cpld_reg.src_102_6=logic_file +sff_cpld_reg.frmt_102_6=byte +sff_cpld_reg.pola_102_6=positive +sff_cpld_reg.fpath_102_6=/dev/cpld6 +sff_cpld_reg.addr_102_6=0x55 +sff_cpld_reg.len_102_6=1 +sff_cpld_reg.val_type_102_6=nega_key + +sff_cpld_reg.mode_103_6=config +sff_cpld_reg.src_103_6=logic_file +sff_cpld_reg.frmt_103_6=byte +sff_cpld_reg.pola_103_6=positive +sff_cpld_reg.fpath_103_6=/dev/cpld6 +sff_cpld_reg.addr_103_6=0x56 +sff_cpld_reg.len_103_6=1 +sff_cpld_reg.val_type_103_6=nega_key + +sff_cpld_reg.mode_104_6=config +sff_cpld_reg.src_104_6=logic_file +sff_cpld_reg.frmt_104_6=byte +sff_cpld_reg.pola_104_6=positive +sff_cpld_reg.fpath_104_6=/dev/cpld6 +sff_cpld_reg.addr_104_6=0x57 +sff_cpld_reg.len_104_6=1 +sff_cpld_reg.val_type_104_6=nega_key + +sff_cpld_reg.mode_105_6=config +sff_cpld_reg.src_105_6=logic_file +sff_cpld_reg.frmt_105_6=byte +sff_cpld_reg.pola_105_6=positive +sff_cpld_reg.fpath_105_6=/dev/cpld6 +sff_cpld_reg.addr_105_6=0x58 +sff_cpld_reg.len_105_6=1 +sff_cpld_reg.val_type_105_6=nega_key + +sff_cpld_reg.mode_106_6=config +sff_cpld_reg.src_106_6=logic_file +sff_cpld_reg.frmt_106_6=byte +sff_cpld_reg.pola_106_6=positive +sff_cpld_reg.fpath_106_6=/dev/cpld6 +sff_cpld_reg.addr_106_6=0x59 +sff_cpld_reg.len_106_6=1 +sff_cpld_reg.val_type_106_6=nega_key + +sff_cpld_reg.mode_107_6=config +sff_cpld_reg.src_107_6=logic_file +sff_cpld_reg.frmt_107_6=byte +sff_cpld_reg.pola_107_6=positive +sff_cpld_reg.fpath_107_6=/dev/cpld6 +sff_cpld_reg.addr_107_6=0x5a +sff_cpld_reg.len_107_6=1 +sff_cpld_reg.val_type_107_6=nega_key + +sff_cpld_reg.mode_108_6=config +sff_cpld_reg.src_108_6=logic_file +sff_cpld_reg.frmt_108_6=byte +sff_cpld_reg.pola_108_6=positive +sff_cpld_reg.fpath_108_6=/dev/cpld6 +sff_cpld_reg.addr_108_6=0x5b +sff_cpld_reg.len_108_6=1 +sff_cpld_reg.val_type_108_6=nega_key + +sff_cpld_reg.mode_109_6=config +sff_cpld_reg.src_109_6=logic_file +sff_cpld_reg.frmt_109_6=byte +sff_cpld_reg.pola_109_6=positive +sff_cpld_reg.fpath_109_6=/dev/cpld6 +sff_cpld_reg.addr_109_6=0x5c +sff_cpld_reg.len_109_6=1 +sff_cpld_reg.val_type_109_6=nega_key + +sff_cpld_reg.mode_110_6=config +sff_cpld_reg.src_110_6=logic_file +sff_cpld_reg.frmt_110_6=byte +sff_cpld_reg.pola_110_6=positive +sff_cpld_reg.fpath_110_6=/dev/cpld6 +sff_cpld_reg.addr_110_6=0x5d +sff_cpld_reg.len_110_6=1 +sff_cpld_reg.val_type_110_6=nega_key + +sff_cpld_reg.mode_111_6=config +sff_cpld_reg.src_111_6=logic_file +sff_cpld_reg.frmt_111_6=byte +sff_cpld_reg.pola_111_6=positive +sff_cpld_reg.fpath_111_6=/dev/cpld6 +sff_cpld_reg.addr_111_6=0x5e +sff_cpld_reg.len_111_6=1 +sff_cpld_reg.val_type_111_6=nega_key + +sff_cpld_reg.mode_112_6=config +sff_cpld_reg.src_112_6=logic_file +sff_cpld_reg.frmt_112_6=byte +sff_cpld_reg.pola_112_6=positive +sff_cpld_reg.fpath_112_6=/dev/cpld6 +sff_cpld_reg.addr_112_6=0x5f +sff_cpld_reg.len_112_6=1 +sff_cpld_reg.val_type_112_6=nega_key + +sff_cpld_reg.mode_113_6=config +sff_cpld_reg.src_113_6=logic_file +sff_cpld_reg.frmt_113_6=byte +sff_cpld_reg.pola_113_6=positive +sff_cpld_reg.fpath_113_6=/dev/cpld6 +sff_cpld_reg.addr_113_6=0x60 +sff_cpld_reg.len_113_6=1 +sff_cpld_reg.val_type_113_6=nega_key + +sff_cpld_reg.mode_114_6=config +sff_cpld_reg.src_114_6=logic_file +sff_cpld_reg.frmt_114_6=byte +sff_cpld_reg.pola_114_6=positive +sff_cpld_reg.fpath_114_6=/dev/cpld6 +sff_cpld_reg.addr_114_6=0x61 +sff_cpld_reg.len_114_6=1 +sff_cpld_reg.val_type_114_6=nega_key + +sff_cpld_reg.mode_115_6=config +sff_cpld_reg.src_115_6=logic_file +sff_cpld_reg.frmt_115_6=byte +sff_cpld_reg.pola_115_6=positive +sff_cpld_reg.fpath_115_6=/dev/cpld6 +sff_cpld_reg.addr_115_6=0x62 +sff_cpld_reg.len_115_6=1 +sff_cpld_reg.val_type_115_6=nega_key + +sff_cpld_reg.mode_116_6=config +sff_cpld_reg.src_116_6=logic_file +sff_cpld_reg.frmt_116_6=byte +sff_cpld_reg.pola_116_6=positive +sff_cpld_reg.fpath_116_6=/dev/cpld6 +sff_cpld_reg.addr_116_6=0x63 +sff_cpld_reg.len_116_6=1 +sff_cpld_reg.val_type_116_6=nega_key + +sff_cpld_reg.mode_117_6=config +sff_cpld_reg.src_117_6=logic_file +sff_cpld_reg.frmt_117_6=byte +sff_cpld_reg.pola_117_6=positive +sff_cpld_reg.fpath_117_6=/dev/cpld6 +sff_cpld_reg.addr_117_6=0x64 +sff_cpld_reg.len_117_6=1 +sff_cpld_reg.val_type_117_6=nega_key + +sff_cpld_reg.mode_118_6=config +sff_cpld_reg.src_118_6=logic_file +sff_cpld_reg.frmt_118_6=byte +sff_cpld_reg.pola_118_6=positive +sff_cpld_reg.fpath_118_6=/dev/cpld6 +sff_cpld_reg.addr_118_6=0x65 +sff_cpld_reg.len_118_6=1 +sff_cpld_reg.val_type_118_6=nega_key + +sff_cpld_reg.mode_119_6=config +sff_cpld_reg.src_119_6=logic_file +sff_cpld_reg.frmt_119_6=byte +sff_cpld_reg.pola_119_6=positive +sff_cpld_reg.fpath_119_6=/dev/cpld6 +sff_cpld_reg.addr_119_6=0x66 +sff_cpld_reg.len_119_6=1 +sff_cpld_reg.val_type_119_6=nega_key + +sff_cpld_reg.mode_120_6=config +sff_cpld_reg.src_120_6=logic_file +sff_cpld_reg.frmt_120_6=byte +sff_cpld_reg.pola_120_6=positive +sff_cpld_reg.fpath_120_6=/dev/cpld6 +sff_cpld_reg.addr_120_6=0x67 +sff_cpld_reg.len_120_6=1 +sff_cpld_reg.val_type_120_6=nega_key + +sff_cpld_reg.mode_121_6=config +sff_cpld_reg.src_121_6=logic_file +sff_cpld_reg.frmt_121_6=byte +sff_cpld_reg.pola_121_6=positive +sff_cpld_reg.fpath_121_6=/dev/cpld6 +sff_cpld_reg.addr_121_6=0x68 +sff_cpld_reg.len_121_6=1 +sff_cpld_reg.val_type_121_6=nega_key + +sff_cpld_reg.mode_122_6=config +sff_cpld_reg.src_122_6=logic_file +sff_cpld_reg.frmt_122_6=byte +sff_cpld_reg.pola_122_6=positive +sff_cpld_reg.fpath_122_6=/dev/cpld6 +sff_cpld_reg.addr_122_6=0x69 +sff_cpld_reg.len_122_6=1 +sff_cpld_reg.val_type_122_6=nega_key + +sff_cpld_reg.mode_123_6=config +sff_cpld_reg.src_123_6=logic_file +sff_cpld_reg.frmt_123_6=byte +sff_cpld_reg.pola_123_6=positive +sff_cpld_reg.fpath_123_6=/dev/cpld6 +sff_cpld_reg.addr_123_6=0x6a +sff_cpld_reg.len_123_6=1 +sff_cpld_reg.val_type_123_6=nega_key + +sff_cpld_reg.mode_124_6=config +sff_cpld_reg.src_124_6=logic_file +sff_cpld_reg.frmt_124_6=byte +sff_cpld_reg.pola_124_6=positive +sff_cpld_reg.fpath_124_6=/dev/cpld6 +sff_cpld_reg.addr_124_6=0x6b +sff_cpld_reg.len_124_6=1 +sff_cpld_reg.val_type_124_6=nega_key + +sff_cpld_reg.mode_125_6=config +sff_cpld_reg.src_125_6=logic_file +sff_cpld_reg.frmt_125_6=byte +sff_cpld_reg.pola_125_6=positive +sff_cpld_reg.fpath_125_6=/dev/cpld6 +sff_cpld_reg.addr_125_6=0x6c +sff_cpld_reg.len_125_6=1 +sff_cpld_reg.val_type_125_6=nega_key + +sff_cpld_reg.mode_126_6=config +sff_cpld_reg.src_126_6=logic_file +sff_cpld_reg.frmt_126_6=byte +sff_cpld_reg.pola_126_6=positive +sff_cpld_reg.fpath_126_6=/dev/cpld6 +sff_cpld_reg.addr_126_6=0x6d +sff_cpld_reg.len_126_6=1 +sff_cpld_reg.val_type_126_6=nega_key + +sff_cpld_reg.mode_127_6=config +sff_cpld_reg.src_127_6=logic_file +sff_cpld_reg.frmt_127_6=byte +sff_cpld_reg.pola_127_6=positive +sff_cpld_reg.fpath_127_6=/dev/cpld6 +sff_cpld_reg.addr_127_6=0x6e +sff_cpld_reg.len_127_6=1 +sff_cpld_reg.val_type_127_6=nega_key + +sff_cpld_reg.mode_128_6=config +sff_cpld_reg.src_128_6=logic_file +sff_cpld_reg.frmt_128_6=byte +sff_cpld_reg.pola_128_6=positive +sff_cpld_reg.fpath_128_6=/dev/cpld6 +sff_cpld_reg.addr_128_6=0x6f +sff_cpld_reg.len_128_6=1 +sff_cpld_reg.val_type_128_6=nega_key + +sff_cpld_reg.mode_129_6=config +sff_cpld_reg.src_129_6=logic_file +sff_cpld_reg.frmt_129_6=byte +sff_cpld_reg.pola_129_6=positive +sff_cpld_reg.fpath_129_6=/dev/cpld1 +sff_cpld_reg.addr_129_6=0xdd +sff_cpld_reg.len_129_6=1 +sff_cpld_reg.val_type_129_6=nega_key + +# 800G module lpmode signal +reg_key_0x0307_0x00=0x01 +reg_key_0x0307_0x01=0x00 + +sysfs_decode_0x0307_0x00=0x01 +sysfs_decode_0x0307_0x01=0x00 + +sff_cpld_reg.mode_1_7=config +sff_cpld_reg.src_1_7=logic_file +sff_cpld_reg.frmt_1_7=byte +sff_cpld_reg.pola_1_7=positive +sff_cpld_reg.fpath_1_7=/dev/cpld5 +sff_cpld_reg.addr_1_7=0x70 +sff_cpld_reg.len_1_7=1 +sff_cpld_reg.val_type_1_7=nega_key + +sff_cpld_reg.mode_2_7=config +sff_cpld_reg.src_2_7=logic_file +sff_cpld_reg.frmt_2_7=byte +sff_cpld_reg.pola_2_7=positive +sff_cpld_reg.fpath_2_7=/dev/cpld5 +sff_cpld_reg.addr_2_7=0x71 +sff_cpld_reg.len_2_7=1 +sff_cpld_reg.val_type_2_7=nega_key + +sff_cpld_reg.mode_3_7=config +sff_cpld_reg.src_3_7=logic_file +sff_cpld_reg.frmt_3_7=byte +sff_cpld_reg.pola_3_7=positive +sff_cpld_reg.fpath_3_7=/dev/cpld5 +sff_cpld_reg.addr_3_7=0x72 +sff_cpld_reg.len_3_7=1 +sff_cpld_reg.val_type_3_7=nega_key + +sff_cpld_reg.mode_4_7=config +sff_cpld_reg.src_4_7=logic_file +sff_cpld_reg.frmt_4_7=byte +sff_cpld_reg.pola_4_7=positive +sff_cpld_reg.fpath_4_7=/dev/cpld5 +sff_cpld_reg.addr_4_7=0x73 +sff_cpld_reg.len_4_7=1 +sff_cpld_reg.val_type_4_7=nega_key + +sff_cpld_reg.mode_5_7=config +sff_cpld_reg.src_5_7=logic_file +sff_cpld_reg.frmt_5_7=byte +sff_cpld_reg.pola_5_7=positive +sff_cpld_reg.fpath_5_7=/dev/cpld5 +sff_cpld_reg.addr_5_7=0x74 +sff_cpld_reg.len_5_7=1 +sff_cpld_reg.val_type_5_7=nega_key + +sff_cpld_reg.mode_6_7=config +sff_cpld_reg.src_6_7=logic_file +sff_cpld_reg.frmt_6_7=byte +sff_cpld_reg.pola_6_7=positive +sff_cpld_reg.fpath_6_7=/dev/cpld5 +sff_cpld_reg.addr_6_7=0x75 +sff_cpld_reg.len_6_7=1 +sff_cpld_reg.val_type_6_7=nega_key + +sff_cpld_reg.mode_7_7=config +sff_cpld_reg.src_7_7=logic_file +sff_cpld_reg.frmt_7_7=byte +sff_cpld_reg.pola_7_7=positive +sff_cpld_reg.fpath_7_7=/dev/cpld5 +sff_cpld_reg.addr_7_7=0x76 +sff_cpld_reg.len_7_7=1 +sff_cpld_reg.val_type_7_7=nega_key + +sff_cpld_reg.mode_8_7=config +sff_cpld_reg.src_8_7=logic_file +sff_cpld_reg.frmt_8_7=byte +sff_cpld_reg.pola_8_7=positive +sff_cpld_reg.fpath_8_7=/dev/cpld5 +sff_cpld_reg.addr_8_7=0x77 +sff_cpld_reg.len_8_7=1 +sff_cpld_reg.val_type_8_7=nega_key + +sff_cpld_reg.mode_9_7=config +sff_cpld_reg.src_9_7=logic_file +sff_cpld_reg.frmt_9_7=byte +sff_cpld_reg.pola_9_7=positive +sff_cpld_reg.fpath_9_7=/dev/cpld5 +sff_cpld_reg.addr_9_7=0x78 +sff_cpld_reg.len_9_7=1 +sff_cpld_reg.val_type_9_7=nega_key + +sff_cpld_reg.mode_10_7=config +sff_cpld_reg.src_10_7=logic_file +sff_cpld_reg.frmt_10_7=byte +sff_cpld_reg.pola_10_7=positive +sff_cpld_reg.fpath_10_7=/dev/cpld5 +sff_cpld_reg.addr_10_7=0x79 +sff_cpld_reg.len_10_7=1 +sff_cpld_reg.val_type_10_7=nega_key + +sff_cpld_reg.mode_11_7=config +sff_cpld_reg.src_11_7=logic_file +sff_cpld_reg.frmt_11_7=byte +sff_cpld_reg.pola_11_7=positive +sff_cpld_reg.fpath_11_7=/dev/cpld5 +sff_cpld_reg.addr_11_7=0x7a +sff_cpld_reg.len_11_7=1 +sff_cpld_reg.val_type_11_7=nega_key + +sff_cpld_reg.mode_12_7=config +sff_cpld_reg.src_12_7=logic_file +sff_cpld_reg.frmt_12_7=byte +sff_cpld_reg.pola_12_7=positive +sff_cpld_reg.fpath_12_7=/dev/cpld5 +sff_cpld_reg.addr_12_7=0x7b +sff_cpld_reg.len_12_7=1 +sff_cpld_reg.val_type_12_7=nega_key + +sff_cpld_reg.mode_13_7=config +sff_cpld_reg.src_13_7=logic_file +sff_cpld_reg.frmt_13_7=byte +sff_cpld_reg.pola_13_7=positive +sff_cpld_reg.fpath_13_7=/dev/cpld5 +sff_cpld_reg.addr_13_7=0x7c +sff_cpld_reg.len_13_7=1 +sff_cpld_reg.val_type_13_7=nega_key + +sff_cpld_reg.mode_14_7=config +sff_cpld_reg.src_14_7=logic_file +sff_cpld_reg.frmt_14_7=byte +sff_cpld_reg.pola_14_7=positive +sff_cpld_reg.fpath_14_7=/dev/cpld5 +sff_cpld_reg.addr_14_7=0x7d +sff_cpld_reg.len_14_7=1 +sff_cpld_reg.val_type_14_7=nega_key + +sff_cpld_reg.mode_15_7=config +sff_cpld_reg.src_15_7=logic_file +sff_cpld_reg.frmt_15_7=byte +sff_cpld_reg.pola_15_7=positive +sff_cpld_reg.fpath_15_7=/dev/cpld5 +sff_cpld_reg.addr_15_7=0x7e +sff_cpld_reg.len_15_7=1 +sff_cpld_reg.val_type_15_7=nega_key + +sff_cpld_reg.mode_16_7=config +sff_cpld_reg.src_16_7=logic_file +sff_cpld_reg.frmt_16_7=byte +sff_cpld_reg.pola_16_7=positive +sff_cpld_reg.fpath_16_7=/dev/cpld5 +sff_cpld_reg.addr_16_7=0x7f +sff_cpld_reg.len_16_7=1 +sff_cpld_reg.val_type_16_7=nega_key + +sff_cpld_reg.mode_17_7=config +sff_cpld_reg.src_17_7=logic_file +sff_cpld_reg.frmt_17_7=byte +sff_cpld_reg.pola_17_7=positive +sff_cpld_reg.fpath_17_7=/dev/cpld5 +sff_cpld_reg.addr_17_7=0x80 +sff_cpld_reg.len_17_7=1 +sff_cpld_reg.val_type_17_7=nega_key + +sff_cpld_reg.mode_18_7=config +sff_cpld_reg.src_18_7=logic_file +sff_cpld_reg.frmt_18_7=byte +sff_cpld_reg.pola_18_7=positive +sff_cpld_reg.fpath_18_7=/dev/cpld5 +sff_cpld_reg.addr_18_7=0x81 +sff_cpld_reg.len_18_7=1 +sff_cpld_reg.val_type_18_7=nega_key + +sff_cpld_reg.mode_19_7=config +sff_cpld_reg.src_19_7=logic_file +sff_cpld_reg.frmt_19_7=byte +sff_cpld_reg.pola_19_7=positive +sff_cpld_reg.fpath_19_7=/dev/cpld5 +sff_cpld_reg.addr_19_7=0x82 +sff_cpld_reg.len_19_7=1 +sff_cpld_reg.val_type_19_7=nega_key + +sff_cpld_reg.mode_20_7=config +sff_cpld_reg.src_20_7=logic_file +sff_cpld_reg.frmt_20_7=byte +sff_cpld_reg.pola_20_7=positive +sff_cpld_reg.fpath_20_7=/dev/cpld5 +sff_cpld_reg.addr_20_7=0x83 +sff_cpld_reg.len_20_7=1 +sff_cpld_reg.val_type_20_7=nega_key + +sff_cpld_reg.mode_21_7=config +sff_cpld_reg.src_21_7=logic_file +sff_cpld_reg.frmt_21_7=byte +sff_cpld_reg.pola_21_7=positive +sff_cpld_reg.fpath_21_7=/dev/cpld5 +sff_cpld_reg.addr_21_7=0x84 +sff_cpld_reg.len_21_7=1 +sff_cpld_reg.val_type_21_7=nega_key + +sff_cpld_reg.mode_22_7=config +sff_cpld_reg.src_22_7=logic_file +sff_cpld_reg.frmt_22_7=byte +sff_cpld_reg.pola_22_7=positive +sff_cpld_reg.fpath_22_7=/dev/cpld5 +sff_cpld_reg.addr_22_7=0x85 +sff_cpld_reg.len_22_7=1 +sff_cpld_reg.val_type_22_7=nega_key + +sff_cpld_reg.mode_23_7=config +sff_cpld_reg.src_23_7=logic_file +sff_cpld_reg.frmt_23_7=byte +sff_cpld_reg.pola_23_7=positive +sff_cpld_reg.fpath_23_7=/dev/cpld5 +sff_cpld_reg.addr_23_7=0x86 +sff_cpld_reg.len_23_7=1 +sff_cpld_reg.val_type_23_7=nega_key + +sff_cpld_reg.mode_24_7=config +sff_cpld_reg.src_24_7=logic_file +sff_cpld_reg.frmt_24_7=byte +sff_cpld_reg.pola_24_7=positive +sff_cpld_reg.fpath_24_7=/dev/cpld5 +sff_cpld_reg.addr_24_7=0x87 +sff_cpld_reg.len_24_7=1 +sff_cpld_reg.val_type_24_7=nega_key + +sff_cpld_reg.mode_25_7=config +sff_cpld_reg.src_25_7=logic_file +sff_cpld_reg.frmt_25_7=byte +sff_cpld_reg.pola_25_7=positive +sff_cpld_reg.fpath_25_7=/dev/cpld5 +sff_cpld_reg.addr_25_7=0x88 +sff_cpld_reg.len_25_7=1 +sff_cpld_reg.val_type_25_7=nega_key + +sff_cpld_reg.mode_26_7=config +sff_cpld_reg.src_26_7=logic_file +sff_cpld_reg.frmt_26_7=byte +sff_cpld_reg.pola_26_7=positive +sff_cpld_reg.fpath_26_7=/dev/cpld5 +sff_cpld_reg.addr_26_7=0x89 +sff_cpld_reg.len_26_7=1 +sff_cpld_reg.val_type_26_7=nega_key + +sff_cpld_reg.mode_27_7=config +sff_cpld_reg.src_27_7=logic_file +sff_cpld_reg.frmt_27_7=byte +sff_cpld_reg.pola_27_7=positive +sff_cpld_reg.fpath_27_7=/dev/cpld5 +sff_cpld_reg.addr_27_7=0x8a +sff_cpld_reg.len_27_7=1 +sff_cpld_reg.val_type_27_7=nega_key + +sff_cpld_reg.mode_28_7=config +sff_cpld_reg.src_28_7=logic_file +sff_cpld_reg.frmt_28_7=byte +sff_cpld_reg.pola_28_7=positive +sff_cpld_reg.fpath_28_7=/dev/cpld5 +sff_cpld_reg.addr_28_7=0x8b +sff_cpld_reg.len_28_7=1 +sff_cpld_reg.val_type_28_7=nega_key + +sff_cpld_reg.mode_29_7=config +sff_cpld_reg.src_29_7=logic_file +sff_cpld_reg.frmt_29_7=byte +sff_cpld_reg.pola_29_7=positive +sff_cpld_reg.fpath_29_7=/dev/cpld5 +sff_cpld_reg.addr_29_7=0x8c +sff_cpld_reg.len_29_7=1 +sff_cpld_reg.val_type_29_7=nega_key + +sff_cpld_reg.mode_30_7=config +sff_cpld_reg.src_30_7=logic_file +sff_cpld_reg.frmt_30_7=byte +sff_cpld_reg.pola_30_7=positive +sff_cpld_reg.fpath_30_7=/dev/cpld5 +sff_cpld_reg.addr_30_7=0x8d +sff_cpld_reg.len_30_7=1 +sff_cpld_reg.val_type_30_7=nega_key + +sff_cpld_reg.mode_31_7=config +sff_cpld_reg.src_31_7=logic_file +sff_cpld_reg.frmt_31_7=byte +sff_cpld_reg.pola_31_7=positive +sff_cpld_reg.fpath_31_7=/dev/cpld5 +sff_cpld_reg.addr_31_7=0x8e +sff_cpld_reg.len_31_7=1 +sff_cpld_reg.val_type_31_7=nega_key + +sff_cpld_reg.mode_32_7=config +sff_cpld_reg.src_32_7=logic_file +sff_cpld_reg.frmt_32_7=byte +sff_cpld_reg.pola_32_7=positive +sff_cpld_reg.fpath_32_7=/dev/cpld5 +sff_cpld_reg.addr_32_7=0x8f +sff_cpld_reg.len_32_7=1 +sff_cpld_reg.val_type_32_7=nega_key + +sff_cpld_reg.mode_33_7=config +sff_cpld_reg.src_33_7=logic_file +sff_cpld_reg.frmt_33_7=byte +sff_cpld_reg.pola_33_7=positive +sff_cpld_reg.fpath_33_7=/dev/cpld2 +sff_cpld_reg.addr_33_7=0x74 +sff_cpld_reg.len_33_7=1 +sff_cpld_reg.val_type_33_7=nega_key + +sff_cpld_reg.mode_34_7=config +sff_cpld_reg.src_34_7=logic_file +sff_cpld_reg.frmt_34_7=byte +sff_cpld_reg.pola_34_7=positive +sff_cpld_reg.fpath_34_7=/dev/cpld2 +sff_cpld_reg.addr_34_7=0x75 +sff_cpld_reg.len_34_7=1 +sff_cpld_reg.val_type_34_7=nega_key + +sff_cpld_reg.mode_35_7=config +sff_cpld_reg.src_35_7=logic_file +sff_cpld_reg.frmt_35_7=byte +sff_cpld_reg.pola_35_7=positive +sff_cpld_reg.fpath_35_7=/dev/cpld2 +sff_cpld_reg.addr_35_7=0x76 +sff_cpld_reg.len_35_7=1 +sff_cpld_reg.val_type_35_7=nega_key + +sff_cpld_reg.mode_36_7=config +sff_cpld_reg.src_36_7=logic_file +sff_cpld_reg.frmt_36_7=byte +sff_cpld_reg.pola_36_7=positive +sff_cpld_reg.fpath_36_7=/dev/cpld2 +sff_cpld_reg.addr_36_7=0x77 +sff_cpld_reg.len_36_7=1 +sff_cpld_reg.val_type_36_7=nega_key + +sff_cpld_reg.mode_37_7=config +sff_cpld_reg.src_37_7=logic_file +sff_cpld_reg.frmt_37_7=byte +sff_cpld_reg.pola_37_7=positive +sff_cpld_reg.fpath_37_7=/dev/cpld2 +sff_cpld_reg.addr_37_7=0x78 +sff_cpld_reg.len_37_7=1 +sff_cpld_reg.val_type_37_7=nega_key + +sff_cpld_reg.mode_38_7=config +sff_cpld_reg.src_38_7=logic_file +sff_cpld_reg.frmt_38_7=byte +sff_cpld_reg.pola_38_7=positive +sff_cpld_reg.fpath_38_7=/dev/cpld2 +sff_cpld_reg.addr_38_7=0x79 +sff_cpld_reg.len_38_7=1 +sff_cpld_reg.val_type_38_7=nega_key + +sff_cpld_reg.mode_39_7=config +sff_cpld_reg.src_39_7=logic_file +sff_cpld_reg.frmt_39_7=byte +sff_cpld_reg.pola_39_7=positive +sff_cpld_reg.fpath_39_7=/dev/cpld2 +sff_cpld_reg.addr_39_7=0x7a +sff_cpld_reg.len_39_7=1 +sff_cpld_reg.val_type_39_7=nega_key + +sff_cpld_reg.mode_40_7=config +sff_cpld_reg.src_40_7=logic_file +sff_cpld_reg.frmt_40_7=byte +sff_cpld_reg.pola_40_7=positive +sff_cpld_reg.fpath_40_7=/dev/cpld2 +sff_cpld_reg.addr_40_7=0x7b +sff_cpld_reg.len_40_7=1 +sff_cpld_reg.val_type_40_7=nega_key + +sff_cpld_reg.mode_41_7=config +sff_cpld_reg.src_41_7=logic_file +sff_cpld_reg.frmt_41_7=byte +sff_cpld_reg.pola_41_7=positive +sff_cpld_reg.fpath_41_7=/dev/cpld2 +sff_cpld_reg.addr_41_7=0x7c +sff_cpld_reg.len_41_7=1 +sff_cpld_reg.val_type_41_7=nega_key + +sff_cpld_reg.mode_42_7=config +sff_cpld_reg.src_42_7=logic_file +sff_cpld_reg.frmt_42_7=byte +sff_cpld_reg.pola_42_7=positive +sff_cpld_reg.fpath_42_7=/dev/cpld2 +sff_cpld_reg.addr_42_7=0x7d +sff_cpld_reg.len_42_7=1 +sff_cpld_reg.val_type_42_7=nega_key + +sff_cpld_reg.mode_43_7=config +sff_cpld_reg.src_43_7=logic_file +sff_cpld_reg.frmt_43_7=byte +sff_cpld_reg.pola_43_7=positive +sff_cpld_reg.fpath_43_7=/dev/cpld3 +sff_cpld_reg.addr_43_7=0x7c +sff_cpld_reg.len_43_7=1 +sff_cpld_reg.val_type_43_7=nega_key + +sff_cpld_reg.mode_44_7=config +sff_cpld_reg.src_44_7=logic_file +sff_cpld_reg.frmt_44_7=byte +sff_cpld_reg.pola_44_7=positive +sff_cpld_reg.fpath_44_7=/dev/cpld3 +sff_cpld_reg.addr_44_7=0x7d +sff_cpld_reg.len_44_7=1 +sff_cpld_reg.val_type_44_7=nega_key + +sff_cpld_reg.mode_45_7=config +sff_cpld_reg.src_45_7=logic_file +sff_cpld_reg.frmt_45_7=byte +sff_cpld_reg.pola_45_7=positive +sff_cpld_reg.fpath_45_7=/dev/cpld3 +sff_cpld_reg.addr_45_7=0x7e +sff_cpld_reg.len_45_7=1 +sff_cpld_reg.val_type_45_7=nega_key + +sff_cpld_reg.mode_46_7=config +sff_cpld_reg.src_46_7=logic_file +sff_cpld_reg.frmt_46_7=byte +sff_cpld_reg.pola_46_7=positive +sff_cpld_reg.fpath_46_7=/dev/cpld3 +sff_cpld_reg.addr_46_7=0x7f +sff_cpld_reg.len_46_7=1 +sff_cpld_reg.val_type_46_7=nega_key + +sff_cpld_reg.mode_47_7=config +sff_cpld_reg.src_47_7=logic_file +sff_cpld_reg.frmt_47_7=byte +sff_cpld_reg.pola_47_7=positive +sff_cpld_reg.fpath_47_7=/dev/cpld3 +sff_cpld_reg.addr_47_7=0x80 +sff_cpld_reg.len_47_7=1 +sff_cpld_reg.val_type_47_7=nega_key + +sff_cpld_reg.mode_48_7=config +sff_cpld_reg.src_48_7=logic_file +sff_cpld_reg.frmt_48_7=byte +sff_cpld_reg.pola_48_7=positive +sff_cpld_reg.fpath_48_7=/dev/cpld3 +sff_cpld_reg.addr_48_7=0x81 +sff_cpld_reg.len_48_7=1 +sff_cpld_reg.val_type_48_7=nega_key + +sff_cpld_reg.mode_49_7=config +sff_cpld_reg.src_49_7=logic_file +sff_cpld_reg.frmt_49_7=byte +sff_cpld_reg.pola_49_7=positive +sff_cpld_reg.fpath_49_7=/dev/cpld3 +sff_cpld_reg.addr_49_7=0x82 +sff_cpld_reg.len_49_7=1 +sff_cpld_reg.val_type_49_7=nega_key + +sff_cpld_reg.mode_50_7=config +sff_cpld_reg.src_50_7=logic_file +sff_cpld_reg.frmt_50_7=byte +sff_cpld_reg.pola_50_7=positive +sff_cpld_reg.fpath_50_7=/dev/cpld3 +sff_cpld_reg.addr_50_7=0x83 +sff_cpld_reg.len_50_7=1 +sff_cpld_reg.val_type_50_7=nega_key + +sff_cpld_reg.mode_51_7=config +sff_cpld_reg.src_51_7=logic_file +sff_cpld_reg.frmt_51_7=byte +sff_cpld_reg.pola_51_7=positive +sff_cpld_reg.fpath_51_7=/dev/cpld3 +sff_cpld_reg.addr_51_7=0x84 +sff_cpld_reg.len_51_7=1 +sff_cpld_reg.val_type_51_7=nega_key + +sff_cpld_reg.mode_52_7=config +sff_cpld_reg.src_52_7=logic_file +sff_cpld_reg.frmt_52_7=byte +sff_cpld_reg.pola_52_7=positive +sff_cpld_reg.fpath_52_7=/dev/cpld3 +sff_cpld_reg.addr_52_7=0x85 +sff_cpld_reg.len_52_7=1 +sff_cpld_reg.val_type_52_7=nega_key + +sff_cpld_reg.mode_53_7=config +sff_cpld_reg.src_53_7=logic_file +sff_cpld_reg.frmt_53_7=byte +sff_cpld_reg.pola_53_7=positive +sff_cpld_reg.fpath_53_7=/dev/cpld3 +sff_cpld_reg.addr_53_7=0x86 +sff_cpld_reg.len_53_7=1 +sff_cpld_reg.val_type_53_7=nega_key + +sff_cpld_reg.mode_54_7=config +sff_cpld_reg.src_54_7=logic_file +sff_cpld_reg.frmt_54_7=byte +sff_cpld_reg.pola_54_7=positive +sff_cpld_reg.fpath_54_7=/dev/cpld3 +sff_cpld_reg.addr_54_7=0x87 +sff_cpld_reg.len_54_7=1 +sff_cpld_reg.val_type_54_7=nega_key + +sff_cpld_reg.mode_55_7=config +sff_cpld_reg.src_55_7=logic_file +sff_cpld_reg.frmt_55_7=byte +sff_cpld_reg.pola_55_7=positive +sff_cpld_reg.fpath_55_7=/dev/cpld3 +sff_cpld_reg.addr_55_7=0x88 +sff_cpld_reg.len_55_7=1 +sff_cpld_reg.val_type_55_7=nega_key + +sff_cpld_reg.mode_56_7=config +sff_cpld_reg.src_56_7=logic_file +sff_cpld_reg.frmt_56_7=byte +sff_cpld_reg.pola_56_7=positive +sff_cpld_reg.fpath_56_7=/dev/cpld3 +sff_cpld_reg.addr_56_7=0x89 +sff_cpld_reg.len_56_7=1 +sff_cpld_reg.val_type_56_7=nega_key + +sff_cpld_reg.mode_57_7=config +sff_cpld_reg.src_57_7=logic_file +sff_cpld_reg.frmt_57_7=byte +sff_cpld_reg.pola_57_7=positive +sff_cpld_reg.fpath_57_7=/dev/cpld3 +sff_cpld_reg.addr_57_7=0x8a +sff_cpld_reg.len_57_7=1 +sff_cpld_reg.val_type_57_7=nega_key + +sff_cpld_reg.mode_58_7=config +sff_cpld_reg.src_58_7=logic_file +sff_cpld_reg.frmt_58_7=byte +sff_cpld_reg.pola_58_7=positive +sff_cpld_reg.fpath_58_7=/dev/cpld3 +sff_cpld_reg.addr_58_7=0x8b +sff_cpld_reg.len_58_7=1 +sff_cpld_reg.val_type_58_7=nega_key + +sff_cpld_reg.mode_59_7=config +sff_cpld_reg.src_59_7=logic_file +sff_cpld_reg.frmt_59_7=byte +sff_cpld_reg.pola_59_7=positive +sff_cpld_reg.fpath_59_7=/dev/cpld3 +sff_cpld_reg.addr_59_7=0x8c +sff_cpld_reg.len_59_7=1 +sff_cpld_reg.val_type_59_7=nega_key + +sff_cpld_reg.mode_60_7=config +sff_cpld_reg.src_60_7=logic_file +sff_cpld_reg.frmt_60_7=byte +sff_cpld_reg.pola_60_7=positive +sff_cpld_reg.fpath_60_7=/dev/cpld3 +sff_cpld_reg.addr_60_7=0x8d +sff_cpld_reg.len_60_7=1 +sff_cpld_reg.val_type_60_7=nega_key + +sff_cpld_reg.mode_61_7=config +sff_cpld_reg.src_61_7=logic_file +sff_cpld_reg.frmt_61_7=byte +sff_cpld_reg.pola_61_7=positive +sff_cpld_reg.fpath_61_7=/dev/cpld3 +sff_cpld_reg.addr_61_7=0x8e +sff_cpld_reg.len_61_7=1 +sff_cpld_reg.val_type_61_7=nega_key + +sff_cpld_reg.mode_62_7=config +sff_cpld_reg.src_62_7=logic_file +sff_cpld_reg.frmt_62_7=byte +sff_cpld_reg.pola_62_7=positive +sff_cpld_reg.fpath_62_7=/dev/cpld3 +sff_cpld_reg.addr_62_7=0x8f +sff_cpld_reg.len_62_7=1 +sff_cpld_reg.val_type_62_7=nega_key + +sff_cpld_reg.mode_63_7=config +sff_cpld_reg.src_63_7=logic_file +sff_cpld_reg.frmt_63_7=byte +sff_cpld_reg.pola_63_7=positive +sff_cpld_reg.fpath_63_7=/dev/cpld3 +sff_cpld_reg.addr_63_7=0x90 +sff_cpld_reg.len_63_7=1 +sff_cpld_reg.val_type_63_7=nega_key + +sff_cpld_reg.mode_64_7=config +sff_cpld_reg.src_64_7=logic_file +sff_cpld_reg.frmt_64_7=byte +sff_cpld_reg.pola_64_7=positive +sff_cpld_reg.fpath_64_7=/dev/cpld3 +sff_cpld_reg.addr_64_7=0x91 +sff_cpld_reg.len_64_7=1 +sff_cpld_reg.val_type_64_7=nega_key + +sff_cpld_reg.mode_65_7=config +sff_cpld_reg.src_65_7=logic_file +sff_cpld_reg.frmt_65_7=byte +sff_cpld_reg.pola_65_7=positive +sff_cpld_reg.fpath_65_7=/dev/cpld2 +sff_cpld_reg.addr_65_7=0x7e +sff_cpld_reg.len_65_7=1 +sff_cpld_reg.val_type_65_7=nega_key + +sff_cpld_reg.mode_66_7=config +sff_cpld_reg.src_66_7=logic_file +sff_cpld_reg.frmt_66_7=byte +sff_cpld_reg.pola_66_7=positive +sff_cpld_reg.fpath_66_7=/dev/cpld2 +sff_cpld_reg.addr_66_7=0x7f +sff_cpld_reg.len_66_7=1 +sff_cpld_reg.val_type_66_7=nega_key + +sff_cpld_reg.mode_67_7=config +sff_cpld_reg.src_67_7=logic_file +sff_cpld_reg.frmt_67_7=byte +sff_cpld_reg.pola_67_7=positive +sff_cpld_reg.fpath_67_7=/dev/cpld2 +sff_cpld_reg.addr_67_7=0x80 +sff_cpld_reg.len_67_7=1 +sff_cpld_reg.val_type_67_7=nega_key + +sff_cpld_reg.mode_68_7=config +sff_cpld_reg.src_68_7=logic_file +sff_cpld_reg.frmt_68_7=byte +sff_cpld_reg.pola_68_7=positive +sff_cpld_reg.fpath_68_7=/dev/cpld2 +sff_cpld_reg.addr_68_7=0x81 +sff_cpld_reg.len_68_7=1 +sff_cpld_reg.val_type_68_7=nega_key + +sff_cpld_reg.mode_69_7=config +sff_cpld_reg.src_69_7=logic_file +sff_cpld_reg.frmt_69_7=byte +sff_cpld_reg.pola_69_7=positive +sff_cpld_reg.fpath_69_7=/dev/cpld2 +sff_cpld_reg.addr_69_7=0x82 +sff_cpld_reg.len_69_7=1 +sff_cpld_reg.val_type_69_7=nega_key + +sff_cpld_reg.mode_70_7=config +sff_cpld_reg.src_70_7=logic_file +sff_cpld_reg.frmt_70_7=byte +sff_cpld_reg.pola_70_7=positive +sff_cpld_reg.fpath_70_7=/dev/cpld2 +sff_cpld_reg.addr_70_7=0x83 +sff_cpld_reg.len_70_7=1 +sff_cpld_reg.val_type_70_7=nega_key + +sff_cpld_reg.mode_71_7=config +sff_cpld_reg.src_71_7=logic_file +sff_cpld_reg.frmt_71_7=byte +sff_cpld_reg.pola_71_7=positive +sff_cpld_reg.fpath_71_7=/dev/cpld2 +sff_cpld_reg.addr_71_7=0x84 +sff_cpld_reg.len_71_7=1 +sff_cpld_reg.val_type_71_7=nega_key + +sff_cpld_reg.mode_72_7=config +sff_cpld_reg.src_72_7=logic_file +sff_cpld_reg.frmt_72_7=byte +sff_cpld_reg.pola_72_7=positive +sff_cpld_reg.fpath_72_7=/dev/cpld2 +sff_cpld_reg.addr_72_7=0x85 +sff_cpld_reg.len_72_7=1 +sff_cpld_reg.val_type_72_7=nega_key + +sff_cpld_reg.mode_73_7=config +sff_cpld_reg.src_73_7=logic_file +sff_cpld_reg.frmt_73_7=byte +sff_cpld_reg.pola_73_7=positive +sff_cpld_reg.fpath_73_7=/dev/cpld2 +sff_cpld_reg.addr_73_7=0x86 +sff_cpld_reg.len_73_7=1 +sff_cpld_reg.val_type_73_7=nega_key + +sff_cpld_reg.mode_74_7=config +sff_cpld_reg.src_74_7=logic_file +sff_cpld_reg.frmt_74_7=byte +sff_cpld_reg.pola_74_7=positive +sff_cpld_reg.fpath_74_7=/dev/cpld2 +sff_cpld_reg.addr_74_7=0x87 +sff_cpld_reg.len_74_7=1 +sff_cpld_reg.val_type_74_7=nega_key + +sff_cpld_reg.mode_75_7=config +sff_cpld_reg.src_75_7=logic_file +sff_cpld_reg.frmt_75_7=byte +sff_cpld_reg.pola_75_7=positive +sff_cpld_reg.fpath_75_7=/dev/cpld3 +sff_cpld_reg.addr_75_7=0x92 +sff_cpld_reg.len_75_7=1 +sff_cpld_reg.val_type_75_7=nega_key + +sff_cpld_reg.mode_76_7=config +sff_cpld_reg.src_76_7=logic_file +sff_cpld_reg.frmt_76_7=byte +sff_cpld_reg.pola_76_7=positive +sff_cpld_reg.fpath_76_7=/dev/cpld3 +sff_cpld_reg.addr_76_7=0x93 +sff_cpld_reg.len_76_7=1 +sff_cpld_reg.val_type_76_7=nega_key + +sff_cpld_reg.mode_77_7=config +sff_cpld_reg.src_77_7=logic_file +sff_cpld_reg.frmt_77_7=byte +sff_cpld_reg.pola_77_7=positive +sff_cpld_reg.fpath_77_7=/dev/cpld3 +sff_cpld_reg.addr_77_7=0x94 +sff_cpld_reg.len_77_7=1 +sff_cpld_reg.val_type_77_7=nega_key + +sff_cpld_reg.mode_78_7=config +sff_cpld_reg.src_78_7=logic_file +sff_cpld_reg.frmt_78_7=byte +sff_cpld_reg.pola_78_7=positive +sff_cpld_reg.fpath_78_7=/dev/cpld3 +sff_cpld_reg.addr_78_7=0x95 +sff_cpld_reg.len_78_7=1 +sff_cpld_reg.val_type_78_7=nega_key + +sff_cpld_reg.mode_79_7=config +sff_cpld_reg.src_79_7=logic_file +sff_cpld_reg.frmt_79_7=byte +sff_cpld_reg.pola_79_7=positive +sff_cpld_reg.fpath_79_7=/dev/cpld3 +sff_cpld_reg.addr_79_7=0x96 +sff_cpld_reg.len_79_7=1 +sff_cpld_reg.val_type_79_7=nega_key + +sff_cpld_reg.mode_80_7=config +sff_cpld_reg.src_80_7=logic_file +sff_cpld_reg.frmt_80_7=byte +sff_cpld_reg.pola_80_7=positive +sff_cpld_reg.fpath_80_7=/dev/cpld3 +sff_cpld_reg.addr_80_7=0x97 +sff_cpld_reg.len_80_7=1 +sff_cpld_reg.val_type_80_7=nega_key + +sff_cpld_reg.mode_81_7=config +sff_cpld_reg.src_81_7=logic_file +sff_cpld_reg.frmt_81_7=byte +sff_cpld_reg.pola_81_7=positive +sff_cpld_reg.fpath_81_7=/dev/cpld3 +sff_cpld_reg.addr_81_7=0x98 +sff_cpld_reg.len_81_7=1 +sff_cpld_reg.val_type_81_7=nega_key + +sff_cpld_reg.mode_82_7=config +sff_cpld_reg.src_82_7=logic_file +sff_cpld_reg.frmt_82_7=byte +sff_cpld_reg.pola_82_7=positive +sff_cpld_reg.fpath_82_7=/dev/cpld3 +sff_cpld_reg.addr_82_7=0x99 +sff_cpld_reg.len_82_7=1 +sff_cpld_reg.val_type_82_7=nega_key + +sff_cpld_reg.mode_83_7=config +sff_cpld_reg.src_83_7=logic_file +sff_cpld_reg.frmt_83_7=byte +sff_cpld_reg.pola_83_7=positive +sff_cpld_reg.fpath_83_7=/dev/cpld3 +sff_cpld_reg.addr_83_7=0x9a +sff_cpld_reg.len_83_7=1 +sff_cpld_reg.val_type_83_7=nega_key + +sff_cpld_reg.mode_84_7=config +sff_cpld_reg.src_84_7=logic_file +sff_cpld_reg.frmt_84_7=byte +sff_cpld_reg.pola_84_7=positive +sff_cpld_reg.fpath_84_7=/dev/cpld3 +sff_cpld_reg.addr_84_7=0x9b +sff_cpld_reg.len_84_7=1 +sff_cpld_reg.val_type_84_7=nega_key + +sff_cpld_reg.mode_85_7=config +sff_cpld_reg.src_85_7=logic_file +sff_cpld_reg.frmt_85_7=byte +sff_cpld_reg.pola_85_7=positive +sff_cpld_reg.fpath_85_7=/dev/cpld3 +sff_cpld_reg.addr_85_7=0x9c +sff_cpld_reg.len_85_7=1 +sff_cpld_reg.val_type_85_7=nega_key + +sff_cpld_reg.mode_86_7=config +sff_cpld_reg.src_86_7=logic_file +sff_cpld_reg.frmt_86_7=byte +sff_cpld_reg.pola_86_7=positive +sff_cpld_reg.fpath_86_7=/dev/cpld3 +sff_cpld_reg.addr_86_7=0x9d +sff_cpld_reg.len_86_7=1 +sff_cpld_reg.val_type_86_7=nega_key + +sff_cpld_reg.mode_87_7=config +sff_cpld_reg.src_87_7=logic_file +sff_cpld_reg.frmt_87_7=byte +sff_cpld_reg.pola_87_7=positive +sff_cpld_reg.fpath_87_7=/dev/cpld3 +sff_cpld_reg.addr_87_7=0x9e +sff_cpld_reg.len_87_7=1 +sff_cpld_reg.val_type_87_7=nega_key + +sff_cpld_reg.mode_88_7=config +sff_cpld_reg.src_88_7=logic_file +sff_cpld_reg.frmt_88_7=byte +sff_cpld_reg.pola_88_7=positive +sff_cpld_reg.fpath_88_7=/dev/cpld3 +sff_cpld_reg.addr_88_7=0x9f +sff_cpld_reg.len_88_7=1 +sff_cpld_reg.val_type_88_7=nega_key + +sff_cpld_reg.mode_89_7=config +sff_cpld_reg.src_89_7=logic_file +sff_cpld_reg.frmt_89_7=byte +sff_cpld_reg.pola_89_7=positive +sff_cpld_reg.fpath_89_7=/dev/cpld3 +sff_cpld_reg.addr_89_7=0xa0 +sff_cpld_reg.len_89_7=1 +sff_cpld_reg.val_type_89_7=nega_key + +sff_cpld_reg.mode_90_7=config +sff_cpld_reg.src_90_7=logic_file +sff_cpld_reg.frmt_90_7=byte +sff_cpld_reg.pola_90_7=positive +sff_cpld_reg.fpath_90_7=/dev/cpld3 +sff_cpld_reg.addr_90_7=0xa1 +sff_cpld_reg.len_90_7=1 +sff_cpld_reg.val_type_90_7=nega_key + +sff_cpld_reg.mode_91_7=config +sff_cpld_reg.src_91_7=logic_file +sff_cpld_reg.frmt_91_7=byte +sff_cpld_reg.pola_91_7=positive +sff_cpld_reg.fpath_91_7=/dev/cpld3 +sff_cpld_reg.addr_91_7=0xa2 +sff_cpld_reg.len_91_7=1 +sff_cpld_reg.val_type_91_7=nega_key + +sff_cpld_reg.mode_92_7=config +sff_cpld_reg.src_92_7=logic_file +sff_cpld_reg.frmt_92_7=byte +sff_cpld_reg.pola_92_7=positive +sff_cpld_reg.fpath_92_7=/dev/cpld3 +sff_cpld_reg.addr_92_7=0xa3 +sff_cpld_reg.len_92_7=1 +sff_cpld_reg.val_type_92_7=nega_key + +sff_cpld_reg.mode_93_7=config +sff_cpld_reg.src_93_7=logic_file +sff_cpld_reg.frmt_93_7=byte +sff_cpld_reg.pola_93_7=positive +sff_cpld_reg.fpath_93_7=/dev/cpld3 +sff_cpld_reg.addr_93_7=0xa4 +sff_cpld_reg.len_93_7=1 +sff_cpld_reg.val_type_93_7=nega_key + +sff_cpld_reg.mode_94_7=config +sff_cpld_reg.src_94_7=logic_file +sff_cpld_reg.frmt_94_7=byte +sff_cpld_reg.pola_94_7=positive +sff_cpld_reg.fpath_94_7=/dev/cpld3 +sff_cpld_reg.addr_94_7=0xa5 +sff_cpld_reg.len_94_7=1 +sff_cpld_reg.val_type_94_7=nega_key + +sff_cpld_reg.mode_95_7=config +sff_cpld_reg.src_95_7=logic_file +sff_cpld_reg.frmt_95_7=byte +sff_cpld_reg.pola_95_7=positive +sff_cpld_reg.fpath_95_7=/dev/cpld3 +sff_cpld_reg.addr_95_7=0xa6 +sff_cpld_reg.len_95_7=1 +sff_cpld_reg.val_type_95_7=nega_key + +sff_cpld_reg.mode_96_7=config +sff_cpld_reg.src_96_7=logic_file +sff_cpld_reg.frmt_96_7=byte +sff_cpld_reg.pola_96_7=positive +sff_cpld_reg.fpath_96_7=/dev/cpld3 +sff_cpld_reg.addr_96_7=0xa7 +sff_cpld_reg.len_96_7=1 +sff_cpld_reg.val_type_96_7=nega_key + +sff_cpld_reg.mode_97_7=config +sff_cpld_reg.src_97_7=logic_file +sff_cpld_reg.frmt_97_7=byte +sff_cpld_reg.pola_97_7=positive +sff_cpld_reg.fpath_97_7=/dev/cpld6 +sff_cpld_reg.addr_97_7=0x70 +sff_cpld_reg.len_97_7=1 +sff_cpld_reg.val_type_97_7=nega_key + +sff_cpld_reg.mode_98_7=config +sff_cpld_reg.src_98_7=logic_file +sff_cpld_reg.frmt_98_7=byte +sff_cpld_reg.pola_98_7=positive +sff_cpld_reg.fpath_98_7=/dev/cpld6 +sff_cpld_reg.addr_98_7=0x71 +sff_cpld_reg.len_98_7=1 +sff_cpld_reg.val_type_98_7=nega_key + +sff_cpld_reg.mode_99_7=config +sff_cpld_reg.src_99_7=logic_file +sff_cpld_reg.frmt_99_7=byte +sff_cpld_reg.pola_99_7=positive +sff_cpld_reg.fpath_99_7=/dev/cpld6 +sff_cpld_reg.addr_99_7=0x72 +sff_cpld_reg.len_99_7=1 +sff_cpld_reg.val_type_99_7=nega_key + +sff_cpld_reg.mode_100_7=config +sff_cpld_reg.src_100_7=logic_file +sff_cpld_reg.frmt_100_7=byte +sff_cpld_reg.pola_100_7=positive +sff_cpld_reg.fpath_100_7=/dev/cpld6 +sff_cpld_reg.addr_100_7=0x73 +sff_cpld_reg.len_100_7=1 +sff_cpld_reg.val_type_100_7=nega_key + +sff_cpld_reg.mode_101_7=config +sff_cpld_reg.src_101_7=logic_file +sff_cpld_reg.frmt_101_7=byte +sff_cpld_reg.pola_101_7=positive +sff_cpld_reg.fpath_101_7=/dev/cpld6 +sff_cpld_reg.addr_101_7=0x74 +sff_cpld_reg.len_101_7=1 +sff_cpld_reg.val_type_101_7=nega_key + +sff_cpld_reg.mode_102_7=config +sff_cpld_reg.src_102_7=logic_file +sff_cpld_reg.frmt_102_7=byte +sff_cpld_reg.pola_102_7=positive +sff_cpld_reg.fpath_102_7=/dev/cpld6 +sff_cpld_reg.addr_102_7=0x75 +sff_cpld_reg.len_102_7=1 +sff_cpld_reg.val_type_102_7=nega_key + +sff_cpld_reg.mode_103_7=config +sff_cpld_reg.src_103_7=logic_file +sff_cpld_reg.frmt_103_7=byte +sff_cpld_reg.pola_103_7=positive +sff_cpld_reg.fpath_103_7=/dev/cpld6 +sff_cpld_reg.addr_103_7=0x76 +sff_cpld_reg.len_103_7=1 +sff_cpld_reg.val_type_103_7=nega_key + +sff_cpld_reg.mode_104_7=config +sff_cpld_reg.src_104_7=logic_file +sff_cpld_reg.frmt_104_7=byte +sff_cpld_reg.pola_104_7=positive +sff_cpld_reg.fpath_104_7=/dev/cpld6 +sff_cpld_reg.addr_104_7=0x77 +sff_cpld_reg.len_104_7=1 +sff_cpld_reg.val_type_104_7=nega_key + +sff_cpld_reg.mode_105_7=config +sff_cpld_reg.src_105_7=logic_file +sff_cpld_reg.frmt_105_7=byte +sff_cpld_reg.pola_105_7=positive +sff_cpld_reg.fpath_105_7=/dev/cpld6 +sff_cpld_reg.addr_105_7=0x78 +sff_cpld_reg.len_105_7=1 +sff_cpld_reg.val_type_105_7=nega_key + +sff_cpld_reg.mode_106_7=config +sff_cpld_reg.src_106_7=logic_file +sff_cpld_reg.frmt_106_7=byte +sff_cpld_reg.pola_106_7=positive +sff_cpld_reg.fpath_106_7=/dev/cpld6 +sff_cpld_reg.addr_106_7=0x79 +sff_cpld_reg.len_106_7=1 +sff_cpld_reg.val_type_106_7=nega_key + +sff_cpld_reg.mode_107_7=config +sff_cpld_reg.src_107_7=logic_file +sff_cpld_reg.frmt_107_7=byte +sff_cpld_reg.pola_107_7=positive +sff_cpld_reg.fpath_107_7=/dev/cpld6 +sff_cpld_reg.addr_107_7=0x7a +sff_cpld_reg.len_107_7=1 +sff_cpld_reg.val_type_107_7=nega_key + +sff_cpld_reg.mode_108_7=config +sff_cpld_reg.src_108_7=logic_file +sff_cpld_reg.frmt_108_7=byte +sff_cpld_reg.pola_108_7=positive +sff_cpld_reg.fpath_108_7=/dev/cpld6 +sff_cpld_reg.addr_108_7=0x7b +sff_cpld_reg.len_108_7=1 +sff_cpld_reg.val_type_108_7=nega_key + +sff_cpld_reg.mode_109_7=config +sff_cpld_reg.src_109_7=logic_file +sff_cpld_reg.frmt_109_7=byte +sff_cpld_reg.pola_109_7=positive +sff_cpld_reg.fpath_109_7=/dev/cpld6 +sff_cpld_reg.addr_109_7=0x7c +sff_cpld_reg.len_109_7=1 +sff_cpld_reg.val_type_109_7=nega_key + +sff_cpld_reg.mode_110_7=config +sff_cpld_reg.src_110_7=logic_file +sff_cpld_reg.frmt_110_7=byte +sff_cpld_reg.pola_110_7=positive +sff_cpld_reg.fpath_110_7=/dev/cpld6 +sff_cpld_reg.addr_110_7=0x7d +sff_cpld_reg.len_110_7=1 +sff_cpld_reg.val_type_110_7=nega_key + +sff_cpld_reg.mode_111_7=config +sff_cpld_reg.src_111_7=logic_file +sff_cpld_reg.frmt_111_7=byte +sff_cpld_reg.pola_111_7=positive +sff_cpld_reg.fpath_111_7=/dev/cpld6 +sff_cpld_reg.addr_111_7=0x7e +sff_cpld_reg.len_111_7=1 +sff_cpld_reg.val_type_111_7=nega_key + +sff_cpld_reg.mode_112_7=config +sff_cpld_reg.src_112_7=logic_file +sff_cpld_reg.frmt_112_7=byte +sff_cpld_reg.pola_112_7=positive +sff_cpld_reg.fpath_112_7=/dev/cpld6 +sff_cpld_reg.addr_112_7=0x7f +sff_cpld_reg.len_112_7=1 +sff_cpld_reg.val_type_112_7=nega_key + +sff_cpld_reg.mode_113_7=config +sff_cpld_reg.src_113_7=logic_file +sff_cpld_reg.frmt_113_7=byte +sff_cpld_reg.pola_113_7=positive +sff_cpld_reg.fpath_113_7=/dev/cpld6 +sff_cpld_reg.addr_113_7=0x80 +sff_cpld_reg.len_113_7=1 +sff_cpld_reg.val_type_113_7=nega_key + +sff_cpld_reg.mode_114_7=config +sff_cpld_reg.src_114_7=logic_file +sff_cpld_reg.frmt_114_7=byte +sff_cpld_reg.pola_114_7=positive +sff_cpld_reg.fpath_114_7=/dev/cpld6 +sff_cpld_reg.addr_114_7=0x81 +sff_cpld_reg.len_114_7=1 +sff_cpld_reg.val_type_114_7=nega_key + +sff_cpld_reg.mode_115_7=config +sff_cpld_reg.src_115_7=logic_file +sff_cpld_reg.frmt_115_7=byte +sff_cpld_reg.pola_115_7=positive +sff_cpld_reg.fpath_115_7=/dev/cpld6 +sff_cpld_reg.addr_115_7=0x82 +sff_cpld_reg.len_115_7=1 +sff_cpld_reg.val_type_115_7=nega_key + +sff_cpld_reg.mode_116_7=config +sff_cpld_reg.src_116_7=logic_file +sff_cpld_reg.frmt_116_7=byte +sff_cpld_reg.pola_116_7=positive +sff_cpld_reg.fpath_116_7=/dev/cpld6 +sff_cpld_reg.addr_116_7=0x83 +sff_cpld_reg.len_116_7=1 +sff_cpld_reg.val_type_116_7=nega_key + +sff_cpld_reg.mode_117_7=config +sff_cpld_reg.src_117_7=logic_file +sff_cpld_reg.frmt_117_7=byte +sff_cpld_reg.pola_117_7=positive +sff_cpld_reg.fpath_117_7=/dev/cpld6 +sff_cpld_reg.addr_117_7=0x84 +sff_cpld_reg.len_117_7=1 +sff_cpld_reg.val_type_117_7=nega_key + +sff_cpld_reg.mode_118_7=config +sff_cpld_reg.src_118_7=logic_file +sff_cpld_reg.frmt_118_7=byte +sff_cpld_reg.pola_118_7=positive +sff_cpld_reg.fpath_118_7=/dev/cpld6 +sff_cpld_reg.addr_118_7=0x85 +sff_cpld_reg.len_118_7=1 +sff_cpld_reg.val_type_118_7=nega_key + +sff_cpld_reg.mode_119_7=config +sff_cpld_reg.src_119_7=logic_file +sff_cpld_reg.frmt_119_7=byte +sff_cpld_reg.pola_119_7=positive +sff_cpld_reg.fpath_119_7=/dev/cpld6 +sff_cpld_reg.addr_119_7=0x86 +sff_cpld_reg.len_119_7=1 +sff_cpld_reg.val_type_119_7=nega_key + +sff_cpld_reg.mode_120_7=config +sff_cpld_reg.src_120_7=logic_file +sff_cpld_reg.frmt_120_7=byte +sff_cpld_reg.pola_120_7=positive +sff_cpld_reg.fpath_120_7=/dev/cpld6 +sff_cpld_reg.addr_120_7=0x87 +sff_cpld_reg.len_120_7=1 +sff_cpld_reg.val_type_120_7=nega_key + +sff_cpld_reg.mode_121_7=config +sff_cpld_reg.src_121_7=logic_file +sff_cpld_reg.frmt_121_7=byte +sff_cpld_reg.pola_121_7=positive +sff_cpld_reg.fpath_121_7=/dev/cpld6 +sff_cpld_reg.addr_121_7=0x88 +sff_cpld_reg.len_121_7=1 +sff_cpld_reg.val_type_121_7=nega_key + +sff_cpld_reg.mode_122_7=config +sff_cpld_reg.src_122_7=logic_file +sff_cpld_reg.frmt_122_7=byte +sff_cpld_reg.pola_122_7=positive +sff_cpld_reg.fpath_122_7=/dev/cpld6 +sff_cpld_reg.addr_122_7=0x89 +sff_cpld_reg.len_122_7=1 +sff_cpld_reg.val_type_122_7=nega_key + +sff_cpld_reg.mode_123_7=config +sff_cpld_reg.src_123_7=logic_file +sff_cpld_reg.frmt_123_7=byte +sff_cpld_reg.pola_123_7=positive +sff_cpld_reg.fpath_123_7=/dev/cpld6 +sff_cpld_reg.addr_123_7=0x8a +sff_cpld_reg.len_123_7=1 +sff_cpld_reg.val_type_123_7=nega_key + +sff_cpld_reg.mode_124_7=config +sff_cpld_reg.src_124_7=logic_file +sff_cpld_reg.frmt_124_7=byte +sff_cpld_reg.pola_124_7=positive +sff_cpld_reg.fpath_124_7=/dev/cpld6 +sff_cpld_reg.addr_124_7=0x8b +sff_cpld_reg.len_124_7=1 +sff_cpld_reg.val_type_124_7=nega_key + +sff_cpld_reg.mode_125_7=config +sff_cpld_reg.src_125_7=logic_file +sff_cpld_reg.frmt_125_7=byte +sff_cpld_reg.pola_125_7=positive +sff_cpld_reg.fpath_125_7=/dev/cpld6 +sff_cpld_reg.addr_125_7=0x8c +sff_cpld_reg.len_125_7=1 +sff_cpld_reg.val_type_125_7=nega_key + +sff_cpld_reg.mode_126_7=config +sff_cpld_reg.src_126_7=logic_file +sff_cpld_reg.frmt_126_7=byte +sff_cpld_reg.pola_126_7=positive +sff_cpld_reg.fpath_126_7=/dev/cpld6 +sff_cpld_reg.addr_126_7=0x8d +sff_cpld_reg.len_126_7=1 +sff_cpld_reg.val_type_126_7=nega_key + +sff_cpld_reg.mode_127_7=config +sff_cpld_reg.src_127_7=logic_file +sff_cpld_reg.frmt_127_7=byte +sff_cpld_reg.pola_127_7=positive +sff_cpld_reg.fpath_127_7=/dev/cpld6 +sff_cpld_reg.addr_127_7=0x8e +sff_cpld_reg.len_127_7=1 +sff_cpld_reg.val_type_127_7=nega_key + +sff_cpld_reg.mode_128_7=config +sff_cpld_reg.src_128_7=logic_file +sff_cpld_reg.frmt_128_7=byte +sff_cpld_reg.pola_128_7=positive +sff_cpld_reg.fpath_128_7=/dev/cpld6 +sff_cpld_reg.addr_128_7=0x8f +sff_cpld_reg.len_128_7=1 +sff_cpld_reg.val_type_128_7=nega_key + +sff_cpld_reg.mode_129_7=config +sff_cpld_reg.src_129_7=logic_file +sff_cpld_reg.frmt_129_7=byte +sff_cpld_reg.pola_129_7=positive +sff_cpld_reg.fpath_129_7=/dev/cpld1 +sff_cpld_reg.addr_129_7=0xde +sff_cpld_reg.len_129_7=1 +sff_cpld_reg.val_type_129_7=nega_key + +# 800G module present signal +sff_cpld_reg.mode_1_8=config +sff_cpld_reg.src_1_8=logic_file +sff_cpld_reg.frmt_1_8=bit +sff_cpld_reg.pola_1_8=negative +sff_cpld_reg.fpath_1_8=/dev/cpld5 +sff_cpld_reg.addr_1_8=0x38 +sff_cpld_reg.len_1_8=1 +sff_cpld_reg.bit_offset_1_8=0 + +sff_cpld_reg.mode_2_8=config +sff_cpld_reg.src_2_8=logic_file +sff_cpld_reg.frmt_2_8=bit +sff_cpld_reg.pola_2_8=negative +sff_cpld_reg.fpath_2_8=/dev/cpld5 +sff_cpld_reg.addr_2_8=0x38 +sff_cpld_reg.len_2_8=1 +sff_cpld_reg.bit_offset_2_8=1 + +sff_cpld_reg.mode_3_8=config +sff_cpld_reg.src_3_8=logic_file +sff_cpld_reg.frmt_3_8=bit +sff_cpld_reg.pola_3_8=negative +sff_cpld_reg.fpath_3_8=/dev/cpld5 +sff_cpld_reg.addr_3_8=0x38 +sff_cpld_reg.len_3_8=1 +sff_cpld_reg.bit_offset_3_8=2 + +sff_cpld_reg.mode_4_8=config +sff_cpld_reg.src_4_8=logic_file +sff_cpld_reg.frmt_4_8=bit +sff_cpld_reg.pola_4_8=negative +sff_cpld_reg.fpath_4_8=/dev/cpld5 +sff_cpld_reg.addr_4_8=0x38 +sff_cpld_reg.len_4_8=1 +sff_cpld_reg.bit_offset_4_8=3 + +sff_cpld_reg.mode_5_8=config +sff_cpld_reg.src_5_8=logic_file +sff_cpld_reg.frmt_5_8=bit +sff_cpld_reg.pola_5_8=negative +sff_cpld_reg.fpath_5_8=/dev/cpld5 +sff_cpld_reg.addr_5_8=0x38 +sff_cpld_reg.len_5_8=1 +sff_cpld_reg.bit_offset_5_8=4 + +sff_cpld_reg.mode_6_8=config +sff_cpld_reg.src_6_8=logic_file +sff_cpld_reg.frmt_6_8=bit +sff_cpld_reg.pola_6_8=negative +sff_cpld_reg.fpath_6_8=/dev/cpld5 +sff_cpld_reg.addr_6_8=0x38 +sff_cpld_reg.len_6_8=1 +sff_cpld_reg.bit_offset_6_8=5 + +sff_cpld_reg.mode_7_8=config +sff_cpld_reg.src_7_8=logic_file +sff_cpld_reg.frmt_7_8=bit +sff_cpld_reg.pola_7_8=negative +sff_cpld_reg.fpath_7_8=/dev/cpld5 +sff_cpld_reg.addr_7_8=0x38 +sff_cpld_reg.len_7_8=1 +sff_cpld_reg.bit_offset_7_8=6 + +sff_cpld_reg.mode_8_8=config +sff_cpld_reg.src_8_8=logic_file +sff_cpld_reg.frmt_8_8=bit +sff_cpld_reg.pola_8_8=negative +sff_cpld_reg.fpath_8_8=/dev/cpld5 +sff_cpld_reg.addr_8_8=0x38 +sff_cpld_reg.len_8_8=1 +sff_cpld_reg.bit_offset_8_8=7 + +sff_cpld_reg.mode_9_8=config +sff_cpld_reg.src_9_8=logic_file +sff_cpld_reg.frmt_9_8=bit +sff_cpld_reg.pola_9_8=negative +sff_cpld_reg.fpath_9_8=/dev/cpld5 +sff_cpld_reg.addr_9_8=0x39 +sff_cpld_reg.len_9_8=1 +sff_cpld_reg.bit_offset_9_8=0 + +sff_cpld_reg.mode_10_8=config +sff_cpld_reg.src_10_8=logic_file +sff_cpld_reg.frmt_10_8=bit +sff_cpld_reg.pola_10_8=negative +sff_cpld_reg.fpath_10_8=/dev/cpld5 +sff_cpld_reg.addr_10_8=0x39 +sff_cpld_reg.len_10_8=1 +sff_cpld_reg.bit_offset_10_8=1 + +sff_cpld_reg.mode_11_8=config +sff_cpld_reg.src_11_8=logic_file +sff_cpld_reg.frmt_11_8=bit +sff_cpld_reg.pola_11_8=negative +sff_cpld_reg.fpath_11_8=/dev/cpld5 +sff_cpld_reg.addr_11_8=0x39 +sff_cpld_reg.len_11_8=1 +sff_cpld_reg.bit_offset_11_8=2 + +sff_cpld_reg.mode_12_8=config +sff_cpld_reg.src_12_8=logic_file +sff_cpld_reg.frmt_12_8=bit +sff_cpld_reg.pola_12_8=negative +sff_cpld_reg.fpath_12_8=/dev/cpld5 +sff_cpld_reg.addr_12_8=0x39 +sff_cpld_reg.len_12_8=1 +sff_cpld_reg.bit_offset_12_8=3 + +sff_cpld_reg.mode_13_8=config +sff_cpld_reg.src_13_8=logic_file +sff_cpld_reg.frmt_13_8=bit +sff_cpld_reg.pola_13_8=negative +sff_cpld_reg.fpath_13_8=/dev/cpld5 +sff_cpld_reg.addr_13_8=0x39 +sff_cpld_reg.len_13_8=1 +sff_cpld_reg.bit_offset_13_8=4 + +sff_cpld_reg.mode_14_8=config +sff_cpld_reg.src_14_8=logic_file +sff_cpld_reg.frmt_14_8=bit +sff_cpld_reg.pola_14_8=negative +sff_cpld_reg.fpath_14_8=/dev/cpld5 +sff_cpld_reg.addr_14_8=0x39 +sff_cpld_reg.len_14_8=1 +sff_cpld_reg.bit_offset_14_8=5 + +sff_cpld_reg.mode_15_8=config +sff_cpld_reg.src_15_8=logic_file +sff_cpld_reg.frmt_15_8=bit +sff_cpld_reg.pola_15_8=negative +sff_cpld_reg.fpath_15_8=/dev/cpld5 +sff_cpld_reg.addr_15_8=0x39 +sff_cpld_reg.len_15_8=1 +sff_cpld_reg.bit_offset_15_8=6 + +sff_cpld_reg.mode_16_8=config +sff_cpld_reg.src_16_8=logic_file +sff_cpld_reg.frmt_16_8=bit +sff_cpld_reg.pola_16_8=negative +sff_cpld_reg.fpath_16_8=/dev/cpld5 +sff_cpld_reg.addr_16_8=0x39 +sff_cpld_reg.len_16_8=1 +sff_cpld_reg.bit_offset_16_8=7 + +sff_cpld_reg.mode_17_8=config +sff_cpld_reg.src_17_8=logic_file +sff_cpld_reg.frmt_17_8=bit +sff_cpld_reg.pola_17_8=negative +sff_cpld_reg.fpath_17_8=/dev/cpld5 +sff_cpld_reg.addr_17_8=0x3a +sff_cpld_reg.len_17_8=1 +sff_cpld_reg.bit_offset_17_8=0 + +sff_cpld_reg.mode_18_8=config +sff_cpld_reg.src_18_8=logic_file +sff_cpld_reg.frmt_18_8=bit +sff_cpld_reg.pola_18_8=negative +sff_cpld_reg.fpath_18_8=/dev/cpld5 +sff_cpld_reg.addr_18_8=0x3a +sff_cpld_reg.len_18_8=1 +sff_cpld_reg.bit_offset_18_8=1 + +sff_cpld_reg.mode_19_8=config +sff_cpld_reg.src_19_8=logic_file +sff_cpld_reg.frmt_19_8=bit +sff_cpld_reg.pola_19_8=negative +sff_cpld_reg.fpath_19_8=/dev/cpld5 +sff_cpld_reg.addr_19_8=0x3a +sff_cpld_reg.len_19_8=1 +sff_cpld_reg.bit_offset_19_8=2 + +sff_cpld_reg.mode_20_8=config +sff_cpld_reg.src_20_8=logic_file +sff_cpld_reg.frmt_20_8=bit +sff_cpld_reg.pola_20_8=negative +sff_cpld_reg.fpath_20_8=/dev/cpld5 +sff_cpld_reg.addr_20_8=0x3a +sff_cpld_reg.len_20_8=1 +sff_cpld_reg.bit_offset_20_8=3 + +sff_cpld_reg.mode_21_8=config +sff_cpld_reg.src_21_8=logic_file +sff_cpld_reg.frmt_21_8=bit +sff_cpld_reg.pola_21_8=negative +sff_cpld_reg.fpath_21_8=/dev/cpld5 +sff_cpld_reg.addr_21_8=0x3a +sff_cpld_reg.len_21_8=1 +sff_cpld_reg.bit_offset_21_8=4 + +sff_cpld_reg.mode_22_8=config +sff_cpld_reg.src_22_8=logic_file +sff_cpld_reg.frmt_22_8=bit +sff_cpld_reg.pola_22_8=negative +sff_cpld_reg.fpath_22_8=/dev/cpld5 +sff_cpld_reg.addr_22_8=0x3a +sff_cpld_reg.len_22_8=1 +sff_cpld_reg.bit_offset_22_8=5 + +sff_cpld_reg.mode_23_8=config +sff_cpld_reg.src_23_8=logic_file +sff_cpld_reg.frmt_23_8=bit +sff_cpld_reg.pola_23_8=negative +sff_cpld_reg.fpath_23_8=/dev/cpld5 +sff_cpld_reg.addr_23_8=0x3a +sff_cpld_reg.len_23_8=1 +sff_cpld_reg.bit_offset_23_8=6 + +sff_cpld_reg.mode_24_8=config +sff_cpld_reg.src_24_8=logic_file +sff_cpld_reg.frmt_24_8=bit +sff_cpld_reg.pola_24_8=negative +sff_cpld_reg.fpath_24_8=/dev/cpld5 +sff_cpld_reg.addr_24_8=0x3a +sff_cpld_reg.len_24_8=1 +sff_cpld_reg.bit_offset_24_8=7 + +sff_cpld_reg.mode_25_8=config +sff_cpld_reg.src_25_8=logic_file +sff_cpld_reg.frmt_25_8=bit +sff_cpld_reg.pola_25_8=negative +sff_cpld_reg.fpath_25_8=/dev/cpld5 +sff_cpld_reg.addr_25_8=0x3b +sff_cpld_reg.len_25_8=1 +sff_cpld_reg.bit_offset_25_8=0 + +sff_cpld_reg.mode_26_8=config +sff_cpld_reg.src_26_8=logic_file +sff_cpld_reg.frmt_26_8=bit +sff_cpld_reg.pola_26_8=negative +sff_cpld_reg.fpath_26_8=/dev/cpld5 +sff_cpld_reg.addr_26_8=0x3b +sff_cpld_reg.len_26_8=1 +sff_cpld_reg.bit_offset_26_8=1 + +sff_cpld_reg.mode_27_8=config +sff_cpld_reg.src_27_8=logic_file +sff_cpld_reg.frmt_27_8=bit +sff_cpld_reg.pola_27_8=negative +sff_cpld_reg.fpath_27_8=/dev/cpld5 +sff_cpld_reg.addr_27_8=0x3b +sff_cpld_reg.len_27_8=1 +sff_cpld_reg.bit_offset_27_8=2 + +sff_cpld_reg.mode_28_8=config +sff_cpld_reg.src_28_8=logic_file +sff_cpld_reg.frmt_28_8=bit +sff_cpld_reg.pola_28_8=negative +sff_cpld_reg.fpath_28_8=/dev/cpld5 +sff_cpld_reg.addr_28_8=0x3b +sff_cpld_reg.len_28_8=1 +sff_cpld_reg.bit_offset_28_8=3 + +sff_cpld_reg.mode_29_8=config +sff_cpld_reg.src_29_8=logic_file +sff_cpld_reg.frmt_29_8=bit +sff_cpld_reg.pola_29_8=negative +sff_cpld_reg.fpath_29_8=/dev/cpld5 +sff_cpld_reg.addr_29_8=0x3b +sff_cpld_reg.len_29_8=1 +sff_cpld_reg.bit_offset_29_8=4 + +sff_cpld_reg.mode_30_8=config +sff_cpld_reg.src_30_8=logic_file +sff_cpld_reg.frmt_30_8=bit +sff_cpld_reg.pola_30_8=negative +sff_cpld_reg.fpath_30_8=/dev/cpld5 +sff_cpld_reg.addr_30_8=0x3b +sff_cpld_reg.len_30_8=1 +sff_cpld_reg.bit_offset_30_8=5 + +sff_cpld_reg.mode_31_8=config +sff_cpld_reg.src_31_8=logic_file +sff_cpld_reg.frmt_31_8=bit +sff_cpld_reg.pola_31_8=negative +sff_cpld_reg.fpath_31_8=/dev/cpld5 +sff_cpld_reg.addr_31_8=0x3b +sff_cpld_reg.len_31_8=1 +sff_cpld_reg.bit_offset_31_8=6 + +sff_cpld_reg.mode_32_8=config +sff_cpld_reg.src_32_8=logic_file +sff_cpld_reg.frmt_32_8=bit +sff_cpld_reg.pola_32_8=negative +sff_cpld_reg.fpath_32_8=/dev/cpld5 +sff_cpld_reg.addr_32_8=0x3b +sff_cpld_reg.len_32_8=1 +sff_cpld_reg.bit_offset_32_8=7 + +sff_cpld_reg.mode_33_8=config +sff_cpld_reg.src_33_8=logic_file +sff_cpld_reg.frmt_33_8=bit +sff_cpld_reg.pola_33_8=negative +sff_cpld_reg.fpath_33_8=/dev/cpld2 +sff_cpld_reg.addr_33_8=0x3c +sff_cpld_reg.len_33_8=1 +sff_cpld_reg.bit_offset_33_8=0 + +sff_cpld_reg.mode_34_8=config +sff_cpld_reg.src_34_8=logic_file +sff_cpld_reg.frmt_34_8=bit +sff_cpld_reg.pola_34_8=negative +sff_cpld_reg.fpath_34_8=/dev/cpld2 +sff_cpld_reg.addr_34_8=0x3c +sff_cpld_reg.len_34_8=1 +sff_cpld_reg.bit_offset_34_8=1 + +sff_cpld_reg.mode_35_8=config +sff_cpld_reg.src_35_8=logic_file +sff_cpld_reg.frmt_35_8=bit +sff_cpld_reg.pola_35_8=negative +sff_cpld_reg.fpath_35_8=/dev/cpld2 +sff_cpld_reg.addr_35_8=0x3c +sff_cpld_reg.len_35_8=1 +sff_cpld_reg.bit_offset_35_8=2 + +sff_cpld_reg.mode_36_8=config +sff_cpld_reg.src_36_8=logic_file +sff_cpld_reg.frmt_36_8=bit +sff_cpld_reg.pola_36_8=negative +sff_cpld_reg.fpath_36_8=/dev/cpld2 +sff_cpld_reg.addr_36_8=0x3c +sff_cpld_reg.len_36_8=1 +sff_cpld_reg.bit_offset_36_8=3 + +sff_cpld_reg.mode_37_8=config +sff_cpld_reg.src_37_8=logic_file +sff_cpld_reg.frmt_37_8=bit +sff_cpld_reg.pola_37_8=negative +sff_cpld_reg.fpath_37_8=/dev/cpld2 +sff_cpld_reg.addr_37_8=0x3c +sff_cpld_reg.len_37_8=1 +sff_cpld_reg.bit_offset_37_8=4 + +sff_cpld_reg.mode_38_8=config +sff_cpld_reg.src_38_8=logic_file +sff_cpld_reg.frmt_38_8=bit +sff_cpld_reg.pola_38_8=negative +sff_cpld_reg.fpath_38_8=/dev/cpld2 +sff_cpld_reg.addr_38_8=0x3c +sff_cpld_reg.len_38_8=1 +sff_cpld_reg.bit_offset_38_8=5 + +sff_cpld_reg.mode_39_8=config +sff_cpld_reg.src_39_8=logic_file +sff_cpld_reg.frmt_39_8=bit +sff_cpld_reg.pola_39_8=negative +sff_cpld_reg.fpath_39_8=/dev/cpld2 +sff_cpld_reg.addr_39_8=0x3c +sff_cpld_reg.len_39_8=1 +sff_cpld_reg.bit_offset_39_8=6 + +sff_cpld_reg.mode_40_8=config +sff_cpld_reg.src_40_8=logic_file +sff_cpld_reg.frmt_40_8=bit +sff_cpld_reg.pola_40_8=negative +sff_cpld_reg.fpath_40_8=/dev/cpld2 +sff_cpld_reg.addr_40_8=0x3c +sff_cpld_reg.len_40_8=1 +sff_cpld_reg.bit_offset_40_8=7 + +sff_cpld_reg.mode_41_8=config +sff_cpld_reg.src_41_8=logic_file +sff_cpld_reg.frmt_41_8=bit +sff_cpld_reg.pola_41_8=negative +sff_cpld_reg.fpath_41_8=/dev/cpld2 +sff_cpld_reg.addr_41_8=0x3d +sff_cpld_reg.len_41_8=1 +sff_cpld_reg.bit_offset_41_8=0 + +sff_cpld_reg.mode_42_8=config +sff_cpld_reg.src_42_8=logic_file +sff_cpld_reg.frmt_42_8=bit +sff_cpld_reg.pola_42_8=negative +sff_cpld_reg.fpath_42_8=/dev/cpld2 +sff_cpld_reg.addr_42_8=0x3d +sff_cpld_reg.len_42_8=1 +sff_cpld_reg.bit_offset_42_8=1 + +sff_cpld_reg.mode_43_8=config +sff_cpld_reg.src_43_8=logic_file +sff_cpld_reg.frmt_43_8=bit +sff_cpld_reg.pola_43_8=negative +sff_cpld_reg.fpath_43_8=/dev/cpld3 +sff_cpld_reg.addr_43_8=0x21 +sff_cpld_reg.len_43_8=1 +sff_cpld_reg.bit_offset_43_8=0 + +sff_cpld_reg.mode_44_8=config +sff_cpld_reg.src_44_8=logic_file +sff_cpld_reg.frmt_44_8=bit +sff_cpld_reg.pola_44_8=negative +sff_cpld_reg.fpath_44_8=/dev/cpld3 +sff_cpld_reg.addr_44_8=0x21 +sff_cpld_reg.len_44_8=1 +sff_cpld_reg.bit_offset_44_8=1 + +sff_cpld_reg.mode_45_8=config +sff_cpld_reg.src_45_8=logic_file +sff_cpld_reg.frmt_45_8=bit +sff_cpld_reg.pola_45_8=negative +sff_cpld_reg.fpath_45_8=/dev/cpld3 +sff_cpld_reg.addr_45_8=0x21 +sff_cpld_reg.len_45_8=1 +sff_cpld_reg.bit_offset_45_8=2 + +sff_cpld_reg.mode_46_8=config +sff_cpld_reg.src_46_8=logic_file +sff_cpld_reg.frmt_46_8=bit +sff_cpld_reg.pola_46_8=negative +sff_cpld_reg.fpath_46_8=/dev/cpld3 +sff_cpld_reg.addr_46_8=0x21 +sff_cpld_reg.len_46_8=1 +sff_cpld_reg.bit_offset_46_8=3 + +sff_cpld_reg.mode_47_8=config +sff_cpld_reg.src_47_8=logic_file +sff_cpld_reg.frmt_47_8=bit +sff_cpld_reg.pola_47_8=negative +sff_cpld_reg.fpath_47_8=/dev/cpld3 +sff_cpld_reg.addr_47_8=0x21 +sff_cpld_reg.len_47_8=1 +sff_cpld_reg.bit_offset_47_8=4 + +sff_cpld_reg.mode_48_8=config +sff_cpld_reg.src_48_8=logic_file +sff_cpld_reg.frmt_48_8=bit +sff_cpld_reg.pola_48_8=negative +sff_cpld_reg.fpath_48_8=/dev/cpld3 +sff_cpld_reg.addr_48_8=0x21 +sff_cpld_reg.len_48_8=1 +sff_cpld_reg.bit_offset_48_8=5 + +sff_cpld_reg.mode_49_8=config +sff_cpld_reg.src_49_8=logic_file +sff_cpld_reg.frmt_49_8=bit +sff_cpld_reg.pola_49_8=negative +sff_cpld_reg.fpath_49_8=/dev/cpld3 +sff_cpld_reg.addr_49_8=0x21 +sff_cpld_reg.len_49_8=1 +sff_cpld_reg.bit_offset_49_8=6 + +sff_cpld_reg.mode_50_8=config +sff_cpld_reg.src_50_8=logic_file +sff_cpld_reg.frmt_50_8=bit +sff_cpld_reg.pola_50_8=negative +sff_cpld_reg.fpath_50_8=/dev/cpld3 +sff_cpld_reg.addr_50_8=0x21 +sff_cpld_reg.len_50_8=1 +sff_cpld_reg.bit_offset_50_8=7 + +sff_cpld_reg.mode_51_8=config +sff_cpld_reg.src_51_8=logic_file +sff_cpld_reg.frmt_51_8=bit +sff_cpld_reg.pola_51_8=negative +sff_cpld_reg.fpath_51_8=/dev/cpld3 +sff_cpld_reg.addr_51_8=0x22 +sff_cpld_reg.len_51_8=1 +sff_cpld_reg.bit_offset_51_8=0 + +sff_cpld_reg.mode_52_8=config +sff_cpld_reg.src_52_8=logic_file +sff_cpld_reg.frmt_52_8=bit +sff_cpld_reg.pola_52_8=negative +sff_cpld_reg.fpath_52_8=/dev/cpld3 +sff_cpld_reg.addr_52_8=0x22 +sff_cpld_reg.len_52_8=1 +sff_cpld_reg.bit_offset_52_8=1 + +sff_cpld_reg.mode_53_8=config +sff_cpld_reg.src_53_8=logic_file +sff_cpld_reg.frmt_53_8=bit +sff_cpld_reg.pola_53_8=negative +sff_cpld_reg.fpath_53_8=/dev/cpld3 +sff_cpld_reg.addr_53_8=0x22 +sff_cpld_reg.len_53_8=1 +sff_cpld_reg.bit_offset_53_8=2 + +sff_cpld_reg.mode_54_8=config +sff_cpld_reg.src_54_8=logic_file +sff_cpld_reg.frmt_54_8=bit +sff_cpld_reg.pola_54_8=negative +sff_cpld_reg.fpath_54_8=/dev/cpld3 +sff_cpld_reg.addr_54_8=0x22 +sff_cpld_reg.len_54_8=1 +sff_cpld_reg.bit_offset_54_8=3 + +sff_cpld_reg.mode_55_8=config +sff_cpld_reg.src_55_8=logic_file +sff_cpld_reg.frmt_55_8=bit +sff_cpld_reg.pola_55_8=negative +sff_cpld_reg.fpath_55_8=/dev/cpld3 +sff_cpld_reg.addr_55_8=0x22 +sff_cpld_reg.len_55_8=1 +sff_cpld_reg.bit_offset_55_8=4 + +sff_cpld_reg.mode_56_8=config +sff_cpld_reg.src_56_8=logic_file +sff_cpld_reg.frmt_56_8=bit +sff_cpld_reg.pola_56_8=negative +sff_cpld_reg.fpath_56_8=/dev/cpld3 +sff_cpld_reg.addr_56_8=0x22 +sff_cpld_reg.len_56_8=1 +sff_cpld_reg.bit_offset_56_8=5 + +sff_cpld_reg.mode_57_8=config +sff_cpld_reg.src_57_8=logic_file +sff_cpld_reg.frmt_57_8=bit +sff_cpld_reg.pola_57_8=negative +sff_cpld_reg.fpath_57_8=/dev/cpld3 +sff_cpld_reg.addr_57_8=0x22 +sff_cpld_reg.len_57_8=1 +sff_cpld_reg.bit_offset_57_8=6 + +sff_cpld_reg.mode_58_8=config +sff_cpld_reg.src_58_8=logic_file +sff_cpld_reg.frmt_58_8=bit +sff_cpld_reg.pola_58_8=negative +sff_cpld_reg.fpath_58_8=/dev/cpld3 +sff_cpld_reg.addr_58_8=0x22 +sff_cpld_reg.len_58_8=1 +sff_cpld_reg.bit_offset_58_8=7 + +sff_cpld_reg.mode_59_8=config +sff_cpld_reg.src_59_8=logic_file +sff_cpld_reg.frmt_59_8=bit +sff_cpld_reg.pola_59_8=negative +sff_cpld_reg.fpath_59_8=/dev/cpld3 +sff_cpld_reg.addr_59_8=0x23 +sff_cpld_reg.len_59_8=1 +sff_cpld_reg.bit_offset_59_8=0 + +sff_cpld_reg.mode_60_8=config +sff_cpld_reg.src_60_8=logic_file +sff_cpld_reg.frmt_60_8=bit +sff_cpld_reg.pola_60_8=negative +sff_cpld_reg.fpath_60_8=/dev/cpld3 +sff_cpld_reg.addr_60_8=0x23 +sff_cpld_reg.len_60_8=1 +sff_cpld_reg.bit_offset_60_8=1 + +sff_cpld_reg.mode_61_8=config +sff_cpld_reg.src_61_8=logic_file +sff_cpld_reg.frmt_61_8=bit +sff_cpld_reg.pola_61_8=negative +sff_cpld_reg.fpath_61_8=/dev/cpld3 +sff_cpld_reg.addr_61_8=0x23 +sff_cpld_reg.len_61_8=1 +sff_cpld_reg.bit_offset_61_8=2 + +sff_cpld_reg.mode_62_8=config +sff_cpld_reg.src_62_8=logic_file +sff_cpld_reg.frmt_62_8=bit +sff_cpld_reg.pola_62_8=negative +sff_cpld_reg.fpath_62_8=/dev/cpld3 +sff_cpld_reg.addr_62_8=0x23 +sff_cpld_reg.len_62_8=1 +sff_cpld_reg.bit_offset_62_8=3 + +sff_cpld_reg.mode_63_8=config +sff_cpld_reg.src_63_8=logic_file +sff_cpld_reg.frmt_63_8=bit +sff_cpld_reg.pola_63_8=negative +sff_cpld_reg.fpath_63_8=/dev/cpld3 +sff_cpld_reg.addr_63_8=0x23 +sff_cpld_reg.len_63_8=1 +sff_cpld_reg.bit_offset_63_8=4 + +sff_cpld_reg.mode_64_8=config +sff_cpld_reg.src_64_8=logic_file +sff_cpld_reg.frmt_64_8=bit +sff_cpld_reg.pola_64_8=negative +sff_cpld_reg.fpath_64_8=/dev/cpld3 +sff_cpld_reg.addr_64_8=0x23 +sff_cpld_reg.len_64_8=1 +sff_cpld_reg.bit_offset_64_8=5 + +sff_cpld_reg.mode_65_8=config +sff_cpld_reg.src_65_8=logic_file +sff_cpld_reg.frmt_65_8=bit +sff_cpld_reg.pola_65_8=negative +sff_cpld_reg.fpath_65_8=/dev/cpld2 +sff_cpld_reg.addr_65_8=0x3d +sff_cpld_reg.len_65_8=1 +sff_cpld_reg.bit_offset_65_8=2 + +sff_cpld_reg.mode_66_8=config +sff_cpld_reg.src_66_8=logic_file +sff_cpld_reg.frmt_66_8=bit +sff_cpld_reg.pola_66_8=negative +sff_cpld_reg.fpath_66_8=/dev/cpld2 +sff_cpld_reg.addr_66_8=0x3d +sff_cpld_reg.len_66_8=1 +sff_cpld_reg.bit_offset_66_8=3 + +sff_cpld_reg.mode_67_8=config +sff_cpld_reg.src_67_8=logic_file +sff_cpld_reg.frmt_67_8=bit +sff_cpld_reg.pola_67_8=negative +sff_cpld_reg.fpath_67_8=/dev/cpld2 +sff_cpld_reg.addr_67_8=0x3d +sff_cpld_reg.len_67_8=1 +sff_cpld_reg.bit_offset_67_8=4 + +sff_cpld_reg.mode_68_8=config +sff_cpld_reg.src_68_8=logic_file +sff_cpld_reg.frmt_68_8=bit +sff_cpld_reg.pola_68_8=negative +sff_cpld_reg.fpath_68_8=/dev/cpld2 +sff_cpld_reg.addr_68_8=0x3d +sff_cpld_reg.len_68_8=1 +sff_cpld_reg.bit_offset_68_8=5 + +sff_cpld_reg.mode_69_8=config +sff_cpld_reg.src_69_8=logic_file +sff_cpld_reg.frmt_69_8=bit +sff_cpld_reg.pola_69_8=negative +sff_cpld_reg.fpath_69_8=/dev/cpld2 +sff_cpld_reg.addr_69_8=0x3d +sff_cpld_reg.len_69_8=1 +sff_cpld_reg.bit_offset_69_8=6 + +sff_cpld_reg.mode_70_8=config +sff_cpld_reg.src_70_8=logic_file +sff_cpld_reg.frmt_70_8=bit +sff_cpld_reg.pola_70_8=negative +sff_cpld_reg.fpath_70_8=/dev/cpld2 +sff_cpld_reg.addr_70_8=0x3d +sff_cpld_reg.len_70_8=1 +sff_cpld_reg.bit_offset_70_8=7 + +sff_cpld_reg.mode_71_8=config +sff_cpld_reg.src_71_8=logic_file +sff_cpld_reg.frmt_71_8=bit +sff_cpld_reg.pola_71_8=negative +sff_cpld_reg.fpath_71_8=/dev/cpld2 +sff_cpld_reg.addr_71_8=0x3e +sff_cpld_reg.len_71_8=1 +sff_cpld_reg.bit_offset_71_8=0 + +sff_cpld_reg.mode_72_8=config +sff_cpld_reg.src_72_8=logic_file +sff_cpld_reg.frmt_72_8=bit +sff_cpld_reg.pola_72_8=negative +sff_cpld_reg.fpath_72_8=/dev/cpld2 +sff_cpld_reg.addr_72_8=0x3e +sff_cpld_reg.len_72_8=1 +sff_cpld_reg.bit_offset_72_8=1 + +sff_cpld_reg.mode_73_8=config +sff_cpld_reg.src_73_8=logic_file +sff_cpld_reg.frmt_73_8=bit +sff_cpld_reg.pola_73_8=negative +sff_cpld_reg.fpath_73_8=/dev/cpld2 +sff_cpld_reg.addr_73_8=0x3e +sff_cpld_reg.len_73_8=1 +sff_cpld_reg.bit_offset_73_8=2 + +sff_cpld_reg.mode_74_8=config +sff_cpld_reg.src_74_8=logic_file +sff_cpld_reg.frmt_74_8=bit +sff_cpld_reg.pola_74_8=negative +sff_cpld_reg.fpath_74_8=/dev/cpld2 +sff_cpld_reg.addr_74_8=0x3e +sff_cpld_reg.len_74_8=1 +sff_cpld_reg.bit_offset_74_8=3 + +sff_cpld_reg.mode_75_8=config +sff_cpld_reg.src_75_8=logic_file +sff_cpld_reg.frmt_75_8=bit +sff_cpld_reg.pola_75_8=negative +sff_cpld_reg.fpath_75_8=/dev/cpld3 +sff_cpld_reg.addr_75_8=0x23 +sff_cpld_reg.len_75_8=1 +sff_cpld_reg.bit_offset_75_8=6 + +sff_cpld_reg.mode_76_8=config +sff_cpld_reg.src_76_8=logic_file +sff_cpld_reg.frmt_76_8=bit +sff_cpld_reg.pola_76_8=negative +sff_cpld_reg.fpath_76_8=/dev/cpld3 +sff_cpld_reg.addr_76_8=0x23 +sff_cpld_reg.len_76_8=1 +sff_cpld_reg.bit_offset_76_8=7 + +sff_cpld_reg.mode_77_8=config +sff_cpld_reg.src_77_8=logic_file +sff_cpld_reg.frmt_77_8=bit +sff_cpld_reg.pola_77_8=negative +sff_cpld_reg.fpath_77_8=/dev/cpld3 +sff_cpld_reg.addr_77_8=0x24 +sff_cpld_reg.len_77_8=1 +sff_cpld_reg.bit_offset_77_8=0 + +sff_cpld_reg.mode_78_8=config +sff_cpld_reg.src_78_8=logic_file +sff_cpld_reg.frmt_78_8=bit +sff_cpld_reg.pola_78_8=negative +sff_cpld_reg.fpath_78_8=/dev/cpld3 +sff_cpld_reg.addr_78_8=0x24 +sff_cpld_reg.len_78_8=1 +sff_cpld_reg.bit_offset_78_8=1 + +sff_cpld_reg.mode_79_8=config +sff_cpld_reg.src_79_8=logic_file +sff_cpld_reg.frmt_79_8=bit +sff_cpld_reg.pola_79_8=negative +sff_cpld_reg.fpath_79_8=/dev/cpld3 +sff_cpld_reg.addr_79_8=0x24 +sff_cpld_reg.len_79_8=1 +sff_cpld_reg.bit_offset_79_8=2 + +sff_cpld_reg.mode_80_8=config +sff_cpld_reg.src_80_8=logic_file +sff_cpld_reg.frmt_80_8=bit +sff_cpld_reg.pola_80_8=negative +sff_cpld_reg.fpath_80_8=/dev/cpld3 +sff_cpld_reg.addr_80_8=0x24 +sff_cpld_reg.len_80_8=1 +sff_cpld_reg.bit_offset_80_8=3 + +sff_cpld_reg.mode_81_8=config +sff_cpld_reg.src_81_8=logic_file +sff_cpld_reg.frmt_81_8=bit +sff_cpld_reg.pola_81_8=negative +sff_cpld_reg.fpath_81_8=/dev/cpld3 +sff_cpld_reg.addr_81_8=0x24 +sff_cpld_reg.len_81_8=1 +sff_cpld_reg.bit_offset_81_8=4 + +sff_cpld_reg.mode_82_8=config +sff_cpld_reg.src_82_8=logic_file +sff_cpld_reg.frmt_82_8=bit +sff_cpld_reg.pola_82_8=negative +sff_cpld_reg.fpath_82_8=/dev/cpld3 +sff_cpld_reg.addr_82_8=0x24 +sff_cpld_reg.len_82_8=1 +sff_cpld_reg.bit_offset_82_8=5 + +sff_cpld_reg.mode_83_8=config +sff_cpld_reg.src_83_8=logic_file +sff_cpld_reg.frmt_83_8=bit +sff_cpld_reg.pola_83_8=negative +sff_cpld_reg.fpath_83_8=/dev/cpld3 +sff_cpld_reg.addr_83_8=0x24 +sff_cpld_reg.len_83_8=1 +sff_cpld_reg.bit_offset_83_8=6 + +sff_cpld_reg.mode_84_8=config +sff_cpld_reg.src_84_8=logic_file +sff_cpld_reg.frmt_84_8=bit +sff_cpld_reg.pola_84_8=negative +sff_cpld_reg.fpath_84_8=/dev/cpld3 +sff_cpld_reg.addr_84_8=0x24 +sff_cpld_reg.len_84_8=1 +sff_cpld_reg.bit_offset_84_8=7 + +sff_cpld_reg.mode_85_8=config +sff_cpld_reg.src_85_8=logic_file +sff_cpld_reg.frmt_85_8=bit +sff_cpld_reg.pola_85_8=negative +sff_cpld_reg.fpath_85_8=/dev/cpld3 +sff_cpld_reg.addr_85_8=0x25 +sff_cpld_reg.len_85_8=1 +sff_cpld_reg.bit_offset_85_8=0 + +sff_cpld_reg.mode_86_8=config +sff_cpld_reg.src_86_8=logic_file +sff_cpld_reg.frmt_86_8=bit +sff_cpld_reg.pola_86_8=negative +sff_cpld_reg.fpath_86_8=/dev/cpld3 +sff_cpld_reg.addr_86_8=0x25 +sff_cpld_reg.len_86_8=1 +sff_cpld_reg.bit_offset_86_8=1 + +sff_cpld_reg.mode_87_8=config +sff_cpld_reg.src_87_8=logic_file +sff_cpld_reg.frmt_87_8=bit +sff_cpld_reg.pola_87_8=negative +sff_cpld_reg.fpath_87_8=/dev/cpld3 +sff_cpld_reg.addr_87_8=0x25 +sff_cpld_reg.len_87_8=1 +sff_cpld_reg.bit_offset_87_8=2 + +sff_cpld_reg.mode_88_8=config +sff_cpld_reg.src_88_8=logic_file +sff_cpld_reg.frmt_88_8=bit +sff_cpld_reg.pola_88_8=negative +sff_cpld_reg.fpath_88_8=/dev/cpld3 +sff_cpld_reg.addr_88_8=0x25 +sff_cpld_reg.len_88_8=1 +sff_cpld_reg.bit_offset_88_8=3 + +sff_cpld_reg.mode_89_8=config +sff_cpld_reg.src_89_8=logic_file +sff_cpld_reg.frmt_89_8=bit +sff_cpld_reg.pola_89_8=negative +sff_cpld_reg.fpath_89_8=/dev/cpld3 +sff_cpld_reg.addr_89_8=0x25 +sff_cpld_reg.len_89_8=1 +sff_cpld_reg.bit_offset_89_8=4 + +sff_cpld_reg.mode_90_8=config +sff_cpld_reg.src_90_8=logic_file +sff_cpld_reg.frmt_90_8=bit +sff_cpld_reg.pola_90_8=negative +sff_cpld_reg.fpath_90_8=/dev/cpld3 +sff_cpld_reg.addr_90_8=0x25 +sff_cpld_reg.len_90_8=1 +sff_cpld_reg.bit_offset_90_8=5 + +sff_cpld_reg.mode_91_8=config +sff_cpld_reg.src_91_8=logic_file +sff_cpld_reg.frmt_91_8=bit +sff_cpld_reg.pola_91_8=negative +sff_cpld_reg.fpath_91_8=/dev/cpld3 +sff_cpld_reg.addr_91_8=0x25 +sff_cpld_reg.len_91_8=1 +sff_cpld_reg.bit_offset_91_8=6 + +sff_cpld_reg.mode_92_8=config +sff_cpld_reg.src_92_8=logic_file +sff_cpld_reg.frmt_92_8=bit +sff_cpld_reg.pola_92_8=negative +sff_cpld_reg.fpath_92_8=/dev/cpld3 +sff_cpld_reg.addr_92_8=0x25 +sff_cpld_reg.len_92_8=1 +sff_cpld_reg.bit_offset_92_8=7 + +sff_cpld_reg.mode_93_8=config +sff_cpld_reg.src_93_8=logic_file +sff_cpld_reg.frmt_93_8=bit +sff_cpld_reg.pola_93_8=negative +sff_cpld_reg.fpath_93_8=/dev/cpld3 +sff_cpld_reg.addr_93_8=0x26 +sff_cpld_reg.len_93_8=1 +sff_cpld_reg.bit_offset_93_8=0 + +sff_cpld_reg.mode_94_8=config +sff_cpld_reg.src_94_8=logic_file +sff_cpld_reg.frmt_94_8=bit +sff_cpld_reg.pola_94_8=negative +sff_cpld_reg.fpath_94_8=/dev/cpld3 +sff_cpld_reg.addr_94_8=0x26 +sff_cpld_reg.len_94_8=1 +sff_cpld_reg.bit_offset_94_8=1 + +sff_cpld_reg.mode_95_8=config +sff_cpld_reg.src_95_8=logic_file +sff_cpld_reg.frmt_95_8=bit +sff_cpld_reg.pola_95_8=negative +sff_cpld_reg.fpath_95_8=/dev/cpld3 +sff_cpld_reg.addr_95_8=0x26 +sff_cpld_reg.len_95_8=1 +sff_cpld_reg.bit_offset_95_8=2 + +sff_cpld_reg.mode_96_8=config +sff_cpld_reg.src_96_8=logic_file +sff_cpld_reg.frmt_96_8=bit +sff_cpld_reg.pola_96_8=negative +sff_cpld_reg.fpath_96_8=/dev/cpld3 +sff_cpld_reg.addr_96_8=0x26 +sff_cpld_reg.len_96_8=1 +sff_cpld_reg.bit_offset_96_8=3 + +sff_cpld_reg.mode_97_8=config +sff_cpld_reg.src_97_8=logic_file +sff_cpld_reg.frmt_97_8=bit +sff_cpld_reg.pola_97_8=negative +sff_cpld_reg.fpath_97_8=/dev/cpld6 +sff_cpld_reg.addr_97_8=0x38 +sff_cpld_reg.len_97_8=1 +sff_cpld_reg.bit_offset_97_8=0 + +sff_cpld_reg.mode_98_8=config +sff_cpld_reg.src_98_8=logic_file +sff_cpld_reg.frmt_98_8=bit +sff_cpld_reg.pola_98_8=negative +sff_cpld_reg.fpath_98_8=/dev/cpld6 +sff_cpld_reg.addr_98_8=0x38 +sff_cpld_reg.len_98_8=1 +sff_cpld_reg.bit_offset_98_8=1 + +sff_cpld_reg.mode_99_8=config +sff_cpld_reg.src_99_8=logic_file +sff_cpld_reg.frmt_99_8=bit +sff_cpld_reg.pola_99_8=negative +sff_cpld_reg.fpath_99_8=/dev/cpld6 +sff_cpld_reg.addr_99_8=0x38 +sff_cpld_reg.len_99_8=1 +sff_cpld_reg.bit_offset_99_8=2 + +sff_cpld_reg.mode_100_8=config +sff_cpld_reg.src_100_8=logic_file +sff_cpld_reg.frmt_100_8=bit +sff_cpld_reg.pola_100_8=negative +sff_cpld_reg.fpath_100_8=/dev/cpld6 +sff_cpld_reg.addr_100_8=0x38 +sff_cpld_reg.len_100_8=1 +sff_cpld_reg.bit_offset_100_8=3 + +sff_cpld_reg.mode_101_8=config +sff_cpld_reg.src_101_8=logic_file +sff_cpld_reg.frmt_101_8=bit +sff_cpld_reg.pola_101_8=negative +sff_cpld_reg.fpath_101_8=/dev/cpld6 +sff_cpld_reg.addr_101_8=0x38 +sff_cpld_reg.len_101_8=1 +sff_cpld_reg.bit_offset_101_8=4 + +sff_cpld_reg.mode_102_8=config +sff_cpld_reg.src_102_8=logic_file +sff_cpld_reg.frmt_102_8=bit +sff_cpld_reg.pola_102_8=negative +sff_cpld_reg.fpath_102_8=/dev/cpld6 +sff_cpld_reg.addr_102_8=0x38 +sff_cpld_reg.len_102_8=1 +sff_cpld_reg.bit_offset_102_8=5 + +sff_cpld_reg.mode_103_8=config +sff_cpld_reg.src_103_8=logic_file +sff_cpld_reg.frmt_103_8=bit +sff_cpld_reg.pola_103_8=negative +sff_cpld_reg.fpath_103_8=/dev/cpld6 +sff_cpld_reg.addr_103_8=0x38 +sff_cpld_reg.len_103_8=1 +sff_cpld_reg.bit_offset_103_8=6 + +sff_cpld_reg.mode_104_8=config +sff_cpld_reg.src_104_8=logic_file +sff_cpld_reg.frmt_104_8=bit +sff_cpld_reg.pola_104_8=negative +sff_cpld_reg.fpath_104_8=/dev/cpld6 +sff_cpld_reg.addr_104_8=0x38 +sff_cpld_reg.len_104_8=1 +sff_cpld_reg.bit_offset_104_8=7 + +sff_cpld_reg.mode_105_8=config +sff_cpld_reg.src_105_8=logic_file +sff_cpld_reg.frmt_105_8=bit +sff_cpld_reg.pola_105_8=negative +sff_cpld_reg.fpath_105_8=/dev/cpld6 +sff_cpld_reg.addr_105_8=0x39 +sff_cpld_reg.len_105_8=1 +sff_cpld_reg.bit_offset_105_8=0 + +sff_cpld_reg.mode_106_8=config +sff_cpld_reg.src_106_8=logic_file +sff_cpld_reg.frmt_106_8=bit +sff_cpld_reg.pola_106_8=negative +sff_cpld_reg.fpath_106_8=/dev/cpld6 +sff_cpld_reg.addr_106_8=0x39 +sff_cpld_reg.len_106_8=1 +sff_cpld_reg.bit_offset_106_8=1 + +sff_cpld_reg.mode_107_8=config +sff_cpld_reg.src_107_8=logic_file +sff_cpld_reg.frmt_107_8=bit +sff_cpld_reg.pola_107_8=negative +sff_cpld_reg.fpath_107_8=/dev/cpld6 +sff_cpld_reg.addr_107_8=0x39 +sff_cpld_reg.len_107_8=1 +sff_cpld_reg.bit_offset_107_8=2 + +sff_cpld_reg.mode_108_8=config +sff_cpld_reg.src_108_8=logic_file +sff_cpld_reg.frmt_108_8=bit +sff_cpld_reg.pola_108_8=negative +sff_cpld_reg.fpath_108_8=/dev/cpld6 +sff_cpld_reg.addr_108_8=0x39 +sff_cpld_reg.len_108_8=1 +sff_cpld_reg.bit_offset_108_8=3 + +sff_cpld_reg.mode_109_8=config +sff_cpld_reg.src_109_8=logic_file +sff_cpld_reg.frmt_109_8=bit +sff_cpld_reg.pola_109_8=negative +sff_cpld_reg.fpath_109_8=/dev/cpld6 +sff_cpld_reg.addr_109_8=0x39 +sff_cpld_reg.len_109_8=1 +sff_cpld_reg.bit_offset_109_8=4 + +sff_cpld_reg.mode_110_8=config +sff_cpld_reg.src_110_8=logic_file +sff_cpld_reg.frmt_110_8=bit +sff_cpld_reg.pola_110_8=negative +sff_cpld_reg.fpath_110_8=/dev/cpld6 +sff_cpld_reg.addr_110_8=0x39 +sff_cpld_reg.len_110_8=1 +sff_cpld_reg.bit_offset_110_8=5 + +sff_cpld_reg.mode_111_8=config +sff_cpld_reg.src_111_8=logic_file +sff_cpld_reg.frmt_111_8=bit +sff_cpld_reg.pola_111_8=negative +sff_cpld_reg.fpath_111_8=/dev/cpld6 +sff_cpld_reg.addr_111_8=0x39 +sff_cpld_reg.len_111_8=1 +sff_cpld_reg.bit_offset_111_8=6 + +sff_cpld_reg.mode_112_8=config +sff_cpld_reg.src_112_8=logic_file +sff_cpld_reg.frmt_112_8=bit +sff_cpld_reg.pola_112_8=negative +sff_cpld_reg.fpath_112_8=/dev/cpld6 +sff_cpld_reg.addr_112_8=0x39 +sff_cpld_reg.len_112_8=1 +sff_cpld_reg.bit_offset_112_8=7 + +sff_cpld_reg.mode_113_8=config +sff_cpld_reg.src_113_8=logic_file +sff_cpld_reg.frmt_113_8=bit +sff_cpld_reg.pola_113_8=negative +sff_cpld_reg.fpath_113_8=/dev/cpld6 +sff_cpld_reg.addr_113_8=0x3a +sff_cpld_reg.len_113_8=1 +sff_cpld_reg.bit_offset_113_8=0 + +sff_cpld_reg.mode_114_8=config +sff_cpld_reg.src_114_8=logic_file +sff_cpld_reg.frmt_114_8=bit +sff_cpld_reg.pola_114_8=negative +sff_cpld_reg.fpath_114_8=/dev/cpld6 +sff_cpld_reg.addr_114_8=0x3a +sff_cpld_reg.len_114_8=1 +sff_cpld_reg.bit_offset_114_8=1 + +sff_cpld_reg.mode_115_8=config +sff_cpld_reg.src_115_8=logic_file +sff_cpld_reg.frmt_115_8=bit +sff_cpld_reg.pola_115_8=negative +sff_cpld_reg.fpath_115_8=/dev/cpld6 +sff_cpld_reg.addr_115_8=0x3a +sff_cpld_reg.len_115_8=1 +sff_cpld_reg.bit_offset_115_8=2 + +sff_cpld_reg.mode_116_8=config +sff_cpld_reg.src_116_8=logic_file +sff_cpld_reg.frmt_116_8=bit +sff_cpld_reg.pola_116_8=negative +sff_cpld_reg.fpath_116_8=/dev/cpld6 +sff_cpld_reg.addr_116_8=0x3a +sff_cpld_reg.len_116_8=1 +sff_cpld_reg.bit_offset_116_8=3 + +sff_cpld_reg.mode_117_8=config +sff_cpld_reg.src_117_8=logic_file +sff_cpld_reg.frmt_117_8=bit +sff_cpld_reg.pola_117_8=negative +sff_cpld_reg.fpath_117_8=/dev/cpld6 +sff_cpld_reg.addr_117_8=0x3a +sff_cpld_reg.len_117_8=1 +sff_cpld_reg.bit_offset_117_8=4 + +sff_cpld_reg.mode_118_8=config +sff_cpld_reg.src_118_8=logic_file +sff_cpld_reg.frmt_118_8=bit +sff_cpld_reg.pola_118_8=negative +sff_cpld_reg.fpath_118_8=/dev/cpld6 +sff_cpld_reg.addr_118_8=0x3a +sff_cpld_reg.len_118_8=1 +sff_cpld_reg.bit_offset_118_8=5 + +sff_cpld_reg.mode_119_8=config +sff_cpld_reg.src_119_8=logic_file +sff_cpld_reg.frmt_119_8=bit +sff_cpld_reg.pola_119_8=negative +sff_cpld_reg.fpath_119_8=/dev/cpld6 +sff_cpld_reg.addr_119_8=0x3a +sff_cpld_reg.len_119_8=1 +sff_cpld_reg.bit_offset_119_8=6 + +sff_cpld_reg.mode_120_8=config +sff_cpld_reg.src_120_8=logic_file +sff_cpld_reg.frmt_120_8=bit +sff_cpld_reg.pola_120_8=negative +sff_cpld_reg.fpath_120_8=/dev/cpld6 +sff_cpld_reg.addr_120_8=0x3a +sff_cpld_reg.len_120_8=1 +sff_cpld_reg.bit_offset_120_8=7 + +sff_cpld_reg.mode_121_8=config +sff_cpld_reg.src_121_8=logic_file +sff_cpld_reg.frmt_121_8=bit +sff_cpld_reg.pola_121_8=negative +sff_cpld_reg.fpath_121_8=/dev/cpld6 +sff_cpld_reg.addr_121_8=0x3b +sff_cpld_reg.len_121_8=1 +sff_cpld_reg.bit_offset_121_8=0 + +sff_cpld_reg.mode_122_8=config +sff_cpld_reg.src_122_8=logic_file +sff_cpld_reg.frmt_122_8=bit +sff_cpld_reg.pola_122_8=negative +sff_cpld_reg.fpath_122_8=/dev/cpld6 +sff_cpld_reg.addr_122_8=0x3b +sff_cpld_reg.len_122_8=1 +sff_cpld_reg.bit_offset_122_8=1 + +sff_cpld_reg.mode_123_8=config +sff_cpld_reg.src_123_8=logic_file +sff_cpld_reg.frmt_123_8=bit +sff_cpld_reg.pola_123_8=negative +sff_cpld_reg.fpath_123_8=/dev/cpld6 +sff_cpld_reg.addr_123_8=0x3b +sff_cpld_reg.len_123_8=1 +sff_cpld_reg.bit_offset_123_8=2 + +sff_cpld_reg.mode_124_8=config +sff_cpld_reg.src_124_8=logic_file +sff_cpld_reg.frmt_124_8=bit +sff_cpld_reg.pola_124_8=negative +sff_cpld_reg.fpath_124_8=/dev/cpld6 +sff_cpld_reg.addr_124_8=0x3b +sff_cpld_reg.len_124_8=1 +sff_cpld_reg.bit_offset_124_8=3 + +sff_cpld_reg.mode_125_8=config +sff_cpld_reg.src_125_8=logic_file +sff_cpld_reg.frmt_125_8=bit +sff_cpld_reg.pola_125_8=negative +sff_cpld_reg.fpath_125_8=/dev/cpld6 +sff_cpld_reg.addr_125_8=0x3b +sff_cpld_reg.len_125_8=1 +sff_cpld_reg.bit_offset_125_8=4 + +sff_cpld_reg.mode_126_8=config +sff_cpld_reg.src_126_8=logic_file +sff_cpld_reg.frmt_126_8=bit +sff_cpld_reg.pola_126_8=negative +sff_cpld_reg.fpath_126_8=/dev/cpld6 +sff_cpld_reg.addr_126_8=0x3b +sff_cpld_reg.len_126_8=1 +sff_cpld_reg.bit_offset_126_8=5 + +sff_cpld_reg.mode_127_8=config +sff_cpld_reg.src_127_8=logic_file +sff_cpld_reg.frmt_127_8=bit +sff_cpld_reg.pola_127_8=negative +sff_cpld_reg.fpath_127_8=/dev/cpld6 +sff_cpld_reg.addr_127_8=0x3b +sff_cpld_reg.len_127_8=1 +sff_cpld_reg.bit_offset_127_8=6 + +sff_cpld_reg.mode_128_8=config +sff_cpld_reg.src_128_8=logic_file +sff_cpld_reg.frmt_128_8=bit +sff_cpld_reg.pola_128_8=negative +sff_cpld_reg.fpath_128_8=/dev/cpld6 +sff_cpld_reg.addr_128_8=0x3b +sff_cpld_reg.len_128_8=1 +sff_cpld_reg.bit_offset_128_8=7 + +sff_cpld_reg.mode_129_8=config +sff_cpld_reg.src_129_8=logic_file +sff_cpld_reg.frmt_129_8=bit +sff_cpld_reg.pola_129_8=negative +sff_cpld_reg.fpath_129_8=/dev/cpld1 +sff_cpld_reg.addr_129_8=0xa2 +sff_cpld_reg.len_129_8=1 +sff_cpld_reg.bit_offset_129_8=4 + +sff_cpld_reg.mode_130_8=config +sff_cpld_reg.src_130_8=logic_file +sff_cpld_reg.frmt_130_8=bit +sff_cpld_reg.pola_130_8=negative +sff_cpld_reg.fpath_130_8=/dev/cpld1 +sff_cpld_reg.addr_130_8=0xa2 +sff_cpld_reg.len_130_8=1 +sff_cpld_reg.bit_offset_130_8=5 + +# optoe type +sff_optoe_type.mode_1=config +sff_optoe_type.int_cons_1= +sff_optoe_type.src_1=logic_file +sff_optoe_type.frmt_1=byte +sff_optoe_type.fpath_1=/sys/bus/i2c/devices/201-0050/dev_class +sff_optoe_type.addr_1=0 +sff_optoe_type.len_1=1 +sff_optoe_type.bit_offset_1= + +sff_optoe_type.mode_2=config +sff_optoe_type.int_cons_2= +sff_optoe_type.src_2=logic_file +sff_optoe_type.frmt_2=byte +sff_optoe_type.fpath_2=/sys/bus/i2c/devices/202-0050/dev_class +sff_optoe_type.addr_2=0 +sff_optoe_type.len_2=1 +sff_optoe_type.bit_offset_2= + +sff_optoe_type.mode_3=config +sff_optoe_type.int_cons_3= +sff_optoe_type.src_3=logic_file +sff_optoe_type.frmt_3=byte +sff_optoe_type.fpath_3=/sys/bus/i2c/devices/203-0050/dev_class +sff_optoe_type.addr_3=0 +sff_optoe_type.len_3=1 +sff_optoe_type.bit_offset_3= + +sff_optoe_type.mode_4=config +sff_optoe_type.int_cons_4= +sff_optoe_type.src_4=logic_file +sff_optoe_type.frmt_4=byte +sff_optoe_type.fpath_4=/sys/bus/i2c/devices/204-0050/dev_class +sff_optoe_type.addr_4=0 +sff_optoe_type.len_4=1 +sff_optoe_type.bit_offset_4= + +sff_optoe_type.mode_5=config +sff_optoe_type.int_cons_5= +sff_optoe_type.src_5=logic_file +sff_optoe_type.frmt_5=byte +sff_optoe_type.fpath_5=/sys/bus/i2c/devices/205-0050/dev_class +sff_optoe_type.addr_5=0 +sff_optoe_type.len_5=1 +sff_optoe_type.bit_offset_5= + +sff_optoe_type.mode_6=config +sff_optoe_type.int_cons_6= +sff_optoe_type.src_6=logic_file +sff_optoe_type.frmt_6=byte +sff_optoe_type.fpath_6=/sys/bus/i2c/devices/206-0050/dev_class +sff_optoe_type.addr_6=0 +sff_optoe_type.len_6=1 +sff_optoe_type.bit_offset_6= + +sff_optoe_type.mode_7=config +sff_optoe_type.int_cons_7= +sff_optoe_type.src_7=logic_file +sff_optoe_type.frmt_7=byte +sff_optoe_type.fpath_7=/sys/bus/i2c/devices/207-0050/dev_class +sff_optoe_type.addr_7=0 +sff_optoe_type.len_7=1 +sff_optoe_type.bit_offset_7= + +sff_optoe_type.mode_8=config +sff_optoe_type.int_cons_8= +sff_optoe_type.src_8=logic_file +sff_optoe_type.frmt_8=byte +sff_optoe_type.fpath_8=/sys/bus/i2c/devices/208-0050/dev_class +sff_optoe_type.addr_8=0 +sff_optoe_type.len_8=1 +sff_optoe_type.bit_offset_8= + +sff_optoe_type.mode_9=config +sff_optoe_type.int_cons_9= +sff_optoe_type.src_9=logic_file +sff_optoe_type.frmt_9=byte +sff_optoe_type.fpath_9=/sys/bus/i2c/devices/209-0050/dev_class +sff_optoe_type.addr_9=0 +sff_optoe_type.len_9=1 +sff_optoe_type.bit_offset_9= + +sff_optoe_type.mode_10=config +sff_optoe_type.int_cons_10= +sff_optoe_type.src_10=logic_file +sff_optoe_type.frmt_10=byte +sff_optoe_type.fpath_10=/sys/bus/i2c/devices/210-0050/dev_class +sff_optoe_type.addr_10=0 +sff_optoe_type.len_10=1 +sff_optoe_type.bit_offset_10= + +sff_optoe_type.mode_11=config +sff_optoe_type.int_cons_11= +sff_optoe_type.src_11=logic_file +sff_optoe_type.frmt_11=byte +sff_optoe_type.fpath_11=/sys/bus/i2c/devices/211-0050/dev_class +sff_optoe_type.addr_11=0 +sff_optoe_type.len_11=1 +sff_optoe_type.bit_offset_11= + +sff_optoe_type.mode_12=config +sff_optoe_type.int_cons_12= +sff_optoe_type.src_12=logic_file +sff_optoe_type.frmt_12=byte +sff_optoe_type.fpath_12=/sys/bus/i2c/devices/212-0050/dev_class +sff_optoe_type.addr_12=0 +sff_optoe_type.len_12=1 +sff_optoe_type.bit_offset_12= + +sff_optoe_type.mode_13=config +sff_optoe_type.int_cons_13= +sff_optoe_type.src_13=logic_file +sff_optoe_type.frmt_13=byte +sff_optoe_type.fpath_13=/sys/bus/i2c/devices/213-0050/dev_class +sff_optoe_type.addr_13=0 +sff_optoe_type.len_13=1 +sff_optoe_type.bit_offset_13= + +sff_optoe_type.mode_14=config +sff_optoe_type.int_cons_14= +sff_optoe_type.src_14=logic_file +sff_optoe_type.frmt_14=byte +sff_optoe_type.fpath_14=/sys/bus/i2c/devices/214-0050/dev_class +sff_optoe_type.addr_14=0 +sff_optoe_type.len_14=1 +sff_optoe_type.bit_offset_14= + +sff_optoe_type.mode_15=config +sff_optoe_type.int_cons_15= +sff_optoe_type.src_15=logic_file +sff_optoe_type.frmt_15=byte +sff_optoe_type.fpath_15=/sys/bus/i2c/devices/215-0050/dev_class +sff_optoe_type.addr_15=0 +sff_optoe_type.len_15=1 +sff_optoe_type.bit_offset_15= + +sff_optoe_type.mode_16=config +sff_optoe_type.int_cons_16= +sff_optoe_type.src_16=logic_file +sff_optoe_type.frmt_16=byte +sff_optoe_type.fpath_16=/sys/bus/i2c/devices/216-0050/dev_class +sff_optoe_type.addr_16=0 +sff_optoe_type.len_16=1 +sff_optoe_type.bit_offset_16= + +sff_optoe_type.mode_17=config +sff_optoe_type.int_cons_17= +sff_optoe_type.src_17=logic_file +sff_optoe_type.frmt_17=byte +sff_optoe_type.fpath_17=/sys/bus/i2c/devices/217-0050/dev_class +sff_optoe_type.addr_17=0 +sff_optoe_type.len_17=1 +sff_optoe_type.bit_offset_17= + +sff_optoe_type.mode_18=config +sff_optoe_type.int_cons_18= +sff_optoe_type.src_18=logic_file +sff_optoe_type.frmt_18=byte +sff_optoe_type.fpath_18=/sys/bus/i2c/devices/218-0050/dev_class +sff_optoe_type.addr_18=0 +sff_optoe_type.len_18=1 +sff_optoe_type.bit_offset_18= + +sff_optoe_type.mode_19=config +sff_optoe_type.int_cons_19= +sff_optoe_type.src_19=logic_file +sff_optoe_type.frmt_19=byte +sff_optoe_type.fpath_19=/sys/bus/i2c/devices/219-0050/dev_class +sff_optoe_type.addr_19=0 +sff_optoe_type.len_19=1 +sff_optoe_type.bit_offset_19= + +sff_optoe_type.mode_20=config +sff_optoe_type.int_cons_20= +sff_optoe_type.src_20=logic_file +sff_optoe_type.frmt_20=byte +sff_optoe_type.fpath_20=/sys/bus/i2c/devices/220-0050/dev_class +sff_optoe_type.addr_20=0 +sff_optoe_type.len_20=1 +sff_optoe_type.bit_offset_20= + +sff_optoe_type.mode_21=config +sff_optoe_type.int_cons_21= +sff_optoe_type.src_21=logic_file +sff_optoe_type.frmt_21=byte +sff_optoe_type.fpath_21=/sys/bus/i2c/devices/221-0050/dev_class +sff_optoe_type.addr_21=0 +sff_optoe_type.len_21=1 +sff_optoe_type.bit_offset_21= + +sff_optoe_type.mode_22=config +sff_optoe_type.int_cons_22= +sff_optoe_type.src_22=logic_file +sff_optoe_type.frmt_22=byte +sff_optoe_type.fpath_22=/sys/bus/i2c/devices/222-0050/dev_class +sff_optoe_type.addr_22=0 +sff_optoe_type.len_22=1 +sff_optoe_type.bit_offset_22= + +sff_optoe_type.mode_23=config +sff_optoe_type.int_cons_23= +sff_optoe_type.src_23=logic_file +sff_optoe_type.frmt_23=byte +sff_optoe_type.fpath_23=/sys/bus/i2c/devices/223-0050/dev_class +sff_optoe_type.addr_23=0 +sff_optoe_type.len_23=1 +sff_optoe_type.bit_offset_23= + +sff_optoe_type.mode_24=config +sff_optoe_type.int_cons_24= +sff_optoe_type.src_24=logic_file +sff_optoe_type.frmt_24=byte +sff_optoe_type.fpath_24=/sys/bus/i2c/devices/224-0050/dev_class +sff_optoe_type.addr_24=0 +sff_optoe_type.len_24=1 +sff_optoe_type.bit_offset_24= + +sff_optoe_type.mode_25=config +sff_optoe_type.int_cons_25= +sff_optoe_type.src_25=logic_file +sff_optoe_type.frmt_25=byte +sff_optoe_type.fpath_25=/sys/bus/i2c/devices/225-0050/dev_class +sff_optoe_type.addr_25=0 +sff_optoe_type.len_25=1 +sff_optoe_type.bit_offset_25= + +sff_optoe_type.mode_26=config +sff_optoe_type.int_cons_26= +sff_optoe_type.src_26=logic_file +sff_optoe_type.frmt_26=byte +sff_optoe_type.fpath_26=/sys/bus/i2c/devices/226-0050/dev_class +sff_optoe_type.addr_26=0 +sff_optoe_type.len_26=1 +sff_optoe_type.bit_offset_26= + +sff_optoe_type.mode_27=config +sff_optoe_type.int_cons_27= +sff_optoe_type.src_27=logic_file +sff_optoe_type.frmt_27=byte +sff_optoe_type.fpath_27=/sys/bus/i2c/devices/227-0050/dev_class +sff_optoe_type.addr_27=0 +sff_optoe_type.len_27=1 +sff_optoe_type.bit_offset_27= + +sff_optoe_type.mode_28=config +sff_optoe_type.int_cons_28= +sff_optoe_type.src_28=logic_file +sff_optoe_type.frmt_28=byte +sff_optoe_type.fpath_28=/sys/bus/i2c/devices/228-0050/dev_class +sff_optoe_type.addr_28=0 +sff_optoe_type.len_28=1 +sff_optoe_type.bit_offset_28= + +sff_optoe_type.mode_29=config +sff_optoe_type.int_cons_29= +sff_optoe_type.src_29=logic_file +sff_optoe_type.frmt_29=byte +sff_optoe_type.fpath_29=/sys/bus/i2c/devices/229-0050/dev_class +sff_optoe_type.addr_29=0 +sff_optoe_type.len_29=1 +sff_optoe_type.bit_offset_29= + +sff_optoe_type.mode_30=config +sff_optoe_type.int_cons_30= +sff_optoe_type.src_30=logic_file +sff_optoe_type.frmt_30=byte +sff_optoe_type.fpath_30=/sys/bus/i2c/devices/230-0050/dev_class +sff_optoe_type.addr_30=0 +sff_optoe_type.len_30=1 +sff_optoe_type.bit_offset_30= + +sff_optoe_type.mode_31=config +sff_optoe_type.int_cons_31= +sff_optoe_type.src_31=logic_file +sff_optoe_type.frmt_31=byte +sff_optoe_type.fpath_31=/sys/bus/i2c/devices/231-0050/dev_class +sff_optoe_type.addr_31=0 +sff_optoe_type.len_31=1 +sff_optoe_type.bit_offset_31= + +sff_optoe_type.mode_32=config +sff_optoe_type.int_cons_32= +sff_optoe_type.src_32=logic_file +sff_optoe_type.frmt_32=byte +sff_optoe_type.fpath_32=/sys/bus/i2c/devices/232-0050/dev_class +sff_optoe_type.addr_32=0 +sff_optoe_type.len_32=1 +sff_optoe_type.bit_offset_32= + +sff_optoe_type.mode_33=config +sff_optoe_type.int_cons_33= +sff_optoe_type.src_33=logic_file +sff_optoe_type.frmt_33=byte +sff_optoe_type.fpath_33=/sys/bus/i2c/devices/233-0050/dev_class +sff_optoe_type.addr_33=0 +sff_optoe_type.len_33=1 +sff_optoe_type.bit_offset_33= + +sff_optoe_type.mode_34=config +sff_optoe_type.int_cons_34= +sff_optoe_type.src_34=logic_file +sff_optoe_type.frmt_34=byte +sff_optoe_type.fpath_34=/sys/bus/i2c/devices/234-0050/dev_class +sff_optoe_type.addr_34=0 +sff_optoe_type.len_34=1 +sff_optoe_type.bit_offset_34= + +sff_optoe_type.mode_35=config +sff_optoe_type.int_cons_35= +sff_optoe_type.src_35=logic_file +sff_optoe_type.frmt_35=byte +sff_optoe_type.fpath_35=/sys/bus/i2c/devices/235-0050/dev_class +sff_optoe_type.addr_35=0 +sff_optoe_type.len_35=1 +sff_optoe_type.bit_offset_35= + +sff_optoe_type.mode_36=config +sff_optoe_type.int_cons_36= +sff_optoe_type.src_36=logic_file +sff_optoe_type.frmt_36=byte +sff_optoe_type.fpath_36=/sys/bus/i2c/devices/236-0050/dev_class +sff_optoe_type.addr_36=0 +sff_optoe_type.len_36=1 +sff_optoe_type.bit_offset_36= + +sff_optoe_type.mode_37=config +sff_optoe_type.int_cons_37= +sff_optoe_type.src_37=logic_file +sff_optoe_type.frmt_37=byte +sff_optoe_type.fpath_37=/sys/bus/i2c/devices/237-0050/dev_class +sff_optoe_type.addr_37=0 +sff_optoe_type.len_37=1 +sff_optoe_type.bit_offset_37= + +sff_optoe_type.mode_38=config +sff_optoe_type.int_cons_38= +sff_optoe_type.src_38=logic_file +sff_optoe_type.frmt_38=byte +sff_optoe_type.fpath_38=/sys/bus/i2c/devices/238-0050/dev_class +sff_optoe_type.addr_38=0 +sff_optoe_type.len_38=1 +sff_optoe_type.bit_offset_38= + +sff_optoe_type.mode_39=config +sff_optoe_type.int_cons_39= +sff_optoe_type.src_39=logic_file +sff_optoe_type.frmt_39=byte +sff_optoe_type.fpath_39=/sys/bus/i2c/devices/239-0050/dev_class +sff_optoe_type.addr_39=0 +sff_optoe_type.len_39=1 +sff_optoe_type.bit_offset_39= + +sff_optoe_type.mode_40=config +sff_optoe_type.int_cons_40= +sff_optoe_type.src_40=logic_file +sff_optoe_type.frmt_40=byte +sff_optoe_type.fpath_40=/sys/bus/i2c/devices/240-0050/dev_class +sff_optoe_type.addr_40=0 +sff_optoe_type.len_40=1 +sff_optoe_type.bit_offset_40= + +sff_optoe_type.mode_41=config +sff_optoe_type.int_cons_41= +sff_optoe_type.src_41=logic_file +sff_optoe_type.frmt_41=byte +sff_optoe_type.fpath_41=/sys/bus/i2c/devices/241-0050/dev_class +sff_optoe_type.addr_41=0 +sff_optoe_type.len_41=1 +sff_optoe_type.bit_offset_41= + +sff_optoe_type.mode_42=config +sff_optoe_type.int_cons_42= +sff_optoe_type.src_42=logic_file +sff_optoe_type.frmt_42=byte +sff_optoe_type.fpath_42=/sys/bus/i2c/devices/242-0050/dev_class +sff_optoe_type.addr_42=0 +sff_optoe_type.len_42=1 +sff_optoe_type.bit_offset_42= + +sff_optoe_type.mode_43=config +sff_optoe_type.int_cons_43= +sff_optoe_type.src_43=logic_file +sff_optoe_type.frmt_43=byte +sff_optoe_type.fpath_43=/sys/bus/i2c/devices/243-0050/dev_class +sff_optoe_type.addr_43=0 +sff_optoe_type.len_43=1 +sff_optoe_type.bit_offset_43= + +sff_optoe_type.mode_44=config +sff_optoe_type.int_cons_44= +sff_optoe_type.src_44=logic_file +sff_optoe_type.frmt_44=byte +sff_optoe_type.fpath_44=/sys/bus/i2c/devices/244-0050/dev_class +sff_optoe_type.addr_44=0 +sff_optoe_type.len_44=1 +sff_optoe_type.bit_offset_44= + +sff_optoe_type.mode_45=config +sff_optoe_type.int_cons_45= +sff_optoe_type.src_45=logic_file +sff_optoe_type.frmt_45=byte +sff_optoe_type.fpath_45=/sys/bus/i2c/devices/245-0050/dev_class +sff_optoe_type.addr_45=0 +sff_optoe_type.len_45=1 +sff_optoe_type.bit_offset_45= + +sff_optoe_type.mode_46=config +sff_optoe_type.int_cons_46= +sff_optoe_type.src_46=logic_file +sff_optoe_type.frmt_46=byte +sff_optoe_type.fpath_46=/sys/bus/i2c/devices/246-0050/dev_class +sff_optoe_type.addr_46=0 +sff_optoe_type.len_46=1 +sff_optoe_type.bit_offset_46= + +sff_optoe_type.mode_47=config +sff_optoe_type.int_cons_47= +sff_optoe_type.src_47=logic_file +sff_optoe_type.frmt_47=byte +sff_optoe_type.fpath_47=/sys/bus/i2c/devices/247-0050/dev_class +sff_optoe_type.addr_47=0 +sff_optoe_type.len_47=1 +sff_optoe_type.bit_offset_47= + +sff_optoe_type.mode_48=config +sff_optoe_type.int_cons_48= +sff_optoe_type.src_48=logic_file +sff_optoe_type.frmt_48=byte +sff_optoe_type.fpath_48=/sys/bus/i2c/devices/248-0050/dev_class +sff_optoe_type.addr_48=0 +sff_optoe_type.len_48=1 +sff_optoe_type.bit_offset_48= + +sff_optoe_type.mode_49=config +sff_optoe_type.int_cons_49= +sff_optoe_type.src_49=logic_file +sff_optoe_type.frmt_49=byte +sff_optoe_type.fpath_49=/sys/bus/i2c/devices/249-0050/dev_class +sff_optoe_type.addr_49=0 +sff_optoe_type.len_49=1 +sff_optoe_type.bit_offset_49= + +sff_optoe_type.mode_50=config +sff_optoe_type.int_cons_50= +sff_optoe_type.src_50=logic_file +sff_optoe_type.frmt_50=byte +sff_optoe_type.fpath_50=/sys/bus/i2c/devices/250-0050/dev_class +sff_optoe_type.addr_50=0 +sff_optoe_type.len_50=1 +sff_optoe_type.bit_offset_50= + +sff_optoe_type.mode_51=config +sff_optoe_type.int_cons_51= +sff_optoe_type.src_51=logic_file +sff_optoe_type.frmt_51=byte +sff_optoe_type.fpath_51=/sys/bus/i2c/devices/251-0050/dev_class +sff_optoe_type.addr_51=0 +sff_optoe_type.len_51=1 +sff_optoe_type.bit_offset_51= + +sff_optoe_type.mode_52=config +sff_optoe_type.int_cons_52= +sff_optoe_type.src_52=logic_file +sff_optoe_type.frmt_52=byte +sff_optoe_type.fpath_52=/sys/bus/i2c/devices/252-0050/dev_class +sff_optoe_type.addr_52=0 +sff_optoe_type.len_52=1 +sff_optoe_type.bit_offset_52= + +sff_optoe_type.mode_53=config +sff_optoe_type.int_cons_53= +sff_optoe_type.src_53=logic_file +sff_optoe_type.frmt_53=byte +sff_optoe_type.fpath_53=/sys/bus/i2c/devices/253-0050/dev_class +sff_optoe_type.addr_53=0 +sff_optoe_type.len_53=1 +sff_optoe_type.bit_offset_53= + +sff_optoe_type.mode_54=config +sff_optoe_type.int_cons_54= +sff_optoe_type.src_54=logic_file +sff_optoe_type.frmt_54=byte +sff_optoe_type.fpath_54=/sys/bus/i2c/devices/254-0050/dev_class +sff_optoe_type.addr_54=0 +sff_optoe_type.len_54=1 +sff_optoe_type.bit_offset_54= + +sff_optoe_type.mode_55=config +sff_optoe_type.int_cons_55= +sff_optoe_type.src_55=logic_file +sff_optoe_type.frmt_55=byte +sff_optoe_type.fpath_55=/sys/bus/i2c/devices/255-0050/dev_class +sff_optoe_type.addr_55=0 +sff_optoe_type.len_55=1 +sff_optoe_type.bit_offset_55= + +sff_optoe_type.mode_56=config +sff_optoe_type.int_cons_56= +sff_optoe_type.src_56=logic_file +sff_optoe_type.frmt_56=byte +sff_optoe_type.fpath_56=/sys/bus/i2c/devices/256-0050/dev_class +sff_optoe_type.addr_56=0 +sff_optoe_type.len_56=1 +sff_optoe_type.bit_offset_56= + +sff_optoe_type.mode_57=config +sff_optoe_type.int_cons_57= +sff_optoe_type.src_57=logic_file +sff_optoe_type.frmt_57=byte +sff_optoe_type.fpath_57=/sys/bus/i2c/devices/257-0050/dev_class +sff_optoe_type.addr_57=0 +sff_optoe_type.len_57=1 +sff_optoe_type.bit_offset_57= + +sff_optoe_type.mode_58=config +sff_optoe_type.int_cons_58= +sff_optoe_type.src_58=logic_file +sff_optoe_type.frmt_58=byte +sff_optoe_type.fpath_58=/sys/bus/i2c/devices/258-0050/dev_class +sff_optoe_type.addr_58=0 +sff_optoe_type.len_58=1 +sff_optoe_type.bit_offset_58= + +sff_optoe_type.mode_59=config +sff_optoe_type.int_cons_59= +sff_optoe_type.src_59=logic_file +sff_optoe_type.frmt_59=byte +sff_optoe_type.fpath_59=/sys/bus/i2c/devices/259-0050/dev_class +sff_optoe_type.addr_59=0 +sff_optoe_type.len_59=1 +sff_optoe_type.bit_offset_59= + +sff_optoe_type.mode_60=config +sff_optoe_type.int_cons_60= +sff_optoe_type.src_60=logic_file +sff_optoe_type.frmt_60=byte +sff_optoe_type.fpath_60=/sys/bus/i2c/devices/260-0050/dev_class +sff_optoe_type.addr_60=0 +sff_optoe_type.len_60=1 +sff_optoe_type.bit_offset_60= + +sff_optoe_type.mode_61=config +sff_optoe_type.int_cons_61= +sff_optoe_type.src_61=logic_file +sff_optoe_type.frmt_61=byte +sff_optoe_type.fpath_61=/sys/bus/i2c/devices/261-0050/dev_class +sff_optoe_type.addr_61=0 +sff_optoe_type.len_61=1 +sff_optoe_type.bit_offset_61= + +sff_optoe_type.mode_62=config +sff_optoe_type.int_cons_62= +sff_optoe_type.src_62=logic_file +sff_optoe_type.frmt_62=byte +sff_optoe_type.fpath_62=/sys/bus/i2c/devices/262-0050/dev_class +sff_optoe_type.addr_62=0 +sff_optoe_type.len_62=1 +sff_optoe_type.bit_offset_62= + +sff_optoe_type.mode_63=config +sff_optoe_type.int_cons_63= +sff_optoe_type.src_63=logic_file +sff_optoe_type.frmt_63=byte +sff_optoe_type.fpath_63=/sys/bus/i2c/devices/263-0050/dev_class +sff_optoe_type.addr_63=0 +sff_optoe_type.len_63=1 +sff_optoe_type.bit_offset_63= + +sff_optoe_type.mode_64=config +sff_optoe_type.int_cons_64= +sff_optoe_type.src_64=logic_file +sff_optoe_type.frmt_64=byte +sff_optoe_type.fpath_64=/sys/bus/i2c/devices/264-0050/dev_class +sff_optoe_type.addr_64=0 +sff_optoe_type.len_64=1 +sff_optoe_type.bit_offset_64= + +sff_optoe_type.mode_65=config +sff_optoe_type.int_cons_65= +sff_optoe_type.src_65=logic_file +sff_optoe_type.frmt_65=byte +sff_optoe_type.fpath_65=/sys/bus/i2c/devices/265-0050/dev_class +sff_optoe_type.addr_65=0 +sff_optoe_type.len_65=1 +sff_optoe_type.bit_offset_65= + +sff_optoe_type.mode_66=config +sff_optoe_type.int_cons_66= +sff_optoe_type.src_66=logic_file +sff_optoe_type.frmt_66=byte +sff_optoe_type.fpath_66=/sys/bus/i2c/devices/266-0050/dev_class +sff_optoe_type.addr_66=0 +sff_optoe_type.len_66=1 +sff_optoe_type.bit_offset_66= + +sff_optoe_type.mode_67=config +sff_optoe_type.int_cons_67= +sff_optoe_type.src_67=logic_file +sff_optoe_type.frmt_67=byte +sff_optoe_type.fpath_67=/sys/bus/i2c/devices/267-0050/dev_class +sff_optoe_type.addr_67=0 +sff_optoe_type.len_67=1 +sff_optoe_type.bit_offset_67= + +sff_optoe_type.mode_68=config +sff_optoe_type.int_cons_68= +sff_optoe_type.src_68=logic_file +sff_optoe_type.frmt_68=byte +sff_optoe_type.fpath_68=/sys/bus/i2c/devices/268-0050/dev_class +sff_optoe_type.addr_68=0 +sff_optoe_type.len_68=1 +sff_optoe_type.bit_offset_68= + +sff_optoe_type.mode_69=config +sff_optoe_type.int_cons_69= +sff_optoe_type.src_69=logic_file +sff_optoe_type.frmt_69=byte +sff_optoe_type.fpath_69=/sys/bus/i2c/devices/269-0050/dev_class +sff_optoe_type.addr_69=0 +sff_optoe_type.len_69=1 +sff_optoe_type.bit_offset_69= + +sff_optoe_type.mode_70=config +sff_optoe_type.int_cons_70= +sff_optoe_type.src_70=logic_file +sff_optoe_type.frmt_70=byte +sff_optoe_type.fpath_70=/sys/bus/i2c/devices/270-0050/dev_class +sff_optoe_type.addr_70=0 +sff_optoe_type.len_70=1 +sff_optoe_type.bit_offset_70= + +sff_optoe_type.mode_71=config +sff_optoe_type.int_cons_71= +sff_optoe_type.src_71=logic_file +sff_optoe_type.frmt_71=byte +sff_optoe_type.fpath_71=/sys/bus/i2c/devices/271-0050/dev_class +sff_optoe_type.addr_71=0 +sff_optoe_type.len_71=1 +sff_optoe_type.bit_offset_71= + +sff_optoe_type.mode_72=config +sff_optoe_type.int_cons_72= +sff_optoe_type.src_72=logic_file +sff_optoe_type.frmt_72=byte +sff_optoe_type.fpath_72=/sys/bus/i2c/devices/272-0050/dev_class +sff_optoe_type.addr_72=0 +sff_optoe_type.len_72=1 +sff_optoe_type.bit_offset_72= + +sff_optoe_type.mode_73=config +sff_optoe_type.int_cons_73= +sff_optoe_type.src_73=logic_file +sff_optoe_type.frmt_73=byte +sff_optoe_type.fpath_73=/sys/bus/i2c/devices/273-0050/dev_class +sff_optoe_type.addr_73=0 +sff_optoe_type.len_73=1 +sff_optoe_type.bit_offset_73= + +sff_optoe_type.mode_74=config +sff_optoe_type.int_cons_74= +sff_optoe_type.src_74=logic_file +sff_optoe_type.frmt_74=byte +sff_optoe_type.fpath_74=/sys/bus/i2c/devices/274-0050/dev_class +sff_optoe_type.addr_74=0 +sff_optoe_type.len_74=1 +sff_optoe_type.bit_offset_74= + +sff_optoe_type.mode_75=config +sff_optoe_type.int_cons_75= +sff_optoe_type.src_75=logic_file +sff_optoe_type.frmt_75=byte +sff_optoe_type.fpath_75=/sys/bus/i2c/devices/275-0050/dev_class +sff_optoe_type.addr_75=0 +sff_optoe_type.len_75=1 +sff_optoe_type.bit_offset_75= + +sff_optoe_type.mode_76=config +sff_optoe_type.int_cons_76= +sff_optoe_type.src_76=logic_file +sff_optoe_type.frmt_76=byte +sff_optoe_type.fpath_76=/sys/bus/i2c/devices/276-0050/dev_class +sff_optoe_type.addr_76=0 +sff_optoe_type.len_76=1 +sff_optoe_type.bit_offset_76= + +sff_optoe_type.mode_77=config +sff_optoe_type.int_cons_77= +sff_optoe_type.src_77=logic_file +sff_optoe_type.frmt_77=byte +sff_optoe_type.fpath_77=/sys/bus/i2c/devices/277-0050/dev_class +sff_optoe_type.addr_77=0 +sff_optoe_type.len_77=1 +sff_optoe_type.bit_offset_77= + +sff_optoe_type.mode_78=config +sff_optoe_type.int_cons_78= +sff_optoe_type.src_78=logic_file +sff_optoe_type.frmt_78=byte +sff_optoe_type.fpath_78=/sys/bus/i2c/devices/278-0050/dev_class +sff_optoe_type.addr_78=0 +sff_optoe_type.len_78=1 +sff_optoe_type.bit_offset_78= + +sff_optoe_type.mode_79=config +sff_optoe_type.int_cons_79= +sff_optoe_type.src_79=logic_file +sff_optoe_type.frmt_79=byte +sff_optoe_type.fpath_79=/sys/bus/i2c/devices/279-0050/dev_class +sff_optoe_type.addr_79=0 +sff_optoe_type.len_79=1 +sff_optoe_type.bit_offset_79= + +sff_optoe_type.mode_80=config +sff_optoe_type.int_cons_80= +sff_optoe_type.src_80=logic_file +sff_optoe_type.frmt_80=byte +sff_optoe_type.fpath_80=/sys/bus/i2c/devices/280-0050/dev_class +sff_optoe_type.addr_80=0 +sff_optoe_type.len_80=1 +sff_optoe_type.bit_offset_80= + +sff_optoe_type.mode_81=config +sff_optoe_type.int_cons_81= +sff_optoe_type.src_81=logic_file +sff_optoe_type.frmt_81=byte +sff_optoe_type.fpath_81=/sys/bus/i2c/devices/281-0050/dev_class +sff_optoe_type.addr_81=0 +sff_optoe_type.len_81=1 +sff_optoe_type.bit_offset_81= + +sff_optoe_type.mode_82=config +sff_optoe_type.int_cons_82= +sff_optoe_type.src_82=logic_file +sff_optoe_type.frmt_82=byte +sff_optoe_type.fpath_82=/sys/bus/i2c/devices/282-0050/dev_class +sff_optoe_type.addr_82=0 +sff_optoe_type.len_82=1 +sff_optoe_type.bit_offset_82= + +sff_optoe_type.mode_83=config +sff_optoe_type.int_cons_83= +sff_optoe_type.src_83=logic_file +sff_optoe_type.frmt_83=byte +sff_optoe_type.fpath_83=/sys/bus/i2c/devices/283-0050/dev_class +sff_optoe_type.addr_83=0 +sff_optoe_type.len_83=1 +sff_optoe_type.bit_offset_83= + +sff_optoe_type.mode_84=config +sff_optoe_type.int_cons_84= +sff_optoe_type.src_84=logic_file +sff_optoe_type.frmt_84=byte +sff_optoe_type.fpath_84=/sys/bus/i2c/devices/284-0050/dev_class +sff_optoe_type.addr_84=0 +sff_optoe_type.len_84=1 +sff_optoe_type.bit_offset_84= + +sff_optoe_type.mode_85=config +sff_optoe_type.int_cons_85= +sff_optoe_type.src_85=logic_file +sff_optoe_type.frmt_85=byte +sff_optoe_type.fpath_85=/sys/bus/i2c/devices/285-0050/dev_class +sff_optoe_type.addr_85=0 +sff_optoe_type.len_85=1 +sff_optoe_type.bit_offset_85= + +sff_optoe_type.mode_86=config +sff_optoe_type.int_cons_86= +sff_optoe_type.src_86=logic_file +sff_optoe_type.frmt_86=byte +sff_optoe_type.fpath_86=/sys/bus/i2c/devices/286-0050/dev_class +sff_optoe_type.addr_86=0 +sff_optoe_type.len_86=1 +sff_optoe_type.bit_offset_86= + +sff_optoe_type.mode_87=config +sff_optoe_type.int_cons_87= +sff_optoe_type.src_87=logic_file +sff_optoe_type.frmt_87=byte +sff_optoe_type.fpath_87=/sys/bus/i2c/devices/287-0050/dev_class +sff_optoe_type.addr_87=0 +sff_optoe_type.len_87=1 +sff_optoe_type.bit_offset_87= + +sff_optoe_type.mode_88=config +sff_optoe_type.int_cons_88= +sff_optoe_type.src_88=logic_file +sff_optoe_type.frmt_88=byte +sff_optoe_type.fpath_88=/sys/bus/i2c/devices/288-0050/dev_class +sff_optoe_type.addr_88=0 +sff_optoe_type.len_88=1 +sff_optoe_type.bit_offset_88= + +sff_optoe_type.mode_89=config +sff_optoe_type.int_cons_89= +sff_optoe_type.src_89=logic_file +sff_optoe_type.frmt_89=byte +sff_optoe_type.fpath_89=/sys/bus/i2c/devices/289-0050/dev_class +sff_optoe_type.addr_89=0 +sff_optoe_type.len_89=1 +sff_optoe_type.bit_offset_89= + +sff_optoe_type.mode_90=config +sff_optoe_type.int_cons_90= +sff_optoe_type.src_90=logic_file +sff_optoe_type.frmt_90=byte +sff_optoe_type.fpath_90=/sys/bus/i2c/devices/290-0050/dev_class +sff_optoe_type.addr_90=0 +sff_optoe_type.len_90=1 +sff_optoe_type.bit_offset_90= + +sff_optoe_type.mode_91=config +sff_optoe_type.int_cons_91= +sff_optoe_type.src_91=logic_file +sff_optoe_type.frmt_91=byte +sff_optoe_type.fpath_91=/sys/bus/i2c/devices/291-0050/dev_class +sff_optoe_type.addr_91=0 +sff_optoe_type.len_91=1 +sff_optoe_type.bit_offset_91= + +sff_optoe_type.mode_92=config +sff_optoe_type.int_cons_92= +sff_optoe_type.src_92=logic_file +sff_optoe_type.frmt_92=byte +sff_optoe_type.fpath_92=/sys/bus/i2c/devices/292-0050/dev_class +sff_optoe_type.addr_92=0 +sff_optoe_type.len_92=1 +sff_optoe_type.bit_offset_92= + +sff_optoe_type.mode_93=config +sff_optoe_type.int_cons_93= +sff_optoe_type.src_93=logic_file +sff_optoe_type.frmt_93=byte +sff_optoe_type.fpath_93=/sys/bus/i2c/devices/293-0050/dev_class +sff_optoe_type.addr_93=0 +sff_optoe_type.len_93=1 +sff_optoe_type.bit_offset_93= + +sff_optoe_type.mode_94=config +sff_optoe_type.int_cons_94= +sff_optoe_type.src_94=logic_file +sff_optoe_type.frmt_94=byte +sff_optoe_type.fpath_94=/sys/bus/i2c/devices/294-0050/dev_class +sff_optoe_type.addr_94=0 +sff_optoe_type.len_94=1 +sff_optoe_type.bit_offset_94= + +sff_optoe_type.mode_95=config +sff_optoe_type.int_cons_95= +sff_optoe_type.src_95=logic_file +sff_optoe_type.frmt_95=byte +sff_optoe_type.fpath_95=/sys/bus/i2c/devices/295-0050/dev_class +sff_optoe_type.addr_95=0 +sff_optoe_type.len_95=1 +sff_optoe_type.bit_offset_95= + +sff_optoe_type.mode_96=config +sff_optoe_type.int_cons_96= +sff_optoe_type.src_96=logic_file +sff_optoe_type.frmt_96=byte +sff_optoe_type.fpath_96=/sys/bus/i2c/devices/296-0050/dev_class +sff_optoe_type.addr_96=0 +sff_optoe_type.len_96=1 +sff_optoe_type.bit_offset_96= + +sff_optoe_type.mode_97=config +sff_optoe_type.int_cons_97= +sff_optoe_type.src_97=logic_file +sff_optoe_type.frmt_97=byte +sff_optoe_type.fpath_97=/sys/bus/i2c/devices/297-0050/dev_class +sff_optoe_type.addr_97=0 +sff_optoe_type.len_97=1 +sff_optoe_type.bit_offset_97= + +sff_optoe_type.mode_98=config +sff_optoe_type.int_cons_98= +sff_optoe_type.src_98=logic_file +sff_optoe_type.frmt_98=byte +sff_optoe_type.fpath_98=/sys/bus/i2c/devices/298-0050/dev_class +sff_optoe_type.addr_98=0 +sff_optoe_type.len_98=1 +sff_optoe_type.bit_offset_98= + +sff_optoe_type.mode_99=config +sff_optoe_type.int_cons_99= +sff_optoe_type.src_99=logic_file +sff_optoe_type.frmt_99=byte +sff_optoe_type.fpath_99=/sys/bus/i2c/devices/299-0050/dev_class +sff_optoe_type.addr_99=0 +sff_optoe_type.len_99=1 +sff_optoe_type.bit_offset_99= + +sff_optoe_type.mode_100=config +sff_optoe_type.int_cons_100= +sff_optoe_type.src_100=logic_file +sff_optoe_type.frmt_100=byte +sff_optoe_type.fpath_100=/sys/bus/i2c/devices/300-0050/dev_class +sff_optoe_type.addr_100=0 +sff_optoe_type.len_100=1 +sff_optoe_type.bit_offset_100= + +sff_optoe_type.mode_101=config +sff_optoe_type.int_cons_101= +sff_optoe_type.src_101=logic_file +sff_optoe_type.frmt_101=byte +sff_optoe_type.fpath_101=/sys/bus/i2c/devices/301-0050/dev_class +sff_optoe_type.addr_101=0 +sff_optoe_type.len_101=1 +sff_optoe_type.bit_offset_101= + +sff_optoe_type.mode_102=config +sff_optoe_type.int_cons_102= +sff_optoe_type.src_102=logic_file +sff_optoe_type.frmt_102=byte +sff_optoe_type.fpath_102=/sys/bus/i2c/devices/302-0050/dev_class +sff_optoe_type.addr_102=0 +sff_optoe_type.len_102=1 +sff_optoe_type.bit_offset_102= + +sff_optoe_type.mode_103=config +sff_optoe_type.int_cons_103= +sff_optoe_type.src_103=logic_file +sff_optoe_type.frmt_103=byte +sff_optoe_type.fpath_103=/sys/bus/i2c/devices/303-0050/dev_class +sff_optoe_type.addr_103=0 +sff_optoe_type.len_103=1 +sff_optoe_type.bit_offset_103= + +sff_optoe_type.mode_104=config +sff_optoe_type.int_cons_104= +sff_optoe_type.src_104=logic_file +sff_optoe_type.frmt_104=byte +sff_optoe_type.fpath_104=/sys/bus/i2c/devices/304-0050/dev_class +sff_optoe_type.addr_104=0 +sff_optoe_type.len_104=1 +sff_optoe_type.bit_offset_104= + +sff_optoe_type.mode_105=config +sff_optoe_type.int_cons_105= +sff_optoe_type.src_105=logic_file +sff_optoe_type.frmt_105=byte +sff_optoe_type.fpath_105=/sys/bus/i2c/devices/305-0050/dev_class +sff_optoe_type.addr_105=0 +sff_optoe_type.len_105=1 +sff_optoe_type.bit_offset_105= + +sff_optoe_type.mode_106=config +sff_optoe_type.int_cons_106= +sff_optoe_type.src_106=logic_file +sff_optoe_type.frmt_106=byte +sff_optoe_type.fpath_106=/sys/bus/i2c/devices/306-0050/dev_class +sff_optoe_type.addr_106=0 +sff_optoe_type.len_106=1 +sff_optoe_type.bit_offset_106= + +sff_optoe_type.mode_107=config +sff_optoe_type.int_cons_107= +sff_optoe_type.src_107=logic_file +sff_optoe_type.frmt_107=byte +sff_optoe_type.fpath_107=/sys/bus/i2c/devices/307-0050/dev_class +sff_optoe_type.addr_107=0 +sff_optoe_type.len_107=1 +sff_optoe_type.bit_offset_107= + +sff_optoe_type.mode_108=config +sff_optoe_type.int_cons_108= +sff_optoe_type.src_108=logic_file +sff_optoe_type.frmt_108=byte +sff_optoe_type.fpath_108=/sys/bus/i2c/devices/308-0050/dev_class +sff_optoe_type.addr_108=0 +sff_optoe_type.len_108=1 +sff_optoe_type.bit_offset_108= + +sff_optoe_type.mode_109=config +sff_optoe_type.int_cons_109= +sff_optoe_type.src_109=logic_file +sff_optoe_type.frmt_109=byte +sff_optoe_type.fpath_109=/sys/bus/i2c/devices/309-0050/dev_class +sff_optoe_type.addr_109=0 +sff_optoe_type.len_109=1 +sff_optoe_type.bit_offset_109= + +sff_optoe_type.mode_110=config +sff_optoe_type.int_cons_110= +sff_optoe_type.src_110=logic_file +sff_optoe_type.frmt_110=byte +sff_optoe_type.fpath_110=/sys/bus/i2c/devices/310-0050/dev_class +sff_optoe_type.addr_110=0 +sff_optoe_type.len_110=1 +sff_optoe_type.bit_offset_110= + +sff_optoe_type.mode_111=config +sff_optoe_type.int_cons_111= +sff_optoe_type.src_111=logic_file +sff_optoe_type.frmt_111=byte +sff_optoe_type.fpath_111=/sys/bus/i2c/devices/311-0050/dev_class +sff_optoe_type.addr_111=0 +sff_optoe_type.len_111=1 +sff_optoe_type.bit_offset_111= + +sff_optoe_type.mode_112=config +sff_optoe_type.int_cons_112= +sff_optoe_type.src_112=logic_file +sff_optoe_type.frmt_112=byte +sff_optoe_type.fpath_112=/sys/bus/i2c/devices/312-0050/dev_class +sff_optoe_type.addr_112=0 +sff_optoe_type.len_112=1 +sff_optoe_type.bit_offset_112= + +sff_optoe_type.mode_113=config +sff_optoe_type.int_cons_113= +sff_optoe_type.src_113=logic_file +sff_optoe_type.frmt_113=byte +sff_optoe_type.fpath_113=/sys/bus/i2c/devices/313-0050/dev_class +sff_optoe_type.addr_113=0 +sff_optoe_type.len_113=1 +sff_optoe_type.bit_offset_113= + +sff_optoe_type.mode_114=config +sff_optoe_type.int_cons_114= +sff_optoe_type.src_114=logic_file +sff_optoe_type.frmt_114=byte +sff_optoe_type.fpath_114=/sys/bus/i2c/devices/314-0050/dev_class +sff_optoe_type.addr_114=0 +sff_optoe_type.len_114=1 +sff_optoe_type.bit_offset_114= + +sff_optoe_type.mode_115=config +sff_optoe_type.int_cons_115= +sff_optoe_type.src_115=logic_file +sff_optoe_type.frmt_115=byte +sff_optoe_type.fpath_115=/sys/bus/i2c/devices/315-0050/dev_class +sff_optoe_type.addr_115=0 +sff_optoe_type.len_115=1 +sff_optoe_type.bit_offset_115= + +sff_optoe_type.mode_116=config +sff_optoe_type.int_cons_116= +sff_optoe_type.src_116=logic_file +sff_optoe_type.frmt_116=byte +sff_optoe_type.fpath_116=/sys/bus/i2c/devices/316-0050/dev_class +sff_optoe_type.addr_116=0 +sff_optoe_type.len_116=1 +sff_optoe_type.bit_offset_116= + +sff_optoe_type.mode_117=config +sff_optoe_type.int_cons_117= +sff_optoe_type.src_117=logic_file +sff_optoe_type.frmt_117=byte +sff_optoe_type.fpath_117=/sys/bus/i2c/devices/317-0050/dev_class +sff_optoe_type.addr_117=0 +sff_optoe_type.len_117=1 +sff_optoe_type.bit_offset_117= + +sff_optoe_type.mode_118=config +sff_optoe_type.int_cons_118= +sff_optoe_type.src_118=logic_file +sff_optoe_type.frmt_118=byte +sff_optoe_type.fpath_118=/sys/bus/i2c/devices/318-0050/dev_class +sff_optoe_type.addr_118=0 +sff_optoe_type.len_118=1 +sff_optoe_type.bit_offset_118= + +sff_optoe_type.mode_119=config +sff_optoe_type.int_cons_119= +sff_optoe_type.src_119=logic_file +sff_optoe_type.frmt_119=byte +sff_optoe_type.fpath_119=/sys/bus/i2c/devices/319-0050/dev_class +sff_optoe_type.addr_119=0 +sff_optoe_type.len_119=1 +sff_optoe_type.bit_offset_119= + +sff_optoe_type.mode_120=config +sff_optoe_type.int_cons_120= +sff_optoe_type.src_120=logic_file +sff_optoe_type.frmt_120=byte +sff_optoe_type.fpath_120=/sys/bus/i2c/devices/320-0050/dev_class +sff_optoe_type.addr_120=0 +sff_optoe_type.len_120=1 +sff_optoe_type.bit_offset_120= + +sff_optoe_type.mode_121=config +sff_optoe_type.int_cons_121= +sff_optoe_type.src_121=logic_file +sff_optoe_type.frmt_121=byte +sff_optoe_type.fpath_121=/sys/bus/i2c/devices/321-0050/dev_class +sff_optoe_type.addr_121=0 +sff_optoe_type.len_121=1 +sff_optoe_type.bit_offset_121= + +sff_optoe_type.mode_122=config +sff_optoe_type.int_cons_122= +sff_optoe_type.src_122=logic_file +sff_optoe_type.frmt_122=byte +sff_optoe_type.fpath_122=/sys/bus/i2c/devices/322-0050/dev_class +sff_optoe_type.addr_122=0 +sff_optoe_type.len_122=1 +sff_optoe_type.bit_offset_122= + +sff_optoe_type.mode_123=config +sff_optoe_type.int_cons_123= +sff_optoe_type.src_123=logic_file +sff_optoe_type.frmt_123=byte +sff_optoe_type.fpath_123=/sys/bus/i2c/devices/323-0050/dev_class +sff_optoe_type.addr_123=0 +sff_optoe_type.len_123=1 +sff_optoe_type.bit_offset_123= + +sff_optoe_type.mode_124=config +sff_optoe_type.int_cons_124= +sff_optoe_type.src_124=logic_file +sff_optoe_type.frmt_124=byte +sff_optoe_type.fpath_124=/sys/bus/i2c/devices/324-0050/dev_class +sff_optoe_type.addr_124=0 +sff_optoe_type.len_124=1 +sff_optoe_type.bit_offset_124= + +sff_optoe_type.mode_125=config +sff_optoe_type.int_cons_125= +sff_optoe_type.src_125=logic_file +sff_optoe_type.frmt_125=byte +sff_optoe_type.fpath_125=/sys/bus/i2c/devices/325-0050/dev_class +sff_optoe_type.addr_125=0 +sff_optoe_type.len_125=1 +sff_optoe_type.bit_offset_125= + +sff_optoe_type.mode_126=config +sff_optoe_type.int_cons_126= +sff_optoe_type.src_126=logic_file +sff_optoe_type.frmt_126=byte +sff_optoe_type.fpath_126=/sys/bus/i2c/devices/326-0050/dev_class +sff_optoe_type.addr_126=0 +sff_optoe_type.len_126=1 +sff_optoe_type.bit_offset_126= + +sff_optoe_type.mode_127=config +sff_optoe_type.int_cons_127= +sff_optoe_type.src_127=logic_file +sff_optoe_type.frmt_127=byte +sff_optoe_type.fpath_127=/sys/bus/i2c/devices/327-0050/dev_class +sff_optoe_type.addr_127=0 +sff_optoe_type.len_127=1 +sff_optoe_type.bit_offset_127= + +sff_optoe_type.mode_128=config +sff_optoe_type.int_cons_128= +sff_optoe_type.src_128=logic_file +sff_optoe_type.frmt_128=byte +sff_optoe_type.fpath_128=/sys/bus/i2c/devices/328-0050/dev_class +sff_optoe_type.addr_128=0 +sff_optoe_type.len_128=1 +sff_optoe_type.bit_offset_128= + +sff_optoe_type.mode_129=config +sff_optoe_type.int_cons_129= +sff_optoe_type.src_129=logic_file +sff_optoe_type.frmt_129=byte +sff_optoe_type.fpath_129=/sys/bus/i2c/devices/329-0050/dev_class +sff_optoe_type.addr_129=0 +sff_optoe_type.len_129=1 +sff_optoe_type.bit_offset_129= + +sff_optoe_type.mode_130=config +sff_optoe_type.int_cons_130= +sff_optoe_type.src_130=logic_file +sff_optoe_type.frmt_130=byte +sff_optoe_type.fpath_130=/sys/bus/i2c/devices/330-0050/dev_class +sff_optoe_type.addr_130=0 +sff_optoe_type.len_130=1 +sff_optoe_type.bit_offset_130= + +# Power On Group Signal Configuration +# Group 1 Configuration +port_power_group_reg.mode_1=config +port_power_group_reg.src_1=logic_file +port_power_group_reg.frmt_1=bit +port_power_group_reg.fpath_1=/dev/fpga1 +port_power_group_reg.addr_1=0x58 +port_power_group_reg.val_len_1=4 +port_power_group_reg.val_pola_1=negative +port_power_group_reg.len_1=1 +port_power_group_reg.bit_offset_1=0 + +# Group 2 Configuration +port_power_group_reg.mode_2=config +port_power_group_reg.src_2=logic_file +port_power_group_reg.frmt_2=bit +port_power_group_reg.fpath_2=/dev/fpga1 +port_power_group_reg.addr_2=0x58 +port_power_group_reg.val_len_2=4 +port_power_group_reg.val_pola_2=negative +port_power_group_reg.len_2=1 +port_power_group_reg.bit_offset_2=1 + +# Group 3 Configuration +port_power_group_reg.mode_3=config +port_power_group_reg.src_3=logic_file +port_power_group_reg.frmt_3=bit +port_power_group_reg.fpath_3=/dev/fpga1 +port_power_group_reg.addr_3=0x58 +port_power_group_reg.val_len_3=4 +port_power_group_reg.val_pola_3=negative +port_power_group_reg.len_3=1 +port_power_group_reg.bit_offset_3=2 + +# Group 4 Configuration +port_power_group_reg.mode_4=config +port_power_group_reg.src_4=logic_file +port_power_group_reg.frmt_4=bit +port_power_group_reg.fpath_4=/dev/fpga1 +port_power_group_reg.addr_4=0x58 +port_power_group_reg.val_len_4=4 +port_power_group_reg.val_pola_4=negative +port_power_group_reg.len_4=1 +port_power_group_reg.bit_offset_4=3 + +# Group 5 Configuration +port_power_group_reg.mode_5=config +port_power_group_reg.src_5=logic_file +port_power_group_reg.frmt_5=bit +port_power_group_reg.fpath_5=/dev/fpga1 +port_power_group_reg.addr_5=0x58 +port_power_group_reg.val_len_5=4 +port_power_group_reg.val_pola_5=negative +port_power_group_reg.len_5=1 +port_power_group_reg.bit_offset_5=4 + +# Group 6 Configuration +port_power_group_reg.mode_6=config +port_power_group_reg.src_6=logic_file +port_power_group_reg.frmt_6=bit +port_power_group_reg.fpath_6=/dev/fpga1 +port_power_group_reg.addr_6=0x58 +port_power_group_reg.val_len_6=4 +port_power_group_reg.val_pola_6=negative +port_power_group_reg.len_6=1 +port_power_group_reg.bit_offset_6=5 + +# Group 7 Configuration +port_power_group_reg.mode_7=config +port_power_group_reg.src_7=logic_file +port_power_group_reg.frmt_7=bit +port_power_group_reg.fpath_7=/dev/fpga1 +port_power_group_reg.addr_7=0x58 +port_power_group_reg.val_len_7=4 +port_power_group_reg.val_pola_7=negative +port_power_group_reg.len_7=1 +port_power_group_reg.bit_offset_7=6 + +# Group 8 Configuration +port_power_group_reg.mode_8=config +port_power_group_reg.src_8=logic_file +port_power_group_reg.frmt_8=bit +port_power_group_reg.fpath_8=/dev/fpga1 +port_power_group_reg.addr_8=0x58 +port_power_group_reg.val_len_8=4 +port_power_group_reg.val_pola_8=negative +port_power_group_reg.len_8=1 +port_power_group_reg.bit_offset_8=7 + +# Group 9 Configuration +port_power_group_reg.mode_9=config +port_power_group_reg.src_9=logic_file +port_power_group_reg.frmt_9=bit +port_power_group_reg.fpath_9=/dev/fpga1 +port_power_group_reg.addr_9=0x58 +port_power_group_reg.val_len_9=4 +port_power_group_reg.val_pola_9=negative +port_power_group_reg.len_9=1 +port_power_group_reg.bit_offset_9=8 + +# Group 10 Configuration +port_power_group_reg.mode_10=config +port_power_group_reg.src_10=logic_file +port_power_group_reg.frmt_10=bit +port_power_group_reg.fpath_10=/dev/fpga1 +port_power_group_reg.addr_10=0x58 +port_power_group_reg.val_len_10=4 +port_power_group_reg.val_pola_10=negative +port_power_group_reg.len_10=1 +port_power_group_reg.bit_offset_10=9 + +# Group 11 Configuration +port_power_group_reg.mode_11=config +port_power_group_reg.src_11=logic_file +port_power_group_reg.frmt_11=bit +port_power_group_reg.fpath_11=/dev/fpga1 +port_power_group_reg.addr_11=0x58 +port_power_group_reg.val_len_11=4 +port_power_group_reg.val_pola_11=negative +port_power_group_reg.len_11=1 +port_power_group_reg.bit_offset_11=10 + +# Group 12 Configuration +port_power_group_reg.mode_12=config +port_power_group_reg.src_12=logic_file +port_power_group_reg.frmt_12=bit +port_power_group_reg.fpath_12=/dev/fpga1 +port_power_group_reg.addr_12=0x58 +port_power_group_reg.val_len_12=4 +port_power_group_reg.val_pola_12=negative +port_power_group_reg.len_12=1 +port_power_group_reg.bit_offset_12=11 + +# Group 13 Configuration +port_power_group_reg.mode_13=config +port_power_group_reg.src_13=logic_file +port_power_group_reg.frmt_13=bit +port_power_group_reg.fpath_13=/dev/fpga1 +port_power_group_reg.addr_13=0x58 +port_power_group_reg.val_len_13=4 +port_power_group_reg.val_pola_13=negative +port_power_group_reg.len_13=1 +port_power_group_reg.bit_offset_13=12 + +# Group 14 Configuration +port_power_group_reg.mode_14=config +port_power_group_reg.src_14=logic_file +port_power_group_reg.frmt_14=bit +port_power_group_reg.fpath_14=/dev/fpga1 +port_power_group_reg.addr_14=0x58 +port_power_group_reg.val_len_14=4 +port_power_group_reg.val_pola_14=negative +port_power_group_reg.len_14=1 +port_power_group_reg.bit_offset_14=13 + +# Group 15 Configuration +port_power_group_reg.mode_15=config +port_power_group_reg.src_15=logic_file +port_power_group_reg.frmt_15=bit +port_power_group_reg.fpath_15=/dev/fpga1 +port_power_group_reg.addr_15=0x58 +port_power_group_reg.val_len_15=4 +port_power_group_reg.val_pola_15=negative +port_power_group_reg.len_15=1 +port_power_group_reg.bit_offset_15=14 + +# Group 16 Configuration +port_power_group_reg.mode_16=config +port_power_group_reg.src_16=logic_file +port_power_group_reg.frmt_16=bit +port_power_group_reg.fpath_16=/dev/fpga1 +port_power_group_reg.addr_16=0x58 +port_power_group_reg.val_len_16=4 +port_power_group_reg.val_pola_16=negative +port_power_group_reg.len_16=1 +port_power_group_reg.bit_offset_16=15 + +# Group 17 Configuration +port_power_group_reg.mode_17=config +port_power_group_reg.src_17=logic_file +port_power_group_reg.frmt_17=bit +port_power_group_reg.fpath_17=/dev/fpga1 +port_power_group_reg.addr_17=0x58 +port_power_group_reg.val_len_17=4 +port_power_group_reg.val_pola_17=negative +port_power_group_reg.len_17=1 +port_power_group_reg.bit_offset_17=16 + +# Group 18 Configuration +port_power_group_reg.mode_18=config +port_power_group_reg.src_18=logic_file +port_power_group_reg.frmt_18=bit +port_power_group_reg.fpath_18=/dev/fpga1 +port_power_group_reg.addr_18=0x58 +port_power_group_reg.val_len_18=4 +port_power_group_reg.val_pola_18=negative +port_power_group_reg.len_18=1 +port_power_group_reg.bit_offset_18=17 + +# Group 19 Configuration +port_power_group_reg.mode_19=config +port_power_group_reg.src_19=logic_file +port_power_group_reg.frmt_19=bit +port_power_group_reg.fpath_19=/dev/fpga1 +port_power_group_reg.addr_19=0x58 +port_power_group_reg.val_len_19=4 +port_power_group_reg.val_pola_19=negative +port_power_group_reg.len_19=1 +port_power_group_reg.bit_offset_19=18 + +# Group 20 Configuration +port_power_group_reg.mode_20=config +port_power_group_reg.src_20=logic_file +port_power_group_reg.frmt_20=bit +port_power_group_reg.fpath_20=/dev/fpga1 +port_power_group_reg.addr_20=0x58 +port_power_group_reg.val_len_20=4 +port_power_group_reg.val_pola_20=negative +port_power_group_reg.len_20=1 +port_power_group_reg.bit_offset_20=19 + +# Group 21 Configuration +port_power_group_reg.mode_21=config +port_power_group_reg.src_21=logic_file +port_power_group_reg.frmt_21=bit +port_power_group_reg.fpath_21=/dev/fpga1 +port_power_group_reg.addr_21=0x58 +port_power_group_reg.val_len_21=4 +port_power_group_reg.val_pola_21=negative +port_power_group_reg.len_21=1 +port_power_group_reg.bit_offset_21=20 + +# Group 22 Configuration +port_power_group_reg.mode_22=config +port_power_group_reg.src_22=logic_file +port_power_group_reg.frmt_22=bit +port_power_group_reg.fpath_22=/dev/fpga1 +port_power_group_reg.addr_22=0x58 +port_power_group_reg.val_len_22=4 +port_power_group_reg.val_pola_22=negative +port_power_group_reg.len_22=1 +port_power_group_reg.bit_offset_22=21 + +# Group 23 Configuration +port_power_group_reg.mode_23=config +port_power_group_reg.src_23=logic_file +port_power_group_reg.frmt_23=bit +port_power_group_reg.fpath_23=/dev/fpga1 +port_power_group_reg.addr_23=0x58 +port_power_group_reg.val_len_23=4 +port_power_group_reg.val_pola_23=negative +port_power_group_reg.len_23=1 +port_power_group_reg.bit_offset_23=22 + +# Group 24 Configuration +port_power_group_reg.mode_24=config +port_power_group_reg.src_24=logic_file +port_power_group_reg.frmt_24=bit +port_power_group_reg.fpath_24=/dev/fpga1 +port_power_group_reg.addr_24=0x58 +port_power_group_reg.val_len_24=4 +port_power_group_reg.val_pola_24=negative +port_power_group_reg.len_24=1 +port_power_group_reg.bit_offset_24=23 + +# Group 25 Configuration +port_power_group_reg.mode_25=config +port_power_group_reg.src_25=logic_file +port_power_group_reg.frmt_25=bit +port_power_group_reg.fpath_25=/dev/fpga1 +port_power_group_reg.addr_25=0x58 +port_power_group_reg.val_len_25=4 +port_power_group_reg.val_pola_25=negative +port_power_group_reg.len_25=1 +port_power_group_reg.bit_offset_25=24 + +# Group 26 Configuration +port_power_group_reg.mode_26=config +port_power_group_reg.src_26=logic_file +port_power_group_reg.frmt_26=bit +port_power_group_reg.fpath_26=/dev/fpga1 +port_power_group_reg.addr_26=0x58 +port_power_group_reg.val_len_26=4 +port_power_group_reg.val_pola_26=negative +port_power_group_reg.len_26=1 +port_power_group_reg.bit_offset_26=25 + +# Group 27 Configuration +port_power_group_reg.mode_27=config +port_power_group_reg.src_27=logic_file +port_power_group_reg.frmt_27=bit +port_power_group_reg.fpath_27=/dev/fpga1 +port_power_group_reg.addr_27=0x58 +port_power_group_reg.val_len_27=4 +port_power_group_reg.val_pola_27=negative +port_power_group_reg.len_27=1 +port_power_group_reg.bit_offset_27=26 + +# Group 28 Configuration +port_power_group_reg.mode_28=config +port_power_group_reg.src_28=logic_file +port_power_group_reg.frmt_28=bit +port_power_group_reg.fpath_28=/dev/fpga1 +port_power_group_reg.addr_28=0x58 +port_power_group_reg.val_len_28=4 +port_power_group_reg.val_pola_28=negative +port_power_group_reg.len_28=1 +port_power_group_reg.bit_offset_28=27 + +# Group 29 Configuration +port_power_group_reg.mode_29=config +port_power_group_reg.src_29=logic_file +port_power_group_reg.frmt_29=bit +port_power_group_reg.fpath_29=/dev/fpga1 +port_power_group_reg.addr_29=0x58 +port_power_group_reg.val_len_29=4 +port_power_group_reg.val_pola_29=negative +port_power_group_reg.len_29=1 +port_power_group_reg.bit_offset_29=28 + +# Group 30 Configuration +port_power_group_reg.mode_30=config +port_power_group_reg.src_30=logic_file +port_power_group_reg.frmt_30=bit +port_power_group_reg.fpath_30=/dev/fpga1 +port_power_group_reg.addr_30=0x58 +port_power_group_reg.val_len_30=4 +port_power_group_reg.val_pola_30=negative +port_power_group_reg.len_30=1 +port_power_group_reg.bit_offset_30=29 + +# Group 31 Configuration +port_power_group_reg.mode_31=config +port_power_group_reg.src_31=logic_file +port_power_group_reg.frmt_31=bit +port_power_group_reg.fpath_31=/dev/fpga1 +port_power_group_reg.addr_31=0x58 +port_power_group_reg.val_len_31=4 +port_power_group_reg.val_pola_31=negative +port_power_group_reg.len_31=1 +port_power_group_reg.bit_offset_31=30 + +# Group 32 Configuration +port_power_group_reg.mode_32=config +port_power_group_reg.src_32=logic_file +port_power_group_reg.frmt_32=bit +port_power_group_reg.fpath_32=/dev/fpga1 +port_power_group_reg.addr_32=0x58 +port_power_group_reg.val_len_32=4 +port_power_group_reg.val_pola_32=negative +port_power_group_reg.len_32=1 +port_power_group_reg.bit_offset_32=31 + +# Group 33 Configuration +port_power_group_reg.mode_33=config +port_power_group_reg.src_33=logic_file +port_power_group_reg.frmt_33=byte +port_power_group_reg.fpath_33=/dev/cpld9 +port_power_group_reg.addr_33=0x20 +port_power_group_reg.len_33=1 +port_power_group_reg.val_type_33=nega_key + +# Group 34 Configuration +port_power_group_reg.mode_34=config +port_power_group_reg.src_34=logic_file +port_power_group_reg.frmt_34=byte +port_power_group_reg.fpath_34=/dev/cpld9 +port_power_group_reg.addr_34=0x21 +port_power_group_reg.len_34=1 +port_power_group_reg.val_type_34=nega_key + +# Group 35 Configuration +port_power_group_reg.mode_35=config +port_power_group_reg.src_35=logic_file +port_power_group_reg.frmt_35=byte +port_power_group_reg.fpath_35=/dev/cpld9 +port_power_group_reg.addr_35=0x22 +port_power_group_reg.len_35=1 +port_power_group_reg.val_type_35=nega_key + +# Group 36 Configuration +port_power_group_reg.mode_36=config +port_power_group_reg.src_36=logic_file +port_power_group_reg.frmt_36=byte +port_power_group_reg.fpath_36=/dev/cpld9 +port_power_group_reg.addr_36=0x23 +port_power_group_reg.len_36=1 +port_power_group_reg.val_type_36=nega_key + +# Group 37 Configuration +port_power_group_reg.mode_37=config +port_power_group_reg.src_37=logic_file +port_power_group_reg.frmt_37=byte +port_power_group_reg.fpath_37=/dev/cpld9 +port_power_group_reg.addr_37=0x24 +port_power_group_reg.len_37=1 +port_power_group_reg.val_type_37=nega_key + +# Group 38 Configuration +port_power_group_reg.mode_38=config +port_power_group_reg.src_38=logic_file +port_power_group_reg.frmt_38=byte +port_power_group_reg.fpath_38=/dev/cpld9 +port_power_group_reg.addr_38=0x25 +port_power_group_reg.len_38=1 +port_power_group_reg.val_type_38=nega_key + +# Group 39 Configuration +port_power_group_reg.mode_39=config +port_power_group_reg.src_39=logic_file +port_power_group_reg.frmt_39=byte +port_power_group_reg.fpath_39=/dev/cpld9 +port_power_group_reg.addr_39=0x26 +port_power_group_reg.len_39=1 +port_power_group_reg.val_type_39=nega_key + +# Group 40 Configuration +port_power_group_reg.mode_40=config +port_power_group_reg.src_40=logic_file +port_power_group_reg.frmt_40=byte +port_power_group_reg.fpath_40=/dev/cpld9 +port_power_group_reg.addr_40=0x27 +port_power_group_reg.len_40=1 +port_power_group_reg.val_type_40=nega_key + +# Group 41 Configuration +port_power_group_reg.mode_41=config +port_power_group_reg.src_41=logic_file +port_power_group_reg.frmt_41=byte +port_power_group_reg.fpath_41=/dev/cpld9 +port_power_group_reg.addr_41=0x28 +port_power_group_reg.len_41=1 +port_power_group_reg.val_type_41=nega_key + +# Group 42 Configuration +port_power_group_reg.mode_42=config +port_power_group_reg.src_42=logic_file +port_power_group_reg.frmt_42=byte +port_power_group_reg.fpath_42=/dev/cpld9 +port_power_group_reg.addr_42=0x29 +port_power_group_reg.len_42=1 +port_power_group_reg.val_type_42=nega_key + +# Group 43 Configuration +port_power_group_reg.mode_43=config +port_power_group_reg.src_43=logic_file +port_power_group_reg.frmt_43=byte +port_power_group_reg.fpath_43=/dev/cpld9 +port_power_group_reg.addr_43=0x2a +port_power_group_reg.len_43=1 +port_power_group_reg.val_type_43=nega_key + +# Group 44 Configuration +port_power_group_reg.mode_44=config +port_power_group_reg.src_44=logic_file +port_power_group_reg.frmt_44=byte +port_power_group_reg.fpath_44=/dev/cpld9 +port_power_group_reg.addr_44=0x2b +port_power_group_reg.len_44=1 +port_power_group_reg.val_type_44=nega_key + +# Group 45 Configuration +port_power_group_reg.mode_45=config +port_power_group_reg.src_45=logic_file +port_power_group_reg.frmt_45=byte +port_power_group_reg.fpath_45=/dev/cpld9 +port_power_group_reg.addr_45=0x2c +port_power_group_reg.len_45=1 +port_power_group_reg.val_type_45=nega_key + +# Group 46 Configuration +port_power_group_reg.mode_46=config +port_power_group_reg.src_46=logic_file +port_power_group_reg.frmt_46=byte +port_power_group_reg.fpath_46=/dev/cpld9 +port_power_group_reg.addr_46=0x2d +port_power_group_reg.len_46=1 +port_power_group_reg.val_type_46=nega_key + +# Group 47 Configuration +port_power_group_reg.mode_47=config +port_power_group_reg.src_47=logic_file +port_power_group_reg.frmt_47=byte +port_power_group_reg.fpath_47=/dev/cpld9 +port_power_group_reg.addr_47=0x2e +port_power_group_reg.len_47=1 +port_power_group_reg.val_type_47=nega_key + +# Group 48 Configuration +port_power_group_reg.mode_48=config +port_power_group_reg.src_48=logic_file +port_power_group_reg.frmt_48=byte +port_power_group_reg.fpath_48=/dev/cpld9 +port_power_group_reg.addr_48=0x2f +port_power_group_reg.len_48=1 +port_power_group_reg.val_type_48=nega_key + +# Group 49 Configuration +port_power_group_reg.mode_49=config +port_power_group_reg.src_49=logic_file +port_power_group_reg.frmt_49=byte +port_power_group_reg.fpath_49=/dev/cpld9 +port_power_group_reg.addr_49=0x30 +port_power_group_reg.len_49=1 +port_power_group_reg.val_type_49=nega_key + +# Group 50 Configuration +port_power_group_reg.mode_50=config +port_power_group_reg.src_50=logic_file +port_power_group_reg.frmt_50=byte +port_power_group_reg.fpath_50=/dev/cpld9 +port_power_group_reg.addr_50=0x31 +port_power_group_reg.len_50=1 +port_power_group_reg.val_type_50=nega_key + +# Group 51 Configuration +port_power_group_reg.mode_51=config +port_power_group_reg.src_51=logic_file +port_power_group_reg.frmt_51=byte +port_power_group_reg.fpath_51=/dev/cpld9 +port_power_group_reg.addr_51=0x32 +port_power_group_reg.len_51=1 +port_power_group_reg.val_type_51=nega_key + +# Group 52 Configuration +port_power_group_reg.mode_52=config +port_power_group_reg.src_52=logic_file +port_power_group_reg.frmt_52=byte +port_power_group_reg.fpath_52=/dev/cpld9 +port_power_group_reg.addr_52=0x33 +port_power_group_reg.len_52=1 +port_power_group_reg.val_type_52=nega_key + +# Group 53 Configuration +port_power_group_reg.mode_53=config +port_power_group_reg.src_53=logic_file +port_power_group_reg.frmt_53=byte +port_power_group_reg.fpath_53=/dev/cpld9 +port_power_group_reg.addr_53=0x34 +port_power_group_reg.len_53=1 +port_power_group_reg.val_type_53=nega_key + +# Group 54 Configuration +port_power_group_reg.mode_54=config +port_power_group_reg.src_54=logic_file +port_power_group_reg.frmt_54=byte +port_power_group_reg.fpath_54=/dev/cpld9 +port_power_group_reg.addr_54=0x35 +port_power_group_reg.len_54=1 +port_power_group_reg.val_type_54=nega_key + +# Group 55 Configuration +port_power_group_reg.mode_55=config +port_power_group_reg.src_55=logic_file +port_power_group_reg.frmt_55=byte +port_power_group_reg.fpath_55=/dev/cpld9 +port_power_group_reg.addr_55=0x36 +port_power_group_reg.len_55=1 +port_power_group_reg.val_type_55=nega_key + +# Group 56 Configuration +port_power_group_reg.mode_56=config +port_power_group_reg.src_56=logic_file +port_power_group_reg.frmt_56=byte +port_power_group_reg.fpath_56=/dev/cpld9 +port_power_group_reg.addr_56=0x37 +port_power_group_reg.len_56=1 +port_power_group_reg.val_type_56=nega_key + +# Group 57 Configuration +port_power_group_reg.mode_57=config +port_power_group_reg.src_57=logic_file +port_power_group_reg.frmt_57=byte +port_power_group_reg.fpath_57=/dev/cpld9 +port_power_group_reg.addr_57=0x38 +port_power_group_reg.len_57=1 +port_power_group_reg.val_type_57=nega_key + +# Group 58 Configuration +port_power_group_reg.mode_58=config +port_power_group_reg.src_58=logic_file +port_power_group_reg.frmt_58=byte +port_power_group_reg.fpath_58=/dev/cpld9 +port_power_group_reg.addr_58=0x39 +port_power_group_reg.len_58=1 +port_power_group_reg.val_type_58=nega_key + +# Group 59 Configuration +port_power_group_reg.mode_59=config +port_power_group_reg.src_59=logic_file +port_power_group_reg.frmt_59=byte +port_power_group_reg.fpath_59=/dev/cpld9 +port_power_group_reg.addr_59=0x3a +port_power_group_reg.len_59=1 +port_power_group_reg.val_type_59=nega_key + +# Group 60 Configuration +port_power_group_reg.mode_60=config +port_power_group_reg.src_60=logic_file +port_power_group_reg.frmt_60=byte +port_power_group_reg.fpath_60=/dev/cpld9 +port_power_group_reg.addr_60=0x3b +port_power_group_reg.len_60=1 +port_power_group_reg.val_type_60=nega_key + +# Group 61 Configuration +port_power_group_reg.mode_61=config +port_power_group_reg.src_61=logic_file +port_power_group_reg.frmt_61=byte +port_power_group_reg.fpath_61=/dev/cpld9 +port_power_group_reg.addr_61=0x3c +port_power_group_reg.len_61=1 +port_power_group_reg.val_type_61=nega_key + +# Group 62 Configuration +port_power_group_reg.mode_62=config +port_power_group_reg.src_62=logic_file +port_power_group_reg.frmt_62=byte +port_power_group_reg.fpath_62=/dev/cpld9 +port_power_group_reg.addr_62=0x3d +port_power_group_reg.len_62=1 +port_power_group_reg.val_type_62=nega_key + +# Group 63 Configuration +port_power_group_reg.mode_63=config +port_power_group_reg.src_63=logic_file +port_power_group_reg.frmt_63=byte +port_power_group_reg.fpath_63=/dev/cpld9 +port_power_group_reg.addr_63=0x3e +port_power_group_reg.len_63=1 +port_power_group_reg.val_type_63=nega_key + +# Group 64 Configuration +port_power_group_reg.mode_64=config +port_power_group_reg.src_64=logic_file +port_power_group_reg.frmt_64=byte +port_power_group_reg.fpath_64=/dev/cpld9 +port_power_group_reg.addr_64=0x3f +port_power_group_reg.len_64=1 +port_power_group_reg.val_type_64=nega_key + +# Group 65 Configuration +port_power_group_reg.mode_65=config +port_power_group_reg.src_65=logic_file +port_power_group_reg.frmt_65=byte +port_power_group_reg.fpath_65=/dev/cpld9 +port_power_group_reg.addr_65=0x40 +port_power_group_reg.len_65=1 +port_power_group_reg.val_type_65=nega_key + +# Group 66 Configuration +port_power_group_reg.mode_66=config +port_power_group_reg.src_66=logic_file +port_power_group_reg.frmt_66=byte +port_power_group_reg.fpath_66=/dev/cpld9 +port_power_group_reg.addr_66=0x41 +port_power_group_reg.len_66=1 +port_power_group_reg.val_type_66=nega_key + +# Group 67 Configuration +port_power_group_reg.mode_67=config +port_power_group_reg.src_67=logic_file +port_power_group_reg.frmt_67=byte +port_power_group_reg.fpath_67=/dev/cpld9 +port_power_group_reg.addr_67=0x42 +port_power_group_reg.len_67=1 +port_power_group_reg.val_type_67=nega_key + +# Group 68 Configuration +port_power_group_reg.mode_68=config +port_power_group_reg.src_68=logic_file +port_power_group_reg.frmt_68=byte +port_power_group_reg.fpath_68=/dev/cpld9 +port_power_group_reg.addr_68=0x43 +port_power_group_reg.len_68=1 +port_power_group_reg.val_type_68=nega_key + +# Group 69 Configuration +port_power_group_reg.mode_69=config +port_power_group_reg.src_69=logic_file +port_power_group_reg.frmt_69=byte +port_power_group_reg.fpath_69=/dev/cpld9 +port_power_group_reg.addr_69=0x44 +port_power_group_reg.len_69=1 +port_power_group_reg.val_type_69=nega_key + +# Group 70 Configuration +port_power_group_reg.mode_70=config +port_power_group_reg.src_70=logic_file +port_power_group_reg.frmt_70=byte +port_power_group_reg.fpath_70=/dev/cpld9 +port_power_group_reg.addr_70=0x45 +port_power_group_reg.len_70=1 +port_power_group_reg.val_type_70=nega_key + +# Group 71 Configuration +port_power_group_reg.mode_71=config +port_power_group_reg.src_71=logic_file +port_power_group_reg.frmt_71=byte +port_power_group_reg.fpath_71=/dev/cpld9 +port_power_group_reg.addr_71=0x46 +port_power_group_reg.len_71=1 +port_power_group_reg.val_type_71=nega_key + +# Group 72 Configuration +port_power_group_reg.mode_72=config +port_power_group_reg.src_72=logic_file +port_power_group_reg.frmt_72=byte +port_power_group_reg.fpath_72=/dev/cpld9 +port_power_group_reg.addr_72=0x47 +port_power_group_reg.len_72=1 +port_power_group_reg.val_type_72=nega_key + +# Group 73 Configuration +port_power_group_reg.mode_73=config +port_power_group_reg.src_73=logic_file +port_power_group_reg.frmt_73=byte +port_power_group_reg.fpath_73=/dev/cpld9 +port_power_group_reg.addr_73=0x48 +port_power_group_reg.len_73=1 +port_power_group_reg.val_type_73=nega_key + +# Group 74 Configuration +port_power_group_reg.mode_74=config +port_power_group_reg.src_74=logic_file +port_power_group_reg.frmt_74=byte +port_power_group_reg.fpath_74=/dev/cpld9 +port_power_group_reg.addr_74=0x49 +port_power_group_reg.len_74=1 +port_power_group_reg.val_type_74=nega_key + +# Group 75 Configuration +port_power_group_reg.mode_75=config +port_power_group_reg.src_75=logic_file +port_power_group_reg.frmt_75=byte +port_power_group_reg.fpath_75=/dev/cpld9 +port_power_group_reg.addr_75=0x4a +port_power_group_reg.len_75=1 +port_power_group_reg.val_type_75=nega_key + +# Group 76 Configuration +port_power_group_reg.mode_76=config +port_power_group_reg.src_76=logic_file +port_power_group_reg.frmt_76=byte +port_power_group_reg.fpath_76=/dev/cpld9 +port_power_group_reg.addr_76=0x4b +port_power_group_reg.len_76=1 +port_power_group_reg.val_type_76=nega_key + +# Group 77 Configuration +port_power_group_reg.mode_77=config +port_power_group_reg.src_77=logic_file +port_power_group_reg.frmt_77=byte +port_power_group_reg.fpath_77=/dev/cpld9 +port_power_group_reg.addr_77=0x4c +port_power_group_reg.len_77=1 +port_power_group_reg.val_type_77=nega_key + +# Group 78 Configuration +port_power_group_reg.mode_78=config +port_power_group_reg.src_78=logic_file +port_power_group_reg.frmt_78=byte +port_power_group_reg.fpath_78=/dev/cpld9 +port_power_group_reg.addr_78=0x4d +port_power_group_reg.len_78=1 +port_power_group_reg.val_type_78=nega_key + +# Group 79 Configuration +port_power_group_reg.mode_79=config +port_power_group_reg.src_79=logic_file +port_power_group_reg.frmt_79=byte +port_power_group_reg.fpath_79=/dev/cpld9 +port_power_group_reg.addr_79=0x4e +port_power_group_reg.len_79=1 +port_power_group_reg.val_type_79=nega_key + +# Group 80 Configuration +port_power_group_reg.mode_80=config +port_power_group_reg.src_80=logic_file +port_power_group_reg.frmt_80=byte +port_power_group_reg.fpath_80=/dev/cpld9 +port_power_group_reg.addr_80=0x4f +port_power_group_reg.len_80=1 +port_power_group_reg.val_type_80=nega_key + +# Group 81 Configuration +port_power_group_reg.mode_81=config +port_power_group_reg.src_81=logic_file +port_power_group_reg.frmt_81=byte +port_power_group_reg.fpath_81=/dev/cpld9 +port_power_group_reg.addr_81=0x50 +port_power_group_reg.len_81=1 +port_power_group_reg.val_type_81=nega_key + +# Group 82 Configuration +port_power_group_reg.mode_82=config +port_power_group_reg.src_82=logic_file +port_power_group_reg.frmt_82=byte +port_power_group_reg.fpath_82=/dev/cpld9 +port_power_group_reg.addr_82=0x51 +port_power_group_reg.len_82=1 +port_power_group_reg.val_type_82=nega_key + +# Group 83 Configuration +port_power_group_reg.mode_83=config +port_power_group_reg.src_83=logic_file +port_power_group_reg.frmt_83=byte +port_power_group_reg.fpath_83=/dev/cpld9 +port_power_group_reg.addr_83=0x52 +port_power_group_reg.len_83=1 +port_power_group_reg.val_type_83=nega_key + +# Group 84 Configuration +port_power_group_reg.mode_84=config +port_power_group_reg.src_84=logic_file +port_power_group_reg.frmt_84=byte +port_power_group_reg.fpath_84=/dev/cpld9 +port_power_group_reg.addr_84=0x53 +port_power_group_reg.len_84=1 +port_power_group_reg.val_type_84=nega_key + +# Group 85 Configuration +port_power_group_reg.mode_85=config +port_power_group_reg.src_85=logic_file +port_power_group_reg.frmt_85=byte +port_power_group_reg.fpath_85=/dev/cpld9 +port_power_group_reg.addr_85=0x54 +port_power_group_reg.len_85=1 +port_power_group_reg.val_type_85=nega_key + +# Group 86 Configuration +port_power_group_reg.mode_86=config +port_power_group_reg.src_86=logic_file +port_power_group_reg.frmt_86=byte +port_power_group_reg.fpath_86=/dev/cpld9 +port_power_group_reg.addr_86=0x55 +port_power_group_reg.len_86=1 +port_power_group_reg.val_type_86=nega_key + +# Group 87 Configuration +port_power_group_reg.mode_87=config +port_power_group_reg.src_87=logic_file +port_power_group_reg.frmt_87=byte +port_power_group_reg.fpath_87=/dev/cpld9 +port_power_group_reg.addr_87=0x56 +port_power_group_reg.len_87=1 +port_power_group_reg.val_type_87=nega_key + +# Group 88 Configuration +port_power_group_reg.mode_88=config +port_power_group_reg.src_88=logic_file +port_power_group_reg.frmt_88=byte +port_power_group_reg.fpath_88=/dev/cpld9 +port_power_group_reg.addr_88=0x57 +port_power_group_reg.len_88=1 +port_power_group_reg.val_type_88=nega_key + +# Group 89 Configuration +port_power_group_reg.mode_89=config +port_power_group_reg.src_89=logic_file +port_power_group_reg.frmt_89=byte +port_power_group_reg.fpath_89=/dev/cpld9 +port_power_group_reg.addr_89=0x58 +port_power_group_reg.len_89=1 +port_power_group_reg.val_type_89=nega_key + +# Group 90 Configuration +port_power_group_reg.mode_90=config +port_power_group_reg.src_90=logic_file +port_power_group_reg.frmt_90=byte +port_power_group_reg.fpath_90=/dev/cpld9 +port_power_group_reg.addr_90=0x59 +port_power_group_reg.len_90=1 +port_power_group_reg.val_type_90=nega_key + +# Group 91 Configuration +port_power_group_reg.mode_91=config +port_power_group_reg.src_91=logic_file +port_power_group_reg.frmt_91=byte +port_power_group_reg.fpath_91=/dev/cpld9 +port_power_group_reg.addr_91=0x5a +port_power_group_reg.len_91=1 +port_power_group_reg.val_type_91=nega_key + +# Group 92 Configuration +port_power_group_reg.mode_92=config +port_power_group_reg.src_92=logic_file +port_power_group_reg.frmt_92=byte +port_power_group_reg.fpath_92=/dev/cpld9 +port_power_group_reg.addr_92=0x5b +port_power_group_reg.len_92=1 +port_power_group_reg.val_type_92=nega_key + +# Group 93 Configuration +port_power_group_reg.mode_93=config +port_power_group_reg.src_93=logic_file +port_power_group_reg.frmt_93=byte +port_power_group_reg.fpath_93=/dev/cpld9 +port_power_group_reg.addr_93=0x5c +port_power_group_reg.len_93=1 +port_power_group_reg.val_type_93=nega_key + +# Group 94 Configuration +port_power_group_reg.mode_94=config +port_power_group_reg.src_94=logic_file +port_power_group_reg.frmt_94=byte +port_power_group_reg.fpath_94=/dev/cpld9 +port_power_group_reg.addr_94=0x5d +port_power_group_reg.len_94=1 +port_power_group_reg.val_type_94=nega_key + +# Group 95 Configuration +port_power_group_reg.mode_95=config +port_power_group_reg.src_95=logic_file +port_power_group_reg.frmt_95=byte +port_power_group_reg.fpath_95=/dev/cpld9 +port_power_group_reg.addr_95=0x5e +port_power_group_reg.len_95=1 +port_power_group_reg.val_type_95=nega_key + +# Group 96 Configuration +port_power_group_reg.mode_96=config +port_power_group_reg.src_96=logic_file +port_power_group_reg.frmt_96=byte +port_power_group_reg.fpath_96=/dev/cpld9 +port_power_group_reg.addr_96=0x5f +port_power_group_reg.len_96=1 +port_power_group_reg.val_type_96=nega_key + +# Group 97 Configuration +port_power_group_reg.mode_97=config +port_power_group_reg.src_97=logic_file +port_power_group_reg.frmt_97=bit +port_power_group_reg.fpath_97=/dev/fpga2 +port_power_group_reg.addr_97=0x58 +port_power_group_reg.val_len_97=4 +port_power_group_reg.val_pola_97=negative +port_power_group_reg.len_97=1 +port_power_group_reg.bit_offset_97=0 + +# Group 98 Configuration +port_power_group_reg.mode_98=config +port_power_group_reg.src_98=logic_file +port_power_group_reg.frmt_98=bit +port_power_group_reg.fpath_98=/dev/fpga2 +port_power_group_reg.addr_98=0x58 +port_power_group_reg.val_len_98=4 +port_power_group_reg.val_pola_98=negative +port_power_group_reg.len_98=1 +port_power_group_reg.bit_offset_98=1 + +# Group 99 Configuration +port_power_group_reg.mode_99=config +port_power_group_reg.src_99=logic_file +port_power_group_reg.frmt_99=bit +port_power_group_reg.fpath_99=/dev/fpga2 +port_power_group_reg.addr_99=0x58 +port_power_group_reg.val_len_99=4 +port_power_group_reg.val_pola_99=negative +port_power_group_reg.len_99=1 +port_power_group_reg.bit_offset_99=2 + +# Group 100 Configuration +port_power_group_reg.mode_100=config +port_power_group_reg.src_100=logic_file +port_power_group_reg.frmt_100=bit +port_power_group_reg.fpath_100=/dev/fpga2 +port_power_group_reg.addr_100=0x58 +port_power_group_reg.val_len_100=4 +port_power_group_reg.val_pola_100=negative +port_power_group_reg.len_100=1 +port_power_group_reg.bit_offset_100=3 + +# Group 101 Configuration +port_power_group_reg.mode_101=config +port_power_group_reg.src_101=logic_file +port_power_group_reg.frmt_101=bit +port_power_group_reg.fpath_101=/dev/fpga2 +port_power_group_reg.addr_101=0x58 +port_power_group_reg.val_len_101=4 +port_power_group_reg.val_pola_101=negative +port_power_group_reg.len_101=1 +port_power_group_reg.bit_offset_101=4 + +# Group 102 Configuration +port_power_group_reg.mode_102=config +port_power_group_reg.src_102=logic_file +port_power_group_reg.frmt_102=bit +port_power_group_reg.fpath_102=/dev/fpga2 +port_power_group_reg.addr_102=0x58 +port_power_group_reg.val_len_102=4 +port_power_group_reg.val_pola_102=negative +port_power_group_reg.len_102=1 +port_power_group_reg.bit_offset_102=5 + +# Group 103 Configuration +port_power_group_reg.mode_103=config +port_power_group_reg.src_103=logic_file +port_power_group_reg.frmt_103=bit +port_power_group_reg.fpath_103=/dev/fpga2 +port_power_group_reg.addr_103=0x58 +port_power_group_reg.val_len_103=4 +port_power_group_reg.val_pola_103=negative +port_power_group_reg.len_103=1 +port_power_group_reg.bit_offset_103=6 + +# Group 104 Configuration +port_power_group_reg.mode_104=config +port_power_group_reg.src_104=logic_file +port_power_group_reg.frmt_104=bit +port_power_group_reg.fpath_104=/dev/fpga2 +port_power_group_reg.addr_104=0x58 +port_power_group_reg.val_len_104=4 +port_power_group_reg.val_pola_104=negative +port_power_group_reg.len_104=1 +port_power_group_reg.bit_offset_104=7 + +# Group 105 Configuration +port_power_group_reg.mode_105=config +port_power_group_reg.src_105=logic_file +port_power_group_reg.frmt_105=bit +port_power_group_reg.fpath_105=/dev/fpga2 +port_power_group_reg.addr_105=0x58 +port_power_group_reg.val_len_105=4 +port_power_group_reg.val_pola_105=negative +port_power_group_reg.len_105=1 +port_power_group_reg.bit_offset_105=8 + +# Group 106 Configuration +port_power_group_reg.mode_106=config +port_power_group_reg.src_106=logic_file +port_power_group_reg.frmt_106=bit +port_power_group_reg.fpath_106=/dev/fpga2 +port_power_group_reg.addr_106=0x58 +port_power_group_reg.val_len_106=4 +port_power_group_reg.val_pola_106=negative +port_power_group_reg.len_106=1 +port_power_group_reg.bit_offset_106=9 + +# Group 107 Configuration +port_power_group_reg.mode_107=config +port_power_group_reg.src_107=logic_file +port_power_group_reg.frmt_107=bit +port_power_group_reg.fpath_107=/dev/fpga2 +port_power_group_reg.addr_107=0x58 +port_power_group_reg.val_len_107=4 +port_power_group_reg.val_pola_107=negative +port_power_group_reg.len_107=1 +port_power_group_reg.bit_offset_107=10 + +# Group 108 Configuration +port_power_group_reg.mode_108=config +port_power_group_reg.src_108=logic_file +port_power_group_reg.frmt_108=bit +port_power_group_reg.fpath_108=/dev/fpga2 +port_power_group_reg.addr_108=0x58 +port_power_group_reg.val_len_108=4 +port_power_group_reg.val_pola_108=negative +port_power_group_reg.len_108=1 +port_power_group_reg.bit_offset_108=11 + +# Group 109 Configuration +port_power_group_reg.mode_109=config +port_power_group_reg.src_109=logic_file +port_power_group_reg.frmt_109=bit +port_power_group_reg.fpath_109=/dev/fpga2 +port_power_group_reg.addr_109=0x58 +port_power_group_reg.val_len_109=4 +port_power_group_reg.val_pola_109=negative +port_power_group_reg.len_109=1 +port_power_group_reg.bit_offset_109=12 + +# Group 110 Configuration +port_power_group_reg.mode_110=config +port_power_group_reg.src_110=logic_file +port_power_group_reg.frmt_110=bit +port_power_group_reg.fpath_110=/dev/fpga2 +port_power_group_reg.addr_110=0x58 +port_power_group_reg.val_len_110=4 +port_power_group_reg.val_pola_110=negative +port_power_group_reg.len_110=1 +port_power_group_reg.bit_offset_110=13 + +# Group 111 Configuration +port_power_group_reg.mode_111=config +port_power_group_reg.src_111=logic_file +port_power_group_reg.frmt_111=bit +port_power_group_reg.fpath_111=/dev/fpga2 +port_power_group_reg.addr_111=0x58 +port_power_group_reg.val_len_111=4 +port_power_group_reg.val_pola_111=negative +port_power_group_reg.len_111=1 +port_power_group_reg.bit_offset_111=14 + +# Group 112 Configuration +port_power_group_reg.mode_112=config +port_power_group_reg.src_112=logic_file +port_power_group_reg.frmt_112=bit +port_power_group_reg.fpath_112=/dev/fpga2 +port_power_group_reg.addr_112=0x58 +port_power_group_reg.val_len_112=4 +port_power_group_reg.val_pola_112=negative +port_power_group_reg.len_112=1 +port_power_group_reg.bit_offset_112=15 + +# Group 113 Configuration +port_power_group_reg.mode_113=config +port_power_group_reg.src_113=logic_file +port_power_group_reg.frmt_113=bit +port_power_group_reg.fpath_113=/dev/fpga2 +port_power_group_reg.addr_113=0x58 +port_power_group_reg.val_len_113=4 +port_power_group_reg.val_pola_113=negative +port_power_group_reg.len_113=1 +port_power_group_reg.bit_offset_113=16 + +# Group 114 Configuration +port_power_group_reg.mode_114=config +port_power_group_reg.src_114=logic_file +port_power_group_reg.frmt_114=bit +port_power_group_reg.fpath_114=/dev/fpga2 +port_power_group_reg.addr_114=0x58 +port_power_group_reg.val_len_114=4 +port_power_group_reg.val_pola_114=negative +port_power_group_reg.len_114=1 +port_power_group_reg.bit_offset_114=17 + +# Group 115 Configuration +port_power_group_reg.mode_115=config +port_power_group_reg.src_115=logic_file +port_power_group_reg.frmt_115=bit +port_power_group_reg.fpath_115=/dev/fpga2 +port_power_group_reg.addr_115=0x58 +port_power_group_reg.val_len_115=4 +port_power_group_reg.val_pola_115=negative +port_power_group_reg.len_115=1 +port_power_group_reg.bit_offset_115=18 + +# Group 116 Configuration +port_power_group_reg.mode_116=config +port_power_group_reg.src_116=logic_file +port_power_group_reg.frmt_116=bit +port_power_group_reg.fpath_116=/dev/fpga2 +port_power_group_reg.addr_116=0x58 +port_power_group_reg.val_len_116=4 +port_power_group_reg.val_pola_116=negative +port_power_group_reg.len_116=1 +port_power_group_reg.bit_offset_116=19 + +# Group 117 Configuration +port_power_group_reg.mode_117=config +port_power_group_reg.src_117=logic_file +port_power_group_reg.frmt_117=bit +port_power_group_reg.fpath_117=/dev/fpga2 +port_power_group_reg.addr_117=0x58 +port_power_group_reg.val_len_117=4 +port_power_group_reg.val_pola_117=negative +port_power_group_reg.len_117=1 +port_power_group_reg.bit_offset_117=20 + +# Group 118 Configuration +port_power_group_reg.mode_118=config +port_power_group_reg.src_118=logic_file +port_power_group_reg.frmt_118=bit +port_power_group_reg.fpath_118=/dev/fpga2 +port_power_group_reg.addr_118=0x58 +port_power_group_reg.val_len_118=4 +port_power_group_reg.val_pola_118=negative +port_power_group_reg.len_118=1 +port_power_group_reg.bit_offset_118=21 + +# Group 119 Configuration +port_power_group_reg.mode_119=config +port_power_group_reg.src_119=logic_file +port_power_group_reg.frmt_119=bit +port_power_group_reg.fpath_119=/dev/fpga2 +port_power_group_reg.addr_119=0x58 +port_power_group_reg.val_len_119=4 +port_power_group_reg.val_pola_119=negative +port_power_group_reg.len_119=1 +port_power_group_reg.bit_offset_119=22 + +# Group 120 Configuration +port_power_group_reg.mode_120=config +port_power_group_reg.src_120=logic_file +port_power_group_reg.frmt_120=bit +port_power_group_reg.fpath_120=/dev/fpga2 +port_power_group_reg.addr_120=0x58 +port_power_group_reg.val_len_120=4 +port_power_group_reg.val_pola_120=negative +port_power_group_reg.len_120=1 +port_power_group_reg.bit_offset_120=23 + +# Group 121 Configuration +port_power_group_reg.mode_121=config +port_power_group_reg.src_121=logic_file +port_power_group_reg.frmt_121=bit +port_power_group_reg.fpath_121=/dev/fpga2 +port_power_group_reg.addr_121=0x58 +port_power_group_reg.val_len_121=4 +port_power_group_reg.val_pola_121=negative +port_power_group_reg.len_121=1 +port_power_group_reg.bit_offset_121=24 + +# Group 122 Configuration +port_power_group_reg.mode_122=config +port_power_group_reg.src_122=logic_file +port_power_group_reg.frmt_122=bit +port_power_group_reg.fpath_122=/dev/fpga2 +port_power_group_reg.addr_122=0x58 +port_power_group_reg.val_len_122=4 +port_power_group_reg.val_pola_122=negative +port_power_group_reg.len_122=1 +port_power_group_reg.bit_offset_122=25 + +# Group 123 Configuration +port_power_group_reg.mode_123=config +port_power_group_reg.src_123=logic_file +port_power_group_reg.frmt_123=bit +port_power_group_reg.fpath_123=/dev/fpga2 +port_power_group_reg.addr_123=0x58 +port_power_group_reg.val_len_123=4 +port_power_group_reg.val_pola_123=negative +port_power_group_reg.len_123=1 +port_power_group_reg.bit_offset_123=26 + +# Group 124 Configuration +port_power_group_reg.mode_124=config +port_power_group_reg.src_124=logic_file +port_power_group_reg.frmt_124=bit +port_power_group_reg.fpath_124=/dev/fpga2 +port_power_group_reg.addr_124=0x58 +port_power_group_reg.val_len_124=4 +port_power_group_reg.val_pola_124=negative +port_power_group_reg.len_124=1 +port_power_group_reg.bit_offset_124=27 + +# Group 125 Configuration +port_power_group_reg.mode_125=config +port_power_group_reg.src_125=logic_file +port_power_group_reg.frmt_125=bit +port_power_group_reg.fpath_125=/dev/fpga2 +port_power_group_reg.addr_125=0x58 +port_power_group_reg.val_len_125=4 +port_power_group_reg.val_pola_125=negative +port_power_group_reg.len_125=1 +port_power_group_reg.bit_offset_125=28 + +# Group 126 Configuration +port_power_group_reg.mode_126=config +port_power_group_reg.src_126=logic_file +port_power_group_reg.frmt_126=bit +port_power_group_reg.fpath_126=/dev/fpga2 +port_power_group_reg.addr_126=0x58 +port_power_group_reg.val_len_126=4 +port_power_group_reg.val_pola_126=negative +port_power_group_reg.len_126=1 +port_power_group_reg.bit_offset_126=29 + +# Group 127 Configuration +port_power_group_reg.mode_127=config +port_power_group_reg.src_127=logic_file +port_power_group_reg.frmt_127=bit +port_power_group_reg.fpath_127=/dev/fpga2 +port_power_group_reg.addr_127=0x58 +port_power_group_reg.val_len_127=4 +port_power_group_reg.val_pola_127=negative +port_power_group_reg.len_127=1 +port_power_group_reg.bit_offset_127=30 + +# Group 128 Configuration +port_power_group_reg.mode_128=config +port_power_group_reg.src_128=logic_file +port_power_group_reg.frmt_128=bit +port_power_group_reg.fpath_128=/dev/fpga2 +port_power_group_reg.addr_128=0x58 +port_power_group_reg.val_len_128=4 +port_power_group_reg.val_pola_128=negative +port_power_group_reg.len_128=1 +port_power_group_reg.bit_offset_128=31 + +# Group 129 Configuration +port_power_group_reg.mode_129=config +port_power_group_reg.src_129=logic_file +port_power_group_reg.frmt_129=byte +port_power_group_reg.fpath_129=/dev/cpld1 +port_power_group_reg.addr_129=0x5d +port_power_group_reg.len_129=1 +port_power_group_reg.val_type_129=nega_key + +# Group 130 Configuration +port_power_group_reg.mode_130=config +port_power_group_reg.src_130=logic_file +port_power_group_reg.frmt_130=byte +port_power_group_reg.fpath_130=/dev/cpld1 +port_power_group_reg.addr_130=0x5d +port_power_group_reg.len_130=1 +port_power_group_reg.val_type_130=nega_key + +# Configuration item: sff group +# Description: Format sff_power_group_[sff_index] +sff_power_group_1=1 +sff_power_group_2=2 +sff_power_group_3=3 +sff_power_group_4=4 +sff_power_group_5=5 +sff_power_group_6=6 +sff_power_group_7=7 +sff_power_group_8=8 +sff_power_group_9=9 +sff_power_group_10=10 +sff_power_group_11=11 +sff_power_group_12=12 +sff_power_group_13=13 +sff_power_group_14=14 +sff_power_group_15=15 +sff_power_group_16=16 +sff_power_group_17=17 +sff_power_group_18=18 +sff_power_group_19=19 +sff_power_group_20=20 +sff_power_group_21=21 +sff_power_group_22=22 +sff_power_group_23=23 +sff_power_group_24=24 +sff_power_group_25=25 +sff_power_group_26=26 +sff_power_group_27=27 +sff_power_group_28=28 +sff_power_group_29=29 +sff_power_group_30=30 +sff_power_group_31=31 +sff_power_group_32=32 +sff_power_group_33=33 +sff_power_group_34=34 +sff_power_group_35=35 +sff_power_group_36=36 +sff_power_group_37=37 +sff_power_group_38=38 +sff_power_group_39=39 +sff_power_group_40=40 +sff_power_group_41=41 +sff_power_group_42=42 +sff_power_group_43=43 +sff_power_group_44=44 +sff_power_group_45=45 +sff_power_group_46=46 +sff_power_group_47=47 +sff_power_group_48=48 +sff_power_group_49=49 +sff_power_group_50=50 +sff_power_group_51=51 +sff_power_group_52=52 +sff_power_group_53=53 +sff_power_group_54=54 +sff_power_group_55=55 +sff_power_group_56=56 +sff_power_group_57=57 +sff_power_group_58=58 +sff_power_group_59=59 +sff_power_group_60=60 +sff_power_group_61=61 +sff_power_group_62=62 +sff_power_group_63=63 +sff_power_group_64=64 +sff_power_group_65=65 +sff_power_group_66=66 +sff_power_group_67=67 +sff_power_group_68=68 +sff_power_group_69=69 +sff_power_group_70=70 +sff_power_group_71=71 +sff_power_group_72=72 +sff_power_group_73=73 +sff_power_group_74=74 +sff_power_group_75=75 +sff_power_group_76=76 +sff_power_group_77=77 +sff_power_group_78=78 +sff_power_group_79=79 +sff_power_group_80=80 +sff_power_group_81=81 +sff_power_group_82=82 +sff_power_group_83=83 +sff_power_group_84=84 +sff_power_group_85=85 +sff_power_group_86=86 +sff_power_group_87=87 +sff_power_group_88=88 +sff_power_group_89=89 +sff_power_group_90=90 +sff_power_group_91=91 +sff_power_group_92=92 +sff_power_group_93=93 +sff_power_group_94=94 +sff_power_group_95=95 +sff_power_group_96=96 +sff_power_group_97=97 +sff_power_group_98=98 +sff_power_group_99=99 +sff_power_group_100=100 +sff_power_group_101=101 +sff_power_group_102=102 +sff_power_group_103=103 +sff_power_group_104=104 +sff_power_group_105=105 +sff_power_group_106=106 +sff_power_group_107=107 +sff_power_group_108=108 +sff_power_group_109=109 +sff_power_group_110=110 +sff_power_group_111=111 +sff_power_group_112=112 +sff_power_group_113=113 +sff_power_group_114=114 +sff_power_group_115=115 +sff_power_group_116=116 +sff_power_group_117=117 +sff_power_group_118=118 +sff_power_group_119=119 +sff_power_group_120=120 +sff_power_group_121=121 +sff_power_group_122=122 +sff_power_group_123=123 +sff_power_group_124=124 +sff_power_group_125=125 +sff_power_group_126=126 +sff_power_group_127=127 +sff_power_group_128=128 +sff_power_group_129=129 +sff_power_group_130=130 diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/s3ip_sysfs_cfg/cfg_file/WATCHDOG.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/s3ip_sysfs_cfg/cfg_file/WATCHDOG.cfg new file mode 100644 index 00000000000..cdd750beb98 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/s3ip_sysfs_cfg/cfg_file/WATCHDOG.cfg @@ -0,0 +1,20 @@ + +# Configuration item: watchdog number +# Description: Format watchdog_id_[index] +watchdog_id_0=0 + +# Configuration item: watchdog device name +# Description: Format watchdog_name_[index]_[type] +watchdog_name_0_0=identity +watchdog_name_0_1=state +watchdog_name_0_2=timeleft +watchdog_name_0_3=timeout + +# enable +watchdog_dev.mode_0_4=config +watchdog_dev.src_0_4=file +watchdog_dev.frmt_0_4=bit +watchdog_dev.fpath_0_4=/dev/cpld1 +watchdog_dev.addr_0_4=0x40 +watchdog_dev.len_0_4=1 +watchdog_dev.bit_offset_0_4=0 diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/s3ip_sysfs_cfg/file_name/0x414e b/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/s3ip_sysfs_cfg/file_name/0x414e new file mode 100644 index 00000000000..0032cdd9cb4 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/s3ip_sysfs_cfg/file_name/0x414e @@ -0,0 +1,7 @@ +CPLD +FAN +LED +PSU +SENSOR +SFF +FPGA diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/setup.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/setup.py new file mode 100644 index 00000000000..6c3916921ab --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6950-128oc/setup.py @@ -0,0 +1,39 @@ +from setuptools import setup + +setup( + name='sonic-platform', + version='1.0', + description='SONiC platform API implementation', + license='Apache 2.0', + author='SONiC Team', + author_email='support', + url='', + maintainer='support', + maintainer_email='', + packages=[ + 'sonic_platform', + 'plat_hal', + 'wbutil', + 'eepromutil', + 'hal-config', + 'config', + ], + py_modules=[ + 'hal_pltfm', + 'platform_util', + 'platform_intf', + ], + classifiers=[ + 'Development Status :: 3 - Alpha', + 'Environment :: Plugins', + 'Intended Audience :: Developers', + 'Intended Audience :: Information Technology', + 'Intended Audience :: System Administrators', + 'License :: OSI Approved :: Apache Software License', + 'Natural Language :: English', + 'Operating System :: POSIX :: Linux', + 'Programming Language :: Python :: 3.7', + 'Topic :: Utilities', + ], + keywords='sonic SONiC platform PLATFORM', +) diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6951-64hc-cp/Makefile b/platform/broadcom/sonic-platform-modules-micas/m2-w6951-64hc-cp/Makefile new file mode 100644 index 00000000000..d6066a67a9d --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6951-64hc-cp/Makefile @@ -0,0 +1,29 @@ +PWD = $(shell pwd) +DIR_KERNEL_SRC = $(PWD)/modules/driver +EXTRA_CFLAGS:= -I$(M)/include +EXTRA_CFLAGS+= -Wall +SUB_BUILD_DIR = $(PWD)/build +INSTALL_DIR = $(SUB_BUILD_DIR)/$(KERNEL_SRC)/$(INSTALL_MOD_DIR) +INSTALL_SCRIPT_DIR = $(SUB_BUILD_DIR)/usr/local/bin +INSTALL_LIB_DIR = $(SUB_BUILD_DIR)/usr/lib/python3/dist-packages +INSTALL_S3IP_SYSFS_CFG_DIR = $(SUB_BUILD_DIR)/etc/s3ip_sysfs_cfg +INSTALL_S3IP_CONFIG_DIR = $(SUB_BUILD_DIR)/etc/s3ip + +all: + $(MAKE) -C $(KBUILD_OUTPUT) M=$(DIR_KERNEL_SRC) modules + @if [ ! -d ${INSTALL_DIR} ]; then mkdir -p ${INSTALL_DIR} ;fi + cp -r $(DIR_KERNEL_SRC)/*.ko $(INSTALL_DIR) + @if [ ! -d ${INSTALL_SCRIPT_DIR} ]; then mkdir -p ${INSTALL_SCRIPT_DIR} ;fi + cp -r $(PWD)/config/* $(INSTALL_SCRIPT_DIR) + @if [ ! -d ${INSTALL_LIB_DIR} ]; then mkdir -p ${INSTALL_LIB_DIR} ;fi + @if [ -d $(PWD)/hal-config/ ]; then cp -r $(PWD)/hal-config/* ${INSTALL_LIB_DIR} ;fi + @if [ -d $(PWD)/.upgrade_test/ ]; then cp -r $(PWD)/.upgrade_test/* ${INSTALL_UPGRADE_TEST_DIR} ;fi + @if [ ! -d ${INSTALL_S3IP_CONFIG_DIR} ]; then mkdir -p ${INSTALL_S3IP_CONFIG_DIR} ;fi + @if [ -d $(PWD)/s3ip_config/ ]; then cp -r $(PWD)/s3ip_config/* ${INSTALL_S3IP_CONFIG_DIR} ;fi + @if [ ! -d ${INSTALL_S3IP_SYSFS_CFG_DIR} ]; then mkdir -p ${INSTALL_S3IP_SYSFS_CFG_DIR} ;fi + @if [ -d $(PWD)/s3ip_sysfs_cfg/ ]; then cp -r $(PWD)/s3ip_sysfs_cfg/* ${INSTALL_S3IP_SYSFS_CFG_DIR} ;fi +clean: + rm -f ${DIR_KERNEL_SRC}/*.o ${DIR_KERNEL_SRC}/*.ko ${DIR_KERNEL_SRC}/*.mod.c ${DIR_KERNEL_SRC}/.*.cmd ${DIR_KERNEL_SRC}/*.mod + rm -f ${DIR_KERNEL_SRC}/Module.markers ${DIR_KERNEL_SRC}/Module.symvers ${DIR_KERNEL_SRC}/modules.order + rm -rf ${DIR_KERNEL_SRC}/.tmp_versions + rm -rf $(SUB_BUILD_DIR) diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6951-64hc-cp/config/x86_64_micas_m2_w6951_64hc_cp_r0_config.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6951-64hc-cp/config/x86_64_micas_m2_w6951_64hc_cp_r0_config.py new file mode 100644 index 00000000000..811c3a11bc3 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6951-64hc-cp/config/x86_64_micas_m2_w6951_64hc_cp_r0_config.py @@ -0,0 +1,1511 @@ +#!/usr/bin/python3 +# -*- coding: UTF-8 -*- +from platform_common import * + +STARTMODULE = { + "hal_fanctrl": 1, + "hal_ledctrl": 1, + "avscontrol": 1, + "tty_console": 1, + "dev_monitor": 1, + "pmon_syslog": 1, + "sff_temp_polling": 1, + "reboot_cause": 1, + "generate_airflow": 0, +} + +DEV_MONITOR_PARAM = { + "polling_time": 10, + "psus": [ + { + "name": "psu1", + "present": {"gettype": "direct_config", "value": 0, "okval": 0}, + "device": [ + {"id": "psu1pmbus", "name": "wb_fsp1200", "bus": 53, "loc": 0x60, "attr": "hwmon"} + ], + }, + { + "name": "psu2", + "present": {"gettype": "direct_config", "value": 0, "okval": 0}, + "device": [ + {"id": "psu2pmbus", "name": "wb_fsp1200", "bus": 54, "loc": 0x60, "attr": "hwmon"} + ], + }, + { + "name": "psu3", + "present": {"gettype": "direct_config", "value": 0, "okval": 0}, + "device": [ + {"id": "psu3pmbus", "name": "wb_fsp1200", "bus": 55, "loc": 0x60, "attr": "hwmon"} + ], + }, + { + "name": "psu4", + "present": {"gettype": "direct_config", "value": 0, "okval": 0}, + "device": [ + {"id": "psu4pmbus", "name": "wb_fsp1200", "bus": 56, "loc": 0x60, "attr": "hwmon"} + ], + }, + ], + "fans": [ + { + "name": "fan1", + "present": {"gettype": "devfile", "path": "/dev/cpld10", "offset": 0xda, "read_len":1, "presentbit": 0, "okval": 0}, + "device": [ + {"id": "fan1frue2", "name": "wb_24c64", "bus": 59, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "fan2", + "present": {"gettype": "devfile", "path": "/dev/cpld10", "offset": 0xda, "read_len":1, "presentbit": 1, "okval": 0}, + "device": [ + {"id": "fan2frue2", "name": "wb_24c64", "bus": 60, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "fan3", + "present": {"gettype": "devfile", "path": "/dev/cpld10", "offset": 0xda, "read_len":1, "presentbit": 2, "okval": 0}, + "device": [ + {"id": "fan3frue2", "name": "wb_24c64", "bus": 61, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "fan4", + "present": {"gettype": "devfile", "path": "/dev/cpld10", "offset": 0xda, "read_len":1, "presentbit": 3, "okval": 0}, + "device": [ + {"id": "fan4frue2", "name": "wb_24c64", "bus": 62, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "fan5", + "present": {"gettype": "devfile", "path": "/dev/cpld10", "offset": 0xda, "read_len":1, "presentbit": 4, "okval": 0}, + "device": [ + {"id": "fan5frue2", "name": "wb_24c64", "bus": 63, "loc": 0x50, "attr": "eeprom"}, + ], + }, + { + "name": "fan6", + "present": {"gettype": "devfile", "path": "/dev/cpld10", "offset": 0xda, "read_len":1, "presentbit": 5, "okval": 0}, + "device": [ + {"id": "fan6frue2", "name": "wb_24c64", "bus": 64, "loc": 0x50, "attr": "eeprom"}, + ], + }, + ], + "others": [ + { + "name": "eeprom", + "device": [ + {"id": "eeprom_1", "name": "24c02", "bus": 1, "loc": 0x56, "attr": "eeprom"}, + ], + }, + { + "name": "lm75", + "device": [ + {"id": "lm75_1", "name": "lm75", "bus": 65, "loc": 0x4b, "attr": "hwmon"}, + {"id": "lm75_2", "name": "lm75", "bus": 66, "loc": 0x4e, "attr": "hwmon"}, + {"id": "lm75_3", "name": "lm75", "bus": 76, "loc": 0x4b, "attr": "hwmon"}, + {"id": "lm75_4", "name": "lm75", "bus": 77, "loc": 0x4f, "attr": "hwmon"}, + {"id": "lm75_5", "name": "lm75", "bus": 111, "loc": 0x4b, "attr": "hwmon"}, + {"id": "lm75_6", "name": "lm75", "bus": 112, "loc": 0x4f, "attr": "hwmon"}, + ], + }, + { + "name":"ct7318", + "device":[ + {"id":"ct7318_1", "name":"ct7318","bus":78, "loc":0x4c, "attr":"hwmon"}, + {"id":"ct7318_2", "name":"ct7318","bus":79, "loc":0x4c, "attr":"hwmon"}, + {"id":"ct7318_3", "name":"ct7318","bus":80, "loc":0x4c, "attr":"hwmon"}, + ], + }, + { + "name": "ucd90160", + "device": [ + {"id": "ucd90160_1", "name": "ucd90160", "bus": 69, "loc": 0x5b, "attr": "hwmon"}, + {"id": "ucd90160_2", "name": "ucd90160", "bus": 70, "loc": 0x5f, "attr": "hwmon"}, + {"id": "ucd90160_3", "name": "ucd90160", "bus": 83, "loc": 0x5b, "attr": "hwmon"}, + {"id": "ucd90160_4", "name": "ucd90160", "bus": 84, "loc": 0x5b, "attr": "hwmon"}, + {"id": "ucd90160_5", "name": "ucd90160", "bus": 73, "loc": 0x68, "attr": "hwmon"}, + ], + }, + { + "name": "ads7828", + "device": [ + {"id": "ads7828_1", "name": "ads7828", "bus": 97, "loc": 0x48, "attr": "hwmon"}, + {"id": "ads7828_2", "name": "ads7828", "bus": 97, "loc": 0x4A, "attr": "hwmon"}, + {"id": "ads7828_3", "name": "ads7828", "bus": 13, "loc": 0x48, "attr": "hwmon"}, + {"id": "ads7828_4", "name": "ads7828", "bus": 14, "loc": 0x48, "attr": "hwmon"}, + ], + }, + { + "name": "ina3221", + "device": [ + {"id": "ina3221_1", "name": "ina3221", "bus": 98, "loc": 0x40, "attr": "hwmon"}, + ], + }, + { + "name": "isl68137", + "device": [ + {"id": "raa228228", "name": "isl68137", "bus": 85, "loc": 0x60, "attr": "hwmon"}, + {"id": "raa228228_1", "name": "isl68137", "bus": 70, "loc": 0x72, "attr": "hwmon"}, + {"id": "raa228228_2", "name": "isl68137", "bus": 70, "loc": 0x74, "attr": "hwmon"}, + {"id": "isl69260_1", "name": "isl68137", "bus": 85, "loc": 0x62, "attr": "hwmon"}, + {"id": "isl69260_2", "name": "isl68137", "bus": 85, "loc": 0x74, "attr": "hwmon"}, + {"id": "isl69260_3", "name": "isl68137", "bus": 87, "loc": 0x60, "attr": "hwmon"}, + {"id": "isl69260_4", "name": "isl68137", "bus": 87, "loc": 0x62, "attr": "hwmon"}, + {"id": "isl69260_5", "name": "isl68137", "bus": 87, "loc": 0x74, "attr": "hwmon"}, + {"id": "isl69260_6", "name": "isl68137", "bus": 89, "loc": 0x74, "attr": "hwmon"}, + {"id": "isl69260_7", "name": "isl68137", "bus": 89, "loc": 0x60, "attr": "hwmon"}, + {"id": "isl69260_8", "name": "isl68137", "bus": 90, "loc": 0x60, "attr": "hwmon"}, + {"id": "isl69260_9", "name": "isl68137", "bus": 91, "loc": 0x62, "attr": "hwmon"}, + {"id": "isl69260_10", "name": "isl68137", "bus": 91, "loc": 0x60, "attr": "hwmon"}, + {"id": "isl69260_11", "name": "isl68137", "bus": 92, "loc": 0x60, "attr": "hwmon"}, + {"id": "isl69260_12", "name": "isl68137", "bus": 92, "loc": 0x62, "attr": "hwmon"}, + {"id": "isl69260_13", "name": "isl68137", "bus": 95, "loc": 0x60, "attr": "hwmon"}, + ], + }, + ], +} + +MANUINFO_CONF = { #tocheck + "bios": { + "key": "BIOS", + "head": True, + "next": "onie" + }, + "bios_vendor": { + "parent": "bios", + "key": "Vendor", + "cmd": "dmidecode -t 0 |grep Vendor", + "pattern": r".*Vendor", + "separator": ":", + "arrt_index": 1, + }, + "bios_version": { + "parent": "bios", + "key": "Version", + "cmd": "dmidecode -t 0 |grep Version", + "pattern": r".*Version", + "separator": ":", + "arrt_index": 2, + }, + "bios_date": { + "parent": "bios", + "key": "Release Date", + "cmd": "dmidecode -t 0 |grep Release", + "pattern": r".*Release Date", + "separator": ":", + "arrt_index": 3, + }, + "onie": { + "key": "ONIE", + "next": "cpu" + }, + "onie_date": { + "parent": "onie", + "key": "Build Date", + "file": "/host/machine.conf", + "pattern": r"^onie_build_date", + "separator": "=", + "arrt_index": 1, + }, + "onie_version": { + "parent": "onie", + "key": "Version", + "file": "/host/machine.conf", + "pattern": r"^onie_version", + "separator": "=", + "arrt_index": 2, + }, + + "cpu": { + "key": "CPU", + "next": "ssd" + }, + "cpu_vendor": { + "parent": "cpu", + "key": "Vendor", + "cmd": "dmidecode --type processor |grep Manufacturer", + "pattern": r".*Manufacturer", + "separator": ":", + "arrt_index": 1, + }, + "cpu_model": { + "parent": "cpu", + "key": "Device Model", + "cmd": "dmidecode --type processor | grep Version", + "pattern": r".*Version", + "separator": ":", + "arrt_index": 2, + }, + "cpu_core": { + "parent": "cpu", + "key": "Core Count", + "cmd": "dmidecode --type processor | grep \"Core Count\"", + "pattern": r".*Core Count", + "separator": ":", + "arrt_index": 3, + }, + "cpu_thread": { + "parent": "cpu", + "key": "Thread Count", + "cmd": "dmidecode --type processor | grep \"Thread Count\"", + "pattern": r".*Thread Count", + "separator": ":", + "arrt_index": 4, + }, + "ssd": { + "key": "SSD", + "next": "cpld" + }, + "ssd_model": { + "parent": "ssd", + "key": "Device Model", + "cmd": "smartctl -i /dev/sda |grep \"Device Model\"", + "pattern": r".*Device Model", + "separator": ":", + "arrt_index": 1, + }, + "ssd_fw": { + "parent": "ssd", + "key": "Firmware Version", + "cmd": "smartctl -i /dev/sda |grep \"Firmware Version\"", + "pattern": r".*Firmware Version", + "separator": ":", + "arrt_index": 2, + }, + "ssd_user_cap": { + "parent": "ssd", + "key": "User Capacity", + "cmd": "smartctl -i /dev/sda |grep \"User Capacity\"", + "pattern": r".*User Capacity", + "separator": ":", + "arrt_index": 3, + }, + + "cpld": { + "key": "CPLD", + "next": "psu" + }, + + "cpld1": { + "key": "CPLD1", + "parent": "cpld", + "arrt_index": 1, + }, + "cpld1_model": { + "key": "Device Model", + "parent": "cpld1", + "config": "LCMXO3LF-2100C-5BG256C", + "arrt_index": 1, + }, + "cpld1_vender": { + "key": "Vendor", + "parent": "cpld1", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld1_desc": { + "key": "Description", + "parent": "cpld1", + "config": "CPU_CPLD", + "arrt_index": 3, + }, + "cpld1_version": { + "key": "Firmware Version", + "parent": "cpld1", + "devfile": { + "loc": "/dev/cpld0", + "offset":0, + "len":4, + "bit_width":1 + }, + "arrt_index": 4, + }, + "cpld2": { + "key": "CPLD2", + "parent": "cpld", + "arrt_index": 2, + }, + "cpld2_model": { + "key": "Device Model", + "parent": "cpld2", + "config": "LCMXO3LF-4300C-6BG324I", + "arrt_index": 1, + }, + "cpld2_vender": { + "key": "Vendor", + "parent": "cpld2", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld2_desc": { + "key": "Description", + "parent": "cpld2", + "config": "BASE_CPLD", + "arrt_index": 3, + }, + "cpld2_version": { + "key": "Firmware Version", + "parent": "cpld2", + "devfile": { + "loc": "/dev/cpld1", + "offset":0, + "len":4, + "bit_width":1 + }, + "arrt_index": 4, + }, + + "cpld3": { + "key": "CPLD3", + "parent": "cpld", + "arrt_index": 3, + }, + "cpld3_model": { + "key": "Device Model", + "parent": "cpld3", + "config": "LCMXO3LF-4300C-6BG324I", + "arrt_index": 1, + }, + "cpld3_vender": { + "key": "Vendor", + "parent": "cpld3", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld3_desc": { + "key": "Description", + "parent": "cpld3", + "config": "MAC_CPLDA", + "arrt_index": 3, + }, + "cpld3_version": { + "key": "Firmware Version", + "parent": "cpld3", + "devfile": { + "loc": "/dev/cpld6", + "offset":0, + "len":4, + "bit_width":1 + }, + "arrt_index": 4, + }, + + "cpld4": { + "key": "CPLD4", + "parent": "cpld", + "arrt_index": 4, + }, + "cpld4_model": { + "key": "Device Model", + "parent": "cpld4", + "config": "LCMXO3LF-4300C-6BG324I", + "arrt_index": 1, + }, + "cpld4_vender": { + "key": "Vendor", + "parent": "cpld4", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld4_desc": { + "key": "Description", + "parent": "cpld4", + "config": "MAC_CPLDB", + "arrt_index": 3, + }, + "cpld4_version": { + "key": "Firmware Version", + "parent": "cpld4", + "devfile": { + "loc": "/dev/cpld7", + "offset":0, + "len":4, + "bit_width":1 + }, + "arrt_index": 4, + }, + + "cpld5": { + "key": "CPLD5", + "parent": "cpld", + "arrt_index": 5, + }, + "cpld5_model": { + "key": "Device Model", + "parent": "cpld5", + "config": "LCMXO3LF-4300C-6BG324I", + "arrt_index": 1, + }, + "cpld5_vender": { + "key": "Vendor", + "parent": "cpld5", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld5_desc": { + "key": "Description", + "parent": "cpld5", + "config": "IO_CPLD", + "arrt_index": 3, + }, + "cpld5_version": { + "key": "Firmware Version", + "parent": "cpld5", + "devfile": { + "loc": "/dev/cpld8", + "offset":0, + "len":4, + "bit_width":1 + }, + "arrt_index": 4, + }, + + "cpld6": { + "key": "CPLD6", + "parent": "cpld", + "arrt_index": 6, + }, + "cpld6_model": { + "key": "Device Model", + "parent": "cpld6", + "config": "LCMXO3LF-2100C-5BG256C", + "arrt_index": 1, + }, + "cpld6_vender": { + "key": "Vendor", + "parent": "cpld6", + "config": "LATTICE", + "arrt_index": 2, + }, + "cpld6_desc": { + "key": "Description", + "parent": "cpld6", + "config": "FAN_CPLD", + "arrt_index": 3, + }, + "cpld6_version": { + "key": "Firmware Version", + "parent": "cpld6", + "devfile": { + "loc": "/dev/cpld10", + "offset":0, + "len":4, + "bit_width":1 + }, + "arrt_index": 4, + }, + + "psu": { + "key": "PSU", + "next": "fan" + }, + + "psu1": { + "parent": "psu", + "key": "PSU1", + "arrt_index": 1, + }, + "psu1_hw_version": { + "key": "Hardware Version", + "parent": "psu1", + "extra": { + "funcname": "getPsu", + "id": "psu1", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "psu1_fw_version": { + "key": "Firmware Version", + "parent": "psu1", + "config": "NA", + "arrt_index": 2, + }, + + "psu2": { + "parent": "psu", + "key": "PSU2", + "arrt_index": 2, + }, + "psu2_hw_version": { + "key": "Hardware Version", + "parent": "psu2", + "extra": { + "funcname": "getPsu", + "id": "psu2", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "psu2_fw_version": { + "key": "Firmware Version", + "parent": "psu2", + "config": "NA", + "arrt_index": 2, + }, + + "fan": { + "key": "FAN", + "next": "i210" + }, + "fan1": { + "key": "FAN1", + "parent": "fan", + "arrt_index": 1, + }, + "fan1_hw_version": { + "key": "Hardware Version", + "parent": "fan1", + "extra": { + "funcname": "checkFan", + "id": "fan1", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan1_fw_version": { + "key": "Firmware Version", + "parent": "fan1", + "config": "NA", + "arrt_index": 2, + }, + + "fan2": { + "key": "FAN2", + "parent": "fan", + "arrt_index": 2, + }, + "fan2_hw_version": { + "key": "Hardware Version", + "parent": "fan2", + "extra": { + "funcname": "checkFan", + "id": "fan2", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan2_fw_version": { + "key": "Firmware Version", + "parent": "fan2", + "config": "NA", + "arrt_index": 2, + }, + + "fan3": { + "key": "FAN3", + "parent": "fan", + "arrt_index": 3, + }, + "fan3_hw_version": { + "key": "Hardware Version", + "parent": "fan3", + "extra": { + "funcname": "checkFan", + "id": "fan3", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan3_fw_version": { + "key": "Firmware Version", + "parent": "fan3", + "config": "NA", + "arrt_index": 2, + }, + + "fan4": { + "key": "FAN4", + "parent": "fan", + "arrt_index": 4, + }, + "fan4_hw_version": { + "key": "Hardware Version", + "parent": "fan4", + "extra": { + "funcname": "checkFan", + "id": "fan4", + "key": "hw_version" + }, + "arrt_index": 1, + }, + "fan4_fw_version": { + "key": "Firmware Version", + "parent": "fan4", + "config": "NA", + "arrt_index": 2, + }, + + "e610": { + "key": "NIC", + "next": "fpga" + }, + "i210_model": { + "parent": "e610", + "config": "NA", + "key": "Device Model", + "arrt_index": 1, + }, + "i210_vendor": { + "parent": "e610", + "config": "INTEL", + "key": "Vendor", + "arrt_index": 2, + }, + "i210_version": { + "parent": "e610", + "cmd": "ethtool -i eth0", + "pattern": r"firmware-version", + "separator": ":", + "key": "Firmware Version", + "arrt_index": 3, + }, + + "fpga": { + "key": "FPGA", + "next": "others" + }, + + "fpga1": { + "key": "FPGA1", + "parent": "fpga", + "arrt_index": 1, + }, + "fpga1_model": { + "parent": "fpga1", + "devfile": { + "loc": "/dev/fpga0", + "offset":0x10, + "len":4, + "bit_width":4 + }, + "decode": { + "00000050": "XC7A50T_2FGG484C", + "00000100": "XC7A100T_2FGG484C" + }, + "key": "Device Model", + "arrt_index": 1, + }, + "fpga1_vender": { + "parent": "fpga1", + "config": "XILINX", + "key": "Vendor", + "arrt_index": 2, + }, + "fpga1_desc": { + "key": "Description", + "parent": "fpga1", + "config": "MAC_FPGA", + "arrt_index": 3, + }, + "fpga1_hw_version": { + "parent": "fpga1", + "config": "NA", + "key": "Hardware Version", + "arrt_index": 4, + }, + "fpga1_fw_version": { + "parent": "fpga1", + "devfile": { + "loc": "/dev/fpga0", + "offset":0, + "len":4, + "bit_width":4 + }, + "key": "Firmware Version", + "arrt_index": 5, + }, + "fpga1_date": { + "parent": "fpga1", + "devfile": { + "loc": "/dev/fpga0", + "offset":4, + "len":4, + "bit_width":4 + }, + "key": "Build Date", + "arrt_index": 6, + }, + + "fpga2": { + "key": "FPGA2", + "parent": "fpga", + "arrt_index": 2, + }, + "fpga2_model": { + "parent": "fpga2", + "devfile": { + "loc": "/dev/fpga1", + "offset":0x10, + "len":4, + "bit_width":4 + }, + "decode": { + "00000050": "XC7A50T_2FGG484C", + "00000100": "XC7A100T_2FGG484C" + }, + "key": "Device Model", + "arrt_index": 2, + }, + "fpga2_vender": { + "parent": "fpga2", + "config": "XILINX", + "key": "Vendor", + "arrt_index": 2, + }, + "fpga2_desc": { + "key": "Description", + "parent": "fpga2", + "config": "IO_FPGA", + "arrt_index": 3, + }, + "fpga2_hw_version": { + "parent": "fpga2", + "config": "NA", + "key": "Hardware Version", + "arrt_index": 4, + }, + "fpga2_fw_version": { + "parent": "fpga2", + "devfile": { + "loc": "/dev/fpga1", + "offset":0, + "len":4, + "bit_width":4 + }, + "key": "Firmware Version", + "arrt_index": 5, + }, + "fpga2_date": { + "parent": "fpga2", + "devfile": { + "loc": "/dev/fpga1", + "offset":4, + "len":4, + "bit_width":4 + }, + "key": "Build Date", + "arrt_index": 6, + }, + + "others": { + "key": "OTHERS", + }, + "53134": { + "parent": "others", + "key": "CPU-BMC-SWITCH", + "arrt_index": 1, + }, + "53134_model": { + "parent": "53134", + "config": "BCM53134O", + "key": "Device Model", + "arrt_index": 1, + }, + "53134_vendor": { + "parent": "53134", + "config": "Broadcom", + "key": "Vendor", + "arrt_index": 2, + }, + "53134_hw_version": { + "parent": "53134", + "key": "Hardware Version", + "func": { + "funcname": "get_bcm5387_version", + "params": { + "before": [ + # OE high + {"gettype": "cmd", "cmd": "echo 10051 > /sys/class/gpio/export"}, + {"gettype": "cmd", "cmd": "echo high > /sys/class/gpio/gpio10051/direction"}, + # SEL1 high + {"gettype": "cmd", "cmd": "echo 10052 > /sys/class/gpio/export"}, + {"gettype": "cmd", "cmd": "echo high > /sys/class/gpio/gpio10052/direction"}, + #enable 53134 update + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xe9, "value": 0x16}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xe1, "value": 0x01}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xe2, "value": 0x05}, + {"gettype": "cmd", "cmd": "modprobe wb_spi_gpio"}, + {"gettype": "cmd", "cmd": "modprobe wb_spi_gpio_device sck=55 mosi=54 miso=52 cs=53 bus=0 gpio_chip_name=INTC3001:00"}, + {"gettype": "cmd", "cmd": "modprobe wb_spi_93xx46"}, + ], + "get_version": "md5sum /sys/bus/spi/devices/spi0.0/eeprom | awk '{print $1}'", + "after": [ + {"gettype": "cmd", "cmd": "echo 0 > /sys/class/gpio/gpio10052/value"}, + {"gettype": "cmd", "cmd": "echo 10052 > /sys/class/gpio/unexport"}, + {"gettype": "cmd", "cmd": "echo 0 > /sys/class/gpio/gpio10051/value"}, + {"gettype": "cmd", "cmd": "echo 10051 > /sys/class/gpio/unexport"}, + ], + "finally": [ + {"gettype": "cmd", "cmd": "rmmod wb_spi_93xx46"}, + {"gettype": "cmd", "cmd": "rmmod wb_spi_gpio_device"}, + {"gettype": "cmd", "cmd": "rmmod wb_spi_gpio"}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xe2, "value": 0x00}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xe1, "value": 0x00}, + {"gettype": "devfile", "path": "/dev/cpld1", "offset": 0xe9, "value": 0x17}, + ], + }, + }, + "arrt_index": 3, + }, +} + +PMON_SYSLOG_STATUS = { + "polling_time": 3, + "sffs": { + "present": {"path": ["/sys/s3ip/transceiver/*/present"], "ABSENT": 0}, + "nochangedmsgflag": 0, + "nochangedmsgtime": 60, + "noprintfirsttimeflag": 1, + "alias": { + "sff1": "Ethernet1", + "sff2": "Ethernet2", + "sff3": "Ethernet3", + "sff4": "Ethernet4", + "sff5": "Ethernet5", + "sff6": "Ethernet6", + "sff7": "Ethernet7", + "sff8": "Ethernet8", + "sff9": "Ethernet9", + "sff10": "Ethernet10", + "sff11": "Ethernet11", + "sff12": "Ethernet12", + "sff13": "Ethernet13", + "sff14": "Ethernet14", + "sff15": "Ethernet15", + "sff16": "Ethernet16", + "sff17": "Ethernet17", + "sff18": "Ethernet18", + "sff19": "Ethernet19", + "sff20": "Ethernet20", + "sff21": "Ethernet21", + "sff22": "Ethernet22", + "sff23": "Ethernet23", + "sff24": "Ethernet24", + "sff25": "Ethernet25", + "sff26": "Ethernet26", + "sff27": "Ethernet27", + "sff28": "Ethernet28", + "sff29": "Ethernet29", + "sff30": "Ethernet30", + "sff31": "Ethernet31", + "sff32": "Ethernet32", + "sff33": "Ethernet33", + "sff34": "Ethernet34", + "sff35": "Ethernet35", + "sff36": "Ethernet36", + "sff37": "Ethernet37", + "sff38": "Ethernet38", + "sff39": "Ethernet39", + "sff40": "Ethernet40", + "sff41": "Ethernet41", + "sff42": "Ethernet42", + "sff43": "Ethernet43", + "sff44": "Ethernet44", + "sff45": "Ethernet45", + "sff46": "Ethernet46", + "sff47": "Ethernet47", + "sff48": "Ethernet48", + "sff49": "Ethernet49", + "sff50": "Ethernet50", + "sff51": "Ethernet51", + "sff52": "Ethernet52", + "sff53": "Ethernet53", + "sff54": "Ethernet54", + "sff55": "Ethernet55", + "sff56": "Ethernet56", + "sff57": "Ethernet57", + "sff58": "Ethernet58", + "sff59": "Ethernet59", + "sff60": "Ethernet60", + "sff61": "Ethernet61", + "sff62": "Ethernet62", + "sff63": "Ethernet63", + "sff64": "Ethernet64", + "sff65": "Ethernet65", + "sff66": "Ethernet66", + } + }, + "fans": { + "present": {"path": ["/sys/s3ip/fan/*/present"], "ABSENT": 0}, + "status": [ + {"path": "/sys/s3ip/fan/%s/status", 'okval': 1}, + ], + "nochangedmsgflag": 1, + "nochangedmsgtime": 60, + "noprintfirsttimeflag": 0, + "alias": { + "fan1": "FAN1", + "fan2": "FAN2", + "fan3": "FAN3", + "fan4": "FAN4", + "fan5": "FAN5", + "fan6": "FAN6" + } + }, + "psus": { + "present": {"path": ["/sys/s3ip/psu/*/present"], "ABSENT": 0}, + "status": [ + {"path": "/sys/s3ip/psu/%s/out_status", "okval":1}, + ], + "nochangedmsgflag": 1, + "nochangedmsgtime": 60, + "noprintfirsttimeflag": 0, + "alias": { + "psu1": "PSU1", + "psu2": "PSU2", + "psu3": "PSU3", + "psu4": "PSU4" + } + } +} + +REBOOT_CAUSE_PARA = { + "reboot_cause_list": [ + { + "name": "cold_reboot", + "monitor_point": {"gettype":"devfile", "path":"/dev/cpld1", "offset":0x3a, "read_len":1, "okval":0x01}, + "record": [ + {"record_type": "file", "mode": "cover", "log": "Power Loss, ", "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"}, + {"record_type": "file", "mode": "add", "log": "Power Loss, ", "path": "/etc/sonic/.reboot/.history-reboot-cause.txt"} + ] + }, + { + "name": "wdt_reboot", + "monitor_point": {"gettype":"devfile", "path":"/dev/cpld1", "offset":0x3a, "read_len":1, "okval":0x07}, + "record": [ + {"record_type": "file", "mode": "cover", "log": "Watchdog, ", "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"}, + {"record_type": "file", "mode": "add", "log": "Watchdog, ", "path": "/etc/sonic/.reboot/.history-reboot-cause.txt"} + ], + }, + { + "name": "bmc_reboot", + "monitor_point": {"gettype":"devfile", "path":"/dev/cpld1", "offset":0x3a, "read_len":1, "okval":0x08}, + "record": [ + {"record_type": "file", "mode": "cover", "log": "BMC reboot, ", "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"}, + {"record_type": "file", "mode": "add", "log": "BMC reboot, ", "path": "/etc/sonic/.reboot/.history-reboot-cause.txt"} + ], + }, + { + "name": "cpu_reboot", + "monitor_point": {"gettype":"devfile", "path":"/dev/cpld1", "offset":0x3a, "read_len":1, "okval":0x06}, + "record": [ + {"record_type":"file", "mode":"cover", "log":"CPU reboot, ", "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"}, + {"record_type": "file", "mode": "add", "log": "CPU reboot, ", "path": "/etc/sonic/.reboot/.history-reboot-cause.txt"} + ], + }, + { + "name": "bmc_powerdown", + "monitor_point": {"gettype":"devfile", "path":"/dev/cpld1", "offset":0x3a, "read_len":1, "okval":[0x04, 0x02, 0x09]}, + "record": [ + {"record_type": "file", "mode": "cover", "log": "BMC powerdown, ", "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"}, + {"record_type": "file", "mode": "add", "log": "BMC powerdown, ", "path": "/etc/sonic/.reboot/.history-reboot-cause.txt"} + ], + }, + { + "name": "otp_switch_reboot", + "monitor_point": {"gettype": "file_exist", "judge_file": "/etc/.otp_switch_reboot_flag", "okval": True}, + "record": [ + {"record_type": "file", "mode": "cover", "log": "Thermal Overload: ASIC, ", "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"}, + {"record_type": "file", "mode": "add", "log": "Thermal Overload: ASIC, ", "path": "/etc/sonic/.reboot/.history-reboot-cause.txt"} + ], + "finish_operation": [ + {"gettype": "cmd", "cmd": "rm -rf /etc/.otp_switch_reboot_flag"}, + ] + }, + { + "name": "otp_other_reboot", + "monitor_point": {"gettype": "file_exist", "judge_file": "/etc/.otp_other_reboot_flag", "okval": True}, + "record": [ + {"record_type": "file", "mode": "cover", "log": "Thermal Overload: Other, ", "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"}, + {"record_type": "file", "mode": "add", "log": "Thermal Overload: Other, ", "path": "/etc/sonic/.reboot/.history-reboot-cause.txt"} + ], + "finish_operation": [ + {"gettype": "cmd", "cmd": "rm -rf /etc/.otp_other_reboot_flag"}, + ] + }, + ], + "other_reboot_cause_record": [ + {"record_type": "file", "mode": "cover", "log": "Other, ", "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"}, + {"record_type": "file", "mode": "add", "log": "Other, ", "path": "/etc/sonic/.reboot/.history-reboot-cause.txt"} + ], +} + +##################### MAC Voltage adjust#################################### +MAC_DEFAULT_PARAM = [ + { + "name": "MAC_CORE_V", # AVS name + "type": 0, # 1: used default value, if rov value not in range. 0: do nothing, if rov value not in range + "default": 0x8a, # default value, if rov value not in range + "rov_source": 0, # 0: get rov value from cpld, 1: get rov value from SDK + "cpld_avs": {"path": "/sys/bus/i2c/devices/75-0044/hwmon/hwmon*/avs1", "gettype": "sysfs"}, + "set_avs": { + "loc": "/sys/bus/i2c/devices/85-0060/hwmon/hwmon*/avs0_vout", "gettype": "sysfs", "formula": "int((%f)*1000000)"}, + "mac_avs_param": { + 0x8c: 0.7375, + 0x8a: 0.75, + 0x88: 0.7625, + 0x86: 0.775, + 0x84: 0.7875, + 0x82: 0.8, + 0x80: 0.8125, + 0x7f: 0.825 + } + }, + { + "name": "MAC_PT0_VDDC_V", # AVS name + "type": 1, # 1: used default value, if rov value not in range. 0: do nothing, if rov value not in range + "default" : 0x8e, + "rov_source": 0, # 0: get rov value from cpld, 1: get rov value from SDK + # bsc unsupport, use default value 725000 + "cpld_avs": {"loc": "/sys/bus/i2c/devices/75-0044/hwmon/hwmon*/avs2", "gettype": "sysfs"}, + "set_avs": { + "loc": "/sys/bus/i2c/devices/87-0060/hwmon/hwmon*/avs0_vout", + "gettype": "sysfs", "formula": "int((%f)*1000000)" + }, + "mac_avs_param": { + 0x8e : 0.725, + }, + }, + { + "name": "MAC_PT1_VDDC_V", # AVS name + "type": 1, # 1: used default value, if rov value not in range. 0: do nothing, if rov value not in range + "default" : 0x8e, + "rov_source": 0, # 0: get rov value from cpld, 1: get rov value from SDK + # bsc unsupport, use default value 725000 + "cpld_avs": {"loc": "/sys/bus/i2c/devices/75-0044/hwmon/hwmon*/avs3", "gettype": "sysfs"}, + "set_avs": { + "loc": "/sys/bus/i2c/devices/87-0060/hwmon/hwmon*/avs1_vout", + "gettype": "sysfs", "formula": "int((%f)*1000000)" + }, + "mac_avs_param": { + 0x8e : 0.725, + }, + }, + { + "name": "MAC_PT2_VDDC_V", # AVS name + "type": 1, # 1: used default value, if rov value not in range. 0: do nothing, if rov value not in range + "default" : 0x8e, + "rov_source": 0, # 0: get rov value from cpld, 1: get rov value from SDK + # bsc unsupport, use default value 725000 + "cpld_avs": {"loc": "/sys/bus/i2c/devices/75-0044/hwmon/hwmon*/avs4", "gettype": "sysfs"}, + "set_avs": { + "loc": "/sys/bus/i2c/devices/89-0060/hwmon/hwmon*/avs0_vout", + "gettype": "sysfs", "formula": "int((%f)*1000000)" + }, + "mac_avs_param": { + 0x8e : 0.725, + }, + }, + { + "name": "MAC_PT3_VDDC_V", # AVS name + "type": 1, # 1: used default value, if rov value not in range. 0: do nothing, if rov value not in range + "default" : 0x8e, + "rov_source": 0, # 0: get rov value from cpld, 1: get rov value from SDK + # bsc unsupport, use default value 725000 + "cpld_avs": {"loc": "/sys/bus/i2c/devices/75-0044/hwmon/hwmon*/avs5", "gettype": "sysfs"}, + "set_avs": { + "loc": "/sys/bus/i2c/devices/89-0060/hwmon/hwmon*/avs1_vout", + "gettype": "sysfs", "formula": "int((%f)*1000000)" + }, + "mac_avs_param": { + 0x8e : 0.725, + }, + }, + { + "name": "MAC_PT4_VDDC_V", # AVS name + "type": 1, # 1: used default value, if rov value not in range. 0: do nothing, if rov value not in range + "default" : 0x8e, + "rov_source": 0, # 0: get rov value from cpld, 1: get rov value from SDK + # bsc unsupport, use default value 725000 + "cpld_avs": {"loc": "/sys/bus/i2c/devices/75-0044/hwmon/hwmon*/avs6", "gettype": "sysfs"}, + "set_avs": { + "loc": "/sys/bus/i2c/devices/90-0060/hwmon/hwmon*/avs0_vout", + "gettype": "sysfs", "formula": "int((%f)*1000000)" + }, + "mac_avs_param": { + 0x8e : 0.725, + }, + }, + { + "name": "MAC_PT5_VDDC_V", # AVS name + "type": 1, # 1: used default value, if rov value not in range. 0: do nothing, if rov value not in range + "default" : 0x8e, + "rov_source": 0, # 0: get rov value from cpld, 1: get rov value from SDK + # bsc unsupport, use default value 725000 + "cpld_avs": {"loc": "/sys/bus/i2c/devices/75-0044/hwmon/hwmon*/avs7", "gettype": "sysfs"}, + "set_avs": { + "loc": "/sys/bus/i2c/devices/90-0060/hwmon/hwmon*/avs1_vout", + "gettype": "sysfs", "formula": "int((%f)*1000000)" + }, + "mac_avs_param": { + 0x8e : 0.725, + }, + }, + { + "name": "MAC_PT6_VDDC_V", # AVS name + "type": 1, # 1: used default value, if rov value not in range. 0: do nothing, if rov value not in range + "default" : 0x8e, + "rov_source": 0, # 0: get rov value from cpld, 1: get rov value from SDK + # bsc unsupport, use default value 725000 + "cpld_avs": {"loc": "/sys/bus/i2c/devices/75-0044/hwmon/hwmon*/avs8", "gettype": "sysfs"}, + "set_avs": { + "loc": "/sys/bus/i2c/devices/95-0060/hwmon/hwmon*/avs0_vout", + "gettype": "sysfs", "formula": "int((%f)*1000000)" + }, + "mac_avs_param": { + 0x8e : 0.725, + }, + }, + { + "name": "MAC_PT7_VDDC_V", # AVS name + "type": 1, # 1: used default value, if rov value not in range. 0: do nothing, if rov value not in range + "default" : 0x8e, + "rov_source": 0, # 0: get rov value from cpld, 1: get rov value from SDK + # bsc unsupport, use default value 725000 + "cpld_avs": {"loc": "/sys/bus/i2c/devices/75-0044/hwmon/hwmon*/avs9", "gettype": "sysfs"}, + "set_avs": { + "loc": "/sys/bus/i2c/devices/95-0060/hwmon/hwmon*/avs1_vout", + "gettype": "sysfs", "formula": "int((%f)*1000000)" + }, + "mac_avs_param": { + 0x8e : 0.725, + }, + }, +] + +DRIVERLISTS = [ + {"name": "wb_ixgbe", "delay": 0, "removable": 0}, + {"name": "ice", "delay": 0, "removable": 0}, + {"name": "ads7828", "delay": 0}, + {"name": "i2c_dev", "delay": 0}, + {"name": "wb_i2c_designware_core", "delay": 0}, #temp, driver has not moved + {"name": "wb_i2c_designware_platform sda_fall_ns=320 scl_fall_ns=1006 bus_freq_hz=100000", "delay": 0}, #temp, driver has not moved + {"name": "i2c_algo_bit", "delay": 0}, + {"name": "i2c_gpio", "delay": 0}, + {"name": "i2c_mux", "delay": 0}, + {"name": "wb_i2c_gpio_device gpio_sda=116 gpio_scl=115 gpio_chip_name=AMDI0030:00 bus_num=21", "delay": 0}, + {"name": "platform_common dfd_my_type=0x414c", "delay": 0}, + {"name": "wb_logic_dev_common", "delay":0}, + {"name": "wb_fpga_pcie", "delay": 0}, + {"name": "wb_pcie_dev", "delay": 0}, + {"name": "wb_pcie_dev_device", "delay": 0}, + #{"name": "wb_io_dev", "delay": 0}, + #{"name": "wb_io_dev_device", "delay": 0}, + {"name": "wb_i2c_dev", "delay": 0}, + {"name": "wb_spi_dev", "delay": 0}, + {"name": "wb_spi_ocores", "delay": 0}, + {"name": "wb_spi_ocores_device", "delay": 0}, + {"name": "wb_spi_dev_device", "delay": 0}, + {"name": "wb_indirect_dev", "delay": 0}, + {"name": "wb_indirect_dev_device", "delay": 0}, + {"name": "wb_fpga_i2c_bus_drv", "delay": 0}, + {"name": "wb_fpga_i2c_bus_device", "delay": 0}, + {"name": "wb_i2c_mux_pca954x", "delay": 0}, + {"name": "wb_i2c_mux_pca954x_device", "delay": 0}, + {"name": "wb_fpga_pca954x_drv", "delay": 0}, + {"name": "wb_fpga_pca954x_device", "delay": 0}, + {"name": "wb_i2c_dev_device", "delay": 0}, + {"name": "i2c_piix4", "delay": 1}, + {"name": "mdio_bitbang", "delay": 0}, + {"name": "mdio_gpio", "delay": 0}, + {"name": "wb_mdio_gpio_device gpio_mdc=131 gpio_mdio=132 gpio_chip_name=AMDI0030:00", "delay": 0}, + {"name": "wb_wdt", "delay": 0}, + {"name": "wb_wdt_device", "delay": 0}, + {"name": "lm75", "delay": 0}, + {"name": "tmp401", "delay": 0}, + {"name": "ct7148", "delay": 0}, + {"name": "wb_rc32312", "delay": 0}, + {"name": "optoe", "delay": 0}, + {"name": "at24", "delay": 0}, + {"name": "pmbus_core", "delay": 0}, + {"name": "ina238", "delay": 0}, + {"name": "wb_csu550", "delay": 0}, + {"name": "ina3221", "delay": 0}, + {"name": "tps53679", "delay": 0}, + {"name": "ucd9000", "delay": 0}, + {"name": "wb_ucd9081", "delay": 0}, + {"name": "xdpe12284", "delay": 0}, + {"name": "wb_xdpe132g5c_pmbus", "delay":0}, + {"name": "wb_xdpe132g5c", "delay": 0}, + {"name": "hw_test", "delay": 0}, + #{"name": "firmware_driver_cpld", "delay": 0}, + #{"name": "firmware_driver_ispvme", "delay": 0}, + #{"name": "firmware_driver_sysfs", "delay": 0}, + #{"name": "wb_firmware_upgrade_device", "delay": 0}, + {"name": "isl68137", "delay": 0}, + {"name": "s3ip_sysfs", "delay": 0}, + {"name": "wb_switch_driver", "delay": 0}, + {"name": "syseeprom_device_driver", "delay": 0}, + {"name": "fan_device_driver", "delay": 0}, + {"name": "cpld_device_driver", "delay": 0}, + {"name": "sysled_device_driver", "delay": 0}, + {"name": "psu_device_driver", "delay": 0}, + {"name": "transceiver_device_driver", "delay": 0}, + {"name": "temp_sensor_device_driver", "delay": 0}, + {"name": "vol_sensor_device_driver", "delay": 0}, + {"name": "curr_sensor_device_driver", "delay": 0}, + {"name": "fpga_device_driver", "delay": 0}, + {"name": "watchdog_device_driver", "delay": 0}, +] + +DEVICE = [ + # SYS E2 + {"name": "24c02", "bus": 1, "loc": 0x56}, + {"name": "24c02", "bus": 1, "loc": 0x57}, + # IO board E2 + {"name": "24c02", "bus": 12, "loc": 0x54}, + # FAN board E2 + {"name": "24c02", "bus": 427, "loc": 0x57}, + # BASE board E2 + {"name": "24c02", "bus": 67, "loc": 0x57}, + # MAC board E2 + {"name": "24c02", "bus": 105, "loc": 0x57}, + # fan + {"name": "24c64", "bus": 59, "loc": 0x50}, + {"name": "24c64", "bus": 60, "loc": 0x50}, + {"name": "24c64", "bus": 61, "loc": 0x50}, + {"name": "24c64", "bus": 62, "loc": 0x50}, + {"name": "24c64", "bus": 63, "loc": 0x50}, + {"name": "24c64", "bus": 64, "loc": 0x50}, + # psu + {"name": "wb_fsp1200", "bus": 53, "loc": 0x60}, + {"name": "wb_fsp1200", "bus": 54, "loc": 0x60}, + {"name": "wb_fsp1200", "bus": 55, "loc": 0x60}, + {"name": "wb_fsp1200", "bus": 56, "loc": 0x60}, + # temp + {"name": "lm75", "bus": 65, "loc": 0x4b}, + {"name": "lm75", "bus": 66, "loc": 0x4e}, + {"name": "lm75", "bus": 76, "loc": 0x4b}, + {"name": "lm75", "bus": 77, "loc": 0x4f}, + {"name": "lm75", "bus": 111, "loc": 0x4b}, + {"name": "lm75", "bus": 112, "loc": 0x4f}, + {"name": "ct7318", "bus": 78, "loc": 0x4c}, + {"name": "ct7318", "bus": 79, "loc": 0x4c}, + {"name": "ct7318", "bus": 80, "loc": 0x4c}, + #dcdc + {"name": "ucd90160", "bus": 69, "loc": 0x5b}, + {"name": "ucd90160", "bus": 70, "loc": 0x5f}, + {"name": "ucd90160", "bus": 73, "loc": 0x68}, + {"name": "ucd90160", "bus": 83, "loc": 0x5b}, + {"name": "ucd90160", "bus": 84, "loc": 0x5b}, + {"name": "wb_ina238", "bus": 57, "loc": 0x40}, + {"name": "wb_ina238", "bus": 58, "loc": 0x41}, + {"name": "ads7828", "bus": 97, "loc": 0x48}, + {"name": "ads7828", "bus": 97, "loc": 0x4a}, + {"name": "ina3221", "bus": 98, "loc": 0x40}, + {"name": "raa228228", "bus": 70, "loc": 0x72}, + {"name": "raa228228", "bus": 70, "loc": 0x74}, + {"name": "raa228228", "bus": 85, "loc": 0x60}, + {"name": "isl69260", "bus": 85, "loc": 0x62}, + {"name": "isl69260", "bus": 85, "loc": 0x74}, + {"name": "isl69260", "bus": 87, "loc": 0x60}, + {"name": "isl69260", "bus": 87, "loc": 0x62}, + {"name": "isl69260", "bus": 87, "loc": 0x74}, + {"name": "isl69260", "bus": 89, "loc": 0x74}, + {"name": "isl69260", "bus": 89, "loc": 0x60}, + {"name": "isl69260", "bus": 90, "loc": 0x60}, + {"name": "isl69260", "bus": 91, "loc": 0x60}, + {"name": "isl69260", "bus": 91, "loc": 0x62}, + {"name": "isl69260", "bus": 92, "loc": 0x60}, + {"name": "isl69260", "bus": 92, "loc": 0x62}, + {"name": "isl69260", "bus": 95, "loc": 0x60}, + {"name": "ads7828", "bus": 13, "loc": 0x48}, + {"name": "ads7828", "bus": 14, "loc": 0x48}, + + #avs + {"name": "wb_mac_bsc_th6", "bus": 75, "loc": 0x44}, + {"name": "wb_rc32312", "bus": 103, "loc": 0x09}, + {"name": "wb_rc32312", "bus": 104, "loc": 0x09}, +] + +OPTOE = [ + {"name": "optoe1", "startbus": 265, "endbus": 265}, + {"name": "optoe3", "startbus": 201, "endbus": 264}, +] + + +INIT_PARAM = [] + +INIT_COMMAND_PRE = [] + +INIT_COMMAND = [ + # open X86 BMC Serial port + "dfd_debug sysfs_data_wr /dev/cpld1 0xA9 0x01", + # QSFP EN + "dfd_debug sysfs_data_wr /dev/cpld7 0x40 0xbf", + "dfd_debug sysfs_data_wr /dev/cpld7 0x41 0xbf", + "dfd_debug sysfs_data_wr /dev/cpld7 0x42 0xbd", + "dfd_debug sysfs_data_wr /dev/cpld7 0x43 0xbd", + "dfd_debug sysfs_data_wr /dev/cpld7 0x44 0xbb", + "dfd_debug sysfs_data_wr /dev/cpld7 0x45 0xbb", + # KR power_on + "dfd_debug sysfs_data_wr /dev/cpld7 0x50 0xaf", + "dfd_debug sysfs_data_wr /dev/cpld7 0x51 0xaf", + # KR tx-disable enable + "dfd_debug sysfs_data_wr /dev/cpld7 0x52 0xac", + "dfd_debug sysfs_data_wr /dev/cpld7 0x53 0xac", + + "echo 580000 > /sys/bus/i2c/devices/85-0060/hwmon/hwmon*/avs0_vout_min", + "echo 920000 > /sys/bus/i2c/devices/85-0060/hwmon/hwmon*/avs0_vout_max", + "echo 600000 > /sys/bus/i2c/devices/87-0060/hwmon/hwmon*/avs0_vout_min", + "echo 880000 > /sys/bus/i2c/devices/87-0060/hwmon/hwmon*/avs0_vout_max", + "echo 600000 > /sys/bus/i2c/devices/87-0060/hwmon/hwmon*/avs1_vout_min", + "echo 880000 > /sys/bus/i2c/devices/87-0060/hwmon/hwmon*/avs1_vout_max", + "echo 600000 > /sys/bus/i2c/devices/89-0060/hwmon/hwmon*/avs0_vout_min", + "echo 880000 > /sys/bus/i2c/devices/89-0060/hwmon/hwmon*/avs0_vout_max", + "echo 600000 > /sys/bus/i2c/devices/89-0060/hwmon/hwmon*/avs1_vout_min", + "echo 880000 > /sys/bus/i2c/devices/89-0060/hwmon/hwmon*/avs1_vout_max", + "echo 600000 > /sys/bus/i2c/devices/90-0060/hwmon/hwmon*/avs0_vout_min", + "echo 880000 > /sys/bus/i2c/devices/90-0060/hwmon/hwmon*/avs0_vout_max", + "echo 600000 > /sys/bus/i2c/devices/90-0060/hwmon/hwmon*/avs1_vout_min", + "echo 880000 > /sys/bus/i2c/devices/90-0060/hwmon/hwmon*/avs1_vout_max", + "echo 600000 > /sys/bus/i2c/devices/95-0060/hwmon/hwmon*/avs0_vout_min", + "echo 880000 > /sys/bus/i2c/devices/95-0060/hwmon/hwmon*/avs0_vout_max", + "echo 600000 > /sys/bus/i2c/devices/95-0060/hwmon/hwmon*/avs1_vout_min", + "echo 880000 > /sys/bus/i2c/devices/95-0060/hwmon/hwmon*/avs1_vout_max", +] + +UPGRADE_SUMMARY = { + "devtype": 0x414c, + + "slot0": { + "subtype": 0, + "VME": { + "chain1": { + "name": "BASE_CPLD", + "is_support_warm_upg": 0, + "init_cmd": [ + {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x9d, "value": 0xa5}, + ], + "finish_cmd": [ + {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x9d, "value": 0xa4}, + ], + }, + "chain2": { + "name": "MAC_CPLDA", + "is_support_warm_upg": 0, + "init_cmd": [ + {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x9d, "value": 0xa5}, + ], + "finish_cmd": [ + {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x9d, "value": 0xa4}, + ], + }, + "chain3": { + "name": "MAC_CPLDB", + "is_support_warm_upg": 0, + "init_cmd": [ + {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x9d, "value": 0xa5}, + ], + "finish_cmd": [ + {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x9d, "value": 0xa4}, + ], + }, + "chain4": { + "name": "IO_CPLD", + "is_support_warm_upg": 0, + "init_cmd": [ + {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x9d, "value": 0xa5}, + ], + "finish_cmd": [ + {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x9d, "value": 0xa4}, + ], + }, + "chain5": { + "name": "FAN_CPLD", + "is_support_warm_upg": 0, + "init_cmd": [ + {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x9d, "value": 0xa5}, + ], + "finish_cmd": [ + {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x9d, "value": 0xa4}, + ], + }, + "chain6": { + "name": "CPU_CPLD", + "is_support_warm_upg": 0, + "init_cmd": [ + {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x9d, "value": 0xa5}, + ], + "finish_cmd": [ + {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x9d, "value": 0xa4}, + ], + }, + }, + + "SPI-LOGIC-DEV": { + "chain1": { + "name": "MAC_FPGA", + "is_support_warm_upg": 0, + }, + "chain3": { + "name": "IO_FPGA", + "is_support_warm_upg": 0, + } + }, + + "SYSFS": { + "chain2": { + "name": "BCM53134", + "is_support_warm_upg": 0, + "init_cmd": [ + {"cmd": "modprobe wb_spi_gpio", "gettype": "cmd"}, + {"cmd": "modprobe wb_spi_gpio_device sck=7 mosi=5 miso=6 cs=8 bus=0 gpio_chip_name=AMDI0030:00", "gettype": "cmd"}, + {"cmd": "modprobe wb_spi_93xx46", "gettype": "cmd", "delay": 0.1}, + {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x9d, "value": 0xa5}, + ], + "finish_cmd": [ + {"gettype": "devfile", "path": "/dev/cpld0", "offset": 0x9d, "value": 0xa4}, + {"cmd": "rmmod wb_spi_93xx46", "gettype": "cmd"}, + {"cmd": "rmmod wb_spi_gpio_device", "gettype": "cmd"}, + {"cmd": "rmmod wb_spi_gpio", "gettype": "cmd", "delay": 0.1}, + ], + }, + }, + + "TEST": { + "fpga": [ + {"chain": 1, "file": "/etc/.upgrade_test/fpga_test_0_1_header.bin", "display_name": "MAC_FPGA"}, + {"chain": 3, "file": "/etc/.upgrade_test/fpga_test_0_3_header.bin", "display_name": "IO_FPGA"}, + ], + "cpld": [ + {"chain": 1, "file": "/etc/.upgrade_test/cpld_test_0_1_header.vme", "display_name": "BASE_CPLD"}, + {"chain": 2, "file": "/etc/.upgrade_test/cpld_test_0_2_header.vme", "display_name": "MAC_CPLDA"}, + {"chain": 3, "file": "/etc/.upgrade_test/cpld_test_0_3_header.vme", "display_name": "MAC_CPLDB"}, + {"chain": 4, "file": "/etc/.upgrade_test/cpld_test_0_4_header.vme", "display_name": "IO_CPLD"}, + {"chain": 5, "file": "/etc/.upgrade_test/cpld_test_0_5_header.vme", "display_name": "FAN_CPLD"}, + {"chain": 6, "file": "/etc/.upgrade_test/cpld_test_0_6_header.vme", "display_name": "CPU_CPLD"}, + ], + }, + }, +} + +PLATFORM_E2_CONF = { + "fan": [ + {"name": "fan1", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/59-0050/eeprom"}, + {"name": "fan2", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/60-0050/eeprom"}, + {"name": "fan3", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/61-0050/eeprom"}, + {"name": "fan4", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/62-0050/eeprom"}, + {"name": "fan5", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/63-0050/eeprom"}, + {"name": "fan6", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/64-0050/eeprom"}, + ], + "syseeprom": [ + {"name": "syseeprom", "e2_type": "onie_tlv", "e2_path": "/sys/bus/i2c/devices/1-0056/eeprom"}, + ], + "io": [ + {"name": "IO card", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/12-0054/eeprom"}, + ], + "fcb": [ + {"name": "FAN board", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/427-0057/eeprom"}, + ], + "base": [ + {"name": "BASE board", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/67-0057/eeprom"}, + ], + "mac": [ + {"name": "MAC board", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/105-0057/eeprom"}, + ], +} + +AIR_FLOW_CONF = { +} diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6951-64hc-cp/config/x86_64_micas_m2_w6951_64hc_cp_r0_port_config.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6951-64hc-cp/config/x86_64_micas_m2_w6951_64hc_cp_r0_port_config.py new file mode 100644 index 00000000000..b47d25e8d21 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6951-64hc-cp/config/x86_64_micas_m2_w6951_64hc_cp_r0_port_config.py @@ -0,0 +1,74 @@ +#!/usr/bin/python3 +# -*- coding: UTF-8 -*- + +PLATFORM_INTF_OPTOE = { + "port_num": 66, + "port_bus_map": { + 3: 201, + 4: 202, + 7: 203, + 8: 204, + 11: 205, + 12: 206, + 15: 207, + 16: 208, + 19: 209, + 20: 210, + 23: 211, + 24: 212, + 27: 213, + 28: 214, + 31: 215, + 32: 216, + 35: 217, + 36: 218, + 39: 219, + 40: 220, + 43: 221, + 44: 222, + 47: 223, + 48: 224, + 51: 225, + 52: 226, + 55: 227, + 56: 228, + 59: 229, + 60: 230, + 63: 231, + 64: 232, + 1: 233, + 2: 234, + 5: 235, + 6: 236, + 9: 237, + 10: 238, + 13: 239, + 14: 240, + 17: 241, + 18: 242, + 21: 243, + 22: 244, + 25: 245, + 26: 246, + 29: 247, + 30: 248, + 33: 249, + 34: 250, + 37: 251, + 38: 252, + 41: 253, + 42: 254, + 45: 255, + 46: 256, + 49: 257, + 50: 258, + 53: 259, + 54: 260, + 57: 261, + 58: 262, + 61: 263, + 62: 264, + 65: 265, + 66: 265, + } +} diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6951-64hc-cp/hal-config/x86_64_micas_m2_w6951_64hc_cp_r0_device.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6951-64hc-cp/hal-config/x86_64_micas_m2_w6951_64hc_cp_r0_device.py new file mode 100644 index 00000000000..bfb39404475 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6951-64hc-cp/hal-config/x86_64_micas_m2_w6951_64hc_cp_r0_device.py @@ -0,0 +1,961 @@ +#!/usr/bin/python3 +psutypedecode = { + 0x00: 'N/A', + 0x01: 'AC', + 0x02: 'DC', +} + +class Unit: + Temperature = "C" + Voltage = "V" + Current = "A" + Power = "W" + Speed = "RPM" + + +class threshold: + PSU_TEMP_MIN = -20 * 1000 + PSU_TEMP_MAX = 65 * 1000 + + PSU_FAN_SPEED_MIN = 3500 + PSU_FAN_SPEED_MAX = 23500 + PSU_A_FAN_SPEED_MAX = 39000 + + PSU_OUTPUT_VOLTAGE_MIN = 11 * 1000 + PSU_OUTPUT_VOLTAGE_MAX = 13 * 1000 + + PSU_AC_INPUT_VOLTAGE_MIN = 90 * 1000 + PSU_AC_INPUT_VOLTAGE_MAX = 264 * 1000 + + PSU_DC_INPUT_VOLTAGE_MIN = 180 * 1000 + PSU_DC_INPUT_VOLTAGE_MAX = 320 * 1000 + + ERR_VALUE = -9999999 + + PSU_OUTPUT_POWER_MIN = 0* 1000 * 1000 + PSU_OUTPUT_POWER_MAX = 3000 * 1000 * 1000 + + PSU_INPUT_POWER_MIN = 0 * 1000 * 1000 + PSU_INPUT_POWER_MAX = 3100* 1000 * 1000 + + PSU_OUTPUT_CURRENT_MIN = 0 * 1000 + PSU_OUTPUT_CURRENT_MAX = 246 * 1000 + + PSU_INPUT_CURRENT_MIN = 0 * 1000 + PSU_INPUT_CURRENT_MAX = 20 * 1000 + + FRONT_FAN_SPEED_MAX = 32000 + REAR_FAN_SPEED_MAX = 30200 + FAN_SPEED_MIN = 6040 + + + +devices = { + "sensor_print_src": "s3ip", + + "dcdc_data_source": [ + { + "path": "/sys/s3ip/vol_sensor", + "type": "vol", + "Unit": Unit.Voltage, + "read_times": 3, + "format": "float(float(%s)/1000)", + }, + { + "path": "/sys/s3ip/curr_sensor", + "type": "curr", + "Unit": Unit.Current, + "read_times": 3, + "format": "float(float(%s)/1000)", + }, + ], + "temp_data_source": [ + { + "path": "/sys/s3ip/temp_sensor", + "type": "temp", + "Unit": Unit.Temperature, + }, + ], + + "onie_e2": [ + { + "name": "ONIE_E2", + "e2loc": {"loc": "/sys/bus/i2c/devices/1-0056/eeprom", "way": "sysfs"}, + "airflow": "N/A" + }, + ], + "psus": [ + { + # "psu_sn": {"loc": "/sys/s3ip/psu/psu1/serial_number", "way": "sysfs"}, + # "psu_hw": {"loc": "/sys/s3ip/psu/psu1/hardware_version", "way": "sysfs"}, + # "psu_pn": {"loc": "/sys/s3ip/psu/psu1/part_number", "way": "sysfs"}, + # "psu_vendor": {"loc": "/sys/s3ip/psu/psu1/vendor", "way": "sysfs"}, + "pmbusloc": {"bus": 53, "addr": 0x60, "way": "i2c"}, + "present": {"loc": "/sys/s3ip/psu/psu1/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "name": "PSU1", + "TempStatus": {"bus": 53, "addr": 0x60, "offset": 0x79, "way": "i2cword", "mask": 0x0004}, + "Temperature": { + "value": {"loc": "/sys/s3ip/psu/psu1/temp1/value", "way": "sysfs"}, + "Min": threshold.PSU_TEMP_MIN, + "Max": threshold.PSU_TEMP_MAX, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + }, + "FanStatus": {"bus": 53, "addr": 0x60, "offset": 0x79, "way": "i2cword", "mask": 0x0400}, + "FanSpeed": { + "value": {"loc": "/sys/s3ip/psu/psu1/fan_speed", "way": "sysfs"}, + "Min": threshold.PSU_FAN_SPEED_MIN, + "Max": threshold.PSU_FAN_SPEED_MAX, + "Unit": Unit.Speed + }, + "psu_fan_tolerance": 40, + "InputsStatus": {"bus": 53, "addr": 0x60, "offset": 0x79, "way": "i2cword", "mask": 0x2000}, + "InputsType": {"bus": 53, "addr": 0x60, "offset": 0x80, "way": "i2c", 'psutypedecode': psutypedecode}, + "InputsVoltage": { + 'DC': { + "value": {"loc": "/sys/s3ip/psu/psu1/in_vol", "way": "sysfs"}, + "Min": threshold.PSU_DC_INPUT_VOLTAGE_MIN, + "Max": threshold.PSU_DC_INPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + }, + 'other': { + "value": {"loc": "/sys/s3ip/psu/psu1/in_vol", "way": "sysfs"}, + "Min": threshold.ERR_VALUE, + "Max": threshold.ERR_VALUE, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + } + }, + "InputsCurrent": { + "value": {"loc": "/sys/s3ip/psu/psu1/in_curr", "way": "sysfs"}, + "Min": threshold.PSU_INPUT_CURRENT_MIN, + "Max": threshold.PSU_INPUT_CURRENT_MAX, + "Unit": Unit.Current, + "format": "float(float(%s)/1000)" + }, + "InputsPower": { + "value": {"loc": "/sys/s3ip/psu/psu1/in_power", "way": "sysfs"}, + "Min": threshold.PSU_INPUT_POWER_MIN, + "Max": threshold.PSU_INPUT_POWER_MAX, + "Unit": Unit.Power, + "format": "float(float(%s)/1000000)" + }, + "OutputsStatus": {"bus": 53, "addr": 0x60, "offset": 0x79, "way": "i2cword", "mask": 0x8800}, + "OutputsVoltage": { + "value": {"loc": "/sys/s3ip/psu/psu1/out_vol", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_VOLTAGE_MIN, + "Max": threshold.PSU_OUTPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + }, + "OutputsCurrent": { + "value": {"loc": "/sys/s3ip/psu/psu1/out_curr", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_CURRENT_MIN, + "Max": threshold.PSU_OUTPUT_CURRENT_MAX, + "Unit": Unit.Current, + "format": "float(float(%s)/1000)" + }, + "OutputsPower": { + "value": {"loc": "/sys/s3ip/psu/psu1/out_power", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_POWER_MIN, + "Max": threshold.PSU_OUTPUT_POWER_MAX, + "Unit": Unit.Power, + "format": "float(float(%s)/1000000)" + } + }, + { + # "psu_sn": {"loc": "/sys/s3ip/psu/psu2/serial_number", "way": "sysfs"}, + # "psu_hw": {"loc": "/sys/s3ip/psu/psu2/hardware_version", "way": "sysfs"}, + # "psu_pn": {"loc": "/sys/s3ip/psu/psu2/part_number", "way": "sysfs"}, + # "psu_vendor": {"loc": "/sys/s3ip/psu/psu2/vendor", "way": "sysfs"}, + "pmbusloc": {"bus": 54, "addr": 0x60, "way": "i2c"}, + "present": {"loc": "/sys/s3ip/psu/psu2/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "name": "PSU2", + "TempStatus": {"bus": 54, "addr": 0x60, "offset": 0x79, "way": "i2cword", "mask": 0x0004}, + "Temperature": { + "value": {"loc": "/sys/s3ip/psu/psu2/temp1/value", "way": "sysfs"}, + "Min": threshold.PSU_TEMP_MIN, + "Max": threshold.PSU_TEMP_MAX, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + }, + "FanStatus": {"bus": 54, "addr": 0x60, "offset": 0x79, "way": "i2cword", "mask": 0x0400}, + "FanSpeed": { + "value": {"loc": "/sys/s3ip/psu/psu2/fan_speed", "way": "sysfs"}, + "Min": threshold.PSU_FAN_SPEED_MIN, + "Max": threshold.PSU_FAN_SPEED_MAX, + "Unit": Unit.Speed + }, + "psu_fan_tolerance": 40, + "InputsStatus": {"bus": 54, "addr": 0x60, "offset": 0x79, "way": "i2cword", "mask": 0x2000}, + "InputsType": {"bus": 54, "addr": 0x60, "offset": 0x80, "way": "i2c", 'psutypedecode': psutypedecode}, + "InputsVoltage": { + 'DC': { + "value": {"loc": "/sys/s3ip/psu/psu2/in_vol", "way": "sysfs"}, + "Min": threshold.PSU_DC_INPUT_VOLTAGE_MIN, + "Max": threshold.PSU_DC_INPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + }, + 'other': { + "value": {"loc": "/sys/s3ip/psu/psu2/in_vol", "way": "sysfs"}, + "Min": threshold.ERR_VALUE, + "Max": threshold.ERR_VALUE, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + } + }, + "InputsCurrent": { + "value": {"loc": "/sys/s3ip/psu/psu2/in_curr", "way": "sysfs"}, + "Min": threshold.PSU_INPUT_CURRENT_MIN, + "Max": threshold.PSU_INPUT_CURRENT_MAX, + "Unit": Unit.Current, + "format": "float(float(%s)/1000)" + }, + "InputsPower": { + "value": {"loc": "/sys/s3ip/psu/psu2/in_power", "way": "sysfs"}, + "Min": threshold.PSU_INPUT_POWER_MIN, + "Max": threshold.PSU_INPUT_POWER_MAX, + "Unit": Unit.Power, + "format": "float(float(%s)/1000000)" + }, + "OutputsStatus": {"bus": 54, "addr": 0x60, "offset": 0x79, "way": "i2cword", "mask": 0x8800}, + "OutputsVoltage": { + "value": {"loc": "/sys/s3ip/psu/psu2/out_vol", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_VOLTAGE_MIN, + "Max": threshold.PSU_OUTPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + }, + "OutputsCurrent": { + "value": {"loc": "/sys/s3ip/psu/psu2/out_curr", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_CURRENT_MIN, + "Max": threshold.PSU_OUTPUT_CURRENT_MAX, + "Unit": Unit.Current, + "format": "float(float(%s)/1000)" + }, + "OutputsPower": { + "value": {"loc": "/sys/s3ip/psu/psu2/out_power", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_POWER_MIN, + "Max": threshold.PSU_OUTPUT_POWER_MAX, + "Unit": Unit.Power, + "format": "float(float(%s)/1000000)" + } + }, + { + # "psu_sn": {"loc": "/sys/s3ip/psu/psu3/serial_number", "way": "sysfs"}, + # "psu_hw": {"loc": "/sys/s3ip/psu/psu3/hardware_version", "way": "sysfs"}, + # "psu_pn": {"loc": "/sys/s3ip/psu/psu3/part_number", "way": "sysfs"}, + # "psu_vendor": {"loc": "/sys/s3ip/psu/psu3/vendor", "way": "sysfs"}, + "pmbusloc": {"bus": 55, "addr": 0x60, "way": "i2c"}, + "present": {"loc": "/sys/s3ip/psu/psu3/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "name": "PSU3", + "TempStatus": {"bus": 55, "addr": 0x60, "offset": 0x79, "way": "i2cword", "mask": 0x0004}, + "Temperature": { + "value": {"loc": "/sys/s3ip/psu/psu3/temp1/value", "way": "sysfs"}, + "Min": threshold.PSU_TEMP_MIN, + "Max": threshold.PSU_TEMP_MAX, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + }, + "FanStatus": {"bus": 55, "addr": 0x60, "offset": 0x79, "way": "i2cword", "mask": 0x0400}, + "FanSpeed": { + "value": {"loc": "/sys/s3ip/psu/psu3/fan_speed", "way": "sysfs"}, + "Min": threshold.PSU_FAN_SPEED_MIN, + "Max": threshold.PSU_FAN_SPEED_MAX, + "Unit": Unit.Speed + }, + "psu_fan_tolerance": 40, + "FanStatus": {"bus": 55, "addr": 0x60, "offset": 0x79, "way": "i2cword", "mask": 0x0400}, + "InputsStatus": {"bus": 55, "addr": 0x60, "offset": 0x79, "way": "i2cword", "mask": 0x2000}, + "InputsType": {"bus": 55, "addr": 0x60, "offset": 0x80, "way": "i2c", 'psutypedecode': psutypedecode}, + "InputsVoltage": { + 'DC': { + "value": {"loc": "/sys/s3ip/psu/psu3/in_vol", "way": "sysfs"}, + "Min": threshold.PSU_DC_INPUT_VOLTAGE_MIN, + "Max": threshold.PSU_DC_INPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + }, + 'other': { + "value": {"loc": "/sys/s3ip/psu/psu3/in_vol", "way": "sysfs"}, + "Min": threshold.ERR_VALUE, + "Max": threshold.ERR_VALUE, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + } + }, + "InputsCurrent": { + "value": {"loc": "/sys/s3ip/psu/psu3/in_curr", "way": "sysfs"}, + "Min": threshold.PSU_INPUT_CURRENT_MIN, + "Max": threshold.PSU_INPUT_CURRENT_MAX, + "Unit": Unit.Current, + "format": "float(float(%s)/1000)" + }, + "InputsPower": { + "value": {"loc": "/sys/s3ip/psu/psu3/in_power", "way": "sysfs"}, + "Min": threshold.PSU_INPUT_POWER_MIN, + "Max": threshold.PSU_INPUT_POWER_MAX, + "Unit": Unit.Power, + "format": "float(float(%s)/1000000)" + }, + "OutputsStatus": {"bus": 55, "addr": 0x60, "offset": 0x79, "way": "i2cword", "mask": 0x8800}, + "OutputsVoltage": { + "value": {"loc": "/sys/s3ip/psu/psu3/out_vol", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_VOLTAGE_MIN, + "Max": threshold.PSU_OUTPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + }, + "OutputsCurrent": { + "value": {"loc": "/sys/s3ip/psu/psu3/out_curr", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_CURRENT_MIN, + "Max": threshold.PSU_OUTPUT_CURRENT_MAX, + "Unit": Unit.Current, + "format": "float(float(%s)/1000)" + }, + "OutputsPower": { + "value": {"loc": "/sys/s3ip/psu/psu3/out_power", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_POWER_MIN, + "Max": threshold.PSU_OUTPUT_POWER_MAX, + "Unit": Unit.Power, + "format": "float(float(%s)/1000000)" + } + }, + { + # "psu_sn": {"loc": "/sys/s3ip/psu/psu4/serial_number", "way": "sysfs"}, + # "psu_hw": {"loc": "/sys/s3ip/psu/psu4/hardware_version", "way": "sysfs"}, + # "psu_pn": {"loc": "/sys/s3ip/psu/psu4/part_number", "way": "sysfs"}, + # "psu_vendor": {"loc": "/sys/s3ip/psu/psu4/vendor", "way": "sysfs"}, + "pmbusloc": {"bus": 56, "addr": 0x60, "way": "i2c"}, + "present": {"loc": "/sys/s3ip/psu/psu4/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "name": "PSU4", + "TempStatus": {"bus": 56, "addr": 0x60, "offset": 0x79, "way": "i2cword", "mask": 0x0004}, + "Temperature": { + "value": {"loc": "/sys/s3ip/psu/psu4/temp1/value", "way": "sysfs"}, + "Min": threshold.PSU_TEMP_MIN, + "Max": threshold.PSU_TEMP_MAX, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + }, + "FanStatus": {"bus": 56, "addr": 0x60, "offset": 0x79, "way": "i2cword", "mask": 0x0400}, + "FanSpeed": { + "value": {"loc": "/sys/s3ip/psu/psu4/fan_speed", "way": "sysfs"}, + "Min": threshold.PSU_FAN_SPEED_MIN, + "Max": threshold.PSU_FAN_SPEED_MAX, + "Unit": Unit.Speed + }, + "psu_fan_tolerance": 40, + "FanStatus": {"bus": 56, "addr": 0x60, "offset": 0x79, "way": "i2cword", "mask": 0x0400}, + "InputsStatus": {"bus": 56, "addr": 0x60, "offset": 0x79, "way": "i2cword", "mask": 0x2000}, + "InputsType": {"bus": 56, "addr": 0x60, "offset": 0x80, "way": "i2c", 'psutypedecode': psutypedecode}, + "InputsVoltage": { + 'DC': { + "value": {"loc": "/sys/s3ip/psu/psu4/in_vol", "way": "sysfs"}, + "Min": threshold.PSU_DC_INPUT_VOLTAGE_MIN, + "Max": threshold.PSU_DC_INPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + }, + 'other': { + "value": {"loc": "/sys/s3ip/psu/psu4/in_vol", "way": "sysfs"}, + "Min": threshold.ERR_VALUE, + "Max": threshold.ERR_VALUE, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + } + }, + "InputsCurrent": { + "value": {"loc": "/sys/s3ip/psu/psu4/in_curr", "way": "sysfs"}, + "Min": threshold.PSU_INPUT_CURRENT_MIN, + "Max": threshold.PSU_INPUT_CURRENT_MAX, + "Unit": Unit.Current, + "format": "float(float(%s)/1000)" + }, + "InputsPower": { + "value": {"loc": "/sys/s3ip/psu/psu4/in_power", "way": "sysfs"}, + "Min": threshold.PSU_INPUT_POWER_MIN, + "Max": threshold.PSU_INPUT_POWER_MAX, + "Unit": Unit.Power, + "format": "float(float(%s)/1000000)" + }, + "OutputsStatus": {"bus": 56, "addr": 0x60, "offset": 0x79, "way": "i2cword", "mask": 0x8800}, + "OutputsVoltage": { + "value": {"loc": "/sys/s3ip/psu/psu4/out_vol", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_VOLTAGE_MIN, + "Max": threshold.PSU_OUTPUT_VOLTAGE_MAX, + "Unit": Unit.Voltage, + "format": "float(float(%s)/1000)" + }, + "OutputsCurrent": { + "value": {"loc": "/sys/s3ip/psu/psu4/out_curr", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_CURRENT_MIN, + "Max": threshold.PSU_OUTPUT_CURRENT_MAX, + "Unit": Unit.Current, + "format": "float(float(%s)/1000)" + }, + "OutputsPower": { + "value": {"loc": "/sys/s3ip/psu/psu4/out_power", "way": "sysfs"}, + "Min": threshold.PSU_OUTPUT_POWER_MIN, + "Max": threshold.PSU_OUTPUT_POWER_MAX, + "Unit": Unit.Power, + "format": "float(float(%s)/1000000)" + } + } + ], + "temps": [ + { + "name": "BOARD_TEMP", + "temp_id": "TEMP1", + "Temperature": { + "value":{"loc": "/sys/s3ip/temp_sensor/temp5/value", "way": "sysfs"}, + "Min": -10000, + "Low": 0, + "High": 95000, + "Max": 100000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "CPU_TEMP", + "temp_id": "TEMP2", + "Temperature": { + "value": {"loc": "/sys/s3ip/temp_sensor/temp1/value", "way": "sysfs"}, + "Min": -15000, + "Low": 10000, + "High": 95000, + "Max": 99000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "INLET_TEMP", + "temp_id": "TEMP3", + "Temperature": { + "value": [ + {"loc": "/sys/s3ip/temp_sensor/temp4/value", "way": "sysfs"}, + ], + "Min": -30000, + "Low": 0, + "High": 50000, + "Max": 55000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "OUTLET_TEMP", + "temp_id": "TEMP4", + "Temperature": { + "value": [ + {"loc": "/sys/s3ip/temp_sensor/temp2/value", "way": "sysfs"}, + {"loc": "/sys/s3ip/temp_sensor/temp3/value", "way": "sysfs"}, + ], + "Min": -30000, + "Low": 0, + "High": 70000, + "Max": 75000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "SWITCH_TEMP", + "temp_id": "TEMP5", + "api_name": "ASIC_TEMP", + "Temperature": { + "value": {"loc": "/sys/s3ip/temp_sensor/temp10/value", "way": "sysfs"}, + "Min": -30000, + "Low": 10000, + "High": 100000, + "Max": 105000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "PSU1_TEMP", + "temp_id": "TEMP6", + "Temperature": { + "value": {"loc": "/sys/s3ip/psu/psu1/temp1/value", "way": "sysfs"}, + "Min": -10000, + "Low": 0, + "High": 55000, + "Max": 60000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "PSU2_TEMP", + "temp_id": "TEMP7", + "Temperature": { + "value": {"loc": "/sys/s3ip/psu/psu2/temp1/value", "way": "sysfs"}, + "Min": -10000, + "Low": 0, + "High": 55000, + "Max": 60000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "PSU3_TEMP", + "temp_id": "TEMP8", + "Temperature": { + "value": {"loc": "/sys/s3ip/psu/psu3/temp1/value", "way": "sysfs"}, + "Min": -10000, + "Low": 0, + "High": 55000, + "Max": 60000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "PSU4_TEMP", + "temp_id": "TEMP9", + "Temperature": { + "value": {"loc": "/sys/s3ip/psu/psu4/temp1/value", "way": "sysfs"}, + "Min": -10000, + "Low": 0, + "High": 55000, + "Max": 60000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "MOS_TEMP", + "temp_id": "TEMP10", + "Temperature": { + "value": [ + {"loc": "/sys/s3ip/temp_sensor/temp11/value", "way": "sysfs"}, + {"loc": "/sys/s3ip/temp_sensor/temp12/value", "way": "sysfs"}, + {"loc": "/sys/s3ip/temp_sensor/temp13/value", "way": "sysfs"}, + {"loc": "/sys/s3ip/temp_sensor/temp14/value", "way": "sysfs"}, + {"loc": "/sys/s3ip/temp_sensor/temp15/value", "way": "sysfs"}, + {"loc": "/sys/s3ip/temp_sensor/temp16/value", "way": "sysfs"}, + {"loc": "/sys/s3ip/temp_sensor/temp17/value", "way": "sysfs"}, + {"loc": "/sys/s3ip/temp_sensor/temp18/value", "way": "sysfs"}, + {"loc": "/sys/s3ip/temp_sensor/temp19/value", "way": "sysfs"}, + {"loc": "/sys/s3ip/temp_sensor/temp20/value", "way": "sysfs"}, + {"loc": "/sys/s3ip/temp_sensor/temp21/value", "way": "sysfs"}, + {"loc": "/sys/s3ip/temp_sensor/temp22/value", "way": "sysfs"}, + {"loc": "/sys/s3ip/temp_sensor/temp23/value", "way": "sysfs"}, + {"loc": "/sys/s3ip/temp_sensor/temp24/value", "way": "sysfs"}, + ], + "Min": -30000, + "Low": 10000, + "High": 100000, + "Max":125000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + { + "name": "SFF_TEMP", + "Temperature": { + "value": {"loc": "/tmp/highest_sff_temp", "way": "sysfs", "flock_path": "/tmp/highest_sff_temp"}, + "Min": -15000, + "Low": 0, + "High": 80000, + "Max": 100000, + "Unit": Unit.Temperature, + "format": "float(float(%s)/1000)" + } + }, + ], + "leds": [ + { + "name": "FRONT_SYS_LED", + "led_type": "SYS_LED", + "led": {"loc": "/dev/cpld1", "offset": 0xaa, "len": 1, "way": "devfile"}, + "led_attrs": { + "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04, + "flash": 0xff, "light": 0xff, "off": 0, "mask": 0x07 + }, + }, + { + "name": "FRONT_PSU_LED", + "led_type": "PSU_LED", + "led": {"loc": "/dev/cpld1", "offset": 0xac, "len": 1, "way": "devfile"}, + "led_attrs": { + "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04, + "flash": 0xff, "light": 0xff, "off": 0, "mask": 0x07 + }, + }, + { + "name": "FRONT_FAN_LED", + "led_type": "FAN_LED", + "led": {"loc": "/dev/cpld1", "offset": 0xad, "len": 1, "way": "devfile"}, + "led_attrs": { + "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04, + "flash": 0xff, "light": 0xff, "off": 0, "mask": 0x07 + }, + }, + ], + "fans": [ + { + "name": "FAN1", + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-59/59-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "present": {"loc": "/sys/s3ip/fan/fan1/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"loc": "/dev/cpld10", "offset":0xd0, "len": 1, "way":"devfile"}, + "led_attrs": { + "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04, + "flash": 0xff, "light": 0xff, "off": 0xff, "mask": 0x07 + }, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"loc": "/dev/cpld10", "offset":0xb0, "len": 1, "way":"devfile"}, + "Running": {"loc": "/sys/s3ip/fan/fan1/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan1/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan1/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"loc": "/dev/cpld10", "offset":0xb0, "len": 1, "way":"devfile"}, + "Running": {"loc": "/sys/s3ip/fan/fan1/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan1/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan1/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN2", + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-60/60-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "present": {"loc": "/sys/s3ip/fan/fan2/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"loc": "/dev/cpld10", "offset":0xd1, "len": 1, "way":"devfile"}, + "led_attrs": { + "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04, + "flash": 0xff, "light": 0xff, "off": 0xff, "mask": 0x07 + }, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"loc": "/dev/cpld10", "offset":0xb1, "len": 1, "way":"devfile"}, + "Running": {"loc": "/sys/s3ip/fan/fan2/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan2/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan2/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"loc": "/dev/cpld10", "offset":0xb1, "len": 1, "way":"devfile"}, + "Running": {"loc": "/sys/s3ip/fan/fan2/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan2/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan2/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN3", + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-61/61-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "present": {"loc": "/sys/s3ip/fan/fan3/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"loc": "/dev/cpld10", "offset":0xd2, "len": 1, "way":"devfile"}, + "led_attrs": { + "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04, + "flash": 0xff, "light": 0xff, "off": 0xff, "mask": 0x07 + }, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"loc": "/dev/cpld10", "offset":0xb2, "len": 1, "way":"devfile"}, + "Running": {"loc": "/sys/s3ip/fan/fan3/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan3/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan3/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"loc": "/dev/cpld10", "offset":0xb2, "len": 1, "way":"devfile"}, + "Running": {"loc": "/sys/s3ip/fan/fan3/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan3/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan3/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN4", + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-62/62-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "present": {"loc": "/sys/s3ip/fan/fan4/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"loc": "/dev/cpld10", "offset":0xd3, "len": 1, "way":"devfile"}, + "led_attrs": { + "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04, + "flash": 0xff, "light": 0xff, "off": 0xff, "mask": 0x07 + }, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"loc": "/dev/cpld10", "offset":0xb3, "len": 1, "way":"devfile"}, + "Running": {"loc": "/sys/s3ip/fan/fan4/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan4/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan4/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"loc": "/dev/cpld10", "offset":0xb3, "len": 1, "way":"devfile"}, + "Running": {"loc": "/sys/s3ip/fan/fan4/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan4/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan4/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN5", + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-63/63-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "present": {"loc": "/sys/s3ip/fan/fan4/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"loc": "/dev/cpld10", "offset":0xd4, "len": 1, "way":"devfile"}, + "led_attrs": { + "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04, + "flash": 0xff, "light": 0xff, "off": 0xff, "mask": 0x07 + }, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"loc": "/dev/cpld10", "offset":0xb4, "len": 1, "way":"devfile"}, + "Running": {"loc": "/sys/s3ip/fan/fan4/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan4/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan4/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"loc": "/dev/cpld10", "offset":0xb4, "len": 1, "way":"devfile"}, + "Running": {"loc": "/sys/s3ip/fan/fan4/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan4/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan4/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + { + "name": "FAN6", + "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-64/64-0050/eeprom', 'offset': 0, 'len': 256, 'way': 'devfile'}, + "present": {"loc": "/sys/s3ip/fan/fan4/present", "way": "sysfs", "mask": 0x01, "okval": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "led": {"loc": "/dev/cpld10", "offset":0xd5, "len": 1, "way":"devfile"}, + "led_attrs": { + "green": 0x04, "red": 0x02, "amber": 0x06, "default": 0x04, + "flash": 0xff, "light": 0xff, "off": 0xff, "mask": 0x07 + }, + "Rotor": { + "Rotor1_config": { + "name": "Rotor1", + "Set_speed": {"loc": "/dev/cpld10", "offset":0xb5, "len": 1, "way":"devfile"}, + "Running": {"loc": "/sys/s3ip/fan/fan4/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan4/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.FRONT_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan4/motor1/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.FRONT_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + "Rotor2_config": { + "name": "Rotor2", + "Set_speed": {"loc": "/dev/cpld10", "offset":0xb5, "len": 1, "way":"devfile"}, + "Running": {"loc": "/sys/s3ip/fan/fan4/motor2/status", "way": "sysfs", "mask": 0x01, "is_runing": 1}, + "HwAlarm": {"loc": "/sys/s3ip/fan/fan4/motor2/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1}, + "SpeedMin": threshold.FAN_SPEED_MIN, + "SpeedMax": threshold.REAR_FAN_SPEED_MAX, + "Speed": { + "value": {"loc": "/sys/s3ip/fan/fan4/motor2/speed", "way": "sysfs"}, + "Min": threshold.FAN_SPEED_MIN, + "Max": threshold.REAR_FAN_SPEED_MAX, + "Unit": Unit.Speed, + }, + }, + }, + }, + ], + "cplds": [ + { + "name": "CPU_CPLD", + "cpld_id": "CPLD1", + "VersionFile": {"loc": "/dev/cpld0", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for system power", + "slot": 0, + "warm": 1, + }, + { + "name": "BASE_CPLD", + "cpld_id": "CPLD2", + "VersionFile": {"loc": "/dev/cpld1", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for base functions", + "slot": 0, + "warm": 1, + }, + { + "name": "MAC_CPLDA", + "cpld_id": "CPLD3", + "VersionFile": {"loc": "/dev/cpld6", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for sff modules", + "slot": 0, + "warm": 1, + }, + { + "name": "MAC_CPLDB", + "cpld_id": "CPLD4", + "VersionFile": {"loc": "/dev/cpld7", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for sff modules", + "slot": 0, + "warm": 1, + }, + { + "name": "IO_CPLD", + "cpld_id": "CPLD5", + "VersionFile": {"loc": "/dev/cpld8", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for sff modules", + "slot": 0, + "warm": 1, + }, + { + "name": "FAN_CPLD", + "cpld_id": "CPLD6", + "VersionFile": {"loc": "/dev/cpld10", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for fan modules", + "slot": 0, + "warm": 1, + }, + { + "name": "MAC_FPGA", + "cpld_id": "CPLD7", + "VersionFile": {"loc": "/dev/fpga0", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for base functions", + "slot": 0, + "format": "little_endian", + "warm": 1, + }, + { + "name": "IO_FPGA", + "cpld_id": "CPLD8", + "VersionFile": {"loc": "/dev/fpga1", "offset": 0, "len": 4, "way": "devfile_ascii"}, + "desc": "Used for base functions", + "slot": 0, + "format": "little_endian", + "warm": 1, + }, + { + "name": "BIOS", + "cpld_id": "CPLD9", + "VersionFile": {"cmd": "dmidecode -s bios-version", "way": "cmd"}, + "desc": "Performs initialization of hardware components during booting", + "slot": 0, + "type": "str", + "warm": 0, + }, + ], + "cpu": [ + { + "name": "cpu", + "CpuResetCntReg": {"loc": "/dev/cpld1", "offset": 0x2e, "len": 1, "way": "devfile_ascii"}, + "reboot_cause_path": "/etc/sonic/.reboot/.previous-reboot-cause.txt" + } + ], + "sfps": { + "ver": '2.0', + "port_index_start": 0, + "port_num": 66, + "logical_to_physical_sfp_map": { + 66: 65, + }, + "log_level": 2, + "eeprom_retry_times": 5, + "eeprom_retry_break_sec": 0.2, + "presence_path": "/sys/s3ip/transceiver/eth%d/present", + "presence_val_is_present": 1, + "eeprom_path": "/sys/s3ip/transceiver/eth%d/eeprom", + "optoe_driver_path": "/sys/bus/i2c/devices/i2c-%d/%d-0050/dev_class", + "optoe_driver_key": list(range(201, 265)) + [265, 265] , + "lpmode_path": "/sys/s3ip/transceiver/eth%d/low_power_mode", + "reset_path": "/sys/s3ip/transceiver/eth%d/reset", + "reset_val_is_reset": 0xDA, + "tx_dis_path": "/sys/s3ip/transceiver/eth%d/tx_disable", + "rx_los_path": "/sys/s3ip/transceiver/eth%d/rx_los", + "tx_fault_path": "/sys/s3ip/transceiver/eth%d/tx_fault", + } +} diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6951-64hc-cp/hal-config/x86_64_micas_m2_w6951_64hc_cp_r0_monitor.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6951-64hc-cp/hal-config/x86_64_micas_m2_w6951_64hc_cp_r0_monitor.py new file mode 100644 index 00000000000..26a96635517 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6951-64hc-cp/hal-config/x86_64_micas_m2_w6951_64hc_cp_r0_monitor.py @@ -0,0 +1,133 @@ +# coding:utf-8 + +class fan_pwn: + FAN_PWN_MIN = 0x66 + FAN_PWN_MAX = 0xff + FAN_PWN_ERROR = 0x99 + FAN_PWN_WARNING = 0xcc + +monitor = { + "openloop": { + "linear": { + "name": "linear", + "flag": 0, + "pwm_min": fan_pwn.FAN_PWN_MIN, + "pwm_max": fan_pwn.FAN_PWN_MAX, + "K": 11, + "tin_min": 38, + }, + "curve": { + "name": "curve", + "flag": 0, + "pwm_min": fan_pwn.FAN_PWN_MIN, + "pwm_max": fan_pwn.FAN_PWN_MAX, + "a": 0.22, + "b": -3.1, + "c": 43, + "tin_min": 27, + }, + }, + + "pid": { + "OUTLET_TEMP": { + "name": "OUTLET_TEMP", + "flag": 1, + "type": "duty", + "pwm_min": fan_pwn.FAN_PWN_MIN, + "pwm_max": fan_pwn.FAN_PWN_MAX, + "Kp": 2, + "Ki": 0.4, + "Kd": 0.3, + "target": 65, + "value": [None, None, None], + }, + "MOS_TEMP": { + "name": "MOS_TEMP", + "flag": 1, + "type": "duty", + "pwm_min": fan_pwn.FAN_PWN_MIN, + "pwm_max": fan_pwn.FAN_PWN_MAX, + "Kp": 1, + "Ki": 0.4, + "Kd": 0.3, + "target": 95, + "value": [None, None, None], + }, + "BOARD_TEMP" : { + "name": "BOARD_TEMP", + "flag": 1, + "type": "duty", + "pwm_min": fan_pwn.FAN_PWN_MIN, + "pwm_max": fan_pwn.FAN_PWN_MAX, + "Kp": 2, + "Ki": 0.4, + "Kd": 0.3, + "target": 65, + "value": [None, None, None], + }, + }, + + "temps_threshold": { + "SWITCH_TEMP": {"name": "SWITCH_TEMP", "warning": 100, "critical": 105, "invalid": -100000, "error": -99999}, + "OUTLET_TEMP": {"name": "OUTLET_TEMP", "warning": 70, "critical": 75}, + "CPU_TEMP": {"name": "CPU_TEMP", "warning": 95, "critical": 99}, + "MOS_TEMP": {"name": "MOS_TEMP", "warning": 110, "critical": 125}, + "BOARD_TEMP": {"name": "BOARD_TEMP", "warning": 70, "critical": 75}, + "SFF_TEMP": {"name": "SFF_TEMP", "warning": 65, "critical": 70, "invalid": -10000, "error": -9999}, + }, + + "fancontrol_para": { + "interval": 5, + "max_pwm": fan_pwn.FAN_PWN_MAX, + "min_pwm": fan_pwn.FAN_PWN_MIN, + "abnormal_pwm": fan_pwn.FAN_PWN_MAX, + "warning_pwm": fan_pwn.FAN_PWN_WARNING, + "temp_invalid_pid_pwm": fan_pwn.FAN_PWN_MIN, + "temp_error_pid_pwm": fan_pwn.FAN_PWN_MIN, + "temp_fail_num": 3, + "check_temp_fail": [ + {"temp_name": "SWITCH_TEMP"}, + {"temp_name": "CPU_TEMP"}, + {"temp_name": "MOS_TEMP"}, + {"temp_name": "OUTLET_TEMP"}, + {"temp_name": "BOARD_TEMP"}, + ], + "temp_warning_num": 3, # temp over warning 3 times continuously + "temp_critical_num": 3, # temp over critical 3 times continuously + "temp_warning_countdown": 60, # 5 min warning speed after not warning + "temp_critical_countdown": 60, # 5 min full speed after not critical + "rotor_error_count": 6, # fan rotor error 6 times continuously + "check_inlet_mac_diff": 0, + "inlet_mac_diff": 999, + "check_crit_reboot_flag": 1, + "check_crit_reboot_num": 3, + "check_crit_sleep_time": 20, + "psu_fan_control": 0, + "psu_absent_fullspeed_num": 0xFF, + "fan_absent_fullspeed_num": 1, + "rotor_error_fullspeed_num": 1, + "deal_all_fan_error_method_flag": 0, + }, + + "ledcontrol_para": { + "interval":5, + "checkpsu": 0, # 0: sys led don't follow psu led + "checkfan": 0, # 0: sys led don't follow fan led + "psu_amber_num": 1, + "fan_amber_num": 1, + "board_sys_led": [ + {"led_name": "FRONT_SYS_LED"}, + ], + "board_psu_led": [ + {"led_name": "FRONT_PSU_LED"}, + ], + "board_fan_led": [ + {"led_name": "FRONT_FAN_LED"}, + ], + }, + + "otp_reboot_judge_file": { + "otp_switch_reboot_judge_file": "/etc/.otp_switch_reboot_flag", + "otp_other_reboot_judge_file": "/etc/.otp_other_reboot_flag", + }, +} diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6951-64hc-cp/modules/driver/Makefile b/platform/broadcom/sonic-platform-modules-micas/m2-w6951-64hc-cp/modules/driver/Makefile new file mode 100644 index 00000000000..db5e130fc5f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6951-64hc-cp/modules/driver/Makefile @@ -0,0 +1,25 @@ +MAKEFILE_FILE_PATH = $(abspath $(lastword $(MAKEFILE_LIST))) +MODULES_DIR = $(abspath $(MAKEFILE_FILE_PATH)/../../../../common/modules) +FIRMWARE_UPGRADE_PATH = $(abspath $(MAKEFILE_FILE_PATH)/../../../../common/app/firmware_upgrade/firmware_driver/include) +KERNEL_MODULES_DIR = $(abspath $(MAKEFILE_FILE_PATH)/../../../../common/modules) +COMMON_MODULE_SYMVERS = $(KERNEL_MODULES_DIR)/Module.symvers +BSP_PUBLIC_PATH = $(abspath $(MAKEFILE_FILE_PATH)/../../../../common/public/include) + +ifneq ($(wildcard $(COMMON_MODULE_SYMVERS)),) +KBUILD_EXTRA_SYMBOLS += $(COMMON_MODULE_SYMVERS) +endif + +EXTRA_CFLAGS+= -I$(MODULES_DIR) +EXTRA_CFLAGS+= -I$(FIRMWARE_UPGRADE_PATH) +EXTRA_CFLAGS+= -I$(BSP_PUBLIC_PATH) + +obj-m += wb_pcie_dev_device.o +obj-m += wb_spi_ocores_device.o +obj-m += wb_spi_dev_device.o +obj-m += wb_fpga_i2c_bus_device.o +obj-m += wb_i2c_mux_pca954x_device.o +obj-m += wb_fpga_pca954x_device.o +obj-m += wb_i2c_dev_device.o +obj-m += wb_wdt_device.o +obj-m += wb_indirect_dev_device.o +#obj-m += wb_firmware_upgrade_device.o diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6951-64hc-cp/modules/driver/wb_firmware_upgrade_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6951-64hc-cp/modules/driver/wb_firmware_upgrade_device.c new file mode 100644 index 00000000000..c65669b92c2 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6951-64hc-cp/modules/driver/wb_firmware_upgrade_device.c @@ -0,0 +1,457 @@ +/* + * wb_firmware_upgrade.c + * + * ko for firmware device + */ +#include +#include +#include +#include +#include +#include +#include +#include + +#define GPIO_AMD_NUM (256) +#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 1, 0) +#define GPIO_OFFSET (GPIO_DYNAMIC_BASE) /* Formula of gpio base number in Kernel */ +#else +#define GPIO_OFFSET (ARCH_NR_GPIOS - GPIO_AMD_NUM) /* Formula of gpio base number in Kernel */ +#endif + +static int g_wb_firmware_upgrade_debug = 0; +static int g_wb_firmware_upgrade_error = 0; + +module_param(g_wb_firmware_upgrade_debug, int, S_IRUGO | S_IWUSR); +module_param(g_wb_firmware_upgrade_error, int, S_IRUGO | S_IWUSR); + +#define WB_FIRMWARE_UPGRADE_DEBUG_VERBOSE(fmt, args...) do { \ + if (g_wb_firmware_upgrade_debug) { \ + printk(KERN_INFO "[WB_FIRMWARE_UPGRADE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +#define WB_FIRMWARE_UPGRADE_DEBUG_ERROR(fmt, args...) do { \ + if (g_wb_firmware_upgrade_error) { \ + printk(KERN_ERR "[WB_FIRMWARE_UPGRADE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +/* base cpld */ +static firmware_upgrade_device_t firmware_upgrade_device_data0 = { + .type = "JTAG", + .upg_type.jtag = { + .tdi = 5 + GPIO_OFFSET, + .tck = 7 + GPIO_OFFSET, + .tms = 8 + GPIO_OFFSET, + .tdo = 6 + GPIO_OFFSET, + }, + .chain = 1, + .chip_index = 1, + + .chain = 1, + .chip_index = 1, + .en_gpio[0] = 91 + GPIO_OFFSET, + .en_level[0] = 1, + + .en_gpio_num = 1, + .en_logic_num = 0, +}; + +/* mac cpld a */ +static firmware_upgrade_device_t firmware_upgrade_device_data1 = { + .type = "JTAG", + .upg_type.jtag = { + .tdi = 5 + GPIO_OFFSET, + .tck = 7 + GPIO_OFFSET, + .tms = 8 + GPIO_OFFSET, + .tdo = 6 + GPIO_OFFSET, + }, + .chain = 2, + .chip_index = 1, + + .en_gpio[0] = 85 + GPIO_OFFSET, + .en_level[0] = 1, + .en_gpio[1] = 84 + GPIO_OFFSET, + .en_level[1] = 1, + .en_gpio_num = 2, + + .en_logic_dev[0] = "/dev/cpld1", + .en_logic_addr[0] = 0xe1, + .en_logic_mask[0] = 0xfc, + .en_logic_en_val[0] = 0x01, + .en_logic_dis_val[0] = 0x00, + .en_logic_width[0] = 0x1, + + .en_logic_dev[1] = "/dev/cpld1", + .en_logic_addr[1] = 0xe2, + .en_logic_mask[1] = 0xf8, + .en_logic_en_val[1] = 0x02, + .en_logic_dis_val[1] = 0x00, + .en_logic_width[1] = 0x1, + + .en_logic_dev[2] = "/dev/cpld1", + .en_logic_addr[2] = 0xe3, + .en_logic_mask[2] = 0x00, + .en_logic_en_val[2] = 0x1c, + .en_logic_dis_val[2] = 0x1d, + .en_logic_width[2] = 0x1, + + .en_logic_num = 3, +}; + +/* mac cpld b */ +static firmware_upgrade_device_t firmware_upgrade_device_data2 = { + .type = "JTAG", + .upg_type.jtag = { + .tdi = 5 + GPIO_OFFSET, + .tck = 7 + GPIO_OFFSET, + .tms = 8 + GPIO_OFFSET, + .tdo = 6 + GPIO_OFFSET, + }, + + .chain = 3, + .chip_index = 1, + + .en_gpio[0] = 85 + GPIO_OFFSET, + .en_level[0] = 1, + .en_gpio[1] = 84 + GPIO_OFFSET, + .en_level[1] = 1, + .en_gpio_num = 2, + + .en_logic_dev[0] = "/dev/cpld1", + .en_logic_addr[0] = 0xe1, + .en_logic_mask[0] = 0xfc, + .en_logic_en_val[0] = 0x01, + .en_logic_dis_val[0] = 0x00, + .en_logic_width[0] = 0x1, + + .en_logic_dev[1] = "/dev/cpld1", + .en_logic_addr[1] = 0xe2, + .en_logic_mask[1] = 0xf8, + .en_logic_en_val[1] = 0x02, + .en_logic_dis_val[1] = 0x00, + .en_logic_width[1] = 0x1, + + + .en_logic_dev[2] = "/dev/cpld1", + .en_logic_addr[2] = 0xe4, + .en_logic_mask[2] = 0x00, + .en_logic_en_val[2] = 0x1a, + .en_logic_dis_val[2] = 0x1b, + .en_logic_width[2] = 0x1, + + .en_logic_num = 3, +}; + +/* io cpld */ +static firmware_upgrade_device_t firmware_upgrade_device_data3 = { + .type = "JTAG", + .upg_type.jtag = { + .tdi = 5 + GPIO_OFFSET, + .tck = 7 + GPIO_OFFSET, + .tms = 8 + GPIO_OFFSET, + .tdo = 6 + GPIO_OFFSET, + }, + + .chain = 4, + .chip_index = 1, + + .en_gpio[0] = 85 + GPIO_OFFSET, + .en_level[0] = 1, + .en_gpio[1] = 84 + GPIO_OFFSET, + .en_level[1] = 1, + .en_gpio_num = 2, + + .en_logic_dev[0] = "/dev/cpld1", + .en_logic_addr[0] = 0xe1, + .en_logic_mask[0] = 0xfc, + .en_logic_en_val[0] = 0x01, + .en_logic_dis_val[0] = 0x00, + .en_logic_width[0] = 0x1, + + .en_logic_dev[1] = "/dev/cpld1", + .en_logic_addr[1] = 0xe2, + .en_logic_mask[1] = 0xf8, + .en_logic_en_val[1] = 0x03, + .en_logic_dis_val[1] = 0x00, + .en_logic_width[1] = 0x1, + + .en_logic_dev[2] = "/dev/cpld1", + .en_logic_addr[2] = 0xe6, + .en_logic_mask[2] = 0x00, + .en_logic_en_val[2] = 0x18, + .en_logic_dis_val[2] = 0x19, + .en_logic_width[2] = 0x1, + + .en_logic_num = 3, +}; + +/* fan cpld */ +static firmware_upgrade_device_t firmware_upgrade_device_data4 = { + .type = "JTAG", + .upg_type.jtag = { + .tdi = 5 + GPIO_OFFSET, + .tck = 7 + GPIO_OFFSET, + .tms = 8 + GPIO_OFFSET, + .tdo = 6 + GPIO_OFFSET, + }, + + .chain = 5, + .chip_index = 1, + + .en_gpio[0] = 85 + GPIO_OFFSET, + .en_level[0] = 1, + .en_gpio[1] = 84 + GPIO_OFFSET, + .en_level[1] = 1, + .en_gpio_num = 2, + + .en_logic_dev[0] = "/dev/cpld1", + .en_logic_addr[0] = 0xe1, + .en_logic_mask[0] = 0xfc, + .en_logic_en_val[0] = 0x01, + .en_logic_dis_val[0] = 0x00, + .en_logic_width[0] = 0x1, + + .en_logic_dev[1] = "/dev/cpld1", + .en_logic_addr[1] = 0xe2, + .en_logic_mask[1] = 0xf8, + .en_logic_en_val[1] = 0x04, + .en_logic_dis_val[1] = 0x00, + .en_logic_width[1] = 0x1, + + .en_logic_dev[2] = "/dev/cpld1", + .en_logic_addr[2] = 0xe8, + .en_logic_mask[2] = 0x00, + .en_logic_en_val[2] = 0x16, + .en_logic_dis_val[2] = 0x17, + .en_logic_width[2] = 0x1, + + .en_logic_num = 3, +}; + + +/* cpu cpld */ +static firmware_upgrade_device_t firmware_upgrade_device_data5 = { + .type = "JTAG", + .upg_type.jtag = { + .tdi = 5 + GPIO_OFFSET, + .tck = 7 + GPIO_OFFSET, + .tms = 8 + GPIO_OFFSET, + .tdo = 6 + GPIO_OFFSET, + }, + .chain = 6, + .chip_index = 1, + + .en_gpio[0] = 85 + GPIO_OFFSET, + .en_level[0] = 1, + .en_gpio[1] = 84 + GPIO_OFFSET, + .en_level[1] = 1, + .en_gpio_num = 2, + + .en_logic_dev[0] = "/dev/cpld1", + .en_logic_addr[0] = 0xe1, + .en_logic_mask[0] = 0xfc, + .en_logic_en_val[0] = 0x01, + .en_logic_dis_val[0] = 0x00, + .en_logic_width[0] = 0x1, + + .en_logic_dev[1] = "/dev/cpld1", + .en_logic_addr[1] = 0xe2, + .en_logic_mask[1] = 0xf8, + .en_logic_en_val[1] = 0x01, + .en_logic_dis_val[1] = 0x00, + .en_logic_width[1] = 0x1, + + .en_logic_num = 2, +}; + +/* mac fpga */ +static firmware_upgrade_device_t firmware_upgrade_device_data6 = { + .type = "SPI_LOGIC", + .chain = 1, + .chip_index = 1, + .upg_type.sysfs = { + .dev_name = "/dev/fpga0", + .ctrl_base = 0xa00, + .flash_base = 0x2f0000, + .test_base = 0x7F0000, + .test_size = 0x10000, + }, + .en_gpio_num = 0, + .en_logic_num = 0, +}; + +/* io fpga */ +static firmware_upgrade_device_t firmware_upgrade_device_data7 = { + .type = "SPI_LOGIC", + .chain = 3, + .chip_index = 1, + .upg_type.sysfs = { + .dev_name = "/dev/fpga1", + .ctrl_base = 0xa00, + .flash_base = 0x2f0000, + .test_base = 0x7F0000, + .test_size = 0x10000, + }, + .en_logic_num = 0, + .en_logic_num = 0, +}; + +/* bcm53134 */ +static firmware_upgrade_device_t firmware_upgrade_device_data8 = { + .type = "SYSFS", + .chain = 2, + .chip_index = 1, + .upg_type.sysfs = { + .sysfs_name = "/sys/bus/spi/devices/spi0.0/eeprom", + }, + .en_gpio[0] = 85 + GPIO_OFFSET, + .en_level[0] = 1, + .en_gpio[1] = 84 + GPIO_OFFSET, + .en_level[1] = 1, + + .en_logic_dev[0] = "/dev/cpld1", + .en_logic_addr[0] = 0xe1, + .en_logic_mask[0] = 0xfc, + .en_logic_en_val[0] = 0x01, + .en_logic_dis_val[0] = 0x00, + .en_logic_width[0] = 0x1, + + .en_logic_dev[1] = "/dev/cpld1", + .en_logic_addr[1] = 0xe2, + .en_logic_mask[1] = 0xf8, + .en_logic_en_val[1] = 0x05, + .en_logic_dis_val[1] = 0x00, + .en_logic_width[1] = 0x1, + + .en_logic_dev[2] = "/dev/cpld1", + .en_logic_addr[2] = 0xe9, + .en_logic_mask[2] = 0x00, + .en_logic_en_val[2] = 0x16, + .en_logic_dis_val[2] = 0x17, + .en_logic_width[2] = 0x1, + + .en_gpio_num = 2, + .en_logic_num = 3, +}; + +static void firmware_device_release(struct device *dev) +{ + return; +} + +static struct platform_device firmware_upgrade_device[] = { + { + .name = "firmware_cpld_ispvme", + .id = 1, + .dev = { + .platform_data = &firmware_upgrade_device_data0, + .release = firmware_device_release, + }, + }, + { + .name = "firmware_cpld_ispvme", + .id = 2, + .dev = { + .platform_data = &firmware_upgrade_device_data1, + .release = firmware_device_release, + }, + }, + { + .name = "firmware_cpld_ispvme", + .id = 3, + .dev = { + .platform_data = &firmware_upgrade_device_data2, + .release = firmware_device_release, + }, + }, + { + .name = "firmware_cpld_ispvme", + .id = 4, + .dev = { + .platform_data = &firmware_upgrade_device_data3, + .release = firmware_device_release, + }, + }, + { + .name = "firmware_cpld_ispvme", + .id = 5, + .dev = { + .platform_data = &firmware_upgrade_device_data4, + .release = firmware_device_release, + }, + }, + { + .name = "firmware_cpld_ispvme", + .id = 6, + .dev = { + .platform_data = &firmware_upgrade_device_data5, + .release = firmware_device_release, + }, + }, + { + .name = "firmware_sysfs", + .id = 7, + .dev = { + .platform_data = &firmware_upgrade_device_data6, + .release = firmware_device_release, + }, + }, + { + .name = "firmware_sysfs", + .id = 8, + .dev = { + .platform_data = &firmware_upgrade_device_data7, + .release = firmware_device_release, + }, + }, + { + .name = "firmware_sysfs", + .id = 9, + .dev = { + .platform_data = &firmware_upgrade_device_data8, + .release = firmware_device_release, + }, + }, + }; + + static int __init firmware_upgrade_device_init(void) + { + int i; + int ret = 0; + firmware_upgrade_device_t *firmware_upgrade_device_data; + + WB_FIRMWARE_UPGRADE_DEBUG_VERBOSE("enter!\n"); + for (i = 0; i < ARRAY_SIZE(firmware_upgrade_device); i++) { + firmware_upgrade_device_data = firmware_upgrade_device[i].dev.platform_data; + ret = platform_device_register(&firmware_upgrade_device[i]); + if (ret < 0) { + firmware_upgrade_device_data->device_flag = -1; + printk(KERN_ERR "firmware_upgrade_device id%d register failed!\n", i + 1); + } else { + firmware_upgrade_device_data->device_flag = 0; + } + } + return 0; + } + + static void __exit firmware_upgrade_device_exit(void) + { + int i; + firmware_upgrade_device_t *firmware_upgrade_device_data; + + WB_FIRMWARE_UPGRADE_DEBUG_VERBOSE("enter!\n"); + for (i = ARRAY_SIZE(firmware_upgrade_device) - 1; i >= 0; i--) { + firmware_upgrade_device_data = firmware_upgrade_device[i].dev.platform_data; + if (firmware_upgrade_device_data->device_flag == 0) { + platform_device_unregister(&firmware_upgrade_device[i]); + } + } + } + + module_init(firmware_upgrade_device_init); + module_exit(firmware_upgrade_device_exit); + MODULE_DESCRIPTION("FIRMWARE UPGRADE Devices"); + MODULE_LICENSE("GPL"); + MODULE_AUTHOR("support"); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6951-64hc-cp/modules/driver/wb_fpga_i2c_bus_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6951-64hc-cp/modules/driver/wb_fpga_i2c_bus_device.c new file mode 100644 index 00000000000..75c292ba209 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6951-64hc-cp/modules/driver/wb_fpga_i2c_bus_device.c @@ -0,0 +1,1219 @@ +/* + * An wb_fpga_i2c_bus_device driver for fpga i2c device function + * + * Copyright (C) 2024 Micas Networks Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include + +#include + +static int g_wb_fpga_i2c_debug = 0; +static int g_wb_fpga_i2c_error = 0; + +module_param(g_wb_fpga_i2c_debug, int, S_IRUGO | S_IWUSR); +module_param(g_wb_fpga_i2c_error, int, S_IRUGO | S_IWUSR); + +#define WB_FPGA_I2C_DEBUG_VERBOSE(fmt, args...) do { \ + if (g_wb_fpga_i2c_debug) { \ + printk(KERN_INFO "[WB_FPGA_I2C][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +#define WB_FPGA_I2C_DEBUG_ERROR(fmt, args...) do { \ + if (g_wb_fpga_i2c_error) { \ + printk(KERN_ERR "[WB_FPGA_I2C][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +/* CPLD-I2C-MASTER-1 */ +static fpga_i2c_bus_device_t fpga0_i2c_bus_device_data0 = { + .adap_nr = 401, + .i2c_timeout = 3000, + .i2c_scale = 0x00, + .i2c_filter = 0x04, + .i2c_stretch = 0x08, + .i2c_ext_9548_exits_flag = 0x0c, + .i2c_ext_9548_addr = 0x10, + .i2c_ext_9548_chan = 0x14, + .i2c_in_9548_chan = 0x18, + .i2c_slave = 0x1c, + .i2c_reg = 0x20, + .i2c_reg_len = 0x30, + .i2c_data_len = 0x34, + .i2c_ctrl = 0x38, + .i2c_status = 0x3c, + .i2c_err_vec = 0x48, + .i2c_data_buf = 0x100, + .i2c_data_buf_len = 256, + .dev_name = "/dev/cpld2", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 6, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x7c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +/* CPLD-I2C-MASTER-4 */ +static fpga_i2c_bus_device_t fpga0_i2c_bus_device_data1 = { + .adap_nr = 402, + .i2c_timeout = 3000, + .i2c_scale = 0x00, + .i2c_filter = 0x04, + .i2c_stretch = 0x08, + .i2c_ext_9548_exits_flag = 0x0c, + .i2c_ext_9548_addr = 0x10, + .i2c_ext_9548_chan = 0x14, + .i2c_in_9548_chan = 0x18, + .i2c_slave = 0x1c, + .i2c_reg = 0x20, + .i2c_reg_len = 0x30, + .i2c_data_len = 0x34, + .i2c_ctrl = 0x38, + .i2c_status = 0x3c, + .i2c_err_vec = 0x48, + .i2c_data_buf = 0x100, + .i2c_data_buf_len = 256, + .dev_name = "/dev/cpld5", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 6, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x7c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +/* CPLD-I2C-MASTER-3 */ +static fpga_i2c_bus_device_t fpga0_i2c_bus_device_data2 = { + .adap_nr = 403, + .i2c_timeout = 3000, + .i2c_scale = 0x00, + .i2c_filter = 0x04, + .i2c_stretch = 0x08, + .i2c_ext_9548_exits_flag = 0x0c, + .i2c_ext_9548_addr = 0x10, + .i2c_ext_9548_chan = 0x14, + .i2c_in_9548_chan = 0x18, + .i2c_slave = 0x1c, + .i2c_reg = 0x20, + .i2c_reg_len = 0x30, + .i2c_data_len = 0x34, + .i2c_ctrl = 0x38, + .i2c_status = 0x3c, + .i2c_err_vec = 0x48, + .i2c_data_buf = 0x100, + .i2c_data_buf_len = 256, + .dev_name = "/dev/cpld4", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 6, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x7c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +static fpga_i2c_bus_device_t fpga0_i2c_bus_device_data3 = { + .adap_nr = 404, + .i2c_timeout = 3000, + .i2c_scale = 0x2000, + .i2c_filter = 0x2004, + .i2c_stretch = 0x2008, + .i2c_ext_9548_exits_flag = 0x200c, + .i2c_ext_9548_addr = 0x2010, + .i2c_ext_9548_chan = 0x2014, + .i2c_in_9548_chan = 0x2018, + .i2c_slave = 0x201c, + .i2c_reg = 0x2020, + .i2c_reg_len = 0x2030, + .i2c_data_len = 0x2034, + .i2c_ctrl = 0x2038, + .i2c_status = 0x203c, + .i2c_err_vec = 0x2048, + .i2c_data_buf = 0x2100, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x207c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +static fpga_i2c_bus_device_t fpga0_i2c_bus_device_data4 = { + .adap_nr = 405, + .i2c_timeout = 3000, + .i2c_scale = 0x2200, + .i2c_filter = 0x2204, + .i2c_stretch = 0x2208, + .i2c_ext_9548_exits_flag = 0x220c, + .i2c_ext_9548_addr = 0x2210, + .i2c_ext_9548_chan = 0x2214, + .i2c_in_9548_chan = 0x2218, + .i2c_slave = 0x221c, + .i2c_reg = 0x2220, + .i2c_reg_len = 0x2230, + .i2c_data_len = 0x2234, + .i2c_ctrl = 0x2238, + .i2c_status = 0x223c, + .i2c_err_vec = 0x2248, + .i2c_data_buf = 0x2300, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x227c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +static fpga_i2c_bus_device_t fpga0_i2c_bus_device_data5 = { + .adap_nr = 406, + .i2c_timeout = 3000, + .i2c_scale = 0x2400, + .i2c_filter = 0x2404, + .i2c_stretch = 0x2408, + .i2c_ext_9548_exits_flag = 0x240c, + .i2c_ext_9548_addr = 0x2410, + .i2c_ext_9548_chan = 0x2414, + .i2c_in_9548_chan = 0x2418, + .i2c_slave = 0x241c, + .i2c_reg = 0x2420, + .i2c_reg_len = 0x2430, + .i2c_data_len = 0x2434, + .i2c_ctrl = 0x2438, + .i2c_status = 0x243c, + .i2c_err_vec = 0x2448, + .i2c_data_buf = 0x2500, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x247c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +static fpga_i2c_bus_device_t fpga0_i2c_bus_device_data6 = { + .adap_nr = 407, + .i2c_timeout = 3000, + .i2c_scale = 0x2600, + .i2c_filter = 0x2604, + .i2c_stretch = 0x2608, + .i2c_ext_9548_exits_flag = 0x260c, + .i2c_ext_9548_addr = 0x2610, + .i2c_ext_9548_chan = 0x2614, + .i2c_in_9548_chan = 0x2618, + .i2c_slave = 0x261c, + .i2c_reg = 0x2620, + .i2c_reg_len = 0x2630, + .i2c_data_len = 0x2634, + .i2c_ctrl = 0x2638, + .i2c_status = 0x263c, + .i2c_err_vec = 0x2648, + .i2c_data_buf = 0x2700, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x267c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +static fpga_i2c_bus_device_t fpga0_i2c_bus_device_data7 = { + .adap_nr = 408, + .i2c_timeout = 3000, + .i2c_scale = 0x2800, + .i2c_filter = 0x2804, + .i2c_stretch = 0x2808, + .i2c_ext_9548_exits_flag = 0x280c, + .i2c_ext_9548_addr = 0x2810, + .i2c_ext_9548_chan = 0x2814, + .i2c_in_9548_chan = 0x2818, + .i2c_slave = 0x281c, + .i2c_reg = 0x2820, + .i2c_reg_len = 0x2830, + .i2c_data_len = 0x2834, + .i2c_ctrl = 0x2838, + .i2c_status = 0x283c, + .i2c_err_vec = 0x2848, + .i2c_data_buf = 0x2900, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x287c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +static fpga_i2c_bus_device_t fpga0_i2c_bus_device_data8 = { + .adap_nr = 432, + .i2c_timeout = 3000, + .i2c_scale = 0x2a00, + .i2c_filter = 0x2a04, + .i2c_stretch = 0x2a08, + .i2c_ext_9548_exits_flag = 0x2a0c, + .i2c_ext_9548_addr = 0x2a10, + .i2c_ext_9548_chan = 0x2a14, + .i2c_in_9548_chan = 0x2a18, + .i2c_slave = 0x2a1c, + .i2c_reg = 0x2a20, + .i2c_reg_len = 0x2a30, + .i2c_data_len = 0x2a34, + .i2c_ctrl = 0x2a38, + .i2c_status = 0x2a3c, + .i2c_err_vec = 0x2a48, + .i2c_data_buf = 0x2b00, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x2a7c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +static fpga_i2c_bus_device_t fpga1_i2c_bus_device_data0 = { + .adap_nr = 409, + .i2c_timeout = 3000, + .i2c_scale = 0x2200, + .i2c_filter = 0x2204, + .i2c_stretch = 0x2208, + .i2c_ext_9548_exits_flag = 0x220c, + .i2c_ext_9548_addr = 0x2210, + .i2c_ext_9548_chan = 0x2214, + .i2c_in_9548_chan = 0x2218, + .i2c_slave = 0x221c, + .i2c_reg = 0x2220, + .i2c_reg_len = 0x2230, + .i2c_data_len = 0x2234, + .i2c_ctrl = 0x2238, + .i2c_status = 0x223c, + .i2c_err_vec = 0x2248, + .i2c_data_buf = 0x2300, + .dev_name = "/dev/fpga1", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x227c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +static fpga_i2c_bus_device_t fpga0_dom_i2c_bus_device_data0 = { + .adap_nr = 410, + .i2c_timeout = 3000, + .i2c_scale = 0x4000, + .i2c_filter = 0x4004, + .i2c_stretch = 0x4008, + .i2c_ext_9548_exits_flag = 0x400c, + .i2c_ext_9548_addr = 0x4010, + .i2c_ext_9548_chan = 0x4014, + .i2c_in_9548_chan = 0x4018, + .i2c_slave = 0x401c, + .i2c_reg = 0x4020, + .i2c_reg_len = 0x4030, + .i2c_data_len = 0x4034, + .i2c_ctrl = 0x4038, + .i2c_status = 0x403c, + .i2c_err_vec = 0x4048, + .i2c_data_buf = 0x4100, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x407c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +static fpga_i2c_bus_device_t fpga0_dom_i2c_bus_device_data1 = { + .adap_nr = 411, + .i2c_timeout = 3000, + .i2c_scale = 0x4400, + .i2c_filter = 0x4404, + .i2c_stretch = 0x4408, + .i2c_ext_9548_exits_flag = 0x440c, + .i2c_ext_9548_addr = 0x4410, + .i2c_ext_9548_chan = 0x4414, + .i2c_in_9548_chan = 0x4418, + .i2c_slave = 0x441c, + .i2c_reg = 0x4420, + .i2c_reg_len = 0x4430, + .i2c_data_len = 0x4434, + .i2c_ctrl = 0x4438, + .i2c_status = 0x443c, + .i2c_err_vec = 0x4448, + .i2c_data_buf = 0x4500, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x447c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +static fpga_i2c_bus_device_t fpga0_dom_i2c_bus_device_data2 = { + .adap_nr = 412, + .i2c_timeout = 3000, + .i2c_scale = 0x4800, + .i2c_filter = 0x4804, + .i2c_stretch = 0x4808, + .i2c_ext_9548_exits_flag = 0x480c, + .i2c_ext_9548_addr = 0x4810, + .i2c_ext_9548_chan = 0x4814, + .i2c_in_9548_chan = 0x4818, + .i2c_slave = 0x481c, + .i2c_reg = 0x4820, + .i2c_reg_len = 0x4830, + .i2c_data_len = 0x4834, + .i2c_ctrl = 0x4838, + .i2c_status = 0x483c, + .i2c_err_vec = 0x4848, + .i2c_data_buf = 0x4900, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x487c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +static fpga_i2c_bus_device_t fpga0_dom_i2c_bus_device_data3 = { + .adap_nr = 413, + .i2c_timeout = 3000, + .i2c_scale = 0x4c00, + .i2c_filter = 0x4c04, + .i2c_stretch = 0x4c08, + .i2c_ext_9548_exits_flag = 0x4c0c, + .i2c_ext_9548_addr = 0x4c10, + .i2c_ext_9548_chan = 0x4c14, + .i2c_in_9548_chan = 0x4c18, + .i2c_slave = 0x4c1c, + .i2c_reg = 0x4c20, + .i2c_reg_len = 0x4c30, + .i2c_data_len = 0x4c34, + .i2c_ctrl = 0x4c38, + .i2c_status = 0x4c3c, + .i2c_err_vec = 0x4c48, + .i2c_data_buf = 0x4d00, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x4c7c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +static fpga_i2c_bus_device_t fpga0_dom_i2c_bus_device_data4 = { + .adap_nr = 414, + .i2c_timeout = 3000, + .i2c_scale = 0x5000, + .i2c_filter = 0x5004, + .i2c_stretch = 0x5008, + .i2c_ext_9548_exits_flag = 0x500c, + .i2c_ext_9548_addr = 0x5010, + .i2c_ext_9548_chan = 0x5014, + .i2c_in_9548_chan = 0x5018, + .i2c_slave = 0x501c, + .i2c_reg = 0x5020, + .i2c_reg_len = 0x5030, + .i2c_data_len = 0x5034, + .i2c_ctrl = 0x5038, + .i2c_status = 0x503c, + .i2c_err_vec = 0x5048, + .i2c_data_buf = 0x5100, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x507c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +static fpga_i2c_bus_device_t fpga0_dom_i2c_bus_device_data5 = { + .adap_nr = 415, + .i2c_timeout = 3000, + .i2c_scale = 0x5400, + .i2c_filter = 0x5404, + .i2c_stretch = 0x5408, + .i2c_ext_9548_exits_flag = 0x540c, + .i2c_ext_9548_addr = 0x5410, + .i2c_ext_9548_chan = 0x5414, + .i2c_in_9548_chan = 0x5418, + .i2c_slave = 0x541c, + .i2c_reg = 0x5420, + .i2c_reg_len = 0x5430, + .i2c_data_len = 0x5434, + .i2c_ctrl = 0x5438, + .i2c_status = 0x543c, + .i2c_err_vec = 0x5448, + .i2c_data_buf = 0x5500, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x547c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +static fpga_i2c_bus_device_t fpga0_dom_i2c_bus_device_data6 = { + .adap_nr = 416, + .i2c_timeout = 3000, + .i2c_scale = 0x5800, + .i2c_filter = 0x5804, + .i2c_stretch = 0x5808, + .i2c_ext_9548_exits_flag = 0x580c, + .i2c_ext_9548_addr = 0x5810, + .i2c_ext_9548_chan = 0x5814, + .i2c_in_9548_chan = 0x5818, + .i2c_slave = 0x581c, + .i2c_reg = 0x5820, + .i2c_reg_len = 0x5830, + .i2c_data_len = 0x5834, + .i2c_ctrl = 0x5838, + .i2c_status = 0x583c, + .i2c_err_vec = 0x5848, + .i2c_data_buf = 0x5900, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x587c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +static fpga_i2c_bus_device_t fpga0_dom_i2c_bus_device_data7 = { + .adap_nr = 417, + .i2c_timeout = 3000, + .i2c_scale = 0x5c00, + .i2c_filter = 0x5c04, + .i2c_stretch = 0x5c08, + .i2c_ext_9548_exits_flag = 0x5c0c, + .i2c_ext_9548_addr = 0x5c10, + .i2c_ext_9548_chan = 0x5c14, + .i2c_in_9548_chan = 0x5c18, + .i2c_slave = 0x5c1c, + .i2c_reg = 0x5c20, + .i2c_reg_len = 0x5c30, + .i2c_data_len = 0x5c34, + .i2c_ctrl = 0x5c38, + .i2c_status = 0x5c3c, + .i2c_err_vec = 0x5c48, + .i2c_data_buf = 0x5d00, + .dev_name = "/dev/fpga0", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x5c7c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data0 = { + .adap_nr = 418, + .i2c_timeout = 3000, + .i2c_scale = 0x4000, + .i2c_filter = 0x4004, + .i2c_stretch = 0x4008, + .i2c_ext_9548_exits_flag = 0x400c, + .i2c_ext_9548_addr = 0x4010, + .i2c_ext_9548_chan = 0x4014, + .i2c_in_9548_chan = 0x4018, + .i2c_slave = 0x401c, + .i2c_reg = 0x4020, + .i2c_reg_len = 0x4030, + .i2c_data_len = 0x4034, + .i2c_ctrl = 0x4038, + .i2c_status = 0x403c, + .i2c_err_vec = 0x4048, + .i2c_data_buf = 0x4100, + .dev_name = "/dev/fpga1", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x407c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data1 = { + .adap_nr = 419, + .i2c_timeout = 3000, + .i2c_scale = 0x4400, + .i2c_filter = 0x4404, + .i2c_stretch = 0x4408, + .i2c_ext_9548_exits_flag = 0x440c, + .i2c_ext_9548_addr = 0x4410, + .i2c_ext_9548_chan = 0x4414, + .i2c_in_9548_chan = 0x4418, + .i2c_slave = 0x441c, + .i2c_reg = 0x4420, + .i2c_reg_len = 0x4430, + .i2c_data_len = 0x4434, + .i2c_ctrl = 0x4438, + .i2c_status = 0x443c, + .i2c_err_vec = 0x4448, + .i2c_data_buf = 0x4500, + .dev_name = "/dev/fpga1", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x447c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data2 = { + .adap_nr = 420, + .i2c_timeout = 3000, + .i2c_scale = 0x4800, + .i2c_filter = 0x4804, + .i2c_stretch = 0x4808, + .i2c_ext_9548_exits_flag = 0x480c, + .i2c_ext_9548_addr = 0x4810, + .i2c_ext_9548_chan = 0x4814, + .i2c_in_9548_chan = 0x4818, + .i2c_slave = 0x481c, + .i2c_reg = 0x4820, + .i2c_reg_len = 0x4830, + .i2c_data_len = 0x4834, + .i2c_ctrl = 0x4838, + .i2c_status = 0x483c, + .i2c_err_vec = 0x4848, + .i2c_data_buf = 0x4900, + .dev_name = "/dev/fpga1", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x487c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data3 = { + .adap_nr = 421, + .i2c_timeout = 3000, + .i2c_scale = 0x4c00, + .i2c_filter = 0x4c04, + .i2c_stretch = 0x4c08, + .i2c_ext_9548_exits_flag = 0x4c0c, + .i2c_ext_9548_addr = 0x4c10, + .i2c_ext_9548_chan = 0x4c14, + .i2c_in_9548_chan = 0x4c18, + .i2c_slave = 0x4c1c, + .i2c_reg = 0x4c20, + .i2c_reg_len = 0x4c30, + .i2c_data_len = 0x4c34, + .i2c_ctrl = 0x4c38, + .i2c_status = 0x4c3c, + .i2c_err_vec = 0x4c48, + .i2c_data_buf = 0x4d00, + .dev_name = "/dev/fpga1", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x4c7c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data4 = { + .adap_nr = 422, + .i2c_timeout = 3000, + .i2c_scale = 0x5000, + .i2c_filter = 0x5004, + .i2c_stretch = 0x5008, + .i2c_ext_9548_exits_flag = 0x500c, + .i2c_ext_9548_addr = 0x5010, + .i2c_ext_9548_chan = 0x5014, + .i2c_in_9548_chan = 0x5018, + .i2c_slave = 0x501c, + .i2c_reg = 0x5020, + .i2c_reg_len = 0x5030, + .i2c_data_len = 0x5034, + .i2c_ctrl = 0x5038, + .i2c_status = 0x503c, + .i2c_err_vec = 0x5048, + .i2c_data_buf = 0x5100, + .dev_name = "/dev/fpga1", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x507c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data5 = { + .adap_nr = 423, + .i2c_timeout = 3000, + .i2c_scale = 0x5400, + .i2c_filter = 0x5404, + .i2c_stretch = 0x5408, + .i2c_ext_9548_exits_flag = 0x540c, + .i2c_ext_9548_addr = 0x5410, + .i2c_ext_9548_chan = 0x5414, + .i2c_in_9548_chan = 0x5418, + .i2c_slave = 0x541c, + .i2c_reg = 0x5420, + .i2c_reg_len = 0x5430, + .i2c_data_len = 0x5434, + .i2c_ctrl = 0x5438, + .i2c_status = 0x543c, + .i2c_err_vec = 0x5448, + .i2c_data_buf = 0x5500, + .dev_name = "/dev/fpga1", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x547c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data6 = { + .adap_nr = 424, + .i2c_timeout = 3000, + .i2c_scale = 0x5800, + .i2c_filter = 0x5804, + .i2c_stretch = 0x5808, + .i2c_ext_9548_exits_flag = 0x580c, + .i2c_ext_9548_addr = 0x5810, + .i2c_ext_9548_chan = 0x5814, + .i2c_in_9548_chan = 0x5818, + .i2c_slave = 0x581c, + .i2c_reg = 0x5820, + .i2c_reg_len = 0x5830, + .i2c_data_len = 0x5834, + .i2c_ctrl = 0x5838, + .i2c_status = 0x583c, + .i2c_err_vec = 0x5848, + .i2c_data_buf = 0x5900, + .dev_name = "/dev/fpga1", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x587c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +static fpga_i2c_bus_device_t fpga1_dom_i2c_bus_device_data7 = { + .adap_nr = 425, + .i2c_timeout = 3000, + .i2c_scale = 0x5c00, + .i2c_filter = 0x5c04, + .i2c_stretch = 0x5c08, + .i2c_ext_9548_exits_flag = 0x5c0c, + .i2c_ext_9548_addr = 0x5c10, + .i2c_ext_9548_chan = 0x5c14, + .i2c_in_9548_chan = 0x5c18, + .i2c_slave = 0x5c1c, + .i2c_reg = 0x5c20, + .i2c_reg_len = 0x5c30, + .i2c_data_len = 0x5c34, + .i2c_ctrl = 0x5c38, + .i2c_status = 0x5c3c, + .i2c_err_vec = 0x5c48, + .i2c_data_buf = 0x5d00, + .dev_name = "/dev/fpga1", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x5c7c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +static fpga_i2c_bus_device_t fpga1_i2c_bus_device_data1 = { + .adap_nr = 434, + .i2c_timeout = 3000, + .i2c_scale = 0x2000, + .i2c_filter = 0x2004, + .i2c_stretch = 0x2008, + .i2c_ext_9548_exits_flag = 0x200c, + .i2c_ext_9548_addr = 0x2010, + .i2c_ext_9548_chan = 0x2014, + .i2c_in_9548_chan = 0x2018, + .i2c_slave = 0x201c, + .i2c_reg = 0x2020, + .i2c_reg_len = 0x2030, + .i2c_data_len = 0x2034, + .i2c_ctrl = 0x2038, + .i2c_status = 0x203c, + .i2c_err_vec = 0x2048, + .i2c_data_buf = 0x2100, + .dev_name = "/dev/fpga1", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x207c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +static fpga_i2c_bus_device_t fpga1_i2c_bus_device_data2 = { + .adap_nr = 436, + .i2c_timeout = 3000, + .i2c_scale = 0x2400, + .i2c_filter = 0x2404, + .i2c_stretch = 0x2408, + .i2c_ext_9548_exits_flag = 0x240c, + .i2c_ext_9548_addr = 0x2410, + .i2c_ext_9548_chan = 0x2414, + .i2c_in_9548_chan = 0x2418, + .i2c_slave = 0x241c, + .i2c_reg = 0x2420, + .i2c_reg_len = 0x2430, + .i2c_data_len = 0x2434, + .i2c_ctrl = 0x2438, + .i2c_status = 0x243c, + .i2c_err_vec = 0x2448, + .i2c_data_buf = 0x2500, + .dev_name = "/dev/fpga1", + .i2c_scale_value = 0x4e, + .i2c_filter_value = 0x7c, + .i2c_stretch_value = 0x7c, + .i2c_func_mode = 3, + .i2c_adap_reset_flag = 1, + .i2c_reset_addr = 0x247c, + .i2c_reset_on = 0x00000001, + .i2c_reset_off = 0x00000000, + .i2c_rst_delay_b = 0, /* delay time before reset(us) */ + .i2c_rst_delay = 1, /* reset time(us) */ + .i2c_rst_delay_a = 1, /* delay time after reset(us) */ +}; + +static void wb_fpga_i2c_bus_device_release(struct device *dev) +{ + return; +} + +static struct platform_device fpga_i2c_bus_device[] = { + { + .name = "wb-fpga-i2c", + .id = 1, + .dev = { + .platform_data = &fpga0_i2c_bus_device_data0, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 2, + .dev = { + .platform_data = &fpga0_i2c_bus_device_data1, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 3, + .dev = { + .platform_data = &fpga0_i2c_bus_device_data2, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 4, + .dev = { + .platform_data = &fpga0_i2c_bus_device_data3, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 5, + .dev = { + .platform_data = &fpga0_i2c_bus_device_data4, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 6, + .dev = { + .platform_data = &fpga0_i2c_bus_device_data5, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 7, + .dev = { + .platform_data = &fpga0_i2c_bus_device_data6, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 8, + .dev = { + .platform_data = &fpga0_i2c_bus_device_data7, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 10, + .dev = { + .platform_data = &fpga0_dom_i2c_bus_device_data0, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 11, + .dev = { + .platform_data = &fpga0_dom_i2c_bus_device_data1, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 12, + .dev = { + .platform_data = &fpga0_dom_i2c_bus_device_data2, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 13, + .dev = { + .platform_data = &fpga0_dom_i2c_bus_device_data3, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 14, + .dev = { + .platform_data = &fpga0_dom_i2c_bus_device_data4, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 15, + .dev = { + .platform_data = &fpga0_dom_i2c_bus_device_data5, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 16, + .dev = { + .platform_data = &fpga0_dom_i2c_bus_device_data6, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 17, + .dev = { + .platform_data = &fpga0_dom_i2c_bus_device_data7, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 18, + .dev = { + .platform_data = &fpga1_dom_i2c_bus_device_data0, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 19, + .dev = { + .platform_data = &fpga1_dom_i2c_bus_device_data1, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 20, + .dev = { + .platform_data = &fpga1_dom_i2c_bus_device_data2, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 21, + .dev = { + .platform_data = &fpga1_dom_i2c_bus_device_data3, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 22, + .dev = { + .platform_data = &fpga1_dom_i2c_bus_device_data4, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 23, + .dev = { + .platform_data = &fpga1_dom_i2c_bus_device_data5, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 24, + .dev = { + .platform_data = &fpga1_dom_i2c_bus_device_data6, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 25, + .dev = { + .platform_data = &fpga1_dom_i2c_bus_device_data7, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 26, + .dev = { + .platform_data = &fpga1_i2c_bus_device_data0, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 27, + .dev = { + .platform_data = &fpga0_i2c_bus_device_data8, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 28, + .dev = { + .platform_data = &fpga1_i2c_bus_device_data1, + .release = wb_fpga_i2c_bus_device_release, + }, + }, + { + .name = "wb-fpga-i2c", + .id = 29, + .dev = { + .platform_data = &fpga1_i2c_bus_device_data2, + .release = wb_fpga_i2c_bus_device_release, + }, + }, +}; + +static int __init wb_fpga_i2c_bus_device_init(void) +{ + int i; + int ret = 0; + fpga_i2c_bus_device_t *fpga_i2c_bus_device_data; + + WB_FPGA_I2C_DEBUG_VERBOSE("enter!\n"); + for (i = 0; i < ARRAY_SIZE(fpga_i2c_bus_device); i++) { + fpga_i2c_bus_device_data = fpga_i2c_bus_device[i].dev.platform_data; + ret = platform_device_register(&fpga_i2c_bus_device[i]); + if (ret < 0) { + fpga_i2c_bus_device_data->device_flag = -1; /* device register failed, set flag -1 */ + printk(KERN_ERR "wb-fpga-i2c.%d register failed!\n", i + 1); + } else { + fpga_i2c_bus_device_data->device_flag = 0; /* device register suucess, set flag 0 */ + } + } + return 0; +} + +static void __exit wb_fpga_i2c_bus_device_exit(void) +{ + int i; + fpga_i2c_bus_device_t *fpga_i2c_bus_device_data; + + WB_FPGA_I2C_DEBUG_VERBOSE("enter!\n"); + for (i = ARRAY_SIZE(fpga_i2c_bus_device) - 1; i >= 0; i--) { + fpga_i2c_bus_device_data = fpga_i2c_bus_device[i].dev.platform_data; + if (fpga_i2c_bus_device_data->device_flag == 0) { /* device register success, need unregister */ + platform_device_unregister(&fpga_i2c_bus_device[i]); + } + } +} + +module_init(wb_fpga_i2c_bus_device_init); +module_exit(wb_fpga_i2c_bus_device_exit); +MODULE_DESCRIPTION("FPGA I2C Devices"); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("support"); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6951-64hc-cp/modules/driver/wb_fpga_pca954x_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6951-64hc-cp/modules/driver/wb_fpga_pca954x_device.c new file mode 100644 index 00000000000..6f9bdc16e81 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6951-64hc-cp/modules/driver/wb_fpga_pca954x_device.c @@ -0,0 +1,524 @@ +/* + * An wb_fpga_pca954x_device driver for fpga pca954x device function + * + * Copyright (C) 2024 Micas Networks Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include + +#include + +static int g_wb_fpga_pca954x_device_debug = 0; +static int g_wb_fpga_pca954x_device_error = 0; + +module_param(g_wb_fpga_pca954x_device_debug, int, S_IRUGO | S_IWUSR); +module_param(g_wb_fpga_pca954x_device_error, int, S_IRUGO | S_IWUSR); + +#define WB_FPGA_PCA954X_DEVICE_DEBUG_VERBOSE(fmt, args...) do { \ + if (g_wb_fpga_pca954x_device_debug) { \ + printk(KERN_INFO "[WB_FPGA_PCA954X_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +#define WB_FPGA_PCA954X_DEVICE_DEBUG_ERROR(fmt, args...) do { \ + if (g_wb_fpga_pca954x_device_error) { \ + printk(KERN_ERR "[WB_FPGA_PCA954X_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +/* CPLD-I2C-MASTER-1 */ +static fpga_pca954x_device_t fpga_pca954x_device_data0 = { + .i2c_bus = 401, + .i2c_addr = 0x70, + .pca9548_base_nr = 426, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data1 = { + .i2c_bus = 426, + .i2c_addr = 0x76, + .pca9548_base_nr = 51, + .fpga_9548_flag = 2, + .fpga_9548_reset_flag = 1, +}; + +/* CPLD-I2C-MASTER-4 */ +static fpga_pca954x_device_t fpga_pca954x_device_data2 = { + .i2c_bus = 402, + .i2c_addr = 0x70, + .pca9548_base_nr = 427, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data3 = { + .i2c_bus = 427, + .i2c_addr = 0x77, + .pca9548_base_nr = 59, + .fpga_9548_flag = 2, + .fpga_9548_reset_flag = 1, +}; + +/* CPLD-I2C-MASTER-3 */ +static fpga_pca954x_device_t fpga_pca954x_device_data6 = { + .i2c_bus = 403, + .i2c_addr = 0x71, + .pca9548_base_nr = 428, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data7 = { + .i2c_bus = 428, + .i2c_addr = 0x77, + .pca9548_base_nr = 67, + .fpga_9548_flag = 2, + .fpga_9548_reset_flag = 1, +}; + +/* fpga-i2c-1 */ +static fpga_pca954x_device_t fpga_pca954x_device_data8 = { + .i2c_bus = 404, + .i2c_addr = 0x70, + .pca9548_base_nr = 429, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data9 = { + .i2c_bus = 429, + .i2c_addr = 0x76, + .pca9548_base_nr = 75, + .fpga_9548_flag = 2, + .fpga_9548_reset_flag = 1, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data10 = { + .i2c_bus = 405, + .i2c_addr = 0x70, + .pca9548_base_nr = 430, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data11 = { + .i2c_bus = 430, + .i2c_addr = 0x76, + .pca9548_base_nr = 83, + .fpga_9548_flag = 2, + .fpga_9548_reset_flag = 1, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data12 = { + .i2c_bus = 406, + .i2c_addr = 0x71, + .pca9548_base_nr = 431, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data13 = { + .i2c_bus = 431, + .i2c_addr = 0x76, + .pca9548_base_nr = 91, + .fpga_9548_flag = 2, + .fpga_9548_reset_flag = 1, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data14 = { + .i2c_bus = 407, + .i2c_addr = 0x70, + .pca9548_base_nr = 99, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data15 = { + .i2c_bus = 408, + .i2c_addr = 0x70, + .pca9548_base_nr = 103, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data16 = { + .i2c_bus = 409, + .i2c_addr = 0x70, + .pca9548_base_nr = 107, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data17 = { + .i2c_bus = 410, + .i2c_addr = 0x70, + .pca9548_base_nr = 201, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data18 = { + .i2c_bus = 411, + .i2c_addr = 0x70, + .pca9548_base_nr = 205, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data19 = { + .i2c_bus = 412, + .i2c_addr = 0x70, + .pca9548_base_nr = 209, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data20 = { + .i2c_bus = 413, + .i2c_addr = 0x70, + .pca9548_base_nr = 213, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data21 = { + .i2c_bus = 414, + .i2c_addr = 0x70, + .pca9548_base_nr = 217, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data22 = { + .i2c_bus = 415, + .i2c_addr = 0x70, + .pca9548_base_nr = 221, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data23 = { + .i2c_bus = 416, + .i2c_addr = 0x70, + .pca9548_base_nr = 225, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data24 = { + .i2c_bus = 417, + .i2c_addr = 0x70, + .pca9548_base_nr = 229, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data25 = { + .i2c_bus = 418, + .i2c_addr = 0x70, + .pca9548_base_nr = 233, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data26 = { + .i2c_bus = 419, + .i2c_addr = 0x70, + .pca9548_base_nr = 237, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data27 = { + .i2c_bus = 420, + .i2c_addr = 0x70, + .pca9548_base_nr = 241, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data28 = { + .i2c_bus = 421, + .i2c_addr = 0x70, + .pca9548_base_nr = 245, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data29 = { + .i2c_bus = 422, + .i2c_addr = 0x70, + .pca9548_base_nr = 249, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data30 = { + .i2c_bus = 423, + .i2c_addr = 0x70, + .pca9548_base_nr = 253, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data31 = { + .i2c_bus = 424, + .i2c_addr = 0x70, + .pca9548_base_nr = 257, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data32 = { + .i2c_bus = 425, + .i2c_addr = 0x70, + .pca9548_base_nr = 261, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data33 = { + .i2c_bus = 434, + .i2c_addr = 0x71, + .pca9548_base_nr = 435, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data34 = { + .i2c_bus = 435, + .i2c_addr = 0x73, + .pca9548_base_nr = 111, + .fpga_9548_flag = 2, + .fpga_9548_reset_flag = 1, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data35 = { + .i2c_bus = 436, + .i2c_addr = 0x71, + .pca9548_base_nr = 119, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +static fpga_pca954x_device_t fpga_pca954x_device_data36 = { + .i2c_bus = 432, + .i2c_addr = 0x71, + .pca9548_base_nr = 265, + .fpga_9548_flag = 1, + .fpga_9548_reset_flag = 0, +}; + +struct i2c_board_info fpga_pca954x_device_info[] = { + { + .type = "wb_fpga_pca9541", + .platform_data = &fpga_pca954x_device_data0, + }, + { + .type = "wb_fpga_pca9548", + .platform_data = &fpga_pca954x_device_data1, + }, + { + .type = "wb_fpga_pca9541", + .platform_data = &fpga_pca954x_device_data2, + }, + { + .type = "wb_fpga_pca9548", + .platform_data = &fpga_pca954x_device_data3, + }, + { + .type = "wb_fpga_pca9541", + .platform_data = &fpga_pca954x_device_data6, + }, + { + .type = "wb_fpga_pca9548", + .platform_data = &fpga_pca954x_device_data7, + }, + { + .type = "wb_fpga_pca9541", + .platform_data = &fpga_pca954x_device_data8, + }, + { + .type = "wb_fpga_pca9548", + .platform_data = &fpga_pca954x_device_data9, + }, + { + .type = "wb_fpga_pca9541", + .platform_data = &fpga_pca954x_device_data10, + }, + { + .type = "wb_fpga_pca9548", + .platform_data = &fpga_pca954x_device_data11, + }, + { + .type = "wb_fpga_pca9541", + .platform_data = &fpga_pca954x_device_data12, + }, + { + .type = "wb_fpga_pca9548", + .platform_data = &fpga_pca954x_device_data13, + }, + { + .type = "wb_fpga_pca9544", + .platform_data = &fpga_pca954x_device_data14, + }, + { + .type = "wb_fpga_pca9544", + .platform_data = &fpga_pca954x_device_data15, + }, + { + .type = "wb_fpga_pca9544", + .platform_data = &fpga_pca954x_device_data16, + }, + { + .type = "wb_fpga_pca9544", + .platform_data = &fpga_pca954x_device_data17, + }, + { + .type = "wb_fpga_pca9544", + .platform_data = &fpga_pca954x_device_data18, + }, + { + .type = "wb_fpga_pca9544", + .platform_data = &fpga_pca954x_device_data19, + }, + { + .type = "wb_fpga_pca9544", + .platform_data = &fpga_pca954x_device_data20, + }, + { + .type = "wb_fpga_pca9544", + .platform_data = &fpga_pca954x_device_data21, + }, + { + .type = "wb_fpga_pca9544", + .platform_data = &fpga_pca954x_device_data22, + }, + { + .type = "wb_fpga_pca9544", + .platform_data = &fpga_pca954x_device_data23, + }, + { + .type = "wb_fpga_pca9544", + .platform_data = &fpga_pca954x_device_data24, + }, + { + .type = "wb_fpga_pca9544", + .platform_data = &fpga_pca954x_device_data25, + }, + { + .type = "wb_fpga_pca9544", + .platform_data = &fpga_pca954x_device_data26, + }, + { + .type = "wb_fpga_pca9544", + .platform_data = &fpga_pca954x_device_data27, + }, + { + .type = "wb_fpga_pca9544", + .platform_data = &fpga_pca954x_device_data28, + }, + { + .type = "wb_fpga_pca9544", + .platform_data = &fpga_pca954x_device_data29, + }, + { + .type = "wb_fpga_pca9544", + .platform_data = &fpga_pca954x_device_data30, + }, + { + .type = "wb_fpga_pca9544", + .platform_data = &fpga_pca954x_device_data31, + }, + { + .type = "wb_fpga_pca9544", + .platform_data = &fpga_pca954x_device_data32, + }, + { + .type = "wb_fpga_pca9541", + .platform_data = &fpga_pca954x_device_data33, + }, + { + .type = "wb_fpga_pca9548", + .platform_data = &fpga_pca954x_device_data34, + }, + { + .type = "wb_fpga_pca9544", + .platform_data = &fpga_pca954x_device_data35, + }, + { + .type = "wb_fpga_pca9544", + .platform_data = &fpga_pca954x_device_data36, + }, +}; + +static int __init wb_fpga_pca954x_device_init(void) +{ + int i; + struct i2c_adapter *adap; + struct i2c_client *client; + fpga_pca954x_device_t *fpga_pca954x_device_data; + + WB_FPGA_PCA954X_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = 0; i < ARRAY_SIZE(fpga_pca954x_device_info); i++) { + fpga_pca954x_device_data = fpga_pca954x_device_info[i].platform_data; + fpga_pca954x_device_info[i].addr = fpga_pca954x_device_data->i2c_addr; + adap = i2c_get_adapter(fpga_pca954x_device_data->i2c_bus); + if (adap == NULL) { + fpga_pca954x_device_data->client = NULL; + printk(KERN_ERR "get i2c bus %d adapter fail.\n", fpga_pca954x_device_data->i2c_bus); + continue; + } + client = i2c_new_client_device(adap, &fpga_pca954x_device_info[i]); + if (!client) { + fpga_pca954x_device_data->client = NULL; + printk(KERN_ERR "Failed to register fpga pca954x device %d at bus %d!\n", + fpga_pca954x_device_data->i2c_addr, fpga_pca954x_device_data->i2c_bus); + } else { + fpga_pca954x_device_data->client = client; + } + i2c_put_adapter(adap); + } + return 0; +} + +static void __exit wb_fpga_pca954x_device_exit(void) +{ + int i; + fpga_pca954x_device_t *fpga_pca954x_device_data; + + WB_FPGA_PCA954X_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = ARRAY_SIZE(fpga_pca954x_device_info) - 1; i >= 0; i--) { + fpga_pca954x_device_data = fpga_pca954x_device_info[i].platform_data; + if (fpga_pca954x_device_data->client) { + i2c_unregister_device(fpga_pca954x_device_data->client); + fpga_pca954x_device_data->client = NULL; + } + } +} + +module_init(wb_fpga_pca954x_device_init); +module_exit(wb_fpga_pca954x_device_exit); +MODULE_DESCRIPTION("FPGA PCA954X Devices"); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("support"); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6951-64hc-cp/modules/driver/wb_i2c_dev_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6951-64hc-cp/modules/driver/wb_i2c_dev_device.c new file mode 100644 index 00000000000..ee6b9959435 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6951-64hc-cp/modules/driver/wb_i2c_dev_device.c @@ -0,0 +1,197 @@ +/* + * An wb_io_dev_device driver for io device function + * + * Copyright (C) 2024 Micas Networks Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include + +#include + +static int g_wb_i2c_dev_device_debug = 0; +static int g_wb_i2c_dev_device_error = 0; + +module_param(g_wb_i2c_dev_device_debug, int, S_IRUGO | S_IWUSR); +module_param(g_wb_i2c_dev_device_error, int, S_IRUGO | S_IWUSR); + +#define WB_I2C_DEV_DEVICE_DEBUG_VERBOSE(fmt, args...) do { \ + if (g_wb_i2c_dev_device_debug) { \ + printk(KERN_INFO "[WB_I2C_DEV_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +#define WB_I2C_DEV_DEVICE_DEBUG_ERROR(fmt, args...) do { \ + if (g_wb_i2c_dev_device_error) { \ + printk(KERN_ERR "[WB_I2C_DEV_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +/* mac cplda */ +static i2c_dev_device_t i2c_dev_device_data0 = { + .i2c_bus = 99, + .i2c_addr = 0x1d, + .i2c_name = "cpld6", + .data_bus_width = 1, + .addr_bus_width = 1, + .per_rd_len = 256, + .per_wr_len = 256, + .i2c_len = 256, +}; + +/* mac cpldb */ +static i2c_dev_device_t i2c_dev_device_data1 = { + .i2c_bus = 100, + .i2c_addr = 0x3d, + .i2c_name = "cpld7", + .data_bus_width = 1, + .addr_bus_width = 1, + .per_rd_len = 256, + .per_wr_len = 256, + .i2c_len = 256, +}; + +/* io cpld */ +static i2c_dev_device_t i2c_dev_device_data2 = { + .i2c_bus = 107, + .i2c_addr = 0x2d, + .i2c_name = "cpld8", + .data_bus_width = 1, + .addr_bus_width = 1, + .per_rd_len = 256, + .per_wr_len = 256, + .i2c_len = 256, +}; + +/* fan cpld */ +static i2c_dev_device_t i2c_dev_device_data3 = { + .i2c_bus = 427, + .i2c_addr = 0x0d, + .i2c_name = "cpld10", + .data_bus_width = 1, + .addr_bus_width = 1, + .per_rd_len = 256, + .per_wr_len = 256, + .i2c_len = 256, +}; + +/* CPU cpld */ +static i2c_dev_device_t i2c_dev_device_data4 = { + .i2c_bus = 0, + .i2c_addr = 0x0d, + .i2c_name = "cpld0", + .data_bus_width = 1, + .addr_bus_width = 1, + .per_rd_len = 256, + .per_wr_len = 256, + .i2c_len = 256, +}; + +/* BASE cpld */ +static i2c_dev_device_t i2c_dev_device_data5 = { + .i2c_bus = 21, + .i2c_addr = 0x0d, + .i2c_name = "cpld1", + .data_bus_width = 1, + .addr_bus_width = 1, + .per_rd_len = 256, + .per_wr_len = 256, + .i2c_len = 256, +}; + + +struct i2c_board_info i2c_dev_device_info[] = { + { + .type = "wb-i2c-dev", + .platform_data = &i2c_dev_device_data0, + }, + { + .type = "wb-i2c-dev", + .platform_data = &i2c_dev_device_data1, + }, + { + .type = "wb-i2c-dev", + .platform_data = &i2c_dev_device_data2, + }, + { + .type = "wb-i2c-dev", + .platform_data = &i2c_dev_device_data3, + }, + { + .type = "wb-i2c-dev", + .platform_data = &i2c_dev_device_data4, + }, + { + .type = "wb-i2c-dev", + .platform_data = &i2c_dev_device_data5, + }, +}; + +static int __init wb_i2c_dev_device_init(void) +{ + int i; + struct i2c_adapter *adap; + struct i2c_client *client; + i2c_dev_device_t *i2c_dev_device_data; + + WB_I2C_DEV_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = 0; i < ARRAY_SIZE(i2c_dev_device_info); i++) { + i2c_dev_device_data = i2c_dev_device_info[i].platform_data; + i2c_dev_device_info[i].addr = i2c_dev_device_data->i2c_addr; + adap = i2c_get_adapter(i2c_dev_device_data->i2c_bus); + if (adap == NULL) { + i2c_dev_device_data->client = NULL; + printk(KERN_ERR "get i2c bus %d adapter fail.\n", i2c_dev_device_data->i2c_bus); + continue; + } + client = i2c_new_client_device(adap, &i2c_dev_device_info[i]); + if (!client) { + i2c_dev_device_data->client = NULL; + printk(KERN_ERR "Failed to register i2c dev device %d at bus %d!\n", + i2c_dev_device_data->i2c_addr, i2c_dev_device_data->i2c_bus); + } else { + i2c_dev_device_data->client = client; + } + i2c_put_adapter(adap); + } + return 0; +} + +static void __exit wb_i2c_dev_device_exit(void) +{ + int i; + i2c_dev_device_t *i2c_dev_device_data; + + WB_I2C_DEV_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = ARRAY_SIZE(i2c_dev_device_info) - 1; i >= 0; i--) { + i2c_dev_device_data = i2c_dev_device_info[i].platform_data; + if (i2c_dev_device_data->client) { + i2c_unregister_device(i2c_dev_device_data->client); + i2c_dev_device_data->client = NULL; + } + } +} + +module_init(wb_i2c_dev_device_init); +module_exit(wb_i2c_dev_device_exit); +MODULE_DESCRIPTION("I2C DEV Devices"); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("support"); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6951-64hc-cp/modules/driver/wb_i2c_mux_pca954x_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6951-64hc-cp/modules/driver/wb_i2c_mux_pca954x_device.c new file mode 100644 index 00000000000..57896e72a52 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6951-64hc-cp/modules/driver/wb_i2c_mux_pca954x_device.c @@ -0,0 +1,149 @@ +/* + * An wb_i2c_mux_pca954x_device driver for pca954x i2c load device function + * + * Copyright (C) 2024 Micas Networks Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include + +#include + +static int g_wb_i2c_mux_pca954x_device_debug = 0; +static int g_wb_i2c_mux_pca954x_device_error = 0; + +module_param(g_wb_i2c_mux_pca954x_device_debug, int, S_IRUGO | S_IWUSR); +module_param(g_wb_i2c_mux_pca954x_device_error, int, S_IRUGO | S_IWUSR); + +#define WB_I2C_MUX_PCA954X_DEVICE_DEBUG_VERBOSE(fmt, args...) do { \ + if (g_wb_i2c_mux_pca954x_device_debug) { \ + printk(KERN_INFO "[WB_I2C_MUX_PCA954X_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +#define WB_I2C_MUX_PCA954X_DEVICE_DEBUG_ERROR(fmt, args...) do { \ + if (g_wb_i2c_mux_pca954x_device_error) { \ + printk(KERN_ERR "[WB_I2C_MUX_PCA954X_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data0 = { + .i2c_bus = 1, + .i2c_addr = 0x70, + .probe_disable = 1, + .select_chan_check = 1, + .close_chan_force_reset = 1, + .pca9548_base_nr = 2, + .pca9548_reset_type = PCA9548_RESET_I2C, + .rst_delay_b = 0, + .rst_delay = 1000, + .rst_delay_a = 1000, + .attr = { + .i2c_attr.i2c_bus = 1, + .i2c_attr.i2c_addr = 0x0d, + .i2c_attr.reg_offset = 0x74, + .i2c_attr.mask = 0xFF, + .i2c_attr.reset_on = 0x8A, + .i2c_attr.reset_off = 0x8B, + }, +}; + +static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data1 = { + .i2c_bus = 1, + .i2c_addr = 0x71, + .probe_disable = 1, + .select_chan_check = 1, + .close_chan_force_reset = 1, + .pca9548_base_nr = 10, + .pca9548_reset_type = PCA9548_RESET_I2C, + .rst_delay_b = 0, + .rst_delay = 1000, + .rst_delay_a = 1000, + .attr = { + .i2c_attr.i2c_bus = 107, + .i2c_attr.i2c_addr = 0x2d, + .i2c_attr.reg_offset = 0xd4, + .i2c_attr.mask = 0xFF, + .i2c_attr.reset_on = 0x2A, + .i2c_attr.reset_off = 0x2B, + }, +}; + +struct i2c_board_info i2c_mux_pca954x_device_info[] = { + { + .type = "wb_pca9548", + .platform_data = &i2c_mux_pca954x_device_data0, + }, + { + .type = "wb_pca9548", + .platform_data = &i2c_mux_pca954x_device_data1, + }, +}; + +static int __init wb_i2c_mux_pca954x_device_init(void) +{ + int i; + struct i2c_adapter *adap; + struct i2c_client *client; + i2c_mux_pca954x_device_t *i2c_mux_pca954x_device_data; + WB_I2C_MUX_PCA954X_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = 0; i < ARRAY_SIZE(i2c_mux_pca954x_device_info); i++) { + i2c_mux_pca954x_device_data = i2c_mux_pca954x_device_info[i].platform_data; + i2c_mux_pca954x_device_info[i].addr = i2c_mux_pca954x_device_data->i2c_addr; + adap = i2c_get_adapter(i2c_mux_pca954x_device_data->i2c_bus); + if (adap == NULL) { + i2c_mux_pca954x_device_data->client = NULL; + printk(KERN_ERR "get i2c bus %d adapter fail.\n", i2c_mux_pca954x_device_data->i2c_bus); + continue; + } + client = i2c_new_client_device(adap, &i2c_mux_pca954x_device_info[i]); + if (!client) { + i2c_mux_pca954x_device_data->client = NULL; + printk(KERN_ERR "Failed to register pca954x device %d at bus %d!\n", + i2c_mux_pca954x_device_data->i2c_addr, i2c_mux_pca954x_device_data->i2c_bus); + } else { + i2c_mux_pca954x_device_data->client = client; + } + i2c_put_adapter(adap); + } + return 0; +} + +static void __exit wb_i2c_mux_pca954x_device_exit(void) +{ + int i; + i2c_mux_pca954x_device_t *i2c_mux_pca954x_device_data; + + WB_I2C_MUX_PCA954X_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = ARRAY_SIZE(i2c_mux_pca954x_device_info) - 1; i >= 0; i--) { + i2c_mux_pca954x_device_data = i2c_mux_pca954x_device_info[i].platform_data; + if (i2c_mux_pca954x_device_data->client) { + i2c_unregister_device(i2c_mux_pca954x_device_data->client); + i2c_mux_pca954x_device_data->client = NULL; + } + } +} + +module_init(wb_i2c_mux_pca954x_device_init); +module_exit(wb_i2c_mux_pca954x_device_exit); +MODULE_DESCRIPTION("WB I2C MUX PCA954X Devices"); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("support"); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6951-64hc-cp/modules/driver/wb_indirect_dev_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6951-64hc-cp/modules/driver/wb_indirect_dev_device.c new file mode 100644 index 00000000000..3af007789af --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6951-64hc-cp/modules/driver/wb_indirect_dev_device.c @@ -0,0 +1,162 @@ +/* + * An wb_indirect_dev_device driver for indirect load device function + * + * Copyright (C) 2024 Micas Networks Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include + +#include + +static int g_indirect_dev_device_debug = 0; +static int g_indirect_dev_device_error = 0; + +module_param(g_indirect_dev_device_debug, int, S_IRUGO | S_IWUSR); +module_param(g_indirect_dev_device_error, int, S_IRUGO | S_IWUSR); + +#define INDIRECT_DEV_DEVICE_DEBUG_VERBOSE(fmt, args...) do { \ + if (g_indirect_dev_device_debug) { \ + printk(KERN_INFO "[INDIRECT_DEV_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +#define INDIRECT_DEV_DEVICE_DEBUG_ERROR(fmt, args...) do { \ + if (g_indirect_dev_device_error) { \ + printk(KERN_ERR "[INDIRECT_DEV_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +/* CPLD-I2C-MASTER-1 */ +static indirect_dev_device_t indirect_dev_device_data0 = { + .logic_func_mode = 5, /* SYMBOL_SPI_DEV_MODE */ + .dev_name = "cpld2", + .logic_dev_name = "/dev/cpld11", + .data_bus_width = 4, + .wr_data = 0x80, + .addr_low = 0x84, + .addr_high = 0x85, + .rd_data = 0x86, + .opt_ctl = 0x8a, + .indirect_len = 0x200, + .lock_mode = 2, /* 1:spin lock, 2:mutex */ +}; + +/* CPLD-I2C-MASTER-3 */ +static indirect_dev_device_t indirect_dev_device_data2 = { + .logic_func_mode = 5, /* SYMBOL_SPI_DEV_MODE */ + .dev_name = "cpld4", + .logic_dev_name = "/dev/cpld11", + .data_bus_width = 4, + .wr_data = 0x8b, + .addr_low = 0x8f, + .addr_high = 0x90, + .rd_data = 0x91, + .opt_ctl = 0x95, + .indirect_len = 0x200, + .lock_mode = 2, /* 1:spin lock, 2:mutex */ +}; + +/* CPLD-I2C-MASTER-4 */ +static indirect_dev_device_t indirect_dev_device_data3 = { + .logic_func_mode = 5, /* SYMBOL_SPI_DEV_MODE */ + .dev_name = "cpld5", + .logic_dev_name = "/dev/cpld11", + .data_bus_width = 4, + .wr_data = 0x96, + .addr_low = 0x9a, + .addr_high = 0x9b, + .rd_data = 0x9c, + .opt_ctl = 0xa0, + .indirect_len = 0x200, + .lock_mode = 2, /* 1:spin lock, 2:mutex */ +}; + +static void indirect_dev_device_bus_device_release(struct device *dev) +{ + return; +} + +static struct platform_device indirect_dev_device[] = { + { + .name = "wb-indirect-dev", + .id = 1, + .dev = { + .platform_data = &indirect_dev_device_data0, + .release = indirect_dev_device_bus_device_release, + }, + }, + { + .name = "wb-indirect-dev", + .id = 2, + .dev = { + .platform_data = &indirect_dev_device_data2, + .release = indirect_dev_device_bus_device_release, + }, + }, + { + .name = "wb-indirect-dev", + .id = 3, + .dev = { + .platform_data = &indirect_dev_device_data3, + .release = indirect_dev_device_bus_device_release, + }, + }, +}; + +static int __init indirect_dev_device_bus_device_init(void) +{ + int i; + int ret = 0; + indirect_dev_device_t *indirect_dev_device_data; + + INDIRECT_DEV_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = 0; i < ARRAY_SIZE(indirect_dev_device); i++) { + indirect_dev_device_data = indirect_dev_device[i].dev.platform_data; + ret = platform_device_register(&indirect_dev_device[i]); + if (ret < 0) { + indirect_dev_device_data->device_flag = -1; /* device register failed, set flag -1 */ + printk(KERN_ERR "wb-indirect-dev.%d register failed!\n", i + 1); + } else { + indirect_dev_device_data->device_flag = 0; /* device register suucess, set flag 0 */ + } + } + return 0; +} + +static void __exit indirect_dev_device_bus_device_exit(void) +{ + int i; + indirect_dev_device_t *indirect_dev_device_data; + + INDIRECT_DEV_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = ARRAY_SIZE(indirect_dev_device) - 1; i >= 0; i--) { + indirect_dev_device_data = indirect_dev_device[i].dev.platform_data; + if (indirect_dev_device_data->device_flag == 0) { /* device register success, need unregister */ + platform_device_unregister(&indirect_dev_device[i]); + } + } +} + +module_init(indirect_dev_device_bus_device_init); +module_exit(indirect_dev_device_bus_device_exit); +MODULE_DESCRIPTION("INDIRECT DEV Devices"); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("support"); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6951-64hc-cp/modules/driver/wb_pcie_dev_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6951-64hc-cp/modules/driver/wb_pcie_dev_device.c new file mode 100644 index 00000000000..2c8c0a5e357 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6951-64hc-cp/modules/driver/wb_pcie_dev_device.c @@ -0,0 +1,139 @@ +/* + * An wb_pcie_dev_device driver for pcie device function + * + * Copyright (C) 2024 Micas Networks Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include + +#include + +static int g_wb_pcie_dev_device_debug = 0; +static int g_wb_pcie_dev_device_error = 0; + +module_param(g_wb_pcie_dev_device_debug, int, S_IRUGO | S_IWUSR); +module_param(g_wb_pcie_dev_device_error, int, S_IRUGO | S_IWUSR); + +#define WB_PCIE_DEV_DEVICE_DEBUG_VERBOSE(fmt, args...) do { \ + if (g_wb_pcie_dev_device_debug) { \ + printk(KERN_INFO "[WB_PCIE_DEV_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +#define WB_PCIE_DEV_DEVICE_DEBUG_ERROR(fmt, args...) do { \ + if (g_wb_pcie_dev_device_error) { \ + printk(KERN_ERR "[WB_PCIE_DEV_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +/*mac fpga */ +static pci_dev_device_t pcie_dev_device_data0 = { + .pci_dev_name = "fpga0", + .pci_domain = 0x0000, + .pci_bus = 7, + .pci_slot = 0x00, + .pci_fn = 0, + .pci_bar = 0, + .bus_width = 4, + .search_mode = 1, + .bridge_bus = 0, + .bridge_slot = 0x03, + .bridge_fn = 1, +}; + + +static pci_dev_device_t pcie_dev_device_data1 = { + .pci_dev_name = "fpga1", + .pci_domain = 0x0000, + .pci_bus = 9, + .pci_slot = 0x00, + .pci_fn = 0, + .pci_bar = 0, + .bus_width = 4, + .search_mode = 1, + .bridge_bus = 0, + .bridge_slot = 0x03, + .bridge_fn = 4, +}; + +static void wb_pcie_dev_device_release(struct device *dev) +{ + return; +} + +static struct platform_device pcie_dev_device[] = { + { + .name = "wb-pci-dev", + .id = 1, + .dev = { + .platform_data = &pcie_dev_device_data0, + .release = wb_pcie_dev_device_release, + }, + }, + { + .name = "wb-pci-dev", + .id = 2, + .dev = { + .platform_data = &pcie_dev_device_data1, + .release = wb_pcie_dev_device_release, + }, + }, +}; + +static int __init wb_pcie_dev_device_init(void) +{ + int i; + int ret = 0; + pci_dev_device_t *pcie_dev_device_data; + + WB_PCIE_DEV_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = 0; i < ARRAY_SIZE(pcie_dev_device); i++) { + pcie_dev_device_data = pcie_dev_device[i].dev.platform_data; + ret = platform_device_register(&pcie_dev_device[i]); + if (ret < 0) { + pcie_dev_device_data->device_flag = -1; /* device register failed, set flag -1 */ + printk(KERN_ERR "wb-pci-dev.%d register failed!\n", i + 1); + } else { + pcie_dev_device_data->device_flag = 0; /* device register suucess, set flag 0 */ + } + } + return 0; +} + +static void __exit wb_pcie_dev_device_exit(void) +{ + int i; + pci_dev_device_t *pcie_dev_device_data; + + WB_PCIE_DEV_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = ARRAY_SIZE(pcie_dev_device) - 1; i >= 0; i--) { + pcie_dev_device_data = pcie_dev_device[i].dev.platform_data; + if (pcie_dev_device_data->device_flag == 0) { /* device register success, need unregister */ + platform_device_unregister(&pcie_dev_device[i]); + } + } +} + +module_init(wb_pcie_dev_device_init); +module_exit(wb_pcie_dev_device_exit); +MODULE_DESCRIPTION("PCIE DEV Devices"); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("support"); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6951-64hc-cp/modules/driver/wb_spi_dev_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6951-64hc-cp/modules/driver/wb_spi_dev_device.c new file mode 100644 index 00000000000..30f577a7bac --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6951-64hc-cp/modules/driver/wb_spi_dev_device.c @@ -0,0 +1,126 @@ +/* + * An wb_spi_dev_device driver for spi device function + * + * Copyright (C) 2024 Micas Networks Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include + +#include +#include "wb_spi_master.h" + +#define SPI_DEVICE_MAX_NUM (64) + +static int g_wb_spi_dev_device_debug = 0; +static int g_wb_spi_dev_device_error = 0; + +module_param(g_wb_spi_dev_device_debug, int, S_IRUGO | S_IWUSR); +module_param(g_wb_spi_dev_device_error, int, S_IRUGO | S_IWUSR); + +#define WB_SPI_DEV_DEVICE_DEBUG_VERBOSE(fmt, args...) do { \ + if (g_wb_spi_dev_device_debug) { \ + printk(KERN_INFO "[WB_SPI_DEV_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +#define WB_SPI_DEV_DEVICE_DEBUG_ERROR(fmt, args...) do { \ + if (g_wb_spi_dev_device_error) { \ + printk(KERN_ERR "[WB_SPI_DEV_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +static spi_dev_device_t spi_dev_device_data0 = { + .spi_dev_name = "cpld11", + .data_bus_width = 1, + .addr_bus_width = 1, + .per_rd_len = 1, + .per_wr_len = 1, + .spi_len = 0x100, +}; + +static struct spi_device *g_spi_device[SPI_DEVICE_MAX_NUM]; + +struct spi_board_info spi_dev_device_info[] = { + { + .modalias = "wb-spi-dev", + .max_speed_hz = 3000000, + .bus_num = 1, + .chip_select = 0, + .mode = SPI_MODE_3, + .platform_data = &spi_dev_device_data0, + }, +}; + +static int __init wb_spi_dev_device_init(void) +{ + int i; + struct spi_controller *ctlr; + struct spi_device *spi; + int spi_dev_num; + + WB_SPI_DEV_DEVICE_DEBUG_VERBOSE("enter!\n"); + + spi_dev_num = ARRAY_SIZE(spi_dev_device_info); + if (spi_dev_num > SPI_DEVICE_MAX_NUM) { + printk(KERN_ERR "spi_dev_num[%d] is bigger than max_num[%d].\n", + spi_dev_num, SPI_DEVICE_MAX_NUM); + return -EINVAL; + } + + for (i = 0; i < ARRAY_SIZE(spi_dev_device_info); i++) { + ctlr = wb_spi_master_busnum_to_master(spi_dev_device_info[i].bus_num); + if (!ctlr) { + printk(KERN_ERR "get bus_num %u spi master failed.\n", + spi_dev_device_info[i].bus_num); + continue; + } + spi = spi_new_device(ctlr, &spi_dev_device_info[i]); + spi_controller_put(ctlr); + if (spi) { + g_spi_device[i] = spi; + } else { + g_spi_device[i] = NULL; + printk(KERN_ERR "Failed to register spi dev device %s at bus %d!\n", + spi_dev_device_info[i].modalias, spi_dev_device_info[i].bus_num); + continue; + } + } + return 0; +} + +static void __exit wb_spi_dev_device_exit(void) +{ + int i; + + WB_SPI_DEV_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = ARRAY_SIZE(spi_dev_device_info) - 1; i >= 0; i--) { + if (g_spi_device[i]) { + spi_unregister_device(g_spi_device[i]); + g_spi_device[i] = NULL; + } + } +} + +module_init(wb_spi_dev_device_init); +module_exit(wb_spi_dev_device_exit); +MODULE_DESCRIPTION("SPI DEV Devices"); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("support"); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6951-64hc-cp/modules/driver/wb_spi_ocores_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6951-64hc-cp/modules/driver/wb_spi_ocores_device.c new file mode 100644 index 00000000000..5cfa231cdff --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6951-64hc-cp/modules/driver/wb_spi_ocores_device.c @@ -0,0 +1,115 @@ +/* + * An wb_spi_ocores_device driver for spi ocores device function + * + * Copyright (C) 2024 Micas Networks Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include + +#include + +static int g_wb_spi_ocores_device_debug = 0; +static int g_wb_spi_ocores_device_error = 0; + +module_param(g_wb_spi_ocores_device_debug, int, S_IRUGO | S_IWUSR); +module_param(g_wb_spi_ocores_device_error, int, S_IRUGO | S_IWUSR); + +#define WB_SPI_OCORE_DEVICE_DEBUG_VERBOSE(fmt, args...) do { \ + if (g_wb_spi_ocores_device_debug) { \ + printk(KERN_INFO "[WB_SPI_OCORE_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +#define WB_SPI_OCORE_DEVICE_DEBUG_ERROR(fmt, args...) do { \ + if (g_wb_spi_ocores_device_error) { \ + printk(KERN_ERR "[WB_SPI_OCORE_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +static spi_ocores_device_t spi_ocores_device_data0 = { + .bus_num = 1, + .big_endian = 0, + .dev_name = "/dev/fpga0", + .reg_access_mode = 3, + .dev_base = 0x400, + .reg_shift = 2, + .reg_io_width = 4, + .clock_frequency = 125000000, /* 125M */ + .num_chipselect = 8, + .irq_flag = 0, + .spioc_mode = 1, +}; + +static void wb_spi_ocores_device_release(struct device *dev) +{ + return; +} + +static struct platform_device spi_ocores_device[] = { + { + .name = "wb-spioc", + .id = 1, + .dev = { + .platform_data = &spi_ocores_device_data0, + .release = wb_spi_ocores_device_release, + }, + }, +}; + +static int __init wb_spi_ocores_device_init(void) +{ + int i; + int ret = 0; + spi_ocores_device_t *spi_ocores_device_data; + + WB_SPI_OCORE_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = 0; i < ARRAY_SIZE(spi_ocores_device); i++) { + spi_ocores_device_data = spi_ocores_device[i].dev.platform_data; + ret = platform_device_register(&spi_ocores_device[i]); + if (ret < 0) { + spi_ocores_device_data->device_flag = -1; /* device register failed, set flag -1 */ + printk(KERN_ERR "wb-spi-oc.%d register failed!\n", i + 1); + } else { + spi_ocores_device_data->device_flag = 0; /* device register suucess, set flag 0 */ + } + } + return 0; +} + +static void __exit wb_spi_ocores_device_exit(void) +{ + int i; + spi_ocores_device_t *spi_ocores_device_data; + + WB_SPI_OCORE_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = ARRAY_SIZE(spi_ocores_device) - 1; i >= 0; i--) { + spi_ocores_device_data = spi_ocores_device[i].dev.platform_data; + if (spi_ocores_device_data->device_flag == 0) { /* device register success, need unregister */ + platform_device_unregister(&spi_ocores_device[i]); + } + } +} + +module_init(wb_spi_ocores_device_init); +module_exit(wb_spi_ocores_device_exit); +MODULE_DESCRIPTION("SPI OCORES Devices"); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("support"); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6951-64hc-cp/modules/driver/wb_wdt_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6951-64hc-cp/modules/driver/wb_wdt_device.c new file mode 100644 index 00000000000..c86e800df5d --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6951-64hc-cp/modules/driver/wb_wdt_device.c @@ -0,0 +1,155 @@ +/* + * An wb_wdt_device driver for watchdog device function + * + * Copyright (C) 2024 Micas Networks Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ +#include +#include +#include +#include +#include + +#include + +static int g_wb_wdt_device_debug = 0; +static int g_wb_wdt_device_error = 0; + +module_param(g_wb_wdt_device_debug, int, S_IRUGO | S_IWUSR); +module_param(g_wb_wdt_device_error, int, S_IRUGO | S_IWUSR); + +#define WB_WDT_DEVICE_DEBUG_VERBOSE(fmt, args...) do { \ + if (g_wb_wdt_device_debug) { \ + printk(KERN_INFO "[WB_WDT_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + +#define WB_WDT_DEVICE_DEBUG_ERROR(fmt, args...) do { \ + if (g_wb_wdt_device_error) { \ + printk(KERN_ERR "[WB_WDT_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \ + } \ +} while (0) + + +static wb_wdt_device_t wb_wdt_device_data_0 = { + .feed_wdt_type = 1, + .hw_margin = 90000, + .feed_time = 5000, + .config_dev_name = "/dev/cpld1", + .config_mode = 1, + .priv_func_mode = 1, + .enable_reg = 0x40, + .enable_val = 0x1, + .disable_val = 0x0, + .enable_mask = 0x1, + .timeout_cfg_reg = 0x41, + .timeleft_cfg_reg = 0x42, + .hw_algo = "toggle", + .wdt_config_mode.gpio_wdt = { + .gpio = 642, + .flags = 1 + }, + .timer_accuracy = 1600, /* 1.6s */ + .sysfs_index = SYSFS_NO_CFG, +}; + +/* sys led */ +static wb_wdt_device_t wb_wdt_device_data_1 = { + .feed_wdt_type = 2, + .hw_margin = 180000, + .feed_time = 30000, + .config_dev_name = "/dev/cpld1", + .config_mode = 2, + .priv_func_mode = 1, + .enable_reg = 0x44, + .enable_val = 0x1, + .disable_val = 0x0, + .enable_mask = 0x1, + .timeout_cfg_reg = 0x46, + .timeleft_cfg_reg = 0x47, + .hw_algo = "toggle", + .wdt_config_mode.logic_wdt = { + .feed_dev_name = "/dev/cpld1", + .feed_reg = 0x45, + .active_val = 0x01, + .logic_func_mode = 1, + }, + .timer_accuracy = 6000, /* 6s */ +}; + +static void wb_wdt_device_release(struct device *dev) +{ + return; +} + +static struct platform_device wb_wdt_device[] = { + { + .name = "wb_wdt", + .id = 0, + .dev = { + .platform_data = &wb_wdt_device_data_0, + .release = wb_wdt_device_release, + }, + }, + { + .name = "wb_wdt", + .id = 1, + .dev = { + .platform_data = &wb_wdt_device_data_1, + .release = wb_wdt_device_release, + }, + }, +}; + +static int __init wb_wdt_device_init(void) +{ + int i; + int ret = 0; + wb_wdt_device_t *wb_wdt_device_data; + + WB_WDT_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = 0; i < ARRAY_SIZE(wb_wdt_device); i++) { + wb_wdt_device_data = wb_wdt_device[i].dev.platform_data; + ret = platform_device_register(&wb_wdt_device[i]); + if (ret < 0) { + wb_wdt_device_data->device_flag = -1; /* device register failed, set flag -1 */ + printk(KERN_ERR "rg-wdt.%d register failed!\n", i + 1); + } else { + wb_wdt_device_data->device_flag = 0; /* device register suucess, set flag 0 */ + } + } + return 0; +} + +static void __exit wb_wdt_device_exit(void) +{ + int i; + wb_wdt_device_t *wb_wdt_device_data; + + WB_WDT_DEVICE_DEBUG_VERBOSE("enter!\n"); + for (i = ARRAY_SIZE(wb_wdt_device) - 1; i >= 0; i--) { + wb_wdt_device_data = wb_wdt_device[i].dev.platform_data; + if (wb_wdt_device_data->device_flag == 0) { /* device register success, need unregister */ + platform_device_unregister(&wb_wdt_device[i]); + } + } +} + +module_init(wb_wdt_device_init); +module_exit(wb_wdt_device_exit); +MODULE_DESCRIPTION("WB WDT Devices"); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("support"); diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6951-64hc-cp/s3ip_sysfs_cfg/cfg_file/CPLD.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6951-64hc-cp/s3ip_sysfs_cfg/cfg_file/CPLD.cfg new file mode 100644 index 00000000000..c85c3aca163 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6951-64hc-cp/s3ip_sysfs_cfg/cfg_file/CPLD.cfg @@ -0,0 +1,275 @@ +# +# @Fill in the agreement +# 1. Complete comments must be filled in before configuration items. Comments must not be filled in the same line of +# configuration items and invalid Spaces must not be added between configuration items +# 2. The value can be in 10 or hexadecimal format. The hexadecimal value starts with "0x" +# 3. Some configuration items do not need to be filled in a specific product. To facilitate other products to copy and +# fill in the configuration items, do not delete them +# 4. Configuration item + +# Set item: System E2 i2c bus address +# Description: Format other_i2c_dev.bus_[main_dev]_[minor_dev] other_i2c_dev.addr_[main_dev]_[minor_dev], +# .bus is configuration item corresponds to the bus number (/dev/i2c-bus) +# .addr is address of the device corresponding to the configuration item on the bus +# Note: main_dev look rg_main_dev_type_t definition, main board is 0, minor_dev is 0 +other_i2c_dev.bus_0_0=1 +other_i2c_dev.addr_0_0=0x56 + +# Configuration item: System E2 path +eeprom_path_0_0=/sys/bus/i2c/devices/1-0056/eeprom + +# Configuration item: System E2 size +eeprom_size_0_0=256 + +# Configuration item: watchdog number +# Description: Format watchdog_id_[index] +watchdog_id_0=0 + +# Configuration item: i2c bus address of the cpld +# Description: Format cpld_i2c_dev.bus_[cpld_slot]_[cpld_id] cpld_i2c_dev.addr_[cpld_slot]_[cpld_id] +# All cpld numbers of each product are customized and do not have to be repeated. +# The numbers are reflected in the upper eight digits of the offset address of the cpld device +# cpld_slot: 1: cable card 1, 2: cable card 2, 3: cable card 3, 4: cable card 4,5: fan adapter board +# cpld_id: 0:CPLD_A 1:CPLD_B +# .bus is configuration item corresponds to the bus number(/dev/i2c-bus) +# .addr is address of the device corresponding to the configuration item on the bus +# Note: This field is optional. This field is not required for a cpld that does not have I2C access +cpld_i2c_dev.bus_0_0=0 +cpld_i2c_dev.addr_0_0=0x0d +cpld_i2c_dev.bus_0_1=21 +cpld_i2c_dev.addr_0_1=0x0d +cpld_i2c_dev.bus_0_2=99 +cpld_i2c_dev.addr_0_2=0x1d +cpld_i2c_dev.bus_0_3=100 +cpld_i2c_dev.addr_0_3=0x3d +cpld_i2c_dev.bus_0_4=107 +cpld_i2c_dev.addr_0_4=0x2d +cpld_i2c_dev.bus_0_5=59 +cpld_i2c_dev.addr_0_5=0x0d + + +# Configuration item: Access mode of each cpld(LPC/I2C) +# Description: Format mode_cpld_[cpld_slot][cpld_slot]=lpc/i2c, cpld_id is cpld number,Start at 0 +# Note: This field is required +mode_cpld_0_0=i2c +mode_cpld_0_1=i2c +mode_cpld_0_2=i2c +mode_cpld_0_3=i2c +mode_cpld_0_4=i2c +mode_cpld_0_5=i2c + +# Configuration item: the number of CPLD +# Description: Format dev_num_[main_dev]_[minor_dev] +# Note: main_dev: indicates that the mainboard is 0, the subPLD is 5, and the minor_dev: CPLD is 8 +dev_num_0_8=6 + +# Configuration item: Name of each cpld +# Description: Format cpld_name_[cpld_id] cpld_id is cpld number,start with 1 +# Note: This field is required +cpld_name_0_0=CPU_CPLD +cpld_name_0_1=BASE_CPLD +cpld_name_0_2=MAC_CPLDA +cpld_name_0_3=MAC_CPLDB +cpld_name_0_4=IO_CPLD +cpld_name_0_5=FAN_CPLD + + +# Configuration item: Model of each cpld +# Description: Format cpld_type_[cpld_id] cpld_idis cpld number,start with 1 +# Note: This field is required +cpld_type_0_0=LATTICE/LCMXO3LF-6900C-5BG400C +cpld_type_0_1=LATTICE/LCMXO3LF-6900C-5BG400C +cpld_type_0_2=LATTICE/LCMXO3LF-4300C-6BG324I +cpld_type_0_3=LATTICE/LCMXO3LF-4300C-6BG324I +cpld_type_0_4=LATTICE/LCMXO3LF-4300C-6BG324I +cpld_type_0_5=LATTICE/LCMXO3LF-6900C-5BG256C + +# Configuration item: Version register of each CPLD +# Description: Format cpld_version_[cpld_id] cpld_id is cpld number,start with 1 +# Note: This field is required +cpld_version.mode_0_0=config +cpld_version.int_cons_0_0= +cpld_version.src_0_0=cpld +cpld_version.frmt_0_0=num_bytes +cpld_version.pola_0_0= +cpld_version.fpath_0_0= +cpld_version.addr_0_0=0x00000000 +cpld_version.len_0_0=4 +cpld_version.bit_offset_0_0= + +cpld_version.mode_0_1=config +cpld_version.int_cons_0_1= +cpld_version.src_0_1=cpld +cpld_version.frmt_0_1=num_bytes +cpld_version.pola_0_1= +cpld_version.fpath_0_1= +cpld_version.addr_0_1=0x00010000 +cpld_version.len_0_1=4 +cpld_version.bit_offset_0_1= + +cpld_version.mode_0_2=config +cpld_version.int_cons_0_2= +cpld_version.src_0_2=cpld +cpld_version.frmt_0_2=num_bytes +cpld_version.pola_0_2= +cpld_version.fpath_0_2= +cpld_version.addr_0_2=0x00020000 +cpld_version.len_0_2=4 +cpld_version.bit_offset_0_2= + +cpld_version.mode_0_3=config +cpld_version.int_cons_0_3= +cpld_version.src_0_3=cpld +cpld_version.frmt_0_3=num_bytes +cpld_version.pola_0_3= +cpld_version.fpath_0_3= +cpld_version.addr_0_3=0x00030000 +cpld_version.len_0_3=4 +cpld_version.bit_offset_0_3= + +cpld_version.mode_0_4=config +cpld_version.int_cons_0_4= +cpld_version.src_0_4=cpld +cpld_version.frmt_0_4=num_bytes +cpld_version.pola_0_4= +cpld_version.fpath_0_4= +cpld_version.addr_0_4=0x00040000 +cpld_version.len_0_4=4 +cpld_version.bit_offset_0_4= + +cpld_version.mode_0_5=config +cpld_version.int_cons_0_5= +cpld_version.src_0_5=cpld +cpld_version.frmt_0_5=num_bytes +cpld_version.pola_0_5= +cpld_version.fpath_0_5= +cpld_version.addr_0_5=0x00050000 +cpld_version.len_0_5=4 +cpld_version.bit_offset_0_5= + + +# Configuration item: Test register for each CPLD +# Description: Format cpld_test_reg_[cpld_id] cpld_id is cpld number,start with 1 +# Note: This field is required +cpld_test_reg.mode_0_0=config +cpld_test_reg.int_cons_0_0= +cpld_test_reg.src_0_0=cpld +cpld_test_reg.frmt_0_0=byte +cpld_test_reg.pola_0_0= +cpld_test_reg.fpath_0_0= +cpld_test_reg.addr_0_0=0x0000000f +cpld_test_reg.len_0_0=1 +cpld_test_reg.bit_offset_0_0= + +cpld_test_reg.mode_0_1=config +cpld_test_reg.int_cons_0_1= +cpld_test_reg.src_0_1=cpld +cpld_test_reg.frmt_0_1=byte +cpld_test_reg.pola_0_1= +cpld_test_reg.fpath_0_1= +cpld_test_reg.addr_0_1=0x0001000f +cpld_test_reg.len_0_1=1 +cpld_test_reg.bit_offset_0_1= + +cpld_test_reg.mode_0_2=config +cpld_test_reg.int_cons_0_2= +cpld_test_reg.src_0_2=cpld +cpld_test_reg.frmt_0_2=byte +cpld_test_reg.pola_0_2= +cpld_test_reg.fpath_0_2= +cpld_test_reg.addr_0_2=0x0002000f +cpld_test_reg.len_0_2=1 +cpld_test_reg.bit_offset_0_2= + +cpld_test_reg.mode_0_3=config +cpld_test_reg.int_cons_0_3= +cpld_test_reg.src_0_3=cpld +cpld_test_reg.frmt_0_3=byte +cpld_test_reg.pola_0_3= +cpld_test_reg.fpath_0_3= +cpld_test_reg.addr_0_3=0x0003000f +cpld_test_reg.len_0_3=1 +cpld_test_reg.bit_offset_0_3= + +cpld_test_reg.mode_0_4=config +cpld_test_reg.int_cons_0_4= +cpld_test_reg.src_0_4=cpld +cpld_test_reg.frmt_0_4=byte +cpld_test_reg.pola_0_4= +cpld_test_reg.fpath_0_4= +cpld_test_reg.addr_0_4=0x0004000f +cpld_test_reg.len_0_4=1 +cpld_test_reg.bit_offset_0_4= + +cpld_test_reg.mode_0_5=config +cpld_test_reg.int_cons_0_5= +cpld_test_reg.src_0_5=cpld +cpld_test_reg.frmt_0_5=byte +cpld_test_reg.pola_0_5= +cpld_test_reg.fpath_0_5= +cpld_test_reg.addr_0_5=0x0005000f +cpld_test_reg.len_0_5=1 +cpld_test_reg.bit_offset_0_5= + +# Configuration item: Hardware version register of each CPLD +# Description: Format cpld_hw_version_[cpld_id] cpld_id is cpld number,start with 1 +# Note: Optional +cpld_hw_version.mode_0_0=config +cpld_hw_version.int_cons_0_0= +cpld_hw_version.src_0_0=cpld +cpld_hw_version.frmt_0_0=byte +cpld_hw_version.pola_0_0= +cpld_hw_version.fpath_0_0= +cpld_hw_version.addr_0_0=0x0000000c +cpld_hw_version.len_0_0=1 +cpld_hw_version.bit_offset_0_0= + +cpld_hw_version.mode_0_1=config +cpld_hw_version.int_cons_0_1= +cpld_hw_version.src_0_1=cpld +cpld_hw_version.frmt_0_1=byte +cpld_hw_version.pola_0_1= +cpld_hw_version.fpath_0_1= +cpld_hw_version.addr_0_1=0x0001000c +cpld_hw_version.len_0_1=1 +cpld_hw_version.bit_offset_0_1= + +cpld_hw_version.mode_0_2=config +cpld_hw_version.int_cons_0_2= +cpld_hw_version.src_0_2=cpld +cpld_hw_version.frmt_0_2=byte +cpld_hw_version.pola_0_2= +cpld_hw_version.fpath_0_2= +cpld_hw_version.addr_0_2=0x0002000c +cpld_hw_version.len_0_2=1 +cpld_hw_version.bit_offset_0_2= + +cpld_hw_version.mode_0_3=config +cpld_hw_version.int_cons_0_3= +cpld_hw_version.src_0_3=cpld +cpld_hw_version.frmt_0_3=byte +cpld_hw_version.pola_0_3= +cpld_hw_version.fpath_0_3= +cpld_hw_version.addr_0_3=0x0003000c +cpld_hw_version.len_0_3=1 +cpld_hw_version.bit_offset_0_3= + +cpld_hw_version.mode_0_4=config +cpld_hw_version.int_cons_0_4= +cpld_hw_version.src_0_4=cpld +cpld_hw_version.frmt_0_4=byte +cpld_hw_version.pola_0_4= +cpld_hw_version.fpath_0_4= +cpld_hw_version.addr_0_4=0x0004000c +cpld_hw_version.len_0_4=1 +cpld_hw_version.bit_offset_0_4= + +cpld_hw_version.mode_0_5=config +cpld_hw_version.int_cons_0_5= +cpld_hw_version.src_0_5=cpld +cpld_hw_version.frmt_0_5=byte +cpld_hw_version.pola_0_5= +cpld_hw_version.fpath_0_5= +cpld_hw_version.addr_0_5=0x0005000c +cpld_hw_version.len_0_5=1 +cpld_hw_version.bit_offset_0_5= diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6951-64hc-cp/s3ip_sysfs_cfg/cfg_file/FAN.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6951-64hc-cp/s3ip_sysfs_cfg/cfg_file/FAN.cfg new file mode 100644 index 00000000000..7e4a608398f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6951-64hc-cp/s3ip_sysfs_cfg/cfg_file/FAN.cfg @@ -0,0 +1,440 @@ +# +# @Fill in the agreement +# 1. Complete comments must be filled in before configuration items. Comments must not be filled in the same line of +# configuration items and invalid Spaces must not be added between configuration items +# 2. The value can be in 10 or hexadecimal format. The hexadecimal value starts with "0x" +# 3. Some configuration items do not need to be filled in a specific product. To facilitate other products to copy and +# fill in the configuration items, do not delete them +# 4. Configuration item + +# Configuration items: E2 i2c bus address +# Description: Format other_i2c_dev.bus_[main_dev]_[minor_dev] other_i2c_dev.addr_[main_dev]_[minor_dev], +# .bus is configuration item corresponds to the bus number (/dev/i2c-bus) +# .addr is address of the device corresponding to the configuration item on the bus +# Note: main_dev is defined in rg_main_dev_type_t. mainboard is 0, fan is 1, dev_index is device index +other_i2c_dev.bus_1_1=59 +other_i2c_dev.addr_1_1=0x50 +other_i2c_dev.bus_1_2=60 +other_i2c_dev.addr_1_2=0x50 +other_i2c_dev.bus_1_3=61 +other_i2c_dev.addr_1_3=0x50 +other_i2c_dev.bus_1_4=62 +other_i2c_dev.addr_1_4=0x50 +other_i2c_dev.bus_1_5=63 +other_i2c_dev.addr_1_5=0x50 +other_i2c_dev.bus_1_6=64 +other_i2c_dev.addr_1_6=0x50 + +# Configuration items: Fan dependent constant +# Description: Format dev_num_[main_dev]_[minor_dev] +# Note: main_dev,Fan is 1 minor_dev, 0: does not exist, 5: motor + +# Number of fans +dev_num_1_0=6 + +# Number of motors +dev_num_1_5=2 + +# Configuration items: Product fan E2 format +# Description: Format fan_e2_mode +# Note: required +fan_e2_mode=fru + +# Configuration items: Mode of reading fan E2 +# Description: Format fan_sysfs_name +# Note: If not configured, it is read by i2c, otherwise it is read by sysfs +fan_sysfs_name=eeprom + +# Configuration items: Fan air duct type +# Filling instructions: fan_direction_[direction]_[index] +# direction is air duct 0:F2B 1:B2F, indexstart with 1 +# Note: required +fan_direction_0_1=FAN40-01L-CP + +# Configuration items: Fan status CPLD register address +# Description: Format dev_present_status_[main_dev_id][fan_index] fan_indexstart with 1 +# Note: fan main_dev_id is 1 +dev_present_status.mode_1_1=config +dev_present_status.src_1_1=file +dev_present_status.frmt_1_1=bit +dev_present_status.pola_1_1=negative +dev_present_status.fpath_1_1=/dev/cpld10 +dev_present_status.addr_1_1=0xda +dev_present_status.len_1_1=1 +dev_present_status.bit_offset_1_1=0 + +dev_present_status.mode_1_2=config +dev_present_status.src_1_2=file +dev_present_status.frmt_1_2=bit +dev_present_status.pola_1_2=negative +dev_present_status.fpath_1_2=/dev/cpld10 +dev_present_status.addr_1_2=0xda +dev_present_status.len_1_2=1 +dev_present_status.bit_offset_1_2=1 + +dev_present_status.mode_1_3=config +dev_present_status.src_1_3=file +dev_present_status.frmt_1_3=bit +dev_present_status.pola_1_3=negative +dev_present_status.fpath_1_3=/dev/cpld10 +dev_present_status.addr_1_3=0xda +dev_present_status.len_1_3=1 +dev_present_status.bit_offset_1_3=2 + +dev_present_status.mode_1_4=config +dev_present_status.src_1_4=file +dev_present_status.frmt_1_4=bit +dev_present_status.pola_1_4=negative +dev_present_status.fpath_1_4=/dev/cpld10 +dev_present_status.addr_1_4=0xda +dev_present_status.len_1_4=1 +dev_present_status.bit_offset_1_4=3 + +dev_present_status.mode_1_5=config +dev_present_status.src_1_5=file +dev_present_status.frmt_1_5=bit +dev_present_status.pola_1_5=negative +dev_present_status.fpath_1_5=/dev/cpld10 +dev_present_status.addr_1_5=0xda +dev_present_status.len_1_5=1 +dev_present_status.bit_offset_1_5=4 + +dev_present_status.mode_1_6=config +dev_present_status.src_1_6=file +dev_present_status.frmt_1_6=bit +dev_present_status.pola_1_6=negative +dev_present_status.fpath_1_6=/dev/cpld10 +dev_present_status.addr_1_6=0xda +dev_present_status.len_1_6=1 +dev_present_status.bit_offset_1_6=5 + +# Configuration items: Fan rotation status CPLD register address +# Description: Format fan_roll_status_[fan_id]_[motor_id] fan_idstart with 1, motor_idstart with 1 +# Note: required +fan_roll_status.mode_1_1=config +fan_roll_status.int_cons_1_1= +fan_roll_status.src_1_1=file +fan_roll_status.frmt_1_1=bit +fan_roll_status.pola_1_1=positive +fan_roll_status.fpath_1_1=/dev/cpld10 +fan_roll_status.addr_1_1=0xdb +fan_roll_status.len_1_1=1 +fan_roll_status.bit_offset_1_1=0 + +fan_roll_status.mode_1_2=config +fan_roll_status.int_cons_1_2= +fan_roll_status.src_1_2=file +fan_roll_status.frmt_1_2=bit +fan_roll_status.pola_1_2=positive +fan_roll_status.fpath_1_2=/dev/cpld10 +fan_roll_status.addr_1_2=0xdc +fan_roll_status.len_1_2=1 +fan_roll_status.bit_offset_1_2=0 + +fan_roll_status.mode_2_1=config +fan_roll_status.int_cons_2_1= +fan_roll_status.src_2_1=file +fan_roll_status.frmt_2_1=bit +fan_roll_status.pola_2_1=positive +fan_roll_status.fpath_2_1=/dev/cpld10 +fan_roll_status.addr_2_1=0xdb +fan_roll_status.len_2_1=1 +fan_roll_status.bit_offset_2_1=1 + +fan_roll_status.mode_2_2=config +fan_roll_status.int_cons_2_2= +fan_roll_status.src_2_2=file +fan_roll_status.frmt_2_2=bit +fan_roll_status.pola_2_2=positive +fan_roll_status.fpath_2_2=/dev/cpld10 +fan_roll_status.addr_2_2=0xdc +fan_roll_status.len_2_2=1 +fan_roll_status.bit_offset_2_2=1 + +fan_roll_status.mode_3_1=config +fan_roll_status.int_cons_3_1= +fan_roll_status.src_3_1=file +fan_roll_status.frmt_3_1=bit +fan_roll_status.pola_3_1=positive +fan_roll_status.fpath_3_1=/dev/cpld10 +fan_roll_status.addr_3_1=0xdb +fan_roll_status.len_3_1=1 +fan_roll_status.bit_offset_3_1=2 + +fan_roll_status.mode_3_2=config +fan_roll_status.int_cons_3_2= +fan_roll_status.src_3_2=file +fan_roll_status.frmt_3_2=bit +fan_roll_status.pola_3_2=positive +fan_roll_status.fpath_3_2=/dev/cpld10 +fan_roll_status.addr_3_2=0xdc +fan_roll_status.len_3_2=1 +fan_roll_status.bit_offset_3_2=2 + +fan_roll_status.mode_4_1=config +fan_roll_status.int_cons_4_1= +fan_roll_status.src_4_1=file +fan_roll_status.frmt_4_1=bit +fan_roll_status.pola_4_1=positive +fan_roll_status.fpath_4_1=/dev/cpld10 +fan_roll_status.addr_4_1=0xdb +fan_roll_status.len_4_1=1 +fan_roll_status.bit_offset_4_1=3 + +fan_roll_status.mode_4_2=config +fan_roll_status.int_cons_4_2= +fan_roll_status.src_4_2=file +fan_roll_status.frmt_4_2=bit +fan_roll_status.pola_4_2=positive +fan_roll_status.fpath_4_2=/dev/cpld10 +fan_roll_status.addr_4_2=0xdc +fan_roll_status.len_4_2=1 +fan_roll_status.bit_offset_4_2=3 + +fan_roll_status.mode_5_1=config +fan_roll_status.int_cons_5_1= +fan_roll_status.src_5_1=file +fan_roll_status.frmt_5_1=bit +fan_roll_status.pola_5_1=positive +fan_roll_status.fpath_5_1=/dev/cpld10 +fan_roll_status.addr_5_1=0xdb +fan_roll_status.len_5_1=1 +fan_roll_status.bit_offset_5_1=4 + +fan_roll_status.mode_5_2=config +fan_roll_status.int_cons_5_2= +fan_roll_status.src_5_2=file +fan_roll_status.frmt_5_2=bit +fan_roll_status.pola_5_2=positive +fan_roll_status.fpath_5_2=/dev/cpld10 +fan_roll_status.addr_5_2=0xdc +fan_roll_status.len_5_2=1 +fan_roll_status.bit_offset_5_2=4 + +fan_roll_status.mode_6_1=config +fan_roll_status.int_cons_6_1= +fan_roll_status.src_6_1=file +fan_roll_status.frmt_6_1=bit +fan_roll_status.pola_6_1=positive +fan_roll_status.fpath_6_1=/dev/cpld10 +fan_roll_status.addr_6_1=0xdb +fan_roll_status.len_6_1=1 +fan_roll_status.bit_offset_6_1=5 + +fan_roll_status.mode_6_2=config +fan_roll_status.int_cons_6_2= +fan_roll_status.src_6_2=file +fan_roll_status.frmt_6_2=bit +fan_roll_status.pola_6_2=positive +fan_roll_status.fpath_6_2=/dev/cpld10 +fan_roll_status.addr_6_2=0xdc +fan_roll_status.len_6_2=1 +fan_roll_status.bit_offset_6_2=5 + +# Configuration items: Fan speed CPLD register address +# Description: Format fan_speed_[fan_id]_[motor_id] fan_idstart with 1, motor_idstart with 1 +# Note: required +fan_speed.mode_1_1=config +fan_speed.int_cons_1_1= +fan_speed.src_1_1=file +fan_speed.frmt_1_1=num_bytes +fan_speed.pola_1_1= +fan_speed.fpath_1_1=/dev/cpld10 +fan_speed.addr_1_1=0x60 +fan_speed.len_1_1=2 +fan_speed.bit_offset_1_1= + +fan_speed.mode_1_2=config +fan_speed.int_cons_1_2= +fan_speed.src_1_2=file +fan_speed.frmt_1_2=num_bytes +fan_speed.pola_1_2= +fan_speed.fpath_1_2=/dev/cpld10 +fan_speed.addr_1_2=0x70 +fan_speed.len_1_2=2 +fan_speed.bit_offset_1_2= + +fan_speed.mode_2_1=config +fan_speed.int_cons_2_1= +fan_speed.src_2_1=file +fan_speed.frmt_2_1=num_bytes +fan_speed.pola_2_1= +fan_speed.fpath_2_1=/dev/cpld10 +fan_speed.addr_2_1=0x62 +fan_speed.len_2_1=2 +fan_speed.bit_offset_2_1= + +fan_speed.mode_2_2=config +fan_speed.int_cons_2_2= +fan_speed.src_2_2=file +fan_speed.frmt_2_2=num_bytes +fan_speed.pola_2_2= +fan_speed.fpath_2_2=/dev/cpld10 +fan_speed.addr_2_2=0x72 +fan_speed.len_2_2=2 +fan_speed.bit_offset_2_2= + +fan_speed.mode_3_1=config +fan_speed.int_cons_3_1= +fan_speed.src_3_1=file +fan_speed.frmt_3_1=num_bytes +fan_speed.pola_3_1= +fan_speed.fpath_3_1=/dev/cpld10 +fan_speed.addr_3_1=0x64 +fan_speed.len_3_1=2 +fan_speed.bit_offset_3_1= + +fan_speed.mode_3_2=config +fan_speed.int_cons_3_2= +fan_speed.src_3_2=file +fan_speed.frmt_3_2=num_bytes +fan_speed.pola_3_2= +fan_speed.fpath_3_2=/dev/cpld10 +fan_speed.addr_3_2=0x74 +fan_speed.len_3_2=2 +fan_speed.bit_offset_3_2= + +fan_speed.mode_4_1=config +fan_speed.int_cons_4_1= +fan_speed.src_4_1=file +fan_speed.frmt_4_1=num_bytes +fan_speed.pola_4_1= +fan_speed.fpath_4_1=/dev/cpld10 +fan_speed.addr_4_1=0x66 +fan_speed.len_4_1=2 +fan_speed.bit_offset_4_1= + +fan_speed.mode_4_2=config +fan_speed.int_cons_4_2= +fan_speed.src_4_2=file +fan_speed.frmt_4_2=num_bytes +fan_speed.pola_4_2= +fan_speed.fpath_4_2=/dev/cpld10 +fan_speed.addr_4_2=0x76 +fan_speed.len_4_2=2 +fan_speed.bit_offset_4_2= + +fan_speed.mode_5_1=config +fan_speed.int_cons_5_1= +fan_speed.src_5_1=file +fan_speed.frmt_5_1=num_bytes +fan_speed.pola_5_1= +fan_speed.fpath_5_1=/dev/cpld10 +fan_speed.addr_5_1=0x68 +fan_speed.len_5_1=2 +fan_speed.bit_offset_5_1= + +fan_speed.mode_5_2=config +fan_speed.int_cons_5_2= +fan_speed.src_5_2=file +fan_speed.frmt_5_2=num_bytes +fan_speed.pola_5_2= +fan_speed.fpath_5_2=/dev/cpld10 +fan_speed.addr_5_2=0x78 +fan_speed.len_5_2=2 +fan_speed.bit_offset_5_2= + +fan_speed.mode_6_1=config +fan_speed.int_cons_6_1= +fan_speed.src_6_1=file +fan_speed.frmt_6_1=num_bytes +fan_speed.pola_6_1= +fan_speed.fpath_6_1=/dev/cpld10 +fan_speed.addr_6_1=0x6A +fan_speed.len_6_1=2 +fan_speed.bit_offset_6_1= + +fan_speed.mode_6_2=config +fan_speed.int_cons_6_2= +fan_speed.src_6_2=file +fan_speed.frmt_6_2=num_bytes +fan_speed.pola_6_2= +fan_speed.fpath_6_2=/dev/cpld10 +fan_speed.addr_6_2=0x7A +fan_speed.len_6_2=2 +fan_speed.bit_offset_6_2= + +# Configuration items: Fan speed level CPLD register address +# Description: Format fan_ratio_[fan_id]_[motor_id] fan_idstart with 1, motor_idstart with 1 +# Note: required +fan_ratio.mode_1=config +fan_ratio.int_cons_1= +fan_ratio.src_1=file +fan_ratio.frmt_1=byte +fan_ratio.pola_1= +fan_ratio.fpath_1=/dev/cpld10 +fan_ratio.addr_1=0xb0 +fan_ratio.len_1=1 +fan_ratio.bit_offset_1= + +fan_ratio.mode_2=config +fan_ratio.int_cons_2= +fan_ratio.src_2=file +fan_ratio.frmt_2=byte +fan_ratio.pola_2= +fan_ratio.fpath_2=/dev/cpld10 +fan_ratio.addr_2=0xb1 +fan_ratio.len_2=1 +fan_ratio.bit_offset_2= + +fan_ratio.mode_3=config +fan_ratio.int_cons_3= +fan_ratio.src_3=file +fan_ratio.frmt_3=byte +fan_ratio.pola_3= +fan_ratio.fpath_3=/dev/cpld10 +fan_ratio.addr_3=0xb2 +fan_ratio.len_3=1 +fan_ratio.bit_offset_3= + +fan_ratio.mode_4=config +fan_ratio.int_cons_4= +fan_ratio.src_4=file +fan_ratio.frmt_4=byte +fan_ratio.pola_4= +fan_ratio.fpath_4=/dev/cpld10 +fan_ratio.addr_4=0xb3 +fan_ratio.len_4=1 +fan_ratio.bit_offset_4= + +fan_ratio.mode_5=config +fan_ratio.int_cons_5= +fan_ratio.src_5=file +fan_ratio.frmt_5=byte +fan_ratio.pola_5= +fan_ratio.fpath_5=/dev/cpld10 +fan_ratio.addr_5=0xb4 +fan_ratio.len_5=1 +fan_ratio.bit_offset_5= + +fan_ratio.mode_6=config +fan_ratio.int_cons_6= +fan_ratio.src_6=file +fan_ratio.frmt_6=byte +fan_ratio.pola_6= +fan_ratio.fpath_6=/dev/cpld10 +fan_ratio.addr_6=0xb5 +fan_ratio.len_6=1 +fan_ratio.bit_offset_6= + + +# Configuration items: the number of fan names displayed in the product +# Description: Format dev_num_[main_dev]_[minor_dev] +# Note: main_dev,FAN is 1, minor_dev, 7: The number of fan names displayed +dev_num_1_7=1 + +# Configuration items: number of fan types supported by each fan name +# Description: Format fan_type_num_[fan_id] +# Note: fan_id start with 1 +fan_type_num_1=1 + +# Configuration items: product Fan type Name +# Description: Format fan_name_[index1]_[index2] +# Note: index1 indicates the ID of the fan that is displayed, start with 1, +# index2 Indicates different fan names with the same ID, start with 1 +fan_name_0_1=FAN40-01L-CP + +# Configuration items: fan name is displayed +# Description: Format decode_fan_name_[index] +# Note: index indicates the ID of the fan that is displayed +decode_fan_name_1=FAN40-01L-CP diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6951-64hc-cp/s3ip_sysfs_cfg/cfg_file/FPGA.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6951-64hc-cp/s3ip_sysfs_cfg/cfg_file/FPGA.cfg new file mode 100644 index 00000000000..5436320855c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6951-64hc-cp/s3ip_sysfs_cfg/cfg_file/FPGA.cfg @@ -0,0 +1,95 @@ +# +# @Fill in the agreement +# 1. Complete comments must be filled in before configuration items. Comments must not be filled in the same line of +# configuration items and invalid Spaces must not be added between configuration items +# 2. The value can be in 10 or hexadecimal format. The hexadecimal value starts with "0x" +# 3. Some configuration items do not need to be filled in a specific product. To facilitate other products to copy and +# fill in the configuration items, do not delete them +# 4. Configuration item + + +# Configuration item: motherboard FPGA number +# Description: Format dev_num_[main_dev]_[minor_dev] +# Note: main_dev: motherboard is 0,daughter card is 5, minor_dev: FPGA is 8 +dev_num_0_9=2 + +# Configuration item: name of each fpga +# Description: Format fpga_name_[fpga_id] fpga_id is fpga number,Start at 0 +# Note: required +fpga_name_0_0=MAC_FPGA +fpga_name_0_1=IO_FPGA + +# Configuration item: Version register for each FPGA +# Description: Format fpga_version_[fpga_id] fpga_id is fpga number,Start at 0 +# Note: required +fpga_version.mode_0_0=config +fpga_version.int_cons_0_0= +fpga_version.src_0_0=file +fpga_version.frmt_0_0=num_bytes +fpga_version.pola_0_0=negative +fpga_version.fpath_0_0=/dev/fpga0 +fpga_version.addr_0_0=0x0 +fpga_version.len_0_0=4 +fpga_version.bit_offset_0_0= + +fpga_version.mode_0_1=config +fpga_version.int_cons_0_1= +fpga_version.src_0_1=file +fpga_version.frmt_0_1=num_bytes +fpga_version.pola_0_1=negative +fpga_version.fpath_0_1=/dev/fpga1 +fpga_version.addr_0_1=0x0 +fpga_version.len_0_1=4 +fpga_version.bit_offset_0_1= + +# Configuration item: Test registers for each FPGA +# Description: Format fpga_test_reg_[fpga_id] fpga_id is fpga number,Start at 0 +# Note: required +fpga_test_reg.mode_0_0=config +fpga_test_reg.int_cons_0_0= +fpga_test_reg.src_0_0=file +fpga_test_reg.frmt_0_0=num_bytes +fpga_test_reg.pola_0_0=negative +fpga_test_reg.fpath_0_0=/dev/fpga0 +fpga_test_reg.addr_0_0=0x08 +fpga_test_reg.len_0_0=4 +fpga_test_reg.bit_offset_0_0= + +fpga_test_reg.mode_0_1=config +fpga_test_reg.int_cons_0_1= +fpga_test_reg.src_0_1=file +fpga_test_reg.frmt_0_1=num_bytes +fpga_test_reg.pola_0_1=negative +fpga_test_reg.fpath_0_1=/dev/fpga1 +fpga_test_reg.addr_0_1=0x08 +fpga_test_reg.len_0_1=4 +fpga_test_reg.bit_offset_0_1= + +# Configuration item: Device type register for each FPGA +# Description: Format fpga_model_reg_[main_dev]_[fpga_id] +# Note: main_dev: motherboard is 0, daughter card is 5, fpga_id is fpga number,Start at 0 +fpga_model_reg.mode_0_0=config +fpga_model_reg.int_cons_0_0= +fpga_model_reg.src_0_0=file +fpga_model_reg.frmt_0_0=num_bytes +fpga_model_reg.pola_0_0=negative +fpga_model_reg.fpath_0_0=/dev/fpga0 +fpga_model_reg.addr_0_0=0x10 +fpga_model_reg.len_0_0=4 +fpga_model_reg.bit_offset_0_0= + +fpga_model_reg.mode_0_1=config +fpga_model_reg.int_cons_0_1= +fpga_model_reg.src_0_1=file +fpga_model_reg.frmt_0_1=num_bytes +fpga_model_reg.pola_0_1=negative +fpga_model_reg.fpath_0_1=/dev/fpga1 +fpga_model_reg.addr_0_1=0x10 +fpga_model_reg.len_0_1=4 +fpga_model_reg.bit_offset_0_1= + +# Configuration item: Device conversion configuration for each FPGA +# Description: Format fpga_model_decode_[origin_value] +# Note: origin_value is the value read from the FPGA device model register cannot exceed 0xffff +fpga_model_decode_0x50=XC7A50T_2FGG484C +fpga_model_decode_0x100=XC7A100T_2FGG484C diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6951-64hc-cp/s3ip_sysfs_cfg/cfg_file/LED.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6951-64hc-cp/s3ip_sysfs_cfg/cfg_file/LED.cfg new file mode 100644 index 00000000000..392a7e8e2f8 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6951-64hc-cp/s3ip_sysfs_cfg/cfg_file/LED.cfg @@ -0,0 +1,165 @@ +# +# @Fill in the agreement +# 1. Complete comments must be filled in before configuration items. Comments must not be filled in the same line of +# configuration items and invalid Spaces must not be added between configuration items +# 2. The value can be in 10 or hexadecimal format. The hexadecimal value starts with "0x" +# 3. Some configuration items do not need to be filled in a specific product. To facilitate other products to copy and +# fill in the configuration items, do not delete them +# 4. Configuration item + +# Configuration item: LED CPLD register address +# Description: Formatled_status_[led_id]_[led_index] +# Note: led_id By definition wb_led_t +# led_index:If there is no index, fill in 0. If there is an index (such as a fan light), the number starts from 1 + +# Front panel SYS light +led_status.mode_0_0=config +led_status.src_0_0=file +led_status.frmt_0_0=byte +led_status.fpath_0_0=/dev/cpld1 +led_status.addr_0_0=0xaa +led_status.len_0_0=1 + +# Configuration item: LED indicator CPLD register value converted to standard value +# Description: Format led_status_decode_[led_id]_[origin_value] origin_value:Original CPLD value +# led_id Same LED light type defined, 0- Front panel SYS light +# cpld: 0: off, 1: red flash, 2: red, 3: green flash, 4: green, 5: amber flash, 6: amber +# s3ip: 0: off, 1: green, 2: amber, 3: red, 4: blue, 5: green flash, 6: amber flash, +# 7: red flash, 8: blue flash +led_status_decode_0_0=0 +led_status_decode_0_1=7 +led_status_decode_0_2=3 +led_status_decode_0_3=5 +led_status_decode_0_4=1 +led_status_decode_0_5=6 +led_status_decode_0_6=2 +led_status_decode_0_17=5 +led_status_decode_0_18=7 +led_status_decode_0_19=6 +led_status_decode_0_33=5 +led_status_decode_0_34=7 +led_status_decode_0_35=6 +led_status_decode_0_65=5 +led_status_decode_0_66=7 +led_status_decode_0_67=6 +led_status_decode_0_129=5 +led_status_decode_0_130=7 +led_status_decode_0_131=6 +led_status_decode_0_255=0 + +# Front panel BMC light +led_status.mode_2_0=config +led_status.src_2_0=file +led_status.frmt_2_0=byte +led_status.fpath_2_0=/dev/cpld1 +led_status.addr_2_0=0xab +led_status.len_2_0=1 + +led_status_decode_2_0=0 +led_status_decode_2_1=7 +led_status_decode_2_2=3 +led_status_decode_2_3=5 +led_status_decode_2_4=1 +led_status_decode_2_5=6 +led_status_decode_2_6=2 +led_status_decode_2_7=0 + +# Front panel FAN light +led_status.mode_4_0=config +led_status.src_4_0=file +led_status.frmt_4_0=byte +led_status.fpath_4_0=/dev/cpld1 +led_status.addr_4_0=0xad +led_status.len_4_0=1 + +# Configuration item: LED indicator CPLD register value converted to standard value +# Description: Format led_status_decode_[led_id]_[origin_value] origin_value:Original CPLD value +# led_id Same LED light type defined, 4-Front panel FAN light +led_status_decode_4_0=0 +led_status_decode_4_1=7 +led_status_decode_4_2=3 +led_status_decode_4_3=5 +led_status_decode_4_4=1 +led_status_decode_4_5=6 +led_status_decode_4_6=2 +led_status_decode_4_7=0 + +# Front panel PSU light +led_status.mode_6_0=config +led_status.src_6_0=file +led_status.frmt_6_0=byte +led_status.fpath_6_0=/dev/cpld1 +led_status.addr_6_0=0xac +led_status.len_6_0=1 + +# Configuration item: LED indicator CPLD register value converted to standard value +# Description: Format led_status_decode_[led_id]_[origin_value] origin_value:Original CPLD value +# led_id Same LED light type defined, 6-Front panel PSU light +led_status_decode_6_0=0 +led_status_decode_6_1=7 +led_status_decode_6_2=3 +led_status_decode_6_3=5 +led_status_decode_6_4=1 +led_status_decode_6_5=6 +led_status_decode_6_6=2 +led_status_decode_6_7=0 + +# Fan body lamp1 +led_status.mode_10_1=config +led_status.src_10_1=file +led_status.frmt_10_1=byte +led_status.fpath_10_1=/dev/cpld10 +led_status.addr_10_1=0xd0 +led_status.len_10_1=1 + +# Fan body lamp2 +led_status.mode_10_2=config +led_status.src_10_2=file +led_status.frmt_10_2=byte +led_status.fpath_10_2=/dev/cpld10 +led_status.addr_10_2=0xd1 +led_status.len_10_2=1 + +# Fan body lamp3 +led_status.mode_10_3=config +led_status.src_10_3=file +led_status.frmt_10_3=byte +led_status.fpath_10_3=/dev/cpld10 +led_status.addr_10_3=0xd2 +led_status.len_10_3=1 + +# Fan body lamp4 +led_status.mode_10_4=config +led_status.src_10_4=file +led_status.frmt_10_4=byte +led_status.fpath_10_4=/dev/cpld10 +led_status.addr_10_4=0xd3 +led_status.len_10_4=1 + +# Fan body lamp5 +led_status.mode_10_5=config +led_status.src_10_5=file +led_status.frmt_10_5=byte +led_status.fpath_10_5=/dev/cpld10 +led_status.addr_10_5=0xd4 +led_status.len_10_5=1 + +# Fan body lamp6 +led_status.mode_10_6=config +led_status.src_10_6=file +led_status.frmt_10_6=byte +led_status.fpath_10_6=/dev/cpld10 +led_status.addr_10_6=0xd5 +led_status.len_10_6=1 + +# Configuration item: LED indicator CPLD register value converted to standard value +# Description: Format led_status_decode_[led_id]_[origin_value] origin_value:Original CPLD value +# led_id Same LED light type defined, 10-Fan body lamp +led_status_decode_10_0=0 +led_status_decode_10_1=7 +led_status_decode_10_2=3 +led_status_decode_10_3=5 +led_status_decode_10_4=1 +led_status_decode_10_5=6 +led_status_decode_10_6=2 +led_status_decode_10_7=0 diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6951-64hc-cp/s3ip_sysfs_cfg/cfg_file/PSU.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6951-64hc-cp/s3ip_sysfs_cfg/cfg_file/PSU.cfg new file mode 100644 index 00000000000..b96310f499c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6951-64hc-cp/s3ip_sysfs_cfg/cfg_file/PSU.cfg @@ -0,0 +1,1088 @@ +# +# @Fill in the agreement +# 1. Complete comments must be filled in before configuration items. Comments must not be filled in the same line of +# configuration items and invalid Spaces must not be added between configuration items +# 2. The value can be in 10 or hexadecimal format. The hexadecimal value starts with "0x" +# 3. Some configuration items do not need to be filled in a specific product. To facilitate other products to copy and +# fill in the configuration items, do not delete them +# 4. Configuration item + +# Configuration items: PSU number +# Description: Format dev_num_[main_dev]_[minor_dev] +# Note: main_dev,PSU is 2, minor_dev,0 indicates the obtained number +dev_num_2_0=4 + +# Configuration items: PSU temperature sensors number +# Description: Format dev_num_[main_dev]_[minor_dev] +# Note: main_dev,PSU is 2, minor_dev, 1:temperature +dev_num_2_1=2 + +# Configuration item: Method of reading power FRU information +# Description: Format psu_fru_mode +# Note: If not configured, read through EEPROM, otherwise read through pmbus +psu_fru_mode=pmbus + +# Configuration item: product power type name +# Fill in instructions: format power_name_[index1]_[index2] +# Note: index1 indicates the power supply ID displayed, starting from 1, index2 indicates different power supplies with the same ID, starting from 1 +power_name_1_1=Q54SN120A1RNPH +power_name_2_1=BMR3502250531 + +# Configuration item: Displays the power supply name +# Fill in instructions: format decode_power_name_[index] +# Note: index indicates the ID of the power supply that is displayed +decode_power_name_1=Q54SN120A1RNPH +decode_power_name_2=BMR3502250531 + +# Configuration item: Method of reading power FRU information +# Fill in the description: format psu_fru_pmbus_[psu_index]_[fruid] +# Note: psu_index: indicates the power supply number, starting from 1 +# Note: fruid: 3:serial_number(mfr_serial), 5:hardware_version(mfr_revision), 8:part_number(mfr_model), 12:date(mfr_date), 13:vendor(mfr_id), +# mfr_serial +psu_fru_pmbus.mode_1_3=config +psu_fru_pmbus.int_cons_1_3=0 +psu_fru_pmbus.src_1_3=file +psu_fru_pmbus.frmt_1_3=buf +psu_fru_pmbus.fpath_1_3=/sys/bus/i2c/devices/53-0060/mfr_serial +psu_fru_pmbus.addr_1_3=0 +psu_fru_pmbus.len_1_3=32 +psu_fru_pmbus.bit_offset_1_3= +psu_fru_pmbus.str_cons_1_3= + +# mfr_revision +psu_fru_pmbus.mode_1_5=config +psu_fru_pmbus.int_cons_1_5=0 +psu_fru_pmbus.src_1_5=file +psu_fru_pmbus.frmt_1_5=buf +psu_fru_pmbus.fpath_1_5=/sys/bus/i2c/devices/53-0060/mfr_revision +psu_fru_pmbus.addr_1_5=0 +psu_fru_pmbus.len_1_5=32 +psu_fru_pmbus.bit_offset_1_5= +psu_fru_pmbus.str_cons_1_5= + +# mfr_model +psu_fru_pmbus.mode_1_8=config +psu_fru_pmbus.int_cons_1_8=0 +psu_fru_pmbus.src_1_8=file +psu_fru_pmbus.frmt_1_8=buf +psu_fru_pmbus.fpath_1_8=/sys/bus/i2c/devices/53-0060/mfr_model +psu_fru_pmbus.addr_1_8=0 +psu_fru_pmbus.len_1_8=32 +psu_fru_pmbus.bit_offset_1_8= +psu_fru_pmbus.str_cons_1_8= + +# mfr_date +psu_fru_pmbus.mode_1_12=config +psu_fru_pmbus.int_cons_1_12=0 +psu_fru_pmbus.src_1_12=file +psu_fru_pmbus.frmt_1_12=buf +psu_fru_pmbus.fpath_1_12=/sys/bus/i2c/devices/53-0060/mfr_date +psu_fru_pmbus.addr_1_12=0 +psu_fru_pmbus.len_1_12=32 +psu_fru_pmbus.bit_offset_1_12= +psu_fru_pmbus.str_cons_1_12= + +# mfr_id +psu_fru_pmbus.mode_1_13=config +psu_fru_pmbus.int_cons_1_13=0 +psu_fru_pmbus.src_1_13=file +psu_fru_pmbus.frmt_1_13=buf +psu_fru_pmbus.fpath_1_13=/sys/bus/i2c/devices/53-0060/mfr_id +psu_fru_pmbus.addr_1_13=0 +psu_fru_pmbus.len_1_13=32 +psu_fru_pmbus.bit_offset_1_13= +psu_fru_pmbus.str_cons_1_13= + + +# mfr_serial +psu_fru_pmbus.mode_2_3=config +psu_fru_pmbus.int_cons_2_3=0 +psu_fru_pmbus.src_2_3=file +psu_fru_pmbus.frmt_2_3=buf +psu_fru_pmbus.fpath_2_3=/sys/bus/i2c/devices/54-0060/mfr_serial +psu_fru_pmbus.addr_2_3=0 +psu_fru_pmbus.len_2_3=32 +psu_fru_pmbus.bit_offset_2_3= +psu_fru_pmbus.str_cons_2_3= + +# mfr_revision +psu_fru_pmbus.mode_2_5=config +psu_fru_pmbus.int_cons_2_5=0 +psu_fru_pmbus.src_2_5=file +psu_fru_pmbus.frmt_2_5=buf +psu_fru_pmbus.fpath_2_5=/sys/bus/i2c/devices/54-0060/mfr_revision +psu_fru_pmbus.addr_2_5=0 +psu_fru_pmbus.len_2_5=32 +psu_fru_pmbus.bit_offset_2_5= +psu_fru_pmbus.str_cons_2_5= + +# mfr_model +psu_fru_pmbus.mode_2_8=config +psu_fru_pmbus.int_cons_2_8=0 +psu_fru_pmbus.src_2_8=file +psu_fru_pmbus.frmt_2_8=buf +psu_fru_pmbus.fpath_2_8=/sys/bus/i2c/devices/54-0060/mfr_model +psu_fru_pmbus.addr_2_8=0 +psu_fru_pmbus.len_2_8=32 +psu_fru_pmbus.bit_offset_2_8= +psu_fru_pmbus.str_cons_2_8= + +# mfr_date +psu_fru_pmbus.mode_2_12=config +psu_fru_pmbus.int_cons_2_12=0 +psu_fru_pmbus.src_2_12=file +psu_fru_pmbus.frmt_2_12=buf +psu_fru_pmbus.fpath_2_12=/sys/bus/i2c/devices/54-0060/mfr_date +psu_fru_pmbus.addr_2_12=0 +psu_fru_pmbus.len_2_12=32 +psu_fru_pmbus.bit_offset_2_12= +psu_fru_pmbus.str_cons_2_12= + +# mfr_id +psu_fru_pmbus.mode_2_13=config +psu_fru_pmbus.int_cons_2_13=0 +psu_fru_pmbus.src_2_13=file +psu_fru_pmbus.frmt_2_13=buf +psu_fru_pmbus.fpath_2_13=/sys/bus/i2c/devices/54-0060/mfr_id +psu_fru_pmbus.addr_2_13=0 +psu_fru_pmbus.len_2_13=32 +psu_fru_pmbus.bit_offset_2_13= +psu_fru_pmbus.str_cons_2_13= + + +# mfr_serial +psu_fru_pmbus.mode_3_3=config +psu_fru_pmbus.int_cons_3_3=0 +psu_fru_pmbus.src_3_3=file +psu_fru_pmbus.frmt_3_3=buf +psu_fru_pmbus.fpath_3_3=/sys/bus/i2c/devices/55-0060/mfr_serial +psu_fru_pmbus.addr_3_3=0 +psu_fru_pmbus.len_3_3=32 +psu_fru_pmbus.bit_offset_3_3= +psu_fru_pmbus.str_cons_3_3= + +# mfr_revision +psu_fru_pmbus.mode_3_5=config +psu_fru_pmbus.int_cons_3_5=0 +psu_fru_pmbus.src_3_5=file +psu_fru_pmbus.frmt_3_5=buf +psu_fru_pmbus.fpath_3_5=/sys/bus/i2c/devices/55-0060/mfr_revision +psu_fru_pmbus.addr_3_5=0 +psu_fru_pmbus.len_3_5=32 +psu_fru_pmbus.bit_offset_3_5= +psu_fru_pmbus.str_cons_3_5= + +# mfr_model +psu_fru_pmbus.mode_3_8=config +psu_fru_pmbus.int_cons_3_8=0 +psu_fru_pmbus.src_3_8=file +psu_fru_pmbus.frmt_3_8=buf +psu_fru_pmbus.fpath_3_8=/sys/bus/i2c/devices/55-0060/mfr_model +psu_fru_pmbus.addr_3_8=0 +psu_fru_pmbus.len_3_8=32 +psu_fru_pmbus.bit_offset_3_8= +psu_fru_pmbus.str_cons_3_8= + +# mfr_date +psu_fru_pmbus.mode_3_12=config +psu_fru_pmbus.int_cons_3_12=0 +psu_fru_pmbus.src_3_12=file +psu_fru_pmbus.frmt_3_12=buf +psu_fru_pmbus.fpath_3_12=/sys/bus/i2c/devices/55-0060/mfr_date +psu_fru_pmbus.addr_3_12=0 +psu_fru_pmbus.len_3_12=32 +psu_fru_pmbus.bit_offset_3_12= +psu_fru_pmbus.str_cons_3_12= + +# mfr_id +psu_fru_pmbus.mode_3_13=config +psu_fru_pmbus.int_cons_3_13=0 +psu_fru_pmbus.src_3_13=file +psu_fru_pmbus.frmt_3_13=buf +psu_fru_pmbus.fpath_3_13=/sys/bus/i2c/devices/55-0060/mfr_id +psu_fru_pmbus.addr_3_13=0 +psu_fru_pmbus.len_3_13=32 +psu_fru_pmbus.bit_offset_3_13= +psu_fru_pmbus.str_cons_3_13= + + +# mfr_serial +psu_fru_pmbus.mode_4_3=config +psu_fru_pmbus.int_cons_4_3=0 +psu_fru_pmbus.src_4_3=file +psu_fru_pmbus.frmt_4_3=buf +psu_fru_pmbus.fpath_4_3=/sys/bus/i2c/devices/56-0060/mfr_serial +psu_fru_pmbus.addr_4_3=0 +psu_fru_pmbus.len_4_3=32 +psu_fru_pmbus.bit_offset_4_3= +psu_fru_pmbus.str_cons_4_3= + +# mfr_revision +psu_fru_pmbus.mode_4_5=config +psu_fru_pmbus.int_cons_4_5=0 +psu_fru_pmbus.src_4_5=file +psu_fru_pmbus.frmt_4_5=buf +psu_fru_pmbus.fpath_4_5=/sys/bus/i2c/devices/56-0060/mfr_revision +psu_fru_pmbus.addr_4_5=0 +psu_fru_pmbus.len_4_5=32 +psu_fru_pmbus.bit_offset_4_5= +psu_fru_pmbus.str_cons_4_5= + +# mfr_model +psu_fru_pmbus.mode_4_8=config +psu_fru_pmbus.int_cons_4_8=0 +psu_fru_pmbus.src_4_8=file +psu_fru_pmbus.frmt_4_8=buf +psu_fru_pmbus.fpath_4_8=/sys/bus/i2c/devices/56-0060/mfr_model +psu_fru_pmbus.addr_4_8=0 +psu_fru_pmbus.len_4_8=32 +psu_fru_pmbus.bit_offset_4_8= +psu_fru_pmbus.str_cons_4_8= + +# mfr_date +psu_fru_pmbus.mode_4_12=config +psu_fru_pmbus.int_cons_4_12=0 +psu_fru_pmbus.src_4_12=file +psu_fru_pmbus.frmt_4_12=buf +psu_fru_pmbus.fpath_4_12=/sys/bus/i2c/devices/56-0060/mfr_date +psu_fru_pmbus.addr_4_12=0 +psu_fru_pmbus.len_4_12=32 +psu_fru_pmbus.bit_offset_4_12= +psu_fru_pmbus.str_cons_4_12= + +# mfr_id +psu_fru_pmbus.mode_4_13=config +psu_fru_pmbus.int_cons_4_13=0 +psu_fru_pmbus.src_4_13=file +psu_fru_pmbus.frmt_4_13=buf +psu_fru_pmbus.fpath_4_13=/sys/bus/i2c/devices/56-0060/mfr_id +psu_fru_pmbus.addr_4_13=0 +psu_fru_pmbus.len_4_13=32 +psu_fru_pmbus.bit_offset_4_13= +psu_fru_pmbus.str_cons_4_13= + +# Configuration items: PSU PMBus information +# Description: Format other_i2c_dev_[main_dev]_[psu_index] +# Note: main_dev,PSU is 2, psu_index:Power supply number, start with 1 +other_i2c_dev.bus_2_1=53 +other_i2c_dev.addr_2_1=0x60 +other_i2c_dev.bus_2_2=54 +other_i2c_dev.addr_2_2=0x60 +other_i2c_dev.bus_2_3=55 +other_i2c_dev.addr_2_3=0x60 +other_i2c_dev.bus_2_4=56 +other_i2c_dev.addr_2_4=0x60 + +# Configuration items: PMBUS register address of the power supply +# Description: Format psu_status_[psu_index]_[reg_id] +# Note:psu_index:Power supply number,start with 1 reg_id, 9:Power Output Status (0x79) +psu_pmbus_reg.mode_1_9=config +psu_pmbus_reg.src_1_9=other_i2c +psu_pmbus_reg.frmt_1_9=byte +psu_pmbus_reg.pola_1_9=negative +psu_pmbus_reg.addr_1_9=0x02010079 +psu_pmbus_reg.len_1_9=2 +psu_pmbus_reg.bit_offset_1_9= + +psu_pmbus_reg.mode_2_9=config +psu_pmbus_reg.src_2_9=other_i2c +psu_pmbus_reg.frmt_2_9=byte +psu_pmbus_reg.pola_2_9=negative +psu_pmbus_reg.addr_2_9=0x02020079 +psu_pmbus_reg.len_2_9=2 +psu_pmbus_reg.bit_offset_2_9= + +psu_pmbus_reg.mode_3_9=config +psu_pmbus_reg.src_3_9=other_i2c +psu_pmbus_reg.frmt_3_9=byte +psu_pmbus_reg.pola_3_9=negative +psu_pmbus_reg.addr_3_9=0x02030079 +psu_pmbus_reg.len_3_9=2 +psu_pmbus_reg.bit_offset_3_9= + +psu_pmbus_reg.mode_4_9=config +psu_pmbus_reg.src_4_9=other_i2c +psu_pmbus_reg.frmt_4_9=byte +psu_pmbus_reg.pola_4_9=negative +psu_pmbus_reg.addr_4_9=0x02040079 +psu_pmbus_reg.len_4_9=2 +psu_pmbus_reg.bit_offset_4_9= + +# Configuration items:PMBUS register address of the power supply +# Description: Format psu_status_[psu_index]_[reg_id] +# Note:psu_index:Power supply number,start with 1 reg_id, 10:Power input Status (0x79) +psu_pmbus_reg.mode_1_10=config +psu_pmbus_reg.src_1_10=other_i2c +psu_pmbus_reg.frmt_1_10=byte +psu_pmbus_reg.pola_1_10=negative +psu_pmbus_reg.addr_1_10=0x02010079 +psu_pmbus_reg.len_1_10=2 +psu_pmbus_reg.bit_offset_1_10= + +psu_pmbus_reg.mode_2_10=config +psu_pmbus_reg.src_2_10=other_i2c +psu_pmbus_reg.frmt_2_10=byte +psu_pmbus_reg.pola_2_10=negative +psu_pmbus_reg.addr_2_10=0x02020079 +psu_pmbus_reg.len_2_10=2 +psu_pmbus_reg.bit_offset_2_10= + +psu_pmbus_reg.mode_3_10=config +psu_pmbus_reg.src_3_10=other_i2c +psu_pmbus_reg.frmt_3_10=byte +psu_pmbus_reg.pola_3_10=negative +psu_pmbus_reg.addr_3_10=0x02030079 +psu_pmbus_reg.len_3_10=2 +psu_pmbus_reg.bit_offset_3_10= + +psu_pmbus_reg.mode_4_10=config +psu_pmbus_reg.src_4_10=other_i2c +psu_pmbus_reg.frmt_4_10=byte +psu_pmbus_reg.pola_4_10=negative +psu_pmbus_reg.addr_4_10=0x02040079 +psu_pmbus_reg.len_4_10=2 +psu_pmbus_reg.bit_offset_4_10= + +# Configuration items:PMBUS register address of the power supply +# Description: Format psu_status_[psu_index]_[reg_id] +# Note:psu_index:Power supply number,,start with 1 reg_id 11:Power Input type (0x80) +psu_pmbus_reg.mode_1_11=constant +psu_pmbus_reg.int_cons_1_11=2 + +psu_pmbus_reg.mode_2_11=constant +psu_pmbus_reg.int_cons_2_11=2 + +psu_pmbus_reg.mode_3_11=constant +psu_pmbus_reg.int_cons_3_11=2 + +psu_pmbus_reg.mode_4_11=constant +psu_pmbus_reg.int_cons_4_11=2 + +# Configuration items: Input status of the power module +# Description: Format psu_pmbus_id_[psu_index]_[psu_sensor_type]=value +# Note: psu_index is Power supply number,start with 1, psu_sensor_type is PMBUS type,Input stateis 10 +# value value:bus[8]_addr[16]_offset[8] + +psu_pmbus_id_1_11=0x53006080 +psu_pmbus_id_2_11=0x54006080 +psu_pmbus_id_3_11=0x55006080 +psu_pmbus_id_4_11=0x56006080 + +# Configuration items: Input status of the power module +# Description: Format psu_pmbus_id_[psu_index]_[psu_sensor_type]=value +# Note: psu_index is Power supply number,start with 1, psu_sensor_type is PMBUS type,Input stateis 10 +# value value:bus[8]_addr[16]_offset[8] +# present +psu_status.mode_1_0=constant +psu_status.int_cons_1_0=1 + +# output +psu_status.mode_1_1=config +psu_status.src_1_1=logic_file +psu_status.frmt_1_1=bit +psu_status.pola_1_1=positive +psu_status.fpath_1_1=/dev/cpld1 +psu_status.addr_1_1=0xc7 +psu_status.len_1_1=1 +psu_status.bit_offset_1_1=0 + +# alert +psu_status.mode_1_2=config +psu_status.src_1_2=logic_file +psu_status.frmt_1_2=bit +psu_status.pola_1_2=negative +psu_status.fpath_1_2=/dev/cpld1 +psu_status.addr_1_2=0xc5 +psu_status.len_1_2=1 +psu_status.bit_offset_1_2=0 + +psu_status.mode_2_0=constant +psu_status.int_cons_2_0=1 + +psu_status.mode_2_1=config +psu_status.src_2_1=logic_file +psu_status.frmt_2_1=bit +psu_status.pola_2_1=positive +psu_status.fpath_2_1=/dev/cpld1 +psu_status.addr_2_1=0xc7 +psu_status.len_2_1=1 +psu_status.bit_offset_2_1=1 + +psu_status.mode_2_2=config +psu_status.src_2_2=logic_file +psu_status.frmt_2_2=bit +psu_status.pola_2_2=negative +psu_status.fpath_2_2=/dev/cpld1 +psu_status.addr_2_2=0xc5 +psu_status.len_2_2=1 +psu_status.bit_offset_2_2=1 + +psu_status.mode_3_0=constant +psu_status.int_cons_3_0=1 + +psu_status.mode_3_1=config +psu_status.src_3_1=logic_file +psu_status.frmt_3_1=bit +psu_status.pola_3_1=positive +psu_status.fpath_3_1=/dev/cpld1 +psu_status.addr_3_1=0xc7 +psu_status.len_3_1=1 +psu_status.bit_offset_3_1=2 + +psu_status.mode_3_2=config +psu_status.src_3_2=logic_file +psu_status.frmt_3_2=bit +psu_status.pola_3_2=negative +psu_status.fpath_3_2=/dev/cpld1 +psu_status.addr_3_2=0xc5 +psu_status.len_3_2=1 +psu_status.bit_offset_3_2=2 + +psu_status.mode_4_0=constant +psu_status.int_cons_4_0=1 + +psu_status.mode_4_1=config +psu_status.src_4_1=logic_file +psu_status.frmt_4_1=bit +psu_status.pola_4_1=positive +psu_status.fpath_4_1=/dev/cpld1 +psu_status.addr_4_1=0xc7 +psu_status.len_4_1=1 +psu_status.bit_offset_4_1=3 + +psu_status.mode_4_2=config +psu_status.src_4_2=logic_file +psu_status.frmt_4_2=bit +psu_status.pola_4_2=negative +psu_status.fpath_4_2=/dev/cpld1 +psu_status.addr_4_2=0xc5 +psu_status.len_4_2=1 +psu_status.bit_offset_4_2=3 + +# 0:None 1:in_vol 2:in_curr 3:in_power 4:out_vol 5:out_curr 6:out_power 7:fan +# psu1 in_vol +hwmon_psu.mode_1_1=config +hwmon_psu.int_cons_1_1=0 +hwmon_psu.src_1_1=file +hwmon_psu.frmt_1_1=buf +hwmon_psu.fpath_1_1=/sys/bus/i2c/devices/53-0060/hwmon/ +hwmon_psu.addr_1_1=0 +hwmon_psu.len_1_1=8 +hwmon_psu.bit_offset_1_1= +hwmon_psu.str_cons_1_1=in1_input + +# psu1 in_curr +hwmon_psu.mode_1_2=config +hwmon_psu.int_cons_1_2=0 +hwmon_psu.src_1_2=file +hwmon_psu.frmt_1_2=buf +hwmon_psu.fpath_1_2=/sys/bus/i2c/devices/53-0060/hwmon/ +hwmon_psu.addr_1_2=0 +hwmon_psu.len_1_2=8 +hwmon_psu.bit_offset_1_2= +hwmon_psu.str_cons_1_2=curr1_input + +# psu1 in_power +hwmon_psu.mode_1_3=config +hwmon_psu.int_cons_1_3=0 +hwmon_psu.src_1_3=file +hwmon_psu.frmt_1_3=buf +hwmon_psu.fpath_1_3=/sys/bus/i2c/devices/53-0060/hwmon/ +hwmon_psu.addr_1_3=0 +hwmon_psu.len_1_3=16 +hwmon_psu.bit_offset_1_3=0 +hwmon_psu.str_cons_1_3=power1_input + +# psu1 out_vol +hwmon_psu.mode_1_4=config +hwmon_psu.int_cons_1_4=0 +hwmon_psu.src_1_4=file +hwmon_psu.frmt_1_4=buf +hwmon_psu.fpath_1_4=/sys/bus/i2c/devices/53-0060/hwmon/ +hwmon_psu.addr_1_4=0 +hwmon_psu.len_1_4=8 +hwmon_psu.bit_offset_1_4= +hwmon_psu.str_cons_1_4=in2_input + +# psu1 out_curr +hwmon_psu.mode_1_5=config +hwmon_psu.int_cons_1_5=0 +hwmon_psu.src_1_5=file +hwmon_psu.frmt_1_5=buf +hwmon_psu.fpath_1_5=/sys/bus/i2c/devices/53-0060/hwmon/ +hwmon_psu.addr_1_5=0 +hwmon_psu.len_1_5=8 +hwmon_psu.bit_offset_1_5= +hwmon_psu.str_cons_1_5=curr2_input + +# psu1 out_power +hwmon_psu.mode_1_6=config +hwmon_psu.int_cons_1_6=0 +hwmon_psu.src_1_6=file +hwmon_psu.frmt_1_6=buf +hwmon_psu.fpath_1_6=/sys/bus/i2c/devices/53-0060/hwmon/ +hwmon_psu.addr_1_6=0 +hwmon_psu.len_1_6=16 +hwmon_psu.bit_offset_1_6=0 +hwmon_psu.str_cons_1_6=power2_input + +# psu2 in_vol +hwmon_psu.mode_2_1=config +hwmon_psu.int_cons_2_1=0 +hwmon_psu.src_2_1=file +hwmon_psu.frmt_2_1=buf +hwmon_psu.fpath_2_1=/sys/bus/i2c/devices/54-0060/hwmon/ +hwmon_psu.addr_2_1=0 +hwmon_psu.len_2_1=8 +hwmon_psu.bit_offset_2_1= +hwmon_psu.str_cons_2_1=in1_input + +# psu2 in_curr +hwmon_psu.mode_2_2=config +hwmon_psu.int_cons_2_2=0 +hwmon_psu.src_2_2=file +hwmon_psu.frmt_2_2=buf +hwmon_psu.fpath_2_2=/sys/bus/i2c/devices/54-0060/hwmon/ +hwmon_psu.addr_2_2=0 +hwmon_psu.len_2_2=8 +hwmon_psu.bit_offset_2_2= +hwmon_psu.str_cons_2_2=curr1_input + +# psu2 in_power +hwmon_psu.mode_2_3=config +hwmon_psu.int_cons_2_3=0 +hwmon_psu.src_2_3=file +hwmon_psu.frmt_2_3=buf +hwmon_psu.fpath_2_3=/sys/bus/i2c/devices/54-0060/hwmon/ +hwmon_psu.addr_2_3=0 +hwmon_psu.len_2_3=16 +hwmon_psu.bit_offset_2_3=0 +hwmon_psu.str_cons_2_3=power1_input + +# psu2 out_vol +hwmon_psu.mode_2_4=config +hwmon_psu.int_cons_2_4=0 +hwmon_psu.src_2_4=file +hwmon_psu.frmt_2_4=buf +hwmon_psu.fpath_2_4=/sys/bus/i2c/devices/54-0060/hwmon/ +hwmon_psu.addr_2_4=0 +hwmon_psu.len_2_4=8 +hwmon_psu.bit_offset_2_4= +hwmon_psu.str_cons_2_4=in2_input + +# psu2 out_curr +hwmon_psu.mode_2_5=config +hwmon_psu.int_cons_2_5=0 +hwmon_psu.src_2_5=file +hwmon_psu.frmt_2_5=buf +hwmon_psu.fpath_2_5=/sys/bus/i2c/devices/54-0060/hwmon/ +hwmon_psu.addr_2_5=0 +hwmon_psu.len_2_5=8 +hwmon_psu.bit_offset_2_5= +hwmon_psu.str_cons_2_5=curr2_input + +# psu2 out_power +hwmon_psu.mode_2_6=config +hwmon_psu.int_cons_2_6=0 +hwmon_psu.src_2_6=file +hwmon_psu.frmt_2_6=buf +hwmon_psu.fpath_2_6=/sys/bus/i2c/devices/54-0060/hwmon/ +hwmon_psu.addr_2_6=0 +hwmon_psu.len_2_6=16 +hwmon_psu.bit_offset_2_6=0 +hwmon_psu.str_cons_2_6=power2_input + +# psu3 in_vol +hwmon_psu.mode_3_1=config +hwmon_psu.int_cons_3_1=0 +hwmon_psu.src_3_1=file +hwmon_psu.frmt_3_1=buf +hwmon_psu.fpath_3_1=/sys/bus/i2c/devices/55-0060/hwmon/ +hwmon_psu.addr_3_1=0 +hwmon_psu.len_3_1=8 +hwmon_psu.bit_offset_3_1= +hwmon_psu.str_cons_3_1=in1_input +# psu3 in_curr +hwmon_psu.mode_3_2=config +hwmon_psu.int_cons_3_2=0 +hwmon_psu.src_3_2=file +hwmon_psu.frmt_3_2=buf +hwmon_psu.fpath_3_2=/sys/bus/i2c/devices/55-0060/hwmon/ +hwmon_psu.addr_3_2=0 +hwmon_psu.len_3_2=8 +hwmon_psu.bit_offset_3_2= +hwmon_psu.str_cons_3_2=curr1_input + +# psu3 in_power +hwmon_psu.mode_3_3=config +hwmon_psu.int_cons_3_3=0 +hwmon_psu.src_3_3=file +hwmon_psu.frmt_3_3=buf +hwmon_psu.fpath_3_3=/sys/bus/i2c/devices/55-0060/hwmon/ +hwmon_psu.addr_3_3=0 +hwmon_psu.len_3_3=16 +hwmon_psu.bit_offset_3_3=0 +hwmon_psu.str_cons_3_3=power1_input + +# psu3 out_vol +hwmon_psu.mode_3_4=config +hwmon_psu.int_cons_3_4=0 +hwmon_psu.src_3_4=file +hwmon_psu.frmt_3_4=buf +hwmon_psu.fpath_3_4=/sys/bus/i2c/devices/55-0060/hwmon/ +hwmon_psu.addr_3_4=0 +hwmon_psu.len_3_4=8 +hwmon_psu.bit_offset_3_4= +hwmon_psu.str_cons_3_4=in2_input + +# psu3 out_curr +hwmon_psu.mode_3_5=config +hwmon_psu.int_cons_3_5=0 +hwmon_psu.src_3_5=file +hwmon_psu.frmt_3_5=buf +hwmon_psu.fpath_3_5=/sys/bus/i2c/devices/55-0060/hwmon/ +hwmon_psu.addr_3_5=0 +hwmon_psu.len_3_5=8 +hwmon_psu.bit_offset_3_5= +hwmon_psu.str_cons_3_5=curr2_input + +# psu3 out_power +hwmon_psu.mode_3_6=config +hwmon_psu.int_cons_3_6=0 +hwmon_psu.src_3_6=file +hwmon_psu.frmt_3_6=buf +hwmon_psu.fpath_3_6=/sys/bus/i2c/devices/55-0060/hwmon/ +hwmon_psu.addr_3_6=0 +hwmon_psu.len_3_6=16 +hwmon_psu.bit_offset_3_6=0 +hwmon_psu.str_cons_3_6=power2_input + +# psu4 in_vol +hwmon_psu.mode_4_1=config +hwmon_psu.int_cons_4_1=0 +hwmon_psu.src_4_1=file +hwmon_psu.frmt_4_1=buf +hwmon_psu.fpath_4_1=/sys/bus/i2c/devices/56-0060/hwmon/ +hwmon_psu.addr_4_1=0 +hwmon_psu.len_4_1=8 +hwmon_psu.bit_offset_4_1= +hwmon_psu.str_cons_4_1=in1_input +# psu4 in_curr +hwmon_psu.mode_4_2=config +hwmon_psu.int_cons_4_2=0 +hwmon_psu.src_4_2=file +hwmon_psu.frmt_4_2=buf +hwmon_psu.fpath_4_2=/sys/bus/i2c/devices/56-0060/hwmon/ +hwmon_psu.addr_4_2=0 +hwmon_psu.len_4_2=8 +hwmon_psu.bit_offset_4_2= +hwmon_psu.str_cons_4_2=curr1_input + +# psu4 in_power +hwmon_psu.mode_4_3=config +hwmon_psu.int_cons_4_3=0 +hwmon_psu.src_4_3=file +hwmon_psu.frmt_4_3=buf +hwmon_psu.fpath_4_3=/sys/bus/i2c/devices/56-0060/hwmon/ +hwmon_psu.addr_4_3=0 +hwmon_psu.len_4_3=16 +hwmon_psu.bit_offset_4_3=0 +hwmon_psu.str_cons_4_3=power1_input + +# psu4 out_vol +hwmon_psu.mode_4_4=config +hwmon_psu.int_cons_4_4=0 +hwmon_psu.src_4_4=file +hwmon_psu.frmt_4_4=buf +hwmon_psu.fpath_4_4=/sys/bus/i2c/devices/56-0060/hwmon/ +hwmon_psu.addr_4_4=0 +hwmon_psu.len_4_4=8 +hwmon_psu.bit_offset_4_4= +hwmon_psu.str_cons_4_4=in2_input + +# psu4 out_curr +hwmon_psu.mode_4_5=config +hwmon_psu.int_cons_4_5=0 +hwmon_psu.src_4_5=file +hwmon_psu.frmt_4_5=buf +hwmon_psu.fpath_4_5=/sys/bus/i2c/devices/56-0060/hwmon/ +hwmon_psu.addr_4_5=0 +hwmon_psu.len_4_5=8 +hwmon_psu.bit_offset_4_5= +hwmon_psu.str_cons_4_5=curr2_input + +# psu4 out_power +hwmon_psu.mode_4_6=config +hwmon_psu.int_cons_4_6=0 +hwmon_psu.src_4_6=file +hwmon_psu.frmt_4_6=buf +hwmon_psu.fpath_4_6=/sys/bus/i2c/devices/56-0060/hwmon/ +hwmon_psu.addr_4_6=0 +hwmon_psu.len_4_6=16 +hwmon_psu.bit_offset_4_6=0 +hwmon_psu.str_cons_4_6=power2_input + +# Configuration item: temperature hwmon path +# Format: hwmon_temp[key1]_[key2] +# Note: key1: High 8bit indicates the index of the device, starting from 1; low 8bit indicates the temperature index, starting from 1 +# key2: High 4bit indicates the master device type, power supply is 5, low 4bit indicates the temperature type 0:input 1:alias +# 2:type 3:max 4:max_hyst 5:min 6:crit +# mode: str_constant takes the value of str_cons directly and config reads it in the way specified by src +# int_cons:N Original value /(10^N) +# fpath: indicates the first half of the hwmon path +# bit_offset: specifies the number of decimal places. If not configured, the original precision is retained +# str_cons: when mode is str_constant, its value is the result of reading, and when reading from a file, the name of the file being read + +# psu1 temp1 input +hwmon_temp.mode_0x0101_0x20=config +hwmon_temp.int_cons_0x0101_0x20=0 +hwmon_temp.src_0x0101_0x20=file +hwmon_temp.frmt_0x0101_0x20=buf +hwmon_temp.fpath_0x0101_0x20=/sys/bus/i2c/devices/53-0060/hwmon/ +hwmon_temp.addr_0x0101_0x20=0 +hwmon_temp.len_0x0101_0x20=8 +hwmon_temp.bit_offset_0x0101_0x20= +hwmon_temp.str_cons_0x0101_0x20=temp1_input +# psu1 temp1 alias +hwmon_temp.mode_0x0101_0x21=str_constant +hwmon_temp.str_cons_0x0101_0x21=temp0 +# psu1 temp1 max +hwmon_temp.mode_0x0101_0x23=str_constant +hwmon_temp.str_cons_0x0101_0x23=125000 +# psu1 temp1 min +hwmon_temp.mode_0x0101_0x25=str_constant +hwmon_temp.str_cons_0x0101_0x25=-40000 +# psu1 temp1 high +hwmon_temp.mode_0x0101_0x29=str_constant +hwmon_temp.str_cons_0x0101_0x29=115000 +# psu1 temp1 low +hwmon_temp.mode_0x0101_0x2a=str_constant +hwmon_temp.str_cons_0x0101_0x2a=-20000 +# psu1 temp1 type +hwmon_temp.mode_0x0101_0x22=str_constant +hwmon_temp.str_cons_0x0101_0x22=psu_pmbus + +# psu1 temp2 input +hwmon_temp.mode_0x0102_0x20=config +hwmon_temp.int_cons_0x0102_0x20=0 +hwmon_temp.src_0x0102_0x20=file +hwmon_temp.frmt_0x0102_0x20=buf +hwmon_temp.fpath_0x0102_0x20=/sys/bus/i2c/devices/53-0060/hwmon/ +hwmon_temp.addr_0x0102_0x20=0 +hwmon_temp.len_0x0102_0x20=8 +hwmon_temp.bit_offset_0x0102_0x20= +hwmon_temp.str_cons_0x0102_0x20=temp2_input +# psu1 temp2 alias +hwmon_temp.mode_0x0102_0x21=str_constant +hwmon_temp.str_cons_0x0102_0x21=temp1 +# psu1 temp2 max +hwmon_temp.mode_0x0102_0x23=str_constant +hwmon_temp.str_cons_0x0102_0x23=125000 +# psu1 temp2 min +hwmon_temp.mode_0x0102_0x25=str_constant +hwmon_temp.str_cons_0x0102_0x25=-40000 +# psu1 temp2 high +hwmon_temp.mode_0x0102_0x29=str_constant +hwmon_temp.str_cons_0x0102_0x29=115000 +# psu1 temp2 low +hwmon_temp.mode_0x0102_0x2a=str_constant +hwmon_temp.str_cons_0x0102_0x2a=-20000 +# psu1 temp2 type +hwmon_temp.mode_0x0102_0x22=str_constant +hwmon_temp.str_cons_0x0102_0x22=psu_pmbus + +# psu2 temp1 input +hwmon_temp.mode_0x0201_0x20=config +hwmon_temp.int_cons_0x0201_0x20=0 +hwmon_temp.src_0x0201_0x20=file +hwmon_temp.frmt_0x0201_0x20=buf +hwmon_temp.fpath_0x0201_0x20=/sys/bus/i2c/devices/54-0060/hwmon/ +hwmon_temp.addr_0x0201_0x20=0 +hwmon_temp.len_0x0201_0x20=8 +hwmon_temp.bit_offset_0x0201_0x20= +hwmon_temp.str_cons_0x0201_0x20=temp1_input +# psu2 temp1 alias +hwmon_temp.mode_0x0201_0x21=str_constant +hwmon_temp.str_cons_0x0201_0x21=temp0 +# psu2 temp1 max +hwmon_temp.mode_0x0201_0x23=str_constant +hwmon_temp.str_cons_0x0201_0x23=125000 +# psu2 temp1 min +hwmon_temp.mode_0x0201_0x25=str_constant +hwmon_temp.str_cons_0x0201_0x25=-40000 +# psu2 temp1 high +hwmon_temp.mode_0x0201_0x29=str_constant +hwmon_temp.str_cons_0x0201_0x29=115000 +# psu2 temp1 low +hwmon_temp.mode_0x0201_0x2a=str_constant +hwmon_temp.str_cons_0x0201_0x2a=-20000 +# psu2 temp1 type +hwmon_temp.mode_0x0201_0x22=str_constant +hwmon_temp.str_cons_0x0201_0x22=psu_pmbus + +# psu2 temp2 input +hwmon_temp.mode_0x0202_0x20=config +hwmon_temp.int_cons_0x0202_0x20=0 +hwmon_temp.src_0x0202_0x20=file +hwmon_temp.frmt_0x0202_0x20=buf +hwmon_temp.fpath_0x0202_0x20=/sys/bus/i2c/devices/54-0060/hwmon/ +hwmon_temp.addr_0x0202_0x20=0 +hwmon_temp.len_0x0202_0x20=8 +hwmon_temp.bit_offset_0x0202_0x20= +hwmon_temp.str_cons_0x0202_0x20=temp2_input +# psu2 temp2 alias +hwmon_temp.mode_0x0202_0x21=str_constant +hwmon_temp.str_cons_0x0202_0x21=temp1 +# psu2 temp2 max +hwmon_temp.mode_0x0202_0x23=str_constant +hwmon_temp.str_cons_0x0202_0x23=125000 +# psu2 temp2 min +hwmon_temp.mode_0x0202_0x25=str_constant +hwmon_temp.str_cons_0x0202_0x25=-40000 +# psu2 temp2 high +hwmon_temp.mode_0x0202_0x29=str_constant +hwmon_temp.str_cons_0x0202_0x29=115000 +# psu2 temp2 low +hwmon_temp.mode_0x0202_0x2a=str_constant +hwmon_temp.str_cons_0x0202_0x2a=-20000 +# psu2 temp2 type +hwmon_temp.mode_0x0202_0x22=str_constant +hwmon_temp.str_cons_0x0202_0x22=psu_pmbus + +# psu3 temp1 input +hwmon_temp.mode_0x0301_0x20=config +hwmon_temp.int_cons_0x0301_0x20=0 +hwmon_temp.src_0x0301_0x20=file +hwmon_temp.frmt_0x0301_0x20=buf +hwmon_temp.fpath_0x0301_0x20=/sys/bus/i2c/devices/55-0060/hwmon/ +hwmon_temp.addr_0x0301_0x20=0 +hwmon_temp.len_0x0301_0x20=8 +hwmon_temp.bit_offset_0x0301_0x20= +hwmon_temp.str_cons_0x0301_0x20=temp1_input +# psu3 temp1 alias +hwmon_temp.mode_0x0301_0x21=str_constant +hwmon_temp.str_cons_0x0301_0x21=temp0 +# psu3 temp1 max +hwmon_temp.mode_0x0301_0x23=str_constant +hwmon_temp.str_cons_0x0301_0x23=125000 +# psu3 temp1 min +hwmon_temp.mode_0x0301_0x25=str_constant +hwmon_temp.str_cons_0x0301_0x25=-40000 +# psu3 temp1 high +hwmon_temp.mode_0x0301_0x29=str_constant +hwmon_temp.str_cons_0x0301_0x29=115000 +# psu3 temp1 low +hwmon_temp.mode_0x0301_0x2a=str_constant +hwmon_temp.str_cons_0x0301_0x2a=-20000 +# psu3 temp1 type +hwmon_temp.mode_0x0301_0x22=str_constant +hwmon_temp.str_cons_0x0301_0x22=psu_pmbus + +# psu3 temp2 input +hwmon_temp.mode_0x0302_0x20=config +hwmon_temp.int_cons_0x0302_0x20=0 +hwmon_temp.src_0x0302_0x20=file +hwmon_temp.frmt_0x0302_0x20=buf +hwmon_temp.fpath_0x0302_0x20=/sys/bus/i2c/devices/55-0060/hwmon/ +hwmon_temp.addr_0x0302_0x20=0 +hwmon_temp.len_0x0302_0x20=8 +hwmon_temp.bit_offset_0x0302_0x20= +hwmon_temp.str_cons_0x0302_0x20=temp2_input +# psu3 temp2 alias +hwmon_temp.mode_0x0302_0x21=str_constant +hwmon_temp.str_cons_0x0302_0x21=temp1 +# psu3 temp2 max +hwmon_temp.mode_0x0302_0x23=str_constant +hwmon_temp.str_cons_0x0302_0x23=125000 +# psu3 temp2 min +hwmon_temp.mode_0x0302_0x25=str_constant +hwmon_temp.str_cons_0x0302_0x25=-40000 +# psu3 temp2 high +hwmon_temp.mode_0x0302_0x29=str_constant +hwmon_temp.str_cons_0x0302_0x29=115000 +# psu3 temp2 low +hwmon_temp.mode_0x0302_0x2a=str_constant +hwmon_temp.str_cons_0x0302_0x2a=-20000 +# psu3 temp2 type +hwmon_temp.mode_0x0302_0x22=str_constant +hwmon_temp.str_cons_0x0302_0x22=psu_pmbus + +# psu4 temp1 input +hwmon_temp.mode_0x0401_0x20=config +hwmon_temp.int_cons_0x0401_0x20=0 +hwmon_temp.src_0x0401_0x20=file +hwmon_temp.frmt_0x0401_0x20=buf +hwmon_temp.fpath_0x0401_0x20=/sys/bus/i2c/devices/56-0060/hwmon/ +hwmon_temp.addr_0x0401_0x20=0 +hwmon_temp.len_0x0401_0x20=8 +hwmon_temp.bit_offset_0x0401_0x20= +hwmon_temp.str_cons_0x0401_0x20=temp1_input +# psu4 temp1 alias +hwmon_temp.mode_0x0401_0x21=str_constant +hwmon_temp.str_cons_0x0401_0x21=temp0 +# psu4 temp1 max +hwmon_temp.mode_0x0401_0x23=str_constant +hwmon_temp.str_cons_0x0401_0x23=125000 +# psu4 temp1 min +hwmon_temp.mode_0x0401_0x25=str_constant +hwmon_temp.str_cons_0x0401_0x25=-40000 +# psu4 temp1 high +hwmon_temp.mode_0x0401_0x29=str_constant +hwmon_temp.str_cons_0x0401_0x29=115000 +# psu4 temp1 low +hwmon_temp.mode_0x0401_0x2a=str_constant +hwmon_temp.str_cons_0x0401_0x2a=-20000 +# psu4 temp1 type +hwmon_temp.mode_0x0401_0x22=str_constant +hwmon_temp.str_cons_0x0401_0x22=psu_pmbus + +# psu4 temp2 input +hwmon_temp.mode_0x0402_0x20=config +hwmon_temp.int_cons_0x0402_0x20=0 +hwmon_temp.src_0x0402_0x20=file +hwmon_temp.frmt_0x0402_0x20=buf +hwmon_temp.fpath_0x0402_0x20=/sys/bus/i2c/devices/56-0060/hwmon/ +hwmon_temp.addr_0x0402_0x20=0 +hwmon_temp.len_0x0402_0x20=8 +hwmon_temp.bit_offset_0x0402_0x20= +hwmon_temp.str_cons_0x0402_0x20=temp2_input +# psu4 temp2 alias +hwmon_temp.mode_0x0402_0x21=str_constant +hwmon_temp.str_cons_0x0402_0x21=temp1 +# psu4 temp2 max +hwmon_temp.mode_0x0402_0x23=str_constant +hwmon_temp.str_cons_0x0402_0x23=125000 +# psu4 temp2 min +hwmon_temp.mode_0x0402_0x25=str_constant +hwmon_temp.str_cons_0x0402_0x25=-40000 +# psu4 temp2 high +hwmon_temp.mode_0x0402_0x29=str_constant +hwmon_temp.str_cons_0x0402_0x29=115000 +# psu4 temp2 low +hwmon_temp.mode_0x0402_0x2a=str_constant +hwmon_temp.str_cons_0x0402_0x2a=-20000 +# psu4 temp2 type +hwmon_temp.mode_0x0402_0x22=str_constant +hwmon_temp.str_cons_0x0402_0x22=psu_pmbus + + +# Configuration item: The number of power supply names displayed by the product +# Format: dev_num_[main_dev]_[minor_dev] +# Note: main_dev,PSU is 2, minor_dev, 6: Number of power supply names displayed +dev_num_2_6=2 + +# Configuration item: rated power of power supply +# Fill in instructions: format power_rate_supply_[index] +# Note: index indicates the ID of the power supply that is displayed +power_rate_supply_1=1300000000 +power_rate_supply_2=1300000000 + +# Psu in voltage max min +hwmon_psu.mode_1_13=str_constant +hwmon_psu.str_cons_1_13=60000 +hwmon_psu.mode_1_15=str_constant +hwmon_psu.str_cons_1_15=40000 +# Psu in current max min +hwmon_psu.mode_1_14=str_constant +hwmon_psu.str_cons_1_14=24500 +hwmon_psu.mode_1_16=str_constant +hwmon_psu.str_cons_1_16=0 +# Psu out voltage max min +hwmon_psu.mode_1_17=str_constant +hwmon_psu.str_cons_1_17=13200 +hwmon_psu.mode_1_19=str_constant +hwmon_psu.str_cons_1_19=10800 +# Psu out current max min +hwmon_psu.mode_1_18=str_constant +hwmon_psu.str_cons_1_18=90000 +hwmon_psu.mode_1_20=str_constant +hwmon_psu.str_cons_1_20=0 +# Psu in power max min +hwmon_psu.mode_1_23=str_constant +hwmon_psu.str_cons_1_23=1320000000 +hwmon_psu.mode_1_24=str_constant +hwmon_psu.str_cons_1_24=10000 +# Psu out power max min +hwmon_psu.mode_1_25=str_constant +hwmon_psu.str_cons_1_25=1200000000 +hwmon_psu.mode_1_26=str_constant +hwmon_psu.str_cons_1_26=10000 + +# Psu in voltage max min +hwmon_psu.mode_2_13=str_constant +hwmon_psu.str_cons_2_13=60000 +hwmon_psu.mode_2_15=str_constant +hwmon_psu.str_cons_2_15=40000 +# Psu in current max min +hwmon_psu.mode_2_14=str_constant +hwmon_psu.str_cons_2_14=24500 +hwmon_psu.mode_2_16=str_constant +hwmon_psu.str_cons_2_16=0 +# Psu out voltage max min +hwmon_psu.mode_2_17=str_constant +hwmon_psu.str_cons_2_17=13200 +hwmon_psu.mode_2_19=str_constant +hwmon_psu.str_cons_2_19=10800 +# Psu out current max min +hwmon_psu.mode_2_18=str_constant +hwmon_psu.str_cons_2_18=90000 +hwmon_psu.mode_2_20=str_constant +hwmon_psu.str_cons_2_20=0 +# Psu in power max min +hwmon_psu.mode_2_23=str_constant +hwmon_psu.str_cons_2_23=1320000000 +hwmon_psu.mode_2_24=str_constant +hwmon_psu.str_cons_2_24=10000 +# Psu out power max min +hwmon_psu.mode_2_25=str_constant +hwmon_psu.str_cons_2_25=1200000000 +hwmon_psu.mode_2_26=str_constant +hwmon_psu.str_cons_2_26=10000 + +# Psu in voltage max min +hwmon_psu.mode_3_13=str_constant +hwmon_psu.str_cons_3_13=60000 +hwmon_psu.mode_3_15=str_constant +hwmon_psu.str_cons_3_15=40000 +# Psu in current max min +hwmon_psu.mode_3_14=str_constant +hwmon_psu.str_cons_3_14=24500 +hwmon_psu.mode_3_16=str_constant +hwmon_psu.str_cons_3_16=0 +# Psu out voltage max min +hwmon_psu.mode_3_17=str_constant +hwmon_psu.str_cons_3_17=13200 +hwmon_psu.mode_3_19=str_constant +hwmon_psu.str_cons_3_19=10800 +# Psu out current max min +hwmon_psu.mode_3_18=str_constant +hwmon_psu.str_cons_3_18=90000 +hwmon_psu.mode_3_20=str_constant +hwmon_psu.str_cons_3_20=0 +# Psu in power max min +hwmon_psu.mode_3_23=str_constant +hwmon_psu.str_cons_3_23=1320000000 +hwmon_psu.mode_3_24=str_constant +hwmon_psu.str_cons_3_24=10000 +# Psu out power max min +hwmon_psu.mode_3_25=str_constant +hwmon_psu.str_cons_3_25=1200000000 +hwmon_psu.mode_3_26=str_constant +hwmon_psu.str_cons_3_26=10000 + +# blackbox info path +psu_blackbox_path_1=/proc/psu/53-0060/blackbox_info +psu_blackbox_path_2=/proc/psu/54-0060/blackbox_info +psu_blackbox_path_3=/proc/psu/55-0060/blackbox_info +psu_blackbox_path_4=/proc/psu/56-0060/blackbox_info + +# pmbus info +psu_pmbus_info_1=/sys/bus/i2c/devices/53-0060/pmbus_info +psu_pmbus_info_2=/sys/bus/i2c/devices/54-0060/pmbus_info +psu_pmbus_info_3=/sys/bus/i2c/devices/55-0060/pmbus_info +psu_pmbus_info_3=/sys/bus/i2c/devices/56-0060/pmbus_info + +psu_pmbus_addr_1 = 0x00350060 +psu_pmbus_addr_2 = 0x00360060 +psu_pmbus_addr_3 = 0x00370060 +psu_pmbus_addr_4 = 0x00380060 diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6951-64hc-cp/s3ip_sysfs_cfg/cfg_file/SENSOR.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6951-64hc-cp/s3ip_sysfs_cfg/cfg_file/SENSOR.cfg new file mode 100644 index 00000000000..37580dd877e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6951-64hc-cp/s3ip_sysfs_cfg/cfg_file/SENSOR.cfg @@ -0,0 +1,3769 @@ +# +# @Fill in the agreement +# 1. Complete comments must be filled in before configuration items. Comments must not be filled in the same line of +# configuration items and invalid Spaces must not be added between configuration items +# 2. The value can be in 10 or hexadecimal format. The hexadecimal value starts with "0x" +# 3. Some configuration items do not need to be filled in a specific product. To facilitate other products to copy and +# fill in the configuration items, do not delete them +# 4. Configuration item + +# Configuration item: Temperature hwmon path +# Description: Format hwmon_temp[key1]_[key2] +# Note: key1: A high 8bit indicates the device index starting from 1. A low 8bit indicates the temperature index starting from 1 +# key2:The high 4bit indicates the main device type, the sub-card is 5, and the low 4bit indicates the temperature type 0:input 1:alias +# 2:type 3:max 4:max_hyst 5:min 6:crit +# mode: str_constant takes the value of str_cons directly, and config reads it in the way specified by src +# int_cons:N raw value/(10^N) +# fpath:hwmon first half of the path +# bit_offset: Number of decimal places, retain original precision if not configured +# str_cons:if mode is str_constant,the value is result of read,if read from file the value is read file name. + +# temperature sensor number +dev_num_0_1=24 + +# voltage sensors number +dev_num_0_2=121 + +# current sensors number +dev_num_0_3=30 + + +# value : 0 +# alias : 1 +# type : 2 +# max : 3 +# hyst : 4 +# min : 5 +# crit : 6 +# range : 7 +# nominal_value : 8 +# high : 9 +# low : 10 + +# sensor temp1 input +hwmon_temp.mode_0x0001_0x00=config +hwmon_temp.int_cons_0x0001_0x00=0 +hwmon_temp.src_0x0001_0x00=file +hwmon_temp.frmt_0x0001_0x00=buf +hwmon_temp.fpath_0x0001_0x00=/sys/devices/pci0000:00/0000:00:18.3/hwmon/ +hwmon_temp.addr_0x0001_0x00=0 +hwmon_temp.len_0x0001_0x00=8 +hwmon_temp.bit_offset_0x0001_0x00= +hwmon_temp.str_cons_0x0001_0x00=temp1_input +# sensor temp1 alias +hwmon_temp.mode_0x0001_0x01=config +hwmon_temp.int_cons_0x0001_0x01= +hwmon_temp.src_0x0001_0x01=file +hwmon_temp.frmt_0x0001_0x01=buf +hwmon_temp.fpath_0x0001_0x01=/sys/devices/pci0000:00/0000:00:18.3/hwmon/ +hwmon_temp.addr_0x0001_0x01=0 +hwmon_temp.len_0x0001_0x01=16 +hwmon_temp.bit_offset_0x0001_0x01= +hwmon_temp.str_cons_0x0001_0x01=temp1_label +# sensor temp1 type +hwmon_temp.mode_0x0001_0x02=str_constant +hwmon_temp.str_cons_0x0001_0x02=cpu +# sensor temp1 max +hwmon_temp.mode_0x0001_0x03=str_constant +hwmon_temp.str_cons_0x0001_0x03=99000 +# sensor temp1 min +hwmon_temp.mode_0x0001_0x05=str_constant +hwmon_temp.str_cons_0x0001_0x05=-30000 + +# sensor temp2 input +hwmon_temp.mode_0x0002_0x00=config +hwmon_temp.int_cons_0x0002_0x00=0 +hwmon_temp.src_0x0002_0x00=file +hwmon_temp.frmt_0x0002_0x00=buf +hwmon_temp.fpath_0x0002_0x00=/sys/bus/i2c/devices/65-004b/hwmon/ +hwmon_temp.addr_0x0002_0x00=0 +hwmon_temp.len_0x0002_0x00=8 +hwmon_temp.bit_offset_0x0002_0x00= +hwmon_temp.str_cons_0x0002_0x00=temp1_input +# sensor temp2 alias +hwmon_temp.mode_0x0002_0x01=str_constant +hwmon_temp.str_cons_0x0002_0x01=FAN_CT75_01 +# sensor temp2 type +hwmon_temp.mode_0x0002_0x02=str_constant +hwmon_temp.str_cons_0x0002_0x02=lm75 +# sensor temp2 max +hwmon_temp.mode_0x0002_0x03=str_constant +hwmon_temp.str_cons_0x0002_0x03=75000 +# sensor temp2 min +hwmon_temp.mode_0x0002_0x05=str_constant +hwmon_temp.str_cons_0x0002_0x05=-30000 + +# sensor temp3 input +hwmon_temp.mode_0x0003_0x00=config +hwmon_temp.int_cons_0x0003_0x00=0 +hwmon_temp.src_0x0003_0x00=file +hwmon_temp.frmt_0x0003_0x00=buf +hwmon_temp.fpath_0x0003_0x00=/sys/bus/i2c/devices/66-004e/hwmon/ +hwmon_temp.addr_0x0003_0x00=0 +hwmon_temp.len_0x0003_0x00=8 +hwmon_temp.bit_offset_0x0003_0x00= +hwmon_temp.str_cons_0x0003_0x00=temp1_input +# sensor temp3 alias +hwmon_temp.mode_0x0003_0x01=str_constant +hwmon_temp.str_cons_0x0003_0x01=FAN_CT75_02 +# sensor temp3 type +hwmon_temp.mode_0x0003_0x02=str_constant +hwmon_temp.str_cons_0x0003_0x02=lm75 +# sensor temp3 max +hwmon_temp.mode_0x0003_0x03=str_constant +hwmon_temp.str_cons_0x0003_0x03=75000 +# sensor temp3 min +hwmon_temp.mode_0x0003_0x05=str_constant +hwmon_temp.str_cons_0x0003_0x05=-30000 + +# sensor temp4 input +hwmon_temp.mode_0x0004_0x00=config +hwmon_temp.int_cons_0x0004_0x00=0 +hwmon_temp.src_0x0004_0x00=file +hwmon_temp.frmt_0x0004_0x00=buf +hwmon_temp.fpath_0x0004_0x00=/sys/bus/i2c/devices/76-004b/hwmon/ +hwmon_temp.addr_0x0004_0x00=0 +hwmon_temp.len_0x0004_0x00=8 +hwmon_temp.bit_offset_0x0004_0x00= +hwmon_temp.str_cons_0x0004_0x00=temp1_input +# sensor temp4 alias +hwmon_temp.mode_0x0004_0x01=str_constant +hwmon_temp.str_cons_0x0004_0x01=MAC_CT75_05 +# sensor temp4 type +hwmon_temp.mode_0x0004_0x02=str_constant +hwmon_temp.str_cons_0x0004_0x02=lm75 +# sensor temp4 max +hwmon_temp.mode_0x0004_0x03=str_constant +hwmon_temp.str_cons_0x0004_0x03=75000 +# sensor temp4 min +hwmon_temp.mode_0x0004_0x05=str_constant +hwmon_temp.str_cons_0x0004_0x05=-30000 + +# sensor temp5 input +hwmon_temp.mode_0x0005_0x00=config +hwmon_temp.int_cons_0x0005_0x00=0 +hwmon_temp.src_0x0005_0x00=file +hwmon_temp.frmt_0x0005_0x00=buf +hwmon_temp.fpath_0x0005_0x00=/sys/bus/i2c/devices/77-004f/hwmon/ +hwmon_temp.addr_0x0005_0x00=0 +hwmon_temp.len_0x0005_0x00=8 +hwmon_temp.bit_offset_0x0005_0x00= +hwmon_temp.str_cons_0x0005_0x00=temp1_input +# sensor temp5 alias +hwmon_temp.mode_0x0005_0x01=str_constant +hwmon_temp.str_cons_0x0005_0x01=MAC_CT75_06 +# sensor temp5 type +hwmon_temp.mode_0x0005_0x02=str_constant +hwmon_temp.str_cons_0x0005_0x02=lm75 +# sensor temp5 max +hwmon_temp.mode_0x0005_0x03=str_constant +hwmon_temp.str_cons_0x0005_0x03=100000 +# sensor temp5 min +hwmon_temp.mode_0x0005_0x05=str_constant +hwmon_temp.str_cons_0x0005_0x05=-30000 + +# sensor temp6 input +hwmon_temp.mode_0x0006_0x00=config +hwmon_temp.int_cons_0x0006_0x00=0 +hwmon_temp.src_0x0006_0x00=file +hwmon_temp.frmt_0x0006_0x00=buf +hwmon_temp.fpath_0x0006_0x00=/sys/bus/i2c/devices/78-004c/hwmon/ +hwmon_temp.addr_0x0006_0x00=0 +hwmon_temp.len_0x0006_0x00=8 +hwmon_temp.bit_offset_0x0006_0x00= +hwmon_temp.str_cons_0x0006_0x00=temp1_input +# sensor temp6 alias +hwmon_temp.mode_0x0006_0x01=str_constant +hwmon_temp.str_cons_0x0006_0x01=MAC_CT7318MMR_01 +# sensor temp6 type +hwmon_temp.mode_0x0006_0x02=str_constant +hwmon_temp.str_cons_0x0006_0x02=ct7318 +# sensor temp6 max +hwmon_temp.mode_0x0006_0x03=str_constant +hwmon_temp.str_cons_0x0006_0x03=105000 +# sensor temp6 min +hwmon_temp.mode_0x0006_0x05=str_constant +hwmon_temp.str_cons_0x0006_0x05=-30000 + +# sensor temp7 input +hwmon_temp.mode_0x0007_0x00=config +hwmon_temp.int_cons_0x0007_0x00=0 +hwmon_temp.src_0x0007_0x00=file +hwmon_temp.frmt_0x0007_0x00=buf +hwmon_temp.fpath_0x0007_0x00=/sys/bus/i2c/devices/79-004c/hwmon/ +hwmon_temp.addr_0x0007_0x00=0 +hwmon_temp.len_0x0007_0x00=8 +hwmon_temp.bit_offset_0x0007_0x00= +hwmon_temp.str_cons_0x0007_0x00=temp1_input +# sensor temp7 alias +hwmon_temp.mode_0x0007_0x01=str_constant +hwmon_temp.str_cons_0x0007_0x01=MAC_CT7318MMR_02 +# sensor temp7 type +hwmon_temp.mode_0x0007_0x02=str_constant +hwmon_temp.str_cons_0x0007_0x02=ct7318 +# sensor temp7 max +hwmon_temp.mode_0x0007_0x03=str_constant +hwmon_temp.str_cons_0x0007_0x03=105000 +# sensor temp7 min +hwmon_temp.mode_0x0007_0x05=str_constant +hwmon_temp.str_cons_0x0007_0x05=-30000 + +# sensor temp8 input +hwmon_temp.mode_0x0008_0x00=config +hwmon_temp.int_cons_0x0008_0x00=0 +hwmon_temp.src_0x0008_0x00=file +hwmon_temp.frmt_0x0008_0x00=buf +hwmon_temp.fpath_0x0008_0x00=/sys/bus/i2c/devices/80-004c/hwmon/ +hwmon_temp.addr_0x0008_0x00=0 +hwmon_temp.len_0x0008_0x00=8 +hwmon_temp.bit_offset_0x0008_0x00= +hwmon_temp.str_cons_0x0008_0x00=temp1_input +# sensor temp8 alias +hwmon_temp.mode_0x0008_0x01=str_constant +hwmon_temp.str_cons_0x0008_0x01=MAC_CT7318MMR_03 +# sensor temp8 type +hwmon_temp.mode_0x0008_0x02=str_constant +hwmon_temp.str_cons_0x0008_0x02=ct7318 +# sensor temp8 max +hwmon_temp.mode_0x0008_0x03=str_constant +hwmon_temp.str_cons_0x0008_0x03=105000 +# sensor temp8 min +hwmon_temp.mode_0x0008_0x05=str_constant +hwmon_temp.str_cons_0x0008_0x05=-30000 + +# temp9 mac_temp_min +hwmon_temp.mode_0x0009_0x00=config +hwmon_temp.src_0x0009_0x00=cpld +hwmon_temp.addr_0x0009_0x00=0x000200e8 +hwmon_temp.frmt_0x0009_0x00=num_bytes +hwmon_temp.len_0x00009_0x00=2 +hwmon_temp.pola_0x0009_0x00=positive +hwmon_temp.str_cons_0x0009_0x00=temp0_input +hwmon_temp.int_extra1_0x0009_0x00=6 + +hwmon_temp.mode_0x0009_0x01=str_constant +hwmon_temp.str_cons_0x0009_0x01=MAC_TEMP_MIN + +hwmon_temp.mode_0x0009_0x02=str_constant +hwmon_temp.str_cons_0x0009_0x02=CPLD + +hwmon_temp.mode_0x0009_0x03=constant +hwmon_temp.int_cons_0x0009_0x03=105000 + +hwmon_temp.mode_0x0009_0x05=constant +hwmon_temp.int_cons_0x0009_0x05=-30000 + +#temp10 mac_temp_max +hwmon_temp.mode_0x000a_0x00=config +hwmon_temp.src_0x000a_0x00=cpld +hwmon_temp.addr_0x000a_0x00=0x000200ea +hwmon_temp.frmt_0x000a_0x00=num_bytes +hwmon_temp.len_0x000a_0x00=2 +hwmon_temp.pola_0x000a_0x00=positive +hwmon_temp.str_cons_0x000a_0x00=temp1_input +hwmon_temp.int_extra1_0x000a_0x00=6 + +hwmon_temp.mode_0x000a_0x01=str_constant +hwmon_temp.str_cons_0x000a_0x01=MAC_TEMP_MAX + +hwmon_temp.mode_0x000a_0x02=str_constant +hwmon_temp.str_cons_0x000a_0x02=CPLD + +hwmon_temp.mode_0x000a_0x03=constant +hwmon_temp.int_cons_0x000a_0x03=105000 + +hwmon_temp.mode_0x000a_0x05=constant +hwmon_temp.int_cons_0x000a_0x05=-30000 + +# sensor temp11 output +hwmon_temp.mode_0x000b_0x00=config +hwmon_temp.int_cons_0x000b_0x00=0 +hwmon_temp.src_0x000b_0x00=file +hwmon_temp.frmt_0x000b_0x00=buf +hwmon_temp.fpath_0x000b_0x00=/sys/bus/i2c/devices/85-0060/hwmon/ +hwmon_temp.addr_0x000b_0x00=0 +hwmon_temp.len_0x000b_0x00=8 +hwmon_temp.bit_offset_0x000b_0x00= +hwmon_temp.str_cons_0x000b_0x00=temp1_input +# sensor temp11 alias +hwmon_temp.mode_0x000b_0x01=str_constant +hwmon_temp.str_cons_0x000b_0x01=TMOS_CORE_TEMP_01 +# sensor temp11 type +hwmon_temp.mode_0x000b_0x02=str_constant +hwmon_temp.str_cons_0x000b_0x02=xdpe132g5c +# sensor temp11 min +hwmon_temp.mode_0x000b_0x05=str_constant +hwmon_temp.str_cons_0x000b_0x05=-30000 +# sensor temp11 max +hwmon_temp.mode_0x000b_0x03=str_constant +hwmon_temp.str_cons_0x000b_0x03=125000 + +# temp12 input +hwmon_temp.mode_0x000c_0x00=config +hwmon_temp.int_cons_0x000c_0x00=0 +hwmon_temp.src_0x000c_0x00=file +hwmon_temp.frmt_0x000c_0x00=buf +hwmon_temp.fpath_0x000c_0x00=/sys/bus/i2c/devices/85-0062/hwmon/ +hwmon_temp.addr_0x000c_0x00=0 +hwmon_temp.len_0x000c_0x00=8 +hwmon_temp.bit_offset_0x000c_0x00= +hwmon_temp.str_cons_0x000c_0x00=temp1_input +# sensor temp12 alias +hwmon_temp.mode_0x000c_0x01=str_constant +hwmon_temp.str_cons_0x000c_0x01=TMOS_CORE_TEMP_02 +# sensor temp12 type +hwmon_temp.mode_0x000c_0x02=str_constant +hwmon_temp.str_cons_0x000c_0x02=xdpe12284c +# sensor temp12 min +hwmon_temp.mode_0x000c_0x05=str_constant +hwmon_temp.str_cons_0x000c_0x05=-30000 +# sensor temp12 max +hwmon_temp.mode_0x000c_0x03=str_constant +hwmon_temp.str_cons_0x000c_0x03=125000 + +# temp13 board +hwmon_temp.mode_0x000d_0x00=config +hwmon_temp.int_cons_0x000d_0x00=0 +hwmon_temp.src_0x000d_0x00=file +hwmon_temp.frmt_0x000d_0x00=buf +hwmon_temp.fpath_0x000d_0x00=/sys/bus/i2c/devices/85-0074/hwmon/ +hwmon_temp.addr_0x000d_0x00=0 +hwmon_temp.len_0x000d_0x00=8 +hwmon_temp.bit_offset_0x000d_0x00= +hwmon_temp.str_cons_0x000d_0x00=temp1_input +# sensor temp13 alias +hwmon_temp.mode_0x000d_0x01=str_constant +hwmon_temp.str_cons_0x000d_0x01=TMOS_CORE_TEMP_03 +# sensor temp13 type +hwmon_temp.mode_0x000d_0x02=str_constant +hwmon_temp.str_cons_0x000d_0x02=xdpe12284c +# sensor temp13 min +hwmon_temp.mode_0x000d_0x05=str_constant +hwmon_temp.str_cons_0x000d_0x05=-30000 +# sensor temp13 max +hwmon_temp.mode_0x000d_0x03=str_constant +hwmon_temp.str_cons_0x000d_0x03=125000 + +# temp14 input +hwmon_temp.mode_0x000e_0x00=config +hwmon_temp.int_cons_0x000e_0x00=0 +hwmon_temp.src_0x000e_0x00=file +hwmon_temp.frmt_0x000e_0x00=buf +hwmon_temp.fpath_0x000e_0x00=/sys/bus/i2c/devices/87-0062/hwmon/ +hwmon_temp.addr_0x000e_0x00=0 +hwmon_temp.len_0x000e_0x00=8 +hwmon_temp.bit_offset_0x000e_0x00= +hwmon_temp.str_cons_0x000e_0x00=temp1_input +# sensor temp14 alias +hwmon_temp.mode_0x000e_0x01=str_constant +hwmon_temp.str_cons_0x000e_0x01=TMOS_CORE_TEMP_04 +# sensor temp14 type +hwmon_temp.mode_0x000e_0x02=str_constant +hwmon_temp.str_cons_0x000e_0x02=xdpe12284c +# sensor temp14 min +hwmon_temp.mode_0x000e_0x05=str_constant +hwmon_temp.str_cons_0x000e_0x05=-30000 +# sensor temp14 max +hwmon_temp.mode_0x000e_0x03=str_constant +hwmon_temp.str_cons_0x000e_0x03=125000 + +# temp15 input +hwmon_temp.mode_0x000f_0x00=config +hwmon_temp.int_cons_0x000f_0x00=0 +hwmon_temp.src_0x000f_0x00=file +hwmon_temp.frmt_0x000f_0x00=buf +hwmon_temp.fpath_0x000f_0x00=/sys/bus/i2c/devices/87-0060/hwmon/ +hwmon_temp.addr_0x000f_0x00=0 +hwmon_temp.len_0x000f_0x00=8 +hwmon_temp.bit_offset_0x000f_0x00= +hwmon_temp.str_cons_0x000f_0x00=temp1_input +# sensor temp15 alias +hwmon_temp.mode_0x000f_0x01=str_constant +hwmon_temp.str_cons_0x000f_0x01=TMOS_CORE_TEMP_05 +# sensor temp15 type +hwmon_temp.mode_0x000f_0x02=str_constant +hwmon_temp.str_cons_0x000f_0x02=xdpe12284c +# sensor temp15 min +hwmon_temp.mode_0x000f_0x05=str_constant +hwmon_temp.str_cons_0x000f_0x05=-30000 +# sensor temp15 max +hwmon_temp.mode_0x000f_0x03=str_constant +hwmon_temp.str_cons_0x000f_0x03=125000 + +# temp16 input +hwmon_temp.mode_0x0010_0x00=config +hwmon_temp.int_cons_0x0010_0x00=0 +hwmon_temp.src_0x0010_0x00=file +hwmon_temp.frmt_0x0010_0x00=buf +hwmon_temp.fpath_0x0010_0x00=/sys/bus/i2c/devices/87-0074/hwmon/ +hwmon_temp.addr_0x0010_0x00=0 +hwmon_temp.len_0x0010_0x00=8 +hwmon_temp.bit_offset_0x0010_0x00= +hwmon_temp.str_cons_0x0010_0x00=temp1_input +# sensor temp16 alias +hwmon_temp.mode_0x0010_0x01=str_constant +hwmon_temp.str_cons_0x0010_0x01=TMOS_CORE_TEMP_06 +# sensor temp16 type +hwmon_temp.mode_0x0010_0x02=str_constant +hwmon_temp.str_cons_0x0010_0x02=xdpe12284c +# sensor temp16 min +hwmon_temp.mode_0x0010_0x05=str_constant +hwmon_temp.str_cons_0x0010_0x05=-30000 +# sensor temp16 max +hwmon_temp.mode_0x0010_0x03=str_constant +hwmon_temp.str_cons_0x0010_0x03=125000 + +# temp17 TMOS_CORE_TEMP_07 +hwmon_temp.mode_0x0011_0x00=config +hwmon_temp.int_cons_0x0011_0x00=0 +hwmon_temp.src_0x0011_0x00=file +hwmon_temp.frmt_0x0011_0x00=buf +hwmon_temp.fpath_0x0011_0x00=/sys/bus/i2c/devices/89-0060/hwmon/ +hwmon_temp.addr_0x0011_0x00=0 +hwmon_temp.len_0x0011_0x00=8 +hwmon_temp.bit_offset_0x0011_0x00= +hwmon_temp.str_cons_0x0011_0x00=temp1_input + +hwmon_temp.mode_0x0011_0x01=str_constant +hwmon_temp.str_cons_0x0011_0x01=TMOS_CORE_TEMP_07 + +hwmon_temp.mode_0x0011_0x02=str_constant +hwmon_temp.str_cons_0x0011_0x02=xdpe12284c + +hwmon_temp.mode_0x0011_0x03=constant +hwmon_temp.int_cons_0x0011_0x03=125000 + +hwmon_temp.mode_0x0011_0x05=constant +hwmon_temp.int_cons_0x0011_0x05=-30000 + +#temp18 TMOS_CORE_TEMP_08 +hwmon_temp.mode_0x0012_0x00=config +hwmon_temp.int_cons_0x0012_0x00=0 +hwmon_temp.src_0x0012_0x00=file +hwmon_temp.frmt_0x0012_0x00=buf +hwmon_temp.fpath_0x0012_0x00=/sys/bus/i2c/devices/89-0074/hwmon/ +hwmon_temp.addr_0x0012_0x00=0 +hwmon_temp.len_0x0012_0x00=8 +hwmon_temp.bit_offset_0x0012_0x00= +hwmon_temp.str_cons_0x0012_0x00=temp1_input + +hwmon_temp.mode_0x0012_0x01=str_constant +hwmon_temp.str_cons_0x0012_0x01=TMOS_CORE_TEMP_08 + +hwmon_temp.mode_0x0012_0x02=str_constant +hwmon_temp.str_cons_0x0012_0x02=xdpe12284c + +hwmon_temp.mode_0x0012_0x03=constant +hwmon_temp.int_cons_0x0012_0x03=125000 + +hwmon_temp.mode_0x0012_0x05=constant +hwmon_temp.int_cons_0x0012_0x05=-30000 + +# temp19 +hwmon_temp.mode_0x0013_0x00=config +hwmon_temp.int_cons_0x0013_0x00=0 +hwmon_temp.src_0x0013_0x00=file +hwmon_temp.frmt_0x0013_0x00=buf +hwmon_temp.fpath_0x0013_0x00=/sys/bus/i2c/devices/90-0060/hwmon/ +hwmon_temp.addr_0x0013_0x00=0 +hwmon_temp.len_0x0013_0x00=8 +hwmon_temp.bit_offset_0x0013_0x00= +hwmon_temp.str_cons_0x0013_0x00=temp1_input +# sensor temp19 alias +hwmon_temp.mode_0x0013_0x01=str_constant +hwmon_temp.str_cons_0x0013_0x01=TMOS_CORE_TEMP_09 +# sensor temp19 type +hwmon_temp.mode_0x0013_0x02=str_constant +hwmon_temp.str_cons_0x0013_0x02=xdpe12284c +# sensor temp19 max +hwmon_temp.mode_0x0013_0x03=str_constant +hwmon_temp.str_cons_0x0013_0x03=125000 +# sensor temp19 min +hwmon_temp.mode_0x0013_0x05=str_constant +hwmon_temp.str_cons_0x0013_0x05=-30000 + +# temp20 +hwmon_temp.mode_0x0014_0x00=config +hwmon_temp.int_cons_0x0014_0x00=0 +hwmon_temp.src_0x0014_0x00=file +hwmon_temp.frmt_0x0014_0x00=buf +hwmon_temp.fpath_0x0014_0x00=/sys/bus/i2c/devices/91-0060/hwmon/ +hwmon_temp.addr_0x0014_0x00=0 +hwmon_temp.len_0x0014_0x00=8 +hwmon_temp.bit_offset_0x0014_0x00= +hwmon_temp.str_cons_0x0014_0x00=temp1_input +# sensor temp20 alias +hwmon_temp.mode_0x0014_0x01=str_constant +hwmon_temp.str_cons_0x0014_0x01=TMOS_CORE_TEMP_10 +# sensor temp20 type +hwmon_temp.mode_0x0014_0x02=str_constant +hwmon_temp.str_cons_0x0014_0x02=xdpe12284c +# sensor temp20 max +hwmon_temp.mode_0x0014_0x03=str_constant +hwmon_temp.str_cons_0x0014_0x03=125000 +# sensor temp20 min +hwmon_temp.mode_0x0014_0x05=str_constant +hwmon_temp.str_cons_0x0014_0x05=-30000 + +# temp21 TMOS_CORE_TEMP_11 +hwmon_temp.mode_0x0015_0x00=config +hwmon_temp.int_cons_0x0015_0x00=0 +hwmon_temp.src_0x0015_0x00=file +hwmon_temp.frmt_0x0015_0x00=buf +hwmon_temp.fpath_0x0015_0x00=/sys/bus/i2c/devices/91-0062/hwmon/ +hwmon_temp.addr_0x0015_0x00=0 +hwmon_temp.len_0x0015_0x00=8 +hwmon_temp.bit_offset_0x0015_0x00= +hwmon_temp.str_cons_0x0015_0x00=temp1_input +# sensor temp21 alias +hwmon_temp.mode_0x0015_0x01=str_constant +hwmon_temp.str_cons_0x0015_0x01=TMOS_CORE_TEMP_11 +# sensor temp21 type +hwmon_temp.mode_0x0015_0x02=str_constant +hwmon_temp.str_cons_0x0015_0x02=xdpe12284c +# sensor temp21 max +hwmon_temp.mode_0x0015_0x03=str_constant +hwmon_temp.str_cons_0x0015_0x03=125000 +# sensor temp21 min +hwmon_temp.mode_0x0015_0x05=str_constant +hwmon_temp.str_cons_0x0015_0x05=-30000 + +# temp22 TMOS_CORE_TEMP_12 +hwmon_temp.mode_0x0016_0x00=config +hwmon_temp.int_cons_0x0016_0x00=0 +hwmon_temp.src_0x0016_0x00=file +hwmon_temp.frmt_0x0016_0x00=buf +hwmon_temp.fpath_0x0016_0x00=/sys/bus/i2c/devices/92-0060/hwmon/ +hwmon_temp.addr_0x0016_0x00=0 +hwmon_temp.len_0x0016_0x00=8 +hwmon_temp.bit_offset_0x0016_0x00= +hwmon_temp.str_cons_0x0016_0x00=temp1_input +# sensor temp22 alias +hwmon_temp.mode_0x0016_0x01=str_constant +hwmon_temp.str_cons_0x0016_0x01=TMOS_CORE_TEMP_12 +# sensor temp22 type +hwmon_temp.mode_0x0016_0x02=str_constant +hwmon_temp.str_cons_0x0016_0x02=xdpe12284c +# sensor temp22 max +hwmon_temp.mode_0x0016_0x03=str_constant +hwmon_temp.str_cons_0x0016_0x03=125000 +# sensor temp22 min +hwmon_temp.mode_0x0016_0x05=str_constant +hwmon_temp.str_cons_0x0016_0x05=-30000 + +# temp23 TMOS_CORE_TEMP_13 +hwmon_temp.mode_0x0017_0x00=config +hwmon_temp.int_cons_0x0017_0x00=0 +hwmon_temp.src_0x0017_0x00=file +hwmon_temp.frmt_0x0017_0x00=buf +hwmon_temp.fpath_0x0017_0x00=/sys/bus/i2c/devices/92-0062/hwmon/ +hwmon_temp.addr_0x0017_0x00=0 +hwmon_temp.len_0x0017_0x00=8 +hwmon_temp.bit_offset_0x0017_0x00= +hwmon_temp.str_cons_0x0017_0x00=temp1_input +# sensor temp23 alias +hwmon_temp.mode_0x0017_0x01=str_constant +hwmon_temp.str_cons_0x0017_0x01=TMOS_CORE_TEMP_13 +# sensor temp23 type +hwmon_temp.mode_0x0017_0x02=str_constant +hwmon_temp.str_cons_0x0017_0x02=xdpe12284c +# sensor temp23 max +hwmon_temp.mode_0x0017_0x03=str_constant +hwmon_temp.str_cons_0x0017_0x03=125000 +# sensor temp23 min +hwmon_temp.mode_0x0017_0x05=str_constant +hwmon_temp.str_cons_0x0017_0x05=-30000 + +# temp24 TMOS_CORE_TEMP_14 +hwmon_temp.mode_0x0018_0x00=config +hwmon_temp.int_cons_0x0018_0x00=0 +hwmon_temp.src_0x0018_0x00=file +hwmon_temp.frmt_0x0018_0x00=buf +hwmon_temp.fpath_0x0018_0x00=/sys/bus/i2c/devices/95-0060/hwmon/ +hwmon_temp.addr_0x0018_0x00=0 +hwmon_temp.len_0x0018_0x00=8 +hwmon_temp.bit_offset_0x0018_0x00= +hwmon_temp.str_cons_0x0018_0x00=temp1_input +# sensor temp24 alias +hwmon_temp.mode_0x0018_0x01=str_constant +hwmon_temp.str_cons_0x0018_0x01=TMOS_CORE_TEMP_14 +# sensor temp24 type +hwmon_temp.mode_0x0018_0x02=str_constant +hwmon_temp.str_cons_0x0018_0x02=xdpe12284c +# sensor temp24 max +hwmon_temp.mode_0x0018_0x03=str_constant +hwmon_temp.str_cons_0x0018_0x03=125000 +# sensor temp24 min +hwmon_temp.mode_0x0018_0x05=str_constant +hwmon_temp.str_cons_0x0018_0x05=-30000 + +# sensor vol +# value : 0 +# alias : 1 +# type : 2 +# max : 3 +# hyst : 4 +# min : 5 +# crit : 6 +# range : 7 +# nominal_value : 8 +# high : 9 +# low : 10 + +# vol1 +hwmon_in.mode_0x0001_0x00=config +hwmon_in.int_cons_0x0001_0x00=0 +hwmon_in.src_0x0001_0x00=file +hwmon_in.frmt_0x0001_0x00=buf +hwmon_in.fpath_0x0001_0x00=/sys/bus/i2c/devices/69-005b/hwmon/ +hwmon_in.addr_0x0001_0x00=0 +hwmon_in.len_0x0001_0x00=8 +hwmon_in.bit_offset_0x0001_0x00= +hwmon_in.str_cons_0x0001_0x00=in1_input +hwmon_in.mode_0x0001_0x01=str_constant +hwmon_in.str_cons_0x0001_0x01=VCC12V_Standby +hwmon_in.mode_0x0001_0x02=str_constant +hwmon_in.str_cons_0x0001_0x02=ucd90160 +hwmon_in.mode_0x0001_0x03=constant +hwmon_in.int_cons_0x0001_0x03=13200 +hwmon_in.mode_0x0001_0x05=constant +hwmon_in.int_cons_0x0001_0x05=10800 +hwmon_in.mode_0x0001_0x08=constant +hwmon_in.int_cons_0x0001_0x08=12000 + +# vol2 +hwmon_in.mode_0x0002_0x00=config +hwmon_in.int_cons_0x0002_0x00=0 +hwmon_in.src_0x0002_0x00=file +hwmon_in.frmt_0x0002_0x00=buf +hwmon_in.fpath_0x0002_0x00=/sys/bus/i2c/devices/69-005b/hwmon/ +hwmon_in.addr_0x0002_0x00=0 +hwmon_in.len_0x0002_0x00=8 +hwmon_in.bit_offset_0x0002_0x00= +hwmon_in.str_cons_0x0002_0x00=in2_input +hwmon_in.mode_0x0002_0x01=str_constant +hwmon_in.str_cons_0x0002_0x01=VDD12V +hwmon_in.mode_0x0002_0x02=str_constant +hwmon_in.str_cons_0x0002_0x02=ucd90160 +hwmon_in.mode_0x0002_0x03=constant +hwmon_in.int_cons_0x0002_0x03=13200 +hwmon_in.mode_0x0002_0x05=constant +hwmon_in.int_cons_0x0002_0x05=10800 +hwmon_in.mode_0x0002_0x08=constant +hwmon_in.int_cons_0x0002_0x08=12000 + +# vol3 +hwmon_in.mode_0x0003_0x00=config +hwmon_in.int_cons_0x0003_0x00=0 +hwmon_in.src_0x0003_0x00=file +hwmon_in.frmt_0x0003_0x00=buf +hwmon_in.fpath_0x0003_0x00=/sys/bus/i2c/devices/69-005b/hwmon/ +hwmon_in.addr_0x0003_0x00=0 +hwmon_in.len_0x0003_0x00=8 +hwmon_in.bit_offset_0x0003_0x00= +hwmon_in.str_cons_0x0003_0x00=in3_input +hwmon_in.mode_0x0003_0x01=str_constant +hwmon_in.str_cons_0x0003_0x01=VDD_CPU12V +hwmon_in.mode_0x0003_0x02=str_constant +hwmon_in.str_cons_0x0003_0x02=ucd90160 +hwmon_in.mode_0x0003_0x03=constant +hwmon_in.int_cons_0x0003_0x03=13200 +hwmon_in.mode_0x0003_0x05=constant +hwmon_in.int_cons_0x0003_0x05=10800 +hwmon_in.mode_0x0003_0x08=constant +hwmon_in.int_cons_0x0003_0x08=12000 + +# vol4 +hwmon_in.mode_0x0004_0x00=config +hwmon_in.int_cons_0x0004_0x00=0 +hwmon_in.src_0x0004_0x00=file +hwmon_in.frmt_0x0004_0x00=buf +hwmon_in.fpath_0x0004_0x00=/sys/bus/i2c/devices/69-005b/hwmon/ +hwmon_in.addr_0x0004_0x00=0 +hwmon_in.len_0x0004_0x00=8 +hwmon_in.bit_offset_0x0004_0x00= +hwmon_in.str_cons_0x0004_0x00=in4_input +hwmon_in.mode_0x0004_0x01=str_constant +hwmon_in.str_cons_0x0004_0x01=VDD5V_USB +hwmon_in.mode_0x0004_0x02=str_constant +hwmon_in.str_cons_0x0004_0x02=ucd90160 +hwmon_in.mode_0x0004_0x03=constant +hwmon_in.int_cons_0x0004_0x03=5500 +hwmon_in.mode_0x0004_0x05=constant +hwmon_in.int_cons_0x0004_0x05=4500 +hwmon_in.mode_0x0004_0x08=constant +hwmon_in.int_cons_0x0004_0x08=5000 + +# vol5 +hwmon_in.mode_0x0005_0x00=config +hwmon_in.int_cons_0x0005_0x00=0 +hwmon_in.src_0x0005_0x00=file +hwmon_in.frmt_0x0005_0x00=buf +hwmon_in.fpath_0x0005_0x00=/sys/bus/i2c/devices/69-005b/hwmon/ +hwmon_in.addr_0x0005_0x00=0 +hwmon_in.len_0x0005_0x00=8 +hwmon_in.bit_offset_0x0005_0x00= +hwmon_in.str_cons_0x0005_0x00=in5_input +hwmon_in.mode_0x0005_0x01=str_constant +hwmon_in.str_cons_0x0005_0x01=USB5V +hwmon_in.mode_0x0005_0x02=str_constant +hwmon_in.str_cons_0x0005_0x02=ucd90160 +hwmon_in.mode_0x0005_0x03=constant +hwmon_in.int_cons_0x0005_0x03=5500 +hwmon_in.mode_0x0005_0x05=constant +hwmon_in.int_cons_0x0005_0x05=4500 +hwmon_in.mode_0x0005_0x08=constant +hwmon_in.int_cons_0x0005_0x08=5000 + +# vol6 PHY_VDD1V8 +monitor_flag_hwmon_in.mode_0x0006_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0006_0x00=0 +hwmon_in.mode_0x0006_0x00=config +hwmon_in.int_cons_0x0006_0x00=0 +hwmon_in.src_0x0006_0x00=file +hwmon_in.frmt_0x0006_0x00=buf +hwmon_in.fpath_0x0006_0x00=/sys/bus/i2c/devices/69-005b/hwmon/ +hwmon_in.addr_0x0006_0x00=0 +hwmon_in.len_0x0006_0x00=8 +hwmon_in.bit_offset_0x0006_0x00= +hwmon_in.str_cons_0x0006_0x00=in6_input +hwmon_in.mode_0x0006_0x01=str_constant +hwmon_in.str_cons_0x0006_0x01=VDD3V3_STBY +hwmon_in.mode_0x0006_0x02=str_constant +hwmon_in.str_cons_0x0006_0x02=ucd90160 +hwmon_in.mode_0x0006_0x03=constant +hwmon_in.int_cons_0x0006_0x03=3630 +hwmon_in.mode_0x0006_0x05=constant +hwmon_in.int_cons_0x0006_0x05=2970 +hwmon_in.mode_0x0006_0x08=constant +hwmon_in.int_cons_0x0006_0x08=3300 + +# vol7 +hwmon_in.mode_0x0007_0x00=config +hwmon_in.int_cons_0x0007_0x00=0 +hwmon_in.src_0x0007_0x00=file +hwmon_in.frmt_0x0007_0x00=buf +hwmon_in.fpath_0x0007_0x00=/sys/bus/i2c/devices/69-005b/hwmon/ +hwmon_in.addr_0x0007_0x00=0 +hwmon_in.len_0x0007_0x00=8 +hwmon_in.bit_offset_0x0007_0x00= +hwmon_in.str_cons_0x0007_0x00=in7_input +hwmon_in.mode_0x0007_0x01=str_constant +hwmon_in.str_cons_0x0007_0x01=BMC_VCC3.3V_OUT +hwmon_in.mode_0x0007_0x02=str_constant +hwmon_in.str_cons_0x0007_0x02=ucd90160 +hwmon_in.mode_0x0007_0x03=constant +hwmon_in.int_cons_0x0007_0x03=3630 +hwmon_in.mode_0x0007_0x05=constant +hwmon_in.int_cons_0x0007_0x05=2970 +hwmon_in.mode_0x0007_0x08=constant +hwmon_in.int_cons_0x0007_0x08=3300 + +# vol8 +hwmon_in.mode_0x0008_0x00=config +hwmon_in.int_cons_0x0008_0x00=0 +hwmon_in.src_0x0008_0x00=file +hwmon_in.frmt_0x0008_0x00=buf +hwmon_in.fpath_0x0008_0x00=/sys/bus/i2c/devices/69-005b/hwmon/ +hwmon_in.addr_0x0008_0x00=0 +hwmon_in.len_0x0008_0x00=8 +hwmon_in.bit_offset_0x0008_0x00= +hwmon_in.str_cons_0x0008_0x00=in8_input +hwmon_in.mode_0x0008_0x01=str_constant +hwmon_in.str_cons_0x0008_0x01=VDD3.3V_PWRCYCLE +hwmon_in.mode_0x0008_0x02=str_constant +hwmon_in.str_cons_0x0008_0x02=ucd90160 +hwmon_in.mode_0x0008_0x03=constant +hwmon_in.int_cons_0x0008_0x03=3630 +hwmon_in.mode_0x0008_0x05=constant +hwmon_in.int_cons_0x0008_0x05=2970 +hwmon_in.mode_0x0008_0x08=constant +hwmon_in.int_cons_0x0008_0x08=3300 + +# vol9 +hwmon_in.mode_0x0009_0x00=config +hwmon_in.int_cons_0x0009_0x00=0 +hwmon_in.src_0x0009_0x00=file +hwmon_in.frmt_0x0009_0x00=buf +hwmon_in.fpath_0x0009_0x00=/sys/bus/i2c/devices/69-005b/hwmon/ +hwmon_in.addr_0x0009_0x00=0 +hwmon_in.len_0x0009_0x00=8 +hwmon_in.bit_offset_0x0009_0x00= +hwmon_in.str_cons_0x0009_0x00=in9_input +hwmon_in.mode_0x0009_0x01=str_constant +hwmon_in.str_cons_0x0009_0x01=VDD3.3V +hwmon_in.mode_0x0009_0x02=str_constant +hwmon_in.str_cons_0x0009_0x02=ucd90160 +hwmon_in.mode_0x0009_0x03=constant +hwmon_in.int_cons_0x0009_0x03=3630 +hwmon_in.mode_0x0009_0x05=constant +hwmon_in.int_cons_0x0009_0x05=2970 +hwmon_in.mode_0x0009_0x08=constant +hwmon_in.int_cons_0x0009_0x08=3300 + +# vol10 +monitor_flag_hwmon_in.mode_0x000a_0x00=constant +monitor_flag_hwmon_in.int_cons_0x000a_0x00=0 +hwmon_in.mode_0x000a_0x00=config +hwmon_in.int_cons_0x000a_0x00=0 +hwmon_in.src_0x000a_0x00=file +hwmon_in.frmt_0x000a_0x00=buf +hwmon_in.fpath_0x000a_0x00=/sys/bus/i2c/devices/69-005b/hwmon/ +hwmon_in.addr_0x000a_0x00=0 +hwmon_in.len_0x000a_0x00=8 +hwmon_in.bit_offset_0x000a_0x00= +hwmon_in.str_cons_0x000a_0x00=in10_input +hwmon_in.mode_0x000a_0x01=str_constant +hwmon_in.str_cons_0x000a_0x01=VDD3.3_CLK +hwmon_in.mode_0x000a_0x02=str_constant +hwmon_in.str_cons_0x000a_0x02=ucd90160 +hwmon_in.mode_0x000a_0x03=constant +hwmon_in.int_cons_0x000a_0x03=3630 +hwmon_in.mode_0x000a_0x05=constant +hwmon_in.int_cons_0x000a_0x05=2970 +hwmon_in.mode_0x000a_0x08=constant +hwmon_in.int_cons_0x000a_0x08=3300 + +# vol11 +hwmon_in.mode_0x000b_0x00=config +hwmon_in.int_cons_0x000b_0x00=0 +hwmon_in.src_0x000b_0x00=file +hwmon_in.frmt_0x000b_0x00=buf +hwmon_in.fpath_0x000b_0x00=/sys/bus/i2c/devices/69-005b/hwmon/ +hwmon_in.addr_0x000b_0x00=0 +hwmon_in.len_0x000b_0x00=8 +hwmon_in.bit_offset_0x000b_0x00= +hwmon_in.str_cons_0x000b_0x00=in11_input +hwmon_in.mode_0x000b_0x01=str_constant +hwmon_in.str_cons_0x000b_0x01=SSD_VDD3.3V +hwmon_in.mode_0x000b_0x02=str_constant +hwmon_in.str_cons_0x000b_0x02=ucd90160 +hwmon_in.mode_0x000b_0x03=constant +hwmon_in.int_cons_0x000b_0x03=3630 +hwmon_in.mode_0x000b_0x05=constant +hwmon_in.int_cons_0x000b_0x05=2970 +hwmon_in.mode_0x000b_0x08=constant +hwmon_in.int_cons_0x000b_0x08=3300 + +# vol12 VDD1.8V +monitor_flag_hwmon_in.mode_0x000c_0x00=constant +monitor_flag_hwmon_in.int_cons_0x000c_0x00=0 +hwmon_in.mode_0x000c_0x00=config +hwmon_in.int_cons_0x000c_0x00=0 +hwmon_in.src_0x000c_0x00=file +hwmon_in.frmt_0x000c_0x00=buf +hwmon_in.fpath_0x000c_0x00=/sys/bus/i2c/devices/69-005b/hwmon/ +hwmon_in.addr_0x000c_0x00=0 +hwmon_in.len_0x000c_0x00=8 +hwmon_in.bit_offset_0x000c_0x00= +hwmon_in.str_cons_0x000c_0x00=in12_input +hwmon_in.mode_0x000c_0x01=str_constant +hwmon_in.str_cons_0x000c_0x01=SSD2_VDD3.3V +hwmon_in.mode_0x000c_0x02=str_constant +hwmon_in.str_cons_0x000c_0x02=ucd90160 +hwmon_in.mode_0x000c_0x03=constant +hwmon_in.int_cons_0x000c_0x03=3630 +hwmon_in.mode_0x000c_0x05=constant +hwmon_in.int_cons_0x000c_0x05=2970 +hwmon_in.mode_0x000c_0x08=constant +hwmon_in.int_cons_0x000c_0x08=3300 + +# vol13 +hwmon_in.mode_0x000d_0x00=config +hwmon_in.int_cons_0x000d_0x00=0 +hwmon_in.src_0x000d_0x00=file +hwmon_in.frmt_0x000d_0x00=buf +hwmon_in.fpath_0x000d_0x00=/sys/bus/i2c/devices/69-005b/hwmon/ +hwmon_in.addr_0x000d_0x00=0 +hwmon_in.len_0x000d_0x00=8 +hwmon_in.bit_offset_0x000d_0x00= +hwmon_in.str_cons_0x000d_0x00=in13_input +hwmon_in.mode_0x000d_0x01=str_constant +hwmon_in.str_cons_0x000d_0x01=PHY_VDD1V8 +hwmon_in.mode_0x000d_0x02=str_constant +hwmon_in.str_cons_0x000d_0x02=ucd90160 +hwmon_in.mode_0x000d_0x03=constant +hwmon_in.int_cons_0x000d_0x03=1980 +hwmon_in.mode_0x000d_0x05=constant +hwmon_in.int_cons_0x000d_0x05=1620 +hwmon_in.mode_0x000d_0x08=constant +hwmon_in.int_cons_0x000d_0x08=1800 + +# vol14 +hwmon_in.mode_0x000e_0x00=config +hwmon_in.int_cons_0x000e_0x00=0 +hwmon_in.src_0x000e_0x00=file +hwmon_in.frmt_0x000e_0x00=buf +hwmon_in.fpath_0x000e_0x00=/sys/bus/i2c/devices/69-005b/hwmon/ +hwmon_in.addr_0x000e_0x00=0 +hwmon_in.len_0x000e_0x00=8 +hwmon_in.bit_offset_0x000e_0x00= +hwmon_in.str_cons_0x000e_0x00=in14_input +hwmon_in.mode_0x000e_0x01=str_constant +hwmon_in.str_cons_0x000e_0x01=PHY_VDD1V0 +hwmon_in.mode_0x000e_0x02=str_constant +hwmon_in.str_cons_0x000e_0x02=ucd90160 +hwmon_in.mode_0x000e_0x03=constant +hwmon_in.int_cons_0x000e_0x03=1100 +hwmon_in.mode_0x000e_0x05=constant +hwmon_in.int_cons_0x000e_0x05=900 +hwmon_in.mode_0x000e_0x08=constant +hwmon_in.int_cons_0x000e_0x08=1000 + +# vol15 +hwmon_in.mode_0x000f_0x00=config +hwmon_in.int_cons_0x000f_0x00=0 +hwmon_in.src_0x000f_0x00=file +hwmon_in.frmt_0x000f_0x00=buf +hwmon_in.fpath_0x000f_0x00=/sys/bus/i2c/devices/69-005b/hwmon/ +hwmon_in.addr_0x000f_0x00=0 +hwmon_in.len_0x000f_0x00=8 +hwmon_in.bit_offset_0x000f_0x00= +hwmon_in.str_cons_0x000f_0x00=in15_input +hwmon_in.mode_0x000f_0x01=str_constant +hwmon_in.str_cons_0x000f_0x01=VDD1.1V_HUB +hwmon_in.mode_0x000f_0x02=str_constant +hwmon_in.str_cons_0x000f_0x02=ucd90160 +hwmon_in.mode_0x000f_0x03=constant +hwmon_in.int_cons_0x000f_0x03=1210 +hwmon_in.mode_0x000f_0x05=constant +hwmon_in.int_cons_0x000f_0x05=990 +hwmon_in.mode_0x000f_0x08=constant +hwmon_in.int_cons_0x000f_0x08=1100 + +# vol16 +hwmon_in.mode_0x0010_0x00=config +hwmon_in.int_cons_0x0010_0x00=0 +hwmon_in.src_0x0010_0x00=file +hwmon_in.frmt_0x0010_0x00=buf +hwmon_in.fpath_0x0010_0x00=/sys/bus/i2c/devices/83-005b/hwmon/ +hwmon_in.addr_0x0010_0x00=0 +hwmon_in.len_0x0010_0x00=8 +hwmon_in.bit_offset_0x0010_0x00= +hwmon_in.str_cons_0x0010_0x00=in1_input +hwmon_in.mode_0x0010_0x01=str_constant +hwmon_in.str_cons_0x0010_0x01=VDD12V_MAC1 +hwmon_in.mode_0x0010_0x02=str_constant +hwmon_in.str_cons_0x0010_0x02=ucd90160 +hwmon_in.mode_0x0010_0x03=constant +hwmon_in.int_cons_0x0010_0x03=13200 +hwmon_in.mode_0x0010_0x05=constant +hwmon_in.int_cons_0x0010_0x05=10800 +hwmon_in.mode_0x0010_0x08=constant +hwmon_in.int_cons_0x0010_0x08=12000 + +# vol17 +hwmon_in.mode_0x0011_0x00=config +hwmon_in.int_cons_0x0011_0x00=0 +hwmon_in.src_0x0011_0x00=file +hwmon_in.frmt_0x0011_0x00=buf +hwmon_in.fpath_0x0011_0x00=/sys/bus/i2c/devices/83-005b/hwmon/ +hwmon_in.addr_0x0011_0x00=0 +hwmon_in.len_0x0011_0x00=8 +hwmon_in.bit_offset_0x0011_0x00= +hwmon_in.str_cons_0x0011_0x00=in2_input +hwmon_in.mode_0x0011_0x01=str_constant +hwmon_in.str_cons_0x0011_0x01=VDD1.8_CLK +hwmon_in.mode_0x0011_0x02=str_constant +hwmon_in.str_cons_0x0011_0x02=ucd90160 +hwmon_in.mode_0x0011_0x03=constant +hwmon_in.int_cons_0x0011_0x03=1980 +hwmon_in.mode_0x0011_0x05=constant +hwmon_in.int_cons_0x0011_0x05=1620 +hwmon_in.mode_0x0011_0x08=constant +hwmon_in.int_cons_0x0011_0x08=1800 + +# vol18 +hwmon_in.mode_0x0012_0x00=config +hwmon_in.int_cons_0x0012_0x00=0 +hwmon_in.src_0x0012_0x00=file +hwmon_in.frmt_0x0012_0x00=buf +hwmon_in.fpath_0x0012_0x00=/sys/bus/i2c/devices/83-005b/hwmon/ +hwmon_in.addr_0x0012_0x00=0 +hwmon_in.len_0x0012_0x00=8 +hwmon_in.bit_offset_0x0012_0x00= +hwmon_in.str_cons_0x0012_0x00=in3_input +hwmon_in.mode_0x0012_0x01=str_constant +hwmon_in.str_cons_0x0012_0x01=VDD3.3_CLK_MAC +hwmon_in.mode_0x0012_0x02=str_constant +hwmon_in.str_cons_0x0012_0x02=ucd90160 +hwmon_in.mode_0x0012_0x03=constant +hwmon_in.int_cons_0x0012_0x03=3630 +hwmon_in.mode_0x0012_0x05=constant +hwmon_in.int_cons_0x0012_0x05=2970 +hwmon_in.mode_0x0012_0x08=constant +hwmon_in.int_cons_0x0012_0x08=3300 + +# vol19 +hwmon_in.mode_0x0013_0x00=config +hwmon_in.int_cons_0x0013_0x00=0 +hwmon_in.src_0x0013_0x00=file +hwmon_in.frmt_0x0013_0x00=buf +hwmon_in.fpath_0x0013_0x00=/sys/bus/i2c/devices/83-005b/hwmon/ +hwmon_in.addr_0x0013_0x00=0 +hwmon_in.len_0x0013_0x00=8 +hwmon_in.bit_offset_0x0013_0x00= +hwmon_in.str_cons_0x0013_0x00=in4_input +hwmon_in.mode_0x0013_0x01=str_constant +hwmon_in.str_cons_0x0013_0x01=VDD1.0V_FPGA +hwmon_in.mode_0x0013_0x02=str_constant +hwmon_in.str_cons_0x0013_0x02=ucd90160 +hwmon_in.mode_0x0013_0x03=constant +hwmon_in.int_cons_0x0013_0x03=1100 +hwmon_in.mode_0x0013_0x05=constant +hwmon_in.int_cons_0x0013_0x05=900 +hwmon_in.mode_0x0013_0x08=constant +hwmon_in.int_cons_0x0013_0x08=1000 + +# vol20 +hwmon_in.mode_0x0014_0x00=config +hwmon_in.int_cons_0x0014_0x00=0 +hwmon_in.src_0x0014_0x00=file +hwmon_in.frmt_0x0014_0x00=buf +hwmon_in.fpath_0x0014_0x00=/sys/bus/i2c/devices/83-005b/hwmon/ +hwmon_in.addr_0x0014_0x00=0 +hwmon_in.len_0x0014_0x00=8 +hwmon_in.bit_offset_0x0014_0x00= +hwmon_in.str_cons_0x0014_0x00=in5_input +hwmon_in.mode_0x0014_0x01=str_constant +hwmon_in.str_cons_0x0014_0x01=VDD1.8V_FPGA +hwmon_in.mode_0x0014_0x02=str_constant +hwmon_in.str_cons_0x0014_0x02=ucd90160 +hwmon_in.mode_0x0014_0x03=constant +hwmon_in.int_cons_0x0014_0x03=1980 +hwmon_in.mode_0x0014_0x05=constant +hwmon_in.int_cons_0x0014_0x05=1620 +hwmon_in.mode_0x0014_0x08=constant +hwmon_in.int_cons_0x0014_0x08=1800 + +# vol21 +monitor_flag_hwmon_in.mode_0x0015_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0015_0x00=0 +hwmon_in.mode_0x0015_0x00=config +hwmon_in.int_cons_0x0015_0x00=0 +hwmon_in.src_0x0015_0x00=file +hwmon_in.frmt_0x0015_0x00=buf +hwmon_in.fpath_0x0015_0x00=/sys/bus/i2c/devices/83-005b/hwmon/ +hwmon_in.addr_0x0015_0x00=0 +hwmon_in.len_0x0015_0x00=8 +hwmon_in.bit_offset_0x0015_0x00= +hwmon_in.str_cons_0x0015_0x00=in6_input +hwmon_in.mode_0x0015_0x01=str_constant +hwmon_in.str_cons_0x0015_0x01=VDD1.2V_FPGA +hwmon_in.mode_0x0015_0x02=str_constant +hwmon_in.str_cons_0x0015_0x02=ucd90160 +hwmon_in.mode_0x0015_0x03=constant +hwmon_in.int_cons_0x0015_0x03=1320 +hwmon_in.mode_0x0015_0x05=constant +hwmon_in.int_cons_0x0015_0x05=1080 +hwmon_in.mode_0x0015_0x08=constant +hwmon_in.int_cons_0x0015_0x08=1200 + +# vol22 +monitor_flag_hwmon_in.mode_0x0016_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0016_0x00=0 +hwmon_in.mode_0x0016_0x00=config +hwmon_in.int_cons_0x0016_0x00=0 +hwmon_in.src_0x0016_0x00=file +hwmon_in.frmt_0x0016_0x00=buf +hwmon_in.fpath_0x0016_0x00=/sys/bus/i2c/devices/83-005b/hwmon/ +hwmon_in.addr_0x0016_0x00=0 +hwmon_in.len_0x0016_0x00=8 +hwmon_in.bit_offset_0x0016_0x00= +hwmon_in.str_cons_0x0016_0x00=in7_input +hwmon_in.mode_0x0016_0x01=str_constant +hwmon_in.str_cons_0x0016_0x01=VDD3.3V +hwmon_in.mode_0x0016_0x02=str_constant +hwmon_in.str_cons_0x0016_0x02=ucd90160 +hwmon_in.mode_0x0016_0x03=constant +hwmon_in.int_cons_0x0016_0x03=3630 +hwmon_in.mode_0x0016_0x05=constant +hwmon_in.int_cons_0x0016_0x05=2970 +hwmon_in.mode_0x0016_0x08=constant +hwmon_in.int_cons_0x0016_0x08=3300 + +# vol23 +hwmon_in.mode_0x0017_0x00=config +hwmon_in.int_cons_0x0017_0x00=0 +hwmon_in.src_0x0017_0x00=file +hwmon_in.frmt_0x0017_0x00=buf +hwmon_in.fpath_0x0017_0x00=/sys/bus/i2c/devices/83-005b/hwmon/ +hwmon_in.addr_0x0017_0x00=0 +hwmon_in.len_0x0017_0x00=8 +hwmon_in.bit_offset_0x0017_0x00= +hwmon_in.str_cons_0x0017_0x00=in8_input +hwmon_in.mode_0x0017_0x01=str_constant +hwmon_in.str_cons_0x0017_0x01=VDD3.3V_standby +hwmon_in.mode_0x0017_0x02=str_constant +hwmon_in.str_cons_0x0017_0x02=ucd90160 +hwmon_in.mode_0x0017_0x03=constant +hwmon_in.int_cons_0x0017_0x03=3630 +hwmon_in.mode_0x0017_0x05=constant +hwmon_in.int_cons_0x0017_0x05=2970 +hwmon_in.mode_0x0017_0x08=constant +hwmon_in.int_cons_0x0017_0x08=3300 + +# vol24 +hwmon_in.mode_0x0018_0x00=config +hwmon_in.int_cons_0x0018_0x00=0 +hwmon_in.src_0x0018_0x00=file +hwmon_in.frmt_0x0018_0x00=buf +hwmon_in.fpath_0x0018_0x00=/sys/bus/i2c/devices/83-005b/hwmon/ +hwmon_in.addr_0x0018_0x00=0 +hwmon_in.len_0x0018_0x00=8 +hwmon_in.bit_offset_0x0018_0x00=0 +hwmon_in.str_cons_0x0018_0x00=in9_input +hwmon_in.mode_0x0018_0x01=str_constant +hwmon_in.str_cons_0x0018_0x01=VDD3.3V_FPGA +hwmon_in.mode_0x0018_0x02=str_constant +hwmon_in.str_cons_0x0018_0x02=ucd90160 +hwmon_in.mode_0x0018_0x03=constant +hwmon_in.int_cons_0x0018_0x03=3630 +hwmon_in.mode_0x0018_0x05=constant +hwmon_in.int_cons_0x0018_0x05=2970 +hwmon_in.mode_0x0018_0x08=constant +hwmon_in.int_cons_0x0018_0x08=3300 + +# vol25 +hwmon_in.mode_0x0019_0x00=config +hwmon_in.int_cons_0x0019_0x00=0 +hwmon_in.src_0x0019_0x00=file +hwmon_in.frmt_0x0019_0x00=buf +hwmon_in.fpath_0x0019_0x00=/sys/bus/i2c/devices/83-005b/hwmon/ +hwmon_in.addr_0x0019_0x00=0 +hwmon_in.len_0x0019_0x00=8 +hwmon_in.bit_offset_0x0019_0x00=0 +hwmon_in.str_cons_0x0019_0x00=in11_input +hwmon_in.mode_0x0019_0x01=str_constant +hwmon_in.str_cons_0x0019_0x01=VDD3.3V_PHY +hwmon_in.mode_0x0019_0x02=str_constant +hwmon_in.str_cons_0x0019_0x02=ucd90160 +hwmon_in.mode_0x0019_0x03=constant +hwmon_in.int_cons_0x0019_0x03=3630 +hwmon_in.mode_0x0019_0x05=constant +hwmon_in.int_cons_0x0019_0x05=2970 +hwmon_in.mode_0x0019_0x08=constant +hwmon_in.int_cons_0x0019_0x08=3300 + +# vol26 +hwmon_in.mode_0x001a_0x00=config +hwmon_in.int_cons_0x001a_0x00=0 +hwmon_in.src_0x001a_0x00=file +hwmon_in.frmt_0x001a_0x00=buf +hwmon_in.fpath_0x001a_0x00=/sys/bus/i2c/devices/83-005b/hwmon/ +hwmon_in.addr_0x001a_0x00=0 +hwmon_in.len_0x001a_0x00=8 +hwmon_in.bit_offset_0x001a_0x00= +hwmon_in.str_cons_0x001a_0x00=in12_input +hwmon_in.mode_0x001a_0x01=str_constant +hwmon_in.str_cons_0x001a_0x01=VDD3V8_CLK +hwmon_in.mode_0x001a_0x02=str_constant +hwmon_in.str_cons_0x001a_0x02=ucd90160 +hwmon_in.mode_0x001a_0x03=constant +hwmon_in.int_cons_0x001a_0x03=4180 +hwmon_in.mode_0x001a_0x05=constant +hwmon_in.int_cons_0x001a_0x05=3420 +hwmon_in.mode_0x001a_0x08=constant +hwmon_in.int_cons_0x001a_0x08=3800 + +# vol27 +hwmon_in.mode_0x001b_0x00=config +hwmon_in.int_cons_0x001b_0x00=0 +hwmon_in.src_0x001b_0x00=file +hwmon_in.frmt_0x001b_0x00=buf +hwmon_in.fpath_0x001b_0x00=/sys/bus/i2c/devices/83-005b/hwmon/ +hwmon_in.addr_0x001b_0x00=0 +hwmon_in.len_0x001b_0x00=8 +hwmon_in.bit_offset_0x001b_0x00= +hwmon_in.str_cons_0x001b_0x00=in13_input +hwmon_in.mode_0x001b_0x01=str_constant +hwmon_in.str_cons_0x001b_0x01=VDD5V_VR_0 +hwmon_in.mode_0x001b_0x02=str_constant +hwmon_in.str_cons_0x001b_0x02=ucd90160 +hwmon_in.mode_0x001b_0x03=constant +hwmon_in.int_cons_0x001b_0x03=5500 +hwmon_in.mode_0x001b_0x05=constant +hwmon_in.int_cons_0x001b_0x05=4500 +hwmon_in.mode_0x001b_0x08=constant +hwmon_in.int_cons_0x001b_0x08=5000 + +# vol28 +monitor_flag_hwmon_in.mode_0x001c_0x00=constant +monitor_flag_hwmon_in.int_cons_0x001c_0x00=0 +hwmon_in.mode_0x001c_0x00=config +hwmon_in.int_cons_0x001c_0x00=0 +hwmon_in.src_0x001c_0x00=file +hwmon_in.frmt_0x001c_0x00=buf +hwmon_in.fpath_0x001c_0x00=/sys/bus/i2c/devices/83-005b/hwmon/ +hwmon_in.addr_0x001c_0x00=0 +hwmon_in.len_0x001c_0x00=8 +hwmon_in.bit_offset_0x001c_0x00= +hwmon_in.str_cons_0x001c_0x00=in14_input +hwmon_in.mode_0x001c_0x01=str_constant +hwmon_in.str_cons_0x001c_0x01=VDD5V_VR_1 +hwmon_in.mode_0x001c_0x02=str_constant +hwmon_in.str_cons_0x001c_0x02=ucd90160 +hwmon_in.mode_0x001c_0x03=constant +hwmon_in.int_cons_0x001c_0x03=5500 +hwmon_in.mode_0x001c_0x05=constant +hwmon_in.int_cons_0x001c_0x05=4500 +hwmon_in.mode_0x001c_0x08=constant +hwmon_in.int_cons_0x001c_0x08=5000 + +# vol29 +hwmon_in.mode_0x001d_0x00=config +hwmon_in.int_cons_0x001d_0x00=0 +hwmon_in.src_0x001d_0x00=file +hwmon_in.frmt_0x001d_0x00=buf +hwmon_in.fpath_0x001d_0x00=/sys/bus/i2c/devices/83-005b/hwmon/ +hwmon_in.addr_0x001d_0x00=0 +hwmon_in.len_0x001d_0x00=8 +hwmon_in.bit_offset_0x001d_0x00= +hwmon_in.str_cons_0x001d_0x00=in15_input +hwmon_in.mode_0x001d_0x01=str_constant +hwmon_in.str_cons_0x001d_0x01=VDD5V_VR_2 +hwmon_in.mode_0x001d_0x02=str_constant +hwmon_in.str_cons_0x001d_0x02=ucd90160 +hwmon_in.mode_0x001d_0x03=constant +hwmon_in.int_cons_0x001d_0x03=5500 +hwmon_in.mode_0x001d_0x05=constant +hwmon_in.int_cons_0x001d_0x05=4500 +hwmon_in.mode_0x001d_0x08=constant +hwmon_in.int_cons_0x001d_0x08=5000 + +# vol30 +hwmon_in.mode_0x001e_0x00=config +hwmon_in.int_cons_0x001e_0x00=0 +hwmon_in.src_0x001e_0x00=file +hwmon_in.frmt_0x001e_0x00=buf +hwmon_in.fpath_0x001e_0x00=/sys/bus/i2c/devices/84-005b/hwmon/ +hwmon_in.addr_0x001e_0x00=0 +hwmon_in.len_0x001e_0x00=8 +hwmon_in.bit_offset_0x001e_0x00= +hwmon_in.str_cons_0x001e_0x00=in1_input +hwmon_in.mode_0x001e_0x01=str_constant +hwmon_in.str_cons_0x001e_0x01=VDD12V_MAC2 +hwmon_in.mode_0x001e_0x02=str_constant +hwmon_in.str_cons_0x001e_0x02=ucd90160 +hwmon_in.mode_0x001e_0x03=constant +hwmon_in.int_cons_0x001e_0x03=13200 +hwmon_in.mode_0x001e_0x05=constant +hwmon_in.int_cons_0x001e_0x05=10800 +hwmon_in.mode_0x001e_0x08=constant +hwmon_in.int_cons_0x001e_0x08=12000 + +# vol31 +hwmon_in.mode_0x001f_0x00=config +hwmon_in.int_cons_0x001f_0x00=0 +hwmon_in.src_0x001f_0x00=file +hwmon_in.frmt_0x001f_0x00=buf +hwmon_in.fpath_0x001f_0x00=/sys/bus/i2c/devices/84-005b/hwmon/ +hwmon_in.addr_0x001f_0x00=0 +hwmon_in.len_0x001f_0x00=8 +hwmon_in.bit_offset_0x001f_0x00=0 +hwmon_in.str_cons_0x001f_0x00=in2_input +hwmon_in.mode_0x001f_0x01=str_constant +hwmon_in.str_cons_0x001f_0x01=VDDO1.8V +hwmon_in.mode_0x001f_0x02=str_constant +hwmon_in.str_cons_0x001f_0x02=ucd90160 +hwmon_in.mode_0x001f_0x03=constant +hwmon_in.int_cons_0x001f_0x03=1980 +hwmon_in.mode_0x001f_0x05=constant +hwmon_in.int_cons_0x001f_0x05=1620 +hwmon_in.mode_0x001f_0x08=constant +hwmon_in.int_cons_0x001f_0x08=1800 + +# vol32 +hwmon_in.mode_0x0020_0x00=config +hwmon_in.int_cons_0x0020_0x00=0 +hwmon_in.src_0x0020_0x00=file +hwmon_in.frmt_0x0020_0x00=buf +hwmon_in.fpath_0x0020_0x00=/sys/bus/i2c/devices/84-005b/hwmon/ +hwmon_in.addr_0x0020_0x00=0 +hwmon_in.len_0x0020_0x00=8 +hwmon_in.bit_offset_0x0020_0x00=0 +hwmon_in.str_cons_0x0020_0x00=in3_input +hwmon_in.mode_0x0020_0x01=str_constant +hwmon_in.str_cons_0x0020_0x01=VDD1.5V +hwmon_in.mode_0x0020_0x02=str_constant +hwmon_in.str_cons_0x0020_0x02=ucd90160 +hwmon_in.mode_0x0020_0x03=constant +hwmon_in.int_cons_0x0020_0x03=1650 +hwmon_in.mode_0x0020_0x05=constant +hwmon_in.int_cons_0x0020_0x05=1350 +hwmon_in.mode_0x0020_0x08=constant +hwmon_in.int_cons_0x0020_0x08=1500 + +# vol33 +hwmon_in.mode_0x0021_0x00=config +hwmon_in.int_cons_0x0021_0x00=0 +hwmon_in.src_0x0021_0x00=file +hwmon_in.frmt_0x0021_0x00=buf +hwmon_in.fpath_0x0021_0x00=/sys/bus/i2c/devices/84-005b/hwmon/ +hwmon_in.addr_0x0021_0x00=0 +hwmon_in.len_0x0021_0x00=8 +hwmon_in.bit_offset_0x0021_0x00=0 +hwmon_in.str_cons_0x0021_0x00=in4_input +hwmon_in.mode_0x0021_0x01=str_constant +hwmon_in.str_cons_0x0021_0x01=VDDP1.5V +hwmon_in.mode_0x0021_0x02=str_constant +hwmon_in.str_cons_0x0021_0x02=ucd90160 +hwmon_in.mode_0x0021_0x03=constant +hwmon_in.int_cons_0x0021_0x03=1650 +hwmon_in.mode_0x0021_0x05=constant +hwmon_in.int_cons_0x0021_0x05=1350 +hwmon_in.mode_0x0021_0x08=constant +hwmon_in.int_cons_0x0021_0x08=1500 + +# vol34 +monitor_flag_hwmon_in.mode_0x0022_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0022_0x00=0 +hwmon_in.mode_0x0022_0x00=config +hwmon_in.int_cons_0x0022_0x00=0 +hwmon_in.src_0x0022_0x00=file +hwmon_in.frmt_0x0022_0x00=buf +hwmon_in.fpath_0x0022_0x00=/sys/bus/i2c/devices/84-005b/hwmon/ +hwmon_in.addr_0x0022_0x00=0 +hwmon_in.len_0x0022_0x00=8 +hwmon_in.bit_offset_0x0022_0x00=0 +hwmon_in.str_cons_0x0022_0x00=in5_input +hwmon_in.mode_0x0022_0x01=str_constant +hwmon_in.str_cons_0x0022_0x01=VDD1.45V_1 +hwmon_in.mode_0x0022_0x02=str_constant +hwmon_in.str_cons_0x0022_0x02=ucd90160 +hwmon_in.mode_0x0022_0x03=constant +hwmon_in.int_cons_0x0022_0x03=1650 +hwmon_in.mode_0x0022_0x05=constant +hwmon_in.int_cons_0x0022_0x05=1350 +hwmon_in.mode_0x0022_0x08=constant +hwmon_in.int_cons_0x0022_0x08=1500 + +# vol35 +monitor_flag_hwmon_in.mode_0x0023_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0023_0x00=0 +hwmon_in.mode_0x0023_0x00=config +hwmon_in.int_cons_0x0023_0x00=0 +hwmon_in.src_0x0023_0x00=file +hwmon_in.frmt_0x0023_0x00=buf +hwmon_in.fpath_0x0023_0x00=/sys/bus/i2c/devices/84-005b/hwmon/ +hwmon_in.addr_0x0023_0x00=0 +hwmon_in.len_0x0023_0x00=8 +hwmon_in.bit_offset_0x0023_0x00=0 +hwmon_in.str_cons_0x0023_0x00=in6_input +hwmon_in.mode_0x0023_0x01=str_constant +hwmon_in.str_cons_0x0023_0x01=VDD_0P9_ANA_0 +hwmon_in.mode_0x0023_0x02=str_constant +hwmon_in.str_cons_0x0023_0x02=ucd90160 +hwmon_in.mode_0x0023_0x03=constant +hwmon_in.int_cons_0x0023_0x03=927 +hwmon_in.mode_0x0023_0x05=constant +hwmon_in.int_cons_0x0023_0x05=873 +hwmon_in.mode_0x0023_0x08=constant +hwmon_in.int_cons_0x0023_0x08=900 + +# vol36 +monitor_flag_hwmon_in.mode_0x0024_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0024_0x00=0 +hwmon_in.mode_0x0024_0x00=config +hwmon_in.int_cons_0x0024_0x00=0 +hwmon_in.src_0x0024_0x00=file +hwmon_in.frmt_0x0024_0x00=buf +hwmon_in.fpath_0x0024_0x00=/sys/bus/i2c/devices/84-005b/hwmon/ +hwmon_in.addr_0x0024_0x00=0 +hwmon_in.len_0x0024_0x00=8 +hwmon_in.bit_offset_0x0024_0x00=0 +hwmon_in.str_cons_0x0024_0x00=in7_input +hwmon_in.mode_0x0024_0x01=str_constant +hwmon_in.str_cons_0x0024_0x01=VDDA_0P72_PHY0 +hwmon_in.mode_0x0024_0x02=str_constant +hwmon_in.str_cons_0x0024_0x02=ucd90160 +hwmon_in.mode_0x0024_0x03=constant +hwmon_in.int_cons_0x0024_0x03=741 +hwmon_in.mode_0x0024_0x05=constant +hwmon_in.int_cons_0x0024_0x05=699 +hwmon_in.mode_0x0024_0x08=constant +hwmon_in.int_cons_0x0024_0x08=720 + +# vol37 +hwmon_in.mode_0x0025_0x00=config +hwmon_in.int_cons_0x0025_0x00=0 +hwmon_in.src_0x0025_0x00=file +hwmon_in.frmt_0x0025_0x00=buf +hwmon_in.fpath_0x0025_0x00=/sys/bus/i2c/devices/84-005b/hwmon/ +hwmon_in.addr_0x0025_0x00=0 +hwmon_in.len_0x0025_0x00=8 +hwmon_in.bit_offset_0x0025_0x00=0 +hwmon_in.str_cons_0x0025_0x00=in9_input +hwmon_in.mode_0x0025_0x01=str_constant +hwmon_in.str_cons_0x0025_0x01=VDDA1.2V +hwmon_in.mode_0x0025_0x02=str_constant +hwmon_in.str_cons_0x0025_0x02=ucd90160 +hwmon_in.mode_0x0025_0x03=constant +hwmon_in.int_cons_0x0025_0x03=1320 +hwmon_in.mode_0x0025_0x05=constant +hwmon_in.int_cons_0x0025_0x05=1080 +hwmon_in.mode_0x0025_0x08=constant +hwmon_in.int_cons_0x0025_0x08=1200 + +# vol38 +monitor_flag_hwmon_in.mode_0x0026_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0026_0x00=0 +hwmon_in.mode_0x0026_0x00=config +hwmon_in.int_cons_0x0026_0x00=0 +hwmon_in.src_0x0026_0x00=file +hwmon_in.frmt_0x0026_0x00=buf +hwmon_in.fpath_0x0026_0x00=/sys/bus/i2c/devices/84-005b/hwmon/ +hwmon_in.addr_0x0026_0x00=0 +hwmon_in.len_0x0026_0x00=8 +hwmon_in.bit_offset_0x0026_0x00= +hwmon_in.str_cons_0x0026_0x00=in10_input +hwmon_in.mode_0x0026_0x01=str_constant +hwmon_in.str_cons_0x0026_0x01=VDD_CORE +hwmon_in.mode_0x0026_0x02=str_constant +hwmon_in.str_cons_0x0026_0x02=ucd90160 +hwmon_in.mode_0x0026_0x03=constant +hwmon_in.int_cons_0x0026_0x03=900 +hwmon_in.mode_0x0026_0x05=constant +hwmon_in.int_cons_0x0026_0x05=600 +hwmon_in.mode_0x0026_0x08=constant +hwmon_in.int_cons_0x0026_0x08=800 + +# vol39 +monitor_flag_hwmon_in.mode_0x0027_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0027_0x00=0 +hwmon_in.mode_0x0027_0x00=config +hwmon_in.int_cons_0x0027_0x00=0 +hwmon_in.src_0x0027_0x00=file +hwmon_in.frmt_0x0027_0x00=buf +hwmon_in.fpath_0x0027_0x00=/sys/bus/i2c/devices/84-005b/hwmon/ +hwmon_in.addr_0x0027_0x00=0 +hwmon_in.len_0x0027_0x00=8 +hwmon_in.bit_offset_0x0027_0x00= +hwmon_in.str_cons_0x0027_0x00=in10_input +hwmon_in.mode_0x0027_0x01=str_constant +hwmon_in.str_cons_0x0027_0x01=VDD_PHYTILE0 +hwmon_in.mode_0x0027_0x02=str_constant +hwmon_in.str_cons_0x0027_0x02=ucd90160 +hwmon_in.mode_0x0027_0x03=constant +hwmon_in.int_cons_0x0027_0x03=808 +hwmon_in.mode_0x0027_0x05=constant +hwmon_in.int_cons_0x0027_0x05=792 +hwmon_in.mode_0x0027_0x08=constant +hwmon_in.int_cons_0x0027_0x08=800 + +# vol40 +hwmon_in.mode_0x0028_0x00=config +hwmon_in.int_cons_0x0028_0x00=0 +hwmon_in.src_0x0028_0x00=file +hwmon_in.frmt_0x0028_0x00=buf +hwmon_in.fpath_0x0028_0x00=/sys/bus/i2c/devices/84-005b/hwmon/ +hwmon_in.addr_0x0028_0x00=0 +hwmon_in.len_0x0028_0x00=8 +hwmon_in.bit_offset_0x0028_0x00= +hwmon_in.str_cons_0x0028_0x00=in12_input +hwmon_in.mode_0x0028_0x01=str_constant +hwmon_in.str_cons_0x0028_0x01=VDDA0.8V +hwmon_in.mode_0x0028_0x02=str_constant +hwmon_in.str_cons_0x0028_0x02=ucd90160 +hwmon_in.mode_0x0028_0x03=constant +hwmon_in.int_cons_0x0028_0x03=880 +hwmon_in.mode_0x0028_0x05=constant +hwmon_in.int_cons_0x0028_0x05=600 +hwmon_in.mode_0x0028_0x08=constant +hwmon_in.int_cons_0x0028_0x08=800 + +# vol41 +monitor_flag_hwmon_in.mode_0x0029_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0029_0x00=0 +hwmon_in.mode_0x0029_0x00=config +hwmon_in.int_cons_0x0029_0x00=0 +hwmon_in.src_0x0029_0x00=file +hwmon_in.frmt_0x0029_0x00=buf +hwmon_in.fpath_0x0029_0x00=/sys/bus/i2c/devices/84-005b/hwmon/ +hwmon_in.addr_0x0029_0x00=0 +hwmon_in.len_0x0029_0x00=8 +hwmon_in.bit_offset_0x0029_0x00=0 +hwmon_in.str_cons_0x0029_0x00=in14_input +hwmon_in.mode_0x0029_0x01=str_constant +hwmon_in.str_cons_0x0029_0x01=VDD_0.9V_PLL0 +hwmon_in.mode_0x0029_0x02=str_constant +hwmon_in.str_cons_0x0029_0x02=990 +hwmon_in.mode_0x0029_0x03=constant +hwmon_in.int_cons_0x0029_0x03=810 +hwmon_in.mode_0x0029_0x05=constant +hwmon_in.int_cons_0x0029_0x05=900 + +# vol42 +monitor_flag_hwmon_in.mode_0x002a_0x00=constant +monitor_flag_hwmon_in.int_cons_0x002a_0x00=0 +hwmon_in.mode_0x002a_0x00=config +hwmon_in.int_cons_0x002a_0x00=0 +hwmon_in.src_0x002a_0x00=file +hwmon_in.frmt_0x002a_0x00=buf +hwmon_in.fpath_0x002a_0x00=/sys/bus/i2c/devices/84-005b/hwmon/ +hwmon_in.addr_0x002a_0x00=0 +hwmon_in.len_0x002a_0x00=8 +hwmon_in.bit_offset_0x002a_0x00= +hwmon_in.str_cons_0x002a_0x00=in15_input +hwmon_in.mode_0x002a_0x01=str_constant +hwmon_in.str_cons_0x002a_0x01=VDD_0P75_ANA_0 +hwmon_in.mode_0x002a_0x02=str_constant +hwmon_in.str_cons_0x002a_0x02=ucd90160 +hwmon_in.mode_0x002a_0x03=constant +hwmon_in.int_cons_0x002a_0x03=825 +hwmon_in.mode_0x002a_0x05=constant +hwmon_in.int_cons_0x002a_0x05=675 +hwmon_in.mode_0x002a_0x08=constant +hwmon_in.int_cons_0x002a_0x08=750 + +# vol43 +monitor_flag_hwmon_in.mode_0x002b_0x00=constant +monitor_flag_hwmon_in.int_cons_0x002b_0x00=0 +hwmon_in.mode_0x002b_0x00=config +hwmon_in.int_cons_0x002b_0x00=0 +hwmon_in.src_0x002b_0x00=file +hwmon_in.frmt_0x002b_0x00=buf +hwmon_in.fpath_0x002b_0x00=/sys/bus/i2c/devices/84-005b/hwmon/ +hwmon_in.addr_0x002b_0x00=0 +hwmon_in.len_0x002b_0x00=8 +hwmon_in.bit_offset_0x002b_0x00= +hwmon_in.str_cons_0x002b_0x00=in16_input +hwmon_in.mode_0x002b_0x01=str_constant +hwmon_in.str_cons_0x002b_0x01=VDDO1.2V +hwmon_in.mode_0x002b_0x02=str_constant +hwmon_in.str_cons_0x002b_0x02=ucd90160 +hwmon_in.mode_0x002b_0x03=constant +hwmon_in.int_cons_0x002b_0x03=13200 +hwmon_in.mode_0x002b_0x05=constant +hwmon_in.int_cons_0x002b_0x05=10800 +hwmon_in.mode_0x002b_0x08=constant +hwmon_in.int_cons_0x002b_0x08=12000 + +# vol44 +hwmon_in.mode_0x002c_0x00=config +hwmon_in.int_cons_0x002c_0x00=0 +hwmon_in.src_0x002c_0x00=file +hwmon_in.frmt_0x002c_0x00=buf +hwmon_in.fpath_0x002c_0x00=/sys/bus/i2c/devices/85-0060/hwmon/ +hwmon_in.addr_0x002c_0x00=0 +hwmon_in.len_0x002c_0x00=8 +hwmon_in.bit_offset_0x002c_0x00= +hwmon_in.str_cons_0x002c_0x00=in3_input +hwmon_in.mode_0x002c_0x01=str_constant +hwmon_in.str_cons_0x002c_0x01=VDD_CORE +hwmon_in.mode_0x002c_0x02=str_constant +hwmon_in.str_cons_0x002c_0x02=xdpe1a2g5b +hwmon_in.mode_0x002c_0x03=constant +hwmon_in.int_cons_0x002c_0x03=920 +hwmon_in.mode_0x002c_0x05=constant +hwmon_in.int_cons_0x002c_0x05=580 +hwmon_in.mode_0x002c_0x08=constant +hwmon_in.int_cons_0x002c_0x08=800 + +# vol45 +hwmon_in.mode_0x002d_0x00=config +hwmon_in.int_cons_0x002d_0x00=3 +hwmon_in.src_0x002d_0x00=file +hwmon_in.frmt_0x002d_0x00=buf +hwmon_in.fpath_0x002d_0x00=/sys/bus/i2c/devices/91-0060/hwmon/ +hwmon_in.addr_0x002d_0x00=0 +hwmon_in.len_0x002d_0x00=8 +hwmon_in.bit_offset_0x002d_0x00= +hwmon_in.str_cons_0x002d_0x00=in3_input +hwmon_in.mode_0x002d_0x01=str_constant +hwmon_in.str_cons_0x002d_0x01=OSFP_VDD3.3V_A1 +hwmon_in.mode_0x002d_0x02=str_constant +hwmon_in.str_cons_0x002d_0x02=xdpe12284c +hwmon_in.mode_0x002d_0x03=constant +hwmon_in.int_cons_0x002d_0x03=3630 +hwmon_in.mode_0x002d_0x05=constant +hwmon_in.int_cons_0x002d_0x05=2970 +hwmon_in.mode_0x002d_0x08=constant +hwmon_in.int_cons_0x002d_0x08=3300 +hwmon_in.int_extra1_0x002d_0x00=1500 + +# vol46 +hwmon_in.mode_0x002e_0x00=config +hwmon_in.int_cons_0x002e_0x00=3 +hwmon_in.src_0x002e_0x00=file +hwmon_in.frmt_0x002e_0x00=buf +hwmon_in.fpath_0x002e_0x00=/sys/bus/i2c/devices/92-0060/hwmon/ +hwmon_in.addr_0x002e_0x00=0 +hwmon_in.len_0x002e_0x00=8 +hwmon_in.bit_offset_0x002e_0x00=0 +hwmon_in.str_cons_0x002e_0x00=in3_input +hwmon_in.mode_0x002e_0x01=str_constant +hwmon_in.str_cons_0x002e_0x01=OSFP_VDD3.3V_A2 +hwmon_in.mode_0x002e_0x02=str_constant +hwmon_in.str_cons_0x002e_0x02=xdpe12284c +hwmon_in.mode_0x002e_0x03=constant +hwmon_in.int_cons_0x002e_0x03=3630 +hwmon_in.mode_0x002e_0x05=constant +hwmon_in.int_cons_0x002e_0x05=2970 +hwmon_in.mode_0x002e_0x08=constant +hwmon_in.int_cons_0x002e_0x08=3300 +hwmon_in.int_extra1_0x002e_0x00=1500 + +# vol47 +hwmon_in.mode_0x002f_0x00=config +hwmon_in.int_cons_0x002f_0x00=3 +hwmon_in.src_0x002f_0x00=file +hwmon_in.frmt_0x002f_0x00=buf +hwmon_in.fpath_0x002f_0x00=/sys/bus/i2c/devices/91-0062/hwmon/ +hwmon_in.addr_0x002f_0x00=0 +hwmon_in.len_0x002f_0x00=8 +hwmon_in.bit_offset_0x002f_0x00=0 +hwmon_in.str_cons_0x002f_0x00=in3_input +hwmon_in.mode_0x002f_0x01=str_constant +hwmon_in.str_cons_0x002f_0x01=OSFP_VDD3.3V_A3 +hwmon_in.mode_0x002f_0x02=str_constant +hwmon_in.str_cons_0x002f_0x02=xdpe12284c +hwmon_in.mode_0x002f_0x03=constant +hwmon_in.int_cons_0x002f_0x03=3630 +hwmon_in.mode_0x002f_0x05=constant +hwmon_in.int_cons_0x002f_0x05=2970 +hwmon_in.mode_0x002f_0x08=constant +hwmon_in.int_cons_0x002f_0x08=3300 +hwmon_in.int_extra1_0x002f_0x00=1500 + +# vol48 +hwmon_in.mode_0x0030_0x00=config +hwmon_in.int_cons_0x0030_0x00=3 +hwmon_in.src_0x0030_0x00=file +hwmon_in.frmt_0x0030_0x00=buf +hwmon_in.fpath_0x0030_0x00=/sys/bus/i2c/devices/91-0062/hwmon/ +hwmon_in.addr_0x0030_0x00=0 +hwmon_in.len_0x0030_0x00=8 +hwmon_in.bit_offset_0x0030_0x00=0 +hwmon_in.str_cons_0x0030_0x00=in4_input +hwmon_in.mode_0x0030_0x01=str_constant +hwmon_in.str_cons_0x0030_0x01=OSFP_VDD3.3V_B3 +hwmon_in.mode_0x0030_0x02=str_constant +hwmon_in.str_cons_0x0030_0x02=xdpe12284c +hwmon_in.mode_0x0030_0x03=constant +hwmon_in.int_cons_0x0030_0x03=3630 +hwmon_in.mode_0x0030_0x05=constant +hwmon_in.int_cons_0x0030_0x05=2970 +hwmon_in.mode_0x0030_0x08=constant +hwmon_in.int_cons_0x0030_0x08=3300 +hwmon_in.int_extra1_0x0030_0x00=1500 + +# vol49 +hwmon_in.mode_0x0031_0x00=config +hwmon_in.int_cons_0x0031_0x00=3 +hwmon_in.src_0x0031_0x00=file +hwmon_in.frmt_0x0031_0x00=buf +hwmon_in.fpath_0x0031_0x00=/sys/bus/i2c/devices/92-0062/hwmon/ +hwmon_in.addr_0x0031_0x00=0 +hwmon_in.len_0x0031_0x00=8 +hwmon_in.bit_offset_0x0031_0x00=0 +hwmon_in.str_cons_0x0031_0x00=in3_input +hwmon_in.mode_0x0031_0x01=str_constant +hwmon_in.str_cons_0x0031_0x01=OSFP_VDD3.3V_A4 +hwmon_in.mode_0x0031_0x02=str_constant +hwmon_in.str_cons_0x0031_0x02=xdpe12284c +hwmon_in.mode_0x0031_0x03=constant +hwmon_in.int_cons_0x0031_0x03=3630 +hwmon_in.mode_0x0031_0x05=constant +hwmon_in.int_cons_0x0031_0x05=2970 +hwmon_in.mode_0x0031_0x08=constant +hwmon_in.int_cons_0x0031_0x08=3300 +hwmon_in.int_extra1_0x0031_0x00=1500 + +# vol50 +hwmon_in.mode_0x0032_0x00=config +hwmon_in.int_cons_0x0032_0x00=3 +hwmon_in.src_0x0032_0x00=file +hwmon_in.frmt_0x0032_0x00=buf +hwmon_in.fpath_0x0032_0x00=/sys/bus/i2c/devices/92-0062/hwmon/ +hwmon_in.addr_0x0032_0x00=0 +hwmon_in.len_0x0032_0x00=8 +hwmon_in.bit_offset_0x0032_0x00=0 +hwmon_in.str_cons_0x0032_0x00=in4_input +hwmon_in.mode_0x0032_0x01=str_constant +hwmon_in.str_cons_0x0032_0x01=OSFP_VDD3.3V_B4 +hwmon_in.mode_0x0032_0x02=str_constant +hwmon_in.str_cons_0x0032_0x02=xdpe12284c +hwmon_in.mode_0x0032_0x03=constant +hwmon_in.int_cons_0x0032_0x03=3630 +hwmon_in.mode_0x0032_0x05=constant +hwmon_in.int_cons_0x0032_0x05=2970 +hwmon_in.mode_0x0032_0x08=constant +hwmon_in.int_cons_0x0032_0x08=3300 +hwmon_in.int_extra1_0x0032_0x00=1500 + +# vol51 +hwmon_in.mode_0x0033_0x00=config +hwmon_in.int_cons_0x0033_0x00=0 +hwmon_in.src_0x0033_0x00=file +hwmon_in.frmt_0x0033_0x00=buf +hwmon_in.fpath_0x0033_0x00=/sys/bus/i2c/devices/95-0060/hwmon/ +hwmon_in.addr_0x0033_0x00=0 +hwmon_in.len_0x0033_0x00=8 +hwmon_in.bit_offset_0x0033_0x00=0 +hwmon_in.str_cons_0x0033_0x00=in3_input +hwmon_in.mode_0x0033_0x01=str_constant +hwmon_in.str_cons_0x0033_0x01=VDD_PHYTILE6 +hwmon_in.mode_0x0033_0x02=str_constant +hwmon_in.str_cons_0x0033_0x02=xdpe12284c +hwmon_in.mode_0x0033_0x03=constant +hwmon_in.int_cons_0x0033_0x03=880 +hwmon_in.mode_0x0033_0x05=constant +hwmon_in.int_cons_0x0033_0x05=600 +hwmon_in.mode_0x0033_0x08=constant +hwmon_in.int_cons_0x0033_0x08=800 + +# vol52 +hwmon_in.mode_0x0034_0x00=config +hwmon_in.int_cons_0x0034_0x00=0 +hwmon_in.src_0x0034_0x00=file +hwmon_in.frmt_0x0034_0x00=buf +hwmon_in.fpath_0x0034_0x00=/sys/bus/i2c/devices/95-0060/hwmon/ +hwmon_in.addr_0x0034_0x00=0 +hwmon_in.len_0x0034_0x00=8 +hwmon_in.bit_offset_0x0034_0x00=0 +hwmon_in.str_cons_0x0034_0x00=in4_input +hwmon_in.mode_0x0034_0x01=str_constant +hwmon_in.str_cons_0x0034_0x01=VDD_PHYTILE7 +hwmon_in.mode_0x0034_0x02=str_constant +hwmon_in.str_cons_0x0034_0x02=xdpe12284c +hwmon_in.mode_0x0034_0x03=constant +hwmon_in.int_cons_0x0034_0x03=880 +hwmon_in.mode_0x0034_0x05=constant +hwmon_in.int_cons_0x0034_0x05=600 +hwmon_in.mode_0x0034_0x08=constant +hwmon_in.int_cons_0x0034_0x08=800 + +# vol53 +hwmon_in.mode_0x0035_0x00=config +hwmon_in.int_cons_0x0035_0x00=0 +hwmon_in.src_0x0035_0x00=file +hwmon_in.frmt_0x0035_0x00=buf +hwmon_in.fpath_0x0035_0x00=/sys/bus/i2c/devices/85-0074/hwmon/ +hwmon_in.addr_0x0035_0x00=0 +hwmon_in.len_0x0035_0x00=8 +hwmon_in.bit_offset_0x0035_0x00=0 +hwmon_in.str_cons_0x0035_0x00=in3_input +hwmon_in.mode_0x0035_0x01=str_constant +hwmon_in.str_cons_0x0035_0x01=VDDA_0P72_PHY2 +hwmon_in.mode_0x0035_0x02=str_constant +hwmon_in.str_cons_0x0035_0x02=xdpe12284c +hwmon_in.mode_0x0035_0x03=constant +hwmon_in.int_cons_0x0035_0x03=820 +hwmon_in.mode_0x0035_0x05=constant +hwmon_in.int_cons_0x0035_0x05=650 +hwmon_in.mode_0x0035_0x08=constant +hwmon_in.int_cons_0x0035_0x08=720 + +# vol54 +hwmon_in.mode_0x0036_0x00=config +hwmon_in.int_cons_0x0036_0x00=0 +hwmon_in.src_0x0036_0x00=file +hwmon_in.frmt_0x0036_0x00=buf +hwmon_in.fpath_0x0036_0x00=/sys/bus/i2c/devices/85-0074/hwmon/ +hwmon_in.addr_0x0036_0x00=0 +hwmon_in.len_0x0036_0x00=8 +hwmon_in.bit_offset_0x0036_0x00=0 +hwmon_in.str_cons_0x0036_0x00=in4_input +hwmon_in.mode_0x0036_0x01=str_constant +hwmon_in.str_cons_0x0036_0x01=VDDA_0P72_PHY1 +hwmon_in.mode_0x0036_0x02=str_constant +hwmon_in.str_cons_0x0036_0x02=xdpe12284c +hwmon_in.mode_0x0036_0x03=constant +hwmon_in.int_cons_0x0036_0x03=820 +hwmon_in.mode_0x0036_0x05=constant +hwmon_in.int_cons_0x0036_0x05=620 +hwmon_in.mode_0x0036_0x08=constant +hwmon_in.int_cons_0x0036_0x08=720 + +# vol55 +hwmon_in.mode_0x0037_0x00=config +hwmon_in.int_cons_0x0037_0x00=0 +hwmon_in.src_0x0037_0x00=file +hwmon_in.frmt_0x0037_0x00=buf +hwmon_in.fpath_0x0037_0x00=/sys/bus/i2c/devices/87-0074/hwmon/ +hwmon_in.addr_0x0037_0x00=0 +hwmon_in.len_0x0037_0x00=8 +hwmon_in.bit_offset_0x0037_0x00=0 +hwmon_in.str_cons_0x0037_0x00=in4_input +hwmon_in.mode_0x0037_0x01=str_constant +hwmon_in.str_cons_0x0037_0x01=VDDA_0P72_PHY0 +hwmon_in.mode_0x0037_0x02=str_constant +hwmon_in.str_cons_0x0037_0x02=xdpe12284c +hwmon_in.mode_0x0037_0x03=constant +hwmon_in.int_cons_0x0037_0x03=820 +hwmon_in.mode_0x0037_0x05=constant +hwmon_in.int_cons_0x0037_0x05=650 +hwmon_in.mode_0x0037_0x08=constant +hwmon_in.int_cons_0x0037_0x08=720 + +# vol56 +hwmon_in.mode_0x0038_0x00=config +hwmon_in.int_cons_0x0038_0x00=0 +hwmon_in.src_0x0038_0x00=file +hwmon_in.frmt_0x0038_0x00=buf +hwmon_in.fpath_0x0038_0x00=/sys/bus/i2c/devices/87-0074/hwmon/ +hwmon_in.addr_0x0038_0x00=0 +hwmon_in.len_0x0038_0x00=8 +hwmon_in.bit_offset_0x0038_0x00=0 +hwmon_in.str_cons_0x0038_0x00=in4_input +hwmon_in.mode_0x0038_0x01=str_constant +hwmon_in.str_cons_0x0038_0x01=VDDA_0P72_PHY3 +hwmon_in.mode_0x0038_0x02=str_constant +hwmon_in.str_cons_0x0038_0x02=xdpe12284c +hwmon_in.mode_0x0038_0x03=constant +hwmon_in.int_cons_0x0038_0x03=820 +hwmon_in.mode_0x0038_0x05=constant +hwmon_in.int_cons_0x0038_0x05=650 +hwmon_in.mode_0x0038_0x08=constant +hwmon_in.int_cons_0x0038_0x08=720 + +# vol57 +hwmon_in.mode_0x0039_0x00=config +hwmon_in.int_cons_0x0039_0x00=0 +hwmon_in.src_0x0039_0x00=file +hwmon_in.frmt_0x0039_0x00=buf +hwmon_in.fpath_0x0039_0x00=/sys/bus/i2c/devices/89-0074/hwmon/ +hwmon_in.addr_0x0039_0x00=0 +hwmon_in.len_0x0039_0x00=8 +hwmon_in.bit_offset_0x0039_0x00=0 +hwmon_in.str_cons_0x0039_0x00=in3_input +hwmon_in.mode_0x0039_0x01=str_constant +hwmon_in.str_cons_0x0039_0x01=VDD_1P5V_0 +hwmon_in.mode_0x0039_0x02=str_constant +hwmon_in.str_cons_0x0039_0x02=xdpe12284c +hwmon_in.mode_0x0039_0x03=constant +hwmon_in.int_cons_0x0039_0x03=1650 +hwmon_in.mode_0x0039_0x05=constant +hwmon_in.int_cons_0x0039_0x05=1350 +hwmon_in.mode_0x0039_0x08=constant +hwmon_in.int_cons_0x0039_0x08=1500 + +# vol58 +hwmon_in.mode_0x003a_0x00=config +hwmon_in.int_cons_0x003a_0x00=0 +hwmon_in.src_0x003a_0x00=file +hwmon_in.frmt_0x003a_0x00=buf +hwmon_in.fpath_0x003a_0x00=/sys/bus/i2c/devices/89-0074/hwmon/ +hwmon_in.addr_0x003a_0x00=0 +hwmon_in.len_0x003a_0x00=8 +hwmon_in.bit_offset_0x003a_0x00=0 +hwmon_in.str_cons_0x003a_0x00=in4_input +hwmon_in.mode_0x003a_0x01=str_constant +hwmon_in.str_cons_0x003a_0x01=VDD_1P5V_1 +hwmon_in.mode_0x003a_0x02=str_constant +hwmon_in.str_cons_0x003a_0x02=xdpe12284c +hwmon_in.mode_0x003a_0x03=constant +hwmon_in.int_cons_0x003a_0x03=1650 +hwmon_in.mode_0x003a_0x05=constant +hwmon_in.int_cons_0x003a_0x05=1350 +hwmon_in.mode_0x003a_0x08=constant +hwmon_in.int_cons_0x003a_0x08=1500 + +# vol59 +hwmon_in.mode_0x003b_0x00=config +hwmon_in.int_cons_0x003b_0x00=0 +hwmon_in.src_0x003b_0x00=file +hwmon_in.frmt_0x003b_0x00=buf +hwmon_in.fpath_0x003b_0x00=/sys/bus/i2c/devices/85-0062/hwmon/ +hwmon_in.addr_0x003b_0x00=0 +hwmon_in.len_0x003b_0x00=8 +hwmon_in.bit_offset_0x003b_0x00=0 +hwmon_in.str_cons_0x003b_0x00=in3_input +hwmon_in.mode_0x003b_0x01=str_constant +hwmon_in.str_cons_0x003b_0x01=VDD0_9V_ANLG0 +hwmon_in.mode_0x003b_0x02=str_constant +hwmon_in.str_cons_0x003b_0x02=xdpe12284c +hwmon_in.mode_0x003b_0x03=constant +hwmon_in.int_cons_0x003b_0x03=990 +hwmon_in.mode_0x003b_0x05=constant +hwmon_in.int_cons_0x003b_0x05=810 +hwmon_in.mode_0x003b_0x08=constant +hwmon_in.int_cons_0x003b_0x08=900 + +# vol60 +hwmon_in.mode_0x003c_0x00=config +hwmon_in.int_cons_0x003c_0x00=0 +hwmon_in.src_0x003c_0x00=file +hwmon_in.frmt_0x003c_0x00=buf +hwmon_in.fpath_0x003c_0x00=/sys/bus/i2c/devices/85-0062/hwmon/ +hwmon_in.addr_0x003c_0x00=0 +hwmon_in.len_0x003c_0x00=8 +hwmon_in.bit_offset_0x003c_0x00=0 +hwmon_in.str_cons_0x003c_0x00=in4_input +hwmon_in.mode_0x003c_0x01=str_constant +hwmon_in.str_cons_0x003c_0x01=VDD0_75V_ANLG0 +hwmon_in.mode_0x003c_0x02=str_constant +hwmon_in.str_cons_0x003c_0x02=xdpe12284c +hwmon_in.mode_0x003c_0x03=constant +hwmon_in.int_cons_0x003c_0x03=825 +hwmon_in.mode_0x003c_0x05=constant +hwmon_in.int_cons_0x003c_0x05=675 +hwmon_in.mode_0x003c_0x08=constant +hwmon_in.int_cons_0x003c_0x08=750 + +# vol61 +hwmon_in.mode_0x003d_0x00=config +hwmon_in.int_cons_0x003d_0x00=0 +hwmon_in.src_0x003d_0x00=file +hwmon_in.frmt_0x003d_0x00=buf +hwmon_in.fpath_0x003d_0x00=/sys/bus/i2c/devices/87-0062/hwmon/ +hwmon_in.addr_0x003d_0x00=0 +hwmon_in.len_0x003d_0x00=8 +hwmon_in.bit_offset_0x003d_0x00=0 +hwmon_in.str_cons_0x003d_0x00=in3_input +hwmon_in.mode_0x003d_0x01=str_constant +hwmon_in.str_cons_0x003d_0x01=VDD0_9V_ANLG1 +hwmon_in.mode_0x003d_0x02=str_constant +hwmon_in.str_cons_0x003d_0x02=xdpe12284c +hwmon_in.mode_0x003d_0x03=constant +hwmon_in.int_cons_0x003d_0x03=990 +hwmon_in.mode_0x003d_0x05=constant +hwmon_in.int_cons_0x003d_0x05=810 +hwmon_in.mode_0x003d_0x08=constant +hwmon_in.int_cons_0x003d_0x08=900 + +# vol62 +hwmon_in.mode_0x003e_0x00=config +hwmon_in.int_cons_0x003e_0x00=0 +hwmon_in.src_0x003e_0x00=file +hwmon_in.frmt_0x003e_0x00=buf +hwmon_in.fpath_0x003e_0x00=/sys/bus/i2c/devices/87-0062/hwmon/ +hwmon_in.addr_0x003e_0x00=0 +hwmon_in.len_0x003e_0x00=8 +hwmon_in.bit_offset_0x003e_0x00=0 +hwmon_in.str_cons_0x003e_0x00=in4_input +hwmon_in.mode_0x003e_0x01=str_constant +hwmon_in.str_cons_0x003e_0x01=VDD0_75V_ANLG1 +hwmon_in.mode_0x003e_0x02=str_constant +hwmon_in.str_cons_0x003e_0x02=xdpe12284c +hwmon_in.mode_0x003e_0x03=constant +hwmon_in.int_cons_0x003e_0x03=825 +hwmon_in.mode_0x003e_0x05=constant +hwmon_in.int_cons_0x003e_0x05=675 +hwmon_in.mode_0x003e_0x08=constant +hwmon_in.int_cons_0x003e_0x08=750 + +# vol63 +hwmon_in.mode_0x003f_0x00=config +hwmon_in.int_cons_0x003f_0x00=0 +hwmon_in.src_0x003f_0x00=file +hwmon_in.frmt_0x003f_0x00=buf +hwmon_in.fpath_0x003f_0x00=/sys/bus/i2c/devices/87-0060/hwmon/ +hwmon_in.addr_0x003f_0x00=0 +hwmon_in.len_0x003f_0x00=8 +hwmon_in.bit_offset_0x003f_0x00=0 +hwmon_in.str_cons_0x003f_0x00=in3_input +hwmon_in.mode_0x003f_0x01=str_constant +hwmon_in.str_cons_0x003f_0x01=VDD_PHYTILE1 +hwmon_in.mode_0x003f_0x02=str_constant +hwmon_in.str_cons_0x003f_0x02=xdpe12284c +hwmon_in.mode_0x003f_0x03=constant +hwmon_in.int_cons_0x003f_0x03=880 +hwmon_in.mode_0x003f_0x05=constant +hwmon_in.int_cons_0x003f_0x05=600 +hwmon_in.mode_0x003f_0x08=constant +hwmon_in.int_cons_0x003f_0x08=800 + +# vol64 +hwmon_in.mode_0x0040_0x00=config +hwmon_in.int_cons_0x0040_0x00=0 +hwmon_in.src_0x0040_0x00=file +hwmon_in.frmt_0x0040_0x00=buf +hwmon_in.fpath_0x0040_0x00=/sys/bus/i2c/devices/87-0060/hwmon/ +hwmon_in.addr_0x0040_0x00=0 +hwmon_in.len_0x0040_0x00=8 +hwmon_in.bit_offset_0x0040_0x00=0 +hwmon_in.str_cons_0x0040_0x00=in4_input +hwmon_in.mode_0x0040_0x01=str_constant +hwmon_in.str_cons_0x0040_0x01=VDD_PHYTILE0 +hwmon_in.mode_0x0040_0x02=str_constant +hwmon_in.str_cons_0x0040_0x02=xdpe12284c +hwmon_in.mode_0x0040_0x03=constant +hwmon_in.int_cons_0x0040_0x03=880 +hwmon_in.mode_0x0040_0x05=constant +hwmon_in.int_cons_0x0040_0x05=600 +hwmon_in.mode_0x0040_0x08=constant +hwmon_in.int_cons_0x0040_0x08=800 + +# vol65 +hwmon_in.mode_0x0041_0x00=config +hwmon_in.int_cons_0x0041_0x00=0 +hwmon_in.src_0x0041_0x00=file +hwmon_in.frmt_0x0041_0x00=buf +hwmon_in.fpath_0x0041_0x00=/sys/bus/i2c/devices/89-0060/hwmon/ +hwmon_in.addr_0x0041_0x00=0 +hwmon_in.len_0x0041_0x00=8 +hwmon_in.bit_offset_0x0041_0x00=0 +hwmon_in.str_cons_0x0041_0x00=in3_input +hwmon_in.mode_0x0041_0x01=str_constant +hwmon_in.str_cons_0x0041_0x01=VDD_PHYTILE2 +hwmon_in.mode_0x0041_0x02=str_constant +hwmon_in.str_cons_0x0041_0x02=xdpe12284c +hwmon_in.mode_0x0041_0x03=constant +hwmon_in.int_cons_0x0041_0x03=880 +hwmon_in.mode_0x0041_0x05=constant +hwmon_in.int_cons_0x0041_0x05=600 +hwmon_in.mode_0x0041_0x08=constant +hwmon_in.int_cons_0x0041_0x08=800 + +# vol66 +hwmon_in.mode_0x0042_0x00=config +hwmon_in.int_cons_0x0042_0x00=0 +hwmon_in.src_0x0042_0x00=file +hwmon_in.frmt_0x0042_0x00=buf +hwmon_in.fpath_0x0042_0x00=/sys/bus/i2c/devices/89-0060/hwmon/ +hwmon_in.addr_0x0042_0x00=0 +hwmon_in.len_0x0042_0x00=8 +hwmon_in.bit_offset_0x0042_0x00=0 +hwmon_in.str_cons_0x0042_0x00=in4_input +hwmon_in.mode_0x0042_0x01=str_constant +hwmon_in.str_cons_0x0042_0x01=VDD_PHYTILE3 +hwmon_in.mode_0x0042_0x02=str_constant +hwmon_in.str_cons_0x0042_0x02=xdpe12284c +hwmon_in.mode_0x0042_0x03=constant +hwmon_in.int_cons_0x0042_0x03=880 +hwmon_in.mode_0x0042_0x05=constant +hwmon_in.int_cons_0x0042_0x05=600 +hwmon_in.mode_0x0042_0x08=constant +hwmon_in.int_cons_0x0042_0x08=800 + +# vol67 +hwmon_in.mode_0x0043_0x00=config +hwmon_in.int_cons_0x0043_0x00=0 +hwmon_in.src_0x0043_0x00=file +hwmon_in.frmt_0x0043_0x00=buf +hwmon_in.fpath_0x0043_0x00=/sys/bus/i2c/devices/90-0060/hwmon/ +hwmon_in.addr_0x0043_0x00=0 +hwmon_in.len_0x0043_0x00=8 +hwmon_in.bit_offset_0x0043_0x00=0 +hwmon_in.str_cons_0x0043_0x00=in3_input +hwmon_in.mode_0x0043_0x01=str_constant +hwmon_in.str_cons_0x0043_0x01=VDD_PHYTILE4 +hwmon_in.mode_0x0043_0x02=str_constant +hwmon_in.str_cons_0x0043_0x02=xdpe12284c +hwmon_in.mode_0x0043_0x03=constant +hwmon_in.int_cons_0x0043_0x03=880 +hwmon_in.mode_0x0043_0x05=constant +hwmon_in.int_cons_0x0043_0x05=600 +hwmon_in.mode_0x0043_0x08=constant +hwmon_in.int_cons_0x0043_0x08=800 + +# vol68 +hwmon_in.mode_0x0044_0x00=config +hwmon_in.int_cons_0x0044_0x00=0 +hwmon_in.src_0x0044_0x00=file +hwmon_in.frmt_0x0044_0x00=buf +hwmon_in.fpath_0x0044_0x00=/sys/bus/i2c/devices/90-0060/hwmon/ +hwmon_in.addr_0x0044_0x00=0 +hwmon_in.len_0x0044_0x00=8 +hwmon_in.bit_offset_0x0044_0x00=0 +hwmon_in.str_cons_0x0044_0x00=in4_input +hwmon_in.mode_0x0044_0x01=str_constant +hwmon_in.str_cons_0x0044_0x01=VDD_PHYTILE5 +hwmon_in.mode_0x0044_0x02=str_constant +hwmon_in.str_cons_0x0044_0x02=xdpe12284c +hwmon_in.mode_0x0044_0x03=constant +hwmon_in.int_cons_0x0044_0x03=880 +hwmon_in.mode_0x0044_0x05=constant +hwmon_in.int_cons_0x0044_0x05=600 +hwmon_in.mode_0x0044_0x08=constant +hwmon_in.int_cons_0x0044_0x08=800 + +# vol69 +hwmon_in.mode_0x0045_0x00=config +hwmon_in.int_cons_0x0045_0x00=0 +hwmon_in.src_0x0045_0x00=file +hwmon_in.frmt_0x0045_0x00=buf +hwmon_in.fpath_0x0045_0x00=/sys/bus/i2c/devices/98-0040/hwmon/ +hwmon_in.addr_0x0045_0x00=0 +hwmon_in.len_0x0045_0x00=8 +hwmon_in.bit_offset_0x0045_0x00=0 +hwmon_in.str_cons_0x0045_0x00=in1_input +hwmon_in.mode_0x0045_0x01=str_constant +hwmon_in.str_cons_0x0045_0x01=VDDO1.2V +hwmon_in.mode_0x0045_0x02=str_constant +hwmon_in.str_cons_0x0045_0x02=xdpe12284c +hwmon_in.mode_0x0045_0x03=constant +hwmon_in.int_cons_0x0045_0x03=1320 +hwmon_in.mode_0x0045_0x05=constant +hwmon_in.int_cons_0x0045_0x05=800 +hwmon_in.mode_0x0045_0x08=constant +hwmon_in.int_cons_0x0045_0x08=1200 + +# vol70 +hwmon_in.mode_0x0046_0x00=config +hwmon_in.int_cons_0x0046_0x00=0 +hwmon_in.src_0x0046_0x00=file +hwmon_in.frmt_0x0046_0x00=buf +hwmon_in.fpath_0x0046_0x00=/sys/bus/i2c/devices/98-0040/hwmon/ +hwmon_in.addr_0x0046_0x00=0 +hwmon_in.len_0x0046_0x00=8 +hwmon_in.bit_offset_0x0046_0x00=0 +hwmon_in.str_cons_0x0046_0x00=in2_input +hwmon_in.mode_0x0046_0x01=str_constant +hwmon_in.str_cons_0x0046_0x01=VDDO1.8V +hwmon_in.mode_0x0046_0x02=str_constant +hwmon_in.str_cons_0x0046_0x02=INA322 +hwmon_in.mode_0x0046_0x03=constant +hwmon_in.int_cons_0x0046_0x03=1980 +hwmon_in.mode_0x0046_0x05=constant +hwmon_in.int_cons_0x0046_0x05=1620 +hwmon_in.mode_0x0046_0x08=constant +hwmon_in.int_cons_0x0046_0x08=1800 + +# vol71 +hwmon_in.mode_0x0047_0x00=config +hwmon_in.int_cons_0x0047_0x00=0 +hwmon_in.src_0x0047_0x00=file +hwmon_in.frmt_0x0047_0x00=buf +hwmon_in.fpath_0x0047_0x00=/sys/bus/i2c/devices/98-0040/hwmon/ +hwmon_in.addr_0x0047_0x00=0 +hwmon_in.len_0x0047_0x00=8 +hwmon_in.bit_offset_0x0047_0x00=0 +hwmon_in.str_cons_0x0047_0x00=in3_input +hwmon_in.mode_0x0047_0x01=str_constant +hwmon_in.str_cons_0x0047_0x01=VDD2.2V +hwmon_in.mode_0x0047_0x02=str_constant +hwmon_in.str_cons_0x0047_0x02=INA322 +hwmon_in.mode_0x0047_0x03=constant +hwmon_in.int_cons_0x0047_0x03=2420 +hwmon_in.mode_0x0047_0x05=constant +hwmon_in.int_cons_0x0047_0x05=1980 +hwmon_in.mode_0x0047_0x08=constant +hwmon_in.int_cons_0x0047_0x08=2200 + +# vol72 +hwmon_in.mode_0x0048_0x00=config +hwmon_in.int_cons_0x0048_0x00=0 +hwmon_in.src_0x0048_0x00=file +hwmon_in.frmt_0x0048_0x00=buf +hwmon_in.fpath_0x0048_0x00=/sys/bus/i2c/devices/97-0048/hwmon/ +hwmon_in.addr_0x0048_0x00=0 +hwmon_in.len_0x0048_0x00=8 +hwmon_in.bit_offset_0x0048_0x00=0 +hwmon_in.str_cons_0x0048_0x00=in0_input +hwmon_in.mode_0x0048_0x01=str_constant +hwmon_in.str_cons_0x0048_0x01=VDD_0.9V_PLL0 +hwmon_in.mode_0x0048_0x02=str_constant +hwmon_in.str_cons_0x0048_0x02=INA322 +hwmon_in.mode_0x0048_0x03=constant +hwmon_in.int_cons_0x0048_0x03=990 +hwmon_in.mode_0x0048_0x05=constant +hwmon_in.int_cons_0x0048_0x05=810 +hwmon_in.mode_0x0048_0x08=constant +hwmon_in.int_cons_0x0048_0x08=900 + +# vol73 +hwmon_in.mode_0x0049_0x00=config +hwmon_in.int_cons_0x0049_0x00=0 +hwmon_in.src_0x0049_0x00=file +hwmon_in.frmt_0x0049_0x00=buf +hwmon_in.fpath_0x0049_0x00=/sys/bus/i2c/devices/97-0048/hwmon/ +hwmon_in.addr_0x0049_0x00=0 +hwmon_in.len_0x0049_0x00=8 +hwmon_in.bit_offset_0x0049_0x00=0 +hwmon_in.str_cons_0x0049_0x00=in1_input +hwmon_in.mode_0x0049_0x01=str_constant +hwmon_in.str_cons_0x0049_0x01=VDD_0.9V_PLL1 +hwmon_in.mode_0x0049_0x02=str_constant +hwmon_in.str_cons_0x0049_0x02=ADS7828E +hwmon_in.mode_0x0049_0x03=constant +hwmon_in.int_cons_0x0049_0x03=990 +hwmon_in.mode_0x0049_0x05=constant +hwmon_in.int_cons_0x0049_0x05=810 +hwmon_in.mode_0x0049_0x08=constant +hwmon_in.int_cons_0x0049_0x08=900 + +# vol74 +hwmon_in.mode_0x004a_0x00=config +hwmon_in.int_cons_0x004a_0x00=0 +hwmon_in.src_0x004a_0x00=file +hwmon_in.frmt_0x004a_0x00=buf +hwmon_in.fpath_0x004a_0x00=/sys/bus/i2c/devices/97-0048/hwmon/ +hwmon_in.addr_0x004a_0x00=0 +hwmon_in.len_0x004a_0x00=8 +hwmon_in.bit_offset_0x004a_0x00=0 +hwmon_in.str_cons_0x004a_0x00=in2_input +hwmon_in.mode_0x004a_0x01=str_constant +hwmon_in.str_cons_0x004a_0x01=VDD_0.9V_PLL2 +hwmon_in.mode_0x004a_0x02=str_constant +hwmon_in.str_cons_0x004a_0x02=ADS7828E +hwmon_in.mode_0x004a_0x03=constant +hwmon_in.int_cons_0x004a_0x03=990 +hwmon_in.mode_0x004a_0x05=constant +hwmon_in.int_cons_0x004a_0x05=810 +hwmon_in.mode_0x004a_0x08=constant +hwmon_in.int_cons_0x004a_0x08=900 + +# vol75 +hwmon_in.mode_0x004b_0x00=config +hwmon_in.int_cons_0x004b_0x00=0 +hwmon_in.src_0x004b_0x00=file +hwmon_in.frmt_0x004b_0x00=buf +hwmon_in.fpath_0x004b_0x00=/sys/bus/i2c/devices/97-0048/hwmon/ +hwmon_in.addr_0x004b_0x00=0 +hwmon_in.len_0x004b_0x00=8 +hwmon_in.bit_offset_0x004b_0x00=0 +hwmon_in.str_cons_0x004b_0x00=in3_input +hwmon_in.mode_0x004b_0x01=str_constant +hwmon_in.str_cons_0x004b_0x01=VDD_0.9V_PLL3 +hwmon_in.mode_0x004b_0x02=str_constant +hwmon_in.str_cons_0x004b_0x02=ADS7828E +hwmon_in.mode_0x004b_0x03=constant +hwmon_in.int_cons_0x004b_0x03=990 +hwmon_in.mode_0x004b_0x05=constant +hwmon_in.int_cons_0x004b_0x05=810 +hwmon_in.mode_0x004b_0x08=constant +hwmon_in.int_cons_0x004b_0x08=900 + +# vol76 +hwmon_in.mode_0x004c_0x00=config +hwmon_in.int_cons_0x004c_0x00=0 +hwmon_in.src_0x004c_0x00=file +hwmon_in.frmt_0x004c_0x00=buf +hwmon_in.fpath_0x004c_0x00=/sys/bus/i2c/devices/97-0048/hwmon/ +hwmon_in.addr_0x004c_0x00=0 +hwmon_in.len_0x004c_0x00=8 +hwmon_in.bit_offset_0x004c_0x00=0 +hwmon_in.str_cons_0x004c_0x00=in4_input +hwmon_in.mode_0x004c_0x01=str_constant +hwmon_in.str_cons_0x004c_0x01=VDD_0.9V_PLL4 +hwmon_in.mode_0x004c_0x02=str_constant +hwmon_in.str_cons_0x004c_0x02=ADS7828E +hwmon_in.mode_0x004c_0x03=constant +hwmon_in.int_cons_0x004c_0x03=990 +hwmon_in.mode_0x004c_0x05=constant +hwmon_in.int_cons_0x004c_0x05=810 +hwmon_in.mode_0x004c_0x08=constant +hwmon_in.int_cons_0x004c_0x08=900 + +# vol77 +hwmon_in.mode_0x004d_0x00=config +hwmon_in.int_cons_0x004d_0x00=0 +hwmon_in.src_0x004d_0x00=file +hwmon_in.frmt_0x004d_0x00=buf +hwmon_in.fpath_0x004d_0x00=/sys/bus/i2c/devices/97-0048/hwmon/ +hwmon_in.addr_0x004d_0x00=0 +hwmon_in.len_0x004d_0x00=8 +hwmon_in.bit_offset_0x004d_0x00=0 +hwmon_in.str_cons_0x004d_0x00=in5_input +hwmon_in.mode_0x004d_0x01=str_constant +hwmon_in.str_cons_0x004d_0x01=VDD_0.9V_PLL5 +hwmon_in.mode_0x004d_0x02=str_constant +hwmon_in.str_cons_0x004d_0x02=ADS7828E +hwmon_in.mode_0x004d_0x03=constant +hwmon_in.int_cons_0x004d_0x03=990 +hwmon_in.mode_0x004d_0x05=constant +hwmon_in.int_cons_0x004d_0x05=810 +hwmon_in.mode_0x004d_0x08=constant +hwmon_in.int_cons_0x004d_0x08=900 + +# vol78 +hwmon_in.mode_0x004e_0x00=config +hwmon_in.int_cons_0x004e_0x00=0 +hwmon_in.src_0x004e_0x00=file +hwmon_in.frmt_0x004e_0x00=buf +hwmon_in.fpath_0x004e_0x00=/sys/bus/i2c/devices/97-0048/hwmon/ +hwmon_in.addr_0x004e_0x00=0 +hwmon_in.len_0x004e_0x00=8 +hwmon_in.bit_offset_0x004e_0x00=0 +hwmon_in.str_cons_0x004e_0x00=in6_input +hwmon_in.mode_0x004e_0x01=str_constant +hwmon_in.str_cons_0x004e_0x01=VDD_0.9V_PLL6 +hwmon_in.mode_0x004e_0x02=str_constant +hwmon_in.str_cons_0x004e_0x02=ADS7828E +hwmon_in.mode_0x004e_0x03=constant +hwmon_in.int_cons_0x004e_0x03=990 +hwmon_in.mode_0x004e_0x05=constant +hwmon_in.int_cons_0x004e_0x05=810 +hwmon_in.mode_0x004e_0x08=constant +hwmon_in.int_cons_0x004e_0x08=900 + +# vol79 +hwmon_in.mode_0x004f_0x00=config +hwmon_in.int_cons_0x004f_0x00=0 +hwmon_in.src_0x004f_0x00=file +hwmon_in.frmt_0x004f_0x00=buf +hwmon_in.fpath_0x004f_0x00=/sys/bus/i2c/devices/97-0048/hwmon/ +hwmon_in.addr_0x004f_0x00=0 +hwmon_in.len_0x004f_0x00=8 +hwmon_in.bit_offset_0x004f_0x00=0 +hwmon_in.str_cons_0x004f_0x00=in7_input +hwmon_in.mode_0x004f_0x01=str_constant +hwmon_in.str_cons_0x004f_0x01=VDD_0.9V_PLL7 +hwmon_in.mode_0x004f_0x02=str_constant +hwmon_in.str_cons_0x004f_0x02=ADS7828E +hwmon_in.mode_0x004f_0x03=constant +hwmon_in.int_cons_0x004f_0x03=990 +hwmon_in.mode_0x004f_0x05=constant +hwmon_in.int_cons_0x004f_0x05=810 +hwmon_in.mode_0x004f_0x08=constant +hwmon_in.int_cons_0x004f_0x08=900 + +# vol80 +hwmon_in.mode_0x0050_0x00=config +hwmon_in.int_cons_0x0050_0x00=0 +hwmon_in.src_0x0050_0x00=file +hwmon_in.frmt_0x0050_0x00=buf +hwmon_in.fpath_0x0050_0x00=/sys/bus/i2c/devices/97-004a/hwmon/ +hwmon_in.addr_0x0050_0x00=0 +hwmon_in.len_0x0050_0x00=8 +hwmon_in.bit_offset_0x0050_0x00=0 +hwmon_in.str_cons_0x0050_0x00=in0_input +hwmon_in.mode_0x0050_0x01=str_constant +hwmon_in.str_cons_0x0050_0x01=VDD1.45V_1 +hwmon_in.mode_0x0050_0x02=str_constant +hwmon_in.str_cons_0x0050_0x02=ADS7828E +hwmon_in.mode_0x0050_0x03=constant +hwmon_in.int_cons_0x0050_0x03=1650 +hwmon_in.mode_0x0050_0x05=constant +hwmon_in.int_cons_0x0050_0x05=1350 +hwmon_in.mode_0x0050_0x08=constant +hwmon_in.int_cons_0x0050_0x08=1500 + +# vol81 +hwmon_in.mode_0x0051_0x00=config +hwmon_in.int_cons_0x0051_0x00=0 +hwmon_in.src_0x0051_0x00=file +hwmon_in.frmt_0x0051_0x00=buf +hwmon_in.fpath_0x0051_0x00=/sys/bus/i2c/devices/97-004a/hwmon/ +hwmon_in.addr_0x0051_0x00=0 +hwmon_in.len_0x0051_0x00=8 +hwmon_in.bit_offset_0x0051_0x00=0 +hwmon_in.str_cons_0x0051_0x00=in1_input +hwmon_in.mode_0x0051_0x01=str_constant +hwmon_in.str_cons_0x0051_0x01=VDD_1.45V_2 +hwmon_in.mode_0x0051_0x02=str_constant +hwmon_in.str_cons_0x0051_0x02=ADS7828E +hwmon_in.mode_0x0051_0x03=constant +hwmon_in.int_cons_0x0051_0x03=1650 +hwmon_in.mode_0x0051_0x05=constant +hwmon_in.int_cons_0x0051_0x05=1350 +hwmon_in.mode_0x0051_0x08=constant +hwmon_in.int_cons_0x0051_0x08=1500 + +# vol82 +hwmon_in.mode_0x0052_0x00=config +hwmon_in.int_cons_0x0052_0x00=0 +hwmon_in.src_0x0052_0x00=file +hwmon_in.frmt_0x0052_0x00=buf +hwmon_in.fpath_0x0052_0x00=/sys/bus/i2c/devices/97-004a/hwmon/ +hwmon_in.addr_0x0052_0x00=0 +hwmon_in.len_0x0052_0x00=8 +hwmon_in.bit_offset_0x0052_0x00=0 +hwmon_in.str_cons_0x0052_0x00=in2_input +hwmon_in.mode_0x0052_0x01=str_constant +hwmon_in.str_cons_0x0052_0x01=VDD_1.45V_3 +hwmon_in.mode_0x0052_0x02=str_constant +hwmon_in.str_cons_0x0052_0x02=ADS7828E +hwmon_in.mode_0x0052_0x03=constant +hwmon_in.int_cons_0x0052_0x03=1650 +hwmon_in.mode_0x0052_0x05=constant +hwmon_in.int_cons_0x0052_0x05=1350 +hwmon_in.mode_0x0052_0x08=constant +hwmon_in.int_cons_0x0052_0x08=1500 + +# vol83 +hwmon_in.mode_0x0053_0x00=config +hwmon_in.int_cons_0x0053_0x00=0 +hwmon_in.src_0x0053_0x00=file +hwmon_in.frmt_0x0053_0x00=buf +hwmon_in.fpath_0x0053_0x00=/sys/bus/i2c/devices/97-004a/hwmon/ +hwmon_in.addr_0x0053_0x00=0 +hwmon_in.len_0x0053_0x00=8 +hwmon_in.bit_offset_0x0053_0x00=0 +hwmon_in.str_cons_0x0053_0x00=in3_input +hwmon_in.mode_0x0053_0x01=str_constant +hwmon_in.str_cons_0x0053_0x01=VDD_1.45V_4 +hwmon_in.mode_0x0053_0x02=str_constant +hwmon_in.str_cons_0x0053_0x02=ADS7828E +hwmon_in.mode_0x0053_0x03=constant +hwmon_in.int_cons_0x0053_0x03=1650 +hwmon_in.mode_0x0053_0x05=constant +hwmon_in.int_cons_0x0053_0x05=1350 +hwmon_in.mode_0x0053_0x08=constant +hwmon_in.int_cons_0x0053_0x08=1500 + +# vol84 +hwmon_in.mode_0x0054_0x00=config +hwmon_in.int_cons_0x0054_0x00=0 +hwmon_in.src_0x0054_0x00=file +hwmon_in.frmt_0x0054_0x00=buf +hwmon_in.fpath_0x0054_0x00=/sys/bus/i2c/devices/97-004a/hwmon/ +hwmon_in.addr_0x0054_0x00=0 +hwmon_in.len_0x0054_0x00=8 +hwmon_in.bit_offset_0x0054_0x00=0 +hwmon_in.str_cons_0x0054_0x00=in4_input +hwmon_in.mode_0x0054_0x01=str_constant +hwmon_in.str_cons_0x0054_0x01=VDDO1.8V_OTP +hwmon_in.mode_0x0054_0x02=str_constant +hwmon_in.str_cons_0x0054_0x02=ADS7828E +hwmon_in.mode_0x0054_0x03=constant +hwmon_in.int_cons_0x0054_0x03=1980 +hwmon_in.mode_0x0054_0x05=constant +hwmon_in.int_cons_0x0054_0x05=1620 +hwmon_in.mode_0x0054_0x08=constant +hwmon_in.int_cons_0x0054_0x08=1800 + +# vol85 +hwmon_in.mode_0x0055_0x00=config +hwmon_in.int_cons_0x0055_0x00=0 +hwmon_in.src_0x0055_0x00=file +hwmon_in.frmt_0x0055_0x00=buf +hwmon_in.fpath_0x0055_0x00=/sys/bus/i2c/devices/70-005f/hwmon/ +hwmon_in.addr_0x0055_0x00=0 +hwmon_in.len_0x0055_0x00=8 +hwmon_in.bit_offset_0x0055_0x00=0 +hwmon_in.str_cons_0x0055_0x00=in1_input +hwmon_in.mode_0x0055_0x01=str_constant +hwmon_in.str_cons_0x0055_0x01=VDD12V_F +hwmon_in.mode_0x0055_0x02=str_constant +hwmon_in.str_cons_0x0055_0x02=ucd9081 +hwmon_in.mode_0x0055_0x03=constant +hwmon_in.int_cons_0x0055_0x03=13800 +hwmon_in.mode_0x0055_0x05=constant +hwmon_in.int_cons_0x0055_0x05=11800 +hwmon_in.mode_0x0055_0x08=constant +hwmon_in.int_cons_0x0055_0x08=12000 + +# vol86 +hwmon_in.mode_0x0056_0x00=config +hwmon_in.int_cons_0x0056_0x00=0 +hwmon_in.src_0x0056_0x00=file +hwmon_in.frmt_0x0056_0x00=buf +hwmon_in.fpath_0x0056_0x00=/sys/bus/i2c/devices/70-005f/hwmon/ +hwmon_in.addr_0x0056_0x00=0 +hwmon_in.len_0x0056_0x00=8 +hwmon_in.bit_offset_0x0056_0x00= +hwmon_in.str_cons_0x0056_0x00=in2_input +hwmon_in.mode_0x0056_0x01=str_constant +hwmon_in.str_cons_0x0056_0x01=VCC_P5V0_STBY +hwmon_in.mode_0x0056_0x02=str_constant +hwmon_in.str_cons_0x0056_0x02=ucd9081 +hwmon_in.mode_0x0056_0x03=constant +hwmon_in.int_cons_0x0056_0x03=5500 +hwmon_in.mode_0x0056_0x05=constant +hwmon_in.int_cons_0x0056_0x05=4500 +hwmon_in.mode_0x0056_0x08=constant +hwmon_in.int_cons_0x0056_0x08=5000 + +# vol87 +hwmon_in.mode_0x0057_0x00=config +hwmon_in.int_cons_0x0057_0x00=0 +hwmon_in.src_0x0057_0x00=file +hwmon_in.frmt_0x0057_0x00=buf +hwmon_in.fpath_0x0057_0x00=/sys/bus/i2c/devices/70-005f/hwmon/ +hwmon_in.addr_0x0057_0x00=0 +hwmon_in.len_0x0057_0x00=8 +hwmon_in.bit_offset_0x0057_0x00= +hwmon_in.str_cons_0x0057_0x00=in3_input +hwmon_in.mode_0x0057_0x01=str_constant +hwmon_in.str_cons_0x0057_0x01=VDD_P3V3_FR_S5DM +hwmon_in.mode_0x0057_0x02=str_constant +hwmon_in.str_cons_0x0057_0x02=ucd9081 +hwmon_in.mode_0x0057_0x03=constant +hwmon_in.int_cons_0x0057_0x03=3630 +hwmon_in.mode_0x0057_0x05=constant +hwmon_in.int_cons_0x0057_0x05=2970 +hwmon_in.mode_0x0057_0x08=constant +hwmon_in.int_cons_0x0057_0x08=3300 + +# vol88 +hwmon_in.mode_0x0058_0x00=config +hwmon_in.int_cons_0x0058_0x00=0 +hwmon_in.src_0x0058_0x00=file +hwmon_in.frmt_0x0058_0x00=buf +hwmon_in.fpath_0x0058_0x00=/sys/bus/i2c/devices/70-005f/hwmon/ +hwmon_in.addr_0x0058_0x00=0 +hwmon_in.len_0x0058_0x00=8 +hwmon_in.bit_offset_0x0058_0x00= +hwmon_in.str_cons_0x0058_0x00=in4_input +hwmon_in.mode_0x0058_0x01=str_constant +hwmon_in.str_cons_0x0058_0x01=VDD_P1V8_FR_S5DM +hwmon_in.mode_0x0058_0x02=str_constant +hwmon_in.str_cons_0x0058_0x02=ucd9081 +hwmon_in.mode_0x0058_0x03=constant +hwmon_in.int_cons_0x0058_0x03=1980 +hwmon_in.mode_0x0058_0x05=constant +hwmon_in.int_cons_0x0058_0x05=1620 +hwmon_in.mode_0x0058_0x08=constant +hwmon_in.int_cons_0x0058_0x08=1800 + +# vol89 +hwmon_in.mode_0x0059_0x00=config +hwmon_in.int_cons_0x0059_0x00=0 +hwmon_in.src_0x0059_0x00=file +hwmon_in.frmt_0x0059_0x00=buf +hwmon_in.fpath_0x0059_0x00=/sys/bus/i2c/devices/70-005f/hwmon/ +hwmon_in.addr_0x0059_0x00=0 +hwmon_in.len_0x0059_0x00=8 +hwmon_in.bit_offset_0x0059_0x00= +hwmon_in.str_cons_0x0059_0x00=in5_input +hwmon_in.mode_0x0059_0x01=str_constant +hwmon_in.str_cons_0x0059_0x01=VDD_P0V75_FR_MISC_S5DM +hwmon_in.mode_0x0059_0x02=str_constant +hwmon_in.str_cons_0x0059_0x02=ucd9081 +hwmon_in.mode_0x0059_0x03=constant +hwmon_in.int_cons_0x0059_0x03=825 +hwmon_in.mode_0x0059_0x05=constant +hwmon_in.int_cons_0x0059_0x05=675 +hwmon_in.mode_0x0059_0x08=constant +hwmon_in.int_cons_0x0059_0x08=750 + +# vol90 +hwmon_in.mode_0x005a_0x00=config +hwmon_in.int_cons_0x005a_0x00=0 +hwmon_in.src_0x005a_0x00=file +hwmon_in.frmt_0x005a_0x00=buf +hwmon_in.fpath_0x005a_0x00=/sys/bus/i2c/devices/70-005f/hwmon/ +hwmon_in.addr_0x005a_0x00=0 +hwmon_in.len_0x005a_0x00=8 +hwmon_in.bit_offset_0x005a_0x00= +hwmon_in.str_cons_0x005a_0x00=in6_input +hwmon_in.mode_0x005a_0x01=str_constant +hwmon_in.str_cons_0x005a_0x01=VDD_P3V3_FR_S0DM +hwmon_in.mode_0x005a_0x02=str_constant +hwmon_in.str_cons_0x005a_0x02=ucd9081 +hwmon_in.mode_0x005a_0x03=constant +hwmon_in.int_cons_0x005a_0x03=3630 +hwmon_in.mode_0x005a_0x05=constant +hwmon_in.int_cons_0x005a_0x05=2970 +hwmon_in.mode_0x005a_0x08=constant +hwmon_in.int_cons_0x005a_0x08=3300 + +# vol91 +hwmon_in.mode_0x005b_0x00=config +hwmon_in.int_cons_0x005b_0x00=0 +hwmon_in.src_0x005b_0x00=file +hwmon_in.frmt_0x005b_0x00=buf +hwmon_in.fpath_0x005b_0x00=/sys/bus/i2c/devices/70-005f/hwmon/ +hwmon_in.addr_0x005b_0x00=0 +hwmon_in.len_0x005b_0x00=8 +hwmon_in.bit_offset_0x005b_0x00= +hwmon_in.str_cons_0x005b_0x00=in7_input +hwmon_in.mode_0x005b_0x01=str_constant +hwmon_in.str_cons_0x005b_0x01=VDD_P1V8_FR_S0DM +hwmon_in.mode_0x005b_0x02=str_constant +hwmon_in.str_cons_0x005b_0x02=ucd9081 +hwmon_in.mode_0x005b_0x03=constant +hwmon_in.int_cons_0x005b_0x03=1980 +hwmon_in.mode_0x005b_0x05=constant +hwmon_in.int_cons_0x005b_0x05=1620 +hwmon_in.mode_0x005b_0x08=constant +hwmon_in.int_cons_0x005b_0x08=1800 + +# vol92 +hwmon_in.mode_0x005c_0x00=config +hwmon_in.int_cons_0x005c_0x00=0 +hwmon_in.src_0x005c_0x00=file +hwmon_in.frmt_0x005c_0x00=buf +hwmon_in.fpath_0x005c_0x00=/sys/bus/i2c/devices/70-005f/hwmon/ +hwmon_in.addr_0x005c_0x00=0 +hwmon_in.len_0x005c_0x00=8 +hwmon_in.bit_offset_0x005c_0x00= +hwmon_in.str_cons_0x005c_0x00=in8_input +hwmon_in.mode_0x005c_0x01=str_constant +hwmon_in.str_cons_0x005c_0x01=VDD_P1V1_NIC_AVDDH +hwmon_in.mode_0x005c_0x02=str_constant +hwmon_in.str_cons_0x005c_0x02=ucd9081 +hwmon_in.mode_0x005c_0x03=constant +hwmon_in.int_cons_0x005c_0x03=1200 +hwmon_in.mode_0x005c_0x05=constant +hwmon_in.int_cons_0x005c_0x05=990 +hwmon_in.mode_0x005c_0x08=constant +hwmon_in.int_cons_0x005c_0x08=1100 + +# vol93 +hwmon_in.mode_0x005d_0x00=config +hwmon_in.int_cons_0x005d_0x00=0 +hwmon_in.src_0x005d_0x00=file +hwmon_in.frmt_0x005d_0x00=buf +hwmon_in.fpath_0x005d_0x00=/sys/bus/i2c/devices/70-005f/hwmon/ +hwmon_in.addr_0x005d_0x00=0 +hwmon_in.len_0x005d_0x00=8 +hwmon_in.bit_offset_0x005d_0x00= +hwmon_in.str_cons_0x005d_0x00=in9_input +hwmon_in.mode_0x005d_0x01=str_constant +hwmon_in.str_cons_0x005d_0x01=VDD_P0V9_NIC_AVDD_PCIE +hwmon_in.mode_0x005d_0x02=str_constant +hwmon_in.str_cons_0x005d_0x02=ucd9081 +hwmon_in.mode_0x005d_0x03=constant +hwmon_in.int_cons_0x005d_0x03=990 +hwmon_in.mode_0x005d_0x05=constant +hwmon_in.int_cons_0x005d_0x05=810 +hwmon_in.mode_0x005d_0x08=constant +hwmon_in.int_cons_0x005d_0x08=900 + +# vol94 +hwmon_in.mode_0x005e_0x00=config +hwmon_in.int_cons_0x005e_0x00=0 +hwmon_in.src_0x005e_0x00=file +hwmon_in.frmt_0x005e_0x00=buf +hwmon_in.fpath_0x005e_0x00=/sys/bus/i2c/devices/70-005f/hwmon/ +hwmon_in.addr_0x005e_0x00=0 +hwmon_in.len_0x005e_0x00=8 +hwmon_in.bit_offset_0x005e_0x00= +hwmon_in.str_cons_0x005e_0x00=in10_input +hwmon_in.mode_0x005e_0x01=str_constant +hwmon_in.str_cons_0x005e_0x01=VDD_P0V9_NIC_AVDD_ETH +hwmon_in.mode_0x005e_0x02=str_constant +hwmon_in.str_cons_0x005e_0x02=ucd9081 +hwmon_in.mode_0x005e_0x03=constant +hwmon_in.int_cons_0x005e_0x03=990 +hwmon_in.mode_0x005e_0x05=constant +hwmon_in.int_cons_0x005e_0x05=810 +hwmon_in.mode_0x005e_0x08=constant +hwmon_in.int_cons_0x005e_0x08=900 + +# vol95 +hwmon_in.mode_0x005f_0x00=config +hwmon_in.int_cons_0x005f_0x00=0 +hwmon_in.src_0x005f_0x00=file +hwmon_in.frmt_0x005f_0x00=buf +hwmon_in.fpath_0x005f_0x00=/sys/bus/i2c/devices/70-005f/hwmon/ +hwmon_in.addr_0x005f_0x00=0 +hwmon_in.len_0x005f_0x00=8 +hwmon_in.bit_offset_0x005f_0x00= +hwmon_in.str_cons_0x005f_0x00=in11_input +hwmon_in.mode_0x005f_0x01=str_constant +hwmon_in.str_cons_0x005f_0x01=VDD_P0V8_NIC_VDD +hwmon_in.mode_0x005f_0x02=str_constant +hwmon_in.str_cons_0x005f_0x02=ucd9081 +hwmon_in.mode_0x005f_0x03=constant +hwmon_in.int_cons_0x005f_0x03=880 +hwmon_in.mode_0x005f_0x05=constant +hwmon_in.int_cons_0x005f_0x05=720 +hwmon_in.mode_0x005f_0x08=constant +hwmon_in.int_cons_0x005f_0x08=800 + +# vol96 +hwmon_in.mode_0x0060_0x00=config +hwmon_in.int_cons_0x0060_0x00=0 +hwmon_in.src_0x0060_0x00=file +hwmon_in.frmt_0x0060_0x00=buf +hwmon_in.fpath_0x0060_0x00=/sys/bus/i2c/devices/70-005f/hwmon/ +hwmon_in.addr_0x0060_0x00=0 +hwmon_in.len_0x0060_0x00=8 +hwmon_in.bit_offset_0x0060_0x00= +hwmon_in.str_cons_0x0060_0x00=in12_input +hwmon_in.mode_0x0060_0x01=str_constant +hwmon_in.str_cons_0x0060_0x01=VDD_VR_P1V1_FR_MEM_S3DM +hwmon_in.mode_0x0060_0x02=str_constant +hwmon_in.str_cons_0x0060_0x02=ucd9081 +hwmon_in.mode_0x0060_0x03=constant +hwmon_in.int_cons_0x0060_0x03=1210 +hwmon_in.mode_0x0060_0x05=constant +hwmon_in.int_cons_0x0060_0x05=990 +hwmon_in.mode_0x0060_0x08=constant +hwmon_in.int_cons_0x0060_0x08=1100 + +# vol97 +hwmon_in.mode_0x0061_0x00=config +hwmon_in.int_cons_0x0061_0x00=0 +hwmon_in.src_0x0061_0x00=file +hwmon_in.frmt_0x0061_0x00=buf +hwmon_in.fpath_0x0061_0x00=/sys/bus/i2c/devices/70-005f/hwmon/ +hwmon_in.addr_0x0061_0x00=0 +hwmon_in.len_0x0061_0x00=8 +hwmon_in.bit_offset_0x0061_0x00= +hwmon_in.str_cons_0x0061_0x00=in13_input +hwmon_in.mode_0x0061_0x01=str_constant +hwmon_in.str_cons_0x0061_0x01=VDD_VR_P0V8_FR_MISC_S0DM +hwmon_in.mode_0x0061_0x02=str_constant +hwmon_in.str_cons_0x0061_0x02=ucd9081 +hwmon_in.mode_0x0061_0x03=constant +hwmon_in.int_cons_0x0061_0x03=1200 +hwmon_in.mode_0x0061_0x05=constant +hwmon_in.int_cons_0x0061_0x05=600 +hwmon_in.mode_0x0061_0x08=constant +hwmon_in.int_cons_0x0061_0x08=800 + +# vol98 +hwmon_in.mode_0x0062_0x00=config +hwmon_in.int_cons_0x0062_0x00=0 +hwmon_in.src_0x0062_0x00=file +hwmon_in.frmt_0x0062_0x00=buf +hwmon_in.fpath_0x0062_0x00=/sys/bus/i2c/devices/70-005f/hwmon/ +hwmon_in.addr_0x0062_0x00=0 +hwmon_in.len_0x0062_0x00=8 +hwmon_in.bit_offset_0x0062_0x00= +hwmon_in.str_cons_0x0062_0x00=in14_input +hwmon_in.mode_0x0062_0x01=str_constant +hwmon_in.str_cons_0x0062_0x01=VDD_VR_P0V8_FR_SOC +hwmon_in.mode_0x0062_0x02=str_constant +hwmon_in.str_cons_0x0062_0x02=ucd9081 +hwmon_in.mode_0x0062_0x03=constant +hwmon_in.int_cons_0x0062_0x03=1200 +hwmon_in.mode_0x0062_0x05=constant +hwmon_in.int_cons_0x0062_0x05=600 +hwmon_in.mode_0x0062_0x08=constant +hwmon_in.int_cons_0x0062_0x08=800 + +# vol99 +hwmon_in.mode_0x0063_0x00=config +hwmon_in.int_cons_0x0063_0x00=0 +hwmon_in.src_0x0063_0x00=file +hwmon_in.frmt_0x0063_0x00=buf +hwmon_in.fpath_0x0063_0x00=/sys/bus/i2c/devices/70-005f/hwmon/ +hwmon_in.addr_0x0063_0x00=0 +hwmon_in.len_0x0063_0x00=8 +hwmon_in.bit_offset_0x0063_0x00= +hwmon_in.str_cons_0x0063_0x00=in15_input +hwmon_in.mode_0x0063_0x01=str_constant +hwmon_in.str_cons_0x0063_0x01=VDD_VR_P0V8_FR_CORE +hwmon_in.mode_0x0063_0x02=str_constant +hwmon_in.str_cons_0x0063_0x02=ucd9081 +hwmon_in.mode_0x0063_0x03=constant +hwmon_in.int_cons_0x0063_0x03=1550 +hwmon_in.mode_0x0063_0x05=constant +hwmon_in.int_cons_0x0063_0x05=600 +hwmon_in.mode_0x0063_0x08=constant +hwmon_in.int_cons_0x0063_0x08=800 + +# vol100 +hwmon_in.mode_0x0064_0x00=config +hwmon_in.int_cons_0x0064_0x00=0 +hwmon_in.src_0x0064_0x00=file +hwmon_in.frmt_0x0064_0x00=buf +hwmon_in.fpath_0x0064_0x00=/sys/bus/i2c/devices/70-005f/hwmon/ +hwmon_in.addr_0x0064_0x00=0 +hwmon_in.len_0x0064_0x00=8 +hwmon_in.bit_offset_0x0064_0x00= +hwmon_in.str_cons_0x0064_0x00=in16_input +hwmon_in.mode_0x0064_0x01=str_constant +hwmon_in.str_cons_0x0064_0x01=VCC_P1V8_STBY +hwmon_in.mode_0x0064_0x02=str_constant +hwmon_in.str_cons_0x0064_0x02=ucd9081 +hwmon_in.mode_0x0064_0x03=constant +hwmon_in.int_cons_0x0064_0x03=1980 +hwmon_in.mode_0x0064_0x05=constant +hwmon_in.int_cons_0x0064_0x05=1620 +hwmon_in.mode_0x0064_0x08=constant +hwmon_in.int_cons_0x0064_0x08=1800 + +# vol101 +hwmon_in.mode_0x0065_0x00=config +hwmon_in.int_cons_0x0065_0x00=0 +hwmon_in.src_0x0065_0x00=file +hwmon_in.frmt_0x0065_0x00=buf +hwmon_in.fpath_0x0065_0x00=/sys/bus/i2c/devices/70-0072/hwmon/ +hwmon_in.addr_0x0065_0x00=0 +hwmon_in.len_0x0065_0x00=8 +hwmon_in.bit_offset_0x0065_0x00= +hwmon_in.str_cons_0x0065_0x00=in3_input +hwmon_in.mode_0x0065_0x01=str_constant +hwmon_in.str_cons_0x0065_0x01=VDD_P0V8_FR_CORE +hwmon_in.mode_0x0065_0x02=str_constant +hwmon_in.str_cons_0x0065_0x02=ucd9081 +hwmon_in.mode_0x0065_0x03=constant +hwmon_in.int_cons_0x0065_0x03=1550 +hwmon_in.mode_0x0065_0x05=constant +hwmon_in.int_cons_0x0065_0x05=600 +hwmon_in.mode_0x0065_0x08=constant +hwmon_in.int_cons_0x0065_0x08=800 + +# vol102 +hwmon_in.mode_0x0066_0x00=config +hwmon_in.int_cons_0x0066_0x00=0 +hwmon_in.src_0x0066_0x00=file +hwmon_in.frmt_0x0066_0x00=buf +hwmon_in.fpath_0x0066_0x00=/sys/bus/i2c/devices/70-0072/hwmon/ +hwmon_in.addr_0x0066_0x00=0 +hwmon_in.len_0x0066_0x00=8 +hwmon_in.bit_offset_0x0066_0x00= +hwmon_in.str_cons_0x0066_0x00=in4_input +hwmon_in.mode_0x0066_0x01=str_constant +hwmon_in.str_cons_0x0066_0x01=VDD_P0V8_FR_SOC +hwmon_in.mode_0x0066_0x02=str_constant +hwmon_in.str_cons_0x0066_0x02=ucd9081 +hwmon_in.mode_0x0066_0x03=constant +hwmon_in.int_cons_0x0066_0x03=1550 +hwmon_in.mode_0x0066_0x05=constant +hwmon_in.int_cons_0x0066_0x05=600 +hwmon_in.mode_0x0066_0x08=constant +hwmon_in.int_cons_0x0066_0x08=800 + +# vol103 +hwmon_in.mode_0x0067_0x00=config +hwmon_in.int_cons_0x0067_0x00=0 +hwmon_in.src_0x0067_0x00=file +hwmon_in.frmt_0x0067_0x00=buf +hwmon_in.fpath_0x0067_0x00=/sys/bus/i2c/devices/70-0074/hwmon/ +hwmon_in.addr_0x0067_0x00=0 +hwmon_in.len_0x0067_0x00=8 +hwmon_in.bit_offset_0x0067_0x00= +hwmon_in.str_cons_0x0067_0x00=in3_input +hwmon_in.mode_0x0067_0x01=str_constant +hwmon_in.str_cons_0x0067_0x01=VDD_P0V8_FR_MISC_S0DM +hwmon_in.mode_0x0067_0x02=str_constant +hwmon_in.str_cons_0x0067_0x02=ucd9081 +hwmon_in.mode_0x0067_0x03=constant +hwmon_in.int_cons_0x0067_0x03=1550 +hwmon_in.mode_0x0067_0x05=constant +hwmon_in.int_cons_0x0067_0x05=600 +hwmon_in.mode_0x0067_0x08=constant +hwmon_in.int_cons_0x0067_0x08=800 + +# vol104 +hwmon_in.mode_0x0068_0x00=config +hwmon_in.int_cons_0x0068_0x00=0 +hwmon_in.src_0x0068_0x00=file +hwmon_in.frmt_0x0068_0x00=buf +hwmon_in.fpath_0x0068_0x00=/sys/bus/i2c/devices/70-0074/hwmon/ +hwmon_in.addr_0x0068_0x00=0 +hwmon_in.len_0x0068_0x00=8 +hwmon_in.bit_offset_0x0068_0x00= +hwmon_in.str_cons_0x0068_0x00=in4_input +hwmon_in.mode_0x0068_0x01=str_constant +hwmon_in.str_cons_0x0068_0x01=VDD_P1V1_FR_MEM_S3DM +hwmon_in.mode_0x0068_0x02=str_constant +hwmon_in.str_cons_0x0068_0x02=ucd9081 +hwmon_in.mode_0x0068_0x03=constant +hwmon_in.int_cons_0x0068_0x03=1210 +hwmon_in.mode_0x0068_0x05=constant +hwmon_in.int_cons_0x0068_0x05=990 +hwmon_in.mode_0x0068_0x08=constant +hwmon_in.int_cons_0x0068_0x08=1100 + +# vol105 +hwmon_in.mode_0x0069_0x00=config +hwmon_in.int_cons_0x0069_0x00=3 +hwmon_in.src_0x0069_0x00=file +hwmon_in.frmt_0x0069_0x00=buf +hwmon_in.fpath_0x0069_0x00=/sys/bus/i2c/devices/13-0048/hwmon/ +hwmon_in.addr_0x0069_0x00=0 +hwmon_in.len_0x0069_0x00=8 +hwmon_in.bit_offset_0x0069_0x00= +hwmon_in.str_cons_0x0069_0x00=in0_input +hwmon_in.mode_0x0069_0x01=str_constant +hwmon_in.str_cons_0x0069_0x01=IO_OSFP_VDD3.3V_A1 +hwmon_in.mode_0x0069_0x02=str_constant +hwmon_in.str_cons_0x0069_0x02=ADS7848E +hwmon_in.mode_0x0069_0x03=constant +hwmon_in.int_cons_0x0069_0x03=3630 +hwmon_in.mode_0x0069_0x05=constant +hwmon_in.int_cons_0x0069_0x05=2970 +hwmon_in.mode_0x0069_0x08=constant +hwmon_in.int_cons_0x0069_0x08=3300 +hwmon_in.int_extra1_0x0069_0x00=1833 + +# vol106 +hwmon_in.mode_0x006a_0x00=config +hwmon_in.int_cons_0x006a_0x00=3 +hwmon_in.src_0x006a_0x00=file +hwmon_in.frmt_0x006a_0x00=buf +hwmon_in.fpath_0x006a_0x00=/sys/bus/i2c/devices/13-0048/hwmon/ +hwmon_in.addr_0x006a_0x00=0 +hwmon_in.len_0x006a_0x00=8 +hwmon_in.bit_offset_0x006a_0x00= +hwmon_in.str_cons_0x006a_0x00=in1_input +hwmon_in.mode_0x006a_0x01=str_constant +hwmon_in.str_cons_0x006a_0x01=IO_OSFP_VDD3.3V_A2 +hwmon_in.mode_0x006a_0x02=str_constant +hwmon_in.str_cons_0x006a_0x02=ADS7848E +hwmon_in.mode_0x006a_0x03=constant +hwmon_in.int_cons_0x006a_0x03=3630 +hwmon_in.mode_0x006a_0x05=constant +hwmon_in.int_cons_0x006a_0x05=2970 +hwmon_in.mode_0x006a_0x08=constant +hwmon_in.int_cons_0x006a_0x08=3300 +hwmon_in.int_extra1_0x006a_0x00=1833 + +# vol107 +hwmon_in.mode_0x006b_0x00=config +hwmon_in.int_cons_0x006b_0x00=3 +hwmon_in.src_0x006b_0x00=file +hwmon_in.frmt_0x006b_0x00=buf +hwmon_in.fpath_0x006b_0x00=/sys/bus/i2c/devices/13-0048/hwmon/ +hwmon_in.addr_0x006b_0x00=0 +hwmon_in.len_0x006b_0x00=8 +hwmon_in.bit_offset_0x006b_0x00= +hwmon_in.str_cons_0x006b_0x00=in2_input +hwmon_in.mode_0x006b_0x01=str_constant +hwmon_in.str_cons_0x006b_0x01=IO_VDD3.3V_FPGA +hwmon_in.mode_0x006b_0x02=str_constant +hwmon_in.str_cons_0x006b_0x02=ADS7848E +hwmon_in.mode_0x006b_0x03=constant +hwmon_in.int_cons_0x006b_0x03=3630 +hwmon_in.mode_0x006b_0x05=constant +hwmon_in.int_cons_0x006b_0x05=2970 +hwmon_in.mode_0x006b_0x08=constant +hwmon_in.int_cons_0x006b_0x08=3300 +hwmon_in.int_extra1_0x006b_0x00=1833 + +# vol108 +hwmon_in.mode_0x006c_0x00=config +hwmon_in.int_cons_0x006c_0x00=0 +hwmon_in.src_0x006c_0x00=file +hwmon_in.frmt_0x006c_0x00=buf +hwmon_in.fpath_0x006c_0x00=/sys/bus/i2c/devices/13-0048/hwmon/ +hwmon_in.addr_0x006c_0x00=0 +hwmon_in.len_0x006c_0x00=8 +hwmon_in.bit_offset_0x006c_0x00= +hwmon_in.str_cons_0x006c_0x00=in3_input +hwmon_in.mode_0x006c_0x01=str_constant +hwmon_in.str_cons_0x006c_0x01=IO_VDD1.8V_FPGA +hwmon_in.mode_0x006c_0x02=str_constant +hwmon_in.str_cons_0x006c_0x02=ADS7848E +hwmon_in.mode_0x006c_0x03=constant +hwmon_in.int_cons_0x006c_0x03=1980 +hwmon_in.mode_0x006c_0x05=constant +hwmon_in.int_cons_0x006c_0x05=1620 +hwmon_in.mode_0x006c_0x08=constant +hwmon_in.int_cons_0x006c_0x08=1800 + +# vol109 +hwmon_in.mode_0x006d_0x00=config +hwmon_in.int_cons_0x006d_0x00=0 +hwmon_in.src_0x006d_0x00=file +hwmon_in.frmt_0x006d_0x00=buf +hwmon_in.fpath_0x006d_0x00=/sys/bus/i2c/devices/13-0048/hwmon/ +hwmon_in.addr_0x006d_0x00=0 +hwmon_in.len_0x006d_0x00=8 +hwmon_in.bit_offset_0x006d_0x00= +hwmon_in.str_cons_0x006d_0x00=in4_input +hwmon_in.mode_0x006d_0x01=str_constant +hwmon_in.str_cons_0x006d_0x01=IO_VDD1.2V_FPGA +hwmon_in.mode_0x006d_0x02=str_constant +hwmon_in.str_cons_0x006d_0x02=ADS7848E +hwmon_in.mode_0x006d_0x03=constant +hwmon_in.int_cons_0x006d_0x03=1310 +hwmon_in.mode_0x006d_0x05=constant +hwmon_in.int_cons_0x006d_0x05=1080 +hwmon_in.mode_0x006d_0x08=constant +hwmon_in.int_cons_0x006d_0x08=1200 + +# vol110 +hwmon_in.mode_0x006e_0x00=config +hwmon_in.int_cons_0x006e_0x00=0 +hwmon_in.src_0x006e_0x00=file +hwmon_in.frmt_0x006e_0x00=buf +hwmon_in.fpath_0x006e_0x00=/sys/bus/i2c/devices/13-0048/hwmon/ +hwmon_in.addr_0x006e_0x00=0 +hwmon_in.len_0x006e_0x00=8 +hwmon_in.bit_offset_0x006e_0x00= +hwmon_in.str_cons_0x006e_0x00=in5_input +hwmon_in.mode_0x006e_0x01=str_constant +hwmon_in.str_cons_0x006e_0x01=IO_VDD1.0V_FPGA +hwmon_in.mode_0x006e_0x02=str_constant +hwmon_in.str_cons_0x006e_0x02=ADS7848E +hwmon_in.mode_0x006e_0x03=constant +hwmon_in.int_cons_0x006e_0x03=1090 +hwmon_in.mode_0x006e_0x05=constant +hwmon_in.int_cons_0x006e_0x05=900 +hwmon_in.mode_0x006e_0x08=constant +hwmon_in.int_cons_0x006e_0x08=1000 + +# vol111 +hwmon_in.mode_0x006f_0x00=config +hwmon_in.int_cons_0x006f_0x00=3 +hwmon_in.src_0x006f_0x00=file +hwmon_in.frmt_0x006f_0x00=buf +hwmon_in.fpath_0x006f_0x00=/sys/bus/i2c/devices/13-0048/hwmon/ +hwmon_in.addr_0x006f_0x00=0 +hwmon_in.len_0x006f_0x00=8 +hwmon_in.bit_offset_0x006f_0x00= +hwmon_in.str_cons_0x006f_0x00=in6_input +hwmon_in.mode_0x006f_0x01=str_constant +hwmon_in.str_cons_0x006f_0x01=IO_VDD3.3V +hwmon_in.mode_0x006f_0x02=str_constant +hwmon_in.str_cons_0x006f_0x02=ADS7848E +hwmon_in.mode_0x006f_0x03=constant +hwmon_in.int_cons_0x006f_0x03=3630 +hwmon_in.mode_0x006f_0x05=constant +hwmon_in.int_cons_0x006f_0x05=2970 +hwmon_in.mode_0x006f_0x08=constant +hwmon_in.int_cons_0x006f_0x08=3300 +hwmon_in.int_extra1_0x006f_0x00=1833 + +# vol112 +hwmon_in.mode_0x0070_0x00=config +hwmon_in.int_cons_0x0070_0x00=3 +hwmon_in.src_0x0070_0x00=file +hwmon_in.frmt_0x0070_0x00=buf +hwmon_in.fpath_0x0070_0x00=/sys/bus/i2c/devices/14-0048/hwmon/ +hwmon_in.addr_0x0070_0x00=0 +hwmon_in.len_0x0070_0x00=8 +hwmon_in.bit_offset_0x0070_0x00= +hwmon_in.str_cons_0x0070_0x00=in0_input +hwmon_in.mode_0x0070_0x01=str_constant +hwmon_in.str_cons_0x0070_0x01=IO_VDD3.3V_NIC +hwmon_in.mode_0x0070_0x02=str_constant +hwmon_in.str_cons_0x0070_0x02=ADS7848E +hwmon_in.mode_0x0070_0x03=constant +hwmon_in.int_cons_0x0070_0x03=3630 +hwmon_in.mode_0x0070_0x05=constant +hwmon_in.int_cons_0x0070_0x05=2970 +hwmon_in.mode_0x0070_0x08=constant +hwmon_in.int_cons_0x0070_0x08=3300 +hwmon_in.int_extra1_0x0070_0x00=1833 + +# vol113 +hwmon_in.mode_0x0071_0x00=config +hwmon_in.int_cons_0x0071_0x00=0 +hwmon_in.src_0x0071_0x00=file +hwmon_in.frmt_0x0071_0x00=buf +hwmon_in.fpath_0x0071_0x00=/sys/bus/i2c/devices/14-0048/hwmon/ +hwmon_in.addr_0x0071_0x00=0 +hwmon_in.len_0x0071_0x00=8 +hwmon_in.bit_offset_0x0071_0x00= +hwmon_in.str_cons_0x0071_0x00=in1_input +hwmon_in.mode_0x0071_0x01=str_constant +hwmon_in.str_cons_0x0071_0x01=IO_VDD1.8V +hwmon_in.mode_0x0071_0x02=str_constant +hwmon_in.str_cons_0x0071_0x02=ADS7848E +hwmon_in.mode_0x0071_0x03=constant +hwmon_in.int_cons_0x0071_0x03=1980 +hwmon_in.mode_0x0071_0x05=constant +hwmon_in.int_cons_0x0071_0x05=1620 +hwmon_in.mode_0x0071_0x08=constant +hwmon_in.int_cons_0x0071_0x08=1800 + +# vol114 +hwmon_in.mode_0x0072_0x00=config +hwmon_in.int_cons_0x0072_0x00=0 +hwmon_in.src_0x0072_0x00=file +hwmon_in.frmt_0x0072_0x00=buf +hwmon_in.fpath_0x0072_0x00=/sys/bus/i2c/devices/14-0048/hwmon/ +hwmon_in.addr_0x0072_0x00=0 +hwmon_in.len_0x0072_0x00=8 +hwmon_in.bit_offset_0x0072_0x00= +hwmon_in.str_cons_0x0072_0x00=in2_input +hwmon_in.mode_0x0072_0x01=str_constant +hwmon_in.str_cons_0x0072_0x01=IO_VDD0.85V +hwmon_in.mode_0x0072_0x02=str_constant +hwmon_in.str_cons_0x0072_0x02=ADS7848E +hwmon_in.mode_0x0072_0x03=constant +hwmon_in.int_cons_0x0072_0x03=930 +hwmon_in.mode_0x0072_0x05=constant +hwmon_in.int_cons_0x0072_0x05=770 +hwmon_in.mode_0x0072_0x08=constant +hwmon_in.int_cons_0x0072_0x08=850 + +# vol115 +hwmon_in.mode_0x0073_0x00=config +hwmon_in.int_cons_0x0073_0x00=0 +hwmon_in.src_0x0073_0x00=file +hwmon_in.frmt_0x0073_0x00=buf +hwmon_in.fpath_0x0073_0x00=/sys/bus/i2c/devices/14-0048/hwmon/ +hwmon_in.addr_0x0073_0x00=0 +hwmon_in.len_0x0073_0x00=8 +hwmon_in.bit_offset_0x0073_0x00= +hwmon_in.str_cons_0x0073_0x00=in3_input +hwmon_in.mode_0x0073_0x01=str_constant +hwmon_in.str_cons_0x0073_0x01=IO_VDD2.3V +hwmon_in.mode_0x0073_0x02=str_constant +hwmon_in.str_cons_0x0073_0x02=ADS7848E +hwmon_in.mode_0x0073_0x03=constant +hwmon_in.int_cons_0x0073_0x03=2510 +hwmon_in.mode_0x0073_0x05=constant +hwmon_in.int_cons_0x0073_0x05=2070 +hwmon_in.mode_0x0073_0x08=constant +hwmon_in.int_cons_0x0073_0x08=2300 + +# vol116 +hwmon_in.mode_0x0074_0x00=config +hwmon_in.int_cons_0x0074_0x00=0 +hwmon_in.src_0x0074_0x00=file +hwmon_in.frmt_0x0074_0x00=buf +hwmon_in.fpath_0x0074_0x00=/sys/bus/i2c/devices/14-0048/hwmon/ +hwmon_in.addr_0x0074_0x00=0 +hwmon_in.len_0x0074_0x00=8 +hwmon_in.bit_offset_0x0074_0x00= +hwmon_in.str_cons_0x0074_0x00=in4_input +hwmon_in.mode_0x0074_0x01=str_constant +hwmon_in.str_cons_0x0074_0x01=IO_VDD0.9V +hwmon_in.mode_0x0074_0x02=str_constant +hwmon_in.str_cons_0x0074_0x02=ADS7848E +hwmon_in.mode_0x0074_0x03=constant +hwmon_in.int_cons_0x0074_0x03=980 +hwmon_in.mode_0x0074_0x05=constant +hwmon_in.int_cons_0x0074_0x05=810 +hwmon_in.mode_0x0074_0x08=constant +hwmon_in.int_cons_0x0074_0x08=900 + +# vol117 +hwmon_in.mode_0x0075_0x00=config +hwmon_in.int_cons_0x0075_0x00=0 +hwmon_in.src_0x0075_0x00=file +hwmon_in.frmt_0x0075_0x00=buf +hwmon_in.fpath_0x0075_0x00=/sys/bus/i2c/devices/14-0048/hwmon/ +hwmon_in.addr_0x0075_0x00=0 +hwmon_in.len_0x0075_0x00=8 +hwmon_in.bit_offset_0x0075_0x00= +hwmon_in.str_cons_0x0075_0x00=in5_input +hwmon_in.mode_0x0075_0x01=str_constant +hwmon_in.str_cons_0x0075_0x01=IO_VDD0.65V +hwmon_in.mode_0x0075_0x02=str_constant +hwmon_in.str_cons_0x0075_0x02=ADS7848E +hwmon_in.mode_0x0075_0x03=constant +hwmon_in.int_cons_0x0075_0x03=710 +hwmon_in.mode_0x0075_0x05=constant +hwmon_in.int_cons_0x0075_0x05=590 +hwmon_in.mode_0x0075_0x08=constant +hwmon_in.int_cons_0x0075_0x08=650 + +# vol118 +monitor_flag_hwmon_in.mode_0x0076_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0076_0x00=0 +hwmon_in.mode_0x0076_0x00=config +hwmon_in.int_cons_0x0076_0x00=0 +hwmon_in.src_0x0076_0x00=file +hwmon_in.frmt_0x0076_0x00=buf +hwmon_in.fpath_0x0076_0x00=/sys/bus/i2c/devices/14-0048/hwmon/ +hwmon_in.addr_0x0076_0x00=0 +hwmon_in.len_0x0076_0x00=8 +hwmon_in.bit_offset_0x0076_0x00= +hwmon_in.str_cons_0x0076_0x00=in6_input +hwmon_in.mode_0x0076_0x01=str_constant +hwmon_in.str_cons_0x0076_0x01=IO_VDD0.75V +hwmon_in.mode_0x0076_0x02=str_constant +hwmon_in.str_cons_0x0076_0x02=ADS7848E +hwmon_in.mode_0x0076_0x03=constant +hwmon_in.int_cons_0x0076_0x03=820 +hwmon_in.mode_0x0076_0x05=constant +hwmon_in.int_cons_0x0076_0x05=680 +hwmon_in.mode_0x0076_0x08=constant +hwmon_in.int_cons_0x0076_0x08=750 + +# vol119 +monitor_flag_hwmon_in.mode_0x0077_0x00=constant +monitor_flag_hwmon_in.int_cons_0x0077_0x00=0 +hwmon_in.mode_0x0077_0x00=config +hwmon_in.int_cons_0x0077_0x00=0 +hwmon_in.src_0x0077_0x00=file +hwmon_in.frmt_0x0077_0x00=buf +hwmon_in.fpath_0x0077_0x00=/sys/bus/i2c/devices/14-0048/hwmon/ +hwmon_in.addr_0x0077_0x00=0 +hwmon_in.len_0x0077_0x00=8 +hwmon_in.bit_offset_0x0077_0x00= +hwmon_in.str_cons_0x0077_0x00=in7_input +hwmon_in.mode_0x0077_0x01=str_constant +hwmon_in.str_cons_0x0077_0x01=IO_VDD1.2V +hwmon_in.mode_0x0077_0x02=str_constant +hwmon_in.str_cons_0x0077_0x02=ADS7848E +hwmon_in.mode_0x0077_0x03=constant +hwmon_in.int_cons_0x0077_0x03=1310 +hwmon_in.mode_0x0077_0x05=constant +hwmon_in.int_cons_0x0077_0x05=1080 +hwmon_in.mode_0x0077_0x08=constant +hwmon_in.int_cons_0x0077_0x08=1200 + +# vol120 +hwmon_in.mode_0x0078_0x00=config +hwmon_in.int_cons_0x0078_0x00=0 +hwmon_in.src_0x0078_0x00=file +hwmon_in.frmt_0x0078_0x00=buf +hwmon_in.fpath_0x0078_0x00=/sys/bus/i2c/devices/57-0040/hwmon/ +hwmon_in.addr_0x0078_0x00=0 +hwmon_in.len_0x0078_0x00=8 +hwmon_in.bit_offset_0x0078_0x00=0 +hwmon_in.str_cons_0x0078_0x00=in1_input +hwmon_in.mode_0x0078_0x01=str_constant +hwmon_in.str_cons_0x0078_0x01=VCC54V_OUT_1_R_V +hwmon_in.mode_0x0078_0x02=str_constant +hwmon_in.str_cons_0x0078_0x02=INA238 +hwmon_in.mode_0x0078_0x03=str_constant +hwmon_in.str_cons_0x0078_0x03=60000 +hwmon_in.mode_0x0078_0x05=str_constant +hwmon_in.str_cons_0x0078_0x05=40000 +hwmon_in.mode_0x0078_0x08=constant +hwmon_in.int_cons_0x0078_0x08=54000 + +# vol121 +hwmon_in.mode_0x0079_0x00=config +hwmon_in.int_cons_0x0079_0x00=0 +hwmon_in.src_0x0079_0x00=file +hwmon_in.frmt_0x0079_0x00=buf +hwmon_in.fpath_0x0079_0x00=/sys/bus/i2c/devices/58-0041/hwmon/ +hwmon_in.addr_0x0079_0x00=0 +hwmon_in.len_0x0079_0x00=8 +hwmon_in.bit_offset_0x0079_0x00=0 +hwmon_in.str_cons_0x0079_0x00=in1_input +hwmon_in.mode_0x0079_0x01=str_constant +hwmon_in.str_cons_0x0079_0x01=VCC54V_OUT_2_R_V +hwmon_in.mode_0x0079_0x02=str_constant +hwmon_in.str_cons_0x0079_0x02=INA238 +hwmon_in.mode_0x0079_0x03=str_constant +hwmon_in.str_cons_0x0079_0x03=60000 +hwmon_in.mode_0x0079_0x05=str_constant +hwmon_in.str_cons_0x0079_0x05=40000 +hwmon_in.mode_0x0079_0x08=constant +hwmon_in.int_cons_0x0079_0x08=54000 + +# curr1 +hwmon_curr.mode_0x0001_0x00=config +hwmon_curr.int_cons_0x0001_0x00=3 +hwmon_curr.src_0x0001_0x00=file +hwmon_curr.frmt_0x0001_0x00=buf +hwmon_curr.fpath_0x0001_0x00=/sys/bus/i2c/devices/57-0040/hwmon/ +hwmon_curr.addr_0x0001_0x00=0 +hwmon_curr.len_0x0001_0x00=8 +hwmon_curr.bit_offset_0x0001_0x00= +hwmon_curr.str_cons_0x0001_0x00=curr1_input +hwmon_curr.mode_0x0001_0x01=str_constant +hwmon_curr.str_cons_0x0001_0x01=VCC54V_OUT_1_R_C +hwmon_curr.mode_0x0001_0x02=str_constant +hwmon_curr.str_cons_0x0001_0x02=INA238 +hwmon_curr.mode_0x0001_0x03=constant +hwmon_curr.int_cons_0x0001_0x03=100000 +hwmon_curr.mode_0x0001_0x05=constant +hwmon_curr.int_cons_0x0001_0x05=-5000 +hwmon_curr.mode_0x0001_0x08=constant +hwmon_curr.int_cons_0x0001_0x08=80000 +hwmon_curr.int_extra1_0x0001_0x00=15000 + +# curr2 +hwmon_curr.mode_0x0002_0x00=config +hwmon_curr.int_cons_0x0002_0x00=3 +hwmon_curr.src_0x0002_0x00=file +hwmon_curr.frmt_0x0002_0x00=buf +hwmon_curr.fpath_0x0002_0x00=/sys/bus/i2c/devices/58-0041/hwmon/ +hwmon_curr.addr_0x0002_0x00=0 +hwmon_curr.len_0x0002_0x00=8 +hwmon_curr.bit_offset_0x0002_0x00= +hwmon_curr.str_cons_0x0002_0x00=curr1_input +hwmon_curr.mode_0x0002_0x01=str_constant +hwmon_curr.str_cons_0x0002_0x01=VCC54V_OUT_2_R_C +hwmon_curr.mode_0x0002_0x02=str_constant +hwmon_curr.str_cons_0x0002_0x02=INA238 +hwmon_curr.mode_0x0002_0x03=constant +hwmon_curr.int_cons_0x0002_0x03=100000 +hwmon_curr.mode_0x0002_0x05=constant +hwmon_curr.int_cons_0x0002_0x05=-5000 +hwmon_curr.mode_0x0002_0x08=constant +hwmon_curr.int_cons_0x0002_0x08=80000 +hwmon_curr.int_extra1_0x0002_0x00=15000 + +# curr3 +hwmon_curr.mode_0x0003_0x00=config +hwmon_curr.int_cons_0x0003_0x00=0 +hwmon_curr.src_0x0003_0x00=file +hwmon_curr.frmt_0x0003_0x00=buf +hwmon_curr.fpath_0x0003_0x00=/sys/bus/i2c/devices/85-0060/hwmon/ +hwmon_curr.addr_0x0003_0x00=0 +hwmon_curr.len_0x0003_0x00=8 +hwmon_curr.bit_offset_0x0003_0x00= +hwmon_curr.str_cons_0x0003_0x00=curr3_input +hwmon_curr.mode_0x0003_0x01=str_constant +hwmon_curr.str_cons_0x0003_0x01=VDD_CORE_C +hwmon_curr.mode_0x0003_0x02=str_constant +hwmon_curr.str_cons_0x0003_0x02=xdpe1a2g5b +hwmon_curr.mode_0x0003_0x03=constant +hwmon_curr.int_cons_0x0003_0x03=1276000 +hwmon_curr.mode_0x0003_0x05=constant +hwmon_curr.int_cons_0x0003_0x05=-24000 + +# curr4 +hwmon_curr.mode_0x0004_0x00=config +hwmon_curr.int_cons_0x0004_0x00=0 +hwmon_curr.src_0x0004_0x00=file +hwmon_curr.frmt_0x0004_0x00=buf +hwmon_curr.fpath_0x0004_0x00=/sys/bus/i2c/devices/91-0060/hwmon/ +hwmon_curr.addr_0x0004_0x00=0 +hwmon_curr.len_0x0004_0x00=8 +hwmon_curr.bit_offset_0x0004_0x00= +hwmon_curr.str_cons_0x0004_0x00=curr3_input +hwmon_curr.mode_0x0004_0x01=str_constant +hwmon_curr.str_cons_0x0004_0x01=OSFP_VDD3.3V_A1_C +hwmon_curr.mode_0x0004_0x02=str_constant +hwmon_curr.str_cons_0x0004_0x02=xdpe12284c +hwmon_curr.mode_0x0004_0x03=constant +hwmon_curr.int_cons_0x0004_0x03=150000 +hwmon_curr.mode_0x0004_0x05=constant +hwmon_curr.int_cons_0x0004_0x05=-9000 + +# curr5 +hwmon_curr.mode_0x0005_0x00=config +hwmon_curr.int_cons_0x0005_0x00=0 +hwmon_curr.src_0x0005_0x00=file +hwmon_curr.frmt_0x0005_0x00=buf +hwmon_curr.fpath_0x0005_0x00=/sys/bus/i2c/devices/92-0060/hwmon/ +hwmon_curr.addr_0x0005_0x00=0 +hwmon_curr.len_0x0005_0x00=8 +hwmon_curr.bit_offset_0x0005_0x00= +hwmon_curr.str_cons_0x0005_0x00=curr3_input +hwmon_curr.mode_0x0005_0x01=str_constant +hwmon_curr.str_cons_0x0005_0x01=OSFP_VDD3.3V_A2_C +hwmon_curr.mode_0x0005_0x02=str_constant +hwmon_curr.str_cons_0x0005_0x02=xdpe12284c +hwmon_curr.mode_0x0005_0x03=constant +hwmon_curr.int_cons_0x0005_0x03=150000 +hwmon_curr.mode_0x0005_0x05=constant +hwmon_curr.int_cons_0x0005_0x05=-9000 + +# curr6 +hwmon_curr.mode_0x0006_0x00=config +hwmon_curr.int_cons_0x0006_0x00=0 +hwmon_curr.src_0x0006_0x00=file +hwmon_curr.frmt_0x0006_0x00=buf +hwmon_curr.fpath_0x0006_0x00=/sys/bus/i2c/devices/91-0062/hwmon/ +hwmon_curr.addr_0x0006_0x00=0 +hwmon_curr.len_0x0006_0x00=8 +hwmon_curr.bit_offset_0x0006_0x00= +hwmon_curr.str_cons_0x0006_0x00=curr3_input +hwmon_curr.mode_0x0006_0x01=str_constant +hwmon_curr.str_cons_0x0006_0x01=OSFP_VDD3.3V_A3_C +hwmon_curr.mode_0x0006_0x02=str_constant +hwmon_curr.str_cons_0x0006_0x02=xdpe12284c +hwmon_curr.mode_0x0006_0x03=constant +hwmon_curr.int_cons_0x0006_0x03=73000 +hwmon_curr.mode_0x0006_0x05=constant +hwmon_curr.int_cons_0x0006_0x05=-4500 + +# curr7 +hwmon_curr.mode_0x0007_0x00=config +hwmon_curr.int_cons_0x0007_0x00=0 +hwmon_curr.src_0x0007_0x00=file +hwmon_curr.frmt_0x0007_0x00=buf +hwmon_curr.fpath_0x0007_0x00=/sys/bus/i2c/devices/91-0062/hwmon/ +hwmon_curr.addr_0x0007_0x00=0 +hwmon_curr.len_0x0007_0x00=8 +hwmon_curr.bit_offset_0x0007_0x00= +hwmon_curr.str_cons_0x0007_0x00=curr4_input +hwmon_curr.mode_0x0007_0x01=str_constant +hwmon_curr.str_cons_0x0007_0x01=OSFP_VDD3.3V_B3_C +hwmon_curr.mode_0x0007_0x02=str_constant +hwmon_curr.str_cons_0x0007_0x02=xdpe12284c +hwmon_curr.mode_0x0007_0x03=constant +hwmon_curr.int_cons_0x0007_0x03=73000 +hwmon_curr.mode_0x0007_0x05=constant +hwmon_curr.int_cons_0x0007_0x05=-4500 + +# curr8 +hwmon_curr.mode_0x0008_0x00=config +hwmon_curr.int_cons_0x0008_0x00=0 +hwmon_curr.src_0x0008_0x00=file +hwmon_curr.frmt_0x0008_0x00=buf +hwmon_curr.fpath_0x0008_0x00=/sys/bus/i2c/devices/92-0062/hwmon/ +hwmon_curr.addr_0x0008_0x00=0 +hwmon_curr.len_0x0008_0x00=8 +hwmon_curr.bit_offset_0x0008_0x00= +hwmon_curr.str_cons_0x0008_0x00=curr3_input +hwmon_curr.mode_0x0008_0x01=str_constant +hwmon_curr.str_cons_0x0008_0x01=OSFP_VDD3.3V_A4_C +hwmon_curr.mode_0x0008_0x02=str_constant +hwmon_curr.str_cons_0x0008_0x02=xdpe12284c +hwmon_curr.mode_0x0008_0x03=constant +hwmon_curr.int_cons_0x0008_0x03=73000 +hwmon_curr.mode_0x0008_0x05=constant +hwmon_curr.int_cons_0x0008_0x05=-4500 + +# curr9 +hwmon_curr.mode_0x0009_0x00=config +hwmon_curr.int_cons_0x0009_0x00=0 +hwmon_curr.src_0x0009_0x00=file +hwmon_curr.frmt_0x0009_0x00=buf +hwmon_curr.fpath_0x0009_0x00=/sys/bus/i2c/devices/92-0062/hwmon/ +hwmon_curr.addr_0x0009_0x00=0 +hwmon_curr.len_0x0009_0x00=8 +hwmon_curr.bit_offset_0x0009_0x00= +hwmon_curr.str_cons_0x0009_0x00=curr4_input +hwmon_curr.mode_0x0009_0x01=str_constant +hwmon_curr.str_cons_0x0009_0x01=OSFP_VDD3.3V_B4_C +hwmon_curr.mode_0x0009_0x02=str_constant +hwmon_curr.str_cons_0x0009_0x02=xdpe12284c +hwmon_curr.mode_0x0009_0x03=constant +hwmon_curr.int_cons_0x0009_0x03=73000 +hwmon_curr.mode_0x0009_0x05=constant +hwmon_curr.int_cons_0x0009_0x05=-4500 + +# curr10 +hwmon_curr.mode_0x000a_0x00=config +hwmon_curr.int_cons_0x000a_0x00=0 +hwmon_curr.src_0x000a_0x00=file +hwmon_curr.frmt_0x000a_0x00=buf +hwmon_curr.fpath_0x000a_0x00=/sys/bus/i2c/devices/95-0060/hwmon/ +hwmon_curr.addr_0x000a_0x00=0 +hwmon_curr.len_0x000a_0x00=8 +hwmon_curr.bit_offset_0x000a_0x00= +hwmon_curr.str_cons_0x000a_0x00=curr3_input +hwmon_curr.mode_0x000a_0x01=str_constant +hwmon_curr.str_cons_0x000a_0x01=VDD_PHYTILE6_C +hwmon_curr.mode_0x000a_0x02=str_constant +hwmon_curr.str_cons_0x000a_0x02=xdpe12284c +hwmon_curr.mode_0x000a_0x03=constant +hwmon_curr.int_cons_0x000a_0x03=64000 +hwmon_curr.mode_0x000a_0x05=constant +hwmon_curr.int_cons_0x000a_0x05=-3000 + +# curr11 +hwmon_curr.mode_0x000b_0x00=config +hwmon_curr.int_cons_0x000b_0x00=0 +hwmon_curr.src_0x000b_0x00=file +hwmon_curr.frmt_0x000b_0x00=buf +hwmon_curr.fpath_0x000b_0x00=/sys/bus/i2c/devices/95-0060/hwmon/ +hwmon_curr.addr_0x000b_0x00=0 +hwmon_curr.len_0x000b_0x00=8 +hwmon_curr.bit_offset_0x000b_0x00= +hwmon_curr.str_cons_0x000b_0x00=curr4_input +hwmon_curr.mode_0x000b_0x01=str_constant +hwmon_curr.str_cons_0x000b_0x01=VDD_PHYTILE7_C +hwmon_curr.mode_0x000b_0x02=str_constant +hwmon_curr.str_cons_0x000b_0x02=xdpe12284c +hwmon_curr.mode_0x000b_0x03=constant +hwmon_curr.int_cons_0x000b_0x03=64000 +hwmon_curr.mode_0x000b_0x05=constant +hwmon_curr.int_cons_0x000b_0x05=-3000 + +# curr12 +hwmon_curr.mode_0x000c_0x00=config +hwmon_curr.int_cons_0x000c_0x00=0 +hwmon_curr.src_0x000c_0x00=file +hwmon_curr.frmt_0x000c_0x00=buf +hwmon_curr.fpath_0x000c_0x00=/sys/bus/i2c/devices/85-0074/hwmon/ +hwmon_curr.addr_0x000c_0x00=0 +hwmon_curr.len_0x000c_0x00=8 +hwmon_curr.bit_offset_0x000c_0x00= +hwmon_curr.str_cons_0x000c_0x00=curr3_input +hwmon_curr.mode_0x000c_0x01=str_constant +hwmon_curr.str_cons_0x000c_0x01=VDDA_0P72_PHY2_C +hwmon_curr.mode_0x000c_0x02=str_constant +hwmon_curr.str_cons_0x000c_0x02=xdpe12284c +hwmon_curr.mode_0x000c_0x03=constant +hwmon_curr.int_cons_0x000c_0x03=50000 +hwmon_curr.mode_0x000c_0x05=constant +hwmon_curr.int_cons_0x000c_0x05=-3000 + +# curr13 +hwmon_curr.mode_0x000d_0x00=config +hwmon_curr.int_cons_0x000d_0x00=0 +hwmon_curr.src_0x000d_0x00=file +hwmon_curr.frmt_0x000d_0x00=buf +hwmon_curr.fpath_0x000d_0x00=/sys/bus/i2c/devices/85-0062/hwmon/ +hwmon_curr.addr_0x000d_0x00=0 +hwmon_curr.len_0x000d_0x00=8 +hwmon_curr.bit_offset_0x000d_0x00= +hwmon_curr.str_cons_0x000d_0x00=curr4_input +hwmon_curr.mode_0x000d_0x01=str_constant +hwmon_curr.str_cons_0x000d_0x01=VDDA_0P72_PHY1_C +hwmon_curr.mode_0x000d_0x02=str_constant +hwmon_curr.str_cons_0x000d_0x02=xdpe12284c +hwmon_curr.mode_0x000d_0x03=constant +hwmon_curr.int_cons_0x000d_0x03=50000 +hwmon_curr.mode_0x000d_0x05=constant +hwmon_curr.int_cons_0x000d_0x05=-3000 + +# curr14 +hwmon_curr.mode_0x000e_0x00=config +hwmon_curr.int_cons_0x000e_0x00=0 +hwmon_curr.src_0x000e_0x00=file +hwmon_curr.frmt_0x000e_0x00=buf +hwmon_curr.fpath_0x000e_0x00=/sys/bus/i2c/devices/87-0074/hwmon/ +hwmon_curr.addr_0x000e_0x00=0 +hwmon_curr.len_0x000e_0x00=8 +hwmon_curr.bit_offset_0x000e_0x00= +hwmon_curr.str_cons_0x000e_0x00=curr3_input +hwmon_curr.mode_0x000e_0x01=str_constant +hwmon_curr.str_cons_0x000e_0x01=VDDA_0P72_PHY0_C +hwmon_curr.mode_0x000e_0x02=str_constant +hwmon_curr.str_cons_0x000e_0x02=xdpe12284c +hwmon_curr.mode_0x000e_0x03=constant +hwmon_curr.int_cons_0x000e_0x03=50000 +hwmon_curr.mode_0x000e_0x05=constant +hwmon_curr.int_cons_0x000e_0x05=-3000 + +# curr15 +hwmon_curr.mode_0x000f_0x00=config +hwmon_curr.int_cons_0x000f_0x00=0 +hwmon_curr.src_0x000f_0x00=file +hwmon_curr.frmt_0x000f_0x00=buf +hwmon_curr.fpath_0x000f_0x00=/sys/bus/i2c/devices/87-0074/hwmon/ +hwmon_curr.addr_0x000f_0x00=0 +hwmon_curr.len_0x000f_0x00=8 +hwmon_curr.bit_offset_0x000f_0x00= +hwmon_curr.str_cons_0x000f_0x00=curr4_input +hwmon_curr.mode_0x000f_0x01=str_constant +hwmon_curr.str_cons_0x000f_0x01=VDDA_0P72_PHY4_C +hwmon_curr.mode_0x000f_0x02=str_constant +hwmon_curr.str_cons_0x000f_0x02=xdpe12284c +hwmon_curr.mode_0x000f_0x03=constant +hwmon_curr.int_cons_0x000f_0x03=50000 +hwmon_curr.mode_0x000f_0x05=constant +hwmon_curr.int_cons_0x000f_0x05=-3000 + +# curr16 +hwmon_curr.mode_0x0010_0x00=config +hwmon_curr.int_cons_0x0010_0x00=0 +hwmon_curr.src_0x0010_0x00=file +hwmon_curr.frmt_0x0010_0x00=buf +hwmon_curr.fpath_0x0010_0x00=/sys/bus/i2c/devices/89-0074/hwmon/ +hwmon_curr.addr_0x0010_0x00=0 +hwmon_curr.len_0x0010_0x00=8 +hwmon_curr.bit_offset_0x0010_0x00= +hwmon_curr.str_cons_0x0010_0x00=curr3_input +hwmon_curr.mode_0x0010_0x01=str_constant +hwmon_curr.str_cons_0x0010_0x01=VDD_1P5V_0_C +hwmon_curr.mode_0x0010_0x02=str_constant +hwmon_curr.str_cons_0x0010_0x02=xdpe12284c +hwmon_curr.mode_0x0010_0x03=constant +hwmon_curr.int_cons_0x0010_0x03=22000 +hwmon_curr.mode_0x0010_0x05=constant +hwmon_curr.int_cons_0x0010_0x05=-3000 + +# curr17 +hwmon_curr.mode_0x0011_0x00=config +hwmon_curr.int_cons_0x0011_0x00=0 +hwmon_curr.src_0x0011_0x00=file +hwmon_curr.frmt_0x0011_0x00=buf +hwmon_curr.fpath_0x0011_0x00=/sys/bus/i2c/devices/89-0074/hwmon/ +hwmon_curr.addr_0x0011_0x00=0 +hwmon_curr.len_0x0011_0x00=8 +hwmon_curr.bit_offset_0x0011_0x00= +hwmon_curr.str_cons_0x0011_0x00=curr4_input +hwmon_curr.mode_0x0011_0x01=str_constant +hwmon_curr.str_cons_0x0011_0x01=VDD_1P5V_1_C +hwmon_curr.mode_0x0011_0x02=str_constant +hwmon_curr.str_cons_0x0011_0x02=xdpe12284c +hwmon_curr.mode_0x0011_0x03=constant +hwmon_curr.int_cons_0x0011_0x03=22000 +hwmon_curr.mode_0x0011_0x05=constant +hwmon_curr.int_cons_0x0011_0x05=-3000 + +# curr18 +hwmon_curr.mode_0x0012_0x00=config +hwmon_curr.int_cons_0x0012_0x00=0 +hwmon_curr.src_0x0012_0x00=file +hwmon_curr.frmt_0x0012_0x00=buf +hwmon_curr.fpath_0x0012_0x00=/sys/bus/i2c/devices/85-0062/hwmon/ +hwmon_curr.addr_0x0012_0x00=0 +hwmon_curr.len_0x0012_0x00=8 +hwmon_curr.bit_offset_0x0012_0x00= +hwmon_curr.str_cons_0x0012_0x00=curr3_input +hwmon_curr.mode_0x0012_0x01=str_constant +hwmon_curr.str_cons_0x0012_0x01=VDD0_9V_ANLG0_C +hwmon_curr.mode_0x0012_0x02=str_constant +hwmon_curr.str_cons_0x0012_0x02=xdpe12284c +hwmon_curr.mode_0x0012_0x03=constant +hwmon_curr.int_cons_0x0012_0x03=120000 +hwmon_curr.mode_0x0012_0x05=constant +hwmon_curr.int_cons_0x0012_0x05=-6000 + +# curr19 +hwmon_curr.mode_0x0013_0x00=config +hwmon_curr.int_cons_0x0013_0x00=0 +hwmon_curr.src_0x0013_0x00=file +hwmon_curr.frmt_0x0013_0x00=buf +hwmon_curr.fpath_0x0013_0x00=/sys/bus/i2c/devices/85-0062/hwmon/ +hwmon_curr.addr_0x0013_0x00=0 +hwmon_curr.len_0x0013_0x00=8 +hwmon_curr.bit_offset_0x0013_0x00= +hwmon_curr.str_cons_0x0013_0x00=curr4_input +hwmon_curr.mode_0x0013_0x01=str_constant +hwmon_curr.str_cons_0x0013_0x01=VDD0_75V_ANLG0_C +hwmon_curr.mode_0x0013_0x02=str_constant +hwmon_curr.str_cons_0x0013_0x02=xdpe12284c +hwmon_curr.mode_0x0013_0x03=constant +hwmon_curr.int_cons_0x0013_0x03=60000 +hwmon_curr.mode_0x0013_0x05=constant +hwmon_curr.int_cons_0x0013_0x05=-3000 + +# curr20 +hwmon_curr.mode_0x0014_0x00=config +hwmon_curr.int_cons_0x0014_0x00=0 +hwmon_curr.src_0x0014_0x00=file +hwmon_curr.frmt_0x0014_0x00=buf +hwmon_curr.fpath_0x0014_0x00=/sys/bus/i2c/devices/87-0062/hwmon/ +hwmon_curr.addr_0x0014_0x00=0 +hwmon_curr.len_0x0014_0x00=8 +hwmon_curr.bit_offset_0x0014_0x00= +hwmon_curr.str_cons_0x0014_0x00=curr3_input +hwmon_curr.mode_0x0014_0x01=str_constant +hwmon_curr.str_cons_0x0014_0x01=VDD0_9V_ANLG1_C +hwmon_curr.mode_0x0014_0x02=str_constant +hwmon_curr.str_cons_0x0014_0x02=xdpe12284c +hwmon_curr.mode_0x0014_0x03=constant +hwmon_curr.int_cons_0x0014_0x03=120000 +hwmon_curr.mode_0x0014_0x05=constant +hwmon_curr.int_cons_0x0014_0x05=-6000 + +# curr21 +hwmon_curr.mode_0x0015_0x00=config +hwmon_curr.int_cons_0x0015_0x00=0 +hwmon_curr.src_0x0015_0x00=file +hwmon_curr.frmt_0x0015_0x00=buf +hwmon_curr.fpath_0x0015_0x00=/sys/bus/i2c/devices/87-0062/hwmon/ +hwmon_curr.addr_0x0015_0x00=0 +hwmon_curr.len_0x0015_0x00=8 +hwmon_curr.bit_offset_0x0015_0x00= +hwmon_curr.str_cons_0x0015_0x00=curr4_input +hwmon_curr.mode_0x0015_0x01=str_constant +hwmon_curr.str_cons_0x0015_0x01=VDD0_75V_ANLG1_C +hwmon_curr.mode_0x0015_0x02=str_constant +hwmon_curr.str_cons_0x0015_0x02=xdpe12284c +hwmon_curr.mode_0x0015_0x03=constant +hwmon_curr.int_cons_0x0015_0x03=60000 +hwmon_curr.mode_0x0015_0x05=constant +hwmon_curr.int_cons_0x0015_0x05=-3000 + +# curr22 +hwmon_curr.mode_0x0016_0x00=config +hwmon_curr.int_cons_0x0016_0x00=0 +hwmon_curr.src_0x0016_0x00=file +hwmon_curr.frmt_0x0016_0x00=buf +hwmon_curr.fpath_0x0016_0x00=/sys/bus/i2c/devices/87-0060/hwmon/ +hwmon_curr.addr_0x0016_0x00=0 +hwmon_curr.len_0x0016_0x00=8 +hwmon_curr.bit_offset_0x0016_0x00= +hwmon_curr.str_cons_0x0016_0x00=curr3_input +hwmon_curr.mode_0x0016_0x01=str_constant +hwmon_curr.str_cons_0x0016_0x01=VDD_PHYTILE1_C +hwmon_curr.mode_0x0016_0x02=str_constant +hwmon_curr.str_cons_0x0016_0x02=xdpe12284c +hwmon_curr.mode_0x0016_0x03=constant +hwmon_curr.int_cons_0x0016_0x03=64000 +hwmon_curr.mode_0x0016_0x05=constant +hwmon_curr.int_cons_0x0016_0x05=-3000 + +# curr23 +hwmon_curr.mode_0x0017_0x00=config +hwmon_curr.int_cons_0x0017_0x00=0 +hwmon_curr.src_0x0017_0x00=file +hwmon_curr.frmt_0x0017_0x00=buf +hwmon_curr.fpath_0x0017_0x00=/sys/bus/i2c/devices/87-0060/hwmon/ +hwmon_curr.addr_0x0017_0x00=0 +hwmon_curr.len_0x0017_0x00=8 +hwmon_curr.bit_offset_0x0017_0x00= +hwmon_curr.str_cons_0x0017_0x00=curr4_input +hwmon_curr.mode_0x0017_0x01=str_constant +hwmon_curr.str_cons_0x0017_0x01=VDD_PHYTILE0_C +hwmon_curr.mode_0x0017_0x02=str_constant +hwmon_curr.str_cons_0x0017_0x02=xdpe12284c +hwmon_curr.mode_0x0017_0x03=constant +hwmon_curr.int_cons_0x0017_0x03=64000 +hwmon_curr.mode_0x0017_0x05=constant +hwmon_curr.int_cons_0x0017_0x05=-3000 + +# curr24 +hwmon_curr.mode_0x0018_0x00=config +hwmon_curr.int_cons_0x0018_0x00=0 +hwmon_curr.src_0x0018_0x00=file +hwmon_curr.frmt_0x0018_0x00=buf +hwmon_curr.fpath_0x0018_0x00=/sys/bus/i2c/devices/89-0060/hwmon/ +hwmon_curr.addr_0x0018_0x00=0 +hwmon_curr.len_0x0018_0x00=8 +hwmon_curr.bit_offset_0x0018_0x00= +hwmon_curr.str_cons_0x0018_0x00=curr3_input +hwmon_curr.mode_0x0018_0x01=str_constant +hwmon_curr.str_cons_0x0018_0x01=VDD_PHYTILE2_C +hwmon_curr.mode_0x0018_0x02=str_constant +hwmon_curr.str_cons_0x0018_0x02=xdpe12284c +hwmon_curr.mode_0x0018_0x03=constant +hwmon_curr.int_cons_0x0018_0x03=64000 +hwmon_curr.mode_0x0018_0x05=constant +hwmon_curr.int_cons_0x0018_0x05=-3000 + +# curr25 +hwmon_curr.mode_0x0019_0x00=config +hwmon_curr.int_cons_0x0019_0x00=0 +hwmon_curr.src_0x0019_0x00=file +hwmon_curr.frmt_0x0019_0x00=buf +hwmon_curr.fpath_0x0019_0x00=/sys/bus/i2c/devices/89-0060/hwmon/ +hwmon_curr.addr_0x0019_0x00=0 +hwmon_curr.len_0x0019_0x00=8 +hwmon_curr.bit_offset_0x0019_0x00= +hwmon_curr.str_cons_0x0019_0x00=curr4_input +hwmon_curr.mode_0x0019_0x01=str_constant +hwmon_curr.str_cons_0x0019_0x01=VDD_PHYTILE3_C +hwmon_curr.mode_0x0019_0x02=str_constant +hwmon_curr.str_cons_0x0019_0x02=xdpe12284c +hwmon_curr.mode_0x0019_0x03=constant +hwmon_curr.int_cons_0x0019_0x03=64000 +hwmon_curr.mode_0x0019_0x05=constant +hwmon_curr.int_cons_0x0019_0x05=-3000 + +# curr26 +hwmon_curr.mode_0x001a_0x00=config +hwmon_curr.int_cons_0x001a_0x00=0 +hwmon_curr.src_0x001a_0x00=file +hwmon_curr.frmt_0x001a_0x00=buf +hwmon_curr.fpath_0x001a_0x00=/sys/bus/i2c/devices/90-0060/hwmon/ +hwmon_curr.addr_0x001a_0x00=0 +hwmon_curr.len_0x001a_0x00=8 +hwmon_curr.bit_offset_0x001a_0x00= +hwmon_curr.str_cons_0x001a_0x00=curr3_input +hwmon_curr.mode_0x001a_0x01=str_constant +hwmon_curr.str_cons_0x001a_0x01=VDD_PHYTILE4_C +hwmon_curr.mode_0x001a_0x02=str_constant +hwmon_curr.str_cons_0x001a_0x02=xdpe12284c +hwmon_curr.mode_0x001a_0x03=constant +hwmon_curr.int_cons_0x001a_0x03=64000 +hwmon_curr.mode_0x001a_0x05=constant +hwmon_curr.int_cons_0x001a_0x05=-3000 + +# curr27 +hwmon_curr.mode_0x001b_0x00=config +hwmon_curr.int_cons_0x001b_0x00=0 +hwmon_curr.src_0x001b_0x00=file +hwmon_curr.frmt_0x001b_0x00=buf +hwmon_curr.fpath_0x001b_0x00=/sys/bus/i2c/devices/90-0060/hwmon/ +hwmon_curr.addr_0x001b_0x00=0 +hwmon_curr.len_0x001b_0x00=8 +hwmon_curr.bit_offset_0x001b_0x00= +hwmon_curr.str_cons_0x001b_0x00=curr4_input +hwmon_curr.mode_0x001b_0x01=str_constant +hwmon_curr.str_cons_0x001b_0x01=VDD_PHYTILE5_C +hwmon_curr.mode_0x001b_0x02=str_constant +hwmon_curr.str_cons_0x001b_0x02=xdpe12284c +hwmon_curr.mode_0x001b_0x03=constant +hwmon_curr.int_cons_0x001b_0x03=64000 +hwmon_curr.mode_0x001b_0x05=constant +hwmon_curr.int_cons_0x001b_0x05=-3000 + +# curr28 +hwmon_curr.mode_0x001c_0x00=config +hwmon_curr.int_cons_0x001c_0x00=0 +hwmon_curr.src_0x001c_0x00=file +hwmon_curr.frmt_0x001c_0x00=buf +hwmon_curr.fpath_0x001c_0x00=/sys/bus/i2c/devices/98-0040/hwmon/ +hwmon_curr.addr_0x001c_0x00=0 +hwmon_curr.len_0x001c_0x00=8 +hwmon_curr.bit_offset_0x001c_0x00= +hwmon_curr.str_cons_0x001c_0x00=curr1_input +hwmon_curr.mode_0x001c_0x01=str_constant +hwmon_curr.str_cons_0x001c_0x01=VDDO1.2V_C +hwmon_curr.mode_0x001c_0x02=str_constant +hwmon_curr.str_cons_0x001c_0x02=INA3221A +hwmon_curr.mode_0x001c_0x03=constant +hwmon_curr.int_cons_0x001c_0x03=13200 +hwmon_curr.mode_0x001c_0x05=constant +hwmon_curr.int_cons_0x001c_0x05=-3000 + +# curr29 +hwmon_curr.mode_0x001d_0x00=config +hwmon_curr.int_cons_0x001d_0x00=0 +hwmon_curr.src_0x001d_0x00=file +hwmon_curr.frmt_0x001d_0x00=buf +hwmon_curr.fpath_0x001d_0x00=/sys/bus/i2c/devices/98-0040/hwmon/ +hwmon_curr.addr_0x001d_0x00=0 +hwmon_curr.len_0x001d_0x00=8 +hwmon_curr.bit_offset_0x001d_0x00= +hwmon_curr.str_cons_0x001d_0x00=curr2_input +hwmon_curr.mode_0x001d_0x01=str_constant +hwmon_curr.str_cons_0x001d_0x01=VDDO1.8V_C +hwmon_curr.mode_0x001d_0x02=str_constant +hwmon_curr.str_cons_0x001d_0x02=INA3221A +hwmon_curr.mode_0x001d_0x03=constant +hwmon_curr.int_cons_0x001d_0x03=13200 +hwmon_curr.mode_0x001d_0x05=constant +hwmon_curr.int_cons_0x001d_0x05=-3000 + +# curr30 +hwmon_curr.mode_0x001e_0x00=config +hwmon_curr.int_cons_0x001e_0x00=0 +hwmon_curr.src_0x001e_0x00=file +hwmon_curr.frmt_0x001e_0x00=buf +hwmon_curr.fpath_0x001e_0x00=/sys/bus/i2c/devices/98-0040/hwmon/ +hwmon_curr.addr_0x001e_0x00=0 +hwmon_curr.len_0x001e_0x00=8 +hwmon_curr.bit_offset_0x001e_0x00= +hwmon_curr.str_cons_0x001e_0x00=curr3_input +hwmon_curr.mode_0x001e_0x01=str_constant +hwmon_curr.str_cons_0x001e_0x01=VDD2.2V_C +hwmon_curr.mode_0x001e_0x02=str_constant +hwmon_curr.str_cons_0x001e_0x02=INA3221A +hwmon_curr.mode_0x001e_0x03=constant +hwmon_curr.int_cons_0x001e_0x03=6000 +hwmon_curr.mode_0x001e_0x05=constant +hwmon_curr.int_cons_0x001e_0x05=-3000 \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6951-64hc-cp/s3ip_sysfs_cfg/cfg_file/SFF.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6951-64hc-cp/s3ip_sysfs_cfg/cfg_file/SFF.cfg new file mode 100644 index 00000000000..da451f62881 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6951-64hc-cp/s3ip_sysfs_cfg/cfg_file/SFF.cfg @@ -0,0 +1,2681 @@ +# +# @Fill in the agreement +# 1. Complete comments must be filled in before configuration items. Comments must not be filled in the same line of +# configuration items and invalid Spaces must not be added between configuration items +# 2. The value can be in 10 or hexadecimal format. The hexadecimal value starts with "0x" +# 3. Some configuration items do not need to be filled in a specific product. To facilitate other products to copy and +# fill in the configuration items, do not delete them +# 4. Configuration item + +# Configuration item: Number of optical modules +# Description: Format dev_num_[main_dev]_[minor_dev] +# Note: main_dev,optical module is 3, minor_dev, 0:does not exist +dev_num_3_0=66 + +# Configuration items:: optical module EEPROM size +# Description: Format eeprom_size_[main_dev]_[index] +# Note: main_dev,optical module is 3, index, Optical module index, starting from 1 +eeprom_size_3_1=0x8180 +eeprom_size_3_2=0x8180 +eeprom_size_3_3=0x8180 +eeprom_size_3_4=0x8180 +eeprom_size_3_5=0x8180 +eeprom_size_3_6=0x8180 +eeprom_size_3_7=0x8180 +eeprom_size_3_8=0x8180 +eeprom_size_3_9=0x8180 +eeprom_size_3_10=0x8180 +eeprom_size_3_11=0x8180 +eeprom_size_3_12=0x8180 +eeprom_size_3_13=0x8180 +eeprom_size_3_14=0x8180 +eeprom_size_3_15=0x8180 +eeprom_size_3_16=0x8180 +eeprom_size_3_17=0x8180 +eeprom_size_3_18=0x8180 +eeprom_size_3_19=0x8180 +eeprom_size_3_20=0x8180 +eeprom_size_3_21=0x8180 +eeprom_size_3_22=0x8180 +eeprom_size_3_23=0x8180 +eeprom_size_3_24=0x8180 +eeprom_size_3_25=0x8180 +eeprom_size_3_26=0x8180 +eeprom_size_3_27=0x8180 +eeprom_size_3_28=0x8180 +eeprom_size_3_29=0x8180 +eeprom_size_3_30=0x8180 +eeprom_size_3_31=0x8180 +eeprom_size_3_32=0x8180 +eeprom_size_3_33=0x8180 +eeprom_size_3_34=0x8180 +eeprom_size_3_35=0x8180 +eeprom_size_3_36=0x8180 +eeprom_size_3_37=0x8180 +eeprom_size_3_38=0x8180 +eeprom_size_3_39=0x8180 +eeprom_size_3_40=0x8180 +eeprom_size_3_41=0x8180 +eeprom_size_3_42=0x8180 +eeprom_size_3_43=0x8180 +eeprom_size_3_44=0x8180 +eeprom_size_3_45=0x8180 +eeprom_size_3_46=0x8180 +eeprom_size_3_47=0x8180 +eeprom_size_3_48=0x8180 +eeprom_size_3_49=0x8180 +eeprom_size_3_50=0x8180 +eeprom_size_3_51=0x8180 +eeprom_size_3_52=0x8180 +eeprom_size_3_53=0x8180 +eeprom_size_3_54=0x8180 +eeprom_size_3_55=0x8180 +eeprom_size_3_56=0x8180 +eeprom_size_3_57=0x8180 +eeprom_size_3_58=0x8180 +eeprom_size_3_59=0x8180 +eeprom_size_3_60=0x8180 +eeprom_size_3_61=0x8180 +eeprom_size_3_62=0x8180 +eeprom_size_3_63=0x8180 +eeprom_size_3_64=0x8180 +eeprom_size_3_65=0x8180 +eeprom_size_3_66=0x8180 + +# Configuration items: optical module EEPROM sysfs path +# Description: Format eeprom_size_[main_dev]_[index] +# Note: main_dev,optical module is 3, index, Optical module index, starting from 1 +eeprom_path_3_1=/sys/bus/i2c/devices/233-0050/eeprom +eeprom_path_3_2=/sys/bus/i2c/devices/234-0050/eeprom +eeprom_path_3_3=/sys/bus/i2c/devices/201-0050/eeprom +eeprom_path_3_4=/sys/bus/i2c/devices/202-0050/eeprom +eeprom_path_3_5=/sys/bus/i2c/devices/235-0050/eeprom +eeprom_path_3_6=/sys/bus/i2c/devices/236-0050/eeprom +eeprom_path_3_7=/sys/bus/i2c/devices/203-0050/eeprom +eeprom_path_3_8=/sys/bus/i2c/devices/204-0050/eeprom +eeprom_path_3_9=/sys/bus/i2c/devices/237-0050/eeprom +eeprom_path_3_10=/sys/bus/i2c/devices/238-0050/eeprom +eeprom_path_3_11=/sys/bus/i2c/devices/205-0050/eeprom +eeprom_path_3_12=/sys/bus/i2c/devices/206-0050/eeprom +eeprom_path_3_13=/sys/bus/i2c/devices/239-0050/eeprom +eeprom_path_3_14=/sys/bus/i2c/devices/240-0050/eeprom +eeprom_path_3_15=/sys/bus/i2c/devices/207-0050/eeprom +eeprom_path_3_16=/sys/bus/i2c/devices/208-0050/eeprom +eeprom_path_3_17=/sys/bus/i2c/devices/241-0050/eeprom +eeprom_path_3_18=/sys/bus/i2c/devices/242-0050/eeprom +eeprom_path_3_19=/sys/bus/i2c/devices/209-0050/eeprom +eeprom_path_3_20=/sys/bus/i2c/devices/210-0050/eeprom +eeprom_path_3_21=/sys/bus/i2c/devices/243-0050/eeprom +eeprom_path_3_22=/sys/bus/i2c/devices/244-0050/eeprom +eeprom_path_3_23=/sys/bus/i2c/devices/211-0050/eeprom +eeprom_path_3_24=/sys/bus/i2c/devices/212-0050/eeprom +eeprom_path_3_25=/sys/bus/i2c/devices/245-0050/eeprom +eeprom_path_3_26=/sys/bus/i2c/devices/246-0050/eeprom +eeprom_path_3_27=/sys/bus/i2c/devices/213-0050/eeprom +eeprom_path_3_28=/sys/bus/i2c/devices/214-0050/eeprom +eeprom_path_3_29=/sys/bus/i2c/devices/247-0050/eeprom +eeprom_path_3_30=/sys/bus/i2c/devices/248-0050/eeprom +eeprom_path_3_31=/sys/bus/i2c/devices/215-0050/eeprom +eeprom_path_3_32=/sys/bus/i2c/devices/216-0050/eeprom +eeprom_path_3_33=/sys/bus/i2c/devices/249-0050/eeprom +eeprom_path_3_34=/sys/bus/i2c/devices/250-0050/eeprom +eeprom_path_3_35=/sys/bus/i2c/devices/217-0050/eeprom +eeprom_path_3_36=/sys/bus/i2c/devices/218-0050/eeprom +eeprom_path_3_37=/sys/bus/i2c/devices/251-0050/eeprom +eeprom_path_3_38=/sys/bus/i2c/devices/252-0050/eeprom +eeprom_path_3_39=/sys/bus/i2c/devices/219-0050/eeprom +eeprom_path_3_40=/sys/bus/i2c/devices/220-0050/eeprom +eeprom_path_3_41=/sys/bus/i2c/devices/253-0050/eeprom +eeprom_path_3_42=/sys/bus/i2c/devices/254-0050/eeprom +eeprom_path_3_43=/sys/bus/i2c/devices/221-0050/eeprom +eeprom_path_3_44=/sys/bus/i2c/devices/222-0050/eeprom +eeprom_path_3_45=/sys/bus/i2c/devices/255-0050/eeprom +eeprom_path_3_46=/sys/bus/i2c/devices/256-0050/eeprom +eeprom_path_3_47=/sys/bus/i2c/devices/223-0050/eeprom +eeprom_path_3_48=/sys/bus/i2c/devices/224-0050/eeprom +eeprom_path_3_49=/sys/bus/i2c/devices/257-0050/eeprom +eeprom_path_3_50=/sys/bus/i2c/devices/258-0050/eeprom +eeprom_path_3_51=/sys/bus/i2c/devices/225-0050/eeprom +eeprom_path_3_52=/sys/bus/i2c/devices/226-0050/eeprom +eeprom_path_3_53=/sys/bus/i2c/devices/259-0050/eeprom +eeprom_path_3_54=/sys/bus/i2c/devices/260-0050/eeprom +eeprom_path_3_55=/sys/bus/i2c/devices/227-0050/eeprom +eeprom_path_3_56=/sys/bus/i2c/devices/228-0050/eeprom +eeprom_path_3_57=/sys/bus/i2c/devices/261-0050/eeprom +eeprom_path_3_58=/sys/bus/i2c/devices/262-0050/eeprom +eeprom_path_3_59=/sys/bus/i2c/devices/229-0050/eeprom +eeprom_path_3_60=/sys/bus/i2c/devices/230-0050/eeprom +eeprom_path_3_61=/sys/bus/i2c/devices/263-0050/eeprom +eeprom_path_3_62=/sys/bus/i2c/devices/264-0050/eeprom +eeprom_path_3_63=/sys/bus/i2c/devices/231-0050/eeprom +eeprom_path_3_64=/sys/bus/i2c/devices/232-0050/eeprom +eeprom_path_3_65=/sys/bus/i2c/devices/265-0050/eeprom +eeprom_path_3_66=/sys/bus/i2c/devices/266-0050/eeprom + + +# Configuration items: Optical module CPLD register +# Description: Format sff_cpld_reg_[sff_index]_[cpld_reg] +# Note: sff_index indicates the optical module number, starting from 1. 0 indicates that the power_on register is useful +# cpld_reg 1:power_on 2:tx_fault, 3:tx_dis 4:reserve 5:rx_los +# 6:reset 7:lpmode 8:module_present 9:interrupt + + +# 1600G module reset signal +sff_cpld_reg.mode_1_6=config +sff_cpld_reg.src_1_6=cpld +sff_cpld_reg.frmt_1_6=byte +sff_cpld_reg.pola_1_6= +sff_cpld_reg.addr_1_6=0x00020020 +sff_cpld_reg.len_1_6=1 +sff_cpld_reg.bit_offset_1_6= + +sff_cpld_reg.mode_2_6=config +sff_cpld_reg.src_2_6=cpld +sff_cpld_reg.frmt_2_6=byte +sff_cpld_reg.pola_2_6= +sff_cpld_reg.addr_2_6=0x00020021 +sff_cpld_reg.len_2_6=1 +sff_cpld_reg.bit_offset_2_6= + +sff_cpld_reg.mode_3_6=config +sff_cpld_reg.src_3_6=cpld +sff_cpld_reg.frmt_3_6=byte +sff_cpld_reg.pola_3_6= +sff_cpld_reg.addr_3_6=0x00020022 +sff_cpld_reg.len_3_6=1 +sff_cpld_reg.bit_offset_3_6= + +sff_cpld_reg.mode_4_6=config +sff_cpld_reg.src_4_6=cpld +sff_cpld_reg.frmt_4_6=byte +sff_cpld_reg.pola_4_6= +sff_cpld_reg.addr_4_6=0x00020023 +sff_cpld_reg.len_4_6=1 +sff_cpld_reg.bit_offset_4_6= + +sff_cpld_reg.mode_5_6=config +sff_cpld_reg.src_5_6=cpld +sff_cpld_reg.frmt_5_6=byte +sff_cpld_reg.pola_5_6= +sff_cpld_reg.addr_5_6=0x00020024 +sff_cpld_reg.len_5_6=1 +sff_cpld_reg.bit_offset_5_6= + +sff_cpld_reg.mode_6_6=config +sff_cpld_reg.src_6_6=cpld +sff_cpld_reg.frmt_6_6=byte +sff_cpld_reg.pola_6_6= +sff_cpld_reg.addr_6_6=0x00020025 +sff_cpld_reg.len_6_6=1 +sff_cpld_reg.bit_offset_6_6= + +sff_cpld_reg.mode_7_6=config +sff_cpld_reg.src_7_6=cpld +sff_cpld_reg.frmt_7_6=byte +sff_cpld_reg.pola_7_6= +sff_cpld_reg.addr_7_6=0x00020026 +sff_cpld_reg.len_7_6=1 +sff_cpld_reg.bit_offset_7_6= + +sff_cpld_reg.mode_8_6=config +sff_cpld_reg.src_8_6=cpld +sff_cpld_reg.frmt_8_6=byte +sff_cpld_reg.pola_8_6= +sff_cpld_reg.addr_8_6=0x00020027 +sff_cpld_reg.len_8_6=1 +sff_cpld_reg.bit_offset_8_6= + +sff_cpld_reg.mode_9_6=config +sff_cpld_reg.src_9_6=cpld +sff_cpld_reg.frmt_9_6=byte +sff_cpld_reg.pola_9_6= +sff_cpld_reg.addr_9_6=0x00020028 +sff_cpld_reg.len_9_6=1 +sff_cpld_reg.bit_offset_9_6= + +sff_cpld_reg.mode_10_6=config +sff_cpld_reg.src_10_6=cpld +sff_cpld_reg.frmt_10_6=byte +sff_cpld_reg.pola_10_6= +sff_cpld_reg.addr_10_6=0x00020029 +sff_cpld_reg.len_10_6=1 +sff_cpld_reg.bit_offset_10_6= + +sff_cpld_reg.mode_11_6=config +sff_cpld_reg.src_11_6=cpld +sff_cpld_reg.frmt_11_6=byte +sff_cpld_reg.pola_11_6= +sff_cpld_reg.addr_11_6=0x0002002a +sff_cpld_reg.len_11_6=1 +sff_cpld_reg.bit_offset_11_6= + +sff_cpld_reg.mode_12_6=config +sff_cpld_reg.src_12_6=cpld +sff_cpld_reg.frmt_12_6=byte +sff_cpld_reg.pola_12_6= +sff_cpld_reg.addr_12_6=0x0002002b +sff_cpld_reg.len_12_6=1 +sff_cpld_reg.bit_offset_12_6= + +sff_cpld_reg.mode_13_6=config +sff_cpld_reg.src_13_6=cpld +sff_cpld_reg.frmt_13_6=byte +sff_cpld_reg.pola_13_6= +sff_cpld_reg.addr_13_6=0x0002002c +sff_cpld_reg.len_13_6=1 +sff_cpld_reg.bit_offset_13_6= + +sff_cpld_reg.mode_14_6=config +sff_cpld_reg.src_14_6=cpld +sff_cpld_reg.frmt_14_6=byte +sff_cpld_reg.pola_14_6= +sff_cpld_reg.addr_14_6=0x0002002d +sff_cpld_reg.len_14_6=1 +sff_cpld_reg.bit_offset_14_6= + +sff_cpld_reg.mode_15_6=config +sff_cpld_reg.src_15_6=cpld +sff_cpld_reg.frmt_15_6=byte +sff_cpld_reg.pola_15_6= +sff_cpld_reg.addr_15_6=0x0002002e +sff_cpld_reg.len_15_6=1 +sff_cpld_reg.bit_offset_15_6= + +sff_cpld_reg.mode_16_6=config +sff_cpld_reg.src_16_6=cpld +sff_cpld_reg.frmt_16_6=byte +sff_cpld_reg.pola_16_6= +sff_cpld_reg.addr_16_6=0x0002002f +sff_cpld_reg.len_16_6=1 +sff_cpld_reg.bit_offset_16_6= + +sff_cpld_reg.mode_17_6=config +sff_cpld_reg.src_17_6=cpld +sff_cpld_reg.frmt_17_6=byte +sff_cpld_reg.pola_17_6= +sff_cpld_reg.addr_17_6=0x00020030 +sff_cpld_reg.len_17_6=1 +sff_cpld_reg.bit_offset_17_6= + +sff_cpld_reg.mode_18_6=config +sff_cpld_reg.src_18_6=cpld +sff_cpld_reg.frmt_18_6=byte +sff_cpld_reg.pola_18_6= +sff_cpld_reg.addr_18_6=0x00020031 +sff_cpld_reg.len_18_6=1 +sff_cpld_reg.bit_offset_18_6= + +sff_cpld_reg.mode_19_6=config +sff_cpld_reg.src_19_6=cpld +sff_cpld_reg.frmt_19_6=byte +sff_cpld_reg.pola_19_6= +sff_cpld_reg.addr_19_6=0x00020032 +sff_cpld_reg.len_19_6=1 +sff_cpld_reg.bit_offset_19_6= + +sff_cpld_reg.mode_20_6=config +sff_cpld_reg.src_20_6=cpld +sff_cpld_reg.frmt_20_6=byte +sff_cpld_reg.pola_20_6= +sff_cpld_reg.addr_20_6=0x00020033 +sff_cpld_reg.len_20_6=1 +sff_cpld_reg.bit_offset_20_6= + +sff_cpld_reg.mode_21_6=config +sff_cpld_reg.src_21_6=cpld +sff_cpld_reg.frmt_21_6=byte +sff_cpld_reg.pola_21_6= +sff_cpld_reg.addr_21_6=0x00020034 +sff_cpld_reg.len_21_6=1 +sff_cpld_reg.bit_offset_21_6= + +sff_cpld_reg.mode_22_6=config +sff_cpld_reg.src_22_6=cpld +sff_cpld_reg.frmt_22_6=byte +sff_cpld_reg.pola_22_6= +sff_cpld_reg.addr_22_6=0x00020035 +sff_cpld_reg.len_22_6=1 +sff_cpld_reg.bit_offset_22_6= + +sff_cpld_reg.mode_23_6=config +sff_cpld_reg.src_23_6=cpld +sff_cpld_reg.frmt_23_6=byte +sff_cpld_reg.pola_23_6= +sff_cpld_reg.addr_23_6=0x00020036 +sff_cpld_reg.len_23_6=1 +sff_cpld_reg.bit_offset_23_6= + +sff_cpld_reg.mode_24_6=config +sff_cpld_reg.src_24_6=cpld +sff_cpld_reg.frmt_24_6=byte +sff_cpld_reg.pola_24_6= +sff_cpld_reg.addr_24_6=0x00020037 +sff_cpld_reg.len_24_6=1 +sff_cpld_reg.bit_offset_24_6= + +sff_cpld_reg.mode_25_6=config +sff_cpld_reg.src_25_6=cpld +sff_cpld_reg.frmt_25_6=byte +sff_cpld_reg.pola_25_6= +sff_cpld_reg.addr_25_6=0x00020038 +sff_cpld_reg.len_25_6=1 +sff_cpld_reg.bit_offset_25_6= + +sff_cpld_reg.mode_26_6=config +sff_cpld_reg.src_26_6=cpld +sff_cpld_reg.frmt_26_6=byte +sff_cpld_reg.pola_26_6= +sff_cpld_reg.addr_26_6=0x00020039 +sff_cpld_reg.len_26_6=1 +sff_cpld_reg.bit_offset_26_6= + +sff_cpld_reg.mode_27_6=config +sff_cpld_reg.src_27_6=cpld +sff_cpld_reg.frmt_27_6=byte +sff_cpld_reg.pola_27_6= +sff_cpld_reg.addr_27_6=0x0002003a +sff_cpld_reg.len_27_6=1 +sff_cpld_reg.bit_offset_27_6= + +sff_cpld_reg.mode_28_6=config +sff_cpld_reg.src_28_6=cpld +sff_cpld_reg.frmt_28_6=byte +sff_cpld_reg.pola_28_6= +sff_cpld_reg.addr_28_6=0x0002003b +sff_cpld_reg.len_28_6=1 +sff_cpld_reg.bit_offset_28_6= + +sff_cpld_reg.mode_29_6=config +sff_cpld_reg.src_29_6=cpld +sff_cpld_reg.frmt_29_6=byte +sff_cpld_reg.pola_29_6= +sff_cpld_reg.addr_29_6=0x0002003c +sff_cpld_reg.len_29_6=1 +sff_cpld_reg.bit_offset_29_6= + +sff_cpld_reg.mode_30_6=config +sff_cpld_reg.src_30_6=cpld +sff_cpld_reg.frmt_30_6=byte +sff_cpld_reg.pola_30_6= +sff_cpld_reg.addr_30_6=0x0002003d +sff_cpld_reg.len_30_6=1 +sff_cpld_reg.bit_offset_30_6= + +sff_cpld_reg.mode_31_6=config +sff_cpld_reg.src_31_6=cpld +sff_cpld_reg.frmt_31_6=byte +sff_cpld_reg.pola_31_6= +sff_cpld_reg.addr_31_6=0x0002003e +sff_cpld_reg.len_31_6=1 +sff_cpld_reg.bit_offset_31_6= + +sff_cpld_reg.mode_32_6=config +sff_cpld_reg.src_32_6=cpld +sff_cpld_reg.frmt_32_6=byte +sff_cpld_reg.pola_32_6= +sff_cpld_reg.addr_32_6=0x0002003f +sff_cpld_reg.len_32_6=1 +sff_cpld_reg.bit_offset_32_6= + +sff_cpld_reg.mode_33_6=config +sff_cpld_reg.src_33_6=cpld +sff_cpld_reg.frmt_33_6=byte +sff_cpld_reg.pola_33_6= +sff_cpld_reg.addr_33_6=0x00040020 +sff_cpld_reg.len_33_6=1 +sff_cpld_reg.bit_offset_33_6= + +sff_cpld_reg.mode_34_6=config +sff_cpld_reg.src_34_6=cpld +sff_cpld_reg.frmt_34_6=byte +sff_cpld_reg.pola_34_6= +sff_cpld_reg.addr_34_6=0x00040021 +sff_cpld_reg.len_34_6=1 +sff_cpld_reg.bit_offset_34_6= + +sff_cpld_reg.mode_35_6=config +sff_cpld_reg.src_35_6=cpld +sff_cpld_reg.frmt_35_6=byte +sff_cpld_reg.pola_35_6= +sff_cpld_reg.addr_35_6=0x00040022 +sff_cpld_reg.len_35_6=1 +sff_cpld_reg.bit_offset_35_6= + +sff_cpld_reg.mode_36_6=config +sff_cpld_reg.src_36_6=cpld +sff_cpld_reg.frmt_36_6=byte +sff_cpld_reg.pola_36_6= +sff_cpld_reg.addr_36_6=0x00040023 +sff_cpld_reg.len_36_6=1 +sff_cpld_reg.bit_offset_36_6= + +sff_cpld_reg.mode_37_6=config +sff_cpld_reg.src_37_6=cpld +sff_cpld_reg.frmt_37_6=byte +sff_cpld_reg.pola_37_6= +sff_cpld_reg.addr_37_6=0x00040024 +sff_cpld_reg.len_37_6=1 +sff_cpld_reg.bit_offset_37_6= + +sff_cpld_reg.mode_38_6=config +sff_cpld_reg.src_38_6=cpld +sff_cpld_reg.frmt_38_6=byte +sff_cpld_reg.pola_38_6= +sff_cpld_reg.addr_38_6=0x00040025 +sff_cpld_reg.len_38_6=1 +sff_cpld_reg.bit_offset_38_6= + +sff_cpld_reg.mode_39_6=config +sff_cpld_reg.src_39_6=cpld +sff_cpld_reg.frmt_39_6=byte +sff_cpld_reg.pola_39_6= +sff_cpld_reg.addr_39_6=0x00040026 +sff_cpld_reg.len_39_6=1 +sff_cpld_reg.bit_offset_39_6= + +sff_cpld_reg.mode_40_6=config +sff_cpld_reg.src_40_6=cpld +sff_cpld_reg.frmt_40_6=byte +sff_cpld_reg.pola_40_6= +sff_cpld_reg.addr_40_6=0x00040027 +sff_cpld_reg.len_40_6=1 +sff_cpld_reg.bit_offset_40_6= + +sff_cpld_reg.mode_41_6=config +sff_cpld_reg.src_41_6=cpld +sff_cpld_reg.frmt_41_6=byte +sff_cpld_reg.pola_41_6= +sff_cpld_reg.addr_41_6=0x00040028 +sff_cpld_reg.len_41_6=1 +sff_cpld_reg.bit_offset_41_6= + +sff_cpld_reg.mode_42_6=config +sff_cpld_reg.src_42_6=cpld +sff_cpld_reg.frmt_42_6=byte +sff_cpld_reg.pola_42_6= +sff_cpld_reg.addr_42_6=0x00040029 +sff_cpld_reg.len_42_6=1 +sff_cpld_reg.bit_offset_42_6= + +sff_cpld_reg.mode_43_6=config +sff_cpld_reg.src_43_6=cpld +sff_cpld_reg.frmt_43_6=byte +sff_cpld_reg.pola_43_6= +sff_cpld_reg.addr_43_6=0x0004002a +sff_cpld_reg.len_43_6=1 +sff_cpld_reg.bit_offset_43_6= + +sff_cpld_reg.mode_44_6=config +sff_cpld_reg.src_44_6=cpld +sff_cpld_reg.frmt_44_6=byte +sff_cpld_reg.pola_44_6= +sff_cpld_reg.addr_44_6=0x0004002b +sff_cpld_reg.len_44_6=1 +sff_cpld_reg.bit_offset_44_6= + +sff_cpld_reg.mode_45_6=config +sff_cpld_reg.src_45_6=cpld +sff_cpld_reg.frmt_45_6=byte +sff_cpld_reg.pola_45_6= +sff_cpld_reg.addr_45_6=0x0004002c +sff_cpld_reg.len_45_6=1 +sff_cpld_reg.bit_offset_45_6= + +sff_cpld_reg.mode_46_6=config +sff_cpld_reg.src_46_6=cpld +sff_cpld_reg.frmt_46_6=byte +sff_cpld_reg.pola_46_6= +sff_cpld_reg.addr_46_6=0x0004002d +sff_cpld_reg.len_46_6=1 +sff_cpld_reg.bit_offset_46_6= + +sff_cpld_reg.mode_47_6=config +sff_cpld_reg.src_47_6=cpld +sff_cpld_reg.frmt_47_6=byte +sff_cpld_reg.pola_47_6= +sff_cpld_reg.addr_47_6=0x0004002e +sff_cpld_reg.len_47_6=1 +sff_cpld_reg.bit_offset_47_6= + +sff_cpld_reg.mode_48_6=config +sff_cpld_reg.src_48_6=cpld +sff_cpld_reg.frmt_48_6=byte +sff_cpld_reg.pola_48_6= +sff_cpld_reg.addr_48_6=0x0004002f +sff_cpld_reg.len_48_6=1 +sff_cpld_reg.bit_offset_48_6= + +sff_cpld_reg.mode_49_6=config +sff_cpld_reg.src_49_6=cpld +sff_cpld_reg.frmt_49_6=byte +sff_cpld_reg.pola_49_6= +sff_cpld_reg.addr_49_6=0x00040030 +sff_cpld_reg.len_49_6=1 +sff_cpld_reg.bit_offset_49_6= + +sff_cpld_reg.mode_50_6=config +sff_cpld_reg.src_50_6=cpld +sff_cpld_reg.frmt_50_6=byte +sff_cpld_reg.pola_50_6= +sff_cpld_reg.addr_50_6=0x00040031 +sff_cpld_reg.len_50_6=1 +sff_cpld_reg.bit_offset_50_6= + +sff_cpld_reg.mode_51_6=config +sff_cpld_reg.src_51_6=cpld +sff_cpld_reg.frmt_51_6=byte +sff_cpld_reg.pola_51_6= +sff_cpld_reg.addr_51_6=0x00040032 +sff_cpld_reg.len_51_6=1 +sff_cpld_reg.bit_offset_51_6= + +sff_cpld_reg.mode_52_6=config +sff_cpld_reg.src_52_6=cpld +sff_cpld_reg.frmt_52_6=byte +sff_cpld_reg.pola_52_6= +sff_cpld_reg.addr_52_6=0x00040033 +sff_cpld_reg.len_52_6=1 +sff_cpld_reg.bit_offset_52_6= + +sff_cpld_reg.mode_53_6=config +sff_cpld_reg.src_53_6=cpld +sff_cpld_reg.frmt_53_6=byte +sff_cpld_reg.pola_53_6= +sff_cpld_reg.addr_53_6=0x00040034 +sff_cpld_reg.len_53_6=1 +sff_cpld_reg.bit_offset_53_6= + +sff_cpld_reg.mode_54_6=config +sff_cpld_reg.src_54_6=cpld +sff_cpld_reg.frmt_54_6=byte +sff_cpld_reg.pola_54_6= +sff_cpld_reg.addr_54_6=0x00040035 +sff_cpld_reg.len_54_6=1 +sff_cpld_reg.bit_offset_54_6= + +sff_cpld_reg.mode_55_6=config +sff_cpld_reg.src_55_6=cpld +sff_cpld_reg.frmt_55_6=byte +sff_cpld_reg.pola_55_6= +sff_cpld_reg.addr_55_6=0x00040036 +sff_cpld_reg.len_55_6=1 +sff_cpld_reg.bit_offset_55_6= + +sff_cpld_reg.mode_56_6=config +sff_cpld_reg.src_56_6=cpld +sff_cpld_reg.frmt_56_6=byte +sff_cpld_reg.pola_56_6= +sff_cpld_reg.addr_56_6=0x00040037 +sff_cpld_reg.len_56_6=1 +sff_cpld_reg.bit_offset_56_6= + +sff_cpld_reg.mode_57_6=config +sff_cpld_reg.src_57_6=cpld +sff_cpld_reg.frmt_57_6=byte +sff_cpld_reg.pola_57_6= +sff_cpld_reg.addr_57_6=0x00040038 +sff_cpld_reg.len_57_6=1 +sff_cpld_reg.bit_offset_57_6= + +sff_cpld_reg.mode_58_6=config +sff_cpld_reg.src_58_6=cpld +sff_cpld_reg.frmt_58_6=byte +sff_cpld_reg.pola_58_6= +sff_cpld_reg.addr_58_6=0x00040039 +sff_cpld_reg.len_58_6=1 +sff_cpld_reg.bit_offset_58_6= + +sff_cpld_reg.mode_59_6=config +sff_cpld_reg.src_59_6=cpld +sff_cpld_reg.frmt_59_6=byte +sff_cpld_reg.pola_59_6= +sff_cpld_reg.addr_59_6=0x0004003a +sff_cpld_reg.len_59_6=1 +sff_cpld_reg.bit_offset_59_6= + +sff_cpld_reg.mode_60_6=config +sff_cpld_reg.src_60_6=cpld +sff_cpld_reg.frmt_60_6=byte +sff_cpld_reg.pola_60_6= +sff_cpld_reg.addr_60_6=0x0004003b +sff_cpld_reg.len_60_6=1 +sff_cpld_reg.bit_offset_60_6= + +sff_cpld_reg.mode_61_6=config +sff_cpld_reg.src_61_6=cpld +sff_cpld_reg.frmt_61_6=byte +sff_cpld_reg.pola_61_6= +sff_cpld_reg.addr_61_6=0x0004003c +sff_cpld_reg.len_61_6=1 +sff_cpld_reg.bit_offset_61_6= + +sff_cpld_reg.mode_62_6=config +sff_cpld_reg.src_62_6=cpld +sff_cpld_reg.frmt_62_6=byte +sff_cpld_reg.pola_62_6= +sff_cpld_reg.addr_62_6=0x0004003d +sff_cpld_reg.len_62_6=1 +sff_cpld_reg.bit_offset_62_6= + +sff_cpld_reg.mode_63_6=config +sff_cpld_reg.src_63_6=cpld +sff_cpld_reg.frmt_63_6=byte +sff_cpld_reg.pola_63_6= +sff_cpld_reg.addr_63_6=0x0004003e +sff_cpld_reg.len_63_6=1 +sff_cpld_reg.bit_offset_63_6= + +sff_cpld_reg.mode_64_6=config +sff_cpld_reg.src_64_6=cpld +sff_cpld_reg.frmt_64_6=byte +sff_cpld_reg.pola_64_6= +sff_cpld_reg.addr_64_6=0x0004003f +sff_cpld_reg.len_64_6=1 +sff_cpld_reg.bit_offset_64_6= + +# 1600G module lpmode signal +sff_cpld_reg.mode_1_7=config +sff_cpld_reg.src_1_7=cpld +sff_cpld_reg.frmt_1_7=byte +sff_cpld_reg.pola_1_7= +sff_cpld_reg.addr_1_7=0x00020040 +sff_cpld_reg.len_1_7=1 +sff_cpld_reg.bit_offset_1_7= + +sff_cpld_reg.mode_2_7=config +sff_cpld_reg.src_2_7=cpld +sff_cpld_reg.frmt_2_7=byte +sff_cpld_reg.pola_2_7= +sff_cpld_reg.addr_2_7=0x00020041 +sff_cpld_reg.len_2_7=1 +sff_cpld_reg.bit_offset_2_7= + +sff_cpld_reg.mode_3_7=config +sff_cpld_reg.src_3_7=cpld +sff_cpld_reg.frmt_3_7=byte +sff_cpld_reg.pola_3_7= +sff_cpld_reg.addr_3_7=0x00020042 +sff_cpld_reg.len_3_7=1 +sff_cpld_reg.bit_offset_3_7= + +sff_cpld_reg.mode_4_7=config +sff_cpld_reg.src_4_7=cpld +sff_cpld_reg.frmt_4_7=byte +sff_cpld_reg.pola_4_7= +sff_cpld_reg.addr_4_7=0x00020043 +sff_cpld_reg.len_4_7=1 +sff_cpld_reg.bit_offset_4_7= + +sff_cpld_reg.mode_5_7=config +sff_cpld_reg.src_5_7=cpld +sff_cpld_reg.frmt_5_7=byte +sff_cpld_reg.pola_5_7= +sff_cpld_reg.addr_5_7=0x00020044 +sff_cpld_reg.len_5_7=1 +sff_cpld_reg.bit_offset_5_7= + +sff_cpld_reg.mode_6_7=config +sff_cpld_reg.src_6_7=cpld +sff_cpld_reg.frmt_6_7=byte +sff_cpld_reg.pola_6_7= +sff_cpld_reg.addr_6_7=0x00020045 +sff_cpld_reg.len_6_7=1 +sff_cpld_reg.bit_offset_6_7= + +sff_cpld_reg.mode_7_7=config +sff_cpld_reg.src_7_7=cpld +sff_cpld_reg.frmt_7_7=byte +sff_cpld_reg.pola_7_7= +sff_cpld_reg.addr_7_7=0x00020046 +sff_cpld_reg.len_7_7=1 +sff_cpld_reg.bit_offset_7_7= + +sff_cpld_reg.mode_8_7=config +sff_cpld_reg.src_8_7=cpld +sff_cpld_reg.frmt_8_7=byte +sff_cpld_reg.pola_8_7= +sff_cpld_reg.addr_8_7=0x00020057 +sff_cpld_reg.len_8_7=1 +sff_cpld_reg.bit_offset_8_7= + +sff_cpld_reg.mode_9_7=config +sff_cpld_reg.src_9_7=cpld +sff_cpld_reg.frmt_9_7=byte +sff_cpld_reg.pola_9_7= +sff_cpld_reg.addr_9_7=0x00020048 +sff_cpld_reg.len_9_7=1 +sff_cpld_reg.bit_offset_9_7= + +sff_cpld_reg.mode_10_7=config +sff_cpld_reg.src_10_7=cpld +sff_cpld_reg.frmt_10_7=byte +sff_cpld_reg.pola_10_7= +sff_cpld_reg.addr_10_7=0x00020049 +sff_cpld_reg.len_10_7=1 +sff_cpld_reg.bit_offset_10_7= + +sff_cpld_reg.mode_11_7=config +sff_cpld_reg.src_11_7=cpld +sff_cpld_reg.frmt_11_7=byte +sff_cpld_reg.pola_11_7= +sff_cpld_reg.addr_11_7=0x0002004a +sff_cpld_reg.len_11_7=1 +sff_cpld_reg.bit_offset_11_7= + +sff_cpld_reg.mode_12_7=config +sff_cpld_reg.src_12_7=cpld +sff_cpld_reg.frmt_12_7=byte +sff_cpld_reg.pola_12_7= +sff_cpld_reg.addr_12_7=0x0002004b +sff_cpld_reg.len_12_7=1 +sff_cpld_reg.bit_offset_12_7= + +sff_cpld_reg.mode_13_7=config +sff_cpld_reg.src_13_7=cpld +sff_cpld_reg.frmt_13_7=byte +sff_cpld_reg.pola_13_7= +sff_cpld_reg.addr_13_7=0x0002004c +sff_cpld_reg.len_13_7=1 +sff_cpld_reg.bit_offset_13_7= + +sff_cpld_reg.mode_14_7=config +sff_cpld_reg.src_14_7=cpld +sff_cpld_reg.frmt_14_7=byte +sff_cpld_reg.pola_14_7= +sff_cpld_reg.addr_14_7=0x0002004d +sff_cpld_reg.len_14_7=1 +sff_cpld_reg.bit_offset_14_7= + +sff_cpld_reg.mode_15_7=config +sff_cpld_reg.src_15_7=cpld +sff_cpld_reg.frmt_15_7=byte +sff_cpld_reg.pola_15_7= +sff_cpld_reg.addr_15_7=0x0002004e +sff_cpld_reg.len_15_7=1 +sff_cpld_reg.bit_offset_15_7= + +sff_cpld_reg.mode_16_7=config +sff_cpld_reg.src_16_7=cpld +sff_cpld_reg.frmt_16_7=byte +sff_cpld_reg.pola_16_7= +sff_cpld_reg.addr_16_7=0x0002004f +sff_cpld_reg.len_16_7=1 +sff_cpld_reg.bit_offset_16_7= + +sff_cpld_reg.mode_17_7=config +sff_cpld_reg.src_17_7=cpld +sff_cpld_reg.frmt_17_7=byte +sff_cpld_reg.pola_17_7= +sff_cpld_reg.addr_17_7=0x00020050 +sff_cpld_reg.len_17_7=1 +sff_cpld_reg.bit_offset_17_7= + +sff_cpld_reg.mode_18_7=config +sff_cpld_reg.src_18_7=cpld +sff_cpld_reg.frmt_18_7=byte +sff_cpld_reg.pola_18_7= +sff_cpld_reg.addr_18_7=0x00020051 +sff_cpld_reg.len_18_7=1 +sff_cpld_reg.bit_offset_18_7= + +sff_cpld_reg.mode_19_7=config +sff_cpld_reg.src_19_7=cpld +sff_cpld_reg.frmt_19_7=byte +sff_cpld_reg.pola_19_7= +sff_cpld_reg.addr_19_7=0x00020052 +sff_cpld_reg.len_19_7=1 +sff_cpld_reg.bit_offset_19_7= + +sff_cpld_reg.mode_20_7=config +sff_cpld_reg.src_20_7=cpld +sff_cpld_reg.frmt_20_7=byte +sff_cpld_reg.pola_20_7= +sff_cpld_reg.addr_20_7=0x00020053 +sff_cpld_reg.len_20_7=1 +sff_cpld_reg.bit_offset_20_7= + +sff_cpld_reg.mode_21_7=config +sff_cpld_reg.src_21_7=cpld +sff_cpld_reg.frmt_21_7=byte +sff_cpld_reg.pola_21_7= +sff_cpld_reg.addr_21_7=0x00020054 +sff_cpld_reg.len_21_7=1 +sff_cpld_reg.bit_offset_21_7= + +sff_cpld_reg.mode_22_7=config +sff_cpld_reg.src_22_7=cpld +sff_cpld_reg.frmt_22_7=byte +sff_cpld_reg.pola_22_7= +sff_cpld_reg.addr_22_7=0x00020055 +sff_cpld_reg.len_22_7=1 +sff_cpld_reg.bit_offset_22_7= + +sff_cpld_reg.mode_23_7=config +sff_cpld_reg.src_23_7=cpld +sff_cpld_reg.frmt_23_7=byte +sff_cpld_reg.pola_23_7= +sff_cpld_reg.addr_23_7=0x00020056 +sff_cpld_reg.len_23_7=1 +sff_cpld_reg.bit_offset_23_7= + +sff_cpld_reg.mode_24_7=config +sff_cpld_reg.src_24_7=cpld +sff_cpld_reg.frmt_24_7=byte +sff_cpld_reg.pola_24_7= +sff_cpld_reg.addr_24_7=0x00020057 +sff_cpld_reg.len_24_7=1 +sff_cpld_reg.bit_offset_24_7= + +sff_cpld_reg.mode_25_7=config +sff_cpld_reg.src_25_7=cpld +sff_cpld_reg.frmt_25_7=byte +sff_cpld_reg.pola_25_7= +sff_cpld_reg.addr_25_7=0x00020058 +sff_cpld_reg.len_25_7=1 +sff_cpld_reg.bit_offset_25_7= + +sff_cpld_reg.mode_26_7=config +sff_cpld_reg.src_26_7=cpld +sff_cpld_reg.frmt_26_7=byte +sff_cpld_reg.pola_26_7= +sff_cpld_reg.addr_26_7=0x00020059 +sff_cpld_reg.len_26_7=1 +sff_cpld_reg.bit_offset_26_7= + +sff_cpld_reg.mode_27_7=config +sff_cpld_reg.src_27_7=cpld +sff_cpld_reg.frmt_27_7=byte +sff_cpld_reg.pola_27_7= +sff_cpld_reg.addr_27_7=0x0002005a +sff_cpld_reg.len_27_7=1 +sff_cpld_reg.bit_offset_27_7= + +sff_cpld_reg.mode_28_7=config +sff_cpld_reg.src_28_7=cpld +sff_cpld_reg.frmt_28_7=byte +sff_cpld_reg.pola_28_7= +sff_cpld_reg.addr_28_7=0x0002005b +sff_cpld_reg.len_28_7=1 +sff_cpld_reg.bit_offset_28_7= + +sff_cpld_reg.mode_29_7=config +sff_cpld_reg.src_29_7=cpld +sff_cpld_reg.frmt_29_7=byte +sff_cpld_reg.pola_29_7= +sff_cpld_reg.addr_29_7=0x0002005c +sff_cpld_reg.len_29_7=1 +sff_cpld_reg.bit_offset_29_7= + +sff_cpld_reg.mode_30_7=config +sff_cpld_reg.src_30_7=cpld +sff_cpld_reg.frmt_30_7=byte +sff_cpld_reg.pola_30_7= +sff_cpld_reg.addr_30_7=0x0002005d +sff_cpld_reg.len_30_7=1 +sff_cpld_reg.bit_offset_30_7= + +sff_cpld_reg.mode_31_7=config +sff_cpld_reg.src_31_7=cpld +sff_cpld_reg.frmt_31_7=byte +sff_cpld_reg.pola_31_7= +sff_cpld_reg.addr_31_7=0x0002005e +sff_cpld_reg.len_31_7=1 +sff_cpld_reg.bit_offset_31_7= + +sff_cpld_reg.mode_32_7=config +sff_cpld_reg.src_32_7=cpld +sff_cpld_reg.frmt_32_7=byte +sff_cpld_reg.pola_32_7= +sff_cpld_reg.addr_32_7=0x0002005f +sff_cpld_reg.len_32_7=1 +sff_cpld_reg.bit_offset_32_7= + +sff_cpld_reg.mode_33_7=config +sff_cpld_reg.src_33_7=cpld +sff_cpld_reg.frmt_33_7=byte +sff_cpld_reg.pola_33_7= +sff_cpld_reg.addr_33_7=0x00040040 +sff_cpld_reg.len_33_7=1 +sff_cpld_reg.bit_offset_33_7= + +sff_cpld_reg.mode_34_7=config +sff_cpld_reg.src_34_7=cpld +sff_cpld_reg.frmt_34_7=byte +sff_cpld_reg.pola_34_7= +sff_cpld_reg.addr_34_7=0x00040041 +sff_cpld_reg.len_34_7=1 +sff_cpld_reg.bit_offset_34_7= + +sff_cpld_reg.mode_35_7=config +sff_cpld_reg.src_35_7=cpld +sff_cpld_reg.frmt_35_7=byte +sff_cpld_reg.pola_35_7= +sff_cpld_reg.addr_35_7=0x00040042 +sff_cpld_reg.len_35_7=1 +sff_cpld_reg.bit_offset_35_7= + +sff_cpld_reg.mode_36_7=config +sff_cpld_reg.src_36_7=cpld +sff_cpld_reg.frmt_36_7=byte +sff_cpld_reg.pola_36_7= +sff_cpld_reg.addr_36_7=0x00040043 +sff_cpld_reg.len_36_7=1 +sff_cpld_reg.bit_offset_36_7= + +sff_cpld_reg.mode_37_7=config +sff_cpld_reg.src_37_7=cpld +sff_cpld_reg.frmt_37_7=byte +sff_cpld_reg.pola_37_7= +sff_cpld_reg.addr_37_7=0x00040044 +sff_cpld_reg.len_37_7=1 +sff_cpld_reg.bit_offset_37_7= + +sff_cpld_reg.mode_38_7=config +sff_cpld_reg.src_38_7=cpld +sff_cpld_reg.frmt_38_7=byte +sff_cpld_reg.pola_38_7= +sff_cpld_reg.addr_38_7=0x00040045 +sff_cpld_reg.len_38_7=1 +sff_cpld_reg.bit_offset_38_7= + +sff_cpld_reg.mode_39_7=config +sff_cpld_reg.src_39_7=cpld +sff_cpld_reg.frmt_39_7=byte +sff_cpld_reg.pola_39_7= +sff_cpld_reg.addr_39_7=0x00040046 +sff_cpld_reg.len_39_7=1 +sff_cpld_reg.bit_offset_39_7= + +sff_cpld_reg.mode_40_7=config +sff_cpld_reg.src_40_7=cpld +sff_cpld_reg.frmt_40_7=byte +sff_cpld_reg.pola_40_7= +sff_cpld_reg.addr_40_7=0x00040047 +sff_cpld_reg.len_40_7=1 +sff_cpld_reg.bit_offset_40_7= + +sff_cpld_reg.mode_41_7=config +sff_cpld_reg.src_41_7=cpld +sff_cpld_reg.frmt_41_7=byte +sff_cpld_reg.pola_41_7= +sff_cpld_reg.addr_41_7=0x00040048 +sff_cpld_reg.len_41_7=1 +sff_cpld_reg.bit_offset_41_7= + +sff_cpld_reg.mode_42_7=config +sff_cpld_reg.src_42_7=cpld +sff_cpld_reg.frmt_42_7=byte +sff_cpld_reg.pola_42_7= +sff_cpld_reg.addr_42_7=0x00040049 +sff_cpld_reg.len_42_7=1 +sff_cpld_reg.bit_offset_42_7= + +sff_cpld_reg.mode_43_7=config +sff_cpld_reg.src_43_7=cpld +sff_cpld_reg.frmt_43_7=byte +sff_cpld_reg.pola_43_7= +sff_cpld_reg.addr_43_7=0x0004004a +sff_cpld_reg.len_43_7=1 +sff_cpld_reg.bit_offset_43_7= + +sff_cpld_reg.mode_44_7=config +sff_cpld_reg.src_44_7=cpld +sff_cpld_reg.frmt_44_7=byte +sff_cpld_reg.pola_44_7= +sff_cpld_reg.addr_44_7=0x0004004b +sff_cpld_reg.len_44_7=1 +sff_cpld_reg.bit_offset_44_7= + +sff_cpld_reg.mode_45_7=config +sff_cpld_reg.src_45_7=cpld +sff_cpld_reg.frmt_45_7=byte +sff_cpld_reg.pola_45_7= +sff_cpld_reg.addr_45_7=0x0004004c +sff_cpld_reg.len_45_7=1 +sff_cpld_reg.bit_offset_45_7= + +sff_cpld_reg.mode_46_7=config +sff_cpld_reg.src_46_7=cpld +sff_cpld_reg.frmt_46_7=byte +sff_cpld_reg.pola_46_7= +sff_cpld_reg.addr_46_7=0x0004004d +sff_cpld_reg.len_46_7=1 +sff_cpld_reg.bit_offset_46_7= + +sff_cpld_reg.mode_47_7=config +sff_cpld_reg.src_47_7=cpld +sff_cpld_reg.frmt_47_7=byte +sff_cpld_reg.pola_47_7= +sff_cpld_reg.addr_47_7=0x0004004e +sff_cpld_reg.len_47_7=1 +sff_cpld_reg.bit_offset_47_7= + +sff_cpld_reg.mode_48_7=config +sff_cpld_reg.src_48_7=cpld +sff_cpld_reg.frmt_48_7=byte +sff_cpld_reg.pola_48_7= +sff_cpld_reg.addr_48_7=0x0004004f +sff_cpld_reg.len_48_7=1 +sff_cpld_reg.bit_offset_48_7= + +sff_cpld_reg.mode_49_7=config +sff_cpld_reg.src_49_7=cpld +sff_cpld_reg.frmt_49_7=byte +sff_cpld_reg.pola_49_7= +sff_cpld_reg.addr_49_7=0x00040050 +sff_cpld_reg.len_49_7=1 +sff_cpld_reg.bit_offset_49_7= + +sff_cpld_reg.mode_50_7=config +sff_cpld_reg.src_50_7=cpld +sff_cpld_reg.frmt_50_7=byte +sff_cpld_reg.pola_50_7= +sff_cpld_reg.addr_50_7=0x00040051 +sff_cpld_reg.len_50_7=1 +sff_cpld_reg.bit_offset_50_7= + +sff_cpld_reg.mode_51_7=config +sff_cpld_reg.src_51_7=cpld +sff_cpld_reg.frmt_51_7=byte +sff_cpld_reg.pola_51_7= +sff_cpld_reg.addr_51_7=0x00040052 +sff_cpld_reg.len_51_7=1 +sff_cpld_reg.bit_offset_51_7= + +sff_cpld_reg.mode_52_7=config +sff_cpld_reg.src_52_7=cpld +sff_cpld_reg.frmt_52_7=byte +sff_cpld_reg.pola_52_7= +sff_cpld_reg.addr_52_7=0x00040053 +sff_cpld_reg.len_52_7=1 +sff_cpld_reg.bit_offset_52_7= + +sff_cpld_reg.mode_53_7=config +sff_cpld_reg.src_53_7=cpld +sff_cpld_reg.frmt_53_7=byte +sff_cpld_reg.pola_53_7= +sff_cpld_reg.addr_53_7=0x00040054 +sff_cpld_reg.len_53_7=1 +sff_cpld_reg.bit_offset_53_7= + +sff_cpld_reg.mode_54_7=config +sff_cpld_reg.src_54_7=cpld +sff_cpld_reg.frmt_54_7=byte +sff_cpld_reg.pola_54_7= +sff_cpld_reg.addr_54_7=0x00040055 +sff_cpld_reg.len_54_7=1 +sff_cpld_reg.bit_offset_54_7= + +sff_cpld_reg.mode_55_7=config +sff_cpld_reg.src_55_7=cpld +sff_cpld_reg.frmt_55_7=byte +sff_cpld_reg.pola_55_7= +sff_cpld_reg.addr_55_7=0x00040056 +sff_cpld_reg.len_55_7=1 +sff_cpld_reg.bit_offset_55_7= + +sff_cpld_reg.mode_56_7=config +sff_cpld_reg.src_56_7=cpld +sff_cpld_reg.frmt_56_7=byte +sff_cpld_reg.pola_56_7= +sff_cpld_reg.addr_56_7=0x00040057 +sff_cpld_reg.len_56_7=1 +sff_cpld_reg.bit_offset_56_7= + +sff_cpld_reg.mode_57_7=config +sff_cpld_reg.src_57_7=cpld +sff_cpld_reg.frmt_57_7=byte +sff_cpld_reg.pola_57_7= +sff_cpld_reg.addr_57_7=0x00040058 +sff_cpld_reg.len_57_7=1 +sff_cpld_reg.bit_offset_57_7= + +sff_cpld_reg.mode_58_7=config +sff_cpld_reg.src_58_7=cpld +sff_cpld_reg.frmt_58_7=byte +sff_cpld_reg.pola_58_7= +sff_cpld_reg.addr_58_7=0x00040059 +sff_cpld_reg.len_58_7=1 +sff_cpld_reg.bit_offset_58_7= + +sff_cpld_reg.mode_59_7=config +sff_cpld_reg.src_59_7=cpld +sff_cpld_reg.frmt_59_7=byte +sff_cpld_reg.pola_59_7= +sff_cpld_reg.addr_59_7=0x0004005a +sff_cpld_reg.len_59_7=1 +sff_cpld_reg.bit_offset_59_7= + +sff_cpld_reg.mode_60_7=config +sff_cpld_reg.src_60_7=cpld +sff_cpld_reg.frmt_60_7=byte +sff_cpld_reg.pola_60_7= +sff_cpld_reg.addr_60_7=0x0004005b +sff_cpld_reg.len_60_7=1 +sff_cpld_reg.bit_offset_60_7= + +sff_cpld_reg.mode_61_7=config +sff_cpld_reg.src_61_7=cpld +sff_cpld_reg.frmt_61_7=byte +sff_cpld_reg.pola_61_7= +sff_cpld_reg.addr_61_7=0x0004005c +sff_cpld_reg.len_61_7=1 +sff_cpld_reg.bit_offset_61_7= + +sff_cpld_reg.mode_62_7=config +sff_cpld_reg.src_62_7=cpld +sff_cpld_reg.frmt_62_7=byte +sff_cpld_reg.pola_62_7= +sff_cpld_reg.addr_62_7=0x0004005d +sff_cpld_reg.len_62_7=1 +sff_cpld_reg.bit_offset_62_7= + +sff_cpld_reg.mode_63_7=config +sff_cpld_reg.src_63_7=cpld +sff_cpld_reg.frmt_63_7=byte +sff_cpld_reg.pola_63_7= +sff_cpld_reg.addr_63_7=0x0004005e +sff_cpld_reg.len_63_7=1 +sff_cpld_reg.bit_offset_63_7= + +sff_cpld_reg.mode_64_7=config +sff_cpld_reg.src_64_7=cpld +sff_cpld_reg.frmt_64_7=byte +sff_cpld_reg.pola_64_7= +sff_cpld_reg.addr_64_7=0x0004005f +sff_cpld_reg.len_64_7=1 +sff_cpld_reg.bit_offset_64_7= + + +# 1600G module module_present signal +sff_cpld_reg.mode_1_8=config +sff_cpld_reg.src_1_8=cpld +sff_cpld_reg.frmt_1_8=bit +sff_cpld_reg.pola_1_8=negative +sff_cpld_reg.addr_1_8=0x000400c0 +sff_cpld_reg.len_1_8=1 +sff_cpld_reg.bit_offset_1_8=0 + +sff_cpld_reg.mode_2_8=config +sff_cpld_reg.src_2_8=cpld +sff_cpld_reg.frmt_2_8=bit +sff_cpld_reg.pola_2_8=negative +sff_cpld_reg.addr_2_8=0x000400c0 +sff_cpld_reg.len_2_8=1 +sff_cpld_reg.bit_offset_2_8=1 + +sff_cpld_reg.mode_3_8=config +sff_cpld_reg.src_3_8=cpld +sff_cpld_reg.frmt_3_8=bit +sff_cpld_reg.pola_3_8=negative +sff_cpld_reg.addr_3_8=0x000200c0 +sff_cpld_reg.len_3_8=1 +sff_cpld_reg.bit_offset_3_8=0 + +sff_cpld_reg.mode_4_8=config +sff_cpld_reg.src_4_8=cpld +sff_cpld_reg.frmt_4_8=bit +sff_cpld_reg.pola_4_8=negative +sff_cpld_reg.addr_4_8=0x000200c0 +sff_cpld_reg.len_4_8=1 +sff_cpld_reg.bit_offset_4_8=1 + +sff_cpld_reg.mode_5_8=config +sff_cpld_reg.src_5_8=cpld +sff_cpld_reg.frmt_5_8=bit +sff_cpld_reg.pola_5_8=negative +sff_cpld_reg.addr_5_8=0x000400c0 +sff_cpld_reg.len_5_8=1 +sff_cpld_reg.bit_offset_5_8=2 + +sff_cpld_reg.mode_6_8=config +sff_cpld_reg.src_6_8=cpld +sff_cpld_reg.frmt_6_8=bit +sff_cpld_reg.pola_6_8=negative +sff_cpld_reg.addr_6_8=0x000400c0 +sff_cpld_reg.len_6_8=1 +sff_cpld_reg.bit_offset_6_8=3 + +sff_cpld_reg.mode_7_8=config +sff_cpld_reg.src_7_8=cpld +sff_cpld_reg.frmt_7_8=bit +sff_cpld_reg.pola_7_8=negative +sff_cpld_reg.addr_7_8=0x000200c0 +sff_cpld_reg.len_7_8=1 +sff_cpld_reg.bit_offset_7_8=2 + +sff_cpld_reg.mode_8_8=config +sff_cpld_reg.src_8_8=cpld +sff_cpld_reg.frmt_8_8=bit +sff_cpld_reg.pola_8_8=negative +sff_cpld_reg.addr_8_8=0x000200c0 +sff_cpld_reg.len_8_8=1 +sff_cpld_reg.bit_offset_8_8=3 + +sff_cpld_reg.mode_9_8=config +sff_cpld_reg.src_9_8=cpld +sff_cpld_reg.frmt_9_8=bit +sff_cpld_reg.pola_9_8=negative +sff_cpld_reg.addr_9_8=0x000400c0 +sff_cpld_reg.len_9_8=1 +sff_cpld_reg.bit_offset_9_8=4 + +sff_cpld_reg.mode_10_8=config +sff_cpld_reg.src_10_8=cpld +sff_cpld_reg.frmt_10_8=bit +sff_cpld_reg.pola_10_8=negative +sff_cpld_reg.addr_10_8=0x000400c0 +sff_cpld_reg.len_10_8=1 +sff_cpld_reg.bit_offset_10_8=5 + +sff_cpld_reg.mode_11_8=config +sff_cpld_reg.src_11_8=cpld +sff_cpld_reg.frmt_11_8=bit +sff_cpld_reg.pola_11_8=negative +sff_cpld_reg.addr_11_8=0x000200c0 +sff_cpld_reg.len_11_8=1 +sff_cpld_reg.bit_offset_11_8=4 + +sff_cpld_reg.mode_12_8=config +sff_cpld_reg.src_12_8=cpld +sff_cpld_reg.frmt_12_8=bit +sff_cpld_reg.pola_12_8=negative +sff_cpld_reg.addr_12_8=0x000200c0 +sff_cpld_reg.len_12_8=1 +sff_cpld_reg.bit_offset_12_8=5 + +sff_cpld_reg.mode_13_8=config +sff_cpld_reg.src_13_8=cpld +sff_cpld_reg.frmt_13_8=bit +sff_cpld_reg.pola_13_8=negative +sff_cpld_reg.addr_13_8=0x000400c0 +sff_cpld_reg.len_13_8=1 +sff_cpld_reg.bit_offset_13_8=6 + +sff_cpld_reg.mode_14_8=config +sff_cpld_reg.src_14_8=cpld +sff_cpld_reg.frmt_14_8=bit +sff_cpld_reg.pola_14_8=negative +sff_cpld_reg.addr_14_8=0x000400c0 +sff_cpld_reg.len_14_8=1 +sff_cpld_reg.bit_offset_14_8=7 + +sff_cpld_reg.mode_15_8=config +sff_cpld_reg.src_15_8=cpld +sff_cpld_reg.frmt_15_8=bit +sff_cpld_reg.pola_15_8=negative +sff_cpld_reg.addr_15_8=0x000200c0 +sff_cpld_reg.len_15_8=1 +sff_cpld_reg.bit_offset_15_8=6 + +sff_cpld_reg.mode_16_8=config +sff_cpld_reg.src_16_8=cpld +sff_cpld_reg.frmt_16_8=bit +sff_cpld_reg.pola_16_8=negative +sff_cpld_reg.addr_16_8=0x000200c0 +sff_cpld_reg.len_16_8=1 +sff_cpld_reg.bit_offset_16_8=7 + +sff_cpld_reg.mode_17_8=config +sff_cpld_reg.src_17_8=cpld +sff_cpld_reg.frmt_17_8=bit +sff_cpld_reg.pola_17_8=negative +sff_cpld_reg.addr_17_8=0x000400c1 +sff_cpld_reg.len_17_8=1 +sff_cpld_reg.bit_offset_17_8=0 + +sff_cpld_reg.mode_18_8=config +sff_cpld_reg.src_18_8=cpld +sff_cpld_reg.frmt_18_8=bit +sff_cpld_reg.pola_18_8=negative +sff_cpld_reg.addr_18_8=0x000400c1 +sff_cpld_reg.len_18_8=1 +sff_cpld_reg.bit_offset_18_8=1 + +sff_cpld_reg.mode_19_8=config +sff_cpld_reg.src_19_8=cpld +sff_cpld_reg.frmt_19_8=bit +sff_cpld_reg.pola_19_8=negative +sff_cpld_reg.addr_19_8=0x000200c1 +sff_cpld_reg.len_19_8=1 +sff_cpld_reg.bit_offset_19_8=0 + +sff_cpld_reg.mode_20_8=config +sff_cpld_reg.src_20_8=cpld +sff_cpld_reg.frmt_20_8=bit +sff_cpld_reg.pola_20_8=negative +sff_cpld_reg.addr_20_8=0x000200c1 +sff_cpld_reg.len_20_8=1 +sff_cpld_reg.bit_offset_20_8=1 + +sff_cpld_reg.mode_21_8=config +sff_cpld_reg.src_21_8=cpld +sff_cpld_reg.frmt_21_8=bit +sff_cpld_reg.pola_21_8=negative +sff_cpld_reg.addr_21_8=0x000400c1 +sff_cpld_reg.len_21_8=1 +sff_cpld_reg.bit_offset_21_8=2 + +sff_cpld_reg.mode_22_8=config +sff_cpld_reg.src_22_8=cpld +sff_cpld_reg.frmt_22_8=bit +sff_cpld_reg.pola_22_8=negative +sff_cpld_reg.addr_22_8=0x000400c1 +sff_cpld_reg.len_22_8=1 +sff_cpld_reg.bit_offset_22_8=3 + +sff_cpld_reg.mode_23_8=config +sff_cpld_reg.src_23_8=cpld +sff_cpld_reg.frmt_23_8=bit +sff_cpld_reg.pola_23_8=negative +sff_cpld_reg.addr_23_8=0x000200c1 +sff_cpld_reg.len_23_8=1 +sff_cpld_reg.bit_offset_23_8=2 + +sff_cpld_reg.mode_24_8=config +sff_cpld_reg.src_24_8=cpld +sff_cpld_reg.frmt_24_8=bit +sff_cpld_reg.pola_24_8=negative +sff_cpld_reg.addr_24_8=0x000200c1 +sff_cpld_reg.len_24_8=1 +sff_cpld_reg.bit_offset_24_8=3 + +sff_cpld_reg.mode_25_8=config +sff_cpld_reg.src_25_8=cpld +sff_cpld_reg.frmt_25_8=bit +sff_cpld_reg.pola_25_8=negative +sff_cpld_reg.addr_25_8=0x000400c1 +sff_cpld_reg.len_25_8=1 +sff_cpld_reg.bit_offset_25_8=4 + +sff_cpld_reg.mode_26_8=config +sff_cpld_reg.src_26_8=cpld +sff_cpld_reg.frmt_26_8=bit +sff_cpld_reg.pola_26_8=negative +sff_cpld_reg.addr_26_8=0x000400c1 +sff_cpld_reg.len_26_8=1 +sff_cpld_reg.bit_offset_26_8=5 + +sff_cpld_reg.mode_27_8=config +sff_cpld_reg.src_27_8=cpld +sff_cpld_reg.frmt_27_8=bit +sff_cpld_reg.pola_27_8=negative +sff_cpld_reg.addr_27_8=0x000200c1 +sff_cpld_reg.len_27_8=1 +sff_cpld_reg.bit_offset_27_8=4 + +sff_cpld_reg.mode_28_8=config +sff_cpld_reg.src_28_8=cpld +sff_cpld_reg.frmt_28_8=bit +sff_cpld_reg.pola_28_8=negative +sff_cpld_reg.addr_28_8=0x000200c1 +sff_cpld_reg.len_28_8=1 +sff_cpld_reg.bit_offset_28_8=5 + +sff_cpld_reg.mode_29_8=config +sff_cpld_reg.src_29_8=cpld +sff_cpld_reg.frmt_29_8=bit +sff_cpld_reg.pola_29_8=negative +sff_cpld_reg.addr_29_8=0x000400c1 +sff_cpld_reg.len_29_8=1 +sff_cpld_reg.bit_offset_29_8=6 + +sff_cpld_reg.mode_30_8=config +sff_cpld_reg.src_30_8=cpld +sff_cpld_reg.frmt_30_8=bit +sff_cpld_reg.pola_30_8=negative +sff_cpld_reg.addr_30_8=0x000400c1 +sff_cpld_reg.len_30_8=1 +sff_cpld_reg.bit_offset_30_8=7 + +sff_cpld_reg.mode_31_8=config +sff_cpld_reg.src_31_8=cpld +sff_cpld_reg.frmt_31_8=bit +sff_cpld_reg.pola_31_8=negative +sff_cpld_reg.addr_31_8=0x000200c1 +sff_cpld_reg.len_31_8=1 +sff_cpld_reg.bit_offset_31_8=6 + +sff_cpld_reg.mode_32_8=config +sff_cpld_reg.src_32_8=cpld +sff_cpld_reg.frmt_32_8=bit +sff_cpld_reg.pola_32_8=negative +sff_cpld_reg.addr_32_8=0x000200c1 +sff_cpld_reg.len_32_8=1 +sff_cpld_reg.bit_offset_32_8=7 + +sff_cpld_reg.mode_33_8=config +sff_cpld_reg.src_33_8=cpld +sff_cpld_reg.frmt_33_8=bit +sff_cpld_reg.pola_33_8=negative +sff_cpld_reg.addr_33_8=0x000400c2 +sff_cpld_reg.len_33_8=1 +sff_cpld_reg.bit_offset_33_8=0 + +sff_cpld_reg.mode_34_8=config +sff_cpld_reg.src_34_8=cpld +sff_cpld_reg.frmt_34_8=bit +sff_cpld_reg.pola_34_8=negative +sff_cpld_reg.addr_34_8=0x000400c2 +sff_cpld_reg.len_34_8=1 +sff_cpld_reg.bit_offset_34_8=1 + +sff_cpld_reg.mode_35_8=config +sff_cpld_reg.src_35_8=cpld +sff_cpld_reg.frmt_35_8=bit +sff_cpld_reg.pola_35_8=negative +sff_cpld_reg.addr_35_8=0x000200c2 +sff_cpld_reg.len_35_8=1 +sff_cpld_reg.bit_offset_35_8=0 + +sff_cpld_reg.mode_36_8=config +sff_cpld_reg.src_36_8=cpld +sff_cpld_reg.frmt_36_8=bit +sff_cpld_reg.pola_36_8=negative +sff_cpld_reg.addr_36_8=0x000200c2 +sff_cpld_reg.len_36_8=1 +sff_cpld_reg.bit_offset_36_8=1 + +sff_cpld_reg.mode_37_8=config +sff_cpld_reg.src_37_8=cpld +sff_cpld_reg.frmt_37_8=bit +sff_cpld_reg.pola_37_8=negative +sff_cpld_reg.addr_37_8=0x000400c2 +sff_cpld_reg.len_37_8=1 +sff_cpld_reg.bit_offset_37_8=2 + +sff_cpld_reg.mode_38_8=config +sff_cpld_reg.src_38_8=cpld +sff_cpld_reg.frmt_38_8=bit +sff_cpld_reg.pola_38_8=negative +sff_cpld_reg.addr_38_8=0x000400c2 +sff_cpld_reg.len_38_8=1 +sff_cpld_reg.bit_offset_38_8=3 + +sff_cpld_reg.mode_39_8=config +sff_cpld_reg.src_39_8=cpld +sff_cpld_reg.frmt_39_8=bit +sff_cpld_reg.pola_39_8=negative +sff_cpld_reg.addr_39_8=0x000200c2 +sff_cpld_reg.len_39_8=1 +sff_cpld_reg.bit_offset_39_8=2 + +sff_cpld_reg.mode_40_8=config +sff_cpld_reg.src_40_8=cpld +sff_cpld_reg.frmt_40_8=bit +sff_cpld_reg.pola_40_8=negative +sff_cpld_reg.addr_40_8=0x000200c2 +sff_cpld_reg.len_40_8=1 +sff_cpld_reg.bit_offset_40_8=3 + +sff_cpld_reg.mode_41_8=config +sff_cpld_reg.src_41_8=cpld +sff_cpld_reg.frmt_41_8=bit +sff_cpld_reg.pola_41_8=negative +sff_cpld_reg.addr_41_8=0x000400c2 +sff_cpld_reg.len_41_8=1 +sff_cpld_reg.bit_offset_41_8=4 + +sff_cpld_reg.mode_42_8=config +sff_cpld_reg.src_42_8=cpld +sff_cpld_reg.frmt_42_8=bit +sff_cpld_reg.pola_42_8=negative +sff_cpld_reg.addr_42_8=0x000400c2 +sff_cpld_reg.len_42_8=1 +sff_cpld_reg.bit_offset_42_8=5 + +sff_cpld_reg.mode_43_8=config +sff_cpld_reg.src_43_8=cpld +sff_cpld_reg.frmt_43_8=bit +sff_cpld_reg.pola_43_8=negative +sff_cpld_reg.addr_43_8=0x000200c2 +sff_cpld_reg.len_43_8=1 +sff_cpld_reg.bit_offset_43_8=4 + +sff_cpld_reg.mode_44_8=config +sff_cpld_reg.src_44_8=cpld +sff_cpld_reg.frmt_44_8=bit +sff_cpld_reg.pola_44_8=negative +sff_cpld_reg.addr_44_8=0x000200c2 +sff_cpld_reg.len_44_8=1 +sff_cpld_reg.bit_offset_44_8=5 + +sff_cpld_reg.mode_45_8=config +sff_cpld_reg.src_45_8=cpld +sff_cpld_reg.frmt_45_8=bit +sff_cpld_reg.pola_45_8=negative +sff_cpld_reg.addr_45_8=0x000400c2 +sff_cpld_reg.len_45_8=1 +sff_cpld_reg.bit_offset_45_8=6 + +sff_cpld_reg.mode_46_8=config +sff_cpld_reg.src_46_8=cpld +sff_cpld_reg.frmt_46_8=bit +sff_cpld_reg.pola_46_8=negative +sff_cpld_reg.addr_46_8=0x000400c2 +sff_cpld_reg.len_46_8=1 +sff_cpld_reg.bit_offset_46_8=7 + +sff_cpld_reg.mode_47_8=config +sff_cpld_reg.src_47_8=cpld +sff_cpld_reg.frmt_47_8=bit +sff_cpld_reg.pola_47_8=negative +sff_cpld_reg.addr_47_8=0x000200c2 +sff_cpld_reg.len_47_8=1 +sff_cpld_reg.bit_offset_47_8=6 + +sff_cpld_reg.mode_48_8=config +sff_cpld_reg.src_48_8=cpld +sff_cpld_reg.frmt_48_8=bit +sff_cpld_reg.pola_48_8=negative +sff_cpld_reg.addr_48_8=0x000200c2 +sff_cpld_reg.len_48_8=1 +sff_cpld_reg.bit_offset_48_8=7 + +sff_cpld_reg.mode_49_8=config +sff_cpld_reg.src_49_8=cpld +sff_cpld_reg.frmt_49_8=bit +sff_cpld_reg.pola_49_8=negative +sff_cpld_reg.addr_49_8=0x000400c3 +sff_cpld_reg.len_49_8=1 +sff_cpld_reg.bit_offset_49_8=0 + +sff_cpld_reg.mode_50_8=config +sff_cpld_reg.src_50_8=cpld +sff_cpld_reg.frmt_50_8=bit +sff_cpld_reg.pola_50_8=negative +sff_cpld_reg.addr_50_8=0x000400c3 +sff_cpld_reg.len_50_8=1 +sff_cpld_reg.bit_offset_50_8=1 + +sff_cpld_reg.mode_51_8=config +sff_cpld_reg.src_51_8=cpld +sff_cpld_reg.frmt_51_8=bit +sff_cpld_reg.pola_51_8=negative +sff_cpld_reg.addr_51_8=0x000200c3 +sff_cpld_reg.len_51_8=1 +sff_cpld_reg.bit_offset_51_8=0 + +sff_cpld_reg.mode_52_8=config +sff_cpld_reg.src_52_8=cpld +sff_cpld_reg.frmt_52_8=bit +sff_cpld_reg.pola_52_8=negative +sff_cpld_reg.addr_52_8=0x000200c3 +sff_cpld_reg.len_52_8=1 +sff_cpld_reg.bit_offset_52_8=1 + +sff_cpld_reg.mode_53_8=config +sff_cpld_reg.src_53_8=cpld +sff_cpld_reg.frmt_53_8=bit +sff_cpld_reg.pola_53_8=negative +sff_cpld_reg.addr_53_8=0x000400c3 +sff_cpld_reg.len_53_8=1 +sff_cpld_reg.bit_offset_53_8=2 + +sff_cpld_reg.mode_54_8=config +sff_cpld_reg.src_54_8=cpld +sff_cpld_reg.frmt_54_8=bit +sff_cpld_reg.pola_54_8=negative +sff_cpld_reg.addr_54_8=0x000400c3 +sff_cpld_reg.len_54_8=1 +sff_cpld_reg.bit_offset_54_8=3 + +sff_cpld_reg.mode_55_8=config +sff_cpld_reg.src_55_8=cpld +sff_cpld_reg.frmt_55_8=bit +sff_cpld_reg.pola_55_8=negative +sff_cpld_reg.addr_55_8=0x000200c3 +sff_cpld_reg.len_55_8=1 +sff_cpld_reg.bit_offset_55_8=2 + +sff_cpld_reg.mode_56_8=config +sff_cpld_reg.src_56_8=cpld +sff_cpld_reg.frmt_56_8=bit +sff_cpld_reg.pola_56_8=negative +sff_cpld_reg.addr_56_8=0x000200c3 +sff_cpld_reg.len_56_8=1 +sff_cpld_reg.bit_offset_56_8=3 + +sff_cpld_reg.mode_57_8=config +sff_cpld_reg.src_57_8=cpld +sff_cpld_reg.frmt_57_8=bit +sff_cpld_reg.pola_57_8=negative +sff_cpld_reg.addr_57_8=0x000400c3 +sff_cpld_reg.len_57_8=1 +sff_cpld_reg.bit_offset_57_8=4 + +sff_cpld_reg.mode_58_8=config +sff_cpld_reg.src_58_8=cpld +sff_cpld_reg.frmt_58_8=bit +sff_cpld_reg.pola_58_8=negative +sff_cpld_reg.addr_58_8=0x000400c3 +sff_cpld_reg.len_58_8=1 +sff_cpld_reg.bit_offset_58_8=5 + +sff_cpld_reg.mode_59_8=config +sff_cpld_reg.src_59_8=cpld +sff_cpld_reg.frmt_59_8=bit +sff_cpld_reg.pola_59_8=negative +sff_cpld_reg.addr_59_8=0x000200c3 +sff_cpld_reg.len_59_8=1 +sff_cpld_reg.bit_offset_59_8=4 + +sff_cpld_reg.mode_60_8=config +sff_cpld_reg.src_60_8=cpld +sff_cpld_reg.frmt_60_8=bit +sff_cpld_reg.pola_60_8=negative +sff_cpld_reg.addr_60_8=0x000200c3 +sff_cpld_reg.len_60_8=1 +sff_cpld_reg.bit_offset_60_8=5 + +sff_cpld_reg.mode_61_8=config +sff_cpld_reg.src_61_8=cpld +sff_cpld_reg.frmt_61_8=bit +sff_cpld_reg.pola_61_8=negative +sff_cpld_reg.addr_61_8=0x000400c3 +sff_cpld_reg.len_61_8=1 +sff_cpld_reg.bit_offset_61_8=6 + +sff_cpld_reg.mode_62_8=config +sff_cpld_reg.src_62_8=cpld +sff_cpld_reg.frmt_62_8=bit +sff_cpld_reg.pola_62_8=negative +sff_cpld_reg.addr_62_8=0x000400c3 +sff_cpld_reg.len_62_8=1 +sff_cpld_reg.bit_offset_62_8=7 + +sff_cpld_reg.mode_63_8=config +sff_cpld_reg.src_63_8=cpld +sff_cpld_reg.frmt_63_8=bit +sff_cpld_reg.pola_63_8=negative +sff_cpld_reg.addr_63_8=0x000200c3 +sff_cpld_reg.len_63_8=1 +sff_cpld_reg.bit_offset_63_8=6 + +sff_cpld_reg.mode_64_8=config +sff_cpld_reg.src_64_8=cpld +sff_cpld_reg.frmt_64_8=bit +sff_cpld_reg.pola_64_8=negative +sff_cpld_reg.addr_64_8=0x000200c3 +sff_cpld_reg.len_64_8=1 +sff_cpld_reg.bit_offset_64_8=7 + +sff_cpld_reg.mode_65_8=config +sff_cpld_reg.src_65_8=cpld +sff_cpld_reg.frmt_65_8=bit +sff_cpld_reg.pola_65_8=negative +sff_cpld_reg.addr_65_8=0x00030075 +sff_cpld_reg.len_65_8=1 +sff_cpld_reg.bit_offset_65_8=0 + +sff_cpld_reg.mode_66_8=config +sff_cpld_reg.src_66_8=cpld +sff_cpld_reg.frmt_66_8=bit +sff_cpld_reg.pola_66_8=negative +sff_cpld_reg.addr_66_8=0x00030075 +sff_cpld_reg.len_66_8=1 +sff_cpld_reg.bit_offset_66_8=1 + + +# 1600G module power_on signal +sff_cpld_reg.mode_1_1=config +sff_cpld_reg.src_1_1=cpld +sff_cpld_reg.frmt_1_1=byte +sff_cpld_reg.addr_1_1=0x00030042 +sff_cpld_reg.len_1_1=1 +sff_cpld_reg.bit_offset_1_1= + +sff_cpld_reg.mode_2_1=config +sff_cpld_reg.src_2_1=cpld +sff_cpld_reg.frmt_2_1=byte +sff_cpld_reg.addr_2_1=0x00030042 +sff_cpld_reg.len_2_1=1 +sff_cpld_reg.bit_offset_2_1= + +sff_cpld_reg.mode_3_1=config +sff_cpld_reg.src_3_1=cpld +sff_cpld_reg.frmt_3_1=byte +sff_cpld_reg.addr_3_1=0x00030042 +sff_cpld_reg.len_3_1=1 +sff_cpld_reg.bit_offset_3_1= + +sff_cpld_reg.mode_4_1=config +sff_cpld_reg.src_4_1=cpld +sff_cpld_reg.frmt_4_1=byte +sff_cpld_reg.addr_4_1=0x00030042 +sff_cpld_reg.len_4_1=1 +sff_cpld_reg.bit_offset_4_1= + +sff_cpld_reg.mode_5_1=config +sff_cpld_reg.src_5_1=cpld +sff_cpld_reg.frmt_5_1=byte +sff_cpld_reg.addr_5_1=0x00030042 +sff_cpld_reg.len_5_1=1 +sff_cpld_reg.bit_offset_5_1= + +sff_cpld_reg.mode_6_1=config +sff_cpld_reg.src_6_1=cpld +sff_cpld_reg.frmt_6_1=byte +sff_cpld_reg.addr_6_1=0x00030042 +sff_cpld_reg.len_6_1=1 +sff_cpld_reg.bit_offset_6_1= + +sff_cpld_reg.mode_7_1=config +sff_cpld_reg.src_7_1=cpld +sff_cpld_reg.frmt_7_1=byte +sff_cpld_reg.addr_7_1=0x00030042 +sff_cpld_reg.len_7_1=1 +sff_cpld_reg.bit_offset_7_1= + +sff_cpld_reg.mode_8_1=config +sff_cpld_reg.src_8_1=cpld +sff_cpld_reg.frmt_8_1=byte +sff_cpld_reg.addr_8_1=0x00030042 +sff_cpld_reg.len_8_1=1 +sff_cpld_reg.bit_offset_8_1= + +sff_cpld_reg.mode_9_1=config +sff_cpld_reg.src_9_1=cpld +sff_cpld_reg.frmt_9_1=byte +sff_cpld_reg.addr_9_1=0x00030043 +sff_cpld_reg.len_9_1=1 +sff_cpld_reg.bit_offset_9_1= + +sff_cpld_reg.mode_10_1=config +sff_cpld_reg.src_10_1=cpld +sff_cpld_reg.frmt_10_1=byte +sff_cpld_reg.addr_10_1=0x00030043 +sff_cpld_reg.len_10_1=1 +sff_cpld_reg.bit_offset_10_1= + +sff_cpld_reg.mode_11_1=config +sff_cpld_reg.src_11_1=cpld +sff_cpld_reg.frmt_11_1=byte +sff_cpld_reg.addr_11_1=0x00030043 +sff_cpld_reg.len_11_1=1 +sff_cpld_reg.bit_offset_11_1= + +sff_cpld_reg.mode_12_1=config +sff_cpld_reg.src_12_1=cpld +sff_cpld_reg.frmt_12_1=byte +sff_cpld_reg.addr_12_1=0x00030043 +sff_cpld_reg.len_12_1=1 +sff_cpld_reg.bit_offset_12_1= + +sff_cpld_reg.mode_13_1=config +sff_cpld_reg.src_13_1=cpld +sff_cpld_reg.frmt_13_1=byte +sff_cpld_reg.addr_13_1=0x00030043 +sff_cpld_reg.len_13_1=1 +sff_cpld_reg.bit_offset_13_1= + +sff_cpld_reg.mode_14_1=config +sff_cpld_reg.src_14_1=cpld +sff_cpld_reg.frmt_14_1=byte +sff_cpld_reg.addr_14_1=0x00030043 +sff_cpld_reg.len_14_1=1 +sff_cpld_reg.bit_offset_14_1= + +sff_cpld_reg.mode_15_1=config +sff_cpld_reg.src_15_1=cpld +sff_cpld_reg.frmt_15_1=byte +sff_cpld_reg.addr_15_1=0x00030043 +sff_cpld_reg.len_15_1=1 +sff_cpld_reg.bit_offset_15_1= + +sff_cpld_reg.mode_16_1=config +sff_cpld_reg.src_16_1=cpld +sff_cpld_reg.frmt_16_1=byte +sff_cpld_reg.addr_16_1=0x00030043 +sff_cpld_reg.len_16_1=1 +sff_cpld_reg.bit_offset_16_1= + +sff_cpld_reg.mode_17_1=config +sff_cpld_reg.src_17_1=cpld +sff_cpld_reg.frmt_17_1=byte +sff_cpld_reg.addr_17_1=0x00030044 +sff_cpld_reg.len_17_1=1 +sff_cpld_reg.bit_offset_17_1= + +sff_cpld_reg.mode_18_1=config +sff_cpld_reg.src_18_1=cpld +sff_cpld_reg.frmt_18_1=byte +sff_cpld_reg.addr_18_1=0x00030044 +sff_cpld_reg.len_18_1=1 +sff_cpld_reg.bit_offset_18_1= + +sff_cpld_reg.mode_19_1=config +sff_cpld_reg.src_19_1=cpld +sff_cpld_reg.frmt_19_1=byte +sff_cpld_reg.addr_19_1=0x00030044 +sff_cpld_reg.len_19_1=1 +sff_cpld_reg.bit_offset_19_1= + +sff_cpld_reg.mode_20_1=config +sff_cpld_reg.src_20_1=cpld +sff_cpld_reg.frmt_20_1=byte +sff_cpld_reg.addr_20_1=0x00030044 +sff_cpld_reg.len_20_1=1 +sff_cpld_reg.bit_offset_20_1= + +sff_cpld_reg.mode_21_1=config +sff_cpld_reg.src_21_1=cpld +sff_cpld_reg.frmt_21_1=byte +sff_cpld_reg.addr_21_1=0x00030044 +sff_cpld_reg.len_21_1=1 +sff_cpld_reg.bit_offset_21_1= + +sff_cpld_reg.mode_22_1=config +sff_cpld_reg.src_22_1=cpld +sff_cpld_reg.frmt_22_1=byte +sff_cpld_reg.addr_22_1=0x00030044 +sff_cpld_reg.len_22_1=1 +sff_cpld_reg.bit_offset_22_1= + +sff_cpld_reg.mode_23_1=config +sff_cpld_reg.src_23_1=cpld +sff_cpld_reg.frmt_23_1=byte +sff_cpld_reg.addr_23_1=0x00030044 +sff_cpld_reg.len_23_1=1 +sff_cpld_reg.bit_offset_23_1= + +sff_cpld_reg.mode_24_1=config +sff_cpld_reg.src_24_1=cpld +sff_cpld_reg.frmt_24_1=byte +sff_cpld_reg.addr_24_1=0x00030044 +sff_cpld_reg.len_24_1=1 +sff_cpld_reg.bit_offset_24_1= + +sff_cpld_reg.mode_25_1=config +sff_cpld_reg.src_25_1=cpld +sff_cpld_reg.frmt_25_1=byte +sff_cpld_reg.addr_25_1=0x00030045 +sff_cpld_reg.len_25_1=1 +sff_cpld_reg.bit_offset_25_1= + +sff_cpld_reg.mode_26_1=config +sff_cpld_reg.src_26_1=cpld +sff_cpld_reg.frmt_26_1=byte +sff_cpld_reg.addr_26_1=0x00030045 +sff_cpld_reg.len_26_1=1 +sff_cpld_reg.bit_offset_26_1= + +sff_cpld_reg.mode_27_1=config +sff_cpld_reg.src_27_1=cpld +sff_cpld_reg.frmt_27_1=byte +sff_cpld_reg.addr_27_1=0x00030045 +sff_cpld_reg.len_27_1=1 +sff_cpld_reg.bit_offset_27_1= + +sff_cpld_reg.mode_28_1=config +sff_cpld_reg.src_28_1=cpld +sff_cpld_reg.frmt_28_1=byte +sff_cpld_reg.addr_28_1=0x00030045 +sff_cpld_reg.len_28_1=1 +sff_cpld_reg.bit_offset_28_1= + +sff_cpld_reg.mode_29_1=config +sff_cpld_reg.src_29_1=cpld +sff_cpld_reg.frmt_29_1=byte +sff_cpld_reg.addr_29_1=0x00030045 +sff_cpld_reg.len_29_1=1 +sff_cpld_reg.bit_offset_29_1= + +sff_cpld_reg.mode_30_1=config +sff_cpld_reg.src_30_1=cpld +sff_cpld_reg.frmt_30_1=byte +sff_cpld_reg.addr_30_1=0x00030045 +sff_cpld_reg.len_30_1=1 +sff_cpld_reg.bit_offset_30_1= + +sff_cpld_reg.mode_31_1=config +sff_cpld_reg.src_31_1=cpld +sff_cpld_reg.frmt_31_1=byte +sff_cpld_reg.addr_31_1=0x00030045 +sff_cpld_reg.len_31_1=1 +sff_cpld_reg.bit_offset_31_1= + +sff_cpld_reg.mode_32_1=config +sff_cpld_reg.src_32_1=cpld +sff_cpld_reg.frmt_32_1=byte +sff_cpld_reg.addr_32_1=0x00030045 +sff_cpld_reg.len_32_1=1 +sff_cpld_reg.bit_offset_32_1= + +sff_cpld_reg.mode_33_1=config +sff_cpld_reg.src_33_1=cpld +sff_cpld_reg.frmt_33_1=byte +sff_cpld_reg.addr_33_1=0x00030040 +sff_cpld_reg.len_33_1=1 +sff_cpld_reg.bit_offset_33_1= + +sff_cpld_reg.mode_34_1=config +sff_cpld_reg.src_34_1=cpld +sff_cpld_reg.frmt_34_1=byte +sff_cpld_reg.addr_34_1=0x00030040 +sff_cpld_reg.len_34_1=1 +sff_cpld_reg.bit_offset_34_1= + +sff_cpld_reg.mode_35_1=config +sff_cpld_reg.src_35_1=cpld +sff_cpld_reg.frmt_35_1=byte +sff_cpld_reg.addr_35_1=0x00030040 +sff_cpld_reg.len_35_1=1 +sff_cpld_reg.bit_offset_35_1= + +sff_cpld_reg.mode_36_1=config +sff_cpld_reg.src_36_1=cpld +sff_cpld_reg.frmt_36_1=byte +sff_cpld_reg.addr_36_1=0x00030040 +sff_cpld_reg.len_36_1=1 +sff_cpld_reg.bit_offset_36_1= + +sff_cpld_reg.mode_37_1=config +sff_cpld_reg.src_37_1=cpld +sff_cpld_reg.frmt_37_1=byte +sff_cpld_reg.addr_37_1=0x00030040 +sff_cpld_reg.len_37_1=1 +sff_cpld_reg.bit_offset_37_1= + +sff_cpld_reg.mode_38_1=config +sff_cpld_reg.src_38_1=cpld +sff_cpld_reg.frmt_38_1=byte +sff_cpld_reg.addr_38_1=0x00030040 +sff_cpld_reg.len_38_1=1 +sff_cpld_reg.bit_offset_38_1= + +sff_cpld_reg.mode_39_1=config +sff_cpld_reg.src_39_1=cpld +sff_cpld_reg.frmt_39_1=byte +sff_cpld_reg.addr_39_1=0x00030040 +sff_cpld_reg.len_39_1=1 +sff_cpld_reg.bit_offset_39_1= + +sff_cpld_reg.mode_40_1=config +sff_cpld_reg.src_40_1=cpld +sff_cpld_reg.frmt_40_1=byte +sff_cpld_reg.addr_40_1=0x00030040 +sff_cpld_reg.len_40_1=1 +sff_cpld_reg.bit_offset_40_1= + +sff_cpld_reg.mode_41_1=config +sff_cpld_reg.src_41_1=cpld +sff_cpld_reg.frmt_41_1=byte +sff_cpld_reg.addr_41_1=0x00030040 +sff_cpld_reg.len_41_1=1 +sff_cpld_reg.bit_offset_41_1= + +sff_cpld_reg.mode_42_1=config +sff_cpld_reg.src_42_1=cpld +sff_cpld_reg.frmt_42_1=byte +sff_cpld_reg.addr_42_1=0x00030040 +sff_cpld_reg.len_42_1=1 +sff_cpld_reg.bit_offset_42_1= + +sff_cpld_reg.mode_43_1=config +sff_cpld_reg.src_43_1=cpld +sff_cpld_reg.frmt_43_1=byte +sff_cpld_reg.addr_43_1=0x00030040 +sff_cpld_reg.len_43_1=1 +sff_cpld_reg.bit_offset_43_1= + +sff_cpld_reg.mode_44_1=config +sff_cpld_reg.src_44_1=cpld +sff_cpld_reg.frmt_44_1=byte +sff_cpld_reg.addr_44_1=0x00030040 +sff_cpld_reg.len_44_1=1 +sff_cpld_reg.bit_offset_44_1= + +sff_cpld_reg.mode_45_1=config +sff_cpld_reg.src_45_1=cpld +sff_cpld_reg.frmt_45_1=byte +sff_cpld_reg.addr_45_1=0x00030040 +sff_cpld_reg.len_45_1=1 +sff_cpld_reg.bit_offset_45_1= + +sff_cpld_reg.mode_46_1=config +sff_cpld_reg.src_46_1=cpld +sff_cpld_reg.frmt_46_1=byte +sff_cpld_reg.addr_46_1=0x00030040 +sff_cpld_reg.len_46_1=1 +sff_cpld_reg.bit_offset_46_1= + +sff_cpld_reg.mode_47_1=config +sff_cpld_reg.src_47_1=cpld +sff_cpld_reg.frmt_47_1=byte +sff_cpld_reg.addr_47_1=0x00030040 +sff_cpld_reg.len_47_1=1 +sff_cpld_reg.bit_offset_47_1= + +sff_cpld_reg.mode_48_1=config +sff_cpld_reg.src_48_1=cpld +sff_cpld_reg.frmt_48_1=byte +sff_cpld_reg.addr_48_1=0x00030040 +sff_cpld_reg.len_48_1=1 +sff_cpld_reg.bit_offset_48_1= + +sff_cpld_reg.mode_49_1=config +sff_cpld_reg.src_49_1=cpld +sff_cpld_reg.frmt_49_1=byte +sff_cpld_reg.addr_49_1=0x00030041 +sff_cpld_reg.len_49_1=1 +sff_cpld_reg.bit_offset_49_1= + +sff_cpld_reg.mode_50_1=config +sff_cpld_reg.src_50_1=cpld +sff_cpld_reg.frmt_50_1=byte +sff_cpld_reg.addr_50_1=0x00030041 +sff_cpld_reg.len_50_1=1 +sff_cpld_reg.bit_offset_50_1= + +sff_cpld_reg.mode_51_1=config +sff_cpld_reg.src_51_1=cpld +sff_cpld_reg.frmt_51_1=byte +sff_cpld_reg.addr_51_1=0x00030041 +sff_cpld_reg.len_51_1=1 +sff_cpld_reg.bit_offset_51_1= + +sff_cpld_reg.mode_52_1=config +sff_cpld_reg.src_52_1=cpld +sff_cpld_reg.frmt_52_1=byte +sff_cpld_reg.addr_52_1=0x00030041 +sff_cpld_reg.len_52_1=1 +sff_cpld_reg.bit_offset_52_1= + +sff_cpld_reg.mode_53_1=config +sff_cpld_reg.src_53_1=cpld +sff_cpld_reg.frmt_53_1=byte +sff_cpld_reg.addr_53_1=0x00030041 +sff_cpld_reg.len_53_1=1 +sff_cpld_reg.bit_offset_53_1= + +sff_cpld_reg.mode_54_1=config +sff_cpld_reg.src_54_1=cpld +sff_cpld_reg.frmt_54_1=byte +sff_cpld_reg.addr_54_1=0x00030041 +sff_cpld_reg.len_54_1=1 +sff_cpld_reg.bit_offset_54_1= + +sff_cpld_reg.mode_55_1=config +sff_cpld_reg.src_55_1=cpld +sff_cpld_reg.frmt_55_1=byte +sff_cpld_reg.addr_55_1=0x00030041 +sff_cpld_reg.len_55_1=1 +sff_cpld_reg.bit_offset_55_1= + +sff_cpld_reg.mode_56_1=config +sff_cpld_reg.src_56_1=cpld +sff_cpld_reg.frmt_56_1=byte +sff_cpld_reg.addr_56_1=0x00030041 +sff_cpld_reg.len_56_1=1 +sff_cpld_reg.bit_offset_56_1= + +sff_cpld_reg.mode_57_1=config +sff_cpld_reg.src_57_1=cpld +sff_cpld_reg.frmt_57_1=byte +sff_cpld_reg.addr_57_1=0x00030041 +sff_cpld_reg.len_57_1=1 +sff_cpld_reg.bit_offset_57_1= + +sff_cpld_reg.mode_58_1=config +sff_cpld_reg.src_58_1=cpld +sff_cpld_reg.frmt_58_1=byte +sff_cpld_reg.addr_58_1=0x00030041 +sff_cpld_reg.len_58_1=1 +sff_cpld_reg.bit_offset_58_1= + +sff_cpld_reg.mode_59_1=config +sff_cpld_reg.src_59_1=cpld +sff_cpld_reg.frmt_59_1=byte +sff_cpld_reg.addr_59_1=0x00030041 +sff_cpld_reg.len_59_1=1 +sff_cpld_reg.bit_offset_59_1= + +sff_cpld_reg.mode_60_1=config +sff_cpld_reg.src_60_1=cpld +sff_cpld_reg.frmt_60_1=byte +sff_cpld_reg.addr_60_1=0x00030041 +sff_cpld_reg.len_60_1=1 +sff_cpld_reg.bit_offset_60_1= + +sff_cpld_reg.mode_61_1=config +sff_cpld_reg.src_61_1=cpld +sff_cpld_reg.frmt_61_1=byte +sff_cpld_reg.addr_61_1=0x00030041 +sff_cpld_reg.len_61_1=1 +sff_cpld_reg.bit_offset_61_1= + +sff_cpld_reg.mode_62_1=config +sff_cpld_reg.src_62_1=cpld +sff_cpld_reg.frmt_62_1=byte +sff_cpld_reg.addr_62_1=0x00030041 +sff_cpld_reg.len_62_1=1 +sff_cpld_reg.bit_offset_62_1= + +sff_cpld_reg.mode_63_1=config +sff_cpld_reg.src_63_1=cpld +sff_cpld_reg.frmt_63_1=byte +sff_cpld_reg.addr_63_1=0x00030041 +sff_cpld_reg.len_63_1=1 +sff_cpld_reg.bit_offset_63_1= + +sff_cpld_reg.mode_64_1=config +sff_cpld_reg.src_64_1=cpld +sff_cpld_reg.frmt_64_1=byte +sff_cpld_reg.addr_64_1=0x00030041 +sff_cpld_reg.len_64_1=1 +sff_cpld_reg.bit_offset_64_1= + + +# interrupt +sff_cpld_reg.mode_1_9=config +sff_cpld_reg.src_1_9=cpld +sff_cpld_reg.frmt_1_9=bit +sff_cpld_reg.pola_1_9=negative +sff_cpld_reg.addr_1_9=0x000200b3 +sff_cpld_reg.len_1_9=1 +sff_cpld_reg.bit_offset_1_9=0 + +sff_cpld_reg.mode_2_9=config +sff_cpld_reg.src_2_9=cpld +sff_cpld_reg.frmt_2_9=bit +sff_cpld_reg.pola_2_9=negative +sff_cpld_reg.addr_2_9=0x000200b3 +sff_cpld_reg.len_2_9=1 +sff_cpld_reg.bit_offset_2_9=1 + +sff_cpld_reg.mode_3_9=config +sff_cpld_reg.src_3_9=cpld +sff_cpld_reg.frmt_3_9=bit +sff_cpld_reg.pola_3_9=negative +sff_cpld_reg.addr_3_9=0x000200b3 +sff_cpld_reg.len_3_9=1 +sff_cpld_reg.bit_offset_3_9=2 + +sff_cpld_reg.mode_4_9=config +sff_cpld_reg.src_4_9=cpld +sff_cpld_reg.frmt_4_9=bit +sff_cpld_reg.pola_4_9=negative +sff_cpld_reg.addr_4_9=0x000200b3 +sff_cpld_reg.len_4_9=1 +sff_cpld_reg.bit_offset_4_9=3 + +sff_cpld_reg.mode_5_9=config +sff_cpld_reg.src_5_9=cpld +sff_cpld_reg.frmt_5_9=bit +sff_cpld_reg.pola_5_9=negative +sff_cpld_reg.addr_5_9=0x000200b3 +sff_cpld_reg.len_5_9=1 +sff_cpld_reg.bit_offset_5_9=4 + +sff_cpld_reg.mode_6_9=config +sff_cpld_reg.src_6_9=cpld +sff_cpld_reg.frmt_6_9=bit +sff_cpld_reg.pola_6_9=negative +sff_cpld_reg.addr_6_9=0x000200b3 +sff_cpld_reg.len_6_9=1 +sff_cpld_reg.bit_offset_6_9=5 + +sff_cpld_reg.mode_7_9=config +sff_cpld_reg.src_7_9=cpld +sff_cpld_reg.frmt_7_9=bit +sff_cpld_reg.pola_7_9=negative +sff_cpld_reg.addr_7_9=0x000200b3 +sff_cpld_reg.len_7_9=1 +sff_cpld_reg.bit_offset_7_9=6 + +sff_cpld_reg.mode_8_9=config +sff_cpld_reg.src_8_9=cpld +sff_cpld_reg.frmt_8_9=bit +sff_cpld_reg.pola_8_9=negative +sff_cpld_reg.addr_8_9=0x000200b3 +sff_cpld_reg.len_8_9=1 +sff_cpld_reg.bit_offset_8_9=7 + +sff_cpld_reg.mode_9_9=config +sff_cpld_reg.src_9_9=cpld +sff_cpld_reg.frmt_9_9=bit +sff_cpld_reg.pola_9_9=negative +sff_cpld_reg.addr_9_9=0x000200b5 +sff_cpld_reg.len_9_9=1 +sff_cpld_reg.bit_offset_9_9=0 + +sff_cpld_reg.mode_10_9=config +sff_cpld_reg.src_10_9=cpld +sff_cpld_reg.frmt_10_9=bit +sff_cpld_reg.pola_10_9=negative +sff_cpld_reg.addr_10_9=0x000200b5 +sff_cpld_reg.len_10_9=1 +sff_cpld_reg.bit_offset_10_9=1 + +sff_cpld_reg.mode_11_9=config +sff_cpld_reg.src_11_9=cpld +sff_cpld_reg.frmt_11_9=bit +sff_cpld_reg.pola_11_9=negative +sff_cpld_reg.addr_11_9=0x000200b5 +sff_cpld_reg.len_11_9=1 +sff_cpld_reg.bit_offset_11_9=2 + +sff_cpld_reg.mode_12_9=config +sff_cpld_reg.src_12_9=cpld +sff_cpld_reg.frmt_12_9=bit +sff_cpld_reg.pola_12_9=negative +sff_cpld_reg.addr_12_9=0x000200b5 +sff_cpld_reg.len_12_9=1 +sff_cpld_reg.bit_offset_12_9=3 + +sff_cpld_reg.mode_13_9=config +sff_cpld_reg.src_13_9=cpld +sff_cpld_reg.frmt_13_9=bit +sff_cpld_reg.pola_13_9=negative +sff_cpld_reg.addr_13_9=0x000200b5 +sff_cpld_reg.len_13_9=1 +sff_cpld_reg.bit_offset_13_9=4 + +sff_cpld_reg.mode_14_9=config +sff_cpld_reg.src_14_9=cpld +sff_cpld_reg.frmt_14_9=bit +sff_cpld_reg.pola_14_9=negative +sff_cpld_reg.addr_14_9=0x000200b5 +sff_cpld_reg.len_14_9=1 +sff_cpld_reg.bit_offset_14_9=5 + +sff_cpld_reg.mode_15_9=config +sff_cpld_reg.src_15_9=cpld +sff_cpld_reg.frmt_15_9=bit +sff_cpld_reg.pola_15_9=negative +sff_cpld_reg.addr_15_9=0x000200b5 +sff_cpld_reg.len_15_9=1 +sff_cpld_reg.bit_offset_15_9=6 + +sff_cpld_reg.mode_16_9=config +sff_cpld_reg.src_16_9=cpld +sff_cpld_reg.frmt_16_9=bit +sff_cpld_reg.pola_16_9=negative +sff_cpld_reg.addr_16_9=0x000200b5 +sff_cpld_reg.len_16_9=1 +sff_cpld_reg.bit_offset_16_9=7 + +sff_cpld_reg.mode_17_9=config +sff_cpld_reg.src_17_9=cpld +sff_cpld_reg.frmt_17_9=bit +sff_cpld_reg.pola_17_9=negative +sff_cpld_reg.addr_17_9=0x000200b7 +sff_cpld_reg.len_17_9=1 +sff_cpld_reg.bit_offset_17_9=0 + +sff_cpld_reg.mode_18_9=config +sff_cpld_reg.src_18_9=cpld +sff_cpld_reg.frmt_18_9=bit +sff_cpld_reg.pola_18_9=negative +sff_cpld_reg.addr_18_9=0x000200b7 +sff_cpld_reg.len_18_9=1 +sff_cpld_reg.bit_offset_18_9=1 + +sff_cpld_reg.mode_19_9=config +sff_cpld_reg.src_19_9=cpld +sff_cpld_reg.frmt_19_9=bit +sff_cpld_reg.pola_19_9=negative +sff_cpld_reg.addr_19_9=0x000200b7 +sff_cpld_reg.len_19_9=1 +sff_cpld_reg.bit_offset_19_9=2 + +sff_cpld_reg.mode_20_9=config +sff_cpld_reg.src_20_9=cpld +sff_cpld_reg.frmt_20_9=bit +sff_cpld_reg.pola_20_9=negative +sff_cpld_reg.addr_20_9=0x000200b7 +sff_cpld_reg.len_20_9=1 +sff_cpld_reg.bit_offset_20_9=3 + +sff_cpld_reg.mode_21_9=config +sff_cpld_reg.src_21_9=cpld +sff_cpld_reg.frmt_21_9=bit +sff_cpld_reg.pola_21_9=negative +sff_cpld_reg.addr_21_9=0x000200b7 +sff_cpld_reg.len_21_9=1 +sff_cpld_reg.bit_offset_21_9=4 + +sff_cpld_reg.mode_22_9=config +sff_cpld_reg.src_22_9=cpld +sff_cpld_reg.frmt_22_9=bit +sff_cpld_reg.pola_22_9=negative +sff_cpld_reg.addr_22_9=0x000200b7 +sff_cpld_reg.len_22_9=1 +sff_cpld_reg.bit_offset_22_9=5 + +sff_cpld_reg.mode_23_9=config +sff_cpld_reg.src_23_9=cpld +sff_cpld_reg.frmt_23_9=bit +sff_cpld_reg.pola_23_9=negative +sff_cpld_reg.addr_23_9=0x000200b7 +sff_cpld_reg.len_23_9=1 +sff_cpld_reg.bit_offset_23_9=6 + +sff_cpld_reg.mode_24_9=config +sff_cpld_reg.src_24_9=cpld +sff_cpld_reg.frmt_24_9=bit +sff_cpld_reg.pola_24_9=negative +sff_cpld_reg.addr_24_9=0x000200b7 +sff_cpld_reg.len_24_9=1 +sff_cpld_reg.bit_offset_24_9=7 + +sff_cpld_reg.mode_25_9=config +sff_cpld_reg.src_25_9=cpld +sff_cpld_reg.frmt_25_9=bit +sff_cpld_reg.pola_25_9=negative +sff_cpld_reg.addr_25_9=0x000200b9 +sff_cpld_reg.len_25_9=1 +sff_cpld_reg.bit_offset_25_9=0 + +sff_cpld_reg.mode_26_9=config +sff_cpld_reg.src_26_9=cpld +sff_cpld_reg.frmt_26_9=bit +sff_cpld_reg.pola_26_9=negative +sff_cpld_reg.addr_26_9=0x000200b9 +sff_cpld_reg.len_26_9=1 +sff_cpld_reg.bit_offset_26_9=1 + +sff_cpld_reg.mode_27_9=config +sff_cpld_reg.src_27_9=cpld +sff_cpld_reg.frmt_27_9=bit +sff_cpld_reg.pola_27_9=negative +sff_cpld_reg.addr_27_9=0x000200b9 +sff_cpld_reg.len_27_9=1 +sff_cpld_reg.bit_offset_27_9=2 + +sff_cpld_reg.mode_28_9=config +sff_cpld_reg.src_28_9=cpld +sff_cpld_reg.frmt_28_9=bit +sff_cpld_reg.pola_28_9=negative +sff_cpld_reg.addr_28_9=0x000200b9 +sff_cpld_reg.len_28_9=1 +sff_cpld_reg.bit_offset_28_9=3 + +sff_cpld_reg.mode_29_9=config +sff_cpld_reg.src_29_9=cpld +sff_cpld_reg.frmt_29_9=bit +sff_cpld_reg.pola_29_9=negative +sff_cpld_reg.addr_29_9=0x000200b9 +sff_cpld_reg.len_29_9=1 +sff_cpld_reg.bit_offset_29_9=4 + +sff_cpld_reg.mode_30_9=config +sff_cpld_reg.src_30_9=cpld +sff_cpld_reg.frmt_30_9=bit +sff_cpld_reg.pola_30_9=negative +sff_cpld_reg.addr_30_9=0x000200b9 +sff_cpld_reg.len_30_9=1 +sff_cpld_reg.bit_offset_30_9=5 + +sff_cpld_reg.mode_31_9=config +sff_cpld_reg.src_31_9=cpld +sff_cpld_reg.frmt_31_9=bit +sff_cpld_reg.pola_31_9=negative +sff_cpld_reg.addr_31_9=0x000200b9 +sff_cpld_reg.len_31_9=1 +sff_cpld_reg.bit_offset_31_9=6 + +sff_cpld_reg.mode_32_9=config +sff_cpld_reg.src_32_9=cpld +sff_cpld_reg.frmt_32_9=bit +sff_cpld_reg.pola_32_9=negative +sff_cpld_reg.addr_32_9=0x000200b9 +sff_cpld_reg.len_32_9=1 +sff_cpld_reg.bit_offset_32_9=7 + +sff_cpld_reg.mode_33_9=config +sff_cpld_reg.src_33_9=cpld +sff_cpld_reg.frmt_33_9=bit +sff_cpld_reg.pola_33_9=negative +sff_cpld_reg.addr_33_9=0x000400b3 +sff_cpld_reg.len_33_9=1 +sff_cpld_reg.bit_offset_33_9=0 + +sff_cpld_reg.mode_34_9=config +sff_cpld_reg.src_34_9=cpld +sff_cpld_reg.frmt_34_9=bit +sff_cpld_reg.pola_34_9=negative +sff_cpld_reg.addr_34_9=0x000400b3 +sff_cpld_reg.len_34_9=1 +sff_cpld_reg.bit_offset_34_9=1 + +sff_cpld_reg.mode_35_9=config +sff_cpld_reg.src_35_9=cpld +sff_cpld_reg.frmt_35_9=bit +sff_cpld_reg.pola_35_9=negative +sff_cpld_reg.addr_35_9=0x000400b3 +sff_cpld_reg.len_35_9=1 +sff_cpld_reg.bit_offset_35_9=2 + +sff_cpld_reg.mode_36_9=config +sff_cpld_reg.src_36_9=cpld +sff_cpld_reg.frmt_36_9=bit +sff_cpld_reg.pola_36_9=negative +sff_cpld_reg.addr_36_9=0x000400b3 +sff_cpld_reg.len_36_9=1 +sff_cpld_reg.bit_offset_36_9=3 + +sff_cpld_reg.mode_37_9=config +sff_cpld_reg.src_37_9=cpld +sff_cpld_reg.frmt_37_9=bit +sff_cpld_reg.pola_37_9=negative +sff_cpld_reg.addr_37_9=0x000400b3 +sff_cpld_reg.len_37_9=1 +sff_cpld_reg.bit_offset_37_9=4 + +sff_cpld_reg.mode_38_9=config +sff_cpld_reg.src_38_9=cpld +sff_cpld_reg.frmt_38_9=bit +sff_cpld_reg.pola_38_9=negative +sff_cpld_reg.addr_38_9=0x000400b3 +sff_cpld_reg.len_38_9=1 +sff_cpld_reg.bit_offset_38_9=5 + +sff_cpld_reg.mode_39_9=config +sff_cpld_reg.src_39_9=cpld +sff_cpld_reg.frmt_39_9=bit +sff_cpld_reg.pola_39_9=negative +sff_cpld_reg.addr_39_9=0x000400b3 +sff_cpld_reg.len_39_9=1 +sff_cpld_reg.bit_offset_39_9=6 + +sff_cpld_reg.mode_40_9=config +sff_cpld_reg.src_40_9=cpld +sff_cpld_reg.frmt_40_9=bit +sff_cpld_reg.pola_40_9=negative +sff_cpld_reg.addr_40_9=0x000400b3 +sff_cpld_reg.len_40_9=1 +sff_cpld_reg.bit_offset_40_9=7 + +sff_cpld_reg.mode_41_9=config +sff_cpld_reg.src_41_9=cpld +sff_cpld_reg.frmt_41_9=bit +sff_cpld_reg.pola_41_9=negative +sff_cpld_reg.addr_41_9=0x000400b5 +sff_cpld_reg.len_41_9=1 +sff_cpld_reg.bit_offset_41_9=0 + +sff_cpld_reg.mode_42_9=config +sff_cpld_reg.src_42_9=cpld +sff_cpld_reg.frmt_42_9=bit +sff_cpld_reg.pola_42_9=negative +sff_cpld_reg.addr_42_9=0x000400b5 +sff_cpld_reg.len_42_9=1 +sff_cpld_reg.bit_offset_42_9=1 + +sff_cpld_reg.mode_43_9=config +sff_cpld_reg.src_43_9=cpld +sff_cpld_reg.frmt_43_9=bit +sff_cpld_reg.pola_43_9=negative +sff_cpld_reg.addr_43_9=0x000400b5 +sff_cpld_reg.len_43_9=1 +sff_cpld_reg.bit_offset_43_9=2 + +sff_cpld_reg.mode_44_9=config +sff_cpld_reg.src_44_9=cpld +sff_cpld_reg.frmt_44_9=bit +sff_cpld_reg.pola_44_9=negative +sff_cpld_reg.addr_44_9=0x000400b5 +sff_cpld_reg.len_44_9=1 +sff_cpld_reg.bit_offset_44_9=3 + +sff_cpld_reg.mode_45_9=config +sff_cpld_reg.src_45_9=cpld +sff_cpld_reg.frmt_45_9=bit +sff_cpld_reg.pola_45_9=negative +sff_cpld_reg.addr_45_9=0x000400b5 +sff_cpld_reg.len_45_9=1 +sff_cpld_reg.bit_offset_45_9=4 + +sff_cpld_reg.mode_46_9=config +sff_cpld_reg.src_46_9=cpld +sff_cpld_reg.frmt_46_9=bit +sff_cpld_reg.pola_46_9=negative +sff_cpld_reg.addr_46_9=0x000400b5 +sff_cpld_reg.len_46_9=1 +sff_cpld_reg.bit_offset_46_9=5 + +sff_cpld_reg.mode_47_9=config +sff_cpld_reg.src_47_9=cpld +sff_cpld_reg.frmt_47_9=bit +sff_cpld_reg.pola_47_9=negative +sff_cpld_reg.addr_47_9=0x000400b5 +sff_cpld_reg.len_47_9=1 +sff_cpld_reg.bit_offset_47_9=6 + +sff_cpld_reg.mode_48_9=config +sff_cpld_reg.src_48_9=cpld +sff_cpld_reg.frmt_48_9=bit +sff_cpld_reg.pola_48_9=negative +sff_cpld_reg.addr_48_9=0x000400b5 +sff_cpld_reg.len_48_9=1 +sff_cpld_reg.bit_offset_48_9=7 + +sff_cpld_reg.mode_49_9=config +sff_cpld_reg.src_49_9=cpld +sff_cpld_reg.frmt_49_9=bit +sff_cpld_reg.pola_49_9=negative +sff_cpld_reg.addr_49_9=0x000400b7 +sff_cpld_reg.len_49_9=1 +sff_cpld_reg.bit_offset_49_9=0 + +sff_cpld_reg.mode_50_9=config +sff_cpld_reg.src_50_9=cpld +sff_cpld_reg.frmt_50_9=bit +sff_cpld_reg.pola_50_9=negative +sff_cpld_reg.addr_50_9=0x000400b7 +sff_cpld_reg.len_50_9=1 +sff_cpld_reg.bit_offset_50_9=1 + +sff_cpld_reg.mode_51_9=config +sff_cpld_reg.src_51_9=cpld +sff_cpld_reg.frmt_51_9=bit +sff_cpld_reg.pola_51_9=negative +sff_cpld_reg.addr_51_9=0x000400b7 +sff_cpld_reg.len_51_9=1 +sff_cpld_reg.bit_offset_51_9=2 + +sff_cpld_reg.mode_52_9=config +sff_cpld_reg.src_52_9=cpld +sff_cpld_reg.frmt_52_9=bit +sff_cpld_reg.pola_52_9=negative +sff_cpld_reg.addr_52_9=0x000400b7 +sff_cpld_reg.len_52_9=1 +sff_cpld_reg.bit_offset_52_9=3 + +sff_cpld_reg.mode_53_9=config +sff_cpld_reg.src_53_9=cpld +sff_cpld_reg.frmt_53_9=bit +sff_cpld_reg.pola_53_9=negative +sff_cpld_reg.addr_53_9=0x000400b7 +sff_cpld_reg.len_53_9=1 +sff_cpld_reg.bit_offset_53_9=4 + +sff_cpld_reg.mode_54_9=config +sff_cpld_reg.src_54_9=cpld +sff_cpld_reg.frmt_54_9=bit +sff_cpld_reg.pola_54_9=negative +sff_cpld_reg.addr_54_9=0x000400b7 +sff_cpld_reg.len_54_9=1 +sff_cpld_reg.bit_offset_54_9=5 + +sff_cpld_reg.mode_55_9=config +sff_cpld_reg.src_55_9=cpld +sff_cpld_reg.frmt_55_9=bit +sff_cpld_reg.pola_55_9=negative +sff_cpld_reg.addr_55_9=0x000400b7 +sff_cpld_reg.len_55_9=1 +sff_cpld_reg.bit_offset_55_9=6 + +sff_cpld_reg.mode_56_9=config +sff_cpld_reg.src_56_9=cpld +sff_cpld_reg.frmt_56_9=bit +sff_cpld_reg.pola_56_9=negative +sff_cpld_reg.addr_56_9=0x000400b7 +sff_cpld_reg.len_56_9=1 +sff_cpld_reg.bit_offset_56_9=7 + +sff_cpld_reg.mode_57_9=config +sff_cpld_reg.src_57_9=cpld +sff_cpld_reg.frmt_57_9=bit +sff_cpld_reg.pola_57_9=negative +sff_cpld_reg.addr_57_9=0x000400b9 +sff_cpld_reg.len_57_9=1 +sff_cpld_reg.bit_offset_57_9=0 + +sff_cpld_reg.mode_58_9=config +sff_cpld_reg.src_58_9=cpld +sff_cpld_reg.frmt_58_9=bit +sff_cpld_reg.pola_58_9=negative +sff_cpld_reg.addr_58_9=0x000400b9 +sff_cpld_reg.len_58_9=1 +sff_cpld_reg.bit_offset_58_9=1 + +sff_cpld_reg.mode_59_9=config +sff_cpld_reg.src_59_9=cpld +sff_cpld_reg.frmt_59_9=bit +sff_cpld_reg.pola_59_9=negative +sff_cpld_reg.addr_59_9=0x000400b9 +sff_cpld_reg.len_59_9=1 +sff_cpld_reg.bit_offset_59_9=2 + +sff_cpld_reg.mode_60_9=config +sff_cpld_reg.src_60_9=cpld +sff_cpld_reg.frmt_60_9=bit +sff_cpld_reg.pola_60_9=negative +sff_cpld_reg.addr_60_9=0x000400b9 +sff_cpld_reg.len_60_9=1 +sff_cpld_reg.bit_offset_60_9=3 + +sff_cpld_reg.mode_61_9=config +sff_cpld_reg.src_61_9=cpld +sff_cpld_reg.frmt_61_9=bit +sff_cpld_reg.pola_61_9=negative +sff_cpld_reg.addr_61_9=0x000400b9 +sff_cpld_reg.len_61_9=1 +sff_cpld_reg.bit_offset_61_9=4 + +sff_cpld_reg.mode_62_9=config +sff_cpld_reg.src_62_9=cpld +sff_cpld_reg.frmt_62_9=bit +sff_cpld_reg.pola_62_9=negative +sff_cpld_reg.addr_62_9=0x000400b9 +sff_cpld_reg.len_62_9=1 +sff_cpld_reg.bit_offset_62_9=5 + +sff_cpld_reg.mode_63_9=config +sff_cpld_reg.src_63_9=cpld +sff_cpld_reg.frmt_63_9=bit +sff_cpld_reg.pola_63_9=negative +sff_cpld_reg.addr_63_9=0x000400b9 +sff_cpld_reg.len_63_9=1 +sff_cpld_reg.bit_offset_63_9=6 + +sff_cpld_reg.mode_64_9=config +sff_cpld_reg.src_64_9=cpld +sff_cpld_reg.frmt_64_9=bit +sff_cpld_reg.pola_64_9=negative +sff_cpld_reg.addr_64_9=0x000400b9 +sff_cpld_reg.len_64_9=1 +sff_cpld_reg.bit_offset_64_9=7 diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6951-64hc-cp/s3ip_sysfs_cfg/cfg_file/WATCHDOG.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6951-64hc-cp/s3ip_sysfs_cfg/cfg_file/WATCHDOG.cfg new file mode 100644 index 00000000000..c4c85e312f5 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6951-64hc-cp/s3ip_sysfs_cfg/cfg_file/WATCHDOG.cfg @@ -0,0 +1,18 @@ + +# Configuration item: watchdog number +# Description: Format watchdog_id_[index] +watchdog_id_0=0 + +# Configuration item: watchdog device name +# Description: Format watchdog_name_[index]_[type] +watchdog_name_0_0=identity +watchdog_name_0_1=state +watchdog_name_0_2=timeleft +watchdog_name_0_3=timeout + +watchdog_dev.mode_0_4=config +watchdog_dev.src_0_4=cpld +watchdog_dev.frmt_0_4=bit +watchdog_dev.addr_0_4=0x00010040 +watchdog_dev.len_0_4=1 +watchdog_dev.bit_offset_0_4=0 diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6951-64hc-cp/s3ip_sysfs_cfg/file_name/0x414c b/platform/broadcom/sonic-platform-modules-micas/m2-w6951-64hc-cp/s3ip_sysfs_cfg/file_name/0x414c new file mode 100644 index 00000000000..3944674a473 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6951-64hc-cp/s3ip_sysfs_cfg/file_name/0x414c @@ -0,0 +1,8 @@ +CPLD +FAN +LED +PSU +SENSOR +SFF +FPGA +WATCHDOG diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6951-64hc-cp/setup.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6951-64hc-cp/setup.py new file mode 100644 index 00000000000..6c3916921ab --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6951-64hc-cp/setup.py @@ -0,0 +1,39 @@ +from setuptools import setup + +setup( + name='sonic-platform', + version='1.0', + description='SONiC platform API implementation', + license='Apache 2.0', + author='SONiC Team', + author_email='support', + url='', + maintainer='support', + maintainer_email='', + packages=[ + 'sonic_platform', + 'plat_hal', + 'wbutil', + 'eepromutil', + 'hal-config', + 'config', + ], + py_modules=[ + 'hal_pltfm', + 'platform_util', + 'platform_intf', + ], + classifiers=[ + 'Development Status :: 3 - Alpha', + 'Environment :: Plugins', + 'Intended Audience :: Developers', + 'Intended Audience :: Information Technology', + 'Intended Audience :: System Administrators', + 'License :: OSI Approved :: Apache Software License', + 'Natural Language :: English', + 'Operating System :: POSIX :: Linux', + 'Programming Language :: Python :: 3.7', + 'Topic :: Utilities', + ], + keywords='sonic SONiC platform PLATFORM', +) diff --git a/platform/broadcom/sonic-platform-modules-nexthop/common/bash_completion.d/fpga b/platform/broadcom/sonic-platform-modules-nexthop/common/bash_completion.d/fpga index 129b2588b30..9d178750622 100644 --- a/platform/broadcom/sonic-platform-modules-nexthop/common/bash_completion.d/fpga +++ b/platform/broadcom/sonic-platform-modules-nexthop/common/bash_completion.d/fpga @@ -6,7 +6,7 @@ _fpga_completion() { COMPREPLY=( $( env COMP_WORDS="${words[*]}" \ COMP_CWORD=$cword \ - _FPGA_COMPLETE=complete "$1" ) + _FPGA_COMPLETE=bash_complete "$1" ) ) __ltrim_colon_completions "$cur" diff --git a/platform/broadcom/sonic-platform-modules-nexthop/common/bash_completion.d/idprom b/platform/broadcom/sonic-platform-modules-nexthop/common/bash_completion.d/idprom index b42d5c66bf5..c4d8b86b781 100644 --- a/platform/broadcom/sonic-platform-modules-nexthop/common/bash_completion.d/idprom +++ b/platform/broadcom/sonic-platform-modules-nexthop/common/bash_completion.d/idprom @@ -6,7 +6,7 @@ _idprom_completion() { COMPREPLY=( $( env COMP_WORDS="${words[*]}" \ COMP_CWORD=$cword \ - _FPGA_COMPLETE=complete "$1" ) + _IDPROM_COMPLETE=bash_complete "$1" ) ) __ltrim_colon_completions "$cur" diff --git a/platform/broadcom/sonic-platform-modules-nexthop/common/debug-dump/nh_current b/platform/broadcom/sonic-platform-modules-nexthop/common/debug-dump/nh_current new file mode 100755 index 00000000000..f76ba7e3fb4 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-nexthop/common/debug-dump/nh_current @@ -0,0 +1,2 @@ +#!/bin/bash +show platform current diff --git a/platform/broadcom/sonic-platform-modules-nexthop/common/debug-dump/nh_firmware_status b/platform/broadcom/sonic-platform-modules-nexthop/common/debug-dump/nh_firmware_status new file mode 100755 index 00000000000..459de427552 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-nexthop/common/debug-dump/nh_firmware_status @@ -0,0 +1,2 @@ +#!/bin/bash +show platform firmware status diff --git a/platform/broadcom/sonic-platform-modules-nexthop/common/debug-dump/nh_led b/platform/broadcom/sonic-platform-modules-nexthop/common/debug-dump/nh_led new file mode 100755 index 00000000000..d4fea57c80f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-nexthop/common/debug-dump/nh_led @@ -0,0 +1,73 @@ +#!/usr/bin/env python3 + +# Copyright 2026 Nexthop Systems Inc. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 + +# Utility for displaying LED status for all port and system LEDs on Nexthop platforms + +import sys +from sonic_platform import platform + + +def get_chassis(): + try: + plat = platform.Platform() + return plat.get_chassis() + except Exception as e: + print(f"Error: Failed to get chassis object: {e}", file=sys.stderr) + return None + + +def get_led_status(chassis, led_device_name): + try: + status = chassis.get_system_led(led_device_name) + return status + except Exception as e: + return f"Error: {e}" + + +def main(): + chassis = get_chassis() + if chassis is None: + return 1 + + try: + num_ports = chassis.get_num_sfps() + except Exception as e: + print(f"Error: Failed to get number of ports: {e}", file=sys.stderr) + return 1 + + try: + num_fan_drawers = chassis.get_num_fan_drawers() + except Exception as e: + print(f"Error: Failed to get number of fan drawers: {e}", file=sys.stderr) + return 1 + + print("System LEDs:") + print("-" * 50) + system_leds = ["SYS_LED", "PSU_LED", "FAN_LED", "LOC_LED"] + for led_name in system_leds: + led_status = get_led_status(chassis, led_name) + print(f"{led_name:15s}: {led_status}") + print("") + + print("Fan Tray LEDs:") + print("-" * 50) + for tray in range(1, num_fan_drawers + 1): + led_name = f"FANTRAY{tray}_LED" + led_status = get_led_status(chassis, led_name) + print(f"{led_name:15s}: {led_status}") + print("") + + print("Port LEDs:") + print("-" * 50) + for port in range(1, num_ports + 1): + led_name = f"PORT_LED_{port}" + led_status = get_led_status(chassis, led_name) + print(f"{led_name:15s}: {led_status}") + + return 0 + + +if __name__ == "__main__": + main() diff --git a/platform/broadcom/sonic-platform-modules-nexthop/common/debug-dump/nh_platform_init b/platform/broadcom/sonic-platform-modules-nexthop/common/debug-dump/nh_platform_init new file mode 100755 index 00000000000..bbc9346da48 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-nexthop/common/debug-dump/nh_platform_init @@ -0,0 +1,26 @@ +#!/bin/bash +# +# Copyright 2026 Nexthop Systems Inc. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# nh_platform_init - Display platform initialization information for Nexthop platforms + +echo "I2C Device Nodes:" +echo "-----------------" +ls /dev/i2c* 2>/dev/null || echo "No I2C device nodes found" +echo "" + +echo "I2C Bus Devices:" +echo "----------------" +ls /sys/bus/i2c/devices 2>/dev/null || echo "No I2C bus devices found" +echo "" + +echo "MDIO Bus:" +echo "---------" +ls /sys/class/mdio_bus 2>/dev/null || echo "No MDIO buses found" +echo "" + +echo "PDDF Kernel Sysfs:" +echo "------------------" +find /sys/kernel/pddf -print 2>/dev/null || echo "PDDF sysfs not initialized" +echo "" diff --git a/platform/broadcom/sonic-platform-modules-nexthop/common/debug-dump/nh_reboot_cause b/platform/broadcom/sonic-platform-modules-nexthop/common/debug-dump/nh_reboot_cause new file mode 100755 index 00000000000..e2ca8ddccdc --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-nexthop/common/debug-dump/nh_reboot_cause @@ -0,0 +1,2 @@ +#!/bin/bash +nh_reboot_cause history -vv diff --git a/platform/broadcom/sonic-platform-modules-nexthop/common/debug-dump/nh_reboot_cause_history_vv b/platform/broadcom/sonic-platform-modules-nexthop/common/debug-dump/nh_reboot_cause_history_vv new file mode 100755 index 00000000000..e2ca8ddccdc --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-nexthop/common/debug-dump/nh_reboot_cause_history_vv @@ -0,0 +1,2 @@ +#!/bin/bash +nh_reboot_cause history -vv diff --git a/platform/broadcom/sonic-platform-modules-nexthop/common/debug-dump/nh_reboot_cause_read_blackbox b/platform/broadcom/sonic-platform-modules-nexthop/common/debug-dump/nh_reboot_cause_read_blackbox new file mode 100755 index 00000000000..41dc5d5eb69 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-nexthop/common/debug-dump/nh_reboot_cause_read_blackbox @@ -0,0 +1,2 @@ +#!/bin/bash +nh_reboot_cause read-blackbox diff --git a/platform/broadcom/sonic-platform-modules-nexthop/common/debug-dump/nh_voltage b/platform/broadcom/sonic-platform-modules-nexthop/common/debug-dump/nh_voltage new file mode 100755 index 00000000000..336124eeed5 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-nexthop/common/debug-dump/nh_voltage @@ -0,0 +1,2 @@ +#!/bin/bash +show platform voltage diff --git a/platform/broadcom/sonic-platform-modules-nexthop/common/etc/systemd/system/determine-reboot-cause.service.d/override.conf b/platform/broadcom/sonic-platform-modules-nexthop/common/etc/systemd/system/determine-reboot-cause.service.d/override.conf index 97eb65a39b5..7e2f8685f12 100644 --- a/platform/broadcom/sonic-platform-modules-nexthop/common/etc/systemd/system/determine-reboot-cause.service.d/override.conf +++ b/platform/broadcom/sonic-platform-modules-nexthop/common/etc/systemd/system/determine-reboot-cause.service.d/override.conf @@ -1,3 +1,11 @@ [Unit] Requires=pddf-platform-init.service After=pddf-platform-init.service + +[Service] +# Skip if already ran this boot, while keeping the service in "active" state. +# Do NOT use ConditionPathExists or ExecCondition here. They leave the service +# "inactive" (skipped), which causes dependents like process-reboot-cause to fail. +ExecStart= +ExecStart=/bin/sh -c 'test -f /run/determine-reboot-cause-done || /usr/local/bin/determine-reboot-cause' +ExecStartPost=/usr/bin/touch /run/determine-reboot-cause-done diff --git a/platform/broadcom/sonic-platform-modules-nexthop/common/modules/nh_adm1266.c b/platform/broadcom/sonic-platform-modules-nexthop/common/modules/nh_adm1266.c index 63c86d56aad..fda4a879cde 100644 --- a/platform/broadcom/sonic-platform-modules-nexthop/common/modules/nh_adm1266.c +++ b/platform/broadcom/sonic-platform-modules-nexthop/common/modules/nh_adm1266.c @@ -27,12 +27,31 @@ * The Nexthop driver uses the following command sequence to clear blackbox entries: * - Command: [0xDE, 0xFE, 0x00] sent via I2C transaction * The userspace access is provided via the same nvmem sysfs interface. - * - Usage: echo "anything" > /sys/bus/nvmem/devices/7-00410/nvmem + * - Usage: echo "anything" > /sys/bus/nvmem/devices/-/nvmem + * + * RTC setting: + * ------------ + * The ADM1266 RTC is configured to count time from a custom epoch (2024-01-01 00:00:00 UTC). + * This is necessary because the ADM1266 RTC only uses 4 bytes to store seconds, which + * rollover every ~136 years. Using a custom epoch maximizes the usable time range. * - * Lastly, the Nexthop driver enables 'cyclic' recording in the configuration register - * of the blackbox. This is useful when the DPM log buffer is full as new logs continue - * to be recorded. In the userspace, we need to save this setting to flash to make - * the changes permanent. + * The custom epoch is hardcoded in this driver (ADM1266_CUSTOM_EPOCH_OFFSET) and + * is automatically applied during the device probe. + * + * For flexibility, userspace can override the epoch offset via sysfs: + * - Usage: echo "" > /sys/bus/i2c/devices/-/rtc_epoch_offset + * - must be a non-negative integer seconds since 1970. + * - A daemon can periodically write to this to sync RTC with the system time to avoid + * clocks' drift. + * If the ADM1266 is power cycled, the RTC resets to zero and will be reconfigured on next + * device probe. + * + * Extra sysfs attributes: + * ------------------------ + * - rtc_epoch_offset: Read-write attribute to get/set the epoch offset (since 1970) in seconds. + * - powerup_counter: Read-only attribute to get the current powerup counter. + * - firmware_revision: Read-only attribute to get the firmware revision. + * - mfr_revision: Read-only attribute to get the manufacturer revision. */ #include @@ -51,12 +70,21 @@ #include #include +/* + * Nexthop's custom epoch: 2024-01-01 00:00:00 UTC + * This is represented as the elapsed seconds since the UNIX epoch (1970-01-01 00:00:00 UTC). + */ +#define ADM1266_NH_CUSTOM_EPOCH_OFFSET 1704067200ULL + +#define ADM1266_MFR_REVISION 0x9B +#define ADM1266_IC_DEVICE_REV 0xAE #define ADM1266_BLACKBOX_CONFIG 0xD3 #define ADM1266_PDIO_CONFIG 0xD4 #define ADM1266_READ_STATE 0xD9 #define ADM1266_READ_BLACKBOX 0xDE #define ADM1266_SET_RTC 0xDF #define ADM1266_GPIO_CONFIG 0xE1 +#define ADM1266_POWERUP_COUNTER 0xE4 #define ADM1266_BLACKBOX_INFO 0xE6 #define ADM1266_PDIO_STATUS 0xE9 #define ADM1266_GPIO_STATUS 0xEA @@ -76,7 +104,7 @@ #define ADM1266_BLACKBOX_OFFSET 0 #define ADM1266_BLACKBOX_SIZE 64 -#define ADM1266_BLACKBOX_MAX_RECORDS 64 +#define ADM1266_BLACKBOX_MAX_RECORDS 32 #define ADM1266_PMBUS_BLOCK_MAX 255 @@ -92,6 +120,7 @@ struct nh_adm1266_data { struct mutex buf_mutex; u8 write_buf[ADM1266_PMBUS_BLOCK_MAX + 1] ____cacheline_aligned; u8 read_buf[ADM1266_PMBUS_BLOCK_MAX + 1] ____cacheline_aligned; + u64 rtc_epoch_offset; // User-provided offset from the UNIX epoch (Jan 1st, 1970) in seconds. }; static const struct nvmem_cell_info nh_adm1266_nvmem_cells[] = { @@ -376,96 +405,115 @@ static void nh_adm1266_init_debugfs(struct nh_adm1266_data *data) nh_adm1266_state_read); } -static int nh_adm1266_nvmem_read_blackbox(struct nh_adm1266_data *data, u8 *read_buff) +/* + * Performs an atomic write-then-read transaction, by bundling + * a write of the PMBus command (with optional write data) and + * a subsequent read of the response data, into a single I2C transaction. + * + * This is Nexthop-specific change, which works for blackbox reading. The original + * driver used `nh_adm1266_pmbus_block_xfer()`, which was not working. + */ +static int nh_adm1266_i2c_atomic_write_then_read( + struct nh_adm1266_data *data, + u8 cmd, + u16 w_len, + u8 *w_data, + u16 r_len, + u8 *r_data) { - int record_count; - u8 index; - u8 buf[32]; + u8 response_len; int ret; - struct i2c_msg msgs[2]; - u8 write_buf[3]; + struct i2c_msg msgs[2] = { + { + .addr = data->client->addr, + .flags = 0, + .buf = data->write_buf, + .len = w_len ? w_len + 2 : 1, + }, + { + .addr = data->client->addr, + .flags = I2C_M_RD, + .buf = data->read_buf, + .len = r_len + 1, + } + }; - /* - * Step 1: Read blackbox info to get record count - * Reference: i2c_block_write_block_read(addr, 1, [0xE6], 4, buf) - */ - write_buf[0] = ADM1266_BLACKBOX_INFO; + if (msgs[0].len > sizeof(data->write_buf) || msgs[1].len > sizeof(data->read_buf)) + return -EMSGSIZE; - msgs[0].addr = data->client->addr; - msgs[0].flags = 0; - msgs[0].len = 1; - msgs[0].buf = write_buf; + mutex_lock(&data->buf_mutex); - msgs[1].addr = data->client->addr; - msgs[1].flags = I2C_M_RD; - msgs[1].len = 5; - msgs[1].buf = buf; + // Prepare Write message with command and optional write data. + msgs[0].buf[0] = cmd; + if (w_len > 0) { + msgs[0].buf[1] = w_len; + memcpy(&msgs[0].buf[2], w_data, w_len); + } + // Send messages. ret = i2c_transfer(data->client->adapter, msgs, 2); if (ret != 2) { - dev_err(&data->client->dev, "Failed to read blackbox info: %d", - ret); + mutex_unlock(&data->buf_mutex); return ret < 0 ? ret : -EIO; } - /* buf[0] is length, must be 0x04 per spec */ - if (buf[0] != 0x04) { - dev_warn(&data->client->dev, - "Unexpected blackbox info len: 0x%02x", buf[0]); - return -1; + // Verify response length. + response_len = msgs[1].buf[0]; + if (response_len != r_len) { + mutex_unlock(&data->buf_mutex); + return -EIO; } - index = buf[3]; - record_count = buf[4]; - - for (int count = 0; count < record_count; count++) { - u8 r_data[ADM1266_BLACKBOX_SIZE + 1]; - - write_buf[0] = ADM1266_READ_BLACKBOX; - write_buf[1] = 0x01; - write_buf[2] = index; - - msgs[0].addr = data->client->addr; - msgs[0].flags = 0; - msgs[0].len = 3; - msgs[0].buf = write_buf; - - msgs[1].addr = data->client->addr; - msgs[1].flags = I2C_M_RD; - msgs[1].len = sizeof(r_data); - msgs[1].buf = r_data; + // Return the response data via the output param. + memcpy(r_data, &msgs[1].buf[1], response_len); - ret = i2c_transfer(data->client->adapter, msgs, 2); - if (ret != 2) { - dev_err(&data->client->dev, - "Failed to read record %d: %d", index, ret); - return ret < 0 ? ret : -EIO; - } - - if (r_data[0] != ADM1266_BLACKBOX_SIZE) { - dev_err(&data->client->dev, - "Invalid data length for blackbox record index=%d, len=%d", index, r_data[0]); - } else { - /* skip the first byte which is the length */ - memcpy(read_buff, r_data + 1, ADM1266_BLACKBOX_SIZE); - /* Clear unused/reserved bits */ - u8 vpx_hi_reserved = 0xE0; - - read_buff[11] &= ~vpx_hi_reserved; - read_buff[13] &= ~vpx_hi_reserved; + mutex_unlock(&data->buf_mutex); - u8 gpio_low_reserved = 0x38; - u8 gpio_hi_reserved = 0xf0; + return 0; +} - read_buff[14] &= ~gpio_low_reserved; - read_buff[15] &= ~gpio_hi_reserved; - read_buff[16] &= ~gpio_low_reserved; - read_buff[17] &= ~gpio_hi_reserved; +static int nh_adm1266_nvmem_read_blackbox(struct nh_adm1266_data *data, u8 *read_buff) +{ + u8 blackbox_info_buf[4]; + u8 first_index; + u8 latest_index; + u8 record_count; + int ret; + int i; - read_buff += ADM1266_BLACKBOX_SIZE; + // Step 1: Read blackbox info. + ret = nh_adm1266_i2c_atomic_write_then_read( + data, + ADM1266_BLACKBOX_INFO, + /*w_len=*/0, + /*w_data=*/NULL, + /*r_len=*/sizeof(blackbox_info_buf), + /*r_data=*/blackbox_info_buf); + if (ret) { + dev_err(&data->client->dev, "Failed to read BLACKBOX_INFORMATION: ret=%d", ret); + return ret; + } + latest_index = blackbox_info_buf[2]; + record_count = blackbox_info_buf[3]; + first_index = (latest_index - record_count + 1 + ADM1266_BLACKBOX_MAX_RECORDS) % ADM1266_BLACKBOX_MAX_RECORDS; + + // Step 2: Iterate over and read all blackbox records. + for (i = 0; i < record_count; i++) { + u8 index = (first_index + i) % ADM1266_BLACKBOX_MAX_RECORDS; + + ret = nh_adm1266_i2c_atomic_write_then_read( + data, + ADM1266_READ_BLACKBOX, + /*w_len=*/1, + /*w_data=*/&index, + /*r_len=*/ADM1266_BLACKBOX_SIZE, + /*r_data=*/read_buff); + if (ret) { + dev_err(&data->client->dev, "Failed to read blackbox record index=%d: ret=%d", index, ret); + return ret; } - index = (index - 1) & (ADM1266_BLACKBOX_MAX_RECORDS - 1); + read_buff += ADM1266_BLACKBOX_SIZE; } return 0; @@ -557,23 +605,165 @@ static int nh_adm1266_config_nvmem(struct nh_adm1266_data *data) return 0; } -static int nh_adm1266_set_rtc(struct nh_adm1266_data *data) +static int nh_adm1266_set_rtc(struct nh_adm1266_data *data, u64 sec, u64 nsec) { - time64_t kt; char write_buf[6]; + u16 fraction; int i; - kt = ktime_get_seconds(); - memset(write_buf, 0, sizeof(write_buf)); + // Transform nanoseconds to 16-bit data (LSB of ADM1266 timestamp represents 1/2^16 second). + fraction = (u16)((nsec * 65536) / 1000000000); + + if (sec > 0xFFFFFFFF) { + dev_warn(&data->client->dev, + "sec=%llu is too large. ADM1266 uses 32-bit to store secs and will report incorrect timestamps.\n", + sec); + } + for (i = 0; i < 4; i++) - write_buf[2 + i] = (kt >> (i * 8)) & 0xFF; + write_buf[2 + i] = (sec >> (i * 8)) & 0xFF; + for (i = 0; i < 2; i++) + write_buf[i] = (fraction >> (i * 8)) & 0xFF; - return i2c_smbus_write_block_data(data->client, ADM1266_SET_RTC, sizeof(write_buf), - write_buf); + return i2c_smbus_write_block_data(data->client, ADM1266_SET_RTC, sizeof(write_buf), write_buf); } +static int nh_adm1266_set_rtc_relative_to_epoch(struct nh_adm1266_data *data, u64 epoch_offset_sec) +{ + struct timespec64 now; + u64 rtc_sec; + int ret; + + ktime_get_real_ts64(&now); + + if (epoch_offset_sec > (u64)now.tv_sec) { + dev_warn(&data->client->dev, + "User-provided epoch_offset_sec=%llu is in the future.\n", + epoch_offset_sec); + return -EINVAL; + } + rtc_sec = (u64)now.tv_sec - epoch_offset_sec; + + ret = nh_adm1266_set_rtc(data, rtc_sec, now.tv_nsec); + if (ret) { + dev_err(&data->client->dev, "Failed to set RTC: ret=%d\n", ret); + return ret; + } + + data->rtc_epoch_offset = epoch_offset_sec; + return 0; +} + +/* + * Returns a pointer to the nh_adm1266_data struct, given a device. + * + * nh_pmbus_do_probe() set i2c clientdata with pmbus_driver_info*. + * Since pmbus_driver_info is stored in nh_adm1266_data, this function + * uses the container_of() to get the nh_adm1266_data*. + */ +static struct nh_adm1266_data *to_nh_adm1266_data(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + const struct pmbus_driver_info *info = nh_pmbus_get_driver_info(client); + return container_of(info, struct nh_adm1266_data, info); +} + +static ssize_t rtc_epoch_offset_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) +{ + struct nh_adm1266_data *data = to_nh_adm1266_data(dev); + u64 epoch_offset_sec; + int ret; + + ret = kstrtoull(buf, 10, &epoch_offset_sec); + if (ret) { + dev_warn(dev, "Failed to convert '%s' to u64, ret=%d\n", buf, ret); + return -EINVAL; + } + + ret = nh_adm1266_set_rtc_relative_to_epoch(data, epoch_offset_sec); + if (ret) + return ret; + + return count; +} + +static ssize_t rtc_epoch_offset_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + struct nh_adm1266_data *data = to_nh_adm1266_data(dev); + return sprintf(buf, "%llu\n", data->rtc_epoch_offset); +} + +static DEVICE_ATTR_RW(rtc_epoch_offset); + +static ssize_t powerup_counter_show(struct device *dev, struct device_attribute *attr, char *buf) { + struct nh_adm1266_data *data = to_nh_adm1266_data(dev); + u8 read_buf[3]; + int ret; + u16 powerup_counter; + + ret = i2c_smbus_read_i2c_block_data(data->client, ADM1266_POWERUP_COUNTER, 3, read_buf); + if (ret < 0) + return ret; + + if (ret != 3) + return -EIO; + + // Byte 0: Length of the powerup counter data. + // Byte [2:1]: Powerup counter value (in little-endian format). + powerup_counter = read_buf[1] | (read_buf[2] << 8); + return sprintf(buf, "%u\n", powerup_counter); +} + +static DEVICE_ATTR_RO(powerup_counter); + +static ssize_t firmware_revision_show(struct device *dev, struct device_attribute *attr, char *buf) { + struct nh_adm1266_data *data = to_nh_adm1266_data(dev); + u8 read_buf[9]; + int ret; + + ret = i2c_smbus_read_i2c_block_data(data->client, ADM1266_IC_DEVICE_REV, 9, read_buf); + if (ret < 0) + return ret; + + if (ret != 9) + return -EIO; + + // Byte 0: Length of the IC_DEVICE_REV data. + // Byte [3:1]: Firmware revision in the format of "major.minor.patch". + // Byte [6:4]: Bootloader revision in the format of "major.minor.patch". + // Byte [8:7]: Chip revision in the format of 2 ASCII characters. + return sprintf(buf, "%d.%d.%d\n", read_buf[1], read_buf[2], read_buf[3]); +} + +static DEVICE_ATTR_RO(firmware_revision); + +static ssize_t mfr_revision_show(struct device *dev, struct device_attribute *attr, char *buf) { + struct nh_adm1266_data *data = to_nh_adm1266_data(dev); + + int ret; + u8 mfr_revision_buf[8]; + u8 mfr_revision_length_to_read = sizeof(mfr_revision_buf); + + ret = nh_adm1266_i2c_atomic_write_then_read( + data, + ADM1266_MFR_REVISION, + /*w_len=*/1, + /*w_data=*/&mfr_revision_length_to_read, + /*r_len=*/mfr_revision_length_to_read, + /*r_data=*/mfr_revision_buf); + if (ret) { + dev_err(&data->client->dev, "Failed to read MFR_REVISION: ret=%d", ret); + return ret; + } + + // Print up to 8 ASCII characters or up to the first null character, whichever comes first. + return sprintf(buf, "%.*s\n", mfr_revision_length_to_read, mfr_revision_buf); +} + +static DEVICE_ATTR_RO(mfr_revision); + static int nh_adm1266_probe(struct i2c_client *client) { struct nh_adm1266_data *data; @@ -597,7 +787,7 @@ static int nh_adm1266_probe(struct i2c_client *client) if (ret < 0) return ret; - ret = nh_adm1266_set_rtc(data); + ret = nh_adm1266_set_rtc_relative_to_epoch(data, ADM1266_NH_CUSTOM_EPOCH_OFFSET); if (ret < 0) return ret; @@ -609,11 +799,40 @@ static int nh_adm1266_probe(struct i2c_client *client) if (ret) return ret; + ret = device_create_file(&client->dev, &dev_attr_rtc_epoch_offset); + if (ret) { + dev_err(&client->dev, "Failed to create rtc_epoch_offset attribute: ret=%d\n", ret); + return ret; + } + ret = device_create_file(&client->dev, &dev_attr_powerup_counter); + if (ret) { + dev_err(&client->dev, "Failed to create powerup_counter attribute: ret=%d\n", ret); + return ret; + } + ret = device_create_file(&client->dev, &dev_attr_firmware_revision); + if (ret) { + dev_err(&client->dev, "Failed to create firmware_revision attribute: ret=%d\n", ret); + return ret; + } + ret = device_create_file(&client->dev, &dev_attr_mfr_revision); + if (ret) { + dev_err(&client->dev, "Failed to create mfr_revision attribute: ret=%d\n", ret); + return ret; + } + nh_adm1266_init_debugfs(data); return 0; } +static void nh_adm1266_remove(struct i2c_client *client) +{ + device_remove_file(&client->dev, &dev_attr_mfr_revision); + device_remove_file(&client->dev, &dev_attr_firmware_revision); + device_remove_file(&client->dev, &dev_attr_rtc_epoch_offset); + device_remove_file(&client->dev, &dev_attr_powerup_counter); +} + static const struct of_device_id nh_adm1266_of_match[] = { { .compatible = "adi,nh_adm1266" }, { } @@ -636,6 +855,7 @@ static struct i2c_driver nh_adm1266_driver = { #else .probe = nh_adm1266_probe, #endif + .remove = nh_adm1266_remove, .id_table = nh_adm1266_id, }; diff --git a/platform/broadcom/sonic-platform-modules-nexthop/common/modules/nh_isl68137.c b/platform/broadcom/sonic-platform-modules-nexthop/common/modules/nh_isl68137.c index 6429ab9da5c..21d3fb5088a 100644 --- a/platform/broadcom/sonic-platform-modules-nexthop/common/modules/nh_isl68137.c +++ b/platform/broadcom/sonic-platform-modules-nexthop/common/modules/nh_isl68137.c @@ -10,6 +10,7 @@ * * Modifcations by Nexthop Systems Inc., 2025: * - Prepend nh_ to usages of pmbus.h + * - Expose sysfs attribute "mfr_revision" for programmable version. * * Copyright (C) 2025 Nexthop Systems Inc. */ @@ -69,6 +70,7 @@ enum chips { raa228228, raa228234, raa228236, + raa228244, raa229001, raa229004, }; @@ -165,8 +167,47 @@ static const struct attribute_group enable_group = { .attrs = enable_attrs, }; +static ssize_t mfr_revision_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + struct i2c_client *client = to_i2c_client(dev->parent); + u8 read_buf[5]; + int ret; + + // Read the block data from PMBUS_MFR_REVISION register + ret = i2c_smbus_read_i2c_block_data(client, PMBUS_MFR_REVISION, 5, read_buf); + if (ret < 0) + return ret; + + if (ret != 5) + return -EIO; + + // Byte 0: Length of the MFR_REVISION data. + // Byte [4:1]: 4 bytes of space with no defined format. + // NH usage: + // Byte 1: Minor revision + // Byte 2: Major revision + return sprintf(buf, "%d.%d\n", read_buf[2], read_buf[1]); +} + +static DEVICE_ATTR_RO(mfr_revision); + +static struct attribute *mfr_attrs[] = { + &dev_attr_mfr_revision.attr, + NULL, +}; + +static const struct attribute_group mfr_group = { + .attrs = mfr_attrs, +}; + static const struct attribute_group *isl68137_attribute_groups[] = { &enable_group, + &mfr_group, + NULL, +}; + +static const struct attribute_group *raa_default_attribute_groups[] = { + &mfr_group, NULL, }; @@ -252,6 +293,7 @@ static int isl68137_probe(struct i2c_client *client) case raa_dmpvr2_1rail: info->pages = 1; info->read_word_data = raa_dmpvr2_read_word_data; + info->groups = raa_default_attribute_groups; break; case raa_dmpvr2_2rail_nontc: info->func[0] &= ~PMBUS_HAVE_TEMP3; @@ -260,9 +302,11 @@ static int isl68137_probe(struct i2c_client *client) case raa_dmpvr2_2rail: info->pages = 2; info->read_word_data = raa_dmpvr2_read_word_data; + info->groups = raa_default_attribute_groups; break; case raa_dmpvr2_3rail: info->read_word_data = raa_dmpvr2_read_word_data; + info->groups = raa_default_attribute_groups; break; case raa_dmpvr2_hv: info->pages = 1; @@ -273,6 +317,7 @@ static int isl68137_probe(struct i2c_client *client) info->m[PSC_POWER] = 2; info->R[PSC_POWER] = -1; info->read_word_data = raa_dmpvr2_read_word_data; + info->groups = raa_default_attribute_groups; break; default: return -ENODEV; @@ -323,6 +368,7 @@ static const struct i2c_device_id raa_dmpvr_id[] = { {"nh_raa228228", raa_dmpvr2_2rail_nontc}, {"nh_raa228234", raa_dmpvr2_2rail_nontc}, {"nh_raa228236", raa_dmpvr2_2rail_nontc}, + {"nh_raa228244", raa_dmpvr2_2rail_nontc}, {"nh_raa229001", raa_dmpvr2_2rail}, {"nh_raa229004", raa_dmpvr2_2rail}, {} diff --git a/platform/broadcom/sonic-platform-modules-nexthop/common/modules/pddf_custom_fpga_algo.c b/platform/broadcom/sonic-platform-modules-nexthop/common/modules/pddf_custom_fpga_algo.c index b5801b92c5a..fb7248b0819 100644 --- a/platform/broadcom/sonic-platform-modules-nexthop/common/modules/pddf_custom_fpga_algo.c +++ b/platform/broadcom/sonic-platform-modules-nexthop/common/modules/pddf_custom_fpga_algo.c @@ -109,7 +109,15 @@ enum { /* timeout waiting for the controller to respond */ #define XIIC_I2C_TIMEOUT (msecs_to_jiffies(1000)) +/* Adjustable parameters for the polling loop */ +#define XIIC_POLL_RETRIES_MIN 1 +#define XIIC_POLL_RETRIES_MAX 6 +#define XIIC_POLL_SLEEP_MIN 200 /* us */ +#define XIIC_POLL_SLEEP_MAX 2000 /* us */ +#define XIIC_POLL_SLEEP_INC 50 /* us */ + struct fpgalogic_i2c { + struct i2c_adapter *adap; void __iomem *base; u32 reg_shift; u32 reg_io_width; @@ -124,6 +132,7 @@ struct fpgalogic_i2c { u8 (*reg_get)(struct fpgalogic_i2c *i2c, int reg); u32 timeout; struct mutex lock; + unsigned long poll_wait_before_retry; }; static struct fpgalogic_i2c fpgalogic_i2c[I2C_PCI_MAX_BUS]; @@ -203,6 +212,7 @@ static int poll_wait(struct fpgalogic_i2c *i2c, const unsigned long timeout) { unsigned long j; + unsigned int retries = 0; u8 status = 0; j = jiffies + timeout; @@ -212,11 +222,26 @@ static int poll_wait(struct fpgalogic_i2c *i2c, mutex_unlock(&i2c->lock); if ((status & mask) == val) break; + else + retries++; if (time_after(jiffies, j)) return -ETIMEDOUT; - cpu_relax(); - cond_resched(); + usleep_range(i2c->poll_wait_before_retry, + i2c->poll_wait_before_retry + XIIC_POLL_SLEEP_INC); + } + + mutex_lock(&i2c->lock); + if (retries > XIIC_POLL_RETRIES_MAX && i2c->poll_wait_before_retry < XIIC_POLL_SLEEP_MAX) { + i2c->poll_wait_before_retry += XIIC_POLL_SLEEP_INC; + dev_dbg(&i2c->adap->dev, "too many (%u > %u) retries, adjusted wait time up to %luusec\n", + retries, XIIC_POLL_RETRIES_MAX, i2c->poll_wait_before_retry); + } else if (retries < XIIC_POLL_RETRIES_MIN && i2c->poll_wait_before_retry > XIIC_POLL_SLEEP_MIN) { + i2c->poll_wait_before_retry -= XIIC_POLL_SLEEP_INC; + dev_dbg(&i2c->adap->dev, "too few (%u < %u) retries, adjusted wait time down to %luusec\n", + retries, XIIC_POLL_RETRIES_MIN, i2c->poll_wait_before_retry); } + mutex_unlock(&i2c->lock); + return 0; } @@ -338,8 +363,19 @@ static void xiic_process(struct fpgalogic_i2c *i2c) i2c->state =(msg->flags & I2C_M_RD) ? STATE_READ : STATE_WRITE; /* if it's the time sequence is 'start bit + address + read bit + stop bit' */ if (i2c->state == STATE_READ){ - /* it's the last message so we include dynamic stop bit with length */ - val = msg->len | XIIC_TX_DYN_STOP_MASK; + /* + * Set RFD to 0 before starting read. This tells the controller + * to signal ready after each byte received, which works with + * our 1-byte-at-a-time read loop for any length transfer. + */ + xiic_setreg32(i2c, XIIC_RFD_REG_OFFSET, 0); + + /* Only include dynamic stop bit if this is the last message */ + if (i2c->nmsgs == 1) { + val = msg->len | XIIC_TX_DYN_STOP_MASK; + } else { + val = msg->len; + } xiic_setreg32(i2c, XIIC_DTR_REG_OFFSET, val); goto out; } @@ -513,6 +549,7 @@ static int xiic_reinit(struct fpgalogic_i2c *i2c) if (ret) return ret; + i2c->poll_wait_before_retry = XIIC_POLL_SLEEP_MIN; return 0; } @@ -570,6 +607,7 @@ static int adap_data_init(struct i2c_adapter *adap, int index) fpgalogic_i2c[i2c_ch_index].base = i2c_data.ch_base_addr + index * i2c_data.ch_size; mutex_init(&fpgalogic_i2c[i2c_ch_index].lock); + fpgalogic_i2c[i2c_ch_index].adap = adap; fpgai2c_init(&fpgalogic_i2c[i2c_ch_index]); adap->algo_data = &fpgalogic_i2c[i2c_ch_index]; diff --git a/platform/broadcom/sonic-platform-modules-nexthop/common/nexthop/fpga_cli.py b/platform/broadcom/sonic-platform-modules-nexthop/common/nexthop/fpga_cli.py index ba4fdbcdb72..a2739fc1e31 100644 --- a/platform/broadcom/sonic-platform-modules-nexthop/common/nexthop/fpga_cli.py +++ b/platform/broadcom/sonic-platform-modules-nexthop/common/nexthop/fpga_cli.py @@ -16,6 +16,7 @@ overwrite_field, bdf_to_name, name_to_bdf, + dump_resource0, ) from nexthop.pddf_config_parser import load_pddf_device_config @@ -217,5 +218,58 @@ def cli_list(): echo_available_fpgas() +def _format_range(start_offset: int, end_offset: int, value: int) -> str: + """Format a single value or range of values with proper alignment.""" + if start_offset == end_offset: + return f"{start_offset:08x} 0x{value:08x}" + else: + return f"{start_offset:08x}-{end_offset:08x} 0x{value:08x}" + + +@cli.command("dump") +@click.argument("pci_address", required=False, type=FpgaNameOrAddress()) +@click.option("--all", "-a", is_flag=True, default=False, help="Dump all FPGAs") +def dump(pci_address, all): + """Dump FPGA resource0 memory in hexdump format. + + TARGET_FPGA can be either the FPGA name (e.g., 'SWITCHCARD_FPGA') or + PCIe address (e.g., '0000:e4:00.0'). Use 'fpga list' to see available options. + + Examples: + fpga dump SWITCHCARD_FPGA + fpga dump 0000:e4:00.0 + fpga dump --all + """ + if all: + fpgas_to_dump = find_xilinx_fpgas() + if not fpgas_to_dump: + click.secho("No FPGAs found in the system", fg="red") + sys.exit(1) + elif pci_address: + fpgas_to_dump = [pci_address] + else: + click.secho("Must specify either TARGET_FPGA or --all", fg="red") + sys.exit(1) + + pddf_config = load_pddf_device_config() + + for fpga_bdf in fpgas_to_dump: + device_name = bdf_to_name(fpga_bdf, pddf_config) + + click.echo("=" * 80) + if device_name: + click.echo(f"FPGA: {device_name} ({fpga_bdf})") + else: + click.echo(f"FPGA: {fpga_bdf}") + click.echo("=" * 80) + + try: + ranges = dump_resource0(fpga_bdf) + for start_offset, end_offset, value in ranges: + click.echo(_format_range(start_offset, end_offset, value)) + except Exception as e: + click.secho(f"Error dumping {fpga_bdf}: {e}", fg="red") + + click.echo() if __name__ == "__main__": cli() diff --git a/platform/broadcom/sonic-platform-modules-nexthop/common/nexthop/fpga_lib.py b/platform/broadcom/sonic-platform-modules-nexthop/common/nexthop/fpga_lib.py index 7b95dbde73c..34c0c500f7b 100644 --- a/platform/broadcom/sonic-platform-modules-nexthop/common/nexthop/fpga_lib.py +++ b/platform/broadcom/sonic-platform-modules-nexthop/common/nexthop/fpga_lib.py @@ -149,3 +149,66 @@ def overwrite_field(reg_val: int, bit_range: tuple[int, int], field_val: int) -> # Combine the cleared register value with the new field value. return cleared_reg | positioned_field_val + +def dump_resource0(pci_address: str, root="") -> list[tuple[int, int, int]]: + """ + Dump entire resource0 memory and return collapsed ranges. + + Uses proper 32-bit register reads (read_32) to respect hardware register boundaries. + + Args: + pci_address: PCI address (e.g., '0000:e4:00.0') + root: Root path for testing purposes + + Returns: + List of (start_offset, end_offset, value) tuples representing memory ranges. + Both start_offset and end_offset are inclusive. + Each tuple is (int, int, int). + """ + file_path = get_resource_0_path(pci_address, root) + + if not os.path.exists(file_path): + raise FileNotFoundError( + f"{file_path} does not exist. Device may not have a BAR0 memory region mapped." + ) + + try: + file_size = os.path.getsize(file_path) + except OSError as e: + raise OSError(f"Error getting size of {file_path}: {e}") + + read_size = (file_size // 4) * 4 + + try: + data = [] + for offset in range(0, read_size, 4): + val = read_32(pci_address, offset, root) + data.append((offset, val)) + + ranges = [] + prev_val = None + range_start = None + range_end = None + + for offset, val in data: + if val == prev_val: + range_end = offset + else: + if prev_val is not None: + ranges.append((range_start, range_end, prev_val)) + + prev_val = val + range_start = offset + range_end = offset + + if prev_val is not None: + ranges.append((range_start, range_end, prev_val)) + + return ranges + + except PermissionError: + raise PermissionError( + f"Permission denied reading {file_path}. Root privileges required." + ) + except OSError as e: + raise OSError(f"Error reading {file_path}: {e}") diff --git a/platform/broadcom/sonic-platform-modules-nexthop/common/nexthop/gen_cli.py b/platform/broadcom/sonic-platform-modules-nexthop/common/nexthop/gen_cli.py index d0fbc94acaa..ff564278ffd 100644 --- a/platform/broadcom/sonic-platform-modules-nexthop/common/nexthop/gen_cli.py +++ b/platform/broadcom/sonic-platform-modules-nexthop/common/nexthop/gen_cli.py @@ -1,4 +1,4 @@ -#!/usr/bin/env python +#!/usr/bin/env python3 # Copyright 2025 Nexthop Systems Inc. All rights reserved. # SPDX-License-Identifier: Apache-2.0 @@ -7,9 +7,11 @@ import jinja2 import json import os +import sys import syslog from nexthop import pcie_lib +from sonic_py_common import device_info PLATFORM_FOLDER = "/usr/share/sonic/platform" PDDF_FOLDER = "/usr/share/sonic/platform/pddf" @@ -101,7 +103,11 @@ def pddf_device_json(template_filepath, vars_filepath, platform_json_filepath, o if not os.path.isfile(template_filepath) or not os.path.isfile(vars_filepath) or not os.path.isfile(platform_json_filepath): syslog.syslog(syslog.LOG_INFO, f"Skipping {output_filepath} generation") return - vars = pcie_lib.get_pcie_variables(vars_filepath) + try: + vars = pcie_lib.get_pcie_variables(vars_filepath) + except Exception as e: + syslog.syslog(syslog.LOG_ERR, f"Failed to generate {output_filepath}: {e}") + sys.exit(1) model_name = get_model_name(platform_json_filepath) if model_name is None: @@ -109,6 +115,14 @@ def pddf_device_json(template_filepath, vars_filepath, platform_json_filepath, o return vars["model_name"] = model_name + + platform = device_info.get_platform() + if platform is None: + syslog.syslog(syslog.LOG_ERR, f"Skipping {output_filepath} generation due to missing platform.") + return + + vars["platform"] = platform + generate_file_from_jinja2_template(template_filepath, vars, output_filepath) @@ -145,7 +159,11 @@ def pcie_yaml(template_filepath, vars_filepath, output_filepath): if not os.path.isfile(template_filepath) or not os.path.isfile(vars_filepath): syslog.syslog(syslog.LOG_INFO, f"Skipping {output_filepath} generation") return - vars = pcie_lib.get_pcie_variables(vars_filepath) + try: + vars = pcie_lib.get_pcie_variables(vars_filepath) + except Exception as e: + syslog.syslog(syslog.LOG_ERR, f"Failed to generate {output_filepath}: {e}") + sys.exit(1) generate_file_from_jinja2_template(template_filepath, vars, output_filepath) diff --git a/platform/broadcom/sonic-platform-modules-nexthop/common/nexthop/led_control.py b/platform/broadcom/sonic-platform-modules-nexthop/common/nexthop/led_control.py index a394c629f88..47a41d7dec7 100644 --- a/platform/broadcom/sonic-platform-modules-nexthop/common/nexthop/led_control.py +++ b/platform/broadcom/sonic-platform-modules-nexthop/common/nexthop/led_control.py @@ -12,6 +12,7 @@ from portconfig import get_port_config from sonic_led.led_control_base import LedControlBase from sonic_py_common import logger + from sonic_py_common.interface import backplane_prefix, inband_prefix, recirc_prefix from swsscommon.swsscommon import SonicV2Connector except ImportError as e: raise ImportError(str(e) + " - required module not found") @@ -65,6 +66,9 @@ def _init_port_mappings(self): sys.exit(1) for logical_name, attributes in ports_dict.items(): + if logical_name.startswith((backplane_prefix(), inband_prefix(), recirc_prefix())): + continue + index = attributes.get("index") lanes = attributes.get("lanes") if not index or not lanes: diff --git a/platform/broadcom/sonic-platform-modules-nexthop/common/nexthop/pcie_lib.py b/platform/broadcom/sonic-platform-modules-nexthop/common/nexthop/pcie_lib.py index 50a997b9151..095c3a5c96c 100644 --- a/platform/broadcom/sonic-platform-modules-nexthop/common/nexthop/pcie_lib.py +++ b/platform/broadcom/sonic-platform-modules-nexthop/common/nexthop/pcie_lib.py @@ -1,23 +1,22 @@ #!/usr/bin/env python3 +import functools import subprocess -import sys -import syslog import yaml PLATFORM_FOLDER = "/usr/share/sonic/platform" +@functools.cache def get_cmd_output(cmd: str) -> str: result = subprocess.run(["/bin/bash", "-c", cmd], capture_output=True) if result.returncode != 0: - syslog.syslog(syslog.LOG_ERR, f"{cmd} -- command failed") - sys.exit(1) + raise RuntimeError(f"'{cmd}' -- command failed") return result.stdout.decode("utf-8").strip() -def get_pcie_variables(vars_filepath) -> dict[str, str]: +def get_var_name_to_cmd_map(vars_filepath) -> dict[str, str]: """ Reads a yaml file containing a list of variables in the format of (name, lookup_command) pairs. @@ -29,9 +28,7 @@ def get_pcie_variables(vars_filepath) -> dict[str, str]: - name: "baz_bdf" lookup_command: "setpci -s 00:02.2 0x19.b | xargs printf '0000:%s:00.0'" - Returns a dict mapping name to the output of the lookup_command. These variables are intended - to be used for feeding the jinja2 templates, e.g. pddf-device.json.j2 and pcie.yaml.j2, as PCIe - buses of the devices behind root ports can only be determined after boot. + Returns a dict mapping the variable name to the lookup_command. """ result = dict() @@ -39,31 +36,60 @@ def get_pcie_variables(vars_filepath) -> dict[str, str]: config = yaml.safe_load(f) for entry in config: name = entry.get("name") - command = entry.get("lookup_command") - if not name or not command: - syslog.syslog( - syslog.LOG_ERR, - f"{vars_filepath} -- invalid format: each entry must contain 'name' and 'lookup_command'", + cmd = entry.get("lookup_command") + if not name or not cmd: + raise ValueError( + f"{vars_filepath} -- invalid format: each entry must contain 'name' and 'lookup_command'" ) - exit(1) elif name in result: - syslog.syslog( - syslog.LOG_ERR, - f"{vars_filepath} -- duplicate variable name '{name}'", - ) - exit(1) - value = get_cmd_output(command) - result[name] = value + raise ValueError(f"{vars_filepath} -- duplicate variable name '{name}'") + result[name] = cmd + return result -def get_cpu_card_fpga_bdf() -> str | None: - return get_pcie_variables(f"{PLATFORM_FOLDER}/pcie-variables.yaml").get( +def get_pcie_variables(vars_filepath, vars_to_get: set[str] | None = None) -> dict[str, str]: + """ + Reads a yaml file containing a list of variables in the format of (name, lookup_command) pairs. + + For example: + - name: "foo_bus" + lookup_command: "setpci -s 00:02.1 0x19.b" + - name: "bar_bus" + lookup_command: "echo 'e5'" + - name: "baz_bdf" + lookup_command: "setpci -s 00:02.2 0x19.b | xargs printf '0000:%s:00.0'" + + Returns a dict mapping the variable name to the output of the lookup_command. + If `vars_to_get` is provided, only returns the variables in `vars_to_get`. + Otherwise, returns all variables. + + These variables are intended to be used for feeding the jinja2 templates, + e.g. pddf-device.json.j2 and pcie.yaml.j2, as PCIe buses of the devices + behind root ports can only be determined after boot. + """ + all_vars = get_var_name_to_cmd_map(vars_filepath) + + return { + name: get_cmd_output(cmd) + for name, cmd in all_vars.items() + if vars_to_get is None or name in vars_to_get + } + + +def get_cpu_card_fpga_bdf(vars_filepath=f"{PLATFORM_FOLDER}/pcie-variables.yaml") -> str | None: + return get_pcie_variables(vars_filepath, vars_to_get={"cpu_card_fpga_bdf"}).get( "cpu_card_fpga_bdf" ) -def get_switchcard_fpga_bdf() -> str | None: - return get_pcie_variables(f"{PLATFORM_FOLDER}/pcie-variables.yaml").get( +def get_switchcard_fpga_bdf(vars_filepath=f"{PLATFORM_FOLDER}/pcie-variables.yaml") -> str | None: + return get_pcie_variables(vars_filepath, vars_to_get={"switchcard_fpga_bdf"}).get( "switchcard_fpga_bdf" ) + + +def get_switchcard_fpga_0_bdf(vars_filepath=f"{PLATFORM_FOLDER}/pcie-variables.yaml") -> str | None: + return get_pcie_variables(vars_filepath, vars_to_get={"switchcard_fpga_0_bdf"}).get( + "switchcard_fpga_0_bdf" + ) diff --git a/platform/broadcom/sonic-platform-modules-nexthop/common/nexthop/pddf_config_parser.py b/platform/broadcom/sonic-platform-modules-nexthop/common/nexthop/pddf_config_parser.py index 0249c2ca5fe..ac4b8e05241 100644 --- a/platform/broadcom/sonic-platform-modules-nexthop/common/nexthop/pddf_config_parser.py +++ b/platform/broadcom/sonic-platform-modules-nexthop/common/nexthop/pddf_config_parser.py @@ -6,17 +6,21 @@ """ import json +import os import re from dataclasses import dataclass from enum import Enum +from sonic_py_common import device_info PDDF_DEVICE_JSON_PATH = "/usr/share/sonic/platform/pddf/pddf-device.json" +PD_PLUGIN_JSON_PATH = "/usr/share/sonic/platform/pddf/pd-plugin.json" class FpgaDeviceName(str, Enum): CPU_CARD = "CPUCARD_FPGA" SWITCHCARD = "SWITCHCARD_FPGA" + SWITCHCARD_0 = "SWITCHCARD_FPGA0" @dataclass @@ -32,6 +36,33 @@ def load_pddf_device_config(): return config +def load_pd_plugin_config() -> dict: + """Load and parse pd-plugin.json configuration. Raises exception on error.""" + with open(PD_PLUGIN_JSON_PATH, "r") as f: + config = json.load(f) + return config + + +def load_platform_json() -> dict: + """ + Load and parse platform.json configuration file. + + Returns: + Dictionary containing the platform.json configuration. + + Raises: + FileNotFoundError: If platform.json file does not exist. + json.JSONDecodeError: If the file contains invalid JSON. + Exception: For other file reading errors. + """ + platform_path = device_info.get_path_to_platform_dir() + platform_json_file = os.path.join(platform_path, device_info.PLATFORM_JSON_FILE) + + with open(platform_json_file, 'r') as f: + config = json.load(f) + return config + + def extract_fpga_attrs(config, fpga_types): """Extract fpga attrs information from PDDF config. Raise exception on error.""" fpga_attrs = {} diff --git a/platform/broadcom/sonic-platform-modules-nexthop/common/service/adm1266-rtc-sync.service b/platform/broadcom/sonic-platform-modules-nexthop/common/service/adm1266-rtc-sync.service new file mode 100644 index 00000000000..0679bb2814f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-nexthop/common/service/adm1266-rtc-sync.service @@ -0,0 +1,11 @@ +[Unit] +Description=ADM1266 RTC synchronization service +After=pddf-platform-init.service +Requires=pddf-platform-init.service + +[Service] +Type=oneshot +ExecStart=/usr/local/bin/adm1266_rtc_sync + +[Install] +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-nexthop/common/service/adm1266-rtc-sync.timer b/platform/broadcom/sonic-platform-modules-nexthop/common/service/adm1266-rtc-sync.timer new file mode 100644 index 00000000000..fe32fdcd7f5 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-nexthop/common/service/adm1266-rtc-sync.timer @@ -0,0 +1,16 @@ +[Unit] +Description=Synchronize ADM1266 RTC every 5 minutes +After=pddf-platform-init.service +Requires=pddf-platform-init.service + +[Timer] +Unit=adm1266-rtc-sync.service + +# Run every 5 minutes +OnUnitActiveSec=5min + +# Run immediately after system boot (but still wait for pddf-platform-init.service) +OnBootSec=0 + +[Install] +WantedBy=timers.target diff --git a/platform/broadcom/sonic-platform-modules-nexthop/common/sonic_platform/__init__.py b/platform/broadcom/sonic-platform-modules-nexthop/common/sonic_platform/__init__.py index 88dbe605174..486c68a796c 100644 --- a/platform/broadcom/sonic-platform-modules-nexthop/common/sonic_platform/__init__.py +++ b/platform/broadcom/sonic-platform-modules-nexthop/common/sonic_platform/__init__.py @@ -3,6 +3,6 @@ # All the derived classes for PDDF __all__ = ["platform", "chassis", "component", "sfp", "psu", "thermal", "thermal_manager", "thermal_conditions", - "thermal_actions", "thermal_infos", "adm1266"] + "thermal_actions", "thermal_infos", "reboot_cause_manager"] from sonic_platform import * diff --git a/platform/broadcom/sonic-platform-modules-nexthop/common/sonic_platform/adm1266.py b/platform/broadcom/sonic-platform-modules-nexthop/common/sonic_platform/adm1266.py index ff1d00f177b..b640bd424d6 100644 --- a/platform/broadcom/sonic-platform-modules-nexthop/common/sonic_platform/adm1266.py +++ b/platform/broadcom/sonic-platform-modules-nexthop/common/sonic_platform/adm1266.py @@ -1,653 +1,631 @@ # Copyright 2025 Nexthop Systems Inc. All rights reserved. # SPDX-License-Identifier: Apache-2.0 -"""ADM1266 power management and blackbox data processing. +"""ADM1266 structures for black box data processing. -Provides functionality for reading and processing blackbox fault data from -ADM1266 power management devices, including fault record parsing, reboot -cause determination, and power loss analysis. +Provides classes and helpers for representing an ADM1266 device +and parsing the ADM1266 blackbox data. """ import datetime -import json -import os -from typing import Any, Callable, Dict, List -from sonic_platform_base.chassis_base import ChassisBase - -# Rendering and formatting helpers - -def binw(val: int, width: int) -> str: - """Format value as binary string with specified width. - - Args: - val: Integer value to format - width: Number of bits in output - - Returns: - Binary string like "0b00001010" - """ - return f"0b{val:0{width}b}" - - -def hex_value(_key: str, val: int) -> str: - """Format value as hexadecimal string. - - Args: - _key: Field name (unused) - val: Integer value to format - - Returns: - Hexadecimal string like "0x1a" - """ - return f"0x{val:x}" - - -def default_render(_key: str, val: Any) -> Any: - """Default renderer returning empty string for falsy values. - - Args: - _key: Field name (unused) - val: Value to render - - Returns: - Original value or empty string if falsy +from dataclasses import dataclass +from enum import Enum +from itertools import groupby +from typing import Any, cast +from sonic_platform.dpm_base import ( + DpmRecord, + DpmType, + DpmBase, + DpmPowerUpEntry, + RebootCause, + timestamp_as_string, +) +from sonic_py_common import syslogger + + +UNIX_EPOCH = datetime.datetime.fromtimestamp(0, tz=datetime.timezone.utc) + +# This MUST match ADM1266_NH_CUSTOM_EPOCH_OFFSET in nh_adm1266.c kernel driver. +# ADM1266 only uses 4 bytes to store the seconds, which rollover every ~136 years. +# If using the normal UNIX epoch (1970), the timestamp will rollover in 2106. +# So, we use a custom epoch to maximize the usable time range. +CUSTOM_EPOCH = datetime.datetime(2024, 1, 1, tzinfo=datetime.timezone.utc) +EPOCH_OFFSET_SECONDS = int((CUSTOM_EPOCH - UNIX_EPOCH).total_seconds()) # 1704067200 + +SYSLOG_IDENTIFIER = "sonic_platform.adm1266" +logger = syslogger.SysLogger(SYSLOG_IDENTIFIER) + + +class PinName(Enum): + """ADM1266 pin name.""" + + # High-voltage Supply Fault Detection inputs. + VH1 = "VH1" + VH2 = "VH2" + VH3 = "VH3" + VH4 = "VH4" + + # Primary-voltage Supply Fault Detection inputs. + VP1 = "VP1" + VP2 = "VP2" + VP3 = "VP3" + VP4 = "VP4" + VP5 = "VP5" + VP6 = "VP6" + VP7 = "VP7" + VP8 = "VP8" + VP9 = "VP9" + VP10 = "VP10" + VP11 = "VP11" + VP12 = "VP12" + VP13 = "VP13" + + # General Purpose Inputs. + GPI1 = "GPI1" + GPI2 = "GPI2" + GPI3 = "GPI3" + GPI4 = "GPI4" + GPI5 = "GPI5" + GPI6 = "GPI6" + GPI7 = "GPI7" + GPI8 = "GPI8" + GPI9 = "GPI9" + # General Purpose Outputs. + GPO1 = "GPO1" + GPO2 = "GPO2" + GPO3 = "GPO3" + GPO4 = "GPO4" + GPO5 = "GPO5" + GPO6 = "GPO6" + GPO7 = "GPO7" + GPO8 = "GPO8" + GPO9 = "GPO9" + + # Programmable Driver Inputs. + PDI1 = "PDI1" + PDI2 = "PDI2" + PDI3 = "PDI3" + PDI4 = "PDI4" + PDI5 = "PDI5" + PDI6 = "PDI6" + PDI7 = "PDI7" + PDI8 = "PDI8" + PDI9 = "PDI9" + PDI10 = "PDI10" + PDI11 = "PDI11" + PDI12 = "PDI12" + PDI13 = "PDI13" + PDI14 = "PDI14" + PDI15 = "PDI15" + PDI16 = "PDI16" + # Programmable Driver Outputs. + PDO1 = "PDO1" + PDO2 = "PDO2" + PDO3 = "PDO3" + PDO4 = "PDO4" + PDO5 = "PDO5" + PDO6 = "PDO6" + PDO7 = "PDO7" + PDO8 = "PDO8" + PDO9 = "PDO9" + PDO10 = "PDO10" + PDO11 = "PDO11" + PDO12 = "PDO12" + PDO13 = "PDO13" + PDO14 = "PDO14" + PDO15 = "PDO15" + PDO16 = "PDO16" + + +@dataclass +class Pin: + """ADM1266 pin information.""" + + name: PinName + # Optional alias for the pin, e.g. VH3 as "3V3_WEST" which is the rail name. + nickname: str | None = None + + def __str__(self) -> str: + if self.nickname: + # Example: "VH3(3V3_WEST)" + return f"{self.name.value}({self.nickname})" + else: + return self.name.value + + +@dataclass +class PinStatuses: + """Statuses of ADM1266 pins of the same type (e.g. all are VH pins, or VP pins, or etc.).""" + + val: int + pins: list[Pin] + + @classmethod + def from_int(cls, raw_val: int, bitmask_to_pin: dict[int, PinName]): + val = 0 + pins = [] + for mask, pin_type in bitmask_to_pin.items(): + if raw_val & mask: + val |= mask + pins.append(Pin(pin_type)) + return cls(val, pins) + + def set_pin_nickname(self, pin_to_nickname: dict[str, str]): + for pin_info in self.pins: + if pin_info.name.value in pin_to_nickname: + pin_info.nickname = pin_to_nickname[pin_info.name.value] + + def to_str(self, bit_width) -> str: + if self.pins: + # Example: "0b0101 [VH3(3V3_WEST), VH1]" + pins_str = ", ".join([str(pin_info) for pin_info in self.pins]) + return f"0b{self.val:0{bit_width}b} [{pins_str}]" + else: + # Example: "0b0000" + return f"0b{self.val:0{bit_width}b}" + + +@dataclass +class Adm1266BlackBoxRecord(DpmRecord): + """ADM1266 black box record. Refer to ADM1266 datasheet Table 79: Black Box Data Format. + + Represents a single fault record from the ADM1266 blackbox. """ - return val or "" - - -def time_since(_key: str, data: bytes) -> str: - """Convert ADM1266 8-byte timestamp to human-readable elapsed time. - - Parses the ADM1266 blackbox timestamp format and converts to elapsed - time since power-on with fractional seconds preserved. - Args: - _key: Field name (unused) - data: 8-byte timestamp from ADM1266 blackbox + # byte [1:0] + # Unique ID for this black box record. + uid: int + # byte 2 + # Empty boolean, Reserved, Page index that current record is saved in, JUMP_TYPE. + byte_2: int + # byte 3 + action_index: int + # byte 4 + rule_index: int + # byte 5 + # Over/under voltage status of the VHx pins. + vh_over_voltage: PinStatuses + vh_under_voltage: PinStatuses + # byte [7:6] + # The state in which the black box write was triggered. + current_state: int + # byte [9:8] + # The state from which the black box write was entered. + last_state: int + # byte [11:10] + # Overvoltage status of the VPx pins. + vp_over_voltage: PinStatuses + # byte [13:12] + # Undervoltage status of the VPx pins. + vp_under_voltage: PinStatuses + # byte [15:14] + # Input status of GPIOx pins. + gpio_in: PinStatuses + # byte [17:16] + # Output status of GPIOx pins. + gpio_out: PinStatuses + # byte [19:18] + # Input status of PDIOx pins. + pdio_in: PinStatuses + # byte [21:20] + # Output status of PDIOx pins. + pdio_out: PinStatuses + # byte [23:22] + # Number of times the device has power cycled. + powerup_counter: int + # byte [31:24] + # The time when the black box record was triggered. + # This could be the time elapsed since power-on, or a UTC timestamp sourced from the DPM clock. + timestamp: datetime.timedelta | datetime.datetime + # byte 63 + # CRC-8 of the record. + crc: int + + # Raw data for this record (byte [63:0]) + raw: bytes + + # Name of the DPM device that this record belongs to. + dpm_name: str + + RECORD_SIZE_IN_BYTES = 64 + + # Bitmask -> PinName mappings. Used for decoding the byte(s) for pin statuses. + BITMASK_TO_VH = { + (1 << 3): PinName.VH4, # bit 3 + (1 << 2): PinName.VH3, # bit 2 + (1 << 1): PinName.VH2, # bit 1 + (1 << 0): PinName.VH1, # bit 0 + } + BITMASK_TO_VP = { + (1 << 12): PinName.VP13, # bit 12 + (1 << 11): PinName.VP12, # bit 11 + (1 << 10): PinName.VP11, # bit 10 + (1 << 9): PinName.VP10, # bit 9 + (1 << 8): PinName.VP9, # bit 8 + (1 << 7): PinName.VP8, # bit 7 + (1 << 6): PinName.VP7, # bit 6 + (1 << 5): PinName.VP6, # bit 5 + (1 << 4): PinName.VP5, # bit 4 + (1 << 3): PinName.VP4, # bit 3 + (1 << 2): PinName.VP3, # bit 2 + (1 << 1): PinName.VP2, # bit 1 + (1 << 0): PinName.VP1, # bit 0 + } + BITMASK_TO_GPI = { + (1 << 11): PinName.GPI7, # bit 11 + (1 << 10): PinName.GPI6, # bit 10 + (1 << 9): PinName.GPI5, # bit 9 + (1 << 8): PinName.GPI4, # bit 8 + (1 << 7): PinName.GPI9, # bit 7 + (1 << 6): PinName.GPI8, # bit 6 + (1 << 2): PinName.GPI3, # bit 2 + (1 << 1): PinName.GPI2, # bit 1 + (1 << 0): PinName.GPI1, # bit 0 + } + BITMASK_TO_GPO = { + (1 << 11): PinName.GPO7, # bit 11 + (1 << 10): PinName.GPO6, # bit 10 + (1 << 9): PinName.GPO5, # bit 9 + (1 << 8): PinName.GPO4, # bit 8 + (1 << 7): PinName.GPO9, # bit 7 + (1 << 6): PinName.GPO8, # bit 6 + (1 << 2): PinName.GPO3, # bit 2 + (1 << 1): PinName.GPO2, # bit 1 + (1 << 0): PinName.GPO1, # bit 0 + } + BITMASK_TO_PDI = { + (1 << 15): PinName.PDI16, # bit 15 + (1 << 14): PinName.PDI15, # bit 14 + (1 << 13): PinName.PDI14, # bit 13 + (1 << 12): PinName.PDI13, # bit 12 + (1 << 11): PinName.PDI12, # bit 11 + (1 << 10): PinName.PDI11, # bit 10 + (1 << 9): PinName.PDI10, # bit 9 + (1 << 8): PinName.PDI9, # bit 8 + (1 << 7): PinName.PDI8, # bit 7 + (1 << 6): PinName.PDI7, # bit 6 + (1 << 5): PinName.PDI6, # bit 5 + (1 << 4): PinName.PDI5, # bit 4 + (1 << 3): PinName.PDI4, # bit 3 + (1 << 2): PinName.PDI3, # bit 2 + (1 << 1): PinName.PDI2, # bit 1 + (1 << 0): PinName.PDI1, # bit 0 + } + BITMASK_TO_PDO = { + (1 << 15): PinName.PDO16, # bit 15 + (1 << 14): PinName.PDO15, # bit 14 + (1 << 13): PinName.PDO14, # bit 13 + (1 << 12): PinName.PDO13, # bit 12 + (1 << 11): PinName.PDO12, # bit 11 + (1 << 10): PinName.PDO11, # bit 10 + (1 << 9): PinName.PDO10, # bit 9 + (1 << 8): PinName.PDO9, # bit 8 + (1 << 7): PinName.PDO8, # bit 7 + (1 << 6): PinName.PDO7, # bit 6 + (1 << 5): PinName.PDO6, # bit 5 + (1 << 4): PinName.PDO5, # bit 4 + (1 << 3): PinName.PDO4, # bit 3 + (1 << 2): PinName.PDO3, # bit 2 + (1 << 1): PinName.PDO2, # bit 1 + (1 << 0): PinName.PDO1, # bit 0 + } + + @classmethod + def from_bytes(cls, data: bytes, dpm_name: str): + """Creates Adm1266BlackBoxRecord from raw bytes. + + Args: + data: 64-byte data representing a black box record + dpm_name: Name of the DPM device for this black box + (for display purposes) - Returns: - Human-readable string like "3 minutes 2.518700 seconds after power-on" - or empty string if data is invalid - """ - if not isinstance(data, (bytes, bytearray)) or len(data) != 8: - return '' - if data in (b'\x00' * 8, b'\xff' * 8): - return '' - - secs = int.from_bytes(data[2:6], 'little') - frac = int.from_bytes(data[0:2], 'little') / 65536.0 - total_seconds = secs + frac - - minutes_total, seconds = divmod(total_seconds, 60) - hours_total, minutes = divmod(minutes_total, 60) - days_total, hours = divmod(hours_total, 24) - years, days = divmod(days_total, 365) - - def fmt(value: float, name: str) -> str: - if value == 0: - return '' - return f"{int(value)} {name}" + ('s' if int(value) != 1 else '') - - parts = [ - fmt(years, "year"), - fmt(days, "day"), - fmt(hours, "hour"), - fmt(minutes, "minute") - ] - parts = [p for p in parts if p] # remove empty - parts.append(f"{seconds:.6f} second" + ('' if abs(seconds - 1.0) < 1e-6 else 's')) - return " ".join(parts) + " after power-on" - -# Channel naming configuration -CHANNEL_PREFIX: Dict[str, str] = { - 'vhx': 'VH', - 'vp_ov': 'VP', - 'vp_uv': 'VP', - 'gpio_in': 'GPIO', - 'gpio_out': 'GPIO', - 'pdio_in': 'PDIO', - 'pdio_out': 'PDIO', -} - -CHANNEL_WIDTH: Dict[str, int] = { - 'vhx': 8, - 'vp_ov': 16, - 'vp_uv': 16, - 'gpio_in': 16, - 'gpio_out': 16, - 'pdio_in': 16, - 'pdio_out': 16, -} - - -def channel_names(key: str, value: int) -> str: - """Convert channel bitmask to human-readable channel names. - - Args: - key: Channel type (e.g., 'vhx', 'vp_ov', 'pdio_in') - value: Bitmask representing active channels - - Returns: - Comma-separated channel names with binary representation, - e.g., "VH1,VH3 (0b00000101)" - """ - prefix = CHANNEL_PREFIX.get(key) - if prefix is None: - return hex_value(key, value) - - names = [] - idx = 1 - mask = value - while mask: - if mask & 1: - names.append(f"{prefix}{idx}") - mask >>= 1 - idx += 1 - - width = CHANNEL_WIDTH.get(key) - if not names: - return binw(value, width) - return ','.join(names) + " (" + binw(value, width) + ")" - - -def raw_pretty(_key: str, data: bytes) -> str: - """Format 64-byte blackbox record as hex dump. - - Args: - _key: Field name (unused) - data: 64-byte blackbox data - - Returns: - Multi-line hex dump (8 rows of 8 bytes each) - """ - rows = [] - for i in range(0, 64, 8): - chunk = data[i:i+8] - rows.append(' '.join(f"{b:02x}" for b in chunk)) - return '\n'.join(rows) - -# Field renderer mapping -RENDER: Dict[str, Callable[[str, Any], str]] = {} - -# Numeric fields rendered as hex -for prop in ['uid', 'powerup', 'action', 'rule', 'current', 'last', - 'vhx', 'vp_ov', 'vp_uv', 'gpio_in', 'gpio_out', 'pdio_in', 'pdio_out']: - RENDER[prop] = hex_value - -# Special renderers -RENDER['timestamp'] = time_since -RENDER['dpm_fault'] = lambda _k, v: v if isinstance(v, str) else hex_value(_k, v) -RENDER['power_fault_cause'] = lambda _k, v: v if isinstance(v, str) else hex_value(_k, v) -RENDER['raw'] = raw_pretty - -# Channel fields use human-friendly names -for k in ['vhx', 'vp_ov', 'vp_uv', 'gpio_in', 'gpio_out', 'pdio_in', 'pdio_out']: - RENDER[k] = channel_names - -# Output field order for display -OUTPUT_ORDER = [ - 'dpm_name', 'fault_uid', 'powerup', 'action', 'rule', 'power_loss', 'current', 'last', - 'vhx', 'vp_ov', 'vp_uv', 'gpio_in', 'gpio_out', 'pdio_in', 'pdio_out', - 'dpm_fault', 'power_fault_cause', 'timestamp', 'raw' -] - - -def find_voltage_faults(vx_bits: int, mapping: Dict[int, str]) -> str: - """Find power rails that experienced (under/over) voltage faults. - - Args: - vx_bits: Voltage fault bitmask - mapping: Mapping from bit index to rail description - - Returns: - Comma-separated list of affected rail names, or empty string if none - """ - reason = "" - for vx_idx, rail_desc in mapping.items(): - if (vx_bits >> (vx_idx - 1)) & 1: - if reason: - reason += ", " - reason += rail_desc - return reason - - -def determine_voltage_faults(vpx_to_rail_desc: Dict[int, str], - vhx_to_rail_desc: Dict[int, str], - vhx: int, vp_ov: int, vp_uv: int) -> Dict[str, str]: - """Determine under/over voltage faults from VHx and VPx bits - - Analyzes VH (voltage high) and VP (voltage positive) fault bits to - identify which power rails caused the fault. - - Args: - vpx_to_rail_desc: VPx to rail mapping descriptions - vhx_to_rail_desc: VHx to rail mapping descriptions - vhx: VH fault bitmask - vp_ov: VP overvoltage fault bitmask - vp_uv: VP undervoltage fault bitmask - - Returns: - Dictionary containing a list of under/over voltage faults - """ - vhx_ov_faults = find_voltage_faults(vhx & 0x0F, vhx_to_rail_desc) - vhx_uv_faults = find_voltage_faults(vhx & 0xF0, vhx_to_rail_desc) - - vpx_ov_faults = find_voltage_faults(vp_ov, vpx_to_rail_desc) - vpx_uv_faults = find_voltage_faults(vp_uv, vpx_to_rail_desc) - - ov_faults = [] - if vhx_ov_faults: - ov_faults.append(vhx_ov_faults) - if vpx_ov_faults: - ov_faults.append(vpx_ov_faults) - - faults = {} - if ov_faults: - faults['over_voltage_rails'] = ','.join(ov_faults) - - uv_faults = [] - if vhx_uv_faults: - uv_faults.append(vhx_uv_faults) - if vpx_uv_faults: - uv_faults.append(vpx_uv_faults) - - if uv_faults: - faults['under_voltage_rails'] = ','.join(uv_faults) - return faults - -def is_fault(pdio_in, pdio_mask, pdio_val, gpio_in, gpio_mask, gpio_val): - return (gpio_in & gpio_mask) == gpio_val and (pdio_in & pdio_mask) == pdio_val - -def decode_power_fault_cause(dpm_signal_to_fault_cause: List[Dict[str, Any]], - pdio_in: int, gpio_in: int) -> (str, str, str, str): - """Decode power fault cause from PDIO and GPIO input bits. - - Args: - dpm_signal_to_fault_cause: List of signal pattern to fault cause mappings - pdio_in: PDIO input bitmask - gpio_in: GPIO input bitmask - - Returns: - Tuple of (hw_cause, hw_desc, summary, reboot_cause) as comma-separated strings - """ - hw_cause = [] - hw_desc = [] - summary = [] - reboot_cause = [] - for cause_dict in dpm_signal_to_fault_cause: - if is_fault(pdio_in, cause_dict["pdio_mask"], cause_dict["pdio_value"], - gpio_in, cause_dict["gpio_mask"], cause_dict["gpio_value"]): - hw_cause.append(cause_dict.get("hw_cause")) - hw_desc.append(cause_dict.get("hw_desc")) - summary.append(cause_dict.get("summary")) - reboot_cause.append(cause_dict.get("reboot_cause")) - return ",".join(hw_cause), ",".join(hw_desc), ",".join(summary), ",".join(reboot_cause) - -def reboot_cause_str_to_type(cause: str) -> str: - """Return the cause specific type defined in ChassisBase. - - Args: - cause: Reboot cause string, may be comma-separated for multiple causes - - Returns: - ChassisBase reboot cause constant (takes first if comma-separated) - """ - # Handle comma-separated causes by taking the first one - if ',' in cause: - cause = cause.split(',')[0].strip() + Returns: + Parsed BlackBoxRecord + """ + if len(data) != cls.RECORD_SIZE_IN_BYTES: + raise ValueError( + f"Adm1266BlackBoxRecord: expected {cls.RECORD_SIZE_IN_BYTES} bytes, got {len(data)} bytes" + ) + + def to_int(field_bytes: bytes) -> int: + # ADM1266 uses little endian. + return int.from_bytes(field_bytes, byteorder="little") + + def to_timedelta_or_datetime(field_bytes: bytes) -> datetime.timedelta | datetime.datetime: + BIT_TO_SECONDS = float(1 / float(2**16)) # 1 bit = 1 / 2^16 seconds + + secs = int.from_bytes(field_bytes[2:6], "little") + fraction = int.from_bytes(field_bytes[0:2], "little") * BIT_TO_SECONDS + + elapsed_seconds = secs + fraction + + # Relative to power-on. + # We assume that the custom epoch (`rtc_epoch_offset`) hadn't been set + # if the record shows that the elapsed time is <7 days. + SEVEN_DAY_SECONDS = 7 * 24 * 60 * 60 + if elapsed_seconds < SEVEN_DAY_SECONDS: + return datetime.timedelta(seconds=elapsed_seconds) + + # Relative to the custom epoch. + return CUSTOM_EPOCH + datetime.timedelta(seconds=elapsed_seconds) + + data_5_bit_3_0 = data[5] & 0b1111 + data_5_bit_7_4 = (data[5] >> 4) & 0b1111 + + return cls( + uid=to_int(data[0:2]), + byte_2=data[2], + action_index=data[3], + rule_index=data[4], + vh_over_voltage=PinStatuses.from_int(data_5_bit_3_0, cls.BITMASK_TO_VH), + vh_under_voltage=PinStatuses.from_int(data_5_bit_7_4, cls.BITMASK_TO_VH), + current_state=to_int(data[6:8]), + last_state=to_int(data[8:10]), + vp_over_voltage=PinStatuses.from_int(to_int(data[10:12]), cls.BITMASK_TO_VP), + vp_under_voltage=PinStatuses.from_int(to_int(data[12:14]), cls.BITMASK_TO_VP), + gpio_in=PinStatuses.from_int(to_int(data[14:16]), cls.BITMASK_TO_GPI), + gpio_out=PinStatuses.from_int(to_int(data[16:18]), cls.BITMASK_TO_GPO), + pdio_in=PinStatuses.from_int(to_int(data[18:20]), cls.BITMASK_TO_PDI), + pdio_out=PinStatuses.from_int(to_int(data[20:22]), cls.BITMASK_TO_PDO), + powerup_counter=to_int(data[22:24]), + timestamp=to_timedelta_or_datetime(data[24:32]), + crc=data[63], + raw=data, + dpm_name=dpm_name, + ) + + def is_valid(self) -> bool: + is_empty = self.byte_2 & 0b0000_0001 == 1 + return not is_empty + + def _get_power_fault_cause_from_signal( + self, dpm_signal_to_fault_cause: list[dict[str, Any]] + ) -> RebootCause | None: + """Returns the power fault cause from the given signal pattern to fault cause mappings.""" + for entry in dpm_signal_to_fault_cause: + pdio_mask = int(entry["pdio_mask"], 0) + pdio_value = int(entry["pdio_value"], 0) + gpio_mask = int(entry["gpio_mask"], 0) + gpio_value = int(entry["gpio_value"], 0) + if (self.pdio_in.val & pdio_mask) == pdio_value and \ + (self.gpio_in.val & gpio_mask) == gpio_value: + return RebootCause( + type=RebootCause.Type.HARDWARE, + source=self.dpm_name, + timestamp=self.timestamp, + cause=entry["hw_cause"], + description=entry["hw_desc"], + chassis_reboot_cause_category=entry["reboot_cause"], + ) + return None + + def set_metadata_and_process_power_fault_cause(self, platform_spec: dict[str, Any]): + """Sets metadata from the given platform spec. + + Such as + - Rail name of each VH pin + - Rail name of each VP pin + - Nickname of each GPI/GPO/PDI/PDO pin + - Power fault cause (if PDI & GPI signal matches a known pattern) + """ + # Set nicknames for each pin. + if "pin_to_name" in platform_spec: + pin_to_name = platform_spec["pin_to_name"] + self.vh_over_voltage.set_pin_nickname(pin_to_name) + self.vh_under_voltage.set_pin_nickname(pin_to_name) + self.vp_over_voltage.set_pin_nickname(pin_to_name) + self.vp_under_voltage.set_pin_nickname(pin_to_name) + self.gpio_in.set_pin_nickname(pin_to_name) + self.gpio_out.set_pin_nickname(pin_to_name) + self.pdio_in.set_pin_nickname(pin_to_name) + self.pdio_out.set_pin_nickname(pin_to_name) + + # Analyze the signal pattern to determine the power fault cause. + self._power_fault_cause = self._get_power_fault_cause_from_signal( + platform_spec.get("dpm_signal_to_fault_cause", {}) + ) + + def as_dict(self) -> dict[str, str]: + def raw_pretty(data: bytes) -> str: + """Returns multi-line hex dump (8 rows of 8 bytes each).""" + rows = [] + for i in range(0, 64, 8): + chunk = data[i : i + 8] + rows.append(" ".join(f"{b:02x}" for b in chunk)) + return "\n".join(rows) + + def pins_with_under_voltage() -> str: + pins = self.vh_under_voltage.pins + self.vp_under_voltage.pins + return ",".join(map(str, pins)) or "n/a" + + def pins_with_over_voltage() -> str: + pins = self.vh_over_voltage.pins + self.vp_over_voltage.pins + return ",".join(map(str, pins)) or "n/a" + + def power_fault_cause_summary() -> str: + power_fault_cause = ( + f"{self._power_fault_cause.cause} ({self._power_fault_cause.description})" + if self._power_fault_cause + else "n/a" + ) + return "; ".join( + [ + power_fault_cause, + f"under_voltage: {pins_with_under_voltage()}", + f"over_voltage: {pins_with_over_voltage()}", + ] + ) + + return { + "timestamp": timestamp_as_string(self.timestamp), + "dpm_name": self.dpm_name, + "power_fault_cause": power_fault_cause_summary(), + "uid": str(self.uid), + "byte_2": f"0x{self.byte_2:02x}", + "action_index": str(self.action_index), + "rule_index": str(self.rule_index), + "vh_over_voltage_[4:1]": self.vh_over_voltage.to_str(bit_width=4), + "vh_under_voltage_[4:1]": self.vh_under_voltage.to_str(bit_width=4), + "current_state": str(self.current_state), + "last_state": str(self.last_state), + "vp_over_voltage_[13:1]": self.vp_over_voltage.to_str(bit_width=13), + "vp_under_voltage_[13:1]": self.vp_under_voltage.to_str(bit_width=13), + "gpio_in_[7:4,9:8,R,R,R,3:1]": self.gpio_in.to_str(bit_width=12), + "gpio_out_[7:4,9:8,R,R,R,3:1]": self.gpio_out.to_str(bit_width=12), + "pdio_in_[16:1]": self.pdio_in.to_str(bit_width=16), + "pdio_out_[16:1]": self.pdio_out.to_str(bit_width=16), + "powerup_counter": str(self.powerup_counter), + "crc": f"0x{self.crc:02x}", + "raw": raw_pretty(self.raw), + } - try: - return getattr(ChassisBase, cause) - except: - return ChassisBase.REBOOT_CAUSE_HARDWARE_OTHER +def record_unique_name(dict_representation: dict[str, str]) -> str: + """Returns a unique name for this adm1266 record, given its dict. -def get_reboot_cause_type(reboot_causes): + The given dict_representation should be an output from Admn1266BlackBoxRecord.as_dict(). """ - Choose a suitable reboot cause amongst the available ones + return f"{dict_representation['dpm_name']}:powerup_{dict_representation['powerup_counter']}:uid_{dict_representation['uid']}" - Args: - reboot_causes: List of reboot causes recorded in DPMs +def trim_record_dict(dict_representation: dict[str, str]) -> dict[str, str]: + """Returns the given adm1266 record with only keys that are helpful for reboot-cause debugging. - Returns: - Chosen reboot cause type + The given dict_representation should be an output from Admn1266BlackBoxRecord.as_dict(). """ - if not reboot_causes: - return ChassisBase.REBOOT_CAUSE_HARDWARE_OTHER - # Pick the first switch_card DPM's cause to report the REBOOT_CAUSE_ value. - # We ensure that there is no loss of information since we display all the - # selected (by earliest record uid) causes of all DPMs in the summary section - # right below the REBOOT_CAUSE_ value and more importantly display all the - # faults recorded in the DPMS in a supplementary command line. So the choice - # of a single cause from amongst many is to satisfy the API return value - # expectation. - reboot_cause = reboot_causes[0] - return reboot_cause_str_to_type(reboot_cause) - -class Adm1266: - """ - ADM1266 Power Management Device Interface. - - This class provides methods to read blackbox data, parse fault records, - and determine reboot causes from ADM1266 power management devices. - """ - def __init__(self, platform_spec): - self.platform_spec = platform_spec - self.nvmem_path = self.platform_spec.get_nvmem_path() - - def get_name(self): - """Get the DPM device name.""" - return self.platform_spec.get_name() - - def read_blackbox(self) -> bytes: - """Read the entire blackbox data blob from the nvmem sysfs file""" - with open(self.nvmem_path, 'rb') as file: - return file.read() - - @staticmethod - def _get_fault_record(data: bytes) -> Dict: - """Parse a 64-byte record (ADM1266 Table 79).""" - if len(data) != 64: - return {} - - def u16(off: int) -> int: - return data[off] | (data[off + 1] << 8) - - empty = data[2] & 0x01 - - rec = { - 'uid': u16(0), - 'empty': empty, - 'action': data[3], - 'rule': data[4], - 'vhx': data[5], # VHx_OV status byte - 'current': u16(6), # current state - 'last': u16(8), # last state - 'vp_ov': u16(10), - 'vp_uv': u16(12), - 'gpio_in': u16(14), - 'gpio_out': u16(16), - 'pdio_in': u16(18), - 'pdio_out': u16(20), - 'powerup': u16(22), - 'timestamp': data[24:32], # 8 bytes - 'crc': data[63], - } - return rec - - @staticmethod - def _parse_blackbox(data: bytes) -> List[Dict]: - """Parse blackbox data and return structured list of valid (non-empty) faults. - - Skips records that are all 0xFF (erased) or all 0x00 (empty area) - - Uses the 'empty' bit parsed from byte 2 to keep only valid records + KEYS_TO_KEEP = ( + "timestamp", + "power_fault_cause", + "gpio_in_[7:4,9:8,R,R,R,3:1]", + "pdio_in_[16:1]", + ) + return {k: dict_representation[k] for k in KEYS_TO_KEEP if k in dict_representation} + + +class Adm1266(DpmBase, type=DpmType.ADM1266, max_powerup_counter=65535): + """ADM1266 device.""" + + NVMEM_CELL_IDX = 0 + + def __init__( + self, + name: str, + platform_spec: dict[str, Any], + pddf_device_data: dict[str, Any], + ): + super().__init__(name, platform_spec) + + # Get the DPM device name from platform_spec + dpm_device_name = platform_spec.get("dpm") + if not dpm_device_name: + raise ValueError( + f"platform_spec for DPM '{name}' must contain a 'dpm' field specifying the dpm name." + ) + self._calculate_paths_from_pddf_device_data(dpm_device_name, pddf_device_data) + + def _calculate_paths_from_pddf_device_data( + self, dpm_device_name: str, pddf_device_data: dict[str, Any] + ) -> None: + """Calculate sysfs paths from pddf-device.json data. + + Args: + dpm_device_name: The DPM device name from pd-plugin.json's "dpm" field (e.g., "DPM1", "DPM2") + pddf_device_data: The loaded pddf-device.json data + + Raises: + ValueError: If the DPM device cannot be found in pddf-device.json """ - faults: List[Dict] = [] - if not data: - return faults - - fault_size = 64 - num_records = len(data) // fault_size - for i in range(num_records): - start = i * fault_size - rec = data[start:start + fault_size] - # Skip cleared and erased records - if all(b == 0x00 for b in rec) or all(b == 0xFF for b in rec): - continue - fault_record = Adm1266._get_fault_record(rec) - if (fault_record['empty'] & 0x01) == 0: - fault_record['record_index'] = i - faults.append(fault_record) - return faults - - def get_blackbox_records(self) -> List[Dict]: - """Get reboot causes from blackbox faults read via sysfs.""" - blackbox_data = self.read_blackbox() - faults = Adm1266._parse_blackbox(blackbox_data) - - records: List[Dict] = [] - for fault in faults: - rec_idx = fault.get('record_index') - record = { - 'fault_uid': fault['uid'], - 'gpio_in': fault['gpio_in'], - 'gpio_out': fault['gpio_out'], - 'powerup': fault['powerup'], - 'timestamp': fault['timestamp'], - 'action': fault['action'], - 'rule': fault['rule'], - 'vhx': fault['vhx'], - 'vp_ov': fault['vp_ov'], - 'vp_uv': fault['vp_uv'], - 'current': fault['current'], - 'last': fault['last'], - 'pdio_in': fault['pdio_in'], - 'pdio_out': fault['pdio_out'], - 'record_index': rec_idx, - } - # Attach raw 64-byte chunk for this record if index is known - if isinstance(rec_idx, int) and rec_idx >= 0: - start = rec_idx * 64 - record['raw'] = blackbox_data[start:start+64] - - # Decode Power Fault Cause bits (from pdio_in and gpio_in) - hw_cause, hw_desc, summary, reboot_cause = \ - decode_power_fault_cause(self.platform_spec.get_dpm_signal_to_fault_cause(), - record['pdio_in'], - record['gpio_in']) - if hw_cause: - record['power_fault_cause'] = hw_cause + ' (' + hw_desc + ')' - record['summary'] = summary - record['hw_cause'] = hw_cause - record['reboot_cause'] = reboot_cause - record['dpm_name'] = self.platform_spec.get_name() - records.append(record) - return records - - def get_all_faults(self) -> List[Dict]: + dpm_device = pddf_device_data.get(dpm_device_name) + if not dpm_device: + raise ValueError(f"DPM device '{dpm_device_name}' not found in pddf-device.json.") + + i2c_info = dpm_device.get("i2c", {}) + topo_info = i2c_info.get("topo_info", {}) + parent_bus = topo_info.get("parent_bus") + dev_addr = topo_info.get("dev_addr") + + if not parent_bus or not dev_addr: + raise ValueError( + f"Missing parent_bus or dev_addr in pddf-device.json for DPM '{dpm_device_name}'" + ) + + parent_bus_int = int(parent_bus, 16) if isinstance(parent_bus, str) else parent_bus + dev_addr_int = int(dev_addr, 16) if isinstance(dev_addr, str) else dev_addr + + self._nvmem_path = f"/sys/bus/nvmem/devices/{parent_bus_int}-{dev_addr_int:04x}{self.NVMEM_CELL_IDX}/nvmem" + self._powerup_counter_path = ( + f"/sys/bus/i2c/devices/{parent_bus_int}-{dev_addr_int:04x}/powerup_counter" + ) + self._rtc_epoch_offset_path = ( + f"/sys/bus/i2c/devices/{parent_bus_int}-{dev_addr_int:04x}/rtc_epoch_offset" + ) + + def set_rtc_epoch_offset(self, epoch_offset_sec: int = EPOCH_OFFSET_SECONDS): + """Writes to sysfs to set the custom epoch on the ADM1266's RTC. + + This method is intended to be called periodically with the same epoch_offset_sec + for periodic synchronization of ADM1266's RTC and the system time. + + To reduce the complexity, it's advised to use `EPOCH_OFFSET_SECONDS` which + matches the default value in kernel's driver. + + Args: + epoch_offset_sec: Epoch offset in seconds since UNIX epoch (1970-01-01). + Default to EPOCH_OFFSET_SECONDS (2024-01-01). """ - Return all faults recorded in the DPM + if not self._rtc_epoch_offset_path: + raise ValueError(f"rtc_epoch_offset_path not specified in pd-plugin.json") - Returns: - List of dictionaries containing fault information - """ - records = self.get_blackbox_records() - # Compute a terse power-loss reason (if any) and attach it - for rec in records: - faults = determine_voltage_faults(self.platform_spec.get_vpx_to_rail_desc(), - self.platform_spec.get_vhx_to_rail_desc(), - rec.get('vhx', 0), - rec.get('vp_ov', 0), - rec.get('vp_uv', 0)) - if faults: - rec.update(faults) - return records - - def clear_blackbox(self): - """Clear the blackbox data by writing to the nvmem path.""" - with open(self.nvmem_path, 'wb') as file: - file.write(b"1") + with open(self._rtc_epoch_offset_path, "w") as file: + file.write(str(epoch_offset_sec)) -class Adm1266Display: - """ - Display formatter for ADM1266 fault records. + def read_raw_records(self) -> list[bytes]: + """Reads the blackbox data from the nvmem sysfs file. - This class provides methods to format and render fault records from ADM1266 - devices into human-readable messages for debugging and analysis. - """ - MSG_ORDER = [ - 'dpm_name', 'fault_uid', 'power_loss', 'dpm_fault', 'power_fault_cause', - 'powerup', 'timestamp', 'current', 'last', 'action', - 'rule', 'vhx', 'vp_ov', 'vp_uv', - 'gpio_in', 'gpio_out', 'pdio_in', 'pdio_out', - 'raw', - ] - def __init__(self, faults): - self.faults = faults - - @staticmethod - def _format_fault(fault, is_first_message): - """Format a single fault into a printable message.""" - rendered_items = [] - for key in Adm1266Display.MSG_ORDER: - val = fault.get(key) - if val is None: - continue - if isinstance(val, str) and val in ('', '0x0'): - continue - rendered_items.append((key, val)) - - if not rendered_items: - return "" - - max_key = max(len(k) for k, _ in rendered_items) - lines: List[str] = [] - for key, val in rendered_items: - prefix = f" {key.ljust(max_key)} = " - if isinstance(val, str) and ('\n' in val): - indented = val.replace('\n', '\n' + ' ' * len(prefix)) - lines.append(prefix + indented) - else: - lines.append(prefix + str(val)) - - if not is_first_message: - # Prepend a newline to the first attribute so each block starts on a new line - lines[0] = "\n" + lines[0] - return "\n".join(lines) - - @staticmethod - def _render_faults(faults) -> List[Dict]: - """ - Get formatted DPM fault records from blackbox data. + Skips records that are all 0xFF (erased) or all 0x00 (empty area). Returns: - List of dictionaries containing formatted fault information. - - Example output: - [ - { - 'dpm_name': 'cpu_card', - 'fault_uid': '0x1a3f', - 'powerup': '0x1', - 'action': '0x0', - 'rule': '0x0', - 'power_loss': 'POS5V0_S0, POS3V3_S5', - 'current': '0x0', - 'last': '0x0', - 'vhx': 'VH1,VH3 (0b00000101)', - 'vp_ov': '0b0000000000000000', - 'vp_uv': 'VP1,VP5 (0b0000000000010001)', - 'gpio_in': '0b0000000000000000', - 'gpio_out': '0b0000000000000000', - 'pdio_in': 'PDIO1,PDIO8 (0b0000000010000001)', - 'pdio_out': '0b0000000000000000', - 'dpm_fault': 'VH fault', - 'power_fault_cause': 'PSU input power lost', - 'timestamp': '3 minutes 2.518700 seconds after power-on', - 'raw': '1a 3f 01 00 00 00 05 00\n...' - } - ] + List of raw records, each record is 64 bytes. """ - rendered: List[Dict] = [] - for fault in faults: - out: Dict[str, str] = {} - for key in OUTPUT_ORDER: - renderer = RENDER.get(key, default_render) - out[key] = renderer(key, fault.get(key, 0)) - rendered.append(out) - return rendered - - def render(self, is_first=False): - """ Render all faults recorded in a DPM into a printable message.""" - messages: List[str] = [] - rendered_faults = Adm1266Display._render_faults(self.faults) - for fault in rendered_faults: - message = Adm1266Display._format_fault(fault, is_first) - messages.append(message) - return messages - -def render_all_faults(all_faults): - """ - Render all faults from multiple DPMs into formatted messages. - - Args: - all_faults: Dictionary mapping DPM names to lists of fault records - - Returns: - List of formatted message strings for all faults - """ - messages = [] - for faults in all_faults.values(): - dpm_display = Adm1266Display(faults) - dpm_messages = dpm_display.render(not messages) # Use implicit boolean check - messages += dpm_messages - return messages - -def get_all_faults(pddf_plugin_path=None) -> List[Dict]: - """ - Get all faults recorded in the DPMs. - - Args: - pddf_plugin_path: Optional path to PDDF plugin file. If None, uses default system path. - Returns: - List of dictionaries containing faults of each DPM. - Among each DPM, the list of faults are sorted by UID (earlier fault comes first). - """ - from sonic_platform.adm1266_platform_spec import Adm1266PlatformSpec # pylint: disable=import-outside-toplevel - - if pddf_plugin_path is None: - pddf_plugin_path = '/usr/share/sonic/platform/pddf/pd-plugin.json' - with open(pddf_plugin_path, encoding='utf-8') as pddf_file: - pddf_plugin_data = json.load(pddf_file) - - all_faults = [] - adms = pddf_plugin_data.get("DPM", {}) - for adm in adms: - platform_spec = Adm1266PlatformSpec(adm, pddf_plugin_data) - dev = Adm1266(platform_spec) - faults = dev.get_all_faults() - if faults: - dev.clear_blackbox() - faults = sorted(faults, key=lambda f: f['fault_uid']) - for fault in faults: - fault['dpm_name'] = dev.get_name() - all_faults.extend(faults) - return all_faults - -def get_reboot_cause(pddf_plugin_path=None) -> tuple[str, str] | None: - """ - Get system reboot cause by analyzing ADM1266 blackbox data. - - Args: - pddf_plugin_path: Optional path to PDDF plugin file. If None, uses default system path. - - Returns: - Tuple of (reboot_cause, debug_message) where reboot_cause is a - ChassisBase.REBOOT_CAUSE_* constant and debug_message contains detailed - fault information. - """ - from sonic_platform.dpm import SystemDPMLogHistory # pylint: disable=import-outside-toplevel - - all_faults = get_all_faults(pddf_plugin_path) - if all_faults: - # Save all_faults history via SystemDPMLogHistory - SystemDPMLogHistory().save('adm1266', all_faults) - # We intentionally do not include rendered fault messages here. - # Return the initial reboot cause and the collected summaries. The per-DPM - # records have been saved to history files which can be loaded and - # rendered separately if more details are needed. - - # Extract causes and summaries from all_faults (which is a list) - causes = [] - summaries = [] - for fault in all_faults: - if 'reboot_cause' in fault: - causes.append(fault['reboot_cause']) - if 'summary' in fault: - summaries.append(fault['summary']) - - reboot_cause = get_reboot_cause_type(causes) - # summaries is a list of strings; coalesce to single debug message - return reboot_cause, ", ".join(summaries) - - return None + def is_erased_or_empty(raw_record: bytes) -> bool: + return all(b == 0xFF for b in raw_record) or all(b == 0x00 for b in raw_record) + + with open(self._nvmem_path, "rb") as file: + data = file.read() + + SIZE = Adm1266BlackBoxRecord.RECORD_SIZE_IN_BYTES + records = [] + for start in range(0, len(data), SIZE): + raw_record = data[start : start + SIZE] + if len(raw_record) != SIZE or is_erased_or_empty(raw_record): + continue + records.append(raw_record) + return records + + def get_powerup_counter(self) -> int: + with open(self._powerup_counter_path, "r") as file: + return int(file.read()) + + def get_powerup_entries(self) -> list[DpmPowerUpEntry]: + records = self.read_records(Adm1266BlackBoxRecord) + records.sort(key=lambda record: record.uid) + grouped_by_powerup = groupby(records, lambda record: record.powerup_counter) + + powerups = [] + for _, group in grouped_by_powerup: + group_list = list(group) + last_record = group_list[-1] # record with the highest UID determines the cause + + powerups.append( + DpmPowerUpEntry( + powerup_counter=last_record.powerup_counter, + power_fault_cause=last_record.get_power_fault_cause(), + dpm_records=cast(list[DpmRecord], group_list), + ) + ) + return powerups + + def clear_records(self) -> None: + """Clears the blackbox data by writing to the nvmem path.""" + with open(self._nvmem_path, "wb") as file: + file.write(b"1") diff --git a/platform/broadcom/sonic-platform-modules-nexthop/common/sonic_platform/adm1266_platform_spec.py b/platform/broadcom/sonic-platform-modules-nexthop/common/sonic_platform/adm1266_platform_spec.py deleted file mode 100644 index d3ef490f21c..00000000000 --- a/platform/broadcom/sonic-platform-modules-nexthop/common/sonic_platform/adm1266_platform_spec.py +++ /dev/null @@ -1,99 +0,0 @@ -# Copyright 2025 Nexthop Systems Inc. All rights reserved. -# SPDX-License-Identifier: Apache-2.0 - -"""ADM1266 platform-specific configuration and mappings. - -Provides platform-specific data for ADM1266 devices including power rail -mappings, fault tables, signal definitions, and device paths. -""" - -from typing import Any, Dict, List - - -class Adm1266PlatformSpec: - """Platform-specific configuration for an ADM1266 device. - - Encapsulates platform-specific data including: - - Power rail to PDIO mappings for voltage monitoring - - DPM fault signals - - Power fault cause descriptions and reboot cause mappings - - NVMEM device path for blackbox data access - - Attributes: - name: Device name identifier - nvmem_path: Path to NVMEM device for blackbox data - vpx_to_rail_desc: VP (voltage positive) to rail mappings - vhx_to_rail_desc: VH (voltage high) to rail mappings - dpm_signal_to_fault_cause: DPM signal pattern to fault cause mappings - """ - - def __init__(self, name: str, pddf_plugin_data: Dict[str, Any]): - """Initialize platform specification from PDDF plugin data. - - Args: - name: Device name identifier - pddf_plugin_data: PDDF plugin data dictionary containing DPM configuration - """ - self.name = name - dpm_info = pddf_plugin_data["DPM"][name] - self.nvmem_path = dpm_info["nvmem_path"] - - self.vpx_to_rail_desc: Dict[int, str] = { - int(k): v for k, v in dpm_info["vpx_to_rail_desc"].items() - } - self.vhx_to_rail_desc: Dict[int, str] = { - int(k): v for k, v in dpm_info["vhx_to_rail_desc"].items() - } - self.dpm_signal_to_fault_cause: List[Dict[str, Any]] = [] - for entry in dpm_info.get("dpm_signal_to_fault_cause", []): - converted = { - "pdio_mask": int(entry["pdio_mask"], 16), - "gpio_mask": int(entry["gpio_mask"], 16), - "pdio_value": int(entry["pdio_value"], 16), - "gpio_value": int(entry["gpio_value"], 16), - "hw_cause": entry["hw_cause"], - "hw_desc": entry["hw_desc"], - "summary": entry["summary"], - "reboot_cause": entry["reboot_cause"] - } - self.dpm_signal_to_fault_cause.append(converted) - - def get_vpx_to_rail_desc(self) -> Dict[int, str]: - """Get VP (voltage positive) to rail descriptions. - - Returns: - Dictionary mapping VP indices to rail descriptions - """ - return self.vpx_to_rail_desc - - def get_vhx_to_rail_desc(self) -> Dict[int, str]: - """Get VH (voltage high) to rail descriptions. - - Returns: - Dictionary mapping VH indices to rail descriptions - """ - return self.vhx_to_rail_desc - - def get_dpm_signal_to_fault_cause(self) -> List[Dict[str, Any]]: - """Get DPM signal pattern to fault cause mappings. - - Returns: - List of signal pattern entries with integer mask/value fields and string fault cause info - """ - return self.dpm_signal_to_fault_cause - - def get_nvmem_path(self) -> str: - """Get NVMEM device path for blackbox data access. - - Returns: - Path to NVMEM device file - """ - return self.nvmem_path - - def get_name(self) -> str: - """Get device name identifier. - - Returns: - Device name string - """ - return self.name diff --git a/platform/broadcom/sonic-platform-modules-nexthop/common/sonic_platform/asic_thermal.py b/platform/broadcom/sonic-platform-modules-nexthop/common/sonic_platform/asic_thermal.py index 3d770693843..2f07283ec66 100644 --- a/platform/broadcom/sonic-platform-modules-nexthop/common/sonic_platform/asic_thermal.py +++ b/platform/broadcom/sonic-platform-modules-nexthop/common/sonic_platform/asic_thermal.py @@ -2,13 +2,23 @@ # Copyright 2025 Nexthop Systems Inc. All rights reserved. # SPDX-License-Identifier: Apache-2.0 + +import logging from sonic_platform_pddf_base.pddf_asic_thermal import PddfAsicThermal +from swsscommon import swsscommon +from sonic_py_common import syslogger +from nexthop.pddf_config_parser import load_platform_json from .thermal import PidThermalMixin, MinMaxTempMixin +SYSLOG_IDENTIFIER = "nh_asic_thermal" +log = syslogger.SysLogger(SYSLOG_IDENTIFIER, log_level=logging.INFO, enable_runtime_config=False) + class AsicThermal(PddfAsicThermal, MinMaxTempMixin, PidThermalMixin): """PDDF Platform-Specific ASIC Thermal class""" + _polling_enabled_checked = False + def __init__( self, index, @@ -25,7 +35,73 @@ def __init__( PidThermalMixin.__init__(self, dev_info) + def _get_platform_asic_sensor_config(self): + """ + Read ASIC sensor configuration from platform.json. + Returns a tuple of (poll_interval, poll_admin_status) or (None, None) if not found. + """ + try: + platform_json = load_platform_json() + + asic_sensors = platform_json.get("asic_sensors", {}) + if not asic_sensors: + return None, None + + poll_interval = asic_sensors.get("poll_interval") + poll_admin_status = asic_sensors.get("poll_admin_status") + + return poll_interval, poll_admin_status + except Exception as e: + log.log_warning(f"Failed to read ASIC sensor configuration from platform.json: {str(e)}") + return None, None + + def _ensure_asic_sensor_polling_enabled(self): + """ + Ensure ASIC sensor polling is enabled in CONFIG_DB. + This is called every time we read temperature to guarantee polling is active. + """ + if AsicThermal._polling_enabled_checked: + return + + try: + desired_interval, desired_admin_status = self._get_platform_asic_sensor_config() + + if desired_admin_status is None: + AsicThermal._polling_enabled_checked = True + return + + desired_interval = desired_interval if desired_interval is not None else "10" + + config_db = swsscommon.ConfigDBConnector() + config_db.connect() + + asic_sensors_config = config_db.get_table("ASIC_SENSORS") + + poller_status = asic_sensors_config.get("ASIC_SENSORS_POLLER_STATUS", {}) + admin_status = poller_status.get("admin_status", "") + + if admin_status != desired_admin_status: + config_db.mod_entry("ASIC_SENSORS", "ASIC_SENSORS_POLLER_STATUS", + {"admin_status": desired_admin_status}) + log.log_info(f"Updated ASIC sensor polling admin_status to {desired_admin_status}") + + poller_interval = asic_sensors_config.get("ASIC_SENSORS_POLLER_INTERVAL", {}) + current_interval = poller_interval.get("interval", "") + + if current_interval != desired_interval: + config_db.mod_entry("ASIC_SENSORS", "ASIC_SENSORS_POLLER_INTERVAL", + {"interval": desired_interval}) + log.log_info(f"Updated ASIC sensor polling interval to {desired_interval}") + + AsicThermal._polling_enabled_checked = True + + except Exception as e: + log.log_error(f"Failed to update ASIC sensor polling: {str(e)}") + pass + def get_temperature(self): + self._ensure_asic_sensor_polling_enabled() + temp = super().get_temperature() self._update_min_max_temp(temp) return temp diff --git a/platform/broadcom/sonic-platform-modules-nexthop/common/sonic_platform/chassis.py b/platform/broadcom/sonic-platform-modules-nexthop/common/sonic_platform/chassis.py index cc0e0d6a5fd..ea89c848201 100644 --- a/platform/broadcom/sonic-platform-modules-nexthop/common/sonic_platform/chassis.py +++ b/platform/broadcom/sonic-platform-modules-nexthop/common/sonic_platform/chassis.py @@ -9,12 +9,11 @@ # ############################################################################# -import os -import re import sys import time -from sonic_platform import adm1266 +from sonic_platform.dpm_base import timestamp_as_string +from sonic_platform.reboot_cause_manager import RebootCauseManager, RebootCause from sonic_platform.thermal import NexthopFpgaAsicThermal from sonic_platform.watchdog import Watchdog @@ -55,6 +54,10 @@ def __init__(self, pddf_data=None, pddf_plugin_data=None): thermal = NexthopFpgaAsicThermal(index, position_offset, pddf_data) self._thermal_list.append(thermal) + self._reboot_cause_manager = ( + RebootCauseManager(pddf_data.data, pddf_plugin_data) if (pddf_plugin_data and pddf_data) else None + ) + # Provide the functions/variables below for which implementation is to be overwritten def get_model(self): @@ -105,6 +108,18 @@ def _get_xcvr_change_event(self): Returns a dictionary containing the change events for all xcvrs. """ change_dict = {} + + # Initialization poll: populate cache and return empty dict. + # xcvrd expects the first call to initialize state without generating + # insertion events for modules that were already present at daemon start. + if not self._xcvr_presence: + for xcvr in self.get_all_sfps(): + presence = XCVR_INSERTED if xcvr.get_presence() else XCVR_REMOVED + port = str(xcvr.get_position_in_parent()) + self._xcvr_presence[port] = presence + return change_dict # Return empty dict on first call + + # Subsequent calls: detect actual changes for xcvr in self.get_all_sfps(): presence = XCVR_INSERTED if xcvr.get_presence() else XCVR_REMOVED port = str(xcvr.get_position_in_parent()) @@ -157,58 +172,64 @@ def set_status_led(self, color): def get_status_led(self): return self.get_system_led("SYS_LED") - def _get_sw_reboot_cause(self) -> str | None: - # The presence of reboot-cause.txt with valid content indicates that reboot - # was triggered by software at some point before the current boot. We trust that - # determine-reboot-cause.service will clear the content in this file after - # calling this function. - reboot_cause_path = self.plugin_data.get("REBOOT_CAUSE", {}).get( - "reboot_cause_file", None - ) - if not reboot_cause_path or not os.path.exists(reboot_cause_path): - return None - - with open(reboot_cause_path, "r", errors="replace") as file: - sw_reboot_cause = file.read().strip() - - # We parse the SW cause here, so we can attach the HW events as a minor cause. - # Note: This logic is taken from `determine-reboot-cause`. - if match := re.search(r"User issued '(.*)' command", sw_reboot_cause): - # Normally, it is from one of the reboot scripts, e.g. 'reboot', 'warm-reboot'. - return match.group(1) - elif re.search(r"Kernel Panic", sw_reboot_cause): - return "Kernel Panic" - elif re.search(r"Heartbeat with the Supervisor card lost", sw_reboot_cause): - return "Heartbeat with the Supervisor card lost" + def _attach_reboot_cause_comment(self, majors_and_minors: list[tuple[str, str]]): + if not majors_and_minors: + return + + reboot_cause_path = self.plugin_data.get("REBOOT_CAUSE", {}).get("reboot_cause_file", None) + if not reboot_cause_path: + return + + with open(reboot_cause_path, "w") as file: + if len(majors_and_minors) == 1: + file.write("System rebooted 1 more time: ") else: - return None + file.write(f"System rebooted {len(majors_and_minors)} more times: ") + causes_str = "; ".join([f"{m[0]} ({m[1]})" for m in majors_and_minors]) + file.write(causes_str) + + def _convert_to_majors_and_minors(self, reboot_causes: list[RebootCause]) -> list[tuple[str, str]]: + majors_and_minors: list[tuple[str, str]] = [] + for cause in reboot_causes: + if cause.type == RebootCause.Type.SOFTWARE: + major_cause = cause.cause + minor_cause = f"time: {timestamp_as_string(cause.timestamp)}, src: {cause.source}" + else: + major_cause = getattr( + self, + cause.chassis_reboot_cause_category, + cause.chassis_reboot_cause_category, + ) + minor_cause = f"{cause.description}, time: {timestamp_as_string(cause.timestamp)}, src: {cause.source}" + majors_and_minors.append((major_cause, minor_cause)) + return majors_and_minors def get_reboot_cause(self): """ - Retrieves the cause of the previous reboot + Retrieves the cause of the previous reboot. + + If there were multiple reboots, the initial (oldest) reboot cause is returned, + and the other causes are written to the reboot cause file, which + should be processed as a comment by determine-reboot-cause.service. Returns: - (string, string): - (major reboot cause, minor reboot cause). - - major cause can be from either SW or HW. - - minor cause contains all of the HW fault - events from ADM1266 blackbox records since - the last successful boot. + (major reboot cause, minor reboot cause). - determine-reboot-cause.service will display the cause as " ()" """ - # Always show hardware events for diagnostics, regardless of SW or HW. - # TODO: currently, when SW reboot cause is present, we assume it is - # the major cause. However, we should check based on the timestamp - # whether SW cause or HW cause came first. - sw_cause = self._get_sw_reboot_cause() - hw_cause, all_hw_fault_events = adm1266.get_reboot_cause() or (None, "") - if sw_cause: - return (sw_cause, all_hw_fault_events) - elif hw_cause: - return (hw_cause, all_hw_fault_events) - else: - return ("Unknown", "Unknown") + if self._reboot_cause_manager is None: + return ("Unknown", "") + + reboot_causes = self._reboot_cause_manager.summarize_reboot_causes() + if not reboot_causes: + return ("Unknown", "") + + if len(reboot_causes) == 1 and reboot_causes[0].type == RebootCause.Type.SOFTWARE: + return self.REBOOT_CAUSE_NON_HARDWARE, "" + + majors_and_minors: list[tuple[str, str]] = self._convert_to_majors_and_minors(reboot_causes) + self._attach_reboot_cause_comment(majors_and_minors[1:]) + return majors_and_minors[0] def get_watchdog(self) -> Watchdog | None: """ diff --git a/platform/broadcom/sonic-platform-modules-nexthop/common/sonic_platform/dpm.py b/platform/broadcom/sonic-platform-modules-nexthop/common/sonic_platform/dpm.py deleted file mode 100644 index 28415fbf68e..00000000000 --- a/platform/broadcom/sonic-platform-modules-nexthop/common/sonic_platform/dpm.py +++ /dev/null @@ -1,264 +0,0 @@ -# Copyright 2025 Nexthop Systems Inc. All rights reserved. -# SPDX-License-Identifier: Apache-2.0 - -"""Digital Power Manager (DPM) persistence and serialization. - -This module provides device-independent functionality for storing and retrieving -DPM fault records in JSON format on the filesystem. -""" - -import base64 -import datetime -import json -import os -from typing import Any, Dict, List, Optional, Tuple - - -class Serializer: - """Convert DPM fault records to and from JSON-safe format. - - Handles encoding of binary data (bytes) to base64 strings for JSON storage, - and decoding back to original types when loading from disk. - """ - - @staticmethod - def _encode_value(value: Any) -> Any: - """Encode a single value to JSON-safe format. - - Args: - value: Value to encode (bytes, int, float, str, None, or other) - - Returns: - JSON-safe representation (base64 string for bytes, original for primitives) - """ - if isinstance(value, (bytes, bytearray)): - return 'base64:' + base64.b64encode(bytes(value)).decode('ascii') - if isinstance(value, (int, float, str)) or value is None: - return value - return str(value) - - @staticmethod - def _decode_value(value: Any) -> Any: - """Decode a JSON-safe value back to original format. - - Args: - value: JSON-safe value (potentially base64-encoded string) - - Returns: - Original value (bytes for base64 strings, original for others) - """ - if isinstance(value, str) and value.startswith('base64:'): - return base64.b64decode(value[len('base64:'):]) - return value - - @staticmethod - def encode_records(records: List[Dict]) -> List[Dict]: - """Encode a list of fault records to JSON-safe format. - - Args: - records: List of fault record dictionaries - - Returns: - List of JSON-safe record dictionaries - """ - out = [] - for rec in (records or []): - obj = {} - for key, value in (rec or {}).items(): - obj[key] = Serializer._encode_value(value) - out.append(obj) - return out - - @staticmethod - def decode_records(json_records: List[Dict]) -> List[Dict]: - """Decode JSON-safe records back to original format. - - Args: - json_records: List of JSON-safe record dictionaries - - Returns: - List of decoded record dictionaries with original types - """ - out = [] - for rec in (json_records or []): - obj = {} - for key, value in (rec or {}).items(): - obj[key] = Serializer._decode_value(value) - out.append(obj) - return out - - -class SystemDPMLogHistory: - """Manage persistent storage of system-wide DPM fault records. - - Stores fault records in JSON format with automatic retention management. - Each file contains an envelope with metadata and encoded fault records. - - Envelope format: - { - "dpm_type": str, # DPM device type (e.g., "adm1266") - "gen_time": str, # Timestamp in YYYY_MM_DD_HH_MM_SS format - "schema_version": int, # Format version (currently 1) - "records_json": [...] # List of JSON-safe fault records - } - - Attributes: - HISTORY_DIR: Directory path for storing history files - PREVIOUS_FILE: Symlink name pointing to most recent file - RETENTION: Maximum number of history files to retain - """ - HISTORY_DIR = "/host/reboot-cause/nexthop" - PREVIOUS_FILE = "previous-reboot-cause.json" - RETENTION = 10 - - def __init__(self): - """Initialize history manager and load existing files. - - Creates history directory if needed, discovers existing history files, - enforces retention policy, and updates symlink to latest file. - """ - self.prev_link = os.path.join(self.HISTORY_DIR, self.PREVIOUS_FILE) - os.makedirs(self.HISTORY_DIR, exist_ok=True) - - self._history_files = [] - for filename in os.listdir(self.HISTORY_DIR): - if filename.startswith("reboot-cause-") and filename.endswith(".json"): - self._history_files.append(os.path.join(self.HISTORY_DIR, filename)) - self._history_files.sort() - - while len(self._history_files) > self.RETENTION: - self.remove_oldest_history() - - if self._history_files: - self.update_latest_symlink() - - def get_timestamp(self, path: str) -> str: - """Extract timestamp from a history file's envelope. - - Args: - path: Path to history file - - Returns: - Timestamp string from gen_time field, or empty string if not found - """ - envelope = self._load_json_file(path) - return envelope.get('gen_time', '') - - def add_history_file(self, path: str) -> None: - """Add a new history file and enforce retention policy. - - Args: - path: Path to history file to add - """ - self._history_files.append(path) - while len(self._history_files) > self.RETENTION: - self.remove_oldest_history() - - @staticmethod - def _delete_path(path: str) -> None: - """Delete a file, suppressing all errors. - - Args: - path: Path to file to delete - """ - try: - os.remove(path) - except Exception: # pylint: disable=broad-except - pass - - def remove_oldest_history(self) -> Optional[str]: - """Remove the oldest history file from cache and filesystem. - - Returns: - Path of removed file, or None if no files exist - """ - if not self._history_files: - return None - oldest = self._history_files.pop(0) - self._delete_path(oldest) - return oldest - - @staticmethod - def _load_json_file(path: str) -> Dict: - """Load and parse a JSON file. - - Args: - path: Path to JSON file - - Returns: - Parsed JSON dictionary, or empty dict on any error - """ - try: - with open(path, 'r', encoding='utf-8') as file_handle: - return json.load(file_handle) - except Exception: # pylint: disable=broad-except - return {} - - def save(self, dpm_type: str, all_faults: List[Dict]) -> None: - """Save fault records to a new history file. - - Creates a timestamped file with an envelope containing the DPM type - and encoded fault records. Updates the symlink and enforces retention. - - Args: - dpm: DPM device type identifier (e.g., "adm1266") - all_faults: List of fault record dictionaries to save - """ - timestamp = datetime.datetime.utcnow().strftime('%Y_%m_%d_%H_%M_%S') - filename = os.path.join(self.HISTORY_DIR, f"reboot-cause-{timestamp}.json") - - envelope = { - 'dpm_type': dpm_type, - 'gen_time': timestamp, - 'schema_version': 1, - 'records_json': Serializer.encode_records(all_faults), - } - - with open(filename, 'w', encoding='utf-8') as file_handle: - json.dump(envelope, file_handle, ensure_ascii=False) - - self.add_history_file(filename) - self.update_latest_symlink() - - def update_latest_symlink(self) -> None: - """Update symlink to point to the most recent history file.""" - if not self._history_files: - return - - if os.path.exists(self.prev_link) or os.path.islink(self.prev_link): - os.remove(self.prev_link) - - os.symlink(self._history_files[-1], self.prev_link) - - def load(self) -> Tuple[Optional[str], List[Dict]]: - """Load fault records from the most recent history file. - - Returns: - Tuple of (dpm_type, records) where: - - dpm_type: DPM device type string, or None if file invalid - - records: List of decoded fault record dictionaries - """ - return self.load_file(self.prev_link) - - def load_file(self, path: str) -> Tuple[Optional[str], List[Dict]]: - """Load fault records from a specific history file. - - Args: - path: Path to history file to load - - Returns: - Tuple of (dpm_type, records) where: - - dpm_type: DPM device type string, or None if file invalid - - records: List of decoded fault record dictionaries - """ - envelope = self._load_json_file(path) - if not isinstance(envelope, dict): - return (None, []) - - dpm_type = envelope.get('dpm_type') - records_json = envelope.get('records_json') - - if not isinstance(records_json, list): - return (dpm_type, []) - - return (dpm_type, Serializer.decode_records(records_json)) diff --git a/platform/broadcom/sonic-platform-modules-nexthop/common/sonic_platform/dpm_base.py b/platform/broadcom/sonic-platform-modules-nexthop/common/sonic_platform/dpm_base.py new file mode 100644 index 00000000000..6963cebd8b3 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-nexthop/common/sonic_platform/dpm_base.py @@ -0,0 +1,245 @@ +# Copyright 2025 Nexthop Systems Inc. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 + +"""Digital Power Manager (DPM) base classes. + +This module provides device-independent classes for +representing/retrieving/clearing records from a DPM device. +""" + +import datetime + +from abc import ABC, abstractmethod +from dataclasses import dataclass +from enum import Enum +from typing import Any, Type, TypeVar + + +@dataclass +class RebootCause: + """Encapsulates the reboot cause information. + + This can be a HW power fault cause or a SW-triggered cause. + """ + + class Type(Enum): + HARDWARE = "HW" + SOFTWARE = "SW" + + type: Type + # Name of the source that detected the reboot cause. For HW reboot causes, + # this is generally the DPM name. + source: str + # Timestamp of the reboot cause. This could be the time elapsed since power-on, + # or a UTC timestamp recorded by the `source`. + timestamp: datetime.timedelta | datetime.datetime + # Concise string representing the cause. + cause: str + # Longer string describing the cause. + description: str + # Should match one of the ChassisBase.REBOOT_CAUSE_* constants (e.g., "REBOOT_CAUSE_POWER_LOSS"). + chassis_reboot_cause_category: str + + +UNKNOWN_TIMESTAMP = datetime.datetime.min.replace(tzinfo=datetime.timezone.utc) + + +def timestamp_as_string(timestamp: datetime.timedelta | datetime.datetime) -> str: + if timestamp == UNKNOWN_TIMESTAMP: + return "unknown" + + if isinstance(timestamp, datetime.datetime): + if timestamp.tzinfo is None: + return timestamp.strftime("%Y-%m-%d %H:%M:%S") + else: + return timestamp.strftime("%Y-%m-%d %H:%M:%S %Z") + return f"{timestamp.total_seconds():.6f}s after power-on" + + +class DpmRecord(ABC): + """Base class for storing and processing a single record from a DPM. + + Subclasses must implement the abstract methods. + """ + + def __init__(self): + self._power_fault_cause: RebootCause | None = None + + # Force subclass to always trigger DpmRecord.__init__(). + # + # Subclasses can be a @dataclass, which generates its own __init__() + # and does NOT call the superclass __init__(). + # So, we inject __post_init__() that always calls DpmRecord.__init__(). + def __init_subclass__(cls, **kawargs): + super().__init_subclass__(**kawargs) + + original_post_init = getattr(cls, "__post_init__", None) + + def injected_post_init(self, *a, **k): + # Call child's post-init first if it exists. + if original_post_init: + original_post_init(self, *a, **k) + DpmRecord.__init__(self) + + cls.__post_init__ = injected_post_init + + def get_power_fault_cause(self) -> RebootCause | None: + """Returns the power fault cause associated with this record if detected. + + Should be called only after set_metadata_and_process_power_fault_cause() is called. + + Returns: + RebootCause object if a power fault is detected, None otherwise + """ + return self._power_fault_cause + + @classmethod + @abstractmethod + def from_bytes(cls, data: bytes, dpm_name: str) -> "DpmRecord": + """Creates a DpmRecord from raw bytes. + + Args: + data: raw bytes representing a record from the DPM + dpm_name: name of the DPM device that generated this record + + Returns: + Parsed DpmRecord + """ + pass + + @abstractmethod + def is_valid(self) -> bool: + """Returns True if the record is valid to be used, False otherwise.""" + pass + + @abstractmethod + def set_metadata_and_process_power_fault_cause(self, platform_spec: dict[str, Any]) -> None: + """Attaches metadata of the DPM provided in pd-plugin.json to help analyze this record. + + If this record indicates a power fault, the fault can be retrieved via get_power_fault_cause(). + """ + pass + + @abstractmethod + def as_dict(self) -> dict[str, str]: + """Returns a dictionary representation of this record. + + The returned dictionary is helpful for rendering the record in nh_reboot_cause. + Derived classes can decide how to display each field. + """ + pass + + +@dataclass +class DpmPowerUpEntry: + """Encapsulates all information related to a single powerup. + + This specific powerup may or may not have experienced a reboot. + """ + + # Number of times the device has power cycled. + # Note that this can wrap around, depending on the DPM's counter width. + powerup_counter: int + # If a power fault is None (i.e., not detected), it could be that + # 1. power cycle has not happened on this powerup; or + # 2. power cycle was caused by an unknown hardware event + # or by another hardware component that this DPM is not aware of. + # If it is the latter, other DPM(s) may have information about the fault. + power_fault_cause: RebootCause | None + # List of raw records from the DPM that relate to this powerup. + dpm_records: list[DpmRecord] + + +_RecordT = TypeVar("_RecordT", bound="DpmRecord") + + +class DpmType(Enum): + ADM1266 = "adm1266" + + +class DpmBase(ABC): + """Base class for DPM device implementations. + + Provides common functionality for retrieving DPM's records and + summary list of the previous powerups that this DPM is aware of. + + Subclasses must implement the abstract methods. + """ + + _type: DpmType + _max_powerup_counter: int + + def __init__(self, name: str, platform_spec: dict[str, Any]): + self._name = name + self._platform_spec = platform_spec + + def __init_subclass__(cls, type: DpmType, max_powerup_counter: int, **kwargs): + super().__init_subclass__(**kwargs) + cls._type = type + cls._max_powerup_counter = max_powerup_counter + + def get_name(self) -> str: + """Returns the name of the DPM.""" + return self._name + + def get_type(self) -> DpmType: + """Returns the type of the DPM.""" + return self._type + + @abstractmethod + def read_raw_records(self) -> list[bytes]: + """Reads the raw records from the DPM. + + Returns: + List of raw bytes, each representing a single record + """ + pass + + def read_records(self, real_record_type: Type[_RecordT]) -> list[_RecordT]: + """Parses the raw records from the DPM into structured DpmRecord objects. + + Skips records that are not valid. + + Returns: + List of DpmRecord objects + """ + raw_records = self.read_raw_records() + records = [] + for raw_record in raw_records: + parsed_record = real_record_type.from_bytes(raw_record, self.get_name()) + if parsed_record.is_valid(): + parsed_record.set_metadata_and_process_power_fault_cause(self._platform_spec) + records.append(parsed_record) + return records + + @abstractmethod + def get_powerup_counter(self) -> int: + """Returns the number of times the DPM has experienced a power cycle + + (i.e., the counter of this current powerup) + """ + pass + + @classmethod + def max_powerup_counter(cls) -> int: + """Returns the max number of powerup counter before it wraps around. + + For example, ADM1266 uses a 16-bit counter, so it returns 65535. + """ + return cls._max_powerup_counter + + @abstractmethod + def get_powerup_entries(self) -> list[DpmPowerUpEntry]: + """Returns a list of DpmPowerUpEntry, processed from raw records stored in this DPM. + + Each entry represents one powerup. The last powerup may or may not have experienced a reboot. + + Returns: + List of DpmPowerUpEntry objects + """ + pass + + @abstractmethod + def clear_records(self) -> None: + """Clears the DPM records that are stored in the DPM.""" + pass diff --git a/platform/broadcom/sonic-platform-modules-nexthop/common/sonic_platform/dpm_logger.py b/platform/broadcom/sonic-platform-modules-nexthop/common/sonic_platform/dpm_logger.py new file mode 100644 index 00000000000..ae235775b08 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-nexthop/common/sonic_platform/dpm_logger.py @@ -0,0 +1,231 @@ +# Copyright 2025 Nexthop Systems Inc. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 + +"""Digital Power Manager (DPM) file logger. + +This module provides device-independent functionality for storing and retrieving +reboot causes and DPM records in JSON format on the filesystem. +""" + +import datetime +import json +import os + +from abc import ABC, abstractmethod +from dataclasses import asdict, dataclass +from pathlib import Path +from sonic_platform.dpm_base import DpmBase, DpmPowerUpEntry, RebootCause, timestamp_as_string +from typing import Iterable + + +@dataclass +class DataBase(ABC): + gen_time: str + schema_version: int + + @abstractmethod + def is_empty(self) -> bool: + """Returns True if this data object contains no reboot causes or DPM records.""" + pass + + +@dataclass +class CauseV1: + source: str + timestamp: str + cause: str + description: str + + +@dataclass +class DpmV1: + name: str + type: str + records: list[dict[str, str]] + + +@dataclass +class DataV1(DataBase): + causes: list[CauseV1] + dpms: list[DpmV1] + + def __post_init__(self): + # Convert causes dicts into CauseV1 objects + self.causes = [c if isinstance(c, CauseV1) else CauseV1(**c) for c in self.causes] + # Convert dpms dicts into DpmV1 objects + self.dpms = [d if isinstance(d, DpmV1) else DpmV1(**d) for d in self.dpms] + + def is_empty(self) -> bool: + """Returns True if there are no causes and all DPMs have no records. + + A DataV1 instance is considered empty when both of the following hold: + - the causes list is empty, and + - for every DPM entry, its records list is empty. + """ + return not self.causes and not any(dpm.records for dpm in self.dpms) + + +def load_data_from_file(path: Path | str) -> DataBase | None: + """Loads and parses a JSON file into a structured Data object. + + Args: + path: Path to JSON file. + + Returns: + Parsed Data object, or UNKNOWN_DATA if parsing fails. + """ + if isinstance(path, str): + path = Path(path) + + try: + data = json.loads(path.read_text(encoding="utf-8")) + if data.get("schema_version") == 1: + return DataV1(**data) + except Exception: + return None + + return None + + +class DpmLogger: + """Manages persistent storage of system-wide reboot causes and DPM records. + + Stores the data as a series of JSON files on the filesystem. Each file + contains an envelope with metadata and encoded reboot causes and DPM records. + + Currently, only schema_version 1 (`DataV1`) is supported. + + Attributes: + HISTORY_DIR: Directory path for storing history files + PREVIOUS_FILE: Symlink name pointing to most recent file + RETENTION: Maximum number of history files to retain + """ + + HISTORY_DIR = "/host/reboot-cause/nexthop" + PREVIOUS_FILE = "previous-reboot-cause.json" + RETENTION = 50 + + def __init__(self) -> None: + """Initializes the DPM logger.""" + self.prev_link = os.path.join(self.HISTORY_DIR, self.PREVIOUS_FILE) + + def _get_sorted_history_files(self) -> list[Path]: + """Returns list of history files present on the system. + + Returns: + Sorted list of history file paths (oldest to newest). + """ + history_dir = Path(self.HISTORY_DIR) + if not history_dir.is_dir(): + return [] + + return sorted( + file_path + for file_path in history_dir.iterdir() + if file_path.name.startswith("reboot-cause-") and file_path.name.endswith(".json") + ) + + def _enforce_retention_policy(self) -> None: + """Enforces retention policy by removing old history files. + + Removes oldest files until the file count is within RETENTION limit. + """ + history_files = self._get_sorted_history_files() + while len(history_files) > self.RETENTION: + history_files[0].unlink(missing_ok=True) + history_files.pop(0) + + def _update_symlink_to(self, target: str) -> None: + """Updates symlink to point to the specified target file.""" + if os.path.exists(self.prev_link) or os.path.islink(self.prev_link): + os.remove(self.prev_link) + os.symlink(target, self.prev_link) + + def to_data( + self, + causes: Iterable[RebootCause], + dpm_to_powerups: dict[DpmBase, list[DpmPowerUpEntry]], + ) -> tuple[DataBase, datetime.datetime]: + """Converts causes and DPM records to a DataBase object. + + Args: + causes: List of RebootCause objects, as observed from + SW reboot cause and HW DPM records. + dpm_to_powerups: Dictionary of DPM to list of powerups, + where each powerup contains a list of DPM records. + """ + gen_time = datetime.datetime.now(tz=datetime.timezone.utc) + data = DataV1( + gen_time=gen_time.strftime("%Y-%m-%d %H:%M:%S %Z"), + schema_version=1, + causes=[ + CauseV1( + c.source, + timestamp_as_string(c.timestamp), + c.cause, + c.description if c.type == RebootCause.Type.HARDWARE else "n/a", + ) + for c in causes + ], + dpms=[ + DpmV1( + dpm.get_name(), + dpm.get_type().value, + [record.as_dict() for powerup in powerups for record in powerup.dpm_records], + ) + for dpm, powerups in dpm_to_powerups.items() + ], + ) + return data, gen_time + + def save( + self, + causes: Iterable[RebootCause], + dpm_to_powerups: dict[DpmBase, list[DpmPowerUpEntry]], + ) -> None: + """Saves causes and DPM records to a new history file. + + Creates a DataV1 object and writes it to a timestamped file in JSON format. + + Args: + causes: List of RebootCause objects, as observed from + SW reboot cause and HW DPM records. + dpm_to_powerups: Dictionary of DPM to list of powerups, + where each powerup contains a list of DPM records. + """ + data, gen_time = self.to_data(causes, dpm_to_powerups) + filename = os.path.join( + self.HISTORY_DIR, f"reboot-cause-{gen_time.strftime('%Y_%m_%d_%H_%M_%S')}.json" + ) + + os.makedirs(self.HISTORY_DIR, exist_ok=True) + with open(filename, "w", encoding="utf-8") as file_handle: + json.dump(asdict(data), file_handle) + + self._enforce_retention_policy() + self._update_symlink_to(filename) + + def load(self) -> DataBase | None: + """Loads log data from the most recent history file. + + Caller can try casting to DataV1 for schema_version 1, and etc. + + Returns: + The newest DataBase decoded from the newest history file, + or None if no history files are present or if parsing fails. + """ + return load_data_from_file(self.prev_link) + + def load_all(self) -> list[DataBase]: + """Loads log data from all history files. + + For each object, caller can try casting to DataV1 for schema_version 1, and etc. + + Returns: + List of DataBase objects, one per history file, sorted from oldest to newest. + The list won't include data from any files that failed to parse. + """ + return [ + data for path in self._get_sorted_history_files() + if (data := load_data_from_file(path)) is not None + ] diff --git a/platform/broadcom/sonic-platform-modules-nexthop/common/sonic_platform/eeprom.py b/platform/broadcom/sonic-platform-modules-nexthop/common/sonic_platform/eeprom.py index 52f074aeb32..3c69a2d5ac6 100644 --- a/platform/broadcom/sonic-platform-modules-nexthop/common/sonic_platform/eeprom.py +++ b/platform/broadcom/sonic-platform-modules-nexthop/common/sonic_platform/eeprom.py @@ -12,4 +12,43 @@ class Eeprom(PddfEeprom): def __init__(self, pddf_data=None, pddf_plugin_data=None): PddfEeprom.__init__(self, pddf_data, pddf_plugin_data) - # Provide the functions/variables below for which implementation is to be overwritten + if not hasattr(self, "eeprom_data") or self.eeprom_data == "N/A": + return + + self.eeprom_tlv_dict = {} + self._parse_raw_buffer(self.eeprom_data) + + def _parse_raw_buffer(self, buf): + if not self.is_valid_tlvinfo_header(buf): + return + + total_len = ((buf[9]) << 8) | (buf[10]) + idx = self._TLV_INFO_HDR_LEN + end = self._TLV_INFO_HDR_LEN + total_len + + while idx + 2 <= len(buf) and idx < end: + t_code = buf[idx] + length = buf[idx + 1] + v_start = idx + 2 + v_end = v_start + length + + if v_end > len(buf): + break + + code_str = "0x%02X" % t_code + val_bytes = buf[v_start:v_end] + + if t_code == self._TLV_CODE_VENDOR_EXT: + if code_str not in self.eeprom_tlv_dict: + self.eeprom_tlv_dict[code_str] = [] + + formatted_hex = " ".join(["0x%02X" % b for b in buf[v_start:v_end]]) + self.eeprom_tlv_dict[code_str].append(formatted_hex) + else: + _, decoded = self.decoder(None, buf[idx:v_end]) + self.eeprom_tlv_dict[code_str] = decoded + + if t_code == self._TLV_CODE_CRC_32: + break + + idx = v_end diff --git a/platform/broadcom/sonic-platform-modules-nexthop/common/sonic_platform/reboot_cause_manager.py b/platform/broadcom/sonic-platform-modules-nexthop/common/sonic_platform/reboot_cause_manager.py new file mode 100644 index 00000000000..37c43d88031 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-nexthop/common/sonic_platform/reboot_cause_manager.py @@ -0,0 +1,343 @@ +# Copyright 2025 Nexthop Systems Inc. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 + +"""Manager for retrieving, analyzing, and logging reboot causes. + +Provides classes and helpers for retrieving and analyzing reboot causes +from multiple sources (such as DPMs and SW-written text files), and +logging the causes to a history file. +""" + +import datetime +import os +import re + +from dateutil import parser +from typing import Any +from sonic_platform.adm1266 import Adm1266 +from sonic_platform.dpm_logger import DpmLogger +from sonic_platform.dpm_base import DpmBase, DpmPowerUpEntry, RebootCause, UNKNOWN_TIMESTAMP +from sonic_py_common import syslogger + + +SYSLOG_IDENTIFIER = "sonic_platform.reboot_cause_manager" +logger = syslogger.SysLogger(SYSLOG_IDENTIFIER) + +UNKNOWN_HW_REBOOT_CAUSE = RebootCause( + type=RebootCause.Type.HARDWARE, + source="unknown", + timestamp=UNKNOWN_TIMESTAMP, + cause="unknown", + description="unknown", + chassis_reboot_cause_category="REBOOT_CAUSE_HARDWARE_OTHER", +) + + +def ordinal(n: int) -> str: + """Returns the ordinal string of a number, e.g., "1st", "2nd", "3rd", "4th", etc.""" + # Handle special cases for 11th, 12th, 13th + if 11 <= n % 100 <= 13: + suffix = "th" + else: + suffix = {1: "st", 2: "nd", 3: "rd"}.get(n % 10, "th") + return f"{n}{suffix}" + + +def fill_in_missing_and_align_powerups( + dpm_to_powerups: dict[DpmBase, list[DpmPowerUpEntry]], +) -> tuple[dict[DpmBase, list[DpmPowerUpEntry | None]], int]: + """Fills in missing powerups with None, so that all DPMs have the same number of powerups and are aligned. + + Args: + dpm_to_powerups: Dictionary of DPM to list of powerups (must be sorted old->new). + + Returns: + a tuple (dict, int): + - Dictionary of DPM to list of powerups, with missing powerups filled in with None. + - Number of powerups as experienced by the DPMs (i.e., number of reboots) + """ + # Step 1: for each DPM, fill in the missing powerups between + # the oldest powerup and the current powerup. + # Also, trim the current powerup since it hasn't experienced + # a power cycle yet. Likely the records attached with the + # current powerup are not related to reboot. + # + # Example: + # Given: + # DPM1: [1, 2, 3, 4, 5, 6]; current_powerup = 6 + # DPM2: [6, 8]; current_powerup = 10 + # Result: + # DPM1: [1, 2, 3, 4, 5] + # DPM2: [6, None, 8, None] + # num_power_cycles = 5 + # Reason: + # - DPM1 has records of 5 power cycles (with counter 1 to 5). + # We trim the last one since it is the current powerup. + # - DPM2 has records of 2 power cycles. But in fact, as hinted by + # the current_powerup = 10, it experienced 4 power cycles (6, 7, 8, 9). + # We fill in the missing ones with None. + # - The system actually experienced 5 power cycles, as evidenced by DPM1. + ret: dict[DpmBase, list[DpmPowerUpEntry | None]] = {} + num_power_cycles = 0 + for dpm, powerups in dpm_to_powerups.items(): + current = dpm.get_powerup_counter() + max_powerup = dpm.max_powerup_counter() + full_powerups: list[DpmPowerUpEntry | None] = [] + + # Process powerups in reverse, from newest to oldest. + p = current + for powerup in reversed(powerups): + # Skip the current powerup since it hasn't experienced a power cycle yet. + if p == current: + p = (p - 1) % max_powerup + if powerup.powerup_counter == current: + continue + # Prepend this powerup and the missing powerups. + missing = (p - powerup.powerup_counter) % max_powerup + full_powerups[:0] = [powerup] + ([None] * missing) + p = (powerup.powerup_counter - 1) % max_powerup + + ret[dpm] = full_powerups + num_power_cycles = max(num_power_cycles, len(full_powerups)) + + # Step 2: Prepend the missing powerups, as we now know the total number of power cycles. + # After this, each DPM should have the same number of powerups and are aligned. + # + # Example: + # Given: + # DPM1: [1, 2, 3, 4, 5] + # DPM2: [6, None, 8, None] + # num_power_cycles = 5 + # Result: + # DPM1: [1, 2, 3, 4, 5] + # DPM2: [None, 6, None, 8, None] + for dpm, powerups in ret.items(): + missing = num_power_cycles - len(powerups) + if missing > 0: + ret[dpm] = ([None] * missing) + powerups + + return ret, num_power_cycles + + +def squash_dpms_powerups_to_cause_per_reboot( + dpm_to_powerups: dict[DpmBase, list[DpmPowerUpEntry]], +) -> list[RebootCause]: + """Squashes the powerup entries from all DPMs into one cause per reboot. + + The function first aligns the powerups among all DPMs, so each DPM has a full + view of all previous power cycles. It may look something like: + + DPM1: [unknown, unknown, fault_1] + DPM2: [fault_2, fault_3, fault_4] + DPM3: [unknown, unknown, unknown] + + Notes: + - Each column represents a power cycle experienced by the system. + - "fault_x" indicates that the DPM realized a power fault cause on that powerup. + - "unknown" indicates that a power fault cause cannot be realized by the DPM on + that powerup. However, the power cycle has happened. It's either the DPM + does not have the capability to detect the cause, or the DPM did not log anything. + + To determine the reboot cause for each powerup, we look at each column from top to bottom, + and arbitrarily take the first known fault cause that we encounter. This works because HWs + are generally designed to not log the same cause across DPMs. Except for CPUCARD-driven + event where the SWITCHCARD also logs a record (as exampled in DPM2's fault_4). + To handle this case, we place the CPUCARD's DPM before the SWITCHCARD's DPM in `pd-plugin.json`. + + For this example, we return `[fault_2, fault_3, fault_1]`. + + Args: + dpm_to_powerups: Dictionary of DPM to list of powerups (must be sorted old->new). + + Returns: + List of reboot causes, one per power cycle. The length of the list is the number of + power cycles experienced by the system (as seen by the DPMs). + """ + if not dpm_to_powerups: + return [] + + # First, align the powerups among all DPMs, from left to right (oldest to newest). + dpm_to_all_previous_powerups, num_power_cycles = fill_in_missing_and_align_powerups( + dpm_to_powerups + ) + + # Second, for each powerup (`p`), pick the first-seen DPM that reports a power fault. + results = [] + for p in range(num_power_cycles): + picked = next( + ( + powerup.power_fault_cause + for powerups in dpm_to_all_previous_powerups.values() + if (powerup := powerups[p]) and powerup.power_fault_cause + ), + None, + ) + if picked: + results.append(picked) + else: + logger.log_warning( + f"Cannot determine power fault cause for the {ordinal(num_power_cycles - p)} previous reboot." + ) + results.append(UNKNOWN_HW_REBOOT_CAUSE) + return results + + +def parse_timestamp(timestamp_str: str) -> datetime.datetime: + """Parse a timestamp string into a datetime object.""" + try: + return parser.parse(timestamp_str) + except Exception as e: + logger.log_warning(f"Failed to parse timestamp '{timestamp_str}': {e}") + return UNKNOWN_TIMESTAMP + + +def merge_sw_and_hw_causes( + sw_cause: RebootCause | None, hw_causes: list[RebootCause] +) -> list[RebootCause]: + """Merges the SW cause and HW causes into a single list, sorted by timestamp. + + This is best effort as some HW causes may not have the UTC timestamp (DPM clocks + are reset on every power down. It's not until the next I2C device creation + (during pddf-platform-init) that the DPM's clock is set to the UNIX time. Any + DPM records created between the power down and the I2C device creation will + not have the UTC timestamp). + """ + if not sw_cause: + return hw_causes + + # Find a place to insert the SW cause, using best effort. + # If not found, prepend SW cause to the front, as it's more common that + # SW cause is leading to a HW cause. + insert_idx = 0 + for i, hw_cause in enumerate(hw_causes): + if ( + not isinstance(hw_cause.timestamp, datetime.datetime) + or hw_cause == UNKNOWN_HW_REBOOT_CAUSE + ): + continue + if hw_cause.timestamp < sw_cause.timestamp: # type: ignore + insert_idx = i + 1 + + # Insert the SW cause. + ret = hw_causes[:insert_idx] + [sw_cause] + hw_causes[insert_idx:] + return ret + + +def squash_sw_and_hw_causes(sorted_causes: list[RebootCause]) -> list[RebootCause]: + """Squahes the SW cause and HW cause if they refer to the same reboot.""" + + def time_diff(cause1: RebootCause, cause2: RebootCause) -> datetime.timedelta | None: + if ( + not isinstance(cause1.timestamp, datetime.datetime) + or cause1.timestamp == UNKNOWN_TIMESTAMP + ): + return None + if ( + not isinstance(cause2.timestamp, datetime.datetime) + or cause2.timestamp == UNKNOWN_TIMESTAMP + ): + return None + return cause2.timestamp - cause1.timestamp + + ret = [] + i = 0 + while i < len(sorted_causes): + cause = sorted_causes[i] + next_cause = sorted_causes[i + 1] if i + 1 < len(sorted_causes) else None + + ret.append(cause) + + # Nexthop's SW cold "reboot" and "Kernel Panic" are always followed by a power cycle + # within 3m (10s for the buffer). + if ( + cause.type == RebootCause.Type.SOFTWARE + and (cause.cause == "reboot" or "Kernel Panic" in cause.cause) + and next_cause + and next_cause.type == RebootCause.Type.HARDWARE + and (delta := time_diff(cause, next_cause)) + and delta <= datetime.timedelta(minutes=3, seconds=10) + ): + i = i + 2 # Skip the next cause. + else: + i = i + 1 + return ret + + +class RebootCauseManager: + def __init__(self, pddf_data: dict[str, Any], pddf_plugin_data: dict[str, Any]): + self._pddf_data = pddf_data + self._pddf_plugin_data = pddf_plugin_data + self._sw_reboot_cause_filepath = pddf_plugin_data.get("REBOOT_CAUSE", {}).get( + "reboot_cause_file", None + ) + + self._dpm_devices: list[DpmBase] = [] + for dpm_name, platform_spec in pddf_plugin_data.get("DPM", {}).items(): + dpm_type = platform_spec["type"] + if dpm_type == "adm1266": + self._dpm_devices.append( + Adm1266(dpm_name, platform_spec, self._pddf_data) + ) + else: + logger.log_warning(f"Unknown DPM type '{dpm_type}' for '{dpm_name}' DPM.") + + def _read_powerups_from_all_dpms(self) -> dict[DpmBase, list[DpmPowerUpEntry]]: + """Returns a dictionary of DPM to a list of powerups.""" + dpm_to_powerups: dict[DpmBase, list[DpmPowerUpEntry]] = {} + for dpm in self._dpm_devices: + dpm_to_powerups[dpm] = dpm.get_powerup_entries() + return dpm_to_powerups + + def _clear_records_on_all_dpms(self): + for dpm in self._dpm_devices: + dpm.clear_records() + + def _read_sw_reboot_cause(self) -> RebootCause | None: + if not self._sw_reboot_cause_filepath or not os.path.exists(self._sw_reboot_cause_filepath): + return None + + with open(self._sw_reboot_cause_filepath, "r", errors="replace") as file: + content = file.read().strip() + if content.lower() == "unknown": + return None + + # Parse the SW cause here, so we can summarize it in Nexthop's history log. + if match := re.search(r"User issued '(.*)' command \[.*Time: (.*)\]", content): + # Normally, it is from one of the reboot scripts, e.g. 'reboot', 'warm-reboot'. + cause = match.group(1) + timestamp = parse_timestamp(match.group(2)) + elif match := re.search(r"(Kernel Panic.*) \[.*Time: (.*)\]", content): + cause = match.group(1) + timestamp = parse_timestamp(match.group(2)) + else: + cause = content + timestamp = UNKNOWN_TIMESTAMP + return RebootCause( + type=RebootCause.Type.SOFTWARE, + source="SW", + timestamp=timestamp, + cause=cause, + description=content, + chassis_reboot_cause_category="REBOOT_CAUSE_NON_HARDWARE", + ) + + def read_hw_reboot_causes(self) -> tuple[list[RebootCause], dict[DpmBase, list[DpmPowerUpEntry]]]: + """Reads blackbox records from DPMs and returns (HW reboot causes, DPM powerup records).""" + dpm_to_powerups = self._read_powerups_from_all_dpms() + return squash_dpms_powerups_to_cause_per_reboot(dpm_to_powerups), dpm_to_powerups + + def summarize_reboot_causes(self) -> list[RebootCause]: + """Returns a list of reboot causes, one per reboot. + + Reboot causes are derived from the knowledge of DPM records (HW) + and the reboot cause file (SW). + """ + hw_reboot_causes, dpm_to_powerups = self.read_hw_reboot_causes() + sw_reboot_cause = self._read_sw_reboot_cause() + ret_causes = merge_sw_and_hw_causes(sw_reboot_cause, hw_reboot_causes) + + # Save all records to history. + DpmLogger().save(ret_causes, dpm_to_powerups) + + self._clear_records_on_all_dpms() + return squash_sw_and_hw_causes(ret_causes) diff --git a/platform/broadcom/sonic-platform-modules-nexthop/common/sonic_platform/thermal.py b/platform/broadcom/sonic-platform-modules-nexthop/common/sonic_platform/thermal.py index 6573ddf5c50..25c2ca559c0 100644 --- a/platform/broadcom/sonic-platform-modules-nexthop/common/sonic_platform/thermal.py +++ b/platform/broadcom/sonic-platform-modules-nexthop/common/sonic_platform/thermal.py @@ -325,6 +325,8 @@ def get_maximum_recorded(self): class SfpThermal(ThermalBase, MinMaxTempMixin, PidThermalMixin): """SFP thermal interface class""" THRESHOLDS_CACHE_INTERVAL_SEC = 5 + TEMP_CACHE_INTERVAL_SEC = 1 + TEMP_STALE_SEC = 30 MIN_VALID_SETPOINT = 30.0 DEFAULT_SETPOINT = 62.0 @@ -334,6 +336,9 @@ def __init__(self, sfp, pddf_data): self._max_temperature = None self._threshold_info = {} self._threshold_info_time = 0 + self._intf_name = None + self._temp = None + self._temp_read_time = 0 self._invalid_setpoint_logged = False self._state_db = None ThermalBase.__init__(self) @@ -380,10 +385,63 @@ def get_position_in_parent(self): def is_replaceable(self): return True + def _resolve_intf_name(self): + if self._intf_name: + return self._intf_name + self._intf_name = PortIndexMapper().get_interface_name( + self._sfp.get_position_in_parent() + ) + return self._intf_name + def get_temperature(self): if not self.get_presence(): + self._intf_name = None + return None + + if time.monotonic() - self._temp_read_time < self.TEMP_CACHE_INTERVAL_SEC: + self._update_min_max_temp(self._temp) + return self._temp + + intf_name = self._resolve_intf_name() + if not intf_name: + thermal_syslogger.log_warning( + f"Failed to get interface name for port {self._sfp.get_position_in_parent()}; " + f"temperature will not be available." + ) return None - temp = self._sfp.get_temperature() + + db = self._get_state_db() + key = f"TRANSCEIVER_DOM_TEMPERATURE|{intf_name}" + data = db.get_all(db.STATE_DB, key) or {} + + temp_str = data.get("temperature") + try: + temp = float(temp_str) if temp_str not in (None, "", "N/A") else None + except (TypeError, ValueError): + temp = None + + last_update = data.get("last_update_time") + if temp is not None and last_update: + try: + age = time.time() - time.mktime(time.strptime(last_update, "%a %b %d %H:%M:%S %Y")) + if age > self.TEMP_STALE_SEC: + thermal_syslogger.log_warning( + f"Stale TRANSCEIVER_DOM_TEMPERATURE for {intf_name} " + f"(age={age:.0f}s); ignoring" + ) + temp = None + except ValueError: + thermal_syslogger.log_error( + f"Failed to parse last_update_time '{last_update}' for {intf_name}" + ) + elif temp is not None: + thermal_syslogger.log_warning( + f"TRANSCEIVER_DOM_TEMPERATURE for {intf_name} missing last_update_time; " + f"accepting without staleness check" + ) + + self._temp = temp + self._temp_read_time = time.monotonic() self._update_min_max_temp(temp) return temp diff --git a/platform/broadcom/sonic-platform-modules-nexthop/common/sonic_platform/thermal_actions.py b/platform/broadcom/sonic-platform-modules-nexthop/common/sonic_platform/thermal_actions.py index c44f4297d32..26f89a7ec88 100644 --- a/platform/broadcom/sonic-platform-modules-nexthop/common/sonic_platform/thermal_actions.py +++ b/platform/broadcom/sonic-platform-modules-nexthop/common/sonic_platform/thermal_actions.py @@ -382,11 +382,13 @@ def _compute_domain_pid_output( current_temp = thermal.get_temperature() if current_temp is None: # We may have no temperature reading if thermal is not present + self.log_info(f"Thermal '{thermal.get_name()}' has no temperature reading, skipping") continue setpoint = thermal.get_pid_setpoint() if setpoint is None: # If the thermal was just unplugged, we may got the temperature, but not the setpoint + self.log_info(f"Thermal '{thermal.get_name()}' has no setpoint, skipping") continue error = current_temp - setpoint - self._extra_setpoint_margin[domain] diff --git a/platform/broadcom/sonic-platform-modules-nexthop/common/sonic_platform/thermal_conditions.py b/platform/broadcom/sonic-platform-modules-nexthop/common/sonic_platform/thermal_conditions.py index a61128b855a..80db08e1559 100644 --- a/platform/broadcom/sonic-platform-modules-nexthop/common/sonic_platform/thermal_conditions.py +++ b/platform/broadcom/sonic-platform-modules-nexthop/common/sonic_platform/thermal_conditions.py @@ -8,7 +8,7 @@ from .thermal_infos import FanDrawerInfo class FanDrawerCondition(ThermalPolicyConditionBase): - def get_fan_drawer_info(self, thermal_info_dict) -> FanDrawerInfo: + def get_fan_drawer_info(self, thermal_info_dict) -> FanDrawerInfo | None: """ Get fan info from thermal dict to determine if a fan condition matches @@ -50,7 +50,31 @@ class FanDrawerFourPresentCondition(FanDrawerCondition): def is_match(self, thermal_info_dict: dict) -> bool: fan_drawer_info = self.get_fan_drawer_info(thermal_info_dict) return fan_drawer_info.get_num_present_fan_drawers() == 4 - + +@thermal_json_object('fandrawer.five.present') +class FanDrawerFivePresentCondition(FanDrawerCondition): + def is_match(self, thermal_info_dict: dict) -> bool: + fan_drawer_info = self.get_fan_drawer_info(thermal_info_dict) + return fan_drawer_info.get_num_present_fan_drawers() == 5 + +@thermal_json_object('fandrawer.six.present') +class FanDrawerSixPresentCondition(FanDrawerCondition): + def is_match(self, thermal_info_dict: dict) -> bool: + fan_drawer_info = self.get_fan_drawer_info(thermal_info_dict) + return fan_drawer_info.get_num_present_fan_drawers() == 6 + +@thermal_json_object('fandrawer.seven.present') +class FanDrawerSevenPresentCondition(FanDrawerCondition): + def is_match(self, thermal_info_dict: dict) -> bool: + fan_drawer_info = self.get_fan_drawer_info(thermal_info_dict) + return fan_drawer_info.get_num_present_fan_drawers() == 7 + +@thermal_json_object('fandrawer.eight.present') +class FanDrawerEightPresentCondition(FanDrawerCondition): + def is_match(self, thermal_info_dict: dict) -> bool: + fan_drawer_info = self.get_fan_drawer_info(thermal_info_dict) + return fan_drawer_info.get_num_present_fan_drawers() == 8 + @thermal_json_object('default.operation') class ThermalControlAlgorithmCondition(FanDrawerCondition): """ diff --git a/platform/broadcom/sonic-platform-modules-nexthop/common/sonic_platform/thermal_infos.py b/platform/broadcom/sonic-platform-modules-nexthop/common/sonic_platform/thermal_infos.py index 8e3d1597e3b..ad3563a650d 100644 --- a/platform/broadcom/sonic-platform-modules-nexthop/common/sonic_platform/thermal_infos.py +++ b/platform/broadcom/sonic-platform-modules-nexthop/common/sonic_platform/thermal_infos.py @@ -64,10 +64,16 @@ def __init__(self): def collect(self, chassis: Chassis): self._psus = chassis.get_all_psus()[:] - def get_thermals(self)->list[Psu]: - return self._psus.get_all_thermals() - - def get_fans(self)->list[Psu]: - return self._psus.get_all_fans() + def get_thermals(self)->list: + thermals = [] + for psu in self._psus: + thermals.extend(psu.get_all_thermals()) + return thermals + + def get_fans(self)->list: + fans = [] + for psu in self._psus: + fans.extend(psu.get_all_fans()) + return fans diff --git a/platform/broadcom/sonic-platform-modules-nexthop/common/utils/adm1266_rtc_sync b/platform/broadcom/sonic-platform-modules-nexthop/common/utils/adm1266_rtc_sync new file mode 100755 index 00000000000..e9978277762 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-nexthop/common/utils/adm1266_rtc_sync @@ -0,0 +1,74 @@ +#!/usr/bin/env python3 +# Copyright 2025 Nexthop Systems Inc. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 + +""" +ADM1266 RTC Synchronization Utility. + +This script synchronizes the RTC (Real-Time Counter) of all ADM1266 DPM devices, +to avoid clocks' drift on a long-running system. + +Writing the epoch offset to the kernel driver's sysfs interface will trigger +SET_RTC command on the ADM1266 DPM devices. +""" + +import sys + +from nexthop.pddf_config_parser import load_pd_plugin_config, load_pddf_device_config +from sonic_platform.adm1266 import Adm1266, EPOCH_OFFSET_SECONDS +from sonic_platform.dpm_base import DpmType +from sonic_py_common import syslogger + +SYSLOG_IDENTIFIER = "adm1266_rtc_sync" +logger = syslogger.SysLogger(SYSLOG_IDENTIFIER) + + +def main(): + """Synchronize RTC for all ADM1266 devices. + + Returns: + int: 0 on success, 1 on error + """ + try: + plugin_config = load_pd_plugin_config() + except Exception as e: + logger.log_error(f"Failed to load pd-plugin.json configuration: {e}") + return 1 + + try: + device_config = load_pddf_device_config() + except Exception as e: + logger.log_error(f"Failed to load pddf-device.json configuration: {e}") + return 1 + + dpm_config = plugin_config.get("DPM", {}) + if not dpm_config: + return 0 + + success_count = 0 + error_count = 0 + + for dpm_name, platform_spec in dpm_config.items(): + dpm_type = platform_spec.get("type") + if dpm_type != DpmType.ADM1266.value: + continue + + try: + adm1266 = Adm1266(dpm_name, platform_spec, device_config) + adm1266.set_rtc_epoch_offset(EPOCH_OFFSET_SECONDS) + success_count += 1 + + except Exception as e: + logger.log_error(f"Failed to synchronize RTC for {dpm_name}: {e}") + error_count += 1 + + if success_count > 0 or error_count > 0: + logger.log_info( + f"RTC synchronization with epoch_offset_secs={EPOCH_OFFSET_SECONDS} complete: {success_count} succeeded, {error_count} failed" + ) + + return 1 if error_count > 0 else 0 + + +if __name__ == "__main__": + sys.exit(main()) diff --git a/platform/broadcom/sonic-platform-modules-nexthop/common/utils/adm1266_version b/platform/broadcom/sonic-platform-modules-nexthop/common/utils/adm1266_version new file mode 100755 index 00000000000..452f36dab19 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-nexthop/common/utils/adm1266_version @@ -0,0 +1,27 @@ +#!/usr/bin/env python3 + +import click + +@click.command() +@click.argument("i2c_path") +def adm1266_version(i2c_path): + """Read adm1266 versions from sysfs. Combines FW revision and CFG revision + into a single version string for use with fwutil. + + I2C_PATH is in the format {I2C Bus Num}-00{I2C Address}. e.g. "9-0041" + """ + fw_ver = "" + cfg_ver = "" + fw_path = f"/sys/bus/i2c/devices/{i2c_path}/firmware_revision" + cfg_path = f"/sys/bus/i2c/devices/{i2c_path}/mfr_revision" + try: + with open(fw_path, "r") as f: + fw_ver = f.read().strip() + with open(cfg_path, "r") as f: + cfg_ver = f.read().strip() + except FileNotFoundError: + pass + click.echo(f"fw{fw_ver}_cfg{cfg_ver}") + +if __name__ == "__main__": + adm1266_version() diff --git a/platform/broadcom/sonic-platform-modules-nexthop/common/utils/agera_version b/platform/broadcom/sonic-platform-modules-nexthop/common/utils/agera_version new file mode 100755 index 00000000000..fc9040edfa1 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-nexthop/common/utils/agera_version @@ -0,0 +1,80 @@ +#!/usr/bin/env python3 + +import click +import subprocess +import re + + +PHY_SWITCH_MAP = { + "PHY0": "0x2114d71000000000", + "PHY1": "0x2114d71000000001", + "PHY2": "0x2114d71000000002", + "PHY3": "0x2114d71000000003", + "PHY4": "0x2114d71000000004", + "PHY5": "0x2114d71000000005", + "PHY6": "0x2114d71000000006", + "PHY7": "0x2114d71000000007", + "PHY8": "0x2114d71000000008", + "PHY9": "0x2114d71000000009", + "PHY10": "0x2114d7100000000a", + "PHY11": "0x2114d7100000000b", + "PHY12": "0x2114d7100000000c", + "PHY13": "0x2114d7100000000d", + "PHY14": "0x2114d7100000000e", + "PHY15": "0x2114d7100000000f", +} + +def get_switch_object_for_phy_name(phy_name: str): + """Resolve PHY name (e.g. "PHY0") to an Agera switch object ID. + """ + # Hard coded values for nh5010-r0, obtained from agera2sh + return PHY_SWITCH_MAP.get(phy_name.upper()) + + +@click.command() +@click.argument("phy_name") +def agera_version(phy_name: str): + """Gets the firmware version of the Agera gearbox by PHY name (e.g. PHY0).""" + + switch_obj = get_switch_object_for_phy_name(phy_name) + if not switch_obj: + click.echo("unknown") + return + + # Run agera2sh in a TTY-capable environment without using shell=True. + cmd = [ + "script", + "-q", + "-c", + "docker exec -ti gbsyncd agera2sh", + "/dev/null", + ] + + try: + result = subprocess.run( + cmd, + input=f"s {switch_obj}\nfw\n", + text=True, + stdout=subprocess.PIPE, + stderr=subprocess.PIPE, + check=False, + ) + except OSError: + # script(1) or docker(1) not found, or other OS-level error + fw_ver = "unknown" + else: + if result.returncode != 0: + fw_ver = "unknown" + else: + match = re.search( + r"firmware ver[^\r\n]*?(\S+)\s*$", + result.stdout, + flags=re.IGNORECASE | re.MULTILINE, + ) + fw_ver = match.group(1) if match else "unknown" + + click.echo(fw_ver) + + +if __name__ == "__main__": + agera_version() diff --git a/platform/broadcom/sonic-platform-modules-nexthop/common/utils/nh_powercycle b/platform/broadcom/sonic-platform-modules-nexthop/common/utils/nh_powercycle index bb59d18addc..3a593bba6e9 100755 --- a/platform/broadcom/sonic-platform-modules-nexthop/common/utils/nh_powercycle +++ b/platform/broadcom/sonic-platform-modules-nexthop/common/utils/nh_powercycle @@ -1,7 +1,7 @@ #!/usr/bin/python3 -import os import sys +import syslog import time from nexthop.pddf_config_parser import ( @@ -10,69 +10,83 @@ from nexthop.pddf_config_parser import ( FpgaDeviceName, ) from nexthop.fpga_lib import write_32 -from nexthop.pcie_lib import get_cpu_card_fpga_bdf, get_switchcard_fpga_bdf -from sonic_py_common import logger +from nexthop.pcie_lib import get_cpu_card_fpga_bdf, get_switchcard_fpga_bdf, get_switchcard_fpga_0_bdf REBOOT_DELAY_MS = 1000 -sonic_logger = logger.Logger(os.path.basename(__file__)) -sonic_logger.set_min_log_priority_info() - -def log_error(msg: str): - sonic_logger.log_error(msg) +def log_to_kernel(message): + try: + with open("/dev/kmsg", "w") as k: + # Use ERR level so it's visible in dmesg and console. + print(f"<{syslog.LOG_ERR}>nh_powercycle: {message}\n", file=k, end="") + except Exception: + pass def main(): try: config = load_pddf_device_config() except Exception as e: - log_error(f"Failed to load PDDF configuration: {str(e)}") + log_to_kernel(f"Failed to load PDDF configuration: {str(e)}") return 1 - fpga_types = (FpgaDeviceName.CPU_CARD.value, FpgaDeviceName.SWITCHCARD.value) + fpga_types = ( + FpgaDeviceName.CPU_CARD.value, + FpgaDeviceName.SWITCHCARD.value, + FpgaDeviceName.SWITCHCARD_0.value, + ) try: fpga_attrs = extract_fpga_attrs(config, fpga_types) except Exception as e: - log_error( - f"Failed to extract FPGA attributes from PDDF configuration: {str(e)}" - ) + log_to_kernel(f"Failed to extract FPGA attributes from PDDF configuration: {str(e)}") return 1 if not fpga_attrs: - log_error("No FPGA attributes found in PDDF configuration") + log_to_kernel("No FPGA attributes found in PDDF configuration") return 1 try: - sonic_logger.log_info( - "Writing to CPU card FPGA power cycle control register to initiate reboot" - ) + log_to_kernel("Writing to CPU card FPGA power cycle control register to initiate reboot") bdf = None attrs = fpga_attrs[FpgaDeviceName.CPU_CARD.value] bdf = get_cpu_card_fpga_bdf() write_32(bdf, attrs.pwr_cycle_reg_offset, attrs.pwr_cycle_enable_word) except Exception as e: - log_error( + log_to_kernel( "Error attempting power cycle via control register on CPU FPGA" f" {bdf if bdf else ''}: {str(e)}, trying switchcard FPGA" ) time.sleep(REBOOT_DELAY_MS / 1000) - try: - bdf = None - attrs = fpga_attrs[FpgaDeviceName.SWITCHCARD.value] - bdf = get_switchcard_fpga_bdf() - write_32(bdf, attrs.pwr_cycle_reg_offset, attrs.pwr_cycle_enable_word) - except Exception as e: - log_error( + sc_fpga_name = None + if FpgaDeviceName.SWITCHCARD.value in fpga_attrs: + sc_fpga_name = FpgaDeviceName.SWITCHCARD.value + sc_bdf = get_switchcard_fpga_bdf() + elif FpgaDeviceName.SWITCHCARD_0.value in fpga_attrs: + sc_fpga_name = FpgaDeviceName.SWITCHCARD_0.value + sc_bdf = get_switchcard_fpga_0_bdf() + else: + log_to_kernel( "Error attempting power cycle via control register on switchcard FPGA" - f" {bdf if bdf else ''}: {str(e)}" + " : Switchcard FPGA bdf not found." ) + if sc_fpga_name is not None: + try: + log_to_kernel(f"Writing to '{sc_fpga_name}' power cycle control register to initiate reboot") + attrs = fpga_attrs[sc_fpga_name] + write_32(sc_bdf, attrs.pwr_cycle_reg_offset, attrs.pwr_cycle_enable_word) + except Exception as e: + log_to_kernel( + "Error attempting power cycle via control register on switchcard FPGA" + f" {sc_bdf if sc_bdf else ''}: {str(e)}" + ) + time.sleep(REBOOT_DELAY_MS / 1000) # If we reach here, we silently failed to reboot the dataplane! - log_error( + log_to_kernel( "Failed to initiate reboot, the control plane will reboot and" " leave the dataplane in an undefined state" ) diff --git a/platform/broadcom/sonic-platform-modules-nexthop/common/utils/nh_reboot_cause b/platform/broadcom/sonic-platform-modules-nexthop/common/utils/nh_reboot_cause index 2edde929e45..a8a6a0b7035 100755 --- a/platform/broadcom/sonic-platform-modules-nexthop/common/utils/nh_reboot_cause +++ b/platform/broadcom/sonic-platform-modules-nexthop/common/utils/nh_reboot_cause @@ -5,93 +5,119 @@ Displays reboot-cause information from saved DPM fault records. Reads persisted JSON files only - no device access or recomputation. """ -import os import click -from typing import List +import os +import sys -from sonic_platform.adm1266 import Adm1266Display -from sonic_platform.dpm import SystemDPMLogHistory +from nexthop import pddf_config_parser +from sonic_platform import adm1266 +from sonic_platform.dpm_base import DpmType +from sonic_platform.dpm_logger import DpmLogger, DataBase, DataV1 +from sonic_platform.reboot_cause_manager import RebootCauseManager +RECORD_NAME_WIDTH = 42 -@click.command() -@click.option('--history', is_flag=True, - help='Show history of all saved reboot-cause records') -def reboot_cause(history: bool) -> None: - """Show reboot-cause information from DPM fault records. - By default, displays the most recent reboot-cause. - Use --history to show all saved historical records. - """ - if history: - show_history() - else: - show_current() +def check_root_privileges() -> None: + """Checks if the current user has root privileges, exits if not.""" + if os.getuid() != 0: + click.secho("Root privileges required for this operation", fg="red") + sys.exit(1) -def show_current() -> None: - """Display the most recent reboot-cause from saved data.""" - dpm_type, records = SystemDPMLogHistory().load() +def _show_dpm_record(name: str, record: dict[str, str]) -> None: + first_row = True + for k, v in record.items(): + v = v.replace("\n", f"\n{' ' * RECORD_NAME_WIDTH} {' ' * len(k)} ") + if first_row: + click.echo(f" {name:<{RECORD_NAME_WIDTH-2}} {k}: {v}") + else: + click.echo(f"{' ' * RECORD_NAME_WIDTH} {k}: {v}") + first_row = False + click.echo() - if not records: + +def _show_data_v1(data: DataV1, verbosity: int) -> None: + click.secho(f"=== Captured at {data.gen_time} ===", fg="yellow") + + for c in reversed(data.causes): + click.secho( + f"[{c.timestamp}] cause: {c.cause}; description: {c.description}; source: {c.source}", + fg="blue", + ) + + if verbosity: + records = [(dpm, record) for dpm in data.dpms for record in reversed(dpm.records)] + click.echo(" DPM records:") + if not records: + click.echo(" None") + else: + for dpm, record in records: + if dpm.type == DpmType.ADM1266.value: + record_name = adm1266.record_unique_name(record) + if verbosity == 1: + record = adm1266.trim_record_dict(record) + else: + record_name = dpm.name + _show_dpm_record(record_name, record) + + +def _show_data(data: DataBase, verbosity: int) -> None: + if data.schema_version == 1 and isinstance(data, DataV1): + _show_data_v1(data, verbosity) + + +@click.group(invoke_without_command=True) +@click.pass_context +@click.option("-v", "verbosity", flag_value=1, help="Show debug fields from DPM records") +@click.option("-vv", "verbosity", flag_value=2, help="Show all fields from DPM records") +def reboot_cause(ctx, verbosity: int) -> None: + """Shows reboot-cause information and DPM records. + + By default, displays the most recent reboot-cause. + Use history to show all saved historical records. + Use -v or -vv to show DPM records. + Use read_blackbox to read DPM records directly from hardware. + """ + if ctx.invoked_subcommand is None: + data = DpmLogger().load() + if data is None or data.is_empty(): + click.secho("No reboot-cause records found") + return + _show_data(data, verbosity) + + +@reboot_cause.command() +@click.option("-v", "verbosity", flag_value=1, help="Show debug fields from DPM records") +@click.option("-vv", "verbosity", flag_value=2, help="Show all fields from DPM records") +def history(verbosity: int) -> None: + """Displays reboot-cause history with most recent entry first.""" + datas = DpmLogger().load_all() + if not datas: click.echo("No reboot-cause records found") return - if dpm_type != "adm1266": - click.echo(f"Error: Unsupported DPM type '{dpm_type}' (expected 'adm1266')") - return + for data in reversed(datas): + _show_data(data, verbosity) - messages = Adm1266Display(records).render(is_first=True) - for msg in messages: - if msg: - click.echo(msg) +@reboot_cause.command() +def read_blackbox() -> None: + """Reads and displays blackbox records from all DPMs if available.""" + check_root_privileges() -def show_history() -> None: - """Display reboot-cause history with most recent entry first.""" - history = SystemDPMLogHistory() - files: List[str] = list(getattr(history, '_history_files', [])) + pddf_data = pddf_config_parser.load_pddf_device_config() + pd_plugin_data = pddf_config_parser.load_pd_plugin_config() + reboot_cause_manager = RebootCauseManager(pddf_data, pd_plugin_data) + hw_reboot_causes, dpm_to_powerups = reboot_cause_manager.read_hw_reboot_causes() - if not files: - click.echo("No reboot-cause history found") + data, _ = DpmLogger().to_data(hw_reboot_causes, dpm_to_powerups) + if data.is_empty(): + click.secho(f"{data.gen_time} - No blackbox records found from DPMs on the system") return - # Determine the current (most recent) file - latest = None - if os.path.exists(history.prev_link) or os.path.islink(history.prev_link): - try: - latest = os.path.realpath(history.prev_link) - except Exception: - pass - - # Build display order: current first, then remaining files newest to oldest - ordered: List[str] = [] - if latest and latest in files: - ordered.append(latest) - - for path in reversed(files): - if path != latest: - ordered.append(path) - - # Display each history entry - is_first = True - for path in ordered: - timestamp = history.get_timestamp(path) - click.echo(f"Logs recorded at {timestamp}") - - dpm_type, records = history.load_file(path) - if not records: - continue - - if dpm_type != "adm1266": - click.echo(f" Warning: Unsupported DPM type '{dpm_type}' (skipping)") - continue - - messages = Adm1266Display(records).render(is_first=is_first) - for msg in messages: - if msg: - click.echo(msg) - is_first = False + _show_data(data, verbosity=2) -if __name__ == '__main__': +if __name__ == "__main__": reboot_cause() diff --git a/platform/broadcom/sonic-platform-modules-nexthop/common/utils/pre_pddf_init.sh b/platform/broadcom/sonic-platform-modules-nexthop/common/utils/pre_pddf_init.sh index ddfed6bb1fe..58c8d432d52 100755 --- a/platform/broadcom/sonic-platform-modules-nexthop/common/utils/pre_pddf_init.sh +++ b/platform/broadcom/sonic-platform-modules-nexthop/common/utils/pre_pddf_init.sh @@ -29,6 +29,4 @@ fi nh_gen pddf_device_json nh_gen pcie_yaml -echo "blacklist adm1266" > /etc/modprobe.d/blacklist-adm1266.conf - exit 0 diff --git a/platform/broadcom/sonic-platform-modules-nexthop/common/utils/transceiver_init.py b/platform/broadcom/sonic-platform-modules-nexthop/common/utils/transceiver_init.py index a2cf8b6241a..50c0575c21c 100755 --- a/platform/broadcom/sonic-platform-modules-nexthop/common/utils/transceiver_init.py +++ b/platform/broadcom/sonic-platform-modules-nexthop/common/utils/transceiver_init.py @@ -2,7 +2,7 @@ """ Transceiver initialization script -This script deasserts reset and disables low power mode for all transceivers specified in pddf-device.json +This script deasserts reset and enables low power mode for all transceivers specified in pddf-device.json """ import sys @@ -52,11 +52,11 @@ def is_xcvr_control_available(xcvr_list): def init_xcvrs(xcvr_list): - """Initialize transceivers by deasserting reset and disabling low power mode""" + """Initialize transceivers by deasserting reset and enabling low power mode""" status = True log_info( - f"Deasserting reset and disabling low power mode for {len(xcvr_list)} transceivers." + f"Deasserting reset and enabling low power mode for {len(xcvr_list)} transceivers." ) for xcvr in xcvr_list: @@ -73,12 +73,12 @@ def init_xcvrs(xcvr_list): status = False continue - # Disable low power mode (write 0) + # Enable low power mode (write 1) try: with open(f"/sys/bus/i2c/devices/{bus}-{addr}/xcvr_lpmode", "w") as f: - f.write("0") + f.write("1") except Exception: - log_error(f"Failed to disable {name} xcvr low power mode for bus {bus}.") + log_error(f"Failed to enable {name} xcvr low power mode for bus {bus}.") status = False continue diff --git a/platform/broadcom/sonic-platform-modules-nexthop/debian/control b/platform/broadcom/sonic-platform-modules-nexthop/debian/control index d279eb52ceb..6c28dca8233 100755 --- a/platform/broadcom/sonic-platform-modules-nexthop/debian/control +++ b/platform/broadcom/sonic-platform-modules-nexthop/debian/control @@ -26,6 +26,12 @@ Depends: ${misc:Depends}, sonic-platform-nexthop-komodo Description: Modules for all revisions of NH-4010 +Package: sonic-platform-nexthop-4210 +Architecture: amd64 +Depends: ${misc:Depends}, + sonic-platform-nexthop-common +Description: Modules for all revisions of NH-4210 + Package: sonic-platform-nexthop-4220 Architecture: amd64 Depends: ${misc:Depends}, @@ -51,6 +57,12 @@ Depends: ${misc:Depends}, sonic-platform-nexthop-4010 Description: Modules for NH-4010 r1 +Package: sonic-platform-nexthop-4210-r0021 +Architecture: amd64 +Depends: ${misc:Depends}, + sonic-platform-nexthop-4210 +Description: Modules for NH-4210 r0021 + Package: sonic-platform-nexthop-4020-r0 Architecture: amd64 Depends: ${misc:Depends}, diff --git a/platform/broadcom/sonic-platform-modules-nexthop/debian/rules b/platform/broadcom/sonic-platform-modules-nexthop/debian/rules index 416cab97b0d..49c1ceb09bc 100755 --- a/platform/broadcom/sonic-platform-modules-nexthop/debian/rules +++ b/platform/broadcom/sonic-platform-modules-nexthop/debian/rules @@ -16,6 +16,7 @@ MODULE_DIRS += common MODULE_DIRS += komodo # SKU MODULE_DIRS += nh-4010 +MODULE_DIRS += nh-4210 MODULE_DIRS += nh-4220 MODULE_DIRS += nh-4220-r0 MODULE_DIRS += nh-5010 @@ -76,9 +77,7 @@ override_dh_auto_install: debian/$${pkg_name}$(KERNEL_SRC)/$(INSTALL_MOD_DIR); \ fi; \ if [ -d $(MOD_SRC_DIR)/$${mod}/$(SERVICE_DIR) ]; then \ - cp $(MOD_SRC_DIR)/$${mod}/$(SERVICE_DIR)/*.service \ - debian/$${pkg_name}/lib/systemd/system; \ - cp $(MOD_SRC_DIR)/$${mod}/$(SERVICE_DIR)/*.timer \ + cp $(MOD_SRC_DIR)/$${mod}/$(SERVICE_DIR)/* \ debian/$${pkg_name}/lib/systemd/system; \ fi; \ if [ -d $(MOD_SRC_DIR)/$${mod}/$(SYSTEM_DIR) ]; then \ @@ -99,6 +98,11 @@ override_dh_auto_install: cp $(MOD_SRC_DIR)/$${mod}/bash_completion.d/* \ debian/$${pkg_name}/etc/bash_completion.d/; \ fi; \ + if [ -d $(MOD_SRC_DIR)/$${mod}/debug-dump ]; then \ + dh_installdirs -p$${pkg_name} /usr/local/bin/debug-dump; \ + cp $(MOD_SRC_DIR)/$${mod}/debug-dump/* \ + debian/$${pkg_name}/usr/local/bin/debug-dump/; \ + fi; \ if [ -d $(MOD_SRC_DIR)/$${mod}/etc/modprobe.d ]; then \ dh_installdirs -p$${pkg_name} etc/modprobe.d; \ cp $(MOD_SRC_DIR)/$${mod}/etc/modprobe.d/* \ @@ -118,10 +122,10 @@ override_dh_install: *-r[0-9]*) \ if [ -f sonic_platform-1.0-py3-none-any.whl ]; then \ platform_suffix="$${pkg_name#$(PACKAGE_PRE_NAME)-}"; \ - sku="$${platform_suffix%-r[0-9]*}"; \ - revision="$${platform_suffix#$$sku}"; \ - fixed_sku=$$(echo "$$sku" | sed 's/-/_/g'); \ - device_name="x86_64-nexthop_$${fixed_sku}$${revision}"; \ + platform_string_model="$${platform_suffix%-r[0-9]*}"; \ + revision="$${platform_suffix#$$platform_string_model}"; \ + fixed_platform_string_model=$$(echo "$$platform_string_model" | sed 's/-/_/g' | sed -E 's/([a-z])([a-z])/\1\U\2/g'); \ + device_name="x86_64-nexthop_$${fixed_platform_string_model}$${revision}"; \ dh_install -p$${pkg_name} sonic_platform-1.0-py3-none-any.whl \ usr/share/sonic/device/$${device_name}/pddf/; \ fi; \ diff --git a/platform/broadcom/sonic-platform-modules-nexthop/debian/sonic-platform-nexthop-4010-r0.postinst b/platform/broadcom/sonic-platform-modules-nexthop/debian/sonic-platform-nexthop-4010-r0.postinst index a0dd61282b5..781a3f95210 100644 --- a/platform/broadcom/sonic-platform-modules-nexthop/debian/sonic-platform-nexthop-4010-r0.postinst +++ b/platform/broadcom/sonic-platform-modules-nexthop/debian/sonic-platform-nexthop-4010-r0.postinst @@ -9,5 +9,7 @@ systemctl enable system-ledd.service systemctl start --no-block system-ledd.service systemctl enable transceiver-init.service systemctl start transceiver-init.service +systemctl enable adm1266-rtc-sync.timer +systemctl start adm1266-rtc-sync.timer systemctl enable watchdog.timer systemctl start watchdog.timer diff --git a/platform/broadcom/sonic-platform-modules-nexthop/debian/sonic-platform-nexthop-4210-r0021.postinst b/platform/broadcom/sonic-platform-modules-nexthop/debian/sonic-platform-nexthop-4210-r0021.postinst new file mode 100644 index 00000000000..356b7582248 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-nexthop/debian/sonic-platform-nexthop-4210-r0021.postinst @@ -0,0 +1,14 @@ +depmod -a +systemctl enable pddf-platform-init.service +systemctl start pddf-platform-init.service +systemctl enable port-ledd.service +systemctl start --no-block port-ledd.service +systemctl enable system-ledd.service +systemctl start --no-block system-ledd.service +systemctl enable transceiver-init.service +systemctl start transceiver-init.service +systemctl enable adm1266-rtc-sync.timer +systemctl start adm1266-rtc-sync.timer +systemctl enable watchdog.timer +systemctl start watchdog.timer + diff --git a/platform/broadcom/sonic-platform-modules-nexthop/debian/sonic-platform-nexthop-5010-r0.postinst b/platform/broadcom/sonic-platform-modules-nexthop/debian/sonic-platform-nexthop-5010-r0.postinst index a0dd61282b5..4a4fdbb9900 100644 --- a/platform/broadcom/sonic-platform-modules-nexthop/debian/sonic-platform-nexthop-5010-r0.postinst +++ b/platform/broadcom/sonic-platform-modules-nexthop/debian/sonic-platform-nexthop-5010-r0.postinst @@ -9,5 +9,8 @@ systemctl enable system-ledd.service systemctl start --no-block system-ledd.service systemctl enable transceiver-init.service systemctl start transceiver-init.service +systemctl enable bcm-intf-init.service +systemctl enable adm1266-rtc-sync.timer +systemctl start adm1266-rtc-sync.timer systemctl enable watchdog.timer systemctl start watchdog.timer diff --git a/platform/broadcom/sonic-platform-modules-nexthop/nh-4010/etc/modprobe.d/blacklist.conf b/platform/broadcom/sonic-platform-modules-nexthop/nh-4010/etc/modprobe.d/blacklist.conf index 1348a165f50..d4f64260805 100644 --- a/platform/broadcom/sonic-platform-modules-nexthop/nh-4010/etc/modprobe.d/blacklist.conf +++ b/platform/broadcom/sonic-platform-modules-nexthop/nh-4010/etc/modprobe.d/blacklist.conf @@ -2,3 +2,6 @@ # to run first. opennsl-modules.service will load them later. blacklist linux_kernel_bde blacklist linux_ngbde + +# Blacklist the default ADM1266 kernel driver to force use of the custom one. +blacklist adm1266 diff --git a/platform/broadcom/sonic-platform-modules-nexthop/nh-4210/etc/modprobe.d/blacklist.conf b/platform/broadcom/sonic-platform-modules-nexthop/nh-4210/etc/modprobe.d/blacklist.conf new file mode 100644 index 00000000000..016f2e574e3 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-nexthop/nh-4210/etc/modprobe.d/blacklist.conf @@ -0,0 +1,8 @@ +# Delay loading of Broadcom ASIC driver and wait for asic_init.sh +# to run first. opennsl-modules.service will load them later. +blacklist linux_kernel_bde +blacklist linux_ngbde + +# Blacklist the default ADM1266 kernel driver to force use of the custom one. +blacklist adm1266 + diff --git a/platform/broadcom/sonic-platform-modules-nexthop/nh-4210/etc/systemd/system/syncd.service.d/sea-eagle-override.conf b/platform/broadcom/sonic-platform-modules-nexthop/nh-4210/etc/systemd/system/syncd.service.d/sea-eagle-override.conf new file mode 100644 index 00000000000..4167e3fadd5 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-nexthop/nh-4210/etc/systemd/system/syncd.service.d/sea-eagle-override.conf @@ -0,0 +1,3 @@ +[Service] +ExecStopPost=/usr/local/bin/asic_init.sh + diff --git a/platform/broadcom/sonic-platform-modules-nexthop/nh-4210/utils/asic_init.sh b/platform/broadcom/sonic-platform-modules-nexthop/nh-4210/utils/asic_init.sh new file mode 100755 index 00000000000..82dc45b2a97 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-nexthop/nh-4210/utils/asic_init.sh @@ -0,0 +1,224 @@ +#!/bin/bash + +# Ran during boot up and after syncd reset + +LOCKFD=200 +LOCKFILE="/var/run/nexthop-asic-init.lock" +ASIC_BRIDGE="00:02.1" +FPGA_0_BDF=$(setpci -s 00:01.4 0x19.b | xargs printf '0000:%s:00.0') +FPGA_1_BDF=$(setpci -s 00:01.5 0x19.b | xargs printf '0000:%s:00.0') +ASIC_BDF=$(setpci -s 00:02.1 0x19.b | xargs printf '%s:00.0') +LOG_PRIO="user.info" +LOG_ERR="user.err" + +lsmod | grep -q 'linux_ngbde' +IS_OPENNSL_INITIALLY_LOADED=$? + +if [ "$IS_OPENNSL_INITIALLY_LOADED" -eq 0 ]; then + LOG_TAG="asic_reset" +else + LOG_TAG="asic_init" +fi + +fpga_0_write() { + local offset="$1" + local value="$2" + local bits="$3" + + if [ -n "$bits" ]; then + fpga write32 "$FPGA_0_BDF" "$offset" "$value" --bits "$bits" > /dev/null + else + fpga write32 "$FPGA_0_BDF" "$offset" "$value" > /dev/null + fi + + if [ $? -ne 0 ]; then + logger -t $LOG_TAG -p $LOG_ERR "Error writing $value to reg $offset on switch fpga $FPGA_0_BDF" + exit 1 + fi +} + +fpga_1_write() { + local offset="$1" + local value="$2" + local bits="$3" + + if [ -n "$bits" ]; then + fpga write32 "$FPGA_1_BDF" "$offset" "$value" --bits "$bits" > /dev/null + else + fpga write32 "$FPGA_1_BDF" "$offset" "$value" > /dev/null + fi + + if [ $? -ne 0 ]; then + logger -t $LOG_TAG -p $LOG_ERR "Error writing $value to reg $offset on mezz fpga $FPGA_1_BDF" + exit 1 + fi +} + +function acquire_lock() { + if [[ ! -f $LOCKFILE ]]; then + touch $LOCKFILE + fi + + logger -t $LOG_TAG -p $LOG_PRIO "Acquiring ${LOCKFILE}" + + exec {LOCKFD}>${LOCKFILE} + /usr/bin/flock -x ${LOCKFD} + trap "/usr/bin/flock -u ${LOCKFD}" EXIT + + logger -t $LOG_TAG -p $LOG_PRIO "Acquired ${LOCKFILE}" +} + +function release_lock() { + /usr/bin/flock -u ${LOCKFD} + logger -t $LOG_TAG -p $LOG_PRIO "Released ${LOCKFILE}" +} + +function clear_sticky_bits() { + # This function clears all the sticky bits (Clear On Write) for various + # power monitoring and other status registers in the Sea Eagle FPGAs. + # FPGA 0, Switch Card, DevID 0x7018 + # FPGA 1, Mezz Card, DevID 0x7019 + # Are both separate PCIe devices accessed through different BDFs. + + # Carrying over from other products: + # It is safe to just write all 1s to these regs. They are not control bits. + # If more COW bits are added, we don't have to change this function. + + # FPGA 0 + # Shift Chains Status + fpga_0_write 0xf0 0xffffffff + # Input Status State Change Flags + fpga_0_write 0x120 0xffffffff + # TH6 Miscellaneous Status Change Flags + fpga_0_write 0x124 0xffffffff + # TH6 Timestamp Interface GPIO State Change Flags + fpga_0_write 0x128 0xffffffff + # Interrupt Status 0 + fpga_0_write 0x174 0xffffffff + # Interrupt Status 1 + fpga_0_write 0x17c 0xffffffff + # Interrupt Status 2 + fpga_0_write 0x184 0xffffffff + # PDC Status 0 Change Flags + fpga_0_write 0x1b0 0xffffffff + # PDC Status 1 Change Flags + fpga_0_write 0x1b4 0xffffffff + # CPU-Switch Card Status Change Flags + fpga_0_write 0x1b8 0xffffffff + # SFP Mgmt Card Status Change Flags + fpga_0_write 0x1bc 0xffffffff + # Miscellaneous Status 0 Change Flags + fpga_0_write 0x1c0 0xffffffff + # Miscellaneous Status 1 Change Flags + fpga_0_write 0x1c4 0xffffffff + + # FPGA 1 + # Shift Chains Status + fpga_1_write 0xf0 0xffffffff + # Input Status State Change Flags + fpga_1_write 0x120 0xffffffff + # Interrupt Status 0 + fpga_1_write 0x174 0xffffffff + # Interrupt Status 1 + fpga_1_write 0x17c 0xffffffff + # Interrupt Status 2 + fpga_1_write 0x184 0xffffffff + # Port 1-32 Module Present Change Flags + fpga_1_write 0x1a0 0xffffffff + # Port 1-32 Interrupt Change Flags + fpga_1_write 0x1a4 0xffffffff + # Port 1-32 Power Good Change Flags + fpga_1_write 0x1a8 0xffffffff + # Port 33-64 Module Present Change Flags + fpga_1_write 0x1ac 0xffffffff + # Port 33-64 Interrupt Change Flags + fpga_1_write 0x1b0 0xffffffff + # Port 33-64 Power Good Change Flags + fpga_1_write 0x1b4 0xffffffff + # Mezz 0 Port 1-32 Module Present Change Flags + fpga_1_write 0x1b8 0xffffffff + # Mezz 0 Port 1-32 Interrupt Change Flags + fpga_1_write 0x1bc 0xffffffff + # Mezz 0 Port 1-32 Power Good Change Flags + fpga_1_write 0x1c0 0xffffffff + # Mezz 1 Port 33-64 Module Present Change Flags + fpga_1_write 0x1c4 0xffffffff + # Mezz 1 Port 33-64 Interrupt Change Flags + fpga_1_write 0x1c8 0xffffffff + # Mezz 1 Port 33-64 Power Good Change Flags + fpga_1_write 0x1cc 0xffffffff + # Fan Card Status 0 State Change Flags + fpga_1_write 0x1d0 0xffffffff + # Fan Card Status 1 State Change Flags + fpga_1_write 0x1d4 0xffffffff +} + +function override_hw_fan_speed_clamp() { + fpga_1_write 0xac 0xffffffff +} + +override_hw_fan_speed_clamp + +if [ -f /disable_asic ]; then + logger -p user.warning -t $LOG_TAG "ASIC init disabled due to /disable_asic file" + release_lock + exit 0 +fi + +acquire_lock + +if [ "$IS_OPENNSL_INITIALLY_LOADED" -eq 0 ]; then + logger -t $LOG_TAG -p $LOG_PRIO "Removing ASIC modules" + /etc/init.d/opennsl-modules stop +fi + +fpga_0_write 0x8 0x0 "3:3" +fpga_0_write 0x8 0x1 "10:10" + +# Try power cycling, up to two times, or until Switch ASIC chip is found +for attempt in {0..2}; do + logger -t $LOG_TAG -p $LOG_PRIO "Power cycle attempt $attempt" + + fpga_0_write 0x90 0x0 "9:9" + sleep 1 + + fpga_0_write 0x90 0x1 "9:9" + logger -t $LOG_TAG -p $LOG_PRIO "Waiting for power-up sequence" + + sleep 8 + + clear_sticky_bits + + lspci -n | grep -q "$ASIC_BDF" + if [ $? -eq 0 ]; then + if [ "$attempt" -eq 0 ]; then + logger -t "$LOG_TAG" -p "$LOG_PRIO" "Switch ASIC is up" + else + logger -t "$LOG_TAG" -p "$LOG_PRIO" "Switch ASIC is up after power cycle $attempt" + fi + + logger -t $LOG_TAG -p $LOG_PRIO "Current lspci error(s) output" + output=$(lspci -vvv 2>/dev/null | grep -i -e '^0' -e 'CESta' | grep -B 1 -e 'CESta' | grep -B 1 -e '+ ' -e '+$') + logger -t $LOG_TAG -p $LOG_PRIO "lspci Errors: ${output}" + + if [ "$IS_OPENNSL_INITIALLY_LOADED" -eq 0 ]; then + logger -t $LOG_TAG -p $LOG_PRIO "Inserting ASIC modules: $(lsmod | grep linux_ngbde)" + /etc/init.d/opennsl-modules start + logger -t $LOG_TAG -p $LOG_PRIO "Inserting ASIC modules done: $(lsmod | grep linux_ngbde)" + fi + + release_lock + exit 0 + fi +done + +logger -t $LOG_TAG -p $LOG_ERR "Switch ASIC not found after power cycle attempts, giving up." + +if [ "$IS_OPENNSL_INITIALLY_LOADED" -eq 0 ]; then + logger -t $LOG_TAG -p $LOG_PRIO "Reloading ASIC modules despite failure" + /etc/init.d/opennsl-modules start +fi + +release_lock + +exit 1 diff --git a/platform/broadcom/sonic-platform-modules-nexthop/nh-4220-r0/utils/asic_init.sh b/platform/broadcom/sonic-platform-modules-nexthop/nh-4220-r0/utils/asic_init.sh index 8fc37558fc1..e8b82e939e9 100755 --- a/platform/broadcom/sonic-platform-modules-nexthop/nh-4220-r0/utils/asic_init.sh +++ b/platform/broadcom/sonic-platform-modules-nexthop/nh-4220-r0/utils/asic_init.sh @@ -35,6 +35,25 @@ fpga_write() { fi } +fpga_read() { + local offset="$1" + local bits="$2" + local result + + if [ -n "$bits" ]; then + result=$(fpga read32 "$FPGA_BDF" "$offset" --bits "$bits") + else + result=$(fpga read32 "$FPGA_BDF" "$offset") + fi + + if [ $? -ne 0 ]; then + logger -t $LOG_TAG -p $LOG_ERR "Error reading reg $offset on fpga $FPGA_BDF" + exit 1 + fi + + echo "$result" +} + function acquire_lock() { if [[ ! -f $LOCKFILE ]]; then touch $LOCKFILE @@ -108,6 +127,11 @@ if [ "$IS_OPENNSL_INITIALLY_LOADED" -eq 0 ]; then /etc/init.d/opennsl-modules stop fi +# Set DP_PWR_ON = 1 +# DP_POWR_ON should already be 1 in normal circumstances, but it's possible +# a power glitch brings it to 0. The system may kernel panic if we bring up +# the ASIC when DP_PWR_ON = 0. +fpga_write 0x90 0x1 "9:9" # Try power cycling, up to two times, or until Switch ASIC chip is found for attempt in {0..2}; do @@ -124,6 +148,15 @@ for attempt in {0..2}; do # We need to wait for the asic to come up sleep 3 + # Log ASIC_PGOOD + pg_bit=$(fpga_read 0x94 "15:15") + logger -t "$LOG_TAG" -p "$LOG_PRIO" "ASIC_PGOOD = $pg_bit" + if [ $(( pg_bit )) -eq 1 ]; then + logger -t "$LOG_TAG" -p "$LOG_PRIO" "ASIC power good" + else + logger -t "$LOG_TAG" -p "$LOG_ERR" "ASIC power good bit not set" + fi + # Check if switch ASIC is up lspci -n | grep -q "$ASIC_BDF" if [ $? -eq 0 ]; then diff --git a/platform/broadcom/sonic-platform-modules-nexthop/nh-4220/etc/modprobe.d/blacklist.conf b/platform/broadcom/sonic-platform-modules-nexthop/nh-4220/etc/modprobe.d/blacklist.conf index 6cad28e69e9..d4f64260805 100644 --- a/platform/broadcom/sonic-platform-modules-nexthop/nh-4220/etc/modprobe.d/blacklist.conf +++ b/platform/broadcom/sonic-platform-modules-nexthop/nh-4220/etc/modprobe.d/blacklist.conf @@ -1,4 +1,7 @@ # Delay loading of Broadcom ASIC driver and wait for asic_init.sh # to run first. opennsl-modules.service will load them later. blacklist linux_kernel_bde -blacklist linux_ngbde \ No newline at end of file +blacklist linux_ngbde + +# Blacklist the default ADM1266 kernel driver to force use of the custom one. +blacklist adm1266 diff --git a/platform/broadcom/sonic-platform-modules-nexthop/nh-5010/etc/modprobe.d/blacklist.conf b/platform/broadcom/sonic-platform-modules-nexthop/nh-5010/etc/modprobe.d/blacklist.conf new file mode 100644 index 00000000000..a2327165e81 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-nexthop/nh-5010/etc/modprobe.d/blacklist.conf @@ -0,0 +1,2 @@ +# Blacklist the default ADM1266 kernel driver to force use of the custom one. +blacklist adm1266 diff --git a/platform/broadcom/sonic-platform-modules-nexthop/nh-5010/service/bcm-intf-init.service b/platform/broadcom/sonic-platform-modules-nexthop/nh-5010/service/bcm-intf-init.service new file mode 100644 index 00000000000..56ae1ab7e6e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-nexthop/nh-5010/service/bcm-intf-init.service @@ -0,0 +1,15 @@ +[Unit] +Description=Initialize BCM Interfaces +Wants=sys-subsystem-net-devices-bcm0.device sys-subsystem-net-devices-bcm1.device +After=sys-subsystem-net-devices-bcm0.device sys-subsystem-net-devices-bcm1.device +BindsTo=sys-subsystem-net-devices-bcm0.device sys-subsystem-net-devices-bcm1.device +Before=syncd.service + +[Service] +Type=oneshot +RemainAfterExit=yes +ExecStart=/usr/local/bin/bcm_intf_init.sh + +[Install] +RequiredBy=syncd.service +WantedBy=multi-user.target diff --git a/platform/broadcom/sonic-platform-modules-nexthop/nh-5010/utils/asic_init.sh b/platform/broadcom/sonic-platform-modules-nexthop/nh-5010/utils/asic_init.sh index ee3beacdf56..8ecbae966ab 100755 --- a/platform/broadcom/sonic-platform-modules-nexthop/nh-5010/utils/asic_init.sh +++ b/platform/broadcom/sonic-platform-modules-nexthop/nh-5010/utils/asic_init.sh @@ -5,6 +5,10 @@ LOCKFILE="/var/run/nexthop-asic-init.lock" FPGA_BDF=$(setpci -s 00:02.2 0x19.b | xargs printf '0000:%s:00.0') KOMODO_FPGA_BDF=$(setpci -s 00:02.1 0x19.b | xargs printf '0000:%s:00.0') LOG_TAG="asic_init" +LOG_PRIO="user.info" + +lsmod | grep -q 'linux_ngbde' +IS_OPENNSL_INITIALLY_LOADED=$? fpga_read() { local offset="$1" @@ -175,21 +179,40 @@ check_fan_status acquire_lock +if [ "$IS_OPENNSL_INITIALLY_LOADED" -eq 0 ]; then + logger -t $LOG_TAG -p $LOG_PRIO "Removing ASIC modules" + /etc/init.d/opennsl-modules stop +fi + # Per HW, do this right before taking the ASIC out of reset. clear_sticky_bits # Switchcard revision is in Komodo FPGA register 0x44 bottom 4 bits switchcard_revision=$(($(komodo_fpga_read 0x44) & 0xF)) -# Take the asic out of reset -fpga_write 0x8 0x112 +# Q3D_RESET_RELEASE=0 +fpga write32 "$FPGA_BDF" 0x8 0x0 --bits "10:10" +sleep 0.001 + +# DP_PWR_ON_DRV=0 +fpga write32 "$FPGA_BDF" 0x90 0x0 --bits "4:4" sleep 2 -fpga_write 0x8 0x102 + +# DP_PWR_ON_DRV=1 +fpga write32 "$FPGA_BDF" 0x90 0x1 --bits "4:4" sleep 0.2 -fpga_write 0x8 0x502 + +# Q3D_RESET_RELEASE=1 +fpga write32 "$FPGA_BDF" 0x8 0x1 --bits "10:10" enable_phy +if [ "$IS_OPENNSL_INITIALLY_LOADED" -eq 0 ]; then + logger -t $LOG_TAG -p $LOG_PRIO "Inserting ASIC modules: $(lsmod | grep linux_ngbde)" + /etc/init.d/opennsl-modules start + logger -t $LOG_TAG -p $LOG_PRIO "Inserting ASIC modules done: $(lsmod | grep linux_ngbde)" +fi + release_lock exit 0 diff --git a/platform/broadcom/sonic-platform-modules-nexthop/nh-5010/utils/bcm_intf_init.sh b/platform/broadcom/sonic-platform-modules-nexthop/nh-5010/utils/bcm_intf_init.sh new file mode 100755 index 00000000000..11163ebe763 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-nexthop/nh-5010/utils/bcm_intf_init.sh @@ -0,0 +1,28 @@ +#!/bin/bash + +LOG_TAG="bcm_intf_init" +PLATFORM_ENV_FILE="/usr/share/sonic/platform/platform_env.conf" + +# Source platform_env.conf +if [ -f "$PLATFORM_ENV_FILE" ]; then + source "$PLATFORM_ENV_FILE" +else + logger -t $LOG_TAG -p error "Error: $PLATFORM_ENV_FILE not found" + exit 1 +fi + +if [ "$use_napi" = "1" ]; then + logger -t $LOG_TAG "NAPI is enabled, proceeding with bcm intf init" + for dev in bcm0 bcm1; do + if [ -d "/sys/class/net/$dev" ]; then + /sbin/ip link set "$dev" up + logger -t $LOG_TAG "Interface $dev set to UP" + else + logger -p user.warning -t $LOG_TAG "Interface $dev not present, skipping..." + fi + done +else + logger -t $LOG_TAG "NAPI is disabled, skipping bcm intf init" +fi + +exit 0 diff --git a/platform/broadcom/sonic-platform-modules-nexthop/test/README.md b/platform/broadcom/sonic-platform-modules-nexthop/test/README.md index cab1dd9e528..67c91e886cd 100644 --- a/platform/broadcom/sonic-platform-modules-nexthop/test/README.md +++ b/platform/broadcom/sonic-platform-modules-nexthop/test/README.md @@ -10,11 +10,10 @@ test/ ├── conftest.py # Global test configuration ├── fixtures/ # Test fixtures and mocking utilities │ ├── mock_imports_unit_tests.py # Unit test specific import mocks -│ ├── adm1266_test_spec.json # Input & expected output for ADM1266 testings │ ├── fake_swsscommon.py # Fake implementations of swsscommon DB. -│ └── test_helpers_adm1266.py # ADM1266 testing utilities -│ └── test_helpers_chassis.py # Chassis testing utilities -│ └── test_helpers_common.py # Common testing utilities +│ ├── test_helpers_adm1266.py # ADM1266 testing utilities +│ ├── test_helpers_chassis.py # Chassis testing utilities +│ ├── test_helpers_common.py # Common testing utilities │ └── test_helpers_eeprom.py # EEPROM testing utilities ├── unit/ # Unit tests (isolated, mocked environment) │ ├── conftest.py # Unit test configuration @@ -23,18 +22,22 @@ test/ │ │ ├── test_fpga_cli.py # fpga_cli unit tests │ │ ├── test_fpga_lib.py # FPGA library unit tests │ │ ├── test_gen_cli.py # gen_cli unit tests -│ │ └── test_led_control.py # LED control tests +│ │ ├── test_led_control.py # LED control tests │ │ └── test_pddf_config_parser.py # PDDF config extraction utilities tests -│ └── sonic_platform/ # Tests for sonic_platform modules -│ ├── test_adm1266.py # ADM1266 functionality tests -│ ├── test_chassis.py # Chassis functionality tests -│ ├── test_fan.py # Fan functionality tests -│ └── test_thermal.py # Thermal & PID controller tests -│ └── test_watchdog.py # Watchdog functionality tests +│ ├── sonic_platform/ # Tests for sonic_platform modules +│ │ ├── test_adm1266.py # ADM1266 functionality tests +│ │ ├── test_dpm_logger.py # DpmLogger functionality tests +│ │ ├── test_chassis.py # Chassis functionality tests +│ │ ├── test_fan.py # Fan functionality tests +│ │ ├── test_reboot_cause_manager.py # Reboot cause manager tests +│ │ ├── test_thermal.py # Thermal & PID controller tests +│ │ └── test_watchdog.py # Watchdog functionality tests +│ └── utils/ # Tests for Nexthop scripts +│ ├── test_adm1266_rtc_sync.py # adm1266_rtc_sync unit tests +│ └── test_nh_reboot_cause.py # nh_reboot_cause unit tests └── integration/ # Integration tests (real environment) ├── conftest.py # Integration test configuration ├── nexthop/ # Integration tests for nexthop - │ ├── test_adm1266_chassis_integration.py # ADM1266 <-> Chassis integration tests │ └── test_eeprom_utils_integration.py # EEPROM integration tests └── sonic_platform/ # Integration tests for sonic_platform └── test_chassis_sfp_integration.py # Chassis <-> SFP integration tests @@ -216,4 +219,4 @@ Test behavior is configured in `pytest.ini`: - **File Patterns**: Recognizes `test_*.py` files - **Function Patterns**: Runs functions starting with `test_` - **Default Options**: Verbose output, strict markers -- **Python Path**: Adds `test/` to import path for fixture imports +- **Python Path**: Adds `test/` to import path for fixture imports \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-nexthop/test/fixtures/adm1266_test_spec.json b/platform/broadcom/sonic-platform-modules-nexthop/test/fixtures/adm1266_test_spec.json deleted file mode 100644 index 6f45f6a1d79..00000000000 --- a/platform/broadcom/sonic-platform-modules-nexthop/test/fixtures/adm1266_test_spec.json +++ /dev/null @@ -1,45 +0,0 @@ -{ - "description": "Self-contained ADM1266 test vector using embedded hexdump lines; only hex byte pairs kept", - "hexdump_lines": [ - "23 00 02 01 00 10 0c 00 0b 00 00 00 00 00 1f 3c", - "f9 32 00 00 fc 1f 4d 11 79 2e ee 02 00 00 00 00", - "ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff", - "ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff d2", - "22 00 02 01 00 10 0c 00 0b 00 00 00 00 00 1f 3c", - "f9 32 00 00 fc 1f 4c 11 38 cc 80 02 00 00 00 00", - "ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff", - "ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff d0", - "21 00 02 01 00 10 0c 00 0b 00 00 00 00 00 1f 3c", - "f9 32 00 00 fc 1f 4b 11 63 42 a8 02 00 00 00 00", - "ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff", - "ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff 6d" - ], - "expected_blackbox_records": [ - { "fault_uid": 35, "action": 1, "rule": 0, "vhx": 16, "current": 12, "last": 11, "vp_ov": 0, "vp_uv": 0, "gpio_in": 15391, "gpio_out": 13049, "pdio_in": 0, "pdio_out": 8188, "powerup": 4429 }, - { "fault_uid": 34, "action": 1, "rule": 0, "vhx": 16, "current": 12, "last": 11, "vp_ov": 0, "vp_uv": 0, "gpio_in": 15391, "gpio_out": 13049, "pdio_in": 0, "pdio_out": 8188, "powerup": 4428 }, - { "fault_uid": 33, "action": 1, "rule": 0, "vhx": 16, "current": 12, "last": 11, "vp_ov": 0, "vp_uv": 0, "gpio_in": 15391, "gpio_out": 13049, "pdio_in": 0, "pdio_out": 8188, "powerup": 4427 } - ], - "expected_reboot_causes": [ - { "fault_uid": "0x23", "powerup": "0x114d", "action": "0x1", "rule": "0x0", "current": "0xc", "last": "0xb", - "vhx": "VH5 (0b00010000)", "vp_ov": "0b0000000000000000", "vp_uv": "0b0000000000000000", - "gpio_in": "GPIO1,GPIO2,GPIO3,GPIO4,GPIO5,GPIO11,GPIO12,GPIO13,GPIO14 (0b0011110000011111)", - "gpio_out": "GPIO1,GPIO4,GPIO5,GPIO6,GPIO7,GPIO8,GPIO10,GPIO13,GPIO14 (0b0011001011111001)", - "pdio_in": "0b0000000000000000", - "pdio_out": "PDIO3,PDIO4,PDIO5,PDIO6,PDIO7,PDIO8,PDIO9,PDIO10,PDIO11,PDIO12,PDIO13 (0b0001111111111100)", - "timestamp": "12 minutes 30.181534 seconds after power-on" }, - { "fault_uid": "0x22", "powerup": "0x114c", "action": "0x1", "rule": "0x0", "current": "0xc", "last": "0xb", - "vhx": "VH5 (0b00010000)", "vp_ov": "0b0000000000000000", "vp_uv": "0b0000000000000000", - "gpio_in": "GPIO1,GPIO2,GPIO3,GPIO4,GPIO5,GPIO11,GPIO12,GPIO13,GPIO14 (0b0011110000011111)", - "gpio_out": "GPIO1,GPIO4,GPIO5,GPIO6,GPIO7,GPIO8,GPIO10,GPIO13,GPIO14 (0b0011001011111001)", - "pdio_in": "0b0000000000000000", - "pdio_out": "PDIO3,PDIO4,PDIO5,PDIO6,PDIO7,PDIO8,PDIO9,PDIO10,PDIO11,PDIO12,PDIO13 (0b0001111111111100)", - "timestamp": "10 minutes 40.797729 seconds after power-on" }, - { "fault_uid": "0x21", "powerup": "0x114b", "action": "0x1", "rule": "0x0", "current": "0xc", "last": "0xb", - "vhx": "VH5 (0b00010000)", "vp_ov": "0b0000000000000000", "vp_uv": "0b0000000000000000", - "gpio_in": "GPIO1,GPIO2,GPIO3,GPIO4,GPIO5,GPIO11,GPIO12,GPIO13,GPIO14 (0b0011110000011111)", - "gpio_out": "GPIO1,GPIO4,GPIO5,GPIO6,GPIO7,GPIO8,GPIO10,GPIO13,GPIO14 (0b0011001011111001)", - "pdio_in": "0b0000000000000000", - "pdio_out": "PDIO3,PDIO4,PDIO5,PDIO6,PDIO7,PDIO8,PDIO9,PDIO10,PDIO11,PDIO12,PDIO13 (0b0001111111111100)", - "timestamp": "11 minutes 20.259323 seconds after power-on"} - ] -} diff --git a/platform/broadcom/sonic-platform-modules-nexthop/test/fixtures/mock_imports_unit_tests.py b/platform/broadcom/sonic-platform-modules-nexthop/test/fixtures/mock_imports_unit_tests.py index 86feef938a0..b0e77d317ac 100644 --- a/platform/broadcom/sonic-platform-modules-nexthop/test/fixtures/mock_imports_unit_tests.py +++ b/platform/broadcom/sonic-platform-modules-nexthop/test/fixtures/mock_imports_unit_tests.py @@ -12,7 +12,7 @@ import types -from unittest.mock import Mock +from unittest.mock import MagicMock, Mock from fixtures.fake_swsscommon import fake_swsscommon_modules @@ -59,24 +59,30 @@ def mock_syslog_modules(): class MockSysLogger: # Methods as mocks so tests can assert calls + log_notice = Mock() log_info = Mock() log_error = Mock() log_warning = Mock() log_debug = Mock() log = Mock() + logger = Mock() def __init__(self, *args, **kwargs): pass - syslogger = Mock() + syslogger = MagicMock() syslogger.SysLogger = MockSysLogger + + logger = MagicMock() + logger.Logger = MockSysLogger - syslog = Mock() + syslog = MagicMock() syslog.SYSLOG_IDENTIFIER_THERMAL = "nh_thermal" syslog.NhLoggerMixin = MockSysLogger return { "sonic_py_common.syslogger": syslogger, + "sonic_py_common.logger": logger, "sonic_platform.syslog": syslog, } @@ -114,6 +120,11 @@ def decorator(cls): led_control_base = Mock() led_control_base.LedControlBase = type("LedControlBase", (object,), {}) + interface_mock = Mock() + interface_mock.backplane_prefix.return_value = "Ethernet-BP" + interface_mock.inband_prefix.return_value = "Ethernet-IB" + interface_mock.recirc_prefix.return_value = "Ethernet-Rec" + return { "sonic_platform_base.sonic_thermal_control.thermal_json_object": thermal_json_object, "sonic_platform_base.sonic_thermal_control.thermal_info_base": thermal_info_base, @@ -122,6 +133,7 @@ def decorator(cls): "sonic_platform_base.watchdog_base": watchdog_base, "sonic_platform_pddf_base.pddf_thermal": pddf_thermal, "sonic_led.led_control_base": led_control_base, + "sonic_py_common.interface": interface_mock, } diff --git a/platform/broadcom/sonic-platform-modules-nexthop/test/fixtures/test_helpers_adm1266.py b/platform/broadcom/sonic-platform-modules-nexthop/test/fixtures/test_helpers_adm1266.py index bf0d9062b2f..44223b68775 100644 --- a/platform/broadcom/sonic-platform-modules-nexthop/test/fixtures/test_helpers_adm1266.py +++ b/platform/broadcom/sonic-platform-modules-nexthop/test/fixtures/test_helpers_adm1266.py @@ -10,223 +10,75 @@ for ADM1266 functionality. It helps avoid code duplication between test files. """ -import os -import tempfile - - -def process_input(json_file): - """Load a JSON test spec and return (blackbox_data, expected_records, expected_causes). - - The JSON must contain: - - hexdump_lines: array of hexdump lines (strings) - Optionally: - - expected_records: list[dict] of raw numeric expectations - - expected_causes: list[dict] of rendered string expectations - """ - import json - - def parse_hexdump_lines(lines): - bb = bytearray() - hexchars = set("0123456789abcdefABCDEF") - for line in lines: - for tok in line.split(): - if len(tok) == 2 and all(c in hexchars for c in tok): - bb.append(int(tok, 16)) - return bytes(bb) - - with open(json_file, "r") as f: - spec = json.load(f) - - if "hexdump_lines" not in spec: - raise ValueError("JSON must include hexdump_lines") - blackbox_data = parse_hexdump_lines(spec["hexdump_lines"]) - expected_records = spec.get("expected_blackbox_records") - expected_causes = spec.get("expected_reboot_causes") - - return blackbox_data, expected_records, expected_causes - - -class Adm1266TestMixin: - """ - Mixin class that provides ADM1266 test helper methods to test classes. - - Test classes can inherit from this mixin to get access to all the helper methods - as instance methods, which is convenient for test organization. - """ - - # Set up path to test PDDF plugin file - # Use absolute path in the container - TEST_PDDF_PATH = "/sonic/device/nexthop/x86_64-nexthop_5010-r0/pddf/pd-plugin.json" - - EXCERPT_PDDF_PLUGIN_DATA = { - "DPM": { - "dpm-mock": { - "dpm_signal_to_fault_cause": [ - { - "pdio_mask": "0x0001", - "gpio_mask": "0x0000", - "pdio_value": "0x0001", - "gpio_value": "0x0000", - "hw_cause": "PSU_VIN_LOSS", - "hw_desc": "Both PSUs lost input power", - "summary": "PSU input power lost", - "reboot_cause": "REBOOT_CAUSE_POWER_LOSS", - }, - { - "pdio_mask": "0x0002", - "gpio_mask": "0x0000", - "pdio_value": "0x0002", - "gpio_value": "0x0000", - "hw_cause": "OVER_TEMP", - "hw_desc": "Switch card temp sensor OT", - "summary": "Temperature exceeded threshold", - "reboot_cause": "REBOOT_CAUSE_THERMAL_OVERLOAD_OTHER", - }, - { - "pdio_mask": "0x0004", - "gpio_mask": "0x0000", - "pdio_value": "0x0004", - "gpio_value": "0x0000", - "hw_cause": "CPU_PWR_BAD", - "hw_desc": "CPU card power bad", - "summary": "CPU power failure", - "reboot_cause": "REBOOT_CAUSE_HARDWARE_OTHER", - }, - { - "pdio_mask": "0x0008", - "gpio_mask": "0x0000", - "pdio_value": "0x0008", - "gpio_value": "0x0000", - "hw_cause": "WATCHDOG", - "hw_desc": "FPGA watchdog expired", - "summary": "Watchdog timeout", - "reboot_cause": "REBOOT_CAUSE_WATCHDOG", - }, - { - "pdio_mask": "0x0010", - "gpio_mask": "0x0000", - "pdio_value": "0x0010", - "gpio_value": "0x0000", - "hw_cause": "ASIC_OT", - "hw_desc": "ASIC MAX_TEMP exceeded OT threshold", - "summary": "ASIC overtemperature", - "reboot_cause": "REBOOT_CAUSE_THERMAL_OVERLOAD_ASIC", - }, - { - "pdio_mask": "0x0020", - "gpio_mask": "0x0000", - "pdio_value": "0x0020", - "gpio_value": "0x0000", - "hw_cause": "NO_FAN_PRSNT", - "hw_desc": "All 4 fans have same ID=0xf", - "summary": "No fans present", - "reboot_cause": "REBOOT_CAUSE_HARDWARE_OTHER", - }, - { - "pdio_mask": "0x0040", - "gpio_mask": "0x0000", - "pdio_value": "0x0040", - "gpio_value": "0x0000", - "hw_cause": "CMD_PWR_CYC", - "hw_desc": "Software commanded power cycle", - "summary": "Software power cycle", - "reboot_cause": "REBOOT_CAUSE_POWER_LOSS", - }, - { - "pdio_mask": "0x0080", - "gpio_mask": "0x0000", - "pdio_value": "0x0080", - "gpio_value": "0x0000", - "hw_cause": "DP_PWR_ON", - "hw_desc": "P2 only: from shift chain; not used on P1", - "summary": "DP power on", - "reboot_cause": "REBOOT_CAUSE_POWER_LOSS", - }, - { - "pdio_mask": "0x0100", - "gpio_mask": "0x0000", - "pdio_value": "0x0100", - "gpio_value": "0x0000", - "hw_cause": "FPGA_CMD_PCYC", - "hw_desc": "FPGA commanded power cycle", - "summary": "FPGA power cycle", - "reboot_cause": "REBOOT_CAUSE_POWER_LOSS", - }, - { - "pdio_mask": "0x0200", - "gpio_mask": "0x0000", - "pdio_value": "0x0200", - "gpio_value": "0x0000", - "hw_cause": "CMD_ASIC_PWR_OFF", - "hw_desc": "FPGA command ASIC power off", - "summary": "ASIC power off", - "reboot_cause": "REBOOT_CAUSE_POWER_LOSS", - }, - ], - "vpx_to_rail_desc": { - "6": "POS0V75_S5", - "7": "POS1V8_S5", - "8": "POS3V3_S5", - "9": "POS1V1_S0", - "10": "POS0V78_S0", - "11": "POS0V75_S0", - "12": "POS1V8_S0", - "13": "POS3V3_S0", - }, - "vhx_to_rail_desc": {"5": "POS5V0_S0"}, - } - } - } - adm1266_platform_spec = None - - def setup_class(self): - # Load test data from JSON spec. - TEST_DIR = os.path.dirname(os.path.realpath(__file__)) - json_file = os.path.join(TEST_DIR, "adm1266_test_spec.json") - data, records, causes = process_input(json_file) - self.blackbox_input = data - self.expected_records = records - self.expected_causes = causes - - def setup_method(self): - # Prepare nvmem_path and pddf_plugin_data - nvmem_file = tempfile.NamedTemporaryFile(delete=False) - nvmem_file.write(self.blackbox_input) - nvmem_file.close() - self.nvmem_path = nvmem_file.name - self.pddf_plugin_data = self.EXCERPT_PDDF_PLUGIN_DATA - self.pddf_plugin_data["DPM"]["dpm-mock"]["nvmem_path"] = self.nvmem_path - - # Delayed initialization until runtime, when all dependencies are properly patched. - self.adm1266_platform_spec = None - - def teardown_method(self): - """Clean up temporary file""" - if self.nvmem_path and os.path.exists(self.nvmem_path): - os.unlink(self.nvmem_path) - - def get_nvmem_path(self): - return self.nvmem_path - - def get_blackbox_input(self): - return self.blackbox_input - - def get_expected_records(self): - return self.expected_records - - def get_expected_causes(self): - return self.expected_causes - - def get_pddf_plugin_data(self): - return self.pddf_plugin_data - - def get_fake_adm1266_platform_spec(self): - if self.adm1266_platform_spec is None: - # Do the import here, as all dependencies should already be patched at this point. - from sonic_platform.adm1266_platform_spec import Adm1266PlatformSpec - - self.adm1266_platform_spec = Adm1266PlatformSpec("dpm-mock", self.pddf_plugin_data) - return self.adm1266_platform_spec - - def get_test_pddf_path(self): - return self.TEST_PDDF_PATH +import datetime + +# This must match the value in adm1266.py +EXPECTED_CUSTOM_EPOCH = datetime.datetime(2024, 1, 1, tzinfo=datetime.timezone.utc) + + +def create_raw_adm1266_blackbox_record( + uid: int, + empty: bool = False, + action_index: int = 0, + rule_index: int = 0, + vh_ov: int = 0, + vh_uv: int = 0, + current_state: int = 9, + last_state: int = 8, + vp_ov: int = 0, + vp_uv: int = 0, + gpio_in: int = 0, + gpio_out: int = 0, + pdio_in: int = 0, + pdio_out: int = 0, + powerup_counter: int = 1, + timestamp: datetime.timedelta | datetime.datetime = datetime.timedelta(seconds=0), + crc: int = 0xFF, +) -> bytes: + """Returns a raw 64-byte blackbox record containing the given values.""" + record = bytearray(64) + record[0] = uid & 0xFF + record[1] = (uid >> 8) & 0xFF + record[2] = 0b1 if empty else 0b0 + record[3] = action_index & 0xFF + record[4] = rule_index & 0xFF + record[5] = (vh_ov & 0b1111) | ((vh_uv & 0b1111) << 4) + record[6] = current_state & 0xFF + record[7] = (current_state >> 8) & 0xFF + record[8] = last_state & 0xFF + record[9] = (last_state >> 8) & 0xFF + record[10] = vp_ov & 0xFF + record[11] = (vp_ov >> 8) & 0xFF + record[12] = vp_uv & 0xFF + record[13] = (vp_uv >> 8) & 0xFF + record[14] = gpio_in & 0xFF + record[15] = (gpio_in >> 8) & 0xFF + record[16] = gpio_out & 0xFF + record[17] = (gpio_out >> 8) & 0xFF + record[18] = pdio_in & 0xFF + record[19] = (pdio_in >> 8) & 0xFF + record[20] = pdio_out & 0xFF + record[21] = (pdio_out >> 8) & 0xFF + record[22] = powerup_counter & 0xFF + record[23] = (powerup_counter >> 8) & 0xFF + # Timestamp + if isinstance(timestamp, datetime.datetime): + assert timestamp >= EXPECTED_CUSTOM_EPOCH, f"Timestamp {timestamp} must be after {EXPECTED_CUSTOM_EPOCH}." + delta = timestamp - EXPECTED_CUSTOM_EPOCH + else: + delta = timestamp + seconds = int(delta.total_seconds()) + fraction = int(delta.microseconds / 1000000 * 65536) + record[24] = fraction & 0xFF + record[25] = (fraction >> 8) & 0xFF + record[26] = seconds & 0xFF + record[27] = (seconds >> 8) & 0xFF + record[28] = (seconds >> 16) & 0xFF + record[29] = (seconds >> 24) & 0xFF + record[30] = 0x0 + record[31] = 0x0 + # Reserved + record[32:] = b"\xff" * 32 + # CRC-8 + record[63] = crc & 0xFF + return bytes(record) diff --git a/platform/broadcom/sonic-platform-modules-nexthop/test/fixtures/test_helpers_chassis.py b/platform/broadcom/sonic-platform-modules-nexthop/test/fixtures/test_helpers_chassis.py index ddfe380078a..19b9e2c0a84 100644 --- a/platform/broadcom/sonic-platform-modules-nexthop/test/fixtures/test_helpers_chassis.py +++ b/platform/broadcom/sonic-platform-modules-nexthop/test/fixtures/test_helpers_chassis.py @@ -20,7 +20,7 @@ def dirs_of_led_ctrl_lock_path(): """Returns a list of directories that lead to LED_CTRL_LOCK_PATH. - FOR USED BY INTEGRATION TEST ONLY. + FOR USE BY INTEGRATION TEST ONLY. """ from sonic_platform_pddf_base.pddfapi import LED_CTRL_LOCK_PATH @@ -36,7 +36,7 @@ def dirs_of_led_ctrl_lock_path(): def setup_patch_for_chassis_init(pddf_plugin_data: dict): """A context manager helper to patch open() and os.path.exists() for Chassis.__init__(). - FOR USED BY INTEGRATION TEST ONLY. + FOR USE BY INTEGRATION TEST ONLY. """ original_open = open original_exists = os.path.exists diff --git a/platform/broadcom/sonic-platform-modules-nexthop/test/fixtures/test_helpers_common.py b/platform/broadcom/sonic-platform-modules-nexthop/test/fixtures/test_helpers_common.py index 197be2baf98..fa35ef7599d 100644 --- a/platform/broadcom/sonic-platform-modules-nexthop/test/fixtures/test_helpers_common.py +++ b/platform/broadcom/sonic-platform-modules-nexthop/test/fixtures/test_helpers_common.py @@ -8,8 +8,11 @@ This file provides common helpers that can be used across all test modules. """ +import os import sys +import tempfile +from contextlib import contextmanager from unittest.mock import Mock from fixtures.fake_swsscommon import FakeDBConnector, FakeFieldValuePairs, FakeTable @@ -51,3 +54,36 @@ def mock_data_in_swsscommon( for key, fvs in key_to_fvs.items(): fvs = [(k, v) for k, v in fvs.items()] table.set(key, FakeFieldValuePairs(fvs)) + + +@contextmanager +def temp_file(content: str | bytes, file_prefix: str = "", dir_prefix: str = "test."): + """ + Creates a temporary file, under a temporary directory. + + The temporary directory and file are deleted after the context manager exits. + + Args: + dir_prefix: prefix for the temporary directory. + content: content to write to the temporary file. + + Returns: + Path to the created file + """ + root = tempfile.mkdtemp(prefix=dir_prefix) + fd, filepath = tempfile.mkstemp(prefix=file_prefix, dir=root) + try: + if isinstance(content, str): + content = content.encode("utf-8") + os.write(fd, content) + os.close(fd) + + yield filepath + finally: + if os.path.exists(filepath): + os.remove(filepath) + try: + os.rmdir(root) + except OSError: + # Directory not empty; leave it + pass diff --git a/platform/broadcom/sonic-platform-modules-nexthop/test/integration/conftest.py b/platform/broadcom/sonic-platform-modules-nexthop/test/integration/conftest.py index 5214ad8a3e7..d3da10cd4b3 100644 --- a/platform/broadcom/sonic-platform-modules-nexthop/test/integration/conftest.py +++ b/platform/broadcom/sonic-platform-modules-nexthop/test/integration/conftest.py @@ -15,6 +15,9 @@ from unittest.mock import patch +from fixtures.mock_imports_unit_tests import mock_syslog_modules +from fixtures.fake_swsscommon import fake_swsscommon_modules + @pytest.fixture(scope="module", autouse=True) def patch_dependencies(): @@ -23,7 +26,14 @@ def patch_dependencies(): This fixture is automatically applied to all tests in the integration/ directory. It uses module scope, so it won't interfere with unit tests. """ + modules = {} + modules.update(mock_syslog_modules()) + modules.update(fake_swsscommon_modules()) + TEST_DIR = os.path.dirname(os.path.realpath(__file__)) + sonic_py_common = os.path.join( + TEST_DIR, "../../../../../src/sonic-py-common/" + ) sonic_platform_common = os.path.join( TEST_DIR, "../../../../../src/sonic-platform-common/" ) @@ -31,6 +41,7 @@ def patch_dependencies(): TEST_DIR, "../../../../../platform/pddf/platform-api-pddf-base" ) - with patch.object(sys, "path", [sonic_platform_common, pddf_base] + sys.path): - # Keep the patch active while integration tests are running - yield + with patch.dict(sys.modules, modules): + with patch.object(sys, "path", [sonic_py_common, sonic_platform_common, pddf_base] + sys.path): + # Keep the patch active while integration tests are running + yield diff --git a/platform/broadcom/sonic-platform-modules-nexthop/test/integration/nexthop/test_adm1266_chassis_integration.py b/platform/broadcom/sonic-platform-modules-nexthop/test/integration/nexthop/test_adm1266_chassis_integration.py deleted file mode 100644 index 79e1aa0cce8..00000000000 --- a/platform/broadcom/sonic-platform-modules-nexthop/test/integration/nexthop/test_adm1266_chassis_integration.py +++ /dev/null @@ -1,48 +0,0 @@ -#!/usr/bin/env python - -import pytest -import sys - -from fixtures.fake_swsscommon import fake_swsscommon_modules -from fixtures.mock_imports_unit_tests import mock_syslog_modules -from fixtures.test_helpers_adm1266 import Adm1266TestMixin -from fixtures.test_helpers_chassis import setup_patch_for_chassis_init -from unittest.mock import Mock, patch - - -@pytest.fixture(scope="module") -def mock_unimportant_modules(): - """Mock modules that aren't important for integration testing.""" - modules = {} - modules["sonic_py_common"] = Mock() - modules["sonic_platform.dpm"] = Mock() - modules["sonic_platform.dpm"].SystemDPMLogHistory = Mock() - modules.update(mock_syslog_modules()) - modules.update(fake_swsscommon_modules()) - - with patch.dict(sys.modules, modules): - yield - - -@pytest.fixture(scope="module") -def chassis_module(mock_unimportant_modules): - """Loads the module before all tests. This is to let conftest.py inject deps first.""" - from sonic_platform import chassis - - yield chassis - - -class TestAdm1266ChassisIntegration(Adm1266TestMixin): - """Integration tests for ADM1266 with chassis - reboot cause only.""" - - def test_chassis_get_reboot_cause(self, chassis_module): - # Given - with setup_patch_for_chassis_init(self.get_pddf_plugin_data()): - chassis = chassis_module.Chassis() - - # When - reboot_cause = chassis.get_reboot_cause() - - # Then - assert reboot_cause[0] == "Hardware - Other" - assert reboot_cause[1] == "" diff --git a/platform/broadcom/sonic-platform-modules-nexthop/test/integration/sonic_platform/test_chassis_sfp_integration.py b/platform/broadcom/sonic-platform-modules-nexthop/test/integration/sonic_platform/test_chassis_sfp_integration.py index 9698445f6bc..822a1f5de7d 100644 --- a/platform/broadcom/sonic-platform-modules-nexthop/test/integration/sonic_platform/test_chassis_sfp_integration.py +++ b/platform/broadcom/sonic-platform-modules-nexthop/test/integration/sonic_platform/test_chassis_sfp_integration.py @@ -20,18 +20,7 @@ @pytest.fixture(scope="module") -def mock_unimportant_modules(): - """Mock modules that aren't important for integration testing.""" - modules = {} - modules.update(mock_syslog_modules()) - modules.update(fake_swsscommon_modules()) - - with patch.dict(sys.modules, modules): - yield - - -@pytest.fixture(scope="module") -def chassis_module(mock_unimportant_modules): +def chassis_module(): """Loads the module before all tests. This is to let conftest.py inject deps first.""" from sonic_platform import chassis @@ -39,7 +28,7 @@ def chassis_module(mock_unimportant_modules): @pytest.fixture(scope="module") -def mock_sfps(mock_unimportant_modules): +def mock_sfps(): """ Fixture providing autospec'ed mock SFP objects for testing. Creates a list of mock SFPs and attaches them to the chassis. @@ -116,21 +105,22 @@ class TestChassisSfpIntegration: """Test class for Chassis and SFP events functionality.""" def test_get_change_event_initial_state(self, chassis_module, mock_sfps): - """Test initial SFP change event detection.""" + """Test that initial call to get_change_event() returns no events (initializes cache only).""" sfp_test_helper = SfpTestHelper() with setup_patch_for_chassis_init(pddf_plugin_data={}): chassis = chassis_module.Chassis() chassis._sfp_list = mock_sfps - # Initial call test - expect change in all SFPs + # Set initial state inserted_sfps = mock_sfps[0 : NUM_TEST_SFPS // 2] removed_sfps = mock_sfps[NUM_TEST_SFPS // 2 :] sfp_test_helper.update_state(inserted_sfps, XCVR_INSERTED) sfp_test_helper.update_state(removed_sfps, XCVR_REMOVED) - result = chassis.get_change_event() - expected = sfp_test_helper.get_change_events() + # First call should return no events (just initializes cache) + result = chassis.get_change_event(timeout=100) + expected = (True, {"sfp": {}}) # Empty events on first call assert result == expected @@ -143,8 +133,8 @@ def test_get_change_event_no_change_short_timeout(self, chassis_module, mock_sfp # Set initial state sfp_test_helper.update_state(mock_sfps, XCVR_INSERTED) - chassis.get_change_event() # Clear initial events - sfp_test_helper.get_change_events() # Clear helper events + chassis.get_change_event(timeout=100) # First call initializes cache (returns empty) + sfp_test_helper.clear_events() # Clear events from initialization # Small timeout test - no change result = chassis.get_change_event(timeout=1) @@ -161,8 +151,8 @@ def test_get_change_event_no_change_long_timeout(self, chassis_module, mock_sfps # Set initial state sfp_test_helper.update_state(mock_sfps, XCVR_INSERTED) - chassis.get_change_event() # Clear initial events - sfp_test_helper.get_change_events() # Clear helper events + chassis.get_change_event(timeout=100) # First call initializes cache (returns empty) + sfp_test_helper.clear_events() # Clear events from initialization # Large timeout test - no change (mock time to avoid actual waiting) start_time = time.monotonic() @@ -186,8 +176,8 @@ def test_get_change_event_partial_change(self, chassis_module, mock_sfps): sfp_test_helper.update_state(inserted_sfps, XCVR_INSERTED) sfp_test_helper.update_state(removed_sfps, XCVR_REMOVED) - chassis.get_change_event() # Clear initial events - sfp_test_helper.get_change_events() # Clear helper events + chassis.get_change_event(timeout=100) # First call initializes cache (returns empty) + sfp_test_helper.clear_events() # Clear events from initialization # Final change test - a subset of SFPs sfp_test_helper.update_state(inserted_sfps[0 : NUM_TEST_SFPS // 4], XCVR_REMOVED) @@ -199,12 +189,17 @@ def test_get_change_event_partial_change(self, chassis_module, mock_sfps): assert result == expected def test_get_change_event_all_inserted(self, chassis_module, mock_sfps): - """Test change event when all SFPs are inserted.""" + """Test change event when all SFPs are inserted after initialization.""" sfp_test_helper = SfpTestHelper() with setup_patch_for_chassis_init(pddf_plugin_data={}): chassis = chassis_module.Chassis() chassis._sfp_list = mock_sfps + # Start with all removed + sfp_test_helper.set_all_removed(mock_sfps) + chassis.get_change_event(timeout=100) # First call initializes cache (returns empty) + + # Now insert all SFPs sfp_test_helper.set_all_inserted(mock_sfps) result = chassis.get_change_event() expected = sfp_test_helper.get_change_events() @@ -212,12 +207,17 @@ def test_get_change_event_all_inserted(self, chassis_module, mock_sfps): assert result == expected def test_get_change_event_all_removed(self, chassis_module, mock_sfps): - """Test change event when all SFPs are removed.""" + """Test change event when all SFPs are removed after initialization.""" sfp_test_helper = SfpTestHelper() with setup_patch_for_chassis_init(pddf_plugin_data={}): chassis = chassis_module.Chassis() chassis._sfp_list = mock_sfps + # Start with all inserted + sfp_test_helper.set_all_inserted(mock_sfps) + chassis.get_change_event(timeout=100) # First call initializes cache (returns empty) + + # Now remove all SFPs sfp_test_helper.set_all_removed(mock_sfps) result = chassis.get_change_event() expected = sfp_test_helper.get_change_events() diff --git a/platform/broadcom/sonic-platform-modules-nexthop/test/unit/nexthop/test_fpga_cli.py b/platform/broadcom/sonic-platform-modules-nexthop/test/unit/nexthop/test_fpga_cli.py index 8c8bad7a486..5f65f081c9c 100644 --- a/platform/broadcom/sonic-platform-modules-nexthop/test/unit/nexthop/test_fpga_cli.py +++ b/platform/broadcom/sonic-platform-modules-nexthop/test/unit/nexthop/test_fpga_cli.py @@ -188,4 +188,91 @@ def test_echo_available_fpgas(fpga_cli_module, monkeypatch, capsys): assert "NAME" in captured.out assert "PCIe ADDRESS" in captured.out assert fpga_cli_module.bdf_to_name("0000:30:00.0") == "CPUCARD_FPGA" - assert fpga_cli_module.bdf_to_name("0000:e4:00.0") == "SWITCHCARD_FPGA" \ No newline at end of file + assert fpga_cli_module.bdf_to_name("0000:e4:00.0") == "SWITCHCARD_FPGA" + + +def test_dump_single_fpga(fpga_cli_module, monkeypatch): + """Test dump command with a single FPGA""" + def mock_dump(pci_addr): + return [(0x0, 0x0, 0xDEADBEEF), (0x4, 0x4, 0xCAFEBABE)] + + monkeypatch.setattr("nexthop.fpga_cli.find_xilinx_fpgas", lambda: ["0000:e4:00.0"]) + monkeypatch.setattr("nexthop.fpga_cli.name_to_bdf", lambda name: "0000:e4:00.0" if name == "SWITCHCARD_FPGA" else None) + monkeypatch.setattr("nexthop.fpga_cli.dump_resource0", mock_dump) + monkeypatch.setattr("nexthop.fpga_cli.load_pddf_device_config", lambda: {}) + monkeypatch.setattr("nexthop.fpga_cli.bdf_to_name", lambda bdf, cfg=None: "SWITCHCARD_FPGA") + + runner = CliRunner() + result = runner.invoke(fpga_cli_module.dump, ["SWITCHCARD_FPGA"]) + + assert result.exit_code == 0 + assert "SWITCHCARD_FPGA" in result.output + assert "0000:e4:00.0" in result.output + assert "0xdeadbeef" in result.output + + +def test_dump_all_fpgas(fpga_cli_module, monkeypatch): + """Test dump command with --all flag""" + def mock_dump(pci_addr): + if pci_addr == "0000:e3:00.0": + return [(0x0, 0x0, 0x11111111)] + else: + return [(0x0, 0x0, 0x22222222)] + + monkeypatch.setattr("nexthop.fpga_cli.find_xilinx_fpgas", lambda: ["0000:e3:00.0", "0000:e4:00.0"]) + monkeypatch.setattr("nexthop.fpga_cli.dump_resource0", mock_dump) + monkeypatch.setattr("nexthop.fpga_cli.load_pddf_device_config", lambda: {}) + monkeypatch.setattr("nexthop.fpga_cli.bdf_to_name", lambda bdf, cfg=None: None) + + runner = CliRunner() + result = runner.invoke(fpga_cli_module.dump, ["--all"]) + + assert result.exit_code == 0 + assert "0000:e3:00.0" in result.output + assert "0000:e4:00.0" in result.output + assert "0x11111111" in result.output + assert "0x22222222" in result.output + + + + + +def test_dump_no_fpga_specified(fpga_cli_module, monkeypatch): + """Test dump command without FPGA or --all flag""" + monkeypatch.setattr("nexthop.fpga_cli.find_xilinx_fpgas", lambda: ["0000:e4:00.0"]) + + runner = CliRunner() + result = runner.invoke(fpga_cli_module.dump, []) + + assert result.exit_code == 1 + assert "Must specify either TARGET_FPGA or --all" in result.output + + +def test_dump_no_fpgas_found(fpga_cli_module, monkeypatch): + """Test dump command when no FPGAs are found""" + monkeypatch.setattr("nexthop.fpga_cli.find_xilinx_fpgas", lambda: []) + + runner = CliRunner() + result = runner.invoke(fpga_cli_module.dump, ["--all"]) + + assert result.exit_code == 1 + assert "No FPGAs found" in result.output + + +def test_dump_with_fpga_name(fpga_cli_module, monkeypatch): + """Test dump command using FPGA name instead of PCI address""" + def mock_dump(pci_addr): + return [(0x0, 0x0, 0xCAFEBABE)] + + monkeypatch.setattr("nexthop.fpga_cli.find_xilinx_fpgas", lambda: ["0000:e3:00.0"]) + monkeypatch.setattr("nexthop.fpga_cli.name_to_bdf", lambda name: "0000:e3:00.0" if name == "CPU_CARD_FPGA" else None) + monkeypatch.setattr("nexthop.fpga_cli.dump_resource0", mock_dump) + monkeypatch.setattr("nexthop.fpga_cli.load_pddf_device_config", lambda: {}) + monkeypatch.setattr("nexthop.fpga_cli.bdf_to_name", lambda bdf, cfg=None: "CPU_CARD_FPGA") + + runner = CliRunner() + result = runner.invoke(fpga_cli_module.dump, ["CPU_CARD_FPGA"]) + + assert result.exit_code == 0 + assert "CPU_CARD_FPGA" in result.output + assert "0xcafebabe" in result.output diff --git a/platform/broadcom/sonic-platform-modules-nexthop/test/unit/nexthop/test_fpga_lib.py b/platform/broadcom/sonic-platform-modules-nexthop/test/unit/nexthop/test_fpga_lib.py index 0ae831e8064..3fb660cb0df 100644 --- a/platform/broadcom/sonic-platform-modules-nexthop/test/unit/nexthop/test_fpga_lib.py +++ b/platform/broadcom/sonic-platform-modules-nexthop/test/unit/nexthop/test_fpga_lib.py @@ -231,3 +231,52 @@ def test_overwrite_field_raises_when_value_exceed_bit_range(fpga_lib_module): match=r"field_value \(0xff\) must be smaller than or equal to \(0x1f\)", ): fpga_lib_module.overwrite_field(0xFFFFFFFF, (0, 4), field_val=0xFF) + + +def test_dump_resource0_basic(fpga_lib_module): + """Test basic dump_resource0 functionality""" + with tempfile.TemporaryDirectory(prefix="test_fpga_lib.") as root: + pci_address = "0000:e4:00.0" + create_fake_resource0(fpga_lib_module, pci_address, root) + + fpga_lib_module.write_32(pci_address, offset=0x0, val=0xDEADBEEF, root=root) + fpga_lib_module.write_32(pci_address, offset=0x4, val=0xCAFEBABE, root=root) + fpga_lib_module.write_32(pci_address, offset=0x8, val=0x12345678, root=root) + + ranges = fpga_lib_module.dump_resource0(pci_address, root=root) + + assert len(ranges) == 4 + assert ranges[0] == (0x0, 0x0, 0xDEADBEEF) + assert ranges[1] == (0x4, 0x4, 0xCAFEBABE) + assert ranges[2] == (0x8, 0x8, 0x12345678) + assert ranges[3] == (0xC, 0xFFFFC, 0x00000000) + + +def test_dump_resource0_nonexistent_file(fpga_lib_module): + """Test dump_resource0 with non-existent resource0 file""" + with tempfile.TemporaryDirectory(prefix="test_fpga_lib.") as root: + pci_address = "0000:e4:00.0" + + with pytest.raises(FileNotFoundError, match="does not exist"): + fpga_lib_module.dump_resource0(pci_address, root=root) + + +def test_dump_resource0_range_collapsing(fpga_lib_module): + """Test that repeated values are collapsed into ranges""" + with tempfile.TemporaryDirectory(prefix="test_fpga_lib.") as root: + pci_address = "0000:e4:00.0" + create_fake_resource0(fpga_lib_module, pci_address, root) + + fpga_lib_module.write_32(pci_address, offset=0x0, val=0xDEADBEEF, root=root) + fpga_lib_module.write_32(pci_address, offset=0x4, val=0xAAAAAAAA, root=root) + fpga_lib_module.write_32(pci_address, offset=0x8, val=0xAAAAAAAA, root=root) + fpga_lib_module.write_32(pci_address, offset=0xC, val=0xAAAAAAAA, root=root) + fpga_lib_module.write_32(pci_address, offset=0x10, val=0xBBBBBBBB, root=root) + + ranges = fpga_lib_module.dump_resource0(pci_address, root=root) + + assert len(ranges) == 4 + assert ranges[0] == (0x0, 0x0, 0xDEADBEEF) + assert ranges[1] == (0x4, 0xC, 0xAAAAAAAA) + assert ranges[2] == (0x10, 0x10, 0xBBBBBBBB) + assert ranges[3] == (0x14, 0xFFFFC, 0x00000000) diff --git a/platform/broadcom/sonic-platform-modules-nexthop/test/unit/nexthop/test_pcie_lib.py b/platform/broadcom/sonic-platform-modules-nexthop/test/unit/nexthop/test_pcie_lib.py new file mode 100644 index 00000000000..8df3c13746e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-nexthop/test/unit/nexthop/test_pcie_lib.py @@ -0,0 +1,119 @@ +#!/usr/bin/env python + +# Copyright 2025 Nexthop Systems Inc. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 + +import textwrap +import tempfile +import pytest + + +@pytest.fixture(scope="function", autouse=True) +def pcie_lib_module(): + """Loads the module before each test. This is to let conftest.py inject deps first.""" + from nexthop import pcie_lib + + yield pcie_lib + + +class TestPcieLib: + INPUT_PCIE_VARIABLES = textwrap.dedent( + """ + - name: "cpu_card_fpga_bdf" + lookup_command: "echo 0000:03:00.0" + + - name: "switchcard_fpga_bdf" + lookup_command: "echo 0000:04:00.0" + + - name: "foo_var" + lookup_command: "echo 'foo'" + """ + ) + + @pytest.fixture + def tmp_pcie_variables_yml_file(self): + with tempfile.NamedTemporaryFile(mode="w+t") as f: + f.write(self.INPUT_PCIE_VARIABLES) + f.flush() + yield f.name + + def test_get_var_name_to_cmd_map(self, pcie_lib_module, tmp_pcie_variables_yml_file): + result = pcie_lib_module.get_var_name_to_cmd_map(tmp_pcie_variables_yml_file) + assert result == { + "cpu_card_fpga_bdf": "echo 0000:03:00.0", + "switchcard_fpga_bdf": "echo 0000:04:00.0", + "foo_var": "echo 'foo'", + } + + def test_get_pcie_variables(self, pcie_lib_module, tmp_pcie_variables_yml_file): + result = pcie_lib_module.get_pcie_variables(tmp_pcie_variables_yml_file) + assert result == { + "cpu_card_fpga_bdf": "0000:03:00.0", + "switchcard_fpga_bdf": "0000:04:00.0", + "foo_var": "foo", + } + + def test_get_pcie_variables_with_vars_to_get( + self, pcie_lib_module, tmp_pcie_variables_yml_file + ): + result = pcie_lib_module.get_pcie_variables( + tmp_pcie_variables_yml_file, vars_to_get={"cpu_card_fpga_bdf", "foo_var"} + ) + assert result == { + "cpu_card_fpga_bdf": "0000:03:00.0", + "foo_var": "foo", + } + + def test_get_pcie_variables_with_empty_vars_to_get( + self, pcie_lib_module, tmp_pcie_variables_yml_file + ): + result = pcie_lib_module.get_pcie_variables(tmp_pcie_variables_yml_file, vars_to_get={}) + assert result == {} + + def test_get_cpu_card_fpga_bdf(self, pcie_lib_module, tmp_pcie_variables_yml_file): + result = pcie_lib_module.get_cpu_card_fpga_bdf(tmp_pcie_variables_yml_file) + assert result == "0000:03:00.0" + + def test_get_switchcard_fpga_bdf(self, pcie_lib_module, tmp_pcie_variables_yml_file): + result = pcie_lib_module.get_switchcard_fpga_bdf(tmp_pcie_variables_yml_file) + assert result == "0000:04:00.0" + + +@pytest.mark.parametrize( + "input_yaml", + [ + pytest.param( + """ + - name: "cpu_card_fpga_bdf" + lookup_command: "echo 0000:03:00.0" + - name: "switchcard_fpga_bdf" + """, + id="missing_lookup_command", + ), + pytest.param( + """ + - name: "cpu_card_fpga_bdf" + lookup_command: "echo 0000:03:00.0" + - lookup_command: "echo 0000:04:00.0" + """, + id="missing_name", + ), + pytest.param( + """ + - name: "cpu_card_fpga_bdf" + lookup_command: "echo 0000:03:00.0" + - name: "cpu_card_fpga_bdf" + lookup_command: "echo 0000:04:00.0" + """, + id="duplicate_name", + ), + ], +) +def test_get_var_name_to_cmd_map_raises_on_invalid_yaml(pcie_lib_module, input_yaml): + """Verifies that improper YAML structures trigger a SystemExit.""" + yaml_content = textwrap.dedent(input_yaml) + with tempfile.NamedTemporaryFile(mode="w+t") as f: + f.write(yaml_content) + f.flush() + with pytest.raises(Exception): + pcie_lib_module.get_var_name_to_cmd_map(f.name) diff --git a/platform/broadcom/sonic-platform-modules-nexthop/test/unit/nexthop/test_pddf_config_parser.py b/platform/broadcom/sonic-platform-modules-nexthop/test/unit/nexthop/test_pddf_config_parser.py index c51cc86dc16..1b364637b27 100644 --- a/platform/broadcom/sonic-platform-modules-nexthop/test/unit/nexthop/test_pddf_config_parser.py +++ b/platform/broadcom/sonic-platform-modules-nexthop/test/unit/nexthop/test_pddf_config_parser.py @@ -7,11 +7,10 @@ Unit tests for the pddf_config_parser module. """ -import sys import os +import jinja2 import json import pytest -from unittest.mock import MagicMock @pytest.fixture(scope="function", autouse=True) @@ -21,12 +20,6 @@ def pddf_config_parser_module(): yield pddf_config_parser -# Mock sonic_py_common if not available -try: - import sonic_py_common -except ImportError: - sys.modules["sonic_py_common"] = MagicMock() - sys.modules["sonic_py_common.logger"] = MagicMock() CWD = os.path.dirname(os.path.realpath(__file__)) BASE_PLATFORM_PDDF_PATH = "../../../../../../device/nexthop/{}/pddf" @@ -47,6 +40,12 @@ def find_pddf_device_json(platform_variant): return fallback_path +def parse_json(template_string: str, envs: dict[str, ...]) -> dict[str, ...]: + env = jinja2.Environment() + rendered = env.from_string(template_string).render(envs) + return json.loads(rendered) + + class TestExtractXcvrList: """Test class for 'extract_xcvr_list' function.""" @@ -223,7 +222,7 @@ def test_extract_xcvr_list_empty_config(self, pddf_config_parser_module): @pytest.mark.parametrize( "platform_variant", - ["x86_64-nexthop_4010-r0", "x86_64-nexthop_4010-r1"], + ["x86_64-nexthop_4010-r0", "x86_64-nexthop_4010-r1", "x86_64-nexthop_4020-r0"], ) def test_extract_xcvr_list_real_40x0_config(self, pddf_config_parser_module, platform_variant): """Test extract_xcvr_list with real NH-40x0 pddf-device.json configuration.""" @@ -232,7 +231,7 @@ def test_extract_xcvr_list_real_40x0_config(self, pddf_config_parser_module, pla # Load the real configuration with open(config_path, "r") as f: - config = json.load(f) + config = parse_json(f.read(), {"platform": platform_variant}) # When xcvr_list = pddf_config_parser_module.extract_xcvr_list(config) @@ -257,11 +256,12 @@ def test_extract_xcvr_list_real_40x0_config(self, pddf_config_parser_module, pla def test_extract_xcvr_list_real_4220_config(self, pddf_config_parser_module): """Test extract_xcvr_list with real NH-4220 pddf-device.json configuration.""" # Path to the real pddf-device.json file - config_path = find_pddf_device_json("x86_64-nexthop_4220-r0") + platform_variant = "x86_64-nexthop_4220-r0" + config_path = find_pddf_device_json(platform_variant) # Load the real configuration with open(config_path, "r") as f: - config = json.load(f) + config = parse_json(f.read(), {"platform": platform_variant}) # When xcvr_list = pddf_config_parser_module.extract_xcvr_list(config) @@ -286,11 +286,12 @@ def test_extract_xcvr_list_real_4220_config(self, pddf_config_parser_module): def test_extract_xcvr_list_real_5010_config(self, pddf_config_parser_module): """Test extract_xcvr_list with real NH-5010 pddf-device.json configuration.""" # Path to the real pddf-device.json file - config_path = find_pddf_device_json("x86_64-nexthop_5010-r0") + platform_variant = "x86_64-nexthop_5010-r0" + config_path = find_pddf_device_json(platform_variant) # Load the real configuration with open(config_path, "r") as f: - config = json.load(f) + config = parse_json(f.read(), {"platform": platform_variant}) # When xcvr_list = pddf_config_parser_module.extract_xcvr_list(config) @@ -324,6 +325,7 @@ def setup(self, pddf_config_parser_module): self.FPGA_TYPES = ( pddf_config_parser_module.FpgaDeviceName.CPU_CARD.value, pddf_config_parser_module.FpgaDeviceName.SWITCHCARD.value, + pddf_config_parser_module.FpgaDeviceName.SWITCHCARD_0.value, ) def test_extract_fpga_attrs_malformed_config(self, pddf_config_parser_module): @@ -360,6 +362,8 @@ def test_extract_fpga_attrs_malformed_config(self, pddf_config_parser_module): [ "x86_64-nexthop_4010-r0", "x86_64-nexthop_4010-r1", + "x86_64-nexthop_4020-r0", + "x86_64-nexthop_4220-r0", "x86_64-nexthop_5010-r0", ], ) @@ -370,7 +374,7 @@ def test_extract_fpga_attrs(self, pddf_config_parser_module, platform_variant): # Load the real configuration with open(config_path, "r") as f: - config = json.load(f) + config = parse_json(f.read(), {"platform": platform_variant}) # When fpga_attrs = pddf_config_parser_module.extract_fpga_attrs(config, self.FPGA_TYPES) @@ -386,3 +390,29 @@ def test_extract_fpga_attrs(self, pddf_config_parser_module, platform_variant): pwr_cycle_enable_word=0xDEADBEEF, ), } + + def test_extract_fpga_attrs_nexthop_4210(self, pddf_config_parser_module): + """Test extract_fpga_attrs with real NH-4210 pddf-device.json configuration. + + NH-4210 (Sea Eagle) uses SWITCHCARD_FPGA0 / SWITCHCARD_FPGA1 instead of + SWITCHCARD_FPGA. Only SWITCHCARD_FPGA0 controls the power cycle. + """ + platform_variant = "x86_64-nexthop_4210-r0021" + config_path = find_pddf_device_json(platform_variant) + + with open(config_path, "r") as f: + config = parse_json(f.read(), {"platform": platform_variant}) + + fpga_attrs = pddf_config_parser_module.extract_fpga_attrs(config, self.FPGA_TYPES) + + assert pddf_config_parser_module.FpgaDeviceName.SWITCHCARD.value not in fpga_attrs + assert fpga_attrs == { + pddf_config_parser_module.FpgaDeviceName.CPU_CARD.value: pddf_config_parser_module.FpgaDevAttrs( + pwr_cycle_reg_offset=0x8, + pwr_cycle_enable_word=0xDEADBEEF, + ), + pddf_config_parser_module.FpgaDeviceName.SWITCHCARD_0.value: pddf_config_parser_module.FpgaDevAttrs( + pwr_cycle_reg_offset=0x4, + pwr_cycle_enable_word=0xDEADBEEF, + ), + } diff --git a/platform/broadcom/sonic-platform-modules-nexthop/test/unit/sonic_platform/test_adm1266.py b/platform/broadcom/sonic-platform-modules-nexthop/test/unit/sonic_platform/test_adm1266.py index 2770c87f4b7..e0229a455b8 100644 --- a/platform/broadcom/sonic-platform-modules-nexthop/test/unit/sonic_platform/test_adm1266.py +++ b/platform/broadcom/sonic-platform-modules-nexthop/test/unit/sonic_platform/test_adm1266.py @@ -1,270 +1,688 @@ #!/usr/bin/env python +import datetime import pytest -import sys -from unittest.mock import Mock, patch -from fixtures.test_helpers_adm1266 import Adm1266TestMixin +import textwrap +from fixtures import test_helpers_adm1266 +from fixtures.test_helpers_adm1266 import create_raw_adm1266_blackbox_record +from fixtures.test_helpers_common import temp_file -@pytest.fixture -def mock_dpm(): - """Injects and returns a mock DPM module for testing.""" - dpm_mock = Mock() - dpm_mock.save = Mock() - with patch.dict(sys.modules, {"sonic_platform.dpm": dpm_mock}): - yield dpm_mock + +UNIX_EPOCH = datetime.datetime.fromtimestamp(0, tz=datetime.timezone.utc) @pytest.fixture -def adm1266_module(mock_dpm): - """Injects and returns a mock ADM1266 module for testing.""" +def adm1266_module(): + """Loads the module before each test. This is to let conftest.py run first.""" from sonic_platform import adm1266 yield adm1266 -PSU_VIN_LOSS_PDIO_MASK_AND_VALUE = 0x0001 -OVER_TEMP_PDIO_MASK_AND_VALUE=0x0002 - -class TestAdm1266Basic(Adm1266TestMixin): - """Test ADM1266 basic properties and interface.""" - def test_read_blackbox(self, adm1266_module): - """Test read_blackbox method""" - - blackbox_input = self.get_blackbox_input() - - adm = adm1266_module.Adm1266(self.get_fake_adm1266_platform_spec()) - - print("\n--- Testing read_blackbox ---") - blackbox_data = adm.read_blackbox() - assert len(blackbox_data) == len(blackbox_input), \ - "Size mismatch: {len(blackbox_data)} != {len(blackbox_input)}" - assert blackbox_data == blackbox_input, "Blackbox Data mismatch" - print(" Passed") - - def test_parse_blackbox(self, adm1266_module): - """Test parse_blackbox method""" - print("\n--- Testing parse_blackbox ---") - expected_records = self.get_expected_records() - - adm = adm1266_module.Adm1266(self.get_fake_adm1266_platform_spec()) - - blackbox_data = adm.read_blackbox() - faults = adm._parse_blackbox(blackbox_data) - exp = expected_records - assert exp is not None, "expected_records not provided" - assert len(faults) == len(exp), f"Fault count mismatch: {len(faults)} != {len(exp)}" - for i, e in enumerate(exp): - a = faults[i] - for k, v in e.items(): - ak = 'uid' if k == 'fault_uid' else k - assert ak in a, f"[{i}] missing '{ak}' in parsed fault" - assert a[ak] == v, f"[{i}] {ak} mismatch: {a[ak]} != {v}" - print(" Passed") - - def test_get_blackbox_records(self, adm1266_module): - """Integration test for Adm1266.get_blackbox_records with optional JSON expectations.""" - print("\n--- Testing get_blackbox_records ---") - expected_records = self.get_expected_records() - - adm = adm1266_module.Adm1266(self.get_fake_adm1266_platform_spec()) - - records = adm.get_blackbox_records() - assert len(records) == len(expected_records),\ - f"Count mismatch: {len(records)} != {len(expected_records)}" - - for i, exp in enumerate(expected_records): - a = records[i] - for k, v in exp.items(): - assert k in a, f"[{i}] missing '{k}'" - assert a[k] == v, f"[{i}] {k}: {a[k]} != {v}" - print(" Passed") - - def test_get_reboot_causes(self, adm1266_module): - """Test Adm1266.get_blackbox_records by comparing with expected records. - - We use expected_records to validate the blackbox record parsing functionality. - """ - print("\n--- Testing get_blackbox_records ---") - - expected_records = self.get_expected_records() +class TestAdm1266BlackBoxRecord: + """Test class for Adm1266BlackBoxRecord functionality.""" + + def test_custom_epoch_in_adm1266_matches_expected(self, adm1266_module): + # To make sure the test is not broken by a change in the custom epoch. + assert adm1266_module.CUSTOM_EPOCH == test_helpers_adm1266.EXPECTED_CUSTOM_EPOCH + + def test_from_bytes(self, adm1266_module): + # Given + raw_bytes = create_raw_adm1266_blackbox_record( + uid=1234, + empty=False, + vh_ov=0b0101, # VH3, VH1 + vh_uv=0b1010, # VH4, VH2 + current_state=9, + last_state=8, + vp_ov=0b1_0011_0011_0011, # VP13, VP10, VP9, VP6, VP5, VP2, VP1 + vp_uv=0b0_1100_1100_1100, # VP12, VP11, VP8, VP7, VP4, VP3 + gpio_in=0b1100_1100_0001, # GPI7, GPI6, GPI9, GPI8, GPI1 + gpio_out=0b0011_0000_0110, # GPO5, GPO4, GPO3, GPO2 + pdio_in=0b0000_0000_0000_0000, + pdio_out=0b1111_1111_1111_1111, # PDO16-1 + powerup_counter=456, + timestamp=datetime.timedelta(seconds=1234), + crc=0xAB, + ) + + # When + record = adm1266_module.Adm1266BlackBoxRecord.from_bytes( + raw_bytes, + "test-dpm", + ) + + # Then + assert record.uid == 1234 + assert record.vh_over_voltage.pins == [ + adm1266_module.Pin(adm1266_module.PinName.VH3), + adm1266_module.Pin(adm1266_module.PinName.VH1), + ] + assert record.vh_under_voltage.pins == [ + adm1266_module.Pin(adm1266_module.PinName.VH4), + adm1266_module.Pin(adm1266_module.PinName.VH2), + ] + assert record.current_state == 9 + assert record.last_state == 8 + assert record.vp_over_voltage.pins == [ + adm1266_module.Pin(adm1266_module.PinName.VP13), + adm1266_module.Pin(adm1266_module.PinName.VP10), + adm1266_module.Pin(adm1266_module.PinName.VP9), + adm1266_module.Pin(adm1266_module.PinName.VP6), + adm1266_module.Pin(adm1266_module.PinName.VP5), + adm1266_module.Pin(adm1266_module.PinName.VP2), + adm1266_module.Pin(adm1266_module.PinName.VP1), + ] + assert record.vp_under_voltage.pins == [ + adm1266_module.Pin(adm1266_module.PinName.VP12), + adm1266_module.Pin(adm1266_module.PinName.VP11), + adm1266_module.Pin(adm1266_module.PinName.VP8), + adm1266_module.Pin(adm1266_module.PinName.VP7), + adm1266_module.Pin(adm1266_module.PinName.VP4), + adm1266_module.Pin(adm1266_module.PinName.VP3), + ] + assert record.gpio_in.pins == [ + adm1266_module.Pin(adm1266_module.PinName.GPI7), + adm1266_module.Pin(adm1266_module.PinName.GPI6), + adm1266_module.Pin(adm1266_module.PinName.GPI9), + adm1266_module.Pin(adm1266_module.PinName.GPI8), + adm1266_module.Pin(adm1266_module.PinName.GPI1), + ] + assert record.gpio_out.pins == [ + adm1266_module.Pin(adm1266_module.PinName.GPO5), + adm1266_module.Pin(adm1266_module.PinName.GPO4), + adm1266_module.Pin(adm1266_module.PinName.GPO3), + adm1266_module.Pin(adm1266_module.PinName.GPO2), + ] + assert record.pdio_in.pins == [] + assert record.pdio_out.pins == [ + adm1266_module.Pin(adm1266_module.PinName.PDO16), + adm1266_module.Pin(adm1266_module.PinName.PDO15), + adm1266_module.Pin(adm1266_module.PinName.PDO14), + adm1266_module.Pin(adm1266_module.PinName.PDO13), + adm1266_module.Pin(adm1266_module.PinName.PDO12), + adm1266_module.Pin(adm1266_module.PinName.PDO11), + adm1266_module.Pin(adm1266_module.PinName.PDO10), + adm1266_module.Pin(adm1266_module.PinName.PDO9), + adm1266_module.Pin(adm1266_module.PinName.PDO8), + adm1266_module.Pin(adm1266_module.PinName.PDO7), + adm1266_module.Pin(adm1266_module.PinName.PDO6), + adm1266_module.Pin(adm1266_module.PinName.PDO5), + adm1266_module.Pin(adm1266_module.PinName.PDO4), + adm1266_module.Pin(adm1266_module.PinName.PDO3), + adm1266_module.Pin(adm1266_module.PinName.PDO2), + adm1266_module.Pin(adm1266_module.PinName.PDO1), + ] + assert record.powerup_counter == 456 + assert record.timestamp == datetime.timedelta(seconds=1234) + assert record.crc == 0xAB + assert record.raw == raw_bytes + assert record.dpm_name == "test-dpm" + + def test_from_bytes_with_custom_epoch_timestamp(self, adm1266_module): + # Given + TIMESTAMP = datetime.datetime(2025, 10, 20, 11, 25, 30, tzinfo=datetime.timezone.utc) + raw_bytes = create_raw_adm1266_blackbox_record( + uid=1234, + timestamp=TIMESTAMP, + ) + # When + record = adm1266_module.Adm1266BlackBoxRecord.from_bytes(raw_bytes, "test-dpm") + # Then + assert record.timestamp == TIMESTAMP + + def test_non_empty_record_is_valid(self, adm1266_module): + # Given + raw_bytes = create_raw_adm1266_blackbox_record(uid=1234, empty=False) + # When + record = adm1266_module.Adm1266BlackBoxRecord.from_bytes(raw_bytes, "test-dpm") + # Then + assert record.is_valid() + + def test_empty_record_is_not_valid(self, adm1266_module): + # Given + raw_bytes = create_raw_adm1266_blackbox_record(uid=1234, empty=True) + # When + record = adm1266_module.Adm1266BlackBoxRecord.from_bytes(raw_bytes, "test-dpm") + # Then + assert not record.is_valid() + + def test_set_metadata_and_process_power_fault_cause(self, adm1266_module): + # Given + raw_bytes = create_raw_adm1266_blackbox_record( + uid=1234, + empty=False, + pdio_in=0b0111_1010_1000_1000, # PDI15, PDI14, PDI13, PDI12, PDI10, PDI8, PDI4 + gpio_in=0b0000_0000_0000_0000, + vh_ov=0b0001, # VH1 + vp_uv=0b0_0000_0000_0110, # VP3, VP2 + timestamp=datetime.timedelta(seconds=30), + ) + record = adm1266_module.Adm1266BlackBoxRecord.from_bytes(raw_bytes, "test-dpm") + + # When + PLATFORM_SPEC_1 = { + "dpm_signal_to_fault_cause": [ + { + "pdio_mask": "0b0000_0000_1000_1000", # PDI8, PDI4 + "gpio_mask": "0b0000_0000_0000_0000", + "pdio_value": "0b0000_0000_1000_1000", # PDI8, PDI4 + "gpio_value": "0b0000_0000_0000_0000", + "hw_cause": "HW_CAUSE_OF_PDI8_AND_PDI4", + "hw_desc": "HW_DESC_OF_PDI8_AND_PDI4", + "reboot_cause": "REBOOT_CAUSE_OF_PDI8_AND_PDI4", + }, + ] + } + record.set_metadata_and_process_power_fault_cause(PLATFORM_SPEC_1) + # Then + assert record.get_power_fault_cause() == adm1266_module.RebootCause( + type=adm1266_module.RebootCause.Type.HARDWARE, + source="test-dpm", + timestamp=datetime.timedelta(seconds=30), + cause="HW_CAUSE_OF_PDI8_AND_PDI4", + description="HW_DESC_OF_PDI8_AND_PDI4", + chassis_reboot_cause_category="REBOOT_CAUSE_OF_PDI8_AND_PDI4", + ) + + # But When + PLATFORM_SPEC_2 = { + "dpm_signal_to_fault_cause": [ + { + "pdio_mask": "0b0000_0000_0000_0001", # PDI1 + "gpio_mask": "0b0000_0000_0000_0000", + "pdio_value": "0b0000_0000_0000_0001", # PDI1 + "gpio_value": "0b0000_0000_0000_0000", + "hw_cause": "HW_CAUSE_OF_PDI1", + "hw_desc": "HW_DESC_OF_PDI1", + "reboot_cause": "REBOOT_CAUSE_OF_PDI1", + }, + ] + } + record.set_metadata_and_process_power_fault_cause(PLATFORM_SPEC_2) + # Then + assert record.get_power_fault_cause() is None + + def test_as_dict(self, adm1266_module): + # Given + raw_bytes = create_raw_adm1266_blackbox_record( + uid=1234, + empty=False, + action_index=1, + rule_index=3, + vh_ov=0b0101, # VH3, VH1 + vh_uv=0b1010, # VH4, VH2 + current_state=9, + last_state=8, + vp_ov=0b1_0011_0011_0011, # VP13, VP10, VP9, VP6, VP5, VP2, VP1 + vp_uv=0b0_1100_1100_1100, # VP12, VP11, VP8, VP7, VP4, VP3 + gpio_in=0b1100_1100_0001, # GPI7, GPI6, GPI9, GPI8, GPI1 + gpio_out=0b0011_0000_0110, # GPO5, GPO4, GPO3, GPO2 + pdio_in=0b0000_0000_0001_0000, # PDI5 + pdio_out=0b0000_0000_0000_0000, + powerup_counter=456, + timestamp=datetime.timedelta(seconds=1234), + crc=0xAB, + ) + record = adm1266_module.Adm1266BlackBoxRecord.from_bytes(raw_bytes, "test-dpm") + PLATFORM_SPEC = { + "dpm_signal_to_fault_cause": [ + { + "pdio_mask": "0b0000_0000_0001_0000", # PDI5 + "gpio_mask": "0b0000_0000_0000_0000", + "pdio_value": "0b0000_0000_0001_0000", # PDI5 + "gpio_value": "0b0000_0000_0000_0000", + "hw_cause": "HW_CAUSE_OF_PDI5", + "hw_desc": "some human-friendly message", + "reboot_cause": "REBOOT_CAUSE_OF_PDI5", + }, + ], + "pin_to_name": { + "VH1": "POS12V", + "VH2": "POS5V0", + "VH4": "POS5V0_S0", + "VP1": "POS1V0_A7", + "VP2": "POS1V8_V7", + "VP3": "POS3V3", + "VP4": "POS1V0", + "VP5": "POS1V2_A7", + "VP6": "POS0V75_S5", + "VP7": "POS1V8_S5", + "VP8": "POS3V3_S5", + "VP9": "POS1V1_S0", + "VP10": "POS0V78_S0", + "VP11": "POS0V75_S0", + "VP12": "POS1V8_S0", + "VP13": "POS3V3_S0", + "PDI5": "FPGA_CMD_PCYC", + }, + } + record.set_metadata_and_process_power_fault_cause(PLATFORM_SPEC) + # When + record_dict = record.as_dict() + # Then + assert record_dict == { + "dpm_name": "test-dpm", + "timestamp": "1234.000000s after power-on", + "power_fault_cause": "HW_CAUSE_OF_PDI5 (some human-friendly message); under_voltage: VH4(POS5V0_S0),VH2(POS5V0),VP12(POS1V8_S0),VP11(POS0V75_S0),VP8(POS3V3_S5),VP7(POS1V8_S5),VP4(POS1V0),VP3(POS3V3); over_voltage: VH3,VH1(POS12V),VP13(POS3V3_S0),VP10(POS0V78_S0),VP9(POS1V1_S0),VP6(POS0V75_S5),VP5(POS1V2_A7),VP2(POS1V8_V7),VP1(POS1V0_A7)", + "uid": "1234", + "byte_2": "0x00", + "action_index": "1", + "rule_index": "3", + "vh_over_voltage_[4:1]": "0b0101 [VH3, VH1(POS12V)]", + "vh_under_voltage_[4:1]": "0b1010 [VH4(POS5V0_S0), VH2(POS5V0)]", + "current_state": "9", + "last_state": "8", + "vp_over_voltage_[13:1]": "0b1001100110011 [VP13(POS3V3_S0), VP10(POS0V78_S0), VP9(POS1V1_S0), VP6(POS0V75_S5), VP5(POS1V2_A7), VP2(POS1V8_V7), VP1(POS1V0_A7)]", + "vp_under_voltage_[13:1]": "0b0110011001100 [VP12(POS1V8_S0), VP11(POS0V75_S0), VP8(POS3V3_S5), VP7(POS1V8_S5), VP4(POS1V0), VP3(POS3V3)]", + "gpio_in_[7:4,9:8,R,R,R,3:1]": "0b110011000001 [GPI7, GPI6, GPI9, GPI8, GPI1]", + "gpio_out_[7:4,9:8,R,R,R,3:1]": "0b001100000110 [GPO5, GPO4, GPO3, GPO2]", + "pdio_in_[16:1]": "0b0000000000010000 [PDI5(FPGA_CMD_PCYC)]", + "pdio_out_[16:1]": "0b0000000000000000", + "powerup_counter": "456", + "crc": "0xab", + "raw": textwrap.dedent( + """\ + d2 04 00 01 03 a5 09 00 + 08 00 33 13 cc 0c c1 0c + 06 03 10 00 00 00 c8 01 + 00 00 d2 04 00 00 00 00 + ff ff ff ff ff ff ff ff + ff ff ff ff ff ff ff ff + ff ff ff ff ff ff ff ff + ff ff ff ff ff ff ff ab""" + ), + } - adm = adm1266_module.Adm1266(self.get_fake_adm1266_platform_spec()) + def test_as_dict_with_custom_epoch_timestamp(self, adm1266_module): + # Given + TIMESTAMP = datetime.datetime(2025, 10, 20, 11, 25, 30, tzinfo=datetime.timezone.utc) + raw_bytes = create_raw_adm1266_blackbox_record( + uid=1234, + timestamp=TIMESTAMP, + ) + record = adm1266_module.Adm1266BlackBoxRecord.from_bytes(raw_bytes, "test-dpm") + # When + record_dict = record.as_dict() + # Then + assert record_dict["timestamp"] == "2025-10-20 11:25:30 UTC" + + def test_record_unique_name(self, adm1266_module): + # Given + raw_bytes = create_raw_adm1266_blackbox_record(uid=1234, powerup_counter=456) + record = adm1266_module.Adm1266BlackBoxRecord.from_bytes(raw_bytes, "test-dpm") + record_dict = record.as_dict() + # When + unique_name = adm1266_module.record_unique_name(record_dict) + # Then + assert unique_name == "test-dpm:powerup_456:uid_1234" + + def test_trim_record_dict(self, adm1266_module): + # Given + raw_bytes = create_raw_adm1266_blackbox_record( + uid=1234, + vh_uv=0b0001, # VH1 + pdio_in=0b0000_0000_0001_0000, # PDI5 + powerup_counter=456, + timestamp=datetime.datetime(2025, 10, 20, 11, 25, 30, tzinfo=datetime.timezone.utc), + ) + record = adm1266_module.Adm1266BlackBoxRecord.from_bytes(raw_bytes, "test-dpm") + record_dict = record.as_dict() + # When + trimmed_record_dict = adm1266_module.trim_record_dict(record_dict) + # Then + assert trimmed_record_dict == { + "timestamp": "2025-10-20 11:25:30 UTC", + "power_fault_cause": "n/a; under_voltage: VH1; over_voltage: n/a", + "gpio_in_[7:4,9:8,R,R,R,3:1]": "0b000000000000", + "pdio_in_[16:1]": "0b0000000000010000 [PDI5]", + } - records = adm.get_blackbox_records() - exp = expected_records - assert exp is not None, "expected_records not provided" - assert len(records) == len(exp), f"Count mismatch: {len(records)} != {len(exp)}" - for i, e in enumerate(exp): - a = records[i] - for k, v in e.items(): - assert k in a, f"[{i}] missing '{k}' in blackbox record" - assert a[k] == v, f"[{i}] {k}: {a[k]} != {v}" - print(" Passed") +class TestAdm1266: + """Test class for Adm1266 functionality.""" + + def test_dynamic_path_calculation_dpm1(self, adm1266_module): + # Given + platform_spec = {"dpm": "DPM1"} + pddf_device_data = { + "DPM1": { + "i2c": { + "topo_info": { + "parent_bus": "0x7", + "dev_addr": "0x41", + } + } + } + } + # When + adm1266 = adm1266_module.Adm1266("cpu_card", platform_spec, pddf_device_data) + # Then + assert adm1266._nvmem_path == "/sys/bus/nvmem/devices/7-00410/nvmem" + assert adm1266._powerup_counter_path == "/sys/bus/i2c/devices/7-0041/powerup_counter" + assert adm1266._rtc_epoch_offset_path == "/sys/bus/i2c/devices/7-0041/rtc_epoch_offset" + + def test_dynamic_path_calculation_dpm2(self, adm1266_module): + # Given + platform_spec = {"dpm": "DPM2"} + pddf_device_data = { + "DPM2": { + "i2c": { + "topo_info": { + "parent_bus": "0x9", + "dev_addr": "0x41", + } + } + } + } + # When + adm1266 = adm1266_module.Adm1266("switch_card", platform_spec, pddf_device_data) + # Then + assert adm1266._nvmem_path == "/sys/bus/nvmem/devices/9-00410/nvmem" + assert adm1266._powerup_counter_path == "/sys/bus/i2c/devices/9-0041/powerup_counter" + assert adm1266._rtc_epoch_offset_path == "/sys/bus/i2c/devices/9-0041/rtc_epoch_offset" + + def test_dynamic_path_calculation_dpm3(self, adm1266_module): + # Given + platform_spec = {"dpm": "DPM3"} + pddf_device_data = { + "DPM3": { + "i2c": { + "topo_info": { + "parent_bus": "0x9", + "dev_addr": "0x42", + } + } + } + } + # When + adm1266 = adm1266_module.Adm1266("switch_card_2", platform_spec, pddf_device_data) + # Then + assert adm1266._nvmem_path == "/sys/bus/nvmem/devices/9-00420/nvmem" + assert adm1266._powerup_counter_path == "/sys/bus/i2c/devices/9-0042/powerup_counter" + assert adm1266._rtc_epoch_offset_path == "/sys/bus/i2c/devices/9-0042/rtc_epoch_offset" + + def test_missing_dpm_field_raises_error(self, adm1266_module): + # Given + platform_spec = {} # Missing "dpm" field + pddf_device_data = {"DPM1": {"i2c": {"topo_info": {"parent_bus": "0x7", "dev_addr": "0x41"}}}} + # When/Then + with pytest.raises(ValueError, match="must contain a 'dpm' field"): + adm1266_module.Adm1266("test-dpm", platform_spec, pddf_device_data) + + def test_missing_dpm_device_in_pddf_raises_error(self, adm1266_module): + # Given + platform_spec = {"dpm": "DPM99"} # DPM99 doesn't exist in pddf_device_data + pddf_device_data = {"DPM1": {"i2c": {"topo_info": {"parent_bus": "0x7", "dev_addr": "0x41"}}}} + # When/Then + with pytest.raises(ValueError, match="DPM device 'DPM99' not found in pddf-device.json"): + adm1266_module.Adm1266("test-dpm", platform_spec, pddf_device_data) + + def test_missing_i2c_info_raises_error(self, adm1266_module): + # Given + platform_spec = {"dpm": "DPM1"} + # Device exists but has incomplete i2c info + pddf_device_data = {"DPM1": {"i2c": {"topo_info": {}}}} # Missing parent_bus and dev_addr + # When/Then + with pytest.raises(ValueError, match="Missing parent_bus or dev_addr"): + adm1266_module.Adm1266("test-dpm", platform_spec, pddf_device_data) def test_get_name(self, adm1266_module): - """Test get_name method returns DPM name.""" - adm = adm1266_module.Adm1266(self.get_fake_adm1266_platform_spec()) - assert adm.get_name() == "dpm-mock" - - def test_clear_blackbox(self, adm1266_module): - """Test clear_blackbox method clears data.""" - adm = adm1266_module.Adm1266(self.get_fake_adm1266_platform_spec()) - - # Verify we have data initially - initial_data = adm.read_blackbox() - assert len(initial_data) > 0 - - # Clear and verify empty - adm.clear_blackbox() - cleared_data = adm.read_blackbox() - assert len(cleared_data) == 1 - assert cleared_data == b"1" - - def test_get_all_faults(self, adm1266_module): - """Test get_all_faults method returns fault list.""" - adm = adm1266_module.Adm1266(self.get_fake_adm1266_platform_spec()) - - faults = adm.get_all_faults() - assert isinstance(faults, list) - assert len(faults) > 0 - # Each fault should have required fields - for fault in faults: - assert 'fault_uid' in fault - assert 'dpm_name' in fault - - def test_module_get_reboot_cause(self, adm1266_module): - """Test module-level get_reboot_cause function.""" - fake_adm1266_platform_spec = self.get_fake_adm1266_platform_spec() - - adm1266_platform_spec = Mock() - adm1266_platform_spec.Adm1266PlatformSpec = lambda name, pddf_data: fake_adm1266_platform_spec - with patch.dict(sys.modules, {"sonic_platform.adm1266_platform_spec": adm1266_platform_spec}): - result = adm1266_module.get_reboot_cause(self.get_test_pddf_path()) - assert result is not None - - reboot_cause, debug_msg = result - assert reboot_cause is not None - assert isinstance(debug_msg, str) - - def test_get_reboot_cause_type(self, adm1266_module): - """Test get_reboot_cause_type function.""" - # Test with known reboot causes - causes = ["REBOOT_CAUSE_POWER_LOSS", "REBOOT_CAUSE_WATCHDOG"] - result = adm1266_module.get_reboot_cause_type(causes) - assert result is not None - - def test_time_since(self, adm1266_module): - """Test time_since function converts timestamp to readable format.""" - # Test with 8-byte timestamp - timestamp = b'\x79\x2e\xee\x02\x00\x00\x00\x00' - result = adm1266_module.time_since('timestamp', timestamp) - assert isinstance(result, str) - assert 'seconds after power-on' in result - - def test_channel_names(self, adm1266_module): - """Test channel_names function formats GPIO/PDIO bits.""" - # Test GPIO formatting - result = adm1266_module.channel_names('gpio_in', 15391) # From test data - assert isinstance(result, str) - assert 'GPIO' in result or '0b' in result - - def test_decode_power_fault_cause_no_match(self, adm1266_module): - """Test decode_power_fault_cause decoding when there is no match """ - dpm_signal_to_fault_cause = [ - { - "pdio_mask": PSU_VIN_LOSS_PDIO_MASK_AND_VALUE, - "gpio_mask": 0x0000, - "pdio_value": PSU_VIN_LOSS_PDIO_MASK_AND_VALUE, - "gpio_value": 0x0000, - "hw_cause": "TEST_FAULT", - "hw_desc": "Test fault description", - "summary": "Test summary", - "reboot_cause": "REBOOT_CAUSE_HARDWARE_OTHER" + # Given + platform_spec = {"dpm": "DPM1"} + pddf_device_data = { + "DPM1": {"i2c": {"topo_info": {"parent_bus": "0x7", "dev_addr": "0x41"}}} + } + adm1266 = adm1266_module.Adm1266("test-dpm", platform_spec, pddf_device_data) + # When + name = adm1266.get_name() + # Then + assert name == "test-dpm" + + def test_get_type(self, adm1266_module): + # Given + platform_spec = {"dpm": "DPM1"} + pddf_device_data = { + "DPM1": {"i2c": {"topo_info": {"parent_bus": "0x7", "dev_addr": "0x41"}}} + } + adm1266 = adm1266_module.Adm1266("test-dpm", platform_spec, pddf_device_data) + # When + dpm_type = adm1266.get_type() + # Then + assert dpm_type == adm1266_module.DpmType.ADM1266 + + def test_set_rtc_epoch_offset_with_default_value(self, adm1266_module): + # Given + with temp_file( + content="", + file_prefix="rtc_epoch_offset", + dir_prefix="test_adm1266", + ) as rtc_epoch_offset_path: + platform_spec = {"dpm": "DPM1"} + pddf_device_data = { + "DPM1": {"i2c": {"topo_info": {"parent_bus": "0x7", "dev_addr": "0x41"}}} + } + # When + adm1266 = adm1266_module.Adm1266("test-dpm", platform_spec, pddf_device_data) + # Override the calculated path with our temp file for testing + adm1266._rtc_epoch_offset_path = rtc_epoch_offset_path + adm1266.set_rtc_epoch_offset() + # Then + with open(rtc_epoch_offset_path, "r") as file: + assert file.read() == "1704067200" # 1704067200s past 1970-01-01 is 2024-01-01. + + def test_set_rtc_epoch_offset_with_custom_value(self, adm1266_module): + # Given + with temp_file( + content="", + file_prefix="rtc_epoch_offset", + dir_prefix="test_adm1266", + ) as rtc_epoch_offset_path: + platform_spec = {"dpm": "DPM1"} + pddf_device_data = { + "DPM1": {"i2c": {"topo_info": {"parent_bus": "0x7", "dev_addr": "0x41"}}} } + # When + adm1266 = adm1266_module.Adm1266("test-dpm", platform_spec, pddf_device_data) + # Override the calculated path with our temp file for testing + adm1266._rtc_epoch_offset_path = rtc_epoch_offset_path + adm1266.set_rtc_epoch_offset(1234567) + # Then + with open(rtc_epoch_offset_path, "r") as file: + assert file.read() == "1234567" + + def test_read_raw_records(self, adm1266_module): + # Given + RECORDS = [ + create_raw_adm1266_blackbox_record(uid=1234, empty=False), + create_raw_adm1266_blackbox_record(uid=9999, empty=True), + create_raw_adm1266_blackbox_record(uid=1235, empty=False), ] - hw_cause, hw_desc, summary, reboot_cause = adm1266_module.decode_power_fault_cause( - dpm_signal_to_fault_cause, 0x0000, 0x0000) - assert hw_cause == "" - assert hw_desc == "" - assert summary == "" - assert reboot_cause == "" - - def test_decode_power_fault_cause_single_match(self, adm1266_module): - """Test decode_power_fault_cause decoding when there is only one match """ - # Test single fault match - dpm_signal_to_fault_cause = [ - { - "pdio_mask": PSU_VIN_LOSS_PDIO_MASK_AND_VALUE, - "gpio_mask": 0x0000, - "pdio_value": PSU_VIN_LOSS_PDIO_MASK_AND_VALUE, - "gpio_value": 0x0000, - "hw_cause": "TEST_FAULT", - "hw_desc": "Test fault description", - "summary": "Test summary", - "reboot_cause": "REBOOT_CAUSE_HARDWARE_OTHER" + INCOMPLETE_RECORD_BYTES = b"1" * ( + adm1266_module.Adm1266BlackBoxRecord.RECORD_SIZE_IN_BYTES - 1 + ) + with temp_file( + content=b"".join(RECORDS) + INCOMPLETE_RECORD_BYTES, + file_prefix="nvmem", + dir_prefix="test_adm1266", + ) as nvmem_path: + platform_spec = {"dpm": "DPM1"} + pddf_device_data = { + "DPM1": {"i2c": {"topo_info": {"parent_bus": "0x7", "dev_addr": "0x41"}}} } + adm1266 = adm1266_module.Adm1266("test-dpm", platform_spec, pddf_device_data) + # Override the calculated path with our temp file for testing + adm1266._nvmem_path = nvmem_path + # When + read_records = adm1266.read_raw_records() + # Then + assert read_records == RECORDS + + def test_read_raw_records_skip_empty_or_cleared_records(self, adm1266_module): + # Given + RECORDS = [ + b"\x00" * adm1266_module.Adm1266BlackBoxRecord.RECORD_SIZE_IN_BYTES, + create_raw_adm1266_blackbox_record(uid=1234, empty=False), + b"\xff" * adm1266_module.Adm1266BlackBoxRecord.RECORD_SIZE_IN_BYTES, ] - hw_cause, hw_desc, summary, reboot_cause = adm1266_module.decode_power_fault_cause( - dpm_signal_to_fault_cause, PSU_VIN_LOSS_PDIO_MASK_AND_VALUE, 0x0000) - assert hw_cause == "TEST_FAULT" - assert hw_desc == "Test fault description" - assert summary == "Test summary" - assert reboot_cause == "REBOOT_CAUSE_HARDWARE_OTHER" - - def test_decode_power_fault_cause_multiple_match(self, adm1266_module): - """Test decode_power_fault_cause decoding when there are multiple matches """ - # Test multiple fault matches (comma-separated) - dpm_signal_to_fault_cause = [ - { - "pdio_mask": PSU_VIN_LOSS_PDIO_MASK_AND_VALUE, - "gpio_mask": 0x0000, - "pdio_value": PSU_VIN_LOSS_PDIO_MASK_AND_VALUE, - "gpio_value": 0x0000, - "hw_cause": "PSU_VIN_LOSS", - "hw_desc": "Both PSUs lost input power", - "summary": "PSU input power lost", - "reboot_cause": "REBOOT_CAUSE_POWER_LOSS" - }, - { - "pdio_mask": OVER_TEMP_PDIO_MASK_AND_VALUE, - "gpio_mask": 0x0000, - "pdio_value": OVER_TEMP_PDIO_MASK_AND_VALUE, - "gpio_value": 0x0000, - "hw_cause": "OVER_TEMP", - "hw_desc": "Temperature exceeded threshold", - "summary": "Overtemperature event", - "reboot_cause": "REBOOT_CAUSE_THERMAL_OVERLOAD_OTHER" + with temp_file( + content=b"".join(RECORDS), + file_prefix="nvmem", + dir_prefix="test_adm1266", + ) as nvmem_path: + platform_spec = {"dpm": "DPM1"} + pddf_device_data = { + "DPM1": {"i2c": {"topo_info": {"parent_bus": "0x7", "dev_addr": "0x41"}}} } + adm1266 = adm1266_module.Adm1266("test-dpm", platform_spec, pddf_device_data) + # Override the calculated path with our temp file for testing + adm1266._nvmem_path = nvmem_path + # When + read_records = adm1266.read_raw_records() + # Then + assert read_records == [RECORDS[1]] + + def test_read_records(self, adm1266_module): + # Given + RECORDS = [ + create_raw_adm1266_blackbox_record(uid=1234, empty=False, powerup_counter=1), + create_raw_adm1266_blackbox_record(uid=9999, empty=True), + create_raw_adm1266_blackbox_record(uid=1235, empty=False), ] - # Both bits set - should get comma-separated results - hw_cause, hw_desc, summary, reboot_cause = adm1266_module.decode_power_fault_cause( - dpm_signal_to_fault_cause, - PSU_VIN_LOSS_PDIO_MASK_AND_VALUE | OVER_TEMP_PDIO_MASK_AND_VALUE, - 0x0000) - assert hw_cause == "PSU_VIN_LOSS,OVER_TEMP" - assert hw_desc == "Both PSUs lost input power,Temperature exceeded threshold" - assert summary == "PSU input power lost,Overtemperature event" - assert reboot_cause == "REBOOT_CAUSE_POWER_LOSS,REBOOT_CAUSE_THERMAL_OVERLOAD_OTHER" - - @pytest.mark.parametrize("reboot_cause_str", [ - "REBOOT_CAUSE_POWER_LOSS", - "REBOOT_CAUSE_POWER_LOSS,REBOOT_CAUSE_WATCHDOG", - "REBOOT_CAUSE_THERMAL_OVERLOAD_ASIC, REBOOT_CAUSE_HARDWARE_OTHER", - "INVALID_CAUSE" - ]) - def test_reboot_cause_str_to_type(self, adm1266_module, reboot_cause_str): - """Test reboot_cause_str_to_type handles single and comma-separated causes.""" - reboot_cause_to_type = { - "REBOOT_CAUSE_POWER_LOSS": - adm1266_module.ChassisBase.REBOOT_CAUSE_POWER_LOSS, - "REBOOT_CAUSE_POWER_LOSS,REBOOT_CAUSE_WATCHDOG": - adm1266_module.ChassisBase.REBOOT_CAUSE_POWER_LOSS, - "REBOOT_CAUSE_THERMAL_OVERLOAD_ASIC, REBOOT_CAUSE_HARDWARE_OTHER": - adm1266_module.ChassisBase.REBOOT_CAUSE_THERMAL_OVERLOAD_ASIC, - "INVALID_CAUSE": adm1266_module.ChassisBase.INVALID_CAUSE - } - - reboot_cause_type = reboot_cause_to_type.get(reboot_cause_str, "") - assert adm1266_module.reboot_cause_str_to_type(reboot_cause_str) == reboot_cause_type + with temp_file( + content=b"".join(RECORDS), file_prefix="nvmem", dir_prefix="test_adm1266" + ) as nvmem_path: + platform_spec = {"dpm": "DPM1"} + pddf_device_data = { + "DPM1": {"i2c": {"topo_info": {"parent_bus": "0x7", "dev_addr": "0x41"}}} + } + adm1266 = adm1266_module.Adm1266("test-dpm", platform_spec, pddf_device_data) + # Override the calculated path with our temp file for testing + adm1266._nvmem_path = nvmem_path + # When + records = adm1266.read_records(adm1266_module.Adm1266BlackBoxRecord) + # Then + assert all(isinstance(r, adm1266_module.Adm1266BlackBoxRecord) for r in records) + assert len(records) == 2 + assert records[0].uid == 1234 + assert records[0].powerup_counter == 1 + assert records[1].uid == 1235 + + def test_clear_records(self, adm1266_module): + # Given + RECORD = create_raw_adm1266_blackbox_record(uid=1234, empty=False) + with temp_file( + content=RECORD, + file_prefix="nvmem", + dir_prefix="test_adm1266", + ) as nvmem_path: + platform_spec = {"dpm": "DPM1"} + pddf_device_data = { + "DPM1": {"i2c": {"topo_info": {"parent_bus": "0x7", "dev_addr": "0x41"}}} + } + adm1266 = adm1266_module.Adm1266("test-dpm", platform_spec, pddf_device_data) + # Override the calculated path with our temp file for testing + adm1266._nvmem_path = nvmem_path + # When + assert adm1266.read_raw_records() != [] + adm1266.clear_records() + # Then + assert adm1266.read_raw_records() == [] + with open(nvmem_path, "rb") as file: + assert file.read() == b"1" + + def test_get_powerup_entries(self, adm1266_module): + # Given + RECORDS = [ + # 1st powerup + create_raw_adm1266_blackbox_record(uid=1234, powerup_counter=1), # No PDI + create_raw_adm1266_blackbox_record( + uid=1235, + powerup_counter=1, + pdio_in=0b0000_0000_0000_0001, # PDI1 + timestamp=datetime.timedelta(seconds=70), + ), + # 2nd powerup + create_raw_adm1266_blackbox_record( + uid=1236, + powerup_counter=2, + pdio_in=0b0000_0000_0000_0010, # PDI2 + timestamp=datetime.datetime(2025, 10, 2, 23, 22, 56, tzinfo=datetime.timezone.utc), + ), + # 3rd powerup + create_raw_adm1266_blackbox_record(uid=1237, powerup_counter=3), # No PDI + create_raw_adm1266_blackbox_record(uid=1238, powerup_counter=3), # No PDI + create_raw_adm1266_blackbox_record( + uid=1239, + powerup_counter=3, + pdio_in=0b0000_0000_0000_0100, # PDI3 - not mapped to a cause + ), + ] + with temp_file( + content=b"".join(RECORDS), file_prefix="nvmem", dir_prefix="test_adm1266" + ) as nvmem_path: + platform_spec = { + "dpm": "DPM1", + "dpm_signal_to_fault_cause": [ + { + "pdio_mask": "0b0000_0000_0000_0001", # PDI1 + "gpio_mask": "0b0000_0000_0000_0000", + "pdio_value": "0b0000_0000_0000_0001", # PDI1 + "gpio_value": "0b0000_0000_0000_0000", + "hw_cause": "HW_CAUSE_OF_PDI1", + "hw_desc": "HW_DESC_OF_PDI1", + "reboot_cause": "REBOOT_CAUSE_OF_PDI1", + }, + { + "pdio_mask": "0b0000_0000_0000_0010", # PDI2 + "gpio_mask": "0b0000_0000_0000_0000", + "pdio_value": "0b0000_0000_0000_0010", # PDI2 + "gpio_value": "0b0000_0000_0000_0000", + "hw_cause": "HW_CAUSE_OF_PDI2", + "hw_desc": "HW_DESC_OF_PDI2", + "reboot_cause": "REBOOT_CAUSE_OF_PDI2", + }, + ], + } + pddf_device_data = { + "DPM1": {"i2c": {"topo_info": {"parent_bus": "0x7", "dev_addr": "0x41"}}} + } + adm1266 = adm1266_module.Adm1266("test-dpm", platform_spec, pddf_device_data) + # Override the calculated path with our temp file for testing + adm1266._nvmem_path = nvmem_path + + # When + reboot_causes = adm1266.get_powerup_entries() + + # Then + assert len(reboot_causes) == 3 + + assert reboot_causes[0].power_fault_cause == adm1266_module.RebootCause( + type=adm1266_module.RebootCause.Type.HARDWARE, + source="test-dpm", + timestamp=datetime.timedelta(seconds=70), + cause="HW_CAUSE_OF_PDI1", + description="HW_DESC_OF_PDI1", + chassis_reboot_cause_category="REBOOT_CAUSE_OF_PDI1", + ) + assert len(reboot_causes[0].dpm_records) == 2 + assert reboot_causes[0].dpm_records[0].uid == 1234 + assert reboot_causes[0].dpm_records[1].uid == 1235 + + assert reboot_causes[1].power_fault_cause == adm1266_module.RebootCause( + type=adm1266_module.RebootCause.Type.HARDWARE, + source="test-dpm", + timestamp=datetime.datetime(2025, 10, 2, 23, 22, 56, tzinfo=datetime.timezone.utc), + cause="HW_CAUSE_OF_PDI2", + description="HW_DESC_OF_PDI2", + chassis_reboot_cause_category="REBOOT_CAUSE_OF_PDI2", + ) + assert len(reboot_causes[1].dpm_records) == 1 + assert reboot_causes[1].dpm_records[0].uid == 1236 + + assert reboot_causes[2].power_fault_cause is None + assert len(reboot_causes[2].dpm_records) == 3 + assert reboot_causes[2].dpm_records[0].uid == 1237 + assert reboot_causes[2].dpm_records[1].uid == 1238 + assert reboot_causes[2].dpm_records[2].uid == 1239 diff --git a/platform/broadcom/sonic-platform-modules-nexthop/test/unit/sonic_platform/test_chassis.py b/platform/broadcom/sonic-platform-modules-nexthop/test/unit/sonic_platform/test_chassis.py index 65872d8bc46..c489e08b4a0 100755 --- a/platform/broadcom/sonic-platform-modules-nexthop/test/unit/sonic_platform/test_chassis.py +++ b/platform/broadcom/sonic-platform-modules-nexthop/test/unit/sonic_platform/test_chassis.py @@ -9,12 +9,11 @@ python -m pytest test/unit/sonic_platform/test_chassis.py -v """ -import os +import datetime import pytest import sys -import tempfile -from fixtures.test_helpers_common import mock_pddf_data +from fixtures.test_helpers_common import mock_pddf_data, temp_file from unittest.mock import patch, Mock @@ -43,19 +42,12 @@ def chassis_module(mock_pddf_chassis): yield chassis -def _create_temp_file(content: str) -> str: - """ - Creates a temporary file, under a temporary directory. - Args: - content: content to write to the temporary file. - Returns: - Path to the created file - """ - root = tempfile.mkdtemp() - filepath = os.path.join(root, 'reboot-cause.txt') - with open(filepath, 'w+') as file: - file.write(content) - return filepath +@pytest.fixture +def reboot_cause_manager_module(): + """Loads the module before each test. This is to let conftest.py run first.""" + from sonic_platform import reboot_cause_manager + + yield reboot_cause_manager class TestChassis: @@ -73,18 +65,20 @@ def test_chassis_basic_functionality(self, chassis_module): def test_chassis_get_watchdog(self, chassis_module): chassis = chassis_module.Chassis( - pddf_data=mock_pddf_data({ - "WATCHDOG": { - "dev_info": {"device_parent": "FAKE_MULTIFPGAPCIE1"}, - "dev_attr": { - "event_driven_power_cycle_control_reg_offset": "0x28", - "watchdog_counter_reg_offset": "0x1E0", + pddf_data=mock_pddf_data( + { + "WATCHDOG": { + "dev_info": {"device_parent": "FAKE_MULTIFPGAPCIE1"}, + "dev_attr": { + "event_driven_power_cycle_control_reg_offset": "0x28", + "watchdog_counter_reg_offset": "0x1E0", + }, }, - }, - "FAKE_MULTIFPGAPCIE1": { - "dev_info": {"device_bdf": "FAKE_ADDR"}, - }, - }) + "FAKE_MULTIFPGAPCIE1": { + "dev_info": {"device_bdf": "FAKE_ADDR"}, + }, + } + ) ) actual_watchdog = chassis.get_watchdog() assert actual_watchdog.fpga_pci_addr == "FAKE_ADDR" @@ -92,98 +86,243 @@ def test_chassis_get_watchdog(self, chassis_module): assert actual_watchdog.watchdog_counter_reg_offset == 0x1E0 def test_chassis_get_watchdog_pddf_data_is_empty(self, chassis_module): - # Initiailize chasis with an empty pddf_data + # Initialize chasis with an empty pddf_data chassis = chassis_module.Chassis(pddf_data=mock_pddf_data({})) assert chassis.get_watchdog() is None def test_chassis_get_watchdog_no_watchdog_presence_in_pddf_data(self, chassis_module): - # Initiailize chasis with an empty pddf_data + # Initialize chasis with an empty pddf_data chassis = chassis_module.Chassis(pddf_data=mock_pddf_data({"device": {}})) assert chassis.get_watchdog() is None - def test_chassis_get_reboot_cause_sw_reboot(self, chassis_module): + def test_chassis_get_reboot_cause_sw(self, chassis_module): EXPECTED_SW_REBOOT_CAUSE = "reboot" - EXPECTED_MINOR_CAUSES = "System powered off due to software disabling data plane power, System powered off due to software disabling data plane power, System powered off due to software disabling data plane power" - - # Given - reboot_cause_filepath = _create_temp_file( - f"User issued '{EXPECTED_SW_REBOOT_CAUSE}' command [User: admin, Time: Thu Oct 2 11:22:56 PM UTC 2025]" - ) - chassis_module.adm1266.get_reboot_cause = Mock( - return_value=("Power Loss", EXPECTED_MINOR_CAUSES) - ) - # When - chassis = chassis_module.Chassis( - pddf_plugin_data={ - "REBOOT_CAUSE": {"reboot_cause_file": reboot_cause_filepath} - }, - ) - # Then - assert chassis.get_reboot_cause() == ( - EXPECTED_SW_REBOOT_CAUSE, - EXPECTED_MINOR_CAUSES, - ) + from sonic_platform import reboot_cause_manager - def test_chassis_get_reboot_cause_sw_kernel_panic(self, chassis_module): # Given - reboot_cause_filepath = _create_temp_file( - f"Kernel Panic [Time: Thu Oct 2 11:22:56 PM UTC 2025]" - ) - chassis_module.adm1266.get_reboot_cause = Mock(return_value=None) + with ( + patch.object( + chassis_module.Chassis, "REBOOT_CAUSE_NON_HARDWARE", "Non-Hardware", create=True + ), + patch.object( + reboot_cause_manager.RebootCauseManager, + "summarize_reboot_causes", + Mock( + return_value=[ + reboot_cause_manager.RebootCause( + type=reboot_cause_manager.RebootCause.Type.SOFTWARE, + source="SW", + timestamp=datetime.datetime( + 2025, 10, 2, 23, 22, 56, tzinfo=datetime.timezone.utc + ), + cause=EXPECTED_SW_REBOOT_CAUSE, + description="User issued 'reboot' command [User: admin, Time: Thu Oct 2 11:22:56 PM UTC 2025]", + chassis_reboot_cause_category="REBOOT_CAUSE_NON_HARDWARE", + ) + ] + ), + ), + ): + # When + chassis = chassis_module.Chassis( + pddf_data=mock_pddf_data({}), # Empty PDDF data for tests + pddf_plugin_data={"DUMMY": "dummy"} + ) + # Then + assert chassis.get_reboot_cause() == ("Non-Hardware", "") - # When - chassis = chassis_module.Chassis( - pddf_plugin_data={ - "REBOOT_CAUSE": {"reboot_cause_file": reboot_cause_filepath} - }, - ) + def test_chassis_get_reboot_cause_hw(self, chassis_module): + from sonic_platform import reboot_cause_manager - # Then - assert chassis.get_reboot_cause() == ( - "Kernel Panic", - "", - ) + # Given + with ( + patch.object( + chassis_module.Chassis, "REBOOT_CAUSE_POWER_LOSS", "Power Loss", create=True + ), + patch.object( + reboot_cause_manager.RebootCauseManager, + "summarize_reboot_causes", + Mock( + return_value=[ + reboot_cause_manager.RebootCause( + type=reboot_cause_manager.RebootCause.Type.HARDWARE, + source="test-dpm", + timestamp=datetime.timedelta(seconds=70), + cause="PSU_VIN_LOSS", + description="Both PSUs lost input power", + chassis_reboot_cause_category="REBOOT_CAUSE_POWER_LOSS", + ) + ] + ), + ), + temp_file(content="") as sw_reboot_cause_filepath, + ): + # When + chassis = chassis_module.Chassis( + pddf_data=mock_pddf_data({}), # Empty PDDF data for tests + pddf_plugin_data={ + "REBOOT_CAUSE": {"reboot_cause_file": sw_reboot_cause_filepath}, + } + ) + # Then + assert chassis.get_reboot_cause() == ( + "Power Loss", + "Both PSUs lost input power, time: 70.000000s after power-on, src: test-dpm", + ) + with open(sw_reboot_cause_filepath, "r") as file: + assert file.read() == "" - def test_chassis_get_reboot_cause_hw(self, chassis_module): - EXPECTED_HW_CAUSE = "Power Loss" - EXPECTED_HW_MINOR_CAUSE = "System powered off due to loss of input power on both PSUs, System powered off due to software disabling data plane power" + def test_chassis_get_reboot_cause_hw_reboot_one_more_time(self, chassis_module): + from sonic_platform import reboot_cause_manager # Given - reboot_cause_filepath = _create_temp_file("") - chassis_module.adm1266.get_reboot_cause = Mock( - return_value=( - EXPECTED_HW_CAUSE, - EXPECTED_HW_MINOR_CAUSE, + with ( + patch.object( + chassis_module.Chassis, "REBOOT_CAUSE_POWER_LOSS", "Power Loss", create=True + ), + patch.object(chassis_module.Chassis, "REBOOT_CAUSE_WATCHDOG", "Watchdog", create=True), + patch.object( + reboot_cause_manager.RebootCauseManager, + "summarize_reboot_causes", + Mock( + return_value=[ + reboot_cause_manager.RebootCause( + type=reboot_cause_manager.RebootCause.Type.HARDWARE, + source="test-dpm", + timestamp=datetime.timedelta(seconds=70), + cause="PSU_VIN_LOSS", + description="Both PSUs lost input power", + chassis_reboot_cause_category="REBOOT_CAUSE_POWER_LOSS", + ), + reboot_cause_manager.RebootCause( + type=reboot_cause_manager.RebootCause.Type.HARDWARE, + source="test-dpm", + timestamp=datetime.datetime( + 2025, 10, 2, 23, 22, 56, tzinfo=datetime.timezone.utc + ), + cause="WATCHDOG", + description="FPGA watchdog expired", + chassis_reboot_cause_category="REBOOT_CAUSE_WATCHDOG", + ), + ] + ), + ), + temp_file(content="") as sw_reboot_cause_filepath, + ): + # When + chassis = chassis_module.Chassis( + pddf_data=mock_pddf_data({}), # Empty PDDF data for tests + pddf_plugin_data={ + "REBOOT_CAUSE": {"reboot_cause_file": sw_reboot_cause_filepath}, + } ) - ) + # Then + assert chassis.get_reboot_cause() == ( + "Power Loss", + "Both PSUs lost input power, time: 70.000000s after power-on, src: test-dpm", + ) + with open(sw_reboot_cause_filepath, "r") as file: + assert ( + file.read() + == "System rebooted 1 more time: Watchdog (FPGA watchdog expired, time: 2025-10-02 23:22:56 UTC, src: test-dpm)" + ) - # When - chassis = chassis_module.Chassis( - pddf_plugin_data={ - "REBOOT_CAUSE": {"reboot_cause_file": reboot_cause_filepath} - }, - ) + def test_chassis_get_reboot_cause_sw_and_hw(self, chassis_module): + from sonic_platform import reboot_cause_manager - # Then - assert chassis.get_reboot_cause() == ( - EXPECTED_HW_CAUSE, - EXPECTED_HW_MINOR_CAUSE, - ) + # Given + with ( + patch.object(chassis_module.Chassis, "REBOOT_CAUSE_WATCHDOG", "Watchdog", create=True), + patch.object( + chassis_module.Chassis, + "REBOOT_CAUSE_THERMAL_OVERLOAD_OTHER", + "Thermal Overload: Other", + create=True, + ), + patch.object( + reboot_cause_manager.RebootCauseManager, + "summarize_reboot_causes", + Mock( + return_value=[ + reboot_cause_manager.RebootCause( + type=reboot_cause_manager.RebootCause.Type.SOFTWARE, + source="SW", + timestamp=datetime.datetime( + 2025, 10, 2, 23, 22, 56, tzinfo=datetime.timezone.utc + ), + cause="Kernel Panic", + description="Kernel Panic [Time: Thu Oct 2 11:22:56 PM UTC 2025]", + chassis_reboot_cause_category="REBOOT_CAUSE_NON_HARDWARE", + ), + reboot_cause_manager.RebootCause( + type=reboot_cause_manager.RebootCause.Type.HARDWARE, + source="test-dpm", + timestamp=datetime.datetime( + 2025, 10, 3, 23, 22, 56, tzinfo=datetime.timezone.utc + ), + cause="WATCHDOG", + description="FPGA watchdog expired", + chassis_reboot_cause_category="REBOOT_CAUSE_WATCHDOG", + ), + reboot_cause_manager.RebootCause( + type=reboot_cause_manager.RebootCause.Type.HARDWARE, + source="test-dpm", + timestamp=datetime.datetime( + 2025, 10, 4, 23, 22, 56, tzinfo=datetime.timezone.utc + ), + cause="OVER_TEMP", + description="Switch card exceeded overtemperature", + chassis_reboot_cause_category="REBOOT_CAUSE_THERMAL_OVERLOAD_OTHER", + ), + ] + ), + ), + temp_file(content="") as sw_reboot_cause_filepath, + ): + # When + chassis = chassis_module.Chassis( + pddf_data=mock_pddf_data({}), # Empty PDDF data for tests + pddf_plugin_data={ + "REBOOT_CAUSE": {"reboot_cause_file": sw_reboot_cause_filepath}, + } + ) + # Then + assert chassis.get_reboot_cause() == ( + "Kernel Panic", + "time: 2025-10-02 23:22:56 UTC, src: SW", + ) + with open(sw_reboot_cause_filepath, "r") as file: + assert ( + file.read() + == "System rebooted 2 more times: Watchdog (FPGA watchdog expired, time: 2025-10-03 23:22:56 UTC, src: test-dpm); Thermal Overload: Other (Switch card exceeded overtemperature, time: 2025-10-04 23:22:56 UTC, src: test-dpm)" + ) def test_chassis_get_reboot_cause_unknown(self, chassis_module): # Given - reboot_cause_filepath = _create_temp_file("unknown") - chassis_module.adm1266.get_reboot_cause = Mock(return_value=None) - - # When - chassis = chassis_module.Chassis( - pddf_plugin_data={ - "REBOOT_CAUSE": {"reboot_cause_file": reboot_cause_filepath} - }, - ) - - # Then - assert chassis.get_reboot_cause() == ("Unknown", "Unknown") + with patch.object( + chassis_module.RebootCauseManager, + "summarize_reboot_causes", + Mock(return_value=[]), + ): + # When + chassis = chassis_module.Chassis(pddf_plugin_data={"DUMMY": "dummy"}) + # Then + assert chassis.get_reboot_cause() == ("Unknown", "") + + def test_chassis_get_reboot_cause_unknown_hw(self, chassis_module, reboot_cause_manager_module): + # Given + with patch.object( + chassis_module.RebootCauseManager, + "summarize_reboot_causes", + Mock(return_value=[reboot_cause_manager_module.UNKNOWN_HW_REBOOT_CAUSE]), + ): + # When + chassis = chassis_module.Chassis( + pddf_data=mock_pddf_data({}), # Empty PDDF data for tests + pddf_plugin_data={"DUMMY": "dummy"} + ) + # Then + assert chassis.get_reboot_cause() == ("REBOOT_CAUSE_HARDWARE_OTHER", "unknown, time: unknown, src: unknown") diff --git a/platform/broadcom/sonic-platform-modules-nexthop/test/unit/sonic_platform/test_dpm_logger.py b/platform/broadcom/sonic-platform-modules-nexthop/test/unit/sonic_platform/test_dpm_logger.py new file mode 100644 index 00000000000..209ebedc296 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-nexthop/test/unit/sonic_platform/test_dpm_logger.py @@ -0,0 +1,309 @@ +#!/usr/bin/env python + +import datetime +import json +import os +import pytest +import tempfile + +from fixtures.test_helpers_adm1266 import create_raw_adm1266_blackbox_record +from unittest.mock import patch + + +@pytest.fixture +def dpm_logger_module(): + """Loads the module before each test. This is to let conftest.py run first.""" + from sonic_platform import dpm_logger + + yield dpm_logger + + +@pytest.fixture +def adm1266_module(): + """Loads the module before each test. This is to let conftest.py run first.""" + from sonic_platform import adm1266 + + yield adm1266 + + +def get_fake_data(gen_time: str): + return { + "gen_time": gen_time, + "schema_version": 1, + "causes": [ + { + "source": "test-dpm", + "timestamp": "2025-10-02 23:26:07 UTC", + "cause": "WATCHDOG", + "description": "FPGA watchdog expired", + }, + ], + "dpms": [ + { + "name": "test-dpm-1", + "type": "adm1266", + "records": [ + { + "timestamp": "2025-10-02 23:26:07 UTC", + "dpm_name": "test-dpm-1", + "power_fault_cause": "WATCHDOG (FPGA watchdog expired), under_voltage: VH1(POS12V), over_voltage: n/a", + "uid": "12345", + "powerup_counter": "65533", + "vh_under_voltage_[4:1]": "0b0001 [VH1(POS12V)]", + "pdio_in_[16:1]": "0b0000000010000000 [PDI8]", + } + ], + }, + ], + } + + +def get_expected_loaded_data(dpm_logger_module, gen_time: str): + fake_records = get_fake_data(gen_time)["dpms"][0]["records"] + return dpm_logger_module.DataV1( + gen_time=gen_time, + schema_version=1, + causes=[ + dpm_logger_module.CauseV1( + source="test-dpm", + timestamp="2025-10-02 23:26:07 UTC", + cause="WATCHDOG", + description="FPGA watchdog expired", + ), + ], + dpms=[ + dpm_logger_module.DpmV1( + name="test-dpm-1", + type="adm1266", + records=fake_records, + ), + ], + ) + + +class TestDpmLogger: + """Test class for DpmLogger functionality.""" + + def test_save_and_load_v1(self, dpm_logger_module, adm1266_module): + # Given + CAUSES = [ + dpm_logger_module.RebootCause( + type=dpm_logger_module.RebootCause.Type.SOFTWARE, + source="SW", + timestamp=datetime.datetime(2025, 10, 2, 23, 22, 56, tzinfo=datetime.timezone.utc), + cause="reboot", + description="User issued 'reboot' command [User: admin, Time: Thu Oct 2 11:22:56 PM UTC 2025]", + chassis_reboot_cause_category="REBOOT_CAUSE_NON_HARDWARE", + ), + dpm_logger_module.RebootCause( + type=dpm_logger_module.RebootCause.Type.HARDWARE, + source="test-dpm-1", + timestamp=datetime.datetime(2025, 10, 2, 23, 26, 7, tzinfo=datetime.timezone.utc), + cause="CPU_CMD_PCYC", + description="CPU card commanded power cycle", + chassis_reboot_cause_category="REBOOT_CAUSE_POWER_LOSS", + ), + ] + DPM_1_POWERUPS = [ + dpm_logger_module.DpmPowerUpEntry( + powerup_counter=65533, + power_fault_cause=None, + dpm_records=[ + adm1266_module.Adm1266BlackBoxRecord.from_bytes( + create_raw_adm1266_blackbox_record( + uid=12345, + powerup_counter=65533, + ), + "test-dpm-1", + ) + ], + ), + dpm_logger_module.DpmPowerUpEntry( + powerup_counter=65534, + power_fault_cause=None, + dpm_records=[ + adm1266_module.Adm1266BlackBoxRecord.from_bytes( + create_raw_adm1266_blackbox_record( + uid=12346, + powerup_counter=65534, + ), + "test-dpm-1", + ) + ], + ), + ] + DPM_2_POWERUPS = [ + dpm_logger_module.DpmPowerUpEntry( + powerup_counter=6, + power_fault_cause=None, + dpm_records=[ + adm1266_module.Adm1266BlackBoxRecord.from_bytes( + create_raw_adm1266_blackbox_record( + uid=1000, + powerup_counter=6, + ), + "test-dpm-2", + ), + adm1266_module.Adm1266BlackBoxRecord.from_bytes( + create_raw_adm1266_blackbox_record( + uid=1001, + powerup_counter=6, + ), + "test-dpm-2", + ), + ], + ), + dpm_logger_module.DpmPowerUpEntry( + powerup_counter=7, + power_fault_cause=None, + dpm_records=[ + adm1266_module.Adm1266BlackBoxRecord.from_bytes( + create_raw_adm1266_blackbox_record( + uid=1002, + powerup_counter=7, + ), + "test-dpm-2", + ), + ], + ), + ] + # Minimal pddf_device_data for testing + pddf_device_data = { + "DPM1": {"i2c": {"topo_info": {"parent_bus": "0x0", "dev_addr": "0x40"}}}, + "DPM2": {"i2c": {"topo_info": {"parent_bus": "0x0", "dev_addr": "0x41"}}}, + } + DPM_1 = adm1266_module.Adm1266( + "test-dpm-1", + {"dpm": "DPM1"}, + pddf_device_data, + ) + DPM_2 = adm1266_module.Adm1266( + "test-dpm-2", + {"dpm": "DPM2"}, + pddf_device_data, + ) + with ( + tempfile.TemporaryDirectory() as tmpdir, + patch.object(dpm_logger_module.DpmLogger, "HISTORY_DIR", new=tmpdir), + ): + # When + logger = dpm_logger_module.DpmLogger() + logger.save(CAUSES, {DPM_1: DPM_1_POWERUPS, DPM_2: DPM_2_POWERUPS}) + loaded_data = logger.load() + + # Then + EXPECTED_DATA = dpm_logger_module.DataV1( + gen_time=loaded_data.gen_time, + schema_version=1, + causes=[ + dpm_logger_module.CauseV1( + source="SW", + timestamp="2025-10-02 23:22:56 UTC", + cause="reboot", + description="n/a", + ), + dpm_logger_module.CauseV1( + source="test-dpm-1", + timestamp="2025-10-02 23:26:07 UTC", + cause="CPU_CMD_PCYC", + description="CPU card commanded power cycle", + ), + ], + dpms=[ + dpm_logger_module.DpmV1( + name="test-dpm-1", + type="adm1266", + records=[ + record.as_dict() + for powerup in DPM_1_POWERUPS + for record in powerup.dpm_records + ], + ), + dpm_logger_module.DpmV1( + name="test-dpm-2", + type="adm1266", + records=[ + record.as_dict() + for powerup in DPM_2_POWERUPS + for record in powerup.dpm_records + ], + ), + ], + ) + assert loaded_data == EXPECTED_DATA + + def test_load_all(self, dpm_logger_module): + # Given + with ( + tempfile.TemporaryDirectory() as tmpdir, + patch.object(dpm_logger_module.DpmLogger, "HISTORY_DIR", new=tmpdir), + ): + # 1st file + with open( + os.path.join(tmpdir, "reboot-cause-2025_10_02_23_27_07.json"), "w" + ) as file_handle: + json.dump(get_fake_data("2025-10-02 23:27:07 UTC"), file_handle) + + # 2nd file + with open( + os.path.join(tmpdir, "reboot-cause-2025_10_02_23_29_07.json"), "w" + ) as file_handle: + json.dump(get_fake_data("2025-10-02 23:29:07 UTC"), file_handle) + + # 3rd file + with open( + os.path.join(tmpdir, "reboot-cause-2025_10_02_23_31_07.json"), "w" + ) as file_handle: + json.dump(get_fake_data("2025-10-02 23:31:07 UTC"), file_handle) + + # Create symlink to latest + os.symlink( + os.path.join(tmpdir, "reboot-cause-2025_10_02_23_31_07.json"), + os.path.join(tmpdir, "previous-reboot-cause.json"), + ) + + # When + logger = dpm_logger_module.DpmLogger() + loaded_datas = logger.load_all() + + # Then + assert loaded_datas == [ + get_expected_loaded_data(dpm_logger_module, "2025-10-02 23:27:07 UTC"), + get_expected_loaded_data(dpm_logger_module, "2025-10-02 23:29:07 UTC"), + get_expected_loaded_data(dpm_logger_module, "2025-10-02 23:31:07 UTC"), + ] + + def test_retention(self, dpm_logger_module): + # Given + with ( + tempfile.TemporaryDirectory() as tmpdir, + patch.object(dpm_logger_module.DpmLogger, "HISTORY_DIR", new=tmpdir), + patch.object(dpm_logger_module.DpmLogger, "RETENTION", new=3), + ): + # 1st file + with open( + os.path.join(tmpdir, "reboot-cause-2025_10_02_23_27_07.json"), "w" + ) as file_handle: + json.dump(get_fake_data("2025-10-02 23:27:07 UTC"), file_handle) + + # 2nd file + with open( + os.path.join(tmpdir, "reboot-cause-2025_10_02_23_29_07.json"), "w" + ) as file_handle: + json.dump(get_fake_data("2025-10-02 23:29:07 UTC"), file_handle) + + # 3rd file + with open( + os.path.join(tmpdir, "reboot-cause-2025_10_02_23_31_07.json"), "w" + ) as file_handle: + json.dump(get_fake_data("2025-10-02 23:31:07 UTC"), file_handle) + + + # When + logger = dpm_logger_module.DpmLogger() + logger.save([], {}) + + # Then + assert not os.path.exists(os.path.join(tmpdir, "reboot-cause-2025_10_02_23_27_07.json")) + assert os.path.exists(os.path.join(tmpdir, "reboot-cause-2025_10_02_23_29_07.json")) + assert os.path.exists(os.path.join(tmpdir, "reboot-cause-2025_10_02_23_31_07.json")) diff --git a/platform/broadcom/sonic-platform-modules-nexthop/test/unit/sonic_platform/test_reboot_cause_manager.py b/platform/broadcom/sonic-platform-modules-nexthop/test/unit/sonic_platform/test_reboot_cause_manager.py new file mode 100644 index 00000000000..0b6b3a544b4 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-nexthop/test/unit/sonic_platform/test_reboot_cause_manager.py @@ -0,0 +1,1067 @@ +#!/usr/bin/env python + +import datetime +import pytest +import sys + +from fixtures.test_helpers_adm1266 import create_raw_adm1266_blackbox_record +from fixtures.test_helpers_common import temp_file +from unittest.mock import Mock, patch, create_autospec + + +@pytest.fixture +def mock_dpm_logger(): + """Mock the DpmLogger class to avoid writing to filesystem.""" + dpm_logger = Mock() + dpm_logger.DpmLogger = Mock() + with patch.dict(sys.modules, {"sonic_platform.dpm_logger": dpm_logger}): + yield dpm_logger + + +@pytest.fixture +def reboot_cause_manager_module(mock_dpm_logger): + """Loads the module before each test. This is to let conftest.py run first.""" + from sonic_platform import reboot_cause_manager + + yield reboot_cause_manager + + +class TestRebootCauseManager: + """Test class for RebootCauseManager functionality.""" + + def test_summarize_reboot_causes_sw_reboot(self, reboot_cause_manager_module): + # Given + with temp_file( + "User issued 'reboot' command [User: admin, Time: Thu Oct 2 11:22:56 PM UTC 2025]" + ) as sw_reboot_cause_filepath: + pddf_data = {} # Empty pddf_data for tests without DPM devices + pddf_plugin_data = {"REBOOT_CAUSE": {"reboot_cause_file": sw_reboot_cause_filepath}} + + # When + reboot_cause_manager = reboot_cause_manager_module.RebootCauseManager( + pddf_data, pddf_plugin_data + ) + reboot_causes = reboot_cause_manager.summarize_reboot_causes() + + # Then + assert len(reboot_causes) == 1 + assert reboot_causes[0] == reboot_cause_manager_module.RebootCause( + type=reboot_cause_manager_module.RebootCause.Type.SOFTWARE, + source="SW", + timestamp=datetime.datetime(2025, 10, 2, 23, 22, 56, tzinfo=datetime.timezone.utc), + cause="reboot", + description="User issued 'reboot' command [User: admin, Time: Thu Oct 2 11:22:56 PM UTC 2025]", + chassis_reboot_cause_category="REBOOT_CAUSE_NON_HARDWARE", + ) + + def test_summarize_reboot_causes_sw_kernel_panic(self, reboot_cause_manager_module): + # Given + with temp_file( + "Kernel Panic - Out of memory [Time: Thu Oct 21 11:22:59 PM UTC 2025]" + ) as sw_reboot_cause_filepath: + pddf_data = {} # Empty pddf_data for tests without DPM devices + pddf_plugin_data = {"REBOOT_CAUSE": {"reboot_cause_file": sw_reboot_cause_filepath}} + + # When + reboot_cause_manager = reboot_cause_manager_module.RebootCauseManager( + pddf_data, pddf_plugin_data + ) + reboot_causes = reboot_cause_manager.summarize_reboot_causes() + + # Then + assert reboot_causes == [ + reboot_cause_manager_module.RebootCause( + type=reboot_cause_manager_module.RebootCause.Type.SOFTWARE, + source="SW", + timestamp=datetime.datetime( + 2025, 10, 21, 23, 22, 59, tzinfo=datetime.timezone.utc + ), + cause="Kernel Panic - Out of memory", + description="Kernel Panic - Out of memory [Time: Thu Oct 21 11:22:59 PM UTC 2025]", + chassis_reboot_cause_category="REBOOT_CAUSE_NON_HARDWARE", + ) + ] + + def test_summarize_reboot_causes_sw_others(self, reboot_cause_manager_module): + # Given + FULL_SW_CAUSE = "Some software causes that don't match known patterns" + with temp_file(FULL_SW_CAUSE) as sw_reboot_cause_filepath: + pddf_data = {} # Empty pddf_data for tests without DPM devices + pddf_plugin_data = {"REBOOT_CAUSE": {"reboot_cause_file": sw_reboot_cause_filepath}} + + # When + reboot_cause_manager = reboot_cause_manager_module.RebootCauseManager( + pddf_data, pddf_plugin_data + ) + reboot_causes = reboot_cause_manager.summarize_reboot_causes() + + # Then + assert reboot_causes == [ + reboot_cause_manager_module.RebootCause( + type=reboot_cause_manager_module.RebootCause.Type.SOFTWARE, + source="SW", + timestamp=reboot_cause_manager_module.UNKNOWN_TIMESTAMP, + cause=FULL_SW_CAUSE, + description=FULL_SW_CAUSE, + chassis_reboot_cause_category="REBOOT_CAUSE_NON_HARDWARE", + ) + ] + + def test_summarize_reboot_causes_sw_unknown(self, reboot_cause_manager_module): + # Given + with temp_file("Unknown") as sw_reboot_cause_filepath: + pddf_data = {} # Empty pddf_data for tests without DPM devices + pddf_plugin_data = {"REBOOT_CAUSE": {"reboot_cause_file": sw_reboot_cause_filepath}} + + # When + reboot_cause_manager = reboot_cause_manager_module.RebootCauseManager( + pddf_data, pddf_plugin_data + ) + reboot_causes = reboot_cause_manager.summarize_reboot_causes() + + # Then + assert reboot_causes == [] + + def test_summarize_reboot_causes_hw_many_adm1266( + self, mock_dpm_logger, reboot_cause_manager_module + ): + # Given + # DPM1: [unknown (p=10), fault_from_pdi1 (p=11) ]; current_powerup_counter = 12 + # DPM2: [fault_from_pdi1 (p=1) , fault_from_pdi2 (p=2) , unknown (p=3)]; current_powerup_counter = 3 + DPM_1_RECORDS = [ + # 1st powerup - no fault. + create_raw_adm1266_blackbox_record(uid=1, powerup_counter=10), # No PDI + # 2nd powerup - has fault. + create_raw_adm1266_blackbox_record(uid=2, powerup_counter=11), # No PDI + create_raw_adm1266_blackbox_record( + uid=3, + powerup_counter=11, + pdio_in=0b0000_0000_0000_0001, # PDI1 + timestamp=datetime.datetime(2025, 10, 2, 23, 22, 56, tzinfo=datetime.timezone.utc), + ), + ] + DPM_2_RECORDS = [ + # 1st powerup - has fault. + create_raw_adm1266_blackbox_record(uid=1234, powerup_counter=1), # No PDI + create_raw_adm1266_blackbox_record( + uid=1235, + powerup_counter=1, + pdio_in=0b0000_0000_0000_0001, # PDI1 + timestamp=datetime.timedelta(seconds=70), + ), + # 2nd powerup - has fault. + create_raw_adm1266_blackbox_record( + uid=1236, + powerup_counter=2, + pdio_in=0b0000_0000_0001_0010, # PDI5, PDI2 + timestamp=datetime.timedelta(seconds=140), + ), + # 3rd powerup - no fault. + create_raw_adm1266_blackbox_record(uid=1237, powerup_counter=3), # No PDI + create_raw_adm1266_blackbox_record(uid=1238, powerup_counter=3), # No PDI + ] + with ( + temp_file(content=b"".join(DPM_1_RECORDS)) as nvmem_path_1, + temp_file(content=b"".join(DPM_2_RECORDS)) as nvmem_path_2, + temp_file(content="") as rtc_epoch_offset_path_1, + temp_file(content="") as rtc_epoch_offset_path_2, + temp_file(content="12") as powerup_counter_path_1, + temp_file(content="3") as powerup_counter_path_2, + ): + pddf_data = { + "DPM1": {"i2c": {"topo_info": {"parent_bus": "0x0", "dev_addr": "0x40"}}}, + "DPM2": {"i2c": {"topo_info": {"parent_bus": "0x0", "dev_addr": "0x41"}}}, + } + pddf_plugin_data = { + "DPM": { + "test-dpm1": { + "type": "adm1266", + "dpm": "DPM1", + "dpm_signal_to_fault_cause": [ + { + "pdio_mask": "0b0000_0000_0000_0001", # PDI1 + "gpio_mask": "0b0000_0000_0000_0000", + "pdio_value": "0b0000_0000_0000_0001", # PDI1 + "gpio_value": "0b0000_0000_0000_0000", + "hw_cause": "HW_CAUSE_OF_DPM1_PDI1", + "hw_desc": "HW_DESC_OF_DPM1_PDI1", + "reboot_cause": "REBOOT_CAUSE_OF_DPM1_PDI1", + } + ], + }, + "test-dpm2": { + "type": "adm1266", + "dpm": "DPM2", + "dpm_signal_to_fault_cause": [ + { + "pdio_mask": "0b0000_0000_0000_0001", # PDI1 + "gpio_mask": "0b0000_0000_0000_0000", + "pdio_value": "0b0000_0000_0000_0001", # PDI1 + "gpio_value": "0b0000_0000_0000_0000", + "hw_cause": "HW_CAUSE_OF_DPM2_PDI1", + "hw_desc": "HW_DESC_OF_DPM2_PDI1", + "reboot_cause": "REBOOT_CAUSE_OF_DPM2_PDI1", + }, + { + "pdio_mask": "0b0000_0000_0000_0010", # PDI2 + "gpio_mask": "0b0000_0000_0000_0000", + "pdio_value": "0b0000_0000_0000_0010", # PDI2 + "gpio_value": "0b0000_0000_0000_0000", + "hw_cause": "HW_CAUSE_OF_DPM2_PDI2", + "hw_desc": "HW_DESC_OF_DPM2_PDI2", + "reboot_cause": "REBOOT_CAUSE_OF_DPM2_PDI2", + }, + ], + }, + } + } + + # When + reboot_cause_manager = reboot_cause_manager_module.RebootCauseManager( + pddf_data, pddf_plugin_data + ) + # Override the calculated paths with our temp files for testing + for dpm in reboot_cause_manager._dpm_devices: + if dpm.get_name() == "test-dpm1": + dpm._nvmem_path = nvmem_path_1 + dpm._powerup_counter_path = powerup_counter_path_1 + dpm._rtc_epoch_offset_path = rtc_epoch_offset_path_1 + elif dpm.get_name() == "test-dpm2": + dpm._nvmem_path = nvmem_path_2 + dpm._powerup_counter_path = powerup_counter_path_2 + dpm._rtc_epoch_offset_path = rtc_epoch_offset_path_2 + reboot_causes = reboot_cause_manager.summarize_reboot_causes() + + # Then + assert reboot_causes == [ + reboot_cause_manager_module.RebootCause( + type=reboot_cause_manager_module.RebootCause.Type.HARDWARE, + source="test-dpm2", + timestamp=datetime.timedelta(seconds=70), + cause="HW_CAUSE_OF_DPM2_PDI1", + description="HW_DESC_OF_DPM2_PDI1", + chassis_reboot_cause_category="REBOOT_CAUSE_OF_DPM2_PDI1", + ), + reboot_cause_manager_module.RebootCause( + type=reboot_cause_manager_module.RebootCause.Type.HARDWARE, + source="test-dpm1", + timestamp=datetime.datetime( + 2025, 10, 2, 23, 22, 56, tzinfo=datetime.timezone.utc + ), + cause="HW_CAUSE_OF_DPM1_PDI1", + description="HW_DESC_OF_DPM1_PDI1", + chassis_reboot_cause_category="REBOOT_CAUSE_OF_DPM1_PDI1", + ), + ] + # Verify that the DPM records are also saved to history. + mock_dpm_logger.DpmLogger().save.assert_called_once() + args, _ = mock_dpm_logger.DpmLogger().save.call_args + causes, dpm_to_reboot_causes = args + assert isinstance(causes, list), "First param to DpmLogger.save() should be a list" + assert isinstance( + dpm_to_reboot_causes, dict + ), "Second param to DpmLogger.save() should be a dict" + records = [] + for rc_entries in dpm_to_reboot_causes.values(): + for rc_entry in rc_entries: + records.extend(rc_entry.dpm_records) + assert { + "uid": "1", + "dpm_name": "test-dpm1", + "powerup_counter": "10", + "pdio_in_[16:1]": "0b0000000000000000", + }.items() <= records[0].as_dict().items() + assert { + "uid": "2", + "dpm_name": "test-dpm1", + "powerup_counter": "11", + "pdio_in_[16:1]": "0b0000000000000000", + }.items() <= records[1].as_dict().items() + assert { + "timestamp": "2025-10-02 23:22:56 UTC", + "uid": "3", + "dpm_name": "test-dpm1", + "powerup_counter": "11", + "pdio_in_[16:1]": "0b0000000000000001 [PDI1]", + }.items() <= records[2].as_dict().items() + assert { + "uid": "1234", + "dpm_name": "test-dpm2", + "powerup_counter": "1", + "pdio_in_[16:1]": "0b0000000000000000", + }.items() <= records[3].as_dict().items() + assert { + "timestamp": "70.000000s after power-on", + "uid": "1235", + "dpm_name": "test-dpm2", + "powerup_counter": "1", + "pdio_in_[16:1]": "0b0000000000000001 [PDI1]", + }.items() <= records[4].as_dict().items() + assert { + "timestamp": "140.000000s after power-on", + "uid": "1236", + "dpm_name": "test-dpm2", + "powerup_counter": "2", + "pdio_in_[16:1]": "0b0000000000010010 [PDI5, PDI2]", + }.items() <= records[5].as_dict().items() + assert { + "uid": "1237", + "dpm_name": "test-dpm2", + "powerup_counter": "3", + "pdio_in_[16:1]": "0b0000000000000000", + }.items() <= records[6].as_dict().items() + assert { + "uid": "1238", + "dpm_name": "test-dpm2", + "powerup_counter": "3", + "pdio_in_[16:1]": "0b0000000000000000", + }.items() <= records[7].as_dict().items() + + def test_summarize_reboot_causes_hw_unknown(self, reboot_cause_manager_module): + # Given + DPM_RECORDS = [ + create_raw_adm1266_blackbox_record(uid=1, powerup_counter=10), # No PDI + create_raw_adm1266_blackbox_record(uid=2, powerup_counter=11), # No PDI + ] + with ( + temp_file(content=b"".join(DPM_RECORDS)) as nvmem_path, + temp_file(content="12") as powerup_counter_path, + ): + pddf_plugin_data = { + "DPM": { + "test-dpm": { + "type": "adm1266", + "dpm": "DPM", + "dpm_signal_to_fault_cause": [], + } + } + } + + # When + pddf_data = {"DPM": {"i2c": {"topo_info": {"parent_bus": "0x0", "dev_addr": "0x40"}}}} + reboot_cause_manager = reboot_cause_manager_module.RebootCauseManager(pddf_data, pddf_plugin_data) + # Override the calculated paths with our temp files for testing + for dpm in reboot_cause_manager._dpm_devices: + if dpm.get_name() == "test-dpm": + dpm._nvmem_path = nvmem_path + dpm._powerup_counter_path = powerup_counter_path + reboot_causes = reboot_cause_manager.summarize_reboot_causes() + + # Then + assert reboot_causes == [ + reboot_cause_manager_module.UNKNOWN_HW_REBOOT_CAUSE, + reboot_cause_manager_module.UNKNOWN_HW_REBOOT_CAUSE, + ] + + def test_summarize_reboot_causes_hw_two_dpms_no_reboot(self, reboot_cause_manager_module): + # Given + DPM_1_RECORDS = [] # empty + DPM_2_RECORDS = [ + create_raw_adm1266_blackbox_record(uid=1, powerup_counter=10) # No PDI/faults + ] + with ( + temp_file(content=b"".join(DPM_1_RECORDS)) as nvmem_path_1, + temp_file(content=b"".join(DPM_2_RECORDS)) as nvmem_path_2, + temp_file(content="1") as powerup_counter_path_1, + temp_file(content="10") as powerup_counter_path_2, + ): + pddf_plugin_data = { + "DPM": { + "test-dpm1": { + "type": "adm1266", + "dpm": "DPM1", + "dpm_signal_to_fault_cause": [], + }, + "test-dpm2": { + "type": "adm1266", + "dpm": "DPM2", + "dpm_signal_to_fault_cause": [], + }, + } + } + + # When + pddf_data = { + "DPM1": {"i2c": {"topo_info": {"parent_bus": "0x0", "dev_addr": "0x40"}}}, + "DPM2": {"i2c": {"topo_info": {"parent_bus": "0x0", "dev_addr": "0x41"}}}, + } + reboot_cause_manager = reboot_cause_manager_module.RebootCauseManager(pddf_data, pddf_plugin_data) + # Override the calculated paths with our temp files for testing + for dpm in reboot_cause_manager._dpm_devices: + if dpm.get_name() == "test-dpm1": + dpm._nvmem_path = nvmem_path_1 + dpm._powerup_counter_path = powerup_counter_path_1 + elif dpm.get_name() == "test-dpm2": + dpm._nvmem_path = nvmem_path_2 + dpm._powerup_counter_path = powerup_counter_path_2 + reboot_causes = reboot_cause_manager.summarize_reboot_causes() + + # Then + assert reboot_causes == [] + + def test_summarize_reboot_causes_sw_and_hw(self, reboot_cause_manager_module): + # Given + DPM_RECORDS = [ + create_raw_adm1266_blackbox_record( + uid=555, + powerup_counter=1, + pdio_in=0b0000_0000_0100_0001, # PDI7, PDI1 + timestamp=datetime.timedelta(seconds=70), + ), + ] + FULL_SW_CAUSE = ( + "User issued 'reboot' command [User: admin, Time: Thu Oct 2 11:22:56 PM UTC 2025]" + ) + with ( + temp_file(content=FULL_SW_CAUSE) as sw_reboot_cause_filepath, + temp_file(content=b"".join(DPM_RECORDS)) as nvmem_path, + temp_file(content="2") as powerup_counter_path, + ): + pddf_plugin_data = { + "REBOOT_CAUSE": {"reboot_cause_file": sw_reboot_cause_filepath}, + "DPM": { + "test-dpm": { + "type": "adm1266", + "dpm": "DPM", + "dpm_signal_to_fault_cause": [ + { + "pdio_mask": "0b0000_0000_0100_0000", # PDI7 + "gpio_mask": "0b0000_0000_0000_0000", + "pdio_value": "0b0000_0000_0100_0000", # PDI7 + "gpio_value": "0b0000_0000_0000_0000", + "hw_cause": "HW_CAUSE_OF_PDI7", + "hw_desc": "HW_DESC_OF_PDI7", + "reboot_cause": "REBOOT_CAUSE_OF_PDI7", + }, + ], + } + }, + } + # When + pddf_data = {"DPM": {"i2c": {"topo_info": {"parent_bus": "0x0", "dev_addr": "0x40"}}}} + reboot_cause_manager = reboot_cause_manager_module.RebootCauseManager(pddf_data, pddf_plugin_data) + # Override the calculated paths with our temp files for testing + for dpm in reboot_cause_manager._dpm_devices: + if dpm.get_name() == "test-dpm": + dpm._nvmem_path = nvmem_path + dpm._powerup_counter_path = powerup_counter_path + if 'rtc_epoch_offset_path' in locals(): + dpm._rtc_epoch_offset_path = rtc_epoch_offset_path + reboot_causes = reboot_cause_manager.summarize_reboot_causes() + + # Then + assert reboot_causes == [ + reboot_cause_manager_module.RebootCause( + type=reboot_cause_manager_module.RebootCause.Type.SOFTWARE, + source="SW", + timestamp=datetime.datetime( + 2025, 10, 2, 23, 22, 56, tzinfo=datetime.timezone.utc + ), + cause="reboot", + description=FULL_SW_CAUSE, + chassis_reboot_cause_category="REBOOT_CAUSE_NON_HARDWARE", + ), + reboot_cause_manager_module.RebootCause( + type=reboot_cause_manager_module.RebootCause.Type.HARDWARE, + source="test-dpm", + timestamp=datetime.timedelta(seconds=70), + cause="HW_CAUSE_OF_PDI7", + description="HW_DESC_OF_PDI7", + chassis_reboot_cause_category="REBOOT_CAUSE_OF_PDI7", + ), + ] + + def test_summarize_reboot_causes_sw_and_unknown_hw(self, reboot_cause_manager_module): + # Given + FULL_SW_CAUSE = "Kernel Panic [Time: Thu Oct 21 11:22:59 PM UTC 2025]" + DPM_RECORDS = [ + create_raw_adm1266_blackbox_record(uid=555, powerup_counter=1), # No PDI/faults + ] + with ( + temp_file(content=FULL_SW_CAUSE) as sw_reboot_cause_filepath, + temp_file(content=b"".join(DPM_RECORDS)) as nvmem_path, + temp_file(content="2") as powerup_counter_path, + ): + pddf_plugin_data = { + "REBOOT_CAUSE": {"reboot_cause_file": sw_reboot_cause_filepath}, + "DPM": { + "test-dpm": { + "type": "adm1266", + "dpm": "DPM", + "dpm_signal_to_fault_cause": [], + } + }, + } + # When + pddf_data = {"DPM": {"i2c": {"topo_info": {"parent_bus": "0x0", "dev_addr": "0x40"}}}} + reboot_cause_manager = reboot_cause_manager_module.RebootCauseManager(pddf_data, pddf_plugin_data) + # Override the calculated paths with our temp files for testing + for dpm in reboot_cause_manager._dpm_devices: + if dpm.get_name() == "test-dpm": + dpm._nvmem_path = nvmem_path + dpm._powerup_counter_path = powerup_counter_path + if 'rtc_epoch_offset_path' in locals(): + dpm._rtc_epoch_offset_path = rtc_epoch_offset_path + reboot_causes = reboot_cause_manager.summarize_reboot_causes() + + # Then + assert reboot_causes == [ + reboot_cause_manager_module.RebootCause( + type=reboot_cause_manager_module.RebootCause.Type.SOFTWARE, + source="SW", + timestamp=datetime.datetime( + 2025, 10, 21, 23, 22, 59, tzinfo=datetime.timezone.utc + ), + cause="Kernel Panic", + description=FULL_SW_CAUSE, + chassis_reboot_cause_category="REBOOT_CAUSE_NON_HARDWARE", + ), + reboot_cause_manager_module.UNKNOWN_HW_REBOOT_CAUSE, + ] + + def test_fill_in_missing_and_align_powerups(self, reboot_cause_manager_module): + # Given + # - max_powerup = 65535 + # - DPM1: [65531, 1, 2]; current_powerup = 5 + # - DPM2: [65534, 2, 5, 6]; current_powerup = 6 + # - DPM3: []; current_powerup = 1 + # - Notes: powerup numbers of DPM1 and DPM2 are independent. + # Should return: + # - 9 power cycles (as evidenced from DPM1) + # - DPM1: [65531, None, None, None, None, 1, 2, None, None] + # - DPM2: [None, None, 65534, None, None, 2, None, None, 5] + # - DPM3: [None, None, None, None, None, None, None, None, None] + dpm_1 = create_autospec(reboot_cause_manager_module.DpmBase) + dpm_2 = create_autospec(reboot_cause_manager_module.DpmBase) + dpm_3 = create_autospec(reboot_cause_manager_module.DpmBase) + dpm_1.max_powerup_counter.return_value = 65535 + dpm_2.max_powerup_counter.return_value = 65535 + dpm_3.max_powerup_counter.return_value = 65535 + dpm_1.get_powerup_counter.return_value = 5 + dpm_2.get_powerup_counter.return_value = 6 + dpm_3.get_powerup_counter.return_value = 1 + + DPM_1_POWERUPS = [ + reboot_cause_manager_module.DpmPowerUpEntry( + powerup_counter=65531, + power_fault_cause=None, + dpm_records=[], + ), + reboot_cause_manager_module.DpmPowerUpEntry( + powerup_counter=1, + power_fault_cause=None, + dpm_records=[], + ), + reboot_cause_manager_module.DpmPowerUpEntry( + powerup_counter=2, + power_fault_cause=None, + dpm_records=[], + ), + ] + DPM_2_POWERUPS = [ + reboot_cause_manager_module.DpmPowerUpEntry( + powerup_counter=65534, + power_fault_cause=None, + dpm_records=[], + ), + reboot_cause_manager_module.DpmPowerUpEntry( + powerup_counter=2, + power_fault_cause=None, + dpm_records=[], + ), + reboot_cause_manager_module.DpmPowerUpEntry( + powerup_counter=5, + power_fault_cause=None, + dpm_records=[], + ), + reboot_cause_manager_module.DpmPowerUpEntry( + powerup_counter=6, + power_fault_cause=None, + dpm_records=[], + ), + ] + DPM_3_POWERUPS = [] + dpm_to_powerups = { + dpm_1: DPM_1_POWERUPS, + dpm_2: DPM_2_POWERUPS, + dpm_3: DPM_3_POWERUPS, + } + + # When + result, num_power_cycles = reboot_cause_manager_module.fill_in_missing_and_align_powerups( + dpm_to_powerups + ) + + # Then + assert num_power_cycles == 9 + assert result == { + dpm_1: [ + DPM_1_POWERUPS[0], # 65531 + None, # 65532 + None, # 65533 + None, # 65534 + None, # 65535 + DPM_1_POWERUPS[1], # 1 + DPM_1_POWERUPS[2], # 2 + None, # 3 + None, # 4 + ], + dpm_2: [ + None, # 65532 + None, # 65533 + DPM_2_POWERUPS[0], # 65534 + None, # 65535 + None, # 1 + DPM_2_POWERUPS[1], # 2 + None, # 3 + None, # 4 + DPM_2_POWERUPS[2], # 5 + ], + dpm_3: [ + None, # 65527 + None, # 65528 + None, # 65529 + None, # 65530 + None, # 65531 + None, # 65532 + None, # 65533 + None, # 65534 + None, # 65535 + ], + } + + def test_fill_in_missing_and_align_powerups_and_squash_dpm_powerups( + self, reboot_cause_manager_module + ): + # Given + # - max_powerup = 65535 + # - DPM1: [65533, 65534, 65535, 1, 2]; current_powerup = 3 + # - DPM2: [6, 8]; current_powerup = 10 + # Which means: + # - DPM1: [FAULT (p=65533), unknown (p=65534), FAULT (p=65535), unknown (p=1), FAULT (p=2)] + # - DPM2: [unknown (p=5), FAULT (p=6), unknown (p=7), FAULT (p=8), unknown (p=9)] + dpm_1 = create_autospec(reboot_cause_manager_module.DpmBase) + dpm_2 = create_autospec(reboot_cause_manager_module.DpmBase) + dpm_1.max_powerup_counter.return_value = 65535 + dpm_2.max_powerup_counter.return_value = 65535 + dpm_1.get_powerup_counter.return_value = 3 + dpm_2.get_powerup_counter.return_value = 10 + + DPM_1_POWERUPS = [ + reboot_cause_manager_module.DpmPowerUpEntry( + powerup_counter=65533, + power_fault_cause=reboot_cause_manager_module.RebootCause( + type=reboot_cause_manager_module.RebootCause.Type.HARDWARE, + source="test-dpm-1", + timestamp=datetime.datetime(2025, 10, 1, 2, 3, 4, tzinfo=datetime.timezone.utc), + cause="HW_CAUSE_DPM1_P65533", + description="HW_DESC_DPM1_P65533", + chassis_reboot_cause_category="REBOOT_CAUSE_DPM1_P65533", + ), + dpm_records=[], + ), + reboot_cause_manager_module.DpmPowerUpEntry( + powerup_counter=65534, + power_fault_cause=None, + dpm_records=[], + ), + reboot_cause_manager_module.DpmPowerUpEntry( + powerup_counter=65535, + power_fault_cause=reboot_cause_manager_module.RebootCause( + type=reboot_cause_manager_module.RebootCause.Type.HARDWARE, + source="test-dpm-1", + timestamp=datetime.datetime(2025, 10, 1, 4, 5, 6, tzinfo=datetime.timezone.utc), + cause="HW_CAUSE_DPM1_P65535", + description="HW_DESC_DPM1_P65535", + chassis_reboot_cause_category="REBOOT_CAUSE_DPM1_P65535", + ), + dpm_records=[], + ), + reboot_cause_manager_module.DpmPowerUpEntry( + powerup_counter=1, + power_fault_cause=None, + dpm_records=[], + ), + reboot_cause_manager_module.DpmPowerUpEntry( + powerup_counter=2, + power_fault_cause=reboot_cause_manager_module.RebootCause( + type=reboot_cause_manager_module.RebootCause.Type.HARDWARE, + source="test-dpm-1", + timestamp=datetime.datetime(2025, 10, 1, 7, 8, 9, tzinfo=datetime.timezone.utc), + cause="HW_CAUSE_DPM1_P2", + description="HW_DESC_DPM1_P2", + chassis_reboot_cause_category="REBOOT_CAUSE_DPM1_P2", + ), + dpm_records=[], + ), + ] + DPM_2_POWERUPS = [ + reboot_cause_manager_module.DpmPowerUpEntry( + powerup_counter=6, + power_fault_cause=reboot_cause_manager_module.RebootCause( + type=reboot_cause_manager_module.RebootCause.Type.HARDWARE, + source="test-dpm-1", + timestamp=datetime.datetime(2025, 10, 1, 3, 4, 5, tzinfo=datetime.timezone.utc), + cause="HW_CAUSE_DPM2_P6", + description="HW_DESC_DPM2_P6", + chassis_reboot_cause_category="REBOOT_CAUSE_DPM2_P6", + ), + dpm_records=[], + ), + reboot_cause_manager_module.DpmPowerUpEntry( + powerup_counter=8, + power_fault_cause=reboot_cause_manager_module.RebootCause( + type=reboot_cause_manager_module.RebootCause.Type.HARDWARE, + source="test-dpm-1", + timestamp=datetime.datetime(2025, 10, 1, 5, 6, 7, tzinfo=datetime.timezone.utc), + cause="HW_CAUSE_DPM2_P8", + description="HW_DESC_DPM2_P8", + chassis_reboot_cause_category="REBOOT_CAUSE_DPM2_P8", + ), + dpm_records=[], + ), + ] + dpm_to_powerups = { + dpm_1: DPM_1_POWERUPS, + dpm_2: DPM_2_POWERUPS, + } + + # When + result, num_power_cycles = reboot_cause_manager_module.fill_in_missing_and_align_powerups( + dpm_to_powerups + ) + + # Then + assert num_power_cycles == 5 + assert result == { + dpm_1: [ + DPM_1_POWERUPS[0], + DPM_1_POWERUPS[1], + DPM_1_POWERUPS[2], + DPM_1_POWERUPS[3], + DPM_1_POWERUPS[4], + ], + dpm_2: [ + None, + DPM_2_POWERUPS[0], + None, + DPM_2_POWERUPS[1], + None, + ], + } + + # And When + causes = reboot_cause_manager_module.squash_dpms_powerups_to_cause_per_reboot( + dpm_to_powerups + ) + + # Then + assert causes == [ + DPM_1_POWERUPS[0].power_fault_cause, + DPM_2_POWERUPS[0].power_fault_cause, + DPM_1_POWERUPS[2].power_fault_cause, + DPM_2_POWERUPS[1].power_fault_cause, + DPM_1_POWERUPS[4].power_fault_cause, + ] + + def test_merge_sw_and_hw_causes(self, reboot_cause_manager_module): + # Given + DPM_RECORDS = [ + create_raw_adm1266_blackbox_record( + uid=555, + powerup_counter=1, + pdio_in=0b0000_0000_0100_0001, # PDI7, PDI1 + timestamp=datetime.datetime(2025, 10, 2, 9, 10, 11, tzinfo=datetime.timezone.utc), + ), + create_raw_adm1266_blackbox_record( + uid=556, + powerup_counter=2, + pdio_in=0b0000_0000_0100_0000, # PDI7 + timestamp=datetime.datetime(2025, 10, 3, 9, 10, 11, tzinfo=datetime.timezone.utc), + ), + ] + FULL_SW_CAUSE = ( + "User issued 'reboot' command [User: admin, Time: Thu Oct 2 11:22:56 PM UTC 2025]" + ) + with ( + temp_file(content=FULL_SW_CAUSE) as sw_reboot_cause_filepath, + temp_file(content=b"".join(DPM_RECORDS)) as nvmem_path, + temp_file(content="") as rtc_epoch_offset_path, + temp_file(content="3") as powerup_counter_path, + ): + pddf_plugin_data = { + "REBOOT_CAUSE": {"reboot_cause_file": sw_reboot_cause_filepath}, + "DPM": { + "test-dpm": { + "type": "adm1266", + "dpm": "DPM", + "dpm_signal_to_fault_cause": [ + { + "pdio_mask": "0b0000_0000_0100_0000", # PDI7 + "gpio_mask": "0b0000_0000_0000_0000", + "pdio_value": "0b0000_0000_0100_0000", # PDI7 + "gpio_value": "0b0000_0000_0000_0000", + "hw_cause": "HW_CAUSE_OF_PDI7", + "hw_desc": "HW_DESC_OF_PDI7", + "reboot_cause": "REBOOT_CAUSE_OF_PDI7", + }, + ], + } + }, + } + # When + pddf_data = {"DPM": {"i2c": {"topo_info": {"parent_bus": "0x0", "dev_addr": "0x40"}}}} + reboot_cause_manager = reboot_cause_manager_module.RebootCauseManager(pddf_data, pddf_plugin_data) + # Override the calculated paths with our temp files for testing + for dpm in reboot_cause_manager._dpm_devices: + if dpm.get_name() == "test-dpm": + dpm._nvmem_path = nvmem_path + dpm._powerup_counter_path = powerup_counter_path + if 'rtc_epoch_offset_path' in locals(): + dpm._rtc_epoch_offset_path = rtc_epoch_offset_path + reboot_causes = reboot_cause_manager.summarize_reboot_causes() + + # Then + assert reboot_causes == [ + reboot_cause_manager_module.RebootCause( + type=reboot_cause_manager_module.RebootCause.Type.HARDWARE, + source="test-dpm", + timestamp=datetime.datetime( + 2025, 10, 2, 9, 10, 11, tzinfo=datetime.timezone.utc + ), + cause="HW_CAUSE_OF_PDI7", + description="HW_DESC_OF_PDI7", + chassis_reboot_cause_category="REBOOT_CAUSE_OF_PDI7", + ), + reboot_cause_manager_module.RebootCause( + type=reboot_cause_manager_module.RebootCause.Type.SOFTWARE, + source="SW", + timestamp=datetime.datetime( + 2025, 10, 2, 23, 22, 56, tzinfo=datetime.timezone.utc + ), + cause="reboot", + description=FULL_SW_CAUSE, + chassis_reboot_cause_category="REBOOT_CAUSE_NON_HARDWARE", + ), + reboot_cause_manager_module.RebootCause( + type=reboot_cause_manager_module.RebootCause.Type.HARDWARE, + source="test-dpm", + timestamp=datetime.datetime( + 2025, 10, 3, 9, 10, 11, tzinfo=datetime.timezone.utc + ), + cause="HW_CAUSE_OF_PDI7", + description="HW_DESC_OF_PDI7", + chassis_reboot_cause_category="REBOOT_CAUSE_OF_PDI7", + ), + ] + + def test_squash_sw_and_hw_causes(self, reboot_cause_manager_module): + # Given + FULL_SW_CAUSE = ( + "User issued 'reboot' command [User: admin, Time: Thu Oct 2 11:22:56 PM UTC 2025]" + ) + DPM_RECORDS = [ + create_raw_adm1266_blackbox_record( + uid=555, + powerup_counter=1, + pdio_in=0b0000_0001_0000_0000, # PDI9 + timestamp=datetime.datetime( + 2025, 10, 2, 23, 24, 56, tzinfo=datetime.timezone.utc # 2 mins after SW reboot + ), + ), + ] + with ( + temp_file(content=FULL_SW_CAUSE) as sw_reboot_cause_filepath, + temp_file(content=b"".join(DPM_RECORDS)) as nvmem_path, + temp_file(content="") as rtc_epoch_offset_path, + temp_file(content="2") as powerup_counter_path, + ): + pddf_plugin_data = { + "REBOOT_CAUSE": {"reboot_cause_file": sw_reboot_cause_filepath}, + "DPM": { + "test-dpm": { + "type": "adm1266", + "dpm": "DPM", + "dpm_signal_to_fault_cause": [ + { + "pdio_mask": "0b0000_0001_0000_0000", # PDI9 + "gpio_mask": "0b0000_0000_0000_0000", + "pdio_value": "0b0000_0001_0000_0000", # PDI9 + "gpio_value": "0b0000_0000_0000_0000", + "hw_cause": "CPU_CMD_PCYC", + "hw_desc": "CPU card commanded power cycle", + "reboot_cause": "REBOOT_CAUSE_POWER_LOSS", + }, + ], + } + }, + } + # When + pddf_data = {"DPM": {"i2c": {"topo_info": {"parent_bus": "0x0", "dev_addr": "0x40"}}}} + reboot_cause_manager = reboot_cause_manager_module.RebootCauseManager(pddf_data, pddf_plugin_data) + # Override the calculated paths with our temp files for testing + for dpm in reboot_cause_manager._dpm_devices: + if dpm.get_name() == "test-dpm": + dpm._nvmem_path = nvmem_path + dpm._powerup_counter_path = powerup_counter_path + if 'rtc_epoch_offset_path' in locals(): + dpm._rtc_epoch_offset_path = rtc_epoch_offset_path + reboot_causes = reboot_cause_manager.summarize_reboot_causes() + + # Then + assert reboot_causes == [ + reboot_cause_manager_module.RebootCause( + type=reboot_cause_manager_module.RebootCause.Type.SOFTWARE, + source="SW", + timestamp=datetime.datetime( + 2025, 10, 2, 23, 22, 56, tzinfo=datetime.timezone.utc + ), + cause="reboot", + description=FULL_SW_CAUSE, + chassis_reboot_cause_category="REBOOT_CAUSE_NON_HARDWARE", + ), + ] + + def test_squash_sw_and_hw_causes_kernel_panic(self, reboot_cause_manager_module): + # Given + FULL_SW_CAUSE = ( + "Kernel Panic - Out of memory [Time: Thu Oct 21 11:22:59 PM UTC 2025]" + ) + DPM_RECORDS = [ + create_raw_adm1266_blackbox_record( + uid=555, + powerup_counter=1, + pdio_in=0b0000_0001_0000_0000, # PDI9 + timestamp=datetime.datetime( + 2025, 10, 21, 23, 23, 9, tzinfo=datetime.timezone.utc # 10 seconds after Kernel Panic + ), + ), + ] + with ( + temp_file(content=FULL_SW_CAUSE) as sw_reboot_cause_filepath, + temp_file(content=b"".join(DPM_RECORDS)) as nvmem_path, + temp_file(content="") as rtc_epoch_offset_path, + temp_file(content="2") as powerup_counter_path, + ): + pddf_plugin_data = { + "REBOOT_CAUSE": {"reboot_cause_file": sw_reboot_cause_filepath}, + "DPM": { + "test-dpm": { + "type": "adm1266", + "dpm": "DPM", + "dpm_signal_to_fault_cause": [ + { + "pdio_mask": "0b0000_0001_0000_0000", # PDI9 + "gpio_mask": "0b0000_0000_0000_0000", + "pdio_value": "0b0000_0001_0000_0000", # PDI9 + "gpio_value": "0b0000_0000_0000_0000", + "hw_cause": "CPU_CMD_PCYC", + "hw_desc": "CPU card commanded power cycle", + "reboot_cause": "REBOOT_CAUSE_POWER_LOSS", + }, + ], + } + }, + } + # When + pddf_data = {"DPM": {"i2c": {"topo_info": {"parent_bus": "0x0", "dev_addr": "0x40"}}}} + reboot_cause_manager = reboot_cause_manager_module.RebootCauseManager(pddf_data, pddf_plugin_data) + # Override the calculated paths with our temp files for testing + for dpm in reboot_cause_manager._dpm_devices: + if dpm.get_name() == "test-dpm": + dpm._nvmem_path = nvmem_path + dpm._powerup_counter_path = powerup_counter_path + if 'rtc_epoch_offset_path' in locals(): + dpm._rtc_epoch_offset_path = rtc_epoch_offset_path + reboot_causes = reboot_cause_manager.summarize_reboot_causes() + + # Then + assert reboot_causes == [ + reboot_cause_manager_module.RebootCause( + type=reboot_cause_manager_module.RebootCause.Type.SOFTWARE, + source="SW", + timestamp=datetime.datetime( + 2025, 10, 21, 23, 22, 59, tzinfo=datetime.timezone.utc + ), + cause="Kernel Panic - Out of memory", + description=FULL_SW_CAUSE, + chassis_reboot_cause_category="REBOOT_CAUSE_NON_HARDWARE", + ), + ] + + def test_squash_sw_and_hw_causes_longer_than_3m_10s(self, reboot_cause_manager_module): + # Given + FULL_SW_CAUSE = ( + "User issued 'reboot' command [User: admin, Time: Thu Oct 2 11:22:56 PM UTC 2025]" + ) + DPM_RECORDS = [ + create_raw_adm1266_blackbox_record( + uid=555, + powerup_counter=1, + pdio_in=0b0000_0001_0000_0000, # PDI9 + timestamp=datetime.datetime( + 2025, 10, 2, 23, 26, 7, tzinfo=datetime.timezone.utc # 3 mins 11s after SW reboot + ), + ), + ] + with ( + temp_file(content=FULL_SW_CAUSE) as sw_reboot_cause_filepath, + temp_file(content=b"".join(DPM_RECORDS)) as nvmem_path, + temp_file(content="") as rtc_epoch_offset_path, + temp_file(content="2") as powerup_counter_path, + ): + pddf_plugin_data = { + "REBOOT_CAUSE": {"reboot_cause_file": sw_reboot_cause_filepath}, + "DPM": { + "test-dpm": { + "type": "adm1266", + "dpm": "DPM", + "dpm_signal_to_fault_cause": [ + { + "pdio_mask": "0b0000_0001_0000_0000", # PDI9 + "gpio_mask": "0b0000_0000_0000_0000", + "pdio_value": "0b0000_0001_0000_0000", # PDI9 + "gpio_value": "0b0000_0000_0000_0000", + "hw_cause": "CPU_CMD_PCYC", + "hw_desc": "CPU card commanded power cycle", + "reboot_cause": "REBOOT_CAUSE_POWER_LOSS", + }, + ], + } + }, + } + # When + pddf_data = {"DPM": {"i2c": {"topo_info": {"parent_bus": "0x0", "dev_addr": "0x40"}}}} + reboot_cause_manager = reboot_cause_manager_module.RebootCauseManager(pddf_data, pddf_plugin_data) + # Override the calculated paths with our temp files for testing + for dpm in reboot_cause_manager._dpm_devices: + if dpm.get_name() == "test-dpm": + dpm._nvmem_path = nvmem_path + dpm._powerup_counter_path = powerup_counter_path + if 'rtc_epoch_offset_path' in locals(): + dpm._rtc_epoch_offset_path = rtc_epoch_offset_path + reboot_causes = reboot_cause_manager.summarize_reboot_causes() + + # Then + assert reboot_causes == [ + reboot_cause_manager_module.RebootCause( + type=reboot_cause_manager_module.RebootCause.Type.SOFTWARE, + source="SW", + timestamp=datetime.datetime( + 2025, 10, 2, 23, 22, 56, tzinfo=datetime.timezone.utc + ), + cause="reboot", + description=FULL_SW_CAUSE, + chassis_reboot_cause_category="REBOOT_CAUSE_NON_HARDWARE", + ), + reboot_cause_manager_module.RebootCause( + type=reboot_cause_manager_module.RebootCause.Type.HARDWARE, + source="test-dpm", + timestamp=datetime.datetime( + 2025, 10, 2, 23, 26, 7, tzinfo=datetime.timezone.utc + ), + cause="CPU_CMD_PCYC", + description="CPU card commanded power cycle", + chassis_reboot_cause_category="REBOOT_CAUSE_POWER_LOSS", + ), + ] diff --git a/platform/broadcom/sonic-platform-modules-nexthop/test/unit/utils/test_adm1266_rtc_sync.py b/platform/broadcom/sonic-platform-modules-nexthop/test/unit/utils/test_adm1266_rtc_sync.py new file mode 100644 index 00000000000..7de7b63c801 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-nexthop/test/unit/utils/test_adm1266_rtc_sync.py @@ -0,0 +1,197 @@ +#!/usr/bin/env python3 + +# Copyright 2025 Nexthop Systems Inc. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 + +import importlib +import os +import pytest +import sys + +from unittest.mock import patch + +# Prevent Python from writing .pyc files during test imports +# This avoids __pycache__ directories in common/utils/ that interfere with builds +sys.dont_write_bytecode = True + + +@pytest.fixture +def adm1266_rtc_sync_module(): + """Loads the module before each test. This is to let conftest.py inject deps first.""" + # For files without .py extension, we need to use SourceFileLoader explicitly + TEST_DIR = os.path.dirname(os.path.realpath(__file__)) + adm1266_rtc_sync_path = os.path.join(TEST_DIR, "../../../common/utils/adm1266_rtc_sync") + loader = importlib.machinery.SourceFileLoader("adm1266_rtc_sync", adm1266_rtc_sync_path) + spec = importlib.util.spec_from_loader(loader.name, loader) + adm1266_rtc_sync_module = importlib.util.module_from_spec(spec) + spec.loader.exec_module(adm1266_rtc_sync_module) + + yield adm1266_rtc_sync_module + + +class TestAdm1266RtcSync: + """Test class for adm1266_rtc_sync functionality.""" + + def test_main_ok_with_no_dpms(self, adm1266_rtc_sync_module): + # Given + with ( + patch.object(adm1266_rtc_sync_module, "load_pd_plugin_config", return_value={}), + patch.object(adm1266_rtc_sync_module, "load_pddf_device_config", return_value={}), + ): + # When + ret = adm1266_rtc_sync_module.main() + # Then + assert ret == 0 + + def test_main_ok_with_non_adm1266_dpm(self, adm1266_rtc_sync_module): + # Given + with ( + patch.object( + adm1266_rtc_sync_module, + "load_pd_plugin_config", + return_value={ + "DPM": { + "test-dpm1": {"type": "unknown"}, + "test-dpm2": {"type": "unknown"}, + } + }, + ), + patch.object(adm1266_rtc_sync_module, "load_pddf_device_config", return_value={}), + ): + # When + ret = adm1266_rtc_sync_module.main() + # Then + assert ret == 0 + + def test_main_ok_with_adm1266_dpm_and_rtc_epoch_offset_path(self, adm1266_rtc_sync_module): + # Given + written_value = None + + def mock_open_func(path, mode): + nonlocal written_value + if mode == "w" and "rtc_epoch_offset" in path: + # Mock file object for writing + class MockFile: + def write(self, value): + nonlocal written_value + written_value = value + + def __enter__(self): + return self + + def __exit__(self, *args): + pass + + return MockFile() + # For other files, use the real open + return open(path, mode) + + with ( + patch.object( + adm1266_rtc_sync_module, + "load_pd_plugin_config", + return_value={ + "DPM": { + "test-dpm": { + "type": "adm1266", + "dpm": "DPM1", + }, + } + }, + ), + patch.object( + adm1266_rtc_sync_module, + "load_pddf_device_config", + return_value={ + "DPM1": {"i2c": {"topo_info": {"parent_bus": "0x7", "dev_addr": "0x41"}}} + }, + ), + patch("builtins.open", side_effect=mock_open_func), + ): + # When + ret = adm1266_rtc_sync_module.main() + # Then + assert ret == 0 + assert written_value == "1704067200" + + def test_main_fail_with_missing_dpm_field(self, adm1266_rtc_sync_module): + # Given + with ( + patch.object( + adm1266_rtc_sync_module, + "load_pd_plugin_config", + return_value={ + "DPM": { + "test-dpm": { + "type": "adm1266", + # Missing "dpm" field + }, + } + }, + ), + patch.object( + adm1266_rtc_sync_module, + "load_pddf_device_config", + return_value={ + "DPM1": {"i2c": {"topo_info": {"parent_bus": "0x7", "dev_addr": "0x41"}}} + }, + ), + ): + # When + ret = adm1266_rtc_sync_module.main() + # Then + assert ret == 1 + + def test_main_fail_when_some_dpms_fail(self, adm1266_rtc_sync_module): + # Given + written_value = None + + def mock_open_func(path, mode): + nonlocal written_value + if mode == "w" and "rtc_epoch_offset" in path: + # Mock file object for writing + class MockFile: + def write(self, value): + nonlocal written_value + written_value = value + + def __enter__(self): + return self + + def __exit__(self, *args): + pass + + return MockFile() + # For other files, use the real open + return open(path, mode) + + with ( + patch.object( + adm1266_rtc_sync_module, + "load_pd_plugin_config", + return_value={ + "DPM": { + "test-dpm": { + "type": "adm1266", + "dpm": "DPM1", + }, + # Missing "dpm" field for test-dpm2 + "test-dpm2": { + "type": "adm1266", + }, + } + }, + ), + patch.object( + adm1266_rtc_sync_module, + "load_pddf_device_config", + return_value={ + "DPM1": {"i2c": {"topo_info": {"parent_bus": "0x7", "dev_addr": "0x41"}}} + }, + ), + patch("builtins.open", side_effect=mock_open_func), + ): + # When + ret = adm1266_rtc_sync_module.main() + # Then + assert ret == 1 diff --git a/platform/broadcom/sonic-platform-modules-nexthop/test/unit/utils/test_nh_reboot_cause.py b/platform/broadcom/sonic-platform-modules-nexthop/test/unit/utils/test_nh_reboot_cause.py index 35c62ae2894..9d08ac2a6f4 100644 --- a/platform/broadcom/sonic-platform-modules-nexthop/test/unit/utils/test_nh_reboot_cause.py +++ b/platform/broadcom/sonic-platform-modules-nexthop/test/unit/utils/test_nh_reboot_cause.py @@ -8,41 +8,49 @@ This script sets up the necessary mocks and imports to test the CLI tool. """ -import base64 import importlib -import json +import datetime import os import pytest +import re +import textwrap import sys -import tempfile -from unittest.mock import Mock, patch +from click.testing import CliRunner +from fixtures.test_helpers_adm1266 import create_raw_adm1266_blackbox_record +from unittest.mock import patch, create_autospec # Prevent Python from writing .pyc files during test imports # This avoids __pycache__ directories in common/utils/ that interfere with builds sys.dont_write_bytecode = True -class MockChassisBase: - REBOOT_CAUSE_HARDWARE_OTHER = "Unknown" - REBOOT_CAUSE_POWER_LOSS = "Power Loss" - REBOOT_CAUSE_THERMAL_OVERLOAD_CPU = "Thermal Overload" - REBOOT_CAUSE_WATCHDOG = "Watchdog" +@pytest.fixture +def dpm_logger_module(): + """Loads the module before each test. This is to let conftest.py inject deps first.""" + from sonic_platform import dpm_logger + + yield dpm_logger - def __init__(self, *args, **kwargs): - pass @pytest.fixture -def mock_chassis_base(): - """Injects and returns a mock ChassisBase for testing.""" - chassis_base = Mock() - chassis_base.ChassisBase = MockChassisBase - with patch.dict(sys.modules, {"sonic_platform_base.chassis_base": chassis_base}): - yield chassis_base.ChassisBase +def dpm_base_module(): + """Loads the module before each test. This is to let conftest.py run first.""" + from sonic_platform import dpm_base + + yield dpm_base @pytest.fixture -def nh_reboot_cause_module(mock_chassis_base): +def adm1266_module(): + """Loads the module before each test. This is to let conftest.py run first.""" + from sonic_platform import adm1266 + + yield adm1266 + + +@pytest.fixture +def nh_reboot_cause_module(): """Loads the module before each test. This is to let conftest.py inject deps first.""" # For files without .py extension, we need to use SourceFileLoader explicitly TEST_DIR = os.path.dirname(os.path.realpath(__file__)) @@ -55,147 +63,700 @@ def nh_reboot_cause_module(mock_chassis_base): yield nh_reboot_cause_module -def create_test_data(): - """Create test DPM fault records in the correct envelope format. - - The 'raw' field must be a base64-encoded string (as stored by Serializer) - representing 64 bytes of blackbox data. - """ - # Create a minimal 64-byte raw record (all zeros) and encode it - raw_bytes = bytes(64) - raw_encoded = 'base64:' + base64.b64encode(raw_bytes).decode('ascii') - - records = [ - { - "dpm_name": "test-dpm-1", - "fault_uid": "0x1234", - "power_loss": "Yes", - "timestamp": "2025-01-15 10:30:45", - "dpm_fault": "PSU input power lost", - "raw": raw_encoded, - }, - { - "dpm_name": "test-dpm-2", - "fault_uid": "0x5678", - "power_loss": "No", - "timestamp": "2025-01-15 10:30:46", - "dpm_fault": "Watchdog timeout", - "raw": raw_encoded, - } - ] - - return { - "dpm_type": "adm1266", - "gen_time": "2025_01_15_10_30_45", - "schema_version": 1, - "records_json": records +def create_data_v1_sw_reboot(dpm_logger_module): + return dpm_logger_module.DataV1( + gen_time="2025-10-02 23:24:32 UTC", + schema_version=1, + causes=[ + dpm_logger_module.CauseV1( + source="SW", + timestamp="2025-10-02 23:22:06 UTC", + cause="reboot", + description="n/a", + ), + dpm_logger_module.CauseV1( + source="cpu_card", + timestamp="2025-10-02 23:22:56 UTC", + cause="FPGA_PWR_CYC_REQ", + description="FPGA requested power cycle", + ), + ], + dpms=[ + dpm_logger_module.DpmV1( + name="cpu_card", + type="adm1266", + records=[ + { + "timestamp": "2025-10-02 23:22:56 UTC", + "dpm_name": "cpu_card", + "power_fault_cause": "FPGA_PWR_CYC_REQ (FPGA requested power cycle), under_voltage: VH1(POS12V), over_voltage: n/a", + "uid": "12345", + "powerup_counter": "1000", + "gpio_in_[7:4,9:8,R,R,R,3:1]": "0b100000000000 [GPI7]", + "pdio_in_[16:1]": "0b0000000000000010 [PDI2]", + "vh_over_voltage_[4:1]": "0b0000", + "vh_under_voltage_[4:1]": "0b0001 [VH1(POS12V)]", + "raw": textwrap.dedent( + """\ + 01 02 03 04 05 06 07 08 + 11 12 13 14 15 16 17 18 + 21 22 23 24 25 26 27 28 + 31 32 33 34 35 36 37 38 + ff ff ff ff ff ff ff ff + ff ff ff ff ff ff ff ff + ff ff ff ff ff ff ff ff + ff ff ff ff ff ff ff ab""" + ), + } + ], + ), + dpm_logger_module.DpmV1( + name="switch_card", + type="adm1266", + records=[ + { + "timestamp": "2025-10-02 22:10:10 UTC", + "dpm_name": "switch_card", + "power_fault_cause": "n/a, under_voltage: n/a, over_voltage: n/a", + "uid": "23455", + "powerup_counter": "2000", + "gpio_in_[7:4,9:8,R,R,R,3:1]": "0b000000000000", + "pdio_in_[16:1]": "0b0000000000000000", + "vh_over_voltage_[4:1]": "0b0000", + "vh_under_voltage_[4:1]": "0b0000", + "raw": textwrap.dedent( + """\ + 01 02 03 04 05 06 07 08 + 11 12 13 14 15 16 17 18 + 21 22 23 24 25 26 27 28 + 31 32 33 34 35 36 37 38 + ff ff ff ff ff ff ff ff + ff ff ff ff ff ff ff ff + ff ff ff ff ff ff ff ff + ff ff ff ff ff ff ff ab""" + ), + }, + { + "timestamp": "2025-10-02 23:22:56 UTC", + "dpm_name": "switch_card", + "power_fault_cause": "CPU_PWR_CYC_REQ (CPU card commanded power cycle), under_voltage: VH1(12V), over_voltage: n/a", + "uid": "23456", + "powerup_counter": "2000", + "gpio_in_[7:4,9:8,R,R,R,3:1]": "0b000000000000", + "pdio_in_[16:1]": "0b0000000100000000 [PDI9]", + "vh_over_voltage_[4:1]": "0b0000", + "vh_under_voltage_[4:1]": "0b0001 [VH1(12V)]", + "raw": textwrap.dedent( + """\ + 01 02 03 04 05 06 07 08 + 11 12 13 14 15 16 17 18 + 21 22 23 24 25 26 27 28 + 31 32 33 34 35 36 37 38 + ff ff ff ff ff ff ff ff + ff ff ff ff ff ff ff ff + ff ff ff ff ff ff ff ff + ff ff ff ff ff ff ff ab""" + ), + }, + { + "timestamp": "37.123456s after power-on", + "dpm_name": "switch_card", + "power_fault_cause": "n/a, under_voltage: n/a, over_voltage: n/a", + "uid": "23457", + "powerup_counter": "2001", + "gpio_in_[7:4,9:8,R,R,R,3:1]": "0b000000000000", + "pdio_in_[16:1]": "0b0000000000000000", + "vh_over_voltage_[4:1]": "0b0000", + "vh_under_voltage_[4:1]": "0b0000", + "raw": textwrap.dedent( + """\ + 01 02 03 04 05 06 07 08 + 11 12 13 14 15 16 17 18 + 21 22 23 24 25 26 27 28 + 31 32 33 34 35 36 37 38 + ff ff ff ff ff ff ff ff + ff ff ff ff ff ff ff ff + ff ff ff ff ff ff ff ff + ff ff ff ff ff ff ff ab""" + ), + }, + ], + ), + ], + ) + + +def create_data_v1_hw_watchdog(dpm_logger_module): + return dpm_logger_module.DataV1( + gen_time="2025-10-03 05:13:55 UTC", + schema_version=1, + causes=[ + dpm_logger_module.CauseV1( + source="switch_card", + timestamp="2025-10-03 05:12:39 UTC", + cause="WATCHDOG", + description="FPGA watchdog expired", + ), + ], + dpms=[ + dpm_logger_module.DpmV1( + name="cpu_card", + type="adm1266", + records=[ + { + "timestamp": "2025-10-03 05:12:38 UTC", + "dpm_name": "cpu_card", + "power_fault_cause": "n/a, under_voltage: VH1(POS12V), over_voltage: n/a", + "uid": "12346", + "powerup_counter": "1001", + "gpio_in_[7:4,9:8,R,R,R,3:1]": "0b000000000000", + "pdio_in_[16:1]": "0b0000000000000000", + "vh_over_voltage_[4:1]": "0b0000", + "vh_under_voltage_[4:1]": "0b0001 [VH1(POS12V)]", + "raw": textwrap.dedent( + """\ + 01 02 03 04 05 06 07 08 + 11 12 13 14 15 16 17 18 + 21 22 23 24 25 26 27 28 + 31 32 33 34 35 36 37 38 + ff ff ff ff ff ff ff ff + ff ff ff ff ff ff ff ff + ff ff ff ff ff ff ff ff + ff ff ff ff ff ff ff ab""" + ), + } + ], + ), + dpm_logger_module.DpmV1( + name="switch_card", + type="adm1266", + records=[ + { + "timestamp": "2025-10-03 05:12:39 UTC", + "dpm_name": "switch_card", + "power_fault_cause": "WATCHDOG (FPGA watchdog expired), under_voltage: VH1(12V), over_voltage: n/a", + "uid": "23458", + "powerup_counter": "2001", + "gpio_in_[7:4,9:8,R,R,R,3:1]": "0b000000000000", + "pdio_in_[16:1]": "0b0000000000001000 [PDI4]", + "vh_over_voltage_[4:1]": "0b0000", + "vh_under_voltage_[4:1]": "0b0001 [VH1(12V)]", + "raw": textwrap.dedent( + """\ + 01 02 03 04 05 06 07 08 + 11 12 13 14 15 16 17 18 + 21 22 23 24 25 26 27 28 + 31 32 33 34 35 36 37 38 + ff ff ff ff ff ff ff ff + ff ff ff ff ff ff ff ff + ff ff ff ff ff ff ff ff + ff ff ff ff ff ff ff ab""" + ), + }, + ], + ), + ], + ) + + +def test_show_current(dpm_logger_module, nh_reboot_cause_module): + # Given + DATA_V1 = create_data_v1_sw_reboot(dpm_logger_module) + mock_logger = create_autospec(nh_reboot_cause_module.DpmLogger, instance=True) + mock_logger.load.return_value = DATA_V1 + + with patch.object(nh_reboot_cause_module, "DpmLogger", autospec=True, return_value=mock_logger): + # When + result = CliRunner().invoke(nh_reboot_cause_module.reboot_cause) + + # Then + assert result.exit_code == 0 + assert result.output == textwrap.dedent( + """\ + === Captured at 2025-10-02 23:24:32 UTC === + [2025-10-02 23:22:56 UTC] cause: FPGA_PWR_CYC_REQ; description: FPGA requested power cycle; source: cpu_card + [2025-10-02 23:22:06 UTC] cause: reboot; description: n/a; source: SW + """ + ) + + +def test_read_blackbox(dpm_base_module, adm1266_module, nh_reboot_cause_module): + # Given + dpm_1 = create_autospec(dpm_base_module.DpmBase) + dpm_2 = create_autospec(dpm_base_module.DpmBase) + # Ensure DpmLogger.to_data sees real names/types instead of MagicMocks + dpm_1.get_name.return_value = "dpm1" + dpm_1.get_type.return_value = dpm_base_module.DpmType.ADM1266 + dpm_2.get_name.return_value = "dpm2" + dpm_2.get_type.return_value = dpm_base_module.DpmType.ADM1266 + DPM_TO_POWERUPS = { + dpm_1: [ + dpm_base_module.DpmPowerUpEntry( + powerup_counter=2, + power_fault_cause=None, + dpm_records=[ + adm1266_module.Adm1266BlackBoxRecord.from_bytes( + create_raw_adm1266_blackbox_record( + uid=1234, + empty=False, + pdio_in=0b0000_0000_1000_0000, # PDI8 + powerup_counter=456, + timestamp=datetime.timedelta(seconds=1234), + crc=0xAB, + ), + "dpm1", + ) + ], + ), + ], + dpm_2: [], } - -def test_show_current(nh_reboot_cause_module, capsys): - """Test showing current reboot-cause.""" - with tempfile.TemporaryDirectory() as tmpdir: - original_history_dir = nh_reboot_cause_module.SystemDPMLogHistory.HISTORY_DIR - nh_reboot_cause_module.SystemDPMLogHistory.HISTORY_DIR = tmpdir - - try: - # Create test data file - test_data = create_test_data() - timestamp = "2025_01_15_10_30_45" - test_file = os.path.join(tmpdir, f"reboot-cause-{timestamp}.json") - - with open(test_file, 'w') as f: - json.dump(test_data, f) - - # Create symlink to latest - prev_link = os.path.join(tmpdir, "previous-reboot-cause.json") - os.symlink(test_file, prev_link) - - # Test show_current and verify output - nh_reboot_cause_module.show_current() - captured = capsys.readouterr() - - assert "test-dpm-1" in captured.out, "Expected DPM name in output" - assert "test-dpm-2" in captured.out, "Expected second DPM name in output" - assert "0x1234" in captured.out, "Expected fault UID in output" - assert "Unsupported DPM type" not in captured.out, "Should not show DPM type error" - - finally: - nh_reboot_cause_module.SystemDPMLogHistory.HISTORY_DIR = original_history_dir - - -def test_show_history(nh_reboot_cause_module, capsys): - """Test showing reboot-cause history.""" - with tempfile.TemporaryDirectory() as tmpdir: - original_history_dir = nh_reboot_cause_module.SystemDPMLogHistory.HISTORY_DIR - nh_reboot_cause_module.SystemDPMLogHistory.HISTORY_DIR = tmpdir - - try: - # Create multiple test data files - test_data = create_test_data() - timestamps = ["2025_01_15_10_30_45", "2025_01_15_11_45_30", "2025_01_15_14_20_15"] - - for ts in timestamps: - test_file = os.path.join(tmpdir, f"reboot-cause-{ts}.json") - with open(test_file, 'w') as f: - json.dump(test_data, f) - - # Create symlink to latest - latest_file = os.path.join(tmpdir, f"reboot-cause-{timestamps[-1]}.json") - prev_link = os.path.join(tmpdir, "previous-reboot-cause.json") - os.symlink(latest_file, prev_link) - - # Test show_history and verify output - nh_reboot_cause_module.show_history() - captured = capsys.readouterr() - - assert captured.out.count("Logs recorded at") == len(timestamps), \ - f"Expected {len(timestamps)} history entries" - assert "test-dpm-1" in captured.out, "Expected DPM name in history output" - - finally: - nh_reboot_cause_module.SystemDPMLogHistory.HISTORY_DIR = original_history_dir - - -def test_cli_help(nh_reboot_cause_module): - """Test that the CLI command is properly configured with click.""" - cli = nh_reboot_cause_module.reboot_cause - - # Verify the command has help text - assert cli.help is not None, "CLI command should have help text" - assert "reboot-cause" in cli.help.lower(), "Help text should mention reboot-cause" - - # Verify --history option exists - has_history_option = any(param.name == 'history' for param in cli.params) - assert has_history_option, "CLI should have --history option" - - -def test_unsupported_dpm_type(nh_reboot_cause_module, capsys): - """Test that unsupported DPM types are rejected.""" - with tempfile.TemporaryDirectory() as tmpdir: - original_history_dir = nh_reboot_cause_module.SystemDPMLogHistory.HISTORY_DIR - nh_reboot_cause_module.SystemDPMLogHistory.HISTORY_DIR = tmpdir - - try: - # Create test data with wrong DPM type - test_data = create_test_data() - test_data["dpm_type"] = "unknown_dpm" - timestamp = "2025_01_15_10_30_45" - test_file = os.path.join(tmpdir, f"reboot-cause-{timestamp}.json") - - with open(test_file, 'w') as f: - json.dump(test_data, f) - - prev_link = os.path.join(tmpdir, "previous-reboot-cause.json") - os.symlink(test_file, prev_link) - - # Test show_current with wrong DPM type - nh_reboot_cause_module.show_current() - captured = capsys.readouterr() - - assert "Unsupported DPM type" in captured.out, "Should show DPM type error" - assert "unknown_dpm" in captured.out, "Should mention the unsupported DPM type" - - finally: - nh_reboot_cause_module.SystemDPMLogHistory.HISTORY_DIR = original_history_dir - + mock_manager = create_autospec(nh_reboot_cause_module.RebootCauseManager, instance=True) + mock_manager.read_hw_reboot_causes.return_value = ([], DPM_TO_POWERUPS) + + with patch.object( + nh_reboot_cause_module, "check_root_privileges", autospec=True, return_value=None + ), patch.object( + nh_reboot_cause_module.pddf_config_parser, + "load_pddf_device_config", + autospec=True, + return_value={}, + ), patch.object( + nh_reboot_cause_module.pddf_config_parser, + "load_pd_plugin_config", + autospec=True, + return_value={}, + ), patch.object( + nh_reboot_cause_module, "RebootCauseManager", autospec=True, return_value=mock_manager + ): + # When + result = CliRunner().invoke(nh_reboot_cause_module.reboot_cause, ["read-blackbox"]) + + # Then + assert result.exit_code == 0 + normalized_output = re.sub( + r"=== Captured at .*? ===", "=== Captured at IGNORED_TIMESTAMP ===", result.output + ) + assert normalized_output == textwrap.dedent( + """\ + === Captured at IGNORED_TIMESTAMP === + DPM records: + dpm1:powerup_456:uid_1234 timestamp: 1234.000000s after power-on + dpm_name: dpm1 + power_fault_cause: n/a; under_voltage: n/a; over_voltage: n/a + uid: 1234 + byte_2: 0x00 + action_index: 0 + rule_index: 0 + vh_over_voltage_[4:1]: 0b0000 + vh_under_voltage_[4:1]: 0b0000 + current_state: 9 + last_state: 8 + vp_over_voltage_[13:1]: 0b0000000000000 + vp_under_voltage_[13:1]: 0b0000000000000 + gpio_in_[7:4,9:8,R,R,R,3:1]: 0b000000000000 + gpio_out_[7:4,9:8,R,R,R,3:1]: 0b000000000000 + pdio_in_[16:1]: 0b0000000010000000 [PDI8] + pdio_out_[16:1]: 0b0000000000000000 + powerup_counter: 456 + crc: 0xab + raw: d2 04 00 00 00 00 09 00 + 08 00 00 00 00 00 00 00 + 00 00 80 00 00 00 c8 01 + 00 00 d2 04 00 00 00 00 + ff ff ff ff ff ff ff ff + ff ff ff ff ff ff ff ff + ff ff ff ff ff ff ff ff + ff ff ff ff ff ff ff ab + + """ + ) + + +def test_read_blackbox_empty(nh_reboot_cause_module): + # Given + mock_manager = create_autospec(nh_reboot_cause_module.RebootCauseManager, instance=True) + mock_manager.read_hw_reboot_causes.return_value = ([], {}) + + with patch.object( + nh_reboot_cause_module, "check_root_privileges", autospec=True, return_value=None + ), patch.object( + nh_reboot_cause_module.pddf_config_parser, + "load_pddf_device_config", + autospec=True, + return_value={}, + ), patch.object( + nh_reboot_cause_module.pddf_config_parser, + "load_pd_plugin_config", + autospec=True, + return_value={}, + ), patch.object( + nh_reboot_cause_module, "RebootCauseManager", autospec=True, return_value=mock_manager + ): + # When + result = CliRunner().invoke(nh_reboot_cause_module.reboot_cause, ["read-blackbox"]) + + # Then + assert result.exit_code == 0 + normalized_output = re.sub(r"^.*? - ", "IGNORED_TIMESTAMP - ", result.output) + assert ( + normalized_output + == "IGNORED_TIMESTAMP - No blackbox records found from DPMs on the system\n" + ) + + +def test_show_current_verbosity_1(dpm_logger_module, nh_reboot_cause_module): + # Given + DATA_V1 = create_data_v1_sw_reboot(dpm_logger_module) + mock_logger = create_autospec(nh_reboot_cause_module.DpmLogger, instance=True) + mock_logger.load.return_value = DATA_V1 + + with patch.object(nh_reboot_cause_module, "DpmLogger", autospec=True, return_value=mock_logger): + # When + result = CliRunner().invoke(nh_reboot_cause_module.reboot_cause, ["-v"]) + + # Then + assert result.exit_code == 0 + assert result.output == textwrap.dedent( + """\ + === Captured at 2025-10-02 23:24:32 UTC === + [2025-10-02 23:22:56 UTC] cause: FPGA_PWR_CYC_REQ; description: FPGA requested power cycle; source: cpu_card + [2025-10-02 23:22:06 UTC] cause: reboot; description: n/a; source: SW + DPM records: + cpu_card:powerup_1000:uid_12345 timestamp: 2025-10-02 23:22:56 UTC + power_fault_cause: FPGA_PWR_CYC_REQ (FPGA requested power cycle), under_voltage: VH1(POS12V), over_voltage: n/a + gpio_in_[7:4,9:8,R,R,R,3:1]: 0b100000000000 [GPI7] + pdio_in_[16:1]: 0b0000000000000010 [PDI2] + + switch_card:powerup_2001:uid_23457 timestamp: 37.123456s after power-on + power_fault_cause: n/a, under_voltage: n/a, over_voltage: n/a + gpio_in_[7:4,9:8,R,R,R,3:1]: 0b000000000000 + pdio_in_[16:1]: 0b0000000000000000 + + switch_card:powerup_2000:uid_23456 timestamp: 2025-10-02 23:22:56 UTC + power_fault_cause: CPU_PWR_CYC_REQ (CPU card commanded power cycle), under_voltage: VH1(12V), over_voltage: n/a + gpio_in_[7:4,9:8,R,R,R,3:1]: 0b000000000000 + pdio_in_[16:1]: 0b0000000100000000 [PDI9] + + switch_card:powerup_2000:uid_23455 timestamp: 2025-10-02 22:10:10 UTC + power_fault_cause: n/a, under_voltage: n/a, over_voltage: n/a + gpio_in_[7:4,9:8,R,R,R,3:1]: 0b000000000000 + pdio_in_[16:1]: 0b0000000000000000 + + """ + ) + + +def test_show_current_verbosity_2(dpm_logger_module, nh_reboot_cause_module): + # Given + DATA_V1 = create_data_v1_sw_reboot(dpm_logger_module) + mock_logger = create_autospec(nh_reboot_cause_module.DpmLogger, instance=True) + mock_logger.load.return_value = DATA_V1 + + with patch.object(nh_reboot_cause_module, "DpmLogger", autospec=True, return_value=mock_logger): + # When + result = CliRunner().invoke(nh_reboot_cause_module.reboot_cause, ["-vv"]) + + # Then + assert result.exit_code == 0 + assert result.output == textwrap.dedent( + """\ + === Captured at 2025-10-02 23:24:32 UTC === + [2025-10-02 23:22:56 UTC] cause: FPGA_PWR_CYC_REQ; description: FPGA requested power cycle; source: cpu_card + [2025-10-02 23:22:06 UTC] cause: reboot; description: n/a; source: SW + DPM records: + cpu_card:powerup_1000:uid_12345 timestamp: 2025-10-02 23:22:56 UTC + dpm_name: cpu_card + power_fault_cause: FPGA_PWR_CYC_REQ (FPGA requested power cycle), under_voltage: VH1(POS12V), over_voltage: n/a + uid: 12345 + powerup_counter: 1000 + gpio_in_[7:4,9:8,R,R,R,3:1]: 0b100000000000 [GPI7] + pdio_in_[16:1]: 0b0000000000000010 [PDI2] + vh_over_voltage_[4:1]: 0b0000 + vh_under_voltage_[4:1]: 0b0001 [VH1(POS12V)] + raw: 01 02 03 04 05 06 07 08 + 11 12 13 14 15 16 17 18 + 21 22 23 24 25 26 27 28 + 31 32 33 34 35 36 37 38 + ff ff ff ff ff ff ff ff + ff ff ff ff ff ff ff ff + ff ff ff ff ff ff ff ff + ff ff ff ff ff ff ff ab + + switch_card:powerup_2001:uid_23457 timestamp: 37.123456s after power-on + dpm_name: switch_card + power_fault_cause: n/a, under_voltage: n/a, over_voltage: n/a + uid: 23457 + powerup_counter: 2001 + gpio_in_[7:4,9:8,R,R,R,3:1]: 0b000000000000 + pdio_in_[16:1]: 0b0000000000000000 + vh_over_voltage_[4:1]: 0b0000 + vh_under_voltage_[4:1]: 0b0000 + raw: 01 02 03 04 05 06 07 08 + 11 12 13 14 15 16 17 18 + 21 22 23 24 25 26 27 28 + 31 32 33 34 35 36 37 38 + ff ff ff ff ff ff ff ff + ff ff ff ff ff ff ff ff + ff ff ff ff ff ff ff ff + ff ff ff ff ff ff ff ab + + switch_card:powerup_2000:uid_23456 timestamp: 2025-10-02 23:22:56 UTC + dpm_name: switch_card + power_fault_cause: CPU_PWR_CYC_REQ (CPU card commanded power cycle), under_voltage: VH1(12V), over_voltage: n/a + uid: 23456 + powerup_counter: 2000 + gpio_in_[7:4,9:8,R,R,R,3:1]: 0b000000000000 + pdio_in_[16:1]: 0b0000000100000000 [PDI9] + vh_over_voltage_[4:1]: 0b0000 + vh_under_voltage_[4:1]: 0b0001 [VH1(12V)] + raw: 01 02 03 04 05 06 07 08 + 11 12 13 14 15 16 17 18 + 21 22 23 24 25 26 27 28 + 31 32 33 34 35 36 37 38 + ff ff ff ff ff ff ff ff + ff ff ff ff ff ff ff ff + ff ff ff ff ff ff ff ff + ff ff ff ff ff ff ff ab + + switch_card:powerup_2000:uid_23455 timestamp: 2025-10-02 22:10:10 UTC + dpm_name: switch_card + power_fault_cause: n/a, under_voltage: n/a, over_voltage: n/a + uid: 23455 + powerup_counter: 2000 + gpio_in_[7:4,9:8,R,R,R,3:1]: 0b000000000000 + pdio_in_[16:1]: 0b0000000000000000 + vh_over_voltage_[4:1]: 0b0000 + vh_under_voltage_[4:1]: 0b0000 + raw: 01 02 03 04 05 06 07 08 + 11 12 13 14 15 16 17 18 + 21 22 23 24 25 26 27 28 + 31 32 33 34 35 36 37 38 + ff ff ff ff ff ff ff ff + ff ff ff ff ff ff ff ff + ff ff ff ff ff ff ff ff + ff ff ff ff ff ff ff ab + + """ + ) + + +def test_show_history(dpm_logger_module, nh_reboot_cause_module): + # Given + DATA_V1 = [ + create_data_v1_sw_reboot(dpm_logger_module), + create_data_v1_hw_watchdog(dpm_logger_module), + ] + mock_logger = create_autospec(nh_reboot_cause_module.DpmLogger, instance=True) + mock_logger.load_all.return_value = DATA_V1 + + with patch.object(nh_reboot_cause_module, "DpmLogger", autospec=True, return_value=mock_logger): + # When + result = CliRunner().invoke(nh_reboot_cause_module.reboot_cause, ["history"]) + + # Then + assert result.exit_code == 0 + assert result.output == textwrap.dedent( + """\ + === Captured at 2025-10-03 05:13:55 UTC === + [2025-10-03 05:12:39 UTC] cause: WATCHDOG; description: FPGA watchdog expired; source: switch_card + === Captured at 2025-10-02 23:24:32 UTC === + [2025-10-02 23:22:56 UTC] cause: FPGA_PWR_CYC_REQ; description: FPGA requested power cycle; source: cpu_card + [2025-10-02 23:22:06 UTC] cause: reboot; description: n/a; source: SW + """ + ) + + +def test_show_history_verbosity_1(dpm_logger_module, nh_reboot_cause_module): + # Given + DATA_V1 = [ + create_data_v1_sw_reboot(dpm_logger_module), + create_data_v1_hw_watchdog(dpm_logger_module), + ] + mock_logger = create_autospec(nh_reboot_cause_module.DpmLogger, instance=True) + mock_logger.load_all.return_value = DATA_V1 + + with patch.object(nh_reboot_cause_module, "DpmLogger", autospec=True, return_value=mock_logger): + # When + result = CliRunner().invoke(nh_reboot_cause_module.reboot_cause, ["history", "-v"]) + + # Then + assert result.exit_code == 0 + assert result.output == textwrap.dedent( + """\ + === Captured at 2025-10-03 05:13:55 UTC === + [2025-10-03 05:12:39 UTC] cause: WATCHDOG; description: FPGA watchdog expired; source: switch_card + DPM records: + cpu_card:powerup_1001:uid_12346 timestamp: 2025-10-03 05:12:38 UTC + power_fault_cause: n/a, under_voltage: VH1(POS12V), over_voltage: n/a + gpio_in_[7:4,9:8,R,R,R,3:1]: 0b000000000000 + pdio_in_[16:1]: 0b0000000000000000 + + switch_card:powerup_2001:uid_23458 timestamp: 2025-10-03 05:12:39 UTC + power_fault_cause: WATCHDOG (FPGA watchdog expired), under_voltage: VH1(12V), over_voltage: n/a + gpio_in_[7:4,9:8,R,R,R,3:1]: 0b000000000000 + pdio_in_[16:1]: 0b0000000000001000 [PDI4] + + === Captured at 2025-10-02 23:24:32 UTC === + [2025-10-02 23:22:56 UTC] cause: FPGA_PWR_CYC_REQ; description: FPGA requested power cycle; source: cpu_card + [2025-10-02 23:22:06 UTC] cause: reboot; description: n/a; source: SW + DPM records: + cpu_card:powerup_1000:uid_12345 timestamp: 2025-10-02 23:22:56 UTC + power_fault_cause: FPGA_PWR_CYC_REQ (FPGA requested power cycle), under_voltage: VH1(POS12V), over_voltage: n/a + gpio_in_[7:4,9:8,R,R,R,3:1]: 0b100000000000 [GPI7] + pdio_in_[16:1]: 0b0000000000000010 [PDI2] + + switch_card:powerup_2001:uid_23457 timestamp: 37.123456s after power-on + power_fault_cause: n/a, under_voltage: n/a, over_voltage: n/a + gpio_in_[7:4,9:8,R,R,R,3:1]: 0b000000000000 + pdio_in_[16:1]: 0b0000000000000000 + + switch_card:powerup_2000:uid_23456 timestamp: 2025-10-02 23:22:56 UTC + power_fault_cause: CPU_PWR_CYC_REQ (CPU card commanded power cycle), under_voltage: VH1(12V), over_voltage: n/a + gpio_in_[7:4,9:8,R,R,R,3:1]: 0b000000000000 + pdio_in_[16:1]: 0b0000000100000000 [PDI9] + + switch_card:powerup_2000:uid_23455 timestamp: 2025-10-02 22:10:10 UTC + power_fault_cause: n/a, under_voltage: n/a, over_voltage: n/a + gpio_in_[7:4,9:8,R,R,R,3:1]: 0b000000000000 + pdio_in_[16:1]: 0b0000000000000000 + + """ + ) + + +def test_show_history_verbosity_2(dpm_logger_module, nh_reboot_cause_module): + # Given + DATA_V1 = [ + create_data_v1_sw_reboot(dpm_logger_module), + create_data_v1_hw_watchdog(dpm_logger_module), + ] + mock_logger = create_autospec(nh_reboot_cause_module.DpmLogger, instance=True) + mock_logger.load_all.return_value = DATA_V1 + + with patch.object(nh_reboot_cause_module, "DpmLogger", autospec=True, return_value=mock_logger): + # When + result = CliRunner().invoke(nh_reboot_cause_module.reboot_cause, ["history", "-vv"]) + + # Then + assert result.exit_code == 0 + assert result.output == textwrap.dedent( + """\ + === Captured at 2025-10-03 05:13:55 UTC === + [2025-10-03 05:12:39 UTC] cause: WATCHDOG; description: FPGA watchdog expired; source: switch_card + DPM records: + cpu_card:powerup_1001:uid_12346 timestamp: 2025-10-03 05:12:38 UTC + dpm_name: cpu_card + power_fault_cause: n/a, under_voltage: VH1(POS12V), over_voltage: n/a + uid: 12346 + powerup_counter: 1001 + gpio_in_[7:4,9:8,R,R,R,3:1]: 0b000000000000 + pdio_in_[16:1]: 0b0000000000000000 + vh_over_voltage_[4:1]: 0b0000 + vh_under_voltage_[4:1]: 0b0001 [VH1(POS12V)] + raw: 01 02 03 04 05 06 07 08 + 11 12 13 14 15 16 17 18 + 21 22 23 24 25 26 27 28 + 31 32 33 34 35 36 37 38 + ff ff ff ff ff ff ff ff + ff ff ff ff ff ff ff ff + ff ff ff ff ff ff ff ff + ff ff ff ff ff ff ff ab + + switch_card:powerup_2001:uid_23458 timestamp: 2025-10-03 05:12:39 UTC + dpm_name: switch_card + power_fault_cause: WATCHDOG (FPGA watchdog expired), under_voltage: VH1(12V), over_voltage: n/a + uid: 23458 + powerup_counter: 2001 + gpio_in_[7:4,9:8,R,R,R,3:1]: 0b000000000000 + pdio_in_[16:1]: 0b0000000000001000 [PDI4] + vh_over_voltage_[4:1]: 0b0000 + vh_under_voltage_[4:1]: 0b0001 [VH1(12V)] + raw: 01 02 03 04 05 06 07 08 + 11 12 13 14 15 16 17 18 + 21 22 23 24 25 26 27 28 + 31 32 33 34 35 36 37 38 + ff ff ff ff ff ff ff ff + ff ff ff ff ff ff ff ff + ff ff ff ff ff ff ff ff + ff ff ff ff ff ff ff ab + + === Captured at 2025-10-02 23:24:32 UTC === + [2025-10-02 23:22:56 UTC] cause: FPGA_PWR_CYC_REQ; description: FPGA requested power cycle; source: cpu_card + [2025-10-02 23:22:06 UTC] cause: reboot; description: n/a; source: SW + DPM records: + cpu_card:powerup_1000:uid_12345 timestamp: 2025-10-02 23:22:56 UTC + dpm_name: cpu_card + power_fault_cause: FPGA_PWR_CYC_REQ (FPGA requested power cycle), under_voltage: VH1(POS12V), over_voltage: n/a + uid: 12345 + powerup_counter: 1000 + gpio_in_[7:4,9:8,R,R,R,3:1]: 0b100000000000 [GPI7] + pdio_in_[16:1]: 0b0000000000000010 [PDI2] + vh_over_voltage_[4:1]: 0b0000 + vh_under_voltage_[4:1]: 0b0001 [VH1(POS12V)] + raw: 01 02 03 04 05 06 07 08 + 11 12 13 14 15 16 17 18 + 21 22 23 24 25 26 27 28 + 31 32 33 34 35 36 37 38 + ff ff ff ff ff ff ff ff + ff ff ff ff ff ff ff ff + ff ff ff ff ff ff ff ff + ff ff ff ff ff ff ff ab + + switch_card:powerup_2001:uid_23457 timestamp: 37.123456s after power-on + dpm_name: switch_card + power_fault_cause: n/a, under_voltage: n/a, over_voltage: n/a + uid: 23457 + powerup_counter: 2001 + gpio_in_[7:4,9:8,R,R,R,3:1]: 0b000000000000 + pdio_in_[16:1]: 0b0000000000000000 + vh_over_voltage_[4:1]: 0b0000 + vh_under_voltage_[4:1]: 0b0000 + raw: 01 02 03 04 05 06 07 08 + 11 12 13 14 15 16 17 18 + 21 22 23 24 25 26 27 28 + 31 32 33 34 35 36 37 38 + ff ff ff ff ff ff ff ff + ff ff ff ff ff ff ff ff + ff ff ff ff ff ff ff ff + ff ff ff ff ff ff ff ab + + switch_card:powerup_2000:uid_23456 timestamp: 2025-10-02 23:22:56 UTC + dpm_name: switch_card + power_fault_cause: CPU_PWR_CYC_REQ (CPU card commanded power cycle), under_voltage: VH1(12V), over_voltage: n/a + uid: 23456 + powerup_counter: 2000 + gpio_in_[7:4,9:8,R,R,R,3:1]: 0b000000000000 + pdio_in_[16:1]: 0b0000000100000000 [PDI9] + vh_over_voltage_[4:1]: 0b0000 + vh_under_voltage_[4:1]: 0b0001 [VH1(12V)] + raw: 01 02 03 04 05 06 07 08 + 11 12 13 14 15 16 17 18 + 21 22 23 24 25 26 27 28 + 31 32 33 34 35 36 37 38 + ff ff ff ff ff ff ff ff + ff ff ff ff ff ff ff ff + ff ff ff ff ff ff ff ff + ff ff ff ff ff ff ff ab + + switch_card:powerup_2000:uid_23455 timestamp: 2025-10-02 22:10:10 UTC + dpm_name: switch_card + power_fault_cause: n/a, under_voltage: n/a, over_voltage: n/a + uid: 23455 + powerup_counter: 2000 + gpio_in_[7:4,9:8,R,R,R,3:1]: 0b000000000000 + pdio_in_[16:1]: 0b0000000000000000 + vh_over_voltage_[4:1]: 0b0000 + vh_under_voltage_[4:1]: 0b0000 + raw: 01 02 03 04 05 06 07 08 + 11 12 13 14 15 16 17 18 + 21 22 23 24 25 26 27 28 + 31 32 33 34 35 36 37 38 + ff ff ff ff ff ff ff ff + ff ff ff ff ff ff ff ff + ff ff ff ff ff ff ff ff + ff ff ff ff ff ff ff ab + + """ + ) diff --git a/platform/broadcom/sonic-platform-modules-nokia b/platform/broadcom/sonic-platform-modules-nokia index 374fd53d690..bbd67705dcd 160000 --- a/platform/broadcom/sonic-platform-modules-nokia +++ b/platform/broadcom/sonic-platform-modules-nokia @@ -1 +1 @@ -Subproject commit 374fd53d690462b1f461b47f738b859e8d9edce4 +Subproject commit bbd67705dcd96f27b22df66801c1326049f6495f diff --git a/platform/broadcom/sonic-platform-modules-ragile/common/script/dev_monitor.py b/platform/broadcom/sonic-platform-modules-ragile/common/script/dev_monitor.py index e13377b80fe..59477639080 100755 --- a/platform/broadcom/sonic-platform-modules-ragile/common/script/dev_monitor.py +++ b/platform/broadcom/sonic-platform-modules-ragile/common/script/dev_monitor.py @@ -108,18 +108,20 @@ def getpresentstatus(self, param): return ret def removeDev(self, bus, loc): - cmd = "echo 0x%02x > /sys/bus/i2c/devices/i2c-%d/delete_device" % (loc, bus) devpath = "/sys/bus/i2c/devices/%d-%04x" % (bus, loc) if os.path.exists(devpath): - os.system(cmd) + delete_file = "/sys/bus/i2c/devices/i2c-%d/delete_device" % bus + with open(delete_file, 'w') as f: + f.write("0x%02x\n" % loc) def addDev(self, name, bus, loc): if name == "lm75": time.sleep(0.1) - cmd = "echo %s 0x%02x > /sys/bus/i2c/devices/i2c-%d/new_device" % (name, loc, bus) devpath = "/sys/bus/i2c/devices/%d-%04x" % (bus, loc) if os.path.exists(devpath) is False: - os.system(cmd) + new_device_file = "/sys/bus/i2c/devices/i2c-%d/new_device" % bus + with open(new_device_file, 'w') as f: + f.write("%s 0x%02x\n" % (name, loc)) def checkattr(self, bus, loc, attr): try: diff --git a/platform/broadcom/sonic-platform-modules-ragile/common/script/generate_airflow.py b/platform/broadcom/sonic-platform-modules-ragile/common/script/generate_airflow.py index 29d18e7b268..74c12d9e068 100755 --- a/platform/broadcom/sonic-platform-modules-ragile/common/script/generate_airflow.py +++ b/platform/broadcom/sonic-platform-modules-ragile/common/script/generate_airflow.py @@ -16,6 +16,7 @@ } ''' import os +import subprocess import syslog import json from platform_config import AIR_FLOW_CONF, AIRFLOW_RESULT_FILE @@ -222,12 +223,11 @@ def generate_airflow(): out_file_dir = os.path.dirname(AIRFLOW_RESULT_FILE) if len(out_file_dir) != 0: - cmd = "mkdir -p %s" % out_file_dir - os.system(cmd) - os.system("sync") + subprocess.call(["mkdir", "-p", out_file_dir]) + subprocess.call(["sync"]) with open(AIRFLOW_RESULT_FILE, "w") as fd: fd.write(ret_json) - os.system("sync") + subprocess.call(["sync"]) if __name__ == '__main__': diff --git a/platform/broadcom/sonic-platform-modules-ragile/common/script/intelligent_monitor/monitor_fan.py b/platform/broadcom/sonic-platform-modules-ragile/common/script/intelligent_monitor/monitor_fan.py index c84319f3b79..adc9cd1e04d 100755 --- a/platform/broadcom/sonic-platform-modules-ragile/common/script/intelligent_monitor/monitor_fan.py +++ b/platform/broadcom/sonic-platform-modules-ragile/common/script/intelligent_monitor/monitor_fan.py @@ -2,6 +2,7 @@ # -*- coding: UTF-8 -*- import os +import subprocess import time import logging from logging.handlers import RotatingFileHandler @@ -19,8 +20,8 @@ def _init_logger(): if not os.path.exists(LOG_FILE): - os.system("mkdir -p %s" % os.path.dirname(LOG_FILE)) - os.system("sync") + subprocess.call(["mkdir", "-p", os.path.dirname(LOG_FILE)]) + subprocess.call(["sync"]) handler = RotatingFileHandler(filename=LOG_FILE, maxBytes=5 * 1024 * 1024, backupCount=1) formatter = logging.Formatter("%(asctime)s %(levelname)s %(filename)s[%(funcName)s][%(lineno)s]: %(message)s") handler.setFormatter(formatter) diff --git a/platform/broadcom/sonic-platform-modules-ragile/common/script/intelligent_monitor/tests/test_monitor_fan.py b/platform/broadcom/sonic-platform-modules-ragile/common/script/intelligent_monitor/tests/test_monitor_fan.py new file mode 100644 index 00000000000..1f2abc7f605 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/common/script/intelligent_monitor/tests/test_monitor_fan.py @@ -0,0 +1,291 @@ +#!/usr/bin/env python3 +# -*- coding: UTF-8 -*- +""" +Unit tests for monitor_fan.py +""" + +import os +import sys +import time +import pytest +from unittest.mock import patch, MagicMock, PropertyMock + +# Mock platform-specific imports +sys.modules['plat_hal'] = MagicMock() +sys.modules['plat_hal.interface'] = MagicMock() +sys.modules['plat_hal.baseutil'] = MagicMock() + +import monitor_fan as mf + + +class TestInitLogger: + """Tests for _init_logger()""" + + @patch('monitor_fan.RotatingFileHandler') + @patch('subprocess.call') + @patch('os.path.exists', return_value=False) + def test_creates_log_directory_when_missing(self, mock_exists, mock_call, mock_handler): + logger = mf._init_logger() + mock_call.assert_any_call(["mkdir", "-p", os.path.dirname(mf.LOG_FILE)]) + mock_call.assert_any_call(["sync"]) + assert logger is not None + + @patch('monitor_fan.RotatingFileHandler') + @patch('os.path.exists', return_value=True) + def test_skips_mkdir_when_log_exists(self, mock_exists, mock_handler): + with patch('subprocess.call') as mock_call: + logger = mf._init_logger() + mock_call.assert_not_called() + assert logger is not None + + +class TestFan: + """Tests for Fan class""" + + def setup_method(self): + self.mock_interface = MagicMock() + self.fan = mf.Fan("FAN1", self.mock_interface) + + def test_init(self): + assert self.fan.name == "FAN1" + assert self.fan.pre_present is False + assert self.fan.pre_status is True + assert self.fan.plugin_cnt == 0 + assert self.fan.plugout_cnt == 0 + + def test_fan_dict_update_caches(self): + self.mock_interface.get_fan_info.return_value = {"NAME": "FAN-A", "SN": "123"} + self.fan.fan_dict_update() + self.fan.fan_dict_update() # second call should use cache + self.mock_interface.get_fan_info.assert_called_once() + + def test_fan_dict_update_refreshes_after_interval(self): + self.mock_interface.get_fan_info.return_value = {"NAME": "FAN-A", "SN": "123"} + self.fan.fan_dict_update() + self.fan.update_time = time.time() - 2 # simulate 2 seconds ago + self.fan.fan_dict_update() + assert self.mock_interface.get_fan_info.call_count == 2 + + def test_get_model(self): + self.mock_interface.get_fan_info.return_value = {"NAME": "FAN-MODEL-A", "SN": "123"} + assert self.fan.get_model() == "FAN-MODEL-A" + + def test_get_serial(self): + self.mock_interface.get_fan_info.return_value = {"NAME": "FAN-A", "SN": "SN12345"} + assert self.fan.get_serial() == "SN12345" + + def test_get_presence(self): + self.mock_interface.get_fan_presence.return_value = True + assert self.fan.get_presence() is True + self.mock_interface.get_fan_presence.assert_called_with("FAN1") + + def test_get_rotor_speed_normal(self): + self.mock_interface.get_fan_info_rotor.return_value = { + "Rotor1": {"Speed": 8000, "SpeedMax": 10000} + } + assert self.fan.get_rotor_speed("Rotor1") == 80 + + def test_get_rotor_speed_over_100_capped(self): + self.mock_interface.get_fan_info_rotor.return_value = { + "Rotor1": {"Speed": 12000, "SpeedMax": 10000} + } + assert self.fan.get_rotor_speed("Rotor1") == 100 + + def test_get_rotor_speed_string_value_returns_zero(self): + self.mock_interface.get_fan_info_rotor.return_value = { + "Rotor1": {"Speed": "N/A", "SpeedMax": 10000} + } + assert self.fan.get_rotor_speed("Rotor1") == 0 + + def test_get_rotor_speed_none_value_returns_zero(self): + self.mock_interface.get_fan_info_rotor.return_value = { + "Rotor1": {"Speed": None, "SpeedMax": 10000} + } + assert self.fan.get_rotor_speed("Rotor1") == 0 + + def test_get_rotor_speed_tolerance_normal(self): + self.mock_interface.get_fan_info_rotor.return_value = { + "Rotor1": {"Tolerance": 25} + } + assert self.fan.get_rotor_speed_tolerance("Rotor1") == 25 + + def test_get_rotor_speed_tolerance_string_returns_default(self): + self.mock_interface.get_fan_info_rotor.return_value = { + "Rotor1": {"Tolerance": "N/A"} + } + assert self.fan.get_rotor_speed_tolerance("Rotor1") == 30 + + def test_get_rotor_speed_tolerance_none_returns_default(self): + self.mock_interface.get_fan_info_rotor.return_value = { + "Rotor1": {"Tolerance": None} + } + assert self.fan.get_rotor_speed_tolerance("Rotor1") == 30 + + def test_get_target_speed(self): + self.mock_interface.get_fan_speed_pwm.return_value = 75 + assert self.fan.get_target_speed() == 75 + + def test_get_status_not_present(self): + self.mock_interface.get_fan_presence.return_value = False + assert self.fan.get_status() is False + + def test_get_status_speed_within_tolerance(self): + self.mock_interface.get_fan_presence.return_value = True + self.mock_interface.get_fan_rotor_number.return_value = 1 + self.mock_interface.get_fan_info_rotor.return_value = { + "Rotor1": {"Speed": 7500, "SpeedMax": 10000, "Tolerance": 30} + } + self.mock_interface.get_fan_speed_pwm.return_value = 75 + assert self.fan.get_status() is True + + def test_get_status_speed_too_high(self): + self.mock_interface.get_fan_presence.return_value = True + self.mock_interface.get_fan_rotor_number.return_value = 1 + self.mock_interface.get_fan_info_rotor.return_value = { + "Rotor1": {"Speed": 10000, "SpeedMax": 10000, "Tolerance": 10} + } + self.mock_interface.get_fan_speed_pwm.return_value = 50 # target 50%, actual 100% + assert self.fan.get_status() is False + + def test_get_status_speed_too_low(self): + self.mock_interface.get_fan_presence.return_value = True + self.mock_interface.get_fan_rotor_number.return_value = 1 + self.mock_interface.get_fan_info_rotor.return_value = { + "Rotor1": {"Speed": 1000, "SpeedMax": 10000, "Tolerance": 10} + } + self.mock_interface.get_fan_speed_pwm.return_value = 80 # target 80%, actual 10% + assert self.fan.get_status() is False + + def test_get_status_multiple_rotors(self): + self.mock_interface.get_fan_presence.return_value = True + self.mock_interface.get_fan_rotor_number.return_value = 2 + self.mock_interface.get_fan_info_rotor.return_value = { + "Rotor1": {"Speed": 7500, "SpeedMax": 10000, "Tolerance": 30}, + "Rotor2": {"Speed": 7500, "SpeedMax": 10000, "Tolerance": 30}, + } + self.mock_interface.get_fan_speed_pwm.return_value = 75 + assert self.fan.get_status() is True + + def test_get_direction(self): + self.mock_interface.get_fan_info.return_value = {"NAME": "FAN-A", "SN": "123", "AirFlow": "intake"} + assert self.fan.get_direction() == "intake" + + +class TestMonitorFan: + """Tests for MonitorFan class""" + + def setup_method(self): + self.mock_baseutil = MagicMock() + self.mock_baseutil.get_monitor_config.return_value = { + "monitor_fan_para": { + "present_interval": 0.5, + "status_interval": 5, + "present_check_cnt": 3, + "status_check_cnt": 3, + } + } + with patch.object(mf, 'baseutil', self.mock_baseutil), \ + patch.object(mf, 'interface', MagicMock()), \ + patch.object(mf, '_init_logger', return_value=MagicMock()): + self.monitor = mf.MonitorFan() + + def test_debug_init_debug_mode(self): + with patch('os.path.exists', return_value=True): + self.monitor.debug_init() + self.monitor.logger.setLevel.assert_called_with(mf.logging.DEBUG) + + def test_debug_init_info_mode(self): + with patch('os.path.exists', return_value=False): + self.monitor.debug_init() + self.monitor.logger.setLevel.assert_called_with(mf.logging.INFO) + + def test_fan_obj_init(self): + self.monitor.int_case.get_fan_total_number.return_value = 3 + self.monitor.fan_obj_init() + assert len(self.monitor.fan_obj_list) == 3 + assert self.monitor.fan_obj_list[0].name == "FAN1" + assert self.monitor.fan_obj_list[2].name == "FAN3" + + def test_fan_airflow_check_match(self): + fan_obj = MagicMock() + fan_obj.name = "FAN1" + fan_obj.get_direction.return_value = "intake" + self.monitor.int_case.get_device_airflow.return_value = "intake" + + self.monitor.fan_airflow_check(fan_obj) + self.monitor.logger.debug.assert_called() + + def test_fan_airflow_check_mismatch(self): + fan_obj = MagicMock() + fan_obj.name = "FAN1" + fan_obj.get_direction.return_value = "intake" + self.monitor.int_case.get_device_airflow.return_value = "exhaust" + + self.monitor.fan_airflow_check(fan_obj) + self.monitor.logger.error.assert_called() + + def test_fan_plug_in_detected(self): + fan_obj = mf.Fan("FAN1", MagicMock()) + fan_obj.pre_present = False + fan_obj.int_case.get_fan_presence.return_value = True + # Need 3 consecutive detections + for _ in range(3): + self.monitor.fan_plug_in_out_check(fan_obj) + assert fan_obj.pre_present is True + + def test_fan_plug_out_detected(self): + fan_obj = mf.Fan("FAN1", MagicMock()) + fan_obj.pre_present = True + fan_obj.int_case.get_fan_presence.return_value = False + for _ in range(3): + self.monitor.fan_plug_in_out_check(fan_obj) + assert fan_obj.pre_present is False + + def test_fan_plug_in_not_enough_count(self): + fan_obj = mf.Fan("FAN1", MagicMock()) + fan_obj.pre_present = False + fan_obj.int_case.get_fan_presence.return_value = True + self.monitor.fan_plug_in_out_check(fan_obj) # only 1 detection + assert fan_obj.pre_present is False # not yet confirmed + + def test_fan_status_normal_to_error(self): + fan_obj = mf.Fan("FAN1", MagicMock()) + fan_obj.pre_status = True + fan_obj.int_case.get_fan_presence.return_value = True + fan_obj.int_case.get_fan_rotor_number.return_value = 1 + fan_obj.int_case.get_fan_info_rotor.return_value = { + "Rotor1": {"Speed": 1000, "SpeedMax": 10000, "Tolerance": 10} + } + fan_obj.int_case.get_fan_speed_pwm.return_value = 80 # way off + for _ in range(3): + self.monitor.fan_status_check(fan_obj) + assert fan_obj.pre_status is False + + def test_fan_status_error_to_normal(self): + fan_obj = mf.Fan("FAN1", MagicMock()) + fan_obj.pre_status = False + fan_obj.int_case.get_fan_presence.return_value = True + fan_obj.int_case.get_fan_rotor_number.return_value = 1 + fan_obj.int_case.get_fan_info_rotor.return_value = { + "Rotor1": {"Speed": 7500, "SpeedMax": 10000, "Tolerance": 30} + } + fan_obj.int_case.get_fan_speed_pwm.return_value = 75 + for _ in range(3): + self.monitor.fan_status_check(fan_obj) + assert fan_obj.pre_status is True + + def test_checkFanPresence_iterates_all(self): + fan1 = MagicMock() + fan2 = MagicMock() + self.monitor.fan_obj_list = [fan1, fan2] + with patch.object(self.monitor, 'fan_plug_in_out_check') as mock_check: + self.monitor.checkFanPresence() + assert mock_check.call_count == 2 + + def test_checkFanStatus_iterates_all(self): + fan1 = MagicMock() + fan2 = MagicMock() + self.monitor.fan_obj_list = [fan1, fan2] + with patch.object(self.monitor, 'fan_status_check') as mock_check: + self.monitor.checkFanStatus() + assert mock_check.call_count == 2 diff --git a/platform/broadcom/sonic-platform-modules-ragile/common/script/platform_driver.py b/platform/broadcom/sonic-platform-modules-ragile/common/script/platform_driver.py index 6d2c6de653d..f11ca707772 100755 --- a/platform/broadcom/sonic-platform-modules-ragile/common/script/platform_driver.py +++ b/platform/broadcom/sonic-platform-modules-ragile/common/script/platform_driver.py @@ -55,10 +55,11 @@ def check_driver(): def removeDev(bus, loc): - cmd = "echo 0x%02x > /sys/bus/i2c/devices/i2c-%d/delete_device" % (loc, bus) devpath = "/sys/bus/i2c/devices/%d-%04x" % (bus, loc) if os.path.exists(devpath): - log_os_system(cmd) + delete_file = "/sys/bus/i2c/devices/i2c-%d/delete_device" % bus + with open(delete_file, 'w') as f: + f.write("0x%02x\n" % loc) def addDev(name, bus, loc): @@ -72,10 +73,11 @@ def addDev(name, bus, loc): if i % 10 == 0: click.echo("%%WB_PLATFORM_DRIVER-INIT: %s not found, wait 0.1 second ! i %d " % (pdevpath, i)) - cmd = "echo %s 0x%02x > /sys/bus/i2c/devices/i2c-%d/new_device" % (name, loc, bus) devpath = "/sys/bus/i2c/devices/%d-%04x" % (bus, loc) if os.path.exists(devpath) is False: - os.system(cmd) + new_device_file = "/sys/bus/i2c/devices/i2c-%d/new_device" % bus + with open(new_device_file, 'w') as f: + f.write("%s 0x%02x\n" % (name, loc)) def removeOPTOE(startbus, endbus): diff --git a/platform/broadcom/sonic-platform-modules-ragile/common/script/platform_util.py b/platform/broadcom/sonic-platform-modules-ragile/common/script/platform_util.py index e7e6c8b1d6e..8b05e12e856 100755 --- a/platform/broadcom/sonic-platform-modules-ragile/common/script/platform_util.py +++ b/platform/broadcom/sonic-platform-modules-ragile/common/script/platform_util.py @@ -214,7 +214,8 @@ def getonieplatform(path): def getplatform_config_db(): if not os.path.isfile(CONFIG_DB_PATH): return "" - val = os.popen("sonic-cfggen -j %s -v DEVICE_METADATA.localhost.platform" % CONFIG_DB_PATH).read().strip() + val = subprocess.run(["sonic-cfggen", "-j", CONFIG_DB_PATH, "-v", "DEVICE_METADATA.localhost.platform"], + stdout=subprocess.PIPE, stderr=subprocess.DEVNULL, text=True).stdout.strip() if len(val) <= 0: return "" return val diff --git a/platform/broadcom/sonic-platform-modules-ragile/common/script/tests/test_dev_monitor.py b/platform/broadcom/sonic-platform-modules-ragile/common/script/tests/test_dev_monitor.py new file mode 100644 index 00000000000..c8347bdcdef --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/common/script/tests/test_dev_monitor.py @@ -0,0 +1,90 @@ +#!/usr/bin/env python3 +# -*- coding: UTF-8 -*- +""" +Unit tests for dev_monitor.py — focused on removeDev and addDev +""" + +import os +import sys +import pytest +from unittest.mock import patch, mock_open, MagicMock, call + +# Mock platform-specific imports +mock_config = MagicMock() +mock_config.DEV_MONITOR_PARAM = {} +sys.modules['platform_config'] = mock_config +sys.modules['platform_util'] = MagicMock() +sys.modules['click'] = MagicMock() + +import dev_monitor as dm + + +class TestDevMonitorRemoveDev: + """Tests for DevMonitor.removeDev()""" + + def setup_method(self): + + self.monitor = dm.DevMonitor.__new__(dm.DevMonitor) + self.monitor.logger = MagicMock() + + @patch('os.path.exists', return_value=True) + def test_removes_existing_device(self, mock_exists): + m = mock_open() + with patch("builtins.open", m): + self.monitor.removeDev(10, 0x56) + m.assert_called_once_with("/sys/bus/i2c/devices/i2c-10/delete_device", 'w') + m().write.assert_called_once_with("0x56\n") + + @patch('os.path.exists', return_value=False) + def test_skips_nonexistent_device(self, mock_exists): + m = mock_open() + with patch("builtins.open", m): + self.monitor.removeDev(10, 0x56) + m.assert_not_called() + + @patch('os.path.exists', return_value=True) + def test_correct_devpath_format(self, mock_exists): + m = mock_open() + with patch("builtins.open", m): + self.monitor.removeDev(5, 0x48) + mock_exists.assert_called_with("/sys/bus/i2c/devices/5-0048") + + +class TestDevMonitorAddDev: + """Tests for DevMonitor.addDev()""" + + def setup_method(self): + + self.monitor = dm.DevMonitor.__new__(dm.DevMonitor) + self.monitor.logger = MagicMock() + + @patch('os.path.exists', return_value=False) + def test_adds_new_device(self, mock_exists): + m = mock_open() + with patch("builtins.open", m): + self.monitor.addDev("tmp75", 10, 0x48) + m.assert_called_once_with("/sys/bus/i2c/devices/i2c-10/new_device", 'w') + m().write.assert_called_once_with("tmp75 0x48\n") + + @patch('os.path.exists', return_value=True) + def test_skips_existing_device(self, mock_exists): + m = mock_open() + with patch("builtins.open", m): + self.monitor.addDev("tmp75", 10, 0x48) + m.assert_not_called() + + @patch('time.sleep') + @patch('os.path.exists', return_value=False) + def test_lm75_sleeps_before_add(self, mock_exists, mock_sleep): + m = mock_open() + with patch("builtins.open", m): + self.monitor.addDev("lm75", 10, 0x48) + mock_sleep.assert_called_once_with(0.1) + + @patch('os.path.exists', return_value=False) + def test_non_lm75_no_sleep(self, mock_exists): + m = mock_open() + with patch("builtins.open", m), \ + patch('time.sleep') as mock_sleep: + self.monitor.addDev("tmp75", 10, 0x48) + mock_sleep.assert_not_called() diff --git a/platform/broadcom/sonic-platform-modules-ragile/common/script/tests/test_generate_airflow.py b/platform/broadcom/sonic-platform-modules-ragile/common/script/tests/test_generate_airflow.py new file mode 100644 index 00000000000..39acf9d7492 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/common/script/tests/test_generate_airflow.py @@ -0,0 +1,387 @@ +#!/usr/bin/env python3 +# -*- coding: UTF-8 -*- +""" +Unit tests for generate_airflow.py +""" + +import os +import sys +import json +import pytest +from unittest.mock import patch, mock_open, MagicMock + +# Mock platform-specific imports before importing the module under test +sys.modules['platform_config'] = MagicMock() +sys.modules['platform_util'] = MagicMock() +sys.modules['eepromutil'] = MagicMock() +sys.modules['eepromutil.fru'] = MagicMock() +sys.modules['eepromutil.fantlv'] = MagicMock() + +# Now we can import +import generate_airflow as ga + + +class TestGetBoardAirFlow: + """Tests for get_board_air_flow()""" + + def test_all_zeros_returns_na(self): + with patch.object(ga, 'airflow_error'): + result = ga.get_board_air_flow(0, 0, 0, 0) + assert result == "N/A" + + def test_more_intake_fans_returns_intake(self): + result = ga.get_board_air_flow(3, 1, 0, 0) + assert result == "intake" + + def test_more_exhaust_fans_returns_exhaust(self): + result = ga.get_board_air_flow(1, 3, 0, 0) + assert result == "exhaust" + + def test_equal_fans_more_intake_psus_returns_intake(self): + result = ga.get_board_air_flow(2, 2, 2, 1) + assert result == "intake" + + def test_equal_fans_more_exhaust_psus_returns_exhaust(self): + result = ga.get_board_air_flow(2, 2, 1, 2) + assert result == "exhaust" + + def test_all_equal_returns_intake(self): + result = ga.get_board_air_flow(2, 2, 2, 2) + assert result == "intake" + + def test_only_fans_intake(self): + result = ga.get_board_air_flow(4, 0, 0, 0) + assert result == "intake" + + def test_only_fans_exhaust(self): + result = ga.get_board_air_flow(0, 4, 0, 0) + assert result == "exhaust" + + def test_only_psus_intake(self): + result = ga.get_board_air_flow(0, 0, 2, 0) + assert result == "intake" + + def test_only_psus_exhaust(self): + result = ga.get_board_air_flow(0, 0, 0, 2) + assert result == "exhaust" + + def test_fans_override_psus(self): + result = ga.get_board_air_flow(3, 1, 0, 4) + assert result == "intake" + + +class TestGetModelFru: + """Tests for get_model_fru()""" + + def test_success(self): + device = {"name": "FAN1", "area": "boardInfoArea", "field": "boardPartNumber"} + mock_fru = MagicMock() + mock_area = MagicMock() + mock_area.boardPartNumber = "M1HFAN-I-F" + mock_fru.boardInfoArea = mock_area + + with patch.object(ga, 'ipmifru', return_value=mock_fru): + status, model = ga.get_model_fru(device, b'\x00' * 256) + assert status is True + assert model == "M1HFAN-I-F" + + def test_invalid_area(self): + device = {"name": "FAN1", "area": "nonExistentArea", "field": "boardPartNumber"} + mock_fru = MagicMock() + mock_fru.nonExistentArea = None + + with patch.object(ga, 'ipmifru', return_value=mock_fru): + status, msg = ga.get_model_fru(device, b'\x00' * 256) + assert status is False + assert "area config error" in msg + + def test_invalid_field(self): + device = {"name": "FAN1", "area": "boardInfoArea", "field": "nonExistentField"} + mock_fru = MagicMock() + mock_area = MagicMock(spec=[]) + mock_fru.boardInfoArea = mock_area + + with patch.object(ga, 'ipmifru', return_value=mock_fru): + status, msg = ga.get_model_fru(device, b'\x00' * 256) + assert status is False + assert "get model error" in msg + + def test_exception(self): + device = {"name": "FAN1", "area": "boardInfoArea", "field": "boardPartNumber"} + + with patch.object(ga, 'ipmifru', side_effect=Exception("decode error")): + status, msg = ga.get_model_fru(device, b'\x00' * 256) + assert status is False + assert "decode error" in msg + + +class TestGetModelFantlv: + """Tests for get_model_fantlv()""" + + def test_success(self): + device = {"name": "FAN1", "field": "Model"} + mock_tlv = MagicMock() + mock_tlv.decode.return_value = [{"name": "Model", "value": "FAN-INTAKE-001"}] + + with patch.object(ga, 'fan_tlv', return_value=mock_tlv): + status, model = ga.get_model_fantlv(device, b'\x00' * 256) + assert status is True + assert model == "FAN-INTAKE-001" + + def test_empty_decode(self): + device = {"name": "FAN1", "field": "Model"} + mock_tlv = MagicMock() + mock_tlv.decode.return_value = [] + + with patch.object(ga, 'fan_tlv', return_value=mock_tlv): + status, msg = ga.get_model_fantlv(device, b'\x00' * 256) + assert status is False + assert "decode fantlv eeprom info error" in msg + + def test_field_not_found(self): + device = {"name": "FAN1", "field": "Model"} + mock_tlv = MagicMock() + mock_tlv.decode.return_value = [{"name": "Serial", "value": "123"}] + + with patch.object(ga, 'fan_tlv', return_value=mock_tlv): + status, msg = ga.get_model_fantlv(device, b'\x00' * 256) + assert status is False + assert "not found" in msg + + def test_exception(self): + device = {"name": "FAN1", "field": "Model"} + mock_tlv = MagicMock() + mock_tlv.decode.side_effect = Exception("tlv error") + + with patch.object(ga, 'fan_tlv', return_value=mock_tlv): + status, msg = ga.get_model_fantlv(device, b'\x00' * 256) + assert status is False + assert "tlv error" in msg + + +class TestGetDeviceModele: + """Tests for get_device_modele()""" + + def test_unsupported_e2_type(self): + device = {"name": "FAN1", "e2_type": "unknown"} + status, msg = ga.get_device_modele(device) + assert status is False + assert "unsupport e2_type" in msg + + def test_eeprom_read_failure(self): + device = {"name": "FAN1", "e2_type": "fru", "e2_path": "/dev/fake", "e2_size": 256} + + with patch.object(ga, 'dev_file_read', return_value=(False, "read error")): + status, msg = ga.get_device_modele(device) + assert status is False + assert "eeprom read error" in msg + + def test_fru_type_calls_get_model_fru(self): + device = {"name": "FAN1", "e2_type": "fru", "e2_path": "/dev/fake", "e2_size": 256, + "area": "boardInfoArea", "field": "boardPartNumber"} + + with patch.object(ga, 'dev_file_read', return_value=(True, b'\x00' * 256)), \ + patch.object(ga, 'byteTostr', return_value="eeprom_data"), \ + patch.object(ga, 'get_model_fru', return_value=(True, "MODEL-A")) as mock_fru: + status, model = ga.get_device_modele(device) + assert status is True + assert model == "MODEL-A" + mock_fru.assert_called_once() + + def test_fantlv_type_calls_get_model_fantlv(self): + device = {"name": "FAN1", "e2_type": "fantlv", "e2_path": "/dev/fake", "e2_size": 256, + "field": "Model"} + + with patch.object(ga, 'dev_file_read', return_value=(True, b'\x00' * 256)), \ + patch.object(ga, 'byteTostr', return_value="eeprom_data"), \ + patch.object(ga, 'get_model_fantlv', return_value=(True, "MODEL-B")) as mock_fantlv: + status, model = ga.get_device_modele(device) + assert status is True + assert model == "MODEL-B" + mock_fantlv.assert_called_once() + + def test_default_e2_size(self): + device = {"name": "FAN1", "e2_type": "fru", "e2_path": "/dev/fake", + "area": "boardInfoArea", "field": "boardPartNumber"} + + with patch.object(ga, 'dev_file_read', return_value=(True, b'\x00' * 256)) as mock_read, \ + patch.object(ga, 'byteTostr', return_value="data"), \ + patch.object(ga, 'get_model_fru', return_value=(True, "MODEL")): + ga.get_device_modele(device) + mock_read.assert_called_once_with("/dev/fake", 0, 256) + + +class TestDebugInit: + """Tests for debug_init()""" + + def test_sets_debuglevel_from_file(self): + with patch("builtins.open", mock_open(read_data="3")): + ga.debug_init() + assert ga.debuglevel == 3 + + def test_defaults_to_zero_on_missing_file(self): + with patch("builtins.open", side_effect=FileNotFoundError): + ga.debug_init() + assert ga.debuglevel == 0 + + def test_defaults_to_zero_on_invalid_content(self): + with patch("builtins.open", mock_open(read_data="abc")): + ga.debug_init() + assert ga.debuglevel == 0 + + +class TestGenerateAirflow: + """Tests for generate_airflow()""" + + def setup_method(self): + self.air_flow_conf = { + "fans": [ + {"name": "FAN1", "e2_type": "fru", "e2_path": "/dev/fan1", + "e2_size": 256, "area": "boardInfoArea", "field": "boardPartNumber", + "decode": "fan_airflow"}, + {"name": "FAN2", "e2_type": "fru", "e2_path": "/dev/fan2", + "e2_size": 256, "area": "boardInfoArea", "field": "boardPartNumber", + "decode": "fan_airflow"}, + ], + "psus": [ + {"name": "PSU1", "e2_type": "fru", "e2_path": "/dev/psu1", + "e2_size": 256, "area": "boardInfoArea", "field": "boardPartNumber", + "decode": "psu_airflow"}, + ], + "fan_airflow": { + "intake": ["MODEL-INTAKE"], + "exhaust": ["MODEL-EXHAUST"], + }, + "psu_airflow": { + "intake": ["PSU-INTAKE"], + "exhaust": ["PSU-EXHAUST"], + }, + } + + def test_all_intake(self, tmp_path): + result_file = str(tmp_path / "airflow_result.json") + ga.AIR_FLOW_CONF = self.air_flow_conf + + with patch.object(ga, 'AIRFLOW_RESULT_FILE', result_file), \ + patch.object(ga, 'get_device_modele') as mock_model, \ + patch('subprocess.call') as mock_call: + mock_model.side_effect = [ + (True, "MODEL-INTAKE"), + (True, "MODEL-INTAKE"), + (True, "PSU-INTAKE"), + ] + ga.generate_airflow() + + with open(result_file, 'r') as f: + result = json.load(f) + + assert result["FAN1"]["airflow"] == "intake" + assert result["FAN2"]["airflow"] == "intake" + assert result["PSU1"]["airflow"] == "intake" + assert result["board"] == "intake" + mock_call.assert_any_call(["sync"]) + + def test_mixed_airflow(self, tmp_path): + result_file = str(tmp_path / "airflow_result.json") + ga.AIR_FLOW_CONF = self.air_flow_conf + + with patch.object(ga, 'AIRFLOW_RESULT_FILE', result_file), \ + patch.object(ga, 'get_device_modele') as mock_model, \ + patch('subprocess.call') as mock_call: + mock_model.side_effect = [ + (True, "MODEL-INTAKE"), + (True, "MODEL-EXHAUST"), + (True, "PSU-INTAKE"), + ] + ga.generate_airflow() + + with open(result_file, 'r') as f: + result = json.load(f) + + assert result["FAN1"]["airflow"] == "intake" + assert result["FAN2"]["airflow"] == "exhaust" + assert result["board"] == "intake" + mock_call.assert_any_call(["sync"]) + + def test_fan_eeprom_read_failure(self, tmp_path): + result_file = str(tmp_path / "airflow_result.json") + ga.AIR_FLOW_CONF = self.air_flow_conf + + with patch.object(ga, 'AIRFLOW_RESULT_FILE', result_file), \ + patch.object(ga, 'get_device_modele') as mock_model, \ + patch('subprocess.call'): + mock_model.side_effect = [ + (False, "read error"), + (True, "MODEL-EXHAUST"), + (True, "PSU-EXHAUST"), + ] + ga.generate_airflow() + + with open(result_file, 'r') as f: + result = json.load(f) + + assert result["FAN1"]["model"] == "N/A" + assert result["FAN1"]["airflow"] == "N/A" + assert result["board"] == "exhaust" + + def test_unknown_model(self, tmp_path): + result_file = str(tmp_path / "airflow_result.json") + ga.AIR_FLOW_CONF = self.air_flow_conf + + with patch.object(ga, 'AIRFLOW_RESULT_FILE', result_file), \ + patch.object(ga, 'get_device_modele') as mock_model, \ + patch('subprocess.call'): + mock_model.side_effect = [ + (True, "UNKNOWN-MODEL"), + (True, "UNKNOWN-MODEL"), + (True, "UNKNOWN-MODEL"), + ] + ga.generate_airflow() + + with open(result_file, 'r') as f: + result = json.load(f) + + assert result["FAN1"]["airflow"] == "N/A" + assert result["board"] == "N/A" + + def test_creates_output_directory(self, tmp_path): + subdir = tmp_path / "subdir" + result_file = str(subdir / "airflow_result.json") + ga.AIR_FLOW_CONF = {"fans": [], "psus": []} + + with patch.object(ga, 'AIRFLOW_RESULT_FILE', result_file): + ga.generate_airflow() + + assert os.path.exists(result_file) + + +class TestLogging: + """Tests for logging functions""" + + @patch('syslog.openlog') + @patch('syslog.syslog') + def test_airflow_info(self, mock_syslog, mock_openlog): + ga.airflow_info("test message") + mock_openlog.assert_called_once_with("AIRFLOW", ga.syslog.LOG_PID) + mock_syslog.assert_called_once_with(ga.syslog.LOG_INFO, "test message") + + @patch('syslog.openlog') + @patch('syslog.syslog') + def test_airflow_error(self, mock_syslog, mock_openlog): + ga.airflow_error("error message") + mock_openlog.assert_called_once_with("AIRFLOW", ga.syslog.LOG_PID) + mock_syslog.assert_called_once_with(ga.syslog.LOG_ERR, "error message") + + @patch('syslog.openlog') + @patch('syslog.syslog') + def test_airflow_debug_when_enabled(self, mock_syslog, mock_openlog): + ga.debuglevel = ga.AIRFLOWDEBUG + ga.airflow_debug("debug msg") + mock_syslog.assert_called_once() + ga.debuglevel = 0 + + @patch('syslog.syslog') + def test_airflow_debug_when_disabled(self, mock_syslog): + ga.debuglevel = 0 + ga.airflow_debug("debug msg") + mock_syslog.assert_not_called() diff --git a/platform/broadcom/sonic-platform-modules-ragile/common/script/tests/test_platform_driver.py b/platform/broadcom/sonic-platform-modules-ragile/common/script/tests/test_platform_driver.py new file mode 100644 index 00000000000..fdbeea6542e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/common/script/tests/test_platform_driver.py @@ -0,0 +1,156 @@ +#!/usr/bin/env python3 +# -*- coding: UTF-8 -*- +""" +Unit tests for platform_driver.py — focused on removeDev and addDev +""" + +import os +import sys +import pytest +from unittest.mock import patch, mock_open, MagicMock, call + +# Mock platform-specific imports +import types +mock_config = types.ModuleType('platform_config') +mock_config.GLOBALCONFIG = {"DRIVERLISTS": [], "DEVS": [], "OPTOE": []} +mock_config.WARM_UPGRADE_STARTED_FLAG = "/tmp/.warm_upgrade_started" +mock_config.WARM_UPG_FLAG = "/tmp/.warm_upg_flag" +sys.modules['platform_config'] = mock_config + +# Mock click +sys.modules['click'] = MagicMock() + +import platform_driver as pd + + +class TestRemoveDev: + """Tests for removeDev()""" + + @patch('os.path.exists', return_value=True) + def test_removes_existing_device(self, mock_exists): + m = mock_open() + with patch("builtins.open", m): + pd.removeDev(10, 0x56) + m.assert_called_once_with("/sys/bus/i2c/devices/i2c-10/delete_device", 'w') + m().write.assert_called_once_with("0x56\n") + + @patch('os.path.exists', return_value=False) + def test_skips_nonexistent_device(self, mock_exists): + m = mock_open() + with patch("builtins.open", m): + pd.removeDev(10, 0x56) + m.assert_not_called() + + @patch('os.path.exists', return_value=True) + def test_correct_devpath_format(self, mock_exists): + m = mock_open() + with patch("builtins.open", m): + pd.removeDev(5, 0x48) + mock_exists.assert_called_with("/sys/bus/i2c/devices/5-0048") + + +class TestAddDev: + """Tests for addDev()""" + + @patch('os.path.exists') + def test_adds_new_device(self, mock_exists): + # pdevpath exists, devpath does not + mock_exists.side_effect = lambda p: p.endswith("/") + m = mock_open() + with patch("builtins.open", m): + pd.addDev("tmp75", 10, 0x48) + m.assert_called_once_with("/sys/bus/i2c/devices/i2c-10/new_device", 'w') + m().write.assert_called_once_with("tmp75 0x48\n") + + @patch('os.path.exists', return_value=True) + def test_skips_existing_device(self, mock_exists): + m = mock_open() + with patch("builtins.open", m): + pd.addDev("tmp75", 10, 0x48) + m.assert_not_called() + + @patch('time.sleep') + @patch('os.path.exists') + def test_lm75_sleeps_before_add(self, mock_exists, mock_sleep): + mock_exists.side_effect = lambda p: p.endswith("/") + m = mock_open() + with patch("builtins.open", m): + pd.addDev("lm75", 10, 0x48) + mock_sleep.assert_any_call(0.1) + + @patch('os.path.exists') + def test_waits_for_parent_bus(self, mock_exists): + # Simulate parent bus appearing after 3 attempts + call_count = [0] + def side_effect(path): + if path.endswith("/"): + call_count[0] += 1 + return call_count[0] >= 3 + return False # devpath doesn't exist + + mock_exists.side_effect = side_effect + m = mock_open() + with patch("builtins.open", m), \ + patch('time.sleep'): + pd.addDev("tmp75", 10, 0x48) + m.assert_called_once() + + +class TestCheckDriver: + """Tests for check_driver()""" + + @patch.object(pd, 'log_os_system', return_value=(0, "3")) + def test_driver_loaded(self, mock_log): + assert pd.check_driver() is True + + @patch.object(pd, 'log_os_system', return_value=(0, "0")) + def test_driver_not_loaded(self, mock_log): + assert pd.check_driver() is False + + @patch.object(pd, 'log_os_system', return_value=(1, "")) + def test_command_fails(self, mock_log): + assert pd.check_driver() is False + + +class TestChecksignaldriver: + """Tests for checksignaldriver()""" + + @patch.object(pd, 'log_os_system', return_value=(0, "1")) + def test_module_loaded(self, mock_log): + assert pd.checksignaldriver("wb_io_dev") is True + + @patch.object(pd, 'log_os_system', return_value=(0, "0")) + def test_module_not_loaded(self, mock_log): + assert pd.checksignaldriver("wb_io_dev") is False + + @patch.object(pd, 'log_os_system', return_value=(1, "")) + def test_command_fails(self, mock_log): + assert pd.checksignaldriver("wb_io_dev") is False + + +class TestAddRemoveDriver: + """Tests for adddriver() and removedriver()""" + + @patch.object(pd, 'log_os_system') + @patch.object(pd, 'checksignaldriver', return_value=False) + def test_adddriver_loads_module(self, mock_check, mock_log): + pd.adddriver("wb_io_dev", 0) + mock_log.assert_called_once_with("modprobe wb_io_dev") + + @patch.object(pd, 'log_os_system') + @patch.object(pd, 'checksignaldriver', return_value=True) + def test_adddriver_skips_loaded_module(self, mock_check, mock_log): + pd.adddriver("wb_io_dev", 0) + mock_log.assert_not_called() + + @patch.object(pd, 'log_os_system') + @patch.object(pd, 'checksignaldriver', return_value=True) + def test_removedriver_removes_module(self, mock_check, mock_log): + pd.removedriver("wb_io_dev", 0) + mock_log.assert_called_once_with("rmmod -f wb_io_dev") + + @patch.object(pd, 'log_os_system') + @patch.object(pd, 'checksignaldriver', return_value=False) + def test_removedriver_skips_unloaded_module(self, mock_check, mock_log): + pd.removedriver("wb_io_dev", 0) + mock_log.assert_not_called() diff --git a/platform/broadcom/sonic-platform-modules-ragile/common/script/tests/test_platform_util.py b/platform/broadcom/sonic-platform-modules-ragile/common/script/tests/test_platform_util.py new file mode 100644 index 00000000000..9b8b30d0441 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/common/script/tests/test_platform_util.py @@ -0,0 +1,121 @@ +#!/usr/bin/env python3 +# -*- coding: UTF-8 -*- +""" +Unit tests for platform_util.py — focused on getplatform_config_db and getonieplatform +""" + +import os +import sys +import pytest +from unittest.mock import patch, mock_open, MagicMock + +# Mock heavy platform imports +sys.modules['platform_config'] = MagicMock() + +# Ensure platform_util is importable from any working directory +sys.path.insert(0, os.path.join(os.path.dirname(os.path.abspath(__file__)), '..')) + +import platform_util as pu + + +class TestGetplatformConfigDb: + """Tests for getplatform_config_db()""" + + @patch('os.path.isfile', return_value=False) + def test_returns_empty_when_config_db_missing(self, mock_isfile): + result = pu.getplatform_config_db() + assert result == "" + + @patch('subprocess.run') + @patch('os.path.isfile', return_value=True) + def test_returns_platform_name(self, mock_isfile, mock_run): + mock_run.return_value.stdout = "x86_64-mlnx_msn2700-r0" + + result = pu.getplatform_config_db() + assert result == "x86_64-mlnx_msn2700-r0" + + @patch('subprocess.run') + @patch('os.path.isfile', return_value=True) + def test_returns_empty_when_command_returns_empty(self, mock_isfile, mock_run): + mock_run.return_value.stdout = "" + + result = pu.getplatform_config_db() + assert result == "" + + @patch('subprocess.run') + @patch('os.path.isfile', return_value=True) + def test_strips_whitespace(self, mock_isfile, mock_run): + mock_run.return_value.stdout = " x86_64-ragile-r0 \n" + + result = pu.getplatform_config_db() + assert result == "x86_64-ragile-r0" + + +class TestGetonieplatform: + """Tests for getonieplatform()""" + + def test_returns_platform_from_machine_conf(self): + content = "onie_machine=ragile\nonie_platform=x86_64-ragile-r0\nonie_arch=x86_64\n" + with patch('os.path.isfile', return_value=True), \ + patch("builtins.open", mock_open(read_data=content)): + result = pu.getonieplatform("/host/machine.conf") + assert result == "x86_64-ragile-r0" + + def test_returns_none_when_no_onie_platform(self): + content = "onie_machine=ragile\nonie_arch=x86_64\n" + with patch('os.path.isfile', return_value=True), \ + patch("builtins.open", mock_open(read_data=content)): + result = pu.getonieplatform("/host/machine.conf") + assert result is None + + def test_returns_empty_when_file_missing(self): + with patch('os.path.isfile', return_value=False): + result = pu.getonieplatform("/host/machine.conf") + assert result == "" + + def test_skips_malformed_lines(self): + content = "badline\nonie_platform=x86_64-ragile-r0\nanother_bad\n" + with patch('os.path.isfile', return_value=True), \ + patch("builtins.open", mock_open(read_data=content)): + result = pu.getonieplatform("/host/machine.conf") + assert result == "x86_64-ragile-r0" + + +class TestGetplatformName: + """Tests for getplatform_name()""" + + @patch.object(pu, 'getonieplatform', return_value="x86_64-ragile-r0") + @patch('os.path.isfile', return_value=True) + def test_returns_from_machine_conf(self, mock_isfile, mock_onie): + result = pu.getplatform_name() + assert result == "x86_64-ragile-r0" + + @patch.object(pu, 'getplatform_config_db', return_value="x86_64-ragile-r0") + @patch('os.path.isfile', return_value=False) + def test_falls_back_to_config_db(self, mock_isfile, mock_cfgdb): + result = pu.getplatform_name() + assert result == "x86_64-ragile-r0" + + +class TestByteTostr: + """Tests for byteTostr()""" + + def test_bytes_to_str(self): + result = pu.byteTostr(b'\x48\x65\x6c\x6c\x6f') + assert result == "Hello" + + def test_empty_bytes(self): + result = pu.byteTostr(b'') + assert result == "" + + +class TestInttostr: + """Tests for inttostr()""" + + def test_basic(self): + result = pu.inttostr(0x41424344, 4) + assert len(result) == 4 + + def test_single_byte(self): + result = pu.inttostr(0x41, 1) + assert len(result) == 1 diff --git a/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/sonic_pcie/pcie_common.py b/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/sonic_pcie/pcie_common.py index 12f1cc8ed7b..88fea1e481b 100644 --- a/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/sonic_pcie/pcie_common.py +++ b/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/sonic_pcie/pcie_common.py @@ -25,7 +25,7 @@ def load_config_file(self): config_file = self.config_path + "/" + "pcie.yaml" try: with open(config_file) as conf_file: - self.confInfo = yaml.load(conf_file) + self.confInfo = yaml.load(conf_file, Loader=yaml.SafeLoader) except IOError as e: print("Error: {}".format(str(e))) print("Not found config file, please add a config file manually, or generate it by running [pcieutil pcie_generate]") diff --git a/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/sonic_platform/sfp.py b/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/sonic_platform/sfp.py index c1d4cb998a6..25464444596 100644 --- a/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/sonic_platform/sfp.py +++ b/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/sonic_platform/sfp.py @@ -34,6 +34,7 @@ ############################################################################# import sys import time +import subprocess import syslog import traceback from abc import abstractmethod @@ -67,7 +68,8 @@ def getonieplatform(path): def getplatform_config_db(): if not os.path.isfile(CONFIG_DB_PATH): return "" - val = os.popen("sonic-cfggen -j %s -v DEVICE_METADATA.localhost.platform" % CONFIG_DB_PATH).read().strip() + val = subprocess.run(["sonic-cfggen", "-j", CONFIG_DB_PATH, "-v", "DEVICE_METADATA.localhost.platform"], + stdout=subprocess.PIPE, stderr=subprocess.DEVNULL, text=True).stdout.strip() if len(val) <= 0: return "" else: diff --git a/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/sonic_platform/tests/test_sfp.py b/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/sonic_platform/tests/test_sfp.py new file mode 100644 index 00000000000..7d981f5eb22 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ragile/ra-b6510-32c/sonic_platform/tests/test_sfp.py @@ -0,0 +1,110 @@ +#!/usr/bin/env python3 +# -*- coding: UTF-8 -*- +""" +Unit tests for sfp.py — focused on getplatform_config_db and getonieplatform +""" + +import os +import sys +import pytest +from unittest.mock import patch, mock_open, MagicMock + +# Mock platform-specific imports BEFORE importing sfp +sys.modules['sonic_platform_base'] = MagicMock() +sys.modules['sonic_platform_base.sonic_sfp'] = MagicMock() +sys.modules['sonic_platform_base.sonic_sfp.sfputilhelper'] = MagicMock() +sys.modules['sonic_platform_base.sfp_base'] = MagicMock() +sys.modules['sonic_platform_base.sonic_xcvr'] = MagicMock() +sys.modules['sonic_platform_base.sonic_xcvr.sfp_optoe_base'] = MagicMock() + +# Add the sfp.py directory to path and create a fake package +sfp_dir = os.path.join(os.path.dirname(os.path.abspath(__file__)), '..') +sys.path.insert(0, sfp_dir) + +# Create a fake package so relative imports work +import types +sonic_platform_pkg = types.ModuleType('sonic_platform') +sonic_platform_pkg.__path__ = [sfp_dir] +sonic_platform_pkg.sfp_config = MagicMock() +sys.modules['sonic_platform'] = sonic_platform_pkg +sys.modules['sonic_platform.sfp_config'] = sonic_platform_pkg.sfp_config + +# Now import sfp as part of the package +import importlib.util +spec = importlib.util.spec_from_file_location("sonic_platform.sfp", os.path.join(sfp_dir, "sfp.py"), + submodule_search_locations=[]) +sfp = importlib.util.module_from_spec(spec) +sys.modules['sonic_platform.sfp'] = sfp +spec.loader.exec_module(sfp) + + +class TestGetplatformConfigDb: + """Tests for getplatform_config_db() in sfp.py""" + + @patch('os.path.isfile', return_value=False) + def test_returns_empty_when_config_db_missing(self, mock_isfile): + result = sfp.getplatform_config_db() + assert result == "" + + @patch('subprocess.run') + @patch('os.path.isfile', return_value=True) + def test_returns_platform_name(self, mock_isfile, mock_run): + mock_run.return_value.stdout = "x86_64-ragile_ra-b6510-32c-r0" + + result = sfp.getplatform_config_db() + assert result == "x86_64-ragile_ra-b6510-32c-r0" + + @patch('subprocess.run') + @patch('os.path.isfile', return_value=True) + def test_returns_empty_when_command_returns_empty(self, mock_isfile, mock_run): + mock_run.return_value.stdout = "" + + result = sfp.getplatform_config_db() + assert result == "" + + @patch('subprocess.run') + @patch('os.path.isfile', return_value=True) + def test_strips_whitespace(self, mock_isfile, mock_run): + mock_run.return_value.stdout = " x86_64-ragile-r0 \n" + + result = sfp.getplatform_config_db() + assert result == "x86_64-ragile-r0" + + +class TestGetonieplatform: + """Tests for getonieplatform() in sfp.py""" + + def test_returns_platform_from_machine_conf(self): + content = "onie_machine=ragile\nonie_platform=x86_64-ragile_ra-b6510-32c-r0\nonie_arch=x86_64\n" + with patch('os.path.isfile', return_value=True), \ + patch("builtins.open", mock_open(read_data=content)): + result = sfp.getonieplatform("/host/machine.conf") + assert result == "x86_64-ragile_ra-b6510-32c-r0" + + def test_returns_none_when_no_onie_platform(self): + content = "onie_machine=ragile\nonie_arch=x86_64\n" + with patch('os.path.isfile', return_value=True), \ + patch("builtins.open", mock_open(read_data=content)): + result = sfp.getonieplatform("/host/machine.conf") + assert result is None + + def test_returns_empty_when_file_missing(self): + with patch('os.path.isfile', return_value=False): + result = sfp.getonieplatform("/host/machine.conf") + assert result == "" + + +class TestGetplatformName: + """Tests for getplatform_name() in sfp.py""" + + @patch.object(sfp, 'getonieplatform', return_value="x86_64-ragile-r0") + @patch('os.path.isfile', return_value=True) + def test_returns_from_machine_conf(self, mock_isfile, mock_onie): + result = sfp.getplatform_name() + assert result == "x86_64-ragile-r0" + + @patch.object(sfp, 'getplatform_config_db', return_value="x86_64-ragile-r0") + @patch('os.path.isfile', return_value=False) + def test_falls_back_to_config_db(self, mock_isfile, mock_cfgdb): + result = sfp.getplatform_name() + assert result == "x86_64-ragile-r0" diff --git a/platform/broadcom/sonic-platform-modules-ragile/ra-b6910-64c/sonic_pcie/pcie_common.py b/platform/broadcom/sonic-platform-modules-ragile/ra-b6910-64c/sonic_pcie/pcie_common.py index 56e9d8664a2..ecc0c4e915a 100644 --- a/platform/broadcom/sonic-platform-modules-ragile/ra-b6910-64c/sonic_pcie/pcie_common.py +++ b/platform/broadcom/sonic-platform-modules-ragile/ra-b6910-64c/sonic_pcie/pcie_common.py @@ -25,7 +25,7 @@ def load_config_file(self): config_file = self.config_path + "/" + "pcie.yaml" try: with open(config_file) as conf_file: - self.confInfo = yaml.load(conf_file) + self.confInfo = yaml.load(conf_file, Loader=yaml.SafeLoader) except IOError as e: print("Error: {}".format(str(e))) print("Not found config file, please add a config file manually, or generate it by running [pcieutil pcie_generate]") diff --git a/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/sonic_pcie/pcie_common.py b/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/sonic_pcie/pcie_common.py index 12f1cc8ed7b..88fea1e481b 100644 --- a/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/sonic_pcie/pcie_common.py +++ b/platform/broadcom/sonic-platform-modules-ragile/ra-b6920-4s/sonic_pcie/pcie_common.py @@ -25,7 +25,7 @@ def load_config_file(self): config_file = self.config_path + "/" + "pcie.yaml" try: with open(config_file) as conf_file: - self.confInfo = yaml.load(conf_file) + self.confInfo = yaml.load(conf_file, Loader=yaml.SafeLoader) except IOError as e: print("Error: {}".format(str(e))) print("Not found config file, please add a config file manually, or generate it by running [pcieutil pcie_generate]") diff --git a/platform/broadcom/sonic-platform-modules-ruijie/b6510-48vs8cq/sonic_pcie/pcie_common.py b/platform/broadcom/sonic-platform-modules-ruijie/b6510-48vs8cq/sonic_pcie/pcie_common.py index 12f1cc8ed7b..88fea1e481b 100644 --- a/platform/broadcom/sonic-platform-modules-ruijie/b6510-48vs8cq/sonic_pcie/pcie_common.py +++ b/platform/broadcom/sonic-platform-modules-ruijie/b6510-48vs8cq/sonic_pcie/pcie_common.py @@ -25,7 +25,7 @@ def load_config_file(self): config_file = self.config_path + "/" + "pcie.yaml" try: with open(config_file) as conf_file: - self.confInfo = yaml.load(conf_file) + self.confInfo = yaml.load(conf_file, Loader=yaml.SafeLoader) except IOError as e: print("Error: {}".format(str(e))) print("Not found config file, please add a config file manually, or generate it by running [pcieutil pcie_generate]") diff --git a/platform/broadcom/sonic-platform-modules-supermicro/debian/control b/platform/broadcom/sonic-platform-modules-supermicro/debian/control index 85914670bc0..613a44023e6 100644 --- a/platform/broadcom/sonic-platform-modules-supermicro/debian/control +++ b/platform/broadcom/sonic-platform-modules-supermicro/debian/control @@ -8,10 +8,10 @@ Standards-Version: 3.9.3 Package: platform-modules-sse-t8164 Architecture: amd64 -Depends: linux-image-6.12.41+deb13-sonic-amd64-unsigned, ${python3:Depends} +Depends: ${misc:Depends}, ${python3:Depends} Description: kernel modules for platform devices such as fan, led, sfp Package: platform-modules-sse-t8196 Architecture: amd64 -Depends: linux-image-6.12.41+deb13-sonic-amd64-unsigned, ${python3:Depends} +Depends: ${misc:Depends}, ${python3:Depends} Description: kernel modules for platform devices such as fan, led, sfp diff --git a/platform/broadcom/sonic-platform-modules-supermicro/debian/platform-modules-sse-t8164.install b/platform/broadcom/sonic-platform-modules-supermicro/debian/platform-modules-sse-t8164.install new file mode 100644 index 00000000000..9937a2dc13a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-supermicro/debian/platform-modules-sse-t8164.install @@ -0,0 +1 @@ +sse-t8164/sonic_platform-1.0-py3-none-any.whl usr/share/sonic/device/x86_64-supermicro_sse_t8164-r0/pddf diff --git a/platform/broadcom/sonic-platform-modules-supermicro/debian/platform-modules-sse-t8196.install b/platform/broadcom/sonic-platform-modules-supermicro/debian/platform-modules-sse-t8196.install new file mode 100644 index 00000000000..dd940125c0f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-supermicro/debian/platform-modules-sse-t8196.install @@ -0,0 +1 @@ +sse-t8196/sonic_platform-1.0-py3-none-any.whl usr/share/sonic/device/x86_64-supermicro_sse_t8196-r0/pddf diff --git a/platform/broadcom/sonic-platform-modules-supermicro/debian/rules b/platform/broadcom/sonic-platform-modules-supermicro/debian/rules index 605ea2f141c..fdf8f7cc386 100755 --- a/platform/broadcom/sonic-platform-modules-supermicro/debian/rules +++ b/platform/broadcom/sonic-platform-modules-supermicro/debian/rules @@ -48,6 +48,11 @@ override_dh_auto_build: fi; \ cd $(MOD_SRC_DIR); \ fi; \ + if [ -f $(MOD_SRC_DIR)/$${mod}/sonic_platform_setup.py ]; then \ + cd $(MOD_SRC_DIR)/$${mod}; \ + python3 sonic_platform_setup.py bdist_wheel -d $(MOD_SRC_DIR)/$${mod}; \ + cd $(MOD_SRC_DIR); \ + fi; \ done) override_dh_auto_test: @@ -57,7 +62,7 @@ override_dh_usrlocal: override_dh_auto_install: (set -e; for mod in $(MODULE_DIRS); do \ - $(MAKE) -C $(KERNEL_SRC)/build M=$(MOD_SRC_DIR) INSTALL_MOD_PATH=$(MOD_SRC_DIR)/debian/platform-modules-$${mod} modules_install; \ + $(MAKE) -C $(KERNEL_SRC)/build M=$(MOD_SRC_DIR)/$${mod}/modules INSTALL_MOD_PATH=$(MOD_SRC_DIR)/debian/$(PACKAGE_PRE_NAME)-$${mod} modules_install; \ dh_installdirs -p$(PACKAGE_PRE_NAME)-$${mod} usr/local/bin; \ cp $(MOD_SRC_DIR)/$${mod}/$(UTILS_DIR)/* debian/$(PACKAGE_PRE_NAME)-$${mod}/usr/local/bin/; \ dh_installdirs -p$(PACKAGE_PRE_NAME)-$${mod} lib/systemd/system; \ diff --git a/platform/broadcom/sonic-platform-modules-tencent/common/lib/plat_hal/sensor.py b/platform/broadcom/sonic-platform-modules-tencent/common/lib/plat_hal/sensor.py index eb932f2629b..2f3c73557ba 100755 --- a/platform/broadcom/sonic-platform-modules-tencent/common/lib/plat_hal/sensor.py +++ b/platform/broadcom/sonic-platform-modules-tencent/common/lib/plat_hal/sensor.py @@ -20,7 +20,6 @@ class sensor(devicebase): __ValueConfig = None __Flag = None __Unit = None - __format = None __read_times = None __Min_config = None @@ -68,14 +67,6 @@ def Unit(self): def Unit(self, val): self.__Unit = val - @property - def format(self): - return self.__format - - @format.setter - def format(self, val): - self.__format = val - @property def read_times(self): return self.__read_times @@ -114,17 +105,19 @@ def get_median(self, value_config, read_times): return True, val_list[int((len(val_list) - 1) / 2)] return False, None + def _scale(self, val): + """Apply divisor/multiplier scaling to a raw sensor value.""" + if self.divisor is not None: + return round(float(val) / self.divisor * self.multiplier, 3) + return round(float(val), 3) + @property def Value(self): try: ret, val = self.get_median(self.ValueConfig, self.read_times) if ret is False or val is None: return None - if self.format is None: - self.__Value = int(val) - else: - self.__Value = eval(self.format % val) - self.__Value = round(float(self.__Value), 3) + self.__Value = self._scale(val) except Exception as e: return None return self.__Value @@ -136,11 +129,7 @@ def Value(self, val): @property def Min(self): try: - if self.format is None: - self.__Min = self.Min_config - else: - self.__Min = eval(self.format % self.Min_config) - self.__Min = round(float(self.__Min), 3) + self.__Min = round(float(self._scale(self.Min_config)), 3) except Exception as e: return None return self.__Min @@ -152,11 +141,7 @@ def Min(self, val): @property def Max(self): try: - if self.format is None: - self.__Max = self.Max_config - else: - self.__Max = eval(self.format % self.Max_config) - self.__Max = round(float(self.__Max), 3) + self.__Max = round(float(self._scale(self.Max_config)), 3) except Exception as e: return None return self.__Max @@ -168,10 +153,7 @@ def Max(self, val): @property def Low(self): try: - if self.format is None: - self.__Low = self.Low_config - else: - self.__Low = eval(self.format % self.Low_config) + self.__Low = self._scale(self.Low_config) except Exception as e: return None return self.__Low @@ -183,10 +165,7 @@ def Low(self, val): @property def High(self): try: - if self.format is None: - self.__High = self.High_config - else: - self.__High = eval(self.format % self.High_config) + self.__High = self._scale(self.High_config) except Exception as e: return None return self.__High @@ -203,7 +182,8 @@ def __init__(self, conf=None): self.Low_config = conf.get("Low", None) self.High_config = conf.get("High", None) self.Unit = conf.get('Unit', None) - self.format = conf.get('format', None) + self.divisor = conf.get('divisor', None) + self.multiplier = conf.get('multiplier', 1.0) self.read_times = conf.get('read_times', 1) def __str__(self): @@ -212,9 +192,10 @@ def __str__(self): "Min : %s \n" \ "Max : %s \n" \ "Unit : %s \n" \ - "format: : %s \n" + "divisor: : %s \n" \ + "multiplier: : %s \n" tmpstr = formatstr % (self.ValueConfig, self.Min, self.Max, self.Unit, - self.format) + self.divisor, self.multiplier) return tmpstr diff --git a/platform/broadcom/sonic-platform-modules-tencent/common/lib/plat_hal/temp.py b/platform/broadcom/sonic-platform-modules-tencent/common/lib/plat_hal/temp.py index 2652d11cc49..434c294065c 100755 --- a/platform/broadcom/sonic-platform-modules-tencent/common/lib/plat_hal/temp.py +++ b/platform/broadcom/sonic-platform-modules-tencent/common/lib/plat_hal/temp.py @@ -115,18 +115,12 @@ def Value(self): max = tmp if max is None: return None - if self.format is None: - self.__Value = int(max) - else: - self.__Value = eval(self.format % max) + self.__Value = self._scale(max) else: ret, val = self.get_value(self.ValueConfig) if ret is False or val is None: return None - if self.format is None: - self.__Value = int(val) - else: - self.__Value = eval(self.format % val) + self.__Value = self._scale(val) except Exception as e: return None if self.fix_value is not None and self.__Value != self.temp_invalid and self.__Value != self.temp_error: diff --git a/platform/broadcom/sonic-platform-modules-tencent/common/lib/plat_hal/tests/test_sensor_format_validation.py b/platform/broadcom/sonic-platform-modules-tencent/common/lib/plat_hal/tests/test_sensor_format_validation.py new file mode 100644 index 00000000000..9a52c812991 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-tencent/common/lib/plat_hal/tests/test_sensor_format_validation.py @@ -0,0 +1,215 @@ +#!/usr/bin/env python3 +""" +Unit tests for sensor.py divisor/multiplier scaling (F078 fix). + +Verifies that eval() is gone and that divisor/multiplier correctly +replaces the old 'format' string patterns from platform config. +""" +import sys +import os +import types +import unittest + +# --------------------------------------------------------------------------- +# Stub heavy dependencies +# --------------------------------------------------------------------------- +_plat_hal_pkg = types.ModuleType("plat_hal") +sys.modules.setdefault("plat_hal", _plat_hal_pkg) + +_devicebase_mod = types.ModuleType("plat_hal.devicebase") + + +class _StubDevicebase: + def get_value(self, conf): + return False, None + + def get_median(self, conf, read_times): + return False, None + + +_devicebase_mod.devicebase = _StubDevicebase +sys.modules["plat_hal.devicebase"] = _devicebase_mod +_plat_hal_pkg.devicebase = _devicebase_mod + +_HERE = os.path.dirname(os.path.abspath(__file__)) +_HAL_DIR = os.path.dirname(_HERE) +if _HAL_DIR not in sys.path: + sys.path.insert(0, _HAL_DIR) + +from sensor import sensor + +# Also register sensor under plat_hal.sensor so temp.py can import it +_sensor_mod = types.ModuleType("plat_hal.sensor") +_sensor_mod.sensor = sensor +sys.modules["plat_hal.sensor"] = _sensor_mod +_plat_hal_pkg.sensor = _sensor_mod + +import temp as temp_mod +from temp import temp + + +# --------------------------------------------------------------------------- +# Helpers +# --------------------------------------------------------------------------- + +def make_sensor(divisor=None, multiplier=None, min_val=100, max_val=50000, + low_val=200, high_val=45000): + conf = { + "value": None, + "flag": None, + "Min": min_val, + "Max": max_val, + "Low": low_val, + "High": high_val, + "Unit": None, + "read_times": 1, + } + if divisor is not None: + conf["divisor"] = divisor + if multiplier is not None: + conf["multiplier"] = multiplier + return sensor(conf) + + +# --------------------------------------------------------------------------- +# Tests: no eval() in sensor.py or temp.py +# --------------------------------------------------------------------------- + +class TestNoEval(unittest.TestCase): + def test_sensor_module_has_no_eval(self): + import inspect + import sensor as sensor_mod + source = inspect.getsource(sensor_mod) + self.assertNotIn("eval(", source, + "sensor.py must not contain eval()") + + def test_temp_module_has_no_format_eval(self): + """temp.py Value property must not use eval(self.format %).""" + temp_path = os.path.join(_HAL_DIR, "temp.py") + with open(temp_path) as f: + source = f.read() + self.assertNotIn("eval(self.format", source, + "temp.py must not contain eval(self.format ...)") + + def test_temp_scale_method_available(self): + """temp instance must have _scale() from sensor inheritance — no AttributeError.""" + conf = { + "name": "test_temp", + "temp_id": "TEMP0", + "Temperature": { + "value": None, + "flag": None, + "Min": 0, + "Max": 80000, + "Low": 0, + "High": 75000, + "Unit": None, + "divisor": 1000, + "read_times": 1, + }, + } + t = temp(conf) + # Must not raise AttributeError + result = t._scale("50000") + self.assertAlmostEqual(result, 50.0, places=3) + + def test_temp_scale_no_divisor(self): + """temp without divisor returns round(float(val), 3).""" + conf = { + "name": "test_temp", + "temp_id": "TEMP0", + "Temperature": { + "value": None, + "flag": None, + "Min": 0, + "Max": 100, + "Low": 0, + "High": 90, + "Unit": None, + "read_times": 1, + }, + } + t = temp(conf) + self.assertAlmostEqual(t._scale("42.5"), 42.5, places=3) + + +# --------------------------------------------------------------------------- +# Tests: _scale() correctness +# --------------------------------------------------------------------------- + +class TestScaling(unittest.TestCase): + def test_no_divisor_returns_float_rounded(self): + """No divisor: _scale returns round(float(val), 3).""" + s = make_sensor() + self.assertAlmostEqual(s._scale("3.200"), 3.2, places=3) + self.assertAlmostEqual(s._scale("42"), 42.0, places=3) + + def test_divisor_1_preserves_float(self): + """divisor=1 (replaces 'format': '%s'): preserves float precision.""" + s = make_sensor(divisor=1) + self.assertAlmostEqual(s._scale("3.200"), 3.2, places=3) + self.assertAlmostEqual(s._scale("3.600"), 3.6, places=3) + + def test_divisor_1000(self): + """float(float(%s)/1000) equivalent""" + s = make_sensor(divisor=1000) + self.assertAlmostEqual(s._scale("5000"), 5.0, places=3) + self.assertAlmostEqual(s._scale("1234"), 1.234, places=3) + + def test_divisor_1000000(self): + """float(float(%s)/1000000) equivalent""" + s = make_sensor(divisor=1000000) + self.assertAlmostEqual(s._scale("2000000"), 2.0, places=3) + + def test_divisor_1000_multiplier_1124(self): + """float(float(%s)/1000) * 1.124 equivalent""" + s = make_sensor(divisor=1000, multiplier=1.124) + expected = round(5000 / 1000 * 1.124, 3) + self.assertAlmostEqual(s._scale("5000"), expected, places=3) + + def test_default_multiplier_is_1(self): + s = make_sensor(divisor=1000) + self.assertEqual(s.multiplier, 1.0) + + def test_scale_result_rounded_to_3dp(self): + s = make_sensor(divisor=1000) + result = s._scale("1") + self.assertEqual(result, round(1 / 1000 * 1.0, 3)) + + +# --------------------------------------------------------------------------- +# Tests: Min/Max/Low/High property scaling +# --------------------------------------------------------------------------- + +class TestPropertyScaling(unittest.TestCase): + def test_min_scaled(self): + s = make_sensor(divisor=1000) + self.assertAlmostEqual(s.Min, 0.1, places=3) # 100/1000 + + def test_max_scaled(self): + s = make_sensor(divisor=1000) + self.assertAlmostEqual(s.Max, 50.0, places=3) # 50000/1000 + + def test_low_scaled(self): + s = make_sensor(divisor=1000) + self.assertAlmostEqual(s.Low, 0.2, places=3) # 200/1000 + + def test_high_scaled(self): + s = make_sensor(divisor=1000) + self.assertAlmostEqual(s.High, 45.0, places=3) # 45000/1000 + + def test_divisor_1_float_min_preserved(self): + """divisor=1 preserves float Min (fixes MAC_QSFPDD_VDD3.3V_* regression).""" + s = make_sensor(divisor=1, min_val=3.200, max_val=3.600, + low_val=3.100, high_val=3.700) + self.assertAlmostEqual(s.Min, 3.2, places=3) + self.assertAlmostEqual(s.Max, 3.6, places=3) + + def test_no_divisor_float_min_preserved(self): + """No divisor: float Min also preserved (round(float(val), 3)).""" + s = make_sensor(min_val=3.200, max_val=3.600) + self.assertAlmostEqual(s.Min, 3.2, places=3) + + +if __name__ == "__main__": + unittest.main() diff --git a/platform/broadcom/sonic-platform-modules-tencent/tcs8400/hal-config/x86_64_tencent_tcs8400_r0_0x407b_device.py b/platform/broadcom/sonic-platform-modules-tencent/tcs8400/hal-config/x86_64_tencent_tcs8400_r0_0x407b_device.py index 76174fd8a9c..d09bfff8227 100755 --- a/platform/broadcom/sonic-platform-modules-tencent/tcs8400/hal-config/x86_64_tencent_tcs8400_r0_0x407b_device.py +++ b/platform/broadcom/sonic-platform-modules-tencent/tcs8400/hal-config/x86_64_tencent_tcs8400_r0_0x407b_device.py @@ -101,7 +101,7 @@ class Description: "Min": threshold.PSU_TEMP_MIN, "Max": threshold.PSU_TEMP_MAX, "Unit": Unit.Temperature, - "format": "float(float(%s)/1000)" + "divisor": 1000 }, "FanStatus": {"bus": 41, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0400}, "FanSpeed": { @@ -118,7 +118,7 @@ class Description: "Min": threshold.PSU_AC_INPUT_VOLTAGE_MIN, "Max": threshold.PSU_AC_INPUT_VOLTAGE_MAX, "Unit": Unit.Voltage, - "format": "float(float(%s)/1000)" + "divisor": 1000 }, 'DC': { @@ -126,14 +126,14 @@ class Description: "Min": threshold.PSU_DC_INPUT_VOLTAGE_MIN, "Max": threshold.PSU_DC_INPUT_VOLTAGE_MAX, "Unit": Unit.Voltage, - "format": "float(float(%s)/1000)" + "divisor": 1000 }, 'other': { "value": {"loc": "/sys/bus/i2c/devices/i2c-41/41-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, "Min": threshold.ERR_VALUE, "Max": threshold.ERR_VALUE, "Unit": Unit.Voltage, - "format": "float(float(%s)/1000)" + "divisor": 1000 } }, "InputsCurrent": @@ -142,7 +142,7 @@ class Description: "Min": threshold.PSU_INPUT_CURRENT_MIN, "Max": threshold.PSU_INPUT_CURRENT_MAX, "Unit": Unit.Current, - "format": "float(float(%s)/1000)" + "divisor": 1000 }, "InputsPower": { @@ -150,7 +150,7 @@ class Description: "Min": threshold.PSU_INPUT_POWER_MIN, "Max": threshold.PSU_INPUT_POWER_MAX, "Unit": Unit.Power, - "format": "float(float(%s)/1000000)" + "divisor": 1000000 }, "OutputsStatus": {"bus": 41, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x8800}, "OutputsVoltage": @@ -159,7 +159,7 @@ class Description: "Min": threshold.PSU_OUTPUT_VOLTAGE_MIN, "Max": threshold.PSU_OUTPUT_VOLTAGE_MAX, "Unit": Unit.Voltage, - "format": "float(float(%s)/1000)" + "divisor": 1000 }, "OutputsCurrent": { @@ -167,7 +167,7 @@ class Description: "Min": threshold.PSU_OUTPUT_CURRENT_MIN, "Max": threshold.PSU_OUTPUT_CURRENT_MAX, "Unit": Unit.Current, - "format": "float(float(%s)/1000)" + "divisor": 1000 }, "OutputsPower": { @@ -175,7 +175,7 @@ class Description: "Min": threshold.PSU_OUTPUT_POWER_MIN, "Max": threshold.PSU_OUTPUT_POWER_MAX, "Unit": Unit.Power, - "format": "float(float(%s)/1000000)" + "divisor": 1000000 }, }, { @@ -192,7 +192,7 @@ class Description: "Min": threshold.PSU_TEMP_MIN, "Max": threshold.PSU_TEMP_MAX, "Unit": Unit.Temperature, - "format": "float(float(%s)/1000)" + "divisor": 1000 }, "FanStatus": {"bus": 42, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0400}, "FanSpeed": { @@ -209,7 +209,7 @@ class Description: "Min": threshold.PSU_AC_INPUT_VOLTAGE_MIN, "Max": threshold.PSU_AC_INPUT_VOLTAGE_MAX, "Unit": Unit.Voltage, - "format": "float(float(%s)/1000)" + "divisor": 1000 }, 'DC': { @@ -217,14 +217,14 @@ class Description: "Min": threshold.PSU_DC_INPUT_VOLTAGE_MIN, "Max": threshold.PSU_DC_INPUT_VOLTAGE_MAX, "Unit": Unit.Voltage, - "format": "float(float(%s)/1000)" + "divisor": 1000 }, 'other': { "value": {"loc": "/sys/bus/i2c/devices/i2c-42/42-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, "Min": threshold.ERR_VALUE, "Max": threshold.ERR_VALUE, "Unit": Unit.Voltage, - "format": "float(float(%s)/1000)" + "divisor": 1000 } }, "InputsCurrent": @@ -233,7 +233,7 @@ class Description: "Min": threshold.PSU_INPUT_CURRENT_MIN, "Max": threshold.PSU_INPUT_CURRENT_MAX, "Unit": Unit.Current, - "format": "float(float(%s)/1000)" + "divisor": 1000 }, "InputsPower": { @@ -241,7 +241,7 @@ class Description: "Min": threshold.PSU_INPUT_POWER_MIN, "Max": threshold.PSU_INPUT_POWER_MAX, "Unit": Unit.Power, - "format": "float(float(%s)/1000000)" + "divisor": 1000000 }, "OutputsStatus": {"bus": 42, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x8800}, "OutputsVoltage": @@ -250,7 +250,7 @@ class Description: "Min": threshold.PSU_OUTPUT_VOLTAGE_MIN, "Max": threshold.PSU_OUTPUT_VOLTAGE_MAX, "Unit": Unit.Voltage, - "format": "float(float(%s)/1000)" + "divisor": 1000 }, "OutputsCurrent": { @@ -258,7 +258,7 @@ class Description: "Min": threshold.PSU_OUTPUT_CURRENT_MIN, "Max": threshold.PSU_OUTPUT_CURRENT_MAX, "Unit": Unit.Current, - "format": "float(float(%s)/1000)" + "divisor": 1000 }, "OutputsPower": { @@ -266,7 +266,7 @@ class Description: "Min": threshold.PSU_OUTPUT_POWER_MIN, "Max": threshold.PSU_OUTPUT_POWER_MAX, "Unit": Unit.Power, - "format": "float(float(%s)/1000000)" + "divisor": 1000000 }, } ], @@ -282,7 +282,7 @@ class Description: "High": 70000, "Max": 80000, "Unit": Unit.Temperature, - "format": "float(float(%s)/1000)" + "divisor": 1000 } }, { @@ -296,7 +296,7 @@ class Description: "High": 100000, "Max": 104000, "Unit": Unit.Temperature, - "format": "float(float(%s)/1000)" + "divisor": 1000 } }, { @@ -310,7 +310,7 @@ class Description: "High": 40000, "Max": 50000, "Unit": Unit.Temperature, - "format": "float(float(%s)/1000)" + "divisor": 1000 } }, { @@ -324,7 +324,7 @@ class Description: "High": 70000, "Max": 80000, "Unit": Unit.Temperature, - "format": "float(float(%s)/1000)" + "divisor": 1000 } }, { @@ -338,7 +338,7 @@ class Description: "High": 100000, "Max": 105000, "Unit": Unit.Temperature, - "format": "float(float(%s)/1000)" + "divisor": 1000 } }, { @@ -350,7 +350,7 @@ class Description: "High": 80000, "Max": 100000, "Unit": Unit.Temperature, - "format": "float(float(%s)/1000)" + "divisor": 1000 } }, ], @@ -715,7 +715,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 5345, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "VDD3.3_CLK", @@ -728,7 +728,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 3560, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "VDD1.0V", @@ -741,7 +741,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 1049, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "VDD1.8V", @@ -754,7 +754,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 1903, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "MAC_BOARD_VDD3.3V", @@ -767,7 +767,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 3499, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "VDD1.2V", @@ -780,7 +780,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 1272, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "VDD_CORE", @@ -793,7 +793,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 950, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "ANALOG0.75V", @@ -806,7 +806,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 800, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "MAC_VDD1.2V", @@ -819,7 +819,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 1259, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "VDDO1.8V", @@ -832,7 +832,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 1937, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "MAC_ANA1.2V", @@ -845,7 +845,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 1276, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "MAC_ANA1.8V", @@ -858,7 +858,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 1910, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "QSFP56_VDD3.3V_A", @@ -871,7 +871,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 3595, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "QSFP56_VDD3.3V_B", @@ -884,7 +884,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 3601, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "QSFPDD_VDD3.3V_A", @@ -897,7 +897,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 3565, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "QSFPDD_VDD3.3V_B", @@ -910,7 +910,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 3564, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "VDD5.0V", @@ -923,7 +923,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 5429, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "CONNECT_BOARD_VDD3.3V", @@ -936,7 +936,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 3437, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "VDD12V", @@ -949,7 +949,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 12700, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "VDD3.3_STBY", @@ -962,7 +962,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 3489, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "SSD_VDD3.3V", @@ -975,7 +975,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 3475, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "PHY_VDD1V0", @@ -988,7 +988,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 1050, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "ODD_PHY_M", @@ -1001,7 +1001,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 3444, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "VCCIN", @@ -1014,7 +1014,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 1879, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "P1V05", @@ -1027,7 +1027,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 1103, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "P1V2_VDDQ", @@ -1040,7 +1040,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 1258, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "P2V5_VPP", @@ -1053,7 +1053,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 2342, - "format": "float(float(%s)/1000) * 1.124", + "divisor": 1000, "multiplier": 1.124, }, { "name": "P3V3_STBY", @@ -1066,7 +1066,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 3476, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "P5V_AUX_IN", @@ -1079,7 +1079,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 5229, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "P1V7_VCCSCFUSESUS_IN", @@ -1092,7 +1092,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 1789, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, ], "cpu": [ diff --git a/platform/broadcom/sonic-platform-modules-tencent/tcs8400/hal-config/x86_64_tencent_tcs8400_r0_device.py b/platform/broadcom/sonic-platform-modules-tencent/tcs8400/hal-config/x86_64_tencent_tcs8400_r0_device.py index 2a7b99b47fd..c1eccbfccd3 100755 --- a/platform/broadcom/sonic-platform-modules-tencent/tcs8400/hal-config/x86_64_tencent_tcs8400_r0_device.py +++ b/platform/broadcom/sonic-platform-modules-tencent/tcs8400/hal-config/x86_64_tencent_tcs8400_r0_device.py @@ -101,7 +101,7 @@ class Description: "Min": threshold.PSU_TEMP_MIN, "Max": threshold.PSU_TEMP_MAX, "Unit": Unit.Temperature, - "format": "float(float(%s)/1000)" + "divisor": 1000 }, "FanStatus": {"bus": 41, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0400}, "FanSpeed": { @@ -118,7 +118,7 @@ class Description: "Min": threshold.PSU_AC_INPUT_VOLTAGE_MIN, "Max": threshold.PSU_AC_INPUT_VOLTAGE_MAX, "Unit": Unit.Voltage, - "format": "float(float(%s)/1000)" + "divisor": 1000 }, 'DC': { @@ -126,14 +126,14 @@ class Description: "Min": threshold.PSU_DC_INPUT_VOLTAGE_MIN, "Max": threshold.PSU_DC_INPUT_VOLTAGE_MAX, "Unit": Unit.Voltage, - "format": "float(float(%s)/1000)" + "divisor": 1000 }, 'other': { "value": {"loc": "/sys/bus/i2c/devices/i2c-41/41-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, "Min": threshold.ERR_VALUE, "Max": threshold.ERR_VALUE, "Unit": Unit.Voltage, - "format": "float(float(%s)/1000)" + "divisor": 1000 } }, "InputsCurrent": @@ -142,7 +142,7 @@ class Description: "Min": threshold.PSU_INPUT_CURRENT_MIN, "Max": threshold.PSU_INPUT_CURRENT_MAX, "Unit": Unit.Current, - "format": "float(float(%s)/1000)" + "divisor": 1000 }, "InputsPower": { @@ -150,7 +150,7 @@ class Description: "Min": threshold.PSU_INPUT_POWER_MIN, "Max": threshold.PSU_INPUT_POWER_MAX, "Unit": Unit.Power, - "format": "float(float(%s)/1000000)" + "divisor": 1000000 }, "OutputsStatus": {"bus": 41, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x8800}, "OutputsVoltage": @@ -159,7 +159,7 @@ class Description: "Min": threshold.PSU_OUTPUT_VOLTAGE_MIN, "Max": threshold.PSU_OUTPUT_VOLTAGE_MAX, "Unit": Unit.Voltage, - "format": "float(float(%s)/1000)" + "divisor": 1000 }, "OutputsCurrent": { @@ -167,7 +167,7 @@ class Description: "Min": threshold.PSU_OUTPUT_CURRENT_MIN, "Max": threshold.PSU_OUTPUT_CURRENT_MAX, "Unit": Unit.Current, - "format": "float(float(%s)/1000)" + "divisor": 1000 }, "OutputsPower": { @@ -175,7 +175,7 @@ class Description: "Min": threshold.PSU_OUTPUT_POWER_MIN, "Max": threshold.PSU_OUTPUT_POWER_MAX, "Unit": Unit.Power, - "format": "float(float(%s)/1000000)" + "divisor": 1000000 }, }, { @@ -192,7 +192,7 @@ class Description: "Min": threshold.PSU_TEMP_MIN, "Max": threshold.PSU_TEMP_MAX, "Unit": Unit.Temperature, - "format": "float(float(%s)/1000)" + "divisor": 1000 }, "FanStatus": {"bus": 42, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0400}, "FanSpeed": { @@ -209,7 +209,7 @@ class Description: "Min": threshold.PSU_AC_INPUT_VOLTAGE_MIN, "Max": threshold.PSU_AC_INPUT_VOLTAGE_MAX, "Unit": Unit.Voltage, - "format": "float(float(%s)/1000)" + "divisor": 1000 }, 'DC': { @@ -217,14 +217,14 @@ class Description: "Min": threshold.PSU_DC_INPUT_VOLTAGE_MIN, "Max": threshold.PSU_DC_INPUT_VOLTAGE_MAX, "Unit": Unit.Voltage, - "format": "float(float(%s)/1000)" + "divisor": 1000 }, 'other': { "value": {"loc": "/sys/bus/i2c/devices/i2c-42/42-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, "Min": threshold.ERR_VALUE, "Max": threshold.ERR_VALUE, "Unit": Unit.Voltage, - "format": "float(float(%s)/1000)" + "divisor": 1000 } }, "InputsCurrent": @@ -233,7 +233,7 @@ class Description: "Min": threshold.PSU_INPUT_CURRENT_MIN, "Max": threshold.PSU_INPUT_CURRENT_MAX, "Unit": Unit.Current, - "format": "float(float(%s)/1000)" + "divisor": 1000 }, "InputsPower": { @@ -241,7 +241,7 @@ class Description: "Min": threshold.PSU_INPUT_POWER_MIN, "Max": threshold.PSU_INPUT_POWER_MAX, "Unit": Unit.Power, - "format": "float(float(%s)/1000000)" + "divisor": 1000000 }, "OutputsStatus": {"bus": 42, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x8800}, "OutputsVoltage": @@ -250,7 +250,7 @@ class Description: "Min": threshold.PSU_OUTPUT_VOLTAGE_MIN, "Max": threshold.PSU_OUTPUT_VOLTAGE_MAX, "Unit": Unit.Voltage, - "format": "float(float(%s)/1000)" + "divisor": 1000 }, "OutputsCurrent": { @@ -258,7 +258,7 @@ class Description: "Min": threshold.PSU_OUTPUT_CURRENT_MIN, "Max": threshold.PSU_OUTPUT_CURRENT_MAX, "Unit": Unit.Current, - "format": "float(float(%s)/1000)" + "divisor": 1000 }, "OutputsPower": { @@ -266,7 +266,7 @@ class Description: "Min": threshold.PSU_OUTPUT_POWER_MIN, "Max": threshold.PSU_OUTPUT_POWER_MAX, "Unit": Unit.Power, - "format": "float(float(%s)/1000000)" + "divisor": 1000000 }, } ], @@ -282,7 +282,7 @@ class Description: "High": 70000, "Max": 80000, "Unit": Unit.Temperature, - "format": "float(float(%s)/1000)" + "divisor": 1000 } }, { @@ -296,7 +296,7 @@ class Description: "High": 100000, "Max": 104000, "Unit": Unit.Temperature, - "format": "float(float(%s)/1000)" + "divisor": 1000 } }, { @@ -310,7 +310,7 @@ class Description: "High": 40000, "Max": 50000, "Unit": Unit.Temperature, - "format": "float(float(%s)/1000)" + "divisor": 1000 } }, { @@ -324,7 +324,7 @@ class Description: "High": 70000, "Max": 80000, "Unit": Unit.Temperature, - "format": "float(float(%s)/1000)" + "divisor": 1000 } }, { @@ -338,7 +338,7 @@ class Description: "High": 100000, "Max": 105000, "Unit": Unit.Temperature, - "format": "float(float(%s)/1000)" + "divisor": 1000 } }, { @@ -350,7 +350,7 @@ class Description: "High": 80000, "Max": 100000, "Unit": Unit.Temperature, - "format": "float(float(%s)/1000)" + "divisor": 1000 } }, ], @@ -715,7 +715,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 5345, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "VDD3.3_CLK", @@ -728,7 +728,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 3560, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "VDD1.0V", @@ -741,7 +741,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 1049, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "VDD1.8V", @@ -754,7 +754,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 1903, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "MAC_BOARD_VDD3.3V", @@ -767,7 +767,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 3499, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "VDD1.2V", @@ -780,7 +780,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 1272, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "VDD_CORE", @@ -793,7 +793,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 950, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "ANALOG0.75V", @@ -806,7 +806,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 800, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "MAC_VDD1.2V", @@ -819,7 +819,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 1259, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "VDDO1.8V", @@ -832,7 +832,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 1937, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "MAC_ANA1.2V", @@ -845,7 +845,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 1276, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "MAC_ANA1.8V", @@ -858,7 +858,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 1910, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "QSFP56_VDD3.3V_A", @@ -871,7 +871,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 3595, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "QSFP56_VDD3.3V_B", @@ -884,7 +884,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 3601, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "QSFPDD_VDD3.3V_A", @@ -897,7 +897,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 3565, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "QSFPDD_VDD3.3V_B", @@ -910,7 +910,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 3564, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "VDD5.0V", @@ -923,7 +923,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 5429, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "SW_VDD1.2V", @@ -936,7 +936,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 1284, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "VDD2.5V", @@ -949,7 +949,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 2620, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "CONNECT_BOARD_VDD3.3V", @@ -962,7 +962,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 3437, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "VDD12V", @@ -975,7 +975,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 12700, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "VDD3.3_STBY", @@ -988,7 +988,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 3489, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "SSD_VDD3.3V", @@ -1001,7 +1001,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 3475, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "VCCIN", @@ -1014,7 +1014,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 1879, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "P1V05", @@ -1027,7 +1027,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 1103, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "P1V2_VDDQ", @@ -1040,7 +1040,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 1258, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "P2V5_VPP", @@ -1053,7 +1053,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 2342, - "format": "float(float(%s)/1000) * 1.124", + "divisor": 1000, "multiplier": 1.124, }, { "name": "P3V3_STBY", @@ -1066,7 +1066,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 3476, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "P5V_AUX_IN", @@ -1079,7 +1079,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 5229, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "P1V7_VCCSCFUSESUS_IN", @@ -1092,7 +1092,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 1789, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, ], "cpu": [ diff --git a/platform/broadcom/sonic-platform-modules-tencent/tcs9400/hal-config/x86_64_tencent_tcs9400_r0_0x407c_device.py b/platform/broadcom/sonic-platform-modules-tencent/tcs9400/hal-config/x86_64_tencent_tcs9400_r0_0x407c_device.py index d5467528e43..2bdebf76291 100755 --- a/platform/broadcom/sonic-platform-modules-tencent/tcs9400/hal-config/x86_64_tencent_tcs9400_r0_0x407c_device.py +++ b/platform/broadcom/sonic-platform-modules-tencent/tcs9400/hal-config/x86_64_tencent_tcs9400_r0_0x407c_device.py @@ -99,7 +99,7 @@ class Description: "Min": threshold.PSU_TEMP_MIN, "Max": threshold.PSU_TEMP_MAX, "Unit": Unit.Temperature, - "format": "float(float(%s)/1000)" + "divisor": 1000 }, "FanStatus": {"bus": 79, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0400}, "FanSpeed": { @@ -116,7 +116,7 @@ class Description: "Min": threshold.PSU_AC_INPUT_VOLTAGE_MIN, "Max": threshold.PSU_AC_INPUT_VOLTAGE_MAX, "Unit": Unit.Voltage, - "format": "float(float(%s)/1000)" + "divisor": 1000 }, 'DC': { @@ -124,14 +124,14 @@ class Description: "Min": threshold.PSU_DC_INPUT_VOLTAGE_MIN, "Max": threshold.PSU_DC_INPUT_VOLTAGE_MAX, "Unit": Unit.Voltage, - "format": "float(float(%s)/1000)" + "divisor": 1000 }, 'other': { "value": {"loc": "/sys/bus/i2c/devices/i2c-79/79-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, "Min": threshold.ERR_VALUE, "Max": threshold.ERR_VALUE, "Unit": Unit.Voltage, - "format": "float(float(%s)/1000)" + "divisor": 1000 } }, "InputsCurrent": @@ -140,7 +140,7 @@ class Description: "Min": threshold.PSU_INPUT_CURRENT_MIN, "Max": threshold.PSU_INPUT_CURRENT_MAX, "Unit": Unit.Current, - "format": "float(float(%s)/1000)" + "divisor": 1000 }, "InputsPower": { @@ -148,7 +148,7 @@ class Description: "Min": threshold.PSU_INPUT_POWER_MIN, "Max": threshold.PSU_INPUT_POWER_MAX, "Unit": Unit.Power, - "format": "float(float(%s)/1000000)" + "divisor": 1000000 }, "OutputsStatus": {"bus": 79, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x8800}, "OutputsVoltage": @@ -157,7 +157,7 @@ class Description: "Min": threshold.PSU_OUTPUT_VOLTAGE_MIN, "Max": threshold.PSU_OUTPUT_VOLTAGE_MAX, "Unit": Unit.Voltage, - "format": "float(float(%s)/1000)" + "divisor": 1000 }, "OutputsCurrent": { @@ -165,7 +165,7 @@ class Description: "Min": threshold.PSU_OUTPUT_CURRENT_MIN, "Max": threshold.PSU_OUTPUT_CURRENT_MAX, "Unit": Unit.Current, - "format": "float(float(%s)/1000)" + "divisor": 1000 }, "OutputsPower": { @@ -173,7 +173,7 @@ class Description: "Min": threshold.PSU_OUTPUT_POWER_MIN, "Max": threshold.PSU_OUTPUT_POWER_MAX, "Unit": Unit.Power, - "format": "float(float(%s)/1000000)" + "divisor": 1000000 }, }, { @@ -190,7 +190,7 @@ class Description: "Min": threshold.PSU_TEMP_MIN, "Max": threshold.PSU_TEMP_MAX, "Unit": Unit.Temperature, - "format": "float(float(%s)/1000)" + "divisor": 1000 }, "FanStatus": {"bus": 80, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0400}, "FanSpeed": { @@ -207,7 +207,7 @@ class Description: "Min": threshold.PSU_AC_INPUT_VOLTAGE_MIN, "Max": threshold.PSU_AC_INPUT_VOLTAGE_MAX, "Unit": Unit.Voltage, - "format": "float(float(%s)/1000)" + "divisor": 1000 }, 'DC': { @@ -215,14 +215,14 @@ class Description: "Min": threshold.PSU_DC_INPUT_VOLTAGE_MIN, "Max": threshold.PSU_DC_INPUT_VOLTAGE_MAX, "Unit": Unit.Voltage, - "format": "float(float(%s)/1000)" + "divisor": 1000 }, 'other': { "value": {"loc": "/sys/bus/i2c/devices/i2c-80/80-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, "Min": threshold.ERR_VALUE, "Max": threshold.ERR_VALUE, "Unit": Unit.Voltage, - "format": "float(float(%s)/1000)" + "divisor": 1000 } }, "InputsCurrent": @@ -231,7 +231,7 @@ class Description: "Min": threshold.PSU_INPUT_CURRENT_MIN, "Max": threshold.PSU_INPUT_CURRENT_MAX, "Unit": Unit.Current, - "format": "float(float(%s)/1000)" + "divisor": 1000 }, "InputsPower": { @@ -239,7 +239,7 @@ class Description: "Min": threshold.PSU_INPUT_POWER_MIN, "Max": threshold.PSU_INPUT_POWER_MAX, "Unit": Unit.Power, - "format": "float(float(%s)/1000000)" + "divisor": 1000000 }, "OutputsStatus": {"bus": 80, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x8800}, "OutputsVoltage": @@ -248,7 +248,7 @@ class Description: "Min": threshold.PSU_OUTPUT_VOLTAGE_MIN, "Max": threshold.PSU_OUTPUT_VOLTAGE_MAX, "Unit": Unit.Voltage, - "format": "float(float(%s)/1000)" + "divisor": 1000 }, "OutputsCurrent": { @@ -256,7 +256,7 @@ class Description: "Min": threshold.PSU_OUTPUT_CURRENT_MIN, "Max": threshold.PSU_OUTPUT_CURRENT_MAX, "Unit": Unit.Current, - "format": "float(float(%s)/1000)" + "divisor": 1000 }, "OutputsPower": { @@ -264,7 +264,7 @@ class Description: "Min": threshold.PSU_OUTPUT_POWER_MIN, "Max": threshold.PSU_OUTPUT_POWER_MAX, "Unit": Unit.Power, - "format": "float(float(%s)/1000000)" + "divisor": 1000000 }, }, { @@ -281,7 +281,7 @@ class Description: "Min": threshold.PSU_TEMP_MIN, "Max": threshold.PSU_TEMP_MAX, "Unit": Unit.Temperature, - "format": "float(float(%s)/1000)" + "divisor": 1000 }, "FanStatus": {"bus": 82, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0400}, "FanSpeed": { @@ -298,7 +298,7 @@ class Description: "Min": threshold.PSU_AC_INPUT_VOLTAGE_MIN, "Max": threshold.PSU_AC_INPUT_VOLTAGE_MAX, "Unit": Unit.Voltage, - "format": "float(float(%s)/1000)" + "divisor": 1000 }, 'DC': { @@ -306,14 +306,14 @@ class Description: "Min": threshold.PSU_DC_INPUT_VOLTAGE_MIN, "Max": threshold.PSU_DC_INPUT_VOLTAGE_MAX, "Unit": Unit.Voltage, - "format": "float(float(%s)/1000)" + "divisor": 1000 }, 'other': { "value": {"loc": "/sys/bus/i2c/devices/i2c-82/82-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, "Min": threshold.ERR_VALUE, "Max": threshold.ERR_VALUE, "Unit": Unit.Voltage, - "format": "float(float(%s)/1000)" + "divisor": 1000 } }, "InputsCurrent": @@ -322,7 +322,7 @@ class Description: "Min": threshold.PSU_INPUT_CURRENT_MIN, "Max": threshold.PSU_INPUT_CURRENT_MAX, "Unit": Unit.Current, - "format": "float(float(%s)/1000)" + "divisor": 1000 }, "InputsPower": { @@ -330,7 +330,7 @@ class Description: "Min": threshold.PSU_INPUT_POWER_MIN, "Max": threshold.PSU_INPUT_POWER_MAX, "Unit": Unit.Power, - "format": "float(float(%s)/1000000)" + "divisor": 1000000 }, "OutputsStatus": {"bus": 82, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x8800}, "OutputsVoltage": @@ -339,7 +339,7 @@ class Description: "Min": threshold.PSU_OUTPUT_VOLTAGE_MIN, "Max": threshold.PSU_OUTPUT_VOLTAGE_MAX, "Unit": Unit.Voltage, - "format": "float(float(%s)/1000)" + "divisor": 1000 }, "OutputsCurrent": { @@ -347,7 +347,7 @@ class Description: "Min": threshold.PSU_OUTPUT_CURRENT_MIN, "Max": threshold.PSU_OUTPUT_CURRENT_MAX, "Unit": Unit.Current, - "format": "float(float(%s)/1000)" + "divisor": 1000 }, "OutputsPower": { @@ -355,7 +355,7 @@ class Description: "Min": threshold.PSU_OUTPUT_POWER_MIN, "Max": threshold.PSU_OUTPUT_POWER_MAX, "Unit": Unit.Power, - "format": "float(float(%s)/1000000)" + "divisor": 1000000 }, }, { @@ -372,7 +372,7 @@ class Description: "Min": threshold.PSU_TEMP_MIN, "Max": threshold.PSU_TEMP_MAX, "Unit": Unit.Temperature, - "format": "float(float(%s)/1000)" + "divisor": 1000 }, "FanStatus": {"bus": 81, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0400}, "FanSpeed": { @@ -389,7 +389,7 @@ class Description: "Min": threshold.PSU_AC_INPUT_VOLTAGE_MIN, "Max": threshold.PSU_AC_INPUT_VOLTAGE_MAX, "Unit": Unit.Voltage, - "format": "float(float(%s)/1000)" + "divisor": 1000 }, 'DC': { @@ -397,14 +397,14 @@ class Description: "Min": threshold.PSU_DC_INPUT_VOLTAGE_MIN, "Max": threshold.PSU_DC_INPUT_VOLTAGE_MAX, "Unit": Unit.Voltage, - "format": "float(float(%s)/1000)" + "divisor": 1000 }, 'other': { "value": {"loc": "/sys/bus/i2c/devices/i2c-81/81-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, "Min": threshold.ERR_VALUE, "Max": threshold.ERR_VALUE, "Unit": Unit.Voltage, - "format": "float(float(%s)/1000)" + "divisor": 1000 } }, "InputsCurrent": @@ -413,7 +413,7 @@ class Description: "Min": threshold.PSU_INPUT_CURRENT_MIN, "Max": threshold.PSU_INPUT_CURRENT_MAX, "Unit": Unit.Current, - "format": "float(float(%s)/1000)" + "divisor": 1000 }, "InputsPower": { @@ -421,7 +421,7 @@ class Description: "Min": threshold.PSU_INPUT_POWER_MIN, "Max": threshold.PSU_INPUT_POWER_MAX, "Unit": Unit.Power, - "format": "float(float(%s)/1000000)" + "divisor": 1000000 }, "OutputsStatus": {"bus": 81, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x8800}, "OutputsVoltage": @@ -430,7 +430,7 @@ class Description: "Min": threshold.PSU_OUTPUT_VOLTAGE_MIN, "Max": threshold.PSU_OUTPUT_VOLTAGE_MAX, "Unit": Unit.Voltage, - "format": "float(float(%s)/1000)" + "divisor": 1000 }, "OutputsCurrent": { @@ -438,7 +438,7 @@ class Description: "Min": threshold.PSU_OUTPUT_CURRENT_MIN, "Max": threshold.PSU_OUTPUT_CURRENT_MAX, "Unit": Unit.Current, - "format": "float(float(%s)/1000)" + "divisor": 1000 }, "OutputsPower": { @@ -446,7 +446,7 @@ class Description: "Min": threshold.PSU_OUTPUT_POWER_MIN, "Max": threshold.PSU_OUTPUT_POWER_MAX, "Unit": Unit.Power, - "format": "float(float(%s)/1000000)" + "divisor": 1000000 }, }, ], @@ -462,7 +462,7 @@ class Description: "High": 100000, "Max": 102000, "Unit": Unit.Temperature, - "format": "float(float(%s)/1000)" + "divisor": 1000 } }, { @@ -476,7 +476,7 @@ class Description: "High": 40000, "Max": 50000, "Unit": Unit.Temperature, - "format": "float(float(%s)/1000)" + "divisor": 1000 } }, { @@ -490,7 +490,7 @@ class Description: "High": 70000, "Max": 75000, "Unit": Unit.Temperature, - "format": "float(float(%s)/1000)" + "divisor": 1000 } }, { @@ -504,7 +504,7 @@ class Description: "High": 100000, "Max": 105000, "Unit": Unit.Temperature, - "format": "float(float(%s)/1000)" + "divisor": 1000 } }, { @@ -516,7 +516,7 @@ class Description: "High": 80000, "Max": 100000, "Unit": Unit.Temperature, - "format": "float(float(%s)/1000)" + "divisor": 1000 } }, ], @@ -1008,7 +1008,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 809, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "MAC_VDD12V", @@ -1021,7 +1021,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 12600, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "MAC_VDD1.0V_FPGA", @@ -1034,7 +1034,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 1071, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "MAC_VDD1.8V_FPGA", @@ -1047,7 +1047,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 1890, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "MAC_VDD1.2V_FPGA", @@ -1060,7 +1060,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 1260, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "MAC_VDD3.3V", @@ -1073,7 +1073,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 3465, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "MAC_SW_VDD1.2V", @@ -1086,7 +1086,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 1260, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "MAC_VDD5V_CLK_MCU", @@ -1099,7 +1099,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 5334, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "MAC_VDD5V_VR", @@ -1112,7 +1112,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 5334, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "MAC_VDD3.3_CLK", @@ -1125,7 +1125,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 3486, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "MAC_VDDO1.8V", @@ -1138,7 +1138,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 1901, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "MAC_VDDO1.2V", @@ -1151,7 +1151,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 1260, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "MAC_VDD_CORE", @@ -1164,7 +1164,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 950, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "MAC_VDD_ANALOG", @@ -1177,7 +1177,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 809, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "MAC_VDD1.2V_MAC", @@ -1190,7 +1190,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 1260, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "MAC_AVDD1.8V", @@ -1203,7 +1203,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 1890, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "BASE_VDD12V", @@ -1216,7 +1216,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 12600, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "BASE_SW_VDD1.0V", @@ -1229,7 +1229,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 1050, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "BASE_VDD3.3V", @@ -1242,7 +1242,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 3444, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "BASE_SW_OVDD", @@ -1255,7 +1255,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 3444, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "BASE_SSD_VDD3.3V", @@ -1268,7 +1268,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 3465, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "CPU_VCCIN", @@ -1281,7 +1281,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 1950, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "CPU_P1V05", @@ -1294,7 +1294,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 1100, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "CPU_P1V2_VDDQ", @@ -1307,7 +1307,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 1260, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "CPU_P2V5_VPP", @@ -1320,7 +1320,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 2447, - "format": "float(float(%s)/1000) * 1.124", + "divisor": 1000, "multiplier": 1.124, }, { "name": "CPU_P3V3_STBY", @@ -1333,7 +1333,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 3465, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "CPU_P5V_AUX_IN", @@ -1346,7 +1346,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 5500, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "CPU_P1V7_VCCSCFUSESUS_IN", @@ -1359,7 +1359,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 1785, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "UPORT_VDD1.0V_FPGA", @@ -1372,7 +1372,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 1061, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "UPORT_VDD1.8V_FPGA", @@ -1385,7 +1385,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 1901, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "UPORT_VDD1.2V_FPGA", @@ -1398,7 +1398,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 1260, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "UPORT_VDD3.3V", @@ -1411,7 +1411,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 3600, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "UPORT_QSFP56_VDD3.3V_A", @@ -1424,7 +1424,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 3600, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "UPORT_QSFP56_VDD3.3V_B", @@ -1437,7 +1437,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 3600, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "UPORT_QSFP56_VDD3.3V_C", @@ -1450,7 +1450,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 3600, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "UPORT_QSFP56_VDD3.3V_D", @@ -1463,7 +1463,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 3600, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "UPORT_VDD3.3_MON", @@ -1476,7 +1476,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 3465, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "UPORT_VDD12V", @@ -1489,7 +1489,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 12600, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "DPORT_VDD1.0V_FPGA", @@ -1502,7 +1502,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 1061, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "DPORT_VDD1.8V_FPGA", @@ -1515,7 +1515,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 1901, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "DPORT_VDD1.2V_FPGA", @@ -1528,7 +1528,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 1260, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "DPORT_VDD3.3V", @@ -1541,7 +1541,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 3600, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "DPORT_QSFP56_VDD3.3V_A", @@ -1554,7 +1554,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 3600, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "DPORT_QSFP56_VDD3.3V_B", @@ -1567,7 +1567,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 3600, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "DPORT_QSFP56_VDD3.3V_C", @@ -1580,7 +1580,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 3600, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "DPORT_QSFP56_VDD3.3V_D", @@ -1593,7 +1593,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 3600, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "DPORT_VDD3.3_MON", @@ -1606,7 +1606,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 3465, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "DPORT_VDD12V", @@ -1619,7 +1619,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 12600, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "MAC_QSFPDD_VDD3.3V_A", @@ -1632,7 +1632,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 3.600, - "format": "%s", + "divisor": 1, }, { "name": "MAC_QSFPDD_VDD3.3V_B", @@ -1645,7 +1645,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 3.600, - "format": "%s", + "divisor": 1, }, { "name": "MAC_QSFPDD_VDD3.3V_C", @@ -1658,7 +1658,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 3.600, - "format": "%s", + "divisor": 1, }, { "name": "MAC_QSFPDD_VDD3.3V_D", @@ -1671,7 +1671,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 3.600, - "format": "%s", + "divisor": 1, }, { "name": "MAC_QSFPDD_VDD3.3V_E", @@ -1684,7 +1684,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 3.600, - "format": "%s", + "divisor": 1, }, { "name": "MAC_QSFPDD_VDD3.3V_F", @@ -1697,7 +1697,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 3.600, - "format": "%s", + "divisor": 1, }, { "name": "MAC_QSFPDD_VDD3.3V_G", @@ -1710,7 +1710,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 3.600, - "format": "%s", + "divisor": 1, }, { "name": "MAC_QSFPDD_VDD3.3V_H", @@ -1723,7 +1723,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 3.600, - "format": "%s", + "divisor": 1, }, ], "cpu": [ diff --git a/platform/broadcom/sonic-platform-modules-tencent/tcs9400/hal-config/x86_64_tencent_tcs9400_r0_device.py b/platform/broadcom/sonic-platform-modules-tencent/tcs9400/hal-config/x86_64_tencent_tcs9400_r0_device.py index 182d7e3ddef..f1c889d3dc1 100755 --- a/platform/broadcom/sonic-platform-modules-tencent/tcs9400/hal-config/x86_64_tencent_tcs9400_r0_device.py +++ b/platform/broadcom/sonic-platform-modules-tencent/tcs9400/hal-config/x86_64_tencent_tcs9400_r0_device.py @@ -99,7 +99,7 @@ class Description: "Min": threshold.PSU_TEMP_MIN, "Max": threshold.PSU_TEMP_MAX, "Unit": Unit.Temperature, - "format": "float(float(%s)/1000)" + "divisor": 1000 }, "FanStatus": {"bus": 79, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0400}, "FanSpeed": { @@ -116,7 +116,7 @@ class Description: "Min": threshold.PSU_AC_INPUT_VOLTAGE_MIN, "Max": threshold.PSU_AC_INPUT_VOLTAGE_MAX, "Unit": Unit.Voltage, - "format": "float(float(%s)/1000)" + "divisor": 1000 }, 'DC': { @@ -124,14 +124,14 @@ class Description: "Min": threshold.PSU_DC_INPUT_VOLTAGE_MIN, "Max": threshold.PSU_DC_INPUT_VOLTAGE_MAX, "Unit": Unit.Voltage, - "format": "float(float(%s)/1000)" + "divisor": 1000 }, 'other': { "value": {"loc": "/sys/bus/i2c/devices/i2c-79/79-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, "Min": threshold.ERR_VALUE, "Max": threshold.ERR_VALUE, "Unit": Unit.Voltage, - "format": "float(float(%s)/1000)" + "divisor": 1000 } }, "InputsCurrent": @@ -140,7 +140,7 @@ class Description: "Min": threshold.PSU_INPUT_CURRENT_MIN, "Max": threshold.PSU_INPUT_CURRENT_MAX, "Unit": Unit.Current, - "format": "float(float(%s)/1000)" + "divisor": 1000 }, "InputsPower": { @@ -148,7 +148,7 @@ class Description: "Min": threshold.PSU_INPUT_POWER_MIN, "Max": threshold.PSU_INPUT_POWER_MAX, "Unit": Unit.Power, - "format": "float(float(%s)/1000000)" + "divisor": 1000000 }, "OutputsStatus": {"bus": 79, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x8800}, "OutputsVoltage": @@ -157,7 +157,7 @@ class Description: "Min": threshold.PSU_OUTPUT_VOLTAGE_MIN, "Max": threshold.PSU_OUTPUT_VOLTAGE_MAX, "Unit": Unit.Voltage, - "format": "float(float(%s)/1000)" + "divisor": 1000 }, "OutputsCurrent": { @@ -165,7 +165,7 @@ class Description: "Min": threshold.PSU_OUTPUT_CURRENT_MIN, "Max": threshold.PSU_OUTPUT_CURRENT_MAX, "Unit": Unit.Current, - "format": "float(float(%s)/1000)" + "divisor": 1000 }, "OutputsPower": { @@ -173,7 +173,7 @@ class Description: "Min": threshold.PSU_OUTPUT_POWER_MIN, "Max": threshold.PSU_OUTPUT_POWER_MAX, "Unit": Unit.Power, - "format": "float(float(%s)/1000000)" + "divisor": 1000000 }, }, { @@ -190,7 +190,7 @@ class Description: "Min": threshold.PSU_TEMP_MIN, "Max": threshold.PSU_TEMP_MAX, "Unit": Unit.Temperature, - "format": "float(float(%s)/1000)" + "divisor": 1000 }, "FanStatus": {"bus": 80, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0400}, "FanSpeed": { @@ -207,7 +207,7 @@ class Description: "Min": threshold.PSU_AC_INPUT_VOLTAGE_MIN, "Max": threshold.PSU_AC_INPUT_VOLTAGE_MAX, "Unit": Unit.Voltage, - "format": "float(float(%s)/1000)" + "divisor": 1000 }, 'DC': { @@ -215,14 +215,14 @@ class Description: "Min": threshold.PSU_DC_INPUT_VOLTAGE_MIN, "Max": threshold.PSU_DC_INPUT_VOLTAGE_MAX, "Unit": Unit.Voltage, - "format": "float(float(%s)/1000)" + "divisor": 1000 }, 'other': { "value": {"loc": "/sys/bus/i2c/devices/i2c-80/80-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, "Min": threshold.ERR_VALUE, "Max": threshold.ERR_VALUE, "Unit": Unit.Voltage, - "format": "float(float(%s)/1000)" + "divisor": 1000 } }, "InputsCurrent": @@ -231,7 +231,7 @@ class Description: "Min": threshold.PSU_INPUT_CURRENT_MIN, "Max": threshold.PSU_INPUT_CURRENT_MAX, "Unit": Unit.Current, - "format": "float(float(%s)/1000)" + "divisor": 1000 }, "InputsPower": { @@ -239,7 +239,7 @@ class Description: "Min": threshold.PSU_INPUT_POWER_MIN, "Max": threshold.PSU_INPUT_POWER_MAX, "Unit": Unit.Power, - "format": "float(float(%s)/1000000)" + "divisor": 1000000 }, "OutputsStatus": {"bus": 80, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x8800}, "OutputsVoltage": @@ -248,7 +248,7 @@ class Description: "Min": threshold.PSU_OUTPUT_VOLTAGE_MIN, "Max": threshold.PSU_OUTPUT_VOLTAGE_MAX, "Unit": Unit.Voltage, - "format": "float(float(%s)/1000)" + "divisor": 1000 }, "OutputsCurrent": { @@ -256,7 +256,7 @@ class Description: "Min": threshold.PSU_OUTPUT_CURRENT_MIN, "Max": threshold.PSU_OUTPUT_CURRENT_MAX, "Unit": Unit.Current, - "format": "float(float(%s)/1000)" + "divisor": 1000 }, "OutputsPower": { @@ -264,7 +264,7 @@ class Description: "Min": threshold.PSU_OUTPUT_POWER_MIN, "Max": threshold.PSU_OUTPUT_POWER_MAX, "Unit": Unit.Power, - "format": "float(float(%s)/1000000)" + "divisor": 1000000 }, }, { @@ -281,7 +281,7 @@ class Description: "Min": threshold.PSU_TEMP_MIN, "Max": threshold.PSU_TEMP_MAX, "Unit": Unit.Temperature, - "format": "float(float(%s)/1000)" + "divisor": 1000 }, "FanStatus": {"bus": 82, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0400}, "FanSpeed": { @@ -298,7 +298,7 @@ class Description: "Min": threshold.PSU_AC_INPUT_VOLTAGE_MIN, "Max": threshold.PSU_AC_INPUT_VOLTAGE_MAX, "Unit": Unit.Voltage, - "format": "float(float(%s)/1000)" + "divisor": 1000 }, 'DC': { @@ -306,14 +306,14 @@ class Description: "Min": threshold.PSU_DC_INPUT_VOLTAGE_MIN, "Max": threshold.PSU_DC_INPUT_VOLTAGE_MAX, "Unit": Unit.Voltage, - "format": "float(float(%s)/1000)" + "divisor": 1000 }, 'other': { "value": {"loc": "/sys/bus/i2c/devices/i2c-82/82-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, "Min": threshold.ERR_VALUE, "Max": threshold.ERR_VALUE, "Unit": Unit.Voltage, - "format": "float(float(%s)/1000)" + "divisor": 1000 } }, "InputsCurrent": @@ -322,7 +322,7 @@ class Description: "Min": threshold.PSU_INPUT_CURRENT_MIN, "Max": threshold.PSU_INPUT_CURRENT_MAX, "Unit": Unit.Current, - "format": "float(float(%s)/1000)" + "divisor": 1000 }, "InputsPower": { @@ -330,7 +330,7 @@ class Description: "Min": threshold.PSU_INPUT_POWER_MIN, "Max": threshold.PSU_INPUT_POWER_MAX, "Unit": Unit.Power, - "format": "float(float(%s)/1000000)" + "divisor": 1000000 }, "OutputsStatus": {"bus": 82, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x8800}, "OutputsVoltage": @@ -339,7 +339,7 @@ class Description: "Min": threshold.PSU_OUTPUT_VOLTAGE_MIN, "Max": threshold.PSU_OUTPUT_VOLTAGE_MAX, "Unit": Unit.Voltage, - "format": "float(float(%s)/1000)" + "divisor": 1000 }, "OutputsCurrent": { @@ -347,7 +347,7 @@ class Description: "Min": threshold.PSU_OUTPUT_CURRENT_MIN, "Max": threshold.PSU_OUTPUT_CURRENT_MAX, "Unit": Unit.Current, - "format": "float(float(%s)/1000)" + "divisor": 1000 }, "OutputsPower": { @@ -355,7 +355,7 @@ class Description: "Min": threshold.PSU_OUTPUT_POWER_MIN, "Max": threshold.PSU_OUTPUT_POWER_MAX, "Unit": Unit.Power, - "format": "float(float(%s)/1000000)" + "divisor": 1000000 }, }, { @@ -372,7 +372,7 @@ class Description: "Min": threshold.PSU_TEMP_MIN, "Max": threshold.PSU_TEMP_MAX, "Unit": Unit.Temperature, - "format": "float(float(%s)/1000)" + "divisor": 1000 }, "FanStatus": {"bus": 81, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0400}, "FanSpeed": { @@ -389,7 +389,7 @@ class Description: "Min": threshold.PSU_AC_INPUT_VOLTAGE_MIN, "Max": threshold.PSU_AC_INPUT_VOLTAGE_MAX, "Unit": Unit.Voltage, - "format": "float(float(%s)/1000)" + "divisor": 1000 }, 'DC': { @@ -397,14 +397,14 @@ class Description: "Min": threshold.PSU_DC_INPUT_VOLTAGE_MIN, "Max": threshold.PSU_DC_INPUT_VOLTAGE_MAX, "Unit": Unit.Voltage, - "format": "float(float(%s)/1000)" + "divisor": 1000 }, 'other': { "value": {"loc": "/sys/bus/i2c/devices/i2c-81/81-0058/hwmon/hwmon*/in1_input", "way": "sysfs"}, "Min": threshold.ERR_VALUE, "Max": threshold.ERR_VALUE, "Unit": Unit.Voltage, - "format": "float(float(%s)/1000)" + "divisor": 1000 } }, "InputsCurrent": @@ -413,7 +413,7 @@ class Description: "Min": threshold.PSU_INPUT_CURRENT_MIN, "Max": threshold.PSU_INPUT_CURRENT_MAX, "Unit": Unit.Current, - "format": "float(float(%s)/1000)" + "divisor": 1000 }, "InputsPower": { @@ -421,7 +421,7 @@ class Description: "Min": threshold.PSU_INPUT_POWER_MIN, "Max": threshold.PSU_INPUT_POWER_MAX, "Unit": Unit.Power, - "format": "float(float(%s)/1000000)" + "divisor": 1000000 }, "OutputsStatus": {"bus": 81, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x8800}, "OutputsVoltage": @@ -430,7 +430,7 @@ class Description: "Min": threshold.PSU_OUTPUT_VOLTAGE_MIN, "Max": threshold.PSU_OUTPUT_VOLTAGE_MAX, "Unit": Unit.Voltage, - "format": "float(float(%s)/1000)" + "divisor": 1000 }, "OutputsCurrent": { @@ -438,7 +438,7 @@ class Description: "Min": threshold.PSU_OUTPUT_CURRENT_MIN, "Max": threshold.PSU_OUTPUT_CURRENT_MAX, "Unit": Unit.Current, - "format": "float(float(%s)/1000)" + "divisor": 1000 }, "OutputsPower": { @@ -446,7 +446,7 @@ class Description: "Min": threshold.PSU_OUTPUT_POWER_MIN, "Max": threshold.PSU_OUTPUT_POWER_MAX, "Unit": Unit.Power, - "format": "float(float(%s)/1000000)" + "divisor": 1000000 }, }, ], @@ -462,7 +462,7 @@ class Description: "High": 100000, "Max": 102000, "Unit": Unit.Temperature, - "format": "float(float(%s)/1000)" + "divisor": 1000 } }, { @@ -476,7 +476,7 @@ class Description: "High": 40000, "Max": 50000, "Unit": Unit.Temperature, - "format": "float(float(%s)/1000)" + "divisor": 1000 } }, { @@ -490,7 +490,7 @@ class Description: "High": 70000, "Max": 75000, "Unit": Unit.Temperature, - "format": "float(float(%s)/1000)" + "divisor": 1000 } }, { @@ -504,7 +504,7 @@ class Description: "High": 100000, "Max": 105000, "Unit": Unit.Temperature, - "format": "float(float(%s)/1000)" + "divisor": 1000 } }, { @@ -516,7 +516,7 @@ class Description: "High": 80000, "Max": 100000, "Unit": Unit.Temperature, - "format": "float(float(%s)/1000)" + "divisor": 1000 } }, ], @@ -1008,7 +1008,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 809, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "MAC_VDD12V", @@ -1021,7 +1021,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 12600, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "MAC_VDD1.0V_FPGA", @@ -1034,7 +1034,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 1071, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "MAC_VDD1.8V_FPGA", @@ -1047,7 +1047,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 1890, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "MAC_VDD1.2V_FPGA", @@ -1060,7 +1060,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 1260, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "MAC_VDD3.3V", @@ -1073,7 +1073,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 3465, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "MAC_SW_VDD1.2V", @@ -1086,7 +1086,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 1260, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "MAC_VDD5V_CLK_MCU", @@ -1099,7 +1099,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 5334, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "MAC_VDD5V_VR", @@ -1112,7 +1112,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 5334, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "MAC_VDD3.3_CLK", @@ -1125,7 +1125,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 3486, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "MAC_VDDO1.8V", @@ -1138,7 +1138,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 1901, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "MAC_VDDO1.2V", @@ -1151,7 +1151,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 1260, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "MAC_VDD_CORE", @@ -1164,7 +1164,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 950, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "MAC_VDD_ANALOG", @@ -1177,7 +1177,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 809, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "MAC_VDD1.2V_MAC", @@ -1190,7 +1190,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 1260, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "MAC_AVDD1.8V", @@ -1203,7 +1203,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 1890, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "BASE_VDD12V", @@ -1216,7 +1216,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 12600, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "BASE_SW_VDD1.2V", @@ -1229,7 +1229,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 1260, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "BASE_VDD2.5V", @@ -1242,7 +1242,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 2615, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "BASE_VDD3.3V", @@ -1255,7 +1255,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 3444, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "BASE_SSD_VDD3.3V", @@ -1268,7 +1268,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 3465, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "CPU_VCCIN", @@ -1281,7 +1281,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 1950, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "CPU_P1V05", @@ -1294,7 +1294,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 1100, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "CPU_P1V2_VDDQ", @@ -1307,7 +1307,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 1260, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "CPU_P2V5_VPP", @@ -1320,7 +1320,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 2447, - "format": "float(float(%s)/1000) * 1.124", + "divisor": 1000, "multiplier": 1.124, }, { "name": "CPU_P3V3_STBY", @@ -1333,7 +1333,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 3465, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "CPU_P5V_AUX_IN", @@ -1346,7 +1346,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 5500, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "CPU_P1V7_VCCSCFUSESUS_IN", @@ -1359,7 +1359,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 1785, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "UPORT_VDD1.0V_FPGA", @@ -1372,7 +1372,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 1061, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "UPORT_VDD1.8V_FPGA", @@ -1385,7 +1385,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 1901, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "UPORT_VDD1.2V_FPGA", @@ -1398,7 +1398,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 1260, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "UPORT_VDD3.3V", @@ -1411,7 +1411,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 3600, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "UPORT_QSFP56_VDD3.3V_A", @@ -1424,7 +1424,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 3600, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "UPORT_QSFP56_VDD3.3V_B", @@ -1437,7 +1437,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 3600, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "UPORT_QSFP56_VDD3.3V_C", @@ -1450,7 +1450,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 3600, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "UPORT_QSFP56_VDD3.3V_D", @@ -1463,7 +1463,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 3600, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "UPORT_VDD3.3_MON", @@ -1476,7 +1476,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 3465, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "UPORT_VDD12V", @@ -1489,7 +1489,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 12600, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "DPORT_VDD1.0V_FPGA", @@ -1502,7 +1502,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 1061, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "DPORT_VDD1.8V_FPGA", @@ -1515,7 +1515,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 1901, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "DPORT_VDD1.2V_FPGA", @@ -1528,7 +1528,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 1260, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "DPORT_VDD3.3V", @@ -1541,7 +1541,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 3600, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "DPORT_QSFP56_VDD3.3V_A", @@ -1554,7 +1554,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 3600, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "DPORT_QSFP56_VDD3.3V_B", @@ -1567,7 +1567,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 3600, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "DPORT_QSFP56_VDD3.3V_C", @@ -1580,7 +1580,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 3600, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "DPORT_QSFP56_VDD3.3V_D", @@ -1593,7 +1593,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 3600, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "DPORT_VDD3.3_MON", @@ -1606,7 +1606,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 3465, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "DPORT_VDD12V", @@ -1619,7 +1619,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 12600, - "format": "float(float(%s)/1000)", + "divisor": 1000, }, { "name": "MAC_QSFPDD_VDD3.3V_A", @@ -1632,7 +1632,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 3.600, - "format": "%s", + "divisor": 1, }, { "name": "MAC_QSFPDD_VDD3.3V_B", @@ -1645,7 +1645,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 3.600, - "format": "%s", + "divisor": 1, }, { "name": "MAC_QSFPDD_VDD3.3V_C", @@ -1658,7 +1658,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 3.600, - "format": "%s", + "divisor": 1, }, { "name": "MAC_QSFPDD_VDD3.3V_D", @@ -1671,7 +1671,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 3.600, - "format": "%s", + "divisor": 1, }, { "name": "MAC_QSFPDD_VDD3.3V_E", @@ -1684,7 +1684,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 3.600, - "format": "%s", + "divisor": 1, }, { "name": "MAC_QSFPDD_VDD3.3V_F", @@ -1697,7 +1697,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 3.600, - "format": "%s", + "divisor": 1, }, { "name": "MAC_QSFPDD_VDD3.3V_G", @@ -1710,7 +1710,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 3.600, - "format": "%s", + "divisor": 1, }, { "name": "MAC_QSFPDD_VDD3.3V_H", @@ -1723,7 +1723,7 @@ class Description: "read_times": 11, "Unit": "V", "Max": 3.600, - "format": "%s", + "divisor": 1, }, ], "cpu": [ diff --git a/platform/centec-arm64/docker-saiserver-centec.mk b/platform/centec-arm64/docker-saiserver-centec.mk index 929e4e7ad6e..8f8e781f24f 100755 --- a/platform/centec-arm64/docker-saiserver-centec.mk +++ b/platform/centec-arm64/docker-saiserver-centec.mk @@ -11,6 +11,5 @@ $(DOCKER_SAISERVER_CENTEC)_RUN_OPT += --privileged -t $(DOCKER_SAISERVER_CENTEC)_RUN_OPT += -v /host/machine.conf:/etc/machine.conf $(DOCKER_SAISERVER_CENTEC)_RUN_OPT += -v /var/run/docker-saiserver:/var/run/sswsyncd $(DOCKER_SAISERVER_CENTEC)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro -$(DOCKER_SAISERVER_CENTEC)_RUN_OPT += -v /host/warmboot:/var/warmboot SONIC_BULLSEYE_DOCKERS += $(DOCKER_SAISERVER_CENTEC) diff --git a/platform/centec-arm64/docker-syncd-centec.mk b/platform/centec-arm64/docker-syncd-centec.mk index e435708d622..29747efbb89 100755 --- a/platform/centec-arm64/docker-syncd-centec.mk +++ b/platform/centec-arm64/docker-syncd-centec.mk @@ -12,7 +12,6 @@ $(DOCKER_SYNCD_BASE)_DBG_DEPENDS += $(SYNCD_DBG) \ $(DOCKER_SYNCD_BASE)_VERSION = 1.0.0 $(DOCKER_SYNCD_BASE)_PACKAGE_NAME = syncd -$(DOCKER_SYNCD_BASE)_RUN_OPT += -v /host/warmboot:/var/warmboot $(DOCKER_SYNCD_CENTEC)_RUN_OPT += --privileged -t $(DOCKER_SYNCD_CENTEC)_RUN_OPT += -v /host/machine.conf:/etc/machine.conf $(DOCKER_SYNCD_CENTEC)_RUN_OPT += -v /var/run/docker-syncd:/var/run/sswsyncd diff --git a/platform/centec-arm64/docker-syncd-centec/supervisord.conf b/platform/centec-arm64/docker-syncd-centec/supervisord.conf index 95ba2a89e75..2a88936f881 100755 --- a/platform/centec-arm64/docker-syncd-centec/supervisord.conf +++ b/platform/centec-arm64/docker-syncd-centec/supervisord.conf @@ -14,7 +14,7 @@ buffer_size=1024 [eventlistener:supervisor-proc-exit-listener] command=/usr/bin/supervisor-proc-exit-listener-rs --container-name syncd -events=PROCESS_STATE_EXITED,PROCESS_STATE_RUNNING +events=PROCESS_STATE_EXITED,PROCESS_STATE_RUNNING,PROCESS_STATE_FATAL autostart=true autorestart=unexpected buffer_size=1024 diff --git a/platform/centec/docker-saiserver-centec.mk b/platform/centec/docker-saiserver-centec.mk index 929e4e7ad6e..8f8e781f24f 100755 --- a/platform/centec/docker-saiserver-centec.mk +++ b/platform/centec/docker-saiserver-centec.mk @@ -11,6 +11,5 @@ $(DOCKER_SAISERVER_CENTEC)_RUN_OPT += --privileged -t $(DOCKER_SAISERVER_CENTEC)_RUN_OPT += -v /host/machine.conf:/etc/machine.conf $(DOCKER_SAISERVER_CENTEC)_RUN_OPT += -v /var/run/docker-saiserver:/var/run/sswsyncd $(DOCKER_SAISERVER_CENTEC)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro -$(DOCKER_SAISERVER_CENTEC)_RUN_OPT += -v /host/warmboot:/var/warmboot SONIC_BULLSEYE_DOCKERS += $(DOCKER_SAISERVER_CENTEC) diff --git a/platform/centec/docker-syncd-centec/supervisord.conf b/platform/centec/docker-syncd-centec/supervisord.conf index cd44d616229..eeed0d3f607 100644 --- a/platform/centec/docker-syncd-centec/supervisord.conf +++ b/platform/centec/docker-syncd-centec/supervisord.conf @@ -14,7 +14,7 @@ buffer_size=1024 [eventlistener:supervisor-proc-exit-listener] command=/usr/bin/supervisor-proc-exit-listener-rs --container-name syncd -events=PROCESS_STATE_EXITED,PROCESS_STATE_RUNNING +events=PROCESS_STATE_EXITED,PROCESS_STATE_RUNNING,PROCESS_STATE_FATAL autostart=true autorestart=unexpected buffer_size=1024 diff --git a/platform/checkout/cisco-8000.ini b/platform/checkout/cisco-8000.ini index bf8399ad8f2..0db758ebc76 100644 --- a/platform/checkout/cisco-8000.ini +++ b/platform/checkout/cisco-8000.ini @@ -1,3 +1,3 @@ [module] repo=git@github.com:Cisco-8000-sonic/platform-cisco-8000.git -ref=202511.1.0.3 +ref=202511.1.0.8 diff --git a/platform/checkout/pensando.ini b/platform/checkout/pensando.ini index eea4792edc4..21c85dfed41 100644 --- a/platform/checkout/pensando.ini +++ b/platform/checkout/pensando.ini @@ -1,4 +1,4 @@ [module] repo=git@github.com:pensando/pensando-sonic-artifacts.git -ref=1.95.0-SS-17-release +ref=1.95.0-SS-20-release path=platform/pensando/pensando-sonic-artifacts diff --git a/platform/clounix/docker-saiserver-clounix.mk b/platform/clounix/docker-saiserver-clounix.mk index beb4a48a020..8a712b25483 100644 --- a/platform/clounix/docker-saiserver-clounix.mk +++ b/platform/clounix/docker-saiserver-clounix.mk @@ -19,4 +19,3 @@ $(DOCKER_SAISERVER_CLOUNIX)_RUN_OPT += --net=host --privileged -t $(DOCKER_SAISERVER_CLOUNIX)_RUN_OPT += -v /host/machine.conf:/etc/machine.conf $(DOCKER_SAISERVER_CLOUNIX)_RUN_OPT += -v /var/run/docker-saiserver:/var/run/sswsyncd $(DOCKER_SAISERVER_CLOUNIX)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro -$(DOCKER_SAISERVER_CLOUNIX)_RUN_OPT += -v /host/warmboot:/var/warmboot diff --git a/platform/clounix/docker-syncd-clounix-rpc.mk b/platform/clounix/docker-syncd-clounix-rpc.mk index 2e1ef4b2dc1..dcb66fb91fd 100644 --- a/platform/clounix/docker-syncd-clounix-rpc.mk +++ b/platform/clounix/docker-syncd-clounix-rpc.mk @@ -22,6 +22,5 @@ $(DOCKER_SYNCD_CLOUNIX_RPC)_BASE_IMAGE_FILES += clx_icling:/usr/bin/clx_icling $(DOCKER_SYNCD_CLOUNIX_RPC)_RUN_OPT += --net=host --privileged -t $(DOCKER_SYNCD_CLOUNIX_RPC)_RUN_OPT += -v /host/machine.conf:/etc/machine.conf -$(DOCKER_SYNCD_CLOUNIX_RPC)_RUN_OPT += -v /host/warmboot:/var/warmboot $(DOCKER_SYNCD_CLOUNIX_RPC)_RUN_OPT += -v /var/run/docker-syncd:/var/run/sswsyncd $(DOCKER_SYNCD_CLOUNIX_RPC)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro diff --git a/platform/clounix/docker-syncd-clounix.mk b/platform/clounix/docker-syncd-clounix.mk index 0c2e249567f..70572e701a5 100644 --- a/platform/clounix/docker-syncd-clounix.mk +++ b/platform/clounix/docker-syncd-clounix.mk @@ -11,7 +11,6 @@ $(DOCKER_SYNCD_BASE)_DBG_DEPENDS += $(SYNCD_DBG) \ $(LIBSAIMETADATA_DBG) \ $(LIBSAIREDIS_DBG) -$(DOCKER_SYNCD_BASE)_RUN_OPT += -v /host/warmboot:/var/warmboot $(DOCKER_SYNCD_BASE)_RUN_OPT += -v /var/run/docker-syncd:/var/run/sswsyncd $(DOCKER_SYNCD_BASE)_BASE_IMAGE_FILES += clx_diag:/usr/bin/clx_diag diff --git a/platform/clounix/docker-syncd-clounix/supervisord.conf b/platform/clounix/docker-syncd-clounix/supervisord.conf index 00fcc86ee4d..eccef45ae37 100644 --- a/platform/clounix/docker-syncd-clounix/supervisord.conf +++ b/platform/clounix/docker-syncd-clounix/supervisord.conf @@ -14,7 +14,7 @@ buffer_size=25 [eventlistener:supervisor-proc-exit-listener] command=/usr/bin/supervisor-proc-exit-listener-rs --container-name syncd -events=PROCESS_STATE_EXITED,PROCESS_STATE_RUNNING +events=PROCESS_STATE_EXITED,PROCESS_STATE_RUNNING,PROCESS_STATE_FATAL autostart=true autorestart=unexpected buffer_size=1024 diff --git a/platform/clounix/rules.mk b/platform/clounix/rules.mk index 9d0ad4ebc6d..0f780716354 100644 --- a/platform/clounix/rules.mk +++ b/platform/clounix/rules.mk @@ -8,7 +8,7 @@ include $(PLATFORM_PATH)/docker-ptf-clounix.mk include $(PLATFORM_PATH)/docker-saiserver-clounix.mk DSSERVE = dsserve -$(DSSERVE)_URL = "https://packages.trafficmanager.net/public/20190307/dsserve" +$(DSSERVE)_URL = "$(BUILD_PUBLIC_URL)/20190307/dsserve" SONIC_ONLINE_FILES += $(DSSERVE) SONIC_ALL += $(SONIC_ONE_IMAGE) $(DOCKER_FPM) diff --git a/platform/components/docker-gbsyncd-agera2.mk b/platform/components/docker-gbsyncd-agera2.mk index 5e1651bd11f..4a0a368654f 100644 --- a/platform/components/docker-gbsyncd-agera2.mk +++ b/platform/components/docker-gbsyncd-agera2.mk @@ -1,8 +1,8 @@ # Agera2 PAI Library Package - URL-based download similar to broncos -LIBSAI_AGERA2_VERSION = 3.14.0-2 +LIBSAI_AGERA2_VERSION = 3.14.0-4 LIBSAI_AGERA2_BRANCH_NAME = REL_3.14 -LIBSAI_AGERA2_URL_PREFIX = "https://packages.trafficmanager.net/public/sai/bcmpai/$(LIBSAI_AGERA2_BRANCH_NAME)/$(LIBSAI_AGERA2_VERSION)" +LIBSAI_AGERA2_URL_PREFIX = "$(BUILD_PUBLIC_URL)/sai/bcmpai/$(LIBSAI_AGERA2_BRANCH_NAME)/$(LIBSAI_AGERA2_VERSION)" # Runtime package` LIBSAI_AGERA2 = libsaiagera2_$(LIBSAI_AGERA2_VERSION)_amd64.deb @@ -16,22 +16,24 @@ DOCKER_GBSYNCD_AGERA2_DBG = $(DOCKER_GBSYNCD_AGERA2_STEM)-$(DBG_IMAGE_MARK).gz $(DOCKER_GBSYNCD_AGERA2)_FILES += $(DSSERVE) -$(DOCKER_GBSYNCD_AGERA2)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_BOOKWORM) +$(DOCKER_GBSYNCD_AGERA2)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_TRIXIE) -$(DOCKER_GBSYNCD_AGERA2)_DBG_DEPENDS += $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_DEPENDS) +$(DOCKER_GBSYNCD_AGERA2)_DBG_DEPENDS += $($(DOCKER_CONFIG_ENGINE_TRIXIE)_DBG_DEPENDS) -$(DOCKER_GBSYNCD_AGERA2)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_IMAGE_PACKAGES) +$(DOCKER_GBSYNCD_AGERA2)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_TRIXIE)_DBG_IMAGE_PACKAGES) SONIC_DOCKER_IMAGES += $(DOCKER_GBSYNCD_AGERA2) -SONIC_BOOKWORM_DOCKERS += $(DOCKER_GBSYNCD_AGERA2) +SONIC_TRIXIE_DOCKERS += $(DOCKER_GBSYNCD_AGERA2) SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_GBSYNCD_AGERA2) SONIC_DOCKER_DBG_IMAGES += $(DOCKER_GBSYNCD_AGERA2_DBG) -SONIC_BOOKWORM_DBG_DOCKERS += $(DOCKER_GBSYNCD_AGERA2_DBG) +SONIC_TRIXIE_DBG_DOCKERS += $(DOCKER_GBSYNCD_AGERA2_DBG) SONIC_INSTALL_DOCKER_DBG_IMAGES += $(DOCKER_GBSYNCD_AGERA2_DBG) $(DOCKER_GBSYNCD_AGERA2)_CONTAINER_NAME = gbsyncd -$(DOCKER_GBSYNCD_AGERA2)_RUN_OPT += --privileged -t +$(DOCKER_GBSYNCD_AGERA2)_RUN_OPT += --cap-add=SYS_RAWIO --cap-add=SYS_ADMIN --cap-add=NET_ADMIN -t --security-opt apparmor=unconfined --security-opt="systempaths=unconfined" +$(DOCKER_GBSYNCD_AGERA2)_RUN_OPT += -v /sys/class/mdio_bus:/sys/class/mdio_bus +$(DOCKER_GBSYNCD_AGERA2)_RUN_OPT += -v /sys/devices:/sys/devices $(DOCKER_GBSYNCD_AGERA2)_RUN_OPT += -v /host/machine.conf:/etc/machine.conf $(DOCKER_GBSYNCD_AGERA2)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro $(DOCKER_GBSYNCD_AGERA2)_RUN_OPT += -v /host/warmboot:/var/warmboot @@ -42,6 +44,6 @@ SONIC_ONLINE_DEBS += $(LIBSAI_AGERA2) $(DOCKER_GBSYNCD_AGERA2)_VERSION = 1.0.0 $(DOCKER_GBSYNCD_AGERA2)_PACKAGE_NAME = gbsyncd-agera2 $(DOCKER_GBSYNCD_AGERA2)_PATH = $(PLATFORM_PATH)/../components/docker-gbsyncd-agera2 -$(DOCKER_GBSYNCD_AGERA2)_DEPENDS += $(SYNCD) $(LIBSAI_AGERA2) +$(DOCKER_GBSYNCD_AGERA2)_DEPENDS += $(SYNCD) $(LIBSAI_AGERA2) $(SSWSYNCD) endif diff --git a/platform/components/docker-gbsyncd-agera2/Dockerfile.j2 b/platform/components/docker-gbsyncd-agera2/Dockerfile.j2 index 1903f189622..8b9e5529095 100644 --- a/platform/components/docker-gbsyncd-agera2/Dockerfile.j2 +++ b/platform/components/docker-gbsyncd-agera2/Dockerfile.j2 @@ -1,4 +1,7 @@ -FROM docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} +{% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files, rsync_from_builder_stage %} +ARG BASE=docker-config-engine-trixie-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} + +FROM $BASE AS base ARG docker_container_name @@ -9,20 +12,13 @@ RUN apt-get update RUN apt-get install -f -y iproute2 libcap2-bin libprotobuf-dev -COPY \ -{% for deb in docker_gbsyncd_agera2_debs.split(' ') -%} -{% if 'libsaibcm' not in deb -%} -debs/{{ deb }}{{' '}} -{%- endif %} -{%- endfor -%} -debs/ +{% if docker_gbsyncd_agera2_debs.strip() -%} +# Copy locally-built Debian package dependencies +{{ copy_files("debs/", docker_gbsyncd_agera2_debs.split(' '), "/debs/") }} -RUN dpkg -i \ -{% for deb in docker_gbsyncd_agera2_debs.split(' ') -%} -{% if 'libsaibcm' not in deb -%} -debs/{{ deb }}{{' '}} +# Install locally-built Debian packages and implicitly install their dependencies +{{ install_debian_packages(docker_gbsyncd_agera2_debs.split(' ')) }} {%- endif %} -{%- endfor %} COPY ["docker-init.sh", "/usr/bin/"] COPY ["start.sh", "/usr/bin/"] @@ -32,11 +28,9 @@ RUN mkdir -p /etc/supervisor/conf.d/ COPY ["critical_processes", "/etc/supervisor"] COPY ["supervisord.conf", "/etc/supervisor/conf.d"] -COPY ["files/dsserve", "/usr/bin/"] -RUN chmod +x /usr/bin/dsserve +FROM $BASE -## Clean up -RUN apt-get clean -y; apt-get autoclean -y; apt-get autoremove -y -RUN rm -rf /debs +{{ rsync_from_builder_stage() }} +ENV DEBIAN_FRONTEND=noninteractive ENTRYPOINT ["/usr/bin/docker-init.sh"] diff --git a/platform/components/docker-gbsyncd-agera2/start.sh b/platform/components/docker-gbsyncd-agera2/start.sh index ac7de02dcdc..0d988860c99 100755 --- a/platform/components/docker-gbsyncd-agera2/start.sh +++ b/platform/components/docker-gbsyncd-agera2/start.sh @@ -3,6 +3,7 @@ HWSKU_DIR=/usr/share/sonic/hwsku mkdir -p /etc/sai.d/ +mkdir -p /var/run/kms # Create/Copy the psai.profile to /etc/sai.d/psai.profile if [ -f $HWSKU_DIR/psai.profile.j2 ]; then diff --git a/platform/components/docker-gbsyncd-agera2/supervisord.conf b/platform/components/docker-gbsyncd-agera2/supervisord.conf index f84b90e8a1d..fac93426c8c 100644 --- a/platform/components/docker-gbsyncd-agera2/supervisord.conf +++ b/platform/components/docker-gbsyncd-agera2/supervisord.conf @@ -13,7 +13,7 @@ events=PROCESS_STATE [eventlistener:supervisor-proc-exit-listener] command=/usr/bin/supervisor-proc-exit-listener-rs --container-name gbsyncd -events=PROCESS_STATE_EXITED,PROCESS_STATE_RUNNING +events=PROCESS_STATE_EXITED,PROCESS_STATE_RUNNING,PROCESS_STATE_FATAL autostart=true autorestart=unexpected buffer_size=1024 diff --git a/platform/components/docker-gbsyncd-broncos.mk b/platform/components/docker-gbsyncd-broncos.mk index 5ce094ae3c3..2855ab7fd41 100644 --- a/platform/components/docker-gbsyncd-broncos.mk +++ b/platform/components/docker-gbsyncd-broncos.mk @@ -1,6 +1,6 @@ LIBSAI_BRONCOS_VERSION = 3.12 LIBSAI_BRONCOS_BRANCH_NAME = REL_3.12 -LIBSAI_BRONCOS_URL_PREFIX = "https://packages.trafficmanager.net/public/sai/bcmpai/$(LIBSAI_BRONCOS_BRANCH_NAME)/$(LIBSAI_BRONCOS_VERSION)" +LIBSAI_BRONCOS_URL_PREFIX = "$(BUILD_PUBLIC_URL)/sai/bcmpai/$(LIBSAI_BRONCOS_BRANCH_NAME)/$(LIBSAI_BRONCOS_VERSION)" LIBSAI_BRONCOS = libsaibroncos_$(LIBSAI_BRONCOS_VERSION)_amd64.deb $(LIBSAI_BRONCOS)_URL = "$(LIBSAI_BRONCOS_URL_PREFIX)/$(LIBSAI_BRONCOS)" @@ -12,30 +12,29 @@ DOCKER_GBSYNCD_BRONCOS_DBG = $(DOCKER_GBSYNCD_BRONCOS_STEM)-$(DBG_IMAGE_MARK).gz $(DOCKER_GBSYNCD_BRONCOS)_FILES += $(DSSERVE) -$(DOCKER_GBSYNCD_BRONCOS)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_BOOKWORM) +$(DOCKER_GBSYNCD_BRONCOS)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_TRIXIE) -$(DOCKER_GBSYNCD_BRONCOS)_DBG_DEPENDS += $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_DEPENDS) +$(DOCKER_GBSYNCD_BRONCOS)_DBG_DEPENDS += $($(DOCKER_CONFIG_ENGINE_TRIXIE)_DBG_DEPENDS) -$(DOCKER_GBSYNCD_BRONCOS)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_IMAGE_PACKAGES) +$(DOCKER_GBSYNCD_BRONCOS)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_TRIXIE)_DBG_IMAGE_PACKAGES) SONIC_DOCKER_IMAGES += $(DOCKER_GBSYNCD_BRONCOS) -SONIC_BOOKWORM_DOCKERS += $(DOCKER_GBSYNCD_BRONCOS) +SONIC_TRIXIE_DOCKERS += $(DOCKER_GBSYNCD_BRONCOS) SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_GBSYNCD_BRONCOS) SONIC_DOCKER_DBG_IMAGES += $(DOCKER_GBSYNCD_BRONCOS_DBG) -SONIC_BOOKWORM_DBG_DOCKERS += $(DOCKER_GBSYNCD_BRONCOS_DBG) +SONIC_TRIXIE_DBG_DOCKERS += $(DOCKER_GBSYNCD_BRONCOS_DBG) SONIC_INSTALL_DOCKER_DBG_IMAGES += $(DOCKER_GBSYNCD_BRONCOS_DBG) $(DOCKER_GBSYNCD_BRONCOS)_CONTAINER_NAME = gbsyncd -$(DOCKER_GBSYNCD_BRONCOS)_RUN_OPT += --privileged -t +$(DOCKER_GBSYNCD_BRONCOS)_RUN_OPT += --cap-add=SYS_RAWIO --cap-add=SYS_ADMIN --cap-add=NET_ADMIN -t --security-opt apparmor=unconfined --security-opt="systempaths=unconfined" $(DOCKER_GBSYNCD_BRONCOS)_RUN_OPT += -v /host/machine.conf:/etc/machine.conf $(DOCKER_GBSYNCD_BRONCOS)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro -$(DOCKER_GBSYNCD_BRONCOS)_RUN_OPT += -v /host/warmboot:/var/warmboot SONIC_ONLINE_DEBS += $(LIBSAI_BRONCOS) $(DOCKER_GBSYNCD_BRONCOS)_VERSION = 1.0.0 $(DOCKER_GBSYNCD_BRONCOS)_PACKAGE_NAME = gbsyncd-broncos $(DOCKER_GBSYNCD_BRONCOS)_PATH = $(PLATFORM_PATH)/../components/docker-gbsyncd-broncos -$(DOCKER_GBSYNCD_BRONCOS)_DEPENDS += $(SYNCD) $(LIBSAI_BRONCOS) +$(DOCKER_GBSYNCD_BRONCOS)_DEPENDS += $(SYNCD) $(LIBSAI_BRONCOS) $(SSWSYNCD) endif diff --git a/platform/components/docker-gbsyncd-broncos/Dockerfile.j2 b/platform/components/docker-gbsyncd-broncos/Dockerfile.j2 index 04933bedfa4..d4d193d5545 100644 --- a/platform/components/docker-gbsyncd-broncos/Dockerfile.j2 +++ b/platform/components/docker-gbsyncd-broncos/Dockerfile.j2 @@ -1,4 +1,5 @@ -ARG BASE=docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} +{% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files, rsync_from_builder_stage %} +ARG BASE=docker-config-engine-trixie-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} FROM $BASE AS base @@ -11,20 +12,13 @@ RUN apt-get update RUN apt-get install -f -y iproute2 libcap2-bin libprotobuf-dev -COPY \ -{% for deb in docker_gbsyncd_broncos_debs.split(' ') -%} -{% if 'libsaibcm' not in deb -%} -debs/{{ deb }}{{' '}} -{%- endif %} -{%- endfor -%} -debs/ +{% if docker_gbsyncd_broncos_debs.strip() -%} +# Copy locally-built Debian package dependencies +{{ copy_files("debs/", docker_gbsyncd_broncos_debs.split(' '), "/debs/") }} -RUN dpkg -i \ -{% for deb in docker_gbsyncd_broncos_debs.split(' ') -%} -{% if 'libsaibcm' not in deb -%} -debs/{{ deb }}{{' '}} +# Install locally-built Debian packages and implicitly install their dependencies +{{ install_debian_packages(docker_gbsyncd_broncos_debs.split(' ')) }} {%- endif %} -{%- endfor %} COPY ["docker-init.sh", "/usr/bin/"] COPY ["start.sh", "/usr/bin/"] @@ -33,11 +27,9 @@ COPY ["bcmsh", "/usr/bin/"] COPY ["critical_processes.j2", "/usr/share/sonic/templates"] COPY ["supervisord.conf.j2", "/usr/share/sonic/templates"] -COPY ["files/dsserve", "/usr/bin/"] -RUN chmod +x /usr/bin/dsserve - FROM $BASE -RUN --mount=type=bind,from=base,target=/changes-to-image rsync -axAX --no-D --exclude=/sys --exclude=/proc --exclude=/dev --exclude=resolv.conf /changes-to-image/ / +{{ rsync_from_builder_stage() }} +ENV DEBIAN_FRONTEND=noninteractive ENTRYPOINT ["/usr/bin/docker-init.sh"] diff --git a/platform/components/docker-gbsyncd-credo.mk b/platform/components/docker-gbsyncd-credo.mk index 84011a00073..b24f52736f0 100644 --- a/platform/components/docker-gbsyncd-credo.mk +++ b/platform/components/docker-gbsyncd-credo.mk @@ -1,16 +1,17 @@ DOCKER_GBSYNCD_PLATFORM_CODE = credo -LIBSAI_CREDO = libsaicredo_1.2.4_amd64.deb -$(LIBSAI_CREDO)_URL = "https://packages.trafficmanager.net/public/credosai/$(LIBSAI_CREDO)" -LIBSAI_CREDO_OWL = libsaicredo-owl_1.2.4_amd64.deb -$(LIBSAI_CREDO_OWL)_URL = "https://packages.trafficmanager.net/public/credosai/$(LIBSAI_CREDO_OWL)" -LIBSAI_CREDO_BLACKHAWK = libsaicredo-blackhawk_1.2.4_amd64.deb -$(LIBSAI_CREDO_BLACKHAWK)_URL = "https://packages.trafficmanager.net/public/credosai/$(LIBSAI_CREDO_BLACKHAWK)" -LIBSAI_CREDO_CRT88322 = libsaicredo-crt88322_1.2.4_amd64.deb -$(LIBSAI_CREDO_CRT88322)_URL = "https://packages.trafficmanager.net/public/credosai/$(LIBSAI_CREDO_CRT88322)" +LIBSAI_VERSION = 1.2.10 +LIBSAI_CREDO = libsaicredo_$(LIBSAI_VERSION)_amd64.deb +$(LIBSAI_CREDO)_URL = "$(BUILD_PUBLIC_URL)/credosai/$(LIBSAI_CREDO)" +LIBSAI_CREDO_OWL = libsaicredo-owl_$(LIBSAI_VERSION)_amd64.deb +$(LIBSAI_CREDO_OWL)_URL = "$(BUILD_PUBLIC_URL)/credosai/$(LIBSAI_CREDO_OWL)" +LIBSAI_CREDO_BLACKHAWK = libsaicredo-blackhawk_$(LIBSAI_VERSION)_amd64.deb +$(LIBSAI_CREDO_BLACKHAWK)_URL = "$(BUILD_PUBLIC_URL)/credosai/$(LIBSAI_CREDO_BLACKHAWK)" +LIBSAI_CREDO_CRT88322 = libsaicredo-crt88322_$(LIBSAI_VERSION)_amd64.deb +$(LIBSAI_CREDO_CRT88322)_URL = "$(BUILD_PUBLIC_URL)/credosai/$(LIBSAI_CREDO_CRT88322)" ifneq ($($(LIBSAI_CREDO)_URL),) -include $(PLATFORM_PATH)/../template/docker-gbsyncd-bookworm.mk +include $(PLATFORM_PATH)/../template/docker-gbsyncd-trixie.mk $(DOCKER_GBSYNCD_BASE)_VERSION = 1.0.0 $(DOCKER_GBSYNCD_BASE)_PACKAGE_NAME = gbsyncd $(DOCKER_GBSYNCD_BASE)_PATH = $(PLATFORM_PATH)/../components/docker-gbsyncd-$(DOCKER_GBSYNCD_PLATFORM_CODE) diff --git a/platform/components/docker-gbsyncd-credo/Dockerfile.j2 b/platform/components/docker-gbsyncd-credo/Dockerfile.j2 index 6145e1c1f9f..51102f72a8f 100644 --- a/platform/components/docker-gbsyncd-credo/Dockerfile.j2 +++ b/platform/components/docker-gbsyncd-credo/Dockerfile.j2 @@ -1,4 +1,5 @@ -ARG BASE=docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} +{% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files, rsync_from_builder_stage %} +ARG BASE=docker-config-engine-trixie-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} FROM $BASE AS base @@ -11,20 +12,13 @@ RUN apt-get update RUN apt-get install -f -y iproute2 libcap2-bin -COPY \ -{% for deb in docker_gbsyncd_credo_debs.split(' ') -%} -{% if 'libsaibcm' not in deb -%} -debs/{{ deb }}{{' '}} -{%- endif %} -{%- endfor -%} -debs/ +{% if docker_gbsyncd_credo_debs.strip() -%} +# Copy locally-built Debian package dependencies +{{ copy_files("debs/", docker_gbsyncd_credo_debs.split(' '), "/debs/") }} -RUN dpkg -i \ -{% for deb in docker_gbsyncd_credo_debs.split(' ') -%} -{% if 'libsaibcm' not in deb -%} -debs/{{ deb }}{{' '}} +# Install locally-built Debian packages and implicitly install their dependencies +{{ install_debian_packages(docker_gbsyncd_credo_debs.split(' ')) }} {%- endif %} -{%- endfor %} COPY ["docker-init.sh", "/usr/bin/"] COPY ["start.sh", "/usr/bin/"] @@ -36,6 +30,7 @@ COPY ["supervisord.conf.j2", "/usr/share/sonic/templates"] FROM $BASE -RUN --mount=type=bind,from=base,target=/changes-to-image rsync -axAX --no-D --exclude=/sys --exclude=/proc --exclude=/dev --exclude=resolv.conf /changes-to-image/ / +{{ rsync_from_builder_stage() }} +ENV DEBIAN_FRONTEND=noninteractive ENTRYPOINT ["/usr/bin/docker-init.sh"] diff --git a/platform/components/docker-gbsyncd-credo/supervisord.conf.j2 b/platform/components/docker-gbsyncd-credo/supervisord.conf.j2 index d785d4f858f..60195cf55da 100644 --- a/platform/components/docker-gbsyncd-credo/supervisord.conf.j2 +++ b/platform/components/docker-gbsyncd-credo/supervisord.conf.j2 @@ -14,7 +14,7 @@ buffer_size=1024 [eventlistener:supervisor-proc-exit-listener] command=/usr/bin/supervisor-proc-exit-listener-rs --container-name gbsyncd -events=PROCESS_STATE_EXITED,PROCESS_STATE_RUNNING +events=PROCESS_STATE_EXITED,PROCESS_STATE_RUNNING,PROCESS_STATE_FATAL autostart=true autorestart=unexpected buffer_size=1024 diff --git a/platform/components/docker-gbsyncd-milleniob.mk b/platform/components/docker-gbsyncd-milleniob.mk index 84dc2834173..1ff2fa84f00 100644 --- a/platform/components/docker-gbsyncd-milleniob.mk +++ b/platform/components/docker-gbsyncd-milleniob.mk @@ -11,29 +11,27 @@ DOCKER_GBSYNCD_MILLENIOB_STEM = docker-gbsyncd-milleniob DOCKER_GBSYNCD_MILLENIOB = $(DOCKER_GBSYNCD_MILLENIOB_STEM).gz DOCKER_GBSYNCD_MILLENIOB_DBG = $(DOCKER_GBSYNCD_MILLENIOB_STEM)-$(DBG_IMAGE_MARK).gz +$(DOCKER_GBSYNCD_MILLENIOB)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_TRIXIE) -$(DOCKER_GBSYNCD_MILLENIOB)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_BOOKWORM) +$(DOCKER_GBSYNCD_MILLENIOB)_DBG_DEPENDS += $($(DOCKER_CONFIG_ENGINE_TRIXIE)_DBG_DEPENDS) -$(DOCKER_GBSYNCD_MILLENIOB)_DBG_DEPENDS += $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_DEPENDS) - -$(DOCKER_GBSYNCD_MILLENIOB)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_IMAGE_PACKAGES) +$(DOCKER_GBSYNCD_MILLENIOB)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_TRIXIE)_DBG_IMAGE_PACKAGES) SONIC_DOCKER_IMAGES += $(DOCKER_GBSYNCD_MILLENIOB) -SONIC_BOOKWORM_DOCKERS += $(DOCKER_GBSYNCD_MILLENIOB) +SONIC_TRIXIE_DOCKERS += $(DOCKER_GBSYNCD_MILLENIOB) SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_GBSYNCD_MILLENIOB) SONIC_DOCKER_DBG_IMAGES += $(DOCKER_GBSYNCD_MILLENIOB_DBG) -SONIC_BOOKWORM_DBG_DOCKERS += $(DOCKER_GBSYNCD_MILLENIOB_DBG) +SONIC_TRIXIE_DBG_DOCKERS += $(DOCKER_GBSYNCD_MILLENIOB_DBG) SONIC_INSTALL_DOCKER_DBG_IMAGES += $(DOCKER_GBSYNCD_MILLENIOB_DBG) $(DOCKER_GBSYNCD_MILLENIOB)_CONTAINER_NAME = gbsyncd -$(DOCKER_GBSYNCD_MILLENIOB)_RUN_OPT += --privileged -t +$(DOCKER_GBSYNCD_MILLENIOB)_RUN_OPT += --cap-add=SYS_RAWIO --cap-add=SYS_ADMIN --cap-add=NET_ADMIN -t --security-opt apparmor=unconfined --security-opt="systempaths=unconfined" $(DOCKER_GBSYNCD_MILLENIOB)_RUN_OPT += -v /host/machine.conf:/etc/machine.conf $(DOCKER_GBSYNCD_MILLENIOB)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro -$(DOCKER_GBSYNCD_MILLENIOB)_RUN_OPT += -v /host/warmboot:/var/warmboot $(DOCKER_GBSYNCD_MILLENIOB)_VERSION = 1.0.0 $(DOCKER_GBSYNCD_MILLENIOB)_PACKAGE_NAME = gbsyncd-milleniob $(DOCKER_GBSYNCD_MILLENIOB)_PATH = $(PLATFORM_PATH)/../components/docker-gbsyncd-milleniob -$(DOCKER_GBSYNCD_MILLENIOB)_DEPENDS += $(SYNCD) $(LIBSAI_MILLENIOB) +$(DOCKER_GBSYNCD_MILLENIOB)_DEPENDS += $(SYNCD) $(SSWSYNCD) $(LIBSAI_MILLENIOB) endif diff --git a/platform/components/docker-gbsyncd-milleniob/Dockerfile.j2 b/platform/components/docker-gbsyncd-milleniob/Dockerfile.j2 index 7442300ea05..c11a99a4ffa 100644 --- a/platform/components/docker-gbsyncd-milleniob/Dockerfile.j2 +++ b/platform/components/docker-gbsyncd-milleniob/Dockerfile.j2 @@ -1,4 +1,4 @@ -FROM docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} +FROM docker-config-engine-trixie-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} ARG docker_container_name @@ -31,7 +31,6 @@ COPY ["bcmsh", "/usr/bin/"] COPY ["critical_processes.j2", "/usr/share/sonic/templates"] COPY ["supervisord.conf.j2", "/usr/share/sonic/templates"] -COPY ["files/dsserve", "/usr/bin/"] RUN chmod +x /usr/bin/dsserve ## Clean up diff --git a/platform/marvell-prestera/docker-saiserver-mrvl-prestera.mk b/platform/marvell-prestera/docker-saiserver-mrvl-prestera.mk index 88eb3594054..5376bd162f5 100644 --- a/platform/marvell-prestera/docker-saiserver-mrvl-prestera.mk +++ b/platform/marvell-prestera/docker-saiserver-mrvl-prestera.mk @@ -3,9 +3,9 @@ DOCKER_SAISERVER_MRVL = docker-saiserver$(SAITHRIFT_VER)-mrvl-prestera.gz $(DOCKER_SAISERVER_MRVL)_PATH = $(PLATFORM_PATH)/docker-saiserver-mrvl-prestera $(DOCKER_SAISERVER_MRVL)_DEPENDS += $(SAISERVER) -$(DOCKER_SAISERVER_MRVL)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_BOOKWORM) +$(DOCKER_SAISERVER_MRVL)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_TRIXIE) SONIC_DOCKER_IMAGES += $(DOCKER_SAISERVER_MRVL) -SONIC_BOOKWORM_DOCKERS += $(DOCKER_SAISERVER_MRVL) +SONIC_TRIXIE_DOCKERS += $(DOCKER_SAISERVER_MRVL) $(DOCKER_SAISERVER_MRVL)_CONTAINER_NAME = saiserver$(SAITHRIFT_VER) $(DOCKER_SAISERVER_MRVL)_RUN_OPT += --privileged -t diff --git a/platform/marvell-prestera/docker-saiserver-mrvl-prestera/Dockerfile.j2 b/platform/marvell-prestera/docker-saiserver-mrvl-prestera/Dockerfile.j2 index fba058ea6b5..77f0b113d92 100644 --- a/platform/marvell-prestera/docker-saiserver-mrvl-prestera/Dockerfile.j2 +++ b/platform/marvell-prestera/docker-saiserver-mrvl-prestera/Dockerfile.j2 @@ -1,5 +1,5 @@ {% from "dockers/dockerfile-macros.j2" import install_debian_packages %} -ARG BASE=docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} +ARG BASE=docker-config-engine-trixie-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} FROM $BASE AS base @@ -10,11 +10,11 @@ ENV DEBIAN_FRONTEND=noninteractive RUN apt-get update \ && apt-get -y install \ - libboost-atomic1.74.0 \ + libboost-atomic1.88.0 \ libqt5core5a \ libqt5network5 \ gdb \ - libthrift-0.17.0 + libthrift-0.19.0t64 COPY \ {% for deb in docker_saiserver_mrvl_prestera_debs.split(' ') -%} diff --git a/platform/marvell-prestera/docker-syncd-mrvl-prestera-rpc.mk b/platform/marvell-prestera/docker-syncd-mrvl-prestera-rpc.mk index feed954e3dd..d8c4d22ec12 100644 --- a/platform/marvell-prestera/docker-syncd-mrvl-prestera-rpc.mk +++ b/platform/marvell-prestera/docker-syncd-mrvl-prestera-rpc.mk @@ -25,4 +25,4 @@ $(DOCKER_SYNCD_MRVL_RPC)_RUN_OPT += -v /host/machine.conf:/etc/machine.conf $(DOCKER_SYNCD_MRVL_RPC)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro $(DOCKER_SYNCD_MRVL_RPC)_RUN_OPT += -v /host/warmboot:/var/warmboot -SONIC_BOOKWORM_DOCKERS += $(DOCKER_SYNCD_MRVL_RPC) +SONIC_TRIXIE_DOCKERS += $(DOCKER_SYNCD_MRVL_RPC) diff --git a/platform/marvell-prestera/docker-syncd-mrvl-prestera-rpc/Dockerfile.j2 b/platform/marvell-prestera/docker-syncd-mrvl-prestera-rpc/Dockerfile.j2 index 3941d8b1523..b291c44877d 100644 --- a/platform/marvell-prestera/docker-syncd-mrvl-prestera-rpc/Dockerfile.j2 +++ b/platform/marvell-prestera/docker-syncd-mrvl-prestera-rpc/Dockerfile.j2 @@ -21,8 +21,8 @@ RUN apt-get update \ wget \ libqt5core5a \ libqt5network5 \ - libboost-atomic1.74.0 \ - libthrift-0.17.0 \ + libboost-atomic1.88.0 \ + libthrift-0.19.0t64 \ libnanomsg5 \ libnanomsg-dev diff --git a/platform/marvell-prestera/docker-syncd-mrvl-prestera.mk b/platform/marvell-prestera/docker-syncd-mrvl-prestera.mk index 177f9a10e52..885374cad69 100644 --- a/platform/marvell-prestera/docker-syncd-mrvl-prestera.mk +++ b/platform/marvell-prestera/docker-syncd-mrvl-prestera.mk @@ -1,7 +1,7 @@ # docker image for mrvl syncd DOCKER_SYNCD_PLATFORM_CODE = mrvl-prestera -include $(PLATFORM_PATH)/../template/docker-syncd-bookworm.mk +include $(PLATFORM_PATH)/../template/docker-syncd-trixie.mk $(DOCKER_SYNCD_BASE)_DEPENDS += $(SYNCD) $(DOCKER_SYNCD_BASE)_DEPENDS += $(MRVL_SAI) diff --git a/platform/marvell-prestera/docker-syncd-mrvl-prestera/Dockerfile.j2 b/platform/marvell-prestera/docker-syncd-mrvl-prestera/Dockerfile.j2 index 553b3b8c356..ed89330b7ce 100755 --- a/platform/marvell-prestera/docker-syncd-mrvl-prestera/Dockerfile.j2 +++ b/platform/marvell-prestera/docker-syncd-mrvl-prestera/Dockerfile.j2 @@ -1,5 +1,5 @@ {% from "dockers/dockerfile-macros.j2" import install_debian_packages, copy_files %} -ARG BASE=docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} +ARG BASE=docker-config-engine-trixie-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} FROM $BASE AS base diff --git a/platform/marvell-prestera/docker-syncd-mrvl-prestera/supervisord.conf b/platform/marvell-prestera/docker-syncd-mrvl-prestera/supervisord.conf index 95ba2a89e75..8824334ec3e 100644 --- a/platform/marvell-prestera/docker-syncd-mrvl-prestera/supervisord.conf +++ b/platform/marvell-prestera/docker-syncd-mrvl-prestera/supervisord.conf @@ -14,7 +14,7 @@ buffer_size=1024 [eventlistener:supervisor-proc-exit-listener] command=/usr/bin/supervisor-proc-exit-listener-rs --container-name syncd -events=PROCESS_STATE_EXITED,PROCESS_STATE_RUNNING +events=PROCESS_STATE_EXITED,PROCESS_STATE_RUNNING,PROCESS_STATE_FATAL autostart=true autorestart=unexpected buffer_size=1024 @@ -31,7 +31,7 @@ stderr_syslog=true dependent_startup=true [program:syncd] -command=/usr/bin/syncd_start.sh +command=/usr/bin/nice -n -8 /usr/bin/syncd_start.sh priority=3 autostart=false autorestart=false diff --git a/platform/marvell-prestera/mrvl-prestera b/platform/marvell-prestera/mrvl-prestera index 0e63348973d..5607a8b7cd6 160000 --- a/platform/marvell-prestera/mrvl-prestera +++ b/platform/marvell-prestera/mrvl-prestera @@ -1 +1 @@ -Subproject commit 0e63348973df0c1793684704cb6e9d07bf5d473e +Subproject commit 5607a8b7cd65cd4892a4fdcf7101ca13c214e48a diff --git a/platform/marvell-prestera/mrvl-prestera.dep b/platform/marvell-prestera/mrvl-prestera.dep index 3ee32c3cbcd..f307900b7b5 100644 --- a/platform/marvell-prestera/mrvl-prestera.dep +++ b/platform/marvell-prestera/mrvl-prestera.dep @@ -2,6 +2,10 @@ MPATH := $($(MRVL_PRESTERA_DEB)_SRC_PATH) DEP_FILES := $(SONIC_COMMON_FILES_LIST) $(PLATFORM_PATH)/mrvl-prestera.mk $(PLATFORM_PATH)/mrvl-prestera.dep DEP_FILES += $(SONIC_COMMON_BASE_FILES_LIST) SMDEP_FILES := $(addprefix $(MPATH)/,$(shell cd $(MPATH) && git ls-files)) +# Filter out the run-time symlink that is not in build-source tree +SLINKS := $(shell find $(MPATH)/platform/*/common/etc/systemd -type l -exec echo {} \; | grep -Ev ' ') +SLINKS += $(shell find $(MPATH)/platform/common/etc/systemd -type l -exec echo {} \; | grep -Ev ' ') +SMDEP_FILES := $(filter-out $(SLINKS),$(SMDEP_FILES)) $(MRVL_PRESTERA_DEB)_CACHE_MODE := GIT_CONTENT_SHA $(MRVL_PRESTERA_DEB)_DEP_FLAGS := $(SONIC_COMMON_FLAGS_LIST) diff --git a/platform/marvell-prestera/sai.mk b/platform/marvell-prestera/sai.mk index 49643c401f1..18f41ff13ec 100644 --- a/platform/marvell-prestera/sai.mk +++ b/platform/marvell-prestera/sai.mk @@ -2,11 +2,11 @@ BRANCH = master ifeq ($(CONFIGURED_ARCH),arm64) -MRVL_SAI_VERSION = 1.16.1-3 +MRVL_SAI_VERSION = 1.17.1-13 else ifeq ($(CONFIGURED_ARCH),armhf) -MRVL_SAI_VERSION = 1.16.1-3 +MRVL_SAI_VERSION = 1.17.1-13 else -MRVL_SAI_VERSION = 1.16.1-3 +MRVL_SAI_VERSION = 1.17.1-13 endif MRVL_SAI_URL_PREFIX = https://github.com/Marvell-switching/sonic-marvell-binaries/raw/master/$(CONFIGURED_ARCH)/sai-plugin/$(BRANCH)/ diff --git a/platform/marvell-teralynx/docker-saiserver-mrvl-teralynx.mk b/platform/marvell-teralynx/docker-saiserver-mrvl-teralynx.mk index ba46feeff9c..fe067c994a4 100644 --- a/platform/marvell-teralynx/docker-saiserver-mrvl-teralynx.mk +++ b/platform/marvell-teralynx/docker-saiserver-mrvl-teralynx.mk @@ -3,13 +3,12 @@ DOCKER_SAISERVER_MRVL_TERALYNX = docker-saiserver$(SAITHRIFT_VER)-mrvl-teralynx.gz $(DOCKER_SAISERVER_MRVL_TERALYNX)_PATH = $(PLATFORM_PATH)/docker-saiserver-mrvl-teralynx $(DOCKER_SAISERVER_MRVL_TERALYNX)_DEPENDS += $(SAISERVER) -$(DOCKER_SAISERVER_MRVL_TERALYNX)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_BOOKWORM) +$(DOCKER_SAISERVER_MRVL_TERALYNX)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_TRIXIE) SONIC_DOCKER_IMAGES += $(DOCKER_SAISERVER_MRVL_TERALYNX) -SONIC_BOOKWORM_DOCKERS += $(DOCKER_SAISERVER_MRVL_TERALYNX) +SONIC_TRIXIE_DOCKERS += $(DOCKER_SAISERVER_MRVL_TERALYNX) $(DOCKER_SAISERVER_MRVL_TERALYNX)_CONTAINER_NAME = saiserver$(SAITHRIFT_VER) $(DOCKER_SAISERVER_MRVL_TERALYNX)_RUN_OPT += --privileged -t $(DOCKER_SAISERVER_MRVL_TERALYNX)_RUN_OPT += -v /host/machine.conf:/etc/machine.conf $(DOCKER_SAISERVER_MRVL_TERALYNX)_RUN_OPT += -v /var/run/docker-saiserver:/var/run/sswsyncd $(DOCKER_SAISERVER_MRVL_TERALYNX)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro -$(DOCKER_SAISERVER_MRVL_TERALYNX)_RUN_OPT += -v /host/warmboot:/var/warmboot diff --git a/platform/marvell-teralynx/docker-saiserver-mrvl-teralynx/Dockerfile.j2 b/platform/marvell-teralynx/docker-saiserver-mrvl-teralynx/Dockerfile.j2 index 0b5c33a5556..ba979aae559 100644 --- a/platform/marvell-teralynx/docker-saiserver-mrvl-teralynx/Dockerfile.j2 +++ b/platform/marvell-teralynx/docker-saiserver-mrvl-teralynx/Dockerfile.j2 @@ -1,5 +1,5 @@ {% from "dockers/dockerfile-macros.j2" import install_debian_packages %} -ARG BASE=docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} +ARG BASE=docker-config-engine-trixie-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} FROM $BASE AS base @@ -12,15 +12,15 @@ ENV DEBIAN_FRONTEND=noninteractive RUN apt-get update \ && apt-get -y install \ gdb \ - libboost-atomic1.74.0 \ - libqt5core5a \ - libqt5network5 \ + libboost-atomic1.83.0 \ + libqt5core5t64 \ + libqt5network5t64 \ libyaml-dev \ - libthrift-0.17.0 \ + libthrift-0.19.0t64 \ binutils -RUN pip3 install numpy -RUN pip3 install yamlordereddictloader +RUN pip3 install --break-system-packages numpy +RUN pip3 install --break-system-packages yamlordereddictloader COPY \ {% for deb in docker_saiserver_mrvl_teralynx_debs.split(' ') -%} @@ -36,9 +36,11 @@ dpkg_apt debs/{{ deb }}{{'; '}} COPY ["start.sh", "/usr/bin"] COPY ["supervisord.conf", "/etc/supervisor/conf.d/"] -## Clean up -RUN apt-get clean -y; apt-get autoclean -y; apt-get autoremove -y -RUN rm -rf /debs +RUN apt-get purge -y libyaml-dev \ + && apt-get autoremove -y --purge \ + && apt-get clean -y \ + && apt-get autoclean -y \ + && rm -rf /debs FROM $BASE diff --git a/platform/marvell-teralynx/docker-syncd-mrvl-teralynx-rpc.dep b/platform/marvell-teralynx/docker-syncd-mrvl-teralynx-rpc.dep new file mode 100644 index 00000000000..a39ed6a48c6 --- /dev/null +++ b/platform/marvell-teralynx/docker-syncd-mrvl-teralynx-rpc.dep @@ -0,0 +1,8 @@ +DPATH := $($(DOCKER_SYNCD_MRVL_TERALYNX_RPC)_PATH) +DEP_FILES := $(SONIC_COMMON_FILES_LIST) $(PLATFORM_PATH)/docker-syncd-mrvl-teralynx-rpc.mk $(PLATFORM_PATH)/docker-syncd-mrvl-teralynx-rpc.dep +DEP_FILES += $(SONIC_COMMON_BASE_FILES_LIST) +DEP_FILES += $(shell git ls-files -- $(DPATH)) + +$(DOCKER_SYNCD_MRVL_TERALYNX_RPC)_CACHE_MODE := GIT_CONTENT_SHA +$(DOCKER_SYNCD_MRVL_TERALYNX_RPC)_DEP_FLAGS := $(SONIC_COMMON_FLAGS_LIST) +$(DOCKER_SYNCD_MRVL_TERALYNX_RPC)_DEP_FILES := $(DEP_FILES) diff --git a/platform/marvell-teralynx/docker-syncd-mrvl-teralynx-rpc.mk b/platform/marvell-teralynx/docker-syncd-mrvl-teralynx-rpc.mk index 56e2701cba7..0aac93e72ca 100755 --- a/platform/marvell-teralynx/docker-syncd-mrvl-teralynx-rpc.mk +++ b/platform/marvell-teralynx/docker-syncd-mrvl-teralynx-rpc.mk @@ -7,7 +7,7 @@ $(DOCKER_SYNCD_MRVL_TERALYNX_RPC)_DEPENDS += $(LIBOR_TOOLS) $(DOCKER_SYNCD_MRVL_TERALYNX_RPC)_PYTHON_WHEELS += $(PTF_PY3) $(DOCKER_SYNCD_MRVL_TERALYNX_RPC)_LOAD_DOCKERS += $(DOCKER_SYNCD_BASE) SONIC_DOCKER_IMAGES += $(DOCKER_SYNCD_MRVL_TERALYNX_RPC) -SONIC_BOOKWORM_DOCKERS += $(DOCKER_SYNCD_MRVL_TERALYNX_RPC) +SONIC_TRIXIE_DOCKERS += $(DOCKER_SYNCD_MRVL_TERALYNX_RPC) ifeq ($(ENABLE_SYNCD_RPC),y) SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_SYNCD_MRVL_TERALYNX_RPC) endif @@ -17,6 +17,6 @@ $(DOCKER_SYNCD_MRVL_TERALYNX_RPC)_VERSION = 1.0.0-rpc $(DOCKER_SYNCD_MRVL_TERALYNX_RPC)_PACKAGE_NAME = syncd $(DOCKER_SYNCD_MRVL_TERALYNX_RPC)_RUN_OPT += --privileged -t $(DOCKER_SYNCD_MRVL_TERALYNX_RPC)_RUN_OPT += -v /host/machine.conf:/etc/machine.conf -$(DOCKER_SYNCD_MRVL_TERALYNX_RPC)_RUN_OPT += -v /var/run/docker-syncd:/var/run/sswsyncd +$(DOCKER_SYNCD_MRVL_TERALYNX_RPC)_RUN_OPT += -v /var/run/docker-syncd:/var/run/syncd $(DOCKER_SYNCD_MRVL_TERALYNX_RPC)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro -$(DOCKER_SYNCD_MRVL_TERALYNX_RPC)_RUN_OPT += -v /host/warmboot:/var/warmboot +$(DOCKER_SYNCD_MRVL_TERALYNX_RPC)_RUN_OPT += -v /usr/share/sonic/device/x86_64-marvell_common:/usr/share/sonic/device/x86_64-marvell_common:ro diff --git a/platform/marvell-teralynx/docker-syncd-mrvl-teralynx-rpc/Dockerfile.j2 b/platform/marvell-teralynx/docker-syncd-mrvl-teralynx-rpc/Dockerfile.j2 index ded1bdb82de..baf28255121 100755 --- a/platform/marvell-teralynx/docker-syncd-mrvl-teralynx-rpc/Dockerfile.j2 +++ b/platform/marvell-teralynx/docker-syncd-mrvl-teralynx-rpc/Dockerfile.j2 @@ -22,11 +22,11 @@ RUN apt-get update \ libyaml-dev \ wget \ cmake \ - libthrift-0.17.0 \ + libthrift-0.19.0t64 \ libnanomsg-dev -RUN pip3 install cffi \ - && pip3 install nnpy \ +RUN pip3 install --break-system-packages cffi \ + && pip3 install --break-system-packages nnpy \ && mkdir -p /opt \ && cd /opt \ && wget https://raw.githubusercontent.com/p4lang/ptf/master/ptf_nn/ptf_nn_agent.py @@ -48,9 +48,10 @@ COPY ["ptf_nn_agent.conf", "/etc/supervisor/conf.d/"] {{ install_debian_packages(docker_syncd_mrvl_teralynx_rpc_debs.split(' ')) }} {%- endif %} -## Clean up -RUN apt-get purge -y libyaml-dev python3-dev libffi-dev libssl-dev wget cmake \ - build-essential +## Clean up build-time -dev / toolchain packages (runtime uses non -dev libs from syncd base) +RUN apt-get purge -y libyaml-dev python3-dev libffi-dev libssl-dev libnanomsg-dev wget cmake \ + build-essential \ + && apt-get autoremove -y --purge RUN rm -rf /root/deps FROM $BASE diff --git a/platform/marvell-teralynx/docker-syncd-mrvl-teralynx.dep b/platform/marvell-teralynx/docker-syncd-mrvl-teralynx.dep new file mode 100644 index 00000000000..00d96009ad6 --- /dev/null +++ b/platform/marvell-teralynx/docker-syncd-mrvl-teralynx.dep @@ -0,0 +1,10 @@ +DPATH := $($(DOCKER_SYNCD_BASE)_PATH) +DEP_FILES := $(SONIC_COMMON_FILES_LIST) $(PLATFORM_PATH)/docker-syncd-mrvl-teralynx.mk $(PLATFORM_PATH)/docker-syncd-mrvl-teralynx.dep $(PLATFORM_PATH)/sai.mk +DEP_FILES += $(SONIC_COMMON_BASE_FILES_LIST) +DEP_FILES += $(shell git ls-files -- $(DPATH)) + +$(DOCKER_SYNCD_BASE)_CACHE_MODE := GIT_CONTENT_SHA +$(DOCKER_SYNCD_BASE)_DEP_FLAGS := $(SONIC_COMMON_FLAGS_LIST) +$(DOCKER_SYNCD_BASE)_DEP_FILES := $(DEP_FILES) + +$(eval $(call add_dbg_docker,$(DOCKER_SYNCD_BASE),$(DOCKER_SYNCD_BASE_DBG))) diff --git a/platform/marvell-teralynx/docker-syncd-mrvl-teralynx.mk b/platform/marvell-teralynx/docker-syncd-mrvl-teralynx.mk index 4ed4ea182e4..74afd0212c8 100755 --- a/platform/marvell-teralynx/docker-syncd-mrvl-teralynx.mk +++ b/platform/marvell-teralynx/docker-syncd-mrvl-teralynx.mk @@ -1,7 +1,7 @@ # docker image for marvell-teralynx syncd DOCKER_SYNCD_PLATFORM_CODE = mrvl-teralynx -include $(PLATFORM_PATH)/../template/docker-syncd-bookworm.mk +include $(PLATFORM_PATH)/../template/docker-syncd-trixie.mk $(DOCKER_SYNCD_BASE)_DEPENDS += $(SYNCD) $(PYTHON_SDK_API) $(MRVL_TERALYNX_LIBSAI) $(MRVL_TERALYNX_SHELL) $(DOCKER_SYNCD_BASE)_DEPENDS += $(LIBOR_TOOLS) @@ -14,5 +14,5 @@ $(DOCKER_SYNCD_BASE)_DBG_DEPENDS += $(SYNCD_DBG) \ $(DOCKER_SYNCD_BASE)_VERSION = 1.0.0 $(DOCKER_SYNCD_BASE)_PACKAGE_NAME = syncd $(DOCKER_SYNCD_BASE)_MACHINE = marvell-teralynx - -$(DOCKER_SYNCD_BASE)_RUN_OPT += -v /host/warmboot:/var/warmboot +$(DOCKER_SYNCD_BASE)_RUN_OPT += -v /var/run/docker-syncd:/var/run/syncd +$(DOCKER_SYNCD_BASE)_RUN_OPT += -v /usr/share/sonic/device/x86_64-marvell_common:/usr/share/sonic/device/x86_64-marvell_common:ro diff --git a/platform/marvell-teralynx/docker-syncd-mrvl-teralynx/Dockerfile.j2 b/platform/marvell-teralynx/docker-syncd-mrvl-teralynx/Dockerfile.j2 index 5f91e8a7b88..96f581a3915 100755 --- a/platform/marvell-teralynx/docker-syncd-mrvl-teralynx/Dockerfile.j2 +++ b/platform/marvell-teralynx/docker-syncd-mrvl-teralynx/Dockerfile.j2 @@ -1,5 +1,5 @@ {% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files %} -ARG BASE=docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} +ARG BASE=docker-config-engine-trixie-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} FROM $BASE AS base @@ -15,8 +15,8 @@ RUN apt-get install -y net-tools RUN apt-get install -y libjansson4 RUN apt-get install -y libyaml-dev RUN apt-get install -y binutils -RUN pip3 install numpy -RUN pip3 install yamlordereddictloader +RUN pip3 install --break-system-packages numpy +RUN pip3 install --break-system-packages yamlordereddictloader {% if docker_syncd_mrvl_teralynx_debs.strip() -%} # Copy locally-built Debian package dependencies @@ -31,6 +31,9 @@ COPY ["ivm_start.sh", "/usr/bin/"] COPY ["supervisord.conf", "/etc/supervisor/conf.d/"] COPY ["critical_processes", "/etc/supervisor/"] +RUN apt-get purge -y libyaml-dev \ + && apt-get autoremove -y --purge + FROM $BASE RUN --mount=type=bind,from=base,target=/changes-to-image rsync -axAX --no-D --exclude=/sys --exclude=/proc --exclude=/dev --exclude=resolv.conf /changes-to-image/ / diff --git a/platform/marvell-teralynx/docker-syncd-mrvl-teralynx/supervisord.conf b/platform/marvell-teralynx/docker-syncd-mrvl-teralynx/supervisord.conf index 9d58556e66e..78cf3e395ef 100755 --- a/platform/marvell-teralynx/docker-syncd-mrvl-teralynx/supervisord.conf +++ b/platform/marvell-teralynx/docker-syncd-mrvl-teralynx/supervisord.conf @@ -14,7 +14,7 @@ buffer_size=25 [eventlistener:supervisor-proc-exit-listener] command=/usr/bin/supervisor-proc-exit-listener-rs --container-name syncd -events=PROCESS_STATE_EXITED,PROCESS_STATE_RUNNING +events=PROCESS_STATE_EXITED,PROCESS_STATE_RUNNING,PROCESS_STATE_FATAL autostart=true autorestart=unexpected buffer_size=1024 diff --git a/platform/marvell-teralynx/libsaithrift-dev.dep b/platform/marvell-teralynx/libsaithrift-dev.dep index 6655bf6d0b4..a290b45d35b 100644 --- a/platform/marvell-teralynx/libsaithrift-dev.dep +++ b/platform/marvell-teralynx/libsaithrift-dev.dep @@ -1,6 +1,6 @@ #DPKG FRK SPATH := $($(LIBSAITHRIFT_DEV)_SRC_PATH) -DEP_FILES := $(SONIC_COMMON_FILES_LIST) platform/marvell-teralynx/libsaithrift-dev.mk platform/marvell-teralynx/libsaithrift-dev.dep +DEP_FILES := $(SONIC_COMMON_FILES_LIST) $(PLATFORM_PATH)/libsaithrift-dev.mk $(PLATFORM_PATH)/libsaithrift-dev.dep DEP_FILES += $(SONIC_COMMON_BASE_FILES_LIST) SMDEP_PATHS := $(SPATH) $(SPATH)/test/ptf $(SPATH)/test/saithrift/ctypesgen $(foreach path, $(SMDEP_PATHS), $(eval $(path) :=$(filter-out $(SMDEP_PATHS),$(addprefix $(path)/, $(shell cd $(path) && git ls-files | grep -Ev " " ))))) diff --git a/platform/marvell-teralynx/mrvl-teralynx b/platform/marvell-teralynx/mrvl-teralynx index 53d8dcf6270..405f10e5305 160000 --- a/platform/marvell-teralynx/mrvl-teralynx +++ b/platform/marvell-teralynx/mrvl-teralynx @@ -1 +1 @@ -Subproject commit 53d8dcf6270719e7bdc42619e182015bb2245ac7 +Subproject commit 405f10e5305fc7100dc21783406dc69e25dacfc2 diff --git a/platform/marvell-teralynx/mrvl-teralynx.dep b/platform/marvell-teralynx/mrvl-teralynx.dep index 7e19ecc6331..42773f601db 100644 --- a/platform/marvell-teralynx/mrvl-teralynx.dep +++ b/platform/marvell-teralynx/mrvl-teralynx.dep @@ -7,3 +7,4 @@ $(MRVL_TERALYNX_DEB)_CACHE_MODE := GIT_CONTENT_SHA $(MRVL_TERALYNX_DEB)_DEP_FLAGS := $(SONIC_COMMON_FLAGS_LIST) $(MRVL_TERALYNX_DEB)_DEP_FILES := $(DEP_FILES) $(MRVL_TERALYNX_DEB)_SMDEP_FILES := $(SMDEP_FILES) +$(MRVL_TERALYNX_DEB)_SMDEP_PATHS := $(MPATH) diff --git a/platform/marvell-teralynx/one-image.mk b/platform/marvell-teralynx/one-image.mk index 658d6021243..f0c819fa39d 100755 --- a/platform/marvell-teralynx/one-image.mk +++ b/platform/marvell-teralynx/one-image.mk @@ -10,6 +10,7 @@ $(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(NETBERG_AURORA_715_PLATFORM_MODULE) $(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(SMCI_SSE_T7132S_PLATFORM_MODULE) $(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(WISTRON_PLATFORM_MODULE) $(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(TL10_DBMVTX9180_PLATFORM) +$(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(D64P512T_PLATFORM_MODULE) $(SONIC_ONE_IMAGE)_INSTALLS += $(MRVL_TERALYNX_DRV) $(SONIC_ONE_IMAGE)_INSTALLS += $(MRVL_TERALYNX_DEB) $(SONIC_ONE_IMAGE)_INSTALLS += $(PDDF_PLATFORM_MODULE) diff --git a/platform/marvell-teralynx/or-tools.dep b/platform/marvell-teralynx/or-tools.dep index cca59b9fd9d..67df1e352cb 100644 --- a/platform/marvell-teralynx/or-tools.dep +++ b/platform/marvell-teralynx/or-tools.dep @@ -1,7 +1,7 @@ SPATH := $($(LIBOR_TOOLS)_SRC_PATH) DEP_FILES := $(SONIC_COMMON_FILES_LIST) $(PLATFORM_PATH)/or-tools.mk $(PLATFORM_PATH)/or-tools.dep DEP_FILES += $(SONIC_COMMON_BASE_FILES_LIST) -DEP_FILES += $(shell git ls-files $(SPATH)) +DEP_FILES += $(shell git ls-files -- $(SPATH)) $(LIBOR_TOOLS)_CACHE_MODE := GIT_CONTENT_SHA $(LIBOR_TOOLS)_DEP_FLAGS := $(SONIC_COMMON_FLAGS_LIST) diff --git a/platform/marvell-teralynx/platform-modules-marvell.dep b/platform/marvell-teralynx/platform-modules-marvell.dep new file mode 100644 index 00000000000..256dc7d0aa3 --- /dev/null +++ b/platform/marvell-teralynx/platform-modules-marvell.dep @@ -0,0 +1,17 @@ +SPATH_M := $($(TL10_DBMVTX9180_PLATFORM)_SRC_PATH) +DEP_FILES := $(SONIC_COMMON_FILES_LIST) $(PLATFORM_PATH)/platform-modules-marvell.mk $(PLATFORM_PATH)/platform-modules-marvell.dep +DEP_FILES += $(SONIC_COMMON_BASE_FILES_LIST) +SMDEP_FILES := $(addprefix $(SPATH_M)/,$(shell cd $(SPATH_M) && git ls-files)) + +$(TL10_DBMVTX9180_PLATFORM)_CACHE_MODE := GIT_CONTENT_SHA +$(TL10_DBMVTX9180_PLATFORM)_DEP_FLAGS := $(SONIC_COMMON_FLAGS_LIST) +$(TL10_DBMVTX9180_PLATFORM)_DEP_FILES := $(DEP_FILES) +$(TL10_DBMVTX9180_PLATFORM)_SMDEP_FILES := $(SMDEP_FILES) +$(TL10_DBMVTX9180_PLATFORM)_SMDEP_PATHS := $(SPATH_M) + +# Extra package built with same platform sources +$(D64P512T_PLATFORM_MODULE)_CACHE_MODE := GIT_CONTENT_SHA +$(D64P512T_PLATFORM_MODULE)_DEP_FLAGS := $(SONIC_COMMON_FLAGS_LIST) +$(D64P512T_PLATFORM_MODULE)_DEP_FILES := $(DEP_FILES) +$(D64P512T_PLATFORM_MODULE)_SMDEP_FILES := $(SMDEP_FILES) +$(D64P512T_PLATFORM_MODULE)_SMDEP_PATHS := $(SPATH_M) diff --git a/platform/marvell-teralynx/platform-modules-marvell.mk b/platform/marvell-teralynx/platform-modules-marvell.mk index 43e25690ad2..bdadea368c8 100644 --- a/platform/marvell-teralynx/platform-modules-marvell.mk +++ b/platform/marvell-teralynx/platform-modules-marvell.mk @@ -1,8 +1,10 @@ # Teralynx 10 Platform TL10_DBMVTX9180_VERSION = 1.0 +D64P512T_VERSION = 1.0 export TL10_DBMVTX9180_VERSION +export D64P512T_VERSION TL10_DBMVTX9180_PLATFORM = sonic-platform-marvell-dbmvtx9180_$(TL10_DBMVTX9180_VERSION)_$(CONFIGURED_ARCH).deb $(TL10_DBMVTX9180_PLATFORM)_SRC_PATH = $(PLATFORM_PATH)/sonic-platform-marvell-teralynx @@ -11,3 +13,7 @@ $(TL10_DBMVTX9180_PLATFORM)_PLATFORM = x86_64-marvell_dbmvtx9180-r0 SONIC_DPKG_DEBS += $(TL10_DBMVTX9180_PLATFORM) +D64P512T_PLATFORM_MODULE = sonic-platform-marvell-d64p512t_$(D64P512T_VERSION)_$(CONFIGURED_ARCH).deb +$(D64P512T_PLATFORM_MODULE)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON) $(PDDF_PLATFORM_MODULE_SYM) +$(D64P512T_PLATFORM_MODULE)_PLATFORM = x86_64-marvell_d64p512t-r0 +$(eval $(call add_extra_package,$(TL10_DBMVTX9180_PLATFORM),$(D64P512T_PLATFORM_MODULE))) \ No newline at end of file diff --git a/platform/marvell-teralynx/platform-modules-wistron.dep b/platform/marvell-teralynx/platform-modules-wistron.dep new file mode 100644 index 00000000000..57ed40916bd --- /dev/null +++ b/platform/marvell-teralynx/platform-modules-wistron.dep @@ -0,0 +1,13 @@ +SPATH_W := $($(WISTRON_SW_TO3200K_PLATFORM_MODULE)_SRC_PATH) +DEP_FILES := $(SONIC_COMMON_FILES_LIST) $(PLATFORM_PATH)/platform-modules-wistron.mk $(PLATFORM_PATH)/platform-modules-wistron.dep +DEP_FILES += $(SONIC_COMMON_BASE_FILES_LIST) +DEP_FILES += $(shell git ls-files -- $(SPATH_W)) + +$(WISTRON_SW_TO3200K_PLATFORM_MODULE)_CACHE_MODE := GIT_CONTENT_SHA +$(WISTRON_SW_TO3200K_PLATFORM_MODULE)_DEP_FLAGS := $(SONIC_COMMON_FLAGS_LIST) +$(WISTRON_SW_TO3200K_PLATFORM_MODULE)_DEP_FILES := $(DEP_FILES) + +# Derived from same tree as TO3200K +$(WISTRON_6512_32R_PLATFORM_MODULE)_CACHE_MODE := GIT_CONTENT_SHA +$(WISTRON_6512_32R_PLATFORM_MODULE)_DEP_FLAGS := $(SONIC_COMMON_FLAGS_LIST) +$(WISTRON_6512_32R_PLATFORM_MODULE)_DEP_FILES := $(DEP_FILES) diff --git a/platform/marvell-teralynx/platform-modules-wistron.mk b/platform/marvell-teralynx/platform-modules-wistron.mk index ed0c8922c1b..edae0102cbb 100644 --- a/platform/marvell-teralynx/platform-modules-wistron.mk +++ b/platform/marvell-teralynx/platform-modules-wistron.mk @@ -11,9 +11,9 @@ $(WISTRON_SW_TO3200K_PLATFORM_MODULE)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADER $(WISTRON_SW_TO3200K_PLATFORM_MODULE)_PLATFORM = x86_64-wistron_sw_to3200k-r0 WISTRON_6512_32R_PLATFORM_MODULE = sonic-platform-wistron-6512-32r_$(WISTRON_6512_32R_PLATFORM_MODULE_VERSION)_$(CONFIGURED_ARCH).deb -$(WISTRON_6512_32R_PLATFORM_MODULE)_SRC_PATH = $(PLATFORM_PATH)/sonic-platform-modules-wistron $(WISTRON_6512_32R_PLATFORM_MODULE)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON) $(WISTRON_6512_32R_PLATFORM_MODULE)_PLATFORM = x86_64-wistron_6512_32r-r0 +$(eval $(call add_derived_package,$(WISTRON_SW_TO3200K_PLATFORM_MODULE),$(WISTRON_6512_32R_PLATFORM_MODULE))) WISTRON_PLATFORM_MODULE = $(WISTRON_SW_TO3200K_PLATFORM_MODULE) $(WISTRON_6512_32R_PLATFORM_MODULE) -SONIC_DPKG_DEBS += $(WISTRON_PLATFORM_MODULE) +SONIC_DPKG_DEBS += $(WISTRON_SW_TO3200K_PLATFORM_MODULE) diff --git a/platform/marvell-teralynx/python-saithrift.dep b/platform/marvell-teralynx/python-saithrift.dep new file mode 100644 index 00000000000..fba3bc8ccfa --- /dev/null +++ b/platform/marvell-teralynx/python-saithrift.dep @@ -0,0 +1,8 @@ +SPATH := $($(PYTHON_SAITHRIFT_MRVL_TERALYNX)_SRC_PATH) +DEP_FILES := $(SONIC_COMMON_FILES_LIST) $(PLATFORM_PATH)/python-saithrift.mk $(PLATFORM_PATH)/python-saithrift.dep +DEP_FILES += $(SONIC_COMMON_BASE_FILES_LIST) +DEP_FILES += $(shell git ls-files -- $(SPATH)) + +$(PYTHON_SAITHRIFT_MRVL_TERALYNX)_CACHE_MODE := GIT_CONTENT_SHA +$(PYTHON_SAITHRIFT_MRVL_TERALYNX)_DEP_FLAGS := $(SONIC_COMMON_FLAGS_LIST) +$(PYTHON_SAITHRIFT_MRVL_TERALYNX)_DEP_FILES := $(DEP_FILES) diff --git a/platform/marvell-teralynx/rules.dep b/platform/marvell-teralynx/rules.dep new file mode 100644 index 00000000000..8508aeaef7d --- /dev/null +++ b/platform/marvell-teralynx/rules.dep @@ -0,0 +1,9 @@ +include $(PLATFORM_PATH)/docker-syncd-mrvl-teralynx.dep +include $(PLATFORM_PATH)/docker-syncd-mrvl-teralynx-rpc.dep +include $(PLATFORM_PATH)/docker-saiserver-mrvl-teralynx.dep +include $(PLATFORM_PATH)/mrvl-teralynx.dep +include $(PLATFORM_PATH)/libsaithrift-dev.dep +include $(PLATFORM_PATH)/or-tools.dep +include $(PLATFORM_PATH)/platform-modules-wistron.dep +include $(PLATFORM_PATH)/platform-modules-marvell.dep +include $(PLATFORM_PATH)/python-saithrift.dep diff --git a/platform/marvell-teralynx/sai.mk b/platform/marvell-teralynx/sai.mk index 272ddc269a3..055eb2810c0 100755 --- a/platform/marvell-teralynx/sai.mk +++ b/platform/marvell-teralynx/sai.mk @@ -1,6 +1,7 @@ # MRVL_TERALYNX SAI -MRVL_TERALYNX_SAI_ONLINE = https://github.com/Marvell-switching/sonic-marvell-teralynx-binaries/raw/main/debian/master +SAI_RELEASE=1.18.1-1 +MRVL_TERALYNX_SAI_ONLINE = https://github.com/Marvell-switching/sonic-marvell-teralynx-binaries/raw/main/debian/master/$(SAI_RELEASE) MRVL_TERALYNX_LIBSAI = isai.deb MRVL_TERALYNX_HSAI = saihdr.deb diff --git a/platform/marvell-teralynx/sonic-platform-marvell-teralynx b/platform/marvell-teralynx/sonic-platform-marvell-teralynx index b5638dfe558..1cd0b6f30a7 160000 --- a/platform/marvell-teralynx/sonic-platform-marvell-teralynx +++ b/platform/marvell-teralynx/sonic-platform-marvell-teralynx @@ -1 +1 @@ -Subproject commit b5638dfe5587cb2a5c37f78cf99d89a2a081be23 +Subproject commit 1cd0b6f30a7289d50bd19b1440974aff9afb529b diff --git a/platform/mellanox/asic_table.j2 b/platform/mellanox/asic_table.j2 index 0c9b85a0de0..f9abe170bd6 100644 --- a/platform/mellanox/asic_table.j2 +++ b/platform/mellanox/asic_table.j2 @@ -43,8 +43,8 @@ 'x86_64-mlnx_msn4600c-r0':'MELLANOX-SPECTRUM-3', 'x86_64-mlnx_msn4600-r0':'MELLANOX-SPECTRUM-3', 'x86_64-nvidia_sn4280_simx-r0':'MELLANOX-SPECTRUM-3', - 'x86_64-nvidia_sn4800-r0':'MELLANOX-SPECTRUM-3', - 'x86_64-nvidia_sn4800_simx-r0':'MELLANOX-SPECTRUM-3', + 'x86_64-nvidia_sn4800-r0':'MELLANOX-SPECTRUM-3', + 'x86_64-nvidia_sn4800_simx-r0':'MELLANOX-SPECTRUM-3', 'x86_64-nvidia_sn2201-r0':'MELLANOX-SPECTRUM', 'x86_64-nvidia_sn5400-r0':'MELLANOX-SPECTRUM-4', 'x86_64-nvidia_sn5600-r0':'MELLANOX-SPECTRUM-4', @@ -56,6 +56,8 @@ 'x86_64-nvidia_sn5640_simx-r0':'MELLANOX-SPECTRUM-5', 'x86_64-nvidia_sn6600_simx-r0':'MELLANOX-SPECTRUM-6', 'x86_64-nvidia_sn6600_ld-r0':'MELLANOX-SPECTRUM-6', + 'x86_64-nvidia_sn6810_ld-r0':'MELLANOX-SPECTRUM-6', + 'x86_64-nvidia_sn6810_ld_simx-r0':'MELLANOX-SPECTRUM-6', 'vs-platform':'vs' } %} @@ -114,7 +116,9 @@ "cell_size": "192", "pipeline_latency": "19", "mac_phy_delay": "0.8", - "peer_response_time": "3.8" + "peer_response_time": "3.8", + "port_reserved_shp": "20", + "port_max_shp": "6144" }, "OP": "SET" } diff --git a/platform/mellanox/docker-saiserver-mlnx.mk b/platform/mellanox/docker-saiserver-mlnx.mk index f0ebfe22533..65be8e62414 100644 --- a/platform/mellanox/docker-saiserver-mlnx.mk +++ b/platform/mellanox/docker-saiserver-mlnx.mk @@ -1,6 +1,7 @@ # -# Copyright (c) 2018-2022 NVIDIA CORPORATION & AFFILIATES. -# Apache-2.0 +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2018-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -20,10 +21,10 @@ DOCKER_SAISERVER_MLNX = docker-saiserver$(SAITHRIFT_VER)-mlnx.gz $(DOCKER_SAISERVER_MLNX)_PATH = $(PLATFORM_PATH)/docker-saiserver-mlnx $(DOCKER_SAISERVER_MLNX)_DEPENDS += $(SAISERVER) $(PYTHON_SDK_API) $(DOCKER_SAISERVER_MLNX)_PYTHON_DEBS += $(MLNX_SFPD) -$(DOCKER_SAISERVER_MLNX)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_BOOKWORM) +$(DOCKER_SAISERVER_MLNX)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_TRIXIE) SONIC_DOCKER_IMAGES += $(DOCKER_SAISERVER_MLNX) $(DOCKER_SAISERVER_MLNX)_CONTAINER_NAME = saiserver$(SAITHRIFT_VER) -SONIC_BOOKWORM_DOCKERS += $(DOCKER_SAISERVER_MLNX) +SONIC_TRIXIE_DOCKERS += $(DOCKER_SAISERVER_MLNX) $(DOCKER_SAISERVER_MLNX)_RUN_OPT += --privileged -t $(DOCKER_SAISERVER_MLNX)_RUN_OPT += -v /host/machine.conf:/etc/machine.conf diff --git a/platform/mellanox/docker-saiserver-mlnx/Dockerfile.j2 b/platform/mellanox/docker-saiserver-mlnx/Dockerfile.j2 index f4ea421fda9..33f49872f02 100644 --- a/platform/mellanox/docker-saiserver-mlnx/Dockerfile.j2 +++ b/platform/mellanox/docker-saiserver-mlnx/Dockerfile.j2 @@ -16,7 +16,7 @@ ## limitations under the License. ## {% from "dockers/dockerfile-macros.j2" import install_debian_packages, rsync_from_builder_stage %} -ARG BASE=docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} +ARG BASE=docker-config-engine-trixie-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} FROM $BASE AS base @@ -29,7 +29,7 @@ ENV DEBIAN_FRONTEND=noninteractive RUN apt-get update \ && apt-get -y install \ gdb \ - libboost-atomic1.74.0 + libboost-atomic1.88.0 COPY \ {% for deb in docker_saiserver_mlnx_debs.split(' ') -%} @@ -43,7 +43,7 @@ python-debs/{{ deb }}{{' '}} {%- endfor -%} debs/ -RUN apt-get install -y --no-install-recommends libxml2 iptables libbsd0 protobuf-c-compiler protobuf-compiler python3-protobuf libprotobuf-c1 python3-future libnet1 pkg-config asciidoc xmlto +RUN apt-get install -y --no-install-recommends libxml2 iptables libbsd0 protobuf-c-compiler protobuf-compiler python3-protobuf libprotobuf-c1 libnet1 pkg-config asciidoc xmlto {{ install_debian_packages(docker_saiserver_mlnx_debs.split(' ')) }} diff --git a/platform/mellanox/docker-syncd-mlnx-rpc.mk b/platform/mellanox/docker-syncd-mlnx-rpc.mk index 718e4378950..e79b5f95550 100644 --- a/platform/mellanox/docker-syncd-mlnx-rpc.mk +++ b/platform/mellanox/docker-syncd-mlnx-rpc.mk @@ -1,6 +1,7 @@ # -# Copyright (c) 2017-2021 NVIDIA CORPORATION & AFFILIATES. -# Apache-2.0 +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2017-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -30,7 +31,7 @@ endif $(DOCKER_SYNCD_MLNX_RPC)_PYTHON_DEBS += $(MLNX_SFPD) $(DOCKER_SYNCD_MLNX_RPC)_LOAD_DOCKERS += $(DOCKER_SYNCD_BASE) SONIC_DOCKER_IMAGES += $(DOCKER_SYNCD_MLNX_RPC) -SONIC_BOOKWORM_DOCKERS += $(DOCKER_SYNCD_MLNX_RPC) +SONIC_TRIXIE_DOCKERS += $(DOCKER_SYNCD_MLNX_RPC) ifeq ($(ENABLE_SYNCD_RPC),y) SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_SYNCD_MLNX_RPC) endif @@ -41,4 +42,3 @@ $(DOCKER_SYNCD_MLNX_RPC)_PACKAGE_NAME = syncd $(DOCKER_SYNCD_MLNX_RPC)_RUN_OPT += --privileged -t $(DOCKER_SYNCD_MLNX_RPC)_RUN_OPT += -v /host/machine.conf:/etc/machine.conf $(DOCKER_SYNCD_MLNX_RPC)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro -$(DOCKER_SYNCD_MLNX_RPC)_RUN_OPT += -v /host/warmboot:/var/warmboot diff --git a/platform/mellanox/docker-syncd-mlnx-rpc/Dockerfile.j2 b/platform/mellanox/docker-syncd-mlnx-rpc/Dockerfile.j2 index 65533008f5e..023c35d27be 100644 --- a/platform/mellanox/docker-syncd-mlnx-rpc/Dockerfile.j2 +++ b/platform/mellanox/docker-syncd-mlnx-rpc/Dockerfile.j2 @@ -38,20 +38,18 @@ RUN apt-get update \ cmake \ libqt5core5a \ libqt5network5 \ - libboost-atomic1.74.0 \ + libboost-atomic1.88.0 \ python3-pip \ python3-dev \ python-is-python3 \ python3-scapy \ libnanomsg5 \ libnanomsg-dev \ - libthrift-0.17.0 \ + libthrift-0.19.0t64 \ thrift-compiler \ python3-thrift \ pciutils -RUN pip3 install --upgrade pip - {% if docker_syncd_mlnx_rpc_debs.strip() -%} # Copy locally-built Debian package dependencies {{ copy_files("debs/", docker_syncd_mlnx_rpc_debs.split(' '), "/debs/") }} @@ -77,7 +75,7 @@ RUN pip3 install cffi==1.16.0 \ && pip3 install nnpy \ && mkdir -p /opt \ && cd /opt \ - && wget https://raw.githubusercontent.com/p4lang/ptf/master/ptf_nn/ptf_nn_agent.py \ + && wget https://raw.githubusercontent.com/p4lang/ptf/23ebe7237f3c284032bda02fbd1f4a98f1bc12f4/ptf_nn/ptf_nn_agent.py \ && apt-get clean -y; apt-get autoclean -y; apt-get autoremove -y \ && rm -rf /root/deps diff --git a/platform/mellanox/docker-syncd-mlnx.mk b/platform/mellanox/docker-syncd-mlnx.mk index 3d784823d6b..cd8fe5e06be 100644 --- a/platform/mellanox/docker-syncd-mlnx.mk +++ b/platform/mellanox/docker-syncd-mlnx.mk @@ -1,7 +1,7 @@ # # SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES -# Copyright (c) 2016-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved. -# Apache-2.0 +# Copyright (c) 2016-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -18,7 +18,7 @@ # docker image for mlnx syncd DOCKER_SYNCD_PLATFORM_CODE = mlnx -include $(PLATFORM_PATH)/../template/docker-syncd-bookworm.mk +include $(PLATFORM_PATH)/../template/docker-syncd-trixie.mk $(DOCKER_SYNCD_BASE)_DEPENDS += $(SYNCD) $(PYTHON_SDK_API) $(MFT) $(MFT_FWTRACE_CFG) $(IPROUTE2_MLNX) @@ -40,4 +40,3 @@ endif $(DOCKER_SYNCD_BASE)_VERSION = 1.0.0 $(DOCKER_SYNCD_BASE)_PACKAGE_NAME = syncd -$(DOCKER_SYNCD_BASE)_RUN_OPT += -v /host/warmboot:/var/warmboot diff --git a/platform/mellanox/docker-syncd-mlnx/Dockerfile.j2 b/platform/mellanox/docker-syncd-mlnx/Dockerfile.j2 index c62d5f83f3f..da8fb12232e 100755 --- a/platform/mellanox/docker-syncd-mlnx/Dockerfile.j2 +++ b/platform/mellanox/docker-syncd-mlnx/Dockerfile.j2 @@ -17,7 +17,7 @@ ## {% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files, rsync_from_builder_stage %} -ARG BASE=docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} +ARG BASE=docker-config-engine-trixie-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} FROM $BASE AS base @@ -41,9 +41,6 @@ RUN apt-get update && \ pciutils \ linuxptp -RUN pip3 install --upgrade pip -RUN apt-get purge -y python-pip - {% if docker_syncd_mlnx_debs.strip() -%} # Copy locally-built Debian package dependencies {{ copy_files("debs/", docker_syncd_mlnx_debs.split(' '), "/debs/") }} diff --git a/platform/mellanox/docker-syncd-mlnx/phcsync.sh b/platform/mellanox/docker-syncd-mlnx/phcsync.sh index 587dbbd55bf..b84c11b967d 100755 --- a/platform/mellanox/docker-syncd-mlnx/phcsync.sh +++ b/platform/mellanox/docker-syncd-mlnx/phcsync.sh @@ -60,7 +60,8 @@ while :; do if [[ "$clock_name" != "mlx5_ptp" ]]; then # set CLOCK_REALTIME - "$PHC_CTL" "$dev" set 2>/dev/null + # Keep successful syncs silent to avoid rsyslogd ratelimit memory issue due to PID churn. + "$PHC_CTL" -q -Q "$dev" set >/dev/null PHC_CTL_EXIT_CODE=$? if [[ $PHC_CTL_EXIT_CODE -ne 0 ]]; then echo "Error: Failed to sync clock for $dev (phc_ctl exit code: $PHC_CTL_EXIT_CODE)" >&2 diff --git a/platform/mellanox/docker-syncd-mlnx/supervisord.conf.j2 b/platform/mellanox/docker-syncd-mlnx/supervisord.conf.j2 index c67edd6c58a..b3df9906140 100644 --- a/platform/mellanox/docker-syncd-mlnx/supervisord.conf.j2 +++ b/platform/mellanox/docker-syncd-mlnx/supervisord.conf.j2 @@ -15,7 +15,7 @@ buffer_size=1024 [eventlistener:supervisor-proc-exit-listener] command=/usr/bin/supervisor-proc-exit-listener-rs --container-name syncd -events=PROCESS_STATE_EXITED,PROCESS_STATE_RUNNING +events=PROCESS_STATE_EXITED,PROCESS_STATE_RUNNING,PROCESS_STATE_FATAL autostart=true autorestart=unexpected buffer_size=1024 diff --git a/platform/mellanox/files/mlnx-fw-manager.service b/platform/mellanox/files/mlnx-fw-manager.service index a97d240edc3..fa0d6cf38a8 100644 --- a/platform/mellanox/files/mlnx-fw-manager.service +++ b/platform/mellanox/files/mlnx-fw-manager.service @@ -22,9 +22,8 @@ Description=Mellanox Firmware Manager Service [Service] Type=oneshot RemainAfterExit=yes -ExecStartPre=/usr/bin/mst start --with_i2cdev +ExecCondition=/bin/grep -qv '\\' /proc/cmdline ExecStart=/usr/local/bin/mlnx-fw-manager --clear-semaphore --verbose -ExecStop=/usr/bin/mst stop TimeoutSec=300 User=root diff --git a/platform/mellanox/fw-manager/fw-manager.mk b/platform/mellanox/fw-manager/fw-manager.mk deleted file mode 100644 index a18b92a6ab5..00000000000 --- a/platform/mellanox/fw-manager/fw-manager.mk +++ /dev/null @@ -1,26 +0,0 @@ -# -# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES -# Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. -# SPDX-License-Identifier: Apache-2.0 -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# - -# Mellanox Firmware Manager package - -MELLANOX_FW_MANAGER = mellanox_fw_manager-1.0.0-py3-none-any.whl -$(MELLANOX_FW_MANAGER)_SRC_PATH = $(PLATFORM_PATH)/fw-manager -$(MELLANOX_FW_MANAGER)_PYTHON_VERSION = 3 -SONIC_PYTHON_WHEELS += $(MELLANOX_FW_MANAGER) - -export mellanox_fw_manager_py3_wheel_path="$(addprefix $(PYTHON_WHEELS_PATH)/,$(MELLANOX_FW_MANAGER))" diff --git a/platform/mellanox/fw-manager/mellanox_fw_manager/main.py b/platform/mellanox/fw-manager/mellanox_fw_manager/main.py deleted file mode 100644 index 75828ce34ef..00000000000 --- a/platform/mellanox/fw-manager/mellanox_fw_manager/main.py +++ /dev/null @@ -1,343 +0,0 @@ -#!/usr/bin/env python3 -# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES -# Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. -# SPDX-License-Identifier: Apache-2.0 -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# - -""" -Command Line Interface for Mellanox Firmware Manager - -Provides a command-line interface for firmware upgrade operations. -""" - -import sys -import logging -import logging.handlers -import fcntl -import subprocess -from contextlib import contextmanager -import click -from .fw_manager import create_firmware_manager, EXIT_SUCCESS, EXIT_FAILURE, FW_UPGRADE_IS_REQUIRED, FirmwareManagerError, FirmwareUpgradeError, FirmwareUpgradePartialError -from .firmware_coordinator import FirmwareCoordinator -from .platform_utils import run_command - -logger = None - - -def setup_logging(verbose: bool = False, nosyslog: bool = False): - """Setup global logging configuration with syslog.""" - global logger - - level = logging.DEBUG if verbose else logging.INFO - - logger = logging.getLogger() - logger.setLevel(level) - - logger.handlers.clear() - - if not nosyslog: - syslog_handler = logging.handlers.SysLogHandler(address='/dev/log') - syslog_handler.setLevel(level) - - formatter = logging.Formatter('mellanox-fw-manager[%(process)d]: %(levelname)s - %(message)s') - syslog_handler.setFormatter(formatter) - - logger.addHandler(syslog_handler) - - if verbose or nosyslog: - console_handler = logging.StreamHandler() - console_handler.setLevel(level) - console_formatter = logging.Formatter('%(asctime)s - %(name)s - %(levelname)s - %(message)s') - console_handler.setFormatter(console_formatter) - logger.addHandler(console_handler) - - -def _exit_if_qemu() -> None: - """ - Exit if running on QEMU/SimX platform (matches shell script ExitIfQEMU). - - Raises: - SystemExit: If QEMU platform is detected - """ - try: - cmd = ['lspci', '-vvv'] - result = run_command(cmd, logger=logger, capture_output=True, text=True) - if result.returncode == 0 and 'SimX' in result.stdout: - print("No FW upgrade for SimX platform") - sys.exit(EXIT_SUCCESS) - except Exception as e: - logger.warning(f"Failed to check for QEMU platform: {e}") - - -@contextmanager -def _lock_state_change(): - """ - Context manager for file locking (matches shell script LockStateChange/UnlockStateChange). - """ - lock_file = "/tmp/mlxfwmanager-lock" - lock_fd = None - - try: - logger.info(f"Locking {lock_file} from CLI") - lock_fd = open(lock_file, 'w') - fcntl.flock(lock_fd.fileno(), fcntl.LOCK_EX) - logger.info(f"Locked {lock_file} from CLI") - yield lock_fd - except Exception as e: - logger.error(f"Failed to acquire lock: {e}") - raise FirmwareManagerError(f"Failed to acquire lock: {e}") - finally: - if lock_fd: - try: - logger.info(f"Unlocking {lock_file} from CLI") - fcntl.flock(lock_fd.fileno(), fcntl.LOCK_UN) - lock_fd.close() - except Exception as e: - logger.warning(f"Failed to unlock: {e}") - - -def handle_status(asic_id_arg: str, verbose: bool, upgrade: bool) -> int: - """ - Handle firmware status check - reports if firmware version matches. - - Args: - asic_id_arg: ASIC ID, "all", or "__flag__" (when used as flag) - verbose: Enable verbose logging - upgrade: Use firmware from next SONiC image - - Returns: - Exit code - """ - try: - fw_coordinator = FirmwareCoordinator(verbose=verbose, from_image=upgrade) - num_asics = fw_coordinator.get_asic_count() - - # Handle flag mode for single-ASIC systems - if asic_id_arg == '__flag__': - if num_asics == 1: - asic_id_arg = '0' - else: - print(f"Error: Multi-ASIC system detected ({num_asics} ASICs).") - print("Usage: mlnx-fw-manager --status ") - print("Example: mlnx-fw-manager --status all") - return EXIT_FAILURE - - # Determine which ASICs to check - if asic_id_arg.lower() == 'all': - managers_to_check = fw_coordinator.managers - print(f"Firmware Status Report ({num_asics} ASIC(s)):") - else: - try: - asic_id = int(asic_id_arg) - if asic_id >= num_asics: - print(f"Error: ASIC {asic_id} not found. System has {num_asics} ASIC(s).") - return EXIT_FAILURE - managers_to_check = [fw_coordinator.managers[asic_id]] - print(f"Firmware Status Report (ASIC {asic_id}):") - except ValueError: - print(f"Error: Invalid ASIC ID '{asic_id_arg}'. Use a number or 'all'.") - return EXIT_FAILURE - - upgrade_needed_asics = [] - up_to_date_asics = [] - error_asics = [] - - for manager in managers_to_check: - try: - is_needed = manager.is_upgrade_required() - if is_needed: - upgrade_needed_asics.append(manager.asic_index) - print(f"ASIC {manager.asic_index}: Upgrade needed") - else: - up_to_date_asics.append(manager.asic_index) - print(f"ASIC {manager.asic_index}: Up to date") - except Exception as e: - error_asics.append(manager.asic_index) - print(f"ASIC {manager.asic_index}: Error checking status - {e}") - - print(f"Summary: {len(up_to_date_asics)} up to date, " - f"{len(upgrade_needed_asics)} need upgrade, " - f"{len(error_asics)} errors") - - if upgrade_needed_asics or error_asics: - return FW_UPGRADE_IS_REQUIRED - return EXIT_SUCCESS - - except Exception as e: - print(f"Status check failed: {e}") - return EXIT_FAILURE - - -def handle_reset(verbose: bool) -> int: - """ - Handle firmware configuration reset. - - Args: - verbose: Enable verbose logging - - Returns: - Exit code - """ - try: - fw_coordinator = FirmwareCoordinator(verbose=verbose) - fw_coordinator.reset_firmware_config() - print("Firmware configuration reset completed successfully.") - return EXIT_SUCCESS - except Exception as e: - print(f"Firmware reset failed: {e}") - return EXIT_FAILURE - - -def handle_dry_run(verbose: bool, upgrade: bool) -> int: - """ - Handle dry-run (check if firmware upgrade is required). - - Args: - verbose: Enable verbose logging - upgrade: Use firmware from next SONiC image - - Returns: - Exit code - """ - try: - fw_coordinator = FirmwareCoordinator(verbose=verbose, from_image=upgrade) - if fw_coordinator.check_upgrade_required(): - print("Firmware upgrade is required.") - logger.info(f"Dry-run check: upgrade required, exiting with {FW_UPGRADE_IS_REQUIRED}") - return FW_UPGRADE_IS_REQUIRED - else: - print("Firmware is up to date.") - logger.info(f"Dry-run check: up to date, exiting with {EXIT_SUCCESS}") - return EXIT_SUCCESS - except Exception as e: - print(f"Firmware check failed: {e}") - logger.error(f"Dry-run check failed, exiting with {EXIT_FAILURE}") - return EXIT_FAILURE - - -def handle_upgrade(verbose: bool, upgrade: bool, clear_semaphore: bool) -> int: - """ - Handle firmware upgrade operation. - - Args: - verbose: Enable verbose logging - upgrade: Use firmware from next SONiC image - clear_semaphore: Clear hardware semaphore before upgrade - - Returns: - Exit code - """ - try: - fw_coordinator = FirmwareCoordinator( - verbose=verbose, - from_image=upgrade, - clear_semaphore=clear_semaphore - ) - - if not fw_coordinator.check_upgrade_required(): - print("Firmware is up to date.") - logger.info(f"Upgrade check: up to date, exiting with {EXIT_SUCCESS}") - return EXIT_SUCCESS - else: - fw_coordinator.upgrade_firmware() - print("Firmware upgrade completed successfully.") - logger.info(f"Upgrade completed successfully, exiting with {EXIT_SUCCESS}") - return EXIT_SUCCESS - - except FirmwareUpgradeError as e: - print(f"Firmware upgrade failed: {e}") - return EXIT_FAILURE - except FirmwareUpgradePartialError as e: - print(f"Firmware upgrade partially failed: {e}") - return EXIT_SUCCESS - except Exception as e: - print(f"Firmware upgrade failed: {e}") - return EXIT_FAILURE - - -@click.command(context_settings={'help_option_names': ['-h', '--help'], 'max_content_width': 120}) -@click.option('-u', '--upgrade', is_flag=True, - help='Upgrade ASIC firmware using next boot image (useful after SONiC-To-SONiC update)') -@click.option('-v', '--verbose', is_flag=True, - help='Verbose mode (enabled when -u|--upgrade)') -@click.option('-d', '--dry-run', is_flag=True, - help='Compare the FW versions without installation. Return code "0" means the FW is up-to-date, return code "10" means an upgrade is required, otherwise an error is detected.') -@click.option('-c', '--clear-semaphore', is_flag=True, - help='Clear hw semaphore before firmware upgrade') -@click.option('-r', '--reset', is_flag=True, - help='Reset firmware configuration (NVIDIA BlueField platform only)') -@click.option('--nosyslog', is_flag=True, - help='Disable syslog and log to console only') -@click.option('--status', 'status', type=str, default=None, is_flag=False, flag_value='__flag__', metavar='[ASIC_ID|all]', - help='Show firmware version status. Single-ASIC: use as flag. Multi-ASIC: specify ASIC ID or "all".') -def main(upgrade, verbose, dry_run, clear_semaphore, reset, nosyslog, status): - """ - Mellanox Firmware Manager - - Usage: ./mlnx-fw-upgrade [OPTIONS] - - OPTIONS: - -u, --upgrade Upgrade ASIC firmware using next boot image (useful after SONiC-To-SONiC update) - -v, --verbose Verbose mode (enabled when -u|--upgrade) - -d, --dry-run Compare the FW versions without installation. Return code "0" means the FW is up-to-date, return code "10" means an upgrade is required, otherwise an error is detected. - -c, --clear-semaphore Clear hw semaphore before firmware upgrade - -r, --reset Reset firmware configuration (NVIDIA BlueField platform only) - --status [ASIC_ID|all] Show firmware version status - Single-ASIC: use as flag (no argument) - Multi-ASIC: specify ASIC ID or "all" - --nosyslog Disable syslog and log to console only - -h, --help Print help - - Examples: - ./mlnx-fw-upgrade --verbose - ./mlnx-fw-upgrade --upgrade - ./mlnx-fw-upgrade --reset - ./mlnx-fw-upgrade --clear-semaphore --upgrade - - # Single-ASIC system: - ./mlnx-fw-upgrade --status # Check firmware status - - # Multi-ASIC system: - ./mlnx-fw-upgrade --status all # Check all ASICs - ./mlnx-fw-upgrade --status 0 # Check ASIC 0 - ./mlnx-fw-upgrade --status 0 --upgrade # Check ASIC 0 against next image - - ./mlnx-fw-upgrade --help - """ - setup_logging(verbose, nosyslog) - - logger.info("Mellanox Firmware Manager started") - - _exit_if_qemu() - - if status is not None: - exit_code = handle_status(status, verbose, upgrade) - logger.info(f"Mellanox Firmware Manager finished with exit code {exit_code}") - sys.exit(exit_code) - - with _lock_state_change(): - if reset: - exit_code = handle_reset(verbose) - elif dry_run: - exit_code = handle_dry_run(verbose, upgrade) - else: - exit_code = handle_upgrade(verbose, upgrade, clear_semaphore) - - logger.info(f"Mellanox Firmware Manager finished with exit code {exit_code}") - sys.exit(exit_code) - - -if __name__ == '__main__': - main() diff --git a/platform/mellanox/fw-manager/mellanox_fw_manager/spectrum_manager.py b/platform/mellanox/fw-manager/mellanox_fw_manager/spectrum_manager.py deleted file mode 100644 index 0dc01948cba..00000000000 --- a/platform/mellanox/fw-manager/mellanox_fw_manager/spectrum_manager.py +++ /dev/null @@ -1,102 +0,0 @@ -#!/usr/bin/env python3 -# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES -# Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. -# SPDX-License-Identifier: Apache-2.0 -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# - -""" -Spectrum ASIC firmware manager implementation. - -Handles firmware operations specific to Spectrum ASICs using mlxfwmanager. -""" - -import subprocess -from typing import Dict, Optional -from .firmware_base import FirmwareManagerBase, FW_ALREADY_UPDATED_FAILURE - - -class SpectrumFirmwareManager(FirmwareManagerBase): - """Firmware manager for Spectrum ASICs.""" - - # PCI ID to ASIC type mapping for Spectrum devices - ASIC_TYPE_MAP = { - '15b3:cb84': 'SPC', - '15b3:cf6c': 'SPC2', - '15b3:cf70': 'SPC3', - '15b3:cf80': 'SPC4', - '15b3:cf82': 'SPC5', - } - - @classmethod - def get_asic_type_map(cls) -> Dict[str, str]: - """ - Get the PCI ID to ASIC type mapping for Spectrum devices. - - Returns: - Dictionary mapping PCI IDs to ASIC types - """ - return cls.ASIC_TYPE_MAP - - def _get_mst_device_type(self) -> str: - """Get MST device type for Spectrum ASICs.""" - return "Spectrum" - - def _get_available_firmware_version(self, psid: str) -> Optional[str]: - """Get available firmware version for Spectrum ASICs using mlxfwmanager.""" - try: - cmd = ['mlxfwmanager', '--list-content', '-i', self.fw_file, '-d', self.pci_id] - result = self._run_command(cmd, capture_output=True, text=True) - if result.returncode != 0: - self.logger.error(f"Failed to get available firmware version for Spectrum ASICs using mlxfwmanager: {result.returncode}") - return None - - lines = result.stdout.strip().split('\n') - for line in lines: - if psid in line: - parts = line.split() - if len(parts) >= 4: - return parts[3] - - self.logger.error(f"No firmware version found for PSID {psid} in mlxfwmanager output") - return None - except Exception as e: - self.logger.error(f"Failed to get available firmware version for Spectrum ASICs using mlxfwmanager: {e}") - return None - - def run_firmware_update(self) -> bool: - """Run the actual firmware update command for Spectrum ASICs.""" - try: - cmd = ['mlxfwmanager', '-u', '-f', '-y', '-d', self.pci_id, '-i', self.fw_file] - env = self._get_env() - - result = self._run_command(cmd, env=env, capture_output=True, text=True) - - if result.returncode == FW_ALREADY_UPDATED_FAILURE: - self.logger.info("FW reactivation is required. Reactivating and updating FW ...") - reactivate_cmd = ['flint', '-d', self.pci_id, 'ir'] - reactivate_result = self._run_command(reactivate_cmd, capture_output=True, text=True) - if reactivate_result.returncode != 0: - self.logger.warning(f"FW reactivation failed with return code {reactivate_result.returncode}: {reactivate_result.stderr}") - - result = self._run_command(cmd, env=env, capture_output=True, text=True) - - if result.returncode != 0: - self.logger.error(f"Failed to update firmware for Spectrum ASICs with return code {result.returncode}: {result.stderr}") - return False - - return True - except Exception as e: - self.logger.error(f"Failed to run firmware update for Spectrum ASICs: {e}") - return False diff --git a/platform/mellanox/fw-manager/pytest.ini b/platform/mellanox/fw-manager/pytest.ini deleted file mode 100644 index cf08b294476..00000000000 --- a/platform/mellanox/fw-manager/pytest.ini +++ /dev/null @@ -1,35 +0,0 @@ -# -# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES -# Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. -# SPDX-License-Identifier: Apache-2.0 -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# - -[pytest] -testpaths = tests -python_files = test_*.py -python_classes = Test* -python_functions = test_* -addopts = - -v - --tb=short - --strict-markers - --disable-warnings - --cov=mellanox_fw_manager - --cov-report=term-missing - --cov-report=xml - --cov-report=html -markers = - unit: Unit tests - integration: Integration tests diff --git a/platform/mellanox/fw-manager/setup.py b/platform/mellanox/fw-manager/setup.py deleted file mode 100644 index 72a95e55b13..00000000000 --- a/platform/mellanox/fw-manager/setup.py +++ /dev/null @@ -1,63 +0,0 @@ -# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES -# Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. -# SPDX-License-Identifier: Apache-2.0 -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# - -""" -Setup script for Mellanox Firmware Manager package. -""" - -from setuptools import setup, find_packages -import sys - -setup( - name="mellanox-fw-manager", - version="1.0.0", - author="Oleksandr Ivantsiv", - author_email="oivantsiv@nvidia.com", - description="Firmware management package for Mellanox ASICs", - url="https://github.com/Azure/sonic-buildimage", - packages=["mellanox_fw_manager"], - classifiers=[ - "Development Status :: 4 - Beta", - "Intended Audience :: Developers", - "Operating System :: POSIX :: Linux", - "Programming Language :: Python :: 3", - "Programming Language :: Python :: 3.7", - "Programming Language :: Python :: 3.8", - "Programming Language :: Python :: 3.9", - "Topic :: System :: Hardware", - "Topic :: System :: Systems Administration", - ], - python_requires=">=3.7", - install_requires=[ - "click>=7.0", - ], - extras_require={ - "testing": [ - "pytest>=6.0", - "pytest-cov>=2.10.0", - "pytest-mock>=3.3.0", - ], - }, - test_suite="tests", - entry_points={ - "console_scripts": [ - "mlnx-fw-manager=mellanox_fw_manager.main:main", - ], - }, - include_package_data=True, - zip_safe=False, -) diff --git a/platform/mellanox/fw-manager/tests/test_main.py b/platform/mellanox/fw-manager/tests/test_main.py deleted file mode 100644 index e2291b65f6d..00000000000 --- a/platform/mellanox/fw-manager/tests/test_main.py +++ /dev/null @@ -1,405 +0,0 @@ -#!/usr/bin/env python3 -# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES -# Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. -# SPDX-License-Identifier: Apache-2.0 -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# - -""" -Comprehensive unit tests for main.py CLI module - -This file tests both the CLI command functionality and module-level helper functions. -""" - -from click.testing import CliRunner -from mellanox_fw_manager.fw_manager import FirmwareManagerError, FirmwareUpgradeError, FirmwareUpgradePartialError -from mellanox_fw_manager.main import ( - setup_logging, _exit_if_qemu, _lock_state_change, - handle_reset, handle_dry_run, handle_upgrade, main, - EXIT_SUCCESS, EXIT_FAILURE, FW_UPGRADE_IS_REQUIRED -) -import os -import sys -import unittest -from unittest.mock import patch, MagicMock, mock_open -import tempfile - -sys.path.insert(0, os.path.join(os.path.dirname(__file__), '..')) - - -class TestMainModule(unittest.TestCase): - """Test cases for main module helper functions""" - - def setUp(self): - """Set up test fixtures""" - self.temp_dir = tempfile.mkdtemp() - - def tearDown(self): - """Clean up test fixtures""" - import shutil - shutil.rmtree(self.temp_dir, ignore_errors=True) - - @patch('mellanox_fw_manager.main.logging.getLogger') - @patch('mellanox_fw_manager.main.logging.handlers.SysLogHandler') - @patch('mellanox_fw_manager.main.logging.StreamHandler') - def test_setup_logging_verbose(self, mock_stream_handler, mock_syslog_handler, mock_get_logger): - """Test setup_logging with verbose=True""" - mock_logger = MagicMock() - mock_get_logger.return_value = mock_logger - - setup_logging(verbose=True) - - self.assertEqual(mock_logger.addHandler.call_count, 2) - mock_syslog_handler.assert_called_once() - mock_stream_handler.assert_called_once() - - @patch('mellanox_fw_manager.main.logging.getLogger') - @patch('mellanox_fw_manager.main.logging.handlers.SysLogHandler') - def test_setup_logging_not_verbose(self, mock_syslog_handler, mock_get_logger): - """Test setup_logging with verbose=False""" - mock_logger = MagicMock() - mock_get_logger.return_value = mock_logger - - setup_logging(verbose=False) - - mock_logger.addHandler.assert_called_once() - mock_syslog_handler.assert_called_once() - - @patch('mellanox_fw_manager.main.subprocess.run') - @patch('mellanox_fw_manager.main.logger') - def test_exit_if_qemu_not_qemu(self, mock_logger, mock_run): - """Test _exit_if_qemu when not running on QEMU""" - mock_run.return_value.stdout = "Some other device" - mock_run.return_value.returncode = 0 - - try: - _exit_if_qemu() - except SystemExit: - self.fail("_exit_if_qemu() raised SystemExit unexpectedly") - - @patch('mellanox_fw_manager.main.subprocess.run') - @patch('mellanox_fw_manager.main.logger') - def test_exit_if_qemu_is_qemu(self, mock_logger, mock_run): - """Test _exit_if_qemu when running on QEMU""" - mock_run.return_value.stdout = "SimX device detected" - mock_run.return_value.returncode = 0 - - with self.assertRaises(SystemExit) as cm: - _exit_if_qemu() - - self.assertEqual(cm.exception.code, 0) - - @patch('mellanox_fw_manager.main.subprocess.run') - @patch('mellanox_fw_manager.main.logger') - def test_exit_if_qemu_command_fails(self, mock_logger, mock_run): - """Test _exit_if_qemu when lspci command fails""" - mock_run.return_value.returncode = 1 - - try: - _exit_if_qemu() - except SystemExit: - self.fail("_exit_if_qemu() raised SystemExit when command failed") - - @patch('mellanox_fw_manager.main.subprocess.run') - @patch('mellanox_fw_manager.main.logger') - def test_exit_if_qemu_exception_handling(self, mock_logger, mock_run): - """Test _exit_if_qemu exception handling (line 69)""" - mock_run.side_effect = Exception("Command failed") - - try: - _exit_if_qemu() - mock_logger.warning.assert_called_once() - except SystemExit: - self.fail("_exit_if_qemu() raised SystemExit when exception occurred") - - @patch('mellanox_fw_manager.main.logger') - def test_lock_state_change_context_manager(self, mock_logger): - """Test _lock_state_change as context manager""" - with patch('mellanox_fw_manager.main.fcntl.flock') as mock_flock: - with patch('builtins.open', mock_open()) as mock_file: - with _lock_state_change(): - pass - - self.assertEqual(mock_flock.call_count, 2) - - @patch('mellanox_fw_manager.main.logger') - def test_lock_state_change_exception_handling(self, mock_logger): - """Test _lock_state_change exception handling""" - with patch('mellanox_fw_manager.main.fcntl.flock', side_effect=OSError("Permission denied")): - with patch('builtins.open', mock_open()): - with self.assertRaises(FirmwareManagerError): - with _lock_state_change(): - pass - - def test_main_function_exists(self, ): - """Test that main function exists and is callable""" - self.assertTrue(callable(main)) - - -class TestHandlerFunctions(unittest.TestCase): - """Test cases for individual handler functions""" - - def setUp(self): - """Set up test fixtures""" - self.temp_dir = tempfile.mkdtemp() - - def tearDown(self): - """Clean up test fixtures""" - import shutil - shutil.rmtree(self.temp_dir, ignore_errors=True) - - @patch('mellanox_fw_manager.main.FirmwareCoordinator') - def test_handle_reset_success(self, mock_coordinator_class): - """Test handle_reset successful operation""" - mock_coordinator = MagicMock() - mock_coordinator.reset_firmware_config.return_value = None - mock_coordinator_class.return_value = mock_coordinator - - with patch('builtins.print') as mock_print: - result = handle_reset(verbose=False) - - self.assertEqual(result, EXIT_SUCCESS) - mock_coordinator.reset_firmware_config.assert_called_once() - mock_print.assert_called_with("Firmware configuration reset completed successfully.") - - @patch('mellanox_fw_manager.main.FirmwareCoordinator') - def test_handle_reset_failure(self, mock_coordinator_class): - """Test handle_reset failure""" - mock_coordinator = MagicMock() - mock_coordinator.reset_firmware_config.side_effect = Exception("Reset failed") - mock_coordinator_class.return_value = mock_coordinator - - with patch('builtins.print') as mock_print: - result = handle_reset(verbose=False) - - self.assertEqual(result, EXIT_FAILURE) - - @patch('mellanox_fw_manager.main.FirmwareCoordinator') - @patch('mellanox_fw_manager.main.logger') - def test_handle_dry_run_upgrade_required(self, mock_logger, mock_coordinator_class): - """Test handle_dry_run when upgrade is required""" - mock_coordinator = MagicMock() - mock_coordinator.check_upgrade_required.return_value = True - mock_coordinator_class.return_value = mock_coordinator - - with patch('builtins.print') as mock_print: - result = handle_dry_run(verbose=False, upgrade=False) - - self.assertEqual(result, FW_UPGRADE_IS_REQUIRED) - mock_print.assert_called_with("Firmware upgrade is required.") - - @patch('mellanox_fw_manager.main.FirmwareCoordinator') - @patch('mellanox_fw_manager.main.logger') - def test_handle_dry_run_up_to_date(self, mock_logger, mock_coordinator_class): - """Test handle_dry_run when firmware is up to date""" - mock_coordinator = MagicMock() - mock_coordinator.check_upgrade_required.return_value = False - mock_coordinator_class.return_value = mock_coordinator - - with patch('builtins.print') as mock_print: - result = handle_dry_run(verbose=False, upgrade=False) - - self.assertEqual(result, EXIT_SUCCESS) - mock_print.assert_called_with("Firmware is up to date.") - - @patch('mellanox_fw_manager.main.FirmwareCoordinator') - @patch('mellanox_fw_manager.main.logger') - def test_handle_dry_run_exception(self, mock_logger, mock_coordinator_class): - """Test handle_dry_run exception handling""" - mock_coordinator_class.side_effect = Exception("Check failed") - - with patch('builtins.print') as mock_print: - result = handle_dry_run(verbose=False, upgrade=False) - - self.assertEqual(result, EXIT_FAILURE) - - @patch('mellanox_fw_manager.main.FirmwareCoordinator') - @patch('mellanox_fw_manager.main.logger') - def test_handle_upgrade_success(self, mock_logger, mock_coordinator_class): - """Test handle_upgrade successful operation""" - mock_coordinator = MagicMock() - mock_coordinator.check_upgrade_required.return_value = True - mock_coordinator.upgrade_firmware.return_value = None - mock_coordinator_class.return_value = mock_coordinator - - with patch('builtins.print') as mock_print: - result = handle_upgrade(verbose=False, upgrade=False, clear_semaphore=False) - - self.assertEqual(result, EXIT_SUCCESS) - mock_coordinator.upgrade_firmware.assert_called_once() - - @patch('mellanox_fw_manager.main.FirmwareCoordinator') - @patch('mellanox_fw_manager.main.logger') - def test_handle_upgrade_up_to_date(self, mock_logger, mock_coordinator_class): - """Test handle_upgrade when firmware is already up to date""" - mock_coordinator = MagicMock() - mock_coordinator.check_upgrade_required.return_value = False - mock_coordinator_class.return_value = mock_coordinator - - with patch('builtins.print') as mock_print: - result = handle_upgrade(verbose=False, upgrade=False, clear_semaphore=False) - - self.assertEqual(result, EXIT_SUCCESS) - mock_coordinator.upgrade_firmware.assert_not_called() - mock_print.assert_called_with("Firmware is up to date.") - - @patch('mellanox_fw_manager.main.FirmwareCoordinator') - @patch('mellanox_fw_manager.main.logger') - def test_handle_upgrade_failure(self, mock_logger, mock_coordinator_class): - """Test handle_upgrade with FirmwareUpgradeError""" - mock_coordinator = MagicMock() - mock_coordinator.check_upgrade_required.return_value = True - mock_coordinator.upgrade_firmware.side_effect = FirmwareUpgradeError("Upgrade failed") - mock_coordinator_class.return_value = mock_coordinator - - with patch('builtins.print') as mock_print: - result = handle_upgrade(verbose=False, upgrade=False, clear_semaphore=False) - - self.assertEqual(result, EXIT_FAILURE) - - @patch('mellanox_fw_manager.main.FirmwareCoordinator') - @patch('mellanox_fw_manager.main.logger') - def test_handle_upgrade_partial_failure(self, mock_logger, mock_coordinator_class): - """Test handle_upgrade with FirmwareUpgradePartialError""" - mock_coordinator = MagicMock() - mock_coordinator.check_upgrade_required.return_value = True - mock_coordinator.upgrade_firmware.side_effect = FirmwareUpgradePartialError("Partial failure") - mock_coordinator_class.return_value = mock_coordinator - - with patch('builtins.print') as mock_print: - result = handle_upgrade(verbose=False, upgrade=False, clear_semaphore=False) - - self.assertEqual(result, EXIT_SUCCESS) - - @patch('mellanox_fw_manager.main.FirmwareCoordinator') - @patch('mellanox_fw_manager.main.logger') - def test_handle_upgrade_generic_exception(self, mock_logger, mock_coordinator_class): - """Test handle_upgrade with generic exception""" - mock_coordinator = MagicMock() - mock_coordinator.check_upgrade_required.return_value = True - mock_coordinator.upgrade_firmware.side_effect = Exception("Unexpected error") - mock_coordinator_class.return_value = mock_coordinator - - with patch('builtins.print') as mock_print: - result = handle_upgrade(verbose=False, upgrade=False, clear_semaphore=False) - - self.assertEqual(result, EXIT_FAILURE) - - -class TestMainCLI(unittest.TestCase): - """Test main CLI function directly with proper mocking""" - - def setUp(self): - """Set up test fixtures""" - self.temp_dir = tempfile.mkdtemp() - - def tearDown(self): - """Clean up test fixtures""" - import shutil - shutil.rmtree(self.temp_dir, ignore_errors=True) - - @patch('mellanox_fw_manager.main.logger') - @patch('mellanox_fw_manager.main.setup_logging') - @patch('mellanox_fw_manager.main._exit_if_qemu') - @patch('mellanox_fw_manager.main._lock_state_change') - @patch('mellanox_fw_manager.main.handle_upgrade') - def test_verbose_mode_flag(self, mock_handle_upgrade, mock_lock, mock_exit_qemu, mock_setup_logging, mock_logger): - """Test that verbose flag is passed correctly""" - mock_lock.return_value.__enter__ = MagicMock() - mock_lock.return_value.__exit__ = MagicMock() - mock_handle_upgrade.return_value = EXIT_SUCCESS - - runner = CliRunner() - - result = runner.invoke(main, ['--verbose']) - - mock_setup_logging.assert_called_once_with(True, False) - - @patch('mellanox_fw_manager.main.logger') - @patch('mellanox_fw_manager.main.setup_logging') - @patch('mellanox_fw_manager.main._exit_if_qemu') - @patch('mellanox_fw_manager.main._lock_state_change') - @patch('mellanox_fw_manager.main.handle_upgrade') - def test_nosyslog_flag(self, mock_handle_upgrade, mock_lock, mock_exit_qemu, mock_setup_logging, mock_logger): - """Test that nosyslog flag is passed correctly""" - mock_lock.return_value.__enter__ = MagicMock() - mock_lock.return_value.__exit__ = MagicMock() - mock_handle_upgrade.return_value = EXIT_SUCCESS - - runner = CliRunner() - - result = runner.invoke(main, ['--nosyslog']) - - mock_setup_logging.assert_called_once_with(False, True) - - @patch('mellanox_fw_manager.main.logger') - @patch('mellanox_fw_manager.main.setup_logging') - @patch('mellanox_fw_manager.main._exit_if_qemu') - @patch('mellanox_fw_manager.main._lock_state_change') - @patch('mellanox_fw_manager.main.handle_reset') - def test_reset_operation_cli(self, mock_handle_reset, mock_lock, mock_exit_qemu, mock_setup_logging, mock_logger): - """Test main CLI with --reset""" - mock_lock.return_value.__enter__ = MagicMock() - mock_lock.return_value.__exit__ = MagicMock() - mock_handle_reset.return_value = EXIT_SUCCESS - - runner = CliRunner() - result = runner.invoke(main, ['--reset']) - - mock_handle_reset.assert_called_once_with(False) - - @patch('mellanox_fw_manager.main.logger') - @patch('mellanox_fw_manager.main.setup_logging') - @patch('mellanox_fw_manager.main._exit_if_qemu') - @patch('mellanox_fw_manager.main._lock_state_change') - @patch('mellanox_fw_manager.main.handle_dry_run') - def test_dry_run_operation_cli(self, mock_handle_dry_run, mock_lock, mock_exit_qemu, mock_setup_logging, mock_logger): - """Test main CLI with --dry-run""" - mock_lock.return_value.__enter__ = MagicMock() - mock_lock.return_value.__exit__ = MagicMock() - mock_handle_dry_run.return_value = EXIT_SUCCESS - - runner = CliRunner() - result = runner.invoke(main, ['--dry-run']) - - mock_handle_dry_run.assert_called_once_with(False, False) - - @patch('mellanox_fw_manager.main.logger') - @patch('mellanox_fw_manager.main.setup_logging') - @patch('mellanox_fw_manager.main._exit_if_qemu') - @patch('mellanox_fw_manager.main._lock_state_change') - @patch('mellanox_fw_manager.main.handle_upgrade') - def test_upgrade_with_flags_cli(self, mock_handle_upgrade, mock_lock, mock_exit_qemu, mock_setup_logging, mock_logger): - """Test main CLI with --upgrade and --clear-semaphore""" - mock_lock.return_value.__enter__ = MagicMock() - mock_lock.return_value.__exit__ = MagicMock() - mock_handle_upgrade.return_value = EXIT_SUCCESS - - runner = CliRunner() - - result = runner.invoke(main, ['--upgrade', '--clear-semaphore']) - - mock_handle_upgrade.assert_called_once_with(False, True, True) - - -def mock_open(): - """Helper function to create mock file object""" - mock_file = MagicMock() - mock_file.__enter__ = MagicMock(return_value=mock_file) - mock_file.__exit__ = MagicMock(return_value=None) - return mock_file - - -if __name__ == '__main__': - unittest.main() diff --git a/platform/mellanox/fw-manager/tests/test_spectrum_manager.py b/platform/mellanox/fw-manager/tests/test_spectrum_manager.py deleted file mode 100644 index 511a01282b3..00000000000 --- a/platform/mellanox/fw-manager/tests/test_spectrum_manager.py +++ /dev/null @@ -1,312 +0,0 @@ -#!/usr/bin/env python3 -# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES -# Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. -# SPDX-License-Identifier: Apache-2.0 -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# - -""" -Comprehensive unit tests for SpectrumFirmwareManager -""" - -from mellanox_fw_manager.firmware_base import FW_ALREADY_UPDATED_FAILURE -from mellanox_fw_manager.spectrum_manager import SpectrumFirmwareManager -import os -import sys -import unittest -from unittest.mock import patch, MagicMock -import tempfile - -sys.path.insert(0, os.path.join(os.path.dirname(__file__), '..')) - - -class TestSpectrumFirmwareManager(unittest.TestCase): - """Test cases for SpectrumFirmwareManager methods""" - - def setUp(self): - """Set up test fixtures""" - self.temp_dir = tempfile.mkdtemp() - - def tearDown(self): - """Clean up test fixtures""" - import shutil - shutil.rmtree(self.temp_dir, ignore_errors=True) - - def _create_manager(self, **kwargs): - """Helper to create SpectrumFirmwareManager with mocked initialization""" - defaults = { - 'asic_index': 0, - 'pci_id': "01:00.0", - 'fw_bin_path': self.temp_dir, - 'verbose': False, - 'clear_semaphore': False, - 'asic_type': 'SPC3', - 'status_queue': None - } - defaults.update(kwargs) - - with patch.object(SpectrumFirmwareManager, '_initialize_asic'): - manager = SpectrumFirmwareManager(**defaults) - manager.fw_file = f"{self.temp_dir}/fw-SPC3.mfa" - manager.current_version = "30.2016.1036" - manager.available_version = "30.2016.1040" - return manager - - def test_get_mst_device_type(self): - """Test _get_mst_device_type returns correct device type""" - manager = self._create_manager() - result = manager._get_mst_device_type() - self.assertEqual(result, "Spectrum") - - def test_get_firmware_filename(self): - """Test get_firmware_filename returns correct Spectrum firmware filename""" - # Test SPC3 - manager = self._create_manager(asic_type='SPC3') - self.assertEqual(manager.get_firmware_filename(), 'fw-SPC3.mfa') - - # Test SPC - manager = self._create_manager(asic_type='SPC') - self.assertEqual(manager.get_firmware_filename(), 'fw-SPC.mfa') - - # Test SPC5 - manager = self._create_manager(asic_type='SPC5') - self.assertEqual(manager.get_firmware_filename(), 'fw-SPC5.mfa') - - def test_unsupported_asic_type(self): - """Test that unsupported ASIC type raises error during initialization""" - from mellanox_fw_manager.firmware_base import FirmwareManagerError - with self.assertRaises(FirmwareManagerError) as context: - SpectrumFirmwareManager( - asic_index=0, pci_id="01:00.0", fw_bin_path=self.temp_dir, - verbose=False, clear_semaphore=False, asic_type='unknown' - ) - self.assertIn("Unsupported ASIC type", str(context.exception)) - - def test_get_asic_type_map(self): - """Test get_asic_type_map returns correct mapping""" - result = SpectrumFirmwareManager.get_asic_type_map() - - expected = { - '15b3:cb84': 'SPC', - '15b3:cf6c': 'SPC2', - '15b3:cf70': 'SPC3', - '15b3:cf80': 'SPC4', - '15b3:cf82': 'SPC5', - } - - self.assertEqual(result, expected) - - @patch('mellanox_fw_manager.spectrum_manager.SpectrumFirmwareManager._run_command') - def test_get_available_firmware_version_success(self, mock_run_cmd): - """Test _get_available_firmware_version when successful""" - manager = self._create_manager() - psid = "MT_0000001187" - - mock_output = f""" -Device Info: -{psid} field1 field2 30.2016.1040 field4 -MT_0000001188 field1 field2 30.2016.1050 field4 -""" - mock_run_cmd.return_value = MagicMock(returncode=0, stdout=mock_output) - - result = manager._get_available_firmware_version(psid) - - self.assertEqual(result, "30.2016.1040") - mock_run_cmd.assert_called_once() - call_args = mock_run_cmd.call_args[0][0] - self.assertIn('mlxfwmanager', call_args) - self.assertIn('--list-content', call_args) - - @patch('mellanox_fw_manager.spectrum_manager.SpectrumFirmwareManager._run_command') - def test_get_available_firmware_version_command_failure(self, mock_run_cmd): - """Test _get_available_firmware_version when mlxfwmanager command fails""" - manager = self._create_manager() - psid = "MT_0000001187" - - mock_run_cmd.return_value = MagicMock( - returncode=1, - stdout="", - stderr="Error: Device not found" - ) - - result = manager._get_available_firmware_version(psid) - - self.assertIsNone(result) - - @patch('mellanox_fw_manager.spectrum_manager.SpectrumFirmwareManager._run_command') - def test_get_available_firmware_version_psid_not_found(self, mock_run_cmd): - """Test _get_available_firmware_version when PSID not found in output""" - manager = self._create_manager() - psid = "MT_0000001187" - - mock_output = """ -Device Info: -MT_0000001188 field1 field2 30.2016.1050 field4 -MT_0000001189 field1 field2 30.2016.1060 field4 -""" - mock_run_cmd.return_value = MagicMock(returncode=0, stdout=mock_output) - - result = manager._get_available_firmware_version(psid) - - self.assertIsNone(result) - - @patch('mellanox_fw_manager.spectrum_manager.SpectrumFirmwareManager._run_command') - def test_get_available_firmware_version_insufficient_fields(self, mock_run_cmd): - """Test _get_available_firmware_version when line has insufficient fields""" - manager = self._create_manager() - psid = "MT_0000001187" - - mock_output = f""" -Device Info: -{psid} field1 field2 -""" - mock_run_cmd.return_value = MagicMock(returncode=0, stdout=mock_output) - - result = manager._get_available_firmware_version(psid) - - self.assertIsNone(result) - - @patch('mellanox_fw_manager.spectrum_manager.SpectrumFirmwareManager._run_command') - def test_get_available_firmware_version_exception(self, mock_run_cmd): - """Test _get_available_firmware_version when exception occurs""" - manager = self._create_manager() - psid = "MT_0000001187" - - mock_run_cmd.side_effect = Exception("Subprocess execution failed") - - result = manager._get_available_firmware_version(psid) - - self.assertIsNone(result) - - @patch('mellanox_fw_manager.spectrum_manager.SpectrumFirmwareManager._run_command') - def test_run_firmware_update_success(self, mock_run_cmd): - """Test run_firmware_update when successful""" - manager = self._create_manager() - - mock_run_cmd.return_value = MagicMock( - returncode=0, - stdout="Firmware update completed successfully", - stderr="" - ) - - result = manager.run_firmware_update() - - self.assertTrue(result) - mock_run_cmd.assert_called_once() - call_args = mock_run_cmd.call_args[0][0] - self.assertIn('mlxfwmanager', call_args) - self.assertIn('-u', call_args) - - @patch('mellanox_fw_manager.spectrum_manager.SpectrumFirmwareManager._run_command') - def test_run_firmware_update_failure(self, mock_run_cmd): - """Test run_firmware_update when firmware update fails""" - manager = self._create_manager() - - mock_run_cmd.return_value = MagicMock( - returncode=1, - stdout="", - stderr="Error: Failed to update firmware - device busy" - ) - - result = manager.run_firmware_update() - - self.assertFalse(result) - - @patch('mellanox_fw_manager.spectrum_manager.SpectrumFirmwareManager._run_command') - def test_run_firmware_update_reactivation_required(self, mock_run_cmd): - """Test run_firmware_update when reactivation is required""" - manager = self._create_manager() - - mock_run_cmd.side_effect = [ - MagicMock(returncode=FW_ALREADY_UPDATED_FAILURE, stdout="", stderr=""), - MagicMock(returncode=0, stdout="Reactivation successful", stderr=""), - MagicMock(returncode=0, stdout="Firmware update completed", stderr="") - ] - - result = manager.run_firmware_update() - - self.assertTrue(result) - self.assertEqual(mock_run_cmd.call_count, 3) - - reactivate_call = mock_run_cmd.call_args_list[1][0][0] - self.assertIn('flint', reactivate_call) - self.assertIn('ir', reactivate_call) - - @patch('mellanox_fw_manager.spectrum_manager.SpectrumFirmwareManager._run_command') - def test_run_firmware_update_reactivation_fails_but_continues(self, mock_run_cmd): - """Test run_firmware_update when reactivation fails but continues with retry""" - manager = self._create_manager() - - mock_run_cmd.side_effect = [ - MagicMock(returncode=FW_ALREADY_UPDATED_FAILURE, stdout="", stderr=""), - MagicMock(returncode=1, stdout="", stderr="Reactivation failed"), - MagicMock(returncode=0, stdout="Firmware update completed", stderr="") - ] - - result = manager.run_firmware_update() - - self.assertTrue(result) - self.assertEqual(mock_run_cmd.call_count, 3) - - @patch('mellanox_fw_manager.spectrum_manager.SpectrumFirmwareManager._run_command') - def test_run_firmware_update_reactivation_required_retry_fails(self, mock_run_cmd): - """Test run_firmware_update when reactivation required but retry fails""" - manager = self._create_manager() - - mock_run_cmd.side_effect = [ - MagicMock(returncode=FW_ALREADY_UPDATED_FAILURE, stdout="", stderr=""), - MagicMock(returncode=0, stdout="Reactivation successful", stderr=""), - MagicMock(returncode=1, stdout="", stderr="Retry failed") - ] - - result = manager.run_firmware_update() - - self.assertFalse(result) - self.assertEqual(mock_run_cmd.call_count, 3) - - @patch('mellanox_fw_manager.spectrum_manager.SpectrumFirmwareManager._run_command') - def test_run_firmware_update_exception(self, mock_run_cmd): - """Test run_firmware_update when exception occurs""" - manager = self._create_manager() - - mock_run_cmd.side_effect = Exception("Subprocess execution failed") - - result = manager.run_firmware_update() - - self.assertFalse(result) - - @patch('mellanox_fw_manager.spectrum_manager.SpectrumFirmwareManager._run_command') - def test_run_firmware_update_with_verbose_mode(self, mock_run_cmd): - """Test run_firmware_update passes correct environment in verbose mode""" - manager = self._create_manager(verbose=True) - - mock_run_cmd.return_value = MagicMock( - returncode=0, - stdout="Firmware update completed", - stderr="" - ) - - result = manager.run_firmware_update() - - self.assertTrue(result) - - call_kwargs = mock_run_cmd.call_args[1] - self.assertIn('env', call_kwargs) - env = call_kwargs['env'] - self.assertIn('FLASH_ACCESS_DEBUG', env) - self.assertIn('FW_COMPS_DEBUG', env) - - -if __name__ == '__main__': - unittest.main() diff --git a/platform/mellanox/fw.mk b/platform/mellanox/fw.mk index 58dcf0da8a3..068f44e09e5 100644 --- a/platform/mellanox/fw.mk +++ b/platform/mellanox/fw.mk @@ -1,5 +1,5 @@ # -# Copyright (c) 2016-2025 NVIDIA CORPORATION & AFFILIATES. +# Copyright (c) 2016-2026 NVIDIA CORPORATION & AFFILIATES. # Apache-2.0 # # Licensed under the Apache License, Version 2.0 (the "License"); @@ -21,38 +21,38 @@ MLNX_FW_BASE_PATH = $(MLNX_SDK_BASE_PATH) # Place an URL here to FW if you want to download FW instead MLNX_FW_BASE_URL = -SIMX_VERSION = 25.10-1153 +SIMX_VERSION = 26.4-1175 FW_FROM_URL = y -MLNX_FW_ASSETS_RELEASE_TAG = fw-2016.3404 +MLNX_FW_ASSETS_RELEASE_TAG = fw-2016.4068 MLNX_FW_ASSETS_URL = $(MLNX_ASSETS_GITHUB_URL)/releases/download/$(MLNX_FW_ASSETS_RELEASE_TAG) ifeq ($(MLNX_FW_BASE_URL), ) MLNX_FW_BASE_URL = $(MLNX_FW_ASSETS_URL) endif -MLNX_SPC_FW_VERSION = 13.2016.3404 +MLNX_SPC_FW_VERSION = 13.2016.4068 MLNX_SPC_FW_FILE = fw-SPC-rel-$(subst .,_,$(MLNX_SPC_FW_VERSION))-EVB.mfa $(MLNX_SPC_FW_FILE)_PATH = $(MLNX_FW_BASE_PATH) $(MLNX_SPC_FW_FILE)_URL = $(MLNX_FW_BASE_URL)/$(MLNX_SPC_FW_FILE) -MLNX_SPC2_FW_VERSION = 29.2016.3404 +MLNX_SPC2_FW_VERSION = 29.2016.4068 MLNX_SPC2_FW_FILE = fw-SPC2-rel-$(subst .,_,$(MLNX_SPC2_FW_VERSION))-EVB.mfa $(MLNX_SPC2_FW_FILE)_PATH = $(MLNX_FW_BASE_PATH) $(MLNX_SPC2_FW_FILE)_URL = $(MLNX_FW_BASE_URL)/$(MLNX_SPC2_FW_FILE) -MLNX_SPC3_FW_VERSION = 30.2016.3404 +MLNX_SPC3_FW_VERSION = 30.2016.4068 MLNX_SPC3_FW_FILE = fw-SPC3-rel-$(subst .,_,$(MLNX_SPC3_FW_VERSION))-EVB.mfa $(MLNX_SPC3_FW_FILE)_PATH = $(MLNX_FW_BASE_PATH) $(MLNX_SPC3_FW_FILE)_URL = $(MLNX_FW_BASE_URL)/$(MLNX_SPC3_FW_FILE) -MLNX_SPC4_FW_VERSION = 34.2016.3404 +MLNX_SPC4_FW_VERSION = 34.2016.4068 MLNX_SPC4_FW_FILE = fw-SPC4-rel-$(subst .,_,$(MLNX_SPC4_FW_VERSION))-EVB.mfa $(MLNX_SPC4_FW_FILE)_PATH = $(MLNX_FW_BASE_PATH) $(MLNX_SPC4_FW_FILE)_URL = $(MLNX_FW_BASE_URL)/$(MLNX_SPC4_FW_FILE) -MLNX_SPC5_FW_VERSION = 37.2016.3404 +MLNX_SPC5_FW_VERSION = 37.2016.4068 MLNX_SPC5_FW_FILE = fw-SPC5-rel-$(subst .,_,$(MLNX_SPC5_FW_VERSION))-EVB.mfa $(MLNX_SPC5_FW_FILE)_PATH = $(MLNX_FW_BASE_PATH) $(MLNX_SPC5_FW_FILE)_URL = $(MLNX_FW_BASE_URL)/$(MLNX_SPC5_FW_FILE) diff --git a/platform/mellanox/get_component_versions/get_component_versions.j2 b/platform/mellanox/get_component_versions/get_component_versions.j2 deleted file mode 100644 index 8f99324d823..00000000000 --- a/platform/mellanox/get_component_versions/get_component_versions.j2 +++ /dev/null @@ -1,203 +0,0 @@ -{# - SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES - Copyright (c) 2024-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. - SPDX-License-Identifier: Apache-2.0 - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -#} -#!/usr/bin/env python3 - -import os -import subprocess -import re - -try: - from fwutil.lib import PlatformDataProvider -except Exception: - PlatformDataProvider = None - -from sonic_py_common.general import check_output_pipe -from sonic_platform.device_data import DeviceDataManager -from tabulate import tabulate - -COMPONENT_VERSIONS_FILE = "/etc/mlnx/component-versions" -HEADERS = ["COMPONENT", "COMPILATION", "ACTUAL"] -SAI_API_TABLE_HEADERS = ["COMPONENT", "SONIC_SAI", "VENDOR_SAI"] - -{% if sonic_asic_platform == "mellanox" %} - -COMMANDS_FOR_ACTUAL = { - "MFT": [["dpkg", "-l"], ["grep", "mft "], "mft *([0-9.-]*)"], - "HW_MANAGEMENT": [["dpkg", "-l"], ["grep", "hw"], ".*1\\.mlnx\\.([0-9.]*)"], - "SDK": [["docker", "exec", "-it", "syncd", "bash", "-c", 'dpkg -l | grep sdk'], ".*1\\.mlnx\\.([0-9.]*)"], - "SAI": [["docker", "exec", "-it", "syncd", "bash", "-c", 'dpkg -l | grep mlnx-sai'], ".*1\\.mlnx\\.([A-Za-z0-9.]*)"], - "SAI_API_HEADERS": [["docker", "exec", "syncd", "dpkg", "-s", "mlnx-sai"], "X-Sai-Headers-Version: ([0-9.]+)"], - "FW": [["mlxfwmanager", "--query"], "FW * [0-9]{2}\\.([0-9.]*)"], - "KERNEL": [["uname", "-r"], "(.*)-[a-z0-9]+$"], - "RSHIM": [["dpkg", "-l"], ["grep", "rshim "], "rshim *([0-9.-]*)"] -} - -UNAVAILABLE_COMPILED_VERSIONS = { - "SDK": "N/A", - "FW": "N/A", - "SAI": "N/A", - "SAI_API_HEADERS": "N/A", - "HW_MANAGEMENT": "N/A", - "MFT": "N/A", - "KERNEL": "N/A", - "SIMX": "N/A", - "RSHIM": "N/A" -} - -{% elif sonic_asic_platform == "nvidia-bluefield" %} - -COMMANDS_FOR_ACTUAL = { - "MFT": [["dpkg", "-l"], ["grep", "mft "], "mft *([0-9.-]*)"], - "SDK": [["docker", "exec", "syncd", "bash", "-c", 'dpkg -l | grep sdn'], "sdn-appliance *([0-9.-]*mlnx1)"], - "SAI": [["docker", "exec", "syncd", "bash", "-c", 'dpkg -l | grep mlnx-sai'], ".*1\\.mlnx\\.([A-Za-z0-9.]*)"], - "SAI_API_HEADERS": [["docker", "exec", "syncd", "dpkg", "-s", "mlnx-sai"], "X-Sai-Headers-Version: ([0-9.]+)"], - "FW": [["mlxfwmanager", "--query"], "FW * [0-9]{2}\\.([0-9.]*)"], - "KERNEL": [["uname", "-r"], "(.*)-[a-z0-9]+$"], - "BFSOC": [["dpkg", "-l"], ["grep", "mlxbf-bootimages"], "mlxbf-bootimages *([0-9.-]*)"] -} - -UNAVAILABLE_COMPILED_VERSIONS = { - "SDK": "N/A", - "FW": "N/A", - "SAI": "N/A", - "SAI_API_HEADERS": "N/A", - "MFT": "N/A", - "KERNEL": "N/A", - "BFSOC": "N/A", - "SIMX": "N/A" -} - -{% endif %} - -UNAVAILABLE_PLATFORM_VERSIONS = { - "ONIE": "N/A", - "SSD": "N/A", - "BIOS": "N/A", - "CPLD": "N/A" -} - - - -def parse_compiled_components_file(): - compiled_versions = UNAVAILABLE_COMPILED_VERSIONS - - if not os.path.exists(COMPONENT_VERSIONS_FILE): - return UNAVAILABLE_COMPILED_VERSIONS - - with open(COMPONENT_VERSIONS_FILE, 'r') as component_versions: - for line in component_versions.readlines(): - try: - comp, version = line.split() - compiled_versions[comp] = version - except ValueError: - continue - - return compiled_versions - - -def get_platform_component_versions(): - ccm = None - - if PlatformDataProvider: - pdp = PlatformDataProvider() - ccm = pdp.chassis_component_map - - if not ccm: - return UNAVAILABLE_PLATFORM_VERSIONS - - versions_map = None - - # The first layer of the map only has one item - for key, value in ccm.items(): - versions_map = value - break - - if not versions_map or len(versions_map) == 0: - return UNAVAILABLE_PLATFORM_VERSIONS - - platform_versions = {} - for component_name, component in versions_map.items(): - platform_versions[component_name] = component.get_firmware_version() - - return platform_versions - - -def get_current_version(comp): - version = "" - try: - # If there's only one command - if len(COMMANDS_FOR_ACTUAL[comp]) == 2: - version = subprocess.run(COMMANDS_FOR_ACTUAL[comp][0], shell=False, stdout=subprocess.PIPE, text=True) - version = str(version.stdout) - #If there are two commands and we need a pipe - elif len(COMMANDS_FOR_ACTUAL[comp]) == 3: - version = check_output_pipe(COMMANDS_FOR_ACTUAL[comp][0], COMMANDS_FOR_ACTUAL[comp][1]) - parsed_version = re.search(COMMANDS_FOR_ACTUAL[comp][-1], version) - return parsed_version.group(1) if parsed_version else "N/A" - except Exception: - return "N/A" - - -def format_output_table(table, headers=HEADERS): - return tabulate(table, headers) - - -def main(): - - if os.getuid() != 0: - print("Error: Root privileges are required") - return - - compiled_versions = parse_compiled_components_file() - simx_compiled_ver = compiled_versions.pop("SIMX") - - # Handle SAI_API_HEADERS versions - sai_api_headers_table = [] - if "SAI_API_HEADERS" in compiled_versions: - sai_api_version_in_sai = get_current_version("SAI_API_HEADERS") - sai_api_version_in_sonic = compiled_versions["SAI_API_HEADERS"] - sai_api_headers_table.append(["SAI_API_HEADERS", sai_api_version_in_sonic, sai_api_version_in_sai]) - compiled_versions.pop("SAI_API_HEADERS") - - # Add compiled versions to table - output_table = [] - for comp in compiled_versions.keys(): - actual = get_current_version(comp) - output_table.append([comp, compiled_versions[comp], actual]) - - # Handle if SIMX - if hasattr(DeviceDataManager, "is_simx_platform") and DeviceDataManager.is_simx_platform(): - simx_actual_ver = DeviceDataManager.get_simx_version() - output_table.append(["SIMX", simx_compiled_ver, simx_actual_ver]) - platform_versions = UNAVAILABLE_PLATFORM_VERSIONS - else: - platform_versions = get_platform_component_versions() - - # Add actual versions to table - for comp in platform_versions.keys(): - output_table.append([comp, "-", platform_versions[comp]]) - - print(format_output_table(output_table)) - - if sai_api_headers_table: - print("\n") - print(format_output_table(sai_api_headers_table, SAI_API_TABLE_HEADERS)) - - -if __name__ == "__main__": - main() diff --git a/platform/mellanox/hw-management.dep b/platform/mellanox/hw-management.dep index b69ca22b4c5..3294cf6b505 100644 --- a/platform/mellanox/hw-management.dep +++ b/platform/mellanox/hw-management.dep @@ -4,7 +4,8 @@ SPATH := $($(MLNX_HW_MANAGEMENT)_SRC_PATH) SLINKS := $(shell find $(SPATH) -type l -exec echo {} \; | grep -Ev ' ') SMDEP_PATHS := $(shell git submodule status --recursive -- $(SPATH) | awk '{print $$2}' | grep -Ev ' ') SMDEP_FILES := $(foreach path,$(SMDEP_PATHS),$(filter-out $(SMDEP_PATHS),$(addprefix $(path)/,$(shell cd $(path) && git ls-files | grep -Ev ' ')))) -DEP_FILES := $(SONIC_COMMON_FILES_LIST) $(PLATFORM_PATH)/hw-management.mk $(PLATFORM_PATH)/hw-management.dep +HW_MGMT_DEP_PATH := $(or $(MLNX_PLATFORM_PATH),$(PLATFORM_PATH)) +DEP_FILES := $(SONIC_COMMON_FILES_LIST) $(HW_MGMT_DEP_PATH)/hw-management.mk $(HW_MGMT_DEP_PATH)/hw-management.dep DEP_FILES += $(SONIC_COMMON_BASE_FILES_LIST) DEP_FILES += $(filter-out $(SMDEP_PATHS),$(shell git ls-files -- $(SPATH) | grep -Ev ' ')) @@ -13,3 +14,9 @@ $(MLNX_HW_MANAGEMENT)_DEP_FLAGS := $(SONIC_COMMON_FLAGS_LIST) $(MLNX_HW_MANAGEMENT)_DEP_FILES := $(filter-out $(SLINKS),$(DEP_FILES)) $(MLNX_HW_MANAGEMENT)_SMDEP_FILES := $(filter-out $(SLINKS),$(SMDEP_FILES)) $(MLNX_HW_MANAGEMENT)_SMDEP_PATHS := $(SMDEP_PATHS) + +$(MLNX_HW_MANAGEMENT_BMC)_CACHE_MODE := GIT_CONTENT_SHA +$(MLNX_HW_MANAGEMENT_BMC)_DEP_FLAGS := $(SONIC_COMMON_FLAGS_LIST) +$(MLNX_HW_MANAGEMENT_BMC)_DEP_FILES := $(filter-out $(SLINKS),$(DEP_FILES)) +$(MLNX_HW_MANAGEMENT_BMC)_SMDEP_FILES := $(filter-out $(SLINKS),$(SMDEP_FILES)) +$(MLNX_HW_MANAGEMENT_BMC)_SMDEP_PATHS := $(SMDEP_PATHS) diff --git a/platform/mellanox/hw-management.mk b/platform/mellanox/hw-management.mk index 64e41428db3..7ecd6698195 100644 --- a/platform/mellanox/hw-management.mk +++ b/platform/mellanox/hw-management.mk @@ -1,6 +1,6 @@ # # SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES -# Copyright (c) 2016-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# Copyright (c) 2016-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. # Apache-2.0 # # Licensed under the Apache License, Version 2.0 (the "License"); @@ -17,7 +17,7 @@ # # Mellanox HW Management -MLNX_HW_MANAGEMENT_VERSION = 7.0050.2930 +MLNX_HW_MANAGEMENT_VERSION = 7.0060.1047 export MLNX_HW_MANAGEMENT_VERSION @@ -25,3 +25,5 @@ MLNX_HW_MANAGEMENT = hw-management_1.mlnx.$(MLNX_HW_MANAGEMENT_VERSION)_$(CONFIG $(MLNX_HW_MANAGEMENT)_SRC_PATH = $(PLATFORM_PATH)/hw-management $(MLNX_HW_MANAGEMENT)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON) SONIC_MAKE_DEBS += $(MLNX_HW_MANAGEMENT) + +MLNX_HW_MANAGEMENT_BMC = hw-management-bmc_1.mlnx.$(MLNX_HW_MANAGEMENT_VERSION)_$(CONFIGURED_ARCH).deb diff --git a/platform/mellanox/hw-management/0003-Disable-hw-management-thermal-updater.patch b/platform/mellanox/hw-management/0003-Disable-hw-management-thermal-updater.patch new file mode 100644 index 00000000000..cd0f6f2044e --- /dev/null +++ b/platform/mellanox/hw-management/0003-Disable-hw-management-thermal-updater.patch @@ -0,0 +1,32 @@ +From 29a649691e9c52d21c4050ba43fc2cf951da74ed Mon Sep 17 00:00:00 2001 +From: Junchao-Mellanox +Date: Mon, 26 Jan 2026 08:51:56 +0200 +Subject: [PATCH] Disable hw-management-thermal-updater + +--- + debian/rules | 2 -- + 1 file changed, 2 deletions(-) + +diff --git a/debian/rules b/debian/rules +index ddd057eb..e550d69d 100755 +--- a/debian/rules ++++ b/debian/rules +@@ -67,7 +67,6 @@ override_dh_systemd_enable: + dh_systemd_enable --name=hw-management + dh_systemd_enable --name=hw-management-tc + dh_systemd_enable --name=hw-management-peripheral-updater +- dh_systemd_enable --name=hw-management-thermal-updater + dh_systemd_enable --name=hw-management-sysfs-monitor + dh_systemd_enable --name=hw-management-fast-sysfs-monitor + dh_systemd_enable --name=hw-management-blacklist-generator +@@ -77,7 +76,6 @@ override_dh_systemd_start: + dh_systemd_start --name=hw-management + dh_systemd_start --name=hw-management-tc + dh_systemd_start --name=hw-management-peripheral-updater +- dh_systemd_start --name=hw-management-thermal-updater + dh_systemd_start --name=hw-management-sysfs-monitor + dh_systemd_start --name=hw-management-fast-sysfs-monitor + dh_systemd_start --name=hw-management-blacklist-generator +-- +2.49.0 + diff --git a/platform/mellanox/hw-management/Makefile b/platform/mellanox/hw-management/Makefile index a42bcdfeafb..6be6d3ae2a5 100644 --- a/platform/mellanox/hw-management/Makefile +++ b/platform/mellanox/hw-management/Makefile @@ -2,6 +2,7 @@ SHELL = /bin/bash MAIN_TARGET = hw-management_1.mlnx.$(MLNX_HW_MANAGEMENT_VERSION)_$(CONFIGURED_ARCH).deb +BMC_ONLY_TARGET = hw-management-bmc_1.mlnx.$(MLNX_HW_MANAGEMENT_VERSION)_$(CONFIGURED_ARCH).deb $(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : @@ -9,7 +10,16 @@ $(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : git stash git apply -3 ../*.patch || exit 1 chmod +x ./debian/rules - KVERSION=$(KVERSION) LM_DEPENDS=0 dpkg-buildpackage -us -uc -b -rfakeroot -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $(SONIC_DPKG_ADMINDIR) + DEB_BUILD_PROFILES=pkg.hw-mgmt.cpu-only KVERSION=$(KVERSION) LM_DEPENDS=0 dpkg-buildpackage -us -uc -b -rfakeroot -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $(SONIC_DPKG_ADMINDIR) popd - mv $* $(DEST)/ + mv hw-management_*.deb $(DEST)/$* + +$(addprefix $(DEST)/, $(BMC_ONLY_TARGET)): $(DEST)/% : + + pushd hw-mgmt + chmod +x ./debian/rules + DEB_BUILD_PROFILES=pkg.hw-mgmt.bmc-only KVERSION=$(KVERSION) LM_DEPENDS=0 dpkg-buildpackage -us -uc -b -rfakeroot -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $(SONIC_DPKG_ADMINDIR) + popd + + mv hw-management-bmc_*.deb $(DEST)/$* diff --git a/platform/mellanox/hw-management/hw-mgmt b/platform/mellanox/hw-management/hw-mgmt index 166f823fcca..ca327dbb89e 160000 --- a/platform/mellanox/hw-management/hw-mgmt +++ b/platform/mellanox/hw-management/hw-mgmt @@ -1 +1 @@ -Subproject commit 166f823fcca0e8528d94c8757ed43df155c471b9 +Subproject commit ca327dbb89edc99b9417dd118520c7bde33cefca diff --git a/platform/mellanox/integration-scripts.mk b/platform/mellanox/integration-scripts.mk index 4aa5af43b09..03166eb9e6d 100644 --- a/platform/mellanox/integration-scripts.mk +++ b/platform/mellanox/integration-scripts.mk @@ -1,6 +1,6 @@ # # SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES -# Copyright (c) 2016-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# Copyright (c) 2016-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. # Apache-2.0 # # Licensed under the Apache License, Version 2.0 (the "License"); @@ -26,6 +26,7 @@ TEMP_HW_MGMT_DIR = /tmp/hw_mgmt PTCH_DIR = $(TEMP_HW_MGMT_DIR)/patch_dir/ NON_UP_PTCH_DIR = $(TEMP_HW_MGMT_DIR)/non_up_patch_dir/ PTCH_LIST = $(TEMP_HW_MGMT_DIR)/series +HWMGMT_RESOLVED_REF_ENV = $(TEMP_HW_MGMT_DIR)/resolved_hw_mgmt_ref.env HWMGMT_NONUP_LIST = $(BUILD_WORKDIR)/$($(MLNX_HW_MANAGEMENT)_SRC_PATH)/hwmgmt_nonup_patches HWMGMT_USER_OUTFILE = $(BUILD_WORKDIR)/integrate-mlnx-hw-mgmt_user.out SDK_USER_OUTFILE = $(BUILD_WORKDIR)/integrate-mlnx-sdk_user.out @@ -45,12 +46,31 @@ KCFG_BASE_ARM = $(KCFG_BASE_TMPDIR)/arm64.config KCFG_LIST_ARM = $(TEMP_HW_MGMT_DIR)/kconfig_arm64 KCFG_DOWN_LIST_ARM = $(TEMP_HW_MGMT_DIR)/kconfig_downstream_arm64 +# Platform-specific kconfig temp files (used by aspeed BMC; unused by default mellanox flow) +KCFG_BASE_ASPEED = $(KCFG_BASE_TMPDIR)/aspeed.config +KCFG_LIST_ASPEED = $(TEMP_HW_MGMT_DIR)/kconfig_aspeed +BMC_PATCH_TABLE = $(BUILD_WORKDIR)/$($(MLNX_HW_MANAGEMENT)_SRC_PATH)/hw-mgmt/recipes-kernel/linux/Patch_BMC_Status_Table.txt + +# Platform path for hw-mgmt source and integration scripts. +# Defaults to $(PLATFORM_PATH) which is platform/mellanox for SONiC mellanox builds. +# Override to platform/mellanox when building for other platforms (e.g., aspeed BMC) +MLNX_PLATFORM_PATH ?= $(PLATFORM_PATH) + integrate-mlnx-hw-mgmt: $(FLUSH_LOG) rm -rf $(TEMP_HW_MGMT_DIR) $(TMPFILE_OUT) mkdir -p $(PTCH_DIR) $(NON_UP_PTCH_DIR) $(KCFG_BASE_TMPDIR) - touch $(PTCH_LIST) $(KCFG_LIST) $(KCFG_DOWN_LIST) $(KCFG_LIST_ARM) $(KCFG_DOWN_LIST_ARM) + touch $(PTCH_LIST) $(KCFG_LIST) $(KCFG_DOWN_LIST) $(KCFG_LIST_ARM) $(KCFG_DOWN_LIST_ARM) $(KCFG_LIST_ASPEED) + + # Resolve MLNX_HW_MANAGEMENT_VERSION to a hw-mgmt ref (tag V. + # wins over branch ), write env vars to $(HWMGMT_RESOLVED_REF_ENV), + # then source them. + $(BUILD_WORKDIR)/$(MLNX_PLATFORM_PATH)/integration-scripts/hwmgmt_resolve_ref.py \ + --repo $(BUILD_WORKDIR)/$($(MLNX_HW_MANAGEMENT)_SRC_PATH)/hw-mgmt \ + --input "$(MLNX_HW_MANAGEMENT_VERSION)" \ + --env-file $(HWMGMT_RESOLVED_REF_ENV) $(LOG_SIMPLE) + . $(HWMGMT_RESOLVED_REF_ENV) # Fetch the vanilla .config files pushd $(KCFG_BASE_TMPDIR) $(LOG_SIMPLE) @@ -61,33 +81,58 @@ integrate-mlnx-hw-mgmt: pushd linux rm -rf .config; make ARCH=x86_64 defconfig; cp -f .config $(KCFG_BASE) $(LOG_SIMPLE) rm -rf .config; make ARCH=arm64 defconfig; cp -f .config $(KCFG_BASE_ARM) $(LOG_SIMPLE) + cp -f $(KCFG_BASE_ARM) $(KCFG_BASE_ASPEED) popd popd $(LOG_SIMPLE) # clean up existing untracked files - pushd $(BUILD_WORKDIR); git clean -f -- platform/mellanox/ + pushd $(BUILD_WORKDIR); git clean -f -- $(MLNX_PLATFORM_PATH)/ ifeq ($(CREATE_BRANCH), y) - git checkout -B "$(BRANCH_SONIC)_$(SB_HEAD)_integrate_$(MLNX_HW_MANAGEMENT_VERSION)" HEAD - echo $(BRANCH_SONIC)_$(SB_HEAD)_integrate_$(MLNX_HW_MANAGEMENT_VERSION) branch created in sonic-buildimage + # Tag path: HWMGMT_PACKAGE_VERSION == input (today's name). Branch path: + # "-" suffix makes two runs against the same hw-mgmt branch produce + # distinct sonic-buildimage branch names. + git checkout -B "$(BRANCH_SONIC)_$(SB_HEAD)_integrate_$$HWMGMT_PACKAGE_VERSION" HEAD + echo $(BRANCH_SONIC)_$(SB_HEAD)_integrate_$$HWMGMT_PACKAGE_VERSION branch created in sonic-buildimage endif popd pushd $(BUILD_WORKDIR)/src/sonic-linux-kernel; git clean -f -- patch/ ifeq ($(CREATE_BRANCH), y) - git checkout -B "$(BRANCH_SONIC)_$(SLK_HEAD)_integrate_$(MLNX_HW_MANAGEMENT_VERSION)" HEAD - echo $(BRANCH_SONIC)_$(SLK_HEAD)_integrate_$(MLNX_HW_MANAGEMENT_VERSION) branch created in sonic-linux-kernel + git checkout -B "$(BRANCH_SONIC)_$(SLK_HEAD)_integrate_$$HWMGMT_PACKAGE_VERSION" HEAD + echo $(BRANCH_SONIC)_$(SLK_HEAD)_integrate_$$HWMGMT_PACKAGE_VERSION branch created in sonic-linux-kernel endif popd - echo "#### Integrate HW-MGMT $(MLNX_HW_MANAGEMENT_VERSION) Kernel Patches into SONiC" > ${HWMGMT_USER_OUTFILE} - pushd $(BUILD_WORKDIR)/$(PLATFORM_PATH) $(LOG_SIMPLE) + echo "#### Integrate HW-MGMT $$HWMGMT_PACKAGE_VERSION Kernel Patches into SONiC" > ${HWMGMT_USER_OUTFILE} + { \ + echo ""; \ + echo "Resolved hw-mgmt source:"; \ + echo " input: $$HWMGMT_INPUT"; \ + echo " ref type: $$HWMGMT_REF_TYPE"; \ + echo " checkout ref: $$HWMGMT_CHECKOUT_REF"; \ + echo " commit: $$HWMGMT_COMMIT"; \ + echo " base version: $$HWMGMT_BASE_VERSION"; \ + echo " distinct id: $$HWMGMT_DISTINCT_ID"; \ + echo " package version: $$HWMGMT_PACKAGE_VERSION"; \ + } >> ${HWMGMT_USER_OUTFILE} + pushd $(BUILD_WORKDIR)/$(MLNX_PLATFORM_PATH) $(LOG_SIMPLE) # Run tests pushd integration-scripts/tests; pytest-3 -v; popd - # Checkout to the corresponding hw-mgmt version and update mk file - pushd hw-management/hw-mgmt; git checkout V.${MLNX_HW_MANAGEMENT_VERSION}; popd - sed -i "s/\(^MLNX_HW_MANAGEMENT_VERSION = \).*/\1${MLNX_HW_MANAGEMENT_VERSION}/g" hw-management.mk + # Detach hw-mgmt at the resolved commit and write HWMGMT_PACKAGE_VERSION + # into hw-management.mk. Tag path: byte-identical to today. Branch path: + # -, unique per commit so two iterations against + # the same branch don't produce identically-named debs in $(DEST). + # + # HWMGMT_PACKAGE_VERSION is the SONiC-side identity (deb filename, + # downstream caching). The Debian package's internal `Version:` still + # comes from hw-mgmt/debian/changelog via dpkg-buildpackage and stays + # at the unsuffixed base; hw-management/Makefile's wildcard + # `mv hw-management_*.deb $(DEST)/$*` reconciles the two. Changing + # internal Debian metadata is intentionally out of scope. + pushd hw-management/hw-mgmt; git checkout --detach "$$HWMGMT_COMMIT"; popd + sed -i "s|\(^MLNX_HW_MANAGEMENT_VERSION = \).*|\1$$HWMGMT_PACKAGE_VERSION|g" hw-management.mk # Pre-processing before runing hw_mgmt script integration-scripts/hwmgmt_kernel_patches.py pre \ @@ -95,9 +140,11 @@ endif --config_base_arm $(KCFG_BASE_ARM) \ --config_inc_amd $(KCFG_LIST) \ --config_inc_arm $(KCFG_LIST_ARM) \ + --config_base_aspeed $(KCFG_BASE_ASPEED) \ + --config_inc_aspeed $(KCFG_LIST_ASPEED) \ --build_root $(BUILD_WORKDIR) \ --kernel_version $(KERNEL_VERSION) \ - --hw_mgmt_ver ${MLNX_HW_MANAGEMENT_VERSION} $(LOG_SIMPLE) + --hw_mgmt_ver "$$HWMGMT_PACKAGE_VERSION" $(LOG_SIMPLE) # Disable Writing KConfigs for arm64 platform # $(BUILD_WORKDIR)/$($(MLNX_HW_MANAGEMENT)_SRC_PATH)/hw-mgmt/recipes-kernel/linux/deploy_kernel_patches.py \ @@ -120,28 +167,59 @@ endif --arch amd64 \ --os_type sonic $(LOG_SIMPLE) + # Deploy aspeed/BMC kernel patches. + # Guarded at runtime: Patch_BMC_Status_Table.txt indicates this hw-mgmt supports aspeed/BMC. + # Must use shell if (not Make ifeq) because hw-mgmt is git-checked-out during this recipe. + if [ -f $(BMC_PATCH_TABLE) ]; then \ + $(BUILD_WORKDIR)/$($(MLNX_HW_MANAGEMENT)_SRC_PATH)/hw-mgmt/recipes-kernel/linux/deploy_kernel_patches.py \ + --dst_accepted_folder $(PTCH_DIR) \ + --dst_candidate_folder $(NON_UP_PTCH_DIR) \ + --series_file $(PTCH_LIST) \ + --config_file $(KCFG_LIST_ASPEED) \ + --kernel_version $(KERNEL_VERSION) \ + --arch aspeed \ + --os_type sonic $(LOG_SIMPLE) && \ + cp -f $(PTCH_LIST) $(PTCH_LIST).pre_bmc && \ + $(BUILD_WORKDIR)/$($(MLNX_HW_MANAGEMENT)_SRC_PATH)/hw-mgmt/recipes-kernel/linux/deploy_kernel_patches.py \ + --dst_accepted_folder $(PTCH_DIR) \ + --dst_candidate_folder $(NON_UP_PTCH_DIR) \ + --series_file $(PTCH_LIST) \ + --config_file $(KCFG_LIST_ASPEED) \ + --kernel_version $(KERNEL_VERSION) \ + --arch aspeed \ + --os_type sonic \ + --patch_table Patch_BMC_Status_Table.txt $(LOG_SIMPLE) && \ + { grep -vFxf $(PTCH_LIST).pre_bmc $(PTCH_LIST) > $(TEMP_HW_MGMT_DIR)/bmc_only_patches || true; } ; \ + else \ + echo "NOTICE: Patch_BMC_Status_Table.txt not found in hw-mgmt, skipping aspeed/BMC patch deploy" ; \ + touch $(TEMP_HW_MGMT_DIR)/bmc_only_patches ; \ + fi + # Post-processing integration-scripts/hwmgmt_kernel_patches.py post \ --patches $(PTCH_DIR) \ --non_up_patches $(NON_UP_PTCH_DIR) \ --kernel_version $(KERNEL_VERSION) \ - --hw_mgmt_ver ${MLNX_HW_MANAGEMENT_VERSION} \ + --hw_mgmt_ver "$$HWMGMT_PACKAGE_VERSION" \ --config_base_amd $(KCFG_BASE) \ --config_base_arm $(KCFG_BASE_ARM) \ --config_inc_amd $(KCFG_LIST) \ --config_inc_arm $(KCFG_LIST_ARM) \ --config_inc_down_amd $(KCFG_DOWN_LIST) \ --config_inc_down_arm $(KCFG_DOWN_LIST_ARM) \ + --config_base_aspeed $(KCFG_BASE_ASPEED) \ + --config_inc_aspeed $(KCFG_LIST_ASPEED) \ --series $(PTCH_LIST) \ --current_non_up_patches $(HWMGMT_NONUP_LIST) \ + --bmc_patches $(TEMP_HW_MGMT_DIR)/bmc_only_patches \ --build_root $(BUILD_WORKDIR) \ --sb_msg $(SB_COM_MSG) \ --slk_msg $(SLK_COM_MSG) $(LOG_SIMPLE) - + # Commit the changes in linux kernel and and log the diff pushd $(BUILD_WORKDIR)/src/sonic-linux-kernel git add -- patches-sonic/ - git add -- config.local/ + git add -- config.local/ echo -en "\n###-> series file changes in sonic-linux-kernel <-###\n" >> ${HWMGMT_USER_OUTFILE} git diff --no-color --staged -- patches-sonic/series >> ${HWMGMT_USER_OUTFILE} @@ -155,6 +233,12 @@ endif echo -en "\n###-> ARM64 config changes in sonic-linux-kernel <-###\n" >> ${HWMGMT_USER_OUTFILE} git diff --no-color --staged -- config.local/arm64/config.sonic-mellanox >> ${HWMGMT_USER_OUTFILE} + echo -en "\n###-> Platform config changes in sonic-linux-kernel <-###\n" >> ${HWMGMT_USER_OUTFILE} + git diff --no-color --staged -- config.local/ \ + ':!config.local/featureset-sonic/config' \ + ':!config.local/amd64/config.sonic' \ + ':!config.local/arm64/config.sonic-mellanox' >> ${HWMGMT_USER_OUTFILE} + echo -en '\n###-> Summary of files updated in sonic-linux-kernel <-###\n' >> ${HWMGMT_USER_OUTFILE} git diff --no-color --staged --stat --output=${TMPFILE_OUT} cat ${TMPFILE_OUT} | tee -a ${HWMGMT_USER_OUTFILE} @@ -165,11 +249,11 @@ endif # Commit the changes in buildimage and log the diff pushd $(BUILD_WORKDIR) git add -- $($(MLNX_HW_MANAGEMENT)_SRC_PATH) - git add -- $(PLATFORM_PATH)/non-upstream-patches/ - git add -- $(PLATFORM_PATH)/hw-management.mk + git add -- $(MLNX_PLATFORM_PATH)/non-upstream-patches/ + git add -- $(MLNX_PLATFORM_PATH)/hw-management.mk echo -en '\n###-> Non Upstream changes <-###\n' >> ${HWMGMT_USER_OUTFILE} - git diff --no-color --staged -- $(PLATFORM_PATH)/non-upstream-patches/ >> ${HWMGMT_USER_OUTFILE} + git diff --no-color --staged -- $(MLNX_PLATFORM_PATH)/non-upstream-patches/ >> ${HWMGMT_USER_OUTFILE} echo -en '\n###-> Non Upstream patch list file <-###\n' >> ${HWMGMT_USER_OUTFILE} git diff --no-color --staged -- $($(MLNX_HW_MANAGEMENT)_SRC_PATH)/hwmgmt_nonup_patches >> ${HWMGMT_USER_OUTFILE} @@ -178,10 +262,10 @@ endif git diff --no-color --staged -- $($(MLNX_HW_MANAGEMENT)_SRC_PATH)/hw-mgmt >> ${HWMGMT_USER_OUTFILE} echo -en '\n###-> hw-management make file version change <-###\n' >> ${HWMGMT_USER_OUTFILE} - git diff --no-color --staged -- $(PLATFORM_PATH)/hw-management.mk >> ${HWMGMT_USER_OUTFILE} - + git diff --no-color --staged -- $(MLNX_PLATFORM_PATH)/hw-management.mk >> ${HWMGMT_USER_OUTFILE} + echo -en '\n###-> Summary of buildimage changes <-###\n' >> ${HWMGMT_USER_OUTFILE} - git diff --no-color --staged --stat --output=${TMPFILE_OUT} -- $(PLATFORM_PATH) + git diff --no-color --staged --stat --output=${TMPFILE_OUT} -- $(MLNX_PLATFORM_PATH) cat ${TMPFILE_OUT} | tee -a ${HWMGMT_USER_OUTFILE} git diff --staged --quiet || git commit -m "$$(cat $(SB_COM_MSG))"; diff --git a/platform/mellanox/integration-scripts/helper.py b/platform/mellanox/integration-scripts/helper.py index 4d1ca0036ac..8ae51741069 100644 --- a/platform/mellanox/integration-scripts/helper.py +++ b/platform/mellanox/integration-scripts/helper.py @@ -1,5 +1,6 @@ # -# Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES. +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2023-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. # Apache-2.0 # # Licensed under the Apache License, Version 2.0 (the "License"); @@ -25,11 +26,13 @@ MLNX_ARM_KFG_SECTION = "mellanox-arm64" SDK_MARKER = "mellanox_sdk" HW_MGMT_MARKER = "mellanox_hw_mgmt" +MLNX_ASPEED_MARKER = "nvidia_aspeed_bmc" SLK_PATCH_LOC = "src/sonic-linux-kernel/patches-sonic/" SLK_KCONFIG_DIR = "src/sonic-linux-kernel/config.local/" SLK_KCONFIG = SLK_KCONFIG_DIR+"featureset-sonic/config" SLK_KCONFIG_AMD64 = SLK_KCONFIG_DIR+"amd64/config.sonic" -SLK_KCONFIG_ARM64 = SLK_KCONFIG_DIR+"arm64/config.sonic-mellanox" +SLK_KCONFIG_ARM64 = SLK_KCONFIG_DIR+"arm64/config.sonic-mellanox" +SLK_KCONFIG_ASPEED = SLK_KCONFIG_DIR+"arm64/config.sonic-aspeed" SLK_SERIES = SLK_PATCH_LOC + "series" NON_UP_PATCH_DIR = "platform/mellanox/non-upstream-patches/" NON_UP_PATCH_LOC = NON_UP_PATCH_DIR + "patches" @@ -140,11 +143,11 @@ def write_user_out(self): pass -def build_commit_description(changes): +def build_commit_description(changes, title="Patch List"): if not changes: return "" content = "\n" - content = content + " ## Patch List\n" + content = content + f" ## {title}\n" for key, value in changes.items(): content = content + f"* {key} : {value}\n" return content diff --git a/platform/mellanox/integration-scripts/hwmgmt_helper.py b/platform/mellanox/integration-scripts/hwmgmt_helper.py index be5fe77ee17..35312018c23 100644 --- a/platform/mellanox/integration-scripts/hwmgmt_helper.py +++ b/platform/mellanox/integration-scripts/hwmgmt_helper.py @@ -1,6 +1,7 @@ #!/usr/bin/env python # -# Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES. +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2023-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. # Apache-2.0 # # Licensed under the Apache License, Version 2.0 (the "License"); @@ -45,6 +46,11 @@ class KCFGData: noarch_incl = OrderedDict() noarch_excl = OrderedDict() noarch_down = OrderedDict() + # Aspeed BMC kconfig (populated when --config_base_aspeed is provided) + aspeed_base = OrderedDict() + aspeed_updated = OrderedDict() + aspeed_incl = OrderedDict() + aspeed_excl = OrderedDict() class KConfigTask(): @@ -64,7 +70,10 @@ def read_data(self): if os.path.isfile(self.args.config_inc_down_arm): print(" -> Downstream Config for arm64 found..") KCFGData.arm_down = FileHandler.read_kconfig(self.args.config_inc_down_arm) - return + + KCFGData.aspeed_base = FileHandler.read_kconfig(self.args.config_base_aspeed) + KCFGData.aspeed_updated = FileHandler.read_kconfig(self.args.config_inc_aspeed) + return def parse_inc_exc(self, base: OrderedDict, updated: OrderedDict): @@ -212,15 +221,70 @@ def get_downstream_kconfig_diff(self, common_config_upstream, amd64_config_upstr return all_lines + def get_aspeed_kconfig(self): + """ Rebuild the nvidia_aspeed_bmc block in config.sonic-aspeed. + Returns the rebuilt config lines. The block is rebuilt unconditionally so that + configs dropped by hw-mgmt (including a full drop of BMC support) are cleared. + Returns None when markers are absent AND there are no changes to apply + (backward compat with pre-BMC sonic-linux-kernel). Fatals when markers are + absent but changes would need to be written. + """ + aspeed_config_path = os.path.join(self.args.build_root, SLK_KCONFIG_ASPEED) + config = FileHandler.read_raw(aspeed_config_path) + + start, end = FileHandler.find_marker_indices(config, MLNX_ASPEED_MARKER) + if start < 0 or end >= len(config): + if KCFGData.aspeed_incl or KCFGData.aspeed_excl: + print("-> FATAL: {} markers not found in {}. " + "Please update sonic-linux-kernel to include the markers.".format( + MLNX_ASPEED_MARKER, SLK_KCONFIG_ASPEED)) + sys.exit(1) + print("-> NOTICE: {} markers not in {}, skipping aspeed kconfig update".format( + MLNX_ASPEED_MARKER, SLK_KCONFIG_ASPEED)) + return None + + final = OrderedDict( + list(KCFGData.aspeed_incl.items()) + + [(k, "n") for k in KCFGData.aspeed_excl.keys()] + ) + config = FileHandler.insert_kcfg_data(config, start, end, final) + print("\n -> INFO: aspeed kconfig file generated \n {}".format("".join(config))) + return config + + def perform(self): self.read_data() KCFGData.x86_incl, KCFGData.x86_excl = self.parse_inc_exc(KCFGData.x86_base, KCFGData.x86_updated) KCFGData.arm_incl, KCFGData.arm_excl = self.parse_inc_exc(KCFGData.arm_base, KCFGData.arm_updated) - self.parse_noarch_inc_exc() - # Get the updated common, amd64, arm64 configs for each file - common_config, amd64_config, arm64_config = self.get_upstream_kconfig() - FileHandler.write_lines(os.path.join(self.args.build_root, SLK_KCONFIG), common_config, True) - FileHandler.write_lines(os.path.join(self.args.build_root, SLK_KCONFIG_AMD64), amd64_config, True) - FileHandler.write_lines(os.path.join(self.args.build_root, SLK_KCONFIG_ARM64), arm64_config, True) - # return the downstream kconfig diff - return self.get_downstream_kconfig_diff(common_config, amd64_config, arm64_config) + + all_lines = [] + + # Standard amd64/arm64 kconfig processing. + # Skip if no changes — prevents erasing existing configs during aspeed-only builds + # (when deploy ran with --arch aspeed, x86/arm64 base == updated → no inclusions). + has_standard_changes = ( + KCFGData.x86_incl or KCFGData.x86_excl or + KCFGData.arm_incl or KCFGData.arm_excl or + KCFGData.x86_down or KCFGData.arm_down + ) + if has_standard_changes: + self.parse_noarch_inc_exc() + common_config, amd64_config, arm64_config = self.get_upstream_kconfig() + FileHandler.write_lines(os.path.join(self.args.build_root, SLK_KCONFIG), common_config, True) + FileHandler.write_lines(os.path.join(self.args.build_root, SLK_KCONFIG_AMD64), amd64_config, True) + FileHandler.write_lines(os.path.join(self.args.build_root, SLK_KCONFIG_ARM64), arm64_config, True) + all_lines = self.get_downstream_kconfig_diff(common_config, amd64_config, arm64_config) + + # Aspeed BMC kconfig — always rebuild the marker block so that configs dropped + # by hw-mgmt (including a full drop of BMC support) are cleared from disk. + KCFGData.aspeed_incl, KCFGData.aspeed_excl = self.parse_inc_exc( + KCFGData.aspeed_base, KCFGData.aspeed_updated + ) + aspeed_config = self.get_aspeed_kconfig() + if aspeed_config is not None: + FileHandler.write_lines( + os.path.join(self.args.build_root, SLK_KCONFIG_ASPEED), + aspeed_config, True + ) + + return all_lines diff --git a/platform/mellanox/integration-scripts/hwmgmt_kernel_patches.py b/platform/mellanox/integration-scripts/hwmgmt_kernel_patches.py index f419bfd7a4c..e447a696d5f 100755 --- a/platform/mellanox/integration-scripts/hwmgmt_kernel_patches.py +++ b/platform/mellanox/integration-scripts/hwmgmt_kernel_patches.py @@ -1,6 +1,7 @@ #!/usr/bin/env python # -# Copyright (c) 2023-2024 NVIDIA CORPORATION & AFFILIATES. +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2023-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. # Apache-2.0 # # Licensed under the Apache License, Version 2.0 (the "License"); @@ -46,8 +47,9 @@ def get_line_elements(line): columns = trim_array_str(columns_raw) return columns -def load_patch_table(path, k_ver): - patch_table_filename = os.path.join(path, PATCH_TABLE_NAME) +def load_patch_table(path, k_ver, table_name=None): + table_name = table_name or PATCH_TABLE_NAME + patch_table_filename = os.path.join(path, table_name) print("Loading patch table {} kver:{}".format(patch_table_filename, k_ver)) if not os.path.isfile(patch_table_filename): @@ -130,6 +132,8 @@ class Data: agg_slk_series = list() # kernel version k_ver = "" + # BMC-only patch names (inserted between nvidia_aspeed_bmc markers in series) + bmc_patches = list() class HwMgmtAction(Action): @@ -167,6 +171,10 @@ def check(self): return self.return_false("-> ERR: config_inclusion {} doesn't exist".format(self.args.config_inc_amd)) if not os.path.isfile(self.args.config_inc_arm): return self.return_false("-> ERR: config_inclusion {} doesn't exist".format(self.args.config_inc_arm)) + if not os.path.isfile(self.args.config_base_aspeed): + return self.return_false("-> ERR: config_base_aspeed {} doesn't exist".format(self.args.config_base_aspeed)) + if not os.path.isfile(self.args.config_inc_aspeed): + return self.return_false("-> ERR: config_inc_aspeed {} doesn't exist".format(self.args.config_inc_aspeed)) return True @@ -181,7 +189,8 @@ def perform(self): """ Move Base Kconfig to the loc pointed by config_inclusion """ shutil.copy2(self.args.config_base_amd, self.args.config_inc_amd) shutil.copy2(self.args.config_base_arm, self.args.config_inc_arm) - print("-> Kconfig amd64/arm64 copied to the relevant directory") + shutil.copy2(self.args.config_base_aspeed, self.args.config_inc_aspeed) + print("-> Kconfig amd64/arm64/aspeed copied to the relevant directory") class PostProcess(HwMgmtAction): @@ -245,6 +254,80 @@ def mv_new_up_mlnx(self): src_path = os.path.join(self.args.patches, patch) shutil.copy(src_path, os.path.join(self.args.build_root, SLK_PATCH_LOC)) + def read_bmc_patches(self): + """ Read BMC-only patch list and separate them from the standard hw-mgmt patches. """ + if not self.args.bmc_patches or not os.path.isfile(self.args.bmc_patches): + return + raw = FileHandler.read_strip_minimal(self.args.bmc_patches) + Data.bmc_patches = [p + "\n" for p in raw] + if Data.bmc_patches: + bmc_set = set(raw) + # Remove BMC patches from standard lists so they don't go into mellanox_hw_mgmt block + Data.new_up = [p for p in Data.new_up if p not in bmc_set] + Data.new_non_up = [p for p in Data.new_non_up if p not in bmc_set] + Data.new_series = [p for p in Data.new_series if p not in bmc_set] + print("\n -> POST: {} BMC patches separated:\n{}".format( + len(Data.bmc_patches), "".join(Data.bmc_patches))) + + def find_bmc_markers(self, series): + """ Return (start, end) of nvidia_aspeed_bmc markers in series; exit if absent. """ + start, end = FileHandler.find_marker_indices(series, MLNX_ASPEED_MARKER) + if start < 0 or end >= len(series): + print("-> FATAL: {} markers not found in {}. " + "Please update sonic-linux-kernel to include the markers.".format( + MLNX_ASPEED_MARKER, SLK_SERIES)) + sys.exit(1) + return start, end + + def rm_old_bmc_patches(self): + """ Delete old BMC patch files from patches-sonic/ (mirrors rm_old_up_mlnx). """ + series_path = os.path.join(self.args.build_root, SLK_SERIES) + old_series = FileHandler.read_raw(series_path) + start, end = self.find_bmc_markers(old_series) + print("\n -> POST: Removed the following old BMC patches:") + index = start + 1 + while index < end: + file_n = os.path.join(self.args.build_root, os.path.join(SLK_PATCH_LOC, old_series[index].strip())) + if os.path.isfile(file_n): + print(old_series[index].strip()) + os.remove(file_n) + index = index + 1 + + def write_bmc_series_block(self): + """ Rebuild the nvidia_aspeed_bmc block in the series file from Data.bmc_patches. + Mirrors the mellanox_hw_mgmt cleanup flow: rebuilding unconditionally ensures + patches dropped by hw-mgmt (including a full drop of BMC support) are cleared + from both the series file and patches-sonic/. + """ + # Gate on the argument (always supplied by the Makefile in BMC-capable builds); + # skip entirely when not provided so legacy/manual runs without BMC are unaffected. + if not self.args.bmc_patches or not os.path.isfile(self.args.bmc_patches): + return + + # Remove old BMC patch files first (same pattern as rm_old_up_mlnx) + self.rm_old_bmc_patches() + + # 1. Update in-memory series (written by write_final_slk_series earlier) between markers + start, end = self.find_bmc_markers(Data.up_slk_series) + Data.up_slk_series = FileHandler.insert_lines(Data.up_slk_series, start, end, Data.bmc_patches) + + start, end = self.find_bmc_markers(Data.agg_slk_series) + Data.agg_slk_series = FileHandler.insert_lines(Data.agg_slk_series, start, end, Data.bmc_patches) + + # 2. Write updated series to disk (block may be empty; that clears stale content) + series_path = os.path.join(self.args.build_root, SLK_SERIES) + FileHandler.write_lines(series_path, Data.up_slk_series, True) + print("\n -> POST: nvidia_aspeed_bmc block written to series ({} patches)".format(len(Data.bmc_patches))) + + # 3. Copy BMC patches to patches-sonic/ (no-op when Data.bmc_patches is empty) + for patch in Data.bmc_patches: + name = patch.strip() + src = os.path.join(self.args.patches, name) + if not os.path.isfile(src): + src = os.path.join(self.args.non_up_patches, name) + if os.path.isfile(src): + shutil.copy(src, os.path.join(self.args.build_root, SLK_PATCH_LOC)) + def write_final_slk_series(self): tmp_new_up = [d+"\n" for d in Data.new_up] Data.up_slk_series = Data.old_series[0:Data.i_mlnx_start+1] + tmp_new_up + Data.old_series[Data.i_mlnx_end:] @@ -373,7 +456,7 @@ def _fetch_description(self, patch, id_): return desc def create_commit_msg(self, table): - title = COMMIT_TITLE.format(self.args.hw_mgmt_ver) + title = COMMIT_TITLE.format(self.args.hw_mgmt_ver) changes_slk, changes_sb = {}, {} old_up_patches, old_non_up_patches = self.list_patches() print(old_up_patches) @@ -390,6 +473,20 @@ def create_commit_msg(self, table): print(f"-> INFO: Patch: {patch_}, Commit: {id_}, is not added") slk_commit_msg = title + "\n" + build_commit_description(changes_slk) sb_commit_msg = title + "\n" + build_commit_description(changes_sb) + + # Append BMC patch list to the SLK commit message from Patch_BMC_Status_Table.txt + path = os.path.join(self.args.build_root, PATCH_TABLE_LOC) + bmc_table = load_patch_table(path, Data.k_ver, "Patch_BMC_Status_Table.txt") + if bmc_table: + bmc_changes = {} + for patch in bmc_table: + patch_ = patch.get(PATCH_NAME) + if patch_: + id_ = self._fetch_description(patch_, patch.get(COMMIT_ID, "")) + bmc_changes[patch_] = id_ + if bmc_changes: + slk_commit_msg = slk_commit_msg + build_commit_description(bmc_changes, "BMC Patch List") + print(f"-> INFO: SLK Commit Message: \n {slk_commit_msg}") print(f"-> INFO: SB Commit Message: \n {sb_commit_msg}") return sb_commit_msg, slk_commit_msg @@ -399,6 +496,8 @@ def perform(self): and move to appropriate locations """ # Handle Patches related logic self.read_data() + # Separate BMC patches so they don't go into the mellanox_hw_mgmt block + self.read_bmc_patches() self.find_mlnx_hw_mgmt_markers() self.rm_old_up_mlnx() self.mv_new_up_mlnx() @@ -407,6 +506,8 @@ def perform(self): self.rm_old_non_up_mlnx() self.mv_new_non_up_mlnx() self.construct_series_with_non_up() + # Insert BMC patches between nvidia_aspeed_bmc markers in the series file + self.write_bmc_series_block() series_diff = self.get_series_diff() # handle kconfig and get any diff kcfg_diff = self.kcfg_handler.perform() @@ -414,7 +515,7 @@ def perform(self): path = os.path.join(self.args.build_root, PATCH_TABLE_LOC) patch_table = load_patch_table(path, Data.k_ver) - + sb_msg, slk_msg = self.create_commit_msg(patch_table) if self.args.sb_msg and sb_msg: @@ -443,6 +544,8 @@ def create_parser(): parser.add_argument("--config_inc_arm", type=str, required=True) parser.add_argument("--config_inc_down_amd", type=str) parser.add_argument("--config_inc_down_arm", type=str) + parser.add_argument("--config_base_aspeed", type=str, required=True) + parser.add_argument("--config_inc_aspeed", type=str, required=True) parser.add_argument("--series", type=str) parser.add_argument("--current_non_up_patches", type=str) parser.add_argument("--build_root", type=str) @@ -450,6 +553,8 @@ def create_parser(): parser.add_argument("--kernel_version", type=str, required=True) parser.add_argument("--sb_msg", type=str, required=False, default="") parser.add_argument("--slk_msg", type=str, required=False, default="") + parser.add_argument("--bmc_patches", type=str, required=False, default="", + help="File listing BMC-only patch names (one per line).") parser.add_argument("--is_test", action="store_true") return parser diff --git a/platform/mellanox/integration-scripts/hwmgmt_resolve_ref.py b/platform/mellanox/integration-scripts/hwmgmt_resolve_ref.py new file mode 100755 index 00000000000..7aa382f1ec7 --- /dev/null +++ b/platform/mellanox/integration-scripts/hwmgmt_resolve_ref.py @@ -0,0 +1,313 @@ +#!/usr/bin/env python +# +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +""" +Resolve MLNX_HW_MANAGEMENT_VERSION to a hw-mgmt git ref and write a +sourceable env file (shlex.quote'd). + +Precedence: tag V. wins, else branch . Tag flow is +byte-identical to today (HWMGMT_PACKAGE_VERSION == input); branch flow +appends "-" so two runs on the same branch at different commits +produce distinct deb filenames. Branches fetch first and fail if the +fetch fails — a stale local remote-tracking ref must not silently +shadow upstream. + +The changelog regex mirrors hw-mgmt's own get_hw_mgmt_ver() in +recipes-kernel/linux/deploy_kernel_patches.py. +""" + +import argparse +import os +import re +import shlex +import subprocess +import sys + + +# Permissive: real branch names like "feature/foo", "V.7.0010.1000_BR". +INPUT_RE = re.compile(r'^[A-Za-z0-9._/+~:-]+$') + +# Strict: deb-version-safe AND git-refname-safe. The parsed changelog +# version lands in `git checkout -B "..._"` under CREATE_BRANCH=y, +# so '~', '_', ':', '/' (legal in deb versions but not git refnames or deb +# filenames) are excluded. +PARSED_VERSION_RE = re.compile(r'^[A-Za-z0-9.+-]+$') + +# First line: "hw-management (1.mlnx.7.0060.1430) unstable; urgency=low" +CHANGELOG_RE = re.compile(r'^hw-management \(1\.mlnx\.([^)]+)\)') + +REMOTE = 'origin' +DISTINCT_ID_LEN = 9 # abbreviated commit SHA suffix on the branch path + +ENV_KEYS = ( + 'HWMGMT_INPUT', + 'HWMGMT_REF_TYPE', + 'HWMGMT_CHECKOUT_REF', + 'HWMGMT_COMMIT', + 'HWMGMT_BASE_VERSION', + 'HWMGMT_DISTINCT_ID', + 'HWMGMT_PACKAGE_VERSION', +) + + +def fail(msg): + print('-> FATAL: ' + msg, file=sys.stderr) + sys.exit(1) + + +def info(msg, verbose): + if verbose: + print(msg) + + +def run_git(repo, args): + cmd = ['git', '-C', repo] + list(args) + return subprocess.run( + cmd, + stdout=subprocess.PIPE, + stderr=subprocess.PIPE, + text=True, + ) + + +def rev_parse(repo, ref): + res = run_git(repo, ['rev-parse', '--verify', '--quiet', ref + '^{commit}']) + if res.returncode == 0: + return res.stdout.strip() + return None + + +def have_origin(repo): + res = run_git(repo, ['remote', 'get-url', REMOTE]) + return res.returncode == 0 + + +def is_shallow(repo): + res = run_git(repo, ['rev-parse', '--is-shallow-repository']) + return res.returncode == 0 and res.stdout.strip() == 'true' + + +def parse_changelog_version(repo, commit): + res = run_git(repo, ['show', '{}:debian/changelog'.format(commit)]) + if res.returncode != 0: + return None + first_line = res.stdout.splitlines()[0] if res.stdout else '' + m = CHANGELOG_RE.match(first_line) + return m.group(1) if m else None + + +def resolve_tag(repo, value, verbose): + """Resolve V. as a tag. Tags are immutable, so a local match is + final; only fetch from origin if the tag is missing locally. + Returns (checkout_ref, commit, fetch_stderr) or (None, None, stderr). + """ + tag_full_ref = 'refs/tags/V.{}'.format(value) + sha = rev_parse(repo, tag_full_ref) + if sha: + info('-> hw-mgmt: tag {} found locally'.format(tag_full_ref), verbose) + return 'V.{}'.format(value), sha, '' + if not have_origin(repo): + info('-> hw-mgmt: tag {} not local and no origin remote; cannot fetch'.format(tag_full_ref), verbose) + return None, None, 'tag missing locally and no origin remote configured' + info('-> hw-mgmt: tag {} not local, attempting targeted fetch'.format(tag_full_ref), verbose) + res = run_git(repo, ['fetch', REMOTE, 'tag', 'V.{}'.format(value)]) + info('-> hw-mgmt: fetch tag rc={} stderr={!r}'.format( + res.returncode, (res.stderr or '').strip()), verbose) + if res.returncode != 0: + return None, None, (res.stderr or '').strip() + sha = rev_parse(repo, tag_full_ref) + if sha: + return 'V.{}'.format(value), sha, '' + return None, None, '' + + +def resolve_branch(repo, value, verbose): + """Resolve as a branch. Branches move, so we force-fetch and + fail loudly if the fetch fails — never silently fall back to a + possibly-stale local remote-tracking ref. Local refs are only used in + offline mode (no `origin` configured). + Returns (checkout_ref, commit, fetch_stderr) or (None, None, stderr). + """ + # check-ref-format catches inputs like `..` or `.lock` that pass + # INPUT_RE but would produce cryptic git fetch errors. + chk = run_git(repo, ['check-ref-format', 'refs/heads/{}'.format(value)]) + if chk.returncode != 0: + info('-> hw-mgmt: branch input {!r} fails git check-ref-format'.format(value), verbose) + return None, None, 'invalid git branch refname: {!r}'.format(value) + + remote_ref = 'refs/remotes/{}/{}'.format(REMOTE, value) + local_ref = 'refs/heads/{}'.format(value) + + if have_origin(repo): + # '+' forces non-fast-forward updates; without it a force-pushed + # upstream is rejected and we'd cling to the stale local ref. + refspec = '+{}:{}'.format(local_ref, remote_ref) + info('-> hw-mgmt: fetching branch {} from origin (forced refresh)'.format(value), verbose) + res = run_git(repo, ['fetch', REMOTE, refspec]) + info('-> hw-mgmt: fetch branch rc={} stderr={!r}'.format( + res.returncode, (res.stderr or '').strip()), verbose) + if res.returncode == 0: + sha = rev_parse(repo, remote_ref) + if sha: + return remote_ref, sha, '' + fail('fetch returned 0 but {} did not resolve'.format(remote_ref)) + fetch_stderr = (res.stderr or '').strip() + if is_shallow(repo): + print( + '-> NOTICE: hw-mgmt submodule appears to be a shallow clone. ' + 'Run `git -C {} fetch --unshallow` and retry.'.format(repo), + file=sys.stderr, + ) + return None, None, fetch_stderr + + # Offline mode: no origin to refresh from, use whatever is local. + info('-> hw-mgmt: no origin remote; resolving branch from local refs only', verbose) + sha = rev_parse(repo, remote_ref) + if sha: + return remote_ref, sha, '' + sha = rev_parse(repo, local_ref) + if sha: + return local_ref, sha, '' + return None, None, 'no local branch ref and no origin to fetch from' + + +def write_env_atomically(env_file, values): + parent = os.path.dirname(env_file) + tmp = env_file + '.tmp' + try: + if parent: + os.makedirs(parent, exist_ok=True) + with open(tmp, 'w') as f: + for key in ENV_KEYS: + f.write('{}={}\n'.format(key, shlex.quote(values[key]))) + os.replace(tmp, env_file) + except OSError as e: + # Best-effort cleanup of the partial tmp; ignore errors so the + # original failure surfaces. + try: + os.unlink(tmp) + except OSError: + pass + fail('failed to write env file {!r}: {}'.format(env_file, e)) + + +def validate_input(value): + if not value: + fail('--input is empty') + if value.startswith('-'): + fail('--input must not start with "-": {!r}'.format(value)) + if not INPUT_RE.match(value): + fail( + '--input {!r} contains invalid characters; allowed: ' + '[A-Za-z0-9._/+~:-]'.format(value) + ) + + +def validate_repo(repo): + """Verify --repo is a git working tree. Origin is checked lazily by the + resolvers only when needed, so offline tag flows keep working.""" + if not os.path.isdir(repo): + fail('--repo {!r} does not exist'.format(repo)) + git_marker = os.path.join(repo, '.git') + if not (os.path.isdir(git_marker) or os.path.isfile(git_marker)): + fail('--repo {!r} is not a git working tree'.format(repo)) + + +def resolve(repo, value, verbose): + """Run resolution. Returns dict of env values. Calls fail() on error.""" + tag_ref, tag_commit, tag_err = resolve_tag(repo, value, verbose) + if tag_ref: + ref_type = 'tag' + ref_name = tag_ref + commit = tag_commit + base_version = value # Preserve byte-identical tag flow. + distinct_id = '' + package_version = base_version + else: + br_ref, br_commit, br_err = resolve_branch(repo, value, verbose) + if not br_ref: + details = [] + if tag_err: + details.append('tag fetch error: {}'.format(tag_err)) + if br_err: + details.append('branch fetch error: {}'.format(br_err)) + suffix = ' ({})'.format('; '.join(details)) if details else '' + fail( + 'hw-mgmt: neither tag {!r} nor branch {!r} could be resolved ' + 'in {}{}'.format('V.' + value, value, repo, suffix) + ) + ref_type = 'branch' + ref_name = br_ref + commit = br_commit + base_version = parse_changelog_version(repo, commit) + if not base_version: + fail( + 'hw-mgmt: branch {!r} resolved to {} but debian/changelog ' + 'version could not be parsed (expected first line ' + '"hw-management (1.mlnx.) ...")'.format(value, commit) + ) + if not PARSED_VERSION_RE.match(base_version): + fail( + 'hw-mgmt: parsed base version {!r} contains characters ' + 'that are not safe for deb filenames or git refnames; ' + 'allowed: [A-Za-z0-9.+-]'.format(base_version) + ) + distinct_id = commit[:DISTINCT_ID_LEN] + package_version = '{}-{}'.format(base_version, distinct_id) + + return { + 'HWMGMT_INPUT': value, + 'HWMGMT_REF_TYPE': ref_type, + 'HWMGMT_CHECKOUT_REF': ref_name, + 'HWMGMT_COMMIT': commit, + 'HWMGMT_BASE_VERSION': base_version, + 'HWMGMT_DISTINCT_ID': distinct_id, + 'HWMGMT_PACKAGE_VERSION': package_version, + } + + +def main(): + parser = argparse.ArgumentParser(description=__doc__) + parser.add_argument('--repo', required=True, help='Path to the hw-mgmt submodule working tree') + parser.add_argument('--input', required=True, help='User-provided MLNX_HW_MANAGEMENT_VERSION value') + parser.add_argument('--env-file', dest='env_file', required=True, help='Output env file path') + parser.add_argument('--verbose', action='store_true', help='Print full resolution trace') + args = parser.parse_args() + + validate_input(args.input) + validate_repo(args.repo) + + env = resolve(args.repo, args.input, args.verbose) + write_env_atomically(args.env_file, env) + + short = env['HWMGMT_COMMIT'][:DISTINCT_ID_LEN] + if env['HWMGMT_REF_TYPE'] == 'tag': + print('-> hw-mgmt: resolved tag {} -> {} (package version {})'.format( + env['HWMGMT_CHECKOUT_REF'], short, env['HWMGMT_PACKAGE_VERSION'])) + else: + print('-> hw-mgmt: resolved branch {} -> {} (base {} from changelog, ' + 'package version {})'.format( + env['HWMGMT_CHECKOUT_REF'], short, + env['HWMGMT_BASE_VERSION'], env['HWMGMT_PACKAGE_VERSION'])) + + return 0 + + +if __name__ == '__main__': + sys.exit(main()) diff --git a/platform/mellanox/integration-scripts/tests/data/aspeed_kconfig b/platform/mellanox/integration-scripts/tests/data/aspeed_kconfig new file mode 100644 index 00000000000..8a6abaa413b --- /dev/null +++ b/platform/mellanox/integration-scripts/tests/data/aspeed_kconfig @@ -0,0 +1,22 @@ +CONFIG_ARCH_ASPEED=y +CONFIG_NET_VENDOR_FARADAY=y +CONFIG_FTGMAC100=m +CONFIG_UNICODE=y +CONFIG_MCTP=y +CONFIG_SERIAL_8250_ASPEED_VUART=y +CONFIG_SERIAL_8250_ASPEED=y +CONFIG_I2C_AST2600=m +CONFIG_PINCTRL_ASPEED=y +CONFIG_PINCTRL_ASPEED_G7=y +CONFIG_GPIO_ASPEED=y +CONFIG_GPIO_ASPEED_SGPIO=y +CONFIG_ASPEED_WATCHDOG=y +CONFIG_ASPEED_MCTP=y +CONFIG_AST2700_ESPI=y +CONFIG_AST2700_RTC_OVER_ESPI=y +CONFIG_COMMON_CLK_AST2700=y +CONFIG_ASPEED_LPC_SNOOP=y +CONFIG_ASPEED_UART_ROUTING=y +CONFIG_ASPEED_SOCINFO=y +###-> nvidia_aspeed_bmc-start +###-> nvidia_aspeed_bmc-end diff --git a/platform/mellanox/integration-scripts/tests/data/expected_data/series b/platform/mellanox/integration-scripts/tests/data/expected_data/series index a95e7297036..c99b403eabf 100644 --- a/platform/mellanox/integration-scripts/tests/data/expected_data/series +++ b/platform/mellanox/integration-scripts/tests/data/expected_data/series @@ -54,6 +54,9 @@ 0188-i2c-mux-Add-register-map-based-mux-driver.patch ###-> mellanox_hw_mgmt-end +###-> nvidia_aspeed_bmc-start +###-> nvidia_aspeed_bmc-end + # Cisco patches for 5.10 kernel cisco-mtd-part.patch cisco-mdio-mux-support-acpi.patch diff --git a/platform/mellanox/integration-scripts/tests/data/kconfig/aspeed_base.config b/platform/mellanox/integration-scripts/tests/data/kconfig/aspeed_base.config new file mode 100644 index 00000000000..feb59c99373 --- /dev/null +++ b/platform/mellanox/integration-scripts/tests/data/kconfig/aspeed_base.config @@ -0,0 +1,8 @@ +CONFIG_I2C=y +CONFIG_SPI=y +CONFIG_THERMAL=n +CONFIG_HWMON=y +CONFIG_GPIO_SYSFS=n +CONFIG_MODULES=y +CONFIG_ASPEED_MCTP=y +CONFIG_I2C_AST2600=m diff --git a/platform/mellanox/integration-scripts/tests/data/kconfig/new_aspeed.config b/platform/mellanox/integration-scripts/tests/data/kconfig/new_aspeed.config new file mode 100644 index 00000000000..b65e216c266 --- /dev/null +++ b/platform/mellanox/integration-scripts/tests/data/kconfig/new_aspeed.config @@ -0,0 +1,12 @@ +CONFIG_I2C=y +CONFIG_SPI=y +CONFIG_THERMAL=n +CONFIG_HWMON=y +CONFIG_GPIO_SYSFS=y +CONFIG_MODULES=y +CONFIG_ASPEED_MCTP=y +CONFIG_I2C_AST2600=y +CONFIG_JTAG_ASPEED_INTERNAL=y +CONFIG_MELLANOX_PLATFORM=y +CONFIG_RTC_DRV_PCF85053A=y +CONFIG_NVSW_BMC_HID162=m diff --git a/platform/mellanox/integration-scripts/tests/data/series b/platform/mellanox/integration-scripts/tests/data/series index 3130b7f175c..4f7d2f25e71 100755 --- a/platform/mellanox/integration-scripts/tests/data/series +++ b/platform/mellanox/integration-scripts/tests/data/series @@ -41,6 +41,9 @@ 0008-i2c-mux-mlxcpld-Get-rid-of-adapter-numbers-enfo.patch ###-> mellanox_hw_mgmt-end +###-> nvidia_aspeed_bmc-start +###-> nvidia_aspeed_bmc-end + # Cisco patches for 5.10 kernel cisco-mtd-part.patch cisco-mdio-mux-support-acpi.patch diff --git a/platform/mellanox/integration-scripts/tests/test_hwmgmt_resolve_ref.py b/platform/mellanox/integration-scripts/tests/test_hwmgmt_resolve_ref.py new file mode 100644 index 00000000000..87604b60ca5 --- /dev/null +++ b/platform/mellanox/integration-scripts/tests/test_hwmgmt_resolve_ref.py @@ -0,0 +1,655 @@ +# +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +""" +Unit tests for hwmgmt_resolve_ref. + +Uses real `git` against tmp directories to exercise the resolver end-to-end, +including the targeted-fetch fallback. No pyfakefs dependency, so these tests +run in any environment with python3 and git. +""" + +import os +import shlex +import shutil +import subprocess +import sys +import tempfile +import unittest +from unittest import mock + +sys.path.append(os.path.join(os.path.dirname(__file__), '..')) +import hwmgmt_resolve_ref as resolver + + +def run(cmd, cwd=None, check=True, env=None): + return subprocess.run( + cmd, cwd=cwd, check=check, capture_output=True, text=True, env=env + ) + + +def init_repo(path): + os.makedirs(path, exist_ok=True) + run(['git', 'init', '-q', '-b', 'master', path]) + run(['git', 'config', 'user.email', 'test@example.com'], cwd=path) + run(['git', 'config', 'user.name', 'Test'], cwd=path) + run(['git', 'config', 'commit.gpgsign', 'false'], cwd=path) + + +def commit_changelog(repo, version, msg='c'): + """Write debian/changelog with given version and commit. Return commit SHA.""" + cl_dir = os.path.join(repo, 'debian') + os.makedirs(cl_dir, exist_ok=True) + with open(os.path.join(cl_dir, 'changelog'), 'w') as f: + f.write('hw-management (1.mlnx.{}) unstable; urgency=low\n'.format(version)) + f.write(' [ MLNX ]\n\n') + f.write(' -- NBU BSP Thu, 30 Apr 2026 17:04:57 +0300\n') + run(['git', 'add', 'debian/changelog'], cwd=repo) + run(['git', 'commit', '-q', '-m', msg], cwd=repo) + return run(['git', 'rev-parse', 'HEAD'], cwd=repo).stdout.strip() + + +def commit_raw_changelog(repo, content, msg='c'): + """Write debian/changelog with raw content (used to test malformed parsing).""" + cl_dir = os.path.join(repo, 'debian') + os.makedirs(cl_dir, exist_ok=True) + with open(os.path.join(cl_dir, 'changelog'), 'w') as f: + f.write(content) + run(['git', 'add', 'debian/changelog'], cwd=repo) + run(['git', 'commit', '-q', '-m', msg], cwd=repo) + return run(['git', 'rev-parse', 'HEAD'], cwd=repo).stdout.strip() + + +def commit_blob(repo, name='README.md', text='hello', msg='c'): + """Commit an arbitrary file (used when we don't need a changelog).""" + with open(os.path.join(repo, name), 'w') as f: + f.write(text) + run(['git', 'add', name], cwd=repo) + run(['git', 'commit', '-q', '-m', msg], cwd=repo) + return run(['git', 'rev-parse', 'HEAD'], cwd=repo).stdout.strip() + + +def create_tag(repo, tag, ref='HEAD'): + run(['git', 'tag', tag, ref], cwd=repo) + + +def create_branch(repo, branch, ref='HEAD'): + run(['git', 'branch', branch, ref], cwd=repo) + + +def add_origin(repo, url): + run(['git', 'remote', 'add', 'origin', url], cwd=repo) + + +def read_env(env_file): + """Source the env file in bash and dump key=value lines for inspection.""" + if not os.path.isfile(env_file): + return {} + keys = ['HWMGMT_INPUT', 'HWMGMT_REF_TYPE', 'HWMGMT_CHECKOUT_REF', + 'HWMGMT_COMMIT', 'HWMGMT_BASE_VERSION', + 'HWMGMT_DISTINCT_ID', 'HWMGMT_PACKAGE_VERSION'] + cmd = '. ' + shlex.quote(env_file) + '; ' + '; '.join( + 'printf "%s=%s\\n" {} "${}"'.format(k, '{' + k + '}') for k in keys + ) + res = subprocess.run(['bash', '-c', cmd], capture_output=True, text=True) + out = {} + for line in res.stdout.splitlines(): + if '=' in line: + k, _, v = line.partition('=') + out[k] = v + return out + + +def call_resolver(repo, input_value, env_file, verbose=False): + """Invoke main() in-process and capture exit code + stdout/stderr.""" + argv = ['hwmgmt_resolve_ref.py', + '--repo', repo, + '--input', input_value, + '--env-file', env_file] + if verbose: + argv.append('--verbose') + + from io import StringIO + stdout, stderr = StringIO(), StringIO() + code = 0 + with mock.patch.object(sys, 'argv', argv): + with mock.patch.object(sys, 'stdout', stdout): + with mock.patch.object(sys, 'stderr', stderr): + try: + resolver.main() + except SystemExit as e: + code = e.code if isinstance(e.code, int) else 1 + return code, stdout.getvalue(), stderr.getvalue() + + +class _GitFixture(unittest.TestCase): + """Base class providing tmp dirs and clean teardown.""" + + def setUp(self): + self.tmpdir = tempfile.mkdtemp(prefix='hwmgmt-resolve-test-') + self.env_file = os.path.join(self.tmpdir, 'resolved.env') + + def tearDown(self): + shutil.rmtree(self.tmpdir, ignore_errors=True) + + +class TestTagPath(_GitFixture): + """Tag flow regression cases (preserve byte-identical existing behavior).""" + + def test_01_tag_success(self): + """Case 1: tag V.7.0001.0026 exists locally; package version == input (byte-identical to today).""" + repo = os.path.join(self.tmpdir, 'repo') + init_repo(repo) + sha = commit_blob(repo) + create_tag(repo, 'V.7.0001.0026') + bare = os.path.join(self.tmpdir, 'origin.git') + run(['git', 'clone', '-q', '--bare', repo, bare]) + add_origin(repo, bare) + + code, stdout, stderr = call_resolver(repo, '7.0001.0026', self.env_file) + self.assertEqual(code, 0, msg='stderr={}'.format(stderr)) + env = read_env(self.env_file) + self.assertEqual(env['HWMGMT_REF_TYPE'], 'tag') + self.assertEqual(env['HWMGMT_CHECKOUT_REF'], 'V.7.0001.0026') + self.assertEqual(env['HWMGMT_COMMIT'], sha) + self.assertEqual(env['HWMGMT_INPUT'], '7.0001.0026') + # Tag flow: package version is the user input verbatim, no distinct id. + self.assertEqual(env['HWMGMT_BASE_VERSION'], '7.0001.0026') + self.assertEqual(env['HWMGMT_DISTINCT_ID'], '') + self.assertEqual(env['HWMGMT_PACKAGE_VERSION'], '7.0001.0026') + + def test_02_tag_wins_over_branch(self): + """Case 2: tag V.same-name and branch same-name at different commits — tag wins.""" + repo = os.path.join(self.tmpdir, 'repo') + init_repo(repo) + sha_a = commit_blob(repo, msg='A') + create_tag(repo, 'V.same-name', sha_a) + sha_b = commit_blob(repo, name='B.md', msg='B') + create_branch(repo, 'same-name', sha_b) + bare = os.path.join(self.tmpdir, 'origin.git') + run(['git', 'clone', '-q', '--bare', repo, bare]) + add_origin(repo, bare) + + code, _, stderr = call_resolver(repo, 'same-name', self.env_file) + self.assertEqual(code, 0, msg='stderr={}'.format(stderr)) + env = read_env(self.env_file) + self.assertEqual(env['HWMGMT_REF_TYPE'], 'tag') + self.assertEqual(env['HWMGMT_COMMIT'], sha_a) + # Tag path: BASE = input verbatim, no distinct id, PACKAGE = BASE. + self.assertEqual(env['HWMGMT_BASE_VERSION'], 'same-name') + self.assertEqual(env['HWMGMT_DISTINCT_ID'], '') + self.assertEqual(env['HWMGMT_PACKAGE_VERSION'], 'same-name') + + def test_02b_tag_offline_no_origin(self): + """Tag flow must work in a repo with no 'origin' remote when the tag is local + (backward compat with offline / pre-prepared trees).""" + repo = os.path.join(self.tmpdir, 'repo') + init_repo(repo) + sha = commit_blob(repo) + create_tag(repo, 'V.1.0.0') + # Deliberately do NOT add any remote. + + code, stdout, stderr = call_resolver(repo, '1.0.0', self.env_file) + self.assertEqual(code, 0, + msg='offline tag resolution must succeed; stderr={}'.format(stderr)) + env = read_env(self.env_file) + self.assertEqual(env['HWMGMT_REF_TYPE'], 'tag') + self.assertEqual(env['HWMGMT_PACKAGE_VERSION'], '1.0.0') + + def test_02c_tag_fetched_from_origin(self): + """Remote-only tag: not local, present on origin → resolver fetches and resolves.""" + upstream = os.path.join(self.tmpdir, 'upstream') + init_repo(upstream) + sha = commit_blob(upstream) + create_tag(upstream, 'V.7.0001.0026', sha) + + bare = os.path.join(self.tmpdir, 'origin.git') + run(['git', 'clone', '-q', '--bare', upstream, bare]) + + # Local repo: init + add origin pointing at bare, do NOT fetch tags. + local = os.path.join(self.tmpdir, 'local') + init_repo(local) + commit_blob(local) + add_origin(local, bare) + + # Sanity: tag is not yet local. + self.assertIsNone(resolver.rev_parse(local, 'refs/tags/V.7.0001.0026')) + + code, stdout, stderr = call_resolver(local, '7.0001.0026', self.env_file) + self.assertEqual(code, 0, + msg='remote-only tag resolution must succeed; stderr={}'.format(stderr)) + env = read_env(self.env_file) + self.assertEqual(env['HWMGMT_REF_TYPE'], 'tag') + self.assertEqual(env['HWMGMT_COMMIT'], sha) + self.assertEqual(env['HWMGMT_PACKAGE_VERSION'], '7.0001.0026') + # Tag is now local after the fetch. + self.assertEqual(resolver.rev_parse(local, 'refs/tags/V.7.0001.0026'), sha) + + +class TestBranchPath(_GitFixture): + """Branch fallback flow with debian/changelog version parsing.""" + + def test_03_branch_fallback_changelog_version(self): + """Case 3: branch resolves; BASE from changelog, PACKAGE = BASE-.""" + repo = os.path.join(self.tmpdir, 'repo') + init_repo(repo) + commit_changelog(repo, '7.0050.0000', msg='base') + sha_branch = commit_changelog(repo, '7.0060.1430', msg='bump') + # Reset master to the base commit so 'bmc-draft' diverges. + run(['git', 'reset', '-q', '--hard', 'HEAD~1'], cwd=repo) + create_branch(repo, 'bmc-draft', sha_branch) + bare = os.path.join(self.tmpdir, 'origin.git') + run(['git', 'clone', '-q', '--bare', repo, bare]) + add_origin(repo, bare) + + code, _, stderr = call_resolver(repo, 'bmc-draft', self.env_file) + self.assertEqual(code, 0, msg='stderr={}'.format(stderr)) + env = read_env(self.env_file) + self.assertEqual(env['HWMGMT_REF_TYPE'], 'branch') + self.assertEqual(env['HWMGMT_COMMIT'], sha_branch) + self.assertEqual(env['HWMGMT_BASE_VERSION'], '7.0060.1430') + self.assertEqual(env['HWMGMT_DISTINCT_ID'], sha_branch[:9]) + self.assertEqual(env['HWMGMT_PACKAGE_VERSION'], + '7.0060.1430-{}'.format(sha_branch[:9])) + + def test_04_branch_with_slash(self): + """Case 4: branch name 'feature/foo' resolves and produces a sane suffixed package version.""" + repo = os.path.join(self.tmpdir, 'repo') + init_repo(repo) + sha = commit_changelog(repo, '7.0060.1430') + create_branch(repo, 'feature/foo', sha) + bare = os.path.join(self.tmpdir, 'origin.git') + run(['git', 'clone', '-q', '--bare', repo, bare]) + add_origin(repo, bare) + + code, _, stderr = call_resolver(repo, 'feature/foo', self.env_file) + self.assertEqual(code, 0, msg='stderr={}'.format(stderr)) + env = read_env(self.env_file) + self.assertEqual(env['HWMGMT_REF_TYPE'], 'branch') + self.assertEqual(env['HWMGMT_BASE_VERSION'], '7.0060.1430') + self.assertEqual(env['HWMGMT_PACKAGE_VERSION'], + '7.0060.1430-{}'.format(sha[:9])) + # The unsafe '/' in the input must NOT propagate into the package version. + self.assertNotIn('/', env['HWMGMT_PACKAGE_VERSION']) + + def test_05_remote_branch_needs_fetch(self): + """Case 5: local has no remote-tracking branch; resolver fetches from origin first.""" + upstream = os.path.join(self.tmpdir, 'upstream') + init_repo(upstream) + sha = commit_changelog(upstream, '7.0060.1430') + create_branch(upstream, 'bmc-draft', sha) + + bare = os.path.join(self.tmpdir, 'origin.git') + run(['git', 'clone', '-q', '--bare', upstream, bare]) + + # Local repo: init + add origin pointing at bare, do NOT fetch. + local = os.path.join(self.tmpdir, 'local') + init_repo(local) + commit_blob(local) + add_origin(local, bare) + + self.assertIsNone(resolver.rev_parse(local, 'refs/remotes/origin/bmc-draft')) + + code, _, stderr = call_resolver(local, 'bmc-draft', self.env_file) + self.assertEqual(code, 0, msg='stderr={}'.format(stderr)) + env = read_env(self.env_file) + self.assertEqual(env['HWMGMT_REF_TYPE'], 'branch') + self.assertEqual(env['HWMGMT_COMMIT'], sha) + self.assertEqual(env['HWMGMT_PACKAGE_VERSION'], + '7.0060.1430-{}'.format(sha[:9])) + + def test_05b_branch_fetch_first_picks_up_upstream_advance(self): + """Resolver must fetch before resolving, so an upstream advance is picked up + even when refs/remotes/origin/ already exists locally pointing at + the old commit (regression test for fast-forward stale-ref bug).""" + upstream = os.path.join(self.tmpdir, 'upstream') + init_repo(upstream) + sha_old = commit_changelog(upstream, '7.0050.0000', msg='old') + create_branch(upstream, 'moving', sha_old) + + bare = os.path.join(self.tmpdir, 'origin.git') + run(['git', 'clone', '-q', '--bare', upstream, bare]) + + local = os.path.join(self.tmpdir, 'local') + run(['git', 'clone', '-q', bare, local]) + run(['git', 'config', 'user.email', 'test@example.com'], cwd=local) + run(['git', 'config', 'user.name', 'Test'], cwd=local) + + # Sanity: local already has the old commit as origin/moving. + before = resolver.rev_parse(local, 'refs/remotes/origin/moving') + self.assertEqual(before, sha_old) + + # Upstream advances past the local ref (fast-forward). + sha_new = commit_changelog(upstream, '7.0060.1430', msg='new') + run(['git', 'branch', '-f', 'moving', sha_new], cwd=upstream) + # Push the new commit to the bare so 'origin' has it. + run(['git', 'push', '-q', '-f', bare, 'moving:moving'], cwd=upstream) + + code, _, stderr = call_resolver(local, 'moving', self.env_file) + self.assertEqual(code, 0, msg='stderr={}'.format(stderr)) + env = read_env(self.env_file) + # The fetch must have run and picked up sha_new, NOT sha_old. + self.assertEqual(env['HWMGMT_COMMIT'], sha_new, + msg='resolver used stale local ref instead of fetching') + self.assertEqual(env['HWMGMT_BASE_VERSION'], '7.0060.1430') + + def test_05c_branch_force_rewind_picks_up_unrelated_tip(self): + """Force-pushed/rebased upstream branch (non-fast-forward update) must NOT + leave the resolver pegged on the stale local remote-tracking ref. Regression + test for the missing '+' on the fetch refspec. + """ + upstream = os.path.join(self.tmpdir, 'upstream') + init_repo(upstream) + # Initial 'moving' tip: a chain of two commits, branch points at HEAD. + commit_changelog(upstream, '7.0050.0000', msg='base') + sha_old = commit_changelog(upstream, '7.0060.0000', msg='old-tip') + run(['git', 'branch', '-f', 'moving', sha_old], cwd=upstream) + + bare = os.path.join(self.tmpdir, 'origin.git') + run(['git', 'clone', '-q', '--bare', upstream, bare]) + + local = os.path.join(self.tmpdir, 'local') + run(['git', 'clone', '-q', bare, local]) + run(['git', 'config', 'user.email', 'test@example.com'], cwd=local) + run(['git', 'config', 'user.name', 'Test'], cwd=local) + + # Local has origin/moving pointing at sha_old. + self.assertEqual( + resolver.rev_parse(local, 'refs/remotes/origin/moving'), sha_old) + + # Upstream rewinds 'moving' to an EARLIER commit (non-fast-forward + # from the local view). Without '+' in the fetch refspec, git fetch + # rejects this update. + run(['git', 'reset', '-q', '--hard', 'HEAD~1'], cwd=upstream) + sha_new = run(['git', 'rev-parse', 'HEAD'], cwd=upstream).stdout.strip() + run(['git', 'branch', '-f', 'moving', sha_new], cwd=upstream) + run(['git', 'push', '-q', '-f', bare, 'moving:moving'], cwd=upstream) + self.assertNotEqual(sha_new, sha_old) + + code, _, stderr = call_resolver(local, 'moving', self.env_file) + self.assertEqual(code, 0, msg='stderr={}'.format(stderr)) + env = read_env(self.env_file) + # If the resolver fetches with '+', it will pick up sha_new. Without + # '+' it falls back to the stale local ref pointing at sha_old. + self.assertEqual( + env['HWMGMT_COMMIT'], sha_new, + msg='resolver clung to stale local ref after force-update') + + +class TestFailureCases(_GitFixture): + """Failure modes — all must exit non-zero with a useful message.""" + + def _make_repo_with_branch(self, branch_name, changelog_content=None, version=None): + repo = os.path.join(self.tmpdir, 'repo') + init_repo(repo) + if changelog_content is not None: + sha = commit_raw_changelog(repo, changelog_content) + elif version is not None: + sha = commit_changelog(repo, version) + else: + sha = commit_blob(repo) + create_branch(repo, branch_name, sha) + bare = os.path.join(self.tmpdir, 'origin.git') + run(['git', 'clone', '-q', '--bare', repo, bare]) + add_origin(repo, bare) + return repo + + def test_06_branch_changelog_malformed(self): + """Case 6: branch resolves, changelog first line doesn't match the regex.""" + repo = self._make_repo_with_branch( + 'bar', + changelog_content='garbage (oops) unstable; urgency=low\n', + ) + code, _, stderr = call_resolver(repo, 'bar', self.env_file) + self.assertNotEqual(code, 0) + self.assertIn('debian/changelog', stderr) + self.assertFalse(os.path.isfile(self.env_file), + 'env file must not exist on failure') + + def test_07_branch_parsed_version_unsafe(self): + """Case 7: changelog version contains '/' — must be rejected.""" + repo = self._make_repo_with_branch( + 'baz', + changelog_content='hw-management (1.mlnx.7.0060.1430_dev/foo) unstable;\n', + ) + code, _, stderr = call_resolver(repo, 'baz', self.env_file) + self.assertNotEqual(code, 0) + self.assertIn('not safe for deb filenames', stderr) + + def test_08_neither_tag_nor_branch(self): + """Case 8: input matches no tag and no branch — error mentions both.""" + repo = os.path.join(self.tmpdir, 'repo') + init_repo(repo) + commit_blob(repo) + bare = os.path.join(self.tmpdir, 'origin.git') + run(['git', 'clone', '-q', '--bare', repo, bare]) + add_origin(repo, bare) + + code, _, stderr = call_resolver(repo, 'does-not-exist', self.env_file) + self.assertNotEqual(code, 0) + self.assertIn('V.does-not-exist', stderr) + self.assertIn("'does-not-exist'", stderr) + self.assertIn('neither', stderr) + + def test_09_empty_input(self): + """Case 9: --input '' fails before any git op.""" + repo = os.path.join(self.tmpdir, 'repo') + init_repo(repo) + commit_blob(repo) + bare = os.path.join(self.tmpdir, 'origin.git') + run(['git', 'clone', '-q', '--bare', repo, bare]) + add_origin(repo, bare) + + code, _, stderr = call_resolver(repo, '', self.env_file) + self.assertNotEqual(code, 0) + self.assertIn('empty', stderr) + + def test_10_no_origin_remote_and_no_local_match(self): + """Repo has no 'origin' remote AND no local tag/branch matches the input. + + The resolver must still fail (since there's nothing to resolve), but + the offline-tag-with-local-match case is covered separately by + test_02b_tag_offline_no_origin to confirm absence of `origin` is + no longer a blocking precondition. + """ + repo = os.path.join(self.tmpdir, 'repo') + init_repo(repo) + commit_blob(repo) + # No tags or matching branches. + + code, _, stderr = call_resolver(repo, '7.0001.0026', self.env_file) + self.assertNotEqual(code, 0) + # The error should mention both attempts, and may mention origin in + # the diagnostic detail since the fetch could not run. + self.assertIn('neither', stderr) + + def test_11_branch_fetch_fails_when_origin_invalid(self): + """Case 11: origin URL is bogus, fetch fails, error surfaces.""" + repo = os.path.join(self.tmpdir, 'repo') + init_repo(repo) + commit_blob(repo) + # Point origin at a path that doesn't exist; fetches will fail. + add_origin(repo, os.path.join(self.tmpdir, 'nonexistent.git')) + + code, _, stderr = call_resolver(repo, 'never-existed', self.env_file) + self.assertNotEqual(code, 0) + self.assertIn('neither', stderr) + + def test_11b_no_silent_fallback_to_stale_remote_tracking_ref(self): + """When origin exists but fetch fails AND a stale local + refs/remotes/origin/ exists, the resolver must NOT silently + use the stale ref. Regression test for the 'fetch failed → use + whatever's local' anti-pattern. + """ + # Set up a real remote with the branch, clone locally so the stale + # remote-tracking ref exists, then break the origin URL so any future + # fetch fails. + upstream = os.path.join(self.tmpdir, 'upstream') + init_repo(upstream) + sha = commit_changelog(upstream, '7.0050.0000') + create_branch(upstream, 'mybranch', sha) + + bare = os.path.join(self.tmpdir, 'origin.git') + run(['git', 'clone', '-q', '--bare', upstream, bare]) + + local = os.path.join(self.tmpdir, 'local') + run(['git', 'clone', '-q', bare, local]) + # Sanity: the stale remote-tracking ref is now local. + self.assertEqual( + resolver.rev_parse(local, 'refs/remotes/origin/mybranch'), sha) + + # Break the origin URL so subsequent fetches fail. + run(['git', 'remote', 'set-url', 'origin', + os.path.join(self.tmpdir, 'gone.git')], cwd=local) + + code, _, stderr = call_resolver(local, 'mybranch', self.env_file) + self.assertNotEqual(code, 0, + msg='resolver must fail rather than use stale ref') + # No env file should be written on failure. + self.assertFalse(os.path.isfile(self.env_file)) + + def test_12a_invalid_input_chars(self): + """Whitespace and shell metacharacters are rejected at the input layer.""" + repo = os.path.join(self.tmpdir, 'repo') + init_repo(repo) + commit_blob(repo) + bare = os.path.join(self.tmpdir, 'origin.git') + run(['git', 'clone', '-q', '--bare', repo, bare]) + add_origin(repo, bare) + + for bad in ['has space', 'has;semicolon', 'has`tick`', 'has$dollar']: + code, _, stderr = call_resolver(repo, bad, self.env_file) + self.assertNotEqual(code, 0, + msg='input {!r} should have been rejected'.format(bad)) + self.assertIn('invalid characters', stderr) + + def test_12c_invalid_git_refname_branch(self): + """Inputs that pass INPUT_RE but fail Git's refname rules (e.g. contain + '..' or end with '.lock') must be rejected on the branch path by + git check-ref-format, with a clean diagnostic rather than a cryptic + git fetch failure.""" + repo = os.path.join(self.tmpdir, 'repo') + init_repo(repo) + commit_blob(repo) + bare = os.path.join(self.tmpdir, 'origin.git') + run(['git', 'clone', '-q', '--bare', repo, bare]) + add_origin(repo, bare) + + # These inputs all pass INPUT_RE (only contain chars from the + # permissive set) but fail Git's stricter refname rules, so the + # check-ref-format guard is the layer that rejects them. + for bad in ['has..dotdot', 'ends.lock']: + code, _, stderr = call_resolver(repo, bad, self.env_file) + self.assertNotEqual(code, 0, + msg='input {!r} should have been rejected'.format(bad)) + self.assertIn('invalid git branch refname', stderr, + msg='input {!r} should be flagged by check-ref-format'.format(bad)) + + def test_12b_input_starts_with_dash(self): + """Inputs starting with '-' must be rejected by our own validation. + + Pass via --input= form so argparse doesn't treat the value as a flag; + this exercises the resolver's own dash-prefix check. + """ + repo = os.path.join(self.tmpdir, 'repo') + init_repo(repo) + commit_blob(repo) + bare = os.path.join(self.tmpdir, 'origin.git') + run(['git', 'clone', '-q', '--bare', repo, bare]) + add_origin(repo, bare) + + argv = ['hwmgmt_resolve_ref.py', + '--repo', repo, + '--input=-rf', + '--env-file', self.env_file] + from io import StringIO + stdout, stderr = StringIO(), StringIO() + code = 0 + with mock.patch.object(sys, 'argv', argv): + with mock.patch.object(sys, 'stdout', stdout): + with mock.patch.object(sys, 'stderr', stderr): + try: + resolver.main() + except SystemExit as e: + code = e.code if isinstance(e.code, int) else 1 + self.assertNotEqual(code, 0) + self.assertIn('must not start with', stderr.getvalue()) + + +class TestEnvFileFormat(_GitFixture): + """Verify the env file format and atomicity invariants.""" + + def test_14_atomic_write_no_tmp_left_behind(self): + """After a successful run, no .tmp file should remain alongside the env file.""" + repo = os.path.join(self.tmpdir, 'repo') + init_repo(repo) + commit_blob(repo) + create_tag(repo, 'V.1.0.0') + bare = os.path.join(self.tmpdir, 'origin.git') + run(['git', 'clone', '-q', '--bare', repo, bare]) + add_origin(repo, bare) + + for _ in range(3): + code, _, _ = call_resolver(repo, '1.0.0', self.env_file) + self.assertEqual(code, 0) + self.assertFalse(os.path.isfile(self.env_file + '.tmp'), + 'temp file leaked after successful run') + self.assertTrue(os.path.isfile(self.env_file)) + + def test_16_env_file_write_failure_clean_diagnostic(self): + """Env-file write failures must emit -> FATAL:, not a Python traceback.""" + repo = os.path.join(self.tmpdir, 'repo') + init_repo(repo) + commit_blob(repo) + create_tag(repo, 'V.1.0.0') + + # Path-is-a-directory case + bad_dir = os.path.join(self.tmpdir, 'is_a_dir') + os.makedirs(bad_dir, exist_ok=True) + code, _, stderr = call_resolver(repo, '1.0.0', bad_dir) + self.assertNotEqual(code, 0) + self.assertIn('FATAL', stderr) + self.assertIn('failed to write env file', stderr) + self.assertNotIn('Traceback', stderr) + # No leftover .tmp file alongside the directory. + self.assertFalse(os.path.isfile(bad_dir + '.tmp')) + + def test_15_values_with_special_chars_quoted_safely(self): + """Branch names with '/' must round-trip through the env file unchanged. + With fetch-first behavior in effect (origin present), the resolver must + select the remote-tracking ref.""" + repo = os.path.join(self.tmpdir, 'repo') + init_repo(repo) + sha = commit_changelog(repo, '7.0060.1430') + create_branch(repo, 'feature/foo', sha) + bare = os.path.join(self.tmpdir, 'origin.git') + run(['git', 'clone', '-q', '--bare', repo, bare]) + add_origin(repo, bare) + + code, _, stderr = call_resolver(repo, 'feature/foo', self.env_file) + self.assertEqual(code, 0, msg='stderr={}'.format(stderr)) + env = read_env(self.env_file) + self.assertEqual(env['HWMGMT_INPUT'], 'feature/foo') + # Origin is present and the fetch succeeds, so the checkout ref must + # be the remote-tracking form. + self.assertEqual(env['HWMGMT_CHECKOUT_REF'], + 'refs/remotes/origin/feature/foo') + self.assertEqual(env['HWMGMT_COMMIT'], sha) + + +if __name__ == '__main__': + unittest.main() diff --git a/platform/mellanox/integration-scripts/tests/test_hwmgmtaction.py b/platform/mellanox/integration-scripts/tests/test_hwmgmtaction.py index e06b35e9dc5..8c26dc402fa 100644 --- a/platform/mellanox/integration-scripts/tests/test_hwmgmtaction.py +++ b/platform/mellanox/integration-scripts/tests/test_hwmgmtaction.py @@ -1,5 +1,6 @@ # -# Copyright (c) 2023-2024 NVIDIA CORPORATION & AFFILIATES. +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2023-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. # Apache-2.0 # # Licensed under the Apache License, Version 2.0 (the "License"); @@ -99,13 +100,15 @@ def mock_hwmgmt_args(): "--config_base_arm", MOCK_KCFG_DIR+"/arm64.config", "--config_inc_down_amd", MOCK_KCFG_DIR+"/new_x86_down.config", "--config_inc_down_arm", MOCK_KCFG_DIR+"/new_arm_down.config", + "--config_base_aspeed", MOCK_KCFG_DIR+"/aspeed_base.config", + "--config_inc_aspeed", MOCK_KCFG_DIR+"/new_aspeed.config", "--series", MOCK_INPUTS_DIR+"/new_series", "--current_non_up_patches", MOCK_INPUTS_DIR+"/hwmgmt_nonup_patches", "--kernel_version", "5.10.140", "--hw_mgmt_ver", "7.0030.0937", "--sb_msg", "/tmp/sb_msg.log", "--slk_msg", "/tmp/slk_msg.log", - "--build_root", "/sonic", + "--build_root", "/sonic", "--is_test"]): parser = create_parser() return parser.parse_args() @@ -124,6 +127,7 @@ def check_file_content(path): @mock.patch('hwmgmt_helper.SLK_KCONFIG', REL_INPUTS_DIR+"common_kconfig") @mock.patch('hwmgmt_helper.SLK_KCONFIG_AMD64', REL_INPUTS_DIR+"amd64_kconfig") @mock.patch('hwmgmt_helper.SLK_KCONFIG_ARM64', REL_INPUTS_DIR+"arm64-mellanox_kconfig") +@mock.patch('hwmgmt_helper.SLK_KCONFIG_ASPEED', REL_INPUTS_DIR+"aspeed_kconfig") class TestHwMgmtPostAction(TestCase): def setUp(self): self.action = HwMgmtAction.get(mock_hwmgmt_args()) @@ -145,6 +149,10 @@ def tearDown(self): KCFGData.noarch_incl.clear() KCFGData.noarch_excl.clear() KCFGData.noarch_down.clear() + KCFGData.aspeed_base.clear() + KCFGData.aspeed_updated.clear() + KCFGData.aspeed_incl.clear() + KCFGData.aspeed_excl.clear() def test_find_mlnx_hw_mgmt_markers(self): self.action.find_mlnx_hw_mgmt_markers() @@ -262,3 +270,211 @@ def test_kcfg_incl_file(self, mock_write_lines_mock): assert check_file_content(MOCK_INPUTS_DIR+"expected_data/amd64_kconfig") FileHandler.write_lines("", arm64, True) assert check_file_content(MOCK_INPUTS_DIR+"expected_data/arm64-mellanox_kconfig") + + +def mock_aspeed_args(): + """Mock args with aspeed kconfig (BMC scenario, all configs combined).""" + with mock.patch("sys.argv", ["hwmgmt_kernel_patches.py", "post", + "--patches", "/tmp", + "--non_up_patches", "/tmp", + "--config_inc_amd", MOCK_KCFG_DIR+"/new_x86.config", + "--config_inc_arm", MOCK_KCFG_DIR+"/new_arm.config", + "--config_base_amd", MOCK_KCFG_DIR+"/x86.config", + "--config_base_arm", MOCK_KCFG_DIR+"/arm64.config", + "--config_inc_down_amd", MOCK_KCFG_DIR+"/new_x86_down.config", + "--config_inc_down_arm", MOCK_KCFG_DIR+"/new_arm_down.config", + "--config_base_aspeed", MOCK_KCFG_DIR+"/aspeed_base.config", + "--config_inc_aspeed", MOCK_KCFG_DIR+"/new_aspeed.config", + "--series", MOCK_INPUTS_DIR+"/new_series", + "--current_non_up_patches", MOCK_INPUTS_DIR+"/hwmgmt_nonup_patches", + "--kernel_version", "6.12.41", + "--hw_mgmt_ver", "sonic-bmc-01", + "--sb_msg", "/tmp/sb_msg.log", + "--slk_msg", "/tmp/slk_msg.log", + "--build_root", "/sonic", + "--is_test"]): + parser = create_parser() + return parser.parse_args() + + +def mock_aspeed_only_args(): + """Mock args simulating aspeed-only build (x86/arm64 base == updated).""" + with mock.patch("sys.argv", ["hwmgmt_kernel_patches.py", "post", + "--patches", "/tmp", + "--non_up_patches", "/tmp", + "--config_inc_amd", MOCK_KCFG_DIR+"/x86.config", + "--config_inc_arm", MOCK_KCFG_DIR+"/arm64.config", + "--config_base_amd", MOCK_KCFG_DIR+"/x86.config", + "--config_base_arm", MOCK_KCFG_DIR+"/arm64.config", + "--config_inc_down_amd", "/nonexistent", + "--config_inc_down_arm", "/nonexistent", + "--config_base_aspeed", MOCK_KCFG_DIR+"/aspeed_base.config", + "--config_inc_aspeed", MOCK_KCFG_DIR+"/new_aspeed.config", + "--series", MOCK_INPUTS_DIR+"/new_series", + "--current_non_up_patches", MOCK_INPUTS_DIR+"/hwmgmt_nonup_patches", + "--kernel_version", "6.12.41", + "--hw_mgmt_ver", "sonic-bmc-01", + "--sb_msg", "/tmp/sb_msg.log", + "--slk_msg", "/tmp/slk_msg.log", + "--build_root", "/sonic", + "--is_test"]): + parser = create_parser() + return parser.parse_args() + + +@mock.patch('helper.SLK_PATCH_LOC', REL_INPUTS_DIR) +@mock.patch('helper.SLK_SERIES', REL_INPUTS_DIR+"series") +@mock.patch('hwmgmt_helper.SLK_KCONFIG', REL_INPUTS_DIR+"common_kconfig") +@mock.patch('hwmgmt_helper.SLK_KCONFIG_AMD64', REL_INPUTS_DIR+"amd64_kconfig") +@mock.patch('hwmgmt_helper.SLK_KCONFIG_ARM64', REL_INPUTS_DIR+"arm64-mellanox_kconfig") +@mock.patch('hwmgmt_helper.SLK_KCONFIG_ASPEED', REL_INPUTS_DIR+"aspeed_kconfig") +class TestAspeedKConfig(TestCase): + """Tests for aspeed BMC kconfig processing.""" + + def setUp(self): + self.kcfgaction = KConfigTask(mock_aspeed_args()) + self.kcfgaction.read_data() + + def tearDown(self): + for field in ['x86_incl', 'arm_incl', 'x86_excl', 'arm_excl', + 'x86_down', 'arm_down', 'noarch_incl', 'noarch_excl', 'noarch_down', + 'aspeed_base', 'aspeed_updated', 'aspeed_incl', 'aspeed_excl']: + getattr(KCFGData, field).clear() + + def test_aspeed_data_loaded(self): + """Verify aspeed base and updated are loaded.""" + assert KCFGData.aspeed_base, "aspeed_base should be loaded" + assert KCFGData.aspeed_updated, "aspeed_updated should be loaded" + + def test_aspeed_kconfig_inclusion(self): + """Verify inclusions contain both upstream and downstream configs (combined).""" + KCFGData.aspeed_incl, KCFGData.aspeed_excl = self.kcfgaction.parse_inc_exc( + KCFGData.aspeed_base, KCFGData.aspeed_updated + ) + # New configs from hw-mgmt + assert "CONFIG_JTAG_ASPEED_INTERNAL" in KCFGData.aspeed_incl + assert "CONFIG_MELLANOX_PLATFORM" in KCFGData.aspeed_incl + # Downstream configs also present (combined into single file) + assert "CONFIG_RTC_DRV_PCF85053A" in KCFGData.aspeed_incl + assert "CONFIG_NVSW_BMC_HID162" in KCFGData.aspeed_incl + # Changed value: n -> y + assert "CONFIG_GPIO_SYSFS" in KCFGData.aspeed_incl + assert KCFGData.aspeed_incl["CONFIG_GPIO_SYSFS"] == "y" + + def test_conflicting_value_override(self): + """CONFIG_I2C_AST2600 changes from m (base) to y (updated) — must appear in inclusions.""" + KCFGData.aspeed_incl, KCFGData.aspeed_excl = self.kcfgaction.parse_inc_exc( + KCFGData.aspeed_base, KCFGData.aspeed_updated + ) + assert "CONFIG_I2C_AST2600" in KCFGData.aspeed_incl + assert KCFGData.aspeed_incl["CONFIG_I2C_AST2600"] == "y" + + def test_already_matching_value(self): + """CONFIG_ASPEED_MCTP=y in both base and updated — should NOT appear in inclusions.""" + KCFGData.aspeed_incl, KCFGData.aspeed_excl = self.kcfgaction.parse_inc_exc( + KCFGData.aspeed_base, KCFGData.aspeed_updated + ) + assert "CONFIG_ASPEED_MCTP" not in KCFGData.aspeed_incl, \ + "Already-matching value should not be in inclusions" + + def test_aspeed_kconfig_preserves_existing(self): + """Verify existing content around the markers is preserved; inclusions go inside.""" + KCFGData.aspeed_incl, KCFGData.aspeed_excl = self.kcfgaction.parse_inc_exc( + KCFGData.aspeed_base, KCFGData.aspeed_updated + ) + aspeed_config = self.kcfgaction.get_aspeed_kconfig() + content = "".join(aspeed_config) + # Markers must be present + assert "###-> nvidia_aspeed_bmc-start" in content + assert "###-> nvidia_aspeed_bmc-end" in content + # New hw-mgmt configs in marker block + assert "CONFIG_JTAG_ASPEED_INTERNAL=y" in content + # Existing production content must survive + assert "CONFIG_ARCH_ASPEED=y" in content + assert "CONFIG_PINCTRL_ASPEED_G7=y" in content + assert "CONFIG_ASPEED_SOCINFO=y" in content + assert "CONFIG_SERIAL_8250_ASPEED=y" in content + + def test_aspeed_kconfig_missing_markers_exits(self): + """Error out when nvidia_aspeed_bmc markers are missing from config.sonic-aspeed.""" + KCFGData.aspeed_incl, KCFGData.aspeed_excl = self.kcfgaction.parse_inc_exc( + KCFGData.aspeed_base, KCFGData.aspeed_updated + ) + with Patcher() as patcher: + aspeed_path = os.path.join("/sonic", SLK_KCONFIG_ASPEED) + patcher.fs.create_file(aspeed_path, contents="CONFIG_ARCH_ASPEED=y\n") + with mock.patch('hwmgmt_helper.SLK_KCONFIG_ASPEED', SLK_KCONFIG_ASPEED): + with self.assertRaises(SystemExit): + self.kcfgaction.get_aspeed_kconfig() + + def test_aspeed_kconfig_clears_stale_block_when_no_changes(self): + """When hw-mgmt drops BMC support (no aspeed changes), the stale marker block + is cleared so old content does not linger in config.sonic-aspeed. + """ + # Simulate 'no changes this run' (base == updated) + KCFGData.aspeed_incl = OrderedDict() + KCFGData.aspeed_excl = OrderedDict() + aspeed_config = self.kcfgaction.get_aspeed_kconfig() + content = "".join(aspeed_config) + # Markers must still be present + assert "###-> nvidia_aspeed_bmc-start" in content + assert "###-> nvidia_aspeed_bmc-end" in content + # Marker block must be empty (no CONFIG_ lines between the markers) + between = content.split("###-> nvidia_aspeed_bmc-start")[1].split("###-> nvidia_aspeed_bmc-end")[0] + assert "CONFIG_" not in between, \ + "Stale BMC configs should be cleared when there are no changes" + + def test_aspeed_kconfig_missing_markers_no_changes_is_silent(self): + """Backward compat: when markers are missing AND there are no changes, skip silently.""" + KCFGData.aspeed_incl = OrderedDict() + KCFGData.aspeed_excl = OrderedDict() + with Patcher() as patcher: + aspeed_path = os.path.join("/sonic", SLK_KCONFIG_ASPEED) + patcher.fs.create_file(aspeed_path, contents="CONFIG_ARCH_ASPEED=y\n") + with mock.patch('hwmgmt_helper.SLK_KCONFIG_ASPEED', SLK_KCONFIG_ASPEED): + result = self.kcfgaction.get_aspeed_kconfig() + assert result is None + + +@mock.patch('helper.SLK_PATCH_LOC', REL_INPUTS_DIR) +@mock.patch('helper.SLK_SERIES', REL_INPUTS_DIR+"series") +@mock.patch('hwmgmt_helper.SLK_KCONFIG', REL_INPUTS_DIR+"common_kconfig") +@mock.patch('hwmgmt_helper.SLK_KCONFIG_AMD64', REL_INPUTS_DIR+"amd64_kconfig") +@mock.patch('hwmgmt_helper.SLK_KCONFIG_ARM64', REL_INPUTS_DIR+"arm64-mellanox_kconfig") +@mock.patch('hwmgmt_helper.SLK_KCONFIG_ASPEED', REL_INPUTS_DIR+"aspeed_kconfig") +class TestAspeedOnlyNoStandardWrite(TestCase): + """Verify aspeed-only builds do not erase existing amd64/arm64 configs.""" + + def setUp(self): + self.kcfgaction = KConfigTask(mock_aspeed_only_args()) + self.kcfgaction.read_data() + + def tearDown(self): + for field in ['x86_incl', 'arm_incl', 'x86_excl', 'arm_excl', + 'x86_down', 'arm_down', 'noarch_incl', 'noarch_excl', 'noarch_down', + 'aspeed_base', 'aspeed_updated', 'aspeed_incl', 'aspeed_excl']: + getattr(KCFGData, field).clear() + + def test_no_standard_changes(self): + """When x86/arm64 base == updated, no standard inclusions should be detected.""" + KCFGData.x86_incl, KCFGData.x86_excl = self.kcfgaction.parse_inc_exc( + KCFGData.x86_base, KCFGData.x86_updated + ) + KCFGData.arm_incl, KCFGData.arm_excl = self.kcfgaction.parse_inc_exc( + KCFGData.arm_base, KCFGData.arm_updated + ) + has_standard_changes = ( + KCFGData.x86_incl or KCFGData.x86_excl or + KCFGData.arm_incl or KCFGData.arm_excl or + KCFGData.x86_down or KCFGData.arm_down + ) + assert not has_standard_changes, \ + "No standard changes expected when x86/arm64 base == updated" + + def test_aspeed_changes_detected(self): + """Aspeed inclusions should still be detected even when standard changes are absent.""" + KCFGData.aspeed_incl, KCFGData.aspeed_excl = self.kcfgaction.parse_inc_exc( + KCFGData.aspeed_base, KCFGData.aspeed_updated + ) + assert KCFGData.aspeed_incl, "Aspeed inclusions should be detected" + assert "CONFIG_JTAG_ASPEED_INTERNAL" in KCFGData.aspeed_incl diff --git a/platform/mellanox/mft.mk b/platform/mellanox/mft.mk index 9984a4c9a2f..4173317bf67 100644 --- a/platform/mellanox/mft.mk +++ b/platform/mellanox/mft.mk @@ -17,8 +17,8 @@ # # Mellanox SAI -MFT_VERSION = 4.34.0 -MFT_REVISION = 145 +MFT_VERSION = 4.36.0 +MFT_REVISION = 147 MLNX_MFT_INTERNAL_SOURCE_BASE_URL = diff --git a/platform/mellanox/mft/Makefile b/platform/mellanox/mft/Makefile index 2f331ea879c..3c7c7da4453 100644 --- a/platform/mellanox/mft/Makefile +++ b/platform/mellanox/mft/Makefile @@ -1,5 +1,6 @@ # -# Copyright (c) 2016-2023 NVIDIA CORPORATION & AFFILIATES. +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2016-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. # Apache-2.0 # # Licensed under the Apache License, Version 2.0 (the "License"); @@ -77,15 +78,15 @@ $(addprefix $(DEST)/, $(KERNEL_MFT_TARGET)): $(DEST)/% : pushd $(MFT_NAME)/SDEBS # put a lock here because dpkg does not allow installing packages in parallel - while true; do - if mkdir $(DEST)/dpkg_lock &> /dev/null; then - { sudo dpkg -i $(SRC_DEB) && rm -d $(DEST)/dpkg_lock && break; } || { rm -d $(DEST)/dpkg_lock && exit 1 ; } - fi - done + flock $(DEST)/dpkg_lock.lk sudo dpkg -i $(SRC_DEB) popd - sudo dkms build kernel-mft-dkms/$(MFT_VERSION) -k $(KVERSION) -a $(CONFIGURED_ARCH) + if [ -d /usr/src/kernel-mft-dkms-$(MFT_VERSION).$(MFT_REVISION) ]; then + sudo dkms build kernel-mft-dkms/$(MFT_VERSION).$(MFT_REVISION) -k $(KVERSION) -a $(CONFIGURED_ARCH) + else + sudo dkms build kernel-mft-dkms/$(MFT_VERSION) -k $(KVERSION) -a $(CONFIGURED_ARCH) + fi # copy the built modules cp -r $(DKMS_CTRL)/kernel-$(KVERSION)-$(CONFIGURED_ARCH)/module/*.ko \ diff --git a/platform/mellanox/mlnx-onie-fw-update.sh b/platform/mellanox/mlnx-onie-fw-update.sh index 56b251a96f8..7183e2cce49 100755 --- a/platform/mellanox/mlnx-onie-fw-update.sh +++ b/platform/mellanox/mlnx-onie-fw-update.sh @@ -1,7 +1,8 @@ #!/bin/bash # -# Copyright (c) 2020-2024 NVIDIA CORPORATION & AFFILIATES. -# Apache-2.0 +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2020-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -16,7 +17,6 @@ # limitations under the License. # - this_script="$(basename $(realpath ${0}))" lock_file="/var/run/${this_script%.*}.lock" @@ -114,8 +114,15 @@ system_reboot() { # Give user some time to cancel the update sleep 5s + # The staged ONIE update is committed past this point. Clear the rollback + # trap so a SIGHUP/SIGTERM delivered during systemd's orderly shutdown + # (e.g. when serial-getty@ttyS0 is stopped) cannot race terminate_handler + # into running disable_onie_fw_update_mode and undoing the staging. + trap - SIGHUP SIGINT SIGQUIT SIGTERM + echo "INFO: Reboot is underway, the ONIE firmware update can no longer be cancelled" + # Use SONiC reboot scenario - /usr/local/bin/reboot -f + /usr/local/bin/reboot exit $? } diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/__init__.py b/platform/mellanox/mlnx-platform-api/sonic_platform/__init__.py index 4d778682cdd..0100a0b2e66 100644 --- a/platform/mellanox/mlnx-platform-api/sonic_platform/__init__.py +++ b/platform/mellanox/mlnx-platform-api/sonic_platform/__init__.py @@ -1,5 +1,6 @@ # -# Copyright (c) 2017-2021 NVIDIA CORPORATION & AFFILIATES. +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2017-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. # Apache-2.0 # # Licensed under the Apache License, Version 2.0 (the "License"); @@ -15,4 +16,5 @@ # limitations under the License. # __all__ = ["platform", "chassis"] -from sonic_platform import * +from . import platform +from . import chassis diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/bmc.py b/platform/mellanox/mlnx-platform-api/sonic_platform/bmc.py index b7079f6bf53..9ee75e529a0 100644 --- a/platform/mellanox/mlnx-platform-api/sonic_platform/bmc.py +++ b/platform/mellanox/mlnx-platform-api/sonic_platform/bmc.py @@ -1,6 +1,6 @@ # # SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES -# Copyright (c) 2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# Copyright (c) 2025-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. # Apache-2.0 # # Licensed under the Apache License, Version 2.0 (the "License"); @@ -55,11 +55,11 @@ def _get_hw_mgmt_redfish_client(): def _get_bmc_values(): none_values = None, None, None + from .device_data import DeviceDataManager + if not DeviceDataManager.is_platform_with_bmc(): + return none_values from sonic_py_common import device_info bmc_data = device_info.get_bmc_data() - if not bmc_data: - # BMC is not present on this platform - missing bmc.json - return none_values bmc_addr = bmc_data.get('bmc_addr') if not bmc_addr: logger.log_error("BMC address not found in bmc_data") diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/chassis.py b/platform/mellanox/mlnx-platform-api/sonic_platform/chassis.py index 51d2e0591ea..fd0fbc71b00 100644 --- a/platform/mellanox/mlnx-platform-api/sonic_platform/chassis.py +++ b/platform/mellanox/mlnx-platform-api/sonic_platform/chassis.py @@ -36,7 +36,7 @@ from . import module_host_mgmt_initializer from . import utils from .device_data import DeviceDataManager - from .bmc import BMC + from .sed_mgmt import SedMgmt import re import select import threading @@ -50,6 +50,7 @@ VPD_DATA_FILE = "/var/run/hw-management/eeprom/vpd_data" REVISION = "REV" +VPD_DATA_WAIT_TIMEOUT = 60 # Timeout in seconds for waiting for VPD data file HWMGMT_SYSTEM_ROOT = '/var/run/hw-management/system/' @@ -64,6 +65,8 @@ REBOOT_TYPE_KEXEC_PATTERN_FAST = ".*SONIC_BOOT_TYPE=(fast|fast-reboot).*" SYS_DISPLAY = "SYS_DISPLAY" +MALFUNCTION_SYSFS_READ_ERROR_DELAY_SECS = 1 +MALFUNCTION_SYSFS_READ_ERROR_MIN_SLEEP_SECS = 0.5 # Global logger class instance logger = Logger() @@ -132,6 +135,8 @@ def __init__(self): # Mapping from SFP index to ASIC ID self._asic_id_map = None + self._num_npus = device_info.get_num_npus() + self.liquid_cooling = None Chassis.chassis_instance = self @@ -153,14 +158,14 @@ def __del__(self): @property def RJ45_port_list(self): if not self._RJ45_port_inited: - self._RJ45_port_list = extract_RJ45_ports_index() + self._RJ45_port_list = extract_RJ45_ports_index(self._num_npus) self._RJ45_port_inited = True return self._RJ45_port_list @property def cpo_port_list(self): if not self._cpo_port_inited: - self._cpo_port_list = extract_cpo_ports_index() + self._cpo_port_list = extract_cpo_ports_index(self._num_npus) self._cpo_port_inited = True return self._cpo_port_list @@ -222,6 +227,56 @@ def get_psu(self, index): self.initialize_psu() return super(Chassis, self).get_psu(index) + ############################################## + # PDB methods + ############################################## + + def initialize_pdb(self): + if not self._pdb_list: + pdb_count = DeviceDataManager.get_pdb_count() + if pdb_count == 0: + return + from .pdb import Pdb + for index in range(pdb_count): + self._pdb_list.append(Pdb(index)) + + def get_num_pdbs(self): + """ + Retrieves the number of power distribution boards available on this chassis + + Returns: + An integer, the number of PDBs available on this chassis + """ + self.initialize_pdb() + return len(self._pdb_list) + + def get_all_pdbs(self): + """ + Retrieves all power distribution boards available on this chassis + + Returns: + A list of objects derived from PdbBase representing all PDBs + available on this chassis + """ + self.initialize_pdb() + return self._pdb_list + + def get_pdb(self, index): + """ + Retrieves the PDB object at the specified (0-based) index + + Args: + index: An integer, the index (0-based) of the PDB to retrieve + + Returns: + An object derived from PdbBase representing the specified PDB + """ + self.initialize_pdb() + if index < 0 or index >= len(self._pdb_list): + logger.log_error(f"PDB index {index} is out of range") + return None + return self._pdb_list[index] + ############################################## # Fan methods ############################################## @@ -364,11 +419,11 @@ def get_num_sfps(self): """ num_sfps = 0 if not self._RJ45_port_inited: - self._RJ45_port_list = extract_RJ45_ports_index() + self._RJ45_port_list = extract_RJ45_ports_index(self._num_npus) self._RJ45_port_inited = True - + if not self._cpo_port_inited: - self._cpo_port_list = extract_cpo_ports_index() + self._cpo_port_list = extract_cpo_ports_index(self._num_npus) self._cpo_port_inited = True num_sfps = DeviceDataManager.get_sfp_count() @@ -555,7 +610,9 @@ def get_change_event_for_module_host_management_mode(self, timeout): begin = time.monotonic() wait_ready_task = sfp.SFP.get_wait_ready_task() - while True: + while True: + iteration_begin = time.monotonic() + has_read_error = False fds_events = self.poll_obj.poll(timeout) for fileno, _ in fds_events: if fileno not in self.registered_fds: @@ -564,11 +621,17 @@ def get_change_event_for_module_host_management_mode(self, timeout): sfp_index, fd, fd_type = self.registered_fds[fileno] s = self._sfp_list[sfp_index] - fd.seek(0) + try: + fd.seek(0) + except OSError as e: + logger.log_warning(f'Failed to seek file {fd_type} for SFP {sfp_index}: {e}') + has_read_error = True + continue try: fd_value = int(fd.read().strip()) - except Exception as e: + except (OSError, IOError, ValueError) as e: logger.log_warning(f'Failed to read value from file {fd_type} for SFP {sfp_index}: {e}') + has_read_error = True continue # Detecting dummy event @@ -632,8 +695,13 @@ def get_change_event_for_module_host_management_mode(self, timeout): 'sfp_error': error_dict } else: + now = time.monotonic() + if has_read_error: + sleep_time = MALFUNCTION_SYSFS_READ_ERROR_DELAY_SECS - (now - iteration_begin) + if sleep_time > MALFUNCTION_SYSFS_READ_ERROR_MIN_SLEEP_SECS: + time.sleep(sleep_time) if not wait_forever: - elapse = time.monotonic() - begin + elapse = now - begin if elapse * 1000 >= timeout: return True, {'sfp': {}} @@ -688,6 +756,8 @@ def get_change_event_legacy(self, timeout): begin = time.monotonic() while True: + iteration_begin = time.monotonic() + has_read_error = False fds_events = self.poll_obj.poll(timeout) for fileno, _ in fds_events: if fileno not in self.registered_fds: @@ -695,11 +765,17 @@ def get_change_event_legacy(self, timeout): continue sfp_index, fd = self.registered_fds[fileno] - fd.seek(0) + try: + fd.seek(0) + except OSError as e: + logger.log_warning(f'Failed to seek module sysfs fd for SFP {sfp_index}: {e}') + has_read_error = True + continue try: fd.read() - except Exception as e: + except (OSError, IOError) as e: logger.log_warning(f'Failed to read module sysfs fd for SFP {sfp_index}: {e}') + has_read_error = True continue s = self._sfp_list[sfp_index] @@ -739,8 +815,13 @@ def get_change_event_legacy(self, timeout): 'sfp_error': error_dict } else: + now = time.monotonic() + if has_read_error: + sleep_time = MALFUNCTION_SYSFS_READ_ERROR_DELAY_SECS - (now - iteration_begin) + if sleep_time > MALFUNCTION_SYSFS_READ_ERROR_MIN_SLEEP_SECS: + time.sleep(sleep_time) if not wait_forever: - elapse = time.monotonic() - begin + elapse = now - begin if elapse * 1000 >= timeout: return True, {'sfp': {}} @@ -868,6 +949,14 @@ def get_model(self): if not self.vpd_data: self.vpd_data = self._parse_vpd_data(VPD_DATA_FILE) model = self.vpd_data.get(SYS_DISPLAY, "N/A") + if model == "N/A" and DeviceDataManager.is_simx_platform(): + # vpd_data is not always produced on simx; fall back to the + # ONIE TLV part number instead of returning "N/A". + logger.log_notice( + "VPD SYS_DISPLAY unavailable on simx; " + "falling back to EEPROM part number") + self.initialize_eeprom() + model = self._eeprom.get_part_number() else: self.initialize_eeprom() model = self._eeprom.get_part_number() @@ -922,7 +1011,8 @@ def initialize_components(self): self._component_list.extend(DeviceDataManager.get_cpld_component_list()) # Initialize BMC and its components - self.initialize_bmc() + if DeviceDataManager.is_platform_with_bmc(): + self.initialize_bmc() def get_num_components(self): """ @@ -1066,7 +1156,14 @@ def _parse_vpd_data(self, filename): result = {} try: if not os.access(filename, os.R_OK): - return result + if DeviceDataManager.is_simx_platform(): + # Skip the inotify wait on simx — vpd_data may not + # appear, and stalling every call is costly. + return result + logger.log_info("VPD data file {} not accessible, waiting for creation".format(filename)) + if not utils.wait_for_file_creation(filename, VPD_DATA_WAIT_TIMEOUT): + logger.log_error("VPD data file {} not available after timeout".format(filename)) + return result result = utils.read_key_value_file(filename, delimeter=": ") @@ -1100,6 +1197,7 @@ def _verify_reboot_cause(self, filename): def initialize_reboot_cause(self): self.reboot_major_cause_dict = { 'reset_main_pwr_fail' : self.REBOOT_CAUSE_POWER_LOSS, + 'reset_ac_pwr_fail' : self.REBOOT_CAUSE_POWER_LOSS, 'reset_aux_pwr_or_ref' : self.REBOOT_CAUSE_POWER_LOSS, 'reset_aux_pwr_or_reload' : self.REBOOT_CAUSE_POWER_LOSS, 'reset_aux_pwr_or_fu' : self.REBOOT_CAUSE_POWER_LOSS, @@ -1216,6 +1314,7 @@ def is_replaceable(self): def initialize_bmc(self): if self._bmc_initialized: return + from .bmc import BMC self._bmc = BMC.get_instance() if self._bmc is not None: try: @@ -1233,6 +1332,11 @@ def get_bmc(self): self._initialize_bmc() return self._bmc + def get_sed_mgmt(self): + """Return Mellanox SED password management instance.""" + if self._sed_mgmt is None: + self._sed_mgmt = SedMgmt.get_instance() + return self._sed_mgmt ############################################## # LiquidCooling methods diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/component.py b/platform/mellanox/mlnx-platform-api/sonic_platform/component.py index 0874497efdf..3a0152007ce 100644 --- a/platform/mellanox/mlnx-platform-api/sonic_platform/component.py +++ b/platform/mellanox/mlnx-platform-api/sonic_platform/component.py @@ -1,6 +1,6 @@ # # SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES -# Copyright (c) 2019-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# Copyright (c) 2019-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. # Apache-2.0 # # Licensed under the Apache License, Version 2.0 (the "License"); @@ -23,6 +23,7 @@ try: + import contextlib import os import io import re @@ -52,6 +53,8 @@ except ImportError as e: raise ImportError(str(e) + "- required module not found") +from . import utils + logger = Logger("mlnx-platform-api") class MPFAManager(object): @@ -752,7 +755,13 @@ class ComponentCPLD(Component): CPLD_PART_NUMBER_DEFAULT = '0' CPLD_VERSION_MINOR_DEFAULT = '0' - CPLD_FIRMWARE_UPDATE_COMMAND = ['cpldupdate', '--dev', '', '--print-progress', ''] + # Same ASIC type detection as syncd (sonic_debian_extension installs this path). + ASIC_DETECT_SCRIPT = '/usr/bin/asic_detect/asic_detect.sh' + + CPLD_FIRMWARE_UPDATE_COMMAND_SPC1 = ['cpldupdate', '--dev', '', '--print-progress', ''] + CPLD_FIRMWARE_UPDATE_COMMAND = ['cpldupdate', '--gpio', '--print-progress', ''] + + AUX_PWR_CYCLE_FILE = '/var/run/hw-management/system/aux_pwr_cycle' def __init__(self, idx): super(ComponentCPLD, self).__init__() @@ -763,30 +772,50 @@ def __init__(self, idx): self.image_ext_name = self.COMPONENT_FIRMWARE_EXTENSION def __get_mst_device(self): - if not os.path.exists(self.MST_DEVICE_PATH): - print("ERROR: mst driver is not loaded") - return None - - pattern = os.path.join(self.MST_DEVICE_PATH, self.MST_DEVICE_PATTERN) - - mst_dev_list = glob.glob(pattern) - if not mst_dev_list or len(mst_dev_list) != 1: - devices = str(os.listdir(self.MST_DEVICE_PATH)) - print("ERROR: Failed to get mst device: pattern={}, devices={}".format(pattern, devices)) - return None + output = None + try: + output = subprocess.check_output(['/usr/bin/asic_detect/asic_detect.sh', '-p']).decode('utf-8').strip() + except subprocess.CalledProcessError as e: + raise RuntimeError("Failed to get {} mst device: {}".format(self.name, str(e))) + return output - return mst_dev_list[0] + @classmethod + def _is_spc1_asic(cls): + """ + True if this system has a Spectrum-1 ASIC. SPC1 CPLD programming uses + cpldupdate --dev ; newer Spectrum devices use --gpio. + Uses platform/mellanox/asic_detect/asic_detect.sh (stdout 'spc1'); the script may + exit non-zero for unknown ASIC — we only compare stdout. + """ + if not os.path.isfile(cls.ASIC_DETECT_SCRIPT): + return False + try: + proc = subprocess.run( + [cls.ASIC_DETECT_SCRIPT], + stdout=subprocess.PIPE, + stderr=subprocess.DEVNULL, + universal_newlines=True, + timeout=30) + except (OSError, subprocess.TimeoutExpired): + return False + return proc.stdout.strip() == 'spc1' def _install_firmware(self, image_path): if not self._check_file_validity(image_path): return False - mst_dev = self.__get_mst_device() - if mst_dev is None: - return False - self.CPLD_FIRMWARE_UPDATE_COMMAND[2] = mst_dev - self.CPLD_FIRMWARE_UPDATE_COMMAND[4] = image_path - cmd = self.CPLD_FIRMWARE_UPDATE_COMMAND + if self._is_spc1_asic(): + try: + mst_dev = self.__get_mst_device() + except RuntimeError as e: + print("ERROR: {}".format(e)) + return False + cmd = list(self.CPLD_FIRMWARE_UPDATE_COMMAND_SPC1) + cmd[2] = mst_dev + cmd[4] = image_path + else: + cmd = list(self.CPLD_FIRMWARE_UPDATE_COMMAND) + cmd[3] = image_path try: print("INFO: Installing {} firmware update: path={}".format(self.name, image_path)) @@ -872,16 +901,22 @@ def update_firmware(self, image_path): with MPFAManager(image_path) as mpfa: if not mpfa.get_metadata().has_option('firmware', 'burn'): raise RuntimeError("Failed to get {} burn firmware".format(self.name)) - if not mpfa.get_metadata().has_option('firmware', 'refresh'): - raise RuntimeError("Failed to get {} refresh firmware".format(self.name)) burn_firmware = mpfa.get_metadata().get('firmware', 'burn') - refresh_firmware = mpfa.get_metadata().get('firmware', 'refresh') - print("INFO: Processing {} burn file: firmware install".format(self.name)) if not self._install_firmware(os.path.join(mpfa.get_path(), burn_firmware)): return + from .device_data import DeviceDataManager + if DeviceDataManager.is_platform_with_bmc(): + print("INFO: Burning {} firmware completed. Running aux power cycle to complete firmware update".format(self.name)) + utils.write_file(self.AUX_PWR_CYCLE_FILE, '1', raise_exception=True) + return + + if not mpfa.get_metadata().has_option('firmware', 'refresh'): + raise RuntimeError("Failed to get {} refresh firmware".format(self.name)) + + refresh_firmware = mpfa.get_metadata().get('firmware', 'refresh') print("INFO: Processing {} refresh file: firmware update".format(self.name)) self._install_firmware(os.path.join(mpfa.get_path(), refresh_firmware)) @@ -1027,12 +1062,27 @@ class ComponenetFPGADPU(ComponentCPLD): CPLD_FIRMWARE_UPDATE_COMMAND = ['cpldupdate', '--cpld_chain', '2', '--gpio', '--print-progress', ''] + @contextlib.contextmanager + def _mst_context(self): + try: + subprocess.check_call(['/usr/bin/mst', 'start'], universal_newlines=True) + yield + except subprocess.CalledProcessError as e: + logger.log_error("Failed to manage {} mst: {}".format(self.name, str(e))) + raise + finally: + try: + subprocess.check_call(['/usr/bin/mst', 'stop'], universal_newlines=True) + except subprocess.CalledProcessError as e: + logger.log_error("Failed to stop {} mst: {}".format(self.name, str(e))) + def _install_firmware(self, image_path): self.CPLD_FIRMWARE_UPDATE_COMMAND[5] = image_path try: print("INFO: Installing {} firmware update: path={}".format(self.name, image_path)) - subprocess.check_call(self.CPLD_FIRMWARE_UPDATE_COMMAND, universal_newlines=True) + with self._mst_context(): + subprocess.check_call(self.CPLD_FIRMWARE_UPDATE_COMMAND, universal_newlines=True) except subprocess.CalledProcessError as e: print("ERROR: Failed to update {} firmware: {}".format(self.name, str(e))) return False diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/db_table_helper.py b/platform/mellanox/mlnx-platform-api/sonic_platform/db_table_helper.py new file mode 100644 index 00000000000..c29f059ab47 --- /dev/null +++ b/platform/mellanox/mlnx-platform-api/sonic_platform/db_table_helper.py @@ -0,0 +1,87 @@ +# +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +import threading +from swsscommon.swsscommon import DBConnector, Table +from sonic_py_common import multi_asic + +TRANSCEIVER_DOM_TEMPERATURE_TABLE = 'TRANSCEIVER_DOM_TEMPERATURE' +TRANSCEIVER_DOM_THRESHOLD_TABLE = 'TRANSCEIVER_DOM_THRESHOLD' +TRANSCEIVER_INFO_TABLE = 'TRANSCEIVER_INFO' +TEMPERATURE_INFO_TABLE = 'TEMPERATURE_INFO' +STATE_DB = 'STATE_DB' +APPL_DB = 'APPL_DB' + + +class DbTableHelper: + def __init__(self): + self.state_dbs = {} + self.appl_dbs = {} + self.module_temperature_table = None + self.module_threshold_table = None + self.module_info_table = None + self.temperature_info_table = None + self._initialized = False + + def initialize(self): + if not self._initialized: + for namespace in multi_asic.get_front_end_namespaces(): + self.state_dbs[namespace] = DBConnector(STATE_DB, 0, True, namespace) + self.appl_dbs[namespace] = DBConnector(APPL_DB, 0, True, namespace) + + # Following tables are always in global namespace + default_namespace = multi_asic.DEFAULT_NAMESPACE + self.module_temperature_table = Table(self.state_dbs[default_namespace], TRANSCEIVER_DOM_TEMPERATURE_TABLE) + self.module_threshold_table = Table(self.state_dbs[default_namespace], TRANSCEIVER_DOM_THRESHOLD_TABLE) + self.module_info_table = Table(self.state_dbs[default_namespace], TRANSCEIVER_INFO_TABLE) + self.temperature_info_table = Table(self.state_dbs[default_namespace], TEMPERATURE_INFO_TABLE) + self._initialized = True + + def get_module_temperature_table(self): + self.initialize() + return self.module_temperature_table + + def get_module_threshold_table(self): + self.initialize() + return self.module_threshold_table + + def get_module_info_table(self): + self.initialize() + return self.module_info_table + + def get_temperature_info_table(self): + self.initialize() + return self.temperature_info_table + + def get_appl_db(self, namespace): + self.initialize() + return self.appl_dbs[namespace] + + def get_state_db(self, namespace): + self.initialize() + return self.state_dbs[namespace] + + +# Global instance of DbTableHelper +_thread_local = threading.local() + + +def get_db_table_helper(): + if not hasattr(_thread_local, 'helper'): + _thread_local.helper = DbTableHelper() + return _thread_local.helper diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/device_data.py b/platform/mellanox/mlnx-platform-api/sonic_platform/device_data.py index ecb2b1c2bd9..ce14cd8785d 100644 --- a/platform/mellanox/mlnx-platform-api/sonic_platform/device_data.py +++ b/platform/mellanox/mlnx-platform-api/sonic_platform/device_data.py @@ -216,6 +216,24 @@ class DpuInterfaceEnum(Enum): "comex_amb": False } } + }, + 'x86_64-nvidia_sn6810_ld-r0': { + 'thermal': { + "capability": { + "port_amb": False, + "fan_amb": False, + "comex_amb": False, + } + } + }, + 'x86_64-nvidia_sn6810_ld_simx-r0': { + 'thermal': { + "capability": { + "port_amb": False, + "fan_amb": False, + "comex_amb": False, + } + } } } @@ -278,6 +296,12 @@ def get_psu_count(cls): def is_psu_hotswapable(cls): return utils.read_int_from_file('/run/hw-management/config/hotplug_psus') > 0 + @classmethod + @utils.read_only_cache() + def get_pdb_count(cls): + """Return number of PDBs from /var/run/hw-management/config/hotplug_pdbs.""" + return utils.read_int_from_file('/var/run/hw-management/config/hotplug_pdbs', default = 0, log_func=None) + @classmethod @utils.read_only_cache() def get_sfp_count(cls): @@ -371,6 +395,8 @@ def get_bios_component(cls): @classmethod def get_cpld_component_list(cls): from .component import ComponentCPLD, ComponentCPLDSN2201, ComponentCPLDSN4280, ComponenetFPGADPU + if cls.is_simx_platform(): + return [] if cls.get_platform_name() in ['x86_64-nvidia_sn2201-r0']: # For SN2201, special chass is required for handle BIOS # Currently, only fetching BIOS version is supported @@ -382,14 +408,20 @@ def get_cpld_component_list(cls): @classmethod @utils.read_only_cache() def is_module_host_management_mode(cls): - sai_profile_file = '/tmp/sai.profile' - if not os.path.exists(sai_profile_file): - asic_id = 0 if cls.is_multi_asic_platform() else None - hwsku_dir = utils.get_path_to_hwsku_directory(asic_id=asic_id) - sai_profile_file = os.path.join(hwsku_dir, 'sai.profile') + asic_id = 0 if cls.is_multi_asic_platform() else None + hwsku_dir = utils.get_path_to_hwsku_directory(asic_id=asic_id) + sai_profile_file = os.path.join(hwsku_dir, 'sai.profile') data = utils.read_key_value_file(sai_profile_file, delimeter='=') return data.get('SAI_INDEPENDENT_MODULE_MODE') == '1' + @classmethod + @utils.read_only_cache() + def is_platform_with_bmc(cls): + from sonic_py_common import device_info + if device_info.is_switch_host() and device_info.get_bmc_data(): + return True + return False + @classmethod def wait_platform_ready(cls): """ @@ -465,3 +497,9 @@ def get_asic_count(cls): @utils.read_only_cache() def is_multi_asic_platform(cls): return cls.get_asic_count() > 1 + + @classmethod + @utils.read_only_cache() + def is_spc1(cls): + platform_name = cls.get_platform_name() + return platform_name in ('x86_64-mlnx_msn2700-r0', 'x86_64-mlnx_msn2700a1-r0') diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/dpuctlplat.py b/platform/mellanox/mlnx-platform-api/sonic_platform/dpuctlplat.py index 77f4149da90..b9d4114c882 100644 --- a/platform/mellanox/mlnx-platform-api/sonic_platform/dpuctlplat.py +++ b/platform/mellanox/mlnx-platform-api/sonic_platform/dpuctlplat.py @@ -1,7 +1,7 @@ # # SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES -# Copyright (c) 2024-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved. -# Apache-2.0 +# Copyright (c) 2024-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -17,6 +17,8 @@ # """Class Implementation for per DPU functionality""" +import errno +import logging import os.path import time import multiprocessing @@ -34,13 +36,47 @@ except ImportError as e: raise ImportError(str(e)) from e +logger = SysLogger("dpuctl_plat") + +def use_logger(new_logger: logging.Logger): + """Plug in a logging.Logger instance in place of the SysLogger. + + Do this at the module level so it happens to all instances of DpuCtlPlat, including those + created under-the-hood by the module interface. + """ + class LoggerLikeSysLogger: + # A class with an API like SysLogger, but wraps a regular logging.Logger instance. + + def __init__(self): + self.logger = new_logger + + def log_debug(self, msg): + self.logger.debug(msg) + + def log_info(self, msg): + self.logger.info(msg) + + def log_error(self, msg): + self.logger.error(msg) + + def log_warning(self, msg): + self.logger.warning(msg) + + # NOTICE is set up by sonic_py_common.syslogger + def log_notice(self, msg): + self.logger.log(logging.NOTICE, msg) + + global logger + logger = LoggerLikeSysLogger() + HW_BASE = "/var/run/hw-management/" EVENT_BASE = os.path.join(HW_BASE, "events/") SYSTEM_BASE = os.path.join(HW_BASE, "system/") PCI_BASE = "/sys/bus/pci/" PCI_DEV_BASE = os.path.join(PCI_BASE, "devices/") - -logger = SysLogger() +MLX5_CORE_DRIVER_PATH = os.path.join(PCI_BASE, "drivers/mlx5_core/") +MLX5_CORE_UNBIND_PATH = os.path.join(MLX5_CORE_DRIVER_PATH, "unbind") +MLX5_CORE_BIND_PATH = os.path.join(MLX5_CORE_DRIVER_PATH, "bind") WAIT_FOR_SHTDN = 120 WAIT_FOR_DPU_READY = 180 @@ -106,12 +142,14 @@ def __init__(self, dpu_name): self.dpu_force_pwr_state = None self.setup_logger() self.pci_dev_path = [] + self.pci_dev_path_map = {} self.verbosity = False def setup_logger(self, use_print=False, use_notice_level=False): def print_with_time(msg): timestamp = time.strftime("%Y-%m-%d %H:%M:%S") print(f"[{timestamp}] {msg}") + logger.log_notice(f"{msg}") if use_print: self.logger_info = print_with_time @@ -166,19 +204,40 @@ def get_open_fd(self, path, flag): finally: os.close(fd) + # Interfaces resolved by get_pci_dev_path_map(); order here also defines + # the order returned by get_pci_dev_path() for legacy list consumers. + PCI_DEV_INTERFACES = (DpuInterfaceEnum.PCIE_INT, DpuInterfaceEnum.RSHIM_PCIE_INT) + + def get_pci_dev_path_map(self): + """Return a mapping of DpuInterfaceEnum -> PCI sysfs device path for this DPU. + + Provides deterministic, name-based lookup of each PCI device declared + in platform.json (e.g. PCIE_INT, RSHIM_PCIE_INT) so callers do not + have to rely on list ordering. + """ + if self.pci_dev_path_map: + return self.pci_dev_path_map + + resolved = {} + for interface in self.PCI_DEV_INTERFACES: + dev_id = DeviceDataManager.get_dpu_interface(self.dpu_name, interface.value) + if not dev_id: + raise RuntimeError( + f"Unable to obtain PCI device ID ({interface.value}) " + f"for {self.dpu_name} from platform.json" + ) + resolved[interface] = os.path.join(PCI_DEV_BASE, dev_id) + + self.pci_dev_path_map = resolved + return self.pci_dev_path_map + def get_pci_dev_path(self): """Parse the PCIE devices ID from platform.json, raise Runtime error if the device id is not available""" if self.pci_dev_path: return self.pci_dev_path - - pci_dev_id = DeviceDataManager.get_dpu_interface(self.dpu_name, DpuInterfaceEnum.PCIE_INT.value) - rshim_pci_dev_id = DeviceDataManager.get_dpu_interface(self.dpu_name, DpuInterfaceEnum.RSHIM_PCIE_INT.value) - if not pci_dev_id or not rshim_pci_dev_id: - raise RuntimeError(f"Unable to obtain PCI device IDs for {self.dpu_name} from platform.json") - - self.pci_dev_path = [os.path.join(PCI_DEV_BASE, pci_dev_id), - os.path.join(PCI_DEV_BASE, rshim_pci_dev_id)] + path_map = self.get_pci_dev_path_map() + self.pci_dev_path = [path_map[interface] for interface in self.PCI_DEV_INTERFACES] return self.pci_dev_path def write_file(self, file_name, content_towrite): @@ -260,27 +319,74 @@ def _power_on(self): self.log_error(f"Failed power on! Trying Force Power on") self._power_off_force() time.sleep(1) - return self._power_on_force() + return self._power_on_force(count=3) self.log_info(f"Power on Successful!") return True def dpu_pci_remove(self): - """Per DPU PCI remove API""" + """Per DPU PCI remove API + + The main DPU PCI device (PCIE_INT) is unbound from the mlx5_core + driver rather than fully removed from sysfs so the device stays + enumerated on the host bus. The RSHIM/SoC PCI device + (RSHIM_PCIE_INT) is intentionally left alone. + """ try: - for pci_dev_path in self.get_pci_dev_path(): - remove_path = os.path.join(pci_dev_path, "remove") - if os.path.exists(remove_path): - self.write_file(remove_path, OperationType.SET.value) + path_map = self.get_pci_dev_path_map() + pci_dev_path = path_map[DpuInterfaceEnum.PCIE_INT] + rshim_pci_dev_path = path_map[DpuInterfaceEnum.RSHIM_PCIE_INT] + + bdf = os.path.basename(pci_dev_path) + driver_link = os.path.join(pci_dev_path, "driver") + if os.path.exists(driver_link) and os.path.exists(MLX5_CORE_UNBIND_PATH): + with self.time_check_context(f"pci unbind {pci_dev_path}"): + self.write_file(MLX5_CORE_UNBIND_PATH, bdf) + else: + self.log_debug( + f"Skipping unbind for {pci_dev_path}: driver not bound " + f"or mlx5_core unbind path missing" + ) + # RSHIM_PCIE_INT (SoC) is intentionally skipped. + self.log_debug(f"Skip pci removal for SOC PCIE dev {rshim_pci_dev_path}") return True except Exception as e: self.log_error(f"Failed PCI Removal with error {e}") return False def dpu_pci_scan(self): - """PCI Scan API""" + """PCI Scan API + + Re-attach the main DPU PCI device (PCIE_INT) to the mlx5_core + driver (symmetric with the unbind performed in ``dpu_pci_remove``). + If the driver is already bound, log a message and skip the bind. + For the RSHIM/SoC PCI device (RSHIM_PCIE_INT) only verify the + device is back on the bus. + """ try: - pci_scan_path = "/sys/bus/pci/rescan" - self.write_file(pci_scan_path, OperationType.SET.value) + path_map = self.get_pci_dev_path_map() + pci_dev_path = path_map[DpuInterfaceEnum.PCIE_INT] + rshim_pci_dev_path = path_map[DpuInterfaceEnum.RSHIM_PCIE_INT] + + bdf = os.path.basename(pci_dev_path) + driver_link = os.path.join(pci_dev_path, "driver") + if os.path.exists(driver_link): + self.log_info(f"Driver already bound for {pci_dev_path}, skip bind") + elif ( + os.path.exists(pci_dev_path) + and os.path.exists(MLX5_CORE_BIND_PATH) + ): + with self.time_check_context(f"pci bind {pci_dev_path}"): + self.write_file(MLX5_CORE_BIND_PATH, bdf) + elif not os.path.exists(pci_dev_path): + self.log_warning(f"PCI device {pci_dev_path} not found") + else: + self.log_warning( + f"mlx5_core bind path {MLX5_CORE_BIND_PATH} not found, " + f"skipping bind for {pci_dev_path}" + ) + # RSHIM_PCIE_INT (SoC): verify reappearance only. + if not os.path.exists(rshim_pci_dev_path): + self.log_warning(f"PCI device {rshim_pci_dev_path} not found") return True except Exception as e: self.log_error(f"Failed to rescan with error {e}") @@ -411,8 +517,27 @@ def dpu_status_update(self): self.log_error(f"Could not obtain status of DPU") raise e + def _log_boot_progress_read_failure(self, msg, attempt): + """log_func for utils.read_int_from_file; logs via this DPU's SysLogger.""" + # utils formats: "Failed to read from file - repr(exc)" + enxio = f'({errno.ENXIO},' in msg + if enxio and attempt < 2: + self.log_warning( + f"ENXIO - read unavailable for boot_progress, attempt {attempt + 1} of 3") + return + self.log_error(msg) + def read_boot_prog(self): - return utils.read_int_from_file(self.boot_prog_path, raise_exception=True) + for attempt in range(3): + try: + return utils.read_int_from_file( + self.boot_prog_path, + raise_exception=True, + log_func=lambda m, a=attempt: self._log_boot_progress_read_failure(m, a)) + except OSError as e: + if e.errno != errno.ENXIO or attempt == 2: + raise + time.sleep(1) def read_force_power_path(self): return utils.read_int_from_file(self.pwr_f_path, raise_exception=True) diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/eeprom.py b/platform/mellanox/mlnx-platform-api/sonic_platform/eeprom.py index 4fb9eae8852..f8acd3abf08 100644 --- a/platform/mellanox/mlnx-platform-api/sonic_platform/eeprom.py +++ b/platform/mellanox/mlnx-platform-api/sonic_platform/eeprom.py @@ -1,6 +1,6 @@ # # SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES -# Copyright (c) 2019-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# Copyright (c) 2019-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. # Apache-2.0 # # Licensed under the Apache License, Version 2.0 (the "License"); @@ -42,7 +42,7 @@ # EEPROM_SYMLINK = "/var/run/hw-management/eeprom/vpd_info" platform_name = DeviceDataManager.get_platform_name() -platform_supporting_simx = ['x86_64-nvidia_sn4280_simx-r0', 'x86_64-mlnx_msn4700_simx-r0', 'x86_64-nvidia_sn5640_simx-r0', 'x86_64-nvidia_sn6600_simx-r0'] +platform_supporting_simx = ['x86_64-nvidia_sn4280_simx-r0', 'x86_64-mlnx_msn4700_simx-r0', 'x86_64-nvidia_sn5640_simx-r0', 'x86_64-nvidia_sn6600_simx-r0', 'x86_64-nvidia_sn6810_ld_simx-r0'] if platform_name and 'simx' in platform_name and not platform_name in platform_supporting_simx: if not os.path.exists(EEPROM_SYMLINK): if is_host(): diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/module.py b/platform/mellanox/mlnx-platform-api/sonic_platform/module.py index bec1fcef301..d3bd7104f79 100644 --- a/platform/mellanox/mlnx-platform-api/sonic_platform/module.py +++ b/platform/mellanox/mlnx-platform-api/sonic_platform/module.py @@ -286,8 +286,13 @@ def __init__(self, dpu_id): self.MLX_DPU_REBOOT_CAUSE_WARM = 0 self.MLX_DPU_REBOOT_CAUSE_COLD = 1 self.MLX_DPU_REBOOT_CAUSE_WATCHDOG = 2 - self.chassis_state_db = SonicV2Connector(host="127.0.0.1") - self.chassis_state_db.connect(self.chassis_state_db.CHASSIS_STATE_DB) + self.chassis_state_db = None + + def get_chassis_db_conn(self): + if not self.chassis_state_db: + self.chassis_state_db = SonicV2Connector(host="127.0.0.1") + self.chassis_state_db.connect(self.chassis_state_db.CHASSIS_STATE_DB) + return self.chassis_state_db def get_base_mac(self): """ @@ -562,10 +567,11 @@ def get_temperature_dict(self): dpu_drive_temperature_info_table = f"TEMPERATURE_INFO_{self.dpu_id}|{nvme}" return_dict = {} try: - return_dict[ddr] = self.chassis_state_db.get_all(chassis_state_db_name, dpu_ddr_temperature_info_table) - return_dict[cpu] = self.chassis_state_db.get_all(chassis_state_db_name, dpu_cpu_temperature_info_table) - return_dict[nvme] = self.chassis_state_db.get_all(chassis_state_db_name, dpu_drive_temperature_info_table) + chassis_state_db = self.get_chassis_db_conn() + return_dict[ddr] = chassis_state_db.get_all(chassis_state_db_name, dpu_ddr_temperature_info_table) + return_dict[cpu] = chassis_state_db.get_all(chassis_state_db_name, dpu_cpu_temperature_info_table) + return_dict[nvme] = chassis_state_db.get_all(chassis_state_db_name, dpu_drive_temperature_info_table) except Exception as e: - logger.log_error(f"Failed to check obtain DPU temperature informatoin for {self.get_name()}! {e}") + logger.log_error(f"Failed to obtain DPU temperature information for {self.get_name()}! {e}") return {} return return_dict diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/pdb.py b/platform/mellanox/mlnx-platform-api/sonic_platform/pdb.py new file mode 100644 index 00000000000..5dae52ceda3 --- /dev/null +++ b/platform/mellanox/mlnx-platform-api/sonic_platform/pdb.py @@ -0,0 +1,155 @@ +# +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +############################################################################# +# Mellanox +# +# Module contains an implementation of SONiC Platform Base API and +# provides the PDBs status which are available in the platform +# +############################################################################# + +import os +from sonic_platform_base.pdb_base import PdbBase +from sonic_py_common.logger import Logger +from . import utils +from .thermal import Thermal + +logger = Logger() +PDB_PATH = '/var/run/hw-management' +LED_POWER_STATE_FILE = os.path.join(PDB_PATH, 'led', 'led_power') +DEFAULT_TEMP_SCALE = 1000 +LED_DISPLAY_NA = 'N/A' + + +class Pdb(PdbBase): + """Mellanox PDB; sysfs under /var/run/hw-management (power, thermal, environment).""" + + def __init__(self, pdb_index): + super(Pdb, self).__init__() + self.index = pdb_index + 1 + self._name = "PDB {}".format(self.index) + + # Status: system/pdb{N}_pwr_status + self._pwr_status = os.path.join(PDB_PATH, 'system', 'pdb{}_pwr_status'.format(self.index)) + + # Temperature: thermal/pdb_hotswap{N}_temp1_input, _temp1_max, _temp1_crit + self._thermal_list = [] + temp_path = os.path.join(PDB_PATH, 'thermal', 'pdb_hotswap{}_temp1_input'.format(self.index)) + high_path = os.path.join(PDB_PATH, 'thermal', 'pdb_hotswap{}_temp1_max'.format(self.index)) + crit_path = os.path.join(PDB_PATH, 'thermal', 'pdb_hotswap{}_temp1_crit'.format(self.index)) + if os.path.exists(temp_path): + self._thermal_list.append(Thermal( + 'PDB-{} Temp'.format(self.index), temp_path, + high_path if os.path.exists(high_path) else None, + crit_path if os.path.exists(crit_path) else None, + None, None, DEFAULT_TEMP_SCALE, 1)) + else: + logger.log_error(f"PDB {self.index} temperature file {temp_path} does not exist") + + # Environment: pdb_hotswap{N}_* for in/out voltage, curr1, power1, power1_max; pwr_conv{N}_* for curr2, power2 + env_dir = os.path.join(PDB_PATH, 'environment') + self._in_voltage = os.path.join(env_dir, 'pdb_pwr_conv{}_in1_input'.format(self.index)) + self._in_current = os.path.join(env_dir, 'pdb_pwr_conv{}_curr1_input'.format(self.index)) + self._in_power = os.path.join(env_dir, 'pdb_pwr_conv{}_power1_input'.format(self.index)) + self._power_max = os.path.join(env_dir, 'pdb_hotswap{}_power1_max'.format(self.index)) + self._out_voltage = os.path.join(env_dir, 'pdb_pwr_conv{}_in2_input'.format(self.index)) + self._out_current = os.path.join(env_dir, 'pdb_pwr_conv{}_curr2_input'.format(self.index)) + self._out_power = os.path.join(env_dir, 'pdb_pwr_conv{}_power2_input'.format(self.index)) + + def get_name(self): + return self._name + + def get_presence(self): + return True + + def get_status(self): + if not self.get_presence(): + return False + return utils.read_int_from_file(self._pwr_status, log_func=None) == 1 + + def get_powergood_status(self): + return self.get_status() + + def get_model(self): + return 'N/A' + + def get_serial(self): + return 'N/A' + + def get_revision(self): + return 'N/A' + + def is_replaceable(self): + return False + + def get_status_led(self): + """ + Power LED aggregate state from hw-management (matches ``cat .../led/led_power``). + Returns ``N/A`` when the file is missing/unreadable or content is empty/none. + """ + text = utils.read_str_from_file(LED_POWER_STATE_FILE, default='', log_func=None).strip() + if not text or text.lower() == 'none': + return LED_DISPLAY_NA + return text + + def get_temperature(self): + if self._thermal_list: + return self._thermal_list[0].get_temperature() + return None + + def get_output_current(self): + if os.path.exists(self._out_current): + val = utils.read_int_from_file(self._out_current, log_func=logger.log_info) + return float(val) / 1000 if val is not None else None + return None + + def get_output_power(self): + if os.path.exists(self._out_power): + val = utils.read_int_from_file(self._out_power, log_func=logger.log_info) + return float(val) / 1000000 if val is not None else None + return None + + def get_output_voltage(self): + if os.path.exists(self._out_voltage): + val = utils.read_int_from_file(self._out_voltage, log_func=logger.log_info) + return float(val) / 1000 if val is not None else None + return None + + def get_input_current(self): + if os.path.exists(self._in_current): + val = utils.read_int_from_file(self._in_current, log_func=logger.log_info) + return float(val) / 1000 if val is not None else None + return None + + def get_input_power(self): + if os.path.exists(self._in_power): + val = utils.read_int_from_file(self._in_power, log_func=logger.log_info) + return float(val) / 1000000 if val is not None else None + return None + + def get_input_voltage(self): + if os.path.exists(self._in_voltage): + val = utils.read_int_from_file(self._in_voltage, log_func=logger.log_info) + return float(val) / 1000 if val is not None else None + return None + + def get_maximum_supplied_power(self): + if os.path.exists(self._power_max): + val = utils.read_int_from_file(self._power_max, log_func=logger.log_info) + return float(val) / 1000000 if val is not None else None + return None diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/sed_mgmt.py b/platform/mellanox/mlnx-platform-api/sonic_platform/sed_mgmt.py new file mode 100644 index 00000000000..4f677f14718 --- /dev/null +++ b/platform/mellanox/mlnx-platform-api/sonic_platform/sed_mgmt.py @@ -0,0 +1,63 @@ +# +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + + +""" + Mellanox SED (Self-Encrypting Drive) password management. +""" + + +import subprocess +from sonic_platform_base.sed_mgmt_base import SedMgmtBase + + +READ_DEFAULT_SED_PW_SCRIPT = '/usr/local/bin/read_default_sed_pw_from_tpm.sh' + + +class SedMgmt(SedMgmtBase): + """Mellanox SED password management.""" + + _instance = None + + @staticmethod + def get_instance(): + """Return the SedMgmt singleton instance.""" + if SedMgmt._instance is None: + SedMgmt._instance = SedMgmt() + return SedMgmt._instance + + def get_min_sed_password_len(self): + return 8 + + def get_max_sed_password_len(self): + return 124 + + def get_default_sed_password(self): + """Read default SED password from TPM bank 3 via platform script.""" + try: + result = subprocess.run( + [READ_DEFAULT_SED_PW_SCRIPT], + capture_output=True, + text=True, + timeout=10 + ) + if result.returncode == 0 and result.stdout: + return result.stdout.strip() + except Exception: + pass + return None diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py b/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py index bd0854f6e51..ab2506ca483 100644 --- a/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py +++ b/platform/mellanox/mlnx-platform-api/sonic_platform/sfp.py @@ -26,13 +26,14 @@ try: import ctypes import select - import subprocess import os import threading import time from sonic_py_common.logger import Logger - from sonic_py_common.general import check_output_pipe + from sonic_py_common import multi_asic + from swsscommon.swsscommon import SonicV2Connector, ConfigDBConnector from . import utils + from .db_table_helper import get_db_table_helper from .device_data import DeviceDataManager from sonic_platform_base.sonic_xcvr.sfp_optoe_base import SfpOptoeBase from sonic_platform_base.sonic_xcvr.fields import consts @@ -283,6 +284,10 @@ } } +# Redis constants +CFG_PORT_TABLE = 'PORT' +PORT_CONFIG_DONE = 'PORT_TABLE:PortConfigDone' + # Global logger class instance logger = Logger() @@ -328,6 +333,7 @@ def __init__(self, sfp_index, asic_id='asic0'): self.index = sfp_index + 1 self.sdk_index = sfp_index self.asic_id = asic_id + self.asic_index = multi_asic.get_asic_index_from_namespace(asic_id) @classmethod def _get_module_info(self, sdk_index): @@ -416,6 +422,9 @@ class SFP(NvidiaSFPCommon): # Class level action table which stores the mapping from action name to action function, # only applicable for module host management action_table = None + + # Class level port mapping dictionary, key is index, value is logical port + port_mapping = {} def __init__(self, sfp_index, sfp_type=None, slot_id=0, linecard_port_count=0, lc_name=None, asic_id='asic0'): super(SFP, self).__init__(sfp_index, asic_id=asic_id) @@ -444,12 +453,10 @@ def __init__(self, sfp_index, sfp_type=None, slot_id=0, linecard_port_count=0, l self.state = STATE_FCP_DOWN self.processing_insert_event = False self.sn = None - self.temp_high_threshold = None - self.temp_critical_threshold = None - self.retry_read_threshold = 5 - self.retry_read_vendor = 5 - self.manufacturer = None - self.part_number = None + if DeviceDataManager.is_multi_asic_platform(): + self.namespace = asic_id + else: + self.namespace = multi_asic.DEFAULT_NAMESPACE def __str__(self): return f'SFP {self.sdk_index}' @@ -797,7 +804,7 @@ def _get_sfp_type_str(self, eeprom_path): with open(page, mode='rb', buffering=0) as f: id_byte_raw = bytearray(f.read(1)) id = id_byte_raw[0] - if id == 0x18 or id == 0x19 or id == 0x1e: + if id == 0x18 or id == 0x19 or id == 0x1e or id == 0x80: self._sfp_type_str = SFP_TYPE_CMIS elif id == 0x11 or id == 0x0D: # in sonic-platform-common, 0x0D is treated as sff8436, @@ -908,18 +915,7 @@ def reinit_if_sn_changed(self): sn = self._get_serial() if sn != self.sn: self.reinit() - # Clear cached vendor info so a new module will be re-read - self.manufacturer = None - self.part_number = None - self.temp_high_threshold = None - self.temp_critical_threshold = None self.sn = self._get_serial() - if self.sn is not None: - self.retry_read_threshold = 5 - self.retry_read_vendor = 5 - else: - self.retry_read_threshold = 0 - self.retry_read_vendor = 0 return True return False @@ -1063,40 +1059,6 @@ def get_temperature(self): self.reinit_if_sn_changed() return super().get_temperature() - def get_temperature_warning_threshold(self): - """Get temperature warning threshold - - Returns: - None if there is an error (module EEPROM not readable) - 0.0 if warning threshold is not supported or module is under initialization - other float value if warning threshold is available - """ - try: - sw_control = self.is_sw_control() - except: - return 0.0 - - self.reinit_if_sn_changed() - self._update_temperature_threshold(sw_control) - return self.temp_high_threshold - - def get_temperature_critical_threshold(self): - """Get temperature critical threshold - - Returns: - None if there is an error (module EEPROM not readable) - 0.0 if critical threshold is not supported or module is under initialization - other float value if critical threshold is available - """ - try: - sw_control = self.is_sw_control() - except: - return 0.0 - - self.reinit_if_sn_changed() - self._update_temperature_threshold(sw_control) - return self.temp_critical_threshold - def get_xcvr_api(self): """ Retrieves the XcvrApi associated with this SFP @@ -1680,7 +1642,96 @@ def initialize_sfp_modules(cls, sfp_list): logger.log_notice(f'SFP {index} is in state {s.state} after module initialization') cls.wait_sfp_eeprom_ready(sfp_list, 2) - + + @classmethod + def get_port_config_done(cls, namespace): + app_db = get_db_table_helper().get_appl_db(namespace) + return app_db.exists(PORT_CONFIG_DONE) + + @classmethod + def build_port_mapping(cls, namespace): + from natsort import natsorted + db = ConfigDBConnector(use_unix_socket_path=True, namespace=namespace) + db.db_connect(db.CONFIG_DB) + port_table = db.get_table(CFG_PORT_TABLE) + for logical_port, value in natsorted(port_table.items()): + index = int(value.get('index')) + if index not in cls.port_mapping: + cls.port_mapping[index] = logical_port + + def get_logical_port(self): + logical_port = self.port_mapping.get(self.index) + if not logical_port: + port_config_done = self.get_port_config_done(self.namespace) + if not port_config_done: + return None + self.build_port_mapping(self.namespace) + logical_port = self.port_mapping.get(self.index) + return logical_port + + def get_temperature_from_db(self): + """Get temperature from DB + + Returns: + float: return 0 if module does not support temperature or not present, return -1 if read failed, + return other float value if module supports temperature + """ + present, value = self._get_data_from_db(get_db_table_helper().get_module_temperature_table, + 'temperature') + if not present: + return 0 + + if value == 'None': + return -1 + + return float(value) + + def get_warning_threshold_from_db(self): + present, value = self._get_data_from_db(get_db_table_helper().get_module_threshold_table, + 'temphighwarning') + # xcvrd returns N/A if threshold is not supported + # xcvrd cannot tell read failure or not supported, + # so we return 0 in both cases + if not present or value == 'N/A': + return 0 + + return float(value) + + def get_critical_threshold_from_db(self): + present, value = self._get_data_from_db(get_db_table_helper().get_module_threshold_table, + 'temphighalarm') + # xcvrd returns N/A if threshold is not supported + # xcvrd cannot tell read failure or not supported, + # so we return 0 in both cases + if not present or value == 'N/A': + return 0 + + return float(value) + + def get_vendor_name_from_db(self): + present, value = self._get_data_from_db(get_db_table_helper().get_module_info_table, + 'manufacturer') + if not present: + return '' + return value.strip() + + def get_part_number_from_db(self): + present, value = self._get_data_from_db(get_db_table_helper().get_module_info_table, + 'model') + if not present: + return '' + return value.strip() + + def _get_data_from_db(self, table_cb, key): + logical_port = self.get_logical_port() + if not logical_port: + return False, None + return table_cb().hget(logical_port, key) + + def get_asic_index(self): + return self.asic_index + + class RJ45Port(NvidiaSFPCommon): """class derived from SFP, representing RJ45 ports""" @@ -1945,6 +1996,8 @@ def __init__(self, sfp_index, asic_id='asic0'): def get_transceiver_info(self): transceiver_info_dict = super().get_transceiver_info() + if transceiver_info_dict is None: + return None transceiver_info_dict['type'] = self.sfp_type return transceiver_info_dict @@ -1964,5 +2017,3 @@ def reinit(self): :return: """ return - - diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/smartswitch_thermal_updater.py b/platform/mellanox/mlnx-platform-api/sonic_platform/smartswitch_thermal_updater.py index da2253e77c3..3b84e2ec67b 100644 --- a/platform/mellanox/mlnx-platform-api/sonic_platform/smartswitch_thermal_updater.py +++ b/platform/mellanox/mlnx-platform-api/sonic_platform/smartswitch_thermal_updater.py @@ -1,6 +1,6 @@ # # SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES -# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# Copyright (c) 2024-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. # Apache-2.0 # # Licensed under the Apache License, Version 2.0 (the "License"); @@ -58,11 +58,10 @@ class SmartswitchThermalUpdater(ThermalUpdater): - def __init__(self, sfp_list, dpu_list, is_host_mgmt_mode=True): + def __init__(self, sfp_list, dpu_list): super().__init__(sfp_list=sfp_list) self._dpu_list = dpu_list self._dpu_status = {} - self.host_mgmt_mode = is_host_mgmt_mode def load_tc_config_dpu(self): dpu_poll_interval = 3 @@ -80,16 +79,7 @@ def load_tc_config_dpu(self): def start(self): self.clean_thermal_data_dpu() self.load_tc_config_dpu() - if self.host_mgmt_mode: - super().start() - else: - self._timer.start() - - def stop(self): - if self.host_mgmt_mode: - super().stop() - else: - self._timer.stop() + super().start() def clean_thermal_data_dpu(self): for dpu in self._dpu_list: diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/thermal.py b/platform/mellanox/mlnx-platform-api/sonic_platform/thermal.py index a6f347d7978..0e76ec98bc2 100644 --- a/platform/mellanox/mlnx-platform-api/sonic_platform/thermal.py +++ b/platform/mellanox/mlnx-platform-api/sonic_platform/thermal.py @@ -492,10 +492,8 @@ def get_temperature(self): A float number of current temperature in Celsius up to nearest thousandth of one degree Celsius, e.g. 30.125 """ - if not self.sfp.get_presence(): - return None - value = self.sfp.get_temperature() - return value if (value != 0.0 and value is not None) else None + value = self.sfp.get_temperature_from_db() + return value if value and value > 0 else None def get_high_threshold(self): """ @@ -505,9 +503,7 @@ def get_high_threshold(self): A float number, the high threshold temperature of thermal in Celsius up to nearest thousandth of one degree Celsius, e.g. 30.125 """ - if not self.sfp.get_presence(): - return None - value = self.sfp.get_temperature_warning_threshold() + value = self.sfp.get_warning_threshold_from_db() return value if (value != 0.0 and value is not None) else None def get_high_critical_threshold(self): @@ -518,9 +514,7 @@ def get_high_critical_threshold(self): A float number, the high critical threshold temperature of thermal in Celsius up to nearest thousandth of one degree Celsius, e.g. 30.125 """ - if not self.sfp.get_presence(): - return None - value = self.sfp.get_temperature_critical_threshold() + value = self.sfp.get_critical_threshold_from_db() return value if (value != 0.0 and value is not None) else None def get_position_in_parent(self): diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/thermal_manager.py b/platform/mellanox/mlnx-platform-api/sonic_platform/thermal_manager.py index 436840a04eb..2328d78ad34 100644 --- a/platform/mellanox/mlnx-platform-api/sonic_platform/thermal_manager.py +++ b/platform/mellanox/mlnx-platform-api/sonic_platform/thermal_manager.py @@ -1,5 +1,6 @@ # -# Copyright (c) 2020-2024 NVIDIA CORPORATION & AFFILIATES. +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2020-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. # Apache-2.0 # # Licensed under the Apache License, Version 2.0 (the "License"); @@ -15,9 +16,14 @@ # limitations under the License. # from sonic_platform_base.sonic_thermal_control.thermal_manager_base import ThermalManagerBase -from . import thermal_updater -from . import smartswitch_thermal_updater +from . import thermal_updater +from . import smartswitch_thermal_updater from .device_data import DeviceDataManager +from .liquid_cooling import LiquidCooling +from sonic_py_common import logger + +SYSLOG_IDENTIFIER = 'thermal_manager' +log = logger.Logger(SYSLOG_IDENTIFIER) class ThermalManager(ThermalManagerBase): @@ -34,20 +40,22 @@ def initialize(cls): and any other vendor specific initialization. :return: """ + if LiquidCooling().get_num_leak_sensors() > 0: + log.log_notice('Liquid cooling platform detected, thermal updater is disabled') + cls.thermal_updater_task = None + return + dpus_present = DeviceDataManager.get_platform_dpus_data() - host_mgmt_mode = DeviceDataManager.is_module_host_management_mode() - if not dpus_present and host_mgmt_mode: + if not dpus_present: # Non smart switch behaviour has highest priority from .chassis import Chassis - cls.thermal_updater_task = thermal_updater.ThermalUpdater(sfp_list=Chassis.chassis_instance.get_all_sfps(), update_asic=False) - elif dpus_present: + cls.thermal_updater_task = thermal_updater.ThermalUpdater(sfp_list=Chassis.chassis_instance.get_all_sfps()) + else: from .chassis import Chassis dpus = Chassis.chassis_instance.get_all_modules() cls.thermal_updater_task = smartswitch_thermal_updater.SmartswitchThermalUpdater(sfp_list=Chassis.chassis_instance.get_all_sfps(), - dpu_list=dpus, - is_host_mgmt_mode=host_mgmt_mode) - if cls.thermal_updater_task: - cls.thermal_updater_task.start() + dpu_list=dpus) + cls.thermal_updater_task.start() @classmethod def deinitialize(cls): diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/thermal_updater.py b/platform/mellanox/mlnx-platform-api/sonic_platform/thermal_updater.py index 3701ac1035a..0b78e7d5d45 100644 --- a/platform/mellanox/mlnx-platform-api/sonic_platform/thermal_updater.py +++ b/platform/mellanox/mlnx-platform-api/sonic_platform/thermal_updater.py @@ -17,6 +17,7 @@ # from .device_data import DeviceDataManager +from .db_table_helper import get_db_table_helper from . import utils from sonic_py_common import logger @@ -24,7 +25,7 @@ import functools import re import sys -import time +import glob import os sys.path.append('/run/hw-management/bin') @@ -45,8 +46,7 @@ raise -SFP_TEMPERATURE_SCALE = 1000 -ASIC_TEMPERATURE_SCALE = 125 +TEMPERATURE_SCALE = 1000 ASIC_DEFAULT_TEMP_WARNNING_THRESHOLD = 105000 ASIC_DEFAULT_TEMP_CRITICAL_THRESHOLD = 120000 @@ -57,15 +57,15 @@ # Register a clean-up routine that will run when the process exits def clean_thermal_data(sfp_list): + asic_count = DeviceDataManager.get_asic_count() + for asic_index in range(asic_count): + hw_management_independent_mode_update.thermal_data_clean_asic(asic_index) + if not sfp_list: return hw_management_independent_mode_update.module_data_set_module_counter(len(sfp_list)) for sfp in sfp_list: try: - sw_control = sfp.is_sw_control() - if not sw_control: - continue - hw_management_independent_mode_update.thermal_data_clean_module( 0, sfp.sdk_index + 1 @@ -74,41 +74,16 @@ def clean_thermal_data(sfp_list): logger.log_warning(f'Cleanup skipped for module {sfp.sdk_index + 1}: {e}') class ThermalUpdater: - def __init__(self, sfp_list, update_asic=True): + def __init__(self, sfp_list): self._sfp_list = sfp_list self._sfp_status = {} self._timer = utils.Timer() - self._update_asic = update_asic - - atexit.register(functools.partial(clean_thermal_data, self._sfp_list)) - - def wait_for_sysfs_nodes(self): - """ - Wait for temperature sysfs nodes to be present before proceeding. - Returns: - bool: True if wait success else timeout - """ - start_time = time.time() - logger.log_notice('Waiting for temperature sysfs nodes to be present...') - conditions = [] - - # ASIC temperature sysfs node asic_count = DeviceDataManager.get_asic_count() - for asic_index in range(asic_count): - conditions.append(lambda idx=asic_index: os.path.exists(f'/sys/module/sx_core/asic{idx}/temperature/input')) - - # Module temperature sysfs nodes - sfp_count = len(self._sfp_list) if self._sfp_list else 0 - result = DeviceDataManager.wait_sysfs_ready(sfp_count) - end_time = time.time() - elapsed_time = end_time - start_time - - if result: - logger.log_notice(f'Temperature sysfs nodes are ready. Wait time: {elapsed_time:.4f} seconds') + if asic_count > 1: + self._asic_names = [f'ASIC{i}' for i in range(asic_count)] else: - logger.log_error(f'Timeout waiting for temperature sysfs nodes. Wait time: {elapsed_time:.4f} seconds') - - return result + self._asic_names = ['ASIC'] + atexit.register(functools.partial(clean_thermal_data, self._sfp_list)) def _find_matching_key(self, dev_parameters, pattern): """ @@ -155,22 +130,15 @@ def load_tc_config(self): else: logger.log_error(f'Module parameter not found (pattern: module\\d+), using default interval: {sfp_poll_interval}') - if self._update_asic: - logger.log_notice(f'ASIC polling interval: {asic_poll_interval}') - self._timer.schedule(asic_poll_interval, self.update_asic) + logger.log_notice(f'ASIC polling interval: {asic_poll_interval}') + self._timer.schedule(asic_poll_interval, self.update_asic) logger.log_notice(f'Module polling interval: {sfp_poll_interval}') self._timer.schedule(sfp_poll_interval, self.update_module) def start(self): self.control_tc(False) self.load_tc_config() - - # Wait for temperature sysfs nodes to be ready before starting the timer - if not self.wait_for_sysfs_nodes(): - logger.log_error('Failed to start thermal updater: temperature sysfs nodes not available') - self.control_tc(True) # Suspend TC to protect the system - return False - + self.unlink_hw_mgmt_thermal_files() self._timer.start() def stop(self): @@ -181,58 +149,92 @@ def control_tc(self, suspend): logger.log_notice(f'Set hw-management-tc to {"suspend" if suspend else "resume"}') utils.write_file('/run/hw-management/config/suspend', 1 if suspend else 0) - def get_asic_temp(self, asic_index=0): - temperature = utils.read_int_from_file(f'/sys/module/sx_core/asic{asic_index}/temperature/input', default=None) - return temperature * ASIC_TEMPERATURE_SCALE if temperature is not None else None + def get_asic_temp(self, asic_name): + """ + Read ASIC temperature from STATE_DB TEMPERATURE_INFO. - def get_asic_temp_warning_threshold(self, asic_index=0): - emergency = utils.read_int_from_file(f'/sys/module/sx_core/asic{asic_index}/temperature/emergency', default=None, log_func=None) - return emergency * ASIC_TEMPERATURE_SCALE if emergency is not None else ASIC_DEFAULT_TEMP_WARNNING_THRESHOLD + Returns temperature as int scaled by TEMPERATURE_SCALE, 0 if + missing or N/A, None on error. + """ + temperature = None + try: + present, temperature = get_db_table_helper().get_temperature_info_table().hget(asic_name, 'temperature') + if not present or temperature == 'N/A': + return 0 + return int(float(temperature) * TEMPERATURE_SCALE) + except Exception as e: + logger.log_error(f'Failed to read ASIC {asic_name} temperature - {temperature} - {e}') + return None - def get_asic_temp_critical_threshold(self, asic_index=0): - critical = utils.read_int_from_file(f'/sys/module/sx_core/asic{asic_index}/temperature/critical', default=None, log_func=None) - return critical * ASIC_TEMPERATURE_SCALE if critical is not None else ASIC_DEFAULT_TEMP_CRITICAL_THRESHOLD + def get_asic_temp_warning_threshold(self): + return ASIC_DEFAULT_TEMP_WARNNING_THRESHOLD + + def get_asic_temp_critical_threshold(self): + return ASIC_DEFAULT_TEMP_CRITICAL_THRESHOLD def update_single_module(self, sfp): try: presence = sfp.get_presence() pre_presence = self._sfp_status.get(sfp.sdk_index) if presence: - sw_control, temperature, warning_thresh, critical_thresh = sfp.get_temperature_info() - if not sw_control: - return - fault = ERROR_READ_THERMAL_DATA if (temperature is None or warning_thresh is None or critical_thresh is None) else 0 - temperature = 0 if temperature is None else temperature * SFP_TEMPERATURE_SCALE - warning_thresh = 0 if warning_thresh is None else warning_thresh * SFP_TEMPERATURE_SCALE - critical_thresh = 0 if critical_thresh is None else critical_thresh * SFP_TEMPERATURE_SCALE - + fault = 0 + temperature = sfp.get_temperature_from_db() + if temperature > 0: + warning_thresh = sfp.get_warning_threshold_from_db() + critical_thresh = sfp.get_critical_threshold_from_db() + if warning_thresh > critical_thresh: + fault = ERROR_READ_THERMAL_DATA + else: + if temperature == -1: # read failed + fault = ERROR_READ_THERMAL_DATA + temperature = 0 + warning_thresh = 0 + critical_thresh = 0 + + vendor_name = sfp.get_vendor_name_from_db() + part_number = sfp.get_part_number_from_db() + + vendor_info = { + 'manufacturer': vendor_name, + 'part_number': part_number + } hw_management_independent_mode_update.thermal_data_set_module( - 0, # ASIC index always 0 for now + sfp.get_asic_index(), sfp.sdk_index + 1, - int(temperature), - int(critical_thresh), - int(warning_thresh), + int(temperature * TEMPERATURE_SCALE), + int(critical_thresh * TEMPERATURE_SCALE), + int(warning_thresh * TEMPERATURE_SCALE), fault ) + hw_management_independent_mode_update.vendor_data_set_module( + sfp.get_asic_index(), + sfp.sdk_index + 1, + vendor_info + ) else: if pre_presence != presence: # thermal control service requires to # set value 0 to all temperature files when module is not present hw_management_independent_mode_update.thermal_data_set_module( - 0, # ASIC index always 0 for now + sfp.get_asic_index(), sfp.sdk_index + 1, 0, 0, 0, 0 ) + hw_management_independent_mode_update.vendor_data_set_module( + sfp.get_asic_index(), + sfp.sdk_index + 1, + {'manufacturer': '', 'part_number': ''} + ) if pre_presence != presence: self._sfp_status[sfp.sdk_index] = presence except Exception as e: logger.log_error(f'Failed to update module {sfp.sdk_index} thermal data - {e}') hw_management_independent_mode_update.thermal_data_set_module( - 0, # ASIC index always 0 for now + sfp.get_asic_index(), sfp.sdk_index + 1, 0, 0, @@ -247,9 +249,9 @@ def update_module(self): def update_asic(self): try: for asic_index in range(DeviceDataManager.get_asic_count()): - asic_temp = self.get_asic_temp(asic_index) - warn_threshold = self.get_asic_temp_warning_threshold(asic_index) - critical_threshold = self.get_asic_temp_critical_threshold(asic_index) + asic_temp = self.get_asic_temp(self._asic_names[asic_index]) + warn_threshold = self.get_asic_temp_warning_threshold() + critical_threshold = self.get_asic_temp_critical_threshold() fault = 0 if asic_temp is None: logger.log_error(f'Failed to read ASIC {asic_index} temperature, send fault to hw-management-tc') @@ -272,3 +274,29 @@ def update_asic(self): 0, ERROR_READ_THERMAL_DATA ) + + def unlink_hw_mgmt_thermal_files(self): + if not DeviceDataManager.is_spc1(): + return + + conditions = [lambda: os.path.islink('/run/hw-management/thermal/asic')] + sfp_count = DeviceDataManager.get_sfp_count() + for sfp_index in range(sfp_count): + index = sfp_index + 1 + conditions.append(lambda idx=index: os.path.islink(f'/run/hw-management/thermal/module{idx}_temp_input')) + conditions.append(lambda idx=index: os.path.islink(f'/run/hw-management/thermal/module{idx}_temp_fault')) + conditions.append(lambda idx=index: os.path.islink(f'/run/hw-management/thermal/module{idx}_temp_crit')) + conditions.append(lambda idx=index: os.path.islink(f'/run/hw-management/thermal/module{idx}_temp_emergency')) + + logger.log_notice(f'Waiting for ASIC and modules thermal files to be created') + if not utils.wait_until_conditions(conditions, 300, 1): + logger.log_error('Failed to wait for thermal files to be created') + return + logger.log_notice(f'All ASIC and modules thermal files are created') + + for f in glob.iglob('/run/hw-management/thermal/asic*'): + if os.path.islink(f): + os.unlink(f) + for f in glob.iglob('/run/hw-management/thermal/module*_temp_*'): + if os.path.islink(f): + os.unlink(f) diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/utils.py b/platform/mellanox/mlnx-platform-api/sonic_platform/utils.py index 83dba151cdb..383e338d23e 100644 --- a/platform/mellanox/mlnx-platform-api/sonic_platform/utils.py +++ b/platform/mellanox/mlnx-platform-api/sonic_platform/utils.py @@ -24,6 +24,12 @@ import threading import time import os + +# Inotify causes an exception when DEBUG env variable is set to a non-integer convertible +# https://github.com/dsoprea/PyInotify/blob/0.2.10/inotify/adapters.py#L37 +os.environ['DEBUG'] = '0' +import inotify.adapters +import inotify.constants from sonic_py_common import device_info from sonic_py_common.logger import Logger @@ -299,6 +305,53 @@ def extract_cpo_ports_index(num_of_asics=1): return _extract_ports_index_by_type(CPO_PORT_TYPE, num_of_asics) +# Use this function only for files that have user read permission. +def wait_for_file_creation(file_path, timeout): + """ + Wait for a file to be created using inotify + + Args: + file_path: Path to the file to wait for + timeout: Timeout in seconds + + Returns: + True if file was created/copied from a temporary file, and is readable, False otherwise + """ + # If file already exists and is readable, return immediately + if os.access(file_path, os.R_OK): + return True + + dir_path = os.path.dirname(file_path) + file_name = os.path.basename(file_path) + + if not os.path.exists(dir_path): + logger.log_debug("Directory {} does not exist".format(dir_path)) + return False + + try: + notifier = inotify.adapters.Inotify() + notifier.add_watch(dir_path, + mask=(inotify.constants.IN_CREATE + | inotify.constants.IN_CLOSE_WRITE + | inotify.constants.IN_MOVED_TO)) + + for event in notifier.event_gen(timeout_s=timeout, yield_nones=False): + (_, type_names, path, filename) = event + if filename == file_name: + if "IN_CREATE" in type_names or "IN_CLOSE_WRITE" in type_names or "IN_MOVED_TO" in type_names: + if os.access(file_path, os.R_OK): + logger.log_info("File {} created and readable".format(file_path)) + return True + + except Exception as e: + logger.log_error("Inotify error while waiting for {}: {}".format(file_path, repr(e))) + + if os.access(file_path, os.R_OK): + return True + + return False + + def extract_asic_id_map(num_of_asics=1): asic_id_map = {} diff --git a/platform/mellanox/mlnx-platform-api/tests/test_bmc.py b/platform/mellanox/mlnx-platform-api/tests/test_bmc.py index 0190de073ce..c6461258eed 100644 --- a/platform/mellanox/mlnx-platform-api/tests/test_bmc.py +++ b/platform/mellanox/mlnx-platform-api/tests/test_bmc.py @@ -1,5 +1,6 @@ # -# Copyright (c) 2025 NVIDIA CORPORATION & AFFILIATES. +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2025-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. # Apache-2.0 # # Licensed under the Apache License, Version 2.0 (the "License"); @@ -41,6 +42,8 @@ def get_name(self): return 'BMC' +@mock.patch('sonic_platform.device_data.DeviceDataManager.is_platform_with_bmc', + mock.MagicMock(return_value=True)) class TestBMC: @mock.patch('sonic_py_common.device_info.get_bmc_build_config', \ mock.MagicMock(return_value={'bmc_nos_account_username': 'testuser', 'bmc_root_account_default_password': 'testpass'})) @@ -80,14 +83,20 @@ def test_bmc_get_version(self, mock_get_firmware_version): @mock.patch('sonic_py_common.device_info.get_bmc_data', \ mock.MagicMock(return_value={'bmc_addr': '169.254.0.1'})) @mock.patch('sonic_platform.bmc.BMC._get_tpm_password', mock.MagicMock(return_value='')) + @mock.patch('sonic_platform_base.redfish_client.RedfishClient.redfish_api_set_min_password_length') @mock.patch('sonic_platform_base.redfish_client.RedfishClient.redfish_api_change_login_password') - def test_bmc_reset_password(self, mock_change_password): + @mock.patch('sonic_platform_base.redfish_client.RedfishClient.redfish_api_get_min_password_length') + def test_bmc_reset_password(self, mock_get_min_length, mock_change_password, mock_set_min_length): """Test reset_password method with successful password reset""" - mock_change_password.return_value = (RedfishClient.ERR_CODE_OK, 'Password changed successfully') + mock_get_min_length.return_value = (RedfishClient.ERR_CODE_OK, 12) + mock_set_min_length.return_value = (RedfishClient.ERR_CODE_OK, '') + mock_change_password.return_value = (RedfishClient.ERR_CODE_OK, '') bmc = BMC.get_instance() ret, msg = bmc.reset_root_password() assert ret == RedfishClient.ERR_CODE_OK - assert msg == 'Password changed successfully' + assert msg == '' + mock_get_min_length.assert_called_once() + assert mock_set_min_length.call_args_list == [mock.call(8), mock.call(12)] mock_change_password.assert_called_once_with('testpass', BMCBase.ROOT_ACCOUNT) @mock.patch('sonic_py_common.device_info.get_bmc_build_config', \ diff --git a/platform/mellanox/mlnx-platform-api/tests/test_change_event.py b/platform/mellanox/mlnx-platform-api/tests/test_change_event.py index 1b5e844fe0c..90b830482bb 100644 --- a/platform/mellanox/mlnx-platform-api/tests/test_change_event.py +++ b/platform/mellanox/mlnx-platform-api/tests/test_change_event.py @@ -32,6 +32,181 @@ from sonic_platform import sfp +class TestChangeEventSeekFailure: + """Cover OSError from fd.seek(0) in change-event polling loops.""" + + @mock.patch('sonic_platform.sfp.SFP.get_fd_for_polling_legacy') + @mock.patch('select.poll') + @mock.patch('sonic_platform.chassis.time.sleep') + @mock.patch('time.monotonic') + @mock.patch( + 'sonic_platform.device_data.DeviceDataManager.is_module_host_management_mode', + mock.MagicMock(return_value=False), + ) + @mock.patch('sonic_platform.device_data.DeviceDataManager.get_sfp_count', mock.MagicMock(return_value=1)) + @mock.patch('sonic_platform.chassis.extract_RJ45_ports_index', mock.MagicMock(return_value=[])) + @mock.patch('sonic_platform.chassis.extract_cpo_ports_index', mock.MagicMock(return_value=[])) + @mock.patch('sonic_platform.sfp.SFP.get_module_status') + @mock.patch('sonic_platform.chassis.Chassis.wait_sfp_ready_for_use', mock.MagicMock(return_value=True)) + def test_get_change_event_legacy_seek_fails( + self, mock_status, mock_time, mock_sleep, mock_create_poll, mock_get_fd, + ): + c = chassis.Chassis() + c.get_sfp(1) + mock_status.return_value = sfp.SFP_STATUS_INSERTED + + mock_poll = mock.MagicMock() + mock_create_poll.return_value = mock_poll + mock_poll.poll = mock.MagicMock(side_effect=[[(1, 10)], []]) + + mock_file = mock.MagicMock() + mock_get_fd.return_value = mock_file + mock_file.fileno = mock.MagicMock(return_value=1) + mock_file.seek.side_effect = OSError(5, 'seek failed') + + mock_time.side_effect = [0, 0, 0.1, 0.9, 1000] + + _, change_event = c.get_change_event(1000) + assert 'sfp' in change_event and not change_event['sfp'] + mock_file.seek.assert_called_with(0) + mock_file.read.assert_not_called() + assert abs(mock_sleep.call_args[0][0] - 0.9) < 0.000001 + + @mock.patch('sonic_platform.sfp.SFP.get_fd_for_polling_legacy') + @mock.patch('select.poll') + @mock.patch('sonic_platform.chassis.time.sleep') + @mock.patch('time.monotonic') + @mock.patch( + 'sonic_platform.device_data.DeviceDataManager.is_module_host_management_mode', + mock.MagicMock(return_value=False), + ) + @mock.patch('sonic_platform.device_data.DeviceDataManager.get_sfp_count', mock.MagicMock(return_value=1)) + @mock.patch('sonic_platform.chassis.extract_RJ45_ports_index', mock.MagicMock(return_value=[])) + @mock.patch('sonic_platform.chassis.extract_cpo_ports_index', mock.MagicMock(return_value=[])) + @mock.patch('sonic_platform.sfp.SFP.get_module_status') + @mock.patch('sonic_platform.chassis.Chassis.wait_sfp_ready_for_use', mock.MagicMock(return_value=True)) + def test_get_change_event_legacy_seek_fails_without_sleep_after_timeout( + self, mock_status, mock_time, mock_sleep, mock_create_poll, mock_get_fd, + ): + c = chassis.Chassis() + c.get_sfp(1) + mock_status.return_value = sfp.SFP_STATUS_INSERTED + + mock_poll = mock.MagicMock() + mock_create_poll.return_value = mock_poll + mock_poll.poll = mock.MagicMock(side_effect=[[(1, 10)], []]) + + mock_file = mock.MagicMock() + mock_get_fd.return_value = mock_file + mock_file.fileno = mock.MagicMock(return_value=1) + mock_file.seek.side_effect = OSError(5, 'seek failed') + + mock_time.side_effect = [0, 0, 1000, 1000, 1000] + + _, change_event = c.get_change_event(1000) + assert 'sfp' in change_event and not change_event['sfp'] + mock_sleep.assert_not_called() + + @mock.patch('sonic_platform.wait_sfp_ready_task.WaitSfpReadyTask.get_ready_set') + @mock.patch('sonic_platform.sfp.SFP.get_fd') + @mock.patch('select.poll') + @mock.patch('sonic_platform.chassis.time.sleep') + @mock.patch('time.monotonic') + @mock.patch( + 'sonic_platform.device_data.DeviceDataManager.is_module_host_management_mode', + mock.MagicMock(return_value=True), + ) + @mock.patch('sonic_platform.device_data.DeviceDataManager.get_sfp_count', mock.MagicMock(return_value=1)) + @mock.patch('sonic_platform.chassis.extract_RJ45_ports_index', mock.MagicMock(return_value=[])) + @mock.patch('sonic_platform.chassis.extract_cpo_ports_index', mock.MagicMock(return_value=[])) + @mock.patch('sonic_platform.module_host_mgmt_initializer.ModuleHostMgmtInitializer.initialize', mock.MagicMock()) + def test_get_change_event_module_host_management_seek_fails( + self, mock_time, mock_sleep, mock_create_poll, mock_get_fd, mock_ready, + ): + c = chassis.Chassis() + c.initialize_sfp() + s = c._sfp_list[0] + s.state = sfp.STATE_SW_CONTROL + + mock_poll = mock.MagicMock() + mock_create_poll.return_value = mock_poll + mock_poll.poll = mock.MagicMock(side_effect=[[(1, 10)], []]) + + mock_hw_present_file = mock.MagicMock() + mock_power_good_file = mock.MagicMock() + mock_hw_present_file.read = mock.MagicMock(return_value=sfp.SFP_STATUS_INSERTED) + mock_hw_present_file.fileno = mock.MagicMock(return_value=1) + mock_hw_present_file.seek.side_effect = OSError(5, 'seek failed') + mock_power_good_file.read = mock.MagicMock(return_value=1) + mock_power_good_file.fileno = mock.MagicMock(return_value=2) + + def get_fd(fd_type): + if fd_type == 'hw_present': + return mock_hw_present_file + if fd_type == 'power_good': + return mock_power_good_file + return mock.MagicMock() + + mock_get_fd.side_effect = get_fd + mock_ready.return_value = set() + + mock_time.side_effect = [0, 0, 0.1, 0.9, 1000] + + _, change_event = c.get_change_event(1000) + assert 'sfp' in change_event and not change_event['sfp'] + mock_hw_present_file.seek.assert_called_with(0) + assert abs(mock_sleep.call_args[0][0] - 0.9) < 0.000001 + + @mock.patch('sonic_platform.wait_sfp_ready_task.WaitSfpReadyTask.get_ready_set') + @mock.patch('sonic_platform.sfp.SFP.get_fd') + @mock.patch('select.poll') + @mock.patch('sonic_platform.chassis.time.sleep') + @mock.patch('time.monotonic') + @mock.patch( + 'sonic_platform.device_data.DeviceDataManager.is_module_host_management_mode', + mock.MagicMock(return_value=True), + ) + @mock.patch('sonic_platform.device_data.DeviceDataManager.get_sfp_count', mock.MagicMock(return_value=1)) + @mock.patch('sonic_platform.chassis.extract_RJ45_ports_index', mock.MagicMock(return_value=[])) + @mock.patch('sonic_platform.chassis.extract_cpo_ports_index', mock.MagicMock(return_value=[])) + @mock.patch('sonic_platform.module_host_mgmt_initializer.ModuleHostMgmtInitializer.initialize', mock.MagicMock()) + def test_get_change_event_module_host_management_seek_fails_without_sleep_after_timeout( + self, mock_time, mock_sleep, mock_create_poll, mock_get_fd, mock_ready, + ): + c = chassis.Chassis() + c.initialize_sfp() + s = c._sfp_list[0] + s.state = sfp.STATE_SW_CONTROL + + mock_poll = mock.MagicMock() + mock_create_poll.return_value = mock_poll + mock_poll.poll = mock.MagicMock(side_effect=[[(1, 10)], []]) + + mock_hw_present_file = mock.MagicMock() + mock_power_good_file = mock.MagicMock() + mock_hw_present_file.read = mock.MagicMock(return_value=sfp.SFP_STATUS_INSERTED) + mock_hw_present_file.fileno = mock.MagicMock(return_value=1) + mock_hw_present_file.seek.side_effect = OSError(5, 'seek failed') + mock_power_good_file.read = mock.MagicMock(return_value=1) + mock_power_good_file.fileno = mock.MagicMock(return_value=2) + + def get_fd(fd_type): + if fd_type == 'hw_present': + return mock_hw_present_file + if fd_type == 'power_good': + return mock_power_good_file + return mock.MagicMock() + + mock_get_fd.side_effect = get_fd + mock_ready.return_value = set() + + mock_time.side_effect = [0, 0, 1000, 1000, 1000] + + _, change_event = c.get_change_event(1000) + assert 'sfp' in change_event and not change_event['sfp'] + mock_sleep.assert_not_called() + + class TestChangeEvent: @mock.patch('sonic_platform.sfp.SFP.get_fd_for_polling_legacy') @mock.patch('select.poll') @@ -60,7 +235,7 @@ def test_get_change_event_legacy(self, mock_status, mock_time, mock_create_poll, timeout = 1000 # mock time function so that the while loop exit early - mock_time.side_effect = [0, timeout] + mock_time.side_effect = [0, 0, timeout] # no event, expect returning empty change event _, change_event = c.get_change_event(timeout) @@ -69,7 +244,7 @@ def test_get_change_event_legacy(self, mock_status, mock_time, mock_create_poll, # dummy event, expect returning empty change event sfp_index = s.sdk_index + 1 mock_poll.poll.return_value = [(1, 10)] - mock_time.side_effect = [0, timeout] + mock_time.side_effect = [0, 0, timeout] _, change_event = c.get_change_event(timeout) assert 'sfp' in change_event and not change_event['sfp'] @@ -139,7 +314,7 @@ def get_fd(fd_type): timeout = 1000 # mock time function so that the while loop exit early - mock_time.side_effect = [0, timeout] + mock_time.side_effect = [0, 0, timeout] # no event, expect returning empty change event _, change_event = c.get_change_event(timeout) @@ -148,7 +323,7 @@ def get_fd(fd_type): # dummy event, expect returning empty change event sfp_index = s.sdk_index + 1 mock_poll.poll.return_value = [(1, 10)] - mock_time.side_effect = [0, timeout] + mock_time.side_effect = [0, 0, timeout] _, change_event = c.get_change_event(timeout) assert 'sfp' in change_event and not change_event['sfp'] @@ -167,7 +342,7 @@ def get_fd(fd_type): s.get_power_good = mock.MagicMock(return_value=True) s.determine_control_type = mock.MagicMock(return_value=sfp.SFP_FW_CONTROL) s.set_control_type = mock.MagicMock() - mock_time.side_effect = [0, timeout] + mock_time.side_effect = [0, 0, timeout] mock_ready.return_value = set([0]) mock_hw_present_file.read.return_value = sfp.SFP_STATUS_INSERTED _, change_event = c.get_change_event(timeout) @@ -199,7 +374,7 @@ def get_fd(fd_type): assert 3 not in c.registered_fds # stop polling present # plug in a software control cable, expect returning insert event - mock_time.side_effect = [0, timeout] + mock_time.side_effect = [0, 0, timeout] mock_ready.return_value = set([0]) mock_poll.poll.return_value = [(1, 10)] mock_hw_present_file.read.return_value = sfp.SFP_STATUS_INSERTED diff --git a/platform/mellanox/mlnx-platform-api/tests/test_chassis.py b/platform/mellanox/mlnx-platform-api/tests/test_chassis.py index 002f932a7ee..c285f0df847 100644 --- a/platform/mellanox/mlnx-platform-api/tests/test_chassis.py +++ b/platform/mellanox/mlnx-platform-api/tests/test_chassis.py @@ -333,8 +333,6 @@ def test_parse_vpd(self): content = chassis._parse_vpd_data(os.path.join(test_path, 'vpd_data_file')) assert content.get('REV') == 'A7' - @mock.patch('sonic_platform.module.SonicV2Connector', mock.MagicMock()) - @mock.patch('sonic_platform.module.ConfigDBConnector', mock.MagicMock()) def test_smartswitch(self): orig_dpu_count = DeviceDataManager.get_dpu_count DeviceDataManager.get_dpu_count = mock.MagicMock(return_value=4) @@ -406,3 +404,23 @@ def test_smartswitch(self): chassis.get_dpu_id('ABC') DeviceDataManager.get_platform_dpus_data = orig_dpus_data DeviceDataManager.get_dpu_count = orig_dpu_count + + @mock.patch('sonic_platform.chassis.utils.is_host', mock.MagicMock(return_value=True)) + def test_initialize_components_bmc(self): + chassis = Chassis() + chassis._component_list = [] + + with mock.patch.object(DeviceDataManager, 'is_platform_with_bmc', return_value=True), \ + mock.patch.object(DeviceDataManager, 'get_bios_component', return_value=MagicMock()), \ + mock.patch.object(DeviceDataManager, 'get_cpld_component_list', return_value=[]), \ + mock.patch('sonic_platform.chassis.Chassis.initialize_bmc') as mock_init_bmc: + chassis.initialize_components() + mock_init_bmc.assert_called_once() + + chassis._component_list = [] + with mock.patch.object(DeviceDataManager, 'is_platform_with_bmc', return_value=False), \ + mock.patch.object(DeviceDataManager, 'get_bios_component', return_value=MagicMock()), \ + mock.patch.object(DeviceDataManager, 'get_cpld_component_list', return_value=[]), \ + mock.patch('sonic_platform.chassis.Chassis.initialize_bmc') as mock_init_bmc: + chassis.initialize_components() + mock_init_bmc.assert_not_called() diff --git a/platform/mellanox/mlnx-platform-api/tests/test_component.py b/platform/mellanox/mlnx-platform-api/tests/test_component.py index 9c0649374da..41bd89d7f5f 100644 --- a/platform/mellanox/mlnx-platform-api/tests/test_component.py +++ b/platform/mellanox/mlnx-platform-api/tests/test_component.py @@ -1,6 +1,7 @@ # -# Copyright (c) 2023-2025 NVIDIA CORPORATION & AFFILIATES. -# Apache-2.0 +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2023-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -52,6 +53,7 @@ class TestComponent: @mock.patch('sonic_platform.chassis.utils.is_host') + @mock.patch('sonic_platform.chassis.DeviceDataManager.is_platform_with_bmc', mock.MagicMock(return_value=False)) @mock.patch('sonic_platform.chassis.DeviceDataManager.get_cpld_component_list', mock.MagicMock(return_value=[])) def test_chassis_component(self, mock_is_host): mock_is_host.return_value = False @@ -207,14 +209,18 @@ def test_bios_2201_component(self, mock_check_output): with pytest.raises(RuntimeError): c.get_firmware_version() + @mock.patch('sonic_platform.component.ComponentCPLD._is_spc1_asic') @mock.patch('sonic_platform.component.MPFAManager.cleanup', mock.MagicMock()) @mock.patch('sonic_platform.component.MPFAManager.extract', mock.MagicMock()) @mock.patch('sonic_platform.component.subprocess.check_call') @mock.patch('sonic_platform.component.MPFAManager.get_path') @mock.patch('sonic_platform.component.MPFAManager.get_metadata') + @mock.patch('sonic_platform.device_data.DeviceDataManager.is_platform_with_bmc', + mock.MagicMock(return_value=False)) @mock.patch('sonic_platform.component.os.path.exists') - def test_cpld_component(self, mock_exists, mock_get_meta_data, mock_get_path, mock_check_call): + def test_cpld_component(self, mock_exists, mock_get_meta_data, mock_get_path, mock_check_call, mock_is_spc1): c = ComponentCPLD(1) + mock_is_spc1.return_value = True c._read_generic_file = mock.MagicMock(side_effect=[None, '1', None]) assert c.get_firmware_version() == 'CPLD000000_REV0100' @@ -235,10 +241,13 @@ def test_cpld_component(self, mock_exists, mock_get_meta_data, mock_get_path, mo c._check_file_validity = mock.MagicMock(return_value=False) assert not c._install_firmware('') c._check_file_validity = mock.MagicMock(return_value=True) - c._ComponentCPLD__get_mst_device = mock.MagicMock(return_value=None) + c._ComponentCPLD__get_mst_device = mock.MagicMock(side_effect=RuntimeError('no device')) assert not c._install_firmware('') c._ComponentCPLD__get_mst_device = mock.MagicMock(return_value='some dev') assert c._install_firmware('') + mock_check_call.assert_called_once_with( + ['cpldupdate', '--dev', 'some dev', '--print-progress', ''], + universal_newlines=True) mock_check_call.side_effect = subprocess.CalledProcessError(1, None) assert not c._install_firmware('') @@ -281,6 +290,70 @@ def test_cpld_component(self, mock_exists, mock_get_meta_data, mock_get_path, mo c.install_firmware = mock.MagicMock(return_value=True) assert c.auto_update_firmware('', 'cold') == FW_AUTO_SCHEDULED + @mock.patch('sonic_platform.component.utils.write_file') + @mock.patch('sonic_platform.device_data.DeviceDataManager.is_platform_with_bmc', + mock.MagicMock(return_value=True)) + @mock.patch('sonic_platform.component.MPFAManager.cleanup', mock.MagicMock()) + @mock.patch('sonic_platform.component.MPFAManager.extract', mock.MagicMock()) + @mock.patch('sonic_platform.component.MPFAManager.get_path') + @mock.patch('sonic_platform.component.MPFAManager.get_metadata') + def test_cpld_update_firmware_bmc_mpfa_triggers_aux_power_cycle(self, mock_get_meta_data, mock_get_path, mock_write): + c = ComponentCPLD(1) + c._install_firmware = mock.MagicMock(return_value=True) + mock_meta_data = mock.MagicMock() + mock_meta_data.has_option = mock.MagicMock(return_value=True) + mock_meta_data.get = mock.MagicMock(return_value='burn') + mock_get_meta_data.return_value = mock_meta_data + mock_get_path.return_value = '/tmp' + + c.update_firmware('a.mpfa') + + c._install_firmware.assert_called_once_with('/tmp/burn') + mock_write.assert_called_once_with(ComponentCPLD.AUX_PWR_CYCLE_FILE, '1', raise_exception=True) + + @mock.patch('sonic_platform.component.utils.write_file') + @mock.patch('sonic_platform.device_data.DeviceDataManager.is_platform_with_bmc', + mock.MagicMock(return_value=True)) + @mock.patch('sonic_platform.component.MPFAManager.cleanup', mock.MagicMock()) + @mock.patch('sonic_platform.component.MPFAManager.extract', mock.MagicMock()) + @mock.patch('sonic_platform.component.MPFAManager.get_path') + @mock.patch('sonic_platform.component.MPFAManager.get_metadata') + def test_cpld_update_firmware_bmc_mpfa_burn_fail_skips_aux_power_cycle(self, mock_get_meta_data, mock_get_path, mock_write): + c = ComponentCPLD(1) + c._install_firmware = mock.MagicMock(return_value=False) + mock_meta_data = mock.MagicMock() + mock_meta_data.has_option = mock.MagicMock(return_value=True) + mock_meta_data.get = mock.MagicMock(return_value='burn') + mock_get_meta_data.return_value = mock_meta_data + mock_get_path.return_value = '/tmp' + + c.update_firmware('a.mpfa') + + c._install_firmware.assert_called_once_with('/tmp/burn') + mock_write.assert_not_called() + + + @mock.patch('sonic_platform.component.ComponentCPLD._is_spc1_asic') + @mock.patch('sonic_platform.component.subprocess.check_call') + def test_cpld_component_install_non_spc1(self, mock_check_call, mock_is_spc1): + """Non-SPC1 CPLD component install: GPIO cpldupdate path, no MST device.""" + c = ComponentCPLD(1) + mock_is_spc1.return_value = False + c._check_file_validity = mock.MagicMock(return_value=True) + c._ComponentCPLD__get_mst_device = mock.MagicMock(return_value=None) + install_path = '/tmp/test_cpld.vme' + + assert c._install_firmware(install_path) + c._ComponentCPLD__get_mst_device.assert_not_called() + mock_check_call.assert_called_once_with( + ['cpldupdate', '--gpio', '--print-progress', install_path], + universal_newlines=True) + + mock_check_call.reset_mock() + mock_check_call.side_effect = subprocess.CalledProcessError(1, None) + assert not c._install_firmware(install_path) + c._ComponentCPLD__get_mst_device.assert_not_called() + @mock.patch('sonic_platform.component.ComponentCPLD._read_generic_file', mock.MagicMock(return_value='3')) def test_cpld_get_component_list(self): component_list = ComponentCPLD.get_component_list() @@ -295,15 +368,18 @@ def test_cpld_get_component_list_dpu(self): for index, item in enumerate(component_list): assert item.name == 'DPU{}_FPGA'.format(index + 1) - def test_cpld_get_mst_device(self): + @mock.patch('sonic_platform.component.subprocess.check_output') + def test_cpld_get_mst_device(self, mock_check_output): ComponentCPLD.MST_DEVICE_PATH = '/tmp/mst' os.system('rm -rf /tmp/mst') c = ComponentCPLD(1) - assert c._ComponentCPLD__get_mst_device() is None + mock_check_output.return_value = b'' + assert c._ComponentCPLD__get_mst_device() == '' os.makedirs(ComponentCPLD.MST_DEVICE_PATH) - assert c._ComponentCPLD__get_mst_device() is None + assert c._ComponentCPLD__get_mst_device() == '' with open('/tmp/mst/mt0_pci_cr0', 'w+') as f: f.write('dummy') + mock_check_output.return_value = b'/tmp/mst/mt0_pci_cr0' assert c._ComponentCPLD__get_mst_device() == '/tmp/mst/mt0_pci_cr0' @mock.patch('sonic_platform.component.subprocess.check_call') diff --git a/platform/mellanox/mlnx-platform-api/tests/test_device_data.py b/platform/mellanox/mlnx-platform-api/tests/test_device_data.py index 2badc885154..869af108981 100644 --- a/platform/mellanox/mlnx-platform-api/tests/test_device_data.py +++ b/platform/mellanox/mlnx-platform-api/tests/test_device_data.py @@ -53,13 +53,37 @@ def test_get_linecard_max_port_count(self): def test_get_bios_component(self): assert DeviceDataManager.get_bios_component() is not None - @mock.patch('sonic_platform.utils.get_path_to_hwsku_directory', mock.MagicMock(return_value='/tmp')) + @mock.patch('sonic_platform.device_data.DeviceDataManager.is_multi_asic_platform', mock.MagicMock(return_value=False)) + @mock.patch('sonic_platform.utils.get_path_to_hwsku_directory') @mock.patch('sonic_platform.device_data.utils.read_key_value_file') - def test_is_module_host_management_mode(self, mock_read): + def test_is_module_host_management_mode(self, mock_read, mock_hwsku_dir): + mock_hwsku_dir.return_value = '/hwsku' + + DeviceDataManager.is_module_host_management_mode.__func__.__wrapped__.return_value = None + mock_read.return_value = {'SAI_INDEPENDENT_MODULE_MODE': '1'} + assert DeviceDataManager.is_module_host_management_mode() + mock_hwsku_dir.assert_called_once_with(asic_id=None) + mock_read.assert_called_once_with('/hwsku/sai.profile', delimeter='=') + + DeviceDataManager.is_module_host_management_mode.__func__.__wrapped__.return_value = None + mock_read.reset_mock() + mock_hwsku_dir.reset_mock() mock_read.return_value = {} assert not DeviceDataManager.is_module_host_management_mode() + mock_hwsku_dir.assert_called_once_with(asic_id=None) + mock_read.assert_called_once_with('/hwsku/sai.profile', delimeter='=') + + @mock.patch('sonic_platform.device_data.DeviceDataManager.is_multi_asic_platform', mock.MagicMock(return_value=True)) + @mock.patch('sonic_platform.utils.get_path_to_hwsku_directory') + @mock.patch('sonic_platform.device_data.utils.read_key_value_file') + def test_is_module_host_management_mode_multi_asic(self, mock_read, mock_hwsku_dir): + mock_hwsku_dir.return_value = '/hwsku/0' + + DeviceDataManager.is_module_host_management_mode.__func__.__wrapped__.return_value = None mock_read.return_value = {'SAI_INDEPENDENT_MODULE_MODE': '1'} assert DeviceDataManager.is_module_host_management_mode() + mock_hwsku_dir.assert_called_once_with(asic_id=0) + mock_read.assert_called_once_with('/hwsku/0/sai.profile', delimeter='=') @mock.patch('sonic_py_common.device_info.get_path_to_platform_dir', mock.MagicMock(return_value='/tmp')) @mock.patch('sonic_platform.device_data.utils.load_json_file') diff --git a/platform/mellanox/mlnx-platform-api/tests/test_dpuctlplat.py b/platform/mellanox/mlnx-platform-api/tests/test_dpuctlplat.py index 2dbf205c732..7e1bb65ce27 100644 --- a/platform/mellanox/mlnx-platform-api/tests/test_dpuctlplat.py +++ b/platform/mellanox/mlnx-platform-api/tests/test_dpuctlplat.py @@ -1,6 +1,6 @@ # # SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES -# Copyright (c) 2024-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# Copyright (c) 2024-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. # Apache-2.0 # # Licensed under the Apache License, Version 2.0 (the "License"); @@ -17,6 +17,7 @@ # """Tests for dpuctlplat Platform API Wrapper""" +import errno import os import sys import time @@ -26,8 +27,10 @@ from sonic_platform.dpuctlplat import ( DpuCtlPlat, BootProgEnum, PCI_DEV_BASE, OperationType, - WAIT_FOR_SHTDN, WAIT_FOR_DPU_READY + WAIT_FOR_SHTDN, WAIT_FOR_DPU_READY, + MLX5_CORE_BIND_PATH, MLX5_CORE_UNBIND_PATH, ) +from sonic_platform.device_data import DpuInterfaceEnum test_path = os.path.dirname(os.path.abspath(__file__)) modules_path = os.path.dirname(test_path) @@ -36,10 +39,10 @@ # Test data TEST_DPU_LIST = ['dpu0', 'dpu1', 'dpu2', 'dpu3'] -TEST_PCI_PATH = os.path.join(PCI_DEV_BASE, "0000:08:00.0") -TEST_RSHIM_PCI_PATH = os.path.join(PCI_DEV_BASE, "0000:08:00.1") -TEST_PCI_REMOVE_PATH = os.path.join(TEST_PCI_PATH, "remove") -TEST_RSHIM_PCI_REMOVE_PATH = os.path.join(TEST_RSHIM_PCI_PATH, "remove") +TEST_PCI_BDF = "0000:08:00.0" +TEST_RSHIM_PCI_BDF = "0000:08:00.1" +TEST_PCI_PATH = os.path.join(PCI_DEV_BASE, TEST_PCI_BDF) +TEST_RSHIM_PCI_PATH = os.path.join(PCI_DEV_BASE, TEST_RSHIM_PCI_BDF) @pytest.fixture def dpuctl_obj(): @@ -47,6 +50,10 @@ def dpuctl_obj(): obj = DpuCtlPlat('dpu0') obj.setup_logger(True) obj.pci_dev_path = [TEST_PCI_PATH, TEST_RSHIM_PCI_PATH] + obj.pci_dev_path_map = { + DpuInterfaceEnum.PCIE_INT: TEST_PCI_PATH, + DpuInterfaceEnum.RSHIM_PCIE_INT: TEST_RSHIM_PCI_PATH, + } return obj class TestDpuCtlPlatInit: @@ -66,10 +73,12 @@ def test_setup_logger(self, dpuctl_obj): """Test logger setup""" # Test with print mode dpuctl_obj.setup_logger(True) - # Test that the logger functions add timestamps + # Test that the logger functions add timestamps. Patch logger so it doesn't + # run in test (avoids socket errors and extra print calls from errors). with patch('time.strftime') as mock_time: mock_time.return_value = "2024-01-01 12:00:00" - with patch('builtins.print') as mock_print: + with patch('builtins.print') as mock_print, \ + patch('sonic_platform.dpuctlplat.logger.log_notice'): dpuctl_obj.logger_info("test message") mock_print.assert_called_once_with("[2024-01-01 12:00:00] test message") @@ -82,55 +91,180 @@ def test_setup_logger(self, dpuctl_obj): def test_get_pci_dev_path(self, dpuctl_obj): """Test PCI device path retrieval""" + # Reset both caches so the resolver actually runs. + dpuctl_obj.pci_dev_path = [] + dpuctl_obj.pci_dev_path_map = {} + # Test with both PCI and RSHIM paths with patch('sonic_platform.device_data.DeviceDataManager.get_dpu_interface') as mock_get: - mock_get.side_effect = ["0000:08:00.0", "0000:08:00.1"] + mock_get.side_effect = [TEST_PCI_BDF, TEST_RSHIM_PCI_BDF] paths = dpuctl_obj.get_pci_dev_path() assert len(paths) == 2 - assert paths[0].endswith("0000:08:00.0") - assert paths[1].endswith("0000:08:00.1") + assert paths[0].endswith(TEST_PCI_BDF) + assert paths[1].endswith(TEST_RSHIM_PCI_BDF) - # Test with missing PCI path + # Test with missing PCIE_INT path: error names the missing interface. + dpuctl_obj.pci_dev_path = [] + dpuctl_obj.pci_dev_path_map = {} with patch('sonic_platform.device_data.DeviceDataManager.get_dpu_interface') as mock_get: - mock_get.side_effect = [None, "0000:08:00.1"] - dpuctl_obj.pci_dev_path = [] + mock_get.side_effect = [None, TEST_RSHIM_PCI_BDF] with pytest.raises(RuntimeError) as exc: dpuctl_obj.get_pci_dev_path() - assert "Unable to obtain PCI device IDs" in str(exc.value) + assert "Unable to obtain PCI device ID" in str(exc.value) + assert DpuInterfaceEnum.PCIE_INT.value in str(exc.value) - # Test with missing RSHIM path + # Test with missing RSHIM_PCIE_INT path: error names the missing interface. + dpuctl_obj.pci_dev_path = [] + dpuctl_obj.pci_dev_path_map = {} with patch('sonic_platform.device_data.DeviceDataManager.get_dpu_interface') as mock_get: - mock_get.side_effect = ["0000:08:00.0", None] + mock_get.side_effect = [TEST_PCI_BDF, None] with pytest.raises(RuntimeError) as exc: dpuctl_obj.get_pci_dev_path() - assert "Unable to obtain PCI device IDs" in str(exc.value) + assert "Unable to obtain PCI device ID" in str(exc.value) + assert DpuInterfaceEnum.RSHIM_PCIE_INT.value in str(exc.value) + + def test_get_pci_dev_path_map(self, dpuctl_obj): + """Test deterministic name-keyed map of DPU PCI device paths.""" + dpuctl_obj.pci_dev_path = [] + dpuctl_obj.pci_dev_path_map = {} + + with patch('sonic_platform.device_data.DeviceDataManager.get_dpu_interface') as mock_get: + mock_get.side_effect = [TEST_PCI_BDF, TEST_RSHIM_PCI_BDF] + path_map = dpuctl_obj.get_pci_dev_path_map() + assert set(path_map.keys()) == { + DpuInterfaceEnum.PCIE_INT, + DpuInterfaceEnum.RSHIM_PCIE_INT, + } + assert path_map[DpuInterfaceEnum.PCIE_INT].endswith(TEST_PCI_BDF) + assert path_map[DpuInterfaceEnum.RSHIM_PCIE_INT].endswith(TEST_RSHIM_PCI_BDF) + + # Result is cached; a second call shouldn't re-query DeviceDataManager. + with patch('sonic_platform.device_data.DeviceDataManager.get_dpu_interface') as mock_get: + same_map = dpuctl_obj.get_pci_dev_path_map() + assert same_map is path_map + mock_get.assert_not_called() + + # get_pci_dev_path() should be derived from the same source of truth + # in the order declared by PCI_DEV_INTERFACES. + dpuctl_obj.pci_dev_path = [] + derived = dpuctl_obj.get_pci_dev_path() + assert derived == [ + path_map[DpuCtlPlat.PCI_DEV_INTERFACES[0]], + path_map[DpuCtlPlat.PCI_DEV_INTERFACES[1]], + ] class TestDpuCtlPlatPCI: """Tests for PCI-related functionality""" def test_pci_operations(self, dpuctl_obj): - """Test PCI remove and scan operations""" + """Test PCI unbind/bind operations. + + ``dpu_pci_remove`` unbinds PCIE_INT from mlx5_core and intentionally + skips the RSHIM/SoC device. ``dpu_pci_scan`` binds PCIE_INT + back, or logs a skip message when the driver is already bound. + """ written_data = [] def mock_write_file(file_name, content_towrite): written_data.append({"file": file_name, "data": content_towrite}) return True - # Test PCI remove - should remove both devices + # PCI remove with driver bound: writes BDF to mlx5_core/unbind. + # No write is performed for RSHIM_PCIE_INT (skipped intentionally). with patch.object(dpuctl_obj, 'write_file', wraps=mock_write_file), \ patch('os.path.exists', return_value=True): assert dpuctl_obj.dpu_pci_remove() - assert len(written_data) == 2 - assert written_data[0]["file"] == TEST_PCI_REMOVE_PATH - assert written_data[0]["data"] == "1" - assert written_data[1]["file"] == TEST_RSHIM_PCI_REMOVE_PATH - assert written_data[1]["data"] == "1" + assert len(written_data) == 1 + assert written_data[0]["file"] == MLX5_CORE_UNBIND_PATH + assert written_data[0]["data"] == TEST_PCI_BDF - # Test PCI scan - should scan devices + # PCI remove no-op when the driver isn't bound: no writes, still True. written_data.clear() - with patch.object(dpuctl_obj, 'write_file', wraps=mock_write_file): + with patch.object(dpuctl_obj, 'write_file', wraps=mock_write_file), \ + patch('os.path.exists', return_value=False), \ + patch.object(dpuctl_obj, 'log_debug') as mock_dbg: + assert dpuctl_obj.dpu_pci_remove() + assert written_data == [] + assert any("Skipping unbind" in c.args[0] for c in mock_dbg.call_args_list) + + # PCI scan when the driver is already bound: skip bind, log info, + # no write happens. + written_data.clear() + with patch.object(dpuctl_obj, 'write_file', wraps=mock_write_file), \ + patch('os.path.exists', return_value=True), \ + patch.object(dpuctl_obj, 'log_info') as mock_log: assert dpuctl_obj.dpu_pci_scan() - assert written_data[0]["file"].endswith("rescan") - assert written_data[0]["data"] == "1" + assert written_data == [] + assert any("skip bind" in c.args[0] for c in mock_log.call_args_list) + + # PCI scan when the driver isn't bound: writes BDF to mlx5_core/bind. + written_data.clear() + + def exists_for_bind(path): + # Driver symlink absent; device + bind path present. + return not path.endswith("/driver") + + with patch.object(dpuctl_obj, 'write_file', wraps=mock_write_file), \ + patch('os.path.exists', side_effect=exists_for_bind): + assert dpuctl_obj.dpu_pci_scan() + assert len(written_data) == 1 + assert written_data[0]["file"] == MLX5_CORE_BIND_PATH + assert written_data[0]["data"] == TEST_PCI_BDF + + # PCI scan when the PCIE_INT device itself is missing from the bus: + # warning logged, no bind write performed. + written_data.clear() + + def exists_missing_pci(path): + if path == TEST_PCI_PATH: + return False + if path.endswith("/driver"): + return False + return True + + with patch.object(dpuctl_obj, 'write_file', wraps=mock_write_file), \ + patch('os.path.exists', side_effect=exists_missing_pci), \ + patch.object(dpuctl_obj, 'log_warning') as mock_warn: + assert dpuctl_obj.dpu_pci_scan() + assert written_data == [] + assert any(TEST_PCI_PATH in c.args[0] for c in mock_warn.call_args_list) + + # PCI scan when the PCIE_INT device is present but mlx5_core bind path + # is missing: warning logged about the bind path, no bind write performed. + written_data.clear() + + def exists_no_bindpath(path): + if path == TEST_PCI_PATH: + return True + if path.endswith("/driver"): + return False + if path == MLX5_CORE_BIND_PATH: + return False + return True + + with patch.object(dpuctl_obj, 'write_file', wraps=mock_write_file), \ + patch('os.path.exists', side_effect=exists_no_bindpath), \ + patch.object(dpuctl_obj, 'log_warning') as mock_warn: + assert dpuctl_obj.dpu_pci_scan() + assert written_data == [] + assert any( + MLX5_CORE_BIND_PATH in c.args[0] + for c in mock_warn.call_args_list + ) + + # PCI scan when RSHIM/SoC device hasn't reappeared: warning logged. + written_data.clear() + + def exists_missing_rshim(path): + if path == TEST_RSHIM_PCI_PATH: + return False + return True # driver_link present, so bind is skipped (log only) + + with patch.object(dpuctl_obj, 'write_file', wraps=mock_write_file), \ + patch('os.path.exists', side_effect=exists_missing_rshim), \ + patch.object(dpuctl_obj, 'log_warning') as mock_warn: + assert dpuctl_obj.dpu_pci_scan() + assert written_data == [] + assert any(TEST_RSHIM_PCI_PATH in c.args[0] for c in mock_warn.call_args_list) class TestDpuCtlPlatPower: """Tests for power management functionality""" @@ -152,24 +286,24 @@ def mock_write_file(file_name, content_towrite): with patch.object(dpuctl_obj, 'write_file', wraps=mock_write_file), \ patch.object(dpuctl_obj, 'read_boot_prog', return_value=BootProgEnum.OS_RUN.value): assert dpuctl_obj.dpu_power_off(True) - assert len(written_data) == 4 # Both PCI and RSHIM removals + rst + pwr_force - assert written_data[0]["file"] == TEST_PCI_REMOVE_PATH - assert written_data[0]["data"] == "1" - assert written_data[1]["file"] == TEST_RSHIM_PCI_REMOVE_PATH - assert written_data[1]["data"] == "1" - assert written_data[2]["data"] == "0" # rst - assert written_data[3]["data"] == "0" # pwr_force + # 1 unbind (PCIE_INT, RSHIM intentionally skipped) + rst + pwr_force + assert len(written_data) == 3 + assert written_data[0]["file"] == MLX5_CORE_UNBIND_PATH + assert written_data[0]["data"] == TEST_PCI_BDF + assert written_data[1]["data"] == "0" # rst + assert written_data[2]["data"] == "0" # pwr_force # Test normal power off written_data.clear() with patch.object(dpuctl_obj, 'write_file', wraps=mock_write_file), \ patch.object(dpuctl_obj, 'read_boot_prog', return_value=BootProgEnum.OS_RUN.value): assert dpuctl_obj.dpu_power_off(False) - assert len(written_data) == 4 # Both PCI and RSHIM removals + rst + pwr - assert written_data[0]["file"] == TEST_PCI_REMOVE_PATH - assert written_data[1]["file"] == TEST_RSHIM_PCI_REMOVE_PATH - assert written_data[2]["file"].endswith("_rst") - assert written_data[3]["file"].endswith("_pwr") + # 1 unbind + rst (from dpu_go_down) + pwr + assert len(written_data) == 3 + assert written_data[0]["file"] == MLX5_CORE_UNBIND_PATH + assert written_data[0]["data"] == TEST_PCI_BDF + assert written_data[1]["file"].endswith("_rst") + assert written_data[2]["file"].endswith("_pwr") # Test power off when already off with patch.object(dpuctl_obj, 'read_boot_prog', return_value=BootProgEnum.RST.value), \ @@ -183,7 +317,8 @@ def mock_write_file(file_name, content_towrite): patch.object(dpuctl_obj, 'read_boot_prog', return_value=BootProgEnum.OS_RUN.value): assert dpuctl_obj.dpu_power_off(False, skip_pre_post=True) assert len(written_data) == 2 # Only rst and pwr operations - assert not any("remove" in data["file"] for data in written_data) + # Pre-shutdown skipped, so no mlx5_core unbind happens. + assert not any(d["file"] == MLX5_CORE_UNBIND_PATH for d in written_data) assert written_data[0]["file"].endswith("_rst") assert written_data[1]["file"].endswith("_pwr") @@ -200,18 +335,21 @@ def mock_write_file(file_name, content_towrite): written_data.append({"file": file_name, "data": content_towrite}) return True - # Test force power on + # Test force power on. With os.path.exists mocked True, dpu_pci_scan + # sees the driver as already bound and logs a skip message instead + # of writing to mlx5_core/bind. with patch.object(dpuctl_obj, 'write_file', wraps=mock_write_file), \ patch.object(dpuctl_obj, 'read_boot_prog', return_value=BootProgEnum.RST.value), \ - patch.object(dpuctl_obj, 'read_force_power_path', return_value=1): + patch.object(dpuctl_obj, 'read_force_power_path', return_value=1), \ + patch.object(dpuctl_obj, 'log_info') as mock_log: assert dpuctl_obj.dpu_power_on(True) - assert len(written_data) == 3 # pwr_force + rst + rescan + assert len(written_data) == 2 # pwr_force + rst (scan skipped: already bound) assert written_data[0]["file"].endswith("_pwr_force") assert written_data[0]["data"] == "1" assert written_data[1]["file"].endswith("_rst") assert written_data[1]["data"] == "1" - assert written_data[2]["file"].endswith("rescan") - assert written_data[2]["data"] == "1" + assert any("skip bind" in c.args[0] for c in mock_log.call_args_list) + assert not any(d["file"] == MLX5_CORE_BIND_PATH for d in written_data) # Test normal power on written_data.clear() @@ -219,10 +357,28 @@ def mock_write_file(file_name, content_towrite): patch.object(dpuctl_obj, 'read_boot_prog', return_value=BootProgEnum.RST.value), \ patch.object(dpuctl_obj, 'read_force_power_path', return_value=1): assert dpuctl_obj.dpu_power_on(False) - assert len(written_data) == 3 # pwr + rst + rescan + assert len(written_data) == 2 # pwr + rst (scan skipped: already bound) assert written_data[0]["file"].endswith("_pwr") assert written_data[1]["file"].endswith("_rst") - assert written_data[2]["file"].endswith("rescan") + assert not any(d["file"] == MLX5_CORE_BIND_PATH for d in written_data) + + # Test normal power on when driver isn't bound: dpu_post_startup + # should actually bind PCIE_INT via mlx5_core/bind. + written_data.clear() + + def exists_for_bind(path): + return not path.endswith("/driver") + + with patch.object(dpuctl_obj, 'write_file', wraps=mock_write_file), \ + patch('os.path.exists', side_effect=exists_for_bind), \ + patch.object(dpuctl_obj, 'read_boot_prog', return_value=BootProgEnum.RST.value), \ + patch.object(dpuctl_obj, 'read_force_power_path', return_value=1): + assert dpuctl_obj.dpu_power_on(False) + assert len(written_data) == 3 # pwr + rst + bind + assert written_data[0]["file"].endswith("_pwr") + assert written_data[1]["file"].endswith("_rst") + assert written_data[2]["file"] == MLX5_CORE_BIND_PATH + assert written_data[2]["data"] == TEST_PCI_BDF # Test power on with skip_pre_post=True written_data.clear() @@ -231,7 +387,8 @@ def mock_write_file(file_name, content_towrite): patch.object(dpuctl_obj, 'read_force_power_path', return_value=1): assert dpuctl_obj.dpu_power_on(False, skip_pre_post=True) assert len(written_data) == 2 # Only pwr and rst operations - assert not any("rescan" in data["file"] for data in written_data) + # Post-startup skipped, so no mlx5_core bind happens. + assert not any(d["file"] == MLX5_CORE_BIND_PATH for d in written_data) assert written_data[0]["file"].endswith("_pwr") assert written_data[1]["file"].endswith("_rst") @@ -255,37 +412,39 @@ def mock_write_file(file_name, content_towrite): with patch.object(dpuctl_obj, 'write_file', wraps=mock_write_file), \ patch.object(dpuctl_obj, 'read_boot_prog', return_value=BootProgEnum.OS_RUN.value): assert dpuctl_obj.dpu_reboot(False) - assert len(written_data) == 5 # Both PCI removals + rst + rst + rescan - assert written_data[0]["file"] == TEST_PCI_REMOVE_PATH - assert written_data[1]["file"] == TEST_RSHIM_PCI_REMOVE_PATH + # 1 unbind + rst (from dpu_go_down) + rst (from _reboot) + # Scan skipped: driver appears bound under the os.path.exists=True mock. + assert len(written_data) == 3 + assert written_data[0]["file"] == MLX5_CORE_UNBIND_PATH + assert written_data[0]["data"] == TEST_PCI_BDF + assert written_data[1]["file"].endswith("_rst") assert written_data[2]["file"].endswith("_rst") - assert written_data[3]["file"].endswith("_rst") - assert written_data[4]["file"].endswith("rescan") + assert not any(d["file"] == MLX5_CORE_BIND_PATH for d in written_data) # Test force reboot written_data.clear() with patch.object(dpuctl_obj, 'write_file', wraps=mock_write_file), \ patch.object(dpuctl_obj, 'read_boot_prog', return_value=BootProgEnum.OS_RUN.value): assert dpuctl_obj.dpu_reboot(True) - assert len(written_data) == 7 # Both PCI removals + rst + pwr_force + pwr_force + rst + rescan - assert written_data[0]["file"] == TEST_PCI_REMOVE_PATH - assert written_data[1]["file"] == TEST_RSHIM_PCI_REMOVE_PATH - assert written_data[2]["file"].endswith("_rst") + # 1 unbind + rst + pwr_force (off) + pwr_force + rst (on); scan skipped. + assert len(written_data) == 5 + assert written_data[0]["file"] == MLX5_CORE_UNBIND_PATH + assert written_data[1]["file"].endswith("_rst") + assert written_data[2]["file"].endswith("_pwr_force") assert written_data[3]["file"].endswith("_pwr_force") - assert written_data[4]["file"].endswith("_pwr_force") - assert written_data[5]["file"].endswith("_rst") - assert written_data[6]["file"].endswith("rescan") + assert written_data[4]["file"].endswith("_rst") + assert not any(d["file"] == MLX5_CORE_BIND_PATH for d in written_data) # Test no-wait reboot written_data.clear() with patch.object(dpuctl_obj, 'write_file', wraps=mock_write_file), \ patch.object(dpuctl_obj, 'read_boot_prog', return_value=BootProgEnum.OS_RUN.value): assert dpuctl_obj.dpu_reboot(no_wait=True) - assert len(written_data) == 4 # Both PCI removals + rst + rst - assert written_data[0]["file"] == TEST_PCI_REMOVE_PATH - assert written_data[1]["file"] == TEST_RSHIM_PCI_REMOVE_PATH + # 1 unbind + rst (from dpu_go_down) + rst (from _reboot); post-startup skipped on no_wait. + assert len(written_data) == 3 + assert written_data[0]["file"] == MLX5_CORE_UNBIND_PATH + assert written_data[1]["file"].endswith("_rst") assert written_data[2]["file"].endswith("_rst") - assert written_data[3]["file"].endswith("_rst") # Test reboot with skip_pre_post=True written_data.clear() @@ -294,8 +453,9 @@ def mock_write_file(file_name, content_towrite): assert dpuctl_obj.dpu_reboot(skip_pre_post=True) assert len(written_data) == 2 # Only rst operations assert all("_rst" in data["file"] for data in written_data) - assert not any("remove" in data["file"] for data in written_data) - assert not any("rescan" in data["file"] for data in written_data) + # Neither pre-shutdown (unbind) nor post-startup (bind) runs. + assert not any(d["file"] == MLX5_CORE_UNBIND_PATH for d in written_data) + assert not any(d["file"] == MLX5_CORE_BIND_PATH for d in written_data) class TestDpuCtlPlatUtils: """Tests for utility functions""" @@ -362,6 +522,32 @@ def poll(self): assert dpuctl_obj.boot_prog_state == 99 assert dpuctl_obj.boot_prog_indication == "99 - N/A" + def test_read_boot_prog_retries_on_enxio(self, dpuctl_obj): + """read_boot_prog retries twice on ENXIO with 1s delay, then returns value.""" + dpuctl_obj.boot_prog_path = os.path.join(test_path, "mock_dpu_boot_prog") + enxio = OSError(errno.ENXIO, os.strerror(errno.ENXIO)) + + with patch("sonic_platform.utils.read_int_from_file") as mock_read, \ + patch("sonic_platform.dpuctlplat.time.sleep") as mock_sleep: + mock_read.side_effect = [enxio, enxio, 5] + assert dpuctl_obj.read_boot_prog() == 5 + assert mock_read.call_count == 3 + mock_sleep.assert_has_calls([call(1), call(1)]) + + def test_read_boot_prog_raises_after_enxio_retries_exhausted(self, dpuctl_obj): + """After three ENXIO failures, the last error is propagated.""" + dpuctl_obj.boot_prog_path = os.path.join(test_path, "mock_dpu_boot_prog") + enxio = OSError(errno.ENXIO, os.strerror(errno.ENXIO)) + + with patch("sonic_platform.utils.read_int_from_file") as mock_read, \ + patch("sonic_platform.dpuctlplat.time.sleep") as mock_sleep: + mock_read.side_effect = [enxio, enxio, enxio] + with pytest.raises(OSError) as excinfo: + dpuctl_obj.read_boot_prog() + assert excinfo.value.errno == errno.ENXIO + assert mock_read.call_count == 3 + mock_sleep.assert_has_calls([call(1), call(1)]) + def test_status_updates(self, dpuctl_obj): """Test DPU status updates""" with patch("sonic_platform.utils.read_int_from_file") as mock_read: diff --git a/platform/mellanox/mlnx-platform-api/tests/test_module.py b/platform/mellanox/mlnx-platform-api/tests/test_module.py index 743c2990e12..dfc6c6c9f6e 100644 --- a/platform/mellanox/mlnx-platform-api/tests/test_module.py +++ b/platform/mellanox/mlnx-platform-api/tests/test_module.py @@ -59,8 +59,6 @@ def test_chassis_get_all_sfps(self): chassis = ModularChassis() assert len(chassis.get_all_sfps()) == 4 - @patch('sonic_platform.module.SonicV2Connector', mock.MagicMock()) - @patch('sonic_platform.module.ConfigDBConnector', mock.MagicMock()) def test_chassis_get_num_modules(self): chassis = SmartSwitchChassis() assert chassis.get_num_modules() == 4 @@ -183,8 +181,6 @@ def test_check_state(self): assert len(m._sfp_list) == 0 assert len(m._thermal_list) == 0 - @patch('sonic_platform.module.SonicV2Connector', mock.MagicMock()) - @patch('sonic_platform.module.ConfigDBConnector', mock.MagicMock()) def test_module_vpd(self): m = Module(1) m.vpd_parser.vpd_file = os.path.join(test_path, 'mock_psu_vpd') @@ -237,7 +233,6 @@ def test_module_vpd(self): assert dm.get_serial() == "N/A" assert dm.get_revision() == "N/A" - @patch('sonic_platform.module.SonicV2Connector', mock.MagicMock()) @patch('swsscommon.swsscommon.ConfigDBConnector.connect', mock.MagicMock()) @mock.patch('swsscommon.swsscommon.ConfigDBConnector.get') @mock.patch('subprocess.call') @@ -415,8 +410,10 @@ def mock_read_int_from_file(file_path, default=0, raise_exception=False, log_fun } def new_get_all(db_name, table_name): return temp_data[table_name] - - with patch.object(m.chassis_state_db, 'get_all', wraps=new_get_all): + + mock_chassis_db = mock.MagicMock() + with patch.object(m, 'get_chassis_db_conn', return_value=mock_chassis_db): + mock_chassis_db.get_all = mock.MagicMock(wraps=new_get_all) output_dict = m.get_temperature_dict() assert output_dict['DDR'] == temp_data[f"TEMPERATURE_INFO_{m.get_dpu_id()}|DDR"] assert output_dict['CPU'] == temp_data[f"TEMPERATURE_INFO_{m.get_dpu_id()}|CPU"] diff --git a/platform/mellanox/mlnx-platform-api/tests/test_sed_mgmt.py b/platform/mellanox/mlnx-platform-api/tests/test_sed_mgmt.py new file mode 100644 index 00000000000..ba01519b4ee --- /dev/null +++ b/platform/mellanox/mlnx-platform-api/tests/test_sed_mgmt.py @@ -0,0 +1,139 @@ +# +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +import os +import pytest +import sys +if sys.version_info.major == 3: + from unittest import mock +else: + import mock + +test_path = os.path.dirname(os.path.abspath(__file__)) +modules_path = os.path.dirname(test_path) +sys.path.insert(0, modules_path) + +from sonic_platform.sed_mgmt import SedMgmt, READ_DEFAULT_SED_PW_SCRIPT +from sonic_platform_base.sed_mgmt_base import SedMgmtBase + + +class TestSedMgmt: + """Tests for Mellanox SedMgmt.""" + + def test_get_min_sed_password_len(self): + """Test get_min_sed_password_len returns 8.""" + sed = SedMgmt.get_instance() + assert sed.get_min_sed_password_len() == 8 + + def test_get_max_sed_password_len(self): + """Test get_max_sed_password_len returns 124.""" + sed = SedMgmt.get_instance() + assert sed.get_max_sed_password_len() == 124 + + @mock.patch('sonic_platform_base.sed_mgmt_base._read_sed_config_value') + def test_get_tpm_bank_a_address(self, mock_read): + """Test get_tpm_bank_a_address reads from config.""" + mock_read.return_value = '0x81010001' + sed = SedMgmt.get_instance() + assert sed.get_tpm_bank_a_address() == '0x81010001' + mock_read.assert_called_with('tpm_bank_a') + + @mock.patch('sonic_platform_base.sed_mgmt_base._read_sed_config_value') + def test_get_tpm_bank_b_address(self, mock_read): + """Test get_tpm_bank_b_address reads from config.""" + mock_read.return_value = '0x81010002' + sed = SedMgmt.get_instance() + assert sed.get_tpm_bank_b_address() == '0x81010002' + mock_read.assert_called_with('tpm_bank_b') + + @mock.patch('subprocess.run') + def test_get_default_sed_password_success(self, mock_run): + """Test get_default_sed_password returns script output on success.""" + mock_run.return_value = mock.MagicMock(returncode=0, stdout='default_secret\n') + sed = SedMgmt.get_instance() + result = sed.get_default_sed_password() + assert result == 'default_secret' + mock_run.assert_called_once() + call_args = mock_run.call_args + assert call_args[0][0] == [READ_DEFAULT_SED_PW_SCRIPT] + assert call_args[1]['capture_output'] is True + assert call_args[1]['text'] is True + assert call_args[1]['timeout'] == 10 + + @mock.patch('subprocess.run') + def test_get_default_sed_password_script_fails(self, mock_run): + """Test get_default_sed_password returns None when script fails.""" + mock_run.return_value = mock.MagicMock(returncode=1, stdout='') + sed = SedMgmt.get_instance() + assert sed.get_default_sed_password() is None + + @mock.patch('subprocess.run') + def test_get_default_sed_password_empty_stdout(self, mock_run): + """Test get_default_sed_password returns None when stdout is empty.""" + mock_run.return_value = mock.MagicMock(returncode=0, stdout='') + sed = SedMgmt.get_instance() + assert sed.get_default_sed_password() is None + + @mock.patch('subprocess.run') + def test_get_default_sed_password_exception(self, mock_run): + """Test get_default_sed_password returns None on exception.""" + mock_run.side_effect = Exception('subprocess error') + sed = SedMgmt.get_instance() + assert sed.get_default_sed_password() is None + + @mock.patch('sonic_platform_base.sed_mgmt_base._read_sed_config_value') + @mock.patch('subprocess.check_call') + def test_change_sed_password_success(self, mock_check_call, mock_read): + """Test change_sed_password calls script with correct args.""" + mock_read.side_effect = lambda k: {'tpm_bank_a': '0x81010001', 'tpm_bank_b': '0x81010002'}.get(k) + sed = SedMgmt.get_instance() + result = sed.change_sed_password('new_password123') + assert result is True + mock_check_call.assert_called_once() + call_args = mock_check_call.call_args[0][0] + assert call_args[0] == SedMgmtBase.SED_PW_CHANGE_SCRIPT + assert call_args[call_args.index('-a') + 1] == '0x81010001' + assert call_args[call_args.index('-b') + 1] == '0x81010002' + assert call_args[call_args.index('-p') + 1] == 'new_password123' + + @mock.patch('sonic_platform_base.sed_mgmt_base._read_sed_config_value') + def test_change_sed_password_missing_config(self, mock_read): + """Test change_sed_password returns False when config missing.""" + mock_read.return_value = None + sed = SedMgmt.get_instance() + assert sed.change_sed_password('new_password123') is False + + @mock.patch('sonic_platform_base.sed_mgmt_base._read_sed_config_value') + @mock.patch('subprocess.check_call') + def test_reset_sed_password_success(self, mock_check_call, mock_read): + """Test reset_sed_password calls script with default password.""" + mock_read.side_effect = lambda k: {'tpm_bank_a': '0x81010001', 'tpm_bank_b': '0x81010002'}.get(k) + with mock.patch.object(SedMgmt, 'get_default_sed_password', return_value='default_secret'): + sed = SedMgmt.get_instance() + result = sed.reset_sed_password() + assert result is True + mock_check_call.assert_called_once() + call_args = mock_check_call.call_args[0][0] + assert call_args[0] == SedMgmtBase.SED_PW_RESET_SCRIPT + assert call_args[call_args.index('-p') + 1] == 'default_secret' + + @mock.patch.object(SedMgmt, 'get_default_sed_password', return_value=None) + def test_reset_sed_password_no_default(self, mock_get_default): + """Test reset_sed_password returns False when default password unavailable.""" + sed = SedMgmt.get_instance() + assert sed.reset_sed_password() is False diff --git a/platform/mellanox/mlnx-platform-api/tests/test_sfp.py b/platform/mellanox/mlnx-platform-api/tests/test_sfp.py index 09f2f6cd96f..59f37aaffdc 100644 --- a/platform/mellanox/mlnx-platform-api/tests/test_sfp.py +++ b/platform/mellanox/mlnx-platform-api/tests/test_sfp.py @@ -1,6 +1,6 @@ # # SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES -# Copyright (c) 2019-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# Copyright (c) 2019-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. # Apache-2.0 # # Licensed under the Apache License, Version 2.0 (the "License"); @@ -361,72 +361,6 @@ def test_get_temperature(self, mock_read, mock_exists): mock_read.return_value = 448 assert sfp.get_temperature() == 56.0 - @mock.patch('sonic_platform.utils.read_int_from_file') - def test_get_temperature_threshold(self, mock_read_int): - sfp = SFP(0) - sfp.is_sw_control = mock.MagicMock(return_value=True) - mock_serial = 'some serial' - mock_api = mock.MagicMock() - mock_api.xcvr_eeprom = mock.MagicMock() - from sonic_platform_base.sonic_xcvr.fields import consts - def mock_read(field): - if field == consts.TEMP_HIGH_ALARM_FIELD: - return 85.0 - elif field == consts.TEMP_HIGH_WARNING_FIELD: - return 75.0 - elif field == consts.VENDOR_SERIAL_NO_FIELD: - return mock_serial - mock_api.xcvr_eeprom.read = mock.MagicMock(side_effect=mock_read) - - # No api object, means no access to EEPROM, expect None and retry_read_threshold - 1 - sfp.get_xcvr_api = mock.MagicMock(return_value=None) - retry = sfp.retry_read_threshold - assert sfp.get_temperature_warning_threshold() == None - assert sfp.retry_read_threshold == retry - 1 - retry = sfp.retry_read_threshold - assert sfp.get_temperature_critical_threshold() == None - assert sfp.retry_read_threshold == retry - 1 - - # No threshold support, expect None - mock_serial = 'some other serial' - mock_api.get_transceiver_thresholds_support = mock.MagicMock(return_value=False) - sfp.get_xcvr_api.return_value = mock_api - assert sfp.get_temperature_warning_threshold() == None - assert sfp.get_temperature_critical_threshold() == None - - # Threshold support, expect threshold values - mock_api.get_transceiver_thresholds_support.return_value = True - - assert sfp.get_temperature_warning_threshold() == 75.0 - assert sfp.get_temperature_critical_threshold() == 85.0 - assert sfp.retry_read_threshold == 0 - - # No serial number, expect None and retry_read_threshold = 0 - mock_serial = None - assert sfp.get_temperature_warning_threshold() == None - assert sfp.get_temperature_critical_threshold() == None - assert sfp.retry_read_threshold == 0 - - # Firmware control, expect threshold values from sysfs - sfp.is_sw_control.return_value = False - mock_serial = "some serial" - def mock_read_int_side_effect(file_path, *args, **kwargs): - if 'threshold_hi' in file_path: - return 448 # 56.0 * 8.0 - elif 'threshold_critical_hi' in file_path: - return 480 # 60.0 * 8.0 - return None - - mock_read_int.side_effect = mock_read_int_side_effect - assert sfp.get_temperature_warning_threshold() == 56.0 - assert sfp.get_temperature_critical_threshold() == 60.0 - assert sfp.retry_read_threshold == 0 - - # Exception in is_sw_control, expect 0.0 - sfp.is_sw_control.side_effect = Exception('') - assert sfp.get_temperature_warning_threshold() == 0.0 - assert sfp.get_temperature_critical_threshold() == 0.0 - @mock.patch('sonic_platform.utils.read_int_from_file') @mock.patch('sonic_platform.device_data.DeviceDataManager.is_module_host_management_mode') def test_is_sw_control(self, mock_mode, mock_read): @@ -605,45 +539,6 @@ def test_set_lpmode(self, mock_read_int, mock_write): assert sfp.set_lpmode(True) mock_write.assert_called_with('/sys/module/sx_core/asic0/module0/power_mode_policy', '3') - @mock.patch('sonic_platform.sfp.SfpOptoeBase.get_temperature') - def test_get_temperature_info(self, mock_super_get_temperature): - sfp = SFP(0) - - sfp.is_sw_control = mock.MagicMock(return_value=False) - assert sfp.get_temperature_info() == (False, None, None, None) - - sfp.is_sw_control.return_value = True - sfp._update_temperature_threshold = mock.MagicMock() - sfp.temp_high_threshold = 75.0 - sfp.temp_critical_threshold = 85.0 - mock_super_get_temperature.return_value = 58.0 - assert sfp.get_temperature_info() == (True, 58.0, 75.0, 85.0) - - mock_super_get_temperature.return_value = None - assert sfp.get_temperature_info() == (True, None, None, None) - - mock_super_get_temperature.return_value = 0.0 - assert sfp.get_temperature_info() == (True, 0.0, 0.0, 0.0) - - @mock.patch('time.sleep', mock.MagicMock()) - def test_get_temperature_info_vendor_retry_loop(self): - sfp = SFP(0) - sfp.reinit_if_sn_changed = mock.MagicMock(side_effect=[True, False, False]) - sfp.is_sw_control = mock.MagicMock(return_value=False) - sfp.retry_read_vendor = 5 - # First two attempts fail, third succeeds - sfp.get_vendor_info = mock.MagicMock(side_effect=[(None, None), (None, None), ('Mellanox', 'PN-9999')]) - - # Attempt 1: reinit sets retry counter, first vendor read fails (counter -> 4) - sfp.get_temperature_info() - # Attempt 2: retry counter >0, second vendor read fails (counter -> 3) - sfp.get_temperature_info() - # Attempt 3: retry counter >0, vendor read succeeds, counter cleared - sfp.get_temperature_info() - - assert sfp.get_vendor_info.call_count == 3 - assert sfp.retry_read_vendor == 0 - def test_reinit_if_sn_changed(self): sfp = SFP(0) sfp.get_xcvr_api = mock.MagicMock(return_value=None) @@ -652,107 +547,102 @@ def test_reinit_if_sn_changed(self): sfp.get_xcvr_api.return_value = mock.MagicMock() sfp.get_xcvr_api.return_value.xcvr_eeprom.read = mock.MagicMock(return_value='1234567890') assert sfp.reinit_if_sn_changed() - assert sfp.retry_read_vendor == 5 sfp.get_xcvr_api.return_value.xcvr_eeprom.read.return_value = '1234567891' assert sfp.reinit_if_sn_changed() - assert sfp.retry_read_vendor == 5 - - # Vendor cache should reset on reinit to allow new modules to be read - sfp.sn = 'old_sn' - sfp.manufacturer = 'OldVendor' - sfp.part_number = 'OldPart' - sfp._get_serial = mock.MagicMock(return_value='new_sn') - assert sfp.reinit_if_sn_changed() - assert sfp.manufacturer is None - assert sfp.part_number is None - assert sfp.retry_read_vendor == 5 - @mock.patch('time.sleep', mock.MagicMock()) - def test_get_vendor_info_success_and_cache(self): + @pytest.mark.parametrize("data_from_db, expected", [ + ((False, None), 0), + ((True, 'None'), -1), + ((True, '25.5'), 25.5), + ((True, '0.0'), 0.0), + ((True, '-10.5'), -10.5), + ]) + def test_get_temperature_from_db(self, data_from_db, expected): sfp = SFP(0) - mock_api = mock.MagicMock() - mock_eeprom = mock.MagicMock() - mock_api.xcvr_eeprom = mock_eeprom - sfp.get_xcvr_api = mock.MagicMock(return_value=mock_api) - - from sonic_platform_base.sonic_xcvr.fields import consts - def mock_read(field): - if field == consts.VENDOR_NAME_FIELD: - return 'Mellanox' - if field == consts.VENDOR_PART_NO_FIELD: - return 'PN-1234' - return None - mock_eeprom.read.side_effect = mock_read - - # First call reads from eeprom - manufacturer, part_number = sfp.get_vendor_info() - assert manufacturer == 'Mellanox' - assert part_number == 'PN-1234' - assert mock_eeprom.read.call_count == 2 - - # Second call should return cached values without additional reads - manufacturer, part_number = sfp.get_vendor_info() - assert manufacturer == 'Mellanox' - assert part_number == 'PN-1234' - assert mock_eeprom.read.call_count == 2 - - @mock.patch('time.sleep', mock.MagicMock()) - def test_get_vendor_info_retry_then_success(self): + + sfp._get_data_from_db = mock.MagicMock(return_value=data_from_db) + assert sfp.get_temperature_from_db() == expected + + @pytest.mark.parametrize("data_from_db, expected", [ + ((False, None), 0), + ((True, 'N/A'), 0), + ((False, '10.5'), 0), + ((True, '25.5'), 25.5), + ((True, '0.0'), 0.0), + ((True, '-10.5'), -10.5), + ]) + def test_get_warning_threshold_from_db(self, data_from_db, expected): sfp = SFP(0) - mock_api = mock.MagicMock() - mock_eeprom = mock.MagicMock() - mock_api.xcvr_eeprom = mock_eeprom - sfp.get_xcvr_api = mock.MagicMock(return_value=mock_api) + + sfp._get_data_from_db = mock.MagicMock(return_value=data_from_db) + assert sfp.get_warning_threshold_from_db() == expected + + @pytest.mark.parametrize("data_from_db, expected", [ + ((False, None), 0), + ((True, 'N/A'), 0), + ((False, '10.5'), 0), + ((True, '25.5'), 25.5), + ((True, '0.0'), 0.0), + ((True, '-10.5'), -10.5), + ]) + def test_get_critical_threshold_from_db(self, data_from_db, expected): + sfp = SFP(0) + + sfp._get_data_from_db = mock.MagicMock(return_value=data_from_db) + assert sfp.get_critical_threshold_from_db() == expected + + @pytest.mark.parametrize("data_from_db, expected", [ + ((False, None), ''), + ((True, 'Mellanox'), 'Mellanox'), + ((True, ''), ''), + ]) + def test_get_vendor_name_from_db(self, data_from_db, expected): + sfp = SFP(0) + sfp._get_data_from_db = mock.MagicMock(return_value=data_from_db) + assert sfp.get_vendor_name_from_db() == expected + + @pytest.mark.parametrize("data_from_db, expected", [ + ((False, None), ''), + ((True, 'Mellanox'), 'Mellanox'), + ((True, ''), ''), + ]) + def test_get_part_number_from_db(self, data_from_db, expected): + sfp = SFP(0) + sfp._get_data_from_db = mock.MagicMock(return_value=data_from_db) + assert sfp.get_part_number_from_db() == expected - from sonic_platform_base.sonic_xcvr.fields import consts - state = {'fail_reads': 2} - def flaky_read(field): - if state['fail_reads'] > 0: - state['fail_reads'] -= 1 - raise Exception('EEPROM not ready') - if field == consts.VENDOR_NAME_FIELD: - return 'Mellanox' - if field == consts.VENDOR_PART_NO_FIELD: - return 'PN-5678' - return None - mock_eeprom.read.side_effect = flaky_read - - # First call fails (counter decremented) - manufacturer, part_number = sfp.get_vendor_info() - assert (manufacturer, part_number) == (None, None) - # Second call fails (counter decremented) - manufacturer, part_number = sfp.get_vendor_info() - assert (manufacturer, part_number) == (None, None) - # Third call succeeds (reads both fields) - manufacturer, part_number = sfp.get_vendor_info() - assert (manufacturer, part_number) == ('Mellanox', 'PN-5678') - # Total read invocations: first two calls each raise on first field (2), - # third call reads both fields (2) → 4 total - assert mock_eeprom.read.call_count == 4 - - @mock.patch('time.sleep', mock.MagicMock()) - def test_get_vendor_info_all_fail(self): + def test_get_data_from_db(self): sfp = SFP(0) - mock_api = mock.MagicMock() - mock_eeprom = mock.MagicMock() - mock_api.xcvr_eeprom = mock_eeprom - sfp.get_xcvr_api = mock.MagicMock(return_value=mock_api) - mock_eeprom.read.side_effect = Exception('EEPROM error') + sfp.get_logical_port = mock.MagicMock(return_value=None) + assert sfp._get_data_from_db(None, None) == (False, None) - manufacturer, part_number = sfp.get_vendor_info() - assert manufacturer is None - assert part_number is None + sfp.get_logical_port.return_value = 'Ethernet0' + mock_table = mock.MagicMock() + def mock_get_table(): + return mock_table + mock_table.hget = mock.MagicMock(return_value=(True, '25.5')) + assert sfp._get_data_from_db(mock_get_table, 'temperature') == (True, '25.5') - def test_get_vendor_info_no_api_or_missing_attr(self): + def test_get_logical_port(self): sfp = SFP(0) - # No API - sfp.get_xcvr_api = mock.MagicMock(return_value=None) - assert sfp.get_vendor_info() == (None, None) + sfp.get_port_config_done = mock.MagicMock(return_value=False) + assert sfp.get_logical_port() is None + + sfp.get_port_config_done.return_value = True + sfp.build_port_mapping = mock.MagicMock() + assert sfp.get_logical_port() is None - # API without xcvr_eeprom attribute - class DummyApi(object): - pass - sfp.get_xcvr_api.return_value = DummyApi() - assert sfp.get_vendor_info() == (None, None) + sfp.port_mapping = {1: 'Ethernet0'} + assert sfp.get_logical_port() == 'Ethernet0' + @mock.patch('sonic_platform.sfp.get_db_table_helper') + def test_get_port_config_done(self, mock_db_table_helper): + sfp = SFP(0) + app_db = mock.MagicMock() + app_db.exists = mock.MagicMock(return_value=False) + mock_db_table_helper.return_value.get_appl_db = mock.MagicMock(return_value=app_db) + assert not sfp.get_port_config_done('') + + app_db.exists.return_value = True + assert sfp.get_port_config_done('') diff --git a/platform/mellanox/mlnx-platform-api/tests/test_smartswsitch_thermal_updater.py b/platform/mellanox/mlnx-platform-api/tests/test_smartswsitch_thermal_updater.py index e3c52defbad..bcc2615e3f6 100644 --- a/platform/mellanox/mlnx-platform-api/tests/test_smartswsitch_thermal_updater.py +++ b/platform/mellanox/mlnx-platform-api/tests/test_smartswsitch_thermal_updater.py @@ -52,7 +52,6 @@ class TestSmartSwitchThermalUpdater: @mock.patch('sonic_platform.utils.write_file') - @mock.patch('sonic_platform.smartswitch_thermal_updater.SmartswitchThermalUpdater.wait_for_sysfs_nodes', mock.MagicMock(return_value=True)) def test_configuration(self, mock_write): dpu = mock.MagicMock() mock_sfp = mock.MagicMock() @@ -80,21 +79,17 @@ def test_configuration(self, mock_write): mock_write.assert_called_once_with('/run/hw-management/config/suspend', 1) mock_write.reset_mock() self.reset_hw_mgmt_mocks() - updater = SmartswitchThermalUpdater(None, dpu_list=[dpu], is_host_mgmt_mode=False) + updater = SmartswitchThermalUpdater(sfp_list=[], dpu_list=[dpu]) """ Expectation on start - Clean is called for DPU load config for DPU along with start of timer""" updater._timer = mock.MagicMock() updater.start() - mock_write.assert_not_called() hw_management_dpu_thermal_update.thermal_data_dpu_cpu_core_clear.assert_called_once_with(dpu.get_hw_mgmt_id()) hw_management_dpu_thermal_update.thermal_data_dpu_ddr_clear.assert_called_once_with(dpu.get_hw_mgmt_id()) hw_management_dpu_thermal_update.thermal_data_dpu_drive_clear.assert_called_once_with(dpu.get_hw_mgmt_id()) - hw_management_independent_mode_update.thermal_data_clean_asic.assert_not_called() - hw_management_independent_mode_update.thermal_data_clean_module.assert_not_called() # Expectation on stop - timer stop updater.stop() updater._timer.stop.assert_called_once() - mock_write.assert_not_called() def test_update_dpu(self): self.reset_hw_mgmt_mocks() @@ -109,7 +104,7 @@ def test_update_dpu(self): } mock_dpu.get_temperature_dict = mock.MagicMock(return_value=temp_data) print(f"{mock_dpu.get_temperature_dict()}") - updater = SmartswitchThermalUpdater(sfp_list=None, dpu_list=[mock_dpu], is_host_mgmt_mode=False) + updater = SmartswitchThermalUpdater(sfp_list=None, dpu_list=[mock_dpu]) updater.update_dpu() hw_management_dpu_thermal_update.thermal_data_dpu_ddr_set.assert_called_once_with(1, 75, 95, 100, 0) hw_management_dpu_thermal_update.thermal_data_dpu_cpu_core_set.assert_called_once_with(1, 82, 90, 100, 0) @@ -190,7 +185,7 @@ def test_update_dpu(self): temp_data_1["CPU"]["temperature"] = "20.0" temp_data_1["NVME"]["temperature"] = "100.0" mock_dpu1.get_temperature_dict = mock.MagicMock(return_value=temp_data_1) - updater = SmartswitchThermalUpdater(sfp_list=None, dpu_list=[mock_dpu, mock_dpu1], is_host_mgmt_mode=False) + updater = SmartswitchThermalUpdater(sfp_list=None, dpu_list=[mock_dpu, mock_dpu1]) self.reset_hw_mgmt_mocks() updater.update_dpu() assert hw_management_dpu_thermal_update.thermal_data_dpu_ddr_set.call_count == 2 diff --git a/platform/mellanox/mlnx-platform-api/tests/test_thermal.py b/platform/mellanox/mlnx-platform-api/tests/test_thermal.py index 6168b94f363..52c040aeb53 100644 --- a/platform/mellanox/mlnx-platform-api/tests/test_thermal.py +++ b/platform/mellanox/mlnx-platform-api/tests/test_thermal.py @@ -166,26 +166,20 @@ def test_sfp_thermal(self): assert thermal.get_name() == rule['name'].format(start_index) assert thermal.get_position_in_parent() == 1 assert thermal.is_replaceable() == False - sfp.get_presence = mock.MagicMock(return_value=True) - sfp.get_temperature = mock.MagicMock(return_value=35.4) - sfp.get_temperature_warning_threshold = mock.MagicMock(return_value=70) - sfp.get_temperature_critical_threshold = mock.MagicMock(return_value=80) + sfp.get_temperature_from_db = mock.MagicMock(return_value=35.4) assert thermal.get_temperature() == 35.4 - assert thermal.get_high_threshold() == 70 - assert thermal.get_high_critical_threshold() == 80 - sfp.get_presence = mock.MagicMock(return_value=False) - sfp.get_temperature = mock.MagicMock(return_value=35.4) - sfp.get_temperature_warning_threshold = mock.MagicMock(return_value=70) - sfp.get_temperature_critical_threshold = mock.MagicMock(return_value=80) + sfp.get_temperature_from_db.return_value = 0.0 assert thermal.get_temperature() is None - assert thermal.get_high_threshold() is None - assert thermal.get_high_critical_threshold() is None - sfp.get_presence = mock.MagicMock(return_value=True) - sfp.get_temperature = mock.MagicMock(return_value=0) - sfp.get_temperature_warning_threshold = mock.MagicMock(return_value=0) - sfp.get_temperature_critical_threshold = mock.MagicMock(return_value=None) + sfp.get_temperature_from_db.return_value = -1 assert thermal.get_temperature() is None + + sfp.get_warning_threshold_from_db = mock.MagicMock(return_value=70) + assert thermal.get_high_threshold() == 70 + sfp.get_warning_threshold_from_db.return_value = 0 assert thermal.get_high_threshold() is None + sfp.get_critical_threshold_from_db = mock.MagicMock(return_value=80) + assert thermal.get_high_critical_threshold() == 80 + sfp.get_critical_threshold_from_db.return_value = 0 assert thermal.get_high_critical_threshold() is None @mock.patch('sonic_platform.utils.read_float_from_file') diff --git a/platform/mellanox/mlnx-platform-api/tests/test_thermal_manager.py b/platform/mellanox/mlnx-platform-api/tests/test_thermal_manager.py index fef7e081fd4..3d52c64640c 100644 --- a/platform/mellanox/mlnx-platform-api/tests/test_thermal_manager.py +++ b/platform/mellanox/mlnx-platform-api/tests/test_thermal_manager.py @@ -1,6 +1,6 @@ # # SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES -# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# Copyright (c) 2024-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. # Apache-2.0 # # Licensed under the Apache License, Version 2.0 (the "License"); @@ -23,11 +23,10 @@ class TestThermalManager: @mock.patch('sonic_platform.chassis.Chassis.chassis_instance', new_callable=mock.MagicMock) - @mock.patch('sonic_platform.device_data.DeviceDataManager.is_module_host_management_mode') @mock.patch('sonic_platform.device_data.DeviceDataManager.get_platform_dpus_data') - def test_updater_init(self, mock_dpus_data, mock_management_mode, mock_chassis_instance): + @mock.patch('sonic_platform.thermal_manager.LiquidCooling.get_num_leak_sensors', return_value=0) + def test_updater_init(self, _mock_get_num_leak_sensors, mock_dpus_data, mock_chassis_instance): mock_dpus_data.return_value = {} - mock_management_mode.return_value = True sfp_mock = mock.MagicMock() mod_mock = mock.MagicMock() mock_chassis_instance.get_all_sfps = sfp_mock @@ -40,28 +39,29 @@ def test_updater_init(self, mock_dpus_data, mock_management_mode, mock_chassis_i # Host mgmt mode, no DPUs are used for init mgr = ThermalManager() mgr.initialize() - mock_thermal.assert_called_once_with(sfp_list=['sfp1', 'sfp2'], update_asic=False) - mgr.deinitialize() - mgr.thermal_updater_task.stop.assert_called_once() - # Not initialized if no DPUs and not in host mgmt mode - mock_management_mode.return_value = False - mock_thermal.reset_mock() - mgr.initialize() - mock_thermal.assert_not_called() + mock_thermal.assert_called_once_with(sfp_list=['sfp1', 'sfp2']) mgr.deinitialize() mgr.thermal_updater_task.stop.assert_called_once() + # Initialized with DPUs if DPUs are present mock_dpus_data.return_value = {'DPUS': 'dpu1'} mock_thermal.reset_mock() mgr.initialize() - mock_sm_thermal.assert_called_once_with(sfp_list=['sfp1', 'sfp2'], dpu_list=['dpu1', 'dpu2'], is_host_mgmt_mode=False) + mock_sm_thermal.assert_called_once_with(sfp_list=['sfp1', 'sfp2'], dpu_list=['dpu1', 'dpu2']) mgr.deinitialize() mgr.thermal_updater_task.stop.assert_called_once() - # Host mgmt mode, with DPUS - mock_thermal.reset_mock() - mock_sm_thermal.reset_mock() - mock_management_mode.return_value = True + + @mock.patch('sonic_platform.chassis.Chassis.chassis_instance', new_callable=mock.MagicMock) + @mock.patch('sonic_platform.device_data.DeviceDataManager.get_platform_dpus_data') + @mock.patch('sonic_platform.thermal_manager.LiquidCooling.get_num_leak_sensors', return_value=2) + def test_updater_init_liquid_cooling(self, _mock_get_num_leak_sensors, mock_dpus_data, mock_chassis_instance): + mock_dpus_data.return_value = {} + + with mock.patch('sonic_platform.thermal_updater.ThermalUpdater') as mock_thermal, \ + mock.patch('sonic_platform.smartswitch_thermal_updater.SmartswitchThermalUpdater') as mock_sm_thermal: + mgr = ThermalManager() mgr.initialize() - mock_sm_thermal.assert_called_once_with(sfp_list=['sfp1', 'sfp2'], dpu_list=['dpu1', 'dpu2'], is_host_mgmt_mode=True) + mock_thermal.assert_not_called() + mock_sm_thermal.assert_not_called() + assert mgr.thermal_updater_task is None mgr.deinitialize() - mgr.thermal_updater_task.stop.assert_called_once() diff --git a/platform/mellanox/mlnx-platform-api/tests/test_thermal_updater.py b/platform/mellanox/mlnx-platform-api/tests/test_thermal_updater.py index 9f8d4790ed8..3d45d15c013 100644 --- a/platform/mellanox/mlnx-platform-api/tests/test_thermal_updater.py +++ b/platform/mellanox/mlnx-platform-api/tests/test_thermal_updater.py @@ -20,7 +20,7 @@ from unittest import mock from sonic_platform import utils -from sonic_platform.thermal_updater import ThermalUpdater, clean_thermal_data, hw_management_independent_mode_update +from sonic_platform.thermal_updater import ThermalUpdater, hw_management_independent_mode_update, clean_thermal_data from sonic_platform.thermal_updater import ASIC_DEFAULT_TEMP_WARNNING_THRESHOLD, \ ASIC_DEFAULT_TEMP_CRITICAL_THRESHOLD @@ -98,7 +98,6 @@ def test_find_matching_key(self): @mock.patch('sonic_platform.thermal_updater.logger') @mock.patch('sonic_platform.thermal_updater.ThermalUpdater.update_asic', mock.MagicMock()) @mock.patch('sonic_platform.thermal_updater.ThermalUpdater.update_module', mock.MagicMock()) - @mock.patch('sonic_platform.thermal_updater.ThermalUpdater.wait_for_sysfs_nodes', mock.MagicMock(return_value=True)) @mock.patch('sonic_platform.utils.write_file') def test_start_stop(self, mock_write, mock_logger): mock_sfp = mock.MagicMock() @@ -113,92 +112,81 @@ def test_start_stop(self, mock_write, mock_logger): assert not updater._timer.is_alive() mock_write.assert_called_once_with('/run/hw-management/config/suspend', 1) - @mock.patch('sonic_platform.utils.read_int_from_file') - def test_update_asic(self, mock_read): + @mock.patch('sonic_platform.thermal_updater.get_db_table_helper') + def test_update_asic(self, mock_get_db_table_helper): hw_management_independent_mode_update.reset_mock() - mock_read.return_value = 8 + mock_temp_table = mock.MagicMock() + mock_db_table_helper = mock.MagicMock() + mock_db_table_helper.get_temperature_info_table.return_value = mock_temp_table + mock_get_db_table_helper.return_value = mock_db_table_helper + + mock_temp_table.hget.return_value = (True, 8) updater = ThermalUpdater(None) - assert updater.get_asic_temp() == 1000 - assert updater.get_asic_temp_warning_threshold() == 1000 - assert updater.get_asic_temp_critical_threshold() == 1000 + assert updater.get_asic_temp('ASIC') == 8000 + assert updater.get_asic_temp_warning_threshold() == ASIC_DEFAULT_TEMP_WARNNING_THRESHOLD + assert updater.get_asic_temp_critical_threshold() == ASIC_DEFAULT_TEMP_CRITICAL_THRESHOLD updater.update_asic() - hw_management_independent_mode_update.thermal_data_set_asic.assert_called_once() - - mock_read.return_value = None - assert updater.get_asic_temp() is None + hw_management_independent_mode_update.thermal_data_set_asic.assert_called_once_with( + 0, + 8000, + ASIC_DEFAULT_TEMP_CRITICAL_THRESHOLD, + ASIC_DEFAULT_TEMP_WARNNING_THRESHOLD, + 0 + ) + + mock_temp_table.hget.return_value = (False, None) + assert updater.get_asic_temp('ASIC') == 0 + + mock_temp_table.hget.return_value = (True, 'N/A') + assert updater.get_asic_temp('ASIC') == 0 assert updater.get_asic_temp_warning_threshold() == ASIC_DEFAULT_TEMP_WARNNING_THRESHOLD assert updater.get_asic_temp_critical_threshold() == ASIC_DEFAULT_TEMP_CRITICAL_THRESHOLD def test_update_module(self): + from sonic_platform.sfp import SFP + sfp = SFP(0) + hw_management_independent_mode_update.reset_mock() - mock_sfp = mock.MagicMock() - mock_sfp.sdk_index = 10 - mock_sfp.get_presence = mock.MagicMock(return_value=True) - mock_sfp.get_temperature_info = mock.MagicMock(return_value=(True, 55.0, 70.0, 80.0)) - updater = ThermalUpdater([mock_sfp]) + sfp.get_presence = mock.MagicMock(return_value=True) + sfp.get_temperature_from_db = mock.MagicMock(return_value=30.0) + sfp.get_warning_threshold_from_db = mock.MagicMock(return_value=25.0) + sfp.get_critical_threshold_from_db = mock.MagicMock(return_value=30.0) + sfp.get_vendor_name_from_db = mock.MagicMock(return_value='Mellanox') + sfp.get_part_number_from_db = mock.MagicMock(return_value='SFP-10G-SR') + + updater = ThermalUpdater([sfp]) updater.update_module() - hw_management_independent_mode_update.thermal_data_set_module.assert_called_once_with(0, 11, 55000, 80000, 70000, 0) - - mock_sfp.get_temperature_info = mock.MagicMock(return_value=(True, 0.0, 0.0, 0.0)) - hw_management_independent_mode_update.reset_mock() + hw_management_independent_mode_update.thermal_data_set_module.assert_called_with(0, sfp.sdk_index + 1, 30000, 30000, 25000, 0) + hw_management_independent_mode_update.vendor_data_set_module.assert_called_with(0, sfp.sdk_index + 1, {'manufacturer': 'Mellanox', 'part_number': 'SFP-10G-SR'}) + + sfp.get_warning_threshold_from_db.return_value = 25.0 + sfp.get_critical_threshold_from_db.return_value = 20 updater.update_module() - hw_management_independent_mode_update.thermal_data_set_module.assert_called_once_with(0, 11, 0, 0, 0, 0) - - mock_sfp.get_presence = mock.MagicMock(return_value=False) - hw_management_independent_mode_update.reset_mock() + hw_management_independent_mode_update.thermal_data_set_module.assert_called_with(0, sfp.sdk_index + 1, 30000, 20000, 25000, 254000) + + sfp.get_temperature_from_db.return_value = 0.0 updater.update_module() - hw_management_independent_mode_update.thermal_data_set_module.assert_called_once_with(0, 11, 0, 0, 0, 0) - - # ---- SFP.get_temperature_info publishes vendor info on module change ---- - def _make_sfp_for_publish(self, sn_changed=True, vendor=('Innolight', 'TR-iQ13L-NVS')): - # Import locally to avoid any potential name resolution issues in test scope - from sonic_platform.sfp import SFP as _SFP - sfp = object.__new__(_SFP) - sfp.sdk_index = 10 - sfp.retry_read_vendor = 5 if sn_changed else 0 - sfp.is_sw_control = mock.MagicMock(return_value=True) - sfp.reinit_if_sn_changed = mock.MagicMock(return_value=sn_changed) - if vendor is None: - sfp.get_vendor_info = mock.MagicMock(return_value=(None, None)) - else: - sfp.get_vendor_info = mock.MagicMock(return_value=vendor) - api = mock.MagicMock() - api.get_transceiver_thresholds_support = mock.MagicMock(return_value=False) - sfp.get_xcvr_api = mock.MagicMock(return_value=api) - return sfp - - def test_sfp_get_temperature_info_publishes_vendor_on_sn_change(self): - from sonic_platform.sfp import hw_management_independent_mode_update as sfp_hw_management_independent_mode_update - sfp = self._make_sfp_for_publish(sn_changed=True, vendor=('Innolight', 'TR-iQ13L-NVS')) - with mock.patch('sonic_platform.sfp.SfpOptoeBase.get_temperature', return_value=55.0): - sfp_hw_management_independent_mode_update.reset_mock() - sfp.get_temperature_info() - sfp_hw_management_independent_mode_update.vendor_data_set_module.assert_called_once_with( - 0, 11, {'manufacturer': 'Innolight', 'part_number': 'TR-iQ13L-NVS'} - ) - - def test_sfp_get_temperature_info_no_publish_when_no_change(self): - from sonic_platform.sfp import hw_management_independent_mode_update as sfp_hw_management_independent_mode_update - sfp = self._make_sfp_for_publish(sn_changed=False, vendor=('Innolight', 'TR-iQ13L-NVS')) - with mock.patch('sonic_platform.sfp.SfpOptoeBase.get_temperature', return_value=55.0): - sfp_hw_management_independent_mode_update.reset_mock() - sfp.get_temperature_info() - sfp_hw_management_independent_mode_update.vendor_data_set_module.assert_not_called() - - def test_sfp_get_temperature_info_no_publish_when_vendor_missing(self): - from sonic_platform.sfp import hw_management_independent_mode_update as sfp_hw_management_independent_mode_update - sfp = self._make_sfp_for_publish(sn_changed=True, vendor=None) - with mock.patch('sonic_platform.sfp.SfpOptoeBase.get_temperature', return_value=55.0): - sfp_hw_management_independent_mode_update.reset_mock() - sfp.get_temperature_info() - sfp_hw_management_independent_mode_update.vendor_data_set_module.assert_not_called() + hw_management_independent_mode_update.thermal_data_set_module.assert_called_with(0, sfp.sdk_index + 1, 0, 0, 0, 0) + + sfp.get_temperature_from_db.return_value = -1 + updater.update_module() + hw_management_independent_mode_update.thermal_data_set_module.assert_called_with(0, sfp.sdk_index + 1, 0, 0, 0, 254000) + + sfp.get_presence.return_value = False + updater.update_module() + hw_management_independent_mode_update.thermal_data_set_module.assert_called_with(0, sfp.sdk_index + 1, 0, 0, 0, 0) + hw_management_independent_mode_update.vendor_data_set_module.assert_called_with(0, sfp.sdk_index + 1, {'manufacturer': '', 'part_number': ''}) + + sfp.get_presence.side_effect = Exception('test exception') + updater.update_module() + hw_management_independent_mode_update.thermal_data_set_module.assert_called_with(0, sfp.sdk_index + 1, 0, 0, 0, 254000) @mock.patch('sonic_platform.thermal_updater.clean_thermal_data') @mock.patch('sonic_platform.thermal_updater.atexit.register') def test_registers_exit_cleanup(self, mock_register, mock_clean): hw_management_independent_mode_update.reset_mock() sfp = mock.MagicMock() - updater = ThermalUpdater([sfp]) + ThermalUpdater([sfp]) mock_register.assert_called_once() exit_callback = mock_register.call_args[0][0] @@ -209,20 +197,3 @@ def test_registers_exit_cleanup(self, mock_register, mock_clean): # Simulate process exit and confirm cleanup uses the bound SFP list exit_callback() mock_clean.assert_called_once_with([sfp]) - - def test_clean_thermal_data_only_sw_control_modules(self): - hw_management_independent_mode_update.reset_mock() - - sfp_sw = mock.MagicMock() - sfp_sw.sdk_index = 3 - sfp_sw.is_sw_control = mock.MagicMock(return_value=True) - - sfp_no_sw = mock.MagicMock() - sfp_no_sw.sdk_index = 4 - sfp_no_sw.is_sw_control = mock.MagicMock(return_value=False) - - clean_thermal_data([sfp_sw, sfp_no_sw]) - - hw_management_independent_mode_update.module_data_set_module_counter.assert_called_once_with(2) - hw_management_independent_mode_update.thermal_data_clean_module.assert_called_once_with(0, sfp_sw.sdk_index + 1) - diff --git a/platform/mellanox/mlnx-platform-api/tests/test_utils.py b/platform/mellanox/mlnx-platform-api/tests/test_utils.py index 5ffa6a9d98d..38241a32f93 100644 --- a/platform/mellanox/mlnx-platform-api/tests/test_utils.py +++ b/platform/mellanox/mlnx-platform-api/tests/test_utils.py @@ -1,6 +1,6 @@ # # SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES -# Copyright (c) 2021-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# Copyright (c) 2021-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. # Apache-2.0 # # Licensed under the Apache License, Version 2.0 (the "License"); @@ -327,6 +327,59 @@ def test_wait_until_conditions(self): conditions = [lambda: False] assert not utils.wait_until_conditions(conditions, 1) + @mock.patch('sonic_platform.utils.inotify.adapters.Inotify') + @mock.patch('os.access') + def test_wait_for_file_creation_immediate(self, mock_access, mock_inotify): + mock_access.return_value = True + assert utils.wait_for_file_creation('/tmp/test.file', timeout=1) + mock_inotify.assert_not_called() + + @mock.patch('sonic_platform.utils.logger.log_debug') + @mock.patch('os.path.exists') + @mock.patch('os.access') + def test_wait_for_file_creation_dir_missing(self, mock_access, mock_exists, mock_log_debug): + """When directory does not exist, return False immediately (no wait).""" + mock_access.return_value = False + mock_exists.return_value = False + assert not utils.wait_for_file_creation('/tmp/test.file', timeout=1) + mock_log_debug.assert_called_once() + + @pytest.mark.parametrize("event_type", [ + "IN_CREATE", + "IN_CLOSE_WRITE", + "IN_MOVED_TO", + ]) + @mock.patch('sonic_platform.utils.logger.log_info') + @mock.patch('os.path.exists') + @mock.patch('os.access') + def test_wait_for_file_creation_inotify_event(self, mock_access, mock_exists, mock_log_info, event_type): + """All inotify event types that indicate file creation are handled.""" + # First os.access: file not readable at start; second: readable when inotify event is processed + mock_access.side_effect = [False, True] + mock_exists.return_value = True + + mock_notifier = mock.MagicMock() + mock_notifier.event_gen.return_value = [ + (None, [event_type], "/tmp", "test.file") + ] + + with mock.patch('sonic_platform.utils.inotify.adapters.Inotify', return_value=mock_notifier): + assert utils.wait_for_file_creation('/tmp/test.file', timeout=1) + + mock_log_info.assert_called_once() + + @mock.patch('sonic_platform.utils.logger.log_error') + @mock.patch('os.path.exists') + @mock.patch('os.access') + def test_wait_for_file_creation_inotify_error(self, mock_access, mock_exists, mock_log_error): + mock_access.side_effect = [False, False] + mock_exists.return_value = True + + with mock.patch('sonic_platform.utils.inotify.adapters.Inotify', side_effect=Exception('boom')): + assert not utils.wait_for_file_creation('/tmp/test.file', timeout=1) + + mock_log_error.assert_called_once() + def test_timer(self): timer = utils.Timer() timer.start() diff --git a/platform/mellanox/mlnx-sai.mk b/platform/mellanox/mlnx-sai.mk index b1bd87bf898..cb7dcfb914f 100644 --- a/platform/mellanox/mlnx-sai.mk +++ b/platform/mellanox/mlnx-sai.mk @@ -1,6 +1,6 @@ # Mellanox SAI -MLNX_SAI_VERSION = SAIBuild2511.35.3400.0 +MLNX_SAI_VERSION = SAIBuild2511.36.0.14 MLNX_SAI_ASSETS_GITHUB_URL = https://github.com/Mellanox/Spectrum-SDK-Drivers-SONiC-Bins MLNX_SAI_ASSETS_RELEASE_TAG = sai-$(MLNX_SAI_VERSION)-$(BLDENV)-$(CONFIGURED_ARCH) MLNX_SAI_ASSETS_URL = $(MLNX_SAI_ASSETS_GITHUB_URL)/releases/download/$(MLNX_SAI_ASSETS_RELEASE_TAG) diff --git a/platform/mellanox/non-upstream-patches/external-changes.patch b/platform/mellanox/non-upstream-patches/external-changes.patch index e5ad6297617..38896a4ad45 100644 --- a/platform/mellanox/non-upstream-patches/external-changes.patch +++ b/platform/mellanox/non-upstream-patches/external-changes.patch @@ -19,7 +19,7 @@ CONFIG_GPIO_SYSFS=y CONFIG_IIO_SYSFS_TRIGGER=m CONFIG_NVME_HWMON=y -@@ -130,6 +130,12 @@ +@@ -136,6 +136,12 @@ CONFIG_EDAC_AMD64=m CONFIG_AMD_XGBE_DCB=y CONFIG_SENSORS_ISL68137=m diff --git a/platform/mellanox/one-image.mk b/platform/mellanox/one-image.mk index 880da6c61a4..adacd3e47b6 100644 --- a/platform/mellanox/one-image.mk +++ b/platform/mellanox/one-image.mk @@ -22,7 +22,7 @@ $(SONIC_ONE_IMAGE)_MACHINE = mellanox $(SONIC_ONE_IMAGE)_IMAGE_TYPE = onie $(SONIC_ONE_IMAGE)_INSTALLS += $(SX_KERNEL) $(KERNEL_MFT) $(MFT_OEM) $(MFT) $(MFT_FWTRACE_CFG) $(MLNX_HW_MANAGEMENT) $(MLNX_RSHIM) $(SONIC_ONE_IMAGE)_INSTALLS += $(SYSTEMD_SONIC_GENERATOR) -$(SONIC_ONE_IMAGE)_PYTHON_WHEELS += $(MELLANOX_FW_MANAGER) +$(SONIC_ONE_IMAGE)_PYTHON_WHEELS += $(MELLANOX_PLATFORM_UTILS) ifeq ($(INSTALL_DEBUG_TOOLS),y) $(SONIC_ONE_IMAGE)_DOCKERS += $(SONIC_INSTALL_DOCKER_DBG_IMAGES) $(SONIC_ONE_IMAGE)_DOCKERS += $(filter-out $(patsubst %-$(DBG_IMAGE_MARK).gz,%.gz, $(SONIC_INSTALL_DOCKER_DBG_IMAGES)), $(SONIC_INSTALL_DOCKER_IMAGES)) diff --git a/platform/mellanox/fw-manager/tests/__init__.py b/platform/mellanox/platform-utils/mellanox_bfb_installer/__init__.py similarity index 100% rename from platform/mellanox/fw-manager/tests/__init__.py rename to platform/mellanox/platform-utils/mellanox_bfb_installer/__init__.py diff --git a/platform/mellanox/platform-utils/mellanox_bfb_installer/bfb_file.py b/platform/mellanox/platform-utils/mellanox_bfb_installer/bfb_file.py new file mode 100644 index 00000000000..3d79f13769e --- /dev/null +++ b/platform/mellanox/platform-utils/mellanox_bfb_installer/bfb_file.py @@ -0,0 +1,180 @@ +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +""" +BFB image file: URL download, extract, SHA256 checksum checking. +""" + +import glob +import hashlib +import logging +import os +import sys +import subprocess +from typing import Optional, Tuple + +logger = logging.getLogger(__name__) + +DOWNLOAD_FILENAME = "sonic-nvidia-bluefield.bfb" + + +def _is_url(url_or_path: str) -> bool: + return url_or_path.startswith("http://") or url_or_path.startswith("https://") + + +def _maybe_download_bfb(url_or_path: str, work_dir: str) -> str: + """If bfb_arg is a URL, download to work_dir and return the local path. + + If url_or_path is a local path, return it unchanged. + """ + if not _is_url(url_or_path): + return url_or_path + logger.debug("Detected URL. Downloading file") + filename = os.path.join(work_dir, DOWNLOAD_FILENAME) + try: + result = subprocess.run( + ["curl", "-L", "-o", filename, url_or_path], + ) + if result.returncode != 0: + logger.error("the curl command failed with: %s", result.returncode) + sys.exit(1) + except FileNotFoundError as err: + logger.error("curl command not found: %s", err) + sys.exit(1) + logger.debug("bfb path changed to %s", filename) + return filename + + +def _extract_bfb(bfb_file: str, work_dir: str) -> Tuple[str, Optional[str]]: + """Extract the raw BFB file and sha256 file from a tar-archive image file. + + Fail if not a tar-archive. + Does not verify the SHA256 of the extracted BFB file. + """ + if not os.path.isfile(bfb_file): + logger.error("BFB file not found: %s", bfb_file) + sys.exit(1) + + file_result = subprocess.run( + ["file", "-b", bfb_file], + capture_output=True, + text=True, + timeout=5, + ) + if file_result.returncode != 0: + logger.error("the file command failed with: %s", file_result.returncode) + sys.exit(1) + file_type = file_result.stdout.strip() + + if "tar archive" not in file_type: + logger.error( + "File is not a tar archive: %s! Please provide a tar archive with .bfb extension" + " containing BFB and SHA256 hash.", + bfb_file, + ) + sys.exit(1) + + logger.info("Detected tar archive extracting BFB and SHA256 hash...") + + extract_result = subprocess.run( + ["tar", "-xf", bfb_file, "-C", work_dir], + capture_output=True, + timeout=60, + ) + if extract_result.returncode != 0: + logger.error("Failed to extract tar archive: %s", bfb_file) + sys.exit(1) + + bfb_basename = os.path.basename(bfb_file) + candidates = glob.glob(os.path.join(work_dir, "*bfb-intermediate")) + extracted_bfb = None + for p in candidates: + if bfb_basename in p: + extracted_bfb = p + break + if not extracted_bfb and candidates: + extracted_bfb = candidates[0] + if not extracted_bfb: + logger.error("No BFB file found in tar archive") + sys.exit(1) + + logger.info("Extracted BFB file: %s", extracted_bfb) + os.chmod(extracted_bfb, 0o644) + + extracted_sha256 = extracted_bfb + ".sha256" + if os.path.isfile(extracted_sha256): + logger.info("Found SHA256 hash file: %s", extracted_sha256) + else: + logger.warning("SHA256 hash file not found in tar archive") + extracted_sha256 = None + + return (extracted_bfb, extracted_sha256) + + +def _validate_bfb_sha256( + extracted_bfb_path: str, extracted_checksum_path: Optional[str] +) -> None: + if not extracted_checksum_path or not os.path.isfile(extracted_checksum_path): + logger.error("SHA256 hash file not found: %s", extracted_checksum_path or "") + sys.exit(1) + + logger.info("Verifying SHA256 checksum...") + + try: + with open(extracted_checksum_path, "r", encoding="utf-8") as f: + expected_hash = f.read().strip() + except Exception as e: + logger.error("Failed to read SHA256 hash file: %s", e) + sys.exit(1) + + sha256 = hashlib.sha256() + with open(extracted_bfb_path, "rb") as f: + for chunk in iter(lambda: f.read(1024 * 1024), b""): + sha256.update(chunk) + actual_hash = sha256.hexdigest() + + if expected_hash != actual_hash: + logger.error("SHA256 checksum mismatch!") + logger.error("Expected: %s", expected_hash) + logger.error("Actual: %s", actual_hash) + logger.error("BFB file may be corrupted or tampered with.") + sys.exit(1) + + logger.info("SHA256 checksum verification successful") + + +def prepare_bfb(bfb: Optional[str], work_dir: str, skip_extract: bool) -> str: + """Prepare BFB image for installation. + + Includes potential download, extraction, and SHA256 validation. + Returns the local path of the extracted raw BFB image file. + """ + try: + bfb_path = _maybe_download_bfb(bfb, work_dir) + if skip_extract: + extracted_bfb_path = bfb_path + else: + extracted_bfb_path, extracted_checksum_path = _extract_bfb( + bfb_path, work_dir + ) + _validate_bfb_sha256(extracted_bfb_path, extracted_checksum_path) + except SystemExit: + raise + except Exception as e: + logger.error("BFB handling failed: %s", e) + sys.exit(1) + return extracted_bfb_path diff --git a/platform/mellanox/platform-utils/mellanox_bfb_installer/bfb_install_core.py b/platform/mellanox/platform-utils/mellanox_bfb_installer/bfb_install_core.py new file mode 100644 index 00000000000..95e79c5c326 --- /dev/null +++ b/platform/mellanox/platform-utils/mellanox_bfb_installer/bfb_install_core.py @@ -0,0 +1,200 @@ +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +""" +The machinery to install the BFB image to a DPU. + +The caller of this library is responsible for tasks such as fetching and preparing the BFB image, +getting the dpu and rshim device names, validating their presence on the pci bus, etc. +""" + +import logging +import os +import random +import subprocess +import sys +import tempfile +import threading +import time +from typing import Optional + +from mellanox_bfb_installer import install_executor +from mellanox_bfb_installer import platform_dpu +from mellanox_bfb_installer import reset_dpu +from mellanox_bfb_installer import rshim_daemon + +logger = logging.getLogger(__name__) + +BFB_INSTALL_TIMEOUT_SEC = 1200 + + +def _run_bfb_install_image_delivery( + *, + rshim: str, + rshim_id: str, + bfb_path: str, + result_file_path: str, + child_pids: install_executor.PidCollection, + config_path: Optional[str] = None, + verbose: bool = False, + timeout_secs: int = BFB_INSTALL_TIMEOUT_SEC, +) -> int: + """Copy the bfb image to the device by running the `bfb-install` command. + + The caller must ensure the device is ready to receive the image, restart the device after, etc. + + Returns the bfb-install exit status (0 = success). + """ + cmd = ["timeout", f"{timeout_secs}s", "bfb-install", "-b", bfb_path, "-r", rshim] + if config_path: + cmd.extend(["-c", config_path]) + cmd_str = " ".join(cmd) + logger.info("Installing bfb image on DPU connected to %s using %s", rshim, cmd_str) + + proc = subprocess.Popen(cmd, stdout=subprocess.PIPE, stderr=subprocess.STDOUT, text=True) + + def capture_output(): + with open(result_file_path, "w") as result_file: + for line in proc.stdout: + result_file.write( + f"{rshim_id}: {line}" if line.endswith("\n") else f"{rshim_id}: {line}\n" + ) + result_file.flush() + if hasattr(proc.stdout, "close"): # Bypass close() on mock objects that don't have it. + proc.stdout.close() + + def progress_loop(): + elapsed = 0 + interval = random.randint(3, 10) + while proc.poll() is None and elapsed < timeout_secs: + time.sleep(interval) + elapsed += interval + if elapsed > timeout_secs: + elapsed = timeout_secs + sys.stdout.write( + f"\r{rshim_id}: Installing... {elapsed}/{timeout_secs} seconds elapsed" + ) + sys.stdout.flush() + sys.stdout.write("\n") + sys.stdout.flush() + + def maybe_output_result_file(exit_status: int): + if verbose or exit_status != 0: + with open(result_file_path) as f: + sys.stdout.write(f.read()) + sys.stdout.flush() + + try: + reader = None + progress = None + child_pids.append(proc.pid) + reader = threading.Thread(target=capture_output) + progress = threading.Thread(target=progress_loop) + reader.start() + progress.start() + proc.wait() + except Exception as e: + logger.error("%s: Error: Installation failed on connected DPU! Exception: %s", rshim_id, e) + maybe_output_result_file(1) + return 1 + finally: + if reader: + reader.join() + if progress: + progress.join() + child_pids.remove_if_contains(proc.pid) + + exit_status = proc.returncode + if exit_status != 0: + logger.error( + "%s: Error: Installation failed on connected DPU! Exit code: %s", rshim_id, exit_status + ) + else: + logger.info("%s: Installation Successful", rshim_id) + maybe_output_result_file(exit_status) + return exit_status + + +def full_install_bfb_on_device( + *, + rshim_name: str, + rshim_id: str, + dpu_name: str, + rshim_pci_bus_id: str, + dpu_pci_bus_id: Optional[str], + config_path: Optional[str], + bfb_path: str, + work_dir: str, + verbose: bool, + child_pids: install_executor.PidCollection, +) -> int: + """Run the full install sequence for one device. + + The workflow includes starting/stopping the rshim daemon, managing PCI devices, uploading the + BFB image, and resetting the DPU. + + Returns the bfb-install exit status (0 = success) or nonzero for other errors. + Run the full install sequence for one device: rshim daemon, wait for boot, + remove CX PCI device, run bfb-install, then stop daemon and reset DPU. + Returns the bfb-install exit status (0 = success). + """ + reset_dpu.wait_for_module_transition_to_complete(dpu_name) + + if not rshim_pci_bus_id: + # Should not happen. Handled by caller. + logger.error("Error: Could not find rshim PCI bus ID for DPU %s", dpu_name) + return 1 + if not rshim_daemon.start_rshim_daemon(rshim_id, rshim_pci_bus_id): + logger.info( + "%s: Rshim couldn't start. Attempting to stop it and then start it again.", rshim_id + ) + stop_ret = rshim_daemon.stop_rshim_daemon(rshim_id) + if not rshim_daemon.start_rshim_daemon(rshim_id, rshim_pci_bus_id): + logger.error( + "%s: Rshim couldn't start after stopping. (Stopping returned %s.) Giving up.", + rshim_id, + stop_ret, + ) + return 1 + try: + if not rshim_daemon.wait_for_rshim_boot(rshim_name): + return 1 + if dpu_pci_bus_id: + platform_dpu.remove_cx7_pci_device(dpu_pci_bus_id, f"{rshim_id}: ") + result_file = tempfile.NamedTemporaryFile( + dir=work_dir, prefix="result_file.", suffix="", delete=False + ) + result_file.close() + try: + return _run_bfb_install_image_delivery( + rshim=rshim_name, + rshim_id=rshim_id, + bfb_path=bfb_path, + result_file_path=result_file.name, + child_pids=child_pids, + config_path=config_path, + verbose=verbose, + ) + finally: + try: + os.unlink(result_file.name) + except OSError: + pass + finally: + rshim_daemon.stop_rshim_daemon(rshim_id) + logger.info("%s: Resetting DPU %s", rshim_id, dpu_name) + reset_dpu.reset_dpu(dpu_name, verbose) diff --git a/platform/mellanox/platform-utils/mellanox_bfb_installer/device_selection.py b/platform/mellanox/platform-utils/mellanox_bfb_installer/device_selection.py new file mode 100644 index 00000000000..a1c3cfa8354 --- /dev/null +++ b/platform/mellanox/platform-utils/mellanox_bfb_installer/device_selection.py @@ -0,0 +1,202 @@ +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +""" +Validate user selections and get corresponding device info, etc. for the system. +""" + +from dataclasses import dataclass +import logging +import os +import sys +from typing import Callable, List, Optional, Tuple + +from mellanox_bfb_installer import platform_dpu +from mellanox_bfb_installer.platform_dpu import dpu2rshim, rshim2dpu +from sonic_platform.device_data import DpuInterfaceEnum + +logger = logging.getLogger(__name__) + + +def _user_dpu_selection_to_dpus_from_platform_json( + dpus: Optional[str], + rshims: Optional[str], + script_name: str, + print_usage_callback: Callable[[], None], +) -> Tuple[List[str], bool]: + + all_dpus_list: List[str] = sorted(platform_dpu.list_dpus()) + if not all_dpus_list: + logger.error( + "No DPUs found! Make sure to run the %s script from the Smart Switch host device/switch!", + script_name, + ) + print_usage_callback() + sys.exit(1) + + target_dpu_list: List[str] = [] + user_selected_all = False + + if dpus is not None and dpus.strip() == "": + logger.error("If dpu parameter is provided, it cannot be empty!") + print_usage_callback() + sys.exit(1) + if rshims is not None and rshims.strip() == "": + logger.error("If rshim parameter is provided, it cannot be empty!") + print_usage_callback() + sys.exit(1) + + if dpus and rshims: + logger.error("Both dpu and rshim selection provided! Please provide only one of them.") + print_usage_callback() + sys.exit(1) + if dpus == "all" or rshims == "all": + target_dpu_list = all_dpus_list + user_selected_all = True + elif dpus: + target_dpu_list = [s.strip() for s in dpus.split(",")] + for dpu in target_dpu_list: + if not dpu: + logger.error( + "If providing a list of DPUs, it cannot contain empty strings! (Check for extra commas.)" + ) + print_usage_callback() + sys.exit(1) + if dpu not in all_dpus_list: + logger.error( + 'DPU "%s" is not found in platform.json dpus list: [%s]!', + dpu, + ", ".join(all_dpus_list), + ) + print_usage_callback() + sys.exit(1) + elif rshims: + _rshim_list = [s.strip() for s in rshims.split(",")] + for rshim in _rshim_list: + if not rshim: + logger.error( + "If providing a list of rshims, it cannot contain empty strings! (Check for extra commas.)" + ) + print_usage_callback() + sys.exit(1) + dpu = rshim2dpu(rshim) + if not dpu: + logger.error('No DPU in platform.json exists with rshim "%s"', rshim) + sys.exit(1) + target_dpu_list.append(dpu) + else: + logger.error("Input Error: No dpus specified! Please specify dpus using the --dpu option.") + print_usage_callback() + sys.exit(1) + + return target_dpu_list, user_selected_all + + +def _validate_config_files(config_paths: List[str]) -> None: + for config_file in config_paths: + if not os.path.isfile(config_file): + logger.error( + "Config provided %s is not a file! Please check the config file path", + config_file, + ) + sys.exit(1) + + +def _parse_config_paths( + configs: Optional[str], num_dpus: int, user_selected_all_dpus: bool +) -> List[Optional[str]]: + if configs is None: + return [None] * num_dpus + + config_list = [s.strip() for s in configs.split(",") if s.strip()] + if len(config_list) == 1: + _validate_config_files(config_list) + return [config_list[0]] * num_dpus + elif user_selected_all_dpus: + logger.error('Cannot specify "all" for dpus and more than one config file!') + sys.exit(1) + elif len(config_list) == num_dpus: + _validate_config_files(config_list) + return config_list + logger.error( + "Number of config files does not match the number of DPUs selected: %s and %s", + len(config_list), + num_dpus, + ) + sys.exit(1) + + +@dataclass(frozen=True) +class TargetInfo: + dpu: str + rshim: str + # Only used for detaching the dpu CX7 pci device. If this is None, it's not detected, so no need to detach. + dpu_pci_bus_id: Optional[str] + rshim_pci_bus_id: str + config_path: Optional[str] + + +def get_targets( + dpus: Optional[str], + rshims: Optional[str], + configs: Optional[str], + script_name: str, + print_usage_callback: Callable[[], None], +) -> List[TargetInfo]: + """Return a list of targets to install on based on the user's selections. + + The user's selections are parsed and converted to a list of DPUs which is validated against + the platform JSON file, as well as the currently installed devices on the PCI bus. + + Returns a list of TargetInfo objects, which is all the target-specific information needed to + install the BFB image on the target DPU. + """ + target_dpus_list, user_selected_all_dpus = _user_dpu_selection_to_dpus_from_platform_json( + dpus=dpus, rshims=rshims, script_name=script_name, print_usage_callback=print_usage_callback + ) + + dpus_detected_pci_bus_ids = platform_dpu.get_dpus_detected_pci_bus_ids() + + config_paths = _parse_config_paths(configs, len(target_dpus_list), user_selected_all_dpus) + + target_devices = [] + for dpu, config_path in zip(target_dpus_list, config_paths, strict=True): + rshim = dpu2rshim(dpu) + if not rshim: + logger.error("DPU %s: No rshim mapping found!", dpu) + sys.exit(1) + bus_ids = dpus_detected_pci_bus_ids.get(dpu, None) + if not bus_ids: + logger.error("DPU %s: no devices detected on the PCI bus!", dpu) + sys.exit(1) + # dpu_pci_bus_id = None is OK. Might be running in ISOLATED MODE. Only used to disconnect. + dpu_pci_bus_id = bus_ids.get(DpuInterfaceEnum.PCIE_INT.value, None) + rshim_pci_bus_id = bus_ids.get(DpuInterfaceEnum.RSHIM_PCIE_INT.value, None) + if not rshim_pci_bus_id: + logger.error("DPU %s: rshim %s is not detected on the PCI bus!", dpu, rshim) + sys.exit(1) + target_devices.append( + TargetInfo( + dpu=dpu, + rshim=rshim, + dpu_pci_bus_id=dpu_pci_bus_id, + rshim_pci_bus_id=rshim_pci_bus_id, + config_path=config_path, + ) + ) + + return target_devices diff --git a/platform/mellanox/platform-utils/mellanox_bfb_installer/install_executor.py b/platform/mellanox/platform-utils/mellanox_bfb_installer/install_executor.py new file mode 100644 index 00000000000..03b1ef748f3 --- /dev/null +++ b/platform/mellanox/platform-utils/mellanox_bfb_installer/install_executor.py @@ -0,0 +1,98 @@ +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +""" +Parallel install executor with signal handling. +""" + +import logging +import os +import signal +import sys +import threading +from concurrent.futures import ThreadPoolExecutor, as_completed +from typing import Callable + +logger = logging.getLogger(__name__) + + +class PidCollection: + """Thread-safe list of child process PIDs.""" + + def __init__(self) -> None: + self._lock = threading.Lock() + self._pids: list[int] = [] + + def append(self, pid: int) -> None: + with self._lock: + self._pids.append(pid) + + def remove_if_contains(self, pid: int) -> None: + with self._lock: + try: + self._pids.remove(pid) + except ValueError: + pass + + def copy_to_list(self) -> list[int]: + """Return a copy of the PID list for safe iteration (e.g. in a signal handler).""" + with self._lock: + return list(self._pids) + + +def run_parallel( + task_count: int, + task_fn: Callable[[int, PidCollection], int], +) -> int: + """ + Run task_fn(0, child_pids), task_fn(1, child_pids), ... in parallel via ThreadPoolExecutor. + + The task_fn is expected to install a bfb image to a single device, by forking child processes. + The task_fn must append the child process PIDs to the child_pids collection that is passed to + it as the second argument. This parallel executor will install signal handlers that kill all + child processes on SIGINT/SIGTERM/SIGHUP. + + Returns the number of tasks that exited with a non-zero status or raised an exception. + """ + child_pids = PidCollection() + + def _kill_child_procs(_signum=None, _frame=None): + logger.warning("Installation interrupted. Killing all child procs.") + pids = child_pids.copy_to_list() + for pid in pids: + try: + logger.debug("Killing child proc PID %s.", pid) + os.kill(pid, signal.SIGKILL) + except (ProcessLookupError, PermissionError): + pass + raise SystemExit(1) + + signal.signal(signal.SIGINT, _kill_child_procs) + signal.signal(signal.SIGTERM, _kill_child_procs) + signal.signal(signal.SIGHUP, _kill_child_procs) + + failed = 0 + with ThreadPoolExecutor(max_workers=task_count) as executor: + futures = {executor.submit(task_fn, i, child_pids): i for i in range(task_count)} + for future in as_completed(futures): + try: + if future.result() != 0: + failed += 1 + except Exception as e: + logger.error("Install task failed: %s", e) + failed += 1 + return failed diff --git a/platform/mellanox/platform-utils/mellanox_bfb_installer/main.py b/platform/mellanox/platform-utils/mellanox_bfb_installer/main.py new file mode 100644 index 00000000000..4ce27c62021 --- /dev/null +++ b/platform/mellanox/platform-utils/mellanox_bfb_installer/main.py @@ -0,0 +1,315 @@ +#!/usr/bin/env python3 +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +""" +SONiC BFB Installer - Install BFB image on DPUs connected to the host. +""" + +import click +from contextlib import contextmanager +import fcntl +import logging +import logging.handlers +import os +import sys +import tempfile +import time +from typing import Dict, List, Optional + + +from mellanox_bfb_installer import bfb_file +from mellanox_bfb_installer import device_selection +from mellanox_bfb_installer import install_executor +from mellanox_bfb_installer import bfb_install_core +from mellanox_bfb_installer import platform_dpu + +SCRIPT_NAME = "sonic-bfb-installer" +LOCK_FILE = "/var/lock/sonic-bfb-installer.lock" + +logger: Optional[logging.Logger] = logging.getLogger(SCRIPT_NAME) + + +def setup_log_handlers() -> None: + """Configure a single logger that outputs to stdout and syslog. + + Prints just the message text to stdout. + Prints a formatted message to syslog, including the script name prefix. + """ + global logger + logger = logging.getLogger() + logger.handlers.clear() + + # Stdout: print message directly without any other log line prefix text. + stdout_handler = logging.StreamHandler(sys.stdout) + stdout_handler.setFormatter(logging.Formatter("%(message)s")) + logger.addHandler(stdout_handler) + + # Syslog: includes script name prefix before the message. + syslog = logging.handlers.SysLogHandler(address="/dev/log") + syslog.setFormatter(logging.Formatter(f"{SCRIPT_NAME}: %(message)s")) + logger.addHandler(syslog) + + +def set_logging_level(verbose: bool = False) -> None: + global logger + level = logging.DEBUG if verbose else logging.INFO + logger = logging.getLogger() + logger.setLevel(level) + + +@contextmanager +def _lock_file_or_exit(lock_file_path: str = LOCK_FILE): + """ + Context manager for non-blocking lock on LOCK_FILE, ensuring only one running instance. + + Exits with code 1 if the lock file is already locked. + """ + + @contextmanager + def _open_with_best_effort_close(path, mode): + """Helper for managing opening/closing lock file with our special exception handling.""" + # Open, with custom exception class wrapping + try: + lock_file = open(path, mode) + except Exception as e: + logger.error(f"Could not open lock file {lock_file_path}: {e}") + sys.exit(1) + + try: + yield lock_file + finally: + # Close, but swallow errors after logging them + try: + lock_file.close() + except Exception as e: + logger.warning(f"Could not close lock file: {e}") + + with _open_with_best_effort_close(lock_file_path, "w") as lock_file: + try: + fcntl.flock(lock_file.fileno(), fcntl.LOCK_EX | fcntl.LOCK_NB) + except OSError as e: + logger.debug(f"Could not lock file {lock_file_path}: {e}") + logger.error(f"Another instance of {SCRIPT_NAME} is already running") + sys.exit(1) + + yield lock_file + + pass # Closing the file will unlock it. + + +def check_for_root() -> None: + """Exit if not running as root.""" + if os.geteuid() != 0: + logger.error("Please run the script in sudo mode") + sys.exit(1) + + +USAGE_SYNTAX = ( + f"Syntax: {SCRIPT_NAME} -b|--bfb --dpu|-d " + "--verbose|-v --config|-c --help|-h" +) +USAGE_ARGUMENTS = """Arguments: +-b|--bfb\t\tProvide custom path for bfb tar archive +-d|--dpu\t\tInstall on specified DPUs, mention all if installation is required on all connected DPUs +-s|--skip-extract\tSkip extracting the bfb image +-v|--verbose\t\tVerbose installation result output +-c|--config\t\tConfig file +-h|--help\t\tHelp""" + + +def print_usage() -> None: + """Print usage matching shell script.""" + click.echo(USAGE_SYNTAX) + click.echo(USAGE_ARGUMENTS) + + +def _generate_additional_config_lines() -> str: + """Generate additional config lines.""" + # Used by DPU to roughly set the clock after installation to a recent value from the NPU. + return f"NPU_TIME={int(time.time())}\n" + + +def _add_additional_config_lines( + targets: List[device_selection.TargetInfo], temp_config_lines: str, tempdir: str +) -> None: + """Update the targets to use temporary copies of the config files with additional content. + + For each config file encountered (by path), create a temp copy with original contents plus + temp_config_lines, and update the target to use the new path. If the config file at a given + path has already been processed, re-use the existing temp copy. If the config file is None, + create an empty temp copy and append the additional lines. + """ + processed_configs: Dict[Optional[str], str] = {} + for target in targets: + config_path = target.config_path + if config_path in processed_configs: + continue + base = os.path.basename(config_path) if config_path else "empty-config" + fd, new_path = tempfile.mkstemp(suffix="", prefix=f"{base}.", dir=tempdir) + with os.fdopen(fd, "w") as f: + if config_path: + with open(config_path, "r") as orig: + f.write(orig.read()) + f.write("\n") + f.write(temp_config_lines) + f.write("\n") + processed_configs[config_path] = new_path + for idx, target in enumerate(targets): + targets[idx] = device_selection.TargetInfo( + dpu=target.dpu, + rshim=target.rshim, + dpu_pci_bus_id=target.dpu_pci_bus_id, + rshim_pci_bus_id=target.rshim_pci_bus_id, + config_path=processed_configs[target.config_path], # Replacing + ) + + +def _install_on_dpus( + bfb_path: str, + work_dir: str, + rshims: Optional[str], + dpus: Optional[str], + verbose: bool, + configs: Optional[str], + temp_work_dir: str, +) -> None: + """Install BFB image on DPUs connected to the host, including all preparatory steps, reset, etc. + + bfb_path is the prepared BFB path; work_dir is used for per-device result files. + """ + # Turn the user-provided parameters into a concrete list of dpus/devices/configs. + # Then do the parallel installations. + + targets = device_selection.get_targets( + dpus=dpus, + rshims=rshims, + configs=configs, + script_name=SCRIPT_NAME, + print_usage_callback=print_usage, + ) + + additional_config_lines = _generate_additional_config_lines() + _add_additional_config_lines(targets, additional_config_lines, temp_work_dir) + + def _install_one_dpu(idx: int, child_pids: install_executor.PidCollection) -> int: + target = targets[idx] + rshim_name = target.rshim + return bfb_install_core.full_install_bfb_on_device( + rshim_name=rshim_name, + rshim_id=rshim_name[5:] if rshim_name.startswith("rshim") else rshim_name, + dpu_name=target.dpu, + rshim_pci_bus_id=target.rshim_pci_bus_id, + dpu_pci_bus_id=target.dpu_pci_bus_id, + config_path=target.config_path, + bfb_path=bfb_path, + work_dir=work_dir, + verbose=verbose, + child_pids=child_pids, + ) + + failed = install_executor.run_parallel(len(targets), _install_one_dpu) + if failed: + sys.exit(1) + + +def _main( + bfb: Optional[str], + rshim: Optional[str], + dpu: Optional[str], + skip_extract: bool, + verbose: bool, + config: Optional[str], +) -> None: + set_logging_level(verbose=verbose) + check_for_root() + + if rshim: + logger.warning( + "DEPRECATION WARNING: The --rshim option is deprecated and will be removed in the future. Use --dpu instead." + ) + + platform_dpu.validate_platform() + + with _lock_file_or_exit(): + if not bfb: + logger.debug("Error: bfb image is not provided.") + print_usage() + sys.exit(1) + + temp_work_dir = tempfile.TemporaryDirectory(prefix=SCRIPT_NAME + ".") + try: + bfb_path = bfb_file.prepare_bfb(bfb, temp_work_dir.name, skip_extract) + + _install_on_dpus( + bfb_path, + temp_work_dir.name, + rshims=rshim, + dpus=dpu, + verbose=verbose, + configs=config, + temp_work_dir=temp_work_dir.name, + ) + finally: + try: + temp_work_dir.cleanup() + except Exception as e: + logger.warning(f"Could not cleanup temporary work directory: {e}") + + +@click.command( + context_settings=dict(help_option_names=["-h", "--help"], max_content_width=120), + name=SCRIPT_NAME, +) +@click.option("-b", "--bfb", type=str, default=None, help="Provide custom path for bfb tar archive") +@click.option( + "-r", + "--rshim", + type=str, + default=None, + hidden=True, + help="(DEPRECATED: Use --dpu instead.) Install only on DPUs connected to rshim interfaces provided, mention all if installation is required on all connected DPUs", +) +@click.option( + "-d", + "--dpu", + type=str, + default=None, + help="Install on specified DPUs, mention all if installation is required on all connected DPUs", +) +@click.option( + "-s", "--skip-extract", is_flag=True, default=False, help="Skip extracting the bfb image" +) +@click.option( + "-v", "--verbose", is_flag=True, default=False, help="Verbose installation result output" +) +@click.option("-c", "--config", type=str, default=None, help="Config file") +def main( + bfb: Optional[str], + rshim: Optional[str], + dpu: Optional[str], + skip_extract: bool, + verbose: bool, + config: Optional[str], +) -> None: + """SONiC BFB Installer - install BFB image on DPUs connected to the host.""" + setup_log_handlers() + _main(bfb=bfb, rshim=rshim, dpu=dpu, skip_extract=skip_extract, verbose=verbose, config=config) + + +if __name__ == "__main__": + main() diff --git a/platform/mellanox/platform-utils/mellanox_bfb_installer/platform_dpu.py b/platform/mellanox/platform-utils/mellanox_bfb_installer/platform_dpu.py new file mode 100644 index 00000000000..504c8df43fc --- /dev/null +++ b/platform/mellanox/platform-utils/mellanox_bfb_installer/platform_dpu.py @@ -0,0 +1,198 @@ +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +""" +DPU/rshim mapping and PCI detection. +""" + +import logging +import os +import subprocess +import sys +from typing import Dict, List, Optional, Tuple + +logger = logging.getLogger(__name__) + +from sonic_py_common import device_info +from sonic_platform.device_data import DeviceDataManager, DpuInterfaceEnum + +# PCI Device IDs +BFSOC_DEV_ID = "15b3:c2d5" # rshim device +CX7_DEV_ID = "15b3:a2dc" # dpu (ethernet) device + + +def validate_platform() -> None: + """Validate platform.json is available; exit with code 1 if not.""" + if not device_info.get_platform(): + logger.error("Could not determine PLATFORM from device_info") + sys.exit(1) + + if not device_info.get_path_to_platform_dir(): + logger.error("Could not determine PLATFORM directory from device_info") + sys.exit(1) + + path = os.path.join( + device_info.get_path_to_platform_dir(), + device_info.PLATFORM_JSON_FILE, + ) + if not os.path.isfile(path): + logger.error("platform.json file not found at %s", path) + sys.exit(1) + + +def _get_dpus_data(): + """Return DPUS dict from platform.json via DeviceDataManager, or None.""" + return DeviceDataManager.get_platform_dpus_data() + + +def list_dpus() -> List[str]: + """Return list of DPU names from platform.json (keys of .DPUS).""" + dpus_data = _get_dpus_data() + if not dpus_data: + return [] + return list(dpus_data.keys()) + + +def dpu2rshim(dpu: str) -> Optional[str]: + """Return rshim name for the given DPU from platform.json (.DPUS[dpu].rshim_info).""" + rshim = DeviceDataManager.get_dpu_interface(dpu, DpuInterfaceEnum.RSHIM_INT.value) + return rshim if rshim else None + + +def rshim2dpu(rshim: str) -> Optional[str]: + """Return DPU name for the given rshim from platform.json (inverse of dpu2rshim).""" + dpus_data = _get_dpus_data() + if not dpus_data: + return None + for dpu, info in dpus_data.items(): + if isinstance(info, dict) and info.get(DpuInterfaceEnum.RSHIM_INT.value) == rshim: + return dpu + return None + + +def _run_lspci_d_n() -> str: + """Run `lspci -D -n` and return stdout.""" + try: + result = subprocess.run(["lspci", "-D", "-n"], capture_output=True, text=True, timeout=10) + return result.stdout if result.returncode == 0 else "" + except Exception: + return "" + + +def get_dpus_detected_pci_bus_ids() -> Dict[str, Dict[str, str]]: + """Return a dict of DPU names to (interface type -> bus id) of detected PCI devices. + + Detects the two PCI devices for each DPU: the CX7 (ethernet NIC) dpu device and the BFSOC + (rshim) device. Returns only the ones that are detected. Is aware of ISOLATED MODE dpus. + + The return value is a dict mapping from dpu name (e.g. "dpu0") to a dict of interface type + strings as defined by DpuInterfaceEnum values, to bus id (e.g. "0000:01:00.0"). + """ + # Note: this function detects the two PCI devices for each DPU: the CX7 (ethernet) device and + # the BFSOC (rshim) device. Normally these will reside at the PCI bus IDs designated in the + # platform.json file for each DPU. However, there is another case: on some legacy systems, the + # DPUs are configured to run in ISOLATED MODE, in which case the BFSOC (rshim) device is present + # and the CX7 (ethernet) device is not. Also, the BFSOC (rshim) device is installed at the PCI + # bus ID that the CX7 (ethernet) device is usually assigned to. During an upgrade of all of the + # devices in a SmartSwitch, if this version of the script is running on the switch, the switch + # will have the newer platform.json file for non-ISOLATED-MODE, so the BFSOC (rshim) device + # will be on the PCI bus ID that the CX7 (ethernet) device is assigned to in the platform.json + # file. So the implementation below detects either device type at either bus ID associated with + # the dpu. + + dpus = list_dpus() + + # Identify which bus IDs the devices are expected to be at according to platform.json. + # Store in `needed_bus_ids`, a dict from bus ID to (dpu, interface type). The interface type + # string is a DpuInterfaceEnum value. + needed_bus_ids: Dict[str, Tuple[str, str]] = {} + for dpu in dpus: + # "bus_info"/"rshim_bus_info" in platform.json are the PCI bus IDs. + bus_info = DeviceDataManager.get_dpu_interface(dpu, DpuInterfaceEnum.PCIE_INT.value) + if bus_info: + needed_bus_ids[bus_info] = (dpu, DpuInterfaceEnum.PCIE_INT.value) + rshim_bus_info = DeviceDataManager.get_dpu_interface( + dpu, DpuInterfaceEnum.RSHIM_PCIE_INT.value + ) + if rshim_bus_info: + needed_bus_ids[rshim_bus_info] = (dpu, DpuInterfaceEnum.RSHIM_PCIE_INT.value) + + # Scan the pci system to find the devices present on the needed bus IDs. + # Build the return value `detected_bus_ids` which maps from dpu to (interface type -> bus ID) + # for each detected device. The interface type string is a DpuInterfaceEnum value. + lspci_out = _run_lspci_d_n() + detected_bus_ids: Dict[str, Dict[str, str]] = {} + for line in lspci_out.splitlines(): + line_parts = line.split() + if len(line_parts) < 3: + logger.warning( + 'Invalid `lspci -D -n` output line. Expected at least 3 columns. Skipping line: "%s"', + line, + ) + continue + # lspci -D -n output line example: "0000:08:00.0 0200: 15b3:a2d5 (rev 01)" + bus_id = line_parts[0] + device_id = line_parts[2] + if device_id == CX7_DEV_ID: + actual_iface_type = DpuInterfaceEnum.PCIE_INT.value + elif device_id == BFSOC_DEV_ID: + actual_iface_type = DpuInterfaceEnum.RSHIM_PCIE_INT.value + else: + if bus_id in needed_bus_ids: + logger.warning( + "Ignoring unexpected PCI device id %s at bus id %s while detecting DPU interfaces", + device_id, + bus_id, + ) + continue + if bus_id in needed_bus_ids: + dpu, expected_iface_type = needed_bus_ids[bus_id] + if dpu not in detected_bus_ids: + detected_bus_ids[dpu] = {} + if actual_iface_type == DpuInterfaceEnum.RSHIM_PCIE_INT.value: + if expected_iface_type == DpuInterfaceEnum.PCIE_INT.value: + logger.warning( + "DPU %s: is running in ISOLATED MODE. " + "PCI device detected at bus id %s is device id %s, not a CX7 %s", + *(dpu, bus_id, device_id, CX7_DEV_ID), # *(...) is autoformatter hack + ) + detected_bus_ids[dpu][actual_iface_type] = bus_id + elif actual_iface_type == DpuInterfaceEnum.PCIE_INT.value: + if expected_iface_type == DpuInterfaceEnum.RSHIM_PCIE_INT.value: + logger.error( + "PCI device detected for DPU %s at bus id %s is the CX7 device id %s, not " + "the expected BFSOC / rshim device id %s", + *(dpu, bus_id, device_id, BFSOC_DEV_ID), # *(...) is autoformatter hack + ) + detected_bus_ids[dpu][actual_iface_type] = bus_id + else: + raise ValueError(f"Unknown interface type: {actual_iface_type}") # A script bug. + return detected_bus_ids + + +def remove_cx7_pci_device(pci_bus_id: str, log_prefix: str) -> None: + """If the CX PCI device for the DPU is present, remove it. + + Logging messages will be prefixed with the log_prefix value (e.g. "rshim0: "). + """ + logger.info("%sRemoving CX PCI device %s", log_prefix, pci_bus_id) + remove_path = f"/sys/bus/pci/devices/{pci_bus_id}/remove" + try: + with open(remove_path, "w") as f: + f.write("1") + except OSError as e: + logger.error("Failed to remove PCI device %s: %s", pci_bus_id, e) diff --git a/platform/mellanox/platform-utils/mellanox_bfb_installer/pyproject.toml b/platform/mellanox/platform-utils/mellanox_bfb_installer/pyproject.toml new file mode 100644 index 00000000000..e9cb97b3997 --- /dev/null +++ b/platform/mellanox/platform-utils/mellanox_bfb_installer/pyproject.toml @@ -0,0 +1,19 @@ +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +[tool.black] +line-length = 100 diff --git a/platform/mellanox/platform-utils/mellanox_bfb_installer/reset_dpu.py b/platform/mellanox/platform-utils/mellanox_bfb_installer/reset_dpu.py new file mode 100644 index 00000000000..c45dd417d06 --- /dev/null +++ b/platform/mellanox/platform-utils/mellanox_bfb_installer/reset_dpu.py @@ -0,0 +1,165 @@ +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +""" +Reset a DPU. +""" + +import logging +import sys +import threading +import time +from typing import Callable, Optional + +import sonic_platform.dpuctlplat +from sonic_platform.dpuctlplat import DpuCtlPlat +from swsscommon.swsscommon import SonicV2Connector +from utilities_common.module import ModuleHelper + +logger = logging.getLogger(__name__) + +DPU_TRANSITION_WAIT_TIMEOUT_SECS = 13 * 60 + + +def _is_chassis_module_table_present(dpu_name: str) -> bool: + """Return True if STATE_DB has key CHASSIS_MODULE_TABLE|{dpu_name}.""" + try: + db = SonicV2Connector() + db.connect(db.STATE_DB) + return bool(db.keys(db.STATE_DB, f"CHASSIS_MODULE_TABLE|{dpu_name.upper()}")) + except Exception: + logger.error("Error checking if CHASSIS_MODULE_TABLE is present for %s", dpu_name) + return False + + +def _chassis_module_table_dpu_get_field(dpu_upper: str, field: str) -> Optional[str]: + """Get one field from CHASSIS_MODULE_TABLE| in STATE_DB; None if missing or on error.""" + module_key = f"CHASSIS_MODULE_TABLE|{dpu_upper}" + try: + db = SonicV2Connector() + db.connect(db.STATE_DB) + v = db.get(db.STATE_DB, module_key, field) + if v is None or v == "": + return None + return str(v) + except Exception: + return None + + +def wait_for_module_transition_to_complete(dpu: str) -> None: + """Wait for CHASSIS_MODULE_TABLE transition_in_progress to clear (up to 13 min from start time).""" + dpu_upper = dpu.upper() + transition_in_progress = _chassis_module_table_dpu_get_field( + dpu_upper, "transition_in_progress" + ) + if transition_in_progress != "True": + return + + raw_start = _chassis_module_table_dpu_get_field(dpu_upper, "transition_start_time") + transition_start_time = None + if raw_start is not None: + try: + transition_start_time = int(raw_start) + except ValueError: + pass + if transition_start_time is None: + transition_start_time = int(time.time()) + + logger.info( + "%s: Waiting for module transition to complete (timeout %.3g minutes from transition_start_time)", + dpu, + DPU_TRANSITION_WAIT_TIMEOUT_SECS / 60, + ) + while True: + time.sleep(2) + logger.info("%s: Checking module transition status... ", dpu) + transition_in_progress = _chassis_module_table_dpu_get_field( + dpu_upper, "transition_in_progress" + ) + if transition_in_progress != "True": + logger.info("%s: Module transition flag cleared", dpu) + break + current_time = int(time.time()) + elapsed = current_time - transition_start_time + if elapsed >= DPU_TRANSITION_WAIT_TIMEOUT_SECS: + logger.info( + "%s: Transition wait timeout (%.3g minutes) reached, proceeding", + dpu, + DPU_TRANSITION_WAIT_TIMEOUT_SECS / 60, + ) + break + + +def _reboot_with_progress(dpu: str, reboot_fn: Callable[[], None]) -> None: + """Run DPU reboot asynchronously and print elapsed time every 5s (matches sonic-bfb-installer.sh run_dpuctl_reset).""" + start = time.time() + err: list[Exception] = [] + + def target() -> None: + try: + reboot_fn() + except Exception as e: + err.append(e) + + t = threading.Thread(target=target) + t.start() + while t.is_alive(): + elapsed = int(time.time() - start) + sys.stdout.write(f"{dpu}: Reboot: {elapsed} seconds elapsed\n") + t.join(timeout=5.0) + t.join() + total = int(time.time() - start) + sys.stdout.write(f"{dpu}: Reboot: {total} seconds elapsed in total\n") + if err: + e = err[0] + logger.error("An error occurred while rebooting %s: %s - %s", dpu, type(e).__name__, e) + + +def reset_dpu(dpu: str, use_verbose: bool) -> None: + """Reset a DPU, including sensor management, PCI, and power cycling.""" + # Change dpuctlplat to use this script's custom root logger, rather than SysLogger. + # This applies to all instances of DpuCtlPlat, including those created under-the-hood by the + # module interface. + sonic_platform.dpuctlplat.use_logger(logging.getLogger(sonic_platform.dpuctlplat.__name__)) + + dpu_ctl = DpuCtlPlat(dpu) + dpu_ctl.setup_logger(use_print=False, use_notice_level=True) + dpu_ctl.verbosity = use_verbose + + # The module helper adds functionality for managing sensors/etc. + # Only use this helper if PMON and chassisd are running. Otherwise, just use DpuCtlPlat to + # reset the DPU and not handle sensors/etc. + use_module_helper = _is_chassis_module_table_present(dpu.upper()) + if use_module_helper: + # Use the module helper, which also handles sensors/etc. + logger.info("Using ModuleHelper to reset %s", dpu) + helper = ModuleHelper() + helper.module_pre_shutdown(dpu) + # Use DpuCtlPlat.dpu_reboot() directly, instead of ModuleHelper.reboot_module(). + # ModuleHelper.reboot_module() uses DpuCtlPlat.dpu_reboot() under the hood, but it doesn't + # have the ability to pass force=True through to DpuCtlPlat. The module helper is a public + # API and extending it to pass additional arguments without breaking other platforms will + # take some work. Also, there are no options for verbosity passed through. So, just use + # DpuCtlPlat directly, for now, until the ModuleHelper API is extended. + dpu_ctl_dpu_reboot = lambda: dpu_ctl.dpu_reboot(forced=True, skip_pre_post=True) + _reboot_with_progress(dpu, dpu_ctl_dpu_reboot) + helper.module_post_startup(dpu) + else: + # Use DpuCtlPlat to reset the DPU and PCI bus only, not handle sensors/etc. + logger.info("Using DpuCtlPlat to reset %s", dpu) + dpu_ctl_dpu_reboot = lambda: dpu_ctl.dpu_reboot(forced=True, skip_pre_post=False) + _reboot_with_progress(dpu, dpu_ctl_dpu_reboot) diff --git a/platform/mellanox/platform-utils/mellanox_bfb_installer/rshim_daemon.py b/platform/mellanox/platform-utils/mellanox_bfb_installer/rshim_daemon.py new file mode 100644 index 00000000000..a4ddffc1d54 --- /dev/null +++ b/platform/mellanox/platform-utils/mellanox_bfb_installer/rshim_daemon.py @@ -0,0 +1,118 @@ +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +""" +Rshim daemon start/stop and wait for boot. +""" + +import logging +import os +import subprocess +import time + +logger = logging.getLogger(__name__) + +RSHIM_BINARY = "/usr/sbin/rshim" +PIDFILE_DIR = "/var/run" +BOOT_WAIT_TIMEOUT_SEC = 10 + + +def _pidfile_path(rid: str) -> str: + """Return path to pidfile for the given rshim id (e.g. '0' -> /var/run/rshim_0.pid).""" + return os.path.join(PIDFILE_DIR, f"rshim_{rid}.pid") + + +def start_rshim_daemon(rid: str, pci_bus: str) -> bool: + """Start rshim daemon in background. + + Returns True on success, False on failure. + """ + pidfile = _pidfile_path(rid) + try: + result = subprocess.run( + [ + "start-stop-daemon", + "--start", + "--quiet", + "--background", + "--make-pidfile", + "--pidfile", + pidfile, + "--exec", + RSHIM_BINARY, + "--", + "-f", + "-i", + rid, + "-d", + f"pcie-{pci_bus}", + ], + ) + if result.returncode != 0: + logger.error("Failed to start rshim for rshim%s: exit code %d", rid, result.returncode) + return False + except Exception as e: + logger.error("Failed to start rshim for rshim%s: %s", rid, e) + return False + return True + + +def stop_rshim_daemon(rid: str) -> bool: + """Stop rshim daemon if pidfile exists. + + Returns True on success, False on failure. + """ + pidfile = _pidfile_path(rid) + try: + if not os.path.isfile(pidfile): + logger.warning("Failed to stop rshim for rshim%s: missing pidfile %s", rid, pidfile) + return False + result = subprocess.run( + [ + "start-stop-daemon", + "--stop", + "--quiet", + "--pidfile", + pidfile, + "--remove-pidfile", + "--retry", + "TERM/15/KILL/5", + ], + ) + if result.returncode != 0: + logger.warning("Failed to stop rshim for rshim%s: exit code %d", rid, result.returncode) + return False + except Exception as e: + logger.error("Failed to stop rshim for rshim%s: %s", rid, e) + return False + return True + + +def wait_for_rshim_boot(rshim: str) -> bool: + """Poll /dev/{rshim}/boot for up to BOOT_WAIT_TIMEOUT_SEC seconds. + + Returns True if boot file appeared, False otherwise. + """ + boot_path = f"/dev/{rshim}/boot" + timeout = BOOT_WAIT_TIMEOUT_SEC + while timeout > 0: + if os.path.exists(boot_path): + return True + time.sleep(1) + timeout -= 1 + logger.error("%s: Error: Boot file did not appear after 10 seconds", rshim) + return False diff --git a/platform/mellanox/platform-utils/mellanox_component_versions/__init__.py b/platform/mellanox/platform-utils/mellanox_component_versions/__init__.py new file mode 100644 index 00000000000..b0bace1c1d0 --- /dev/null +++ b/platform/mellanox/platform-utils/mellanox_component_versions/__init__.py @@ -0,0 +1,17 @@ +#!/usr/bin/env python3 +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# diff --git a/platform/mellanox/platform-utils/mellanox_component_versions/main.py b/platform/mellanox/platform-utils/mellanox_component_versions/main.py new file mode 100644 index 00000000000..c09b34e1a81 --- /dev/null +++ b/platform/mellanox/platform-utils/mellanox_component_versions/main.py @@ -0,0 +1,231 @@ +#!/usr/bin/env python3 +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +import functools +import os +import re +import shlex +import subprocess +import xml.etree.ElementTree as ET +from dataclasses import dataclass +from typing import Callable + +from sonic_platform.device_data import DeviceDataManager +from tabulate import tabulate + +COMPONENT_VERSIONS_FILE = "/etc/mlnx/component-versions" +HEADERS = ["COMPONENT", "COMPILATION", "ACTUAL"] + + +def parse_fw_version(output: str, platform: str) -> list[str]: + try: + versions = [] + root = ET.fromstring(output) + devices = filter(lambda x: platform in x.get('type'), root.findall('.//Device')) + devices = sorted(devices, key=lambda x: x.get("pciName")) + + for device in devices: + fw_elem = device.find('.//Versions/FW_Running') + if fw_elem is None: + fw_elem = device.find('.//Versions/FW') + versions.append(fw_elem.get('current')) + return versions + except ET.ParseError: + return ["N/A"] + + +def parse_fw_version_sw(output: str) -> list[str]: + return parse_fw_version(output, "Spectrum") + + +def parse_fw_version_dpu(output: str) -> list[str]: + return parse_fw_version(output, "BlueField") + + +@dataclass +class ComponentRule: + deb_package: str | None = None + cmd: str = "" + regex: str | None = None + is_from_syncd: bool = False + fn: Callable[[str], list[str]] | None = None + + +COMPONENT_RULES_SW = { + "MFT": ComponentRule(deb_package="mft"), + "HW_MANAGEMENT": ComponentRule(deb_package="hw-management", regex=r".*1\.mlnx\.([0-9.]*)"), + "SDK": ComponentRule(deb_package="sys-sdk-main", regex=r".*1\.mlnx\.([0-9.]*)", is_from_syncd=True), + "SAI": ComponentRule(deb_package="mlnx-sai", regex=r".*1\.mlnx\.([A-Za-z0-9.]*)", is_from_syncd=True), + "SAI_API_HEADERS": ComponentRule(cmd="dpkg -s mlnx-sai", regex="X-Sai-Headers-Version: ([0-9.]+)", is_from_syncd=True), + "FW": ComponentRule(cmd="mlxfwmanager --query --query-format xml", regex=r"[0-9]{2}[\._]([0-9._-]*)", fn=parse_fw_version_sw), + "KERNEL": ComponentRule(cmd="uname -r", regex=r"(.*)-[a-z0-9]+$"), + "RSHIM": ComponentRule(deb_package="rshim"), +} + + +COMPONENT_RULES_DPU = { + "MFT": ComponentRule(deb_package="mft"), + "SDK": ComponentRule(deb_package="sdn-appliance", is_from_syncd=True), + "SAI": ComponentRule(deb_package="mlnx-sai", regex=r".*1\.mlnx\.([A-Za-z0-9.]*)", is_from_syncd=True), + "SAI_API_HEADERS": ComponentRule(cmd="dpkg -s mlnx-sai", regex="X-Sai-Headers-Version: ([0-9.]+)", is_from_syncd=True), + "FW": ComponentRule(cmd="mlxfwmanager --query --query-format xml", regex=r"[0-9]{2}[\._]([0-9._-]*)", fn=parse_fw_version_dpu), + "KERNEL": ComponentRule(cmd="uname -r", regex=r"(.*)-[a-z0-9]+$"), + "BFSOC": ComponentRule(deb_package="mlxbf-bootimages"), +} + + +UNAVAILABLE_PLATFORM_VERSIONS = { + "ONIE": "N/A", + "SSD": "N/A", + "BIOS": "N/A", + "CPLD": "N/A" +} + + +@functools.cache +def get_asic_type(): + from sonic_py_common import device_info + return device_info.get_sonic_version_info().get('asic_type') + + +@functools.cache +def get_component_rules(): + return COMPONENT_RULES_SW if get_asic_type() == "mellanox" else COMPONENT_RULES_DPU + + +def process_rule(rule: ComponentRule) -> tuple[bool, str | list[str]]: + asic_count = DeviceDataManager.get_asic_count() if get_asic_type() == "mellanox" else 1 + + cmd = rule.cmd + if rule.deb_package: + cmd = "dpkg-query -W -f='${Version}' " + rule.deb_package + + versions = [] + cmd_args = shlex.split(cmd) + if asic_count > 1 and rule.is_from_syncd: + for asic in range(asic_count): + asic_cmd = ["docker", "exec", "-it", f"syncd{asic}"] + cmd_args + version = subprocess.run(asic_cmd, shell=False, stdout=subprocess.PIPE, text=True).stdout + versions.append(version) + else: + if rule.is_from_syncd: + run_cmd = ["docker", "exec", "-it", "syncd"] + cmd_args + else: + run_cmd = cmd_args + version = subprocess.run(run_cmd, shell=False, stdout=subprocess.PIPE, text=True).stdout + versions = [version] + + if rule.fn: + if len(versions) != 1: + print(f"Error: expecting a single input for {rule.deb_package} parsing, got {len(versions)} outputs") + return True, ["N/A"] + versions = rule.fn(versions[0]) + + if rule.regex: + versions[:] = [re.search(rule.regex, version).group(1) for version in versions] + + if len(set(versions)) == 1: + return True, versions[0] + return False, versions + + +def parse_compiled_components_file(): + rules = get_component_rules() + compiled_versions = {comp: "N/A" for comp in list(rules.keys()) + ["SIMX"]} + + if not os.path.exists(COMPONENT_VERSIONS_FILE): + return compiled_versions + + with open(COMPONENT_VERSIONS_FILE, 'r') as component_versions: + for line in component_versions.readlines(): + try: + comp, version = line.split() + compiled_versions[comp] = version + except ValueError: + continue + + return compiled_versions + + +def get_pdp(): + from fwutil.lib import PlatformDataProvider + return PlatformDataProvider() + + +def get_platform_component_versions(): + pdp = get_pdp() + chassis_name = pdp.chassis.get_name() + versions_map = pdp.chassis_component_map.get(chassis_name, {}) + + if not versions_map or len(versions_map) == 0: + return UNAVAILABLE_PLATFORM_VERSIONS + + platform_versions = {} + for component_name, component in versions_map.items(): + platform_versions[component_name] = component.get_firmware_version() + + return platform_versions + + +def get_current_version(comp: str) -> tuple[bool, str | list[str]]: + try: + return process_rule(get_component_rules()[comp]) + except Exception: + return True, "N/A" + + +def format_output_table(table): + return tabulate(table, HEADERS) + + +def main(): + + if os.getuid() != 0: + print("Error: Root privileges are required") + return + + compiled_versions = parse_compiled_components_file() + simx_compiled_ver = compiled_versions.pop("SIMX") + + # Add compiled versions to table + output_table = [] + for comp in compiled_versions.keys(): + unique, versions = get_current_version(comp) + if unique: + output_table.append([comp, compiled_versions[comp], versions]) + else: + for idx, v in enumerate(versions): + output_table.append([f"{comp} ASIC{idx}", compiled_versions[comp], v]) + + # Handle if SIMX + if hasattr(DeviceDataManager, "is_simx_platform") and DeviceDataManager.is_simx_platform(): + simx_actual_ver = DeviceDataManager.get_simx_version() + output_table.append(["SIMX", simx_compiled_ver, simx_actual_ver]) + platform_versions = UNAVAILABLE_PLATFORM_VERSIONS + else: + platform_versions = get_platform_component_versions() + + # Add actual versions to table + for comp in platform_versions.keys(): + output_table.append([comp, "-", platform_versions[comp]]) + + print(format_output_table(output_table)) + + +if __name__ == "__main__": + main() diff --git a/platform/mellanox/fw-manager/mellanox_fw_manager/__init__.py b/platform/mellanox/platform-utils/mellanox_fw_manager/__init__.py similarity index 100% rename from platform/mellanox/fw-manager/mellanox_fw_manager/__init__.py rename to platform/mellanox/platform-utils/mellanox_fw_manager/__init__.py diff --git a/platform/mellanox/fw-manager/mellanox_fw_manager/asic_manager.py b/platform/mellanox/platform-utils/mellanox_fw_manager/asic_manager.py similarity index 100% rename from platform/mellanox/fw-manager/mellanox_fw_manager/asic_manager.py rename to platform/mellanox/platform-utils/mellanox_fw_manager/asic_manager.py diff --git a/platform/mellanox/fw-manager/mellanox_fw_manager/bluefield_manager.py b/platform/mellanox/platform-utils/mellanox_fw_manager/bluefield_manager.py similarity index 100% rename from platform/mellanox/fw-manager/mellanox_fw_manager/bluefield_manager.py rename to platform/mellanox/platform-utils/mellanox_fw_manager/bluefield_manager.py diff --git a/platform/mellanox/fw-manager/mellanox_fw_manager/firmware_base.py b/platform/mellanox/platform-utils/mellanox_fw_manager/firmware_base.py similarity index 84% rename from platform/mellanox/fw-manager/mellanox_fw_manager/firmware_base.py rename to platform/mellanox/platform-utils/mellanox_fw_manager/firmware_base.py index 857dfa9e76a..4880b383bc5 100644 --- a/platform/mellanox/fw-manager/mellanox_fw_manager/firmware_base.py +++ b/platform/mellanox/platform-utils/mellanox_fw_manager/firmware_base.py @@ -263,38 +263,74 @@ def _query_firmware_versions(self) -> Tuple[str, str]: FirmwareManagerError: If query fails or versions cannot be retrieved """ cmd = ['mlxfwmanager', '--query-format', 'XML', '-d', self.pci_id] - result = self._run_command(cmd, capture_output=True, text=True) - if result.returncode != 0: - raise FirmwareManagerError("Query returned non-zero exit code") + env = self._get_env() + result = self._run_command(cmd, env=env, capture_output=True, text=True) + + output = result.stdout or '' + error_output = result.stderr or '' + stderr_suffix = f", stderr={error_output}" if error_output else "" - root = ET.fromstring(result.stdout) + if result.returncode != 0: + raise FirmwareManagerError( + f"Query returned non-zero exit code: stdout={output}{stderr_suffix}") + + # Extract XML block from potentially verbose debug output + xml_start = output.find('') + xml_end = output.find('') + if xml_start < 0 or xml_end < 0: + raise FirmwareManagerError( + f"No XML device data found in query output: stdout={output}{stderr_suffix}") + + xml_str = output[xml_start:xml_end + len('')] + root = ET.fromstring(xml_str) current_version = root.find('.//Device/Versions/FW').get('current') psid = root.find('.//Device').get('psid') - if not current_version or not psid: - raise FirmwareManagerError("Version or PSID not found in response") + if not current_version or current_version == '--' or not psid: + raise FirmwareManagerError( + f"Version or PSID not found in response: stdout={output}{stderr_suffix}") available_version = self._get_available_firmware_version(psid) return current_version, available_version def _get_firmware_versions(self) -> Tuple[Optional[str], Optional[str]]: - """Get current and available firmware versions with retry logic.""" - query_retry_count = 0 - query_retry_count_max = 10 - - while query_retry_count < query_retry_count_max: + """Get current and available firmware versions with exponential back off retry.""" + max_wait = 60 + delay = 1 + max_delay = 16 + start_time = time.monotonic() + attempt = 0 + + while True: + attempt += 1 try: return self._query_firmware_versions() except Exception as e: - if query_retry_count >= query_retry_count_max - 1: - self.logger.error(f"Failed to get firmware versions after {query_retry_count_max} attempts: {str(e)}") + elapsed = time.monotonic() - start_time + remaining = max_wait - elapsed + + if remaining <= 0: + self.logger.error( + f"Failed to get firmware versions for {self.pci_id} " + f"after {attempt} attempts ({elapsed:.0f}s elapsed): {str(e)}" + ) return None, None - self.logger.info(f"Unable to get firmware versions (attempt {query_retry_count + 1}/{query_retry_count_max}): {str(e)}, retrying...") - query_retry_count += 1 - time.sleep(1) + sleep_time = min(delay, remaining) + error_str = str(e) + + if 'rc = 523' in error_str: + prefix = f"ASIC not ready for {self.pci_id} (rc=523)" + else: + prefix = f"Unable to get firmware versions for {self.pci_id} (attempt {attempt})" + + self.logger.info( + f"{prefix}: {error_str} " + f"(retrying in {sleep_time:.0f}s, {remaining:.0f}s remaining)" + ) - return None, None + time.sleep(sleep_time) + delay = min(delay * 2, max_delay) @abstractmethod def _get_available_firmware_version(self, psid: str) -> Optional[str]: diff --git a/platform/mellanox/fw-manager/mellanox_fw_manager/firmware_coordinator.py b/platform/mellanox/platform-utils/mellanox_fw_manager/firmware_coordinator.py similarity index 85% rename from platform/mellanox/fw-manager/mellanox_fw_manager/firmware_coordinator.py rename to platform/mellanox/platform-utils/mellanox_fw_manager/firmware_coordinator.py index 5fd3f5beef8..d91c8e9b94a 100644 --- a/platform/mellanox/fw-manager/mellanox_fw_manager/firmware_coordinator.py +++ b/platform/mellanox/platform-utils/mellanox_fw_manager/firmware_coordinator.py @@ -40,7 +40,8 @@ class FirmwareCoordinator: """Main coordinator class that manages multiple ASIC firmware processes.""" - def __init__(self, verbose: bool = False, from_image: bool = False, clear_semaphore: bool = False): + def __init__(self, verbose: bool = False, from_image: bool = False, clear_semaphore: bool = False, + ignore_mst_start_failure: bool = False): """ Initialize the firmware coordinator. @@ -52,6 +53,7 @@ def __init__(self, verbose: bool = False, from_image: bool = False, clear_semaph self.verbose = verbose self.from_image = from_image self.clear_semaphore = clear_semaphore + self.ignore_mst_start_failure = ignore_mst_start_failure self.logger = logging.getLogger() try: @@ -98,14 +100,58 @@ def __init__(self, verbose: bool = False, from_image: bool = False, clear_semaph self.logger.info(f"Initialized firmware coordinator with {len(self.managers)} ASIC(s) and image from {self.fw_bin_path}") + def _start_mst(self) -> bool: + """ + Start the MST driver. + + Returns: + True if MST was successfully started, False if startup failed and + ignore_mst_start_failure is set. + + Raises: + FirmwareManagerError: If MST start fails and ignore_mst_start_failure is False. + """ + self.logger.info("Starting MST with i2cdev") + result = run_command(['/usr/bin/mst', 'start', '--with_i2cdev'], + logger=self.logger, capture_output=True, text=True) + if result.returncode != 0: + msg = f"MST start failed (rc={result.returncode}): {result.stderr}" + if self.ignore_mst_start_failure: + self.logger.warning(f"{msg} - continuing (ignore-mst-start-failure set)") + return False + raise FirmwareManagerError(msg) + return True + + def _stop_mst(self) -> None: + """Stop the MST driver. Logs errors but does not raise.""" + self.logger.info("Stopping MST service") + result = run_command(['/usr/bin/mst', 'stop'], + logger=self.logger, capture_output=True, text=True) + if result.returncode != 0: + self.logger.warning(f"MST stop failed (rc={result.returncode}): {result.stderr}") + def upgrade_firmware(self) -> None: """ Upgrade firmware for all ASICs using separate processes. + Starts the MST driver before upgrading and stops it on exit (whether + successful or not). MST start failure aborts the upgrade unless + ignore_mst_start_failure is set. + Raises: + FirmwareManagerError: If MST start fails and ignore_mst_start_failure is False. FirmwareUpgradeError: If all ASIC upgrades fail FirmwareUpgradePartialError: If some ASIC upgrades fail """ + mst_started = self._start_mst() + try: + self._upgrade_firmware_impl() + finally: + if mst_started: + self._stop_mst() + + def _upgrade_firmware_impl(self) -> None: + """Internal upgrade implementation, called after MST has been started.""" num_asics = len(self.managers) self.logger.info(f"Starting firmware upgrade for {num_asics} ASIC(s) from {self.fw_bin_path}") diff --git a/platform/mellanox/fw-manager/mellanox_fw_manager/fw_manager.py b/platform/mellanox/platform-utils/mellanox_fw_manager/fw_manager.py similarity index 100% rename from platform/mellanox/fw-manager/mellanox_fw_manager/fw_manager.py rename to platform/mellanox/platform-utils/mellanox_fw_manager/fw_manager.py diff --git a/platform/mellanox/platform-utils/mellanox_fw_manager/main.py b/platform/mellanox/platform-utils/mellanox_fw_manager/main.py new file mode 100644 index 00000000000..32ca9686166 --- /dev/null +++ b/platform/mellanox/platform-utils/mellanox_fw_manager/main.py @@ -0,0 +1,349 @@ +#!/usr/bin/env python3 +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +""" +Command Line Interface for Mellanox Firmware Manager + +Provides a command-line interface for firmware upgrade operations. +""" + +import sys +import logging +import logging.handlers +import fcntl +import subprocess +from contextlib import contextmanager +import click +from .fw_manager import create_firmware_manager, EXIT_SUCCESS, EXIT_FAILURE, FW_UPGRADE_IS_REQUIRED, FirmwareManagerError, FirmwareUpgradeError, FirmwareUpgradePartialError +from .firmware_coordinator import FirmwareCoordinator +from .platform_utils import run_command + +logger = None + + +def setup_logging(verbose: bool = False, nosyslog: bool = False): + """Setup global logging configuration with syslog.""" + global logger + + level = logging.DEBUG if verbose else logging.INFO + + logger = logging.getLogger() + logger.setLevel(level) + + logger.handlers.clear() + + if not nosyslog: + syslog_handler = logging.handlers.SysLogHandler(address='/dev/log') + syslog_handler.setLevel(level) + + formatter = logging.Formatter('mellanox-fw-manager[%(process)d]: %(levelname)s - %(message)s') + syslog_handler.setFormatter(formatter) + + logger.addHandler(syslog_handler) + + if verbose or nosyslog: + console_handler = logging.StreamHandler() + console_handler.setLevel(level) + console_formatter = logging.Formatter('%(asctime)s - %(name)s - %(levelname)s - %(message)s') + console_handler.setFormatter(console_formatter) + logger.addHandler(console_handler) + + +def _exit_if_qemu() -> None: + """ + Exit if running on QEMU/SimX platform (matches shell script ExitIfQEMU). + + Raises: + SystemExit: If QEMU platform is detected + """ + try: + cmd = ['lspci', '-vvv'] + result = run_command(cmd, logger=logger, capture_output=True, text=True) + if result.returncode == 0 and 'SimX' in result.stdout: + print("No FW upgrade for SimX platform") + sys.exit(EXIT_SUCCESS) + except Exception as e: + logger.warning(f"Failed to check for QEMU platform: {e}") + + +@contextmanager +def _lock_state_change(): + """ + Context manager for file locking (matches shell script LockStateChange/UnlockStateChange). + """ + lock_file = "/tmp/mlxfwmanager-lock" + lock_fd = None + + try: + logger.info(f"Locking {lock_file} from CLI") + lock_fd = open(lock_file, 'w') + fcntl.flock(lock_fd.fileno(), fcntl.LOCK_EX) + logger.info(f"Locked {lock_file} from CLI") + yield lock_fd + except Exception as e: + logger.error(f"Failed to acquire lock: {e}") + raise FirmwareManagerError(f"Failed to acquire lock: {e}") + finally: + if lock_fd: + try: + logger.info(f"Unlocking {lock_file} from CLI") + fcntl.flock(lock_fd.fileno(), fcntl.LOCK_UN) + lock_fd.close() + except Exception as e: + logger.warning(f"Failed to unlock: {e}") + + +def handle_status(asic_id_arg: str, verbose: bool, upgrade: bool) -> int: + """ + Handle firmware status check - reports if firmware version matches. + + Args: + asic_id_arg: ASIC ID, "all", or "__flag__" (when used as flag) + verbose: Enable verbose logging + upgrade: Use firmware from next SONiC image + + Returns: + Exit code + """ + try: + fw_coordinator = FirmwareCoordinator(verbose=verbose, from_image=upgrade) + num_asics = fw_coordinator.get_asic_count() + + # Handle flag mode for single-ASIC systems + if asic_id_arg == '__flag__': + if num_asics == 1: + asic_id_arg = '0' + else: + print(f"Error: Multi-ASIC system detected ({num_asics} ASICs).") + print("Usage: mlnx-fw-manager --status ") + print("Example: mlnx-fw-manager --status all") + return EXIT_FAILURE + + # Determine which ASICs to check + if asic_id_arg.lower() == 'all': + managers_to_check = fw_coordinator.managers + print(f"Firmware Status Report ({num_asics} ASIC(s)):") + else: + try: + asic_id = int(asic_id_arg) + if asic_id >= num_asics: + print(f"Error: ASIC {asic_id} not found. System has {num_asics} ASIC(s).") + return EXIT_FAILURE + managers_to_check = [fw_coordinator.managers[asic_id]] + print(f"Firmware Status Report (ASIC {asic_id}):") + except ValueError: + print(f"Error: Invalid ASIC ID '{asic_id_arg}'. Use a number or 'all'.") + return EXIT_FAILURE + + upgrade_needed_asics = [] + up_to_date_asics = [] + error_asics = [] + + for manager in managers_to_check: + try: + is_needed = manager.is_upgrade_required() + if is_needed: + upgrade_needed_asics.append(manager.asic_index) + print(f"ASIC {manager.asic_index}: Upgrade needed") + else: + up_to_date_asics.append(manager.asic_index) + print(f"ASIC {manager.asic_index}: Up to date") + except Exception as e: + error_asics.append(manager.asic_index) + print(f"ASIC {manager.asic_index}: Error checking status - {e}") + + print(f"Summary: {len(up_to_date_asics)} up to date, " + f"{len(upgrade_needed_asics)} need upgrade, " + f"{len(error_asics)} errors") + + if upgrade_needed_asics or error_asics: + return FW_UPGRADE_IS_REQUIRED + return EXIT_SUCCESS + + except Exception as e: + print(f"Status check failed: {e}") + return EXIT_FAILURE + + +def handle_reset(verbose: bool) -> int: + """ + Handle firmware configuration reset. + + Args: + verbose: Enable verbose logging + + Returns: + Exit code + """ + try: + fw_coordinator = FirmwareCoordinator(verbose=verbose) + fw_coordinator.reset_firmware_config() + print("Firmware configuration reset completed successfully.") + return EXIT_SUCCESS + except Exception as e: + print(f"Firmware reset failed: {e}") + return EXIT_FAILURE + + +def handle_dry_run(verbose: bool, upgrade: bool) -> int: + """ + Handle dry-run (check if firmware upgrade is required). + + Args: + verbose: Enable verbose logging + upgrade: Use firmware from next SONiC image + + Returns: + Exit code + """ + try: + fw_coordinator = FirmwareCoordinator(verbose=verbose, from_image=upgrade) + if fw_coordinator.check_upgrade_required(): + print("Firmware upgrade is required.") + logger.info(f"Dry-run check: upgrade required, exiting with {FW_UPGRADE_IS_REQUIRED}") + return FW_UPGRADE_IS_REQUIRED + else: + print("Firmware is up to date.") + logger.info(f"Dry-run check: up to date, exiting with {EXIT_SUCCESS}") + return EXIT_SUCCESS + except Exception as e: + print(f"Firmware check failed: {e}") + logger.error(f"Dry-run check failed, exiting with {EXIT_FAILURE}") + return EXIT_FAILURE + + +def handle_upgrade(verbose: bool, upgrade: bool, clear_semaphore: bool, + ignore_mst_start_failure: bool = False) -> int: + """ + Handle firmware upgrade operation. + + Args: + verbose: Enable verbose logging + upgrade: Use firmware from next SONiC image + clear_semaphore: Clear hardware semaphore before upgrade + ignore_mst_start_failure: Continue upgrade even if MST driver fails to start + + Returns: + Exit code + """ + try: + fw_coordinator = FirmwareCoordinator( + verbose=verbose, + from_image=upgrade, + clear_semaphore=clear_semaphore, + ignore_mst_start_failure=ignore_mst_start_failure + ) + + if not fw_coordinator.check_upgrade_required(): + print("Firmware is up to date.") + logger.info(f"Upgrade check: up to date, exiting with {EXIT_SUCCESS}") + return EXIT_SUCCESS + else: + fw_coordinator.upgrade_firmware() + print("Firmware upgrade completed successfully.") + logger.info(f"Upgrade completed successfully, exiting with {EXIT_SUCCESS}") + return EXIT_SUCCESS + + except FirmwareUpgradeError as e: + print(f"Firmware upgrade failed: {e}") + return EXIT_FAILURE + except FirmwareUpgradePartialError as e: + print(f"Firmware upgrade partially failed: {e}") + return EXIT_SUCCESS + except Exception as e: + print(f"Firmware upgrade failed: {e}") + return EXIT_FAILURE + + +@click.command(context_settings={'help_option_names': ['-h', '--help'], 'max_content_width': 120}) +@click.option('-u', '--upgrade', is_flag=True, + help='Upgrade ASIC firmware using next boot image (useful after SONiC-To-SONiC update)') +@click.option('-v', '--verbose', is_flag=True, + help='Verbose mode (enabled when -u|--upgrade)') +@click.option('-d', '--dry-run', is_flag=True, + help='Compare the FW versions without installation. Return code "0" means the FW is up-to-date, return code "10" means an upgrade is required, otherwise an error is detected.') +@click.option('-c', '--clear-semaphore', is_flag=True, + help='Clear hw semaphore before firmware upgrade') +@click.option('-r', '--reset', is_flag=True, + help='Reset firmware configuration (NVIDIA BlueField platform only)') +@click.option('-m', '--ignore-mst-start-failure', is_flag=True, + help='Continue firmware upgrade even if MST driver fails to start ' + '(useful on SmartSwitch when DPUs are powered off)') +@click.option('--nosyslog', is_flag=True, + help='Disable syslog and log to console only') +@click.option('--status', 'status', type=str, default=None, is_flag=False, flag_value='__flag__', metavar='[ASIC_ID|all]', + help='Show firmware version status. Single-ASIC: use as flag. Multi-ASIC: specify ASIC ID or "all".') +def main(upgrade, verbose, dry_run, clear_semaphore, reset, ignore_mst_start_failure, nosyslog, status): + """ + Mellanox Firmware Manager + + Usage: ./mlnx-fw-upgrade [OPTIONS] + + OPTIONS: + -u, --upgrade Upgrade ASIC firmware using next boot image (useful after SONiC-To-SONiC update) + -v, --verbose Verbose mode (enabled when -u|--upgrade) + -d, --dry-run Compare the FW versions without installation. Return code "0" means the FW is up-to-date, return code "10" means an upgrade is required, otherwise an error is detected. + -c, --clear-semaphore Clear hw semaphore before firmware upgrade + -r, --reset Reset firmware configuration (NVIDIA BlueField platform only) + --status [ASIC_ID|all] Show firmware version status + Single-ASIC: use as flag (no argument) + Multi-ASIC: specify ASIC ID or "all" + --nosyslog Disable syslog and log to console only + -h, --help Print help + + Examples: + ./mlnx-fw-upgrade --verbose + ./mlnx-fw-upgrade --upgrade + ./mlnx-fw-upgrade --reset + ./mlnx-fw-upgrade --clear-semaphore --upgrade + + # Single-ASIC system: + ./mlnx-fw-upgrade --status # Check firmware status + + # Multi-ASIC system: + ./mlnx-fw-upgrade --status all # Check all ASICs + ./mlnx-fw-upgrade --status 0 # Check ASIC 0 + ./mlnx-fw-upgrade --status 0 --upgrade # Check ASIC 0 against next image + + ./mlnx-fw-upgrade --help + """ + setup_logging(verbose, nosyslog) + + logger.info("Mellanox Firmware Manager started") + + _exit_if_qemu() + + if status is not None: + exit_code = handle_status(status, verbose, upgrade) + logger.info(f"Mellanox Firmware Manager finished with exit code {exit_code}") + sys.exit(exit_code) + + with _lock_state_change(): + if reset: + exit_code = handle_reset(verbose) + elif dry_run: + exit_code = handle_dry_run(verbose, upgrade) + else: + exit_code = handle_upgrade(verbose, upgrade, clear_semaphore, ignore_mst_start_failure) + + logger.info(f"Mellanox Firmware Manager finished with exit code {exit_code}") + sys.exit(exit_code) + + +if __name__ == '__main__': + main() diff --git a/platform/mellanox/fw-manager/mellanox_fw_manager/platform_utils.py b/platform/mellanox/platform-utils/mellanox_fw_manager/platform_utils.py similarity index 100% rename from platform/mellanox/fw-manager/mellanox_fw_manager/platform_utils.py rename to platform/mellanox/platform-utils/mellanox_fw_manager/platform_utils.py diff --git a/platform/mellanox/platform-utils/mellanox_fw_manager/spectrum_manager.py b/platform/mellanox/platform-utils/mellanox_fw_manager/spectrum_manager.py new file mode 100644 index 00000000000..acb8f8c15b9 --- /dev/null +++ b/platform/mellanox/platform-utils/mellanox_fw_manager/spectrum_manager.py @@ -0,0 +1,138 @@ +#!/usr/bin/env python3 +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +""" +Spectrum ASIC firmware manager implementation. + +Handles firmware operations specific to Spectrum ASICs using mlxfwmanager. +""" + +import re +import subprocess +from typing import Dict, Optional +from .firmware_base import FirmwareManagerBase, FW_ALREADY_UPDATED_FAILURE + + +class SpectrumFirmwareManager(FirmwareManagerBase): + """Firmware manager for Spectrum ASICs.""" + + # PCI ID to ASIC type mapping for Spectrum devices + ASIC_TYPE_MAP = { + '15b3:cb84': 'SPC', + '15b3:cf6c': 'SPC2', + '15b3:cf70': 'SPC3', + '15b3:cf80': 'SPC4', + '15b3:cf82': 'SPC5', + } + + _ANSI_ESCAPE_RE = re.compile(r'\x1b\[[0-9;]*[A-Za-z]|[\x08\r]') + _MLXFW_ERR_RE = re.compile( + r'^\s*Fail\s*:|^\s*-[EW]-|MCC\s+(?:ERROR|FAIL)|\bFAIL(?:ED|URE|S)?\b|\bERROR\b', + re.IGNORECASE, + ) + _MLXFW_NOISE_RE = re.compile( + r'^\s*(user/.*\.(?:cpp|c|h):\d+|\[FLASH_ACCESS_DEBUG\]|-D-|controlFsm\s*:)', + re.IGNORECASE, + ) + + @classmethod + def get_asic_type_map(cls) -> Dict[str, str]: + """ + Get the PCI ID to ASIC type mapping for Spectrum devices. + + Returns: + Dictionary mapping PCI IDs to ASIC types + """ + return cls.ASIC_TYPE_MAP + + def _get_mst_device_type(self) -> str: + """Get MST device type for Spectrum ASICs.""" + return "Spectrum" + + @classmethod + def _mlxfwmanager_detail(cls, result: subprocess.CompletedProcess, max_len: int = 1024) -> str: + """Extract a syslog-safe error string from an mlxfwmanager result.""" + stderr = cls._ANSI_ESCAPE_RE.sub('', (result.stderr or "")).strip() + if stderr: + return stderr + + stdout = cls._ANSI_ESCAPE_RE.sub('', (result.stdout or "")).strip() + if not stdout: + return "" + + seen, picked = set(), [] + for line in stdout.splitlines(): + line = line.strip() + if not line or line in seen or cls._MLXFW_NOISE_RE.search(line): + continue + if cls._MLXFW_ERR_RE.search(line): + seen.add(line) + picked.append(line) + + if picked: + detail = " | ".join(picked) + return detail if len(detail) <= max_len else detail[:max_len].rstrip() + " ...[truncated]" + return stdout if len(stdout) <= max_len else "...[truncated]" + stdout[-max_len:] + + def _get_available_firmware_version(self, psid: str) -> Optional[str]: + """Get available firmware version for Spectrum ASICs using mlxfwmanager.""" + try: + cmd = ['mlxfwmanager', '--list-content', '-i', self.fw_file, '-d', self.pci_id] + result = self._run_command(cmd, capture_output=True, text=True) + if result.returncode != 0: + self.logger.error(f"Failed to get available firmware version for Spectrum ASICs using mlxfwmanager: {result.returncode}") + return None + + lines = result.stdout.strip().split('\n') + for line in lines: + if psid in line: + parts = line.split() + if len(parts) >= 4: + return parts[3] + + self.logger.error(f"No firmware version found for PSID {psid} in mlxfwmanager output") + return None + except Exception as e: + self.logger.error(f"Failed to get available firmware version for Spectrum ASICs using mlxfwmanager: {e}") + return None + + def run_firmware_update(self) -> bool: + """Run the actual firmware update command for Spectrum ASICs.""" + try: + cmd = ['mlxfwmanager', '-u', '-f', '-y', '-d', self.pci_id, '-i', self.fw_file] + env = self._get_env() + + result = self._run_command(cmd, env=env, capture_output=True, text=True) + + if result.returncode == FW_ALREADY_UPDATED_FAILURE: + self.logger.info("FW reactivation is required. Reactivating and updating FW ...") + reactivate_cmd = ['flint', '-d', self.pci_id, 'ir'] + reactivate_result = self._run_command(reactivate_cmd, capture_output=True, text=True) + if reactivate_result.returncode != 0: + self.logger.warning(f"FW reactivation failed with return code {reactivate_result.returncode}: {reactivate_result.stderr}") + + result = self._run_command(cmd, env=env, capture_output=True, text=True) + + if result.returncode != 0: + self.logger.error(f"Failed to update firmware for Spectrum ASICs with return code {result.returncode}: {self._mlxfwmanager_detail(result)}") + return False + + return True + except Exception as e: + self.logger.error(f"Failed to run firmware update for Spectrum ASICs: {e}") + return False diff --git a/platform/mellanox/platform-utils/platform-utils.mk b/platform/mellanox/platform-utils/platform-utils.mk new file mode 100644 index 00000000000..225acf662f8 --- /dev/null +++ b/platform/mellanox/platform-utils/platform-utils.mk @@ -0,0 +1,29 @@ +# +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +# Mellanox Platform Utils package + +MELLANOX_PLATFORM_UTILS = mellanox_platform_utils-1.0.0-py3-none-any.whl +$(MELLANOX_PLATFORM_UTILS)_SRC_PATH = $(PLATFORM_PATH)/platform-utils +$(MELLANOX_PLATFORM_UTILS)_DEPENDS = $(SONIC_PLATFORM_API_PY3) $(SONIC_UTILITIES_PY3) +$(MELLANOX_PLATFORM_UTILS)_DEBS_DEPENDS = $(PYTHON3_SWSSCOMMON) + +$(MELLANOX_PLATFORM_UTILS)_PYTHON_VERSION = 3 +SONIC_PYTHON_WHEELS += $(MELLANOX_PLATFORM_UTILS) + +export mellanox_platform_utils_py3_wheel_path="$(addprefix $(PYTHON_WHEELS_PATH)/,$(MELLANOX_PLATFORM_UTILS))" diff --git a/platform/mellanox/platform-utils/pytest.ini b/platform/mellanox/platform-utils/pytest.ini new file mode 100644 index 00000000000..2ca05e5e924 --- /dev/null +++ b/platform/mellanox/platform-utils/pytest.ini @@ -0,0 +1,38 @@ +# +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +[pytest] +testpaths = tests +python_files = test_*.py +python_classes = Test* +python_functions = test_* +pythonpath = . +addopts = + -v + --tb=short + --strict-markers + --disable-warnings + --import-mode=importlib + --cov=mellanox_fw_manager + --cov=mellanox_bfb_installer + --cov-report=term-missing + --cov-report=xml + --cov-report=html +markers = + unit: Unit tests + integration: Integration tests diff --git a/platform/mellanox/platform-utils/setup.py b/platform/mellanox/platform-utils/setup.py new file mode 100644 index 00000000000..12eec8884cb --- /dev/null +++ b/platform/mellanox/platform-utils/setup.py @@ -0,0 +1,83 @@ +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +""" +Setup script for Mellanox Firmware Manager package. +""" + +import os +from setuptools import setup +import sys + + +platform = os.environ.get("CONFIGURED_PLATFORM", None) +platform = platform.lower() if platform else platform +if platform is None: + sys.stderr.write("CONFIGURED_PLATFORM environment variable is not set") + sys.exit(1) +if not platform in ("mellanox", "nvidia-bluefield"): + sys.stderr.write(f"Invalid CONFIGURED_PLATFORM: \"{platform}\". Expected \"mellanox\" or \"nvidia-bluefield\".") + sys.exit(1) +is_bluefield = platform == "nvidia-bluefield" + + +setup( + name="mellanox-platform-utils", + version="1.0.0", + author="Oleksandr Ivantsiv", + author_email="oivantsiv@nvidia.com", + description="Platform utilities package for Mellanox ASICs", + url="https://github.com/sonic-net/sonic-buildimage", + packages=[ + *([] if is_bluefield else ["mellanox_bfb_installer"]), + "mellanox_component_versions", + "mellanox_fw_manager", + ], + classifiers=[ + "Development Status :: 4 - Beta", + "Intended Audience :: Developers", + "Operating System :: POSIX :: Linux", + "Programming Language :: Python :: 3", + "Programming Language :: Python :: 3.7", + "Programming Language :: Python :: 3.8", + "Programming Language :: Python :: 3.9", + "Topic :: System :: Hardware", + "Topic :: System :: Systems Administration", + ], + python_requires=">=3.10", + install_requires=[ + "tabulate", + "click>=7.0", + ], + extras_require={ + "testing": [ + "pytest>=6.0", + "pytest-cov>=2.10.0", + "pytest-mock>=3.3.0", + ], + }, + test_suite="tests", + entry_points={ + "console_scripts": [ + "mlnx-fw-manager=mellanox_fw_manager.main:main", + "get_component_versions.py=mellanox_component_versions.main:main", + *([] if is_bluefield else ["sonic-bfb-installer=mellanox_bfb_installer.main:main"]), + ], + }, + include_package_data=True, + zip_safe=False, +) diff --git a/platform/mellanox/platform-utils/tests/mellanox_bfb_installer/conftest.py b/platform/mellanox/platform-utils/tests/mellanox_bfb_installer/conftest.py new file mode 100644 index 00000000000..594c44e6d21 --- /dev/null +++ b/platform/mellanox/platform-utils/tests/mellanox_bfb_installer/conftest.py @@ -0,0 +1,50 @@ +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +import os +from pathlib import Path +import pytest + + +platform = os.environ.get("CONFIGURED_PLATFORM", None) +platform = platform.lower() if platform else platform +if platform is None: + raise Exception("CONFIGURED_PLATFORM environment variable is not set") +if not platform in ("mellanox", "nvidia-bluefield"): + raise Exception( + f"Invalid environment variable value for CONFIGURED_PLATFORM: \"{platform}\"." + " Expected \"mellanox\" or \"nvidia-bluefield\"." + ) +is_bluefield = platform == "nvidia-bluefield" + + +def pytest_collection_modifyitems(config, items): + if is_bluefield: + # Skip the bfb installer tests if the platform is nvidia-bluefield. + # That platform is the DPU platform. The dpu-installer is designed to work from the main + # host of a Smart Switch. + conftest_dir = Path(__file__).parent.resolve() + skip_marker = pytest.mark.skip( + reason="Skipping because dpu-installer not supported on nvidia-bluefield platform" + ) + for item in items: + if conftest_dir in item.path.parents: + # Paranoid checks: Don't accidentally skip other tests! Ensure the test to skip + # is in THIS directory. Ensure the platform is nvidia-bluefield. + assert item.path.parts[-2] == conftest_dir.name == "mellanox_bfb_installer" + assert platform == "nvidia-bluefield" + item.add_marker(skip_marker) diff --git a/platform/mellanox/platform-utils/tests/mellanox_bfb_installer/test_bfb_file.py b/platform/mellanox/platform-utils/tests/mellanox_bfb_installer/test_bfb_file.py new file mode 100644 index 00000000000..026d29eb178 --- /dev/null +++ b/platform/mellanox/platform-utils/tests/mellanox_bfb_installer/test_bfb_file.py @@ -0,0 +1,320 @@ +#!/usr/bin/env python3 +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +""" +Unit tests for mellanox_bfb_installer.bfb_file module. +""" + +import os +import shutil +import sys +import tempfile +import unittest +from unittest import mock + +sys.path.insert(0, os.path.abspath(os.path.join(os.path.dirname(__file__), "..", ".."))) + + +class TestBfbFile(unittest.TestCase): + """Tests for bfb_file module.""" + + def test_is_url_true_for_http_and_https(self): + from mellanox_bfb_installer import bfb_file + + self.assertTrue(bfb_file._is_url("http://example.com/file.bfb")) + self.assertTrue(bfb_file._is_url("https://example.com/file.bfb")) + + def test_is_url_false_for_path(self): + from mellanox_bfb_installer import bfb_file + + self.assertFalse(bfb_file._is_url("/path/to/file.bfb")) + self.assertFalse(bfb_file._is_url("file.bfb")) + + def test_maybe_download_bfb_returns_path_when_not_url(self): + from mellanox_bfb_installer import bfb_file + + self.assertEqual( + bfb_file._maybe_download_bfb("/local/file.bfb", "/tmp/work"), + "/local/file.bfb", + ) + + def test_maybe_download_bfb_downloads_when_url(self): + from mellanox_bfb_installer import bfb_file + + mock_log = mock.MagicMock() + with tempfile.TemporaryDirectory() as work_dir: + with ( + mock.patch.object(bfb_file, "logger", mock_log), + mock.patch.object(bfb_file.subprocess, "run") as mock_run, + ): + mock_run.return_value = mock.MagicMock(returncode=0) + out = bfb_file._maybe_download_bfb("https://example.com/image.bfb", work_dir) + self.assertEqual(out, os.path.join(work_dir, bfb_file.DOWNLOAD_FILENAME)) + mock_log.debug.assert_any_call("Detected URL. Downloading file") + mock_run.assert_called_once() + call_args = mock_run.call_args[0][0] + self.assertEqual(call_args, ["curl", "-L", "-o", out, "https://example.com/image.bfb"]) + + def test_maybe_download_bfb_exits_on_curl_failure(self): + from mellanox_bfb_installer import bfb_file + + mock_log = mock.MagicMock() + with tempfile.TemporaryDirectory() as work_dir: + with ( + mock.patch.object(bfb_file, "logger", mock_log), + mock.patch.object(bfb_file.subprocess, "run") as mock_run, + ): + mock_run.return_value = mock.MagicMock(returncode=1) + with self.assertRaises(SystemExit) as ctx: + bfb_file._maybe_download_bfb("https://x/y.bfb", work_dir) + self.assertEqual(ctx.exception.code, 1) + mock_log.error.assert_called_once() + self.assertIn("curl command failed", mock_log.error.call_args[0][0]) + + def test_extract_bfb_raises_when_file_missing(self): + from mellanox_bfb_installer import bfb_file + + mock_log = mock.MagicMock() + with tempfile.TemporaryDirectory() as work_dir: + with mock.patch.object(bfb_file, "logger", mock_log): + with self.assertRaises(SystemExit) as ctx: + bfb_file._extract_bfb("/nonexistent/file.bfb", work_dir) + self.assertEqual(ctx.exception.code, 1) + mock_log.error.assert_called_once() + self.assertIn("BFB file not found", mock_log.error.call_args[0][0]) + + def test_extract_bfb_raises_when_not_tar(self): + from mellanox_bfb_installer import bfb_file + + mock_log = mock.MagicMock() + with tempfile.NamedTemporaryFile(suffix=".bfb", delete=False) as f: + try: + f.write(b"not a tar") + f.flush() + with ( + mock.patch.object(bfb_file, "logger", mock_log), + mock.patch.object(bfb_file.subprocess, "run") as mock_run, + ): + mock_run.return_value = mock.MagicMock(returncode=0, stdout="ASCII text") + with self.assertRaises(SystemExit) as ctx: + bfb_file._extract_bfb(f.name, os.path.dirname(f.name)) + self.assertEqual(ctx.exception.code, 1) + mock_log.error.assert_called() + self.assertIn("not a tar archive", mock_log.error.call_args[0][0]) + finally: + os.unlink(f.name) + + def test_extract_bfb_extracts_and_returns_paths(self): + from mellanox_bfb_installer import bfb_file + + mock_log = mock.MagicMock() + with tempfile.TemporaryDirectory() as work_dir: + bfb_file_path = os.path.join(work_dir, "image.bfb") + with open(bfb_file_path, "wb") as f: + f.write(b"fake tar content") + extracted_path = os.path.join(work_dir, "image.bfb-intermediate") + with open(extracted_path, "w") as f: + f.write("data") + sha_path = extracted_path + ".sha256" + with open(sha_path, "w") as f: + f.write("abc123") + with ( + mock.patch.object(bfb_file, "logger", mock_log), + mock.patch.object(bfb_file.subprocess, "run") as mock_run, + ): + + def run_side_effect(cmd, *args, **kwargs): + if cmd[0] == "file": + return mock.MagicMock(returncode=0, stdout="tar archive\n") + if cmd[0] == "tar": + return mock.MagicMock(returncode=0) + return mock.MagicMock(returncode=1) + + mock_run.side_effect = run_side_effect + bfb_path, checksum_path = bfb_file._extract_bfb(bfb_file_path, work_dir) + self.assertEqual(bfb_path, extracted_path) + self.assertEqual(checksum_path, sha_path) + mock_log.info.assert_any_call("Detected tar archive extracting BFB and SHA256 hash...") + mock_log.info.assert_any_call("Extracted BFB file: %s", extracted_path) + mock_log.info.assert_any_call("Found SHA256 hash file: %s", sha_path) + + def test_validate_bfb_sha256_success(self): + from mellanox_bfb_installer import bfb_file + + mock_log = mock.MagicMock() + with tempfile.NamedTemporaryFile(mode="wb", suffix=".bfb", delete=False) as bfb_f: + content = b"bfb-content" + bfb_f.write(content) + bfb_f.flush() + bfb_path = bfb_f.name + try: + with tempfile.NamedTemporaryFile(mode="w", suffix=".sha256", delete=False) as h_f: + h_f.write("14ddd86eb3a5ba510279e487ae986fa66014cb2ac03af4555a6fd5b4f2936fe8") + h_f.flush() + hash_path = h_f.name + try: + with mock.patch.object(bfb_file, "logger", mock_log): + bfb_file._validate_bfb_sha256(bfb_path, hash_path) + mock_log.info.assert_any_call("Verifying SHA256 checksum...") + mock_log.info.assert_any_call("SHA256 checksum verification successful") + finally: + os.unlink(hash_path) + finally: + os.unlink(bfb_path) + + def test_validate_bfb_sha256_mismatch_exits(self): + from mellanox_bfb_installer import bfb_file + + mock_log = mock.MagicMock() + with tempfile.NamedTemporaryFile(mode="wb", delete=False) as bfb_f: + bfb_f.write(b"content") + bfb_path = bfb_f.name + with tempfile.NamedTemporaryFile(mode="w", delete=False) as h_f: + h_f.write("wrong-hash") + hash_path = h_f.name + try: + with mock.patch.object(bfb_file, "logger", mock_log): + with self.assertRaises(SystemExit) as ctx: + bfb_file._validate_bfb_sha256(bfb_path, hash_path) + self.assertEqual(ctx.exception.code, 1) + mock_log.error.assert_any_call("SHA256 checksum mismatch!") + finally: + os.unlink(bfb_path) + os.unlink(hash_path) + + def test_validate_bfb_sha256_missing_checksum_exits(self): + from mellanox_bfb_installer import bfb_file + + mock_log = mock.MagicMock() + with tempfile.NamedTemporaryFile(delete=False) as bfb_f: + bfb_path = bfb_f.name + try: + with mock.patch.object(bfb_file, "logger", mock_log): + with self.assertRaises(SystemExit) as ctx: + bfb_file._validate_bfb_sha256(bfb_path, "/nonexistent/sha256") + self.assertEqual(ctx.exception.code, 1) + mock_log.error.assert_called() + self.assertIn("SHA256 hash file not found", mock_log.error.call_args[0][0]) + finally: + os.unlink(bfb_path) + + def test_prepare_bfb_skip_extract_returns_path_without_extract_or_validate(self): + """With skip_extract=True, returns maybe_download_bfb result; no extract or validate.""" + from mellanox_bfb_installer import bfb_file + + work_dir = tempfile.mkdtemp() + try: + local_path = os.path.join(work_dir, "local.bfb") + with open(local_path, "w") as f: + f.write("x") + with ( + mock.patch.object( + bfb_file, + "_maybe_download_bfb", + return_value=local_path, + ), + mock.patch.object(bfb_file, "_extract_bfb") as mock_extract, + mock.patch.object( + bfb_file, + "_validate_bfb_sha256", + ) as mock_validate, + ): + result = bfb_file.prepare_bfb(local_path, work_dir, skip_extract=True) + self.assertEqual(result, local_path) + mock_extract.assert_not_called() + mock_validate.assert_not_called() + finally: + shutil.rmtree(work_dir, ignore_errors=True) + + def test_prepare_bfb_full_flow_calls_download_extract_validate(self): + """With skip_extract=False, calls _maybe_download_bfb, _extract_bfb, _validate_bfb_sha256.""" + from mellanox_bfb_installer import bfb_file + + work_dir = tempfile.mkdtemp() + try: + bfb_path = os.path.join(work_dir, "in.bfb") + extracted_path = os.path.join(work_dir, "out.bfb-intermediate") + checksum_path = extracted_path + ".sha256" + with ( + mock.patch.object( + bfb_file, + "_maybe_download_bfb", + return_value=bfb_path, + ) as mock_download, + mock.patch.object( + bfb_file, + "_extract_bfb", + return_value=(extracted_path, checksum_path), + ) as mock_extract, + mock.patch.object( + bfb_file, + "_validate_bfb_sha256", + ) as mock_validate, + ): + result = bfb_file.prepare_bfb(bfb_path, work_dir, skip_extract=False) + self.assertEqual(result, extracted_path) + mock_download.assert_called_once_with(bfb_path, work_dir) + mock_extract.assert_called_once_with(bfb_path, work_dir) + mock_validate.assert_called_once_with(extracted_path, checksum_path) + finally: + shutil.rmtree(work_dir, ignore_errors=True) + + def test_prepare_bfb_reraises_system_exit_from_inner_call(self): + """SystemExit from maybe_download_bfb, extract_bfb, or validate is re-raised.""" + from mellanox_bfb_installer import bfb_file + + work_dir = tempfile.mkdtemp() + try: + with mock.patch.object( + bfb_file, + "_maybe_download_bfb", + side_effect=SystemExit(1337), + ): + with self.assertRaises(SystemExit) as ctx: + bfb_file.prepare_bfb("/some.bfb", work_dir, skip_extract=True) + self.assertEqual(ctx.exception.code, 1337) + finally: + shutil.rmtree(work_dir, ignore_errors=True) + + def test_prepare_bfb_logs_and_exits_on_other_exception(self): + """Other exceptions are logged and converted to SystemExit(1).""" + from mellanox_bfb_installer import bfb_file + + mock_log = mock.MagicMock() + work_dir = tempfile.mkdtemp() + try: + with ( + mock.patch.object(bfb_file, "logger", mock_log), + mock.patch.object( + bfb_file, + "_maybe_download_bfb", + side_effect=RuntimeError("download failed"), + ), + ): + with self.assertRaises(SystemExit) as ctx: + bfb_file.prepare_bfb("http://x/y.bfb", work_dir, skip_extract=True) + self.assertEqual(ctx.exception.code, 1) + mock_log.error.assert_called_once() + self.assertIn("BFB handling failed", mock_log.error.call_args[0][0]) + self.assertIn("download failed", str(mock_log.error.call_args[0][1])) + finally: + shutil.rmtree(work_dir, ignore_errors=True) + + +if __name__ == "__main__": + unittest.main() diff --git a/platform/mellanox/platform-utils/tests/mellanox_bfb_installer/test_bfb_install_core.py b/platform/mellanox/platform-utils/tests/mellanox_bfb_installer/test_bfb_install_core.py new file mode 100644 index 00000000000..a62060a59d9 --- /dev/null +++ b/platform/mellanox/platform-utils/tests/mellanox_bfb_installer/test_bfb_install_core.py @@ -0,0 +1,412 @@ +#!/usr/bin/env python3 +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +""" +Unit tests for mellanox_bfb_installer.bfb_install_core module. +""" + +import os +import shutil +import sys +import tempfile +import unittest +from unittest import mock + +sys.path.insert(0, os.path.abspath(os.path.join(os.path.dirname(__file__), "..", ".."))) + +from mellanox_bfb_installer import install_executor # noqa: E402 + + +class TestBfBInstallCore(unittest.TestCase): + """Tests for bfb_install_core module.""" + + def test_run_bfb_install_success_logs_and_returns_zero(self): + from mellanox_bfb_installer import bfb_install_core + + mock_log = mock.MagicMock() + with tempfile.NamedTemporaryFile(mode="w", suffix=".result", delete=False) as f: + result_path = f.name + try: + mock_proc = mock.MagicMock() + mock_proc.stdout = iter(["line1\n", "line2\n"]) + mock_proc.poll = mock.MagicMock(side_effect=[None, None, 0]) + mock_proc.returncode = 0 + with ( + mock.patch.object(bfb_install_core, "logger", mock_log), + mock.patch.object(bfb_install_core.subprocess, "Popen", return_value=mock_proc), + mock.patch.object(bfb_install_core.time, "sleep"), + mock.patch("sys.stdout"), + ): + status = bfb_install_core._run_bfb_install_image_delivery( + rshim="rshim0", + rshim_id="0", + bfb_path="/path/to.bfb", + result_file_path=result_path, + child_pids=install_executor.PidCollection(), + verbose=False, + ) + self.assertEqual(status, 0) + mock_log.info.assert_any_call( + "Installing bfb image on DPU connected to %s using %s", + "rshim0", + "timeout 1200s bfb-install -b /path/to.bfb -r rshim0", + ) + mock_log.info.assert_any_call("%s: Installation Successful", "0") + with open(result_path) as rf: + lines = rf.read().splitlines() + self.assertEqual(lines, ["0: line1", "0: line2"]) + finally: + os.unlink(result_path) + + def test_run_bfb_install_failure_logs_error_and_returns_nonzero(self): + from mellanox_bfb_installer import bfb_install_core + + mock_log = mock.MagicMock() + with tempfile.NamedTemporaryFile(mode="w", suffix=".result", delete=False) as f: + result_path = f.name + try: + mock_proc = mock.MagicMock() + mock_proc.stdout = iter(["error line\n"]) + mock_proc.poll = mock.MagicMock(side_effect=[None, 1]) + mock_proc.returncode = 1 + with ( + mock.patch.object(bfb_install_core, "logger", mock_log), + mock.patch.object(bfb_install_core.subprocess, "Popen", return_value=mock_proc), + mock.patch.object(bfb_install_core.time, "sleep"), + mock.patch("sys.stdout"), + ): + status = bfb_install_core._run_bfb_install_image_delivery( + rshim="rshim1", + rshim_id="1", + bfb_path="/bfb.bfb", + child_pids=install_executor.PidCollection(), + result_file_path=result_path, + verbose=False, + ) + self.assertEqual(status, 1) + mock_log.error.assert_called_once_with( + "%s: Error: Installation failed on connected DPU! Exit code: %s", "1", 1 + ) + finally: + os.unlink(result_path) + + def test_run_bfb_install_builds_correct_command(self): + from mellanox_bfb_installer import bfb_install_core + + with tempfile.NamedTemporaryFile(mode="w", suffix=".result", delete=False) as f: + result_path = f.name + try: + mock_proc = mock.MagicMock() + mock_proc.stdout = iter([]) + mock_proc.poll = mock.MagicMock(return_value=0) + mock_proc.returncode = 0 + with ( + mock.patch.object(bfb_install_core.subprocess, "Popen", return_value=mock_proc) as mock_popen, + mock.patch.object(bfb_install_core.time, "sleep"), + mock.patch("sys.stdout"), + ): + bfb_install_core._run_bfb_install_image_delivery( + rshim="rshim0", + rshim_id="0", + bfb_path="/b.bfb", + result_file_path=result_path, + child_pids=install_executor.PidCollection(), + config_path="/c.yaml", + verbose=False, + ) + pos_args = mock_popen.call_args[0] + kwargs = mock_popen.call_args[1] + self.assertEqual(len(pos_args), 1) + expected_cmd = [ + "timeout", + "1200s", + "bfb-install", + "-b", + "/b.bfb", + "-r", + "rshim0", + "-c", + "/c.yaml", + ] + self.assertEqual(pos_args[0], expected_cmd) + expected_kwargs = { + "stdout": bfb_install_core.subprocess.PIPE, + "stderr": bfb_install_core.subprocess.STDOUT, + "text": True, + } + self.assertEqual(kwargs, expected_kwargs) + finally: + os.unlink(result_path) + + def test_full_install_bfb_on_device_returns_one_when_no_pci_bus(self): + """full_install_bfb_on_device returns 1 and logs when rshim_pci_bus_id is falsy.""" + from mellanox_bfb_installer import bfb_install_core + + mock_log = mock.MagicMock() + work_dir = tempfile.mkdtemp() + try: + with ( + mock.patch.object(bfb_install_core, "logger", mock_log), + mock.patch.object(bfb_install_core.reset_dpu, "wait_for_module_transition_to_complete"), + ): + status = bfb_install_core.full_install_bfb_on_device( + rshim_name="rshim0", + rshim_id="0", + dpu_name="dpu0", + rshim_pci_bus_id=None, + dpu_pci_bus_id=None, + config_path=None, + bfb_path="/x.bfb", + work_dir=work_dir, + verbose=False, + child_pids=install_executor.PidCollection(), + ) + self.assertEqual(status, 1) + mock_log.error.assert_called_once() + self.assertIn("Could not find rshim PCI bus ID", mock_log.error.call_args[0][0]) + finally: + shutil.rmtree(work_dir, ignore_errors=True) + + def test_full_install_bfb_on_device_returns_one_when_start_rshim_daemon_fails(self): + """full_install_bfb_on_device returns 1 when start_rshim_daemon returns False.""" + from mellanox_bfb_installer import bfb_install_core + + work_dir = tempfile.mkdtemp() + try: + with ( + mock.patch.object(bfb_install_core.reset_dpu, "wait_for_module_transition_to_complete"), + mock.patch.object(bfb_install_core.rshim_daemon, "start_rshim_daemon", return_value=False), + ): + status = bfb_install_core.full_install_bfb_on_device( + rshim_name="rshim0", + rshim_id="0", + dpu_name="dpu0", + rshim_pci_bus_id="0000:08:00.0", + dpu_pci_bus_id=None, + config_path=None, + bfb_path="/x.bfb", + work_dir=work_dir, + verbose=False, + child_pids=install_executor.PidCollection(), + ) + self.assertEqual(status, 1) + finally: + shutil.rmtree(work_dir, ignore_errors=True) + + def test_full_install_bfb_on_device_returns_one_when_wait_for_rshim_boot_fails(self): + """full_install_bfb_on_device returns 1 when wait_for_rshim_boot returns False.""" + from mellanox_bfb_installer import bfb_install_core + + work_dir = tempfile.mkdtemp() + try: + with ( + mock.patch.object(bfb_install_core.reset_dpu, "wait_for_module_transition_to_complete"), + mock.patch.object(bfb_install_core.rshim_daemon, "start_rshim_daemon", return_value=True), + mock.patch.object(bfb_install_core.rshim_daemon, "wait_for_rshim_boot", return_value=False), + mock.patch.object(bfb_install_core.rshim_daemon, "stop_rshim_daemon"), + mock.patch.object(bfb_install_core.reset_dpu, "reset_dpu"), + ): + status = bfb_install_core.full_install_bfb_on_device( + rshim_name="rshim0", + rshim_id="0", + dpu_name="dpu0", + rshim_pci_bus_id="0000:08:00.0", + dpu_pci_bus_id=None, + config_path=None, + bfb_path="/x.bfb", + work_dir=work_dir, + verbose=False, + child_pids=install_executor.PidCollection(), + ) + self.assertEqual(status, 1) + finally: + shutil.rmtree(work_dir, ignore_errors=True) + + def test_full_install_bfb_on_device_waits_for_module_transition_before_start_rshim(self): + """Transition wait runs for dpu_name before start_rshim_daemon.""" + from mellanox_bfb_installer import bfb_install_core + + work_dir = tempfile.mkdtemp() + try: + mock_wait = mock.MagicMock() + mock_start = mock.MagicMock(return_value=True) + with ( + mock.patch.object(bfb_install_core.reset_dpu, "wait_for_module_transition_to_complete", mock_wait), + mock.patch.object(bfb_install_core.rshim_daemon, "start_rshim_daemon", mock_start), + mock.patch.object(bfb_install_core.rshim_daemon, "wait_for_rshim_boot", return_value=False), + mock.patch.object(bfb_install_core.rshim_daemon, "stop_rshim_daemon"), + mock.patch.object(bfb_install_core.reset_dpu, "reset_dpu"), + ): + bfb_install_core.full_install_bfb_on_device( + rshim_name="rshim0", + rshim_id="0", + dpu_name="dpu7", + rshim_pci_bus_id="0000:08:00.0", + dpu_pci_bus_id=None, + config_path=None, + bfb_path="/x.bfb", + work_dir=work_dir, + verbose=False, + child_pids=install_executor.PidCollection(), + ) + mock_wait.assert_called_once_with("dpu7") + mock_start.assert_called_once() + finally: + shutil.rmtree(work_dir, ignore_errors=True) + + def test_full_install_bfb_on_device_success_returns_zero_and_calls_reset(self): + """full_install_bfb_on_device returns 0 on success and calls stop_rshim_daemon and reset_dpu.""" + from mellanox_bfb_installer import bfb_install_core + + work_dir = tempfile.mkdtemp() + try: + with ( + mock.patch.object(bfb_install_core.reset_dpu, "wait_for_module_transition_to_complete"), + mock.patch.object(bfb_install_core.platform_dpu, "remove_cx7_pci_device"), + mock.patch.object(bfb_install_core.rshim_daemon, "start_rshim_daemon", return_value=True), + mock.patch.object(bfb_install_core.rshim_daemon, "wait_for_rshim_boot", return_value=True), + mock.patch.object(bfb_install_core.rshim_daemon, "stop_rshim_daemon") as mock_stop, + mock.patch.object(bfb_install_core, "_run_bfb_install_image_delivery", return_value=0), + mock.patch.object(bfb_install_core.reset_dpu, "reset_dpu") as mock_reset, + ): + status = bfb_install_core.full_install_bfb_on_device( + rshim_name="rshim0", + rshim_id="0", + dpu_name="dpu0", + rshim_pci_bus_id="0000:08:00.0", + dpu_pci_bus_id=None, + config_path=None, + bfb_path="/x.bfb", + work_dir=work_dir, + verbose=False, + child_pids=install_executor.PidCollection(), + ) + self.assertEqual(status, 0) + mock_stop.assert_called_once_with("0") + mock_reset.assert_called_once() + finally: + shutil.rmtree(work_dir, ignore_errors=True) + + def test_full_install_bfb_on_device_passes_correct_args_to_run_bfb_install_image_delivery(self): + """full_install_bfb_on_device calls _run_bfb_install_image_delivery with correct kwargs.""" + from mellanox_bfb_installer import bfb_install_core + + work_dir = tempfile.mkdtemp() + try: + child_pids = install_executor.PidCollection() + with ( + mock.patch.object(bfb_install_core.reset_dpu, "wait_for_module_transition_to_complete"), + mock.patch.object(bfb_install_core.platform_dpu, "remove_cx7_pci_device"), + mock.patch.object(bfb_install_core.rshim_daemon, "start_rshim_daemon", return_value=True), + mock.patch.object(bfb_install_core.rshim_daemon, "wait_for_rshim_boot", return_value=True), + mock.patch.object(bfb_install_core.rshim_daemon, "stop_rshim_daemon"), + mock.patch.object(bfb_install_core, "_run_bfb_install_image_delivery", return_value=0) as mock_run, + mock.patch.object(bfb_install_core.reset_dpu, "reset_dpu"), + ): + bfb_install_core.full_install_bfb_on_device( + rshim_name="rshim1", + rshim_id="1", + dpu_name="dpu1", + rshim_pci_bus_id="0000:08:00.0", + dpu_pci_bus_id=None, + config_path="/cfg.yaml", + bfb_path="/img.bfb", + work_dir=work_dir, + verbose=True, + child_pids=child_pids, + ) + mock_run.assert_called_once() + call_kwargs = mock_run.call_args[1] + self.assertEqual(call_kwargs["rshim"], "rshim1") + self.assertEqual(call_kwargs["rshim_id"], "1") + self.assertEqual(call_kwargs["bfb_path"], "/img.bfb") + self.assertEqual(call_kwargs["config_path"], "/cfg.yaml") + self.assertEqual(call_kwargs["verbose"], True) + self.assertIs(call_kwargs["child_pids"], child_pids) + self.assertIn("result_file.", call_kwargs["result_file_path"]) + self.assertTrue(call_kwargs["result_file_path"].startswith(work_dir)) + finally: + shutil.rmtree(work_dir, ignore_errors=True) + + def test_full_install_bfb_on_device_calls_remove_cx7_pci_device_with_dpu_bus_id_and_rshim_id_prefix(self): + """full_install_bfb_on_device calls remove_cx7_pci_device with dpu_pci_bus_id and log prefix when present.""" + from mellanox_bfb_installer import bfb_install_core + + work_dir = tempfile.mkdtemp() + try: + with ( + mock.patch.object(bfb_install_core.reset_dpu, "wait_for_module_transition_to_complete"), + mock.patch.object(bfb_install_core.platform_dpu, "remove_cx7_pci_device") as mock_remove, + mock.patch.object(bfb_install_core.rshim_daemon, "start_rshim_daemon", return_value=True), + mock.patch.object(bfb_install_core.rshim_daemon, "wait_for_rshim_boot", return_value=True), + mock.patch.object(bfb_install_core.rshim_daemon, "stop_rshim_daemon"), + mock.patch.object(bfb_install_core, "_run_bfb_install_image_delivery", return_value=0), + mock.patch.object(bfb_install_core.reset_dpu, "reset_dpu"), + ): + bfb_install_core.full_install_bfb_on_device( + rshim_name="rshim2", + rshim_id="2", + dpu_name="dpu2", + rshim_pci_bus_id="0000:08:00.1", + dpu_pci_bus_id="0000:08:00.0", + config_path=None, + bfb_path="/x.bfb", + work_dir=work_dir, + verbose=False, + child_pids=install_executor.PidCollection(), + ) + mock_remove.assert_called_once_with("0000:08:00.0", "2: ") + finally: + shutil.rmtree(work_dir, ignore_errors=True) + + def test_full_install_bfb_on_device_returns_one_when_image_delivery_fails(self): + """full_install_bfb_on_device returns 1 when _run_bfb_install_image_delivery returns non-zero.""" + from mellanox_bfb_installer import bfb_install_core + + work_dir = tempfile.mkdtemp() + try: + with ( + mock.patch.object(bfb_install_core.reset_dpu, "wait_for_module_transition_to_complete"), + mock.patch.object(bfb_install_core.platform_dpu, "remove_cx7_pci_device"), + mock.patch.object(bfb_install_core.rshim_daemon, "start_rshim_daemon", return_value=True), + mock.patch.object(bfb_install_core.rshim_daemon, "wait_for_rshim_boot", return_value=True), + mock.patch.object(bfb_install_core.rshim_daemon, "stop_rshim_daemon") as mock_stop, + mock.patch.object(bfb_install_core, "_run_bfb_install_image_delivery", return_value=1), + mock.patch.object(bfb_install_core.reset_dpu, "reset_dpu") as mock_reset, + ): + status = bfb_install_core.full_install_bfb_on_device( + rshim_name="rshim0", + rshim_id="0", + dpu_name="dpu0", + rshim_pci_bus_id="0000:08:00.0", + dpu_pci_bus_id=None, + config_path=None, + bfb_path="/x.bfb", + work_dir=work_dir, + verbose=False, + child_pids=install_executor.PidCollection(), + ) + self.assertEqual(status, 1) + mock_stop.assert_called_once_with("0") + mock_reset.assert_called_once() + finally: + shutil.rmtree(work_dir, ignore_errors=True) + + +if __name__ == "__main__": + unittest.main() diff --git a/platform/mellanox/platform-utils/tests/mellanox_bfb_installer/test_device_selection.py b/platform/mellanox/platform-utils/tests/mellanox_bfb_installer/test_device_selection.py new file mode 100644 index 00000000000..931db463591 --- /dev/null +++ b/platform/mellanox/platform-utils/tests/mellanox_bfb_installer/test_device_selection.py @@ -0,0 +1,939 @@ +#!/usr/bin/env python3 +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +""" +Unit tests for mellanox_bfb_installer.device_selection module. +""" + +import os +import sys +import tempfile +from unittest import mock + +import pytest + +sys.path.insert(0, os.path.abspath(os.path.join(os.path.dirname(__file__), "..", ".."))) + + +class TestUserDpuSelectionToDpusFromPlatformJson: + """Tests for _user_dpu_selection_to_dpus_from_platform_json.""" + + def test_exits_when_no_dpus_found(self): + """Exits when list_dpus returns empty.""" + from mellanox_bfb_installer import device_selection + + print_usage = mock.MagicMock() + mock_log = mock.MagicMock() + with ( + mock.patch.object(device_selection.platform_dpu, "list_dpus", return_value=[]), + mock.patch.object(device_selection, "logger", mock_log), + ): + with pytest.raises(SystemExit) as ctx: + device_selection._user_dpu_selection_to_dpus_from_platform_json( + dpus="all", rshims=None, script_name="test_script", print_usage_callback=print_usage + ) + assert isinstance(ctx.value, SystemExit) + assert ctx.value.code == 1 + print_usage.assert_called_once() + mock_log.error.assert_called_once() + assert ( + "No DPUs found! Make sure to run the %s script from the Smart Switch host device/switch!" + in mock_log.error.call_args[0][0] + ) + assert mock_log.error.call_args[0][1] == "test_script" + + def test_exits_when_dpu_param_empty_string_or_whitespace(self): + """Exits when dpus is empty string or whitespace-only.""" + from mellanox_bfb_installer import device_selection + + expected_msg = "If dpu parameter is provided, it cannot be empty!" + with mock.patch.object(device_selection.platform_dpu, "list_dpus", return_value=["dpu0"]): + for empty_val in ("", " ", " "): + print_usage = mock.MagicMock() + mock_log = mock.MagicMock() + with ( + mock.patch.object(device_selection, "logger", mock_log), + mock.patch.object(device_selection.platform_dpu, "list_dpus", return_value=["dpu0"]), + ): + with pytest.raises(SystemExit) as ctx: + device_selection._user_dpu_selection_to_dpus_from_platform_json( + dpus=empty_val, rshims=None, script_name="test", print_usage_callback=print_usage + ) + assert isinstance(ctx.value, SystemExit) + assert ctx.value.code == 1 + mock_log.error.assert_called_once() + assert mock_log.error.call_args[0][0] == expected_msg + print_usage.assert_called_once() + + def test_exits_when_rshim_param_empty_string_or_whitespace(self): + """Exits when rshims is empty string or whitespace-only.""" + from mellanox_bfb_installer import device_selection + + expected_msg = "If rshim parameter is provided, it cannot be empty!" + with mock.patch.object(device_selection.platform_dpu, "list_dpus", return_value=["dpu0"]): + for empty_val in ("", " ", " "): + print_usage = mock.MagicMock() + mock_log = mock.MagicMock() + with mock.patch.object(device_selection, "logger", mock_log): + with pytest.raises(SystemExit) as ctx: + device_selection._user_dpu_selection_to_dpus_from_platform_json( + dpus=None, rshims=empty_val, script_name="test", print_usage_callback=print_usage + ) + assert isinstance(ctx.value, SystemExit) + assert ctx.value.code == 1 + mock_log.error.assert_called_once() + assert mock_log.error.call_args[0][0] == expected_msg + print_usage.assert_called_once() + + def test_exits_when_both_dpus_and_rshims_provided(self): + """Exits when both dpus and rshims are provided.""" + from mellanox_bfb_installer import device_selection + + print_usage = mock.MagicMock() + mock_log = mock.MagicMock() + with ( + mock.patch.object(device_selection.platform_dpu, "list_dpus", return_value=["dpu0"]), + mock.patch.object(device_selection, "logger", mock_log), + ): + with pytest.raises(SystemExit) as ctx: + device_selection._user_dpu_selection_to_dpus_from_platform_json( + dpus="dpu0", rshims="rshim0", script_name="test", print_usage_callback=print_usage + ) + assert isinstance(ctx.value, SystemExit) + assert ctx.value.code == 1 + print_usage.assert_called_once() + mock_log.error.assert_called_once() + assert "Both dpu and rshim selection provided" in mock_log.error.call_args[0][0] + + def test_returns_all_dpus_when_dpus_all(self): + """_user_dpu_selection_to_dpus_from_platform_json returns all DPUs when dpus='all'.""" + from mellanox_bfb_installer import device_selection + + print_usage = mock.MagicMock() + with mock.patch.object(device_selection.platform_dpu, "list_dpus", return_value=["dpu0", "dpu1"]): + dpus, user_selected_all = device_selection._user_dpu_selection_to_dpus_from_platform_json( + dpus="all", rshims=None, script_name="test", print_usage_callback=print_usage + ) + assert dpus == ["dpu0", "dpu1"] + assert user_selected_all + print_usage.assert_not_called() + + def test_returns_all_dpus_when_rshims_all(self): + """Returns all DPUs when rshims='all'.""" + from mellanox_bfb_installer import device_selection + + print_usage = mock.MagicMock() + with mock.patch.object(device_selection.platform_dpu, "list_dpus", return_value=["dpu0", "dpu1"]): + dpus, user_selected_all = device_selection._user_dpu_selection_to_dpus_from_platform_json( + dpus=None, rshims="all", script_name="test", print_usage_callback=print_usage + ) + assert dpus == ["dpu0", "dpu1"] + assert user_selected_all + print_usage.assert_not_called() + + def test_returns_dpu_list_when_dpus_comma_separated(self): + """Returns validated DPU list when dpus is comma-separated.""" + from mellanox_bfb_installer import device_selection + + print_usage = mock.MagicMock() + with mock.patch.object(device_selection.platform_dpu, "list_dpus", return_value=["dpu0", "dpu1", "dpu2"]): + dpus, user_selected_all = device_selection._user_dpu_selection_to_dpus_from_platform_json( + dpus="dpu0,dpu2", rshims=None, script_name="test", print_usage_callback=print_usage + ) + assert dpus == ["dpu0", "dpu2"] + assert not user_selected_all + print_usage.assert_not_called() + + def test_exits_when_dpu_not_in_platform(self): + """Exits when requested DPU is not in platform.json list.""" + from mellanox_bfb_installer import device_selection + + print_usage = mock.MagicMock() + mock_log = mock.MagicMock() + with ( + mock.patch.object(device_selection.platform_dpu, "list_dpus", return_value=["dpu0", "dpu1"]), + mock.patch.object(device_selection, "logger", mock_log), + ): + with pytest.raises(SystemExit) as ctx: + device_selection._user_dpu_selection_to_dpus_from_platform_json( + dpus="dpu0,dpu99", rshims=None, script_name="test", print_usage_callback=print_usage + ) + assert isinstance(ctx.value, SystemExit) + assert ctx.value.code == 1 + print_usage.assert_called_once() + mock_log.error.assert_called_once() + assert "DPU" in mock_log.error.call_args[0][0] + assert "not found" in mock_log.error.call_args[0][0] + assert mock_log.error.call_args[0][1] == "dpu99" + + @pytest.mark.parametrize( + "dpus_arg", + [ + ",", + "dpu1,", + ",dpu1", + "dpu1,,dpu2", + ], + ) + def test_exits_when_dpus_list_has_empty_segments_from_commas(self, dpus_arg): + """Comma-only, leading/trailing, or doubled commas produce empty DPU names and exit.""" + from mellanox_bfb_installer import device_selection + + print_usage = mock.MagicMock() + mock_log = mock.MagicMock() + expected_msg = "If providing a list of DPUs, it cannot contain empty strings! (Check for extra commas.)" + with ( + mock.patch.object(device_selection.platform_dpu, "list_dpus", return_value=["dpu0", "dpu1", "dpu2"]), + mock.patch.object(device_selection, "logger", mock_log), + ): + with pytest.raises(SystemExit) as ctx: + device_selection._user_dpu_selection_to_dpus_from_platform_json( + dpus=dpus_arg, rshims=None, script_name="test", print_usage_callback=print_usage + ) + assert isinstance(ctx.value, SystemExit) + assert ctx.value.code == 1 + print_usage.assert_called_once() + mock_log.error.assert_called_once() + assert mock_log.error.call_args[0][0] == expected_msg + + @pytest.mark.parametrize( + "rshims_arg", + [ + ",", + "rshim1,", + ",rshim1", + "rshim1,,rshim2", + ], + ) + def test_exits_when_rshims_list_has_empty_segments_from_commas(self, rshims_arg): + """Comma-only, leading/trailing, or doubled commas produce empty rshim names and exit.""" + from mellanox_bfb_installer import device_selection + + def rshim2dpu_mock(rshim): + return {"rshim0": "dpu0", "rshim1": "dpu1", "rshim2": "dpu2"}.get(rshim) + + print_usage = mock.MagicMock() + mock_log = mock.MagicMock() + expected_msg = "If providing a list of rshims, it cannot contain empty strings! (Check for extra commas.)" + with ( + mock.patch.object(device_selection.platform_dpu, "list_dpus", return_value=["dpu0", "dpu1", "dpu2"]), + mock.patch.object(device_selection, "rshim2dpu", side_effect=rshim2dpu_mock), + mock.patch.object(device_selection, "logger", mock_log), + ): + with pytest.raises(SystemExit) as ctx: + device_selection._user_dpu_selection_to_dpus_from_platform_json( + dpus=None, rshims=rshims_arg, script_name="test", print_usage_callback=print_usage + ) + assert isinstance(ctx.value, SystemExit) + assert ctx.value.code == 1 + print_usage.assert_called_once() + mock_log.error.assert_called_once() + assert mock_log.error.call_args[0][0] == expected_msg + + def test_returns_dpus_via_rshims_comma_separated(self): + """Returns DPU list when rshims is comma-separated and all map to DPUs.""" + from mellanox_bfb_installer import device_selection + + def rshim2dpu_mock(rshim): + return {"rshim0": "dpu0", "rshim1": "dpu1", "rshim2": "dpu2"}.get(rshim) + + print_usage = mock.MagicMock() + with ( + mock.patch.object(device_selection.platform_dpu, "list_dpus", return_value=["dpu0", "dpu1", "dpu2"]), + mock.patch.object(device_selection, "rshim2dpu", side_effect=rshim2dpu_mock), + ): + dpus, user_selected_all = device_selection._user_dpu_selection_to_dpus_from_platform_json( + dpus=None, rshims="rshim0,rshim1", script_name="test", print_usage_callback=print_usage + ) + assert dpus == ["dpu0", "dpu1"] + assert not user_selected_all + print_usage.assert_not_called() + + def test_exits_when_rshim_has_no_dpu_mapping(self): + """Exits when rshim has no corresponding DPU in platform.json.""" + from mellanox_bfb_installer import device_selection + + def rshim2dpu_mock(rshim): + return {"rshim0": "dpu0"}.get(rshim) + + print_usage = mock.MagicMock() + mock_log = mock.MagicMock() + with ( + mock.patch.object(device_selection.platform_dpu, "list_dpus", return_value=["dpu0"]), + mock.patch.object(device_selection, "rshim2dpu", side_effect=rshim2dpu_mock), + mock.patch.object(device_selection, "logger", mock_log), + ): + with pytest.raises(SystemExit) as ctx: + device_selection._user_dpu_selection_to_dpus_from_platform_json( + dpus=None, rshims="rshim0,rshim99", script_name="test", print_usage_callback=print_usage + ) + assert isinstance(ctx.value, SystemExit) + assert ctx.value.code == 1 + mock_log.error.assert_called_once() + assert "No DPU in platform.json exists with rshim" in mock_log.error.call_args[0][0] + assert mock_log.error.call_args[0][1] == "rshim99" + + def test_returns_dpu_list_when_dpus_comma_separated_with_spaces(self): + """Returns DPU list when dpus has extra spaces around commas.""" + from mellanox_bfb_installer import device_selection + + print_usage = mock.MagicMock() + with mock.patch.object(device_selection.platform_dpu, "list_dpus", return_value=["dpu0", "dpu1"]): + dpus, user_selected_all = device_selection._user_dpu_selection_to_dpus_from_platform_json( + dpus="dpu0 , dpu1", rshims=None, script_name="test", print_usage_callback=print_usage + ) + assert dpus == ["dpu0", "dpu1"] + assert not user_selected_all + + def test_returns_single_dpu_when_rshims_single(self): + """Returns single DPU when rshims is a single value.""" + from mellanox_bfb_installer import device_selection + + def rshim2dpu_mock(rshim): + return {"rshim0": "dpu0"}.get(rshim) + + print_usage = mock.MagicMock() + with ( + mock.patch.object(device_selection.platform_dpu, "list_dpus", return_value=["dpu0"]), + mock.patch.object(device_selection, "rshim2dpu", side_effect=rshim2dpu_mock), + ): + dpus, user_selected_all = device_selection._user_dpu_selection_to_dpus_from_platform_json( + dpus=None, rshims="rshim0", script_name="test", print_usage_callback=print_usage + ) + assert dpus == ["dpu0"] + assert not user_selected_all + + def test_exits_when_both_none(self): + """_user_dpu_selection_to_dpus_from_platform_json exits when both dpus and rshims are None.""" + from mellanox_bfb_installer import device_selection + + print_usage = mock.MagicMock() + mock_log = mock.MagicMock() + with ( + mock.patch.object(device_selection.platform_dpu, "list_dpus", return_value=["dpu0"]), + mock.patch.object(device_selection, "logger", mock_log), + ): + with pytest.raises(SystemExit) as ctx: + device_selection._user_dpu_selection_to_dpus_from_platform_json( + dpus=None, rshims=None, script_name="test", print_usage_callback=print_usage + ) + assert isinstance(ctx.value, SystemExit) + assert ctx.value.code == 1 + print_usage.assert_called_once() + mock_log.error.assert_called_once() + assert "No dpus specified!" in mock_log.error.call_args[0][0] + + +@pytest.fixture(scope="module") +def config_paths_for_validation(): + """Provides (existing_file_path, nonexistent_file_path) for _validate_config_files tests.""" + with tempfile.NamedTemporaryFile(delete=False) as f: + existing = f.name + nonexistent = os.path.join(tempfile.gettempdir(), "nonexistent_bfb_installer_validate_98765") + try: + yield (existing, nonexistent) + finally: + os.unlink(existing) + + +class TestValidateConfigFiles: + """Tests for _validate_config_files.""" + + def test_validate_config_files_success_single_file(self, config_paths_for_validation): + """_validate_config_files succeeds when all config paths are existing files (single).""" + from mellanox_bfb_installer import device_selection + + existing_path, _ = config_paths_for_validation + device_selection._validate_config_files([existing_path]) + # No SystemExit raised + + def test_validate_config_files_success_multiple_files(self, config_paths_for_validation): + """_validate_config_files succeeds when all config paths are existing files (multiple).""" + from mellanox_bfb_installer import device_selection + + existing_path, _ = config_paths_for_validation + # Same file twice is valid for multiple configs + device_selection._validate_config_files([existing_path, existing_path]) + # No SystemExit raised + + def test_validate_config_files_exits_when_path_not_file(self, config_paths_for_validation): + """_validate_config_files exits when a config path is not a file.""" + from mellanox_bfb_installer import device_selection + + existing_path, nonexistent_path = config_paths_for_validation + mock_log = mock.MagicMock() + with mock.patch.object(device_selection, "logger", mock_log): + with pytest.raises(SystemExit) as ctx: + device_selection._validate_config_files([existing_path, nonexistent_path]) + assert isinstance(ctx.value, SystemExit) + assert ctx.value.code == 1 + mock_log.error.assert_called_once() + assert "is not a file" in mock_log.error.call_args[0][0] + assert nonexistent_path in mock_log.error.call_args[0] + + +class TestParseConfigPaths: + """Tests for _parse_config_paths.""" + + def test_returns_none_list_when_configs_none(self): + """_parse_config_paths returns [None] * num_dpus when configs is None.""" + from mellanox_bfb_installer import device_selection + + result = device_selection._parse_config_paths(None, 3, False) + assert result == [None, None, None] + + def test_success_single_file(self): + """_parse_config_paths returns a list with the same file for all DPUs when a single file is provided.""" + from mellanox_bfb_installer import device_selection + + config_path = "/path/to/config.json" + num_dpus = 2 + user_selected_all_dpus = False + mock_validate = mock.MagicMock() + with mock.patch.object(device_selection, "_validate_config_files", mock_validate): + result = device_selection._parse_config_paths(config_path, num_dpus, user_selected_all_dpus) + assert result == [config_path] * num_dpus + mock_validate.assert_called_once_with([config_path]) + + def test_success_multiple_files_matching_num_dpus(self): + """_parse_config_paths returns config list when multiple files match num_dpus.""" + from mellanox_bfb_installer import device_selection + + configs_str = "/path/to/config1.json,/path/to/config2.json" + num_dpus = 2 + user_selected_all_dpus = False + mock_validate = mock.MagicMock() + with mock.patch.object(device_selection, "_validate_config_files", mock_validate): + result = device_selection._parse_config_paths(configs_str, num_dpus, user_selected_all_dpus) + assert result == ["/path/to/config1.json", "/path/to/config2.json"] + mock_validate.assert_called_once_with(["/path/to/config1.json", "/path/to/config2.json"]) + + def test_exits_when_user_selected_all_dpus_and_multiple_configs(self): + """_parse_config_paths exits when user_selected_all_dpus is True and more than one config file is provided.""" + from mellanox_bfb_installer import device_selection + + configs_str = "/path/to/config1.json,/path/to/config2.json" + num_dpus = 2 + user_selected_all_dpus = True + mock_log = mock.MagicMock() + with mock.patch.object(device_selection, "logger", mock_log): + with pytest.raises(SystemExit) as ctx: + device_selection._parse_config_paths(configs_str, num_dpus, user_selected_all_dpus) + assert isinstance(ctx.value, SystemExit) + assert ctx.value.code == 1 + mock_log.error.assert_called_once() + assert 'Cannot specify "all" for dpus and more than one config file!' in mock_log.error.call_args[0][0] + + def test_exits_when_config_count_mismatch(self): + """_parse_config_paths exits when number of config files does not match num_dpus.""" + from mellanox_bfb_installer import device_selection + + configs_str = "/path/to/config1.json,/path/to/config2.json" + num_dpus = 3 + mock_log = mock.MagicMock() + with (mock.patch.object(device_selection, "logger", mock_log),): + with pytest.raises(SystemExit) as ctx: + device_selection._parse_config_paths(configs_str, num_dpus, False) + assert isinstance(ctx.value, SystemExit) + assert ctx.value.code == 1 + mock_log.error.assert_called_once() + assert "Number of config files does not match" in mock_log.error.call_args[0][0] + assert mock_log.error.call_args[0][1] == 2 + assert mock_log.error.call_args[0][2] == 3 + + +class TestGetTargets: + """Tests for get_targets.""" + + def test_returns_target_info_list_when_dpus_all(self): + """get_targets returns list of TargetInfo when dpus='all'.""" + from mellanox_bfb_installer import device_selection + from mellanox_bfb_installer.device_selection import TargetInfo + from sonic_platform.device_data import DpuInterfaceEnum + + print_usage = mock.MagicMock() + bus_ids = { + "dpu0": { + DpuInterfaceEnum.PCIE_INT.value: "0000:01:00.0", + DpuInterfaceEnum.RSHIM_PCIE_INT.value: "0000:01:00.1", + }, + "dpu1": { + DpuInterfaceEnum.PCIE_INT.value: "0000:02:00.0", + DpuInterfaceEnum.RSHIM_PCIE_INT.value: "0000:02:00.1", + }, + } + with ( + mock.patch.object( + device_selection.platform_dpu, + "list_dpus", + return_value=["dpu0", "dpu1"], + ), + mock.patch.object( + device_selection.platform_dpu, + "get_dpus_detected_pci_bus_ids", + return_value=bus_ids, + ), + mock.patch.object( + device_selection, + "dpu2rshim", + side_effect=lambda dpu: {"dpu0": "rshim0", "dpu1": "rshim1"}.get(dpu), + ), + ): + result = device_selection.get_targets( + dpus="all", + rshims=None, + configs=None, + script_name="test", + print_usage_callback=print_usage, + ) + assert len(result) == 2 + assert all(isinstance(t, TargetInfo) for t in result) + assert result[0].dpu == "dpu0" + assert result[0].rshim == "rshim0" + assert result[0].dpu_pci_bus_id == "0000:01:00.0" + assert result[0].rshim_pci_bus_id == "0000:01:00.1" + assert result[0].config_path is None + assert result[1].dpu == "dpu1" + assert result[1].rshim == "rshim1" + assert result[1].dpu_pci_bus_id == "0000:02:00.0" + assert result[1].rshim_pci_bus_id == "0000:02:00.1" + assert result[1].config_path is None + + def test_returns_returns_targets_for_specified_dpus(self): + """get_targets returns TargetInfo for specified dpus.""" + from mellanox_bfb_installer import device_selection + from mellanox_bfb_installer.device_selection import TargetInfo + from sonic_platform.device_data import DpuInterfaceEnum + + print_usage = mock.MagicMock() + all_dpus = ["dpu0", "dpu1", "dpu2", "dpu3"] + bus_ids = { + "dpu0": { + DpuInterfaceEnum.PCIE_INT.value: "0000:01:00.0", + DpuInterfaceEnum.RSHIM_PCIE_INT.value: "0000:01:00.1", + }, + "dpu1": { + DpuInterfaceEnum.PCIE_INT.value: "0000:02:00.0", + DpuInterfaceEnum.RSHIM_PCIE_INT.value: "0000:02:00.1", + }, + "dpu2": { + DpuInterfaceEnum.PCIE_INT.value: "0000:03:00.0", + DpuInterfaceEnum.RSHIM_PCIE_INT.value: "0000:03:00.1", + }, + "dpu3": { + DpuInterfaceEnum.PCIE_INT.value: "0000:04:00.0", + DpuInterfaceEnum.RSHIM_PCIE_INT.value: "0000:04:00.1", + }, + } + dpu2rshim_map = {f"dpu{i}": f"rshim{i}" for i in range(4)} + with ( + mock.patch.object( + device_selection.platform_dpu, + "list_dpus", + return_value=all_dpus, + ), + mock.patch.object( + device_selection.platform_dpu, + "get_dpus_detected_pci_bus_ids", + return_value=bus_ids, + ), + mock.patch.object( + device_selection, + "dpu2rshim", + side_effect=lambda dpu: dpu2rshim_map.get(dpu), + ), + ): + result = device_selection.get_targets( + dpus="dpu1,dpu3", + rshims=None, + configs=None, + script_name="test", + print_usage_callback=print_usage, + ) + assert len(result) == 2 + assert result[0].dpu == "dpu1" + assert result[0].rshim == "rshim1" + assert result[0].dpu_pci_bus_id == "0000:02:00.0" + assert result[0].rshim_pci_bus_id == "0000:02:00.1" + assert result[0].config_path is None + assert result[1].dpu == "dpu3" + assert result[1].rshim == "rshim3" + assert result[1].dpu_pci_bus_id == "0000:04:00.0" + assert result[1].rshim_pci_bus_id == "0000:04:00.1" + assert result[1].config_path is None + + def test_returns_target_info_with_config_paths(self): + """get_targets includes config_path when configs provided.""" + from mellanox_bfb_installer import device_selection + from mellanox_bfb_installer.device_selection import TargetInfo + from sonic_platform.device_data import DpuInterfaceEnum + + print_usage = mock.MagicMock() + bus_ids = { + "dpu0": { + DpuInterfaceEnum.PCIE_INT.value: "0000:01:00.0", + DpuInterfaceEnum.RSHIM_PCIE_INT.value: "0000:02:00.0", + }, + "dpu1": { + DpuInterfaceEnum.PCIE_INT.value: "0000:03:00.0", + DpuInterfaceEnum.RSHIM_PCIE_INT.value: "0000:04:00.0", + }, + } + with ( + mock.patch.object( + device_selection.platform_dpu, + "list_dpus", + return_value=["dpu0", "dpu1"], + ), + mock.patch.object( + device_selection.platform_dpu, + "get_dpus_detected_pci_bus_ids", + return_value=bus_ids, + ), + mock.patch.object( + device_selection, + "dpu2rshim", + side_effect=lambda dpu: {"dpu0": "rshim0", "dpu1": "rshim1"}.get(dpu), + ), + mock.patch.object(device_selection, "_parse_config_paths"), + ): + device_selection._parse_config_paths.return_value = [ + "/etc/config1.json", + "/etc/config2.json", + ] + result = device_selection.get_targets( + dpus="all", + rshims=None, + configs="/etc/config1.json,/etc/config2.json", + script_name="test", + print_usage_callback=print_usage, + ) + assert len(result) == 2 + assert result[0].config_path == "/etc/config1.json" + assert result[1].config_path == "/etc/config2.json" + + def test_output_order_matches_user_input_order_for_dpus_and_configs(self): + """get_targets maintains the order of dpus and configs in the user input.""" + from mellanox_bfb_installer import device_selection + from mellanox_bfb_installer.device_selection import TargetInfo + from sonic_platform.device_data import DpuInterfaceEnum + + print_usage = mock.MagicMock() + all_dpus = ["dpu0", "dpu1", "dpu2", "dpu3"] + bus_ids = { + "dpu0": { + DpuInterfaceEnum.PCIE_INT.value: "0000:01:00.0", + DpuInterfaceEnum.RSHIM_PCIE_INT.value: "0000:01:00.1", + }, + "dpu1": { + DpuInterfaceEnum.PCIE_INT.value: "0000:02:00.0", + DpuInterfaceEnum.RSHIM_PCIE_INT.value: "0000:02:00.1", + }, + "dpu2": { + DpuInterfaceEnum.PCIE_INT.value: "0000:03:00.0", + DpuInterfaceEnum.RSHIM_PCIE_INT.value: "0000:03:00.1", + }, + "dpu3": { + DpuInterfaceEnum.PCIE_INT.value: "0000:04:00.0", + DpuInterfaceEnum.RSHIM_PCIE_INT.value: "0000:04:00.1", + }, + } + dpu2rshim_map = {f"dpu{i}": f"rshim{i}" for i in range(4)} + # User-provided order (random): indices 3, 1, 0, 2 + dpus_input = "dpu3,dpu1,dpu0,dpu2" + configs_input = "/cfg/dpu3.json,/cfg/dpu1.json,/cfg/dpu0.json,/cfg/dpu2.json" + with ( + mock.patch.object( + device_selection.platform_dpu, + "list_dpus", + return_value=all_dpus, + ), + mock.patch.object( + device_selection.platform_dpu, + "get_dpus_detected_pci_bus_ids", + return_value=bus_ids, + ), + mock.patch.object( + device_selection, + "dpu2rshim", + side_effect=lambda dpu: dpu2rshim_map.get(dpu), + ), + mock.patch( + "mellanox_bfb_installer.device_selection.os.path.isfile", + return_value=True, + ), + ): + result = device_selection.get_targets( + dpus=dpus_input, + rshims=None, + configs=configs_input, + script_name="test", + print_usage_callback=print_usage, + ) + assert len(result) == 4 + assert result[0].dpu == "dpu3" + assert result[0].rshim == "rshim3" + assert result[0].config_path == "/cfg/dpu3.json" + assert result[0].dpu_pci_bus_id == "0000:04:00.0" + assert result[0].rshim_pci_bus_id == "0000:04:00.1" + assert result[1].dpu == "dpu1" + assert result[1].rshim == "rshim1" + assert result[1].config_path == "/cfg/dpu1.json" + assert result[1].dpu_pci_bus_id == "0000:02:00.0" + assert result[1].rshim_pci_bus_id == "0000:02:00.1" + assert result[2].dpu == "dpu0" + assert result[2].rshim == "rshim0" + assert result[2].config_path == "/cfg/dpu0.json" + assert result[2].dpu_pci_bus_id == "0000:01:00.0" + assert result[2].rshim_pci_bus_id == "0000:01:00.1" + assert result[3].dpu == "dpu2" + assert result[3].rshim == "rshim2" + assert result[3].config_path == "/cfg/dpu2.json" + assert result[3].dpu_pci_bus_id == "0000:03:00.0" + assert result[3].rshim_pci_bus_id == "0000:03:00.1" + + def test_exits_when_dpu_has_no_rshim_mapping(self): + """get_targets exits when dpu2rshim returns None.""" + from mellanox_bfb_installer import device_selection + from sonic_platform.device_data import DpuInterfaceEnum + + print_usage = mock.MagicMock() + bus_ids = { + "dpu0": { + DpuInterfaceEnum.PCIE_INT.value: "0000:01:00.0", + DpuInterfaceEnum.RSHIM_PCIE_INT.value: "0000:02:00.0", + }, + } + mock_log = mock.MagicMock() + with ( + mock.patch.object( + device_selection.platform_dpu, + "list_dpus", + return_value=["dpu0"], + ), + mock.patch.object( + device_selection.platform_dpu, + "get_dpus_detected_pci_bus_ids", + return_value=bus_ids, + ), + mock.patch.object(device_selection, "dpu2rshim", return_value=None), + mock.patch.object(device_selection, "logger", mock_log), + ): + with pytest.raises(SystemExit) as ctx: + device_selection.get_targets( + dpus="dpu0", + rshims=None, + configs=None, + script_name="test", + print_usage_callback=print_usage, + ) + assert isinstance(ctx.value, SystemExit) + assert ctx.value.code == 1 + mock_log.error.assert_called_once() + assert "No rshim mapping found" in mock_log.error.call_args[0][0] + + def test_exits_when_dpu_not_detected_on_pci(self): + """get_targets exits when DPU is not in get_dpus_detected_pci_bus_ids.""" + from mellanox_bfb_installer import device_selection + + print_usage = mock.MagicMock() + # bus_ids is empty - dpu0 not detected + mock_log = mock.MagicMock() + with ( + mock.patch.object( + device_selection.platform_dpu, + "list_dpus", + return_value=["dpu0"], + ), + mock.patch.object( + device_selection.platform_dpu, + "get_dpus_detected_pci_bus_ids", + return_value={}, + ), + mock.patch.object( + device_selection, + "dpu2rshim", + side_effect=lambda dpu: {"dpu0": "rshim0"}.get(dpu), + ), + mock.patch.object(device_selection, "logger", mock_log), + ): + with pytest.raises(SystemExit) as ctx: + device_selection.get_targets( + dpus="dpu0", + rshims=None, + configs=None, + script_name="test", + print_usage_callback=print_usage, + ) + assert isinstance(ctx.value, SystemExit) + assert ctx.value.code == 1 + mock_log.error.assert_called_once() + assert "no devices detected on the PCI bus" in mock_log.error.call_args[0][0] + + def test_returns_target_info_when_rshims_specified(self): + """get_targets returns TargetInfo list when rshims specified instead of dpus.""" + from mellanox_bfb_installer import device_selection + from mellanox_bfb_installer.device_selection import TargetInfo + from sonic_platform.device_data import DpuInterfaceEnum + + print_usage = mock.MagicMock() + bus_ids = { + "dpu0": { + DpuInterfaceEnum.PCIE_INT.value: "0000:01:00.0", + DpuInterfaceEnum.RSHIM_PCIE_INT.value: "0000:02:00.0", + }, + "dpu1": { + DpuInterfaceEnum.PCIE_INT.value: "0000:03:00.0", + DpuInterfaceEnum.RSHIM_PCIE_INT.value: "0000:04:00.0", + }, + } + with ( + mock.patch.object( + device_selection.platform_dpu, + "list_dpus", + return_value=["dpu0", "dpu1"], + ), + mock.patch.object( + device_selection.platform_dpu, + "get_dpus_detected_pci_bus_ids", + return_value=bus_ids, + ), + mock.patch.object( + device_selection, + "dpu2rshim", + side_effect=lambda dpu: {"dpu0": "rshim0", "dpu1": "rshim1"}.get(dpu), + ), + mock.patch.object( + device_selection, + "rshim2dpu", + side_effect=lambda r: {"rshim0": "dpu0", "rshim1": "dpu1"}.get(r), + ), + ): + result = device_selection.get_targets( + dpus=None, + rshims="rshim0,rshim1", + configs=None, + script_name="test", + print_usage_callback=print_usage, + ) + assert len(result) == 2 + assert result[0].dpu == "dpu0" + assert result[0].rshim == "rshim0" + assert result[0].dpu_pci_bus_id == "0000:01:00.0" + assert result[0].rshim_pci_bus_id == "0000:02:00.0" + assert result[0].config_path is None + assert result[1].dpu == "dpu1" + assert result[1].rshim == "rshim1" + assert result[1].dpu_pci_bus_id == "0000:03:00.0" + assert result[1].rshim_pci_bus_id == "0000:04:00.0" + assert result[1].config_path is None + + def test_returns_target_info_when_dpu_pci_bus_id_none(self): + """get_targets succeeds when dpu_pci_bus_id is None (ISOLATED MODE).""" + from mellanox_bfb_installer import device_selection + from mellanox_bfb_installer.device_selection import TargetInfo + from sonic_platform.device_data import DpuInterfaceEnum + + print_usage = mock.MagicMock() + # dpu_pci_bus_id (PCIE_INT) is None/absent; rshim_pci_bus_id required + bus_ids = { + "dpu0": { + # PCIE_INT missing - ISOLATED MODE + DpuInterfaceEnum.RSHIM_PCIE_INT.value: "0000:02:00.0", + }, + } + with ( + mock.patch.object( + device_selection.platform_dpu, + "list_dpus", + return_value=["dpu0"], + ), + mock.patch.object( + device_selection.platform_dpu, + "get_dpus_detected_pci_bus_ids", + return_value=bus_ids, + ), + mock.patch.object( + device_selection, + "dpu2rshim", + side_effect=lambda dpu: {"dpu0": "rshim0"}.get(dpu), + ), + ): + result = device_selection.get_targets( + dpus="dpu0", + rshims=None, + configs=None, + script_name="test", + print_usage_callback=print_usage, + ) + assert len(result) == 1 + assert result[0].dpu == "dpu0" + assert result[0].rshim == "rshim0" + assert result[0].dpu_pci_bus_id is None + assert result[0].rshim_pci_bus_id == "0000:02:00.0" + + def test_exits_when_rshim_not_detected_on_pci(self): + """get_targets exits when rshim_pci_bus_id is missing.""" + from mellanox_bfb_installer import device_selection + from sonic_platform.device_data import DpuInterfaceEnum + + print_usage = mock.MagicMock() + # rshim_bus_info missing + bus_ids = { + "dpu0": { + DpuInterfaceEnum.PCIE_INT.value: "0000:01:00.0", + # RSHIM_PCIE_INT missing + }, + } + mock_log = mock.MagicMock() + with ( + mock.patch.object( + device_selection.platform_dpu, + "list_dpus", + return_value=["dpu0"], + ), + mock.patch.object( + device_selection.platform_dpu, + "get_dpus_detected_pci_bus_ids", + return_value=bus_ids, + ), + mock.patch.object( + device_selection, + "dpu2rshim", + side_effect=lambda dpu: {"dpu0": "rshim0"}.get(dpu), + ), + mock.patch.object(device_selection, "logger", mock_log), + ): + with pytest.raises(SystemExit) as ctx: + device_selection.get_targets( + dpus="dpu0", + rshims=None, + configs=None, + script_name="test", + print_usage_callback=print_usage, + ) + assert isinstance(ctx.value, SystemExit) + assert ctx.value.code == 1 + mock_log.error.assert_called_once() + assert "rshim %s is not detected on the PCI bus" in mock_log.error.call_args[0][0] + assert mock_log.error.call_args[0][1] == "dpu0" + assert mock_log.error.call_args[0][2] == "rshim0" + + +if __name__ == "__main__": + pytest.main([__file__, "-v"]) diff --git a/platform/mellanox/platform-utils/tests/mellanox_bfb_installer/test_install_executor.py b/platform/mellanox/platform-utils/tests/mellanox_bfb_installer/test_install_executor.py new file mode 100644 index 00000000000..af03fc0a56f --- /dev/null +++ b/platform/mellanox/platform-utils/tests/mellanox_bfb_installer/test_install_executor.py @@ -0,0 +1,121 @@ +#!/usr/bin/env python3 +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +""" +Unit tests for mellanox_bfb_installer.install_executor module. +""" + +import os +import sys +import unittest +from unittest import mock + +sys.path.insert(0, os.path.abspath(os.path.join(os.path.dirname(__file__), "..", ".."))) + + +class TestInstallExecutor(unittest.TestCase): + """Tests for install_executor module.""" + + def test_run_parallel_returns_zero_when_all_tasks_return_zero(self): + from mellanox_bfb_installer import install_executor + + task_fn = lambda idx, child_pids: 0 + with mock.patch.object(install_executor, "signal") as mock_signal: + failed = install_executor.run_parallel(3, task_fn) + self.assertEqual(failed, 0) + mock_signal.signal.assert_called() + + def test_run_parallel_returns_count_of_failing_tasks(self): + from mellanox_bfb_installer import install_executor + + def task_fn(idx, child_pids): + return 1 if idx % 2 == 1 else 0 + + with mock.patch.object(install_executor, "signal"): + failed = install_executor.run_parallel(4, task_fn) + self.assertEqual(failed, 2) + + def test_run_parallel_invokes_task_fn_with_each_index(self): + from mellanox_bfb_installer import install_executor + + seen = [] + + def task_fn(idx, child_pids): + seen.append(idx) + return 0 + + with mock.patch.object(install_executor, "signal"): + install_executor.run_parallel(3, task_fn) + self.assertEqual(sorted(seen), [0, 1, 2]) + + def test_run_parallel_registers_signal_handler_for_sigint_sigterm_sighup(self): + from mellanox_bfb_installer import install_executor + import signal as sig + + # Patch only signal.signal (the function) so SIGINT/SIGTERM/SIGHUP stay real + with mock.patch.object(install_executor.signal, "signal") as mock_signal_fn: + install_executor.run_parallel(1, lambda idx, child_pids: 0) + self.assertEqual(mock_signal_fn.call_count, 3) + calls = [c[0] for c in mock_signal_fn.call_args_list] + self.assertIn((sig.SIGINT, mock.ANY), calls) + self.assertIn((sig.SIGTERM, mock.ANY), calls) + self.assertIn((sig.SIGHUP, mock.ANY), calls) + + def test_run_parallel_counts_raised_exception_as_failure_and_logs(self): + from mellanox_bfb_installer import install_executor + + def task_fn(idx, child_pids): + if idx == 1: + raise RuntimeError("task failed") + return 0 + + mock_log = mock.MagicMock() + with ( + mock.patch.object(install_executor, "signal"), + mock.patch.object(install_executor, "logger", mock_log), + ): + failed = install_executor.run_parallel(3, task_fn) + self.assertEqual(failed, 1) + mock_log.error.assert_called() + self.assertIn("task failed", str(mock_log.error.call_args)) + + def test_kill_handler_kills_all_child_pids(self): + from mellanox_bfb_installer import install_executor + import signal as sig + + # Task appends pids to the collection run_parallel passes; handler kills them + def task_fn(idx, child_pids): + child_pids.append(100) + child_pids.append(200) + return 0 + + with mock.patch.object(install_executor.signal, "signal") as mock_signal_fn: + install_executor.run_parallel(1, task_fn) + handler = mock_signal_fn.call_args_list[0][0][1] + with mock.patch.object(install_executor.os, "kill") as mock_kill: + with self.assertRaises(SystemExit): + handler() + self.assertEqual(mock_kill.call_count, 2) + killed = {c[0][0] for c in mock_kill.call_args_list} + self.assertEqual(killed, {100, 200}) + for c in mock_kill.call_args_list: + self.assertEqual(c[0][1], sig.SIGKILL) + + +if __name__ == "__main__": + unittest.main() diff --git a/platform/mellanox/platform-utils/tests/mellanox_bfb_installer/test_main.py b/platform/mellanox/platform-utils/tests/mellanox_bfb_installer/test_main.py new file mode 100644 index 00000000000..33b951d9ecd --- /dev/null +++ b/platform/mellanox/platform-utils/tests/mellanox_bfb_installer/test_main.py @@ -0,0 +1,310 @@ +#!/usr/bin/env python3 +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +""" +Unit tests for mellanox_bfb_installer.main module. +""" + +from contextlib import contextmanager +import logging +import os +import re +import time +import subprocess +import sys +import tempfile +import textwrap +import unittest +from unittest import mock + +sys.path.insert(0, os.path.abspath(os.path.join(os.path.dirname(__file__), "..", ".."))) + + +class TestLoggingConfig(unittest.TestCase): + """Tests for logging configuration.""" + + def test_setup_logging_handlers(self): + """Test setup_log_handlers() sets correct handlers.""" + from mellanox_bfb_installer.main import logger, setup_log_handlers + + @contextmanager + def restore_log_handlers(): + original_handlers = logger.handlers + yield + logger.handlers = original_handlers + + with restore_log_handlers(): + setup_log_handlers() + + self.assertEqual( + len(logger.handlers), + 2, + "Expected two handlers (stdout and syslog) when syslog_enabled=True", + ) + handler_types = [type(h) for h in logger.handlers] + self.assertIn( + logging.StreamHandler, + handler_types, + "Expected a StreamHandler (stdout)", + ) + self.assertIn( + logging.handlers.SysLogHandler, + handler_types, + "Expected a SysLogHandler when syslog_enabled=True", + ) + + def test_set_logging_level(self): + """Test set_logging_level() sets correct levels on the root logger.""" + from mellanox_bfb_installer.main import setup_log_handlers, set_logging_level + + setup_log_handlers() + + from mellanox_bfb_installer.main import logger + + @contextmanager + def set_logging_level_context(verbose: bool): + original_level = logger.level + yield + logger.level = original_level + + with set_logging_level_context(verbose=False): + set_logging_level(verbose=False) + self.assertEqual(logger.level, logging.INFO) + set_logging_level(verbose=True) + self.assertEqual(logger.level, logging.DEBUG) + + +class TestLockFileOrExit(unittest.TestCase): + """Tests for _lock_file_or_exit context manager.""" + + def test_lock_file_or_exit_acquire_and_release_success(self): + """Acquiring the lock with a temp file succeeds; exiting context releases it.""" + from mellanox_bfb_installer.main import _lock_file_or_exit + + with tempfile.NamedTemporaryFile(delete=False, prefix="bfb_installer_lock_") as f: + lock_path = f.name + try: + with _lock_file_or_exit(lock_path) as lock_file: + self.assertIsNotNone(lock_file) + self.assertFalse(lock_file.closed) + # Re-acquire after exit (same process): should succeed + with _lock_file_or_exit(lock_path) as lock_file2: + self.assertIsNotNone(lock_file2) + finally: + try: + os.unlink(lock_path) + except FileNotFoundError: + pass + + def test_lock_file_or_exit_already_locked_exits(self): + """When lock is held, _lock_file_or_exit causes process to exit with code 1.""" + from mellanox_bfb_installer.main import _lock_file_or_exit + + with tempfile.NamedTemporaryFile(delete=False, prefix="bfb_installer_lock_") as f: + lock_path = f.name + try: + with _lock_file_or_exit(lock_path) as lock_file: + self.assertIsNotNone(lock_file) + self.assertFalse(lock_file.closed) + child_script = textwrap.dedent( + f""" + import sys + sys.path.insert(0, {repr(os.path.join(os.path.dirname(__file__), '..'))}) + from mellanox_bfb_installer.main import _lock_file_or_exit + with _lock_file_or_exit({repr(lock_path)}): + pass + """ + ).strip() + child = subprocess.run( + [sys.executable, "-c", child_script], + capture_output=True, + timeout=2, + ) + self.assertEqual(child.returncode, 1, "Process should exit 1 when lock is held") + + finally: + try: + os.unlink(lock_path) + except FileNotFoundError: + pass + + +class TestUsage(unittest.TestCase): + """Tests for usage / help output.""" + + def test_usage_syntax_contains_script_name(self): + from mellanox_bfb_installer.main import SCRIPT_NAME, USAGE_SYNTAX + + self.assertIn(SCRIPT_NAME, USAGE_SYNTAX) + self.assertIn("-b|--bfb", USAGE_SYNTAX) + self.assertIn("--help", USAGE_SYNTAX) + + def test_usage_arguments_contains_all_options(self): + """USAGE_ARGUMENTS includes the main visible options (--rshim is hidden).""" + from mellanox_bfb_installer.main import USAGE_ARGUMENTS + + self.assertIn("-b|--bfb", USAGE_ARGUMENTS) + self.assertIn("-d|--dpu", USAGE_ARGUMENTS) + self.assertIn("-s|--skip-extract", USAGE_ARGUMENTS) + self.assertIn("-v|--verbose", USAGE_ARGUMENTS) + self.assertIn("-c|--config", USAGE_ARGUMENTS) + self.assertIn("-h|--help", USAGE_ARGUMENTS) + self.assertNotIn("--rshim", USAGE_ARGUMENTS) + + +class TestGenerateAdditionalConfigLines(unittest.TestCase): + """Tests for _generate_additional_config_lines.""" + + def test_npu_time_is_present_and_correct(self): + """Returned string contains NPU_TIME= and is correct.""" + import re + import time + + from mellanox_bfb_installer.main import _generate_additional_config_lines + + t_before = int(time.time()) + result = _generate_additional_config_lines() + t_after = int(time.time()) + + match = re.fullmatch(r"NPU_TIME=(\d+)\n", result) + self.assertIsNotNone(match, f"NPU_TIME=\\n not found in {result!r}") + npu_time = int(match.group(1)) + + self.assertGreaterEqual(npu_time, t_before) + self.assertLessEqual(npu_time, t_after) + + +class TestAddAdditionalConfigLines(unittest.TestCase): + """Tests for _add_additional_config_lines.""" + + def _make_target(self, idx: int, config_path): + """Create a TargetInfo for testing.""" + from mellanox_bfb_installer.device_selection import TargetInfo + + return TargetInfo( + dpu=f"dpu{idx}", + rshim=f"rshim{idx}", + dpu_pci_bus_id=f"0000:0{idx}:00.0", + rshim_pci_bus_id=f"0000:0{idx}:00.1", + config_path=config_path, + ) + + def test_single_target_creates_temp_file_with_original_plus_additional_lines(self): + """Single target: creates new file with original contents + temp_config_lines.""" + from mellanox_bfb_installer import device_selection, main + + with tempfile.TemporaryDirectory(prefix="add_config_test_") as tempdir: + config_path = os.path.join(tempdir, "config.json") + with open(config_path, "w") as f: + f.write("original_line\n") + target = self._make_target(0, config_path) + targets = [target] + additional = "line 1\nline 2\n" + main._add_additional_config_lines(targets, additional, tempdir) + self.assertEqual(len(targets), 1) + self.assertEqual(targets[0].dpu, "dpu0") + self.assertEqual(targets[0].rshim, "rshim0") + self.assertEqual(targets[0].dpu_pci_bus_id, "0000:00:00.0") + self.assertEqual(targets[0].rshim_pci_bus_id, "0000:00:00.1") + new_path = targets[0].config_path + self.assertNotEqual(new_path, config_path) + self.assertTrue(new_path.startswith(os.path.join(tempdir, "config.json."))) + with open(new_path, "r") as f: + content = f.read() + self.assertIn("original_line\n", content) + self.assertIn("line 1\n", content) + self.assertIn("line 2\n", content) + + def test_two_targets_same_config_create_one_file_both_updated(self): + """Two targets with same config: one temp file created, both targets point to it.""" + from mellanox_bfb_installer import device_selection, main + + with tempfile.TemporaryDirectory(prefix="add_config_test_") as tempdir: + config_path = os.path.join(tempdir, "shared.json") + with open(config_path, "w") as f: + f.write("shared_content\n") + targets = [ + self._make_target(0, config_path), + self._make_target(1, config_path), + ] + additional = "extra\n" + main._add_additional_config_lines(targets, additional, tempdir) + self.assertEqual(len(targets), 2) + self.assertEqual(targets[0].dpu, "dpu0") + self.assertEqual(targets[0].rshim, "rshim0") + self.assertEqual(targets[0].dpu_pci_bus_id, "0000:00:00.0") + self.assertEqual(targets[0].rshim_pci_bus_id, "0000:00:00.1") + self.assertEqual(targets[1].dpu, "dpu1") + self.assertEqual(targets[1].rshim, "rshim1") + self.assertEqual(targets[1].dpu_pci_bus_id, "0000:01:00.0") + self.assertEqual(targets[1].rshim_pci_bus_id, "0000:01:00.1") + + self.assertTrue(targets[0].config_path.startswith(os.path.join(tempdir, "shared.json."))) + with open(targets[0].config_path, "r") as f: + content = f.read() + self.assertEqual("shared_content\n\nextra\n\n", content) + self.assertEqual(targets[1].config_path, targets[0].config_path) + + def test_two_targets_different_configs_create_two_files(self): + """Two targets with different configs: two temp files, each target gets correct path.""" + from mellanox_bfb_installer import device_selection, main + + with tempfile.TemporaryDirectory(prefix="add_config_test_") as tempdir: + config1 = os.path.join(tempdir, "cfg1.json") + config2 = os.path.join(tempdir, "cfg2.json") + with open(config1, "w") as f: + f.write("config1_content\n") + with open(config2, "w") as f: + f.write("config2_content\n") + targets = [ + self._make_target(1, config1), + self._make_target(2, config2), + ] + additional = "extra\n" + main._add_additional_config_lines(targets, additional, tempdir) + self.assertNotEqual(targets[0].config_path, targets[1].config_path) + self.assertIn("cfg1.json.", targets[0].config_path) + self.assertIn("cfg2.json.", targets[1].config_path) + with open(targets[0].config_path, "r") as f: + self.assertEqual("config1_content\n\nextra\n\n", f.read()) + with open(targets[1].config_path, "r") as f: + self.assertEqual("config2_content\n\nextra\n\n", f.read()) + + def test_target_with_config_none_creates_empty_config_file(self): + """Two targets with config_path None: one file created with only additional lines.""" + from mellanox_bfb_installer import device_selection, main + + with tempfile.TemporaryDirectory(prefix="add_config_test_") as tempdir: + targets = [ + self._make_target(0, None), + self._make_target(1, None), + ] + additional = "extra\n" + main._add_additional_config_lines(targets, additional, tempdir) + self.assertEqual(len(targets), 2) + new_path = targets[0].config_path + self.assertIsNotNone(new_path) + self.assertIn("empty-config.", new_path) + self.assertEqual(targets[1].config_path, new_path, "Both targets share same output file") + with open(new_path, "r") as f: + content = f.read() + self.assertEqual("\nextra\n\n", content) + + +if __name__ == "__main__": + unittest.main() diff --git a/platform/mellanox/platform-utils/tests/mellanox_bfb_installer/test_platform_dpu.py b/platform/mellanox/platform-utils/tests/mellanox_bfb_installer/test_platform_dpu.py new file mode 100644 index 00000000000..007f4b637c5 --- /dev/null +++ b/platform/mellanox/platform-utils/tests/mellanox_bfb_installer/test_platform_dpu.py @@ -0,0 +1,448 @@ +#!/usr/bin/env python3 +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +""" +Unit tests for mellanox_bfb_installer.platform_dpu module. +""" + +import os +import sys +import unittest +from unittest import mock + +sys.path.insert(0, os.path.abspath(os.path.join(os.path.dirname(__file__), "..", ".."))) + + +class TestPlatformDpu(unittest.TestCase): + """Tests for platform_dpu module.""" + + def test_validate_platform_passes_when_platform_and_path_exist(self): + """validate_platform does not raise when get_platform, get_path_to_platform_dir are set and path is a file.""" + from mellanox_bfb_installer import platform_dpu + + mock_device_info = mock.MagicMock() + mock_device_info.get_platform.return_value = "x86_64-mlnx_msn3700-r0" + mock_device_info.get_path_to_platform_dir.return_value = "/usr/share/sonic/device/x86_64-mlnx_msn3700-r0" + mock_device_info.PLATFORM_JSON_FILE = "platform.json" + with ( + mock.patch.object(platform_dpu, "device_info", mock_device_info), + mock.patch.object(platform_dpu.os.path, "isfile", return_value=True) as mock_isfile, + ): + platform_dpu.validate_platform() + mock_device_info.get_platform.assert_called_once() + # get_path_to_platform_dir is called twice: once in the if check, once when building path + self.assertGreaterEqual(mock_device_info.get_path_to_platform_dir.call_count, 1) + mock_isfile.assert_called_once_with("/usr/share/sonic/device/x86_64-mlnx_msn3700-r0/platform.json") + + def test_validate_platform_exits_when_get_platform_falsy(self): + """validate_platform logs and raises SystemExit(1) when get_platform returns falsy.""" + from mellanox_bfb_installer import platform_dpu + + mock_device_info = mock.MagicMock() + mock_device_info.get_platform.return_value = None + mock_log = mock.MagicMock() + with ( + mock.patch.object(platform_dpu, "device_info", mock_device_info), + mock.patch.object(platform_dpu, "logger", mock_log), + ): + with self.assertRaises(SystemExit) as ctx: + platform_dpu.validate_platform() + self.assertEqual(ctx.exception.code, 1) + mock_log.error.assert_called_once() + self.assertIn("PLATFORM", mock_log.error.call_args[0][0]) + + def test_validate_platform_exits_when_get_path_to_platform_dir_falsy(self): + """validate_platform logs and raises SystemExit(1) when get_path_to_platform_dir returns falsy.""" + from mellanox_bfb_installer import platform_dpu + + mock_device_info = mock.MagicMock() + mock_device_info.get_platform.return_value = "x86_64-mlnx" + mock_device_info.get_path_to_platform_dir.return_value = None + mock_log = mock.MagicMock() + with ( + mock.patch.object(platform_dpu, "device_info", mock_device_info), + mock.patch.object(platform_dpu, "logger", mock_log), + ): + with self.assertRaises(SystemExit) as ctx: + platform_dpu.validate_platform() + self.assertEqual(ctx.exception.code, 1) + mock_log.error.assert_called_once() + self.assertIn("PLATFORM directory", mock_log.error.call_args[0][0]) + + def test_validate_platform_exits_when_path_not_file(self): + """validate_platform logs and raises SystemExit(1) when platform.json path is not a file.""" + from mellanox_bfb_installer import platform_dpu + + mock_device_info = mock.MagicMock() + mock_device_info.get_platform.return_value = "x86_64-mlnx" + mock_device_info.get_path_to_platform_dir.return_value = "/usr/share/sonic/device/x86_64-mlnx" + mock_device_info.PLATFORM_JSON_FILE = "platform.json" + mock_log = mock.MagicMock() + with ( + mock.patch.object(platform_dpu, "device_info", mock_device_info), + mock.patch.object(platform_dpu.os.path, "isfile", return_value=False), + mock.patch.object(platform_dpu, "logger", mock_log), + ): + with self.assertRaises(SystemExit) as ctx: + platform_dpu.validate_platform() + self.assertEqual(ctx.exception.code, 1) + mock_log.error.assert_called_once() + self.assertIn("platform.json", mock_log.error.call_args[0][0]) + + def test_list_dpus_returns_keys_from_dpus_data(self): + """list_dpus returns list of DPU names when get_platform_dpus_data returns a dict.""" + from mellanox_bfb_installer import platform_dpu + + with mock.patch.object(platform_dpu, "_get_dpus_data", return_value={"dpu0": {}, "dpu1": {}}): + result = platform_dpu.list_dpus() + self.assertEqual(sorted(result), ["dpu0", "dpu1"]) + + def test_list_dpus_returns_empty_when_no_dpus(self): + """list_dpus returns [] when get_platform_dpus_data returns None or empty.""" + from mellanox_bfb_installer import platform_dpu + + with mock.patch.object(platform_dpu, "_get_dpus_data", return_value=None): + self.assertEqual(platform_dpu.list_dpus(), []) + with mock.patch.object(platform_dpu, "_get_dpus_data", return_value={}): + self.assertEqual(platform_dpu.list_dpus(), []) + + def test_dpu2rshim_returns_rshim_for_dpu(self): + """dpu2rshim returns rshim name from DeviceDataManager.get_dpu_interface.""" + from mellanox_bfb_installer import platform_dpu + + with mock.patch.object(platform_dpu.DeviceDataManager, "get_dpu_interface", return_value="rshim0"): + result = platform_dpu.dpu2rshim("dpu0") + self.assertEqual(result, "rshim0") + + def test_rshim2dpu_returns_dpu_for_rshim(self): + """rshim2dpu returns DPU name when DPUS has matching rshim_info.""" + from mellanox_bfb_installer import platform_dpu + + with mock.patch.object( + platform_dpu, + "_get_dpus_data", + return_value={"dpu0": {"rshim_info": "rshim0"}, "dpu1": {"rshim_info": "rshim1"}}, + ): + self.assertEqual(platform_dpu.rshim2dpu("rshim0"), "dpu0") + self.assertEqual(platform_dpu.rshim2dpu("rshim1"), "dpu1") + self.assertIsNone(platform_dpu.rshim2dpu("rshim99")) + + def test_run_lspci_d_n_returns_stdout_on_success(self): + """_run_lspci_d_n returns subprocess stdout when returncode is 0.""" + from mellanox_bfb_installer import platform_dpu + + mock_result = mock.MagicMock() + mock_result.returncode = 0 + mock_result.stdout = "0000:08:00.0 0200: 15b3:a2dc (rev 01)\n" + with mock.patch.object(platform_dpu.subprocess, "run") as mock_run: + mock_run.return_value = mock_result + out = platform_dpu._run_lspci_d_n() + self.assertEqual(out, "0000:08:00.0 0200: 15b3:a2dc (rev 01)\n") + mock_run.assert_called_once() + self.assertEqual(mock_run.call_args[0][0], ["lspci", "-D", "-n"]) + self.assertEqual( + mock_run.call_args[1], + {"capture_output": True, "text": True, "timeout": 10}, + ) + + def test_run_lspci_d_n_returns_empty_on_nonzero_returncode(self): + """_run_lspci_d_n returns empty string when subprocess returncode is non-zero.""" + from mellanox_bfb_installer import platform_dpu + + mock_result = mock.MagicMock() + mock_result.returncode = 1 + mock_result.stdout = "error" + with mock.patch.object(platform_dpu.subprocess, "run", return_value=mock_result): + out = platform_dpu._run_lspci_d_n() + self.assertEqual(out, "") + + def test_run_lspci_d_n_returns_empty_on_exception(self): + """_run_lspci_d_n returns empty string when subprocess raises.""" + from mellanox_bfb_installer import platform_dpu + + with mock.patch.object(platform_dpu.subprocess, "run", side_effect=OSError("lspci not found")): + out = platform_dpu._run_lspci_d_n() + self.assertEqual(out, "") + + def test_get_dpus_detected_pci_bus_ids_returns_both_devices_when_present(self): + """get_dpus_detected_pci_bus_ids returns both CX7 and RSHIM when lspci shows both.""" + from mellanox_bfb_installer import platform_dpu + from sonic_platform.device_data import DpuInterfaceEnum + + lspci_output = "0000:01:00.0 0200: 15b3:a2dc (rev 01)\n" "0000:01:00.1 0200: 15b3:c2d5 (rev 01)\n" + + def get_dpu_interface(dpu, iface): + if iface == DpuInterfaceEnum.PCIE_INT.value: + return "0000:01:00.0" if dpu == "dpu0" else None + if iface == DpuInterfaceEnum.RSHIM_PCIE_INT.value: + return "0000:01:00.1" if dpu == "dpu0" else None + return None + + with ( + mock.patch.object(platform_dpu, "list_dpus", return_value=["dpu0"]), + mock.patch.object( + platform_dpu.DeviceDataManager, + "get_dpu_interface", + side_effect=get_dpu_interface, + ), + mock.patch.object(platform_dpu, "_run_lspci_d_n", return_value=lspci_output), + ): + result = platform_dpu.get_dpus_detected_pci_bus_ids() + + self.assertEqual( + result, + { + "dpu0": { + DpuInterfaceEnum.PCIE_INT.value: "0000:01:00.0", + DpuInterfaceEnum.RSHIM_PCIE_INT.value: "0000:01:00.1", + } + }, + ) + + def test_get_dpus_detected_pci_bus_ids_returns_empty_when_no_dpus(self): + """get_dpus_detected_pci_bus_ids returns {} when list_dpus is empty.""" + from mellanox_bfb_installer import platform_dpu + + with mock.patch.object(platform_dpu, "list_dpus", return_value=[]): + result = platform_dpu.get_dpus_detected_pci_bus_ids() + self.assertEqual(result, {}) + + def test_get_dpus_detected_pci_bus_ids_includes_only_detected_devices(self): + """get_dpus_detected_pci_bus_ids includes only devices present in lspci output.""" + from mellanox_bfb_installer import platform_dpu + from sonic_platform.device_data import DpuInterfaceEnum + + # Only RSHIM present; CX7 not in lspci + lspci_output = "0000:02:00.0 0200: 15b3:c2d5 (rev 01)\n" + + def get_dpu_interface(dpu, iface): + if iface == DpuInterfaceEnum.PCIE_INT.value: + return "0000:01:00.0" if dpu == "dpu0" else None + if iface == DpuInterfaceEnum.RSHIM_PCIE_INT.value: + return "0000:02:00.0" if dpu == "dpu0" else None + return None + + with ( + mock.patch.object(platform_dpu, "list_dpus", return_value=["dpu0"]), + mock.patch.object( + platform_dpu.DeviceDataManager, + "get_dpu_interface", + side_effect=get_dpu_interface, + ), + mock.patch.object(platform_dpu, "_run_lspci_d_n", return_value=lspci_output), + ): + result = platform_dpu.get_dpus_detected_pci_bus_ids() + + self.assertEqual( + result, + { + "dpu0": { + # Only RSHIM present; CX7 not in lspci + DpuInterfaceEnum.RSHIM_PCIE_INT.value: "0000:02:00.0", + } + }, + ) + + def test_get_dpus_detected_pci_bus_ids_isolated_mode_logs_warning(self): + """get_dpus_detected_pci_bus_ids correctly handles when BFSOC (rshim) at CX7 (dpu) bus id (ISOLATED MODE).""" + from mellanox_bfb_installer import platform_dpu + from sonic_platform.device_data import DpuInterfaceEnum + + # BFSOC (rshim) at 0000:01:00.0 where platform expects CX7 + lspci_output = "0000:01:00.0 0200: 15b3:c2d5 (rev 01)\n" + + def get_platform_json_dpu_interface(dpu, iface): + if iface == DpuInterfaceEnum.PCIE_INT.value: + return "0000:01:00.0" if dpu == "dpu0" else None + if iface == DpuInterfaceEnum.RSHIM_PCIE_INT.value: + return "0000:02:00.0" if dpu == "dpu0" else None + return None + + mock_log = mock.MagicMock() + with ( + mock.patch.object(platform_dpu, "list_dpus", return_value=["dpu0"]), + mock.patch.object( + platform_dpu.DeviceDataManager, + "get_dpu_interface", + side_effect=get_platform_json_dpu_interface, + ), + mock.patch.object(platform_dpu, "_run_lspci_d_n", return_value=lspci_output), + mock.patch.object(platform_dpu, "logger", mock_log), + ): + result = platform_dpu.get_dpus_detected_pci_bus_ids() + + mock_log.warning.assert_called_once() + self.assertEqual( + "DPU %s: is running in ISOLATED MODE. PCI device detected at bus id %s is device id %s, not a CX7 %s", + mock_log.warning.call_args[0][0], + ) + self.assertEqual(mock_log.warning.call_args[0][1], "dpu0") + self.assertEqual(mock_log.warning.call_args[0][2], "0000:01:00.0") + self.assertEqual(mock_log.warning.call_args[0][3], "15b3:c2d5") + self.assertEqual(mock_log.warning.call_args[0][4], "15b3:a2dc") + # Device still recorded as RSHIM_PCIE_INT at the bus id where it was detected, + # which is different than the platform.json. + self.assertEqual(result["dpu0"][DpuInterfaceEnum.RSHIM_PCIE_INT.value], "0000:01:00.0") + + def test_get_dpus_detected_pci_bus_ids_cx7_at_rshim_slot_logs_error(self): + """get_dpus_detected_pci_bus_ids correctly handles when CX7 (dpu) at BFSOC (rshim) bus id.""" + from mellanox_bfb_installer import platform_dpu + from sonic_platform.device_data import DpuInterfaceEnum + + # CX7 (ethernet) at 0000:02:00.0 where platform expects BFSOC (rshim) + lspci_output = "0000:02:00.0 0200: 15b3:a2dc (rev 01)\n" + + def get_dpu_interface(dpu, iface): + if iface == DpuInterfaceEnum.PCIE_INT.value: + return "0000:01:00.0" if dpu == "dpu0" else None + if iface == DpuInterfaceEnum.RSHIM_PCIE_INT.value: + return "0000:02:00.0" if dpu == "dpu0" else None + return None + + mock_log = mock.MagicMock() + with ( + mock.patch.object(platform_dpu, "list_dpus", return_value=["dpu0"]), + mock.patch.object( + platform_dpu.DeviceDataManager, + "get_dpu_interface", + side_effect=get_dpu_interface, + ), + mock.patch.object(platform_dpu, "_run_lspci_d_n", return_value=lspci_output), + mock.patch.object(platform_dpu, "logger", mock_log), + ): + result = platform_dpu.get_dpus_detected_pci_bus_ids() + + mock_log.error.assert_called_once() + self.assertEqual( + "PCI device detected for DPU %s at bus id %s is the CX7 device id %s, not " + "the expected BFSOC / rshim device id %s", + mock_log.error.call_args[0][0], + ) + self.assertEqual(mock_log.error.call_args[0][1], "dpu0") + self.assertEqual(mock_log.error.call_args[0][2], "0000:02:00.0") + self.assertEqual(mock_log.error.call_args[0][3], "15b3:a2dc") + self.assertEqual(mock_log.error.call_args[0][4], "15b3:c2d5") + # Device still recorded as PCIE_INT at the slot where it was detected, + # which is different than the platform.json. This shouldn't happen in + # real life, but we should handle it gracefully. + self.assertEqual(result["dpu0"][DpuInterfaceEnum.PCIE_INT.value], "0000:02:00.0") + + def test_get_dpus_detected_pci_bus_ids_skips_invalid_lspci_line(self): + """get_dpus_detected_pci_bus_ids skips lspci lines with fewer than 3 tokens.""" + from mellanox_bfb_installer import platform_dpu + from sonic_platform.device_data import DpuInterfaceEnum + + lspci_output = "0000:01:00.0 0200: 15b3:a2dc (rev 01)\nbad line\n0000:01:00.1 0200: 15b3:c2d5 (rev 01)\n" + + def get_dpu_interface(dpu, iface): + if iface == DpuInterfaceEnum.PCIE_INT.value: + return "0000:01:00.0" if dpu == "dpu0" else None + if iface == DpuInterfaceEnum.RSHIM_PCIE_INT.value: + return "0000:01:00.1" if dpu == "dpu0" else None + return None + + mock_log = mock.MagicMock() + with ( + mock.patch.object(platform_dpu, "list_dpus", return_value=["dpu0"]), + mock.patch.object( + platform_dpu.DeviceDataManager, + "get_dpu_interface", + side_effect=get_dpu_interface, + ), + mock.patch.object(platform_dpu, "_run_lspci_d_n", return_value=lspci_output), + mock.patch.object(platform_dpu, "logger", mock_log), + ): + result = platform_dpu.get_dpus_detected_pci_bus_ids() + + mock_log.warning.assert_called_once() + self.assertIn("Invalid `lspci -D -n` output line", mock_log.warning.call_args[0][0]) + self.assertEqual(result["dpu0"][DpuInterfaceEnum.PCIE_INT.value], "0000:01:00.0") + self.assertEqual(result["dpu0"][DpuInterfaceEnum.RSHIM_PCIE_INT.value], "0000:01:00.1") + + def test_get_dpus_detected_pci_bus_ids_multiple_dpus(self): + """get_dpus_detected_pci_bus_ids returns correct mapping for multiple DPUs.""" + from mellanox_bfb_installer import platform_dpu + from sonic_platform.device_data import DpuInterfaceEnum + + lspci_output = ( + "0000:01:00.0 0200: 15b3:a2dc (rev 01)\n" + "0000:01:00.1 0200: 15b3:c2d5 (rev 01)\n" + "0000:03:00.0 0200: 15b3:a2dc (rev 01)\n" + "0000:03:00.1 0200: 15b3:c2d5 (rev 01)\n" + ) + + def get_dpu_interface(dpu, iface): + mapping = { + ("dpu0", DpuInterfaceEnum.PCIE_INT.value): "0000:01:00.0", + ("dpu0", DpuInterfaceEnum.RSHIM_PCIE_INT.value): "0000:01:00.1", + ("dpu1", DpuInterfaceEnum.PCIE_INT.value): "0000:03:00.0", + ("dpu1", DpuInterfaceEnum.RSHIM_PCIE_INT.value): "0000:03:00.1", + } + return mapping.get((dpu, iface)) + + with ( + mock.patch.object(platform_dpu, "list_dpus", return_value=["dpu0", "dpu1"]), + mock.patch.object( + platform_dpu.DeviceDataManager, + "get_dpu_interface", + side_effect=get_dpu_interface, + ), + mock.patch.object(platform_dpu, "_run_lspci_d_n", return_value=lspci_output), + ): + result = platform_dpu.get_dpus_detected_pci_bus_ids() + + self.assertEqual(len(result), 2) + self.assertEqual(result["dpu0"][DpuInterfaceEnum.PCIE_INT.value], "0000:01:00.0") + self.assertEqual(result["dpu0"][DpuInterfaceEnum.RSHIM_PCIE_INT.value], "0000:01:00.1") + self.assertEqual(result["dpu1"][DpuInterfaceEnum.PCIE_INT.value], "0000:03:00.0") + self.assertEqual(result["dpu1"][DpuInterfaceEnum.RSHIM_PCIE_INT.value], "0000:03:00.1") + + def test_remove_cx7_pci_device_logs_and_writes_remove_when_present(self): + """remove_cx7_pci_device logs and writes to sysfs remove path.""" + from mellanox_bfb_installer import platform_dpu + + mock_log = mock.MagicMock() + bus_id = "0000:08:00.0" + with ( + mock.patch.object(platform_dpu, "logger", mock_log), + mock.patch("builtins.open", mock.mock_open()) as mock_open, + ): + platform_dpu.remove_cx7_pci_device(bus_id, "rshim0: ") + mock_log.info.assert_called_once_with("%sRemoving CX PCI device %s", "rshim0: ", bus_id) + mock_open.assert_called_once_with(f"/sys/bus/pci/devices/{bus_id}/remove", "w") + mock_open().write.assert_called_once_with("1") + + def test_remove_cx7_pci_device_logs_error_when_open_fails(self): + """remove_cx7_pci_device logs error and does not raise when open raises OSError.""" + from mellanox_bfb_installer import platform_dpu + + mock_log = mock.MagicMock() + bus_id = "0000:08:00.0" + err = OSError(2, "No such file or directory") + with ( + mock.patch.object(platform_dpu, "logger", mock_log), + mock.patch("builtins.open", side_effect=err), + ): + platform_dpu.remove_cx7_pci_device(bus_id, "rshim0: ") + # Does not raise. + mock_log.info.assert_called_once_with("%sRemoving CX PCI device %s", "rshim0: ", bus_id) + mock_log.error.assert_called_once_with("Failed to remove PCI device %s: %s", bus_id, err) + + +if __name__ == "__main__": + unittest.main() diff --git a/platform/mellanox/platform-utils/tests/mellanox_bfb_installer/test_reset_dpu.py b/platform/mellanox/platform-utils/tests/mellanox_bfb_installer/test_reset_dpu.py new file mode 100644 index 00000000000..7899f6ff5b8 --- /dev/null +++ b/platform/mellanox/platform-utils/tests/mellanox_bfb_installer/test_reset_dpu.py @@ -0,0 +1,270 @@ +#!/usr/bin/env python3 +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +""" +Unit tests for mellanox_bfb_installer.reset_dpu module. +""" + +import io +import os +import sys +import unittest +from unittest import mock + +sys.path.insert(0, os.path.abspath(os.path.join(os.path.dirname(__file__), "..", ".."))) + + +class TestIsChassisModuleTablePresent(unittest.TestCase): + """Tests for function _is_chassis_module_table_present.""" + + def test_true_when_keys_returned(self): + """Test if returns True when STATE_DB has the key (SonicV2Connector).""" + from mellanox_bfb_installer import reset_dpu + + mock_db = mock.MagicMock() + mock_db.STATE_DB = "STATE_DB" + mock_db.keys.return_value = ["CHASSIS_MODULE_TABLE|DPU0"] + with mock.patch.object(reset_dpu, "SonicV2Connector", return_value=mock_db): + self.assertTrue(reset_dpu._is_chassis_module_table_present("dpu0")) + mock_db.connect.assert_called_once_with("STATE_DB") + mock_db.keys.assert_called_once_with(mock_db.STATE_DB, "CHASSIS_MODULE_TABLE|DPU0") + + def test_false_when_empty(self): + """Test if returns False when STATE_DB has no matching key.""" + from mellanox_bfb_installer import reset_dpu + + mock_db = mock.MagicMock() + mock_db.STATE_DB = "STATE_DB" + mock_db.keys.return_value = [] + with mock.patch.object(reset_dpu, "SonicV2Connector", return_value=mock_db): + self.assertFalse(reset_dpu._is_chassis_module_table_present("DPU1")) + + +class TestChassisModuleTableDpuGetField(unittest.TestCase): + """Tests for function _chassis_module_table_dpu_get_field.""" + + def test_returns_str_when_present(self): + """Test if returns the field value as str when STATE_DB has it.""" + from mellanox_bfb_installer import reset_dpu + + mock_db = mock.MagicMock() + mock_db.STATE_DB = "STATE_DB" + mock_db.get.return_value = "True" + with mock.patch.object(reset_dpu, "SonicV2Connector", return_value=mock_db): + self.assertEqual( + reset_dpu._chassis_module_table_dpu_get_field("DPU0", "transition_in_progress"), + "True", + ) + mock_db.connect.assert_called_once_with("STATE_DB") + mock_db.get.assert_called_once_with(mock_db.STATE_DB, "CHASSIS_MODULE_TABLE|DPU0", "transition_in_progress") + + def test_returns_none_when_missing_or_empty(self): + """Test if returns None when get returns None or empty string.""" + from mellanox_bfb_installer import reset_dpu + + mock_db = mock.MagicMock() + mock_db.STATE_DB = "STATE_DB" + for ret in (None, ""): + mock_db.get.return_value = ret + with mock.patch.object(reset_dpu, "SonicV2Connector", return_value=mock_db): + self.assertIsNone(reset_dpu._chassis_module_table_dpu_get_field("DPU1", "some_field")) + + def test_coerces_non_str_value(self): + """Test if non-string values from get are returned as str.""" + from mellanox_bfb_installer import reset_dpu + + mock_db = mock.MagicMock() + mock_db.STATE_DB = "STATE_DB" + mock_db.get.return_value = 42 + with mock.patch.object(reset_dpu, "SonicV2Connector", return_value=mock_db): + self.assertEqual(reset_dpu._chassis_module_table_dpu_get_field("DPU2", "f"), "42") + + def test_returns_none_on_exception(self): + """Test if returns None when SonicV2Connector or DB access raises.""" + from mellanox_bfb_installer import reset_dpu + + mock_db = mock.MagicMock() + mock_db.STATE_DB = "STATE_DB" + mock_db.connect.side_effect = RuntimeError("no db") + with mock.patch.object(reset_dpu, "SonicV2Connector", return_value=mock_db): + self.assertIsNone(reset_dpu._chassis_module_table_dpu_get_field("DPU3", "f")) + + +class TestWaitForModuleTransitionToComplete(unittest.TestCase): + """Tests for function wait_for_module_transition_to_complete.""" + + def test_no_op_when_flag_not_true(self): + """Test if returns immediately when not True.""" + from mellanox_bfb_installer import reset_dpu + + with ( + mock.patch.object(reset_dpu, "_chassis_module_table_dpu_get_field", return_value="false") as mock_get_field, + mock.patch.object(reset_dpu.time, "sleep") as mock_sleep, + ): + reset_dpu.wait_for_module_transition_to_complete("dpu0") + mock_get_field.assert_called_once_with("DPU0", "transition_in_progress") + mock_sleep.assert_not_called() + + def test_loops_until_cleared(self): + """Test if loops until transition_in_progress is no longer True.""" + from mellanox_bfb_installer import reset_dpu + + t0 = 1000 + get_field_calls = [ + ("transition_in_progress", "True"), + ("transition_start_time", str(t0)), + ("transition_in_progress", "True"), + ("transition_in_progress", "False"), + ] + + def fake_get_field(_dpu_upper: str, field: str): + expected_field, val = get_field_calls.pop(0) + self.assertEqual(field, expected_field) + return val + + with ( + mock.patch.object(reset_dpu, "_chassis_module_table_dpu_get_field", side_effect=fake_get_field), + mock.patch.object(reset_dpu.time, "sleep") as mock_sleep, + mock.patch.object(reset_dpu.time, "time", return_value=t0 + 10), + ): + reset_dpu.wait_for_module_transition_to_complete("dpu1") + + # Assert called twice, each for 2 seconds. + self.assertEqual(mock_sleep.call_count, 2) + self.assertEqual(mock_sleep.call_args_list, [mock.call(2), mock.call(2)]) + + self.assertEqual(get_field_calls, []) + + def test_timeout_proceeds(self): + """Test if proceeds after timeout.""" + from mellanox_bfb_installer import reset_dpu + + self.assertEqual(reset_dpu.DPU_TRANSITION_WAIT_TIMEOUT_SECS, 13 * 60) + + start = 1_000_000 + get_field_calls = [ + ("transition_in_progress", "True"), + ("transition_start_time", str(start)), + ("transition_in_progress", "True"), + ] + + def fake_get_field(_dpu_upper: str, field: str): + expected_field, val = get_field_calls.pop(0) + self.assertEqual(field, expected_field) + return val + + timeout_secs = reset_dpu.DPU_TRANSITION_WAIT_TIMEOUT_SECS + with ( + mock.patch.object(reset_dpu, "_chassis_module_table_dpu_get_field", side_effect=fake_get_field), + mock.patch.object(reset_dpu.time, "sleep"), + mock.patch.object( + reset_dpu.time, + "time", + return_value=start + timeout_secs, + ), + ): + reset_dpu.wait_for_module_transition_to_complete("dpu2") + + self.assertEqual(get_field_calls, []) + + +class TestRebootWithProgress(unittest.TestCase): + """Tests for _reboot_with_progress (sonic-bfb-installer.sh run_dpuctl_reset behavior).""" + + def test_prints_elapsed_and_total(self): + """Stdout shows reboot progress line ending with total seconds (matches shell script).""" + from mellanox_bfb_installer import reset_dpu + + buf = io.StringIO() + with mock.patch.object(reset_dpu.sys, "stdout", buf): + reset_dpu._reboot_with_progress("dpu0", lambda: None) + out = buf.getvalue() + self.assertIn("dpu0: Reboot:", out) + self.assertIn("seconds elapsed in total", out) + + def test_logs_error_when_reboot_raises(self): + """Exception from reboot callback is logged and does not propagate.""" + from mellanox_bfb_installer import reset_dpu + + mock_log = mock.MagicMock() + + def boom() -> None: + raise RuntimeError("reboot failed") + + buf = io.StringIO() + with ( + mock.patch.object(reset_dpu, "logger", mock_log), + mock.patch.object(reset_dpu.sys, "stdout", buf), + ): + reset_dpu._reboot_with_progress("dpu0", boom) + mock_log.error.assert_called_once() + self.assertIn("reboot failed", str(mock_log.error.call_args)) + + +class TestResetDpu(unittest.TestCase): + """Tests for function reset_dpu.""" + + def test_uses_dpuctlplat_when_chassis_entry_absent(self): + """Test if uses DpuCtlPlat when CHASSIS_MODULE_TABLE has no entry.""" + from mellanox_bfb_installer import reset_dpu + + mock_log = mock.MagicMock() + mock_dpu_ctl = mock.MagicMock() + with ( + mock.patch.object(reset_dpu, "logger", mock_log), + mock.patch.object(reset_dpu, "_is_chassis_module_table_present", return_value=False), + mock.patch.object(reset_dpu, "DpuCtlPlat", return_value=mock_dpu_ctl), + ): + reset_dpu.reset_dpu("dpu0", False) + mock_log.info.assert_any_call("Using DpuCtlPlat to reset %s", "dpu0") + mock_dpu_ctl.dpu_reboot.assert_called_once_with(forced=True, skip_pre_post=False) + + def test_sets_verbosity_on_dpu_ctl(self): + """Test if sets verbosity on DpuCtlPlat when use_verbose is True.""" + from mellanox_bfb_installer import reset_dpu + + mock_dpu_ctl = mock.MagicMock() + with ( + mock.patch.object(reset_dpu, "_is_chassis_module_table_present", return_value=False), + mock.patch.object(reset_dpu, "DpuCtlPlat", return_value=mock_dpu_ctl), + ): + reset_dpu.reset_dpu("dpu0", True) + self.assertEqual(mock_dpu_ctl.verbosity, True) + + def test_uses_module_helper_when_chassis_entry_exists(self): + """Test if uses ModuleHelper when CHASSIS_MODULE_TABLE has entry.""" + from mellanox_bfb_installer import reset_dpu + + mock_log = mock.MagicMock() + mock_dpu_ctl = mock.MagicMock() + mock_helper = mock.MagicMock() + with ( + mock.patch.object(reset_dpu, "logger", mock_log), + mock.patch.object(reset_dpu, "_is_chassis_module_table_present", return_value=True), + mock.patch.object(reset_dpu, "DpuCtlPlat", return_value=mock_dpu_ctl), + mock.patch.object(reset_dpu, "ModuleHelper", return_value=mock_helper), + ): + reset_dpu.reset_dpu("dpu0", False) + mock_log.info.assert_any_call("Using ModuleHelper to reset %s", "dpu0") + mock_helper.module_pre_shutdown.assert_called_once_with("dpu0") + mock_dpu_ctl.dpu_reboot.assert_called_once_with(forced=True, skip_pre_post=True) + mock_helper.module_post_startup.assert_called_once_with("dpu0") + + +if __name__ == "__main__": + unittest.main() diff --git a/platform/mellanox/platform-utils/tests/mellanox_bfb_installer/test_rshim_daemon.py b/platform/mellanox/platform-utils/tests/mellanox_bfb_installer/test_rshim_daemon.py new file mode 100644 index 00000000000..2a85d0b1951 --- /dev/null +++ b/platform/mellanox/platform-utils/tests/mellanox_bfb_installer/test_rshim_daemon.py @@ -0,0 +1,172 @@ +#!/usr/bin/env python3 +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +""" +Unit tests for mellanox_bfb_installer.rshim_daemon module. +""" + +import os +import sys +import unittest +from unittest import mock + +sys.path.insert(0, os.path.abspath(os.path.join(os.path.dirname(__file__), "..", ".."))) + + +class TestRshimDaemon(unittest.TestCase): + """Tests for rshim_daemon module.""" + + def test_start_rshim_daemon_success(self): + from mellanox_bfb_installer import rshim_daemon + + with mock.patch.object(rshim_daemon.subprocess, "run") as mock_run: + mock_run.return_value = mock.MagicMock(returncode=0) + self.assertTrue(rshim_daemon.start_rshim_daemon("0", "0000:08:00.0")) + mock_run.assert_called_once() + # Check the subprocess.run call arguments strictly to make sure the io capturing isn't accidentally enabled. + pos_args = mock_run.call_args[0] + kwargs = mock_run.call_args[1] + self.assertEqual(len(pos_args), 1, "subprocess.run should be called with exactly one positional argument") + self.assertEqual(kwargs, {}, "subprocess.run should be called with no keyword arguments") + call_args = pos_args[0] + expected = [ + "start-stop-daemon", + "--start", + "--quiet", + "--background", + "--make-pidfile", + "--pidfile", + "/var/run/rshim_0.pid", + "--exec", + rshim_daemon.RSHIM_BINARY, + "--", + "-f", + "-i", + "0", + "-d", + "pcie-0000:08:00.0", + ] + self.assertEqual(call_args, expected, "subprocess.run args") + + def test_start_rshim_daemon_failure_logs_and_returns_false(self): + from mellanox_bfb_installer import rshim_daemon + + mock_log = mock.MagicMock() + with ( + mock.patch.object(rshim_daemon, "logger", mock_log), + mock.patch.object(rshim_daemon.subprocess, "run") as mock_run, + ): + mock_run.return_value = mock.MagicMock(returncode=1) + self.assertFalse(rshim_daemon.start_rshim_daemon("1", "0000:09:00.0")) + mock_log.error.assert_called_once() + # logger.error("Failed to start rshim for rshim%s", rid) -> args[0] is format string + self.assertIn("Failed to start rshim for rshim", mock_log.error.call_args[0][0]) + self.assertEqual(mock_log.error.call_args[0][1], "1") + + def test_stop_rshim_daemon_returns_false_when_no_pidfile(self): + from mellanox_bfb_installer import rshim_daemon + + mock_log = mock.MagicMock() + with ( + mock.patch.object(rshim_daemon, "logger", mock_log), + mock.patch.object(rshim_daemon.os.path, "isfile", return_value=False), + mock.patch.object(rshim_daemon.subprocess, "run") as mock_run, + ): + self.assertFalse(rshim_daemon.stop_rshim_daemon("0")) + mock_run.assert_not_called() + mock_log.warning.assert_called_once() + self.assertIn("missing pidfile", mock_log.warning.call_args[0][0]) + + def test_stop_rshim_daemon_calls_start_stop_daemon_when_pidfile_exists(self): + from mellanox_bfb_installer import rshim_daemon + + with ( + mock.patch.object(rshim_daemon.os.path, "isfile", return_value=True), + mock.patch.object(rshim_daemon.subprocess, "run") as mock_run, + ): + mock_run.return_value = mock.MagicMock(returncode=0) + self.assertTrue(rshim_daemon.stop_rshim_daemon("0")) + mock_run.assert_called_once() + # Check the subprocess.run call arguments strictly to make sure the io capturing isn't accidentally enabled. + pos_args = mock_run.call_args[0] + kwargs = mock_run.call_args[1] + self.assertEqual(len(pos_args), 1, "subprocess.run should be called with exactly one positional argument") + self.assertEqual(kwargs, {}, "subprocess.run should be called with no keyword arguments") + call_args = pos_args[0] + expected = [ + "start-stop-daemon", + "--stop", + "--quiet", + "--pidfile", + "/var/run/rshim_0.pid", + "--remove-pidfile", + "--retry", + "TERM/15/KILL/5", + ] + self.assertEqual(len(call_args), len(expected), "subprocess.run args length") + self.assertEqual(call_args, expected, "subprocess.run args") + + def test_stop_rshim_daemon_returns_false_on_nonzero_exit(self): + from mellanox_bfb_installer import rshim_daemon + + mock_log = mock.MagicMock() + with ( + mock.patch.object(rshim_daemon, "logger", mock_log), + mock.patch.object(rshim_daemon.os.path, "isfile", return_value=True), + mock.patch.object(rshim_daemon.subprocess, "run") as mock_run, + ): + mock_run.return_value = mock.MagicMock(returncode=1) + self.assertFalse(rshim_daemon.stop_rshim_daemon("1")) + mock_log.warning.assert_called_once() + self.assertIn("exit code", mock_log.warning.call_args[0][0]) + + def test_stop_rshim_daemon_returns_false_on_subprocess_exception(self): + from mellanox_bfb_installer import rshim_daemon + + mock_log = mock.MagicMock() + with ( + mock.patch.object(rshim_daemon, "logger", mock_log), + mock.patch.object(rshim_daemon.os.path, "isfile", return_value=True), + mock.patch.object(rshim_daemon.subprocess, "run", side_effect=OSError("boom")), + ): + self.assertFalse(rshim_daemon.stop_rshim_daemon("0")) + mock_log.error.assert_called_once() + self.assertIn("Failed to stop rshim", mock_log.error.call_args[0][0]) + + def test_wait_for_rshim_boot_returns_true_when_boot_exists(self): + from mellanox_bfb_installer import rshim_daemon + + with mock.patch.object(rshim_daemon.os.path, "exists", return_value=True): + self.assertTrue(rshim_daemon.wait_for_rshim_boot("rshim0")) + + def test_wait_for_rshim_boot_returns_false_and_logs_on_timeout(self): + from mellanox_bfb_installer import rshim_daemon + + mock_log = mock.MagicMock() + with ( + mock.patch.object(rshim_daemon, "logger", mock_log), + mock.patch.object(rshim_daemon.os.path, "exists", return_value=False), + mock.patch.object(rshim_daemon.time, "sleep"), # avoid 10s sleep + ): + self.assertFalse(rshim_daemon.wait_for_rshim_boot("rshim0")) + mock_log.error.assert_called_once() + self.assertIn("Boot file did not appear after 10 seconds", mock_log.error.call_args[0][0]) + + +if __name__ == "__main__": + unittest.main() diff --git a/platform/mellanox/platform-utils/tests/pyproject.toml b/platform/mellanox/platform-utils/tests/pyproject.toml new file mode 100644 index 00000000000..6b166d11905 --- /dev/null +++ b/platform/mellanox/platform-utils/tests/pyproject.toml @@ -0,0 +1,21 @@ +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +[tool.black] +# Allow longer lines in tests due to mocks, etc. +# It ends up being more readable to not break up the lines. +line-length = 120 diff --git a/platform/mellanox/fw-manager/tests/test_asic_manager.py b/platform/mellanox/platform-utils/tests/test_asic_manager.py similarity index 100% rename from platform/mellanox/fw-manager/tests/test_asic_manager.py rename to platform/mellanox/platform-utils/tests/test_asic_manager.py diff --git a/platform/mellanox/fw-manager/tests/test_bluefield_manager.py b/platform/mellanox/platform-utils/tests/test_bluefield_manager.py similarity index 100% rename from platform/mellanox/fw-manager/tests/test_bluefield_manager.py rename to platform/mellanox/platform-utils/tests/test_bluefield_manager.py diff --git a/platform/mellanox/platform-utils/tests/test_component_versions.py b/platform/mellanox/platform-utils/tests/test_component_versions.py new file mode 100644 index 00000000000..89b2ef90318 --- /dev/null +++ b/platform/mellanox/platform-utils/tests/test_component_versions.py @@ -0,0 +1,155 @@ +# +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2025-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +import os +import sys +from unittest import mock + +sys.path.insert(0, os.path.join(os.path.dirname(__file__), '..')) + +from mellanox_component_versions.main import ( + parse_fw_version_sw, + parse_fw_version_dpu, + parse_compiled_components_file, + get_platform_component_versions, + get_current_version, + get_component_rules +) + + +class TestParseFwVersion: + FW_XML_OUTPUT = """ + + + + + + + + + + + + + + + + + + + """ + + def test_parse_fw_version_sw_valid_xml(self): + versions = parse_fw_version_sw(self.FW_XML_OUTPUT) + assert versions == ["10.20.1000", "10.20.2000"] + + def test_parse_fw_version_dpu_valid_xml(self): + versions = parse_fw_version_dpu(self.FW_XML_OUTPUT) + assert len(versions) == 1 + assert versions[0] == "20.30.1000" + + def test_parse_fw_version_invalid_xml(self): + invalid_xml = "not valid xml" + versions = parse_fw_version_sw(invalid_xml) + assert versions == ["N/A"] + + +class TestParseCompiledComponentsFile: + + @mock.patch('os.path.exists') + @mock.patch('builtins.open', new_callable=mock.mock_open, read_data="MFT 4.20.0\nSDK 4.5.2010\nKERNEL 5.10.0\n") + @mock.patch('mellanox_component_versions.main.get_asic_type', return_value="mellanox") + def test_parse_compiled_components_file_exists(self, mock_asic_type, mock_file, mock_exists): + mock_exists.return_value = True + + result = parse_compiled_components_file() + assert result["MFT"] == "4.20.0" + assert result["SDK"] == "4.5.2010" + assert result["KERNEL"] == "5.10.0" + assert "SIMX" in result + + @mock.patch('os.path.exists') + @mock.patch('mellanox_component_versions.main.get_asic_type', return_value="mellanox") + def test_parse_compiled_components_file_not_exists(self, mock_asic_type, mock_exists): + mock_exists.return_value = False + + result = parse_compiled_components_file() + # All components should be N/A + for comp in list(get_component_rules().keys()) + ["SIMX"]: + assert result[comp] == "N/A" + + @mock.patch('os.path.exists', return_value=True) + @mock.patch('builtins.open', new_callable=mock.mock_open, + read_data="MFT 4.20.0\nSDK 4.5.2010\nSAI 1.0.0\nSAI_API_HEADERS 1.14.0\nKERNEL 5.10.0\nBFSOC 1.2.3\n") + @mock.patch('mellanox_component_versions.main.get_asic_type', return_value="bluefield") + def test_parse_compiled_components_file_dpu_with_sai_api_headers(self, mock_asic_type, mock_file, mock_exists): + result = parse_compiled_components_file() + + assert result["MFT"] == "4.20.0" + assert result["SDK"] == "4.5.2010" + assert result["SAI"] == "1.0.0" + assert result["SAI_API_HEADERS"] == "1.14.0" + assert result["KERNEL"] == "5.10.0" + assert result["BFSOC"] == "1.2.3" + assert "SIMX" in result + + +class TestGetPlatformComponentVersions: + + @mock.patch('mellanox_component_versions.main.get_pdp') + def test_get_platform_component_versions_success(self, mock_get_pdp): + mock_onie = mock.Mock() + mock_onie.get_firmware_version.return_value = "2019.11-5.2.0020-115200" + mock_bios = mock.Mock() + mock_bios.get_firmware_version.return_value = "1.2.3" + + versions_map = { + "ONIE": mock_onie, + "BIOS": mock_bios + } + mock_ccm = {"chassis1": versions_map} + + mock_pdp = mock.Mock() + mock_pdp.chassis_component_map = mock_ccm + mock_pdp.chassis.get_name.return_value = "chassis1" + mock_get_pdp.return_value = mock_pdp + + result = get_platform_component_versions() + assert result["ONIE"] == "2019.11-5.2.0020-115200" + assert result["BIOS"] == "1.2.3" + + +class TestGetCurrentVersion: + + @mock.patch('mellanox_component_versions.main.process_rule') + @mock.patch('mellanox_component_versions.main.get_asic_type', return_value="mellanox") + def test_get_current_version_success(self, mock_asic_type, mock_process): + mock_process.return_value = (True, "1.2.3") + + unique, version = get_current_version("MFT") + assert unique == True + assert version == "1.2.3" + + @mock.patch('mellanox_component_versions.main.process_rule') + @mock.patch('mellanox_component_versions.main.get_asic_type', return_value="mellanox") + def test_get_current_version_exception(self, mock_asic_type, mock_process): + mock_process.side_effect = Exception("Test error") + + unique, version = get_current_version("MFT") + assert unique == True + assert version == "N/A" diff --git a/platform/mellanox/fw-manager/tests/test_firmware_base.py b/platform/mellanox/platform-utils/tests/test_firmware_base.py similarity index 79% rename from platform/mellanox/fw-manager/tests/test_firmware_base.py rename to platform/mellanox/platform-utils/tests/test_firmware_base.py index 1df3a44c3fe..1eff01ace63 100644 --- a/platform/mellanox/fw-manager/tests/test_firmware_base.py +++ b/platform/mellanox/platform-utils/tests/test_firmware_base.py @@ -520,10 +520,11 @@ def test_get_firmware_versions_success(self, mock_run, mock_sleep): self.assertEqual(available, "2.0.0") mock_sleep.assert_not_called() + @patch('mellanox_fw_manager.firmware_base.time.monotonic') @patch('mellanox_fw_manager.firmware_base.time.sleep') @patch('mellanox_fw_manager.firmware_base.subprocess.run') - def test_get_firmware_versions_command_failure(self, mock_run, mock_sleep): - """Test _get_firmware_versions when command fails with retry logic""" + def test_get_firmware_versions_command_failure(self, mock_run, mock_sleep, mock_monotonic): + """Test _get_firmware_versions when command fails with time-bounded retry""" with patch.object(ConcreteFirmwareManager, '_initialize_asic'): manager = ConcreteFirmwareManager( asic_index=0, @@ -531,7 +532,8 @@ def test_get_firmware_versions_command_failure(self, mock_run, mock_sleep): asic_type="test" ) - mock_run.return_value = MagicMock(returncode=1) + mock_run.return_value = MagicMock(returncode=1, stdout='') + mock_monotonic.side_effect = [0, 20, 45, 61] with patch.object(manager.logger, 'info') as mock_info: with patch.object(manager.logger, 'error') as mock_error: @@ -539,16 +541,23 @@ def test_get_firmware_versions_command_failure(self, mock_run, mock_sleep): self.assertIsNone(current) self.assertIsNone(available) - self.assertEqual(mock_run.call_count, 10) - self.assertEqual(mock_sleep.call_count, 9) - # 10 "Executing" logs from run_command + 9 "Unable to query" logs = 19 total - self.assertEqual(mock_info.call_count, 19) - mock_error.assert_called_once_with("Failed to get firmware versions after 10 attempts: Query returned non-zero exit code") + self.assertEqual(mock_run.call_count, 3) + self.assertEqual(mock_sleep.call_count, 2) + mock_sleep.assert_any_call(1) + mock_sleep.assert_any_call(2) + self.assertEqual(mock_info.call_count, 5) + mock_error.assert_called_once() + error_msg = mock_error.call_args[0][0] + self.assertIn("Failed to get firmware versions", error_msg) + self.assertIn("01:00.0", error_msg) + self.assertIn("3 attempts", error_msg) + self.assertIn("61s elapsed", error_msg) + @patch('mellanox_fw_manager.firmware_base.time.monotonic') @patch('mellanox_fw_manager.firmware_base.time.sleep') @patch('mellanox_fw_manager.firmware_base.subprocess.run') - def test_get_firmware_versions_xml_parsing_error(self, mock_run, mock_sleep): - """Test _get_firmware_versions with XML parsing error and retry logic""" + def test_get_firmware_versions_xml_parsing_error(self, mock_run, mock_sleep, mock_monotonic): + """Test _get_firmware_versions with missing XML tags and time-bounded retry""" with patch.object(ConcreteFirmwareManager, '_initialize_asic'): manager = ConcreteFirmwareManager( asic_index=0, @@ -557,6 +566,7 @@ def test_get_firmware_versions_xml_parsing_error(self, mock_run, mock_sleep): ) mock_run.return_value = MagicMock(returncode=0, stdout="invalid xml") + mock_monotonic.side_effect = [0, 20, 45, 61] with patch.object(manager.logger, 'info') as mock_info: with patch.object(manager.logger, 'error') as mock_error: @@ -564,16 +574,19 @@ def test_get_firmware_versions_xml_parsing_error(self, mock_run, mock_sleep): self.assertIsNone(current) self.assertIsNone(available) - self.assertEqual(mock_run.call_count, 10) - self.assertEqual(mock_sleep.call_count, 9) - # 10 "Executing" logs from run_command + 9 "Unable to..." logs = 19 total - self.assertEqual(mock_info.call_count, 19) + self.assertEqual(mock_run.call_count, 3) + self.assertEqual(mock_sleep.call_count, 2) + self.assertEqual(mock_info.call_count, 5) mock_error.assert_called_once() + error_msg = mock_error.call_args[0][0] + self.assertIn("No XML device data found", error_msg) + self.assertIn("01:00.0", error_msg) + @patch('mellanox_fw_manager.firmware_base.time.monotonic') @patch('mellanox_fw_manager.firmware_base.time.sleep') @patch('mellanox_fw_manager.firmware_base.subprocess.run') - def test_get_firmware_versions_success_on_retry(self, mock_run, mock_sleep): - """Test _get_firmware_versions succeeds on third attempt""" + def test_get_firmware_versions_success_on_retry(self, mock_run, mock_sleep, mock_monotonic): + """Test _get_firmware_versions succeeds on third attempt with back off""" with patch.object(ConcreteFirmwareManager, '_initialize_asic'): manager = ConcreteFirmwareManager( asic_index=0, @@ -591,10 +604,11 @@ def test_get_firmware_versions_success_on_retry(self, mock_run, mock_sleep): ''' mock_run.side_effect = [ - MagicMock(returncode=1), - MagicMock(returncode=1), + MagicMock(returncode=1, stdout=''), + MagicMock(returncode=1, stdout=''), MagicMock(returncode=0, stdout=xml_output) ] + mock_monotonic.side_effect = [0, 1, 3] with patch.object(manager.logger, 'info') as mock_info: current, available = manager._get_firmware_versions() @@ -603,12 +617,14 @@ def test_get_firmware_versions_success_on_retry(self, mock_run, mock_sleep): self.assertEqual(available, "2.0.0") self.assertEqual(mock_run.call_count, 3) self.assertEqual(mock_sleep.call_count, 2) - # 3 "Executing" logs from run_command + 2 "Unable to query" logs = 5 total + mock_sleep.assert_any_call(1) + mock_sleep.assert_any_call(2) self.assertEqual(mock_info.call_count, 5) + @patch('mellanox_fw_manager.firmware_base.time.monotonic') @patch('mellanox_fw_manager.firmware_base.time.sleep') @patch('mellanox_fw_manager.firmware_base.subprocess.run') - def test_get_firmware_versions_missing_version_field(self, mock_run, mock_sleep): + def test_get_firmware_versions_missing_version_field(self, mock_run, mock_sleep, mock_monotonic): """Test _get_firmware_versions when version field is missing""" with patch.object(ConcreteFirmwareManager, '_initialize_asic'): manager = ConcreteFirmwareManager( @@ -627,6 +643,7 @@ def test_get_firmware_versions_missing_version_field(self, mock_run, mock_sleep) ''' mock_run.return_value = MagicMock(returncode=0, stdout=xml_output) + mock_monotonic.side_effect = [0, 20, 45, 61] with patch.object(manager.logger, 'info') as mock_info: with patch.object(manager.logger, 'error') as mock_error: @@ -634,15 +651,18 @@ def test_get_firmware_versions_missing_version_field(self, mock_run, mock_sleep) self.assertIsNone(current) self.assertIsNone(available) - self.assertEqual(mock_run.call_count, 10) - self.assertEqual(mock_sleep.call_count, 9) - # 10 "Executing" logs from run_command + 9 "Unable to parse" logs = 19 total - self.assertEqual(mock_info.call_count, 19) - mock_error.assert_called_once_with("Failed to get firmware versions after 10 attempts: Version or PSID not found in response") + self.assertEqual(mock_run.call_count, 3) + self.assertEqual(mock_sleep.call_count, 2) + self.assertEqual(mock_info.call_count, 5) + mock_error.assert_called_once() + error_msg = mock_error.call_args[0][0] + self.assertIn("Version or PSID not found", error_msg) + self.assertIn("01:00.0", error_msg) + @patch('mellanox_fw_manager.firmware_base.time.monotonic') @patch('mellanox_fw_manager.firmware_base.time.sleep') @patch('mellanox_fw_manager.firmware_base.subprocess.run') - def test_get_firmware_versions_missing_psid_field(self, mock_run, mock_sleep): + def test_get_firmware_versions_missing_psid_field(self, mock_run, mock_sleep, mock_monotonic): """Test _get_firmware_versions when psid field is missing""" with patch.object(ConcreteFirmwareManager, '_initialize_asic'): manager = ConcreteFirmwareManager( @@ -661,6 +681,7 @@ def test_get_firmware_versions_missing_psid_field(self, mock_run, mock_sleep): ''' mock_run.return_value = MagicMock(returncode=0, stdout=xml_output) + mock_monotonic.side_effect = [0, 20, 45, 61] with patch.object(manager.logger, 'info') as mock_info: with patch.object(manager.logger, 'error') as mock_error: @@ -668,11 +689,13 @@ def test_get_firmware_versions_missing_psid_field(self, mock_run, mock_sleep): self.assertIsNone(current) self.assertIsNone(available) - self.assertEqual(mock_run.call_count, 10) - self.assertEqual(mock_sleep.call_count, 9) - # 10 "Executing" logs from run_command + 9 "Unable to parse" logs = 19 total - self.assertEqual(mock_info.call_count, 19) - mock_error.assert_called_once_with("Failed to get firmware versions after 10 attempts: Version or PSID not found in response") + self.assertEqual(mock_run.call_count, 3) + self.assertEqual(mock_sleep.call_count, 2) + self.assertEqual(mock_info.call_count, 5) + mock_error.assert_called_once() + error_msg = mock_error.call_args[0][0] + self.assertIn("Version or PSID not found", error_msg) + self.assertIn("01:00.0", error_msg) def test_get_env_verbose_mode(self): """Test _get_env with verbose mode""" @@ -761,6 +784,108 @@ def test_clear_semaphore_general_exception(self, mock_run): self.assertFalse(result) + @patch('mellanox_fw_manager.firmware_base.subprocess.run') + def test_query_firmware_versions_current_version_dashes(self, mock_run): + """Test _query_firmware_versions rejects current_version='--' as invalid""" + with patch.object(ConcreteFirmwareManager, '_initialize_asic'): + manager = ConcreteFirmwareManager( + asic_index=0, + pci_id="01:00.0", + asic_type="test" + ) + + xml_output = ''' + + + + + + + ''' + mock_run.return_value = MagicMock(returncode=0, stdout=xml_output) + + with self.assertRaises(FirmwareManagerError) as context: + manager._query_firmware_versions() + + self.assertIn("Version or PSID not found", str(context.exception)) + + @patch('mellanox_fw_manager.firmware_base.subprocess.run') + def test_query_firmware_versions_mixed_debug_xml(self, mock_run): + """Test _query_firmware_versions extracts XML from mixed debug output""" + with patch.object(ConcreteFirmwareManager, '_initialize_asic'): + manager = ConcreteFirmwareManager( + asic_index=0, + pci_id="01:00.0", + asic_type="test" + ) + + mixed_output = ( + 'DEBUG: some debug line\n' + 'FLASH_ACCESS: reading register 0x1234\n' + '\n' + ' \n' + ' \n' + ' \n' + ' \n' + ' \n' + '\n' + 'DEBUG: done\n' + ) + mock_run.return_value = MagicMock(returncode=0, stdout=mixed_output) + + current, available = manager._query_firmware_versions() + + self.assertEqual(current, "1.0.0") + self.assertEqual(available, "2.0.0") + + @patch('mellanox_fw_manager.firmware_base.time.monotonic') + @patch('mellanox_fw_manager.firmware_base.time.sleep') + def test_get_firmware_versions_rc523_logging(self, mock_sleep, mock_monotonic): + """Test rc=523 error uses ASIC-not-ready log message""" + with patch.object(ConcreteFirmwareManager, '_initialize_asic'): + manager = ConcreteFirmwareManager( + asic_index=0, + pci_id="01:00.0", + asic_type="test" + ) + + mock_monotonic.side_effect = [0, 5, 61] + rc523_error = FirmwareManagerError("Query failed rc = 523 details") + + with patch.object(manager, '_query_firmware_versions', side_effect=rc523_error): + with patch.object(manager.logger, 'info') as mock_info: + with patch.object(manager.logger, 'error'): + manager._get_firmware_versions() + + info_msgs = [call[0][0] for call in mock_info.call_args_list] + self.assertTrue(any("rc=523" in msg for msg in info_msgs)) + self.assertTrue( + any("ASIC not ready" in msg for msg in info_msgs) + ) + + @patch('mellanox_fw_manager.firmware_base.time.monotonic') + @patch('mellanox_fw_manager.firmware_base.time.sleep') + def test_get_firmware_versions_exponential_backoff_timing(self, mock_sleep, mock_monotonic): + """Test exponential back off delays double each retry and cap at 16s""" + with patch.object(ConcreteFirmwareManager, '_initialize_asic'): + manager = ConcreteFirmwareManager( + asic_index=0, + pci_id="01:00.0", + asic_type="test" + ) + + mock_monotonic.side_effect = [0, 1, 2, 4, 8, 16, 32, 48, 61] + + with patch.object(manager, '_query_firmware_versions', + side_effect=FirmwareManagerError("test error")): + with patch.object(manager.logger, 'info'): + with patch.object(manager.logger, 'error'): + manager._get_firmware_versions() + + expected_sleeps = [1, 2, 4, 8, 16, 16, 12] + actual_sleeps = [call[0][0] for call in mock_sleep.call_args_list] + self.assertEqual(actual_sleeps, expected_sleeps) + if __name__ == '__main__': unittest.main() diff --git a/platform/mellanox/fw-manager/tests/test_firmware_coordinator.py b/platform/mellanox/platform-utils/tests/test_firmware_coordinator.py similarity index 97% rename from platform/mellanox/fw-manager/tests/test_firmware_coordinator.py rename to platform/mellanox/platform-utils/tests/test_firmware_coordinator.py index bc7db1a618f..e0e35f4daa2 100644 --- a/platform/mellanox/fw-manager/tests/test_firmware_coordinator.py +++ b/platform/mellanox/platform-utils/tests/test_firmware_coordinator.py @@ -228,7 +228,9 @@ def test_upgrade_firmware_queue_processing_exception(self, mock_create_manager, coordinator = FirmwareCoordinator() - with patch('mellanox_fw_manager.firmware_coordinator.Queue') as mock_queue: + with patch.object(coordinator, '_start_mst', return_value=True), \ + patch.object(coordinator, '_stop_mst'), \ + patch('mellanox_fw_manager.firmware_coordinator.Queue') as mock_queue: mock_queue_instance = MagicMock() mock_queue.return_value = mock_queue_instance @@ -255,7 +257,9 @@ def test_upgrade_firmware_all_failures(self, mock_create_manager, mock_asic_mana coordinator = FirmwareCoordinator() - with patch('mellanox_fw_manager.firmware_coordinator.Queue') as mock_queue: + with patch.object(coordinator, '_start_mst', return_value=True), \ + patch.object(coordinator, '_stop_mst'), \ + patch('mellanox_fw_manager.firmware_coordinator.Queue') as mock_queue: mock_queue_instance = MagicMock() mock_queue.return_value = mock_queue_instance @@ -295,7 +299,9 @@ def test_upgrade_firmware_partial_failures(self, mock_create_manager, mock_asic_ coordinator = FirmwareCoordinator() - with patch('mellanox_fw_manager.firmware_coordinator.Queue') as mock_queue: + with patch.object(coordinator, '_start_mst', return_value=True), \ + patch.object(coordinator, '_stop_mst'), \ + patch('mellanox_fw_manager.firmware_coordinator.Queue') as mock_queue: mock_queue_instance = MagicMock() mock_queue.return_value = mock_queue_instance @@ -599,7 +605,9 @@ def test_upgrade_firmware_4_asics_all_success(self, mock_create_manager, mock_as coordinator = FirmwareCoordinator() - with patch('mellanox_fw_manager.firmware_coordinator.Queue') as mock_queue_class: + with patch.object(coordinator, '_start_mst', return_value=True), \ + patch.object(coordinator, '_stop_mst'), \ + patch('mellanox_fw_manager.firmware_coordinator.Queue') as mock_queue_class: mock_queue_instance = MagicMock() mock_queue_class.return_value = mock_queue_instance @@ -664,7 +672,9 @@ def track_join(timeout=None): coordinator = FirmwareCoordinator() - with patch('mellanox_fw_manager.firmware_coordinator.Queue') as mock_queue_class: + with patch.object(coordinator, '_start_mst', return_value=True), \ + patch.object(coordinator, '_stop_mst'), \ + patch('mellanox_fw_manager.firmware_coordinator.Queue') as mock_queue_class: mock_queue_instance = MagicMock() mock_queue_class.return_value = mock_queue_instance diff --git a/platform/mellanox/fw-manager/tests/test_firmware_upgrade.py b/platform/mellanox/platform-utils/tests/test_firmware_upgrade.py similarity index 98% rename from platform/mellanox/fw-manager/tests/test_firmware_upgrade.py rename to platform/mellanox/platform-utils/tests/test_firmware_upgrade.py index abc3bbda56d..f5ffee007e7 100644 --- a/platform/mellanox/fw-manager/tests/test_firmware_upgrade.py +++ b/platform/mellanox/platform-utils/tests/test_firmware_upgrade.py @@ -368,7 +368,9 @@ def test_coordinator_firmware_upgrade_success(self, mock_create_manager, mock_create_manager.side_effect = mock_managers - with patch('mellanox_fw_manager.firmware_coordinator.Queue') as mock_queue_class: + with patch.object(FirmwareCoordinator, '_start_mst', return_value=True), \ + patch.object(FirmwareCoordinator, '_stop_mst'), \ + patch('mellanox_fw_manager.firmware_coordinator.Queue') as mock_queue_class: mock_queue = MagicMock() mock_queue.empty.side_effect = [False, False, True] # Two items, then empty mock_queue.get_nowait.side_effect = [ @@ -417,7 +419,9 @@ def test_coordinator_partial_failure(self, mock_create_manager, mock_create_manager.side_effect = mock_managers - with patch('mellanox_fw_manager.firmware_coordinator.Queue') as mock_queue_class: + with patch.object(FirmwareCoordinator, '_start_mst', return_value=True), \ + patch.object(FirmwareCoordinator, '_stop_mst'), \ + patch('mellanox_fw_manager.firmware_coordinator.Queue') as mock_queue_class: mock_queue = MagicMock() mock_queue.empty.side_effect = [False, False, True] # Two items, then empty mock_queue.get_nowait.side_effect = [ diff --git a/platform/mellanox/fw-manager/tests/test_init.py b/platform/mellanox/platform-utils/tests/test_init.py similarity index 100% rename from platform/mellanox/fw-manager/tests/test_init.py rename to platform/mellanox/platform-utils/tests/test_init.py diff --git a/platform/mellanox/fw-manager/tests/test_integration.py b/platform/mellanox/platform-utils/tests/test_integration.py similarity index 100% rename from platform/mellanox/fw-manager/tests/test_integration.py rename to platform/mellanox/platform-utils/tests/test_integration.py diff --git a/platform/mellanox/platform-utils/tests/test_main.py b/platform/mellanox/platform-utils/tests/test_main.py new file mode 100644 index 00000000000..a982e98fa56 --- /dev/null +++ b/platform/mellanox/platform-utils/tests/test_main.py @@ -0,0 +1,405 @@ +#!/usr/bin/env python3 +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +""" +Comprehensive unit tests for main.py CLI module + +This file tests both the CLI command functionality and module-level helper functions. +""" + +from click.testing import CliRunner +from mellanox_fw_manager.fw_manager import FirmwareManagerError, FirmwareUpgradeError, FirmwareUpgradePartialError +from mellanox_fw_manager.main import ( + setup_logging, _exit_if_qemu, _lock_state_change, + handle_reset, handle_dry_run, handle_upgrade, main, + EXIT_SUCCESS, EXIT_FAILURE, FW_UPGRADE_IS_REQUIRED +) +import os +import sys +import unittest +from unittest.mock import patch, MagicMock, mock_open +import tempfile + +sys.path.insert(0, os.path.join(os.path.dirname(__file__), '..')) + + +class TestMainModule(unittest.TestCase): + """Test cases for main module helper functions""" + + def setUp(self): + """Set up test fixtures""" + self.temp_dir = tempfile.mkdtemp() + + def tearDown(self): + """Clean up test fixtures""" + import shutil + shutil.rmtree(self.temp_dir, ignore_errors=True) + + @patch('mellanox_fw_manager.main.logging.getLogger') + @patch('mellanox_fw_manager.main.logging.handlers.SysLogHandler') + @patch('mellanox_fw_manager.main.logging.StreamHandler') + def test_setup_logging_verbose(self, mock_stream_handler, mock_syslog_handler, mock_get_logger): + """Test setup_logging with verbose=True""" + mock_logger = MagicMock() + mock_get_logger.return_value = mock_logger + + setup_logging(verbose=True) + + self.assertEqual(mock_logger.addHandler.call_count, 2) + mock_syslog_handler.assert_called_once() + mock_stream_handler.assert_called_once() + + @patch('mellanox_fw_manager.main.logging.getLogger') + @patch('mellanox_fw_manager.main.logging.handlers.SysLogHandler') + def test_setup_logging_not_verbose(self, mock_syslog_handler, mock_get_logger): + """Test setup_logging with verbose=False""" + mock_logger = MagicMock() + mock_get_logger.return_value = mock_logger + + setup_logging(verbose=False) + + mock_logger.addHandler.assert_called_once() + mock_syslog_handler.assert_called_once() + + @patch('mellanox_fw_manager.main.subprocess.run') + @patch('mellanox_fw_manager.main.logger') + def test_exit_if_qemu_not_qemu(self, mock_logger, mock_run): + """Test _exit_if_qemu when not running on QEMU""" + mock_run.return_value.stdout = "Some other device" + mock_run.return_value.returncode = 0 + + try: + _exit_if_qemu() + except SystemExit: + self.fail("_exit_if_qemu() raised SystemExit unexpectedly") + + @patch('mellanox_fw_manager.main.subprocess.run') + @patch('mellanox_fw_manager.main.logger') + def test_exit_if_qemu_is_qemu(self, mock_logger, mock_run): + """Test _exit_if_qemu when running on QEMU""" + mock_run.return_value.stdout = "SimX device detected" + mock_run.return_value.returncode = 0 + + with self.assertRaises(SystemExit) as cm: + _exit_if_qemu() + + self.assertEqual(cm.exception.code, 0) + + @patch('mellanox_fw_manager.main.subprocess.run') + @patch('mellanox_fw_manager.main.logger') + def test_exit_if_qemu_command_fails(self, mock_logger, mock_run): + """Test _exit_if_qemu when lspci command fails""" + mock_run.return_value.returncode = 1 + + try: + _exit_if_qemu() + except SystemExit: + self.fail("_exit_if_qemu() raised SystemExit when command failed") + + @patch('mellanox_fw_manager.main.subprocess.run') + @patch('mellanox_fw_manager.main.logger') + def test_exit_if_qemu_exception_handling(self, mock_logger, mock_run): + """Test _exit_if_qemu exception handling (line 69)""" + mock_run.side_effect = Exception("Command failed") + + try: + _exit_if_qemu() + mock_logger.warning.assert_called_once() + except SystemExit: + self.fail("_exit_if_qemu() raised SystemExit when exception occurred") + + @patch('mellanox_fw_manager.main.logger') + def test_lock_state_change_context_manager(self, mock_logger): + """Test _lock_state_change as context manager""" + with patch('mellanox_fw_manager.main.fcntl.flock') as mock_flock: + with patch('builtins.open', mock_open()) as mock_file: + with _lock_state_change(): + pass + + self.assertEqual(mock_flock.call_count, 2) + + @patch('mellanox_fw_manager.main.logger') + def test_lock_state_change_exception_handling(self, mock_logger): + """Test _lock_state_change exception handling""" + with patch('mellanox_fw_manager.main.fcntl.flock', side_effect=OSError("Permission denied")): + with patch('builtins.open', mock_open()): + with self.assertRaises(FirmwareManagerError): + with _lock_state_change(): + pass + + def test_main_function_exists(self, ): + """Test that main function exists and is callable""" + self.assertTrue(callable(main)) + + +class TestHandlerFunctions(unittest.TestCase): + """Test cases for individual handler functions""" + + def setUp(self): + """Set up test fixtures""" + self.temp_dir = tempfile.mkdtemp() + + def tearDown(self): + """Clean up test fixtures""" + import shutil + shutil.rmtree(self.temp_dir, ignore_errors=True) + + @patch('mellanox_fw_manager.main.FirmwareCoordinator') + def test_handle_reset_success(self, mock_coordinator_class): + """Test handle_reset successful operation""" + mock_coordinator = MagicMock() + mock_coordinator.reset_firmware_config.return_value = None + mock_coordinator_class.return_value = mock_coordinator + + with patch('builtins.print') as mock_print: + result = handle_reset(verbose=False) + + self.assertEqual(result, EXIT_SUCCESS) + mock_coordinator.reset_firmware_config.assert_called_once() + mock_print.assert_called_with("Firmware configuration reset completed successfully.") + + @patch('mellanox_fw_manager.main.FirmwareCoordinator') + def test_handle_reset_failure(self, mock_coordinator_class): + """Test handle_reset failure""" + mock_coordinator = MagicMock() + mock_coordinator.reset_firmware_config.side_effect = Exception("Reset failed") + mock_coordinator_class.return_value = mock_coordinator + + with patch('builtins.print') as mock_print: + result = handle_reset(verbose=False) + + self.assertEqual(result, EXIT_FAILURE) + + @patch('mellanox_fw_manager.main.FirmwareCoordinator') + @patch('mellanox_fw_manager.main.logger') + def test_handle_dry_run_upgrade_required(self, mock_logger, mock_coordinator_class): + """Test handle_dry_run when upgrade is required""" + mock_coordinator = MagicMock() + mock_coordinator.check_upgrade_required.return_value = True + mock_coordinator_class.return_value = mock_coordinator + + with patch('builtins.print') as mock_print: + result = handle_dry_run(verbose=False, upgrade=False) + + self.assertEqual(result, FW_UPGRADE_IS_REQUIRED) + mock_print.assert_called_with("Firmware upgrade is required.") + + @patch('mellanox_fw_manager.main.FirmwareCoordinator') + @patch('mellanox_fw_manager.main.logger') + def test_handle_dry_run_up_to_date(self, mock_logger, mock_coordinator_class): + """Test handle_dry_run when firmware is up to date""" + mock_coordinator = MagicMock() + mock_coordinator.check_upgrade_required.return_value = False + mock_coordinator_class.return_value = mock_coordinator + + with patch('builtins.print') as mock_print: + result = handle_dry_run(verbose=False, upgrade=False) + + self.assertEqual(result, EXIT_SUCCESS) + mock_print.assert_called_with("Firmware is up to date.") + + @patch('mellanox_fw_manager.main.FirmwareCoordinator') + @patch('mellanox_fw_manager.main.logger') + def test_handle_dry_run_exception(self, mock_logger, mock_coordinator_class): + """Test handle_dry_run exception handling""" + mock_coordinator_class.side_effect = Exception("Check failed") + + with patch('builtins.print') as mock_print: + result = handle_dry_run(verbose=False, upgrade=False) + + self.assertEqual(result, EXIT_FAILURE) + + @patch('mellanox_fw_manager.main.FirmwareCoordinator') + @patch('mellanox_fw_manager.main.logger') + def test_handle_upgrade_success(self, mock_logger, mock_coordinator_class): + """Test handle_upgrade successful operation""" + mock_coordinator = MagicMock() + mock_coordinator.check_upgrade_required.return_value = True + mock_coordinator.upgrade_firmware.return_value = None + mock_coordinator_class.return_value = mock_coordinator + + with patch('builtins.print') as mock_print: + result = handle_upgrade(verbose=False, upgrade=False, clear_semaphore=False) + + self.assertEqual(result, EXIT_SUCCESS) + mock_coordinator.upgrade_firmware.assert_called_once() + + @patch('mellanox_fw_manager.main.FirmwareCoordinator') + @patch('mellanox_fw_manager.main.logger') + def test_handle_upgrade_up_to_date(self, mock_logger, mock_coordinator_class): + """Test handle_upgrade when firmware is already up to date""" + mock_coordinator = MagicMock() + mock_coordinator.check_upgrade_required.return_value = False + mock_coordinator_class.return_value = mock_coordinator + + with patch('builtins.print') as mock_print: + result = handle_upgrade(verbose=False, upgrade=False, clear_semaphore=False) + + self.assertEqual(result, EXIT_SUCCESS) + mock_coordinator.upgrade_firmware.assert_not_called() + mock_print.assert_called_with("Firmware is up to date.") + + @patch('mellanox_fw_manager.main.FirmwareCoordinator') + @patch('mellanox_fw_manager.main.logger') + def test_handle_upgrade_failure(self, mock_logger, mock_coordinator_class): + """Test handle_upgrade with FirmwareUpgradeError""" + mock_coordinator = MagicMock() + mock_coordinator.check_upgrade_required.return_value = True + mock_coordinator.upgrade_firmware.side_effect = FirmwareUpgradeError("Upgrade failed") + mock_coordinator_class.return_value = mock_coordinator + + with patch('builtins.print') as mock_print: + result = handle_upgrade(verbose=False, upgrade=False, clear_semaphore=False) + + self.assertEqual(result, EXIT_FAILURE) + + @patch('mellanox_fw_manager.main.FirmwareCoordinator') + @patch('mellanox_fw_manager.main.logger') + def test_handle_upgrade_partial_failure(self, mock_logger, mock_coordinator_class): + """Test handle_upgrade with FirmwareUpgradePartialError""" + mock_coordinator = MagicMock() + mock_coordinator.check_upgrade_required.return_value = True + mock_coordinator.upgrade_firmware.side_effect = FirmwareUpgradePartialError("Partial failure") + mock_coordinator_class.return_value = mock_coordinator + + with patch('builtins.print') as mock_print: + result = handle_upgrade(verbose=False, upgrade=False, clear_semaphore=False) + + self.assertEqual(result, EXIT_SUCCESS) + + @patch('mellanox_fw_manager.main.FirmwareCoordinator') + @patch('mellanox_fw_manager.main.logger') + def test_handle_upgrade_generic_exception(self, mock_logger, mock_coordinator_class): + """Test handle_upgrade with generic exception""" + mock_coordinator = MagicMock() + mock_coordinator.check_upgrade_required.return_value = True + mock_coordinator.upgrade_firmware.side_effect = Exception("Unexpected error") + mock_coordinator_class.return_value = mock_coordinator + + with patch('builtins.print') as mock_print: + result = handle_upgrade(verbose=False, upgrade=False, clear_semaphore=False) + + self.assertEqual(result, EXIT_FAILURE) + + +class TestMainCLI(unittest.TestCase): + """Test main CLI function directly with proper mocking""" + + def setUp(self): + """Set up test fixtures""" + self.temp_dir = tempfile.mkdtemp() + + def tearDown(self): + """Clean up test fixtures""" + import shutil + shutil.rmtree(self.temp_dir, ignore_errors=True) + + @patch('mellanox_fw_manager.main.logger') + @patch('mellanox_fw_manager.main.setup_logging') + @patch('mellanox_fw_manager.main._exit_if_qemu') + @patch('mellanox_fw_manager.main._lock_state_change') + @patch('mellanox_fw_manager.main.handle_upgrade') + def test_verbose_mode_flag(self, mock_handle_upgrade, mock_lock, mock_exit_qemu, mock_setup_logging, mock_logger): + """Test that verbose flag is passed correctly""" + mock_lock.return_value.__enter__ = MagicMock() + mock_lock.return_value.__exit__ = MagicMock() + mock_handle_upgrade.return_value = EXIT_SUCCESS + + runner = CliRunner() + + result = runner.invoke(main, ['--verbose']) + + mock_setup_logging.assert_called_once_with(True, False) + + @patch('mellanox_fw_manager.main.logger') + @patch('mellanox_fw_manager.main.setup_logging') + @patch('mellanox_fw_manager.main._exit_if_qemu') + @patch('mellanox_fw_manager.main._lock_state_change') + @patch('mellanox_fw_manager.main.handle_upgrade') + def test_nosyslog_flag(self, mock_handle_upgrade, mock_lock, mock_exit_qemu, mock_setup_logging, mock_logger): + """Test that nosyslog flag is passed correctly""" + mock_lock.return_value.__enter__ = MagicMock() + mock_lock.return_value.__exit__ = MagicMock() + mock_handle_upgrade.return_value = EXIT_SUCCESS + + runner = CliRunner() + + result = runner.invoke(main, ['--nosyslog']) + + mock_setup_logging.assert_called_once_with(False, True) + + @patch('mellanox_fw_manager.main.logger') + @patch('mellanox_fw_manager.main.setup_logging') + @patch('mellanox_fw_manager.main._exit_if_qemu') + @patch('mellanox_fw_manager.main._lock_state_change') + @patch('mellanox_fw_manager.main.handle_reset') + def test_reset_operation_cli(self, mock_handle_reset, mock_lock, mock_exit_qemu, mock_setup_logging, mock_logger): + """Test main CLI with --reset""" + mock_lock.return_value.__enter__ = MagicMock() + mock_lock.return_value.__exit__ = MagicMock() + mock_handle_reset.return_value = EXIT_SUCCESS + + runner = CliRunner() + result = runner.invoke(main, ['--reset']) + + mock_handle_reset.assert_called_once_with(False) + + @patch('mellanox_fw_manager.main.logger') + @patch('mellanox_fw_manager.main.setup_logging') + @patch('mellanox_fw_manager.main._exit_if_qemu') + @patch('mellanox_fw_manager.main._lock_state_change') + @patch('mellanox_fw_manager.main.handle_dry_run') + def test_dry_run_operation_cli(self, mock_handle_dry_run, mock_lock, mock_exit_qemu, mock_setup_logging, mock_logger): + """Test main CLI with --dry-run""" + mock_lock.return_value.__enter__ = MagicMock() + mock_lock.return_value.__exit__ = MagicMock() + mock_handle_dry_run.return_value = EXIT_SUCCESS + + runner = CliRunner() + result = runner.invoke(main, ['--dry-run']) + + mock_handle_dry_run.assert_called_once_with(False, False) + + @patch('mellanox_fw_manager.main.logger') + @patch('mellanox_fw_manager.main.setup_logging') + @patch('mellanox_fw_manager.main._exit_if_qemu') + @patch('mellanox_fw_manager.main._lock_state_change') + @patch('mellanox_fw_manager.main.handle_upgrade') + def test_upgrade_with_flags_cli(self, mock_handle_upgrade, mock_lock, mock_exit_qemu, mock_setup_logging, mock_logger): + """Test main CLI with --upgrade and --clear-semaphore""" + mock_lock.return_value.__enter__ = MagicMock() + mock_lock.return_value.__exit__ = MagicMock() + mock_handle_upgrade.return_value = EXIT_SUCCESS + + runner = CliRunner() + + result = runner.invoke(main, ['--upgrade', '--clear-semaphore']) + + mock_handle_upgrade.assert_called_once_with(False, True, True, False) + + +def mock_open(): + """Helper function to create mock file object""" + mock_file = MagicMock() + mock_file.__enter__ = MagicMock(return_value=mock_file) + mock_file.__exit__ = MagicMock(return_value=None) + return mock_file + + +if __name__ == '__main__': + unittest.main() diff --git a/platform/mellanox/fw-manager/tests/test_platform_detection.py b/platform/mellanox/platform-utils/tests/test_platform_detection.py similarity index 100% rename from platform/mellanox/fw-manager/tests/test_platform_detection.py rename to platform/mellanox/platform-utils/tests/test_platform_detection.py diff --git a/platform/mellanox/platform-utils/tests/test_spectrum_manager.py b/platform/mellanox/platform-utils/tests/test_spectrum_manager.py new file mode 100644 index 00000000000..9b23c7bcdb2 --- /dev/null +++ b/platform/mellanox/platform-utils/tests/test_spectrum_manager.py @@ -0,0 +1,438 @@ +#!/usr/bin/env python3 +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +""" +Comprehensive unit tests for SpectrumFirmwareManager +""" + +from mellanox_fw_manager.firmware_base import FW_ALREADY_UPDATED_FAILURE +from mellanox_fw_manager.spectrum_manager import SpectrumFirmwareManager +import os +import sys +import unittest +from unittest.mock import patch, MagicMock +import tempfile + +sys.path.insert(0, os.path.join(os.path.dirname(__file__), '..')) + + +class TestSpectrumFirmwareManager(unittest.TestCase): + """Test cases for SpectrumFirmwareManager methods""" + + def setUp(self): + """Set up test fixtures""" + self.temp_dir = tempfile.mkdtemp() + + def tearDown(self): + """Clean up test fixtures""" + import shutil + shutil.rmtree(self.temp_dir, ignore_errors=True) + + def _create_manager(self, **kwargs): + """Helper to create SpectrumFirmwareManager with mocked initialization""" + defaults = { + 'asic_index': 0, + 'pci_id': "01:00.0", + 'fw_bin_path': self.temp_dir, + 'verbose': False, + 'clear_semaphore': False, + 'asic_type': 'SPC3', + 'status_queue': None + } + defaults.update(kwargs) + + with patch.object(SpectrumFirmwareManager, '_initialize_asic'): + manager = SpectrumFirmwareManager(**defaults) + manager.fw_file = f"{self.temp_dir}/fw-SPC3.mfa" + manager.current_version = "30.2016.1036" + manager.available_version = "30.2016.1040" + return manager + + def test_get_mst_device_type(self): + """Test _get_mst_device_type returns correct device type""" + manager = self._create_manager() + result = manager._get_mst_device_type() + self.assertEqual(result, "Spectrum") + + def test_get_firmware_filename(self): + """Test get_firmware_filename returns correct Spectrum firmware filename""" + # Test SPC3 + manager = self._create_manager(asic_type='SPC3') + self.assertEqual(manager.get_firmware_filename(), 'fw-SPC3.mfa') + + # Test SPC + manager = self._create_manager(asic_type='SPC') + self.assertEqual(manager.get_firmware_filename(), 'fw-SPC.mfa') + + # Test SPC5 + manager = self._create_manager(asic_type='SPC5') + self.assertEqual(manager.get_firmware_filename(), 'fw-SPC5.mfa') + + def test_unsupported_asic_type(self): + """Test that unsupported ASIC type raises error during initialization""" + from mellanox_fw_manager.firmware_base import FirmwareManagerError + with self.assertRaises(FirmwareManagerError) as context: + SpectrumFirmwareManager( + asic_index=0, pci_id="01:00.0", fw_bin_path=self.temp_dir, + verbose=False, clear_semaphore=False, asic_type='unknown' + ) + self.assertIn("Unsupported ASIC type", str(context.exception)) + + def test_get_asic_type_map(self): + """Test get_asic_type_map returns correct mapping""" + result = SpectrumFirmwareManager.get_asic_type_map() + + expected = { + '15b3:cb84': 'SPC', + '15b3:cf6c': 'SPC2', + '15b3:cf70': 'SPC3', + '15b3:cf80': 'SPC4', + '15b3:cf82': 'SPC5', + } + + self.assertEqual(result, expected) + + @patch('mellanox_fw_manager.spectrum_manager.SpectrumFirmwareManager._run_command') + def test_get_available_firmware_version_success(self, mock_run_cmd): + """Test _get_available_firmware_version when successful""" + manager = self._create_manager() + psid = "MT_0000001187" + + mock_output = f""" +Device Info: +{psid} field1 field2 30.2016.1040 field4 +MT_0000001188 field1 field2 30.2016.1050 field4 +""" + mock_run_cmd.return_value = MagicMock(returncode=0, stdout=mock_output) + + result = manager._get_available_firmware_version(psid) + + self.assertEqual(result, "30.2016.1040") + mock_run_cmd.assert_called_once() + call_args = mock_run_cmd.call_args[0][0] + self.assertIn('mlxfwmanager', call_args) + self.assertIn('--list-content', call_args) + + @patch('mellanox_fw_manager.spectrum_manager.SpectrumFirmwareManager._run_command') + def test_get_available_firmware_version_command_failure(self, mock_run_cmd): + """Test _get_available_firmware_version when mlxfwmanager command fails""" + manager = self._create_manager() + psid = "MT_0000001187" + + mock_run_cmd.return_value = MagicMock( + returncode=1, + stdout="", + stderr="Error: Device not found" + ) + + result = manager._get_available_firmware_version(psid) + + self.assertIsNone(result) + + @patch('mellanox_fw_manager.spectrum_manager.SpectrumFirmwareManager._run_command') + def test_get_available_firmware_version_psid_not_found(self, mock_run_cmd): + """Test _get_available_firmware_version when PSID not found in output""" + manager = self._create_manager() + psid = "MT_0000001187" + + mock_output = """ +Device Info: +MT_0000001188 field1 field2 30.2016.1050 field4 +MT_0000001189 field1 field2 30.2016.1060 field4 +""" + mock_run_cmd.return_value = MagicMock(returncode=0, stdout=mock_output) + + result = manager._get_available_firmware_version(psid) + + self.assertIsNone(result) + + @patch('mellanox_fw_manager.spectrum_manager.SpectrumFirmwareManager._run_command') + def test_get_available_firmware_version_insufficient_fields(self, mock_run_cmd): + """Test _get_available_firmware_version when line has insufficient fields""" + manager = self._create_manager() + psid = "MT_0000001187" + + mock_output = f""" +Device Info: +{psid} field1 field2 +""" + mock_run_cmd.return_value = MagicMock(returncode=0, stdout=mock_output) + + result = manager._get_available_firmware_version(psid) + + self.assertIsNone(result) + + @patch('mellanox_fw_manager.spectrum_manager.SpectrumFirmwareManager._run_command') + def test_get_available_firmware_version_exception(self, mock_run_cmd): + """Test _get_available_firmware_version when exception occurs""" + manager = self._create_manager() + psid = "MT_0000001187" + + mock_run_cmd.side_effect = Exception("Subprocess execution failed") + + result = manager._get_available_firmware_version(psid) + + self.assertIsNone(result) + + @patch('mellanox_fw_manager.spectrum_manager.SpectrumFirmwareManager._run_command') + def test_run_firmware_update_success(self, mock_run_cmd): + """Test run_firmware_update when successful""" + manager = self._create_manager() + + mock_run_cmd.return_value = MagicMock( + returncode=0, + stdout="Firmware update completed successfully", + stderr="" + ) + + result = manager.run_firmware_update() + + self.assertTrue(result) + mock_run_cmd.assert_called_once() + call_args = mock_run_cmd.call_args[0][0] + self.assertIn('mlxfwmanager', call_args) + self.assertIn('-u', call_args) + + @patch('mellanox_fw_manager.spectrum_manager.SpectrumFirmwareManager._run_command') + def test_run_firmware_update_failure(self, mock_run_cmd): + """Test run_firmware_update when firmware update fails""" + manager = self._create_manager() + + mock_run_cmd.return_value = MagicMock( + returncode=1, + stdout="", + stderr="Error: Failed to update firmware - device busy" + ) + + result = manager.run_firmware_update() + + self.assertFalse(result) + + @patch('mellanox_fw_manager.spectrum_manager.SpectrumFirmwareManager._run_command') + def test_run_firmware_update_reactivation_required(self, mock_run_cmd): + """Test run_firmware_update when reactivation is required""" + manager = self._create_manager() + + mock_run_cmd.side_effect = [ + MagicMock(returncode=FW_ALREADY_UPDATED_FAILURE, stdout="", stderr=""), + MagicMock(returncode=0, stdout="Reactivation successful", stderr=""), + MagicMock(returncode=0, stdout="Firmware update completed", stderr="") + ] + + result = manager.run_firmware_update() + + self.assertTrue(result) + self.assertEqual(mock_run_cmd.call_count, 3) + + reactivate_call = mock_run_cmd.call_args_list[1][0][0] + self.assertIn('flint', reactivate_call) + self.assertIn('ir', reactivate_call) + + @patch('mellanox_fw_manager.spectrum_manager.SpectrumFirmwareManager._run_command') + def test_run_firmware_update_reactivation_fails_but_continues(self, mock_run_cmd): + """Test run_firmware_update when reactivation fails but continues with retry""" + manager = self._create_manager() + + mock_run_cmd.side_effect = [ + MagicMock(returncode=FW_ALREADY_UPDATED_FAILURE, stdout="", stderr=""), + MagicMock(returncode=1, stdout="", stderr="Reactivation failed"), + MagicMock(returncode=0, stdout="Firmware update completed", stderr="") + ] + + result = manager.run_firmware_update() + + self.assertTrue(result) + self.assertEqual(mock_run_cmd.call_count, 3) + + @patch('mellanox_fw_manager.spectrum_manager.SpectrumFirmwareManager._run_command') + def test_run_firmware_update_reactivation_required_retry_fails(self, mock_run_cmd): + """Test run_firmware_update when reactivation required but retry fails""" + manager = self._create_manager() + + mock_run_cmd.side_effect = [ + MagicMock(returncode=FW_ALREADY_UPDATED_FAILURE, stdout="", stderr=""), + MagicMock(returncode=0, stdout="Reactivation successful", stderr=""), + MagicMock(returncode=1, stdout="", stderr="Retry failed") + ] + + result = manager.run_firmware_update() + + self.assertFalse(result) + self.assertEqual(mock_run_cmd.call_count, 3) + + @patch('mellanox_fw_manager.spectrum_manager.SpectrumFirmwareManager._run_command') + def test_run_firmware_update_exception(self, mock_run_cmd): + """Test run_firmware_update when exception occurs""" + manager = self._create_manager() + + mock_run_cmd.side_effect = Exception("Subprocess execution failed") + + result = manager.run_firmware_update() + + self.assertFalse(result) + + @patch('mellanox_fw_manager.spectrum_manager.SpectrumFirmwareManager._run_command') + def test_run_firmware_update_with_verbose_mode(self, mock_run_cmd): + """Test run_firmware_update passes correct environment in verbose mode""" + manager = self._create_manager(verbose=True) + + mock_run_cmd.return_value = MagicMock( + returncode=0, + stdout="Firmware update completed", + stderr="" + ) + + result = manager.run_firmware_update() + + self.assertTrue(result) + + call_kwargs = mock_run_cmd.call_args[1] + self.assertIn('env', call_kwargs) + env = call_kwargs['env'] + self.assertIn('FLASH_ACCESS_DEBUG', env) + self.assertIn('FW_COMPS_DEBUG', env) + + @patch('mellanox_fw_manager.spectrum_manager.SpectrumFirmwareManager._run_command') + def test_run_firmware_update_failure_logs_parsed_detail(self, mock_run_cmd): + """Failure log should surface parsed stdout detail when stderr is empty""" + manager = self._create_manager() + + mock_run_cmd.return_value = MagicMock( + returncode=2, + stdout=( + "-W- BME is not set, DMA access is not supported.\n" + "MCC ERROR: 0x5\n" + "Fail : Rejected authentication\n" + ), + stderr="", + ) + + with patch.object(manager, 'logger') as mock_logger: + result = manager.run_firmware_update() + + self.assertFalse(result) + mock_logger.error.assert_called_once() + logged = mock_logger.error.call_args[0][0] + self.assertIn("return code 2", logged) + self.assertIn("BME is not set", logged) + self.assertIn("MCC ERROR: 0x5", logged) + self.assertIn("Rejected authentication", logged) + + +class TestMlxfwmanagerDetail(unittest.TestCase): + """Test cases for SpectrumFirmwareManager._mlxfwmanager_detail parsing helper""" + + @staticmethod + def _result(stdout="", stderr=""): + return MagicMock(stdout=stdout, stderr=stderr) + + def _detail(self, stdout="", stderr="", **kwargs): + return SpectrumFirmwareManager._mlxfwmanager_detail( + self._result(stdout=stdout, stderr=stderr), **kwargs) + + def test_prefers_stderr_when_present(self): + """Non-empty stderr is returned verbatim and stdout is ignored""" + detail = self._detail(stdout="-E- error on stdout", stderr="real stderr reason") + self.assertEqual(detail, "real stderr reason") + + def test_stderr_is_stripped(self): + """Surrounding whitespace/newlines are stripped from stderr""" + detail = self._detail(stderr=" device busy\n") + self.assertEqual(detail, "device busy") + + def test_strips_ansi_and_cursor_control_from_stderr(self): + """ANSI escapes, backspaces and carriage returns are removed from stderr""" + detail = self._detail(stderr="\x1b[31m\rdevice busy\x08\x1b[0m") + self.assertEqual(detail, "device busy") + + def test_empty_stderr_and_stdout_returns_empty(self): + """Both streams empty (or None) yields an empty string""" + self.assertEqual(self._detail(stdout="", stderr=""), "") + self.assertEqual(self._detail(stdout=None, stderr=None), "") + + def test_extracts_error_lines_from_stdout(self): + """Relevant error/warning lines are picked from stdout and joined with '|'""" + stdout = ( + "Querying device ...\n" + "-W- BME is not set, DMA access is not supported.\n" + "MCC ERROR: 0x5\n" + "Fail : Rejected authentication\n" + "Done\n" + ) + detail = self._detail(stdout=stdout) + self.assertEqual( + detail, + "-W- BME is not set, DMA access is not supported. | " + "MCC ERROR: 0x5 | Fail : Rejected authentication", + ) + + def test_matches_generic_error_and_fail_keywords(self): + """Generic ERROR / FAIL* keywords are matched case-insensitively""" + stdout = "informational line\nSomething Failed badly\nan Error occurred\nok\n" + detail = self._detail(stdout=stdout) + self.assertEqual(detail, "Something Failed badly | an Error occurred") + + def test_suppresses_noise_lines(self): + """Debug/source-banner/flash-access noise is suppressed even if it matches errors""" + stdout = ( + "-D- debug chatter\n" + "user/mlxfwmanager.cpp:123\n" + "[FLASH_ACCESS_DEBUG] error reading flash\n" + "controlFsm : ERROR state\n" + "-E- real error here\n" + ) + detail = self._detail(stdout=stdout) + self.assertEqual(detail, "-E- real error here") + + def test_deduplicates_repeated_lines(self): + """Identical error lines appear only once, preserving first-seen order""" + stdout = "-E- same error\n-E- same error\n-E- other error\n-E- same error\n" + detail = self._detail(stdout=stdout) + self.assertEqual(detail, "-E- same error | -E- other error") + + def test_strips_ansi_from_stdout_before_matching(self): + """ANSI/cursor-control bytes in stdout are removed before line matching""" + stdout = "\x1b[2J\x1b[H-E- corrupt MFA file\x1b[0m\n\rprogress\x08\x08\n" + detail = self._detail(stdout=stdout) + self.assertEqual(detail, "-E- corrupt MFA file") + + def test_falls_back_to_full_stdout_when_no_error_line(self): + """With no recognizable error line, the full cleaned stdout is returned""" + stdout = "just some neutral progress output\nmore output\n" + detail = self._detail(stdout=stdout) + self.assertEqual(detail, "just some neutral progress output\nmore output") + + def test_picked_detail_truncated_to_max_len(self): + """Joined error detail longer than max_len is truncated with a marker""" + stdout = "\n".join(f"-E- error number {i} with some padding text" for i in range(200)) + detail = self._detail(stdout=stdout, max_len=128) + self.assertTrue(detail.endswith(" ...[truncated]")) + self.assertLessEqual(len(detail), 128 + len(" ...[truncated]")) + self.assertTrue(detail.startswith("-E- error number 0")) + + def test_stdout_fallback_truncated_keeps_tail(self): + """Oversized fallback stdout is truncated keeping the tail with a leading marker""" + stdout = "x" * 5000 # no error markers -> fallback path + detail = self._detail(stdout=stdout, max_len=100) + self.assertTrue(detail.startswith("...[truncated]")) + self.assertEqual(len(detail), len("...[truncated]") + 100) + self.assertTrue(detail.endswith("x" * 100)) + + +if __name__ == '__main__': + unittest.main() diff --git a/platform/mellanox/rshim.mk b/platform/mellanox/rshim.mk index f956cdf79e0..fffbd68781b 100644 --- a/platform/mellanox/rshim.mk +++ b/platform/mellanox/rshim.mk @@ -15,7 +15,7 @@ # limitations under the License. # -MLNX_RSHIM_DRIVER_VERSION = 2.6.4 +MLNX_RSHIM_DRIVER_VERSION = 2.6.6 MLNX_RSHIM_ASSETS_GITHUB_URL = https://github.com/Mellanox/sonic-bluefield-packages MLNX_RSHIM_ASSETS_RELEASE_TAG = rshim-$(MLNX_RSHIM_DRIVER_VERSION)-$(BLDENV)-$(CONFIGURED_ARCH) MLNX_RSHIM_ASSETS_URL = $(MLNX_RSHIM_ASSETS_GITHUB_URL)/releases/download/$(MLNX_RSHIM_ASSETS_RELEASE_TAG) diff --git a/platform/mellanox/rules.mk b/platform/mellanox/rules.mk index a7b7bb75ade..5e4bef20651 100644 --- a/platform/mellanox/rules.mk +++ b/platform/mellanox/rules.mk @@ -39,7 +39,7 @@ include $(PLATFORM_PATH)/integration-scripts.mk include $(PLATFORM_PATH)/rshim.mk include $(PLATFORM_PATH)/component-versions.mk include $(PLATFORM_PATH)/mlnx-sonic-bfb-installer.mk -include $(PLATFORM_PATH)/fw-manager/fw-manager.mk +include $(PLATFORM_PATH)/platform-utils/platform-utils.mk SONIC_ALL += $(SONIC_ONE_IMAGE) \ $(DOCKER_FPM) diff --git a/platform/mellanox/sdk-src/sys-sdk/Makefile b/platform/mellanox/sdk-src/sys-sdk/Makefile index 0bd78f6901d..8d8d7b2804f 100644 --- a/platform/mellanox/sdk-src/sys-sdk/Makefile +++ b/platform/mellanox/sdk-src/sys-sdk/Makefile @@ -17,7 +17,18 @@ $(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : # build rm -rf builds/cmake - cmake -B builds/cmake -DCMAKE_SYSTEM_VERSION=$(shell ls -t /lib/modules |head -1) -DPYTHON_INTERPRETERS=python3 -DSKIP_UNINSTALL_INSTALL_DEPENDENCY=on -DSKIP_DEPMOD_IN_INSTALL_PHASE=on -DUSE_API_TESTER=OFF -DUSE_KERNEL=OFF -DCMAKE_PROJECT_VERSION=$(MLNX_SDK_DEB_VERSION) + KVERSION=$$(ls -t /lib/modules 2>/dev/null | head -1) + + # Debian Trixie build containers might not have /lib/modules entries/kernel headers. + # Skip optional WJH eBPF build in such cases sonic doesn't use this feature. + if [ -z "$$KVERSION" ] || [ ! -f "/lib/modules/$$KVERSION/source/include/linux/kconfig.h" ]; then + if [ -f "wjh_libs/CMakeLists.txt" ]; then + echo "Kernel headers are unavailable (KVERSION='$$KVERSION'), disabling WJH eBPF build" + sed -i '/^[[:space:]]*if (WJH_EBPF_PRESENT)/,/^[[:space:]]*endif()/d' wjh_libs/CMakeLists.txt + fi + fi + + cmake -B builds/cmake -DCMAKE_SYSTEM_VERSION=$$KVERSION -DPYTHON_INTERPRETERS=python3 -DSKIP_UNINSTALL_INSTALL_DEPENDENCY=on -DSKIP_DEPMOD_IN_INSTALL_PHASE=on -DUSE_API_TESTER=OFF -DUSE_KERNEL=OFF -DCMAKE_PROJECT_VERSION=$(MLNX_SDK_DEB_VERSION) cmake --build builds/cmake -j$(SONIC_CONFIG_MAKE_JOBS) diff --git a/platform/mellanox/sdk.mk b/platform/mellanox/sdk.mk index 9c811d5fd26..025d77eca14 100644 --- a/platform/mellanox/sdk.mk +++ b/platform/mellanox/sdk.mk @@ -1,6 +1,6 @@ # # SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES -# Copyright (c) 2021-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# Copyright (c) 2021-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. # SPDX-License-Identifier: Apache-2.0 # # Licensed under the Apache License, Version 2.0 (the "License"); @@ -15,7 +15,7 @@ # See the License for the specific language governing permissions and # limitations under the License. # -MLNX_SDK_VERSION = 4.8.3404 +MLNX_SDK_VERSION = 4.8.4068 MLNX_SDK_ISSU_VERSION = 101 MLNX_SDK_DRIVERS_GITHUB_URL = https://github.com/Mellanox/Spectrum-SDK-Drivers diff --git a/platform/mellanox/sed-password-mgmt/read_default_sed_pw_from_tpm.sh b/platform/mellanox/sed-password-mgmt/read_default_sed_pw_from_tpm.sh new file mode 100644 index 00000000000..018796b0b2c --- /dev/null +++ b/platform/mellanox/sed-password-mgmt/read_default_sed_pw_from_tpm.sh @@ -0,0 +1,38 @@ +#!/bin/bash + +# +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +# Mellanox: read default SED password from TPM bank 3 (0x81010003). +# Outputs the password to stdout on success; nothing on failure. + +TPM_BANK_DEFAULT="0x81010003" +tpm_sed_auth="" + +source /usr/local/bin/sed_pw_utils.sh + +get_tpm_sed_auth + +if [ -z "$tpm_sed_auth" ]; then + out=$(tpm2_unseal -c "$TPM_BANK_DEFAULT" 2>/dev/null) +else + out=$(tpm2_unseal -c "$TPM_BANK_DEFAULT" -p "$tpm_sed_auth" 2>/dev/null) +fi +if [ -n "$out" ]; then + printf '%s' "$out" +fi diff --git a/platform/mellanox/smartswitch/dpu-udev-manager/dpu-udev-manager.service b/platform/mellanox/smartswitch/dpu-udev-manager/dpu-udev-manager.service deleted file mode 100644 index b251f13eae4..00000000000 --- a/platform/mellanox/smartswitch/dpu-udev-manager/dpu-udev-manager.service +++ /dev/null @@ -1,12 +0,0 @@ -[Unit] -Description=Manage the DPU udev rules -After=systemd-udevd.service -Requires=systemd-udevd.service - -[Service] -Type=oneshot -RemainAfterExit=yes -ExecStart=/usr/bin/dpu-udev-manager.sh start - -[Install] -WantedBy=multi-user.target diff --git a/platform/mellanox/smartswitch/dpu-udev-manager/dpu-udev-manager.sh b/platform/mellanox/smartswitch/dpu-udev-manager/dpu-udev-manager.sh deleted file mode 100755 index 91c06d89d31..00000000000 --- a/platform/mellanox/smartswitch/dpu-udev-manager/dpu-udev-manager.sh +++ /dev/null @@ -1,40 +0,0 @@ -#!/usr/bin/env bash -# -# Copyright (c) 2025 NVIDIA CORPORATION & AFFILIATES. -# Apache-2.0 -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# - -declare -r udev_file="/etc/udev/rules.d/92-midplane-intf.rules" -declare -r platform=$(grep 'onie_platform=' /host/machine.conf | cut -d '=' -f 2) -declare -r platform_json="/usr/share/sonic/device/$platform/platform.json" - -declare -r query='.DPUS | to_entries[] | "\(.key) \(.value.bus_info)"' - -do_start() { - jq -r "$query" $platform_json | while read -r dpu bus_info; do - echo SUBSYSTEM==\"net\", ACTION==\"add\", KERNELS==\"$bus_info\", NAME=\"$dpu\" - done > $udev_file -} - -case "$1" in - start) - do_start - ;; - *) - echo "Error: Invalid argument." - echo "Usage: $0 {start}" - exit 1 - ;; -esac diff --git a/platform/mellanox/sonic-bfb-installer.sh b/platform/mellanox/sonic-bfb-installer.sh index 916c8ee7fd6..8f44b7cc18c 100755 --- a/platform/mellanox/sonic-bfb-installer.sh +++ b/platform/mellanox/sonic-bfb-installer.sh @@ -1,7 +1,7 @@ #!/bin/bash # # SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES -# Copyright (c) 2024-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# Copyright (c) 2024-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. # Apache-2.0 # # Licensed under the Apache License, Version 2.0 (the "License"); @@ -17,677 +17,6 @@ # limitations under the License. # +echo "NOTICE: Running the newer sonic-bfb-installer command (without \".sh\" filename extension)..." 1>&2 -# Lock file to prevent multiple instances -LOCK_FILE="/var/lock/sonic-bfb-installer.lock" -LOCK_FD=200 - -# Function to log messages with priority -log() { - local priority=$1 - local message=$2 - - # Always log to syslog - logger -p "$priority" -t "$(basename "$0")" "$message" - - echo "$message" -} - -# Helper functions for different log levels -log_error() { - log "error" "$1" -} - -log_warning() { - log "warning" "$1" -} - -log_info() { - log "info" "$1" -} - -log_debug() { - log "debug" "$1" -} - -# Function to acquire lock -acquire_lock() { - eval "exec $LOCK_FD>'$LOCK_FILE'" - if ! flock -n $LOCK_FD; then - log_error "Another instance of $(basename "$0") is already running" - exit 1 - fi - echo $$ > "$LOCK_FILE" -} - -# Function to release lock -release_lock() { - flock -u $LOCK_FD - eval "exec $LOCK_FD>&-" - rm -f "$LOCK_FILE" -} - -# Acquire lock at script start -acquire_lock -trap 'release_lock' EXIT - -[ -f /etc/sonic/sonic-environment ] && . /etc/sonic/sonic-environment -PLATFORM=${PLATFORM:-`sonic-db-cli CONFIG_DB HGET 'DEVICE_METADATA|localhost' platform`} -PLATFORM_JSON=/usr/share/sonic/device/$PLATFORM/platform.json - -declare -A rshim2dpu -declare -r bfsoc_dev_id="15b3:c2d5" -declare -r cx7_dev_id="15b3:a2dc" -declare -r REBOOT_HELPER_SCRIPT="/usr/local/bin/reboot_smartswitch_helper" - -# Source reboot helper script at initialization if available -[[ -f "$REBOOT_HELPER_SCRIPT" ]] && source "$REBOOT_HELPER_SCRIPT" - -EXTRACTED_BFB_PATH="" -EXTRACTED_CHECKSUM_PATH="" - -# Local functions to replace dpumap.sh -rshim2dpu_map() { - local rshim=$1 - # Extract DPU name from platform.json for the given rshim - local dpu=$(jq -r --arg rshim "$rshim" '.DPUS | to_entries[] | select(.value.rshim_info == $rshim) | .key' "$PLATFORM_JSON") - if [ -z "$dpu" ]; then - return 1 - fi - echo "$dpu" - return 0 -} - -dpu2rshim_map() { - local dpu=$1 - # Extract rshim bus info from platform.json for the given DPU - local rshim=$(jq -r --arg dpu "$dpu" '.DPUS[$dpu].rshim_info // empty' "$PLATFORM_JSON") - if [ -z "$rshim" ]; then - return 1 - fi - echo "$rshim" - return 0 -} - -list_dpus_map() { - # Extract DPU names from platform.json - local dpus=$(jq -r '.DPUS | keys[]' "$PLATFORM_JSON") - if [ -z "$dpus" ]; then - return 1 - fi - echo "$dpus" - return 0 -} - -usage(){ - echo "Syntax: $(basename "$0") -b|--bfb --rshim|-r --dpu|-d --verbose|-v --config|-c --help|-h" - echo "Arguments:" - echo "-b|--bfb Provide custom path for bfb tar archive" - echo "-r|--rshim Install only on DPUs connected to rshim interfaces provided, mention all if installation is required on all connected DPUs" - echo "-d|--dpu Install on specified DPUs, mention all if installation is required on all connected DPUs" - echo "-s|--skip-extract Skip extracting the bfb image" - echo "-v|--verbose Verbose installation result output" - echo "-c|--config Config file" - echo "-h|--help Help" -} -WORK_DIR=`mktemp -d -p "$DIR"` - -validate_platform(){ - if [[ ! -f $PLATFORM_JSON ]]; then - log_error "platform.json file not found. Exiting script" - exit 1 - fi -} - -# Function to detect PCI device for a DPU and device ID -detect_pcie() { - local dpu=$1 - local device_id=$2 - local bus_info rshim_bus_info - - # Get bus_info and rshim_bus_info for this DPU from platform.json - bus_info=$(jq -r --arg dpu "$dpu" '.DPUS[$dpu].bus_info // empty' "$PLATFORM_JSON") - rshim_bus_info=$(jq -r --arg dpu "$dpu" '.DPUS[$dpu].rshim_bus_info // empty' "$PLATFORM_JSON") - - # Check if bus_info exists and device matches device ID - if [ -n "$bus_info" ] && lspci -D -n | grep "${bus_info}" | grep -q "${device_id}"; then - echo "$bus_info" - return 0 - fi - - # Check if rshim_bus_info exists and device matches device ID - if [ -n "$rshim_bus_info" ] && lspci -D -n | grep "${rshim_bus_info}" | grep -q "${device_id}"; then - echo "$rshim_bus_info" - return 0 - fi - - return 1 -} - -# Function to detect the BlueField SoC PCI device for a DPU -detect_bfsoc_pcie() { - local dpu=$1 - detect_pcie "$dpu" "${bfsoc_dev_id}" -} - -detect_cx_pcie() { - local dpu=$1 - detect_pcie "$dpu" "${cx7_dev_id}" -} - -wait_for_rshim_boot() { - local -r rshim=$1 - local timeout=10 - - while [ ! -e "/dev/${rshim}/boot" ] && [ $timeout -gt 0 ]; do - sleep 1 - ((timeout--)) - done - - if [ ! -e "/dev/${rshim}/boot" ]; then - log_error "$rshim: Error: Boot file did not appear after 10 seconds" - return 1 - fi - return 0 -} - -remove_cx_pci_device() { - local -r rshim=$1 - local -r dpu=$2 - - # Get bus_id and rshim_bus_id for this DPU - local bus_id=$(detect_cx_pcie $dpu) - - # Check if bus_id device exists - if [ -n "$bus_id" ]; then - if lspci -D | grep -q "$bus_id"; then - log_info "$rshim: Removing PCI device $bus_id" - echo 1 > /sys/bus/pci/devices/$bus_id/remove - fi - fi -} - -# Function to check if CHASSIS_MODULE_TABLE entry exists for a specific DPU -is_chassis_module_table_present() { - local dpu_name=$1 - local output - output=$(sonic-db-cli STATE_DB KEYS "CHASSIS_MODULE_TABLE|${dpu_name}" 2>/dev/null) - if [[ -z "$output" ]]; then - return 1 - fi - return 0 -} - -# Function to execute dpuctl dpu-reset command -run_dpuctl_reset() { - local dpu=$1 - local use_verbose=$2 - local reset_cmd="dpuctl dpu-reset --force $dpu" - if [[ "$use_verbose" == true ]]; then - reset_cmd="$reset_cmd -v" - fi - eval $reset_cmd -} - -# Function to reset DPU using reboot helper or fallback to dpuctl -reset_dpu() { - local dpu=$1 - local use_verbose=$2 - local dpu_upper="${dpu^^}" # Convert to uppercase (e.g., dpu0 -> DPU0) - - # Check if reboot helper is available and CHASSIS_MODULE_TABLE entry exists for this DPU - if [[ -f "$REBOOT_HELPER_SCRIPT" ]] && is_chassis_module_table_present "$dpu_upper"; then - log_info "Using reboot helper pre/post shutdown methods while resetting $dpu_upper" - module_pre_shutdown "$dpu_upper" - run_dpuctl_reset "$dpu" "$use_verbose" - module_post_startup "$dpu_upper" - else - # Fallback to dpuctl - log_info "Using dpuctl to reset $dpu" - run_dpuctl_reset "$dpu" "$use_verbose" - fi -} - -monitor_installation() { - local -r rid=$1 - local -r pid=$2 - local -r total_time=$3 - local elapsed=0 - - # Random interval between 3-10 seconds for progress updates - local interval=$(($RANDOM%(10-3+1)+3)) - - while kill -0 $pid 2>/dev/null; do - sleep $interval - elapsed=$((elapsed + interval)) - # Use printf with \r for proper line handling - printf "\r%s: Installing... %d/%d seconds elapsed" "$rid" "$elapsed" "$total_time" - if [ $elapsed -ge $total_time ]; then - break - fi - done - # Add newline after progress - printf "\n" -} - -# Function to start rshim daemon -start_rshim_daemon() { - local -r rid=$1 - local -r pci_bus=$2 - - if ! start-stop-daemon --start --quiet --background \ - --make-pidfile --pidfile "/var/run/rshim_${rid}.pid" \ - --exec /usr/sbin/rshim -- -f -i "$rid" -d "pcie-$pci_bus"; then - log_error "Failed to start rshim for rshim$rid" - return 1 - fi - return 0 -} - -# Function to stop rshim daemon -stop_rshim_daemon() { - local -r rid=$1 - local -r pid_file="/var/run/rshim_${rid}.pid" - - # Only try to stop if pidfile exists - if [ -f "$pid_file" ]; then - start-stop-daemon --stop --quiet --pidfile "$pid_file" --remove-pidfile --retry TERM/15/KILL/5 2>/dev/null - fi - - return 0 -} - -bfb_install_call() { - local -r rshim=$1 - local -r dpu=$2 - local -r bfb=$3 - local -r appendix=$4 - local -r rid=${rshim#rshim} - local -r result_file=$(mktemp "${WORK_DIR}/result_file.XXXXX") - local -r timeout_secs=1200 - - # Get PCI bus info for the DPU - local pci_bus=$(detect_bfsoc_pcie "$dpu") - if [ -z "$pci_bus" ]; then - log_error "Error: Could not find PCI bus for DPU $dpu" - exit 1 - fi - - # Start rshim application - if ! start_rshim_daemon "$rid" "$pci_bus"; then - exit 1 - fi - - # Ensure rshim is stopped on exit - trap "stop_rshim_daemon $rid" EXIT - - # Wait for boot file and remove PCI device - if ! wait_for_rshim_boot "$rshim"; then - stop_rshim_daemon "$rid" - exit 1 - fi - remove_cx_pci_device "$rshim" "$dpu" - - # Construct bfb-install command - local cmd="timeout ${timeout_secs}s bfb-install -b $bfb -r $rshim" - if [ -n "$appendix" ]; then - cmd="$cmd -c $appendix" - fi - log_info "Installing bfb image on DPU connected to $rshim using $cmd" - - # Run installation with progress monitoring - trap 'kill_ch_procs' SIGINT SIGTERM SIGHUP - eval "$cmd" > >(while IFS= read -r line; do printf "%s: %s\n" "$rid" "$line"; done >> "$result_file") 2>&1 & - local cmd_pid=$! - - monitor_installation "$rid" $cmd_pid $timeout_secs - - # Check installation result - wait $cmd_pid - local exit_status=$? - if [ $exit_status -ne 0 ]; then - log_error "$rid: Error: Installation failed on connected DPU!" - else - log_info "$rid: Installation Successful" - fi - - # Show detailed output if verbose or error - if [ $exit_status -ne 0 ] || [ $verbose = true ]; then - cat "$result_file" - fi - - # Stop rshim application and reset DPU - stop_rshim_daemon "$rid" - log_info "$rid: Resetting DPU $dpu" - - reset_dpu "$dpu" "$verbose" -} - -file_cleanup(){ - rm -rf "$WORK_DIR" -} - -is_url() { - local link=$1 - if [[ $link =~ https?:// ]]; then - log_debug "Detected URL. Downloading file" - filename="${WORK_DIR}/sonic-nvidia-bluefield.bfb" - curl -L -o "$filename" "$link" - res=$? - if test "$res" != "0"; then - log_error "the curl command failed with: $res" - exit 1 - fi - bfb="$filename" - log_debug "bfb path changed to $bfb" - fi -} - -extract_bfb() { - local bfb_file=$1 - - if [ ! -f "$bfb_file" ]; then - log_error "BFB file not found: $bfb_file" - exit 1 - fi - - local file_type=$(file -b "$bfb_file") - if [[ $file_type == *"tar archive"* ]]; then - log_info "Detected tar archive extracting BFB and SHA256 hash..." - - if ! tar -xf "$bfb_file" -C "${WORK_DIR}" 2>/dev/null; then - log_error "Failed to extract tar archive: $bfb_file" - exit 1 - fi - - local extracted_bfb=$(find "${WORK_DIR}" -maxdepth 1 -name "*bfb-intermediate" | grep "$(basename "$bfb_file")" | head -n 1) - if [ -z "$extracted_bfb" ]; then - log_error "No BFB file found in tar archive" - exit 1 - fi - - log_info "Extracted BFB file: $extracted_bfb" - - EXTRACTED_BFB_PATH="$extracted_bfb" - - chmod +x "$extracted_bfb" - - local extracted_sha256="${extracted_bfb}.sha256" - if [ -f "$extracted_sha256" ]; then - log_info "Found SHA256 hash file: $extracted_sha256" - else - log_warning "SHA256 hash file not found in tar archive" - fi - - EXTRACTED_CHECKSUM_PATH="$extracted_sha256" - else - log_error "File is not a tar archive: $bfb_file! Please provide a tar archive with .bfb extension containing BFB and SHA256 hash." - exit 1 - fi -} - -validate_bfb_sha256() { - if [ -f "$EXTRACTED_CHECKSUM_PATH" ]; then - local expected_hash=$(cat "$EXTRACTED_CHECKSUM_PATH") - - log_info "Verifying SHA256 checksum..." - local actual_hash=$(sha256sum "$EXTRACTED_BFB_PATH" | awk '{print $1}') - - if [ "$expected_hash" != "$actual_hash" ]; then - log_error "SHA256 checksum mismatch!" - log_error "Expected: $expected_hash" - log_error "Actual: $actual_hash" - log_error "BFB file may be corrupted or tampered with." - exit 1 - fi - - log_info "SHA256 checksum verification successful" - else - log_error "SHA256 hash file not found: $EXTRACTED_CHECKSUM_PATH" - exit 1 - fi -} - -validate_rshim(){ - local provided_list=("$@") - for item1 in "${provided_list[@]}"; do - local found=0 - for item2 in "${dev_names_det[@]}"; do - if [[ "$item1" = "$item2" ]]; then - found=1 - break - fi - done - if [[ $found -eq 0 ]]; then - log_debug "$item1 is not detected! Please provide proper rshim interface list!" - exit 1 - fi - done -} - -get_mapping(){ - local provided_list=("$@") - - for item1 in "${provided_list[@]}"; do - var=$(rshim2dpu_map "$item1") - if [ $? -ne 0 ]; then - log_debug "$item1 does not have a valid dpu mapping!" - exit 1 - fi - rshim2dpu["$item1"]="$var" - done -} - -validate_dpus(){ - local provided_list=("$@") - for item1 in "${provided_list[@]}"; do - var=$(dpu2rshim_map "$item1") - if [ $? -ne 0 ]; then - log_debug "$item1 does not have a valid rshim mapping!" - exit 1 - fi - rshim2dpu["$var"]="$item1" - dev_names+=("$var") - done -} - -check_for_root(){ - if [ "$EUID" -ne 0 ] - then log_debug "Please run the script in sudo mode" - exit - fi -} - -detect_rshims_from_pci(){ - # Get list of supported DPUs from platform.json - local dpu_list=$(list_dpus_map) - if [ $? -ne 0 ] || [ -z "$dpu_list" ]; then - log_debug "No supported DPUs found" - return 1 - fi - - # For each DPU, check if its PCI exists and get corresponding rshim - local detected_rshims=() - while read -r dpu; do - local pci=$(detect_bfsoc_pcie "$dpu") - if [ $? -eq 0 ] && [ -n "$pci" ]; then - detected_rshims+=($(dpu2rshim_map "$dpu")) - fi - done <<< "$dpu_list" - - if [ ${#detected_rshims[@]} -eq 0 ]; then - log_debug "No rshim devices detected" - return 1 - fi - - # Return unique sorted list of detected rshim devices - printf '%s\n' "${detected_rshims[@]}" | sort -u - return 0 -} - -main() { - check_for_root - validate_platform - - # Parse command line arguments - local config= bfb= rshim_dev= dpus= skip_extract= verbose=false - parse_arguments "$@" - - # Validate BFB image - if [ -z "$bfb" ]; then - log_debug "Error: bfb image is not provided." - usage - exit 1 - fi - is_url "$bfb" - - if [ "$skip_extract" = true ]; then - EXTRACTED_BFB_PATH="$bfb" - else - extract_bfb "$bfb" - validate_bfb_sha256 - fi - - trap "file_cleanup" EXIT - - # Detect available rshim interfaces - local dev_names_det=($(detect_rshims_from_pci)) - if [ "${#dev_names_det[@]}" -eq 0 ]; then - log_debug "No rshim interfaces detected! Make sure to run the $command_name script from the host device/switch!" - exit 1 - fi - - # Handle rshim/dpu selection - local dev_names=() - if [ -z "$rshim_dev" ]; then - if [ -z "$dpus" ]; then - log_debug "No rshim interfaces provided!" - usage - exit 1 - fi - if [ "$dpus" = "all" ]; then - rshim_dev="all" - else - IFS=',' read -ra dpu_names <<< "$dpus" - validate_dpus "${dpu_names[@]}" - fi - fi - - if [ "$rshim_dev" = "all" ]; then - dev_names=("${dev_names_det[@]}") - log_info "${#dev_names_det[@]} rshim interfaces detected: ${dev_names_det[*]}" - else - if [ ${#dev_names[@]} -eq 0 ]; then - IFS=',' read -ra dev_names <<< "$rshim_dev" - fi - validate_rshim "${dev_names[@]}" - fi - - if [ ${#rshim2dpu[@]} -eq 0 ]; then - get_mapping "${dev_names[@]}" - fi - - # Sort devices and handle config files - local sorted_devs=($(printf '%s\n' "${dev_names[@]}" | sort)) - local arr=() - - if [ -n "$config" ]; then - log_info "Using ${config} file/s" - if [[ "$config" == *","* ]]; then - IFS=',' read -r -a arr <<< "$config" - else - arr=("$config") - for ((i=1; i<${#dev_names[@]}; i++)); do - arr+=("$config") - done - fi - - validate_config_files "${sorted_devs[@]}" "${arr[@]}" - fi - - # Install BFB on each device - trap 'kill_ch_procs' SIGINT SIGTERM SIGHUP - - for i in "${!sorted_devs[@]}"; do - rshim_name=${sorted_devs[$i]} - dpu_name=${rshim2dpu[$rshim_name]} - bfb_install_call "$rshim_name" "$dpu_name" "$EXTRACTED_BFB_PATH" "${arr[$i]}" & - done - wait -} - -# Helper function to parse command line arguments -parse_arguments() { - while [ "$1" != "--" ] && [ -n "$1" ]; do - case $1 in - --help|-h) - usage - exit 0 - ;; - --bfb|-b) - shift - bfb=$1 - ;; - --rshim|-r) - shift - rshim_dev=$1 - ;; - --dpu|-d) - shift - dpus=$1 - ;; - --skip-extract|-s) - skip_extract=true - ;; - --config|-c) - shift - config=$1 - ;; - --verbose|-v) - verbose=true - ;; - esac - shift - done -} - -# Helper function to validate config files -validate_config_files() { - local -a sorted_devs=("${@:1:${#sorted_devs[@]}}") - local -a arr=("${@:$((${#sorted_devs[@]}+1))}") - - if [ ${#arr[@]} -ne ${#sorted_devs[@]} ]; then - log_debug "Length of config file list does not match the devices selected: ${sorted_devs[*]} and ${arr[*]}" - exit 1 - fi - - for config_file in "${arr[@]}"; do - if [ ! -f "$config_file" ]; then - log_debug "Config provided $config_file is not a file! Please check the config file path" - exit 1 - fi - done -} - -kill_all_descendant_procs() { - local pid="$1" - local self_kill="${2:-false}" - if children="$(pgrep -P "$pid")"; then - for child in $children; do - kill_all_descendant_procs "$child" true - done - fi - if [[ "$self_kill" == true ]]; then - kill -9 "$pid" > /dev/null 2>&1 - fi -} - -kill_ch_procs(){ - log_debug "Installation Interrupted.. killing All child procs" - kill_all_descendant_procs $$ -} - -appendix= -verbose=false -main "$@" - +exec /usr/local/bin/sonic-bfb-installer "$@" diff --git a/platform/mellanox/udev-manager/udev-manager.service b/platform/mellanox/udev-manager/udev-manager.service new file mode 100644 index 00000000000..cd94399ab65 --- /dev/null +++ b/platform/mellanox/udev-manager/udev-manager.service @@ -0,0 +1,12 @@ +[Unit] +Description=Manage Mellanox platform udev rules +After=systemd-udevd.service +Requires=systemd-udevd.service + +[Service] +Type=oneshot +RemainAfterExit=yes +ExecStart=/usr/bin/udev-manager.sh start + +[Install] +WantedBy=multi-user.target diff --git a/platform/mellanox/udev-manager/udev-manager.sh b/platform/mellanox/udev-manager/udev-manager.sh new file mode 100755 index 00000000000..dcccf19865d --- /dev/null +++ b/platform/mellanox/udev-manager/udev-manager.sh @@ -0,0 +1,104 @@ +#!/usr/bin/env bash +# +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2025-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +# Management interface should be handled first, so it has higher priority +declare -r udev_mgmt_file="/etc/udev/rules.d/01-mgmt-intf.rules" +declare -r udev_midplane_file="/etc/udev/rules.d/92-midplane-intf.rules" + +declare -r platform=$(grep 'onie_platform=' /host/machine.conf | cut -d '=' -f 2) +declare -r platform_json="/usr/share/sonic/device/$platform/platform.json" + +# Kill any stale initramfs udevd that survived switch_root. +# During boot, the initramfs starts systemd-udevd before the overlayfs root is +# created. If device firmware init is slow (e.g. DPU FW timeout), udevd workers +# block and the initramfs cannot stop udevd before switch_root. The stale +# process ends up with a broken root filesystem view (its root still points to +# the initramfs rootfs, not the overlayfs). Writing udev rules below triggers +# the stale udevd to access file system for the updated rules which crashes +# because dir_fd_is_root() triggers assertion failure for a +# non-chrooted process in systemd. +kill_stale_udevd() { + local sysd_pid + sysd_pid=$(systemctl show systemd-udevd -p MainPID --value 2>/dev/null) + for pid in $(pgrep -f "systemd-udevd --daemon"); do + if [ "$pid" != "$sysd_pid" ]; then + logger "dpu-udev-manager: killing stale initramfs udevd PID $pid (systemd udevd is PID $sysd_pid)" + kill -9 "$pid" 2>/dev/null || true + fi + done +} + +handle_mgmt_interface() { + local mgmt_interfaces + mgmt_interfaces=$(jq -r '(.mgmt_interfaces // {}) | keys[]' "$platform_json" 2>/dev/null) || true + + if [ -z "$mgmt_interfaces" ] || [ "$mgmt_interfaces" = "null" ]; then + return 0 + fi + + echo > "$udev_mgmt_file" + + local mgmt_interface mgmt_interface_bus_info + while IFS= read -r mgmt_interface; do + [ -z "$mgmt_interface" ] && continue + mgmt_interface_bus_info=$(jq -r --arg name "$mgmt_interface" '.mgmt_interfaces[$name].pci_bus_info // empty' "$platform_json") + [ -z "$mgmt_interface_bus_info" ] || [ "$mgmt_interface_bus_info" = "null" ] && continue + + echo SUBSYSTEM==\"net\", ACTION==\"add\", KERNELS==\"$mgmt_interface_bus_info\", NAME=\"$mgmt_interface\" >> "$udev_mgmt_file" + done <<< "$mgmt_interfaces" +} + +handle_midplane_interface() { + local query='(.DPUS // {}) | to_entries[] | "\(.key) \(.value.bus_info)"' + local dpu_pci_bus_infos + dpu_pci_bus_infos=$(jq -r "$query" "$platform_json" 2>/dev/null) || true + + if [ -z "$dpu_pci_bus_infos" ]; then + return 0 + fi + + echo > "$udev_midplane_file" + + local dpu_pci_bus_info dpu bus_info + while IFS= read -r dpu_pci_bus_info; do + [ -z "$dpu_pci_bus_info" ] && continue + dpu=$(echo "$dpu_pci_bus_info" | cut -d ' ' -f 1) + bus_info=$(echo "$dpu_pci_bus_info" | cut -d ' ' -f 2) + [ -z "$dpu" ] || [ -z "$bus_info" ] && continue + + echo SUBSYSTEM==\"net\", ACTION==\"add\", KERNELS==\"$bus_info\", NAME=\"$dpu\" >> "$udev_midplane_file" + done <<< "$dpu_pci_bus_infos" +} + +do_start() { + kill_stale_udevd + handle_mgmt_interface + handle_midplane_interface +} + +case "$1" in + start) + do_start + ;; + *) + echo "Error: Invalid argument." + echo "Usage: $0 {start}" + exit 1 + ;; +esac diff --git a/platform/nephos/docker-syncd-nephos-rpc.mk b/platform/nephos/docker-syncd-nephos-rpc.mk index 5ead18609db..340c2bdc8dd 100644 --- a/platform/nephos/docker-syncd-nephos-rpc.mk +++ b/platform/nephos/docker-syncd-nephos-rpc.mk @@ -22,6 +22,5 @@ $(DOCKER_SYNCD_NEPHOS_RPC)_VERSION = 1.0.0+rpc $(DOCKER_SYNCD_NEPHOS_RPC)_PACKAGE_NAME = syncd $(DOCKER_SYNCD_NEPHOS_RPC)_RUN_OPT += --privileged -t $(DOCKER_SYNCD_NEPHOS_RPC)_RUN_OPT += -v /host/machine.conf:/etc/machine.conf -$(DOCKER_SYNCD_NEPHOS_RPC)_RUN_OPT += -v /host/warmboot:/var/warmboot $(DOCKER_SYNCD_NEPHOS_RPC)_RUN_OPT += -v /var/run/docker-syncd:/var/run/sswsyncd $(DOCKER_SYNCD_NEPHOS_RPC)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro diff --git a/platform/nephos/docker-syncd-nephos.mk b/platform/nephos/docker-syncd-nephos.mk index d191acc13c7..25befe90c17 100644 --- a/platform/nephos/docker-syncd-nephos.mk +++ b/platform/nephos/docker-syncd-nephos.mk @@ -17,7 +17,6 @@ SONIC_STRETCH_DBG_DOCKERS += $(DOCKER_SYNCD_BASE_DBG) $(DOCKER_SYNCD_BASE)_VERSION = 1.0.0 $(DOCKER_SYNCD_BASE)_PACKAGE_NAME = syncd -$(DOCKER_SYNCD_BASE)_RUN_OPT += -v /host/warmboot:/var/warmboot $(DOCKER_SYNCD_BASE)_RUN_OPT += -v /var/run/docker-syncd:/var/run/sswsyncd $(DOCKER_SYNCD_BASE)_BASE_IMAGE_FILES += npx_diag:/usr/bin/npx_diag diff --git a/platform/nephos/docker-syncd-nephos/supervisord.conf b/platform/nephos/docker-syncd-nephos/supervisord.conf index 046322f5719..286600e33a2 100644 --- a/platform/nephos/docker-syncd-nephos/supervisord.conf +++ b/platform/nephos/docker-syncd-nephos/supervisord.conf @@ -14,7 +14,7 @@ buffer_size=1024 [eventlistener:supervisor-proc-exit-listener] command=/usr/bin/supervisor-proc-exit-listener-rs --container-name syncd -events=PROCESS_STATE_EXITED,PROCESS_STATE_RUNNING +events=PROCESS_STATE_EXITED,PROCESS_STATE_RUNNING,PROCESS_STATE_FATAL autostart=true autorestart=unexpected buffer_size=1024 diff --git a/platform/nephos/rules.mk b/platform/nephos/rules.mk index c4394fe13d5..d2d1a67075f 100644 --- a/platform/nephos/rules.mk +++ b/platform/nephos/rules.mk @@ -15,7 +15,7 @@ WARM_VERIFIER = warm-verifier $(WARM_VERIFIER)_URL = "https://github.com/NephosInc/SONiC/raw/master/sai/warm-verifier" DSSERVE = dsserve -$(DSSERVE)_URL = "https://packages.trafficmanager.net/public/20190307/dsserve" +$(DSSERVE)_URL = "$(BUILD_PUBLIC_URL)/20190307/dsserve" SONIC_ONLINE_FILES += $(NPX_DIAG) $(WARM_VERIFIER) $(DSSERVE) diff --git a/platform/nokia-vs/docker-syncd-vs.dep b/platform/nokia-vs/docker-syncd-vs.dep new file mode 100644 index 00000000000..706e347fbad --- /dev/null +++ b/platform/nokia-vs/docker-syncd-vs.dep @@ -0,0 +1,11 @@ +#DPKG FRK +DPATH := $($(DOCKER_SYNCD_BASE)_PATH) +DEP_FILES := $(SONIC_COMMON_FILES_LIST) platform/nokia-vs/docker-syncd-vs.mk platform/nokia-vs/docker-syncd-vs.dep +DEP_FILES += $(SONIC_COMMON_BASE_FILES_LIST) +DEP_FILES += $(shell git ls-files $(DPATH)) + +$(DOCKER_SYNCD_BASE)_CACHE_MODE := GIT_CONTENT_SHA +$(DOCKER_SYNCD_BASE)_DEP_FLAGS := $(SONIC_COMMON_FLAGS_LIST) +$(DOCKER_SYNCD_BASE)_DEP_FILES := $(DEP_FILES) + +$(eval $(call add_dbg_docker,$(DOCKER_SYNCD_BASE),$(DOCKER_SYNCD_BASE_DBG))) diff --git a/platform/nokia-vs/docker-syncd-vs.mk b/platform/nokia-vs/docker-syncd-vs.mk new file mode 100644 index 00000000000..9ca9746bd7c --- /dev/null +++ b/platform/nokia-vs/docker-syncd-vs.mk @@ -0,0 +1,19 @@ +# docker image for vs syncd + +DOCKER_SYNCD_PLATFORM_CODE = vs +include $(PLATFORM_PATH)/../template/docker-syncd-bookworm.mk + +$(DOCKER_SYNCD_BASE)_DEPENDS += $(SYNCD_VS) \ + $(LIBNL3_DEV) \ + $(LIBNL3) + +$(DOCKER_SYNCD_BASE)_DBG_DEPENDS += $(SYNCD_VS_DBG) \ + $(LIBSWSSCOMMON_DBG) \ + $(LIBSAIMETADATA_DBG) \ + $(LIBSAIREDIS_DBG) \ + $(LIBSAIVS_DBG) + +$(DOCKER_SYNCD_BASE)_VERSION = 1.0.0 +$(DOCKER_SYNCD_BASE)_PACKAGE_NAME = syncd + +$(DOCKER_SYNCD_BASE)_RUN_OPT += -v /host/warmboot:/var/warmboot diff --git a/platform/nokia-vs/docker-syncd-vs/Dockerfile.j2 b/platform/nokia-vs/docker-syncd-vs/Dockerfile.j2 new file mode 100644 index 00000000000..8c30957cc2c --- /dev/null +++ b/platform/nokia-vs/docker-syncd-vs/Dockerfile.j2 @@ -0,0 +1,40 @@ +{% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files %} +ARG BASE=docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} + +FROM $BASE AS base + +ARG docker_container_name + +## Make apt-get non-interactive +ENV DEBIAN_FRONTEND=noninteractive + +RUN apt-get update + +RUN apt-get install -f -y iproute2 libcap2-bin + +# For DASH engine + +COPY debs/libnl-3-dev_{{ LIBNL3_VERSION_SONIC }}_{{ CONFIGURED_ARCH }}.deb debs/libnl-route-3-dev_{{ LIBNL3_VERSION_SONIC }}_{{ CONFIGURED_ARCH }}.deb debs/ +RUN dpkg -i debs/libnl-3-dev_{{ LIBNL3_VERSION_SONIC }}_{{ CONFIGURED_ARCH }}.deb debs/libnl-route-3-dev_{{ LIBNL3_VERSION_SONIC }}_{{ CONFIGURED_ARCH }}.deb + +RUN apt-get install -f -y libabsl20220623 libc-ares2 python3-six libboost-thread1.74.0 libboost-dev libboost-system-dev libboost-thread-dev libboost-filesystem1.74.0 libboost-program-options1.74.0 libboost-thread1.74.0 libnanomsg5 libpcap0.8 libthrift-0.17.0 libboost-dev libboost-filesystem-dev libboost-program-options-dev libgmp-dev libnanomsg-dev libpcap-dev libtool pkg-config libthrift-dev python3-thrift thrift-compiler libboost-iostreams1.74.0 libgc1 cpp libboost-dev libboost-all-dev libboost-graph-dev libboost-iostreams-dev libfl-dev libgc-dev libgmp-dev libbpf-dev tcpdump libelf-dev llvm clang python3-pyroute2 python3-ply python3-scapy python3-setuptools python3-thrift libthrift-0.17.0 libgrpc++1.51 libgrpc29 libprotobuf32 libboost-dev libboost-system-dev libboost-thread-dev libprotoc-dev protobuf-compiler python3-protobuf libgrpc++-dev libgrpc-dev protobuf-compiler-grpc python3-grpcio + +{% if docker_syncd_vs_debs.strip() -%} +# Copy built Debian packages +{{ copy_files("debs/", docker_syncd_vs_debs.split(' '), "/debs/") }} + +# Install built Debian packages and implicitly install their dependencies +{{ install_debian_packages(docker_syncd_vs_debs.split(' ')) }} +{%- endif %} + +COPY ["start.sh", "/usr/bin/"] + +COPY ["supervisord.conf", "/etc/supervisor/conf.d/"] +COPY ["critical_processes", "/etc/supervisor/"] + +FROM $BASE + +RUN --mount=type=bind,from=base,target=/changes-to-image rsync -axAX --no-D --exclude=/sys --exclude=/proc --exclude=/dev --exclude=resolv.conf /changes-to-image/ / + +ENV DEBIAN_FRONTEND=noninteractive +ENTRYPOINT ["/usr/local/bin/supervisord"] diff --git a/platform/nokia-vs/docker-syncd-vs/critical_processes b/platform/nokia-vs/docker-syncd-vs/critical_processes new file mode 100644 index 00000000000..bdd6903c569 --- /dev/null +++ b/platform/nokia-vs/docker-syncd-vs/critical_processes @@ -0,0 +1 @@ +program:syncd diff --git a/platform/nokia-vs/docker-syncd-vs/start.sh b/platform/nokia-vs/docker-syncd-vs/start.sh new file mode 100755 index 00000000000..40178f13e00 --- /dev/null +++ b/platform/nokia-vs/docker-syncd-vs/start.sh @@ -0,0 +1,14 @@ +#!/usr/bin/env bash + +HWSKU_DIR=/usr/share/sonic/hwsku + +mkdir -p /etc/sai.d/ + +# Create/Copy the sai.profile to /etc/sai.d/sai.profile +if [ -f $HWSKU_DIR/sai.profile.j2 ]; then + sonic-cfggen -d -t $HWSKU_DIR/sai.profile.j2 > /etc/sai.d/sai.profile +else + if [ -f $HWSKU_DIR/sai.profile ]; then + cp $HWSKU_DIR/sai.profile /etc/sai.d/sai.profile + fi +fi diff --git a/platform/nokia-vs/docker-syncd-vs/supervisord.conf b/platform/nokia-vs/docker-syncd-vs/supervisord.conf new file mode 100644 index 00000000000..5b84d7d7f26 --- /dev/null +++ b/platform/nokia-vs/docker-syncd-vs/supervisord.conf @@ -0,0 +1,56 @@ +[supervisord] +logfile_maxbytes=1MB +logfile_backups=2 +nodaemon=true + +[eventlistener:dependent-startup] +command=python3 -m supervisord_dependent_startup +autostart=true +autorestart=unexpected +startretries=0 +exitcodes=0,3 +events=PROCESS_STATE +buffer_size=1024 + +[eventlistener:supervisor-proc-exit-listener] +command=/usr/local/bin/supervisor-proc-exit-listener --container-name syncd +events=PROCESS_STATE_EXITED,PROCESS_STATE_RUNNING,PROCESS_STATE_FATAL +autostart=true +autorestart=unexpected +buffer_size=1024 + +[program:rsyslogd] +command=/usr/sbin/rsyslogd -n -iNONE +priority=1 +autostart=false +autorestart=unexpected +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true +dependent_startup=true + +[program:start] +command=/usr/bin/start.sh +priority=2 +autostart=false +autorestart=false +startsecs=0 +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true +dependent_startup=true +dependent_startup_wait_for=rsyslogd:running + +[program:syncd] +command=/usr/bin/syncd_start.sh +priority=3 +autostart=false +autorestart=false +stdout_logfile=NONE +stdout_syslog=true +stderr_logfile=NONE +stderr_syslog=true +dependent_startup=true +dependent_startup_wait_for=start:exited diff --git a/platform/nokia-vs/one-image.dep b/platform/nokia-vs/one-image.dep new file mode 100644 index 00000000000..c5399d80817 --- /dev/null +++ b/platform/nokia-vs/one-image.dep @@ -0,0 +1,2 @@ +#DPKG FRK +$(SONIC_ONE_IMAGE)_CACHE_MODE := none diff --git a/platform/nokia-vs/one-image.mk b/platform/nokia-vs/one-image.mk new file mode 100644 index 00000000000..4175cddb7c7 --- /dev/null +++ b/platform/nokia-vs/one-image.mk @@ -0,0 +1,14 @@ +# sonic vs one image installer + +SONIC_ONE_IMAGE = sonic-nokia-vs-$(CONFIGURED_ARCH).bin +$(SONIC_ONE_IMAGE)_MACHINE = nokia-vs +$(SONIC_ONE_IMAGE)_IMAGE_TYPE = onie +$(SONIC_ONE_IMAGE)_INSTALLS += $(SYSTEMD_SONIC_GENERATOR) +$(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(NOKIA_7215_PLATFORM) +ifeq ($(INSTALL_DEBUG_TOOLS),y) +$(SONIC_ONE_IMAGE)_DOCKERS += $(SONIC_INSTALL_DOCKER_DBG_IMAGES) +$(SONIC_ONE_IMAGE)_DOCKERS += $(filter-out $(patsubst %-$(DBG_IMAGE_MARK).gz,%.gz, $(SONIC_INSTALL_DOCKER_DBG_IMAGES)), $(SONIC_INSTALL_DOCKER_IMAGES)) +else +$(SONIC_ONE_IMAGE)_DOCKERS = $(SONIC_INSTALL_DOCKER_IMAGES) +endif +SONIC_INSTALLERS += $(SONIC_ONE_IMAGE) diff --git a/platform/nokia-vs/onie-image-arm64.conf b/platform/nokia-vs/onie-image-arm64.conf new file mode 100644 index 00000000000..7b252d69f77 --- /dev/null +++ b/platform/nokia-vs/onie-image-arm64.conf @@ -0,0 +1,55 @@ +## DESCRIPTION: +## config for ONIE image +## + +## Partition size in MB +## The default size is 32GB +: ${ONIE_IMAGE_PART_SIZE:=32768} + +## Target hardware information +: ${TARGET_PLATFORM:=arm64} +: ${TARGET_MACHINE:=generic} + +ONIEIMAGE_VERSION=r0 + +## Filesystem root +FILESYSTEM_ROOT=./fsroot-${TARGET_MACHINE} + +## Filename for squashfs file system +FILESYSTEM_SQUASHFS=fs.squashfs + +## Filename for onie installer payload, will be the main part of onie installer +INSTALLER_PAYLOAD=fs.zip + +## Filename for docker file system +FILESYSTEM_DOCKERFS=dockerfs.tar.gz + +## docker directory on the root filesystem +DOCKERFS_DIR=docker + +## docker ramfs disk space +DOCKER_RAMFS_SIZE=3500M + +## Output file name for onie installer +OUTPUT_ONIE_IMAGE=target/sonic-$TARGET_MACHINE-$CONFIGURED_ARCH.bin + +## Output file name for raw image +OUTPUT_RAW_IMAGE=target/sonic-$TARGET_MACHINE-$CONFIGURED_ARCH.raw + +## Raw image size in MB +RAW_IMAGE_DISK_SIZE=4096 + +## Output file name for kvm image +OUTPUT_KVM_IMAGE=target/sonic-$TARGET_MACHINE-$CONFIGURED_ARCH.img + +## Kvm image size in GB +KVM_IMAGE_DISK_SIZE=16 + +## Output file name for aboot installer +OUTPUT_ABOOT_IMAGE=target/sonic-aboot-$TARGET_MACHINE-$CONFIGURED_ARCH.swi + +## Aboot boot image name +ABOOT_BOOT_IMAGE=.sonic-boot.swi + +## Output file name for dsc installer +OUTPUT_DSC_IMAGE=target/sonic-$TARGET_MACHINE-$CONFIGURED_ARCH.tar diff --git a/platform/nokia-vs/platform-nokia.dep b/platform/nokia-vs/platform-nokia.dep new file mode 100644 index 00000000000..603feb645eb --- /dev/null +++ b/platform/nokia-vs/platform-nokia.dep @@ -0,0 +1,8 @@ +MPATH := $($(NOKIA_7215_PLATFORM)_SRC_PATH) +DEP_FILES := $(SONIC_COMMON_FILES_LIST) $(PLATFORM_PATH)/platform-nokia.mk $(PLATFORM_PATH)/platform-nokia.dep +DEP_FILES += $(SONIC_COMMON_BASE_FILES_LIST) +DEP_FILES += $(shell git ls-files $(MPATH)) + +$(NOKIA_7215_PLATFORM)_CACHE_MODE := GIT_CONTENT_SHA +$(NOKIA_7215_PLATFORM)_DEP_FLAGS := $(SONIC_COMMON_FLAGS_LIST) +$(NOKIA_7215_PLATFORM)_DEP_FILES := $(DEP_FILES) diff --git a/platform/nokia-vs/platform-nokia.mk b/platform/nokia-vs/platform-nokia.mk new file mode 100644 index 00000000000..f2baa276eca --- /dev/null +++ b/platform/nokia-vs/platform-nokia.mk @@ -0,0 +1,24 @@ +# Nokia Platform + +NOKIA_7215_PLATFORM_VERSION = 1.0 +export NOKIA_7215_PLATFORM_VERSION +SONIC_KERNEL_DEB_PKG = $(LINUX_KERNEL) +export SONIC_KERNEL_DEB_PKG + +ifeq ($(CONFIGURED_ARCH),arm64) +NOKIA_7215_PLATFORM = sonic-platform-nokia-7215-c1_$(NOKIA_7215_PLATFORM_VERSION)_$(CONFIGURED_ARCH).deb +$(NOKIA_7215_PLATFORM)_SRC_PATH = $(PLATFORM_PATH)/sonic-platform-nokia +$(NOKIA_7215_PLATFORM)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON) +$(NOKIA_7215_PLATFORM)_PLATFORM = arm64-nokia_ixs7215_c1xa-r0 + +MPATH := $($(NOKIA_7215_PLATFORM)_SRC_PATH) +DEP_FILES := $(SONIC_COMMON_FILES_LIST) platform/nokia-vs/platform-nokia.mk +DEP_FILES += $(SONIC_COMMON_BASE_FILES_LIST) +DEP_FILES += $(shell git ls-files $(MPATH)) + +$(NOKIA_7215_PLATFORM)_CACHE_MODE := GIT_CONTENT_SHA +$(NOKIA_7215_PLATFORM)_DEP_FLAGS := $(SONIC_COMMON_FLAGS_LIST) +$(NOKIA_7215_PLATFORM)_DEP_FILES := $(DEP_FILES) +SONIC_DPKG_DEBS += $(NOKIA_7215_PLATFORM) + +endif diff --git a/platform/nokia-vs/platform.conf b/platform/nokia-vs/platform.conf new file mode 100644 index 00000000000..9e3088933eb --- /dev/null +++ b/platform/nokia-vs/platform.conf @@ -0,0 +1,53 @@ +# Copyright (C) Marvell Inc + +# over ride default behaviour + +echo "Preparing for installation ... " + +# global defines +VAR_LOG=4096 +UBOOT_FW_DEFAULT=1 + +is_uefi_based=1 +PLATFORM_7215_C1=0 +disk_interface="mmc" + +if [ "$install_env" = "onie" ]; then + MACH_FILE="/etc/machine.conf" +else + MACH_FILE="/host/machine.conf" +fi + +PLATFORM=`sed -n 's/^onie_platform=\(.*\)/\1/p' $MACH_FILE` +echo "Intalling SONiC from $install_env on Platform $PLATFORM" + +case $PLATFORM in + arm64-nokia_ixs7215_c1xa-r0) PLATFORM_7215_C1=1; + mmc_bus="mmc0:0001"; +esac + + +# Skip VID Header in UBIFS +LINUX_MISC_CMD='apparmor=1 security=apparmor usbcore.autosuspend=-1' + +# Get block device +# default_platform.conf will by default install SONIC on same block device as ONIE +# This funtion looks to override SONIC install target disk, with optional eMMC or SCSI disk. +get_install_device() +{ + if [ ! -z "$mmc_bus" ]; then + for i in 0 1 2 ; do + if $(ls -l /sys/block/mmcblk$i/device 2>/dev/null | grep -q "$mmc_bus") ; then + echo "/dev/mmcblk$i" + blk_dev=/dev/mmcblk$i + disk_interface="mmc" + echo "Selected mmc $blk_dev" + return + fi + done + fi + + echo "Waring: Storage not found. Will try installing on the same disk as ONIE." +} + +get_install_device diff --git a/platform/nokia-vs/rules.dep b/platform/nokia-vs/rules.dep new file mode 100644 index 00000000000..9f58af9e248 --- /dev/null +++ b/platform/nokia-vs/rules.dep @@ -0,0 +1,4 @@ +include $(PLATFORM_PATH)/syncd-vs.dep +include $(PLATFORM_PATH)/docker-syncd-vs.dep +include $(PLATFORM_PATH)/one-image.dep +include $(PLATFORM_PATH)/platform-nokia.dep diff --git a/platform/nokia-vs/rules.mk b/platform/nokia-vs/rules.mk new file mode 100644 index 00000000000..83e2c5b24c7 --- /dev/null +++ b/platform/nokia-vs/rules.mk @@ -0,0 +1,6 @@ +include $(PLATFORM_PATH)/syncd-vs.mk +include $(PLATFORM_PATH)/docker-syncd-vs.mk +include $(PLATFORM_PATH)/one-image.mk +include $(PLATFORM_PATH)/platform-nokia.mk + +SONIC_ALL += $(SONIC_ONE_IMAGE) diff --git a/platform/nokia-vs/sonic-platform-nokia/7215-c1/modules/Makefile b/platform/nokia-vs/sonic-platform-nokia/7215-c1/modules/Makefile new file mode 100644 index 00000000000..080a8b4cf5c --- /dev/null +++ b/platform/nokia-vs/sonic-platform-nokia/7215-c1/modules/Makefile @@ -0,0 +1,4 @@ +MULE = mule +$(MULE)-objs := mule_uart.o +obj-m:= nokia_7215_ixs_c1_cpld.o cn9130_cpu_thermal_sensor.o cn9130_led.o \ + $(MULE).o diff --git a/platform/nokia-vs/sonic-platform-nokia/7215-c1/modules/cn9130_cpu_thermal_sensor.c b/platform/nokia-vs/sonic-platform-nokia/7215-c1/modules/cn9130_cpu_thermal_sensor.c new file mode 100644 index 00000000000..35c0bd24d9c --- /dev/null +++ b/platform/nokia-vs/sonic-platform-nokia/7215-c1/modules/cn9130_cpu_thermal_sensor.c @@ -0,0 +1,243 @@ +/* + * HWMON Driver for CN9130 thermal sensor + * + * Author: Natarajan Subbiramani + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ +#include +#include +#include +#include +#include +#include +#include +#include + +#define CN9130_DEFAULT_TEMP_CRIT 100000 +#define CN9130_DEFAULT_TEMP_MAX 106000 + +#define CN9130_TEMP_BASE_ADDR 0xF06F8080 +#define CN9130_TSEN_REG_CTRL_0_OFFSET 0x4 +#define CN9130_TSEN_REG_CTRL_1_OFFSET 0x8 +#define CN9130_TSEN_REG_STATUS_OFFSET 0xC +#define CN9130_TSEN_SENSOR_MAX_ID 6 +static unsigned long thermal_base_addr=CN9130_TEMP_BASE_ADDR; +module_param(thermal_base_addr, ulong, 0444); +MODULE_PARM_DESC(thermal_base_addr, + "Initialize the base address of the thermal sensor"); + +struct cn9130_thermal_data { + struct device *dev; + struct device *hwmon_dev; + uint8_t * __iomem temp_base; + int temp_input; + int temp_crit; + int temp_max; +}; + +static long cn9130_thermal_read_reg_in_mcelcius(struct device *dev, struct cn9130_thermal_data *data) +{ + volatile uint8_t * __iomem temp_base = data->temp_base; + uint32_t regval; + uint32_t status_regval=0; + uint32_t output=data->temp_max; + + //STOP MEASUREMENT + regval = readl(temp_base+CN9130_TSEN_REG_CTRL_0_OFFSET); + regval &= ~( 1 << 0); //TSEN_STOP + writel(regval, temp_base+CN9130_TSEN_REG_CTRL_0_OFFSET); + + //delay for 1ms + mdelay(1); + + //Read thermal value + status_regval = readl(temp_base+CN9130_TSEN_REG_STATUS_OFFSET); + dev_dbg(dev, "%s: cn9130_thermal_read_reg_in_mcelcius: addr: %p value:0x%x\n", + dev_name(data->hwmon_dev), (void*)(temp_base+CN9130_TSEN_REG_STATUS_OFFSET), status_regval); + + //START MEASUREMENT + regval = readl(temp_base+CN9130_TSEN_REG_CTRL_0_OFFSET); + regval |= 1 << 0; //TSEN_START + writel(regval, temp_base+CN9130_TSEN_REG_CTRL_0_OFFSET); + + //Validate data + if(status_regval &= 0x3ff) { + //Convert it to milli-celcius + output = 150000 - (~(status_regval-1) & 0x3ff) * 423; + } + + return output; +} +static int cn9130_thermal_read(struct device *dev, enum hwmon_sensor_types type, + u32 attr, int channel, long *val) +{ + struct cn9130_thermal_data *data = dev_get_drvdata(dev); + + switch (type) { + case hwmon_temp: + switch (attr) { + case hwmon_temp_input: + *val = cn9130_thermal_read_reg_in_mcelcius(dev, data); + break; + case hwmon_temp_crit: + *val = data->temp_crit; + break; + case hwmon_temp_max: + *val = data->temp_max; + break; + default: + return -EINVAL; + } + break; + default: + return -EINVAL; + } + return 0; +} + +static int cn9130_thermal_write(struct device *dev, enum hwmon_sensor_types type, + u32 attr, int channel, long val) +{ + struct cn9130_thermal_data *data = dev_get_drvdata(dev); + switch (type) { + case hwmon_temp: + switch (attr) { + case hwmon_temp_crit: + data->temp_crit = val; + break; + case hwmon_temp_max: + data->temp_max = val; + break; + default: + return -EINVAL; + } + break; + default: + return -EINVAL; + } + return 0; +} + + +static umode_t cn9130_thermal_is_visible(const void *data, enum hwmon_sensor_types type, + u32 attr, int channel) +{ + switch (type) { + case hwmon_temp: + switch (attr) { + case hwmon_temp_input: + return 0444; + case hwmon_temp_crit: + case hwmon_temp_max: + return 0644; + } + break; + default: + break; + } + return 0; +} + +static const struct hwmon_channel_info *cn9130_thermal_info[] = { + HWMON_CHANNEL_INFO(temp, + HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_CRIT), + NULL +}; + +static const struct hwmon_ops cn9130_thermal_hwmon_ops = { + .is_visible = cn9130_thermal_is_visible, + .read = cn9130_thermal_read, + .write = cn9130_thermal_write, +}; + +static const struct hwmon_chip_info cn9130_thermal_chip_info = { + .ops = &cn9130_thermal_hwmon_ops, + .info = cn9130_thermal_info, +}; + +static const struct file_operations fops = { + .owner = THIS_MODULE, +}; + +struct miscdevice cn9130_thermal_device = { + .minor = TEMP_MINOR, + .name = "cn9130_thermal", + .fops = &fops, +}; + +static int __init cn9130_thermal_init_driver(void) +{ + struct device *dev; + struct cn9130_thermal_data *thermal_data; + int err; + void * __iomem reg; + uint32_t regval=0; + + err = misc_register(&cn9130_thermal_device); + if (err) { + pr_err("cn9130_thermal misc_register failed!!!\n"); + return err; + } + + dev = cn9130_thermal_device.this_device; + thermal_data = devm_kzalloc(dev, sizeof(struct cn9130_thermal_data), GFP_KERNEL); + if (!thermal_data) + return -ENOMEM; + + thermal_data->dev = dev; + thermal_data->temp_crit = CN9130_DEFAULT_TEMP_CRIT; + thermal_data->temp_max = CN9130_DEFAULT_TEMP_MAX; + + thermal_data->hwmon_dev = devm_hwmon_device_register_with_info(dev, cn9130_thermal_device.name, + thermal_data, &cn9130_thermal_chip_info, + NULL); + if (IS_ERR(thermal_data->hwmon_dev)) { + dev_err(dev, "%s: hwmon registration failed.\n", cn9130_thermal_device.name); + return PTR_ERR(thermal_data->hwmon_dev); + } + + reg = devm_ioremap(dev, thermal_base_addr, 16); + if (IS_ERR(reg)) { + dev_err(dev, "%s: base addr remap failed\n", cn9130_thermal_device.name); + return PTR_ERR(reg); + } + thermal_data->temp_base = reg; + + /*Enable measurement*/ + regval = readl(thermal_data->temp_base+CN9130_TSEN_REG_CTRL_0_OFFSET); + regval |= 1 << 2; //TSEN_EN + writel(regval, thermal_data->temp_base+CN9130_TSEN_REG_CTRL_0_OFFSET); + mdelay(10); + + // Set temperature reading zone as max reading + regval = readl(thermal_data->temp_base+CN9130_TSEN_REG_CTRL_1_OFFSET); + regval &= ~(0x7 << 21); + regval |= (CN9130_TSEN_SENSOR_MAX_ID & 0x7) << 21; + writel(regval, thermal_data->temp_base+CN9130_TSEN_REG_CTRL_1_OFFSET); + + //START MEASUREMENT + regval = readl(thermal_data->temp_base+CN9130_TSEN_REG_CTRL_0_OFFSET); + regval |= 1 << 0; //TSEN_START + writel(regval, thermal_data->temp_base+CN9130_TSEN_REG_CTRL_0_OFFSET); + + dev_info(dev, "%s: initialized. base_addr: 0x%lx virt_addr:%p\n", + dev_name(thermal_data->hwmon_dev), thermal_base_addr, (void *)thermal_data->temp_base); + + return 0; +} + +static void __exit cn9101_thermal_exit_driver(void) +{ + misc_deregister(&cn9130_thermal_device); +} + +module_init(cn9130_thermal_init_driver); +module_exit(cn9101_thermal_exit_driver); + +MODULE_AUTHOR("Natarajan Subbiramani "); +MODULE_DESCRIPTION("CN9130 CPU Thermal sensor Driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/nokia-vs/sonic-platform-nokia/7215-c1/modules/cn9130_led.c b/platform/nokia-vs/sonic-platform-nokia/7215-c1/modules/cn9130_led.c new file mode 100644 index 00000000000..e5e61dd96ea --- /dev/null +++ b/platform/nokia-vs/sonic-platform-nokia/7215-c1/modules/cn9130_led.c @@ -0,0 +1,326 @@ +/* + * LED initialization for Nokia-7215-IXS-C1 + * + * Copyright (C) 2023 Nokia Corporation. + * Natarajan Subbiramani + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * see + * + * Based on ad7414.c + * Copyright 2006 Stefan Roese , DENX Software Engineering + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#define DRV_NAME "cn9130_led" + +#define REG_PORT1_AN 0xF2130E0CULL +#define REG_PORT0_AN 0xF2132E0CULL +#define REG_PORT1_TYPE 0xF2130E00ULL +#define REG_PORT0_TYPE 0xF2132E00ULL + +#define AN_BYPASS_BIT 3 +#define PORT_TYPE_BIT 1 +#define AN_VAL_UNSET (-1) + +static const struct { + u64 phys; + u32 val; +} writes[] = { + { 0xF212A004ULL, 0x0010012D }, + { 0xF2130E90ULL, 0x000001FA }, + { 0xF2132E90ULL, 0x000005FA }, + { 0xF212A000ULL, 0x000F0035 }, + { 0xF212A120ULL, 0x00000000 }, + { 0xF2130E0CULL, 0x00009E4C }, + { 0xF2132E0CULL, 0x00009E4C }, +}; + +static struct kobject *cn9130_kobj; +static struct task_struct *poll_thread; + +static int bypass_an_val[2] = { AN_VAL_UNSET, AN_VAL_UNSET }; + +static const struct { + u64 an_reg; + u64 type_reg; +} port_regs[2] = { + { REG_PORT0_AN, REG_PORT0_TYPE }, + { REG_PORT1_AN, REG_PORT1_TYPE }, +}; + +static int mmio_read32(u64 phys, u32 *val) +{ + void __iomem *base, *addr; + unsigned long page = phys & PAGE_MASK; + unsigned long off = phys & ~PAGE_MASK; + + base = ioremap(page, off + sizeof(u32)); + if (!base) + return -ENOMEM; + + addr = base + off; + *val = ioread32(addr); + iounmap(base); + return 0; +} + +static int mmio_write32(u64 phys, u32 val) +{ + void __iomem *base, *addr; + unsigned long page = phys & PAGE_MASK; + unsigned long off = phys & ~PAGE_MASK; + + base = ioremap(page, off + sizeof(u32)); + if (!base) + return -ENOMEM; + + addr = base + off; + iowrite32(val, addr); + iounmap(base); + return 0; +} + +static void set_bit_in_reg(u64 reg, int bit, int val) +{ + u32 regval; + int cur; + + if (mmio_read32(reg, ®val)) + return; + cur = !!(regval & BIT(bit)); + if (cur == !!val) + return; + if (val) + regval |= BIT(bit); + else + regval &= ~BIT(bit); + mmio_write32(reg, regval); +} + +/* --- poll thread: enforce AN bypass every second --- */ + +static int cn9130_poll_fn(void *data) +{ + while (!kthread_should_stop()) { + int i; + + for (i = 0; i < 2; i++) { + u32 an_regval; + + if (bypass_an_val[i] != AN_VAL_UNSET) { + /* + * User has written a desired value -- + * enforce it on the AN register every cycle. + */ + if (mmio_read32(port_regs[i].an_reg, &an_regval) == 0) { + int cur = (an_regval >> AN_BYPASS_BIT) & 1; + + if (cur != bypass_an_val[i]) + set_bit_in_reg(port_regs[i].an_reg, + AN_BYPASS_BIT, + bypass_an_val[i]); + } + } else { + /* + * No user value yet -- + * read port_type and copy to AN bypass bit. + * The phy link driver sets port_type; we mirror + * it into the AN register (type 1 = bypass AN). + */ + u32 type_regval; + + if (mmio_read32(port_regs[i].type_reg, &type_regval) == 0) { + int type_bit = (type_regval >> PORT_TYPE_BIT) & 1; + + set_bit_in_reg(port_regs[i].an_reg, + AN_BYPASS_BIT, type_bit); + } + } + } + + ssleep(1); + } + return 0; +} + +/* --- sysfs helpers --- */ + +static ssize_t bit_show(u64 reg, int bit, char *buf) +{ + u32 val; + + if (mmio_read32(reg, &val)) + return -EIO; + return sprintf(buf, "%d\n", (val >> bit) & 1); +} + +/* --- sysfs: bypass_an per port --- */ + +static ssize_t bypass_an_port0_show(struct kobject *kobj, + struct kobj_attribute *attr, char *buf) +{ + return bit_show(REG_PORT0_AN, AN_BYPASS_BIT, buf); +} + +static ssize_t bypass_an_port0_store(struct kobject *kobj, + struct kobj_attribute *attr, + const char *buf, size_t count) +{ + unsigned long input; + int ret; + + ret = kstrtoul(buf, 0, &input); + if (ret) + return ret; + + bypass_an_val[0] = input ? 1 : 0; + set_bit_in_reg(REG_PORT0_AN, AN_BYPASS_BIT, bypass_an_val[0]); + return count; +} + +static ssize_t bypass_an_port1_show(struct kobject *kobj, + struct kobj_attribute *attr, char *buf) +{ + return bit_show(REG_PORT1_AN, AN_BYPASS_BIT, buf); +} + +static ssize_t bypass_an_port1_store(struct kobject *kobj, + struct kobj_attribute *attr, + const char *buf, size_t count) +{ + unsigned long input; + int ret; + + ret = kstrtoul(buf, 0, &input); + if (ret) + return ret; + + bypass_an_val[1] = input ? 1 : 0; + set_bit_in_reg(REG_PORT1_AN, AN_BYPASS_BIT, bypass_an_val[1]); + return count; +} + +/* --- sysfs: port_type per port (read-only, set by phy link driver) --- */ + +static ssize_t port_type_port0_show(struct kobject *kobj, + struct kobj_attribute *attr, char *buf) +{ + return bit_show(REG_PORT0_TYPE, PORT_TYPE_BIT, buf); +} + +static ssize_t port_type_port1_show(struct kobject *kobj, + struct kobj_attribute *attr, char *buf) +{ + return bit_show(REG_PORT1_TYPE, PORT_TYPE_BIT, buf); +} + +static struct kobj_attribute bypass_an_port0_attr = __ATTR_RW(bypass_an_port0); +static struct kobj_attribute bypass_an_port1_attr = __ATTR_RW(bypass_an_port1); +static struct kobj_attribute port_type_port0_attr = __ATTR_RO(port_type_port0); +static struct kobj_attribute port_type_port1_attr = __ATTR_RO(port_type_port1); + +static struct attribute *cn9130_attrs[] = { + &bypass_an_port0_attr.attr, + &bypass_an_port1_attr.attr, + &port_type_port0_attr.attr, + &port_type_port1_attr.attr, + NULL, +}; + +static const struct attribute_group cn9130_attr_group = { + .attrs = cn9130_attrs, +}; + +static int __init cn9130_led_init(void) +{ + int i, ret; + const int count = ARRAY_SIZE(writes); + + pr_info(DRV_NAME ": starting hardcoded MMIO writes (%d entries)\n", count); + + for (i = 0; i < count; i++) { + u64 phys = writes[i].phys; + u32 val = writes[i].val; + u32 rb; + + if (mmio_write32(phys, val)) { + pr_err(DRV_NAME ": write failed for phys=0x%llx\n", + (unsigned long long)phys); + continue; + } + if (mmio_read32(phys, &rb) == 0) + pr_info(DRV_NAME ": wrote 0x%08X to 0x%llx, readback=0x%08X\n", + val, (unsigned long long)phys, rb); + } + + pr_info(DRV_NAME ": all writes complete\n"); + + cn9130_kobj = kobject_create_and_add(DRV_NAME, kernel_kobj); + if (!cn9130_kobj) { + pr_err(DRV_NAME ": failed to create kobject\n"); + return -ENOMEM; + } + + ret = sysfs_create_group(cn9130_kobj, &cn9130_attr_group); + if (ret) { + pr_err(DRV_NAME ": failed to create sysfs group\n"); + kobject_put(cn9130_kobj); + return ret; + } + + poll_thread = kthread_run(cn9130_poll_fn, NULL, DRV_NAME "_poll"); + if (IS_ERR(poll_thread)) { + pr_err(DRV_NAME ": failed to create poll thread\n"); + sysfs_remove_group(cn9130_kobj, &cn9130_attr_group); + kobject_put(cn9130_kobj); + return PTR_ERR(poll_thread); + } + + pr_info(DRV_NAME ": poll thread started\n"); + return 0; +} + +static void __exit cn9130_led_exit(void) +{ + kthread_stop(poll_thread); + sysfs_remove_group(cn9130_kobj, &cn9130_attr_group); + kobject_put(cn9130_kobj); + pr_info(DRV_NAME ": unloaded\n"); +} + +module_init(cn9130_led_init); +module_exit(cn9130_led_exit); + +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("NOKIA"); +MODULE_DESCRIPTION("LED driver for CN9130"); diff --git a/platform/nokia-vs/sonic-platform-nokia/7215-c1/modules/mule.h b/platform/nokia-vs/sonic-platform-nokia/7215-c1/modules/mule.h new file mode 100644 index 00000000000..665aaac78db --- /dev/null +++ b/platform/nokia-vs/sonic-platform-nokia/7215-c1/modules/mule.h @@ -0,0 +1,153 @@ +/* mule.h */ + +#ifndef CPUCTL_MOD_H +#define CPUCTL_MOD_H + +#define MULE_VERSION_STATUS 0x0 +#define MULE_ERROR_ADDRESS 0x4 +#define MULE_SCRATCH_PAD0 0x8 +#define MULE_SCRATCH_PAD1 0xC +#define MULE_SCRATCH_PAD2 0x10 +#define MULE_GPIO_DIRECTION 0x14 +#define MULE_GPIO_VALUE 0x18 +#define MULE_GPIO_SCAN 0x1c +#define MULE_XDMA_CONTROL 0x20 +#define MULE_INT_STATUS 0x24 +#define MULE_INT_ENABLE0 0x28 +#define MULE_INT_ENABLE1 0x2C +#define MULE_UART_CONTROL0 0x30 +#define MULE_UART_CONTROL1 0x34 +#define MULE_UART_TX_FIFO0 0x38 +#define MULE_UART_TX_FIFO1 0x3c +#define MULE_C2H_FRC0 0x40 +#define MULE_C2H_FRC1 0x44 +#define MULE_C2H_FRC2 0x48 +#define MULE_C2H_FRC3 0x4c +#define MULE_H2C_FRC0 0x50 +#define MULE_H2C_FRC1 0x54 +#define MULE_H2C_FRC2 0x58 +#define MULE_H2C_FRC3 0x5c + +#define MULE_PER_UART_OFFSET 0x100 +#define MULE_UART_RBR_RO 0x0 +#define MULE_UART_THR_WO 0x0 +#define MULE_UART_DIV_LSB_RW 0x0 +#define MULE_UART_IER_RW 0x04 +#define MULE_UART_DIV_MSB_RW 0x04 +#define MULE_UART_IIR_RO 0x08 +#define MULE_UART_FIFO_CTRL_WO 0x08 +#define MULE_UART_LCR_RW 0x0C +#define MULE_UART_MCR_RW 0x10 +#define MULE_UART_LSR_RW 0x14 +#define MULE_UART_MSR_RW 0x18 +#define MULE_UART_SCRATCH_RW 0x1C +#define MULE_UART_CURTEMP 0xe00 +#define MULE_UART_MAXTEMP 0xe80 +#define MULE_UART_MINTEMP 0xe90 + +#define MULE_XDMA_CONTROL_h2c_enable_b (1 << 16) +#define MULE_XDMA_CONTROL_c2h_enable (1 << 0) +#define MULE_XDMA_CONTROL_c2h_interval_us(_x) ((((_x / 150 ) - 1) & 0xff) << 2) + +#define MULE_UART_LCR_dlab (1 << 7) +#define MULE_UART_LCR_brkctrl (1 << 6) +#define MULE_UART_LCR_stickpar (1 << 5) +#define MULE_UART_LCR_evenpar (1 << 4) +#define MULE_UART_LCR_parity (1 << 3) +#define MULE_UART_LCR_stopbit (1 << 2) +#define MULE_UART_LCR_WLEN5 0x00 +#define MULE_UART_LCR_WLEN6 0x01 +#define MULE_UART_LCR_WLEN7 0x02 +#define MULE_UART_LCR_WLEN8 0x03 + +#define MULE_FCR_RXRST 0x02 +#define MULE_FCR_TXRST 0x04 +#define MULE_FCR_RXWM(_x) ((((_x) & 3) << 6)) + +#define MULE_INT_H2C_FRAMING_ERR (1 << 21) +#define MULE_INT_H2C_OVERFLOW_ERR (1 << 20) +#define MULE_INT_H2C_BUFFER_RDY (1 << 17) +#define MULE_INT_H2C_FRAME_ABSORBED (1 << 16) +#define MULE_INT_C2H_UNDERRUN_ERR (1 << 5) +#define MULE_INT_C2H_OVERFLOW_ERR (1 << 4) +#define MULE_INT_C2H_BUFFER_RDY (1 << 1) +#define MULE_INT_C2H_FRAME_RDY (1 << 0) + +#define XDMA_INTR_ALL_ERR_MASK (MULE_INT_H2C_FRAMING_ERR | MULE_INT_H2C_OVERFLOW_ERR | \ + MULE_INT_C2H_UNDERRUN_ERR | MULE_INT_C2H_OVERFLOW_ERR ) + +#define MULE_LSR_OVERRUN 0x02 +#define MULE_LSR_XMIT_FIFO 0x20 +#define MULE_LSR_XMIT_EMPTY 0x40 +#define MULE_LSR_FIFO_ERR 0x80 + +#define MULE_MSR_CTS 0x10 +#define MULE_MSR_DSR 0x20 +#define MULE_MSR_RI 0x40 +#define MULE_MSR_DCD 0x80 + +#define MULE_MCR_DTR (1 << 0) +#define MULE_MCR_RTS (1 << 1) +#define MULE_MCR_OUT0 (1 << 2) +#define MULE_MCR_OUT1 (1 << 3) +#define MULE_MCR_LOOP (1 << 4) +#define MULE_MCR_AFCE (1 << 5) + + +#define H2C_CHAN 0x0000 +#define C2H_CHAN 0x1000 +#define IRQ_BLOCK 0x2000 +#define H2C_SGDMA 0x4000 +#define C2H_SGDMA 0x5000 + +#define XDMA_CTRL_RUN_STOP (1UL << 0) +#define XDMA_CTRL_IE_DESC_STOPPED (1UL << 1) +#define XDMA_CTRL_IE_DESC_COMPLETED (1UL << 2) +#define XDMA_CTRL_IE_DESC_ALIGN_MISMATCH (1UL << 3) +#define XDMA_CTRL_IE_MAGIC_STOPPED (1UL << 4) +#define XDMA_CTRL_IE_INVALID_LEN (1UL << 5) +#define XDMA_CTRL_IE_IDLE_STOPPED (1UL << 6) +#define XDMA_CTRL_IE_READ_ERROR (0x1FUL << 9) +#define XDMA_CTRL_IE_DESC_ERROR (0x1FUL << 19) +#define XDMA_CTRL_NON_INCR_ADDR (1UL << 25) +#define XDMA_CTRL_POLL_MODE_WB (1UL << 26) +#define XDMA_CTRL_STM_MODE_WB (1UL << 27) + +#define XDMA_STAT_BUSY (1UL << 0) +#define XDMA_STAT_DESC_STOPPED (1UL << 1) +#define XDMA_STAT_DESC_COMPLETED (1UL << 2) +#define XDMA_STAT_ALIGN_MISMATCH (1UL << 3) +#define XDMA_STAT_MAGIC_STOPPED (1UL << 4) +#define XDMA_STAT_INVALID_LEN (1UL << 5) +#define XDMA_STAT_IDLE_STOPPED (1UL << 6) +#define XDMA_STAT_COMMON_ERR_MASK \ + (XDMA_STAT_ALIGN_MISMATCH | XDMA_STAT_MAGIC_STOPPED | \ + XDMA_STAT_INVALID_LEN) + + +#define WINDOW_SIZE 1024 +struct sliding_avg { + u64 buffer[WINDOW_SIZE]; + u64 sum; + int index; + int count; +}; + +static inline void avg_init(struct sliding_avg *s) { + s->sum = 0; + s->index = 0; + s->count = 0; + for (int i = 0; i < WINDOW_SIZE; i++) s->buffer[i] = 0; +} + +static inline u64 avg_update(struct sliding_avg *s, u64 new_val) { + s->sum -= s->buffer[s->index]; + s->buffer[s->index] = new_val; + s->sum += new_val; + s->index = (s->index + 1) % WINDOW_SIZE; + if (s->count < WINDOW_SIZE) + s->count++; + return s->sum / s->count; +} + +#endif diff --git a/platform/nokia-vs/sonic-platform-nokia/7215-c1/modules/mule_uart.c b/platform/nokia-vs/sonic-platform-nokia/7215-c1/modules/mule_uart.c new file mode 100644 index 00000000000..fa4014efe98 --- /dev/null +++ b/platform/nokia-vs/sonic-platform-nokia/7215-c1/modules/mule_uart.c @@ -0,0 +1,1334 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * mule_uart.c -- Mule UART driver + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "mule.h" + +#define DRV_NAME "mule" +#define MULE_MAXPORTS 48 +#define MULE_PORTS_REAL 48 +#define PORT_MULE_UART PORT_16550A +#define MULE_FIFO_LEN 8 +#define MULE_FPGA_MIN_REV 0x0f +#define MULE_FPGA_MIN_THERMAL_REV 0x11 + +typedef __u8 u8; +typedef __u32 u32; +typedef __u64 u64; + +#define C2H_INTERVAL 600 +#define C2H_TIMEOUT_NS (1 * C2H_INTERVAL * 1000) +#define H2C_TIMEOUT_NS (1 * C2H_INTERVAL * 1000) +unsigned int poll_time = (C2H_INTERVAL / 2); + +#pragma pack(push, 1) +struct c2h_port +{ + unsigned char data[8]; + unsigned char valid; + unsigned char par_err; + unsigned char frm_err; + unsigned char brk_err; + unsigned char iir; + unsigned char lsr; + unsigned char msr; +}; +struct c2h_frame +{ + struct c2h_port ports[MULE_PORTS_REAL]; +}; + +struct h2c_port +{ + unsigned char data[8]; + unsigned char valid; +}; +struct h2c_frame +{ + struct h2c_port ports[MULE_PORTS_REAL]; +}; +#pragma pack(pop) + +static_assert(sizeof(struct h2c_frame) == 432); +static_assert(sizeof(struct c2h_frame) == 720); + +struct counters { + u64 h2c_frames_sent; + u64 h2c_frames_abs; + u64 h2c_framing_err; + u64 h2c_overflow_err; + u64 h2c_dma_avg; + u64 h2c_dma_time_max; + u64 c2h_frames_rcvd; + u64 c2h_dma_avg; + u64 c2h_dma_time_max; + u64 c2h_framing_err; + u64 c2h_overflow_err; + u64 c2h_desc_err; + u64 timer_h2c_cnt; + u64 timer_c2h_cnt; + u64 timer_loops; + u64 h2c_timeout; + u64 c2h_timeout; +}; + +struct mule_dev +{ + unsigned char __iomem *membase; + unsigned char __iomem *membase_xdma; + struct pci_dev *xdma; + struct xdma_desc *h2c_desc; + struct xdma_desc *c2h_desc; + struct h2c_frame *h2c_frame; + struct c2h_frame *c2h_frame; + dma_addr_t h2c_frame_phys; + dma_addr_t c2h_frame_phys; + dma_addr_t h2c_desc_phys; + dma_addr_t c2h_desc_phys; + struct work_struct mule_bh_work; + struct work_struct c2h_bh_work; + struct device *dev; + int h2c_irq; + int c2h_irq; + spinlock_t lock_ap; + int active_ports; + struct { + struct uart_port port; + struct device *port_dev; + int enabled; + int stop_rx; + int start_tx; + u8 mcr; + u8 msr; + u8 x_char; + u8 flip; + } p[MULE_MAXPORTS]; + atomic_t mule_intr_status; + atomic_t c2h_xdma_status; + u64 c2h_busy; + int c2h_busy_cnt; + u32 c2h_frc0; + u64 h2c_busy; + int h2c_busy_cnt; + u32 h2c_frc1; + struct hrtimer c2h_timer; + spinlock_t lock_timer; + struct timer_list flip_timer; + u32 version; + struct counters counters; + struct sliding_avg h2c_dma_savg; + struct sliding_avg c2h_dma_savg; +}; + +struct xdma_desc { + u32 control; + u32 len; + u32 src_addr_lo; + u32 src_addr_hi; + u32 dst_addr_lo; + u32 dst_addr_hi; + u32 nxt_addr_lo; + u32 nxt_addr_hi; +} __packed; + +#define DESC_MAGIC 0xAD4B0000UL +#define XDMA_DESC_STOPPED (1UL << 0) +#define XDMA_DESC_COMPLETED (1UL << 1) +#define XDMA_DESC_EOP (1UL << 4) + + +static u32 mule_reg_read(unsigned char __iomem *base, unsigned offset) +{ + u32 val; + volatile void __iomem *addr = (base + offset); + val = readl(addr); + return val; +} + +static void mule_reg_write(unsigned char __iomem *base, unsigned offset, u32 value) +{ + u8 *addr = base + offset; + writel(value, addr); +} + +static ssize_t version_show(struct device *dev, struct device_attribute *attr, char *buf) { + struct mule_dev *mdev = dev_get_drvdata(dev); + u32 val = mule_reg_read(mdev->membase,MULE_VERSION_STATUS); + scnprintf(buf, PAGE_SIZE, "0x%02x\n", val & 0xff); + return strlen(buf); +} + +static int convert_temp(u32 val) { + u64 mc = (u64)((val & 0xffff) >> 4) * 503975; + return ((((mc / 4096) - 273150) + 50 ) / 100); +} + +static ssize_t temp_cur_show(struct device *dev, struct device_attribute *attr, char *buf) { + struct mule_dev *mdev = dev_get_drvdata(dev); + if (mdev->version < MULE_FPGA_MIN_THERMAL_REV) + return -ENODEV; + u32 val = mule_reg_read(mdev->membase,MULE_UART_CURTEMP); + int temp = convert_temp(val); + scnprintf(buf, PAGE_SIZE, "%d.%01d\n", temp / 10, temp % 10); + return strlen(buf); +} + +static ssize_t temp_max_show(struct device *dev, struct device_attribute *attr, char *buf) { + struct mule_dev *mdev = dev_get_drvdata(dev); + if (mdev->version < MULE_FPGA_MIN_THERMAL_REV) + return -ENODEV; + u32 val = mule_reg_read(mdev->membase,MULE_UART_MAXTEMP); + int temp = convert_temp(val); + scnprintf(buf, PAGE_SIZE, "%d.%01d\n", temp / 10, temp % 10); + return strlen(buf); +} + +static ssize_t temp_min_show(struct device *dev, struct device_attribute *attr, char *buf) { + struct mule_dev *mdev = dev_get_drvdata(dev); + if (mdev->version < MULE_FPGA_MIN_THERMAL_REV) + return -ENODEV; + u32 val = mule_reg_read(mdev->membase,MULE_UART_MINTEMP); + int temp = convert_temp(val); + scnprintf(buf, PAGE_SIZE, "%d.%01d\n", temp / 10, temp % 10); + return strlen(buf); +} + +#define PCOUNTER(_name) p += scnprintf(p, (PAGE_SIZE - (p-buf)), "%s %llu\n", #_name, cnt._name); + +static ssize_t counters_show(struct device *dev, struct device_attribute *attr, char *buf) { + struct mule_dev *mdev = dev_get_drvdata(dev); + + if (!mdev) + return -ENODEV; + + struct counters cnt; + char* p = buf; + + spin_lock_bh(&mdev->lock_timer); + cnt = mdev->counters; + spin_unlock_bh(&mdev->lock_timer); + + PCOUNTER(h2c_frames_sent); + PCOUNTER(h2c_frames_abs); + PCOUNTER(h2c_framing_err); + PCOUNTER(h2c_overflow_err); + PCOUNTER(h2c_dma_avg); + PCOUNTER(h2c_dma_time_max); + PCOUNTER(h2c_timeout); + PCOUNTER(c2h_frames_rcvd); + PCOUNTER(c2h_framing_err); + PCOUNTER(c2h_dma_avg); + PCOUNTER(c2h_dma_time_max); + PCOUNTER(c2h_overflow_err); + PCOUNTER(c2h_desc_err); + PCOUNTER(c2h_timeout); + PCOUNTER(timer_h2c_cnt); + PCOUNTER(timer_c2h_cnt); + PCOUNTER(timer_loops); + + return (p - buf); +} + +static DEVICE_ATTR_RO(version); +static DEVICE_ATTR_RO(temp_cur); +static DEVICE_ATTR_RO(temp_max); +static DEVICE_ATTR_RO(temp_min); +static DEVICE_ATTR_RO(counters); + +static struct attribute *counters_attrs[] = { + &dev_attr_version.attr, + &dev_attr_temp_cur.attr, + &dev_attr_temp_max.attr, + &dev_attr_temp_min.attr, + &dev_attr_counters.attr, + NULL, +}; + +static const struct attribute_group counters_group = { + .attrs = counters_attrs, + NULL, +}; + +static unsigned int op_tx_empty(struct uart_port *port) +{ + unsigned int rc=0; + u32 val; + + val = mule_reg_read(port->membase,MULE_UART_LSR_RW); + if (val & MULE_LSR_XMIT_EMPTY) + rc = TIOCSER_TEMT; + + return rc; +} + +static unsigned int op_get_mctrl(struct uart_port *port) +{ + u32 val; + unsigned int mctrl = 0; + val = mule_reg_read(port->membase, MULE_UART_MSR_RW); + if (val & MULE_MSR_CTS) + mctrl |= TIOCM_CTS; + if (val & MULE_MSR_DSR) + mctrl |= TIOCM_DSR; + if (val & MULE_MSR_RI) + mctrl |= TIOCM_RI; + if (val & MULE_MSR_DCD) + mctrl |= TIOCM_CAR; + + return mctrl; +} + +static void op_set_mctrl(struct uart_port *port, unsigned int mctrl) +{ + struct mule_dev *mdev = port->private_data; + u32 mcr = mdev->p[port->line].mcr; + + if (mctrl & TIOCM_RTS) + mcr |= MULE_MCR_RTS; + else + mcr &= ~MULE_MCR_RTS; + if (mctrl & TIOCM_DTR) + mcr |= MULE_MCR_DTR; + else + mcr &= ~MULE_MCR_DTR; + +#ifdef MULE_OUT_LOOP_SUPPORT + if (mctrl & TIOCM_OUT1) + mcr |= MULE_MCR_OUT0; + if (mctrl & TIOCM_OUT2) + mcr |= MULE_MCR_OUT1; + if (mctrl & TIOCM_LOOP) + mcr |= MULE_MCR_LOOP; +#endif + + mule_reg_write(port->membase, MULE_UART_MCR_RW, mcr); + +} + +static void op_start_tx(struct uart_port *port) +{ + struct mule_dev *mdev = port->private_data; + mdev->p[port->line].start_tx = 1; +} + +static void op_stop_tx(struct uart_port *port) +{ + struct mule_dev *mdev = port->private_data; + mdev->p[port->line].start_tx = 0; +} + +static void op_start_rx(struct uart_port *port) +{ + struct mule_dev *mdev = port->private_data; + mdev->p[port->line].stop_rx = 0; +} + +static void op_stop_rx(struct uart_port *port) +{ + struct mule_dev *mdev = port->private_data; + mdev->p[port->line].stop_rx = 1; +} + +static void op_break_ctl(struct uart_port *port, int ctl) +{ + u32 val; + val = mule_reg_read(port->membase, MULE_UART_LCR_RW); + if (ctl) + val |= 0x40; + else + val &= ~0x40; + mule_reg_write(port->membase, MULE_UART_LCR_RW, val); +} + +static void mule_set_baud(struct uart_port *port, unsigned int baud, u8 lcr) +{ + unsigned int div; + + switch (baud) + { + case 115200: + div = 109; + break; + case 57600: + div = 217; + break; + case 38400: + div = 326; + break; + case 19200: + div = 651; + break; + case 9600: + div = 1302; + break; + default: + dev_warn(port->dev, "p=%d unsupported baud %d\n", port->line, baud); + return; + } + + lcr |= MULE_UART_LCR_dlab; + mule_reg_write(port->membase,MULE_UART_LCR_RW,lcr); + + mule_reg_write(port->membase,MULE_UART_DIV_MSB_RW,(div >> 8) & 0xff); + mule_reg_write(port->membase,MULE_UART_DIV_LSB_RW,div & 0xff); + + lcr &= ~MULE_UART_LCR_dlab; + mule_reg_write(port->membase,MULE_UART_LCR_RW,lcr); + +} + +static void op_set_termios(struct uart_port *port, + struct ktermios *termios, + const struct ktermios *old) +{ + unsigned int baud; + unsigned char lcr; + struct mule_dev *mdev = port->private_data; + u32 val; + + lcr = UART_LCR_WLEN(tty_get_char_size(termios->c_cflag)); + + if (termios->c_cflag & CSTOPB) + lcr |= MULE_UART_LCR_stopbit; + if (termios->c_cflag & PARENB) + lcr |= MULE_UART_LCR_parity; + if (!(termios->c_cflag & PARODD)) + lcr |= MULE_UART_LCR_evenpar; + if (termios->c_cflag & CMSPAR) + lcr |= MULE_UART_LCR_stickpar; + if ((termios->c_cflag & CRTSCTS) && (port->flags & UPF_HARD_FLOW)) { + port->status |= (UPSTAT_AUTOCTS | UPSTAT_AUTORTS ); + mdev->p[port->line].mcr |= MULE_MCR_AFCE; + } + else { + termios->c_cflag &= ~CRTSCTS; + port->status &= ~(UPSTAT_AUTOCTS | UPSTAT_AUTORTS ); + mdev->p[port->line].mcr &= ~MULE_MCR_AFCE; + } + val = mule_reg_read(port->membase, MULE_UART_MCR_RW); + val &= ~MULE_MCR_AFCE; + val |= mdev->p[port->line].mcr; + mule_reg_write(port->membase, MULE_UART_MCR_RW, val); + + baud = uart_get_baud_rate(port, termios, old, 9600, 115200); + tty_termios_encode_baud_rate(termios, baud, baud); + uart_update_timeout(port, termios->c_cflag, baud); + mule_set_baud(port, baud, lcr); + +} + +static void mule_uart_mode_set(struct mule_dev *mdev, struct uart_port *port, int enable) +{ + unsigned reg, val, uart; + + if ((port->line < 32)) { + reg = MULE_UART_CONTROL0; + uart = (1 << port->line); + } + else { + reg = MULE_UART_CONTROL1; + uart = (1 << (port->line - 32)); + } + val = mule_reg_read(mdev->membase,reg); + if (!enable) + val &= ~uart; + else + val |= uart; + mule_reg_write(mdev->membase, reg, val); + mdev->p[port->line].enabled = enable; + mdev->p[port->line].stop_rx = !enable; + +} + +static void fpga_flip_timer_fn(struct timer_list *t) +{ + struct mule_dev *mdev = from_timer(mdev, t, flip_timer); + + for (int i = 0; i < MULE_MAXPORTS; i++) { + struct uart_port *port = &mdev->p[i].port; + if (mdev->p[i].enabled && !mdev->p[i].stop_rx) { + if (mdev->p[i].flip) { + mdev->p[i].flip = 0; + tty_flip_buffer_push(&port->state->port); + } + } + } +} + +static void mule_uart_rx_chars(struct uart_port *port) +{ + u8 ch; + unsigned long valid, lsr; + int i, j; + struct mule_dev *mdev = port->private_data; + struct c2h_frame *frame = (struct c2h_frame *)mdev->c2h_frame; + struct c2h_port *c2h = &frame->ports[port->line]; + + lsr = c2h->lsr; + if (lsr & MULE_LSR_OVERRUN) { + port->icount.overrun++; + } + + if ((c2h->msr & MULE_MSR_CTS) != (mdev->p[port->line].msr & MULE_MSR_CTS)) { + mdev->p[port->line].msr = c2h->msr; + uart_port_lock(port); + uart_handle_cts_change(port, (c2h->msr & MULE_MSR_CTS) ? 1 : 0); + uart_port_unlock(port); + } + + valid = c2h->valid; + if (valid) { + for (i=0,j=1;i<8;i++,j<<=1) + { + if (valid & j) + { + u8 flag = TTY_NORMAL; + if (lsr & MULE_LSR_FIFO_ERR) + { + if (c2h->brk_err & j) + flag = TTY_BREAK; + else if (c2h->par_err & j) + flag = TTY_PARITY; + else if (c2h->frm_err & j) + flag = TTY_FRAME; + } + ch = c2h->data[i]; + port->icount.rx++; + uart_insert_char(port, lsr, MULE_LSR_OVERRUN, ch, flag); + } + } + + mdev->p[port->line].flip = 1; + } +} + +static void mule_irq_count_err(struct mule_dev *mdev, u32 val) +{ + if (unlikely(val & XDMA_INTR_ALL_ERR_MASK )) + { + if (val & MULE_INT_H2C_FRAMING_ERR) + mdev->counters.h2c_framing_err++; + if (val & MULE_INT_H2C_OVERFLOW_ERR) + mdev->counters.h2c_overflow_err++; + if (val & MULE_INT_C2H_UNDERRUN_ERR) + mdev->counters.c2h_framing_err++; + if (val & MULE_INT_C2H_OVERFLOW_ERR) + mdev->counters.c2h_overflow_err++; + } +} + +static void mule_dma_free(struct mule_dev *mdev) +{ + if( mdev->c2h_desc ) + dma_free_coherent(mdev->dev, sizeof(struct xdma_desc), mdev->c2h_desc, mdev->c2h_desc_phys); + if( mdev->h2c_desc ) + dma_free_coherent(mdev->dev, sizeof(struct xdma_desc), mdev->h2c_desc, mdev->h2c_desc_phys); + if( mdev->c2h_frame ) + dma_free_coherent(mdev->dev, sizeof(struct c2h_frame), mdev->c2h_frame, mdev->c2h_frame_phys); + if( mdev->h2c_frame ) + dma_free_coherent(mdev->dev, sizeof(struct h2c_frame), mdev->h2c_frame, mdev->h2c_frame_phys); + mdev->c2h_desc = NULL; + mdev->h2c_desc = NULL; + mdev->c2h_frame = NULL; + mdev->h2c_frame = NULL; + +} + +static int mule_dma_alloc(struct mule_dev *mdev) +{ + + int rc = 0; + + mdev->c2h_desc = dma_alloc_coherent(mdev->dev, sizeof(struct xdma_desc), &mdev->c2h_desc_phys, GFP_KERNEL); + if (!mdev->c2h_desc) { + goto err_alloc; + } + + mdev->h2c_desc = dma_alloc_coherent(mdev->dev, sizeof(struct xdma_desc), &mdev->h2c_desc_phys, GFP_KERNEL); + if (!mdev->h2c_desc) { + goto err_alloc; + } + + mdev->c2h_frame = dma_alloc_coherent(mdev->dev, sizeof(struct c2h_frame), &mdev->c2h_frame_phys, GFP_KERNEL); + if (!mdev->c2h_frame) { + goto err_alloc; + } + + mdev->h2c_frame = dma_alloc_coherent(mdev->dev, sizeof(struct h2c_frame), &mdev->h2c_frame_phys, GFP_KERNEL); + if (!mdev->h2c_frame) { + goto err_alloc; + } + + return rc; + +err_alloc: + dev_err(mdev->dev, "Failed to allocate DMA buffers\n"); + mule_dma_free(mdev); + return -ENOMEM; +} + +static void mule_c2h_dma_start(struct mule_dev *mdev) +{ + + mdev->c2h_desc->control = cpu_to_le32(DESC_MAGIC | XDMA_DESC_STOPPED | XDMA_DESC_EOP | + XDMA_DESC_COMPLETED); + mdev->c2h_desc->len = cpu_to_le32(sizeof(struct c2h_frame)); + mdev->c2h_desc->src_addr_lo = 0; + mdev->c2h_desc->src_addr_hi = 0; + mdev->c2h_desc->dst_addr_lo = cpu_to_le32((u32)(mdev->c2h_frame_phys & 0xffffffff)); + mdev->c2h_desc->dst_addr_hi = cpu_to_le32((u32)(mdev->c2h_frame_phys >> 32)); + mdev->c2h_desc->nxt_addr_lo = 0; + mdev->c2h_desc->nxt_addr_hi = 0; + + mule_reg_write(mdev->membase_xdma, C2H_CHAN + 0x04,0); + memset(mdev->c2h_frame,0,sizeof(struct c2h_frame)); + + mule_reg_write(mdev->membase_xdma, C2H_SGDMA + 0x80, (u32)(mdev->c2h_desc_phys & 0xffffffff)); + mule_reg_write(mdev->membase_xdma, C2H_SGDMA + 0x84, (u32)(mdev->c2h_desc_phys >> 32)); + mule_reg_write(mdev->membase_xdma, C2H_SGDMA + 0x88, (u32)(0)); + mule_reg_write(mdev->membase_xdma, C2H_SGDMA + 0x8C, (u32)(0)); + + mule_reg_write(mdev->membase_xdma, C2H_CHAN + 0x90, 0x06); + + mdev->c2h_frc0 = mule_reg_read(mdev->membase, MULE_C2H_FRC0); + do { + mdev->c2h_busy = ktime_get_ns(); + } while (mdev->c2h_busy == 0); + mdev->c2h_busy_cnt=0; + + mule_reg_write(mdev->membase_xdma, C2H_CHAN + 0x04, + XDMA_CTRL_RUN_STOP | XDMA_CTRL_IE_DESC_STOPPED | XDMA_CTRL_IE_DESC_COMPLETED | + XDMA_CTRL_IE_DESC_ALIGN_MISMATCH | XDMA_CTRL_IE_MAGIC_STOPPED | XDMA_CTRL_IE_INVALID_LEN | + XDMA_CTRL_IE_IDLE_STOPPED | XDMA_CTRL_IE_READ_ERROR | XDMA_CTRL_IE_DESC_ERROR | + XDMA_CTRL_STM_MODE_WB ); + +} + +static int mule_fill_h2c_frame(struct mule_dev *mdev) +{ + struct h2c_frame *h2cf = (struct h2c_frame *)mdev->h2c_frame; + int i, j, ready=0; + u64 txfifo; + + memset(h2cf,0,sizeof(struct h2c_frame)); + + txfifo = ((u64)mule_reg_read(mdev->membase, MULE_UART_TX_FIFO1) << 32) | + mule_reg_read(mdev->membase, MULE_UART_TX_FIFO0); + + for (i = 0; i < MULE_MAXPORTS; i++) + { + struct uart_port *port = &mdev->p[i].port; + struct tty_port *tport = &port->state->port; + int kflen; + int len; + if (!mdev->p[i].start_tx) + continue; + h2cf->ports[i].valid = 0; + + if (unlikely(mdev->p[i].x_char)) { + h2cf->ports[i].data[0] = mdev->p[i].x_char; + h2cf->ports[i].valid = 1; + mdev->p[i].x_char = 0; + ready = 1; + continue; + } + + kflen = kfifo_len(&tport->xmit_fifo); + len = MIN(kflen, MULE_FIFO_LEN); + if (len) { + if (txfifo & (u64)(1UL << i)) { + unsigned char *px; + unsigned blen; + + uart_port_lock(port); + blen = kfifo_out_linear_ptr(&tport->xmit_fifo,&px,len); + BUG_ON(blen > MULE_FIFO_LEN); + for (j = 0; j < blen; j++) { + h2cf->ports[i].data[j] = px[j]; + h2cf->ports[i].valid |= (1 << j); + } + uart_xmit_advance(port, blen); + if ((kflen - blen) < WAKEUP_CHARS) { + uart_write_wakeup(port); + } + uart_port_unlock(port); + + ready = 1; + } + } + } + return ready; +} + +static int mule_h2c_dma_start(struct mule_dev *mdev) +{ + + if (0 == mule_fill_h2c_frame(mdev)) { + return -EAGAIN; + } + + mdev->h2c_desc->control = cpu_to_le32(DESC_MAGIC | XDMA_DESC_STOPPED | XDMA_DESC_EOP | + XDMA_DESC_COMPLETED); + mdev->h2c_desc->len = cpu_to_le32(sizeof(struct h2c_frame)); + mdev->h2c_desc->src_addr_lo = cpu_to_le32((u32)(mdev->h2c_frame_phys & 0xffffffff)); + mdev->h2c_desc->src_addr_hi = cpu_to_le32((u32)(mdev->h2c_frame_phys >> 32)); + mdev->h2c_desc->dst_addr_lo = 0; + mdev->h2c_desc->dst_addr_hi = 0; + mdev->h2c_desc->nxt_addr_lo = 0; + mdev->h2c_desc->nxt_addr_hi = 0; + + mule_reg_write(mdev->membase_xdma, H2C_SGDMA + 0x80, (u32)(mdev->h2c_desc_phys & 0xffffffff)); + mule_reg_write(mdev->membase_xdma, H2C_SGDMA + 0x84, (u32)(mdev->h2c_desc_phys >> 32)); + + mule_reg_write(mdev->membase_xdma, H2C_CHAN + 0x40,0xffffffff); + + mdev->h2c_frc1 = mule_reg_read(mdev->membase, MULE_H2C_FRC1); + + do { + mdev->h2c_busy = ktime_get_ns(); + } while (mdev->h2c_busy == 0); + mdev->h2c_busy_cnt = 0; + + mule_reg_write(mdev->membase_xdma, H2C_CHAN + 0x4, + XDMA_CTRL_RUN_STOP | XDMA_CTRL_IE_DESC_STOPPED | XDMA_CTRL_IE_DESC_COMPLETED | + XDMA_CTRL_IE_DESC_ALIGN_MISMATCH | XDMA_CTRL_IE_MAGIC_STOPPED ); + mdev->counters.h2c_frames_sent++; + + return 0; +} + +static void __mule_int_enable(struct mule_dev *mdev) +{ + mule_reg_write(mdev->membase, MULE_INT_ENABLE0, + (XDMA_INTR_ALL_ERR_MASK | MULE_INT_H2C_FRAME_ABSORBED )); + + mule_reg_write(mdev->membase, MULE_INT_STATUS, 0); +} + +static void __mule_int_disable(struct mule_dev *mdev) +{ + mule_reg_write(mdev->membase, MULE_INT_ENABLE0, 0); + mule_reg_write(mdev->membase, MULE_INT_ENABLE1, 0); +} + +static enum hrtimer_restart c2h_timer_cb(struct hrtimer *timer) { + + struct mule_dev *mdev = container_of(timer, struct mule_dev, c2h_timer); + u64 now,val; + + spin_lock(&mdev->lock_timer); + const u32 c2h_mask = ( MULE_INT_C2H_FRAME_RDY | MULE_INT_C2H_BUFFER_RDY); + u32 c2h_rdy = mule_reg_read(mdev->membase, MULE_INT_STATUS); + c2h_rdy &= c2h_mask; + + if (mdev->c2h_busy) + mdev->c2h_busy_cnt++; + if (mdev->h2c_busy) + mdev->h2c_busy_cnt++; + now = ktime_get_ns(); + + val = mdev->c2h_busy; + + if (unlikely(val && ((now - val) > C2H_TIMEOUT_NS))) { + u64 tcnt = mdev->counters.timer_c2h_cnt; + u64 frc = mdev->counters.c2h_frames_rcvd; + u32 bhstatus = atomic_read(&mdev->c2h_xdma_status); + u32 status = mule_reg_read(mdev->membase_xdma, C2H_CHAN + 0x40); + u32 frc0 = mule_reg_read(mdev->membase, MULE_C2H_FRC0); + dev_warn(mdev->dev,"%s c2h timeout status 0x%x busy_cnt %d "\ + "now %lld busy %lld tcnt %lld frc %lld bhstatus 0x%x "\ + "frc0 0x%x -> 0x%x\n", + __FUNCTION__,status,mdev->c2h_busy_cnt, + now,val,tcnt,frc,bhstatus,mdev->c2h_frc0,frc0); + mule_reg_write(mdev->membase_xdma, C2H_CHAN + 0x40, status); + mule_reg_write(mdev->membase_xdma, C2H_CHAN + 0x04, 0); + mdev->c2h_busy = 0; + mdev->counters.c2h_timeout++; + } + + if (c2h_rdy && !mdev->c2h_busy && !mdev->h2c_busy) { + mule_reg_write(mdev->membase,MULE_INT_STATUS,~c2h_rdy); + mule_c2h_dma_start(mdev); + mdev->counters.timer_c2h_cnt++; + goto out; + } + + val = mdev->h2c_busy; + + if (val && ((now - val) > H2C_TIMEOUT_NS)) { + u64 tcnt = mdev->counters.timer_h2c_cnt; + u64 fabs = mdev->counters.h2c_frames_abs; + u32 bhstatus = atomic_read(&mdev->mule_intr_status); + u32 status = mule_reg_read(mdev->membase_xdma, H2C_CHAN + 0x40); + u32 mstatus = mule_reg_read(mdev->membase, MULE_INT_STATUS); + u32 menable = mule_reg_read(mdev->membase, MULE_INT_ENABLE0); + u32 frc1 = mule_reg_read(mdev->membase, MULE_H2C_FRC1); + u32 frc0 = mule_reg_read(mdev->membase, MULE_H2C_FRC0); + u32 frc2 = mule_reg_read(mdev->membase, MULE_H2C_FRC2); + u32 frc3 = mule_reg_read(mdev->membase, MULE_H2C_FRC3); + dev_warn(mdev->dev,"%s h2c timeout status 0x%x busy_cnt %d "\ + "now %lld busy %lld tcnt %lld abs %lld bhstatus 0x%x "\ + "frc1 0x%x -> 0x%x mstatus 0x%x menable 0x%x "\ + "frc0 0x%x frc2 0x%x frc3 0x%x\n", + __FUNCTION__,status,mdev->h2c_busy_cnt,\ + now,val,tcnt,fabs,bhstatus,mdev->h2c_frc1,frc1,mstatus,menable, + frc0,frc2,frc3); + mule_reg_write(mdev->membase_xdma, H2C_CHAN + 0x40, status); + mule_reg_write(mdev->membase_xdma, H2C_CHAN + 0x04, 0x0); + mdev->h2c_busy = 0; + mdev->counters.h2c_timeout++; + } + + if (!mdev->c2h_busy && !mdev->h2c_busy) { + int rc = mule_h2c_dma_start(mdev); + if (rc == 0) { + mdev->counters.timer_h2c_cnt++; + } + } + +out: + hrtimer_forward_now(timer, ns_to_ktime(poll_time * 1000)); + mdev->counters.timer_loops++; + spin_unlock(&mdev->lock_timer); + return HRTIMER_RESTART; +} + +#define TARGET_CPU 2 + +static void __c2h_timer_start(struct mule_dev *mdev) { + ktime_t ktime; + if (poll_time < 300) + poll_time = 300; + ktime = ktime_set(0, poll_time * 1000); + hrtimer_init(&mdev->c2h_timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL_PINNED_SOFT); + mdev->c2h_timer.function = &c2h_timer_cb; + hrtimer_start(&mdev->c2h_timer, ktime, HRTIMER_MODE_REL_PINNED_SOFT); +} + +static void c2h_timer_start(struct mule_dev *mdev) { + smp_call_function_single(TARGET_CPU, + (__force smp_call_func_t)__c2h_timer_start, mdev, 1); +} + +static void mule_bh_task(struct work_struct *work) +{ + struct mule_dev *mdev = container_of(work, struct mule_dev, mule_bh_work); + u32 status; + + status = atomic_xchg(&mdev->mule_intr_status,0); + + mule_irq_count_err(mdev, status); + if (likely(status & (MULE_INT_H2C_FRAME_ABSORBED | MULE_INT_H2C_FRAMING_ERR | MULE_INT_H2C_OVERFLOW_ERR))) { + u64 now = ktime_get_ns(); + mule_reg_write(mdev->membase_xdma, H2C_CHAN + 0x04, 0x0); + if (likely(status & MULE_INT_H2C_FRAME_ABSORBED)){ + mdev->counters.h2c_dma_avg = avg_update(&mdev->h2c_dma_savg, now - mdev->h2c_busy); + mdev->counters.h2c_dma_time_max = MAX(mdev->counters.h2c_dma_time_max, mdev->counters.h2c_dma_avg); + mdev->counters.h2c_frames_abs++; + mdev->h2c_busy = 0; + } + } +} + +static irqreturn_t mule_interrupt(int irq, void *data) +{ + struct mule_dev *mdev = data; + u32 status,enable0,val; + + status = mule_reg_read(mdev->membase, MULE_INT_STATUS); + enable0 = mule_reg_read(mdev->membase, MULE_INT_ENABLE0); + val = status & enable0; + + if (likely(val)) { + atomic_or(val, &mdev->mule_intr_status); + mule_reg_write(mdev->membase, MULE_INT_STATUS, ~val); + queue_work_on(smp_processor_id(),system_bh_highpri_wq,&mdev->mule_bh_work); + } + + return IRQ_RETVAL(val); +} + +static void c2h_xdma_task(struct work_struct *work) +{ + struct mule_dev *mdev = container_of(work, struct mule_dev, c2h_bh_work); + u32 status; + int i; + + status = atomic_xchg(&mdev->c2h_xdma_status,0); + + if (likely(status & XDMA_STAT_DESC_COMPLETED)) { + u64 now = ktime_get_ns(); + mdev->counters.c2h_dma_avg = avg_update(&mdev->c2h_dma_savg, now - mdev->c2h_busy); + mdev->counters.c2h_dma_time_max = MAX(mdev->counters.c2h_dma_time_max, mdev->counters.c2h_dma_avg); + mdev->c2h_busy = 0; + mdev->counters.c2h_frames_rcvd++; + for (i=0;ip[i].enabled && !mdev->p[i].stop_rx){ + mule_uart_rx_chars(&mdev->p[i].port); + } + } + if (!timer_pending(&mdev->flip_timer)) + mod_timer(&mdev->flip_timer, jiffies + msecs_to_jiffies(11)); + } + else if (status & XDMA_STAT_COMMON_ERR_MASK) { + dev_err(mdev->dev,"%s c2h desc error 0x%08x\n",__FUNCTION__,status); + mdev->counters.c2h_desc_err++; + mdev->c2h_busy = 0; + } + else if (status) { + dev_err(mdev->dev,"%s c2h desc unknown status 0x%08x\n",__FUNCTION__,status); + } + +} + +static irqreturn_t c2h_xdma_interrupt(int irq, void *data) +{ + struct mule_dev *mdev = data; + u32 status; + + status = mule_reg_read(mdev->membase_xdma, C2H_CHAN + 0x40); + + if (likely(status)) { + mule_reg_write(mdev->membase_xdma, C2H_CHAN + 0x40, status); + mule_reg_write(mdev->membase_xdma, C2H_CHAN + 0x04, 0); + atomic_or(status, &mdev->c2h_xdma_status); + queue_work_on(smp_processor_id(),system_bh_highpri_wq,&mdev->c2h_bh_work); + } + + return IRQ_RETVAL(status); +} + +static int op_startup(struct uart_port *port) +{ + struct mule_dev *mdev = port->private_data; + + spin_lock(&mdev->lock_ap); + if (mdev->active_ports == 0) + { + avg_init(&mdev->c2h_dma_savg); + mdev->counters.c2h_dma_time_max = 0; + avg_init(&mdev->h2c_dma_savg); + mdev->counters.h2c_dma_time_max = 0; + c2h_timer_start(mdev); + } + mdev->active_ports++; + spin_unlock(&mdev->lock_ap); + + mule_reg_write(port->membase, MULE_UART_FIFO_CTRL_WO, + MULE_FCR_RXWM(3) | MULE_FCR_RXRST | MULE_FCR_TXRST); + + mdev->p[port->line].msr = mule_reg_read(port->membase,MULE_UART_MSR_RW); + + mule_uart_mode_set(mdev, port, 1); + + return 0; +} + +static void op_shutdown(struct uart_port *port) +{ + struct mule_dev *mdev = port->private_data; + u32 val; + + spin_lock(&mdev->lock_ap); + mdev->active_ports--; + if (mdev->active_ports == 0) { + hrtimer_cancel(&mdev->c2h_timer); + } + spin_unlock(&mdev->lock_ap); + + mdev->p[port->line].start_tx = 0; + mule_uart_mode_set(mdev, port, 0); + + val = mule_reg_read(port->membase,MULE_UART_LCR_RW); + if (MULE_UART_LCR_brkctrl & val) + mule_reg_write(port->membase, MULE_UART_LCR_RW, (val & ~MULE_UART_LCR_brkctrl)); + +} + +static const char *op_type(struct uart_port *port) +{ + return (port->type == PORT_MULE_UART) ? "Mule UART" : NULL; +} + +static int op_request_port(struct uart_port *port) +{ + return 0; +} + +static void op_release_port(struct uart_port *port) +{ + +} + +static void op_throttle(struct uart_port *port) +{ + port->mctrl &= ~TIOCM_RTS; + port->ops->set_mctrl(port, port->mctrl); +} + +static void op_unthrottle(struct uart_port *port) +{ + port->mctrl |= TIOCM_RTS; + port->ops->set_mctrl(port, port->mctrl); +} + +static void op_send_xchar(struct uart_port *port, char ch) +{ + struct mule_dev *mdev = port->private_data; + mdev->p[port->line].x_char = ch; + +} + +static void op_config_port(struct uart_port *port, int type) +{ + if (type & UART_CONFIG_TYPE) + port->type = PORT_MULE_UART; + + if (port->line >= MULE_MAXPORTS) { + port->type = PORT_UNKNOWN; + return; + } + + mule_reg_write(port->membase, MULE_UART_LSR_RW, 0); +} + +static int op_verify_port(struct uart_port *port, struct serial_struct *ser) +{ + if ((ser->type != PORT_UNKNOWN) && (ser->type != PORT_MULE_UART)) + return -EINVAL; + return 0; +} + +static const struct uart_ops mule_fpga_ops = { + .tx_empty = op_tx_empty, + .get_mctrl = op_get_mctrl, + .set_mctrl = op_set_mctrl, + .start_tx = op_start_tx, + .stop_tx = op_stop_tx, + .start_rx = op_start_rx, + .stop_rx = op_stop_rx, + .break_ctl = op_break_ctl, + .startup = op_startup, + .shutdown = op_shutdown, + .set_termios = op_set_termios, + .type = op_type, + .throttle = op_throttle, + .unthrottle = op_unthrottle, + .send_xchar = op_send_xchar, + .request_port = op_request_port, + .release_port = op_release_port, + .config_port = op_config_port, + .verify_port = op_verify_port, +}; + +static struct uart_driver mule_fpga_driver = { + .owner = THIS_MODULE, + .driver_name = DRV_NAME, + .dev_name = "ttyCO", + .nr = MULE_MAXPORTS, + .cons = NULL, +}; + +static void mule_h2c_start(struct mule_dev *mdev) +{ + u32 control = MULE_XDMA_CONTROL_h2c_enable_b | MULE_XDMA_CONTROL_c2h_enable | + MULE_XDMA_CONTROL_c2h_interval_us(C2H_INTERVAL); + + mule_reg_write(mdev->membase, MULE_XDMA_CONTROL, control); + + __mule_int_enable(mdev); + +} + +static int mule_interrupt_alloc(struct mule_dev *mdev) +{ + u16 val; + int rc=0; + struct cpumask mask; + + pci_read_config_word(mdev->xdma, PCI_COMMAND, &val); + val |= PCI_COMMAND_INTX_DISABLE; + pci_write_config_word(mdev->xdma, PCI_COMMAND, val); + + cpumask_clear(&mask); + cpumask_set_cpu(TARGET_CPU, &mask); + + rc = pci_alloc_irq_vectors(mdev->xdma, 4, 4, PCI_IRQ_MSI | PCI_IRQ_AFFINITY); + if (rc < 4) { + dev_err(mdev->dev, "unable to allocate IRQ vectors rc=%d\n", rc); + goto err_out; + } + + __mule_int_disable(mdev); + mule_reg_write(mdev->membase_xdma, IRQ_BLOCK + 0xA0, 0); + mule_reg_write(mdev->membase_xdma, IRQ_BLOCK + 0x10, 0); + + mdev->h2c_irq = pci_irq_vector(mdev->xdma, 0); + irq_set_affinity_hint(mdev->h2c_irq, &mask); + INIT_WORK(&mdev->mule_bh_work, mule_bh_task); + if (request_irq(mdev->h2c_irq, mule_interrupt, 0, DRV_NAME, mdev)) { + dev_err(mdev->dev, "unable to request IRQ %d\n", mdev->h2c_irq); + rc = -EBUSY; + goto err_out; + } + + mdev->c2h_irq = pci_irq_vector(mdev->xdma, 1); + irq_set_affinity_hint(mdev->c2h_irq, &mask); + INIT_WORK(&mdev->c2h_bh_work, c2h_xdma_task); + if (request_irq(mdev->c2h_irq, c2h_xdma_interrupt, 0, DRV_NAME, mdev)) { + dev_err(mdev->dev, "unable to request IRQ %d\n", mdev->c2h_irq); + rc = -EBUSY; + goto err_out; + } + + mule_reg_write(mdev->membase_xdma, H2C_CHAN + 0x04, 0x0); + mule_reg_write(mdev->membase_xdma, C2H_CHAN + 0x04, 0x0); + mule_reg_write(mdev->membase_xdma, H2C_CHAN + 0x40,0xffffffff); + mule_reg_write(mdev->membase_xdma, C2H_CHAN + 0x40,0xffffffff); + + mule_reg_write(mdev->membase_xdma, IRQ_BLOCK + 0xA0, 0x0100); + mule_reg_write(mdev->membase_xdma, IRQ_BLOCK + 0x10, 0x02); + + mule_reg_write(mdev->membase_xdma, IRQ_BLOCK + 0x80, 0x0000); + mule_reg_write(mdev->membase_xdma, IRQ_BLOCK + 0x04, 0x03); + + return 0; + +err_out: + pci_free_irq_vectors(mdev->xdma); + return rc; +} + +static int mule_fpga_probe(struct platform_device *pdev) +{ + struct mule_dev *mdev; + int i; + u32 val; + int rc=0; + + mdev = devm_kzalloc(&pdev->dev, sizeof(struct mule_dev), GFP_KERNEL); + if (!mdev){ + return -ENOMEM; + } + + mdev->xdma = pci_get_device(0x1064, 0x7022, NULL); + if(mdev->xdma == NULL) { + dev_err(&pdev->dev, "pci_get_device failed\n"); + devm_kfree(&pdev->dev,mdev); + return -ENODEV; + } + + rc = pci_enable_device(mdev->xdma); + if (rc) { + dev_err(mdev->dev, "pci_enable_device failed rc=%d\n", rc); + return rc; + } + pcie_capability_set_word(mdev->xdma, PCI_EXP_DEVCTL, PCI_EXP_DEVCTL_RELAX_EN); + pcie_capability_set_word(mdev->xdma, PCI_EXP_DEVCTL, PCI_EXP_DEVCTL_EXT_TAG); + + rc = pcie_set_readrq(mdev->xdma, 512); + if (rc) { + dev_err(mdev->dev, "pcie_set_readrq failed rc=%d\n", rc); + return rc; + } + + pci_set_master(mdev->xdma); + + rc = pci_request_regions(mdev->xdma, DRV_NAME); + if (rc) { + dev_err(mdev->dev, "pci_request_regions failed rc=%d\n", rc); + return rc; + } + + mdev->membase = pci_iomap(mdev->xdma, 0, 0); + mdev->membase_xdma = pci_iomap(mdev->xdma, 1, 0); + val = mule_reg_read(mdev->membase,MULE_VERSION_STATUS); + mdev->version = val & 0xff; + dev_info(&pdev->dev, "%s Version 0x%02x (%08x)\n", __FUNCTION__, + mdev->version, val); + + if (mdev->version < MULE_FPGA_MIN_REV) { + dev_err(&pdev->dev, "unsupported firmware version 0x%02x\n", mdev->version); + pci_iounmap(mdev->xdma, mdev->membase); + pci_iounmap(mdev->xdma, mdev->membase_xdma); + pci_release_regions(mdev->xdma); + devm_kfree(&pdev->dev,mdev); + return -ENODEV; + } + + spin_lock_init(&mdev->lock_ap); + spin_lock_init(&mdev->lock_timer); + mdev->active_ports = 0; + mdev->h2c_busy = 0; + mdev->h2c_busy_cnt = 0; + mdev->c2h_busy_cnt = 0; + mdev->c2h_busy = 0; + atomic_set(&mdev->mule_intr_status,0); + atomic_set(&mdev->c2h_xdma_status,0); + + mdev->dev = &pdev->dev; + mule_reg_write(mdev->membase, MULE_XDMA_CONTROL, 0); + + rc = mule_dma_alloc(mdev); + if (rc) { + dev_err(&pdev->dev, "%s mule_dma_alloc rc %d\n", __FUNCTION__,rc); + devm_kfree(&pdev->dev,mdev); + return rc; + } + + rc = mule_interrupt_alloc(mdev); + if (rc) { + pci_release_regions(mdev->xdma); + mule_dma_free(mdev); + devm_kfree(&pdev->dev,mdev); + return rc; + } + + mule_reg_write(mdev->membase, MULE_UART_CONTROL0, 0); + mule_reg_write(mdev->membase, MULE_UART_CONTROL1, 0); + + for (i = 0; i < MULE_MAXPORTS; i++) + { + struct uart_port *port; + port = &mdev->p[i].port; + port->line = i; + port->membase = mdev->membase + MULE_PER_UART_OFFSET + (i * 0x20); + port->type = PORT_MULE_UART; + port->fifosize = MULE_FIFO_LEN; + port->uartclk = 9600 * 16; + port->iotype = SERIAL_IO_MEM; + port->ops = &mule_fpga_ops; + port->flags = UPF_BOOT_AUTOCONF | UPF_HARD_FLOW; + port->dev = &pdev->dev; + port->private_data = (void*)mdev; + port->ignore_status_mask = 0; + rc = uart_add_one_port(&mule_fpga_driver, port); + + if (rc) { + dev_err(&pdev->dev, "%s uart_add_one_port p=%d rc %d\n", __FUNCTION__,i,rc); + pci_free_irq_vectors(mdev->xdma); + devm_kfree(&pdev->dev,mdev); + return rc; + } + } + + timer_setup(&mdev->flip_timer, fpga_flip_timer_fn, 0); + + platform_set_drvdata(pdev, mdev); + pci_set_drvdata(mdev->xdma, mdev); + + rc = sysfs_create_group(&mdev->xdma->dev.kobj, &counters_group); + if (rc) + dev_err(&pdev->dev, "%s sysfs create failed rc %d\n", __FUNCTION__,rc); + + mule_h2c_start(mdev); + + return rc; +} + +static void mule_fpga_remove(struct platform_device *pdev) +{ + int i; + struct mule_dev *mdev = platform_get_drvdata(pdev); + + __mule_int_disable(mdev); + mule_reg_write(mdev->membase, MULE_XDMA_CONTROL, 0); + mule_reg_write(mdev->membase_xdma, H2C_CHAN + 0x04, 0x0); + mule_reg_write(mdev->membase_xdma, C2H_CHAN + 0x04, 0x0); + + del_timer_sync(&mdev->flip_timer); + + for (i = 0; i < MULE_MAXPORTS; i++) + { + struct uart_port *port; + port = &mdev->p[i].port; + uart_remove_one_port(&mule_fpga_driver, port); + } + irq_set_affinity_hint(mdev->h2c_irq, NULL); + irq_set_affinity_hint(mdev->c2h_irq, NULL); + free_irq(mdev->h2c_irq, mdev); + free_irq(mdev->c2h_irq, mdev); + pci_free_irq_vectors(mdev->xdma); + pci_release_regions(mdev->xdma); + mule_dma_free(mdev); + sysfs_remove_group(&mdev->xdma->dev.kobj, &counters_group); + pci_iounmap(mdev->xdma, mdev->membase); + pci_iounmap(mdev->xdma, mdev->membase_xdma); + devm_kfree(&pdev->dev,mdev); +} + +static struct of_device_id mule_of_match[] = { + { + .name = DRV_NAME, + .compatible = DRV_NAME, + }, + { }, +}; + +MODULE_DEVICE_TABLE(of, mule_of_match); + +static struct platform_driver mule_fpga_platform_driver = { + .probe = mule_fpga_probe, + .remove = mule_fpga_remove, + .driver = { + .name = DRV_NAME, + .owner = THIS_MODULE, + .of_match_table = mule_of_match, + }, +}; + +static struct platform_device *pdev_simple; + +static int __init mule_fpga_init(void) +{ + int rc; + + rc = uart_register_driver(&mule_fpga_driver); + if (rc < 0) { + printk(KERN_WARNING "%s uart_register_driver rc %d\n", __FUNCTION__,rc); + return rc; + } + rc = platform_driver_register(&mule_fpga_platform_driver); + if (rc < 0) { + printk(KERN_WARNING "%s platform_driver_register rc %d\n", __FUNCTION__,rc); + uart_unregister_driver(&mule_fpga_driver); + } + pdev_simple = platform_device_register_simple(DRV_NAME,0,NULL,0); + return rc; +} + +static void __exit mule_fpga_exit(void) +{ + platform_driver_unregister(&mule_fpga_platform_driver); + uart_unregister_driver(&mule_fpga_driver); + platform_device_unregister(pdev_simple); +} + +module_init(mule_fpga_init); +module_exit(mule_fpga_exit); + +MODULE_DESCRIPTION("Mule UART driver"); +MODULE_AUTHOR("jon.goldberg@nokia.com"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:" DRV_NAME); diff --git a/platform/nokia-vs/sonic-platform-nokia/7215-c1/modules/nokia_7215_ixs_c1_cpld.c b/platform/nokia-vs/sonic-platform-nokia/7215-c1/modules/nokia_7215_ixs_c1_cpld.c new file mode 100644 index 00000000000..e2f6742eb69 --- /dev/null +++ b/platform/nokia-vs/sonic-platform-nokia/7215-c1/modules/nokia_7215_ixs_c1_cpld.c @@ -0,0 +1,817 @@ +/* + * CPLD driver for Nokia-7215-IXS-A1 Router + * + * Copyright (C) 2023 Nokia Corporation. + * Natarajan Subbiramani + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * see + * + * Based on ad7414.c + * Copyright 2006 Stefan Roese , DENX Software Engineering + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + + +#define DRIVER_NAME "nokia_7215_a1_cpld" + +// REG ADDRESS-MAP +#define BOARD_ID_REG 0x00 +#define RESET_CAUSE_REG 0x01 +#define CPLD_VERSION_REG 0x02 +#define SFP_PRESENCE_REG 0x03 +#define SFP_LOS_REG 0x04 +#define SFP_TX_DISABLE_REG 0x05 +#define MAC_INIT_STATUS_REG 0x06 +#define SYSTEM_STATUS_LED_CONTROL_REG 0x07 +#define POWER_AND_FAN_LED_CONTROL_REG 0x08 +#define SFP_TX_FAULT_STATUS_REG 0x09 +#define TEMP_EVENT_STATUS_REG 0x0D +#define TEMP_EVENT_MASK_REG 0x0E +#define SFP_LED_TEST_REG 0x0F +#define RESET_REG 0x10 +#define MISC_IRQ_LIVE_STATE_REG 0x12 +#define INTERRUPT_REG 0x13 +#define INTERRUPT_MASK_REG 0x14 +#define MISC_INT_STATUS_REG 0x16 +#define MISC_INT_MASK_REG 0x18 +#define GPIO_DIRECTION_REG 0x19 +#define GPIO_DATA_IN_REG 0x1A +#define GPIO_DATA_OUT_REG 0x1B +#define SCRATCH_REG 0xFE + +//REG BIT FIELD POSITIONS +#define RESET_CAUSE_REG_COLD_RESET 0x1 +#define RESET_CAUSE_REG_WARM_RESET 0x2 +#define RESET_CAUSE_REG_WDOG_RESET 0x4 +#define RESET_CAUSE_REG_SYS_RESET 0x8 +#define RESET_CAUSE_REG_THERMAL_OL 0x10 + +#define SFP_PRESENCE_REG_SFP1 0x2 +#define SFP_PRESENCE_REG_SFP2 0x3 + +#define SFP_LOS_REG_SFP1 0x2 +#define SFP_LOS_REG_SFP2 0x3 + +#define SFP_TX_DISABLE_REG_SFP1 0x2 +#define SFP_TX_DISABLE_REG_SFP2 0x3 +#define SFP_TX_DISABLE_REG_LED_MUX 0x4 + +#define TS1_ALERT_EVENT 0x2 +#define TS2_ALERT_EVENT 0x4 +#define TS3_ALERT_EVENT 0x8 +#define CPU_TEMP_EVENT 0x10 +#define AC5X_HIGHTEMP_EVENT 0x20 +#define DIMM_TEMP_EVENT 0x40 + +#define MAC_INIT_STATUS_REG_INIT_DONE 0x2 + +// sfp bit offset +#define SFP_LED_LINK_SFP1 7 +#define SFP_LED_ACT_SFP1 6 +#define SFP_LED_LINK_SFP2 5 +#define SFP_LED_ACT_SFP2 4 + +enum system_status_led_mode { + SYSTEM_STATUS_LED_OFF, + SYSTEM_STATUS_LED_AMBER, + SYSTEM_STATUS_LED_GREEN, + SYSTEM_STATUS_LED_AMBERBLINK8, + SYSTEM_STATUS_LED_GREENBLINK4, + SYSTEM_STATUS_LED_AMBERBLINK4, + SYSTEM_STATUS_LED_GREENBLINK1, + SYSTEM_STATUS_LED_COLORTOGGLE, + SYSTEM_STATUS_LED_INVALID +}; + +char *system_status_led_mode_str[]={"off", "amber", "green", "blink8-amber", "blink4-green", + "blink4-amber", "blink1-green", "toggle", "invalid"}; + +#define POWER_LED_OFFSET 6 +#define FAN_LED_OFFSET 4 +enum power_fan_led_mode { + POWER_FAN_LED_OFF, + POWER_FAN_LED_GREEN, + POWER_FAN_LED_AMBER, + POWER_FAN_LED_GREEN_BLINK, + POWER_FAN_INVALID +}; +char *power_fan_led_mode_str[]={"off", "green", "amber", "blink-green", "invalid"}; + +#define SFP_TX_FAULT_STATUS_SFP1 0x2 +#define SFP_TX_FAULT_STATUS_SFP2 0x3 + +#define RESET_REG_WARM_RESET 0x0 +#define RESET_REG_COLD_RESET 0x4 +#define RESET_REG_I2CMUX_RESET 0x6 +#define RESET_REG_ZL_RESET 0x7 + + +//========================================= CPLD DRIVER GPIO FUNCTIONS ========================================= + +// SPDX-License-Identifier: GPL-2.0 +// +// gpio-cpld-sfp.c - I2C CPLD GPIO provider for two SFP ports (SFP1, SFP2) +// Exposes 8 GPIO lines total: (presence, los, tx_disable, tx_fault) x 2 ports +// +// Based on the Nokia-7215-IXS-A1 CPLD register map +// +// GPIO offsets we export (0..11): +// 0: SFP1_PRESENT (input) -> reg 0x03 bit 2 +// 1: SFP1_LOS (input) -> reg 0x04 bit 2 +// 2: SFP1_TX_DISABLE(output)-> reg 0x05 bit 2 +// 3: SFP1_TX_FAULT (input) -> reg 0x09 bit 2 +// 4: SFP2_PRESENT (input) -> reg 0x03 bit 3 +// 5: SFP2_LOS (input) -> reg 0x04 bit 3 +// 6: SFP2_TX_DISABLE(output)-> reg 0x05 bit 3 +// 7: SFP2_TX_FAULT (input) -> reg 0x09 bit 3 +// 8: SFP1_LINK (input) -> reg 0x0F bit 7 +// 9: SFP1_ACT (input) -> reg 0x0F bit 6 +// 10: SFP2_LINK (input) -> reg 0x0F bit 5 +// 11: SFP2_ACT (input) -> reg 0x0F bit 4 + +/* ====== GPIO line mapping (offsets) ====== */ +enum { + NOKIA_CPLD_GPIO_SFP1_PRESENT = 0, /* in */ + NOKIA_CPLD_GPIO_SFP1_LOS, /* in */ + NOKIA_CPLD_GPIO_SFP1_TXDIS, /* out */ + NOKIA_CPLD_GPIO_SFP1_TXFLT, /* in */ + NOKIA_CPLD_GPIO_SFP2_PRESENT, /* in */ + NOKIA_CPLD_GPIO_SFP2_LOS, /* in */ + NOKIA_CPLD_GPIO_SFP2_TXDIS, /* out */ + NOKIA_CPLD_GPIO_SFP2_TXFLT, /* in */ + + NOKIA_CPLD_GPIO_SFP1_LINK, /* out */ + NOKIA_CPLD_GPIO_SFP1_ACT, /* out */ + NOKIA_CPLD_GPIO_SFP2_LINK, /* out */ + NOKIA_CPLD_GPIO_SFP2_ACT, /* out */ + NOKIA_CPLD_GPIO_LINES /* == 12 */ +}; + +struct cpld_line { + u8 reg; + u8 bit; + bool is_output; +}; + +struct cpld_data { + struct i2c_client *client; + struct mutex update_lock; + int mb_hw_version; + int cpld_version; +}; + +struct cpld_sfp { + struct regmap *regmap; + struct gpio_chip gc; + struct cpld_data *data_ptr; + /* If your CPLD has explicit DIR registers, add fields here. */ +}; + +static const struct cpld_line cpld_lines[NOKIA_CPLD_GPIO_LINES] = { + /* SFP1 */ + [NOKIA_CPLD_GPIO_SFP1_PRESENT] = { SFP_PRESENCE_REG, SFP_PRESENCE_REG_SFP1, false }, + [NOKIA_CPLD_GPIO_SFP1_LOS] = { SFP_LOS_REG, SFP_LOS_REG_SFP1, false }, + [NOKIA_CPLD_GPIO_SFP1_TXDIS] = { SFP_TX_DISABLE_REG, SFP_TX_DISABLE_REG_SFP1, true }, + [NOKIA_CPLD_GPIO_SFP1_TXFLT] = { SFP_TX_FAULT_STATUS_REG, SFP_TX_FAULT_STATUS_SFP1, false }, + /* SFP2 */ + [NOKIA_CPLD_GPIO_SFP2_PRESENT] = { SFP_PRESENCE_REG, SFP_PRESENCE_REG_SFP2, false }, + [NOKIA_CPLD_GPIO_SFP2_LOS] = { SFP_LOS_REG, SFP_LOS_REG_SFP2, false }, + [NOKIA_CPLD_GPIO_SFP2_TXDIS] = { SFP_TX_DISABLE_REG, SFP_TX_DISABLE_REG_SFP2, true }, + [NOKIA_CPLD_GPIO_SFP2_TXFLT] = { SFP_TX_FAULT_STATUS_REG, SFP_TX_FAULT_STATUS_SFP2, false }, + + [NOKIA_CPLD_GPIO_SFP1_LINK] = { SFP_LED_TEST_REG, SFP_LED_LINK_SFP1, true }, + [NOKIA_CPLD_GPIO_SFP1_ACT] = { SFP_LED_TEST_REG, SFP_LED_ACT_SFP1, true }, + [NOKIA_CPLD_GPIO_SFP2_LINK] = { SFP_LED_TEST_REG, SFP_LED_LINK_SFP2, true }, + [NOKIA_CPLD_GPIO_SFP2_ACT] = { SFP_LED_TEST_REG, SFP_LED_ACT_SFP2, true }, +}; + +/* ---- gpiolib ops ---- */ + +static int cpld_get_direction(struct gpio_chip *gc, unsigned int offset) +{ + /* 1 = input, 0 = output */ + if (offset >= NOKIA_CPLD_GPIO_LINES) + return -EINVAL; + + return cpld_lines[offset].is_output ? GPIO_LINE_DIRECTION_OUT + : GPIO_LINE_DIRECTION_IN; +} + +static int cpld_direction_input(struct gpio_chip *gc, unsigned int offset) +{ + if (offset >= NOKIA_CPLD_GPIO_LINES) + return -EINVAL; + /* If CPLD has DIR registers, set input here; otherwise no-op. */ + if (cpld_lines[offset].is_output) + return -EINVAL; /* this line is output-only by design */ + return 0; +} + +static int cpld_direction_output(struct gpio_chip *gc, + unsigned int offset, int value) +{ + struct cpld_sfp *c = gpiochip_get_data(gc); + unsigned int mask, v; + + if (offset >= NOKIA_CPLD_GPIO_LINES) + return -EINVAL; + if (!cpld_lines[offset].is_output) + return -EINVAL; + + mask = BIT(cpld_lines[offset].bit); + v = value ? mask : 0; + + /* If HW has DIR register, set output dir first. Then set level. */ + return regmap_update_bits(c->regmap, cpld_lines[offset].reg, mask, v); +} + +static int cpld_get(struct gpio_chip *gc, unsigned int offset) +{ + struct cpld_sfp *c = gpiochip_get_data(gc); + unsigned int val; + int ret; + + if (offset >= NOKIA_CPLD_GPIO_LINES) + return -EINVAL; + mutex_lock(&c->data_ptr->update_lock); + ret = regmap_read(c->regmap, cpld_lines[offset].reg, &val); + mutex_unlock(&c->data_ptr->update_lock); + + if (ret) + return ret; + + return !!(val & BIT(cpld_lines[offset].bit)); +} + +static void cpld_set(struct gpio_chip *gc, unsigned int offset, int value) +{ + struct cpld_sfp *c = gpiochip_get_data(gc); + unsigned int mask, v; + + if (offset >= NOKIA_CPLD_GPIO_LINES) + return; + if (!cpld_lines[offset].is_output) + return; + + mask = BIT(cpld_lines[offset].bit); + v = value ? mask : 0; + mutex_lock(&c->data_ptr->update_lock); + regmap_update_bits(c->regmap, cpld_lines[offset].reg, mask, v); + mutex_unlock(&c->data_ptr->update_lock); +} + +/* ---- I2C / regmap plumbing ---- */ + +static const struct regmap_config cpld_regmap_cfg = { + .reg_bits = 8, + .val_bits = 8, + .max_register = 0xFF, + .cache_type = REGCACHE_NONE, +}; + +static int cpld_gpio_init(struct cpld_data *data) +{ + struct cpld_sfp *c; + u32 ngpios = NOKIA_CPLD_GPIO_LINES; + int ret; + + struct i2c_client *client = data->client; + c = devm_kzalloc(&client->dev, sizeof(*c), GFP_KERNEL); + if (!c) + return -ENOMEM; + + c->data_ptr = data; + + c->regmap = devm_regmap_init_i2c(client, &cpld_regmap_cfg); + if (IS_ERR(c->regmap)) + return dev_err_probe(&client->dev, PTR_ERR(c->regmap), + "regmap init failed\n"); + + /* Optional DT override, but must be >= 12 if present */ + of_property_read_u32(client->dev.of_node, "ngpios", &ngpios); + if (ngpios < NOKIA_CPLD_GPIO_LINES) + ngpios = NOKIA_CPLD_GPIO_LINES; + + /* gpio_chip init */ + + c->gc.label = dev_name(&client->dev); + c->gc.parent = &client->dev; + c->gc.fwnode = dev_fwnode(&client->dev); + c->gc.owner = THIS_MODULE; + c->gc.base = -1; + c->gc.ngpio = ngpios; + c->gc.can_sleep = true; + + + c->gc.get = cpld_get; + c->gc.set = cpld_set; + c->gc.get_direction = cpld_get_direction; + c->gc.direction_input = cpld_direction_input; + c->gc.direction_output = cpld_direction_output; + + ret = devm_gpiochip_add_data(&client->dev, &c->gc, c); + if (ret) + return dev_err_probe(&client->dev, ret, "gpiochip add failed\n"); + + dev_info(&client->dev, + "CPLD SFP GPIO ready: 8 lines @ I2C 0x%02x (pres 0x03, los 0x04, txdis 0x05, fault 0x09)\n", + client->addr); + return 0; +} + +//========================================= CPLD DRIVER HWMON FUNCTIONS ========================================= + +static const unsigned short cpld_address_list[] = {0x41, I2C_CLIENT_END}; + +static int nokia_7215_ixs_a1_cpld_read(struct cpld_data *data, u8 reg) +{ + int val=0; + struct i2c_client *client=data->client; + + mutex_lock(&data->update_lock); + val = i2c_smbus_read_byte_data(client, reg); + if (val < 0) { + dev_err(&client->dev, "CPLD READ ERROR: reg(0x%02x) err %d\n", reg, val); + } + mutex_unlock(&data->update_lock); + + return val; +} + +static void nokia_7215_ixs_a1_cpld_write(struct cpld_data *data, u8 reg, u8 value) +{ + int res=0; + struct i2c_client *client=data->client; + + mutex_lock(&data->update_lock); + res = i2c_smbus_write_byte_data(client, reg, value); + if (res < 0) { + dev_err(&client->dev, "CPLD WRITE ERROR: reg(0x%02x) err %d\n", reg, res); + } + mutex_unlock(&data->update_lock); +} + +static ssize_t show_mainboard_hwversion(struct device *dev, struct device_attribute *devattr, char *buf) +{ + struct cpld_data *data = dev_get_drvdata(dev); + return sprintf(buf,"0x%02x\n",data->mb_hw_version); +} + +static ssize_t show_last_reset_cause(struct device *dev, struct device_attribute *devattr, char *buf) +{ + struct cpld_data *data = dev_get_drvdata(dev); + u8 val=0; + char *reason=NULL; + val = nokia_7215_ixs_a1_cpld_read(data, RESET_CAUSE_REG); + switch (val) { + case RESET_CAUSE_REG_COLD_RESET: + reason="cold_reset"; + break; + case RESET_CAUSE_REG_WARM_RESET: + reason="warm_reset"; + break; + case RESET_CAUSE_REG_WDOG_RESET: + reason="wdog_reset"; + break; + case RESET_CAUSE_REG_SYS_RESET: + reason="sys_reset"; + break; + case RESET_CAUSE_REG_THERMAL_OL: + reason="thermal_reset"; + break; + + default: + reason="unknown"; + break; + } + return sprintf(buf,"%s\n",reason); +} + +static ssize_t show_cpld_version(struct device *dev, struct device_attribute *devattr, char *buf) +{ + struct cpld_data *data = dev_get_drvdata(dev); + return sprintf(buf,"0x%02x\n",data->cpld_version); +} + +static ssize_t show_sfp_present(struct device *dev, struct device_attribute *devattr, char *buf) +{ + struct cpld_data *data = dev_get_drvdata(dev); + struct sensor_device_attribute *sda = to_sensor_dev_attr(devattr); + u8 val=0; + val = nokia_7215_ixs_a1_cpld_read(data, SFP_PRESENCE_REG); + + /* If the bit is set, SFP is not present. So, we are toggling intentionally */ + return sprintf(buf,"%d\n",(val>>sda->index) & 0x1 ? 0:1); +} + +static ssize_t show_sfp_los(struct device *dev, struct device_attribute *devattr, char *buf) +{ + struct cpld_data *data = dev_get_drvdata(dev); + struct sensor_device_attribute *sda = to_sensor_dev_attr(devattr); + u8 val=0; + val = nokia_7215_ixs_a1_cpld_read(data, SFP_LOS_REG); + + /* If the bit is set, LOS condition */ + return sprintf(buf,"%d\n",(val>>sda->index) & 0x1 ? 1:0); +} + +static ssize_t show_sfp_tx_disable(struct device *dev, struct device_attribute *devattr, char *buf) +{ + struct cpld_data *data = dev_get_drvdata(dev); + struct sensor_device_attribute *sda = to_sensor_dev_attr(devattr); + u8 val=0; + val = nokia_7215_ixs_a1_cpld_read(data, SFP_TX_DISABLE_REG); + + /* If the bit is set, Tx is disabled */ + return sprintf(buf,"%d\n",(val>>sda->index) & 0x1 ? 1:0); +} + +static ssize_t set_sfp_tx_disable(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + struct cpld_data *data = dev_get_drvdata(dev); + struct sensor_device_attribute *sda = to_sensor_dev_attr(devattr); + u8 reg_val=0, usr_val=0, mask; + int ret=kstrtou8(buf,10, &usr_val); + if (ret != 0) { + return ret; + } + if (usr_val > 1) { + return -EINVAL; + } + + mask = (~(1 << sda->index)) & 0xFF; + reg_val = nokia_7215_ixs_a1_cpld_read(data, SFP_TX_DISABLE_REG); + reg_val = reg_val & mask; + + usr_val = usr_val << sda->index; + + nokia_7215_ixs_a1_cpld_write(data, SFP_TX_DISABLE_REG, reg_val|usr_val); + + return count; + +} + +static ssize_t show_system_led_status(struct device *dev, struct device_attribute *devattr, char *buf) +{ + struct cpld_data *data = dev_get_drvdata(dev); + u8 val=0; + val = nokia_7215_ixs_a1_cpld_read(data, SYSTEM_STATUS_LED_CONTROL_REG); + if (val > SYSTEM_STATUS_LED_INVALID) { + val = SYSTEM_STATUS_LED_INVALID; + } + return sprintf(buf,"%s\n",system_status_led_mode_str[val]); +} + +static ssize_t set_system_led_status(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + struct cpld_data *data = dev_get_drvdata(dev); + int mode; + + for(mode=SYSTEM_STATUS_LED_OFF; mode> sda->index) & 0x3; + return sprintf(buf,"%s\n",power_fan_led_mode_str[val]); +} + +static ssize_t set_power_fan_led_status(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + struct cpld_data *data = dev_get_drvdata(dev); + struct sensor_device_attribute *sda = to_sensor_dev_attr(devattr); + u8 reg_val=0, mask=0, usr_val=0; + int i; + + mask = (~(0x3 << sda->index)) & 0xFF; + reg_val = nokia_7215_ixs_a1_cpld_read(data, POWER_AND_FAN_LED_CONTROL_REG); + reg_val = reg_val & mask; + + for(i=POWER_FAN_LED_OFF; iindex; + nokia_7215_ixs_a1_cpld_write(data, POWER_AND_FAN_LED_CONTROL_REG, reg_val|usr_val); + break; + } + } + + return count; +} + +static ssize_t show_sfp_tx_fault(struct device *dev, struct device_attribute *devattr, char *buf) +{ + struct cpld_data *data = dev_get_drvdata(dev); + struct sensor_device_attribute *sda = to_sensor_dev_attr(devattr); + u8 val=0; + val = nokia_7215_ixs_a1_cpld_read(data, SFP_TX_FAULT_STATUS_REG); + + /* If the bit is set, TX fault condition */ + return sprintf(buf,"%d\n",(val>>sda->index) & 0x1 ? 1:0); +} + +static ssize_t show_temp_event_status(struct device *dev, struct device_attribute *devattr, char *buf) +{ + struct cpld_data *data = dev_get_drvdata(dev); + u8 val=0; + char *reason=NULL; + val = nokia_7215_ixs_a1_cpld_read(data, TEMP_EVENT_STATUS_REG); + switch (val) { + case TS1_ALERT_EVENT: + reason="PCB Back"; + break; + case TS2_ALERT_EVENT: + reason="PCB Front"; + break; + case TS3_ALERT_EVENT: + reason="PCB Mid"; + break; + case CPU_TEMP_EVENT: + reason="cpu"; + break; + case AC5X_HIGHTEMP_EVENT: + reason="ac5x"; + break; + case DIMM_TEMP_EVENT: + reason="dimm"; + break; + + default: + reason="none"; + break; + } + return sprintf(buf,"0x%02x %s\n",val, reason); + +} + +static ssize_t show_sfp_ledtest_status(struct device *dev, struct device_attribute *devattr, char *buf) +{ + struct cpld_data *data = dev_get_drvdata(dev); + u8 val = nokia_7215_ixs_a1_cpld_read(data, SFP_LED_TEST_REG); + return sprintf(buf,"0x%02x\n",val); +} + +static ssize_t set_sfp_ledtest_status(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + struct cpld_data *data = dev_get_drvdata(dev); + u8 usr_val=0; + int ret=kstrtou8(buf,16, &usr_val); + if (ret != 0) { + return ret; + } + + nokia_7215_ixs_a1_cpld_write(data, SFP_LED_TEST_REG, usr_val); + return count; +} + +static ssize_t show_temp_event_mask_status(struct device *dev, struct device_attribute *devattr, char *buf) +{ + struct cpld_data *data = dev_get_drvdata(dev); + u8 val = nokia_7215_ixs_a1_cpld_read(data, TEMP_EVENT_MASK_REG); + return sprintf(buf,"0x%02x\n",val); +} + +static ssize_t set_temp_event_mask_status(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + struct cpld_data *data = dev_get_drvdata(dev); + u8 usr_val=0; + int ret=kstrtou8(buf,16, &usr_val); + if (ret != 0) { + return ret; + } + + nokia_7215_ixs_a1_cpld_write(data, TEMP_EVENT_MASK_REG, usr_val); + return count; +} + +static ssize_t show_reset_reg(struct device *dev, struct device_attribute *devattr, char *buf) +{ + struct cpld_data *data = dev_get_drvdata(dev); + struct sensor_device_attribute *sda = to_sensor_dev_attr(devattr); + u8 val=0; + val = nokia_7215_ixs_a1_cpld_read(data, RESET_REG); + + return sprintf(buf,"0x%02x\n",(val>>sda->index) & 0x1 ? 1:0); +} + +static ssize_t set_reset_reg(struct device *dev, struct device_attribute *devattr, const char *buf, size_t count) +{ + struct cpld_data *data = dev_get_drvdata(dev); + struct sensor_device_attribute *sda = to_sensor_dev_attr(devattr); + u8 reg_val=0, usr_val=0, mask; + int ret=kstrtou8(buf,10, &usr_val); + if (ret != 0) { + return ret; + } + if (usr_val > 1) { + return -EINVAL; + } + + mask = (~(1 << sda->index)) & 0xFF; + reg_val = nokia_7215_ixs_a1_cpld_read(data, RESET_REG); + reg_val = reg_val & mask; + + usr_val = usr_val << sda->index; + + nokia_7215_ixs_a1_cpld_write(data, RESET_REG, (reg_val|usr_val)); + + return count; +} + + +/* sysfs attributes */ +static SENSOR_DEVICE_ATTR(mbhwversion, S_IRUGO, show_mainboard_hwversion, NULL, 0); +static SENSOR_DEVICE_ATTR(last_reset_cause, S_IRUGO, show_last_reset_cause, NULL, 0); +static SENSOR_DEVICE_ATTR(cpldversion, S_IRUGO, show_cpld_version, NULL, 0); +static SENSOR_DEVICE_ATTR(sfp1_present, S_IRUGO, show_sfp_present, NULL, SFP_PRESENCE_REG_SFP1); +static SENSOR_DEVICE_ATTR(sfp2_present, S_IRUGO, show_sfp_present, NULL, SFP_PRESENCE_REG_SFP2); +static SENSOR_DEVICE_ATTR(sfp1_los, S_IRUGO, show_sfp_los, NULL, SFP_LOS_REG_SFP1); +static SENSOR_DEVICE_ATTR(sfp2_los, S_IRUGO, show_sfp_los, NULL, SFP_LOS_REG_SFP2); +static SENSOR_DEVICE_ATTR(sfp1_tx_disable, S_IRUGO | S_IWUSR, show_sfp_tx_disable, set_sfp_tx_disable, SFP_LOS_REG_SFP1); +static SENSOR_DEVICE_ATTR(sfp2_tx_disable, S_IRUGO | S_IWUSR, show_sfp_tx_disable, set_sfp_tx_disable, SFP_LOS_REG_SFP2); +static SENSOR_DEVICE_ATTR(system_led, S_IRUGO | S_IWUSR, show_system_led_status, set_system_led_status, 0); +static SENSOR_DEVICE_ATTR(psu_led, S_IRUGO | S_IWUSR, show_power_fan_led_status, set_power_fan_led_status, POWER_LED_OFFSET); +static SENSOR_DEVICE_ATTR(fan_led, S_IRUGO | S_IWUSR, show_power_fan_led_status, set_power_fan_led_status, FAN_LED_OFFSET); +static SENSOR_DEVICE_ATTR(sfp1_tx_fault, S_IRUGO, show_sfp_tx_fault, NULL, SFP_TX_FAULT_STATUS_SFP1); +static SENSOR_DEVICE_ATTR(sfp2_tx_fault, S_IRUGO, show_sfp_tx_fault, NULL, SFP_TX_FAULT_STATUS_SFP2); +static SENSOR_DEVICE_ATTR(temp_event_status, S_IRUGO, show_temp_event_status, NULL, 0); +static SENSOR_DEVICE_ATTR(sfp_led_test, S_IRUGO | S_IWUSR, show_sfp_ledtest_status, set_sfp_ledtest_status, 0); +static SENSOR_DEVICE_ATTR(temp_event_mask, S_IRUGO | S_IWUSR, show_temp_event_mask_status, set_temp_event_mask_status, 0); +static SENSOR_DEVICE_ATTR(warm_reset, S_IRUGO | S_IWUSR, show_reset_reg, set_reset_reg, RESET_REG_WARM_RESET); +static SENSOR_DEVICE_ATTR(cold_reset, S_IRUGO | S_IWUSR, show_reset_reg, set_reset_reg, RESET_REG_COLD_RESET); +static SENSOR_DEVICE_ATTR(i2cmux_reset, S_IRUGO | S_IWUSR, show_reset_reg, set_reset_reg, RESET_REG_I2CMUX_RESET); +static SENSOR_DEVICE_ATTR(zarlink_reset, S_IRUGO | S_IWUSR, show_reset_reg, set_reset_reg, RESET_REG_ZL_RESET); + +static struct attribute *nokia_7215_ixs_a1_cpld_attributes[] = { + &sensor_dev_attr_mbhwversion.dev_attr.attr, + &sensor_dev_attr_last_reset_cause.dev_attr.attr, + &sensor_dev_attr_cpldversion.dev_attr.attr, + &sensor_dev_attr_sfp1_present.dev_attr.attr, + &sensor_dev_attr_sfp2_present.dev_attr.attr, + &sensor_dev_attr_sfp1_los.dev_attr.attr, + &sensor_dev_attr_sfp2_los.dev_attr.attr, + &sensor_dev_attr_sfp1_tx_disable.dev_attr.attr, + &sensor_dev_attr_sfp2_tx_disable.dev_attr.attr, + &sensor_dev_attr_temp_event_status.dev_attr.attr, + &sensor_dev_attr_system_led.dev_attr.attr, + &sensor_dev_attr_psu_led.dev_attr.attr, + &sensor_dev_attr_fan_led.dev_attr.attr, + &sensor_dev_attr_sfp1_tx_fault.dev_attr.attr, + &sensor_dev_attr_sfp2_tx_fault.dev_attr.attr, + &sensor_dev_attr_sfp_led_test.dev_attr.attr, + &sensor_dev_attr_temp_event_mask.dev_attr.attr, + &sensor_dev_attr_warm_reset.dev_attr.attr, + &sensor_dev_attr_cold_reset.dev_attr.attr, + &sensor_dev_attr_i2cmux_reset.dev_attr.attr, + &sensor_dev_attr_zarlink_reset.dev_attr.attr, + NULL +}; + +static const struct attribute_group nokia_7215_ixs_a1_cpld_group = { + .attrs = nokia_7215_ixs_a1_cpld_attributes, +}; + + +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(6,12,0)) +static int nokia_7215_ixs_a1_cpld_probe(struct i2c_client *client) +#else +static int nokia_7215_ixs_a1_cpld_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +#endif +{ + int status; + struct cpld_data *data=NULL; + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA)) { + dev_err(&client->dev, "CPLD PROBE ERROR: i2c_check_functionality failed (0x%x)\n", client->addr); + status = -EIO; + goto exit; + } + + dev_info(&client->dev, "Nokia-7215-IXS-A1 CPLD chip found.\n"); + data = kzalloc(sizeof(struct cpld_data), GFP_KERNEL); + + if (!data) { + dev_err(&client->dev, "CPLD PROBE ERROR: Can't allocate memory\n"); + status = -ENOMEM; + goto exit; + } + + data->client = client; + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + + status = sysfs_create_group(&client->dev.kobj, &nokia_7215_ixs_a1_cpld_group); + if (status) { + dev_err(&client->dev, "CPLD INIT ERROR: Cannot create sysfs\n"); + goto exit; + } + + data->mb_hw_version = nokia_7215_ixs_a1_cpld_read(data, BOARD_ID_REG); + data->cpld_version = nokia_7215_ixs_a1_cpld_read(data, CPLD_VERSION_REG); + + //expose GPIOs to sysfs + cpld_gpio_init(data); + return 0; + +exit: + return status; +} + +static void nokia_7215_ixs_a1_cpld_remove(struct i2c_client *client) +{ + struct cpld_data *data = i2c_get_clientdata(client); + sysfs_remove_group(&client->dev.kobj, &nokia_7215_ixs_a1_cpld_group); + kfree(data); + return; +} + +static const struct of_device_id nokia_7215_ixs_a1_cpld_of_ids[] = { + { + .compatible = "nokia,7215_a1_cpld", + .data = (void *) 0, + }, + { }, +}; +MODULE_DEVICE_TABLE(of, nokia_7215_ixs_a1_cpld_of_ids); + +static const struct i2c_device_id nokia_7215_ixs_a1_cpld_ids[] = { + { DRIVER_NAME, 0 }, + {} +}; +MODULE_DEVICE_TABLE(i2c, nokia_7215_ixs_a1_cpld_ids); + +static struct i2c_driver nokia_7215_ixs_a1_cpld_driver = { + .driver = { + .name = DRIVER_NAME, + .of_match_table = of_match_ptr(nokia_7215_ixs_a1_cpld_of_ids), + }, + .probe = nokia_7215_ixs_a1_cpld_probe, + .remove = nokia_7215_ixs_a1_cpld_remove, + .id_table = nokia_7215_ixs_a1_cpld_ids, + .address_list = cpld_address_list, +}; + + + +static int __init nokia_7215_ixs_a1_cpld_init(void) +{ + return i2c_add_driver(&nokia_7215_ixs_a1_cpld_driver); +} + +static void __exit nokia_7215_ixs_a1_cpld_exit(void) +{ + i2c_del_driver(&nokia_7215_ixs_a1_cpld_driver); +} + +MODULE_AUTHOR("Nokia"); +MODULE_DESCRIPTION("NOKIA-7215-IXS-A1 CPLD driver"); +MODULE_LICENSE("GPL"); + +module_init(nokia_7215_ixs_a1_cpld_init); +module_exit(nokia_7215_ixs_a1_cpld_exit); diff --git a/platform/nokia-vs/sonic-platform-nokia/7215-c1/scripts/cpu_wdt.py b/platform/nokia-vs/sonic-platform-nokia/7215-c1/scripts/cpu_wdt.py new file mode 100755 index 00000000000..b23cd46566e --- /dev/null +++ b/platform/nokia-vs/sonic-platform-nokia/7215-c1/scripts/cpu_wdt.py @@ -0,0 +1,46 @@ +#!/usr/bin/python + +from sonic_platform.chassis import Chassis +from sonic_py_common import logger +import time +import os +import signal +import sys + + +TIMEOUT=180 +KEEPALIVE=60 +sonic_logger = logger.Logger('Watchdog') +sonic_logger.set_min_log_priority_info() +time.sleep(60) +chassis = Chassis() +watchdog = chassis.get_watchdog() + +def stopWdtService(signal, frame): + watchdog._disablewatchdog() + sonic_logger.log_notice("CPUWDT Disabled: watchdog armed=%s" % watchdog.is_armed() ) + sys.exit() + +def main(): + + signal.signal(signal.SIGHUP, signal.SIG_IGN) + signal.signal(signal.SIGINT, stopWdtService) + signal.signal(signal.SIGTERM, stopWdtService) + + watchdog.arm(TIMEOUT) + sonic_logger.log_notice("CPUWDT Enabled: watchdog armed=%s" % watchdog.is_armed() ) + + + while True: + time.sleep(KEEPALIVE) + watchdog._keepalive() + sonic_logger.log_info("CPUWDT keepalive") + done + + stopWdtService + + return + + +if __name__ == '__main__': + main() diff --git a/platform/nokia-vs/sonic-platform-nokia/7215-c1/scripts/intf_sync.py b/platform/nokia-vs/sonic-platform-nokia/7215-c1/scripts/intf_sync.py new file mode 100755 index 00000000000..3aff6b48b78 --- /dev/null +++ b/platform/nokia-vs/sonic-platform-nokia/7215-c1/scripts/intf_sync.py @@ -0,0 +1,288 @@ +#!/usr/bin/python3 +# +# Nokia 7215 interface rename monitor. +# +# Assumption: this daemon starts before syncd renames the front-panel +# interfaces, so it observes them while they are still named eth1/eth2. +# That initial baseline is what lets the eth1->Ethernet0 and +# eth2->Ethernet1 rename events later be recognized as a trigger to +# restart neighsyncd. If this script ever starts after the rename has +# already happened, it will see only Ethernet0/Ethernet1 from the start +# and will not fire a restart on its own. This daemon does not depend on neighsyncd. + +import os +import re +import select +import signal +import subprocess +import time + +try: + from sonic_py_common import logger +except ImportError: + logger = None + + +WATCHED_RENAMES = { + "eth1": "Ethernet0", + "eth2": "Ethernet1", +} +EXPECTED_INTERFACES = set(WATCHED_RENAMES.values()) +SYS_CLASS_NET = "/sys/class/net" +RESTART_LOG_FILE = "/var/log/intf_sync.log" +RESTART_LOG_MAX_LINES = 100 +QUIET_PERIOD_SEC = 2 +CONVERGENCE_TIMEOUT_SEC = 30 +IP_MONITOR_RESTART_DELAY_SEC = 2 +NEIGHSYNCD_RESTART_RETRIES = 10 +NEIGHSYNCD_RESTART_RETRY_DELAY_SEC = 1 + + +class ServiceLogger: + def __init__(self): + if logger: + self.logger = logger.Logger("IntfSync") + self.logger.set_min_log_priority_info() + else: + self.logger = None + + def notice(self, msg): + if self.logger: + self.logger.log_notice(msg) + else: + print(msg, flush=True) + + def info(self, msg): + if self.logger: + self.logger.log_info(msg) + else: + print(msg, flush=True) + + def warning(self, msg): + if self.logger: + self.logger.log_warning(msg) + else: + print("WARNING: %s" % msg, flush=True) + + def error(self, msg): + if self.logger: + self.logger.log_error(msg) + else: + print("ERROR: %s" % msg, flush=True) + + +log = ServiceLogger() +stop_requested = False + + +def handle_signal(signum, frame): + global stop_requested + stop_requested = True + + +def read_link_snapshot(): + links = {} + + try: + names = os.listdir(SYS_CLASS_NET) + except OSError as err: + write_restart_log("failed to list %s: %s" % (SYS_CLASS_NET, err)) + return links + + for name in names: + if name not in WATCHED_RENAMES and name not in EXPECTED_INTERFACES: + continue + + ifindex_path = os.path.join(SYS_CLASS_NET, name, "ifindex") + try: + with open(ifindex_path) as fp: + ifindex = int(fp.read().strip()) + except (OSError, ValueError) as err: + write_restart_log("failed to read %s: %s" % (ifindex_path, err)) + continue + + links[ifindex] = name + + return links + + +def parse_ip_monitor_line(line): + # Example: "3: Ethernet0: mtu 1500 ..." + # Example: "Deleted 3: Ethernet0: ..." + match = re.match(r"^\s*(?:Deleted\s+)?(?P\d+):\s+(?P[^:@\s]+)", line) + if not match: + return None, None + + return int(match.group("ifindex")), match.group("name") + + +def expected_interfaces_ready(): + names = set() + + try: + names = set(os.listdir(SYS_CLASS_NET)) + except OSError as err: + write_restart_log("failed to list %s: %s" % (SYS_CLASS_NET, err)) + return False + + return EXPECTED_INTERFACES.issubset(names) + + +def wait_for_expected_interfaces(): + deadline = time.time() + CONVERGENCE_TIMEOUT_SEC + + while time.time() < deadline and not stop_requested: + if expected_interfaces_ready(): + return True + time.sleep(1) + + return expected_interfaces_ready() + + +def docker_cmd(): + if os.path.exists("/usr/bin/docker"): + return "/usr/bin/docker" + return "docker" + + +def write_restart_log(msg): + timestamp = time.strftime("%Y-%m-%d %H:%M:%S %z", time.localtime()) + try: + with open(RESTART_LOG_FILE, "a") as fp: + fp.write("%s %s\n" % (timestamp, msg)) + except OSError as err: + log.warning("failed to write %s: %s" % (RESTART_LOG_FILE, err)) + return + + try: + with open(RESTART_LOG_FILE, "r") as fp: + lines = fp.readlines() + if len(lines) > RESTART_LOG_MAX_LINES: + lines = lines[-RESTART_LOG_MAX_LINES:] + tmp_path = RESTART_LOG_FILE + ".tmp" + with open(tmp_path, "w") as fp: + fp.writelines(lines) + os.replace(tmp_path, RESTART_LOG_FILE) + except OSError as err: + log.warning("failed to rotate %s: %s" % (RESTART_LOG_FILE, err)) + + +def restart_neighsyncd(): + if not wait_for_expected_interfaces(): + write_restart_log("Ethernet0/Ethernet1 did not converge; skip neighsyncd restart") + return False + + cmd = [docker_cmd(), "exec", "swss", "supervisorctl", "restart", "neighsyncd"] + + for attempt in range(1, NEIGHSYNCD_RESTART_RETRIES + 1): + try: + rc = subprocess.call( + cmd, + stdout=subprocess.DEVNULL, + stderr=subprocess.DEVNULL, + ) + except OSError as err: + rc = None + write_restart_log( + "neighsyncd restart attempt %d/%d failed to execute: %s" + % (attempt, NEIGHSYNCD_RESTART_RETRIES, err) + ) + + if rc == 0: + write_restart_log( + "neighsyncd restart succeeded after front-panel interface rename " + "on attempt %d/%d" % (attempt, NEIGHSYNCD_RESTART_RETRIES) + ) + return True + + if rc is not None: + write_restart_log( + "neighsyncd restart attempt %d/%d failed, rc=%d" + % (attempt, NEIGHSYNCD_RESTART_RETRIES, rc) + ) + + if attempt < NEIGHSYNCD_RESTART_RETRIES and not stop_requested: + time.sleep(NEIGHSYNCD_RESTART_RETRY_DELAY_SEC) + + write_restart_log("neighsyncd restart failed after %d attempts" % NEIGHSYNCD_RESTART_RETRIES) + return False + + +def start_ip_monitor(): + return subprocess.Popen( + ["ip", "-o", "monitor", "link"], + stdout=subprocess.PIPE, + stderr=subprocess.STDOUT, + universal_newlines=True, + bufsize=1, + ) + + +def monitor_loop(): + ifindex_to_name = read_link_snapshot() + pending_restart_at = None + + while not stop_requested: + proc = start_ip_monitor() + write_restart_log("started ip monitor link") + + while not stop_requested: + if proc.poll() is not None: + write_restart_log("ip monitor exited, rc=%s" % proc.returncode) + break + + # Dual-purpose: wake on ip monitor output, or tick once per second + # so pending_restart_at, stop_requested, and proc.poll() are checked. + ready, _, _ = select.select([proc.stdout], [], [], 1) + if ready: + line = proc.stdout.readline() + if not line: + continue + + ifindex, new_name = parse_ip_monitor_line(line) + if ifindex is None: + continue + + old_name = ifindex_to_name.get(ifindex) + ifindex_to_name[ifindex] = new_name + + expected_new_name = WATCHED_RENAMES.get(old_name) + if expected_new_name == new_name: + write_restart_log( + "detected interface rename ifindex=%d %s -> %s; " + "scheduling neighsyncd restart" + % (ifindex, old_name, new_name) + ) + # Debounce so eth1->Ethernet0 and eth2->Ethernet1 arriving + # back-to-back collapse into a single neighsyncd restart. + pending_restart_at = time.time() + QUIET_PERIOD_SEC + + if pending_restart_at and time.time() >= pending_restart_at: + pending_restart_at = None + restart_neighsyncd() + + try: + proc.terminate() + proc.wait(timeout=IP_MONITOR_RESTART_DELAY_SEC) + except Exception: + try: + proc.kill() + except Exception: + pass + + if not stop_requested: + time.sleep(IP_MONITOR_RESTART_DELAY_SEC) + + +def main(): + signal.signal(signal.SIGHUP, signal.SIG_IGN) + signal.signal(signal.SIGINT, handle_signal) + signal.signal(signal.SIGTERM, handle_signal) + + write_restart_log("intf sync started") + monitor_loop() + write_restart_log("intf sync stopped") + + +if __name__ == "__main__": + main() diff --git a/platform/nokia-vs/sonic-platform-nokia/7215-c1/scripts/nokia-7215-init.sh b/platform/nokia-vs/sonic-platform-nokia/7215-c1/scripts/nokia-7215-init.sh new file mode 100644 index 00000000000..52f8e1cf4ba --- /dev/null +++ b/platform/nokia-vs/sonic-platform-nokia/7215-c1/scripts/nokia-7215-init.sh @@ -0,0 +1,405 @@ +#!/bin/bash + +c1_log() { echo "[rotate-usb] $*"; } +c1_err() { echo "[rotate-usb:ERROR] $*" >&2; } +c1_die() { c1_err "$1"; return 1; } # don't exit the whole script +c1_is_root() { [[ $EUID -eq 0 ]]; } + +c1_iface_exists() { [[ -e "/sys/class/net/$1" ]]; } + +# If name matches eth, echo numeric suffix; else return non-zero +c1_eth_suffix() { + local ifc="$1" + if [[ "$ifc" =~ ^eth([0-9]+)$ ]]; then + echo "${BASH_REMATCH[1]}" + return 0 + fi + return 1 +} + +# Detect if an interface is on USB (prefer sysfs; fallback to ethtool -i) +c1_is_usb_iface() { + local ifc="$1" + # sysfs path check + if [[ -L "/sys/class/net/$ifc/device" ]]; then + local p + p="$(readlink -f "/sys/class/net/$ifc/device" 2>/dev/null || true)" + [[ "$p" == *"/usb"* ]] && return 0 + fi + # ethtool heuristic + if command -v ethtool >/dev/null 2>&1; then + local info + info="$(ethtool -i "$ifc" 2>/dev/null || true)" + grep -qiE 'bus-info:.*usb|driver:.*(r8152|asix|ax88179_178a|cdc_ether|cdc_ncm|aqc111|usbnet)' <<<"$info" \ + && return 0 + fi + return 1 +} + +# Find the first eth* that looks like a USB NIC +c1_find_usb_eth() { + local ifc + for ifc in /sys/class/net/eth*; do + [[ -e "$ifc" ]] || continue + ifc="${ifc##*/}" + c1_is_usb_iface "$ifc" && { echo "$ifc"; return 0; } + done + return 1 +} + +# unique temp name for collision-free renames +c1_pick_temp_name() { + local base="__c1_tmp" + local i=0 + while c1_iface_exists "${base}${i}"; do ((i++)); done + echo "${base}${i}" +} + +# admin-UP check via ip (not operstate) +c1_link_is_up() { + ip -o link show dev "$1" 2>/dev/null | grep -q ' state UP ' +} + +c1_run() { + eval "$@" +} + +# ----- public function you will call ----- +rotate_usb_to_eth0() { + + # preflight + c1_is_root || { c1_err "Run as root."; return 1; } + command -v ip >/dev/null 2>&1 || { c1_err "'ip' command not found."; return 1; } + + # collect eth* interfaces sorted by numeric order + local -a ETHS=() + mapfile -t ETHS < <(ls -1 /sys/class/net 2>/dev/null | grep -E '^eth[0-9]+$' | sort -V) + if ((${#ETHS[@]} == 0)); then + c1_log "No eth* interfaces found. Nothing to do." + return 2 + fi + + # identify USB NIC (optional) + local USB_IF="" + if ! USB_IF="$(c1_find_usb_eth)"; then + c1_log "No USB NIC detected among eth*; will reserve eth0 by shifting others +1 if needed." + else + c1_log "Detected USB NIC: $USB_IF" + fi + + # Determine if eth0 exists currently + local has_eth0=0 + local ifc + for ifc in "${ETHS[@]}"; do + [[ "$ifc" == "eth0" ]] && { has_eth0=1; break; } + done + + # Build desired mapping: + # - If USB found: USB -> eth0; others -> eth(N+1) + # - If no USB: + # - If eth0 exists: shift EVERY ethN -> eth(N+1) to free eth0 + # - If eth0 absent: nothing to change (already reserved) + declare -A DESIRED=() + + if [[ -n "$USB_IF" ]]; then + # USB present: USB -> eth0; others -> +1 + for ifc in "${ETHS[@]}"; do + if [[ "$ifc" == "$USB_IF" ]]; then + DESIRED["$ifc"]="eth0" + else + if suffix=$(c1_eth_suffix "$ifc"); then + DESIRED["$ifc"]="eth$((suffix + 1))" + fi + fi + done + else + # USB absent: only shift if eth0 currently exists + if (( has_eth0 )); then + for ifc in "${ETHS[@]}"; do + if suffix=$(c1_eth_suffix "$ifc"); then + DESIRED["$ifc"]="eth$((suffix + 1))" + fi + done + else + c1_log "eth0 is already free; nothing to do." + return 0 + fi + fi + + # If already in desired state, exit + local need_change=0 + for ifc in "${!DESIRED[@]}"; do + [[ "$ifc" != "${DESIRED[$ifc]}" ]] && { need_change=1; break; } + done + (( need_change == 0 )) && { c1_log "Names already in desired state."; return 0; } + + # Plan + c1_log "Planned rotation:" + for ifc in "${ETHS[@]}"; do + [[ -n "${DESIRED[$ifc]:-}" ]] || continue + printf "[rotate-usb] %s -> %s\n" "$ifc" "${DESIRED[$ifc]}" + done + + # Stage 1: move to temps (record admin state) + declare -A TMP=() STATE=() + for ifc in "${ETHS[@]}"; do + [[ -n "${DESIRED[$ifc]:-}" ]] || continue + if c1_link_is_up "$ifc"; then + STATE["$ifc"]="up" + c1_run ip link set dev "$ifc" down + else + STATE["$ifc"]="down" + fi + local tmp; tmp="$(c1_pick_temp_name)" + TMP["$ifc"]="$tmp" + c1_run ip link set dev "$ifc" name "$tmp" + done + + # Stage 2: temps -> final + local final tmp + for ifc in "${ETHS[@]}"; do + [[ -n "${DESIRED[$ifc]:-}" ]] || continue + tmp="${TMP[$ifc]}" + final="${DESIRED[$ifc]}" + c1_run ip link set dev "$tmp" name "$final" + done + + # Stage 3: restore admin state + for ifc in "${ETHS[@]}"; do + [[ -n "${DESIRED[$ifc]:-}" ]] || continue + final="${DESIRED[$ifc]}" + if [[ "${STATE[$ifc]}" == "up" ]]; then + c1_run ip link set dev "$final" up + fi + done + + c1_log "Rotation complete." + return 0 +} + +# Platform init script +# Check if init is already done previously + +KVER=6.12.41+deb13-sonic-arm64 + +# Load required kernel-mode drivers +load_kernel_drivers() { + echo "Loading Kernel Drivers" + lsmod |grep nokia_7215_ixs_c1_cpld > /dev/null + if [ "$?" != "0" ]; then + sudo insmod /lib/modules/${KVER}/kernel/extra/nokia_7215_ixs_c1_cpld.ko + fi + sudo insmod /lib/modules/${KVER}/kernel/extra/cn9130_cpu_thermal_sensor.ko + sudo insmod /lib/modules/${KVER}/kernel/extra/mule.ko + sudo insmod /lib/modules/${KVER}/kernel/extra/cn9130_led.ko +} + +fw_uboot_env_cfg() +{ + echo "Setting up U-Boot environment for Nokia-7215-C1" + FW_ENV_DEFAULT='/dev/mtd1 0x0 0x10000 0x10000' + echo $FW_ENV_DEFAULT > /etc/fw_env.config +} + +nokia_7215_profile() +{ + MAC_ADDR=$(sudo decode-syseeprom -m) + sed -i "s/switchMacAddress=.*/switchMacAddress=$MAC_ADDR/g" /usr/share/sonic/device/arm64-nokia_ixs7215_c1xa-r0/Nokia-7215-C1/profile.ini + echo "Nokia-7215-C1: Updating switch mac address ${MAC_ADDR}" +} + +get_hwsku() { + local hwsku="" + local src="" + if [ -f /etc/sonic/config_db.json ]; then + echo "[get_hwsku] trying source 1: /etc/sonic/config_db.json (sonic-cfggen -j)" >&2 + hwsku=$(sonic-cfggen -j /etc/sonic/config_db.json -v "DEVICE_METADATA['localhost']['hwsku']" 2>/dev/null) + if [ -n "$hwsku" ]; then + src="config_db.json" + fi + else + echo "[get_hwsku] /etc/sonic/config_db.json not present, skipping source 1" >&2 + fi + if [ -z "$hwsku" ] && [ -f /etc/sonic/minigraph.xml ]; then + echo "[get_hwsku] source 1 empty; trying source 2: /etc/sonic/minigraph.xml (sed)" >&2 + hwsku=$(sed -n 's:.*\([^<]*\).*:\1:p' /etc/sonic/minigraph.xml 2>/dev/null | head -n1) + if [ -n "$hwsku" ]; then + src="minigraph.xml" + fi + elif [ -z "$hwsku" ]; then + echo "[get_hwsku] source 1 empty; /etc/sonic/minigraph.xml not present, skipping source 2" >&2 + fi + + if [ -z "$hwsku" ] && [ -f /etc/sonic/old_config/config_db.json ]; then + echo "[get_hwsku] sources 1/2 empty; trying source 3a: /etc/sonic/old_config/config_db.json (sonic-cfggen -j)" >&2 + hwsku=$(sonic-cfggen -j /etc/sonic/old_config/config_db.json -v "DEVICE_METADATA['localhost']['hwsku']" 2>/dev/null) + if [ -n "$hwsku" ]; then + src="old_config/config_db.json" + fi + elif [ -z "$hwsku" ]; then + echo "[get_hwsku] sources 1/2 empty; /etc/sonic/old_config/config_db.json not present, skipping source 3a" >&2 + fi + if [ -z "$hwsku" ] && [ -f /etc/sonic/old_config/minigraph.xml ]; then + echo "[get_hwsku] source 3a empty; trying source 3b: /etc/sonic/old_config/minigraph.xml (sed)" >&2 + hwsku=$(sed -n 's:.*\([^<]*\).*:\1:p' /etc/sonic/old_config/minigraph.xml 2>/dev/null | head -n1) + if [ -n "$hwsku" ]; then + src="old_config/minigraph.xml" + fi + elif [ -z "$hwsku" ]; then + echo "[get_hwsku] source 3a empty; /etc/sonic/old_config/minigraph.xml not present, skipping source 3b" >&2 + fi + + if [ -z "$hwsku" ] && [ -f /host/old_config/config_db.json ]; then + echo "[get_hwsku] sources 1-3 empty; trying source 4a: /host/old_config/config_db.json (sonic-cfggen -j)" >&2 + hwsku=$(sonic-cfggen -j /host/old_config/config_db.json -v "DEVICE_METADATA['localhost']['hwsku']" 2>/dev/null) + if [ -n "$hwsku" ]; then + src="/host/old_config/config_db.json" + fi + elif [ -z "$hwsku" ]; then + echo "[get_hwsku] sources 1-3 empty; /host/old_config/config_db.json not present, skipping source 4a" >&2 + fi + if [ -z "$hwsku" ] && [ -f /host/old_config/minigraph.xml ]; then + echo "[get_hwsku] source 4a empty; trying source 4b: /host/old_config/minigraph.xml (sed)" >&2 + hwsku=$(sed -n 's:.*\([^<]*\).*:\1:p' /host/old_config/minigraph.xml 2>/dev/null | head -n1) + if [ -n "$hwsku" ]; then + src="/host/old_config/minigraph.xml" + fi + elif [ -z "$hwsku" ]; then + echo "[get_hwsku] source 4a empty; /host/old_config/minigraph.xml not present, skipping source 4b" >&2 + fi + if [ -z "$hwsku" ]; then + local platform + platform=$(sonic-cfggen -H -v DEVICE_METADATA.localhost.platform) + echo "[get_hwsku] trying source 5: default_sku for platform='${platform:-}'" >&2 + if [ -n "$platform" ] && [ -f "/usr/share/sonic/device/$platform/default_sku" ]; then + hwsku=$(awk 'NR==1{print $1}' "/usr/share/sonic/device/$platform/default_sku") + if [ -n "$hwsku" ]; then + src="default_sku(/usr/share/sonic/device/$platform/default_sku)" + fi + else + echo "[get_hwsku] default_sku file not found for platform='${platform:-}'" >&2 + fi + fi + if [ -n "$hwsku" ]; then + echo "[get_hwsku] resolved HWSKU='$hwsku' from $src" >&2 + else + echo "[get_hwsku] FAILED to resolve HWSKU from any source" >&2 + fi + echo "$hwsku" +} + +file_exists() { + # Wait 10 seconds max till file exists + for((i=0; i<10; i++)); + do + if [ -f $1 ]; then + return 1 + fi + sleep 1 + done + return 0 + } + +# - Main entry + +lsmod |grep cn9130_cpu_thermal_sensor > /dev/null +if [ "$?" = "0" ]; then + exit 0 +fi + +# Install kernel drivers required for i2c bus access +load_kernel_drivers + +# Disable sysrq-trigger +echo 0 > /proc/sys/kernel/sysrq + +#setting up uboot environment +fw_uboot_env_cfg + +# Enumerate power monitor +echo ina230 0x40 > /sys/bus/i2c/devices/i2c-0/new_device + +# Enumerate fan +echo emc2305 0x2f > /sys/bus/i2c/devices/i2c-0/new_device + +# Enumerate Thermals +echo tmp75 0x48 > /sys/bus/i2c/devices/i2c-0/new_device +echo tmp75 0x49 > /sys/bus/i2c/devices/i2c-0/new_device +echo tmp75 0x4A > /sys/bus/i2c/devices/i2c-0/new_device + +# Enumerate system eeprom +echo 24c64 0x53 > /sys/bus/i2c/devices/i2c-0/new_device + +file_exists /sys/bus/i2c/devices/i2c-0/0-0053/eeprom +status=$? +if [ "$status" == "1" ]; then + chmod 644 /sys/bus/i2c/devices/i2c-0/0-0053/eeprom +else + echo "SYSEEPROM file not foud" +fi + +#Enumurate GPIO +echo 41 > /sys/class/gpio/export +echo 61 > /sys/class/gpio/export +echo 62 > /sys/class/gpio/export +chmod 666 /sys/class/gpio/gpio41/value + +# Get list of the mux channels +for((i=0; i<10; i++)); + do + ismux_bus=$(i2cdetect -l|grep mux|cut -f1) + if [[ $ismux_bus ]]; then + break; + fi + sleep 1 + done + +# Enumerate the SFP eeprom device on each mux channel +for mux in ${ismux_bus} +do + echo optoe2 0x50 > /sys/bus/i2c/devices/${mux}/new_device +done + +# Enable optical SFP Tx +for i in {1..2} +do + echo 0 > /sys/bus/i2c/devices/0-0041/sfp${i}_tx_disable +done + +#slow down fan speed to 50% untill thermal algorithm kicks in +i2c_path="/sys/bus/i2c/devices/0-002f/hwmon/hwmon?" +echo 128 > $i2c_path/pwm1 +echo 128 > $i2c_path/pwm2 + +# Ensure switch is programmed with base MAC addr +nokia_7215_profile + +echo "drivers loaded" + +echo "[nokia-7215-init] resolving HWSKU..." +HWSKU=$(get_hwsku) +echo "[nokia-7215-init] Detected HWSKU='${HWSKU:-}'" + +if [ "$HWSKU" = "Nokia-7215-C1-mp" ]; then + echo "[nokia-7215-init] HWSKU='$HWSKU'" + SWAP_SRC=eth0 + ETH_LAST=2 +else + echo "[nokia-7215-init] HWSKU='${HWSKU:-}'" + rotate_usb_to_eth0 + SWAP_SRC=eth1 + ETH_LAST=3 +fi + +ip link set "$SWAP_SRC" name tmpeth1 +ip link set eth2 name tmpeth2 +ip link set tmpeth1 name eth2 +ip link set tmpeth2 name "$SWAP_SRC" + +for i in $(seq 1 "$ETH_LAST"); do + ip link set eth$i down + ethtool -K eth$i rxhash on + ethtool -X eth$i weight 1 1 0 1 +done + +exit 0 diff --git a/platform/nokia-vs/sonic-platform-nokia/7215-c1/scripts/nokia-7215-postinit.sh b/platform/nokia-vs/sonic-platform-nokia/7215-c1/scripts/nokia-7215-postinit.sh new file mode 100755 index 00000000000..23d2a9e5d92 --- /dev/null +++ b/platform/nokia-vs/sonic-platform-nokia/7215-c1/scripts/nokia-7215-postinit.sh @@ -0,0 +1,60 @@ +#!/bin/bash +# +# Nokia 7215 post-init platform script. +# +# - Creates /dev/ttyCR -> /dev/ttyCO symlinks so console clients +# can address ports by their physical 1-based numbering. + +set -u + +POSTINIT_STAMP="/run/nokia-7215-postinit.done" +RENAME_MONITOR="/usr/local/bin/intf_sync.py" + +run_one_time_setup() +{ + # - ttyCR symlinks for ttyCO0..ttyCO47 + + echo "[nokia-7215-postinit] waiting for /dev/ttyCO0" + + tty_timeout=10 + i=0 + while [ $i -lt $tty_timeout ]; do + if [ -e /dev/ttyCO0 ]; then + break + fi + sleep 1 + i=$((i + 1)) + done + + if [ ! -e /dev/ttyCO0 ]; then + echo "[nokia-7215-postinit] timeout (${tty_timeout}s) waiting for /dev/ttyCO0; skipping ttyCR symlinks" + return + fi + + echo "[nokia-7215-postinit] creating /dev/ttyCR1..48 -> /dev/ttyCO0..47 symlinks" + for n in $(seq 0 47); do + src="/dev/ttyCO${n}" + dst="/dev/ttyCR$((n + 1))" + if [ -e "$src" ]; then + chmod 666 "$src" + ln -sf "$src" "$dst" + fi + done +} + +if [ ! -e "$POSTINIT_STAMP" ]; then + run_one_time_setup + if ! touch "$POSTINIT_STAMP"; then + echo "[nokia-7215-postinit] failed to create $POSTINIT_STAMP" + fi +else + echo "[nokia-7215-postinit] one-time setup already completed; skipping" +fi + +if [ ! -x "$RENAME_MONITOR" ]; then + echo "[nokia-7215-postinit] $RENAME_MONITOR is not executable" + exit 1 +fi + +echo "[nokia-7215-postinit] starting intf sync" +exec "$RENAME_MONITOR" diff --git a/platform/nokia-vs/sonic-platform-nokia/7215-c1/service/cpu_wdt.service b/platform/nokia-vs/sonic-platform-nokia/7215-c1/service/cpu_wdt.service new file mode 100644 index 00000000000..993070a14a2 --- /dev/null +++ b/platform/nokia-vs/sonic-platform-nokia/7215-c1/service/cpu_wdt.service @@ -0,0 +1,9 @@ +[Unit] +Description=CPU WDT +Conflicts=watchdog-control.service +After=nokia-7215init.service +[Service] +ExecStart=/usr/local/bin/cpu_wdt.py + +[Install] +WantedBy=multi-user.target diff --git a/platform/nokia-vs/sonic-platform-nokia/7215-c1/service/nokia-7215-postinit.service b/platform/nokia-vs/sonic-platform-nokia/7215-c1/service/nokia-7215-postinit.service new file mode 100755 index 00000000000..342fd8dabc1 --- /dev/null +++ b/platform/nokia-vs/sonic-platform-nokia/7215-c1/service/nokia-7215-postinit.service @@ -0,0 +1,17 @@ +[Unit] +Description=Nokia-7215 Post-init Platform Service +ConditionPathExists=/usr/local/bin/nokia-7215-postinit.sh +ConditionPathExists=/usr/local/bin/intf_sync.py + +After=nokia-7215init.service +Wants=nokia-7215init.service + +[Service] +Type=simple +ExecStart=/usr/local/bin/nokia-7215-postinit.sh +Restart=always +RestartSec=5 +StandardOutput=tty + +[Install] +WantedBy=multi-user.target diff --git a/platform/nokia-vs/sonic-platform-nokia/7215-c1/service/nokia-7215init.service b/platform/nokia-vs/sonic-platform-nokia/7215-c1/service/nokia-7215init.service new file mode 100644 index 00000000000..071523e88af --- /dev/null +++ b/platform/nokia-vs/sonic-platform-nokia/7215-c1/service/nokia-7215init.service @@ -0,0 +1,14 @@ +[Unit] +Description=Nokia-7215 Platform Service +DefaultDependencies=no +After=sysinit.target local-fs.target +Before=networking.service +Before=pmon.service + +[Service] +Type=oneshot +ExecStart=/usr/local/bin/nokia-7215-init.sh +StandardOutput=tty + +[Install] +WantedBy=multi-user.target diff --git a/platform/nokia-vs/sonic-platform-nokia/7215-c1/setup.py b/platform/nokia-vs/sonic-platform-nokia/7215-c1/setup.py new file mode 100755 index 00000000000..67663d3567a --- /dev/null +++ b/platform/nokia-vs/sonic-platform-nokia/7215-c1/setup.py @@ -0,0 +1,15 @@ +#!/usr/bin/env python + +import os +from setuptools import setup +os.listdir + +setup( + name='sonic_platform', + version='1.0', + description='Module to initialize Nokia IXS 7215 platforms', + + packages=['sonic_platform','sonic_platform.test'], + package_dir={'sonic_platform': 'sonic_platform'}, +) + diff --git a/platform/nokia-vs/sonic-platform-nokia/7215-c1/sonic_platform/__init__.py b/platform/nokia-vs/sonic-platform-nokia/7215-c1/sonic_platform/__init__.py new file mode 100644 index 00000000000..4bfefa0fb63 --- /dev/null +++ b/platform/nokia-vs/sonic-platform-nokia/7215-c1/sonic_platform/__init__.py @@ -0,0 +1,3 @@ +__all__ = ["platform", "chassis"] +from sonic_platform import * + diff --git a/platform/nokia-vs/sonic-platform-nokia/7215-c1/sonic_platform/chassis.py b/platform/nokia-vs/sonic-platform-nokia/7215-c1/sonic_platform/chassis.py new file mode 100644 index 00000000000..8292d5a3240 --- /dev/null +++ b/platform/nokia-vs/sonic-platform-nokia/7215-c1/sonic_platform/chassis.py @@ -0,0 +1,448 @@ +############################################################################# +# +# Module contains an implementation of SONiC Platform Base API and +# provides the platform information +# +############################################################################# + +try: + import os + import time + import sys + import glob + from sonic_platform_base.chassis_base import ChassisBase + from sonic_platform.sfp import Sfp + from sonic_platform.eeprom import Eeprom + from sonic_platform.fan import Fan + from .fan_drawer import RealDrawer + from sonic_platform.psu import Psu + from sonic_platform.thermal import Thermal + from sonic_platform.component import Component + from sonic_py_common import logger + from sonic_py_common.general import getstatusoutput_noshell +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +MAX_SELECT_DELAY = 3600 +COPPER_PORT_START = 3 +COPPER_PORT_END = 3 +SFP_PORT_START = 1 +SFP_PORT_END = 2 +PORT_END = 3 +MAX_7215_COMPONENT=3 + +# Device counts +MAX_7215_FAN_DRAWERS = 2 +MAX_7215_FANS_PER_DRAWER = 1 +MAX_7215_PSU = 2 +MAX_7215_THERMAL = 5 +CPLD_DIR = "/sys/bus/i2c/devices/0-0041/" + +SYSLOG_IDENTIFIER = "chassis" +sonic_logger = logger.Logger(SYSLOG_IDENTIFIER) + + +class Chassis(ChassisBase): + """ + Nokia platform-specific Chassis class + Derived from Dell S6000 platform. + customized for the 7215 platform. + """ + + def __init__(self): + ChassisBase.__init__(self) + self.system_led_supported_color = ['off', 'amber', 'green', 'amber_blink', 'green_blink'] + # Port numbers for SFP List Initialization + self.COPPER_PORT_START = COPPER_PORT_START + self.COPPER_PORT_END = COPPER_PORT_END + self.SFP_PORT_START = SFP_PORT_START + self.SFP_PORT_END = SFP_PORT_END + self.PORT_END = PORT_END + + # Verify optoe2 driver SFP eeprom devices were enumerated and exist + # then create the sfp nodes + eeprom_path = "/sys/bus/i2c/devices/i2c-{0}/{0}-0050/eeprom" + mux_dev = sorted(glob.glob("/sys/bus/i2c/devices/i2c-1/i2c-[0-9]")) + y = 2 #HW design is 2-based index for SFP ports. check i2c tree for more details + for index in range(self.SFP_PORT_START, self.SFP_PORT_END+1): + mux_dev_num = mux_dev[y] + port_i2c_map = mux_dev_num[-1] + y = y + 1 + port_eeprom_path = eeprom_path.format(port_i2c_map) + if not os.path.exists(port_eeprom_path): + sonic_logger.log_info("path %s didnt exist" % port_eeprom_path) + sfp_node = Sfp(index, 'SFP', port_eeprom_path, port_i2c_map) + self._sfp_list.append(sfp_node) + self.sfp_event_initialized = False + + # for non-sfp ports create dummy objects for copper / non-sfp ports + for index in range(self.COPPER_PORT_START, self.COPPER_PORT_END+1): + sfp_node = Sfp(index, 'COPPER', 'N/A', 'N/A') + self._sfp_list.append(sfp_node) + + # Instantiate system eeprom object + self._eeprom = Eeprom() + + # Construct lists fans, power supplies, thermals & components + drawer_num = MAX_7215_FAN_DRAWERS + fan_num_per_drawer = MAX_7215_FANS_PER_DRAWER + drawer_ctor = RealDrawer + fan_index = 0 + for drawer_index in range(drawer_num): + drawer = drawer_ctor(drawer_index) + self._fan_drawer_list.append(drawer) + for index in range(fan_num_per_drawer): + fan = Fan(fan_index, drawer, self.get_model()) + fan_index += 1 + drawer._fan_list.append(fan) + self._fan_list.append(fan) + + for i in range(MAX_7215_PSU): + psu = Psu(i, self.get_model()) + self._psu_list.append(psu) + + for i in range(MAX_7215_THERMAL): + thermal = Thermal(i) + self._thermal_list.append(thermal) + + for i in range(MAX_7215_COMPONENT): + component = Component(self.get_model(), i) + self._component_list.append(component) + + def _read_sysfs_file(self, sysfs_file): + # On successful read, returns the value read from given + # reg_name and on failure returns 'ERR' + rv = 'ERR' + + if (not os.path.isfile(sysfs_file)): + return rv + try: + with open(sysfs_file, 'r') as fd: + rv = fd.read() + except Exception as e: + rv = 'ERR' + + rv = rv.rstrip('\r\n') + rv = rv.lstrip(" ") + return rv + + def _write_sysfs_file(self, sysfs_file, value): + # On successful write, the value read will be written on + # reg_name and on failure returns 'ERR' + rv = 'ERR' + + if (not os.path.isfile(sysfs_file)): + return rv + try: + with open(sysfs_file, 'w') as fd: + rv = fd.write(str(value)) + except Exception as e: + rv = 'ERR' + + # Ensure that the write operation has succeeded + if ((self._read_sysfs_file(sysfs_file)) != value ): + time.sleep(3) + if ((self._read_sysfs_file(sysfs_file)) != value ): + rv = 'ERR' + + return rv + + def get_sfp(self, index): + """ + Retrieves sfp represented by (1-based) index + Args: + index: An integer, the index (1-based) of the sfp to retrieve. + The index should be the sequence of physical SFP ports in a + chassis starting from 1. + + Returns: + An object dervied from SfpBase representing the specified sfp + """ + sfp = None + + try: + # The index will start from 1 + sfp = self._sfp_list[index-1] + except IndexError: + sys.stderr.write("SFP index {} out of range (1-{})\n".format( + index, len(self._sfp_list))) + return sfp + + def get_name(self): + """ + Retrieves the name of the chassis + Returns: + string: The name of the chassis + """ + return self._eeprom.modelstr() + + def get_presence(self): + """ + Retrieves the presence of the chassis + Returns: + bool: True if chassis is present, False if not + """ + return True + + def get_model(self): + """ + Retrieves the model number (or part number) of the chassis + Returns: + string: Model/part number of chassis + """ + return self._eeprom.part_number_str() + + def get_serial(self): + """ + Retrieves the serial number of the chassis + Returns: + string: Serial number of chassis + """ + return self._eeprom.serial_number_str() + + def get_status(self): + """ + Retrieves the operational status of the chassis + Returns: + bool: A boolean value, True if chassis is operating properly + False if not + """ + return True + + def get_base_mac(self): + """ + Retrieves the base MAC address for the chassis + + Returns: + A string containing the MAC address in the format + 'XX:XX:XX:XX:XX:XX' + """ + return self._eeprom.base_mac_addr() + + def get_service_tag(self): + """ + Retrieves the Service Tag of the chassis + Returns: + string: Service Tag of chassis + """ + return self._eeprom.service_tag_str() + + def get_revision(self): + """ + Retrieves the hardware revision of the chassis + + Returns: + string: Revision value of chassis + """ + #Revision is always 0 for 7215-IXS-A1 + return str(0) + + def get_system_eeprom_info(self): + """ + Retrieves the full content of system EEPROM information for the + chassis + + Returns: + A dictionary where keys are the type code defined in + OCP ONIE TlvInfo EEPROM format and values are their + corresponding values. + """ + return self._eeprom.system_eeprom_info() + + def get_reboot_cause(self): + """ + Retrieves the cause of the previous reboot + Returns: + A tuple (string, string) where the first element is a string + containing the cause of the previous reboot. This string must be + one of the predefined strings in this class. If the first string + is "REBOOT_CAUSE_HARDWARE_OTHER", the second string can be used + to pass a description of the reboot cause. + """ + + REBOOT_CAUSE_FILE = "/host/reboot-cause/reboot-cause.txt" + if os.path.isfile(REBOOT_CAUSE_FILE): + with open(REBOOT_CAUSE_FILE) as cause_file: + software_reboot_cause = cause_file.readline().rstrip('\n') + value = self._read_sysfs_file(CPLD_DIR+"last_reset_cause") + thermal = self._read_sysfs_file(CPLD_DIR+"temp_event_status") + if (value == 'cold_reset'): + reboot_cause=(ChassisBase.REBOOT_CAUSE_POWER_LOSS, "Cold Reset") + elif (value == 'warm_reset'): + reboot_cause=(ChassisBase.REBOOT_CAUSE_HARDWARE_OTHER, "Warm Reset") + elif (value == 'wdog_reset' and software_reboot_cause == 'Unknown'): + reboot_cause=(ChassisBase.REBOOT_CAUSE_WATCHDOG, None) + elif (value == 'thermal_reset'): + reboot_cause=(ChassisBase.REBOOT_CAUSE_THERMAL_OVERLOAD_OTHER, thermal) + else: + reboot_cause=(ChassisBase.REBOOT_CAUSE_NON_HARDWARE, None) + + #Log reboot cause and unmask temperature event + sonic_logger.log_notice("Reboot-cause reported by platform - {}".format(reboot_cause)) + self._write_sysfs_file(CPLD_DIR+"temp_event_mask", 0) + + return reboot_cause + + def get_watchdog(self): + """ + Retrieves hardware watchdog device on this chassis + + Returns: + An object derived from WatchdogBase representing the hardware + watchdog device + + Note: + We overload this method to ensure that watchdog is only initialized + when it is referenced. Currently, only one daemon can open the + watchdog. To initialize watchdog in the constructor causes multiple + daemon try opening watchdog when loading and constructing a chassis + object and fail. By doing so we can eliminate that risk. + """ + try: + if self._watchdog is None: + from sonic_platform.watchdog import WatchdogImplBase + watchdog_device_path = "/dev/watchdog0" + self._watchdog = WatchdogImplBase(watchdog_device_path) + except Exception as e: + sonic_logger.log_warning(" Fail to load watchdog {}".format(repr(e))) + + return self._watchdog + + def get_change_event(self, timeout=0): + """ + Returns a nested dictionary containing all devices which have + experienced a change at chassis level + + Args: + timeout: Timeout in milliseconds (optional). If timeout == 0, + this method will block until a change is detected. + + Returns: + (bool, dict): + - True if call successful, False if not; + - A nested dictionary where key is a device type, + value is a dictionary with key:value pairs in the format of + {'device_id':'device_event'}, + where device_id is the device ID for this device and + device_event, + status='1' represents device inserted, + status='0' represents device removed. + Ex. {'fan':{'0':'0', '2':'1'}, 'sfp':{'11':'0'}} + indicates that fan 0 has been removed, fan 2 + has been inserted and sfp 11 has been removed. + """ + # Initialize SFP event first + if not self.sfp_event_initialized: + from sonic_platform.sfp_event import sfp_event + self.sfp_event = sfp_event() + self.sfp_event.initialize() + self.MAX_SELECT_EVENT_RETURNED = self.PORT_END + self.sfp_event_initialized = True + + wait_for_ever = (timeout == 0) + port_dict = {} + if wait_for_ever: + # xrcvd will call this monitor loop in the "SYSTEM_READY" state + # logger.log_info(" wait_for_ever get_change_event %d" % timeout) + timeout = MAX_SELECT_DELAY + while True: + status = self.sfp_event.check_sfp_status(port_dict, timeout) + if not port_dict == {}: + break + else: + # At boot up and in "INIT" state call from xrcvd will have timeout + # value return true without change after timeout and will + # transition to "SYSTEM_READY" + status = self.sfp_event.check_sfp_status(port_dict, timeout) + + if status: + return True, {'sfp': port_dict} + else: + return True, {'sfp': {}} + + def get_thermal_manager(self): + from .thermal_manager import ThermalManager + return ThermalManager + + def initizalize_system_led(self): + return True + + def set_status_led(self, color): + """ + Sets the state of the system LED + + Args: + color: A string representing the color with which to set the + system LED + + Returns: + bool: True if system LED state is set successfully, False if not + """ + if color not in self.system_led_supported_color: + return False + + if (color == 'off'): + value = 'off' + elif (color == 'amber'): + value ='amber' + elif (color == 'green'): + value ='green' + elif (color == 'amber_blink'): + value = 'blink4-amber' + elif (color == 'green_blink'): + value = 'blink4-green' + else: + return False + # Write sys led + status = self._write_sysfs_file(CPLD_DIR+"system_led", value) + + if status == "ERR": + return False + + return True + + def get_status_led(self): + """ + Gets the state of the system LED + + Returns: + A string, one of the valid LED color strings which could be vendor + specified. + """ + # Read sys led + value = self._read_sysfs_file(CPLD_DIR+"system_led") + + if value == 'off': + color = 'off' + elif value == 'amber': + color = 'amber' + elif value == 'green': + color = 'green' + elif value == 'blink4-amber': + color = 'amber_blink' + elif value == 'blink4-green': + color = 'green_blink' + else: + return None + + return color + + def get_position_in_parent(self): + """ + Retrieves 1-based relative physical position in parent device. If the agent + cannot determine the parent-relative position + for some reason, or if the associated value of entPhysicalContainedIn is '0', + then the value '-1' is returned + Returns: + integer: The 1-based relative physical position in parent device or -1 if + cannot determine the position + """ + return -1 + + def is_replaceable(self): + """ + Indicate whether this device is replaceable. + Returns: + bool: True if it is replaceable. + """ + return False diff --git a/platform/nokia-vs/sonic-platform-nokia/7215-c1/sonic_platform/component.py b/platform/nokia-vs/sonic-platform-nokia/7215-c1/sonic_platform/component.py new file mode 100644 index 00000000000..8692f347e57 --- /dev/null +++ b/platform/nokia-vs/sonic-platform-nokia/7215-c1/sonic_platform/component.py @@ -0,0 +1,319 @@ +######################################################################## +# NOKIA IXS7215 +# +# Module contains an implementation of SONiC Platform Base API and +# provides the Components' (e.g., BIOS, CPLD, FPGA, etc.) available in +# the platform +# +######################################################################## + +try: + import sys + import os + import time + import subprocess + import ntpath + from sonic_platform_base.component_base import ComponentBase + from sonic_py_common.general import getstatusoutput_noshell, getstatusoutput_noshell_pipe +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +if sys.version_info[0] < 3: + import commands as cmd +else: + import subprocess as cmd + + +CPLD_DIR = "/sys/bus/i2c/devices/0-0041/" +FPGA_DIR = "/sys/bus/pci/devices/0000:01:00.0/" + +class Component(ComponentBase): + """Nokia platform-specific Component class""" + + CHASSIS_COMPONENTS = [ + ["System-CPLD", "Used for managing SFPs, LEDs, PSUs and FANs "], + ["U-Boot", "Performs initialization during booting"], + ["FPGA", "Manages RS232 console ports "], + ] + CPLD_UPDATE_COMMAND = ['./cpldupd_A1', ''] + + def __init__(self, chassis_model, component_index): + self.index = component_index + self.name = self.CHASSIS_COMPONENTS[self.index][0] + self.description = self.CHASSIS_COMPONENTS[self.index][1] + self.chassis_model = chassis_model + + def _get_command_result(self, cmdline): + try: + proc = subprocess.Popen(cmdline.split(), stdout=subprocess.PIPE, + stderr=subprocess.STDOUT) + stdout = proc.communicate()[0] + proc.wait() + result = stdout.rstrip('\n') + except OSError: + result = None + + return result + def get_chassis_model(self): + """ + Retrieves the model number of the Fan + + Returns: + string: Model number of Fan. Use part number for this. + """ + return self.chassis_model + + def _read_sysfs_file(self, sysfs_file): + # On successful read, returns the value read from given + # reg_name and on failure returns 'ERR' + rv = 'ERR' + + if (not os.path.isfile(sysfs_file)): + return rv + try: + with open(sysfs_file, 'r') as fd: + rv = fd.read() + except Exception as e: + rv = 'ERR' + + rv = rv.rstrip('\r\n') + rv = rv.lstrip(" ") + return rv + + def _write_sysfs_file(self, sysfs_file, value): + # On successful write, the value read will be written on + # reg_name and on failure returns 'ERR' + rv = 'ERR' + + if (not os.path.isfile(sysfs_file)): + return rv + try: + with open(sysfs_file, 'w') as fd: + rv = fd.write(str(value)) + except Exception as e: + rv = 'ERR' + + # Ensure that the write operation has succeeded + if (int(self._read_sysfs_file(sysfs_file)) != value ): + time.sleep(3) + if (int(self._read_sysfs_file(sysfs_file)) != value ): + rv = 'ERR' + + return rv + + def _get_cpld_version(self, cpld_number): + + cpld_version = self._read_sysfs_file(CPLD_DIR+"cpldversion") + + return str(int(cpld_version, 16)) + + def _get_fpga_version(self, fpga_number): + fpga_version = self._read_sysfs_file(FPGA_DIR + "version") + return fpga_version + + def get_name(self): + """ + Retrieves the name of the component + + Returns: + A string containing the name of the component + """ + return self.name + + def get_model(self): + """ + Retrieves the part number of the component + Returns: + string: Part number of component + """ + return 'NA' + + def get_serial(self): + """ + Retrieves the serial number of the component + Returns: + string: Serial number of component + """ + return 'NA' + + def get_presence(self): + """ + Retrieves the presence of the component + Returns: + bool: True if present, False if not + """ + return True + + def get_status(self): + """ + Retrieves the operational status of the component + Returns: + bool: True if component is operating properly, False if not + """ + return True + + def get_position_in_parent(self): + """ + Retrieves 1-based relative physical position in parent device. + Returns: + integer: The 1-based relative physical position in parent + device or -1 if cannot determine the position + """ + return -1 + + def is_replaceable(self): + """ + Indicate whether component is replaceable. + Returns: + bool: True if it is replaceable. + """ + return False + + def get_description(self): + """ + Retrieves the description of the component + + Returns: + A string containing the description of the component + """ + return self.description + + def get_firmware_version(self): + """ + Retrieves the firmware version of the component + + Returns: + A string containing the firmware version of the component + """ + if self.index == 0: + return self._get_cpld_version(self.index) + + if self.index == 1: + cmdstatus, uboot_version = cmd.getstatusoutput('cat /proc/device-tree/chosen/u-boot,version') + return uboot_version + + if self.index == 2: + return self._get_fpga_version(self.index) + + def get_available_firmware_version(self, image_path): + """ + Retrieves the available firmware version of the component + Note: the firmware version will be read from image + Args: + image_path: A string, path to firmware image + Returns: + A string containing the available firmware version of the component + """ + if image_path: + image_name = ntpath.basename(image_path) + return image_name + + return 'NA' + + def install_firmware(self, image_path): + """ + Installs firmware to the component + + Args: + image_path: A string, path to firmware image + + Returns: + A boolean, True if install was successful, False if not + """ + image_name = ntpath.basename(image_path) + print(" Nokia - install firmware {}".format(image_name)) + + # check whether the image file exists + if not os.path.isfile(image_path): + print("ERROR: the firmware image {} doesn't exist ".format(image_path)) + return False + if self.name == "System-CPLD": + # check whether the cpld exe exists + if not os.path.isfile('/tmp/cpldupd_A1'): + print("ERROR: the cpld exe {} doesn't exist ".format('/tmp/cpldupd_A1')) + return False + + self.CPLD_UPDATE_COMMAND[1] = image_name + + success_flag = False + + try: + subprocess.check_call(self.CPLD_UPDATE_COMMAND, stderr=subprocess.STDOUT) + + success_flag = True + except subprocess.CalledProcessError as e: + print("ERROR: Failed to upgrade CPLD: rc={}".format(e.returncode)) + + if success_flag: + print("INFO: Refresh or power cycle is required to finish CPLD installation") + + return success_flag + elif self.name == "U-Boot": + ch_model=self.get_chassis_model() + mount_point = "/mnt/p1" + success_flag = False + UBOOT_UPDATE_COMMAND1 = ['sudo', 'mkdir', mount_point] + UBOOT_UPDATE_COMMAND2 = ['sudo', 'mount', '/dev/mmcblk0p1', mount_point] + UBOOT_UPDATE_COMMAND3 = ['cp', image_path, '/mnt/p1/EFI/UpdateCapsule'] + UBOOT_UPDATE_COMMAND4 = ['sudo', 'umount', mount_point] + UBOOT_UPDATE_COMMAND5 = ['sudo', 'rmdir', mount_point] + UBOOT_UPDATE_COMMAND6 = ['sudo', 'reboot'] + + try: + if not os.path.isdir(mount_point): + subprocess.check_call(UBOOT_UPDATE_COMMAND1, stderr=subprocess.STDOUT) + if not os.path.ismount(mount_point): + subprocess.check_call(UBOOT_UPDATE_COMMAND2, stderr=subprocess.STDOUT) + subprocess.check_call(UBOOT_UPDATE_COMMAND3, stderr=subprocess.STDOUT) + subprocess.check_call(UBOOT_UPDATE_COMMAND4, stderr=subprocess.STDOUT) + subprocess.check_call(UBOOT_UPDATE_COMMAND5, stderr=subprocess.STDOUT) + subprocess.check_call(UBOOT_UPDATE_COMMAND6, stderr=subprocess.STDOUT) + success_flag = True + except subprocess.CalledProcessError as e: + print("ERROR: Failed to upgrade U-BOOT: rc={}",format(e.returncode)) + + return success_flag + elif self.name == "FPGA": + mount_point = "/mnt/p1" + success_flag = False + FPGA_UPDATE_COMMAND1 = ['sudo', 'mkdir', mount_point] + FPGA_UPDATE_COMMAND2 = ['sudo', 'mount', '/dev/mmcblk0p1', mount_point] + FPGA_UPDATE_COMMAND3 = ['cp', image_path, '/mnt/p1/EFI/UpdateCapsule'] + FPGA_UPDATE_COMMAND4 = ['sudo', 'umount', mount_point] + FPGA_UPDATE_COMMAND5 = ['sudo', 'rmdir', mount_point] + FPGA_UPDATE_COMMAND6 = ['sudo', 'reboot'] + + try: + if not os.path.isdir(mount_point): + subprocess.check_call(FPGA_UPDATE_COMMAND1, stderr=subprocess.STDOUT) + if not os.path.ismount(mount_point): + subprocess.check_call(FPGA_UPDATE_COMMAND2, stderr=subprocess.STDOUT) + subprocess.check_call(FPGA_UPDATE_COMMAND3, stderr=subprocess.STDOUT) + subprocess.check_call(FPGA_UPDATE_COMMAND4, stderr=subprocess.STDOUT) + subprocess.check_call(FPGA_UPDATE_COMMAND5, stderr=subprocess.STDOUT) + subprocess.check_call(FPGA_UPDATE_COMMAND6, stderr=subprocess.STDOUT) + success_flag = True + except subprocess.CalledProcessError as e: + print("ERROR: Failed to upgrade FPGA: rc={}".format(e.returncode)) + + if success_flag: + print("INFO: Power cycle is required to finish FPGA installation") + + return success_flag + + def update_firmware(self, image_path): + """ + Updates firmware of the component + This API performs firmware update: it assumes firmware installation and loading in a single call. + In case platform component requires some extra steps (apart from calling Low Level Utility) + to load the installed firmware (e.g, reboot, power cycle, etc.) - this will be done automatically by API + Args: + image_path: A string, path to firmware image + Returns: + Boolean False if image_path doesn't exist instead of throwing an exception error + Nothing when the update is successful + Raises: + RuntimeError: update failed + """ + return self.install_firmware(image_path) diff --git a/platform/nokia-vs/sonic-platform-nokia/7215-c1/sonic_platform/eeprom.py b/platform/nokia-vs/sonic-platform-nokia/7215-c1/sonic_platform/eeprom.py new file mode 100644 index 00000000000..28ee0e7ea4d --- /dev/null +++ b/platform/nokia-vs/sonic-platform-nokia/7215-c1/sonic_platform/eeprom.py @@ -0,0 +1,175 @@ +######################################################################## +# +# Module contains platform specific implementation of SONiC Platform +# Base API and provides the EEPROMs' information. +# +# The different EEPROMs available are as follows: +# - System EEPROM : Contains Serial number, Service tag, Base MA +# address, etc. in ONIE TlvInfo EEPROM format. +######################################################################## + + +try: + from sonic_platform_base.sonic_eeprom.eeprom_tlvinfo import TlvInfoDecoder + from sonic_py_common import logger +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +sonic_logger = logger.Logger('eeprom') + +class Eeprom(TlvInfoDecoder): + """Nokia platform-specific EEPROM class""" + + I2C_DIR = "/sys/bus/i2c/devices/" + + def __init__(self, is_psu=False, psu_index=0, is_fan=False, fan_index=0): + self.is_psu_eeprom = is_psu + self.is_fan_eeprom = is_fan + self.is_sys_eeprom = not (is_psu | is_fan) + + if self.is_sys_eeprom: + self.start_offset = 0 + self.eeprom_path = self.I2C_DIR + "0-0053/eeprom" + # System EEPROM is in ONIE TlvInfo EEPROM format + super(Eeprom, self).__init__(self.eeprom_path, + self.start_offset, '', True) + self._load_system_eeprom() + + else: + if self.is_psu_eeprom: + self.index = psu_index + self.part_number = '1' + self.model_str = 'NA' + self.serial_number = 'NA' + self.service_tag = 'NA' + + if self.is_fan_eeprom: + self.index = fan_index + self.part_number = '1' + self.model_str = 'NA' + self.serial_number = 'NA' + self.service_tag = 'NA' + + + def _load_system_eeprom(self): + """ + Reads the system EEPROM and retrieves the values corresponding + to the codes defined as per ONIE TlvInfo EEPROM format and fills + them in a dictionary. + """ + try: + # Read System EEPROM as per ONIE TlvInfo EEPROM format. + self.eeprom_data = self.read_eeprom() + except Exception as e: + sonic_logger.log_warning("Unable to read system eeprom") + self.base_mac = 'NA' + self.serial_number = 'NA' + self.part_number = 'NA' + self.model_str = 'NA' + self.service_tag = 'NA' + self.eeprom_tlv_dict = dict() + else: + eeprom = self.eeprom_data + self.eeprom_tlv_dict = dict() + + if not self.is_valid_tlvinfo_header(eeprom): + sonic_logger.log_warning("Invalid system eeprom TLV header") + self.base_mac = 'NA' + self.serial_number = 'NA' + self.part_number = 'NA' + self.model_str = 'NA' + self.service_tag = 'NA' + return + + total_length = (eeprom[9] << 8) | eeprom[10] + tlv_index = self._TLV_INFO_HDR_LEN + tlv_end = self._TLV_INFO_HDR_LEN + total_length + + while (tlv_index + 2) < len(eeprom) and tlv_index < tlv_end: + if not self.is_valid_tlv(eeprom[tlv_index:]): + break + + tlv = eeprom[tlv_index:tlv_index + 2 + + eeprom[tlv_index + 1]] + code = "0x%02X" % (tlv[0]) + + name, value = self.decoder(None, tlv) + + self.eeprom_tlv_dict[code] = value + if eeprom[tlv_index] == self._TLV_CODE_CRC_32: + break + + tlv_index += eeprom[tlv_index+1] + 2 + + self.base_mac = self.eeprom_tlv_dict.get( + "0x%X" % (self._TLV_CODE_MAC_BASE), 'NA') + self.serial_number = self.eeprom_tlv_dict.get( + "0x%X" % (self._TLV_CODE_SERIAL_NUMBER), 'NA') + self.part_number = self.eeprom_tlv_dict.get( + "0x%X" % (self._TLV_CODE_PART_NUMBER), 'NA') + self.model_str = self.eeprom_tlv_dict.get( + "0x%X" % (self._TLV_CODE_PRODUCT_NAME), 'NA') + self.service_tag = self.eeprom_tlv_dict.get( + "0x%X" % (self._TLV_CODE_SERVICE_TAG), 'NA') + + def _get_eeprom_field(self, field_name): + """ + For a field name specified in the EEPROM format, returns the + presence of the field and the value for the same. + """ + field_start = 0 + for field in self.format: + field_end = field_start + field[2] + if field[0] == field_name: + return (True, self.eeprom_data[field_start:field_end]) + field_start = field_end + + return (False, None) + + def serial_number_str(self): + """ + Returns the serial number. + """ + return self.serial_number + + def part_number_str(self): + """ + Returns the part number. + """ + return self.part_number + + def airflow_fan_type(self): + """ + Returns the airflow fan type. + """ + if self.is_psu_eeprom: + return int(self.psu_type.encode('hex'), 16) + if self.is_fan_eeprom: + return int(self.fan_type.encode('hex'), 16) + + # System EEPROM specific methods + def base_mac_addr(self): + """ + Returns the base MAC address found in the system EEPROM. + """ + return self.base_mac + + def modelstr(self): + """ + Returns the Model name. + """ + return self.model_str + + def service_tag_str(self): + """ + Returns the servicetag number. + """ + return self.service_tag + + def system_eeprom_info(self): + """ + Returns a dictionary, where keys are the type code defined in + ONIE EEPROM format and values are their corresponding values + found in the system EEPROM. + """ + return self.eeprom_tlv_dict diff --git a/platform/nokia-vs/sonic-platform-nokia/7215-c1/sonic_platform/fan.py b/platform/nokia-vs/sonic-platform-nokia/7215-c1/sonic_platform/fan.py new file mode 100644 index 00000000000..8cc97953d99 --- /dev/null +++ b/platform/nokia-vs/sonic-platform-nokia/7215-c1/sonic_platform/fan.py @@ -0,0 +1,324 @@ +######################################################################## +# +# Module contains an implementation of SONiC Platform Base API and +# provides the Fans' information which are available in the platform +# +######################################################################## + + +try: + import os + import time + from sonic_platform_base.fan_base import FanBase + from sonic_platform.eeprom import Eeprom + from sonic_py_common import logger +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +MAX_IXS7215_FAN_SPEED = 24000 +WORKING_IXS7215_FAN_SPEED = 2400 + + +sonic_logger = logger.Logger('fan') + + +class Fan(FanBase): + """Nokia platform-specific Fan class""" + + def __init__(self, fan_index, fan_drawer, chassis_model, psu_fan=False, dependency=None): + self.is_psu_fan = psu_fan + EMC2302_DIR = " " + i2c_path = "/sys/bus/i2c/devices/0-002f/hwmon/" + if(os.path.exists(i2c_path)): + hwmon_node = os.listdir(i2c_path)[0] + EMC2302_DIR = i2c_path + hwmon_node + '/' + + if not self.is_psu_fan: + # Fan is 1-based in Nokia platforms + self.index = fan_index + 1 + self.fan_drawer = fan_drawer + self.chassis_model = chassis_model + self.set_fan_speed_reg = EMC2302_DIR+"pwm{}".format(self.index) + self.get_fan_speed_reg = EMC2302_DIR+"fan{}_input".format(self.index) + self.max_fan_speed = MAX_IXS7215_FAN_SPEED + + self.eeprom = Eeprom(is_fan=True, fan_index=self.index) + else: + # this is a PSU Fan + self.index = fan_index + self.dependency = dependency + + def _read_sysfs_file(self, sysfs_file): + # On successful read, returns the value read from given + # reg_name and on failure returns 'ERR' + rv = 'ERR' + + if (not os.path.isfile(sysfs_file)): + return rv + try: + with open(sysfs_file, 'r') as fd: + rv = fd.read() + except Exception as e: + rv = 'ERR' + + rv = rv.rstrip('\r\n') + rv = rv.lstrip(" ") + return rv + + def _write_sysfs_file(self, sysfs_file, value): + # On successful write, the value read will be written on + # reg_name and on failure returns 'ERR' + rv = 'ERR' + + if (not os.path.isfile(sysfs_file)): + return rv + try: + with open(sysfs_file, 'w') as fd: + rv = fd.write(str(value)) + except Exception as e: + rv = 'ERR' + + # Ensure that the write operation has succeeded + if (int(self._read_sysfs_file(sysfs_file)) != value ): + time.sleep(3) + if (int(self._read_sysfs_file(sysfs_file)) != value ): + rv = 'ERR' + + return rv + + def get_name(self): + """ + Retrieves the name of the Fan + + Returns: + string: The name of the Fan + """ + if not self.is_psu_fan: + return "Fan{}".format(self.index) + else: + return "PSU{} Fan".format(self.index) + + def get_presence(self): + """ + Retrieves the presence of the Fan Unit + + Returns: + bool: True if Fan is present, False if not + """ + return True + + def get_model(self): + """ + Retrieves the model number of the Fan + + Returns: + string: Model number of Fan. Use part number for this. + """ + return self.eeprom.modelstr() + + def get_chassis_model(self): + """ + Retrieves the model number of the Fan + + Returns: + string: Model number of Fan. Use part number for this. + """ + return self.chassis_model + + def get_serial(self): + """ + Retrieves the serial number of the Fan + + Returns: + string: Serial number of Fan + """ + return self.eeprom.serial_number_str() + + def get_part_number(self): + """ + Retrieves the part number of the Fan + + Returns: + string: Part number of Fan + """ + return self.eeprom.part_number_str() + + def get_service_tag(self): + """ + Retrieves the service tag of the Fan + + Returns: + string: Service Tag of Fan + """ + return self.eeprom.service_tag_str() + + def get_status(self): + """ + Retrieves the operational status of the Fan + + Returns: + bool: True if Fan is operating properly, False if not + """ + status = False + + fan_speed = self._read_sysfs_file(self.get_fan_speed_reg) + if (fan_speed != 'ERR'): + if (int(fan_speed) > WORKING_IXS7215_FAN_SPEED): + status = True + + return status + + def get_direction(self): + """ + Retrieves the fan airflow direction + Possible fan directions (relative to port-side of device) + Returns: + A string, either FAN_DIRECTION_INTAKE or + FAN_DIRECTION_EXHAUST depending on fan direction + """ + + direction = 'intake' + + return direction + + def get_position_in_parent(self): + """ + Retrieves 1-based relative physical position in parent device + Returns: + integer: The 1-based relative physical position in parent device + """ + return self.index + + def is_replaceable(self): + """ + Indicate whether this device is replaceable. + Returns: + bool: True if it is replaceable. + """ + return False + + + def get_speed(self): + """ + Retrieves the speed of a Front FAN in the tray in revolutions per + minute defined by 1-based index + :param index: An integer, 1-based index of the FAN to query speed + :return: integer, denoting front FAN speed + """ + speed = 0 + + fan_speed = self._read_sysfs_file(self.get_fan_speed_reg) + if (fan_speed != 'ERR'): + speed_in_rpm = int(fan_speed) + else: + speed_in_rpm = 0 + + speed = 100*speed_in_rpm//MAX_IXS7215_FAN_SPEED + if speed > 100: + speed = 100 + + return speed + + def get_speed_tolerance(self): + """ + Retrieves the speed tolerance of the fan + + Returns: + An integer, the percentage of variance from target speed + which is considered tolerable + """ + if self.get_presence(): + if self.get_target_speed()<50: + tolerance=60 + else: + tolerance = 25 + else: + tolerance = 0 + + return tolerance + + def set_speed(self, speed): + """ + Set fan speed to expected value + Args: + speed: An integer, the percentage of full fan speed to set + fan to, in the range 0 (off) to 100 (full speed) + Returns: + bool: True if set success, False if fail. + """ + if self.is_psu_fan: + return False + + if speed in range(0, 6): + fandutycycle = 0x00 + elif speed in range(6, 26): + fandutycycle = 64 + elif speed in range(26, 41): + fandutycycle = 102 + elif speed in range(41, 52): + fandutycycle = 128 + elif speed in range(52, 76): + fandutycycle = 192 + elif speed in range(76, 101): + fandutycycle = 255 + else: + return False + + rv = self._write_sysfs_file(self.set_fan_speed_reg, fandutycycle) + if (rv != 'ERR'): + return True + else: + return False + + def set_status_led(self, color): + """ + Set led to expected color + Args: + color: A string representing the color with which to set the + fan module status LED + Returns: + bool: True if set success, False if fail. + + """ + # No Individual Status LED + return False + + def get_status_led(self): + """ + Gets the state of the fan status LED + + Returns: + A string, one of the predefined STATUS_LED_COLOR_* strings. + """ + if self.get_status(): + return self.STATUS_LED_COLOR_GREEN + else: + return self.STATUS_LED_COLOR_OFF + + def get_target_speed(self): + """ + Retrieves the target (expected) speed of the fan + + Returns: + An integer, the percentage of full fan speed, in the range 0 + (off) to 100 (full speed) + """ + speed = 0 + + fan_duty = self._read_sysfs_file(self.set_fan_speed_reg) + if (fan_duty != 'ERR'): + dutyspeed = int(fan_duty) + if dutyspeed == 0: + speed = 0 + elif dutyspeed == 64: + speed = 25 + elif dutyspeed == 102: + speed = 40 + elif dutyspeed == 128: + speed = 50 + elif dutyspeed == 192: + speed = 75 + elif dutyspeed == 255: + speed = 100 + + return speed diff --git a/platform/nokia-vs/sonic-platform-nokia/7215-c1/sonic_platform/fan_drawer.py b/platform/nokia-vs/sonic-platform-nokia/7215-c1/sonic_platform/fan_drawer.py new file mode 100644 index 00000000000..f80214ddf79 --- /dev/null +++ b/platform/nokia-vs/sonic-platform-nokia/7215-c1/sonic_platform/fan_drawer.py @@ -0,0 +1,101 @@ +############################################################################# +# +# Module contains an implementation of SONiC Platform Base API and +# provides the Fan Drawer status which is available in the platform +# +############################################################################# + +try: + from sonic_platform_base.fan_drawer_base import FanDrawerBase + from sonic_py_common import logger +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +sonic_logger = logger.Logger('fan_drawer') + +class NokiaFanDrawer(FanDrawerBase): + def __init__(self, index): + super(NokiaFanDrawer, self).__init__() + self._index = index + 1 + self._led = None + + def get_index(self): + return self._index + + def get_presence(self): + return self._fan_list[0].get_presence() + + def get_model(self): + """ + Retrieves the model number of the Fan Drawer + Returns: + string: Part number of Fan Drawer + """ + return self._fan_list[0].get_model() + + def get_serial(self): + """ + Retrieves the serial number of the Fan Drawer + Returns: + string: Serial number of Fan + """ + return self._fan_list[0].get_serial() + + def get_status(self): + """ + Retrieves the operational status of the Fan Drawer + Returns: + bool: True if Fan is operating properly, False if not + """ + return self._fan_list[0].get_status() + + def get_direction(self): + return 'intake' + + def set_status_led(self, color): + """ + Sets the state of the fan drawer status LED + + Args: + color: A string representing the color with which to set the + fan drawer status LED + + Returns: + bool: True if status LED state is set successfully, False if not + """ + return self._fan_list[0].set_status_led(color) + + def get_status_led(self): + """ + Gets the state of the fan drawer LED + + Returns: + A string, one of the predefined STATUS_LED_COLOR_* strings + """ + return self._fan_list[0].get_status_led() + + def is_replaceable(self): + """ + Indicate whether this device is replaceable. + Returns: + bool: True if it is replaceable. + """ + return False + + def get_position_in_parent(self): + """ + Retrieves 1-based relative physical position in parent device + Returns: + integer: The 1-based relative physical position in parent device + """ + return self._index + + +# For Nokia platforms with fan drawer(s) +class RealDrawer(NokiaFanDrawer): + def __init__(self, index): + super(RealDrawer, self).__init__(index) + self._name = 'drawer{}'.format(self._index) + + def get_name(self): + return self._name \ No newline at end of file diff --git a/platform/nokia-vs/sonic-platform-nokia/7215-c1/sonic_platform/platform.py b/platform/nokia-vs/sonic-platform-nokia/7215-c1/sonic_platform/platform.py new file mode 100644 index 00000000000..7a3046bc739 --- /dev/null +++ b/platform/nokia-vs/sonic-platform-nokia/7215-c1/sonic_platform/platform.py @@ -0,0 +1,22 @@ +############################################################################# +# +# Module contains an implementation of SONiC Platform Base API and +# provides the platform information +# +############################################################################# + +try: + from sonic_platform_base.platform_base import PlatformBase + from sonic_platform.chassis import Chassis +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class Platform(PlatformBase): + """ + Nokia platform-specific class + """ + + def __init__(self): + PlatformBase.__init__(self) + self._chassis = Chassis() diff --git a/platform/nokia-vs/sonic-platform-nokia/7215-c1/sonic_platform/psu.py b/platform/nokia-vs/sonic-platform-nokia/7215-c1/sonic_platform/psu.py new file mode 100644 index 00000000000..830269e731c --- /dev/null +++ b/platform/nokia-vs/sonic-platform-nokia/7215-c1/sonic_platform/psu.py @@ -0,0 +1,330 @@ +######################################################################## +# +# Module contains an implementation of SONiC Platform Base API and +# provides the PSUs' information which are available in the platform +# +######################################################################## + +try: + import os + import time + from sonic_platform_base.psu_base import PsuBase + from sonic_py_common import logger + from sonic_platform.eeprom import Eeprom + from sonic_py_common.general import getstatusoutput_noshell +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +sonic_logger = logger.Logger('psu') +INA230_DIR = "/sys/bus/i2c/devices/0-0040/iio:device0/" +CPLD_DIR = "/sys/bus/i2c/devices/0-0041/" +PSU_GPIO_DIR = ["/sys/class/gpio/gpio61/value", "/sys/class/gpio/gpio62/value"] + + +class Psu(PsuBase): + """Nokia platform-specific PSU class for 7215 """ + + def __init__(self, psu_index, chassis_model): + PsuBase.__init__(self) + # PSU is 1-based in Nokia platforms + self.index = psu_index + 1 + self._fan_list = [] + self.chassis_model = chassis_model + + self.eeprom = Eeprom(is_psu=True, psu_index=self.index) + self.MAX_VOLTAGE = 14 + self.MIN_VOLTAGE = 10 + + def _read_sysfs_file(self, sysfs_file): + # On successful read, returns the value read from given + # reg_name and on failure returns 'ERR' + rv = 'ERR' + + if (not os.path.isfile(sysfs_file)): + return rv + try: + with open(sysfs_file, 'r') as fd: + rv = fd.read() + except Exception as e: + rv = 'ERR' + + rv = rv.rstrip('\r\n') + rv = rv.lstrip(" ") + return rv + + def _write_sysfs_file(self, sysfs_file, value): + # On successful write, the value read will be written on + # reg_name and on failure returns 'ERR' + rv = 'ERR' + + if (not os.path.isfile(sysfs_file)): + return rv + try: + with open(sysfs_file, 'w') as fd: + rv = fd.write(str(value)) + except Exception as e: + rv = 'ERR' + + # Ensure that the write operation has succeeded + if ((self._read_sysfs_file(sysfs_file)) != value ): + time.sleep(3) + if ((self._read_sysfs_file(sysfs_file)) != value ): + rv = 'ERR' + + return rv + + def _get_active_psus(self): + """ + Retrieves the operational status of the PSU and + calculates number of active PSU's + + Returns: + Integer: Number of active PSU's + """ + active_psus = 0 + psu1_good = self._read_sysfs_file(PSU_GPIO_DIR[0]) + psu2_good = self._read_sysfs_file(PSU_GPIO_DIR[1]) + + active_psus = int(psu1_good) + int(psu2_good) + + return active_psus + + def get_chassis_model(self): + """ + Retrieves the model number of the Fan + + Returns: + string: Model number of Fan. Use part number for this. + """ + return self.chassis_model + + def get_name(self): + """ + Retrieves the name of the device + + Returns: + string: The name of the device + """ + return "PSU{}".format(self.index) + + def get_presence(self): + """ + Retrieves the presence of the Power Supply Unit (PSU) + + Returns: + bool: True if PSU is present, False if not + """ + + return True + + def get_model(self): + """ + Retrieves the part number of the PSU + + Returns: + string: Part number of PSU + """ + + model = 'AC-PSU' + + return model + + def get_serial(self): + """ + Retrieves the serial number of the PSU + + Returns: + string: Serial number of PSU + """ + return self.eeprom.serial_number_str() + + def get_revision(self): + """ + Retrieves the HW revision of the PSU + + Returns: + string: HW revision of PSU + """ + return self.eeprom.part_number_str() + + def get_part_number(self): + """ + Retrieves the part number of the PSU + + Returns: + string: Part number of PSU + """ + return self.eeprom.part_number_str() + + def get_status(self): + """ + Retrieves the operational status of the PSU + + Returns: + bool: True if PSU is operating properly, False if not + """ + psu_sysfs_str=PSU_GPIO_DIR[self.index-1] + psu_status = self._read_sysfs_file(psu_sysfs_str) + + if psu_status == '1': + return True + + return False + + def get_voltage(self): + """ + Retrieves current PSU voltage output + + Returns: + A float number, the output voltage in volts, + e.g. 12.1 + """ + if(self.get_status()): + psu_voltage = self._read_sysfs_file(INA230_DIR+"in_voltage1_raw") + else: + psu_voltage = 0.0 + + psu_voltage = (float(psu_voltage)*1.25)/1000 + + return psu_voltage + + def get_current(self): + """ + Retrieves present electric current supplied by PSU + + Returns: + A float number, the electric current in amperes, e.g 15.4 + """ + num_psus = self._get_active_psus() + if(self.get_status()): + psu_current = self._read_sysfs_file(INA230_DIR+"in_current3_raw") + psu_current = ((float(psu_current)*0.5)/1000)/num_psus + else: + psu_current = 0.0 + + return psu_current + + def get_power(self): + """ + Retrieves current energy supplied by PSU + + Returns: + A float number, the power in watts, e.g. 302.6 + """ + psu_voltage = self.get_voltage() + psu_current = self.get_current() + psu_power = psu_voltage * psu_current + + return psu_power + + def get_position_in_parent(self): + """ + Retrieves 1-based relative physical position in parent device + Returns: + integer: The 1-based relative physical position in parent device + """ + return self.index + + def get_voltage_high_threshold(self): + """ + Retrieves the high threshold PSU voltage output + + Returns: + A float number, the high threshold output voltage in volts, + e.g. 12.1 + """ + return self.MAX_VOLTAGE + + def get_voltage_low_threshold(self): + """ + Retrieves the low threshold PSU voltage output + + Returns: + A float number, the low threshold output voltage in volts, + e.g. 12.1 + """ + return self.MIN_VOLTAGE + + def is_replaceable(self): + """ + Indicate whether this device is replaceable. + Returns: + bool: True if it is replaceable. + """ + return False + + def get_powergood_status(self): + """ + Retrieves the powergood status of PSU + Returns: + A boolean, True if PSU has stablized its output voltages and + passed all its internal self-tests, False if not. + """ + psu_sysfs_str=PSU_GPIO_DIR[self.index-1] + psu_pg_status = self._read_sysfs_file(psu_sysfs_str) + + if psu_pg_status == '1': + return True + + return False + + def get_status_led(self): + """ + Gets the state of the PSU status LED + + Returns: + A string, one of the predefined STATUS_LED_COLOR_* strings. + """ + if self.get_powergood_status(): + return self.STATUS_LED_COLOR_GREEN + else: + return self.STATUS_LED_COLOR_OFF + + def set_status_led(self, color): + """ + Sets the state of the PSU status LED + Args: + color: A string representing the color with which to set the + PSU status LED + Returns: + bool: True if status LED state is set successfully, False if + not + """ + # No Individual Status LED + return False + + def get_status_master_led(self): + """ + Gets the state of the front panel PSU status LED + + Returns: + A string, one of the predefined STATUS_LED_COLOR_* strings. + """ + psu_led = self._read_sysfs_file(CPLD_DIR+"psu_led") + + if psu_led == "green": + return self.STATUS_LED_COLOR_GREEN + elif psu_led == "amber": + return self.STATUS_LED_COLOR_AMBER + else: + return None + + def set_status_master_led(self, color): + """ + Sets the state of the front panel PSU status LED + + Returns: + bool: True if status LED state is set successfully, False if + not + """ + if color == self.STATUS_LED_COLOR_GREEN: + status = self._write_sysfs_file(CPLD_DIR+"psu_led", "green") + elif color == self.STATUS_LED_COLOR_AMBER: + status = self._write_sysfs_file(CPLD_DIR+"psu_led", "amber") + else: + return False + + if status == "ERR": + return False + + return True diff --git a/platform/nokia-vs/sonic-platform-nokia/7215-c1/sonic_platform/sfp.py b/platform/nokia-vs/sonic-platform-nokia/7215-c1/sonic_platform/sfp.py new file mode 100644 index 00000000000..68510f315a8 --- /dev/null +++ b/platform/nokia-vs/sonic-platform-nokia/7215-c1/sonic_platform/sfp.py @@ -0,0 +1,211 @@ +# Name: sfp.py, version: 1.0 +# +# Description: Module contains the definitions of SFP related APIs +# for Nokia IXS 7215 platform. +# +# Copyright (c) 2026, Nokia +# All rights reserved. +# + +try: + import os + from sonic_platform_base.sonic_xcvr.sfp_optoe_base import SfpOptoeBase + from sonic_py_common.logger import Logger + from sonic_py_common import device_info + from sonic_py_common.general import getstatusoutput_noshell + +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +import subprocess as cmd + +COPPER_TYPE = "COPPER" +SFP_TYPE = "SFP" + +CPLD_DIR = "/sys/bus/i2c/devices/0-0041/" +logger = Logger() + +class Sfp(SfpOptoeBase): + """ + Nokia Platform-specific Sfp refactor class + """ + instances = [] + + # Paths + PLATFORM_ROOT_PATH = "/usr/share/sonic/device" + PMON_HWSKU_PATH = "/usr/share/sonic/hwsku" + HOST_CHK_CMD = "docker > /dev/null 2>&1" + + PLATFORM = "arm64-nokia_ixs7215_c1xa-r0" + HWSKU = "Nokia-7215" + + port_to_i2c_mapping = 0 + + # def __init__(self, index, sfp_type, stub): + def __init__(self, index, sfp_type, eeprom_path, port_i2c_map): + SfpOptoeBase.__init__(self) + + self.index = index + self.port_num = index + self.sfp_type = sfp_type + self.eeprom_path = eeprom_path + self.port_to_i2c_mapping = port_i2c_map + self.name = sfp_type + str(index-1) + self.port_name = sfp_type + str(index) + self.port_to_eeprom_mapping = {} + + self.port_to_eeprom_mapping[index] = eeprom_path + + self._version_info = device_info.get_sonic_version_info() + self.lastPresence = False + + logger.log_debug("Sfp __init__ index {} setting name to {} and eeprom_path to {}".format(index, self.name, self.eeprom_path)) + + Sfp.instances.append(self) + + def _read_sysfs_file(self, sysfs_file): + # On successful read, returns the value read from given + # reg_name and on failure returns 'ERR' + rv = 'ERR' + + if (not os.path.isfile(sysfs_file)): + return rv + try: + with open(sysfs_file, 'r') as fd: + rv = fd.read() + except Exception as e: + rv = 'ERR' + + rv = rv.rstrip('\r\n') + rv = rv.lstrip(" ") + return rv + + def get_eeprom_path(self): + return self.eeprom_path + + def get_presence(self): + """ + Retrieves the presence + Returns: + bool: True if is present, False if not + """ + if self.sfp_type == COPPER_TYPE: + return False + sfpstatus = self._read_sysfs_file(CPLD_DIR+"sfp{}_present".format(self.index)) + if sfpstatus == '1': + return True + + return False + + def get_name(self): + """ + Retrieves the name of the device + Returns: + string: The name of the device + """ + return self.name + + def get_position_in_parent(self): + """ + Retrieves 1-based relative physical position in parent device. + Returns: + integer: The 1-based relative physical position in parent device or + -1 if cannot determine the position + """ + return -1 + + def is_replaceable(self): + """ + Indicate whether this device is replaceable. + Returns: + bool: True if it is replaceable. + """ + + if self.sfp_type == "SFP": + return True + else: + return False + + def _get_error_code(self): + """ + Get error code of the SFP module + + Returns: + The error code + """ + return NotImplementedError + + def get_error_description(self): + """ + Get error description + + Args: + error_code: The error code returned by _get_error_code + + Returns: + The error description + """ + if not self.get_presence(): + error_description = self.SFP_STATUS_UNPLUGGED + else: + error_description = self.SFP_STATUS_OK + + return error_description + + def get_reset_status(self): + """ + Retrieves the reset status of SFP + Returns: + A Boolean, True if reset enabled, False if disabled + """ + if self.sfp_type == COPPER_TYPE: + return False + if self.sfp_type == SFP_TYPE: + return False + + def get_status(self): + """ + Retrieves the operational status of the device + """ + reset = self.get_reset_status() + + if reset is True: + status = False + else: + status = True + + return status + + def reset(self): + """ + Reset SFP. + Returns: + A boolean, True if successful, False if not + """ + # RJ45 and SFP ports not resettable + return False + + def set_lpmode(self, lpmode): + """ + Sets the lpmode (low power mode) of SFP + Args: + lpmode: A Boolean, True to enable lpmode, False to disable it + Note : lpmode can be overridden by set_power_override + Returns: + A boolean, True if lpmode is set successfully, False if not + """ + if self.sfp_type == COPPER_TYPE: + return False + if self.sfp_type == SFP_TYPE: + return False + + def get_lpmode(self): + """ + Retrieves the lpmode (low power mode) status of this SFP + Returns: + A Boolean, True if lpmode is enabled, False if disabled + """ + if self.sfp_type == COPPER_TYPE: + return False + if self.sfp_type == SFP_TYPE: + return False diff --git a/platform/nokia-vs/sonic-platform-nokia/7215-c1/sonic_platform/sfp_event.py b/platform/nokia-vs/sonic-platform-nokia/7215-c1/sonic_platform/sfp_event.py new file mode 100644 index 00000000000..37f3b49b465 --- /dev/null +++ b/platform/nokia-vs/sonic-platform-nokia/7215-c1/sonic_platform/sfp_event.py @@ -0,0 +1,119 @@ +''' +listen for the SFP change event and return to chassis. +''' +import os +import time +from sonic_py_common import logger +from sonic_py_common.general import getstatusoutput_noshell + +# system level event/error +EVENT_ON_ALL_SFP = '-1' +SYSTEM_NOT_READY = 'system_not_ready' +SYSTEM_READY = 'system_become_ready' +SYSTEM_FAIL = 'system_fail' + +# SFP PORT numbers +SFP_PORT_START = 1 +SFP_PORT_END = 2 +CPLD_DIR = "/sys/bus/i2c/devices/0-0041/" + +SYSLOG_IDENTIFIER = "sfp_event" +sonic_logger = logger.Logger(SYSLOG_IDENTIFIER) + + +class sfp_event: + ''' Listen to plugin/plugout cable events ''' + + def __init__(self): + self.handle = None + + def _read_sysfs_file(self, sysfs_file): + # On successful read, returns the value read from given + # reg_name and on failure returns 'ERR' + rv = 'ERR' + + if (not os.path.isfile(sysfs_file)): + return rv + try: + with open(sysfs_file, 'r') as fd: + rv = fd.read() + except Exception as e: + rv = 'ERR' + + rv = rv.rstrip('\r\n') + rv = rv.lstrip(" ") + return rv + + def initialize(self): + self.modprs_register = 0 + # Get Transceiver status + time.sleep(5) + self.modprs_register = self._get_transceiver_status() + sonic_logger.log_info("Initial SFP presence=%d" % self.modprs_register) + + def deinitialize(self): + if self.handle is None: + return + + def _get_transceiver_status(self): + + pos = [1, 2, 4, 8] + sfpstatus = 0 + for port in range (SFP_PORT_START,SFP_PORT_END+1): + status = self._read_sysfs_file(CPLD_DIR+"sfp{}_present".format(port)) + bit_pos = pos[port-SFP_PORT_START] + sfpstatus = sfpstatus + (bit_pos * (int(status))) + + return sfpstatus + + def check_sfp_status(self, port_change, timeout): + """ + check_sfp_status called from get_change_event, this will return correct + status of all 4 SFP ports if there is a change in any of them + """ + start_time = time.time() + port = SFP_PORT_START + forever = False + + if timeout == 0: + forever = True + elif timeout > 0: + timeout = timeout / float(1000) # Convert to secs + else: + return False, {} + end_time = start_time + timeout + + if (start_time > end_time): + return False, {} # Time wrap or possibly incorrect timeout + + while (timeout >= 0): + # Check for OIR events and return updated port_change + reg_value = self._get_transceiver_status() + if (reg_value != self.modprs_register): + changed_ports = (self.modprs_register ^ reg_value) + while (port >= SFP_PORT_START and port <= SFP_PORT_END): + # Mask off the bit corresponding to our port + mask = (1 << port-SFP_PORT_START) + if (changed_ports & mask): + # ModPrsL is active high + if reg_value & mask == 0: + port_change[port] = '0' + else: + port_change[port] = '1' + port += 1 + + # Update reg value + self.modprs_register = reg_value + return True, port_change + + if forever: + time.sleep(1) + else: + timeout = end_time - time.time() + if timeout >= 1: + time.sleep(1) # We poll at 1 second granularity + else: + if timeout > 0: + time.sleep(timeout) + return True, {} + return False, {} diff --git a/platform/nokia-vs/sonic-platform-nokia/7215-c1/sonic_platform/test/README b/platform/nokia-vs/sonic-platform-nokia/7215-c1/sonic_platform/test/README new file mode 100644 index 00000000000..3efc8fabce0 --- /dev/null +++ b/platform/nokia-vs/sonic-platform-nokia/7215-c1/sonic_platform/test/README @@ -0,0 +1 @@ +This directory contains unit tests of the Platform API 2.0 diff --git a/platform/nokia-vs/sonic-platform-nokia/7215-c1/sonic_platform/test/test-chassis.py b/platform/nokia-vs/sonic-platform-nokia/7215-c1/sonic_platform/test/test-chassis.py new file mode 100755 index 00000000000..93dfcaac3d0 --- /dev/null +++ b/platform/nokia-vs/sonic-platform-nokia/7215-c1/sonic_platform/test/test-chassis.py @@ -0,0 +1,72 @@ +#!/usr/bin/env python + +try: + import sonic_platform.platform + import sonic_platform.chassis +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +def main(): + print("-----------------") + print("Chassis Unit Test") + print("-----------------") + + chassis = sonic_platform.platform.Platform().get_chassis() + print(" Chassis name: {}".format(chassis.get_name())) + + print(" Chassis presence: {}".format(chassis.get_presence())) + + print(" Chassis model: {}".format(chassis.get_model())) + + print(" Chassis serial: {}".format(chassis.get_serial())) + + print(" Chassis revision: {}".format(chassis.get_revision())) + + print(" Chassis status: {}".format(chassis.get_status())) + + print(" Chassis base_mac: {}".format(chassis.get_base_mac())) + + print(" Chassis reboot cause: {}\n".format(chassis.get_reboot_cause())) + + print(" Chassis watchdog: {}".format(chassis.get_watchdog())) + + print(" Chassis num_components: {}".format(chassis.get_num_components())) + + print(" Chassis all_components: {}\n".format(chassis.get_all_components())) + + print(" Chassis num_modules: {}".format(chassis.get_num_modules())) + + print(" Chassis all_modules: {}\n".format(chassis.get_all_modules())) + + print(" Chassis num_fans: {}".format(chassis.get_num_fans())) + + print(" Chassis all_fans: {}\n".format(chassis.get_all_fans())) + + print(" Chassis num_psus: {}".format(chassis.get_num_psus())) + + print(" Chassis all_psus: {}\n".format(chassis.get_all_psus())) + + print(" Chassis num_thermals: {}".format(chassis.get_num_thermals())) + + print(" Chassis all_thermals: {}\n".format(chassis.get_all_thermals())) + + print(" Chassis num_sfps: {}".format(chassis.get_num_sfps())) + + print(" Chassis all_sfps: {}\n".format(chassis.get_all_sfps())) + + print(" Chassis eeprom: {}".format(chassis.get_eeprom())) + + print(" Chassis system_eeprom_info: {}\n".format(chassis.get_system_eeprom_info())) + + print(" Chassis get_status_led start : {}\n".format(chassis.get_status_led())) + chassis.set_status_led('amber') + print(" Chassis get_status_led amber: {}\n".format(chassis.get_status_led())) + chassis.set_status_led('green') + print(" Chassis get_status_led green: {}\n".format(chassis.get_status_led())) + + return + + +if __name__ == '__main__': + main() diff --git a/platform/nokia-vs/sonic-platform-nokia/7215-c1/sonic_platform/test/test-component.py b/platform/nokia-vs/sonic-platform-nokia/7215-c1/sonic_platform/test/test-component.py new file mode 100755 index 00000000000..1116cc7b585 --- /dev/null +++ b/platform/nokia-vs/sonic-platform-nokia/7215-c1/sonic_platform/test/test-component.py @@ -0,0 +1,22 @@ +#!/usr/bin/python + +from sonic_platform.chassis import Chassis + + +def main(): + print("---------------------------") + print("Chassis Component Unit Test") + print("---------------------------") + + chassis = Chassis() + + for component in chassis.get_all_components(): + print(" Name: {}".format(component.get_name())) + print(" Description: {}".format(component.get_description())) + print(" FW version: {}\n".format(component.get_firmware_version())) + + return + + +if __name__ == '__main__': + main() diff --git a/platform/nokia-vs/sonic-platform-nokia/7215-c1/sonic_platform/test/test-eeprom.py b/platform/nokia-vs/sonic-platform-nokia/7215-c1/sonic_platform/test/test-eeprom.py new file mode 100755 index 00000000000..bee72e022e8 --- /dev/null +++ b/platform/nokia-vs/sonic-platform-nokia/7215-c1/sonic_platform/test/test-eeprom.py @@ -0,0 +1,25 @@ +#!/usr/bin/python + +from sonic_platform.chassis import Chassis + + +def main(): + print("------------------------") + print("Chassis eeprom Unit Test") + print("------------------------") + + chassis = Chassis() + + eeprom = chassis.get_eeprom() + + print(" Model: {}, Service Tag: {}".format(eeprom.modelstr(), + eeprom. service_tag_str())) + print(" Part#: {}, Serial#: {}".format(eeprom.part_number_str(), + eeprom.serial_number_str())) + print(" Base MAC: {}".format(eeprom.base_mac_addr())) + + return + + +if __name__ == '__main__': + main() diff --git a/platform/nokia-vs/sonic-platform-nokia/7215-c1/sonic_platform/test/test-fan.py b/platform/nokia-vs/sonic-platform-nokia/7215-c1/sonic_platform/test/test-fan.py new file mode 100755 index 00000000000..3fbedf1231d --- /dev/null +++ b/platform/nokia-vs/sonic-platform-nokia/7215-c1/sonic_platform/test/test-fan.py @@ -0,0 +1,32 @@ +#!/usr/bin/python + +from sonic_platform.chassis import Chassis + + +def main(): + print("---------------------") + print("Chassis Fan Unit Test") + print("---------------------") + + chassis = Chassis() + + for fan in chassis.get_all_fans(): + if not fan.get_presence(): + print(" Name: {} not present".format(fan.get_name())) + else: + print(" Name:", fan.get_name()) + print(" Presence: {}, Status: {}, LED: {}".format(fan.get_presence(), + fan.get_status(), + fan.get_status_led())) + print(" Model: {}, Serial#: {}".format(fan.get_model(), + fan.get_serial())) + print(" Part#: {}, Service Tag: {}".format(fan.get_part_number(), + fan.get_service_tag())) + print(" Direction: {}, Speed: {}%, Target Speed: {}%\n".format(fan.get_direction(), + str(fan.get_speed()), + str(fan.get_target_speed()))) + return + + +if __name__ == '__main__': + main() diff --git a/platform/nokia-vs/sonic-platform-nokia/7215-c1/sonic_platform/test/test-psu.py b/platform/nokia-vs/sonic-platform-nokia/7215-c1/sonic_platform/test/test-psu.py new file mode 100755 index 00000000000..e3979b8c417 --- /dev/null +++ b/platform/nokia-vs/sonic-platform-nokia/7215-c1/sonic_platform/test/test-psu.py @@ -0,0 +1,40 @@ +#!/usr/bin/python + +from sonic_platform.chassis import Chassis + + +def main(): + print("---------------------") + print("Chassis PSU Unit Test") + print("---------------------") + + chassis = Chassis() + + for psu in chassis.get_all_psus(): + if not psu.get_presence(): + print(" Name: {} not present".format(psu.get_name())) + else: + print(" Name:", psu.get_name()) + print(" Presence: {}, Status: {}, LED: {}".format(psu.get_presence(), + psu.get_status(), + psu.get_status_led())) + print(" Model: {}, Serial#: {}, Part#: {}".format(psu.get_model(), + psu.get_serial(), + psu.get_part_number())) + try: + current = psu.get_current() + except NotImplementedError: + current = "NA" + try: + power = psu.get_power() + except NotImplementedError: + power = "NA" + + print(" Voltage: {}, Current: {}, Power: {}\n".format(psu.get_voltage(), + current, + power)) + return + + +if __name__ == '__main__': + main() diff --git a/platform/nokia-vs/sonic-platform-nokia/7215-c1/sonic_platform/test/test-sfp.py b/platform/nokia-vs/sonic-platform-nokia/7215-c1/sonic_platform/test/test-sfp.py new file mode 100755 index 00000000000..170194f6d09 --- /dev/null +++ b/platform/nokia-vs/sonic-platform-nokia/7215-c1/sonic_platform/test/test-sfp.py @@ -0,0 +1,56 @@ +#!/usr/bin/env python + +try: + from sonic_platform.chassis import Chassis +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +def main(): + print("---------------------") + print("Chassis SFP Unit Test") + print("---------------------") + + chassis = Chassis() + + PORT_START = 1 + PORT_END = 3 + + for physical_port in range(PORT_START, PORT_END+1): + print(" ") + print(" SFP transceiver tests PORT = ", physical_port) + name = chassis.get_sfp(physical_port).get_name() + print(" SFP transceiver tests NAME = ", name) + + presence = chassis.get_sfp(physical_port).get_presence() + print("TEST 1 - sfp presence [ True ] ", physical_port, presence) + + status = chassis.get_sfp(physical_port).get_reset_status() + print("TEST 2 - sfp reset status [ False ] ", physical_port, status) + + txdisable = chassis.get_sfp(physical_port).get_tx_disable() + print("TEST 3 - sfp tx_disable [ False ] ", physical_port, txdisable) + + rxlos = chassis.get_sfp(physical_port).get_rx_los() + print("TEST 4 - sfp status rxlos [ False ] ", physical_port, rxlos) + + txfault = chassis.get_sfp(physical_port).get_tx_fault() + print("TEST 5 - sfp status txfault [ False ] ", physical_port, txfault) + + lpmode = chassis.get_sfp(physical_port).get_lpmode() + print("TEST 6 - sfp enable lpmode [ False ] ", physical_port, lpmode) + + trans_info = chassis.get_sfp(physical_port).get_transceiver_info() + print("TEST 7 - sfp transceiver info for port:", physical_port, trans_info) + + trans_status = chassis.get_sfp(physical_port).get_transceiver_bulk_status() + print("TEST 8 - sfp bulk status for port:", physical_port, trans_status) + + threshold = chassis.get_sfp(physical_port).get_transceiver_threshold_info() + print("TEST 9 - sfp bulk status for port:", physical_port, threshold) + + return + + +if __name__ == '__main__': + main() diff --git a/platform/nokia-vs/sonic-platform-nokia/7215-c1/sonic_platform/test/test-thermal.py b/platform/nokia-vs/sonic-platform-nokia/7215-c1/sonic_platform/test/test-thermal.py new file mode 100755 index 00000000000..95cc8e89f0d --- /dev/null +++ b/platform/nokia-vs/sonic-platform-nokia/7215-c1/sonic_platform/test/test-thermal.py @@ -0,0 +1,50 @@ +#!/usr/bin/python + +from sonic_platform.chassis import Chassis + +def main(): + print("-------------------------") + print("Chassis Thermal Unit Test") + print("-------------------------") + + chassis = Chassis() + + for thermal in chassis.get_all_thermals(): + if not thermal.get_presence(): + print(" Name: {} not present".format(thermal.get_name())) + else: + print(" Name:", thermal.get_name()) + print(" Presence: {}, Status: {}".format(thermal.get_presence(), + thermal.get_status())) + print(" Model: {}, Serial#: {}".format(thermal.get_model(), + thermal.get_serial())) + print(" Temperature(C): {}".format(thermal.get_temperature())) + + try: + low_thresh = thermal.get_low_threshold() + except NotImplementedError: + low_thresh = "NA" + try: + high_thresh = thermal.get_high_threshold() + except NotImplementedError: + high_thresh = "NA" + + print(" Low Threshold(C): {}, High Threshold(C): {}".format(low_thresh, + high_thresh)) + + try: + crit_low_thresh = thermal.get_low_critical_threshold() + except NotImplementedError: + crit_low_thresh = "NA" + try: + crit_high_thresh = thermal.get_high_critical_threshold() + except NotImplementedError: + crit_high_thresh = "NA" + + print(" Crit Low Threshold(C): {}, Crit High Threshold(C): {}\n".format(crit_low_thresh, + crit_high_thresh)) + return + + +if __name__ == '__main__': + main() diff --git a/platform/nokia-vs/sonic-platform-nokia/7215-c1/sonic_platform/test/test-watchdog.py b/platform/nokia-vs/sonic-platform-nokia/7215-c1/sonic_platform/test/test-watchdog.py new file mode 100755 index 00000000000..20805e04ed2 --- /dev/null +++ b/platform/nokia-vs/sonic-platform-nokia/7215-c1/sonic_platform/test/test-watchdog.py @@ -0,0 +1,22 @@ +#!/usr/bin/python + +from sonic_platform.chassis import Chassis + + +def main(): + print("---------------------") + print("Chassis Watchdog Test") + print("---------------------") + + chassis = Chassis() + + watchdog = chassis.get_watchdog() + + print(" Armed: {}".format(watchdog.is_armed())) + print(" Time Left: {}".format(watchdog.get_remaining_time())) + + return + + +if __name__ == '__main__': + main() diff --git a/platform/nokia-vs/sonic-platform-nokia/7215-c1/sonic_platform/thermal.py b/platform/nokia-vs/sonic-platform-nokia/7215-c1/sonic_platform/thermal.py new file mode 100644 index 00000000000..69e48998cea --- /dev/null +++ b/platform/nokia-vs/sonic-platform-nokia/7215-c1/sonic_platform/thermal.py @@ -0,0 +1,274 @@ +######################################################################## +# +# Module contains an implementation of SONiC Platform Base API and +# provides the Thermals' information which are available in the platform +# +######################################################################## + + +try: + import glob + import os + from sonic_platform_base.thermal_base import ThermalBase + from swsscommon.swsscommon import SonicV2Connector + from sonic_py_common import logger +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +sonic_logger = logger.Logger('thermal') +FPGA_DIR = "/sys/bus/pci/devices/0000:01:00.0/" + +CN9130_THERMAL_MISC_DIR = "/sys/devices/virtual/misc/cn9130_thermal/" + + +def _resolve_cn9130_thermal_dir(): + matches = sorted(glob.glob(CN9130_THERMAL_MISC_DIR + "hwmon*/")) + if matches: + return matches[0] + return None + + +class Thermal(ThermalBase): + """Nokia platform-specific Thermal class""" + + I2C_CLASS_DIR = "/sys/bus/i2c/devices/" + I2C_DEV_MAPPING = (['0-0048/hwmon/', 1], + ['0-0049/hwmon/', 1], + ['0-004a/hwmon/', 1]) + + + THERMAL_NAME = ("PCB BACK", "PCB FRONT", "PCB MID", "FPGA", "CPU CORE") + + def __init__(self, thermal_index): + ThermalBase.__init__(self) + self.index = thermal_index + 1 + self.is_psu_thermal = False + self.dependency = None + self._minimum = None + self._maximum = None + self.thermal_high_threshold_file = None + # PCB temperature sensors + if self.index < 4: + i2c_path = self.I2C_CLASS_DIR + self.I2C_DEV_MAPPING[self.index - 1][0] + sensor_index = self.I2C_DEV_MAPPING[self.index - 1][1] + sensor_high_suffix = "max" + sensor_high_crit_suffix = None + hwmon_node = os.listdir(i2c_path)[0] + self.SENSOR_DIR = i2c_path + hwmon_node + '/' + + #FPGA temperature sensor + elif self.index == 4: + sensor_high_suffix = None + sensor_high_crit_suffix = None + self.sensor_high_threshold = 100.0 + self.sensor_crit_threshold = 110.0 + self.SENSOR_DIR = None + + elif self.index == 5: + sensor_index = 1 + sensor_high_suffix = "crit" + sensor_high_crit_suffix = "max" + self.SENSOR_DIR = _resolve_cn9130_thermal_dir() + if self.SENSOR_DIR is None: + sonic_logger.log_warning( + "cn9130_thermal hwmon node not found under {}".format( + CN9130_THERMAL_MISC_DIR)) + + if self.SENSOR_DIR: + self.thermal_temperature_file = self.SENSOR_DIR \ + + "temp{}_input".format(sensor_index) + + if sensor_high_suffix: + self.thermal_high_threshold_file = self.SENSOR_DIR \ + + "temp{}_{}".format(sensor_index, sensor_high_suffix) + else: + self.thermal_high_threshold_file = None + + if sensor_high_crit_suffix: + self.thermal_high_crit_threshold_file = self.SENSOR_DIR \ + + "temp{}_{}".format(sensor_index, sensor_high_crit_suffix) + else: + self.thermal_high_crit_threshold_file = None + + def _read_sysfs_file(self, sysfs_file): + # On successful read, returns the value read from given + # sysfs_file and on failure returns 'ERR' + rv = 'ERR' + + if (not os.path.isfile(sysfs_file)): + return rv + + try: + with open(sysfs_file, 'r') as fd: + rv = fd.read() + except Exception as e: + rv = 'ERR' + + rv = rv.rstrip('\r\n') + rv = rv.lstrip(" ") + return rv + + def get_name(self): + """ + Retrieves the name of the thermal + + Returns: + string: The name of the thermal + """ + return self.THERMAL_NAME[self.index - 1] + + def get_presence(self): + """ + Retrieves the presence of the thermal + + Returns: + bool: True if thermal is present, False if not + """ + if self.dependency: + return self.dependency.get_presence() + else: + return True + + def get_model(self): + """ + Retrieves the model number (or part number) of the Thermal + + Returns: + string: Model/part number of Thermal + """ + return 'NA' + + def get_serial(self): + """ + Retrieves the serial number of the Thermal + + Returns: + string: Serial number of Thermal + """ + return 'NA' + + def get_status(self): + """ + Retrieves the operational status of the thermal + + Returns: + A boolean value, True if thermal is operating properly, + False if not + """ + if self.dependency: + return self.dependency.get_status() + else: + return True + + def get_temperature(self): + """ + Retrieves current temperature reading from thermal + + Returns: + A float number of current temperature in Celsius up to + nearest thousandth of one degree Celsius, e.g. 30.125 + """ + + if self.index == 4: + thermal_temperature = self._read_sysfs_file(FPGA_DIR + "temp_cur") + if (thermal_temperature != 'ERR'): + thermal_temperature = float(thermal_temperature) + else: + thermal_temperature = 0 + else: + thermal_temperature = self._read_sysfs_file(self.thermal_temperature_file) + if (thermal_temperature != 'ERR'): + thermal_temperature = float(thermal_temperature) / 1000 + else: + thermal_temperature = 0 + + if self._minimum is None or self._minimum > thermal_temperature: + self._minimum = thermal_temperature + if self._maximum is None or self._maximum < thermal_temperature: + self._maximum = thermal_temperature + + return float("{:.3f}".format(thermal_temperature)) + + def get_high_threshold(self): + """ + Retrieves the high threshold temperature of thermal + + Returns: + A float number, the high threshold temperature of thermal in + Celsius up to nearest thousandth of one degree Celsius, + e.g. 30.125 + """ + if self.index == 4: + return float("{:.3f}".format(self.sensor_high_threshold)) + # Not implemented for this sensor + if not self.thermal_high_threshold_file: + raise NotImplementedError + + thermal_high_threshold = self._read_sysfs_file(self.thermal_high_threshold_file) + if (thermal_high_threshold != 'ERR'): + thermal_high_threshold = float(thermal_high_threshold) / 1000 + else: + thermal_high_threshold = 0.0 + + return float("{:.3f}".format(thermal_high_threshold)) + + def set_high_threshold(self, temperature): + """ + Sets the high threshold temperature of thermal + + Args : + temperature: A float number up to nearest thousandth of one + degree Celsius, e.g. 30.125 + Returns: + A boolean, True if threshold is set successfully, False if + not + """ + # Thermal threshold values are pre-defined based on HW. + return False + + def get_high_critical_threshold(self): + """ + Retrieves the high critical threshold temperature of thermal + + Returns: + A float number, the high critical threshold temperature of thermal in Celsius + up to nearest thousandth of one degree Celsius, e.g. 30.125 + """ + if self.index == 4: + return float("{:.3f}".format(self.sensor_crit_threshold)) + # Not implemented for this sensor + if not self.thermal_high_crit_threshold_file: + raise NotImplementedError + + thermal_high_crit_threshold = self._read_sysfs_file( + self.thermal_high_crit_threshold_file) + if (thermal_high_crit_threshold != 'ERR'): + thermal_high_crit_threshold = float(thermal_high_crit_threshold) / 1000 + else: + thermal_high_crit_threshold = 0.0 + + return float("{:.3f}".format(thermal_high_crit_threshold)) + + def get_minimum_recorded(self): + self.get_temperature() + return self._minimum + + def get_maximum_recorded(self): + self.get_temperature() + return self._maximum + + def get_position_in_parent(self): + """ + Retrieves 1-based relative physical position in parent device + Returns: + integer: The 1-based relative physical position in parent device + """ + return self.index + + def is_replaceable(self): + """ + Indicate whether this device is replaceable. + Returns: + bool: True if it is replaceable. + """ + return False diff --git a/platform/nokia-vs/sonic-platform-nokia/7215-c1/sonic_platform/thermal_actions.py b/platform/nokia-vs/sonic-platform-nokia/7215-c1/sonic_platform/thermal_actions.py new file mode 100644 index 00000000000..4dc9b6ab5b4 --- /dev/null +++ b/platform/nokia-vs/sonic-platform-nokia/7215-c1/sonic_platform/thermal_actions.py @@ -0,0 +1,222 @@ +from sonic_platform_base.sonic_thermal_control.thermal_action_base import ThermalPolicyActionBase +from sonic_platform_base.sonic_thermal_control.thermal_json_object import thermal_json_object + +from sonic_py_common import logger + +sonic_logger = logger.Logger('thermal_actions') + + +class SetFanSpeedAction(ThermalPolicyActionBase): + """ + Base thermal action class to set speed for fans + """ + # JSON field definition + JSON_FIELD_SPEED = 'speed' + JSON_FIELD_DEFAULT_SPEED = 'default_speed' + JSON_FIELD_THRESHOLD1_SPEED = 'threshold1_speed' + JSON_FIELD_THRESHOLD2_SPEED = 'threshold2_speed' + JSON_FIELD_HIGHTEMP_SPEED = 'hightemp_speed' + + def __init__(self): + """ + Constructor of SetFanSpeedAction + """ + self.default_speed = 25 + self.threshold1_speed=40 + self.threshold2_speed=75 + self.hightemp_speed = 100 + self.speed = self.default_speed + + def load_from_json(self, json_obj): + """ + Construct SetFanSpeedAction via JSON. JSON example: + { + "type": "fan.all.set_speed" + "speed": "100" + } + :param json_obj: A JSON object representing a SetFanSpeedAction action. + :return: + """ + if SetFanSpeedAction.JSON_FIELD_SPEED in json_obj: + speed = float(json_obj[SetFanSpeedAction.JSON_FIELD_SPEED]) + if speed < 0 or speed > 100: + raise ValueError('SetFanSpeedAction invalid speed value {} in JSON policy file, valid value should be [0, 100]'. + format(speed)) + self.speed = float(json_obj[SetFanSpeedAction.JSON_FIELD_SPEED]) + else: + raise ValueError('SetFanSpeedAction missing mandatory field {} in JSON policy file'. + format(SetFanSpeedAction.JSON_FIELD_SPEED)) + + @classmethod + def set_all_fan_speed(cls, thermal_info_dict, speed): + from .thermal_infos import FanInfo + if FanInfo.INFO_NAME in thermal_info_dict and isinstance(thermal_info_dict[FanInfo.INFO_NAME], FanInfo): + fan_info_obj = thermal_info_dict[FanInfo.INFO_NAME] + for fan in fan_info_obj.get_presence_fans(): + fan.set_speed(int(speed)) + + +@thermal_json_object('fan.all.set_speed') +class SetAllFanSpeedAction(SetFanSpeedAction): + """ + Action to set speed for all fans + """ + def execute(self, thermal_info_dict): + """ + Set speed for all fans + :param thermal_info_dict: A dictionary stores all thermal information. + :return: + """ + SetAllFanSpeedAction.set_all_fan_speed(thermal_info_dict, self.speed) + + +@thermal_json_object('thermal.temp_check_and_set_all_fan_speed') +class ThermalRecoverAction(SetFanSpeedAction): + """ + Action to check thermal sensor temperature change status and set speed for all fans + """ + + def load_from_json(self, json_obj): + """ + Construct ThermalRecoverAction via JSON. JSON example: + { + "type": "thermal.temp_check_and_set_all_fan_speed" + "default_speed": "25", + "threshold1_speed": "40", + "threshold2_speed": "75", + "hightemp_speed": "100" + } + :param json_obj: A JSON object representing a ThermalRecoverAction action. + :return: + """ + if SetFanSpeedAction.JSON_FIELD_DEFAULT_SPEED in json_obj: + default_speed = float(json_obj[SetFanSpeedAction.JSON_FIELD_DEFAULT_SPEED]) + if default_speed < 0 or default_speed > 100: + raise ValueError('SetFanSpeedAction invalid default speed value {} in JSON policy file, valid value should be [0, 100]'. + format(default_speed)) + self.default_speed = float(json_obj[SetFanSpeedAction.JSON_FIELD_DEFAULT_SPEED]) + else: + raise ValueError('SetFanSpeedAction missing mandatory field {} in JSON policy file'. + format(SetFanSpeedAction.JSON_FIELD_DEFAULT_SPEED)) + + if SetFanSpeedAction.JSON_FIELD_THRESHOLD1_SPEED in json_obj: + threshold1_speed = float(json_obj[SetFanSpeedAction.JSON_FIELD_THRESHOLD1_SPEED]) + if threshold1_speed < 0 or threshold1_speed > 100: + raise ValueError('SetFanSpeedAction invalid default speed value {} in JSON policy file, valid value should be [0, 100]'. + format(threshold1_speed)) + self.threshold1_speed = float(json_obj[SetFanSpeedAction.JSON_FIELD_THRESHOLD1_SPEED]) + else: + raise ValueError('SetFanSpeedAction missing mandatory field {} in JSON policy file'. + format(SetFanSpeedAction.JSON_FIELD_THRESHOLD1_SPEED)) + + if SetFanSpeedAction.JSON_FIELD_THRESHOLD2_SPEED in json_obj: + threshold2_speed = float(json_obj[SetFanSpeedAction.JSON_FIELD_THRESHOLD2_SPEED]) + if threshold2_speed < 0 or threshold2_speed > 100: + raise ValueError('SetFanSpeedAction invalid default speed value {} in JSON policy file, valid value should be [0, 100]'. + format(threshold2_speed)) + self.threshold2_speed = float(json_obj[SetFanSpeedAction.JSON_FIELD_THRESHOLD2_SPEED]) + else: + raise ValueError('SetFanSpeedAction missing mandatory field {} in JSON policy file'. + format(SetFanSpeedAction.JSON_FIELD_THRESHOLD2_SPEED)) + + if SetFanSpeedAction.JSON_FIELD_HIGHTEMP_SPEED in json_obj: + hightemp_speed = float(json_obj[SetFanSpeedAction.JSON_FIELD_HIGHTEMP_SPEED]) + if hightemp_speed < 0 or hightemp_speed > 100: + raise ValueError('SetFanSpeedAction invalid hightemp speed value {} in JSON policy file, valid value should be [0, 100]'. + format(hightemp_speed)) + self.hightemp_speed = float(json_obj[SetFanSpeedAction.JSON_FIELD_HIGHTEMP_SPEED]) + else: + raise ValueError('SetFanSpeedAction missing mandatory field {} in JSON policy file'. + format(SetFanSpeedAction.JSON_FIELD_HIGHTEMP_SPEED)) + + sonic_logger.log_warning("ThermalRecoverAction: default: {}, threshold1: {}, threshold2: {}, hightemp: {}".format(self.default_speed, self.threshold1_speed, self.threshold2_speed, self.hightemp_speed)) + + def execute(self, thermal_info_dict): + """ + Check check thermal sensor temperature change status and set speed for all fans + :param thermal_info_dict: A dictionary stores all thermal information. + :return: + """ + from .thermal_infos import ThermalInfo + if ThermalInfo.INFO_NAME in thermal_info_dict and \ + isinstance(thermal_info_dict[ThermalInfo.INFO_NAME], ThermalInfo): + + thermal_info_obj = thermal_info_dict[ThermalInfo.INFO_NAME] + if thermal_info_obj.is_set_fan_high_temp_speed(): + ThermalRecoverAction.set_all_fan_speed(thermal_info_dict, self.hightemp_speed) + elif thermal_info_obj.is_set_fan_threshold_two_speed(): + ThermalRecoverAction.set_all_fan_speed(thermal_info_dict, self.threshold2_speed) + elif thermal_info_obj.is_set_fan_threshold_one_speed(): + ThermalRecoverAction.set_all_fan_speed(thermal_info_dict, self.threshold1_speed) + elif thermal_info_obj.is_set_fan_default_speed(): + ThermalRecoverAction.set_all_fan_speed(thermal_info_dict, self.default_speed) + + +@thermal_json_object('switch.shutdown') +class SwitchPolicyAction(ThermalPolicyActionBase): + """ + Base class for thermal action. Once all thermal conditions in a thermal policy are matched, + all predefined thermal action will be executed. + """ + def execute(self, thermal_info_dict): + """ + Take action when thermal condition matches. For example, adjust speed of fan or shut + down the switch. + :param thermal_info_dict: A dictionary stores all thermal information. + :return: + """ + sonic_logger.log_warning("Alarm for temperature critical is detected, reboot Device") + # import os + # os.system('reboot') + + +@thermal_json_object('thermal_control.control') +class ControlThermalAlgoAction(ThermalPolicyActionBase): + """ + Action to control the thermal control algorithm + """ + # JSON field definition + JSON_FIELD_STATUS = 'status' + + def __init__(self): + self.status = True + + def load_from_json(self, json_obj): + """ + Construct ControlThermalAlgoAction via JSON. JSON example: + { + "type": "thermal_control.control" + "status": "true" + } + :param json_obj: A JSON object representing a ControlThermalAlgoAction action. + :return: + """ + if ControlThermalAlgoAction.JSON_FIELD_STATUS in json_obj: + status_str = json_obj[ControlThermalAlgoAction.JSON_FIELD_STATUS].lower() + if status_str == 'true': + self.status = True + elif status_str == 'false': + self.status = False + else: + raise ValueError('Invalid {} field value, please specify true of false'. + format(ControlThermalAlgoAction.JSON_FIELD_STATUS)) + else: + raise ValueError('ControlThermalAlgoAction ' + 'missing mandatory field {} in JSON policy file'. + format(ControlThermalAlgoAction.JSON_FIELD_STATUS)) + + def execute(self, thermal_info_dict): + """ + Disable thermal control algorithm + :param thermal_info_dict: A dictionary stores all thermal information. + :return: + """ + from .thermal_infos import ChassisInfo + if ChassisInfo.INFO_NAME in thermal_info_dict: + chassis_info_obj = thermal_info_dict[ChassisInfo.INFO_NAME] + chassis = chassis_info_obj.get_chassis() + thermal_manager = chassis.get_thermal_manager() + if self.status: + thermal_manager.start_thermal_control_algorithm() + else: + thermal_manager.stop_thermal_control_algorithm() diff --git a/platform/nokia-vs/sonic-platform-nokia/7215-c1/sonic_platform/thermal_conditions.py b/platform/nokia-vs/sonic-platform-nokia/7215-c1/sonic_platform/thermal_conditions.py new file mode 100644 index 00000000000..4923d63d746 --- /dev/null +++ b/platform/nokia-vs/sonic-platform-nokia/7215-c1/sonic_platform/thermal_conditions.py @@ -0,0 +1,81 @@ +from sonic_platform_base.sonic_thermal_control.thermal_condition_base import ThermalPolicyConditionBase +from sonic_platform_base.sonic_thermal_control.thermal_json_object import thermal_json_object + + +class FanCondition(ThermalPolicyConditionBase): + def get_fan_info(self, thermal_info_dict): + from .thermal_infos import FanInfo + if FanInfo.INFO_NAME in thermal_info_dict and isinstance(thermal_info_dict[FanInfo.INFO_NAME], FanInfo): + return thermal_info_dict[FanInfo.INFO_NAME] + else: + return None + + +@thermal_json_object('fan.any.absence') +class AnyFanAbsenceCondition(FanCondition): + def is_match(self, thermal_info_dict): + fan_info_obj = self.get_fan_info(thermal_info_dict) + return len(fan_info_obj.get_absence_fans()) > 0 if fan_info_obj else False + + +@thermal_json_object('fan.all.absence') +class AllFanAbsenceCondition(FanCondition): + def is_match(self, thermal_info_dict): + fan_info_obj = self.get_fan_info(thermal_info_dict) + return len(fan_info_obj.get_presence_fans()) == 0 if fan_info_obj else False + + +@thermal_json_object('fan.all.presence') +class AllFanPresenceCondition(FanCondition): + def is_match(self, thermal_info_dict): + fan_info_obj = self.get_fan_info(thermal_info_dict) + return len(fan_info_obj.get_absence_fans()) == 0 if fan_info_obj else False + + +class ThermalCondition(ThermalPolicyConditionBase): + def get_thermal_info(self, thermal_info_dict): + from .thermal_infos import ThermalInfo + if ThermalInfo.INFO_NAME in thermal_info_dict and isinstance(thermal_info_dict[ThermalInfo.INFO_NAME], ThermalInfo): + return thermal_info_dict[ThermalInfo.INFO_NAME] + else: + return None + + +@thermal_json_object('thermal.over.high_critical_threshold') +class ThermalOverHighCriticalCondition(ThermalCondition): + def is_match(self, thermal_info_dict): + thermal_info_obj = self.get_thermal_info(thermal_info_dict) + if thermal_info_obj: + return thermal_info_obj.is_over_high_critical_threshold() + else: + return False + + +class PsuCondition(ThermalPolicyConditionBase): + def get_psu_info(self, thermal_info_dict): + from .thermal_infos import PsuInfo + if PsuInfo.INFO_NAME in thermal_info_dict and isinstance(thermal_info_dict[PsuInfo.INFO_NAME], PsuInfo): + return thermal_info_dict[PsuInfo.INFO_NAME] + else: + return None + + +@thermal_json_object('psu.any.absence') +class AnyPsuAbsenceCondition(PsuCondition): + def is_match(self, thermal_info_dict): + psu_info_obj = self.get_psu_info(thermal_info_dict) + return len(psu_info_obj.get_absence_psus()) > 0 if psu_info_obj else False + + +@thermal_json_object('psu.all.absence') +class AllPsuAbsenceCondition(PsuCondition): + def is_match(self, thermal_info_dict): + psu_info_obj = self.get_psu_info(thermal_info_dict) + return len(psu_info_obj.get_presence_psus()) == 0 if psu_info_obj else False + + +@thermal_json_object('psu.all.presence') +class AllPsuPresenceCondition(PsuCondition): + def is_match(self, thermal_info_dict): + psu_info_obj = self.get_psu_info(thermal_info_dict) + return len(psu_info_obj.get_absence_psus()) == 0 if psu_info_obj else False diff --git a/platform/nokia-vs/sonic-platform-nokia/7215-c1/sonic_platform/thermal_infos.py b/platform/nokia-vs/sonic-platform-nokia/7215-c1/sonic_platform/thermal_infos.py new file mode 100644 index 00000000000..ab78797ec78 --- /dev/null +++ b/platform/nokia-vs/sonic-platform-nokia/7215-c1/sonic_platform/thermal_infos.py @@ -0,0 +1,260 @@ +from sonic_platform_base.sonic_thermal_control.thermal_info_base import ThermalPolicyInfoBase +from sonic_platform_base.sonic_thermal_control.thermal_json_object import thermal_json_object +from sonic_py_common.logger import Logger + +logger = Logger() + +@thermal_json_object('fan_info') +class FanInfo(ThermalPolicyInfoBase): + """ + Fan information needed by thermal policy + """ + + # Fan information name + INFO_NAME = 'fan_info' + + def __init__(self): + self._absence_fans = set() + self._presence_fans = set() + self._status_changed = False + + def collect(self, chassis): + """ + Collect absence and presence fans. + :param chassis: The chassis object + :return: + """ + self._status_changed = False + for fan in chassis.get_all_fans(): + if fan.get_presence() and fan not in self._presence_fans: + self._presence_fans.add(fan) + self._status_changed = True + if fan in self._absence_fans: + self._absence_fans.remove(fan) + elif not fan.get_presence() and fan not in self._absence_fans: + self._absence_fans.add(fan) + self._status_changed = True + if fan in self._presence_fans: + self._presence_fans.remove(fan) + + def get_absence_fans(self): + """ + Retrieves absence fans + :return: A set of absence fans + """ + return self._absence_fans + + def get_presence_fans(self): + """ + Retrieves presence fans + :return: A set of presence fans + """ + return self._presence_fans + + def is_status_changed(self): + """ + Retrieves if the status of fan information changed + :return: True if status changed else False + """ + return self._status_changed + + +@thermal_json_object('thermal_info') +class ThermalInfo(ThermalPolicyInfoBase): + """ + Thermal information needed by thermal policy + """ + + # Fan information name + INFO_NAME = 'thermal_info' + + def __init__(self): + self._old_threshold_level = -1 + self._current_threshold_level = 0 + self._num_fan_levels = 3 + self._high_crital_threshold = 75 + #THERMAL_NAME ("PCB BACK", "PCB FRONT", "PCB MID", "FPGA", "CPU CORE") + self._f2b_level_up_threshold = [[54,41,42,70,85], + [56,45,46,73,87], + [59,51,51,76,94]] + + self._f2b_level_down_threshold = [[49,39,39,70,78], + [51,43,43,70,79], + [56,49,49,70,90]] + + def collect(self, chassis): + """ + Collect thermal sensor temperature change status + :param chassis: The chassis object + :return: + """ + self._temps = [] + self._over_high_critical_threshold = False + self._set_fan_default_speed = False + self._set_fan_threshold_one_speed = False + self._set_fan_threshold_two_speed = False + self._set_fan_high_temp_speed = False + + # Calculate average temp within the device + num_of_thermals = chassis.get_num_thermals() + for index in range(num_of_thermals): + self._temps.insert(index, chassis.get_thermal(index).get_temperature()) + + fan_direction=chassis.get_fan(1).get_direction() + if(fan_direction == "intake"): + level_up_threshold=self._f2b_level_up_threshold + level_down_threshold=self._f2b_level_down_threshold + + # Find current required threshold level + max_level =0 + min_level = [self._num_fan_levels for i in range(num_of_thermals)] + for index in range(num_of_thermals): + for level in range(self._num_fan_levels): + + if self._temps[index]>level_up_threshold[level][index]: + if max_levellevel: + min_level[index]=level + + max_of_min_level=max(min_level) + + #compare with running threshold level + if max_of_min_level > self._old_threshold_level: + max_of_min_level=self._old_threshold_level + + self._current_threshold_level = max(max_of_min_level,max_level) + + #set fan to max speed if one fan is down + for fan in chassis.get_all_fans(): + if not fan.get_status() : + self._current_threshold_level = 3 + + # Decide fan speed based on threshold level + + if self._current_threshold_level != self._old_threshold_level: + if self._current_threshold_level == 0: + self._set_fan_default_speed = True + elif self._current_threshold_level == 1: + self._set_fan_threshold_one_speed = True + elif self._current_threshold_level == 2: + self._set_fan_threshold_two_speed = True + elif self._current_threshold_level == 3: + self._set_fan_high_temp_speed = True + + self._old_threshold_level=self._current_threshold_level + + def is_set_fan_default_speed(self): + """ + Retrieves if the temperature is warm up and over high threshold + :return: True if the temperature is warm up and over high threshold else False + """ + return self._set_fan_default_speed + + def is_set_fan_threshold_one_speed(self): + """ + Retrieves if the temperature is warm up and over high threshold + :return: True if the temperature is warm up and over high threshold else False + """ + return self._set_fan_threshold_one_speed + + def is_set_fan_threshold_two_speed(self): + """ + Retrieves if the temperature is warm up and over high threshold + :return: True if the temperature is warm up and over high threshold else False + """ + return self._set_fan_threshold_two_speed + + def is_set_fan_high_temp_speed(self): + """ + Retrieves if the temperature is warm up and over high threshold + :return: True if the temperature is warm up and over high threshold else False + """ + return self._set_fan_high_temp_speed + + def is_over_high_critical_threshold(self): + """ + Retrieves if the temperature is over high critical threshold + :return: True if the temperature is over high critical threshold else False + """ + return self._over_high_critical_threshold + + +@thermal_json_object('psu_info') +class PsuInfo(ThermalPolicyInfoBase): + """ + PSU information needed by thermal policy + """ + INFO_NAME = 'psu_info' + + def __init__(self): + self._absence_psus = set() + self._presence_psus = set() + self._status_changed = False + + def collect(self, chassis): + """ + Collect absence and presence PSUs. + :param chassis: The chassis object + :return: + """ + self._status_changed = False + for psu in chassis.get_all_psus(): + if psu.get_presence() and psu.get_powergood_status() and psu not in self._presence_psus: + self._presence_psus.add(psu) + self._status_changed = True + if psu in self._absence_psus: + self._absence_psus.remove(psu) + elif (not psu.get_presence() or not psu.get_powergood_status()) and psu not in self._absence_psus: + self._absence_psus.add(psu) + self._status_changed = True + if psu in self._presence_psus: + self._presence_psus.remove(psu) + + def get_absence_psus(self): + """ + Retrieves presence PSUs + :return: A set of absence PSUs + """ + return self._absence_psus + + def get_presence_psus(self): + """ + Retrieves presence PSUs + :return: A set of presence fans + """ + return self._presence_psus + + def is_status_changed(self): + """ + Retrieves if the status of PSU information changed + :return: True if status changed else False + """ + return self._status_changed + + +@thermal_json_object('chassis_info') +class ChassisInfo(ThermalPolicyInfoBase): + """ + Chassis information needed by thermal policy + """ + INFO_NAME = 'chassis_info' + + def __init__(self): + self._chassis = None + + def collect(self, chassis): + """ + Collect platform chassis. + :param chassis: The chassis object + :return: + """ + self._chassis = chassis + + def get_chassis(self): + """ + Retrieves platform chassis object + :return: A platform chassis object. + """ + return self._chassis diff --git a/platform/nokia-vs/sonic-platform-nokia/7215-c1/sonic_platform/thermal_manager.py b/platform/nokia-vs/sonic-platform-nokia/7215-c1/sonic_platform/thermal_manager.py new file mode 100644 index 00000000000..967cf175934 --- /dev/null +++ b/platform/nokia-vs/sonic-platform-nokia/7215-c1/sonic_platform/thermal_manager.py @@ -0,0 +1,49 @@ +from sonic_platform_base.sonic_thermal_control.thermal_manager_base import ThermalManagerBase +from .thermal_actions import * +from .thermal_conditions import * +from .thermal_infos import * + + +class ThermalManager(ThermalManagerBase): + THERMAL_ALGORITHM_CONTROL_PATH = '/var/run/hw-management/config/suspend' + + @classmethod + def start_thermal_control_algorithm(cls): + """ + Start thermal control algorithm + + Returns: + bool: True if set success, False if fail. + """ + cls._control_thermal_control_algorithm(False) + + @classmethod + def stop_thermal_control_algorithm(cls): + """ + Stop thermal control algorithm + + Returns: + bool: True if set success, False if fail. + """ + cls._control_thermal_control_algorithm(True) + + @classmethod + def _control_thermal_control_algorithm(cls, suspend): + """ + Control thermal control algorithm + + Args: + suspend: Bool, indicate suspend the algorithm or not + + Returns: + bool: True if set success, False if fail. + """ + status = True + write_value = 1 if suspend else 0 + try: + with open(cls.THERMAL_ALGORITHM_CONTROL_PATH, 'w') as control_file: + control_file.write(str(write_value)) + except (ValueError, IOError): + status = False + + return status diff --git a/platform/nokia-vs/sonic-platform-nokia/7215-c1/sonic_platform/watchdog.py b/platform/nokia-vs/sonic-platform-nokia/7215-c1/sonic_platform/watchdog.py new file mode 100644 index 00000000000..052a276af42 --- /dev/null +++ b/platform/nokia-vs/sonic-platform-nokia/7215-c1/sonic_platform/watchdog.py @@ -0,0 +1,231 @@ +""" +Module contains an implementation of SONiC Platform Base API and +provides access to hardware watchdog +""" + +import os +import fcntl +import array +import time +from sonic_platform_base.watchdog_base import WatchdogBase + +""" ioctl constants """ +IO_WRITE = 0x40000000 +IO_READ = 0x80000000 +IO_SIZE_INT = 0x00040000 +IO_READ_WRITE = 0xC0000000 +IO_TYPE_WATCHDOG = ord('W') << 8 + +WDR_INT = IO_READ | IO_SIZE_INT | IO_TYPE_WATCHDOG +WDWR_INT = IO_READ_WRITE | IO_SIZE_INT | IO_TYPE_WATCHDOG + +""" Watchdog ioctl commands """ +WDIOC_SETOPTIONS = 4 | WDR_INT +WDIOC_KEEPALIVE = 5 | WDR_INT +WDIOC_SETTIMEOUT = 6 | WDWR_INT +WDIOC_GETTIMEOUT = 7 | WDR_INT +WDIOC_SETPRETIMEOUT = 8 | WDWR_INT +WDIOC_GETPRETIMEOUT = 9 | WDR_INT +WDIOC_GETTIMELEFT = 10 | WDR_INT + +""" Watchdog status constants """ +WDIOS_DISABLECARD = 0x0001 +WDIOS_ENABLECARD = 0x0002 + +""" watchdog sysfs """ +WD_SYSFS_PATH = "/sys/class/watchdog/watchdog0/" +WD_GPIO_PATH = "/sys/class/gpio/gpio41/value" +CPLD_DIR = "/sys/bus/i2c/devices/0-0041/" + +WD_COMMON_ERROR = -1 + +class WatchdogImplBase(WatchdogBase): + """ + Base class that implements common logic for interacting + with watchdog using ioctl commands + """ + + def __init__(self, wd_device_path): + """ + Open a watchdog handle + @param wd_device_path Path to watchdog device + """ + super(WatchdogImplBase, self).__init__() + + self.watchdog="" + self.watchdog_path = wd_device_path + self.watchdog_gpio_reg = WD_GPIO_PATH + self.wd_state_reg = WD_SYSFS_PATH+"state" + self.wd_timeout_reg = WD_SYSFS_PATH+"timeout" + self.wd_timeleft_reg = WD_SYSFS_PATH+"timeleft" + + self.timeout = self._gettimeout() + + def _read_sysfs_file(self, sysfs_file): + # On successful read, returns the value read from given + # reg_name and on failure returns 'ERR' + rv = 'ERR' + + if (not os.path.isfile(sysfs_file)): + return rv + try: + with open(sysfs_file, 'r') as fd: + rv = fd.read() + except Exception as e: + rv = 'ERR' + + rv = rv.rstrip('\r\n') + rv = rv.lstrip(" ") + return rv + + def _write_sysfs_file(self, sysfs_file, value): + # On successful write, the value read will be written on + # reg_name and on failure returns 'ERR' + rv = 'ERR' + + if (not os.path.isfile(sysfs_file)): + return rv + try: + with open(sysfs_file, 'w') as fd: + rv = fd.write(str(value)) + except Exception as e: + rv = 'ERR' + + # Ensure that the write operation has succeeded + if (int(self._read_sysfs_file(sysfs_file)) != value ): + time.sleep(3) + if (int(self._read_sysfs_file(sysfs_file)) != value ): + rv = 'ERR' + + return rv + + def _disablewatchdog(self): + """ + Turn off the watchdog timer + """ + + req = array.array('h', [WDIOS_DISABLECARD]) + fcntl.ioctl(self.watchdog, WDIOC_SETOPTIONS, req, False) + self._write_sysfs_file(self.watchdog_gpio_reg, 1) + self._read_sysfs_file(CPLD_DIR+"last_reset_cause") + + def _enablewatchdog(self): + """ + Turn on the watchdog timer + """ + + req = array.array('h', [WDIOS_ENABLECARD]) + fcntl.ioctl(self.watchdog, WDIOC_SETOPTIONS, req, False) + + def _keepalive(self): + """ + Keep alive watchdog timer + """ + + fcntl.ioctl(self.watchdog, WDIOC_KEEPALIVE) + + def _settimeout(self, seconds): + """ + Set watchdog timer timeout + @param seconds - timeout in seconds + @return is the actual set timeout + """ + + req = array.array('I', [seconds]) + fcntl.ioctl(self.watchdog, WDIOC_SETTIMEOUT, req, True) + + return int(req[0]) + + def _gettimeout(self): + """ + Get watchdog timeout + @return watchdog timeout + """ + timeout=0 + timeout=self._read_sysfs_file(self.wd_timeout_reg) + + return timeout + + def _gettimeleft(self): + """ + Get time left before watchdog timer expires + @return time left in seconds + """ + + req = array.array('I', [0]) + fcntl.ioctl(self.watchdog, WDIOC_GETTIMELEFT, req, True) + + return int(req[0]) + + def arm(self, seconds): + """ + Implements arm WatchdogBase API + """ + + ret = WD_COMMON_ERROR + if (seconds < 0 or seconds > 340 ): + return ret + # Stop the watchdog service to gain access of watchdog file pointer + if self.is_armed(): + os.popen("systemctl stop cpu_wdt.service") + time.sleep(2) + if not self.watchdog: + self.watchdog = os.open(self.watchdog_path, os.O_WRONLY) + try: + if self.timeout != seconds: + self.timeout = self._settimeout(seconds) + if self.is_armed(): + self._keepalive() + else: + self._enablewatchdog() + ret = self.timeout + except IOError: + pass + if(ret == seconds): + self._write_sysfs_file(self.watchdog_gpio_reg, 0) + return ret + + def disarm(self): + """ + Implements disarm WatchdogBase API + + Returns: + A boolean, True if watchdog is disarmed successfully, False + if not + """ + + if self.is_armed(): + os.popen("systemctl stop cpu_wdt.service") + time.sleep(2) + if not self.watchdog: + self.watchdog = os.open(self.watchdog_path, os.O_WRONLY) + try: + self._disablewatchdog() + self.timeout = 0 + except IOError: + return False + return True + + def is_armed(self): + """ + Implements is_armed WatchdogBase API + """ + status = False + + state = self._read_sysfs_file(self.wd_state_reg) + if (state != 'inactive'): + status = True + + return status + + def get_remaining_time(self): + """ + Implements get_remaining_time WatchdogBase API + """ + + timeleft = WD_COMMON_ERROR + + if self.is_armed(): + timeleft=self._read_sysfs_file(self.wd_timeleft_reg) + + return int(timeleft) diff --git a/platform/nokia-vs/sonic-platform-nokia/7215-c1/utils/sonic_ssd.py b/platform/nokia-vs/sonic-platform-nokia/7215-c1/utils/sonic_ssd.py new file mode 100644 index 00000000000..6b2eac44580 --- /dev/null +++ b/platform/nokia-vs/sonic-platform-nokia/7215-c1/utils/sonic_ssd.py @@ -0,0 +1,47 @@ + +import os + +# pylint: disable=import-error +from sonic_platform_base.sonic_storage.storage_base import StorageBase +from sonic_platform_base.sonic_storage.ssd import SsdUtil as SsdUtilDefault + +class EmmcUtil(StorageBase): + def __init__(self, diskdev): + self.diskdev = diskdev + self.path = os.path.join('/sys/block', os.path.basename(diskdev)) + + def _readDeviceEntry(self, entry, default=None): + path = os.path.join(self.path, 'device', entry) + try: + with open(path, encoding='utf8') as f: + return f.read().rstrip() + except OSError: + return default + + def _isSlc(self): + return bool(self._readDeviceEntry('enhanced_area_offset')) + + def get_health(self): + data = self._readDeviceEntry('life_time') + if data is None: + raise NotImplementedError + value = int(data.split()[0 if self._isSlc() else 1], 0) + return float(100 - (10 * (value - 1))) + + def get_temperature(self): + return 'N/A' + + def get_model(self): + return self._readDeviceEntry('name') + + def get_firmware(self): + return self._readDeviceEntry('fwrev') + + def get_serial(self): + return self._readDeviceEntry('serial') + + def get_vendor_output(self): + return '' + +def SsdUtil(diskdev): + return EmmcUtil('/dev/mmcblk0') diff --git a/platform/nokia-vs/sonic-platform-nokia/debian/changelog b/platform/nokia-vs/sonic-platform-nokia/debian/changelog new file mode 100755 index 00000000000..a369a030e40 --- /dev/null +++ b/platform/nokia-vs/sonic-platform-nokia/debian/changelog @@ -0,0 +1,5 @@ +sonic-platform-nokia (1.0) unstable; urgency=low + + * Add support for nokia-7215. + + -- Nokia Fri, 20 Jan 2023 09:35:58 +0800 diff --git a/platform/nokia-vs/sonic-platform-nokia/debian/compat b/platform/nokia-vs/sonic-platform-nokia/debian/compat new file mode 100644 index 00000000000..ec635144f60 --- /dev/null +++ b/platform/nokia-vs/sonic-platform-nokia/debian/compat @@ -0,0 +1 @@ +9 diff --git a/platform/nokia-vs/sonic-platform-nokia/debian/control b/platform/nokia-vs/sonic-platform-nokia/debian/control new file mode 100755 index 00000000000..0653a3d28ee --- /dev/null +++ b/platform/nokia-vs/sonic-platform-nokia/debian/control @@ -0,0 +1,14 @@ +Source: sonic-platform-nokia +Section: unknown +Priority: optional +Maintainer: Nokia +Build-Depends: debhelper (>=9) +Standards-Version: 3.9.6 +Homepage: + +Package: sonic-platform-nokia-7215-c1 +Architecture: any +Depends: ${misc:Depends} +Description: + + diff --git a/platform/nokia-vs/sonic-platform-nokia/debian/rules b/platform/nokia-vs/sonic-platform-nokia/debian/rules new file mode 100755 index 00000000000..dfb8dbe676f --- /dev/null +++ b/platform/nokia-vs/sonic-platform-nokia/debian/rules @@ -0,0 +1,81 @@ +#!/usr/bin/make -f +# See debhelper(7) (uncomment to enable) +# output every command that modifies files on the build system. +#export DH_VERBOSE = 1 + +include /usr/share/dpkg/pkg-info.mk +#-------------------------------------------------------- + +PACKAGE_PRE_NAME := sonic-platform-nokia +ifneq ($(CROSS_BUILD_ENVIRON), y) +KVERSION ?= $(shell uname -r) +endif +KERNEL_SRC := /lib/modules/$(KVERSION) +INSTALL_MOD_DIR := kernel/extra/ +MOD_SRC_DIR:= $(shell pwd) +MODULE_DIRS:= 7215-c1 +UTILS_DIR := utils +MODULE_DIR:= modules +SERVICE_DIR := service +PLATFORM_DIR := sonic_platform +#CONF_DIR := conf - not used +#UDEV_DIR := udev - not used + +%: + dh $@ --with python3 --buildsystem=pybuild + +override_dh_auto_clean: + (for mod in $(MODULE_DIRS); do \ + $(MAKE) clean -C $(KERNEL_SRC)/build M=$(MOD_SRC_DIR)/$${mod}/modules; \ + if [ -f $(MOD_SRC_DIR)/$${mod}/setup.py ]; then \ + PYBUILD_NAME=$${mod} pybuild --clean -d $${mod}; \ + fi; \ + cd $(MOD_SRC_DIR)/$${mod}; \ + rm -rf *.egg-info/; \ + rm -f *.whl; \ + cd $(MOD_SRC_DIR)/; \ + done) + dh_clean + +override_dh_auto_configure: + (for mod in $(MODULE_DIRS); do \ + if [ -f $(MOD_SRC_DIR)/$${mod}/setup.py ]; then \ + PYBUILD_NAME=$${mod} pybuild --configure -d $${mod}; \ + fi; \ + done) + +override_dh_auto_build: + (set -e; for mod in $(MODULE_DIRS); do \ + if [ $$mod = "7215-c1" ] && [ $(CONFIGURED_ARCH) = "arm64" ]; then \ + cd $(MOD_SRC_DIR); \ + make modules -C $(KERNEL_SRC)/build M=$(MOD_SRC_DIR)/$${mod}/modules || exit 1; \ + fi; \ + cd $(MOD_SRC_DIR)/$${mod}; \ + python3 setup.py build; \ + python3 setup.py bdist_wheel -d $(MOD_SRC_DIR)/$${mod}; \ + cd $(MOD_SRC_DIR); \ + done) + +override_dh_auto_test: + # No tests to run + +override_dh_usrlocal: + # debian/sonic-platform-<>-<>/usr/local/bin/* are already done + +override_dh_auto_install: + (set -e; for mod in $(MODULE_DIRS); do \ + dh_installdirs -p$(PACKAGE_PRE_NAME)-$${mod} /$(KERNEL_SRC)/$(INSTALL_MOD_DIR); \ + dh_installdirs -p$(PACKAGE_PRE_NAME)-$${mod} /usr/local/bin; \ + dh_installdirs -p$(PACKAGE_PRE_NAME)-$${mod} /boot; \ + dh_installdirs -p$(PACKAGE_PRE_NAME)-$${mod} /lib/systemd/system; \ + cp $(MOD_SRC_DIR)/$${mod}/$(SERVICE_DIR)/*.service debian/$(PACKAGE_PRE_NAME)-$${mod}/lib/systemd/system/; \ + if [ -d $(MOD_SRC_DIR)/$${mod}/$(UTILS_DIR) ]; then \ + cp $(MOD_SRC_DIR)/$${mod}/$(UTILS_DIR)/* debian/$(PACKAGE_PRE_NAME)-$${mod}/usr/local/bin/; \ + fi; \ + if [ -d "$(MOD_SRC_DIR)/$${mod}/$(MODULE_DIR)" ] && ls "$(MOD_SRC_DIR)/$${mod}/$(MODULE_DIR)"/*.ko >/dev/null 2>&1; then \ + cp $(MOD_SRC_DIR)/$${mod}/$(MODULE_DIR)/*.ko debian/$(PACKAGE_PRE_NAME)-$${mod}/$(KERNEL_SRC)/$(INSTALL_MOD_DIR); \ + fi; \ + cd $(MOD_SRC_DIR)/$${mod}; \ + python3 setup.py install --root=$(MOD_SRC_DIR)/debian/$(PACKAGE_PRE_NAME)-$${mod} --install-layout=deb; \ + cd $(MOD_SRC_DIR); \ + done) diff --git a/platform/nokia-vs/sonic-platform-nokia/debian/sonic-platform-nokia-7215-c1.install b/platform/nokia-vs/sonic-platform-nokia/debian/sonic-platform-nokia-7215-c1.install new file mode 100644 index 00000000000..cb12ac3025e --- /dev/null +++ b/platform/nokia-vs/sonic-platform-nokia/debian/sonic-platform-nokia-7215-c1.install @@ -0,0 +1,8 @@ +7215-c1/scripts/nokia-7215-init.sh usr/local/bin +7215-c1/scripts/nokia-7215-postinit.sh usr/local/bin +7215-c1/scripts/intf_sync.py usr/local/bin +7215-c1/scripts/cpu_wdt.py usr/local/bin +7215-c1/service/nokia-7215init.service etc/systemd/system +7215-c1/service/nokia-7215-postinit.service etc/systemd/system +7215-c1/service/cpu_wdt.service etc/systemd/system +7215-c1/sonic_platform-1.0-py3-none-any.whl usr/share/sonic/device/arm64-nokia_ixs7215_c1xa-r0 diff --git a/platform/nokia-vs/sonic-platform-nokia/debian/sonic-platform-nokia-7215-c1.postinst b/platform/nokia-vs/sonic-platform-nokia/debian/sonic-platform-nokia-7215-c1.postinst new file mode 100644 index 00000000000..141b18eba94 --- /dev/null +++ b/platform/nokia-vs/sonic-platform-nokia/debian/sonic-platform-nokia-7215-c1.postinst @@ -0,0 +1,53 @@ +#!/bin/sh +# postinst script for sonic-platform-nokia-7215 +# +# see: dh_installdeb(1) + +set -e + +# summary of how this script can be called: +# * `configure' +# * `abort-upgrade' +# * `abort-remove' `in-favour' +# +# * `abort-remove' +# * `abort-deconfigure' `in-favour' +# `removing' +# +# for details, see https://www.debian.org/doc/debian-policy/ or +# the debian-policy package + + +case "$1" in + configure) + chmod a+x /usr/local/bin/nokia-7215-init.sh + chmod a+x /usr/local/bin/nokia-7215-postinit.sh + chmod a+x /usr/local/bin/intf_sync.py + depmod -a + systemctl restart kmod + systemctl enable nokia-7215init.service + systemctl start nokia-7215init.service + + systemctl mask --now watchdog-control.service + systemctl enable cpu_wdt.service + systemctl start cpu_wdt.service + + systemctl enable nokia-7215-postinit.service + systemctl start --no-block nokia-7215-postinit.service + ;; + + abort-upgrade|abort-remove|abort-deconfigure) + ;; + + *) + echo "postinst called with unknown argument \`$1'" >&2 + exit 1 + ;; +esac + +# dh_installdeb will replace this with shell code automatically +# generated by other debhelper scripts. + +#DEBHELPER# + +exit 0 diff --git a/platform/nokia-vs/syncd-vs.dep b/platform/nokia-vs/syncd-vs.dep new file mode 100644 index 00000000000..77aeec155a3 --- /dev/null +++ b/platform/nokia-vs/syncd-vs.dep @@ -0,0 +1,11 @@ +#DPKG FRK +DPATH := $($(SYNCD_VS)_PATH) +DEP_FILES := $(SONIC_COMMON_FILES_LIST) platform/nokia-vs/syncd-vs.mk platform/nokia-vs/syncd-vs.dep +DEP_FILES += $(SONIC_COMMON_BASE_FILES_LIST) +DEP_FILES += $(shell git ls-files $(DPATH)) + +$(SYNCD_VS)_CACHE_MODE := GIT_CONTENT_SHA +$(SYNCD_VS)_DEP_FLAGS := $(SONIC_COMMON_FLAGS_LIST) +$(SYNCD_VS)_DEP_FILES := $(DEP_FILES) + +$(eval $(call add_dbg_docker,$(SYNCD_VS),$(SYNCD_VS_DBG))) diff --git a/platform/nokia-vs/syncd-vs.mk b/platform/nokia-vs/syncd-vs.mk new file mode 100644 index 00000000000..b5c4ea9a3c5 --- /dev/null +++ b/platform/nokia-vs/syncd-vs.mk @@ -0,0 +1,11 @@ +$(LIBSAIREDIS)_DEB_BUILD_PROFILES += syncd vs + +SYNCD_VS = syncd-vs_1.0.0_$(CONFIGURED_ARCH).deb +$(SYNCD_VS)_RDEPENDS += $(LIBSAIREDIS) $(LIBSAIMETADATA) $(LIBSAIVS) + +$(eval $(call add_derived_package,$(LIBSAIREDIS),$(SYNCD_VS))) + +SYNCD_VS_DBG = syncd-vs-dbgsym_1.0.0_$(CONFIGURED_ARCH).deb +$(SYNCD_VS_DBG)_DEPENDS += $(SYNCD_VS) +$(SYNCD_VS_DBG)_RDEPENDS += $(SYNCD_VS) +$(eval $(call add_derived_package,$(LIBSAIREDIS),$(SYNCD_VS_DBG))) diff --git a/platform/nvidia-bluefield/docker-syncd-bluefield/Dockerfile.j2 b/platform/nvidia-bluefield/docker-syncd-bluefield/Dockerfile.j2 index 912aa1e3a4b..fb979531027 100644 --- a/platform/nvidia-bluefield/docker-syncd-bluefield/Dockerfile.j2 +++ b/platform/nvidia-bluefield/docker-syncd-bluefield/Dockerfile.j2 @@ -1,6 +1,7 @@ ## -## Copyright (c) 2024-2025 NVIDIA CORPORATION & AFFILIATES. -## Apache-2.0 +## SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +## Copyright (c) 2024-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +## SPDX-License-Identifier: Apache-2.0 ## ## Licensed under the Apache License, Version 2.0 (the "License"); ## you may not use this file except in compliance with the License. @@ -16,7 +17,7 @@ ## {% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files %} -FROM docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} +FROM docker-config-engine-trixie-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} ARG docker_container_name diff --git a/platform/nvidia-bluefield/docker-syncd-bluefield/critical_processes b/platform/nvidia-bluefield/docker-syncd-bluefield/critical_processes index e69de29bb2d..bdd6903c569 100644 --- a/platform/nvidia-bluefield/docker-syncd-bluefield/critical_processes +++ b/platform/nvidia-bluefield/docker-syncd-bluefield/critical_processes @@ -0,0 +1 @@ +program:syncd diff --git a/platform/nvidia-bluefield/docker-syncd-bluefield/supervisord.conf b/platform/nvidia-bluefield/docker-syncd-bluefield/supervisord.conf index cd44d616229..eeed0d3f607 100644 --- a/platform/nvidia-bluefield/docker-syncd-bluefield/supervisord.conf +++ b/platform/nvidia-bluefield/docker-syncd-bluefield/supervisord.conf @@ -14,7 +14,7 @@ buffer_size=1024 [eventlistener:supervisor-proc-exit-listener] command=/usr/bin/supervisor-proc-exit-listener-rs --container-name syncd -events=PROCESS_STATE_EXITED,PROCESS_STATE_RUNNING +events=PROCESS_STATE_EXITED,PROCESS_STATE_RUNNING,PROCESS_STATE_FATAL autostart=true autorestart=unexpected buffer_size=1024 diff --git a/platform/nvidia-bluefield/fw-manager b/platform/nvidia-bluefield/fw-manager deleted file mode 120000 index f29c4d65b6b..00000000000 --- a/platform/nvidia-bluefield/fw-manager +++ /dev/null @@ -1 +0,0 @@ -../mellanox/fw-manager/ \ No newline at end of file diff --git a/platform/nvidia-bluefield/installer/create_sonic_image b/platform/nvidia-bluefield/installer/create_sonic_image index 9a9c4ac4665..af193c3b40a 100755 --- a/platform/nvidia-bluefield/installer/create_sonic_image +++ b/platform/nvidia-bluefield/installer/create_sonic_image @@ -41,8 +41,8 @@ GRUB_AA64=grubnetaa64.efi GRUB_CFG="" # Common Grub Config BF2_BOOT_ARGS="console=ttyAMA1 console=hvc0 console=ttyAMA0 earlycon=pl011,0x01000000 earlycon=pl011,0x01800000" BF2_GRUB_CFG="$BF2_BOOT_ARGS isolcpus=1-7 nohz_full=1-7 rcu_nocbs=1-7" -BF3_BOOT_ARGS="console=ttyAMA1 console=hvc0 console=ttyAMA0 earlycon=pl011,0x13010000" -BF3_GRUB_CFG="$BF3_BOOT_ARGS isolcpus=1-10 nohz_full=1-10 rcu_nocbs=1-10" +BF3_BOOT_ARGS="console=ttyAMA1 console=ttyAMA0 earlycon=pl011,0x13010000" +BF3_GRUB_CFG="$BF3_BOOT_ARGS isolcpus=2-15 nohz_full=2-15 rcu_nocbs=2-15" usage() { cat << EOF diff --git a/platform/nvidia-bluefield/installer/install.sh.j2 b/platform/nvidia-bluefield/installer/install.sh.j2 index bd7bb773ac9..16fe6d06930 100755 --- a/platform/nvidia-bluefield/installer/install.sh.j2 +++ b/platform/nvidia-bluefield/installer/install.sh.j2 @@ -99,6 +99,24 @@ if [ -e /etc/bf.cfg ]; then . /etc/bf.cfg fi +if [[ "$NPU_TIME" =~ ^[0-9]+$ ]]; then + log "Setting system time from NPU: $NPU_TIME" + if date -s "@$NPU_TIME" > /dev/null 2>&1; then + log "System time set to: $(date)" + if [ -e /dev/rtc0 ]; then + if hwclock --systohc --utc > /dev/null 2>&1; then + log "Hardware clock synced from system time" + else + log "WARNING: Failed to sync hardware clock from system time (rc=$?)" + fi + fi + else + log "WARNING: Failed to set system time from NPU_TIME=$NPU_TIME (rc=$?)" + fi +else + log "Invalid NPU_TIME value '$NPU_TIME'; expected positive integer Unix timestamp. Skipping time update." +fi + # Flags that can be overwritten by the bf.cfg declare -r SKIP_FIRMWARE_UPGRADE="${SKIP_FIRMWARE_UPGRADE:-false}" declare -r FORCE_FW_CONFIG_RESET="${FORCE_FW_CONFIG_RESET:-false}" @@ -246,11 +264,10 @@ if [[ $SKIP_FIRMWARE_UPGRADE != "true" ]]; then bfb_pre_fw_install fi - ex chroot $sonic_fs_mountpoint mst start - ex chroot $sonic_fs_mountpoint /usr/local/bin/mlnx-fw-manager --nosyslog --verbose + ex chroot $sonic_fs_mountpoint /usr/local/bin/mlnx-fw-manager -m --nosyslog --verbose if [[ $FORCE_FW_CONFIG_RESET == "true" ]]; then - ex chroot $sonic_fs_mountpoint /usr/local/bin/mlnx-fw-manager --reset --nosyslog --verbose + ex chroot $sonic_fs_mountpoint /usr/local/bin/mlnx-fw-manager -m --reset --nosyslog --verbose fi ex umount $sonic_fs_mountpoint/host diff --git a/platform/nvidia-bluefield/nasa-cli-helper/nasa-cli-helper.py b/platform/nvidia-bluefield/nasa-cli-helper/nasa-cli-helper.py index 2728cf58069..2f54c4f77ba 100644 --- a/platform/nvidia-bluefield/nasa-cli-helper/nasa-cli-helper.py +++ b/platform/nvidia-bluefield/nasa-cli-helper/nasa-cli-helper.py @@ -1,6 +1,7 @@ #!/usr/bin/env python3 # -# Copyright (c) 2025 NVIDIA CORPORATION & AFFILIATES. +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2025-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. # Apache-2.0 # # Licensed under the Apache License, Version 2.0 (the "License"); @@ -16,20 +17,129 @@ # limitations under the License. # +import re import sys import argparse import docker import config.plugins.nvidia_bluefield as nvda_bf +try: + from sonic_py_common import device_info +except ImportError: + device_info = None + +SAI_PROFILE_FILENAME = 'sai.profile' +CT_TCP_AGING_IN_SECONDS_KEY = 'CT_TCP_AGING_IN_SECONDS' +CT_UDP_AGING_IN_SECONDS_KEY = 'CT_UDP_AGING_IN_SECONDS' +CT_TCP_AGING_DEFAULT_SECONDS = 300 +CT_UDP_AGING_DEFAULT_SECONDS = 120 + + +def get_sai_profile_path(): + """Return path to sai.profile under device tree for current platform/HwSKU.""" + if device_info is None: + return None + platform, hwsku = device_info.get_platform_and_hwsku() + if not platform or not hwsku: + return None + return f'/usr/share/sonic/device/{platform}/{hwsku}/{SAI_PROFILE_FILENAME}' + + +def _aging_key_and_default(use_udp): + """Return (profile_key, default_seconds) for TCP or UDP aging.""" + if use_udp: + return CT_UDP_AGING_IN_SECONDS_KEY, CT_UDP_AGING_DEFAULT_SECONDS + return CT_TCP_AGING_IN_SECONDS_KEY, CT_TCP_AGING_DEFAULT_SECONDS + + +def get_aging_interval(use_udp): + """Read aging key from sai.profile. If file is missing, unreadable, or key absent, use TCP/UDP defaults.""" + key, default_seconds = _aging_key_and_default(use_udp) + sai_profile_path = get_sai_profile_path() + if not sai_profile_path: + print("Error: Could not get platform/HwSKU", file=sys.stderr) + sys.exit(1) + try: + with open(sai_profile_path, 'r') as f: + content = f.read() + except (FileNotFoundError, OSError): + return default_seconds + + pattern = re.compile(r'^' + re.escape(key) + r'=(\d+)', re.MULTILINE) + match = pattern.search(content) + if match: + return int(match.group(1)) + return default_seconds + + +def set_aging_interval(seconds, use_udp): + """Update TCP or UDP aging key in sai.profile. Add line if missing, else replace. + + If sai.profile does not exist yet, it is created (same as starting from an empty file). + """ + key, _ = _aging_key_and_default(use_udp) + sai_profile_path = get_sai_profile_path() + if not sai_profile_path: + print("Error: Could not get platform/HwSKU (sonic_py_common.device_info not available or returned empty).", file=sys.stderr) + sys.exit(1) + content = '' + try: + with open(sai_profile_path, 'r') as f: + content = f.read() + except FileNotFoundError: + pass + except OSError as e: + print(f"Error: Failed to read sai.profile: {e}", file=sys.stderr) + sys.exit(1) + + new_line = f'{key}={seconds}' + pattern = re.compile(r'^.*' + re.escape(key) + r'=.*$', re.MULTILINE) + if pattern.search(content): + content = pattern.sub(new_line, content, count=1) + else: + content = content.rstrip() + if content and not content.endswith('\n'): + content += '\n' + content += new_line + '\n' + + try: + with open(sai_profile_path, 'w') as f: + f.write(content) + except OSError as e: + print(f"Error: Failed to write sai.profile: {e}", file=sys.stderr) + sys.exit(1) + + print(f"{key} has been set to {seconds}.", file=sys.stderr) + print("Please run config reload or reboot for the change to take effect.", file=sys.stderr) + + def main(): parser = argparse.ArgumentParser(description='NASA CLI Helper for NVIDIA BlueField') - parser.add_argument('command', choices=['get_packet_debug_mode', 'get_sai_debug_mode'], - help='Command to execute') + parser.add_argument('command', choices=['get_packet_debug_mode', 'get_sai_debug_mode', 'get_aging_interval', 'set_aging_interval'], + help='Command to execute') parser.add_argument('-f', '--filename', action='store_true', - help='Show filename instead of status') + help='Show filename instead of status (for get_packet_debug_mode / get_sai_debug_mode)') + parser.add_argument('-u', '--udp', action='store_true', + help='Use UDP (default is TCP for aging commands)') + parser.add_argument('value', nargs='?', type=int, default=None, + help='Aging interval in seconds (for set_aging_interval; default 300 TCP / 180 UDP)') args = parser.parse_args() + if args.command == 'get_aging_interval': + seconds = get_aging_interval(args.udp) + print(f"{seconds}") + return + + if args.command == 'set_aging_interval': + _, default_seconds = _aging_key_and_default(args.udp) + seconds = args.value if args.value is not None else default_seconds + if seconds < 1: + print("Error: aging interval must be >= 1 second.", file=sys.stderr) + sys.exit(1) + set_aging_interval(seconds, args.udp) + return + try: docker_client = docker.from_env() except docker.errors.DockerException as e: @@ -44,11 +154,12 @@ def main(): except Exception as e: print(f"Error: Failed to execute '{args.command}': {e}", file=sys.stderr) sys.exit(1) - + if args.filename: print(filename) else: print(status) + if __name__ == '__main__': main() diff --git a/platform/nvidia-bluefield/platform-api/sonic_platform/__init__.py b/platform/nvidia-bluefield/platform-api/sonic_platform/__init__.py index 660a999a4af..1fdfe6496e7 100644 --- a/platform/nvidia-bluefield/platform-api/sonic_platform/__init__.py +++ b/platform/nvidia-bluefield/platform-api/sonic_platform/__init__.py @@ -1,5 +1,5 @@ # -# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. +# Copyright (c) 2024-2026 NVIDIA CORPORATION & AFFILIATES. # Apache-2.0 # # Licensed under the Apache License, Version 2.0 (the "License"); @@ -15,4 +15,5 @@ # limitations under the License. # __all__ = ["platform", "chassis"] -from sonic_platform import * +from . import platform +from . import chassis diff --git a/platform/nvidia-bluefield/platform-utils b/platform/nvidia-bluefield/platform-utils new file mode 120000 index 00000000000..844fc4791f4 --- /dev/null +++ b/platform/nvidia-bluefield/platform-utils @@ -0,0 +1 @@ +../mellanox/platform-utils/ \ No newline at end of file diff --git a/platform/nvidia-bluefield/recipes/bluefield-soc.mk b/platform/nvidia-bluefield/recipes/bluefield-soc.mk index 9f5bbe6ffd2..c7ab23f7a0c 100644 --- a/platform/nvidia-bluefield/recipes/bluefield-soc.mk +++ b/platform/nvidia-bluefield/recipes/bluefield-soc.mk @@ -17,7 +17,7 @@ # Bluefied Software Distribution Version BFSOC_VERSION = 4.14.0 -BFSOC_REVISION = 13868 +BFSOC_REVISION = 13938 BFB_IMG_TYPE = prod BFSOC_BUILD_DATE = diff --git a/platform/nvidia-bluefield/recipes/docker-syncd-bluefield.mk b/platform/nvidia-bluefield/recipes/docker-syncd-bluefield.mk index dcc7244d4be..a9f325d63e2 100644 --- a/platform/nvidia-bluefield/recipes/docker-syncd-bluefield.mk +++ b/platform/nvidia-bluefield/recipes/docker-syncd-bluefield.mk @@ -1,6 +1,7 @@ # -# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. -# Apache-2.0 +# SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES +# Copyright (c) 2024-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -16,7 +17,7 @@ # DOCKER_SYNCD_PLATFORM_CODE = bluefield -include $(PLATFORM_PATH)/../template/docker-syncd-bookworm.mk +include $(PLATFORM_PATH)/../template/docker-syncd-trixie.mk $(DOCKER_SYNCD_BASE)_DEPENDS += $(SYNCD) $(MFT) $(SDN_APPL) $(DPU_SAI) $(MLNX_IPROUTE2) @@ -32,5 +33,5 @@ endif $(DOCKER_SYNCD_BASE)_VERSION = 1.0.0 $(DOCKER_SYNCD_BASE)_PACKAGE_NAME = syncd -$(DOCKER_SYNCD_BASE)_RUN_OPT += -v /host/warmboot:/var/warmboot $(DOCKER_SYNCD_BASE)_RUN_OPT += -v /var/log/bluefield/sdk-dumps:/var/log/bluefield/sdk-dumps +$(DOCKER_SYNCD_BASE)_RUN_OPT += -v /var/dump/flows/:/var/dump/flows/ diff --git a/platform/nvidia-bluefield/recipes/dpu-sai.mk b/platform/nvidia-bluefield/recipes/dpu-sai.mk index 61f97b943ed..8220f1be719 100644 --- a/platform/nvidia-bluefield/recipes/dpu-sai.mk +++ b/platform/nvidia-bluefield/recipes/dpu-sai.mk @@ -15,7 +15,7 @@ # limitations under the License. # -DPU_SAI_VERSION = SAIBuild0.0.50.0 +DPU_SAI_VERSION = SAIBuild0.0.53.0 # Place here URL where SAI sources exist DPU_SAI_SOURCE_BASE_URL= diff --git a/platform/nvidia-bluefield/recipes/fw.mk b/platform/nvidia-bluefield/recipes/fw.mk index e17582da333..02e97a2e403 100644 --- a/platform/nvidia-bluefield/recipes/fw.mk +++ b/platform/nvidia-bluefield/recipes/fw.mk @@ -19,7 +19,7 @@ DPU_NIC_FW_BASE_URL = DPU_NIC_FW_VERSION = BF3_FW_BASE_URL = -BF3_FW_VERSION = 48.0410 +BF3_FW_VERSION = 48.1000 BF3_FW_FILE = fw-BlueField-3-rel-32_$(subst .,_,$(BF3_FW_VERSION)).mfa diff --git a/platform/nvidia-bluefield/recipes/installer-image.mk b/platform/nvidia-bluefield/recipes/installer-image.mk index 813441c0052..04fae521ce8 100644 --- a/platform/nvidia-bluefield/recipes/installer-image.mk +++ b/platform/nvidia-bluefield/recipes/installer-image.mk @@ -45,11 +45,11 @@ $(SONIC_BF_IMAGE_BASE)_INSTALLS += $(SYSTEMD_SONIC_GENERATOR) \ $(OFED_KERNEL_UTILS) \ $(MLNX_IPROUTE2) -$(SONIC_BF_IMAGE_BASE)_PYTHON_WHEELS += $(MELLANOX_FW_MANAGER) +$(SONIC_BF_IMAGE_BASE)_PYTHON_WHEELS += $(MELLANOX_PLATFORM_UTILS) -DISABLED_DOCKERS = $(DOCKER_SFLOW) $(DOCKER_MGMT_FRAMEWORK) $(DOCKER_NAT) $(DOCKER_TEAMD) $(DOCKER_ROUTER_ADVERTISER) $(DOCKER_MUX) $(DOCKER_SNMP) $(DOCKER_LLDP) $(DOCKER_RESTAPI) +DISABLED_DOCKERS = $(DOCKER_SFLOW) $(DOCKER_MGMT_FRAMEWORK) $(DOCKER_NAT) $(DOCKER_TEAMD) $(DOCKER_ROUTER_ADVERTISER) $(DOCKER_MUX) $(DOCKER_SNMP) $(DOCKER_LLDP) $(DOCKER_RESTAPI) $(DOCKER_DASH_HA) DISABLED_PACKAGES_LOCAL = $(DOCKER_DHCP_RELAY) $(DOCKER_MACSEC) -DISABLED_FEATURE_FLAGS = INCLUDE_SFLOW INCLUDE_MGMT_FRAMEWORK INCLUDE_NAT INCLUDE_MACSEC INCLUDE_TEAMD INCLUDE_ROUTER_ADVERTISER INCLUDE_MUX INCLUDE_RESTAPI +DISABLED_FEATURE_FLAGS = INCLUDE_SFLOW INCLUDE_MGMT_FRAMEWORK INCLUDE_NAT INCLUDE_MACSEC INCLUDE_TEAMD INCLUDE_ROUTER_ADVERTISER INCLUDE_MUX INCLUDE_RESTAPI INCLUDE_SNMP INCLUDE_LLDP INCLUDE_DASH_HA $(info Disabling the following docker images: $(DISABLED_DOCKERS)) $(info Disabling the following packages: $(DISABLED_PACKAGES_LOCAL)) $(info Disabling the following feature flags: $(DISABLED_FEATURE_FLAGS)) diff --git a/platform/nvidia-bluefield/recipes/mft.mk b/platform/nvidia-bluefield/recipes/mft.mk index fa61ba37ba5..779f7c8458c 100644 --- a/platform/nvidia-bluefield/recipes/mft.mk +++ b/platform/nvidia-bluefield/recipes/mft.mk @@ -14,8 +14,8 @@ # See the License for the specific language governing permissions and # limitations under the License. -MFT_VERSION = 4.34.0 -MFT_REVISION = 145 +MFT_VERSION = 4.36.0 +MFT_REVISION = 147 MFT_INTERNAL_SOURCE_BASE_URL = diff --git a/platform/nvidia-bluefield/recipes/sdk.dep b/platform/nvidia-bluefield/recipes/sdk.dep index d5c63ede73b..21ea49064e6 100644 --- a/platform/nvidia-bluefield/recipes/sdk.dep +++ b/platform/nvidia-bluefield/recipes/sdk.dep @@ -114,16 +114,6 @@ $(LIBRXPCOMPILER_DEV)_DEP_FLAGS := $(SDK_COMMON_FLAGS_LIST) $(LIBRXPCOMPILER_DEV)_DEP_FILES := $(DEP_FILES) -# GRPC - -SPATH := $($(LIBGRPC_DEV)_SRC_PATH) -DEP_FILES := $(SDK_COMMON_FILES_LIST) -DEP_FILES += $(shell git ls-files -- $(SPATH)) - -$(LIBGRPC_DEV)_CACHE_MODE := GIT_CONTENT_SHA -$(LIBGRPC_DEV)_DEP_FLAGS := $(SDK_COMMON_FLAGS_LIST) -$(LIBGRPC_DEV)_DEP_FILES := $(DEP_FILES) - # DOCA SPATH := $($(DOCA_COMMON)_SRC_PATH) diff --git a/platform/nvidia-bluefield/recipes/sdk.mk b/platform/nvidia-bluefield/recipes/sdk.mk index 10f87d737ee..af0017972bc 100644 --- a/platform/nvidia-bluefield/recipes/sdk.mk +++ b/platform/nvidia-bluefield/recipes/sdk.mk @@ -20,7 +20,7 @@ SDK_BASE_PATH = $(PLATFORM_PATH)/sdk-src/sonic-bluefield-packages/bin # Place here URL where SDK sources exist SDK_SOURCE_BASE_URL = -SDK_VERSION = 26.1-RC3 +SDK_VERSION = 26.4-RC4 SDK_COLLECTX_URL = https://linux.mellanox.com/public/repo/doca/1.5.2/debian12/aarch64/ @@ -213,18 +213,6 @@ export RXPCOMPILER_DERIVED_DEBS SDK_DEBS += $(RXPCOMPILER) $(RXPCOMPILER_DERIVED_DEBS) SDK_SRC_TARGETS += $(RXPCOMPILER) -# GRPC and derived packages - -LIBGRPC_VER := $(call get_sdk_package_version_full,"grpc") - -LIBGRPC_DEV = libgrpc-dev_$(LIBGRPC_VER)_arm64.deb -$(LIBGRPC_DEV)_SRC_PATH = $(PLATFORM_PATH)/sdk-src/grpc - -export LIBGRPC_DEV LIBGRPC_VER - -SDK_DEBS += $(LIBGRPC_DEV) -SDK_SRC_TARGETS += $(LIBGRPC_DEV) - # DOCA and derived packages DOCA_VERSION := $(call get_sdk_package_version_full,"doca") @@ -232,8 +220,9 @@ DOCA_DEB_VERSION := $(DOCA_VERSION)-1 DOCA_COMMON = doca-sdk-common_${DOCA_DEB_VERSION}_${CONFIGURED_ARCH}.deb $(DOCA_COMMON)_SRC_PATH = $(PLATFORM_PATH)/sdk-src/doca -$(DOCA_COMMON)_RDEPENDS = $(DPDK) $(RXPCOMPILER) $(LIBRXPCOMPILER_DEV) $(LIBGRPC_DEV) $(LIB_NV_HWS) -$(DOCA_COMMON)_DEPENDS = $(RXPCOMPILER) $(LIBRXPCOMPILER_DEV) $(DPDK_DEV) $(LIBGRPC_DEV) $(LIB_NV_HWS_DEV) +$(DOCA_COMMON)_RDEPENDS = $(DPDK) $(RXPCOMPILER) $(LIBRXPCOMPILER_DEV) $(LIB_NV_HWS) $(LIBNL_GENL3) +$(DOCA_COMMON)_DEPENDS = $(RXPCOMPILER) $(LIBRXPCOMPILER_DEV) $(DPDK_DEV) $(LIB_NV_HWS_DEV) \ + $(LIBNL_GENL3_DEV) DOCA_COMMON_DEV = libdoca-sdk-common-dev_${DOCA_DEB_VERSION}_${CONFIGURED_ARCH}.deb $(DOCA_COMMON_DEV)_DEPENDS = $(DOCA_COMMON) diff --git a/platform/nvidia-bluefield/rules.mk b/platform/nvidia-bluefield/rules.mk index 80454333b42..23b0fab5b22 100644 --- a/platform/nvidia-bluefield/rules.mk +++ b/platform/nvidia-bluefield/rules.mk @@ -20,7 +20,7 @@ RECIPE_DIR = recipes override TARGET_BOOTLOADER=grub -include $(PLATFORM_PATH)/fw-manager/fw-manager.mk +include $(PLATFORM_PATH)/platform-utils/platform-utils.mk include $(PLATFORM_PATH)/$(RECIPE_DIR)/bluefield-soc.mk include $(PLATFORM_PATH)/$(RECIPE_DIR)/mft.mk include $(PLATFORM_PATH)/$(RECIPE_DIR)/fw.mk diff --git a/platform/nvidia-bluefield/sdk-src/doca/.gitignore b/platform/nvidia-bluefield/sdk-src/doca/.gitignore index 9e989f6c99a..480c9a305a0 100644 --- a/platform/nvidia-bluefield/sdk-src/doca/.gitignore +++ b/platform/nvidia-bluefield/sdk-src/doca/.gitignore @@ -4,3 +4,4 @@ !.gitignore !Makefile !packages.txt +!*.patch diff --git a/platform/nvidia-bluefield/sdk-src/dpdk/.gitignore b/platform/nvidia-bluefield/sdk-src/dpdk/.gitignore index 6dbdff4573b..e074b142d93 100644 --- a/platform/nvidia-bluefield/sdk-src/dpdk/.gitignore +++ b/platform/nvidia-bluefield/sdk-src/dpdk/.gitignore @@ -3,3 +3,4 @@ # Except these files !.gitignore !Makefile +!*.patch diff --git a/platform/nvidia-bluefield/sdk-src/dpdk/0001-Remove-meson-from-dependencies.patch b/platform/nvidia-bluefield/sdk-src/dpdk/0001-Remove-meson-from-dependencies.patch deleted file mode 100644 index c1f663de9c6..00000000000 --- a/platform/nvidia-bluefield/sdk-src/dpdk/0001-Remove-meson-from-dependencies.patch +++ /dev/null @@ -1,24 +0,0 @@ -From 178c90074d62fc6d8dfcef500cde1de8b4928eee Mon Sep 17 00:00:00 2001 -From: Oleksandr Ivantsiv -Date: Fri, 18 Nov 2022 20:09:52 +0200 -Subject: [PATCH] Remove meson from dependencies. - ---- - debian/control | 1 - - 1 file changed, 1 deletion(-) - -diff --git a/debian/control b/debian/control -index a737765..b99b3e9 100644 ---- a/debian/control -+++ b/debian/control -@@ -21,7 +21,6 @@ Build-Depends: debhelper (>= 10.3~), - linux-headers-arm64 [arm64] | linux-headers-generic [arm64], - linux-headers-armmp [armhf] | linux-headers-generic [armhf], - linux-headers-powerpc64le [ppc64el] | linux-headers-generic [ppc64el], -- meson (>= 0.41~), - pkg-config, - python3, - python3-sphinx , --- -2.25.1 - diff --git a/platform/nvidia-bluefield/sdk-src/dpdk/Makefile b/platform/nvidia-bluefield/sdk-src/dpdk/Makefile index 68a48b37f80..b640e08e7d3 100644 --- a/platform/nvidia-bluefield/sdk-src/dpdk/Makefile +++ b/platform/nvidia-bluefield/sdk-src/dpdk/Makefile @@ -33,11 +33,9 @@ $(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : pushd dpdk.org/ find . -type f -exec touch {} + - patch -p1 < ../0001-Remove-meson-from-dependencies.patch - # Build the package # PATH variable is required for ninja to find the right version - DPDK_CONFIG_OPTIONS='--cross-file ../config/arm/arm64_bluefield_linux_gcc' DEB_BUILD_OPTIONS='dpdk_config_options=-Dmachine=0xd08' dpkg-buildpackage -us -uc -b -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $(SONIC_DPKG_ADMINDIR) + DPDK_CONFIG_OPTIONS='--cross-file ../config/arm/arm64_bluefield_linux_gcc -Dpkt_mbuf_headroom=256' dpkg-buildpackage -us -uc -b -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $(SONIC_DPKG_ADMINDIR) popd mv $(DERIVED_TARGETS) $* $(DEST)/ diff --git a/platform/nvidia-bluefield/sdk-src/grpc/.gitignore b/platform/nvidia-bluefield/sdk-src/grpc/.gitignore deleted file mode 100644 index 6dbdff4573b..00000000000 --- a/platform/nvidia-bluefield/sdk-src/grpc/.gitignore +++ /dev/null @@ -1,5 +0,0 @@ -# Ignore everything in this directory -* -# Except these files -!.gitignore -!Makefile diff --git a/platform/nvidia-bluefield/sdk-src/grpc/Makefile b/platform/nvidia-bluefield/sdk-src/grpc/Makefile deleted file mode 100644 index 6fc434e3844..00000000000 --- a/platform/nvidia-bluefield/sdk-src/grpc/Makefile +++ /dev/null @@ -1,45 +0,0 @@ -# -# Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. -# Apache-2.0 -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -# - -.ONESHELL: -SHELL = /bin/bash - -MAIN_TARGET = $(LIBGRPC_DEV) -DERIVED_TARGETS = $(LIBGRPC_DERIVED_DEBS) -LIBGRPC_TAR = libgrpc-dev_$(LIBGRPC_VER).tar.gz - -$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : - # Make sure errors will be reported - set -e - - # get sources - rm -rf grpc/ $(LIBGRPC_TAR) - - # get sources - wget $(SDK_SOURCE_URL)/$(LIBGRPC_TAR) - tar xf $(LIBGRPC_TAR) - - pushd grpc/ - find . -type f -exec touch {} + - - # Build the Debs - dpkg-buildpackage -us -uc -b -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $(SONIC_DPKG_ADMINDIR) - - popd - mv $(DERIVED_TARGETS) $* $(DEST)/ - -$(addprefix $(DEST)/, $(DERIVED_TARGETS)): $(DEST)/% : $(DEST)/$(MAIN_TARGET) diff --git a/platform/pddf/i2c/modules/Makefile b/platform/pddf/i2c/modules/Makefile index a6a76821406..2282b8cac78 100644 --- a/platform/pddf/i2c/modules/Makefile +++ b/platform/pddf/i2c/modules/Makefile @@ -1 +1 @@ -obj-m := client/ cpld/ cpldmux/ fpgai2c/ fpgapci/ multifpgapci/ xcvr/ mux/ gpio/ psu/ fan/ led/ sysstatus/ +obj-m := client/ cpld/ cpldmux/ fpgai2c/ fpgapci/ multifpgapci/ xcvr/ mux/ gpio/ psu/ fan/ led/ sysstatus/ spi/ diff --git a/platform/pddf/i2c/modules/cpldmux/driver/pddf_cpldmux_driver.c b/platform/pddf/i2c/modules/cpldmux/driver/pddf_cpldmux_driver.c index 530254141e9..24614170ee4 100755 --- a/platform/pddf/i2c/modules/cpldmux/driver/pddf_cpldmux_driver.c +++ b/platform/pddf/i2c/modules/cpldmux/driver/pddf_cpldmux_driver.c @@ -100,12 +100,6 @@ int pddf_cpldmux_select_default(struct i2c_mux_core *muxc, uint32_t chan) switch (pdata->dev_type) { case CPLD_MUX: // cpld_mux - pddf_dbg( - CPLDMUX, - KERN_INFO - "%s: Writing 0x%x at 0x%x offset of cpld 0x%x to enable chan %d\n", - __FUNCTION__, sdata->cpld_sel, - sdata->cpld_offset, sdata->cpld_devaddr, chan); ret = cpldmux_byte_write( pdata->cpld, sdata->cpld_offset, (uint8_t)(sdata->cpld_sel & 0xff)); @@ -148,12 +142,6 @@ int pddf_cpldmux_deselect_default(struct i2c_mux_core *muxc, uint32_t chan) sdata = &pdata->chan_data[chan]; switch (pdata->dev_type) { case CPLD_MUX: - pddf_dbg( - CPLDMUX, - KERN_INFO - "%s: Writing 0x%x at 0x%x offset of cpld 0x%x to disable chan %d", - __FUNCTION__, sdata->cpld_desel, sdata->cpld_offset, - sdata->cpld_devaddr, chan); ret = cpldmux_byte_write(pdata->cpld, sdata->cpld_offset, (uint8_t)(sdata->cpld_desel)); break; diff --git a/platform/pddf/i2c/modules/fan/driver/pddf_fan_api.c b/platform/pddf/i2c/modules/fan/driver/pddf_fan_api.c index 5e83837d23e..76a88064091 100644 --- a/platform/pddf/i2c/modules/fan/driver/pddf_fan_api.c +++ b/platform/pddf/i2c/modules/fan/driver/pddf_fan_api.c @@ -687,9 +687,7 @@ int sonic_i2c_get_fan_rpm_default(void *client, FAN_DATA_ATTR *udata, void *info goto ret; if (udata->mask != 0) { - val &= udata->mask; - int bit_shift = count_trailing_zeros(udata->mask); - val >>= bit_shift; + val = (int)(((uint32_t)val & udata->mask) >> count_trailing_zeros(udata->mask)); } skip_neg_check = true; } @@ -702,7 +700,6 @@ int sonic_i2c_get_fan_rpm_default(void *client, FAN_DATA_ATTR *udata, void *info else if (udata->len ==2) { val = i2c_smbus_read_word_swapped((struct i2c_client *)client, udata->offset); - } } @@ -780,13 +777,19 @@ int sonic_i2c_set_fan_pwm_default(struct i2c_client *client, FAN_DATA_ATTR *udat int val = 0; struct fan_attr_info *painfo = (struct fan_attr_info *)info; - val = painfo->val.intval & udata->mask; + val = painfo->val.intval; if (val > 255) { return -EINVAL; } + if (strcmp(udata->devtype, "multifpgapci") == 0) + { + val <<= count_trailing_zeros(udata->mask); + } + val &= udata->mask; + if (strcmp(udata->devtype, "cpld") == 0) { status = fan_cpld_client_write(udata, val); @@ -829,6 +832,7 @@ int sonic_i2c_get_fan_pwm_default(void *client, FAN_DATA_ATTR *udata, void *info int status = 0; int val = 0; bool skip_neg_check = false; + bool skip_mask = false; struct fan_attr_info *painfo = (struct fan_attr_info *)info; if (strcmp(udata->devtype, "cpld") == 0) @@ -845,7 +849,11 @@ int sonic_i2c_get_fan_pwm_default(void *client, FAN_DATA_ATTR *udata, void *info if (status) goto ret; + if (udata->mask != 0) { + val = (int)(((uint32_t)val & udata->mask) >> count_trailing_zeros(udata->mask)); + } skip_neg_check = true; + skip_mask = true; } else { @@ -856,14 +864,15 @@ int sonic_i2c_get_fan_pwm_default(void *client, FAN_DATA_ATTR *udata, void *info else if (udata->len ==2) { val = i2c_smbus_read_word_swapped((struct i2c_client *)client, udata->offset); - + } } if (!skip_neg_check && val < 0) { status = val; } else { - val = val & udata->mask; + if (!skip_mask) + val = val & udata->mask; painfo->val.intval = val; } @@ -1000,6 +1009,7 @@ int sonic_i2c_get_fan_dc_default(void *client, FAN_DATA_ATTR *udata, void *info) int val = 0; uint32_t dc = 0; bool skip_neg_check = false; + bool skip_mask = false; struct fan_attr_info *painfo = (struct fan_attr_info *)info; if (strcmp(udata->devtype, "cpld") == 0) @@ -1016,7 +1026,11 @@ int sonic_i2c_get_fan_dc_default(void *client, FAN_DATA_ATTR *udata, void *info) if (status) goto ret; + if (udata->mask != 0) { + val = (int)(((uint32_t)val & udata->mask) >> count_trailing_zeros(udata->mask)); + } skip_neg_check = true; + skip_mask = true; } else { @@ -1034,7 +1048,8 @@ int sonic_i2c_get_fan_dc_default(void *client, FAN_DATA_ATTR *udata, void *info) if (!skip_neg_check && val < 0) { status = val; } else { - val = val & udata->mask; + if (!skip_mask) + val = val & udata->mask; /* val is the fan_pwm which needs to be converted to duty cycle */ if (pddf_fan_funcs.reg_value_to_duty_cycle) { @@ -1077,6 +1092,10 @@ int sonic_i2c_set_fan_dc_default(void *client, FAN_DATA_ATTR *udata, void *info) reg_val = val; } + if (strcmp(udata->devtype, "multifpgapci") == 0) + { + reg_val <<= count_trailing_zeros(udata->mask); + } reg_val = reg_val & udata->mask; if (strcmp(udata->devtype, "cpld") == 0) diff --git a/platform/pddf/i2c/modules/include/pddf_client_defs.h b/platform/pddf/i2c/modules/include/pddf_client_defs.h index 2620986dbcb..e2999a097f6 100644 --- a/platform/pddf/i2c/modules/include/pddf_client_defs.h +++ b/platform/pddf/i2c/modules/include/pddf_client_defs.h @@ -31,10 +31,12 @@ #define FPGAI2C "PDDF_FPGAI2C" #define MUX "PDDF_MUX" #define GPIO "PDDF_GPIO" +#define SPI "PDDF_SPI" #define SYSSTATUS "PDDF_SYSSTATUS" #define XCVR "PDDF_XCVR" #define FPGA "PDDF_FPGAPCI" #define MULTIFPGA "PDDF_MULTIFPGAPCI" +#define I2C_XIIC "PDDF_I2C_XIIC" #define PDDF_DEBUG diff --git a/platform/pddf/i2c/modules/include/pddf_multifpgapci_defs.h b/platform/pddf/i2c/modules/include/pddf_multifpgapci_defs.h index 07d420dbb6b..31dbbe248b8 100644 --- a/platform/pddf/i2c/modules/include/pddf_multifpgapci_defs.h +++ b/platform/pddf/i2c/modules/include/pddf_multifpgapci_defs.h @@ -20,13 +20,16 @@ #include "linux/types.h" #include +#include #include "pddf_multifpgapci_gpio_defs.h" #include "pddf_multifpgapci_i2c_defs.h" +#include "pddf_multifpgapci_i2c_xiic_defs.h" #include "pddf_multifpgapci_mdio_defs.h" #define NAME_SIZE 32 - +#define MAX_NUM_MSI_VECTORS 3 +#define REG_ADDR_BITS 32 #ifndef KOBJ_FREE #define KOBJ_FREE(obj) \ if (obj) \ @@ -39,6 +42,17 @@ struct pddf_multifpgapci_drvdata { void *__iomem fpga_data_base_addr; size_t bar_length; bool bar_initialized; + + // IRQ data + unsigned int num_msi_vectors; + struct regmap_config regmap_config; + // allocated by regmap_init_* and freed by regmap_exit + struct regmap *regmap; + struct regmap_irq *regmap_irqs[MAX_NUM_MSI_VECTORS]; + char irq_chip_names[MAX_NUM_MSI_VECTORS][NAME_SIZE]; + struct regmap_irq_chip chip[MAX_NUM_MSI_VECTORS]; + // allocated by regmap_add_irq_chip and freed by regmap_del_irq_chip + struct regmap_irq_chip_data *msi_domain_irq_chip_data[MAX_NUM_MSI_VECTORS]; }; // FPGA diff --git a/platform/pddf/i2c/modules/include/pddf_multifpgapci_i2c_xiic_defs.h b/platform/pddf/i2c/modules/include/pddf_multifpgapci_i2c_xiic_defs.h new file mode 100644 index 00000000000..3f5d782d04c --- /dev/null +++ b/platform/pddf/i2c/modules/include/pddf_multifpgapci_i2c_xiic_defs.h @@ -0,0 +1,70 @@ +/* + * Copyright 2025 Nexthop Systems Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __PDDF_MULTIFPGAPCI_I2C_XIIC_DEFS_H__ +#define __PDDF_MULTIFPGAPCI_I2C_XIIC_DEFS_H__ + +#include +#include "linux/types.h" +#include +#include +#include + +#include "pddf_client_defs.h" + +#define I2C_XIIC_MAX_BUS 512 + +struct i2c_xiic_attrs { + PDDF_ATTR attr_virt_bus; + PDDF_ATTR attr_ch_base_offset; + PDDF_ATTR attr_ch_size; + PDDF_ATTR attr_num_virt_ch; + PDDF_ATTR attr_new_i2c_xiic_adapter; + PDDF_ATTR attr_del_i2c_xiic_adapter; +}; + +#define NUM_I2C_XIIC_ATTRS \ + (sizeof(struct i2c_xiic_attrs) / sizeof(PDDF_ATTR)) + +struct i2c_xiic_sysfs_vals { + uint32_t virt_bus; + uint32_t ch_base_offset; + uint32_t ch_size; + uint32_t num_virt_ch; +}; + + +struct i2c_xiic_adapter_drvdata { + struct pci_dev *pci_dev; + struct kobject *i2c_xiic_kobj; + + // temp_sysfs_vals store temporary values provided by sysfs, + // which are eventually copied/saved to I2C XIIC adapter platform data. + struct i2c_xiic_sysfs_vals temp_sysfs_vals; + + // platform data + bool i2c_xiic_adapter_registered[I2C_XIIC_MAX_BUS]; + struct platform_device *platform_devices[I2C_XIIC_MAX_BUS]; + uint32_t virt_bus; + uint32_t ch_size; + uint32_t num_virt_ch; + unsigned long ch_base_offset_bar; + + // sysfs attrs + struct i2c_xiic_attrs attrs; + struct attribute *i2c_xiic_attrs[NUM_I2C_XIIC_ATTRS + 1]; + struct attribute_group i2c_xiic_attr_group; +}; + +#endif diff --git a/platform/pddf/i2c/modules/include/pddf_multifpgapci_spi_defs.h b/platform/pddf/i2c/modules/include/pddf_multifpgapci_spi_defs.h new file mode 100644 index 00000000000..796e8d087fd --- /dev/null +++ b/platform/pddf/i2c/modules/include/pddf_multifpgapci_spi_defs.h @@ -0,0 +1,70 @@ +/* + * Copyright 2025 Nexthop Systems Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __PDDF_MULTIFPGAPCI_SPI_DEFS_H__ +#define __PDDF_MULTIFPGAPCI_SPI_DEFS_H__ + +#include "linux/platform_device.h" +#include "linux/types.h" +#include +#include +#include +#include +#include + +#include "pddf_client_defs.h" + +#define NAME_SIZE 32 +#define NUM_SPI_CONTROLLERS_MAX 8 + +struct spi_controller_attrs { + PDDF_ATTR attr_virt_spi_controllers; + PDDF_ATTR attr_virt_spi_controller_size; + PDDF_ATTR attr_spi_base_addr; + PDDF_ATTR attr_new_spi_controller; + PDDF_ATTR attr_del_spi_controller; + PDDF_ATTR attr_spi_num_cs; + PDDF_ATTR attr_spi_driver; + PDDF_ATTR attr_spi_controller_name; +}; + +#define NUM_SPI_CONTROLLER_ATTRS \ + (sizeof(struct spi_controller_attrs) / sizeof(PDDF_ATTR)) + +struct spi_controller_sysfs_vals { + uint32_t virt_spi_controllers; + uint32_t virt_spi_controller_size; + uint32_t spi_base_addr; + uint32_t spi_num_cs; + char spi_driver[NAME_SIZE]; + char spi_controller_name[NAME_SIZE]; +}; + +struct spi_controller_drvdata { + struct kobject *spi_kobj; + void __iomem *bar_base; + unsigned long bar_start; + unsigned long bar_len; + // temp_sysfs_vals store temporary values provided by sysfs, + // which are eventually copied/saved to SPI controller platform data. + struct spi_controller_sysfs_vals temp_sysfs_vals; + struct platform_device *spi_controllers[NUM_SPI_CONTROLLERS_MAX]; + char spi_controller_name[NAME_SIZE]; + // sysfs attrs + struct spi_controller_attrs attrs; + struct attribute *spi_controller_attrs[NUM_SPI_CONTROLLER_ATTRS + 1]; + struct attribute_group spi_controller_attr_group; +}; + +#endif diff --git a/platform/pddf/i2c/modules/include/pddf_psu_defs.h b/platform/pddf/i2c/modules/include/pddf_psu_defs.h index e30ea3da861..d2853b083c4 100644 --- a/platform/pddf/i2c/modules/include/pddf_psu_defs.h +++ b/platform/pddf/i2c/modules/include/pddf_psu_defs.h @@ -42,6 +42,7 @@ typedef struct PSU_DATA_ATTR uint32_t mask; uint32_t cmpval; uint32_t len; + uint32_t vout_mode; int m; int b; int r; diff --git a/platform/pddf/i2c/modules/led/pddf_led_module.c b/platform/pddf/i2c/modules/led/pddf_led_module.c index 38e9b3edc39..bccc1bf766f 100644 --- a/platform/pddf/i2c/modules/led/pddf_led_module.c +++ b/platform/pddf/i2c/modules/led/pddf_led_module.c @@ -32,7 +32,7 @@ #define DEBUG 0 #define MAX_PSU_NUM 2 -#define MAX_FANTRAY_NUM 6 +#define MAX_FANTRAY_NUM 8 #define MAX_PORT_NUM (48 * 8) LED_OPS_DATA sys_led_ops_data[1]={0}; LED_OPS_DATA psu_led_ops_data[MAX_PSU_NUM]={0}; diff --git a/platform/pddf/i2c/modules/multifpgapci/Makefile b/platform/pddf/i2c/modules/multifpgapci/Makefile index e862c936d69..50b8454b547 100644 --- a/platform/pddf/i2c/modules/multifpgapci/Makefile +++ b/platform/pddf/i2c/modules/multifpgapci/Makefile @@ -1,4 +1,4 @@ -obj-m := driver/ gpio/ i2c/ mdio/ +obj-m := driver/ gpio/ spi/ i2c/ i2c-xiic/ mdio/ obj-m += pddf_multifpgapci_module.o ccflags-y := -I$(M)/modules/include diff --git a/platform/pddf/i2c/modules/multifpgapci/driver/pddf_multifpgapci_driver.c b/platform/pddf/i2c/modules/multifpgapci/driver/pddf_multifpgapci_driver.c index a43dd8d5c73..9521113d6b0 100644 --- a/platform/pddf/i2c/modules/multifpgapci/driver/pddf_multifpgapci_driver.c +++ b/platform/pddf/i2c/modules/multifpgapci/driver/pddf_multifpgapci_driver.c @@ -56,6 +56,22 @@ #define DEBUG 0 #define DRIVER_NAME "pddf_multifpgapci" #define MAX_PCI_NUM_BARS 6 +#define IRQ_BASE 0 +#define IRQ_FLAGS 0 +/* Macros for defining IRQ lines. Use DYNAMIC_IRQ_REG_ENABLED for active lines. + * DYNAMIC_IRQ_REG_DISABLED forces the mask to 0 so the interrupt is effectively + * disabled, can be used to for reserved lines so that hw_irq have the same + * offset as in hardware spec. + * + * _id: The hw_irq index (e.g., 0,1,2...) + * _width: The register width (e.g., 32) + */ +#define DYNAMIC_IRQ_REG_ENABLED(_id, _width) \ + ((struct regmap_irq){.reg_offset = (_id) / (_width), \ + .mask = BIT((_id) % (_width))}) +#define DYNAMIC_IRQ_REG_DISABLED(_id, _width) \ + ((struct regmap_irq){.reg_offset = (_id) / (_width), \ + .mask = 0}) extern void add_device_table(char *name, void *ptr); extern void* get_device_table(char *name); @@ -274,10 +290,9 @@ void delete_all_fpga_data_nodes(void) struct fpga_data_node *node, *tmp; struct list_head local_list; - // Clear the global list after copying over the pointer + // Clear the global list after moving it to local mutex_lock(&fpga_list_lock); - local_list = fpga_list; - INIT_LIST_HEAD(&fpga_list); + list_replace_init(&fpga_list, &local_list); mutex_unlock(&fpga_list_lock); // Work on the local copy without the need for a lock @@ -398,64 +413,203 @@ static int pddf_pci_add_fpga(char *bdf, struct pci_dev *dev) return ret; } +static int fpgapci_init(struct pci_dev *pci_dev, + struct fpga_data_node *fpga_node, + unsigned n_msi_vectors, unsigned reg_width) { + struct pddf_multifpgapci_drvdata *pci_privdata = + (struct pddf_multifpgapci_drvdata *)dev_get_drvdata(&pci_dev->dev); + + int ret = 0; + + ret = map_bars(fpga_node->bdf, pci_privdata, pci_dev); + if (ret) { + pddf_dbg(MULTIFPGA, KERN_ERR "error_map_bars\n"); + return ret; + } + + pci_privdata->num_msi_vectors = 0; + if (n_msi_vectors > 0) { + // Allocate MSI vectors + ret = pci_alloc_irq_vectors(pci_dev, n_msi_vectors, n_msi_vectors, + PCI_IRQ_MSIX | PCI_IRQ_MSI); + if (ret < 0) { + printk("%s: [%s] failed to allocate %u MSI vectors. " + "dev:%s err:%#x\n", + MULTIFPGA, __FUNCTION__, n_msi_vectors, pci_name(pci_dev), + ret); + goto free_bars; + } + pddf_dbg(MULTIFPGA, KERN_INFO "[%s] allocated %d MSI vectors", + __FUNCTION__, ret); + pci_privdata->num_msi_vectors = ret; + + // regmap + pci_privdata->regmap_config = (struct regmap_config){ + .reg_bits = REG_ADDR_BITS, + .val_bits = reg_width, + .reg_stride = reg_width / 8, + .cache_type = REGCACHE_NONE, + .fast_io = true, + }; + pci_privdata->regmap = + regmap_init_mmio(&pci_dev->dev, pci_privdata->fpga_data_base_addr, + &pci_privdata->regmap_config); + if (IS_ERR(pci_privdata->regmap)) { + pddf_dbg(MULTIFPGA, KERN_ERR "[%s] regmap_init failed", + __FUNCTION__); + ret = PTR_ERR(pci_privdata->regmap); + pci_privdata->regmap = NULL; + goto free_vector; + } + } + + if (pddf_multi_fpgapci_ops.post_device_operation) { + pddf_dbg(MULTIFPGA, KERN_INFO "[%s] Invoking post_device_operation\n", + __FUNCTION__); + ret = pddf_multi_fpgapci_ops.post_device_operation(pci_dev); + if (ret) { + pddf_dbg(MULTIFPGA, + KERN_ERR + "[%s] post_device_operation failed with error %d\n", + __FUNCTION__, ret); + goto free_regmap; + } + } + + return 0; + +free_regmap: + if (pci_privdata->regmap) { + regmap_exit(pci_privdata->regmap); + pci_privdata->regmap = NULL; + } + +free_vector: + if (pci_privdata->num_msi_vectors) { + pci_free_irq_vectors(pci_dev); + pci_privdata->num_msi_vectors = 0; + } + +free_bars: + free_bars(pci_privdata, pci_dev); + return ret; +} + +static int register_msi_domain(struct pci_dev *pci_dev, + unsigned msi_vector_number, + const char *irq_chip_name, unsigned unmask_reg, + unsigned status_reg, + unsigned int irq_line_mask) { + struct pddf_multifpgapci_drvdata *pci_privdata = + (struct pddf_multifpgapci_drvdata *)dev_get_drvdata(&pci_dev->dev); + if (!pci_privdata) { + printk("[%s] Failed to get pci_privdata\n", __FUNCTION__); + return -ENODEV; + } + + int irq = pci_irq_vector(pci_dev, msi_vector_number); + pddf_dbg(MULTIFPGA, KERN_ERR "[%s] %s: got irq %d for MSI vector %d", + __FUNCTION__, pci_name(pci_dev), irq, msi_vector_number); + if (irq < 0) { + return irq; + } + + const unsigned reg_width = pci_privdata->regmap_config.val_bits; + struct regmap_irq *regmap_irqs = + kcalloc(reg_width, sizeof(struct regmap_irq), GFP_KERNEL); + if (!regmap_irqs) + return -ENOMEM; + for (unsigned i = 0; i < reg_width; ++i) { + if (irq_line_mask & BIT(i)) { + regmap_irqs[i] = DYNAMIC_IRQ_REG_ENABLED(i, reg_width); + } else { + regmap_irqs[i] = DYNAMIC_IRQ_REG_DISABLED(i, reg_width); + } + } + pci_privdata->regmap_irqs[msi_vector_number] = regmap_irqs; + + snprintf(pci_privdata->irq_chip_names[msi_vector_number], NAME_SIZE, + "%s-%s", pci_name(pci_dev), irq_chip_name); + pci_privdata->chip[msi_vector_number] = (struct regmap_irq_chip){ + .name = pci_privdata->irq_chip_names[msi_vector_number], + .irqs = pci_privdata->regmap_irqs[msi_vector_number], + .num_irqs = reg_width, + .num_regs = 1, + .unmask_base = unmask_reg, + .status_base = status_reg, + .ack_base = status_reg, + }; + + int err = regmap_add_irq_chip( + pci_privdata->regmap, irq, IRQ_FLAGS, IRQ_BASE, + &pci_privdata->chip[msi_vector_number], + &pci_privdata->msi_domain_irq_chip_data[msi_vector_number]); + if (err) { + pddf_dbg(MULTIFPGA, + KERN_ERR "[%s] add_irq_chip failed for dev:%s " + ", i=%d , err=%d", + __FUNCTION__, pci_name(pci_dev), msi_vector_number, err); + goto free_regmap_irqs; + } + + return 0; + +free_regmap_irqs: + kfree(pci_privdata->regmap_irqs[msi_vector_number]); + pci_privdata->regmap_irqs[msi_vector_number] = NULL; + return err; +} + ssize_t dev_operation(struct device *dev, struct device_attribute *da, - const char *buf, size_t count) -{ + const char *buf, size_t count) { + pddf_dbg(MULTIFPGA, KERN_INFO "%s ..\n", __FUNCTION__); PDDF_ATTR *ptr = (PDDF_ATTR *)da; NEW_DEV_ATTR *cdata = (NEW_DEV_ATTR *)(ptr->data); struct pci_dev *pci_dev = NULL; + int ret = 0; if (strncmp(buf, "fpgapci_init", strlen("fpgapci_init")) == 0) { - pddf_dbg(MULTIFPGA, KERN_INFO "%s ..\n", __FUNCTION__); - int err = 0; - struct pddf_multifpgapci_drvdata *pci_privdata = 0; + unsigned int n_msi_vectors, reg_width; + int sscanf_result = sscanf(buf, "fpgapci_init %u %u", &n_msi_vectors, + ®_width); + if (sscanf_result != 2) { + printk("%s: [%s] Failed to parse buf: %s\n", MULTIFPGA, + __FUNCTION__, buf); + return -EINVAL; + } + if (n_msi_vectors > MAX_NUM_MSI_VECTORS) { + printk("%s: [%s] requested number of MSI vectors (%d) exceeds max " + "of %d\n", + MULTIFPGA, __FUNCTION__, n_msi_vectors, MAX_NUM_MSI_VECTORS); + return -EINVAL; + } const char *bdf = dev->kobj.name; - struct fpga_data_node *fpga_node = get_fpga_data_node(bdf); + if (!fpga_node) { - pddf_dbg(MULTIFPGA, - KERN_ERR "[%s] no matching fpga data node\n", - __FUNCTION__); + pddf_dbg(MULTIFPGA, KERN_ERR "[%s] no matching fpga data node\n", + __FUNCTION__); return -ENODEV; } if (cdata->i2c_name[0] == 0) { - pddf_dbg(MULTIFPGA, - KERN_ERR "[%s] no i2c_name specified\n", - __FUNCTION__); + pddf_dbg(MULTIFPGA, KERN_ERR "[%s] no i2c_name specified\n", + __FUNCTION__); return -EINVAL; } - pddf_dbg(MULTIFPGA, KERN_INFO "Initializing %s as %s\n", cdata->i2c_name, bdf); - strscpy(fpga_node->dev_name, cdata->i2c_name, sizeof(fpga_node->dev_name)); + pddf_dbg(MULTIFPGA, KERN_INFO "Initializing %s as %s\n", + cdata->i2c_name, bdf); + strscpy(fpga_node->dev_name, cdata->i2c_name, + sizeof(fpga_node->dev_name)); // Save pci_dev to hash table for clients to use. pci_dev = fpga_node->dev; add_device_table(fpga_node->dev_name, (void *)pci_dev_get(pci_dev)); - pci_privdata = - (struct pddf_multifpgapci_drvdata *)dev_get_drvdata( - &pci_dev->dev); - - if (map_bars(bdf, pci_privdata, pci_dev)) { - pddf_dbg(MULTIFPGA, KERN_ERR "error_map_bars\n"); - pci_release_regions(pci_dev); - } + ret = fpgapci_init(pci_dev, fpga_node, n_msi_vectors, reg_width); + if (ret) + return ret; - if (pddf_multi_fpgapci_ops.post_device_operation) { - pddf_dbg(MULTIFPGA, - KERN_INFO - "[%s] Invoking post_device_operation\n", - __FUNCTION__); - err = pddf_multi_fpgapci_ops.post_device_operation( - pci_dev); - if (err) { - pddf_dbg( - MULTIFPGA, - KERN_ERR - "[%s] post_device_operation failed with error %d\n", - __FUNCTION__, err); - } - } } else if (strncmp(buf, "fpgapci_deinit", strlen("fpgapci_deinit")) == 0) { if (cdata->i2c_name[0] == 0) { pddf_dbg(MULTIFPGA, @@ -469,6 +623,28 @@ ssize_t dev_operation(struct device *dev, struct device_attribute *da, delete_device_table(cdata->i2c_name); pci_dev_put(pci_dev); } + } else if (strncmp(buf, "register_msi_domain", + strlen("register_msi_domain")) == 0) { + pci_dev = (struct pci_dev *)get_device_table(cdata->i2c_name); + unsigned int msi_domain, irq_line_mask, unmask_reg, status_reg; + char irq_chip_name[NAME_SIZE]; + int sscanf_result = sscanf(buf, "register_msi_domain %u %31s %x %x %x", &msi_domain, irq_chip_name, &irq_line_mask, + &unmask_reg, &status_reg); + if (sscanf_result != 5) { + printk("%s: [%s] Failed to parse buf: %s\n", MULTIFPGA, + __FUNCTION__, buf); + return -EINVAL; + } + if (msi_domain >= MAX_NUM_MSI_VECTORS) { + printk("%s: [%s] MSI domain %d out of range [0, %d)\n", MULTIFPGA, + __FUNCTION__, msi_domain, MAX_NUM_MSI_VECTORS); + return -EINVAL; + } + + ret = register_msi_domain(pci_dev, msi_domain, irq_chip_name, + unmask_reg, status_reg, irq_line_mask); + if (ret) + return ret; } return count; @@ -585,6 +761,8 @@ static void map_entire_bar(unsigned long barStart, unsigned long barLen, static void free_bars(struct pddf_multifpgapci_drvdata *pci_privdata, struct pci_dev *dev) { + if (!pci_privdata->fpga_data_base_addr) + return; // Notify all protocols about BAR unmapping before freeing run_unmap_bar(dev, pci_privdata->fpga_data_base_addr, pci_privdata->bar_start, pci_privdata->bar_length); @@ -623,16 +801,6 @@ static int pddf_multifpgapci_probe(struct pci_dev *dev, // Enable DMA pci_set_master(dev); - // Request MMIO/IOP resources - reserve PCI I/O and memory resources - // DRIVER_NAME shows up in /proc/iomem - if ((err = pci_request_regions(dev, DRIVER_NAME)) < 0) { - pddf_dbg(MULTIFPGA, - KERN_ERR - "[%s] pci_request_regions failed. dev:%s err:%#x\n", - __FUNCTION__, pci_name(dev), err); - goto error_pci_req; - } - pci_privdata = kzalloc(sizeof(struct pddf_multifpgapci_drvdata), GFP_KERNEL); @@ -689,6 +857,7 @@ EXPORT_SYMBOL(pddf_multifpgapci_register); static void pddf_multifpgapci_remove(struct pci_dev *dev) { + pddf_dbg(MULTIFPGA, KERN_INFO "[%s]\n", __FUNCTION__); struct pddf_multifpgapci_drvdata *pci_privdata = 0; if (dev == 0) { @@ -706,9 +875,22 @@ static void pddf_multifpgapci_remove(struct pci_dev *dev) } delete_fpga_data_node(pci_name(dev)); + + if (!IS_ERR_OR_NULL(pci_privdata->regmap)) + regmap_exit(pci_privdata->regmap); + for (unsigned i = 0; i < pci_privdata->num_msi_vectors; ++i) { + if (pci_privdata->msi_domain_irq_chip_data[i]) + regmap_del_irq_chip(pci_irq_vector(dev, i), + pci_privdata->msi_domain_irq_chip_data[i]); + } + for (unsigned i = 0; i < MAX_NUM_MSI_VECTORS; ++i) + kfree(pci_privdata->regmap_irqs[i]); + if (pci_privdata->num_msi_vectors) { + pci_free_irq_vectors(dev); + pci_privdata->num_msi_vectors = 0; + } free_bars(pci_privdata, dev); pci_disable_device(dev); - pci_release_regions(dev); kfree(pci_privdata); } @@ -720,8 +902,7 @@ static void cleanup_all_protocols(void) // Move the list to a local one to be able to process without lock mutex_lock(&protocol_modules_lock); - local_list = protocol_modules; - INIT_LIST_HEAD(&protocol_modules); + list_replace_init(&protocol_modules, &local_list); mutex_unlock(&protocol_modules_lock); // Work on local copy without any locks @@ -963,6 +1144,7 @@ static void run_bar_op_for_all_fpgas(struct protocol_module *proto, bool map) work_item->pci_dev = fpga_node->dev; work_item->kobj = fpga_node->kobj; work_item->map_bar = proto->ops->map_bar; + work_item->unmap_bar = proto->ops->unmap_bar; // Get bar length from pci_privdata struct pddf_multifpgapci_drvdata *pci_privdata = dev_get_drvdata(&fpga_node->dev->dev); @@ -979,18 +1161,18 @@ static void run_bar_op_for_all_fpgas(struct protocol_module *proto, bool map) // Execute work items without locks list_for_each_entry_safe(work_item, tmp, &work_list, list) { - if (work_item->map_bar) { - if (map) { + if (map) { + if (work_item->map_bar) work_item->map_bar(work_item->pci_dev, work_item->bar_base, work_item->bar_start, work_item->bar_len); - } else { + } else { + if (work_item->unmap_bar) work_item->unmap_bar(work_item->pci_dev, work_item->bar_base, work_item->bar_start, work_item->bar_len); - } } list_del(&work_item->list); kfree(work_item); diff --git a/platform/pddf/i2c/modules/multifpgapci/i2c-xiic/Makefile b/platform/pddf/i2c/modules/multifpgapci/i2c-xiic/Makefile new file mode 100644 index 00000000000..4c11fd46e03 --- /dev/null +++ b/platform/pddf/i2c/modules/multifpgapci/i2c-xiic/Makefile @@ -0,0 +1,3 @@ +obj-m += pddf_multifpgapci_i2c_xiic_module.o + +ccflags-y := -I$(M)/modules/include diff --git a/platform/pddf/i2c/modules/multifpgapci/i2c-xiic/pddf_multifpgapci_i2c_xiic_module.c b/platform/pddf/i2c/modules/multifpgapci/i2c-xiic/pddf_multifpgapci_i2c_xiic_module.c new file mode 100644 index 00000000000..3f9888ba5ce --- /dev/null +++ b/platform/pddf/i2c/modules/multifpgapci/i2c-xiic/pddf_multifpgapci_i2c_xiic_module.c @@ -0,0 +1,383 @@ +/* + * Copyright 2025 Nexthop Systems Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Description: + * Platform MULTIFPGAPCI I2C XIIC module for plumbing sysfs values + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include "pddf_client_defs.h" +#include "pddf_multifpgapci_defs.h" +#include "pddf_multifpgapci_i2c_xiic_defs.h" + +DEFINE_XARRAY(i2c_xiic_drvdata_map); + +extern unsigned long multifpgapci_get_pci_dev_index(struct pci_dev *); +extern int multifpgapci_register_protocol(const char *, struct protocol_ops *); +extern void multifpgapci_unregister_protocol(const char *); + +ssize_t new_i2c_xiic_adapter(struct device *_dev, struct device_attribute *da, + const char *buf, size_t count) { + int index, msi_domain, hw_irq; + int sscanf_result = sscanf(buf, "%d %d %d", &index, &msi_domain, &hw_irq); + if (sscanf_result != 3) { + printk("%s: [%s] Failed to parse buf: %s\n", MULTIFPGA, __FUNCTION__, + buf); + return -EINVAL; + } + if (index < 0 || index >= I2C_XIIC_MAX_BUS) { + printk("%s: [%s] I2C XIIC Adapter %d out of range [0, %d)\n", I2C_XIIC, + __FUNCTION__, index, I2C_XIIC_MAX_BUS); + return -EINVAL; + } + if (msi_domain < 0 || msi_domain >= MAX_NUM_MSI_VECTORS) { + printk("%s: [%s] MSI domain %d out of range [0, %d)\n", I2C_XIIC, + __FUNCTION__, msi_domain, MAX_NUM_MSI_VECTORS); + return -EINVAL; + } + + struct pddf_data_attribute *_ptr = (struct pddf_data_attribute *)da; + struct pci_dev *pci_dev = (struct pci_dev *)_ptr->addr; + struct pddf_multifpgapci_drvdata *pci_privdata = pci_get_drvdata(pci_dev); + struct device *dev = &pci_dev->dev; + struct i2c_xiic_adapter_drvdata *i2c_xiic_privdata; + if (!pci_privdata) { + pddf_dbg( + I2C_XIIC, + KERN_ERR + "[%s] unable to retrieve pddf_multifpgapci_drvdata for device %s", + __FUNCTION__, pci_name(pci_dev)); + return -ENODEV; + } + + const int reg_width = pci_privdata->regmap_config.val_bits; + if (hw_irq < 0 || hw_irq >= reg_width) { + printk("%s: [%s] hw_irq %d out of range [0, %d)\n", I2C_XIIC, + __FUNCTION__, hw_irq, reg_width); + return -EINVAL; + } + + pddf_dbg(I2C_XIIC, + KERN_INFO "[%s] pci_dev %s index=%d msi_domain=%d hw_irq=%d\n", + __FUNCTION__, pci_name(pci_dev), index, msi_domain, hw_irq); + + unsigned dev_index = multifpgapci_get_pci_dev_index(pci_dev); + i2c_xiic_privdata = xa_load(&i2c_xiic_drvdata_map, dev_index); + if (!i2c_xiic_privdata) { + pddf_dbg(I2C_XIIC, + KERN_ERR + "[%s] unable to retrieve i2c_xiic_privdata for device %s", + __FUNCTION__, pci_name(pci_dev)); + return -ENODEV; + } + + if (i2c_xiic_privdata->i2c_xiic_adapter_registered[index]) { + pddf_dbg(I2C_XIIC, KERN_ERR "[%s] I2C XIIC Adapter %d already exists\n", + __FUNCTION__, index); + return -EEXIST; + } + + const int bus_num = i2c_xiic_privdata->virt_bus + index; + + int virq = regmap_irq_get_virq( + pci_privdata->msi_domain_irq_chip_data[msi_domain], hw_irq); + if (virq <= 0) { + pddf_dbg(I2C_XIIC, + KERN_ERR "[%s] failed to get virq for msi_domain=%d hw_irq=%d\n", + __FUNCTION__, msi_domain, hw_irq); + return virq; + } + pddf_dbg(I2C_XIIC, + KERN_INFO "[%s] got virq=%d for index=%d msi_domain=%d hw_irq=%d\n", + __FUNCTION__, virq, index, msi_domain, hw_irq); + + const struct resource res[] = { + DEFINE_RES_MEM((resource_size_t)(i2c_xiic_privdata->ch_base_offset_bar + + index * i2c_xiic_privdata->ch_size), + i2c_xiic_privdata->ch_size), + DEFINE_RES_IRQ(virq), + }; + + struct platform_device *platform_device = platform_device_register_resndata( + dev, "xiic-i2c", bus_num, res, ARRAY_SIZE(res), NULL, 0); + if (IS_ERR(platform_device)) { + pddf_dbg(I2C_XIIC, + KERN_ERR "[%s] platform_device_register_resndata failed for " + "i2c (index=%d)", + __FUNCTION__, index); + return PTR_ERR(platform_device); + } + + i2c_xiic_privdata->platform_devices[index] = platform_device; + i2c_xiic_privdata->i2c_xiic_adapter_registered[index] = true; + + return count; +} + +ssize_t del_i2c_xiic_adapter(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) { + int index, error; + + error = kstrtoint(buf, 10, &index); + if (error != 0) { + pddf_dbg(I2C_XIIC, KERN_ERR "Error converting string: %d\n", error); + return -EINVAL; + } + + if (index < 0 || index >= I2C_XIIC_MAX_BUS) { + pddf_dbg(I2C_XIIC, + KERN_ERR "[%s] I2C XIIC Adapter %d out of range [0, %d)\n", + __FUNCTION__, index, I2C_XIIC_MAX_BUS); + return -EINVAL; + } + + struct pddf_data_attribute *_ptr = (struct pddf_data_attribute *)da; + struct pci_dev *pci_dev = (struct pci_dev *)_ptr->addr; + struct i2c_xiic_adapter_drvdata *i2c_xiic_privdata; + + unsigned dev_index = multifpgapci_get_pci_dev_index(pci_dev); + i2c_xiic_privdata = xa_load(&i2c_xiic_drvdata_map, dev_index); + if (!i2c_xiic_privdata) { + pddf_dbg(I2C_XIIC, + KERN_ERR + "[%s] unable to retrieve i2c_xiic_privdata for device %s", + __FUNCTION__, pci_name(pci_dev)); + return -ENODEV; + } + + pddf_dbg(I2C_XIIC, + KERN_INFO + "[%s] Attempting delete of XIIC platform device index: %d\n", + __FUNCTION__, index); + + if (i2c_xiic_privdata->platform_devices[index]) { + platform_device_unregister(i2c_xiic_privdata->platform_devices[index]); + i2c_xiic_privdata->platform_devices[index] = NULL; + } + i2c_xiic_privdata->i2c_xiic_adapter_registered[index] = false; + + return count; +} + +static int pddf_multifpgapci_i2c_xiic_attach(struct pci_dev *pci_dev, struct kobject *kobj) { + pddf_dbg(I2C_XIIC, KERN_INFO "[%s] pci_dev %s\n", __FUNCTION__, + pci_name(pci_dev)); + struct i2c_xiic_adapter_drvdata *i2c_xiic_privdata; + int err; + + i2c_xiic_privdata = + kzalloc(sizeof(struct i2c_xiic_adapter_drvdata), GFP_KERNEL); + if (!i2c_xiic_privdata) + return -ENOMEM; + + i2c_xiic_privdata->pci_dev = pci_dev; + i2c_xiic_privdata->i2c_xiic_kobj = kobject_create_and_add("i2c-xiic", kobj); + if (!i2c_xiic_privdata->i2c_xiic_kobj) { + pddf_dbg(I2C_XIIC, KERN_ERR "[%s] create i2c-xiic kobj failed\n", + __FUNCTION__); + err = -ENOMEM; + goto free_privdata; + } + + PDDF_DATA_ATTR(virt_bus, S_IWUSR | S_IRUGO, show_pddf_data, store_pddf_data, + PDDF_UINT32, sizeof(uint32_t), + (void *)&i2c_xiic_privdata->temp_sysfs_vals.virt_bus, NULL); + PDDF_DATA_ATTR(ch_base_offset, S_IWUSR | S_IRUGO, show_pddf_data, + store_pddf_data, PDDF_UINT32, sizeof(uint32_t), + (void *)&i2c_xiic_privdata->temp_sysfs_vals.ch_base_offset, + NULL); + PDDF_DATA_ATTR(ch_size, S_IWUSR | S_IRUGO, show_pddf_data, store_pddf_data, + PDDF_UINT32, sizeof(uint32_t), + (void *)&i2c_xiic_privdata->temp_sysfs_vals.ch_size, NULL); + PDDF_DATA_ATTR(num_virt_ch, S_IWUSR | S_IRUGO, show_pddf_data, + store_pddf_data, PDDF_UINT32, sizeof(uint32_t), + (void *)&i2c_xiic_privdata->temp_sysfs_vals.num_virt_ch, + NULL); + PDDF_DATA_ATTR(new_i2c_xiic_adapter, S_IWUSR | S_IRUGO, show_pddf_data, + new_i2c_xiic_adapter, PDDF_CHAR, NAME_SIZE, (void *)pci_dev, + NULL); + PDDF_DATA_ATTR(del_i2c_xiic_adapter, S_IWUSR | S_IRUGO, show_pddf_data, + del_i2c_xiic_adapter, PDDF_CHAR, NAME_SIZE, (void *)pci_dev, + NULL); + + i2c_xiic_privdata->attrs.attr_virt_bus = attr_virt_bus; + i2c_xiic_privdata->attrs.attr_ch_base_offset = attr_ch_base_offset; + i2c_xiic_privdata->attrs.attr_ch_size = attr_ch_size; + i2c_xiic_privdata->attrs.attr_num_virt_ch = attr_num_virt_ch; + i2c_xiic_privdata->attrs.attr_new_i2c_xiic_adapter = + attr_new_i2c_xiic_adapter; + i2c_xiic_privdata->attrs.attr_del_i2c_xiic_adapter = + attr_del_i2c_xiic_adapter; + + struct attribute *i2c_xiic_attrs[NUM_I2C_XIIC_ATTRS + 1] = { + &i2c_xiic_privdata->attrs.attr_virt_bus.dev_attr.attr, + &i2c_xiic_privdata->attrs.attr_ch_base_offset.dev_attr.attr, + &i2c_xiic_privdata->attrs.attr_ch_size.dev_attr.attr, + &i2c_xiic_privdata->attrs.attr_num_virt_ch.dev_attr.attr, + &i2c_xiic_privdata->attrs.attr_new_i2c_xiic_adapter.dev_attr.attr, + &i2c_xiic_privdata->attrs.attr_del_i2c_xiic_adapter.dev_attr.attr, + NULL, + }; + + memcpy(i2c_xiic_privdata->i2c_xiic_attrs, i2c_xiic_attrs, + sizeof(i2c_xiic_privdata->i2c_xiic_attrs)); + + i2c_xiic_privdata->i2c_xiic_attr_group.attrs = + i2c_xiic_privdata->i2c_xiic_attrs; + + err = sysfs_create_group(i2c_xiic_privdata->i2c_xiic_kobj, + &i2c_xiic_privdata->i2c_xiic_attr_group); + if (err) { + pddf_dbg(I2C_XIIC, + KERN_ERR "[%s] sysfs_create_group error, status: %d\n", + __FUNCTION__, err); + goto put_kobj; + } + unsigned dev_index = multifpgapci_get_pci_dev_index(pci_dev); + void *old = xa_store(&i2c_xiic_drvdata_map, dev_index, i2c_xiic_privdata, GFP_KERNEL); + if (xa_is_err(old)) { + err = xa_err(old); + pddf_dbg(I2C_XIIC, + KERN_ERR "[%s] xa_store failed, status: %d\n", + __FUNCTION__, err); + goto remove_sysfs; + } + + return 0; + +remove_sysfs: + sysfs_remove_group(i2c_xiic_privdata->i2c_xiic_kobj, + &i2c_xiic_privdata->i2c_xiic_attr_group); + +put_kobj: + kobject_put(i2c_xiic_privdata->i2c_xiic_kobj); + +free_privdata: + kfree(i2c_xiic_privdata); + return err; +} + +static void pddf_multifpgapci_i2c_xiic_detach(struct pci_dev *pci_dev, struct kobject *kobj) { + struct i2c_xiic_adapter_drvdata *i2c_xiic_privdata; + pddf_dbg(I2C_XIIC, KERN_INFO "[%s] pci_dev %s\n", __FUNCTION__, + pci_name(pci_dev)); + + unsigned dev_index = multifpgapci_get_pci_dev_index(pci_dev); + i2c_xiic_privdata = xa_load(&i2c_xiic_drvdata_map, dev_index); + if (!i2c_xiic_privdata) { + pddf_dbg(I2C_XIIC, + KERN_ERR + "[%s] unable to find i2c xiic module data for device %s\n", + __FUNCTION__, pci_name(pci_dev)); + return; + } + + for (unsigned int i = 0; i < I2C_XIIC_MAX_BUS; i++) { + if (i2c_xiic_privdata->platform_devices[i]) + platform_device_unregister( + i2c_xiic_privdata->platform_devices[i]); + } + + if (i2c_xiic_privdata->i2c_xiic_kobj) { + sysfs_remove_group(i2c_xiic_privdata->i2c_xiic_kobj, + &i2c_xiic_privdata->i2c_xiic_attr_group); + kobject_put(i2c_xiic_privdata->i2c_xiic_kobj); + i2c_xiic_privdata->i2c_xiic_kobj = NULL; + } + + xa_erase(&i2c_xiic_drvdata_map, dev_index); + + kfree(i2c_xiic_privdata); + i2c_xiic_privdata = NULL; +} + +static void pddf_multifpgapci_i2c_xiic_map_bar(struct pci_dev *pci_dev, + void __iomem *bar_base, + unsigned long bar_start, + unsigned long bar_len) { + struct i2c_xiic_adapter_drvdata *i2c_xiic_privdata; + pddf_dbg(I2C_XIIC, KERN_INFO "[%s] pci_dev %s\n", __FUNCTION__, + pci_name(pci_dev)); + unsigned dev_index = multifpgapci_get_pci_dev_index(pci_dev); + i2c_xiic_privdata = xa_load(&i2c_xiic_drvdata_map, dev_index); + if (!i2c_xiic_privdata) { + pddf_dbg(I2C_XIIC, + KERN_ERR + "[%s] unable to find i2c xiic module data for device %s\n", + __FUNCTION__, pci_name(pci_dev)); + return; + } + // i2c xiic specific data store + struct i2c_xiic_sysfs_vals *i2c_xiic_pddf_data = + &i2c_xiic_privdata->temp_sysfs_vals; + + i2c_xiic_privdata->virt_bus = i2c_xiic_pddf_data->virt_bus; + i2c_xiic_privdata->num_virt_ch = i2c_xiic_pddf_data->num_virt_ch; + i2c_xiic_privdata->ch_size = i2c_xiic_pddf_data->ch_size; + i2c_xiic_privdata->ch_base_offset_bar = + bar_start + i2c_xiic_pddf_data->ch_base_offset; +} + +static void pddf_multifpgapci_i2c_xiic_unmap_bar(struct pci_dev *pci_dev, + void __iomem *bar_base, + unsigned long bar_start, + unsigned long bar_len) { + struct i2c_xiic_adapter_drvdata *i2c_xiic_privdata; + pddf_dbg(I2C_XIIC, KERN_INFO "[%s] pci_dev %s\n", __FUNCTION__, + pci_name(pci_dev)); + unsigned dev_index = multifpgapci_get_pci_dev_index(pci_dev); + i2c_xiic_privdata = xa_load(&i2c_xiic_drvdata_map, dev_index); + if (!i2c_xiic_privdata) { + pddf_dbg(I2C_XIIC, + KERN_ERR + "[%s] unable to find i2c xiic module data for device %s\n", + __FUNCTION__, pci_name(pci_dev)); + return; + } + i2c_xiic_privdata->ch_base_offset_bar = 0; +} + +static struct protocol_ops i2c_xiic_protocol_ops = { + .attach = pddf_multifpgapci_i2c_xiic_attach, + .detach = pddf_multifpgapci_i2c_xiic_detach, + .map_bar = pddf_multifpgapci_i2c_xiic_map_bar, + .unmap_bar = pddf_multifpgapci_i2c_xiic_unmap_bar, + .name = "i2c-xiic", +}; + +static int __init pddf_multifpgapci_i2c_xiic_init(void) { + pddf_dbg(I2C_XIIC, KERN_INFO "Loading I2C XIIC protocol module\n"); + xa_init(&i2c_xiic_drvdata_map); + return multifpgapci_register_protocol("i2c-xiic", &i2c_xiic_protocol_ops); +} + +static void __exit pddf_multifpgapci_i2c_xiic_exit(void) { + pddf_dbg(I2C_XIIC, KERN_INFO "Unloading I2C XIIC protocol module\n"); + multifpgapci_unregister_protocol("i2c-xiic"); + xa_destroy(&i2c_xiic_drvdata_map); +} + +module_init(pddf_multifpgapci_i2c_xiic_init); +module_exit(pddf_multifpgapci_i2c_xiic_exit); + +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("Nexthop Systems"); +MODULE_DESCRIPTION( + "PDDF Platform Data for Multiple PCI FPGA I2C XIIC adapters."); diff --git a/platform/pddf/i2c/modules/multifpgapci/spi/Makefile b/platform/pddf/i2c/modules/multifpgapci/spi/Makefile new file mode 100644 index 00000000000..682b2cd6f0b --- /dev/null +++ b/platform/pddf/i2c/modules/multifpgapci/spi/Makefile @@ -0,0 +1,3 @@ +obj-m := pddf_multifpgapci_spi_module.o + +ccflags-y := -I$(M)/modules/include diff --git a/platform/pddf/i2c/modules/multifpgapci/spi/pddf_multifpgapci_spi_module.c b/platform/pddf/i2c/modules/multifpgapci/spi/pddf_multifpgapci_spi_module.c new file mode 100644 index 00000000000..47e9aba79c9 --- /dev/null +++ b/platform/pddf/i2c/modules/multifpgapci/spi/pddf_multifpgapci_spi_module.c @@ -0,0 +1,418 @@ +/* + * Copyright 2025 Nexthop Systems Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Description: + * Platform MULTIFPGAPCI defines/structures header file + */ + +#include +#include +#include +#include +#include +#include +#include +#include "pddf_client_defs.h" +#include "pddf_multifpgapci_defs.h" +#include "pddf_multifpgapci_gpio_defs.h" +#include "pddf_multifpgapci_spi_defs.h" + +extern void delete_device_table(char *name); + +DEFINE_XARRAY(spi_drvdata_map); + +ssize_t new_spi_controller(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct pddf_data_attribute *_ptr = (struct pddf_data_attribute *)da; + struct pci_dev *pci_dev = (struct pci_dev *)_ptr->addr; + struct spi_controller_drvdata *spi_drvdata; + int index = 0, error; + + pddf_dbg(MULTIFPGA, KERN_INFO "[%s] pci_dev %s\n", __FUNCTION__, + pci_name(pci_dev)); + + unsigned dev_index = multifpgapci_get_pci_dev_index(pci_dev); + spi_drvdata = xa_load(&spi_drvdata_map, dev_index); + if (!spi_drvdata) { + pddf_dbg(MULTIFPGA, + KERN_ERR + "[%s] unable to find spi module data for device %s\n", + __FUNCTION__, pci_name(pci_dev)); + return -ENODEV; + } + + error = kstrtoint(buf, 10, &index); + if (error != 0) { + pddf_dbg(MULTIFPGA, KERN_ERR "Error converting string: %d\n", + error); + return error; + } + + if (index < 1) { + pddf_dbg(MULTIFPGA, KERN_ERR "%s: SPI Controller %d < 1\n", + __FUNCTION__, index); + return -ENODEV; + } + + if (index > NUM_SPI_CONTROLLERS_MAX) { + pddf_dbg(MULTIFPGA, KERN_ERR "%s: SPI Controller %d >= %d\n", + __FUNCTION__, index, NUM_SPI_CONTROLLERS_MAX); + return -ENODEV; + } + + // We're translating index here from 1 based (in sysfs) to 0 based + // (inside the driver) + index -= 1; + + if (spi_drvdata->spi_controllers[index]) { + pddf_dbg(MULTIFPGA, + KERN_ERR "%s: SPI Controller %d already exists\n", + __FUNCTION__, index); + return -ENODEV; + } + + unsigned long spi_start = spi_drvdata->bar_start + + spi_drvdata->temp_sysfs_vals.spi_base_addr; + pddf_dbg( + MULTIFPGA, + KERN_INFO + "%s: fpga_data_base_addr: 0x%08lx spi_start 0x%08lx index %d \n", + __FUNCTION__, spi_drvdata->bar_start, spi_start, + index); + + struct resource res = { 0 }; + + // Here we add 1 to index so the device will be spi1.cs (cs == chip select number) + struct platform_device *pdev = platform_device_alloc( + spi_drvdata->temp_sysfs_vals.spi_driver, index + 1); + + if (!pdev) { + return -ENOMEM; + } + + struct xspi_platform_data xpd = { 0 }; + xpd.bits_per_word = 8; + xpd.devices = NULL; + xpd.num_devices = 0; + xpd.num_chipselect = spi_drvdata->temp_sysfs_vals.spi_num_cs; + + res.start = spi_start; + res.end = spi_start + + spi_drvdata->temp_sysfs_vals.virt_spi_controller_size - 1; + res.flags = IORESOURCE_MEM; + platform_device_add_resources(pdev, &res, 1); + + pdev->dev.parent = &pci_dev->dev; + platform_device_add_data(pdev, &xpd, sizeof(xpd)); + + pddf_dbg(MULTIFPGA, KERN_INFO "[%s] Register platform dev %d\n", + __FUNCTION__, index); + int ret = platform_device_add(pdev); + if (ret) { + pddf_dbg(MULTIFPGA, + KERN_ERR "Cannot register platform device: %d\n", ret); + goto put_platform_device; + } + + spi_drvdata->spi_controllers[index] = pdev; + strscpy(spi_drvdata->spi_controller_name, + spi_drvdata->temp_sysfs_vals.spi_controller_name, + sizeof(spi_drvdata->spi_controller_name)); + + struct spi_controller *controller = platform_get_drvdata(pdev); + + pddf_dbg(MULTIFPGA, + KERN_INFO + "[%s] platform dev %d registered. name: %s. controller: %p\n", + __FUNCTION__, index, spi_drvdata->spi_controller_name, controller); + + add_device_table(spi_drvdata->spi_controller_name, controller); + return count; + +put_platform_device: + platform_device_put(pdev); + return ret; +} + +ssize_t del_spi_controller(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) +{ + struct pddf_data_attribute *_ptr = (struct pddf_data_attribute *)da; + struct pci_dev *pci_dev = (struct pci_dev *)_ptr->addr; + struct spi_controller_drvdata *spi_drvdata; + int index = 0, error; + + pddf_dbg(MULTIFPGA, KERN_INFO "[%s] pci_dev %s\n", __FUNCTION__, + pci_name(pci_dev)); + + unsigned dev_index = multifpgapci_get_pci_dev_index(pci_dev); + spi_drvdata = xa_load(&spi_drvdata_map, dev_index); + if (!spi_drvdata) { + pddf_dbg(MULTIFPGA, + KERN_ERR + "[%s] unable to find spi module data for device %s\n", + __FUNCTION__, pci_name(pci_dev)); + return -ENODEV; + } + + error = kstrtoint(buf, 10, &index); + if (error != 0) { + pddf_dbg(MULTIFPGA, KERN_ERR "Error converting string: %d\n", + error); + return error; + } + + if (index < 1) { + pddf_dbg(MULTIFPGA, KERN_ERR "%s: SPI Controller %d < 1\n", + __FUNCTION__, index); + return -ENODEV; + } + + if (index > NUM_SPI_CONTROLLERS_MAX) { + pddf_dbg(MULTIFPGA, KERN_ERR "%s: SPI Controller %d >= %d\n", + __FUNCTION__, index, NUM_SPI_CONTROLLERS_MAX); + return -ENODEV; + } + + // We're translating index here from 1 based (in sysfs) to 0 based + // (inside the driver) + index -= 1; + + if (spi_drvdata->spi_controllers[index] == NULL) { + pddf_dbg(MULTIFPGA, + KERN_ERR "%s: SPI Controller %d doesn't exist\n", + __FUNCTION__, index); + return -ENODEV; + } + + pddf_dbg(MULTIFPGA, KERN_INFO "[%s] Unregister platform dev %d\n", + __FUNCTION__, index); + platform_device_unregister(spi_drvdata->spi_controllers[index]); + spi_drvdata->spi_controllers[index] = NULL; + delete_device_table(spi_drvdata->spi_controller_name); + + return count; +} + +static int pddf_multifpgapci_spi_attach(struct pci_dev *pci_dev, + struct kobject *kobj) +{ + pddf_dbg(MULTIFPGA, KERN_INFO "[%s] pci_dev %s\n", __FUNCTION__, + pci_name(pci_dev)); + struct spi_controller_drvdata *spi_drvdata; + int err; + + spi_drvdata = + kzalloc(sizeof(struct spi_controller_drvdata), GFP_KERNEL); + if (!spi_drvdata) { + pddf_dbg(MULTIFPGA, + KERN_ERR "[%s] failed to allocate drvdata for %s\n", + __FUNCTION__, pci_name(pci_dev)); + return -ENOMEM; + } + + spi_drvdata->spi_kobj = kobject_create_and_add("spi", kobj); + if (!spi_drvdata->spi_kobj) { + pddf_dbg(MULTIFPGA, + KERN_ERR "[%s] create spi kobj failed for %s\n", + __FUNCTION__, pci_name(pci_dev)); + return -ENOMEM; + } + + PDDF_DATA_ATTR( + new_spi_controller, S_IWUSR | S_IRUGO, show_pddf_data, + new_spi_controller, PDDF_CHAR, NAME_SIZE, (void *)pci_dev, + NULL); + PDDF_DATA_ATTR( + del_spi_controller, S_IWUSR | S_IRUGO, show_pddf_data, + del_spi_controller, PDDF_CHAR, NAME_SIZE, (void *)pci_dev, + NULL); + PDDF_DATA_ATTR( + virt_spi_controllers, S_IWUSR | S_IRUGO, show_pddf_data, + store_pddf_data, PDDF_UINT32, sizeof(uint32_t), + (void *)&spi_drvdata->temp_sysfs_vals.virt_spi_controllers, + NULL); + PDDF_DATA_ATTR( + virt_spi_controller_size, S_IWUSR | S_IRUGO, show_pddf_data, + store_pddf_data, PDDF_UINT32, sizeof(uint32_t), + (void *)&spi_drvdata->temp_sysfs_vals.virt_spi_controller_size, + NULL); + PDDF_DATA_ATTR( + spi_base_addr, S_IWUSR | S_IRUGO, show_pddf_data, + store_pddf_data, PDDF_UINT32, sizeof(uint32_t), + (void *)&spi_drvdata->temp_sysfs_vals.spi_base_addr, NULL); + PDDF_DATA_ATTR( + spi_num_cs, S_IWUSR | S_IRUGO, show_pddf_data, store_pddf_data, + PDDF_UINT32, sizeof(uint32_t), + (void *)&spi_drvdata->temp_sysfs_vals.spi_num_cs, NULL); + PDDF_DATA_ATTR( + spi_driver, S_IWUSR | S_IRUGO, show_pddf_data, store_pddf_data, + PDDF_CHAR, NAME_SIZE, + (void *)spi_drvdata->temp_sysfs_vals.spi_driver, NULL); + PDDF_DATA_ATTR( + spi_controller_name, S_IWUSR | S_IRUGO, show_pddf_data, + store_pddf_data, PDDF_CHAR, NAME_SIZE, + (void *)spi_drvdata->temp_sysfs_vals.spi_controller_name, NULL); + + spi_drvdata->attrs.attr_new_spi_controller = attr_new_spi_controller; + spi_drvdata->attrs.attr_del_spi_controller = attr_del_spi_controller; + spi_drvdata->attrs.attr_virt_spi_controllers = attr_virt_spi_controllers; + spi_drvdata->attrs.attr_virt_spi_controller_size = + attr_virt_spi_controller_size; + spi_drvdata->attrs.attr_spi_base_addr = attr_spi_base_addr; + spi_drvdata->attrs.attr_spi_num_cs = attr_spi_num_cs; + spi_drvdata->attrs.attr_spi_driver = attr_spi_driver; + spi_drvdata->attrs.attr_spi_controller_name = attr_spi_controller_name; + + struct attribute *spi_controller_attrs[NUM_SPI_CONTROLLER_ATTRS + 1] = { + &spi_drvdata->attrs.attr_new_spi_controller.dev_attr.attr, + &spi_drvdata->attrs.attr_del_spi_controller.dev_attr.attr, + &spi_drvdata->attrs.attr_virt_spi_controllers.dev_attr.attr, + &spi_drvdata->attrs.attr_virt_spi_controller_size.dev_attr.attr, + &spi_drvdata->attrs.attr_spi_base_addr.dev_attr.attr, + &spi_drvdata->attrs.attr_spi_num_cs.dev_attr.attr, + &spi_drvdata->attrs.attr_spi_driver.dev_attr.attr, + &spi_drvdata->attrs.attr_spi_controller_name.dev_attr.attr, + NULL, + }; + + memcpy(spi_drvdata->spi_controller_attrs, spi_controller_attrs, + sizeof(spi_drvdata->spi_controller_attrs)); + + spi_drvdata->spi_controller_attr_group.attrs = + spi_drvdata->spi_controller_attrs; + + err = sysfs_create_group(spi_drvdata->spi_kobj, + &spi_drvdata->spi_controller_attr_group); + if (err) { + pddf_dbg(MULTIFPGA, + KERN_ERR "[%s] sysfs_create_group error, status: %d\n", + __FUNCTION__, err); + return err; + } + unsigned dev_index = multifpgapci_get_pci_dev_index(pci_dev); + xa_store(&spi_drvdata_map, dev_index, spi_drvdata, GFP_KERNEL); + + return 0; +} + +static void pddf_multifpgapci_spi_detach(struct pci_dev *pci_dev, + struct kobject *kobj) +{ + pddf_dbg(MULTIFPGA, KERN_INFO "[%s] pci_dev %s\n", __FUNCTION__, + pci_name(pci_dev)); + struct spi_controller_drvdata *spi_drvdata; + int i; + + unsigned dev_index = multifpgapci_get_pci_dev_index(pci_dev); + spi_drvdata = xa_load(&spi_drvdata_map, dev_index); + if (!spi_drvdata) { + pddf_dbg(MULTIFPGA, + KERN_ERR + "[%s] unable to find spi module data for device %s\n", + __FUNCTION__, pci_name(pci_dev)); + return; + } + + for (i = 0; i < NUM_SPI_CONTROLLERS_MAX; i++) { + if (spi_drvdata->spi_controllers[i]) { + platform_device_unregister( + spi_drvdata->spi_controllers[i]); + } + } + + if (spi_drvdata->spi_kobj) { + sysfs_remove_group(spi_drvdata->spi_kobj, + &spi_drvdata->spi_controller_attr_group); + kobject_put(spi_drvdata->spi_kobj); + spi_drvdata->spi_kobj = NULL; + } + + xa_erase(&spi_drvdata_map, dev_index); + + kfree(spi_drvdata); + spi_drvdata = NULL; +} + +static void pddf_multifpgapci_spi_map_bar(struct pci_dev *pci_dev, + void __iomem *bar_base, + unsigned long bar_start, + unsigned long bar_len) +{ + pddf_dbg(MULTIFPGA, KERN_INFO "[%s] pci_dev %s\n", __FUNCTION__, + pci_name(pci_dev)); + struct spi_controller_drvdata *spi_drvdata; + unsigned dev_index = multifpgapci_get_pci_dev_index(pci_dev); + spi_drvdata = xa_load(&spi_drvdata_map, dev_index); + if (!spi_drvdata) { + pddf_dbg(MULTIFPGA, + KERN_ERR + "[%s] unable to find spi module data for device %s\n", + __FUNCTION__, pci_name(pci_dev)); + return; + } + spi_drvdata->bar_base = bar_base; + spi_drvdata->bar_start = bar_start; + spi_drvdata->bar_len = bar_len; +} + +static void pddf_multifpgapci_spi_unmap_bar(struct pci_dev *pci_dev, + void __iomem *base, + unsigned long bar_start, + unsigned long bar_len) +{ + pddf_dbg(MULTIFPGA, KERN_INFO "[%s] pci_dev %s\n", __FUNCTION__, + pci_name(pci_dev)); + struct spi_controller_drvdata *spi_drvdata; + unsigned dev_index = multifpgapci_get_pci_dev_index(pci_dev); + spi_drvdata = xa_load(&spi_drvdata_map, dev_index); + if (!spi_drvdata) { + pddf_dbg(MULTIFPGA, + KERN_ERR + "[%s] unable to find spi module data for device %s\n", + __FUNCTION__, pci_name(pci_dev)); + return; + } + spi_drvdata->bar_start = 0; + spi_drvdata->bar_len = 0; +} + +static struct protocol_ops spi_protocol_ops = { + .attach = pddf_multifpgapci_spi_attach, + .detach = pddf_multifpgapci_spi_detach, + .map_bar = pddf_multifpgapci_spi_map_bar, + .unmap_bar = pddf_multifpgapci_spi_unmap_bar, + .name = "spi", +}; + +static int __init pddf_multifpgapci_spi_init(void) +{ + pddf_dbg(MULTIFPGA, KERN_INFO "Loading SPI protocol module\n"); + xa_init(&spi_drvdata_map); + return multifpgapci_register_protocol("spi", &spi_protocol_ops); +} + +static void __exit pddf_multifpgapci_spi_exit(void) +{ + pddf_dbg(MULTIFPGA, KERN_INFO "Unloading SPI protocol module\n"); + multifpgapci_unregister_protocol("spi"); + xa_destroy(&spi_drvdata_map); +} + +module_init(pddf_multifpgapci_spi_init); +module_exit(pddf_multifpgapci_spi_exit); + +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("Nexthop Systems"); +MODULE_DESCRIPTION("PDDF Platform Data for Multiple PCI FPGA SPI controllers."); diff --git a/platform/pddf/i2c/modules/psu/driver/pddf_psu_api.c b/platform/pddf/i2c/modules/psu/driver/pddf_psu_api.c index d7a34d3a611..8dbb9fd1617 100644 --- a/platform/pddf/i2c/modules/psu/driver/pddf_psu_api.c +++ b/platform/pddf/i2c/modules/psu/driver/pddf_psu_api.c @@ -44,6 +44,7 @@ extern void* get_device_table(char *name); #define PSU_REG_VOUT_MODE 0x20 +#define DEFAULT_VOUT_MODE_LINEAR16 0x17 void get_psu_duplicate_sysfs(int idx, char *str) { @@ -305,7 +306,22 @@ static long get_real_world_value(struct i2c_client *client, } else if (strcmp(data_format, "linear16") == 0) { - vout_mode = psu_get_vout_mode(client); + int hw_vout_mode = psu_get_vout_mode(client); + + /* If the PSU supports VOUT_MODE, use the value read from hardware */ + if (hw_vout_mode >= 0 && hw_vout_mode != 0xFF) + { + vout_mode = (u8)hw_vout_mode; + } + /* If not supported but the platform has specified a fallback value, use that */ + else if (usr_data->vout_mode != 0) + { + vout_mode = (u8)usr_data->vout_mode; + } + else + { + vout_mode = DEFAULT_VOUT_MODE_LINEAR16; + } return pmbus_linear16_to_int(reg_value, vout_mode, multiplier); } diff --git a/platform/pddf/i2c/modules/psu/pddf_psu_module.c b/platform/pddf/i2c/modules/psu/pddf_psu_module.c index 3085b3ee5bb..f9720f60e18 100644 --- a/platform/pddf/i2c/modules/psu/pddf_psu_module.c +++ b/platform/pddf/i2c/modules/psu/pddf_psu_module.c @@ -58,6 +58,7 @@ PDDF_DATA_ATTR(attr_devaddr, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, P PDDF_DATA_ATTR(attr_offset, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_UINT32, sizeof(uint32_t), (void*)&psu_data.psu_attr.offset, NULL); PDDF_DATA_ATTR(attr_mask, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_UINT32, sizeof(uint32_t), (void*)&psu_data.psu_attr.mask, NULL); PDDF_DATA_ATTR(attr_cmpval, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_UINT32, sizeof(uint32_t), (void*)&psu_data.psu_attr.cmpval, NULL); +PDDF_DATA_ATTR(attr_vout_mode, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_UINT32, sizeof(uint32_t), (void*)&psu_data.psu_attr.vout_mode, NULL); PDDF_DATA_ATTR(attr_len, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_INT_DEC, sizeof(int), (void*)&psu_data.psu_attr.len, NULL); PDDF_DATA_ATTR(attr_m, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_INT_DEC, sizeof(int), (void*)&psu_data.psu_attr.m, NULL); PDDF_DATA_ATTR(attr_b, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_INT_DEC, sizeof(int), (void*)&psu_data.psu_attr.b, NULL); @@ -77,6 +78,7 @@ static struct attribute *psu_attributes[] = { &attr_attr_devtype.dev_attr.attr, &attr_attr_devname.dev_attr.attr, &attr_attr_data_format.dev_attr.attr, + &attr_attr_vout_mode.dev_attr.attr, &attr_attr_devaddr.dev_attr.attr, &attr_attr_offset.dev_attr.attr, &attr_attr_mask.dev_attr.attr, diff --git a/platform/pddf/i2c/modules/spi/Makefile b/platform/pddf/i2c/modules/spi/Makefile new file mode 100644 index 00000000000..3f56b33480c --- /dev/null +++ b/platform/pddf/i2c/modules/spi/Makefile @@ -0,0 +1,3 @@ +obj-m := pddf_spi_module.o + +ccflags-y := -I$(M)/modules/include diff --git a/platform/pddf/i2c/modules/spi/pddf_spi_module.c b/platform/pddf/i2c/modules/spi/pddf_spi_module.c new file mode 100644 index 00000000000..19196e18260 --- /dev/null +++ b/platform/pddf/i2c/modules/spi/pddf_spi_module.c @@ -0,0 +1,151 @@ +#include "linux/kobject.h" +#include "linux/sysfs.h" +#include "pddf_client_defs.h" +#include "pddf_multifpgapci_defs.h" +#include +#include + +static ssize_t create_spi_device(struct device *dev, + struct device_attribute *da, const char *buf, + size_t count); +static ssize_t delete_spi_device(struct device *dev, + struct device_attribute *da, const char *buf, + size_t count); +extern void *get_device_table(char *name); +extern void delete_device_table(char *name); + +/* SPI CLIENT DATA */ +PDDF_DATA_ATTR(create_spi_device, S_IWUSR | S_IRUGO, show_pddf_data, + create_spi_device, PDDF_CHAR, 116, NULL, NULL); +PDDF_DATA_ATTR(delete_spi_device, S_IWUSR | S_IRUGO, show_pddf_data, + delete_spi_device, PDDF_CHAR, NAME_SIZE, NULL, NULL); + +static struct kobject *spi_kobj = NULL; + +static struct attribute *spi_attributes[] = { + &attr_create_spi_device.dev_attr.attr, + &attr_delete_spi_device.dev_attr.attr, NULL}; + +static const struct attribute_group pddf_spi_client_data_group = { + .attrs = spi_attributes, +}; + +ssize_t create_spi_device(struct device *dev, struct device_attribute *da, + const char *buf, size_t count) { + char device_name[GEN_NAME_SIZE]; + char spi_controller_name[GEN_NAME_SIZE]; + char modalias[SPI_NAME_SIZE]; + u32 max_speed_hz; + u16 chip_select; + + struct spi_board_info *sbi = NULL; + struct spi_controller *controller = NULL; + struct spi_device *spi_slave = NULL; + + // Expect the following format + // echo "$device_name $spi_controller_name $modalias $max_speed_hz + // $chip_select" > create_spi_device + int sscanf_result = + sscanf(buf, "%31s %31s %31s %u %hu", device_name, spi_controller_name, + modalias, &max_speed_hz, &chip_select); + if (sscanf_result != 5) { + printk("%s: [%s] Failed to register create spi device, %s\n", SPI, + __FUNCTION__, buf); + return -EINVAL; + } + + controller = get_device_table(spi_controller_name); + if (controller == NULL) { + printk( + "%s: [%s] Unable to get the spi controller spi_controller_name: %s " + "for device_name: %s\n", + SPI, __FUNCTION__, spi_controller_name, device_name); + return -ENODEV; + } + + sbi = kzalloc(sizeof(*sbi), GFP_KERNEL); + if (sbi == NULL) { + printk("%s: [%s](%d) kzalloc error\n", SPI, __FUNCTION__, __LINE__); + return -ENOMEM; + } + strscpy(sbi->modalias, modalias, sizeof(sbi->modalias)); + sbi->max_speed_hz = max_speed_hz; + sbi->chip_select = chip_select; + + spi_slave = spi_new_device(controller, sbi); + if (spi_slave == NULL) { + printk("%s: [%s](%d) spi_new_device error\n", SPI, __FUNCTION__, + __LINE__); + kfree(sbi); + return -ENOMEM; + } + + add_device_table(device_name, spi_slave); + return count; +} + +static ssize_t delete_spi_device(struct device *dev, + struct device_attribute *da, const char *buf, + size_t count) { + char device_name[GEN_NAME_SIZE]; + + // Expect the following format + // echo $device_name > delete_spi_device + if (sscanf(buf, "%31s", device_name) != 1) { + printk("%s: %s Failed to register create spi device, %s\n", SPI, + __FUNCTION__, buf); + return -EINVAL; + } + + struct spi_device *spi_slave = get_device_table(device_name); + if (spi_slave == NULL) { + printk("%s: [%s] Unable to get the spi slave device by name: %s\n", SPI, + __FUNCTION__, device_name); + return -EINVAL; + } + spi_unregister_device(spi_slave); + delete_device_table(device_name); + return count; +} + +int __init pddf_spi_module_init(void) { + struct kobject *device_kobj; + int ret = 0; + + pddf_dbg(SPI, "SPI MODULE.. init\n"); + + device_kobj = get_device_i2c_kobj(); + if (!device_kobj) + return -ENOMEM; + + spi_kobj = kobject_create_and_add("spi", device_kobj); + if (!spi_kobj) + return -ENOMEM; + + ret = sysfs_create_group(spi_kobj, &pddf_spi_client_data_group); + if (ret) { + kobject_put(spi_kobj); + pddf_dbg( + SPI, + "sysfs_create_group pddf_spi_client_data_group failed. err: %d\n", + ret); + return ret; + } + pddf_dbg(SPI, "CREATED PDDF SPI SYSFS GROUP\n"); + + return ret; +} + +void __exit pddf_spi_module_exit(void) { + pddf_dbg(SPI, KERN_INFO "SPI MODULE.. exit\n"); + sysfs_remove_group(spi_kobj, &pddf_spi_client_data_group); + kobject_put(spi_kobj); + pddf_dbg(MUX, KERN_INFO "%s: Removed the kobjects\n", __FUNCTION__); +} + +module_init(pddf_spi_module_init); +module_exit(pddf_spi_module_exit); + +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("Nexthop Systems"); +MODULE_DESCRIPTION("PDDF module for creating and deleting SPI devices"); diff --git a/platform/pddf/i2c/utils/pddf_util.py b/platform/pddf/i2c/utils/pddf_util.py index 54a0c14f08f..76b990e330f 100755 --- a/platform/pddf/i2c/utils/pddf_util.py +++ b/platform/pddf/i2c/utils/pddf_util.py @@ -33,6 +33,12 @@ version = '1.1' verbose = False DEBUG = False +logger = logging.getLogger("pddf.util") +_handler = logging.StreamHandler() +_handler.setFormatter(logging.Formatter("%(levelname)s: [%(funcName)s:%(lineno)d] %(message)s")) +logger.addHandler(_handler) +logger.setLevel(logging.INFO) +logger.propagate = False args = [] ALL_DEVICE = {} FORCE = 0 @@ -51,15 +57,15 @@ if DEBUG == True: - print(sys.argv[0]) - print('ARGV :', sys.argv[1:]) + logger.debug(sys.argv[0]) + logger.debug('ARGV : %s', sys.argv[1:]) def main(): global DEBUG global args global FORCE global kos - + if len(sys.argv)<2: show_help() @@ -67,10 +73,10 @@ def main(): 'debug', 'force', ]) - if DEBUG == True: - print(options) - print(args) - print(len(sys.argv)) + if DEBUG == True: + logger.debug("options: %s", options) + logger.debug("args: %s", args) + logger.debug("argc: %d", len(sys.argv)) # generate the KOS list from pddf device JSON file if 'std_perm_kos' in pddf_obj.data['PLATFORM'].keys(): @@ -87,16 +93,26 @@ def main(): show_help() elif opt in ('-d', '--debug'): DEBUG = True - logging.basicConfig(level=logging.INFO) + logging.getLogger("pddf").setLevel(logging.DEBUG) elif opt in ('-f', '--force'): FORCE = 1 else: - logging.info('no option') + logger.info('no option') for arg in args: if arg == 'install': - do_install() + try: + status = do_install() + except Exception: + logger.exception("Driver initialization failed") + sys.exit(1) + if status: + logger.error("do_install failed (rc=%s)", status) + sys.exit(1) elif arg == 'clean': - do_uninstall() + status = do_uninstall() + if status: + logger.error("do_uninstall failed (rc=%s)", status) + sys.exit(1) elif arg == 'switch-pddf': do_switch_pddf() elif arg == 'switch-nonpddf': @@ -111,26 +127,23 @@ def show_help(): sys.exit(0) def my_log(txt): - if DEBUG == True: - print("[PDDF]"+txt) + logger.debug("[PDDF]%s", txt) return -def log_os_system(cmd, show): - logging.info('Run :'+cmd) +def log_os_system(cmd): + logger.info('Run :'+cmd) status, output = subprocess.getstatusoutput(cmd) - my_log (cmd +"with result:" + str(status)) - my_log (" output:"+output) + logger.debug("%s with result: %s", cmd, status) + logger.debug(" output: "+ output) if status: - logging.info('Failed :'+cmd) - if show: - print('Failed :'+cmd) + logger.error('Failed :'+cmd) return status, output def driver_check(): - ret, lsmod = log_os_system("lsmod| grep pddf", 0) + ret, lsmod = log_os_system("lsmod| grep pddf") if ret: return False - logging.info('mods:'+lsmod) + logger.info('mods:'+lsmod) if len(lsmod) ==0: return False return True @@ -156,38 +169,38 @@ def config_pddf_utils(): SONIC_PLATFORM_BSP_WHL_PKG = "/".join([device_path, 'sonic_platform-1.0-py3-none-any.whl']) SONIC_PLATFORM_PDDF_WHL_PKG = "/".join([device_path, 'pddf', 'sonic_platform-1.0-py3-none-any.whl']) SONIC_PLATFORM_BSP_WHL_PKG_BK = "/".join([device_path, 'sonic_platform-1.0-py3-none-any.whl.orig']) - status, output = log_os_system("pip3 show sonic-platform > /dev/null 2>&1", 1) + status, output = log_os_system("pip3 show sonic-platform > /dev/null 2>&1") if status: if os.path.exists(SONIC_PLATFORM_PDDF_WHL_PKG): # Platform API 2.0 is supported if os.path.exists(SONIC_PLATFORM_BSP_WHL_PKG): # bsp whl pkg is present but not installed on host if not os.path.exists(SONIC_PLATFORM_BSP_WHL_PKG_BK): - log_os_system('mv '+SONIC_PLATFORM_BSP_WHL_PKG+' '+SONIC_PLATFORM_BSP_WHL_PKG_BK, 1) + log_os_system('mv '+SONIC_PLATFORM_BSP_WHL_PKG+' '+SONIC_PLATFORM_BSP_WHL_PKG_BK) # PDDF whl package exist ... this must be the whl package created from # PDDF 2.0 ref API classes and some changes on top of it ... install it - log_os_system('sync', 1) + log_os_system('sync') shutil.copy(SONIC_PLATFORM_PDDF_WHL_PKG, SONIC_PLATFORM_BSP_WHL_PKG) - log_os_system('sync', 1) - print("Attemting to install the PDDF sonic_platform wheel package ...") + log_os_system('sync') + logger.info("Attempting to install the PDDF sonic_platform wheel package") if os.path.getsize(SONIC_PLATFORM_BSP_WHL_PKG) != 0: - status, output = log_os_system("pip3 install "+ SONIC_PLATFORM_BSP_WHL_PKG, 1) + status, output = log_os_system("pip3 install "+ SONIC_PLATFORM_BSP_WHL_PKG) if status: - print("Error: Failed to install {}".format(SONIC_PLATFORM_BSP_WHL_PKG)) + logger.error("Failed to install %s", SONIC_PLATFORM_BSP_WHL_PKG) return status else: - print("Successfully installed {} package".format(SONIC_PLATFORM_BSP_WHL_PKG)) + logger.info("Successfully installed %s package", SONIC_PLATFORM_BSP_WHL_PKG) else: - print("Error: Failed to copy {} properly. Exiting ...".format(SONIC_PLATFORM_PDDF_WHL_PKG)) + logger.error("Failed to copy %s properly. Exiting", SONIC_PLATFORM_PDDF_WHL_PKG) return -1 else: # PDDF with platform APIs 1.5 must be supported device_plugin_path = "/".join([device_path, "plugins"]) backup_path = "/".join([device_plugin_path, "orig"]) - print("Loading PDDF generic plugins (1.0)") + logger.info("Loading PDDF generic plugins (1.0)") if os.path.exists(backup_path) is False: os.mkdir(backup_path) - log_os_system("mv "+device_plugin_path+"/*.*"+" "+backup_path, 0) + log_os_system("mv "+device_plugin_path+"/*.*"+" "+backup_path) for item in os.listdir(pddf_path): shutil.copy(pddf_path+"/"+item, device_plugin_path+"/"+item) @@ -200,38 +213,38 @@ def config_pddf_utils(): if os.path.exists(SONIC_PLATFORM_PDDF_WHL_PKG): if not os.path.exists(SONIC_PLATFORM_BSP_WHL_PKG_BK): # bsp 2.0 classes are installed. Take a backup and copy pddf 2.0 whl pkg - log_os_system('mv '+SONIC_PLATFORM_BSP_WHL_PKG+' '+SONIC_PLATFORM_BSP_WHL_PKG_BK, 1) - log_os_system('sync', 1) + log_os_system('mv '+SONIC_PLATFORM_BSP_WHL_PKG+' '+SONIC_PLATFORM_BSP_WHL_PKG_BK) + log_os_system('sync') shutil.copy(SONIC_PLATFORM_PDDF_WHL_PKG, SONIC_PLATFORM_BSP_WHL_PKG) - log_os_system('sync', 1) + log_os_system('sync') # uninstall the existing bsp whl pkg - status, output = log_os_system("pip3 uninstall sonic-platform -y &> /dev/null", 1) + status, output = log_os_system("pip3 uninstall sonic-platform -y &> /dev/null") if status: - print("Error: Unable to uninstall BSP sonic-platform whl package") + logger.error("Unable to uninstall BSP sonic-platform whl package") return status - print("Attempting to install the PDDF sonic_platform wheel package ...") + logger.info("Attempting to install the PDDF sonic_platform wheel package") if os.path.getsize(SONIC_PLATFORM_BSP_WHL_PKG) != 0: - status, output = log_os_system("pip3 install "+ SONIC_PLATFORM_BSP_WHL_PKG, 1) + status, output = log_os_system("pip3 install "+ SONIC_PLATFORM_BSP_WHL_PKG) if status: - print("Error: Failed to install {}".format(SONIC_PLATFORM_BSP_WHL_PKG)) + logger.error("Failed to install %s", SONIC_PLATFORM_BSP_WHL_PKG) return status else: - print("Successfully installed {} package".format(SONIC_PLATFORM_BSP_WHL_PKG)) + logger.info("Successfully installed %s package", SONIC_PLATFORM_BSP_WHL_PKG) else: - print("Error: Failed to copy {} properly. Exiting ...".format(SONIC_PLATFORM_PDDF_WHL_PKG)) + logger.error("Failed to copy %s properly. Exiting", SONIC_PLATFORM_PDDF_WHL_PKG) return -1 else: # system rebooted in pddf mode - print("System rebooted in PDDF mode, hence keeping the PDDF 2.0 classes") + logger.info("System rebooted in PDDF mode, hence keeping the PDDF 2.0 classes") else: # pddf whl package doesnt exist - print("Error: PDDF 2.0 classes doesnt exist. PDDF mode can not be enabled") + logger.error("PDDF 2.0 classes don't exist. PDDF mode can not be enabled") sys.exit(1) # ########################################################################## # Take a backup of orig fancontrol if os.path.exists(device_path+"/fancontrol"): - log_os_system("mv "+device_path+"/fancontrol"+" "+device_path+"/fancontrol.bak", 0) + log_os_system("mv "+device_path+"/fancontrol"+" "+device_path+"/fancontrol.bak") # Create a link to fancontrol of PDDF if os.path.exists(device_path+"/pddf/fancontrol") and not os.path.exists(device_path+"/fancontrol"): @@ -255,7 +268,7 @@ def cleanup_pddf_utils(): SONIC_PLATFORM_PDDF_WHL_PKG = "/".join([device_path, 'pddf', 'sonic_platform-1.0-py3-none-any.whl']) SONIC_PLATFORM_BSP_WHL_PKG_BK = "/".join([device_path, 'sonic_platform-1.0-py3-none-any.whl.orig']) # ########################################################################## - status, output = log_os_system("pip3 show sonic-platform > /dev/null 2>&1", 1) + status, output = log_os_system("pip3 show sonic-platform > /dev/null 2>&1") if status: # PDDF Platform API 2.0 is not supported but system is in PDDF mode, hence PDDF 1.0 plugins are present device_plugin_path = "/".join([device_path, "plugins"]) @@ -265,47 +278,47 @@ def cleanup_pddf_utils(): if os.path.isdir(device_plugin_path+"/"+item) is False: os.remove(device_plugin_path+"/"+item) - log_os_system("mv "+backup_path+"/*"+" "+device_plugin_path, 1) + log_os_system("mv "+backup_path+"/*"+" "+device_plugin_path) os.rmdir(backup_path) else: - print("\nERR: Unable to locate original device files...\n") + logger.error("Unable to locate original device files") else: # PDDF 2.0 apis are supported and PDDF whl package is installed if os.path.exists(SONIC_PLATFORM_PDDF_WHL_PKG): if os.path.exists(SONIC_PLATFORM_BSP_WHL_PKG_BK): # platform is 2.0 compliant and original bsp 2.0 whl package exist - log_os_system('mv '+SONIC_PLATFORM_BSP_WHL_PKG_BK+' '+SONIC_PLATFORM_BSP_WHL_PKG, 1) - status, output = log_os_system("pip3 uninstall sonic-platform -y &> /dev/null", 1) + log_os_system('mv '+SONIC_PLATFORM_BSP_WHL_PKG_BK+' '+SONIC_PLATFORM_BSP_WHL_PKG) + status, output = log_os_system("pip3 uninstall sonic-platform -y &> /dev/null") if status: - print("Error: Unable to uninstall PDDF sonic-platform whl package") + logger.error("Unable to uninstall PDDF sonic-platform whl package") return status - print("Attemting to install the BSP sonic_platform wheel package ...") - status, output = log_os_system("pip3 install "+ SONIC_PLATFORM_BSP_WHL_PKG, 1) + logger.info("Attempting to install the BSP sonic_platform wheel package") + status, output = log_os_system("pip3 install "+ SONIC_PLATFORM_BSP_WHL_PKG) if status: - print("Error: Failed to install {}".format(SONIC_PLATFORM_BSP_WHL_PKG)) + logger.error("Failed to install %s", SONIC_PLATFORM_BSP_WHL_PKG) return status else: - print("Successfully installed {} package".format(SONIC_PLATFORM_BSP_WHL_PKG)) + logger.info("Successfully installed %s package", SONIC_PLATFORM_BSP_WHL_PKG) else: # platform doesnt support 2.0 APIs but PDDF is 2.0 based # remove and uninstall the PDDF whl package if os.path.exists(SONIC_PLATFORM_BSP_WHL_PKG): os.remove(SONIC_PLATFORM_BSP_WHL_PKG) - status, output = log_os_system("pip3 uninstall sonic-platform -y &> /dev/null", 1) + status, output = log_os_system("pip3 uninstall sonic-platform -y &> /dev/null") if status: - print("Error: Unable to uninstall PDDF sonic-platform whl package") + logger.error("Unable to uninstall PDDF sonic-platform whl package") return status else: # something seriously wrong. System is in PDDF mode but pddf whl pkg is not present - print("Error: Fatal error as the system is in PDDF mode but the pddf .whl original is not present") + logger.error("Fatal error as the system is in PDDF mode but the pddf .whl original is not present") # ################################################################################################################ if os.path.exists(device_path+"/fancontrol"): os.remove(device_path+"/fancontrol") if os.path.exists(device_path+"/fancontrol.bak"): - log_os_system("mv "+device_path+"/fancontrol.bak"+" "+device_path+"/fancontrol", 0) + log_os_system("mv "+device_path+"/fancontrol.bak"+" "+device_path+"/fancontrol") # BMC support f_sensors="/usr/bin/sensors" @@ -315,78 +328,68 @@ def cleanup_pddf_utils(): return 0 -def create_pddf_log_files(): - if not os.path.exists('/var/log/pddf'): - log_os_system("sudo mkdir /var/log/pddf", 1) - - log_os_system("sudo touch /var/log/pddf/led.txt", 1) - log_os_system("sudo touch /var/log/pddf/psu.txt", 1) - log_os_system("sudo touch /var/log/pddf/fan.txt", 1) - log_os_system("sudo touch /var/log/pddf/xcvr.txt", 1) - log_os_system("sudo touch /var/log/pddf/sysstatus.txt", 1) - log_os_system("sudo touch /var/log/pddf/cpld.txt", 1) - log_os_system("sudo touch /var/log/pddf/cpldmux.txt", 1) - log_os_system("sudo touch /var/log/pddf/client.txt", 1) - log_os_system("sudo touch /var/log/pddf/mux.txt", 1) - log_os_system("sudo touch /var/log/pddf/fpgapci.txt", 1) - def driver_install(): global FORCE + logger.info("PDDF driver_install: starting") # check for pre_driver_install script if os.path.exists('/usr/local/bin/pddf_pre_driver_install.sh'): - status, output = log_os_system('/usr/local/bin/pddf_pre_driver_install.sh', 1) + logger.info("PDDF driver_install: running pre_driver_install script") + status, output = log_os_system('/usr/local/bin/pddf_pre_driver_install.sh') if status: - print("Error: pddf_pre_driver_install script failed with error %d"%status) + logger.error("PDDF driver_install: pre_driver_install script failed (rc=%d)", status) return status - # For debug - print(output) + logger.debug("pre_driver_install output: %s", output) # Removes the perm_kos first, then reload them in a proper sequence for mod in perm_kos: cmd = "modprobe -rq " + mod - status, output = log_os_system(cmd, 1) + status, output = log_os_system(cmd) if status: - print("driver_install: Unable to unload {}".format(mod)) + logger.warning("PDDF driver_install: unable to unload module %s", mod) # Don't exit but continue - log_os_system("depmod", 1) + log_os_system("depmod") # Load "normal" kos first + logger.info("PDDF driver_install: loading %d standard kernel modules", len(perm_kos + std_kos)) for mod in perm_kos + std_kos: - status, output = log_os_system("modprobe " + mod, 1) + status, output = log_os_system("modprobe " + mod) if status: - print("driver_install() failed with error %d"%status) + logger.error("PDDF driver_install: failed to load module %s (rc=%d)", mod, status) if FORCE == 0: return status # Load "custom" kos now. On failure, retry with force flag. Force flag is not # allowed to be used on signed modules so do not try that first. + if custom_kos: + logger.info("PDDF driver_install: loading %d custom kernel modules", len(custom_kos)) for mod in custom_kos: - status, output = log_os_system("modprobe " + mod, 1) + status, output = log_os_system("modprobe " + mod) if not status: continue - print("driver_install() failed with error %d retrying with force"%status) - status, output = log_os_system("modprobe -f " + mod, 1) + logger.warning("PDDF driver_install: module %s failed, retrying with force", mod) + status, output = log_os_system("modprobe -f " + mod) if status: - print("driver_install(force) failed with error %d"%status) + logger.error("PDDF driver_install: module %s force load also failed (rc=%d)", mod, status) if FORCE == 0: return status + logger.info("PDDF driver_install: configuring PDDF utilities") output = config_pddf_utils() if output: - print("config_pddf_utils() failed with error %d"%output) + logger.error("PDDF driver_install: config_pddf_utils failed (rc=%d)", output) # check for post_driver_install script if os.path.exists('/usr/local/bin/pddf_post_driver_install.sh'): - status, output = log_os_system('/usr/local/bin/pddf_post_driver_install.sh', 1) + logger.info("PDDF driver_install: running post_driver_install script") + status, output = log_os_system('/usr/local/bin/pddf_post_driver_install.sh') if status: - print("Error: pddf_post_driver_install script failed with error %d"%status) + logger.error("PDDF driver_install: post_driver_install script failed (rc=%d)", status) return status - # Useful for debugging - print(output) - + logger.debug("post_driver_install output: %s", output) + logger.info("PDDF driver_install: completed successfully") return 0 def driver_uninstall(): @@ -394,46 +397,50 @@ def driver_uninstall(): status = cleanup_pddf_utils() if status: - print("cleanup_pddf_utils() failed with error %d"%status) + logger.error("cleanup_pddf_utils failed (rc=%d)", status) for mod in std_kos + custom_kos: # do not remove i2c-i801 modules if "i2c-i801" in mod: continue - status, output = log_os_system("modprobe -rq " + mod, 1) + status, output = log_os_system("modprobe -rq " + mod) if status: - print("driver_uninstall() failed with error %d"%status) + logger.error("module unload failed (rc=%d)", status) if FORCE == 0: return status return 0 def device_install(): global FORCE + logger.info("PDDF device_install: starting device creation") # check for pre_device_creation script if os.path.exists('/usr/local/bin/pddf_pre_device_create.sh'): - status, output = log_os_system('/usr/local/bin/pddf_pre_device_create.sh', 1) + logger.info("PDDF device_install: running pre_device_create script") + status, output = log_os_system('/usr/local/bin/pddf_pre_device_create.sh') if status: - print("Error: pddf_pre_device_create script failed with error %d"%status) + logger.error("PDDF device_install: pre_device_create script failed (rc=%d)", status) return status # trigger the pddf_obj script for FAN, PSU, CPLD, MUX, etc + logger.info("PDDF device_install: creating PDDF devices (FAN, PSU, CPLD, MUX, etc.)") status = pddf_obj.create_pddf_devices() if status: - print("Error: create_pddf_devices() failed with error %d"%status) + logger.error("PDDF device_install: create_pddf_devices failed (rc=%d)", status) if FORCE == 0: return status # check for post_device_create script if os.path.exists('/usr/local/bin/pddf_post_device_create.sh'): - status, output = log_os_system('/usr/local/bin/pddf_post_device_create.sh', 1) + logger.info("PDDF device_install: running post_device_create script") + status, output = log_os_system('/usr/local/bin/pddf_post_device_create.sh') if status: - print("Error: pddf_post_device_create script failed with error %d"%status) + logger.error("PDDF device_install: post_device_create script failed (rc=%d)", status) return status - # Useful for debugging - print(output) + logger.debug("post_device_create output: %s", output) + logger.info("PDDF device_install: device creation completed successfully") return def device_uninstall(): @@ -441,124 +448,131 @@ def device_uninstall(): # Trigger the paloparse script for deletion of FAN, PSU, OPTICS, CPLD clients status = pddf_obj.delete_pddf_devices() if status: - print("Error: delete_pddf_devices() failed with error %d"%status) + logger.error("delete_pddf_devices failed (rc=%d)", status) if FORCE == 0: return status return def do_install(): - print("Checking system....") + logger.info("PDDF install: starting system check") if not os.path.exists('/usr/share/sonic/platform/pddf_support'): - print(PROJECT_NAME.upper() +" mode is not enabled") + logger.warning("PDDF install: pddf_support file not found, PDDF mode is not enabled") return if driver_check()== False : - print(PROJECT_NAME.upper() +" has no PDDF driver installed....") - create_pddf_log_files() - print("Installing ...") + logger.info("%s has no PDDF driver installed", PROJECT_NAME.upper()) + logger.info("PDDF install: installing drivers") status = driver_install() if status: + logger.error("PDDF install: driver installation failed (rc=%d)", status) return status + logger.info("PDDF install: driver installation completed successfully") else: - print(PROJECT_NAME.upper() +" drivers detected....") + logger.info("PDDF install: drivers already loaded, skipping driver install") - print("Creating devices ...") + logger.info("PDDF install: creating devices") status = device_install() if status: + logger.error("PDDF install: device creation failed (rc=%d)", status) return status # Check if S3IP support is enabled, if yes, start the service in no block mode if 'enable_s3ip' in pddf_obj.data['PLATFORM'].keys() and pddf_obj.data['PLATFORM']['enable_s3ip'] == 'yes': - log_os_system('systemctl enable pddf-s3ip-init.service', 1) - log_os_system('systemctl start --no-block pddf-s3ip-init.service', 1) + logger.info("PDDF install: enabling S3IP service") + log_os_system('systemctl enable pddf-s3ip-init.service') + log_os_system('systemctl start --no-block pddf-s3ip-init.service') + logger.info("PDDF install: completed successfully") return def do_uninstall(): - print("Checking system....") + logger.info("PDDF uninstall: starting") if not os.path.exists('/usr/share/sonic/platform/pddf_support'): - print(PROJECT_NAME.upper() +" mode is not enabled") + logger.warning("PDDF uninstall: pddf_support file not found, PDDF mode is not enabled") return if os.path.exists('/var/log/pddf'): - print("Remove pddf log files.....") - log_os_system("sudo rm -rf /var/log/pddf", 1) + logger.info("PDDF uninstall: removing pddf log files") + log_os_system("sudo rm -rf /var/log/pddf") - print("Remove all the devices...") + logger.info("PDDF uninstall: removing devices") status = device_uninstall() if status: + logger.error("PDDF uninstall: device removal failed (rc=%d)", status) return status if driver_check()== False : - print(PROJECT_NAME.upper() +" has no PDDF driver installed....") + logger.info("%s has no PDDF driver installed", PROJECT_NAME.upper()) else: - print("Removing installed driver....") + logger.info("PDDF uninstall: removing drivers") status = driver_uninstall() if status: + logger.error("PDDF uninstall: driver removal failed (rc=%d)", status) if FORCE == 0: return status + logger.info("PDDF uninstall: completed") return def do_switch_pddf(): try: import pddf_switch_svc except ImportError: - print("Unable to find pddf_switch_svc.py. PDDF might not be supported on this platform") + logger.error("Unable to find pddf_switch_svc.py. PDDF might not be supported on this platform") sys.exit() - print("Check the pddf support...") + logger.info("Checking PDDF support") status = pddf_switch_svc.check_pddf_support() if not status: - print("PDDF is not supported on this platform") + logger.warning("PDDF is not supported on this platform") return status - print("Checking system....") + logger.info("Checking system") if os.path.exists('/usr/share/sonic/platform/pddf_support'): - print(PROJECT_NAME.upper() +" system is already in pddf mode....") + logger.info("%s system is already in pddf mode", PROJECT_NAME.upper()) else: - print("Check if the native sonic-platform whl package is installed in the pmon docker") - status, output = log_os_system("docker exec -it pmon pip3 show sonic-platform", 1) + logger.info("Checking if native sonic-platform whl package is installed in pmon docker") + status, output = log_os_system("docker exec -it pmon pip3 show sonic-platform") if not status: # Need to remove this whl module - status, output = log_os_system("docker exec -it pmon pip3 uninstall sonic-platform -y", 1) + status, output = log_os_system("docker exec -it pmon pip3 uninstall sonic-platform -y") if not status: - print("Successfully uninstalled the native sonic-platform whl pkg from pmon container") + logger.info("Successfully uninstalled the native sonic-platform whl pkg from pmon container") else: - print("Error: Unable to uninstall the sonic-platform whl pkg from pmon container." + logger.error("Unable to uninstall the sonic-platform whl pkg from pmon container." " Do it manually before moving to nonpddf mode") return status - print("Stopping the pmon service ...") - status, output = log_os_system("systemctl stop pmon.service", 1) + logger.info("Stopping the pmon service") + status, output = log_os_system("systemctl stop pmon.service") if status: - print("Pmon stop failed") + logger.error("Pmon stop failed") if FORCE==0: return status - print("Stopping the platform services..") + logger.info("Stopping the platform services") status = pddf_switch_svc.stop_platform_svc() if not status: if FORCE==0: return status - print("Creating the pddf_support file...") + logger.info("Creating the pddf_support file") if os.path.exists('/usr/share/sonic/platform'): - log_os_system("touch /usr/share/sonic/platform/pddf_support", 1) + log_os_system("touch /usr/share/sonic/platform/pddf_support") else: - print("/usr/share/sonic/platform path doesn't exist. Unable to set pddf mode") + logger.error("/usr/share/sonic/platform path doesn't exist. Unable to set pddf mode") return -1 - print("Starting the PDDF platform service...") + logger.info("Starting the PDDF platform service") status = pddf_switch_svc.start_platform_pddf() if not status: if FORCE==0: return status - print("Restart the pmon service ...") - status, output = log_os_system("systemctl start pmon.service", 1) + logger.info("Restarting the pmon service") + status, output = log_os_system("systemctl start pmon.service") if status: - print("Pmon restart failed") + logger.error("Pmon restart failed") if FORCE==0: return status @@ -568,53 +582,53 @@ def do_switch_nonpddf(): try: import pddf_switch_svc except ImportError: - print("Unable to find pddf_switch_svc.py. PDDF might not be supported on this platform") + logger.error("Unable to find pddf_switch_svc.py. PDDF might not be supported on this platform") sys.exit() - print("Checking system....") + logger.info("Checking system") if not os.path.exists('/usr/share/sonic/platform/pddf_support'): - print(PROJECT_NAME.upper() +" system is already in non-pddf mode....") + logger.info("%s system is already in non-pddf mode", PROJECT_NAME.upper()) else: - print("Check if the sonic-platform whl package is installed in the pmon docker") - status, output = log_os_system("docker exec -it pmon pip3 show sonic-platform", 1) + logger.info("Checking if sonic-platform whl package is installed in pmon docker") + status, output = log_os_system("docker exec -it pmon pip3 show sonic-platform") if not status: # Need to remove this whl module - status, output = log_os_system("docker exec -it pmon pip3 uninstall sonic-platform -y", 1) + status, output = log_os_system("docker exec -it pmon pip3 uninstall sonic-platform -y") if not status: - print("Successfully uninstalled the sonic-platform whl pkg from pmon container") + logger.info("Successfully uninstalled the sonic-platform whl pkg from pmon container") else: - print("Error: Unable to uninstall the sonic-platform whl pkg from pmon container." + logger.error("Unable to uninstall the sonic-platform whl pkg from pmon container." " Do it manually before moving to nonpddf mode") return status - print("Stopping the pmon service ...") - status, output = log_os_system("systemctl stop pmon.service", 1) + logger.info("Stopping the pmon service") + status, output = log_os_system("systemctl stop pmon.service") if status: - print("Stopping pmon service failed") + logger.error("Stopping pmon service failed") if FORCE==0: return status - print("Stopping the PDDF platform service...") + logger.info("Stopping the PDDF platform service") status = pddf_switch_svc.stop_platform_pddf() if not status: if FORCE==0: return status - print("Removing the pddf_support file...") + logger.info("Removing the pddf_support file") if os.path.exists('/usr/share/sonic/platform'): - log_os_system("rm -f /usr/share/sonic/platform/pddf_support", 1) + log_os_system("rm -f /usr/share/sonic/platform/pddf_support") else: - print("/usr/share/sonic/platform path doesnt exist. Unable to set non-pddf mode") + logger.error("/usr/share/sonic/platform path doesnt exist. Unable to set non-pddf mode") return -1 - print("Starting the platform services...") + logger.info("Starting the platform services") status = pddf_switch_svc.start_platform_svc() if not status: if FORCE==0: return status - print("Restart the pmon service ...") - status, output = log_os_system("systemctl start pmon.service", 1) + logger.info("Restarting the pmon service") + status, output = log_os_system("systemctl start pmon.service") if status: - print("Restarting pmon service failed") + logger.error("Restarting pmon service failed") if FORCE==0: return status diff --git a/platform/pddf/i2c/utils/pddfparse.py b/platform/pddf/i2c/utils/pddfparse.py index c347430316b..7a7bfd7e8ee 100755 --- a/platform/pddf/i2c/utils/pddfparse.py +++ b/platform/pddf/i2c/utils/pddfparse.py @@ -3,46 +3,76 @@ import glob import json import os +import pathlib import re import subprocess import sys import time import unicodedata from sonic_py_common import device_info +from sonic_platform_pddf_base.pddf_fpga_utils import is_supported_fpga +import logging + +logger = logging.getLogger("pddf.parse") +_handler = logging.StreamHandler() +_handler.setFormatter(logging.Formatter("%(levelname)s: [%(funcName)s:%(lineno)d] %(message)s")) +logger.addHandler(_handler) +logger.setLevel(logging.INFO) +logger.propagate = False bmc_cache = {} cache = {} SONIC_CFGGEN_PATH = '/usr/local/bin/sonic-cfggen' HWSKU_KEY = 'DEVICE_METADATA.localhost.hwsku' PLATFORM_KEY = 'DEVICE_METADATA.localhost.platform' +DEFAULT_FPGA_REGISTER_WIDTH_BITS = 32 dirname = os.path.dirname(os.path.realpath(__file__)) + +def should_fpga_use_msi(dev) -> bool: + if "use_msi" in dev: + check_fpga_version_cmd = dev.get("dev_attr", {}).get("check_fpga_version_cmd", "") + min_fpga_version = dev["use_msi"].get( + "min_fpga_version", "0x0" + ) + return is_supported_fpga(check_fpga_version_cmd, min_fpga_version) + return False + + class PddfParse(): def __init__(self): + logger.info("initialization started") if not os.path.exists("/usr/share/sonic/platform"): platform, hwsku = device_info.get_platform_and_hwsku() + logger.info("creating platform symlink for %s", platform) os.symlink("/usr/share/sonic/device/"+platform, "/usr/share/sonic/platform") try: - with open('/usr/share/sonic/platform/pddf/pddf-device.json') as f: + json_path = "/usr/share/sonic/platform/pddf/pddf-device.json" + logger.info("loading device JSON from %s", json_path) + with open(json_path) as f: self.data = json.load(f) + logger.info("device JSON loaded successfully") except IOError: + logger.exception("Driver initialization failed") if os.path.exists('/usr/share/sonic/platform'): os.unlink("/usr/share/sonic/platform") raise Exception('PDDF JSON file not found. PDDF is not supported on this platform') self.data_sysfs_obj = {} self.sysfs_obj = {} + logger.info("initialization completed") ################################################################################################################### # GENERIC DEFS ################################################################################################################### def runcmd(self, cmd): + logger.debug("running cmd: %s", cmd) rc = os.system(cmd) if rc != 0: - print("%s -- command failed" % cmd) + logger.error("device creation command failed (rc=%d): %s", rc, cmd) return rc def get_dev_idx(self, dev, ops): @@ -530,6 +560,10 @@ def create_multifpgapci_device(self, dev, ops): ret = self.create_device(dev['i2c']['dev_attr'], "pddf/devices/multifpgapci/{}/i2c".format(bdf), ops) if ret != 0: return create_ret.append(ret) + if "channel_irq" in dev["i2c"]: + ret = self.create_device(dev['i2c']['dev_attr'], "pddf/devices/multifpgapci/{}/i2c-xiic".format(bdf), ops) + if ret != 0: + return create_ret.append(ret) # MDIO specific data store if 'mdio' in dev: @@ -537,15 +571,51 @@ def create_multifpgapci_device(self, dev, ops): if ret != 0: return create_ret.append(ret) - # TODO: add GPIO & SPI specific data stores + # TODO: add GPIO specific data stores - cmd = "echo 'fpgapci_init' > /sys/kernel/pddf/devices/multifpgapci/{}/dev_ops".format(bdf) + try: + use_msi = should_fpga_use_msi(dev) + except (RuntimeError, ValueError) as e: + bdf = dev["dev_info"].get("device_bdf", "") + logger.exception("FPGA version check failed for device_bdf=%s: %s", bdf, e) + raise type(e)( + "FPGA version check failed for device_bdf=%s: %s" % (bdf, e) + ) from e + num_msi_vectors = dev["use_msi"]["num_msi_vectors"] if use_msi else 0 + reg_width = dev["dev_attr"].get("reg_width", DEFAULT_FPGA_REGISTER_WIDTH_BITS) + cmd = f"echo 'fpgapci_init {num_msi_vectors} {reg_width}' > /sys/kernel/pddf/devices/multifpgapci/{bdf}/dev_ops" ret = self.runcmd(cmd) if ret != 0: return create_ret.append(ret) - for bus in range(int(dev['i2c']['dev_attr']['num_virt_ch'], 16)): - cmd = "echo {} > /sys/kernel/pddf/devices/multifpgapci/{}/i2c/new_i2c_adapter".format(bus, bdf) + # MSI domain mapped to MSI vector + enabled_msi_domains: set[int] = set() + if use_msi: + for msi_domain in dev["use_msi"].get("msi_domains", []): + msi_vector_num = msi_domain["msi_vector_num"] + irq_chip_name = msi_domain["irq_chip_name"] + irq_line_mask = msi_domain["irq_line_mask"] + enable_reg = msi_domain["interrupt_enable_reg"] + status_reg = msi_domain["interrupt_status_reg"] + cmd = f"echo 'register_msi_domain {msi_vector_num} {irq_chip_name} {irq_line_mask} {enable_reg} {status_reg}' > /sys/kernel/pddf/devices/multifpgapci/{bdf}/dev_ops" + ret = self.runcmd(cmd) + if ret != 0: + return create_ret + [ret] + enabled_msi_domains.add(msi_vector_num) + + channel_irq = dev["i2c"].get("channel_irq", []) + for bus in range(int(dev["i2c"]["dev_attr"]["num_virt_ch"], 16)): + if ( + bus < len(channel_irq) + and channel_irq[bus]["msi_domain"] in enabled_msi_domains + ): + cmd = "echo '{} {} {}' > /sys/kernel/pddf/devices/multifpgapci/{}/i2c-xiic/new_i2c_xiic_adapter".format( + bus, channel_irq[bus]["msi_domain"], channel_irq[bus]["hw_irq"], bdf + ) + else: + cmd = "echo {} > /sys/kernel/pddf/devices/multifpgapci/{}/i2c/new_i2c_adapter".format( + bus, bdf + ) ret = self.runcmd(cmd) if ret != 0: return create_ret.append(ret) @@ -560,42 +630,160 @@ def create_multifpgapci_device(self, dev, ops): if ret != 0: return create_ret.append(ret) + for spi_controller_name in dev.get("spi_controllers", []): + ret = self.create_multifpgapci_spi_controller( + self.data[spi_controller_name], ops + ) + if ret != 0: + return create_ret.append(ret) + return create_ret.append(ret) - def create_mdio_bus(self, bdf, mdio_dev, ops): - for bus in range(int(mdio_dev['dev_attr']['num_virt_ch'], 16)): - cmd = "echo {} > /sys/kernel/pddf/devices/multifpgapci/{}/mdio/new_mdio_bus".format(bus, bdf) - ret = self.runcmd(cmd) + def create_multifpgapci_spi_controller( + self, + spi_controller: dict[str, dict[str, ...]], + ops, + ) -> int: + device_parent = spi_controller["dev_info"]["device_parent"] + fpga_bdf = self.data[device_parent]["dev_info"]["device_bdf"] + for command in spi_controller.get("spi_mode_commands", []): + if "enable" in command: + ret = self.runcmd(command["enable"]) + if ret != 0: + return ret + + # Create SPI Controller + attr_to_sysfs_name_override = { + "spi_controller_idx": "new_spi_controller", + } + sysfs_key_value = { + attr_to_sysfs_name_override.get(k, k): v + for k, v in spi_controller["dev_attr"].items() + } + ret = self.create_device( + attr=sysfs_key_value, + path="pddf/devices/multifpgapci/{}/spi".format(fpga_bdf), + ops=ops, + ) + if ret != 0: + return ret + + # Create SPI device if persistent + for spi_device_name in spi_controller["spi_devices"]: + spi_device = self.data[spi_device_name] + if not spi_device["is_persistent"]: + continue + ret = self.create_multifpgapci_spi_device(spi_device, ops) if ret != 0: return ret return 0 - def create_multifpgapci_gpio_device(self, bdf, gpio_dev, ops): - create_ret = [] - ret = 0 + def create_multifpgapci_spi_device( + self, + spi_device: dict[str, dict[str, ...]], + ops, + ) -> int: + for command in spi_device.get("spi_mode_commands", []): + if "enable" in command: + ret = self.runcmd(command["enable"]) + if ret != 0: + return ret + spi_device_attr = spi_device["dev_attr"] + cmd = "echo '{}' '{}' '{}' '{}' '{}' > /sys/kernel/pddf/devices/spi/create_spi_device".format( + spi_device["dev_info"]["device_name"], + spi_device["dev_info"]["device_parent"], + spi_device_attr["spi_device_driver"], + spi_device_attr["max_speed_hz"], + spi_device_attr["chip_select"], + ) + return self.runcmd(cmd) + + def create_multifpgapci_gpio_device(self, bdf, gpio_dev, ops): for line in gpio_dev.keys(): for attr in gpio_dev[line]['attr_list']: ret = self.create_device(attr, "pddf/devices/multifpgapci/{}/gpio/line".format(bdf), ops) if ret != 0: - return create_ret.append(ret) + return ret cmd = "echo 'init' > /sys/kernel/pddf/devices/multifpgapci/{}/gpio/line/create_line".format(bdf) ret = self.runcmd(cmd) if ret != 0: - return create_ret.append(ret) + return ret cmd = "echo 'init' > /sys/kernel/pddf/devices/multifpgapci/{}/gpio/create_chip".format(bdf) ret = self.runcmd(cmd) if ret != 0: - return create_ret.append(ret) + return ret - return create_ret.append(ret) + return 0 + + def create_mdio_bus(self, bdf, mdio_dev, ops): + for bus in range(int(mdio_dev['dev_attr']['num_virt_ch'], 16)): + cmd = "echo {} > /sys/kernel/pddf/devices/multifpgapci/{}/mdio/new_mdio_bus".format(bus, bdf) + ret = self.runcmd(cmd) + if ret != 0: + return ret + + return 0 ################################################################################################################################# # DELETE DEFS ################################################################################################################### + + def delete_multifpgapci_spi_controller( + self, + spi_controller: dict[str, dict[str, ...]], + ops: str, + ) -> int: + spi_controller_index = spi_controller["dev_attr"]["spi_controller_idx"] + + # Delete SPI devices if present + for spi_device_name in spi_controller["spi_devices"]: + spi_device = self.data[spi_device_name] + spi_device_cs = spi_device["dev_attr"]["chip_select"] + spi_device_path = pathlib.Path( + f"/sys/bus/spi/devices/spi{spi_controller_index}.{spi_device_cs}" + ) + if spi_device_path.exists(): + ret = self.delete_multifpgapci_spi_device(spi_device, ops) + if ret != 0: + return ret + + # Delete the SPI controller + device_parent = spi_controller["dev_info"]["device_parent"] + bdf = self.data[device_parent]["dev_info"]["device_bdf"] + cmd = f"echo {spi_controller_index} > /sys/kernel/pddf/devices/multifpgapci/{bdf}/spi/del_spi_controller" + ret = self.runcmd(cmd) + if ret != 0: + return ret + + for command in spi_controller.get("spi_mode_commands", []): + if "disable" in command: + ret = self.runcmd(command["disable"]) + if ret != 0: + return ret + + return 0 + + def delete_multifpgapci_spi_device( + self, + spi_device: dict[str, dict[str, ...]], + ops: str, + ) -> int: + for command in spi_device.get("spi_mode_commands", []): + if "disable" in command: + ret = self.runcmd(command["disable"]) + if ret != 0: + return ret + + spi_device_name = spi_device["dev_info"]["device_name"] + cmd = "echo '{}' > /sys/kernel/pddf/devices/spi/delete_spi_device".format( + spi_device_name + ) + return self.runcmd(cmd) + def delete_eeprom_device(self, dev, ops): if "EEPROM" in self.data['PLATFORM']['pddf_dev_types'] and \ dev['i2c']['topo_info']['dev_type'] in self.data['PLATFORM']['pddf_dev_types']['EEPROM']: @@ -718,6 +906,11 @@ def delete_fpgapci_device(self, dev, ops): return def delete_multifpgapci_device(self, dev, ops): + for spi_controller_name in dev.get("spi_controllers", []): + self.delete_multifpgapci_spi_controller( + self.data[spi_controller_name], ops + ) + bdf = dev['dev_info']['device_bdf'] cmd = "echo '{}' > /sys/kernel/pddf/devices/multifpgapci/{}/i2c_name".format(dev['dev_info']['device_name'], bdf) @@ -1275,7 +1468,7 @@ def validate_xcvr_device(self, dev, ops): if 'attr_name' in attr.keys() and 'eeprom' in attr.values(): ret_val = "xcvr validation success" else: - print("xcvr validation Failed") + logger.error("xcvr validation failed") return elif dev['i2c']['topo_info']['dev_type'] in self.data['PLATFORM']['pddf_dev_types']['PORT_MODULE']: @@ -1283,9 +1476,9 @@ def validate_xcvr_device(self, dev, ops): if attr.get("attr_name") in dev_attribs: ret_val = "Success" else: - print("xcvr validation Failed") + logger.error("xcvr validation failed") return - print(ret_val) + logger.info(ret_val) def validate_eeprom_device(self, dev, ops): devtype_list = ['24c02'] @@ -1298,7 +1491,7 @@ def validate_eeprom_device(self, dev, ops): for attr in dev['i2c']['attr_list']: if attr.get("attr_name") in dev_attribs: ret_val = "eeprom success" - print(ret_val) + logger.info(ret_val) def validate_mux_device(self, dev, ops): devtype_list = ['pca9548', 'pca9545', 'pca9546', 'pca954x'] @@ -1309,7 +1502,7 @@ def validate_mux_device(self, dev, ops): for attr in dev['i2c']['channel']: if attr.get("chn") in dev_channels: ret_val = "Mux success" - print(ret_val) + logger.info(ret_val) def validate_cpld_device(self, dev, ops): devtype_list = ['i2c_cpld'] @@ -1317,7 +1510,7 @@ def validate_cpld_device(self, dev, ops): if dev['i2c']['topo_info']['dev_type'] in devtype_list: ret_val = "cpld success" - print(ret_val) + logger.info(ret_val) def validate_fpgai2c_device(self, dev, ops): devtype_list = ['i2c_fpga'] @@ -1325,7 +1518,7 @@ def validate_fpgai2c_device(self, dev, ops): if dev['i2c']['topo_info']['dev_type'] in devtype_list: ret_val = "fpgai2c success" - print(ret_val) + logger.info(ret_val) def validate_sysstatus_device(self, dev, ops): dev_attribs = ['board_info', 'cpld1_version', 'power_module_status', 'system_reset5', @@ -1337,7 +1530,7 @@ def validate_sysstatus_device(self, dev, ops): for attr in dev['attr_list']: if attr.get("attr_name") in dev_attribs: ret_val = "sysstatus success" - print(ret_val) + logger.info(ret_val) def validate_temp_sensor_device(self, dev, ops): devtype_list = ['lm75'] @@ -1349,7 +1542,7 @@ def validate_temp_sensor_device(self, dev, ops): for attr in dev['i2c']['attr_list']: if attr.get("attr_name") in dev_attribs: ret_val = "tempsensor success" - print(ret_val) + logger.info(ret_val) def validate_asic_temp_sensor_device(self, dev, ops): dev_attribs = ['display_name', 'temp1_high_threshold', 'temp1_high_crit_threshold'] @@ -1359,7 +1552,7 @@ def validate_asic_temp_sensor_device(self, dev, ops): for attr in dev['dev_attr'].keys(): if attr in dev_attribs: ret_val = "asic temp sensor success" - print(ret_val) + logger.info(ret_val) def validate_fan_device(self, dev, ops): ret_val = "fan failed" @@ -1368,7 +1561,7 @@ def validate_fan_device(self, dev, ops): if dev['i2c']['dev_attr']['num_fantrays'] is not None: ret_val = "fan success" - print(ret_val) + logger.info(ret_val) def validate_psu_device(self, dev, ops): dev_attribs = ['psu_present', 'psu_model_name', 'psu_power_good', 'psu_mfr_id', 'psu_serial_num', @@ -1386,7 +1579,7 @@ def validate_psu_device(self, dev, ops): else: ret_val = "psu failed" - print(ret_val) + logger.info(ret_val) ################################################################################################################### # SPYTEST @@ -1397,12 +1590,12 @@ def verify_attr(self, key, attr, path): with open(node, 'r') as f: status = f.read() except IOError: - print("PDDF_VERIFY_ERR: IOError: node:%s key:%s" % (node, key)) + logger.exception("IOError: node:%s key:%s", node, key) return status = status.rstrip("\n\r") if attr[key] != status: - print("PDDF_VERIFY_ERR: node: %s switch:%s" % (node, status)) + logger.error("verify mismatch: node: %s switch:%s", node, status) def verify_device(self, attr, path, ops): for key in attr.keys(): @@ -1419,21 +1612,21 @@ def validate_sysfs_creation(self, obj, validate_type): if (os.path.exists(dir) or validate_type == 'client'): for sysfs in obj[validate_type]: if(not os.path.exists(sysfs)): - print("[SYSFS FILE] " + sysfs + ": does not exist") + logger.error("sysfs file %s: does not exist", sysfs) else: - print("[SYSFS DIR] " + dir + ": does not exist") + logger.error("sysfs dir %s: does not exist", dir) def validate_dsysfs_creation(self, obj, validate_type): if validate_type in obj.keys(): # There is a possibility that some components dont have any device-self.data attr if not obj[validate_type]: - print("[SYSFS ATTR] for " + validate_type + ": empty ") + logger.warning("sysfs attr for %s: empty", validate_type) else: for sysfs in obj[validate_type]: if(not os.path.exists(sysfs)): - print("[SYSFS FILE] " + sysfs + ": does not exist") + logger.error("sysfs file %s: does not exist", sysfs) else: - print("[SYSFS KEY] for " + validate_type + ": not configured") + logger.warning("sysfs key for %s: not configured", validate_type) def verify_sysfs_data(self, verify_type): if (verify_type == 'LED'): @@ -1463,8 +1656,7 @@ def schema_validation(self, validate_type): try: device_type = self.data[key]["dev_info"]["device_type"] except Exception as e: - print("dev_info or device_type ERROR: " + key) - print(e) + logger.exception("dev_info or device_type ERROR: %s", key) if validate_type == 'mismatch': process_validate_type = 1 @@ -1479,7 +1671,7 @@ def schema_validation(self, validate_type): elif validate_type == 'empty': process_validate_type = 1 if not device_type: - print("Empty device_type for " + key) + logger.warning("Empty device_type for %s", key) continue elif (validate_type == 'all' or validate_type == device_type): process_validate_type = 1 @@ -1494,7 +1686,7 @@ def schema_validation(self, validate_type): temp_obj[device_type] = self.data[key] for schema_file in schema_list: if (os.path.exists(schema_file)): - print("Validate " + schema_file + ";" + key) + logger.info("Validate %s;%s", schema_file, key) json_data = json.dumps(temp_obj) with open(schema_file, 'r') as f: schema = json.load(f) @@ -1502,15 +1694,15 @@ def schema_validation(self, validate_type): from jsonschema import validate validate(temp_obj, schema) except Exception as e: - print("Validation ERROR: " + schema_file + ";" + key) + logger.error("Validation ERROR: %s;%s", schema_file, key) if validate_type == 'mismatch': return else: - print(e) + logger.error("%s", e) else: - print("ERROR Missing File: " + schema_file) + logger.error("ERROR Missing File: %s", schema_file) if not process_validate_type: - print("device_type: " + validate_type + " not configured") + logger.warning("device_type: %s not configured", validate_type) def modules_validation(self, validate_type): kos = [] @@ -1538,11 +1730,11 @@ def modules_validation(self, validate_type): if supported_type: if module_validation_status: module_validation_status.append(":ERROR not loaded") - print(str(module_validation_status)[1:-1]) + logger.error("%s", str(module_validation_status)[1:-1]) else: - print("Loaded") + logger.info("Loaded") else: - print(validate_type + " not configured") + logger.warning("%s not configured", validate_type) @@ -1559,7 +1751,7 @@ def psu_parse(self, dev, ops): if str(val[0]).isdigit(): if val[0] != 0: # in case if 'create' functions - print("{}_psu_device failed for {}".format(ops['cmd'], ifce['dev'])) + logger.error("%s_psu_device failed for %s", ops['cmd'], ifce['dev']) return val else: # in case of 'show_attr' functions @@ -1573,7 +1765,7 @@ def fan_parse(self, dev, ops): if str(ret[0]).isdigit(): if ret[0] != 0: # in case if 'create' functions - print("{}_fan_device failed for {}".format(ops['cmd'], dev['dev_info']['device_name'])) + logger.error("%s_fan_device failed for %s", ops['cmd'], dev['dev_info']['device_name']) return ret @@ -1584,7 +1776,7 @@ def temp_sensor_parse(self, dev, ops): if str(ret[0]).isdigit(): if ret[0] != 0: # in case if 'create' functions - print("{}_temp_sensor_device failed for {}".format(ops['cmd'], dev['dev_info']['device_name'])) + logger.error("%s_temp_sensor_device failed for %s", ops['cmd'], dev['dev_info']['device_name']) return ret @@ -1595,7 +1787,7 @@ def asic_temp_sensor_parse(self, dev, ops): if str(ret[0]).isdigit(): if ret[0] != 0: # in case if 'create' functions - print("{}_asic_temp_sensor_device failed for {}".format(ops['cmd'], dev['dev_info']['device_name'])) + logger.error("%s_asic_temp_sensor_device failed for %s", ops['cmd'], dev['dev_info']['device_name']) return ret @@ -1606,7 +1798,7 @@ def dpm_parse(self, dev, ops): if str(ret[0]).isdigit(): if ret[0] != 0: # in case if 'create' functions - print("{}_dpm_device failed for {}".format(ops['cmd'], dev['dev_info']['device_name'])) + logger.error("%s_dpm_device failed for %s", ops['cmd'], dev['dev_info']['device_name']) return ret @@ -1617,7 +1809,7 @@ def dcdc_parse(self, dev, ops): if str(ret[0]).isdigit(): if ret[0] != 0: # in case if 'create' functions - print("{}_dcdc_device failed for {}".format(ops['cmd'], dev['dev_info']['device_name'])) + logger.error("%s_dcdc_device failed for %s", ops['cmd'], dev['dev_info']['device_name']) return ret @@ -1628,7 +1820,7 @@ def cpld_parse(self, dev, ops): if str(ret[0]).isdigit(): if ret[0] != 0: # in case if 'create' functions - print("{}_cpld_device failed for {}".format(ops['cmd'], dev['dev_info']['device_name'])) + logger.error("%s_cpld_device failed for %s", ops['cmd'], dev['dev_info']['device_name']) return ret @@ -1639,7 +1831,7 @@ def fpgai2c_parse(self, dev, ops): if str(ret[0]).isdigit(): if ret[0]!=0: # in case if 'create' functions - print("{}_fpgai2c_device failed".format(ops['cmd'])) + logger.error("%s_fpgai2c_device failed", ops['cmd']) return ret else: # in case of 'show_attr' functions @@ -1654,7 +1846,7 @@ def cpldmux_parse(self, dev, ops): if str(ret[0]).isdigit(): if ret[0] != 0: # in case if 'create' functions - print("{}_cpldmux_device() cmd failed".format(ops['cmd'])) + logger.error("%s_cpldmux_device() cmd failed", ops['cmd']) return ret else: val.extend(ret) @@ -1690,7 +1882,7 @@ def cpldmux_parse_reverse(self, dev, ops): if str(ret[0]).isdigit(): if ret[0] != 0: # in case if 'create' functions - print("{}_cpldmux_device() cmd failed".format(ops['cmd'])) + logger.error("%s_cpldmux_device() cmd failed", ops['cmd']) return ret else: val.extend(ret) @@ -1704,7 +1896,7 @@ def sysstatus_parse(self, dev, ops): if str(ret[0]).isdigit(): if ret[0] != 0: # in case if 'create' functions - print("{}_sysstatus_device failed for {}".format(ops['cmd'], dev['dev_info']['device_name'])) + logger.error("%s_sysstatus_device failed for %s", ops['cmd'], dev['dev_info']['device_name']) return ret @@ -1715,7 +1907,7 @@ def gpio_parse(self, dev, ops): if str(ret[0]).isdigit(): if ret[0] != 0: # in case if 'create' functions - print("{}_gpio_device failed for {}".format(ops['cmd'], dev['dev_info']['device_name'])) + logger.error("%s_gpio_device failed for %s", ops['cmd'], dev['dev_info']['device_name']) return ret @@ -1726,7 +1918,7 @@ def mux_parse(self, dev, ops): if str(ret[0]).isdigit(): if ret[0] != 0: # in case if 'create' functions - print("{}_mux_device() cmd failed for {}".format(ops['cmd'], dev['dev_info']['device_name'])) + logger.error("%s_mux_device() cmd failed for %s", ops['cmd'], dev['dev_info']['device_name']) return ret else: val.extend(ret) @@ -1759,7 +1951,7 @@ def mux_parse_reverse(self, dev, ops): if str(ret[0]).isdigit(): if ret[0] != 0: # in case if 'create' functions - print("{}_mux_device() cmd failed for {}".format(ops['cmd'], dev['dev_info']['device_name'])) + logger.error("%s_mux_device() cmd failed for %s", ops['cmd'], dev['dev_info']['device_name']) return ret else: val.extend(ret) @@ -1773,7 +1965,7 @@ def eeprom_parse(self, dev, ops): if str(ret[0]).isdigit(): if ret[0] != 0: # in case if 'create' functions - print("{}_eeprom_device() cmd failed for {}".format(ops['cmd'], dev['dev_info']['device_name'])) + logger.error("%s_eeprom_device() cmd failed for %s", ops['cmd'], dev['dev_info']['device_name']) return ret @@ -1785,7 +1977,7 @@ def optic_parse(self, dev, ops): if str(ret[0]).isdigit(): if ret[0] != 0: # in case if 'create' functions - print("{}_xcvr_device() cmd failed for {}".format(ops['cmd'], ifce['dev'])) + logger.error("%s_xcvr_device() cmd failed for %s", ops['cmd'], ifce['dev']) return ret else: val.extend(ret) @@ -1828,7 +2020,7 @@ def fpgapci_parse(self, dev, ops): if str(ret[0]).isdigit(): if ret[0]!=0: # in case if 'create' functions - print("{}_fpgapci_device() cmd failed".format(ops['cmd'])) + logger.error("%s_fpgapci_device() cmd failed", ops['cmd']) return ret else: val.extend(ret) @@ -1861,7 +2053,7 @@ def multifpgapcisystem_parse(self, ops): if ret: if str(ret[0]).isdigit(): if ret[0] != 0: - print("{}_multifpgapcisystem_device() cmd failed".format(ops['cmd'])) + logger.error("%s_multifpgapcisystem_device() cmd failed", ops['cmd']) return ret else: val.extend(ret) @@ -1875,7 +2067,7 @@ def multifpgapci_parse(self, dev, ops): if str(ret[0]).isdigit(): if ret[0] != 0: # in case if 'create' functions - print("{}_multifpgapci_device() cmd failed".format(ops['cmd'])) + logger.error("%s_multifpgapci_device() cmd failed", ops['cmd']) return ret else: val.extend(ret) @@ -1891,10 +2083,36 @@ def multifpgapci_parse(self, dev, ops): val.extend(ret) return val + def multifpgapci_spi_controller_parse( + self, spi_controller: dict[str, dict[str, ...]], ops: dict[str, ...] + ) -> int: + ret = getattr(self, ops["cmd"] + "_multifpgapci_spi_controller")(spi_controller, ops) + if ret != 0: + print( + "{}_spi_controller() cmd failed for {}".format( + ops["cmd"], spi_controller["dev_attr"]["spi_controller_name"] + ) + ) + return [ret] + + def multifpgapci_spi_device_parse( + self, spi_device: dict[str, dict[str, ...]], ops: dict[str, ...] + ) -> int: + ret = getattr(self, ops["cmd"] + "_multifpgapci_spi_device")(spi_device, ops) + if ret != 0: + print( + "{}_spi_device() cmd failed for {}".format( + ops["cmd"], spi_device["dev_info"]["device_name"] + ) + ) + return [ret] + # 'create' and 'show_attr' ops returns an array # 'delete', 'show' and 'validate' ops return None def dev_parse(self, dev, ops): attr=dev['dev_info'] + logger.debug("%s: %s device %s", ops["cmd"], attr["device_type"], attr.get("device_name", "")) + if attr['device_type'] == 'CPU': if ops['cmd']=='delete': return self.cpu_parse_reverse(dev, ops) @@ -1955,6 +2173,12 @@ def dev_parse(self, dev, ops): if attr['device_type'] == 'DPM': return self.dpm_parse(dev, ops) + if attr['device_type'] == 'SPI_CONTROLLER': + return self.multifpgapci_spi_controller_parse(dev, ops) + + if attr['device_type'] == 'SPI_DEVICE': + return self.multifpgapci_spi_device_parse(dev, ops) + def is_supported_sysled_state(self, sysled_name, sysled_state): if not sysled_name in self.data.keys(): return False, "[FAILED] " + sysled_name + " is not configured" @@ -2000,6 +2224,8 @@ def create_led_device(self, key, ops): def led_parse(self, ops): + logger.debug("%s: parsing LED platform device", ops["cmd"]) + getattr(self, ops['cmd']+"_led_platform_device")("PLATFORM", ops) for key in self.data.keys(): if key != 'PLATFORM' and 'dev_info' in self.data[key]: @@ -2014,30 +2240,46 @@ def get_device_list(self, list, type): attr = self.data[key]['dev_info'] if attr['device_type'] == type: list.append(self.data[key]) + logger.debug("%s: LED device %s", ops["cmd"], key) def create_pddf_devices(self): + logger.info("create_pddf_devices started") + logger.info("parsing multi-FPGA PCI system") ret = self.multifpgapcisystem_parse({"cmd": "create", "target": "all", "attr": "all"}) if ret: if ret[0] != 0: + logger.error( + "PddfParse: multi-FPGA PCI system parse failed (rc=%d)", ret[0] + ) return ret[0] + logger.info("parsing LED configuration") self.led_parse({"cmd": "create", "target": "all", "attr": "all"}) create_ret = 0 + logger.info("parsing SYSTEM device tree") ret = self.dev_parse(self.data['SYSTEM'], {"cmd": "create", "target": "all", "attr": "all"}) if ret: if ret[0] != 0: + logger.error( + "PddfParse: SYSTEM device tree parse failed (rc=%d)", ret[0] + ) return ret[0] if 'SYSSTATUS' in self.data: + logger.info("parsing SYSSTATUS device tree") ret = self.dev_parse(self.data['SYSSTATUS'], {"cmd": "create", "target": "all", "attr": "all"}) if ret: if ret[0] != 0: + logger.error( + "PddfParse: SYSSTATUS device tree parse failed (rc=%d)", ret[0] + ) return ret[0] + logger.info("create_pddf_devices completed successfully") return create_ret def create_subtree(self, device_name): subtree = self.data.get(device_name) if not subtree: - print(f"Invalid device_name {device_name}") + logger.error("Invalid device_name %s", device_name) return 1 ret = self.dev_parse(subtree, {"cmd": "create", "target": "all", "attr": "all"}) @@ -2050,7 +2292,7 @@ def create_subtree(self, device_name): def delete_subtree(self, device_name): subtree = self.data.get(device_name) if not subtree: - print(f"Invalid device_name {device_name}") + logger.error("Invalid device_name %s", device_name) return 1 ret = self.dev_parse(self.data[device_name], {"cmd": "delete", "target": "all", "attr": "all"}) @@ -2061,9 +2303,12 @@ def delete_subtree(self, device_name): return 0 def delete_pddf_devices(self): + logger.info("delete_pddf_devices started") self.dev_parse(self.data['SYSTEM'], {"cmd": "delete", "target": "all", "attr": "all"}) if 'SYSSTATUS' in self.data: + logger.info("deleting SYSSTATUS devices") self.dev_parse(self.data['SYSSTATUS'], {"cmd": "delete", "target": "all", "attr": "all"}) + logger.info("delete_pddf_devices completed") def populate_pddf_sysfsobj(self): self.dev_parse(self.data['SYSTEM'], {"cmd": "show", "target": "all", "attr": "all"}) @@ -2312,7 +2557,7 @@ def main(): try: pddf_obj = PddfParse() except Exception as e: - print("%s" % str(e)) + logger.exception("Failed to instantiate PddfParse") sys.exit() if args.create: diff --git a/platform/pddf/platform-api-pddf-base/sonic_platform_pddf_base/pddf_asic_thermal.py b/platform/pddf/platform-api-pddf-base/sonic_platform_pddf_base/pddf_asic_thermal.py index d887ca3be9f..cb17a081117 100644 --- a/platform/pddf/platform-api-pddf-base/sonic_platform_pddf_base/pddf_asic_thermal.py +++ b/platform/pddf/platform-api-pddf-base/sonic_platform_pddf_base/pddf_asic_thermal.py @@ -52,7 +52,8 @@ def get_temperature(self): db = SonicV2Connector() db.connect(db.STATE_DB) data_dict = db.get_all(db.STATE_DB, self.ASIC_TEMP_INFO) - return float(data_dict["temperature_{}".format(self.sensor_db_index)]) + temp_value = data_dict.get("temperature_{}".format(self.sensor_db_index)) + return float(temp_value) if temp_value is not None else None def get_high_threshold(self): val = self.high_threshold diff --git a/platform/pddf/platform-api-pddf-base/sonic_platform_pddf_base/pddf_fpga_utils.py b/platform/pddf/platform-api-pddf-base/sonic_platform_pddf_base/pddf_fpga_utils.py new file mode 100644 index 00000000000..5c1dedb29b1 --- /dev/null +++ b/platform/pddf/platform-api-pddf-base/sonic_platform_pddf_base/pddf_fpga_utils.py @@ -0,0 +1,86 @@ +""" +FPGA utilities for PDDF-based platforms. + +This module provides common FPGA-related utility functions that can be shared +across PDDF-based platforms and utilities. +""" + +import shlex +import subprocess + +# Bits [0:7] represenets the base function provided by an image +_BASE_FUNCTION_MASK = 0xFF + + +def is_supported_fpga( + check_fpga_version_cmd: str, + min_fpga_version_hex_output: str, +) -> bool: + """ + Run command to check FPGA version against the requirement. + + This function executes a shell command to retrieve the current FPGA version + and compares it against a minimum required version. Both versions are expected + to be hexadecimal strings. Only compares bits [0:7] for determining base + function provided by the image. + + Args: + check_fpga_version_cmd: Command (argv string, parsed with shlex.split, + no shell features) that returns the current FPGA + version as a hexadecimal string (e.g., "0x1234"). + May start with "sudo" if the underlying tool + requires elevated privileges. + min_fpga_version_hex_output: Minimum required FPGA version as a hexadecimal + string (e.g., "0x1000") + + Returns: + bool: True if the current FPGA version meets or exceeds the minimum + required version, False otherwise. + + Special cases: + - Returns True if min_fpga_version_hex_output is empty/None (no requirement) + - Returns False if check_fpga_version_cmd is empty/None + - Returns False if the command fails or returns empty output + - Returns False if version strings cannot be parsed as hexadecimal + + Raises: + RuntimeError: if command to check FPGA version fails. + ValueError: if fails to interpret FPGA version as hexadecimal. + + Example: + >>> is_supported_fpga("fpga read32 0000:e4:00.0 0x0", "0x1000") + True # if FPGA version >= 0x1000 + """ + if not min_fpga_version_hex_output: + return True + if not check_fpga_version_cmd: + return False + + try: + argv = shlex.split(check_fpga_version_cmd) + except ValueError as e: + raise ValueError( + f"Failed to parse FPGA version check command: {check_fpga_version_cmd}" + ) from e + + try: + fpga_version_output = subprocess.check_output(argv, text=True) + except subprocess.CalledProcessError as e: + raise RuntimeError( + f"Failed to execute FPGA version check command: {check_fpga_version_cmd}" + ) from e + + if not fpga_version_output: + return False + + try: + fpga_version = int(fpga_version_output.strip(), 16) + min_fpga_version = int(min_fpga_version_hex_output, 16) + except ValueError as e: + raise ValueError( + f"Cannot check FPGA version, got fpga_version={fpga_version_output}, " + f"min_fpga_version={min_fpga_version_hex_output}" + ) from e + + return fpga_version & _BASE_FUNCTION_MASK >= min_fpga_version & _BASE_FUNCTION_MASK + diff --git a/platform/pddf/platform-api-pddf-base/sonic_platform_pddf_base/pddf_sfp.py b/platform/pddf/platform-api-pddf-base/sonic_platform_pddf_base/pddf_sfp.py index 089327d7dc1..8507fb6f3f1 100644 --- a/platform/pddf/platform-api-pddf-base/sonic_platform_pddf_base/pddf_sfp.py +++ b/platform/pddf/platform-api-pddf-base/sonic_platform_pddf_base/pddf_sfp.py @@ -179,38 +179,58 @@ def get_tx_disable(self): return tx_disable - def get_lpmode(self): + def get_lpmode_via_pin(self): """ - Retrieves the lpmode (low power mode) status of this SFP + Retrieves the lpmode (low power mode) status of this SFP via the + hardware LPMode pin (sysfs). + Returns: A Boolean, True if lpmode is enabled, False if disabled """ - lpmode = False device = 'PORT{}'.format(self.port_index) output = self.pddf_obj.get_attr_name_output(device, 'xcvr_lpmode') - if output: + if not output: + print("get_lpmode_via_pin: port %d no sysfs output available" % self.port_index) + return False + + try: status = int(output['status'].rstrip()) + return status == 1 + except (ValueError, KeyError) as e: + print("get_lpmode_via_pin: port %d failed to parse output: %s" % (self.port_index, str(e))) + return False - if status == 1: - lpmode = True - else: - lpmode = False - else: - xcvr_id = self._xcvr_api_factory._get_id() - if xcvr_id is not None: - if xcvr_id == 0x18 or xcvr_id == 0x19 or xcvr_id == 0x1e: - # QSFP-DD or OSFP - # Use common SfpOptoeBase implementation for get_lpmode - lpmode = super().get_lpmode() - elif xcvr_id == 0x11 or xcvr_id == 0x0d or xcvr_id == 0x0c: - # QSFP28, QSFP+, QSFP - # get_power_set() is not defined in the optoe_base class - api = self.get_xcvr_api() - power_set = api.get_power_set() - power_override = self.get_power_override() - # By default the lpmode pin is pulled high as mentioned in the sff community - return power_set if power_override else True + def get_lpmode(self): + """ + Retrieves the lpmode (low power mode) status of this SFP via EEPROM + Returns: + A Boolean, True if lpmode is enabled, False if disabled + """ + # Skip if transceiver is not present + if not self.get_presence(): + return False + + lpmode = None + + xcvr_id = self._xcvr_api_factory._get_id() + if xcvr_id is not None: + if xcvr_id == 0x18 or xcvr_id == 0x19 or xcvr_id == 0x1e: + # QSFP-DD or OSFP (CMIS) + # Use common SfpOptoeBase implementation for get_lpmode + lpmode = super().get_lpmode() + elif xcvr_id == 0x11 or xcvr_id == 0x0d or xcvr_id == 0x0c: + # QSFP28, QSFP+, QSFP (SFF-8636) + # get_power_set() is not defined in the optoe_base class + api = self.get_xcvr_api() + power_set = api.get_power_set() + power_override = self.get_power_override() + # By default the lpmode pin is pulled high as mentioned in the sff community + lpmode = power_set if power_override else True + + if lpmode is None: + print("get_lpmode: port %d EEPROM method failed" % self.port_index) + lpmode = False return lpmode @@ -299,48 +319,63 @@ def tx_disable(self, tx_disable): return status - def set_lpmode(self, lpmode): + def set_lpmode_via_pin(self, lpmode): """ - Sets the lpmode (low power mode) of SFP + Sets the lpmode (low power mode) of this SFP via the hardware + LPMode pin (sysfs). + Args: lpmode: A Boolean, True to enable lpmode, False to disable it - Note : lpmode can be overridden by set_power_override + Returns: A boolean, True if lpmode is set successfully, False if not """ - status = False device = 'PORT{}'.format(self.port_index) path = self.pddf_obj.get_path(device, 'xcvr_lpmode') - if path: - try: - f = open(path, 'r+') - except IOError as e: - return False + if not path: + print("set_lpmode_via_pin: port %d no sysfs path available" % self.port_index) + return False - try: - if lpmode: - f.write('1') + try: + with open(path, 'r+') as f: + f.write('1' if lpmode else '0') + return True + except IOError as e: + print("set_lpmode_via_pin: port %d FAILED: %s" % (self.port_index, str(e))) + return False + + def set_lpmode(self, lpmode): + """ + Sets the lpmode (low power mode) of SFP via EEPROM + Args: + lpmode: A Boolean, True to enable lpmode, False to disable it + Note : lpmode can be overridden by set_power_override + Returns: + A boolean, True if lpmode is set successfully, False if not + """ + # Skip if transceiver is not present + if not self.get_presence(): + return False + + status = False + + xcvr_id = self._xcvr_api_factory._get_id() + if xcvr_id is not None: + if xcvr_id == 0x18 or xcvr_id == 0x19 or xcvr_id == 0x1e: + # QSFP-DD or OSFP (CMIS) + # Use common SfpOptoeBase implementation for set_lpmode + # This is CMIS compliant + status = super().set_lpmode(lpmode) + elif xcvr_id == 0x11 or xcvr_id == 0x0d or xcvr_id == 0x0c: + # QSFP28, QSFP+, QSFP (SFF-8636) + if lpmode is True: + status = self.set_power_override(True, True) else: - f.write('0') + status = self.set_power_override(True, False) - f.close() - status = True - except IOError as e: - status = False - else: - xcvr_id = self._xcvr_api_factory._get_id() - if xcvr_id is not None: - if xcvr_id == 0x18 or xcvr_id == 0x19 or xcvr_id == 0x1e: - # QSFP-DD or OSFP - # Use common SfpOptoeBase implementation for set_lpmode - status = super().set_lpmode(lpmode) - elif xcvr_id == 0x11 or xcvr_id == 0x0d or xcvr_id == 0x0c: - # QSFP28, QSFP+, QSFP - if lpmode is True: - status = self.set_power_override(True, True) - else: - status = self.set_power_override(True, False) + if not status: + print("set_lpmode: port %d EEPROM method failed" % self.port_index) return status diff --git a/platform/pddf/platform-api-pddf-base/tests/__init__.py b/platform/pddf/platform-api-pddf-base/tests/__init__.py new file mode 100644 index 00000000000..e69de29bb2d diff --git a/platform/pddf/platform-api-pddf-base/tests/test_pddf_fpga_utils.py b/platform/pddf/platform-api-pddf-base/tests/test_pddf_fpga_utils.py new file mode 100644 index 00000000000..9f0e7cbf935 --- /dev/null +++ b/platform/pddf/platform-api-pddf-base/tests/test_pddf_fpga_utils.py @@ -0,0 +1,89 @@ +#!/usr/bin/env python +# Copyright 2025 Nexthop Systems Inc. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 +import pytest +import subprocess +from unittest.mock import patch + +# Import the module under test +from sonic_platform_pddf_base.pddf_fpga_utils import is_supported_fpga + + +class TestIsSupportedFpga: + """Test cases for the is_supported_fpga function.""" + + @pytest.mark.parametrize( + "check_cmd, min_version", + [ + ("some_command", ""), + ("fpga read32 0000:e4:00.0 0x0", ""), + ], + ) + def test_no_minimum_version_required_returns_true(self, check_cmd, min_version): + """When no minimum version is specified, should return True.""" + result = is_supported_fpga(check_cmd, min_version) + assert result is True + + @pytest.mark.parametrize( + "check_cmd, min_version", + [ + ("", "0x2000"), + (None, "0xFFFF"), + ], + ) + def test_no_check_command_returns_false(self, check_cmd, min_version): + """When no check command is provided, should return False.""" + result = is_supported_fpga(check_cmd, min_version) + assert result is False + + @pytest.mark.parametrize( + "fpga_version, min_version, expected_result, description", + [ + # FPGA version exceeds minimum + ("0x12", "0x13", False, "shortened revision"), + ("0x13", "0x12", True, "shortened revision"), + ("0xe805e306", "0xe8050307", False, "test image, does not meet minimum"), + ("0xe805ffff", "0xe806e306", True, "major version below minimum ok"), + ("0x1001", "0x1000", True, "version slightly exceeds minimum"), + ("0x1000", "0x1000", True, "version equals minimum"), + ("0x0", "0x0", True, "zero equals zero"), + ], + ) + @patch("subprocess.check_output") + def test_fpga_version_comparison( + self, mock_check_output, fpga_version, min_version, expected_result, description + ): + """Test FPGA version comparison against minimum requirement.""" + mock_check_output.return_value = fpga_version + + result = is_supported_fpga("fpga read32 0000:e4:00.0 0x0", min_version) + + assert result is expected_result, f"Failed: {description}" + mock_check_output.assert_called_once_with( + ["fpga", "read32", "0000:e4:00.0", "0x0"], text=True + ) + + @patch("subprocess.check_output") + def test_command_execution_failures(self, mock_check_output): + """When command execution fails, should return False and print error.""" + mock_check_output.side_effect = subprocess.CalledProcessError(1, "cmd") + + with pytest.raises(RuntimeError): + is_supported_fpga("invalid_command", "0x1000") + + @pytest.mark.parametrize( + "fpga_output, min_version", + [ + ("not_a_hex_value", "0x1000"), + ("0x2000", "invalid_hex"), + ], + ) + @patch("subprocess.check_output") + def test_invalid_hex_values(self, mock_check_output, fpga_output, min_version): + """When hex values are invalid, should return False and print error.""" + mock_check_output.return_value = fpga_output + + with pytest.raises(ValueError): + is_supported_fpga("fpga read32 0000:e4:00.0 0x0", min_version) + + diff --git a/platform/pensando/docker-dpu.mk b/platform/pensando/docker-dpu.mk index 7eafdb68061..194c93255f5 100644 --- a/platform/pensando/docker-dpu.mk +++ b/platform/pensando/docker-dpu.mk @@ -8,13 +8,9 @@ $(DOCKER_DPU)_PATH = $(PLATFORM_PATH)/$(DOCKER_DPU_STEM) $(DOCKER_DPU)_LOAD_DOCKERS = $(DOCKER_DPU_BASE) -SONIC_DOCKER_IMAGES += $(DOCKER_DPU) - -$(DOCKER_DPU)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_BULLSEYE) - $(DOCKER_DPU)_PACKAGE_NAME = dpu $(DOCKER_DPU)_CONTAINER_NAME = dpu $(DOCKER_DPU)_VERSION = 1.0.0 -SONIC_BULLSEYE_DOCKERS += $(DOCKER_DPU) +SONIC_DOCKER_IMAGES += $(DOCKER_DPU) SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_DPU) diff --git a/platform/pensando/docker-syncd-pensando.mk b/platform/pensando/docker-syncd-pensando.mk index e3ba335aed7..6657b90460d 100644 --- a/platform/pensando/docker-syncd-pensando.mk +++ b/platform/pensando/docker-syncd-pensando.mk @@ -1,7 +1,7 @@ # docker image for centec syncd DOCKER_SYNCD_PLATFORM_CODE = pensando -include $(PLATFORM_PATH)/../template/docker-syncd-bullseye.mk +include $(PLATFORM_PATH)/../template/docker-syncd-bookworm.mk $(DOCKER_SYNCD_BASE)_DEPENDS += $(SYNCD) @@ -14,7 +14,6 @@ $(DOCKER_SYNCD_BASE)_VERSION = 1.0.0 $(DOCKER_SYNCD_BASE)_PACKAGE_NAME = syncd $(DOCKER_SYNCD_BASE)_RUN_OPT += --privileged -t -$(DOCKER_SYNCD_BASE)_RUN_OPT += -v /host/warmboot:/var/warmboot $(DOCKER_SYNCD_BASE)_RUN_OPT += -v /host/machine.conf:/etc/machine.conf $(DOCKER_SYNCD_BASE)_RUN_OPT += -v /var/run/docker-syncd:/var/run/sswsyncd $(DOCKER_SYNCD_BASE)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro diff --git a/platform/pensando/docker-syncd-pensando/Dockerfile.j2 b/platform/pensando/docker-syncd-pensando/Dockerfile.j2 index 6ef61d8ddb4..e1901279b05 100755 --- a/platform/pensando/docker-syncd-pensando/Dockerfile.j2 +++ b/platform/pensando/docker-syncd-pensando/Dockerfile.j2 @@ -1,4 +1,4 @@ -FROM docker-config-engine-bullseye-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} +FROM docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} ARG docker_container_name diff --git a/platform/pensando/docker-syncd-pensando/supervisord.conf b/platform/pensando/docker-syncd-pensando/supervisord.conf index cd44d616229..eeed0d3f607 100644 --- a/platform/pensando/docker-syncd-pensando/supervisord.conf +++ b/platform/pensando/docker-syncd-pensando/supervisord.conf @@ -14,7 +14,7 @@ buffer_size=1024 [eventlistener:supervisor-proc-exit-listener] command=/usr/bin/supervisor-proc-exit-listener-rs --container-name syncd -events=PROCESS_STATE_EXITED,PROCESS_STATE_RUNNING +events=PROCESS_STATE_EXITED,PROCESS_STATE_RUNNING,PROCESS_STATE_FATAL autostart=true autorestart=unexpected buffer_size=1024 diff --git a/platform/pensando/dsc-drivers/debian/ionic-modules.install b/platform/pensando/dsc-drivers/debian/ionic-modules.install index 5bf3e9f92b4..6a2baab8ca4 100644 --- a/platform/pensando/dsc-drivers/debian/ionic-modules.install +++ b/platform/pensando/dsc-drivers/debian/ionic-modules.install @@ -1,6 +1,6 @@ -src/drivers/linux/build/mdev.ko lib/modules/6.12.41+deb13-sonic-arm64/extra -src/drivers/linux/build/mnet_uio_pdrv_genirq.ko lib/modules/6.12.41+deb13-sonic-arm64/extra -src/drivers/linux/build/ionic_mnic.ko lib/modules/6.12.41+deb13-sonic-arm64/extra +src/drivers/linux/mdev/mdev.ko lib/modules/6.12.41+deb13-sonic-arm64/extra +src/drivers/linux/mnet_uio_pdrv_genirq/mnet_uio_pdrv_genirq.ko lib/modules/6.12.41+deb13-sonic-arm64/extra +src/drivers/linux/eth/ionic/ionic_mnic.ko lib/modules/6.12.41+deb13-sonic-arm64/extra src/drivers/linux/pciesvc/6.12.41+deb13-sonic-arm64/pciesvc.ko lib/modules/6.12.41+deb13-sonic-arm64/extra src/drivers/linux/pciesvc/6.12.41+deb13-sonic-arm64/pciesvc_upg.ko lib/modules/6.12.41+deb13-sonic-arm64/extra systemd/ionic-modules.service lib/systemd/system diff --git a/platform/pensando/dsc-drivers/debian/rules b/platform/pensando/dsc-drivers/debian/rules index 1fff71dbd78..a6549bb1869 100755 --- a/platform/pensando/dsc-drivers/debian/rules +++ b/platform/pensando/dsc-drivers/debian/rules @@ -44,7 +44,7 @@ binary-arch: #dh_clean -k #dh_installdirs -binary-indep: +binary-indep: build dh_testdir dh_installdirs diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/Makefile b/platform/pensando/dsc-drivers/src/drivers/linux/Makefile index cf07266595a..30c3a9dff30 100644 --- a/platform/pensando/dsc-drivers/src/drivers/linux/Makefile +++ b/platform/pensando/dsc-drivers/src/drivers/linux/Makefile @@ -82,23 +82,25 @@ KBUILD_RULE = $(MAKE) -C $(KSRC) $(KOPT) M=$(CURDIR) KMOD_SRC_DIR=$(CURDIR) mnic: KOPT+=$(ETH_KOPT) mnic: @echo "===> Building MNIC driver " + $(MAKE) -C $(KSRC) V=1 M=$(KMOD_SRC_DIR)/eth/ionic $(KOPT) mkdir -p $(KMOD_OUT_DIR) - touch $(KMOD_OUT_DIR)/Makefile - $(MAKE) -C $(KSRC) V=1 M=$(KMOD_OUT_DIR) src=$(KMOD_SRC_DIR)/eth/ionic $(KOPT) - mv ${KMOD_OUT_DIR}/Module.symvers ${KMOD_OUT_DIR}/Module.symvers.mnic + mv $(KMOD_SRC_DIR)/eth/ionic/Module.symvers \ + $(KMOD_OUT_DIR)/Module.symvers.mnic mnet_uio_pdrv_genirq: KOPT+=$(ETH_KOPT) mnet_uio_pdrv_genirq: @echo "===> Building MNET_UIO driver " - $(MAKE) -C $(KSRC) V=1 M=$(KMOD_OUT_DIR) src=$(KMOD_SRC_DIR)/mnet_uio_pdrv_genirq $(KOPT) - mv ${KMOD_OUT_DIR}/Module.symvers ${KMOD_OUT_DIR}/Module.symvers.uio + $(MAKE) -C $(KSRC) V=1 M=$(KMOD_SRC_DIR)/mnet_uio_pdrv_genirq $(KOPT) + #$(MAKE) -C $(KSRC) V=1 M=$(KMOD_OUT_DIR) src=$(KMOD_SRC_DIR)/mnet_uio_pdrv_genirq $(KOPT) + mv ${KMOD_SRC_DIR}/mnet_uio_pdrv_genirq/Module.symvers ${KMOD_OUT_DIR}/Module.symvers.uio mdev: KOPT+=$(ETH_KOPT) mdev: KSYMS+=$(KSYMS_MNIC) mdev: KSYMS+=$(KSYMS_UIO) mdev: @echo "===> Building MDEV driver " - $(MAKE) -C $(KSRC) V=1 M=$(KMOD_OUT_DIR) src=$(KMOD_SRC_DIR)/mdev $(KOPT) + #$(MAKE) -C $(KSRC) V=1 M=$(KMOD_SRC_DIR)/mdev KBUILD_OUTPUT=$(KMOD_OUT_DIR) $(KOPT) + $(MAKE) -C $(KSRC) V=1 M=$(KMOD_SRC_DIR)/mdev $(KOPT) eth: KOPT+=$(ETH_KOPT) eth: diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/Makefile b/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/Makefile index 15b11bcb10e..1fb77b1f30a 100644 --- a/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/Makefile +++ b/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/Makefile @@ -4,7 +4,7 @@ obj-$(CONFIG_IONIC) := ionic.o obj-$(CONFIG_IONIC_MNIC) := ionic_mnic.o -ccflags-y := -g -I$(M)/../common -I$(M)/../../common -I$(src) +ccflags-y := -g -I$(M)/../../common -I$(M)/../../../common -I$(src) ionic-y := ionic_main.o ionic_bus_pci.o ionic_dev.o ionic_ethtool.o \ ionic_lif.o ionic_rx_filter.o ionic_txrx.o ionic_debugfs.o \ diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_bus_platform.c b/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_bus_platform.c index dca083ff9da..bc40c6b19ef 100644 --- a/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_bus_platform.c +++ b/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_bus_platform.c @@ -8,6 +8,7 @@ #include #include #include +#include #include #include "ionic.h" @@ -159,19 +160,34 @@ static void ionic_mnic_set_msi_msg(struct msi_desc *desc, struct msi_msg *msg) int ionic_bus_alloc_irq_vectors(struct ionic *ionic, unsigned int nintrs) { - int err = 0; - - err = platform_msi_domain_alloc_irqs(ionic->dev, nintrs, - ionic_mnic_set_msi_msg); - if (err) - return err; - - return nintrs; + struct device *dev = ionic->dev; + struct irq_domain *domain; + int err; + + /* 1. Explicitly associate the Platform MSI domain if not already set */ + if (!dev_get_msi_domain(dev)) { + domain = of_msi_get_domain(dev, dev->of_node, DOMAIN_BUS_PLATFORM_MSI); + if (domain) { + dev_set_msi_domain(dev, domain); + } else { + dev_err(dev, "Failed to find Platform MSI domain\n"); + return -EINVAL; + } + } + + /* 2. Modern allocation helper with the required callback */ + err = platform_device_msi_init_and_alloc_irqs(dev, nintrs, ionic_mnic_set_msi_msg); + if (err) { + dev_err(dev, "Platform MSI allocation failed: %d\n", err); + return err; + } + + return nintrs; } void ionic_bus_free_irq_vectors(struct ionic *ionic) { - platform_msi_domain_free_irqs(ionic->dev); + platform_device_msi_free_irqs_all(ionic->dev); } struct net_device *ionic_alloc_netdev(struct ionic *ionic) @@ -425,7 +441,7 @@ int ionic_probe(struct platform_device *pfdev) } EXPORT_SYMBOL_GPL(ionic_probe); -int ionic_remove(struct platform_device *pfdev) +void ionic_remove(struct platform_device *pfdev) { struct ionic *ionic = platform_get_drvdata(pfdev); @@ -446,7 +462,7 @@ int ionic_remove(struct platform_device *pfdev) dev_info(ionic->dev, "removed\n"); } - return 0; + return; } EXPORT_SYMBOL_GPL(ionic_remove); @@ -484,3 +500,4 @@ void ionic_bus_unregister_driver(void) { platform_driver_unregister(&ionic_driver); } + diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_ethtool.c b/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_ethtool.c index 8cfe461e8ca..7b70db873f8 100644 --- a/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_ethtool.c +++ b/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_ethtool.c @@ -1073,10 +1073,10 @@ static u32 ionic_get_rxfh_key_size(struct net_device *netdev) } #ifdef HAVE_RXFH_HASHFUNC -static int ionic_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key, +static int ionic_get_rxfh_legacy(struct net_device *netdev, u32 *indir, u8 *key, u8 *hfunc) #else -static int ionic_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key) +static int ionic_get_rxfh_legacy(struct net_device *netdev, u32 *indir, u8 *key) #endif { struct ionic_lif *lif = netdev_priv(netdev); @@ -1099,11 +1099,33 @@ static int ionic_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key) return 0; } +static int ionic_get_rxfh(struct net_device *netdev, + struct ethtool_rxfh_param *rxfh) +{ +#ifdef HAVE_RXFH_HASHFUNC + u8 hfunc; + int ret; + + ret = ionic_get_rxfh_legacy(netdev, + rxfh->indir, + rxfh->key, + &hfunc); + if (!ret) + rxfh->hfunc = hfunc; + + return ret; +#else + return ionic_get_rxfh_legacy(netdev, + rxfh->indir, + rxfh->key); +#endif +} + #ifdef HAVE_RXFH_HASHFUNC -static int ionic_set_rxfh(struct net_device *netdev, const u32 *indir, +static int ionic_set_rxfh_legacy(struct net_device *netdev, const u32 *indir, const u8 *key, const u8 hfunc) #else -static int ionic_set_rxfh(struct net_device *netdev, const u32 *indir, +static int ionic_set_rxfh_legacy(struct net_device *netdev, const u32 *indir, const u8 *key) #endif { @@ -1117,6 +1139,22 @@ static int ionic_set_rxfh(struct net_device *netdev, const u32 *indir, return ionic_lif_rss_config(lif, lif->rss_types, key, indir); } +static int ionic_set_rxfh(struct net_device *netdev, + struct ethtool_rxfh_param *rxfh, + struct netlink_ext_ack *extack) +{ +#ifdef HAVE_RXFH_HASHFUNC + return ionic_set_rxfh_legacy(netdev, + rxfh->indir, + rxfh->key, + rxfh->hfunc); +#else + return ionic_set_rxfh_legacy(netdev, + rxfh->indir, + rxfh->key); +#endif +} + static int ionic_set_tunable(struct net_device *dev, const struct ethtool_tunable *tuna, const void *data) @@ -1224,26 +1262,27 @@ static int ionic_get_module_eeprom(struct net_device *netdev, #if IS_ENABLED(CONFIG_PTP_1588_CLOCK) static int ionic_get_ts_info(struct net_device *netdev, - struct ethtool_ts_info *info) + struct kernel_ethtool_ts_info *info) { struct ionic_lif *lif = netdev_priv(netdev); struct ionic *ionic = lif->ionic; __le64 mask; + /* Fallback to generic ethtool handler if no PHC */ if (!lif->phc || !lif->phc->ptp) return ethtool_op_get_ts_info(netdev, info); info->phc_index = ptp_clock_index(lif->phc->ptp); - info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE | - SOF_TIMESTAMPING_RX_SOFTWARE | - SOF_TIMESTAMPING_SOFTWARE | - SOF_TIMESTAMPING_TX_HARDWARE | - SOF_TIMESTAMPING_RX_HARDWARE | - SOF_TIMESTAMPING_RAW_HARDWARE; - - /* tx modes */ + info->so_timestamping = + SOF_TIMESTAMPING_TX_SOFTWARE | + SOF_TIMESTAMPING_RX_SOFTWARE | + SOF_TIMESTAMPING_SOFTWARE | + SOF_TIMESTAMPING_TX_HARDWARE | + SOF_TIMESTAMPING_RX_HARDWARE | + SOF_TIMESTAMPING_RAW_HARDWARE; + /* TX timestamp modes */ info->tx_types = BIT(HWTSTAMP_TX_OFF) | BIT(HWTSTAMP_TX_ON); @@ -1257,8 +1296,7 @@ static int ionic_get_ts_info(struct net_device *netdev, info->tx_types |= BIT(HWTSTAMP_TX_ONESTEP_P2P); #endif - /* rx filters */ - + /* RX timestamp filters */ info->rx_filters = BIT(HWTSTAMP_FILTER_NONE) | BIT(HWTSTAMP_FILTER_ALL); @@ -1318,7 +1356,7 @@ static int ionic_get_ts_info(struct net_device *netdev, return 0; } -#endif +#endif /* CONFIG_PTP_1588_CLOCK */ static int ionic_nway_reset(struct net_device *netdev) { @@ -1413,3 +1451,4 @@ void ionic_ethtool_set_ops(struct net_device *netdev) { netdev->ethtool_ops = &ionic_ethtool_ops; } + diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_trace.h b/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_trace.h index 5c2fa8e1002..e4b85ced7da 100644 --- a/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_trace.h +++ b/platform/pensando/dsc-drivers/src/drivers/linux/eth/ionic/ionic_trace.h @@ -22,12 +22,14 @@ DECLARE_EVENT_CLASS(ionic_q_start_stop_template, TP_ARGS(q), - TP_STRUCT__entry(__field(unsigned int, index) - __string(devname, q->lif->netdev->name) + TP_STRUCT__entry( + __field(u16, index) + __string(devname, q->lif->netdev->name) ), - TP_fast_assign(__entry->index = q->index; - __assign_str(devname, q->lif->netdev->name); + TP_fast_assign( + __entry->index = q->index; + __assign_str(devname); ), TP_printk("%s: queue[%u]", __get_str(devname), __entry->index) @@ -51,3 +53,4 @@ DEFINE_EVENT(ionic_q_start_stop_template, ionic_q_start, #undef TRACE_INCLUDE_FILE #define TRACE_INCLUDE_FILE ionic_trace #include + diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/mdev/mdev_drv.c b/platform/pensando/dsc-drivers/src/drivers/linux/mdev/mdev_drv.c index c3cb3baeb26..c539493e618 100644 --- a/platform/pensando/dsc-drivers/src/drivers/linux/mdev/mdev_drv.c +++ b/platform/pensando/dsc-drivers/src/drivers/linux/mdev/mdev_drv.c @@ -490,7 +490,7 @@ static int mdev_probe(struct platform_device *pfdev) return 0; } -static int mdev_remove(struct platform_device *pfdev) +static void mdev_remove(struct platform_device *pfdev) { struct mdev_dev *mdev, *tmp; @@ -500,7 +500,7 @@ static int mdev_remove(struct platform_device *pfdev) devm_kfree(mdev_device, mdev); } - return 0; + return; } static const struct of_device_id mdev_of_match[] = { @@ -564,7 +564,7 @@ static int __init mdev_init(void) struct mdev_dev *mdev, *tmp; int ret; - mdev_class = class_create(THIS_MODULE, DRV_NAME); + mdev_class = class_create(DRV_NAME); if (IS_ERR(mdev_class)) { ret = PTR_ERR(mdev_class); goto error_out; @@ -668,3 +668,4 @@ MODULE_AUTHOR("Pensando Systems"); MODULE_DESCRIPTION(DRV_DESCRIPTION); MODULE_LICENSE("GPL"); MODULE_VERSION(DRV_VERSION); + diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/Makefile b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/Makefile index d2e3d2cda7b..026b487bab7 100644 --- a/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/Makefile +++ b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/Makefile @@ -7,20 +7,17 @@ obj-m := $(MODNAME).o $(shell echo '#define PCIESVC_VERSION "'`date`'"' >version.h) -kpci := - -pciesvc-src := $(shell cd $(PWD) && ls pciesvc/src/*.c) -pciesvc-obj := $(patsubst %.c,%.o,$(pciesvc-src)) -kpci += $(pciesvc-obj) - INCLUDES = -I/sonic/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc \ -I/sonic/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/include \ -I/sonic/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/pciesvc/src \ -I/usr/src/linux-headers-$(shell echo $(KVERSION) | sed 's/-arm64//')-common/include/linux #-I/usr/include \ #-I$(PWD) -$(MODNAME)-y := $(kpci) kpci_get_entry.o kpcimgr_module.o kpcinterface.o \ - kpci_entry.o kpci_kexec.o kpci_test.o pciesvc_end.o + +# Unity build: compile all .c files as a single translation unit +# This eliminates cross-file BL/ADRP instructions for kexec compatibility +# Only kpci_entry.S (assembly) needs to be compiled separately +$(MODNAME)-y := pciesvc_unity.o kpci_entry.o KDIR := /lib/modules/$(KVERSION)/build PWD := $(shell pwd) diff --git a/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/kpci_get_entry.c b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/kpci_get_entry.c index d50c15d6646..c0fee1771d3 100644 --- a/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/kpci_get_entry.c +++ b/platform/pensando/dsc-drivers/src/drivers/linux/pciesvc/kpci_get_entry.c @@ -1,24 +1,25 @@ -#include #include "kpcimgr_api.h" -extern char pciesvc_end; -extern void kpcimgr_init_intr(void *); -extern void kpcimgr_init_fn(void *); -extern void kpcimgr_version_fn(char **); -extern void kpcimgr_init_poll(void *); -extern void pciesvc_shut(int); -extern void kpcimgr_poll(kstate_t *, int, int); -extern unsigned long kpcimgr_get_holding_pen(unsigned long, unsigned int); -extern int kpcimgr_ind_intr(void *, int); -extern int kpcimgr_not_intr(void *, int); -extern void kpcimgr_undefined_entry(void); -extern int pciesvc_sysfs_cmd_read(void *, char *, int *); -extern int pciesvc_sysfs_cmd_write(void *, char *, size_t, int *); - +/* + * For unity builds, all these functions are defined in other .c files + * that are included before this file. We only need extern declarations + * for symbols that are truly external (pciesvc_start/end markers and + * version variables). + * + * For separate compilation, we include pciesvc_system_extern.h which + * provides the correct prototypes. + */ +#include "pciesvc_system_extern.h" + +/* Code boundary markers */ +extern void pciesvc_start(void); +extern void pciesvc_end(void); + +/* Version variables */ extern int pciesvc_version_major; extern int pciesvc_version_minor; -struct kpcimgr_entry_points_t ep; +static struct kpcimgr_entry_points_t ep; struct kpcimgr_entry_points_t *kpci_get_entry_points(void) { @@ -29,7 +30,8 @@ struct kpcimgr_entry_points_t *kpci_get_entry_points(void) ep.expected_mgr_version = 3; ep.lib_version_major = pciesvc_version_major; ep.lib_version_minor = pciesvc_version_minor; - ep.code_end = &pciesvc_end; + ep.code_start = (void *)pciesvc_start; + ep.code_end = (void *)pciesvc_end; for (i=0; i> CPLD_REV_SHIFT) & CPLD_REV_MASK + if rev == 0x2: + return self.mtfuji_rev_v2 + else: + return self.mtfuji_rev_v1 + return "N/A" + except: + return "N/A" + def readline_txt_file(self, path): try: with open(path, 'r') as f: @@ -146,3 +169,19 @@ def readline_txt_file(self, path): pass return '' + def get_slot_id(self): + cmd = "cpldapp -r 0xA" + try: + if self.is_host(): + slot_id = self.run_docker_cmd(cmd) + return int(slot_id,16) + else: + slot_id_file = DOCKER_HWSKU_PATH + "/dpu_slot_id" + slot_id_hex = open(slot_id_file, "r").read() + if slot_id_hex: + slot_id = int(slot_id_hex, 16) + return slot_id + return -1 + except: + return -1 + diff --git a/platform/pensando/sonic-platform-modules-dpu/sonic_platform/pcie.py b/platform/pensando/sonic-platform-modules-dpu/sonic_platform/pcie.py new file mode 100644 index 00000000000..e8101dcb503 --- /dev/null +++ b/platform/pensando/sonic-platform-modules-dpu/sonic_platform/pcie.py @@ -0,0 +1,136 @@ +try: + import os + import yaml + from .helper import APIHelper + from sonic_platform_base.sonic_pcie.pcie_common import PcieUtil +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +ETH_ENTRY = { + "dev": "00", + "fn": "0", + "id": "1004", # dev_id=0x1004 + "name": "Ethernet controller: AMD Pensando Systems DSC Management Controller", +} +SER_ENTRY = { + "dev": "00", + "fn": "1", + "id": "100a", # dev_id=0x100a + "name": "Serial controller: AMD Pensando Systems DSC Serial Port Controller", +} + +HOST_PLATFORM_PATH = '/usr/share/sonic/device' + +class Pcie(PcieUtil): + def __init__(self, path): + self._api_helper = APIHelper() + self.pcie_yaml_path = "/".join([HOST_PLATFORM_PATH, self._api_helper.get_platform(), "pcie.yaml"]) + if self._api_helper.is_host(): + self.create_pcie_yaml(self.pcie_yaml_path) + super().__init__(path) + + def get_pcie_check(self): + self.load_config_file() + for item_conf in self.confInfo: + item_conf["result"] = "Passed" + return self.confInfo + + def get_pcie_device(self): + """ + Parse `pcieutil dev` output and return a list of PCI devices, + enriched with id and name from ETH_ENTRY / SER_ENTRY. + """ + if self._api_helper.is_host(): + output = self._api_helper.run_docker_cmd("pcieutil dev") + if not output: + return [] + + lines = output.strip().splitlines() + if len(lines) < 2: + return [] + + pci_list = [] + + # Skip header + for line in lines[1:]: + fields = line.split() + if len(fields) < 4: + continue + + # hdl lif name p:bb:dd.f intx intrs + pcie_addr = fields[3] # 0:18:00.0 + + try: + _, bus_hex, devfn = pcie_addr.split(":") + dev, fn = devfn.split(".") + bus = f"{int(bus_hex, 16):02x}" + except ValueError: + continue + + # Attach ID + Name from constants + if fn == ETH_ENTRY["fn"]: + entry = ETH_ENTRY + elif fn == SER_ENTRY["fn"]: + entry = SER_ENTRY + else: + # Unknown PCIe function – ignore + continue + + pci_list.append({ + "bus": bus, + "dev": dev, + "fn": fn, + "id": entry["id"], + "name": entry["name"] + }) + else: + if not os.path.exists(self.pcie_yaml_path): + return [] + + try: + with open(self.pcie_yaml_path, "r", encoding="utf-8") as f: + data = yaml.safe_load(f) + except Exception: + return [] + + if not isinstance(data, list): + return [] + + pci_list = [] + for item in data: + # Defensive parsing + try: + pci_list.append({ + "bus": item["bus"], + "dev": item["dev"], + "fn": item["fn"], + "id": item["id"], + "name": item["name"] + }) + except KeyError: + continue + + return pci_list + + def create_pcie_yaml(self, path): + """ + Create pcie.yaml using fully-populated PCI device info + """ + pci_devices = self.get_pcie_device() + if not pci_devices: + return + + lines = [] + + for dev in pci_devices: + lines.append(f"- bus: '{dev['bus']}'") + lines.append(f" dev: '{dev['dev']}'") + lines.append(f" fn: '{dev['fn']}'") + lines.append(f" id: {dev['id']}") + lines.append(f" name: '{dev['name']}'") + + yaml_text = "\n".join(lines) + "\n" + + with open(path, "w", encoding="utf-8") as f: + f.write(yaml_text) + diff --git a/platform/pensando/sonic-platform-modules-dpu/sonic_platform/sensor.py b/platform/pensando/sonic-platform-modules-dpu/sonic_platform/sensor.py index c83bf4ca5f1..14f44b754bb 100644 --- a/platform/pensando/sonic-platform-modules-dpu/sonic_platform/sensor.py +++ b/platform/pensando/sonic-platform-modules-dpu/sonic_platform/sensor.py @@ -13,12 +13,13 @@ from sonic_platform_base.sensor_base import SensorBase import os import syslog + from .helper import APIHelper except ImportError as e: raise ImportError(str(e) + "- required module not found") NOT_AVAILABLE = "N/A" # [ Sensor-Name, sysfs, low_threshold, high_threshold, critical_low, critical_high] -VOLTAGE_SENSOR_MAPPING = [ +VOLTAGE_SENSOR_MAPPING_V1 = [ ["VP0P85_VDD_DDR_DPU0", "/sys/bus/i2c/devices/0-0044/hwmon/hwmon2/in2_input", "0.816", "0.884", "0.7905", "0.9095"], ["VP1P2_DDR_VDDQ_DPU0", "/sys/bus/i2c/devices/0-0044/hwmon/hwmon2/in3_input", "1.152", "1.248", "1.116", "1.284"], ["VP0P75_VDD_CORE_DPU0 1", "/sys/bus/i2c/devices/0-0055/hwmon/hwmon1/in2_input", "0.72", "0.78", "0.6975", "0.8025"], @@ -28,7 +29,7 @@ ] # [ Sensor-Name, sysfs, low_threshold, high_threshold, critical_low, critical_high] -CURRENT_SENSOR_MAPPING = [ +CURRENT_SENSOR_MAPPING_V1 = [ ["VP0P85_VDD_DDR_DPU0", "/sys/bus/i2c/devices/0-0044/hwmon/hwmon2/curr1_input", "0", "15100", NOT_AVAILABLE, "30000"], ["VP1P2_DDR_VDDQ_DPU0", "/sys/bus/i2c/devices/0-0044/hwmon/hwmon2/curr2_input", "0", "13800", NOT_AVAILABLE, "30000"], ["VP0P75_VDD_CORE_DPU0 1", "/sys/bus/i2c/devices/0-0055/hwmon/hwmon1/curr1_input", "0", "25000", NOT_AVAILABLE, "30000"], @@ -37,13 +38,35 @@ ["VP0P85_VDD_ARM_DPU0", "/sys/bus/i2c/devices/0-0066/hwmon/hwmon0/curr2_input", "0", "29100", NOT_AVAILABLE, "30000"], ] +# [ Sensor-Name, sysfs, low_threshold, high_threshold, critical_low, critical_high] +VOLTAGE_SENSOR_MAPPING_V2 = [ + ["VP0P85_VDD_DDR_DPU0", "/sys/bus/i2c/devices/0-0072/hwmon/hwmon0/in2_input", "0.816", "0.884", "0.7905", "0.9095"], + ["VP1P2_DDR_VDDQ_DPU0", "/sys/bus/i2c/devices/0-0072/hwmon/hwmon0/in3_input", "1.152", "1.248", "1.116", "1.284"], + ["VP0P75_VDD_CORE_DPU0", "/sys/bus/i2c/devices/0-0062/hwmon/hwmon1/in2_input", "0.72", "0.78", "0.6975", "0.8025"], + ["VP0P85_VDD_ARM_DPU0", "/sys/bus/i2c/devices/0-0062/hwmon/hwmon1/in3_input", "0.816", "0.884", "0.7905", "0.9095"] +] + +# [ Sensor-Name, sysfs, low_threshold, high_threshold, critical_low, critical_high] +CURRENT_SENSOR_MAPPING_V2 = [ + ["VP0P85_VDD_DDR_DPU0", "/sys/bus/i2c/devices/0-0072/hwmon/hwmon0/curr1_input", "0", "15100", NOT_AVAILABLE, "30000"], + ["VP1P2_DDR_VDDQ_DPU0", "/sys/bus/i2c/devices/0-0072/hwmon/hwmon0/curr2_input", "0", "13800", NOT_AVAILABLE, "30000"], + ["VP0P75_VDD_CORE_DPU0", "/sys/bus/i2c/devices/0-0062/hwmon/hwmon1/curr1_input", "0", "25000", NOT_AVAILABLE, "30000"], + ["VP0P85_VDD_ARM_DPU0", "/sys/bus/i2c/devices/0-0062/hwmon/hwmon1/curr2_input", "0", "29100", NOT_AVAILABLE, "30000"], +] + class VoltageSensor(SensorBase): """ Abstract base class for interfacing with a voltage sensor module """ @classmethod def _validate_voltage_sensors(cls): - for sensor_name, sensor_hwmon, *_ in VOLTAGE_SENSOR_MAPPING: + from sonic_platform.helper import APIHelper + apiHelper = APIHelper() + board_rev = apiHelper.get_board_rev() + voltage_sensor_mapping = VOLTAGE_SENSOR_MAPPING_V1 + if board_rev == apiHelper.mtfuji_rev_v2: + voltage_sensor_mapping = VOLTAGE_SENSOR_MAPPING_V2 + for sensor_name, sensor_hwmon, *_ in voltage_sensor_mapping: if not os.path.exists(sensor_hwmon): return False return True @@ -58,14 +81,19 @@ def get_unit(cls): def __init__(self, voltage_sensor_index): SensorBase.__init__(self) + self._api_helper = APIHelper() self.index = voltage_sensor_index self.sensor_hwmon_path = None - sensor_hwmon = VOLTAGE_SENSOR_MAPPING[self.index][1] + self.board_rev = self._api_helper.get_board_rev() + self.voltage_sensor_mapping = VOLTAGE_SENSOR_MAPPING_V1 + if self.board_rev == self._api_helper.mtfuji_rev_v2: + self.voltage_sensor_mapping = VOLTAGE_SENSOR_MAPPING_V2 + sensor_hwmon = self.voltage_sensor_mapping[self.index][1] if os.path.exists(sensor_hwmon): self.sensor_hwmon_path = sensor_hwmon def get_name(self): - return VOLTAGE_SENSOR_MAPPING[self.index][0] + return self.voltage_sensor_mapping[self.index][0] def get_value(self): voltage = 0.0 @@ -83,7 +111,7 @@ def get_high_threshold(self): Returns: High threshold """ - value = VOLTAGE_SENSOR_MAPPING[self.index][3] + value = self.voltage_sensor_mapping[self.index][3] if value == NOT_AVAILABLE: return NOT_AVAILABLE return float(value) @@ -95,7 +123,7 @@ def get_low_threshold(self): Returns: Low threshold """ - value = VOLTAGE_SENSOR_MAPPING[self.index][2] + value = self.voltage_sensor_mapping[self.index][2] if value == NOT_AVAILABLE: return NOT_AVAILABLE return float(value) @@ -107,7 +135,7 @@ def get_high_critical_threshold(self): Returns: The high critical threshold value of sensor """ - value = VOLTAGE_SENSOR_MAPPING[self.index][5] + value = self.voltage_sensor_mapping[self.index][5] if value == NOT_AVAILABLE: return NOT_AVAILABLE return float(value) @@ -119,7 +147,7 @@ def get_low_critical_threshold(self): Returns: The low critical threshold value of sensor """ - value = VOLTAGE_SENSOR_MAPPING[self.index][4] + value = self.voltage_sensor_mapping[self.index][4] if value == NOT_AVAILABLE: return NOT_AVAILABLE return float(value) @@ -130,7 +158,13 @@ class CurrentSensor(SensorBase): """ @classmethod def _validate_current_sensors(cls): - for sensor_name, sensor_hwmon, *_ in CURRENT_SENSOR_MAPPING: + from sonic_platform.helper import APIHelper + apiHelper = APIHelper() + board_rev = apiHelper.get_board_rev() + current_sensor_mapping = CURRENT_SENSOR_MAPPING_V1 + if board_rev == apiHelper.mtfuji_rev_v2: + current_sensor_mapping = CURRENT_SENSOR_MAPPING_V2 + for sensor_name, sensor_hwmon, *_ in current_sensor_mapping: if not os.path.exists(sensor_hwmon): return False return True @@ -145,14 +179,19 @@ def get_unit(cls): def __init__(self, current_sensor_index): SensorBase.__init__(self) + self._api_helper = APIHelper() self.index = current_sensor_index self.sensor_hwmon_path = None - sensor_hwmon = CURRENT_SENSOR_MAPPING[self.index][1] + self.board_rev = self._api_helper.get_board_rev() + self.current_sensor_mapping = CURRENT_SENSOR_MAPPING_V1 + if self.board_rev == self._api_helper.mtfuji_rev_v2: + self.current_sensor_mapping = CURRENT_SENSOR_MAPPING_V2 + sensor_hwmon = self.current_sensor_mapping[self.index][1] if os.path.exists(sensor_hwmon): self.sensor_hwmon_path = sensor_hwmon def get_name(self): - return CURRENT_SENSOR_MAPPING[self.index][0] + return self.current_sensor_mapping[self.index][0] def get_value(self): current = 0 @@ -170,7 +209,7 @@ def get_high_threshold(self): Returns: High threshold """ - value = CURRENT_SENSOR_MAPPING[self.index][3] + value = self.current_sensor_mapping[self.index][3] if value == NOT_AVAILABLE: return NOT_AVAILABLE return float(value) @@ -182,7 +221,7 @@ def get_low_threshold(self): Returns: Low threshold """ - value = CURRENT_SENSOR_MAPPING[self.index][2] + value = self.current_sensor_mapping[self.index][2] if value == NOT_AVAILABLE: return NOT_AVAILABLE return float(value) @@ -194,7 +233,7 @@ def get_high_critical_threshold(self): Returns: The high critical threshold value of sensor """ - value = CURRENT_SENSOR_MAPPING[self.index][5] + value = self.current_sensor_mapping[self.index][5] if value == NOT_AVAILABLE: return NOT_AVAILABLE return float(value) @@ -206,7 +245,7 @@ def get_low_critical_threshold(self): Returns: The low critical threshold value of sensor """ - value = CURRENT_SENSOR_MAPPING[self.index][4] + value = self.current_sensor_mapping[self.index][4] if value == NOT_AVAILABLE: return NOT_AVAILABLE return float(value) diff --git a/platform/pensando/sonic-platform-modules-dpu/sonic_platform/thermal.py b/platform/pensando/sonic-platform-modules-dpu/sonic_platform/thermal.py index 10dd541fc14..c7bcab4d4e4 100644 --- a/platform/pensando/sonic-platform-modules-dpu/sonic_platform/thermal.py +++ b/platform/pensando/sonic-platform-modules-dpu/sonic_platform/thermal.py @@ -17,6 +17,7 @@ raise ImportError(str(e) + "- required module not found") g_board_id = None +g_board_rev = None class Thermal(ThermalBase): """Pensando-specific Thermal class""" @@ -28,9 +29,8 @@ class Thermal(ThermalBase): ] # [ Sensor-Name, sysfs, low_threshold, high_threshold, critical_low, critical_high] - SENSOR_MAPPING_MTFUJI = [ - ["Die temperature", "/sys/class/hwmon/hwmon0/temp2_input", 1, 110, -10, 130], - ["Board temperature", "/sys/class/hwmon/hwmon0/temp1_input", 1, 110, -10, 130], + SENSOR_MAPPING_MTFUJI_V1 = [ + ["Power Rail temperature", "/sys/class/hwmon/hwmon0/temp1_input", 1, 110, -10, 130], ["VP0P85_VDD_DDR_DPU0", "/sys/bus/i2c/devices/0-0044/hwmon/hwmon2/temp2_input", 1, 110, -10, 130], ["VP1P2_DDR_VDDQ_DPU0", "/sys/bus/i2c/devices/0-0044/hwmon/hwmon2/temp3_input", 1, 110, -10, 130], ["VP0P75_VDD_CORE_DPU0 1", "/sys/bus/i2c/devices/0-0055/hwmon/hwmon1/temp2_input", 1, 110, -10, 130], @@ -39,12 +39,23 @@ class Thermal(ThermalBase): ["VP0P85_VDD_ARM_DPU0", "/sys/bus/i2c/devices/0-0066/hwmon/hwmon0/temp3_input", 1, 110, -10, 130], ] + # [ Sensor-Name, sysfs, low_threshold, high_threshold, critical_low, critical_high] + SENSOR_MAPPING_MTFUJI_V2 = [ + ["Power Rail temperature", "/sys/class/hwmon/hwmon0/temp1_input", 1, 110, -10, 130], + ["VP0P85_VDD_DDR_DPU0", "/sys/bus/i2c/devices/0-0072/hwmon/hwmon0/temp1_input", 1, 110, -10, 130], + ["VP1P2_DDR_VDDQ_DPU0", "/sys/bus/i2c/devices/0-0072/hwmon/hwmon0/temp2_input", 1, 110, -10, 130], + ["VP0P75_VDD_CORE_DPU0", "/sys/bus/i2c/devices/0-0062/hwmon/hwmon1/temp1_input", 1, 110, -10, 130], + ["VP0P85_VDD_ARM_DPU0", "/sys/bus/i2c/devices/0-0062/hwmon/hwmon1/temp2_input", 1, 110, -10, 130], + ] + @classmethod def _thermals_available(cls): global g_board_id + global g_board_rev from sonic_platform.helper import APIHelper apiHelper = APIHelper() g_board_id = apiHelper.get_board_id() + g_board_rev = apiHelper.get_board_rev() temp_hwmon = '/sys/bus/i2c/devices/i2c-0/0-004c/hwmon' if g_board_id == apiHelper.mtfuji_board_id: temp_hwmon = '/sys/class/hwmon/hwmon0/temp1_input' @@ -58,11 +69,18 @@ def __init__(self, thermal_index, sfp = None): self._api_helper = APIHelper() self.index = thermal_index + 1 self.board_id = g_board_id + self.board_rev = g_board_rev + self.sensor_mapping = self.SENSOR_MAPPING if self.board_id != self._api_helper.mtfuji_board_id: temp_hwmon = '/sys/bus/i2c/devices/i2c-0/0-004c/hwmon' self.temp_dir = None if os.path.exists(temp_hwmon): self.temp_dir = temp_hwmon + '/' + os.listdir(temp_hwmon)[0] + else: + if self.board_rev == self._api_helper.mtfuji_rev_v1: + self.sensor_mapping = self.SENSOR_MAPPING_MTFUJI_V1 + if self.board_rev == self._api_helper.mtfuji_rev_v2: + self.sensor_mapping = self.SENSOR_MAPPING_MTFUJI_V2 def get_name(self): """ @@ -71,8 +89,8 @@ def get_name(self): string: The name of the thermal """ if self.board_id == self._api_helper.mtfuji_board_id: - return self.SENSOR_MAPPING_MTFUJI[self.index - 1][0] - return self.SENSOR_MAPPING[self.index - 1] + return self.sensor_mapping[self.index - 1][0] + return self.sensor_mapping[self.index - 1] def get_presence(self): """ @@ -119,7 +137,7 @@ def get_temperature(self): try : temp_file = None if self.board_id == self._api_helper.mtfuji_board_id: - temp_file = self.SENSOR_MAPPING_MTFUJI[self.index - 1][1] + temp_file = self.sensor_mapping[self.index - 1][1] else: temp_file = self.temp_dir +'/temp{0}_input'.format(str(self.index)) temperature = float(open(temp_file).read()) / 1000.0 @@ -136,7 +154,7 @@ def get_high_threshold(self): up to nearest thousandth of one degree Celsius, e.g. 30.125 """ if self.board_id == self._api_helper.mtfuji_board_id: - return float(self.SENSOR_MAPPING_MTFUJI[self.index - 1][3]) + return float(self.sensor_mapping[self.index - 1][3]) raise NotImplementedError def get_low_threshold(self): @@ -148,7 +166,7 @@ def get_low_threshold(self): up to nearest thousandth of one degree Celsius, e.g. 30.125 """ if self.board_id == self._api_helper.mtfuji_board_id: - return float(self.SENSOR_MAPPING_MTFUJI[self.index - 1][2]) + return float(self.sensor_mapping[self.index - 1][2]) raise NotImplementedError def get_high_critical_threshold(self): @@ -167,7 +185,7 @@ def get_high_critical_threshold(self): except Exception: pass else: - return float(self.SENSOR_MAPPING_MTFUJI[self.index - 1][5]) + return float(self.sensor_mapping[self.index - 1][5]) return float(temperature) def get_low_critical_threshold(self): @@ -179,7 +197,7 @@ def get_low_critical_threshold(self): up to nearest thousandth of one degree Celsius, e.g. 30.125 """ if self.board_id == self._api_helper.mtfuji_board_id: - return float(self.SENSOR_MAPPING_MTFUJI[self.index - 1][4]) + return float(self.sensor_mapping[self.index - 1][4]) raise NotImplementedError diff --git a/platform/pensando/sonic-platform-modules-dpu/sonic_platform/watchdog.py b/platform/pensando/sonic-platform-modules-dpu/sonic_platform/watchdog.py index afa94c13ae7..94e109eeaa2 100644 --- a/platform/pensando/sonic-platform-modules-dpu/sonic_platform/watchdog.py +++ b/platform/pensando/sonic-platform-modules-dpu/sonic_platform/watchdog.py @@ -16,8 +16,8 @@ except ImportError as e: raise ImportError(str(e) + "- required module not found") -WATCHDOG_STATUS = "/sys/class/watchdog/watchdog1/status" -WATCHDOG_TIMEOUT = "/sys/class/watchdog/watchdog1/timeout" +WATCHDOG_STATUS = "/sys/class/watchdog/watchdog0/status" +WATCHDOG_TIMEOUT = "/sys/class/watchdog/watchdog0/timeout" WATCHDOG_ARMED_MASK = 0x8000 class Watchdog(WatchdogBase): diff --git a/platform/template/docker-gbsyncd-base.mk b/platform/template/docker-gbsyncd-base.mk index 4041490923a..22ffa83f428 100644 --- a/platform/template/docker-gbsyncd-base.mk +++ b/platform/template/docker-gbsyncd-base.mk @@ -23,7 +23,6 @@ SONIC_BULLSEYE_DBG_DOCKERS += $(DOCKER_GBSYNCD_BASE_DBG) SONIC_INSTALL_DOCKER_DBG_IMAGES += $(DOCKER_GBSYNCD_BASE_DBG) $(DOCKER_GBSYNCD_BASE)_CONTAINER_NAME = gbsyncd -$(DOCKER_GBSYNCD_BASE)_RUN_OPT += --privileged -t +$(DOCKER_GBSYNCD_BASE)_RUN_OPT += --cap-add=SYS_RAWIO --cap-add=SYS_ADMIN --cap-add=NET_ADMIN -t --security-opt apparmor=unconfined --security-opt="systempaths=unconfined" $(DOCKER_GBSYNCD_BASE)_RUN_OPT += -v /host/machine.conf:/etc/machine.conf $(DOCKER_GBSYNCD_BASE)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro -$(DOCKER_GBSYNCD_BASE)_RUN_OPT += -v /host/warmboot:/var/warmboot diff --git a/platform/template/docker-gbsyncd-bookworm.mk b/platform/template/docker-gbsyncd-bookworm.mk index b02cddff90b..5c59d8af2fe 100644 --- a/platform/template/docker-gbsyncd-bookworm.mk +++ b/platform/template/docker-gbsyncd-bookworm.mk @@ -23,7 +23,6 @@ SONIC_BOOKWORM_DBG_DOCKERS += $(DOCKER_GBSYNCD_BASE_DBG) SONIC_INSTALL_DOCKER_DBG_IMAGES += $(DOCKER_GBSYNCD_BASE_DBG) $(DOCKER_GBSYNCD_BASE)_CONTAINER_NAME = gbsyncd -$(DOCKER_GBSYNCD_BASE)_RUN_OPT += --privileged -t +$(DOCKER_GBSYNCD_BASE)_RUN_OPT += --cap-add=SYS_RAWIO --cap-add=SYS_ADMIN --cap-add=NET_ADMIN -t --security-opt apparmor=unconfined --security-opt="systempaths=unconfined" $(DOCKER_GBSYNCD_BASE)_RUN_OPT += -v /host/machine.conf:/etc/machine.conf $(DOCKER_GBSYNCD_BASE)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro -$(DOCKER_GBSYNCD_BASE)_RUN_OPT += -v /host/warmboot:/var/warmboot diff --git a/platform/template/docker-gbsyncd-trixie.mk b/platform/template/docker-gbsyncd-trixie.mk new file mode 100644 index 00000000000..8530ae4da24 --- /dev/null +++ b/platform/template/docker-gbsyncd-trixie.mk @@ -0,0 +1,28 @@ +# docker image for gbsyncd + + +DOCKER_GBSYNCD_BASE_STEM = docker-gbsyncd-$(DOCKER_GBSYNCD_PLATFORM_CODE) +DOCKER_GBSYNCD_BASE = $(DOCKER_GBSYNCD_BASE_STEM).gz +DOCKER_GBSYNCD_BASE_DBG = $(DOCKER_GBSYNCD_BASE_STEM)-$(DBG_IMAGE_MARK).gz + +$(DOCKER_GBSYNCD_BASE)_PATH = $(PLATFORM_PATH)/docker-gbsyncd-$(DOCKER_GBSYNCD_PLATFORM_CODE) + + +$(DOCKER_GBSYNCD_BASE)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_TRIXIE) + +$(DOCKER_GBSYNCD_BASE)_DBG_DEPENDS += $($(DOCKER_CONFIG_ENGINE_TRIXIE)_DBG_DEPENDS) + +$(DOCKER_GBSYNCD_BASE)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_TRIXIE)_DBG_IMAGE_PACKAGES) + +SONIC_DOCKER_IMAGES += $(DOCKER_GBSYNCD_BASE) +SONIC_TRIXIE_DOCKERS += $(DOCKER_GBSYNCD_BASE) +SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_GBSYNCD_BASE) + +SONIC_DOCKER_DBG_IMAGES += $(DOCKER_GBSYNCD_BASE_DBG) +SONIC_TRIXIE_DBG_DOCKERS += $(DOCKER_GBSYNCD_BASE_DBG) +SONIC_INSTALL_DOCKER_DBG_IMAGES += $(DOCKER_GBSYNCD_BASE_DBG) + +$(DOCKER_GBSYNCD_BASE)_CONTAINER_NAME = gbsyncd +$(DOCKER_GBSYNCD_BASE)_RUN_OPT += --privileged -t +$(DOCKER_GBSYNCD_BASE)_RUN_OPT += -v /host/machine.conf:/etc/machine.conf +$(DOCKER_GBSYNCD_BASE)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro diff --git a/platform/template/docker-syncd-trixie.mk b/platform/template/docker-syncd-trixie.mk new file mode 100644 index 00000000000..c6f4ab0806c --- /dev/null +++ b/platform/template/docker-syncd-trixie.mk @@ -0,0 +1,31 @@ +# docker image for TRIXIE syncd container + +DOCKER_SYNCD_BASE_STEM = docker-syncd-$(DOCKER_SYNCD_PLATFORM_CODE) +DOCKER_SYNCD_BASE = $(DOCKER_SYNCD_BASE_STEM).gz +DOCKER_SYNCD_BASE_DBG = $(DOCKER_SYNCD_BASE_STEM)-$(DBG_IMAGE_MARK).gz + +$(DOCKER_SYNCD_BASE)_PATH = $(PLATFORM_PATH)/docker-syncd-$(DOCKER_SYNCD_PLATFORM_CODE) + +$(DOCKER_SYNCD_BASE)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_TRIXIE) +$(DOCKER_SYNCD_BASE)_DBG_DEPENDS += $($(DOCKER_CONFIG_ENGINE_TRIXIE)_DBG_DEPENDS) +$(DOCKER_SYNCD_BASE)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_TRIXIE)_DBG_IMAGE_PACKAGES) + +SONIC_DOCKER_IMAGES += $(DOCKER_SYNCD_BASE) +ifneq ($(ENABLE_SYNCD_RPC),y) +SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_SYNCD_BASE) +endif + +SONIC_DOCKER_DBG_IMAGES += $(DOCKER_SYNCD_BASE_DBG) +ifneq ($(ENABLE_SYNCD_RPC),y) +SONIC_INSTALL_DOCKER_DBG_IMAGES += $(DOCKER_SYNCD_BASE_DBG) +endif + +$(DOCKER_SYNCD_BASE)_CONTAINER_NAME = syncd +$(DOCKER_SYNCD_BASE)_RUN_OPT += --privileged -t +$(DOCKER_SYNCD_BASE)_RUN_OPT += -v /host/machine.conf:/etc/machine.conf +$(DOCKER_SYNCD_BASE)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro + +SONIC_TRIXIE_DOCKERS += $(DOCKER_SYNCD_BASE) +SONIC_TRIXIE_DBG_DOCKERS += $(DOCKER_SYNCD_BASE_DBG) + + diff --git a/platform/vpp b/platform/vpp index 5f31ccf4a59..800ba3026c6 160000 --- a/platform/vpp +++ b/platform/vpp @@ -1 +1 @@ -Subproject commit 5f31ccf4a599abf4feb7e018b87b931ea53878ef +Subproject commit 800ba3026c6d5d6c6b32bfdcf5650f95ea08fbc3 diff --git a/platform/vs/docker-dash-engine.mk b/platform/vs/docker-dash-engine.mk index dcba3fe3436..dbddffb7dae 100644 --- a/platform/vs/docker-dash-engine.mk +++ b/platform/vs/docker-dash-engine.mk @@ -8,10 +8,8 @@ $(DOCKER_DASH_ENGINE)_PATH = $(PLATFORM_PATH)/docker-dash-engine SONIC_DOCKER_IMAGES += $(DOCKER_DASH_ENGINE) SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_DASH_ENGINE) -$(DOCKER_DASH_ENGINE)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_BOOKWORM) $(DOCKER_DASH_ENGINE)_CONTAINER_NAME = dash_engine $(DOCKER_DASH_ENGINE)_CONTAINER_PRIVILEGED = true $(DOCKER_DASH_ENGINE)_RUN_OPT += --privileged -t -SONIC_BOOKWORM_DOCKERS += $(DOCKER_DASH_ENGINE) diff --git a/platform/vs/docker-gbsyncd-vs.mk b/platform/vs/docker-gbsyncd-vs.mk index 9433a28a06b..82821994476 100644 --- a/platform/vs/docker-gbsyncd-vs.mk +++ b/platform/vs/docker-gbsyncd-vs.mk @@ -1,7 +1,7 @@ # docker image for vs gbsyncd DOCKER_GBSYNCD_PLATFORM_CODE = vs -include $(PLATFORM_PATH)/../template/docker-gbsyncd-bookworm.mk +include $(PLATFORM_PATH)/../template/docker-gbsyncd-trixie.mk $(DOCKER_GBSYNCD_BASE)_DEPENDS += $(SYNCD_VS) \ $(LIBNL3_DEV) \ @@ -16,4 +16,3 @@ $(DOCKER_GBSYNCD_BASE)_DBG_DEPENDS += $(SYNCD_VS_DBG) \ $(DOCKER_GBSYNCD_BASE)_VERSION = 1.0.0 $(DOCKER_GBSYNCD_BASE)_PACKAGE_NAME = gbsyncd -$(DOCKER_GBSYNCD_BASE)_RUN_OPT += -v /host/warmboot:/var/warmboot diff --git a/platform/vs/docker-gbsyncd-vs/Dockerfile.j2 b/platform/vs/docker-gbsyncd-vs/Dockerfile.j2 index 47b55dc9846..e3423afaf00 100644 --- a/platform/vs/docker-gbsyncd-vs/Dockerfile.j2 +++ b/platform/vs/docker-gbsyncd-vs/Dockerfile.j2 @@ -1,5 +1,5 @@ {% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files, rsync_from_builder_stage %} -ARG BASE=docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} +ARG BASE=docker-config-engine-trixie-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} FROM $BASE AS base @@ -10,14 +10,14 @@ ENV DEBIAN_FRONTEND=noninteractive RUN apt-get update -RUN apt-get install -f -y iproute2 libcap2-bin +RUN apt-get install -f -y libcap2-bin # For DASH engine COPY debs/libnl-3-dev_{{ LIBNL3_VERSION_SONIC }}_{{ CONFIGURED_ARCH }}.deb debs/libnl-route-3-dev_{{ LIBNL3_VERSION_SONIC }}_{{ CONFIGURED_ARCH }}.deb debs/ RUN dpkg -i debs/libnl-3-dev_{{ LIBNL3_VERSION_SONIC }}_{{ CONFIGURED_ARCH }}.deb debs/libnl-route-3-dev_{{ LIBNL3_VERSION_SONIC }}_{{ CONFIGURED_ARCH }}.deb -RUN apt-get install -f -y libabsl20220623 libc-ares2 python3-six libnanomsg5 libpcap0.8 libthrift-0.17.0 libgmp-dev libnanomsg-dev libpcap-dev libtool pkg-config libthrift-dev python3-thrift thrift-compiler libgc1 cpp libboost1.83-all-dev libfl-dev libgc-dev libgmp-dev libbpf-dev tcpdump libelf-dev llvm clang python3-pyroute2 python3-ply python3-scapy python3-setuptools python3-thrift libthrift-0.17.0 libgrpc++1.51 libgrpc29 libprotobuf32 libprotoc-dev protobuf-compiler python3-protobuf libgrpc++-dev libgrpc-dev protobuf-compiler-grpc python3-grpcio +RUN apt-get install -f -y libc-ares2 python3-six libnanomsg5 libpcap0.8 libgmp-dev libnanomsg-dev libpcap-dev libtool pkg-config libthrift-dev python3-thrift thrift-compiler libgc1 cpp libfl-dev libgc-dev libgmp-dev libbpf-dev tcpdump libelf-dev llvm clang python3-pyroute2 python3-ply python3-scapy python3-setuptools python3-thrift libgrpc++1.51 libgrpc29 libprotobuf32 libprotoc-dev protobuf-compiler python3-protobuf libgrpc++-dev libgrpc-dev protobuf-compiler-grpc python3-grpcio {% if docker_gbsyncd_vs_debs.strip() -%} # Copy built Debian packages diff --git a/platform/vs/docker-gbsyncd-vs/supervisord.conf b/platform/vs/docker-gbsyncd-vs/supervisord.conf index 94d0e9d6e1c..473c2d18ba5 100644 --- a/platform/vs/docker-gbsyncd-vs/supervisord.conf +++ b/platform/vs/docker-gbsyncd-vs/supervisord.conf @@ -14,7 +14,7 @@ buffer_size=1024 [eventlistener:supervisor-proc-exit-listener] command=/usr/bin/supervisor-proc-exit-listener-rs --container-name gbsyncd -events=PROCESS_STATE_EXITED,PROCESS_STATE_RUNNING +events=PROCESS_STATE_EXITED,PROCESS_STATE_RUNNING,PROCESS_STATE_FATAL autostart=true autorestart=unexpected buffer_size=1024 diff --git a/platform/vs/docker-ptf-sai.mk b/platform/vs/docker-ptf-sai.mk index 619dc75bd42..950755b0c1e 100644 --- a/platform/vs/docker-ptf-sai.mk +++ b/platform/vs/docker-ptf-sai.mk @@ -1,5 +1,6 @@ # docker image for docker-ptf-sai +ifeq ($(INCLUDE_PTF),y) DOCKER_PTF_SAI = docker-ptf-sai.gz DOCKER_PTF_BASE = docker-ptf.gz $(DOCKER_PTF_SAI)_PATH = $(DOCKERS_PATH)/docker-ptf-sai @@ -11,3 +12,4 @@ endif $(DOCKER_PTF_SAI)_LOAD_DOCKERS += $(DOCKER_PTF_BASE) SONIC_DOCKER_IMAGES += $(DOCKER_PTF_SAI) SONIC_BOOKWORM_DOCKERS += $(DOCKER_PTF_SAI) +endif diff --git a/platform/vs/docker-ptf.mk b/platform/vs/docker-ptf.mk index dc66bf457f2..b91e8878b67 100644 --- a/platform/vs/docker-ptf.mk +++ b/platform/vs/docker-ptf.mk @@ -1,5 +1,6 @@ # docker image for docker-ptf +ifeq ($(INCLUDE_PTF),y) DOCKER_PTF = docker-ptf.gz $(DOCKER_PTF)_PYTHON_WHEELS += $(PTF_PY3) $(DOCKER_PTF)_PATH = $(DOCKERS_PATH)/docker-ptf @@ -10,3 +11,4 @@ $(DOCKER_PTF)_DEPENDS += $(PYTHON_SAITHRIFT) $(P4LANG_PI) $(P4LANG_BMV2) $(P4LAN endif SONIC_DOCKER_IMAGES += $(DOCKER_PTF) SONIC_BOOKWORM_DOCKERS += $(DOCKER_PTF) +endif diff --git a/platform/vs/docker-sonic-vs.mk b/platform/vs/docker-sonic-vs.mk index 8371030f8ac..b56da301ea9 100644 --- a/platform/vs/docker-sonic-vs.mk +++ b/platform/vs/docker-sonic-vs.mk @@ -7,13 +7,22 @@ $(DOCKER_SONIC_VS)_DEPENDS += $(SYNCD_VS) \ $(LIBTEAMDCTL) \ $(LIBTEAM_UTILS) \ $(SONIC_DEVICE_DATA) \ - $(LIBYANG) \ - $(LIBYANG_CPP) \ - $(LIBYANG_PY3) \ + $(LIBYANG3) \ + $(LIBYANG3_PY3) \ $(SONIC_UTILITIES_DATA) \ $(SONIC_HOST_SERVICES_DATA) \ $(SYSMGR) +# Include feature dockers — auto-merges DEPENDS, PYTHON_WHEELS, +# and provides --build-context for COPY --from= in Dockerfile.j2 +$(DOCKER_SONIC_VS)_INCLUDE_DOCKER += $(DOCKER_LLDP) +$(DOCKER_SONIC_VS)_INCLUDE_DOCKER += $(DOCKER_FPM_FRR) +$(DOCKER_SONIC_VS)_INCLUDE_DOCKER += $(DOCKER_TEAMD) +$(DOCKER_SONIC_VS)_INCLUDE_DOCKER += $(DOCKER_NAT) +$(DOCKER_SONIC_VS)_INCLUDE_DOCKER += $(DOCKER_SFLOW) +$(DOCKER_SONIC_VS)_INCLUDE_DOCKER += $(DOCKER_ORCHAGENT) +$(DOCKER_SONIC_VS)_INCLUDE_DOCKER += $(DOCKER_DATABASE) + $(DOCKER_SONIC_VS)_PYTHON_WHEELS += $(SONIC_PY_COMMON_PY3) \ $(SONIC_PLATFORM_COMMON_PY3) \ $(SONIC_YANG_MODELS_PY3) \ @@ -52,3 +61,11 @@ $(DOCKER_SONIC_VS)_LOAD_DOCKERS += $(DOCKER_SWSS_LAYER_BOOKWORM) SONIC_DOCKER_IMAGES += $(DOCKER_SONIC_VS) SONIC_BOOKWORM_DOCKERS += $(DOCKER_SONIC_VS) + +# constants.yml is still needed in the build context for bgpcfgd +DOCKER_SONIC_VS_CONSTANTS = $(PLATFORM_PATH)/docker-sonic-vs/constants.yml +$(DOCKER_SONIC_VS_CONSTANTS): files/image_config/constants/constants.yml + cp -f $< $@ + +$(TARGET_PATH)/docker-sonic-vs.gz : $(DOCKER_SONIC_VS_CONSTANTS) + diff --git a/platform/vs/docker-sonic-vs/.gitignore b/platform/vs/docker-sonic-vs/.gitignore new file mode 100644 index 00000000000..4a30452636b --- /dev/null +++ b/platform/vs/docker-sonic-vs/.gitignore @@ -0,0 +1,3 @@ +# Copied at build time from files/image_config/constants/ +# See docker-sonic-vs.mk +constants.yml diff --git a/platform/vs/docker-sonic-vs/Dockerfile.j2 b/platform/vs/docker-sonic-vs/Dockerfile.j2 index b98afae017b..6eaa2dfd0b6 100644 --- a/platform/vs/docker-sonic-vs/Dockerfile.j2 +++ b/platform/vs/docker-sonic-vs/Dockerfile.j2 @@ -14,7 +14,6 @@ ENV DEBIAN_FRONTEND=noninteractive RUN apt-get update && apt-get install -y gnupg RUN apt-get install -y net-tools \ - iproute2 \ arping \ ndisc6 \ ethtool \ @@ -24,6 +23,7 @@ RUN apt-get install -y net-tools \ libjudydebian1 \ openssh-client \ openssh-server \ + sudo \ libc-ares2 \ bash-completion \ logrotate \ @@ -80,6 +80,11 @@ RUN pip3 install \ pyroute2==0.7.2 \ netifaces==0.11.0 +# For sonic-host-services/dbus-python builds: these packages are required to +# build dbus-python source archives (dbus-python-*.tar.gz), and avoid +# "BackendUnavailable: Cannot import 'mesonpy'" during pip install with no build isolation. +RUN pip3 install meson-python meson ninja patchelf + {% if docker_sonic_vs_debs.strip() -%} # Copy built Debian packages {{ copy_files("debs/", docker_sonic_vs_debs.split(' '), "/debs/") }} @@ -113,26 +118,31 @@ RUN apt-get purge -y libcairo2-dev libdbus-1-dev libgirepository1.0-dev libsyste RUN apt-get clean -y RUN apt-get autoclean -y RUN apt-get autoremove -y +# Remove temporary sonic-host-services/dbus-python build backend tools +RUN pip3 uninstall -y meson-python meson ninja patchelf RUN rm -rf /debs ~/.cache - -RUN sed -ri 's/^# save ""$/save ""/g; \ - s/^daemonize yes$/daemonize no/; \ - s/^logfile .*$/logfile ""/; \ - s/^# syslog-enabled no$/syslog-enabled no/; \ - s/^# unixsocket/unixsocket/; \ - s/redis-server.sock/redis.sock/g; \ - s/^client-output-buffer-limit pubsub [0-9]+mb [0-9]+mb [0-9]+/client-output-buffer-limit pubsub 0 0 0/; \ - s/^notify-keyspace-events ""$/notify-keyspace-events AKE/; \ - s/^databases [0-9]+$/databases 100/ \ - ' /etc/redis/redis.conf +# Database feature (from docker-database via --build-context) +{% set copy_from = "database" %} +{% include "docker-database/Dockerfile.common.j2" %} COPY ["50-default.conf", "/etc/rsyslog.d/"] -COPY ["start.sh", "orchagent.sh", "files/update_chassisdb_config", "/usr/bin/"] +COPY ["start.sh", "/usr/bin/"] COPY ["supervisord.conf.j2", "/usr/share/sonic/templates/"] +COPY --from=lldp supervisord.conf.common.j2 /usr/share/sonic/templates/supervisord.conf.lldp.j2 +COPY --from=fpm-frr frr/supervisord/supervisord.conf.common.j2 /usr/share/sonic/templates/supervisord.conf.frr.j2 +COPY --from=teamd supervisord.conf.common.j2 /usr/share/sonic/templates/supervisord.conf.teamd.j2 +COPY --from=nat supervisord.conf.common.j2 /usr/share/sonic/templates/supervisord.conf.nat.j2 +COPY --from=sflow supervisord.conf.common.j2 /usr/share/sonic/templates/supervisord.conf.sflow.j2 +COPY --from=orchagent supervisord.conf.common.j2 /usr/share/sonic/templates/supervisord.conf.swss.j2 +COPY --from=lldp start.sh /usr/bin/start-lldp.sh +RUN chmod +x /usr/bin/start-lldp.sh +COPY --from=teamd start.sh /usr/bin/start-teamd.sh +RUN chmod +x /usr/bin/start-teamd.sh COPY ["files/configdb-load.sh", "/usr/bin/"] -COPY ["files/arp_update", "/usr/bin/"] -COPY ["files/buffers_config.j2", "files/qos_config.j2", "files/arp_update_vars.j2", "files/copp_cfg.j2", "/usr/share/sonic/templates/"] +COPY ["files/buffers_config.j2", "files/qos_config.j2", "files/copp_cfg.j2", "/usr/share/sonic/templates/"] + COPY ["files/sonic_version.yml", "/etc/sonic/"] +COPY ["constants.yml", "/etc/sonic/"] COPY ["port_breakout_config_db.json", "/etc/sonic/"] COPY ["database_config.json", "/etc/default/sonic-db/"] COPY ["hostname.j2", "/usr/share/sonic/templates/"] @@ -140,7 +150,6 @@ COPY ["init_cfg.json.j2", "/usr/share/sonic/templates/"] COPY ["default_chassis_cfg.json", "/etc/default/sonic-db/"] COPY ["asic_table.json", "/etc/sonic/"] COPY ["zero_profiles.json", "/etc/sonic"] -COPY ["buffermgrd.sh", "/usr/bin/"] COPY ["platform.json", "/usr/share/sonic/device/x86_64-kvm_x86_64-r0/"] COPY ["platform-dpu-2p.json", "/usr/share/sonic/device/x86_64-kvm_x86_64-r0/"] @@ -150,7 +159,7 @@ COPY ["hwsku.json", "/usr/share/sonic/device/x86_64-kvm_x86_64-r0/Mellanox-SN270 RUN mkdir -p /etc/supervisor/conf.d/ RUN sonic-cfggen -a "{\"ENABLE_ASAN\":\"{{ENABLE_ASAN}}\"}" -t /usr/share/sonic/templates/supervisord.conf.j2 > /etc/supervisor/conf.d/supervisord.conf -RUN rm -f /usr/share/sonic/templates/supervisord.conf.j2 +RUN rm -f /usr/share/sonic/templates/supervisord.conf.j2 /usr/share/sonic/templates/supervisord.conf.lldp.j2 /usr/share/sonic/templates/supervisord.conf.frr.j2 /usr/share/sonic/templates/supervisord.conf.swss.j2 /usr/share/sonic/templates/supervisord.conf.teamd.j2 /usr/share/sonic/templates/supervisord.conf.nat.j2 /usr/share/sonic/templates/supervisord.conf.sflow.j2 {%- if ENABLE_ASAN == "y" %} RUN mkdir -p /var/log/asan @@ -165,8 +174,24 @@ RUN rm /etc/frr/frr.conf COPY ["frr/zebra.conf", "/etc/frr/"] +# FRR feature (from docker-fpm-frr via --build-context) +{% set copy_from = "fpm-frr" %} +{% include "docker-fpm-frr/Dockerfile.common.j2" %} + +# LLDP feature (from docker-lldp via --build-context) +{% set copy_from = "lldp" %} +{% include "docker-lldp/Dockerfile.common.j2" %} + +# SWSS feature (from docker-orchagent via --build-context) +{% set copy_from = "orchagent" %} +{% include "docker-orchagent/Dockerfile.common.j2" %} + # Create /var/warmboot/teamd folder for teammgrd RUN mkdir -p /var/warmboot/teamd +RUN mkdir -p /zmq_swss + +# Create /zmq_swss directory for ZMQ IPC sockets +RUN mkdir -p /zmq_swss FROM $BASE diff --git a/platform/vs/docker-sonic-vs/orchagent.sh b/platform/vs/docker-sonic-vs/orchagent.sh index b3b272c5047..2bc5120bdbf 100755 --- a/platform/vs/docker-sonic-vs/orchagent.sh +++ b/platform/vs/docker-sonic-vs/orchagent.sh @@ -49,13 +49,22 @@ fi # Set zmq mode by default for DPU vs # Otherwise, set synchronous mode if it is enabled in CONFIG_DB SYNC_MODE=$(echo $SWSS_VARS | jq -r '.synchronous_mode') +SOUTHBOUND_ZMQ=$(echo $SWSS_VARS | jq -r '.swss_zmq') if [ "$SWITCH_TYPE" == "dpu" ]; then ORCHAGENT_ARGS+="-z zmq_sync -k 65536 " +elif [ "$SOUTHBOUND_ZMQ" == "true" ]; then + ORCHAGENT_ARGS+="-z zmq_sync " elif [ "$SYNC_MODE" == "enable" ]; then ORCHAGENT_ARGS+="-s " fi +# Enable async swss recorder when explicitly configured +ASYNC_SWSS_REC=$(sonic-db-cli CONFIG_DB hget "SYSTEM_DEFAULTS|async_rec" "status") +if [ "$ASYNC_SWSS_REC" == "enabled" ]; then + ORCHAGENT_ARGS+="-A " +fi + # Enable ring buffer ORCHDAEMON_RING_ENABLED=`sonic-db-cli CONFIG_DB hget "DEVICE_METADATA|localhost" "ring_thread_enabled"` if [[ x"${ORCHDAEMON_RING_ENABLED}" == x"true" ]]; then diff --git a/platform/vs/docker-sonic-vs/start.sh b/platform/vs/docker-sonic-vs/start.sh index 89a4b89d493..d1ab3f1cfaa 100755 --- a/platform/vs/docker-sonic-vs/start.sh +++ b/platform/vs/docker-sonic-vs/start.sh @@ -34,6 +34,13 @@ popd [ -d /etc/sonic ] || mkdir -p /etc/sonic +# Populate runtime fields in sonic_version.yml that are not available at build time +if [ -f /etc/sonic/sonic_version.yml ]; then + if ! grep -q "^kernel_version:" /etc/sonic/sonic_version.yml; then + echo "kernel_version: '$(uname -r)'" >> /etc/sonic/sonic_version.yml + fi +fi + # Note: libswsscommon requires a dabase_config file in /var/run/redis/sonic-db/ # Prepare this file before any dependent application, such as sonic-cfggen mkdir -p /var/run/redis/sonic-db @@ -47,6 +54,11 @@ if [[ -f /usr/share/sonic/virtual_chassis/default_config.json ]]; then mv /tmp/init_cfg.json /etc/sonic/init_cfg.json fi +# If a config_db.json is provided on the persistent volume, use it +if [ -f /var/sonic/config_db.json ]; then + cp /var/sonic/config_db.json /etc/sonic/config_db.json +fi + if [ -f /etc/sonic/config_db.json ]; then sonic-cfggen -j /etc/sonic/init_cfg.json -j /etc/sonic/config_db.json --print-data > /tmp/config_db.json mv /tmp/config_db.json /etc/sonic/config_db.json @@ -77,6 +89,9 @@ fi mkdir -p /etc/swss/config.d/ +# Ensure hostname resolves (sudo hangs without this) +grep -qw "$(hostname)" /etc/hosts 2>/dev/null || echo "127.0.0.1 $(hostname)" >> /etc/hosts + rm -f /var/run/rsyslogd.pid supervisorctl start rsyslogd @@ -144,12 +159,6 @@ supervisorctl start neighsyncd supervisorctl start fdbsyncd -supervisorctl start teamsyncd - -supervisorctl start fpmsyncd - -supervisorctl start teammgrd - supervisorctl start vrfmgrd supervisorctl start portmgrd @@ -158,28 +167,20 @@ supervisorctl start intfmgrd supervisorctl start vlanmgrd -supervisorctl start zebra - -supervisorctl start mgmtd - -supervisorctl start staticd - supervisorctl start buffermgrd supervisorctl start nbrmgrd supervisorctl start vxlanmgrd -supervisorctl start sflowmgrd - -supervisorctl start natmgrd - -supervisorctl start natsyncd - supervisorctl start tunnelmgrd supervisorctl start fabricmgrd +# Start LLDP (uses docker-lldp's start.sh) +/usr/bin/start-lldp.sh +/usr/bin/start-teamd.sh + supervisorctl start rebootbackend # Start arp_update when VLAN exists diff --git a/platform/vs/docker-sonic-vs/supervisord.conf.j2 b/platform/vs/docker-sonic-vs/supervisord.conf.j2 index a394d29d406..e35855aae46 100644 --- a/platform/vs/docker-sonic-vs/supervisord.conf.j2 +++ b/platform/vs/docker-sonic-vs/supervisord.conf.j2 @@ -4,15 +4,26 @@ logfile_maxbytes=1MB logfile_backups=2 nodaemon=true -[program:start.sh] +[eventlistener:dependent-startup] +command=python3 -m supervisord_dependent_startup +autostart=true +autorestart=unexpected +startretries=0 +exitcodes=0,3 +events=PROCESS_STATE +buffer_size=1024 + +[program:start] command=/usr/bin/start.sh priority=1 -autostart=true +autostart=false autorestart=false +startsecs=0 stdout_logfile=NONE stdout_syslog=true stderr_logfile=NONE stderr_syslog=true +dependent_startup=true [program:rsyslogd] command=/usr/sbin/rsyslogd -n @@ -67,196 +78,25 @@ stdout_syslog=true stderr_logfile=NONE stderr_syslog=true -[program:gearsyncd] -command=/usr/bin/gearsyncd -p /usr/share/sonic/hwsku/gearbox_config.json -startsecs=0 -priority=5 -autostart=false -autorestart=false -stdout_logfile=NONE -stdout_syslog=true -stderr_logfile=NONE -stderr_syslog=true +# SWSS programs (from docker-orchagent via _INCLUDE_DOCKER) +{% set swss_priority_base = 5 %} +{% set include_swssconfig = false %} +{% include "supervisord.conf.swss.j2" %} -[program:portsyncd] -command=/usr/bin/portsyncd -priority=5 -autostart=false -autorestart=false -stdout_logfile=NONE -stdout_syslog=true -stderr_logfile=NONE -stderr_syslog=true -{% if ENABLE_ASAN == "y" %} -environment=ASAN_OPTIONS="log_path=/var/log/asan/portsyncd-asan.log{{ asan_extra_options }}" -{% endif %} +# Teamd programs (from docker-teamd via _INCLUDE_DOCKER) +{% set teamd_priority_base = 23 %} +{% set teamd_wait_for = "start:exited" %} +{% include "supervisord.conf.teamd.j2" %} -[program:orchagent] -command=/usr/bin/orchagent.sh -priority=6 -autostart=false -autorestart=false -stdout_logfile=NONE -stdout_syslog=true -stderr_logfile=NONE -stderr_syslog=true -{% if ENABLE_ASAN == "y" %} -environment=ASAN_OPTIONS="log_path=/var/log/asan/orchagent-asan.log{{ asan_extra_options }}" -{% endif %} - -[program:coppmgrd] -command=/usr/bin/coppmgrd -priority=7 -autostart=false -autorestart=false -stdout_logfile=NONE -stdout_syslog=true -stderr_logfile=NONE -stderr_syslog=true -{% if ENABLE_ASAN == "y" %} -environment=ASAN_OPTIONS="log_path=/var/log/asan/coppmgrd-asan.log{{ asan_extra_options }}" -{% endif %} - -[program:neighsyncd] -command=/usr/bin/neighsyncd -priority=8 -autostart=false -autorestart=false -stdout_logfile=NONE -stdout_syslog=true -stderr_logfile=NONE -stderr_syslog=true -{% if ENABLE_ASAN == "y" %} -environment=ASAN_OPTIONS="log_path=/var/log/asan/neighsyncd-asan.log{{ asan_extra_options }}" -{% endif %} - -[program:teamsyncd] -command=/usr/bin/teamsyncd -priority=9 -autostart=false -autorestart=false -stdout_logfile=NONE -stdout_syslog=true -stderr_logfile=NONE -stderr_syslog=true -{% if ENABLE_ASAN == "y" %} -environment=ASAN_OPTIONS="log_path=/var/log/asan/teamsyncd-asan.log{{ asan_extra_options }}" -{% endif %} - -[program:vlanmgrd] -command=/usr/bin/vlanmgrd -priority=10 -autostart=false -autorestart=false -stdout_logfile=NONE -stdout_syslog=true -stderr_logfile=NONE -stderr_syslog=true -{% if ENABLE_ASAN == "y" %} -environment=ASAN_OPTIONS="log_path=/var/log/asan/vlanmgrd-asan.log{{ asan_extra_options }}" -{% endif %} - -[program:intfmgrd] -command=/usr/bin/intfmgrd -priority=11 -autostart=false -autorestart=false -stdout_logfile=NONE -stdout_syslog=true -stderr_logfile=NONE -stderr_syslog=true -{% if ENABLE_ASAN == "y" %} -environment=ASAN_OPTIONS="log_path=/var/log/asan/intfmgrd-asan.log{{ asan_extra_options }}" -{% endif %} - -[program:portmgrd] -command=/usr/bin/portmgrd -priority=12 -autostart=false -autorestart=false -stdout_logfile=NONE -stdout_syslog=true -stderr_logfile=NONE -stderr_syslog=true -{% if ENABLE_ASAN == "y" %} -environment=ASAN_OPTIONS="log_path=/var/log/asan/portmgrd-asan.log{{ asan_extra_options }}" -{% endif %} - -[program:teammgrd] -command=/usr/bin/teammgrd -priority=12 -autostart=false -autorestart=false -stdout_logfile=NONE -stdout_syslog=true -stderr_logfile=NONE -stderr_syslog=true -{% if ENABLE_ASAN == "y" %} -environment=ASAN_OPTIONS="log_path=/var/log/asan/teammgrd-asan.log{{ asan_extra_options }}" -{% endif %} - -[program:mgmtd] -command=/usr/lib/frr/mgmtd -A 127.0.0.1 -priority=13 -autostart=false -autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog - -[program:zebra] -command=/usr/lib/frr/zebra -A 127.0.0.1 -s 90000000 -M dplane_fpm_sonic --asic-offload=notify_on_offload -priority=13 -autostart=false -autorestart=false -stdout_logfile=NONE -stdout_syslog=true -stderr_logfile=NONE -stderr_syslog=true - -[program:bgpd] -command=/usr/lib/frr/bgpd -A 127.0.0.1 -priority=14 -autostart=false -autorestart=false -stdout_logfile=NONE -stdout_syslog=true -stderr_logfile=NONE -stderr_syslog=true - -[program:staticd] -command=/usr/lib/frr/staticd -A 127.0.0.1 -priority=14 -autostart=false -autorestart=false -stdout_logfile=NONE -stdout_syslog=true -stderr_logfile=NONE -stderr_syslog=true - -[program:fpmsyncd] -command=/usr/bin/fpmsyncd -priority=15 -autostart=false -autorestart=false -stdout_logfile=NONE -stdout_syslog=true -stderr_logfile=NONE -stderr_syslog=true -{% if ENABLE_ASAN == "y" %} -environment=ASAN_OPTIONS="log_path=/var/log/asan/fpmsyncd-asan.log{{ asan_extra_options }}" -{% endif %} - -[program:pathd] -command=/usr/lib/frr/pathd -A 127.0.0.1 -priority=14 -autostart=false -autorestart=false -stdout_logfile=syslog -stderr_logfile=syslog +# FRR programs (from docker-fpm-frr via _INCLUDE_DOCKER) +{% set frr_priority_base = 24 %} +{% set use_dependent_startup = true %} +{% set frr_wait_for = "start:exited" %} +{% include "supervisord.conf.frr.j2" %} [program:arp_update] command=/usr/bin/arp_update -priority=16 +priority=30 autostart=false autorestart=unexpected stdout_logfile=NONE @@ -264,144 +104,15 @@ stdout_syslog=true stderr_logfile=NONE stderr_syslog=true -[program:buffermgrd] -command=/usr/bin/buffermgrd.sh -priority=17 -autostart=false -autorestart=false -stdout_logfile=NONE -stdout_syslog=true -stderr_logfile=NONE -stderr_syslog=true -{% if ENABLE_ASAN == "y" %} -environment=ASAN_OPTIONS="log_path=/var/log/asan/buffermgrd-asan.log{{ asan_extra_options }}" -{% endif %} - -[program:vrfmgrd] -command=/usr/bin/vrfmgrd -priority=18 -autostart=false -autorestart=false -stdout_logfile=NONE -stdout_syslog=true -stderr_logfile=NONE -stderr_syslog=true -{% if ENABLE_ASAN == "y" %} -environment=ASAN_OPTIONS="log_path=/var/log/asan/vrfmgrd-asan.log{{ asan_extra_options }}" -{% endif %} - -[program:restore_neighbors] -command=/usr/bin/restore_neighbors.py -priority=19 -autostart=false -autorestart=false -startsecs=0 -startretries=0 -stdout_logfile=NONE -stdout_syslog=true -stderr_logfile=NONE -stderr_syslog=true - -[program:nbrmgrd] -command=/usr/bin/nbrmgrd -priority=20 -autostart=false -autorestart=false -stdout_logfile=NONE -stdout_syslog=true -stderr_logfile=NONE -stderr_syslog=true -{% if ENABLE_ASAN == "y" %} -environment=ASAN_OPTIONS="log_path=/var/log/asan/nbrmgrd-asan.log{{ asan_extra_options }}" -{% endif %} - -[program:vxlanmgrd] -command=/usr/bin/vxlanmgrd -priority=21 -autostart=false -autorestart=false -stdout_logfile=NONE -stdout_syslog=true -stderr_logfile=NONE -stderr_syslog=true -{% if ENABLE_ASAN == "y" %} -environment=ASAN_OPTIONS="log_path=/var/log/asan/vxlanmgrd-asan.log{{ asan_extra_options }}" -{% endif %} - -[program:sflowmgrd] -command=/usr/bin/sflowmgrd -priority=22 -autostart=false -autorestart=false -stdout_logfile=NONE -stdout_syslog=true -stderr_logfile=NONE -stderr_syslog=true -{% if ENABLE_ASAN == "y" %} -environment=ASAN_OPTIONS="log_path=/var/log/asan/sflowmgrd-asan.log{{ asan_extra_options }}" -{% endif %} - -[program:natmgrd] -command=/usr/bin/natmgrd -priority=23 -autostart=false -autorestart=false -stdout_logfile=NONE -stdout_syslog=true -stderr_logfile=NONE -stderr_syslog=true -{% if ENABLE_ASAN == "y" %} -environment=ASAN_OPTIONS="log_path=/var/log/asan/natmgrd-asan.log{{ asan_extra_options }}" -{% endif %} - -[program:natsyncd] -command=/usr/bin/natsyncd -priority=24 -autostart=false -autorestart=false -stdout_logfile=NONE -stdout_syslog=true -stderr_logfile=NONE -stderr_syslog=true -{% if ENABLE_ASAN == "y" %} -environment=ASAN_OPTIONS="log_path=/var/log/asan/natsyncd-asan.log{{ asan_extra_options }}" -{% endif %} - -[program:fdbsyncd] -command=/usr/bin/fdbsyncd -priority=25 -autostart=false -autorestart=false -stdout_logfile=NONE -stdout_syslog=true -stderr_logfile=NONE -stderr_syslog=true -{% if ENABLE_ASAN == "y" %} -environment=ASAN_OPTIONS="log_path=/var/log/asan/fdbsyncd-asan.log{{ asan_extra_options }}" -{% endif %} +# sflow programs (from docker-sflow via _INCLUDE_DOCKER) +{% set sflow_priority_base = 31 %} +{% set sflow_wait_for = "start:exited" %} +{% include "supervisord.conf.sflow.j2" %} -[program:tunnelmgrd] -command=/usr/bin/tunnelmgrd -priority=26 -autostart=false -autorestart=false -stdout_logfile=NONE -stdout_syslog=true -stderr_logfile=NONE -stderr_syslog=true -{% if ENABLE_ASAN == "y" %} -environment=ASAN_OPTIONS="log_path=/var/log/asan/tunnelmgrd-asan.log{{ asan_extra_options }}" -{% endif %} +# NAT programs (from docker-nat via _INCLUDE_DOCKER) +{% set nat_priority_base = 32 %} +{% set nat_wait_for = "start:exited" %} +{% include "supervisord.conf.nat.j2" %} -[program:fabricmgrd] -command=/usr/bin/fabricmgrd -priority=27 -autostart=false -autorestart=false -stdout_logfile=NONE -stdout_syslog=true -stderr_logfile=NONE -stderr_syslog=true -{% if ENABLE_ASAN == "y" %} -environment=ASAN_OPTIONS="log_path=/var/log/asan/fabricmgrd-asan.log{{ asan_extra_options }}" -{% endif %} +{% set lldp_priority_base = 34 %} +{% include "supervisord.conf.lldp.j2" %} diff --git a/platform/vs/docker-syncd-vs.mk b/platform/vs/docker-syncd-vs.mk index 9ca9746bd7c..c094bd68fd8 100644 --- a/platform/vs/docker-syncd-vs.mk +++ b/platform/vs/docker-syncd-vs.mk @@ -1,7 +1,7 @@ # docker image for vs syncd DOCKER_SYNCD_PLATFORM_CODE = vs -include $(PLATFORM_PATH)/../template/docker-syncd-bookworm.mk +include $(PLATFORM_PATH)/../template/docker-syncd-trixie.mk $(DOCKER_SYNCD_BASE)_DEPENDS += $(SYNCD_VS) \ $(LIBNL3_DEV) \ @@ -16,4 +16,3 @@ $(DOCKER_SYNCD_BASE)_DBG_DEPENDS += $(SYNCD_VS_DBG) \ $(DOCKER_SYNCD_BASE)_VERSION = 1.0.0 $(DOCKER_SYNCD_BASE)_PACKAGE_NAME = syncd -$(DOCKER_SYNCD_BASE)_RUN_OPT += -v /host/warmboot:/var/warmboot diff --git a/platform/vs/docker-syncd-vs/Dockerfile.j2 b/platform/vs/docker-syncd-vs/Dockerfile.j2 index b72b1507a55..1e934f96343 100644 --- a/platform/vs/docker-syncd-vs/Dockerfile.j2 +++ b/platform/vs/docker-syncd-vs/Dockerfile.j2 @@ -1,5 +1,5 @@ {% from "dockers/dockerfile-macros.j2" import install_debian_packages, install_python_wheels, copy_files, rsync_from_builder_stage %} -ARG BASE=docker-config-engine-bookworm-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} +ARG BASE=docker-config-engine-trixie-{{DOCKER_USERNAME}}:{{DOCKER_USERTAG}} FROM $BASE AS base @@ -10,14 +10,14 @@ ENV DEBIAN_FRONTEND=noninteractive RUN apt-get update -RUN apt-get install -f -y iproute2 libcap2-bin +RUN apt-get install -f -y libcap2-bin # For DASH engine COPY debs/libnl-3-dev_{{ LIBNL3_VERSION_SONIC }}_{{ CONFIGURED_ARCH }}.deb debs/libnl-route-3-dev_{{ LIBNL3_VERSION_SONIC }}_{{ CONFIGURED_ARCH }}.deb debs/ RUN dpkg -i debs/libnl-3-dev_{{ LIBNL3_VERSION_SONIC }}_{{ CONFIGURED_ARCH }}.deb debs/libnl-route-3-dev_{{ LIBNL3_VERSION_SONIC }}_{{ CONFIGURED_ARCH }}.deb -RUN apt-get install -f -y libabsl20220623 libc-ares2 python3-six libnanomsg5 libpcap0.8 libthrift-0.17.0 libgmp-dev libnanomsg-dev libpcap-dev libtool pkg-config libthrift-dev python3-thrift thrift-compiler libgc1 cpp libboost1.83-all-dev libfl-dev libgc-dev libgmp-dev libbpf-dev tcpdump libelf-dev llvm clang python3-pyroute2 python3-ply python3-scapy python3-setuptools python3-thrift libthrift-0.17.0 libgrpc++1.51 libgrpc29 libprotobuf32 libprotoc-dev protobuf-compiler python3-protobuf libgrpc++-dev libgrpc-dev protobuf-compiler-grpc python3-grpcio +RUN apt-get install -f -y libc-ares2 python3-six libnanomsg5 libpcap0.8 libgmp-dev libnanomsg-dev libpcap-dev libtool pkg-config libthrift-dev python3-thrift thrift-compiler libgc1 cpp libfl-dev libgc-dev libgmp-dev libbpf-dev tcpdump libelf-dev llvm clang python3-pyroute2 python3-ply python3-scapy python3-setuptools python3-thrift libgrpc++1.51 libgrpc29 libprotobuf32 libprotoc-dev protobuf-compiler python3-protobuf libgrpc++-dev libgrpc-dev protobuf-compiler-grpc python3-grpcio {% if docker_syncd_vs_debs.strip() -%} # Copy built Debian packages diff --git a/platform/vs/docker-syncd-vs/supervisord.conf b/platform/vs/docker-syncd-vs/supervisord.conf index 7d1b57cc6bf..1d07c124960 100644 --- a/platform/vs/docker-syncd-vs/supervisord.conf +++ b/platform/vs/docker-syncd-vs/supervisord.conf @@ -14,7 +14,7 @@ buffer_size=1024 [eventlistener:supervisor-proc-exit-listener] command=/usr/bin/supervisor-proc-exit-listener-rs --container-name syncd -events=PROCESS_STATE_EXITED,PROCESS_STATE_RUNNING +events=PROCESS_STATE_EXITED,PROCESS_STATE_RUNNING,PROCESS_STATE_FATAL autostart=true autorestart=unexpected buffer_size=1024 diff --git a/platform/vs/onie.mk b/platform/vs/onie.mk index badd7b35194..1314e63ead7 100644 --- a/platform/vs/onie.mk +++ b/platform/vs/onie.mk @@ -1,10 +1,10 @@ ONIE_RECOVERY_IMAGE = onie-recovery-x86_64-kvm_x86_64-r0.iso -$(ONIE_RECOVERY_IMAGE)_URL = "https://packages.trafficmanager.net/public/onie/onie-recovery-x86_64-kvm_x86_64-r0.iso" +$(ONIE_RECOVERY_IMAGE)_URL = "$(BUILD_PUBLIC_URL)/onie/onie-recovery-x86_64-kvm_x86_64-r0.iso" ONIE_RECOVERY_KVM_4ASIC_IMAGE = onie-recovery-x86_64-kvm_x86_64_4_asic-r0.iso -$(ONIE_RECOVERY_KVM_4ASIC_IMAGE)_URL = "https://packages.trafficmanager.net/public/onie/onie-recovery-x86_64-kvm_x86_64_4_asic-r0.iso" +$(ONIE_RECOVERY_KVM_4ASIC_IMAGE)_URL = "$(BUILD_PUBLIC_URL)/onie/onie-recovery-x86_64-kvm_x86_64_4_asic-r0.iso" ONIE_RECOVERY_KVM_6ASIC_IMAGE = onie-recovery-x86_64-kvm_x86_64_6_asic-r0.iso -$(ONIE_RECOVERY_KVM_6ASIC_IMAGE)_URL = "https://packages.trafficmanager.net/public/onie/onie-recovery-x86_64-kvm_x86_64_6_asic-r0.iso" +$(ONIE_RECOVERY_KVM_6ASIC_IMAGE)_URL = "$(BUILD_PUBLIC_URL)/onie/onie-recovery-x86_64-kvm_x86_64_6_asic-r0.iso" SONIC_ONLINE_FILES += $(ONIE_RECOVERY_IMAGE) $(ONIE_RECOVERY_KVM_4ASIC_IMAGE) $(ONIE_RECOVERY_KVM_6ASIC_IMAGE) diff --git a/platform/vs/sonic-version.mk b/platform/vs/sonic-version.mk index 82409abd1ec..972d43a68bf 100644 --- a/platform/vs/sonic-version.mk +++ b/platform/vs/sonic-version.mk @@ -1,6 +1,6 @@ # sonic version yml file -sonic_version=$(SONIC_GET_VERSION) +sonic_version=$(SONIC_IMAGE_VERSION) sonic_asic_platform=$(CONFIGURED_PLATFORM) sonic_os_version=$(SONIC_OS_VERSION) diff --git a/platform/vs/sonic-version/build_sonic_version.sh b/platform/vs/sonic-version/build_sonic_version.sh index 2e3d5c42fb4..3ae0ec59f4d 100755 --- a/platform/vs/sonic-version/build_sonic_version.sh +++ b/platform/vs/sonic-version/build_sonic_version.sh @@ -1,4 +1,5 @@ export build_version="${sonic_version}" +export debian_version="$(cat /etc/debian_version 2>/dev/null || echo 'N/A')" export asic_type="${sonic_asic_platform}" export commit_id="$(git rev-parse --short HEAD)" export branch="$(git rev-parse --abbrev-ref HEAD)" diff --git a/platform/vs/syncd-vs.mk b/platform/vs/syncd-vs.mk index 6e47138cb6a..dc200a49a09 100644 --- a/platform/vs/syncd-vs.mk +++ b/platform/vs/syncd-vs.mk @@ -4,7 +4,7 @@ SYNCD_VS = syncd-vs_1.0.0_$(CONFIGURED_ARCH).deb $(SYNCD_VS)_RDEPENDS += $(LIBSAIREDIS) $(LIBSAIMETADATA) $(LIBSAIVS) ifeq ($(INCLUDE_VS_DASH_SAI),y) -ifeq ($(BLDENV),bookworm) +ifneq ($(findstring $(BLDENV), bookworm trixie), ) # dash-sai only support sonic-vs.img.gz. it don't support docker-sonic-vs.gz ifeq ($(findstring docker-sonic-vs, $(SONIC_BUILD_TARGET) $(EXTRA_DOCKER_TARGETS)), ) $(LIBSAIREDIS)_DEB_BUILD_PROFILES += dashsai diff --git a/rules/config b/rules/config index 44f65123ba9..2b04b09f733 100644 --- a/rules/config +++ b/rules/config @@ -10,7 +10,29 @@ # SONIC_CONFIG_BUILD_JOBS - set number of jobs for parallel build. # Corresponding -j argument will be passed to make command inside docker # container. -SONIC_CONFIG_BUILD_JOBS = 1 +# Default: auto-detect based on available CPU cores and RAM. +# When SONIC_BUILD_MEMORY is set, uses that as the RAM limit instead of host RAM. +# Formula: min(nproc/4, effective_ram_gb/8), clamped to [1, 8]. +# This balances parallelism with memory safety — each concurrent package +# build can use up to ~8GB RAM (dpkg-buildpackage with nproc make jobs). +# Override with a fixed number if needed, e.g. SONIC_CONFIG_BUILD_JOBS = 1 +# for sequential builds or higher values on machines with more RAM. +SONIC_CONFIG_BUILD_JOBS = $(shell \ + cores=$$(nproc 2>/dev/null || echo 4); \ + host_ram=$$(awk '/^MemTotal/ {printf "%d", $$2/1048576}' /proc/meminfo 2>/dev/null || echo 8); \ + ram_gb=$$host_ram; \ + if [ -n "$(SONIC_BUILD_MEMORY)" ] && [ "$(SONIC_BUILD_MEMORY)" != "none" ]; then \ + mem_val=$$(echo "$(SONIC_BUILD_MEMORY)" | sed 's/[gG]$$//'); \ + if [ "$$mem_val" -gt 0 ] 2>/dev/null; then \ + ram_gb=$$(( mem_val < host_ram ? mem_val : host_ram )); \ + fi; \ + fi; \ + by_cores=$$(( cores / 4 )); \ + by_ram=$$(( ram_gb / 8 )); \ + jobs=$$(( by_cores < by_ram ? by_cores : by_ram )); \ + [ $$jobs -lt 1 ] && jobs=1; \ + [ $$jobs -gt 8 ] && jobs=8; \ + echo $$jobs) # SONIC_CONFIG_MAKE_JOBS - set number of parallel make jobs per package. # Corresponding -j argument will be passed to make/dpkg commands that build separate packages @@ -53,6 +75,9 @@ CHANGE_DEFAULT_PASSWORD ?= n DEFAULT_USERNAME = admin # DEFAULT_PASSWORD - default password for installer build +# DEFAULT_PASSWORD can be set to empty string to disable the default password. +# Empty string means admin account has no password; console login works, +# SSH login is blocked (PermitEmptyPasswords no). Set a real password on first login. DEFAULT_PASSWORD = YourPaSsWoRd # BMC_NOS_ACCOUNT_USERNAME - default BMC NOS account username @@ -116,6 +141,14 @@ DEFAULT_KERNEL_PROCURE_METHOD = build FRR_USER_UID = 300 FRR_USER_GID = 300 +# ENABLE_FRR_TCMALLOC - build FRR with gperftools tcmalloc support. +ENABLE_FRR_TCMALLOC ?= y + +# ENABLE_FRR_SNMP_AGENT - enable SNMP AgentX support in FRR (BGP4-MIB via rfc1657). +# When set to 'n', FRR is built without frr-snmp package and bgpd/zebra run without +# the -M snmp module. This avoids snmpd memory issues caused by BGP4-MIB polling. +ENABLE_FRR_SNMP_AGENT ?= y + # DPKG cache allows the .deb files to be stored in the cache path. This allows the submodules # package to be cached and restored back if its commit hash is not modified and its dependencies are not modified. # SONIC_DPKG_CACHE_METHOD - Default method of deb package caching @@ -147,7 +180,13 @@ INCLUDE_SYSTEM_TELEMETRY = n INCLUDE_SYSTEM_OTEL = y # INCLUDE_ICCPD - build docker-iccpd for mclag support -INCLUDE_ICCPD = n +INCLUDE_ICCPD ?= n + +# INCLUDE_SNMP - build docker-snmp for SNMP support +INCLUDE_SNMP ?= y + +# INCLUDE_LLDP - build docker-lldp for LLDP support +INCLUDE_LLDP ?= y # INCLUDE_SFLOW - build docker-sflow for sFlow support INCLUDE_SFLOW = y @@ -174,6 +213,13 @@ INCLUDE_DHCP_SERVER ?= n # INCLUDE_P4RT - build docker-p4rt for P4RT support INCLUDE_P4RT = n +# INCLUDE_PTF - build docker-ptf and docker-ptf-sai test containers. +# These are only needed for PTF (Packet Test Framework) testing and are +# not included in the final switch image. Disabling saves ~28 minutes +# of build time by skipping p4lang-pi, p4lang-bmv2, p4lang-p4c, and +# their dependencies. +INCLUDE_PTF ?= y + # INCLUDE_VS_DASH_SAI - build dash-sai for VS INCLUDE_VS_DASH_SAI ?= y @@ -217,7 +263,7 @@ KUBERNETES_CNI_VERSION = 0.8.7-00 KUBERNETES_CRI_TOOLS_VERSION = 1.26.0-00 K8s_GCR_IO_PAUSE_VERSION = 3.5 -# INCLUDE_KUBERNETES_MASTER - if set to y kubernetes packages are installed o be able +# INCLUDE_KUBERNETES_MASTER - if set to y kubernetes packages are installed o be able # to run as master node in kubernetes cluster INCLUDE_KUBERNETES_MASTER ?= n @@ -228,9 +274,6 @@ INCLUDE_KUBERNETES_MASTER ?= n # MASTER_CRI_DOCKERD = version of cri-dockerd container image # MASTER_UI_METRIC_VERSION = version of k8s metrics server container image # MASTER_UI_DASH_VERSION = version of k8s dashboard container image -# MASTER_MDM_VERSION = version of mdm container image -# MASTER_MDS_VERSION = version of mds container image -# MASTER_FLUENTD_VERSION = version of fluentd container image MASTER_KUBERNETES_VERSION = 1.22.2-00 MASTER_KUBERNETES_CONTAINER_IMAGE_VERSION = v1.22.2 MASTER_PAUSE_VERSION = 3.5 @@ -239,9 +282,6 @@ MASTER_ETCD_VERSION = 3.5.0-0 MASTER_CRI_DOCKERD = 0.3.10 MASTER_UI_METRIC_VERSION = v1.0.8 MASTER_UI_DASH_VERSION = v2.7.0 -MASTER_MDM_VERSION = 2.2023.505.1124-45da18-20230505t1700 -MASTER_MDS_VERSION = mariner_20230517.1 -MASTER_FLUENTD_VERSION = mariner_20230517.1 # SONIC_ENABLE_IMAGE_SIGNATURE - enable image signature # To not use the auto-generated self-signed certificate, the required files to sign the image as below: @@ -259,14 +299,22 @@ SONIC_ENABLE_IMAGE_SIGNATURE ?= n # SECURE_UPGRADE_MODE - enum value for secure upgrade mode, valid options are "dev", "prod" and "no_sign" # SECURE_UPGRADE_PROD_SIGNING_TOOL - path to a vendor signing tool for production flow. # SECURE_UPGRADE_PROD_TOOL_ARGS - Extra arguments options for vendor to use to run his specific prod signing script -SECURE_UPGRADE_DEV_SIGNING_KEY ?= -SECURE_UPGRADE_SIGNING_CERT ?= +SECURE_UPGRADE_DEV_SIGNING_KEY ?= +SECURE_UPGRADE_SIGNING_CERT ?= SECURE_UPGRADE_MODE ?= "no_sign" SECURE_UPGRADE_KERNEL_CAFILE ?= $(SECURE_UPGRADE_SIGNING_CERT) SECURE_UPGRADE_PROD_SIGNING_TOOL ?= SECURE_UPGRADE_PROD_TOOL_ARGS ?= -# PACKAGE_URL_PREFIX - the package url prefix -PACKAGE_URL_PREFIX ?= https://packages.trafficmanager.net/packages + +# BUILD_SNAPSHOT_URL - Default debian snapshot mirror url +# Mirror of https://snapshot.debian.org/archive +BUILD_SNAPSHOT_URL ?= http://packages.trafficmanager.net/snapshot + +# BUILD_PUBLIC_URL - Default public mirror url +BUILD_PUBLIC_URL ?= https://packages.trafficmanager.net/public + +# BUILD_PACKAGES_URL - Default packages mirror url +BUILD_PACKAGES_URL ?= https://packages.trafficmanager.net/packages # TRUSTED_GPG_URLS - the trusted gpgs, separated by comma TRUSTED_GPG_URLS = https://packages.microsoft.com/keys/microsoft.asc @@ -344,7 +392,7 @@ PIP_HTTP_TIMEOUT ?= 60 # BUILD_REDUCE_IMAGE_SIZE - reduce the image size as much as possbible BUILD_REDUCE_IMAGE_SIZE = n -# SONIC_PTF_ENV_PY_VER - SONiC PTF test Python version. Set to 'mixed' to build the +# SONIC_PTF_ENV_PY_VER - SONiC PTF test Python version. Set to 'mixed' to build the # image with both Python 2 and 3. Set to 'py3' to build a Python 3 only image SONIC_PTF_ENV_PY_VER = py3 @@ -353,3 +401,48 @@ BUILD_PROCESS_TIMEOUT ?= 0 # BUILD_SKIP_TEST - skip all tests when building to reduce build time BUILD_SKIP_TEST ?= n +# SONIC_CONFIG_USE_DOCKER_CACHE - use Docker layer cache for image builds. +# Removes --no-cache from docker build commands, allowing unchanged layers +# to be reused. Significantly speeds up incremental builds (~20+ min savings) +# but may use stale layers if base images changed without version bumps. +# Recommended for local development; CI should leave this disabled. +# SONIC_CONFIG_USE_DOCKER_CACHE = y + +# SONIC_CONFIG_USE_CCACHE - use ccache to speed up C/C++ compilation +# When enabled, ccache caches compilation results so that rebuilds of +# unchanged source files are near-instant. The cache is stored in +# target/ccache/ and persists across builds. +# Default: disabled (no impact on clean builds without a warm cache) +SONIC_CONFIG_USE_CCACHE ?= n + +# ENABLE_SBOM - generate a CycloneDX Software Bill of Materials alongside +# the installer image. When y, the build invokes scripts/install_sbom_tool.sh +# to fetch the configured scanner (default: syft) and emits +# target/sonic-.bin.cdx.json as a sibling of the .bin. +# See README.sbom.md for the full architecture. +ENABLE_SBOM ?= n + +# SBOM_FORMAT - output format for the generated SBOM. +# Valid values: cyclonedx, spdx, both. +# Default: both — CycloneDX 1.6 is the canonical format and SPDX 2.3 +# is a downstream conversion via cyclonedx-cli (auto-fetched), so +# emitting both is essentially free and lets consumers pick. +SBOM_FORMAT ?= both + +# SBOM_SCAN_TOOL - binary scanner used to enumerate transitive apt/pip +# dependencies that no SONiC recipe names directly. +# Valid values: syft, trivy. +SBOM_SCAN_TOOL ?= syft + +# SBOM_INCLUDE_LICENSES - harvest /usr/share/doc//copyright before +# build_debian.sh strips it, and resolve SPDX license expressions for +# each component. Default on; turning off speeds up SBOM emit. +SBOM_INCLUDE_LICENSES ?= y + +# SBOM_STRICT - when y, the build fails if a critical SBOM input is +# missing (host rootfs fsroot-/, any declared installer +# docker .gz, or the scanner binary). Set n to downgrade to warnings +# for debugging or one-off partial emits. Soft optional features +# (SPDX conversion, provenance emit, license resolution) always +# warn-and-continue regardless. +SBOM_STRICT ?= y diff --git a/rules/dash-sai.mk b/rules/dash-sai.mk index f226cfdea7c..e11fdf1b9e6 100644 --- a/rules/dash-sai.mk +++ b/rules/dash-sai.mk @@ -1,7 +1,7 @@ # DASH SAI repo: https://github.com/sonic-net/DASH DASH_SAI_VERSION = 1.0.0 -DASH_SAI_COMMIT = 57e599c9d8e1f538ea01fad28781d8a0c2706ba5 +DASH_SAI_COMMIT = d5c003dd7774c2b43f275c0233acc73a0ea28d2f export DASH_SAI_VERSION export DASH_SAI_COMMIT diff --git a/rules/docker-base-trixie.mk b/rules/docker-base-trixie.mk index 5b7742fcc4f..04aac626935 100644 --- a/rules/docker-base-trixie.mk +++ b/rules/docker-base-trixie.mk @@ -4,6 +4,7 @@ DOCKER_BASE_TRIXIE = docker-base-trixie.gz $(DOCKER_BASE_TRIXIE)_PATH = $(DOCKERS_PATH)/docker-base-trixie $(DOCKER_BASE_TRIXIE)_DEPENDS += $(SOCAT) +$(DOCKER_BASE_TRIXIE)_DEPENDS += $(IPROUTE2) GDB = gdb GDBSERVER = gdbserver diff --git a/rules/docker-bmp-watchdog.mk b/rules/docker-bmp-watchdog.mk index f4821f6658c..c63c211f87f 100644 --- a/rules/docker-bmp-watchdog.mk +++ b/rules/docker-bmp-watchdog.mk @@ -4,7 +4,7 @@ DOCKER_BMP_WATCHDOG_STEM = docker-bmp-watchdog DOCKER_BMP_WATCHDOG = $(DOCKER_BMP_WATCHDOG_STEM).gz DOCKER_BMP_WATCHDOG_DBG = $(DOCKER_BMP_WATCHDOG_STEM)-$(DBG_IMAGE_MARK).gz -$(DOCKER_BMP_WATCHDOG)_LOAD_DOCKERS = $(DOCKER_CONFIG_ENGINE_BOOKWORM) +$(DOCKER_BMP_WATCHDOG)_LOAD_DOCKERS = $(DOCKER_CONFIG_ENGINE_TRIXIE) $(DOCKER_BMP_WATCHDOG)_PATH = $(DOCKERS_PATH)/$(DOCKER_BMP_WATCHDOG_STEM) @@ -12,11 +12,11 @@ $(DOCKER_BMP_WATCHDOG)_VERSION = 1.0.0 $(DOCKER_BMP_WATCHDOG)_PACKAGE_NAME = bmp_watchdog SONIC_DOCKER_IMAGES += $(DOCKER_BMP_WATCHDOG) -SONIC_BOOKWORM_DOCKERS += $(DOCKER_BMP_WATCHDOG) +SONIC_TRIXIE_DOCKERS += $(DOCKER_BMP_WATCHDOG) SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_BMP_WATCHDOG) SONIC_DOCKER_DBG_IMAGES += $(DOCKER_BMP_WATCHDOG_DBG) -SONIC_BOOKWORM_DBG_DOCKERS += $(DOCKER_BMP_WATCHDOG_DBG) +SONIC_TRIXIE_DBG_DOCKERS += $(DOCKER_BMP_WATCHDOG_DBG) SONIC_INSTALL_DOCKER_DBG_IMAGES += $(DOCKER_BMP_WATCHDOG_DBG) $(DOCKER_BMP_WATCHDOG)_CONTAINER_NAME = bmp_watchdog diff --git a/rules/docker-bmp.mk b/rules/docker-bmp.mk index 4f9b4f90f98..3991e1e36e3 100644 --- a/rules/docker-bmp.mk +++ b/rules/docker-bmp.mk @@ -13,25 +13,25 @@ $(DOCKER_BMP)_PYTHON_WHEELS = $(SONIC_BMPCFGD) $(DOCKER_BMP)_INSTALL_DEBS = $(LIBSWSSCOMMON) \ $(SONIC_BMPD) \ $(PYTHON3_SWSSCOMMON) \ - $(LIBYANG_PY3) + $(LIBYANG3_PY3) -$(DOCKER_BMP)_DBG_DEPENDS = $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_DEPENDS) +$(DOCKER_BMP)_DBG_DEPENDS = $($(DOCKER_CONFIG_ENGINE_TRIXIE)_DBG_DEPENDS) -$(DOCKER_BMP)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_BOOKWORM) +$(DOCKER_BMP)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_TRIXIE) $(DOCKER_BMP)_VERSION = 1.0.0 $(DOCKER_BMP)_PACKAGE_NAME = bmp -$(DOCKER_BMP)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_IMAGE_PACKAGES) +$(DOCKER_BMP)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_TRIXIE)_DBG_IMAGE_PACKAGES) SONIC_DOCKER_IMAGES += $(DOCKER_BMP) -SONIC_BOOKWORM_DOCKERS += $(DOCKER_BMP) +SONIC_TRIXIE_DOCKERS += $(DOCKER_BMP) ifeq ($(INCLUDE_SYSTEM_BMP), y) SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_BMP) endif SONIC_DOCKER_DBG_IMAGES += $(DOCKER_BMP_DBG) -SONIC_BOOKWORM_DBG_DOCKERS += $(DOCKER_BMP_DBG) +SONIC_TRIXIE_DBG_DOCKERS += $(DOCKER_BMP_DBG) ifeq ($(INCLUDE_SYSTEM_BMP), y) SONIC_INSTALL_DOCKER_DBG_IMAGES += $(DOCKER_BMP_DBG) endif @@ -42,4 +42,4 @@ $(DOCKER_BMP)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro $(DOCKER_BMP)_RUN_OPT += -v /etc/localtime:/etc/localtime:ro $(DOCKER_BMP)_RUN_OPT += -v /var/run/dbus:/var/run/dbus:rw -$(DOCKER_BMP)_BASE_IMAGE_FILES += monit_bmp:/etc/monit/conf.d \ No newline at end of file +$(DOCKER_BMP)_BASE_IMAGE_FILES += monit_bmp:/etc/monit/conf.d diff --git a/rules/docker-config-engine-bookworm.mk b/rules/docker-config-engine-bookworm.mk index d495e4ff638..655085d2063 100644 --- a/rules/docker-config-engine-bookworm.mk +++ b/rules/docker-config-engine-bookworm.mk @@ -4,9 +4,8 @@ DOCKER_CONFIG_ENGINE_BOOKWORM = docker-config-engine-bookworm.gz $(DOCKER_CONFIG_ENGINE_BOOKWORM)_PATH = $(DOCKERS_PATH)/docker-config-engine-bookworm $(DOCKER_CONFIG_ENGINE_BOOKWORM)_DEPENDS += $(LIBSWSSCOMMON) \ - $(LIBYANG) \ - $(LIBYANG_CPP) \ - $(LIBYANG_PY3) \ + $(LIBYANG3) \ + $(LIBYANG3_PY3) \ $(PYTHON3_SWSSCOMMON) \ $(SONIC_DB_CLI) \ $(SONIC_EVENTD) \ @@ -26,9 +25,7 @@ $(DOCKER_CONFIG_ENGINE_BOOKWORM)_FILES += $($(SONIC_CTRMGRD)_STARTUP_SCRIPT) $(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_DEPENDS = $($(DOCKER_BASE_BOOKWORM)_DBG_DEPENDS) \ $(LIBSWSSCOMMON_DBG) \ - $(LIBYANG_DBG) \ - $(LIBYANG_CPP_DBG) \ - $(LIBYANG_PY3_DBG) \ + $(LIBYANG3_DBG) \ $(PYTHON3_SWSSCOMMON_DBG) \ $(SONIC_DB_CLI_DBG) \ $(SONIC_EVENTD_DBG) diff --git a/rules/docker-config-engine-bullseye.mk b/rules/docker-config-engine-bullseye.mk index 2c028551776..9d0a135f186 100644 --- a/rules/docker-config-engine-bullseye.mk +++ b/rules/docker-config-engine-bullseye.mk @@ -4,9 +4,8 @@ DOCKER_CONFIG_ENGINE_BULLSEYE = docker-config-engine-bullseye.gz $(DOCKER_CONFIG_ENGINE_BULLSEYE)_PATH = $(DOCKERS_PATH)/docker-config-engine-bullseye $(DOCKER_CONFIG_ENGINE_BULLSEYE)_DEPENDS += $(LIBSWSSCOMMON) \ - $(LIBYANG) \ - $(LIBYANG_CPP) \ - $(LIBYANG_PY3) \ + $(LIBYANG3) \ + $(LIBYANG3_PY3) \ $(PYTHON3_SWSSCOMMON) \ $(SONIC_DB_CLI) \ $(SONIC_EVENTD) @@ -24,9 +23,7 @@ $(DOCKER_CONFIG_ENGINE_BULLSEYE)_FILES += $($(SONIC_CTRMGRD)_STARTUP_SCRIPT) $(DOCKER_CONFIG_ENGINE_BULLSEYE)_DBG_DEPENDS = $($(DOCKER_BASE_BULLSEYE)_DBG_DEPENDS) \ $(LIBSWSSCOMMON_DBG) \ - $(LIBYANG_DBG) \ - $(LIBYANG_CPP_DBG) \ - $(LIBYANG_PY3_DBG) \ + $(LIBYANG3_DBG) \ $(PYTHON3_SWSSCOMMON_DBG) \ $(SONIC_DB_CLI_DBG) \ $(SONIC_EVENTD_DBG) diff --git a/rules/docker-config-engine-buster.mk b/rules/docker-config-engine-buster.mk index 9f4035d6aa2..767eab08b83 100644 --- a/rules/docker-config-engine-buster.mk +++ b/rules/docker-config-engine-buster.mk @@ -4,9 +4,8 @@ DOCKER_CONFIG_ENGINE_BUSTER = docker-config-engine-buster.gz $(DOCKER_CONFIG_ENGINE_BUSTER)_PATH = $(DOCKERS_PATH)/docker-config-engine-buster $(DOCKER_CONFIG_ENGINE_BUSTER)_DEPENDS += $(LIBSWSSCOMMON) \ - $(LIBYANG) \ - $(LIBYANG_CPP) \ - $(LIBYANG_PY3) \ + $(LIBYANG3) \ + $(LIBYANG3_PY3) \ $(PYTHON3_SWSSCOMMON) \ $(SONIC_DB_CLI) $(DOCKER_CONFIG_ENGINE_BUSTER)_PYTHON_WHEELS += $(SONIC_PY_COMMON_PY3) \ diff --git a/rules/docker-config-engine-trixie.mk b/rules/docker-config-engine-trixie.mk index 59bbd5f4e75..0c241ab6762 100644 --- a/rules/docker-config-engine-trixie.mk +++ b/rules/docker-config-engine-trixie.mk @@ -4,9 +4,8 @@ DOCKER_CONFIG_ENGINE_TRIXIE = docker-config-engine-trixie.gz $(DOCKER_CONFIG_ENGINE_TRIXIE)_PATH = $(DOCKERS_PATH)/docker-config-engine-trixie $(DOCKER_CONFIG_ENGINE_TRIXIE)_DEPENDS += $(LIBSWSSCOMMON) \ - $(LIBYANG) \ - $(LIBYANG_CPP) \ - $(LIBYANG_PY3) \ + $(LIBYANG3) \ + $(LIBYANG3_PY3) \ $(PYTHON3_SWSSCOMMON) \ $(SONIC_DB_CLI) \ $(SONIC_EVENTD) \ @@ -26,9 +25,7 @@ $(DOCKER_CONFIG_ENGINE_TRIXIE)_FILES += $($(SONIC_CTRMGRD)_STARTUP_SCRIPT) $(DOCKER_CONFIG_ENGINE_TRIXIE)_DBG_DEPENDS = $($(DOCKER_BASE_TRIXIE)_DBG_DEPENDS) \ $(LIBSWSSCOMMON_DBG) \ - $(LIBYANG_DBG) \ - $(LIBYANG_CPP_DBG) \ - $(LIBYANG_PY3_DBG) \ + $(LIBYANG3_DBG) \ $(PYTHON3_SWSSCOMMON_DBG) \ $(SONIC_DB_CLI_DBG) \ $(SONIC_EVENTD_DBG) diff --git a/rules/docker-dash-ha.mk b/rules/docker-dash-ha.mk index da2791bff8c..b641d356969 100644 --- a/rules/docker-dash-ha.mk +++ b/rules/docker-dash-ha.mk @@ -7,12 +7,12 @@ DOCKER_DASH_HA_DBG = $(DOCKER_DASH_HA_STEM)-$(DBG_IMAGE_MARK).gz $(DOCKER_DASH_HA)_PATH = $(DOCKERS_PATH)/$(DOCKER_DASH_HA_STEM) $(DOCKER_DASH_HA)_DEPENDS += $(DASH_HA) -$(DOCKER_DASH_HA)_DBG_DEPENDS = $($(DOCKER_SWSS_LAYER_BOOKWORM)_DBG_DEPENDS) +$(DOCKER_DASH_HA)_DBG_DEPENDS = $($(DOCKER_SWSS_LAYER_TRIXIE)_DBG_DEPENDS) $(DOCKER_DASH_HA)_DBG_DEPENDS += $(DASH_HA_DBG) -$(DOCKER_DASH_HA)_DBG_IMAGE_PACKAGES = $($(DOCKER_SWSS_LAYER_BOOKWORM)_DBG_IMAGE_PACKAGES) +$(DOCKER_DASH_HA)_DBG_IMAGE_PACKAGES = $($(DOCKER_SWSS_LAYER_TRIXIE)_DBG_IMAGE_PACKAGES) -$(DOCKER_DASH_HA)_LOAD_DOCKERS += $(DOCKER_SWSS_LAYER_BOOKWORM) +$(DOCKER_DASH_HA)_LOAD_DOCKERS += $(DOCKER_SWSS_LAYER_TRIXIE) $(DOCKER_DASH_HA)_VERSION = 1.0.0 $(DOCKER_DASH_HA)_PACKAGE_NAME = dash-ha @@ -34,7 +34,7 @@ endif $(DOCKER_DASH_HA)_CONTAINER_NAME = dash-ha $(DOCKER_DASH_HA)_RUN_OPT += -t $(DOCKER_DASH_HA)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro -$(DOCKER_DASH_HA)_RUN_OPT += -v /etc/timezone:/etc/timezone:ro +$(DOCKER_DASH_HA)_RUN_OPT += -v /etc/localtime:/etc/localtime:ro -SONIC_BOOKWORM_DOCKERS += $(DOCKER_DASH_HA) -SONIC_BOOKWORM_DBG_DOCKERS += $(DOCKER_DASH_HA_DBG) +SONIC_TRIXIE_DOCKERS += $(DOCKER_DASH_HA) +SONIC_TRIXIE_DBG_DOCKERS += $(DOCKER_DASH_HA_DBG) diff --git a/rules/docker-database.dep b/rules/docker-database.dep index 85e807d8cac..3e4004b3c21 100644 --- a/rules/docker-database.dep +++ b/rules/docker-database.dep @@ -3,8 +3,9 @@ DPATH := $($(DOCKER_DATABASE)_PATH) DEP_FILES := $(SONIC_COMMON_FILES_LIST) rules/docker-database.mk rules/docker-database.dep DEP_FILES += $(SONIC_COMMON_BASE_FILES_LIST) DEP_FILES += $(shell git ls-files $(DPATH)) +DEP_FILES += dockers/dockerfile-macros.j2 -$(DOCKER_DATABASE)_CACHE_MODE := GIT_CONTENT_SHA +$(DOCKER_DATABASE)_CACHE_MODE := GIT_CONTENT_SHA $(DOCKER_DATABASE)_DEP_FLAGS := $(SONIC_COMMON_FLAGS_LIST) $(DOCKER_DATABASE)_DEP_FILES := $(DEP_FILES) diff --git a/rules/docker-database.mk b/rules/docker-database.mk index 6b3a5de3c90..68f582635b7 100644 --- a/rules/docker-database.mk +++ b/rules/docker-database.mk @@ -10,21 +10,21 @@ $(DOCKER_DATABASE)_DEPENDS += $(LIBSWSSCOMMON) \ $(DOCKER_DATABASE)_PATH = $(DOCKERS_PATH)/$(DOCKER_DATABASE_STEM) -$(DOCKER_DATABASE)_DBG_DEPENDS = $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_DEPENDS) +$(DOCKER_DATABASE)_DBG_DEPENDS = $($(DOCKER_CONFIG_ENGINE_TRIXIE)_DBG_DEPENDS) -$(DOCKER_DATABASE)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_IMAGE_PACKAGES) +$(DOCKER_DATABASE)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_TRIXIE)_DBG_IMAGE_PACKAGES) -$(DOCKER_DATABASE)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_BOOKWORM) +$(DOCKER_DATABASE)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_TRIXIE) $(DOCKER_DATABASE)_VERSION = 1.0.0 $(DOCKER_DATABASE)_PACKAGE_NAME = database SONIC_DOCKER_IMAGES += $(DOCKER_DATABASE) -SONIC_BOOKWORM_DOCKERS += $(DOCKER_DATABASE) +SONIC_TRIXIE_DOCKERS += $(DOCKER_DATABASE) SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_DATABASE) SONIC_DOCKER_DBG_IMAGES += $(DOCKER_DATABASE_DBG) -SONIC_BOOKWORM_DBG_DOCKERS += $(DOCKER_DATABASE_DBG) +SONIC_TRIXIE_DBG_DOCKERS += $(DOCKER_DATABASE_DBG) SONIC_INSTALL_DOCKER_DBG_IMAGES += $(DOCKER_DATABASE_DBG) $(DOCKER_DATABASE)_CONTAINER_NAME = database diff --git a/rules/docker-dhcp-relay.mk b/rules/docker-dhcp-relay.mk index 0bbc3603aed..85def80aef8 100644 --- a/rules/docker-dhcp-relay.mk +++ b/rules/docker-dhcp-relay.mk @@ -8,12 +8,12 @@ $(DOCKER_DHCP_RELAY)_PATH = $(DOCKERS_PATH)/$(DOCKER_DHCP_RELAY_STEM) $(DOCKER_DHCP_RELAY)_DEPENDS += $(ISC_DHCP_RELAY) $(SONIC_DHCPMON) $(SONIC_DHCP4RELAY) $(SONIC_DHCPRELAY) $(LIBSWSSCOMMON) -$(DOCKER_DHCP_RELAY)_DBG_DEPENDS = $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_DEPENDS) +$(DOCKER_DHCP_RELAY)_DBG_DEPENDS = $($(DOCKER_CONFIG_ENGINE_TRIXIE)_DBG_DEPENDS) $(DOCKER_DHCP_RELAY)_DBG_DEPENDS += $(ISC_DHCP_RELAY_DBG) $(SONIC_DHCP4RELAY_DBG) $(SONIC_DHCPRELAY_DBG) $(SONIC_DHCPMON_DBG) -$(DOCKER_DHCP_RELAY)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_IMAGE_PACKAGES) +$(DOCKER_DHCP_RELAY)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_TRIXIE)_DBG_IMAGE_PACKAGES) -$(DOCKER_DHCP_RELAY)_LOAD_DOCKERS = $(DOCKER_CONFIG_ENGINE_BOOKWORM) +$(DOCKER_DHCP_RELAY)_LOAD_DOCKERS = $(DOCKER_CONFIG_ENGINE_TRIXIE) $(DOCKER_DHCP_RELAY)_INSTALL_PYTHON_WHEELS = $(SONIC_UTILITIES_PY3) $(DOCKER_DHCP_RELAY)_INSTALL_DEBS = $(PYTHON3_SWSSCOMMON) @@ -28,9 +28,9 @@ $(DOCKER_DHCP_RELAY)_SERVICE_AFTER = swss syncd teamd $(DOCKER_DHCP_RELAY)_SERVICE_DEPENDENT_OF = swss SONIC_DOCKER_IMAGES += $(DOCKER_DHCP_RELAY) -SONIC_BOOKWORM_DOCKERS += $(DOCKER_DHCP_RELAY) +SONIC_TRIXIE_DOCKERS += $(DOCKER_DHCP_RELAY) SONIC_DOCKER_DBG_IMAGES += $(DOCKER_DHCP_RELAY_DBG) -SONIC_BOOKWORM_DBG_DOCKERS += $(DOCKER_DHCP_RELAY_DBG) +SONIC_TRIXIE_DBG_DOCKERS += $(DOCKER_DHCP_RELAY_DBG) ifeq ($(INCLUDE_KUBERNETES),y) $(DOCKER_DHCP_RELAY)_DEFAULT_FEATURE_OWNER = kube diff --git a/rules/docker-dhcp-server.mk b/rules/docker-dhcp-server.mk index 433d9d33a3f..05cfeef6f13 100644 --- a/rules/docker-dhcp-server.mk +++ b/rules/docker-dhcp-server.mk @@ -7,20 +7,20 @@ DOCKER_DHCP_SERVER_DBG = $(DOCKER_DHCP_SERVER_STEM)-$(DBG_IMAGE_MARK).gz $(DOCKER_DHCP_SERVER)_PATH = $(DOCKERS_PATH)/$(DOCKER_DHCP_SERVER_STEM) $(DOCKER_DHCP_SERVER)_DEPENDS = $(LIBSWSSCOMMON) -$(DOCKER_DHCP_SERVER)_DBG_DEPENDS = $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_DEPENDS) +$(DOCKER_DHCP_SERVER)_DBG_DEPENDS = $($(DOCKER_CONFIG_ENGINE_TRIXIE)_DBG_DEPENDS) -$(DOCKER_DHCP_SERVER)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_IMAGE_PACKAGES) +$(DOCKER_DHCP_SERVER)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_TRIXIE)_DBG_IMAGE_PACKAGES) -$(DOCKER_DHCP_SERVER)_LOAD_DOCKERS = $(DOCKER_CONFIG_ENGINE_BOOKWORM) +$(DOCKER_DHCP_SERVER)_LOAD_DOCKERS = $(DOCKER_CONFIG_ENGINE_TRIXIE) $(DOCKER_DHCP_SERVER)_INSTALL_DEBS = $(PYTHON3_SWSSCOMMON) $(DOCKER_DHCP_SERVER)_PYTHON_WHEELS += $(SONIC_DHCP_UTILITIES_PY3) $(DOCKER_DHCP_SERVER)_INSTALL_PYTHON_WHEELS = $(SONIC_UTILITIES_PY3) SONIC_DOCKER_IMAGES += $(DOCKER_DHCP_SERVER) -SONIC_BOOKWORM_DOCKERS += $(DOCKER_DHCP_SERVER) +SONIC_TRIXIE_DOCKERS += $(DOCKER_DHCP_SERVER) SONIC_DOCKER_DBG_IMAGES += $(DOCKER_DHCP_SERVER_DBG) -SONIC_BOOKWORM_DBG_DOCKERS += $(DOCKER_DHCP_SERVER_DBG) +SONIC_TRIXIE_DBG_DOCKERS += $(DOCKER_DHCP_SERVER_DBG) ifeq ($(INCLUDE_KUBERNETES),y) $(DOCKER_DHCP_SERVER)_DEFAULT_FEATURE_OWNER = kube diff --git a/rules/docker-eventd.mk b/rules/docker-eventd.mk index 928eaef2cd3..832eacd4886 100644 --- a/rules/docker-eventd.mk +++ b/rules/docker-eventd.mk @@ -6,12 +6,12 @@ DOCKER_EVENTD_DBG = $(DOCKER_EVENTD_STEM)-$(DBG_IMAGE_MARK).gz $(DOCKER_EVENTD)_DEPENDS += $(SONIC_EVENTD) -$(DOCKER_EVENTD)_DBG_DEPENDS = $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_DEPENDS) +$(DOCKER_EVENTD)_DBG_DEPENDS = $($(DOCKER_CONFIG_ENGINE_TRIXIE)_DBG_DEPENDS) $(DOCKER_EVENTD)_DBG_DEPENDS += $(SONIC_EVENTD_DBG) $(LIBSWSSCOMMON_DBG) -$(DOCKER_EVENTD)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_IMAGE_PACKAGES) +$(DOCKER_EVENTD)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_TRIXIE)_DBG_IMAGE_PACKAGES) -$(DOCKER_EVENTD)_LOAD_DOCKERS = $(DOCKER_CONFIG_ENGINE_BOOKWORM) +$(DOCKER_EVENTD)_LOAD_DOCKERS = $(DOCKER_CONFIG_ENGINE_TRIXIE) $(DOCKER_EVENTD)_PATH = $(DOCKERS_PATH)/$(DOCKER_EVENTD_STEM) @@ -36,5 +36,5 @@ $(DOCKER_EVENTD)_RUN_OPT += -t $(DOCKER_EVENTD)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro $(DOCKER_EVENTD)_RUN_OPT += -v /etc/localtime:/etc/localtime:ro -SONIC_BOOKWORM_DOCKERS += $(DOCKER_EVENTD) -SONIC_BOOKWORM_DBG_DOCKERS += $(DOCKER_EVENTD_DBG) +SONIC_TRIXIE_DOCKERS += $(DOCKER_EVENTD) +SONIC_TRIXIE_DBG_DOCKERS += $(DOCKER_EVENTD_DBG) diff --git a/rules/docker-fpm-frr.mk b/rules/docker-fpm-frr.mk index 1b124c14a49..d9fa0f405b5 100644 --- a/rules/docker-fpm-frr.mk +++ b/rules/docker-fpm-frr.mk @@ -7,14 +7,20 @@ DOCKER_FPM_FRR_DBG = $(DOCKER_FPM_FRR_STEM)-$(DBG_IMAGE_MARK).gz $(DOCKER_FPM_FRR)_PATH = $(DOCKERS_PATH)/$(DOCKER_FPM_FRR_STEM) $(DOCKER_FPM_FRR)_PYTHON_WHEELS += $(SONIC_BGPCFGD) $(SONIC_FRR_MGMT_FRAMEWORK) -$(DOCKER_FPM_FRR)_DEPENDS += $(FRR) $(FRR_SNMP) $(SWSS) $(LIBYANG3) -$(DOCKER_FPM_FRR)_DBG_DEPENDS = $($(DOCKER_SWSS_LAYER_BOOKWORM)_DBG_DEPENDS) +$(DOCKER_FPM_FRR)_DEPENDS += $(FRR) $(SWSS) $(LIBYANG3) +ifeq ($(ENABLE_FRR_SNMP_AGENT),y) +$(DOCKER_FPM_FRR)_DEPENDS += $(FRR_SNMP) +endif +$(DOCKER_FPM_FRR)_DBG_DEPENDS = $($(DOCKER_SWSS_LAYER_TRIXIE)_DBG_DEPENDS) $(DOCKER_FPM_FRR)_DBG_DEPENDS += $(SWSS_DBG) $(LIBSWSSCOMMON_DBG) \ - $(FRR_DBG) $(FRR_SNMP_DBG) $(LIBYANG3_DBG) + $(FRR_DBG) $(LIBYANG3_DBG) +ifeq ($(ENABLE_FRR_SNMP_AGENT),y) +$(DOCKER_FPM_FRR)_DBG_DEPENDS += $(FRR_SNMP_DBG) +endif -$(DOCKER_FPM_FRR)_DBG_IMAGE_PACKAGES = $($(DOCKER_SWSS_LAYER_BOOKWORM)_DBG_IMAGE_PACKAGES) +$(DOCKER_FPM_FRR)_DBG_IMAGE_PACKAGES = $($(DOCKER_SWSS_LAYER_TRIXIE)_DBG_IMAGE_PACKAGES) -$(DOCKER_FPM_FRR)_LOAD_DOCKERS += $(DOCKER_SWSS_LAYER_BOOKWORM) +$(DOCKER_FPM_FRR)_LOAD_DOCKERS += $(DOCKER_SWSS_LAYER_TRIXIE) $(DOCKER_FPM_FRR)_VERSION = 1.0.0 $(DOCKER_FPM_FRR)_PACKAGE_NAME = fpm-frr @@ -29,6 +35,9 @@ SONIC_DOCKER_DBG_IMAGES += $(DOCKER_FPM_FRR_DBG) $(DOCKER_FPM_FRR)_CONTAINER_NAME = bgp $(DOCKER_FPM_FRR)_RUN_OPT += -t --cap-add=NET_ADMIN --cap-add=SYS_ADMIN +ifeq ($(ENABLE_ASAN), y) +$(DOCKER_FPM_FRR)_RUN_OPT += --cap-add=SYS_PTRACE +endif $(DOCKER_FPM_FRR)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro $(DOCKER_FPM_FRR)_RUN_OPT += -v /etc/localtime:/etc/localtime:ro @@ -43,5 +52,5 @@ $(DOCKER_FPM_FRR)_BASE_IMAGE_FILES += platform_utils:/usr/bin/platform_utils $(DOCKER_FPM_FRR)_BASE_IMAGE_FILES += idf_isolation:/usr/bin/idf_isolation $(DOCKER_FPM_FRR)_BASE_IMAGE_FILES += prefix_list:/usr/bin/prefix_list -SONIC_BOOKWORM_DOCKERS += $(DOCKER_FPM_FRR) -SONIC_BOOKWORM_DBG_DOCKERS += $(DOCKER_FPM_FRR_DBG) +SONIC_TRIXIE_DOCKERS += $(DOCKER_FPM_FRR) +SONIC_TRIXIE_DBG_DOCKERS += $(DOCKER_FPM_FRR_DBG) diff --git a/rules/docker-gnmi-sidecar.mk b/rules/docker-gnmi-sidecar.mk index 44b962b4639..717255530e3 100644 --- a/rules/docker-gnmi-sidecar.mk +++ b/rules/docker-gnmi-sidecar.mk @@ -4,7 +4,7 @@ DOCKER_GNMI_SIDECAR_STEM = docker-gnmi-sidecar DOCKER_GNMI_SIDECAR = $(DOCKER_GNMI_SIDECAR_STEM).gz DOCKER_GNMI_SIDECAR_DBG = $(DOCKER_GNMI_SIDECAR_STEM)-$(DBG_IMAGE_MARK).gz -$(DOCKER_GNMI_SIDECAR)_LOAD_DOCKERS = $(DOCKER_CONFIG_ENGINE_BOOKWORM) +$(DOCKER_GNMI_SIDECAR)_LOAD_DOCKERS = $(DOCKER_CONFIG_ENGINE_TRIXIE) $(DOCKER_GNMI_SIDECAR)_PATH = $(DOCKERS_PATH)/$(DOCKER_GNMI_SIDECAR_STEM) @@ -12,11 +12,11 @@ $(DOCKER_GNMI_SIDECAR)_VERSION = 1.0.0 $(DOCKER_GNMI_SIDECAR)_PACKAGE_NAME = gnmi-sidecar SONIC_DOCKER_IMAGES += $(DOCKER_GNMI_SIDECAR) -SONIC_BOOKWORM_DOCKERS += $(DOCKER_GNMI_SIDECAR) +SONIC_TRIXIE_DOCKERS += $(DOCKER_GNMI_SIDECAR) SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_GNMI_SIDECAR) SONIC_DOCKER_DBG_IMAGES += $(DOCKER_GNMI_SIDECAR_DBG) -SONIC_BOOKWORM_DBG_DOCKERS += $(DOCKER_GNMI_SIDECAR_DBG) +SONIC_TRIXIE_DBG_DOCKERS += $(DOCKER_GNMI_SIDECAR_DBG) SONIC_INSTALL_DOCKER_DBG_IMAGES += $(DOCKER_GNMI_SIDECAR_DBG) @@ -26,7 +26,7 @@ $(DOCKER_GNMI_SIDECAR)_INSTALL_PYTHON_WHEELS = $(SONIC_PY_COMMON_PY3) $(DOCKER_GNMI_SIDECAR)_INSTALL_DEBS = $(LIBSWSSCOMMON) \ $(PYTHON3_SWSSCOMMON) \ - $(LIBYANG_PY3) + $(LIBYANG3_PY3) $(DOCKER_GNMI_SIDECAR)_CONTAINER_NAME = gnmi-sidecar $(DOCKER_GNMI_SIDECAR)_RUN_OPT += -t --pid=host diff --git a/rules/docker-gnmi-watchdog.mk b/rules/docker-gnmi-watchdog.mk index 234fe77cbeb..6e34e3849a6 100644 --- a/rules/docker-gnmi-watchdog.mk +++ b/rules/docker-gnmi-watchdog.mk @@ -4,7 +4,7 @@ DOCKER_GNMI_WATCHDOG_STEM = docker-gnmi-watchdog DOCKER_GNMI_WATCHDOG = $(DOCKER_GNMI_WATCHDOG_STEM).gz DOCKER_GNMI_WATCHDOG_DBG = $(DOCKER_GNMI_WATCHDOG_STEM)-$(DBG_IMAGE_MARK).gz -$(DOCKER_GNMI_WATCHDOG)_LOAD_DOCKERS = $(DOCKER_CONFIG_ENGINE_BOOKWORM) +$(DOCKER_GNMI_WATCHDOG)_LOAD_DOCKERS = $(DOCKER_CONFIG_ENGINE_TRIXIE) $(DOCKER_GNMI_WATCHDOG)_PATH = $(DOCKERS_PATH)/$(DOCKER_GNMI_WATCHDOG_STEM) @@ -12,13 +12,13 @@ $(DOCKER_GNMI_WATCHDOG)_VERSION = 1.0.0 $(DOCKER_GNMI_WATCHDOG)_PACKAGE_NAME = gnmi_watchdog SONIC_DOCKER_IMAGES += $(DOCKER_GNMI_WATCHDOG) -SONIC_BOOKWORM_DOCKERS += $(DOCKER_GNMI_WATCHDOG) +SONIC_TRIXIE_DOCKERS += $(DOCKER_GNMI_WATCHDOG) ifeq ($(INCLUDE_SYSTEM_GNMI), y) SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_GNMI_WATCHDOG) endif SONIC_DOCKER_DBG_IMAGES += $(DOCKER_GNMI_WATCHDOG_DBG) -SONIC_BOOKWORM_DBG_DOCKERS += $(DOCKER_GNMI_WATCHDOG_DBG) +SONIC_TRIXIE_DBG_DOCKERS += $(DOCKER_GNMI_WATCHDOG_DBG) ifeq ($(INCLUDE_SYSTEM_GNMI), y) SONIC_INSTALL_DOCKER_DBG_IMAGES += $(DOCKER_GNMI_WATCHDOG_DBG) endif diff --git a/rules/docker-gnmi.mk b/rules/docker-gnmi.mk index 2f5a2e50e3d..2b224333b18 100644 --- a/rules/docker-gnmi.mk +++ b/rules/docker-gnmi.mk @@ -8,23 +8,28 @@ $(DOCKER_GNMI)_PATH = $(DOCKERS_PATH)/$(DOCKER_GNMI_STEM) $(DOCKER_GNMI)_DEPENDS += $(SONIC_MGMT_COMMON) $(DOCKER_GNMI)_DEPENDS += $(SONIC_TELEMETRY) -$(DOCKER_GNMI)_DBG_DEPENDS = $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_DEPENDS) +$(DOCKER_GNMI)_DBG_DEPENDS = $($(DOCKER_CONFIG_ENGINE_TRIXIE)_DBG_DEPENDS) -$(DOCKER_GNMI)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_BOOKWORM) +$(DOCKER_GNMI)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_TRIXIE) $(DOCKER_GNMI)_VERSION = 1.0.0 $(DOCKER_GNMI)_PACKAGE_NAME = gnmi -$(DOCKER_GNMI)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_IMAGE_PACKAGES) +$(DOCKER_GNMI)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_TRIXIE)_DBG_IMAGE_PACKAGES) + +# Ensure docker-telemetry-watchdog (which uses a docker-sonic-gnmi-based image) +# is built before the docker-sonic-gnmi debug image, because the debug image build removes +# its docker-sonic-gnmi base image during cleanup. +$(DOCKER_GNMI_DBG)_AFTER += $(DOCKER_TELEMETRY_WATCHDOG) SONIC_DOCKER_IMAGES += $(DOCKER_GNMI) -SONIC_BOOKWORM_DOCKERS += $(DOCKER_GNMI) +SONIC_TRIXIE_DOCKERS += $(DOCKER_GNMI) ifeq ($(INCLUDE_SYSTEM_GNMI), y) SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_GNMI) endif SONIC_DOCKER_DBG_IMAGES += $(DOCKER_GNMI_DBG) -SONIC_BOOKWORM_DBG_DOCKERS += $(DOCKER_GNMI_DBG) +SONIC_TRIXIE_DBG_DOCKERS += $(DOCKER_GNMI_DBG) ifeq ($(INCLUDE_SYSTEM_GNMI), y) SONIC_INSTALL_DOCKER_DBG_IMAGES += $(DOCKER_GNMI_DBG) endif @@ -53,6 +58,8 @@ $(DOCKER_GNMI)_RUN_OPT += --security-opt apparmor=unconfined $(DOCKER_GNMI)_RUN_OPT += --security-opt seccomp=unconfined # For GNOI running sudo command in case of container NS remapping. $(DOCKER_GNMI)_RUN_OPT += --userns=host +# For GNMI Unix Domain Socket (local access without TLS) +$(DOCKER_GNMI)_RUN_OPT += -v /var/run/gnmi:/var/run/gnmi:rw diff --git a/rules/docker-iccpd.mk b/rules/docker-iccpd.mk index eff5b4d68dc..fff8a548cf0 100644 --- a/rules/docker-iccpd.mk +++ b/rules/docker-iccpd.mk @@ -5,10 +5,10 @@ DOCKER_ICCPD = $(DOCKER_ICCPD_STEM).gz DOCKER_ICCPD_DBG = $(DOCKER_ICCPD_STEM)-$(DBG_IMAGE_MARK).gz $(DOCKER_ICCPD)_PATH = $(DOCKERS_PATH)/$(DOCKER_ICCPD_STEM) $(DOCKER_ICCPD)_DEPENDS += $(ICCPD) -$(DOCKER_ICCPD)_DBG_DEPENDS = $($(DOCKER_SWSS_LAYER_BOOKWORM)_DBG_DEPENDS) +$(DOCKER_ICCPD)_DBG_DEPENDS = $($(DOCKER_SWSS_LAYER_TRIXIE)_DBG_DEPENDS) $(DOCKER_ICCPD)_DBG_DEPENDS += $(ICCPD_DBG) -$(DOCKER_ICCPD)_DBG_IMAGE_PACKAGES = $($(DOCKER_SWSS_LAYER_BOOKWORM)_DBG_IMAGE_PACKAGES) -$(DOCKER_ICCPD)_LOAD_DOCKERS += $(DOCKER_SWSS_LAYER_BOOKWORM) +$(DOCKER_ICCPD)_DBG_IMAGE_PACKAGES = $($(DOCKER_SWSS_LAYER_TRIXIE)_DBG_IMAGE_PACKAGES) +$(DOCKER_ICCPD)_LOAD_DOCKERS += $(DOCKER_SWSS_LAYER_TRIXIE) $(DOCKER_ICCPD)_VERSION = 1.0.0 $(DOCKER_ICCPD)_ICCPD = iccpd @@ -27,5 +27,5 @@ $(DOCKER_ICCPD)_RUN_OPT += -v /etc/localtime:/etc/localtime:ro $(DOCKER_ICCPD)_BASE_IMAGE_FILES += mclagdctl:/usr/bin/mclagdctl -SONIC_BOOKWORM_DOCKERS += $(DOCKER_ICCPD) -SONIC_BOOKWORM_DBG_DOCKERS += $(DOCKER_ICCPD_DBG) +SONIC_TRIXIE_DOCKERS += $(DOCKER_ICCPD) +SONIC_TRIXIE_DBG_DOCKERS += $(DOCKER_ICCPD_DBG) diff --git a/rules/docker-lldp.mk b/rules/docker-lldp.mk index ec352cc5f24..436b703bf3b 100644 --- a/rules/docker-lldp.mk +++ b/rules/docker-lldp.mk @@ -8,13 +8,13 @@ $(DOCKER_LLDP)_PATH = $(DOCKERS_PATH)/docker-lldp $(DOCKER_LLDP)_DEPENDS += $(LLDPD) $(LIBSWSSCOMMON) $(PYTHON3_SWSSCOMMON) -$(DOCKER_LLDP)_DBG_DEPENDS = $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_DEPENDS) +$(DOCKER_LLDP)_DBG_DEPENDS = $($(DOCKER_CONFIG_ENGINE_TRIXIE)_DBG_DEPENDS) $(DOCKER_LLDP)_DBG_DEPENDS += $(LLDPD_DBG) $(LIBSWSSCOMMON_DBG) -$(DOCKER_LLDP)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_IMAGE_PACKAGES) +$(DOCKER_LLDP)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_TRIXIE)_DBG_IMAGE_PACKAGES) $(DOCKER_LLDP)_PYTHON_WHEELS += $(DBSYNCD_PY3) -$(DOCKER_LLDP)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_BOOKWORM) +$(DOCKER_LLDP)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_TRIXIE) $(DOCKER_LLDP)_VERSION = 1.0.0 $(DOCKER_LLDP)_PACKAGE_NAME = lldp @@ -22,18 +22,22 @@ $(DOCKER_LLDP)_WARM_SHUTDOWN_BEFORE = swss $(DOCKER_LLDP)_FAST_SHUTDOWN_BEFORE = swss SONIC_DOCKER_IMAGES += $(DOCKER_LLDP) +ifeq ($(INCLUDE_LLDP), y) SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_LLDP) +endif SONIC_DOCKER_DBG_IMAGES += $(DOCKER_LLDP_DBG) +ifeq ($(INCLUDE_LLDP), y) SONIC_INSTALL_DOCKER_DBG_IMAGES += $(DOCKER_LLDP_DBG) +endif $(DOCKER_LLDP)_CONTAINER_NAME = lldp $(DOCKER_LLDP)_RUN_OPT += -t --cap-add=NET_ADMIN $(DOCKER_LLDP)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro -$(DOCKER_LLDP)_RUN_OPT += -v /etc/localtime:/etc/localtime:ro +$(DOCKER_LLDP)_RUN_OPT += -v /etc/localtime:/etc/localtime:ro $(DOCKER_LLDP)_BASE_IMAGE_FILES += lldpctl:/usr/bin/lldpctl $(DOCKER_LLDP)_BASE_IMAGE_FILES += lldpcli:/usr/bin/lldpcli -SONIC_BOOKWORM_DOCKERS += $(DOCKER_LLDP) -SONIC_BOOKWORM_DBG_DOCKERS += $(DOCKER_LLDP_DBG) +SONIC_TRIXIE_DOCKERS += $(DOCKER_LLDP) +SONIC_TRIXIE_DBG_DOCKERS += $(DOCKER_LLDP_DBG) diff --git a/rules/docker-macsec.mk b/rules/docker-macsec.mk index 5c34acfc4c0..e7f4b76cfa2 100644 --- a/rules/docker-macsec.mk +++ b/rules/docker-macsec.mk @@ -7,20 +7,20 @@ DOCKER_MACSEC_DBG = $(DOCKER_MACSEC_STEM)-$(DBG_IMAGE_MARK).gz $(DOCKER_MACSEC)_PATH = $(DOCKERS_PATH)/$(DOCKER_MACSEC_STEM) $(DOCKER_MACSEC)_DEPENDS += $(WPASUPPLICANT) -$(DOCKER_MACSEC)_DBG_DEPENDS = $($(DOCKER_SWSS_LAYER_BOOKWORM)_DBG_DEPENDS) +$(DOCKER_MACSEC)_DBG_DEPENDS = $($(DOCKER_SWSS_LAYER_TRIXIE)_DBG_DEPENDS) $(DOCKER_MACSEC)_DBG_DEPENDS += $(WPASUPPLICANT_DBG) -$(DOCKER_MACSEC)_DBG_IMAGE_PACKAGES = $($(DOCKER_SWSS_LAYER_BOOKWORM)_DBG_IMAGE_PACKAGES) +$(DOCKER_MACSEC)_DBG_IMAGE_PACKAGES = $($(DOCKER_SWSS_LAYER_TRIXIE)_DBG_IMAGE_PACKAGES) -$(DOCKER_MACSEC)_LOAD_DOCKERS += $(DOCKER_SWSS_LAYER_BOOKWORM) +$(DOCKER_MACSEC)_LOAD_DOCKERS += $(DOCKER_SWSS_LAYER_TRIXIE) $(DOCKER_MACSEC)_INSTALL_PYTHON_WHEELS = $(SONIC_UTILITIES_PY3) -$(DOCKER_MACSEC)_INSTALL_DEBS = $(PYTHON3_SWSSCOMMON) $(LIBYANG_PY3) +$(DOCKER_MACSEC)_INSTALL_DEBS = $(PYTHON3_SWSSCOMMON) $(LIBYANG3_PY3) SONIC_DOCKER_IMAGES += $(DOCKER_MACSEC) -SONIC_BOOKWORM_DOCKERS += $(DOCKER_MACSEC) +SONIC_TRIXIE_DOCKERS += $(DOCKER_MACSEC) SONIC_DOCKER_DBG_IMAGES += $(DOCKER_MACSEC_DBG) -SONIC_BOOKWORM_DBG_DOCKERS += $(DOCKER_MACSEC_DBG) +SONIC_TRIXIE_DBG_DOCKERS += $(DOCKER_MACSEC_DBG) ifeq ($(INCLUDE_KUBERNETES),y) $(DOCKER_MACSEC)_DEFAULT_FEATURE_OWNER = kube @@ -42,7 +42,6 @@ $(DOCKER_MACSEC)_PACKAGE_NAME = macsec $(DOCKER_MACSEC)_CONTAINER_PRIVILEGED = false $(DOCKER_MACSEC)_CONTAINER_VOLUMES += /etc/sonic:/etc/sonic:ro $(DOCKER_MACSEC)_CONTAINER_VOLUMES += /etc/localtime:/etc/localtime:ro -$(DOCKER_MACSEC)_CONTAINER_VOLUMES += /host/warmboot:/var/warmboot $(DOCKER_MACSEC)_SERVICE_REQUIRES = config-setup $(DOCKER_MACSEC)_SERVICE_AFTER = swss syncd diff --git a/rules/docker-mux.mk b/rules/docker-mux.mk index 46a62cf29c0..e52f6d5c1e3 100644 --- a/rules/docker-mux.mk +++ b/rules/docker-mux.mk @@ -7,12 +7,12 @@ DOCKER_MUX_DBG = $(DOCKER_MUX_STEM)-$(DBG_IMAGE_MARK).gz $(DOCKER_MUX)_PATH = $(DOCKERS_PATH)/$(DOCKER_MUX_STEM) $(DOCKER_MUX)_DEPENDS = $(SONIC_LINKMGRD) $(LIBSWSSCOMMON) -$(DOCKER_MUX)_DBG_DEPENDS = $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_DEPENDS) +$(DOCKER_MUX)_DBG_DEPENDS = $($(DOCKER_CONFIG_ENGINE_TRIXIE)_DBG_DEPENDS) $(DOCKER_MUX)_DBG_DEPENDS += $(SONIC_LINKMGRD_DBG) $(LIBSWSSCOMMON_DBG) -$(DOCKER_MUX)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_IMAGE_PACKAGES) +$(DOCKER_MUX)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_TRIXIE)_DBG_IMAGE_PACKAGES) -$(DOCKER_MUX)_LOAD_DOCKERS = $(DOCKER_CONFIG_ENGINE_BOOKWORM) +$(DOCKER_MUX)_LOAD_DOCKERS = $(DOCKER_CONFIG_ENGINE_TRIXIE) $(DOCKER_MUX)_VERSION = 1.0.0 $(DOCKER_MUX)_PACKAGE_NAME = mux @@ -29,8 +29,8 @@ SONIC_DOCKER_DBG_IMAGES += $(DOCKER_MUX_DBG) SONIC_INSTALL_DOCKER_DBG_IMAGES += $(DOCKER_MUX_DBG) endif -SONIC_BOOKWORM_DOCKERS += $(DOCKER_MUX) -SONIC_BOOKWORM_DBG_DOCKERS += $(DOCKER_MUX_DBG) +SONIC_TRIXIE_DOCKERS += $(DOCKER_MUX) +SONIC_TRIXIE_DBG_DOCKERS += $(DOCKER_MUX_DBG) $(DOCKER_MUX)_CONTAINER_NAME = mux $(DOCKER_MUX)_RUN_OPT += -t diff --git a/rules/docker-nat.mk b/rules/docker-nat.mk index d59d72c884a..a8fe42e8cc7 100644 --- a/rules/docker-nat.mk +++ b/rules/docker-nat.mk @@ -6,12 +6,12 @@ DOCKER_NAT_DBG = $(DOCKER_NAT_STEM)-$(DBG_IMAGE_MARK).gz $(DOCKER_NAT)_PATH = $(DOCKERS_PATH)/$(DOCKER_NAT_STEM) -$(DOCKER_NAT)_DEPENDS += $(SWSS) $(IPTABLESIP4TC) $(IPTABLESIP6TC) $(IPTABLESIPTC) $(IPXTABLES12) $(IPTABLES) -$(DOCKER_NAT)_DBG_DEPENDS = $($(DOCKER_SWSS_LAYER_BOOKWORM)_DBG_DEPENDS) +$(DOCKER_NAT)_DEPENDS += $(SWSS) +$(DOCKER_NAT)_DBG_DEPENDS = $($(DOCKER_SWSS_LAYER_TRIXIE)_DBG_DEPENDS) $(DOCKER_NAT)_DBG_DEPENDS += $(SWSS_DBG) $(LIBSWSSCOMMON_DBG) -$(DOCKER_NAT)_DBG_IMAGE_PACKAGES = $($(DOCKER_SWSS_LAYER_BOOKWORM)_DBG_IMAGE_PACKAGES) +$(DOCKER_NAT)_DBG_IMAGE_PACKAGES = $($(DOCKER_SWSS_LAYER_TRIXIE)_DBG_IMAGE_PACKAGES) -$(DOCKER_NAT)_LOAD_DOCKERS += $(DOCKER_SWSS_LAYER_BOOKWORM) +$(DOCKER_NAT)_LOAD_DOCKERS += $(DOCKER_SWSS_LAYER_TRIXIE) $(DOCKER_NAT)_VERSION = 1.0.0 $(DOCKER_NAT)_PACKAGE_NAME = nat @@ -32,10 +32,9 @@ $(DOCKER_NAT)_CONTAINER_NAME = nat $(DOCKER_NAT)_RUN_OPT += -t --cap-add=NET_ADMIN $(DOCKER_NAT)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro $(DOCKER_NAT)_RUN_OPT += -v /etc/localtime:/etc/localtime:ro -$(DOCKER_NAT)_RUN_OPT += -v /host/warmboot:/var/warmboot $(DOCKER_NAT)_BASE_IMAGE_FILES += natctl:/usr/bin/natctl -SONIC_BOOKWORM_DOCKERS += $(DOCKER_NAT) -SONIC_BOOKWORM_DBG_DOCKERS += $(DOCKER_NAT_DBG) +SONIC_TRIXIE_DOCKERS += $(DOCKER_NAT) +SONIC_TRIXIE_DBG_DOCKERS += $(DOCKER_NAT_DBG) diff --git a/rules/docker-orchagent.mk b/rules/docker-orchagent.mk index 3c0aa8fbad2..101905ad3b7 100644 --- a/rules/docker-orchagent.mk +++ b/rules/docker-orchagent.mk @@ -10,17 +10,17 @@ ifeq ($(ENABLE_ASAN), y) $(DOCKER_ORCHAGENT)_DEPENDS += $(SWSS_DBG) endif -$(DOCKER_ORCHAGENT)_DBG_DEPENDS = $($(DOCKER_SWSS_LAYER_BOOKWORM)_DBG_DEPENDS) +$(DOCKER_ORCHAGENT)_DBG_DEPENDS = $($(DOCKER_SWSS_LAYER_TRIXIE)_DBG_DEPENDS) $(DOCKER_ORCHAGENT)_DBG_DEPENDS += $(SWSS_DBG) \ $(LIBSWSSCOMMON_DBG) \ $(LIBSAIREDIS_DBG) $(DOCKER_ORCHAGENT)_PYTHON_WHEELS += $(SCAPY) -$(DOCKER_ORCHAGENT)_DBG_IMAGE_PACKAGES = $($(DOCKER_SWSS_LAYER_BOOKWORM)_DBG_IMAGE_PACKAGES) +$(DOCKER_ORCHAGENT)_DBG_IMAGE_PACKAGES = $($(DOCKER_SWSS_LAYER_TRIXIE)_DBG_IMAGE_PACKAGES) $(DOCKER_ORCHAGENT)_PATH = $(DOCKERS_PATH)/$(DOCKER_ORCHAGENT_STEM) -$(DOCKER_ORCHAGENT)_LOAD_DOCKERS += $(DOCKER_SWSS_LAYER_BOOKWORM) +$(DOCKER_ORCHAGENT)_LOAD_DOCKERS += $(DOCKER_SWSS_LAYER_TRIXIE) $(DOCKER_ORCHAGENT)_VERSION = 1.0.0 $(DOCKER_ORCHAGENT)_PACKAGE_NAME = swss @@ -28,21 +28,25 @@ $(DOCKER_ORCHAGENT)_WARM_SHUTDOWN_BEFORE = syncd $(DOCKER_ORCHAGENT)_FAST_SHUTDOWN_BEFORE = syncd SONIC_DOCKER_IMAGES += $(DOCKER_ORCHAGENT) -SONIC_BOOKWORM_DOCKERS += $(DOCKER_ORCHAGENT) +SONIC_TRIXIE_DOCKERS += $(DOCKER_ORCHAGENT) SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_ORCHAGENT) SONIC_DOCKER_DBG_IMAGES += $(DOCKER_ORCHAGENT_DBG) -SONIC_BOOKWORM_DBG_DOCKERS += $(DOCKER_ORCHAGENT_DBG) +SONIC_TRIXIE_DBG_DOCKERS += $(DOCKER_ORCHAGENT_DBG) SONIC_INSTALL_DOCKER_DBG_IMAGES += $(DOCKER_ORCHAGENT_DBG) $(DOCKER_ORCHAGENT)_CONTAINER_NAME = swss $(DOCKER_ORCHAGENT)_RUN_OPT += -t --cap-add=NET_ADMIN --security-opt apparmor=unconfined --security-opt="systempaths=unconfined" +ifeq ($(ENABLE_ASAN), y) +$(DOCKER_ORCHAGENT)_RUN_OPT += --cap-add=SYS_PTRACE +endif $(DOCKER_ORCHAGENT)_RUN_OPT += -v /etc/network/interfaces:/etc/network/interfaces:ro $(DOCKER_ORCHAGENT)_RUN_OPT += -v /etc/localtime:/etc/localtime:ro $(DOCKER_ORCHAGENT)_RUN_OPT += -v /etc/network/interfaces.d/:/etc/network/interfaces.d/:ro $(DOCKER_ORCHAGENT)_RUN_OPT += -v /host/machine.conf:/host/machine.conf:ro $(DOCKER_ORCHAGENT)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro $(DOCKER_ORCHAGENT)_RUN_OPT += -v /var/log/swss:/var/log/swss:rw +$(DOCKER_ORCHAGENT)_RUN_OPT += -v /zmq_swss:/zmq_swss:rw $(DOCKER_ORCHAGENT)_BASE_IMAGE_FILES += swssloglevel:/usr/bin/swssloglevel $(DOCKER_ORCHAGENT)_FILES += $(ARP_UPDATE_SCRIPT) $(ARP_UPDATE_VARS_TEMPLATE) diff --git a/rules/docker-otel.mk b/rules/docker-otel.mk index d368e2135e9..5f3571db491 100644 --- a/rules/docker-otel.mk +++ b/rules/docker-otel.mk @@ -6,20 +6,20 @@ DOCKER_OTEL_DBG = $(DOCKER_OTEL_STEM)-$(DBG_IMAGE_MARK).gz $(DOCKER_OTEL)_PATH = $(DOCKERS_PATH)/$(DOCKER_OTEL_STEM) -$(DOCKER_OTEL)_DBG_DEPENDS = $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_DEPENDS) -$(DOCKER_OTEL)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_BOOKWORM) +$(DOCKER_OTEL)_DBG_DEPENDS = $($(DOCKER_CONFIG_ENGINE_TRIXIE)_DBG_DEPENDS) +$(DOCKER_OTEL)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_TRIXIE) $(DOCKER_OTEL)_VERSION = 1.0.0 $(DOCKER_OTEL)_PACKAGE_NAME = otel -$(DOCKER_OTEL)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_IMAGE_PACKAGES) +$(DOCKER_OTEL)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_TRIXIE)_DBG_IMAGE_PACKAGES) SONIC_DOCKER_IMAGES += $(DOCKER_OTEL) -SONIC_BOOKWORM_DOCKERS += $(DOCKER_OTEL) +SONIC_TRIXIE_DOCKERS += $(DOCKER_OTEL) ifeq ($(INCLUDE_SYSTEM_OTEL), y) SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_OTEL) endif SONIC_DOCKER_DBG_IMAGES += $(DOCKER_OTEL_DBG) -SONIC_BOOKWORM_DBG_DOCKERS += $(DOCKER_OTEL_DBG) +SONIC_TRIXIE_DBG_DOCKERS += $(DOCKER_OTEL_DBG) ifeq ($(INCLUDE_SYSTEM_OTEL), y) SONIC_INSTALL_DOCKER_DBG_IMAGES += $(DOCKER_OTEL_DBG) endif @@ -32,7 +32,6 @@ $(DOCKER_OTEL)_RUN_OPT += -v /:/mnt/host:ro $(DOCKER_OTEL)_RUN_OPT += -v /tmp:/mnt/host/tmp:rw $(DOCKER_OTEL)_RUN_OPT += -v /var/tmp:/mnt/host/var/tmp:rw $(DOCKER_OTEL)_RUN_OPT += --pid=host -$(DOCKER_OTEL)_RUN_OPT += --privileged $(DOCKER_OTEL)_RUN_OPT += --userns=host $(DOCKER_OTEL)_BASE_IMAGE_FILES += monit_otel:/etc/monit/conf.d diff --git a/rules/docker-p4rt.mk b/rules/docker-p4rt.mk index 552346f5403..592bf23eb59 100644 --- a/rules/docker-p4rt.mk +++ b/rules/docker-p4rt.mk @@ -7,12 +7,12 @@ DOCKER_P4RT_DBG = $(DOCKER_P4RT_STEM)-$(DBG_IMAGE_MARK).gz $(DOCKER_P4RT)_PATH = $(DOCKERS_PATH)/$(DOCKER_P4RT_STEM) $(DOCKER_P4RT)_DEPENDS += $(SONIC_P4RT) -$(DOCKER_P4RT)_DBG_DEPENDS = $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_DEPENDS) +$(DOCKER_P4RT)_DBG_DEPENDS = $($(DOCKER_CONFIG_ENGINE_TRIXIE)_DBG_DEPENDS) $(DOCKER_P4RT)_DBG_DEPENDS += $(SONIC_P4RT_DBG) $(LIBSWSSCOMMON_DBG) $(DOCKER_P4RT)_DBG_DEPENDS += $(LIBSAIREDIS_DBG) -$(DOCKER_P4RT)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_IMAGE_PACKAGES) +$(DOCKER_P4RT)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_TRIXIE)_DBG_IMAGE_PACKAGES) -$(DOCKER_P4RT)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_BOOKWORM) +$(DOCKER_P4RT)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_TRIXIE) $(DOCKER_P4RT)_VERSION = 1.0.0 $(DOCKER_P4RT)_PACKAGE_NAME = p4rt @@ -20,9 +20,9 @@ $(DOCKER_P4RT)_WARM_SHUTDOWN_BEFORE = swss $(DOCKER_P4RT)_FAST_SHUTDOWN_BEFORE = swss SONIC_DOCKER_IMAGES += $(DOCKER_P4RT) -SONIC_BOOKWORM_DOCKERS += $(DOCKER_P4RT) +SONIC_TRIXIE_DOCKERS += $(DOCKER_P4RT) SONIC_DOCKER_DBG_IMAGES += $(DOCKER_P4RT_DBG) -SONIC_BOOKWORM_DBG_DOCKERS += $(DOCKER_P4RT_DBG) +SONIC_TRIXIE_DBG_DOCKERS += $(DOCKER_P4RT_DBG) ifeq ($(INCLUDE_P4RT), y) SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_P4RT) @@ -33,5 +33,6 @@ $(DOCKER_P4RT)_CONTAINER_NAME = p4rt $(DOCKER_P4RT)_RUN_OPT += -t $(DOCKER_P4RT)_RUN_OPT += -v /etc/sonic:/etc/sonic:rw $(DOCKER_P4RT)_RUN_OPT += -v /etc/localtime:/etc/localtime:ro +$(DOCKER_P4RT)_RUN_OPT += -v /zmq_swss:/zmq_swss:rw $(DOCKER_P4RT)_GIT_COMMIT = $(shell cd "$($(SONIC_P4RT)_SRC_PATH)" && git log -n 1 --format=format:"%H %s" || echo "Unable to fetch git log for p4rt") diff --git a/rules/docker-platform-monitor.mk b/rules/docker-platform-monitor.mk index a1ccdaaadfe..af8ea7110bf 100644 --- a/rules/docker-platform-monitor.mk +++ b/rules/docker-platform-monitor.mk @@ -23,18 +23,19 @@ $(DOCKER_PLATFORM_MONITOR)_PYTHON_WHEELS += $(SONIC_XCVRD_PY3) $(DOCKER_PLATFORM_MONITOR)_PYTHON_WHEELS += $(SONIC_YCABLED_PY3) $(DOCKER_PLATFORM_MONITOR)_PYTHON_WHEELS += $(SONIC_CHASSISD_PY3) $(DOCKER_PLATFORM_MONITOR)_PYTHON_WHEELS += $(SONIC_STORMOND_PY3) +$(DOCKER_PLATFORM_MONITOR)_PYTHON_WHEELS += $(SONIC_BMCCTLD_PY3) ifeq ($(PDDF_SUPPORT),y) $(DOCKER_PLATFORM_MONITOR)_PYTHON_WHEELS += $(PDDF_PLATFORM_API_BASE_PY3) endif -$(DOCKER_PLATFORM_MONITOR)_DBG_DEPENDS = $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_DEPENDS) +$(DOCKER_PLATFORM_MONITOR)_DBG_DEPENDS = $($(DOCKER_CONFIG_ENGINE_TRIXIE)_DBG_DEPENDS) $(DOCKER_PLATFORM_MONITOR)_DBG_DEPENDS += $(LIBSWSSCOMMON_DBG) $(LIBSENSORS_DBG) $(DOCKER_PLATFORM_MONITOR)_DBG_DEPENDS += $(LM_SENSORS_DBG) $(SENSORD_DBG) -$(DOCKER_PLATFORM_MONITOR)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_IMAGE_PACKAGES) +$(DOCKER_PLATFORM_MONITOR)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_TRIXIE)_DBG_IMAGE_PACKAGES) -$(DOCKER_PLATFORM_MONITOR)_LOAD_DOCKERS = $(DOCKER_CONFIG_ENGINE_BOOKWORM) +$(DOCKER_PLATFORM_MONITOR)_LOAD_DOCKERS = $(DOCKER_CONFIG_ENGINE_TRIXIE) $(DOCKER_PLATFORM_MONITOR)_VERSION = 1.0.0 $(DOCKER_PLATFORM_MONITOR)_PACKAGE_NAME = pmon @@ -61,6 +62,11 @@ $(DOCKER_PLATFORM_MONITOR)_RUN_OPT += -v /var/lock/pddf-locks:/var/lock/pddf-loc # Add sysfs mounts for hardware access $(DOCKER_PLATFORM_MONITOR)_RUN_OPT += -v /sys/:/sys/:rw +# Add /dev/mem device access for BMC platforms (needed for devmem register access) +ifeq ($(CONFIGURED_PLATFORM),aspeed) +$(DOCKER_PLATFORM_MONITOR)_RUN_OPT += --device=/dev/mem:/dev/mem:rw +endif + # Mount Arista python library on Aboot images to be used by plugins $(DOCKER_PLATFORM_MONITOR)_aboot_RUN_OPT += -v /usr/lib/libsfp-eeprom.so:/usr/lib/libsfp-eeprom.so:ro $(DOCKER_PLATFORM_MONITOR)_aboot_RUN_OPT += -v /usr/lib/python3/dist-packages/arista:/usr/lib/python3/dist-packages/arista:ro @@ -70,5 +76,5 @@ $(DOCKER_PLATFORM_MONITOR)_BASE_IMAGE_FILES += cmd_wrapper:/usr/bin/sensors $(DOCKER_PLATFORM_MONITOR)_BASE_IMAGE_FILES += cmd_wrapper:/usr/sbin/iSmart $(DOCKER_PLATFORM_MONITOR)_BASE_IMAGE_FILES += cmd_wrapper:/usr/sbin/SmartCmd -SONIC_BOOKWORM_DOCKERS += $(DOCKER_PLATFORM_MONITOR) -SONIC_BOOKWORM_DBG_DOCKERS += $(DOCKER_PLATFORM_MONITOR_DBG) +SONIC_TRIXIE_DOCKERS += $(DOCKER_PLATFORM_MONITOR) +SONIC_TRIXIE_DBG_DOCKERS += $(DOCKER_PLATFORM_MONITOR_DBG) diff --git a/rules/docker-restapi-sidecar.mk b/rules/docker-restapi-sidecar.mk index 323aca659cb..9ded827aeb2 100644 --- a/rules/docker-restapi-sidecar.mk +++ b/rules/docker-restapi-sidecar.mk @@ -4,7 +4,7 @@ DOCKER_RESTAPI_SIDECAR_STEM = docker-restapi-sidecar DOCKER_RESTAPI_SIDECAR = $(DOCKER_RESTAPI_SIDECAR_STEM).gz DOCKER_RESTAPI_SIDECAR_DBG = $(DOCKER_RESTAPI_SIDECAR_STEM)-$(DBG_IMAGE_MARK).gz -$(DOCKER_RESTAPI_SIDECAR)_LOAD_DOCKERS = $(DOCKER_CONFIG_ENGINE_BOOKWORM) +$(DOCKER_RESTAPI_SIDECAR)_LOAD_DOCKERS = $(DOCKER_CONFIG_ENGINE_TRIXIE) $(DOCKER_RESTAPI_SIDECAR)_PATH = $(DOCKERS_PATH)/$(DOCKER_RESTAPI_SIDECAR_STEM) @@ -12,22 +12,16 @@ $(DOCKER_RESTAPI_SIDECAR)_VERSION = 1.0.0 $(DOCKER_RESTAPI_SIDECAR)_PACKAGE_NAME = restapi-sidecar SONIC_DOCKER_IMAGES += $(DOCKER_RESTAPI_SIDECAR) -SONIC_BOOKWORM_DOCKERS += $(DOCKER_RESTAPI_SIDECAR) +SONIC_TRIXIE_DOCKERS += $(DOCKER_RESTAPI_SIDECAR) SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_RESTAPI_SIDECAR) SONIC_DOCKER_DBG_IMAGES += $(DOCKER_RESTAPI_SIDECAR_DBG) -SONIC_BOOKWORM_DBG_DOCKERS += $(DOCKER_RESTAPI_SIDECAR_DBG) +SONIC_TRIXIE_DBG_DOCKERS += $(DOCKER_RESTAPI_SIDECAR_DBG) SONIC_INSTALL_DOCKER_DBG_IMAGES += $(DOCKER_RESTAPI_SIDECAR_DBG) -$(DOCKER_RESTAPI_SIDECAR)_DEPENDS += $(LIBSWSSCOMMON) - $(DOCKER_RESTAPI_SIDECAR)_INSTALL_PYTHON_WHEELS = $(SONIC_PY_COMMON_PY3) -$(DOCKER_RESTAPI_SIDECAR)_INSTALL_DEBS = $(LIBSWSSCOMMON) \ - $(PYTHON3_SWSSCOMMON) \ - $(LIBYANG_PY3) - $(DOCKER_RESTAPI_SIDECAR)_CONTAINER_NAME = restapi-sidecar # NOTE: This container must run in privileged mode with host PID namespace so that # nsenter can access host namespaces and systemd-related scripts/files can be @@ -42,10 +36,3 @@ $(DOCKER_RESTAPI_SIDECAR)_FILES += $(CONTAINER_CHECKER) $(DOCKER_RESTAPI_SIDECAR)_FILES += $(RESTAPI_SYSTEMD) $(DOCKER_RESTAPI_SIDECAR)_FILES += $(K8S_POD_CONTROL) -.PHONY: docker-restapi-sidecar-ut -docker-restapi-sidecar-ut: $(PYTHON_WHEELS_PATH)/sonic_py_common-1.0-py3-none-any.whl-install - @echo "Running unit tests for systemd_stub.py..." - @PYTHONPATH=dockers/docker-restapi-sidecar \ - python3 -m pytest -q dockers/docker-restapi-sidecar/cli-plugin-tests - -target/docker-restapi-sidecar.gz: docker-restapi-sidecar-ut diff --git a/rules/docker-restapi-watchdog.mk b/rules/docker-restapi-watchdog.mk index b8fd9a71d0c..6e088b98852 100644 --- a/rules/docker-restapi-watchdog.mk +++ b/rules/docker-restapi-watchdog.mk @@ -4,20 +4,20 @@ DOCKER_RESTAPI_WATCHDOG_STEM = docker-restapi-watchdog DOCKER_RESTAPI_WATCHDOG = $(DOCKER_RESTAPI_WATCHDOG_STEM).gz DOCKER_RESTAPI_WATCHDOG_DBG = $(DOCKER_RESTAPI_WATCHDOG_STEM)-$(DBG_IMAGE_MARK).gz -$(DOCKER_RESTAPI_WATCHDOG)_LOAD_DOCKERS = $(DOCKER_CONFIG_ENGINE_BOOKWORM) +$(DOCKER_RESTAPI_WATCHDOG)_LOAD_DOCKERS = $(DOCKER_CONFIG_ENGINE_TRIXIE) $(DOCKER_RESTAPI_WATCHDOG)_PATH = $(DOCKERS_PATH)/$(DOCKER_RESTAPI_WATCHDOG_STEM) $(DOCKER_RESTAPI_WATCHDOG)_VERSION = 1.0.0 $(DOCKER_RESTAPI_WATCHDOG)_PACKAGE_NAME = restapi_watchdog SONIC_DOCKER_IMAGES += $(DOCKER_RESTAPI_WATCHDOG) -SONIC_BOOKWORM_DOCKERS += $(DOCKER_RESTAPI_WATCHDOG) +SONIC_TRIXIE_DOCKERS += $(DOCKER_RESTAPI_WATCHDOG) ifeq ($(INCLUDE_RESTAPI), y) SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_RESTAPI_WATCHDOG) endif SONIC_DOCKER_DBG_IMAGES += $(DOCKER_RESTAPI_WATCHDOG_DBG) -SONIC_BOOKWORM_DBG_DOCKERS += $(DOCKER_RESTAPI_WATCHDOG_DBG) +SONIC_TRIXIE_DBG_DOCKERS += $(DOCKER_RESTAPI_WATCHDOG_DBG) ifeq ($(INCLUDE_RESTAPI), y) SONIC_INSTALL_DOCKER_DBG_IMAGES += $(DOCKER_RESTAPI_WATCHDOG_DBG) endif @@ -25,3 +25,4 @@ endif $(DOCKER_RESTAPI_WATCHDOG)_CONTAINER_NAME = restapi_watchdog $(DOCKER_RESTAPI_WATCHDOG)_RUN_OPT += -t $(DOCKER_RESTAPI_WATCHDOG)_RUN_OPT += -v /etc/localtime:/etc/localtime:ro +$(DOCKER_RESTAPI_WATCHDOG)_RUN_OPT += -v /etc/sonic/credentials:/etc/sonic/credentials:ro diff --git a/rules/docker-restapi.mk b/rules/docker-restapi.mk index 839aff04671..270ada66dc4 100644 --- a/rules/docker-restapi.mk +++ b/rules/docker-restapi.mk @@ -6,14 +6,14 @@ DOCKER_RESTAPI_DBG = $(DOCKER_RESTAPI_STEM)-$(DBG_IMAGE_MARK).gz $(DOCKER_RESTAPI)_DEPENDS += $(RESTAPI) -$(DOCKER_RESTAPI)_DBG_DEPENDS = $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_DEPENDS) +$(DOCKER_RESTAPI)_DBG_DEPENDS = $($(DOCKER_CONFIG_ENGINE_TRIXIE)_DBG_DEPENDS) $(DOCKER_RESTAPI)_DBG_DEPENDS += $(RESTAPI_DBG) -$(DOCKER_RESTAPI)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_IMAGE_PACKAGES) +$(DOCKER_RESTAPI)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_TRIXIE)_DBG_IMAGE_PACKAGES) $(DOCKER_RESTAPI)_PATH = $(DOCKERS_PATH)/$(DOCKER_RESTAPI_STEM) -$(DOCKER_RESTAPI)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_BOOKWORM) +$(DOCKER_RESTAPI)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_TRIXIE) $(DOCKER_RESTAPI)_VERSION = 1.0.0 $(DOCKER_RESTAPI)_PACKAGE_NAME = restapi @@ -33,5 +33,5 @@ $(DOCKER_RESTAPI)_RUN_OPT += -v /etc/sonic/credentials:/etc/sonic/credentials:ro $(DOCKER_RESTAPI)_RUN_OPT += -p=8081:8081/tcp -SONIC_BOOKWORM_DOCKERS += $(DOCKER_RESTAPI) -SONIC_BOOKWORM_DBG_DOCKERS += $(DOCKER_RESTAPI_DBG) +SONIC_TRIXIE_DOCKERS += $(DOCKER_RESTAPI) +SONIC_TRIXIE_DBG_DOCKERS += $(DOCKER_RESTAPI_DBG) diff --git a/rules/docker-router-advertiser.mk b/rules/docker-router-advertiser.mk index 84b961b1850..929c3aff409 100644 --- a/rules/docker-router-advertiser.mk +++ b/rules/docker-router-advertiser.mk @@ -6,11 +6,11 @@ DOCKER_ROUTER_ADVERTISER_DBG = $(DOCKER_ROUTER_ADVERTISER_STEM)-$(DBG_IMAGE_MARK $(DOCKER_ROUTER_ADVERTISER)_PATH = $(DOCKERS_PATH)/$(DOCKER_ROUTER_ADVERTISER_STEM) -$(DOCKER_ROUTER_ADVERTISER)_DBG_DEPENDS = $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_DEPENDS) +$(DOCKER_ROUTER_ADVERTISER)_DBG_DEPENDS = $($(DOCKER_CONFIG_ENGINE_TRIXIE)_DBG_DEPENDS) -$(DOCKER_ROUTER_ADVERTISER)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_IMAGE_PACKAGES) +$(DOCKER_ROUTER_ADVERTISER)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_TRIXIE)_DBG_IMAGE_PACKAGES) -$(DOCKER_ROUTER_ADVERTISER)_LOAD_DOCKERS = $(DOCKER_CONFIG_ENGINE_BOOKWORM) +$(DOCKER_ROUTER_ADVERTISER)_LOAD_DOCKERS = $(DOCKER_CONFIG_ENGINE_TRIXIE) $(DOCKER_ROUTER_ADVERTISER)_VERSION = 1.0.0 $(DOCKER_ROUTER_ADVERTISER)_PACKAGE_NAME = radv @@ -27,8 +27,8 @@ ifeq ($(INCLUDE_ROUTER_ADVERTISER), y) SONIC_INSTALL_DOCKER_DBG_IMAGES += $(DOCKER_ROUTER_ADVERTISER_DBG) endif -SONIC_BOOKWORM_DOCKERS += $(DOCKER_ROUTER_ADVERTISER) -SONIC_BOOKWORM_DBG_DOCKERS += $(DOCKER_ROUTER_ADVERTISER_DBG) +SONIC_TRIXIE_DOCKERS += $(DOCKER_ROUTER_ADVERTISER) +SONIC_TRIXIE_DBG_DOCKERS += $(DOCKER_ROUTER_ADVERTISER_DBG) $(DOCKER_ROUTER_ADVERTISER)_CONTAINER_NAME = radv $(DOCKER_ROUTER_ADVERTISER)_RUN_OPT += -t diff --git a/rules/docker-sflow.mk b/rules/docker-sflow.mk index 272fda5109a..04d604a4123 100644 --- a/rules/docker-sflow.mk +++ b/rules/docker-sflow.mk @@ -7,12 +7,12 @@ DOCKER_SFLOW_DBG = $(DOCKER_SFLOW_STEM)-$(DBG_IMAGE_MARK).gz $(DOCKER_SFLOW)_PATH = $(DOCKERS_PATH)/$(DOCKER_SFLOW_STEM) $(DOCKER_SFLOW)_DEPENDS += $(SWSS) $(HSFLOWD) $(SFLOWTOOL) $(PSAMPLE) -$(DOCKER_SFLOW)_DBG_DEPENDS = $($(DOCKER_SWSS_LAYER_BOOKWORM)_DBG_DEPENDS) +$(DOCKER_SFLOW)_DBG_DEPENDS = $($(DOCKER_SWSS_LAYER_TRIXIE)_DBG_DEPENDS) $(DOCKER_SFLOW)_DBG_DEPENDS += $(HSFLOWD_DBG) $(DOCKER_TEAMD)_DBG_DEPENDS += $(SWSS_DBG) $(LIBSWSSCOMMON_DBG) -$(DOCKER_SFLOW)_DBG_IMAGE_PACKAGES = $($(DOCKER_SWSS_LAYER_BOOKWORM)_DBG_IMAGE_PACKAGES) +$(DOCKER_SFLOW)_DBG_IMAGE_PACKAGES = $($(DOCKER_SWSS_LAYER_TRIXIE)_DBG_IMAGE_PACKAGES) -$(DOCKER_SFLOW)_LOAD_DOCKERS += $(DOCKER_SWSS_LAYER_BOOKWORM) +$(DOCKER_SFLOW)_LOAD_DOCKERS += $(DOCKER_SWSS_LAYER_TRIXIE) $(DOCKER_SFLOW)_VERSION = 1.0.0 $(DOCKER_SFLOW)_PACKAGE_NAME = sflow @@ -33,10 +33,9 @@ $(DOCKER_SFLOW)_CONTAINER_NAME = sflow $(DOCKER_SFLOW)_RUN_OPT += -t --cap-add=NET_ADMIN --cap-add=SYS_ADMIN $(DOCKER_SFLOW)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro $(DOCKER_SFLOW)_RUN_OPT += -v /etc/localtime:/etc/localtime:ro -$(DOCKER_SFLOW)_RUN_OPT += -v /host/warmboot:/var/warmboot $(DOCKER_SFLOW)_BASE_IMAGE_FILES += psample:/usr/bin/psample $(DOCKER_SFLOW)_BASE_IMAGE_FILES += sflowtool:/usr/bin/sflowtool -SONIC_BOOKWORM_DOCKERS += $(DOCKER_SFLOW) -SONIC_BOOKWORM_DBG_DOCKERS += $(DOCKER_SFLOW_DBG) +SONIC_TRIXIE_DOCKERS += $(DOCKER_SFLOW) +SONIC_TRIXIE_DBG_DOCKERS += $(DOCKER_SFLOW_DBG) diff --git a/rules/docker-snmp.mk b/rules/docker-snmp.mk index c83554145b9..8fb88259098 100644 --- a/rules/docker-snmp.mk +++ b/rules/docker-snmp.mk @@ -9,29 +9,33 @@ $(DOCKER_SNMP)_PATH = $(DOCKERS_PATH)/docker-snmp ## TODO: remove LIBPY3_DEV if we can get pip3 directly $(DOCKER_SNMP)_DEPENDS += $(SNMP) $(SNMPD) -$(DOCKER_SNMP)_DBG_DEPENDS = $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_DEPENDS) +$(DOCKER_SNMP)_DBG_DEPENDS = $($(DOCKER_CONFIG_ENGINE_TRIXIE)_DBG_DEPENDS) $(DOCKER_SNMP)_DBG_DEPENDS += $(SNMP_DBG) $(SNMPD_DBG) $(LIBSNMP_DBG) $(DOCKER_SNMP)_DBG_DEPENDS += $(LIBSWSSCOMMON) $(PYTHON3_SWSSCOMMON) -$(DOCKER_SNMP)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_IMAGE_PACKAGES) +$(DOCKER_SNMP)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_TRIXIE)_DBG_IMAGE_PACKAGES) $(DOCKER_SNMP)_PYTHON_WHEELS += $(SONIC_PY_COMMON_PY3) $(SONIC_PLATFORM_COMMON_PY3) $(ASYNCSNMP_PY3) -$(DOCKER_SNMP)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_BOOKWORM) +$(DOCKER_SNMP)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_TRIXIE) $(DOCKER_SNMP)_VERSION = 1.0.0 $(DOCKER_SNMP)_PACKAGE_NAME = snmp SONIC_DOCKER_IMAGES += $(DOCKER_SNMP) +ifeq ($(INCLUDE_SNMP), y) SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_SNMP) +endif SONIC_DOCKER_DBG_IMAGES += $(DOCKER_SNMP_DBG) +ifeq ($(INCLUDE_SNMP), y) SONIC_INSTALL_DOCKER_DBG_IMAGES += $(DOCKER_SNMP_DBG) +endif $(DOCKER_SNMP)_CONTAINER_NAME = snmp $(DOCKER_SNMP)_RUN_OPT += -t $(DOCKER_SNMP)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro -$(DOCKER_SNMP)_RUN_OPT += -v /etc/localtime:/etc/localtime:ro +$(DOCKER_SNMP)_RUN_OPT += -v /etc/localtime:/etc/localtime:ro $(DOCKER_SNMP)_BASE_IMAGE_FILES += monit_snmp:/etc/monit/conf.d -SONIC_BOOKWORM_DOCKERS += $(DOCKER_SNMP) -SONIC_BOOKWORM_DBG_DOCKERS += $(DOCKER_SNMP_DBG) +SONIC_TRIXIE_DOCKERS += $(DOCKER_SNMP) +SONIC_TRIXIE_DBG_DOCKERS += $(DOCKER_SNMP_DBG) diff --git a/rules/docker-sonic-mgmt-framework.mk b/rules/docker-sonic-mgmt-framework.mk index b61716bb8f6..146f6adb82a 100644 --- a/rules/docker-sonic-mgmt-framework.mk +++ b/rules/docker-sonic-mgmt-framework.mk @@ -8,16 +8,16 @@ $(DOCKER_MGMT_FRAMEWORK)_PATH = $(DOCKERS_PATH)/$(DOCKER_MGMT_FRAMEWORK_STEM) $(DOCKER_MGMT_FRAMEWORK)_DEPENDS += $(SONIC_MGMT_COMMON) $(DOCKER_MGMT_FRAMEWORK)_DEPENDS += $(SONIC_MGMT_FRAMEWORK) -$(DOCKER_MGMT_FRAMEWORK)_DBG_DEPENDS = $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_DEPENDS) +$(DOCKER_MGMT_FRAMEWORK)_DBG_DEPENDS = $($(DOCKER_CONFIG_ENGINE_TRIXIE)_DBG_DEPENDS) $(DOCKER_MGMT_FRAMEWORK)_DBG_DEPENDS += $(SONIC_MGMT_FRAMEWORK_DBG) SONIC_DOCKER_IMAGES += $(DOCKER_MGMT_FRAMEWORK) -$(DOCKER_MGMT_FRAMEWORK)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_BOOKWORM) +$(DOCKER_MGMT_FRAMEWORK)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_TRIXIE) $(DOCKER_MGMT_FRAMEWORK)_VERSION = 1.0.0 $(DOCKER_MGMT_FRAMEWORK)_PACKAGE_NAME = mgmt-framework -$(DOCKER_MGMT_FRAMEWORK)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_IMAGE_PACKAGES) +$(DOCKER_MGMT_FRAMEWORK)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_TRIXIE)_DBG_IMAGE_PACKAGES) ifeq ($(INCLUDE_MGMT_FRAMEWORK), y) SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_MGMT_FRAMEWORK) @@ -38,5 +38,5 @@ $(DOCKER_MGMT_FRAMEWORK)_RUN_OPT += --mount type=bind,source="/var/platform/",ta $(DOCKER_MGMT_FRAMEWORK)_BASE_IMAGE_FILES += sonic-cli:/usr/bin/sonic-cli -SONIC_BOOKWORM_DOCKERS += $(DOCKER_MGMT_FRAMEWORK) -SONIC_BOOKWORM_DBG_DOCKERS += $(DOCKER_MGMT_FRAMEWORK_DBG) +SONIC_TRIXIE_DOCKERS += $(DOCKER_MGMT_FRAMEWORK) +SONIC_TRIXIE_DBG_DOCKERS += $(DOCKER_MGMT_FRAMEWORK_DBG) diff --git a/rules/docker-sonic-redfish.mk b/rules/docker-sonic-redfish.mk new file mode 100644 index 00000000000..1bb7d01ae2e --- /dev/null +++ b/rules/docker-sonic-redfish.mk @@ -0,0 +1,31 @@ +# docker image for sonic-redfish (bmcweb + sonic-dbus-bridge) + +DOCKER_SONIC_REDFISH_STEM = docker-sonic-redfish +DOCKER_SONIC_REDFISH = $(DOCKER_SONIC_REDFISH_STEM).gz +DOCKER_SONIC_REDFISH_DBG = $(DOCKER_SONIC_REDFISH_STEM)-$(DBG_IMAGE_MARK).gz + +$(DOCKER_SONIC_REDFISH)_PATH = $(DOCKERS_PATH)/$(DOCKER_SONIC_REDFISH_STEM) + +$(DOCKER_SONIC_REDFISH)_DEPENDS += $(BMCWEB) $(SONIC_DBUS_BRIDGE) +$(DOCKER_SONIC_REDFISH)_DBG_DEPENDS = $($(DOCKER_SONIC_REDFISH)_DEPENDS) + +$(DOCKER_SONIC_REDFISH)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_TRIXIE) + +$(DOCKER_SONIC_REDFISH)_VERSION = 1.0.0 +$(DOCKER_SONIC_REDFISH)_PACKAGE_NAME = redfish + +SONIC_DOCKER_IMAGES += $(DOCKER_SONIC_REDFISH) +SONIC_TRIXIE_DOCKERS += $(DOCKER_SONIC_REDFISH) + +SONIC_DOCKER_DBG_IMAGES += $(DOCKER_SONIC_REDFISH_DBG) +SONIC_TRIXIE_DBG_DOCKERS += $(DOCKER_SONIC_REDFISH_DBG) + +$(DOCKER_SONIC_REDFISH)_CONTAINER_NAME = redfish +$(DOCKER_SONIC_REDFISH)_RUN_OPT += -t +$(DOCKER_SONIC_REDFISH)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro +$(DOCKER_SONIC_REDFISH)_RUN_OPT += -v /host/machine.conf:/host/machine.conf:ro +$(DOCKER_SONIC_REDFISH)_RUN_OPT += -v /var/lib/bmcweb:/var/lib/bmcweb:rw +$(DOCKER_SONIC_REDFISH)_RUN_OPT += -v /var/run/redis:/var/run/redis:rw +$(DOCKER_SONIC_REDFISH)_RUN_OPT += -v /var/run/dbus:/var/run/dbus:rw +$(DOCKER_SONIC_REDFISH)_RUN_OPT += -p 0.0.0.0:443:18080 + diff --git a/rules/docker-stp.mk b/rules/docker-stp.mk index b16ac2fe312..bd7514ad37c 100644 --- a/rules/docker-stp.mk +++ b/rules/docker-stp.mk @@ -7,12 +7,12 @@ DOCKER_STP_DBG = $(DOCKER_STP_STEM)-$(DBG_IMAGE_MARK).gz $(DOCKER_STP)_PATH = $(DOCKERS_PATH)/$(DOCKER_STP_STEM) $(DOCKER_STP)_DEPENDS += $(STP) $(SWSS) $(SONIC_RSYSLOG_PLUGIN) -$(DOCKER_STP)_DBG_DEPENDS = $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_DEPENDS) +$(DOCKER_STP)_DBG_DEPENDS = $($(DOCKER_CONFIG_ENGINE_TRIXIE)_DBG_DEPENDS) $(DOCKER_STP)_DBG_DEPENDS += $(STP) $(SWSS) $(SONIC_RSYSLOG_PLUGIN) -$(DOCKER_STP)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_IMAGE_PACKAGES) +$(DOCKER_STP)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_TRIXIE)_DBG_IMAGE_PACKAGES) -$(DOCKER_STP)_LOAD_DOCKERS = $(DOCKER_CONFIG_ENGINE_BOOKWORM) +$(DOCKER_STP)_LOAD_DOCKERS = $(DOCKER_CONFIG_ENGINE_TRIXIE) $(DOCKER_STP)_VERSION = 1.0.0 $(DOCKER_STP)_PACKAGE_NAME = stp @@ -27,7 +27,7 @@ SONIC_DOCKER_DBG_IMAGES += $(DOCKER_STP_DBG) SONIC_INSTALL_DOCKER_DBG_IMAGES += $(DOCKER_STP_DBG) endif -$(DOCKER_STP)_LOAD_DOCKERS = $(DOCKER_CONFIG_ENGINE_BOOKWORM) +$(DOCKER_STP)_LOAD_DOCKERS = $(DOCKER_CONFIG_ENGINE_TRIXIE) $(DOCKER_STP)_CONTAINER_NAME = stp $(DOCKER_STP)_RUN_OPT += -t --cap-add=NET_ADMIN --cap-add=SYS_ADMIN @@ -35,5 +35,5 @@ $(DOCKER_STP)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro $(DOCKER_STP)_BASE_IMAGE_FILES += stpctl:/usr/bin/stpctl -SONIC_BOOKWORM_DOCKERS += $(DOCKER_STP) -SONIC_BOOKWORM_DBG_DOCKERS += $(DOCKER_STP_DBG) +SONIC_TRIXIE_DOCKERS += $(DOCKER_STP) +SONIC_TRIXIE_DBG_DOCKERS += $(DOCKER_STP_DBG) diff --git a/rules/docker-sysmgr.mk b/rules/docker-sysmgr.mk index b1c59204057..9cbf29154d7 100644 --- a/rules/docker-sysmgr.mk +++ b/rules/docker-sysmgr.mk @@ -7,12 +7,12 @@ DOCKER_SYSMGR_DBG = $(DOCKER_SYSMGR_STEM)-$(DBG_IMAGE_MARK).gz $(DOCKER_SYSMGR)_PATH = $(DOCKERS_PATH)/$(DOCKER_SYSMGR_STEM) $(DOCKER_SYSMGR)_DEPENDS += $(SYSMGR) -$(DOCKER_SYSMGR)_DBG_DEPENDS = $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_DEPENDS) +$(DOCKER_SYSMGR)_DBG_DEPENDS = $($(DOCKER_CONFIG_ENGINE_TRIXIE)_DBG_DEPENDS) $(DOCKER_SYSMGR)_DBG_DEPENDS += $(SYSMGR_DBG) $(LIBSWSSCOMMON_DBG) -$(DOCKER_SYSMGR)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_DBG_IMAGE_PACKAGES) +$(DOCKER_SYSMGR)_DBG_IMAGE_PACKAGES = $($(DOCKER_CONFIG_ENGINE_TRIXIE)_DBG_IMAGE_PACKAGES) -$(DOCKER_SYSMGR)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_BOOKWORM) -$(DOCKER_SYSMGR)_LOAD_DOCKERS += $($(DOCKER_CONFIG_ENGINE_BOOKWORM)_LOAD_DOCKERS) +$(DOCKER_SYSMGR)_LOAD_DOCKERS += $(DOCKER_CONFIG_ENGINE_TRIXIE) +$(DOCKER_SYSMGR)_LOAD_DOCKERS += $($(DOCKER_CONFIG_ENGINE_TRIXIE)_LOAD_DOCKERS) $(DOCKER_SYSMGR)_VERSION = 1.0.0 $(DOCKER_SYSMGR)_PACKAGE_NAME = sysmgr @@ -30,5 +30,5 @@ $(DOCKER_SYSMGR)_GIT_REPOSITORIES += "sonic-swss" $(DOCKER_SYSMGR)_GIT_REPOSITORIES += "sonic-swss-common" -SONIC_BOOKWORM_DOCKERS += $(DOCKER_SYSMGR) -SONIC_BOOKWORM_DBG_DOCKERS += $(DOCKER_SYSMGR_DBG) +SONIC_TRIXIE_DOCKERS += $(DOCKER_SYSMGR) +SONIC_TRIXIE_DBG_DOCKERS += $(DOCKER_SYSMGR_DBG) diff --git a/rules/docker-teamd.mk b/rules/docker-teamd.mk index e0af8f1f2be..3fda5bb65fe 100644 --- a/rules/docker-teamd.mk +++ b/rules/docker-teamd.mk @@ -7,12 +7,12 @@ DOCKER_TEAMD_DBG = $(DOCKER_TEAMD_STEM)-$(DBG_IMAGE_MARK).gz $(DOCKER_TEAMD)_PATH = $(DOCKERS_PATH)/$(DOCKER_TEAMD_STEM) $(DOCKER_TEAMD)_DEPENDS += $(LIBTEAMDCTL) $(LIBTEAM_UTILS) -$(DOCKER_TEAMD)_DBG_DEPENDS = $($(DOCKER_SWSS_LAYER_BOOKWORM)_DBG_DEPENDS) +$(DOCKER_TEAMD)_DBG_DEPENDS = $($(DOCKER_SWSS_LAYER_TRIXIE)_DBG_DEPENDS) $(DOCKER_TEAMD)_DBG_DEPENDS += $(LIBTEAMDCTL_DBG) $(LIBTEAM_UTILS_DBG) -$(DOCKER_TEAMD)_DBG_IMAGE_PACKAGES = $($(DOCKER_SWSS_LAYER_BOOKWORM)_DBG_IMAGE_PACKAGES) +$(DOCKER_TEAMD)_DBG_IMAGE_PACKAGES = $($(DOCKER_SWSS_LAYER_TRIXIE)_DBG_IMAGE_PACKAGES) -$(DOCKER_TEAMD)_LOAD_DOCKERS += $(DOCKER_SWSS_LAYER_BOOKWORM) +$(DOCKER_TEAMD)_LOAD_DOCKERS += $(DOCKER_SWSS_LAYER_TRIXIE) $(DOCKER_TEAMD)_VERSION = 1.0.0 $(DOCKER_TEAMD)_PACKAGE_NAME = teamd @@ -33,11 +33,13 @@ endif $(DOCKER_TEAMD)_CONTAINER_NAME = teamd $(DOCKER_TEAMD)_RUN_OPT += -t --cap-add=NET_ADMIN +ifeq ($(ENABLE_ASAN), y) +$(DOCKER_TEAMD)_RUN_OPT += --cap-add=SYS_PTRACE +endif $(DOCKER_TEAMD)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro $(DOCKER_TEAMD)_RUN_OPT += -v /etc/localtime:/etc/localtime:ro -$(DOCKER_TEAMD)_RUN_OPT += -v /host/warmboot:/var/warmboot $(DOCKER_TEAMD)_BASE_IMAGE_FILES += teamdctl:/usr/bin/teamdctl -SONIC_BOOKWORM_DOCKERS += $(DOCKER_TEAMD) -SONIC_BOOKWORM_DBG_DOCKERS += $(DOCKER_TEAMD_DBG) +SONIC_TRIXIE_DOCKERS += $(DOCKER_TEAMD) +SONIC_TRIXIE_DBG_DOCKERS += $(DOCKER_TEAMD_DBG) diff --git a/rules/docker-telemetry-sidecar.mk b/rules/docker-telemetry-sidecar.mk index 85660878f7f..70f95b967f7 100644 --- a/rules/docker-telemetry-sidecar.mk +++ b/rules/docker-telemetry-sidecar.mk @@ -4,7 +4,7 @@ DOCKER_TELEMETRY_SIDECAR_STEM = docker-telemetry-sidecar DOCKER_TELEMETRY_SIDECAR = $(DOCKER_TELEMETRY_SIDECAR_STEM).gz DOCKER_TELEMETRY_SIDECAR_DBG = $(DOCKER_TELEMETRY_SIDECAR_STEM)-$(DBG_IMAGE_MARK).gz -$(DOCKER_TELEMETRY_SIDECAR)_LOAD_DOCKERS = $(DOCKER_CONFIG_ENGINE_BOOKWORM) +$(DOCKER_TELEMETRY_SIDECAR)_LOAD_DOCKERS = $(DOCKER_CONFIG_ENGINE_TRIXIE) $(DOCKER_TELEMETRY_SIDECAR)_PATH = $(DOCKERS_PATH)/$(DOCKER_TELEMETRY_SIDECAR_STEM) @@ -12,30 +12,25 @@ $(DOCKER_TELEMETRY_SIDECAR)_VERSION = 1.0.0 $(DOCKER_TELEMETRY_SIDECAR)_PACKAGE_NAME = telemetry-sidecar SONIC_DOCKER_IMAGES += $(DOCKER_TELEMETRY_SIDECAR) -SONIC_BOOKWORM_DOCKERS += $(DOCKER_TELEMETRY_SIDECAR) -SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_TELEMETRY_SIDECAR) +SONIC_TRIXIE_DOCKERS += $(DOCKER_TELEMETRY_SIDECAR) SONIC_DOCKER_DBG_IMAGES += $(DOCKER_TELEMETRY_SIDECAR_DBG) -SONIC_BOOKWORM_DBG_DOCKERS += $(DOCKER_TELEMETRY_SIDECAR_DBG) -SONIC_INSTALL_DOCKER_DBG_IMAGES += $(DOCKER_TELEMETRY_SIDECAR_DBG) - +SONIC_TRIXIE_DBG_DOCKERS += $(DOCKER_TELEMETRY_SIDECAR_DBG) $(DOCKER_TELEMETRY_SIDECAR)_DEPENDS += $(LIBSWSSCOMMON) +$(DOCKER_TELEMETRY_SIDECAR)_PYTHON_WHEELS += $(SONIC_PY_COMMON_PY3) + $(DOCKER_TELEMETRY_SIDECAR)_INSTALL_PYTHON_WHEELS = $(SONIC_PY_COMMON_PY3) $(DOCKER_TELEMETRY_SIDECAR)_INSTALL_DEBS = $(LIBSWSSCOMMON) \ $(PYTHON3_SWSSCOMMON) \ - $(LIBYANG_PY3) + $(LIBYANG3_PY3) $(DOCKER_TELEMETRY_SIDECAR)_CONTAINER_NAME = telemetry-sidecar -$(DOCKER_TELEMETRY_SIDECAR)_RUN_OPT += -t --privileged --pid=host -$(DOCKER_TELEMETRY_SIDECAR)_RUN_OPT += -v /lib/systemd/system:/lib/systemd/system:rw -$(DOCKER_TELEMETRY_SIDECAR)_RUN_OPT += -v /etc/audit:/etc/audit:rw -$(DOCKER_TELEMETRY_SIDECAR)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro -$(DOCKER_TELEMETRY_SIDECAR)_RUN_OPT += -v /etc/localtime:/etc/localtime:ro $(DOCKER_TELEMETRY_SIDECAR)_FILES += $(CONTAINER_CHECKER) +$(DOCKER_TELEMETRY_SIDECAR)_FILES += $(SERVICE_CHECKER_PY) $(DOCKER_TELEMETRY_SIDECAR)_FILES += $(TELEMETRY_SYSTEMD) $(DOCKER_TELEMETRY_SIDECAR)_FILES += $(K8S_POD_CONTROL) diff --git a/rules/docker-telemetry-watchdog.mk b/rules/docker-telemetry-watchdog.mk index 4f22e2ca63f..9d5d1092817 100644 --- a/rules/docker-telemetry-watchdog.mk +++ b/rules/docker-telemetry-watchdog.mk @@ -12,16 +12,10 @@ $(DOCKER_TELEMETRY_WATCHDOG)_VERSION = 1.0.0 $(DOCKER_TELEMETRY_WATCHDOG)_PACKAGE_NAME = telemetry_watchdog SONIC_DOCKER_IMAGES += $(DOCKER_TELEMETRY_WATCHDOG) -SONIC_BOOKWORM_DOCKERS += $(DOCKER_TELEMETRY_WATCHDOG) -SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_TELEMETRY_WATCHDOG) +SONIC_TRIXIE_DOCKERS += $(DOCKER_TELEMETRY_WATCHDOG) SONIC_DOCKER_DBG_IMAGES += $(DOCKER_TELEMETRY_WATCHDOG_DBG) -SONIC_BOOKWORM_DBG_DOCKERS += $(DOCKER_TELEMETRY_WATCHDOG_DBG) -SONIC_INSTALL_DOCKER_DBG_IMAGES += $(DOCKER_TELEMETRY_WATCHDOG_DBG) +SONIC_TRIXIE_DBG_DOCKERS += $(DOCKER_TELEMETRY_WATCHDOG_DBG) $(DOCKER_TELEMETRY_WATCHDOG)_CONTAINER_NAME = telemetry_watchdog -$(DOCKER_TELEMETRY_WATCHDOG)_RUN_OPT += -t --privileged --pid=host -$(DOCKER_TELEMETRY_WATCHDOG)_RUN_OPT += -v /lib/systemd/system:/lib/systemd/system:rw -$(DOCKER_TELEMETRY_WATCHDOG)_RUN_OPT += -v /etc/sonic:/etc/sonic:ro -$(DOCKER_TELEMETRY_WATCHDOG)_RUN_OPT += -v /etc/localtime:/etc/localtime:ro diff --git a/rules/docker-telemetry.mk b/rules/docker-telemetry.mk index 5869f7885b9..b83ad981219 100644 --- a/rules/docker-telemetry.mk +++ b/rules/docker-telemetry.mk @@ -16,13 +16,13 @@ $(DOCKER_TELEMETRY)_PACKAGE_NAME = telemetry $(DOCKER_TELEMETRY)_DBG_IMAGE_PACKAGES = $($(DOCKER_GNMI)_DBG_IMAGE_PACKAGES) SONIC_DOCKER_IMAGES += $(DOCKER_TELEMETRY) -SONIC_BOOKWORM_DOCKERS += $(DOCKER_TELEMETRY) +SONIC_TRIXIE_DOCKERS += $(DOCKER_TELEMETRY) ifeq ($(INCLUDE_SYSTEM_TELEMETRY), y) SONIC_INSTALL_DOCKER_IMAGES += $(DOCKER_TELEMETRY) endif SONIC_DOCKER_DBG_IMAGES += $(DOCKER_TELEMETRY_DBG) -SONIC_BOOKWORM_DBG_DOCKERS += $(DOCKER_TELEMETRY_DBG) +SONIC_TRIXIE_DBG_DOCKERS += $(DOCKER_TELEMETRY_DBG) ifeq ($(INCLUDE_SYSTEM_TELEMETRY), y) SONIC_INSTALL_DOCKER_DBG_IMAGES += $(DOCKER_TELEMETRY_DBG) endif diff --git a/rules/frr.mk b/rules/frr.mk index 9bf5eefec0d..8acc579f833 100644 --- a/rules/frr.mk +++ b/rules/frr.mk @@ -1,29 +1,32 @@ # FRRouting (frr) package -FRR_VERSION = 10.4.1 +FRR_VERSION = 10.5.4 FRR_SUBVERSION = 0 -FRR_BRANCH = frr-10.4.1 -FRR_TAG = frr-10.4.1 -export FRR_VERSION FRR_SUBVERSION FRR_BRANCH FRR_TAG - +FRR_TAG = frr-$(FRR_VERSION) +export FRR_VERSION FRR_SUBVERSION FRR_TAG FRR = frr_$(FRR_VERSION)-sonic-$(FRR_SUBVERSION)_$(CONFIGURED_ARCH).deb -$(FRR)_DEPENDS += $(LIBSNMP_DEV) $(LIBYANG3_DEV) -$(FRR)_RDEPENDS += $(LIBYANG3) +$(FRR)_DEPENDS += $(LIBSNMP_DEV) $(LIBYANG3_DEV) $(LIBFIB_DEV) +$(FRR)_RDEPENDS += $(LIBYANG3) $(LIBFIB) $(FRR)_SRC_PATH = $(SRC_PATH)/sonic-frr SONIC_MAKE_DEBS += $(FRR) +export ENABLE_FRR_TCMALLOC +export ENABLE_FRR_SNMP_AGENT + FRR_PYTHONTOOLS = frr-pythontools_$(FRR_VERSION)-sonic-$(FRR_SUBVERSION)_all.deb $(eval $(call add_extra_package,$(FRR),$(FRR_PYTHONTOOLS))) FRR_DBG = frr-dbgsym_$(FRR_VERSION)-sonic-$(FRR_SUBVERSION)_$(CONFIGURED_ARCH).deb $(eval $(call add_extra_package,$(FRR),$(FRR_DBG))) +ifeq ($(ENABLE_FRR_SNMP_AGENT),y) FRR_SNMP = frr-snmp_$(FRR_VERSION)-sonic-$(FRR_SUBVERSION)_$(CONFIGURED_ARCH).deb $(eval $(call add_extra_package,$(FRR),$(FRR_SNMP))) FRR_SNMP_DBG = frr-snmp-dbgsym_$(FRR_VERSION)-sonic-$(FRR_SUBVERSION)_$(CONFIGURED_ARCH).deb $(eval $(call add_extra_package,$(FRR),$(FRR_SNMP_DBG))) +endif export FRR FRR_PYTHONTOOLS FRR_DBG FRR_SNMP FRR_SNMP_DBG diff --git a/rules/functions b/rules/functions index 44a6af3ddcf..fd863e64c4a 100644 --- a/rules/functions +++ b/rules/functions @@ -143,6 +143,36 @@ SONIC_DBG_DOCKERS += $(2) endef +############################################################################### +## Definition of docker feature composition +############################################################################### + +# Merge a feature docker's components into a target docker. +# This automatically includes the feature's DEPENDS, PYTHON_WHEELS, and FILES, +# and records it for runtime merging of supervisord/start.sh/Dockerfile snippets. +# +# call: +# add_docker_feature target_docker.gz, FEATURE_NAME, source_docker.gz +define add_docker_feature +$(1)_DEPENDS += $$($(3)_DEPENDS) +$(1)_PYTHON_WHEELS += $$($(3)_PYTHON_WHEELS) +$(1)_FILES += $$($(3)_FILES) +$(1)_DOCKERS += $(3) +$(1)_DOCKER_FEATURES += $(2) +$(1)_DOCKER_FEATURE_$(2)_PATH = $$($(3)_PATH) +$(1)_BUILD_CONTEXTS += --build-context $(2)=$$($(3)_PATH) +$(1)_J2_INCLUDE_PATHS += -I $$(dir $$($(3)_PATH)) +endef + +# Process _INCLUDE_DOCKER list: automatically call add_docker_feature for each entry. +# Usage in .mk: $(DOCKER_FOO)_INCLUDE_DOCKER += $(DOCKER_LLDP) +# Feature name is derived from docker name: docker-lldp.gz → lldp +# Must be called after all docker .mk files are loaded (see slave.mk). +define process_include_dockers +$(foreach docker,$($(1)_INCLUDE_DOCKER),\ + $(eval $(call add_docker_feature,$(1),$(patsubst docker-%.gz,%,$(docker)),$(docker)))) +endef + ############################################################################### ## Utility functions ############################################################################### @@ -156,11 +186,7 @@ expand = $(foreach d,$(1),$(call expand,$($(d)_$(2)),$(2))) $(1) ############################################################################### define UNINSTALL_DEBS if [ -n "$(1)" ]; then \ - while true; do \ - if mkdir $(DEBS_PATH)/dpkg_lock &> /dev/null; then \ - { sudo DEBIAN_FRONTEND=noninteractive dpkg -P $(foreach deb,$(1),$(firstword $(subst _, ,$(basename $(deb))))) $(LOG) && rm -d $(DEBS_PATH)/dpkg_lock && break; } || { rm -d $(DEBS_PATH)/dpkg_lock && exit 1 ; } \ - fi; \ - done; \ + flock $(DEBS_PATH)/dpkg_lock.lk sudo DEBIAN_FRONTEND=noninteractive dpkg -P $(foreach deb,$(1),$(firstword $(subst _, ,$(basename $(deb))))) $(LOG) ; \ fi endef diff --git a/rules/ifupdown2.mk b/rules/ifupdown2.mk index 0a7abd7b2f1..4a494209441 100644 --- a/rules/ifupdown2.mk +++ b/rules/ifupdown2.mk @@ -1,7 +1,8 @@ # ifupdown2 package IFUPDOWN2_VERSION = 3.0.0-1 -export IFUPDOWN2_VERSION +IFUPDOWN2_SHA256 = 55ded1c60f720c81a5d4b5feeb48d893fd3f29d4ad0fe7d9cec508fe84b5f1b8 +export IFUPDOWN2_VERSION IFUPDOWN2_SHA256 IFUPDOWN2 = ifupdown2_$(IFUPDOWN2_VERSION)_all.deb $(IFUPDOWN2)_SRC_PATH = $(SRC_PATH)/ifupdown2 diff --git a/rules/iproute2.mk b/rules/iproute2.mk new file mode 100644 index 00000000000..506c3469c4d --- /dev/null +++ b/rules/iproute2.mk @@ -0,0 +1,24 @@ +# iproute2 - patched for EVPN Multihoming protocol field support + +ifeq ($(BLDENV),trixie) + +IPROUTE2_VERSION_BASE = 6.15.0 +IPROUTE2_DEBIAN_VERSION = $(IPROUTE2_VERSION_BASE)-1 +IPROUTE2_VERSION_FULL = $(IPROUTE2_DEBIAN_VERSION)+sonic.0 + +export IPROUTE2_VERSION_BASE +export IPROUTE2_DEBIAN_VERSION +export IPROUTE2_VERSION_FULL +export IPROUTE2 +export IPROUTE2_DBG + +IPROUTE2 = iproute2_$(IPROUTE2_VERSION_FULL)_$(CONFIGURED_ARCH).deb +$(IPROUTE2)_SRC_PATH = $(SRC_PATH)/iproute2 +SONIC_MAKE_DEBS += $(IPROUTE2) + +IPROUTE2_DBG = iproute2-dbgsym_$(IPROUTE2_VERSION_FULL)_$(CONFIGURED_ARCH).deb +$(IPROUTE2_DBG)_DEPENDS += $(IPROUTE2) +$(IPROUTE2_DBG)_RDEPENDS += $(IPROUTE2) +$(eval $(call add_derived_package,$(IPROUTE2),$(IPROUTE2_DBG))) + +endif # trixie diff --git a/rules/libpcre3.dep b/rules/libpcre3.dep deleted file mode 100644 index 2fae6c7ee8f..00000000000 --- a/rules/libpcre3.dep +++ /dev/null @@ -1,10 +0,0 @@ - -SPATH := $($(LIBPCRE3)_SRC_PATH) -DEP_FILES := $(SONIC_COMMON_FILES_LIST) rules/libpcre3.mk rules/libyang.dep -DEP_FILES += $(SONIC_COMMON_BASE_FILES_LIST) -DEP_FILES += $(shell git ls-files $(SPATH)) - -$(LIBPCRE3)_CACHE_MODE := GIT_CONTENT_SHA -$(LIBPCRE3)_DEP_FLAGS := $(SONIC_COMMON_FLAGS_LIST) -$(LIBPCRE3)_DEP_FILES := $(DEP_FILES) - diff --git a/rules/libpcre3.mk b/rules/libpcre3.mk deleted file mode 100644 index ce3d00bdbe8..00000000000 --- a/rules/libpcre3.mk +++ /dev/null @@ -1,31 +0,0 @@ -# libyang - -LIBPCRE3_VERSION = 8.39 -LIBPCRE3_SUBVERSION = 15 - -export LIBPCRE3_VERSION LIBPCRE3_SUBVERSION - -LIBPCRE3 = libpcre3_$(LIBPCRE3_VERSION)-$(LIBPCRE3_SUBVERSION)_$(CONFIGURED_ARCH).deb -$(LIBPCRE3)_SRC_PATH = $(SRC_PATH)/libpcre3 -ifeq ($(BLDENV),trixie) -SONIC_MAKE_DEBS += $(LIBPCRE3) -endif - -LIBPCRE16_3 = libpcre16-3_$(LIBPCRE3_VERSION)-$(LIBPCRE3_SUBVERSION)_$(CONFIGURED_ARCH).deb -$(eval $(call add_derived_package,$(LIBPCRE3),$(LIBPCRE16_3))) - -LIBPCRE32_3 = libpcre32-3_$(LIBPCRE3_VERSION)-$(LIBPCRE3_SUBVERSION)_$(CONFIGURED_ARCH).deb -$(eval $(call add_derived_package,$(LIBPCRE3),$(LIBPCRE32_3))) - -LIBPCRECPP0V5 = libpcrecpp0v5_$(LIBPCRE3_VERSION)-$(LIBPCRE3_SUBVERSION)_$(CONFIGURED_ARCH).deb -$(eval $(call add_derived_package,$(LIBPCRE3),$(LIBPCRECPP0V5))) - -LIBPCRE3_DEV = libpcre3-dev_$(LIBPCRE3_VERSION)-$(LIBPCRE3_SUBVERSION)_$(CONFIGURED_ARCH).deb -$(LIBPCRE3_DEV)_DEPENDS += $(LIBPCRE3) $(LIBPCRE16_3) $(LIBPCRE32_3) $(LIBPCRECPP0V5) -$(LIBPCRE3_DEV)_RDEPENDS += $(LIBPCRE3) $(LIBPCRE16_3) $(LIBPCRE32_3) $(LIBPCRECPP0V5) -$(eval $(call add_derived_package,$(LIBPCRE3),$(LIBPCRE3_DEV))) - -LIBPCRE3_DBG = libpcre3-dbg_$(LIBPCRE3_VERSION)-$(LIBPCRE3_SUBVERSION)_$(CONFIGURED_ARCH).deb -$(eval $(call add_derived_package,$(LIBPCRE3),$(LIBPCRE3_DBG))) - -export LIBPCRE3 LIBPCRE3_DBG LIBPCRE3_DEV LIBPCRE16_3 LIBPCRE32_3 LIBPCRECPP0V5 diff --git a/rules/libyang.dep b/rules/libyang.dep deleted file mode 100644 index 681f0c86a06..00000000000 --- a/rules/libyang.dep +++ /dev/null @@ -1,10 +0,0 @@ - -SPATH := $($(LIBYANG)_SRC_PATH) -DEP_FILES := $(SONIC_COMMON_FILES_LIST) rules/libyang.mk rules/libyang.dep -DEP_FILES += $(SONIC_COMMON_BASE_FILES_LIST) -DEP_FILES += $(shell git ls-files $(SPATH)) - -$(LIBYANG)_CACHE_MODE := GIT_CONTENT_SHA -$(LIBYANG)_DEP_FLAGS := $(SONIC_COMMON_FLAGS_LIST) -$(LIBYANG)_DEP_FILES := $(DEP_FILES) - diff --git a/rules/libyang.mk b/rules/libyang.mk deleted file mode 100644 index 8fb732c33b3..00000000000 --- a/rules/libyang.mk +++ /dev/null @@ -1,47 +0,0 @@ -# libyang - -LIBYANG_VERSION_BASE = 1.0 -LIBYANG_VERSION = $(LIBYANG_VERSION_BASE).73 -LIBYANG_SUBVERSION = 1 - -export LIBYANG_VERSION_BASE -export LIBYANG_VERSION -export LIBYANG_SUBVERSION - -LIBYANG = libyang_$(LIBYANG_VERSION)_$(CONFIGURED_ARCH).deb -ifeq ($(BLDENV),trixie) -$(LIBYANG)_DEPENDS += $(LIBPCRE3_DEV) $(LIBPCRE3) $(LIBPCRE16_3) $(LIBPCRE32_3) $(LIBPCRECPP0V5) -$(LIBYANG)_RDEPENDS += $(LIBPCRE3) -endif -$(LIBYANG)_PHONIES += $(LIBYANG3-DEV-DONE) -$(LIBYANG)_SRC_PATH = $(SRC_PATH)/libyang -SONIC_MAKE_DEBS += $(LIBYANG) - -LIBYANG_DEV = libyang-dev_$(LIBYANG_VERSION)_$(CONFIGURED_ARCH).deb -$(eval $(call add_derived_package,$(LIBYANG),$(LIBYANG_DEV))) - -LIBYANG_DBGSYM = libyang-dbgsym_$(LIBYANG_VERSION)_$(CONFIGURED_ARCH).deb -$(eval $(call add_derived_package,$(LIBYANG),$(LIBYANG_DBGSYM))) - -LIBYANG_CPP = libyang-cpp_$(LIBYANG_VERSION)_$(CONFIGURED_ARCH).deb -$(LIBYANG_CPP)_DEPENDS += $(LIBYANG) -$(eval $(call add_derived_package,$(LIBYANG),$(LIBYANG_CPP))) - -LIBYANG_CPP_DBG = libyang-cpp-dbgsym_$(LIBYANG_VERSION)_$(CONFIGURED_ARCH).deb -$(LIBYANG_CPP_DBG)_DEPENDS += $(LIBYANG_CPP) -$(LIBYANG_CPP_DBG)_RDEPENDS += $(LIBYANG_CPP) -$(eval $(call add_derived_package,$(LIBYANG),$(LIBYANG_CPP_DBG))) - -LIBYANG_PY3 = python3-yang_$(LIBYANG_VERSION)_$(CONFIGURED_ARCH).deb -$(LIBYANG_PY3)_DEPENDS += $(LIBYANG) $(LIBYANG_CPP) -$(eval $(call add_derived_package,$(LIBYANG),$(LIBYANG_PY3))) - -LIBYANG_PY3_DBG = python3-yang-dbgsym_$(LIBYANG_VERSION)_$(CONFIGURED_ARCH).deb -$(LIBYANG_PY3_DBG)_DEPENDS += $(LIBYANG_PY3) -$(LIBYANG_PY3_DBG)_RDEPENDS += $(LIBYANG_PY3) -$(eval $(call add_derived_package,$(LIBYANG),$(LIBYANG_PY3_DBG))) - -#$(eval $(call add_conflict_package,$(LIBYANG),$(LIBYANG3))) -$(eval $(call add_conflict_package,$(LIBYANG_DEV),$(LIBYANG3_DEV))) - -export LIBYANG LIBYANG_DBGSYM LIBYANG_DEV LIBYANG_CPP LIBYANG_CPP_DBG LIBYANG_PY3 LIBYANG_PY3_DBG diff --git a/rules/libyang3-dev-done.dep b/rules/libyang3-dev-done.dep deleted file mode 100644 index c93c19c8563..00000000000 --- a/rules/libyang3-dev-done.dep +++ /dev/null @@ -1,9 +0,0 @@ - -SPATH := -DEP_FILES := $(SONIC_COMMON_FILES_LIST) rules/libyang3-dev-done.mk rules/libyang3-dev-done.dep -DEP_FILES += $(SONIC_COMMON_BASE_FILES_LIST) - -$(LIBYANG3-DEV-DONE)_CACHE_MODE := none -$(LIBYANG3-DEV-DONE)_DEP_FLAGS := $(SONIC_COMMON_FLAGS_LIST) -$(LIBYANG3-DEV-DONE)_DEP_FILES := $(DEP_FILES) - diff --git a/rules/libyang3-dev-done.mk b/rules/libyang3-dev-done.mk deleted file mode 100644 index e9d0c3bd3fd..00000000000 --- a/rules/libyang3-dev-done.mk +++ /dev/null @@ -1,21 +0,0 @@ -# libyang1-dev and libyang3-dev are not designed to coexist. The way -# SONiC builds, however, it depends on libyang3-dev being installed first -# and anything that needs it being built then, and only then, should -# libyang1-dev be installed, and the remaining packages can then be -# built. -# -# Any package that relies directly on $(LIBYANG3_DEV) needs to be listed -# as a dependency for libyang3-dev-done. -# -# libyang1 won't even be built until everything needing libyang3-dev is -# done. - -LIBYANG3-DEV-DONE = libyang3-dev-done -$(LIBYANG3-DEV-DONE)_DEPENDS = $(LIBYANG3_PY3) - -# Not compiling FRR for Trixie -ifeq ($(BLDENV),bookworm) -$(LIBYANG3-DEV-DONE)_DEPENDS += $(FRR) -endif - -SONIC_PHONIES += $(LIBYANG3-DEV-DONE) diff --git a/rules/makedumpfile.dep b/rules/makedumpfile.dep new file mode 100644 index 00000000000..6ad1fe898a4 --- /dev/null +++ b/rules/makedumpfile.dep @@ -0,0 +1,8 @@ +SPATH := $($(MAKEDUMPFILE)_SRC_PATH) +DEP_FILES := $(SONIC_COMMON_FILES_LIST) rules/makedumpfile.mk rules/makedumpfile.dep +DEP_FILES += $(SONIC_COMMON_BASE_FILES_LIST) +DEP_FILES += $(shell git ls-files $(SPATH)) + +$(MAKEDUMPFILE)_CACHE_MODE := GIT_CONTENT_SHA +$(MAKEDUMPFILE)_DEP_FLAGS := $(SONIC_COMMON_FLAGS_LIST) +$(MAKEDUMPFILE)_DEP_FILES := $(DEP_FILES) diff --git a/rules/makedumpfile.mk b/rules/makedumpfile.mk new file mode 100644 index 00000000000..4539b7e6cae --- /dev/null +++ b/rules/makedumpfile.mk @@ -0,0 +1,12 @@ +# makedumpfile package + +MAKEDUMPFILE_VERSION = 1.7.7 +MAKEDUMPFILE_DEB_REVISION = 1 + +MAKEDUMPFILE = makedumpfile_$(MAKEDUMPFILE_VERSION)-$(MAKEDUMPFILE_DEB_REVISION)_$(CONFIGURED_ARCH).deb +$(MAKEDUMPFILE)_SRC_PATH = $(SRC_PATH)/makedumpfile +SONIC_MAKE_DEBS += $(MAKEDUMPFILE) + +export MAKEDUMPFILE_VERSION +export MAKEDUMPFILE_DEB_REVISION +export MAKEDUMPFILE diff --git a/rules/p4lang.mk b/rules/p4lang.mk index 69bde5693e8..e5ad6127107 100644 --- a/rules/p4lang.mk +++ b/rules/p4lang.mk @@ -1,8 +1,8 @@ # p4lang package # Main target: p4lang-pi -P4LANG_PI_VERSION = 0.1.0 -P4LANG_PI_VERSION_FULL = $(P4LANG_PI_VERSION)-15 +P4LANG_PI_VERSION = 0.1.1 +P4LANG_PI_VERSION_FULL = $(P4LANG_PI_VERSION)-1 export P4LANG_PI_VERSION export P4LANG_PI_VERSION_FULL @@ -16,7 +16,7 @@ SONIC_MAKE_DEBS += $(P4LANG_PI) # p4lang-bmv2 P4LANG_BMV2_VERSION = 1.15.0 -P4LANG_BMV2_VERSION_FULL = $(P4LANG_BMV2_VERSION)-7 +P4LANG_BMV2_VERSION_FULL = $(P4LANG_BMV2_VERSION)-9 export P4LANG_BMV2_VERSION export P4LANG_BMV2_VERSION_FULL diff --git a/rules/sairedis.mk b/rules/sairedis.mk index b4ae9cfb447..610fe2255a5 100644 --- a/rules/sairedis.mk +++ b/rules/sairedis.mk @@ -8,10 +8,6 @@ $(LIBSAIREDIS)_SRC_PATH = $(SRC_PATH)/sonic-sairedis $(LIBSAIREDIS)_VERSION = $(LIBSAIREDIS_VERSION) $(LIBSAIREDIS)_NAME = $(LIBSAIREDIS_NAME) $(LIBSAIREDIS)_DEPENDS += $(LIBSWSSCOMMON_DEV) -ifeq ($(CONFIGURED_PLATFORM),vpp) -$(LIBSAIREDIS)_DEPENDS += $(VPP_MAIN) $(VPP_PLUGIN_CORE) $(VPP_PLUGIN_DPDK) \ - $(VPP_PLUGIN_DEV) $(VPP_DEV) $(VPPINFRA_DEV) $(VPPDBG) -endif $(LIBSAIREDIS)_RDEPENDS += $(LIBSWSSCOMMON) $(LIBSAIREDIS)_DEB_BUILD_OPTIONS = nocheck SONIC_DPKG_DEBS += $(LIBSAIREDIS) @@ -20,10 +16,8 @@ LIBSAIREDIS_DEV = $(LIBSAIREDIS_NAME)-dev_$(LIBSAIREDIS_VERSION)_$(CONFIGURED_AR $(eval $(call add_derived_package,$(LIBSAIREDIS),$(LIBSAIREDIS_DEV))) LIBSAIVS = libsaivs_$(LIBSAIREDIS_VERSION)_$(CONFIGURED_ARCH).deb -ifeq ($(CONFIGURED_PLATFORM),vpp) -$(LIBSAIVS)_RDEPENDS += $(VPP_MAIN) $(VPP_PLUGIN_CORE) $(VPP_PLUGIN_DPDK) -endif $(eval $(call add_derived_package,$(LIBSAIREDIS),$(LIBSAIVS))) +$(LIBSAIVS)_DEPENDS += $(LIBSAIMETADATA) LIBSAIVS_DEV = libsaivs-dev_$(LIBSAIREDIS_VERSION)_$(CONFIGURED_ARCH).deb $(eval $(call add_derived_package,$(LIBSAIREDIS),$(LIBSAIVS_DEV))) diff --git a/rules/scapy.mk b/rules/scapy.mk index 6953c1ef10e..4ad53a5a8ab 100644 --- a/rules/scapy.mk +++ b/rules/scapy.mk @@ -1,6 +1,6 @@ # scapy python3 wheel -SCAPY = scapy-2.4.5-py2.py3-none-any.whl +SCAPY = scapy-2.6.1.dev0-py3-none-any.whl $(SCAPY)_SRC_PATH = $(SRC_PATH)/scapy $(SCAPY)_PYTHON_VERSION = 3 $(SCAPY)_TEST = n diff --git a/rules/scripts.mk b/rules/scripts.mk index cb58385e7fa..cd8c44b917d 100644 --- a/rules/scripts.mk +++ b/rules/scripts.mk @@ -23,6 +23,9 @@ $(SYSCTL_NET_CONFIG)_PATH = files/image_config/sysctl CONTAINER_CHECKER = container_checker $(CONTAINER_CHECKER)_PATH = files/image_config/monit +SERVICE_CHECKER_PY = service_checker.py +$(SERVICE_CHECKER_PY)_PATH = src/system-health/health_checker + TELEMETRY_SYSTEMD = telemetry.sh $(TELEMETRY_SYSTEMD)_PATH = files/scripts @@ -59,6 +62,7 @@ SONIC_COPY_FILES += $(CONFIGDB_LOAD_SCRIPT) \ $(SYSCTL_NET_CONFIG) \ $(CONTAINER_CHECKER) \ $(TELEMETRY_SYSTEMD) \ + $(SERVICE_CHECKER_PY) \ $(GNMI_SYSTEMD) \ $(RESTAPI_SYSTEMD) \ $(K8S_POD_CONTROL) \ diff --git a/rules/sedutil.dep b/rules/sedutil.dep new file mode 100644 index 00000000000..80824acf4b2 --- /dev/null +++ b/rules/sedutil.dep @@ -0,0 +1,9 @@ +SPATH := $($(SEDUTIL)_SRC_PATH) + +DEP_FILES := $(SONIC_COMMON_FILES_LIST) rules/sedutil.mk rules/sedutil.dep +DEP_FILES += $(SONIC_COMMON_BASE_FILES_LIST) +DEP_FILES += $(shell git ls-files $(SPATH)) + +$(SEDUTIL)_CACHE_MODE := GIT_CONTENT_SHA +$(SEDUTIL)_DEP_FLAGS := $(SONIC_COMMON_FLAGS_LIST) +$(SEDUTIL)_DEP_FILES := $(DEP_FILES) diff --git a/rules/sedutil.mk b/rules/sedutil.mk new file mode 100644 index 00000000000..6f46a479c17 --- /dev/null +++ b/rules/sedutil.mk @@ -0,0 +1,10 @@ +SEDUTIL_GITHUB_URL = https://github.com/ChubbyAnt/sedutil +SEDUTIL_VERSION = 1.15-5ad84d8 +SEDUTIL = sedutil_$(SEDUTIL_VERSION)_$(CONFIGURED_ARCH).deb +$(SEDUTIL)_SRC_PATH = $(SRC_PATH)/sedutil + +SONIC_MAKE_DEBS += $(SEDUTIL) + +export SEDUTIL_GITHUB_URL +export SEDUTIL_VERSION +export SEDUTIL diff --git a/rules/snmpd.mk b/rules/snmpd.mk index fe0aa9caf91..bb94ec91f36 100644 --- a/rules/snmpd.mk +++ b/rules/snmpd.mk @@ -1,16 +1,11 @@ # snmpd package -# TODO(trixie): Update version to version in Trixie -ifeq ($(BLDENV),trixie) -SNMPD_VERSION = 5.9.4+dfsg -SNMPD_VERSION_FULL = $(SNMPD_VERSION)-2+deb13u1 -else ifeq ($(BLDENV),bookworm) +# Built from source only on bookworm; on trixie the packages are installed +# directly from Debian repos. +ifeq ($(BLDENV),bookworm) + SNMPD_VERSION = 5.9.3+dfsg SNMPD_VERSION_FULL = $(SNMPD_VERSION)-2+deb12u1 -else ifeq ($(BLDENV),bullseye) -SNMPD_VERSION = 5.9+dfsg -SNMPD_VERSION_FULL = $(SNMPD_VERSION)-4+deb11u1 -endif export SNMPD_VERSION SNMPD_VERSION_FULL @@ -41,30 +36,29 @@ $(SNMPD)_RDEPENDS += $(LIBSNMP) $(eval $(call add_derived_package,$(LIBSNMP_BASE),$(SNMPD))) SNMP_DBG = snmp-dbgsym_$(SNMPD_VERSION_FULL)_$(CONFIGURED_ARCH).deb +$(SNMP_DBG)_RDEPENDS += $(SNMP) $(eval $(call add_derived_package,$(LIBSNMP_BASE),$(SNMP_DBG))) SNMPD_DBG = snmpd-dbgsym_$(SNMPD_VERSION_FULL)_$(CONFIGURED_ARCH).deb +$(SNMPD_DBG)_RDEPENDS += $(SNMPD) $(eval $(call add_derived_package,$(LIBSNMP_BASE),$(SNMPD_DBG))) -ifeq ($(BLDENV),trixie) -LIBSNMP = libsnmp40t64_$(SNMPD_VERSION_FULL)_$(CONFIGURED_ARCH).deb -else LIBSNMP = libsnmp40_$(SNMPD_VERSION_FULL)_$(CONFIGURED_ARCH).deb -endif $(LIBSNMP)_RDEPENDS += $(LIBSNMP_BASE) $(eval $(call add_derived_package,$(LIBSNMP_BASE),$(LIBSNMP))) -ifeq ($(BLDENV),trixie) -LIBSNMP_DBG = libsnmp40t64-dbgsym_$(SNMPD_VERSION_FULL)_$(CONFIGURED_ARCH).deb -else LIBSNMP_DBG = libsnmp40-dbgsym_$(SNMPD_VERSION_FULL)_$(CONFIGURED_ARCH).deb -endif $(LIBSNMP_DBG)_DEPENDS += $(LIBSNMP) $(LIBSNMP_DBG)_RDEPENDS += $(LIBSNMP) $(eval $(call add_derived_package,$(LIBSNMP_BASE),$(LIBSNMP_DBG))) +LIBNETSNMPTRAPD40 = libnetsnmptrapd40_$(SNMPD_VERSION_FULL)_$(CONFIGURED_ARCH).deb +$(LIBNETSNMPTRAPD40)_DEPENDS += $(LIBSNMP) +$(LIBNETSNMPTRAPD40)_RDEPENDS += $(LIBSNMP) $(LIBSNMP_BASE) +$(eval $(call add_derived_package,$(LIBSNMP_BASE),$(LIBNETSNMPTRAPD40))) + LIBSNMP_DEV = libsnmp-dev_$(SNMPD_VERSION_FULL)_$(CONFIGURED_ARCH).deb -$(LIBSNMP_DEV)_DEPENDS += $(LIBSNMP) +$(LIBSNMP_DEV)_DEPENDS += $(LIBSNMP) $(LIBNETSNMPTRAPD40) $(eval $(call add_derived_package,$(LIBSNMP_BASE),$(LIBSNMP_DEV))) LIBSNMP_PERL = libsnmp-perl_$(SNMPD_VERSION_FULL)_$(CONFIGURED_ARCH).deb @@ -82,8 +76,9 @@ $(TKMIB)_DEPENDS += $(LIBSNMP_PERL) $(TKMIB)_RDEPENDS += $(LIBSNMP_PERL) $(eval $(call add_derived_package,$(LIBSNMP_BASE),$(TKMIB))) +endif # bookworm + # The .c, .cpp, .h & .hpp files under src/{$DBG_SRC_ARCHIVE list} # are archived into debug one image to facilitate debugging. # DBG_SRC_ARCHIVE += snmpd - diff --git a/rules/sonic-bmcctld.dep b/rules/sonic-bmcctld.dep new file mode 100644 index 00000000000..a7d3ae7b7a8 --- /dev/null +++ b/rules/sonic-bmcctld.dep @@ -0,0 +1,10 @@ +SPATH := $($(SONIC_BMCCTLD_PY3)_SRC_PATH) +DEP_FILES := $(SONIC_COMMON_FILES_LIST) rules/sonic-bmcctld.mk rules/sonic-bmcctld.dep +DEP_FILES += $(SONIC_COMMON_BASE_FILES_LIST) +SMDEP_FILES := $(addprefix $(SPATH)/,$(shell cd $(SPATH) && git ls-files)) + +$(SONIC_BMCCTLD_PY3)_CACHE_MODE := GIT_CONTENT_SHA +$(SONIC_BMCCTLD_PY3)_DEP_FLAGS := $(SONIC_COMMON_FLAGS_LIST) +$(SONIC_BMCCTLD_PY3)_DEP_FILES := $(DEP_FILES) +$(SONIC_BMCCTLD_PY3)_SMDEP_FILES := $(SMDEP_FILES) +$(SONIC_BMCCTLD_PY3)_SMDEP_PATHS := $(SPATH) diff --git a/rules/sonic-bmcctld.mk b/rules/sonic-bmcctld.mk new file mode 100644 index 00000000000..b0ac4dab6a2 --- /dev/null +++ b/rules/sonic-bmcctld.mk @@ -0,0 +1,10 @@ +# sonic-bmcctld (SONiC BMC control daemon) Debian package + +# SONIC_BMCCTLD_PY3 package + +SONIC_BMCCTLD_PY3 = sonic_bmcctld-1.0-py3-none-any.whl +$(SONIC_BMCCTLD_PY3)_SRC_PATH = $(SRC_PATH)/sonic-platform-daemons/sonic-bmcctld +$(SONIC_BMCCTLD_PY3)_DEPENDS = $(SONIC_PY_COMMON_PY3) $(SONIC_PLATFORM_COMMON_PY3) +$(SONIC_BMCCTLD_PY3)_DEBS_DEPENDS = $(LIBSWSSCOMMON) $(PYTHON3_SWSSCOMMON) +$(SONIC_BMCCTLD_PY3)_PYTHON_VERSION = 3 +SONIC_PYTHON_WHEELS += $(SONIC_BMCCTLD_PY3) diff --git a/rules/sonic-config.dep b/rules/sonic-config.dep index 7ef81ad8367..f87879cf727 100644 --- a/rules/sonic-config.dep +++ b/rules/sonic-config.dep @@ -4,7 +4,7 @@ SPATH := $($(SONIC_CONFIG_ENGINE_PY3)_SRC_PATH) DEP_FILES := $(SONIC_COMMON_FILES_LIST) rules/sonic-config.mk rules/sonic-config.dep DEP_FILES += $(SONIC_COMMON_BASE_FILES_LIST) DEP_FILES += $(shell git ls-files $(SPATH)) $(SONIC_DEVICE_FILES_LIST) -DEP_FILES += files/image_config/interfaces/interfaces.j2 dockers/docker-orchagent/ports.json.j2 dockers/docker-dhcp-relay/wait_for_intf.sh.j2 dockers/docker-dhcp-relay/docker-dhcp-relay.supervisord.conf.j2 dockers/docker-lldp/lldpd.conf.j2 dockers/docker-orchagent/ipinip.json.j2 files/build_templates/qos_config.j2 dockers/docker-orchagent/switch.json.j2 dockers/docker-orchagent/vxlan.json.j2 files/image_config/constants/constants.yml dockers/docker-orchagent/orch_zmq_tables.conf.j2 +DEP_FILES += files/image_config/interfaces/interfaces.j2 dockers/docker-orchagent/ports.json.j2 dockers/docker-dhcp-relay/wait_for_intf.sh.j2 dockers/docker-dhcp-relay/docker-dhcp-relay.supervisord.conf.j2 dockers/docker-lldp/lldpd.conf.j2 dockers/docker-orchagent/ipinip.json.j2 files/build_templates/qos_config.j2 dockers/docker-orchagent/switch.json.j2 dockers/docker-orchagent/vxlan.json.j2 files/build_templates/constants.yml.j2 dockers/docker-orchagent/orch_zmq_tables.conf.j2 ifeq ($(ENABLE_PY2_MODULES), y) $(SONIC_CONFIG_ENGINE_PY2)_CACHE_MODE := GIT_CONTENT_SHA diff --git a/rules/sonic-config.mk b/rules/sonic-config.mk index ba146df7057..d65805bc96c 100644 --- a/rules/sonic-config.mk +++ b/rules/sonic-config.mk @@ -16,10 +16,9 @@ $(SONIC_CONFIG_ENGINE_PY3)_SRC_PATH = $(SRC_PATH)/sonic-config-engine $(SONIC_CONFIG_ENGINE_PY3)_DEPENDS += $(SONIC_PY_COMMON_PY3) \ $(SONIC_YANG_MGMT_PY3) \ $(SONIC_YANG_MODELS_PY3) -$(SONIC_CONFIG_ENGINE_PY3)_DEBS_DEPENDS += $(LIBYANG) \ - $(LIBYANG_CPP) \ - $(LIBYANG_PY3) \ - $(PYTHON3_SWSSCOMMON) +$(SONIC_CONFIG_ENGINE_PY3)_DEBS_DEPENDS += $(LIBYANG3) \ + $(LIBYANG3_PY3) \ + $(PYTHON3_SWSSCOMMON) ifeq ($(ENABLE_PY2_MODULES), y) # Synthetic dependency to avoid building the Python 2 and 3 packages # simultaneously and any potential conflicts which may arise diff --git a/rules/sonic-fib.dep b/rules/sonic-fib.dep new file mode 100644 index 00000000000..b857d56996e --- /dev/null +++ b/rules/sonic-fib.dep @@ -0,0 +1,12 @@ + +SPATH := $($(LIBFIB)_SRC_PATH) +DEP_FILES := $(SONIC_COMMON_FILES_LIST) rules/sonic-fib.mk rules/sonic-fib.dep +DEP_FILES += $(SONIC_COMMON_BASE_FILES_LIST) +SMDEP_FILES := $(addprefix $(SPATH)/,$(shell cd $(SPATH) && git ls-files)) + +$(LIBFIB)_CACHE_MODE := GIT_CONTENT_SHA +$(LIBFIB)_DEP_FLAGS := $(SONIC_COMMON_FLAGS_LIST) +$(LIBFIB)_DEP_FILES := $(DEP_FILES) +$(LIBFIB)_SMDEP_FILES := $(SMDEP_FILES) +$(LIBFIB)_SMDEP_PATHS := $(SPATH) + diff --git a/rules/sonic-fib.mk b/rules/sonic-fib.mk new file mode 100644 index 00000000000..452565c913f --- /dev/null +++ b/rules/sonic-fib.mk @@ -0,0 +1,24 @@ +# libFIB package + +LIBFIB_VERSION = 1.0.0 +LIBFIB_NAME = libnexthopgroup + +LIBFIB = $(LIBFIB_NAME)_$(LIBFIB_VERSION)_$(CONFIGURED_ARCH).deb +$(LIBFIB)_SRC_PATH = $(SRC_PATH)/libraries/sonic-fib +$(LIBFIB)_VERSION = $(LIBFIB_VERSION) +$(LIBFIB)_NAME = $(LIBFIB_NAME) + +SONIC_DPKG_DEBS += $(LIBFIB) + +LIBFIB_DEV = $(LIBFIB_NAME)-dev_$(LIBFIB_VERSION)_$(CONFIGURED_ARCH).deb +$(eval $(call add_derived_package,$(LIBFIB),$(LIBFIB_DEV))) + + + + + +# The .c, .cpp, .h & .hpp files under src/{$DBG_SRC_ARCHIVE list} +# are archived into debug one image to facilitate debugging. +# +DBG_SRC_ARCHIVE += libraries/sonic-fib + diff --git a/rules/sonic-fips.mk b/rules/sonic-fips.mk index 398b8df39d6..430dd07f6a6 100644 --- a/rules/sonic-fips.mk +++ b/rules/sonic-fips.mk @@ -2,13 +2,13 @@ ifeq ($(BLDENV), trixie) -FIPS_VERSION = 1.8.0-24-gd744cf2 +FIPS_VERSION = 1.9.4 FIPS_OPENSSL_VERSION = 3.5.4-1+fips FIPS_OPENSSH_VERSION = 10.0p1-7+fips FIPS_PYTHON_MAIN_VERSION = 3.13 FIPS_PYTHON_VERSION = 3.13.5-2+fips FIPS_GOLANG_MAIN_VERSION = 1.24 -FIPS_GOLANG_VERSION = 1.24.4-1 +FIPS_GOLANG_VERSION = 1.24.4-1+fips FIPS_KRB5_VERSION = 1.21.3-5+fips endif @@ -34,7 +34,7 @@ FIPS_GOLANG_VERSION = 1.15.15-1~deb11u4+fips FIPS_KRB5_VERSION = 1.18.3-6+deb11u5+fips endif -FIPS_URL_PREFIX = https://packages.trafficmanager.net/public/fips/$(BLDENV)/$(FIPS_VERSION)/$(CONFIGURED_ARCH) +FIPS_URL_PREFIX = $(BUILD_PUBLIC_URL)/fips/$(BLDENV)/$(FIPS_VERSION)/$(CONFIGURED_ARCH) SYMCRYPT_OPENSSL_NAME = symcrypt-openssl SYMCRYPT_OPENSSL = $(SYMCRYPT_OPENSSL_NAME)_$(FIPS_VERSION)_$(CONFIGURED_ARCH).deb diff --git a/rules/sonic-mgmt-common.mk b/rules/sonic-mgmt-common.mk index 41441ab3ee9..84cdc5d45ca 100644 --- a/rules/sonic-mgmt-common.mk +++ b/rules/sonic-mgmt-common.mk @@ -3,8 +3,8 @@ MGMT_COMMON_VERSION = 1.0.0 SONIC_MGMT_COMMON = sonic-mgmt-common_$(MGMT_COMMON_VERSION)_$(CONFIGURED_ARCH).deb $(SONIC_MGMT_COMMON)_SRC_PATH = $(SRC_PATH)/sonic-mgmt-common -$(SONIC_MGMT_COMMON)_DEPENDS = $(LIBYANG_DEV) $(LIBYANG) -$(SONIC_MGMT_COMMON)_RDEPENDS = $(LIBYANG) +$(SONIC_MGMT_COMMON)_DEPENDS = $(LIBYANG3_DEV) $(LIBYANG3) +$(SONIC_MGMT_COMMON)_RDEPENDS = $(LIBYANG3) $(SONIC_MGMT_COMMON)_WHEEL_DEPENDS = $(SONIC_YANG_MODELS_PY3) SONIC_DPKG_DEBS += $(SONIC_MGMT_COMMON) diff --git a/rules/sonic-redfish.dep b/rules/sonic-redfish.dep new file mode 100644 index 00000000000..0462975fba0 --- /dev/null +++ b/rules/sonic-redfish.dep @@ -0,0 +1,15 @@ + +# Common dependency files +DEP_FILES := rules/sonic-redfish.mk rules/sonic-redfish.dep +DEP_FLAGS := $(SONIC_COMMON_FLAGS_LIST) + +# bmcweb +$(BMCWEB)_CACHE_MODE := GIT_CONTENT_SHA +$(BMCWEB)_DEP_FLAGS := $(DEP_FLAGS) +$(BMCWEB)_DEP_FILES := $(DEP_FILES) + +# sonic-dbus-bridge +$(SONIC_DBUS_BRIDGE)_CACHE_MODE := GIT_CONTENT_SHA +$(SONIC_DBUS_BRIDGE)_DEP_FLAGS := $(DEP_FLAGS) +$(SONIC_DBUS_BRIDGE)_DEP_FILES := $(DEP_FILES) + diff --git a/rules/sonic-redfish.mk b/rules/sonic-redfish.mk new file mode 100644 index 00000000000..5a2825ff01f --- /dev/null +++ b/rules/sonic-redfish.mk @@ -0,0 +1,35 @@ +# sonic-redfish packages +# This builds two Debian packages: +# 1. bmcweb +# 2. sonic-dbus-bridge + + +# Package versions +SONIC_REDFISH_VERSION = 1.0.0 +SONIC_REDFISH_SUBVERSION = 1 + +# Build sonic-redfish packages only in Trixie environment +# bmcweb requires gcc-13 and modern C++20 features +ifeq ($(BLDENV), trixie) + +BMCWEB = bmcweb_$(SONIC_REDFISH_VERSION)_$(CONFIGURED_ARCH).deb +$(BMCWEB)_SRC_PATH = $(SRC_PATH)/sonic-redfish +SONIC_MAKE_DEBS += $(BMCWEB) + +# bmcweb debug package +BMCWEB_DBG = bmcweb-dbg_$(SONIC_REDFISH_VERSION)_$(CONFIGURED_ARCH).deb +$(eval $(call add_derived_package,$(BMCWEB),$(BMCWEB_DBG))) + +# sonic-dbus-bridge package - built with dpkg-buildpackage from sonic-dbus-bridge/ directory +SONIC_DBUS_BRIDGE = sonic-dbus-bridge_$(SONIC_REDFISH_VERSION)_$(CONFIGURED_ARCH).deb +$(SONIC_DBUS_BRIDGE)_SRC_PATH = $(SRC_PATH)/sonic-redfish/sonic-dbus-bridge +SONIC_DPKG_DEBS += $(SONIC_DBUS_BRIDGE) + +# sonic-dbus-bridge debug symbols package +SONIC_DBUS_BRIDGE_DBGSYM = sonic-dbus-bridge-dbgsym_$(SONIC_REDFISH_VERSION)_$(CONFIGURED_ARCH).deb +$(eval $(call add_derived_package,$(SONIC_DBUS_BRIDGE),$(SONIC_DBUS_BRIDGE_DBGSYM))) + +endif + +# Export variables for the build +export SONIC_REDFISH_VERSION SONIC_REDFISH_SUBVERSION diff --git a/rules/sonic-stp.dep b/rules/sonic-stp.dep index e509a9ce1f0..38b0032bc72 100644 --- a/rules/sonic-stp.dep +++ b/rules/sonic-stp.dep @@ -1,11 +1,11 @@ -SPATH := $($(SONIC-STP)_SRC_PATH) +SPATH := $($(STP)_SRC_PATH) DEP_FILES := $(SONIC_COMMON_FILES_LIST) rules/sonic-stp.mk rules/sonic-stp.dep DEP_FILES += $(SONIC_COMMON_BASE_FILES_LIST) SMDEP_FILES := $(addprefix $(SPATH)/,$(shell cd $(SPATH) && git ls-files)) -$(SONIC-STP)_CACHE_MODE := GIT_CONTENT_SHA -$(SONIC-STP)_DEP_FLAGS := $(SONIC_COMMON_FLAGS_LIST) -$(SONIC-STP)_DEP_FILES := $(DEP_FILES) -$(SONIC-STP)_SMDEP_FILES := $(SMDEP_FILES) -$(SONIC-STP)_SMDEP_PATHS := $(SPATH) +$(STP)_CACHE_MODE := GIT_CONTENT_SHA +$(STP)_DEP_FLAGS := $(SONIC_COMMON_FLAGS_LIST) +$(STP)_DEP_FILES := $(DEP_FILES) +$(STP)_SMDEP_FILES := $(SMDEP_FILES) +$(STP)_SMDEP_PATHS := $(SPATH) diff --git a/rules/sonic-utilities.mk b/rules/sonic-utilities.mk index 6a7fe535f42..ab0d2688590 100644 --- a/rules/sonic-utilities.mk +++ b/rules/sonic-utilities.mk @@ -12,9 +12,8 @@ $(SONIC_UTILITIES_PY3)_DEPENDS += $(SONIC_PY_COMMON_PY3) \ $(SONIC_PLATFORM_COMMON_PY3) \ $(SONIC_YANG_MGMT_PY3) \ $(SONIC_YANG_MODELS_PY3) -$(SONIC_UTILITIES_PY3)_DEBS_DEPENDS = $(LIBYANG) \ - $(LIBYANG_CPP) \ - $(LIBYANG_PY3) \ +$(SONIC_UTILITIES_PY3)_DEBS_DEPENDS = $(LIBYANG3) \ + $(LIBYANG3_PY3) \ $(LIBSWSSCOMMON) \ $(PYTHON3_SWSSCOMMON) ifeq ($(CONFIGURED_PLATFORM),nvidia-bluefield) diff --git a/rules/sonic-yang-mgmt-py3.mk b/rules/sonic-yang-mgmt-py3.mk index 877fc6de395..9d1760c05b2 100644 --- a/rules/sonic-yang-mgmt-py3.mk +++ b/rules/sonic-yang-mgmt-py3.mk @@ -3,9 +3,9 @@ SONIC_YANG_MGMT_PY3 = sonic_yang_mgmt-1.0-py3-none-any.whl $(SONIC_YANG_MGMT_PY3)_SRC_PATH = $(SRC_PATH)/sonic-yang-mgmt $(SONIC_YANG_MGMT_PY3)_PYTHON_VERSION = 3 -$(SONIC_YANG_MGMT_PY3)_DEBS_DEPENDS = $(LIBYANG) $(LIBYANG_CPP) $(LIBYANG_PY3) +$(SONIC_YANG_MGMT_PY3)_DEBS_DEPENDS = $(LIBYANG3) $(LIBYANG3_PY3) $(SONIC_YANG_MGMT_PY3)_DEPENDS = $(SONIC_YANG_MODELS_PY3) -$(SONIC_YANG_MGMT_PY3)_RDEPENDS = $(SONIC_YANG_MODELS_PY3) $(LIBYANG) \ - $(LIBYANG_CPP) $(LIBYANG_PY3) +$(SONIC_YANG_MGMT_PY3)_RDEPENDS = $(SONIC_YANG_MODELS_PY3) $(LIBYANG3) \ + $(LIBYANG3_PY3) SONIC_PYTHON_WHEELS += $(SONIC_YANG_MGMT_PY3) diff --git a/rules/sonic_bgpcfgd.dep b/rules/sonic_bgpcfgd.dep index abd51062b8b..1f49d1ab3c5 100644 --- a/rules/sonic_bgpcfgd.dep +++ b/rules/sonic_bgpcfgd.dep @@ -2,7 +2,7 @@ SPATH := $($(SONIC_BGPCFGD)_SRC_PATH) DEP_FILES := $(SONIC_COMMON_FILES_LIST) rules/sonic_bgpcfgd.mk rules/sonic_bgpcfgd.dep DEP_FILES += $(SONIC_COMMON_BASE_FILES_LIST) -DEP_FILES += $(shell git ls-files $(SPATH)) +DEP_FILES += $(shell git ls-files $(SPATH) dockers/docker-fpm-frr/frr/bgpd/templates) $(SONIC_BGPCFGD)_CACHE_MODE := GIT_CONTENT_SHA $(SONIC_BGPCFGD)_DEP_FLAGS := $(SONIC_COMMON_FLAGS_LIST) diff --git a/rules/sonic_bgpcfgd.mk b/rules/sonic_bgpcfgd.mk index 9abab06800c..ab8439b9ff1 100644 --- a/rules/sonic_bgpcfgd.mk +++ b/rules/sonic_bgpcfgd.mk @@ -10,9 +10,8 @@ $(SONIC_BGPCFGD)_SRC_PATH = $(SRC_PATH)/sonic-bgpcfgd $(SONIC_BGPCFGD)_DEPENDS += $(SONIC_CONFIG_ENGINE_PY3) \ $(SONIC_YANG_MGMT_PY3) \ $(SONIC_YANG_MODELS_PY3) -$(SONIC_BGPCFGD)_DEBS_DEPENDS += $(LIBYANG) \ - $(LIBYANG_CPP) \ - $(LIBYANG_PY3) \ +$(SONIC_BGPCFGD)_DEBS_DEPENDS += $(LIBYANG3) \ + $(LIBYANG3_PY3) \ $(PYTHON3_SWSSCOMMON) $(SONIC_BGPCFGD)_PYTHON_VERSION = 3 SONIC_PYTHON_WHEELS += $(SONIC_BGPCFGD) diff --git a/rules/swss-common.mk b/rules/swss-common.mk index 9dd181be6ae..7407e60fba3 100644 --- a/rules/swss-common.mk +++ b/rules/swss-common.mk @@ -9,9 +9,9 @@ $(LIBSWSSCOMMON)_VERSION = $(LIBSWSSCOMMON_VERSION) $(LIBSWSSCOMMON)_NAME = $(LIBSWSSCOMMON_NAME) $(LIBSWSSCOMMON)_DEPENDS += $(LIBNL3_DEV) $(LIBNL_GENL3_DEV) \ $(LIBNL_ROUTE3_DEV) $(LIBNL_NF3_DEV) \ - $(LIBNL_CLI_DEV) $(LIBYANG_DEV) $(LIBYANG) $(LIBYANG_CPP) $(LIBYANG_PY3) + $(LIBNL_CLI_DEV) $(LIBYANG3_DEV) $(LIBYANG3) $(LIBYANG3_PY3) $(LIBSWSSCOMMON)_RDEPENDS += $(LIBNL3) $(LIBNL_GENL3) \ - $(LIBNL_ROUTE3) $(LIBNL_NF3) $(LIBNL_CLI) $(LIBYANG) + $(LIBNL_ROUTE3) $(LIBNL_NF3) $(LIBNL_CLI) $(LIBYANG3) $(LIBSWSSCOMMON)_WHEEL_DEPENDS += $(SONIC_YANG_MGMT_PY3) $(SONIC_YANG_MODELS_PY3) SONIC_DPKG_DEBS += $(LIBSWSSCOMMON) diff --git a/rules/swss.mk b/rules/swss.mk index b68804887c1..bca03d71991 100644 --- a/rules/swss.mk +++ b/rules/swss.mk @@ -3,13 +3,13 @@ SWSS = swss_1.0.0_$(CONFIGURED_ARCH).deb $(SWSS)_SRC_PATH = $(SRC_PATH)/sonic-swss $(SWSS)_DEPENDS += $(LIBSAIREDIS_DEV) $(LIBSAIMETADATA_DEV) $(LIBTEAM_DEV) \ - $(LIBTEAMDCTL) $(LIBTEAM_UTILS) $(LIBSWSSCOMMON_DEV) \ + $(LIBTEAMDCTL) $(LIBTEAM_UTILS) $(LIBSWSSCOMMON_DEV) $(LIBFIB_DEV) \ $(LIBSAIVS) $(LIBSAIVS_DEV) $(STP)\ $(PROTOBUF) $(PROTOBUF_LITE) $(PROTOBUF_DEV) $(LIB_SONIC_DASH_API) $(SWSS)_UNINSTALLS = $(LIBSAIVS_DEV) $(SWSS)_RDEPENDS += $(LIBSAIREDIS) $(LIBSAIMETADATA) $(LIBTEAM) \ - $(LIBTEAMDCTL) $(LIBSWSSCOMMON) $(PYTHON3_SWSSCOMMON) \ + $(LIBTEAMDCTL) $(LIBSWSSCOMMON) $(PYTHON3_SWSSCOMMON) $(LIBFIB) \ $(PROTOBUF) $(PROTOBUF_LITE) $(PYTHON3_PROTOBUF) $(LIB_SONIC_DASH_API) SONIC_DPKG_DEBS += $(SWSS) diff --git a/rules/syncd.dep b/rules/syncd.dep index a9a72d4f2a8..f930629fa9f 100644 --- a/rules/syncd.dep +++ b/rules/syncd.dep @@ -1,5 +1,6 @@ ifneq ($(CONFIGURED_PLATFORM),vs) +ifneq ($(CONFIGURED_PLATFORM),nokia-vs) #DPKG FRK SPATH := $($(SYNCD)_SRC_PATH) @@ -18,3 +19,4 @@ $(SYNCD)_SMDEP_FILES := $(foreach path, $(SMDEP_PATHS), $($(path))) $(SYNCD)_SMDEP_PATHS := $(SMDEP_PATHS) endif +endif diff --git a/rules/syncd.mk b/rules/syncd.mk index cbed33fbf50..3e777f8012b 100644 --- a/rules/syncd.mk +++ b/rules/syncd.mk @@ -1,6 +1,8 @@ # only used for non-vs platforms ifneq ($(CONFIGURED_PLATFORM),vs) +ifneq ($(CONFIGURED_PLATFORM),aspeed) +ifneq ($(CONFIGURED_PLATFORM),nokia-vs) SYNCD = syncd_1.0.0_$(CONFIGURED_ARCH).deb $(SYNCD)_RDEPENDS += $(LIBSAIREDIS) $(LIBSAIMETADATA) @@ -38,3 +40,5 @@ ifeq ($(ENABLE_PY2_MODULES), n) endif endif +endif +endif diff --git a/rules/vpp.dep b/rules/vpp.dep deleted file mode 100644 index 480240ea350..00000000000 --- a/rules/vpp.dep +++ /dev/null @@ -1,8 +0,0 @@ -SPATH := $($(VPPINFRA)_SRC_PATH) -DEP_FILES := $(SONIC_COMMON_FILES_LIST) rules/vpp.mk rules/vpp.dep -DEP_FILES += $(SONIC_COMMON_BASE_FILES_LIST) -SMDEP_FILES := $(addprefix $(SPATH)/,$(shell cd $(SPATH) && git ls-files)) - -$(VPPINFRA)_CACHE_MODE := GIT_CONTENT_SHA -$(VPPINFRA)_DEP_FLAGS := $(SONIC_COMMON_FLAGS_LIST) -$(VPPINFRA)_DEP_FILES := $(DEP_FILES) diff --git a/rules/vpp.mk b/rules/vpp.mk deleted file mode 100644 index 0c9e61e7bd1..00000000000 --- a/rules/vpp.mk +++ /dev/null @@ -1,54 +0,0 @@ -# libvpp package - -VPP_VERSION_BASE = 2510 -VPP_VERSION = $(VPP_VERSION_BASE)-0.1 -VPP_VERSION_SONIC = $(VPP_VERSION)+b1sonic1 -VPP_SRC_PATH = platform/vpp/vppbld - -export VPP_VERSION_SONIC -export VPP_SRC_PATH - -VPPINFRA = libvppinfra_$(VPP_VERSION_SONIC)_$(CONFIGURED_ARCH).deb -$(VPPINFRA)_SRC_PATH = $(VPP_SRC_PATH) -$(VPPINFRA)_DEPENDS += $(LIBNL3) $(LIBNL3_DEV) $(LIBNL_ROUTE3) $(LIBNL_ROUTE3_DEV) -SONIC_MAKE_DEBS += $(VPPINFRA) - -VPP_MAIN = vpp_$(VPP_VERSION_SONIC)_$(CONFIGURED_ARCH).deb -$(VPP_MAIN)_DEPENDS += $(VPPINFRA) -$(VPP_MAIN)_RDEPENDS += $(VPPINFRA) -$(eval $(call add_derived_package,$(VPPINFRA),$(VPP_MAIN))) - -LIBNUMA := $(shell apt-get download --print-uris libnuma1 | cut -d " " -f2) -$(LIBNUMA)_URL := $(shell apt-get download --print-uris libnuma1 | cut -d " " -f1) -SONIC_ONLINE_DEBS += $(LIBNUMA) - -VPP_PLUGIN_CORE = vpp-plugin-core_$(VPP_VERSION_SONIC)_$(CONFIGURED_ARCH).deb -$(VPP_PLUGIN_CORE)_DEPENDS += $(VPP_MAIN) -$(VPP_PLUGIN_CORE)_RDEPENDS += $(VPP_MAIN) -$(eval $(call add_derived_package,$(VPPINFRA),$(VPP_PLUGIN_CORE))) - -VPP_PLUGIN_DPDK = vpp-plugin-dpdk_$(VPP_VERSION_SONIC)_$(CONFIGURED_ARCH).deb -$(eval $(call add_derived_package,$(VPPINFRA),$(VPP_PLUGIN_DPDK))) -$(VPP_PLUGIN_DPDK)_DEPENDS += $(LIBNUMA) $(VPP_MAIN) -$(VPP_PLUGIN_DPDK)_RDEPENDS += $(LIBNUMA) $(VPP_MAIN) - -VPPINFRA_DEV = libvppinfra-dev_$(VPP_VERSION_SONIC)_$(CONFIGURED_ARCH).deb -$(VPPINFRA_DEV)_DEPENDS += $(VPPINFRA) -$(eval $(call add_derived_package,$(VPPINFRA),$(VPPINFRA_DEV))) - -VPP_PLUGIN_DEV = vpp-plugin-devtools_$(VPP_VERSION_SONIC)_$(CONFIGURED_ARCH).deb -$(VPP_PLUGIN_DEV)_DEPENDS += $(VPP_MAIN) $(VPPINFRA) -$(VPP_PLUGIN_DEV)_RDEPENDS += $(VPP_MAIN) $(VPPINFRA) -$(eval $(call add_derived_package,$(VPPINFRA),$(VPP_PLUGIN_DEV))) - -VPP_DEV = vpp-dev_$(VPP_VERSION_SONIC)_$(CONFIGURED_ARCH).deb -$(VPP_DEV)_DEPENDS += $(VPPINFRA_DEV) -$(VPP_DEV)_RDEPENDS += $(VPPINFRA_DEV) -$(eval $(call add_derived_package,$(VPPINFRA),$(VPP_DEV))) - -VPPDBG = vpp-dbg_$(VPP_VERSION_SONIC)_$(CONFIGURED_ARCH).deb -$(eval $(call add_derived_package,$(VPPINFRA),$(VPPDBG))) - -VPP_VERSION_FILE = vpp_$(VPP_VERSION_SONIC)_commit - -export VPP_MAIN VPPINFRA VPP_PLUGIN_CORE VPP_PLUGIN_DPDK VPP_PLUGIN_DEV VPP_DEV VPPINFRA_DEV VPPDBG VPP_VERSION_FILE diff --git a/scripts/build-dep-graph.py b/scripts/build-dep-graph.py new file mode 100644 index 00000000000..5d580bca02d --- /dev/null +++ b/scripts/build-dep-graph.py @@ -0,0 +1,224 @@ +#!/usr/bin/env python3 +"""build-dep-graph.py — Parse SONiC build dependency graph from rules/*.mk files. + +Usage: python3 scripts/build-dep-graph.py [sonic-buildimage-dir] + +Outputs: + - Critical path analysis + - Fan-out/fan-in stats (bottleneck identification) + - DOT graph file for visualization + - JSON adjacency list +""" + +import os +import re +import sys +import json +from collections import defaultdict +from pathlib import Path + + +def parse_rules(rules_dir: str) -> dict: + """Parse all .mk files and extract dependency relationships.""" + deps = defaultdict(set) # pkg -> set of packages it depends on + rdeps = defaultdict(set) # pkg -> set of packages that depend on it + after = defaultdict(set) # pkg -> set of packages it must build after + all_packages = set() + + dep_patterns = [ + (r'\$\((\w+)\)_DEPENDS\s*[\?\+:]?=\s*(.*)', 'depends'), + (r'\$\((\w+)\)_DEBS_DEPENDS\s*[\?\+:]?=\s*(.*)', 'depends'), + (r'\$\((\w+)\)_WHEEL_DEPENDS\s*[\?\+:]?=\s*(.*)', 'depends'), + (r'\$\((\w+)\)_AFTER\s*[\?\+:]?=\s*(.*)', 'after'), + (r'\$\((\w+)\)_RDEPENDS\s*[\?\+:]?=\s*(.*)', 'rdeps'), + ] + + pkg_var_pattern = re.compile(r'\$\((\w+)\)') + + for mk_file in sorted(Path(rules_dir).glob('*.mk')): + content = mk_file.read_text(errors='replace') + # Join continuation lines + content = re.sub(r'\\\n\s*', ' ', content) + + for line in content.splitlines(): + line = line.strip() + if line.startswith('#'): + continue + + for pattern, dep_type in dep_patterns: + m = re.match(pattern, line) + if not m: + continue + pkg_name = m.group(1) + dep_str = m.group(2).strip() + + all_packages.add(pkg_name) + + # Extract variable references + for dep_var in pkg_var_pattern.findall(dep_str): + if dep_var.endswith('_DBG'): + continue # Skip debug variants + all_packages.add(dep_var) + if dep_type == 'depends': + deps[pkg_name].add(dep_var) + rdeps[dep_var].add(pkg_name) + elif dep_type == 'after': + after[pkg_name].add(dep_var) + elif dep_type == 'rdeps': + rdeps[pkg_name].add(dep_var) + + return { + 'deps': {k: sorted(v) for k, v in deps.items()}, + 'rdeps': {k: sorted(v) for k, v in rdeps.items()}, + 'after': {k: sorted(v) for k, v in after.items()}, + 'all_packages': sorted(all_packages), + } + + +def find_critical_path(deps: dict, all_packages: list) -> list: + """Find the longest dependency chain (critical path).""" + memo = {} + in_progress = set() # cycle detection + + def longest_chain(pkg): + if pkg in memo: + return memo[pkg] + if pkg in in_progress: + return [pkg] # cycle detected, break recursion + in_progress.add(pkg) + dep_list = deps.get(pkg, []) + if not dep_list: + memo[pkg] = [pkg] + in_progress.discard(pkg) + return memo[pkg] + best = [] + for d in dep_list: + chain = longest_chain(d) + if len(chain) > len(best): + best = chain + memo[pkg] = best + [pkg] + in_progress.discard(pkg) + return memo[pkg] + + longest = [] + for pkg in all_packages: + chain = longest_chain(pkg) + if len(chain) > len(longest): + longest = chain + + return longest + + +def compute_fan_stats(deps: dict, rdeps: dict, after: dict = None) -> list: + """Compute fan-out (dependents) and fan-in (dependencies) per package.""" + stats = [] + all_pkgs = set(deps.keys()) | set(rdeps.keys()) + if after: + for k, v in after.items(): + all_pkgs.add(k) + all_pkgs.update(v) + for pkg in sorted(all_pkgs): + fan_out = len(rdeps.get(pkg, [])) + fan_in = len(deps.get(pkg, [])) + if fan_out > 0 or fan_in > 0: + stats.append({ + 'package': pkg, + 'fan_out': fan_out, # how many depend on me + 'fan_in': fan_in, # how many I depend on + }) + return sorted(stats, key=lambda x: -x['fan_out']) + + +def generate_dot(deps: dict, rdeps: dict, output_path: str): + """Generate Graphviz DOT file.""" + with open(output_path, 'w') as f: + f.write('digraph sonic_build {\n') + f.write(' rankdir=LR;\n') + f.write(' node [shape=box, fontsize=10];\n') + + # Color high fan-out nodes + for pkg, dependents in rdeps.items(): + if len(dependents) >= 10: + f.write(f' "{pkg}" [style=filled, fillcolor=red, fontcolor=white];\n') + elif len(dependents) >= 5: + f.write(f' "{pkg}" [style=filled, fillcolor=orange];\n') + + for pkg, dep_list in deps.items(): + for dep in dep_list: + f.write(f' "{dep}" -> "{pkg}";\n') + + f.write('}\n') + + +def main(): + base_dir = sys.argv[1] if len(sys.argv) > 1 else '.' + rules_dir = os.path.join(base_dir, 'rules') + + if not os.path.isdir(rules_dir): + print(f"Error: {rules_dir} not found", file=sys.stderr) + sys.exit(1) + + print("Parsing rules/*.mk files...") + graph = parse_rules(rules_dir) + + print(f"\nTotal packages: {len(graph['all_packages'])}") + print(f"Dependency edges: {sum(len(v) for v in graph['deps'].values())}") + print(f"After-ordering edges: {sum(len(v) for v in graph['after'].values())}") + + # Critical path + print("\n" + "=" * 60) + print(" CRITICAL PATH (longest dependency chain)") + print("=" * 60) + crit_path = find_critical_path(graph['deps'], graph['all_packages']) + for i, pkg in enumerate(crit_path): + indent = " " * i + print(f" {indent}→ {pkg}") + print(f"\n Critical path length: {len(crit_path)} packages") + + # Fan-out analysis + print("\n" + "=" * 60) + print(" TOP 20 BOTTLENECK PACKAGES (by fan-out)") + print("=" * 60) + print(f" {'PACKAGE':<40} {'FAN-OUT':>8} {'FAN-IN':>8}") + print(f" {'-------':<40} {'--------':>8} {'------':>8}") + fan_stats = compute_fan_stats(graph['deps'], graph['rdeps'], graph['after']) + for s in fan_stats[:20]: + print(f" {s['package']:<40} {s['fan_out']:>8} {s['fan_in']:>8}") + + # Packages with zero dependencies (can build immediately) + roots = [p for p in graph['all_packages'] if p not in graph['deps'] or not graph['deps'][p]] + print(f"\n Root packages (zero deps, can build first): {len(roots)}") + + # Packages with zero dependents (leaves) + leaves = [p for p in graph['all_packages'] if p not in graph['rdeps'] or not graph['rdeps'][p]] + print(f" Leaf packages (nothing depends on them): {len(leaves)}") + + # Max theoretical parallelism + # (packages at the same depth in the graph can build concurrently) + print(f"\n Max theoretical parallelism: ~{len(roots)} at start, " + f"fans out to ~{len(leaves)} at end") + + # Generate outputs + dot_path = os.path.join(base_dir, 'target', 'build-dep-graph.dot') + json_path = os.path.join(base_dir, 'target', 'build-dep-graph.json') + + os.makedirs(os.path.join(base_dir, 'target'), exist_ok=True) + + generate_dot(graph['deps'], graph['rdeps'], dot_path) + print(f"\n DOT graph: {dot_path}") + + with open(json_path, 'w') as f: + json.dump({ + 'deps': graph['deps'], + 'rdeps': {k: sorted(v) for k, v in graph['rdeps'].items()}, + 'after': graph['after'], + 'critical_path': crit_path, + 'fan_stats': fan_stats[:30], + 'root_count': len(roots), + 'leaf_count': len(leaves), + }, f, indent=2) + print(f" JSON graph: {json_path}") + + +if __name__ == '__main__': + main() diff --git a/scripts/build-resource-monitor.sh b/scripts/build-resource-monitor.sh new file mode 100755 index 00000000000..29d379c3074 --- /dev/null +++ b/scripts/build-resource-monitor.sh @@ -0,0 +1,79 @@ +#!/bin/bash +# build-resource-monitor.sh — Sample system resources during SONiC build +# +# Usage: ./scripts/build-resource-monitor.sh [interval_seconds] [output_file] +# Runs in background, samples every N seconds until killed. +# Designed to run alongside a build: start before, kill after. +# +# Output: CSV with timestamp, CPU%, memory_used_gb, memory_total_gb, +# load_avg_1m, docker_containers, disk_io_mb_s + +set -euo pipefail + +INTERVAL="${1:-10}" +OUTPUT="${2:-./target/resource-monitor.csv}" + +mkdir -p "$(dirname "$OUTPUT")" + +echo "timestamp,epoch,cpu_pct,mem_used_gb,mem_total_gb,mem_pct,load_1m,load_5m,docker_containers,disk_read_mb_s,disk_write_mb_s" > "$OUTPUT" + +echo "Resource monitor started (interval: ${INTERVAL}s, output: $OUTPUT)" +echo "Kill with: kill $$" + +# Track previous disk stats for delta +prev_read=0 +prev_write=0 +first=true + +while true; do + ts=$(date +%H:%M:%S) + epoch=$(date +%s) + + # CPU - delta between two /proc/stat reads (1 second apart) + read_cpu_stats() { awk '/^cpu / {print $2, $3, $4, $5, $6, $7, $8}' /proc/stat; } + cpu1=$(read_cpu_stats) + sleep 1 + cpu2=$(read_cpu_stats) + cpu_pct=$(echo "$cpu1" "$cpu2" | awk '{ + u1=$1+$2+$3; i1=$4; s1=$5+$6+$7; + u2=$8+$9+$10; i2=$11; s2=$12+$13+$14; + total=(u2+i2+s2)-(u1+i1+s1); + if (total > 0) printf "%.0f", ((u2+s2)-(u1+s1))/total*100; + else print "0"; + }') + + # Memory + mem_info=$(free -m | awk '/^Mem:/ {printf "%.1f,%.1f,%.0f", $3/1024, $2/1024, $3/$2*100}') + + # Load average + load=$(awk '{printf "%s,%s", $1, $2}' /proc/loadavg) + + # Docker containers running + docker_count=$(docker ps -q 2>/dev/null | wc -l || echo 0) + + # Disk I/O (from /proc/diskstats, aggregate all devices) + disk_stats=$(awk '{read+=$6; write+=$10} END {printf "%d,%d", read, write}' /proc/diskstats) + cur_read=$(echo "$disk_stats" | cut -d, -f1) + cur_write=$(echo "$disk_stats" | cut -d, -f2) + + if [ "$first" = true ]; then + disk_read_mb=0 + disk_write_mb=0 + first=false + else + # Sectors are 512 bytes, convert to MB over interval + if [ "$INTERVAL" -gt 0 ]; then + disk_read_mb=$(( (cur_read - prev_read) * 512 / 1048576 / INTERVAL )) + disk_write_mb=$(( (cur_write - prev_write) * 512 / 1048576 / INTERVAL )) + else + disk_read_mb=$(( (cur_read - prev_read) * 512 / 1048576 )) + disk_write_mb=$(( (cur_write - prev_write) * 512 / 1048576 )) + fi + fi + prev_read=$cur_read + prev_write=$cur_write + + echo "${ts},${epoch},${cpu_pct},${mem_info},${load},${docker_count},${disk_read_mb},${disk_write_mb}" >> "$OUTPUT" + + sleep "$INTERVAL" +done diff --git a/scripts/build-timing-report.sh b/scripts/build-timing-report.sh new file mode 100755 index 00000000000..40600c26d80 --- /dev/null +++ b/scripts/build-timing-report.sh @@ -0,0 +1,218 @@ +#!/bin/bash +# build-timing-report.sh — Parse SONiC build logs and generate per-package timing report +# +# Usage: ./scripts/build-timing-report.sh [target_dir] +# target_dir: path to sonic-buildimage/target (default: ./target) +# +# Parses HEADER/FOOTER timestamps from individual .log files and produces: +# 1. Sorted table of packages by duration (longest first) +# 2. Phase breakdown (bookworm vs trixie) +# 3. Build parallelism analysis +# 4. Parallelism efficiency stats +# 5. Gantt chart data (CSV) + +set -euo pipefail + +# Ensure scripts are executable +for script in "$(dirname "$0")"/build-dep-graph.py "$(dirname "$0")"/build-resource-monitor.sh; do + [ -f "$script" ] && [ ! -x "$script" ] && chmod +x "$script" +done + +TARGET_DIR="${1:-./target}" + +if [ ! -d "$TARGET_DIR" ]; then + echo "Error: target directory '$TARGET_DIR' not found" >&2 + exit 1 +fi + +# Collect timing data from all .log files +collect_timings() { + local dir="$1" + local phase="$2" + + find "$dir" -maxdepth 1 -name '*.log' ! -name '*-install.log' 2>/dev/null | while read -r logfile; do + local pkg + pkg=$(basename "$logfile" .log) + + # Extract timestamps + local start_line end_line + start_line=$(grep -m1 '^Build start time:' "$logfile" 2>/dev/null || true) + end_line=$(grep '^Build end time:' "$logfile" 2>/dev/null | tail -1 || true) + if [ -z "$start_line" ] || [ -z "$end_line" ]; then + continue + fi + + # Parse timestamps + local start_ts end_ts + start_ts=$(date -d "${start_line#Build start time: }" +%s 2>/dev/null || true) + end_ts=$(date -d "${end_line#Build end time: }" +%s 2>/dev/null || true) + + if [ -z "$start_ts" ] || [ -z "$end_ts" ]; then + continue + fi + + local duration=$(( end_ts - start_ts )) + local start_fmt end_fmt + start_fmt=$(date -d "@$start_ts" +%H:%M:%S 2>/dev/null) + end_fmt=$(date -d "@$end_ts" +%H:%M:%S 2>/dev/null) + + # Check if it was cached + local cached="no" + if grep -q 'CACHE_LOADED\|Skipping' "$logfile" 2>/dev/null; then + cached="yes" + fi + + echo "${duration}|${phase}|${pkg}|${start_ts}|${end_ts}|${start_fmt}|${end_fmt}|${cached}" + done +} + +echo "==============================================" +echo " SONiC Build Timing Report" +echo " Generated: $(date)" +echo " Target dir: $TARGET_DIR" +echo "==============================================" +echo "" + +# Collect from all phases +ALL_TIMINGS=$(mktemp) +trap 'rm -f "$ALL_TIMINGS"' EXIT + +for distro_dir in "$TARGET_DIR"/debs/*/; do + [ -d "$distro_dir" ] || continue + phase=$(basename "$distro_dir") + collect_timings "$distro_dir" "$phase" +done >> "$ALL_TIMINGS" + +for distro_dir in "$TARGET_DIR"/python-wheels/*/; do + [ -d "$distro_dir" ] || continue + phase=$(basename "$distro_dir") + collect_timings "$distro_dir" "wheel-$phase" +done >> "$ALL_TIMINGS" + +# Also check docker logs if they exist +for docker_dir in "$TARGET_DIR"/docker-*.gz.log; do + [ -f "$docker_dir" ] || continue + pkg=$(basename "$docker_dir" .log) + start_line=$(grep -m1 '^Build start time:' "$docker_dir" 2>/dev/null || true) + end_line=$(grep '^Build end time:' "$docker_dir" 2>/dev/null | tail -1 || true) + if [ -n "$start_line" ] && [ -n "$end_line" ]; then + start_ts=$(date -d "${start_line#Build start time: }" +%s 2>/dev/null || true) + end_ts=$(date -d "${end_line#Build end time: }" +%s 2>/dev/null || true) + if [ -n "$start_ts" ] && [ -n "$end_ts" ]; then + duration=$(( end_ts - start_ts )) + echo "${duration}|docker|${pkg}|${start_ts}|${end_ts}|$(date -d "@$start_ts" +%H:%M:%S)|$(date -d "@$end_ts" +%H:%M:%S)|no" + fi + fi +done >> "$ALL_TIMINGS" + +TOTAL_PACKAGES=$(wc -l < "$ALL_TIMINGS") + +if [ "$TOTAL_PACKAGES" -eq 0 ]; then + echo "No timing data found in $TARGET_DIR" + exit 0 +fi + +echo "Total packages with timing data: $TOTAL_PACKAGES" +echo "" + +# ---- Section 1: Top packages by duration ---- +echo "==============================================" +echo " TOP 30 SLOWEST PACKAGES" +echo "==============================================" +printf "%-55s %8s %-10s %8s %8s %s\n" "PACKAGE" "DURATION" "PHASE" "START" "END" "CACHED" +printf "%-55s %8s %-10s %8s %8s %s\n" "-------" "--------" "-----" "-----" "---" "------" + +sort -t'|' -k1 -rn "$ALL_TIMINGS" | head -30 | while IFS='|' read -r duration phase pkg start_ts end_ts start_fmt end_fmt cached; do + mins=$(( duration / 60 )) + secs=$(( duration % 60 )) + printf "%-55s %4dm %02ds %-10s %8s %8s %s\n" "$pkg" "$mins" "$secs" "$phase" "$start_fmt" "$end_fmt" "$cached" +done + +echo "" + +# ---- Section 2: Phase breakdown ---- +echo "==============================================" +echo " PHASE BREAKDOWN" +echo "==============================================" + +for phase in $(cut -d'|' -f2 "$ALL_TIMINGS" | sort -u); do + phase_data=$(grep "|${phase}|" "$ALL_TIMINGS") + count=$(echo "$phase_data" | wc -l) + total_cpu=$(echo "$phase_data" | awk -F'|' '{sum+=$1} END {print sum}') + earliest=$(echo "$phase_data" | awk -F'|' '{print $4}' | sort -n | head -1) + latest=$(echo "$phase_data" | awk -F'|' '{print $5}' | sort -n | tail -1) + wall_clock=$(( latest - earliest )) + + total_mins=$(( total_cpu / 60 )) + wall_mins=$(( wall_clock / 60 )) + wall_secs=$(( wall_clock % 60 )) + + if [ "$wall_clock" -gt 0 ]; then + efficiency=$(( total_cpu * 100 / wall_clock )) + else + efficiency=0 + fi + + printf " %-15s %3d pkgs %4d min CPU %3dm %02ds wall %3d%% parallelism\n" \ + "$phase" "$count" "$total_mins" "$wall_mins" "$wall_secs" "$efficiency" +done + +echo "" + +# ---- Section 3: Parallelism timeline (60-second samples) ---- +echo "==============================================" +echo " PARALLELISM OVER TIME" +echo "==============================================" + +GLOBAL_START=$(awk -F'|' '{print $4}' "$ALL_TIMINGS" | sort -n | head -1) +GLOBAL_END=$(awk -F'|' '{print $5}' "$ALL_TIMINGS" | sort -n | tail -1) +TOTAL_WALL=$(( GLOBAL_END - GLOBAL_START )) + +echo " Build window: $(date -d "@$GLOBAL_START" +%H:%M:%S) → $(date -d "@$GLOBAL_END" +%H:%M:%S) ($(( TOTAL_WALL / 60 ))m $(( TOTAL_WALL % 60 ))s)" +echo "" + +# Sample concurrency at 60-second intervals +echo " Time Concurrent Builds" +echo " ---- -----------------" +for offset in $(seq 0 60 "$TOTAL_WALL"); do + ts=$(( GLOBAL_START + offset )) + concurrent=$(awk -F'|' -v t="$ts" '$4 <= t && $5 > t' "$ALL_TIMINGS" | wc -l) + bar=$(printf '%*s' "$concurrent" '' | tr ' ' '█') + printf " %s %2d %s\n" "$(date -d "@$ts" +%H:%M:%S)" "$concurrent" "$bar" +done + +echo "" + +# ---- Section 4: Summary stats ---- +echo "==============================================" +echo " SUMMARY" +echo "==============================================" + +TOTAL_CPU=$(awk -F'|' '{sum+=$1} END {print sum}' "$ALL_TIMINGS") +CACHED_COUNT=$(grep '|yes$' "$ALL_TIMINGS" | wc -l) +MAX_CONCURRENT=$( + for offset in $(seq 0 10 "$TOTAL_WALL"); do + ts=$(( GLOBAL_START + offset )) + awk -F'|' -v t="$ts" '$4 <= t && $5 > t' "$ALL_TIMINGS" | wc -l + done | sort -n | tail -1 +) + +echo " Total packages: $TOTAL_PACKAGES" +echo " Cached packages: $CACHED_COUNT" +echo " Total CPU time: $(( TOTAL_CPU / 60 ))m $(( TOTAL_CPU % 60 ))s" +echo " Total wall time: $(( TOTAL_WALL / 60 ))m $(( TOTAL_WALL % 60 ))s" +echo " Max concurrent: $MAX_CONCURRENT" +if [ "$TOTAL_WALL" -gt 0 ]; then + echo " Parallelism ratio: $(( TOTAL_CPU * 100 / TOTAL_WALL ))% (CPU/wall)" +fi +echo "" + +# ---- Section 5: CSV export ---- +CSV_FILE="${TARGET_DIR}/build-timing.csv" +echo "package,phase,duration_sec,start_ts,end_ts,start_time,end_time,cached" > "$CSV_FILE" +sort -t'|' -k1 -rn "$ALL_TIMINGS" | while IFS='|' read -r duration phase pkg start_ts end_ts start_fmt end_fmt cached; do + echo "$pkg,$phase,$duration,$start_ts,$end_ts,$start_fmt,$end_fmt,$cached" +done >> "$CSV_FILE" +echo " CSV exported to: $CSV_FILE" +echo "" +echo "==============================================" diff --git a/scripts/build_debian_base_system.sh b/scripts/build_debian_base_system.sh index d4e4ab0593e..3e3b6242382 100755 --- a/scripts/build_debian_base_system.sh +++ b/scripts/build_debian_base_system.sh @@ -23,10 +23,11 @@ generate_version_file() sudo LANG=C chroot $FILESYSTEM_ROOT /bin/bash -c "dpkg-query -W -f '\${Package}==\${Version}\n'" > $TARGET_BASEIMAGE_PATH/versions-deb-${IMAGE_DISTRO}-${CONFIGURED_ARCH} } -MIRROR_URL=http://deb.debian.org/debian if [ "$MIRROR_SNAPSHOT" == y ]; then SNAPSHOT_TIMESTAMP=$(grep "^debian==" $TARGET/versions/default/versions-mirror | tail -n 1 | sed 's/.*==//') - MIRROR_URL=http://packages.trafficmanager.net/snapshot/debian/$SNAPSHOT_TIMESTAMP + MIRROR_URL=$BUILD_SNAPSHOT_URL/debian/$SNAPSHOT_TIMESTAMP +else + MIRROR_URL=http://deb.debian.org/debian fi if [ "$ENABLE_VERSION_CONTROL_DEB" != "y" ] || [ ! -d files/build/versions/host-base-image ]; then diff --git a/scripts/build_kvm_image.sh b/scripts/build_kvm_image.sh index 5546e6cbf4f..141fd070260 100755 --- a/scripts/build_kvm_image.sh +++ b/scripts/build_kvm_image.sh @@ -137,7 +137,7 @@ wait_kvm_ready echo "to kill kvm: sudo kill $kvm_pid" -./check_install.py -u $SONIC_USERNAME -P $PASSWD -p $KVM_PORT +./check_install.py -u $SONIC_USERNAME -P "$PASSWD" -p $KVM_PORT kill $kvm_pid diff --git a/scripts/build_mirror_config.sh b/scripts/build_mirror_config.sh index 7686997657c..465b7437d19 100755 --- a/scripts/build_mirror_config.sh +++ b/scripts/build_mirror_config.sh @@ -43,11 +43,11 @@ if [ "$MIRROR_SNAPSHOT" == y ]; then DEBIAN_SECURITY_TIMESTAMP=$(curl $DEFAULT_MIRROR_URL_PREFIX/debian-snapshot/debian-security/latest) fi - DEFAULT_MIRROR_URLS=http://deb.debian.org/debian/,http://packages.trafficmanager.net/snapshot/debian/$DEBIAN_TIMESTAMP/ - DEFAULT_MIRROR_SECURITY_URLS=http://deb.debian.org/debian-security/,http://packages.trafficmanager.net/snapshot/debian-security/$DEBIAN_SECURITY_TIMESTAMP/ + DEFAULT_MIRROR_URLS=http://deb.debian.org/debian/,$BUILD_SNAPSHOT_URL/debian/$DEBIAN_TIMESTAMP/ + DEFAULT_MIRROR_SECURITY_URLS=http://deb.debian.org/debian-security/,$BUILD_SNAPSHOT_URL/debian-security/$DEBIAN_SECURITY_TIMESTAMP/ if [ "$DISTRIBUTION" == "buster" ] || [ "$DISTRIBUTION" == "bullseye" ]; then - DEFAULT_MIRROR_URLS=http://archive.debian.org/debian/,http://packages.trafficmanager.net/snapshot/debian/$DEBIAN_TIMESTAMP/ + DEFAULT_MIRROR_URLS=http://archive.debian.org/debian/,$BUILD_SNAPSHOT_URL/debian/$DEBIAN_TIMESTAMP/ fi mkdir -p target/versions/default @@ -66,13 +66,36 @@ TEMPLATE=files/apt/sources.list.j2 [ -f $CONFIG_PATH/sources.list.j2 ] && TEMPLATE=$CONFIG_PATH/sources.list.j2 [ -f $CONFIG_PATH/sources.list.$ARCHITECTURE.j2 ] && TEMPLATE=$CONFIG_PATH/sources.list.$ARCHITECTURE.j2 -MIRROR_URLS=$MIRROR_URLS MIRROR_SECURITY_URLS=$MIRROR_SECURITY_URLS j2 $TEMPLATE | sed '/^$/N;/^\n$/D' > $CONFIG_PATH/sources.list.$ARCHITECTURE +# Write the sources.list via a temp file + atomic rename. Several +# build_debian.sh invocations run in parallel under `make -j`, one +# per rootfs target (broadcom, broadcom-dnx, broadcom-legacy-th, …), +# and they all funnel through this same shared CONFIG_PATH/ARCH +# pair when CONFIG_PATH is files/apt and ARCHITECTURE is amd64. A +# naive `> file` redirect truncates the destination first, leaving +# a window in which a sibling build_debian.sh can `cp` the file in +# its 0-byte state. The chroot then ends up with an empty sources.list, +# `apt-get update` succeeds trivially (nothing to fetch), and the +# next `apt-get install` fails with "Unable to locate package". +SOURCES_LIST=$CONFIG_PATH/sources.list.$ARCHITECTURE +SOURCES_LIST_TMP=$(mktemp "${SOURCES_LIST}.XXXXXX") +trap 'rm -f "$SOURCES_LIST_TMP"' EXIT +MIRROR_URLS=$MIRROR_URLS MIRROR_SECURITY_URLS=$MIRROR_SECURITY_URLS j2 $TEMPLATE | sed '/^$/N;/^\n$/D' > "$SOURCES_LIST_TMP" if [ "$MIRROR_SNAPSHOT" == y ]; then + # Escape special characters in BUILD_SNAPSHOT_URL for use in sed regex + ESCAPED_MIRROR_URL=$(echo "$BUILD_SNAPSHOT_URL" | sed 's/[\/&.]/\\&/g') # Set the snapshot mirror, and add the SET_REPR_MIRRORS flag - sed -i -e "/^#*deb.*packages.trafficmanager.net/! s/^#*deb/#&/" -e "\$a#SET_REPR_MIRRORS" $CONFIG_PATH/sources.list.$ARCHITECTURE + sed -i -e "/^#*deb.*$ESCAPED_MIRROR_URL/! s/^#*deb/#&/" -e "\$a#SET_REPR_MIRRORS" "$SOURCES_LIST_TMP" fi +chmod 664 "$SOURCES_LIST_TMP" +mv -f "$SOURCES_LIST_TMP" "$SOURCES_LIST" -# Handle apt retry count config +# Handle apt retry count config. Same race applies — write via temp +# and atomic rename. APT_RETRIES_COUNT_FILENAME=apt-retries-count TEMPLATE=files/apt/$APT_RETRIES_COUNT_FILENAME.j2 -j2 $TEMPLATE > $CONFIG_PATH/$APT_RETRIES_COUNT_FILENAME +APT_RETRIES_COUNT_DEST=$CONFIG_PATH/$APT_RETRIES_COUNT_FILENAME +APT_RETRIES_COUNT_TMP=$(mktemp "${APT_RETRIES_COUNT_DEST}.XXXXXX") +trap 'rm -f "$SOURCES_LIST_TMP" "$APT_RETRIES_COUNT_TMP"' EXIT +j2 $TEMPLATE > "$APT_RETRIES_COUNT_TMP" +chmod 644 "$APT_RETRIES_COUNT_TMP" +mv -f "$APT_RETRIES_COUNT_TMP" "$APT_RETRIES_COUNT_DEST" diff --git a/scripts/build_sbom.py b/scripts/build_sbom.py new file mode 100755 index 00000000000..1f4d491a5b1 --- /dev/null +++ b/scripts/build_sbom.py @@ -0,0 +1,1522 @@ +#!/usr/bin/env python3 +""" +build_sbom.py — SBOM aggregator for SONiC builds. + +Invoked between build_debian.sh and build_image.sh (from slave.mk) once +the host rootfs and all containers are assembled. Produces: + + target/.cdx.json (CycloneDX 1.6, sibling of the installer) + — is sonic-.bin + for ONIE installers, .swi for Arista + aboot, .img.gz for VS/VPP + +Inputs (env vars from slave.mk): + + ENABLE_SBOM must be 'y'; otherwise this is a no-op. + SBOM_SCAN_TOOL syft (default) | trivy + SBOM_FORMAT cyclonedx (default) | spdx | both + TARGET_PATH build output dir (default: 'target') + TARGET_MACHINE from onie-image.conf — names the SBOM file + CONFIGURED_ARCH amd64 | arm64 | armhf + CONFIGURED_PLATFORM broadcom | mellanox | vs | ... + SONIC_VERSION_CONTROL_COMPONENTS active pin policy (recorded in metadata) + SBOM_INSTALLER_DOCKERS space-separated list of docker .gz filenames + that actually ship in this installer. + SBOM_INSTALLER_DEBS space-separated list of .deb filenames + installed into the host rootfs. + SBOM_INSTALLER_WHEELS space-separated list of .whl filenames + installed into the host rootfs. + +Algorithm: + + 1. Walk per-artifact recipe-emit fragments (.cdx.json + next to each .deb / .whl / .gz). These are authoritative for + SONiC-built artifacts. + 2. For each in-scope scope (host rootfs + each in-scope container), + read the post-versions/ manifest written by sonic-build-hooks. + Add observation components for any (name, version) not already + covered by a recipe fragment. + 3. Optionally run the configured scanner (syft / trivy) as a wide + net to catch transitive deps and language-ecosystem items the + observation pass missed. + 4. Dedupe by (purl, arch): when multiple sources name the same + component, recipe-emit wins (it has pedigree + patches data). + 5. Annotate top-level metadata with the build context. + 6. Emit one CycloneDX 1.6 document as the sibling of the .bin. + +Failure mode: when ENABLE_SBOM=y the user has opted into SBOM emission +and a quietly-incomplete SBOM is worse than a build failure. The +aggregator validates that core inputs exist (host rootfs, declared +installer dockers, scanner binary) and exits non-zero if any are +missing. Set SBOM_STRICT=n to downgrade these to warnings for +debugging or one-off partial emits. Soft optional features +(SPDX conversion, provenance emit, license resolution) continue to +warn-and-continue. +""" + +import datetime +import hashlib +import json +import os +import re +import subprocess +import sys +from typing import Any, Optional + + +def warn(msg: str) -> None: + sys.stderr.write(f"[build_sbom.py] WARNING: {msg}\n") + + +def info(msg: str) -> None: + sys.stderr.write(f"[build_sbom.py] {msg}\n") + + +def error(msg: str) -> None: + sys.stderr.write(f"[build_sbom.py] ERROR: {msg}\n") + + +class SbomInputMissing(Exception): + """Raised in strict mode when a required SBOM input is missing. + + The build_sbom recipe in slave.mk treats this as fatal — the user + opted into SBOM generation via ENABLE_SBOM=y and we can't honor + that opt-in if a core data source (host rootfs, installer docker, + scanner binary) is absent. + """ + + +def check_required_inputs( + target_path: str, + target_machine: str, + installer_dockers: list, + scan_tool: str, +) -> None: + """Validate that everything we declared we'd consume is actually + present on disk. Raises SbomInputMissing on the first failure in + strict mode; logs a warning and returns in lenient mode. + + Strict by default when ENABLE_SBOM=y; opt out with SBOM_STRICT=n + for debugging or one-off partial SBOM emits. + """ + strict = os.environ.get("SBOM_STRICT", "y").lower() == "y" + problems: list[str] = [] + + # 1. Host rootfs (sibling of target/, populated by build_debian.sh). + # Without it the SBOM is missing grub/kernel/host-utility/docker + # daemon visibility — the largest CVE surface on the .bin. + fsroot = os.path.join( + os.path.dirname(os.path.abspath(target_path)), + f"fsroot-{target_machine}", + ) + if not os.path.isdir(fsroot): + problems.append( + f"host rootfs not found at {fsroot}; cannot scan " + f"host-installed packages (grub, kernel, docker daemon, " + f"etc.). The build_sbom hook must run after build_debian.sh " + f"and before fsroot cleanup." + ) + + # 2. Every declared installer docker must exist as a .gz in target/. + # These ship in the .bin; missing means a broken build that + # we should not pretend to inventory. + for docker in installer_dockers: + gz_path = os.path.join(target_path, docker) + if not os.path.isfile(gz_path): + problems.append( + f"installer docker {docker} declared in " + f"SBOM_INSTALLER_DOCKERS but missing at {gz_path}" + ) + + # 3. Scanner binary. Without it the SBOM loses CPE-tagged + # components and grype can't perform NVD matching downstream. + if scan_tool and scan_tool not in ("none", "off", "skip"): + scanner_bin = install_scanner(scan_tool) + if not scanner_bin or not os.path.isfile(scanner_bin): + problems.append( + f"scanner '{scan_tool}' could not be installed via " + f"scripts/install_sbom_tool.sh; without it the SBOM " + f"loses host-rootfs and container-scan coverage" + ) + + if not problems: + return + + msg = "SBOM input validation failed:\n - " + "\n - ".join(problems) + if strict: + error(msg) + error("Set SBOM_STRICT=n to continue with a partial SBOM " + "(not recommended).") + raise SbomInputMissing(msg) + else: + warn(msg) + warn("SBOM_STRICT=n; continuing with a partial SBOM.") + + +# --------------------------------------------------------------------------- +# Helpers +# --------------------------------------------------------------------------- + + +def split_env_list(name: str) -> list: + return [x.strip() for x in os.environ.get(name, "").split() if x.strip()] + + +def now_iso() -> str: + epoch = os.environ.get("SOURCE_DATE_EPOCH") + if epoch: + try: + return datetime.datetime.fromtimestamp( + int(epoch), tz=datetime.timezone.utc + ).strftime("%Y-%m-%dT%H:%M:%SZ") + except Exception: + pass + return datetime.datetime.now(datetime.timezone.utc).strftime( + "%Y-%m-%dT%H:%M:%SZ" + ) + + +def load_json(path: str) -> Optional[dict]: + try: + with open(path) as f: + return json.load(f) + except Exception: + return None + + +def file_sha256(path: str) -> Optional[str]: + try: + h = hashlib.sha256() + with open(path, "rb") as f: + for chunk in iter(lambda: f.read(65536), b""): + h.update(chunk) + return h.hexdigest() + except Exception: + return None + + +def run(cmd: list, timeout: int = 600) -> tuple: + """Returns (returncode, stdout, stderr).""" + try: + r = subprocess.run( + cmd, capture_output=True, text=True, timeout=timeout, check=False + ) + return r.returncode, r.stdout, r.stderr + except subprocess.TimeoutExpired: + return 124, "", "timeout" + except Exception as e: + return 1, "", str(e) + + +# --------------------------------------------------------------------------- +# Recipe-emit fragment collection +# --------------------------------------------------------------------------- + + +class FragmentIndex: + """Walks target/ for .cdx.json sidecars.""" + + def __init__(self, target_path: str): + self.target_path = target_path + self.fragments: dict = {} # filename → fragment-component + self.all: list = [] + self._load() + + def _load(self): + if not os.path.isdir(self.target_path): + return + for root, _, files in os.walk(self.target_path): + # Skip the sbom-tools cache and per-scope tmp dirs we created. + if "sbom-tools" in root or "sbom-tmp" in root: + continue + for fn in files: + if fn.endswith(".cdx.json"): + # Only consume sidecar fragments — skip the final + # aggregate output if it has already been written + # in a prior run. The aggregate is named after the + # installer artifact (sonic-.bin /.swi + # / .img.gz), so match the 'sonic-' prefix plus + # any of the known installer extensions. + if fn.startswith("sonic-") and ( + ".bin.cdx.json" in fn + or ".swi.cdx.json" in fn + or ".img.gz.cdx.json" in fn + ): + continue + doc = load_json(os.path.join(root, fn)) + if not doc: + continue + meta_props = { + p.get("name"): p.get("value") + for p in doc.get("metadata", {}).get("properties", []) + } + if meta_props.get("sonic:fragment_kind") != "recipe-emit": + continue + for comp in doc.get("components", []): + # Index by the artifact filename so we can match + # against the installer's in-scope lists. + artifact_filename = None + for prop in comp.get("properties", []): + if prop.get("name") == "sonic:artifact_filename": + artifact_filename = prop.get("value") + break + if artifact_filename: + self.fragments[artifact_filename] = comp + self.all.append(comp) + + def for_filename(self, name: str) -> Optional[dict]: + return self.fragments.get(name) + + +# --------------------------------------------------------------------------- +# Observation: post-versions/ manifests +# --------------------------------------------------------------------------- + + +_PKG_VER_RE = re.compile(r"^([^=]+)==(.+)$") + + +def parse_versions_file(path: str) -> list: + """Reads a versions-deb-* or versions-py3-* manifest into [(name, ver)].""" + out = [] + try: + with open(path) as f: + for line in f: + line = line.strip() + if not line or line.startswith("#"): + continue + m = _PKG_VER_RE.match(line) + if m: + out.append((m.group(1).strip(), m.group(2).strip())) + except Exception as e: + warn(f"could not read {path}: {e}") + return out + + +def find_post_versions(target_path: str, scope: str, kind: str, + arch: str) -> list: + """Locate post-versions/versions--*- for a scope. + + scope is e.g. 'host-image' or 'dockers/docker-fpm-frr'. + kind is 'deb' or 'py3'. + """ + base = os.path.join(target_path, "versions", scope, "post-versions") + if not os.path.isdir(base): + return [] + matches = [] + for fn in os.listdir(base): + if fn.startswith(f"versions-{kind}-") and fn.endswith(f"-{arch}"): + matches.append(os.path.join(base, fn)) + return sorted(matches) + + +def find_copyright_tarballs(target_path: str) -> list: + """Find every per-scope copyrights.tar.gz under target/versions/.""" + return _find_tarballs(target_path, "copyrights.tar.gz") + + +def find_lockfile_tarballs(target_path: str) -> list: + """Find every per-scope lockfiles.tar.gz under target/versions/.""" + return _find_tarballs(target_path, "lockfiles.tar.gz") + + +def _find_tarballs(target_path: str, name: str) -> list: + base = os.path.join(target_path, "versions") + if not os.path.isdir(base): + return [] + out = [] + for root, _, files in os.walk(base): + for fn in files: + if fn == name: + out.append(os.path.join(root, fn)) + return sorted(out) + + +def parse_lockfiles_for_scope(target_path: str, scope: str) -> list: + """Parse only the lockfiles under a single scope dir + (e.g. 'dockers/docker-ptf' or 'host-image'). Used by the + per-container SBOM emit path so a container's sidecar SBOM only + contains its own transitive lockfile deps.""" + tarball = os.path.join( + target_path, "versions", scope, "post-versions", "lockfiles.tar.gz", + ) + if not os.path.isfile(tarball): + return [] + out_json = os.path.join( + target_path, + f"sbom-lockfile-components-{scope.replace('/', '-')}.json", + ) + script = os.path.join(os.path.dirname(__file__), + "sbom_parse_lockfiles.py") + rc, _, err = run( + ["python3", script, "--output", out_json, "--lockfiles", tarball], + timeout=300, + ) + if rc != 0: + warn(f"lockfile parser failed for scope {scope} " + f"(rc={rc}): {err.strip()[:200]}") + return [] + try: + with open(out_json) as f: + data = json.load(f) + return data.get("components", []) + except Exception as e: + warn(f"could not read scoped lockfile parser output: {e}") + return [] + + +def parse_lockfiles(target_path: str) -> list: + """Run scripts/sbom_parse_lockfiles.py over every harvested + lockfiles.tar.gz; return the list of CycloneDX components.""" + tarballs = find_lockfile_tarballs(target_path) + if not tarballs: + return [] + out_json = os.path.join(target_path, "sbom-lockfile-components.json") + script = os.path.join(os.path.dirname(__file__), + "sbom_parse_lockfiles.py") + cmd = ["python3", script, "--output", out_json] + for t in tarballs: + cmd.extend(["--lockfiles", t]) + rc, _, err = run(cmd, timeout=600) + if rc != 0: + warn(f"lockfile parser failed (rc={rc}): {err.strip()[:200]}") + return [] + try: + with open(out_json) as f: + data = json.load(f) + return data.get("components", []) + except Exception as e: + warn(f"could not read lockfile parser output: {e}") + return [] + + +def _license_cache_dir() -> str: + """Cache directory for license resolver output. Sibling to the + scanner cache. Lives under target/ so `make reset` invalidates it + automatically.""" + target_path = os.environ.get("TARGET_PATH", "target") + d = os.path.join(target_path, "sbom-tools", "license-cache") + try: + os.makedirs(d, exist_ok=True) + except OSError: + pass + return d + + +def _license_cache_key(tarballs: list) -> str: + """SHA-256 over the sorted SHA-256s of every copyrights.tar.gz + input. The resolver's output is a pure function of the input + tarballs' content, so this is the right cache key — content + drift in any tarball forces a re-resolve.""" + h = hashlib.sha256() + for t in sorted(tarballs): + sha = file_sha256(t) + if sha: + h.update(sha.encode()) + return h.hexdigest() + + +def resolve_licenses(target_path: str) -> dict: + """Returns { pkg_name: spdx_expression }. + + Runs scripts/sbom_resolve_licenses.py against every copyrights.tar.gz + found under target/. The resolver does the heavy lifting (DEP-5 + parsing, licensecheck fallback, SPDX mapping). + + Output is cached under target/sbom-tools/license-cache/.json + keyed by a hash of the input tarballs' content. The 3 per-variant + aggregator invocations (broadcom / broadcom-dnx / broadcom-legacy-th) + share the same input copyrights tarballs — they're harvested + per-container by collect_version_files, and most containers are + identical across variants — so without caching the resolver was + running ~3x and producing identical output each time. Cache lives + under target/ so `make reset` invalidates naturally. + """ + tarballs = find_copyright_tarballs(target_path) + if not tarballs: + return {} + + cache_key = _license_cache_key(tarballs) + cache_file = os.path.join(_license_cache_dir(), f"{cache_key}.json") + if os.path.isfile(cache_file): + try: + with open(cache_file) as f: + data = json.load(f) + return data.get("resolved", {}) + except Exception: + pass + + out_json = os.path.join(target_path, "sbom-licenses.json") + script = os.path.join(os.path.dirname(__file__), + "sbom_resolve_licenses.py") + cmd = ["python3", script, "--output", out_json] + for t in tarballs: + cmd.extend(["--copyrights", t]) + rc, _, err = run(cmd, timeout=600) + if rc != 0: + warn(f"license resolver failed (rc={rc}): {err.strip()[:200]}") + return {} + try: + with open(out_json) as f: + data = json.load(f) + except Exception as e: + warn(f"could not read resolver output: {e}") + return {} + + # Populate the cache for subsequent per-variant aggregator runs. + if data.get("resolved"): + try: + tmp = cache_file + ".tmp" + with open(tmp, "w") as f: + json.dump(data, f) + os.replace(tmp, cache_file) + except Exception as e: + warn(f"could not write license cache {cache_file}: {e}") + + return data.get("resolved", {}) + + +def apply_licenses(components: list, license_map: dict) -> tuple: + """Attach licenses[] to components that lack one. + Returns (with_license_count, noassertion_count).""" + resolved = 0 + noassertion = 0 + for c in components: + if c.get("licenses"): + resolved += 1 + continue + name = (c.get("name") or "").lower() + if not name: + continue + spdx = license_map.get(name) + if not spdx: + # Debian binary packages often have a source-package name that + # carries the copyright. Don't have that here; just leave it + # NOASSERTION. + noassertion += 1 + continue + if spdx == "NOASSERTION": + c["licenses"] = [{"license": {"id": "NOASSERTION"}}] + noassertion += 1 + else: + c["licenses"] = [{"expression": spdx}] + resolved += 1 + return resolved, noassertion + + +def observation_components_for_scope( + target_path: str, scope: str, arch: str, supplier: str, +) -> list: + """Emit observation-only components for everything in post-versions/.""" + components = [] + seen: set = set() + + for vfile in find_post_versions(target_path, scope, "deb", arch): + for name, ver in parse_versions_file(vfile): + key = (name, ver, arch) + if key in seen: + continue + seen.add(key) + comp: dict[str, Any] = { + "bom-ref": f"pkg:deb/debian/{name}@{ver}?arch={arch}", + "type": "library", + "name": name, + "version": ver, + "purl": f"pkg:deb/debian/{name}@{ver}?arch={arch}", + "supplier": {"name": supplier}, + "properties": [ + {"name": "sonic:fragment_kind", "value": "observation"}, + {"name": "sonic:scope", "value": scope}, + {"name": "sonic:arch", "value": arch}, + ], + } + components.append(comp) + + for vfile in find_post_versions(target_path, scope, "py3", arch): + for name, ver in parse_versions_file(vfile): + norm = name.replace("_", "-").lower() + key = ("pypi", norm, ver) + if key in seen: + continue + seen.add(key) + comp = { + "bom-ref": f"pkg:pypi/{norm}@{ver}", + "type": "library", + "name": norm, + "version": ver, + "purl": f"pkg:pypi/{norm}@{ver}", + "supplier": {"name": "PyPI"}, + "properties": [ + {"name": "sonic:fragment_kind", "value": "observation"}, + {"name": "sonic:scope", "value": scope}, + ], + } + components.append(comp) + + return components + + +# --------------------------------------------------------------------------- +# Scanner pass (syft / trivy) +# --------------------------------------------------------------------------- + + +def install_scanner(tool: str) -> Optional[str]: + """Call scripts/install_sbom_tool.sh; return the path to the binary.""" + script = os.path.join(os.path.dirname(__file__), "install_sbom_tool.sh") + rc, out, err = run([script, tool], timeout=300) + if rc != 0: + warn(f"install_sbom_tool.sh {tool} failed (rc={rc}): {err.strip()}") + return None + return out.strip() or None + + +def _scanner_cache_dir() -> str: + """Cache directory for scanner outputs, sibling to the scanner binary. + + Lives under target/ so `make reset` (which wipes target/) invalidates + the cache automatically — no stale entries across resets. + """ + target_path = os.environ.get("TARGET_PATH", "target") + d = os.path.join(target_path, "sbom-tools", "syft-cache") + try: + os.makedirs(d, exist_ok=True) + except OSError: + pass + return d + + +def _scanner_cache_lookup( + tool: str, fs_path: str, +) -> tuple: + """Return (sha256, cached_components | None) for a file-based scan. + + Returns (None, None) if SHA-256 cannot be computed (e.g. file + disappeared between exists-check and hash). A non-None sha with + None components indicates a cache miss that the caller can fill + via _scanner_cache_store after running the scanner. + """ + sha = file_sha256(fs_path) + if not sha: + return None, None + cache_file = os.path.join(_scanner_cache_dir(), f"{tool}-{sha}.json") + if os.path.isfile(cache_file): + try: + with open(cache_file) as f: + return sha, json.load(f) + except Exception: + pass + return sha, None + + +def _scanner_cache_store(tool: str, sha: str, components: list) -> None: + """Persist scanner output keyed by file SHA-256. Only called for + non-empty results — an empty list could be a genuine zero-component + scan or a scanner failure that returned []; caching the latter would + poison subsequent variants.""" + if not sha or not components: + return + cache_file = os.path.join(_scanner_cache_dir(), f"{tool}-{sha}.json") + try: + tmp = cache_file + ".tmp" + with open(tmp, "w") as f: + json.dump(components, f) + os.replace(tmp, cache_file) + except Exception as e: + warn(f"could not write scanner cache {cache_file}: {e}") + + +def run_scanner(scanner_bin: str, tool: str, scan_target: str) -> list: + """Run scanner against a target; return components[] from output. + + scan_target may carry a syft scheme prefix (e.g. 'oci-archive:'). + SONiC's docker .gz files are gzipped OCI archives, and syft's + archive readers don't pipe through gzip — so for the oci-archive + case we transparently decompress to a temp file first. + + File-based scans (oci-archive:, fs paths) are cached by SHA-256 of + the input file. Across the 3 ASIC variants of a single build + (broadcom, broadcom-dnx, broadcom-legacy-th), the same docker .gz + files are scanned 3 times by the aggregator's per-variant + invocations; the cache short-circuits the 2nd and 3rd hits. The + dir: scheme (host rootfs) is not cached — fsroot-/ differs + per variant and a directory-tree hash would be expensive. + """ + scheme = "" + fs_path = scan_target + if ":" in scan_target: + scheme, fs_path = scan_target.split(":", 1) + if not os.path.exists(fs_path): + return [] + + # Cache lookup for file-based scans only. dir: scans are not + # cacheable because (a) hashing a directory tree is expensive and + # (b) fsroot-/ differs per variant — no reuse anyway. + cache_sha = None + if scheme != "dir" and os.path.isfile(fs_path): + cache_sha, cached = _scanner_cache_lookup(tool, fs_path) + if cached is not None: + return cached + + # syft's oci-archive reader doesn't handle gzip-wrapped tar. + # Stream-decompress to a temp file for the duration of the scan. + tmp_path = None + if (tool == "syft" and scheme == "oci-archive" + and _is_gzip(fs_path)): + import gzip + import tempfile + with tempfile.NamedTemporaryFile(suffix=".tar", delete=False) as tf: + tmp_path = tf.name + with gzip.open(fs_path, "rb") as gz: + while True: + chunk = gz.read(8 * 1024 * 1024) + if not chunk: + break + tf.write(chunk) + scan_target = f"{scheme}:{tmp_path}" + + try: + if tool == "syft": + cmd = [scanner_bin, scan_target, "-o", "cyclonedx-json", "-q"] + elif tool == "trivy": + cmd = [scanner_bin, "fs", "--format", "cyclonedx", "--quiet", + scan_target] + else: + return [] + result = _run_scanner_inner(cmd, tool, scan_target) + if cache_sha and result: + _scanner_cache_store(tool, cache_sha, result) + return result + finally: + if tmp_path and os.path.exists(tmp_path): + os.unlink(tmp_path) + + +def _is_gzip(path: str) -> bool: + """Cheap gzip-magic-bytes sniff.""" + try: + with open(path, "rb") as f: + return f.read(2) == b"\x1f\x8b" + except Exception: + return False + + +def _run_scanner_inner(cmd: list, tool: str, scan_target: str) -> list: + rc, out, err = run(cmd, timeout=900) + if rc != 0: + warn(f"{tool} scan of {scan_target} failed (rc={rc}): " + f"{err.strip()[:200]}") + return [] + try: + doc = json.loads(out) + except Exception as e: + warn(f"could not parse {tool} output for {scan_target}: {e}") + return [] + comps = doc.get("components") or [] + for c in comps: + c.setdefault("properties", []).append( + {"name": "sonic:fragment_kind", "value": "scanner"} + ) + c["properties"].append( + {"name": "sonic:scanner", "value": tool} + ) + return comps + + +# --------------------------------------------------------------------------- +# Merge with recipe-emit-wins dedupe +# --------------------------------------------------------------------------- + + +def _component_arch(c: dict) -> str: + for p in c.get("properties") or []: + if p.get("name") == "sonic:arch": + return p.get("value") or "" + return "" + + +# Suffixes that get added downstream of the recipe's filename version +# but before dpkg records the actually-installed version. We strip +# these (and a leading epoch like '1:') when computing a normalized +# dedupe key so the recipe-emit fragment 'openssh-server 10.0p1-7' +# matches the observation 'openssh-server 1:10.0p1-7+fips'. The pattern +# preserves the upstream-version prefix while eating the +# debian-build-system noise. +_VERSION_SUFFIX_RE = re.compile( + r"(?:\+(?:fips|sonic(?:\.\d+)?|b\d+(?:sonic\d*)?|deb\d+u\d+))+$" +) +_VERSION_EPOCH_RE = re.compile(r"^\d+:") + + +def _normalize_version(v: str) -> str: + v = _VERSION_EPOCH_RE.sub("", v) + # Strip the suffix chain iteratively (handles +sonic.0+b1). + while True: + m = _VERSION_SUFFIX_RE.search(v) + if not m: + break + v = v[: m.start()] + return v + + +def _dedupe_keys(c: dict) -> list: + """All keys a component should match against during dedupe. + + Returns the explicit PURL/bom-ref plus two normalized + (name, version, arch) tuples — one with raw version (catches exact + matches) and one with epoch+suffix stripped (catches the case where + recipe-emit uses the filename version `10.0p1-7` and the eventual + installed deb is `1:10.0p1-7+fips`). The two-key approach means: + - Exact version matches still dedupe (same as before). + - Different upstream versions of the same package stay distinct + (e.g. bash 5.2.15 in bookworm vs 5.2.37 in trixie). + - Only the build-system suffix drift collapses. + """ + keys = [] + purl = c.get("purl") + if purl: + keys.append(("purl", purl)) + bom_ref = c.get("bom-ref") + if bom_ref and bom_ref != purl: + keys.append(("bom-ref", bom_ref)) + name = (c.get("name") or "").lower() + version = c.get("version") or "" + arch = _component_arch(c) + if name and version: + keys.append(("nva", name, version, arch)) + # Always emit the normalized key, even when normalize is a no-op, + # so that a recipe-emit component (whose filename version usually + # IS the normalized form) shares a key with the observation + # component (whose dpkg version carries the +fips/+sonic/epoch + # noise). Without this, the two never see each other. + norm = _normalize_version(version) or version + keys.append(("nva-norm", name, norm, arch)) + return keys + + +# Names that identify kernel-module packages whose runtime depends on +# the Linux kernel binary. Used to build the CycloneDX dependencies[] +# graph so consumers can trace ABI-incompatible-kernel risks. +_KERNEL_MODULE_PATTERNS = [ + re.compile(r"^opennsl-modules"), # Broadcom XGS / DNX + re.compile(r"^sx-kernel"), # Mellanox SX + re.compile(r"^ionic-modules"), # AMD/Pensando ionic + re.compile(r"^mrvlteralynx"), # Marvell Teralynx + re.compile(r"^.*-dkms$"), # DKMS module debs (Bluefield etc.) + re.compile(r"^sonic-platform-modules-"), # vendor platform-modules + re.compile(r"^platform-modules-"), # micas-style + re.compile(r"^saibcm-modules"), # Broadcom SAI kernel piece + re.compile(r"^.*-kernel-modules$"), +] + + +def _is_kernel_module(name: str) -> bool: + return any(p.match(name or "") for p in _KERNEL_MODULE_PATTERNS) + + +def _is_kernel_image(name: str) -> bool: + """Match the primary linux-image fragment. Exclude debug/headers/kbuild.""" + n = name or "" + if not n.startswith("linux-image-"): + return False + # Reject -dbg and -dbgsym variants; the primary kernel is what + # modules link against at runtime. + if n.endswith("-dbg") or n.endswith("-dbgsym") or "-unsigned-dbg" in n: + return False + return True + + +def build_dependency_graph(components: list) -> list: + """Return a CycloneDX dependencies[] array recording the edges + we can derive from recipe-emit metadata. + + Three edge classes are emitted into a single unscoped graph + (CycloneDX 1.6 dependencies[] doesn't distinguish build-time vs + runtime; analytics that need the split should read the + sonic:build_depends / sonic:runtime_depends properties off the + components themselves): + + 1. Kernel-module -> kernel-image. Out-of-tree modules (Broadcom + OPENNSL, Mellanox SX, etc.) are built against a specific + kernel ABI; recording the edge lets consumers reason about + kernel-ABI-compatible upgrade paths and CVE blast radius. + + 2. SONiC-built .deb -> declared build/runtime deps. Read from + sonic:build_depends / sonic:runtime_depends string properties + that sbom_fragment.py copies out of the recipe's $(pkg)_DEPENDS + and $(pkg)_RDEPENDS makefile variables. The property strings + are space-separated .deb filenames that we resolve back to the + sibling fragment's bom-ref via sonic:artifact_filename. Filenames + that don't resolve (almost always upstream packages from + Debian for which we have no recipe-emit fragment) are recorded + as a sonic:unresolved_deps property on the component for audit; + they don't appear in the graph. + + 3. SONiC-built .deb -> per-binary language deps shipped inside. + sbom_fragment.py emits each Rust crate / Go module / Python + dist-info entry as a recipe-emit-{rust,go,python} component + carrying sonic:source_deb=; we reverse that + into an edge from the .deb's bom-ref to the language-dep's + bom-ref so a consumer can walk swss_*.deb -> tokio@1.x or + sonic-gnmi_*.deb -> github.com/openconfig/gnmi@v0.10 without + parsing properties. + """ + # filename -> bom-ref lookup over the merged component set. The + # same resolution path is used by all three edge classes that need + # to refer to a sibling component by its on-disk artifact name. + filename_to_ref: dict = {} + for c in components: + ref = c.get("bom-ref") + if not ref: + continue + for prop in c.get("properties", []) or []: + if prop.get("name") == "sonic:artifact_filename": + fn = prop.get("value") + if fn: + filename_to_ref[fn] = ref + break + + # Accumulate as ref -> set(dependsOn refs) so multiple edge + # classes that converge on the same source component merge into + # a single CycloneDX dependencies[] entry per ref. + edges: dict = {} + + # (1) kernel-module -> kernel-image + kernel_refs = [ + c["bom-ref"] for c in components + if _is_kernel_image(c.get("name")) and c.get("bom-ref") + ] + if kernel_refs: + kernel_set = set(kernel_refs) + for c in components: + if not _is_kernel_module(c.get("name") or ""): + continue + ref = c.get("bom-ref") + if ref: + edges.setdefault(ref, set()).update(kernel_set) + + # (2) declared build/runtime deps (resolved to sibling fragments) + for c in components: + ref = c.get("bom-ref") + if not ref: + continue + build_dep_str = "" + runtime_dep_str = "" + for prop in c.get("properties", []) or []: + n = prop.get("name") + if n == "sonic:build_depends": + build_dep_str = prop.get("value", "") or "" + elif n == "sonic:runtime_depends": + runtime_dep_str = prop.get("value", "") or "" + if not (build_dep_str or runtime_dep_str): + continue + dep_filenames = set(build_dep_str.split()) | set(runtime_dep_str.split()) + resolved: set = set() + unresolved: set = set() + for fn in dep_filenames: + if not fn: + continue + tgt = filename_to_ref.get(fn) + if tgt and tgt != ref: + resolved.add(tgt) + elif not tgt: + unresolved.add(fn) + if resolved: + edges.setdefault(ref, set()).update(resolved) + if unresolved: + props = c.setdefault("properties", []) + existing = None + for p in props: + if p.get("name") == "sonic:unresolved_deps": + existing = p + break + joined = " ".join(sorted(unresolved)) + if existing is not None: + merged = sorted(set( + (existing.get("value", "") or "").split() + ) | unresolved) + existing["value"] = " ".join(merged) + else: + props.append({ + "name": "sonic:unresolved_deps", + "value": joined, + }) + + # (3) per-binary language deps (recipe-emit-{rust,go,python}) -> + # their owning .deb. sbom_fragment.py attaches sonic:source_deb to + # every such component; we look up the .deb's bom-ref and reverse + # the attribution into a dependsOn edge. + for c in components: + crate_ref = c.get("bom-ref") + if not crate_ref: + continue + source_deb = None + is_lang_dep = False + for prop in c.get("properties", []) or []: + n = prop.get("name") + v = prop.get("value", "") + if n == "sonic:source_deb": + source_deb = v + elif n == "sonic:fragment_kind" and v.startswith("recipe-emit-") and v != "recipe-emit": + is_lang_dep = True + if not (is_lang_dep and source_deb): + continue + deb_ref = filename_to_ref.get(source_deb) + if deb_ref and deb_ref != crate_ref: + edges.setdefault(deb_ref, set()).add(crate_ref) + + deps = [ + {"ref": ref, "dependsOn": sorted(targets)} + for ref, targets in edges.items() + if targets + ] + return deps + + +def merge_components(*sources: list) -> list: + """Dedupe by (purl) and (name, version, arch). Sources are passed in + PRIORITY order; first occurrence wins for the base record. But for + components dropped by dedupe, we *promote* their CPE list onto the + winner — recipe-emit fragments carry rich SONiC provenance but no + CPE, while syft (lower priority) produces CPEs that grype needs for + NVD-based CVE matching when distro detection isn't available. + """ + seen: dict = {} # dedupe key -> winner index in `out` + out: list = [] + for src in sources: + for c in src: + keys = _dedupe_keys(c) + if not keys: + continue + winner_idx = next((seen[k] for k in keys if k in seen), None) + if winner_idx is not None: + _promote_cpe(out[winner_idx], c) + continue + for k in keys: + seen[k] = len(out) + out.append(c) + return out + + +def _promote_cpe(winner: dict, loser: dict) -> None: + """Move CPE data from a deduped-out record onto the winner. + + Grype's NVD matcher relies on the `cpe` field; recipe-emit + fragments don't produce one, but syft does. Without this + promotion, every recipe-built Debian/sonic package loses the CPE + that would have let grype match it against the Debian/NVD CVE + feeds. + """ + cpe = loser.get("cpe") + if cpe and not winner.get("cpe"): + winner["cpe"] = cpe + cpes = loser.get("cpes") + if cpes and not winner.get("cpes"): + winner["cpes"] = cpes + + +# --------------------------------------------------------------------------- +# Top-level orchestration +# --------------------------------------------------------------------------- + + +def _container_main(container_filename: str) -> int: + """Produce a sidecar SBOM for a single container archive. + + Used for test containers (docker-ptf, docker-sonic-mgmt) that are + out-of-scope for the .bin SBOM but still need their own + vulnerability/provenance surface. Also used for in-scope + containers, where it complements the merged .bin SBOM with a + container-level view useful for diffing and per-container + security scanning. + + Output: target/.sbom.cdx.json + """ + target_path = os.environ.get("TARGET_PATH", "target") + arch = os.environ.get( + "CONFIGURED_ARCH", + subprocess.run( + ["dpkg", "--print-architecture"], + capture_output=True, text=True, check=False, + ).stdout.strip() or "amd64", + ) + platform = os.environ.get("CONFIGURED_PLATFORM", "") + scan_tool = os.environ.get("SBOM_SCAN_TOOL", "syft") + vcc = os.environ.get("SONIC_VERSION_CONTROL_COMPONENTS", "") + + gz_path = os.path.join(target_path, container_filename) + if not os.path.isfile(gz_path): + info(f"container archive not found: {gz_path}; skipping.") + return 0 + + cname = container_filename.replace(".gz", "").replace("-dbg", "") + out_path = os.path.join( + target_path, f"{container_filename}.sbom.cdx.json" + ) + info(f"Building per-container SBOM for {container_filename}") + + # Recipe-emit fragment for this container (if any). + fragments = FragmentIndex(target_path) + frag = fragments.for_filename(container_filename) + recipe_components = [frag] if frag else [] + + # Synthesize a container-typed parent component if no recipe + # fragment exists (out-of-scope test containers go this path). + if frag: + container_comp = frag + else: + version = os.environ.get("SONIC_IMAGE_VERSION", "0.0.0") + container_comp = { + "bom-ref": f"pkg:oci/{cname}@{version}?arch={arch}", + "type": "container", + "name": cname, + "version": version, + "purl": f"pkg:oci/{cname}@{version}?arch={arch}", + "properties": [ + {"name": "sonic:fragment_kind", "value": "observation"}, + {"name": "sonic:arch", "value": arch}, + ], + } + sha = file_sha256(gz_path) + if sha: + container_comp["hashes"] = [ + {"alg": "SHA-256", "content": sha} + ] + + # Observation: only this container's scope. + scope = f"dockers/{cname}" + obs = observation_components_for_scope( + target_path, scope, arch, "Debian", + ) + info(f"Container observation: {len(obs)} components") + + # Lockfile-derived: only this container's scope. + lockfile_components = parse_lockfiles_for_scope(target_path, scope) + info(f"Lockfile-derived: {len(lockfile_components)} components") + + # Scanner: this single .gz. SONiC's docker .gz files are OCI + # archives (not docker-archive tarballs), so syft needs the + # 'oci-archive:' scheme. + scanner_components: list = [] + if scan_tool and scan_tool not in ("none", "off", "skip"): + scanner_bin = install_scanner(scan_tool) + if scanner_bin: + if scan_tool == "syft": + target_spec = f"oci-archive:{gz_path}" + else: + target_spec = gz_path + scanner_components = run_scanner( + scanner_bin, scan_tool, target_spec, + ) + info(f"Scanner cross-check: {len(scanner_components)} components") + + all_components = merge_components( + recipe_components, + [container_comp], + obs, + lockfile_components, + scanner_components, + ) + info(f"Final merged: {len(all_components)} unique components") + + # License resolution (per-scope copyrights tarball + fallback to + # the full set if the per-scope tarball is missing). + if os.environ.get("SBOM_INCLUDE_LICENSES", "y") == "y": + license_map = resolve_licenses(target_path) + if license_map: + resolved, noassertion = apply_licenses( + all_components, license_map, + ) + total = len(all_components) + pct = (100.0 * resolved / total) if total else 0.0 + info(f"License resolution: {resolved}/{total} resolved " + f"({pct:.1f}%); {noassertion} NOASSERTION") + + sbom: dict[str, Any] = { + "bomFormat": "CycloneDX", + "specVersion": "1.6", + "version": 1, + "metadata": { + "timestamp": now_iso(), + "tools": [{ + "vendor": "SONiC", + "name": "build_sbom.py", + "version": "1.0", + }], + "component": { + "type": "container", + "bom-ref": container_comp.get("bom-ref", cname), + "name": cname, + "version": container_comp.get("version", "0.0.0"), + }, + "properties": [ + {"name": "sonic:platform", "value": platform}, + {"name": "sonic:arch", "value": arch}, + {"name": "sonic:scope_kind", + "value": "single-container"}, + {"name": "sonic:container", "value": cname}, + {"name": "sonic:version_control_components", + "value": vcc}, + {"name": "sonic:scan_tool", "value": scan_tool}, + ], + }, + "components": sorted( + all_components, key=lambda c: c.get("bom-ref", "") + ), + } + + deps = build_dependency_graph(all_components) + if deps: + sbom["dependencies"] = sorted(deps, key=lambda d: d.get("ref", "")) + + try: + with open(out_path, "w") as f: + json.dump(sbom, f, indent=2, sort_keys=True) + info(f"SBOM written: {out_path}") + info(f"Component count: {len(all_components)}") + except Exception as e: + warn(f"could not write {out_path}: {e}") + + # SPDX conversion (optional) + sbom_format = os.environ.get("SBOM_FORMAT", "cyclonedx").lower() + if sbom_format in ("spdx", "both"): + # Reuse emit_spdx but with the per-container output path; the + # function derives the spdx path from target_machine, so we + # call cyclonedx-cli directly here for the per-container case. + spdx_path = out_path.removesuffix(".cdx.json") + ".spdx.json" + _convert_to_spdx(out_path, spdx_path) + + return 0 + + +def _convert_to_spdx(cdx_path: str, spdx_path: str) -> None: + """Shared SPDX conversion helper. Used by both bin and container modes.""" + script = os.path.join(os.path.dirname(__file__), "install_sbom_tool.sh") + rc, out, err = run([script, "cyclonedx-cli"], timeout=300) + if rc != 0: + warn(f"could not install cyclonedx-cli (rc={rc}): {err.strip()[:200]}") + return + binary = out.strip() + if not binary or not os.path.isfile(binary): + warn(f"cyclonedx-cli binary not found at {binary!r}") + return + rc, _, err = run( + [binary, "convert", + "--input-file", cdx_path, + "--output-file", spdx_path, + "--output-format", "spdxjson"], + timeout=300, + ) + if rc != 0: + warn(f"cyclonedx-cli convert failed (rc={rc}): {err.strip()[:200]}") + return + info(f"SPDX written: {spdx_path}") + + +def main() -> int: + if os.environ.get("ENABLE_SBOM", "n") != "y": + info("ENABLE_SBOM=n; skipping.") + return 0 + + import argparse + ap = argparse.ArgumentParser(description="SONiC SBOM aggregator") + ap.add_argument( + "--container", metavar="FILENAME", + help="Emit a single-container SBOM (e.g. 'docker-ptf.gz'). " + "Output goes to target/.sbom.cdx.json. In this " + "mode, host rootfs observation and the .bin scope filter " + "are bypassed; only the named container's data is " + "aggregated. Used to produce sidecar SBOMs for test " + "containers (docker-ptf, docker-sonic-mgmt) that are " + "out-of-scope for the .bin SBOM but still need their own " + "vulnerability surface documented.", + ) + args = ap.parse_args() + + if args.container: + return _container_main(args.container) + + target_path = os.environ.get("TARGET_PATH", "target") + target_machine = os.environ.get("TARGET_MACHINE", "generic") + arch = os.environ.get("CONFIGURED_ARCH", + subprocess.run( + ["dpkg", "--print-architecture"], + capture_output=True, text=True, check=False, + ).stdout.strip() or "amd64") + platform = os.environ.get("CONFIGURED_PLATFORM", "") + scan_tool = os.environ.get("SBOM_SCAN_TOOL", "syft") + vcc = os.environ.get("SONIC_VERSION_CONTROL_COMPONENTS", "") + + installer_dockers = split_env_list("SBOM_INSTALLER_DOCKERS") + + # Strict-mode validation: fail loudly when the user enabled SBOM + # generation but a critical input is missing. Better to break the + # build than ship a quietly-incomplete SBOM (e.g. host rootfs + # missing → no grub/kernel/docker-daemon visibility). + try: + check_required_inputs( + target_path, target_machine, installer_dockers, scan_tool, + ) + except SbomInputMissing: + return 1 + + # Derive output filenames from the actual artifact basename + # (e.g. 'sonic-broadcom.bin', 'sonic-aboot-broadcom.swi', + # 'sonic-vs.img.gz') so siblings line up regardless of installer + # format. Falls back to '.bin' for any caller that + # didn't plumb SBOM_TARGET_ARTIFACT through. + artifact_basename = os.environ.get( + "SBOM_TARGET_ARTIFACT", f"sonic-{target_machine}.bin" + ) + out_path = os.path.join(target_path, f"{artifact_basename}.cdx.json") + info(f"Building SBOM for {artifact_basename} " + f"(platform={platform}, arch={arch})") + + fragments = FragmentIndex(target_path) + info(f"Loaded {len(fragments.all)} recipe-emit fragments from {target_path}/") + + # ---- Recipe-emit components (authoritative for SONiC-built things) ---- + recipe_components = list(fragments.all) + + # ---- Observation components for host rootfs ---- + obs_host = observation_components_for_scope( + target_path, "host-image", arch, "Debian", + ) + info(f"Host rootfs observation: {len(obs_host)} components") + + # ---- Per-container observation + container identity ---- + container_components: list = [] + obs_containers: list = [] + for docker in installer_dockers: + # The docker filename in the installer list may be e.g. + # 'docker-fpm-frr.gz' or 'docker-fpm-frr-dbg.gz'. + gz_path = os.path.join(target_path, docker) + cname = docker.replace(".gz", "").replace("-dbg", "") + + # Build a container-typed parent component (use recipe fragment + # if present, otherwise synthesize). + frag = fragments.for_filename(docker) + if frag: + container_comp = frag + else: + container_comp = { + "bom-ref": f"pkg:oci/{cname}@{os.environ.get('SONIC_IMAGE_VERSION', '0.0.0')}?arch={arch}", + "type": "container", + "name": cname, + "version": os.environ.get("SONIC_IMAGE_VERSION", "0.0.0"), + "properties": [ + {"name": "sonic:fragment_kind", "value": "observation"}, + {"name": "sonic:arch", "value": arch}, + ], + } + if os.path.isfile(gz_path): + sha = file_sha256(gz_path) + if sha: + container_comp.setdefault("hashes", []).append( + {"alg": "SHA-256", "content": sha} + ) + container_components.append(container_comp) + + # In-container observation set. + scope = f"dockers/{cname}" + obs_containers.extend(observation_components_for_scope( + target_path, scope, arch, "Debian", + )) + + info(f"Container observation: {len(obs_containers)} components " + f"across {len(installer_dockers)} containers") + + # ---- Lockfile-derived components (Rust/Go/npm transitive deps) ---- + lockfile_components = parse_lockfiles(target_path) + info(f"Lockfile-derived: {len(lockfile_components)} components") + + # ---- Optional scanner cross-check ---- + scanner_components: list = [] + if scan_tool and scan_tool not in ("none", "off", "skip"): + scanner_bin = install_scanner(scan_tool) + if scanner_bin: + info(f"Running {scan_tool} from {scanner_bin} as cross-check") + # Scan the host rootfs. SONiC stages this as fsroot-/ + # at the repo root (a sibling of target/), populated by + # build_debian.sh and packed into a squashfs by build_image.sh. + # We scan the directory tree directly — syft's `dir:` source + # picks up Debian packages, embedded Go modules (for docker + # daemon binaries etc.), grub stage binaries, and so on. + # This is the source-of-truth scan for everything that ships + # outside docker containers (kernel/grub/host utilities/the + # docker daemon itself). + fsroot = os.path.join( + os.path.dirname(os.path.abspath(target_path)), + f"fsroot-{target_machine}", + ) + if os.path.isdir(fsroot): + if scan_tool == "syft": + target_spec = f"dir:{fsroot}" + else: + target_spec = fsroot + info(f"Scanning host rootfs: {fsroot}") + scanner_components.extend( + run_scanner(scanner_bin, scan_tool, target_spec) + ) + else: + info(f"host rootfs not found at {fsroot}; " + f"skipping host-rootfs scan") + # Scan each in-scope container archive. SONiC's docker .gz + # files are OCI archives (not docker-archive tarballs), so + # syft needs the 'oci-archive:' scheme. + for docker in installer_dockers: + gz_path = os.path.join(target_path, docker) + if os.path.isfile(gz_path): + if scan_tool == "syft": + target_spec = f"oci-archive:{gz_path}" + else: + target_spec = gz_path + scanner_components.extend( + run_scanner(scanner_bin, scan_tool, target_spec) + ) + + info(f"Scanner cross-check: {len(scanner_components)} components") + + # ---- Merge (recipe-emit wins, then observation, then lockfile, + # then scanner) ---- + # Lockfile sits between observation and scanner: it gives more + # precise identity than scanner's binary detection (it has crate + # hashes from the lockfile), but observation/recipe-emit win when + # they describe the same component because they carry richer + # SONiC-specific provenance. + all_components = merge_components( + recipe_components, + container_components, + obs_host, + obs_containers, + lockfile_components, + scanner_components, + ) + + info(f"Final merged: {len(all_components)} unique components") + + # ---- License resolution ---- + if os.environ.get("SBOM_INCLUDE_LICENSES", "y") == "y": + license_map = resolve_licenses(target_path) + if license_map: + resolved, noassertion = apply_licenses(all_components, license_map) + total = len(all_components) + pct = (100.0 * resolved / total) if total else 0.0 + info(f"License resolution: {resolved}/{total} " + f"resolved ({pct:.1f}%); {noassertion} NOASSERTION") + else: + info("License resolution: no copyrights tarballs found") + + # ---- Build the final BOM ---- + sbom: dict[str, Any] = { + "bomFormat": "CycloneDX", + "specVersion": "1.6", + "version": 1, + "metadata": { + "timestamp": now_iso(), + "tools": [{ + "vendor": "SONiC", + "name": "build_sbom.py", + "version": "1.0", + }], + "component": { + "type": "operating-system", + "bom-ref": f"sonic-{target_machine}", + "name": f"sonic-{target_machine}", + "version": os.environ.get("SONIC_IMAGE_VERSION", "0.0.0"), + }, + "properties": [ + {"name": "sonic:platform", "value": platform}, + {"name": "sonic:arch", "value": arch}, + {"name": "sonic:target_machine", "value": target_machine}, + {"name": "sonic:scan_tool", "value": scan_tool}, + {"name": "sonic:version_control_components", "value": vcc}, + {"name": "sonic:recipe_fragments_loaded", + "value": str(len(fragments.all))}, + {"name": "sonic:installer_dockers", + "value": " ".join(installer_dockers)}, + ], + }, + "components": sorted( + all_components, key=lambda c: c.get("bom-ref", "") + ), + } + + # Build the dependencies[] graph: kernel modules -> kernel image. + deps = build_dependency_graph(all_components) + if deps: + sbom["dependencies"] = sorted(deps, key=lambda d: d.get("ref", "")) + info(f"Dependencies: {len(deps)} kernel-module edges") + + try: + with open(out_path, "w") as f: + json.dump(sbom, f, indent=2, sort_keys=True) + info(f"SBOM written: {out_path}") + info(f"Component count: {len(all_components)}") + except Exception as e: + warn(f"could not write {out_path}: {e}") + return 0 + + # ---- SPDX export ---- + sbom_format = os.environ.get("SBOM_FORMAT", "cyclonedx").lower() + if sbom_format in ("spdx", "both"): + emit_spdx(out_path, target_path, artifact_basename) + + # ---- SLSA / in-toto provenance ---- + emit_provenance(out_path, target_path, artifact_basename) + + return 0 + + +def emit_provenance(cdx_path: str, target_path: str, + artifact_basename: str) -> None: + """Invoke scripts/sbom_emit_provenance.py to produce a sibling + .intoto.json document. Failure is logged but does not break the + build. artifact_basename is the actual installer filename + (.bin / .swi / .img.gz / etc.).""" + artifact_path = os.path.join(target_path, artifact_basename) + if not os.path.isfile(artifact_path): + info(f"no installer artifact at {artifact_path}; " + f"skipping provenance emit") + return + script = os.path.join(os.path.dirname(__file__), + "sbom_emit_provenance.py") + rc, _, err = run( + ["python3", script, "--bin", artifact_path, "--sbom", cdx_path], + timeout=120, + ) + if rc != 0: + warn(f"provenance emit failed (rc={rc}): {err.strip()[:200]}") + return + info(f"Provenance written: {artifact_path}.intoto.json") + + +def emit_spdx(cdx_path: str, target_path: str, + artifact_basename: str) -> None: + """Convert the CycloneDX SBOM to SPDX via cyclonedx-cli.""" + script = os.path.join(os.path.dirname(__file__), "install_sbom_tool.sh") + rc, out, err = run([script, "cyclonedx-cli"], timeout=300) + if rc != 0: + warn(f"could not install cyclonedx-cli (rc={rc}): {err.strip()[:200]}") + return + binary = out.strip() + if not binary or not os.path.isfile(binary): + warn(f"cyclonedx-cli binary not found at {binary!r}") + return + + spdx_path = os.path.join(target_path, f"{artifact_basename}.spdx.json") + rc, _, err = run( + [binary, "convert", + "--input-file", cdx_path, + "--output-file", spdx_path, + "--output-format", "spdxjson"], + timeout=300, + ) + if rc != 0: + warn(f"cyclonedx-cli convert failed (rc={rc}): {err.strip()[:200]}") + return + info(f"SPDX written: {spdx_path}") + + +if __name__ == "__main__": + sys.exit(main()) diff --git a/scripts/build_sbom.sh b/scripts/build_sbom.sh new file mode 100755 index 00000000000..09b44fedb54 --- /dev/null +++ b/scripts/build_sbom.sh @@ -0,0 +1,22 @@ +#!/bin/bash +# +# build_sbom.sh — thin shim that delegates to the Python aggregator. +# +# Kept as a shell entry point so slave.mk has a stable command name; all +# SBOM-aggregation logic lives in scripts/build_sbom.py. Honours +# ENABLE_SBOM via the Python script's self-gate. + +set -e +SCRIPT_DIR="$(dirname "$0")" + +# Refresh auto-extracted OpenVEX statements before the SBOM is written. +# The extractor scans src/*/patches/ for CVE markers in patch headers +# and emits OpenVEX JSON under vex/auto/ — output is deterministic and +# vex/auto/ is gitignored, so this regenerates from source on every +# build instead of trusting potentially-stale committed JSON. +if [ "${ENABLE_SBOM:-n}" = "y" ]; then + python3 "${SCRIPT_DIR}/sbom_extract_vex_from_patches.py" \ + --output vex/auto 2>&1 || true +fi + +exec python3 "${SCRIPT_DIR}/build_sbom.py" "$@" diff --git a/scripts/generate_buildinfo_config.sh b/scripts/generate_buildinfo_config.sh index d0bfb942ec4..749113b1f5a 100755 --- a/scripts/generate_buildinfo_config.sh +++ b/scripts/generate_buildinfo_config.sh @@ -6,10 +6,12 @@ BUILDINFO_CONFIG=$BUILDINFO_PATH/buildinfo/config/buildinfo.config mkdir -p $BUILDINFO_PATH/buildinfo/config -echo "export PACKAGE_URL_PREFIX=$PACKAGE_URL_PREFIX" > $BUILDINFO_CONFIG +echo "export BUILD_PACKAGES_URL=$BUILD_PACKAGES_URL" > $BUILDINFO_CONFIG echo "export SONIC_VERSION_CONTROL_COMPONENTS=$SONIC_VERSION_CONTROL_COMPONENTS" >> $BUILDINFO_CONFIG echo "export SONIC_VERSION_CACHE=${SONIC_VERSION_CACHE}" >> $BUILDINFO_CONFIG echo "export SONIC_VERSION_CACHE_SOURCE=${SONIC_VERSION_CACHE_SOURCE}" >> $BUILDINFO_CONFIG echo "export DISTRO=${DISTRO}" >> $BUILDINFO_CONFIG echo "export MIRROR_SNAPSHOT=$MIRROR_SNAPSHOT" >> $BUILDINFO_CONFIG +echo "export BUILD_PUBLIC_URL=$BUILD_PUBLIC_URL" >> $BUILDINFO_CONFIG +echo "export BUILD_SNAPSHOT_URL=$BUILD_SNAPSHOT_URL" >> $BUILDINFO_CONFIG echo "export PIP_HTTP_TIMEOUT=$PIP_HTTP_TIMEOUT" >> $BUILDINFO_CONFIG diff --git a/scripts/install_sbom_tool.sh b/scripts/install_sbom_tool.sh new file mode 100755 index 00000000000..41eaec6a7ae --- /dev/null +++ b/scripts/install_sbom_tool.sh @@ -0,0 +1,237 @@ +#!/bin/bash +# +# install_sbom_tool.sh — fetch the binary scanner used by SBOM generation. +# +# Runs *inside the slave container* (or another build context where the +# src/sonic-build-hooks/hooks/wget shim is active) so the fetched URL + +# MD5 is recorded into target/versions/.../versions-web automatically. +# +# Resolution order (per tool): +# 1. If $TOOL is already on PATH, print its path and exit. +# 2. If the cached binary is present under $SBOM_TOOLS_DIR, use it. +# 3. Else wget the upstream release, verify SHA-256 against the pin in +# this script, extract into the cache, and print the path. +# +# Usage: +# scripts/install_sbom_tool.sh syft # prints absolute path to the binary +# scripts/install_sbom_tool.sh trivy +# scripts/install_sbom_tool.sh grype +# +# Pins are intentionally hard-coded here so a single edit moves the +# tool version and the existing build-hook infrastructure picks up the +# new URL on next build. + +set -euo pipefail + +TOOL="${1:-}" +if [ -z "$TOOL" ]; then + echo "usage: $0 " >&2 + exit 2 +fi + +# Honour TARGET_PATH from slave.mk if set; otherwise default to ./target. +TARGET_PATH="${TARGET_PATH:-target}" +SBOM_TOOLS_DIR="${SBOM_TOOLS_DIR:-${TARGET_PATH}/sbom-tools}" + +# Map our $(dpkg --print-architecture) names to the names releases use. +host_arch="$(dpkg --print-architecture 2>/dev/null || uname -m)" +case "$host_arch" in + amd64|x86_64) rel_arch="amd64" ;; + arm64|aarch64) rel_arch="arm64" ;; + *) + echo "[install_sbom_tool.sh] WARNING: unsupported host arch '$host_arch'." >&2 + echo "[install_sbom_tool.sh] The binary scanner is not available; SBOM" >&2 + echo "[install_sbom_tool.sh] generation will fall back to recipe-driven" >&2 + echo "[install_sbom_tool.sh] data only on this build." >&2 + exit 3 + ;; +esac + +############################################################################## +# Pinned versions and SHA-256s. +# +# To bump a tool version: update the version, paste the SHA-256 lines from +# the upstream __checksums.txt. The wget call below is shimmed, +# so the URL+MD5 gets captured into versions-web on next build and the +# pin propagates through scripts/versions_manager.py. +############################################################################## + +SYFT_VERSION="1.44.0" +SYFT_URL="https://github.com/anchore/syft/releases/download/v${SYFT_VERSION}/syft_${SYFT_VERSION}_linux_${rel_arch}.tar.gz" +SYFT_SHA256_amd64="0e91737aee2b5baf1d255b959630194a302335d848ff97bb07921eb6205b5f5a" +SYFT_SHA256_arm64="6f6cdcdc695721d91ce756e3b5bc3e3416599c464101f5e32e9c3f33054ee6d9" + +# CycloneDX-CLI (CycloneDX/cyclonedx-cli on GitHub). Single static +# binary (.NET self-contained) — no tarball, fetched directly. +# Used by build_sbom.py for CycloneDX -> SPDX conversion when +# SBOM_FORMAT includes 'spdx' or 'both'. +CYCLONEDX_CLI_VERSION="0.32.0" +case "$rel_arch" in + amd64) CYCLONEDX_CLI_URL="https://github.com/CycloneDX/cyclonedx-cli/releases/download/v${CYCLONEDX_CLI_VERSION}/cyclonedx-linux-x64" ;; + arm64) CYCLONEDX_CLI_URL="https://github.com/CycloneDX/cyclonedx-cli/releases/download/v${CYCLONEDX_CLI_VERSION}/cyclonedx-linux-arm64" ;; +esac +CYCLONEDX_CLI_SHA256_amd64="454879e6a4a405c8a13bff49b8982adcb0596f3019b26b0811c66e4d7f0783e1" +CYCLONEDX_CLI_SHA256_arm64="abf0b7c5648a5b127791d691cad41f004aceea27c75bb42c9572fdc9694770cf" + +GRYPE_VERSION="0.112.0" +GRYPE_URL="https://github.com/anchore/grype/releases/download/v${GRYPE_VERSION}/grype_${GRYPE_VERSION}_linux_${rel_arch}.tar.gz" +GRYPE_SHA256_amd64="acb14a030010fe9bdb9594b4ae108d9d14ef2f926d936aa0916dc62c89c058ea" +GRYPE_SHA256_arm64="7fdeccf065965cc59386c656e5fcc1eb1bdf820e2433000bca7f010b8e6da155" + +# Trivy is a placeholder — fill in when SBOM_SCAN_TOOL=trivy or +# vulnerability scanning via trivy is exercised. For now the script +# errors out cleanly if it's requested. +TRIVY_VERSION="" + +############################################################################## +# Common helpers. +############################################################################## + +cache_path() { + local tool="$1" version="$2" + echo "${SBOM_TOOLS_DIR}/${tool}-${version}/${tool}" +} + +verify_sha256() { + local file="$1" expected="$2" + local actual + actual="$(sha256sum "$file" | awk '{print $1}')" + if [ "$actual" != "$expected" ]; then + echo "[install_sbom_tool.sh] SHA-256 mismatch for $file:" >&2 + echo " expected: $expected" >&2 + echo " actual: $actual" >&2 + return 1 + fi +} + +fetch_and_extract() { + local tool="$1" version="$2" url="$3" sha256="$4" + local dest_dir="${SBOM_TOOLS_DIR}/${tool}-${version}" + local tarball="${dest_dir}.tar.gz" + + mkdir -p "$dest_dir" + + # Use wget so the build-hook shim records URL+MD5 into versions-web. + # --no-verbose keeps build logs clean; --tries handles transient network. + wget --no-verbose --tries=3 -O "$tarball" "$url" + verify_sha256 "$tarball" "$sha256" + + tar -C "$dest_dir" -xzf "$tarball" "$tool" + rm -f "$tarball" + + chmod +x "${dest_dir}/${tool}" +} + +# Fetch a single-binary tool (no tarball wrapper). cyclonedx-cli ships +# as a raw .NET self-contained executable, not a .tar.gz. +fetch_single_binary() { + local tool="$1" version="$2" url="$3" sha256="$4" + local dest_dir="${SBOM_TOOLS_DIR}/${tool}-${version}" + local dest="${dest_dir}/${tool}" + + mkdir -p "$dest_dir" + wget --no-verbose --tries=3 -O "$dest" "$url" + verify_sha256 "$dest" "$sha256" + chmod +x "$dest" +} + +############################################################################## +# Per-tool resolution. +############################################################################## + +resolve_syft() { + if command -v syft >/dev/null 2>&1; then + command -v syft + return 0 + fi + + local cached + cached="$(cache_path syft "$SYFT_VERSION")" + if [ -x "$cached" ]; then + echo "$cached" + return 0 + fi + + local sha256_var="SYFT_SHA256_${rel_arch}" + local sha256="${!sha256_var:-}" + if [ -z "$sha256" ]; then + echo "[install_sbom_tool.sh] no SHA-256 pin for syft on $rel_arch" >&2 + return 4 + fi + + fetch_and_extract syft "$SYFT_VERSION" "$SYFT_URL" "$sha256" >&2 + echo "$cached" +} + +resolve_trivy() { + echo "[install_sbom_tool.sh] trivy installer not yet implemented." >&2 + echo "[install_sbom_tool.sh] Use SBOM_SCAN_TOOL=syft (the default)." >&2 + return 5 +} + +resolve_grype() { + if command -v grype >/dev/null 2>&1; then + command -v grype + return 0 + fi + + local cached + cached="$(cache_path grype "$GRYPE_VERSION")" + if [ -x "$cached" ]; then + echo "$cached" + return 0 + fi + + local sha256_var="GRYPE_SHA256_${rel_arch}" + local sha256="${!sha256_var:-}" + if [ -z "$sha256" ]; then + echo "[install_sbom_tool.sh] no SHA-256 pin for grype on $rel_arch" >&2 + return 4 + fi + + fetch_and_extract grype "$GRYPE_VERSION" "$GRYPE_URL" "$sha256" >&2 + echo "$cached" +} + +resolve_cyclonedx_cli() { + # cyclonedx-cli ships under the name "cyclonedx" on PATH. + if command -v cyclonedx >/dev/null 2>&1; then + command -v cyclonedx + return 0 + fi + + local cached + cached="$(cache_path cyclonedx "$CYCLONEDX_CLI_VERSION")" + if [ -x "$cached" ]; then + echo "$cached" + return 0 + fi + + if [ -z "${CYCLONEDX_CLI_URL:-}" ]; then + echo "[install_sbom_tool.sh] no cyclonedx-cli release for arch $rel_arch" >&2 + return 4 + fi + + local sha256_var="CYCLONEDX_CLI_SHA256_${rel_arch}" + local sha256="${!sha256_var:-}" + if [ -z "$sha256" ]; then + echo "[install_sbom_tool.sh] no SHA-256 pin for cyclonedx-cli on $rel_arch" >&2 + return 4 + fi + + fetch_single_binary cyclonedx "$CYCLONEDX_CLI_VERSION" \ + "$CYCLONEDX_CLI_URL" "$sha256" >&2 + echo "$cached" +} + +case "$TOOL" in + syft) resolve_syft ;; + trivy) resolve_trivy ;; + grype) resolve_grype ;; + cyclonedx-cli|cyclonedx) + resolve_cyclonedx_cli ;; + *) + echo "[install_sbom_tool.sh] unknown tool: $TOOL" >&2 + exit 2 + ;; +esac diff --git a/scripts/j2_include.py b/scripts/j2_include.py new file mode 100755 index 00000000000..78ffeda9eaf --- /dev/null +++ b/scripts/j2_include.py @@ -0,0 +1,63 @@ +#!/usr/bin/env python3 +"""Wrapper around j2cli that adds extra Jinja2 include search paths. + +Usage: j2_include.py [-I path]... template [data] [-- j2-args...] + +The -I paths are added to the Jinja2 search path so that +{% include "Dockerfile.common.j2" %} resolves from feature docker directories. +""" +import sys +import os +import io +import jinja2 +import j2cli.cli + + +class MultiPathLoader(jinja2.BaseLoader): + """Jinja2 loader that searches multiple directories.""" + def __init__(self, cwd, search_paths=None, encoding='utf-8'): + self.search_paths = [cwd] + (search_paths or []) + self.encoding = encoding + + def get_source(self, environment, template): + for search_path in self.search_paths: + filename = os.path.join(search_path, template) + if os.path.isfile(filename): + with io.open(filename, 'rt', encoding=self.encoding) as f: + contents = f.read() + return contents, filename, lambda: False + raise jinja2.TemplateNotFound(template) + + +def main(): + # Parse -I flags + include_paths = [] + args = sys.argv[1:] + while args and args[0] == '-I': + args.pop(0) + if not args: + print("Error: -I requires a path argument", file=sys.stderr) + sys.exit(1) + include_paths.append(args.pop(0)) + + if not include_paths: + # No extra paths — just run j2 directly + sys.argv = ['j2'] + args + j2cli.cli.main() + return + + # Monkey-patch the renderer to use MultiPathLoader + _orig_init = j2cli.cli.Jinja2TemplateRenderer.__init__ + + def _patched_init(self, cwd, allow_undefined, j2_env_params): + j2_env_params.setdefault('loader', MultiPathLoader(cwd, include_paths)) + _orig_init(self, cwd, allow_undefined, j2_env_params) + + j2cli.cli.Jinja2TemplateRenderer.__init__ = _patched_init + + sys.argv = ['j2'] + args + j2cli.cli.main() + + +if __name__ == '__main__': + main() diff --git a/scripts/populate_file_web_server.py b/scripts/populate_file_web_server.py index abec22b0bb4..f52359b6f9b 100644 --- a/scripts/populate_file_web_server.py +++ b/scripts/populate_file_web_server.py @@ -120,7 +120,7 @@ def upload_resource_to_server(resource_path, resource_name, user, key, server_ur try: f = open(resource_path, 'rb') except: - err_print("Cannot open " + resource_path) + print_msg(PRINT_LEVEL_ERROR, "Cannot open " + resource_path) return RET_CODE_CANNOT_OPEN_FILE headers = {'Content-type': 'application', 'Slug': resource_name} @@ -130,7 +130,7 @@ def upload_resource_to_server(resource_path, resource_name, user, key, server_ur f.close() if response.status_code != HTTPStatus.CREATED.value: - err_print(f"HTTP request returned status code {response.status_code}, expected {HTTPStatus.CREATED.value}") + print_msg(PRINT_LEVEL_ERROR, f"HTTP request returned status code {response.status_code}, expected {HTTPStatus.CREATED.value}") return RET_CODE_HTTP_SERVER_ERROR # JSON response empty only when status code is 204 diff --git a/scripts/prepare_docker_buildinfo.sh b/scripts/prepare_docker_buildinfo.sh index d9b4d27584e..50dbbf0344a 100755 --- a/scripts/prepare_docker_buildinfo.sh +++ b/scripts/prepare_docker_buildinfo.sh @@ -45,6 +45,8 @@ fi if [[ "$IMAGENAME" == sonic-slave-* ]] || [[ "$IMAGENAME" == docker-base-* ]] || [[ "$IMAGENAME" == docker-ptf ]]; then scripts/build_mirror_config.sh ${DOCKERFILE_PATH} $ARCH $DISTRO + mkdir -p "${DOCKERFILE_PATH}/files/apt/apt.conf.d" + cp -f files/apt/apt.conf.d/* "${DOCKERFILE_PATH}/files/apt/apt.conf.d/" fi # add script for reproducible build. using sha256 instead of tag for docker base image. @@ -53,11 +55,13 @@ scripts/docker_version_control.sh $@ DOCKERFILE_PRE_SCRIPT='# Auto-Generated for buildinfo ARG SONIC_VERSION_CACHE ARG SONIC_VERSION_CONTROL_COMPONENTS +ARG ENABLE_SBOM=n COPY ["buildinfo", "/usr/local/share/buildinfo"] COPY vcache/ /sonic/target/vcache/'${IMAGENAME}' RUN dpkg -i /usr/local/share/buildinfo/sonic-build-hooks_1.0_all.deb ENV IMAGENAME='${IMAGENAME}' ENV DISTRO='${DISTRO}' +ENV ENABLE_SBOM=$ENABLE_SBOM RUN pre_run_buildinfo '${IMAGENAME}' ' @@ -93,6 +97,15 @@ fi mkdir -p ${BUILDINFO_PATH} cp -rf src/sonic-build-hooks/buildinfo/* $BUILDINFO_PATH +# Stage the shared cargo-auditable wrapper inside the buildinfo +# directory so each sonic-slave-* Dockerfile can COPY it from a +# single source of truth (files/build/cargo-wrapper) — only needs +# to apply to slave-base images where Rust is installed. +if [[ "$IMAGENAME" == sonic-slave-* ]] && [ -f files/build/cargo-wrapper ]; then + cp files/build/cargo-wrapper $BUILDINFO_PATH/cargo-wrapper + chmod 0755 $BUILDINFO_PATH/cargo-wrapper +fi + # Generate the version lock files scripts/versions_manager.py generate -t "$BUILDINFO_VERSION_PATH" -n "$IMAGENAME" -d "$DISTRO" -a "$ARCH" diff --git a/scripts/process_log.sh b/scripts/process_log.sh index 9977535ed81..ffc3c18117c 100755 --- a/scripts/process_log.sh +++ b/scripts/process_log.sh @@ -1,5 +1,11 @@ #!/bin/bash +# Exit immediately when receiving SIGINT/SIGTERM so that Ctrl-C during +# a build actually stops the process pipeline instead of leaving +# process_log.sh running (and blocking make from exiting). +trap 'exit 130' INT +trap 'exit 143' TERM + add_timestamp="" while getopts ":t" opt; do @@ -16,5 +22,3 @@ while IFS= read -r line; do fi printf '%s\n' "$line" done - - diff --git a/scripts/sbom_diff.py b/scripts/sbom_diff.py new file mode 100755 index 00000000000..8837ddb019c --- /dev/null +++ b/scripts/sbom_diff.py @@ -0,0 +1,177 @@ +#!/usr/bin/env python3 +""" +sbom_diff.py — compare two SBOM files (CycloneDX JSON) and report +component-level differences. Used as a reproducibility cross-check +between independent build hosts of the same source tree, and as a +release-drift report between two SBOMs over time. + +Usage: + sbom_diff.py [--quiet] [--json out.json] OLD.cdx.json NEW.cdx.json + +Default output is human-readable. With --json, emit a machine-readable +report covering added/removed/changed components and an exit code +that's non-zero when any difference exists (useful for CI gating). +""" + +import argparse +import json +import sys + + +def load_components(path: str) -> dict: + """Return {bom-ref or purl or (name, version, arch): component}.""" + with open(path) as f: + doc = json.load(f) + out: dict = {} + for c in doc.get("components", []) or []: + key = c.get("bom-ref") or c.get("purl") or c.get("name", "?") + out[key] = c + return out + + +def component_signature(c: dict) -> dict: + """The fields we compare for "did this component change?". + + We deliberately ignore timestamps, scan-tool internal metadata, and + the SBOM aggregator's own properties so a 'no real change' rebuild + doesn't flag drift. Things that matter: + - version + - hashes + - licenses + - pedigree.ancestors[].version + - pedigree.patches.length and per-patch hashes + """ + sig: dict = { + "name": c.get("name"), + "version": c.get("version"), + "type": c.get("type"), + } + hashes = c.get("hashes") or [] + if hashes: + sig["hashes"] = sorted( + (h.get("alg"), h.get("content")) for h in hashes + ) + licenses = c.get("licenses") or [] + if licenses: + lic_strs = [] + for l in licenses: + if "expression" in l: + lic_strs.append(("expr", l["expression"])) + elif "license" in l: + lic = l["license"] + lic_strs.append(( + "id" if "id" in lic else "name", + lic.get("id") or lic.get("name") or "", + )) + sig["licenses"] = sorted(lic_strs) + ped = c.get("pedigree") or {} + if ped.get("ancestors"): + sig["ancestors"] = sorted( + (a.get("name"), a.get("version")) for a in ped["ancestors"] + ) + if ped.get("patches"): + sig["patches"] = sorted( + tuple( + h.get("content", "") + for h in (p.get("diff") or {}).get("hashes") or [] + ) + for p in ped["patches"] + ) + return sig + + +def diff(old: dict, new: dict) -> dict: + added = sorted(k for k in new if k not in old) + removed = sorted(k for k in old if k not in new) + changed = [] + for k in sorted(old.keys() & new.keys()): + s_old = component_signature(old[k]) + s_new = component_signature(new[k]) + if s_old != s_new: + field_diff = {} + for f in set(s_old) | set(s_new): + if s_old.get(f) != s_new.get(f): + field_diff[f] = { + "old": s_old.get(f), + "new": s_new.get(f), + } + changed.append({"key": k, "changes": field_diff}) + return { + "added": added, + "removed": removed, + "changed": changed, + } + + +def print_report(d: dict, old_path: str, new_path: str) -> None: + print(f"Comparing:") + print(f" old: {old_path}") + print(f" new: {new_path}") + print() + print(f"Added: {len(d['added'])}") + print(f"Removed: {len(d['removed'])}") + print(f"Changed: {len(d['changed'])}") + if d["added"]: + print() + print("--- Added ---") + for k in d["added"][:50]: + print(f" + {k}") + if len(d["added"]) > 50: + print(f" ... and {len(d['added']) - 50} more") + if d["removed"]: + print() + print("--- Removed ---") + for k in d["removed"][:50]: + print(f" - {k}") + if len(d["removed"]) > 50: + print(f" ... and {len(d['removed']) - 50} more") + if d["changed"]: + print() + print("--- Changed ---") + for entry in d["changed"][:30]: + print(f" ~ {entry['key']}") + for field, vals in sorted(entry["changes"].items()): + old_v = vals.get("old") + new_v = vals.get("new") + if isinstance(old_v, list): + old_v = f"[{len(old_v)} items]" + if isinstance(new_v, list): + new_v = f"[{len(new_v)} items]" + print(f" {field}: {old_v} -> {new_v}") + if len(d["changed"]) > 30: + print(f" ... and {len(d['changed']) - 30} more") + + +def main() -> int: + ap = argparse.ArgumentParser(description=__doc__) + ap.add_argument("old", help="Older / baseline SBOM (CycloneDX JSON)") + ap.add_argument("new", help="Newer / candidate SBOM (CycloneDX JSON)") + ap.add_argument("--quiet", action="store_true", + help="Suppress per-component output; just report counts") + ap.add_argument("--json", + help="Write the full diff as JSON to this file") + args = ap.parse_args() + + old = load_components(args.old) + new = load_components(args.new) + d = diff(old, new) + + if args.json: + with open(args.json, "w") as f: + json.dump(d, f, indent=2, sort_keys=True) + + if args.quiet: + print( + f"+{len(d['added'])} -{len(d['removed'])} ~{len(d['changed'])}" + ) + else: + print_report(d, args.old, args.new) + + # Non-zero exit when any difference; useful for `make sbom-verify`. + if d["added"] or d["removed"] or d["changed"]: + return 1 + return 0 + + +if __name__ == "__main__": + sys.exit(main()) diff --git a/scripts/sbom_emit_provenance.py b/scripts/sbom_emit_provenance.py new file mode 100755 index 00000000000..dd341383a17 --- /dev/null +++ b/scripts/sbom_emit_provenance.py @@ -0,0 +1,357 @@ +#!/usr/bin/env python3 +""" +sbom_emit_provenance.py — emit an unsigned SLSA v1.0 provenance +attestation alongside the SBOM. + +Output: `target/.intoto.json` — sibling of whatever +installer this run produced (.bin / .swi / .img.gz / etc.). + +The attestation follows in-toto Statement v1 +(https://in-toto.io/Statement/v1) wrapping a SLSA Provenance v1 +predicate (https://slsa.dev/provenance/v1) and answers the question: +"how was this binary built?" + +It is intentionally **unsigned**. Release engineering signs both the +SBOM and the .intoto.json at publish time with whatever tool their +policy requires (cosign, openssl, etc.). The build slave never sees +production signing keys. See README.sbom.md "Attestation and signing" +for the recommended workflow. + +The output is reproducible: two byte-identical builds produce +byte-identical .intoto.json documents, as long as SOURCE_DATE_EPOCH +is set or no timestamps are populated. +""" + +import argparse +import datetime +import hashlib +import json +import os +import re +import subprocess +import sys +from typing import Optional + + +def warn(msg: str) -> None: + sys.stderr.write(f"[sbom_emit_provenance.py] WARNING: {msg}\n") + + +def info(msg: str) -> None: + if os.environ.get("SBOM_DEBUG", "n") == "y": + sys.stderr.write(f"[sbom_emit_provenance.py] {msg}\n") + + +# --------------------------------------------------------------------------- +# Helpers +# --------------------------------------------------------------------------- + + +def run(cmd: list, cwd: Optional[str] = None, timeout: int = 60) -> Optional[str]: + try: + r = subprocess.run( + cmd, cwd=cwd, capture_output=True, text=True, + timeout=timeout, check=False, + ) + if r.returncode == 0: + return r.stdout.strip() + except Exception: + pass + return None + + +def file_sha256(path: str) -> Optional[str]: + try: + h = hashlib.sha256() + with open(path, "rb") as f: + for chunk in iter(lambda: f.read(65536), b""): + h.update(chunk) + return h.hexdigest() + except Exception: + return None + + +def reproducible_timestamp() -> Optional[str]: + """Return SOURCE_DATE_EPOCH as ISO8601 if set; else None. + + None means "this attestation will not be byte-identical across + independent builds because we don't have a reproducible build + timestamp". We omit timestamps entirely in that case. + """ + epoch = os.environ.get("SOURCE_DATE_EPOCH") + if not epoch: + return None + try: + return datetime.datetime.fromtimestamp( + int(epoch), tz=datetime.timezone.utc + ).strftime("%Y-%m-%dT%H:%M:%SZ") + except Exception: + return None + + +# --------------------------------------------------------------------------- +# Slave image identity (the "builder" in SLSA terms) +# --------------------------------------------------------------------------- + + +def slave_image_digest(image: str) -> Optional[dict]: + """Return {repo, tag, sha256_digest} for a locally-loaded image. + + Falls back to None if docker is unavailable or the image isn't + loaded (which is normal when this script runs in a fresh slave + after collect_docker_version_files has tagged things differently). + """ + out = run(["docker", "image", "inspect", "--format", + "{{.Id}}\t{{.RepoDigests}}", image]) + if not out: + return None + fields = out.split("\t", 1) + iid = fields[0] if fields else "" + # iid is like "sha256:abc..."; strip the prefix to match SLSA digest map. + digest = iid.split(":", 1)[1] if iid.startswith("sha256:") else iid + return { + "name": image, + "digest": {"sha256": digest} if digest else {}, + } + + +def find_slave_images() -> list: + """Locate the slave docker images used in this build. + + Sources: target/versions/build/build-sonic-slave-*/ directory names + point at the slave kind (bookworm / trixie). We use them to derive + the image refs and ask docker for their digests. + """ + target_path = os.environ.get("TARGET_PATH", "target") + build_dir = os.path.join(target_path, "versions", "build") + out: list = [] + if not os.path.isdir(build_dir): + return out + for name in sorted(os.listdir(build_dir)): + if not name.startswith("build-sonic-slave-"): + continue + slave_kind = name[len("build-"):] # e.g. "sonic-slave-bookworm" + # Find the loaded image by querying docker for any tag matching. + # If multiple, prefer the longest tag (per-user variant). + list_out = run(["docker", "images", + "--format", "{{.Repository}}:{{.Tag}}\t{{.ID}}", + slave_kind]) + if not list_out: + out.append({"name": slave_kind, "digest": {}}) + continue + # Pick the tag whose repo == slave_kind (skip -bhouse user variants + # if both exist, by sorting and taking the bare repo first). + candidates = [] + for line in list_out.splitlines(): + repo_tag, _, image_id = line.partition("\t") + repo = repo_tag.partition(":")[0] + if repo == slave_kind and image_id: + candidates.append((repo_tag, image_id)) + if not candidates: + out.append({"name": slave_kind, "digest": {}}) + continue + repo_tag, image_id = candidates[0] + digest = image_id.split(":", 1)[1] if image_id.startswith("sha256:") else image_id + out.append({ + "name": f"pkg:docker/{repo_tag}", + "digest": {"sha256": digest} if digest else {}, + }) + return out + + +# --------------------------------------------------------------------------- +# Repo identity +# --------------------------------------------------------------------------- + + +def git_commit() -> Optional[str]: + return run(["git", "rev-parse", "HEAD"]) + + +def git_remote_url() -> Optional[str]: + url = run(["git", "config", "--get", "remote.origin.url"]) + if not url: + return None + # Normalize SSH form to https URI for SLSA. + m = re.match(r"git@([^:]+):(.+?)(?:\.git)?$", url) + if m: + return f"https://{m.group(1)}/{m.group(2)}" + return url.rstrip("/").removesuffix(".git") + + +# --------------------------------------------------------------------------- +# SBOM linkage +# --------------------------------------------------------------------------- + + +def load_sbom_metadata(cdx_path: str) -> dict: + """Pull bom-ref and serialNumber out of the SBOM for cross-reference.""" + try: + with open(cdx_path) as f: + doc = json.load(f) + except Exception as e: + warn(f"could not read {cdx_path}: {e}") + return {} + meta = doc.get("metadata", {}) + return { + "bom_ref": meta.get("component", {}).get("bom-ref"), + "serial_number": doc.get("serialNumber"), + "spec_version": doc.get("specVersion"), + "version": doc.get("version"), + } + + +# --------------------------------------------------------------------------- +# Top-level provenance construction +# --------------------------------------------------------------------------- + + +_EXTERNAL_PARAM_VARS = [ + "CONFIGURED_PLATFORM", + "CONFIGURED_ARCH", + "TARGET_BOOTLOADER", + "BLDENV", + "ENABLE_SBOM", + "SBOM_FORMAT", + "SBOM_SCAN_TOOL", + "SBOM_INCLUDE_LICENSES", + "INCLUDE_KUBERNETES", + "INCLUDE_PTF", + "INCLUDE_PDE", + "INCLUDE_MGMT_FRAMEWORK", + "INCLUDE_DHCP_RELAY", + "INCLUDE_DHCP_SERVER", + "INCLUDE_MACSEC", + "INCLUDE_NAT", + "INCLUDE_SFLOW", + "INCLUDE_FIPS", + "INCLUDE_EXTERNAL_PATCHES", + "SONIC_VERSION_CONTROL_COMPONENTS", + "BUILD_PUBLIC_URL", + "BUILD_SNAPSHOT_URL", + "MIRROR_URLS", + "MIRROR_SECURITY_URLS", + "MIRROR_SNAPSHOT", +] + + +def build_provenance( + bin_path: str, cdx_path: Optional[str], +) -> dict: + bin_digest = file_sha256(bin_path) + subject = [{ + "name": os.path.basename(bin_path), + "digest": {"sha256": bin_digest} if bin_digest else {}, + }] + + external_params = { + k: os.environ.get(k, "") + for k in _EXTERNAL_PARAM_VARS + if os.environ.get(k) + } + # The target identity is itself a build input. + external_params["target"] = os.path.basename(bin_path) + + resolved_deps = [] + commit = git_commit() + remote = git_remote_url() + if remote and commit: + resolved_deps.append({ + "uri": f"git+{remote}", + "digest": {"gitCommit": commit}, + }) + # Cross-reference the SBOM as a resolved dependency. + if cdx_path and os.path.isfile(cdx_path): + cdx_sha = file_sha256(cdx_path) + sbom_meta = load_sbom_metadata(cdx_path) + ref = { + "uri": "file://" + os.path.relpath(cdx_path), + "digest": {"sha256": cdx_sha} if cdx_sha else {}, + } + if sbom_meta.get("serial_number"): + ref["name"] = sbom_meta["serial_number"] + resolved_deps.append(ref) + + # Slave docker images = builder identity. + slaves = find_slave_images() + builder: dict = { + "id": "https://github.com/sonic-net/sonic-buildimage/blob/master/Makefile", + } + if slaves: + builder["builderDependencies"] = slaves + + metadata: dict = { + "invocationId": os.environ.get( + "BUILD_NUMBER", + os.environ.get("BUILD_TIMESTAMP", "local-build"), + ), + } + ts = reproducible_timestamp() + if ts: + # SLSA spec uses startedOn and finishedOn; we set both to the + # same epoch-derived value for reproducibility. + metadata["startedOn"] = ts + metadata["finishedOn"] = ts + + predicate = { + "buildDefinition": { + "buildType": "https://github.com/sonic-net/sonic-buildimage/build/v1", + "externalParameters": external_params, + "internalParameters": { + "host_arch": run(["dpkg", "--print-architecture"]) or "", + }, + "resolvedDependencies": resolved_deps, + }, + "runDetails": { + "builder": builder, + "metadata": metadata, + }, + } + + statement = { + "_type": "https://in-toto.io/Statement/v1", + "subject": subject, + "predicateType": "https://slsa.dev/provenance/v1", + "predicate": predicate, + } + return statement + + +# --------------------------------------------------------------------------- +# Entry point +# --------------------------------------------------------------------------- + + +def main() -> int: + ap = argparse.ArgumentParser(description=__doc__) + ap.add_argument("--bin", required=True, + help="Path to the installer image (e.g. target/sonic-broadcom.bin)") + ap.add_argument("--sbom", + help="Path to the sibling CycloneDX SBOM " + "(default: .cdx.json)") + ap.add_argument("--output", + help="Where to write the .intoto.json " + "(default: .intoto.json)") + args = ap.parse_args() + + if not os.path.isfile(args.bin): + warn(f"bin not found: {args.bin}") + return 0 + + cdx_path = args.sbom or (args.bin + ".cdx.json") + out_path = args.output or (args.bin + ".intoto.json") + + statement = build_provenance(args.bin, cdx_path=cdx_path) + + try: + with open(out_path, "w") as f: + json.dump(statement, f, indent=2, sort_keys=True) + info(f"wrote {out_path}") + except Exception as e: + warn(f"could not write {out_path}: {e}") + return 0 + return 0 + + +if __name__ == "__main__": + sys.exit(main()) diff --git a/scripts/sbom_extract_vex_from_patches.py b/scripts/sbom_extract_vex_from_patches.py new file mode 100755 index 00000000000..23c46e28407 --- /dev/null +++ b/scripts/sbom_extract_vex_from_patches.py @@ -0,0 +1,333 @@ +#!/usr/bin/env python3 +""" +sbom_extract_vex_from_patches.py — sweep the SONiC source tree for +patches that mention CVEs in their filename or header, and emit one +OpenVEX YAML file per (CVE, source-component) pair. + +The goal: when a SONiC patch fixes an upstream CVE, that CVE should +**not** appear as an active finding in the vulnerability report for +the corresponding component, even though the underlying upstream +version in the SBOM ancestor pedigree is still vulnerable. OpenVEX +status `not_affected` with justification `vulnerable_code_not_in_execute_path` +encodes that "the patch fixed it; don't bother me about it". + +Where it looks: + + src/*/patch/*.patch + src/*/patches/*.patch + src/*/patches-sonic/*.patch (sonic-linux-kernel kernel patches) + src/*.patch/*.patch (sidecar patch directories) + src/*/debian/patches/*.patch (Debian-style nested) + +What it looks for, in order of confidence: + + Filename: contains 'cve-NNNN-NNNNN' (case-insensitive) + Header: 'Fixes: CVE-NNNN-NNNNN' + Header: 'Subject: ... CVE-NNNN-NNNNN ...' + Anywhere: 'CVE-NNNN-NNNNN' (loose match, lower confidence) + +Output: + + vex/auto//.json + +OpenVEX JSON (not YAML — grype's --vex flag rejects YAML). One file +per patch, capturing every CVE it mentions. The product list is +derived from the source-tree directory name (i.e. `thrift` for +src/thrift/patch/*). Concrete PURLs are not emitted because the +extractor does not know which downstream debs/wheels each patch +ultimately ships in — grype's product matching handles this via PURL +substring matching. + +Re-run is idempotent — files are overwritten with consistent ordering. + +Usage: + sbom_extract_vex_from_patches.py + sbom_extract_vex_from_patches.py --output-dir vex/auto --dry-run +""" + +import argparse +import datetime +import hashlib +import json +import os +import re +import sys + + +_CVE_RE = re.compile(r"CVE-(\d{4})-(\d{4,7})", re.IGNORECASE) +_FIXES_RE = re.compile(r"^\s*Fixes:\s*(CVE-\d{4}-\d{4,7})", + re.IGNORECASE | re.MULTILINE) +_SUBJECT_RE = re.compile(r"^Subject:.*?(CVE-\d{4}-\d{4,7})", + re.IGNORECASE | re.MULTILINE) + + +def warn(msg: str) -> None: + sys.stderr.write(f"[sbom_extract_vex_from_patches.py] WARN: {msg}\n") + + +def info(msg: str) -> None: + sys.stderr.write(f"[sbom_extract_vex_from_patches.py] {msg}\n") + + +# --------------------------------------------------------------------------- +# Patch discovery +# --------------------------------------------------------------------------- + + +def find_patches(root: str = "src") -> list: + """Walk the src/ tree (and the few well-known patch dirs that live + elsewhere) returning every *.patch file.""" + found = [] + for r, dirs, files in os.walk(root): + # Skip build artifacts and large unrelated trees. + skip = {"build", ".git", "node_modules", "target", "deb_dist"} + dirs[:] = [d for d in dirs if d not in skip] + if "/patch" in r or "/patches" in r or r.endswith(".patch") \ + or r.endswith("/debian"): + pass + for fn in files: + if fn.endswith(".patch"): + found.append(os.path.join(r, fn)) + return sorted(found) + + +# --------------------------------------------------------------------------- +# CVE extraction +# --------------------------------------------------------------------------- + + +def cves_in(path: str) -> tuple: + """Returns (high_confidence_cves, low_confidence_cves). + + High-confidence: the patch declares it via filename or Fixes:/Subject: + header. + Low-confidence: CVE mentioned somewhere in the patch body — could be + a passing reference, not actually being fixed. + """ + high: set = set() + low: set = set() + fname = os.path.basename(path) + + for m in _CVE_RE.finditer(fname): + high.add(f"CVE-{m.group(1)}-{m.group(2)}") + + try: + with open(path, "rb") as f: + data = f.read() + except Exception as e: + warn(f"could not read {path}: {e}") + return set(), set() + + # The header is up to the first 'diff --git' / '---' / '+++' boundary. + text = data.decode("utf-8", errors="replace") + header_end = re.search(r"^(?:diff --git|---|\+\+\+) ", text, re.M) + header = text[: header_end.start()] if header_end else text[:4000] + + for m in _FIXES_RE.finditer(header): + high.add(m.group(1).upper()) + for m in _SUBJECT_RE.finditer(header): + high.add(m.group(1).upper()) + for m in _CVE_RE.finditer(header): + cve = f"CVE-{m.group(1)}-{m.group(2)}".upper() + if cve not in high: + low.add(cve) + + return high, low + + +# --------------------------------------------------------------------------- +# Source-component derivation +# --------------------------------------------------------------------------- + + +_SRC_COMPONENT_RE = re.compile(r"^src/([^/]+?)(?:\.patch)?/") + + +def source_component(path: str) -> str: + """Derive a short label for the source tree this patch lives in. + 'src/thrift/patch/0002-cve-2017-1000487.patch' -> 'thrift' + 'src/sonic-linux-kernel/patches-sonic/...' -> 'sonic-linux-kernel' + 'src/scapy.patch/0001-...' -> 'scapy' + """ + m = _SRC_COMPONENT_RE.match(path) + if not m: + return "unknown" + return m.group(1) + + +# --------------------------------------------------------------------------- +# OpenVEX document construction +# --------------------------------------------------------------------------- + + +def now_iso() -> str: + epoch = os.environ.get("SOURCE_DATE_EPOCH") + if epoch: + try: + return datetime.datetime.fromtimestamp( + int(epoch), tz=datetime.timezone.utc + ).strftime("%Y-%m-%dT%H:%M:%SZ") + except Exception: + pass + return datetime.datetime.now(datetime.timezone.utc).strftime( + "%Y-%m-%dT%H:%M:%SZ" + ) + + +def make_openvex_json( + patch_path: str, component: str, + high_cves: set, low_cves: set, +) -> str: + """Return the OpenVEX JSON body for a single auto-VEX file. + + Re-runs are byte-identical (apart from timestamp, which is + SOURCE_DATE_EPOCH when set). + """ + h = hashlib.sha256((patch_path + "\n").encode()).hexdigest()[:16] + vex_id = f"https://github.com/sonic-net/sonic-buildimage/vex/auto/{h}" + + cves_sorted = sorted(high_cves) + sorted(low_cves - high_cves) + statements = [] + for cve in cves_sorted: + is_high = cve in high_cves + stmt = { + "vulnerability": {"name": cve}, + "products": [{"@id": f"pkg:generic/{component}"}], + } + if is_high: + stmt["status"] = "not_affected" + stmt["justification"] = "vulnerable_code_not_in_execute_path" + stmt["impact_statement"] = ( + f"Fixed by SONiC local patch {patch_path}. " + "Promote to a curated vex/ file with an exact product " + "PURL if grype's PURL matcher doesn't catch this " + "component automatically." + ) + else: + stmt["status"] = "under_investigation" + stmt["impact_statement"] = ( + f"Patch {patch_path} mentions {cve} in passing but is " + "not declared as a fix. Manual triage required to " + "determine whether this VEX statement applies." + ) + statements.append(stmt) + + doc = { + "@context": "https://openvex.dev/ns/v0.2.0", + "@id": vex_id, + "author": "SONiC auto-VEX", + "role": "SONiC build tooling", + "timestamp": now_iso(), + "version": 1, + "_comment": ( + "Auto-extracted from " + patch_path + ". " + "DO NOT EDIT — regenerate via " + "scripts/sbom_extract_vex_from_patches.py" + ), + "statements": statements, + } + return json.dumps(doc, indent=2, sort_keys=True) + "\n" + + +# --------------------------------------------------------------------------- +# Top-level +# --------------------------------------------------------------------------- + + +def _input_fingerprint(patches: list) -> str: + """SHA-256 over the sorted (path, content-sha256) pairs of every + discovered patch. Used as a self-cache key so re-invocations with + identical inputs (e.g. the 3 per-variant aggregator runs that + build_sbom.sh fires) can short-circuit and skip the rescan.""" + h = hashlib.sha256() + for p in sorted(patches): + try: + with open(p, "rb") as f: + fhash = hashlib.sha256(f.read()).hexdigest() + except Exception: + continue + h.update(p.encode()) + h.update(b"\0") + h.update(fhash.encode()) + h.update(b"\0") + return h.hexdigest() + + +def main() -> int: + ap = argparse.ArgumentParser(description=__doc__) + ap.add_argument("--src", default="src", + help="Source root to scan (default: src)") + ap.add_argument("--output-dir", default="vex/auto", + help="Where to write auto-VEX yamls (default: vex/auto)") + ap.add_argument("--dry-run", action="store_true", + help="Don't write files, just report counts") + args = ap.parse_args() + + if not os.path.isdir(args.src): + warn(f"source dir not found: {args.src}") + return 1 + + patches = find_patches(args.src) + info(f"scanned {len(patches)} patch files under {args.src}/") + + # Self-cache: if a prior run with byte-identical patch inputs + # already produced this output-dir, skip the rescan. The marker + # records the input fingerprint and lives inside the output-dir + # itself, so `rm -rf vex/auto/` (or `make reset`) invalidates it + # naturally. Output is deterministic so the cached files are + # identical to what we'd produce now. + marker = os.path.join(args.output_dir, ".input_hash") + fingerprint = _input_fingerprint(patches) + if not args.dry_run and os.path.isfile(marker): + try: + with open(marker) as f: + if f.read().strip() == fingerprint: + info("inputs unchanged since last run; " + "vex/auto/ is fresh, skipping rescan.") + return 0 + except Exception: + pass + + written = 0 + cve_total = 0 + for p in patches: + high, low = cves_in(p) + if not high and not low: + continue + component = source_component(p) + body = make_openvex_json(p, component, high, low) + if args.dry_run: + cve_total += len(high) + len(low) + written += 1 + info(f"would write VEX for {len(high)+len(low)} CVE(s) in {p}") + continue + out_dir = os.path.join(args.output_dir, component) + os.makedirs(out_dir, exist_ok=True) + out_path = os.path.join(out_dir, os.path.basename(p) + ".json") + try: + with open(out_path, "w") as f: + f.write(body) + written += 1 + cve_total += len(high) + len(low) + except Exception as e: + warn(f"could not write {out_path}: {e}") + + info(f"wrote {written} VEX file(s) covering {cve_total} CVE statement(s)" + + (" (dry-run)" if args.dry_run else "")) + + # Persist input fingerprint so subsequent invocations with the + # same patch inputs can short-circuit. Only after a successful + # write so a failed run can't poison the cache. + if not args.dry_run: + try: + os.makedirs(args.output_dir, exist_ok=True) + with open(marker, "w") as f: + f.write(fingerprint + "\n") + except Exception as e: + warn(f"could not write input-hash marker {marker}: {e}") + + return 0 + + +if __name__ == "__main__": + sys.exit(main()) diff --git a/scripts/sbom_fragment.py b/scripts/sbom_fragment.py new file mode 100755 index 00000000000..9acfd9439e4 --- /dev/null +++ b/scripts/sbom_fragment.py @@ -0,0 +1,1115 @@ +#!/usr/bin/env python3 +""" +sbom_fragment.py — emit a CycloneDX 1.6 fragment for a single build artifact. + +Invoked from slave.mk recipes after each artifact is built. Reads context +from environment variables: + + ARTIFACT Required. Path to the just-built .deb / .whl / .gz. + RECIPE_TYPE Required. One of: + DPKG_DEB, MAKE_DEB, DERIVED_DEB, EXTRA_DEB, + ONLINE_DEB, PYTHON_STDEB, PYTHON_WHEEL, DOCKER_IMAGE. + SRC_PATH Optional. Value of $($*_SRC_PATH). Used for submodule + + patch detection. + URL Optional. Value of $($*_URL) for ONLINE_DEB recipes. + DEPENDS Optional. Build dependencies. + RDEPENDS Optional. Runtime dependencies. + MAIN_DEB Optional. For DERIVED_DEB / EXTRA_DEB: filename of the + parent .deb that produced this artifact. + +Output: .cdx.json next to the artifact. + +What this script emits per fragment: + - Recipe-driven identity: PURL, name, version, arch from the + artifact filename and recipe context. + - Source provenance: git submodule URL + commit SHA when SRC_PATH + is a submodule. + - Patch enumeration: SHA-256 per patch file when a sibling + .patch/, /patch/, or /patches/ is + found. + - Aggregate patch-set SHA-1 over (series + *.patch), matching the + scheme used internally by src/sonic-frr/Makefile. + - Upstream ancestor (pedigree.ancestors[]) when detectable: + - dget upstream resolved from versions-web for apt-source recipes + - nested-submodule ancestor for sonic-net wrappers around upstream + - direct submodule ancestor for non-sonic-net submodules + - Vendor supplier identity for SONIC_ONLINE_DEBS, derived from URL + pattern, plus a default EULA license marker. ARTIFACT_LICENSE + env-var override wins when set. + +License resolution itself (DEP-5 parsing, SPDX translation) is +performed later by the aggregator (build_sbom.py) against +copyrights.tar.gz tarballs harvested by the build hook; it is not +done here. + +The script is fail-soft: any unexpected condition logs to stderr and +exits 0. Build failure must not be caused by SBOM emit issues. +""" + +import hashlib +import json +import os +import re +import shutil +import subprocess +import sys +import tempfile +import time +from typing import Any, Optional + + +def warn(msg: str) -> None: + sys.stderr.write(f"[sbom_fragment.py] WARNING: {msg}\n") + + +def info(msg: str) -> None: + # Silent by default: per-artifact emission would log ~120 lines per build. + # Set SBOM_DEBUG=y in the env to see normal progress messages. + if os.environ.get("SBOM_DEBUG", "n") == "y": + sys.stderr.write(f"[sbom_fragment.py] {msg}\n") + + +# ---------------------------------------------------------------------------- +# Filename parsers +# ---------------------------------------------------------------------------- + +_DEB_RE = re.compile(r"^(?P[^_]+)_(?P[^_]+)_(?P[^.]+)\.deb$") +_WHL_RE = re.compile( + r"^(?P[^-]+)-(?P[^-]+)-" + r"(?P[^-]+)-(?P[^-]+)-(?P[^.]+)\.whl$" +) +_GZ_RE = re.compile(r"^(?P.+?)(?P-dbg)?\.gz$") + + +def parse_artifact_name(path: str) -> dict: + """Best-effort decompose an artifact filename.""" + fn = os.path.basename(path) + if fn.endswith(".deb"): + m = _DEB_RE.match(fn) + if m: + return { + "kind": "deb", + "name": m.group("name"), + "version": m.group("version"), + "arch": m.group("arch"), + "filename": fn, + } + if fn.endswith(".whl"): + m = _WHL_RE.match(fn) + if m: + return { + "kind": "wheel", + "name": m.group("name").replace("_", "-").lower(), + "version": m.group("version"), + "arch": "any", + "py_tag": m.group("pytag"), + "abi_tag": m.group("abitag"), + "platform_tag": m.group("plat"), + "filename": fn, + } + if fn.endswith(".gz"): + m = _GZ_RE.match(fn) + if m: + return { + "kind": "docker", + "name": m.group("name"), + "version": os.environ.get("SONIC_IMAGE_VERSION", "0.0.0"), + "arch": os.environ.get("CONFIGURED_ARCH", "amd64"), + "filename": fn, + "debug": bool(m.group("dbg")), + } + return { + "kind": "unknown", + "name": fn, + "version": "0.0.0", + "arch": os.environ.get("CONFIGURED_ARCH", "amd64"), + "filename": fn, + } + + +# ---------------------------------------------------------------------------- +# Submodule detection (best-effort, fail-soft) +# ---------------------------------------------------------------------------- + + +def run(cmd: list, cwd: Optional[str] = None) -> Optional[str]: + """Run a command and return stdout or None on any error.""" + try: + r = subprocess.run( + cmd, cwd=cwd, capture_output=True, text=True, timeout=30, check=False + ) + if r.returncode == 0: + return r.stdout.strip() + except Exception: + pass + return None + + +def _find_gitmodules_for(abs_src: str) -> Optional[tuple]: + """Walk parents looking for a .gitmodules; return (gm_path, rel_path).""" + cur = os.path.dirname(abs_src) + while cur and cur != "/": + gm = os.path.join(cur, ".gitmodules") + if os.path.isfile(gm): + return gm, os.path.relpath(abs_src, cur) + cur = os.path.dirname(cur) + return None + + +def _lookup_submodule_url(gm: str, rel: str) -> Optional[str]: + """Find the submodule..url whose path = rel inside the .gitmodules file.""" + url = run(["git", "config", "-f", gm, "--get", + f"submodule.{rel}.url"]) + if url: + return url + # .gitmodules keys by section name (often != path); fall back to grep. + try: + with open(gm) as f: + text = f.read() + blocks = re.split(r"^\[submodule ", text, flags=re.M) + for b in blocks[1:]: + if re.search(rf"^\s*path\s*=\s*{re.escape(rel)}\s*$", b, re.M): + m = re.search(r"^\s*url\s*=\s*(\S+)\s*$", b, re.M) + if m: + return m.group(1) + except Exception: + pass + return None + + +def detect_submodule(src_path: str) -> Optional[dict]: + """If src_path is a git submodule, return {url, commit, describe}.""" + if not src_path or not os.path.isdir(src_path): + return None + abs_src = os.path.abspath(src_path) + found = _find_gitmodules_for(abs_src) + if not found: + return None + gm, rel = found + url = _lookup_submodule_url(gm, rel) + if not url: + return None + commit = run(["git", "rev-parse", "HEAD"], cwd=abs_src) + describe = run(["git", "describe", "--tags", "--always"], cwd=abs_src) + return { + "url": url.rstrip(".git").rstrip("/"), + "commit": commit, + "describe": describe, + } + + +def detect_nested_submodules(src_path: str) -> list: + """Find submodule paths that live *inside* src_path. + + Used to detect the FRR pattern (src/sonic-frr → src/sonic-frr/frr → + FRRouting/frr) where the outer dir is a sonic-net wrapper holding + patches + Makefile and the inner dir is upstream. + """ + if not src_path or not os.path.isdir(src_path): + return [] + abs_src = os.path.abspath(src_path) + found = _find_gitmodules_for(abs_src) + if not found: + return [] + gm, src_rel = found + out = [] + try: + with open(gm) as f: + text = f.read() + for block in re.split(r"^\[submodule ", text, flags=re.M)[1:]: + m = re.search(r"^\s*path\s*=\s*(\S+)\s*$", block, re.M) + if not m: + continue + path = m.group(1) + # Is this path strictly under src_rel? + if path == src_rel or not path.startswith(src_rel.rstrip("/") + "/"): + continue + u = re.search(r"^\s*url\s*=\s*(\S+)\s*$", block, re.M) + if not u: + continue + url = u.group(1).rstrip(".git").rstrip("/") + cur = os.path.dirname(gm) + sub_abs = os.path.join(cur, path) + commit = run(["git", "rev-parse", "HEAD"], cwd=sub_abs) + describe = run(["git", "describe", "--tags", "--always"], + cwd=sub_abs) + out.append({ + "path": path, + "url": url, + "commit": commit, + "describe": describe, + }) + except Exception as e: + warn(f"nested-submodule scan failed in {src_path}: {e}") + return out + + +# ---------------------------------------------------------------------------- +# Upstream Debian source lookup (Pattern A2) +# ---------------------------------------------------------------------------- + +# Two sources of versions-web data: +# 1. files/build/versions/default/versions-web - committed pins. +# Carries the "blessed" upstream URLs for things that have been +# version-promoted (dget'd Debian sources are the main case here). +# 2. target/versions/.../versions-web - written by the wget/curl shim +# during the current build. Carries everything the build actually +# fetched, including things not yet promoted (e.g. the kernel +# source descriptor, which the kernel Makefile wgets directly). +# We scan both so the lookup is correct on first-build before any +# promotion has happened. +_VERSIONS_WEB_SOURCES = [ + os.path.join("files", "build", "versions", "default", "versions-web"), +] + +_DSC_URL_RE = re.compile( + r"^(?Phttps?://[^=]+?/(?P[^/]+)/(?P=pkg)_(?P[^/]+?)\.dsc)==(?P[0-9a-f]+)$" +) +_ORIG_URL_RE = re.compile( + r"^(?Phttps?://[^=]+?/(?P[^/]+)/(?P=pkg)_(?P[^.]+?)\.orig\.tar\.[^=]+)==(?P[0-9a-f]+)$" +) + + +def _collect_versions_web_files() -> list: + """Return the committed pin file plus any build-time versions-web + captures under target/versions/.""" + files = [] + for p in _VERSIONS_WEB_SOURCES: + if os.path.isfile(p): + files.append(p) + target = os.environ.get("TARGET_PATH", "target") + if os.path.isdir(target): + for root, _, fns in os.walk(os.path.join(target, "versions")): + for fn in fns: + if fn == "versions-web": + files.append(os.path.join(root, fn)) + return files + + +def lookup_upstream_debian_source(src_path: str) -> Optional[dict]: + """For Pattern A2 (dget/wget-based recipes), find the upstream Debian + source descriptor in versions-web. Returns + {name, version, dsc_url, dsc_md5, orig_url, orig_md5} + or None. + """ + if not src_path: + return None + src_basename = os.path.basename(src_path.rstrip("/")) + if not src_basename: + return None + # Special case: sonic-linux-kernel builds Debian's `linux` source. + lookup_keys = [src_basename] + if src_basename == "sonic-linux-kernel": + lookup_keys.append("linux") + dsc_match = None + orig_match = None + for path in _collect_versions_web_files(): + try: + with open(path) as f: + for line in f: + line = line.strip() + if not line: + continue + m = _DSC_URL_RE.match(line) + if m and m.group("pkg") in lookup_keys: + dsc_match = m + continue + m = _ORIG_URL_RE.match(line) + if m and m.group("pkg") in lookup_keys: + orig_match = m + except Exception as e: + warn(f"versions-web scan of {path} failed: {e}") + continue + if dsc_match: + break + if not dsc_match: + return None + info = { + "name": dsc_match.group("pkg"), + "version": dsc_match.group("ver"), + "dsc_url": dsc_match.group("url"), + "dsc_md5": dsc_match.group("md5"), + } + if orig_match: + info["orig_url"] = orig_match.group("url") + info["orig_md5"] = orig_match.group("md5") + return info + + +# ---------------------------------------------------------------------------- +# Patch series detection +# ---------------------------------------------------------------------------- + + +def find_patch_dir(src_path: str) -> Optional[str]: + """Locate a patch series directory adjacent to or under src_path.""" + if not src_path: + return None + candidates = [ + src_path + ".patch", # src/scapy.patch, src/sonic-swss.patch, ... + os.path.join(src_path, "patch"), # src/openssh/patch, src/sonic-frr/patch + os.path.join(src_path, "patches"), # src/bash/patches, src/sonic-mgmt-common/patches + ] + # Linux kernel uses a uniquely-named subdir. + if os.path.basename(src_path.rstrip("/")) == "sonic-linux-kernel": + candidates.insert(0, os.path.join(src_path, "patches-sonic")) + for c in candidates: + if os.path.isfile(os.path.join(c, "series")): + return c + return None + + +def enumerate_patches(patch_dir: str) -> list: + """Read series file, hash each patch.""" + out = [] + series = os.path.join(patch_dir, "series") + if not os.path.isfile(series): + return out + try: + with open(series) as f: + for line in f: + line = line.strip() + if not line or line.startswith("#"): + continue + # Series lines can carry options after the filename. + fname = line.split()[0] + pf = os.path.join(patch_dir, fname) + if not os.path.isfile(pf): + continue + h = hashlib.sha256() + with open(pf, "rb") as pfh: + h.update(pfh.read()) + out.append({ + "name": fname, + "path": os.path.relpath(pf), + "sha256": h.hexdigest(), + }) + except Exception as e: + warn(f"failed to read patch series in {patch_dir}: {e}") + return out + + +def patchset_hash(patch_dir: str) -> Optional[str]: + """Aggregate SHA-256 over series + *.patch contents (FRR-style).""" + series = os.path.join(patch_dir, "series") + if not os.path.isfile(series): + return None + h = hashlib.sha256() + try: + with open(series, "rb") as f: + h.update(f.read()) + # Hash the patch files in series order. + with open(series) as f: + for line in f: + line = line.strip() + if not line or line.startswith("#"): + continue + fname = line.split()[0] + pf = os.path.join(patch_dir, fname) + if os.path.isfile(pf): + with open(pf, "rb") as pfh: + h.update(pfh.read()) + return h.hexdigest() + except Exception: + return None + + +# ---------------------------------------------------------------------------- +# PURL construction +# ---------------------------------------------------------------------------- + + +def is_sonic_net_url(url: Optional[str]) -> bool: + if not url: + return False + return "github.com/sonic-net" in url or "github.com/Azure/sonic" in url + + +# Pattern C — vendor binary suppliers. Used to label SONIC_ONLINE_DEBS +# (Broadcom/Mellanox/Marvell/NVIDIA/Pensando/Arista SDKs) so the SBOM +# records who owns the license terms. The match is a substring against +# the lowercased URL; first hit wins. +_VENDOR_URL_PATTERNS = [ + ("broadcom", "Broadcom Inc."), + ("sai-broadcom", "Broadcom Inc."), + ("libsaibcm", "Broadcom Inc."), + ("mellanox", "NVIDIA / Mellanox"), + ("nvidia", "NVIDIA"), + ("bluefield", "NVIDIA / Mellanox"), + ("doca", "NVIDIA"), + ("marvell", "Marvell Technology"), + ("teralynx", "Marvell Technology"), + ("prestera", "Marvell Technology"), + ("pensando", "AMD / Pensando"), + ("aristanetworks", "Arista Networks"), + ("aristanetwork", "Arista Networks"), + ("phy-credo", "Credo"), + ("p4lang", "P4 Language Consortium"), + ("openconfig", "OpenConfig"), +] + + +def _vendor_supplier_from_url(url: Optional[str]) -> Optional[str]: + if not url: + return None + u = url.lower() + for pat, supplier in _VENDOR_URL_PATTERNS: + if pat in u: + return supplier + return None + + +def build_purl(meta: dict, submodule: Optional[dict]) -> str: + """Construct a PURL appropriate to the artifact + source provenance.""" + if meta["kind"] == "deb": + # Heuristic: when source is a sonic-net submodule, use the github + # PURL as primary identity. Otherwise it's an apt-style deb. + if submodule and is_sonic_net_url(submodule.get("url")): + repo = submodule["url"].rsplit("/", 1)[-1] + sha = (submodule.get("commit") or "")[:12] + return f"pkg:github/sonic-net/{repo}@{sha}" + # Default: deb with sonic namespace (locally rebuilt). + return f"pkg:deb/sonic/{meta['name']}@{meta['version']}?arch={meta['arch']}" + if meta["kind"] == "wheel": + return f"pkg:pypi/{meta['name']}@{meta['version']}" + if meta["kind"] == "docker": + return f"pkg:oci/{meta['name']}@{meta['version']}?arch={meta['arch']}" + return f"pkg:generic/{meta['name']}@{meta['version']}" + + +# ---------------------------------------------------------------------------- +# Ancestor (pedigree.ancestors[]) construction +# ---------------------------------------------------------------------------- + + +def _github_purl_for_url(url: str, ref: Optional[str]) -> str: + """Derive a pkg:github//@ PURL from a GitHub URL.""" + m = re.search(r"github\.com[:/]([^/]+)/([^/]+?)(?:\.git)?/?$", url) + if m: + return f"pkg:github/{m.group(1)}/{m.group(2)}@{ref or 'unknown'}" + # Generic fallback for non-GitHub URLs. + return f"pkg:generic/{url}@{ref or 'unknown'}" + + +def ancestor_from_submodule(sm: dict) -> dict: + """Build a pedigree.ancestor entry from a non-sonic-net submodule.""" + ref = sm.get("describe") or (sm.get("commit") or "")[:12] + purl = _github_purl_for_url(sm["url"], ref) + return { + "type": "library", + "name": sm["url"].rsplit("/", 1)[-1], + "version": ref, + "purl": purl, + "externalReferences": [{ + "type": "vcs", + "url": sm["url"], + "comment": f"submodule commit {sm.get('commit', '')}", + }], + } + + +def ancestor_from_debian_source(info: dict) -> dict: + """Build a pedigree.ancestor entry from a versions-web dget lookup.""" + ext_refs = [{ + "type": "distribution", + "url": info["dsc_url"], + "hashes": [{"alg": "MD5", "content": info["dsc_md5"]}], + }] + if info.get("orig_url"): + ext_refs.append({ + "type": "distribution", + "url": info["orig_url"], + "hashes": [{"alg": "MD5", "content": info["orig_md5"]}], + "comment": "original upstream tarball", + }) + return { + "type": "library", + "name": info["name"], + "version": info["version"], + "purl": f"pkg:deb/debian/{info['name']}@{info['version']}", + "externalReferences": ext_refs, + } + + +# ---------------------------------------------------------------------------- +# Fragment construction +# ---------------------------------------------------------------------------- + + +def component_type(kind: str) -> str: + if kind == "docker": + return "container" + if kind == "wheel": + return "library" + return "library" + + +def split_csv(value: str) -> list: + return [x.strip() for x in (value or "").split() if x.strip()] + + +# --------------------------------------------------------------------------- +# Per-.deb language dependency attribution +# +# For each SONiC-built .deb we extract once with `dpkg-deb -x` and run +# three harvesters against the unpacked tree: +# +# Rust cargo-auditable embeds the resolved Cargo dep graph as a +# zlib-compressed JSON blob in the `.dep-v0` ELF section. +# rust-audit-info reads it back out. +# Go `go build` embeds module info via runtime/debug.BuildInfo +# (the `.go.buildinfo` ELF section). `go version -m ` +# prints it as line-oriented text. +# Python Wheel-style installs land in `*.dist-info/` directories +# alongside the importable package. We walk for METADATA +# files and parse them as RFC 822. +# +# Each emitted component carries: +# sonic:fragment_kind = recipe-emit-{rust,go,python} +# sonic:source_deb = +# +# build_sbom.py:build_dependency_graph() reverses sonic:source_deb into +# a dependsOn edge from the .deb's bom-ref to each language-dep +# component, so consumers can walk swss_*.deb -> tokio@1.x or +# sonic-gnmi_*.deb -> github.com/openconfig/gnmi@v0.10 directly. +# +# Scope is .deb-level (not per-binary): if two binaries inside the same +# .deb both link tokio, we emit one tokio component. CVE-blast-radius +# triage operates at the artifact level for our use case. +# --------------------------------------------------------------------------- + +# Per-binary tool-execution timeout. rust-audit-info and `go version -m` +# are fast (tens of ms each) on well-formed inputs but could hang on +# corrupt or extremely large ELFs. Don't let one weird .deb wedge the +# whole build. +_LANG_TOOL_TIMEOUT_SECS = 30 + +# Sentinel env vars so the "tool not available" warnings only fire once +# per build, instead of once per .deb fragment. +_RUST_TOOL_LOGGED = "_SBOM_RUST_AUDIT_INFO_MISSING_LOGGED" +_GO_TOOL_LOGGED = "_SBOM_GO_TOOL_MISSING_LOGGED" + +_PYPI_NORM_RE = re.compile(r"[-_.]+") + + +def _is_elf(path: str) -> bool: + """Cheap 4-byte magic check for ELF files. Skips symlinks and + non-files (named pipes, sockets) silently.""" + try: + if not os.path.isfile(path) or os.path.islink(path): + return False + with open(path, "rb") as f: + return f.read(4) == b"\x7fELF" + except OSError: + return False + + +def _pypi_normalize(name: str) -> str: + """PEP 503 name normalization: lowercase, runs of -_. -> single -.""" + return _PYPI_NORM_RE.sub("-", name).lower() + + +def _rust_components_from_elf( + elf_path: str, audit_info_bin: str, deb_filename: str, +) -> list: + """Run rust-audit-info on one ELF; return CycloneDX components for + every crate it found. Silent skip on any failure — most binaries + are non-Rust or built without cargo-auditable. + """ + try: + out = subprocess.run( + [audit_info_bin, elf_path], + capture_output=True, text=True, check=False, + timeout=_LANG_TOOL_TIMEOUT_SECS, + ) + except subprocess.TimeoutExpired: + warn(f"rust-audit-info timed out on {elf_path}") + return [] + if out.returncode != 0 or not out.stdout.strip(): + return [] + try: + data = json.loads(out.stdout) + except json.JSONDecodeError: + return [] + pkgs = data.get("packages") or [] + components = [] + for pkg in pkgs: + name = pkg.get("name") + version = pkg.get("version") + if not (name and version): + continue + source = pkg.get("source") or "local" + purl = f"pkg:cargo/{name}@{version}" + comp = { + "bom-ref": purl, + "type": "library", + "name": name, + "version": version, + "purl": purl, + "properties": [ + {"name": "sonic:fragment_kind", "value": "recipe-emit-rust"}, + {"name": "sonic:source_deb", "value": deb_filename}, + {"name": "sonic:source", "value": source}, + ], + } + kind = pkg.get("kind") + if kind: + comp["properties"].append( + {"name": "sonic:cargo_kind", "value": str(kind)} + ) + components.append(comp) + return components + + +def _go_components_from_elf( + elf_path: str, go_bin: str, deb_filename: str, +) -> list: + """Run `go version -m ` and parse the embedded module graph. + + Format (each module line begins with a leading tab): + + : go1.21.5 + \\tpath\\t
+ \\tmod\\t
\\t(devel) + \\tdep\\t\\t\\t + \\t=>\\t\\t\\t (replacement of previous dep) + \\tbuild\\t... + + We only care about `dep` and `=>` lines. A `=>` immediately + following a `dep` line means the dep was replaced; we keep the + replacement (what actually shipped). + """ + try: + out = subprocess.run( + [go_bin, "version", "-m", elf_path], + capture_output=True, text=True, check=False, + timeout=_LANG_TOOL_TIMEOUT_SECS, + ) + except subprocess.TimeoutExpired: + warn(f"go version -m timed out on {elf_path}") + return [] + if out.returncode != 0 or not out.stdout: + return [] + # `go version -m` prints ": " for Go binaries; for + # non-Go ELFs it prints ": go: ..." or returns rc=1. Either + # way, no module lines follow. + deps: list = [] # ordered list of (name, version) + for line in out.stdout.splitlines(): + parts = line.split("\t") + # Module lines look like ['', '', '', '', ...] + if len(parts) < 4 or parts[0] != "": + continue + kind = parts[1] + name = parts[2] + version = parts[3] + if not (name and version): + continue + if kind == "dep": + deps.append((name, version)) + elif kind == "=>" and deps: + # Replacement directive — overwrite the immediately + # preceding dep so we record what actually shipped. + deps[-1] = (name, version) + components = [] + for name, version in deps: + purl = f"pkg:golang/{name}@{version}" + components.append({ + "bom-ref": purl, + "type": "library", + "name": name, + "version": version, + "purl": purl, + "properties": [ + {"name": "sonic:fragment_kind", "value": "recipe-emit-go"}, + {"name": "sonic:source_deb", "value": deb_filename}, + ], + }) + return components + + +def _python_components_from_dist_info( + tmpdir: str, deb_filename: str, +) -> list: + """Walk an extracted .deb tree for *.dist-info/METADATA files and + parse Name + Version out of each. Wheels installed inside a .deb + (either directly bundled, or staged via pip in the recipe) show up + here. Older .egg-info directories with PKG-INFO are not parsed; + dist-info is the modern format and what pip emits since 2020. + """ + components = [] + seen: set = set() # (normalized_name, version) + for root, _, _ in os.walk(tmpdir): + if not root.endswith(".dist-info"): + continue + meta_path = os.path.join(root, "METADATA") + if not os.path.isfile(meta_path): + continue + name = None + version = None + try: + with open(meta_path, errors="replace") as f: + for line in f: + # Headers stop at the first blank line (RFC 822). + if not line.strip(): + break + # Continuation lines start with whitespace; ignore + # them — Name and Version are always single-line. + if line[0] in (" ", "\t"): + continue + if line.startswith("Name:"): + name = line.split(":", 1)[1].strip() + elif line.startswith("Version:"): + version = line.split(":", 1)[1].strip() + if name and version: + break + except OSError: + continue + if not (name and version): + continue + norm = _pypi_normalize(name) + key = (norm, version) + if key in seen: + continue + seen.add(key) + purl = f"pkg:pypi/{norm}@{version}" + components.append({ + "bom-ref": purl, + "type": "library", + "name": name, + "version": version, + "purl": purl, + "properties": [ + {"name": "sonic:fragment_kind", "value": "recipe-emit-python"}, + {"name": "sonic:source_deb", "value": deb_filename}, + ], + }) + return components + + +def extract_lang_deps_from_deb(deb_path: str, deb_filename: str) -> list: + """One-shot .deb extraction + Rust + Go + Python harvesters. + + Returns a flat list of CycloneDX components. Each component is + deduped at .deb scope (one entry per (purl) per .deb regardless + of how many binaries it appeared in). + + Returns [] when: + - the .deb doesn't exist or extraction fails + - the .deb contains no Rust/Go/Python deps to attribute + """ + if not os.path.exists(deb_path): + return [] + + # Tool availability: warn once per build (via process-env sentinel) + # if a tool is missing, then skip its harvester. The other two + # languages still run. + audit_info = shutil.which("rust-audit-info") + if not audit_info and not os.environ.get(_RUST_TOOL_LOGGED): + warn( + "rust-audit-info not in PATH; .deb-introspected Rust " + "crate attribution disabled (this enrichment requires " + "rust-audit-info, installed in slave Dockerfiles)" + ) + os.environ[_RUST_TOOL_LOGGED] = "1" + go_bin = shutil.which("go") + if not go_bin and not os.environ.get(_GO_TOOL_LOGGED): + warn( + "go not in PATH; .deb-introspected Go module attribution " + "disabled (golang-go is normally installed in every slave " + "image alongside the C/C++ toolchain)" + ) + os.environ[_GO_TOOL_LOGGED] = "1" + + by_purl: dict = {} # purl -> component (dedup at .deb scope) + counts = {"rust": 0, "go": 0, "python": 0, "elfs": 0} + + try: + with tempfile.TemporaryDirectory(prefix="sbom-lang-deb-") as tmpdir: + extract = subprocess.run( + ["dpkg-deb", "-x", deb_path, tmpdir], + capture_output=True, text=True, check=False, + ) + if extract.returncode != 0: + warn( + f"dpkg-deb -x failed for {deb_path}: " + f"{(extract.stderr or '').strip()[:200]}" + ) + return [] + # Single ELF walk — both Rust + Go harvesters share it. + for root, _, files in os.walk(tmpdir): + for fn in files: + path = os.path.join(root, fn) + if not _is_elf(path): + continue + counts["elfs"] += 1 + if audit_info: + for comp in _rust_components_from_elf( + path, audit_info, deb_filename, + ): + if comp["purl"] not in by_purl: + by_purl[comp["purl"]] = comp + counts["rust"] += 1 + if go_bin: + for comp in _go_components_from_elf( + path, go_bin, deb_filename, + ): + if comp["purl"] not in by_purl: + by_purl[comp["purl"]] = comp + counts["go"] += 1 + # Python dist-info walk: independent of ELF walk; runs + # against the same tmpdir. + for comp in _python_components_from_dist_info( + tmpdir, deb_filename, + ): + if comp["purl"] not in by_purl: + by_purl[comp["purl"]] = comp + counts["python"] += 1 + except OSError as e: + warn(f"language-dep attribution failed for {deb_path}: {e}") + return [] + + if not by_purl: + return [] + + info( + f"lang-attribution: {deb_filename} -> " + f"{counts['rust']} crates, {counts['go']} go modules, " + f"{counts['python']} python dists ({counts['elfs']} ELFs scanned)" + ) + # Sort for stable output ordering across builds. + return [by_purl[p] for p in sorted(by_purl)] + + +# Backwards-compatibility alias for any caller still importing the +# Rust-specific name. Kept as a thin wrapper that filters to Rust +# components only. +def extract_rust_deps_from_deb(deb_path: str, deb_filename: str) -> list: + """Deprecated: use extract_lang_deps_from_deb() instead. + Returned for backward compatibility; filters to recipe-emit-rust. + """ + return [ + c for c in extract_lang_deps_from_deb(deb_path, deb_filename) + if any(p.get("name") == "sonic:fragment_kind" + and p.get("value") == "recipe-emit-rust" + for p in c.get("properties", []) or []) + ] + + +def build_fragment(artifact: str, recipe_type: str) -> dict: + meta = parse_artifact_name(artifact) + src_path = os.environ.get("SRC_PATH", "") + submodule = detect_submodule(src_path) if src_path else None + patch_dir = find_patch_dir(src_path) if src_path else None + patches = enumerate_patches(patch_dir) if patch_dir else [] + ps_hash = patchset_hash(patch_dir) if patch_dir else None + + bom_ref = build_purl(meta, submodule) + + component: dict[str, Any] = { + "bom-ref": bom_ref, + "type": component_type(meta["kind"]), + "name": meta["name"], + "version": meta["version"], + "purl": bom_ref, + "properties": [ + {"name": "sonic:fragment_kind", "value": "recipe-emit"}, + {"name": "sonic:recipe_type", "value": recipe_type}, + {"name": "sonic:artifact_filename", "value": meta["filename"]}, + ], + } + + if meta["kind"] == "deb": + component["properties"].append( + {"name": "sonic:arch", "value": meta["arch"]} + ) + + # Honor an explicit per-recipe license override + # ($(ARTIFACT)_LICENSE in the recipe → ARTIFACT_LICENSE env var here). + # Useful for SONiC-native debs/wheels that don't ship a debian/copyright + # — the DEP-5 resolver can't infer their license from /usr/share/doc. + artifact_license = os.environ.get("ARTIFACT_LICENSE", "").strip() + if artifact_license: + component["licenses"] = [{"expression": artifact_license}] + + if submodule: + component["externalReferences"] = [{ + "type": "vcs", + "url": submodule["url"], + "comment": f"submodule pinned to {submodule.get('commit', '')}", + }] + component["properties"].append( + {"name": "sonic:submodule_commit", + "value": submodule.get("commit", "")} + ) + + online_url = os.environ.get("URL", "") + if recipe_type == "ONLINE_DEB" and online_url: + component.setdefault("externalReferences", []).append({ + "type": "distribution", + "url": online_url, + }) + # Compute SHA-256 of the just-fetched artifact so we have an + # authoritative hash regardless of whether _SKIP_VERSION was set. + try: + h = hashlib.sha256() + with open(artifact, "rb") as f: + for chunk in iter(lambda: f.read(65536), b""): + h.update(chunk) + component["hashes"] = [{"alg": "SHA-256", "content": h.hexdigest()}] + except Exception as e: + warn(f"could not hash {artifact}: {e}") + + # Pattern C: derive vendor supplier from URL pattern; mark the + # license category as proprietary by default (overridable via + # ARTIFACT_LICENSE if a vendor publishes under a known SPDX + # license). + supplier = _vendor_supplier_from_url(online_url) + if supplier: + component["supplier"] = {"name": supplier} + component["properties"].append( + {"name": "sonic:supplier_source", "value": "vendor_url"} + ) + # Don't override an explicit ARTIFACT_LICENSE if one was set. + if not component.get("licenses"): + component["licenses"] = [ + {"license": {"name": f"{supplier} proprietary (EULA)"}} + ] + + # ---- Ancestor resolution (Pattern A2/A3/A4) ---- + ancestors: list = [] + + # Pattern A4: direct non-sonic-net submodule. The submodule IS the + # upstream. Emit it as ancestor so the component records both the + # SONiC-rebuilt identity (primary PURL) and the upstream source. + if submodule and not is_sonic_net_url(submodule.get("url")): + ancestors.append(ancestor_from_submodule(submodule)) + + # Pattern A3: sonic-net wrapper with a nested non-sonic-net + # submodule (FRR / sonic-pins / gnoi / wpa-supplicant pattern). + # The nested submodule is the true upstream. + if src_path: + for nested in detect_nested_submodules(src_path): + if not is_sonic_net_url(nested.get("url")): + ancestors.append(ancestor_from_submodule(nested)) + + # Pattern A2: dget-based recipe. Look up the upstream Debian source + # descriptor in versions-web. Only consider this if SRC_PATH is NOT + # itself a submodule (which would mean Pattern A1/A4). + if src_path and not submodule: + upstream = lookup_upstream_debian_source(src_path) + if upstream: + ancestors.append(ancestor_from_debian_source(upstream)) + + if patches or ancestors: + pedigree: dict[str, Any] = {} + if ancestors: + pedigree["ancestors"] = ancestors + if patches: + pedigree["patches"] = [ + { + "type": "unofficial", + "diff": { + "url": f"file://{p['path']}", + "hashes": [{"alg": "SHA-256", "content": p["sha256"]}], + }, + } + for p in patches + ] + if ps_hash: + pedigree["notes"] = f"patch-set sha256: {ps_hash}" + component["pedigree"] = pedigree + + main_deb = os.environ.get("MAIN_DEB", "") + if recipe_type in ("DERIVED_DEB", "EXTRA_DEB") and main_deb: + component["properties"].append( + {"name": "sonic:parent_artifact", "value": main_deb} + ) + + depends = split_csv(os.environ.get("DEPENDS", "")) + rdepends = split_csv(os.environ.get("RDEPENDS", "")) + if depends: + component["properties"].append( + {"name": "sonic:build_depends", "value": " ".join(depends)} + ) + if rdepends: + component["properties"].append( + {"name": "sonic:runtime_depends", "value": " ".join(rdepends)} + ) + + # Language-dep attribution: extract per-binary Rust crates / Go + # modules + per-dist-info Python packages from any .deb fragment. + # Non-.deb recipes return []. Timing instrumentation lets the + # build log show real per-deb cost (Phase E); gated to only log + # when something was found or when the operation took noticeably + # long, so we don't spam ~120 zero-line entries per build. + lang_components: list = [] + if meta["kind"] == "deb": + t0 = time.monotonic() + lang_components = extract_lang_deps_from_deb( + artifact, meta["filename"], + ) + dt = time.monotonic() - t0 + if lang_components or dt > 1.0: + info( + f"lang-deps timing: {meta['filename']} took {dt:.2f}s " + f"({len(lang_components)} components)" + ) + + fragment = { + "bomFormat": "CycloneDX", + "specVersion": "1.6", + "version": 1, + "metadata": { + "properties": [ + {"name": "sonic:fragment_kind", "value": "recipe-emit"}, + {"name": "sonic:recipe_type", "value": recipe_type}, + {"name": "sonic:src_path", "value": src_path}, + {"name": "sonic:platform", + "value": os.environ.get("CONFIGURED_PLATFORM", "")}, + {"name": "sonic:arch", + "value": os.environ.get("CONFIGURED_ARCH", "")}, + ], + }, + "components": [component, *lang_components], + } + return fragment + + +# ---------------------------------------------------------------------------- +# Entry point +# ---------------------------------------------------------------------------- + + +def main() -> int: + if os.environ.get("ENABLE_SBOM", "n") != "y": + return 0 + + artifact = os.environ.get("ARTIFACT", "") + recipe_type = os.environ.get("RECIPE_TYPE", "") + if not artifact or not recipe_type: + warn("ARTIFACT and RECIPE_TYPE env vars are required") + return 0 # Fail-soft + + if not os.path.exists(artifact): + warn(f"artifact does not exist: {artifact}") + return 0 + + try: + fragment = build_fragment(artifact, recipe_type) + except Exception as e: + warn(f"fragment construction failed for {artifact}: {e}") + return 0 + + out_path = f"{artifact}.cdx.json" + try: + with open(out_path, "w") as f: + json.dump(fragment, f, indent=2, sort_keys=True) + info(f"wrote {out_path}") + except Exception as e: + warn(f"could not write {out_path}: {e}") + + return 0 + + +if __name__ == "__main__": + sys.exit(main()) diff --git a/scripts/sbom_license_map.json b/scripts/sbom_license_map.json new file mode 100644 index 00000000000..fd80a007552 --- /dev/null +++ b/scripts/sbom_license_map.json @@ -0,0 +1,120 @@ +{ + "_comment": "Translation table from Debian copyright-format/1.0/ License: header strings to SPDX license identifiers. Keys are normalized (lowercase, whitespace-collapsed) before lookup. Used by scripts/sbom_resolve_licenses.py.", + + "Apache-2.0": "Apache-2.0", + "Apache-2": "Apache-2.0", + "Apache 2.0": "Apache-2.0", + "Apache License, Version 2.0": "Apache-2.0", + "Apache License 2.0": "Apache-2.0", + "Artistic-1.0": "Artistic-1.0", + "Artistic-2.0": "Artistic-2.0", + "Artistic": "Artistic-1.0", + + "BSD-2-clause": "BSD-2-Clause", + "BSD-2-Clause": "BSD-2-Clause", + "BSD 2-Clause": "BSD-2-Clause", + "BSD-3-clause": "BSD-3-Clause", + "BSD-3-Clause": "BSD-3-Clause", + "BSD-3-clause-Wilson": "BSD-3-Clause", + "BSD 3-Clause": "BSD-3-Clause", + "BSD-4-clause": "BSD-4-Clause", + "BSD-4-Clause": "BSD-4-Clause", + "BSD": "BSD-3-Clause", + + "CC0-1.0": "CC0-1.0", + "CC0": "CC0-1.0", + "CC-BY-3.0": "CC-BY-3.0", + "CC-BY-4.0": "CC-BY-4.0", + "CC-BY-SA-3.0": "CC-BY-SA-3.0", + "CC-BY-SA-4.0": "CC-BY-SA-4.0", + + "EPL-1.0": "EPL-1.0", + "EPL-2.0": "EPL-2.0", + "Expat": "MIT", + "MIT": "MIT", + "MIT/X11": "MIT", + "MIT-like": "MIT", + + "GPL-1": "GPL-1.0-only", + "GPL-1+": "GPL-1.0-or-later", + "GPL-1.0": "GPL-1.0-only", + "GPL-1.0+": "GPL-1.0-or-later", + "GPL-2": "GPL-2.0-only", + "GPL-2+": "GPL-2.0-or-later", + "GPL-2.0": "GPL-2.0-only", + "GPL-2.0+": "GPL-2.0-or-later", + "GPL-2.0-only": "GPL-2.0-only", + "GPL-2.0-or-later": "GPL-2.0-or-later", + "GPL-3": "GPL-3.0-only", + "GPL-3+": "GPL-3.0-or-later", + "GPL-3.0": "GPL-3.0-only", + "GPL-3.0+": "GPL-3.0-or-later", + "GPL-3.0-only": "GPL-3.0-only", + "GPL-3.0-or-later": "GPL-3.0-or-later", + "GPL": "GPL-2.0-or-later", + + "LGPL-2": "LGPL-2.0-only", + "LGPL-2+": "LGPL-2.0-or-later", + "LGPL-2.0": "LGPL-2.0-only", + "LGPL-2.0+": "LGPL-2.0-or-later", + "LGPL-2.1": "LGPL-2.1-only", + "LGPL-2.1+": "LGPL-2.1-or-later", + "LGPL-2.1-only": "LGPL-2.1-only", + "LGPL-2.1-or-later": "LGPL-2.1-or-later", + "LGPL-3": "LGPL-3.0-only", + "LGPL-3+": "LGPL-3.0-or-later", + "LGPL-3.0": "LGPL-3.0-only", + "LGPL-3.0+": "LGPL-3.0-or-later", + "LGPL": "LGPL-2.1-or-later", + + "AGPL-3": "AGPL-3.0-only", + "AGPL-3+": "AGPL-3.0-or-later", + "AGPL-3.0": "AGPL-3.0-only", + "AGPL-3.0+": "AGPL-3.0-or-later", + + "ISC": "ISC", + "MPL-1.0": "MPL-1.0", + "MPL-1.1": "MPL-1.1", + "MPL-2.0": "MPL-2.0", + "Mozilla Public License": "MPL-2.0", + "PSF": "PSF-2.0", + "PSF-2": "PSF-2.0", + "Python": "Python-2.0", + "Python-2.0": "Python-2.0", + + "Zlib": "Zlib", + "zlib/libpng": "Zlib", + "BZIP2": "bzip2-1.0.6", + "OpenSSL": "OpenSSL", + "openssl": "OpenSSL", + "Boost-1.0": "BSL-1.0", + "BSL-1.0": "BSL-1.0", + "WTFPL": "WTFPL", + "X11": "X11", + "ZPL-2.1": "ZPL-2.1", + "Unlicense": "Unlicense", + "Public Domain": "LicenseRef-PublicDomain", + "public-domain": "LicenseRef-PublicDomain", + "public domain": "LicenseRef-PublicDomain", + + "GFDL-1.1": "GFDL-1.1-only", + "GFDL-1.1+": "GFDL-1.1-or-later", + "GFDL-1.2": "GFDL-1.2-only", + "GFDL-1.2+": "GFDL-1.2-or-later", + "GFDL-1.3": "GFDL-1.3-only", + "GFDL-1.3+": "GFDL-1.3-or-later", + "GFDL-NIV": "GFDL-1.3-no-invariants-only", + + "FSFAP": "FSFAP", + "FSFUL": "FSFUL", + "FSFULLR": "FSFULLR", + "Autoconf": "Autoconf-exception-2.0", + + "perl": "Artistic-1.0-Perl OR GPL-1.0-or-later", + "Perl": "Artistic-1.0-Perl OR GPL-1.0-or-later", + + "TCL": "TCL", + "Vim": "Vim", + "Sleepycat": "Sleepycat", + "Ruby": "Ruby" +} diff --git a/scripts/sbom_parse_lockfiles.py b/scripts/sbom_parse_lockfiles.py new file mode 100755 index 00000000000..0423b61ab82 --- /dev/null +++ b/scripts/sbom_parse_lockfiles.py @@ -0,0 +1,478 @@ +#!/usr/bin/env python3 +""" +sbom_parse_lockfiles.py — extract transitive package inventories from +language-ecosystem lockfiles harvested by the build hooks. + +Inputs: + --lockfiles TARBALL A lockfiles.tar.gz emitted by per-container + collect_version_files. Repeatable. + --output FILE Write CycloneDX components[] (JSON array). + +The aggregator (scripts/build_sbom.py) consumes the JSON array and +merges the components into the final SBOM with recipe-emit-wins dedupe. + +Supported formats: + + Cargo.lock (Rust) TOML, [[package]] blocks with name/version/source/checksum + go.sum (Go) ' ' per line + package-lock.json (npm) + pnpm-lock.yaml (pnpm) + yarn.lock (yarn) + +Notes on accuracy: + + - Cargo.lock contains the resolved-set (every crate that could satisfy + the dep graph under any feature combination), which is a superset of + the crates actually compiled into the binary. SBOM/SCA convention is + to treat Cargo.lock as the authoritative inventory; precise per-binary + coverage requires `cargo-auditable build`. See README.sbom.md "Known + limitations". + - go.sum is also a superset (it includes modules considered during + resolution, including dropped versions). When syft can read a Go + binary's embedded BuildInfo, that's more precise — but parsing go.sum + ensures we have crate-level hashes that BuildInfo lacks. +""" + +import argparse +import base64 +import binascii +import json +import os +import re +import sys +import tarfile +from typing import Optional + + +def warn(msg: str) -> None: + sys.stderr.write(f"[sbom_parse_lockfiles.py] WARNING: {msg}\n") + + +# ---------------------------------------------------------------------------- +# Cargo.lock parser +# ---------------------------------------------------------------------------- + + +def parse_cargo_lock(text: str, scope: str) -> list: + """Returns CycloneDX component dicts for every [[package]] entry.""" + components = [] + # Split on '[[package]]' boundaries. Skip the leading non-package preamble. + blocks = re.split(r"^\[\[package\]\]\s*$", text, flags=re.M)[1:] + for block in blocks: + # Stop at the next top-level [...] section header. + block = re.split(r"^\[[^[]", block, flags=re.M)[0] + fields = {} + for line in block.splitlines(): + m = re.match(r'^\s*(\w+)\s*=\s*"?([^"]*?)"?\s*$', line) + if m: + fields[m.group(1)] = m.group(2) + name = fields.get("name") + version = fields.get("version") + if not name or not version: + continue + comp = { + "bom-ref": f"pkg:cargo/{name}@{version}", + "type": "library", + "name": name, + "version": version, + "purl": f"pkg:cargo/{name}@{version}", + "properties": [ + {"name": "sonic:fragment_kind", "value": "lockfile"}, + {"name": "sonic:lockfile_format", "value": "Cargo.lock"}, + {"name": "sonic:scope", "value": scope}, + ], + } + checksum = fields.get("checksum") + if checksum and re.fullmatch(r"[0-9a-f]{64}", checksum): + comp["hashes"] = [{"alg": "SHA-256", "content": checksum}] + source = fields.get("source") or "" + if source.startswith("registry+"): + comp["externalReferences"] = [{ + "type": "distribution", + "url": source[len("registry+"):], + }] + elif source.startswith("git+"): + comp["externalReferences"] = [{ + "type": "vcs", + "url": source[len("git+"):], + }] + components.append(comp) + return components + + +# ---------------------------------------------------------------------------- +# go.sum parser +# ---------------------------------------------------------------------------- + + +_GOSUM_LINE_RE = re.compile( + r"^(?P\S+)\s+(?P\S+?)(?P/go\.mod)?\s+(?Ph1:\S+)$" +) + + +def _h1_to_sha256_hex(h1: str) -> Optional[str]: + """Convert 'h1:base64(sha256)=' to lowercase-hex SHA-256.""" + if not h1.startswith("h1:"): + return None + try: + raw = base64.standard_b64decode(h1[3:]) + if len(raw) != 32: + return None + return binascii.hexlify(raw).decode("ascii") + except Exception: + return None + + +def parse_go_sum(text: str, scope: str) -> list: + """Returns CycloneDX components for each Go module in go.sum. + + go.sum has two lines per module: + h1: + /go.mod h1: + We use only the first kind (the module-content hash) for the SBOM, + since that's the closest analog to a 'distribution hash'. + """ + seen = set() + components = [] + for line in text.splitlines(): + line = line.strip() + if not line or line.startswith("#"): + continue + m = _GOSUM_LINE_RE.match(line) + if not m or m.group("gomod"): + continue + mod, ver = m.group("mod"), m.group("ver") + key = (mod, ver) + if key in seen: + continue + seen.add(key) + purl = f"pkg:golang/{mod}@{ver}" + comp = { + "bom-ref": purl, + "type": "library", + "name": mod, + "version": ver, + "purl": purl, + "properties": [ + {"name": "sonic:fragment_kind", "value": "lockfile"}, + {"name": "sonic:lockfile_format", "value": "go.sum"}, + {"name": "sonic:scope", "value": scope}, + ], + } + sha = _h1_to_sha256_hex(m.group("hash")) + if sha: + comp["hashes"] = [{"alg": "SHA-256", "content": sha}] + components.append(comp) + return components + + +# ---------------------------------------------------------------------------- +# package-lock.json (npm v2/v3 format) parser +# ---------------------------------------------------------------------------- + + +def parse_package_lock_json(text: str, scope: str) -> list: + """Parses npm v2/v3 package-lock.json. Older v1 format also supported.""" + components = [] + try: + doc = json.loads(text) + except Exception as e: + warn(f"could not parse package-lock.json: {e}") + return components + seen = set() + # v2/v3: 'packages' dict, keyed by relative path; root is "". + for path, info in (doc.get("packages") or {}).items(): + if not path or info.get("link"): + continue + name = info.get("name") or path.split("node_modules/")[-1] + version = info.get("version") + if not name or not version: + continue + key = (name, version) + if key in seen: + continue + seen.add(key) + purl = f"pkg:npm/{name}@{version}" + comp = { + "bom-ref": purl, + "type": "library", + "name": name, + "version": version, + "purl": purl, + "properties": [ + {"name": "sonic:fragment_kind", "value": "lockfile"}, + {"name": "sonic:lockfile_format", "value": "package-lock.json"}, + {"name": "sonic:scope", "value": scope}, + ], + } + integrity = info.get("integrity") or "" + # integrity is e.g. "sha512-...base64..." + if integrity.startswith(("sha256-", "sha384-", "sha512-")): + alg, _, b64 = integrity.partition("-") + try: + raw = base64.standard_b64decode(b64) + comp["hashes"] = [{ + "alg": alg.upper().replace("SHA", "SHA-"), + "content": binascii.hexlify(raw).decode("ascii"), + }] + except Exception: + pass + resolved = info.get("resolved") + if resolved: + comp["externalReferences"] = [{ + "type": "distribution", "url": resolved, + }] + components.append(comp) + # v1: top-level 'dependencies' map (recursive). + if not components and "dependencies" in doc: + def walk(deps, prefix=""): + for name, info in deps.items(): + ver = info.get("version") or "" + if (name, ver) in seen: + continue + seen.add((name, ver)) + purl = f"pkg:npm/{name}@{ver}" + components.append({ + "bom-ref": purl, + "type": "library", + "name": name, + "version": ver, + "purl": purl, + "properties": [ + {"name": "sonic:fragment_kind", "value": "lockfile"}, + {"name": "sonic:lockfile_format", + "value": "package-lock.json"}, + {"name": "sonic:scope", "value": scope}, + ], + }) + if "dependencies" in info: + walk(info["dependencies"], prefix + name + "/") + walk(doc.get("dependencies", {})) + return components + + +# ---------------------------------------------------------------------------- +# pnpm-lock.yaml (rudimentary parser — extracts /pkg@version keys) +# ---------------------------------------------------------------------------- + + +_PNPM_PKG_RE = re.compile(r"^\s+/([^@:\s]+(?:/[^@:\s]+)*)@([^:\s]+):\s*$") + + +def parse_pnpm_lock_yaml(text: str, scope: str) -> list: + """Best-effort pnpm-lock.yaml parser without yaml dependency. pnpm + lockfiles encode package identity as a key like '/foo@1.2.3:' under + the 'packages:' map. Hash data is omitted in this minimal parser — + if you need it, swap in a real YAML parser.""" + components = [] + seen = set() + in_packages = False + for line in text.splitlines(): + if not in_packages: + if line.startswith("packages:"): + in_packages = True + continue + if line and not line.startswith(" "): + break + m = _PNPM_PKG_RE.match(line) + if not m: + continue + name = m.group(1) + version = m.group(2) + if (name, version) in seen: + continue + seen.add((name, version)) + purl = f"pkg:npm/{name}@{version}" + components.append({ + "bom-ref": purl, + "type": "library", + "name": name, + "version": version, + "purl": purl, + "properties": [ + {"name": "sonic:fragment_kind", "value": "lockfile"}, + {"name": "sonic:lockfile_format", "value": "pnpm-lock.yaml"}, + {"name": "sonic:scope", "value": scope}, + ], + }) + return components + + +# ---------------------------------------------------------------------------- +# yarn.lock parser (classic v1 format) +# ---------------------------------------------------------------------------- + + +def parse_yarn_lock(text: str, scope: str) -> list: + """Parses yarn.lock v1 classic format. v2+ (berry) uses YAML which + we skip here — most projects still use v1.""" + components = [] + seen = set() + cur_name = None + cur_version = None + cur_integrity = None + cur_resolved = None + + def flush(): + nonlocal cur_name, cur_version, cur_integrity, cur_resolved + if cur_name and cur_version and (cur_name, cur_version) not in seen: + seen.add((cur_name, cur_version)) + purl = f"pkg:npm/{cur_name}@{cur_version}" + comp = { + "bom-ref": purl, + "type": "library", + "name": cur_name, + "version": cur_version, + "purl": purl, + "properties": [ + {"name": "sonic:fragment_kind", "value": "lockfile"}, + {"name": "sonic:lockfile_format", "value": "yarn.lock"}, + {"name": "sonic:scope", "value": scope}, + ], + } + if cur_integrity and cur_integrity.startswith( + ("sha256-", "sha384-", "sha512-")): + alg, _, b64 = cur_integrity.partition("-") + try: + raw = base64.standard_b64decode(b64) + comp["hashes"] = [{ + "alg": alg.upper().replace("SHA", "SHA-"), + "content": binascii.hexlify(raw).decode("ascii"), + }] + except Exception: + pass + if cur_resolved: + comp["externalReferences"] = [{ + "type": "distribution", "url": cur_resolved, + }] + components.append(comp) + cur_name = cur_version = cur_integrity = cur_resolved = None + + for raw in text.splitlines(): + line = raw.rstrip() + if not line or line.startswith("#"): + flush() + continue + if not line.startswith(" "): + # entry-header line, e.g. '"foo@^1.0", "foo@~1.0.1":' + flush() + m = re.search(r'^"?([^@\s"]+(?:/[^@\s"]+)?)@', line) + if m: + cur_name = m.group(1) + else: + s = line.strip() + m = re.match(r'version\s+"([^"]+)"', s) + if m: + cur_version = m.group(1) + m = re.match(r'integrity\s+([^\s]+)', s) + if m: + cur_integrity = m.group(1) + m = re.match(r'resolved\s+"([^"]+)"', s) + if m: + cur_resolved = m.group(1) + flush() + return components + + +# ---------------------------------------------------------------------------- +# Tarball walker +# ---------------------------------------------------------------------------- + + +_LOCKFILE_HANDLERS = { + "Cargo.lock": parse_cargo_lock, + "go.sum": parse_go_sum, + "package-lock.json": parse_package_lock_json, + "pnpm-lock.yaml": parse_pnpm_lock_yaml, + "yarn.lock": parse_yarn_lock, +} + + +def scope_from_tarball_path(path: str) -> str: + """Derive a human-readable scope label from the tarball path. + target/versions/dockers/docker-fpm-frr/post-versions/lockfiles.tar.gz + -> 'dockers/docker-fpm-frr' + target/versions/host-image/post-versions/lockfiles.tar.gz + -> 'host-image' + """ + m = re.search(r"versions/(.+?)/post-versions/", path) + return m.group(1) if m else path + + +def parse_tarball(tarball: str, components_out: list, stats: dict) -> None: + if not os.path.isfile(tarball): + return + scope = scope_from_tarball_path(tarball) + try: + tf = tarfile.open(tarball, "r:*") + except Exception as e: + warn(f"could not open {tarball}: {e}") + return + with tf: + for member in tf: + if not member.isfile(): + continue + basename = os.path.basename(member.name) + handler = _LOCKFILE_HANDLERS.get(basename) + if not handler: + continue + try: + f = tf.extractfile(member) + if f is None: + continue + text = f.read().decode("utf-8", errors="replace") + except Exception: + continue + try: + comps = handler(text, scope) + except Exception as e: + warn(f"parser {handler.__name__} failed on " + f"{member.name} in {tarball}: {e}") + continue + if comps: + components_out.extend(comps) + stats.setdefault(basename, 0) + stats[basename] += len(comps) + + +# ---------------------------------------------------------------------------- +# Entry point +# ---------------------------------------------------------------------------- + + +def main() -> int: + ap = argparse.ArgumentParser(description=__doc__) + ap.add_argument("--lockfiles", action="append", default=[], + help="Path to a lockfiles.tar.gz; repeatable.") + ap.add_argument("--output", required=True, + help="Where to write the components[] JSON array.") + args = ap.parse_args() + + all_components: list = [] + stats: dict = {} + for tarball in args.lockfiles: + parse_tarball(tarball, all_components, stats) + + try: + with open(args.output, "w") as f: + json.dump({ + "components": all_components, + "stats": stats, + }, f, indent=2) + except Exception as e: + sys.stderr.write( + f"[sbom_parse_lockfiles.py] could not write {args.output}: {e}\n" + ) + return 1 + + total = len(all_components) + bits = " ".join(f"{k}={v}" for k, v in sorted(stats.items())) + sys.stderr.write( + f"[sbom_parse_lockfiles.py] parsed {total} components " + f"({bits or 'no lockfiles found'})\n" + ) + return 0 + + +if __name__ == "__main__": + sys.exit(main()) diff --git a/scripts/sbom_resolve_licenses.py b/scripts/sbom_resolve_licenses.py new file mode 100755 index 00000000000..6f7aebdca98 --- /dev/null +++ b/scripts/sbom_resolve_licenses.py @@ -0,0 +1,316 @@ +#!/usr/bin/env python3 +""" +sbom_resolve_licenses.py — extract SPDX license expressions from +/usr/share/doc//copyright files captured during the build. + +Inputs: + --copyrights TARBALL A copyrights.tar.gz produced by either + build_debian.sh (host rootfs) or by the + per-container collect_version_files hook. + May be passed multiple times. + --output FILE Write a JSON map { pkg: spdx_expr } here. + --license-map FILE Override default scripts/sbom_license_map.json + --quiet Suppress per-package warnings. + +The tarball entries are expected to look like + usr/share/doc//copyright +We extract the package name from the directory and parse the file: + + 1. If it has 'Format: https://www.debian.org/doc/packaging-manuals/copyright-format/1.0/' + header, it is DEP-5. Parse the Files: stanzas, take the union of + License: identifiers, translate to SPDX via the license map. + + 2. Otherwise, attempt a heuristic pass via `licensecheck` (from the + devscripts Debian package) if available. licensecheck output is + name-or-NONE per file; we map names through the same table. + + 3. Otherwise emit 'NOASSERTION' and surface a warning so the operator + can decide whether to add a per-recipe LICENSE override. + +The resolver is read-only and stateless — runs once per build inside +the aggregator (scripts/build_sbom.py). +""" + +import argparse +import json +import os +import re +import shutil +import subprocess +import sys +import tarfile +from collections import OrderedDict +from typing import Optional + + +# --------------------------------------------------------------------------- +# License-map loading + lookup +# --------------------------------------------------------------------------- + +_SCRIPT_DIR = os.path.dirname(os.path.abspath(__file__)) +DEFAULT_LICENSE_MAP = os.path.join(_SCRIPT_DIR, "sbom_license_map.json") + + +def normalize_license_key(s: str) -> str: + """Collapse whitespace and trim. Case-sensitive lookup first, then + case-insensitive fallback is done by the caller via two map copies.""" + return re.sub(r"\s+", " ", s.strip()) + + +class LicenseMap: + def __init__(self, path: str): + with open(path) as f: + raw = json.load(f) + # Skip the _comment key. + self._exact = { + normalize_license_key(k): v + for k, v in raw.items() if not k.startswith("_") + } + self._lower = {k.lower(): v for k, v in self._exact.items()} + + def lookup(self, raw_id: str) -> Optional[str]: + k = normalize_license_key(raw_id) + if k in self._exact: + return self._exact[k] + kl = k.lower() + if kl in self._lower: + return self._lower[kl] + return None + + +# --------------------------------------------------------------------------- +# DEP-5 parser (machine-readable copyright format 1.0) +# --------------------------------------------------------------------------- + +_DEP5_HEADER_RE = re.compile( + r"^Format:\s*https?://(?:www\.)?debian\.org/doc/" + r"packaging-manuals/copyright-format/1\.0/?", + re.IGNORECASE | re.MULTILINE, +) + + +def _split_paragraphs(text: str) -> list: + """Split RFC822-ish copyright file into paragraphs.""" + paragraphs = [] + current: list = [] + for line in text.splitlines(): + if not line.strip(): + if current: + paragraphs.append("\n".join(current)) + current = [] + else: + current.append(line) + if current: + paragraphs.append("\n".join(current)) + return paragraphs + + +def _paragraph_fields(paragraph: str) -> dict: + """Parse a DEP-5 paragraph into a {field: value} dict (multi-line + values joined; leading-space continuations are folded).""" + fields: dict = {} + current_key: Optional[str] = None + current_val: list = [] + for line in paragraph.splitlines(): + if line.startswith((" ", "\t")): + if current_key is not None: + current_val.append(line.strip()) + else: + if current_key is not None: + fields[current_key] = "\n".join(current_val).strip() + if ":" in line: + k, _, v = line.partition(":") + current_key = k.strip() + current_val = [v.strip()] + if current_key is not None: + fields[current_key] = "\n".join(current_val).strip() + return fields + + +def parse_dep5(text: str, lmap: LicenseMap) -> Optional[str]: + """Returns an SPDX expression, or None if DEP-5 parse failed.""" + if not _DEP5_HEADER_RE.search(text[:500]): + return None + paragraphs = _split_paragraphs(text) + seen_licenses: "OrderedDict[str, None]" = OrderedDict() + for p in paragraphs: + fields = _paragraph_fields(p) + if "License" not in fields or "Files" not in fields: + continue + # Take just the first line of the License: field — it's the + # short identifier. The rest is the license text body. + first_line = fields["License"].splitlines()[0].strip() + for tok in re.split(r"\s+(?:or|and|OR|AND)\s+", first_line): + tok = tok.strip() + if not tok: + continue + mapped = lmap.lookup(tok) + seen_licenses[mapped or f"LicenseRef-{tok}"] = None + if not seen_licenses: + return None + if len(seen_licenses) == 1: + return next(iter(seen_licenses)) + return " AND ".join(seen_licenses.keys()) + + +# --------------------------------------------------------------------------- +# licensecheck fallback +# --------------------------------------------------------------------------- + + +def _have_licensecheck() -> bool: + return shutil.which("licensecheck") is not None + + +def _run_licensecheck(path: str) -> Optional[str]: + """Returns the licensecheck verdict (raw string, like 'GPL-2+') or None.""" + try: + r = subprocess.run( + ["licensecheck", "--copyright", "--no-conf", path], + capture_output=True, text=True, timeout=15, check=False, + ) + except Exception: + return None + if r.returncode != 0: + return None + for line in r.stdout.splitlines(): + # Format: ": " + if ":" in line: + _, _, lic = line.partition(":") + lic = lic.strip() + if lic and lic.upper() != "UNKNOWN": + return lic + return None + + +def parse_licensecheck(path: str, lmap: LicenseMap) -> Optional[str]: + raw = _run_licensecheck(path) + if not raw: + return None + mapped = lmap.lookup(raw) + return mapped or f"LicenseRef-{raw}" + + +# --------------------------------------------------------------------------- +# Tarball iteration +# --------------------------------------------------------------------------- + + +_PKG_PATH_RE = re.compile(r"(?:^|/)usr/share/doc/([^/]+)/copyright$") + + +def resolve_from_tarball( + tarball: str, lmap: LicenseMap, results: dict, + noassertions: list, quiet: bool = False, +) -> None: + """Walk a copyrights.tar.gz and populate results[pkg] = spdx_expr.""" + if not os.path.isfile(tarball): + if not quiet: + sys.stderr.write( + f"[sbom_resolve_licenses.py] tarball not found: {tarball}\n" + ) + return + try: + tf = tarfile.open(tarball, "r:*") + except Exception as e: + sys.stderr.write( + f"[sbom_resolve_licenses.py] could not open {tarball}: {e}\n" + ) + return + + have_lc = _have_licensecheck() + + with tf: + for member in tf: + if not member.isfile(): + continue + m = _PKG_PATH_RE.search(member.name) + if not m: + continue + pkg = m.group(1) + if pkg in results: + # Already resolved from an earlier tarball; keep the first. + continue + try: + f = tf.extractfile(member) + if f is None: + continue + text = f.read().decode("utf-8", errors="replace") + except Exception: + continue + + spdx = parse_dep5(text, lmap) + if not spdx and have_lc: + # Stage to disk and let licensecheck have a go. + tmp = f"/tmp/sbom-cp-{pkg}.txt" + try: + with open(tmp, "w") as fw: + fw.write(text) + spdx = parse_licensecheck(tmp, lmap) + finally: + try: + os.unlink(tmp) + except Exception: + pass + if spdx: + results[pkg] = spdx + else: + results[pkg] = "NOASSERTION" + noassertions.append(pkg) + + +# --------------------------------------------------------------------------- +# Entry point +# --------------------------------------------------------------------------- + + +def main() -> int: + ap = argparse.ArgumentParser(description=__doc__) + ap.add_argument("--copyrights", action="append", default=[], + help="Path to a copyrights.tar.gz; repeatable.") + ap.add_argument("--output", required=True, + help="Where to write the resolved map (JSON).") + ap.add_argument("--license-map", default=DEFAULT_LICENSE_MAP, + help="Path to the SPDX translation table.") + ap.add_argument("--quiet", action="store_true") + args = ap.parse_args() + + try: + lmap = LicenseMap(args.license_map) + except Exception as e: + sys.stderr.write( + f"[sbom_resolve_licenses.py] could not load license map: {e}\n" + ) + return 1 + + results: dict = {} + noassertions: list = [] + for tarball in args.copyrights: + resolve_from_tarball(tarball, lmap, results, noassertions, + quiet=args.quiet) + + try: + with open(args.output, "w") as f: + json.dump({ + "license_map_version": "1", + "resolved": dict(sorted(results.items())), + "noassertion_packages": sorted(noassertions), + }, f, indent=2) + except Exception as e: + sys.stderr.write( + f"[sbom_resolve_licenses.py] could not write {args.output}: {e}\n" + ) + return 1 + + resolved_count = len(results) - len(noassertions) + total = len(results) + pct = (100.0 * resolved_count / total) if total else 0.0 + sys.stderr.write( + f"[sbom_resolve_licenses.py] resolved {resolved_count}/{total} " + f"packages ({pct:.1f}%); {len(noassertions)} NOASSERTION\n" + ) + return 0 + + +if __name__ == "__main__": + sys.exit(main()) diff --git a/scripts/sbom_vuln_diff.py b/scripts/sbom_vuln_diff.py new file mode 100755 index 00000000000..c0c471b12cf --- /dev/null +++ b/scripts/sbom_vuln_diff.py @@ -0,0 +1,165 @@ +#!/usr/bin/env python3 +""" +sbom_vuln_diff.py — compare two vulnerability reports (produced by +sbom_vuln_scan.py) and report which CVEs were added, removed, or +changed status. + +Usage: + sbom_vuln_diff.py old.vuln.json new.vuln.json + sbom_vuln_diff.py --json out.json --quiet old.vuln.json new.vuln.json + +Intended for release-cycle drift analysis: "what new CVEs apply to my +SBOM since the last release?" without rebuilding the image. Also used +to verify VEX suppressions: same SBOM, before vs after adding new VEX +documents. +""" + +import argparse +import json +import sys + + +_SEVERITY_RANK = { + "negligible": 0, "low": 1, "medium": 2, "high": 3, "critical": 4, + "unknown": -1, +} + + +def load_vulns(path: str) -> dict: + """Return { (cve_id, affected_ref): vuln-dict } for one report.""" + with open(path) as f: + doc = json.load(f) + out = {} + for v in doc.get("vulnerabilities", []) or []: + cve = v.get("id", "?") + for affects in v.get("affects", []) or [{}]: + ref = affects.get("ref", "?") + out[(cve, ref)] = v + return out + + +def severity(v: dict) -> str: + ratings = v.get("ratings") or [] + if not ratings: + return "unknown" + return (ratings[0].get("severity") or "unknown").lower() + + +def rank(s: str) -> int: + return _SEVERITY_RANK.get(s, -1) + + +def vuln_status(v: dict) -> str: + """Detect VEX-applied status (CycloneDX 1.6 analysis.state).""" + a = v.get("analysis") or {} + return a.get("state", "") + + +def diff(old: dict, new: dict) -> dict: + added = [] + removed = [] + status_changed = [] + severity_changed = [] + for key in sorted(new.keys() - old.keys()): + added.append({"key": list(key), "vuln": new[key]}) + for key in sorted(old.keys() - new.keys()): + removed.append({"key": list(key), "vuln": old[key]}) + for key in sorted(new.keys() & old.keys()): + o, n = old[key], new[key] + if severity(o) != severity(n): + severity_changed.append({ + "key": list(key), + "old": severity(o), + "new": severity(n), + }) + if vuln_status(o) != vuln_status(n): + status_changed.append({ + "key": list(key), + "old": vuln_status(o) or "(unsuppressed)", + "new": vuln_status(n) or "(unsuppressed)", + }) + return { + "added": added, + "removed": removed, + "severity_changed": severity_changed, + "status_changed": status_changed, + } + + +def print_report(d: dict, old_path: str, new_path: str) -> None: + print(f"Comparing vuln reports:") + print(f" old: {old_path}") + print(f" new: {new_path}") + print() + print(f"Added: {len(d['added'])}") + print(f"Removed: {len(d['removed'])}") + print(f"Severity changed: {len(d['severity_changed'])}") + print(f"Status changed: {len(d['status_changed'])}") + if d["added"]: + print() + print("--- Newly present in NEW (regressions or newly disclosed) ---") + # Sort by severity desc. + items = sorted( + d["added"], + key=lambda x: -rank(severity(x["vuln"])), + ) + for x in items[:50]: + sev = severity(x["vuln"]) + cve, ref = x["key"] + print(f" + [{sev:8}] {cve:22} {ref}") + if len(d["added"]) > 50: + print(f" ... and {len(d['added']) - 50} more") + if d["removed"]: + print() + print("--- No longer present in NEW (fixed, removed, or VEX'd) ---") + for x in d["removed"][:30]: + cve, ref = x["key"] + print(f" - {cve:22} {ref}") + if len(d["removed"]) > 30: + print(f" ... and {len(d['removed']) - 30} more") + if d["status_changed"]: + print() + print("--- VEX status flips ---") + for x in d["status_changed"][:30]: + cve, ref = x["key"] + print(f" ~ {cve} ({x['old']} -> {x['new']}) {ref}") + if d["severity_changed"]: + print() + print("--- Severity reclassified ---") + for x in d["severity_changed"][:30]: + cve, ref = x["key"] + print(f" ~ {cve} ({x['old']} -> {x['new']}) {ref}") + + +def main() -> int: + ap = argparse.ArgumentParser(description=__doc__) + ap.add_argument("old", help="Older / baseline .vuln.json") + ap.add_argument("new", help="Newer / candidate .vuln.json") + ap.add_argument("--quiet", action="store_true") + ap.add_argument("--json", + help="Write the diff as JSON to this file") + args = ap.parse_args() + + old = load_vulns(args.old) + new = load_vulns(args.new) + d = diff(old, new) + + if args.json: + with open(args.json, "w") as f: + json.dump(d, f, indent=2, sort_keys=True) + + if args.quiet: + print(f"+{len(d['added'])} " + f"-{len(d['removed'])} " + f"~sev:{len(d['severity_changed'])} " + f"~status:{len(d['status_changed'])}") + else: + print_report(d, args.old, args.new) + + if d["added"] or d["removed"] or d["severity_changed"] or d["status_changed"]: + return 1 + return 0 + + +if __name__ == "__main__": + sys.exit(main()) diff --git a/scripts/sbom_vuln_scan.py b/scripts/sbom_vuln_scan.py new file mode 100755 index 00000000000..acf86c19d64 --- /dev/null +++ b/scripts/sbom_vuln_scan.py @@ -0,0 +1,491 @@ +#!/usr/bin/env python3 +""" +sbom_vuln_scan.py — generate a vulnerability report from a SONiC SBOM. + +This is a **standalone post-build tool**, intentionally not part of the +build. It runs anywhere a CycloneDX SBOM and Python 3 are available and +produces a CycloneDX VEX-annotated vulnerability report. + +Why standalone: +- The SBOM is reproducible; a vulnerability report cannot be (new CVEs + are disclosed daily). Coupling them would break SBOM reproducibility. +- A six-month-old SBOM can be re-scanned against today's CVE data + without rebuilding the .bin. +- Release engineering picks its own cadence for CVE scans separate from + build cadence. + +Usage: + sbom_vuln_scan.py SBOM.cdx.json + sbom_vuln_scan.py --vex vex/ --output target/sonic-broadcom.bin.vuln.json SBOM.cdx.json + sbom_vuln_scan.py --min-severity high --format table SBOM.cdx.json +""" + +import argparse +import json +import os +import shutil +import subprocess +import sys +from typing import Any, Optional + + +_SEVERITY_RANK = { + "negligible": 0, "low": 1, "medium": 2, "high": 3, "critical": 4, + "unknown": -1, +} + + +def warn(msg: str) -> None: + sys.stderr.write(f"[sbom_vuln_scan.py] WARNING: {msg}\n") + + +def info(msg: str) -> None: + sys.stderr.write(f"[sbom_vuln_scan.py] {msg}\n") + + +# --------------------------------------------------------------------------- +# Grype install / invocation +# --------------------------------------------------------------------------- + + +def resolve_grype() -> Optional[str]: + """Find grype on PATH, then in the build cache, then auto-install via + scripts/install_sbom_tool.sh.""" + p = shutil.which("grype") + if p: + return p + # Build-tree cache. + for d in ("target/sbom-tools", os.path.expanduser("~/.cache/sonic-sbom")): + if not os.path.isdir(d): + continue + for sub in os.listdir(d): + cand = os.path.join(d, sub, "grype") + if os.path.isfile(cand) and os.access(cand, os.X_OK): + return cand + # Auto-fetch via the install helper. + install_script = os.path.join( + os.path.dirname(__file__), "install_sbom_tool.sh" + ) + if not os.path.isfile(install_script): + return None + try: + r = subprocess.run( + [install_script, "grype"], + capture_output=True, text=True, timeout=300, + ) + out = r.stdout.strip() + if r.returncode == 0 and out: + return out + except Exception as e: + warn(f"install_sbom_tool.sh grype failed: {e}") + return None + + +def run_grype(grype: str, sbom_path: str, vex_files: list) -> Optional[dict]: + """Run grype against an SBOM and return the parsed JSON output.""" + cmd = [grype, f"sbom:{sbom_path}", "-o", "json", "-q"] + for v in vex_files: + cmd.extend(["--vex", v]) + info(f"running: {' '.join(cmd)}") + try: + r = subprocess.run(cmd, capture_output=True, text=True, timeout=900) + except subprocess.TimeoutExpired: + warn("grype timed out") + return None + except Exception as e: + warn(f"grype failed to start: {e}") + return None + if r.returncode != 0: + warn(f"grype exited {r.returncode}: {r.stderr.strip()[:400]}") + return None + try: + return json.loads(r.stdout) + except Exception as e: + warn(f"could not parse grype JSON: {e}") + return None + + +# --------------------------------------------------------------------------- +# VEX loading (project-local YAML files) +# --------------------------------------------------------------------------- + + +def collect_vex_documents(vex_dirs: list) -> list: + """Return absolute paths to every .yaml/.yml/.json file under the + given VEX directories. Files are passed directly to grype which + handles OpenVEX, CycloneDX-VEX, and CSAF formats.""" + out = [] + for d in vex_dirs: + if not os.path.isdir(d): + warn(f"vex dir not found: {d}") + continue + for root, _, files in os.walk(d): + for fn in files: + if fn.startswith(".") or fn.endswith(".md"): + continue + if fn.endswith((".yaml", ".yml", ".json")): + out.append(os.path.abspath(os.path.join(root, fn))) + return sorted(out) + + +# --------------------------------------------------------------------------- +# Report shaping +# --------------------------------------------------------------------------- + + +def severity_rank(s: str) -> int: + return _SEVERITY_RANK.get((s or "").lower(), -1) + + +def filter_by_severity(matches: list, min_sev: Optional[str]) -> list: + if not min_sev: + return matches + threshold = severity_rank(min_sev) + if threshold < 0: + warn(f"unknown severity: {min_sev}; not filtering") + return matches + return [ + m for m in matches + if severity_rank(m.get("vulnerability", {}).get("severity", "")) + >= threshold + ] + + +def summarize(matches: list) -> dict: + by_sev: dict = {} + suppressed = 0 + for m in matches: + sev = (m.get("vulnerability") or {}).get("severity") or "Unknown" + by_sev[sev] = by_sev.get(sev, 0) + 1 + return {"total": len(matches), "by_severity": by_sev, + "suppressed_via_vex": suppressed} + + +def to_cyclonedx_vex(grype_doc: dict, source_sbom_path: str) -> dict: + """Wrap grype's matches into a CycloneDX 1.6 VEX document.""" + sbom_meta = {} + try: + with open(source_sbom_path) as f: + src = json.load(f) + sbom_meta = src.get("metadata", {}) + except Exception: + pass + + vulns = [] + for m in grype_doc.get("matches", []): + v = m.get("vulnerability", {}) + art = m.get("artifact", {}) + purl = art.get("purl") or f"{art.get('name','?')}@{art.get('version','?')}" + primary, _ = vuln_id_pair(m) + entry: dict[str, Any] = { + "id": primary, + "source": {"name": v.get("dataSource", "").split("/")[2] + if v.get("dataSource", "").startswith(("http://", "https://")) + else "unknown", + "url": v.get("dataSource", "")}, + "ratings": [{ + "severity": (v.get("severity") or "unknown").lower(), + "method": "other", + }], + "description": v.get("description") or "", + "affects": [{"ref": purl}], + } + # Surface aliases via references[] (CycloneDX 1.6) so downstream + # consumers can join across CVE / GHSA / vendor-VDB id spaces. + # Add the grype-canonical id when it differs from primary (it + # will when we swapped CVE→primary, GHSA→here), then add every + # CVE alias from relatedVulnerabilities[] that isn't already + # primary. + refs = [] + if v.get("id") and v.get("id") != primary: + refs.append({ + "id": v["id"], + "source": {"name": "GitHub Advisory Database", + "url": v.get("dataSource", "")}, + }) + for rel in m.get("relatedVulnerabilities", []) or []: + rid = rel.get("id", "") + if not rid or rid == primary: + continue + if rid.startswith("CVE-"): + refs.append({ + "id": rid, + "source": { + "name": "NVD", + "url": f"https://nvd.nist.gov/vuln/detail/{rid}", + }, + }) + if refs: + entry["references"] = refs + # Preserve grype's exact fix.state ('fixed', 'not-fixed', + # 'wont-fix', 'unknown') as a CycloneDX property so downstream + # consumers can distinguish "no fix yet" from "upstream + # declined to fix" without having to parse the recommendation + # field. Only 'fixed' findings get a recommendation; the rest + # carry only the state property. + fix = v.get("fix") or {} + state = fix.get("state", "unknown") + entry.setdefault("properties", []).append({ + "name": "grype:fix-state", + "value": state, + }) + if state == "fixed" and fix.get("versions"): + entry["recommendation"] = ( + f"Upgrade to {', '.join(fix['versions'])}" + ) + vulns.append(entry) + + return { + "bomFormat": "CycloneDX", + "specVersion": "1.6", + "version": 1, + "metadata": { + "tools": [{ + "vendor": "Anchore", + "name": "grype", + "version": grype_doc.get("descriptor", {}) + .get("version", "unknown"), + }, { + "vendor": "SONiC", + "name": "sbom_vuln_scan.py", + "version": "1.0", + }], + "properties": [ + {"name": "sonic:source_sbom", "value": source_sbom_path}, + {"name": "sonic:source_sbom_serial", + "value": sbom_meta.get("component", {}) + .get("bom-ref", "") or ""}, + ], + }, + "vulnerabilities": vulns, + } + + +def fix_state_of(match: dict) -> str: + """grype's fix.state for a match — 'fixed', 'not-fixed', 'wont-fix', + 'unknown'.""" + return (match.get("vulnerability", {}).get("fix") or {}).get( + "state", "unknown" + ) + + +def is_actionable(match: dict) -> bool: + """A finding is actionable when an upstream fix is available.""" + return fix_state_of(match) == "fixed" + + +def print_table(matches: list, total_by_sev: dict) -> None: + # Bucket findings by fix state. The human-readable table only + # lists actionable rows (the ones a release manager can do + # something about); not-fixed and wont-fix are summarised in the + # header so the reader knows they exist without being buried in + # un-fixable noise. The CycloneDX JSON sidecar contains the full + # set for machine consumption. + by_fix_state: dict = {"fixed": [], "not-fixed": [], "wont-fix": [], + "unknown": []} + for m in matches: + state = fix_state_of(m) + by_fix_state.setdefault(state, []).append(m) + + fixed = by_fix_state.get("fixed", []) + not_fixed = by_fix_state.get("not-fixed", []) + wont_fix = by_fix_state.get("wont-fix", []) + unknown = by_fix_state.get("unknown", []) + + print(f"Total findings: {sum(total_by_sev.values())}") + print("By fix state:") + print(f" Actionable (upstream fix available): {len(fixed)}") + print(f" Not-fixed (no upstream fix yet): {len(not_fixed)}") + print(f" Won't-fix (upstream declined): {len(wont_fix)}") + if unknown: + print(f" Unknown fix state: {len(unknown)}") + + # Severity breakdown for actionable findings only — that's what + # the row listing below covers and what release planning targets. + actionable_by_sev: dict = {} + for m in fixed: + sev = (m.get("vulnerability", {}).get("severity") or "unknown").title() + actionable_by_sev[sev] = actionable_by_sev.get(sev, 0) + 1 + print("By severity (actionable only):") + for sev in ("Critical", "High", "Medium", "Low", "Negligible", "Unknown"): + n = actionable_by_sev.get(sev, 0) + if n: + print(f" {sev:11} {n}") + + if not fixed: + return + print() + print(f"{'SEVERITY':9} {'ID':18} {'ECOSYS':7} " + f"{'PKG':26} {'VERSION':24} FIX") + print("-" * 110) + # Sort by severity desc, then by preferred display id + matches_sorted = sorted( + fixed, + key=lambda m: (-severity_rank( + m.get("vulnerability", {}).get("severity", "") + ), preferred_vuln_id(m)) + ) + for m in matches_sorted: + v = m.get("vulnerability", {}) + a = m.get("artifact", {}) + sev = (v.get("severity") or "?") + primary, _ = vuln_id_pair(m) + ecosys = ecosystem_from_purl(a.get("purl") or "") or a.get("type", "") + pkg = a.get("name") or "?" + ver = a.get("version") or "?" + fix = v.get("fix") or {} + fix_versions = ", ".join(fix.get("versions") or []) or "-" + print(f"{sev:9} {primary:18} {ecosys:7} " + f"{pkg:26} {ver:24} {fix_versions}") + + +def ecosystem_from_purl(purl: str) -> str: + """Extract the package ecosystem label from a PURL. + + Maps long PURL types to short, fixed-width labels suitable for a + table column. 'pkg:deb/...' → 'deb', 'pkg:golang/...' → 'go', + 'pkg:cargo/...' → 'rust', 'pkg:pypi/...' → 'py', etc. + """ + if not purl.startswith("pkg:"): + return "" + after = purl[4:] + head = after.split("/", 1)[0] + return { + "deb": "deb", + "rpm": "rpm", + "apk": "apk", + "cargo": "rust", + "golang": "go", + "npm": "npm", + "pypi": "py", + "gem": "gem", + "maven": "java", + "nuget": "nuget", + "oci": "oci", + "github": "github", + "generic": "generic", + }.get(head, head[:7]) + + +def vuln_id_pair(m: dict) -> tuple[str, str]: + """Return (primary_id, alias_id) for display. + + Grype puts the canonical advisory id (often GHSA-* for findings + sourced from the GitHub Advisory Database) in `vulnerability.id`, + and any CVE alias in `relatedVulnerabilities[].id`. We display the + CVE as the *primary* id when one exists, since CVE-NNNN-NNNN is the + identifier humans recognize; the GHSA goes in the alias column. + """ + v = m.get("vulnerability", {}) + primary = v.get("id") or "?" + cve = "" + for rel in m.get("relatedVulnerabilities", []) or []: + rid = rel.get("id", "") + if rid.startswith("CVE-"): + cve = rid + break + if cve and not primary.startswith("CVE-"): + return cve, primary + return primary, cve or "" + + +def preferred_vuln_id(m: dict) -> str: + """CVE if present, else the grype-canonical id. Used for sorting.""" + return vuln_id_pair(m)[0] + + +# --------------------------------------------------------------------------- +# Entry point +# --------------------------------------------------------------------------- + + +def main() -> int: + ap = argparse.ArgumentParser(description=__doc__) + ap.add_argument("sbom", + help="Input CycloneDX SBOM (.cdx.json)") + ap.add_argument("--vex", action="append", default=[], + help="Directory containing VEX yaml/json documents. " + "Repeatable.") + ap.add_argument("--output", "-o", + help="Write CycloneDX VEX-annotated report here. " + "Default: .vuln.json") + ap.add_argument("--format", choices=("json", "table", "both"), + default="both", + help="Output style. 'json' writes only the file; " + "'table' writes only stdout; 'both' (default).") + ap.add_argument("--min-severity", + help="Filter findings below this severity in the " + "report. (negligible/low/medium/high/critical)") + ap.add_argument("--fail-on", + help="Exit non-zero if any finding at or above this " + "severity remains after VEX/filter. Useful for " + "CI gating.") + ap.add_argument("--grype", + help="Path to grype binary. Auto-installed if absent.") + args = ap.parse_args() + + if not os.path.isfile(args.sbom): + warn(f"SBOM not found: {args.sbom}") + return 2 + + grype = args.grype or resolve_grype() + if not grype: + warn("grype is not available; install via scripts/install_sbom_tool.sh") + return 2 + info(f"using grype: {grype}") + + vex_files = collect_vex_documents(args.vex) + if vex_files: + info(f"loaded {len(vex_files)} VEX document(s)") + + grype_doc = run_grype(grype, args.sbom, vex_files) + if grype_doc is None: + return 2 + + matches = grype_doc.get("matches", []) or [] + if args.min_severity: + before = len(matches) + matches = filter_by_severity(matches, args.min_severity) + info(f"min-severity filter: {len(matches)}/{before} remain") + + by_sev: dict = {} + for m in matches: + sev = (m.get("vulnerability") or {}).get("severity") or "Unknown" + by_sev[sev] = by_sev.get(sev, 0) + 1 + + out_path = args.output or (args.sbom.removesuffix(".cdx.json") + ".vuln.json") + if args.format in ("json", "both"): + out_doc = to_cyclonedx_vex({**grype_doc, "matches": matches}, + args.sbom) + try: + with open(out_path, "w") as f: + json.dump(out_doc, f, indent=2, sort_keys=True) + info(f"wrote {out_path}") + except Exception as e: + warn(f"could not write {out_path}: {e}") + + if args.format in ("table", "both"): + print_table(matches, by_sev) + + if args.fail_on: + # Restrict the failure gate to *actionable* findings — i.e. those + # with an upstream fix available. Failing on not-fixed / wont-fix + # entries gates the build on things the team can't act on; those + # belong on a separate VEX triage workflow, not CI gating. + threshold = severity_rank(args.fail_on) + high_findings = [ + m for m in matches + if is_actionable(m) + and severity_rank(m.get("vulnerability", {}).get("severity", "")) + >= threshold + ] + if high_findings: + warn(f"{len(high_findings)} actionable finding(s) at or above " + f"'{args.fail_on}' — failing") + return 1 + + return 0 + + +if __name__ == "__main__": + sys.exit(main()) diff --git a/slave.mk b/slave.mk index 0bc7ee30ee9..4e9001ca043 100644 --- a/slave.mk +++ b/slave.mk @@ -82,7 +82,7 @@ ENABLE_PY2_MODULES = y endif # Python version for PTF image -PTF_ENV_PY_VER = $(if $(SONIC_PTF_ENV_PY_VER),$(SONIC_PTF_ENV_PY_VER),mixed) +PTF_ENV_PY_VER = $(if $(SONIC_PTF_ENV_PY_VER),$(SONIC_PTF_ENV_PY_VER),py3) export BUILD_NUMBER export BUILD_TIMESTAMP @@ -99,6 +99,8 @@ export CROSS_BUILD_ENVIRON export BLDENV export BUILD_WORKDIR export MIRROR_SNAPSHOT +export BUILD_PUBLIC_URL +export BUILD_SNAPSHOT_URL export SONIC_OS_VERSION export FILES_PATH export PROJECT_ROOT @@ -160,7 +162,7 @@ include $(RULES_PATH)/config ############################################################################### ## Version control related exports ############################################################################### -export PACKAGE_URL_PREFIX +export BUILD_PACKAGES_URL export TRUSTED_GPG_URLS export SONIC_VERSION_CONTROL_COMPONENTS DEFAULT_CONTAINER_REGISTRY := $(SONIC_DEFAULT_CONTAINER_REGISTRY) @@ -317,6 +319,19 @@ ifeq ($(SONIC_PROFILING_ON),y) DEB_BUILD_OPTIONS_GENERIC := nostrip noopt endif +# ccache configuration — prepend /usr/lib/ccache to PATH so that gcc/g++/cc/c++ +# calls are intercepted by ccache symlinks. Cache is stored under target/ccache/ +# and persists across builds for near-instant recompilation of unchanged files. +CCACHE_ENV = +ifeq ($(SONIC_CONFIG_USE_CCACHE),y) +ifeq ($(shell command -v ccache >/dev/null 2>&1 || echo notfound),notfound) +$(error SONIC_CONFIG_USE_CCACHE=y but 'ccache' is not installed in the build environment) +endif +CCACHE_DIR := $(abspath $(TARGET_PATH)/ccache/$(BLDENV)) +CCACHE_ENV = PATH=/usr/lib/ccache:$$PATH CCACHE_DIR=$(CCACHE_DIR) CCACHE_BASEDIR=$(BUILD_WORKDIR) CCACHE_COMPILERCHECK=content CCACHE_UMASK=022 +$(shell mkdir -p $(CCACHE_DIR)) +endif + ifeq ($(SONIC_BUILD_JOBS),) override SONIC_BUILD_JOBS := $(SONIC_CONFIG_BUILD_JOBS) endif @@ -340,6 +355,11 @@ endif MAKEFLAGS += -j $(SONIC_BUILD_JOBS) export SONIC_CONFIG_MAKE_JOBS +# When SONIC_CONFIG_USE_DOCKER_CACHE is enabled, allow Docker layer caching +ifneq ($(strip $(SONIC_CONFIG_USE_DOCKER_CACHE)),y) +DOCKER_NO_CACHE_FLAG = --no-cache +endif + ifeq ($(CONFIGURED_PLATFORM),vs) export BUILD_MULTIASIC_KVM endif @@ -423,7 +443,8 @@ $(info "SONIC_CONFIG_PRINT_DEPENDENCIES" : "$(SONIC_CONFIG_PRINT_DEPENDENCIES)") $(info "SONIC_BUILD_JOBS" : "$(SONIC_BUILD_JOBS)") $(info "SONIC_CONFIG_MAKE_JOBS" : "$(SONIC_CONFIG_MAKE_JOBS)") $(info "USE_NATIVE_DOCKERD_FOR_BUILD" : "$(SONIC_CONFIG_USE_NATIVE_DOCKERD_FOR_BUILD)") -$(info "SONIC_USE_DOCKER_BUILDKIT" : "$(SONIC_USE_DOCKER_BUILDKIT)") +$(info "USE_DOCKER_CACHE" : "$(SONIC_CONFIG_USE_DOCKER_CACHE)") +$(info "SONIC_CONFIG_USE_CCACHE" : "$(SONIC_CONFIG_USE_CCACHE)") $(info "USERNAME" : "$(USERNAME)") $(info "PASSWORD" : "$(PASSWORD)") $(info "CHANGE_DEFAULT_PASSWORD" : "$(CHANGE_DEFAULT_PASSWORD)") @@ -442,6 +463,7 @@ $(info "ROUTING_STACK" : "$(SONIC_ROUTING_STACK)") ifeq ($(SONIC_ROUTING_STACK),frr) $(info "FRR_USER_UID" : "$(FRR_USER_UID)") $(info "FRR_USER_GID" : "$(FRR_USER_GID)") +$(info "ENABLE_FRR_TCMALLOC" : "$(ENABLE_FRR_TCMALLOC)") endif $(info "ENABLE_SYNCD_RPC" : "$(ENABLE_SYNCD_RPC)") $(info "SAITHRIFT_V2" : "$(SAITHRIFT_V2)") @@ -482,6 +504,8 @@ $(info "INCLUDE_MUX" : "$(INCLUDE_MUX)") $(info "INCLUDE_TEAMD" : "$(INCLUDE_TEAMD)") $(info "INCLUDE_DASH_HA" : "$(INCLUDE_DASH_HA)") $(info "INCLUDE_ROUTER_ADVERTISER" : "$(INCLUDE_ROUTER_ADVERTISER)") +$(info "INCLUDE_SNMP" : "$(INCLUDE_SNMP)") +$(info "INCLUDE_LLDP" : "$(INCLUDE_LLDP)") $(info "INCLUDE_BOOTCHART : "$(INCLUDE_BOOTCHART)") $(info "ENABLE_BOOTCHART : "$(ENABLE_BOOTCHART)") $(info "INCLUDE_FIPS" : "$(INCLUDE_FIPS)") @@ -501,6 +525,11 @@ $(info "CROSS_BUILD_ENVIRON" : "$(CROSS_BUILD_ENVIRON)") $(info "INCLUDE_EXTERNAL_PATCHES" : "$(INCLUDE_EXTERNAL_PATCHES)") $(info "PTF_ENV_PY_VER" : "$(PTF_ENV_PY_VER)") $(info "ENABLE_MULTIDB" : "$(ENABLE_MULTIDB)") +$(info "ENABLE_SBOM" : "$(ENABLE_SBOM)") +$(info "SBOM_FORMAT" : "$(SBOM_FORMAT)") +$(info "SBOM_SCAN_TOOL" : "$(SBOM_SCAN_TOOL)") +$(info "SBOM_INCLUDE_LICENSES" : "$(SBOM_INCLUDE_LICENSES)") +$(info "SBOM_STRICT" : "$(SBOM_STRICT)") $(info ) else $(info SONiC Build System for $(CONFIGURED_PLATFORM):$(CONFIGURED_ARCH)) @@ -522,11 +551,12 @@ $(eval $(rfs_target)_MACHINE=$($(1)_MACHINE)) $(eval SONIC_RFS_TARGETS+=$(rfs_target)) $(if $($(1)_DEPENDENT_MACHINE),\ - $(eval dependent_rfs_target=$(call rfs_build_target_name,$(1),$($(1)_DEPENDENT_MACHINE))) - $(eval $(dependent_rfs_target)_INSTALLER=$(1)) - $(eval $(dependent_rfs_target)_MACHINE=$($(1)_DEPENDENT_MACHINE)) - $(eval SONIC_RFS_TARGETS+=$(dependent_rfs_target)) - $(eval $(rfs_target)_DEPENDENT_RFS=$(dependent_rfs_target))) + $(foreach dep,$($(1)_DEPENDENT_MACHINE),\ + $(eval dependent_rfs_target=$(call rfs_build_target_name,$(1),$(dep))) + $(eval $(dependent_rfs_target)_INSTALLER=$(1)) + $(eval $(dependent_rfs_target)_MACHINE=$(dep)) + $(eval SONIC_RFS_TARGETS+=$(dependent_rfs_target)) + $(eval $(rfs_target)_DEPENDENT_RFS+=$(dependent_rfs_target)))) endef $(foreach installer,$(SONIC_INSTALLERS),$(eval $(call rfs_define_target,$(installer)))) @@ -543,7 +573,7 @@ include Makefile.cache ############################################################################### ## Generic rules section -## All rules must go after includes for propper targets expansion +## All rules must go after includes for proper targets expansion ############################################################################### export kernel_procure_method=$(KERNEL_PROCURE_METHOD) @@ -575,6 +605,40 @@ endef # $(1) => Docker name # $(2) => Docker target name +# $(call sbom_emit_fragment,artifact,recipe_type,src_path,url,depends,rdepends,main_deb) +# Emit a per-artifact CycloneDX SBOM fragment next to the artifact. +# The make-side $(if) short-circuits when ENABLE_SBOM != y so non-SBOM +# builds skip Python startup entirely (otherwise ~30s of cumulative +# overhead across ~120 recipe hooks). When y, the script still self-gates +# defensively. +# +# Failure handling honors SBOM_STRICT: +# SBOM_STRICT=y → fragment-emit failures abort the recipe (consistent +# with the strict contract: user opted in, surface +# every problem). +# SBOM_STRICT=n → failures swallowed via `|| true` so a script bug +# can never break a build (defensive fallback). +# +# Recipes can set $(ARTIFACT)_LICENSE = "" to provide an +# explicit license for SONiC-native artifacts where no debian/copyright +# ships and the DEP-5 resolver would otherwise emit NOASSERTION. +sbom_emit_fragment = $(if $(filter y,$(ENABLE_SBOM)),ARTIFACT="$(1)" RECIPE_TYPE="$(2)" SRC_PATH="$(3)" URL="$(4)" DEPENDS="$(5)" RDEPENDS="$(6)" MAIN_DEB="$(7)" ARTIFACT_LICENSE="$($(notdir $(1))_LICENSE)" ENABLE_SBOM="$(ENABLE_SBOM)" CONFIGURED_PLATFORM="$(CONFIGURED_PLATFORM)" CONFIGURED_ARCH="$(CONFIGURED_ARCH)" SONIC_IMAGE_VERSION="$(SONIC_IMAGE_VERSION)" python3 ./scripts/sbom_fragment.py$(if $(filter y,$(SBOM_STRICT)),, || true),:) + +# Test containers that DON'T ship in any .bin installer payload but DO +# get built (controlled by their respective INCLUDE_* flags) and need +# their own standalone SBOM for security tooling. Each gets a sidecar +# target/.gz.sbom.cdx.json at build time. Containers that +# ship in a .bin are covered by the per-.bin aggregate SBOM and don't +# need a duplicate sidecar. +SBOM_TEST_CONTAINERS = docker-ptf.gz docker-ptf-sai.gz docker-sonic-mgmt.gz + +# $(call sbom_emit_per_container,docker_name,artifact_path) +# Emit a per-container CycloneDX SBOM. Fires only for SBOM_TEST_CONTAINERS +# and only when ENABLE_SBOM=y. SBOM_SCAN_TOOL is honored so operators +# can opt into syft cross-check per-container (default: skip the +# per-container scanner pass to keep build time manageable). +sbom_emit_per_container = $(if $(filter y,$(ENABLE_SBOM)),$(if $(filter $(notdir $(2)),$(SBOM_TEST_CONTAINERS)),TARGET_PATH="$(TARGET_PATH)" CONFIGURED_PLATFORM="$(CONFIGURED_PLATFORM)" CONFIGURED_ARCH="$(CONFIGURED_ARCH)" SONIC_IMAGE_VERSION="$(SONIC_IMAGE_VERSION)" SONIC_VERSION_CONTROL_COMPONENTS="$(SONIC_VERSION_CONTROL_COMPONENTS)" ENABLE_SBOM="$(ENABLE_SBOM)" SBOM_FORMAT="$(SBOM_FORMAT)" SBOM_SCAN_TOOL="$(if $(SBOM_PER_CONTAINER_SCAN_TOOL),$(SBOM_PER_CONTAINER_SCAN_TOOL),none)" SBOM_INCLUDE_LICENSES="$(SBOM_INCLUDE_LICENSES)" SBOM_STRICT="$(SBOM_STRICT)" python3 ./scripts/build_sbom.py --container "$(notdir $(2))"$(if $(filter y,$(SBOM_STRICT)),, || true),:),:) + define docker-image-save @echo "Attempting docker image lock for $(1) save" $(LOG) $(call MOD_LOCK,$(1),$(DOCKER_LOCKDIR),$(DOCKER_LOCKFILE_SUFFIX),$(DOCKER_LOCKFILE_TIMEOUT)) @@ -583,6 +647,13 @@ define docker-image-save docker tag $(1)-$(DOCKER_USERNAME):$(DOCKER_USERTAG) $(1):$(call docker-get-tag,$(1)) $(LOG) @echo "Saving docker image $(1):$(call docker-get-tag,$(1))" $(LOG) docker save $(1):$(call docker-get-tag,$(1)) | pigz -c > $(2) + # Emit SBOM fragment for the saved docker archive (no-op when ENABLE_SBOM != y). + $(call sbom_emit_fragment,$(2),DOCKER_IMAGE,,,,,) + # For test containers that don't ship in any .bin (docker-ptf, + # docker-sonic-mgmt, etc.), emit a standalone per-container SBOM + # so they can be security-scanned independently. No-op for the + # ~30 other containers (covered by the per-.bin aggregate SBOM). + $(call sbom_emit_per_container,$(1),$(2)) if [ x$(SONIC_CONFIG_USE_NATIVE_DOCKERD_FOR_BUILD) == x"y" ]; then @echo "Removing docker image $(1):$(call docker-get-tag,$(1))" $(LOG) docker rmi -f $(1):$(call docker-get-tag,$(1)) $(LOG) @@ -686,6 +757,8 @@ $(addprefix $(DEBS_PATH)/, $(SONIC_ONLINE_DEBS)) : $(DEBS_PATH)/% : .platform \ # Save the target deb into DPKG cache $(call SAVE_CACHE,$*,$@) fi + # Emit SBOM fragment for the downloaded vendor/online deb. + $(call sbom_emit_fragment,$(DEBS_PATH)/$*,ONLINE_DEB,,$($*_URL),$($*_DEPENDS),$($*_RDEPENDS),) $(FOOTER) SONIC_TARGET_LIST += $(addprefix $(DEBS_PATH)/, $(SONIC_ONLINE_DEBS)) @@ -807,7 +880,7 @@ $(addprefix $(DEBS_PATH)/, $(SONIC_MAKE_DEBS)) : $(DEBS_PATH)/% : .platform $$(a if [ -f $($*_SRC_PATH).patch/series ]; then pushd $($*_SRC_PATH) && ( quilt pop -a -f 1>/dev/null 2>&1 || true ) && QUILT_PATCHES=../$(notdir $($*_SRC_PATH)).patch quilt push -a; popd; fi $(LOG) # Build project and take package $(SETUP_OVERLAYFS_FOR_DPKG_ADMINDIR) - DEB_BUILD_OPTIONS="${DEB_BUILD_OPTIONS_GENERIC}" $(ANT_DEB_CONFIG) $(CROSS_COMPILE_FLAGS) make -j$(SONIC_CONFIG_MAKE_JOBS) DEST=$(shell pwd)/$(DEBS_PATH) -C $($*_SRC_PATH) $(shell pwd)/$(DEBS_PATH)/$* $(LOG) + $(CCACHE_ENV) DEB_BUILD_OPTIONS="${DEB_BUILD_OPTIONS_GENERIC}" $(ANT_DEB_CONFIG) $(CROSS_COMPILE_FLAGS) make -j$(SONIC_CONFIG_MAKE_JOBS) DEST=$(shell pwd)/$(DEBS_PATH) -C $($*_SRC_PATH) $(shell pwd)/$(DEBS_PATH)/$* $(LOG) # Clean up if [ -f $($*_SRC_PATH).patch/series ]; then pushd $($*_SRC_PATH) && quilt pop -a -f; [ -d .pc ] && rm -rf .pc; popd; fi $(LOG) @@ -819,6 +892,9 @@ $(addprefix $(DEBS_PATH)/, $(SONIC_MAKE_DEBS)) : $(DEBS_PATH)/% : .platform $$(a # Uninstall unneeded build dependency $(call UNINSTALL_DEBS,$($*_UNINSTALLS)) + # Emit SBOM fragment next to the .deb (no-op when ENABLE_SBOM != y). + $(call sbom_emit_fragment,$(DEBS_PATH)/$*,MAKE_DEB,$($*_SRC_PATH),,$($*_DEPENDS),$($*_RDEPENDS),) + $(FOOTER) SONIC_TARGET_LIST += $(addprefix $(DEBS_PATH)/, $(SONIC_MAKE_DEBS)) @@ -853,8 +929,8 @@ $(addprefix $(DEBS_PATH)/, $(SONIC_DPKG_DEBS)) : $(DEBS_PATH)/% : .platform $$(a if [ -f ./autogen.sh ]; then ./autogen.sh $(LOG); fi $(SETUP_OVERLAYFS_FOR_DPKG_ADMINDIR) $(if $($*_DPKG_TARGET), - ${$*_BUILD_ENV} DEB_BUILD_OPTIONS="${DEB_BUILD_OPTIONS_GENERIC} ${$*_DEB_BUILD_OPTIONS}" DEB_BUILD_PROFILES="${$*_DEB_BUILD_PROFILES}" $(ANT_DEB_CONFIG) $(CROSS_COMPILE_FLAGS) timeout --preserve-status -s 9 -k 10 $(BUILD_PROCESS_TIMEOUT) dpkg-buildpackage -rfakeroot -b $(ANT_DEB_CROSS_OPT) -us -uc -tc -j$(SONIC_CONFIG_MAKE_JOBS) --as-root -T$($*_DPKG_TARGET) --admindir $$mergedir $(LOG), - ${$*_BUILD_ENV} DEB_BUILD_OPTIONS="${DEB_BUILD_OPTIONS_GENERIC} ${$*_DEB_BUILD_OPTIONS}" DEB_BUILD_PROFILES="${$*_DEB_BUILD_PROFILES}" $(ANT_DEB_CONFIG) $(CROSS_COMPILE_FLAGS) timeout --preserve-status -s 9 -k 10 $(BUILD_PROCESS_TIMEOUT) dpkg-buildpackage -rfakeroot -b $(ANT_DEB_CROSS_OPT) -us -uc -tc -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $$mergedir $(LOG) + ${$*_BUILD_ENV} $(CCACHE_ENV) DEB_BUILD_OPTIONS="${DEB_BUILD_OPTIONS_GENERIC} ${$*_DEB_BUILD_OPTIONS}" DEB_BUILD_PROFILES="${$*_DEB_BUILD_PROFILES}" $(ANT_DEB_CONFIG) $(CROSS_COMPILE_FLAGS) timeout --preserve-status -s 9 -k 10 $(BUILD_PROCESS_TIMEOUT) dpkg-buildpackage -rfakeroot -b $(ANT_DEB_CROSS_OPT) -us -uc -tc -j$(SONIC_CONFIG_MAKE_JOBS) --as-root -T$($*_DPKG_TARGET) --admindir $$mergedir $(LOG), + ${$*_BUILD_ENV} $(CCACHE_ENV) DEB_BUILD_OPTIONS="${DEB_BUILD_OPTIONS_GENERIC} ${$*_DEB_BUILD_OPTIONS}" DEB_BUILD_PROFILES="${$*_DEB_BUILD_PROFILES}" $(ANT_DEB_CONFIG) $(CROSS_COMPILE_FLAGS) timeout --preserve-status -s 9 -k 10 $(BUILD_PROCESS_TIMEOUT) dpkg-buildpackage -rfakeroot -b $(ANT_DEB_CROSS_OPT) -us -uc -tc -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $$mergedir $(LOG) ) popd $(LOG_SIMPLE) # Clean up @@ -869,6 +945,9 @@ $(addprefix $(DEBS_PATH)/, $(SONIC_DPKG_DEBS)) : $(DEBS_PATH)/% : .platform $$(a # Uninstall unneeded build dependency $(call UNINSTALL_DEBS,$($*_UNINSTALLS)) + # Emit SBOM fragment next to the .deb (no-op when ENABLE_SBOM != y). + $(call sbom_emit_fragment,$(DEBS_PATH)/$*,DPKG_DEB,$($*_SRC_PATH),,$($*_DEPENDS),$($*_RDEPENDS),) + $(FOOTER) SONIC_TARGET_LIST += $(addprefix $(DEBS_PATH)/, $(SONIC_DPKG_DEBS)) @@ -884,6 +963,8 @@ $(addprefix $(DEBS_PATH)/, $(SONIC_DERIVED_DEBS)) : $(DEBS_PATH)/% : .platform $ # we depend on it # Put newer timestamp [ -f $@ ] && touch $@ + # Emit SBOM fragment (references parent's bom-ref). + $(call sbom_emit_fragment,$(DEBS_PATH)/$*,DERIVED_DEB,$($*_SRC_PATH),,$($*_DEPENDS),$($*_RDEPENDS),$($*_MAIN_DEB)) $(FOOTER) SONIC_TARGET_LIST += $(addprefix $(DEBS_PATH)/, $(SONIC_DERIVED_DEBS)) @@ -899,6 +980,8 @@ $(addprefix $(DEBS_PATH)/, $(SONIC_EXTRA_DEBS)) : $(DEBS_PATH)/% : .platform $$( # we depend on it # Put newer timestamp [ -f $@ ] && touch $@ + # Emit SBOM fragment (references parent's bom-ref). + $(call sbom_emit_fragment,$(DEBS_PATH)/$*,EXTRA_DEB,$($*_SRC_PATH),,$($*_DEPENDS),$($*_RDEPENDS),$($*_MAIN_DEB)) $(FOOTER) SONIC_TARGET_LIST += $(addprefix $(DEBS_PATH)/, $(SONIC_EXTRA_DEBS)) @@ -915,24 +998,22 @@ SONIC_INSTALL_DEBS = $(addsuffix -install,$(addprefix $(DEBS_PATH)/, \ $(SONIC_INSTALL_DEBS) : $(DEBS_PATH)/%-install : .platform $$(addsuffix -install,$$(addprefix $(DEBS_PATH)/,$$($$*_DEPENDS))) $$(addsuffix -install,$$(addprefix $(PYTHON_WHEELS_PATH)/,$$($$*_WHEEL_DEPENDS))) $$(addprefix $(PHONY_PATH)/,$$($$*_PHONIES)) $(DEBS_PATH)/$$* $(HEADER) [ -f $(DEBS_PATH)/$* ] || { echo $(DEBS_PATH)/$* does not exist $(LOG) && false $(LOG) } - for i in {1..360}; do - # wait for conflicted packages to be uninstalled - $(foreach deb, $($*_CONFLICT_DEBS), \ - { while dpkg -s $(firstword $(subst _, ,$(basename $(deb)))) | grep "^Version: $(word 2, $(subst _, ,$(basename $(deb))))" &> /dev/null; do echo "waiting for $(deb) to be uninstalled" $(LOG); sleep 1; done } ) - # put a lock here because dpkg does not allow installing packages in parallel - if mkdir $(DEBS_PATH)/dpkg_lock &> /dev/null; then + # wait for conflicted packages to be uninstalled + $(foreach deb, $($*_CONFLICT_DEBS), \ + { while dpkg -s $(firstword $(subst _, ,$(basename $(deb)))) | grep "^Version: $(word 2, $(subst _, ,$(basename $(deb))))" &> /dev/null; do echo "waiting for $(deb) to be uninstalled" $(LOG); sleep 1; done } ) + # Use flock for serialized dpkg install — eliminates polling overhead from the + # previous mkdir/sleep-10 lock. Waiters block in the kernel until the lock is + # released, so there is zero wasted time between consecutive installs. ifneq ($(CROSS_BUILD_ENVIRON),y) - { sudo DEBIAN_FRONTEND=noninteractive $($*_DEB_INSTALL_OPTS) dpkg -i $(DEBS_PATH)/$* $(LOG) && rm -d $(DEBS_PATH)/dpkg_lock && break; } || { set +e; rm -d $(DEBS_PATH)/dpkg_lock; sudo lsof /var/lib/dpkg/lock-frontend; ps aux; exit 1 ; } + flock $(DEBS_PATH)/dpkg_lock.lk sudo DEBIAN_FRONTEND=noninteractive $($*_DEB_INSTALL_OPTS) dpkg -i $(DEBS_PATH)/$* $(LOG) else - # Relocate debian packages python libraries to the cross python virtual env location - { sudo DEBIAN_FRONTEND=noninteractive $($*_DEB_INSTALL_OPTS) dpkg -i $(if $(findstring $(LINUX_HEADERS),$*),--force-depends) $(DEBS_PATH)/$* $(LOG) && \ - rm -rf tmp && mkdir tmp && dpkg -x $(DEBS_PATH)/$* tmp && (sudo cp -rf tmp/usr/lib/python2*/dist-packages/* $(VIRTENV_LIB_CROSS_PYTHON2)/python2*/site-packages/ 2>/dev/null || true) && \ - (sudo cp -rf tmp/usr/lib/python3/dist-packages/* $(VIRTENV_LIB_CROSS_PYTHON3)/python3.*/site-packages/ 2>/dev/null || true) && \ - rm -d $(DEBS_PATH)/dpkg_lock && break; } || { set +e; rm -d $(DEBS_PATH)/dpkg_lock; sudo lsof /var/lib/dpkg/lock-frontend; ps aux; exit 1 ; } + flock $(DEBS_PATH)/dpkg_lock.lk bash -c '\ + sudo DEBIAN_FRONTEND=noninteractive $($*_DEB_INSTALL_OPTS) dpkg -i $(if $(findstring $(LINUX_HEADERS),$*),--force-depends) $(DEBS_PATH)/$* $(LOG) && \ + rm -rf tmp && mkdir tmp && dpkg -x $(DEBS_PATH)/$* tmp && \ + (sudo cp -rf tmp/usr/lib/python2*/dist-packages/* $(VIRTENV_LIB_CROSS_PYTHON2)/python2*/site-packages/ 2>/dev/null || true) && \ + (sudo cp -rf tmp/usr/lib/python3/dist-packages/* $(VIRTENV_LIB_CROSS_PYTHON3)/python3.*/site-packages/ 2>/dev/null || true) \ + ' endif - fi - sleep 10 - done $(FOOTER) @@ -978,6 +1059,9 @@ $(addprefix $(PYTHON_DEBS_PATH)/, $(SONIC_PYTHON_STDEB_DEBS)) : $(PYTHON_DEBS_PA $(call SAVE_CACHE,$*,$@) fi + # Emit SBOM fragment for the stdeb-built python deb. + $(call sbom_emit_fragment,$(PYTHON_DEBS_PATH)/$*,PYTHON_STDEB,$($*_SRC_PATH),,$($*_DEPENDS),$($*_RDEPENDS),) + $(FOOTER) SONIC_TARGET_LIST += $(addprefix $(PYTHON_DEBS_PATH)/, $(SONIC_PYTHON_STDEB_DEBS)) @@ -1007,9 +1091,22 @@ $(addprefix $(PYTHON_WHEELS_PATH)/, $(SONIC_PYTHON_WHEELS)) : $(PYTHON_WHEELS_PA if [ -f ../$(notdir $($*_SRC_PATH)).patch/series ]; then ( quilt pop -a -f 1>/dev/null 2>&1 || true ) && QUILT_PATCHES=../$(notdir $($*_SRC_PATH)).patch quilt push -a; fi $(LOG) ifneq ($(CROSS_BUILD_ENVIRON),y) # Use pip instead of later setup.py to install dependencies into user home, but uninstall self - { pip$($*_PYTHON_VERSION) install . && pip$($*_PYTHON_VERSION) uninstall --yes `python$($*_PYTHON_VERSION) setup.py --name`; } $(LOG) + { pip$($*_PYTHON_VERSION) install . && + NAME=$$(python$($*_PYTHON_VERSION) -c "import tomllib; print(tomllib.load(open('pyproject.toml','rb'))['project']['name'])" 2>/dev/null \ + || python$($*_PYTHON_VERSION) setup.py --name | tail -n 1) && \ + pip$($*_PYTHON_VERSION) uninstall --yes "$$NAME"; } $(LOG) ifneq ($(filter bookworm trixie,$(BLDENV)),) - if [ ! "$($*_TEST)" = "n" ] && [ ! "$(BUILD_SKIP_TEST)" = "y" ]; then pip$($*_PYTHON_VERSION) install ".[testing]" && pip$($*_PYTHON_VERSION) uninstall --yes `python$($*_PYTHON_VERSION) setup.py --name` && timeout --preserve-status -s 9 -k 10 $(BUILD_PROCESS_TIMEOUT) python$($*_PYTHON_VERSION) -m pytest; fi $(LOG) + { \ + echo "Building Wheels package $@"; \ + if case "$@" in *trixie*sonic_chassisd*) true;; *) false;; esac; then \ + echo "Skipping tests for sonic_chassisd on trixie ($@)"; \ + elif [ ! "$($*_TEST)" = "n" ] && [ ! "$(BUILD_SKIP_TEST)" = "y" ]; then \ + pip$($*_PYTHON_VERSION) install ".[testing]" && \ + NAME=$$(python$($*_PYTHON_VERSION) -c "import tomllib; print(tomllib.load(open('pyproject.toml','rb'))['project']['name'])" 2>/dev/null \ + || python$($*_PYTHON_VERSION) setup.py --name | tail -n 1) && \ + pip$($*_PYTHON_VERSION) uninstall --yes "$$NAME" && \ + timeout --preserve-status -s 9 -k 10 $(BUILD_PROCESS_TIMEOUT) python$($*_PYTHON_VERSION) -m pytest; \ + fi; } $(LOG) python$($*_PYTHON_VERSION) -m build -n $(LOG) else if [ ! "$($*_TEST)" = "n" ] && [ ! "$(BUILD_SKIP_TEST)" = "y" ]; then timeout --preserve-status -s 9 -k 10 $(BUILD_PROCESS_TIMEOUT) python$($*_PYTHON_VERSION) setup.py test $(LOG); fi @@ -1035,6 +1132,9 @@ endif # Uninstall unneeded build dependency $(call UNINSTALL_DEBS,$($*_UNINSTALLS)) + # Emit SBOM fragment for the built python wheel. + $(call sbom_emit_fragment,$(PYTHON_WHEELS_PATH)/$*,PYTHON_WHEEL,$($*_SRC_PATH),,$($*_DEPENDS),$($*_RDEPENDS),) + $(FOOTER) SONIC_TARGET_LIST += $(addprefix $(PYTHON_WHEELS_PATH)/, $(SONIC_PYTHON_WHEELS)) @@ -1045,17 +1145,18 @@ SONIC_INSTALL_WHEELS = $(addsuffix -install, $(addprefix $(PYTHON_WHEELS_PATH)/, $(SONIC_INSTALL_WHEELS) : $(PYTHON_WHEELS_PATH)/%-install : .platform $$(addsuffix -install,$$(addprefix $(PYTHON_WHEELS_PATH)/,$$($$*_DEPENDS))) $$(addsuffix -install,$$(addprefix $(DEBS_PATH)/,$$($$*_DEBS_DEPENDS))) $(PYTHON_WHEELS_PATH)/$$* $(HEADER) [ -f $(PYTHON_WHEELS_PATH)/$* ] || { echo $(PYTHON_WHEELS_PATH)/$* does not exist $(LOG) && exit 1; } - # put a lock here to avoid race conditions - while true; do - if mkdir $(PYTHON_WHEELS_PATH)/pip_lock &> /dev/null; then + # Use flock for serialized pip install — eliminates busy-wait polling from the + # previous mkdir lock. Waiters block in the kernel until the lock is released. ifneq ($(CROSS_BUILD_ENVIRON),y) - { sudo -E SKIP_BUILD_HOOK=Y pip$($*_PYTHON_VERSION) install $(PYTHON_WHEELS_PATH)/$* $(LOG) && rm -d $(PYTHON_WHEELS_PATH)/pip_lock && break; } || { rm -d $(PYTHON_WHEELS_PATH)/pip_lock && exit 1 ; } + flock $(PYTHON_WHEELS_PATH)/pip_lock.lk sudo -E SKIP_BUILD_HOOK=Y pip$($*_PYTHON_VERSION) install $(PYTHON_WHEELS_PATH)/$* $(LOG) else - # Link python script and data expected location to the cross python virtual env istallation locations - { PATH=$(VIRTENV_BIN_CROSS_PYTHON$($*_PYTHON_VERSION)):${PATH} sudo -E $(VIRTENV_BIN_CROSS_PYTHON$($*_PYTHON_VERSION))/pip$($*_PYTHON_VERSION) install $(PYTHON_WHEELS_PATH)/$* $(LOG) && $(if $(findstring $(SONIC_CONFIG_ENGINE_PY3),$*),(sudo ln -s $(VIRTENV_BIN_CROSS_PYTHON$($*_PYTHON_VERSION))/sonic-cfggen /usr/local/bin/sonic-cfggen 2>/dev/null || true), true ) && $(if $(findstring $(SONIC_YANG_MODELS_PY3),$*),(sudo ln -s $(VIRTENV_BASE_CROSS_PYTHON3)/yang-models /usr/local/yang-models 2>/dev/null || true), true ) && rm -d $(PYTHON_WHEELS_PATH)/pip_lock && break; } || { rm -d $(PYTHON_WHEELS_PATH)/pip_lock && exit 1 ; } + # Link python script and data expected location to the cross python virtual env installation locations + flock $(PYTHON_WHEELS_PATH)/pip_lock.lk bash -c '\ + PATH=$(VIRTENV_BIN_CROSS_PYTHON$($*_PYTHON_VERSION)):$${PATH} sudo -E $(VIRTENV_BIN_CROSS_PYTHON$($*_PYTHON_VERSION))/pip$($*_PYTHON_VERSION) install $(PYTHON_WHEELS_PATH)/$* $(LOG) && \ + $(if $(findstring $(SONIC_CONFIG_ENGINE_PY3),$*),(sudo ln -s $(VIRTENV_BIN_CROSS_PYTHON$($*_PYTHON_VERSION))/sonic-cfggen /usr/local/bin/sonic-cfggen 2>/dev/null || true), true ) && \ + $(if $(findstring $(SONIC_YANG_MODELS_PY3),$*),(sudo ln -s $(VIRTENV_BASE_CROSS_PYTHON3)/yang-models /usr/local/yang-models 2>/dev/null || true), true ) \ + ' endif - fi - done $(FOOTER) ############################################################################### @@ -1069,7 +1170,11 @@ docker-start : $(Q)sudo bash -c "{ echo \"export http_proxy=$$http_proxy\"; \ echo \"export https_proxy=$$https_proxy\"; \ echo \"export no_proxy=$$no_proxy\"; } >> /etc/default/docker" - $(Q)test x$(SONIC_CONFIG_USE_NATIVE_DOCKERD_FOR_BUILD) != x"y" && sudo service docker status &> /dev/null || ( sudo service docker start &> /dev/null && ./scripts/wait_for_docker.sh 60 ) + $(Q)if [ x$(SONIC_CONFIG_USE_NATIVE_DOCKERD_FOR_BUILD) = x"y" ]; then \ + test -S /var/run/docker.sock && sudo docker ps &> /dev/null || ./scripts/wait_for_docker.sh 60; \ + else \ + sudo service docker status &> /dev/null || ( sudo service docker start &> /dev/null && ./scripts/wait_for_docker.sh 60 ); \ + fi # targets for building simple docker images that do not depend on any debian packages $(addprefix $(TARGET_PATH)/, $(SONIC_SIMPLE_DOCKER_IMAGES)) : $(TARGET_PATH)/%.gz : .platform docker-start $$(addsuffix -load,$$(addprefix $(TARGET_PATH)/,$$($$*.gz_LOAD_DOCKERS))) @@ -1081,9 +1186,10 @@ $(addprefix $(TARGET_PATH)/, $(SONIC_SIMPLE_DOCKER_IMAGES)) : $(TARGET_PATH)/%.g TRUSTED_GPG_URLS=$(TRUSTED_GPG_URLS) \ SONIC_VERSION_CACHE=$(SONIC_VERSION_CACHE) \ DBGOPT='$(DBGOPT)' \ + ENABLE_SBOM=$(ENABLE_SBOM) \ scripts/prepare_docker_buildinfo.sh $* $($*.gz_PATH)/Dockerfile $(CONFIGURED_ARCH) $(TARGET_DOCKERFILE)/Dockerfile.buildinfo $(LOG) docker info $(LOG) - docker build --no-cache \ + docker build $(DOCKER_NO_CACHE_FLAG) \ --build-arg http_proxy=$(HTTP_PROXY) \ --build-arg https_proxy=$(HTTPS_PROXY) \ --build-arg no_proxy=$(NO_PROXY) \ @@ -1091,6 +1197,7 @@ $(addprefix $(TARGET_PATH)/, $(SONIC_SIMPLE_DOCKER_IMAGES)) : $(TARGET_PATH)/%.g --build-arg uid=$(UID) \ --build-arg guid=$(GUID) \ --build-arg docker_container_name=$($*.gz_CONTAINER_NAME) \ + --build-arg ENABLE_SBOM=$(ENABLE_SBOM) \ --label Tag=$(SONIC_IMAGE_VERSION) \ -f $(TARGET_DOCKERFILE)/Dockerfile.buildinfo \ -t $(DOCKER_IMAGE_REF) $($*.gz_PATH) $(LOG) @@ -1174,6 +1281,9 @@ $(foreach IMAGE,$(DOCKER_IMAGES), $(eval $(IMAGE)_FILES_PATH := $(FILES_PATH))) $(foreach IMAGE,$(DOCKER_DBG_IMAGES), $(eval $(IMAGE)_DEBS_PATH := $(DEBS_PATH))) $(foreach IMAGE,$(DOCKER_DBG_IMAGES), $(eval $(IMAGE)_FILES_PATH := $(FILES_PATH))) +# Process _INCLUDE_DOCKER lists: auto-merge feature dockers into target dockers +$(foreach IMAGE,$(SONIC_DOCKER_IMAGES), $(eval $(call process_include_dockers,$(IMAGE)))) + # Targets for downloaded docker images $(addprefix $(TARGET_PATH)/,$(DOWNLOADED_DOCKER_IMAGES)) : $(TARGET_PATH)/%.gz : .platform \ $$(%.gz_DEP_FILES) @@ -1228,6 +1338,8 @@ $(addprefix $(TARGET_PATH)/, $(DOCKER_IMAGES)) : $(TARGET_PATH)/%.gz : .platform # Export variables for j2. Use path for unique variable names, e.g. docker_orchagent_debs export include_system_eventd="$(INCLUDE_SYSTEM_EVENTD)" export build_reduce_image_size="$(BUILD_REDUCE_IMAGE_SIZE)" + export enable_frr_tcmalloc="$(ENABLE_FRR_TCMALLOC)" + export enable_frr_snmp_agent="$(ENABLE_FRR_SNMP_AGENT)" export sonic_asic_platform="$(patsubst %-$(CONFIGURED_ARCH),%,$(CONFIGURED_PLATFORM))" $(eval export $(subst -,_,$(notdir $($*.gz_PATH)))_debs=$(shell printf "$(subst $(SPACE),\n,$(call expand,$($*.gz_DEPENDS),RDEPENDS))\n" | awk '!a[$$0]++')) $(eval export $(subst -,_,$(notdir $($*.gz_PATH)))_pydebs=$(shell printf "$(subst $(SPACE),\n,$(call expand,$($*.gz_PYTHON_DEBS)))\n" | awk '!a[$$0]++')) @@ -1235,24 +1347,25 @@ $(addprefix $(TARGET_PATH)/, $(DOCKER_IMAGES)) : $(TARGET_PATH)/%.gz : .platform $(eval export $(subst -,_,$(notdir $($*.gz_PATH)))_dbgs=$(shell printf "$(subst $(SPACE),\n,$(call expand,$($*.gz_DBG_PACKAGES)))\n" | awk '!a[$$0]++')) $(eval export $(subst -,_,$(notdir $($*.gz_PATH)))_pkgs=$(shell printf "$(subst $(SPACE),\n,$(call expand,$($*.gz_APT_PACKAGES)))\n" | awk '!a[$$0]++')) if [ -d $($*.gz_PATH)/cli-plugin-tests/ ] && [ ! "$(BUILD_SKIP_TEST)" = "y" ]; then pushd $($*.gz_PATH)/cli-plugin-tests; PATH=$(VIRTENV_BIN_CROSS_PYTHON$($(SONIC_UTILITIES_PY3)_PYTHON_VERSION)):${PATH} PYTHONPATH=$(shell realpath $($*.gz_PATH)):${PYTHONPATH} pytest-$($(SONIC_UTILITIES_PY3)_PYTHON_VERSION) -v $(LOG); popd; fi - # Label docker image with componenets versions + # Label docker image with components versions $(eval export $(subst -,_,$(notdir $($*.gz_PATH)))_labels=$(foreach component,\ $(call expand,$($*.gz_DEPENDS),RDEPENDS) \ $(call expand,$($*.gz_PYTHON_DEBS)) \ $(call expand,$($*.gz_PYTHON_WHEELS)),\ $(shell [[ ! -z "$($(component)_VERSION)" && ! -z "$($(component)_NAME)" ]] && \ echo "--label com.azure.sonic.versions.$($(component)_NAME)=$($(component)_VERSION)"))) - j2 $($*.gz_PATH)/Dockerfile.j2 > $($*.gz_PATH)/Dockerfile + python3 scripts/j2_include.py -I $($*.gz_PATH) $($*.gz_J2_INCLUDE_PATHS) $($*.gz_PATH)/Dockerfile.j2 > $($*.gz_PATH)/Dockerfile $(call generate_manifest,$*) # Prepare docker build info - PACKAGE_URL_PREFIX=$(PACKAGE_URL_PREFIX) \ + BUILD_PACKAGES_URL=$(BUILD_PACKAGES_URL) \ SONIC_ENFORCE_VERSIONS=$(SONIC_ENFORCE_VERSIONS) \ TRUSTED_GPG_URLS=$(TRUSTED_GPG_URLS) \ SONIC_VERSION_CACHE=$(SONIC_VERSION_CACHE) \ DBGOPT='$(DBGOPT)' \ + ENABLE_SBOM=$(ENABLE_SBOM) \ scripts/prepare_docker_buildinfo.sh $* $($*.gz_PATH)/Dockerfile $(CONFIGURED_ARCH) $(LOG) docker info $(LOG) - docker build --no-cache \ + docker build $(DOCKER_NO_CACHE_FLAG) \ --build-arg http_proxy=$(HTTP_PROXY) \ --build-arg https_proxy=$(HTTPS_PROXY) \ --build-arg no_proxy=$(NO_PROXY) \ @@ -1265,9 +1378,11 @@ $(addprefix $(TARGET_PATH)/, $(DOCKER_IMAGES)) : $(TARGET_PATH)/%.gz : .platform --build-arg SONIC_VERSION_CACHE=$(SONIC_VERSION_CACHE) \ --build-arg SONIC_VERSION_CACHE_SOURCE=$(SONIC_VERSION_CACHE_SOURCE) \ --build-arg image_version=$(SONIC_IMAGE_VERSION) \ + --build-arg ENABLE_SBOM=$(ENABLE_SBOM) \ --label com.azure.sonic.manifest="$$(cat $($*.gz_PATH)/manifest.json)" \ --label Tag=$(SONIC_IMAGE_VERSION) \ $($(subst -,_,$(notdir $($*.gz_PATH)))_labels) \ + $($*.gz_BUILD_CONTEXTS) \ -t $(DOCKER_IMAGE_REF) $($*.gz_PATH) $(LOG) if [ x$(SONIC_CONFIG_USE_NATIVE_DOCKERD_FOR_BUILD) == x"y" ]; then docker tag $(DOCKER_IMAGE_REF) $*; fi @@ -1292,6 +1407,7 @@ SONIC_TARGET_LIST += $(addprefix $(TARGET_PATH)/, $(DOCKER_IMAGES)) # Targets for building docker debug images $(addprefix $(TARGET_PATH)/, $(DOCKER_DBG_IMAGES)) : $(TARGET_PATH)/%-$(DBG_IMAGE_MARK).gz : .platform docker-start \ $$(addprefix $(TARGET_PATH)/,$$($$*.gz_AFTER)) \ + $$(addprefix $(TARGET_PATH)/,$$($$*-$(DBG_IMAGE_MARK).gz_AFTER)) \ $$(addprefix $$($$*.gz_DEBS_PATH)/,$$($$*.gz_DBG_DEPENDS)) \ $$(addsuffix -load,$$(addprefix $(TARGET_PATH)/,$$*.gz)) \ $(call dpkg_depend,$(TARGET_PATH)/%-$(DBG_IMAGE_MARK).gz.dep) @@ -1314,21 +1430,23 @@ $(addprefix $(TARGET_PATH)/, $(DOCKER_DBG_IMAGES)) : $(TARGET_PATH)/%-$(DBG_IMAG j2 $($*.gz_PATH)/Dockerfile-dbg.j2 > $($*.gz_PATH)/Dockerfile-dbg $(call generate_manifest,$*,dbg) # Prepare docker build info - PACKAGE_URL_PREFIX=$(PACKAGE_URL_PREFIX) \ + BUILD_PACKAGES_URL=$(BUILD_PACKAGES_URL) \ SONIC_ENFORCE_VERSIONS=$(SONIC_ENFORCE_VERSIONS) \ TRUSTED_GPG_URLS=$(TRUSTED_GPG_URLS) \ SONIC_VERSION_CACHE=$(SONIC_VERSION_CACHE) \ DBGOPT='$(DBGOPT)' \ + ENABLE_SBOM=$(ENABLE_SBOM) \ scripts/prepare_docker_buildinfo.sh $*-dbg $($*.gz_PATH)/Dockerfile-dbg $(CONFIGURED_ARCH) $(LOG) docker info $(LOG) docker build \ - --no-cache \ + $(DOCKER_NO_CACHE_FLAG) \ --build-arg http_proxy=$(HTTP_PROXY) \ --build-arg https_proxy=$(HTTPS_PROXY) \ --build-arg no_proxy=$(NO_PROXY) \ --build-arg docker_container_name=$($*.gz_CONTAINER_NAME) \ --build-arg SONIC_VERSION_CACHE=$(SONIC_VERSION_CACHE) \ --build-arg SONIC_VERSION_CACHE_SOURCE=$(SONIC_VERSION_CACHE_SOURCE) \ + --build-arg ENABLE_SBOM=$(ENABLE_SBOM) \ --label com.azure.sonic.manifest="$$(cat $($*.gz_PATH)/manifest.json)" \ --label Tag=$(SONIC_IMAGE_VERSION) \ --file $($*.gz_PATH)/Dockerfile-dbg \ @@ -1343,6 +1461,7 @@ $(addprefix $(TARGET_PATH)/, $(DOCKER_DBG_IMAGES)) : $(TARGET_PATH)/%-$(DBG_IMAG $(call docker-image-save,$*-$(DBG_IMAGE_MARK),$@) # Clean up + @echo "Removing docker image $(DOCKER_IMAGE_REF)" $(LOG) docker rmi -f $(DOCKER_IMAGE_REF) &> /dev/null || true if [ -f $($*.gz_PATH).patch/series ]; then pushd $($*.gz_PATH) && quilt pop -a -f; [ -d .pc ] && rm -rf .pc; popd; fi @@ -1419,13 +1538,14 @@ $(addprefix $(TARGET_PATH)/, $(SONIC_RFS_TARGETS)) : $(TARGET_PATH)/% : \ IMAGE_TYPE=$($(installer)_IMAGE_TYPE) \ TARGET_PATH=$(TARGET_PATH) \ TRUSTED_GPG_URLS=$(TRUSTED_GPG_URLS) \ - PACKAGE_URL_PREFIX=$(PACKAGE_URL_PREFIX) \ + BUILD_PACKAGES_URL=$(BUILD_PACKAGES_URL) \ DBGOPT='$(DBGOPT)' \ SONIC_VERSION_CACHE=$(SONIC_VERSION_CACHE) \ MULTIARCH_QEMU_ENVIRON=$(MULTIARCH_QEMU_ENVIRON) \ CROSS_BUILD_ENVIRON=$(CROSS_BUILD_ENVIRON) \ MASTER_KUBERNETES_VERSION=$(MASTER_KUBERNETES_VERSION) \ MASTER_CRI_DOCKERD=$(MASTER_CRI_DOCKERD) \ + ENABLE_SBOM="$(ENABLE_SBOM)" \ ./build_debian.sh $(LOG) $(call SAVE_CACHE,$*,$@) @@ -1440,6 +1560,9 @@ $(addprefix $(TARGET_PATH)/, $(SONIC_INSTALLERS)) : $(TARGET_PATH)/% : \ onie-image.conf \ build_debian.sh \ scripts/dbg_files.sh \ + scripts/build_sbom.sh \ + scripts/install_sbom_tool.sh \ + scripts/sbom_fragment.py \ build_image.sh \ $$(addsuffix -install,$$(addprefix $(IMAGE_DISTRO_DEBS_PATH)/,$$($$*_DEPENDS))) \ $$(addprefix $(IMAGE_DISTRO_DEBS_PATH)/,$$($$*_INSTALLS)) \ @@ -1451,6 +1574,7 @@ $(addprefix $(TARGET_PATH)/, $(SONIC_INSTALLERS)) : $(TARGET_PATH)/% : \ $(LINUX_KBUILD) \ $(SONIC_DEVICE_DATA) \ $(IFUPDOWN2) \ + $(MAKEDUMPFILE) \ $(KDUMP_TOOLS) \ $(LIBPAM_RADIUS) \ $(LIBNSS_RADIUS) \ @@ -1466,10 +1590,12 @@ $(addprefix $(TARGET_PATH)/, $(SONIC_INSTALLERS)) : $(TARGET_PATH)/% : \ $(SONIC_CTRMGRD_RS) \ $(SONIC_HOST_SERVICES_RS) \ $(SONIC_HOST_SERVICES_DATA) \ + $(SOCAT) \ $(BASH) \ $(BASH_TACPLUS) \ $(AUDISP_TACPLUS) \ $(SYSLOG_COUNTER) \ + $(SEDUTIL) \ $(GRUB2_COMMON)) \ $$(addprefix $(TARGET_PATH)/,$$($$*_DOCKERS)) \ $$(addprefix $(TARGET_PATH)/,$$(SONIC_PACKAGES_LOCAL)) \ @@ -1494,7 +1620,8 @@ $(addprefix $(TARGET_PATH)/, $(SONIC_INSTALLERS)) : $(TARGET_PATH)/% : \ $(addprefix $(PYTHON_WHEELS_PATH)/,$(SONIC_YANG_MGMT_PY3)) \ $(addprefix $(PYTHON_WHEELS_PATH)/,$(SYSTEM_HEALTH)) \ $(addprefix $(PYTHON_WHEELS_PATH)/,$(SONIC_HOST_SERVICES_PY3)) \ - $$(addprefix $(TARGET_PATH)/,$$($$*_RFS_DEPENDS)) + $$(addprefix $(TARGET_PATH)/,$$($$*_RFS_DEPENDS)) \ + $(addprefix $(IMAGE_DISTRO_DEBS_PATH)/,$(LINUX_KBUILD)-install) $(HEADER) # Pass initramfs and linux kernel explicitly. They are used for all platforms @@ -1505,7 +1632,7 @@ $(addprefix $(TARGET_PATH)/, $(SONIC_INSTALLERS)) : $(TARGET_PATH)/% : \ export linux_kernel="$(IMAGE_DISTRO_DEBS_PATH)/$(LINUX_KERNEL)" export onie_recovery_image="$(FILES_PATH)/$(ONIE_RECOVERY_IMAGE)" export onie_recovery_kvm_4asic_image="$(FILES_PATH)/$(ONIE_RECOVERY_KVM_4ASIC_IMAGE)" - export onie_recovery_kvm_6asic_image="$(FILES_PATH)/$(ONIE_RECOVERY_KVM_4ASIC_IMAGE)" + export onie_recovery_kvm_6asic_image="$(FILES_PATH)/$(ONIE_RECOVERY_KVM_6ASIC_IMAGE)" export kversion="$(KVERSION)" export image_type="$($*_IMAGE_TYPE)" export sonicadmin_user="$(USERNAME)" @@ -1528,6 +1655,8 @@ $(addprefix $(TARGET_PATH)/, $(SONIC_INSTALLERS)) : $(TARGET_PATH)/% : \ export include_restapi="$(INCLUDE_RESTAPI)" export include_nat="$(INCLUDE_NAT)" export include_p4rt="$(INCLUDE_P4RT)" + export include_snmp="$(INCLUDE_SNMP)" + export include_lldp="$(INCLUDE_LLDP)" export include_sflow="$(INCLUDE_SFLOW)" export enable_auto_tech_support="$(ENABLE_AUTO_TECH_SUPPORT)" export enable_asan="$(ENABLE_ASAN)" @@ -1545,7 +1674,7 @@ $(addprefix $(TARGET_PATH)/, $(SONIC_INSTALLERS)) : $(TARGET_PATH)/% : \ export include_kubernetes_master="$(INCLUDE_KUBERNETES_MASTER)" export kube_docker_proxy="$(KUBE_DOCKER_PROXY)" export enable_pfcwd_on_start="$(ENABLE_PFCWD_ON_START)" - export installer_debs="$(addprefix $(IMAGE_DISTRO_DEBS_PATH)/,$($*_INSTALLS) $(FIPS_BASEIMAGE_INSTALLERS))" + export installer_debs="$(addprefix $(IMAGE_DISTRO_DEBS_PATH)/,$($*_INSTALLS) $(FIPS_BASEIMAGE_INSTALLERS) $(SOCAT))" export installer_python_debs="$(addprefix $(IMAGE_DISTRO_DEBS_PATH)/,$(FIPS_BASEIMAGE_PYTHON_INSTALLERS))" export lazy_installer_debs="$(foreach deb, $($*_LAZY_INSTALLS),$(foreach device, $($(deb)_PLATFORM),$(addprefix $(device)@, $(IMAGE_DISTRO_DEBS_PATH)/$(deb))))" export lazy_build_installer_debs="$(foreach deb, $($*_LAZY_BUILD_INSTALLS), $(addprefix $($(deb)_MACHINE)|,$(deb)))" @@ -1587,6 +1716,7 @@ $(addprefix $(TARGET_PATH)/, $(SONIC_INSTALLERS)) : $(TARGET_PATH)/% : \ export include_bootchart="$(INCLUDE_BOOTCHART)" export enable_bootchart="$(ENABLE_BOOTCHART)" export enable_multidb="$(ENABLE_MULTIDB)" + export ENABLE_FRR_SNMP_AGENT="$(ENABLE_FRR_SNMP_AGENT)" $(foreach docker, $($*_DOCKERS),\ export docker_image="$(docker)" export docker_image_name="$(basename $(docker))" @@ -1685,7 +1815,7 @@ $(addprefix $(TARGET_PATH)/, $(SONIC_INSTALLERS)) : $(TARGET_PATH)/% : \ ONIE_IMAGE_PART_SIZE=$(ONIE_IMAGE_PART_SIZE) \ SONIC_ENFORCE_VERSIONS=$(SONIC_ENFORCE_VERSIONS) \ TRUSTED_GPG_URLS=$(TRUSTED_GPG_URLS) \ - PACKAGE_URL_PREFIX=$(PACKAGE_URL_PREFIX) \ + BUILD_PACKAGES_URL=$(BUILD_PACKAGES_URL) \ DBGOPT='$(DBGOPT)' \ SONIC_VERSION_CACHE=$(SONIC_VERSION_CACHE) \ MULTIARCH_QEMU_ENVIRON=$(MULTIARCH_QEMU_ENVIRON) \ @@ -1699,9 +1829,8 @@ $(addprefix $(TARGET_PATH)/, $(SONIC_INSTALLERS)) : $(TARGET_PATH)/% : \ MASTER_CRI_DOCKERD=$(MASTER_CRI_DOCKERD) \ MASTER_UI_METRIC_VERSION=$(MASTER_UI_METRIC_VERSION) \ MASTER_UI_DASH_VERSION=$(MASTER_UI_DASH_VERSION) \ - MASTER_MDM_VERSION=$(MASTER_MDM_VERSION) \ - MASTER_MDS_VERSION=$(MASTER_MDS_VERSION) \ - MASTER_FLUENTD_VERSION=$(MASTER_FLUENTD_VERSION) \ + ENABLE_SBOM="$(ENABLE_SBOM)" \ + TARGET_PATH="$(TARGET_PATH)" \ ./build_debian.sh $(LOG) USERNAME="$(USERNAME)" \ @@ -1723,6 +1852,37 @@ $(addprefix $(TARGET_PATH)/, $(SONIC_INSTALLERS)) : $(TARGET_PATH)/% : \ CA_CERT="$(CA_CERT)" \ TARGET_PATH="$(TARGET_PATH)" \ ./build_image.sh $(LOG) + + # SBOM emit runs AFTER build_image.sh so the artifact (.bin / + # .swi / .img.gz) already exists on disk: sbom_emit_provenance.py + # needs it to compute the subject SHA-256 for the in-toto + # attestation. SBOM_TARGET_ARTIFACT is the actual basename + # of what was just built. The outer foreach iterates over + # $*_MACHINE + $*_DEPENDENT_MACHINE, and each iteration's + # build_image.sh writes to sonic-$(dep_machine) (per + # onie-image.conf: OUTPUT_ONIE_IMAGE=target/sonic-$TARGET_MACHINE.bin, + # OUTPUT_ABOOT_IMAGE=target/sonic-aboot-$TARGET_MACHINE.swi, etc.). + # We derive the per-variant artifact name by substituting the + # primary machine for the current dep_machine in $* so each + # variant gets its own .cdx.json / .spdx.json / .intoto.json: + # sonic-broadcom.bin -> sonic-broadcom{,-dnx,-legacy-th}.bin + # sonic-aboot-broadcom.swi -> sonic-aboot-broadcom{,-dnx}.swi + # sonic-vs.img.gz -> sonic-vs.img.gz (single machine) + ENABLE_SBOM="$(ENABLE_SBOM)" \ + SBOM_FORMAT="$(SBOM_FORMAT)" \ + SBOM_SCAN_TOOL="$(SBOM_SCAN_TOOL)" \ + SBOM_INCLUDE_LICENSES="$(SBOM_INCLUDE_LICENSES)" \ + SBOM_STRICT="$(SBOM_STRICT)" \ + SBOM_TARGET_ARTIFACT="$(subst $($*_MACHINE),$(dep_machine),$*)" \ + TARGET_PATH="$(TARGET_PATH)" \ + TARGET_MACHINE="$(dep_machine)" \ + CONFIGURED_ARCH="$(CONFIGURED_ARCH)" \ + CONFIGURED_PLATFORM="$(CONFIGURED_PLATFORM)" \ + SONIC_VERSION_CONTROL_COMPONENTS="$(SONIC_VERSION_CONTROL_COMPONENTS)" \ + SBOM_INSTALLER_DOCKERS="$($*_DOCKERS)" \ + SBOM_INSTALLER_DEBS="$($*_INSTALLS) $($*_LAZY_INSTALLS) $($*_LAZY_BUILD_INSTALLS)" \ + SBOM_INSTALLER_WHEELS="$($*_PYTHON_WHEELS)" \ + ./scripts/build_sbom.sh $(LOG) ) $(foreach docker, $($*_DOCKERS), \ @@ -1799,6 +1959,37 @@ clean-versions :: .platform vclean:: .platform @sudo rm -rf target/vcache/* target/baseimage* +clean-docker :: .platform + @echo "=== Cleaning stale Docker build artifacts ===" + @# Remove old sonic-slave images (keep only the current tag) + @for img in sonic-slave-bookworm sonic-slave-trixie \ + sonic-slave-bookworm-$(USERNAME) sonic-slave-trixie-$(USERNAME) \ + tmp-sonic-slave-bookworm tmp-sonic-slave-trixie; do \ + current_id=$$(docker images --format '{{.ID}}' $$img:$(SLAVE_TAG) 2>/dev/null); \ + for old_id in $$(docker images --format '{{.ID}} {{.Repository}}:{{.Tag}}' $$img 2>/dev/null | \ + grep -v "$$current_id" | awk '{print $$2}'); do \ + echo "Removing old image: $$old_id"; \ + docker rmi -f $$old_id 2>/dev/null || true; \ + done; \ + done + @# Remove dangling images + @dangling=$$(docker images -q --filter 'dangling=true' 2>/dev/null); \ + if [ -n "$$dangling" ]; then \ + echo "Removing $$(echo $$dangling | wc -w) dangling images..."; \ + docker rmi -f $$dangling 2>/dev/null || true; \ + fi + @# Remove stopped build containers + @stopped=$$(docker ps -aq --filter 'status=exited' --filter 'name=sonic' 2>/dev/null); \ + if [ -n "$$stopped" ]; then \ + echo "Removing $$(echo $$stopped | wc -w) stopped containers..."; \ + docker rm $$stopped 2>/dev/null || true; \ + fi + @# Prune build cache + @echo "Pruning Docker build cache..." + @docker builder prune -f 2>/dev/null || true + @echo "=== Docker cleanup complete ===" + @docker system df 2>/dev/null || true + clean :: .platform clean-logs clean-versions $$(SONIC_CLEAN_DEBS) $$(SONIC_CLEAN_FILES) $$(SONIC_CLEAN_PHONIES) $$(SONIC_CLEAN_TARGETS) $$(SONIC_CLEAN_STDEB_DEBS) $$(SONIC_CLEAN_WHEELS) ############################################################################### @@ -1826,10 +2017,27 @@ jessie : $$(addprefix $(TARGET_PATH)/,$$(JESSIE_DOCKER_IMAGES)) \ ## Standard targets ############################################################################### -.PHONY : $(SONIC_CLEAN_DEBS) $(SONIC_CLEAN_FILES) $(SONIC_CLEAN_PHONIES) $(SONIC_CLEAN_TARGETS) $(SONIC_CLEAN_STDEB_DEBS) $(SONIC_CLEAN_WHEELS) $(SONIC_PHONY_TARGETS) clean distclean configure +############################################################################### +## ccache targets +############################################################################### +ccache-stats : +ifeq ($(SONIC_CONFIG_USE_CCACHE),y) + CCACHE_DIR=$(CCACHE_DIR) ccache -s +else + @echo "ccache is not enabled. Set SONIC_CONFIG_USE_CCACHE=y in rules/config.user" +endif + +ccache-clear : + rm -rf $(TARGET_PATH)/ccache + @echo "ccache cleared" + +.PHONY : ccache-stats ccache-clear + +.PHONY : $(SONIC_CLEAN_DEBS) $(SONIC_CLEAN_FILES) $(SONIC_CLEAN_PHONIES) $(SONIC_CLEAN_TARGETS) $(SONIC_CLEAN_STDEB_DEBS) $(SONIC_CLEAN_WHEELS) $(SONIC_PHONY_TARGETS) clean distclean configure build-report .INTERMEDIATE : $(SONIC_INSTALL_DEBS) $(SONIC_INSTALL_WHEELS) $(DOCKER_LOAD_TARGETS) docker-start .platform ## To build some commonly used libs. Some submodules depend on these libs. ## It is used in component pipelines. For example: swss needs libnl, libyang -lib-packages: $(addprefix $(DEBS_PATH)/,$(LIBNL3) $(LIBYANG) $(LIBYANG3) $(PROTOBUF) $(LIB_SONIC_DASH_API)) + +lib-packages: $(addprefix $(DEBS_PATH)/,$(LIBNL3) $(LIBYANG3) $(LIBYANG3_PY3) $(PROTOBUF) $(LIB_SONIC_DASH_API) $(LIBFIB)) diff --git a/sonic-slave-bookworm/Dockerfile.j2 b/sonic-slave-bookworm/Dockerfile.j2 index 647e7b4ce0f..64a1b3ed4e0 100644 --- a/sonic-slave-bookworm/Dockerfile.j2 +++ b/sonic-slave-bookworm/Dockerfile.j2 @@ -21,12 +21,20 @@ FROM {{ prefix }}debian:bookworm MAINTAINER gulv@microsoft.com -COPY ["no-check-valid-until", "/etc/apt/apt.conf.d/"] +COPY ["files/apt/apt.conf.d/no-check-valid-until", "/etc/apt/apt.conf.d/"] +COPY ["files/apt/apt.conf.d/apt-timeout-n-retries", "/etc/apt/apt.conf.d/"] {%- if CROSS_BUILD_ENVIRON != "y" %} COPY ["sources.list.{{ CONFIGURED_ARCH }}", "/etc/apt/sources.list"] {%- else %} COPY ["sources.list.amd64", "/etc/apt/sources.list"] +{%- endif %} + +# Install certificates by disabling the peer verification +RUN apt -o Acquire::https::Verify-Peer=false update && \ + apt -o Acquire::https::Verify-Peer=false install -y ca-certificates + +{%- if CROSS_BUILD_ENVIRON == "y" %} {%- if CONFIGURED_ARCH == "armhf" %} ARG arch=armhf ARG gcc_arch=arm-linux-gnueabihf @@ -92,6 +100,7 @@ RUN apt-get update && apt-get install -y eatmydata && eatmydata apt-get install pigz \ git \ build-essential \ + ccache \ remake \ libtool \ lintian \ @@ -141,10 +150,10 @@ RUN apt-get update && apt-get install -y eatmydata && eatmydata apt-get install chrpath \ # For frr build libc-ares-dev \ - libsnmp-dev \ libjson-c-dev \ libsystemd-dev \ libcmocka-dev \ + libgoogle-perftools-dev \ libprotobuf-c-dev \ protobuf-c-compiler \ #{%- if CROSS_BUILD_ENVIRON != "y" %} @@ -344,7 +353,6 @@ RUN apt-get update && apt-get install -y eatmydata && eatmydata apt-get install dosfstools \ qemu-kvm \ libvirt-clients \ - python3-pexpect \ # For rasdaemon build libsqlite3-dev \ libgettextpo-dev \ @@ -445,7 +453,6 @@ RUN apt-get update && apt-get install -y eatmydata && eatmydata apt-get install pciutils \ dh-dkms \ rpm2cpio \ - libsnmp-dev \ libpopt-dev \ libfuse-dev \ {%- if CONFIGURED_ARCH == "arm64" %} @@ -497,9 +504,11 @@ RUN eatmydata apt-get install -y \ {%- if CONFIGURED_ARCH == "amd64" %} # Upgrade CMAKE version -RUN wget https://github.com/Kitware/CMake/releases/download/v3.27.6/cmake-3.27.6-linux-x86_64.sh -RUN chmod +x cmake-3.27.6-linux-x86_64.sh -RUN sudo ./cmake-3.27.6-linux-x86_64.sh --skip-license --prefix=/usr +RUN wget -O cmake-3.27.6-linux-x86_64.sh https://github.com/Kitware/CMake/releases/download/v3.27.6/cmake-3.27.6-linux-x86_64.sh \ + && echo "8c449dabb2b2563ec4e6d5e0fb0ae09e729680efab71527b59015131cea4a042 cmake-3.27.6-linux-x86_64.sh" | sha256sum -c - \ + && chmod +x cmake-3.27.6-linux-x86_64.sh \ + && sudo ./cmake-3.27.6-linux-x86_64.sh --skip-license --prefix=/usr \ + && rm cmake-3.27.6-linux-x86_64.sh RUN sudo apt-get update -y {%- endif %} @@ -534,8 +543,8 @@ RUN eatmydata apt-get install -y kernel-wedge # For gobgp and telemetry build RUN eatmydata apt-get install -y golang {%- if INCLUDE_FIPS == "y" %} -RUN wget -O golang-go.deb 'https://packages.trafficmanager.net/public/fips/bookworm/{{ FIPS_VERSION }}/{{ CONFIGURED_ARCH }}/golang-1.19-go_{{ FIPS_GOLANG_VERSION }}_{{ CONFIGURED_ARCH }}.deb' \ - && wget -O golang-src.deb 'https://packages.trafficmanager.net/public/fips/bookworm/{{ FIPS_VERSION }}/{{ CONFIGURED_ARCH }}/golang-1.19-src_{{ FIPS_GOLANG_VERSION }}_all.deb' \ +RUN wget -O golang-go.deb '{{ BUILD_PUBLIC_URL }}/fips/bookworm/{{ FIPS_VERSION }}/{{ CONFIGURED_ARCH }}/golang-1.19-go_{{ FIPS_GOLANG_VERSION }}_{{ CONFIGURED_ARCH }}.deb' \ + && wget -O golang-src.deb '{{ BUILD_PUBLIC_URL }}/fips/bookworm/{{ FIPS_VERSION }}/{{ CONFIGURED_ARCH }}/golang-1.19-src_{{ FIPS_GOLANG_VERSION }}_all.deb' \ && eatmydata dpkg -i golang-go.deb golang-src.deb \ && ln -sf /usr/lib/go-1.19 /usr/local/go \ && rm golang-go.deb golang-src.deb @@ -561,7 +570,9 @@ RUN patch -p1 -i /disable-non-manylinux.patch /usr/local/lib/python3.11/dist-pac RUN pip3 install fastentrypoints mock # For DASH BMv2 -RUN pip3 install jsonpath_ng +# Exclude jsonpath_ng 1.8.0 because it causes DASH pipeline failures +# In version 1.8.0, dict is flattened to a list, which causes type error in DASH. +RUN pip3 install jsonpath_ng!=1.8.0 RUN pip3 install pyyaml-include # For building sonic_ycabled @@ -573,7 +584,7 @@ RUN pip3 install pytest-runner==5.2 RUN pip3 install mockredispy==2.9.3 RUN pip3 install pyfakefs -RUN pip3 install pillow==10.0.0 +RUN pip3 install pillow==10.0.1 # For p4 build RUN pip3 install \ @@ -618,6 +629,9 @@ RUN eatmydata apt-get install -y vim # Install rsyslog RUN eatmydata apt-get install -y rsyslog +# # For sonic vs image build +RUN pip3 install pexpect + {%- if CROSS_BUILD_ENVIRON == "y" %} RUN cd /usr/src/gtest && CXX=$CROSS_CXX CC=$CROSS_CC cmake . && make -C /usr/src/gtest {%- else %} @@ -761,9 +775,17 @@ RUN eatmydata apt install -y python-is-python3 # Install Bazel build system (amd64 and arm64 architectures are supported using this method) # TODO(PINS): Remove once pre-build Bazel binaries are available for armhf (armv7l) +{%- if CONFIGURED_ARCH == "amd64" %} +ARG bazelisk_url=https://github.com/bazelbuild/bazelisk/releases/download/v1.28.1/bazelisk-linux-amd64 +ARG bazelisk_sha256=22e7d3a188699982f661cf4687137ee52d1f24fec1ec893d91a6c4d791a75de8 +{%- elif CONFIGURED_ARCH == "arm64" %} +ARG bazelisk_url=https://github.com/bazelbuild/bazelisk/releases/download/v1.28.1/bazelisk-linux-arm64 +ARG bazelisk_sha256=8ded44b58a0d9425a4178af26cf17693feac3b87bdcfef0a2a0898fcd1afc9f2 +{%- endif %} {%- if CONFIGURED_ARCH == "amd64" or CONFIGURED_ARCH == "arm64" %} -ARG bazelisk_url=https://github.com/bazelbuild/bazelisk/releases/latest/download/bazelisk-linux-{{ CONFIGURED_ARCH }} -RUN curl -fsSL -o /usr/local/bin/bazel ${bazelisk_url} && chmod 755 /usr/local/bin/bazel +RUN curl -fsSL -o /usr/local/bin/bazel ${bazelisk_url} \ + && echo "${bazelisk_sha256} /usr/local/bin/bazel" | sha256sum -c - \ + && chmod 755 /usr/local/bin/bazel {% endif -%} # Install Rust @@ -779,7 +801,36 @@ ENV RUSTUP_HOME $RUST_ROOT ENV PATH $PATH:$RUST_ROOT/bin # Install cargo-tarpaulin for code coverage -RUN $RUST_ROOT/bin/cargo install --locked cargo-tarpaulin +# Pin version to avoid dependency conflicts with Rust 1.86.0 +# (cargo-tarpaulin v0.35.2 pulled in gimli 0.33.0 which needs Rust 1.88+) +RUN $RUST_ROOT/bin/cargo install --locked cargo-tarpaulin@0.35.1 + +# Install cargo-auditable so every `cargo build` embeds the resolved +# Cargo.lock into the produced binary's .dep-v0 ELF section. Syft reads +# that section at SBOM scan time, giving SONiC SBOMs full per-crate +# visibility for Rust packages without source-tree changes to any +# debian/rules file. Pinned for reproducibility. CARGO_HOME=$RUST_ROOT +# ensures the binary lands at /usr/.cargo/bin/cargo-auditable (in PATH +# for all users) rather than /root/.cargo/bin/ (root-only). +RUN CARGO_HOME=$RUST_ROOT $RUST_ROOT/bin/cargo install --locked cargo-auditable@0.6.4 + +# rust-audit-info is the official CLI for reading the .dep-v0 section +# that cargo-auditable embedded. scripts/sbom_fragment.py invokes it +# on every ELF binary inside each SONiC-built .deb to recover the +# resolved Rust crate set that shipped in that .deb, then emits each +# crate as a CycloneDX component with sonic:source_deb= +# linking it back to the owning artifact. Same install pattern as +# cargo-auditable so the binary lands at /usr/.cargo/bin/rust-audit-info. +RUN CARGO_HOME=$RUST_ROOT $RUST_ROOT/bin/cargo install --locked rust-audit-info@0.5.4 + +# /usr/local/bin/cargo is a transparent shim that routes `cargo build` +# through `cargo auditable` (other subcommands pass through). Single +# source of truth: files/build/cargo-wrapper; staged into the slave's +# buildinfo/ directory by scripts/prepare_docker_buildinfo.sh. The +# shim must sit ahead of $RUST_ROOT/bin in PATH, which the default +# /usr/local/bin already does. +COPY buildinfo/cargo-wrapper /usr/local/bin/cargo +RUN chmod 0755 /usr/local/bin/cargo {# Include vendor-defined rules for slave container if it exists. Contained in ../files #} {% with DEBIAN_VERSION='bookworm' %} diff --git a/sonic-slave-bookworm/no-check-valid-until b/sonic-slave-bookworm/no-check-valid-until deleted file mode 100644 index c7c25d017f7..00000000000 --- a/sonic-slave-bookworm/no-check-valid-until +++ /dev/null @@ -1,4 +0,0 @@ -# Instruct apt-get to NOT check the "Valid Until" date in Release files -# Once the Debian team archives a repo, they stop updating this date - -Acquire::Check-Valid-Until "false"; diff --git a/sonic-slave-bullseye/Dockerfile.j2 b/sonic-slave-bullseye/Dockerfile.j2 index acef2aa01ff..0822aea2091 100644 --- a/sonic-slave-bullseye/Dockerfile.j2 +++ b/sonic-slave-bullseye/Dockerfile.j2 @@ -21,8 +21,8 @@ FROM {{ prefix }}debian:bullseye MAINTAINER gulv@microsoft.com -COPY ["no-check-valid-until", "/etc/apt/apt.conf.d/"] -COPY ["apt-retries-count", "/etc/apt/apt.conf.d"] +COPY ["files/apt/apt.conf.d/no-check-valid-until", "/etc/apt/apt.conf.d/"] +COPY ["files/apt/apt.conf.d/apt-timeout-n-retries", "/etc/apt/apt.conf.d/"] {%- if CROSS_BUILD_ENVIRON != "y" %} COPY ["sources.list.{{ CONFIGURED_ARCH }}", "/etc/apt/sources.list"] @@ -722,6 +722,33 @@ RUN mkdir -p /.cargo && $RUST_ROOT/bin/rustup target add aarch64-unknown-linux-g ENV RUSTUP_HOME $RUST_ROOT ENV PATH $PATH:$RUST_ROOT/bin +# Install cargo-auditable so every `cargo build` embeds the resolved +# Cargo.lock into the produced binary's .dep-v0 ELF section. Syft reads +# that section at SBOM scan time, giving SONiC SBOMs full per-crate +# visibility for Rust packages without source-tree changes to any +# debian/rules file. Pinned for reproducibility. CARGO_HOME=$RUST_ROOT +# ensures the binary lands at /usr/.cargo/bin/cargo-auditable (in PATH +# for all users) rather than /root/.cargo/bin/ (root-only). +RUN CARGO_HOME=$RUST_ROOT $RUST_ROOT/bin/cargo install --locked cargo-auditable@0.6.4 + +# rust-audit-info is the official CLI for reading the .dep-v0 section +# that cargo-auditable embedded. scripts/sbom_fragment.py invokes it +# on every ELF binary inside each SONiC-built .deb to recover the +# resolved Rust crate set that shipped in that .deb, then emits each +# crate as a CycloneDX component with sonic:source_deb= +# linking it back to the owning artifact. Same install pattern as +# cargo-auditable so the binary lands at /usr/.cargo/bin/rust-audit-info. +RUN CARGO_HOME=$RUST_ROOT $RUST_ROOT/bin/cargo install --locked rust-audit-info@0.5.4 + +# /usr/local/bin/cargo is a transparent shim that routes `cargo build` +# through `cargo auditable` (other subcommands pass through). Single +# source of truth: files/build/cargo-wrapper; staged into the slave's +# buildinfo/ directory by scripts/prepare_docker_buildinfo.sh. The +# shim must sit ahead of $RUST_ROOT/bin in PATH, which the default +# /usr/local/bin already does. +COPY buildinfo/cargo-wrapper /usr/local/bin/cargo +RUN chmod 0755 /usr/local/bin/cargo + {# Include vendor-defined rules for slave container if it exists. Contained in ../files #} {% with DEBIAN_VERSION='bullseye' %} {% include 'files/sonic-slave-Dockerfile.vendor.j2' ignore missing %} diff --git a/sonic-slave-buster/Dockerfile.j2 b/sonic-slave-buster/Dockerfile.j2 index 3acd9be01ab..ffec6e64cfe 100644 --- a/sonic-slave-buster/Dockerfile.j2 +++ b/sonic-slave-buster/Dockerfile.j2 @@ -20,8 +20,8 @@ FROM {{ prefix }}debian:buster MAINTAINER gulv@microsoft.com -COPY ["no-check-valid-until", "/etc/apt/apt.conf.d/"] -COPY ["apt-retries-count", "/etc/apt/apt.conf.d"] +COPY ["files/apt/apt.conf.d/no-check-valid-until", "/etc/apt/apt.conf.d/"] +COPY ["files/apt/apt.conf.d/apt-timeout-n-retries", "/etc/apt/apt.conf.d/"] {%- if CROSS_BUILD_ENVIRON != "y" %} COPY ["sources.list.{{ CONFIGURED_ARCH }}", "/etc/apt/sources.list"] @@ -688,6 +688,33 @@ RUN mkdir -p /.cargo && $RUST_ROOT/bin/rustup target add aarch64-unknown-linux-g ENV RUSTUP_HOME $RUST_ROOT ENV PATH $PATH:$RUST_ROOT/bin +# Install cargo-auditable so every `cargo build` embeds the resolved +# Cargo.lock into the produced binary's .dep-v0 ELF section. Syft reads +# that section at SBOM scan time, giving SONiC SBOMs full per-crate +# visibility for Rust packages without source-tree changes to any +# debian/rules file. Pinned for reproducibility. CARGO_HOME=$RUST_ROOT +# ensures the binary lands at /usr/.cargo/bin/cargo-auditable (in PATH +# for all users) rather than /root/.cargo/bin/ (root-only). +RUN CARGO_HOME=$RUST_ROOT $RUST_ROOT/bin/cargo install --locked cargo-auditable@0.6.4 + +# rust-audit-info is the official CLI for reading the .dep-v0 section +# that cargo-auditable embedded. scripts/sbom_fragment.py invokes it +# on every ELF binary inside each SONiC-built .deb to recover the +# resolved Rust crate set that shipped in that .deb, then emits each +# crate as a CycloneDX component with sonic:source_deb= +# linking it back to the owning artifact. Same install pattern as +# cargo-auditable so the binary lands at /usr/.cargo/bin/rust-audit-info. +RUN CARGO_HOME=$RUST_ROOT $RUST_ROOT/bin/cargo install --locked rust-audit-info@0.5.4 + +# /usr/local/bin/cargo is a transparent shim that routes `cargo build` +# through `cargo auditable` (other subcommands pass through). Single +# source of truth: files/build/cargo-wrapper; staged into the slave's +# buildinfo/ directory by scripts/prepare_docker_buildinfo.sh. The +# shim must sit ahead of $RUST_ROOT/bin in PATH, which the default +# /usr/local/bin already does. +COPY buildinfo/cargo-wrapper /usr/local/bin/cargo +RUN chmod 0755 /usr/local/bin/cargo + {# Include vendor-defined rules for slave container if it exists. Contained in ../files #} {% with DEBIAN_VERSION='buster' %} {% include 'files/sonic-slave-Dockerfile.vendor.j2' ignore missing %} diff --git a/sonic-slave-trixie/Dockerfile.j2 b/sonic-slave-trixie/Dockerfile.j2 index 99b0f6dd7d9..72f49705ec2 100644 --- a/sonic-slave-trixie/Dockerfile.j2 +++ b/sonic-slave-trixie/Dockerfile.j2 @@ -21,12 +21,20 @@ FROM {{ prefix }}debian:trixie MAINTAINER gulv@microsoft.com -COPY ["no-check-valid-until", "/etc/apt/apt.conf.d/"] +COPY ["files/apt/apt.conf.d/no-check-valid-until", "/etc/apt/apt.conf.d/"] +COPY ["files/apt/apt.conf.d/apt-timeout-n-retries", "/etc/apt/apt.conf.d/"] {%- if CROSS_BUILD_ENVIRON != "y" %} COPY ["sources.list.{{ CONFIGURED_ARCH }}", "/etc/apt/sources.list"] {%- else %} COPY ["sources.list.amd64", "/etc/apt/sources.list"] +{%- endif %} + +# Install certificates by disabling the peer verification +RUN apt -o Acquire::https::Verify-Peer=false update && \ + apt -o Acquire::https::Verify-Peer=false install -y ca-certificates + +{%- if CROSS_BUILD_ENVIRON == "y" %} {%- if CONFIGURED_ARCH == "armhf" %} ARG arch=armhf ARG gcc_arch=arm-linux-gnueabihf @@ -68,14 +76,14 @@ RUN pip3 install virtualenv RUN mkdir /python_virtualenv RUN cd /python_virtualenv && python3 -m virtualenv --copies -p /usr/bin/python3 env3 -RUN PATH=/python_virtualenv/env3/bin/:$PATH pip3 install setuptools==75.8.0 setuptools-scm==8.2.1 wheel==0.45.1 fastentrypoints pytest pytest-cov pytest-runner==5.2 nose==1.3.7 mockredispy==2.9.3 mock==3.0.5 PyYAML==6.0.2 redis==3.5.3 pexpect==4.8.0 Pympler==0.8 parameterized natsort==6.2.1 MarkupSafe==2.0.1 Jinja2==3.0.3 click tabulate netaddr netifaces pyroute2 pyfakefs sphinx && ln -s /python_virtualenv/env3/bin/pytest /python_virtualenv/env3/bin/pytest-3"," +RUN PATH=/python_virtualenv/env3/bin/:$PATH pip3 install setuptools==75.8.0 setuptools-scm==8.2.1 setuptools-scm-git-archive==1.4.1 wheel==0.45.1 fastentrypoints pytest pytest-cov pytest-runner==5.2 nose==1.3.7 mockredispy==2.9.3 mock==3.0.5 PyYAML==6.0.2 redis==3.5.3 pexpect==4.8.0 Pympler==0.8 parameterized natsort==6.2.1 MarkupSafe==2.0.1 Jinja2==3.0.3 click tabulate netaddr netifaces pyroute2 pyfakefs sphinx && ln -s /python_virtualenv/env3/bin/pytest /python_virtualenv/env3/bin/pytest-3"," RUN eatmydata apt-get --fix-broken install -y RUN LIBPYTHON3_DEPS="`apt-cache depends libpython3-dev:$arch |grep Depends|awk {'print \$2;'}|tr "\n" " "`" && apt-get install -y libpython2.7-dev:$arch $LIBPYTHON3_DEPS libxml2-dev:$arch libxslt-dev:$arch libssl-dev:$arch libz-dev:$arch RUN eatmydata apt-get install -y swig libssl-dev RUN PATH=/python_virtualenv/env3/bin/:$PATH python3 -m pip install pyang==2.4.0 -RUN PATH=/python_virtualenv/env3/bin/:$PATH python3 -m pip install pyangbind==0.8.2 +RUN PATH=/python_virtualenv/env3/bin/:$PATH python3 -m pip install pyangbind==0.8.7 RUN PATH=/python_virtualenv/env3/bin/:$PATH python3 -m pip uninstall -y enum34 RUN PATH=/python_virtualenv/env3/bin/:$PATH pip3 install --force-reinstall --no-cache-dir coverage {%- endif %} @@ -91,6 +99,7 @@ RUN apt-get update && apt-get install -y eatmydata && eatmydata apt-get install pigz \ git \ build-essential \ + ccache \ remake \ libtool \ lintian \ @@ -122,6 +131,7 @@ RUN apt-get update && apt-get install -y eatmydata && eatmydata apt-get install cron \ debootstrap \ e2fsprogs \ + gdisk \ # For sonic-swss-common nlohmann-json3-dev \ libhiredis-dev \ @@ -144,6 +154,7 @@ RUN apt-get update && apt-get install -y eatmydata && eatmydata apt-get install libjson-c-dev \ libsystemd-dev \ libcmocka-dev \ + libgoogle-perftools-dev \ libprotobuf-c-dev \ protobuf-c-compiler \ #{%- if CROSS_BUILD_ENVIRON != "y" %} @@ -312,10 +323,12 @@ RUN apt-get update && apt-get install -y eatmydata && eatmydata apt-get install autoconf-archive \ # For iproute2 cm-super-minimal \ + dh-package-notes \ libatm1-dev \ libbpf-dev \ libelf-dev \ libmnl-dev \ + libnsl-dev \ libselinux1-dev \ linuxdoc-tools \ lynx \ @@ -385,6 +398,10 @@ RUN apt-get update && apt-get install -y eatmydata && eatmydata apt-get install libcjson-dev \ python3-yaml \ python3-parameterized \ +# For sonic redfish + python3-inflection \ + python3-mako \ + systemd-dev \ # For WPA supplication qtbase5-dev \ aspell-en \ @@ -504,8 +521,6 @@ RUN eatmydata apt-get install -y \ libprotoc-dev \ protobuf-compiler-grpc \ valgrind \ - python3-protobuf \ - python3-grpcio \ thrift-compiler \ gfortran \ libopenmpi-dev \ @@ -554,8 +569,8 @@ RUN eatmydata apt-get install -y kernel-wedge # For gobgp and telemetry build RUN eatmydata apt-get install -y golang golang-go {%- if INCLUDE_FIPS == "y" %} -RUN wget -O golang-go.deb 'https://packages.trafficmanager.net/public/fips/trixie/{{ FIPS_VERSION }}/{{ CONFIGURED_ARCH }}/golang-{{ FIPS_GOLANG_MAIN_VERSION }}-go_{{ FIPS_GOLANG_VERSION }}_{{ CONFIGURED_ARCH }}.deb' \ - && wget -O golang-src.deb 'https://packages.trafficmanager.net/public/fips/trixie/{{ FIPS_VERSION }}/{{ CONFIGURED_ARCH }}/golang-{{ FIPS_GOLANG_MAIN_VERSION }}-src_{{ FIPS_GOLANG_VERSION }}_all.deb' \ +RUN wget -O golang-go.deb '{{ BUILD_PUBLIC_URL }}/fips/trixie/{{ FIPS_VERSION }}/{{ CONFIGURED_ARCH }}/golang-{{ FIPS_GOLANG_MAIN_VERSION }}-go_{{ FIPS_GOLANG_VERSION }}_{{ CONFIGURED_ARCH }}.deb' \ + && wget -O golang-src.deb '{{ BUILD_PUBLIC_URL }}/fips/trixie/{{ FIPS_VERSION }}/{{ CONFIGURED_ARCH }}/golang-{{ FIPS_GOLANG_MAIN_VERSION }}-src_{{ FIPS_GOLANG_VERSION }}_all.deb' \ && eatmydata dpkg -i golang-go.deb golang-src.deb \ && ln -sf /usr/lib/go-{{ FIPS_GOLANG_MAIN_VERSION }} /usr/local/go \ && rm golang-go.deb golang-src.deb @@ -568,7 +583,9 @@ RUN eatmydata apt-get install -y golang-go \ RUN pip3 install fastentrypoints mock # For DASH BMv2 -RUN pip3 install jsonpath_ng pyyaml-include +# Exclude jsonpath_ng 1.8.0 because it causes DASH pipeline failures +# In version 1.8.0, dict is flattened to a list, which causes type error in DASH. +RUN pip3 install jsonpath_ng!=1.8.0 pyyaml-include # For building sonic_ycabled # Note: Match version in trixie @@ -586,11 +603,13 @@ RUN pip3 install \ ctypesgen==1.0.2 \ crc16 -# For sonic config engine testing -# Install pyangbind here, outside sonic-config-engine dependencies, as pyangbind causes enum34 to be installed. -# enum34 causes Python 're' package to not work properly as it redefines an incompatible enum.py module -# https://github.com/robshakir/pyangbind/issues/232 -RUN pip3 install pyangbind==0.8.2 +# For nvidia-bluefield sdk +# ctypeslib2 declares `clang>=11`, which pip resolves to the latest PyPI +# `clang` (21.x today). Those bindings call libclang-21 symbols +# and break against Debian's libclang-19 +RUN pip3 install ctypeslib2 clang==19.1.7 + +RUN pip3 install pyangbind==0.8.7 RUN pip3 uninstall -y enum34 # For sonic-platform-common testing @@ -607,10 +626,9 @@ RUN pip3 install pyang==2.4.0 # For mgmt-framework build RUN pip3 install mmh3==2.5.1 -# For ptf-py3 0.10.0 -#RUN pip3 install setuptools==75.8.0 setuptools-scm==8.2.1 setuptools-scm-git-archive==1.4.1 -# remove - setuptools-scm-git-archive - setuptools-scm 8 [1] and redundant starting with setuptools-scm 7 [2] -RUN pip3 install setuptools==75.8.0 setuptools-scm==8.2.1 +# PEP 517 wheels (e.g. src/ptf-py3): slave.mk runs "python -m build -n" without isolation, so [build-system] +# requires must be present on the host interpreter (pip install . alone uses an isolated build env). +RUN pip3 install setuptools==75.8.0 setuptools-scm==8.2.1 setuptools-scm-git-archive==1.4.1 wheel RUN eatmydata apt-get install -y xsltproc @@ -633,7 +651,7 @@ RUN cd /usr/src/gtest && cmake . && make -C /usr/src/gtest #RUN mkdir /var/run/sshd EXPOSE 22 -# Install docker engine 24 inside docker and enable experimental feature +# Install docker engine 28 inside docker and enable experimental feature RUN apt-get update RUN eatmydata apt-get install -y \ apt-transport-https \ @@ -645,15 +663,12 @@ RUN eatmydata apt-get install -y \ {%- endif %} RUN curl -fsSL https://download.docker.com/linux/debian/gpg | tee /etc/apt/trusted.gpg.d/docker-stable.asc COPY docker.sources /etc/apt/sources.list.d/docker.sources -# TODO(trixie) - Migrate to trixie docker packages -#RUN echo "Suites: $(lsb_release -cs)" >> /etc/apt/sources.list.d/docker.sources -# Install docker packages from bookworm -RUN echo "Suites: bookworm" >> /etc/apt/sources.list.d/docker.sources +RUN echo "Suites: $(lsb_release -cs)" >> /etc/apt/sources.list.d/docker.sources {%- if CROSS_BUILD_ENVIRON != "y" %} RUN echo "Architectures: {{ CONFIGURED_ARCH }}" >> /etc/apt/sources.list.d/docker.sources {%- endif %} RUN apt-get update -RUN eatmydata apt-get install -y docker-ce=5:24.0.2-1~debian.12~bookworm docker-ce-cli=5:24.0.2-1~debian.12~bookworm containerd.io=1.6.21-1 docker-buildx-plugin=0.10.5-1~debian.12~bookworm docker-compose-plugin=2.18.1-1~debian.12~bookworm +RUN eatmydata apt-get install -y docker-ce=5:28.5.2-1~debian.13~trixie docker-ce-cli=5:28.5.2-1~debian.13~trixie containerd.io=1.7.28-2~debian.13~trixie docker-buildx-plugin=0.26.1-1~debian.13~trixie docker-compose-plugin=2.39.1-1~debian.13~trixie RUN echo "DOCKER_OPTS=\"--experimental --storage-driver=vfs {{ DOCKER_EXTRA_OPTS }}\"" >> /etc/default/docker RUN update-alternatives --set iptables /usr/sbin/iptables-legacy @@ -784,7 +799,36 @@ ENV RUSTUP_HOME=$RUST_ROOT ENV PATH=$PATH:$RUST_ROOT/bin # Install cargo-tarpaulin for code coverage -RUN $RUST_ROOT/bin/cargo install --locked cargo-tarpaulin +# Pin version to avoid dependency conflicts with Rust 1.86.0 +# (cargo-tarpaulin v0.35.2 pulled in gimli 0.33.0 which needs Rust 1.88+) +RUN $RUST_ROOT/bin/cargo install --locked cargo-tarpaulin@0.35.1 + +# Install cargo-auditable so every `cargo build` embeds the resolved +# Cargo.lock into the produced binary's .dep-v0 ELF section. Syft reads +# that section at SBOM scan time, giving SONiC SBOMs full per-crate +# visibility for Rust packages without source-tree changes to any +# debian/rules file. Pinned for reproducibility. CARGO_HOME=$RUST_ROOT +# ensures the binary lands at /usr/.cargo/bin/cargo-auditable (in PATH +# for all users) rather than /root/.cargo/bin/ (root-only). +RUN CARGO_HOME=$RUST_ROOT $RUST_ROOT/bin/cargo install --locked cargo-auditable@0.6.4 + +# rust-audit-info is the official CLI for reading the .dep-v0 section +# that cargo-auditable embedded. scripts/sbom_fragment.py invokes it +# on every ELF binary inside each SONiC-built .deb to recover the +# resolved Rust crate set that shipped in that .deb, then emits each +# crate as a CycloneDX component with sonic:source_deb= +# linking it back to the owning artifact. Same install pattern as +# cargo-auditable so the binary lands at /usr/.cargo/bin/rust-audit-info. +RUN CARGO_HOME=$RUST_ROOT $RUST_ROOT/bin/cargo install --locked rust-audit-info@0.5.4 + +# /usr/local/bin/cargo is a transparent shim that routes `cargo build` +# through `cargo auditable` (other subcommands pass through). Single +# source of truth: files/build/cargo-wrapper; staged into the slave's +# buildinfo/ directory by scripts/prepare_docker_buildinfo.sh. The +# shim must sit ahead of $RUST_ROOT/bin in PATH, which the default +# /usr/local/bin already does. +COPY buildinfo/cargo-wrapper /usr/local/bin/cargo +RUN chmod 0755 /usr/local/bin/cargo {# Include vendor-defined rules for slave container if it exists. Contained in ../files #} {% with DEBIAN_VERSION='trixie' %} diff --git a/sonic-slave-trixie/no-check-valid-until b/sonic-slave-trixie/no-check-valid-until deleted file mode 100644 index c7c25d017f7..00000000000 --- a/sonic-slave-trixie/no-check-valid-until +++ /dev/null @@ -1,4 +0,0 @@ -# Instruct apt-get to NOT check the "Valid Until" date in Release files -# Once the Debian team archives a repo, they stop updating this date - -Acquire::Check-Valid-Until "false"; diff --git a/src/dhcpmon b/src/dhcpmon index d78974ffabb..782a6abca42 160000 --- a/src/dhcpmon +++ b/src/dhcpmon @@ -1 +1 @@ -Subproject commit d78974ffabb5e8ad0466b8e721a74033f1f53f98 +Subproject commit 782a6abca42dc9d4e11b54339740eacf8887f023 diff --git a/src/dhcprelay b/src/dhcprelay index 8987cbb750c..c8ce9855cf5 160000 --- a/src/dhcprelay +++ b/src/dhcprelay @@ -1 +1 @@ -Subproject commit 8987cbb750c04bce79dc8514c56aa1fbeee3e8b4 +Subproject commit c8ce9855cf572e80d6bf3adecbde7a7b32f425b6 diff --git a/src/iccpd/include/system.h b/src/iccpd/include/system.h index 5e050af99f0..7106b925d7c 100644 --- a/src/iccpd/include/system.h +++ b/src/iccpd/include/system.h @@ -46,6 +46,7 @@ #define WARM_REBOOT 1 #define MCLAG_ERROR -1 +#define MCLAG_ERROR_INVALID_TLV -2 struct CSM; diff --git a/src/iccpd/src/mlacp_fsm.c b/src/iccpd/src/mlacp_fsm.c index a8e32e6c26c..c161c9bec5c 100644 --- a/src/iccpd/src/mlacp_fsm.c +++ b/src/iccpd/src/mlacp_fsm.c @@ -575,8 +575,30 @@ static void mlacp_sync_recv_syncReq(struct CSM* csm, struct Msg* msg) static void mlacp_sync_recv_portChanInfo(struct CSM* csm, struct Msg* msg) { mLACPPortChannelInfoTLV* portconf = NULL; + size_t tlv_len; + int count; portconf = (mLACPPortChannelInfoTLV*)&(msg->buf[sizeof(ICCHdr)]); + + /* Validate that msg is large enough to hold the TLV header */ + if (msg->len < sizeof(ICCHdr) + sizeof(mLACPPortChannelInfoTLV)) + { + ICCPD_LOG_WARN(__FUNCTION__, "Received PortChannel Info TLV too short for header: %zu", msg->len); + return; + } + + /* Validate num_of_vlan_id against actual message length */ + count = ntohs(portconf->num_of_vlan_id); + tlv_len = sizeof(ICCHdr) + sizeof(mLACPPortChannelInfoTLV) + + (size_t)count * sizeof(struct mLACPVLANData); + if (tlv_len > msg->len) + { + ICCPD_LOG_WARN(__FUNCTION__, + "PortChannel Info num_of_vlan_id %d exceeds msg len %zu, dropping", + count, msg->len); + return; + } + if (mlacp_fsm_update_port_channel_info(csm, portconf) == MCLAG_ERROR) { mlacp_sync_send_nak_handler(csm, msg); @@ -607,8 +629,30 @@ static void mlacp_sync_recv_peerLlinkInfo(struct CSM* csm, struct Msg* msg) static void mlacp_sync_recv_macInfo(struct CSM* csm, struct Msg* msg) { struct mLACPMACInfoTLV* mac_info = NULL; + size_t tlv_len; + int count; mac_info = (struct mLACPMACInfoTLV *)&(msg->buf[sizeof(ICCHdr)]); + + /* Validate that msg is large enough to hold the TLV header */ + if (msg->len < sizeof(ICCHdr) + sizeof(struct mLACPMACInfoTLV)) + { + ICCPD_LOG_WARN(__FUNCTION__, "Received MAC Info TLV too short for header: %zu", msg->len); + return; + } + + /* Validate num_of_entry against actual message length */ + count = ntohs(mac_info->num_of_entry); + tlv_len = sizeof(ICCHdr) + sizeof(struct mLACPMACInfoTLV) + + (size_t)count * sizeof(struct mLACPMACData); + if (tlv_len > msg->len) + { + ICCPD_LOG_WARN(__FUNCTION__, + "MAC Info num_of_entry %d exceeds msg len %zu, dropping", + count, msg->len); + return; + } + mlacp_fsm_update_mac_info_from_peer(csm, mac_info); MLACP_SET_ICCP_RX_DBG_COUNTER(csm, mac_info->icc_parameter.type, ICCP_DBG_CNTR_STS_OK); @@ -619,8 +663,30 @@ static void mlacp_sync_recv_macInfo(struct CSM* csm, struct Msg* msg) static void mlacp_sync_recv_arpInfo(struct CSM* csm, struct Msg* msg) { struct mLACPARPInfoTLV* arp_info = NULL; + size_t tlv_len; + int count; arp_info = (struct mLACPARPInfoTLV *)&(msg->buf[sizeof(ICCHdr)]); + + /* Validate that msg is large enough to hold the TLV header */ + if (msg->len < sizeof(ICCHdr) + sizeof(struct mLACPARPInfoTLV)) + { + ICCPD_LOG_WARN(__FUNCTION__, "Received ARP Info TLV too short for header: %zu", msg->len); + return; + } + + /* Validate num_of_entry against actual message length */ + count = ntohs(arp_info->num_of_entry); + tlv_len = sizeof(ICCHdr) + sizeof(struct mLACPARPInfoTLV) + + (size_t)count * sizeof(struct ARPMsg); + if (tlv_len > msg->len) + { + ICCPD_LOG_WARN(__FUNCTION__, + "ARP Info num_of_entry %d exceeds msg len %zu, dropping", + count, msg->len); + return; + } + mlacp_fsm_update_arp_info(csm, arp_info); MLACP_SET_ICCP_RX_DBG_COUNTER(csm, arp_info->icc_parameter.type, ICCP_DBG_CNTR_STS_OK); @@ -631,8 +697,30 @@ static void mlacp_sync_recv_arpInfo(struct CSM* csm, struct Msg* msg) static void mlacp_sync_recv_ndiscInfo(struct CSM *csm, struct Msg *msg) { struct mLACPNDISCInfoTLV *ndisc_info = NULL; + size_t tlv_len; + int count; ndisc_info = (struct mLACPNDISCInfoTLV *)&(msg->buf[sizeof(ICCHdr)]); + + /* Validate that msg is large enough to hold the TLV header */ + if (msg->len < sizeof(ICCHdr) + sizeof(struct mLACPNDISCInfoTLV)) + { + ICCPD_LOG_WARN(__FUNCTION__, "Received NDISC Info TLV too short for header: %zu", msg->len); + return; + } + + /* Validate num_of_entry against actual message length */ + count = ntohs(ndisc_info->num_of_entry); + tlv_len = sizeof(ICCHdr) + sizeof(struct mLACPNDISCInfoTLV) + + (size_t)count * sizeof(struct NDISCMsg); + if (tlv_len > msg->len) + { + ICCPD_LOG_WARN(__FUNCTION__, + "NDISC Info num_of_entry %d exceeds msg len %zu, dropping", + count, msg->len); + return; + } + mlacp_fsm_update_ndisc_info(csm, ndisc_info); return; diff --git a/src/iccpd/src/mlacp_sync_update.c b/src/iccpd/src/mlacp_sync_update.c index be2c75d12e5..d9a0740228e 100644 --- a/src/iccpd/src/mlacp_sync_update.c +++ b/src/iccpd/src/mlacp_sync_update.c @@ -904,18 +904,24 @@ int mlacp_fsm_update_arp_entry(struct CSM* csm, struct ARPMsg *arp_entry) int mlacp_fsm_update_arp_info(struct CSM* csm, struct mLACPARPInfoTLV* tlv) { - int count = 0; + uint16_t count = 0; int i; if (!csm || !tlv) return MCLAG_ERROR; + count = ntohs(tlv->num_of_entry); + /* Validate num_of_entry against TLV length to prevent OOB heap read */ + if (ntohs(tlv->icc_parameter.len) < sizeof(tlv->num_of_entry) + count * sizeof(struct ARPMsg)) + return MCLAG_ERROR_INVALID_TLV; ICCPD_LOG_DEBUG(__FUNCTION__, "Received ARP Info count %d ", count ); for (i = 0; i < count; i++) { mlacp_fsm_update_arp_entry(csm, &(tlv->ArpEntry[i])); } + + return 0; } /***************************************** @@ -1226,18 +1232,24 @@ int mlacp_fsm_update_ndisc_entry(struct CSM *csm, struct NDISCMsg *ndisc_entry) int mlacp_fsm_update_ndisc_info(struct CSM *csm, struct mLACPNDISCInfoTLV *tlv) { - int count = 0; + uint16_t count = 0; int i; if (!csm || !tlv) return MCLAG_ERROR; + count = ntohs(tlv->num_of_entry); + /* Validate num_of_entry against TLV length to prevent OOB heap read */ + if (ntohs(tlv->icc_parameter.len) < sizeof(tlv->num_of_entry) + count * sizeof(struct NDISCMsg)) + return MCLAG_ERROR_INVALID_TLV; ICCPD_LOG_INFO(__FUNCTION__, "Received NDISC Info count %d ", count); for (i = 0; i < count; i++) { mlacp_fsm_update_ndisc_entry(csm, &(tlv->NdiscEntry[i])); } + + return 0; } /***************************************** diff --git a/src/ifupdown2/Makefile b/src/ifupdown2/Makefile index 77008afb9ac..48f486ea23f 100644 --- a/src/ifupdown2/Makefile +++ b/src/ifupdown2/Makefile @@ -4,12 +4,14 @@ SHELL = /bin/bash MAIN_TARGET = $(IFUPDOWN2) + $(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : # Remove any stale files rm -rf ./ifupdown2-$(IFUPDOWN2_VERSION) ./$(IFUPDOWN2_VERSION).tar.gz # Get ifupdown2 release - wget --no-check-certificate https://github.com/CumulusNetworks/ifupdown2/archive/$(IFUPDOWN2_VERSION).tar.gz + wget -O $(IFUPDOWN2_VERSION).tar.gz https://github.com/CumulusNetworks/ifupdown2/archive/$(IFUPDOWN2_VERSION).tar.gz + echo "$(IFUPDOWN2_SHA256) $(IFUPDOWN2_VERSION).tar.gz" | sha256sum -c - tar -z -f $(IFUPDOWN2_VERSION).tar.gz -x pushd ./ifupdown2-$(IFUPDOWN2_VERSION) diff --git a/src/ifupdown2/patch/0004-Ensure-etc-iproute2-rt_tables.d-directory-present-fo.patch b/src/ifupdown2/patch/0004-Ensure-etc-iproute2-rt_tables.d-directory-present-fo.patch new file mode 100644 index 00000000000..700808c10c3 --- /dev/null +++ b/src/ifupdown2/patch/0004-Ensure-etc-iproute2-rt_tables.d-directory-present-fo.patch @@ -0,0 +1,66 @@ +From a4277348dfb973d042fd8b7125607b572e9a4855 Mon Sep 17 00:00:00 2001 +From: Ravi Minnikanti +Date: Mon, 2 Feb 2026 20:06:38 +0530 +Subject: [PATCH] Ensure /etc/iproute2/rt_tables.d/ directory present for vrf + map conf + +Older versions of iproute2 package created /etc/iproute2/rt_tables.d +directory because of which ifupdown2_vrf_map.conf generation succeeded. + +New version of iproute2 (6.15.0-1) in trixie doesn't create +/etc/iproute2, because of this vrf map conf generation failing, inturn +resulting in mgmt VRF creation failure + +Fix is to ensure /etc/iproute2/rt_tables.d directory present before +generating ifupdown2_vrf_map.conf + +Signed-off-by: Ravi Minnikanti +--- + ifupdown2/addons/vrf.py | 10 ++++++++++ + 1 file changed, 10 insertions(+) + +diff --git a/ifupdown2/addons/vrf.py b/ifupdown2/addons/vrf.py +index 206c118..83bba50 100644 +--- a/ifupdown2/addons/vrf.py ++++ b/ifupdown2/addons/vrf.py +@@ -272,6 +272,13 @@ class vrf(Addon, moduleBase): + 'map (%s)\n' %errstr) + self.warn_on_vrf_map_write_err = False + ++ def _ensure_iproute2_vrf_dir(self): ++ """Ensure the iproute2 VRF map directory exists""" ++ vrf_dir = os.path.dirname(self.iproute2_vrf_filename) ++ if not os.path.exists(vrf_dir): ++ os.makedirs(vrf_dir, exist_ok=True) ++ self.logger.info('vrf: created directory %s' % vrf_dir) ++ + def _iproute2_vrf_map_sync_to_disk(self): + if (ifupdownflags.flags.DRYRUN or + not self.iproute2_vrf_map_sync_to_disk): +@@ -279,6 +286,7 @@ class vrf(Addon, moduleBase): + self.logger.info('vrf: syncing table map to %s' + %self.iproute2_vrf_filename) + try: ++ self._ensure_iproute2_vrf_dir() + with open(self.iproute2_vrf_filename, 'w') as f: + f.write(self.iproute2_vrf_filehdr %(self.vrf_table_id_start, + self.vrf_table_id_end)) +@@ -294,6 +302,7 @@ class vrf(Addon, moduleBase): + %self.iproute2_vrf_filename) + if ifupdownflags.flags.DRYRUN: + return ++ self._ensure_iproute2_vrf_dir() + fmode = 'a+' if append else 'w' + if not append: + # write file header +@@ -365,6 +374,7 @@ class vrf(Addon, moduleBase): + old_vrf_name = self.iproute2_vrf_map.get(int(table_id)) + if not old_vrf_name: + self.iproute2_vrf_map[int(table_id)] = vrfifaceobj.name ++ self._ensure_iproute2_vrf_dir() + with open(self.iproute2_vrf_filename, "a+") as vrf_map_fd: + vrf_map_fd.write('%s %s\n' + % (table_id, vrfifaceobj.name)) +-- +2.25.1 + diff --git a/src/ifupdown2/patch/series b/src/ifupdown2/patch/series index abd04eb50b2..64b760a7a3a 100644 --- a/src/ifupdown2/patch/series +++ b/src/ifupdown2/patch/series @@ -2,3 +2,4 @@ 0002-disable-checks-when-using-no-wait.patch 0003-Fix-the-return-value-of-utils._execute_subprocess-me.patch bug-296-python-3.12-compability.patch +0004-Ensure-etc-iproute2-rt_tables.d-directory-present-fo.patch diff --git a/src/initramfs-tools/Makefile b/src/initramfs-tools/Makefile index 4800c161604..4bb7eda0bbb 100644 --- a/src/initramfs-tools/Makefile +++ b/src/initramfs-tools/Makefile @@ -5,16 +5,23 @@ SHELL = /bin/bash MAIN_TARGET = initramfs-tools_$(INITRAMFS_TOOLS_VERSION)_all.deb DERIVED_TARGETS = initramfs-tools-core_$(INITRAMFS_TOOLS_VERSION)_all.deb -INITRAMFS_TOOLS_REVISION = v$(INITRAMFS_TOOLS_VERSION) +# Use a pinned tarball instead of git clone for reliability and speed. +# Tarball works here because quilt (used for patches) doesn't need git history. +# SHA256 ensures integrity and reproducibility. +INITRAMFS_TOOLS_TARBALL_URL = https://salsa.debian.org/kernel-team/initramfs-tools/-/archive/v$(INITRAMFS_TOOLS_VERSION)/initramfs-tools-v$(INITRAMFS_TOOLS_VERSION).tar.gz +INITRAMFS_TOOLS_TARBALL_SHA256 = 27a78cc25acc3ca3d9c78deca165bf001b09b260ce25a3f3756e47a0e7bc0554 $(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : - # Obtaining the initramfs-tools + # Obtaining the initramfs-tools from pinned tarball rm -rf ./initramfs-tools - git clone https://salsa.debian.org/kernel-team/initramfs-tools.git ./initramfs-tools + wget -q -O initramfs-tools.tar.gz "$(INITRAMFS_TOOLS_TARBALL_URL)" + echo "$(INITRAMFS_TOOLS_TARBALL_SHA256) initramfs-tools.tar.gz" | sha256sum -c - + tar xzf initramfs-tools.tar.gz + mv initramfs-tools-v$(INITRAMFS_TOOLS_VERSION) initramfs-tools + rm -f initramfs-tools.tar.gz # Patch pushd ./initramfs-tools - git checkout $(INITRAMFS_TOOLS_REVISION) QUILT_PATCHES=.. quilt push -a # Build the package diff --git a/src/iproute2/Makefile b/src/iproute2/Makefile new file mode 100644 index 00000000000..80670cba931 --- /dev/null +++ b/src/iproute2/Makefile @@ -0,0 +1,40 @@ +.ONESHELL: +SHELL = /bin/bash +.SHELLFLAGS += -e + +MAIN_TARGET = $(IPROUTE2) +DERIVED_TARGETS = $(IPROUTE2_DBG) + +$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : + # Build from Debian source packaging, using the distro-specific iproute2 version. + rm -rf ./iproute2-$(IPROUTE2_VERSION_BASE) + dget -u https://deb.debian.org/debian/pool/main/i/iproute2/iproute2_$(IPROUTE2_DEBIAN_VERSION).dsc + pushd ./iproute2-$(IPROUTE2_VERSION_BASE) + + # Create a git repository here for stg to apply patches. + git init + git add -f * + git commit -qm "initial commit" + + # Apply SONiC patches in explicit series order. + if grep -q '[^[:space:]]' ../patch/series; then + stg init + stg import -s ../patch/series + fi + + # Bump the Debian package version so the locally-built package wins over distro iproute2. + sed -i "1s/($(IPROUTE2_DEBIAN_VERSION))/($(IPROUTE2_VERSION_FULL))/" debian/changelog + +ifeq ($(CROSS_BUILD_ENVIRON), y) + dpkg-buildpackage -rfakeroot -b -us -uc -a$(CONFIGURED_ARCH) -Pcross,nocheck -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $(SONIC_DPKG_ADMINDIR) +else + dpkg-buildpackage -rfakeroot -b -us -uc -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $(SONIC_DPKG_ADMINDIR) +endif + popd + + mv $* $(DEST)/ + for deb in $(DERIVED_TARGETS); do \ + [ ! -f "$$deb" ] || mv "$$deb" $(DEST)/; \ + done + +$(addprefix $(DEST)/, $(DERIVED_TARGETS)): $(DEST)/% : $(DEST)/$(MAIN_TARGET) diff --git a/src/iproute2/patch/0001-bridge-fdb-Add-protocol-field-support.patch b/src/iproute2/patch/0001-bridge-fdb-Add-protocol-field-support.patch new file mode 100644 index 00000000000..498299d8938 --- /dev/null +++ b/src/iproute2/patch/0001-bridge-fdb-Add-protocol-field-support.patch @@ -0,0 +1,116 @@ +From 7c377b63f81be3750b04ba7bde84631fea897d79 Mon Sep 17 00:00:00 2001 +From: Tamer Ahmed +Date: Tue, 5 May 2026 17:53:09 +0000 +Subject: [PATCH] bridge:fdb: Add protocol field support for EVPN Multihoming + +Add optional protocol field for bridge fdb entries to distinguish +between MAC addresses learned via the control plane (e.g. ZEBRA) and +those learned via the data plane (e.g. HW) in EVPN Multihoming scenarios. + +Signed-off-by: Mrinmoy Ghosh +Co-authored-by: Mike Mallin +Co-authored-by: Patrice Brissette +Signed-off-by: Tamer Ahmed +--- + bridge/fdb.c | 24 ++++++++++++++++++++++++ + etc/iproute2/rt_protos | 1 + + include/uapi/linux/rtnetlink.h | 1 + + lib/rt_names.c | 1 + + 4 files changed, 27 insertions(+) + +diff --git a/bridge/fdb.c b/bridge/fdb.c +index 7b44436..2f6cd87 100644 +--- a/bridge/fdb.c ++++ b/bridge/fdb.c +@@ -41,6 +41,7 @@ static void usage(void) + " [ sticky ] [ local | static | dynamic ] [ vlan VID ]\n" + " { [ dst IPADDR ] [ port PORT] [ vni VNI ] | [ nhid NHID ] }\n" + " [ via DEV ] [ src_vni VNI ]\n" ++ "\t [ proto PROTO ]\n" + " bridge fdb [ show [ br BRDEV ] [ brport DEV ] [ vlan VID ]\n" + " [ state STATE ] [ dynamic ] ]\n" + " bridge fdb get [ to ] LLADDR [ br BRDEV ] { brport | dev } DEV\n" +@@ -283,6 +284,15 @@ int print_fdb(struct nlmsghdr *n, void *arg) + print_string(PRINT_ANY, "master", "master %s ", + ll_index_to_name(rta_getattr_u32(tb[NDA_MASTER]))); + ++ if (tb[NDA_PROTOCOL]) { ++ __u8 proto = rta_getattr_u8(tb[NDA_PROTOCOL]); ++ if (proto != RTPROT_UNSPEC) { ++ SPRINT_BUF(b1); ++ print_string(PRINT_ANY, "protocol", "proto %s ", ++ rtnl_rtprot_n2a(proto, b1, sizeof(b1))); ++ } ++ } ++ + print_string(PRINT_ANY, "state", "%s\n", + state_n2a(r->ndm_state)); + close_json_object(); +@@ -424,6 +434,7 @@ static int fdb_modify(int cmd, int flags, int argc, char **argv) + char *endptr; + short vid = -1; + __u32 nhid = 0; ++ __u8 proto = RTPROT_UNSPEC; + + while (argc > 0) { + if (strcmp(*argv, "dev") == 0) { +@@ -495,6 +506,16 @@ static int fdb_modify(int cmd, int flags, int argc, char **argv) + req.ndm.ndm_flags |= NTF_EXT_LEARNED; + } else if (matches(*argv, "sticky") == 0) { + req.ndm.ndm_flags |= NTF_STICKY; ++ } else if (matches(*argv, "proto") == 0 || ++ matches(*argv, "protocol") == 0) { ++ __u32 proto_id; ++ ++ NEXT_ARG(); ++ if (rtnl_rtprot_a2n(&proto_id, *argv)) ++ invarg("invalid protocol value", *argv); ++ if (proto_id > 255) ++ invarg("protocol value must fit in 8 bits", *argv); ++ proto = proto_id; + } else { + if (strcmp(*argv, "to") == 0) + NEXT_ARG(); +@@ -555,6 +576,9 @@ static int fdb_modify(int cmd, int flags, int argc, char **argv) + if (via) + addattr32(&req.n, sizeof(req), NDA_IFINDEX, via); + ++ if (proto != RTPROT_UNSPEC) ++ addattr8(&req.n, sizeof(req), NDA_PROTOCOL, proto); ++ + req.ndm.ndm_ifindex = ll_name_to_index(d); + if (!req.ndm.ndm_ifindex) + return nodev(d); +diff --git a/etc/iproute2/rt_protos b/etc/iproute2/rt_protos +index 48ab974..7ec06e1 100644 +--- a/etc/iproute2/rt_protos ++++ b/etc/iproute2/rt_protos +@@ -24,3 +24,4 @@ + 188 ospf + 189 rip + 192 eigrp ++193 hw +diff --git a/include/uapi/linux/rtnetlink.h b/include/uapi/linux/rtnetlink.h +index 085bb13..1ff9dbe 100644 +--- a/include/uapi/linux/rtnetlink.h ++++ b/include/uapi/linux/rtnetlink.h +@@ -314,6 +314,7 @@ enum { + #define RTPROT_OSPF 188 /* OSPF Routes */ + #define RTPROT_RIP 189 /* RIP Routes */ + #define RTPROT_EIGRP 192 /* EIGRP Routes */ ++#define RTPROT_HW 193 /* HW Generated Routes */ + + /* rtm_scope + +diff --git a/lib/rt_names.c b/lib/rt_names.c +index 7dc194b..b9bc1b5 100644 +--- a/lib/rt_names.c ++++ b/lib/rt_names.c +@@ -148,6 +148,7 @@ static char *rtnl_rtprot_tab[256] = { + [RTPROT_OSPF] = "ospf", + [RTPROT_RIP] = "rip", + [RTPROT_EIGRP] = "eigrp", ++ [RTPROT_HW] = "hw", + }; + + struct tabhash { diff --git a/src/iproute2/patch/series b/src/iproute2/patch/series new file mode 100644 index 00000000000..d4eb25c922a --- /dev/null +++ b/src/iproute2/patch/series @@ -0,0 +1 @@ +0001-bridge-fdb-Add-protocol-field-support.patch diff --git a/src/ixgbe/Makefile b/src/ixgbe/Makefile index 436a4b85c74..753445b9dc3 100644 --- a/src/ixgbe/Makefile +++ b/src/ixgbe/Makefile @@ -6,7 +6,7 @@ MAIN_TARGET = ixgbe.ko $(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : rm -rf ./ixgbe-$(IXGBE_DRIVER_VERSION) - wget -O ixgbe-$(IXGBE_DRIVER_VERSION).tar.gz "https://packages.trafficmanager.net/public/ixgbe-5.2.4.tar.gz" + wget -O ixgbe-$(IXGBE_DRIVER_VERSION).tar.gz "$(BUILD_PUBLIC_URL)/ixgbe-5.2.4.tar.gz" tar xzf ixgbe-$(IXGBE_DRIVER_VERSION).tar.gz # Patch diff --git a/src/kdump-tools/patch/0005-Generate-initrd-for-kdump-on-build-time.patch b/src/kdump-tools/patch/0005-Generate-initrd-for-kdump-on-build-time.patch new file mode 100644 index 00000000000..9777b7c393c --- /dev/null +++ b/src/kdump-tools/patch/0005-Generate-initrd-for-kdump-on-build-time.patch @@ -0,0 +1,47 @@ +From b625c34307f243c8ea0b61a84916574b268148a6 Mon Sep 17 00:00:00 2001 +From: Boyang Yu +Date: Wed, 11 Mar 2026 22:43:17 +0000 +Subject: [PATCH] Generate initrd for kdump on build time + +Before the change, kdump-tools generates initrd in the first time +of booting, which affects the down time of warm upgrade. It takes +23 seconds in the example below: +systemctl status kdump-tools +Mar 10 21:52:32 sonic kdump-tools[922]: kdump-tools: Generating +/var/lib/kdump/initrd.img-6.12.41+deb13-sonic-amd64 +Mar 10 21:52:55 sonic kdump-tools[906]: Creating symlink +/var/lib/kdump/initrd.img. + +MODULES=dep was the main cause for generating the initrd in +booting, but MODULES=dep is not used by SONiC. + +Make changes for generating initrd at build time + - Remove the existing code for "Executing in a chroot, skipping + initramfs generation" + - Copy latest_sysctls-$kernel_release to the image; it is used to + determine if initrd needs to be re-generated at booting +--- + debian/kernel-postinst-generate-initrd | 7 ------- + 1 file changed, 7 deletions(-) + +diff --git a/debian/kernel-postinst-generate-initrd b/debian/kernel-postinst-generate-initrd +index 809edb7..182cdc6 100755 +--- a/debian/kernel-postinst-generate-initrd ++++ b/debian/kernel-postinst-generate-initrd +@@ -21,13 +21,6 @@ if [ "${INITRD-}" = 'No' ]; then + exit 0 + fi + +-# initramfs generation may fail, or include an inappropriate set of kernel +-# modules in a chroot. Leave it to the target system to handle on reboot +-if [ -x "$(command -v ischroot)" ] && ischroot; then +- echo "W: kdump-tools: Executing in a chroot, skipping initramfs generation." >&2 +- exit 0; +-fi +- + # avoid running multiple times + if [ -n "${DEB_MAINT_PARAMS-}" ]; then + eval set -- "$DEB_MAINT_PARAMS" +-- +2.51.0 + diff --git a/src/kdump-tools/patch/series b/src/kdump-tools/patch/series index 369545368bc..2e6f0115afd 100644 --- a/src/kdump-tools/patch/series +++ b/src/kdump-tools/patch/series @@ -1,3 +1,4 @@ 0002-core-file-prefixed-by-kdump.patch 0003-Revert-the-MODULES-dep-optimization.patch 0004-disable-kdump-load-check.patch +0005-Generate-initrd-for-kdump-on-build-time.patch diff --git a/src/libpcre3/.gitignore b/src/libpcre3/.gitignore deleted file mode 100644 index f652ee345a4..00000000000 --- a/src/libpcre3/.gitignore +++ /dev/null @@ -1,2 +0,0 @@ -pcre3-*/ -pcre3_* diff --git a/src/libpcre3/Makefile b/src/libpcre3/Makefile deleted file mode 100644 index 80b35299ff8..00000000000 --- a/src/libpcre3/Makefile +++ /dev/null @@ -1,23 +0,0 @@ -.ONESHELL: -SHELL = /bin/bash -.SHELLFLAGS += -e - -MAIN_TARGET = $(LIBPCRE3) -DERIVED_TARGETS = $(LIBPCRE3_DEV) $(LIBPCRE16_3) $(LIBPCRE32_3) $(LIBPCRECPP0V5) $(LIBPCRE3_DBG) - -$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : - # Obtaining pcre3 - rm -fr ./pcre3-$(LIBPCRE3_VERSION) - dget https://packages.trafficmanager.net/public/debian/pool/main/p/pcre3_$(LIBPCRE3_VERSION)-$(LIBPCRE3_SUBVERSION).dsc - pushd pcre3-$(LIBPCRE3_VERSION) - -ifeq ($(CROSS_BUILD_ENVIRON), y) - DPKG_GENSYMBOLS_CHECK_LEVEL=0 dpkg-buildpackage -rfakeroot -b -us -uc -a$(CONFIGURED_ARCH) -Pcross,nocheck -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $(SONIC_DPKG_ADMINDIR) -else - DPKG_GENSYMBOLS_CHECK_LEVEL=0 dpkg-buildpackage -rfakeroot -b -us -uc -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $(SONIC_DPKG_ADMINDIR) -endif - popd - - mv $(DERIVED_TARGETS) $* $(DEST)/ - -$(addprefix $(DEST)/, $(DERIVED_TARGETS)): $(DEST)/% : $(DEST)/$(MAIN_TARGET) diff --git a/src/libraries/sonic-fib/.gitignore b/src/libraries/sonic-fib/.gitignore new file mode 100644 index 00000000000..531c2fa7294 --- /dev/null +++ b/src/libraries/sonic-fib/.gitignore @@ -0,0 +1,52 @@ +# Compiled Source # +################### +*.la +*.lo +*.o +*.swp +*.gcda +*.gcno +*.gcov +*.deb + + + +# Packaging Files # +################### +debian/.debhelper/ +debian/autoreconf.after +debian/autoreconf.before +debian/debhelper-build-stamp +debian/files +debian/*.debhelper.log +debian/*.substvars +debian/tmp/ + +aclocal.m4 +autom4te.cache/ +config +config.h +config.h.in +config.h.in~ +config.log +config.status +configure +libtool +m4/libtool.m4 +m4/ltoptions.m4 +m4/ltsugar.m4 +m4/ltversion.m4 +m4/lt~obsolete.m4 +Makefile.in +stamp-h1 +.dirstamp +**/.deps/ +**/.libs/ +**/Makefile + +# Executables # +############### +tests/tests + +# Bazel Build System # +/bazel-* diff --git a/src/libraries/sonic-fib/Makefile.am b/src/libraries/sonic-fib/Makefile.am new file mode 100644 index 00000000000..f7cc81dd04d --- /dev/null +++ b/src/libraries/sonic-fib/Makefile.am @@ -0,0 +1,18 @@ +lib_LTLIBRARIES = +bin_PROGRAMS = + +if DEBUG +DBGFLAGS = -ggdb -DDEBUG -gdwarf-5 +else +DBGFLAGS = -g -DNDEBUG +endif + +CLEANFILES = + +include src/Makefile.am +include tests/Makefile.am + +ACLOCAL_AMFLAGS = -I m4 + + +EXTRA_DIST += scripts/render_schema.py diff --git a/src/libraries/sonic-fib/README.md b/src/libraries/sonic-fib/README.md new file mode 100644 index 00000000000..7ab579015f2 --- /dev/null +++ b/src/libraries/sonic-fib/README.md @@ -0,0 +1,25 @@ +# sonic-fib + +## Cheating Sheet +### 1. Clean stale build artifacts +make distclean 2>/dev/null || true +rm -rf autom4te.cache config.log config.status + +### 2. Regenerate build system (critical after Makefile.am changes) +autoreconf -fiv + +### 3. Reconfigure +./configure + +### 4. Build (includes tests) +make -j$(nproc) + +### 5. Run tests (uses pre-built binary) +``` +make check +make check V=1 # Verbose output +``` + +Note: +1. Step 1 and Step 2 are used for installing test_drivers. Use the following command to check ls -la config/test-driver +2. test log is at tests/tests.log diff --git a/src/libraries/sonic-fib/autogen.sh b/src/libraries/sonic-fib/autogen.sh new file mode 100755 index 00000000000..c8d0bbe4a25 --- /dev/null +++ b/src/libraries/sonic-fib/autogen.sh @@ -0,0 +1,6 @@ +#!/bin/bash + +libtoolize --force --copy && +autoreconf --force --install -I m4 +rm -Rf autom4te.cache + diff --git a/src/libraries/sonic-fib/configure.ac b/src/libraries/sonic-fib/configure.ac new file mode 100644 index 00000000000..43d572cf021 --- /dev/null +++ b/src/libraries/sonic-fib/configure.ac @@ -0,0 +1,82 @@ +AC_INIT([fib],[1.0.0]) +AC_CONFIG_SRCDIR([]) +AC_CONFIG_AUX_DIR(config) +AM_CONFIG_HEADER(config.h) +AC_CONFIG_MACRO_DIR([m4]) +AM_INIT_AUTOMAKE([foreign subdir-objects parallel-tests]) +AC_LANG_C +AC_LANG([C++]) +AC_PROG_CC +AC_PROG_CXX +AC_PROG_LIBTOOL +AC_HEADER_STDC +AM_PATH_PYTHON +AM_PATH_PYTHON3 +AX_ADD_AM_MACRO_STATIC([]) + +AC_ARG_ENABLE(debug, +[ --enable-debug Compile with debugging flags], +[case "${enableval}" in + yes) debug=true ;; + no) debug=false ;; + *) AC_MSG_ERROR(bad value ${enableval} for --enable-debug) ;; +esac],[debug=false]) +AM_CONDITIONAL(DEBUG, test x$debug = xtrue) +if test x$CONFIGURED_ARCH = xarmhf && test x$CROSS_BUILD_ENVIRON = xy; then + AM_CONDITIONAL(ARCH64, false) +else + AM_CONDITIONAL(ARCH64, test `getconf LONG_BIT` = "64") +fi + + +CFLAGS_COMMON="" +CFLAGS_COMMON+=" -ansi" +CFLAGS_COMMON+=" -fPIC" +CFLAGS_COMMON+=" -std=c++14" +CFLAGS_COMMON+=" -Wall" +CFLAGS_COMMON+=" -Wcast-align" +CFLAGS_COMMON+=" -Wcast-qual" +CFLAGS_COMMON+=" -Wconversion" +CFLAGS_COMMON+=" -Wdisabled-optimization" +CFLAGS_COMMON+=" -Werror" +CFLAGS_COMMON+=" -Wextra" +CFLAGS_COMMON+=" -Wfloat-equal" +CFLAGS_COMMON+=" -Wformat=2" +CFLAGS_COMMON+=" -Wformat-nonliteral" +CFLAGS_COMMON+=" -Wformat-security" +CFLAGS_COMMON+=" -Wformat-y2k" +CFLAGS_COMMON+=" -Wimport" +CFLAGS_COMMON+=" -Winit-self" +CFLAGS_COMMON+=" -Winvalid-pch" +CFLAGS_COMMON+=" -Wlong-long" +CFLAGS_COMMON+=" -Wmissing-field-initializers" +CFLAGS_COMMON+=" -Wmissing-format-attribute" +CFLAGS_COMMON+=" -Wmissing-include-dirs" +CFLAGS_COMMON+=" -Wmissing-noreturn" +CFLAGS_COMMON+=" -Wno-aggregate-return" +CFLAGS_COMMON+=" -Wno-padded" +CFLAGS_COMMON+=" -Wno-switch-enum" +CFLAGS_COMMON+=" -Wno-unused-parameter" +CFLAGS_COMMON+=" -Wpacked" +CFLAGS_COMMON+=" -Wpointer-arith" +CFLAGS_COMMON+=" -Wredundant-decls" +CFLAGS_COMMON+=" -Wshadow" +CFLAGS_COMMON+=" -Wstack-protector" +CFLAGS_COMMON+=" -Wstrict-aliasing=3" +CFLAGS_COMMON+=" -Wswitch" +CFLAGS_COMMON+=" -Wswitch-default" +CFLAGS_COMMON+=" -Wunreachable-code" +CFLAGS_COMMON+=" -Wunused" +CFLAGS_COMMON+=" -Wvariadic-macros" +CFLAGS_COMMON+=" -Wno-write-strings" +CFLAGS_COMMON+=" -Wno-missing-format-attribute" +CFLAGS_COMMON+=" -Wno-long-long" +CFLAGS_COMMON+=" -fstack-protector-strong" + +AC_SUBST(CFLAGS_COMMON) + +AC_CONFIG_FILES([ + Makefile +]) + +AC_OUTPUT diff --git a/src/libraries/sonic-fib/debian/changelog b/src/libraries/sonic-fib/debian/changelog new file mode 100644 index 00000000000..83e568e4437 --- /dev/null +++ b/src/libraries/sonic-fib/debian/changelog @@ -0,0 +1,5 @@ +sonic-fib (1.0.0) stable; urgency=medium + + * Initial release. + + diff --git a/src/libraries/sonic-fib/debian/compat b/src/libraries/sonic-fib/debian/compat new file mode 100644 index 00000000000..48082f72f08 --- /dev/null +++ b/src/libraries/sonic-fib/debian/compat @@ -0,0 +1 @@ +12 diff --git a/src/libraries/sonic-fib/debian/control b/src/libraries/sonic-fib/debian/control new file mode 100644 index 00000000000..58dc0dcce87 --- /dev/null +++ b/src/libraries/sonic-fib/debian/control @@ -0,0 +1,24 @@ +Source: sonic-fib +Section: libs +Maintainer: Eddie Ruan +Priority: optional +Build-Depends: debhelper (>= 12), + autotools-dev, + python3, + nlohmann-json3-dev, + libgtest-dev, + libgmock-dev +Standards-Version: 1.0.0 + +Package: libnexthopgroup +Architecture: any +Depends: ${shlibs:Depends}, ${misc:Pre-Depends} +Section: libs +Description: NextHopGroup serialization library for SONiC FIB This library provides JSON-based serialization for NextHopGroup data structures used between FRR (zebra) and fpmsyncd. + +Package: libnexthopgroup-dev +Architecture: any +Depends: libnexthopgroup (= ${binary:Version}), nlohmann-json3-dev, ${misc:Depends} +Section: libdevel +Description: This package contains development files for nexthopgroup + diff --git a/src/libraries/sonic-fib/debian/libnexthopgroup-dev.dirs b/src/libraries/sonic-fib/debian/libnexthopgroup-dev.dirs new file mode 100644 index 00000000000..740ffa13508 --- /dev/null +++ b/src/libraries/sonic-fib/debian/libnexthopgroup-dev.dirs @@ -0,0 +1,2 @@ +usr/lib +usr/include/nexthopgroup diff --git a/src/libraries/sonic-fib/debian/libnexthopgroup-dev.install b/src/libraries/sonic-fib/debian/libnexthopgroup-dev.install new file mode 100644 index 00000000000..a0bb1dcc4b7 --- /dev/null +++ b/src/libraries/sonic-fib/debian/libnexthopgroup-dev.install @@ -0,0 +1,3 @@ +usr/include/nexthopgroup/ +usr/include/nexthopgroup/c-api/ +usr/lib/*/libnexthopgroup.so diff --git a/src/libraries/sonic-fib/debian/libnexthopgroup.dirs b/src/libraries/sonic-fib/debian/libnexthopgroup.dirs new file mode 100644 index 00000000000..68457717bd8 --- /dev/null +++ b/src/libraries/sonic-fib/debian/libnexthopgroup.dirs @@ -0,0 +1 @@ +usr/lib diff --git a/src/libraries/sonic-fib/debian/libnexthopgroup.install b/src/libraries/sonic-fib/debian/libnexthopgroup.install new file mode 100644 index 00000000000..8ad0c1d9f42 --- /dev/null +++ b/src/libraries/sonic-fib/debian/libnexthopgroup.install @@ -0,0 +1,2 @@ +usr/lib/*/libnexthopgroup.so.* + diff --git a/src/libraries/sonic-fib/debian/rules b/src/libraries/sonic-fib/debian/rules new file mode 100755 index 00000000000..b3fe6142377 --- /dev/null +++ b/src/libraries/sonic-fib/debian/rules @@ -0,0 +1,19 @@ +#!/usr/bin/make -f + +# Enable security hardening +export DEB_BUILD_MAINT_OPTIONS = hardening=+all + +# Import default build flags (CFLAGS, LDFLAGS, etc.) +DPKG_EXPORT_BUILDFLAGS = 1 +include /usr/share/dpkg/default.mk + +# Configure arguments: disable static lib, enable shared +export CONFIGURE_ARGS = --disable-static --enable-shared + +# Use autoreconf to ensure configure is up to date +%: + dh $@ --with autoreconf + +# Optional: override configure if you need extra flags later +override_dh_auto_configure: + dh_auto_configure -- $(CONFIGURE_ARGS) diff --git a/src/libraries/sonic-fib/m4/python3.m4 b/src/libraries/sonic-fib/m4/python3.m4 new file mode 100644 index 00000000000..f1cd6079aba --- /dev/null +++ b/src/libraries/sonic-fib/m4/python3.m4 @@ -0,0 +1,195 @@ +## ------------------------ -*- Autoconf -*- +## Python 3 file handling, adapted from: +## Python file handling +## From Andrew Dalke +## Updated by James Henstridge +## ------------------------ +# Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2008, 2009 +# Free Software Foundation, Inc. +# +# This file is free software; the Free Software Foundation +# gives unlimited permission to copy and/or distribute it, +# with or without modifications, as long as this notice is preserved. + +# AM_PATH_PYTHON3([MINIMUM-VERSION], [ACTION-IF-FOUND], [ACTION-IF-NOT-FOUND]) +# --------------------------------------------------------------------------- +# Adds support for distributing Python modules and packages. To +# install modules, copy them to $(pythondir), using the python_PYTHON +# automake variable. To install a package with the same name as the +# automake package, install to $(pkgpythondir), or use the +# pkgpython_PYTHON automake variable. +# +# The variables $(pyexecdir) and $(pkgpyexecdir) are provided as +# locations to install python extension modules (shared libraries). +# Another macro is required to find the appropriate flags to compile +# extension modules. +# +# If your package is configured with a different prefix to python, +# users will have to add the install directory to the PYTHONPATH +# environment variable, or create a .pth file (see the python +# documentation for details). +# +# If the MINIMUM-VERSION argument is passed, AM_PATH_PYTHON will +# cause an error if the version of python installed on the system +# doesn't meet the requirement. MINIMUM-VERSION should consist of +# numbers and dots only. +AC_DEFUN([AM_PATH_PYTHON3], + [ + dnl Find a Python 3 interpreter + m4_define_default([_AM_PYTHON3_INTERPRETER_LIST], + [python3 python3.0 python3.1]) + + m4_if([$1],[],[ + dnl No version check is needed. + # Find any Python 3 interpreter. + if test -z "$PYTHON3"; then + AC_PATH_PROGS([PYTHON3], _AM_PYTHON3_INTERPRETER_LIST, :) + fi + am_display_PYTHON3=python3 + ], [ + dnl A version check is needed. + if test -n "$PYTHON3"; then + # If the user set $PYTHON3, use it and don't search something else. + AC_MSG_CHECKING([whether $PYTHON3 version >= $1]) + AM_PYTHON3_CHECK_VERSION([$PYTHON3], [$1], + [AC_MSG_RESULT(yes)], + [AC_MSG_ERROR(too old)]) + am_display_PYTHON3=$PYTHON3 + else + # Otherwise, try each interpreter until we find one that satisfies + # VERSION. + AC_CACHE_CHECK([for a Python3 interpreter with version >= $1], + [am_cv_pathless_PYTHON3],[ + for am_cv_pathless_PYTHON3 in _AM_PYTHON3_INTERPRETER_LIST none; do + test "$am_cv_pathless_PYTHON3" = none && break + AM_PYTHON3_CHECK_VERSION([$am_cv_pathless_PYTHON3], [$1], [break]) + done]) + # Set $PYTHON3 to the absolute path of $am_cv_pathless_PYTHON3. + if test "$am_cv_pathless_PYTHON3" = none; then + PYTHON3=: + else + AC_PATH_PROG([PYTHON3], [$am_cv_pathless_PYTHON3]) + fi + am_display_PYTHON3=$am_cv_pathless_PYTHON3 + fi + ]) + + if test "$PYTHON3" = :; then + dnl Run any user-specified action, or abort. + m4_default([$3], [AC_MSG_ERROR([no suitable Python3 interpreter found])]) + else + + dnl Query Python3 for its version number. Getting [:3] seems to be + dnl the best way to do this; it's what "site.py" does in the standard + dnl library. + + AC_CACHE_CHECK([for $am_display_PYTHON3 version], [am_cv_python3_version], + [am_cv_python3_version=`$PYTHON3 -c "import sys; print ('%u.%u' % sys.version_info[[:2]])"`]) + AC_SUBST([PYTHON3_VERSION], [$am_cv_python3_version]) + + dnl Use the values of $prefix and $exec_prefix for the corresponding + dnl values of PYTHON3_PREFIX and PYTHON3_EXEC_PREFIX. These are made + dnl distinct variables so they can be overridden if need be. However, + dnl general consensus is that you shouldn't need this ability. + + AC_SUBST([PYTHON3_PREFIX], ['${prefix}']) + AC_SUBST([PYTHON3_EXEC_PREFIX], ['${exec_prefix}']) + + dnl At times (like when building shared libraries) you may want + dnl to know which OS platform Python3 thinks this is. + + AC_CACHE_CHECK([for $am_display_PYTHON3 platform], [am_cv_python3_platform], + [am_cv_python3_platform=`$PYTHON3 -c "import sys; sys.stdout.write(sys.platform)"`]) + AC_SUBST([PYTHON3_PLATFORM], [$am_cv_python3_platform]) + + AC_CACHE_CHECK([for $am_display_PYTHON3 bldlibrary], [am_cv_python3_bldlibrary], + [am_cv_python3_bldlibrary=`$PYTHON3 -c "import sys; import sysconfig; sys.stdout.write(sysconfig.get_config_var('BLDLIBRARY'))"`]) + AC_SUBST([PYTHON3_BLDLIBRARY], [$am_cv_python3_bldlibrary]) + + dnl Set up 4 directories: + + dnl python3dir -- where to install python3 scripts. This is the + dnl site-packages directory, not the python3 standard library + dnl directory like in previous automake betas. This behavior + dnl is more consistent with lispdir.m4 for example. + dnl Query distutils for this directory. distutils does not exist in + dnl Python3 1.5, so we fall back to the hardcoded directory if it + dnl doesn't work. + AC_CACHE_CHECK([for $am_display_PYTHON3 script directory], + [am_cv_python3_python3dir], + [if test "x$prefix" = xNONE + then + am_py_prefix=$ac_default_prefix + else + am_py_prefix=$prefix + fi + am_cv_python3_python3dir=`$PYTHON3 -c "import sys; from distutils import sysconfig; sys.stdout.write(sysconfig.get_python_lib(0,0,prefix='$am_py_prefix'))" 2>/dev/null || + echo "$PYTHON3_PREFIX/lib/python$PYTHON3_VERSION/site-packages"` + case $am_cv_python3_python3dir in + $am_py_prefix*) + am__strip_prefix=`echo "$am_py_prefix" | sed 's|.|.|g'` + am_cv_python3_python3dir=`echo "$am_cv_python3_python3dir" | sed "s,^$am__strip_prefix,$PYTHON3_PREFIX,"` + ;; + esac + ]) + AC_SUBST([python3dir], [$am_cv_python3_python3dir]) + + dnl pkgpython3dir -- $PACKAGE directory under python3dir. Was + dnl PYTHON3_SITE_PACKAGE in previous betas, but this naming is + dnl more consistent with the rest of automake. + + AC_SUBST([pkgpython3dir], [\${python3dir}/$PACKAGE]) + + dnl pyexecdir -- directory for installing python3 extension modules + dnl (shared libraries) + dnl Query distutils for this directory. distutils does not exist in + dnl Python3 1.5, so we fall back to the hardcoded directory if it + dnl doesn't work. + AC_CACHE_CHECK([for $am_display_PYTHON3 extension module directory], + [am_cv_python3_pyexecdir], + [if test "x$exec_prefix" = xNONE + then + am_py_exec_prefix=$am_py_prefix + else + am_py_exec_prefix=$exec_prefix + fi + am_cv_python3_pyexecdir=`$PYTHON3 -c "import sys; from distutils import sysconfig; sys.stdout.write(sysconfig.get_python_lib(1,0,prefix='$am_py_exec_prefix'))" 2>/dev/null || + echo "$PYTHON3_EXEC_PREFIX/lib/python$PYTHON3_VERSION/site-packages"` + case $am_cv_python3_pyexecdir in + $am_py_exec_prefix*) + am__strip_prefix=`echo "$am_py_exec_prefix" | sed 's|.|.|g'` + am_cv_python3_pyexecdir=`echo "$am_cv_python3_pyexecdir" | sed "s,^$am__strip_prefix,$PYTHON3_EXEC_PREFIX,"` + ;; + esac + ]) + AC_SUBST([py3execdir], [$am_cv_python3_pyexecdir]) + + dnl pkgpy3execdir -- $(py3execdir)/$(PACKAGE) + + AC_SUBST([pkgpy3execdir], [\${py3execdir}/$PACKAGE]) + + dnl Run any user-specified action. + $2 + fi + +]) + + +# AM_PYTHON3_CHECK_VERSION(PROG, VERSION, [ACTION-IF-TRUE], [ACTION-IF-FALSE]) +# --------------------------------------------------------------------------- +# Run ACTION-IF-TRUE if the Python3 interpreter PROG has version >= VERSION. +# Run ACTION-IF-FALSE otherwise. +# This test uses sys.hexversion instead of the string equivalent (first +# word of sys.version), in order to cope with versions such as 2.2c1. +# This supports Python3 2.0 or higher. (2.0 was released on October 16, 2000). +AC_DEFUN([AM_PYTHON3_CHECK_VERSION], + [prog="import sys +# split strings by '.' and convert to numeric. Append some zeros +# because we need at least 4 digits for the hex conversion. +# map returns an iterator in Python3 3.0 and a list in 2.x +minver = list(map(int, '$2'.split('.'))) + [[0, 0, 0]] +minverhex = 0 +# xrange is not present in Python3yy 3.0 and range returns an iterator +for i in list(range(0, 4)): minverhex = (minverhex << 8) + minver[[i]] +sys.exit(sys.hexversion < minverhex)" + AS_IF([AM_RUN_LOG([$1 -c "$prog"])], [$3], [$4])]) diff --git a/src/libraries/sonic-fib/schema/NextHopGroupFull.json b/src/libraries/sonic-fib/schema/NextHopGroupFull.json new file mode 100644 index 00000000000..bec01f5e310 --- /dev/null +++ b/src/libraries/sonic-fib/schema/NextHopGroupFull.json @@ -0,0 +1,271 @@ +{ + "$schema": "https://json-schema.org/draft/2020-12/schema", + "$id": "NextHopGroupFull.json", + "title": "NextHopGroupFull", + "description": "Full nexthop group representation for serialization", + "type": "object", + "properties": { + "id": { + "type": "integer", + "position" : 1, + "minimum": 0, + "default_value" : "0", + "description": "Nexthop group ID" + }, + "key": { + "type": "integer", + "position" : 1, + "minimum": 0, + "default_value" : "0", + "description": "Hash key from Zebra" + }, + "weight": { + "type": "integer", + "position" : 1, + "minimum": 0, + "maximum": 65535, + "default_value" : "0", + "description": "Weight for unequal-cost ECMP" + }, + "flags": { + "type": "integer", + "position" : 1, + "minimum": 0, + "maximum": 255, + "default_value" : "0", + "description": "Bit flags (e.g., NEXTHOP_FLAG_ONLINK = 8)" + }, + "nhg_flags": { + "type": "integer", + "position" : 1, + "minimum": 0, + "default_value" : "0", + "description": "Bit flags for NHG (e.g., NEXTHOP_GROUP_RECEIVED = 1024)" + }, + "ifname": { + "type": "string", + "position" : 2, + "default_value" : "\"\"", + "description": "Interface name" + }, + "nh_grp_full_list": { + "position" : 2, + "type": "array", + "items": { "$ref": "#/$defs/nh_grp_full" }, + "C_len": "(MULTIPATH_NUM * MAX_NHG_RECURSION) + 1" + }, + "depends": { + "position" : 2, + "type": "array", + "items": { "type": "integer", "minimum": 0 }, + "C_len": "MULTIPATH_NUM + 1" + }, + "dependents": { + "position" : 2, + "type": "array", + "items": { "type": "integer", "minimum": 0 }, + "C_len": "MULTIPATH_NUM + 1" + }, + "type": { + "position" : 3, + "default_value" : "NEXTHOP_TYPE_INVALID", + "$ref": "#/$defs/nexthop_types_t" + }, + "vrf_id": { + "type": "integer", + "position" : 3, + "minimum": 0, + "default_value" : "0", + "description": "VRF ID" + }, + "ifindex": { + "type": "integer", + "position" : 3, + "default_value" : "0", + "description": "Interface index (can be negative)" + }, + "nh_label_type": { + "position" : 3, + "default_value" : "ZEBRA_LSP_NONE", + "$ref": "#/$defs/lsp_types_t" + }, + "gate": { + "position" : 4, + "$ref": "#/$defs/ip_address", + "description": "Next-hop gateway address (IPv4 or IPv6)" + }, + "bh_type": { + "$ref": "#/$defs/blackhole_type", + "position" : 4, + "description": "Blackhole type (only present if type is BLACKHOLE)" + }, + "src": { + "$ref": "#/$defs/ip_address", + "position" : 5, + "description": "Source address" + }, + "rmap_src": { + "$ref": "#/$defs/ip_address", + "position" : 5, + "description": "Route-map source address" + }, + + "nh_srv6": { + "position" : 6, + "default_value" : "nullptr", + "data_prefix" : "*", + "$ref": "#/$defs/nexthop_srv6" , + "description": "SRv6 information (optional)" + } + }, + "required": [ + "id", "key", "weight", "flags", "ifname", + "depends", "dependents", + "type", "vrf_id", "ifindex", "nh_label_type", + "gate", "src", "rmap_src" + ], + "additionalProperties": false, + + "$defs": { + "nh_grp_full": { + "type": "object", + "properties": { + "id": { "type": "integer", "minimum": 0 }, + "weight": { "type": "integer", "minimum": 0, "maximum": 65535 }, + "num_direct": { "type": "integer", "minimum": 0 } + }, + "required": ["id", "weight", "num_direct"], + "additionalProperties": false + }, + "nexthop_types_t": { + "type": "string", + "enum": [ + "NEXTHOP_TYPE_INVALID", + "NEXTHOP_TYPE_IFINDEX", + "NEXTHOP_TYPE_IPV4", + "NEXTHOP_TYPE_IPV4_IFINDEX", + "NEXTHOP_TYPE_IPV6", + "NEXTHOP_TYPE_IPV6_IFINDEX", + "NEXTHOP_TYPE_BLACKHOLE" + ] + }, + "lsp_types_t": { + "type": "string", + "enum": [ + "ZEBRA_LSP_NONE", + "ZEBRA_LSP_STATIC", + "ZEBRA_LSP_LDP", + "ZEBRA_LSP_BGP", + "ZEBRA_LSP_OSPF_SR", + "ZEBRA_LSP_ISIS_SR", + "ZEBRA_LSP_SHARP", + "ZEBRA_LSP_SRTE", + "ZEBRA_LSP_EVPN" + ] + }, + "blackhole_type": { + "type": "string", + "enum": [ + "BLACKHOLE_UNSPEC", + "BLACKHOLE_NULL", + "BLACKHOLE_REJECT", + "BLACKHOLE_ADMINPROHIB" + ] + }, + "ip_address": { + "type": "string", + "oneOf": [ + { "format": "ipv4" }, + { "format": "ipv6" } + ], + "description": "IPv4 or IPv6 address in standard string notation" + }, + "seg6local_action_t": { + "type": "string", + "enum": [ + "SEG6_LOCAL_ACTION_UNSPEC", + "SEG6_LOCAL_ACTION_END", + "SEG6_LOCAL_ACTION_END_X", + "SEG6_LOCAL_ACTION_END_T", + "SEG6_LOCAL_ACTION_END_DX2", + "SEG6_LOCAL_ACTION_END_DX6", + "SEG6_LOCAL_ACTION_END_DX4", + "SEG6_LOCAL_ACTION_END_DT6", + "SEG6_LOCAL_ACTION_END_DT4", + "SEG6_LOCAL_ACTION_END_B6", + "SEG6_LOCAL_ACTION_END_B6_ENCAP", + "SEG6_LOCAL_ACTION_END_BM", + "SEG6_LOCAL_ACTION_END_S", + "SEG6_LOCAL_ACTION_END_AS", + "SEG6_LOCAL_ACTION_END_AM", + "SEG6_LOCAL_ACTION_END_BPF", + "SEG6_LOCAL_ACTION_END_DT46" + ] + }, + "seg6local_flavors_info": { + "type": "object", + "properties": { + "flv_ops": { "type": "integer", "minimum": 0 }, + "lcblock_len": { "type": "integer", "minimum": 0, "maximum": 255 }, + "lcnode_func_len": { "type": "integer", "minimum": 0, "maximum": 255 } + }, + "required": ["flv_ops", "lcblock_len", "lcnode_func_len"], + "additionalProperties": false + }, + "seg6local_context": { + "type": "object", + "properties": { + "nh4": { "$ref": "#/$defs/in_address" }, + "nh6": { "$ref": "#/$defs/in6_address" }, + "table": { "type": "integer", "minimum": 0 }, + "flv": { "$ref": "#/$defs/seg6local_flavors_info" }, + "block_len": { "type": "integer", "minimum": 0, "maximum": 255 }, + "node_len": { "type": "integer", "minimum": 0, "maximum": 255 }, + "function_len": { "type": "integer", "minimum": 0, "maximum": 255 }, + "argument_len": { "type": "integer", "minimum": 0, "maximum": 255 } + }, + "required": ["nh4", "nh6", "table", "flv", "block_len", "node_len", "function_len", "argument_len"], + "additionalProperties": false + }, + "srv6_headend_behavior": { + "type": "string", + "enum": [ + "SRV6_HEADEND_BEHAVIOR_H_INSERT", + "SRV6_HEADEND_BEHAVIOR_H_ENCAPS", + "SRV6_HEADEND_BEHAVIOR_H_ENCAPS_RED", + "SRV6_HEADEND_BEHAVIOR_H_ENCAPS_L2", + "SRV6_HEADEND_BEHAVIOR_H_ENCAPS_L2_RED" + ] + }, + "seg6_seg_stack": { + "type": "object", + "properties": { + "encap_behavior": { "$ref": "#/$defs/srv6_headend_behavior" }, + "num_segs": { "$ref": "#/$defs/uint8" }, + "seg": { + "type": "array", + "items": { "$ref": "#/$defs/in6_address" }, + "minItems": 0 + } + }, + "required": ["encap_behavior", "seg"], + "additionalProperties": false + }, + "nexthop_srv6": { + "type": "object", + "properties": { + "seg6local_action": { "$ref": "#/$defs/seg6local_action_t" }, + "seg6local_ctx": { "$ref": "#/$defs/seg6local_context" }, + "seg6_src": { "$ref": "#/$defs/in6_address" }, + "seg6_segs": { + "anyOf": [ + { "type": "null" }, + { "$ref": "#/$defs/seg6_seg_stack" } + ] + } + }, + "required": ["seg6local_action", "seg6local_ctx", "seg6_src", "seg6_segs"], + "additionalProperties": false + } + } +} \ No newline at end of file diff --git a/src/libraries/sonic-fib/scripts/render_schema.py b/src/libraries/sonic-fib/scripts/render_schema.py new file mode 100755 index 00000000000..229949fc10f --- /dev/null +++ b/src/libraries/sonic-fib/scripts/render_schema.py @@ -0,0 +1,375 @@ +#!/usr/bin/env python3 + +import json +import sys +import os +from jinja2 import Environment, FileSystemLoader + + +def json_type_to_c(prop, defs): + """Map JSON Schema prtperty to C type.""" + if "$ref" in prop: + ref = prop["$ref"] + if ref == "#/$defs/ip_address": + return "union C_g_addr" + elif ref == "#/$defs/uint8": + return "uint8_t" + elif ref == "#/$defs/in_address": + return "struct in_addr" + elif ref == "#/$defs/in6_address": + return "struct in6_addr" + elif ref.startswith("#/$defs/"): + typename = ref.split("/")[-1] + target = defs.get(typename, {}) + if target.get("type") == "string" and "enum" in target: + return f"enum C_{typename}" + else: + return f"struct C_{typename}" + else: + return "void*" + + typ = prop.get("type") + if typ == "integer": + maximum = prop.get("maximum", None) + if maximum is None: + return "uint32_t" if prop.get("minimum", 0) >= 0 else "int32_t" + elif maximum <= 255: + return "uint8_t" if prop.get("minimum", 0) >= 0 else "int8_t" + elif maximum <= 65535: + return "uint16_t" if prop.get("minimum", 0) >= 0 else "int16_t" + elif typ == "string": + return "char*" + elif typ == "array": + item_type = json_type_to_c(prop.get("items", {}), defs) + return item_type + elif typ == "boolean": + return "bool" + elif typ == "null": + return "void *" + return "void" + + +def json_type_to_cpp(prop, defs): + """Map JSON Schema property to C++ type.""" + if "$ref" in prop: + ref = prop["$ref"] + if ref == "#/$defs/ip_address": + return "union g_addr" + elif ref == "#/$defs/uint8": + return "std::uint8_t" + elif ref == "#/$defs/in_address": + return "struct in_addr" + elif ref == "#/$defs/in6_address": + return "struct in6_addr" + elif ref.startswith("#/$defs/"): + typename = ref.split("/")[-1] + target = defs.get(typename, {}) + if target.get("type") == "string" and "enum" in target: + return f"enum {typename}" + else: + return f"struct {typename}" + else: + return "void*" + + typ = prop.get("type") + if typ == "integer": + maximum = prop.get("maximum", None) + if maximum is None: + return "std::uint32_t" if prop.get("minimum", 0) >= 0 else "std::int32_t" + elif maximum <= 255: + return "std::uint8_t" if prop.get("minimum", 0) >= 0 else "std::int8_t" + elif maximum <= 65535: + return "std::uint16_t" if prop.get("minimum", 0) >= 0 else "std::int16_t" + elif typ == "string": + return "std::string" + elif typ == "array": + item_type = json_type_to_cpp(prop.get("items", {}), defs) + if "minItems" in prop and prop.get("minItems", 0) == 0: + return item_type + return f"std::vector<{item_type}>" + elif typ == "boolean": + return "bool" + elif typ == "null": + return "std::nullptr_t" + return "void" + + +def extract_c_enums(defs): + """Extract C enums from $defs.""" + c_enums = {} + for name, schema in defs.items(): + if schema.get("type") == "string" and "enum" in schema: + c_enums[f"C_{name}"] = schema["enum"] + return c_enums + + +def extract_enums(defs): + """Extract enums from $defs.""" + enums = {} + for name, schema in defs.items(): + if schema.get("type") == "string" and "enum" in schema: + enums[name] = schema["enum"] + return enums + + +def build_c_root_struct(schema, defs): + """Build C root struct from top-level properties.""" + fields = [] + for name, prop in schema.get("properties", {}).items(): + c_type = json_type_to_c(prop, defs) + data = {"name": name, "c_type": c_type} + position = prop.get("position", 0) + data["position"] = position + + # array type + if prop.get("type") == "array": + min_items = prop.get("minItems") + if min_items == 0: + # min_items is 0 indicates it's a flexible array + data["flexible_array"] = True + elif "C_len" in prop: + # static array with fixed length + data["fixed_array"] = True + data["array_size"] = prop["C_len"] + + if "default_value" in prop: + dvalue = prop.get("default_value") + data["default_value"] = dvalue + if "data_prefix" in prop: + dvalue = prop.get("data_prefix") + data["data_prefix"] = dvalue + fields.append(data) + name = "C_NextHopGroupFull" + return {"name": name, "fields": fields} + + +def build_root_struct(schema, defs): + """Build root struct from top-level properties.""" + fields = [] + for name, prop in schema.get("properties", {}).items(): + cpp_type = json_type_to_cpp(prop, defs) + data = {"name": name, "cpp_type": cpp_type} + position = prop.get("position", 0) + data["position"] = position + if "default_value" in prop: + dvalue = prop.get("default_value") + data["default_value"] = dvalue + if "data_prefix" in prop: + dvalue = prop.get("data_prefix") + data["data_prefix"] = dvalue + fields.append(data) + name = schema.get("title", "NextHopGroupFull") + return {"name": name, "fields": fields} + + +def build_c_def_structs(defs): + """Build structs from $defs.""" + structs = {} + for name, schema in defs.items(): + if schema.get("type") == "object": + fields = [] + for fname, fprop in schema.get("properties", {}).items(): + c_type = json_type_to_c(fprop, defs) + + # nexthop_srv6's seg6_segs + if name == "nexthop_srv6" and fname == "seg6_segs": + c_type = "struct C_seg6_seg_stack*" + + field_data = {"name": fname, "c_type": c_type} + + # array type + if fprop.get("type") == "array": + min_items = fprop.get("minItems") + if min_items == 0: + # flexible array + field_data["flexible_array"] = True + elif "C_len" in fprop: + # fixed array + field_data["fixed_array"] = True + field_data["array_size"] = fprop["C_len"] + + fields.append(field_data) + structs[f"C_{name}"] = {"name": f"C_{name}", "fields": fields} + + # Build the deps + deps = {} + for name, struct_info in structs.items(): + deps[name] = set() + for field in struct_info.get("fields", []): + field_type = field.get("c_type", "") + for other_name in structs.keys(): + if other_name != name and other_name in field_type: + deps[name].add(other_name) + + # Sort the dict by DFS topo + ordered = {} + visited = set() + + def visit(name): + if name in visited: + return + visited.add(name) + for dep in deps[name]: + visit(dep) + ordered[name] = structs[name] + + for name in structs.keys(): + visit(name) + + return ordered + + +def build_def_structs(defs): + """Build structs from $defs.""" + structs = {} + for name, schema in defs.items(): + if schema.get("type") == "object": + fields = [] + for fname, fprop in schema.get("properties", {}).items(): + cpp_type = json_type_to_cpp(fprop, defs) + if name == "nexthop_srv6" and fname == "seg6_segs": + cpp_type = "struct seg6_seg_stack*" + if fprop.get("type") == "array" and fprop.get("minItems", 0) == 0: + fields.append({"name": fname, "cpp_type": cpp_type, "zeroarray": True}) + else: + fields.append({"name": fname, "cpp_type": cpp_type}) + structs[name] = {"name": name, "fields": fields} + # return structs + + # Now we have already build the structs dict, + # but more we need to do is to sort it. + # When we are using this dict to construct to/from_json in nexthopgroupfull_json.h.j2, + # an dependency issue among the structs will occur. + # Therefore, we sort it from non-depending ones to the complicated. + + # Build the deps + deps = {} + for name, struct_info in structs.items(): + deps[name] = set() + for field in struct_info.get("fields", []): + field_type = field.get("cpp_type", "") + # One's type is another struct indicating it's has dependency + for other_name in structs.keys(): + if other_name != name and other_name in field_type: + deps[name].add(other_name) + + # Sort the dict by DFS topo + ordered = {} + visited = set() + + def visit(name): + if name in visited: + return + visited.add(name) + # We access the deps first + for dep in deps[name]: + visit(dep) + # Then add self in + ordered[name] = structs[name] + + for name in structs.keys(): + visit(name) + + return ordered + + +def main(): + if len(sys.argv) != 5: + print("Usage: ./render_schema.py ") + print(" mode: 'header', 'source', 'json_bindings', or 'c_header'") + sys.exit(1) + + schema_path = sys.argv[1] + template_dir = sys.argv[2] + output_path = sys.argv[3] + mode = sys.argv[4] + + if mode not in ("header", "source", "json_bindings", "c_header"): + print("Error: mode must be 'header', 'source', 'json_bindings', or 'c_header'") + sys.exit(1) + + # Load and parse schema + with open(schema_path, 'r') as f: + schema = json.load(f) + + defs = schema.get("$defs", {}) + enums = extract_enums(defs) + c_enums = extract_c_enums(defs) + + # cpp header + root_struct = build_root_struct(schema, defs) + def_structs = build_def_structs(defs) + + all_structs = def_structs.copy() + all_structs[root_struct["name"]] = root_struct + + root_struct_name = root_struct["name"] + + special_structs = {"nexthop_srv6", "seg6_seg_stack", root_struct_name} + + # c header + c_root_struct = build_c_root_struct(schema, defs) + c_def_structs = build_c_def_structs(defs) + + c_all_structs = c_def_structs.copy() + c_all_structs[c_root_struct["name"]] = c_root_struct + + c_root_struct_name = c_root_struct["name"] + + c_special_structs = {"C_nexthop_srv6", "C_seg6_seg_stack", c_root_struct_name} + + # Jinja setup + # Note: This script generates C/C++ code, not HTML. + # XSS is not applicable in this context. + # nosem: python.flask.security.xss.audit.direct-use-of-jinja2.direct-use-of-jinja2 + env = Environment(loader=FileSystemLoader(template_dir)) + template_name = None + + if mode == "header": + template_name = "nexthopgroupfull.h.j2" + context = { + "enums": enums, + "structs": all_structs, + "special_structs": special_structs, + "root_struct_name": root_struct_name + } + elif mode == "source": + template_name = "nexthopgroupfull.cpp.j2" + context = { + "root_struct_name": root_struct_name + } + elif mode == "json_bindings": + template_name = "nexthopgroupfull_json.h.j2" + context = { + "enums": enums, # dict: name -> list of strings (e.g., ["NEXTHOP_TYPE_INVALID", ...]) + "root_struct_name": root_struct_name, + "root_struct": root_struct, + "special_structs": special_structs, + "all_structs": all_structs + } + elif mode == "c_header": + template_name = "c_nexthopgroupfull.h.j2" + context = { + "c_enums": c_enums, + "structs": c_all_structs, + "special_structs": c_special_structs, + "root_struct": c_root_struct, + "root_struct_name": c_root_struct_name + } + + # Render + # nosem: python.flask.security.xss.audit.direct-use-of-jinja2.direct-use-of-jinja2 + template = env.get_template(template_name) + # nosem: python.flask.security.xss.audit.direct-use-of-jinja2.direct-use-of-jinja2 + output = template.render(**context) + + # Write + os.makedirs(os.path.dirname(output_path) if os.path.dirname(output_path) else ".", exist_ok=True) + with open(output_path, 'w') as f: + f.write(output) + + print(f"✅ Generated {output_path} (mode: {mode})") + + +if __name__ == '__main__': + main() \ No newline at end of file diff --git a/src/libraries/sonic-fib/src/Makefile.am b/src/libraries/sonic-fib/src/Makefile.am new file mode 100644 index 00000000000..d5d5d718d66 --- /dev/null +++ b/src/libraries/sonic-fib/src/Makefile.am @@ -0,0 +1,90 @@ +# --- Jinja2-generated files: header, implementation, and JSON bindings --- + +BUILT_SOURCES = src/nexthopgroupfull.h \ + src/nexthopgroupfull.cpp \ + src/nexthopgroupfull_json.h \ + src/c_nexthopgroupfull.h + +# Common dependencies +schema_file = $(top_srcdir)/schema/NextHopGroupFull.json +render_script = $(top_srcdir)/scripts/render_schema.py + +# Header file for nexthopgroupfull.h +src/nexthopgroupfull.h: $(top_srcdir)/templates/nexthopgroupfull.h.j2 \ + $(schema_file) \ + $(render_script) + $(AM_V_GEN)$(PYTHON) $(render_script) \ + $(schema_file) \ + $(top_srcdir)/templates \ + $@ \ + header + +# Implementation file for nexthopgroupfull.cpp +src/nexthopgroupfull.cpp: $(top_srcdir)/templates/nexthopgroupfull.cpp.j2 \ + $(schema_file) \ + $(render_script) + $(AM_V_GEN)$(PYTHON) $(render_script) \ + $(schema_file) \ + $(top_srcdir)/templates \ + $@ \ + source + +# JSON bindings inline header file for to_json / from_json handling +src/nexthopgroupfull_json.h: $(top_srcdir)/templates/nexthopgroupfull_json.h.j2 \ + $(schema_file) \ + $(render_script) + $(AM_V_GEN)$(PYTHON) $(render_script) \ + $(schema_file) \ + $(top_srcdir)/templates \ + $@ \ + json_bindings + +# C header file for c_nexthopgroupfull.h +src/c_nexthopgroupfull.h: $(top_srcdir)/templates/c_nexthopgroupfull.h.j2 \ + $(schema_file) \ + $(render_script) + $(AM_V_GEN)$(PYTHON) $(render_script) \ + $(schema_file) \ + $(top_srcdir)/templates \ + $@ \ + c_header + +CLEANFILES = src/nexthopgroupfull.h \ + src/nexthopgroupfull.cpp \ + src/nexthopgroupfull_json.h \ + src/c_nexthopgroupfull.h + +EXTRA_DIST = \ + templates/nexthopgroup/nexthopgroupfull.h.j2 \ + templates/nexthopgroup/nexthopgroupfull.cpp.j2 \ + templates/nexthopgroup/nexthopgroupfull_json.h.j2 \ + templates/nexthopgroup/c_nexthopgroupfull.h.j2 \ + schema/nexthopgroup/NextHopGroupFull.json + +# End of Jinja2 generated part + +lib_LTLIBRARIES += src/libnexthopgroup.la + +src_libnexthopgroup_la_SOURCES = \ + src/nexthopgroupfull.cpp \ + src/nexthopgroup_debug.cpp \ + src/c-api/nexthopgroup_capi.cpp + +# Install headers to a dedicated subdir +nexthopgroup_headerdir = $(includedir)/nexthopgroup +nexthopgroup_header_HEADERS = \ + src/nexthopgroupfull.h \ + src/nexthopgroupfull_json.h \ + src/nexthopgroup_debug.h \ + src/c_nexthopgroupfull.h + +# Install C-API headers +nexthopgroup_capi_headerdir = $(includedir)/nexthopgroup/c-api +nexthopgroup_capi_header_HEADERS = \ + src/c-api/nexthopgroup_capi.h + +src_libnexthopgroup_la_CXXFLAGS = $(DBGFLAGS) $(AM_CFLAGS) $(CFLAGS_COMMON) $(CODE_COVERAGE_CXXFLAGS) +src_libnexthopgroup_la_CPPFLAGS = $(DBGFLAGS) $(AM_CFLAGS) $(CFLAGS_COMMON) $(CODE_COVERAGE_CPPFLAGS) +src_libnexthopgroup_la_LIBADD = -lpthread +src_libnexthopgroup_la_LDFLAGS = -Wl,-z,now $(LDFLAGS) + diff --git a/src/libraries/sonic-fib/src/c-api/nexthopgroup_capi.cpp b/src/libraries/sonic-fib/src/c-api/nexthopgroup_capi.cpp new file mode 100644 index 00000000000..62e0d129b49 --- /dev/null +++ b/src/libraries/sonic-fib/src/c-api/nexthopgroup_capi.cpp @@ -0,0 +1,233 @@ +// nexthopgroup_capi.cpp + +#include "src/nexthopgroupfull.h" +#include "src/nexthopgroupfull_json.h" +#include "src/c_nexthopgroupfull.h" +#include "src/nexthopgroup_debug.h" +#include "nexthopgroup_capi.h" +#include +#include +#include +#include +#include + +using namespace std; + +extern "C" { + +const char* nexthopgroup_version(void) { + return LIBNEXTHOPGROUP_VERSION; +} + +char* nexthopgroupfull_json_from_c_nhg_multi(const struct C_NextHopGroupFull* c_nhg, uint32_t nh_grp_full_count, + uint32_t depends_count, uint32_t dependents_count, bool is_recurisve) +{ + if (!c_nhg) { + FIB_LOG(fib::LogLevel::ERROR, "Do NOT pass in an empty C_NextHopGroupFull *"); + return nullptr; + } + + try { + FIB_LOG(fib::LogLevel::DEBUG, "nh_grp_full_count %d, depends_count %d, dependents_count %d, is_recurisve 0x%x", + nh_grp_full_count, depends_count, dependents_count, (uint8_t)is_recurisve); + + /* Defensive bounds check on array count parameters */ + if (nh_grp_full_count > (MULTIPATH_NUM * MAX_NHG_RECURSION) + 1 || + depends_count > MULTIPATH_NUM + 1 || + dependents_count > MULTIPATH_NUM + 1) { + FIB_LOG(fib::LogLevel::ERROR, "Count exceeds array bounds: nh_grp_full_count=%u, depends_count=%u, dependents_count=%u", + nh_grp_full_count, depends_count, dependents_count); + return nullptr; + } + + /* Convert C array to C++ vector */ + vector cpp_nh_grp_full_list; + for (uint32_t i = 0; i < nh_grp_full_count; i++) { + /* convert C nh_grp_full to C++ fib::nh_grp_full explicitly */ + fib::nh_grp_full cpp_nh = { + c_nhg->nh_grp_full_list[i].id, + c_nhg->nh_grp_full_list[i].weight, + c_nhg->nh_grp_full_list[i].num_direct + }; + cpp_nh_grp_full_list.push_back(cpp_nh); + } + vector cpp_depends; + for (uint32_t i = 0; i < depends_count; i++) { + cpp_depends.push_back(c_nhg->depends[i]); + } + vector cpp_dependents; + for (uint32_t i = 0; i < dependents_count; i++) { + cpp_dependents.push_back(c_nhg->dependents[i]); + } + + fib::NextHopGroupFull* cpp_nhg = nullptr; + + if (is_recurisve) { + // Recursive case: includes cpp_gate and type + fib::g_addr cpp_gate = reinterpret_cast(c_nhg->gate); + cpp_nhg = new fib::NextHopGroupFull(c_nhg->id, c_nhg->key, c_nhg->nhg_flags, cpp_gate, + static_cast(c_nhg->type), + cpp_nh_grp_full_list, cpp_depends, cpp_dependents); + } else { + // Non-recursive, multipath case + cpp_nhg = new fib::NextHopGroupFull(c_nhg->id, c_nhg->key, c_nhg->nhg_flags, + cpp_nh_grp_full_list, cpp_depends, cpp_dependents); + } + + /* Convert C++ Obj to JSON stirng */ + char* json_str = nexthopgroup_to_json(cpp_nhg); + FIB_LOG(fib::LogLevel::DEBUG, "json_str length %zu, str: %s", + json_str ? strlen(json_str) : 0, json_str ? json_str : "null"); + + nexthopgroup_free(cpp_nhg); + return json_str; + + } catch (const std::exception& e) { + FIB_LOG(fib::LogLevel::ERROR, "nexthopgroupfull_json_from_c_nhg_multi::Converting failed: %s", e.what()); + return nullptr; + } catch (...) { + FIB_LOG(fib::LogLevel::ERROR, "nexthopgroupfull_json_from_c_nhg_multi::Converting failed with unknown exception"); + return nullptr; + } +} + +char* nexthopgroupfull_json_from_c_nhg_singleton(const struct C_NextHopGroupFull* c_nhg, uint32_t depends_count, uint32_t dependents_count) +{ + if (!c_nhg) { + FIB_LOG(fib::LogLevel::ERROR, "Do NOT pass in an empty C_NextHopGroupFull *"); + return nullptr; + } + + try { + /* Convert C array to C++ vector */ + vector cpp_depends; + for (uint32_t i = 0; i < depends_count; i++) { + cpp_depends.push_back(c_nhg->depends[i]); + } + vector cpp_dependents; + for (uint32_t i = 0; i < dependents_count; i++) { + cpp_dependents.push_back(c_nhg->dependents[i]); + } + + /* Almostly we do NOT have ifname in zebra, so set it as empty string */ + std::string cpp_ifname = ""; + + /* Convert seg6_segs flexible array to C++ vector */ + vector cpp_nh_segs; + if (c_nhg->nh_srv6 && c_nhg->nh_srv6->seg6_segs) { + for (uint8_t i = 0; i < c_nhg->nh_srv6->seg6_segs->num_segs; i++) { + cpp_nh_segs.push_back(c_nhg->nh_srv6->seg6_segs->seg[i]); + } + } + + /* Convert g_addr from C type to C++ type */ + fib::g_addr cpp_gate = reinterpret_cast(c_nhg->gate); + fib::g_addr cpp_src = reinterpret_cast(c_nhg->src); + fib::g_addr cpp_rmap_src = reinterpret_cast(c_nhg->rmap_src); + + /* Call NextHopGroupFull constructor(singleton) to create NextHopGroupFull object */ + /* Convert C types to C++ fib types by force */ + fib::NextHopGroupFull* cpp_nhg = new fib::NextHopGroupFull(c_nhg->id, c_nhg->key, + static_cast(c_nhg->type), + static_cast(c_nhg->vrf_id), + static_cast(c_nhg->ifindex), + cpp_ifname, cpp_depends, cpp_dependents, + static_cast(c_nhg->nh_label_type), + static_cast(c_nhg->bh_type), + cpp_gate, cpp_src, cpp_rmap_src,c_nhg->weight, + c_nhg->flags, c_nhg->nhg_flags, + c_nhg->nh_srv6 != nullptr, + c_nhg->nh_srv6 && c_nhg->nh_srv6->seg6_segs != nullptr, + reinterpret_cast(c_nhg->nh_srv6), + reinterpret_cast(c_nhg->nh_srv6 ? c_nhg->nh_srv6->seg6_segs : nullptr), + cpp_nh_segs); + + /* Convert C++ Obj to JSON string */ + char* json_str = nexthopgroup_to_json(cpp_nhg); + FIB_LOG(fib::LogLevel::DEBUG, "json_str length %zu, str: %s", + json_str ? strlen(json_str) : 0, json_str ? json_str : "null"); + + nexthopgroup_free(cpp_nhg); + + return json_str; + + } catch (const std::exception& e) { + FIB_LOG(fib::LogLevel::ERROR, "nexthopgroupfull_json_from_c_nhg_singleton::Converting failed: %s", e.what()); + return nullptr; + } catch (...) { + FIB_LOG(fib::LogLevel::ERROR, "nexthopgroupfull_json_from_c_nhg_singleton::Converting failed with unknown exception"); + return nullptr; + } +} + +void nexthopgroup_free(fib::NextHopGroupFull* obj) +{ + delete obj; +} + +char* nexthopgroup_to_json(fib::NextHopGroupFull* obj) +{ + if (!obj) { + return nullptr; + } + + try { + std::string json_str = fib::to_json_string(*obj); + char* c_str = static_cast(std::malloc(json_str.size() + 1)); + if (c_str) { + std::memcpy(c_str, json_str.c_str(), json_str.size() + 1); + } + return c_str; + } catch (const std::exception& e) { + FIB_LOG(fib::LogLevel::ERROR, "nexthopgroup_to_json failed: %s", e.what()); + return nullptr; + } catch (...) { + FIB_LOG(fib::LogLevel::ERROR, "nexthopgroup_to_json failed with unknown exception"); + return nullptr; + } +} + +// Global C callback pointer (set by FRR) +/* C callback signature matching FRR's needs */ +typedef void (*fib_frr_log_fn)(int level, + const char *file, + int line, + const char *func, + const char *fmt, + va_list args); + +static fib_frr_log_fn g_frr_cb = nullptr; + +// C++ wrapper that forwards to C callback +static void frr_cpp_callback(fib::LogLevel level, + const char* file, + int line, + const char* func, + const char* format, + va_list args) { + if (!g_frr_cb) return; + + // Forward directly to C callback (no copying needed – va_list is consumed once) + g_frr_cb(static_cast(level), file, line, func, format, args); +} +void fib_frr_register_callback(fib_frr_log_fn cb) { + g_frr_cb = cb; + if (cb) { + // Bridge C callback → C++ API + fib::registerLogCallback(frr_cpp_callback); + } else { + fib::registerLogCallback(nullptr); + } +} + +void fib_frr_set_log_level(int level) { + // Map (0-3) to fib::LogLevel + if (level >= 0 && level <= 3) { + fib::setLogLevel(static_cast(level)); + } +} + +int fib_frr_get_log_level() { + return static_cast(fib::getLogLevel()); +} +} // extern "C" \ No newline at end of file diff --git a/src/libraries/sonic-fib/src/c-api/nexthopgroup_capi.h b/src/libraries/sonic-fib/src/c-api/nexthopgroup_capi.h new file mode 100644 index 00000000000..4432dd3ab00 --- /dev/null +++ b/src/libraries/sonic-fib/src/c-api/nexthopgroup_capi.h @@ -0,0 +1,60 @@ +#ifndef NEXTHOPGROUP_CAPI_H +#define NEXTHOPGROUP_CAPI_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* Library version */ +#define LIBNEXTHOPGROUP_VERSION "1.0.0" + +/* Returns the runtime version string of the loaded library */ +const char* nexthopgroup_version(void); + +typedef struct NextHopGroupFull NextHopGroupFull; + +#ifdef __cplusplus +namespace fib { class NextHopGroupFull; } +// C++ APIs +char* nexthopgroupfull_json_from_c_nhg_multi(const struct C_NextHopGroupFull* c_nhg, + uint32_t nh_grp_full_count, + uint32_t depends_count, + uint32_t dependents_count, + bool is_recurisve); +char* nexthopgroupfull_json_from_c_nhg_singleton(const struct C_NextHopGroupFull* c_nhg, + uint32_t depends_count, + uint32_t dependents_count); +void nexthopgroup_free(fib::NextHopGroupFull* obj); +char* nexthopgroup_to_json(fib::NextHopGroupFull* obj); +#else +/* C APIs */ +char* nexthopgroupfull_json_from_c_nhg_multi(const struct C_NextHopGroupFull* c_nhg, + uint32_t nh_grp_full_count, + uint32_t depends_count, + uint32_t dependents_count, + bool is_recurisve); +char* nexthopgroupfull_json_from_c_nhg_singleton(const struct C_NextHopGroupFull* c_nhg, + uint32_t depends_count, + uint32_t dependents_count); +void nexthopgroup_free(NextHopGroupFull* obj); +char* nexthopgroup_to_json(NextHopGroupFull* obj); +#endif + +/* C callback signature matching FRR's needs */ +typedef void (*fib_frr_log_fn)(int level, + const char *file, + int line, + const char *func, + const char *fmt, + va_list args); + +/* Register FRR-compatible callback from C code */ +void fib_frr_register_callback(fib_frr_log_fn cb); +void fib_frr_set_log_level(int level); +int fib_frr_get_log_level(); + +#ifdef __cplusplus +} +#endif + +#endif // NEXTHOPGROUP_CAPI_H \ No newline at end of file diff --git a/src/libraries/sonic-fib/src/nexthopgroup_debug.cpp b/src/libraries/sonic-fib/src/nexthopgroup_debug.cpp new file mode 100644 index 00000000000..de6a77aa1cc --- /dev/null +++ b/src/libraries/sonic-fib/src/nexthopgroup_debug.cpp @@ -0,0 +1,100 @@ +#include "nexthopgroup_debug.h" +#include +#include +#include +#include // for std::array +#include // for std::vector + +using namespace std; +using namespace fib; + +namespace { // Anonymous namespace +struct LoggerState { + fib::LogCallback callback; + std::mutex mutex; + fib::LogLevel level = fib::LogLevel::DEBUG; +}; +LoggerState& getState() { + static LoggerState state; + return state; +} + +// Default fallback: print to stderr +void defaultLog(LogLevel level, const char* file, int line, + const char* func, const char* format, va_list args) { + const char* level_str = "DEBUG"; + switch (level) { + case LogLevel::INFO: level_str = "INFO"; break; + case LogLevel::WARN: level_str = "WARN"; break; + case LogLevel::ERROR: level_str = "ERROR"; break; + default: break; + } + // Format the variadic arguments into a buffer + std::array buf; + int written = std::vsnprintf(buf.data(), buf.size(), format, args); + + if (written < 0) { + // Formatting error – log minimal fallback + std::fprintf(stderr, "[%s] %s:%d %s: \n", + level_str, file, line, func); + return; + } + // Handle truncation gracefully (optional but recommended) + if (static_cast(written) >= buf.size()) { + // Truncated – indicate with ellipsis + constexpr size_t ellipsis_len = 3; + if (buf.size() > ellipsis_len) { + std::fill_n(buf.end() - ellipsis_len - 1, ellipsis_len, '.'); + } + } + + // Print the final formatted message + std::fprintf(stderr, "[%s] %s:%d %s: %s\n", + level_str, file, line, func, buf.data()); +} + +} // anonymous namespace + +// Public API implementations +// Don't use FIB_LOG here to avoid recursion mutex +void fib::registerLogCallback(LogCallback cb) { + auto& state = getState(); + std::lock_guard lock(state.mutex); + state.callback = std::move(cb); +} + +void fib::setLogLevel(LogLevel level) { + auto& state = getState(); + std::lock_guard lock(state.mutex); + state.level = level; +} + +fib::LogLevel fib::getLogLevel() { + auto& state = getState(); + std::lock_guard lock(state.mutex); + return state.level; +} + +// Internal logging implementation +void fib::internalLog(LogLevel level, const char* file, int line, + const char* func, const char* format, ...) { + auto& state = getState(); + fib::LogCallback cb; + va_list args; + va_start(args, format); + { + std::lock_guard lock(state.mutex); + if (static_cast(level) < static_cast(state.level) ) { + va_end(args); + return; + } + if (!state.callback) { + // Use default logger + cb = defaultLog; + } else { + cb = state.callback; + } + } + if (cb) cb(level, file, line, func, format, args); // Forward va_list directly + va_end(args); +} \ No newline at end of file diff --git a/src/libraries/sonic-fib/src/nexthopgroup_debug.h b/src/libraries/sonic-fib/src/nexthopgroup_debug.h new file mode 100644 index 00000000000..88630d2e429 --- /dev/null +++ b/src/libraries/sonic-fib/src/nexthopgroup_debug.h @@ -0,0 +1,52 @@ +#pragma once + +#include +#include +#include +#include +#include + +namespace fib { + +// Log levels for filtering messages +enum class LogLevel : uint32_t { + DEBUG = 0, + INFO = 1, + WARN = 2, + ERROR = 3 +}; + +// C++ interface for Define log callback function +using LogCallback = std::function; + +// Internal logging macro (used inside library implementation) +#define FIB_LOG(level, fmt, ...) \ + do { \ + if (static_cast(level) >= static_cast(fib::getLogLevel())) { \ + fib::internalLog(level, __FILE__, __LINE__, __func__, fmt, ##__VA_ARGS__); \ + } \ + } while (0) + +// Internal helpers to log messages +void internalLog(LogLevel level, const char* file, int line, + const char* func, const char* format, ...); + + +/* + * Public APIs to register a log callback from C++ code + */ +// Register callback function +void registerLogCallback(LogCallback cb); + +// Set and get log level +void setLogLevel(LogLevel level); +LogLevel getLogLevel(); + +} // namespace fib \ No newline at end of file diff --git a/src/libraries/sonic-fib/templates/c_nexthopgroupfull.h.j2 b/src/libraries/sonic-fib/templates/c_nexthopgroupfull.h.j2 new file mode 100644 index 00000000000..b3dec341a57 --- /dev/null +++ b/src/libraries/sonic-fib/templates/c_nexthopgroupfull.h.j2 @@ -0,0 +1,114 @@ +#ifndef C_NEXTHOPGROUPFULL_H +#define C_NEXTHOPGROUPFULL_H + +#include +#include +#include +#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/* Manual definitions */ +typedef uint32_t vrf_id_t; +typedef signed int ifindex_t; + +#define MULTIPATH_NUM 514 +#define MAX_NHG_RECURSION 2 + +union C_g_addr { + struct in_addr ipv4; + struct in6_addr ipv6; +}; + +/* Auto-generated C Enums */ +{%- for enum_name, values in c_enums.items() %} +enum {{ enum_name }} { + {%- for value in values %} + C_{{ value | replace(' ', '') }}, + {%- endfor %} +}; + +{%- endfor %} + +/* Auto-generated Structs */ +{%- for name, s in structs.items() if name not in special_structs %} +struct {{ name }} { +{%- for field in s.fields %} +{%- if field.flexible_array %} + {{ field.c_type }} {{ field.name }}[0]; +{%- elif field.fixed_array %} + {{ field.c_type }} {{ field.name }}[{{ field.array_size }}]; +{%- else %} + {{ field.c_type }} {{ field.name }}; +{%- endif %} +{%- endfor %} +}; + +{%- endfor %} + +/* --- Special Struct: nexthop_srv6 --- */ +struct C_nexthop_srv6 { + enum C_seg6local_action_t seg6local_action; + struct C_seg6local_context seg6local_ctx; + struct in6_addr seg6_src; + struct C_seg6_seg_stack *seg6_segs; +}; + +/* --- Other C-specific structs (not in schema as objects) --- */ +struct C_seg6_seg_stack { +{%- for name, s in structs.items() if name == "C_seg6_seg_stack" %} + {%- for field in s.fields %} + {{ field.c_type }} {{ field.name }}{% if field.flexible_array %}[0]{% endif %}; + {%- endfor %} +{%- endfor %} +}; + +/* --- Root Struct: C_NextHopGroupFull --- */ +struct C_NextHopGroupFull { +{%- for field in root_struct.fields if field.position == 1 %} + {{ field.c_type }} {{ field.name }}; +{%- endfor %} + +{%- for field in root_struct.fields if field.position == 2 and field.name != "ifname" %} + {%- if field.flexible_array %} + {{ field.c_type }} {{ field.name }}[0]; + {%- elif field.fixed_array %} + {{ field.c_type }} {{ field.name }}[{{ field.array_size }}]; + {%- else %} + {{ field.c_type }} {{ field.name }}; + {%- endif %} +{%- endfor %} + + char _hash_begin[0]; +{%- for field in root_struct.fields if field.position == 3 %} + {{ field.c_type }} {{ field.name }}; +{%- endfor %} + union { + union C_g_addr gate; + enum C_blackhole_type bh_type; + }; +{%- for field in root_struct.fields if field.position == 5 %} + {{ field.c_type }} {{ field.name }}; +{%- endfor %} + char _hash_end[0]; +{%- for field in root_struct.fields if field.position == 6 and field.name != "ifname" %} + {%- if field.flexible_array %} + {{ field.c_type }} {{ field.name }}[0]; + {%- elif field.fixed_array %} + {{ field.c_type }} {{ field.name }}[{{ field.array_size }}]; + {%- elif field.data_prefix %} + {{ field.c_type }} {{ field.data_prefix }}{{ field.name }}; + {%- else %} + {{ field.c_type }} {{ field.name }}; + {%- endif %} +{%- endfor %} +}; + +#ifdef __cplusplus +} +#endif + +#endif /* C_NEXTHOPGROUPFULL_H */ diff --git a/src/libraries/sonic-fib/templates/nexthopgroupfull.cpp.j2 b/src/libraries/sonic-fib/templates/nexthopgroupfull.cpp.j2 new file mode 100644 index 00000000000..92ff44a80ef --- /dev/null +++ b/src/libraries/sonic-fib/templates/nexthopgroupfull.cpp.j2 @@ -0,0 +1,362 @@ +#include "nexthopgroupfull.h" + +#include +#include +#include +#include +#include +#include "nexthopgroup_debug.h" + +using namespace std; +using namespace fib; + +/* Constructor for recursive NH {{ root_struct_name }} */ +{{ root_struct_name }}::{{ root_struct_name }}(std::uint32_t id_in, std::uint32_t key_in, std::uint32_t nhg_flags_in, + union g_addr gateway_in, enum nexthop_types_t type_in, + const std::vector& nh_grp_full_list_in, + const std::vector& depends_in, + const std::vector& dependents_in) + : id(id_in), key(key_in), nhg_flags(nhg_flags_in), nh_grp_full_list(nh_grp_full_list_in), depends(depends_in), dependents(dependents_in) +{ + + FIB_LOG(fib::LogLevel::DEBUG, "[CPP DEBUG] {{ root_struct_name }} construction started (multi-nexthop) with id: %d, key: %d, nhg_flags: %d", id_in, key_in, nhg_flags_in); + for (size_t i = 0; i < nh_grp_full_list_in.size(); i++) { + FIB_LOG(fib::LogLevel::DEBUG, "[CPP DEBUG] nh_grp_full_list item %d: id= %d weight %d num_direct %d", i, nh_grp_full_list_in[i].id, static_cast(nh_grp_full_list_in[i].weight), nh_grp_full_list_in[i].num_direct); + } + for (size_t i = 0; i < depends_in.size(); i++) { + FIB_LOG(fib::LogLevel::DEBUG, "[CPP DEBUG] depends item %d : %d ", i, depends_in[i]); + } + for (size_t i = 0; i < dependents_in.size(); i++) { + FIB_LOG(fib::LogLevel::DEBUG, "[CPP DEBUG] dependents item %d : %d", i, dependents_in[i]); + } + + // For recursive case, set gate and type + this->gate = gateway_in; + this->type = type_in; + memset(&src, 0, sizeof(src)); + memset(&rmap_src, 0, sizeof(rmap_src)); + + FIB_LOG(fib::LogLevel::DEBUG, "[CPP DEBUG] {{ root_struct_name }} construction finished (multi-nexthop) for id: %d", id_in); +} + +/* Constructor for multi-path {{ root_struct_name }} */ +{{ root_struct_name }}::{{ root_struct_name }}(std::uint32_t id_in, std::uint32_t key_in, std::uint32_t nhg_flags_in, + const std::vector& nh_grp_full_list_in, + const std::vector& depends_in, + const std::vector& dependents_in) + : id(id_in), key(key_in), nhg_flags(nhg_flags_in), nh_grp_full_list(nh_grp_full_list_in), depends(depends_in), dependents(dependents_in) +{ + + FIB_LOG(fib::LogLevel::DEBUG, "[CPP DEBUG] {{ root_struct_name }} construction started (multi-nexthop) with id: %d, key: %d, nhg_flags: %d", id_in, key_in, nhg_flags_in); + for (size_t i = 0; i < nh_grp_full_list_in.size(); i++) { + FIB_LOG(fib::LogLevel::DEBUG, "[CPP DEBUG] nh_grp_full_list item %d: id= %d weight %d num_direct %d", i, nh_grp_full_list_in[i].id, static_cast(nh_grp_full_list_in[i].weight), nh_grp_full_list_in[i].num_direct); + } + for (size_t i = 0; i < depends_in.size(); i++) { + FIB_LOG(fib::LogLevel::DEBUG, "[CPP DEBUG] depends item %d : %d ", i, depends_in[i]); + } + for (size_t i = 0; i < dependents_in.size(); i++) { + FIB_LOG(fib::LogLevel::DEBUG, "[CPP DEBUG] dependents item %d : %d", i, dependents_in[i]); + } + + memset(&gate, 0, sizeof(gate)); + bh_type = BLACKHOLE_UNSPEC; + memset(&src, 0, sizeof(src)); + memset(&rmap_src, 0, sizeof(rmap_src)); + + FIB_LOG(fib::LogLevel::DEBUG, "[CPP DEBUG] {{ root_struct_name }} construction finished (multi-nexthop) for id: %d", id_in); +} + +/* Constructor for singleton {{ root_struct_name }} */ +{{ root_struct_name }}::{{ root_struct_name }}(std::uint32_t id_in, std::uint32_t key_in, + enum nexthop_types_t type_in, vrf_id_t vrf_id_in, ifindex_t ifindex_in, + std::string ifname_in, const std::vector& depends_in, + const std::vector& dependents_in, + enum lsp_types_t label_type_in, enum blackhole_type bh_type_in, + union g_addr gateway_in, union g_addr src_in, union g_addr rmap_src_in, + std::uint16_t weight_in, std::uint8_t flags_in, std::uint32_t nhg_flags_in, + bool has_srv6, bool has_seg6_segs, + const struct nexthop_srv6* nh_srv6_in, + const struct seg6_seg_stack* nh_seg6_segs_in, + const std::vector& nh_segs_in) + : id(id_in), key(key_in), weight(weight_in), flags(flags_in), nhg_flags(nhg_flags_in), ifname(ifname_in), + depends(depends_in), dependents(dependents_in), type(type_in), vrf_id(vrf_id_in), + ifindex(ifindex_in), nh_label_type(label_type_in), src(src_in), rmap_src(rmap_src_in), + nh_srv6(nullptr) +{ + FIB_LOG(fib::LogLevel::DEBUG, "[CPP DEBUG] {{ root_struct_name }} construction started (singleton) for id: %d, key: %d, nhg_flags: %d", id_in, key_in, nhg_flags_in); + + /* Initialize union member */ + this->bh_type = bh_type_in; + this->gate = gateway_in; + + /* Check if need to allocate the nexthop_srv6 structure */ + if (has_srv6 && nh_srv6_in != nullptr) + { + nh_srv6 = (struct nexthop_srv6 *)malloc(sizeof(struct nexthop_srv6)); + if (!nh_srv6) { + FIB_LOG(fib::LogLevel::ERROR, "nh_srv6 allocation failed in {{ root_struct_name }} constructor, abort"); + return; + } + + memcpy(nh_srv6, nh_srv6_in, sizeof(struct nexthop_srv6)); + FIB_LOG(fib::LogLevel::DEBUG, "{{ root_struct_name }} constructor finished nh_srv6 initialization"); + } + else + FIB_LOG(fib::LogLevel::DEBUG, "{{ root_struct_name }} does not have srv6 info"); + + /* Check if need to allocate the seg6_seg_stack structure */ + if (has_seg6_segs && nh_seg6_segs_in != nullptr) + { + FIB_LOG(fib::LogLevel::DEBUG, "{{ root_struct_name }} has seg6_segs, allocating..."); + size_t total_size = sizeof(struct seg6_seg_stack) + + nh_seg6_segs_in->num_segs * sizeof(struct in6_addr); + nh_srv6->seg6_segs = (struct seg6_seg_stack *)malloc(total_size); + if (!nh_srv6->seg6_segs) { + FIB_LOG(fib::LogLevel::ERROR, "seg6_segs allocation failed in {{ root_struct_name }} constructor, abort"); + free(nh_srv6); + nh_srv6 = nullptr; + return; + } + // Copy the whole "seg6_segs" structure (including flexible array) + memcpy(nh_srv6->seg6_segs, nh_seg6_segs_in, total_size); + } + FIB_LOG(fib::LogLevel::DEBUG, "[CPP DEBUG] {{ root_struct_name }} construction finished (singleton) for id: %d", id_in); +} + +/* Copy Constructor */ +{{ root_struct_name }}::{{ root_struct_name }}(const NextHopGroupFull& other) + : id(other.id), key(other.key), weight(other.weight), flags(other.flags), nhg_flags(other.nhg_flags), + ifname(other.ifname), nh_grp_full_list(other.nh_grp_full_list), + depends(other.depends), dependents(other.dependents), + type(other.type), vrf_id(other.vrf_id), ifindex(other.ifindex), + nh_label_type(other.nh_label_type), bh_type(other.bh_type) +{ + FIB_LOG(fib::LogLevel::DEBUG, "[CPP DEBUG] NextHopGroupFull copy constructor started for id: %d, key: %d, nhg_flags: %d", other.id, other.key, other.nhg_flags); + + memcpy(&gate, &other.gate, sizeof(g_addr)); + memcpy(&src, &other.src, sizeof(g_addr)); + memcpy(&rmap_src, &other.rmap_src, sizeof(g_addr)); + + /* Deep copy for nh_srv6 information */ + if (other.nh_srv6 != nullptr) { + // allocate "nh_srv6" structure + nh_srv6 = static_cast(malloc(sizeof(struct nexthop_srv6))); + if (!nh_srv6) { + FIB_LOG(fib::LogLevel::ERROR, "Failed to allocate nh_srv6 in copy constructor"); + return; + } + + // copy plain attributes + nh_srv6->seg6local_action = other.nh_srv6->seg6local_action; + nh_srv6->seg6local_ctx = other.nh_srv6->seg6local_ctx; + nh_srv6->seg6_src = other.nh_srv6->seg6_src; + + // Deep copy "seg6_segs" structure + if (other.nh_srv6->seg6_segs != nullptr) { + size_t size = sizeof(seg6_seg_stack) + + other.nh_srv6->seg6_segs->num_segs * sizeof(in6_addr); + nh_srv6->seg6_segs = static_cast(malloc(size)); + if (!nh_srv6->seg6_segs) { + FIB_LOG(fib::LogLevel::ERROR, "Failed to allocate seg6_segs in copy constructor"); + free(nh_srv6); // free the allocated nh_srv6 earlier + nh_srv6 = nullptr; + return; + } + // Copy the whole "seg6_segs" structure (including flexible array) + memcpy(nh_srv6->seg6_segs, other.nh_srv6->seg6_segs, size); + } else { + nh_srv6->seg6_segs = nullptr; + } + + FIB_LOG(fib::LogLevel::DEBUG, "NextHopGroupFull copy constructor finished"); + } +} + +/* Copy Assignment Operator */ +{{ root_struct_name }}& {{ root_struct_name }}::operator = (const NextHopGroupFull &other) +{ + FIB_LOG(fib::LogLevel::DEBUG, "[CPP DEBUG] NextHopGroupFull copy assignment operator started for id: %d, key: 0x%x, nhg_flags: 0x%x", other.id, other.key, other.nhg_flags); + + if (this == &other) return *this; + + id = other.id; + key = other.key; + weight = other.weight; + flags = other.flags; + nhg_flags = other.nhg_flags; + + ifname = other.ifname; + + nh_grp_full_list = other.nh_grp_full_list; + depends = other.depends; + dependents = other.dependents; + + type = other.type; + vrf_id = other.vrf_id; + ifindex = other.ifindex; + nh_label_type = other.nh_label_type; + bh_type = other.bh_type; + + memcpy(&gate, &other.gate, sizeof(g_addr)); + memcpy(&src, &other.src, sizeof(g_addr)); + memcpy(&rmap_src, &other.rmap_src, sizeof(g_addr)); + + /* Deep copy for nh_srv6 information */ + if (nh_srv6 != nullptr) { + if (nh_srv6->seg6_segs != nullptr) { + free(nh_srv6->seg6_segs); + } + free(nh_srv6); + nh_srv6 = nullptr; + } + if (other.nh_srv6 != nullptr) { + nh_srv6 = static_cast(malloc(sizeof(nexthop_srv6))); + *nh_srv6 = nexthop_srv6(); + + nh_srv6->seg6local_action = other.nh_srv6->seg6local_action; + nh_srv6->seg6local_ctx = other.nh_srv6->seg6local_ctx; + nh_srv6->seg6_src = other.nh_srv6->seg6_src; + + /* Deep copy the flexible array in seg6_segs */ + if (other.nh_srv6->seg6_segs != nullptr) { + size_t size = sizeof(seg6_seg_stack) + + other.nh_srv6->seg6_segs->num_segs * sizeof(in6_addr); + nh_srv6->seg6_segs = static_cast(malloc(size)); + memcpy(nh_srv6->seg6_segs, other.nh_srv6->seg6_segs, size); + } else { + nh_srv6->seg6_segs = nullptr; + } + } else { + nh_srv6 = nullptr; + } + + FIB_LOG(fib::LogLevel::DEBUG, "[CPP DEBUG] NextHopGroupFull copy assignment operator finished for id: %d", other.id); + + return *this; +} + +/* operator == */ +bool {{ root_struct_name }}::operator==(const {{ root_struct_name }}& other) const +{ + FIB_LOG(fib::LogLevel::DEBUG, "[CPP DEBUG] {{ root_struct_name }} operator == started for id: %d vs id: %d", id, other.id); + + /* Compare plain values */ + if (id != other.id || + key != other.key || + weight != other.weight || + flags != other.flags || + nhg_flags != other.nhg_flags || + ifname != other.ifname || + depends != other.depends || + dependents != other.dependents || + type != other.type || + vrf_id != other.vrf_id || + ifindex != other.ifindex || + nh_label_type != other.nh_label_type) { + FIB_LOG(fib::LogLevel::DEBUG, "[CPP DEBUG] NOT SAME plain values!"); + return false; + } + /* Compare nh_grp_full_list */ + if (nh_grp_full_list.size() != other.nh_grp_full_list.size()) { + FIB_LOG(fib::LogLevel::DEBUG, "[CPP DEBUG] NOT SAME size of nh_grp_full_list!"); + return false; + } + for (size_t i = 0; i < nh_grp_full_list.size(); ++i) { + if (nh_grp_full_list[i].id != other.nh_grp_full_list[i].id || + nh_grp_full_list[i].weight != other.nh_grp_full_list[i].weight || + nh_grp_full_list[i].num_direct != other.nh_grp_full_list[i].num_direct) { + FIB_LOG(fib::LogLevel::DEBUG, "[CPP DEBUG] NOT SAME values of nh_grp_full_list!"); + return false; + } + } + /* Compare gate/bh_type, depending on the nexthop type */ + if (type == NEXTHOP_TYPE_BLACKHOLE) { + if (bh_type != other.bh_type) { + FIB_LOG(fib::LogLevel::DEBUG, "[CPP DEBUG] NOT SAME bh_type!"); + return false; + } + } else { + if (memcmp(&gate, &other.gate, sizeof(union g_addr)) != 0) { + FIB_LOG(fib::LogLevel::DEBUG, "[CPP DEBUG] NOT SAME gate address!"); + return false; + } + } + /* Compare src and rmap_src */ + if (memcmp(&src, &other.src, sizeof(union g_addr)) != 0 || + memcmp(&rmap_src, &other.rmap_src, sizeof(union g_addr)) != 0) { + FIB_LOG(fib::LogLevel::DEBUG, "[CPP DEBUG] NOT SAME src/rmap_src!"); + return false; + } + /* Compare nh_srv6 */ + if ((nh_srv6 == nullptr) != (other.nh_srv6 == nullptr)) { + FIB_LOG(fib::LogLevel::DEBUG, "[CPP DEBUG] NOT SAME nh_srv6 pointer state!"); + return false; + } + if (nh_srv6 != nullptr) { + if (nh_srv6->seg6local_action != other.nh_srv6->seg6local_action) { + FIB_LOG(fib::LogLevel::DEBUG, "[CPP DEBUG] NOT SAME nh_srv6->seg6local_action!"); + return false; + } + // Compare seg6local_ctx + if (memcmp(&nh_srv6->seg6local_ctx, &other.nh_srv6->seg6local_ctx, + sizeof(struct seg6local_context)) != 0) { + FIB_LOG(fib::LogLevel::DEBUG, "[CPP DEBUG] NOT SAME nh_srv6->seg6local_ctx!"); + return false; + } + + if (memcmp(&nh_srv6->seg6_src, &other.nh_srv6->seg6_src, + sizeof(struct in6_addr)) != 0) { + FIB_LOG(fib::LogLevel::DEBUG, "[CPP DEBUG] NOT SAME nh_srv6->seg6_src!"); + return false; + } + + // Compare seg6_segs + if ((nh_srv6->seg6_segs == nullptr) != (other.nh_srv6->seg6_segs == nullptr)) { + FIB_LOG(fib::LogLevel::DEBUG, "[CPP DEBUG] NOT SAME nh_srv6->seg6_segs pointer state!"); + return false; + } + if (nh_srv6->seg6_segs != nullptr) { + if (nh_srv6->seg6_segs->encap_behavior != other.nh_srv6->seg6_segs->encap_behavior || + nh_srv6->seg6_segs->num_segs != other.nh_srv6->seg6_segs->num_segs) { + FIB_LOG(fib::LogLevel::DEBUG, "[CPP DEBUG] NOT SAME nh_srv6->seg6_segs plain values!"); + return false; + } + // Compare seg6_segs list + for (int i = 0; i < nh_srv6->seg6_segs->num_segs; ++i) { + if (memcmp(&nh_srv6->seg6_segs->seg[i], &other.nh_srv6->seg6_segs->seg[i], + sizeof(struct in6_addr)) != 0) { + FIB_LOG(fib::LogLevel::DEBUG, "[CPP DEBUG] NOT SAME nh_srv6->seg6_segs list!"); + return false; + } + } + } + } + + FIB_LOG(fib::LogLevel::DEBUG, "[CPP DEBUG] The two NextHopGroupFull are the same!"); + + return true; +} + +/* operator != */ +bool {{ root_struct_name }}::operator!=(const {{ root_struct_name }}& other) const { + FIB_LOG(fib::LogLevel::DEBUG, "[CPP DEBUG] {{ root_struct_name }} operator != started for id: %d vs id: %d, calling operator ==", id, other.id); + return !(*this == other); +} + +/* Destructor of {{ root_struct_name }} */ +{{ root_struct_name }}::~{{ root_struct_name }}() +{ + FIB_LOG(fib::LogLevel::DEBUG, "[CPP DEBUG] {{ root_struct_name }} destructor started for id: %d", id); + if (nh_srv6 != nullptr) + { + if (nh_srv6->seg6_segs != nullptr) + { + FIB_LOG(fib::LogLevel::DEBUG, "Free seg6_segs in {{ root_struct_name }} Destructor"); + free(nh_srv6->seg6_segs); + } + FIB_LOG(fib::LogLevel::DEBUG, "Free nh_srv6 in {{ root_struct_name }} Destructor"); + free(nh_srv6); + } + + FIB_LOG(fib::LogLevel::DEBUG, "{{ root_struct_name }} has been destroyed successfully."); +} \ No newline at end of file diff --git a/src/libraries/sonic-fib/templates/nexthopgroupfull.h.j2 b/src/libraries/sonic-fib/templates/nexthopgroupfull.h.j2 new file mode 100644 index 00000000000..85630baef3e --- /dev/null +++ b/src/libraries/sonic-fib/templates/nexthopgroupfull.h.j2 @@ -0,0 +1,130 @@ +#pragma once + +#include +#include +#include +#include + +namespace fib { + + /* Can't be generated defintions */ + typedef std::uint32_t vrf_id_t; + typedef signed int ifindex_t; + + union g_addr { + struct in_addr ipv4; + struct in6_addr ipv6; + }; + + /* Auto generated Enums */ + {%- for enum_name, values in enums.items() %} + enum {{ enum_name }} { + {{ values | join(',\n ') }} + }; + {%- endfor %} + + /* Auto-generated simple structs */ + {%- for name, s in structs.items() if name not in special_structs %} + struct {{ name }} { + {%- for field in s.fields %} + {{ field.cpp_type }} {{ field.name }}; + {%- endfor %} + }; + {%- endfor %} + + /* --- Special Struct: nexthop_srv6 --- */ + struct nexthop_srv6 { + enum seg6local_action_t seg6local_action = {}; + struct seg6local_context seg6local_ctx = {}; + struct in6_addr seg6_src = {}; + struct seg6_seg_stack *seg6_segs = nullptr; + }; + + /* --- Other C-specific structs (not in schema as objects) --- */ + struct seg6_seg_stack { +{%- for name, s in structs.items() if name == "seg6_seg_stack" %} + {%- for field in s.fields %} + {{ field.cpp_type }} {{ field.name }}{%- if field.zeroarray -%}[0]{%- endif -%}; + {%- endfor %} +{%- endfor %} + }; + + /* --- Special Struct: NextHopGroupFull --- */ + struct NextHopGroupFull { +{%- for name, s in structs[root_struct_name].items()%} + {%- for field in s if field.position == 1 %} + {{ field.cpp_type }} {{ field.name }} {% if field.default_value %} = {{field.default_value }} {%- endif -%}; + {%- endfor %} +{%- endfor %} + + +{%- for name, s in structs[root_struct_name].items()%} + {%- for field in s if field.position == 2 %} + {{ field.cpp_type }} {{ field.name }} {% if field.default_value %} = {{field.default_value }} {%- endif -%}; + {%- endfor %} +{%- endfor %} + + char _hash_begin[0]; +{%- for name, s in structs[root_struct_name].items()%} + {%- for field in s if field.position == 3 %} + {{ field.cpp_type }} {{ field.name }} {% if field.default_value %} = {{field.default_value }} {%- endif -%}; + {%- endfor %} +{%- endfor %} + union { + union g_addr gate; + enum blackhole_type bh_type; + }; +{%- for name, s in structs[root_struct_name].items()%} + {%- for field in s if field.position == 5 %} + {{ field.cpp_type }} {{ field.name }} {% if field.default_value %} = {{field.default_value }} {%- endif -%}; + {%- endfor %} +{%- endfor %} + char _hash_end[0]; +{%- for name, s in structs[root_struct_name].items()%} + {%- for field in s if field.position == 6 %} + {{ field.cpp_type }} {% if field.data_prefix -%} {{field.data_prefix}}{%- endif %}{{ field.name }} {% if field.default_value -%} = {{field.default_value }} {%- endif -%}; + {%- endfor %} +{%- endfor %} + + // Add default constructor + NextHopGroupFull() = default; + + // Constructors for recursive NH + NextHopGroupFull(std::uint32_t id_in, std::uint32_t key_in, std::uint32_t nhg_flags_in, union g_addr gateway_in, enum nexthop_types_t type_in, + const std::vector& nh_grp_full_list_in, + const std::vector& depends_in, + const std::vector& dependents_in); + + // Constructors for ECMP + NextHopGroupFull(std::uint32_t id_in, std::uint32_t key_in, std::uint32_t nhg_flags_in, + const std::vector& nh_grp_full_list_in, + const std::vector& depends_in, + const std::vector& dependents_in); + + // Constructors for regular nexthop + NextHopGroupFull(std::uint32_t id_in, std::uint32_t key_in, enum nexthop_types_t type_in, + vrf_id_t vrf_id_in, ifindex_t ifindex_in, std::string ifname_in, + const std::vector& depends_in, + const std::vector& dependents_in, + enum lsp_types_t label_type_in, enum blackhole_type bh_type_in, + union g_addr gateway_in, union g_addr src_in, union g_addr rmap_src_in, + std::uint16_t weight_in, std::uint8_t flags_in, std::uint32_t nhg_flags_in, + bool has_srv6, bool has_seg6_segs, + const struct nexthop_srv6* nh_srv6_in, + const struct seg6_seg_stack* nh_seg6_segs_in, + const std::vector& nh_segs_in); + + // Copy assignment operator + NextHopGroupFull& operator = (const NextHopGroupFull &other); + + // Copy constructor + NextHopGroupFull(const NextHopGroupFull& other); + + // operator == and != + bool operator==(const NextHopGroupFull& other) const; + bool operator!=(const NextHopGroupFull& other) const; + + ~NextHopGroupFull(); + }; + +} // namespace fib \ No newline at end of file diff --git a/src/libraries/sonic-fib/templates/nexthopgroupfull_json.h.j2 b/src/libraries/sonic-fib/templates/nexthopgroupfull_json.h.j2 new file mode 100644 index 00000000000..e9aa0dc2585 --- /dev/null +++ b/src/libraries/sonic-fib/templates/nexthopgroupfull_json.h.j2 @@ -0,0 +1,225 @@ +// Auto-generated from JSON Schema. DO NOT EDIT. +#pragma once + +#include "nexthopgroupfull.h" +#include + +#include +#include // for inet_ntop / inet_pton + +namespace fib { + +// --- IP Conversion Helpers --- +inline std::string ipv4_to_string(const struct in_addr& addr) { + char buf[INET_ADDRSTRLEN]; + return inet_ntop(AF_INET, &addr, buf, INET_ADDRSTRLEN) ? std::string(buf) : "0.0.0.0"; +} +inline std::string ipv6_to_string(const struct in6_addr& addr) { + char buf[INET6_ADDRSTRLEN]; + return inet_ntop(AF_INET6, &addr, buf, INET6_ADDRSTRLEN) ? std::string(buf) : "::"; +} +inline bool string_to_ipv4(const std::string& ip, struct in_addr& out) { + return inet_pton(AF_INET, ip.c_str(), &out) == 1; +} +inline bool string_to_ipv6(const std::string& ip, struct in6_addr& out) { + return inet_pton(AF_INET6, ip.c_str(), &out) == 1; +} +inline std::string gaddr_to_string(const union g_addr& g, nexthop_types_t type) { + if (type == NEXTHOP_TYPE_IPV4 || type == NEXTHOP_TYPE_IPV4_IFINDEX) { + return ipv4_to_string(g.ipv4); + } + return ipv6_to_string(g.ipv6); +} +inline bool string_to_gaddr(const std::string& ip, union g_addr& g, nexthop_types_t type) { + if (type == NEXTHOP_TYPE_IPV4 || type == NEXTHOP_TYPE_IPV4_IFINDEX) { + return string_to_ipv4(ip, g.ipv4); + } + return string_to_ipv6(ip, g.ipv6); +} + +// --- Enum to_json / from_json --- +{%- for enum_name, values in enums.items() %} +inline void to_json(nlohmann::ordered_json& j, const {{ enum_name }}& e) { + static const char* names[] = { + {%- for v in values %} + "{{ v }}", + {%- endfor %} + }; + if (static_cast(e) >= 0 && static_cast(e) < static_cast(sizeof(names)/sizeof(names[0]))) { + j = names[static_cast(e)]; + } else { + j = "UNKNOWN"; + } +} +inline void from_json(const nlohmann::ordered_json& j, {{ enum_name }}& e) { + const std::string s = j; + {%- for v in values %} + if (s == "{{ v }}") { e = static_cast<{{ enum_name }}>({{ loop.index0 }}); return; } + {%- endfor %} + e = static_cast<{{ enum_name }}>(0); // default to first (e.g., *_INVALID or *_UNSPEC) +} +{%- endfor %} + +/* ======== AUTO-GEN each sub structs ======== */ +// Add declaration for each generating func + +{%- for struct_name, struct_info in all_structs.items() %} +{%- if struct_name not in special_structs %} + +// --- {{struct_name}} --- +inline void to_json(nlohmann::ordered_json& j, const {{struct_name}}& obj) { + j = nlohmann::ordered_json{ + {%- for field in struct_info.fields %} + {%- if field.name == "nh4" %} + {"{{field.name}}", ipv4_to_string(obj.nh4)}, + {%- elif field.name == "nh6" %} + {"{{field.name}}", ipv6_to_string(obj.nh6)}, + {%- else %} + {"{{field.name}}", obj.{{field.name}}}, + {%- endif %} + {%- endfor %} + }; +} +inline void from_json(const nlohmann::ordered_json& j, {{struct_name}}& obj) { + {%- for field in struct_info.fields %} + {%- if field.name == "nh4" %} + std::string nh4_str = j.at("nh4"); + string_to_ipv4(nh4_str, obj.nh4); + {%- elif field.name == "nh6" %} + std::string nh6_str = j.at("nh6"); + string_to_ipv6(nh6_str, obj.nh6); + {%- else %} + j.at("{{field.name}}").get_to(obj.{{field.name}}); + {%- endif %} + {%- endfor %} +} + +{%- endif %} +{%- endfor %} + + +// --- seg6_seg_stack --- +inline void to_json(nlohmann::ordered_json& j, const seg6_seg_stack* stack) { + if (!stack) { + j = nullptr; + return; + } + nlohmann::ordered_json segs = nlohmann::ordered_json::array(); + for (int i = 0; i < stack->num_segs; ++i) { + segs.push_back(ipv6_to_string(stack->seg[i])); + } + j = nlohmann::ordered_json{ + {"encap_behavior", stack->encap_behavior}, + {"num_segs", stack->num_segs}, + {"seg", segs} + }; +} +inline void from_json(const nlohmann::ordered_json& j, seg6_seg_stack*& stack) { + if (j.is_null()) { + stack = nullptr; + return; + } + auto behavior = j.at("encap_behavior").get(); + auto segs = j.at("seg").get>(); + size_t total = sizeof(seg6_seg_stack) + segs.size() * sizeof(in6_addr); + stack = static_cast(malloc(total)); + if (!stack) return; + stack->encap_behavior = behavior; + stack->num_segs = static_cast(segs.size()); + for (size_t i = 0; i < segs.size(); ++i) { + string_to_ipv6(segs[i], stack->seg[i]); + } +} + +// --- nexthop_srv6 --- +inline void to_json(nlohmann::ordered_json& j, const nexthop_srv6* srv6) { + if (!srv6) { + j = nullptr; + return; + } + j = nlohmann::ordered_json{ + {"seg6local_action", srv6->seg6local_action}, + {"seg6local_ctx", srv6->seg6local_ctx}, + {"seg6_src", ipv6_to_string(srv6->seg6_src)}, + {"seg6_segs", srv6->seg6_segs} + }; +} +inline void from_json(const nlohmann::ordered_json& j, nexthop_srv6*& srv6) { + if (j.is_null()) { + srv6 = nullptr; + return; + } + srv6 = static_cast(malloc(sizeof(nexthop_srv6))); + *srv6 = nexthop_srv6(); + j.at("seg6local_action").get_to(srv6->seg6local_action); + j.at("seg6local_ctx").get_to(srv6->seg6local_ctx); + j.at("seg6_segs").get_to(srv6->seg6_segs); + std::string nh6_str = j.at("seg6_src"); + string_to_ipv6(nh6_str, srv6->seg6_src); +} + +// --- {{root_struct_name}} --- +inline void to_json(nlohmann::ordered_json& j, const {{root_struct_name}}& nh) { + j = nlohmann::ordered_json{ + {%- set sorted_fields = root_struct.fields | sort(attribute='position') %} + {%- for field in sorted_fields %} + {%- if field.name == "bh_type" %} + {%- elif field.name == "nh_srv6" %} + {%- elif field.name in ["gate", "src", "rmap_src"] %} + {"{{ field.name }}", gaddr_to_string(nh.{{ field.name }}, nh.type)}, + {%- else %} + {"{{ field.name }}", nh.{{ field.name }}}, + {%- endif %} + {%- endfor %} + }; + + // deal with the bh_type + if (nh.type == NEXTHOP_TYPE_BLACKHOLE) { + j["bh_type"] = nh.bh_type; + } + + // deal with the nh_srv6 + if (nh.nh_srv6) { + j["nh_srv6"] = nh.nh_srv6; + } else { + j["nh_srv6"] = nullptr; + } +} +inline void from_json(const nlohmann::ordered_json& j, {{ root_struct_name }}& nh) { + {%- set sorted_fields = root_struct.fields | sort(attribute='position') %} + {%- for field in sorted_fields %} + {%- if field.name in ["gate", "src", "rmap_src"] %} + std::string {{ field.name }}_str = j.at("{{ field.name }}"); + string_to_gaddr({{ field.name }}_str, nh.{{ field.name }}, nh.type); + {%- elif field.name == "bh_type" %} + if (j.contains("bh_type")) { + j.at("bh_type").get_to(nh.bh_type); + } + {%- elif field.name == "nh_srv6" %} + if (j.contains("nh_srv6")) { + j.at("nh_srv6").get_to(nh.nh_srv6); + } else { + nh.nh_srv6 = nullptr; + } + {%- else %} + j.at("{{ field.name }}").get_to(nh.{{ field.name }}); + {%- endif %} + {%- endfor %} +} + +// --- Top-level string helpers --- +inline std::string to_json_string({{ root_struct_name }}& obj) { + return nlohmann::ordered_json(obj).dump(); +} + +inline bool from_json_string(std::string& json_str, {{ root_struct_name }}& out_obj) { + try { + auto j = nlohmann::ordered_json::parse(json_str); + j.get_to(out_obj); + return true; + } catch (const std::exception&) { + return false; + } +} + +} // namespace fib \ No newline at end of file diff --git a/src/libraries/sonic-fib/tests/Makefile.am b/src/libraries/sonic-fib/tests/Makefile.am new file mode 100644 index 00000000000..6c8dba824cc --- /dev/null +++ b/src/libraries/sonic-fib/tests/Makefile.am @@ -0,0 +1,19 @@ +# Build test binary during 'make', but never install it +noinst_PROGRAMS = tests/tests + +# Register test binary to be executed by 'make check' +TESTS = tests/tests + +CFLAGS_GTEST = +LDADD_GTEST = -L/usr/src/gtest -lgtest -lgtest_main -lgmock -lgmock_main + +tests_tests_SOURCES = tests/c_api_ut.cpp \ + tests/nexthopgroupfull_ut.cpp \ + tests/nexthopgroupfull_json_ut.cpp \ + tests/nexthopgroup_debug_ut.cpp \ + tests/main.cpp + +tests_tests_CFLAGS = $(DBGFLAGS) $(AM_CFLAGS) $(CFLAGS_COMMON) $(CFLAGS_GTEST) +tests_tests_CPPFLAGS = $(DBGFLAGS) $(AM_CFLAGS) $(CFLAGS_COMMON) $(CFLAGS_GTEST) -fno-access-control +tests_tests_LDADD = $(LDADD_GTEST) -lpthread src/libnexthopgroup.la $(CODE_COVERAGE_LIBS) -lzmq -luuid -lboost_serialization + diff --git a/src/libraries/sonic-fib/tests/c_api_ut.cpp b/src/libraries/sonic-fib/tests/c_api_ut.cpp new file mode 100644 index 00000000000..9337fe4636d --- /dev/null +++ b/src/libraries/sonic-fib/tests/c_api_ut.cpp @@ -0,0 +1,283 @@ +#include +#include +#include +#include +#include +#include + +#include +#include + +#include + +#include "src/c-api/nexthopgroup_capi.h" +#include "src/nexthopgroupfull.h" +#include "src/nexthopgroupfull_json.h" +#include "src/c_nexthopgroupfull.h" + +using namespace std; +using fib::from_json; +using fib::to_json; + + +TEST(NextHopGroupFull_CAPI, multi_nexthop) { + cout << "TEST_NextHopGroupFull_CAPI::multi_nexthop started: " << endl; + cout << "[DEBUG] Constructing values ..." << endl; + + /* Prepare the parameters */ + C_NextHopGroupFull c_nhg = {}; + + c_nhg.id = 100; + c_nhg.key = 1234567; + c_nhg.nhg_flags = 1024; + + // set up nh_grp_full_list + struct C_nh_grp_full nh1 = {}; + nh1.id = 200; + nh1.weight = 1; + nh1.num_direct = 0; + c_nhg.nh_grp_full_list[0] = nh1; + + struct C_nh_grp_full nh2 = {}; + nh2.id = 300; + nh2.weight = 1; + nh2.num_direct = 2; + c_nhg.nh_grp_full_list[1] = nh2; + + struct C_nh_grp_full nh3 = {}; + nh3.id = 310; + nh3.weight = 2; + nh3.num_direct = 0; + c_nhg.nh_grp_full_list[2] = nh3; + + struct C_nh_grp_full nh4 = {}; + nh4.id = 320; + nh4.weight = 2; + nh4.num_direct = 0; + c_nhg.nh_grp_full_list[3] = nh4; + + struct C_nh_grp_full nh5 = {}; + nh5.id = 400; + nh5.weight = 1; + nh5.num_direct = 0; + c_nhg.nh_grp_full_list[4] = nh5; + + // terminate the list with id = 0 + c_nhg.nh_grp_full_list[5].id = 0; + + // set up depends + c_nhg.depends[0] = 200; + c_nhg.depends[1] = 300; + c_nhg.depends[2] = 400; + c_nhg.depends[3] = 0; + + // set up dependents + c_nhg.dependents[0] = 500; + c_nhg.dependents[1] = 600; + c_nhg.dependents[2] = 0; + + /* Call c-api to convert C_NextHopGroupFull to C++ NextHopGroupFull and return JSON string */ + cout << "[DEBUG] Calling nexthopgroupfull_json_from_c_nhg_multi ..." << endl; + char* json_str = nexthopgroupfull_json_from_c_nhg_multi(&c_nhg, 5, 3, 2, false); + + ASSERT_NE(json_str, nullptr) << "[ERROR] C-API returned nullptr"; + + /* Output the generated JSON string */ + cout << " [DEBUG] The generated JSON string is:" << endl; + cout << " " << json_str << endl; + + /* Parse JSON string and deserialize to C++ object */ + cout << "[DEBUG] Parsing JSON string and deserializing to C++ object ..." << endl; + nlohmann::ordered_json j = nlohmann::json::parse(json_str); + fib::NextHopGroupFull cpp_nhg; + from_json(j, cpp_nhg); + + /* Verify round-trip conversion by comparing C structure and C++ object */ + cout << "[DEBUG] Verifying C_NextHopGroupFull vs C++ NextHopGroupFull ..." << endl; + // verify basic fields + EXPECT_EQ(cpp_nhg.id, c_nhg.id); + EXPECT_EQ(cpp_nhg.key, c_nhg.key); + EXPECT_EQ(cpp_nhg.nhg_flags, c_nhg.nhg_flags); + // verify nh_grp_full_list + EXPECT_EQ(cpp_nhg.nh_grp_full_list.size(), 5); + for (int i = 0; i < 5; i++) { + EXPECT_EQ(cpp_nhg.nh_grp_full_list[i].id, c_nhg.nh_grp_full_list[i].id); + EXPECT_EQ(cpp_nhg.nh_grp_full_list[i].weight, c_nhg.nh_grp_full_list[i].weight); + EXPECT_EQ(cpp_nhg.nh_grp_full_list[i].num_direct, c_nhg.nh_grp_full_list[i].num_direct); + } + // verify depends + EXPECT_EQ(cpp_nhg.depends.size(), 3); + for (int i = 0; i < 3; i++) { + EXPECT_EQ(cpp_nhg.depends[i], c_nhg.depends[i]); + } + // verify dependents + EXPECT_EQ(cpp_nhg.dependents.size(), 2); + for (int i = 0; i < 2; i++) { + EXPECT_EQ(cpp_nhg.dependents[i], c_nhg.dependents[i]); + } + + /* Clean up */ + free(json_str); + + cout << "TEST_NextHopGroupFull_CAPI::multi_nexthop finished." << endl; +} + +TEST(NextHopGroupFull_CAPI, singleton) { + cout << "TEST_NextHopGroupFull_CAPI::singleton started:" << endl; + cout << "[DEBUG] Constructing C_NextHopGroupFull type singleton values ..." << endl; + + /* Prepare the parameters */ + C_NextHopGroupFull c_nhg = {}; + + c_nhg.id = 100; + c_nhg.key = 1234567; + c_nhg.type = C_NEXTHOP_TYPE_IPV6; + c_nhg.vrf_id = 101; + c_nhg.ifindex = 101; + c_nhg.nh_label_type = C_ZEBRA_LSP_NONE; + c_nhg.bh_type = C_BLACKHOLE_NULL; + c_nhg.weight = 8; + c_nhg.flags = 8; + c_nhg.nhg_flags = 1024; + + // set up addresses + inet_pton(AF_INET6, "2001:db8::1", &c_nhg.gate.ipv6.s6_addr); + inet_pton(AF_INET6, "2001:db8::2", &c_nhg.src.ipv6.s6_addr); + inet_pton(AF_INET6, "2001:db8::3", &c_nhg.rmap_src.ipv6.s6_addr); + + // set up depends and dependents + c_nhg.depends[0] = 200; + c_nhg.depends[1] = 300; + c_nhg.depends[2] = 400; + c_nhg.depends[3] = 0; + + c_nhg.dependents[0] = 500; + c_nhg.dependents[1] = 600; + c_nhg.dependents[2] = 0; + + // prepare segment list + vector test_nh_segs(3); + inet_pton(AF_INET6, "2001:db8:1::1", test_nh_segs[0].s6_addr); + inet_pton(AF_INET6, "2001:db8:1::2", test_nh_segs[1].s6_addr); + inet_pton(AF_INET6, "2001:db8:1::3", test_nh_segs[2].s6_addr); + + // prepare seg6_segs + size_t total = sizeof(struct C_seg6_seg_stack) + + test_nh_segs.size() * sizeof(struct in6_addr); + struct C_seg6_seg_stack* test_nh_seg6_segs = + (struct C_seg6_seg_stack*)malloc(total); + test_nh_seg6_segs->encap_behavior = C_SRV6_HEADEND_BEHAVIOR_H_ENCAPS; + test_nh_seg6_segs->num_segs = 3; + memcpy(test_nh_seg6_segs->seg, test_nh_segs.data(), + test_nh_segs.size() * sizeof(in6_addr)); + + // Prepare seg6local_flavors_info + struct C_seg6local_flavors_info test_flv = { + .flv_ops = 100, + .lcblock_len = 20, + .lcnode_func_len = 16 + }; + + // Prepare seg6local_ctx + struct C_seg6local_context test_seg6local_ctx = {}; + inet_pton(AF_INET, "192.168.10.1", &test_seg6local_ctx.nh4.s_addr); + inet_pton(AF_INET6, "2001:db8::a", &test_seg6local_ctx.nh6.s6_addr); + test_seg6local_ctx.table = 100; + test_seg6local_ctx.block_len = 36; + test_seg6local_ctx.node_len = 12; + test_seg6local_ctx.function_len = 20; + test_seg6local_ctx.argument_len = 16; + memcpy(&test_seg6local_ctx.flv, &test_flv, sizeof(struct C_seg6local_flavors_info)); + + // Prepare nh_srv6 + struct C_nexthop_srv6* test_nh_srv6 = + (struct C_nexthop_srv6*)malloc(sizeof(struct C_nexthop_srv6)); + memset(test_nh_srv6, 0, sizeof(struct C_nexthop_srv6)); + test_nh_srv6->seg6local_action = C_SEG6_LOCAL_ACTION_END_DT6; + memcpy(&test_nh_srv6->seg6local_ctx, &test_seg6local_ctx, + sizeof(struct C_seg6local_context)); + test_nh_srv6->seg6_segs = test_nh_seg6_segs; + + c_nhg.nh_srv6 = test_nh_srv6; + + /* Call c-api to convert C_NextHopGroupFull to C++ NextHopGroupFull and return JSON string */ + cout << "[DEBUG] Calling nexthopgroupfull_json_from_c_nhg_singleton ..." << endl; + char* json_str = nexthopgroupfull_json_from_c_nhg_singleton(&c_nhg, 3, 2); + + ASSERT_NE(json_str, nullptr) << "[ERROR] C-API returned nullptr"; + + /* Output the generated JSON string */ + cout << " [DEBUG] The generated JSON string is:" << endl; + cout << " " << json_str << endl; + + /* Parse JSON string and deserialize to C++ object */ + cout << "[DEBUG] Parsing JSON string and deserializing to C++ object ..." << endl; + nlohmann::ordered_json j = nlohmann::json::parse(json_str); + fib::NextHopGroupFull cpp_nhg; + from_json(j, cpp_nhg); + + /* Verify round-trip conversion by comparing C structure and C++ object */ + cout << "[DEBUG] Verifying C_NextHopGroupFull vs C++ NextHopGroupFull ..." << endl; + // verify basic fields + EXPECT_EQ(cpp_nhg.id, c_nhg.id); + EXPECT_EQ(cpp_nhg.key, c_nhg.key); + EXPECT_EQ(cpp_nhg.type, c_nhg.type); + EXPECT_EQ(cpp_nhg.vrf_id, c_nhg.vrf_id); + EXPECT_EQ(cpp_nhg.ifindex, c_nhg.ifindex); + EXPECT_EQ(cpp_nhg.weight, c_nhg.weight); + EXPECT_EQ(cpp_nhg.flags, c_nhg.flags); + EXPECT_EQ(cpp_nhg.nhg_flags, c_nhg.nhg_flags); + EXPECT_EQ(cpp_nhg.nh_label_type, c_nhg.nh_label_type); + EXPECT_EQ(cpp_nhg.bh_type, c_nhg.bh_type); + + // verify addresses + EXPECT_EQ(memcmp(&cpp_nhg.gate.ipv6, &c_nhg.gate.ipv6, sizeof(struct in6_addr)), 0); + EXPECT_EQ(memcmp(&cpp_nhg.src.ipv6, &c_nhg.src.ipv6, sizeof(struct in6_addr)), 0); + EXPECT_EQ(memcmp(&cpp_nhg.rmap_src.ipv6, &c_nhg.rmap_src.ipv6, sizeof(struct in6_addr)), 0); + + // verify depends + EXPECT_EQ(cpp_nhg.depends.size(), 3); + EXPECT_EQ(cpp_nhg.depends[0], c_nhg.depends[0]); + EXPECT_EQ(cpp_nhg.depends[1], c_nhg.depends[1]); + EXPECT_EQ(cpp_nhg.depends[2], c_nhg.depends[2]); + + // verify dependents + EXPECT_EQ(cpp_nhg.dependents.size(), 2); + EXPECT_EQ(cpp_nhg.dependents[0], c_nhg.dependents[0]); + EXPECT_EQ(cpp_nhg.dependents[1], c_nhg.dependents[1]); + + // verify SRv6 basic information + ASSERT_NE(cpp_nhg.nh_srv6, nullptr) << "nh_srv6 should not be null"; + EXPECT_EQ(cpp_nhg.nh_srv6->seg6local_action, c_nhg.nh_srv6->seg6local_action); + // verify seg6local_ctx + EXPECT_EQ(cpp_nhg.nh_srv6->seg6local_ctx.table, c_nhg.nh_srv6->seg6local_ctx.table); + EXPECT_EQ(cpp_nhg.nh_srv6->seg6local_ctx.block_len, c_nhg.nh_srv6->seg6local_ctx.block_len); + EXPECT_EQ(cpp_nhg.nh_srv6->seg6local_ctx.node_len, c_nhg.nh_srv6->seg6local_ctx.node_len); + EXPECT_EQ(cpp_nhg.nh_srv6->seg6local_ctx.function_len, c_nhg.nh_srv6->seg6local_ctx.function_len); + EXPECT_EQ(cpp_nhg.nh_srv6->seg6local_ctx.argument_len, c_nhg.nh_srv6->seg6local_ctx.argument_len); + // verify seg6local_ctx.flv + EXPECT_EQ(cpp_nhg.nh_srv6->seg6local_ctx.flv.flv_ops, c_nhg.nh_srv6->seg6local_ctx.flv.flv_ops); + EXPECT_EQ(cpp_nhg.nh_srv6->seg6local_ctx.flv.lcblock_len, c_nhg.nh_srv6->seg6local_ctx.flv.lcblock_len); + EXPECT_EQ(cpp_nhg.nh_srv6->seg6local_ctx.flv.lcnode_func_len, c_nhg.nh_srv6->seg6local_ctx.flv.lcnode_func_len); + // verify seg6local_ctx nh4 and nh6 + EXPECT_EQ(memcmp(&cpp_nhg.nh_srv6->seg6local_ctx.nh4, &c_nhg.nh_srv6->seg6local_ctx.nh4, + sizeof(struct in_addr)), 0); + EXPECT_EQ(memcmp(&cpp_nhg.nh_srv6->seg6local_ctx.nh6, &c_nhg.nh_srv6->seg6local_ctx.nh6, + sizeof(struct in6_addr)), 0); + // verify seg6_segs + ASSERT_NE(cpp_nhg.nh_srv6->seg6_segs, nullptr) << "seg6_segs should not be null"; + EXPECT_EQ(cpp_nhg.nh_srv6->seg6_segs->encap_behavior, c_nhg.nh_srv6->seg6_segs->encap_behavior); + EXPECT_EQ(cpp_nhg.nh_srv6->seg6_segs->num_segs, c_nhg.nh_srv6->seg6_segs->num_segs); + // verify segment list + for (size_t i = 0; i < cpp_nhg.nh_srv6->seg6_segs->num_segs; i++) { + EXPECT_EQ(memcmp(&cpp_nhg.nh_srv6->seg6_segs->seg[i], &c_nhg.nh_srv6->seg6_segs->seg[i], + sizeof(struct in6_addr)), 0); + } + + /* Clean up */ + free(json_str); + free(test_nh_srv6->seg6_segs); + free(test_nh_srv6); + + cout << "TEST_NextHopGroupFull_CAPI::singleton finished." << endl; +} \ No newline at end of file diff --git a/src/libraries/sonic-fib/tests/main.cpp b/src/libraries/sonic-fib/tests/main.cpp new file mode 100644 index 00000000000..b11b22f59ba --- /dev/null +++ b/src/libraries/sonic-fib/tests/main.cpp @@ -0,0 +1,17 @@ +#include "gtest/gtest.h" +#include + +class FibEnvironment : public ::testing::Environment { +public: + // Override this to define how to set up the environment. + void SetUp() override { + } +}; + +int main(int argc, char* argv[]) +{ + testing::InitGoogleTest(&argc, argv); + FibEnvironment* const env = new FibEnvironment; + testing::AddGlobalTestEnvironment(env); + return RUN_ALL_TESTS(); +} diff --git a/src/libraries/sonic-fib/tests/nexthopgroup_debug_ut.cpp b/src/libraries/sonic-fib/tests/nexthopgroup_debug_ut.cpp new file mode 100644 index 00000000000..3dcb59ea2f6 --- /dev/null +++ b/src/libraries/sonic-fib/tests/nexthopgroup_debug_ut.cpp @@ -0,0 +1,117 @@ +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include + +#include "src/c-api/nexthopgroup_capi.h" +#include "src/nexthopgroup_debug.h" +#include // for std::array +#include + +using namespace std; +using namespace fib; + +// Test C++ API registration and logging +TEST(NextHopGroupDEBUG_API, register) { + + setLogLevel(fib::LogLevel::DEBUG); + FIB_LOG(fib::LogLevel::DEBUG, "Current log level: %d", static_cast(getLogLevel())); + ASSERT_EQ(getLogLevel(), fib::LogLevel::DEBUG); // Default is DEBUG + + setLogLevel(fib::LogLevel::INFO); + FIB_LOG(fib::LogLevel::INFO, "Current log level after setting: %d", static_cast(getLogLevel())); + ASSERT_EQ(getLogLevel(), fib::LogLevel::INFO); // Change to INFO + registerLogCallback([](fib::LogLevel lvl, const char* file, int line, + const char* func, const char* format, va_list args) { + const char* level_str = "DEBUG"; + switch (lvl) { + case fib::LogLevel::INFO: level_str = "INFO"; break; + case fib::LogLevel::WARN: level_str = "WARN"; break; + case fib::LogLevel::ERROR: level_str = "ERROR"; break; + default: break; + } + + if (static_cast(lvl) < static_cast(getLogLevel())) { + return; // Skip messages below current log level + } + // Format the variadic arguments into a buffer + std::array buf; + va_list args_copy; + va_copy(args_copy, args); + int len = vsnprintf(buf.data(), buf.size(), format, args_copy); + va_end(args_copy); + if (len > 0 && len < static_cast(buf.size())) { + cout << "[" << level_str << "] " << file << ":" << line << " " << func << " - " << buf.data() << endl; + } + }); + + FIB_LOG(fib::LogLevel::DEBUG, "Test log with registered callback - DEBUG level"); + FIB_LOG(fib::LogLevel::INFO, "Test log with registered callback - INFO level"); +} + +// Ensure C linkage for the callback function to match C ABI expectations +extern "C" { + +/* Map fib-sonic levels to syslog priorities used by FRR */ +static int fib_level_to_syslog(int level) +{ + switch (level) { + case 0: return LOG_DEBUG; // DEBUG + case 1: return LOG_INFO; // INFO + case 2: return LOG_WARNING; // WARN + case 3: return LOG_ERR; // ERROR + default: return LOG_DEBUG; + } +} +static void frr_log_forwarder(int level, + const char *file, + int line, + const char *func, + const char *fmt, + va_list args) +{ + int syslog_prio = fib_level_to_syslog(level); + + int current_log_level = -1; + try { + current_log_level = fib_frr_get_log_level(); + } catch (...) { + current_log_level = -1; // fallback on error + } + if (level < current_log_level) { + return; // Skip messages below current log level + } + fprintf(stderr, "[LVL=%d %s:%d %s] ", syslog_prio, file, line, func); + // Core: print formatted message to stderr using va_list + vfprintf(stderr, fmt, args); + fprintf(stderr, "\n"); // Add newline (vfprintf does not add one automatically) +} + +} // extern "C" +// Test C API registration and logging +TEST(NextHopGroupDEBUG_CAPI, register_c) { + fib_frr_set_log_level(0); // Set back to DEBUG + LogLevel level = getLogLevel(); + FIB_LOG(fib::LogLevel::DEBUG, "Current log level: %d", static_cast(level)); + ASSERT_EQ(getLogLevel(), fib::LogLevel::DEBUG); // Default is DEBUG + fib_frr_register_callback(nullptr); // Unregister callback to test default logging + FIB_LOG(fib::LogLevel::DEBUG, "Test log with default logger - DEBUG level"); + FIB_LOG(fib::LogLevel::INFO, "Test log with default logger - INFO level"); + + fib_frr_set_log_level(1); // INFO + level = getLogLevel(); + FIB_LOG(fib::LogLevel::INFO, "Current log level after setting: %d", static_cast(level)); + ASSERT_EQ(getLogLevel(), fib::LogLevel::INFO); // Change to INFO + + fib_frr_register_callback(frr_log_forwarder); // Register callback to test default logging + FIB_LOG(fib::LogLevel::DEBUG, "Test log with C callback logger - DEBUG level"); + FIB_LOG(fib::LogLevel::INFO, "Test log with C callback logger - INFO level"); +} \ No newline at end of file diff --git a/src/libraries/sonic-fib/tests/nexthopgroupfull_json_ut.cpp b/src/libraries/sonic-fib/tests/nexthopgroupfull_json_ut.cpp new file mode 100644 index 00000000000..938b8b5e6ce --- /dev/null +++ b/src/libraries/sonic-fib/tests/nexthopgroupfull_json_ut.cpp @@ -0,0 +1,690 @@ +#include +#include + +#include +#include + +#include + +#include "src/nexthopgroupfull.h" +#include "src/nexthopgroupfull_json.h" + +using namespace std; +using namespace fib; + +static nh_grp_full make_nh_grp_full(uint32_t id, uint16_t weight, uint32_t num_direct) { + return {id, weight, num_direct}; +} + +TEST(EnumToJson, nexthop_type) +{ + cout << "TEST_EnumToJson::nexthop_type started: " << endl; + cout << "[DEBUG] Preparing values ..." << endl; + /* Prepare the value */ + fib::nexthop_types_t test_val = NEXTHOP_TYPE_IPV4_IFINDEX; + + /* Call to_json function */ + cout << "[DEBUG] Calling to_json function for enum nexthop_types_t ..." << endl; + nlohmann::ordered_json j; + fib::to_json(j, test_val); + + /* Output the constructed JSON string */ + cout << " [DEBUG] The constructed JSON string is:" << endl; + cout << " " << j.dump(4) << std::endl; + /* Check the value of constructed JSON */ + cout << "[DEBUG] Checking JSON string values ..." << endl; + EXPECT_EQ(j, "NEXTHOP_TYPE_IPV4_IFINDEX"); + + /* Call from_json function */ + cout << "[DEBUG] Calling from_json function for enum nexthop_types_t ..." << endl; + fib::nexthop_types_t parsed_val; + fib::from_json(j, parsed_val); + + /* Check the value of struct parsed from JSON */ + cout << "[DEBUG] Checking STRUCT value parsed from JSON string ..." << endl; + EXPECT_EQ(parsed_val, test_val); + + cout << "TEST_EnumToJson::nexthop_type finished." << endl; +} + +TEST(EnumToJson, blackhole_type) +{ + cout << "TEST_EnumToJson::blackhole_type started: " << endl; + /* Prepare the value */ + cout << "[DEBUG] Preparing values ..." << endl; + fib::blackhole_type test_val = BLACKHOLE_REJECT; + + /* Call to_json function */ + cout << "[DEBUG] Calling to_json function for enum blackhole_type ..." << endl; + nlohmann::ordered_json j; + fib::to_json(j, test_val); + + /* Output the constructed JSON string */ + cout << " [DEBUG] The constructed JSON string is:" << endl; + cout << " " << j.dump(4) << endl; + /* Check the value of constructed JSON */ + EXPECT_EQ(j, "BLACKHOLE_REJECT"); + + /* Call from_json function */ + cout << "[DEBUG] Calling from_json function for enum blackhole_type ..." << endl; + fib::blackhole_type parsed_val; + fib::from_json(j, parsed_val); + + /* Check the value of struct parsed from JSON */ + cout << "[DEBUG] Checking STRUCT value parsed from JSON string ..." << endl; + EXPECT_EQ(parsed_val, test_val); + + cout << "TEST_EnumToJson::blackhole_type finished." << endl; +} + +TEST(EnumToJson, lsp_type) +{ + cout << "Test_EnumToJson::lsp_type started: " << endl; + /* Prepare the value */ + cout << "[DEBUG] Preparing values ..." << endl; + fib::lsp_types_t test_val = ZEBRA_LSP_BGP; + + /* Call to_json function */ + cout << "[DEBUG] Calling to_json function for enum lsp_types_t ..." << endl; + nlohmann::ordered_json j; + fib::to_json(j, test_val); + + /* Output the constructed JSON string */ + cout << " [DEBUG] The constructed JSON string is:" << endl; + cout << " " << j.dump(4) << endl; + /* Check the value of constructed JSON */ + EXPECT_EQ(j, "ZEBRA_LSP_BGP"); + + /* Call from_json function */ + cout << "[DEBUG] Calling from_json function for enum lsp_types_t ..." << endl; + fib::lsp_types_t parsed_val; + fib::from_json(j, parsed_val); + + /* Check the value of struct parsed from JSON */ + cout << "[DEBUG] Checking STRUCT value parsed from JSON string ..." << endl; + EXPECT_EQ(parsed_val, test_val); + + cout << "TEST_EnumToJson::lsp_types_t finished." << endl; +} + +TEST(EnumToJson, seg6local_action) +{ + cout << "Test_EnumToJson::seg6local_action started: " << endl; + /* Prepare the value */ + cout << "[DEBUG] Preparing values ..." << endl; + fib::seg6local_action_t test_val = SEG6_LOCAL_ACTION_END_DT46; + + /* Call to_json function */ + cout << "[DEBUG] Calling to_json function for enum seg6local_action_t ..." << endl; + nlohmann::ordered_json j; + fib::to_json(j, test_val); + + /* Output the constructed JSON string */ + cout << " [DEBUG] The constructed JSON string is:" << endl; + cout << " " << j.dump(4) << endl; + /* Check the value of constructed JSON */ + EXPECT_EQ(j, "SEG6_LOCAL_ACTION_END_DT46"); + + /* Call from_json function */ + cout << "[DEBUG] Calling from_json function for enum seg6local_action_t ..." << endl; + fib::seg6local_action_t parsed_val; + fib::from_json(j, parsed_val); + + /* Check the value of struct parsed from JSON */ + cout << "[DEBUG] Checking STRUCT value parsed from JSON string ..." << endl; + EXPECT_EQ(parsed_val, test_val); + + cout << "TEST_EnumToJson::seg6local_action_t finished." << endl; +} + +TEST(EnumToJson, srv6_headend_behavior) +{ + cout << "Test_EnumToJson::srv6_headend_behavior started: " << endl; + /* Prepare the value */ + cout << "[DEBUG] Preparing value ..." << endl; + fib::srv6_headend_behavior test_val = SRV6_HEADEND_BEHAVIOR_H_INSERT; + + /* Call to_json function */ + cout << "[DEBUG] Calling to_json function for enum srv6_headend_behavior ..." << endl; + nlohmann::ordered_json j; + fib::to_json(j, test_val); + + /* Output the constructed JSON string */ + cout << " [DEBUG] The constructed JSON string is:" << endl; + cout << " " << j.dump(4) << endl; + /* Check the value of constructed JSON */ + EXPECT_EQ(j, "SRV6_HEADEND_BEHAVIOR_H_INSERT"); + + /* Call from_json function */ + cout << "[DEBUG] Calling from_json function for enum sev6_headend_behavior ..." << endl; + fib::srv6_headend_behavior parsed_val; + fib::from_json(j, parsed_val); + + /* Check the value of struct parsed from JSON */ + cout << "[DEBUG] Checking STRUCT value parsed from JSON string ..." << endl; + EXPECT_EQ(parsed_val, test_val); + + cout << "TEST_EnumToJson::srv6_headend_behavior finishd." << endl; +} + + +// --- Test: nh_grp_full --- +TEST(StructToFromJson, nh_grp_full) +{ + cout << "TEST_StructToFromJson::nh_grp_full started:" << endl; + /* Prepare the value */ + cout << "[DEBUG] Preparing values ..." << endl; + fib::nh_grp_full test_val{1001, 5, 3}; + + /* Call to_json function */ + cout << "[DEBUG] Calling to_json for nh_grp_full ..." << endl; + nlohmann::ordered_json j; + fib::to_json(j, test_val); + + /* Output the constructed JSON string */ + cout << " [DEBUG] The constructed JSON string is:" << endl; + cout << " " << j.dump(4) << endl; + /* Check the values of constructed JSON */ + EXPECT_EQ(j["id"], 1001); + EXPECT_EQ(j["weight"], 5); + EXPECT_EQ(j["num_direct"], 3); + + /* Call from_json function */ + cout << "[DEBUG] Calling from_json for nh_grp_full ..." << endl; + fib::nh_grp_full parsed_val; + fib::from_json(j, parsed_val); + + /* Check the value of nh_grp_full struct parsed from JSON */ + cout << "[DEBUG] Checking STRUCT value parsed from JSON string ..." << endl; + EXPECT_EQ(parsed_val.id, test_val.id); + EXPECT_EQ(parsed_val.weight, test_val.weight); + EXPECT_EQ(parsed_val.num_direct, test_val.num_direct); + + cout << "TEST_StructToFromJson::nh_grp_full finished." << endl; +} + +// --- Test: seg6local_flavors_info --- +TEST(StructToFromJson, seg6local_flavors_info) +{ + cout << "TEST_StructToFromJson::seg6local_flavors_info started:" << endl; + /* Prepare the value */ + cout << "[DEBUG] Preparing values ..." << endl; + fib::seg6local_flavors_info test_val{1000, 32, 16}; + + /* Call to_json function */ + cout << "[DEBUG] Calling to_json for seg6local_flavors_info ..." << endl; + nlohmann::ordered_json j; + fib::to_json(j, test_val); + + /* Output the constructed JSON string */ + cout << " [DEBUG] The constructed JSON string is:" << endl; + cout << " " << j.dump(4) << endl; + /* Check the values of constructed JSON */ + EXPECT_EQ(j["flv_ops"], test_val.flv_ops); + EXPECT_EQ(j["lcblock_len"], test_val.lcblock_len); + EXPECT_EQ(j["lcnode_func_len"], test_val.lcnode_func_len); + + /* Call from_json function */ + cout << "[DEBUG] Calling from_json for seg6local_flavors_info ..." << endl; + fib::seg6local_flavors_info parsed_val; + fib::from_json(j, parsed_val); + + /* Check the value of seg6local_flavors_info struct parsed from JSON */ + cout << "[DEBUG] Checking STRUCT value parsed from JSON string ..." << endl; + EXPECT_EQ(parsed_val.flv_ops, test_val.flv_ops); + EXPECT_EQ(parsed_val.lcblock_len, test_val.lcblock_len); + EXPECT_EQ(parsed_val.lcnode_func_len, test_val.lcnode_func_len); + + cout << "TEST_StructToFromJson::seg6local_flavors_info finished." << endl; +} + +// --- Helper for IP conversion in tests --- +static void set_ipv4(struct in_addr& addr, const char* ip_str) { + ASSERT_EQ(inet_pton(AF_INET, ip_str, &addr), 1); +} +static void set_ipv6(struct in6_addr& addr, const char* ip_str) { + ASSERT_EQ(inet_pton(AF_INET6, ip_str, &addr), 1); +} + +// --- Test: seg6local_context --- +TEST(StructToFromJson, seg6local_context) +{ + cout << "TEST_StructToFromJson::seg6local_context started:" << endl; + /* Prepare the value */ + cout << "[DEBUG] Preparing values ..." << endl; + fib::seg6local_context test_val{}; + char* test_nh4 = "192.168.10.1"; + char* test_nh6 = "2001:db8::a"; + set_ipv4(test_val.nh4, test_nh4); + set_ipv6(test_val.nh6, test_nh6); + test_val.table = 100; + test_val.flv = {1000, 32,16}; + test_val.block_len = 32; + test_val.node_len = 16; + test_val.function_len = 16; + test_val.argument_len = 0; + + /* Call to_json function */ + cout << "[DEBUG] Calling to_json for seg6local_context ..." << endl; + nlohmann::ordered_json j; + fib::to_json(j, test_val); + + /* Output the constructed JSON string */ + cout << " [DEBUG] The constructed JSON string is:" << endl; + cout << " " << j.dump(4) << endl; + /* Check the values of constructed JSON */ + EXPECT_EQ(j["nh4"], test_nh4); + EXPECT_EQ(j["nh6"], test_nh6); + EXPECT_EQ(j["table"], test_val.table); + EXPECT_EQ(j["flv"]["flv_ops"], test_val.flv.flv_ops); + EXPECT_EQ(j["flv"]["lcblock_len"], test_val.flv.lcblock_len); + EXPECT_EQ(j["flv"]["lcnode_func_len"], test_val.flv.lcnode_func_len); + EXPECT_EQ(j["block_len"], test_val.block_len); + EXPECT_EQ(j["node_len"], test_val.node_len); + EXPECT_EQ(j["function_len"], test_val.function_len); + EXPECT_EQ(j["argument_len"], test_val.argument_len); + + /* Call from_json function */ + cout << "[DEBUG] Calling from_json for seg6local_context ..." << endl; + fib::seg6local_context parsed_val; + fib::from_json(j, parsed_val); + + /* Check the value of seg6local_context struct parsed from JSON */ + cout << "[DEBUG] Checking STRUCT value parsed from JSON string ..." << endl; + char buf4[INET_ADDRSTRLEN], buf6[INET6_ADDRSTRLEN]; + inet_ntop(AF_INET, &parsed_val.nh4, buf4, sizeof(buf4)); + inet_ntop(AF_INET6, &parsed_val.nh6, buf6, sizeof(buf6)); + EXPECT_STREQ(buf4, test_nh4); + EXPECT_STREQ(buf6, test_nh6); + EXPECT_EQ(parsed_val.table, test_val.table); + EXPECT_EQ(parsed_val.flv.flv_ops, test_val.flv.flv_ops); + EXPECT_EQ(parsed_val.flv.lcblock_len, test_val.flv.lcblock_len); + EXPECT_EQ(parsed_val.flv.lcnode_func_len, test_val.flv.lcnode_func_len); + EXPECT_EQ(parsed_val.block_len, test_val.block_len); + EXPECT_EQ(parsed_val.node_len, test_val.node_len); + EXPECT_EQ(parsed_val.function_len, test_val.function_len); + EXPECT_EQ(parsed_val.argument_len, test_val.argument_len); + + cout << "TEST_StructToFromJson::seg6local_context finished." << endl; +} + +// --- Test: seg6_seg_stack* (pointer) --- +TEST(StructToFromJson, seg6_seg_stack_ptr) +{ + cout << "TEST_StructToFromJson::seg6_seg_stack_ptr started:" << endl; + /* Prepare the value */ + cout << "[DEBUG] Preparing values ..." << endl; + std::vector test_segs = {"2001:db8::1", "2001:db8::2"}; + size_t total = sizeof(fib::seg6_seg_stack) + test_segs.size() * sizeof(in6_addr); + fib::seg6_seg_stack* test_val = static_cast(malloc(total)); + ASSERT_NE(test_val, nullptr); + test_val->encap_behavior = fib::SRV6_HEADEND_BEHAVIOR_H_ENCAPS; + test_val->num_segs = 2; + for (size_t i = 0; i < test_segs.size(); ++i) { + set_ipv6(test_val->seg[i], test_segs[i].c_str()); + } + + /* Call to_json function */ + cout << "[DEBUG] Calling to_json for seg6_seg_stack_ptr ..." << endl; + nlohmann::ordered_json j; + fib::to_json(j, test_val); + + /* Output the constructed JSON string */ + cout << " [DEBUG] The constructed JSON string is:" << endl; + cout << " " << j.dump(4) << endl; + /* Check the values of constructed JSON */ + EXPECT_EQ(j["encap_behavior"], "SRV6_HEADEND_BEHAVIOR_H_ENCAPS"); + auto j_segs_out = j["seg"].get>(); + EXPECT_EQ(j["num_segs"], test_val->num_segs); + EXPECT_EQ(j_segs_out.size(), 2); + EXPECT_EQ(j_segs_out[0], "2001:db8::1"); + EXPECT_EQ(j_segs_out[1], "2001:db8::2"); + + /* Call from_json function */ + cout << "[DEBUG] Calling from_json for seg6_seg_stack_ptr ..." << endl; + fib::seg6_seg_stack* parsed_val = nullptr; + fib::from_json(j, parsed_val); + ASSERT_NE(parsed_val, nullptr); + + cout << "[DEBUG] Checking parsed values ..." << endl; + EXPECT_EQ(parsed_val->encap_behavior, test_val->encap_behavior); + EXPECT_EQ(parsed_val->num_segs, test_val->num_segs); + for (int i = 0; i < parsed_val->num_segs; ++i) { + char test_buf[INET6_ADDRSTRLEN], parsed_buf[INET6_ADDRSTRLEN]; + inet_ntop(AF_INET6, &test_val->seg[i], test_buf, sizeof(test_buf)); + inet_ntop(AF_INET6, &parsed_val->seg[i], parsed_buf, sizeof(parsed_buf)); + EXPECT_STREQ(test_buf, parsed_buf); + } + + // Cleanup + free(test_val); + test_val = nullptr; + if (parsed_val) { + free(parsed_val); + parsed_val = nullptr; + } + + cout << "TEST_StructToJson::seg6_seg_stack_ptr finished." << endl; +} + +// --- Test: nexthop_srv6* (pointer) --- +TEST(StructToFromJson, nexthop_srv6_ptr) +{ + cout << "TEST_StructToFromJson::nexthop_srv6_ptr started:" << endl; + /* Prepare the value */ + cout << "[DEBUG] Preparing values ..." << endl; + fib::nexthop_srv6* test_val = (fib::nexthop_srv6*)malloc(sizeof(fib::nexthop_srv6)); + if (!test_val) { + FAIL() << "Failed to allocate test_val"; + return; + } + test_val->seg6local_action = fib::SEG6_LOCAL_ACTION_END_DT6; + char* test_nh4 = "192.168.10.1"; + char* test_nh6 = "2001:db8::a"; + set_ipv4(test_val->seg6local_ctx.nh4, test_nh4); + set_ipv6(test_val->seg6local_ctx.nh6, test_nh6); + test_val->seg6local_ctx.table = 200; + test_val->seg6local_ctx.flv = {1000, 32, 16}; + test_val->seg6local_ctx.block_len = 48; + test_val->seg6local_ctx.node_len = 16; + test_val->seg6local_ctx.function_len = 16; + test_val->seg6local_ctx.argument_len = 0; + // Add seg6_segs + std::vector test_segs = {"2001:db8::1", "2001:db8::2"}; + size_t total = sizeof(fib::seg6_seg_stack) + test_segs.size() * sizeof(in6_addr); + test_val->seg6_segs = static_cast(malloc(total)); + test_val->seg6_segs->encap_behavior = fib::SRV6_HEADEND_BEHAVIOR_H_INSERT; + test_val->seg6_segs->num_segs = 2; + for (size_t i = 0; i < test_segs.size(); ++i) { + set_ipv6(test_val->seg6_segs->seg[i], test_segs[i].c_str()); + } + + /* Call to_json function */ + cout << "[DEBUG] Calling to_json for nexthop_srv6 ..." << endl; + nlohmann::ordered_json j; + fib::to_json(j, test_val); + + /* Output the constructed JSON string */ + cout << " [DEBUG] The constructed JSON string is:" << endl; + cout << " " << j.dump(4) << endl; + /* Check the values of constructed JSON */ + EXPECT_EQ(j["seg6local_action"], "SEG6_LOCAL_ACTION_END_DT6"); + // seg6local_context + EXPECT_EQ(j["seg6local_ctx"]["nh4"], "192.168.10.1"); + EXPECT_EQ(j["seg6local_ctx"]["nh6"], "2001:db8::a"); + EXPECT_EQ(j["seg6local_ctx"]["table"], test_val->seg6local_ctx.table); + // seg6local_context.seg6local_flavors_info + EXPECT_EQ(j["seg6local_ctx"]["flv"]["flv_ops"], test_val->seg6local_ctx.flv.flv_ops); + EXPECT_EQ(j["seg6local_ctx"]["flv"]["lcblock_len"], test_val->seg6local_ctx.flv.lcblock_len); + EXPECT_EQ(j["seg6local_ctx"]["flv"]["lcnode_func_len"],test_val->seg6local_ctx.flv.lcnode_func_len); + EXPECT_EQ(j["seg6local_ctx"]["block_len"], test_val->seg6local_ctx.block_len); + EXPECT_EQ(j["seg6local_ctx"]["node_len"], test_val->seg6local_ctx.node_len); + EXPECT_EQ(j["seg6local_ctx"]["function_len"], test_val->seg6local_ctx.function_len); + EXPECT_EQ(j["seg6local_ctx"]["argument_len"], test_val->seg6local_ctx.argument_len); + // seg6_seg_stack * + EXPECT_EQ(j["seg6_segs"]["encap_behavior"], "SRV6_HEADEND_BEHAVIOR_H_INSERT"); + EXPECT_EQ(j["seg6_segs"]["num_segs"], 2); + auto j_segs_out = j["seg6_segs"]["seg"].get>(); + EXPECT_EQ(j_segs_out.size(), 2); + EXPECT_EQ(j_segs_out[0], "2001:db8::1"); + EXPECT_EQ(j_segs_out[1], "2001:db8::2"); + + /* Call from_json function */ + cout << "[DEBUG] Calling from_json for nexthop_srv6 * ..." << endl; + fib::nexthop_srv6 *parsed_val = nullptr; + fib::from_json(j, parsed_val); + ASSERT_NE(parsed_val, nullptr); + + /* Check values of STRUCT parsed from JSON */ + cout << "[DEBUG] Checking parsed values from constructed JSON ..." << endl; + EXPECT_EQ(parsed_val->seg6local_action, test_val->seg6local_action); + // seg6local_context + char buf4[INET_ADDRSTRLEN], buf6[INET6_ADDRSTRLEN]; + inet_ntop(AF_INET, &parsed_val->seg6local_ctx.nh4, buf4, sizeof(buf4)); + inet_ntop(AF_INET6, &parsed_val->seg6local_ctx.nh6, buf6, sizeof(buf6)); + EXPECT_STREQ(buf4, test_nh4); + EXPECT_STREQ(buf6, test_nh6); + EXPECT_EQ(parsed_val->seg6local_ctx.table, test_val->seg6local_ctx.table); + // seg6local_context.seg6local_flavors_info + EXPECT_EQ(parsed_val->seg6local_ctx.flv.flv_ops, test_val->seg6local_ctx.flv.flv_ops); + EXPECT_EQ(parsed_val->seg6local_ctx.flv.lcblock_len, test_val->seg6local_ctx.flv.lcblock_len); + EXPECT_EQ(parsed_val->seg6local_ctx.flv.lcnode_func_len, test_val->seg6local_ctx.flv.lcnode_func_len); + EXPECT_EQ(parsed_val->seg6local_ctx.block_len, test_val->seg6local_ctx.block_len); + EXPECT_EQ(parsed_val->seg6local_ctx.node_len, test_val->seg6local_ctx.node_len); + EXPECT_EQ(parsed_val->seg6local_ctx.function_len, test_val->seg6local_ctx.function_len); + EXPECT_EQ(parsed_val->seg6local_ctx.argument_len, test_val->seg6local_ctx.argument_len); + // seg6_seg_stack * + EXPECT_EQ(parsed_val->seg6_segs->encap_behavior, test_val->seg6_segs->encap_behavior); + EXPECT_EQ(parsed_val->seg6_segs->num_segs, test_val->seg6_segs->num_segs); + for (int i = 0; i < parsed_val->seg6_segs->num_segs; ++i) { + char test_buf[INET6_ADDRSTRLEN], parsed_buf[INET6_ADDRSTRLEN]; + inet_ntop(AF_INET6, &test_val->seg6_segs->seg[i], test_buf, sizeof(test_buf)); + inet_ntop(AF_INET6, &parsed_val->seg6_segs->seg[i], parsed_buf, sizeof(parsed_buf)); + EXPECT_STREQ(test_buf, parsed_buf); + } + + /* Clean up */ + if (test_val) { + if (test_val->seg6_segs) { + free(test_val->seg6_segs); + test_val->seg6_segs = nullptr; + } + free(test_val); + test_val = nullptr; + } + if (parsed_val) { + if (parsed_val->seg6_segs) { + free(parsed_val->seg6_segs); + parsed_val->seg6_segs = nullptr; + } + free(parsed_val); + parsed_val = nullptr; + } + + cout << "TEST_StructToFromJson::nexthop_srv6_ptr finished." << endl; +} + +TEST(StructToFromJson, NextHopGroupFull_multi_nexthop) +{ + cout << "TEST_StructToFromJson::NextHopGroupFull started:" << endl; + /* Prepare the value */ + cout << "[DEBUG] Preparing values ..." << endl; + uint32_t test_id = 100; + uint32_t test_key = 1234567; + uint32_t test_nhg_flags = 1024; + vector test_nh_grp_full_list = { + make_nh_grp_full(200, 1, 0), + make_nh_grp_full(300, 1, 2), + make_nh_grp_full(310, 2, 0), + make_nh_grp_full(320, 2, 0), + make_nh_grp_full(400, 1, 0) + }; + vector test_depends = {200, 300, 400}; + vector test_dependents = {500, 600}; + + /* Call constructor function */ + cout << "[DEBUG] Calling NextHopGroupFull Constructor ..." << endl; + NextHopGroupFull test_val(test_id, test_key, test_nhg_flags, + test_nh_grp_full_list, test_depends, test_dependents); + + /* Call to_json function */ + cout << "[DEBUG] Calling to_json for NextHopGroupFull in multi-nexthop case ..." << endl; + nlohmann::ordered_json j; + fib::to_json(j, test_val); + + /* Output the constructed JSON string */ + cout << " [DEBUG] The constructed JSON string is:" << endl; + cout << " " << j.dump(4) << endl; + /* Check the values of constructed JSON */ + EXPECT_EQ(j["id"], 100); + EXPECT_EQ(j["key"], 1234567); + EXPECT_EQ(j["nhg_flags"], 1024); + for (size_t i = 0; i < test_val.nh_grp_full_list.size(); i++) { + EXPECT_EQ(j["nh_grp_full_list"][i]["id"], test_val.nh_grp_full_list[i].id); + EXPECT_EQ(j["nh_grp_full_list"][i]["weight"], test_val.nh_grp_full_list[i].weight); + EXPECT_EQ(j["nh_grp_full_list"][i]["num_direct"], test_val.nh_grp_full_list[i].num_direct); + } + for (size_t i = 0; i < test_val.depends.size(); i++) { + EXPECT_EQ(j["depends"][i], test_val.depends[i]); + } + for (size_t i = 0; i < test_val.dependents.size(); i++) { + EXPECT_EQ(j["dependents"][i], test_val.dependents[i]); + } + + /* Call from_json function */ + cout << "[DEBUG] Calling from_json for NextHopGroupFull in multi-nexthop case ..." << endl; + fib::NextHopGroupFull parsed_val; + fib::from_json(j, parsed_val); + + /* Check values of STRUCT parsed from JSON */ + cout << "[DEBUG] Checking parsed values from constructed JSON ..." << endl; + EXPECT_TRUE(parsed_val == test_val); + + cout << "TEST_StructToFromJson::NextHopGroupFull_multi_nexthop finished." << endl; +} + +TEST(StructToFromJson, NextHopGroupFull_singleton) +{ + cout << "TEST_StructToFromJson::NextHopGroupFull_singleton started:" << endl; + /* Prepare the values */ + uint32_t test_id = 100; + uint32_t test_key = 1234567; + enum nexthop_types_t test_type = NEXTHOP_TYPE_IPV6; + vrf_id_t test_vrf_id = 101; + ifindex_t test_ifindex = 101; + string test_ifname = "eth101"; + vector test_depends = {200, 300, 400}; + vector test_dependents = {500, 600}; + enum lsp_types_t test_nh_label_type = ZEBRA_LSP_NONE; + enum blackhole_type test_bh_type = BLACKHOLE_NULL; + + union g_addr test_gateway = {}; + union g_addr test_src = {}; + union g_addr test_rmap_src = {}; + inet_pton(AF_INET6, "2001:db8::1", &test_gateway.ipv6.s6_addr); + inet_pton(AF_INET6, "2001:db8::2", &test_src.ipv6.s6_addr); + inet_pton(AF_INET6, "2001:db8::3", &test_rmap_src.ipv6.s6_addr); + + uint16_t test_weight = 8; + uint8_t test_flags = 8; + uint32_t test_nhg_flags = 1024; + bool test_has_srv6 = true; + bool test_has_seg6_segs = true; + + // Prepare the segment list + vector test_nh_segs { + {}, {}, {} + }; + inet_pton(AF_INET6, "2001:db8:1::1", test_nh_segs[0].s6_addr); + inet_pton(AF_INET6, "2001:db8:1::2", test_nh_segs[1].s6_addr); + inet_pton(AF_INET6, "2001:db8:1::3", test_nh_segs[2].s6_addr); + + // Prepare seg6_segs + size_t seg6_segs_size = sizeof(struct seg6_seg_stack) + + test_nh_segs.size() * sizeof(struct in6_addr); + struct seg6_seg_stack* test_nh_seg6_segs = + (struct seg6_seg_stack*)malloc(seg6_segs_size); + test_nh_seg6_segs->encap_behavior = SRV6_HEADEND_BEHAVIOR_H_ENCAPS; + test_nh_seg6_segs->num_segs = 3; + memcpy(test_nh_seg6_segs->seg, test_nh_segs.data(), test_nh_segs.size() * sizeof(in6_addr)); + + //Prepare seg6local_flavors_info + struct seg6local_flavors_info test_flv = { + .flv_ops = 100, + .lcblock_len = 20, + .lcnode_func_len = 16 + }; + + // Prepare seg6local_ctx + struct seg6local_context test_seg6local_ctx = {}; + char* test_nh4 = "192.168.10.1"; + char* test_nh6 = "2001:db8::a"; + set_ipv4(test_seg6local_ctx.nh4, test_nh4); + set_ipv6(test_seg6local_ctx.nh6, test_nh6); + test_seg6local_ctx.table = 100; + test_seg6local_ctx.block_len = 36; + test_seg6local_ctx.node_len = 12; + test_seg6local_ctx.function_len = 20; + test_seg6local_ctx.argument_len = 16; + memcpy(&test_seg6local_ctx.flv, &test_flv, sizeof(struct seg6local_flavors_info)); + + // Prepare nh_srv6 + struct nexthop_srv6 test_nh_srv6 = {}; + test_nh_srv6.seg6local_action = SEG6_LOCAL_ACTION_END_DT6; + memcpy(&test_nh_srv6.seg6local_ctx, &test_seg6local_ctx, sizeof(struct seg6local_context)); + + /* Call constructor function */ + cout << "[DEBUG] Calling NextHopGroupFull Constructor ..." << endl; + NextHopGroupFull test_val(test_id, test_key, test_type, test_vrf_id, test_ifindex, + test_ifname, test_depends, test_dependents, test_nh_label_type, + test_bh_type, test_gateway, test_src, test_rmap_src, + test_weight, test_flags, test_nhg_flags, test_has_srv6, test_has_seg6_segs, + &test_nh_srv6, test_nh_seg6_segs, test_nh_segs); + + // Free the memory allocated dynamically + free(test_nh_seg6_segs); + test_nh_seg6_segs = nullptr; + + /* Call to_json function */ + cout << "[DEBUG] Calling to_json for NextHopGroupFull in singleton case ..." << endl; + nlohmann::ordered_json j; + fib::to_json(j, test_val); + + /* Output the constructed JSON string */ + cout << " [DEBUG] The constructed JSON string is:" << endl; + cout << " " << j.dump(4) << endl; + /* Check the values of constructed JSON */ + cout << "[DEBUG] Checking JSON values ..." << endl; + EXPECT_EQ(j["id"], test_val.id); + EXPECT_EQ(j["key"], test_val.key); + EXPECT_EQ(j["type"], test_val.type); + EXPECT_EQ(j["vrf_id"], test_val.vrf_id); + EXPECT_EQ(j["ifindex"], test_val.ifindex); + for (size_t i = 0; i < test_val.depends.size(); i++) { + EXPECT_EQ(j["depends"][i], test_val.depends[i]); + } + for (size_t i = 0; i < test_val.dependents.size(); i++) { + EXPECT_EQ(j["dependents"][i], test_val.dependents[i]); + } + EXPECT_EQ(j["nh_label_type"], "ZEBRA_LSP_NONE"); + EXPECT_EQ(j["weight"], test_val.weight); + EXPECT_EQ(j["flags"], test_val.flags); + EXPECT_EQ(j["nhg_flags"], test_val.nhg_flags); + EXPECT_EQ(j["gate"], "2001:db8::1"); + EXPECT_EQ(j["src"], "2001:db8::2"); + EXPECT_EQ(j["rmap_src"], "2001:db8::3"); + // Check SRv6 info + // Check nh_srv6's seg6local_action + EXPECT_EQ(j["nh_srv6"]["seg6local_action"], "SEG6_LOCAL_ACTION_END_DT6"); + // Check nh_srv6->seg6local_ctx + EXPECT_EQ(j["nh_srv6"]["seg6local_ctx"]["table"], test_val.nh_srv6->seg6local_ctx.table); + EXPECT_EQ(j["nh_srv6"]["seg6local_ctx"]["nh4"], test_nh4); + EXPECT_EQ(j["nh_srv6"]["seg6local_ctx"]["nh6"], test_nh6); + // Check nh_srv6->seg6local_ctx.flv + EXPECT_EQ(j["nh_srv6"]["seg6local_ctx"]["flv"]["flv_ops"], test_val.nh_srv6->seg6local_ctx.flv.flv_ops); + EXPECT_EQ(j["nh_srv6"]["seg6local_ctx"]["flv"]["lcblock_len"], test_val.nh_srv6->seg6local_ctx.flv.lcblock_len); + EXPECT_EQ(j["nh_srv6"]["seg6local_ctx"]["flv"]["lcnode_func_len"], test_val.nh_srv6->seg6local_ctx.flv.lcnode_func_len); + EXPECT_EQ(j["nh_srv6"]["seg6local_ctx"]["block_len"], test_val.nh_srv6->seg6local_ctx.block_len); + EXPECT_EQ(j["nh_srv6"]["seg6local_ctx"]["node_len"], test_val.nh_srv6->seg6local_ctx.node_len); + EXPECT_EQ(j["nh_srv6"]["seg6local_ctx"]["function_len"], test_val.nh_srv6->seg6local_ctx.function_len); + EXPECT_EQ(j["nh_srv6"]["seg6local_ctx"]["argument_len"], test_val.nh_srv6->seg6local_ctx.argument_len); + // Check nh_srv6->seg6_segs + EXPECT_EQ(j["nh_srv6"]["seg6_segs"]["encap_behavior"], "SRV6_HEADEND_BEHAVIOR_H_ENCAPS"); + auto j_segs_out = j["nh_srv6"]["seg6_segs"]["seg"].get>(); + EXPECT_EQ(j["nh_srv6"]["seg6_segs"]["num_segs"], test_val.nh_srv6->seg6_segs->num_segs); + EXPECT_EQ(j_segs_out.size(), 3); + EXPECT_EQ(j_segs_out[0], "2001:db8:1::1"); + EXPECT_EQ(j_segs_out[1], "2001:db8:1::2"); + EXPECT_EQ(j_segs_out[2], "2001:db8:1::3"); + + /* Call from_json function */ + cout << "[DEBUG] Calling from_json for NextHopGroupFull in singleton case ..." << endl; + fib::NextHopGroupFull parsed_val; + fib::from_json(j, parsed_val); + + /* Cehck values of STRUCT parsed from JSON */ + cout << "[DEBUG] Checking parsed values from constructed JSON ..." << endl; + EXPECT_TRUE(parsed_val == test_val); + + cout << "TEST_StructToFromJson::NextHopGroupFull_singleton finished." << endl; +} \ No newline at end of file diff --git a/src/libraries/sonic-fib/tests/nexthopgroupfull_ut.cpp b/src/libraries/sonic-fib/tests/nexthopgroupfull_ut.cpp new file mode 100644 index 00000000000..30d3109c0f6 --- /dev/null +++ b/src/libraries/sonic-fib/tests/nexthopgroupfull_ut.cpp @@ -0,0 +1,484 @@ +#include +#include + +#include +#include + +#include + +#include "src/nexthopgroupfull.h" +#include "src/nexthopgroupfull_json.h" + +using namespace std; +using namespace fib; + +static nh_grp_full make_nh_grp_full(uint32_t id, uint16_t weight, uint32_t num_direct) { + return {id, weight, num_direct}; +} + +TEST(NextHopGroupFull, multi_nexthop) +{ + cout << "TEST_NextHopGroupFull::multi_nexthop started: " << endl; + cout << "[DEBUG] Constructing values ..." << endl; + /* Prepare the parameters */ + uint32_t test_id = 100; + uint32_t test_key = 1234567; + uint32_t test_nhg_flags = 1024; + vector test_nh_grp_full_list = { + make_nh_grp_full(200, 1, 0), + make_nh_grp_full(300, 1, 2), + make_nh_grp_full(310, 2, 0), + make_nh_grp_full(320, 2, 0), + make_nh_grp_full(400, 1, 0) + }; + vector test_depends = {200, 300, 400}; + vector test_dependents = {500, 600}; + + /* Call constructor function */ + cout << "[DEBUG] Calling NextHopGroupFull Constructor ..." << endl; + NextHopGroupFull nhg(test_id, test_key, test_nhg_flags, + test_nh_grp_full_list, test_depends, test_dependents); + + /* Check the value of the constructed NextHopGroupFull */ + cout << "[DEBUG] Checking constructed values ..." << endl; + // Check plain values + EXPECT_EQ(nhg.id, test_id); + EXPECT_EQ(nhg.key, test_key); + EXPECT_EQ(nhg.nhg_flags, test_nhg_flags); + // Check nh_grp_full_list status + EXPECT_EQ(nhg.nh_grp_full_list.size(), test_nh_grp_full_list.size()); + for (size_t i = 0; i < test_nh_grp_full_list.size(); i++) { + EXPECT_EQ(nhg.nh_grp_full_list[i].id, test_nh_grp_full_list[i].id); + EXPECT_EQ(nhg.nh_grp_full_list[i].weight, test_nh_grp_full_list[i].weight); + EXPECT_EQ(nhg.nh_grp_full_list[i].num_direct, test_nh_grp_full_list[i].num_direct); + } + // Check depends status + EXPECT_EQ(nhg.depends.size(), test_depends.size()); + for (size_t i = 0; i < test_depends.size(); i++) { + EXPECT_EQ(nhg.depends[i], test_depends[i]); + } + // Check dependents status + EXPECT_EQ(nhg.dependents.size(), test_dependents.size()); + for (size_t i = 0; i < test_dependents.size(); i++) { + EXPECT_EQ(nhg.dependents[i], test_dependents[i]); + } + // Check other unused values + cout << "[DEBUG] Checking default values ..." << endl; + EXPECT_EQ(nhg.weight, 0); + EXPECT_EQ(nhg.flags, 0); + EXPECT_TRUE(nhg.ifname.empty()); + EXPECT_EQ(nhg.type, NEXTHOP_TYPE_INVALID); + EXPECT_EQ(nhg.vrf_id, 0); + EXPECT_EQ(nhg.ifindex, 0); + EXPECT_EQ(nhg.nh_label_type, ZEBRA_LSP_NONE); + + union g_addr zero_g_addr = {}; + EXPECT_TRUE(memcmp(&nhg.gate, &zero_g_addr, sizeof(g_addr)) == 0); + EXPECT_EQ(nhg.bh_type, BLACKHOLE_UNSPEC); + EXPECT_TRUE(memcmp(&nhg.src, &zero_g_addr, sizeof(g_addr)) == 0); + EXPECT_TRUE(memcmp(&nhg.rmap_src, &zero_g_addr, sizeof(g_addr)) == 0); + EXPECT_EQ(nhg.nh_srv6, nullptr); + + cout << "TEST_NextHopGroupFull::multi_nexthop finished." << endl; + + /* Add test for operator = in multi_nexthop case */ + cout << "TEST_NextHopGroupFull::operator = for multi_nexthop started:" << endl; + cout << "[DEBUG] Declare a NextHopGroupFull then assign it with the constructed nhg ..." << endl; + NextHopGroupFull assigned_nhg; + assigned_nhg = nhg; + + /* Check the value of the assigned NextHopGroupFull */ + cout << "[DEBUG] Checking assigned constructed values ..." << endl; + // Check plain values + EXPECT_EQ(assigned_nhg.id, nhg.id); + EXPECT_EQ(assigned_nhg.key, nhg.key); + EXPECT_EQ(assigned_nhg.nhg_flags, nhg.nhg_flags); + // Check nh_grp_full_list status + EXPECT_EQ(assigned_nhg.nh_grp_full_list.size(), nhg.nh_grp_full_list.size()); + for (size_t i = 0; i < nhg.nh_grp_full_list.size(); i++) { + EXPECT_EQ(assigned_nhg.nh_grp_full_list[i].id, nhg.nh_grp_full_list[i].id); + EXPECT_EQ(assigned_nhg.nh_grp_full_list[i].weight, nhg.nh_grp_full_list[i].weight); + EXPECT_EQ(assigned_nhg.nh_grp_full_list[i].num_direct, assigned_nhg.nh_grp_full_list[i].num_direct); + } + // Check depends status + EXPECT_EQ(assigned_nhg.depends.size(), nhg.depends.size()); + for (size_t i = 0; i < nhg.depends.size(); i++) { + EXPECT_EQ(assigned_nhg.depends[i], nhg.depends[i]); + } + // Check dependents status + EXPECT_EQ(assigned_nhg.dependents.size(), nhg.dependents.size()); + for (size_t i = 0; i < nhg.dependents.size(); i++) { + EXPECT_EQ(assigned_nhg.dependents[i], nhg.dependents[i]); + } + // Check other unused values + cout << "[DEBUG] Checking assigned default values ..." << endl; + EXPECT_EQ(assigned_nhg.weight, nhg.weight); + EXPECT_EQ(assigned_nhg.flags, nhg.flags); + EXPECT_TRUE(assigned_nhg.ifname.empty()); + EXPECT_EQ(assigned_nhg.type, NEXTHOP_TYPE_INVALID); + EXPECT_EQ(assigned_nhg.vrf_id, 0); + EXPECT_EQ(assigned_nhg.ifindex, 0); + EXPECT_EQ(assigned_nhg.nh_label_type, ZEBRA_LSP_NONE); + + EXPECT_TRUE(memcmp(&assigned_nhg.gate, &zero_g_addr, sizeof(g_addr)) == 0); + EXPECT_EQ(assigned_nhg.bh_type, BLACKHOLE_UNSPEC); + EXPECT_TRUE(memcmp(&assigned_nhg.src, &zero_g_addr, sizeof(g_addr)) == 0); + EXPECT_TRUE(memcmp(&assigned_nhg.rmap_src, &zero_g_addr, sizeof(g_addr)) == 0); + EXPECT_EQ(assigned_nhg.nh_srv6, nullptr); + + /* Add test for copy constructor in multi-nexthop case */ + cout << "TEST_NextHopGroupFull::copy_constructor for multi_nexthop started:" << endl; + cout << "[DEBUG] Use the declared NextHopGroupFull nhg to trigger the copy constructor ..." << endl; + NextHopGroupFull copy_nhg = nhg; + + /* Check the value of the copied NextHopGroupFull */ + cout << "[DEBUG] Checking copied constructed values ..." << endl; + // Check plain values + EXPECT_EQ(copy_nhg.id, nhg.id); + EXPECT_EQ(copy_nhg.key, nhg.key); + EXPECT_EQ(copy_nhg.nhg_flags, nhg.nhg_flags); + // Check nh_grp_full_list status + EXPECT_EQ(copy_nhg.nh_grp_full_list.size(), nhg.nh_grp_full_list.size()); + for (size_t i = 0; i < nhg.nh_grp_full_list.size(); i++) { + EXPECT_EQ(copy_nhg.nh_grp_full_list[i].id, nhg.nh_grp_full_list[i].id); + EXPECT_EQ(copy_nhg.nh_grp_full_list[i].weight, nhg.nh_grp_full_list[i].weight); + EXPECT_EQ(copy_nhg.nh_grp_full_list[i].num_direct, nhg.nh_grp_full_list[i].num_direct); + } + // Check depends status + EXPECT_EQ(copy_nhg.depends.size(), nhg.depends.size()); + for (size_t i = 0; i < nhg.depends.size(); i++) { + EXPECT_EQ(copy_nhg.depends[i], nhg.depends[i]); + } + // Check dependents status + EXPECT_EQ(copy_nhg.dependents.size(), nhg.dependents.size()); + for (size_t i = 0; i < nhg.dependents.size(); i++) { + EXPECT_EQ(copy_nhg.dependents[i], nhg.dependents[i]); + } + // Check other unused values + cout << "[DEBUG] Checking copied default values ..." << endl; + EXPECT_EQ(copy_nhg.weight, nhg.weight); + EXPECT_EQ(copy_nhg.flags, nhg.flags); + EXPECT_TRUE(copy_nhg.ifname.empty()); + EXPECT_EQ(copy_nhg.type, nhg.type); + EXPECT_EQ(copy_nhg.vrf_id, nhg.vrf_id); + EXPECT_EQ(copy_nhg.ifindex, nhg.ifindex); + EXPECT_EQ(copy_nhg.nh_label_type, nhg.nh_label_type); + + EXPECT_TRUE(memcmp(©_nhg.gate, &zero_g_addr, sizeof(g_addr)) == 0); + EXPECT_EQ(copy_nhg.bh_type, nhg.bh_type); + EXPECT_TRUE(memcmp(©_nhg.src, &zero_g_addr, sizeof(g_addr)) == 0); + EXPECT_TRUE(memcmp(©_nhg.rmap_src, &zero_g_addr, sizeof(g_addr)) == 0); + EXPECT_EQ(copy_nhg.nh_srv6, nullptr); + + cout << "TEST_NextHopGroupFull::copy_constructor for multi_nexthop finished." << endl; + + /* Add case for operator == and != */ + cout << "TEST_NextHopGroupFull::operator == started:" << endl; + EXPECT_TRUE(copy_nhg == nhg); + cout << "TEST_NextHopGroupFull::operator == finished." << endl; + cout << "TEST_NextHopGroupFull::operator != started:" << endl; + EXPECT_FALSE(copy_nhg != nhg); + cout << "TEST_NextHopGroupFull::operator != finished." << endl; + + // Test Serializing API + string json_str = to_json_string(nhg); + std::cout << "Serialized NHG to JSON str: " << json_str << std::endl; + + NextHopGroupFull out_obj; + bool ret = from_json_string(json_str, out_obj); + std::cout << "Deserialized NHG from JSON str: " << ret << std::endl; + EXPECT_EQ(ret, true); + + cout << "TEST_NextHopGroupFull::multi_nexthop finished." << endl; +} + + +TEST(NextHopGroupFull, singleton) +{ + cout << "TEST_NextHopGroupFull::singleton started: " << endl; + cout << "[DEBUG] Constructing values ..." << endl; + + /* Prepare the parameters */ + uint32_t test_id = 100; + uint32_t test_key = 1234567; + enum nexthop_types_t test_type = NEXTHOP_TYPE_IPV6; + vrf_id_t test_vrf_id = 101; + ifindex_t test_ifindex = 101; + string test_ifname = "eth101"; + vector test_depends = {200, 300, 400}; + vector test_dependents = {500, 600}; + enum lsp_types_t test_nh_label_type = ZEBRA_LSP_NONE; + enum blackhole_type test_bh_type = BLACKHOLE_NULL; + + union g_addr test_gateway = {}; + union g_addr test_src = {}; + union g_addr test_rmap_src = {}; + inet_pton(AF_INET6, "2001:db8::1", &test_gateway.ipv6.s6_addr); + inet_pton(AF_INET6, "2001:db8::2", &test_src.ipv6.s6_addr); + inet_pton(AF_INET6, "2001:db8::3", &test_rmap_src.ipv6.s6_addr); + + uint8_t test_weight = 8; + uint8_t test_flags = 8; + uint32_t test_nhg_flags = 1024; + bool test_has_srv6 = true; + bool test_has_seg6_segs = true; + + // Prepare the segment list + vector test_nh_segs { + {}, {}, {} + }; + inet_pton(AF_INET6, "2001:db8:1::1", test_nh_segs[0].s6_addr); + inet_pton(AF_INET6, "2001:db8:1::2", test_nh_segs[1].s6_addr); + inet_pton(AF_INET6, "2001:db8:1::3", test_nh_segs[2].s6_addr); + + // Prepare seg6_segs + size_t seg6_segs_size = sizeof(struct seg6_seg_stack) + + test_nh_segs.size() * sizeof(struct in6_addr); + struct seg6_seg_stack* test_nh_seg6_segs = + (struct seg6_seg_stack*)malloc(seg6_segs_size); + test_nh_seg6_segs->encap_behavior = SRV6_HEADEND_BEHAVIOR_H_ENCAPS; + test_nh_seg6_segs->num_segs = 3; + memcpy(test_nh_seg6_segs->seg, test_nh_segs.data(), test_nh_segs.size() * sizeof(in6_addr)); + + //Prepare seg6local_flavors_info + struct seg6local_flavors_info test_flv = { + .flv_ops = 100, + .lcblock_len = 20, + .lcnode_func_len = 16 + }; + + // Prepare seg6local_ctx + struct seg6local_context test_seg6local_ctx = {}; + test_seg6local_ctx.table = 100; + test_seg6local_ctx.block_len = 36; + test_seg6local_ctx.node_len = 12; + test_seg6local_ctx.function_len = 20; + test_seg6local_ctx.argument_len = 16; + inet_pton(AF_INET6, "2001:db8:2::1", test_seg6local_ctx.nh6.s6_addr); + memcpy(&test_seg6local_ctx.flv, &test_flv, sizeof(struct seg6local_flavors_info)); + + // Prepare nh_srv6 + struct nexthop_srv6 test_nh_srv6 = {}; + test_nh_srv6.seg6local_action = SEG6_LOCAL_ACTION_END_DT6; + memcpy(&test_nh_srv6.seg6local_ctx, &test_seg6local_ctx, sizeof(struct seg6local_context)); + + /* Call constructor function */ + cout << "[DEBUG] Calling NextHopGroupFull Constructor ..." << endl; + NextHopGroupFull nhg(test_id, test_key, test_type, test_vrf_id, test_ifindex, + test_ifname, test_depends, test_dependents, test_nh_label_type, + test_bh_type, test_gateway, test_src, test_rmap_src, + test_weight, test_flags, test_nhg_flags, test_has_srv6, test_has_seg6_segs, + &test_nh_srv6, test_nh_seg6_segs, test_nh_segs); + + /* Check the value of the constructed NextHopGroupFull */ + cout << "[DEBUG] Checking constructed values ..." << endl; + // Check plain values + EXPECT_EQ(nhg.id, test_id); + EXPECT_EQ(nhg.key, test_key); + EXPECT_EQ(nhg.type, test_type); + EXPECT_EQ(nhg.vrf_id, test_vrf_id); + EXPECT_EQ(nhg.ifindex, test_ifindex); + EXPECT_EQ(nhg.ifname, test_ifname); + EXPECT_EQ(nhg.depends.size(), test_depends.size()); + for (size_t i = 0; i < test_depends.size(); i++) { + EXPECT_EQ(nhg.depends[i], test_depends[i]); + } + EXPECT_EQ(nhg.dependents.size(), test_dependents.size()); + for (size_t i = 0; i < test_dependents.size(); i++) { + EXPECT_EQ(nhg.dependents[i], test_dependents[i]); + } + EXPECT_EQ(nhg.nh_label_type, test_nh_label_type); + EXPECT_EQ(nhg.weight, test_weight); + EXPECT_EQ(nhg.flags, test_flags); + EXPECT_EQ(nhg.nhg_flags, test_nhg_flags); + + // Check address values + EXPECT_TRUE(memcmp(&nhg.gate, &test_gateway, sizeof(g_addr)) == 0); + EXPECT_TRUE(memcmp(&nhg.src, &test_src, sizeof(g_addr)) == 0); + EXPECT_TRUE(memcmp(&nhg.rmap_src, &test_rmap_src, sizeof(g_addr)) == 0); + + // Check SRv6 info + EXPECT_NE(nhg.nh_srv6, nullptr); + // Check nh_srv6's seg6local_action + EXPECT_EQ(nhg.nh_srv6->seg6local_action, test_nh_srv6.seg6local_action); + // Check nh_srv6's seg6local_context + EXPECT_TRUE(memcmp(&nhg.nh_srv6->seg6local_ctx.nh6, &test_seg6local_ctx.nh6, sizeof(in6_addr)) == 0); + EXPECT_EQ(nhg.nh_srv6->seg6local_ctx.table, test_nh_srv6.seg6local_ctx.table); + // Check nh_srv6's seg6local_ctx's flv + EXPECT_EQ(nhg.nh_srv6->seg6local_ctx.flv.flv_ops, test_nh_srv6.seg6local_ctx.flv.flv_ops); + EXPECT_EQ(nhg.nh_srv6->seg6local_ctx.flv.lcblock_len, test_nh_srv6.seg6local_ctx.flv.lcblock_len); + EXPECT_EQ(nhg.nh_srv6->seg6local_ctx.flv.lcnode_func_len, test_nh_srv6.seg6local_ctx.flv.lcnode_func_len); + // flv end + EXPECT_EQ(nhg.nh_srv6->seg6local_ctx.block_len, test_nh_srv6.seg6local_ctx.block_len); + EXPECT_EQ(nhg.nh_srv6->seg6local_ctx.node_len, test_nh_srv6.seg6local_ctx.node_len); + EXPECT_EQ(nhg.nh_srv6->seg6local_ctx.function_len, test_nh_srv6.seg6local_ctx.function_len); + EXPECT_EQ(nhg.nh_srv6->seg6local_ctx.argument_len, test_nh_srv6.seg6local_ctx.argument_len); + // Check nh_srv6's seg6_seg_stack + EXPECT_NE(nhg.nh_srv6->seg6_segs, nullptr); + EXPECT_EQ(nhg.nh_srv6->seg6_segs->encap_behavior, test_nh_seg6_segs->encap_behavior); + EXPECT_EQ(nhg.nh_srv6->seg6_segs->num_segs, test_nh_seg6_segs->num_segs); + // Check nh_srv6's seg6_seg_stack's seg list + for (size_t i = 0; i < test_nh_seg6_segs->num_segs; i++) { + if (i < test_nh_segs.size()) { + EXPECT_TRUE(memcmp(&nhg.nh_srv6->seg6_segs->seg[i], &test_nh_segs[i], sizeof(in6_addr)) == 0) + << "Mismatch in segment " << i << endl; + } else { + in6_addr zero = {}; + memset(&zero, 0, sizeof(zero)); + EXPECT_TRUE(memcmp(&nhg.nh_srv6->seg6_segs->seg[i], &zero, sizeof(in6_addr)) == 0); + } + } + // Check other unused values + EXPECT_TRUE(nhg.nh_grp_full_list.empty()); + + // Free the memory allocated dynamically + free(test_nh_seg6_segs); + test_nh_seg6_segs = nullptr; + + cout << "TEST_NextHopGroupFull::singleton finished." << endl; + + /* Add test for operator = in singleton case */ + cout << "TEST_NextHopGroupFull::operator = for singleton started:" << endl; + cout << "[DEBUG] Declare a NextHopGroupFull then assign it with the constructed nhg ..." << endl; + NextHopGroupFull assigned_nhg; + assigned_nhg = nhg; + + /* Check the value of the assigned NextHopGroupFull */ + cout << "[DEBUG] Checking assigned constructed values ..." << endl; + // Check plain values + EXPECT_EQ(assigned_nhg.id, nhg.id); + EXPECT_EQ(assigned_nhg.key, nhg.key); + EXPECT_EQ(assigned_nhg.type, nhg.type); + EXPECT_EQ(assigned_nhg.vrf_id, nhg.vrf_id); + EXPECT_EQ(assigned_nhg.ifindex, nhg.ifindex); + EXPECT_EQ(assigned_nhg.ifname, nhg.ifname); + EXPECT_EQ(assigned_nhg.nh_label_type, nhg.nh_label_type); + EXPECT_EQ(assigned_nhg.flags, nhg.flags); + EXPECT_EQ(assigned_nhg.nhg_flags, nhg.nhg_flags); + + // Check address values + EXPECT_TRUE(memcmp(&assigned_nhg.gate, &nhg.gate, sizeof(g_addr)) == 0); + EXPECT_TRUE(memcmp(&assigned_nhg.src, &nhg.src, sizeof(g_addr)) == 0); + EXPECT_TRUE(memcmp(&assigned_nhg.rmap_src, &nhg.rmap_src, sizeof(g_addr)) == 0); + + // Check SRv6 info + EXPECT_NE(assigned_nhg.nh_srv6, nullptr); + // Check nh_srv6's seg6local_action + EXPECT_EQ(assigned_nhg.nh_srv6->seg6local_action, nhg.nh_srv6->seg6local_action); + // Check nh_srv6's seg6local_context + EXPECT_TRUE(memcmp(&assigned_nhg.nh_srv6->seg6local_ctx.nh6, + &nhg.nh_srv6->seg6local_ctx.nh6, sizeof(in6_addr)) == 0); + EXPECT_EQ(assigned_nhg.nh_srv6->seg6local_ctx.table, nhg.nh_srv6->seg6local_ctx.table); + // Check nh_srv6's seg6local_ctx's flv + EXPECT_EQ(assigned_nhg.nh_srv6->seg6local_ctx.flv.flv_ops, nhg.nh_srv6->seg6local_ctx.flv.flv_ops); + EXPECT_EQ(assigned_nhg.nh_srv6->seg6local_ctx.flv.lcblock_len, + nhg.nh_srv6->seg6local_ctx.flv.lcblock_len); + EXPECT_EQ(assigned_nhg.nh_srv6->seg6local_ctx.flv.lcnode_func_len, + nhg.nh_srv6->seg6local_ctx.flv.lcnode_func_len); + // flv end + EXPECT_EQ(assigned_nhg.nh_srv6->seg6local_ctx.block_len, nhg.nh_srv6->seg6local_ctx.block_len); + EXPECT_EQ(assigned_nhg.nh_srv6->seg6local_ctx.node_len, nhg.nh_srv6->seg6local_ctx.node_len); + EXPECT_EQ(assigned_nhg.nh_srv6->seg6local_ctx.function_len, nhg.nh_srv6->seg6local_ctx.function_len); + EXPECT_EQ(assigned_nhg.nh_srv6->seg6local_ctx.argument_len, nhg.nh_srv6->seg6local_ctx.argument_len); + // Check nh_srv6's seg6_seg_stack + EXPECT_NE(assigned_nhg.nh_srv6->seg6_segs, nullptr); + EXPECT_EQ(assigned_nhg.nh_srv6->seg6_segs->encap_behavior, nhg.nh_srv6->seg6_segs->encap_behavior); + EXPECT_EQ(assigned_nhg.nh_srv6->seg6_segs->num_segs, nhg.nh_srv6->seg6_segs->num_segs); + // Check nh_srv6's seg6_seg_stack's seg list + for (size_t i = 0; i < nhg.nh_srv6->seg6_segs->num_segs; i++) { + if (i < nhg.nh_srv6->seg6_segs->num_segs) { + EXPECT_TRUE(memcmp(&assigned_nhg.nh_srv6->seg6_segs->seg[i], + &nhg.nh_srv6->seg6_segs->seg[i], sizeof(in6_addr)) == 0) + << "Mismatch in segment " << i << endl; + } else { + in6_addr zero = {}; + memset(&zero, 0, sizeof(zero)); + EXPECT_TRUE(memcmp(&assigned_nhg.nh_srv6->seg6_segs->seg[i], &zero, sizeof(in6_addr)) == 0); + } + } + // Check other unused values + EXPECT_TRUE(assigned_nhg.nh_grp_full_list.empty()); + + cout << "TEST_NextHopGroupFull::operator = for singleton finished." << endl; + + /* Add test for copy constructor in singleton case */ + cout << "TEST_NextHopGroupFull::copy_constructor for singleton started:" << endl; + cout << "[DEBUG] Use a constructed nhg to trigger the copy constructor ..." << endl; + NextHopGroupFull copy_nhg = nhg; + + /* Check the value of the copied NextHopGroupFull */ + cout << "[DEBUG] Checking copied constructed values ..." << endl; + // Check plain values + EXPECT_EQ(copy_nhg.id, nhg.id); + EXPECT_EQ(copy_nhg.key, nhg.key); + EXPECT_EQ(copy_nhg.type, nhg.type); + EXPECT_EQ(copy_nhg.vrf_id, nhg.vrf_id); + EXPECT_EQ(copy_nhg.ifindex, nhg.ifindex); + EXPECT_EQ(copy_nhg.ifname, nhg.ifname); + EXPECT_EQ(copy_nhg.nh_label_type, nhg.nh_label_type); + EXPECT_EQ(copy_nhg.flags, nhg.flags); + EXPECT_EQ(copy_nhg.nhg_flags, nhg.nhg_flags); + + // Check address values + EXPECT_TRUE(memcmp(©_nhg.gate, &nhg.gate, sizeof(g_addr)) == 0); + EXPECT_TRUE(memcmp(©_nhg.src, &nhg.src, sizeof(g_addr)) == 0); + EXPECT_TRUE(memcmp(©_nhg.rmap_src, &nhg.rmap_src, sizeof(g_addr)) == 0); + + // Check SRv6 info + EXPECT_NE(copy_nhg.nh_srv6, nullptr); + // Check nh_srv6's seg6local_action + EXPECT_EQ(copy_nhg.nh_srv6->seg6local_action, nhg.nh_srv6->seg6local_action); + // Check nh_srv6's seg6local_context + EXPECT_TRUE(memcmp(©_nhg.nh_srv6->seg6local_ctx.nh6, + &nhg.nh_srv6->seg6local_ctx.nh6, sizeof(in6_addr)) == 0); + EXPECT_EQ(copy_nhg.nh_srv6->seg6local_ctx.table, nhg.nh_srv6->seg6local_ctx.table); + // Check nh_srv6's seg6local_ctx's flv + EXPECT_EQ(copy_nhg.nh_srv6->seg6local_ctx.flv.flv_ops, nhg.nh_srv6->seg6local_ctx.flv.flv_ops); + EXPECT_EQ(copy_nhg.nh_srv6->seg6local_ctx.flv.lcblock_len, + nhg.nh_srv6->seg6local_ctx.flv.lcblock_len); + EXPECT_EQ(copy_nhg.nh_srv6->seg6local_ctx.flv.lcnode_func_len, + nhg.nh_srv6->seg6local_ctx.flv.lcnode_func_len); + // flv end + EXPECT_EQ(copy_nhg.nh_srv6->seg6local_ctx.block_len, nhg.nh_srv6->seg6local_ctx.block_len); + EXPECT_EQ(copy_nhg.nh_srv6->seg6local_ctx.node_len, nhg.nh_srv6->seg6local_ctx.node_len); + EXPECT_EQ(copy_nhg.nh_srv6->seg6local_ctx.function_len, nhg.nh_srv6->seg6local_ctx.function_len); + EXPECT_EQ(copy_nhg.nh_srv6->seg6local_ctx.argument_len, nhg.nh_srv6->seg6local_ctx.argument_len); + // Check nh_srv6's seg6_seg_stack + EXPECT_NE(copy_nhg.nh_srv6->seg6_segs, nullptr); + EXPECT_EQ(copy_nhg.nh_srv6->seg6_segs->encap_behavior, nhg.nh_srv6->seg6_segs->encap_behavior); + EXPECT_EQ(copy_nhg.nh_srv6->seg6_segs->num_segs, nhg.nh_srv6->seg6_segs->num_segs); + // Check nh_srv6's seg6_seg_stack's seg list + for (size_t i = 0; i < nhg.nh_srv6->seg6_segs->num_segs; i++) { + if (i < nhg.nh_srv6->seg6_segs->num_segs) { + EXPECT_TRUE(memcmp(©_nhg.nh_srv6->seg6_segs->seg[i], + &nhg.nh_srv6->seg6_segs->seg[i], sizeof(in6_addr)) == 0) + << "Mismatch in segment " << i << endl; + } else { + in6_addr zero = {}; + memset(&zero, 0, sizeof(zero)); + EXPECT_TRUE(memcmp(©_nhg.nh_srv6->seg6_segs->seg[i], &zero, sizeof(in6_addr)) == 0); + } + } + // Check other unused values + EXPECT_TRUE(copy_nhg.nh_grp_full_list.empty()); + + /* We should confirm the copy_nhg is copied deeply */ + if (copy_nhg.nh_srv6 && nhg.nh_srv6) { + EXPECT_NE(copy_nhg.nh_srv6, nhg.nh_srv6); + if (copy_nhg.nh_srv6->seg6_segs && nhg.nh_srv6->seg6_segs) { + EXPECT_NE(copy_nhg.nh_srv6->seg6_segs, nhg.nh_srv6->seg6_segs); + } + } + + cout << "TEST_NextHopGroupFull::copy_constructor for singleton finished." << endl; + + /* Add test of operator == and != for singleton case */ + cout << "TEST_NextHopGroupFull::operator == for singleton started:" << endl; + EXPECT_TRUE(copy_nhg == nhg); + cout << "TEST_NextHopGroupFull::operator == for singleton finished." << endl; + cout << "TEST_NextHopGroupFull::operator != for singleton started:" << endl; + EXPECT_FALSE(copy_nhg != nhg); + cout << "TEST_NextHopGroupFull::operator != for singleton finished." << endl; + + cout << "TEST_NextHopGroupFull::singleton finished." << endl; +} \ No newline at end of file diff --git a/src/libraries/sonic-fib/use_json_schema.md b/src/libraries/sonic-fib/use_json_schema.md new file mode 100644 index 00000000000..f454473e285 --- /dev/null +++ b/src/libraries/sonic-fib/use_json_schema.md @@ -0,0 +1,21 @@ +# **Using JSON Schema to Define NexthopGroup Information** + +# Purpose of Adopting Data Schema +The primary objective of adopting a data schema is to unambiguously define the data format for the nexthop group used in both Zebra and fpmsyncd. By leveraging this schema, we aim to automatically generate the corresponding C++ class shared by both processes, along with serialization and deserialization logic, ensuring consistent and synchronized data exchange. This approach minimizes errors typically introduced through manual coding and enforces system-wide consistency. + +# Why JSON Schema? +JSON Schema is chosen because it offers a standardized, human-readable, and language-agnostic format for describing data structure, types, and validation rules. This facilitates reliable data validation and seamless code generation across heterogeneous components—specifically Zebra ( C-based) and fpmsyncd (C++), while promoting interoperability. Furthermore, JSON Schema works well with modern development tooling, enabling automated code generation, runtime data validation, and clear, self-documenting interfaces between Zebra and fpmsyncd. + +# Design Philosophy +The JSON schema defines the logical data model and serves as the single source of truth for the message format. However, C++-specific implementation details such as constructors, memory management, unions, and logging—are either explicitly handled in handwritten code or generated via customized render script logic. + +# Code Layout +To support this approach, three new directories have been introduced: + +* schema/ – Contains the JSON schemas that define the data exchanged between Zebra and fpmsyncd. +* templates/ – Holds code generation templates used to produce C++ serialization/deserialization logic from the schemas. + * templates/references - Contains generated codes for debugging and reference only. They would NOT be used in compile. +* scripts/ – Includes render_schema.py, a script that processes the JSON schemas using the templates to generate the final C++ source files. +* c-api/ - existing folder for holding c-api header file and its C wrapping function + * nexthopgroup_capi.h + * nexthopgroup_capi.cpp \ No newline at end of file diff --git a/src/libteam/patch/0018-Replace-FD_SET-select-with-poll-to-avoid-FD_SETSIZE-abort.patch b/src/libteam/patch/0018-Replace-FD_SET-select-with-poll-to-avoid-FD_SETSIZE-abort.patch new file mode 100644 index 00000000000..a447096f6cb --- /dev/null +++ b/src/libteam/patch/0018-Replace-FD_SET-select-with-poll-to-avoid-FD_SETSIZE-abort.patch @@ -0,0 +1,115 @@ +From 73f320a3383b94a36cad8f2ae7004dd02c6063d3 Mon Sep 17 00:00:00 2001 +From: Spandan Chowdhury +Date: Fri, 1 May 2026 18:21:00 -0700 +Subject: [PATCH] Replace FD_SET/select() with poll() to avoid FD_SETSIZE abort + +cli_usock_wait_recv() in libteamdctl and team_check_events() in +libteam use FD_SET()/select() to wait for readability on a single +fd. Both fail when the fd value reaches or exceeds FD_SETSIZE (1024 +in glibc): under _FORTIFY_SOURCE=2, FD_SET expands to __fdelt_chk() +and aborts the process with: + + *** bit out of range 0 - FD_SETSIZE on fd_set *** + +A long-running consumer that manages many team interfaces +concurrently will hit this. Each team_alloc()/team_init() keeps 4 +libnl sockets (nl_sock, nl_sock_event, nl_cli.sock, +nl_cli.sock_event) and 1 epoll fd (from team_init_event_fd()) open +for the lifetime of the team handle. Once the persistent fd table +grows past 1024, the next unix socket opened by teamdctl_connect() +is assigned a fd >= FD_SETSIZE, and the next teamdctl_*() call that +reaches cli_usock_wait_recv() aborts the process. + +Replace both sites with poll(), which takes raw fd numbers and has +no FD_SETSIZE ceiling. Behavior is preserved: single fd, +read-readiness, same timeout semantics (5000 ms in +cli_usock_wait_recv, non-blocking in team_check_events). +--- + libteam/libteam.c | 16 +++++++--------- + libteamdctl/cli_usock.c | 20 +++++++------------- + 2 files changed, 14 insertions(+), 22 deletions(-) + +diff --git a/libteam/libteam.c b/libteam/libteam.c +index ee78aff..d36b9fa 100644 +--- a/libteam/libteam.c ++++ b/libteam/libteam.c +@@ -42,7 +42,7 @@ + #include + #include + #include +-#include ++#include + #include + #include + #include +@@ -1031,17 +1031,15 @@ int team_handle_events(struct team_handle *th) + TEAM_EXPORT + int team_check_events(struct team_handle *th) + { +- fd_set rfds; +- int fdmax; +- struct timeval tv; + int fd = team_get_event_fd(th); ++ struct pollfd pfd = { ++ .fd = fd, ++ .events = POLLIN, ++ }; + int ret; + +- memset(&tv, 0, sizeof(tv)); +- FD_ZERO(&rfds); +- FD_SET(fd, &rfds); +- fdmax = fd + 1; +- ret = select(fdmax, &rfds, NULL, NULL, &tv); ++ /* Non-blocking, equivalent to the original timeval=0 select(). */ ++ ret = poll(&pfd, 1, 0); + if (ret == -1) + return -errno; + return team_handle_events(th); +diff --git a/libteamdctl/cli_usock.c b/libteamdctl/cli_usock.c +index d3fbdba..141c34b 100644 +--- a/libteamdctl/cli_usock.c ++++ b/libteamdctl/cli_usock.c +@@ -23,6 +23,7 @@ + #include + #include + #include ++#include + #include + #include + #include "teamdctl_private.h" +@@ -79,25 +80,18 @@ static int cli_usock_send(int sock, char *msg) + return 0; + } + +-#define WAIT_SEC (TEAMDCTL_REPLY_TIMEOUT / 1000) +-#define WAIT_USEC (TEAMDCTL_REPLY_TIMEOUT % 1000 * 1000) +- + static int cli_usock_wait_recv(int sock) + { +- fd_set rfds; +- int fdmax; ++ struct pollfd pfd = { ++ .fd = sock, ++ .events = POLLIN, ++ }; + int ret; +- struct timeval tv; + +- tv.tv_sec = WAIT_SEC; +- tv.tv_usec = WAIT_USEC; +- FD_ZERO(&rfds); +- FD_SET(sock, &rfds); +- fdmax = sock + 1; +- ret = select(fdmax, &rfds, NULL, NULL, &tv); ++ ret = poll(&pfd, 1, TEAMDCTL_REPLY_TIMEOUT); + if (ret == -1) + return -errno; +- if (!FD_ISSET(sock, &rfds)) ++ if (ret == 0) + return -ETIMEDOUT; + return 0; + } +-- +2.43.0 + diff --git a/src/libteam/patch/series b/src/libteam/patch/series index 56c4694c3ff..ab8bd64b3c0 100644 --- a/src/libteam/patch/series +++ b/src/libteam/patch/series @@ -15,3 +15,4 @@ 0015-add-support-for-custom-retry.patch 0016-block-retry-count-changes.patch 0017-Specify-netlink-recv-buffer-size-to-avoid-a-syscall.patch +0018-Replace-FD_SET-select-with-poll-to-avoid-FD_SETSIZE-abort.patch diff --git a/src/libyang/.gitignore b/src/libyang/.gitignore deleted file mode 100644 index a0991ff4402..00000000000 --- a/src/libyang/.gitignore +++ /dev/null @@ -1,3 +0,0 @@ -* -!.gitignore -!Makefile diff --git a/src/libyang/Makefile b/src/libyang/Makefile deleted file mode 100644 index e7d90ffeeb4..00000000000 --- a/src/libyang/Makefile +++ /dev/null @@ -1,32 +0,0 @@ -.ONESHELL: -SHELL = /bin/bash -.SHELLFLAGS += -e - -MAIN_TARGET = $(LIBYANG) -DERIVED_TARGETS = $(LIBYANG_DEV) \ - $(LIBYANG_DBGSYM) \ - $(LIBYANG_PY3) \ - $(LIBYANG_PY3_DBG) \ - $(LIBYANG_CPP) \ - $(LIBYANG_CPP_DBG) - -$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : - # Obtaining the libyang - rm -fr ./libyang-$(LIBYANG_VERSION) - git clone https://github.com/CESNET/libyang.git libyang-$(LIBYANG_VERSION) - pushd libyang-$(LIBYANG_VERSION) - git checkout tags/v1.0-r4 -b libyang - # Apply patch series - stg init - stg import -s ../patch/series - -ifeq ($(CROSS_BUILD_ENVIRON), y) - dpkg-buildpackage -rfakeroot -b -us -uc -a$(CONFIGURED_ARCH) -Pcross,nocheck -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $(SONIC_DPKG_ADMINDIR) -else - dpkg-buildpackage -rfakeroot -b -us -uc -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $(SONIC_DPKG_ADMINDIR) -endif - popd - - mv $(DERIVED_TARGETS) $* $(DEST)/ - -$(addprefix $(DEST)/, $(DERIVED_TARGETS)): $(DEST)/% : $(DEST)/$(MAIN_TARGET) diff --git a/src/libyang/patch/debian-packaging-files.patch b/src/libyang/patch/debian-packaging-files.patch deleted file mode 100644 index 5370a94aa45..00000000000 --- a/src/libyang/patch/debian-packaging-files.patch +++ /dev/null @@ -1,233 +0,0 @@ -From 99afc75d62942e1e4a4d576a880c697ecb0bab06 Mon Sep 17 00:00:00 2001 -From: Saikrishna Arcot -Date: Fri, 1 Jul 2022 10:30:48 -0700 -Subject: [PATCH] Add debian packaging files. - -Libyang does have a custom cmake target that can make these files, but -it breaks several things. Building for another architecture doesn't -cleanly work unless you happen to enable language bindings in your -initial CMake call (otherwise, it will use the default C++ compiler -instead of whatever is set in the environment variable). In addition, -objcopy at the end doesn't appear to use the target -architecture-specific version for whatever reason. - -Make things cleaner by just creating the debian files. In these files, -bump up the compat level, remove the hardcoded debug packages (dbgsym -packages are automatically generated), and rely on debhelper to do the -configure/build. - -Signed-off-by: Saikrishna Arcot ---- - debian/changelog | 23 +++++++++++++++++++++ - debian/compat | 1 + - debian/control | 37 ++++++++++++++++++++++++++++++++++ - debian/copyright | 28 +++++++++++++++++++++++++ - debian/libyang-cpp-dev.install | 3 +++ - debian/libyang-cpp.install | 1 + - debian/libyang-dev.install | 3 +++ - debian/libyang.install | 5 +++++ - debian/python3-yang.install | 1 + - debian/rules | 16 +++++++++++++++ - debian/source/format | 1 + - 11 files changed, 119 insertions(+) - create mode 100644 debian/changelog - create mode 100644 debian/compat - create mode 100644 debian/control - create mode 100644 debian/copyright - create mode 100644 debian/libyang-cpp-dev.install - create mode 100644 debian/libyang-cpp.install - create mode 100644 debian/libyang-dev.install - create mode 100644 debian/libyang.install - create mode 100644 debian/python3-yang.install - create mode 100755 debian/rules - create mode 100644 debian/source/format - -diff --git a/debian/changelog b/debian/changelog -new file mode 100644 -index 00000000..421609c7 ---- /dev/null -+++ b/debian/changelog -@@ -0,0 +1,23 @@ -+libyang (1.0.73) stable; urgency=low -+ -+ * VERSION bump to version 1.0.73 (Radek Krejci) -+ -+ * SOVERSION bump to version 1.2.2 (Radek Krejci) -+ -+ * JSON parser CHANGE respect STRICT flag and if not set, ignore unknown data (Radek Krejci) -+ -+ * VERSION bump to version 1.0.72 (Radek Krejci) -+ -+ * SOVERSION bump to version 1.2.1 (Radek Krejci) -+ -+ * schema parsers BUGFIX duplicating iffeature expression data (Radek Krejci) -+ -+ * VERSION bump to version 1.0.71 (Radek Krejci) -+ -+ * SOVERSION bump to version 1.2.0 (Radek Krejci) -+ -+ * schema parsers BUGFIX creating implicit cases when augmenting choice (Radek Krejci) -+ -+ * Merge pull request #891 from opensourcerouting/api_tracing (Michal Vasko) -+ -+ -- sarcot Fri, 1 Jul 2022 16:46:13 +0000 -diff --git a/debian/compat b/debian/compat -new file mode 100644 -index 00000000..f599e28b ---- /dev/null -+++ b/debian/compat -@@ -0,0 +1 @@ -+10 -diff --git a/debian/control b/debian/control -new file mode 100644 -index 00000000..cb182fa4 ---- /dev/null -+++ b/debian/control -@@ -0,0 +1,37 @@ -+Source: libyang -+Maintainer: CESNET -+Priority: extra -+Standards-Version: 3.8.2 -+Build-Depends: debhelper (>= 10) -+Homepage: https://github.com/CESNET/libyang -+ -+Package: libyang -+Depends: libpcre3, ${shlibs:Depends} -+Conflicts: libyang-experimental (= 1.0) -+Section: libs -+Architecture: any -+Description: Libyang is YANG data modelling language parser and toolkit written (and providing API) in C. -+ -+Package: libyang-dev -+Depends: libpcre3-dev, libyang (= ${binary:Version}) -+Section: libdevel -+Architecture: any -+Description: Headers of libyang library. -+ -+Package: libyang-cpp -+Depends: libyang (= ${binary:Version}) -+Section: libs -+Architecture: any -+Description: Bindings of libyang library to C++ language. -+ -+Package: libyang-cpp-dev -+Depends: libpcre3-dev, libyang-cpp (= ${binary:Version}) -+Section: libdevel -+Architecture: any -+Description: Headers of bindings to c++ language libyang library. -+ -+Package: python3-yang -+Depends: libyang (= ${binary:Version}), libyang-cpp (= ${binary:Version}) -+Section: libs -+Architecture: any -+Description: Bindings of libyang library to python3 language. -diff --git a/debian/copyright b/debian/copyright -new file mode 100644 -index 00000000..f7cafac5 ---- /dev/null -+++ b/debian/copyright -@@ -0,0 +1,28 @@ -+Copyright (c) 2015-2016, CESNET -+All rights reserved. -+ -+Redistribution and use in source and binary forms, with or without -+modification, are permitted provided that the following conditions are met: -+ -+* Redistributions of source code must retain the above copyright notice, this -+ list of conditions and the following disclaimer. -+ -+* Redistributions in binary form must reproduce the above copyright notice, -+ this list of conditions and the following disclaimer in the documentation -+ and/or other materials provided with the distribution. -+ -+* Neither the name of libyang nor the names of its -+ contributors may be used to endorse or promote products derived from -+ this software without specific prior written permission. -+ -+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -+AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -+IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE -+FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL -+DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR -+SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER -+CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, -+OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE -+OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ -diff --git a/debian/libyang-cpp-dev.install b/debian/libyang-cpp-dev.install -new file mode 100644 -index 00000000..e56e41ed ---- /dev/null -+++ b/debian/libyang-cpp-dev.install -@@ -0,0 +1,3 @@ -+usr/lib/*/libyang-cpp.so -+usr/include/libyang/*.hpp -+usr/lib/*/pkgconfig/libyang-cpp.pc -diff --git a/debian/libyang-cpp.install b/debian/libyang-cpp.install -new file mode 100644 -index 00000000..2157465b ---- /dev/null -+++ b/debian/libyang-cpp.install -@@ -0,0 +1 @@ -+usr/lib/*/libyang-cpp.so.* -\ No newline at end of file -diff --git a/debian/libyang-dev.install b/debian/libyang-dev.install -new file mode 100644 -index 00000000..bb04ac28 ---- /dev/null -+++ b/debian/libyang-dev.install -@@ -0,0 +1,3 @@ -+usr/lib/*/libyang.so -+usr/lib/*/pkgconfig/libyang.pc -+usr/include/libyang/*.h -diff --git a/debian/libyang.install b/debian/libyang.install -new file mode 100644 -index 00000000..249a5291 ---- /dev/null -+++ b/debian/libyang.install -@@ -0,0 +1,5 @@ -+usr/bin/yanglint -+usr/bin/yangre -+usr/share/man/man1 -+usr/lib/*/libyang.so.* -+usr/lib/*/libyang/* -diff --git a/debian/python3-yang.install b/debian/python3-yang.install -new file mode 100644 -index 00000000..3272cd65 ---- /dev/null -+++ b/debian/python3-yang.install -@@ -0,0 +1 @@ -+usr/lib/python3/dist-packages/* -diff --git a/debian/rules b/debian/rules -new file mode 100755 -index 00000000..9308403e ---- /dev/null -+++ b/debian/rules -@@ -0,0 +1,16 @@ -+#!/usr/bin/make -f -+# -*- makefile -*- -+# Uncomment this to turn on verbose mode. -+export DH_VERBOSE=1 -+ -+%: -+ dh $@ -+ -+override_dh_auto_configure: -+ dh_auto_configure -- -DENABLE_LYD_PRIV=ON -DGEN_LANGUAGE_BINDINGS=ON -DGEN_PYTHON_VERSION=2 -+ -+override_dh_makeshlibs: -+ dh_makeshlibs -Xextensions -Xuser_types -+ -+override_dh_auto_test: -+ ctest --output-on-failure -diff --git a/debian/source/format b/debian/source/format -new file mode 100644 -index 00000000..163aaf8d ---- /dev/null -+++ b/debian/source/format -@@ -0,0 +1 @@ -+3.0 (quilt) --- -2.25.1 - diff --git a/src/libyang/patch/large_file_support_arm32.patch b/src/libyang/patch/large_file_support_arm32.patch deleted file mode 100644 index e3fb2b73905..00000000000 --- a/src/libyang/patch/large_file_support_arm32.patch +++ /dev/null @@ -1,11 +0,0 @@ -diff --git a/CMakeLists.txt b/CMakeLists.txt -index 8635ba1..39f0741 100644 ---- a/CMakeLists.txt -+++ b/CMakeLists.txt -@@ -436,3 +436,6 @@ endif(ENABLE_BUILD_FUZZ_TARGETS) - if(GEN_LANGUAGE_BINDINGS AND GEN_CPP_BINDINGS) - add_subdirectory(swig) - endif() -+ -+#Enable large file support for 32-bit arch -+add_definitions(-D_FILE_OFFSET_BITS=64) diff --git a/src/libyang/patch/libyang-leaf-must.patch b/src/libyang/patch/libyang-leaf-must.patch deleted file mode 100644 index 7e1c01c49e4..00000000000 --- a/src/libyang/patch/libyang-leaf-must.patch +++ /dev/null @@ -1,29 +0,0 @@ -diff --git a/swig/cpp/src/Tree_Schema.cpp b/swig/cpp/src/Tree_Schema.cpp -index 3587320..8da206a 100644 ---- a/swig/cpp/src/Tree_Schema.cpp -+++ b/swig/cpp/src/Tree_Schema.cpp -@@ -344,6 +344,7 @@ S_Schema_Node Schema_Node_Choice::dflt() { - Schema_Node_Leaf::~Schema_Node_Leaf() {}; - S_Set Schema_Node_Leaf::backlinks() LY_NEW_CASTED(lys_node_leaf, node, backlinks, Set); - S_When Schema_Node_Leaf::when() LY_NEW_CASTED(lys_node_leaf, node, when, When); -+std::vector Schema_Node_Leaf::must() LY_NEW_LIST_CASTED(lys_node_leaf, node, must, must_size, Restr); - S_Type Schema_Node_Leaf::type() {return std::make_shared(&((struct lys_node_leaf *)node)->type, deleter);} - S_Schema_Node_List Schema_Node_Leaf::is_key() { - uint8_t pos; -diff --git a/swig/cpp/src/Tree_Schema.hpp b/swig/cpp/src/Tree_Schema.hpp -index d506891..f8ecc50 100644 ---- a/swig/cpp/src/Tree_Schema.hpp -+++ b/swig/cpp/src/Tree_Schema.hpp -@@ -683,8 +683,12 @@ public: - ~Schema_Node_Leaf(); - /** get backlinks variable from [lys_node_leaf](@ref lys_node_leaf)*/ - S_Set backlinks(); -+ /** get must_size variable from [lys_node_leaf](@ref lys_node_leaf)*/ -+ uint8_t must_size() {return ((struct lys_node_leaf *)node)->must_size;}; - /** get when variable from [lys_node_leaf](@ref lys_node_leaf)*/ - S_When when(); -+ /** get must variable from [lys_node_leaf](@ref lys_node_leaf)*/ -+ std::vector must(); - /** get type variable from [lys_node_leaf](@ref lys_node_leaf)*/ - S_Type type(); - /** get units variable from [lys_node_leaf](@ref lys_node_leaf)*/ diff --git a/src/libyang/patch/libyang-with-python-3.12.patch b/src/libyang/patch/libyang-with-python-3.12.patch deleted file mode 100644 index 5237a791421..00000000000 --- a/src/libyang/patch/libyang-with-python-3.12.patch +++ /dev/null @@ -1,13 +0,0 @@ -diff --git a/swig/python/yang.i b/swig/python/yang.i -index 32e39deab..ceee62e26 100644 ---- a/swig/python/yang.i -+++ b/swig/python/yang.i -@@ -44,7 +44,7 @@ public: - - std::pair ly_module_imp_clb(const char *mod_name, const char *mod_rev, const char *submod_name, const char *sub_rev, PyObject *user_data) { - PyObject *arglist = Py_BuildValue("(ssssO)", mod_name, mod_rev, submod_name, sub_rev, user_data); -- PyObject *my_result = PyEval_CallObject(_callback, arglist); -+ PyObject *my_result = PyObject_CallObject(_callback, arglist); - Py_DECREF(arglist); - if (my_result == nullptr) { - throw std::runtime_error("Python callback ly_module_imp_clb failed.\n"); diff --git a/src/libyang/patch/libyang.patch b/src/libyang/patch/libyang.patch deleted file mode 100644 index 45eba825ce3..00000000000 --- a/src/libyang/patch/libyang.patch +++ /dev/null @@ -1,32 +0,0 @@ -diff --git a/CMakeLists.txt b/CMakeLists.txt -index fa562dd3..8635ba15 100644 ---- a/CMakeLists.txt -+++ b/CMakeLists.txt -@@ -33,6 +33,7 @@ set(LIBYANG_MICRO_SOVERSION 2) - set(LIBYANG_SOVERSION_FULL ${LIBYANG_MAJOR_SOVERSION}.${LIBYANG_MINOR_SOVERSION}.${LIBYANG_MICRO_SOVERSION}) - set(LIBYANG_SOVERSION ${LIBYANG_MAJOR_SOVERSION}) - -+set(CMAKE_INSTALL_PREFIX /usr) - # set default build type if not specified by user - if(NOT CMAKE_BUILD_TYPE) - set(CMAKE_BUILD_TYPE debug) -diff --git a/packages/debian.rules.in b/packages/debian.rules.in -index d565819e..e92fe4a1 100644 ---- a/packages/debian.rules.in -+++ b/packages/debian.rules.in -@@ -9,10 +9,14 @@ export DH_VERBOSE=1 - override_dh_strip: - dh_strip -plibyang@PACKAGE_PART_NAME@ --dbg-package=libyang@PACKAGE_PART_NAME@-dbg - dh_strip -plibyang-cpp@PACKAGE_PART_NAME@ --dbg-package=libyang-cpp@PACKAGE_PART_NAME@-dbg -+ #dh_strip -ppython2-yang@PACKAGE_PART_NAME@ --dbg-package=python2-yang@PACKAGE_PART_NAME@-dbg - dh_strip -ppython3-yang@PACKAGE_PART_NAME@ --dbg-package=python3-yang@PACKAGE_PART_NAME@-dbg - - override_dh_auto_configure: -- cmake -DCMAKE_INSTALL_PREFIX:PATH=/usr -DCMAKE_BUILD_TYPE:String="@BUILD_TYPE@" -DGEN_LANGUAGE_BINDINGS=ON . -+ cmake -DCMAKE_INSTALL_PREFIX:PATH=/usr -DCMAKE_BUILD_TYPE:String="@BUILD_TYPE@" -DENABLE_LYD_PRIV=ON -DGEN_LANGUAGE_BINDINGS=ON -DGEN_PYTHON_VERSION=2 . -+ -+override_dh_makeshlibs: -+ dh_makeshlibs -Xextensions -Xuser_types - - override_dh_auto_test: - ctest --output-on-failure diff --git a/src/libyang/patch/libyang_mgmt_framework.patch b/src/libyang/patch/libyang_mgmt_framework.patch deleted file mode 100644 index 03b7ea3476b..00000000000 --- a/src/libyang/patch/libyang_mgmt_framework.patch +++ /dev/null @@ -1,13 +0,0 @@ -diff --git a/src/tree_data.c b/src/tree_data.c -index 04653a46..65dca211 100644 ---- a/src/tree_data.c -+++ b/src/tree_data.c -@@ -842,7 +842,7 @@ error: - return ret; - } - --int -+API int - lyd_check_mandatory_tree(struct lyd_node *root, struct ly_ctx *ctx, const struct lys_module **modules, int mod_count, - int options) - { diff --git a/src/libyang/patch/series b/src/libyang/patch/series deleted file mode 100644 index aaa6b8807f0..00000000000 --- a/src/libyang/patch/series +++ /dev/null @@ -1,7 +0,0 @@ -libyang.patch -libyang_mgmt_framework.patch -swig.patch -large_file_support_arm32.patch -debian-packaging-files.patch -libyang-leaf-must.patch -libyang-with-python-3.12.patch diff --git a/src/libyang/patch/swig.patch b/src/libyang/patch/swig.patch deleted file mode 100644 index d2b4080d368..00000000000 --- a/src/libyang/patch/swig.patch +++ /dev/null @@ -1,136 +0,0 @@ -diff --git a/swig/CMakeLists.txt b/swig/CMakeLists.txt -index 4cee36ec..0baa69ab 100644 ---- a/swig/CMakeLists.txt -+++ b/swig/CMakeLists.txt -@@ -20,27 +20,34 @@ endif() - - # find Python package - if(GEN_PYTHON_BINDINGS AND SWIG_FOUND) -- message(STATUS "Python version ${GEN_PYTHON_VERSION} was selected") -- unset(PYTHON_LIBRARY CACHE) -- unset(PYTHON_EXECUTABLE CACHE) -- unset(PYTHON_INCLUDE_DIR CACHE) -- unset(PYTHON_LIBRARY_DEBUG CACHE) -- if(${GEN_PYTHON_VERSION} STREQUAL "2") -- find_package(PythonLibs 2 REQUIRED) -- find_package(PythonInterp 2 REQUIRED) -- if(NOT PYTHONLIBS_FOUND) -- message(WARNING "Did not found Python version 2.x") -- message(STATUS "Sysrepo supports Python 2.x and Python 3.x") -- endif() -- elseif(${GEN_PYTHON_VERSION} STREQUAL "3") -- find_package(PythonLibs 3 REQUIRED) -- find_package(PythonInterp 3 REQUIRED) -- if(NOT PYTHONLIBS_FOUND) -- message(WARNING "Did not found Python version 3.x") -- message(STATUS "Sysrepo supports Python 2.x and Python 3.x") -- endif() -+ if(ENABLE_STATIC) -+ message(WARNING "Can't create a static Python module") - else() -- message(WARNING "Sysrepo supports Python 2.x and Python 3.x") -+ set(GEN_PYTHON_VERSION 3) -+ foreach(CUR_PYTHON_VERSION ${GEN_PYTHON_VERSION}) -+ message(STATUS "Python version ${CUR_PYTHON_VERSION} was selected") -+ -+ unset(PYTHON_EXECUTABLE CACHE) -+ unset(PYTHON_INCLUDE_PATH CACHE) -+ unset(PYTHON_EXT_SUFFIX CACHE) -+ unset(PYTHON_MODULE_PATH CACHE) -+ set(PYTHON_EXT_SUFFIX ".so") -+ -+ find_program(PYTHON_EXECUTABLE NAMES python${CUR_PYTHON_VERSION}) -+ execute_process(COMMAND ${PYTHON_EXECUTABLE} -c -+ "from distutils.sysconfig import get_config_var; print(get_config_var('INCLUDEPY'))" -+ OUTPUT_VARIABLE PYTHON_INCLUDE_PATH -+ OUTPUT_STRIP_TRAILING_WHITESPACE ) -+ #execute_process(COMMAND ${PYTHON_EXECUTABLE} -c -+ # "from distutils.sysconfig import get_config_var; print(get_config_var('EXT_SUFFIX'))" -+ # OUTPUT_VARIABLE PYTHON_EXT_SUFFIX -+ # OUTPUT_STRIP_TRAILING_WHITESPACE ) -+ execute_process(COMMAND ${PYTHON_EXECUTABLE} -c -+ "from distutils.sysconfig import get_python_lib; print(get_python_lib(plat_specific=True))" -+ OUTPUT_VARIABLE PYTHON_MODULE_PATH -+ OUTPUT_STRIP_TRAILING_WHITESPACE ) -+ add_subdirectory(python python${CUR_PYTHON_VERSION}) -+ endforeach(CUR_PYTHON_VERSION) - endif() - endif() - -@@ -99,12 +106,6 @@ if (GEN_CPP_BINDINGS) - endif() - endif() - --if(ENABLE_STATIC AND PYTHONLIBS_FOUND AND PYTHONINTERP_FOUND AND (${GEN_PYTHON_VERSION} STREQUAL "2" OR ${GEN_PYTHON_VERSION} STREQUAL "3")) -- message(WARNING "Can't create a static Python module") --elseif(PYTHONLIBS_FOUND AND PYTHONINTERP_FOUND AND (${GEN_PYTHON_VERSION} STREQUAL "2" OR ${GEN_PYTHON_VERSION} STREQUAL "3")) -- add_subdirectory(python) --endif() -- - if(NOT ENABLE_STATIC AND GEN_JAVASCRIPT_BINDINGS) - message(WARNING "Can't create Javascript bindings with a shared library, please use -DENABLE_STATIC") - elseif(ENABLE_STATIC AND GEN_JAVASCRIPT_BINDINGS) -diff --git a/swig/python/CMakeLists.txt b/swig/python/CMakeLists.txt -index 994b1234..5d18b8bf 100644 ---- a/swig/python/CMakeLists.txt -+++ b/swig/python/CMakeLists.txt -@@ -1,30 +1,38 @@ - set(PYTHON_SWIG_BINDING yang) -+set(PYTHON_SWIG_TARGET yang${CUR_PYTHON_VERSION}) - include_directories(${PYTHON_INCLUDE_PATH}) - include_directories(${CMAKE_CURRENT_SOURCE_DIR}) -+include_directories(${PROJECT_SOURCE_DIR}/cpp/src) - - set(CMAKE_SWIG_FLAGS "-c++") --set(CMAKE_SWIG_FLAGS "-I${PROJECT_SOURCE_DIR}") -+set(CMAKE_SWIG_FLAGS "-I${PROJECT_SOURCE_DIR}" "-I${PROJECT_SOURCE_DIR}/cpp/src") - set(CMAKE_SWIG_OUTDIR ${CMAKE_CURRENT_BINARY_DIR}) - --set_source_files_properties(${PYTHON_SWIG_BINDING}.i PROPERTIES CPLUSPLUS ON PREFIX "") -+set_source_files_properties(${PYTHON_SWIG_BINDING}.i PROPERTIES CPLUSPLUS ON PREFIX "" SWIG_MODULE_NAME ${PYTHON_SWIG_BINDING}) - - if(${CMAKE_VERSION} VERSION_LESS "3.8.0") -- swig_add_module(${PYTHON_SWIG_BINDING} python ${PYTHON_SWIG_BINDING}.i) -+ swig_add_module(${PYTHON_SWIG_TARGET} python ${PYTHON_SWIG_BINDING}.i) - else() -- swig_add_library(${PYTHON_SWIG_BINDING} LANGUAGE python SOURCES ${PYTHON_SWIG_BINDING}.i) -+ swig_add_library(${PYTHON_SWIG_TARGET} LANGUAGE python SOURCES ${PYTHON_SWIG_BINDING}.i) - endif() --swig_link_libraries(${PYTHON_SWIG_BINDING} ${PYTHON_LIBRARIES} libyang-cpp) -+swig_link_libraries(${PYTHON_SWIG_TARGET} ${PYTHON_LIBRARIES} libyang-cpp) -+ -+set_target_properties(_${PYTHON_SWIG_TARGET} PROPERTIES OUTPUT_NAME "_yang") - - # Generate header with SWIG run-time functions - execute_process(COMMAND ${SWIG_EXECUTABLE} -python -external-runtime ${CMAKE_CURRENT_BINARY_DIR}/swigpyrun.h) - --file(COPY "examples" DESTINATION ${CMAKE_CURRENT_BINARY_DIR}) -+add_custom_command(TARGET ${PYTHON_SWIG_TARGET}_swig_compilation POST_BUILD -+ COMMAND sed -e "'s/\\(inst =.*tp_new.*\\)Py_None, Py_None);/PyObject *tup = PyTuple_New(0); \\1tup, Py_None); Py_DECREF(tup);/'" < swigpyrun.h > swigpyrun.h.new -+ COMMAND sed -e "'s/\\(inst =.*tp_new.*\\)Py_None, Py_None);/PyObject *tup = PyTuple_New(0); \\1tup, Py_None); Py_DECREF(tup);/'" < yangPYTHON_wrap.cxx > yangPYTHON_wrap.cxx.new -+ COMMAND diff -q swigpyrun.h swigpyrun.h.new || mv swigpyrun.h.new swigpyrun.h -+ COMMAND diff -q yangPYTHON_wrap.cxx yangPYTHON_wrap.cxx.new || mv yangPYTHON_wrap.cxx.new yangPYTHON_wrap.cxx -+ WORKING_DIRECTORY ${CMAKE_CURRENT_BINARY_DIR} -+ ) - --execute_process(COMMAND ${PYTHON_EXECUTABLE} -c "from distutils.sysconfig import get_python_lib; print(get_python_lib(plat_specific=True))" -- OUTPUT_VARIABLE PYTHON_MODULE_PATH -- OUTPUT_STRIP_TRAILING_WHITESPACE ) -+file(COPY "examples" DESTINATION ${CMAKE_CURRENT_BINARY_DIR}) - --install( TARGETS _${PYTHON_SWIG_BINDING} DESTINATION ${PYTHON_MODULE_PATH}) -+install( TARGETS _${PYTHON_SWIG_TARGET} DESTINATION ${PYTHON_MODULE_PATH}) - install( FILES "${CMAKE_CURRENT_BINARY_DIR}/${PYTHON_SWIG_BINDING}.py" DESTINATION ${PYTHON_MODULE_PATH}) - install( FILES "${CMAKE_CURRENT_BINARY_DIR}/swigpyrun.h" DESTINATION ${CMAKE_INSTALL_INCLUDEDIR}/libyang) - -@@ -51,8 +59,8 @@ if(ENABLE_BUILD_TESTS) - ADD_PYTHON_TEST(test_tree_data) - ADD_PYTHON_TEST(test_tree_schema) - -- add_custom_command(TARGET ${SWIG_MODULE_${PYTHON_SWIG_BINDING}_REAL_NAME} POST_BUILD -- COMMAND cp "${CMAKE_CURRENT_BINARY_DIR}/_${PYTHON_SWIG_BINDING}.so" ${PY2_SWIG_DIR}/tests -+ add_custom_command(TARGET ${SWIG_MODULE_${PYTHON_SWIG_TARGET}_REAL_NAME} POST_BUILD -+ COMMAND cp "${CMAKE_CURRENT_BINARY_DIR}/_yang${PYTHON_EXT_SUFFIX}" ${PY2_SWIG_DIR}/tests/_yang.so - COMMAND cp "${CMAKE_CURRENT_BINARY_DIR}/${PYTHON_SWIG_BINDING}.py" ${PY2_SWIG_DIR}/tests - WORKING_DIRECTORY ${CMAKE_BINARY_DIR} - ) diff --git a/src/linkmgrd b/src/linkmgrd index 15f71fa5d3c..35954d86cb4 160000 --- a/src/linkmgrd +++ b/src/linkmgrd @@ -1 +1 @@ -Subproject commit 15f71fa5d3c06e13096630a2849754f0cf66b2fd +Subproject commit 35954d86cb44723764bbe6ec1b63581fc5a43b21 diff --git a/src/lldpd/Makefile b/src/lldpd/Makefile index 73c23d56c2d..6762fa16a03 100644 --- a/src/lldpd/Makefile +++ b/src/lldpd/Makefile @@ -5,7 +5,7 @@ SHELL = /bin/bash MAIN_TARGET = $(LLDPD) DERIVED_TARGETS = $(LIBLLDPCTL) $(LLDPD_DBG) -LLDP_URL = https://packages.trafficmanager.net/public/debian/pool/main/l/lldpd +LLDP_URL = $(BUILD_PUBLIC_URL)/debian/pool/main/l/lldpd DSC_FILE = lldpd_$(LLDPD_VERSION_FULL).dsc ORIG_FILE = lldpd_$(LLDPD_VERSION).orig.tar.gz diff --git a/src/makedumpfile/Makefile b/src/makedumpfile/Makefile new file mode 100644 index 00000000000..5479f60de0c --- /dev/null +++ b/src/makedumpfile/Makefile @@ -0,0 +1,28 @@ +.ONESHELL: +SHELL = /bin/bash +.SHELLFLAGS += -e + +MAIN_TARGET = $(MAKEDUMPFILE) + +$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : + # Remove any stale files + rm -rf makedumpfile-$(MAKEDUMPFILE_VERSION)* + + # Get makedumpfile release + dget https://deb.debian.org/debian/pool/main/m/makedumpfile/makedumpfile_$(MAKEDUMPFILE_VERSION)-$(MAKEDUMPFILE_DEB_REVISION).dsc + pushd makedumpfile-$(MAKEDUMPFILE_VERSION) + + git init + git add -f * + git commit -m "unmodified makedumpfile source" + + # Build source and Debian packages +ifeq ($(CROSS_BUILD_ENVIRON), y) + dpkg-buildpackage -rfakeroot -b -us -uc -a$(CONFIGURED_ARCH) -Pcross,nocheck -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $(SONIC_DPKG_ADMINDIR) +else + dpkg-buildpackage -rfakeroot -b -us -uc -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $(SONIC_DPKG_ADMINDIR) +endif + popd + + # Move the newly-built .deb package to the destination directory + mv $* $(DEST)/ diff --git a/src/p4lang/Makefile b/src/p4lang/Makefile index bf04e7eedfd..2e5173745bb 100644 --- a/src/p4lang/Makefile +++ b/src/p4lang/Makefile @@ -10,6 +10,8 @@ $(addprefix $(DEST)/, $(P4LANG_TARGET)): $(DEST)/% : dget -u p4lang-pi_$(P4LANG_PI_VERSION_FULL).dsc http://download.opensuse.org/repositories/home:/p4lang/Debian_11/p4lang-pi_$(P4LANG_PI_VERSION_FULL).dsc pushd p4lang-pi-$(P4LANG_PI_VERSION) patch -p1 -i ../p4lang-pi.patch/use-boost-1.83.patch + patch -p1 -i ../p4lang-pi.patch/remove-protobuf-from-debian-dependency.patch + patch -p1 -i ../p4lang-pi.patch/remove-init-file.patch ifeq ($(CROSS_BUILD_ENVIRON), y) dpkg-buildpackage -us -uc -b -a$(CONFIGURED_ARCH) -Pcross,nocheck -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $(SONIC_DPKG_ADMINDIR) else @@ -26,6 +28,7 @@ $(addprefix $(DEST)/, $(P4LANG_BMV2_TARGET)): $(DEST)/% : dget -u p4lang-bmv2_$(P4LANG_BMV2_VERSION_FULL).dsc http://download.opensuse.org/repositories/home:/p4lang/Debian_11/p4lang-bmv2_$(P4LANG_BMV2_VERSION_FULL).dsc pushd p4lang-bmv2-$(P4LANG_BMV2_VERSION) patch -p1 -i ../p4lang-bmv2.patch/use-boost-1.83.patch + patch -p1 -i ../p4lang-bmv2.patch/remove-unnecessary-dependencies.patch ifeq ($(CROSS_BUILD_ENVIRON), y) dpkg-buildpackage -us -uc -b -a$(CONFIGURED_ARCH) -Pcross,nocheck -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $(SONIC_DPKG_ADMINDIR) else @@ -42,6 +45,8 @@ $(addprefix $(DEST)/, $(P4LANG_P4C_TARGET)): $(DEST)/% : pushd p4lang-p4c-$(P4LANG_P4C_VERSION) patch -p1 -i ../p4lang-p4c.patch/use-boost-1.83.patch patch -p1 -i ../p4lang-p4c.patch/fix-build-for-boost-1.83.patch + patch -p1 -i ../p4lang-p4c.patch/update-thrift-dependency.patch + patch -p1 -i ../p4lang-p4c.patch/remove-protobuf-from-debian-dependency.patch ifeq ($(CROSS_BUILD_ENVIRON), y) dpkg-buildpackage -us -uc -b -a$(CONFIGURED_ARCH) -Pcross,nocheck -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $(SONIC_DPKG_ADMINDIR) else diff --git a/src/p4lang/p4lang-bmv2.patch/remove-unnecessary-dependencies.patch b/src/p4lang/p4lang-bmv2.patch/remove-unnecessary-dependencies.patch new file mode 100644 index 00000000000..2e92279f3dd --- /dev/null +++ b/src/p4lang/p4lang-bmv2.patch/remove-unnecessary-dependencies.patch @@ -0,0 +1,34 @@ +Index: p4lang-bmv2-1.15.0/debian/control +=================================================================== +--- p4lang-bmv2-1.15.0.orig/debian/control ++++ p4lang-bmv2-1.15.0/debian/control +@@ -26,7 +26,6 @@ Build-Depends: + libprotobuf-dev, + libprotoc-dev, + libssl-dev, +- libthrift | libthrift-0.11.0 | libthrift-0.13.0 | libthrift-0.16.0 | libthrift-0.17.0, + libthrift-dev, + libtool, + pkg-config, +@@ -50,21 +49,6 @@ Depends: + ${shlibs:Depends}, + ${misc:Depends}, + ${python3:Depends}, +- libboost1.83-dev, +- libboost-filesystem1.83-dev, +- libboost-program-options1.83-dev, +- libboost-system1.83-dev, +- libboost-thread1.83-dev, +- libgmp-dev, +- libgrpc++-dev, +- libgrpc-dev, +- libnanomsg-dev, +- libpcap-dev, +- libprotobuf-dev, +- libprotoc-dev, +- libssl-dev, +- libthrift | libthrift-0.11.0 | libthrift-0.13.0 | libthrift-0.16.0 | libthrift-0.17.0, +- libthrift-dev, + libtool, + pkg-config, + protobuf-compiler, diff --git a/src/p4lang/p4lang-bmv2.patch/use-boost-1.83.patch b/src/p4lang/p4lang-bmv2.patch/use-boost-1.83.patch index 1518e7fd13a..ede6d2a7c97 100644 --- a/src/p4lang/p4lang-bmv2.patch/use-boost-1.83.patch +++ b/src/p4lang/p4lang-bmv2.patch/use-boost-1.83.patch @@ -36,3 +36,15 @@ Index: p4lang-bmv2-1.15.0/debian/control libgmp-dev, libgrpc++-dev, libgrpc-dev, +diff --git a/include/bm/bm_sim/dynamic_bitset.h b/include/bm/bm_sim/dynamic_bitset.h +index 350429f..c208293 100644 +--- a/include/bm/bm_sim/dynamic_bitset.h ++++ b/include/bm/bm_sim/dynamic_bitset.h +@@ -23,6 +23,7 @@ + + #include + #include ++#include + #include + #include + diff --git a/src/p4lang/p4lang-p4c.patch/remove-protobuf-from-debian-dependency.patch b/src/p4lang/p4lang-p4c.patch/remove-protobuf-from-debian-dependency.patch new file mode 100644 index 00000000000..3065a515ca6 --- /dev/null +++ b/src/p4lang/p4lang-p4c.patch/remove-protobuf-from-debian-dependency.patch @@ -0,0 +1,34 @@ +Don't depend on Debian's version of the Python 3 protobuf package. Instead, +have it use the version that we install with pip. This is so that there's a +single copy of the protobuf package present in the slave container and the +installed environment. + +Index: p4lang-p4c-1.2.4.2/debian/control +=================================================================== +--- p4lang-p4c-1.2.4.2.orig/debian/control ++++ p4lang-p4c-1.2.4.2/debian/control +@@ -23,10 +23,8 @@ Build-Depends: + iproute2, + net-tools, + python3-all, +- python3-grpcio, + python3-pyroute2, + python3-ply, +- python3-protobuf, + python3-scapy, + python3-setuptools, + python3-thrift, +@@ -64,13 +62,11 @@ Depends: + clang, + iproute2, + net-tools, +- python3-grpcio, + python3-pyroute2, + python3-ply, + python3-scapy, + python3-setuptools, + python3-thrift, +- python3-protobuf, + libprotobuf-dev, + libprotoc-dev, + protobuf-compiler, diff --git a/src/p4lang/p4lang-p4c.patch/update-thrift-dependency.patch b/src/p4lang/p4lang-p4c.patch/update-thrift-dependency.patch new file mode 100644 index 00000000000..f9572e53a59 --- /dev/null +++ b/src/p4lang/p4lang-p4c.patch/update-thrift-dependency.patch @@ -0,0 +1,20 @@ +Index: p4lang-p4c-1.2.4.2/debian/control +=================================================================== +--- p4lang-p4c-1.2.4.2.orig/debian/control ++++ p4lang-p4c-1.2.4.2/debian/control +@@ -36,7 +36,6 @@ Build-Depends: + libgrpc-dev, + libgrpc++-dev, + protobuf-compiler-grpc, +- libthrift | libthrift-0.11.0 | libthrift-0.13.0 | libthrift-0.16.0 | libthrift-0.17.0, + libthrift-dev, + thrift-compiler, + p4lang-bmv2 +@@ -78,7 +77,6 @@ Depends: + libgrpc-dev, + libgrpc++-dev, + protobuf-compiler-grpc, +- libthrift | libthrift-0.11.0 | libthrift-0.13.0 | libthrift-0.16.0 | libthrift-0.17.0, + libthrift-dev, + thrift-compiler, + p4lang-bmv2 diff --git a/src/p4lang/p4lang-p4c.patch/use-boost-1.83.patch b/src/p4lang/p4lang-p4c.patch/use-boost-1.83.patch index da0c45e2683..01ea6b82b89 100644 --- a/src/p4lang/p4lang-p4c.patch/use-boost-1.83.patch +++ b/src/p4lang/p4lang-p4c.patch/use-boost-1.83.patch @@ -10,7 +10,7 @@ Index: p4lang-p4c-1.2.4.2/debian/control - libboost-all-dev, - libboost-graph-dev, - libboost-iostreams-dev, -+ libboost1.83-all-dev, ++ libboost1.83-all-dev | libboost-all-dev (>= 1.83), libfl-dev, libgc-dev, libgmp-dev, @@ -22,7 +22,7 @@ Index: p4lang-p4c-1.2.4.2/debian/control - libboost-all-dev, - libboost-graph-dev, - libboost-iostreams-dev, -+ libboost1.83-all-dev, ++ libboost1.83-all-dev | libboost-all-dev (>= 1.83), libfl-dev, libgc-dev, libgmp-dev, diff --git a/src/p4lang/p4lang-pi.patch/remove-init-file.patch b/src/p4lang/p4lang-pi.patch/remove-init-file.patch new file mode 100644 index 00000000000..0712dd4b774 --- /dev/null +++ b/src/p4lang/p4lang-pi.patch/remove-init-file.patch @@ -0,0 +1,10 @@ +Index: p4lang-pi-0.1.0/debian/rules +=================================================================== +--- p4lang-pi-0.1.0.orig/debian/rules ++++ p4lang-pi-0.1.0/debian/rules +@@ -33,3 +33,5 @@ override_dh_auto_install: + dh_auto_install -- DESTDIR=$(CURDIR)/debian/p4lang-pi install + find $(CURDIR)/debian/p4lang-pi -name "*.pyc" | xargs rm -f + find $(CURDIR)/debian/p4lang-pi -name "*.pyo" | xargs rm -f ++ # Workaround to encourage/force the use of the pip-installed protobuf library ++ rm $(CURDIR)/debian/p4lang-pi/usr/lib/python3.*/site-packages/google/__init__.py diff --git a/src/p4lang/p4lang-pi.patch/remove-protobuf-from-debian-dependency.patch b/src/p4lang/p4lang-pi.patch/remove-protobuf-from-debian-dependency.patch new file mode 100644 index 00000000000..7f0264505e2 --- /dev/null +++ b/src/p4lang/p4lang-pi.patch/remove-protobuf-from-debian-dependency.patch @@ -0,0 +1,22 @@ +Don't depend on Debian's version of the Python 3 protobuf package. Instead, +have it use the version that we install with pip. This is so that there's a +single copy of the protobuf package present in the slave container and the +installed environment. + +Index: p4lang-pi-0.1.0/debian/control +=================================================================== +--- p4lang-pi-0.1.0.orig/debian/control ++++ p4lang-pi-0.1.0/debian/control +@@ -43,11 +43,9 @@ Depends: + libprotobuf-dev, + libprotoc-dev, + protobuf-compiler, +- python3-protobuf, + libgrpc++-dev, + libgrpc-dev, +- protobuf-compiler-grpc, +- python3-grpcio ++ protobuf-compiler-grpc + Description: Implementation framework of a P4Runtime server + Protocol Independent API (PI or P4 Runtime) defines a set of APIs that allow + interacting with entities defined in a P4 program. diff --git a/src/ptf-py3.patch/0007-Remove-setuptools-scm-git-archive-dependency-in-Trixie.patch b/src/ptf-py3.patch/0007-Remove-setuptools-scm-git-archive-dependency-in-Trixie.patch new file mode 100644 index 00000000000..298c71b4e23 --- /dev/null +++ b/src/ptf-py3.patch/0007-Remove-setuptools-scm-git-archive-dependency-in-Trixie.patch @@ -0,0 +1,25 @@ +From ab21b139d4c381b6cba8fb19c35fd0cfcdb4f22f Mon Sep 17 00:00:00 2001 +From: Hemanth Kumar Tirupati +Date: Sat, 7 Mar 2026 00:04:53 +0000 +Subject: [PATCH] Remove setuptools-scm-git-archive dependency in Trixie + +Signed-off-by: Hemanth Kumar Tirupati +--- + pyproject.toml | 1 - + 1 file changed, 1 deletion(-) + +diff --git a/pyproject.toml b/pyproject.toml +index 74a5350..a1002f7 100644 +--- a/pyproject.toml ++++ b/pyproject.toml +@@ -2,7 +2,6 @@ + requires = [ + "setuptools", + "setuptools_scm[toml]", +- "setuptools_scm_git_archive", + "wheel", + ] + build-backend = 'setuptools.build_meta' +-- +2.50.1 + diff --git a/src/ptf-py3.patch/series b/src/ptf-py3.patch/series index f71670fb1fb..fb77ac27a29 100644 --- a/src/ptf-py3.patch/series +++ b/src/ptf-py3.patch/series @@ -4,3 +4,4 @@ 0004-Consider-only-expected-packets-for-timeout.patch 0005-Fix-a-multithreading-issue-in-writing-pcap-files-204.patch 0006-Improve-the-runtime-of-method-verify_n.patch +0007-Remove-setuptools-scm-git-archive-dependency-in-Trixie.patch diff --git a/src/rasdaemon/Makefile b/src/rasdaemon/Makefile index c7ba4e0987a..5cf8815490f 100644 --- a/src/rasdaemon/Makefile +++ b/src/rasdaemon/Makefile @@ -5,13 +5,19 @@ SHELL = /bin/bash MAIN_TARGET = rasdaemon_$(RASDAEMON_VERSION)_$(CONFIGURED_ARCH).deb DERIVED_TARGETS = rasdaemon-dbgsym_$(RASDAEMON_VERSION)_$(CONFIGURED_ARCH).deb +# Pinned commit hash for debian/0.6.8-1 tag. +# We use a commit hash instead of a tarball because the patch is applied +# via git apply, which requires a git repository. +RASDAEMON_COMMIT = 51a7f485f8b2e2ae43e613f19c5a387595174132 + $(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : rm -rf rasdaemon/ - # Checkout Repository - git clone https://salsa.debian.org/tai271828/rasdaemon.git -b debian/$(RASDAEMON_VERSION) - + # Checkout Repository (pinned to specific commit for reproducibility) + git clone https://salsa.debian.org/tai271828/rasdaemon.git pushd ./rasdaemon + git checkout $(RASDAEMON_COMMIT) + # Patch git apply ../0001-Check-CPUs-online-not-configured.patch ifeq ($(CROSS_BUILD_ENVIRON), y) diff --git a/src/scapy b/src/scapy index 8b63d73a172..8e08cbf759d 160000 --- a/src/scapy +++ b/src/scapy @@ -1 +1 @@ -Subproject commit 8b63d73a17266bae2a61513ea97ded5283a7ccd3 +Subproject commit 8e08cbf759de6709a5b4af6bea3655d293129bb4 diff --git a/src/scapy.patch/0001-Fix-version-string-generation-when-scapy-is-a-submod.patch b/src/scapy.patch/0001-Fix-version-string-generation-when-scapy-is-a-submod.patch index 37f5253db0c..f141419ac0e 100644 --- a/src/scapy.patch/0001-Fix-version-string-generation-when-scapy-is-a-submod.patch +++ b/src/scapy.patch/0001-Fix-version-string-generation-when-scapy-is-a-submod.patch @@ -12,7 +12,7 @@ diff --git a/scapy/__init__.py b/scapy/__init__.py index f920151e..2adbea19 100644 --- a/scapy/__init__.py +++ b/scapy/__init__.py -@@ -42,9 +42,6 @@ def _version_from_git_describe(): +@@ -104,9 +104,6 @@ def _version_from_git_describe(): :raises CalledProcessError: if git is unavailable :return: Scapy's latest tag """ diff --git a/src/scapy.patch/0002-Check-if-the-network-interface-still-exists.patch b/src/scapy.patch/0002-Check-if-the-network-interface-still-exists.patch deleted file mode 100644 index c42c12e1a8a..00000000000 --- a/src/scapy.patch/0002-Check-if-the-network-interface-still-exists.patch +++ /dev/null @@ -1,42 +0,0 @@ -From 7ffd8101c1e535f9c3225db2c319958a64412686 Mon Sep 17 00:00:00 2001 -From: Guillaume Valadon -Date: Tue, 14 Sep 2021 19:34:43 +0200 -Subject: [PATCH] Check if the network interface still exists - -Signed-off-by: Stepan Blyschak ---- - scapy/arch/linux.py | 18 +++++++++++------- - 1 file changed, 11 insertions(+), 7 deletions(-) - -diff --git a/scapy/arch/linux.py b/scapy/arch/linux.py -index 94fac8f0..b86e98ab 100644 ---- a/scapy/arch/linux.py -+++ b/scapy/arch/linux.py -@@ -414,13 +414,17 @@ class LinuxInterfaceProvider(InterfaceProvider): - data = {} - ips = in6_getifaddr() - for i in _get_if_list(): -- ifflags = struct.unpack("16xH14x", get_if(i, SIOCGIFFLAGS))[0] -- index = get_if_index(i) -- mac = scapy.utils.str2mac( -- get_if_raw_hwaddr(i, siocgifhwaddr=SIOCGIFHWADDR)[1] -- ) -- ip = None # type: Optional[str] -- ip = inet_ntop(socket.AF_INET, get_if_raw_addr(i)) -+ try: -+ ifflags = struct.unpack("16xH14x", get_if(i, SIOCGIFFLAGS))[0] -+ index = get_if_index(i) -+ mac = scapy.utils.str2mac( -+ get_if_raw_hwaddr(i, siocgifhwaddr=SIOCGIFHWADDR)[1] -+ ) -+ ip = None # type: Optional[str] -+ ip = inet_ntop(socket.AF_INET, get_if_raw_addr(i)) -+ except IOError: -+ warning("Interface %s does not exist!", i) -+ continue - if ip == "0.0.0.0": - ip = None - ifflags = FlagValue(ifflags, _iff_flags) --- -2.14.1 - diff --git a/src/scapy.patch/0003-Do-not-resolve-the-interface-name-globally.patch b/src/scapy.patch/0003-Do-not-resolve-the-interface-name-globally.patch deleted file mode 100644 index daaa182b641..00000000000 --- a/src/scapy.patch/0003-Do-not-resolve-the-interface-name-globally.patch +++ /dev/null @@ -1,112 +0,0 @@ -From 430f8942fe086553fcd6ad1444e886a343bfd658 Mon Sep 17 00:00:00 2001 -From: Guillaume Valadon -Date: Mon, 10 May 2021 12:02:32 +0200 -Subject: [PATCH] Do not resolve the interface name globally - ---- - doc/scapy/usage.rst | 2 ++ - scapy/sendrecv.py | 16 ++++++++-------- - test/regression.uts | 31 +++++++++++++++++++++++++++++-- - 3 files changed, 39 insertions(+), 10 deletions(-) - -diff --git a/doc/scapy/usage.rst b/doc/scapy/usage.rst -index 45266430fe..c6cb273f62 100644 ---- a/doc/scapy/usage.rst -+++ b/doc/scapy/usage.rst -@@ -711,6 +711,8 @@ We can sniff and do passive OS fingerprinting:: - - The number before the OS guess is the accuracy of the guess. - -+.. note:: When sniffing on several interfaces (e.g. ``iface=["eth0", ...]``), you can check what interface a packet was sniffed on by using the ``sniffed_on`` attribute, as shown in one of the examples above. -+ - Asynchronous Sniffing - --------------------- - -diff --git a/scapy/sendrecv.py b/scapy/sendrecv.py -index 503c6a3b15..f97fc4153e 100644 ---- a/scapy/sendrecv.py -+++ b/scapy/sendrecv.py -@@ -1108,24 +1108,24 @@ def _run(self, - quiet=quiet) - )] = offline - if not sniff_sockets or iface is not None: -- iface = resolve_iface(iface or conf.iface) -- if L2socket is None: -- L2socket = iface.l2listen() -+ # The _RL2 function resolves the L2socket of an iface -+ _RL2 = lambda i: L2socket or resolve_iface(i).l2listen() # type: Callable[[_GlobInterfaceType], Callable[..., SuperSocket]] # noqa: E501 - if isinstance(iface, list): - sniff_sockets.update( -- (L2socket(type=ETH_P_ALL, iface=ifname, **karg), -+ (_RL2(ifname)(type=ETH_P_ALL, iface=ifname, **karg), - ifname) - for ifname in iface - ) - elif isinstance(iface, dict): - sniff_sockets.update( -- (L2socket(type=ETH_P_ALL, iface=ifname, **karg), -+ (_RL2(ifname)(type=ETH_P_ALL, iface=ifname, **karg), - iflabel) - for ifname, iflabel in six.iteritems(iface) - ) - else: -- sniff_sockets[L2socket(type=ETH_P_ALL, iface=iface, -- **karg)] = iface -+ iface = iface or conf.iface -+ sniff_sockets[_RL2(iface)(type=ETH_P_ALL, iface=iface, -+ **karg)] = iface - - # Get select information from the sockets - _main_socket = next(iter(sniff_sockets)) -@@ -1248,7 +1248,7 @@ def stop(self, join=True): - return self.results - return None - else: -- raise Scapy_Exception("Not started !") -+ raise Scapy_Exception("Not running ! (check .running attr)") - - def join(self, *args, **kwargs): - # type: (*Any, **Any) -> None -diff --git a/test/regression.uts b/test/regression.uts -index 38644b7d75..972af2f8cd 100644 ---- a/test/regression.uts -+++ b/test/regression.uts -@@ -1379,9 +1379,36 @@ def _test(): - assert (ans.time - req.sent_time) >= 0 - assert (ans.time - req.sent_time) <= 1e-3 - --retry_test(_test) -+try: -+ retry_test(_test) -+finally: -+ conf.L3socket = sock -+ -+= Test sniffing on multiple sockets -+~ netaccess needs_root sniff -+ -+# This test sniffs on the same interface twice at the same time, to -+# simulate sniffing on multiple interfaces. -+ -+iface = conf.route.route("www.google.com")[0] -+port = int(RandShort()) -+pkt = IP(dst="www.google.com")/TCP(sport=port, dport=80, flags="S") -+ -+def cb(): -+ sr1(pkt, timeout=3) -+ -+sniffer = AsyncSniffer(started_callback=cb, -+ iface=[iface, iface], -+ lfilter=lambda x: TCP in x and x[TCP].dport == port, -+ prn=lambda x: x.summary(), -+ count=2) -+sniffer.start() -+sniffer.join(timeout=3) -+ -+assert len(sniffer.results) == 2 - --conf.L3socket = sock -+for pkt in sniffer.results: -+ assert pkt.sniffed_on == iface - - = Sending a TCP syn 'forever' at layer 2 and layer 3 - ~ netaccess IP diff --git a/src/scapy.patch/0004-Fix-fd-leak-in-worker-thread.patch b/src/scapy.patch/0004-Fix-fd-leak-in-worker-thread.patch index 41ef49a9b57..266b336d8cc 100644 --- a/src/scapy.patch/0004-Fix-fd-leak-in-worker-thread.patch +++ b/src/scapy.patch/0004-Fix-fd-leak-in-worker-thread.patch @@ -1,8 +1,18 @@ +From 12b830b290f182f199a1797cc2dfe6bdfaad5482 Mon Sep 17 00:00:00 2001 +From: Hemanth Kumar Tirupati +Date: Fri, 17 Apr 2026 01:45:22 +0300 +Subject: [PATCH] Fix fd leak in worker thread + +Signed-off-by: Hemanth Kumar Tirupati +--- + scapy/sendrecv.py | 28 +++++++++++++++++----------- + 1 file changed, 17 insertions(+), 11 deletions(-) + diff --git a/scapy/sendrecv.py b/scapy/sendrecv.py -index f97fc415..dbcc372f 100644 +index 4f06c19d..503c15c5 100644 --- a/scapy/sendrecv.py +++ b/scapy/sendrecv.py -@@ -1111,17 +1111,19 @@ class AsyncSniffer(object): +@@ -1257,17 +1257,19 @@ class AsyncSniffer(object): # The _RL2 function resolves the L2socket of an iface _RL2 = lambda i: L2socket or resolve_iface(i).l2listen() # type: Callable[[_GlobInterfaceType], Callable[..., SuperSocket]] # noqa: E501 if isinstance(iface, list): @@ -22,9 +32,9 @@ index f97fc415..dbcc372f 100644 - sniff_sockets.update( - (_RL2(ifname)(type=ETH_P_ALL, iface=ifname, **karg), - iflabel) -- for ifname, iflabel in six.iteritems(iface) +- for ifname, iflabel in iface.items() - ) -+ for ifname, iflabel in six.iteritems(iface): ++ for ifname, iflabel in iface.items(): + try: + sniff_sockets.update({_RL2(ifname)(type=ETH_P_ALL, iface=ifname, **karg): iflabel}) + except OSError: @@ -32,7 +42,7 @@ index f97fc415..dbcc372f 100644 else: iface = iface or conf.iface sniff_sockets[_RL2(iface)(type=ETH_P_ALL, iface=iface, -@@ -1221,7 +1223,11 @@ class AsyncSniffer(object): +@@ -1380,7 +1382,11 @@ class AsyncSniffer(object): self.running = False if opened_socket is None: for s in sniff_sockets: @@ -44,4 +54,7 @@ index f97fc415..dbcc372f 100644 + pass elif close_pipe: close_pipe.close() - self.results = session.toPacketList() + self.results = PacketList(lst, "Sniffed") +-- +2.49.0 + diff --git a/src/scapy.patch/series b/src/scapy.patch/series index cf8d4975275..932653086b6 100644 --- a/src/scapy.patch/series +++ b/src/scapy.patch/series @@ -1,4 +1,2 @@ 0001-Fix-version-string-generation-when-scapy-is-a-submod.patch -0002-Check-if-the-network-interface-still-exists.patch -0003-Do-not-resolve-the-interface-name-globally.patch 0004-Fix-fd-leak-in-worker-thread.patch diff --git a/src/sedutil/Makefile b/src/sedutil/Makefile new file mode 100644 index 00000000000..6d2081d5819 --- /dev/null +++ b/src/sedutil/Makefile @@ -0,0 +1,30 @@ +# Makefile for sedutil package + +.ONESHELL: +SHELL = /bin/bash +.SHELLFLAGS += -ex + +MAIN_TARGET = sedutil_$(SEDUTIL_VERSION)_$(CONFIGURED_ARCH).deb + +$(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : + wget $(SEDUTIL_GITHUB_URL)/releases/download/$(SEDUTIL_VERSION)/sedutil-cli-$(SEDUTIL_VERSION).zip + unzip sedutil-cli-$(SEDUTIL_VERSION).zip + + # Create debian package structure + mkdir -p debian-pkg/DEBIAN debian-pkg/usr/local/bin + cp sedutil-cli debian-pkg/usr/local/bin/ + chmod 755 debian-pkg/usr/local/bin/sedutil-cli + + # Create control file + echo "Package: sedutil" > debian-pkg/DEBIAN/control + echo "Version: $(SEDUTIL_VERSION)" >> debian-pkg/DEBIAN/control + echo "Architecture: $(CONFIGURED_ARCH)" >> debian-pkg/DEBIAN/control + echo "Maintainer: SONiC Team" >> debian-pkg/DEBIAN/control + echo "Description: SED management utility" >> debian-pkg/DEBIAN/control + + # Build the Debian package + dpkg-deb --build debian-pkg $* + mv $* $(DEST)/ + + # Cleanup + rm -rf debian-pkg sedutil-cli* diff --git a/src/sflow/hsflowd/patch/0006-mod_sonic-defer-redis-commands.patch b/src/sflow/hsflowd/patch/0006-mod_sonic-defer-redis-commands.patch new file mode 100644 index 00000000000..027fbc2b500 --- /dev/null +++ b/src/sflow/hsflowd/patch/0006-mod_sonic-defer-redis-commands.patch @@ -0,0 +1,105 @@ +--- a/src/Linux/mod_sonic.c ++++ b/src/Linux/mod_sonic.c +@@ -146,6 +146,10 @@ + char *sflow_agent; + UTHash *collectors; + UTArray *newCollectors; ++ bool reqLagRefresh:1; ++ bool reqSflowRefresh:1; ++ bool reqCollectorRefresh:1; ++ bool collectorsNeedSync:1; + EVEvent *configStartEvent; + EVEvent *configEvent; + EVEvent *configEndEvent; +@@ -1011,7 +1015,10 @@ + } + } + // there may be more to map +- mapPorts(mod); ++ // Note: do not call mapPorts() here - we are inside a Redis ++ // callback and redisAsyncCommand() cannot be called from within ++ // callbacks (libhiredis 1.2.0 asserts REDIS_IN_CALLBACK). ++ // The evt_tick state machine will call mapPorts() on next tick. + } + + static void db_getIfIndexMap(EVMod *mod, HSPSonicPort *prt) { +@@ -1201,7 +1208,8 @@ + } + } + // we may still have a batch of new ports to discover +- discoverNewPorts(mod); ++ // Note: do not call discoverNewPorts() here - deferred to evt_tick ++ // to avoid redisAsyncCommand() from within Redis callback. + } + + static void db_getPortState(EVMod *mod, HSPSonicPort *prt) { +@@ -1509,10 +1517,12 @@ + } + } + COLLECTOR_INFO_DONE: +- if(discoverNewCollectors(mod) == NO) { +- // got them all, now sync +- myDebug(1, "sonic : no more newCollectors - syncConfig"); +- syncConfig(mod); ++ // Note: do not call discoverNewCollectors() here - deferred to evt_tick ++ // to avoid redisAsyncCommand() from within Redis callback. ++ // Mark that syncConfig is needed when all collectors are discovered. ++ { ++ HSP_mod_SONIC *mdata = (HSP_mod_SONIC *)mod->data; ++ mdata->collectorsNeedSync = YES; + } + } + +@@ -1675,18 +1685,24 @@ + #endif + + static void dbEvt_lagOp(EVMod *mod, char *memberStr, char *op) { ++ HSP_mod_SONIC *mdata = (HSP_mod_SONIC *)mod->data; + myDebug(1, "sonic dbEvt_lagOp: %s (%s)", memberStr, op); +- db_getLagInfo(mod); ++ // Defer to evt_tick - cannot call redisAsyncCommand from within callback ++ mdata->reqLagRefresh = YES; + } + + static void dbEvt_sflowOp(EVMod *mod, char *key, char *op) { ++ HSP_mod_SONIC *mdata = (HSP_mod_SONIC *)mod->data; + myDebug(1, "sonic dbEvt_sflowOp: %s (%s)", key, op); +- db_getsFlowGlobal(mod); ++ // Defer to evt_tick - cannot call redisAsyncCommand from within callback ++ mdata->reqSflowRefresh = YES; + } + + static void dbEvt_sflowCollectorOp(EVMod *mod, char *key, char *op) { ++ HSP_mod_SONIC *mdata = (HSP_mod_SONIC *)mod->data; + myDebug(1, "sonic dbEvt_sflowCollectorOp: %s (%s)", key, op); +- db_getCollectorNames(mod); ++ // Defer to evt_tick - cannot call redisAsyncCommand from within callback ++ mdata->reqCollectorRefresh = YES; + } + + static void dbEvt_subscribeCB(redisAsyncContext *ctx, void *magic, void *req_magic) +@@ -1924,7 +1940,23 @@ + if(!discoverNewPorts(mod)) + mapPorts(mod); + syncSwitchPorts(mod); +- discoverNewCollectors(mod); ++ if(!discoverNewCollectors(mod) && mdata->collectorsNeedSync) { ++ mdata->collectorsNeedSync = NO; ++ syncConfig(mod); ++ } ++ // process deferred dbEvt refresh requests ++ if(mdata->reqLagRefresh) { ++ mdata->reqLagRefresh = NO; ++ db_getLagInfo(mod); ++ } ++ if(mdata->reqSflowRefresh) { ++ mdata->reqSflowRefresh = NO; ++ db_getsFlowGlobal(mod); ++ } ++ if(mdata->reqCollectorRefresh) { ++ mdata->reqCollectorRefresh = NO; ++ db_getCollectorNames(mod); ++ } + break; + } + diff --git a/src/sflow/hsflowd/patch/0007-hsflowd-stop-overriding-sigabrt.patch b/src/sflow/hsflowd/patch/0007-hsflowd-stop-overriding-sigabrt.patch new file mode 100644 index 00000000000..ee380fd4dc1 --- /dev/null +++ b/src/sflow/hsflowd/patch/0007-hsflowd-stop-overriding-sigabrt.patch @@ -0,0 +1,16 @@ +--- a/src/Linux/hsflowd.c ++++ b/src/Linux/hsflowd.c +@@ -1844,14 +1844,9 @@ + sa.sa_sigaction = signal_handler; + sigemptyset(&sa.sa_mask); + sigaction(SIGTERM, &sa, NULL); + sigaction(SIGINT, &sa, NULL); +- sigaction(SIGSEGV, &sa, NULL); +- sigaction(SIGILL, &sa, NULL); +- sigaction(SIGBUS, &sa, NULL); +- sigaction(SIGXFSZ, &sa, NULL); +- sigaction(SIGABRT, &sa, NULL); + sigaction(SIGUSR1, &sa, NULL); + sigaction(SIGUSR2, &sa, NULL); + sigaction(SIGHUP, &sa, NULL); + // TODO: SIGPIPE? SIGCHLD? diff --git a/src/sflow/hsflowd/patch/0008-mod_sonic-batch-port-discovery.patch b/src/sflow/hsflowd/patch/0008-mod_sonic-batch-port-discovery.patch new file mode 100644 index 00000000000..75970f0c740 --- /dev/null +++ b/src/sflow/hsflowd/patch/0008-mod_sonic-batch-port-discovery.patch @@ -0,0 +1,51 @@ +--- a/src/Linux/mod_sonic.c ++++ b/src/Linux/mod_sonic.c +@@ -1035,13 +1035,19 @@ + + static bool mapPorts(EVMod *mod) { + HSP_mod_SONIC *mdata = (HSP_mod_SONIC *)mod->data; +- // kick off just one - starts a chain reaction if there are more. +- // Gets the ifIndex and Linux (OS) ifIndex +- HSPSonicPort *prt = UTArrayPop(mdata->unmappedPorts); +- if(prt) { ++ // Dispatch all unmapped ports at once using Redis async pipelining. ++ // The callbacks no longer chain (hiredis 1.2.0 forbids redisAsyncCommand ++ // from within callbacks), so we fire all queries here and let the ++ // replies arrive asynchronously. ++ bool dispatched = NO; ++ HSPSonicPort *prt; ++ while((prt = UTArrayPop(mdata->unmappedPorts)) != NULL) { + prt->unmappedPort = NO; + db_getIfIndexMap(mod, prt); +- return YES; // still mapping points ++ dispatched = YES; ++ } ++ if(dispatched) { ++ return YES; // still waiting for replies + } + + // something changed - for example we may have just learned the alias for the +@@ -1223,15 +1229,17 @@ + + static bool discoverNewPorts(EVMod *mod) { + HSP_mod_SONIC *mdata = (HSP_mod_SONIC *)mod->data; +- // kick off just one - starts a chain reaction if there are more. +- // Gets the state (index, speed etc.) so we can add it as an adaptor. +- HSPSonicPort *prt = UTArrayPop(mdata->newPorts); +- if(prt) { ++ // Dispatch all new ports at once using Redis async pipelining. ++ // The callbacks no longer chain (hiredis 1.2.0 forbids redisAsyncCommand ++ // from within callbacks), so we fire all queries here. ++ bool dispatched = NO; ++ HSPSonicPort *prt; ++ while((prt = UTArrayPop(mdata->newPorts)) != NULL) { + prt->newPort = NO; + db_getPortState(mod, prt); +- return YES; // still discovering new ports ++ dispatched = YES; + } +- return NO; // done discoveriny new ports ++ return dispatched; // YES if we dispatched queries, NO if nothing to do + } + + diff --git a/src/sflow/hsflowd/patch/0009-mod_sonic-debug-sndbuf.patch b/src/sflow/hsflowd/patch/0009-mod_sonic-debug-sndbuf.patch new file mode 100644 index 00000000000..0fbb59ba61d --- /dev/null +++ b/src/sflow/hsflowd/patch/0009-mod_sonic-debug-sndbuf.patch @@ -0,0 +1,43 @@ +Description: Debug knob to shrink redis client SO_SNDBUF + Adds an environment-variable override (HSP_SONIC_SNDBUF, bytes) that is + applied to each redis client socket immediately after connect. Used to + reproduce the db_addWriteCB recursion / stack overflow reported on + high-port-count switches (see sonic-net/sonic-buildimage issue from + PR #27368) on a small-port-count test platform (e.g. 32-port VS). + No behavioral change when the env var is unset. +Author: Ying Xie +Forwarded: not-needed +--- a/src/Linux/mod_sonic.c ++++ b/src/Linux/mod_sonic.c +@@ -9,6 +9,9 @@ + #include + #include + #include "hsflowd.h" ++#include ++#include ++#include + #include "regex.h" + #include "cJSON.h" + +@@ -728,6 +731,21 @@ + ctx->ev.cleanup = db_cleanupCB; + ctx->ev.data = db; + db->ctx = ctx; ++ // Debug knob: allow shrinking SO_SNDBUF on the redis fd via ++ // HSP_SONIC_SNDBUF (bytes). Used to reproduce write-buffer ++ // backpressure on small-port-count test platforms. ++ { ++ const char *sb = getenv("HSP_SONIC_SNDBUF"); ++ if(sb && *sb) { ++ int want = atoi(sb); ++ if(want > 0) { ++ if(setsockopt(fd, SOL_SOCKET, SO_SNDBUF, &want, sizeof(want)) < 0) ++ myLog(LOG_ERR, "sonic db_connectClient: setsockopt(SO_SNDBUF=%d) failed: %s", want, strerror(errno)); ++ else ++ myDebug(1, "sonic db_connectClient: SO_SNDBUF set to %d (requested)", want); ++ } ++ } ++ } + return YES; + } + char *errm = ctx ? ctx->errstr : "ctx=NULL"; diff --git a/src/sflow/hsflowd/patch/0010-mod_sonic-fix-write-recursion-via-evbus.patch b/src/sflow/hsflowd/patch/0010-mod_sonic-fix-write-recursion-via-evbus.patch new file mode 100644 index 00000000000..c2858401b09 --- /dev/null +++ b/src/sflow/hsflowd/patch/0010-mod_sonic-fix-write-recursion-via-evbus.patch @@ -0,0 +1,184 @@ +Description: Make redis async writes event-loop driven to fix recursion stack-overflow + mod_sonic talks to the SONiC redis instances through hiredis-async. The + async adapter (db_addWriteCB) used to call redisAsyncHandleWrite() + synchronously the moment hiredis asked for the writable hook. That was + fine while the write direction "only consisted of short queries", but + PR #27368 began dispatching port discovery in a single batch, which on + high port-count switches (>~200 ports) can fill the redis socket send + buffer mid-burst. write() then returns EWOULDBLOCK and hiredis re-arms + the writable hook by calling db_addWriteCB() again - directly from + within redisAsyncHandleWrite(). With no re-entry protection that + recursed until the stack was exhausted (SIGSEGV). + . + The right fix is the one mod_sonic's original comment hinted at: + register the redis fd's writable readiness with evbus, so writes + are driven by the event loop instead of called synchronously from + the addWrite hook. This patch does that: + . + * evbus gains an optional EVWriteCB and a per-socket want_write + flag. busRead() builds a writefds set from sockets that have + want_write set and dispatches their writeCB when pselect() + reports them writable. + * mod_sonic registers db_writeCB at socket-add time and toggles + want_write from the hiredis addWrite/delWrite hooks. The hooks + themselves no longer call redisAsyncHandleWrite() at all - they + just flip the readiness flag, so synchronous recursion from + within the write path is structurally impossible. + . + Progress guarantee: when the kernel signals the socket is writable + (send buffer has space), evbus dispatches db_writeCB exactly once + and we call redisAsyncHandleWrite(). If hiredis still has queued + output afterwards, its delWrite hook is not invoked, so want_write + stays set and the next pselect() iteration delivers another writable + event. Bounded queue progress, no polling, no recursion. +Author: Ying Xie +Forwarded: not-needed +diff --git a/src/Linux/evbus.c b/src/Linux/evbus.c +index 59c154f..9f7c88f 100644 +--- a/src/Linux/evbus.c ++++ b/src/Linux/evbus.c +@@ -144,6 +144,16 @@ extern "C" { + return sock; + } + ++ void EVSocketSetWriteCB(EVSocket *sock, EVWriteCB writeCB) { ++ if(sock) ++ sock->writeCB = writeCB; ++ } ++ ++ void EVSocketSetWantWrite(EVSocket *sock, bool on) { ++ if(sock) ++ sock->want_write = on; ++ } ++ + bool EVSocketClose(EVMod *mod, EVSocket *sock, bool closeFD) { + EVSocket *deleted; + SEMLOCK_DO(mod->root->sync) { +@@ -382,7 +392,9 @@ extern "C" { + static void busRead(EVBus *bus) { + EVSocket *sock; + fd_set readfds; ++ fd_set writefds; + FD_ZERO(&readfds); ++ FD_ZERO(&writefds); + sigset_t emptyset; + sigemptyset(&emptyset); + int max_fd = 0; +@@ -401,6 +413,9 @@ extern "C" { + } + UTARRAY_WALK(bus->sockets_run, sock) { + FD_SET(sock->fd, &readfds); ++ if(sock->want_write && sock->writeCB) { ++ FD_SET(sock->fd, &writefds); ++ } + if(sock->fd > max_fd) + max_fd = sock->fd; + } +@@ -409,7 +424,7 @@ extern "C" { + timeout.tv_nsec = bus->select_mS * 1000000; + int nfds = pselect(max_fd + 1, + &readfds, +- (fd_set *)NULL, ++ &writefds, + (fd_set *)NULL, + &timeout, + &emptyset); +@@ -425,6 +440,9 @@ extern "C" { + UTARRAY_WALK(bus->sockets_run, sock) { + if(FD_ISSET(sock->fd, &readfds)) + (*sock->readCB)(sock->module, sock, sock->magic); ++ if(sock->writeCB ++ && FD_ISSET(sock->fd, &writefds)) ++ (*sock->writeCB)(sock->module, sock, sock->magic); + } + } + else if(nfds < 0) { +diff --git a/src/Linux/evbus.h b/src/Linux/evbus.h +index f08e4c2..f9dc9a5 100644 +--- a/src/Linux/evbus.h ++++ b/src/Linux/evbus.h +@@ -85,6 +85,7 @@ extern "C" { + } EVBus; + + typedef void (*EVReadCB)(EVMod *mod, struct _EVSocket *sock, void *magic); ++ typedef void (*EVWriteCB)(EVMod *mod, struct _EVSocket *sock, void *magic); + + typedef struct _EVSocket { + EVBus *bus; +@@ -97,6 +98,8 @@ extern "C" { + UTStrBuf *iobuf; + UTStrBuf *ioline; + bool errOut; ++ EVWriteCB writeCB; ++ bool want_write; + } EVSocket; + + struct _EVAction; // fwd decl +@@ -144,6 +147,8 @@ extern "C" { + int EVEventTx(EVMod *mod, EVEvent *evt, void *data, size_t dataLen); + int EVEventTxAll(EVMod *mod, char *evt_name, void *data, size_t dataLen); + EVSocket *EVBusAddSocket(EVMod *mod, EVBus *bus, int fd, EVReadCB readCB, void *magic); ++ void EVSocketSetWriteCB(EVSocket *sock, EVWriteCB writeCB); ++ void EVSocketSetWantWrite(EVSocket *sock, bool on); + bool EVSocketClose(EVMod *mod, EVSocket *sock, bool closeFD); + void EVClockMono(struct timespec *ts); + +diff --git a/src/Linux/mod_sonic.c b/src/Linux/mod_sonic.c +index 0e654e1..ab06b98 100644 +--- a/src/Linux/mod_sonic.c ++++ b/src/Linux/mod_sonic.c +@@ -628,17 +628,32 @@ extern "C" { + redisAsyncHandleRead(db->ctx); + } + +- static void db_addWriteCB(void *magic) { ++ static void db_writeCB(EVMod *mod, EVSocket *sock, void *magic) ++ { + HSPSonicDBClient *db = (HSPSonicDBClient *)magic; +- // We could modify evbus to regulate writes, but +- // since the write direction consists only of short +- // queries we just assume it's OK to go ahead. +- // (If there were any danger of blocking for more than +- // a second or so then we could set the file descriptor +- // to non-blocking mode with fcntl and looks for an +- // EWOULDBLOCK error.) + db->writes++; +- redisAsyncHandleWrite(db->ctx); ++ // Event-loop driven: the kernel just told us the socket has space ++ // in its send buffer. Hand control to hiredis to flush queued ++ // output. If hiredis still has more queued after this, it will ++ // leave the addWrite hook armed (want_write stays YES) and the ++ // next pselect() will deliver another writable event. ++ if(db->ctx) ++ redisAsyncHandleWrite(db->ctx); ++ } ++ ++ static void db_addWriteCB(void *magic) { ++ HSPSonicDBClient *db = (HSPSonicDBClient *)magic; ++ // Just arm the writable-readiness flag in evbus. Do NOT call ++ // redisAsyncHandleWrite() here: hiredis invokes addWrite from ++ // inside its own write path when write() returns EWOULDBLOCK, ++ // which used to recurse and overflow the stack on switches with ++ // many ports (PR #27368 batched dispatch). ++ EVSocketSetWantWrite(db->sock, YES); ++ } ++ ++ static void db_delWriteCB(void *magic) { ++ HSPSonicDBClient *db = (HSPSonicDBClient *)magic; ++ EVSocketSetWantWrite(db->sock, NO); + } + + static void db_cleanupCB(void *magic) { +@@ -720,10 +735,11 @@ extern "C" { + redisAsyncSetConnectCallback(ctx, db_connectCB); + redisAsyncSetDisconnectCallback(ctx, db_disconnectCB); + db->sock = EVBusAddSocket(mod, mdata->pollBus, fd, db_readCB, db /* magic */); ++ EVSocketSetWriteCB(db->sock, db_writeCB); + // db->ev.addRead = db_addReadCB; // EVBus always ready to read + // db->ev.delRead = db_delReadCB; // no-op + ctx->ev.addWrite = db_addWriteCB; +- // db->ev.delWrite = db_delWriteCB; // no-op ++ ctx->ev.delWrite = db_delWriteCB; + ctx->ev.cleanup = db_cleanupCB; + ctx->ev.data = db; + db->ctx = ctx; diff --git a/src/sflow/hsflowd/patch/series b/src/sflow/hsflowd/patch/series index b2e30272e04..76b56bde14b 100644 --- a/src/sflow/hsflowd/patch/series +++ b/src/sflow/hsflowd/patch/series @@ -2,4 +2,9 @@ 0002-host_sflow_debian.patch 0003-sflow-enabled-drop-monitor-support-for-SONiC.patch 0004-When-interface-removed-just-as-we-discover-it-log-wi.patch -0005-Use-close-range-syscall-over-blindly-looping-over-al.patch \ No newline at end of file +0005-Use-close-range-syscall-over-blindly-looping-over-al.patch +0006-mod_sonic-defer-redis-commands.patch +0007-hsflowd-stop-overriding-sigabrt.patch +0008-mod_sonic-batch-port-discovery.patch +# 0009-mod_sonic-debug-sndbuf.patch # forensic harness for PR #27739 / issue #27728; apply manually with HSP_SONIC_SNDBUF= to reduce send-buffer for repro investigations. Not applied by default. +0010-mod_sonic-fix-write-recursion-via-evbus.patch diff --git a/src/snmpd/Makefile b/src/snmpd/Makefile index 4945e654599..43339e8a5d4 100644 --- a/src/snmpd/Makefile +++ b/src/snmpd/Makefile @@ -12,33 +12,20 @@ DERIVED_TARGETS = snmptrapd_$(SNMPD_VERSION_FULL)_$(CONFIGURED_ARCH).deb \ snmpd-dbgsym_$(SNMPD_VERSION_FULL)_$(CONFIGURED_ARCH).deb \ libsnmp40_$(SNMPD_VERSION_FULL)_$(CONFIGURED_ARCH).deb \ libsnmp40-dbgsym_$(SNMPD_VERSION_FULL)_$(CONFIGURED_ARCH).deb \ + libnetsnmptrapd40_$(SNMPD_VERSION_FULL)_$(CONFIGURED_ARCH).deb \ libsnmp-dev_$(SNMPD_VERSION_FULL)_$(CONFIGURED_ARCH).deb \ libsnmp-perl_$(SNMPD_VERSION_FULL)_$(CONFIGURED_ARCH).deb \ libsnmp-perl-dbgsym_$(SNMPD_VERSION_FULL)_$(CONFIGURED_ARCH).deb \ tkmib_$(SNMPD_VERSION_FULL)_all.deb SNMPD_MAKE_JOBS_NUM = $(SONIC_CONFIG_MAKE_JOBS) -else -DERIVED_TARGETS = snmptrapd_$(SNMPD_VERSION_FULL)_$(CONFIGURED_ARCH).deb \ - snmptrapd-dbgsym_$(SNMPD_VERSION_FULL)_$(CONFIGURED_ARCH).deb \ - snmp_$(SNMPD_VERSION_FULL)_$(CONFIGURED_ARCH).deb \ - snmpd_$(SNMPD_VERSION_FULL)_$(CONFIGURED_ARCH).deb \ - snmp-dbgsym_$(SNMPD_VERSION_FULL)_$(CONFIGURED_ARCH).deb \ - snmpd-dbgsym_$(SNMPD_VERSION_FULL)_$(CONFIGURED_ARCH).deb \ - libsnmp30_$(SNMPD_VERSION_FULL)_$(CONFIGURED_ARCH).deb \ - libsnmp30-dbg_$(SNMPD_VERSION_FULL)_$(CONFIGURED_ARCH).deb \ - libsnmp-dev_$(SNMPD_VERSION_FULL)_$(CONFIGURED_ARCH).deb \ - libsnmp-perl_$(SNMPD_VERSION_FULL)_$(CONFIGURED_ARCH).deb \ - libsnmp-perl-dbgsym_$(SNMPD_VERSION_FULL)_$(CONFIGURED_ARCH).deb \ - tkmib_$(SNMPD_VERSION_FULL)_all.deb -SNMPD_MAKE_JOBS_NUM = 1 endif $(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : rm -rf net-snmp-$(SNMPD_VERSION) # download debian net-snmp - dget -u https://packages.trafficmanager.net/public/debian/pool/main/n/net-snmp/net-snmp_$(SNMPD_VERSION_FULL).dsc + dget -u $(BUILD_PUBLIC_URL)/debian/pool/main/n/net-snmp/net-snmp_$(SNMPD_VERSION_FULL).dsc pushd net-snmp-$(SNMPD_VERSION) git init diff --git a/src/snmpd/patch-5.7.3+dfsg/0001-SNMP-Stop-spamming-logs-with-statfs-permission-denie.patch b/src/snmpd/patch-5.7.3+dfsg/0001-SNMP-Stop-spamming-logs-with-statfs-permission-denie.patch deleted file mode 100644 index f832d004407..00000000000 --- a/src/snmpd/patch-5.7.3+dfsg/0001-SNMP-Stop-spamming-logs-with-statfs-permission-denie.patch +++ /dev/null @@ -1,40 +0,0 @@ -From a1edbce39e46b5c8bd5bd7db17fc11fa30e7dd73 Mon Sep 17 00:00:00 2001 -From: pavel-shirshov -Date: Mon, 27 Aug 2018 16:50:16 +0800 -Subject: [PATCH] [SNMP] Stop spamming logs with statfs permission denied log - message #1668 - ---- - agent/mibgroup/hardware/fsys/fsys_mntctl.c | 2 -- - agent/mibgroup/hardware/fsys/fsys_mntent.c | 2 -- - 2 files changed, 4 deletions(-) - -diff --git a/agent/mibgroup/hardware/fsys/fsys_mntctl.c b/agent/mibgroup/hardware/fsys/fsys_mntctl.c -index 9fbb068..adc38d6 100644 ---- a/agent/mibgroup/hardware/fsys/fsys_mntctl.c -+++ b/agent/mibgroup/hardware/fsys/fsys_mntctl.c -@@ -163,8 +163,6 @@ netsnmp_fsys_arch_load( void ) - continue; - - if ( statfs( entry->path, &stat_buf ) < 0 ) { -- snprintf( tmpbuf, sizeof(tmpbuf), "Cannot statfs %s", entry->path ); -- snmp_log_perror( tmpbuf ); - continue; - } - entry->units = stat_buf.f_bsize; -diff --git a/agent/mibgroup/hardware/fsys/fsys_mntent.c b/agent/mibgroup/hardware/fsys/fsys_mntent.c -index 94d23db..5ad5e43 100644 ---- a/agent/mibgroup/hardware/fsys/fsys_mntent.c -+++ b/agent/mibgroup/hardware/fsys/fsys_mntent.c -@@ -238,8 +238,6 @@ netsnmp_fsys_arch_load( void ) - if ( NSFS_STATFS( entry->path, &stat_buf ) < 0 ) - #endif - { -- snprintf( tmpbuf, sizeof(tmpbuf), "Cannot statfs %s", entry->path ); -- snmp_log_perror( tmpbuf ); - continue; - } - entry->units = stat_buf.NSFS_SIZE; --- -2.7.4 - diff --git a/src/snmpd/patch-5.7.3+dfsg/0002-at.c-properly-check-return-status-from-realloc.-Than.patch b/src/snmpd/patch-5.7.3+dfsg/0002-at.c-properly-check-return-status-from-realloc.-Than.patch deleted file mode 100644 index ceb0c68352b..00000000000 --- a/src/snmpd/patch-5.7.3+dfsg/0002-at.c-properly-check-return-status-from-realloc.-Than.patch +++ /dev/null @@ -1,31 +0,0 @@ -From e370973f273ffc1b32673bc94c5a46f75a846d82 Mon Sep 17 00:00:00 2001 -From: Niels Baggesen -Date: Wed, 31 Aug 2016 21:43:36 +0200 -Subject: [PATCH] at.c: properly check return status from realloc. Thanks to - Daniel Eiland (bug 2678) - ---- - agent/mibgroup/mibII/at.c | 3 ++- - 1 file changed, 2 insertions(+), 1 deletion(-) - -diff --git a/agent/mibgroup/mibII/at.c b/agent/mibgroup/mibII/at.c -index f57ba2a..a73fb8c 100644 ---- a/agent/mibgroup/mibII/at.c -+++ b/agent/mibgroup/mibII/at.c -@@ -638,11 +638,12 @@ ARP_Scan_Init(void) - struct arptab *newtab = (struct arptab *) - realloc(at, (sizeof(struct arptab) * - (arptab_curr_max_size + ARP_CACHE_INCR))); -- if (newtab == at) { -+ if (newtab == NULL) { - snmp_log(LOG_ERR, - "Error allocating more space for arpcache. " - "Cache will continue to be limited to %d entries", - arptab_curr_max_size); -+ newtab = at; - break; - } else { - arptab_curr_max_size += ARP_CACHE_INCR; --- -2.7.4 - diff --git a/src/snmpd/patch-5.7.3+dfsg/0003-CHANGES-BUG-2743-snmpd-crashes-when-receiving-a-GetN.patch b/src/snmpd/patch-5.7.3+dfsg/0003-CHANGES-BUG-2743-snmpd-crashes-when-receiving-a-GetN.patch deleted file mode 100644 index cdf9b94be93..00000000000 --- a/src/snmpd/patch-5.7.3+dfsg/0003-CHANGES-BUG-2743-snmpd-crashes-when-receiving-a-GetN.patch +++ /dev/null @@ -1,36 +0,0 @@ -From 2170e345858738e65d3156a49d3186e4a9288821 Mon Sep 17 00:00:00 2001 -From: Zhenggen Xu -Date: Fri, 12 Oct 2018 17:13:54 -0700 -Subject: [PATCH] Subject: [PATCH] CHANGES: BUG: 2743: snmpd crashes when - receiving a GetNext PDU with multiple Varbinds - -skip out-of-range varbinds when calling next handler ---- - agent/helpers/table.c | 4 ++++ - 1 file changed, 4 insertions(+) - -diff --git a/agent/helpers/table.c b/agent/helpers/table.c -index 882e84c..b943d6e 100644 ---- a/agent/helpers/table.c -+++ b/agent/helpers/table.c -@@ -406,6 +406,8 @@ table_helper_handler(netsnmp_mib_handler *handler, - if (reqinfo->mode == MODE_GET) - table_helper_cleanup(reqinfo, request, - SNMP_NOSUCHOBJECT); -+ else -+ request->processed = 1; /* skip if next handler called */ - continue; - } - -@@ -483,6 +485,8 @@ table_helper_handler(netsnmp_mib_handler *handler, - #endif /* NETSNMP_NO_WRITE_SUPPORT */ - table_helper_cleanup(reqinfo, request, - SNMP_NOSUCHOBJECT); -+ else -+ request->processed = 1; /* skip if next handler called */ - continue; - } - /* --- -2.18.0 - diff --git a/src/snmpd/patch-5.7.3+dfsg/0006-From-Jiri-Cervenka-snmpd-Fixed-agentx-crashing-and-or-freezing-on-timeout.patch b/src/snmpd/patch-5.7.3+dfsg/0006-From-Jiri-Cervenka-snmpd-Fixed-agentx-crashing-and-or-freezing-on-timeout.patch deleted file mode 100644 index d11a9d6d75e..00000000000 --- a/src/snmpd/patch-5.7.3+dfsg/0006-From-Jiri-Cervenka-snmpd-Fixed-agentx-crashing-and-or-freezing-on-timeout.patch +++ /dev/null @@ -1,211 +0,0 @@ -From a5782d0673044ad0c621daed7975f53238bb038e Mon Sep 17 00:00:00 2001 -From: Renuka Manavalan -Date: Tue, 10 Sep 2019 17:51:45 +0000 -Subject: [PATCH] Patch from SourceForge: net-snmp commit #793d59 Avoids snmpd - crash when sub agent timesout. - ---- - agent/mibgroup/agentx/master_admin.c | 1 + - agent/snmp_agent.c | 81 ++++++++++++++++++---------- - include/net-snmp/agent/snmp_agent.h | 5 ++ - 3 files changed, 60 insertions(+), 27 deletions(-) - -diff --git a/agent/mibgroup/agentx/master_admin.c b/agent/mibgroup/agentx/master_admin.c -index 4dc1aa7..8c1d194 100644 ---- a/agent/mibgroup/agentx/master_admin.c -+++ b/agent/mibgroup/agentx/master_admin.c -@@ -158,6 +158,7 @@ close_agentx_session(netsnmp_session * session, int sessid) - for (sp = session->subsession; sp != NULL; sp = sp->next) { - - if (sp->sessid == sessid) { -+ netsnmp_remove_delegated_requests_for_session(sp); - unregister_mibs_by_session(sp); - unregister_index_by_session(sp); - unregister_sysORTable_by_session(sp); -diff --git a/agent/snmp_agent.c b/agent/snmp_agent.c -index b96d650..7cacd1a 100644 ---- a/agent/snmp_agent.c -+++ b/agent/snmp_agent.c -@@ -1409,6 +1409,7 @@ init_agent_snmp_session(netsnmp_session * session, netsnmp_pdu *pdu) - asp->treecache_num = -1; - asp->treecache_len = 0; - asp->reqinfo = SNMP_MALLOC_TYPEDEF(netsnmp_agent_request_info); -+ asp->flags = SNMP_AGENT_FLAGS_NONE; - DEBUGMSGTL(("verbose:asp", "asp %p reqinfo %p created\n", - asp, asp->reqinfo)); - -@@ -1457,6 +1458,9 @@ netsnmp_check_for_delegated(netsnmp_agent_session *asp) - - if (NULL == asp->treecache) - return 0; -+ -+ if (asp->flags & SNMP_AGENT_FLAGS_CANCEL_IN_PROGRESS) -+ return 0; - - for (i = 0; i <= asp->treecache_num; i++) { - for (request = asp->treecache[i].requests_begin; request; -@@ -1535,39 +1539,48 @@ int - netsnmp_remove_delegated_requests_for_session(netsnmp_session *sess) - { - netsnmp_agent_session *asp; -- int count = 0; -+ int total_count = 0; - - for (asp = agent_delegated_list; asp; asp = asp->next) { - /* - * check each request - */ -+ int i; -+ int count = 0; - netsnmp_request_info *request; -- for(request = asp->requests; request; request = request->next) { -- /* -- * check session -- */ -- netsnmp_assert(NULL!=request->subtree); -- if(request->subtree->session != sess) -- continue; -+ for (i = 0; i <= asp->treecache_num; i++) { -+ for (request = asp->treecache[i].requests_begin; request; -+ request = request->next) { -+ /* -+ * check session -+ */ -+ netsnmp_assert(NULL!=request->subtree); -+ if(request->subtree->session != sess) -+ continue; - -- /* -- * matched! mark request as done -- */ -- netsnmp_request_set_error(request, SNMP_ERR_GENERR); -- ++count; -+ /* -+ * matched! mark request as done -+ */ -+ netsnmp_request_set_error(request, SNMP_ERR_GENERR); -+ ++count; -+ } -+ } -+ if (count) { -+ asp->flags |= SNMP_AGENT_FLAGS_CANCEL_IN_PROGRESS; -+ total_count += count; - } - } - - /* - * if we found any, that request may be finished now - */ -- if(count) { -+ if(total_count) { - DEBUGMSGTL(("snmp_agent", "removed %d delegated request(s) for session " -- "%8p\n", count, sess)); -- netsnmp_check_outstanding_agent_requests(); -+ "%8p\n", total_count, sess)); -+ netsnmp_check_delegated_requests(); - } - -- return count; -+ return total_count; - } - - int -@@ -2739,19 +2752,11 @@ handle_var_requests(netsnmp_agent_session *asp) - return final_status; - } - --/* -- * loop through our sessions known delegated sessions and check to see -- * if they've completed yet. If there are no more delegated sessions, -- * check for and process any queued requests -- */ - void --netsnmp_check_outstanding_agent_requests(void) -+netsnmp_check_delegated_requests(void) - { - netsnmp_agent_session *asp, *prev_asp = NULL, *next_asp = NULL; - -- /* -- * deal with delegated requests -- */ - for (asp = agent_delegated_list; asp; asp = next_asp) { - next_asp = asp->next; /* save in case we clean up asp */ - if (!netsnmp_check_for_delegated(asp)) { -@@ -2790,6 +2795,23 @@ netsnmp_check_outstanding_agent_requests(void) - prev_asp = asp; - } - } -+} -+ -+ -+/* -+ * loop through our sessions known delegated sessions and check to see -+ * if they've completed yet. If there are no more delegated sessions, -+ * check for and process any queued requests -+ */ -+void -+netsnmp_check_outstanding_agent_requests(void) -+{ -+ netsnmp_agent_session *asp; -+ -+ /* -+ * deal with delegated requests -+ */ -+ netsnmp_check_delegated_requests(); - - /* - * if we are processing a set and there are more delegated -@@ -2819,7 +2841,8 @@ netsnmp_check_outstanding_agent_requests(void) - - netsnmp_processing_set = netsnmp_agent_queued_list; - DEBUGMSGTL(("snmp_agent", "SET request remains queued while " -- "delegated requests finish, asp = %8p\n", asp)); -+ "delegated requests finish, asp = %8p\n", -+ agent_delegated_list)); - break; - } - #endif /* NETSNMP_NO_WRITE_SUPPORT */ -@@ -2880,6 +2903,10 @@ check_delayed_request(netsnmp_agent_session *asp) - case SNMP_MSG_GETBULK: - case SNMP_MSG_GETNEXT: - netsnmp_check_all_requests_status(asp, 0); -+ if (asp->flags & SNMP_AGENT_FLAGS_CANCEL_IN_PROGRESS) { -+ DEBUGMSGTL(("snmp_agent","canceling next walk for asp %p\n", asp)); -+ break; -+ } - handle_getnext_loop(asp); - if (netsnmp_check_for_delegated(asp) && - netsnmp_check_transaction_id(asp->pdu->transid) != -diff --git a/include/net-snmp/agent/snmp_agent.h b/include/net-snmp/agent/snmp_agent.h -index aad8837..43f4fff 100644 ---- a/include/net-snmp/agent/snmp_agent.h -+++ b/include/net-snmp/agent/snmp_agent.h -@@ -32,6 +32,9 @@ extern "C" { - #define SNMP_MAX_PDU_SIZE 64000 /* local constraint on PDU size sent by agent - * (see also SNMP_MAX_MSG_SIZE in snmp_api.h) */ - -+#define SNMP_AGENT_FLAGS_NONE 0x0 -+#define SNMP_AGENT_FLAGS_CANCEL_IN_PROGRESS 0x1 -+ - /* - * If non-zero, causes the addresses of peers to be logged when receptions - * occur. -@@ -205,6 +208,7 @@ extern "C" { - int treecache_num; /* number of current cache entries */ - netsnmp_cachemap *cache_store; - int vbcount; -+ int flags; - } netsnmp_agent_session; - - /* -@@ -240,6 +244,7 @@ extern "C" { - int init_master_agent(void); - void shutdown_master_agent(void); - int agent_check_and_process(int block); -+ void netsnmp_check_delegated_requests(void); - void netsnmp_check_outstanding_agent_requests(void); - - int netsnmp_request_set_error(netsnmp_request_info *request, --- -2.17.1 - diff --git a/src/snmpd/patch-5.7.3+dfsg/0007-Linux-VRF-5.7.3-Support.patch b/src/snmpd/patch-5.7.3+dfsg/0007-Linux-VRF-5.7.3-Support.patch deleted file mode 100755 index 48d13d7f62d..00000000000 --- a/src/snmpd/patch-5.7.3+dfsg/0007-Linux-VRF-5.7.3-Support.patch +++ /dev/null @@ -1,799 +0,0 @@ -From 49ce7fc078dfa8c1a1688e05de4e2d151dbcd76a Mon Sep 17 00:00:00 2001 -From: Harish Venkatraman -Date: Wed, 17 Oct 2018 15:22:04 -0700 -Subject: [PATCH] Linux-VRF 5.7.3 Support from https://sourceforge.net/p/net-snmp/patches/1376/ - -Sourceforge commits related to this consolidated patch are given below. -https://sourceforge.net/p/net-snmp/code/ci/0b637fea62c7b6dc467b94206d0bd2dec6f912ca/ -https://sourceforge.net/p/net-snmp/code/ci/19ba7b0a6b56d201a8563fe6505cd82e313c1c9c/ -https://sourceforge.net/p/net-snmp/code/ci/76336fb63bb74b4dede5dda5c14fb8cf2d60be8e/ -https://sourceforge.net/p/net-snmp/code/ci/c7398de4122102b3250e6dac7c09dbc5d09f1840/ -https://sourceforge.net/p/net-snmp/code/ci/0831ed64a39a34dc040eabe39d0229b07fa2a8a5/ -https://sourceforge.net/p/net-snmp/code/ci/62f6babcc7cfc54c79b442b8a7f45662b4ddc807/ -https://sourceforge.net/p/net-snmp/code/ci/313949522c4d0ddfeac72195fa63512955d9eb28/ - - -This consolidated patch adds native support for VRFs to snmpd. NCLU patches in this same -CCR will be added shortly. The VRF is specified for both listening -addresses as well as TRAP sinks with the 'ipaddr%iface' syntax: - -agentAddress 10.0.1.7%mgmt,22.22.22.22%red -trapsink 10.0.1.9%mgmt -trap2sink 22.22.22.25%red - -The SO_BINDTODEVICE socket option is used to bind a VRF to a particular -socket. - -Testing done included VRFs as well as non-VRF functionality with traps -(v1, v2, and v3) - ---- - agent/agent_trap.c | 20 ++++++++++-- - agent/mibgroup/agentx/master.c | 2 +- - agent/mibgroup/agentx/subagent.c | 2 +- - agent/mibgroup/target/target.c | 3 +- - agent/snmp_agent.c | 21 ++++++++++++- - apps/agentxtrap.c | 2 +- - apps/snmptrap.c | 2 +- - apps/snmptrapd.c | 2 +- - include/net-snmp/library/snmpTCPDomain.h | 2 +- - include/net-snmp/library/snmpUDPBaseDomain.h | 2 +- - include/net-snmp/library/snmpUDPDomain.h | 2 +- - include/net-snmp/library/snmpUDPIPv4BaseDomain.h | 2 +- - include/net-snmp/library/snmpUDPIPv6Domain.h | 2 +- - include/net-snmp/library/snmp_transport.h | 19 +++++++----- - snmplib/snmp_api.c | 4 +-- - snmplib/snmp_transport.c | 26 ++++++++-------- - snmplib/transports/snmpAliasDomain.c | 6 ++-- - snmplib/transports/snmpTCPDomain.c | 16 +++++++--- - snmplib/transports/snmpUDPBaseDomain.c | 39 ++++++++++++++++++------ - snmplib/transports/snmpUDPDomain.c | 15 ++++----- - snmplib/transports/snmpUDPIPv4BaseDomain.c | 4 +-- - snmplib/transports/snmpUDPIPv6Domain.c | 19 ++++----- - snmplib/transports/snmpUnixDomain.c | 5 +-- - 23 files changed, 141 insertions(+), 76 deletions(-) - -diff --git a/agent/agent_trap.c b/agent/agent_trap.c -index 080b8bf..c488ac9 100644 ---- a/agent/agent_trap.c -+++ b/agent/agent_trap.c -@@ -226,6 +226,7 @@ create_trap_session2(const char *sink, const char* sinkport, - { - netsnmp_transport *t; - netsnmp_session session, *sesp; -+ char *iface; - - memset(&session, 0, sizeof(netsnmp_session)); - session.version = version; -@@ -250,7 +251,14 @@ create_trap_session2(const char *sink, const char* sinkport, - ((0 == strcmp("localhost",sink)) || (0 == strcmp("127.0.0.1",sink)))) - session.localname = strdup("localhost"); - -- t = netsnmp_tdomain_transport_full("snmptrap", sink, 0, NULL, sinkport); -+ /* -+ * if given an iface (ip%iface) in sink, send the iface too -+ */ -+ iface = strchr(sink, '%'); -+ if (iface) -+ *iface++ = '\0'; -+ -+ t = netsnmp_tdomain_transport_full("snmptrap", sink, 0, NULL, sinkport, iface); - if (t != NULL) { - sesp = snmp_add(&session, t, NULL, NULL); - -@@ -1219,6 +1227,7 @@ snmpd_parse_config_trapsess(const char *word, char *cptr) - netsnmp_session session, *ss; - netsnmp_transport *transport; - size_t len; -+ char *iface; - - /* - * inform or trap? default to trap -@@ -1240,7 +1249,14 @@ snmpd_parse_config_trapsess(const char *word, char *cptr) - NETSNMP_PARSE_ARGS_NOLOGGING | - NETSNMP_PARSE_ARGS_NOZERO); - -- transport = netsnmp_transport_open_client("snmptrap", session.peername); -+ /* -+ * if iface is given in peer, we will need to bind to that iface -+ */ -+ iface = strchr(session.peername, '%'); -+ if (iface) -+ *iface++ = '\0'; -+ -+ transport = netsnmp_transport_open_client("snmptrap", session.peername, iface); - if (transport == NULL) { - config_perror("snmpd: failed to parse this line."); - return; -diff --git a/agent/mibgroup/agentx/master.c b/agent/mibgroup/agentx/master.c -index baeebaf..6733e7f 100644 ---- a/agent/mibgroup/agentx/master.c -+++ b/agent/mibgroup/agentx/master.c -@@ -126,7 +126,7 @@ real_init_master(void) - sess.remote_port = 0; - sess.callback = handle_master_agentx_packet; - errno = 0; -- t = netsnmp_transport_open_server("agentx", sess.peername); -+ t = netsnmp_transport_open_server("agentx", sess.peername, NULL); - if (t == NULL) { - /* - * diagnose snmp_open errors with the input netsnmp_session -diff --git a/agent/mibgroup/agentx/subagent.c b/agent/mibgroup/agentx/subagent.c -index 1f9d31c..6d38a34 100644 ---- a/agent/mibgroup/agentx/subagent.c -+++ b/agent/mibgroup/agentx/subagent.c -@@ -843,7 +843,7 @@ subagent_open_master_session(void) - - agentx_socket = netsnmp_ds_get_string(NETSNMP_DS_APPLICATION_ID, - NETSNMP_DS_AGENT_X_SOCKET); -- t = netsnmp_transport_open_client("agentx", agentx_socket); -+ t = netsnmp_transport_open_client("agentx", agentx_socket, NULL); - if (t == NULL) { - /* - * Diagnose snmp_open errors with the input -diff --git a/agent/mibgroup/target/target.c b/agent/mibgroup/target/target.c -index 5619e35..6f58817 100644 ---- a/agent/mibgroup/target/target.c -+++ b/agent/mibgroup/target/target.c -@@ -154,7 +154,8 @@ get_target_sessions(char *taglist, TargetFilterFunction * filterfunct, - tAddress, - targaddrs-> - tAddressLen, -- 0); -+ 0, -+ NULL); - if (t == NULL) { - DEBUGMSGTL(("target_sessions", - "bad dest \"")); -diff --git a/agent/snmp_agent.c b/agent/snmp_agent.c -index b96d650..281e8b2 100644 ---- a/agent/snmp_agent.c -+++ b/agent/snmp_agent.c -@@ -1270,6 +1270,7 @@ init_master_agent(void) - char *cptr; - char *buf = NULL; - char *st; -+ char *iface; - - /* default to a default cache size */ - netsnmp_set_lookup_cache_size(-1); -@@ -1318,6 +1319,9 @@ init_master_agent(void) - * AAL5PVC:itf.vpi.vci (if supported) - * IPX:[network]:node[/port] (if supported) - * -+ * -+ * New format to specify an interface for binding along with IP address -+ * address%iface - */ - - cptr = st; -@@ -1334,7 +1338,22 @@ init_master_agent(void) - "requested\n")); - break; - } -- transport = netsnmp_transport_open_server("snmp", cptr); -+ -+ /* -+ * at some point, we may want to add the special listendevice -+ * keyword support. Not sure how to interact with ip%iface -+ iface = netsnmp_ds_get_string(NETSNMP_DS_APPLICATION_ID, -+ NETSNMP_DS_AGENT_LISTEN_DEVICE); -+ */ -+ -+ /* Look for %iface so we can send along a specific interface to -+ setsockopt SO_BINDTODEVICE later. */ -+ iface = strchr(cptr, '%'); -+ if (iface) -+ *iface++ = '\0'; -+ -+ transport = netsnmp_transport_open_server("snmp", cptr, iface); -+ - - if (transport == NULL) { - snmp_log(LOG_ERR, "Error opening specified endpoint \"%s\"\n", -diff --git a/apps/agentxtrap.c b/apps/agentxtrap.c -index 4df423c..ebd81a3 100644 ---- a/apps/agentxtrap.c -+++ b/apps/agentxtrap.c -@@ -231,7 +231,7 @@ ConnectingEntry(UNUSED tState self) - - if(!(t = netsnmp_transport_open_client( - "agentx", netsnmp_ds_get_string( -- NETSNMP_DS_APPLICATION_ID, NETSNMP_DS_AGENT_X_SOCKET)))) { -+ NETSNMP_DS_APPLICATION_ID, NETSNMP_DS_AGENT_X_SOCKET), NULL))) { - snmp_log(LOG_ERR, "Failed to connect to AgentX server\n"); - change_state(&Exit); - } else if(!(sess = snmp_sess_add_ex( -diff --git a/apps/snmptrap.c b/apps/snmptrap.c -index 7c086db..28d5257 100644 ---- a/apps/snmptrap.c -+++ b/apps/snmptrap.c -@@ -215,7 +215,7 @@ main(int argc, char *argv[]) - } - - ss = snmp_add(&session, -- netsnmp_transport_open_client("snmptrap", session.peername), -+ netsnmp_transport_open_client("snmptrap", session.peername, NULL), - NULL, NULL); - if (ss == NULL) { - /* -diff --git a/apps/snmptrapd.c b/apps/snmptrapd.c -index bce0d47..122a502 100644 ---- a/apps/snmptrapd.c -+++ b/apps/snmptrapd.c -@@ -1186,7 +1186,7 @@ main(int argc, char *argv[]) - *sep = 0; - } - -- transport = netsnmp_transport_open_server("snmptrap", cp); -+ transport = netsnmp_transport_open_server("snmptrap", cp, NULL); - if (transport == NULL) { - snmp_log(LOG_ERR, "couldn't open %s -- errno %d (\"%s\")\n", - cp, errno, strerror(errno)); -diff --git a/include/net-snmp/library/snmpTCPDomain.h b/include/net-snmp/library/snmpTCPDomain.h -index c45856b..3b1fef5 100644 ---- a/include/net-snmp/library/snmpTCPDomain.h -+++ b/include/net-snmp/library/snmpTCPDomain.h -@@ -25,7 +25,7 @@ extern "C" { - #define TRANSPORT_DOMAIN_TCP_IP 1,3,6,1,2,1,100,1,5 - NETSNMP_IMPORT oid netsnmp_snmpTCPDomain[]; - --netsnmp_transport *netsnmp_tcp_transport(struct sockaddr_in *addr, int local); -+netsnmp_transport *netsnmp_tcp_transport(struct sockaddr_in *addr, int local, char *iface); - - /* - * "Constructor" for transport domain object. -diff --git a/include/net-snmp/library/snmpUDPBaseDomain.h b/include/net-snmp/library/snmpUDPBaseDomain.h -index b9d2c34..0ab2fe5 100644 ---- a/include/net-snmp/library/snmpUDPBaseDomain.h -+++ b/include/net-snmp/library/snmpUDPBaseDomain.h -@@ -18,7 +18,7 @@ extern "C" { - /* - * Prototypes - */ -- void _netsnmp_udp_sockopt_set(int fd, int local); -+ void _netsnmp_udp_sockopt_set(int fd, int local, char *iface); - int netsnmp_udpbase_recv(netsnmp_transport *t, void *buf, int size, - void **opaque, int *olength); - int netsnmp_udpbase_send(netsnmp_transport *t, void *buf, int size, -diff --git a/include/net-snmp/library/snmpUDPDomain.h b/include/net-snmp/library/snmpUDPDomain.h -index 3a09dfd..e402cd8 100644 ---- a/include/net-snmp/library/snmpUDPDomain.h -+++ b/include/net-snmp/library/snmpUDPDomain.h -@@ -18,7 +18,7 @@ extern "C" { - config_require(UDPIPv4Base) - #include - --netsnmp_transport *netsnmp_udp_transport(struct sockaddr_in *addr, int local); -+netsnmp_transport *netsnmp_udp_transport(struct sockaddr_in *addr, int local, char*iface); - - - /* -diff --git a/include/net-snmp/library/snmpUDPIPv4BaseDomain.h b/include/net-snmp/library/snmpUDPIPv4BaseDomain.h -index 6f7f2c2..8d3e906 100644 ---- a/include/net-snmp/library/snmpUDPIPv4BaseDomain.h -+++ b/include/net-snmp/library/snmpUDPIPv4BaseDomain.h -@@ -25,7 +25,7 @@ extern "C" { - */ - - netsnmp_transport *netsnmp_udpipv4base_transport(struct sockaddr_in *addr, -- int local); -+ int local, char *iface); - - #if defined(HAVE_IP_PKTINFO) || defined(HAVE_IP_RECVDSTADDR) - int netsnmp_udpipv4_recvfrom(int s, void *buf, int len, -diff --git a/include/net-snmp/library/snmpUDPIPv6Domain.h b/include/net-snmp/library/snmpUDPIPv6Domain.h -index 83eba2c..009c510 100644 ---- a/include/net-snmp/library/snmpUDPIPv6Domain.h -+++ b/include/net-snmp/library/snmpUDPIPv6Domain.h -@@ -23,7 +23,7 @@ config_require(UDPBase) - NETSNMP_IMPORT oid netsnmp_UDPIPv6Domain[]; - - netsnmp_transport *netsnmp_udp6_transport(struct sockaddr_in6 *addr, -- int local); -+ int local, char *iface); - - - /* -diff --git a/include/net-snmp/library/snmp_transport.h b/include/net-snmp/library/snmp_transport.h -index 4162897..a3deda7 100644 ---- a/include/net-snmp/library/snmp_transport.h -+++ b/include/net-snmp/library/snmp_transport.h -@@ -206,14 +206,14 @@ typedef struct netsnmp_tdomain_s { - * The f_create_from_tstring field is deprecated, please do not use it - * for new code and try to migrate old code away from using it. - */ -- netsnmp_transport *(*f_create_from_tstring) (const char *, int); -+ netsnmp_transport *(*f_create_from_tstring) (const char *, int, char *); - -- netsnmp_transport *(*f_create_from_ostring) (const u_char *, size_t, int); -+ netsnmp_transport *(*f_create_from_ostring) (const u_char *, size_t, int, char *); - - struct netsnmp_tdomain_s *next; - - netsnmp_transport *(*f_create_from_tstring_new) (const char *, int, -- const char*); -+ const char*, char *); - - } netsnmp_tdomain; - -@@ -273,29 +273,32 @@ void netsnmp_tdomain_init(void); - NETSNMP_IMPORT - netsnmp_transport *netsnmp_tdomain_transport(const char *str, - int local, -- const char *default_domain); -+ const char *default_domain, -+ char *iface); - - NETSNMP_IMPORT - netsnmp_transport *netsnmp_tdomain_transport_full(const char *application, - const char *str, - int local, - const char *default_domain, -- const char *default_target); -+ const char *default_target, -+ char *iface); - - NETSNMP_IMPORT - netsnmp_transport *netsnmp_tdomain_transport_oid(const oid * dom, - size_t dom_len, - const u_char * o, - size_t o_len, -- int local); -+ int local, -+ char *iface); - - NETSNMP_IMPORT - netsnmp_transport* --netsnmp_transport_open_client(const char* application, const char* str); -+netsnmp_transport_open_client(const char* application, const char* str, char *iface); - - NETSNMP_IMPORT - netsnmp_transport* --netsnmp_transport_open_server(const char* application, const char* str); -+netsnmp_transport_open_server(const char* application, const char* str, char *iface); - - netsnmp_transport* - netsnmp_transport_open(const char* application, const char* str, int local); -diff --git a/snmplib/snmp_api.c b/snmplib/snmp_api.c -index d155c99..5128c56 100644 ---- a/snmplib/snmp_api.c -+++ b/snmplib/snmp_api.c -@@ -1557,12 +1557,12 @@ _sess_open(netsnmp_session * in_session) - transport = - netsnmp_tdomain_transport_full("snmp", in_session->peername, - in_session->local_port, "tcp,tcp6", -- NULL); -+ NULL, NULL); - } else { - transport = - netsnmp_tdomain_transport_full("snmp", in_session->peername, - in_session->local_port, "udp,udp6", -- NULL); -+ NULL, NULL); - } - - if (NULL != clientaddr_save) -diff --git a/snmplib/snmp_transport.c b/snmplib/snmp_transport.c -index ada4781..40cd631 100644 ---- a/snmplib/snmp_transport.c -+++ b/snmplib/snmp_transport.c -@@ -491,7 +491,8 @@ netsnmp_transport * - netsnmp_tdomain_transport_full(const char *application, - const char *str, int local, - const char *default_domain, -- const char *default_target) -+ const char *default_target, -+ char *iface) - { - netsnmp_tdomain *match = NULL; - const char *addr = NULL; -@@ -646,10 +647,10 @@ netsnmp_tdomain_transport_full(const char *application, - NETSNMP_LOGONCE((LOG_WARNING, - "transport domain %s uses deprecated f_create_from_tstring\n", - match->prefix[0])); -- t = match->f_create_from_tstring(addr, local); -+ t = match->f_create_from_tstring(addr, local, iface); - } - else -- t = match->f_create_from_tstring_new(addr, local, addr2); -+ t = match->f_create_from_tstring_new(addr, local, addr2, iface); - if (t) { - if (lspec) { - free(lspec[0]); -@@ -676,10 +677,11 @@ netsnmp_tdomain_transport_full(const char *application, - - netsnmp_transport * - netsnmp_tdomain_transport(const char *str, int local, -- const char *default_domain) -+ const char *default_domain, -+ char *iface) - { - return netsnmp_tdomain_transport_full("snmp", str, local, default_domain, -- NULL); -+ NULL, iface); - } - - -@@ -687,7 +689,7 @@ netsnmp_tdomain_transport(const char *str, int local, - netsnmp_transport * - netsnmp_tdomain_transport_oid(const oid * dom, - size_t dom_len, -- const u_char * o, size_t o_len, int local) -+ const u_char * o, size_t o_len, int local, char *iface) - { - netsnmp_tdomain *d; - int i; -@@ -700,7 +702,7 @@ netsnmp_tdomain_transport_oid(const oid * dom, - for (i = 0; d->prefix[i] != NULL; i++) { - if (netsnmp_oid_equals(dom, dom_len, d->name, d->name_length) == - 0) { -- return d->f_create_from_ostring(o, o_len, local); -+ return d->f_create_from_ostring(o, o_len, local, iface); - } - } - } -@@ -713,19 +715,19 @@ netsnmp_tdomain_transport_oid(const oid * dom, - netsnmp_transport* - netsnmp_transport_open(const char* application, const char* str, int local) - { -- return netsnmp_tdomain_transport_full(application, str, local, NULL, NULL); -+ return netsnmp_tdomain_transport_full(application, str, local, NULL, NULL, NULL); - } - - netsnmp_transport* --netsnmp_transport_open_server(const char* application, const char* str) -+netsnmp_transport_open_server(const char* application, const char* str, char *iface) - { -- return netsnmp_tdomain_transport_full(application, str, 1, NULL, NULL); -+ return netsnmp_tdomain_transport_full(application, str, 1, NULL, NULL, iface); - } - - netsnmp_transport* --netsnmp_transport_open_client(const char* application, const char* str) -+netsnmp_transport_open_client(const char* application, const char* str, char *iface) - { -- return netsnmp_tdomain_transport_full(application, str, 0, NULL, NULL); -+ return netsnmp_tdomain_transport_full(application, str, 0, NULL, NULL, iface); - } - - /** adds a transport to a linked list of transports. -diff --git a/snmplib/transports/snmpAliasDomain.c b/snmplib/transports/snmpAliasDomain.c -index eb50cad..dd7a007 100644 ---- a/snmplib/transports/snmpAliasDomain.c -+++ b/snmplib/transports/snmpAliasDomain.c -@@ -75,7 +75,7 @@ free_alias_config(void) { - - netsnmp_transport * - netsnmp_alias_create_tstring(const char *str, int local, -- const char *default_target) -+ const char *default_target, char *iface) - { - const char *aliasdata; - -@@ -85,13 +85,13 @@ netsnmp_alias_create_tstring(const char *str, int local, - return NULL; - } - -- return netsnmp_tdomain_transport(aliasdata,local,default_target); -+ return netsnmp_tdomain_transport(aliasdata,local,default_target, iface); - } - - - - netsnmp_transport * --netsnmp_alias_create_ostring(const u_char * o, size_t o_len, int local) -+netsnmp_alias_create_ostring(const u_char * o, size_t o_len, int local, char *iface) - { - fprintf(stderr, "make ostring\n"); - return NULL; -diff --git a/snmplib/transports/snmpTCPDomain.c b/snmplib/transports/snmpTCPDomain.c -index 7feb028..6eb717e 100644 ---- a/snmplib/transports/snmpTCPDomain.c -+++ b/snmplib/transports/snmpTCPDomain.c -@@ -144,7 +144,7 @@ netsnmp_tcp_accept(netsnmp_transport *t) - */ - - netsnmp_transport * --netsnmp_tcp_transport(struct sockaddr_in *addr, int local) -+netsnmp_tcp_transport(struct sockaddr_in *addr, int local, char *iface) - { - netsnmp_transport *t = NULL; - netsnmp_udp_addr_pair *addr_pair = NULL; -@@ -212,6 +212,11 @@ netsnmp_tcp_transport(struct sockaddr_in *addr, int local) - * We should set SO_REUSEADDR too. - */ - -+ if (iface && setsockopt(t->sock, SOL_SOCKET, SO_BINDTODEVICE, -+ iface, strlen(iface)) == -1) -+ snmp_log(LOG_ERR, "Bind interface %s to socket: %s\n", -+ iface, strerror(errno)); -+ - setsockopt(t->sock, SOL_SOCKET, SO_REUSEADDR, (void *)&opt, - sizeof(opt)); - -@@ -305,12 +310,13 @@ netsnmp_tcp_transport(struct sockaddr_in *addr, int local) - - netsnmp_transport * - netsnmp_tcp_create_tstring(const char *str, int local, -- const char *default_target) -+ const char *default_target, -+ char *iface) - { - struct sockaddr_in addr; - - if (netsnmp_sockaddr_in2(&addr, str, default_target)) { -- return netsnmp_tcp_transport(&addr, local); -+ return netsnmp_tcp_transport(&addr, local, iface); - } else { - return NULL; - } -@@ -319,7 +325,7 @@ netsnmp_tcp_create_tstring(const char *str, int local, - - - netsnmp_transport * --netsnmp_tcp_create_ostring(const u_char * o, size_t o_len, int local) -+netsnmp_tcp_create_ostring(const u_char * o, size_t o_len, int local, char *iface) - { - struct sockaddr_in addr; - -@@ -328,7 +334,7 @@ netsnmp_tcp_create_ostring(const u_char * o, size_t o_len, int local) - addr.sin_family = AF_INET; - memcpy((u_char *) & (addr.sin_addr.s_addr), o, 4); - addr.sin_port = htons(porttmp); -- return netsnmp_tcp_transport(&addr, local); -+ return netsnmp_tcp_transport(&addr, local, iface); - } - return NULL; - } -diff --git a/snmplib/transports/snmpUDPBaseDomain.c b/snmplib/transports/snmpUDPBaseDomain.c -index 8497f71..7b415bc 100644 ---- a/snmplib/transports/snmpUDPBaseDomain.c -+++ b/snmplib/transports/snmpUDPBaseDomain.c -@@ -21,6 +21,9 @@ - #if HAVE_NETINET_IN_H - #include - #endif -+#if HAVE_NET_IF_H -+#include -+#endif - #if HAVE_ARPA_INET_H - #include - #endif -@@ -53,8 +56,14 @@ - #endif - - void --_netsnmp_udp_sockopt_set(int fd, int local) -+_netsnmp_udp_sockopt_set(int fd, int local, char *iface) - { -+ -+ if (iface && setsockopt(fd, SOL_SOCKET, SO_BINDTODEVICE, iface, strlen(iface)) == -1) -+ snmp_log(LOG_ERR, "Bind socket on interface: %s: %s\n", iface, strerror(errno)); -+ else if (iface) -+ DEBUGMSGTL(("socket:option", "setting SO_BINDTODEVICE to %s\n", iface)); -+ - #ifdef SO_BSDCOMPAT - /* - * Patch for Linux. Without this, UDP packets that fail get an ICMP -@@ -237,7 +246,10 @@ int netsnmp_udpbase_sendto(int fd, struct in_addr *srcip, int if_index, - struct msghdr m = { 0 }; - char cmsg[CMSG_SPACE(cmsg_data_size)]; - int rc; -- -+ char iface[IFNAMSIZ]; -+ socklen_t ifacelen = IFNAMSIZ; -+ -+ iface[0] = '\0'; - iov.iov_base = data; - iov.iov_len = len; - -@@ -269,14 +281,23 @@ int netsnmp_udpbase_sendto(int fd, struct in_addr *srcip, int if_index, - - memset(&ipi, 0, sizeof(ipi)); - /* -- * Except in the case of responding -- * to a broadcast, setting the ifindex -- * when responding results in incorrect -- * behavior of changing the source address -- * that the manager sees the response -- * come from. -+ * For asymmetric multihomed users, we only set ifindex to 0 -+ * to let kernel handle return if there was no iface bound to the socket. - */ -- ipi.ipi_ifindex = 0; -+ if (getsockopt(fd, SOL_SOCKET, SO_BINDTODEVICE, iface, &ifacelen) != 0) { -+ DEBUGMSGTL(("socket:option", "error getsockopt %s\n", strerror(errno))); -+ DEBUGMSGTL(("socket:option", "sendto: SO_BINDTODEVICE not set ifindex=0\n")); -+ ipi.ipi_ifindex = 0; -+ } else if (!ifacelen) { -+ DEBUGMSGTL(("socket:option", "sendto: SO_BINDTODEVICE not set ifacelen=%d ifindex=0\n", -+ ifacelen)); -+ ipi.ipi_ifindex = 0; -+ } else { -+ DEBUGMSGTL(("socket:option", "sendto: SO_BINDTODEVICE dev=%s using ifindex=%d\n", -+ iface, if_index)); -+ ipi.ipi_ifindex = if_index; -+ } -+ - #if defined(cygwin) - ipi.ipi_addr.s_addr = srcip->s_addr; - #else -diff --git a/snmplib/transports/snmpUDPDomain.c b/snmplib/transports/snmpUDPDomain.c -index a0abd8c..fc68303 100644 ---- a/snmplib/transports/snmpUDPDomain.c -+++ b/snmplib/transports/snmpUDPDomain.c -@@ -84,7 +84,7 @@ typedef netsnmp_indexed_addr_pair netsnmp_udp_addr_pair; - * not static, since snmpUDPIPv6Domain needs it, but not public, either. - * (ie don't put it in a public header.) - */ --void _netsnmp_udp_sockopt_set(int fd, int server); -+void _netsnmp_udp_sockopt_set(int fd, int server, char *iface); - int - netsnmp_sockaddr_in2(struct sockaddr_in *addr, - const char *inpeername, const char *default_target); -@@ -125,11 +125,11 @@ int netsnmp_udp_sendto(int fd, struct in_addr *srcip, int if_index, struct socka - */ - - netsnmp_transport * --netsnmp_udp_transport(struct sockaddr_in *addr, int local) -+netsnmp_udp_transport(struct sockaddr_in *addr, int local, char *iface) - { - netsnmp_transport *t = NULL; - -- t = netsnmp_udpipv4base_transport(addr, local); -+ t = netsnmp_udpipv4base_transport(addr, local, iface); - if (NULL == t) { - return NULL; - } -@@ -473,12 +473,13 @@ netsnmp_udp_getSecName(void *opaque, int olength, - - netsnmp_transport * - netsnmp_udp_create_tstring(const char *str, int local, -- const char *default_target) -+ const char *default_target, -+ char *iface) - { - struct sockaddr_in addr; - - if (netsnmp_sockaddr_in2(&addr, str, default_target)) { -- return netsnmp_udp_transport(&addr, local); -+ return netsnmp_udp_transport(&addr, local, iface); - } else { - return NULL; - } -@@ -486,7 +487,7 @@ netsnmp_udp_create_tstring(const char *str, int local, - - - netsnmp_transport * --netsnmp_udp_create_ostring(const u_char * o, size_t o_len, int local) -+netsnmp_udp_create_ostring(const u_char * o, size_t o_len, int local, char *iface) - { - struct sockaddr_in addr; - -@@ -495,7 +496,7 @@ netsnmp_udp_create_ostring(const u_char * o, size_t o_len, int local) - addr.sin_family = AF_INET; - memcpy((u_char *) & (addr.sin_addr.s_addr), o, 4); - addr.sin_port = htons(porttmp); -- return netsnmp_udp_transport(&addr, local); -+ return netsnmp_udp_transport(&addr, local, iface); - } - return NULL; - } -diff --git a/snmplib/transports/snmpUDPIPv4BaseDomain.c b/snmplib/transports/snmpUDPIPv4BaseDomain.c -index 8c0fb05..7991b6a 100644 ---- a/snmplib/transports/snmpUDPIPv4BaseDomain.c -+++ b/snmplib/transports/snmpUDPIPv4BaseDomain.c -@@ -57,7 +57,7 @@ int netsnmp_udpipv4_sendto(int fd, struct in_addr *srcip, int if_index, - #endif /* HAVE_IP_PKTINFO || HAVE_IP_RECVDSTADDR */ - - netsnmp_transport * --netsnmp_udpipv4base_transport(struct sockaddr_in *addr, int local) -+netsnmp_udpipv4base_transport(struct sockaddr_in *addr, int local, char *iface) - { - netsnmp_transport *t = NULL; - int rc = 0, rc2; -@@ -95,7 +95,7 @@ netsnmp_udpipv4base_transport(struct sockaddr_in *addr, int local) - return NULL; - } - -- _netsnmp_udp_sockopt_set(t->sock, local); -+ _netsnmp_udp_sockopt_set(t->sock, local, iface); - - if (local) { - #ifndef NETSNMP_NO_LISTEN_SUPPORT -diff --git a/snmplib/transports/snmpUDPIPv6Domain.c b/snmplib/transports/snmpUDPIPv6Domain.c -index 18de876..6b44b22 100644 ---- a/snmplib/transports/snmpUDPIPv6Domain.c -+++ b/snmplib/transports/snmpUDPIPv6Domain.c -@@ -74,12 +74,6 @@ oid netsnmp_UDPIPv6Domain[] = { TRANSPORT_DOMAIN_UDP_IPV6 }; - static netsnmp_tdomain udp6Domain; - - /* -- * from snmpUDPDomain. not static, but not public, either. -- * (ie don't put it in a public header.) -- */ --extern void _netsnmp_udp_sockopt_set(int fd, int server); -- --/* - * Return a string representing the address in data, or else the "far end" - * address if data is NULL. - */ -@@ -186,7 +186,7 @@ netsnmp_udp6_send(netsnmp_transport *t, void *buf, int size, - */ - - netsnmp_transport * --netsnmp_udp6_transport(struct sockaddr_in6 *addr, int local) -+netsnmp_udp6_transport(struct sockaddr_in6 *addr, int local, char *iface) - { - netsnmp_transport *t = NULL; - int rc = 0; -@@ -223,7 +223,7 @@ netsnmp_udp6_transport(struct sockaddr_in6 *addr, int local) - return NULL; - } - -- _netsnmp_udp_sockopt_set(t->sock, local); -+ _netsnmp_udp_sockopt_set(t->sock, local, iface); - - if (local) { - #ifndef NETSNMP_NO_LISTEN_SUPPORT -@@ -724,12 +724,13 @@ netsnmp_udp6_getSecName(void *opaque, int olength, - - netsnmp_transport * - netsnmp_udp6_create_tstring(const char *str, int local, -- const char *default_target) -+ const char *default_target, -+ char *iface) - { - struct sockaddr_in6 addr; - - if (netsnmp_sockaddr_in6_2(&addr, str, default_target)) { -- return netsnmp_udp6_transport(&addr, local); -+ return netsnmp_udp6_transport(&addr, local, iface); - } else { - return NULL; - } -@@ -746,7 +747,7 @@ netsnmp_udp6_create_tstring(const char *str, int local, - */ - - netsnmp_transport * --netsnmp_udp6_create_ostring(const u_char * o, size_t o_len, int local) -+netsnmp_udp6_create_ostring(const u_char * o, size_t o_len, int local, char *iface) - { - struct sockaddr_in6 addr; - -@@ -755,7 +756,7 @@ netsnmp_udp6_create_ostring(const u_char * o, size_t o_len, int local) - addr.sin6_family = AF_INET6; - memcpy((u_char *) & (addr.sin6_addr.s6_addr), o, 16); - addr.sin6_port = htons((o[16] << 8) + o[17]); -- return netsnmp_udp6_transport(&addr, local); -+ return netsnmp_udp6_transport(&addr, local, iface); - } - return NULL; - } -diff --git a/snmplib/transports/snmpUnixDomain.c b/snmplib/transports/snmpUnixDomain.c -index 47dffc1..af56c5d 100644 ---- a/snmplib/transports/snmpUnixDomain.c -+++ b/snmplib/transports/snmpUnixDomain.c -@@ -450,7 +450,8 @@ netsnmp_unix_transport(struct sockaddr_un *addr, int local) - - netsnmp_transport * - netsnmp_unix_create_tstring(const char *string, int local, -- const char *default_target) -+ const char *default_target, -+ char *iface) - { - struct sockaddr_un addr; - -@@ -476,7 +477,7 @@ netsnmp_unix_create_tstring(const char *string, int local, - - - netsnmp_transport * --netsnmp_unix_create_ostring(const u_char * o, size_t o_len, int local) -+netsnmp_unix_create_ostring(const u_char * o, size_t o_len, int local, char *iface) - { - struct sockaddr_un addr; - --- -2.7.4 - diff --git a/src/snmpd/patch-5.7.3+dfsg/0008-Enable-macro-DEB_BUILD_ARCH_OS-in-order-to-build-ipv.patch b/src/snmpd/patch-5.7.3+dfsg/0008-Enable-macro-DEB_BUILD_ARCH_OS-in-order-to-build-ipv.patch deleted file mode 100644 index c41b5b5a663..00000000000 --- a/src/snmpd/patch-5.7.3+dfsg/0008-Enable-macro-DEB_BUILD_ARCH_OS-in-order-to-build-ipv.patch +++ /dev/null @@ -1,22 +0,0 @@ -From 6e038423d7a3269dbfd85b3d7ada6015479f1559 Mon Sep 17 00:00:00 2001 -From: Qi Luo -Date: Fri, 20 Sep 2019 00:42:19 +0000 -Subject: [PATCH] Enable macro DEB_BUILD_ARCH_OS in order to build ipv6 feature - ---- - debian/rules | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/debian/rules b/debian/rules -index 4c3b5b6..1fab6a4 100755 ---- a/debian/rules -+++ b/debian/rules -@@ -4,4 +4,5 @@ - export DEB_BUILD_MAINT_OPTIONS := hardening=+all - DEB_HOST_MULTIARCH ?= $(shell dpkg-architecture -qDEB_HOST_MULTIARCH) -+DEB_BUILD_ARCH_OS ?= $(shell dpkg-architecture -qDEB_BUILD_ARCH_OS) - - LIB_VERSION = 30 --- -2.18.0 - diff --git a/src/snmpd/patch-5.7.3+dfsg/0022-etherlike-mib-memleak.patch b/src/snmpd/patch-5.7.3+dfsg/0022-etherlike-mib-memleak.patch deleted file mode 100644 index eb921786b44..00000000000 --- a/src/snmpd/patch-5.7.3+dfsg/0022-etherlike-mib-memleak.patch +++ /dev/null @@ -1,9 +0,0 @@ ---- net-snmp-5.7.3+dfsg/agent/mibgroup/etherlike-mib/data_access/dot3stats_linux.c.org 2020-09-03 19:09:26.241863000 -0700 -+++ net-snmp-5.7.3+dfsg/agent/mibgroup/etherlike-mib/data_access/dot3stats_linux.c 2020-09-03 19:24:27.054098000 -0700 -@@ -465,6 +465,7 @@ - done = 1; - } - kern_db = ke->next; -+ free(ke->name); - free(ke); - } diff --git a/src/snmpd/patch-5.7.3+dfsg/cross-compile-changes.patch b/src/snmpd/patch-5.7.3+dfsg/cross-compile-changes.patch deleted file mode 100644 index 47db1105a68..00000000000 --- a/src/snmpd/patch-5.7.3+dfsg/cross-compile-changes.patch +++ /dev/null @@ -1,17 +0,0 @@ -diff --git a/debian/rules b/debian/rules -index 9274c17..d107454 100755 ---- a/debian/rules -+++ b/debian/rules -@@ -5,6 +5,12 @@ export DEB_BUILD_MAINT_OPTIONS := hardening=+all - DEB_HOST_MULTIARCH ?= $(shell dpkg-architecture -qDEB_HOST_MULTIARCH) - DEB_BUILD_ARCH_OS ?= $(shell dpkg-architecture -qDEB_BUILD_ARCH_OS) - -+DEB_BUILD_MULTIARCH ?= $(shell dpkg-architecture -qDEB_BUILD_MULTIARCH) -+ -+ifneq ($(DEB_BUILD_MULTIARCH),$(DEB_HOST_MULTIARCH)) -+export PERL5OPT := -I/usr/lib/$(DEB_HOST_MULTIARCH)/perl/cross-config-$(shell perl -MConfig -e 'print $$Config{version}') -+endif -+ - LIB_VERSION = 30 - PYTHON_VERSION = 1.0a1 - diff --git a/src/snmpd/patch-5.7.3+dfsg/series b/src/snmpd/patch-5.7.3+dfsg/series deleted file mode 100644 index 11dabe8d1d6..00000000000 --- a/src/snmpd/patch-5.7.3+dfsg/series +++ /dev/null @@ -1,7 +0,0 @@ -0001-SNMP-Stop-spamming-logs-with-statfs-permission-denie.patch -0002-at.c-properly-check-return-status-from-realloc.-Than.patch -0006-From-Jiri-Cervenka-snmpd-Fixed-agentx-crashing-and-or-freezing-on-timeout.patch -0007-Linux-VRF-5.7.3-Support.patch -0008-Enable-macro-DEB_BUILD_ARCH_OS-in-order-to-build-ipv.patch -cross-compile-changes.patch -0022-etherlike-mib-memleak.patch diff --git a/src/snmpd/patch-5.9+dfsg/0001-SNMP-Stop-spamming-logs-with-statfs-permission-denie.patch b/src/snmpd/patch-5.9+dfsg/0001-SNMP-Stop-spamming-logs-with-statfs-permission-denie.patch deleted file mode 100644 index 9a1f23c0b48..00000000000 --- a/src/snmpd/patch-5.9+dfsg/0001-SNMP-Stop-spamming-logs-with-statfs-permission-denie.patch +++ /dev/null @@ -1,27 +0,0 @@ -From a1edbce39e46b5c8bd5bd7db17fc11fa30e7dd73 Mon Sep 17 00:00:00 2001 -From: pavel-shirshov -Date: Mon, 27 Aug 2018 16:50:16 +0800 -Subject: [PATCH] [SNMP] Stop spamming logs with statfs permission denied log - message #1668 - ---- - agent/mibgroup/hardware/fsys/fsys_mntctl.c | 2 -- - agent/mibgroup/hardware/fsys/fsys_mntent.c | 2 -- - 2 files changed, 4 deletions(-) - -diff --git a/agent/mibgroup/hardware/fsys/fsys_mntctl.c b/agent/mibgroup/hardware/fsys/fsys_mntctl.c -index 9fbb068..adc38d6 100644 ---- a/agent/mibgroup/hardware/fsys/fsys_mntctl.c -+++ b/agent/mibgroup/hardware/fsys/fsys_mntctl.c -@@ -163,8 +163,6 @@ netsnmp_fsys_arch_load( void ) - continue; - - if ( statfs( entry->path, &stat_buf ) < 0 ) { -- snprintf( tmpbuf, sizeof(tmpbuf), "Cannot statfs %s", entry->path ); -- snmp_log_perror( tmpbuf ); - continue; - } - entry->units = stat_buf.f_bsize; --- -2.7.4 - diff --git a/src/snmpd/patch-5.9+dfsg/0002-at.c-properly-check-return-status-from-realloc.-Than.patch b/src/snmpd/patch-5.9+dfsg/0002-at.c-properly-check-return-status-from-realloc.-Than.patch deleted file mode 100644 index ceb0c68352b..00000000000 --- a/src/snmpd/patch-5.9+dfsg/0002-at.c-properly-check-return-status-from-realloc.-Than.patch +++ /dev/null @@ -1,31 +0,0 @@ -From e370973f273ffc1b32673bc94c5a46f75a846d82 Mon Sep 17 00:00:00 2001 -From: Niels Baggesen -Date: Wed, 31 Aug 2016 21:43:36 +0200 -Subject: [PATCH] at.c: properly check return status from realloc. Thanks to - Daniel Eiland (bug 2678) - ---- - agent/mibgroup/mibII/at.c | 3 ++- - 1 file changed, 2 insertions(+), 1 deletion(-) - -diff --git a/agent/mibgroup/mibII/at.c b/agent/mibgroup/mibII/at.c -index f57ba2a..a73fb8c 100644 ---- a/agent/mibgroup/mibII/at.c -+++ b/agent/mibgroup/mibII/at.c -@@ -638,11 +638,12 @@ ARP_Scan_Init(void) - struct arptab *newtab = (struct arptab *) - realloc(at, (sizeof(struct arptab) * - (arptab_curr_max_size + ARP_CACHE_INCR))); -- if (newtab == at) { -+ if (newtab == NULL) { - snmp_log(LOG_ERR, - "Error allocating more space for arpcache. " - "Cache will continue to be limited to %d entries", - arptab_curr_max_size); -+ newtab = at; - break; - } else { - arptab_curr_max_size += ARP_CACHE_INCR; --- -2.7.4 - diff --git a/src/snmpd/patch-5.9+dfsg/0003-CHANGES-BUG-2743-snmpd-crashes-when-receiving-a-GetN.patch b/src/snmpd/patch-5.9+dfsg/0003-CHANGES-BUG-2743-snmpd-crashes-when-receiving-a-GetN.patch deleted file mode 100644 index cdf9b94be93..00000000000 --- a/src/snmpd/patch-5.9+dfsg/0003-CHANGES-BUG-2743-snmpd-crashes-when-receiving-a-GetN.patch +++ /dev/null @@ -1,36 +0,0 @@ -From 2170e345858738e65d3156a49d3186e4a9288821 Mon Sep 17 00:00:00 2001 -From: Zhenggen Xu -Date: Fri, 12 Oct 2018 17:13:54 -0700 -Subject: [PATCH] Subject: [PATCH] CHANGES: BUG: 2743: snmpd crashes when - receiving a GetNext PDU with multiple Varbinds - -skip out-of-range varbinds when calling next handler ---- - agent/helpers/table.c | 4 ++++ - 1 file changed, 4 insertions(+) - -diff --git a/agent/helpers/table.c b/agent/helpers/table.c -index 882e84c..b943d6e 100644 ---- a/agent/helpers/table.c -+++ b/agent/helpers/table.c -@@ -406,6 +406,8 @@ table_helper_handler(netsnmp_mib_handler *handler, - if (reqinfo->mode == MODE_GET) - table_helper_cleanup(reqinfo, request, - SNMP_NOSUCHOBJECT); -+ else -+ request->processed = 1; /* skip if next handler called */ - continue; - } - -@@ -483,6 +485,8 @@ table_helper_handler(netsnmp_mib_handler *handler, - #endif /* NETSNMP_NO_WRITE_SUPPORT */ - table_helper_cleanup(reqinfo, request, - SNMP_NOSUCHOBJECT); -+ else -+ request->processed = 1; /* skip if next handler called */ - continue; - } - /* --- -2.18.0 - diff --git a/src/snmpd/patch-5.9+dfsg/0006-From-Jiri-Cervenka-snmpd-Fixed-agentx-crashing-and-or-freezing-on-timeout.patch b/src/snmpd/patch-5.9+dfsg/0006-From-Jiri-Cervenka-snmpd-Fixed-agentx-crashing-and-or-freezing-on-timeout.patch deleted file mode 100644 index d11a9d6d75e..00000000000 --- a/src/snmpd/patch-5.9+dfsg/0006-From-Jiri-Cervenka-snmpd-Fixed-agentx-crashing-and-or-freezing-on-timeout.patch +++ /dev/null @@ -1,211 +0,0 @@ -From a5782d0673044ad0c621daed7975f53238bb038e Mon Sep 17 00:00:00 2001 -From: Renuka Manavalan -Date: Tue, 10 Sep 2019 17:51:45 +0000 -Subject: [PATCH] Patch from SourceForge: net-snmp commit #793d59 Avoids snmpd - crash when sub agent timesout. - ---- - agent/mibgroup/agentx/master_admin.c | 1 + - agent/snmp_agent.c | 81 ++++++++++++++++++---------- - include/net-snmp/agent/snmp_agent.h | 5 ++ - 3 files changed, 60 insertions(+), 27 deletions(-) - -diff --git a/agent/mibgroup/agentx/master_admin.c b/agent/mibgroup/agentx/master_admin.c -index 4dc1aa7..8c1d194 100644 ---- a/agent/mibgroup/agentx/master_admin.c -+++ b/agent/mibgroup/agentx/master_admin.c -@@ -158,6 +158,7 @@ close_agentx_session(netsnmp_session * session, int sessid) - for (sp = session->subsession; sp != NULL; sp = sp->next) { - - if (sp->sessid == sessid) { -+ netsnmp_remove_delegated_requests_for_session(sp); - unregister_mibs_by_session(sp); - unregister_index_by_session(sp); - unregister_sysORTable_by_session(sp); -diff --git a/agent/snmp_agent.c b/agent/snmp_agent.c -index b96d650..7cacd1a 100644 ---- a/agent/snmp_agent.c -+++ b/agent/snmp_agent.c -@@ -1409,6 +1409,7 @@ init_agent_snmp_session(netsnmp_session * session, netsnmp_pdu *pdu) - asp->treecache_num = -1; - asp->treecache_len = 0; - asp->reqinfo = SNMP_MALLOC_TYPEDEF(netsnmp_agent_request_info); -+ asp->flags = SNMP_AGENT_FLAGS_NONE; - DEBUGMSGTL(("verbose:asp", "asp %p reqinfo %p created\n", - asp, asp->reqinfo)); - -@@ -1457,6 +1458,9 @@ netsnmp_check_for_delegated(netsnmp_agent_session *asp) - - if (NULL == asp->treecache) - return 0; -+ -+ if (asp->flags & SNMP_AGENT_FLAGS_CANCEL_IN_PROGRESS) -+ return 0; - - for (i = 0; i <= asp->treecache_num; i++) { - for (request = asp->treecache[i].requests_begin; request; -@@ -1535,39 +1539,48 @@ int - netsnmp_remove_delegated_requests_for_session(netsnmp_session *sess) - { - netsnmp_agent_session *asp; -- int count = 0; -+ int total_count = 0; - - for (asp = agent_delegated_list; asp; asp = asp->next) { - /* - * check each request - */ -+ int i; -+ int count = 0; - netsnmp_request_info *request; -- for(request = asp->requests; request; request = request->next) { -- /* -- * check session -- */ -- netsnmp_assert(NULL!=request->subtree); -- if(request->subtree->session != sess) -- continue; -+ for (i = 0; i <= asp->treecache_num; i++) { -+ for (request = asp->treecache[i].requests_begin; request; -+ request = request->next) { -+ /* -+ * check session -+ */ -+ netsnmp_assert(NULL!=request->subtree); -+ if(request->subtree->session != sess) -+ continue; - -- /* -- * matched! mark request as done -- */ -- netsnmp_request_set_error(request, SNMP_ERR_GENERR); -- ++count; -+ /* -+ * matched! mark request as done -+ */ -+ netsnmp_request_set_error(request, SNMP_ERR_GENERR); -+ ++count; -+ } -+ } -+ if (count) { -+ asp->flags |= SNMP_AGENT_FLAGS_CANCEL_IN_PROGRESS; -+ total_count += count; - } - } - - /* - * if we found any, that request may be finished now - */ -- if(count) { -+ if(total_count) { - DEBUGMSGTL(("snmp_agent", "removed %d delegated request(s) for session " -- "%8p\n", count, sess)); -- netsnmp_check_outstanding_agent_requests(); -+ "%8p\n", total_count, sess)); -+ netsnmp_check_delegated_requests(); - } - -- return count; -+ return total_count; - } - - int -@@ -2739,19 +2752,11 @@ handle_var_requests(netsnmp_agent_session *asp) - return final_status; - } - --/* -- * loop through our sessions known delegated sessions and check to see -- * if they've completed yet. If there are no more delegated sessions, -- * check for and process any queued requests -- */ - void --netsnmp_check_outstanding_agent_requests(void) -+netsnmp_check_delegated_requests(void) - { - netsnmp_agent_session *asp, *prev_asp = NULL, *next_asp = NULL; - -- /* -- * deal with delegated requests -- */ - for (asp = agent_delegated_list; asp; asp = next_asp) { - next_asp = asp->next; /* save in case we clean up asp */ - if (!netsnmp_check_for_delegated(asp)) { -@@ -2790,6 +2795,23 @@ netsnmp_check_outstanding_agent_requests(void) - prev_asp = asp; - } - } -+} -+ -+ -+/* -+ * loop through our sessions known delegated sessions and check to see -+ * if they've completed yet. If there are no more delegated sessions, -+ * check for and process any queued requests -+ */ -+void -+netsnmp_check_outstanding_agent_requests(void) -+{ -+ netsnmp_agent_session *asp; -+ -+ /* -+ * deal with delegated requests -+ */ -+ netsnmp_check_delegated_requests(); - - /* - * if we are processing a set and there are more delegated -@@ -2819,7 +2841,8 @@ netsnmp_check_outstanding_agent_requests(void) - - netsnmp_processing_set = netsnmp_agent_queued_list; - DEBUGMSGTL(("snmp_agent", "SET request remains queued while " -- "delegated requests finish, asp = %8p\n", asp)); -+ "delegated requests finish, asp = %8p\n", -+ agent_delegated_list)); - break; - } - #endif /* NETSNMP_NO_WRITE_SUPPORT */ -@@ -2880,6 +2903,10 @@ check_delayed_request(netsnmp_agent_session *asp) - case SNMP_MSG_GETBULK: - case SNMP_MSG_GETNEXT: - netsnmp_check_all_requests_status(asp, 0); -+ if (asp->flags & SNMP_AGENT_FLAGS_CANCEL_IN_PROGRESS) { -+ DEBUGMSGTL(("snmp_agent","canceling next walk for asp %p\n", asp)); -+ break; -+ } - handle_getnext_loop(asp); - if (netsnmp_check_for_delegated(asp) && - netsnmp_check_transaction_id(asp->pdu->transid) != -diff --git a/include/net-snmp/agent/snmp_agent.h b/include/net-snmp/agent/snmp_agent.h -index aad8837..43f4fff 100644 ---- a/include/net-snmp/agent/snmp_agent.h -+++ b/include/net-snmp/agent/snmp_agent.h -@@ -32,6 +32,9 @@ extern "C" { - #define SNMP_MAX_PDU_SIZE 64000 /* local constraint on PDU size sent by agent - * (see also SNMP_MAX_MSG_SIZE in snmp_api.h) */ - -+#define SNMP_AGENT_FLAGS_NONE 0x0 -+#define SNMP_AGENT_FLAGS_CANCEL_IN_PROGRESS 0x1 -+ - /* - * If non-zero, causes the addresses of peers to be logged when receptions - * occur. -@@ -205,6 +208,7 @@ extern "C" { - int treecache_num; /* number of current cache entries */ - netsnmp_cachemap *cache_store; - int vbcount; -+ int flags; - } netsnmp_agent_session; - - /* -@@ -240,6 +244,7 @@ extern "C" { - int init_master_agent(void); - void shutdown_master_agent(void); - int agent_check_and_process(int block); -+ void netsnmp_check_delegated_requests(void); - void netsnmp_check_outstanding_agent_requests(void); - - int netsnmp_request_set_error(netsnmp_request_info *request, --- -2.17.1 - diff --git a/src/snmpd/patch-5.9+dfsg/0007-Linux-VRF-5.7.3-Support.patch b/src/snmpd/patch-5.9+dfsg/0007-Linux-VRF-5.7.3-Support.patch deleted file mode 100755 index 48d13d7f62d..00000000000 --- a/src/snmpd/patch-5.9+dfsg/0007-Linux-VRF-5.7.3-Support.patch +++ /dev/null @@ -1,799 +0,0 @@ -From 49ce7fc078dfa8c1a1688e05de4e2d151dbcd76a Mon Sep 17 00:00:00 2001 -From: Harish Venkatraman -Date: Wed, 17 Oct 2018 15:22:04 -0700 -Subject: [PATCH] Linux-VRF 5.7.3 Support from https://sourceforge.net/p/net-snmp/patches/1376/ - -Sourceforge commits related to this consolidated patch are given below. -https://sourceforge.net/p/net-snmp/code/ci/0b637fea62c7b6dc467b94206d0bd2dec6f912ca/ -https://sourceforge.net/p/net-snmp/code/ci/19ba7b0a6b56d201a8563fe6505cd82e313c1c9c/ -https://sourceforge.net/p/net-snmp/code/ci/76336fb63bb74b4dede5dda5c14fb8cf2d60be8e/ -https://sourceforge.net/p/net-snmp/code/ci/c7398de4122102b3250e6dac7c09dbc5d09f1840/ -https://sourceforge.net/p/net-snmp/code/ci/0831ed64a39a34dc040eabe39d0229b07fa2a8a5/ -https://sourceforge.net/p/net-snmp/code/ci/62f6babcc7cfc54c79b442b8a7f45662b4ddc807/ -https://sourceforge.net/p/net-snmp/code/ci/313949522c4d0ddfeac72195fa63512955d9eb28/ - - -This consolidated patch adds native support for VRFs to snmpd. NCLU patches in this same -CCR will be added shortly. The VRF is specified for both listening -addresses as well as TRAP sinks with the 'ipaddr%iface' syntax: - -agentAddress 10.0.1.7%mgmt,22.22.22.22%red -trapsink 10.0.1.9%mgmt -trap2sink 22.22.22.25%red - -The SO_BINDTODEVICE socket option is used to bind a VRF to a particular -socket. - -Testing done included VRFs as well as non-VRF functionality with traps -(v1, v2, and v3) - ---- - agent/agent_trap.c | 20 ++++++++++-- - agent/mibgroup/agentx/master.c | 2 +- - agent/mibgroup/agentx/subagent.c | 2 +- - agent/mibgroup/target/target.c | 3 +- - agent/snmp_agent.c | 21 ++++++++++++- - apps/agentxtrap.c | 2 +- - apps/snmptrap.c | 2 +- - apps/snmptrapd.c | 2 +- - include/net-snmp/library/snmpTCPDomain.h | 2 +- - include/net-snmp/library/snmpUDPBaseDomain.h | 2 +- - include/net-snmp/library/snmpUDPDomain.h | 2 +- - include/net-snmp/library/snmpUDPIPv4BaseDomain.h | 2 +- - include/net-snmp/library/snmpUDPIPv6Domain.h | 2 +- - include/net-snmp/library/snmp_transport.h | 19 +++++++----- - snmplib/snmp_api.c | 4 +-- - snmplib/snmp_transport.c | 26 ++++++++-------- - snmplib/transports/snmpAliasDomain.c | 6 ++-- - snmplib/transports/snmpTCPDomain.c | 16 +++++++--- - snmplib/transports/snmpUDPBaseDomain.c | 39 ++++++++++++++++++------ - snmplib/transports/snmpUDPDomain.c | 15 ++++----- - snmplib/transports/snmpUDPIPv4BaseDomain.c | 4 +-- - snmplib/transports/snmpUDPIPv6Domain.c | 19 ++++----- - snmplib/transports/snmpUnixDomain.c | 5 +-- - 23 files changed, 141 insertions(+), 76 deletions(-) - -diff --git a/agent/agent_trap.c b/agent/agent_trap.c -index 080b8bf..c488ac9 100644 ---- a/agent/agent_trap.c -+++ b/agent/agent_trap.c -@@ -226,6 +226,7 @@ create_trap_session2(const char *sink, const char* sinkport, - { - netsnmp_transport *t; - netsnmp_session session, *sesp; -+ char *iface; - - memset(&session, 0, sizeof(netsnmp_session)); - session.version = version; -@@ -250,7 +251,14 @@ create_trap_session2(const char *sink, const char* sinkport, - ((0 == strcmp("localhost",sink)) || (0 == strcmp("127.0.0.1",sink)))) - session.localname = strdup("localhost"); - -- t = netsnmp_tdomain_transport_full("snmptrap", sink, 0, NULL, sinkport); -+ /* -+ * if given an iface (ip%iface) in sink, send the iface too -+ */ -+ iface = strchr(sink, '%'); -+ if (iface) -+ *iface++ = '\0'; -+ -+ t = netsnmp_tdomain_transport_full("snmptrap", sink, 0, NULL, sinkport, iface); - if (t != NULL) { - sesp = snmp_add(&session, t, NULL, NULL); - -@@ -1219,6 +1227,7 @@ snmpd_parse_config_trapsess(const char *word, char *cptr) - netsnmp_session session, *ss; - netsnmp_transport *transport; - size_t len; -+ char *iface; - - /* - * inform or trap? default to trap -@@ -1240,7 +1249,14 @@ snmpd_parse_config_trapsess(const char *word, char *cptr) - NETSNMP_PARSE_ARGS_NOLOGGING | - NETSNMP_PARSE_ARGS_NOZERO); - -- transport = netsnmp_transport_open_client("snmptrap", session.peername); -+ /* -+ * if iface is given in peer, we will need to bind to that iface -+ */ -+ iface = strchr(session.peername, '%'); -+ if (iface) -+ *iface++ = '\0'; -+ -+ transport = netsnmp_transport_open_client("snmptrap", session.peername, iface); - if (transport == NULL) { - config_perror("snmpd: failed to parse this line."); - return; -diff --git a/agent/mibgroup/agentx/master.c b/agent/mibgroup/agentx/master.c -index baeebaf..6733e7f 100644 ---- a/agent/mibgroup/agentx/master.c -+++ b/agent/mibgroup/agentx/master.c -@@ -126,7 +126,7 @@ real_init_master(void) - sess.remote_port = 0; - sess.callback = handle_master_agentx_packet; - errno = 0; -- t = netsnmp_transport_open_server("agentx", sess.peername); -+ t = netsnmp_transport_open_server("agentx", sess.peername, NULL); - if (t == NULL) { - /* - * diagnose snmp_open errors with the input netsnmp_session -diff --git a/agent/mibgroup/agentx/subagent.c b/agent/mibgroup/agentx/subagent.c -index 1f9d31c..6d38a34 100644 ---- a/agent/mibgroup/agentx/subagent.c -+++ b/agent/mibgroup/agentx/subagent.c -@@ -843,7 +843,7 @@ subagent_open_master_session(void) - - agentx_socket = netsnmp_ds_get_string(NETSNMP_DS_APPLICATION_ID, - NETSNMP_DS_AGENT_X_SOCKET); -- t = netsnmp_transport_open_client("agentx", agentx_socket); -+ t = netsnmp_transport_open_client("agentx", agentx_socket, NULL); - if (t == NULL) { - /* - * Diagnose snmp_open errors with the input -diff --git a/agent/mibgroup/target/target.c b/agent/mibgroup/target/target.c -index 5619e35..6f58817 100644 ---- a/agent/mibgroup/target/target.c -+++ b/agent/mibgroup/target/target.c -@@ -154,7 +154,8 @@ get_target_sessions(char *taglist, TargetFilterFunction * filterfunct, - tAddress, - targaddrs-> - tAddressLen, -- 0); -+ 0, -+ NULL); - if (t == NULL) { - DEBUGMSGTL(("target_sessions", - "bad dest \"")); -diff --git a/agent/snmp_agent.c b/agent/snmp_agent.c -index b96d650..281e8b2 100644 ---- a/agent/snmp_agent.c -+++ b/agent/snmp_agent.c -@@ -1270,6 +1270,7 @@ init_master_agent(void) - char *cptr; - char *buf = NULL; - char *st; -+ char *iface; - - /* default to a default cache size */ - netsnmp_set_lookup_cache_size(-1); -@@ -1318,6 +1319,9 @@ init_master_agent(void) - * AAL5PVC:itf.vpi.vci (if supported) - * IPX:[network]:node[/port] (if supported) - * -+ * -+ * New format to specify an interface for binding along with IP address -+ * address%iface - */ - - cptr = st; -@@ -1334,7 +1338,22 @@ init_master_agent(void) - "requested\n")); - break; - } -- transport = netsnmp_transport_open_server("snmp", cptr); -+ -+ /* -+ * at some point, we may want to add the special listendevice -+ * keyword support. Not sure how to interact with ip%iface -+ iface = netsnmp_ds_get_string(NETSNMP_DS_APPLICATION_ID, -+ NETSNMP_DS_AGENT_LISTEN_DEVICE); -+ */ -+ -+ /* Look for %iface so we can send along a specific interface to -+ setsockopt SO_BINDTODEVICE later. */ -+ iface = strchr(cptr, '%'); -+ if (iface) -+ *iface++ = '\0'; -+ -+ transport = netsnmp_transport_open_server("snmp", cptr, iface); -+ - - if (transport == NULL) { - snmp_log(LOG_ERR, "Error opening specified endpoint \"%s\"\n", -diff --git a/apps/agentxtrap.c b/apps/agentxtrap.c -index 4df423c..ebd81a3 100644 ---- a/apps/agentxtrap.c -+++ b/apps/agentxtrap.c -@@ -231,7 +231,7 @@ ConnectingEntry(UNUSED tState self) - - if(!(t = netsnmp_transport_open_client( - "agentx", netsnmp_ds_get_string( -- NETSNMP_DS_APPLICATION_ID, NETSNMP_DS_AGENT_X_SOCKET)))) { -+ NETSNMP_DS_APPLICATION_ID, NETSNMP_DS_AGENT_X_SOCKET), NULL))) { - snmp_log(LOG_ERR, "Failed to connect to AgentX server\n"); - change_state(&Exit); - } else if(!(sess = snmp_sess_add_ex( -diff --git a/apps/snmptrap.c b/apps/snmptrap.c -index 7c086db..28d5257 100644 ---- a/apps/snmptrap.c -+++ b/apps/snmptrap.c -@@ -215,7 +215,7 @@ main(int argc, char *argv[]) - } - - ss = snmp_add(&session, -- netsnmp_transport_open_client("snmptrap", session.peername), -+ netsnmp_transport_open_client("snmptrap", session.peername, NULL), - NULL, NULL); - if (ss == NULL) { - /* -diff --git a/apps/snmptrapd.c b/apps/snmptrapd.c -index bce0d47..122a502 100644 ---- a/apps/snmptrapd.c -+++ b/apps/snmptrapd.c -@@ -1186,7 +1186,7 @@ main(int argc, char *argv[]) - *sep = 0; - } - -- transport = netsnmp_transport_open_server("snmptrap", cp); -+ transport = netsnmp_transport_open_server("snmptrap", cp, NULL); - if (transport == NULL) { - snmp_log(LOG_ERR, "couldn't open %s -- errno %d (\"%s\")\n", - cp, errno, strerror(errno)); -diff --git a/include/net-snmp/library/snmpTCPDomain.h b/include/net-snmp/library/snmpTCPDomain.h -index c45856b..3b1fef5 100644 ---- a/include/net-snmp/library/snmpTCPDomain.h -+++ b/include/net-snmp/library/snmpTCPDomain.h -@@ -25,7 +25,7 @@ extern "C" { - #define TRANSPORT_DOMAIN_TCP_IP 1,3,6,1,2,1,100,1,5 - NETSNMP_IMPORT oid netsnmp_snmpTCPDomain[]; - --netsnmp_transport *netsnmp_tcp_transport(struct sockaddr_in *addr, int local); -+netsnmp_transport *netsnmp_tcp_transport(struct sockaddr_in *addr, int local, char *iface); - - /* - * "Constructor" for transport domain object. -diff --git a/include/net-snmp/library/snmpUDPBaseDomain.h b/include/net-snmp/library/snmpUDPBaseDomain.h -index b9d2c34..0ab2fe5 100644 ---- a/include/net-snmp/library/snmpUDPBaseDomain.h -+++ b/include/net-snmp/library/snmpUDPBaseDomain.h -@@ -18,7 +18,7 @@ extern "C" { - /* - * Prototypes - */ -- void _netsnmp_udp_sockopt_set(int fd, int local); -+ void _netsnmp_udp_sockopt_set(int fd, int local, char *iface); - int netsnmp_udpbase_recv(netsnmp_transport *t, void *buf, int size, - void **opaque, int *olength); - int netsnmp_udpbase_send(netsnmp_transport *t, void *buf, int size, -diff --git a/include/net-snmp/library/snmpUDPDomain.h b/include/net-snmp/library/snmpUDPDomain.h -index 3a09dfd..e402cd8 100644 ---- a/include/net-snmp/library/snmpUDPDomain.h -+++ b/include/net-snmp/library/snmpUDPDomain.h -@@ -18,7 +18,7 @@ extern "C" { - config_require(UDPIPv4Base) - #include - --netsnmp_transport *netsnmp_udp_transport(struct sockaddr_in *addr, int local); -+netsnmp_transport *netsnmp_udp_transport(struct sockaddr_in *addr, int local, char*iface); - - - /* -diff --git a/include/net-snmp/library/snmpUDPIPv4BaseDomain.h b/include/net-snmp/library/snmpUDPIPv4BaseDomain.h -index 6f7f2c2..8d3e906 100644 ---- a/include/net-snmp/library/snmpUDPIPv4BaseDomain.h -+++ b/include/net-snmp/library/snmpUDPIPv4BaseDomain.h -@@ -25,7 +25,7 @@ extern "C" { - */ - - netsnmp_transport *netsnmp_udpipv4base_transport(struct sockaddr_in *addr, -- int local); -+ int local, char *iface); - - #if defined(HAVE_IP_PKTINFO) || defined(HAVE_IP_RECVDSTADDR) - int netsnmp_udpipv4_recvfrom(int s, void *buf, int len, -diff --git a/include/net-snmp/library/snmpUDPIPv6Domain.h b/include/net-snmp/library/snmpUDPIPv6Domain.h -index 83eba2c..009c510 100644 ---- a/include/net-snmp/library/snmpUDPIPv6Domain.h -+++ b/include/net-snmp/library/snmpUDPIPv6Domain.h -@@ -23,7 +23,7 @@ config_require(UDPBase) - NETSNMP_IMPORT oid netsnmp_UDPIPv6Domain[]; - - netsnmp_transport *netsnmp_udp6_transport(struct sockaddr_in6 *addr, -- int local); -+ int local, char *iface); - - - /* -diff --git a/include/net-snmp/library/snmp_transport.h b/include/net-snmp/library/snmp_transport.h -index 4162897..a3deda7 100644 ---- a/include/net-snmp/library/snmp_transport.h -+++ b/include/net-snmp/library/snmp_transport.h -@@ -206,14 +206,14 @@ typedef struct netsnmp_tdomain_s { - * The f_create_from_tstring field is deprecated, please do not use it - * for new code and try to migrate old code away from using it. - */ -- netsnmp_transport *(*f_create_from_tstring) (const char *, int); -+ netsnmp_transport *(*f_create_from_tstring) (const char *, int, char *); - -- netsnmp_transport *(*f_create_from_ostring) (const u_char *, size_t, int); -+ netsnmp_transport *(*f_create_from_ostring) (const u_char *, size_t, int, char *); - - struct netsnmp_tdomain_s *next; - - netsnmp_transport *(*f_create_from_tstring_new) (const char *, int, -- const char*); -+ const char*, char *); - - } netsnmp_tdomain; - -@@ -273,29 +273,32 @@ void netsnmp_tdomain_init(void); - NETSNMP_IMPORT - netsnmp_transport *netsnmp_tdomain_transport(const char *str, - int local, -- const char *default_domain); -+ const char *default_domain, -+ char *iface); - - NETSNMP_IMPORT - netsnmp_transport *netsnmp_tdomain_transport_full(const char *application, - const char *str, - int local, - const char *default_domain, -- const char *default_target); -+ const char *default_target, -+ char *iface); - - NETSNMP_IMPORT - netsnmp_transport *netsnmp_tdomain_transport_oid(const oid * dom, - size_t dom_len, - const u_char * o, - size_t o_len, -- int local); -+ int local, -+ char *iface); - - NETSNMP_IMPORT - netsnmp_transport* --netsnmp_transport_open_client(const char* application, const char* str); -+netsnmp_transport_open_client(const char* application, const char* str, char *iface); - - NETSNMP_IMPORT - netsnmp_transport* --netsnmp_transport_open_server(const char* application, const char* str); -+netsnmp_transport_open_server(const char* application, const char* str, char *iface); - - netsnmp_transport* - netsnmp_transport_open(const char* application, const char* str, int local); -diff --git a/snmplib/snmp_api.c b/snmplib/snmp_api.c -index d155c99..5128c56 100644 ---- a/snmplib/snmp_api.c -+++ b/snmplib/snmp_api.c -@@ -1557,12 +1557,12 @@ _sess_open(netsnmp_session * in_session) - transport = - netsnmp_tdomain_transport_full("snmp", in_session->peername, - in_session->local_port, "tcp,tcp6", -- NULL); -+ NULL, NULL); - } else { - transport = - netsnmp_tdomain_transport_full("snmp", in_session->peername, - in_session->local_port, "udp,udp6", -- NULL); -+ NULL, NULL); - } - - if (NULL != clientaddr_save) -diff --git a/snmplib/snmp_transport.c b/snmplib/snmp_transport.c -index ada4781..40cd631 100644 ---- a/snmplib/snmp_transport.c -+++ b/snmplib/snmp_transport.c -@@ -491,7 +491,8 @@ netsnmp_transport * - netsnmp_tdomain_transport_full(const char *application, - const char *str, int local, - const char *default_domain, -- const char *default_target) -+ const char *default_target, -+ char *iface) - { - netsnmp_tdomain *match = NULL; - const char *addr = NULL; -@@ -646,10 +647,10 @@ netsnmp_tdomain_transport_full(const char *application, - NETSNMP_LOGONCE((LOG_WARNING, - "transport domain %s uses deprecated f_create_from_tstring\n", - match->prefix[0])); -- t = match->f_create_from_tstring(addr, local); -+ t = match->f_create_from_tstring(addr, local, iface); - } - else -- t = match->f_create_from_tstring_new(addr, local, addr2); -+ t = match->f_create_from_tstring_new(addr, local, addr2, iface); - if (t) { - if (lspec) { - free(lspec[0]); -@@ -676,10 +677,11 @@ netsnmp_tdomain_transport_full(const char *application, - - netsnmp_transport * - netsnmp_tdomain_transport(const char *str, int local, -- const char *default_domain) -+ const char *default_domain, -+ char *iface) - { - return netsnmp_tdomain_transport_full("snmp", str, local, default_domain, -- NULL); -+ NULL, iface); - } - - -@@ -687,7 +689,7 @@ netsnmp_tdomain_transport(const char *str, int local, - netsnmp_transport * - netsnmp_tdomain_transport_oid(const oid * dom, - size_t dom_len, -- const u_char * o, size_t o_len, int local) -+ const u_char * o, size_t o_len, int local, char *iface) - { - netsnmp_tdomain *d; - int i; -@@ -700,7 +702,7 @@ netsnmp_tdomain_transport_oid(const oid * dom, - for (i = 0; d->prefix[i] != NULL; i++) { - if (netsnmp_oid_equals(dom, dom_len, d->name, d->name_length) == - 0) { -- return d->f_create_from_ostring(o, o_len, local); -+ return d->f_create_from_ostring(o, o_len, local, iface); - } - } - } -@@ -713,19 +715,19 @@ netsnmp_tdomain_transport_oid(const oid * dom, - netsnmp_transport* - netsnmp_transport_open(const char* application, const char* str, int local) - { -- return netsnmp_tdomain_transport_full(application, str, local, NULL, NULL); -+ return netsnmp_tdomain_transport_full(application, str, local, NULL, NULL, NULL); - } - - netsnmp_transport* --netsnmp_transport_open_server(const char* application, const char* str) -+netsnmp_transport_open_server(const char* application, const char* str, char *iface) - { -- return netsnmp_tdomain_transport_full(application, str, 1, NULL, NULL); -+ return netsnmp_tdomain_transport_full(application, str, 1, NULL, NULL, iface); - } - - netsnmp_transport* --netsnmp_transport_open_client(const char* application, const char* str) -+netsnmp_transport_open_client(const char* application, const char* str, char *iface) - { -- return netsnmp_tdomain_transport_full(application, str, 0, NULL, NULL); -+ return netsnmp_tdomain_transport_full(application, str, 0, NULL, NULL, iface); - } - - /** adds a transport to a linked list of transports. -diff --git a/snmplib/transports/snmpAliasDomain.c b/snmplib/transports/snmpAliasDomain.c -index eb50cad..dd7a007 100644 ---- a/snmplib/transports/snmpAliasDomain.c -+++ b/snmplib/transports/snmpAliasDomain.c -@@ -75,7 +75,7 @@ free_alias_config(void) { - - netsnmp_transport * - netsnmp_alias_create_tstring(const char *str, int local, -- const char *default_target) -+ const char *default_target, char *iface) - { - const char *aliasdata; - -@@ -85,13 +85,13 @@ netsnmp_alias_create_tstring(const char *str, int local, - return NULL; - } - -- return netsnmp_tdomain_transport(aliasdata,local,default_target); -+ return netsnmp_tdomain_transport(aliasdata,local,default_target, iface); - } - - - - netsnmp_transport * --netsnmp_alias_create_ostring(const u_char * o, size_t o_len, int local) -+netsnmp_alias_create_ostring(const u_char * o, size_t o_len, int local, char *iface) - { - fprintf(stderr, "make ostring\n"); - return NULL; -diff --git a/snmplib/transports/snmpTCPDomain.c b/snmplib/transports/snmpTCPDomain.c -index 7feb028..6eb717e 100644 ---- a/snmplib/transports/snmpTCPDomain.c -+++ b/snmplib/transports/snmpTCPDomain.c -@@ -144,7 +144,7 @@ netsnmp_tcp_accept(netsnmp_transport *t) - */ - - netsnmp_transport * --netsnmp_tcp_transport(struct sockaddr_in *addr, int local) -+netsnmp_tcp_transport(struct sockaddr_in *addr, int local, char *iface) - { - netsnmp_transport *t = NULL; - netsnmp_udp_addr_pair *addr_pair = NULL; -@@ -212,6 +212,11 @@ netsnmp_tcp_transport(struct sockaddr_in *addr, int local) - * We should set SO_REUSEADDR too. - */ - -+ if (iface && setsockopt(t->sock, SOL_SOCKET, SO_BINDTODEVICE, -+ iface, strlen(iface)) == -1) -+ snmp_log(LOG_ERR, "Bind interface %s to socket: %s\n", -+ iface, strerror(errno)); -+ - setsockopt(t->sock, SOL_SOCKET, SO_REUSEADDR, (void *)&opt, - sizeof(opt)); - -@@ -305,12 +310,13 @@ netsnmp_tcp_transport(struct sockaddr_in *addr, int local) - - netsnmp_transport * - netsnmp_tcp_create_tstring(const char *str, int local, -- const char *default_target) -+ const char *default_target, -+ char *iface) - { - struct sockaddr_in addr; - - if (netsnmp_sockaddr_in2(&addr, str, default_target)) { -- return netsnmp_tcp_transport(&addr, local); -+ return netsnmp_tcp_transport(&addr, local, iface); - } else { - return NULL; - } -@@ -319,7 +325,7 @@ netsnmp_tcp_create_tstring(const char *str, int local, - - - netsnmp_transport * --netsnmp_tcp_create_ostring(const u_char * o, size_t o_len, int local) -+netsnmp_tcp_create_ostring(const u_char * o, size_t o_len, int local, char *iface) - { - struct sockaddr_in addr; - -@@ -328,7 +334,7 @@ netsnmp_tcp_create_ostring(const u_char * o, size_t o_len, int local) - addr.sin_family = AF_INET; - memcpy((u_char *) & (addr.sin_addr.s_addr), o, 4); - addr.sin_port = htons(porttmp); -- return netsnmp_tcp_transport(&addr, local); -+ return netsnmp_tcp_transport(&addr, local, iface); - } - return NULL; - } -diff --git a/snmplib/transports/snmpUDPBaseDomain.c b/snmplib/transports/snmpUDPBaseDomain.c -index 8497f71..7b415bc 100644 ---- a/snmplib/transports/snmpUDPBaseDomain.c -+++ b/snmplib/transports/snmpUDPBaseDomain.c -@@ -21,6 +21,9 @@ - #if HAVE_NETINET_IN_H - #include - #endif -+#if HAVE_NET_IF_H -+#include -+#endif - #if HAVE_ARPA_INET_H - #include - #endif -@@ -53,8 +56,14 @@ - #endif - - void --_netsnmp_udp_sockopt_set(int fd, int local) -+_netsnmp_udp_sockopt_set(int fd, int local, char *iface) - { -+ -+ if (iface && setsockopt(fd, SOL_SOCKET, SO_BINDTODEVICE, iface, strlen(iface)) == -1) -+ snmp_log(LOG_ERR, "Bind socket on interface: %s: %s\n", iface, strerror(errno)); -+ else if (iface) -+ DEBUGMSGTL(("socket:option", "setting SO_BINDTODEVICE to %s\n", iface)); -+ - #ifdef SO_BSDCOMPAT - /* - * Patch for Linux. Without this, UDP packets that fail get an ICMP -@@ -237,7 +246,10 @@ int netsnmp_udpbase_sendto(int fd, struct in_addr *srcip, int if_index, - struct msghdr m = { 0 }; - char cmsg[CMSG_SPACE(cmsg_data_size)]; - int rc; -- -+ char iface[IFNAMSIZ]; -+ socklen_t ifacelen = IFNAMSIZ; -+ -+ iface[0] = '\0'; - iov.iov_base = data; - iov.iov_len = len; - -@@ -269,14 +281,23 @@ int netsnmp_udpbase_sendto(int fd, struct in_addr *srcip, int if_index, - - memset(&ipi, 0, sizeof(ipi)); - /* -- * Except in the case of responding -- * to a broadcast, setting the ifindex -- * when responding results in incorrect -- * behavior of changing the source address -- * that the manager sees the response -- * come from. -+ * For asymmetric multihomed users, we only set ifindex to 0 -+ * to let kernel handle return if there was no iface bound to the socket. - */ -- ipi.ipi_ifindex = 0; -+ if (getsockopt(fd, SOL_SOCKET, SO_BINDTODEVICE, iface, &ifacelen) != 0) { -+ DEBUGMSGTL(("socket:option", "error getsockopt %s\n", strerror(errno))); -+ DEBUGMSGTL(("socket:option", "sendto: SO_BINDTODEVICE not set ifindex=0\n")); -+ ipi.ipi_ifindex = 0; -+ } else if (!ifacelen) { -+ DEBUGMSGTL(("socket:option", "sendto: SO_BINDTODEVICE not set ifacelen=%d ifindex=0\n", -+ ifacelen)); -+ ipi.ipi_ifindex = 0; -+ } else { -+ DEBUGMSGTL(("socket:option", "sendto: SO_BINDTODEVICE dev=%s using ifindex=%d\n", -+ iface, if_index)); -+ ipi.ipi_ifindex = if_index; -+ } -+ - #if defined(cygwin) - ipi.ipi_addr.s_addr = srcip->s_addr; - #else -diff --git a/snmplib/transports/snmpUDPDomain.c b/snmplib/transports/snmpUDPDomain.c -index a0abd8c..fc68303 100644 ---- a/snmplib/transports/snmpUDPDomain.c -+++ b/snmplib/transports/snmpUDPDomain.c -@@ -84,7 +84,7 @@ typedef netsnmp_indexed_addr_pair netsnmp_udp_addr_pair; - * not static, since snmpUDPIPv6Domain needs it, but not public, either. - * (ie don't put it in a public header.) - */ --void _netsnmp_udp_sockopt_set(int fd, int server); -+void _netsnmp_udp_sockopt_set(int fd, int server, char *iface); - int - netsnmp_sockaddr_in2(struct sockaddr_in *addr, - const char *inpeername, const char *default_target); -@@ -125,11 +125,11 @@ int netsnmp_udp_sendto(int fd, struct in_addr *srcip, int if_index, struct socka - */ - - netsnmp_transport * --netsnmp_udp_transport(struct sockaddr_in *addr, int local) -+netsnmp_udp_transport(struct sockaddr_in *addr, int local, char *iface) - { - netsnmp_transport *t = NULL; - -- t = netsnmp_udpipv4base_transport(addr, local); -+ t = netsnmp_udpipv4base_transport(addr, local, iface); - if (NULL == t) { - return NULL; - } -@@ -473,12 +473,13 @@ netsnmp_udp_getSecName(void *opaque, int olength, - - netsnmp_transport * - netsnmp_udp_create_tstring(const char *str, int local, -- const char *default_target) -+ const char *default_target, -+ char *iface) - { - struct sockaddr_in addr; - - if (netsnmp_sockaddr_in2(&addr, str, default_target)) { -- return netsnmp_udp_transport(&addr, local); -+ return netsnmp_udp_transport(&addr, local, iface); - } else { - return NULL; - } -@@ -486,7 +487,7 @@ netsnmp_udp_create_tstring(const char *str, int local, - - - netsnmp_transport * --netsnmp_udp_create_ostring(const u_char * o, size_t o_len, int local) -+netsnmp_udp_create_ostring(const u_char * o, size_t o_len, int local, char *iface) - { - struct sockaddr_in addr; - -@@ -495,7 +496,7 @@ netsnmp_udp_create_ostring(const u_char * o, size_t o_len, int local) - addr.sin_family = AF_INET; - memcpy((u_char *) & (addr.sin_addr.s_addr), o, 4); - addr.sin_port = htons(porttmp); -- return netsnmp_udp_transport(&addr, local); -+ return netsnmp_udp_transport(&addr, local, iface); - } - return NULL; - } -diff --git a/snmplib/transports/snmpUDPIPv4BaseDomain.c b/snmplib/transports/snmpUDPIPv4BaseDomain.c -index 8c0fb05..7991b6a 100644 ---- a/snmplib/transports/snmpUDPIPv4BaseDomain.c -+++ b/snmplib/transports/snmpUDPIPv4BaseDomain.c -@@ -57,7 +57,7 @@ int netsnmp_udpipv4_sendto(int fd, struct in_addr *srcip, int if_index, - #endif /* HAVE_IP_PKTINFO || HAVE_IP_RECVDSTADDR */ - - netsnmp_transport * --netsnmp_udpipv4base_transport(struct sockaddr_in *addr, int local) -+netsnmp_udpipv4base_transport(struct sockaddr_in *addr, int local, char *iface) - { - netsnmp_transport *t = NULL; - int rc = 0, rc2; -@@ -95,7 +95,7 @@ netsnmp_udpipv4base_transport(struct sockaddr_in *addr, int local) - return NULL; - } - -- _netsnmp_udp_sockopt_set(t->sock, local); -+ _netsnmp_udp_sockopt_set(t->sock, local, iface); - - if (local) { - #ifndef NETSNMP_NO_LISTEN_SUPPORT -diff --git a/snmplib/transports/snmpUDPIPv6Domain.c b/snmplib/transports/snmpUDPIPv6Domain.c -index 18de876..6b44b22 100644 ---- a/snmplib/transports/snmpUDPIPv6Domain.c -+++ b/snmplib/transports/snmpUDPIPv6Domain.c -@@ -74,12 +74,6 @@ oid netsnmp_UDPIPv6Domain[] = { TRANSPORT_DOMAIN_UDP_IPV6 }; - static netsnmp_tdomain udp6Domain; - - /* -- * from snmpUDPDomain. not static, but not public, either. -- * (ie don't put it in a public header.) -- */ --extern void _netsnmp_udp_sockopt_set(int fd, int server); -- --/* - * Return a string representing the address in data, or else the "far end" - * address if data is NULL. - */ -@@ -186,7 +186,7 @@ netsnmp_udp6_send(netsnmp_transport *t, void *buf, int size, - */ - - netsnmp_transport * --netsnmp_udp6_transport(struct sockaddr_in6 *addr, int local) -+netsnmp_udp6_transport(struct sockaddr_in6 *addr, int local, char *iface) - { - netsnmp_transport *t = NULL; - int rc = 0; -@@ -223,7 +223,7 @@ netsnmp_udp6_transport(struct sockaddr_in6 *addr, int local) - return NULL; - } - -- _netsnmp_udp_sockopt_set(t->sock, local); -+ _netsnmp_udp_sockopt_set(t->sock, local, iface); - - if (local) { - #ifndef NETSNMP_NO_LISTEN_SUPPORT -@@ -724,12 +724,13 @@ netsnmp_udp6_getSecName(void *opaque, int olength, - - netsnmp_transport * - netsnmp_udp6_create_tstring(const char *str, int local, -- const char *default_target) -+ const char *default_target, -+ char *iface) - { - struct sockaddr_in6 addr; - - if (netsnmp_sockaddr_in6_2(&addr, str, default_target)) { -- return netsnmp_udp6_transport(&addr, local); -+ return netsnmp_udp6_transport(&addr, local, iface); - } else { - return NULL; - } -@@ -746,7 +747,7 @@ netsnmp_udp6_create_tstring(const char *str, int local, - */ - - netsnmp_transport * --netsnmp_udp6_create_ostring(const u_char * o, size_t o_len, int local) -+netsnmp_udp6_create_ostring(const u_char * o, size_t o_len, int local, char *iface) - { - struct sockaddr_in6 addr; - -@@ -755,7 +756,7 @@ netsnmp_udp6_create_ostring(const u_char * o, size_t o_len, int local) - addr.sin6_family = AF_INET6; - memcpy((u_char *) & (addr.sin6_addr.s6_addr), o, 16); - addr.sin6_port = htons((o[16] << 8) + o[17]); -- return netsnmp_udp6_transport(&addr, local); -+ return netsnmp_udp6_transport(&addr, local, iface); - } - return NULL; - } -diff --git a/snmplib/transports/snmpUnixDomain.c b/snmplib/transports/snmpUnixDomain.c -index 47dffc1..af56c5d 100644 ---- a/snmplib/transports/snmpUnixDomain.c -+++ b/snmplib/transports/snmpUnixDomain.c -@@ -450,7 +450,8 @@ netsnmp_unix_transport(struct sockaddr_un *addr, int local) - - netsnmp_transport * - netsnmp_unix_create_tstring(const char *string, int local, -- const char *default_target) -+ const char *default_target, -+ char *iface) - { - struct sockaddr_un addr; - -@@ -476,7 +477,7 @@ netsnmp_unix_create_tstring(const char *string, int local, - - - netsnmp_transport * --netsnmp_unix_create_ostring(const u_char * o, size_t o_len, int local) -+netsnmp_unix_create_ostring(const u_char * o, size_t o_len, int local, char *iface) - { - struct sockaddr_un addr; - --- -2.7.4 - diff --git a/src/snmpd/patch-5.9+dfsg/0008-Enable-macro-DEB_BUILD_ARCH_OS-in-order-to-build-ipv.patch b/src/snmpd/patch-5.9+dfsg/0008-Enable-macro-DEB_BUILD_ARCH_OS-in-order-to-build-ipv.patch deleted file mode 100644 index 29ab551c7a1..00000000000 --- a/src/snmpd/patch-5.9+dfsg/0008-Enable-macro-DEB_BUILD_ARCH_OS-in-order-to-build-ipv.patch +++ /dev/null @@ -1,22 +0,0 @@ -From 6e038423d7a3269dbfd85b3d7ada6015479f1559 Mon Sep 17 00:00:00 2001 -From: Qi Luo -Date: Fri, 20 Sep 2019 00:42:19 +0000 -Subject: [PATCH] Enable macro DEB_BUILD_ARCH_OS in order to build ipv6 feature - ---- - debian/rules | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/debian/rules b/debian/rules -index 4c3b5b6..1fab6a4 100755 ---- a/debian/rules -+++ b/debian/rules -@@ -4,4 +4,5 @@ - export DEB_BUILD_MAINT_OPTIONS := hardening=+all - DEB_HOST_MULTIARCH ?= $(shell dpkg-architecture -qDEB_HOST_MULTIARCH) -+DEB_BUILD_ARCH_OS ?= $(shell dpkg-architecture -qDEB_BUILD_ARCH_OS) - - LIB_VERSION = 40 --- -2.18.0 - diff --git a/src/snmpd/patch-5.9+dfsg/0009-Makefile.in-agent-Makefile.in-Fix-parallel-compilati.patch b/src/snmpd/patch-5.9+dfsg/0009-Makefile.in-agent-Makefile.in-Fix-parallel-compilati.patch deleted file mode 100644 index 6be4d86b5f4..00000000000 --- a/src/snmpd/patch-5.9+dfsg/0009-Makefile.in-agent-Makefile.in-Fix-parallel-compilati.patch +++ /dev/null @@ -1,40 +0,0 @@ -From 855e1c28dad53d6263c6c0c302438d2dc3128cc5 Mon Sep 17 00:00:00 2001 -From: Bart Van Assche -Date: Wed, 14 Apr 2021 09:35:24 -0700 -Subject: [PATCH] Makefile.in, agent/Makefile.in: Fix parallel compilation - -See also https://github.com/net-snmp/net-snmp/issues/283 . ---- - Makefile.in | 2 +- - agent/Makefile.in | 2 +- - 2 files changed, 2 insertions(+), 2 deletions(-) - -diff --git a/Makefile.in b/Makefile.in -index ed729604fc..3271823143 100644 ---- a/Makefile.in -+++ b/Makefile.in -@@ -179,7 +179,7 @@ perlmodules: perlmakefiles subdirs - - perlmakefiles: perl/Makefile net-snmp-config-x - --perl/Makefile: perl/Makefile.PL -+perl/Makefile: perl/Makefile.PL subdirs - dir=`pwd` && \ - cd perl && \ - if false; then \ -diff --git a/agent/Makefile.in b/agent/Makefile.in -index b5d692d7fe..3dab06eabd 100644 ---- a/agent/Makefile.in -+++ b/agent/Makefile.in -@@ -303,7 +303,7 @@ libnetsnmpagent.$(LIB_EXTENSION)$(LIB_VERSION): ${LLIBAGENTOBJS} $(USELIBS) - $(LIB_LD_CMD) $(AGENTLIB) ${LLIBAGENTOBJS} $(USELIBS) ${LAGENTLIBS} @LD_NO_UNDEFINED@ $(LDFLAGS) $(PERLLDOPTS_FOR_LIBS) @AGENTLIBS@ - $(RANLIB) $(AGENTLIB) - --libnetsnmpmibs.$(LIB_EXTENSION)$(LIB_VERSION): ${LMIBOBJS} $(AGENTLIB) $(USELIBS) -+libnetsnmpmibs.$(LIB_EXTENSION)$(LIB_VERSION): ${LMIBOBJS} $(AGENTLIB) $(USELIBS) subdirs - $(LIB_LD_CMD) $(MIBLIB) ${LMIBOBJS} $(AGENTLIB) $(USELIBS) @LD_NO_UNDEFINED@ $(LDFLAGS) ${LMIBLIBS} $(PERLLDOPTS_FOR_LIBS) @AGENTLIBS@ - $(RANLIB) $(MIBLIB) - --- -2.34.1 - diff --git a/src/snmpd/patch-5.9+dfsg/0010-Makefile.in-Make-sure-that-sedscript-is-built-before.patch b/src/snmpd/patch-5.9+dfsg/0010-Makefile.in-Make-sure-that-sedscript-is-built-before.patch deleted file mode 100644 index 57c18750f47..00000000000 --- a/src/snmpd/patch-5.9+dfsg/0010-Makefile.in-Make-sure-that-sedscript-is-built-before.patch +++ /dev/null @@ -1,41 +0,0 @@ -From 9ea3d8b93c9bb7da7fea13ee6c92356a6b82a5fb Mon Sep 17 00:00:00 2001 -From: Bart Van Assche -Date: Wed, 14 Apr 2021 20:03:15 -0700 -Subject: [PATCH] Makefile.in: Make sure that 'sedscript' is built before - subdirectories - -This is a follow-up for commit 855e1c28dad5 ("Makefile.in, agent/Makefile.in: -Fix parallel compilation"). ---- - Makefile.in | 1 + - Makefile.rules | 2 +- - 2 files changed, 2 insertions(+), 1 deletion(-) - -diff --git a/Makefile.in b/Makefile.in -index 3271823143..f1cbbf5ca3 100644 ---- a/Makefile.in -+++ b/Makefile.in -@@ -6,6 +6,7 @@ - VPATH = @srcdir@ - - SUBDIRS = snmplib @MAINSUBS@ -+SUBDIRDEPS = sedscript - FTSUBDIRS = @FTMAINSUBS@ snmplib - TESTDIRS = testing - -diff --git a/Makefile.rules b/Makefile.rules -index 92082e5429..100e0011ee 100644 ---- a/Makefile.rules -+++ b/Makefile.rules -@@ -70,7 +70,7 @@ cleanfeaturessubdirs: - > $(top_builddir)/include/net-snmp/feature-details.h - $(FEATURECHECK) --feature-global $(top_builddir)/include/net-snmp/feature-details.h $(mysubdir) $< $@ $(CC) -E $(CPPFLAGS) $(CFLAGS) -c - --subdirs: -+subdirs: $(SUBDIRDEPS) - @if test "$(SUBDIRS)" != ""; then \ - it="$(SUBDIRS)" ; \ - for i in $$it ; do \ --- -2.34.1 - diff --git a/src/snmpd/patch-5.9+dfsg/0011-agent-Makefile.in-Build-the-MIB-module-code-once.patch b/src/snmpd/patch-5.9+dfsg/0011-agent-Makefile.in-Build-the-MIB-module-code-once.patch deleted file mode 100644 index b9d70d1e1ec..00000000000 --- a/src/snmpd/patch-5.9+dfsg/0011-agent-Makefile.in-Build-the-MIB-module-code-once.patch +++ /dev/null @@ -1,46 +0,0 @@ -From 51128ad095074488992982fa23ae641f7c7be4ae Mon Sep 17 00:00:00 2001 -From: Bart Van Assche -Date: Sun, 11 Jul 2021 14:40:56 -0700 -Subject: [PATCH] agent/Makefile.in: Build the MIB module code once - -Fixes: 91033077790c ("remake make's Makefile's to make better making") -Signed-off-by: Srivalli231@github.com -[bvanassche: added patch description] ---- - agent/Makefile.in | 13 ++++++++----- - 1 file changed, 8 insertions(+), 5 deletions(-) - -diff --git a/agent/Makefile.in b/agent/Makefile.in -index 634e912b8c..047d880bf4 100644 ---- a/agent/Makefile.in -+++ b/agent/Makefile.in -@@ -15,8 +15,8 @@ mysubdir=agent - # - # what to install - # --SUBDIRS=helpers mibgroup --FTSUBDIRS=mibgroup helpers -+SUBDIRS=helpers -+FTSUBDIRS=helpers - - INSTALLSBINPROGS= @SNMPD@ - INSTALLLIBS = libnetsnmpagent.$(LIB_EXTENSION)$(LIB_VERSION) -@@ -273,9 +273,12 @@ FTAGENTOBJS=snmpd.ft @other_ftagentobjs@ - # - # Define OBJS and LOBJS for clean target (just this directory) - # --OBJS = $(LIBAGENTOBJS) $(AGENTOBJS) mib_modules.o auto_nlist.o --LOBJS = $(LLIBAGENTOBJS) $(LAGENTOBJS) mib_modules.lo auto_nlist.lo --FTOBJS = $(LLIBAGENTFTS) $(FTAGENTOBJS) mib_modules.ft auto_nlist.ft -+OBJS = $(LIBAGENTOBJS) $(MIBOBJS) $(AGENTOBJS) \ -+ mib_modules.o auto_nlist.o -+LOBJS = $(LLIBAGENTOBJS) $(LMIBOBJS) $(LAGENTOBJS) \ -+ mib_modules.lo auto_nlist.lo -+FTOBJS = $(LLIBAGENTFTS) $(FTMIBOBJS) $(FTAGENTOBJS) \ -+ mib_modules.ft auto_nlist.ft - - FEATUREFILE = $(top_builddir)/include/net-snmp/agent/features.h - --- -2.34.1 - diff --git a/src/snmpd/patch-5.9+dfsg/0012-agent-Makefile.in-Unbreak-the-enable-minimalist-buil.patch b/src/snmpd/patch-5.9+dfsg/0012-agent-Makefile.in-Unbreak-the-enable-minimalist-buil.patch deleted file mode 100644 index b2f3d5c657b..00000000000 --- a/src/snmpd/patch-5.9+dfsg/0012-agent-Makefile.in-Unbreak-the-enable-minimalist-buil.patch +++ /dev/null @@ -1,30 +0,0 @@ -From 51f315046a0bec13934930edde9c145b31bf7d53 Mon Sep 17 00:00:00 2001 -From: Bart Van Assche -Date: Sun, 24 Jul 2022 16:45:05 -0700 -Subject: [PATCH] agent/Makefile.in: Unbreak the --enable-minimalist build - -Build the features rules in the mibgroup directory before building the -features rules in the helpers directory. - -Fixes: 51128ad09507 ("agent/Makefile.in: Build the MIB module code once") -Fixes: https://github.com/net-snmp/net-snmp/issues/438 ---- - agent/Makefile.in | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/agent/Makefile.in b/agent/Makefile.in -index 047d880bf4..44f8818d29 100644 ---- a/agent/Makefile.in -+++ b/agent/Makefile.in -@@ -16,7 +16,7 @@ mysubdir=agent - # what to install - # - SUBDIRS=helpers --FTSUBDIRS=helpers -+FTSUBDIRS=mibgroup helpers - - INSTALLSBINPROGS= @SNMPD@ - INSTALLLIBS = libnetsnmpagent.$(LIB_EXTENSION)$(LIB_VERSION) --- -2.34.1 - diff --git a/src/snmpd/patch-5.9+dfsg/0013-enable-parallel-build-for-net-snmp.patch b/src/snmpd/patch-5.9+dfsg/0013-enable-parallel-build-for-net-snmp.patch deleted file mode 100644 index 10d3746964e..00000000000 --- a/src/snmpd/patch-5.9+dfsg/0013-enable-parallel-build-for-net-snmp.patch +++ /dev/null @@ -1,18 +0,0 @@ -diff --git a/debian/rules b/debian/rules -index b23b335..d37413c 100755 ---- a/debian/rules -+++ b/debian/rules -@@ -31,10 +31,6 @@ endif - %: - dh $@ - --# The net-snmp Makefiles cannot handle parallel builds --override_dh_auto_build: -- dh_auto_build --no-parallel -- - override_dh_auto_configure: - dh_auto_configure -- --prefix=/usr --sysconfdir=/etc --mandir=/usr/share/man \ - --with-persistent-directory=/var/lib/snmp \ --- -2.34.1 - diff --git a/src/snmpd/patch-5.9+dfsg/cross-compile-changes.patch b/src/snmpd/patch-5.9+dfsg/cross-compile-changes.patch deleted file mode 100644 index fedaeaa36bb..00000000000 --- a/src/snmpd/patch-5.9+dfsg/cross-compile-changes.patch +++ /dev/null @@ -1,17 +0,0 @@ -diff --git a/debian/rules b/debian/rules -index b23b335..b8a79b9 100755 ---- a/debian/rules -+++ b/debian/rules -@@ -5,6 +5,12 @@ export DEB_BUILD_MAINT_OPTIONS := hardening=+all - DEB_HOST_MULTIARCH ?= $(shell dpkg-architecture -qDEB_HOST_MULTIARCH) - DEB_BUILD_ARCH_OS ?= $(shell dpkg-architecture -qDEB_BUILD_ARCH_OS) - -+DEB_BUILD_MULTIARCH ?= $(shell dpkg-architecture -qDEB_BUILD_MULTIARCH) -+ -+ifneq ($(DEB_BUILD_MULTIARCH),$(DEB_HOST_MULTIARCH)) -+export PERL5OPT := -I/usr/lib/$(DEB_HOST_MULTIARCH)/perl/cross-config -+endif -+ - LIB_VERSION = 40 - - MIB_MODULES = smux ucd-snmp/dlmod mibII/mta_sendmail disman/event-mib diff --git a/src/snmpd/patch-5.9+dfsg/series b/src/snmpd/patch-5.9+dfsg/series deleted file mode 100644 index d10bef61250..00000000000 --- a/src/snmpd/patch-5.9+dfsg/series +++ /dev/null @@ -1,11 +0,0 @@ -0001-SNMP-Stop-spamming-logs-with-statfs-permission-denie.patch -#0002-at.c-properly-check-return-status-from-realloc.-Than.patch -#0006-From-Jiri-Cervenka-snmpd-Fixed-agentx-crashing-and-or-freezing-on-timeout.patch -#0007-Linux-VRF-5.7.3-Support.patch -0008-Enable-macro-DEB_BUILD_ARCH_OS-in-order-to-build-ipv.patch -0009-Makefile.in-agent-Makefile.in-Fix-parallel-compilati.patch -0010-Makefile.in-Make-sure-that-sedscript-is-built-before.patch -0011-agent-Makefile.in-Build-the-MIB-module-code-once.patch -0012-agent-Makefile.in-Unbreak-the-enable-minimalist-buil.patch -0013-enable-parallel-build-for-net-snmp.patch -cross-compile-changes.patch diff --git a/src/socat/Makefile b/src/socat/Makefile index bee404ebc57..58f9861a50e 100644 --- a/src/socat/Makefile +++ b/src/socat/Makefile @@ -10,9 +10,9 @@ $(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : rm -rf ./socat-1.7.4.1 # Get source package - wget -NO socat_$(SOCAT_VERSION).dsc "https://packages.trafficmanager.net/public/debian/socat_1.7.4.1-3.dsc" - wget -NO socat_$(SOCAT_VERSION).debian.tar.xz "https://packages.trafficmanager.net/public/debian/socat_1.7.4.1-3.debian.tar.xz" - wget -NO socat_1.7.4.1.orig.tar.gz "https://packages.trafficmanager.net/public/debian/socat_1.7.4.1.orig.tar.gz" + wget -NO socat_$(SOCAT_VERSION).dsc "$(BUILD_PUBLIC_URL)/debian/socat_1.7.4.1-3.dsc" + wget -NO socat_$(SOCAT_VERSION).debian.tar.xz "$(BUILD_PUBLIC_URL)/debian/socat_1.7.4.1-3.debian.tar.xz" + wget -NO socat_1.7.4.1.orig.tar.gz "$(BUILD_PUBLIC_URL)/debian/socat_1.7.4.1.orig.tar.gz" dpkg-source -x socat_$(SOCAT_VERSION).dsc diff --git a/src/sonic-bgpcfgd/bfdmon/bfdmon.py b/src/sonic-bgpcfgd/bfdmon/bfdmon.py index 97bc4abf041..7343585363b 100644 --- a/src/sonic-bgpcfgd/bfdmon/bfdmon.py +++ b/src/sonic-bgpcfgd/bfdmon/bfdmon.py @@ -36,7 +36,7 @@ def check_bfdd(self): """ try: # Use pgrep to check if the process is running - rc, output = getstatusoutput_noshell(["pgrep", "-f", "bfdd"]) + rc, output = getstatusoutput_noshell(["pgrep", "-x", "bfdd"]) if not rc: self.bfdd_running = True return True diff --git a/src/sonic-bgpcfgd/bgpcfgd/main.py b/src/sonic-bgpcfgd/bgpcfgd/main.py index ef616243153..836beec83f4 100644 --- a/src/sonic-bgpcfgd/bgpcfgd/main.py +++ b/src/sonic-bgpcfgd/bgpcfgd/main.py @@ -120,16 +120,16 @@ def do_work(): managers.append(BfdMgr(common_objs, "STATE_DB", swsscommon.STATE_BFD_SOFTWARE_SESSION_TABLE_NAME)) device_metadata = config_db.get_table("DEVICE_METADATA") - # Enable Prefix List Manager and AsPath Manager for UpperSpineRouter/UpstreamLC + # Enable AsPath Manager for UpperSpineRouter/UpstreamLC is_upstream_lc = ("localhost" in device_metadata and "type" in device_metadata["localhost"] and "subtype" in device_metadata["localhost"] and device_metadata["localhost"]["type"] == "SpineRouter" and device_metadata["localhost"]["subtype"] == "UpstreamLC") is_upper_spine_router = ("localhost" in device_metadata and "type" in device_metadata["localhost"] and device_metadata["localhost"]["type"] == "UpperSpineRouter") if is_upstream_lc or is_upper_spine_router: - # Prefix List Manager - managers.append(PrefixListMgr(common_objs, "CONFIG_DB", "PREFIX_LIST")) managers.append(AsPathMgr(common_objs, "CONFIG_DB", "DEVICE_METADATA")) - log_notice("Prefix List Manager and AsPath Manager are enabled for UpperSpineRouter/UpstreamLC") + log_notice("AsPath Manager is enabled for %s" % device_metadata["localhost"]["type"]) + + managers.append(PrefixListMgr(common_objs, "CONFIG_DB", "PREFIX_LIST")) runner = Runner(common_objs['cfg_mgr']) for mgr in managers: diff --git a/src/sonic-bgpcfgd/bgpcfgd/managers_aggregate_address.py b/src/sonic-bgpcfgd/bgpcfgd/managers_aggregate_address.py index 93bb8ec5cca..0705d128059 100644 --- a/src/sonic-bgpcfgd/bgpcfgd/managers_aggregate_address.py +++ b/src/sonic-bgpcfgd/bgpcfgd/managers_aggregate_address.py @@ -1,3 +1,5 @@ +import ipaddress + from swsscommon import swsscommon from .log import log_info, log_err @@ -49,6 +51,9 @@ def on_bbr_change(self): for address in addresses: if self.address_set_handler(address[0], address[1]): self.set_address_state(address[0], address[1], ADDRESS_ACTIVE_STATE) + else: + log_info("AggregateAddressMgr::set address %s failed during BBR change (validation or FRR push error)" % key2prefix(address[0])) + self.set_address_state(address[0], address[1], ADDRESS_INACTIVE_STATE) elif bbr_status == BGP_BBR_STATUS_DISABLED: log_info("AggregateAddressMgr::BBR state changed to %s with bbr_required addresses %s" % (bbr_status, addresses)) for address in addresses: @@ -59,25 +64,41 @@ def on_bbr_change(self): def set_handler(self, key, data): data = dict(data) - bbr_status = self.directory.get(CONFIG_DB_NAME, BGP_BBR_TABLE_NAME, BGP_BBR_STATUS_KEY) - if bbr_status not in (BGP_BBR_STATUS_ENABLED, BGP_BBR_STATUS_DISABLED): - log_info("AggregateAddressMgr::BBR state is unknown. Skip the address %s" % key2prefix(key)) + prefix = key2prefix(key) + net, reason = validate_prefix(prefix) + if net is None: + log_err("AggregateAddressMgr::invalid aggregate prefix %s: %s" % (prefix, reason)) + self.set_address_state(key, data, ADDRESS_INACTIVE_STATE) + return True + if self.directory.path_exist(CONFIG_DB_NAME, BGP_BBR_TABLE_NAME, BGP_BBR_STATUS_KEY): + bbr_status = self.directory.get(CONFIG_DB_NAME, BGP_BBR_TABLE_NAME, BGP_BBR_STATUS_KEY) + else: + bbr_status = "" + bbr_required = data.get(BBR_REQUIRED_KEY, COMMON_FALSE_STRING) == COMMON_TRUE_STRING + if bbr_status not in (BGP_BBR_STATUS_ENABLED, BGP_BBR_STATUS_DISABLED) and bbr_required: + log_info("AggregateAddressMgr::BBR state is unknown and bbr-required is true. Skip the address %s" % prefix) self.set_address_state(key, data, ADDRESS_INACTIVE_STATE) - elif bbr_status == BGP_BBR_STATUS_DISABLED and data.get(BBR_REQUIRED_KEY, COMMON_FALSE_STRING) == COMMON_TRUE_STRING: - log_info("AggregateAddressMgr::BBR is disabled and bbr-required is set to true. Skip the address %s" % key2prefix(key)) + elif bbr_status == BGP_BBR_STATUS_DISABLED and bbr_required: + log_info("AggregateAddressMgr::BBR is disabled and bbr-required is set to true. Skip the address %s" % prefix) self.set_address_state(key, data, ADDRESS_INACTIVE_STATE) else: if self.address_set_handler(key, data): self.set_address_state(key, data, ADDRESS_ACTIVE_STATE) else: - log_info("AggregateAddressMgr::set address %s failed" % key2prefix(key)) + log_info("AggregateAddressMgr::set address %s failed (validation or FRR push error)" % prefix) self.set_address_state(key, data, ADDRESS_INACTIVE_STATE) return True def address_set_handler(self, key, data): bgp_asn = self.directory.get_slot(CONFIG_DB_NAME, swsscommon.CFG_DEVICE_METADATA_TABLE_NAME)["localhost"]["bgp_asn"] prefix = key2prefix(key) - is_v4 = '.' in prefix + + net, reason = validate_prefix(prefix) + if net is None: + log_err("AggregateAddressMgr::invalid aggregate prefix %s: %s" % (prefix, reason)) + return False + + is_v4 = net.version == 4 cmd_list = [] aggregates_cmds = generate_aggregate_address_commands( @@ -116,15 +137,19 @@ def address_set_handler(self, key, data): def del_handler(self, key): address_state = self.get_address_from_state_db(key) - if self.address_del_handler(key, address_state): - log_info("AggregateAddressMgr::delete address %s success" % key) - self.del_address_state(key) + if address_state.get(ADDRESS_STATE_KEY) == ADDRESS_INACTIVE_STATE: + log_info("AggregateAddressMgr::address %s is inactive, skip FRR removal" % key2prefix(key)) + else: + if self.address_del_handler(key, address_state): + log_info("AggregateAddressMgr::delete address %s success" % key) + self.del_address_state(key) return True def address_del_handler(self, key, data): bgp_asn = self.directory.get_slot(CONFIG_DB_NAME, swsscommon.CFG_DEVICE_METADATA_TABLE_NAME)["localhost"]["bgp_asn"] prefix = key2prefix(key) - is_v4 = '.' in prefix + net, _ = validate_prefix(prefix) + is_v4 = net.version == 4 if net else False cmd_list = [] aggregates_cmds = generate_aggregate_address_commands( @@ -200,6 +225,17 @@ def key2prefix(key): return prefix +def validate_prefix(prefix): + """Return (network, None) if prefix is valid, or (None, reason) otherwise.""" + if '/' not in prefix: + return None, "missing prefix length" + try: + net = ipaddress.ip_network(prefix, strict=True) + except ValueError as e: + return None, str(e) + return net, None + + def generate_aggregate_address_commands(asn, prefix, is_v4, is_remove, summary_only=COMMON_FALSE_STRING, as_set=COMMON_FALSE_STRING): ret_cmds = [] ret_cmds.append("router bgp %s" % asn) diff --git a/src/sonic-bgpcfgd/bgpcfgd/managers_bfd.py b/src/sonic-bgpcfgd/bgpcfgd/managers_bfd.py index a96f1977eae..daaace7b205 100644 --- a/src/sonic-bgpcfgd/bgpcfgd/managers_bfd.py +++ b/src/sonic-bgpcfgd/bgpcfgd/managers_bfd.py @@ -38,7 +38,7 @@ def check_and_start_bfdd(self): """ try: # Use pgrep to check if the process is running - subprocess.check_output(["pgrep", "-f", "bfdd"]) + subprocess.check_output(["pgrep", "-x", "bfdd"]) return True except subprocess.CalledProcessError: # Start bfdd process diff --git a/src/sonic-bgpcfgd/bgpcfgd/managers_bgp.py b/src/sonic-bgpcfgd/bgpcfgd/managers_bgp.py index b9d3f514a85..b727400d97b 100644 --- a/src/sonic-bgpcfgd/bgpcfgd/managers_bgp.py +++ b/src/sonic-bgpcfgd/bgpcfgd/managers_bgp.py @@ -97,6 +97,8 @@ def __init__(self, common_objs, db_name, table_name, peer_type, check_neig_meta) self.constants = self.common_objs["constants"] self.fabric = common_objs['tf'] self.peer_type = peer_type + self.loopbacks = ["Loopback0"] + self.post_dependencies_init_complete = False base_template = "bgpd/templates/" + self.constants["bgp"]["peers"][peer_type]["template_dir"] + "/" self.templates = { @@ -175,23 +177,20 @@ def add_peer(self, vrf, nbr, data): :param data: associated data :return: True if this adding was successful, False otherwise """ - print_data = vrf, nbr, data - bgp_asn = self.directory.get_slot("CONFIG_DB", swsscommon.CFG_DEVICE_METADATA_TABLE_NAME)["localhost"]["bgp_asn"] - # - lo0_ipv4 = self.get_lo_ipv4("Loopback0|") - if (lo0_ipv4 is None and "bgp_router_id" - not in self.directory.get_slot("CONFIG_DB", swsscommon.CFG_DEVICE_METADATA_TABLE_NAME)["localhost"]): - log_warn("Loopback0 ipv4 address is not presented yet and bgp_router_id not configured") - return False - # - if self.peer_type == 'internal': - lo4096_ipv4 = self.get_lo_ipv4("Loopback4096|") - if (lo4096_ipv4 is None and "bgp_router_id" + if not self.post_dependencies_init_complete: + self.post_dependencies_init() + + for loopback in self.loopbacks: + lo_ipv4 = self.get_lo_ipv4(loopback + "|") + if (lo_ipv4 is None and "bgp_router_id" not in self.directory.get_slot("CONFIG_DB", swsscommon.CFG_DEVICE_METADATA_TABLE_NAME)["localhost"]): - log_warn("Loopback4096 ipv4 address is not presented yet and bgp_router_id not configured") + log_warn(loopback + " ipv4 address is not presented yet and bgp_router_id not configured") return False + print_data = vrf, nbr, data + bgp_asn = self.directory.get_slot("CONFIG_DB", swsscommon.CFG_DEVICE_METADATA_TABLE_NAME)["localhost"]["bgp_asn"] + if "local_addr" not in data: log_warn("Peer %s. Missing attribute 'local_addr'" % nbr) else: @@ -213,6 +212,8 @@ def add_peer(self, vrf, nbr, data): 'CONFIG_DB__LOOPBACK_INTERFACE':{ tuple(key.split('|')) : {} for key in self.directory.get_slot("CONFIG_DB", swsscommon.CFG_LOOPBACK_INTERFACE_TABLE_NAME) if '|' in key } } + + lo0_ipv4 = self.get_lo_ipv4("Loopback0|") if lo0_ipv4 is not None: kwargs['loopback0_ipv4'] = lo0_ipv4 if self.check_neig_meta: @@ -241,6 +242,32 @@ def add_peer(self, vrf, nbr, data): self.directory.put(self.db_name, self.table_name, vrf + '|' + nbr, data) return True + def post_dependencies_init(self): + self.post_dependencies_init_complete = True #Skip retrying template render failures to not impact existing workflow + orig_lo_list_len = len(self.loopbacks) + base_template = "bgpd/templates/" + self.constants["bgp"]["peers"][self.peer_type]["template_dir"] + "/" + if (os.path.exists(self.fabric.env.loader.searchpath[0] + "/" + base_template + "additional_loopbacks.conf.j2")): + kwargs = { + 'CONFIG_DB__DEVICE_METADATA': self.directory.get_slot("CONFIG_DB", swsscommon.CFG_DEVICE_METADATA_TABLE_NAME) + } + try: + rendered_loopbacks = self.fabric.from_file(base_template + "additional_loopbacks.conf.j2").render(**kwargs) + except jinja2.TemplateError as e: + msg = "Error in rendering the template " + base_template + "additional_loopbacks.conf.j2" + log_err("%s: %s" % (msg, str(e))) + return + + for loopback in rendered_loopbacks.splitlines(): + loopback_name = loopback.strip() + if loopback_name and loopback_name not in self.loopbacks: + self.loopbacks.append(loopback_name) + + if len(self.loopbacks) > orig_lo_list_len: + log_info("Additional loopbacks acquired for peer %s, loopback list %s" % (self.peer_type, self.loopbacks)) + else: + log_info("No additional loopbacks acquired for peer %s, loopback list %s" % (self.peer_type, self.loopbacks)) + + def update_state_db(self, vrf, nbr, data, op): """ Update the database with the new data @@ -482,8 +509,8 @@ def apply_op(self, cmd, vrf): def get_lo_ipv4(self, loopback_str): """ - Extract Loopback0 ipv4 address from the Directory - :return: ipv4 address for Loopback0, None if nothing found + Extract LoopbackX ipv4 address from the Directory + :return: ipv4 address for LoopbackX, None if nothing found """ loopback0_ipv4 = None for loopback in self.directory.get_slot("CONFIG_DB", swsscommon.CFG_LOOPBACK_INTERFACE_TABLE_NAME).keys(): diff --git a/src/sonic-bgpcfgd/bgpcfgd/managers_prefix_list.py b/src/sonic-bgpcfgd/bgpcfgd/managers_prefix_list.py index 1686cfc4164..57817d892c7 100644 --- a/src/sonic-bgpcfgd/bgpcfgd/managers_prefix_list.py +++ b/src/sonic-bgpcfgd/bgpcfgd/managers_prefix_list.py @@ -3,84 +3,115 @@ from swsscommon import swsscommon import netaddr +PREFIX_TYPE_CONFIG = { + "ANCHOR_PREFIX": { + "add_template": "bgpd/radian/add_radian", + "del_template": "bgpd/radian/del_radian", + "allowed_devices": [ + ("SpineRouter", "UpstreamLC"), + ("UpperSpineRouter", None), + ], + "prefix_list_name": lambda ipv: "ANCHOR_CONTRIBUTING_ROUTES", + "log_label": "Anchor prefix", + "log_label_target": "radian", + }, + "SUPPRESS_PREFIX": { + "add_template": "bgpd/suppress_prefix/add_suppress_prefix", + "del_template": "bgpd/suppress_prefix/del_suppress_prefix", + "allowed_devices": None, + "prefix_list_name": lambda ipv: "SUPPRESS_IPV4_PREFIX" if ipv == "ip" else "SUPPRESS_IPV6_PREFIX", + "log_label": "Suppress prefix", + "log_label_target": "suppress_prefix", + }, +} + class PrefixListMgr(Manager): """This class responds to changes in the PREFIX_LIST table""" def __init__(self, common_objs, db, table): - """ - Initialize the object - :param common_objs: common object dictionary - :param db: name of the db - :param table: name of the table in the db - """ self.directory = common_objs['directory'] self.cfg_mgr = common_objs['cfg_mgr'] self.constants = common_objs['constants'] - self.templates = { - "add_radian": common_objs['tf'].from_file("bgpd/radian/add_radian.conf.j2"), - "del_radian": common_objs['tf'].from_file("bgpd/radian/del_radian.conf.j2"), - } + self.templates = {} + for cfg in PREFIX_TYPE_CONFIG.values(): + self.templates[cfg["add_template"]] = common_objs['tf'].from_file(cfg["add_template"] + ".conf.j2") + self.templates[cfg["del_template"]] = common_objs['tf'].from_file(cfg["del_template"] + ".conf.j2") super(PrefixListMgr, self).__init__( common_objs, - [], + [ + ("CONFIG_DB", swsscommon.CFG_DEVICE_METADATA_TABLE_NAME, "localhost/type"), + ("CONFIG_DB", swsscommon.CFG_DEVICE_METADATA_TABLE_NAME, "localhost/bgp_asn"), + ], db, table, ) - def generate_prefix_list_config(self, data, add): - """ - Generate the prefix list configuration from the template - :param data: data from the PREFIX_LIST table - :return: rendered configuration - """ - cmd = "\n" - metadata = self.directory.get_slot("CONFIG_DB", swsscommon.CFG_DEVICE_METADATA_TABLE_NAME)["localhost"] + def _is_device_allowed(self, device_type, device_subtype, allowed_list): + if allowed_list is None: + return True + for allowed_type, allowed_subtype in allowed_list: + if device_type == allowed_type: + if allowed_subtype is None or device_subtype == allowed_subtype: + return True + return False + + def generate_prefix_list_config(self, prefix_type, data, add): + type_cfg = PREFIX_TYPE_CONFIG.get(prefix_type) + if type_cfg is None: + log_warn("PrefixListMgr:: Prefix type '%s' is not supported" % prefix_type) + return False + + if not self.directory.path_exist("CONFIG_DB", swsscommon.CFG_DEVICE_METADATA_TABLE_NAME, "localhost"): + log_info("PrefixListMgr:: Device metadata is not ready yet") + return False + metadata = self.directory.get_path("CONFIG_DB", swsscommon.CFG_DEVICE_METADATA_TABLE_NAME, "localhost") + # bgp_asn is required for all prefix types: ANCHOR_PREFIX templates use it + # directly (router bgp ), and while SUPPRESS_PREFIX templates don't + # reference it today, prefix-list operations are inherently BGP features — + # any device managing prefix lists will be running BGP with an ASN configured. + # Requiring bgp_asn upfront keeps templates free to use it when expanded. try: + device_type = metadata["type"] + device_subtype = metadata.get("subtype", "") bgp_asn = metadata["bgp_asn"] - localhost_type = metadata["type"] - subtype = metadata["subtype"] except KeyError as e: - log_warn(f"PrefixListMgr:: Missing metadata key: {e}") + log_warn("PrefixListMgr:: Missing metadata key: %s" % e) return False - if data["prefix_list_name"] != "ANCHOR_PREFIX": - log_warn("PrefixListMgr:: Prefix list %s is not supported" % data["prefix_list_name"]) - return False - if localhost_type not in ["UpperSpineRouter", "SpineRouter"] or (localhost_type == "SpineRouter" and subtype != "UpstreamLC"): - log_warn("PrefixListMgr:: Prefix list %s is only supported on Upstream SpineRouter" % data["prefix_list_name"]) + if not self._is_device_allowed(device_type, device_subtype, type_cfg["allowed_devices"]): + device_desc = "%s/%s" % (device_type, device_subtype) if device_subtype else device_type + log_warn("PrefixListMgr:: Device type %s not supported for %s" % (device_desc, prefix_type)) return False - # Add the anchor prefix to the radian configuration data["bgp_asn"] = bgp_asn - if add: - # add some way of getting this asn list from the database in the future - cmd += self.templates["add_radian"].render(data=data) - log_debug("PrefixListMgr:: Anchor prefix %s added to radian configuration" % data["prefix"]) - else: - cmd += self.templates["del_radian"].render(data=data) - log_debug("PrefixListMgr:: Anchor prefix %s removed from radian configuration" % data["prefix"]) + data["device_type"] = device_type + data["device_subtype"] = device_subtype + pl_overrides = self.constants.get("bgp", {}).get("prefix_list", {}).get(prefix_type, {}) + name_key = "ipv4_name" if data["ipv"] == "ip" else "ipv6_name" + data["prefix_list_name"] = pl_overrides.get(name_key, type_cfg["prefix_list_name"](data["ipv"])) + + template_key = type_cfg["add_template"] if add else type_cfg["del_template"] + cmd = "\n" + self.templates[template_key].render(data=data) self.cfg_mgr.push(cmd) + + action = "added to" if add else "removed from" + log_debug("PrefixListMgr:: %s %s %s %s configuration" % (type_cfg["log_label"], data["prefix"], action, type_cfg["log_label_target"])) return True - - def set_handler(self, key, data): log_debug("PrefixListMgr:: set handler") if '|' in key: - prefix_list_name, prefix_str = key.split('|', 1) + prefix_type, prefix_str = key.split('|', 1) try: prefix = netaddr.IPNetwork(str(prefix_str)) except (netaddr.NotRegisteredError, netaddr.AddrFormatError, netaddr.AddrConversionError): - log_warn("PrefixListMgr:: Prefix '%s' format is wrong for prefix list '%s'" % (prefix_str, prefix_list_name)) + log_warn("PrefixListMgr:: Prefix '%s' format is wrong for prefix list '%s'" % (prefix_str, prefix_type)) return True - data["prefix_list_name"] = prefix_list_name data["prefix"] = str(prefix.cidr) data["prefixlen"] = prefix.prefixlen data["ipv"] = self.get_ip_type(prefix) - # Generate the prefix list configuration - if self.generate_prefix_list_config(data, add=True): - log_info("PrefixListMgr:: %s %s configuration generated" % (prefix_list_name, data["prefix"])) - + if self.generate_prefix_list_config(prefix_type, data, add=True): + log_info("PrefixListMgr:: %s %s configuration generated" % (prefix_type, data["prefix"])) self.directory.put(self.db_name, self.table_name, key, data) log_info("PrefixListMgr:: set %s" % key) return True @@ -88,31 +119,23 @@ def set_handler(self, key, data): def del_handler(self, key): log_debug("PrefixListMgr:: del handler") if '|' in key: - prefix_list_name, prefix_str = key.split('|', 1) + prefix_type, prefix_str = key.split('|', 1) try: prefix = netaddr.IPNetwork(str(prefix_str)) except (netaddr.NotRegisteredError, netaddr.AddrFormatError, netaddr.AddrConversionError): - log_warn("PrefixListMgr:: Prefix '%s' format is wrong for prefix list '%s'" % (prefix_str, prefix_list_name)) + log_warn("PrefixListMgr:: Prefix '%s' format is wrong for prefix list '%s'" % (prefix_str, prefix_type)) return True data = {} - data["prefix_list_name"] = prefix_list_name data["prefix"] = str(prefix.cidr) data["prefixlen"] = prefix.prefixlen data["ipv"] = self.get_ip_type(prefix) - # remove the prefix list configuration - if self.generate_prefix_list_config(data, add=False): - log_info("PrefixListMgr:: %s %s configuration deleted" % (prefix_list_name, data["prefix"])) + if self.generate_prefix_list_config(prefix_type, data, add=False): + log_info("PrefixListMgr:: %s %s configuration deleted" % (prefix_type, data["prefix"])) self.directory.remove(self.db_name, self.table_name, key) log_info("PrefixListMgr:: deleted %s" % key) - # Implement deletion logic if necessary return True def get_ip_type(self, prefix: netaddr.IPNetwork): - """ - Determine the IP type (IPv4 or IPv6) of a prefix. - :param prefix: The prefix to check (e.g., "192.168.1.0/24" or "2001:db8::/32") - :return: "ip" if the prefix is an IPv4 address, "ipv6" if it is an IPv6 address, None if invalid - """ if prefix.version == 4: return "ip" elif prefix.version == 6: diff --git a/src/sonic-bgpcfgd/bgpmon/bgpmon.py b/src/sonic-bgpcfgd/bgpmon/bgpmon.py index 2623ec62482..83b5a4beed9 100755 --- a/src/sonic-bgpcfgd/bgpmon/bgpmon.py +++ b/src/sonic-bgpcfgd/bgpmon/bgpmon.py @@ -84,7 +84,10 @@ def get_all_neigh_states(self): try: rc, output = getstatusoutput_noshell(cmd) if rc: - syslog.syslog(syslog.LOG_ERR, "*ERROR* Failed with rc:{} when execute: {}".format(rc, cmd)) + if os.system('pgrep -x bgpd > /dev/null 2>&1') != 0 or os.system('pgrep -x zebra > /dev/null 2>&1') != 0: + syslog.syslog(syslog.LOG_WARNING, "vtysh failed (rc={}) when execute: {} Output: {} bgpd or zebra not running — container may be shutting down".format(rc, cmd, output[:200] if output else "")) + else: + syslog.syslog(syslog.LOG_ERR, "*ERROR* Failed with rc:{} when execute: {}".format(rc, cmd)) return if len(output) == 0: syslog.syslog(syslog.LOG_WARNING, "*WARNING* output none when execute: {}".format(cmd)) diff --git a/src/sonic-bgpcfgd/setup.py b/src/sonic-bgpcfgd/setup.py index 087f4ee167e..56c7bc48068 100755 --- a/src/sonic-bgpcfgd/setup.py +++ b/src/sonic-bgpcfgd/setup.py @@ -19,8 +19,7 @@ install_requires = [ 'jinja2>=2.10', 'netaddr==0.8.0', - 'pyyaml==6.0.1', - 'ipaddress==1.0.23' + 'pyyaml>=6.0.1', ], setup_requires = [ 'pytest-runner', diff --git a/src/sonic-bgpcfgd/staticroutebfd/main.py b/src/sonic-bgpcfgd/staticroutebfd/main.py index 197d3d241e3..fbbe2fe5963 100644 --- a/src/sonic-bgpcfgd/staticroutebfd/main.py +++ b/src/sonic-bgpcfgd/staticroutebfd/main.py @@ -217,6 +217,23 @@ def find_interface_ip(self, if_name, ip_example): return False, "" + def ifname_from_local_addr(self, local_addr): + """ + Find interface name whose address in LOCAL_INTERFACE_TABLE matches local_addr + (same source as BFD session local_addr / BfdOrch local_addr field). + """ + if not local_addr or not str(local_addr).strip(): + return None + want = str(local_addr).strip() + for if_name, ip_map in self.local_db[LOCAL_INTERFACE_TABLE].items(): + if not ip_map: + continue + for ip in ip_map.values(): + if ip and ip == want: + return if_name + return None + + def update_bfd_pending(self, if_name): del_list=[] for k, v in self.local_db[LOCAL_BFD_PENDING_TABLE].items(): @@ -651,7 +668,12 @@ def bfd_state_set_handler(self, key, data): nh_key = vrf + "|" + peer_ip state = data['state'] if 'state' in data else "DOWN" - log_info("bfd seesion %s state %s" %(bfd_key, state)) + local_addr = bfd_session.get('local_addr', '') + ifname_log = self.ifname_from_local_addr(local_addr) + if not ifname_log: + ifname_log = intf if intf and intf != "default" else "unknown" + log_info("bfd session %s ifname %s state %s" % (bfd_key, ifname_log, state)) + self.local_db[LOCAL_BFD_TABLE][bfd_key]["state"] = state diff --git a/src/sonic-bgpcfgd/tests/data/general/policies.conf/result_all_UpperSpineRouter.conf b/src/sonic-bgpcfgd/tests/data/general/policies.conf/result_all_UpperSpineRouter.conf index dcc123a82a0..f8bfa2dd41b 100644 --- a/src/sonic-bgpcfgd/tests/data/general/policies.conf/result_all_UpperSpineRouter.conf +++ b/src/sonic-bgpcfgd/tests/data/general/policies.conf/result_all_UpperSpineRouter.conf @@ -81,6 +81,7 @@ route-map TO_BGP_PEER_V6 permit 50 ! route-map TO_BGP_PEER_V6 permit 60 set comm-list LOCAL_ANCHOR_ROUTE_COMMUNITY delete + on-match next ! route-map TO_BGP_PEER_V4 permit 50 match ip address prefix-list ANCHOR_CONTRIBUTING_ROUTES @@ -89,6 +90,7 @@ route-map TO_BGP_PEER_V4 permit 50 ! route-map TO_BGP_PEER_V4 permit 60 set comm-list LOCAL_ANCHOR_ROUTE_COMMUNITY delete + on-match next ! ! end of template: bgpd/templates/general/policies.conf.j2 ! diff --git a/src/sonic-bgpcfgd/tests/data/general/policies.conf/result_all_chassis_pkt.conf b/src/sonic-bgpcfgd/tests/data/general/policies.conf/result_all_chassis_pkt.conf index 49c7516ee01..355c1f345fc 100644 --- a/src/sonic-bgpcfgd/tests/data/general/policies.conf/result_all_chassis_pkt.conf +++ b/src/sonic-bgpcfgd/tests/data/general/policies.conf/result_all_chassis_pkt.conf @@ -97,6 +97,7 @@ route-map TO_BGP_PEER_V6 permit 50 ! route-map TO_BGP_PEER_V6 permit 60 set comm-list LOCAL_ANCHOR_ROUTE_COMMUNITY delete + on-match next ! route-map TO_BGP_PEER_V4 permit 50 match ip address prefix-list ANCHOR_CONTRIBUTING_ROUTES @@ -105,6 +106,7 @@ route-map TO_BGP_PEER_V4 permit 50 ! route-map TO_BGP_PEER_V4 permit 60 set comm-list LOCAL_ANCHOR_ROUTE_COMMUNITY delete + on-match next ! ! end of template: bgpd/templates/general/policies.conf.j2 ! \ No newline at end of file diff --git a/src/sonic-bgpcfgd/tests/data/general/policies.conf/result_all_voq.conf b/src/sonic-bgpcfgd/tests/data/general/policies.conf/result_all_voq.conf index 75026d4ba73..d6511f46263 100644 --- a/src/sonic-bgpcfgd/tests/data/general/policies.conf/result_all_voq.conf +++ b/src/sonic-bgpcfgd/tests/data/general/policies.conf/result_all_voq.conf @@ -97,6 +97,7 @@ route-map TO_BGP_PEER_V6 permit 50 ! route-map TO_BGP_PEER_V6 permit 60 set comm-list LOCAL_ANCHOR_ROUTE_COMMUNITY delete + on-match next ! route-map TO_BGP_PEER_V4 permit 50 match ip address prefix-list ANCHOR_CONTRIBUTING_ROUTES @@ -105,6 +106,7 @@ route-map TO_BGP_PEER_V4 permit 50 ! route-map TO_BGP_PEER_V4 permit 60 set comm-list LOCAL_ANCHOR_ROUTE_COMMUNITY delete + on-match next ! ! end of template: bgpd/templates/general/policies.conf.j2 ! diff --git a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/multi_asic_upper_t2.conf b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/multi_asic_upper_t2.conf new file mode 100644 index 00000000000..efe160f7952 --- /dev/null +++ b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/multi_asic_upper_t2.conf @@ -0,0 +1,48 @@ +! +! template: bgpd/bgpd.main.conf.j2 +! +! bgp multiple-instance +! +! BGP configuration +! +! TSA configuration +! +ip prefix-list PL_LoopbackV4 permit 55.55.55.55/32 +! +ip prefix-list V4_P2P_IP permit 0.0.0.0/0 ge 31 le 31 +! +ipv6 prefix-list V6_P2P_IP permit ::/0 ge 126 le 126 +! +route-map V4_CONNECTED_ROUTES permit 10 + match ip address prefix-list V4_P2P_IP + call HIDE_INTERNAL +! +route-map V6_CONNECTED_ROUTES permit 10 + match ipv6 address prefix-list V6_P2P_IP + call HIDE_INTERNAL +! +route-map HIDE_INTERNAL permit 10 + set community no-export +! +router bgp 65001 +! + bgp confederation identifier 65000 + bgp confederation peers 65001 + bgp log-neighbor-changes + bgp suppress-fib-pending + no bgp default ipv4-unicast + no bgp ebgp-requires-policy +! + bgp router-id 55.55.55.55 +! + network 55.55.55.55/32 +! + address-family ipv4 + redistribute connected route-map V4_CONNECTED_ROUTES + exit-address-family + address-family ipv6 + redistribute connected route-map V6_CONNECTED_ROUTES + exit-address-family +! +! end of template: bgpd/bgpd.main.conf.j2 +! diff --git a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/multi_asic_upper_t2.json b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/multi_asic_upper_t2.json new file mode 100644 index 00000000000..29c336815eb --- /dev/null +++ b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/multi_asic_upper_t2.json @@ -0,0 +1,26 @@ +{ + "DEVICE_METADATA": { + "localhost": { + "bgp_asn": "65001", + "sub_role": "FrontEnd", + "type": "UpperSpineRouter" + } + }, + "BGP_DEVICE_GLOBAL": { + "CONFED" : { + "asn": "65000", + "peers": "65001" + } + }, + "LOOPBACK_INTERFACE": { + "Loopback0|55.55.55.55/32": {}, + "Loopback1|fc00::1/128": {} + }, + "constants": { + "bgp": { + "multipath_relax": {}, + "graceful_restart": {}, + "maximum_paths": {} + } + } +} \ No newline at end of file diff --git a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/single_asic_frh.conf b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/single_asic_frh.conf new file mode 100644 index 00000000000..4d5ddcda7ab --- /dev/null +++ b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/single_asic_frh.conf @@ -0,0 +1,26 @@ +! +! template: bgpd/bgpd.main.conf.j2 +! +! bgp multiple-instance +! +! BGP configuration +! +! TSA configuration +! +ip prefix-list PL_LoopbackV4 permit 55.55.55.55/32 +! +router bgp 65001 +! + bgp confederation identifier 65000 + bgp confederation peers 65001 65002 + bgp log-neighbor-changes + bgp suppress-fib-pending + no bgp default ipv4-unicast + no bgp ebgp-requires-policy +! + bgp router-id 55.55.55.55 +! + network 55.55.55.55/32 +! +! end of template: bgpd/bgpd.main.conf.j2 +! diff --git a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/single_asic_frh.json b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/single_asic_frh.json new file mode 100644 index 00000000000..34033014182 --- /dev/null +++ b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/single_asic_frh.json @@ -0,0 +1,25 @@ +{ + "DEVICE_METADATA": { + "localhost": { + "bgp_asn": "65001", + "type": "FabricRegionalHub" + } + }, + "BGP_DEVICE_GLOBAL": { + "CONFED" : { + "asn": "65000", + "peers": "65001;65002" + } + }, + "LOOPBACK_INTERFACE": { + "Loopback0|55.55.55.55/32": {}, + "Loopback1|fc00::1/128": {} + }, + "constants": { + "bgp": { + "multipath_relax": {}, + "graceful_restart": {}, + "maximum_paths": {} + } + } +} \ No newline at end of file diff --git a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/single_asic_ft2.conf b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/single_asic_ft2.conf new file mode 100644 index 00000000000..1e59f2c402d --- /dev/null +++ b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/single_asic_ft2.conf @@ -0,0 +1,26 @@ +! +! template: bgpd/bgpd.main.conf.j2 +! +! bgp multiple-instance +! +! BGP configuration +! +! TSA configuration +! +ip prefix-list PL_LoopbackV4 permit 55.55.55.55/32 +! +router bgp 65001 +! + bgp confederation identifier 65000 + bgp confederation peers 65001 + bgp log-neighbor-changes + bgp suppress-fib-pending + no bgp default ipv4-unicast + no bgp ebgp-requires-policy +! + bgp router-id 55.55.55.55 +! + network 55.55.55.55/32 +! +! end of template: bgpd/bgpd.main.conf.j2 +! diff --git a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/single_asic_ft2.json b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/single_asic_ft2.json new file mode 100644 index 00000000000..19165299aa5 --- /dev/null +++ b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/single_asic_ft2.json @@ -0,0 +1,25 @@ +{ + "DEVICE_METADATA": { + "localhost": { + "bgp_asn": "65001", + "type": "FabricSpineRouter" + } + }, + "BGP_DEVICE_GLOBAL": { + "CONFED" : { + "asn": "65000", + "peers": "65001" + } + }, + "LOOPBACK_INTERFACE": { + "Loopback0|55.55.55.55/32": {}, + "Loopback1|fc00::1/128": {} + }, + "constants": { + "bgp": { + "multipath_relax": {}, + "graceful_restart": {}, + "maximum_paths": {} + } + } +} \ No newline at end of file diff --git a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/single_asic_lrh.conf b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/single_asic_lrh.conf new file mode 100644 index 00000000000..4d5ddcda7ab --- /dev/null +++ b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/single_asic_lrh.conf @@ -0,0 +1,26 @@ +! +! template: bgpd/bgpd.main.conf.j2 +! +! bgp multiple-instance +! +! BGP configuration +! +! TSA configuration +! +ip prefix-list PL_LoopbackV4 permit 55.55.55.55/32 +! +router bgp 65001 +! + bgp confederation identifier 65000 + bgp confederation peers 65001 65002 + bgp log-neighbor-changes + bgp suppress-fib-pending + no bgp default ipv4-unicast + no bgp ebgp-requires-policy +! + bgp router-id 55.55.55.55 +! + network 55.55.55.55/32 +! +! end of template: bgpd/bgpd.main.conf.j2 +! diff --git a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/single_asic_lrh.json b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/single_asic_lrh.json new file mode 100644 index 00000000000..1046bfb9087 --- /dev/null +++ b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/single_asic_lrh.json @@ -0,0 +1,25 @@ +{ + "DEVICE_METADATA": { + "localhost": { + "bgp_asn": "65001", + "type": "LowerRegionalHub" + } + }, + "BGP_DEVICE_GLOBAL": { + "CONFED" : { + "asn": "65000", + "peers": "65001;65002" + } + }, + "LOOPBACK_INTERFACE": { + "Loopback0|55.55.55.55/32": {}, + "Loopback1|fc00::1/128": {} + }, + "constants": { + "bgp": { + "multipath_relax": {}, + "graceful_restart": {}, + "maximum_paths": {} + } + } +} \ No newline at end of file diff --git a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/single_asic_lt2.conf b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/single_asic_lt2.conf new file mode 100644 index 00000000000..4d5ddcda7ab --- /dev/null +++ b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/single_asic_lt2.conf @@ -0,0 +1,26 @@ +! +! template: bgpd/bgpd.main.conf.j2 +! +! bgp multiple-instance +! +! BGP configuration +! +! TSA configuration +! +ip prefix-list PL_LoopbackV4 permit 55.55.55.55/32 +! +router bgp 65001 +! + bgp confederation identifier 65000 + bgp confederation peers 65001 65002 + bgp log-neighbor-changes + bgp suppress-fib-pending + no bgp default ipv4-unicast + no bgp ebgp-requires-policy +! + bgp router-id 55.55.55.55 +! + network 55.55.55.55/32 +! +! end of template: bgpd/bgpd.main.conf.j2 +! diff --git a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/single_asic_lt2.json b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/single_asic_lt2.json new file mode 100644 index 00000000000..f84468288df --- /dev/null +++ b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/single_asic_lt2.json @@ -0,0 +1,25 @@ +{ + "DEVICE_METADATA": { + "localhost": { + "bgp_asn": "65001", + "type": "LowerSpineRouter" + } + }, + "BGP_DEVICE_GLOBAL": { + "CONFED" : { + "asn": "65000", + "peers": "65001;65002" + } + }, + "LOOPBACK_INTERFACE": { + "Loopback0|55.55.55.55/32": {}, + "Loopback1|fc00::1/128": {} + }, + "constants": { + "bgp": { + "multipath_relax": {}, + "graceful_restart": {}, + "maximum_paths": {} + } + } +} \ No newline at end of file diff --git a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/single_asic_upper_t2.conf b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/single_asic_upper_t2.conf new file mode 100644 index 00000000000..1e59f2c402d --- /dev/null +++ b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/single_asic_upper_t2.conf @@ -0,0 +1,26 @@ +! +! template: bgpd/bgpd.main.conf.j2 +! +! bgp multiple-instance +! +! BGP configuration +! +! TSA configuration +! +ip prefix-list PL_LoopbackV4 permit 55.55.55.55/32 +! +router bgp 65001 +! + bgp confederation identifier 65000 + bgp confederation peers 65001 + bgp log-neighbor-changes + bgp suppress-fib-pending + no bgp default ipv4-unicast + no bgp ebgp-requires-policy +! + bgp router-id 55.55.55.55 +! + network 55.55.55.55/32 +! +! end of template: bgpd/bgpd.main.conf.j2 +! diff --git a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/single_asic_upper_t2.json b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/single_asic_upper_t2.json new file mode 100644 index 00000000000..4b7678a222a --- /dev/null +++ b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/single_asic_upper_t2.json @@ -0,0 +1,25 @@ +{ + "DEVICE_METADATA": { + "localhost": { + "bgp_asn": "65001", + "type": "UpperSpineRouter" + } + }, + "BGP_DEVICE_GLOBAL": { + "CONFED" : { + "asn": "65000", + "peers": "65001" + } + }, + "LOOPBACK_INTERFACE": { + "Loopback0|55.55.55.55/32": {}, + "Loopback1|fc00::1/128": {} + }, + "constants": { + "bgp": { + "multipath_relax": {}, + "graceful_restart": {}, + "maximum_paths": {} + } + } +} \ No newline at end of file diff --git a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/single_asic_urh.conf b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/single_asic_urh.conf new file mode 100644 index 00000000000..21fdf7ed2b5 --- /dev/null +++ b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/single_asic_urh.conf @@ -0,0 +1,29 @@ +! +! template: bgpd/bgpd.main.conf.j2 +! +! bgp multiple-instance +! +! BGP configuration +! +! TSA configuration +! +ip prefix-list PL_LoopbackV4 permit 55.55.55.55/32 +! +router bgp 65001 +! + bgp confederation identifier 65000 + bgp confederation peers 65001 65002 + bgp log-neighbor-changes + bgp suppress-fib-pending + no bgp default ipv4-unicast + no bgp ebgp-requires-policy +! + bgp graceful-restart-disable + bgp long-lived-graceful-restart stale-time 864000 +! + bgp router-id 55.55.55.55 +! + network 55.55.55.55/32 +! +! end of template: bgpd/bgpd.main.conf.j2 +! diff --git a/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/single_asic_urh.json b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/single_asic_urh.json new file mode 100644 index 00000000000..8db7298c96e --- /dev/null +++ b/src/sonic-bgpcfgd/tests/data/sonic-cfggen/bgpd.main.conf.j2/single_asic_urh.json @@ -0,0 +1,25 @@ +{ + "DEVICE_METADATA": { + "localhost": { + "bgp_asn": "65001", + "type": "UpperRegionalHub" + } + }, + "BGP_DEVICE_GLOBAL": { + "CONFED" : { + "asn": "65000", + "peers": "65001;65002" + } + }, + "LOOPBACK_INTERFACE": { + "Loopback0|55.55.55.55/32": {}, + "Loopback1|fc00::1/128": {} + }, + "constants": { + "bgp": { + "multipath_relax": {}, + "graceful_restart": {}, + "maximum_paths": {} + } + } +} \ No newline at end of file diff --git a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_all_v4.conf b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_all_v4.conf index 1250552211e..ef6664efcdf 100644 --- a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_all_v4.conf +++ b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_all_v4.conf @@ -5,7 +5,6 @@ bgp bestpath peer-type multipath-relax ! neighbor 10.10.10.10 peer-group VOQ_CHASSIS_V4_PEER - neighbor 10.10.10.10 remote-as 555 neighbor 10.10.10.10 description internal1 neighbor 10.10.10.10 timers 2 7 neighbor 10.10.10.10 timers connect 10 diff --git a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_all_v6.conf b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_all_v6.conf index e6274e05332..37ef6ab4502 100644 --- a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_all_v6.conf +++ b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_all_v6.conf @@ -5,7 +5,6 @@ bgp bestpath peer-type multipath-relax ! neighbor fc00::01 peer-group VOQ_CHASSIS_V6_PEER - neighbor fc00::01 remote-as 555 neighbor fc00::01 description internal1 neighbor fc00::01 timers 2 7 neighbor fc00::01 timers connect 10 diff --git a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_base_v4.conf b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_base_v4.conf index 4d2f2c251e4..1eb069e848e 100644 --- a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_base_v4.conf +++ b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_base_v4.conf @@ -5,7 +5,6 @@ bgp bestpath peer-type multipath-relax ! neighbor 10.10.10.10 peer-group VOQ_CHASSIS_V4_PEER - neighbor 10.10.10.10 remote-as 555 neighbor 10.10.10.10 description internal1 neighbor 10.10.10.10 timers 2 7 neighbor 10.10.10.10 timers connect 10 diff --git a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_base_v6.conf b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_base_v6.conf index 375d0005119..c76731ad632 100644 --- a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_base_v6.conf +++ b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_base_v6.conf @@ -5,7 +5,6 @@ bgp bestpath peer-type multipath-relax ! neighbor fc00::01 peer-group VOQ_CHASSIS_V6_PEER - neighbor fc00::01 remote-as 555 neighbor fc00::01 description internal1 neighbor fc00::01 timers 2 7 neighbor fc00::01 timers connect 10 diff --git a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_shutdown_v4_1.conf b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_shutdown_v4_1.conf index 5181fad5187..aae72eb80d8 100644 --- a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_shutdown_v4_1.conf +++ b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_shutdown_v4_1.conf @@ -5,7 +5,6 @@ bgp bestpath peer-type multipath-relax ! neighbor 10.10.10.10 peer-group VOQ_CHASSIS_V4_PEER - neighbor 10.10.10.10 remote-as 555 neighbor 10.10.10.10 description internal1 neighbor 10.10.10.10 timers 2 7 neighbor 10.10.10.10 timers connect 10 diff --git a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_shutdown_v4_2.conf b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_shutdown_v4_2.conf index 4d2f2c251e4..1eb069e848e 100644 --- a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_shutdown_v4_2.conf +++ b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_shutdown_v4_2.conf @@ -5,7 +5,6 @@ bgp bestpath peer-type multipath-relax ! neighbor 10.10.10.10 peer-group VOQ_CHASSIS_V4_PEER - neighbor 10.10.10.10 remote-as 555 neighbor 10.10.10.10 description internal1 neighbor 10.10.10.10 timers 2 7 neighbor 10.10.10.10 timers connect 10 diff --git a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_shutdown_v6_1.conf b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_shutdown_v6_1.conf index 144a26ca485..ac48bb301b4 100644 --- a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_shutdown_v6_1.conf +++ b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_shutdown_v6_1.conf @@ -5,7 +5,6 @@ bgp bestpath peer-type multipath-relax ! neighbor fc00::01 peer-group VOQ_CHASSIS_V6_PEER - neighbor fc00::01 remote-as 555 neighbor fc00::01 description internal1 neighbor fc00::01 timers 2 7 neighbor fc00::01 timers connect 10 diff --git a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_shutdown_v6_2.conf b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_shutdown_v6_2.conf index 375d0005119..c76731ad632 100644 --- a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_shutdown_v6_2.conf +++ b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_shutdown_v6_2.conf @@ -5,7 +5,6 @@ bgp bestpath peer-type multipath-relax ! neighbor fc00::01 peer-group VOQ_CHASSIS_V6_PEER - neighbor fc00::01 remote-as 555 neighbor fc00::01 description internal1 neighbor fc00::01 timers 2 7 neighbor fc00::01 timers connect 10 diff --git a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_timers_v4_1.conf b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_timers_v4_1.conf index 4d2f2c251e4..1eb069e848e 100644 --- a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_timers_v4_1.conf +++ b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_timers_v4_1.conf @@ -5,7 +5,6 @@ bgp bestpath peer-type multipath-relax ! neighbor 10.10.10.10 peer-group VOQ_CHASSIS_V4_PEER - neighbor 10.10.10.10 remote-as 555 neighbor 10.10.10.10 description internal1 neighbor 10.10.10.10 timers 2 7 neighbor 10.10.10.10 timers connect 10 diff --git a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_timers_v4_2.conf b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_timers_v4_2.conf index 4d2f2c251e4..1eb069e848e 100644 --- a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_timers_v4_2.conf +++ b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_timers_v4_2.conf @@ -5,7 +5,6 @@ bgp bestpath peer-type multipath-relax ! neighbor 10.10.10.10 peer-group VOQ_CHASSIS_V4_PEER - neighbor 10.10.10.10 remote-as 555 neighbor 10.10.10.10 description internal1 neighbor 10.10.10.10 timers 2 7 neighbor 10.10.10.10 timers connect 10 diff --git a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_timers_v6_1.conf b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_timers_v6_1.conf index 375d0005119..c76731ad632 100644 --- a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_timers_v6_1.conf +++ b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_timers_v6_1.conf @@ -5,7 +5,6 @@ bgp bestpath peer-type multipath-relax ! neighbor fc00::01 peer-group VOQ_CHASSIS_V6_PEER - neighbor fc00::01 remote-as 555 neighbor fc00::01 description internal1 neighbor fc00::01 timers 2 7 neighbor fc00::01 timers connect 10 diff --git a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_timers_v6_2.conf b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_timers_v6_2.conf index 375d0005119..c76731ad632 100644 --- a/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_timers_v6_2.conf +++ b/src/sonic-bgpcfgd/tests/data/voq_chassis/instance.conf/result_timers_v6_2.conf @@ -5,7 +5,6 @@ bgp bestpath peer-type multipath-relax ! neighbor fc00::01 peer-group VOQ_CHASSIS_V6_PEER - neighbor fc00::01 remote-as 555 neighbor fc00::01 description internal1 neighbor fc00::01 timers 2 7 neighbor fc00::01 timers connect 10 diff --git a/src/sonic-bgpcfgd/tests/data/voq_chassis/peer-group.conf/param_all.json b/src/sonic-bgpcfgd/tests/data/voq_chassis/peer-group.conf/param_all.json index 293ccc7990d..9358b5637d0 100644 --- a/src/sonic-bgpcfgd/tests/data/voq_chassis/peer-group.conf/param_all.json +++ b/src/sonic-bgpcfgd/tests/data/voq_chassis/peer-group.conf/param_all.json @@ -1,7 +1,8 @@ { "CONFIG_DB__DEVICE_METADATA": { "localhost": { - "type": "ToRRouter" + "type": "ToRRouter", + "bgp_asn": "66000" } } } \ No newline at end of file diff --git a/src/sonic-bgpcfgd/tests/data/voq_chassis/peer-group.conf/param_base.json b/src/sonic-bgpcfgd/tests/data/voq_chassis/peer-group.conf/param_base.json index 7ef21c181d7..76c01109c37 100644 --- a/src/sonic-bgpcfgd/tests/data/voq_chassis/peer-group.conf/param_base.json +++ b/src/sonic-bgpcfgd/tests/data/voq_chassis/peer-group.conf/param_base.json @@ -1,5 +1,7 @@ { "CONFIG_DB__DEVICE_METADATA": { - "localhost": {} + "localhost": { + "bgp_asn": "66000" + } } } diff --git a/src/sonic-bgpcfgd/tests/data/voq_chassis/peer-group.conf/result_all.conf b/src/sonic-bgpcfgd/tests/data/voq_chassis/peer-group.conf/result_all.conf index 350ff0eeeb4..bcd0534ff4c 100644 --- a/src/sonic-bgpcfgd/tests/data/voq_chassis/peer-group.conf/result_all.conf +++ b/src/sonic-bgpcfgd/tests/data/voq_chassis/peer-group.conf/result_all.conf @@ -2,7 +2,9 @@ ! template: bgpd/templates/voq_chassis/peer-group.conf.j2 ! neighbor VOQ_CHASSIS_V4_PEER peer-group + neighbor VOQ_CHASSIS_V4_PEER remote-as 66000 neighbor VOQ_CHASSIS_V6_PEER peer-group + neighbor VOQ_CHASSIS_V6_PEER remote-as 66000 address-family ipv4 neighbor VOQ_CHASSIS_V4_PEER allowas-in 1 neighbor VOQ_CHASSIS_V4_PEER activate diff --git a/src/sonic-bgpcfgd/tests/data/voq_chassis/peer-group.conf/result_base.conf b/src/sonic-bgpcfgd/tests/data/voq_chassis/peer-group.conf/result_base.conf index 9818358a771..9b9fa8f0f8c 100644 --- a/src/sonic-bgpcfgd/tests/data/voq_chassis/peer-group.conf/result_base.conf +++ b/src/sonic-bgpcfgd/tests/data/voq_chassis/peer-group.conf/result_base.conf @@ -2,7 +2,9 @@ ! template: bgpd/templates/voq_chassis/peer-group.conf.j2 ! neighbor VOQ_CHASSIS_V4_PEER peer-group + neighbor VOQ_CHASSIS_V4_PEER remote-as 66000 neighbor VOQ_CHASSIS_V6_PEER peer-group + neighbor VOQ_CHASSIS_V6_PEER remote-as 66000 address-family ipv4 neighbor VOQ_CHASSIS_V4_PEER activate neighbor VOQ_CHASSIS_V4_PEER addpath-tx-all-paths diff --git a/src/sonic-bgpcfgd/tests/test_aggregate.py b/src/sonic-bgpcfgd/tests/test_aggregate.py index f37f10f5b90..21ddfee313f 100644 --- a/src/sonic-bgpcfgd/tests/test_aggregate.py +++ b/src/sonic-bgpcfgd/tests/test_aggregate.py @@ -1,6 +1,7 @@ from bgpcfgd.directory import Directory from bgpcfgd.template import TemplateFabric from bgpcfgd.managers_aggregate_address import AggregateAddressMgr, BGP_AGGREGATE_ADDRESS_TABLE_NAME, BGP_BBR_TABLE_NAME +from bgpcfgd.managers_aggregate_address import validate_prefix import pytest from swsscommon import swsscommon from unittest.mock import MagicMock, patch @@ -79,7 +80,7 @@ def push_list(cmds): assert not set_del_test.push_list_called, "cfg_mgr.push_list was called" -@pytest.mark.parametrize("aggregate_prefix", ["192.168.1.1", "2ff::1/64"]) +@pytest.mark.parametrize("aggregate_prefix", ["192.168.1.0/24", "2ff::/64"]) @pytest.mark.parametrize("bbr_status", [BGP_BBR_STATUS_ENABLED, BGP_BBR_STATUS_DISABLED]) @pytest.mark.parametrize("bbr_required", ["true", "false"]) @pytest.mark.parametrize("switch_bbr_state", [False, True]) @@ -207,6 +208,10 @@ def __del_handler_validate( aggregate_address_prefix_list, contributing_address_prefix_list ): + # Check if the entry is currently active; only active entries trigger FRR removal + _, current_data = mgr.address_table.get(aggregate_prefix) + is_active = current_data and current_data.get('state') == 'active' + except_cmds = [ 'router bgp 65001', 'address-family ' + ('ipv4' if '.' in aggregate_prefix else 'ipv6'), @@ -222,7 +227,7 @@ def __del_handler_validate( mgr, "DEL", (aggregate_prefix,), - except_cmds + except_cmds if is_active else None ) assert aggregate_prefix not in mgr.address_table.getKeys() assert not mgr.address_table.get(aggregate_prefix)[1], "Address should be removed from the table" @@ -279,3 +284,71 @@ def __switch_bbr_state( assert [aggregate_prefix] == mgr.address_table.getKeys() _, data = mgr.address_table.get(aggregate_prefix) assert data == expected_state + + +@pytest.mark.parametrize("prefix,expected", [ + ("10.100.0.0/16", True), + ("10.100.1.0/24", True), + ("192.168.0.0/24", True), + ("2001:db8::/32", True), + ("0.0.0.0/0", True), + ("::/0", True), + ("10.100.0.1/24", False), # host bits set + ("10.100.1.0/23", False), # host bits set + ("192.168.1.1/24", False), # host bits set + ("2001:db8::1/32", False), # host bits set +]) +def test_validate_prefix(prefix, expected): + net, reason = validate_prefix(prefix) + if expected: + assert net is not None + assert reason is None + else: + assert net is None + assert reason is not None + + +@pytest.mark.parametrize("bad_prefix", [ + "10.100.0.1/24", + "10.100.1.0/23", +]) +def test_host_bits_set_rejected(bad_prefix): + """address_set_handler must return False for prefixes with host bits set.""" + mgr = constructor(bbr_status=BGP_BBR_STATUS_ENABLED) + attr = ( + ('bbr-required', 'false'), + ('summary-only', 'false'), + ('as-set', 'false'), + ('aggregate-address-prefix-list', ''), + ('contributing-address-prefix-list', ''), + ) + # push_list must NOT be called + set_del_test(mgr, "SET", (bad_prefix, attr), None) + # State should be inactive + _, data = mgr.address_table.get(bad_prefix) + assert data["state"] == "inactive" + + +@pytest.mark.parametrize("bad_prefix", [ + "10.100.0.1/24", + "10.100.1.0/23", +]) +def test_inactive_entry_skips_frr_removal(bad_prefix): + """del_handler must skip FRR removal for inactive entries and clean up STATE_DB.""" + mgr = constructor(bbr_status=BGP_BBR_STATUS_ENABLED) + attr = ( + ('bbr-required', 'false'), + ('summary-only', 'false'), + ('as-set', 'false'), + ('aggregate-address-prefix-list', ''), + ('contributing-address-prefix-list', ''), + ) + # Set invalid prefix -> state = inactive + set_del_test(mgr, "SET", (bad_prefix, attr), None) + assert mgr.address_table.get(bad_prefix)[1]["state"] == "inactive" + + # Del should NOT push any commands to FRR + set_del_test(mgr, "DEL", (bad_prefix,), None) + + # STATE_DB entry should be cleaned up + assert bad_prefix not in mgr.address_table.getKeys() diff --git a/src/sonic-bgpcfgd/tests/test_bfdmgr.py b/src/sonic-bgpcfgd/tests/test_bfdmgr.py index 6f2ff2009e3..1991b8bc293 100644 --- a/src/sonic-bgpcfgd/tests/test_bfdmgr.py +++ b/src/sonic-bgpcfgd/tests/test_bfdmgr.py @@ -45,6 +45,7 @@ def test_check_and_start_bfdd_stopped(mocked_log_warn, mocked_check_output, mock '/usr/lib/frr/bfdd', '-A', '127.0.0.1', '-d' ] assert bfd_mgr.check_and_start_bfdd() == True + mocked_check_output.assert_called_with(["pgrep", "-x", "bfdd"]) mocked_run_command.assert_called_once_with(cmd) mocked_log_warn.assert_called_with("bfdd process is not running, starting now...") diff --git a/src/sonic-bgpcfgd/tests/test_bfdmon.py b/src/sonic-bgpcfgd/tests/test_bfdmon.py index 7651e9ad70e..d98570b530c 100644 --- a/src/sonic-bgpcfgd/tests/test_bfdmon.py +++ b/src/sonic-bgpcfgd/tests/test_bfdmon.py @@ -23,6 +23,7 @@ def test_constructor(bfd_mon): def test_check_bfdd(mocked_getstatusoutput, bfd_mon): result = bfd_mon.check_bfdd() assert result == True + mocked_getstatusoutput.assert_called_once_with(["pgrep", "-x", "bfdd"]) @patch('bfdmon.bfdmon.getstatusoutput_noshell', return_value=(1, "")) def test_check_bfdd_failure(mocked_getstatusoutput, bfd_mon): diff --git a/src/sonic-bgpcfgd/tests/test_bgp.py b/src/sonic-bgpcfgd/tests/test_bgp.py index e66c5621c4b..28bda36ca4f 100644 --- a/src/sonic-bgpcfgd/tests/test_bgp.py +++ b/src/sonic-bgpcfgd/tests/test_bgp.py @@ -115,11 +115,13 @@ def test_add_peer_internal(): res = m.set_handler("30.30.30.1", {'asn': '65200', 'holdtime': '180', 'keepalive': '60', 'local_addr': '30.30.30.30', 'name': 'TOR', 'nhopself': '0', 'rrclient': '0'}) assert res, "Expect True return value" -def test_add_peer_internal_no_router_id_no_lo4096(): +@patch('bgpcfgd.managers_bgp.log_info') +def test_add_peer_internal_no_router_id_no_lo4096(mocked_log_info): for constant in load_constant_files(): m = constructor(constant, peer_type="internal") res = m.set_handler("30.30.30.1", {'asn': '65200', 'holdtime': '180', 'keepalive': '60', 'local_addr': '30.30.30.30', 'name': 'TOR', 'nhopself': '0', 'rrclient': '0'}) assert not res, "Expect False return value" + mocked_log_info.assert_called_with("Additional loopbacks acquired for peer internal, loopback list ['Loopback0', 'Loopback4096']") def test_add_peer_internal_router_id(): for constant in load_constant_files(): @@ -137,11 +139,15 @@ def test_add_peer_router_id(): res = m.set_handler("30.30.30.1", {'asn': '65200', 'holdtime': '180', 'keepalive': '60', 'local_addr': '30.30.30.30', 'name': 'TOR', 'nhopself': '0', 'rrclient': '0'}) assert res, "Expect True return value" -def test_add_peer_without_lo_ipv4(): +@patch('bgpcfgd.managers_bgp.log_info') +@patch('bgpcfgd.managers_bgp.log_warn') +def test_add_peer_without_lo_ipv4(mocked_log_warn, mocked_log_info): for constant in load_constant_files(): m = constructor(constant, with_lo0_ipv4=False) res = m.set_handler("30.30.30.1", {'asn': '65200', 'holdtime': '180', 'keepalive': '60', 'local_addr': '30.30.30.30', 'name': 'TOR', 'nhopself': '0', 'rrclient': '0'}) assert not res, "Expect False return value" + mocked_log_info.assert_called_with("No additional loopbacks acquired for peer general, loopback list ['Loopback0']") + mocked_log_warn.assert_called_with("Loopback0 ipv4 address is not presented yet and bgp_router_id not configured") def test_add_peer_without_lo_ipv4_router_id(): for constant in load_constant_files(): diff --git a/src/sonic-bgpcfgd/tests/test_bgpmon.py b/src/sonic-bgpcfgd/tests/test_bgpmon.py new file mode 100644 index 00000000000..9986c119dac --- /dev/null +++ b/src/sonic-bgpcfgd/tests/test_bgpmon.py @@ -0,0 +1,76 @@ +import pytest +import json +from unittest.mock import MagicMock, patch, call +import syslog +import bgpmon.bgpmon +from bgpmon.bgpmon import BgpStateGet + + +@pytest.fixture +@patch('swsscommon.swsscommon.RedisPipeline') +@patch('swsscommon.swsscommon.SonicV2Connector') +def bgp_mon(mock_conn, mock_pipe): + mock_db = mock_conn.return_value + mock_db.STATE_DB = 'STATE_DB' + m = BgpStateGet() + return m + + +@patch('bgpmon.bgpmon.getstatusoutput_noshell', return_value=(1, "")) +@patch('os.system', return_value=1) +@patch('syslog.syslog') +def test_vtysh_fail_both_daemons_down(mocked_syslog, mocked_os_system, mocked_cmd, bgp_mon): + """When vtysh fails and neither bgpd nor zebra is running, log WARNING.""" + bgp_mon.get_all_neigh_states() + mocked_syslog.assert_called_once() + level, msg = mocked_syslog.call_args[0] + assert level == syslog.LOG_WARNING + assert "bgpd or zebra not running" in msg + assert "container may be shutting down" in msg + + +@patch('bgpmon.bgpmon.getstatusoutput_noshell', return_value=(1, "")) +@patch('os.system', return_value=0) +@patch('syslog.syslog') +def test_vtysh_fail_both_daemons_running(mocked_syslog, mocked_os_system, mocked_cmd, bgp_mon): + """When vtysh fails but bgpd and zebra ARE running, log ERR.""" + bgp_mon.get_all_neigh_states() + mocked_syslog.assert_called_once() + level, msg = mocked_syslog.call_args[0] + assert level == syslog.LOG_ERR + assert "*ERROR* Failed with rc:1 when execute" in msg + + +@patch('bgpmon.bgpmon.getstatusoutput_noshell', return_value=(1, "")) +@patch('os.system', side_effect=[1, 0]) +@patch('syslog.syslog') +def test_vtysh_fail_only_bgpd_down(mocked_syslog, mocked_os_system, mocked_cmd, bgp_mon): + """When vtysh fails and only bgpd is down (first pgrep fails), log WARNING.""" + bgp_mon.get_all_neigh_states() + mocked_syslog.assert_called_once() + level, msg = mocked_syslog.call_args[0] + assert level == syslog.LOG_WARNING + assert "bgpd or zebra not running" in msg + + +@patch('bgpmon.bgpmon.getstatusoutput_noshell', return_value=(1, "")) +@patch('os.system', side_effect=[0, 1]) +@patch('syslog.syslog') +def test_vtysh_fail_only_zebra_down(mocked_syslog, mocked_os_system, mocked_cmd, bgp_mon): + """When vtysh fails and only zebra is down (second pgrep fails), log WARNING.""" + bgp_mon.get_all_neigh_states() + mocked_syslog.assert_called_once() + level, msg = mocked_syslog.call_args[0] + assert level == syslog.LOG_WARNING + assert "bgpd or zebra not running" in msg + + +@patch('bgpmon.bgpmon.getstatusoutput_noshell', return_value=(1, "some vtysh error output here")) +@patch('os.system', return_value=1) +@patch('syslog.syslog') +def test_vtysh_fail_warning_includes_output(mocked_syslog, mocked_os_system, mocked_cmd, bgp_mon): + """WARNING message includes truncated vtysh output.""" + bgp_mon.get_all_neigh_states() + level, msg = mocked_syslog.call_args[0] + assert level == syslog.LOG_WARNING + assert "some vtysh error output here" in msg diff --git a/src/sonic-bgpcfgd/tests/test_prefix_list.py b/src/sonic-bgpcfgd/tests/test_prefix_list.py index 9f1ef6a48c9..58e4682c0fc 100644 --- a/src/sonic-bgpcfgd/tests/test_prefix_list.py +++ b/src/sonic-bgpcfgd/tests/test_prefix_list.py @@ -4,6 +4,10 @@ from bgpcfgd.directory import Directory from bgpcfgd.template import TemplateFabric from . import swsscommon_test + +import sys +sys.modules["swsscommon"] = swsscommon_test + from swsscommon import swsscommon from bgpcfgd.managers_prefix_list import PrefixListMgr @@ -67,4 +71,90 @@ def test_del_handler_ipv6(mocked_log_debug): m = constructor() set_handler_test(m, "ANCHOR_PREFIX|fc02:100::/64", {}) del_handler_test(m, "ANCHOR_PREFIX|fc02:100::/64") - mocked_log_debug.assert_called_with("PrefixListMgr:: Anchor prefix fc02:100::/64 removed from radian configuration") \ No newline at end of file + mocked_log_debug.assert_called_with("PrefixListMgr:: Anchor prefix fc02:100::/64 removed from radian configuration") + +def constructor_with_constants(constants): + cfg_mgr = MagicMock() + common_objs = { + 'directory': Directory(), + 'cfg_mgr': cfg_mgr, + 'tf': TemplateFabric(TEMPLATE_PATH), + 'constants': constants, + } + m = PrefixListMgr(common_objs, "CONFIG_DB", "PREFIX_LIST") + m.directory.put("CONFIG_DB", swsscommon.CFG_DEVICE_METADATA_TABLE_NAME, "localhost", + {"bgp_asn": "65100", "type": "ToRRouter", "subtype": ""}) + return m + +@patch('bgpcfgd.managers_prefix_list.log_warn') +def test_unsupported_prefix_type(mocked_log_warn): + m = constructor_with_constants({}) + set_handler_test(m, "UNKNOWN_TYPE|10.0.0.0/24", {}) + mocked_log_warn.assert_called_with("PrefixListMgr:: Prefix type 'UNKNOWN_TYPE' is not supported") + +@patch('bgpcfgd.managers_prefix_list.log_warn') +def test_anchor_prefix_wrong_device(mocked_log_warn): + m = constructor_with_constants({}) + set_handler_test(m, "ANCHOR_PREFIX|192.168.0.0/24", {}) + mocked_log_warn.assert_called_with("PrefixListMgr:: Device type ToRRouter not supported for ANCHOR_PREFIX") + +@patch('bgpcfgd.managers_prefix_list.log_debug') +def test_suppress_prefix_ipv4(mocked_log_debug): + m = constructor_with_constants({}) + set_handler_test(m, "SUPPRESS_PREFIX|10.0.0.0/24", {}) + mocked_log_debug.assert_called_with("PrefixListMgr:: Suppress prefix 10.0.0.0/24 added to suppress_prefix configuration") + +@patch('bgpcfgd.managers_prefix_list.log_debug') +def test_suppress_prefix_ipv6(mocked_log_debug): + m = constructor_with_constants({}) + set_handler_test(m, "SUPPRESS_PREFIX|fc00::/64", {}) + mocked_log_debug.assert_called_with("PrefixListMgr:: Suppress prefix fc00::/64 added to suppress_prefix configuration") + +@patch('bgpcfgd.managers_prefix_list.log_debug') +def test_suppress_prefix_del_ipv4(mocked_log_debug): + m = constructor_with_constants({}) + set_handler_test(m, "SUPPRESS_PREFIX|10.0.0.0/24", {}) + del_handler_test(m, "SUPPRESS_PREFIX|10.0.0.0/24") + mocked_log_debug.assert_called_with("PrefixListMgr:: Suppress prefix 10.0.0.0/24 removed from suppress_prefix configuration") + +@patch('bgpcfgd.managers_prefix_list.log_debug') +def test_suppress_prefix_del_ipv6(mocked_log_debug): + m = constructor_with_constants({}) + set_handler_test(m, "SUPPRESS_PREFIX|fc00::/64", {}) + del_handler_test(m, "SUPPRESS_PREFIX|fc00::/64") + mocked_log_debug.assert_called_with("PrefixListMgr:: Suppress prefix fc00::/64 removed from suppress_prefix configuration") + +@patch('bgpcfgd.managers_prefix_list.log_debug') +def test_suppress_prefix_any_device(mocked_log_debug): + m = constructor() + set_handler_test(m, "SUPPRESS_PREFIX|10.0.0.0/24", {}) + mocked_log_debug.assert_called_with("PrefixListMgr:: Suppress prefix 10.0.0.0/24 added to suppress_prefix configuration") + +@patch('bgpcfgd.managers_prefix_list.log_debug') +def test_suppress_prefix_constants_override(mocked_log_debug): + constants = {"bgp": {"prefix_list": {"SUPPRESS_PREFIX": { + "ipv4_name": "CUSTOM_IPV4_PREFIX", + "ipv6_name": "CUSTOM_IPV6_PREFIX"}}}} + m = constructor_with_constants(constants) + set_handler_test(m, "SUPPRESS_PREFIX|10.0.0.0/24", {}) + push_call = m.cfg_mgr.push.call_args[0][0] + assert "CUSTOM_IPV4_PREFIX" in push_call + assert "SUPPRESS_IPV4_PREFIX" not in push_call + +@patch('bgpcfgd.managers_prefix_list.log_debug') +def test_suppress_prefix_constants_override_ipv6(mocked_log_debug): + constants = {"bgp": {"prefix_list": {"SUPPRESS_PREFIX": { + "ipv4_name": "CUSTOM_IPV4_PREFIX", + "ipv6_name": "CUSTOM_IPV6_PREFIX"}}}} + m = constructor_with_constants(constants) + set_handler_test(m, "SUPPRESS_PREFIX|fc00::/64", {}) + push_call = m.cfg_mgr.push.call_args[0][0] + assert "CUSTOM_IPV6_PREFIX" in push_call + assert "SUPPRESS_IPV6_PREFIX" not in push_call + +@patch('bgpcfgd.managers_prefix_list.log_debug') +def test_suppress_prefix_no_constants_fallback(mocked_log_debug): + m = constructor_with_constants({}) + set_handler_test(m, "SUPPRESS_PREFIX|10.0.0.0/24", {}) + push_call = m.cfg_mgr.push.call_args[0][0] + assert "SUPPRESS_IPV4_PREFIX" in push_call diff --git a/src/sonic-bgpcfgd/tests/test_sonic-cfggen.py b/src/sonic-bgpcfgd/tests/test_sonic-cfggen.py index b259f41baf1..f08e24f3154 100644 --- a/src/sonic-bgpcfgd/tests/test_sonic-cfggen.py +++ b/src/sonic-bgpcfgd/tests/test_sonic-cfggen.py @@ -217,4 +217,83 @@ def test_prefix_list_del_radian(): run_test("Del radian configuration", "bgpd/radian/del_radian.conf.j2", "radian/del_radian.json", - "radian/del_radian.conf") \ No newline at end of file + "radian/del_radian.conf") + +def test_bgp_confed_ut2_multi_asic(): + run_test("BGP Confederation Upper T2 Multi-ASIC", + "bgpd/bgpd.main.conf.j2", + "bgpd.main.conf.j2/multi_asic_upper_t2.json", + "bgpd.main.conf.j2/multi_asic_upper_t2.conf") + +def test_bgp_confed_ut2_single_asic(): + run_test("BGP Confederation Upper T2 Single-ASIC", + "bgpd/bgpd.main.conf.j2", + "bgpd.main.conf.j2/single_asic_upper_t2.json", + "bgpd.main.conf.j2/single_asic_upper_t2.conf") + +def test_bgp_confed_lt2_single_asic(): + run_test("BGP Confederation Lower T2 Single-ASIC", + "bgpd/bgpd.main.conf.j2", + "bgpd.main.conf.j2/single_asic_lt2.json", + "bgpd.main.conf.j2/single_asic_lt2.conf") + +def test_bgp_confed_ft2_single_asic(): + run_test("BGP Confederation Fabric T2 Single-ASIC", + "bgpd/bgpd.main.conf.j2", + "bgpd.main.conf.j2/single_asic_ft2.json", + "bgpd.main.conf.j2/single_asic_ft2.conf") + +def test_bgp_confed_lrh_single_asic(): + run_test("BGP Confederation LowerRegionalHub Single-ASIC", + "bgpd/bgpd.main.conf.j2", + "bgpd.main.conf.j2/single_asic_lrh.json", + "bgpd.main.conf.j2/single_asic_lrh.conf") + +def test_bgp_confed_frh_single_asic(): + run_test("BGP Confederation FabricRegionalHub Single-ASIC", + "bgpd/bgpd.main.conf.j2", + "bgpd.main.conf.j2/single_asic_frh.json", + "bgpd.main.conf.j2/single_asic_frh.conf") + +def test_bgp_confed_urh_single_asic(): + run_test("BGP Confederation UpperRegionalHub Single-ASIC", + "bgpd/bgpd.main.conf.j2", + "bgpd.main.conf.j2/single_asic_urh.json", + "bgpd.main.conf.j2/single_asic_urh.conf") + +def _render_bgpd_main(json_path): + template_path = os.path.join(TEMPLATE_PATH, "bgpd/bgpd.main.conf.j2") + json_full_path = os.path.join(DATA_PATH, json_path) + command = ['sonic-cfggen', "-T", TEMPLATE_PATH, "-t", template_path, "-y", json_full_path] + p = subprocess.Popen(command, shell=False, stdout=subprocess.PIPE, stderr=subprocess.PIPE) + stdout, stderr = p.communicate() + assert p.returncode == 0, "sonic-cfggen returned %d. stderr=%r" % (p.returncode, stderr) + return stdout.decode("ascii") + +def test_bgpd_main_llgr_helper_emitted_on_urh(): + """LLGR helper-only block must be emitted for UpperRegionalHub.""" + rendered = _render_bgpd_main("bgpd.main.conf.j2/single_asic_urh.json") + assert "bgp graceful-restart-disable" in rendered, \ + "Expected 'bgp graceful-restart-disable' on UpperRegionalHub, got:\n%s" % rendered + assert "bgp long-lived-graceful-restart stale-time 864000" in rendered, \ + "Expected 'bgp long-lived-graceful-restart stale-time 864000' on UpperRegionalHub, got:\n%s" % rendered + +def test_bgpd_main_llgr_helper_absent_on_non_urh(): + """LLGR helper-only block must NOT be emitted for any non-UpperRegionalHub type.""" + non_urh_fixtures = [ + "bgpd.main.conf.j2/all.json", # ToRRouter + "bgpd.main.conf.j2/defaults.json", # ToRRouter + "bgpd.main.conf.j2/single_asic_lt2.json", # LowerSpineRouter + "bgpd.main.conf.j2/single_asic_ft2.json", # FabricSpineRouter + "bgpd.main.conf.j2/single_asic_lrh.json", # LowerRegionalHub + "bgpd.main.conf.j2/single_asic_frh.json", # FabricRegionalHub + "bgpd.main.conf.j2/single_asic_upper_t2.json", # UpperSpineRouter + "bgpd.main.conf.j2/voq_chassis.json", # SpineRouter + "bgpd.main.conf.j2/base.json", # type unset + ] + for fixture in non_urh_fixtures: + rendered = _render_bgpd_main(fixture) + assert "bgp graceful-restart-disable" not in rendered, \ + "%s must not contain 'bgp graceful-restart-disable'" % fixture + assert "long-lived-graceful-restart" not in rendered, \ + "%s must not contain 'long-lived-graceful-restart'" % fixture diff --git a/src/sonic-bmp b/src/sonic-bmp index c4eeaebc92a..12e8c3958f6 160000 --- a/src/sonic-bmp +++ b/src/sonic-bmp @@ -1 +1 @@ -Subproject commit c4eeaebc92a9afe8251b0c61782f0b259fb08f23 +Subproject commit 12e8c3958f6dfb6482509adee2718db8ea40ace6 diff --git a/src/sonic-bmpcfgd/setup.py b/src/sonic-bmpcfgd/setup.py index 193b2094722..cee675d3b87 100644 --- a/src/sonic-bmpcfgd/setup.py +++ b/src/sonic-bmpcfgd/setup.py @@ -22,8 +22,7 @@ install_requires = [ 'jinja2>=2.10', 'netaddr==0.8.0', - 'pyyaml==6.0.1', - 'ipaddress==1.0.23' + 'pyyaml>=6.0.1', ], entry_points={ 'console_scripts': [ diff --git a/src/sonic-build-hooks/hooks/apt-get b/src/sonic-build-hooks/hooks/apt-get index 3f099375c07..440ffbb02fd 100755 --- a/src/sonic-build-hooks/hooks/apt-get +++ b/src/sonic-build-hooks/hooks/apt-get @@ -20,8 +20,9 @@ if [ "$INSTALL" == y ]; then [ "$lock_result" == y ] && release_apt_installation_lock exit $command_result else - if [[ " $@ " == *" purge "* || " $@ " == *" remove "* ]]; then - # When running the purge command, collect the debian versions + if [[ " $@ " == *" purge "* || " $@ " == *" remove "* || " $@ " == *" autoremove "* ]]; then + # When running purge/remove/autoremove, collect the debian versions + # so intermediate packages are captured for reproducible builds dpkg-query -W -f '${Package}==${Version}\n' >> $POST_VERSION_PATH/purge-versions-deb chmod a+wr $POST_VERSION_PATH/purge-versions-deb fi diff --git a/src/sonic-build-hooks/scripts/buildinfo_base.sh b/src/sonic-build-hooks/scripts/buildinfo_base.sh index cd951363747..7ce93949a77 100755 --- a/src/sonic-build-hooks/scripts/buildinfo_base.sh +++ b/src/sonic-build-hooks/scripts/buildinfo_base.sh @@ -11,7 +11,6 @@ POST_VERSION_PATH=$BUILDINFO_PATH/post-versions VERSION_DEB_PREFERENCE=$BUILDINFO_PATH/versions/01-versions-deb WEB_VERSION_FILE=$VERSION_PATH/versions-web BUILD_WEB_VERSION_FILE=$BUILD_VERSION_PATH/versions-web -REPR_MIRROR_URL_PATTERN='http:\/\/packages.trafficmanager.net\/' DPKG_INSTALLTION_LOCK_FILE=/tmp/.dpkg_installation.lock GET_RETRY_COUNT=5 @@ -34,7 +33,7 @@ PKG_CACHE_FILE_NAME=${PKG_CACHE_PATH}/cache.tgz . ${BUILDINFO_PATH}/scripts/utils.sh -URL_PREFIX=$(echo "${PACKAGE_URL_PREFIX}" | sed -E "s#(//[^/]*/).*#\1#") +URL_PREFIX=$(echo "${BUILD_PACKAGES_URL}" | sed -E "s#(//[^/]*/).*#\1#") log_err() { @@ -112,15 +111,15 @@ get_version_cache_option() set_reproducible_mirrors() { # Remove the charater # in front of the line if matched - local expression="s/^#\s*\(.*$REPR_MIRROR_URL_PATTERN\)/\1/" + local expression="s,^#\s*\(.*$BUILD_SNAPSHOT_URL\),\1," # Add the character # in front of the line, if not match the URL pattern condition - local expression2="/^#*deb.*$REPR_MIRROR_URL_PATTERN/! s/^#*deb/#&/" + local expression2="\,^#*deb.*$BUILD_SNAPSHOT_URL,! s,^#*deb,#&," local expression3="\$a#SET_REPR_MIRRORS" if [ "$1" = "-d" ]; then # Add the charater # in front of the line if match - expression="s/^deb.*$REPR_MIRROR_URL_PATTERN/#\0/" + expression="s,^deb.*$BUILD_SNAPSHOT_URL,#\0," # Remove the character # in front of the line, if not match the URL pattern condition - expression2="/^#*deb.*$REPR_MIRROR_URL_PATTERN/! s/^#\s*(#*deb)/\1/" + expression2="\,^#*deb.*$BUILD_SNAPSHOT_URL,! s,^#\s*(#*deb),\1," expression3="/#SET_REPR_MIRRORS/d" fi if [[ "$1" != "-d" ]] && [ -f /etc/apt/sources.list.d/debian.sources ]; then @@ -132,7 +131,7 @@ set_reproducible_mirrors() local mirrors="/etc/apt/sources.list $(find /etc/apt/sources.list.d/ -type f)" for mirror in $mirrors; do - if ! grep -iq "$REPR_MIRROR_URL_PATTERN" "$mirror"; then + if ! grep -iq "$BUILD_SNAPSHOT_URL" "$mirror"; then continue fi @@ -212,7 +211,7 @@ download_packages() else local version_filename="${filename}-${version}" - local proxy_url="${PACKAGE_URL_PREFIX}/${version_filename}" + local proxy_url="${BUILD_PACKAGES_URL}/${version_filename}" local url_exist=$(check_if_url_exist $proxy_url) if [ "$url_exist" == y ]; then parameters[$i]=$proxy_url @@ -350,6 +349,10 @@ run_pip_command() parameters+=("${tmp_version_file}") fi + if [ "$install" == "y" ] && [ "$ENABLE_VERSION_CONTROL_PY" == "y" ]; then + parameters+=("--no-build-isolation") + fi + if [ ! -z "$(get_version_cache_option)" ]; then FLOCK ${PIP_CACHE_PATH} $REAL_COMMAND ${PKG_CACHE_OPTION} "${parameters[@]}" @@ -424,7 +427,7 @@ check_dpkg_need_lock() # Print warning message if a debian package version not specified when debian version control enabled. check_apt_version() { - VERSION_FILE="${VERSION_PATH}/versions-deb" + local VERSION_FILE="${VERSION_PATH}/versions-deb" local install=$(check_apt_install "$@") if [ "$ENABLE_VERSION_CONTROL_DEB" == "y" ] && [ "$install" == "y" ]; then for para in "$@" @@ -441,7 +444,7 @@ check_apt_version() continue else package=$para - if ! grep -q "^${package}=" $VERSION_FILE; then + if ! grep -q "^${package}==" "$VERSION_FILE"; then echo "Warning: the version of the package ${package} is not specified." 1>&2 fi fi @@ -488,6 +491,9 @@ update_preference_deb() for pacakge_version in $(cat "$version_file"); do package=$(echo $pacakge_version | awk -F"==" '{print $1}') version=$(echo $pacakge_version | awk -F"==" '{print $2}') + # Strip +fips suffix — FIPS packages are locally rebuilt + # and not available from Debian apt repos + version="${version%+fips}" echo -e "Package: $package\nPin: version $version\nPin-Priority: 999\n\n" >> $VERSION_DEB_PREFERENCE done fi @@ -505,7 +511,10 @@ update_version_file() [ -f "$version_file" ] && package_versions="$package_versions $(cat $version_file)" declare -A versions for pacakge_version in $package_versions; do - package=$(echo $pacakge_version | awk -F"==" '{print $1}') + # convert package name to lower case to avoid the issue caused by the case sensitivity of pip package name + #for example, "PyYAML" and "pyyaml" are the same package but with different case, + # which will cause the issue when we merge the versions pyyaml==6.0.1 and PyYAML==6.0.3. + package=$(echo $pacakge_version | awk -F"==" '{print $1}' | tr '[:upper:]' '[:lower:]') version=$(echo $pacakge_version | awk -F"==" '{print $2}') if [ -z "$package" ] || [ -z "$version" ]; then continue diff --git a/src/sonic-build-hooks/scripts/collect_version_files b/src/sonic-build-hooks/scripts/collect_version_files index 6d14a7577d9..bd73ef3273f 100755 --- a/src/sonic-build-hooks/scripts/collect_version_files +++ b/src/sonic-build-hooks/scripts/collect_version_files @@ -32,6 +32,107 @@ while read -r line; do echo "$mirror==$date" >> ${TARGET_PATH}/versions-mirror done < <(grep Date: /var/lib/apt/lists/*_InRelease 2>/dev/null) +## SBOM enrichment: emit a richer per-package TSV alongside the simple +## name==version list. Gated by ENABLE_SBOM=y so non-SBOM builds incur +## zero overhead. Inside each container, /var/lib/apt/lists/ is still +## populated at this point (post_run_buildinfo runs before apt-get +## clean), so apt-cache can resolve SHA256 + Filename for the actual +## binary that was installed in *this* container — important because +## each container may have its own mirror snapshot pin. +## +## Performance: one bulk `apt-cache show pkg1=ver1 pkg2=ver2 ...` call +## per container (1-2 seconds total) instead of one fork per package. +## Output columns: Package, Version, Architecture, Source, SourceVersion, +## Maintainer, Homepage, Filename, SHA256. +if [ "${ENABLE_SBOM:-n}" = "y" ]; then + # License harvest: snapshot /usr/share/doc/*/copyright before any + # cleanup phase runs. apt-autoremove in docker-base layers does NOT + # strip docs by default, so the files survive into the container. + # We tar them up so they ride out via collect_docker_version_files.sh. + sbom_copyrights="${TARGET_PATH}/copyrights.tar.gz" + find /usr/share/doc -name copyright -print0 2>/dev/null \ + | tar --null --no-recursion -czf "$sbom_copyrights" \ + --files-from=- 2>/dev/null \ + || true + + # Lockfile harvest: snapshot any language-ecosystem lockfiles that + # describe transitive deps compiled into this container. Each format + # is the de-facto SBOM source for its ecosystem: + # go.sum (Go modules) — module name+version+h1-sha256 + # package-lock.json (npm) + # pnpm-lock.yaml (pnpm) + # yarn.lock (yarn) + # + # Cargo.lock is NOT harvested here — Rust crate attribution is + # done at recipe-emit time by scripts/sbom_fragment.py via + # rust-audit-info on the cargo-auditable .dep-v0 ELF section + # inside each SONiC-built .deb. That gives per-.deb precision + # (the exact resolved subset that actually shipped, scoped to + # the .deb that bundles the binary), which a workspace-level + # Cargo.lock walk cannot. Cargo.lock harvest is also noisy here + # because the slave container's filesystem contains build-tool + # lockfiles unrelated to anything SONiC ships. + # + # We skip /proc, /sys, /tmp, /var/cache, and the sonic build cache + # directories so we don't pick up build-tooling lockfiles. + sbom_lockfiles="${TARGET_PATH}/lockfiles.tar.gz" + # Walk only the paths where SONiC components actually put source + # trees with lockfiles, rather than the whole `/`. This avoids + # picking up unrelated lockfiles from system packages and is + # significantly faster on a large slave container. Any of these + # paths that don't exist in a given container are silently skipped + # by find. Specific exclusions still prune build-output dirs. + sbom_lockfile_roots=() + for r in /sonic /usr /etc /root /home /opt; do + [ -d "$r" ] && sbom_lockfile_roots+=("$r") + done + if [ ${#sbom_lockfile_roots[@]} -gt 0 ]; then + find "${sbom_lockfile_roots[@]}" \ + \( -path /sonic/target -o -path /sonic/dpkg \ + -o -path '*/node_modules' -o -path /var/cache \) -prune -o \ + \( -name 'go.sum' \ + -o -name 'package-lock.json' -o -name 'pnpm-lock.yaml' \ + -o -name 'yarn.lock' \) -type f -print0 2>/dev/null \ + | tar --null --no-recursion -czf "$sbom_lockfiles" \ + --files-from=- 2>/dev/null \ + || true + fi + + sbom_tsv_dpkg="${TARGET_PATH}/.sbom-dpkg-${DIST}-${ARCH}.tsv" + sbom_tsv_apt="${TARGET_PATH}/.sbom-apt-${DIST}-${ARCH}.tsv" + sbom_tsv_final="${TARGET_PATH}/sbom-pkgs-${DIST}-${ARCH}.tsv" + + # dpkg-known fields (cheap, single dpkg-query call). + dpkg-query -W -f='${Package}\t${Version}\t${Architecture}\t${source:Package}\t${source:Version}\t${Maintainer}\t${Homepage}\n' \ + | grep -Ev "${SKIP_VERSION_PACKAGE}" | sort -u > "$sbom_tsv_dpkg" 2>/dev/null || true + + # Bulk apt-cache call for SHA256 + Filename. One fork, one cache load. + # awk parses the multi-record RFC822 output keyed by Package=Version. + awk -F'\t' '{print $1"="$2}' "$sbom_tsv_dpkg" 2>/dev/null \ + | xargs -r apt-cache show 2>/dev/null \ + | awk ' + BEGIN { RS=""; FS="\n" } + { + pkg=""; ver=""; sha=""; fn=""; + for (i=1; i<=NF; i++) { + if ($i ~ /^Package: /) pkg = substr($i, 10); + else if ($i ~ /^Version: /) ver = substr($i, 10); + else if ($i ~ /^SHA256: /) sha = substr($i, 9); + else if ($i ~ /^Filename: /) fn = substr($i, 11); + } + if (pkg != "" && ver != "") print pkg"="ver"\t"sha"\t"fn; + } + ' | sort -u > "$sbom_tsv_apt" 2>/dev/null || true + + # Join: emit final 9-column TSV. + awk -F'\t' ' + FNR==NR { meta[$1"="$2] = $0; next } + { if ($1 in meta) print meta[$1]"\t"$3"\t"$2 } + ' "$sbom_tsv_dpkg" "$sbom_tsv_apt" > "$sbom_tsv_final" 2>/dev/null || true + + rm -f "$sbom_tsv_dpkg" "$sbom_tsv_apt" +fi + ## Print the unique and sorted result sort -u "${TARGET_PATH}/versions-deb-${DIST}-${ARCH}" -o "${TARGET_PATH}/versions-deb-${DIST}-${ARCH}" if [ -e "${TARGET_PATH}/versions-py2-${DIST}-${ARCH}" ]; then diff --git a/src/sonic-config-engine/asic_sensors_config.py b/src/sonic-config-engine/asic_sensors_config.py index 49ed513d0ff..37b3a83ea80 100644 --- a/src/sonic-config-engine/asic_sensors_config.py +++ b/src/sonic-config-engine/asic_sensors_config.py @@ -23,9 +23,12 @@ def get_asic_sensors_config(): if os.environ.get("CFGGEN_UNIT_TESTING") == "2": json_file = os.path.join(tests_path, "data", "asic_sensors", "platform.json") else: - platform_path = device_info.get_path_to_platform_dir() + try: + platform_path = device_info.get_path_to_platform_dir() + except OSError: + return config json_file = os.path.join(platform_path, device_info.PLATFORM_JSON_FILE) - + if not os.path.exists(json_file): return config diff --git a/src/sonic-config-engine/config_samples.py b/src/sonic-config-engine/config_samples.py index b68bdb6923c..37a989abbe3 100644 --- a/src/sonic-config-engine/config_samples.py +++ b/src/sonic-config-engine/config_samples.py @@ -6,6 +6,8 @@ import smartswitch_config +from sonic_py_common import device_info + #TODO: Remove once Python 2 support is removed if sys.version_info.major == 3: UNICODE_TYPE = str @@ -81,6 +83,7 @@ def generate_t1_sample_config(data): def generate_t1_smartswitch_switch_sample_config(data, ss_config): data = generate_t1_sample_config(data) data['DEVICE_METADATA']['localhost']['subtype'] = 'SmartSwitch' + data['DEVICE_METADATA']['localhost']['dpu_auto_recovery'] = 'enable' mpbr_prefix = '169.254.200' mpbr_address = '{}.254'.format(mpbr_prefix) @@ -219,7 +222,12 @@ def generate_empty_config(data): if 'hostname' not in new_data['DEVICE_METADATA']['localhost']: new_data['DEVICE_METADATA']['localhost']['hostname'] = 'sonic' if 'type' not in new_data['DEVICE_METADATA']['localhost']: - new_data['DEVICE_METADATA']['localhost']['type'] = 'LeafRouter' + # Switch-BMC platforms (switch_bmc=1) must be NetworkBmc so the device + # self-identifies as a BMC; others keep the LeafRouter default. + if device_info.is_switch_bmc(): + new_data['DEVICE_METADATA']['localhost']['type'] = 'NetworkBmc' + else: + new_data['DEVICE_METADATA']['localhost']['type'] = 'LeafRouter' return new_data def generate_global_dualtor_tables(): diff --git a/src/sonic-config-engine/minigraph.py b/src/sonic-config-engine/minigraph.py index cd8cff3eec1..2fa808ae745 100644 --- a/src/sonic-config-engine/minigraph.py +++ b/src/sonic-config-engine/minigraph.py @@ -966,7 +966,7 @@ def parse_dpg(dpg, hname): intfs_inpc.append(pcmbr_list[i]) pc_members[(pcintfname, pcmbr_list[i])] = {} if pcintf.find(str(QName(ns, "Fallback"))) != None: - pcs[pcintfname] = {'fallback': pcintf.find(str(QName(ns, "Fallback"))).text, 'min_links': str(int(math.ceil(len() * 0.75))), 'lacp_key': 'auto'} + pcs[pcintfname] = {'fallback': pcintf.find(str(QName(ns, "Fallback"))).text, 'min_links': str(int(math.ceil(len(pcmbr_list) * 0.75))), 'lacp_key': 'auto'} else: pcs[pcintfname] = {'min_links': str(int(math.ceil(len(pcmbr_list) * 0.75))), 'lacp_key': 'auto' } port_nhipv4_map = {} @@ -2188,7 +2188,7 @@ def parse_xml(filename, platform=None, port_config_file=None, asic_name=None, hw if bool(results['PEER_SWITCH']): results['DEVICE_METADATA']['localhost']['subtype'] = 'DualToR' if len(results['PEER_SWITCH'].keys()) > 1: - print("Warning: more than one peer switch was found. Only the first will be parsed: {}".format(results['PEER_SWITCH'].keys()[0])) + print("Warning: more than one peer switch was found. Only the first will be parsed: {}".format(next(iter(results['PEER_SWITCH']))), file=sys.stderr) results['DEVICE_METADATA']['localhost']['peer_switch'] = list(results['PEER_SWITCH'].keys())[0] elif results['DEVICE_METADATA']['localhost']['type'] == 'SpineRouter': @@ -2861,6 +2861,11 @@ def parse_device_desc_xml(filename): 'hostname': hostname, 'hwsku': hwsku, }} + if d_type: + if d_type in ('Linecard', 'Supervisor'): + results['DEVICE_METADATA']['localhost']['type'] = 'SpineRouter' + else: + results['DEVICE_METADATA']['localhost']['type'] = d_type results['LOOPBACK_INTERFACE'] = {'lo': {}, ('lo', lo_prefix): {}} if lo_prefix_v6: diff --git a/src/sonic-config-engine/setup.py b/src/sonic-config-engine/setup.py index 52b75c14b02..d91b4cefc09 100644 --- a/src/sonic-config-engine/setup.py +++ b/src/sonic-config-engine/setup.py @@ -12,7 +12,6 @@ # Common dependencies for Python 2 and 3 dependencies = [ 'bitarray==2.8.1', - 'ipaddress==1.0.23', 'lxml>=4.9.1', 'netaddr==0.8.0', ] @@ -39,9 +38,6 @@ 'future', 'Jinja2<3.0.0', 'pyangbind==0.6.0', - 'zipp==1.2.0', # importlib-resources needs zipp and seems to have a bug where it will try to install too new of a version for Python 2 - 'importlib-resources==3.3.1', # importlib-resources v4.0.0 was released 2020-12-23 and drops support for Python 2 - 'contextlib2==0.6.0.post1', # PyYAML 6.0 and newer dropped support for Python 2.7 'pyyaml==5.4.1', ] diff --git a/src/sonic-config-engine/smartswitch_config.py b/src/sonic-config-engine/smartswitch_config.py index 6c5202a59a0..a76d90c5a35 100644 --- a/src/sonic-config-engine/smartswitch_config.py +++ b/src/sonic-config-engine/smartswitch_config.py @@ -27,8 +27,13 @@ def get_smartswitch_config(hwsku=None): json_file = os.path.join(tests_path, "data", "smartswitch", "sample_switch_platform.json") elif hwsku == 'SS-DPU-1x400Gb': json_file = os.path.join(tests_path, "data", "smartswitch", "sample_dpu_platform.json") + else: + return config else: - platform_path = device_info.get_path_to_platform_dir() + try: + platform_path = device_info.get_path_to_platform_dir() + except OSError: + return config json_file = os.path.join(platform_path, device_info.PLATFORM_JSON_FILE) platform_json = portconfig.readJson(json_file) diff --git a/src/sonic-config-engine/sonic-cfggen b/src/sonic-config-engine/sonic-cfggen index 3f3e7de6dd0..1570def2ea2 100755 --- a/src/sonic-config-engine/sonic-cfggen +++ b/src/sonic-config-engine/sonic-cfggen @@ -33,7 +33,7 @@ from config_samples import generate_sample_config, get_available_config from functools import partial from minigraph import minigraph_encoder, parse_xml, parse_device_desc_xml, parse_asic_sub_role, parse_asic_switch_type, parse_hostname from portconfig import get_port_config, get_breakout_mode -from sonic_py_common.multi_asic import get_asic_id_from_name, get_asic_device_id, is_multi_asic +from sonic_py_common.multi_asic import get_asic_id_from_name, get_asic_device_id, is_multi_asic, get_asic_sub_role from sonic_py_common import device_info from swsscommon.swsscommon import ConfigDBConnector, SonicDBConfig, ConfigDBPipeConnector from asic_sensors_config import get_asic_sensors_config @@ -93,7 +93,10 @@ def prefix_attr(attr, value): prefix = netaddr.IPNetwork(str(value)) except: return None - return str(getattr(prefix, attr)) + result = getattr(prefix, attr) + if result is None: + return None + return str(result) def unique_name(l): name_list = [] @@ -316,6 +319,14 @@ def _get_jinja2_env(paths): return False env.globals['template_exists'] = template_exists + # Expose is_smartswitch flag into Jinja globals + try: + smartswitch_flag = device_info.is_smartswitch() + except Exception as e: + smartswitch_flag = False + sys.stderr.write("sonic-cfggen: is_smartswitch() detection failed: {}\n".format(e)) + env.globals['is_smartswitch'] = smartswitch_flag + return env def main(): @@ -350,13 +361,6 @@ def main(): platform = device_info.get_platform() data = {} - bmc_data = None - if platform: - bmc_data = device_info.get_bmc_data() - if bmc_data: - for key, value in bmc_data.items(): - deep_update(data, {'DEVICE_METADATA': {'bmc': {key:value}}}) - db_kwargs = {} if args.redis_unix_sock_file is not None: db_kwargs['unix_socket_path'] = args.redis_unix_sock_file @@ -479,6 +483,10 @@ def main(): else: hardware_data['DEVICE_METADATA']['localhost'].update(asic_id=device_id) + sub_role = get_asic_sub_role(asic_id) + if sub_role is not None: + hardware_data['DEVICE_METADATA']['localhost'].update(sub_role=sub_role) + deep_update(data, hardware_data) asic_sensors = {} diff --git a/src/sonic-config-engine/tests/data/constants.yml b/src/sonic-config-engine/tests/data/constants.yml new file mode 100644 index 00000000000..4ffbdedcb42 --- /dev/null +++ b/src/sonic-config-engine/tests/data/constants.yml @@ -0,0 +1,78 @@ +constants: + deployment_id_asn_map: + "1" : 65432 + "2" : 65433 + bgp: + traffic_shift_community: 12345:12345 + internal_community: 11111:11111 + internal_fallback_community: 22222:22222 + sentinel_community: 12345:12346 + internal_community_match_tag: 201 + local_anchor_route_community: 12345:555 + anchor_route_community: 12345:666 + anchor_contributing_route_community: 12345:777 + route_do_not_send_appdb_tag: 202 + route_eligible_for_fallback_to_default_tag: 203 + hide_internal_community: 55555:55555 + families: + - ipv4 + - ipv6 + use_deployment_id: false + use_neighbors_meta: false + graceful_restart: + enabled: true + restart_time: 240 + multipath_relax: + enabled: true + maximum_paths: + enabled: true + ipv4: 514 + ipv6: 514 + allow_list: + enabled: true + default_action: "permit" # or "deny" + drop_community: 5060:12345 # value of the community to identify a prefix to drop. Make sense only with allow_list_default_action equal to 'permit' + default_pl_rules: + v4: + - "deny 0.0.0.0/0 le 17" + - "permit 127.0.0.1/32" + v6: + - "deny 0::/0 le 59" + - "deny 0::/0 ge 65" + bbr: + enabled: true + default_state: "disabled" + peers: + general: # peer_type + db_table: "BGP_NEIGHBOR" + template_dir: "general" + bbr: + PEER_V4: + - ipv4 + PEER_V6: + - ipv6 + internal: # peer_type + db_table: "BGP_INTERNAL_NEIGHBOR" + template_dir: "internal" + monitors: # peer_type + enabled: true + db_table: "BGP_MONITORS" + peer_group: "BGPMON" + template_dir: "monitors" + dynamic: # peer_type + enabled: true + db_table: "BGP_PEER_RANGE" + peer_group: "BGP_SPEAKER" + template_dir: "dynamic" + voq_chassis: # peer_type + enabled: true + db_table: "BGP_VOQ_CHASSIS_NEIGHBOR" + template_dir: "voq_chassis" + sentinels: # peer_type + enabled: true + db_table: "BGP_SENTINELS" + template_dir: "sentinels" + prefix_list: + SUPPRESS_PREFIX: + ipv4_name: "SUPPRESS_IPV4_PREFIX" + ipv6_name: "SUPPRESS_IPV6_PREFIX" diff --git a/src/sonic-config-engine/tests/data/lldp/mgmt_iface_ipv4_with_ports.json b/src/sonic-config-engine/tests/data/lldp/mgmt_iface_ipv4_with_ports.json new file mode 100644 index 00000000000..d37129e2984 --- /dev/null +++ b/src/sonic-config-engine/tests/data/lldp/mgmt_iface_ipv4_with_ports.json @@ -0,0 +1,41 @@ +{ + "DEVICE_METADATA": { + "localhost": { + "hostname": "switch-t0" + } + }, + "MGMT_INTERFACE": { + "eth0|10.0.0.100/24": { + "gwaddr": "10.0.0.100" + } + }, + "PORT": { + "Ethernet0": { + "alias": "Ethernet1/1", + "speed": "100000" + }, + "Ethernet4": { + "alias": "Ethernet2/1", + "speed": "100000" + }, + "Ethernet8": { + "alias": "", + "speed": "100000" + }, + "Ethernet12": { + "speed": "100000" + }, + "Ethernet-IB0": { + "alias": "Ethernet-IB0", + "speed": "400000" + }, + "Ethernet-Rec0": { + "alias": "Ethernet-Rec0", + "speed": "400000" + }, + "Ethernet-BP0": { + "alias": "Ethernet-BP0", + "speed": "400000" + } + } +} diff --git a/src/sonic-config-engine/tests/sample-frh-b-o128-minigraph.xml b/src/sonic-config-engine/tests/sample-frh-b-o128-minigraph.xml new file mode 100644 index 00000000000..23fa6933819 --- /dev/null +++ b/src/sonic-config-engine/tests/sample-frh-b-o128-minigraph.xml @@ -0,0 +1,4426 @@ + + + + + + false + str4-7060x6-512-8 + 10.0.0.0 + ARISTA01LT2 + 10.0.0.1 + 1 + 10 + 3 + + + str4-7060x6-512-8 + FC00::1 + ARISTA01LT2 + FC00::2 + 1 + 10 + 3 + + + false + str4-7060x6-512-8 + 10.0.0.2 + ARISTA02LT2 + 10.0.0.3 + 1 + 10 + 3 + + + str4-7060x6-512-8 + FC00::5 + ARISTA02LT2 + FC00::6 + 1 + 10 + 3 + + + false + str4-7060x6-512-8 + 10.0.0.4 + ARISTA03LT2 + 10.0.0.5 + 1 + 10 + 3 + + + str4-7060x6-512-8 + FC00::9 + ARISTA03LT2 + FC00::A + 1 + 10 + 3 + + + false + str4-7060x6-512-8 + 10.0.0.6 + ARISTA04LT2 + 10.0.0.7 + 1 + 10 + 3 + + + str4-7060x6-512-8 + FC00::D + ARISTA04LT2 + FC00::E + 1 + 10 + 3 + + + false + str4-7060x6-512-8 + 10.0.0.8 + ARISTA05LT2 + 10.0.0.9 + 1 + 10 + 3 + + + str4-7060x6-512-8 + FC00::11 + ARISTA05LT2 + FC00::12 + 1 + 10 + 3 + + + false + str4-7060x6-512-8 + 10.0.0.10 + ARISTA06LT2 + 10.0.0.11 + 1 + 10 + 3 + + + str4-7060x6-512-8 + FC00::15 + ARISTA06LT2 + FC00::16 + 1 + 10 + 3 + + + false + str4-7060x6-512-8 + 10.0.0.12 + ARISTA07LT2 + 10.0.0.13 + 1 + 10 + 3 + + + str4-7060x6-512-8 + FC00::19 + ARISTA07LT2 + FC00::1A + 1 + 10 + 3 + + + false + str4-7060x6-512-8 + 10.0.0.14 + ARISTA08LT2 + 10.0.0.15 + 1 + 10 + 3 + + + str4-7060x6-512-8 + FC00::1D + ARISTA08LT2 + FC00::1E + 1 + 10 + 3 + + + false + str4-7060x6-512-8 + 10.0.0.16 + ARISTA09LT2 + 10.0.0.17 + 1 + 10 + 3 + + + str4-7060x6-512-8 + FC00::21 + ARISTA09LT2 + FC00::22 + 1 + 10 + 3 + + + false + str4-7060x6-512-8 + 10.0.0.18 + ARISTA10LT2 + 10.0.0.19 + 1 + 10 + 3 + + + str4-7060x6-512-8 + FC00::25 + ARISTA10LT2 + FC00::26 + 1 + 10 + 3 + + + false + str4-7060x6-512-8 + 10.0.0.20 + ARISTA11LT2 + 10.0.0.21 + 1 + 10 + 3 + + + str4-7060x6-512-8 + FC00::29 + ARISTA11LT2 + FC00::2A + 1 + 10 + 3 + + + false + str4-7060x6-512-8 + 10.0.0.22 + ARISTA12LT2 + 10.0.0.23 + 1 + 10 + 3 + + + str4-7060x6-512-8 + FC00::2D + ARISTA12LT2 + FC00::2E + 1 + 10 + 3 + + + false + str4-7060x6-512-8 + 10.0.0.24 + ARISTA13LT2 + 10.0.0.25 + 1 + 10 + 3 + + + str4-7060x6-512-8 + FC00::31 + ARISTA13LT2 + FC00::32 + 1 + 10 + 3 + + + false + str4-7060x6-512-8 + 10.0.0.26 + ARISTA14LT2 + 10.0.0.27 + 1 + 10 + 3 + + + str4-7060x6-512-8 + FC00::35 + ARISTA14LT2 + FC00::36 + 1 + 10 + 3 + + + false + str4-7060x6-512-8 + 10.0.0.28 + ARISTA15LT2 + 10.0.0.29 + 1 + 10 + 3 + + + str4-7060x6-512-8 + FC00::39 + ARISTA15LT2 + FC00::3A + 1 + 10 + 3 + + + false + str4-7060x6-512-8 + 10.0.0.30 + ARISTA16LT2 + 10.0.0.31 + 1 + 10 + 3 + + + str4-7060x6-512-8 + FC00::3D + ARISTA16LT2 + FC00::3E + 1 + 10 + 3 + + + false + str4-7060x6-512-8 + 10.0.0.32 + ARISTA17LT2 + 10.0.0.33 + 1 + 10 + 3 + + + str4-7060x6-512-8 + FC00::41 + ARISTA17LT2 + FC00::42 + 1 + 10 + 3 + + + false + str4-7060x6-512-8 + 10.0.0.34 + ARISTA18LT2 + 10.0.0.35 + 1 + 10 + 3 + + + str4-7060x6-512-8 + FC00::45 + ARISTA18LT2 + FC00::46 + 1 + 10 + 3 + + + false + str4-7060x6-512-8 + 10.0.0.36 + ARISTA19LT2 + 10.0.0.37 + 1 + 10 + 3 + + + str4-7060x6-512-8 + FC00::49 + ARISTA19LT2 + FC00::4A + 1 + 10 + 3 + + + false + str4-7060x6-512-8 + 10.0.0.38 + ARISTA20LT2 + 10.0.0.39 + 1 + 10 + 3 + + + str4-7060x6-512-8 + FC00::4D + ARISTA20LT2 + FC00::4E + 1 + 10 + 3 + + + false + str4-7060x6-512-8 + 10.0.0.40 + ARISTA21LT2 + 10.0.0.41 + 1 + 10 + 3 + + + str4-7060x6-512-8 + FC00::51 + ARISTA21LT2 + FC00::52 + 1 + 10 + 3 + + + false + str4-7060x6-512-8 + 10.0.0.42 + ARISTA22LT2 + 10.0.0.43 + 1 + 10 + 3 + + + str4-7060x6-512-8 + FC00::55 + ARISTA22LT2 + FC00::56 + 1 + 10 + 3 + + + false + str4-7060x6-512-8 + 10.0.0.44 + ARISTA23LT2 + 10.0.0.45 + 1 + 10 + 3 + + + str4-7060x6-512-8 + FC00::59 + ARISTA23LT2 + FC00::5A + 1 + 10 + 3 + + + false + str4-7060x6-512-8 + 10.0.0.46 + ARISTA24LT2 + 10.0.0.47 + 1 + 10 + 3 + + + str4-7060x6-512-8 + FC00::5D + ARISTA24LT2 + FC00::5E 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diff --git a/src/sonic-config-engine/tests/sample-lrh-nh5010-minigraph.xml b/src/sonic-config-engine/tests/sample-lrh-nh5010-minigraph.xml new file mode 100644 index 00000000000..a33932b35f1 --- /dev/null +++ b/src/sonic-config-engine/tests/sample-lrh-nh5010-minigraph.xml @@ -0,0 +1,4427 @@ + + + + + + + false + nh-5010-f-o64 + 10.0.0.0 + ARISTA01LT2 + 10.0.0.1 + 1 + 10 + 3 + + + nh-5010-f-o64 + FC00::1 + ARISTA01LT2 + FC00::2 + 1 + 10 + 3 + + + false + nh-5010-f-o64 + 10.0.0.2 + ARISTA02LT2 + 10.0.0.3 + 1 + 10 + 3 + + + nh-5010-f-o64 + FC00::5 + ARISTA02LT2 + FC00::6 + 1 + 10 + 3 + + + false + nh-5010-f-o64 + 10.0.0.4 + ARISTA03LT2 + 10.0.0.5 + 1 + 10 + 3 + + + nh-5010-f-o64 + FC00::9 + ARISTA03LT2 + FC00::A + 1 + 10 + 3 + + + false + nh-5010-f-o64 + 10.0.0.6 + ARISTA04LT2 + 10.0.0.7 + 1 + 10 + 3 + + + nh-5010-f-o64 + FC00::D + ARISTA04LT2 + FC00::E + 1 + 10 + 3 + + + false + nh-5010-f-o64 + 10.0.0.8 + ARISTA05LT2 + 10.0.0.9 + 1 + 10 + 3 + + + nh-5010-f-o64 + FC00::11 + ARISTA05LT2 + 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ErspanDestinationIpv4 + + 10.20.6.16 + + + + + + nh-5010-f-o64 + NH-5010-F-O64 +
\ No newline at end of file diff --git a/src/sonic-config-engine/tests/sample_output/py2/interfaces b/src/sonic-config-engine/tests/sample_output/py2/interfaces index f4a67ce37cd..e0b39fbf6ed 100644 --- a/src/sonic-config-engine/tests/sample_output/py2/interfaces +++ b/src/sonic-config-engine/tests/sample_output/py2/interfaces @@ -21,8 +21,8 @@ iface eth0 inet static broadcast 10.0.0.255 ########## management network policy routing rules # management port up rules - up ip -4 route add default via 10.0.0.1 dev eth0 table default metric 201 up ip -4 route add 10.0.0.0/24 dev eth0 table default + up ip -4 route add default via 10.0.0.1 dev eth0 table default metric 201 up ip -4 rule add pref 32765 from 10.0.0.100/32 table default up ip rule add pref 32764 to 10.20.6.16/32 table default # management port down rules @@ -37,8 +37,8 @@ iface eth0 inet6 static broadcast 2603:10e2:0:2902:ffff:ffff:ffff:ffff ########## management network policy routing rules # management port up rules - up ip -6 route add default via 2603:10e2:0:2902::1 dev eth0 table default metric 201 up ip -6 route add 2603:10e2:0:2902::/64 dev eth0 table default + up ip -6 route add default via 2603:10e2:0:2902::1 dev eth0 table default metric 201 up ip -6 rule add pref 32765 from 2603:10e2:0:2902::8/128 table default # IPV6 default table not add to lookup by default, management server need this to access IPV6 address when BGP shutdown up ip -6 rule add pref 32767 lookup default diff --git a/src/sonic-config-engine/tests/sample_output/py2/interfaces_mgmt31 b/src/sonic-config-engine/tests/sample_output/py2/interfaces_mgmt31 new file mode 100644 index 00000000000..7c1e08f50e1 --- /dev/null +++ b/src/sonic-config-engine/tests/sample_output/py2/interfaces_mgmt31 @@ -0,0 +1,52 @@ +# +# =============== Managed by SONiC Config Engine DO NOT EDIT! =============== +# generated from /usr/share/sonic/templates/interfaces.j2 using sonic-cfggen +# file: /etc/network/interfaces +# +# The loopback network interface +auto lo +iface lo inet loopback + address 127.0.0.1 + netmask 255.255.0.0 + scope host + post-up ip addr del 127.0.0.1/8 dev lo + pre-down ip addr add 127.0.0.1/8 dev lo + +# The management network interface +auto eth0 +iface eth0 inet static + address 10.10.4.13 + netmask 255.255.255.254 + network 10.10.4.12 + ########## management network policy routing rules + # management port up rules + up ip -4 route add 10.10.4.12/31 dev eth0 table default + up ip -4 route add default via 10.10.4.12 dev eth0 table default metric 201 + up ip -4 rule add pref 32765 from 10.10.4.13/32 table default + up ip rule add pref 32764 to 10.20.6.16/32 table default + # management port down rules + pre-down ip -4 route delete default via 10.10.4.12 dev eth0 table default + pre-down ip -4 route delete 10.10.4.12/31 dev eth0 table default + pre-down ip -4 rule delete pref 32765 from 10.10.4.13/32 table default + down ip rule delete pref 32764 to 10.20.6.16/32 table default +iface eth0 inet6 static + address 2603:10e2:0:2902::8 + netmask 64 + network 2603:10e2:0:2902:: + broadcast 2603:10e2:0:2902:ffff:ffff:ffff:ffff + ########## management network policy routing rules + # management port up rules + up ip -6 route add 2603:10e2:0:2902::/64 dev eth0 table default + up ip -6 route add default via 2603:10e2:0:2902::1 dev eth0 table default metric 201 + up ip -6 rule add pref 32765 from 2603:10e2:0:2902::8/128 table default + # IPV6 default table not add to lookup by default, management server need this to access IPV6 address when BGP shutdown + up ip -6 rule add pref 32767 lookup default + # management port down rules + pre-down ip -6 route delete default via 2603:10e2:0:2902::1 dev eth0 table default + pre-down ip -6 route delete 2603:10e2:0:2902::/64 dev eth0 table default + pre-down ip -6 rule delete pref 32765 from 2603:10e2:0:2902::8/128 table default + pre-down ip -6 rule delete pref 32767 lookup default +# +source /etc/network/interfaces.d/* +# + diff --git a/src/sonic-config-engine/tests/sample_output/py2/interfaces_syslog b/src/sonic-config-engine/tests/sample_output/py2/interfaces_syslog index 8b58153b5b7..7f43cc64fac 100644 --- a/src/sonic-config-engine/tests/sample_output/py2/interfaces_syslog +++ b/src/sonic-config-engine/tests/sample_output/py2/interfaces_syslog @@ -21,8 +21,8 @@ iface eth0 inet static broadcast 10.0.0.255 ########## management network policy routing rules # management port up rules - up ip -4 route add default via 10.0.0.1 dev eth0 table default metric 201 up ip -4 route add 10.0.0.0/24 dev eth0 table default + up ip -4 route add default via 10.0.0.1 dev eth0 table default metric 201 up ip -4 rule add pref 32765 from 10.0.0.100/32 table default up ip rule add pref 32764 to 10.3.145.8/32 table default up ip rule add pref 32764 to 100.127.20.21/32 table default @@ -39,8 +39,8 @@ iface eth0 inet6 static broadcast 2603:10e2:0:2902:ffff:ffff:ffff:ffff ########## management network policy routing rules # management port up rules - up ip -6 route add default via 2603:10e2:0:2902::1 dev eth0 table default metric 201 up ip -6 route add 2603:10e2:0:2902::/64 dev eth0 table default + up ip -6 route add default via 2603:10e2:0:2902::1 dev eth0 table default metric 201 up ip -6 rule add pref 32765 from 2603:10e2:0:2902::8/128 table default # IPV6 default table not add to lookup by default, management server need this to access IPV6 address when BGP shutdown up ip -6 rule add pref 32767 lookup default diff --git a/src/sonic-config-engine/tests/sample_output/py2/interfaces_syslog_vrf b/src/sonic-config-engine/tests/sample_output/py2/interfaces_syslog_vrf new file mode 100644 index 00000000000..e92f078f4c9 --- /dev/null +++ b/src/sonic-config-engine/tests/sample_output/py2/interfaces_syslog_vrf @@ -0,0 +1,53 @@ +# +# =============== Managed by SONiC Config Engine DO NOT EDIT! =============== +# generated from /usr/share/sonic/templates/interfaces.j2 using sonic-cfggen +# file: /etc/network/interfaces +# +# The loopback network interface +auto lo +iface lo inet loopback + address 127.0.0.1 + netmask 255.255.0.0 + scope host + post-up ip addr del 127.0.0.1/8 dev lo + pre-down ip addr add 127.0.0.1/8 dev lo + +# The management network interface +auto eth0 +iface eth0 inet static + address 10.0.0.100 + netmask 255.255.255.0 + network 10.0.0.0 + broadcast 10.0.0.255 + ########## management network policy routing rules + # management port up rules + up ip -4 route add 10.0.0.0/24 dev eth0 table default + up ip -4 route add default via 10.0.0.1 dev eth0 table default metric 201 + up ip -4 rule add pref 32765 from 10.0.0.100/32 table default + up ip rule add pref 32764 to 10.3.145.8/32 table default + # management port down rules + pre-down ip -4 route delete default via 10.0.0.1 dev eth0 table default + pre-down ip -4 route delete 10.0.0.0/24 dev eth0 table default + pre-down ip -4 rule delete pref 32765 from 10.0.0.100/32 table default + down ip rule delete pref 32764 to 10.3.145.8/32 table default +iface eth0 inet6 static + address 2603:10e2:0:2902::8 + netmask 64 + network 2603:10e2:0:2902:: + broadcast 2603:10e2:0:2902:ffff:ffff:ffff:ffff + ########## management network policy routing rules + # management port up rules + up ip -6 route add 2603:10e2:0:2902::/64 dev eth0 table default + up ip -6 route add default via 2603:10e2:0:2902::1 dev eth0 table default metric 201 + up ip -6 rule add pref 32765 from 2603:10e2:0:2902::8/128 table default + # IPV6 default table not add to lookup by default, management server need this to access IPV6 address when BGP shutdown + up ip -6 rule add pref 32767 lookup default + # management port down rules + pre-down ip -6 route delete default via 2603:10e2:0:2902::1 dev eth0 table default + pre-down ip -6 route delete 2603:10e2:0:2902::/64 dev eth0 table default + pre-down ip -6 rule delete pref 32765 from 2603:10e2:0:2902::8/128 table default + pre-down ip -6 rule delete pref 32767 lookup default +# +source /etc/network/interfaces.d/* +# + diff --git a/src/sonic-config-engine/tests/sample_output/py2/ipinip_backend_no_storage.json b/src/sonic-config-engine/tests/sample_output/py2/ipinip_backend_no_storage.json new file mode 100644 index 00000000000..fe51488c706 --- /dev/null +++ b/src/sonic-config-engine/tests/sample_output/py2/ipinip_backend_no_storage.json @@ -0,0 +1 @@ +[] diff --git a/src/sonic-config-engine/tests/sample_output/py2/ipinip_backend_with_storage.json b/src/sonic-config-engine/tests/sample_output/py2/ipinip_backend_with_storage.json new file mode 100644 index 00000000000..952979986e8 --- /dev/null +++ b/src/sonic-config-engine/tests/sample_output/py2/ipinip_backend_with_storage.json @@ -0,0 +1,104 @@ +[ + { + "TUNNEL_DECAP_TABLE:IPINIP_TUNNEL" : { + "tunnel_type":"IPINIP", + "dscp_mode":"pipe", + "ecn_mode":"copy_from_outer", + "ttl_mode":"pipe" + }, + "OP": "SET" + }, + { + "TUNNEL_DECAP_TERM_TABLE:IPINIP_TUNNEL:10.0.0.56" : { + "term_type":"P2MP" + }, + "OP": "SET" + }, + { + "TUNNEL_DECAP_TERM_TABLE:IPINIP_TUNNEL:10.0.0.58" : { + "term_type":"P2MP" + }, + "OP": "SET" + }, + { + "TUNNEL_DECAP_TERM_TABLE:IPINIP_TUNNEL:10.0.0.60" : { + "term_type":"P2MP" + }, + "OP": "SET" + }, + { + "TUNNEL_DECAP_TERM_TABLE:IPINIP_TUNNEL:10.0.0.62" : { + "term_type":"P2MP" + }, + "OP": "SET" + }, + { + "TUNNEL_DECAP_TERM_TABLE:IPINIP_TUNNEL:10.1.0.32" : { + "term_type":"P2MP" + }, + "OP": "SET" + }, + { + "TUNNEL_DECAP_TERM_TABLE:IPINIP_TUNNEL:10.21.0.64" : { + "term_type":"P2MP" + }, + "OP": "SET" + }, + { + "TUNNEL_DECAP_TERM_TABLE:IPINIP_TUNNEL:10.21.64.2" : { + "term_type":"P2MP" + }, + "OP": "SET" + }, + { + "TUNNEL_DECAP_TERM_TABLE:IPINIP_TUNNEL:192.168.0.1" : { + "term_type":"P2MP" + }, + "OP": "SET" + }, + { + "TUNNEL_DECAP_TERM_TABLE:IPINIP_TUNNEL:192.168.200.1" : { + "term_type":"P2MP" + }, + "OP": "SET" + }, + { + "TUNNEL_DECAP_TABLE:IPINIP_V6_TUNNEL" : { + "tunnel_type":"IPINIP", + "dscp_mode":"pipe", + "ecn_mode":"copy_from_outer", + "ttl_mode":"pipe" + }, + "OP": "SET" + }, + { + "TUNNEL_DECAP_TERM_TABLE:IPINIP_V6_TUNNEL:fc00:1::32" : { + "term_type":"P2MP" + }, + "OP": "SET" + }, + { + "TUNNEL_DECAP_TERM_TABLE:IPINIP_V6_TUNNEL:fc00::71" : { + "term_type":"P2MP" + }, + "OP": "SET" + }, + { + "TUNNEL_DECAP_TERM_TABLE:IPINIP_V6_TUNNEL:fc00::75" : { + "term_type":"P2MP" + }, + "OP": "SET" + }, + { + "TUNNEL_DECAP_TERM_TABLE:IPINIP_V6_TUNNEL:fc00::79" : { + "term_type":"P2MP" + }, + "OP": "SET" + }, + { + "TUNNEL_DECAP_TERM_TABLE:IPINIP_V6_TUNNEL:fc00::7d" : { + "term_type":"P2MP" + }, + "OP": "SET" + } +] diff --git a/src/sonic-config-engine/tests/sample_output/py2/ipinip_backend_with_storage_broadcom.json b/src/sonic-config-engine/tests/sample_output/py2/ipinip_backend_with_storage_broadcom.json new file mode 100644 index 00000000000..370ccb5c067 --- /dev/null +++ b/src/sonic-config-engine/tests/sample_output/py2/ipinip_backend_with_storage_broadcom.json @@ -0,0 +1,104 @@ +[ + { + "TUNNEL_DECAP_TABLE:IPINIP_TUNNEL" : { + "tunnel_type":"IPINIP", + "dscp_mode":"uniform", + "ecn_mode":"copy_from_outer", + "ttl_mode":"pipe" + }, + "OP": "SET" + }, + { + "TUNNEL_DECAP_TERM_TABLE:IPINIP_TUNNEL:10.0.0.56" : { + "term_type":"P2MP" + }, + "OP": "SET" + }, + { + "TUNNEL_DECAP_TERM_TABLE:IPINIP_TUNNEL:10.0.0.58" : { + "term_type":"P2MP" + }, + "OP": "SET" + }, + { + "TUNNEL_DECAP_TERM_TABLE:IPINIP_TUNNEL:10.0.0.60" : { + "term_type":"P2MP" + }, + "OP": "SET" + }, + { + "TUNNEL_DECAP_TERM_TABLE:IPINIP_TUNNEL:10.0.0.62" : { + "term_type":"P2MP" + }, + "OP": "SET" + }, + { + "TUNNEL_DECAP_TERM_TABLE:IPINIP_TUNNEL:10.1.0.32" : { + "term_type":"P2MP" + }, + "OP": "SET" + }, + { + "TUNNEL_DECAP_TERM_TABLE:IPINIP_TUNNEL:10.21.0.64" : { + "term_type":"P2MP" + }, + "OP": "SET" + }, + { + "TUNNEL_DECAP_TERM_TABLE:IPINIP_TUNNEL:10.21.64.2" : { + "term_type":"P2MP" + }, + "OP": "SET" + }, + { + "TUNNEL_DECAP_TERM_TABLE:IPINIP_TUNNEL:192.168.0.1" : { + "term_type":"P2MP" + }, + "OP": "SET" + }, + { + "TUNNEL_DECAP_TERM_TABLE:IPINIP_TUNNEL:192.168.200.1" : { + "term_type":"P2MP" + }, + "OP": "SET" + }, + { + "TUNNEL_DECAP_TABLE:IPINIP_V6_TUNNEL" : { + "tunnel_type":"IPINIP", + "dscp_mode":"uniform", + "ecn_mode":"copy_from_outer", + "ttl_mode":"pipe" + }, + "OP": "SET" + }, + { + "TUNNEL_DECAP_TERM_TABLE:IPINIP_V6_TUNNEL:fc00:1::32" : { + "term_type":"P2MP" + }, + "OP": "SET" + }, + { + "TUNNEL_DECAP_TERM_TABLE:IPINIP_V6_TUNNEL:fc00::71" : { + "term_type":"P2MP" + }, + "OP": "SET" + }, + { + "TUNNEL_DECAP_TERM_TABLE:IPINIP_V6_TUNNEL:fc00::75" : { + "term_type":"P2MP" + }, + "OP": "SET" + }, + { + "TUNNEL_DECAP_TERM_TABLE:IPINIP_V6_TUNNEL:fc00::79" : { + "term_type":"P2MP" + }, + "OP": "SET" + }, + { + "TUNNEL_DECAP_TERM_TABLE:IPINIP_V6_TUNNEL:fc00::7d" : { + "term_type":"P2MP" + }, + "OP": "SET" + } +] diff --git a/src/sonic-config-engine/tests/sample_output/py2/lldp_conf/lldpd-ipv6-iface.conf b/src/sonic-config-engine/tests/sample_output/py2/lldp_conf/lldpd-ipv6-iface.conf index f5727556fdf..ccec8bfb484 100644 --- a/src/sonic-config-engine/tests/sample_output/py2/lldp_conf/lldpd-ipv6-iface.conf +++ b/src/sonic-config-engine/tests/sample_output/py2/lldp_conf/lldpd-ipv6-iface.conf @@ -1,2 +1,4 @@ +configure ports eth0 lldp portidsubtype local eth0 +configure system ip management pattern 2603:10e2:0:2902::8 configure system hostname switch-t0 pause diff --git a/src/sonic-config-engine/tests/sample_output/py2/mvrf_interfaces b/src/sonic-config-engine/tests/sample_output/py2/mvrf_interfaces index a72d754b3ca..0549dcb54b4 100644 --- a/src/sonic-config-engine/tests/sample_output/py2/mvrf_interfaces +++ b/src/sonic-config-engine/tests/sample_output/py2/mvrf_interfaces @@ -5,7 +5,7 @@ # auto mgmt iface mgmt - vrf-table 5000 + vrf-table 6000 # The loopback network interface for mgmt VRF that is required for applications like NTP up ip link add lo-m type dummy up ip link set dev lo-m master mgmt @@ -31,19 +31,19 @@ iface eth0 inet static vrf mgmt ########## management network policy routing rules # management port up rules - up ip -4 route add default via 10.0.0.1 dev eth0 table 5000 metric 201 - up ip -4 route add 10.0.0.0/24 dev eth0 table 5000 - up ip -4 rule add pref 32765 from 10.0.0.100/32 table 5000 - up ip -4 rule add pref 32764 to 11.11.11.11 table 5000 - up ip -4 rule add pref 32764 to 22.22.22.0/23 table 5000 - up ip rule add pref 32764 to 10.20.6.16/32 table 5000 + up ip -4 route add 10.0.0.0/24 dev eth0 table 6000 + up ip -4 route add default via 10.0.0.1 dev eth0 table 6000 metric 201 + up ip -4 rule add pref 32765 from 10.0.0.100/32 table 6000 + up ip -4 rule add pref 32764 to 11.11.11.11 table 6000 + up ip -4 rule add pref 32764 to 22.22.22.0/23 table 6000 + up ip rule add pref 32764 to 10.20.6.16/32 table 6000 # management port down rules - pre-down ip -4 route delete default via 10.0.0.1 dev eth0 table 5000 - pre-down ip -4 route delete 10.0.0.0/24 dev eth0 table 5000 - pre-down ip -4 rule delete pref 32765 from 10.0.0.100/32 table 5000 - pre-down ip -4 rule delete pref 32764 to 11.11.11.11 table 5000 - pre-down ip -4 rule delete pref 32764 to 22.22.22.0/23 table 5000 - down ip rule delete pref 32764 to 10.20.6.16/32 table 5000 + pre-down ip -4 route delete default via 10.0.0.1 dev eth0 table 6000 + pre-down ip -4 route delete 10.0.0.0/24 dev eth0 table 6000 + pre-down ip -4 rule delete pref 32765 from 10.0.0.100/32 table 6000 + pre-down ip -4 rule delete pref 32764 to 11.11.11.11 table 6000 + pre-down ip -4 rule delete pref 32764 to 22.22.22.0/23 table 6000 + down ip rule delete pref 32764 to 10.20.6.16/32 table 6000 iface eth0 inet6 static address 2603:10e2:0:2902::8 netmask 64 @@ -52,15 +52,15 @@ iface eth0 inet6 static vrf mgmt ########## management network policy routing rules # management port up rules - up ip -6 route add default via 2603:10e2:0:2902::1 dev eth0 table 5000 metric 201 - up ip -6 route add 2603:10e2:0:2902::/64 dev eth0 table 5000 - up ip -6 rule add pref 32765 from 2603:10e2:0:2902::8/128 table 5000 - up ip -6 rule add pref 32764 to 33:33:33::0/64 table 5000 + up ip -6 route add 2603:10e2:0:2902::/64 dev eth0 table 6000 + up ip -6 route add default via 2603:10e2:0:2902::1 dev eth0 table 6000 metric 201 + up ip -6 rule add pref 32765 from 2603:10e2:0:2902::8/128 table 6000 + up ip -6 rule add pref 32764 to 33:33:33::0/64 table 6000 # management port down rules - pre-down ip -6 route delete default via 2603:10e2:0:2902::1 dev eth0 table 5000 - pre-down ip -6 route delete 2603:10e2:0:2902::/64 dev eth0 table 5000 - pre-down ip -6 rule delete pref 32765 from 2603:10e2:0:2902::8/128 table 5000 - pre-down ip -6 rule delete pref 32764 to 33:33:33::0/64 table 5000 + pre-down ip -6 route delete default via 2603:10e2:0:2902::1 dev eth0 table 6000 + pre-down ip -6 route delete 2603:10e2:0:2902::/64 dev eth0 table 6000 + pre-down ip -6 rule delete pref 32765 from 2603:10e2:0:2902::8/128 table 6000 + pre-down ip -6 rule delete pref 32764 to 33:33:33::0/64 table 6000 # source /etc/network/interfaces.d/* # diff --git a/src/sonic-config-engine/tests/sample_output/py2/mvrf_interfaces_nomgmt b/src/sonic-config-engine/tests/sample_output/py2/mvrf_interfaces_nomgmt index 8f0f4555781..9b8455330bf 100644 --- a/src/sonic-config-engine/tests/sample_output/py2/mvrf_interfaces_nomgmt +++ b/src/sonic-config-engine/tests/sample_output/py2/mvrf_interfaces_nomgmt @@ -5,7 +5,7 @@ # auto mgmt iface mgmt - vrf-table 5000 + vrf-table 6000 # The loopback network interface for mgmt VRF that is required for applications like NTP up ip link add lo-m type dummy up ip link set dev lo-m master mgmt diff --git a/src/sonic-config-engine/tests/sample_output/py2/two_mgmt_interfaces b/src/sonic-config-engine/tests/sample_output/py2/two_mgmt_interfaces index 9e44fe93e0d..2fca44b3fca 100644 --- a/src/sonic-config-engine/tests/sample_output/py2/two_mgmt_interfaces +++ b/src/sonic-config-engine/tests/sample_output/py2/two_mgmt_interfaces @@ -22,8 +22,8 @@ iface eth1 inet static broadcast 10.0.10.255 ########## management network policy routing rules # management port up rules - up ip -4 route add default via 10.0.10.1 dev eth1 table default metric 201 up ip -4 route add 10.0.10.0/24 dev eth1 table default + up ip -4 route add default via 10.0.10.1 dev eth1 table default metric 201 up ip -4 rule add pref 32765 from 10.0.10.100/32 table default up ip rule add pref 32764 to 10.20.6.16/32 table default # management port down rules @@ -38,8 +38,8 @@ iface eth0 inet static broadcast 10.0.0.255 ########## management network policy routing rules # management port up rules - up ip -4 route add default via 10.0.0.1 dev eth0 table default metric 201 up ip -4 route add 10.0.0.0/24 dev eth0 table default + up ip -4 route add default via 10.0.0.1 dev eth0 table default metric 201 up ip -4 rule add pref 32765 from 10.0.0.100/32 table default up ip rule add pref 32764 to 10.20.6.16/32 table default # management port down rules @@ -54,8 +54,8 @@ iface eth1 inet6 static broadcast 2603:10e2:0:abcd:ffff:ffff:ffff:ffff ########## management network policy routing rules # management port up rules - up ip -6 route add default via 2603:10e2:0:abcd::1 dev eth1 table default metric 201 up ip -6 route add 2603:10e2:0:abcd::/64 dev eth1 table default + up ip -6 route add default via 2603:10e2:0:abcd::1 dev eth1 table default metric 201 up ip -6 rule add pref 32765 from 2603:10e2:0:abcd::8/128 table default # IPV6 default table not add to lookup by default, management server need this to access IPV6 address when BGP shutdown up ip -6 rule add pref 32767 lookup default @@ -71,8 +71,8 @@ iface eth0 inet6 static broadcast 2603:10e2:0:2902:ffff:ffff:ffff:ffff ########## management network policy routing rules # management port up rules - up ip -6 route add default via 2603:10e2:0:2902::1 dev eth0 table default metric 201 up ip -6 route add 2603:10e2:0:2902::/64 dev eth0 table default + up ip -6 route add default via 2603:10e2:0:2902::1 dev eth0 table default metric 201 up ip -6 rule add pref 32765 from 2603:10e2:0:2902::8/128 table default # IPV6 default table not add to lookup by default, management server need this to access IPV6 address when BGP shutdown up ip -6 rule add pref 32767 lookup default diff --git a/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr_confed.conf b/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr_confed.conf new file mode 100644 index 00000000000..0959bc9e250 --- /dev/null +++ b/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr_confed.conf @@ -0,0 +1,76 @@ +! +! template: bgpd/bgpd.conf.j2 +! +! +! =========== Managed by sonic-cfggen DO NOT edit manually! ==================== +! generated by templates/quagga/bgpd.conf.j2 with config DB data +! file: bgpd.conf +! +! +! template: common/daemons.common.conf.j2 +! +hostname switch-t0 +password zebra +enable password zebra +! +log syslog informational +log facility local4 +! +! end of template: common/daemons.common.conf.j2! +! +! +! +! template: bgpd/bgpd.main.conf.j2 +! +! bgp multiple-instance +! +! BGP configuration +! +! TSA configuration +! +ip prefix-list PL_LoopbackV4 permit 10.1.0.32/32 +! +ipv6 prefix-list PL_LoopbackV6 permit fc00:1::/64 +! +ip prefix-list LOCAL_VLAN_IPV4_PREFIX seq 5 permit 192.168.0.0/27 +! +ip prefix-list LOCAL_VLAN_IPV4_PREFIX seq 10 permit 192.168.200.0/27 +! +! +! +router bgp 65100 +! + bgp confederation identifier 65000 + bgp confederation peers 65001 + bgp log-neighbor-changes + bgp suppress-fib-pending + no bgp default ipv4-unicast + no bgp ebgp-requires-policy +! + bgp bestpath as-path multipath-relax +! +! + bgp router-id 10.1.0.32 +! + network 10.1.0.32/32 +! + address-family ipv6 + network fc00:1::32/64 + exit-address-family +! + network 192.168.0.1/27 + network 192.168.200.1/27 +! +! +! + address-family ipv4 + maximum-paths 514 + exit-address-family + address-family ipv6 + maximum-paths 514 + exit-address-family +! +! end of template: bgpd/bgpd.main.conf.j2 +!! +! end of template: bgpd/bgpd.conf.j2 +! diff --git a/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr_confed_lt2.conf b/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr_confed_lt2.conf new file mode 100644 index 00000000000..82f578f6fa1 --- /dev/null +++ b/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr_confed_lt2.conf @@ -0,0 +1,76 @@ +! +! template: bgpd/bgpd.conf.j2 +! +! +! =========== Managed by sonic-cfggen DO NOT edit manually! ==================== +! generated by templates/quagga/bgpd.conf.j2 with config DB data +! file: bgpd.conf +! +! +! template: common/daemons.common.conf.j2 +! +hostname switch-t0 +password zebra +enable password zebra +! +log syslog informational +log facility local4 +! +! end of template: common/daemons.common.conf.j2! +! +! +! +! template: bgpd/bgpd.main.conf.j2 +! +! bgp multiple-instance +! +! BGP configuration +! +! TSA configuration +! +ip prefix-list PL_LoopbackV4 permit 10.1.0.32/32 +! +ipv6 prefix-list PL_LoopbackV6 permit fc00:1::/64 +! +ip prefix-list LOCAL_VLAN_IPV4_PREFIX seq 5 permit 192.168.0.0/27 +! +ip prefix-list LOCAL_VLAN_IPV4_PREFIX seq 10 permit 192.168.200.0/27 +! +! +! +router bgp 65100 +! + bgp confederation identifier 65000 + bgp confederation peers 65001 65002 + bgp log-neighbor-changes + bgp suppress-fib-pending + no bgp default ipv4-unicast + no bgp ebgp-requires-policy +! + bgp bestpath as-path multipath-relax +! +! + bgp router-id 10.1.0.32 +! + network 10.1.0.32/32 +! + address-family ipv6 + network fc00:1::32/64 + exit-address-family +! + network 192.168.0.1/27 + network 192.168.200.1/27 +! +! +! + address-family ipv4 + maximum-paths 514 + exit-address-family + address-family ipv6 + maximum-paths 514 + exit-address-family +! +! end of template: bgpd/bgpd.main.conf.j2 +!! +! end of template: bgpd/bgpd.conf.j2 +! diff --git a/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr_confed_masic.conf b/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr_confed_masic.conf new file mode 100644 index 00000000000..82f578f6fa1 --- /dev/null +++ b/src/sonic-config-engine/tests/sample_output/py3/bgpd_frr_confed_masic.conf @@ -0,0 +1,76 @@ +! +! template: bgpd/bgpd.conf.j2 +! +! +! =========== Managed by sonic-cfggen DO NOT edit manually! ==================== +! generated by templates/quagga/bgpd.conf.j2 with config DB data +! file: bgpd.conf +! +! +! template: common/daemons.common.conf.j2 +! +hostname switch-t0 +password zebra +enable password zebra +! +log syslog informational +log facility local4 +! +! end of template: common/daemons.common.conf.j2! +! +! +! +! template: bgpd/bgpd.main.conf.j2 +! +! bgp multiple-instance +! +! BGP configuration +! +! TSA configuration +! +ip prefix-list PL_LoopbackV4 permit 10.1.0.32/32 +! +ipv6 prefix-list PL_LoopbackV6 permit fc00:1::/64 +! +ip prefix-list LOCAL_VLAN_IPV4_PREFIX seq 5 permit 192.168.0.0/27 +! +ip prefix-list LOCAL_VLAN_IPV4_PREFIX seq 10 permit 192.168.200.0/27 +! +! +! +router bgp 65100 +! + bgp confederation identifier 65000 + bgp confederation peers 65001 65002 + bgp log-neighbor-changes + bgp suppress-fib-pending + no bgp default ipv4-unicast + no bgp ebgp-requires-policy +! + bgp bestpath as-path multipath-relax +! +! + bgp router-id 10.1.0.32 +! + network 10.1.0.32/32 +! + address-family ipv6 + network fc00:1::32/64 + exit-address-family +! + network 192.168.0.1/27 + network 192.168.200.1/27 +! +! +! + address-family ipv4 + maximum-paths 514 + exit-address-family + address-family ipv6 + maximum-paths 514 + exit-address-family +! +! end of template: bgpd/bgpd.main.conf.j2 +!! +! end of template: bgpd/bgpd.conf.j2 +! diff --git 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}, + "Ethernet448|5-6": { + "profile" : "egress_lossy_profile" + }, + "Ethernet456|5-6": { + "profile" : "egress_lossy_profile" + }, + "Ethernet464|5-6": { + "profile" : "egress_lossy_profile" + }, + "Ethernet472|5-6": { + "profile" : "egress_lossy_profile" + }, + "Ethernet480|5-6": { + "profile" : "egress_lossy_profile" + }, + "Ethernet488|5-6": { + "profile" : "egress_lossy_profile" + }, + "Ethernet496|5-6": { + "profile" : "egress_lossy_profile" + } + } +} diff --git a/src/sonic-config-engine/tests/sample_output/py3/buffer-ft2-p64.json b/src/sonic-config-engine/tests/sample_output/py3/buffer-ft2-p64.json index 67643195e27..388fc0e47da 100644 --- a/src/sonic-config-engine/tests/sample_output/py3/buffer-ft2-p64.json +++ b/src/sonic-config-engine/tests/sample_output/py3/buffer-ft2-p64.json @@ -71,13 +71,13 @@ "BUFFER_POOL": { "ingress_lossless_pool": { - "size": "164302948", + "size": "164733224", "type": "ingress", "mode": "dynamic", "xoff": "17962880" }, "egress_lossless_pool": { - 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+ "profile" : "egress_lossy_profile" + }, + "Ethernet232|5-6": { + "profile" : "egress_lossy_profile" + }, + "Ethernet236|5-6": { + "profile" : "egress_lossy_profile" + }, + "Ethernet240|5-6": { + "profile" : "egress_lossy_profile" + }, + "Ethernet244|5-6": { + "profile" : "egress_lossy_profile" + }, + "Ethernet248|5-6": { + "profile" : "egress_lossy_profile" + } + } +} diff --git a/src/sonic-config-engine/tests/sample_output/py3/buffer-lt2-p32o64.json b/src/sonic-config-engine/tests/sample_output/py3/buffer-lt2-p32o64.json index d03c77161b3..790fca2c015 100644 --- a/src/sonic-config-engine/tests/sample_output/py3/buffer-lt2-p32o64.json +++ b/src/sonic-config-engine/tests/sample_output/py3/buffer-lt2-p32o64.json @@ -103,13 +103,13 @@ "BUFFER_POOL": { "ingress_lossless_pool": { - "size": "147226020", + "size": "164619432", "type": "ingress", "mode": "dynamic", "xoff": "33690560" }, "egress_lossless_pool": { - "size": "147226020", + "size": "164619432", "type": "egress", "mode": "static" } @@ -123,12 +123,12 @@ "egress_lossless_profile": { "pool": "egress_lossless_pool", "size": "0", - "static_th": "165364160" + "static_th": "82434938" }, "ingress_lossy_profile": { "pool": "ingress_lossless_pool", "size": "0", - "static_th": "165364160" + "static_th": "82434938" } }, diff --git a/src/sonic-config-engine/tests/sample_output/py3/buffer-no-config.json b/src/sonic-config-engine/tests/sample_output/py3/buffer-no-config.json new file mode 100644 index 00000000000..c2fbf8f5e38 --- /dev/null +++ b/src/sonic-config-engine/tests/sample_output/py3/buffer-no-config.json @@ -0,0 +1,1353 @@ + { + "CABLE_LENGTH": { + "AZURE": { + "Ethernet0": "300m", + "Ethernet8": "300m", + "Ethernet16": "300m", + "Ethernet24": "300m", + "Ethernet32": "300m", + "Ethernet40": "300m", + "Ethernet48": "300m", + "Ethernet56": "300m", + "Ethernet64": "300m", + "Ethernet72": "300m", + "Ethernet80": "300m", + "Ethernet88": "300m", + "Ethernet96": "300m", + "Ethernet104": "300m", + "Ethernet112": "300m", + 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+ "Ethernet152|5-6": { + "profile" : "egress_lossy_profile" + }, + "Ethernet156|5-6": { + "profile" : "egress_lossy_profile" + }, + "Ethernet160|5-6": { + "profile" : "egress_lossy_profile" + }, + "Ethernet164|5-6": { + "profile" : "egress_lossy_profile" + }, + "Ethernet168|5-6": { + "profile" : "egress_lossy_profile" + }, + "Ethernet172|5-6": { + "profile" : "egress_lossy_profile" + }, + "Ethernet176|5-6": { + "profile" : "egress_lossy_profile" + }, + "Ethernet180|5-6": { + "profile" : "egress_lossy_profile" + }, + "Ethernet184|5-6": { + "profile" : "egress_lossy_profile" + }, + "Ethernet188|5-6": { + "profile" : "egress_lossy_profile" + }, + "Ethernet192|5-6": { + "profile" : "egress_lossy_profile" + }, + "Ethernet196|5-6": { + "profile" : "egress_lossy_profile" + }, + "Ethernet200|5-6": { + "profile" : "egress_lossy_profile" + }, + "Ethernet204|5-6": { + "profile" : "egress_lossy_profile" + }, + "Ethernet208|5-6": { + "profile" : "egress_lossy_profile" + }, + "Ethernet212|5-6": { + "profile" : "egress_lossy_profile" + }, + "Ethernet216|5-6": { + "profile" : "egress_lossy_profile" + }, + "Ethernet220|5-6": { + "profile" : "egress_lossy_profile" + }, + "Ethernet224|5-6": { + "profile" : "egress_lossy_profile" + }, + "Ethernet228|5-6": { + "profile" : "egress_lossy_profile" + }, + "Ethernet232|5-6": { + "profile" : "egress_lossy_profile" + }, + "Ethernet236|5-6": { + "profile" : "egress_lossy_profile" + }, + "Ethernet240|5-6": { + "profile" : "egress_lossy_profile" + }, + "Ethernet244|5-6": { + "profile" : "egress_lossy_profile" + }, + "Ethernet248|5-6": { + "profile" : "egress_lossy_profile" + } + } +} diff --git a/src/sonic-config-engine/tests/sample_output/py3/interfaces b/src/sonic-config-engine/tests/sample_output/py3/interfaces index f4a67ce37cd..e0b39fbf6ed 100644 --- a/src/sonic-config-engine/tests/sample_output/py3/interfaces +++ b/src/sonic-config-engine/tests/sample_output/py3/interfaces @@ -21,8 +21,8 @@ iface eth0 inet static broadcast 10.0.0.255 ########## management network policy routing rules # management port up rules - up ip -4 route add default via 10.0.0.1 dev eth0 table default metric 201 up ip -4 route add 10.0.0.0/24 dev eth0 table default + up ip -4 route add default via 10.0.0.1 dev eth0 table default metric 201 up ip -4 rule add pref 32765 from 10.0.0.100/32 table default up ip rule add pref 32764 to 10.20.6.16/32 table default # management port down rules @@ -37,8 +37,8 @@ iface eth0 inet6 static broadcast 2603:10e2:0:2902:ffff:ffff:ffff:ffff ########## management network policy routing rules # management port up rules - up ip -6 route add default via 2603:10e2:0:2902::1 dev eth0 table default metric 201 up ip -6 route add 2603:10e2:0:2902::/64 dev eth0 table default + up ip -6 route add default via 2603:10e2:0:2902::1 dev eth0 table default metric 201 up ip -6 rule add pref 32765 from 2603:10e2:0:2902::8/128 table default # IPV6 default table not add to lookup by default, management server need this to access IPV6 address when BGP shutdown up ip -6 rule add pref 32767 lookup default diff --git a/src/sonic-config-engine/tests/sample_output/py3/interfaces_mgmt31 b/src/sonic-config-engine/tests/sample_output/py3/interfaces_mgmt31 new file mode 100644 index 00000000000..7c1e08f50e1 --- /dev/null +++ b/src/sonic-config-engine/tests/sample_output/py3/interfaces_mgmt31 @@ -0,0 +1,52 @@ +# +# =============== Managed by SONiC Config Engine DO NOT EDIT! =============== +# generated from /usr/share/sonic/templates/interfaces.j2 using sonic-cfggen +# file: /etc/network/interfaces +# +# The loopback network interface +auto lo +iface lo inet loopback + address 127.0.0.1 + netmask 255.255.0.0 + scope host + post-up ip addr del 127.0.0.1/8 dev lo + pre-down ip addr add 127.0.0.1/8 dev lo + +# The management network interface +auto eth0 +iface eth0 inet static + address 10.10.4.13 + netmask 255.255.255.254 + network 10.10.4.12 + ########## management network policy routing rules + # management port up rules + up ip -4 route add 10.10.4.12/31 dev eth0 table default + up ip -4 route add default via 10.10.4.12 dev eth0 table default metric 201 + up ip -4 rule add pref 32765 from 10.10.4.13/32 table default + up ip rule add pref 32764 to 10.20.6.16/32 table default + # management port down rules + pre-down ip -4 route delete default via 10.10.4.12 dev eth0 table default + pre-down ip -4 route delete 10.10.4.12/31 dev eth0 table default + pre-down ip -4 rule delete pref 32765 from 10.10.4.13/32 table default + down ip rule delete pref 32764 to 10.20.6.16/32 table default +iface eth0 inet6 static + address 2603:10e2:0:2902::8 + netmask 64 + network 2603:10e2:0:2902:: + broadcast 2603:10e2:0:2902:ffff:ffff:ffff:ffff + ########## management network policy routing rules + # management port up rules + up ip -6 route add 2603:10e2:0:2902::/64 dev eth0 table default + up ip -6 route add default via 2603:10e2:0:2902::1 dev eth0 table default metric 201 + up ip -6 rule add pref 32765 from 2603:10e2:0:2902::8/128 table default + # IPV6 default table not add to lookup by default, management server need this to access IPV6 address when BGP shutdown + up ip -6 rule add pref 32767 lookup default + # management port down rules + pre-down ip -6 route delete default via 2603:10e2:0:2902::1 dev eth0 table default + pre-down ip -6 route delete 2603:10e2:0:2902::/64 dev eth0 table default + pre-down ip -6 rule delete pref 32765 from 2603:10e2:0:2902::8/128 table default + pre-down ip -6 rule delete pref 32767 lookup default +# +source /etc/network/interfaces.d/* +# + diff --git a/src/sonic-config-engine/tests/sample_output/py3/interfaces_syslog b/src/sonic-config-engine/tests/sample_output/py3/interfaces_syslog index 8b58153b5b7..7f43cc64fac 100644 --- a/src/sonic-config-engine/tests/sample_output/py3/interfaces_syslog +++ b/src/sonic-config-engine/tests/sample_output/py3/interfaces_syslog @@ -21,8 +21,8 @@ iface eth0 inet static broadcast 10.0.0.255 ########## management network policy routing rules # management port up rules - up ip -4 route add default via 10.0.0.1 dev eth0 table default metric 201 up ip -4 route add 10.0.0.0/24 dev eth0 table default + up ip -4 route add default via 10.0.0.1 dev eth0 table default metric 201 up ip -4 rule add pref 32765 from 10.0.0.100/32 table default up ip rule add pref 32764 to 10.3.145.8/32 table default up ip rule add pref 32764 to 100.127.20.21/32 table default @@ -39,8 +39,8 @@ iface eth0 inet6 static broadcast 2603:10e2:0:2902:ffff:ffff:ffff:ffff ########## management network policy routing rules # management port up rules - up ip -6 route add default via 2603:10e2:0:2902::1 dev eth0 table default metric 201 up ip -6 route add 2603:10e2:0:2902::/64 dev eth0 table default + up ip -6 route add default via 2603:10e2:0:2902::1 dev eth0 table default metric 201 up ip -6 rule add pref 32765 from 2603:10e2:0:2902::8/128 table default # IPV6 default table not add to lookup by default, management server need this to access IPV6 address when BGP shutdown up ip -6 rule add pref 32767 lookup default diff --git a/src/sonic-config-engine/tests/sample_output/py3/interfaces_syslog_vrf b/src/sonic-config-engine/tests/sample_output/py3/interfaces_syslog_vrf new file mode 100644 index 00000000000..e92f078f4c9 --- /dev/null +++ b/src/sonic-config-engine/tests/sample_output/py3/interfaces_syslog_vrf @@ -0,0 +1,53 @@ +# +# =============== Managed by SONiC Config Engine DO NOT EDIT! =============== +# generated from /usr/share/sonic/templates/interfaces.j2 using sonic-cfggen +# file: /etc/network/interfaces +# +# The loopback network interface +auto lo +iface lo inet loopback + address 127.0.0.1 + netmask 255.255.0.0 + scope host + post-up ip addr del 127.0.0.1/8 dev lo + pre-down ip addr add 127.0.0.1/8 dev lo + +# The management network interface +auto eth0 +iface eth0 inet static + address 10.0.0.100 + netmask 255.255.255.0 + network 10.0.0.0 + broadcast 10.0.0.255 + ########## management network policy routing rules + # management port up rules + up ip -4 route add 10.0.0.0/24 dev eth0 table default + up ip -4 route add default via 10.0.0.1 dev eth0 table default metric 201 + up ip -4 rule add pref 32765 from 10.0.0.100/32 table default + up ip rule add pref 32764 to 10.3.145.8/32 table default + # management port down rules + pre-down ip -4 route delete default via 10.0.0.1 dev eth0 table default + pre-down ip -4 route delete 10.0.0.0/24 dev eth0 table default + pre-down ip -4 rule delete pref 32765 from 10.0.0.100/32 table default + down ip rule delete pref 32764 to 10.3.145.8/32 table default +iface eth0 inet6 static + address 2603:10e2:0:2902::8 + netmask 64 + network 2603:10e2:0:2902:: + broadcast 2603:10e2:0:2902:ffff:ffff:ffff:ffff + ########## management network policy routing rules + # management port up rules + up ip -6 route add 2603:10e2:0:2902::/64 dev eth0 table default + up ip -6 route add default via 2603:10e2:0:2902::1 dev eth0 table default metric 201 + up ip -6 rule add pref 32765 from 2603:10e2:0:2902::8/128 table default + # IPV6 default table not add to lookup by default, management server need this to access IPV6 address when BGP shutdown + up ip -6 rule add pref 32767 lookup default + # management port down rules + pre-down ip -6 route delete default via 2603:10e2:0:2902::1 dev eth0 table default + pre-down ip -6 route delete 2603:10e2:0:2902::/64 dev eth0 table default + pre-down ip -6 rule delete pref 32765 from 2603:10e2:0:2902::8/128 table default + pre-down ip -6 rule delete pref 32767 lookup default +# +source /etc/network/interfaces.d/* +# + diff --git a/src/sonic-config-engine/tests/sample_output/py3/ipinip_backend_no_storage.json b/src/sonic-config-engine/tests/sample_output/py3/ipinip_backend_no_storage.json new file mode 100644 index 00000000000..fe51488c706 --- /dev/null +++ b/src/sonic-config-engine/tests/sample_output/py3/ipinip_backend_no_storage.json @@ -0,0 +1 @@ +[] diff --git a/src/sonic-config-engine/tests/sample_output/py3/ipinip_backend_with_storage.json b/src/sonic-config-engine/tests/sample_output/py3/ipinip_backend_with_storage.json new file mode 100644 index 00000000000..952979986e8 --- /dev/null +++ b/src/sonic-config-engine/tests/sample_output/py3/ipinip_backend_with_storage.json @@ -0,0 +1,104 @@ +[ + { + "TUNNEL_DECAP_TABLE:IPINIP_TUNNEL" : { + "tunnel_type":"IPINIP", + "dscp_mode":"pipe", + "ecn_mode":"copy_from_outer", + "ttl_mode":"pipe" + }, + "OP": "SET" + }, + { + "TUNNEL_DECAP_TERM_TABLE:IPINIP_TUNNEL:10.0.0.56" : { + "term_type":"P2MP" + }, + "OP": "SET" + }, + { + "TUNNEL_DECAP_TERM_TABLE:IPINIP_TUNNEL:10.0.0.58" : { + "term_type":"P2MP" + }, + "OP": "SET" + }, + { + "TUNNEL_DECAP_TERM_TABLE:IPINIP_TUNNEL:10.0.0.60" : { + "term_type":"P2MP" + }, + "OP": "SET" + }, + { + "TUNNEL_DECAP_TERM_TABLE:IPINIP_TUNNEL:10.0.0.62" : { + "term_type":"P2MP" + }, + "OP": "SET" + }, + { + "TUNNEL_DECAP_TERM_TABLE:IPINIP_TUNNEL:10.1.0.32" : { + "term_type":"P2MP" + }, + "OP": "SET" + }, + { + "TUNNEL_DECAP_TERM_TABLE:IPINIP_TUNNEL:10.21.0.64" : { + "term_type":"P2MP" + }, + "OP": "SET" + }, + { + "TUNNEL_DECAP_TERM_TABLE:IPINIP_TUNNEL:10.21.64.2" : { + "term_type":"P2MP" + }, + "OP": "SET" + }, + { + "TUNNEL_DECAP_TERM_TABLE:IPINIP_TUNNEL:192.168.0.1" : { + "term_type":"P2MP" + }, + "OP": "SET" + }, + { + "TUNNEL_DECAP_TERM_TABLE:IPINIP_TUNNEL:192.168.200.1" : { + "term_type":"P2MP" + }, + "OP": "SET" + }, + { + "TUNNEL_DECAP_TABLE:IPINIP_V6_TUNNEL" : { + "tunnel_type":"IPINIP", + "dscp_mode":"pipe", + "ecn_mode":"copy_from_outer", + "ttl_mode":"pipe" + }, + "OP": "SET" + }, + { + "TUNNEL_DECAP_TERM_TABLE:IPINIP_V6_TUNNEL:fc00:1::32" : { + "term_type":"P2MP" + }, + "OP": "SET" + }, + { + "TUNNEL_DECAP_TERM_TABLE:IPINIP_V6_TUNNEL:fc00::71" : { + "term_type":"P2MP" + }, + "OP": "SET" + }, + { + "TUNNEL_DECAP_TERM_TABLE:IPINIP_V6_TUNNEL:fc00::75" : { + "term_type":"P2MP" + }, + "OP": "SET" + }, + { + "TUNNEL_DECAP_TERM_TABLE:IPINIP_V6_TUNNEL:fc00::79" : { + "term_type":"P2MP" + }, + "OP": "SET" + }, + { + "TUNNEL_DECAP_TERM_TABLE:IPINIP_V6_TUNNEL:fc00::7d" : { + "term_type":"P2MP" + }, + "OP": "SET" + } +] diff --git a/src/sonic-config-engine/tests/sample_output/py3/ipinip_backend_with_storage_broadcom.json b/src/sonic-config-engine/tests/sample_output/py3/ipinip_backend_with_storage_broadcom.json new file mode 100644 index 00000000000..370ccb5c067 --- /dev/null +++ b/src/sonic-config-engine/tests/sample_output/py3/ipinip_backend_with_storage_broadcom.json @@ -0,0 +1,104 @@ +[ + { + "TUNNEL_DECAP_TABLE:IPINIP_TUNNEL" : { + "tunnel_type":"IPINIP", + "dscp_mode":"uniform", + "ecn_mode":"copy_from_outer", + "ttl_mode":"pipe" + }, + "OP": "SET" + }, + { + "TUNNEL_DECAP_TERM_TABLE:IPINIP_TUNNEL:10.0.0.56" : { + "term_type":"P2MP" + }, + "OP": "SET" + }, + { + "TUNNEL_DECAP_TERM_TABLE:IPINIP_TUNNEL:10.0.0.58" : { + "term_type":"P2MP" + }, + "OP": "SET" + }, + { + "TUNNEL_DECAP_TERM_TABLE:IPINIP_TUNNEL:10.0.0.60" : { + "term_type":"P2MP" + }, + "OP": "SET" + }, + { + "TUNNEL_DECAP_TERM_TABLE:IPINIP_TUNNEL:10.0.0.62" : { + "term_type":"P2MP" + }, + "OP": "SET" + }, + { + "TUNNEL_DECAP_TERM_TABLE:IPINIP_TUNNEL:10.1.0.32" : { + "term_type":"P2MP" + }, + "OP": "SET" + }, + { + "TUNNEL_DECAP_TERM_TABLE:IPINIP_TUNNEL:10.21.0.64" : { + "term_type":"P2MP" + }, + "OP": "SET" + }, + { + "TUNNEL_DECAP_TERM_TABLE:IPINIP_TUNNEL:10.21.64.2" : { + "term_type":"P2MP" + }, + "OP": "SET" + }, + { + "TUNNEL_DECAP_TERM_TABLE:IPINIP_TUNNEL:192.168.0.1" : { + "term_type":"P2MP" + }, + "OP": "SET" + }, + { + "TUNNEL_DECAP_TERM_TABLE:IPINIP_TUNNEL:192.168.200.1" : { + "term_type":"P2MP" + }, + "OP": "SET" + }, + { + "TUNNEL_DECAP_TABLE:IPINIP_V6_TUNNEL" : { + "tunnel_type":"IPINIP", + "dscp_mode":"uniform", + "ecn_mode":"copy_from_outer", + "ttl_mode":"pipe" + }, + "OP": "SET" + }, + { + "TUNNEL_DECAP_TERM_TABLE:IPINIP_V6_TUNNEL:fc00:1::32" : { + "term_type":"P2MP" + }, + "OP": "SET" + }, + { + "TUNNEL_DECAP_TERM_TABLE:IPINIP_V6_TUNNEL:fc00::71" : { + "term_type":"P2MP" + }, + "OP": "SET" + }, + { + "TUNNEL_DECAP_TERM_TABLE:IPINIP_V6_TUNNEL:fc00::75" : { + "term_type":"P2MP" + }, + "OP": "SET" + }, + { + "TUNNEL_DECAP_TERM_TABLE:IPINIP_V6_TUNNEL:fc00::79" : { + "term_type":"P2MP" + }, + "OP": "SET" + }, + { + "TUNNEL_DECAP_TERM_TABLE:IPINIP_V6_TUNNEL:fc00::7d" : { + "term_type":"P2MP" + }, + "OP": "SET" + } +] diff --git a/src/sonic-config-engine/tests/sample_output/py3/lldp_conf/lldpd-ipv4-iface-with-ports.conf b/src/sonic-config-engine/tests/sample_output/py3/lldp_conf/lldpd-ipv4-iface-with-ports.conf new file mode 100644 index 00000000000..684791a0f2f --- /dev/null +++ b/src/sonic-config-engine/tests/sample_output/py3/lldp_conf/lldpd-ipv4-iface-with-ports.conf @@ -0,0 +1,5 @@ +configure ports eth0 lldp portidsubtype local eth0 +configure system ip management pattern 10.0.0.100 +configure system hostname switch-t0 +configure lldp portidsubtype ifname +pause diff --git a/src/sonic-config-engine/tests/sample_output/py3/lldp_conf/lldpd-ipv4-iface.conf b/src/sonic-config-engine/tests/sample_output/py3/lldp_conf/lldpd-ipv4-iface.conf index c9cb2c8123d..684791a0f2f 100644 --- a/src/sonic-config-engine/tests/sample_output/py3/lldp_conf/lldpd-ipv4-iface.conf +++ b/src/sonic-config-engine/tests/sample_output/py3/lldp_conf/lldpd-ipv4-iface.conf @@ -1,4 +1,5 @@ configure ports eth0 lldp portidsubtype local eth0 configure system ip management pattern 10.0.0.100 configure system hostname switch-t0 +configure lldp portidsubtype ifname pause diff --git a/src/sonic-config-engine/tests/sample_output/py3/lldp_conf/lldpd-ipv6-iface.conf b/src/sonic-config-engine/tests/sample_output/py3/lldp_conf/lldpd-ipv6-iface.conf index f5727556fdf..0eb085873dc 100644 --- a/src/sonic-config-engine/tests/sample_output/py3/lldp_conf/lldpd-ipv6-iface.conf +++ b/src/sonic-config-engine/tests/sample_output/py3/lldp_conf/lldpd-ipv6-iface.conf @@ -1,2 +1,5 @@ +configure ports eth0 lldp portidsubtype local eth0 +configure system ip management pattern 2603:10e2:0:2902::8 configure system hostname switch-t0 +configure lldp portidsubtype ifname pause diff --git a/src/sonic-config-engine/tests/sample_output/py3/mvrf_interfaces b/src/sonic-config-engine/tests/sample_output/py3/mvrf_interfaces index a72d754b3ca..0549dcb54b4 100644 --- a/src/sonic-config-engine/tests/sample_output/py3/mvrf_interfaces +++ b/src/sonic-config-engine/tests/sample_output/py3/mvrf_interfaces @@ -5,7 +5,7 @@ # auto mgmt iface mgmt - vrf-table 5000 + vrf-table 6000 # The loopback network interface for mgmt VRF that is required for applications like NTP up ip link add lo-m type dummy up ip link set dev lo-m master mgmt @@ -31,19 +31,19 @@ iface eth0 inet static vrf mgmt ########## management network policy routing rules # management port up rules - up ip -4 route add default via 10.0.0.1 dev eth0 table 5000 metric 201 - up ip -4 route add 10.0.0.0/24 dev eth0 table 5000 - up ip -4 rule add pref 32765 from 10.0.0.100/32 table 5000 - up ip -4 rule add pref 32764 to 11.11.11.11 table 5000 - up ip -4 rule add pref 32764 to 22.22.22.0/23 table 5000 - up ip rule add pref 32764 to 10.20.6.16/32 table 5000 + up ip -4 route add 10.0.0.0/24 dev eth0 table 6000 + up ip -4 route add default via 10.0.0.1 dev eth0 table 6000 metric 201 + up ip -4 rule add pref 32765 from 10.0.0.100/32 table 6000 + up ip -4 rule add pref 32764 to 11.11.11.11 table 6000 + up ip -4 rule add pref 32764 to 22.22.22.0/23 table 6000 + up ip rule add pref 32764 to 10.20.6.16/32 table 6000 # management port down rules - pre-down ip -4 route delete default via 10.0.0.1 dev eth0 table 5000 - pre-down ip -4 route delete 10.0.0.0/24 dev eth0 table 5000 - pre-down ip -4 rule delete pref 32765 from 10.0.0.100/32 table 5000 - pre-down ip -4 rule delete pref 32764 to 11.11.11.11 table 5000 - pre-down ip -4 rule delete pref 32764 to 22.22.22.0/23 table 5000 - down ip rule delete pref 32764 to 10.20.6.16/32 table 5000 + pre-down ip -4 route delete default via 10.0.0.1 dev eth0 table 6000 + pre-down ip -4 route delete 10.0.0.0/24 dev eth0 table 6000 + pre-down ip -4 rule delete pref 32765 from 10.0.0.100/32 table 6000 + pre-down ip -4 rule delete pref 32764 to 11.11.11.11 table 6000 + pre-down ip -4 rule delete pref 32764 to 22.22.22.0/23 table 6000 + down ip rule delete pref 32764 to 10.20.6.16/32 table 6000 iface eth0 inet6 static address 2603:10e2:0:2902::8 netmask 64 @@ -52,15 +52,15 @@ iface eth0 inet6 static vrf mgmt ########## management network policy routing rules # management port up rules - up ip -6 route add default via 2603:10e2:0:2902::1 dev eth0 table 5000 metric 201 - up ip -6 route add 2603:10e2:0:2902::/64 dev eth0 table 5000 - up ip -6 rule add pref 32765 from 2603:10e2:0:2902::8/128 table 5000 - up ip -6 rule add pref 32764 to 33:33:33::0/64 table 5000 + up ip -6 route add 2603:10e2:0:2902::/64 dev eth0 table 6000 + up ip -6 route add default via 2603:10e2:0:2902::1 dev eth0 table 6000 metric 201 + up ip -6 rule add pref 32765 from 2603:10e2:0:2902::8/128 table 6000 + up ip -6 rule add pref 32764 to 33:33:33::0/64 table 6000 # management port down rules - pre-down ip -6 route delete default via 2603:10e2:0:2902::1 dev eth0 table 5000 - pre-down ip -6 route delete 2603:10e2:0:2902::/64 dev eth0 table 5000 - pre-down ip -6 rule delete pref 32765 from 2603:10e2:0:2902::8/128 table 5000 - pre-down ip -6 rule delete pref 32764 to 33:33:33::0/64 table 5000 + pre-down ip -6 route delete default via 2603:10e2:0:2902::1 dev eth0 table 6000 + pre-down ip -6 route delete 2603:10e2:0:2902::/64 dev eth0 table 6000 + pre-down ip -6 rule delete pref 32765 from 2603:10e2:0:2902::8/128 table 6000 + pre-down ip -6 rule delete pref 32764 to 33:33:33::0/64 table 6000 # source /etc/network/interfaces.d/* # diff --git a/src/sonic-config-engine/tests/sample_output/py3/mvrf_interfaces_nomgmt b/src/sonic-config-engine/tests/sample_output/py3/mvrf_interfaces_nomgmt index 8f0f4555781..9b8455330bf 100644 --- a/src/sonic-config-engine/tests/sample_output/py3/mvrf_interfaces_nomgmt +++ b/src/sonic-config-engine/tests/sample_output/py3/mvrf_interfaces_nomgmt @@ -5,7 +5,7 @@ # auto mgmt iface mgmt - vrf-table 5000 + vrf-table 6000 # The loopback network interface for mgmt VRF that is required for applications like NTP up ip link add lo-m type dummy up ip link set dev lo-m master mgmt diff --git a/src/sonic-config-engine/tests/sample_output/py3/qos-arista7800r3-48cq2-lc.json b/src/sonic-config-engine/tests/sample_output/py3/qos-arista7800r3-48cq2-lc.json index 32d49aa9709..9b1bfa9981e 100644 --- a/src/sonic-config-engine/tests/sample_output/py3/qos-arista7800r3-48cq2-lc.json +++ b/src/sonic-config-engine/tests/sample_output/py3/qos-arista7800r3-48cq2-lc.json @@ -120,362 +120,362 @@ "Ethernet0": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet4": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet8": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet12": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet16": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet20": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet24": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet28": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet32": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet36": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet40": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet44": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet48": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet52": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet56": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet60": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet64": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet68": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet72": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet76": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet80": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet84": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet88": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet92": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet96": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet100": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet104": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet108": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet112": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet116": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet120": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet124": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet128": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet132": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet136": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet140": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet144": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet148": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet152": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet156": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet164": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet176": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet180": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet184": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet188": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" } }, "WRED_PROFILE": { @@ -492,1160 +492,962 @@ "red_min_threshold" : "2000000", "green_drop_probability" : "5", "yellow_drop_probability": "5", - "red_drop_probability" : "5" + "red_drop_probability": "5" } }, "QUEUE": { "dut-lc3|Asic0|Ethernet0|3": { - "scheduler" : "scheduler.1", + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc3|Asic0|Ethernet4|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet0|4": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc3|Asic0|Ethernet8|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet4|3": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc3|Asic0|Ethernet12|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet4|4": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc3|Asic0|Ethernet16|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet8|3": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc3|Asic0|Ethernet20|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet8|4": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc3|Asic0|Ethernet24|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet12|3": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc3|Asic0|Ethernet28|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet12|4": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc3|Asic0|Ethernet32|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet16|3": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc3|Asic0|Ethernet36|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet16|4": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc3|Asic0|Ethernet40|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet20|3": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc3|Asic0|Ethernet44|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet20|4": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc3|Asic0|Ethernet48|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet24|3": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc3|Asic0|Ethernet52|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet24|4": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc3|Asic0|Ethernet56|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet28|3": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc3|Asic0|Ethernet60|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet28|4": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc3|Asic0|Ethernet64|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet32|3": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc3|Asic0|Ethernet68|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet32|4": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc3|Asic0|Ethernet72|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet36|3": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc3|Asic0|Ethernet76|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet36|4": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc3|Asic0|Ethernet80|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet40|3": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc3|Asic0|Ethernet84|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet40|4": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc3|Asic0|Ethernet88|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet44|3": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc3|Asic0|Ethernet92|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet44|4": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc3|Asic0|Ethernet96|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet48|3": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc3|Asic0|Ethernet100|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet48|4": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc3|Asic0|Ethernet104|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet52|3": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc3|Asic0|Ethernet108|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet52|4": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc3|Asic0|Ethernet112|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet56|3": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc3|Asic0|Ethernet116|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet56|4": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc3|Asic0|Ethernet120|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet60|3": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc3|Asic0|Ethernet124|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet60|4": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc3|Asic0|Ethernet128|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet64|3": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc3|Asic0|Ethernet132|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet64|4": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc3|Asic0|Ethernet136|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet68|3": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc3|Asic0|Ethernet140|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet68|4": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc3|Asic0|Ethernet144|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet72|3": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc3|Asic0|Ethernet148|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet72|4": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc3|Asic0|Ethernet152|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet76|3": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc3|Asic0|Ethernet156|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet76|4": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc3|Asic0|Ethernet160|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet80|3": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc3|Asic0|Ethernet164|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet80|4": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc3|Asic0|Ethernet168|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet84|3": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc3|Asic0|Ethernet172|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet84|4": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc3|Asic0|Ethernet176|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet88|3": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc3|Asic0|Ethernet180|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet88|4": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc3|Asic0|Ethernet184|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet92|3": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc3|Asic0|Ethernet188|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet92|4": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc4|Asic0|Ethernet0|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet96|3": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc4|Asic0|Ethernet4|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet96|4": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc4|Asic0|Ethernet8|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet100|3": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc4|Asic0|Ethernet12|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet100|4": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc4|Asic0|Ethernet16|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet104|3": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc4|Asic0|Ethernet20|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet104|4": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc4|Asic0|Ethernet24|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet108|3": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc4|Asic0|Ethernet28|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet108|4": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc4|Asic0|Ethernet32|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet112|3": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc4|Asic0|Ethernet36|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet112|4": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc4|Asic0|Ethernet40|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet116|3": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc4|Asic0|Ethernet44|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet116|4": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc4|Asic0|Ethernet48|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet120|3": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc4|Asic0|Ethernet52|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet120|4": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc4|Asic0|Ethernet56|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet124|3": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc4|Asic0|Ethernet60|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet124|4": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc4|Asic0|Ethernet64|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet128|3": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc4|Asic0|Ethernet68|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet128|4": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc4|Asic0|Ethernet72|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet132|3": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc4|Asic0|Ethernet76|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet132|4": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc4|Asic0|Ethernet80|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet136|3": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc4|Asic0|Ethernet84|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet136|4": { + "scheduler": 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"dut-lc5|Asic0|Ethernet184|3": { "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc5|Asic0|Ethernet180|4": { - "scheduler" : "scheduler.1", + "dut-lc5|Asic0|Ethernet184|4": { "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc5|Asic0|Ethernet184|4": { - "scheduler" : "scheduler.1", + "dut-lc5|Asic0|Ethernet188|3": { "wred_profile": "AZURE_LOSSLESS" }, "dut-lc5|Asic0|Ethernet188|4": { - "scheduler" : "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, "dut-lc3|Asic0|Ethernet0|0": { @@ -1768,18 +1570,9 @@ "dut-lc3|Asic0|Ethernet156|0": { "scheduler": "scheduler.0" }, - "dut-lc3|Asic0|Ethernet160|0": { - "scheduler": "scheduler.0" - }, "dut-lc3|Asic0|Ethernet164|0": { "scheduler": "scheduler.0" }, - "dut-lc3|Asic0|Ethernet168|0": { - "scheduler": "scheduler.0" - }, - "dut-lc3|Asic0|Ethernet172|0": { - "scheduler": "scheduler.0" - }, "dut-lc3|Asic0|Ethernet176|0": { "scheduler": "scheduler.0" }, @@ -1792,1878 +1585,545 @@ "dut-lc3|Asic0|Ethernet188|0": { "scheduler": "scheduler.0" }, - "dut-lc4|Asic0|Ethernet0|0": { - "scheduler": "scheduler.0" - }, - "dut-lc4|Asic0|Ethernet4|0": { - "scheduler": "scheduler.0" - }, - "dut-lc4|Asic0|Ethernet8|0": { - "scheduler": "scheduler.0" - }, - "dut-lc4|Asic0|Ethernet12|0": { - "scheduler": "scheduler.0" - }, - "dut-lc4|Asic0|Ethernet16|0": { - "scheduler": "scheduler.0" - }, - "dut-lc4|Asic0|Ethernet20|0": { - "scheduler": "scheduler.0" - }, - "dut-lc4|Asic0|Ethernet24|0": { - "scheduler": "scheduler.0" - }, - "dut-lc4|Asic0|Ethernet28|0": { - "scheduler": "scheduler.0" - }, - "dut-lc4|Asic0|Ethernet32|0": { - "scheduler": "scheduler.0" - }, - "dut-lc4|Asic0|Ethernet36|0": { - "scheduler": "scheduler.0" - }, - "dut-lc4|Asic0|Ethernet40|0": { - "scheduler": "scheduler.0" - }, - "dut-lc4|Asic0|Ethernet44|0": { - "scheduler": "scheduler.0" - }, - "dut-lc4|Asic0|Ethernet48|0": { - "scheduler": "scheduler.0" - }, - "dut-lc4|Asic0|Ethernet52|0": { - "scheduler": "scheduler.0" - }, - "dut-lc4|Asic0|Ethernet56|0": { - "scheduler": "scheduler.0" - }, - "dut-lc4|Asic0|Ethernet60|0": { - "scheduler": "scheduler.0" - }, - "dut-lc4|Asic0|Ethernet64|0": { - "scheduler": "scheduler.0" - }, - "dut-lc4|Asic0|Ethernet68|0": { - "scheduler": "scheduler.0" - }, - "dut-lc4|Asic0|Ethernet72|0": { - "scheduler": "scheduler.0" - }, - "dut-lc4|Asic0|Ethernet76|0": { - "scheduler": "scheduler.0" - }, - "dut-lc4|Asic0|Ethernet80|0": { - "scheduler": "scheduler.0" - }, - "dut-lc4|Asic0|Ethernet84|0": { - "scheduler": "scheduler.0" - }, - "dut-lc4|Asic0|Ethernet88|0": { - "scheduler": "scheduler.0" - }, - "dut-lc4|Asic0|Ethernet92|0": { - "scheduler": "scheduler.0" - }, - "dut-lc4|Asic0|Ethernet96|0": { - "scheduler": "scheduler.0" - }, - "dut-lc4|Asic0|Ethernet100|0": { - "scheduler": "scheduler.0" - }, - "dut-lc4|Asic0|Ethernet104|0": { - "scheduler": "scheduler.0" - }, - "dut-lc4|Asic0|Ethernet108|0": { - "scheduler": "scheduler.0" - }, - "dut-lc4|Asic0|Ethernet112|0": { - "scheduler": "scheduler.0" - }, - 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}, - "dut-lc4|Asic0|Ethernet164|0": { + "dut-lc3|Asic0|Ethernet24|1": { "scheduler": "scheduler.0" }, - "dut-lc4|Asic0|Ethernet168|0": { + "dut-lc3|Asic0|Ethernet28|1": { "scheduler": "scheduler.0" }, - "dut-lc4|Asic0|Ethernet172|0": { + "dut-lc3|Asic0|Ethernet32|1": { "scheduler": "scheduler.0" }, - "dut-lc4|Asic0|Ethernet176|0": { + "dut-lc3|Asic0|Ethernet36|1": { "scheduler": "scheduler.0" }, - "dut-lc4|Asic0|Ethernet180|0": { + "dut-lc3|Asic0|Ethernet40|1": { "scheduler": "scheduler.0" }, - "dut-lc4|Asic0|Ethernet184|0": { + "dut-lc3|Asic0|Ethernet44|1": { "scheduler": "scheduler.0" }, - "dut-lc4|Asic0|Ethernet188|0": { + "dut-lc3|Asic0|Ethernet48|1": { "scheduler": "scheduler.0" }, - "dut-lc5|Asic0|Ethernet0|0": { + "dut-lc3|Asic0|Ethernet52|1": { "scheduler": "scheduler.0" }, - "dut-lc5|Asic0|Ethernet4|0": { + "dut-lc3|Asic0|Ethernet56|1": { "scheduler": "scheduler.0" }, - "dut-lc5|Asic0|Ethernet8|0": { + "dut-lc3|Asic0|Ethernet60|1": { "scheduler": "scheduler.0" }, - "dut-lc5|Asic0|Ethernet12|0": { + "dut-lc3|Asic0|Ethernet64|1": { "scheduler": "scheduler.0" }, - "dut-lc5|Asic0|Ethernet16|0": { + "dut-lc3|Asic0|Ethernet68|1": { "scheduler": "scheduler.0" }, - "dut-lc5|Asic0|Ethernet20|0": { + "dut-lc3|Asic0|Ethernet72|1": { "scheduler": "scheduler.0" }, - "dut-lc5|Asic0|Ethernet24|0": { + "dut-lc3|Asic0|Ethernet76|1": { "scheduler": "scheduler.0" }, - "dut-lc5|Asic0|Ethernet28|0": { + "dut-lc3|Asic0|Ethernet80|1": { "scheduler": "scheduler.0" }, - "dut-lc5|Asic0|Ethernet32|0": { + "dut-lc3|Asic0|Ethernet84|1": { "scheduler": "scheduler.0" }, - "dut-lc5|Asic0|Ethernet36|0": { + "dut-lc3|Asic0|Ethernet88|1": { "scheduler": "scheduler.0" }, - "dut-lc5|Asic0|Ethernet40|0": { + "dut-lc3|Asic0|Ethernet92|1": { "scheduler": "scheduler.0" }, - "dut-lc5|Asic0|Ethernet44|0": { + "dut-lc3|Asic0|Ethernet96|1": { "scheduler": "scheduler.0" }, - "dut-lc5|Asic0|Ethernet48|0": { + "dut-lc3|Asic0|Ethernet100|1": { "scheduler": "scheduler.0" }, - "dut-lc5|Asic0|Ethernet52|0": { + "dut-lc3|Asic0|Ethernet104|1": { "scheduler": "scheduler.0" }, - "dut-lc5|Asic0|Ethernet56|0": { + "dut-lc3|Asic0|Ethernet108|1": { "scheduler": "scheduler.0" }, - "dut-lc5|Asic0|Ethernet60|0": { + "dut-lc3|Asic0|Ethernet112|1": { "scheduler": "scheduler.0" }, - "dut-lc5|Asic0|Ethernet64|0": { - "scheduler": "scheduler.0" - }, - "dut-lc5|Asic0|Ethernet68|0": { - "scheduler": "scheduler.0" - }, - "dut-lc5|Asic0|Ethernet72|0": { - "scheduler": "scheduler.0" - }, - "dut-lc5|Asic0|Ethernet76|0": { - "scheduler": "scheduler.0" - }, - "dut-lc5|Asic0|Ethernet80|0": { - "scheduler": "scheduler.0" - }, - "dut-lc5|Asic0|Ethernet84|0": { - "scheduler": "scheduler.0" - }, - "dut-lc5|Asic0|Ethernet88|0": { - "scheduler": "scheduler.0" - }, - "dut-lc5|Asic0|Ethernet92|0": { - "scheduler": "scheduler.0" - }, - "dut-lc5|Asic0|Ethernet96|0": { - "scheduler": "scheduler.0" - }, - "dut-lc5|Asic0|Ethernet100|0": { - "scheduler": "scheduler.0" - }, - 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"dut-lc3|Asic0|Ethernet84|6": { - "scheduler": "scheduler.0" - }, "dut-lc3|Asic0|Ethernet88|6": { - "scheduler": "scheduler.0" - }, "dut-lc3|Asic0|Ethernet92|6": { - "scheduler": "scheduler.0" - }, "dut-lc3|Asic0|Ethernet96|6": { - "scheduler": "scheduler.0" - }, "dut-lc3|Asic0|Ethernet100|6": { - "scheduler": "scheduler.0" - }, "dut-lc3|Asic0|Ethernet104|6": { - "scheduler": "scheduler.0" - }, "dut-lc3|Asic0|Ethernet108|6": { - "scheduler": "scheduler.0" - }, "dut-lc3|Asic0|Ethernet112|6": { - "scheduler": "scheduler.0" - }, "dut-lc3|Asic0|Ethernet116|6": { - "scheduler": "scheduler.0" - }, "dut-lc3|Asic0|Ethernet120|6": { - "scheduler": "scheduler.0" - }, "dut-lc3|Asic0|Ethernet124|6": { - "scheduler": "scheduler.0" - }, "dut-lc3|Asic0|Ethernet128|6": { - "scheduler": "scheduler.0" - }, "dut-lc3|Asic0|Ethernet132|6": { - "scheduler": "scheduler.0" - }, "dut-lc3|Asic0|Ethernet136|6": { - "scheduler": "scheduler.0" - }, "dut-lc3|Asic0|Ethernet140|6": { - "scheduler": "scheduler.0" - }, "dut-lc3|Asic0|Ethernet144|6": { - "scheduler": "scheduler.0" - }, "dut-lc3|Asic0|Ethernet148|6": { - "scheduler": "scheduler.0" - }, "dut-lc3|Asic0|Ethernet152|6": { - "scheduler": "scheduler.0" - }, "dut-lc3|Asic0|Ethernet156|6": { - "scheduler": "scheduler.0" - }, "dut-lc3|Asic0|Ethernet160|6": { - "scheduler": "scheduler.0" - }, "dut-lc3|Asic0|Ethernet164|6": { - "scheduler": "scheduler.0" - }, "dut-lc3|Asic0|Ethernet168|6": { - "scheduler": "scheduler.0" - }, "dut-lc3|Asic0|Ethernet172|6": { - "scheduler": "scheduler.0" - }, "dut-lc3|Asic0|Ethernet176|6": { - "scheduler": "scheduler.0" - }, "dut-lc3|Asic0|Ethernet180|6": { - "scheduler": "scheduler.0" - }, "dut-lc3|Asic0|Ethernet184|6": { - "scheduler": "scheduler.0" - }, "dut-lc3|Asic0|Ethernet188|6": { - "scheduler": "scheduler.0" - }, "dut-lc4|Asic0|Ethernet0|6": { - "scheduler": "scheduler.0" - }, "dut-lc4|Asic0|Ethernet4|6": { - "scheduler": "scheduler.0" - }, "dut-lc4|Asic0|Ethernet8|6": { - "scheduler": "scheduler.0" - }, "dut-lc4|Asic0|Ethernet12|6": { - "scheduler": "scheduler.0" - }, "dut-lc4|Asic0|Ethernet16|6": { - "scheduler": "scheduler.0" - }, "dut-lc4|Asic0|Ethernet20|6": { - "scheduler": "scheduler.0" - }, "dut-lc4|Asic0|Ethernet24|6": { - "scheduler": "scheduler.0" - }, "dut-lc4|Asic0|Ethernet28|6": { - "scheduler": "scheduler.0" - }, "dut-lc4|Asic0|Ethernet32|6": { - "scheduler": "scheduler.0" - }, "dut-lc4|Asic0|Ethernet36|6": { - "scheduler": "scheduler.0" - }, "dut-lc4|Asic0|Ethernet40|6": { - "scheduler": "scheduler.0" - }, "dut-lc4|Asic0|Ethernet44|6": { - "scheduler": "scheduler.0" - }, "dut-lc4|Asic0|Ethernet48|6": { - "scheduler": "scheduler.0" - }, "dut-lc4|Asic0|Ethernet52|6": { - "scheduler": "scheduler.0" - }, "dut-lc4|Asic0|Ethernet56|6": { - "scheduler": "scheduler.0" - }, "dut-lc4|Asic0|Ethernet60|6": { - "scheduler": "scheduler.0" - }, "dut-lc4|Asic0|Ethernet64|6": { - "scheduler": "scheduler.0" - }, "dut-lc4|Asic0|Ethernet68|6": { - "scheduler": "scheduler.0" - }, "dut-lc4|Asic0|Ethernet72|6": { - "scheduler": "scheduler.0" - }, "dut-lc4|Asic0|Ethernet76|6": { - "scheduler": "scheduler.0" - }, "dut-lc4|Asic0|Ethernet80|6": { - "scheduler": "scheduler.0" - }, "dut-lc4|Asic0|Ethernet84|6": { - "scheduler": "scheduler.0" - }, "dut-lc4|Asic0|Ethernet88|6": { - "scheduler": "scheduler.0" - }, "dut-lc4|Asic0|Ethernet92|6": { - "scheduler": "scheduler.0" - }, "dut-lc4|Asic0|Ethernet96|6": { - "scheduler": "scheduler.0" - }, "dut-lc4|Asic0|Ethernet100|6": { - "scheduler": "scheduler.0" - }, "dut-lc4|Asic0|Ethernet104|6": { - "scheduler": "scheduler.0" - }, "dut-lc4|Asic0|Ethernet108|6": { - "scheduler": "scheduler.0" - }, "dut-lc4|Asic0|Ethernet112|6": { - "scheduler": "scheduler.0" - }, "dut-lc4|Asic0|Ethernet116|6": { - "scheduler": "scheduler.0" - }, "dut-lc4|Asic0|Ethernet120|6": { - "scheduler": "scheduler.0" - }, "dut-lc4|Asic0|Ethernet124|6": { - "scheduler": "scheduler.0" - }, "dut-lc4|Asic0|Ethernet128|6": { - "scheduler": "scheduler.0" - }, "dut-lc4|Asic0|Ethernet132|6": { - "scheduler": "scheduler.0" - }, "dut-lc4|Asic0|Ethernet136|6": { - "scheduler": "scheduler.0" - }, "dut-lc4|Asic0|Ethernet140|6": { - "scheduler": "scheduler.0" - }, "dut-lc4|Asic0|Ethernet144|6": { - "scheduler": "scheduler.0" - }, "dut-lc4|Asic0|Ethernet148|6": { - "scheduler": "scheduler.0" - }, "dut-lc4|Asic0|Ethernet152|6": { - "scheduler": "scheduler.0" - }, "dut-lc4|Asic0|Ethernet156|6": { - "scheduler": "scheduler.0" - }, "dut-lc4|Asic0|Ethernet160|6": { - "scheduler": "scheduler.0" - }, "dut-lc4|Asic0|Ethernet164|6": { - "scheduler": "scheduler.0" - }, "dut-lc4|Asic0|Ethernet168|6": { - "scheduler": "scheduler.0" - }, "dut-lc4|Asic0|Ethernet172|6": { - "scheduler": "scheduler.0" - }, "dut-lc4|Asic0|Ethernet176|6": { - "scheduler": "scheduler.0" - }, "dut-lc4|Asic0|Ethernet180|6": { - "scheduler": "scheduler.0" - }, "dut-lc4|Asic0|Ethernet184|6": { - "scheduler": "scheduler.0" - }, "dut-lc4|Asic0|Ethernet188|6": { - "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet0|6": { - "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet4|6": { - "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet8|6": { - "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet12|6": { - "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet16|6": { + }, + "dut-lc3|Asic0|Ethernet4|6": { "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet20|6": { + }, + "dut-lc3|Asic0|Ethernet8|6": { "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet24|6": { + }, + "dut-lc3|Asic0|Ethernet12|6": { "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet28|6": { + }, + "dut-lc3|Asic0|Ethernet16|6": { "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet32|6": { + }, + "dut-lc3|Asic0|Ethernet20|6": { "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet36|6": { + }, + "dut-lc3|Asic0|Ethernet24|6": { "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet40|6": { + }, + "dut-lc3|Asic0|Ethernet28|6": { "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet44|6": { + }, + "dut-lc3|Asic0|Ethernet32|6": { "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet48|6": { + }, + "dut-lc3|Asic0|Ethernet36|6": { "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet52|6": { + }, + "dut-lc3|Asic0|Ethernet40|6": { "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet56|6": { + }, + "dut-lc3|Asic0|Ethernet44|6": { "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet60|6": { + }, + "dut-lc3|Asic0|Ethernet48|6": { "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet64|6": { + }, + "dut-lc3|Asic0|Ethernet52|6": { "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet68|6": { + }, + "dut-lc3|Asic0|Ethernet56|6": { "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet72|6": { + }, + "dut-lc3|Asic0|Ethernet60|6": { "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet76|6": { + }, + "dut-lc3|Asic0|Ethernet64|6": { "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet80|6": { + }, + "dut-lc3|Asic0|Ethernet68|6": { "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet84|6": { + }, + "dut-lc3|Asic0|Ethernet72|6": { "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet88|6": { + }, + "dut-lc3|Asic0|Ethernet76|6": { "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet92|6": { + }, + "dut-lc3|Asic0|Ethernet80|6": { "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet96|6": { + }, + "dut-lc3|Asic0|Ethernet84|6": { "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet100|6": { + }, + "dut-lc3|Asic0|Ethernet88|6": { "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet104|6": { + }, + "dut-lc3|Asic0|Ethernet92|6": { "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet108|6": { + }, + "dut-lc3|Asic0|Ethernet96|6": { "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet112|6": { + }, + "dut-lc3|Asic0|Ethernet100|6": { "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet116|6": { + }, + "dut-lc3|Asic0|Ethernet104|6": { "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet120|6": { + }, + "dut-lc3|Asic0|Ethernet108|6": { "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet124|6": { + }, + "dut-lc3|Asic0|Ethernet112|6": { "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet128|6": { + }, + "dut-lc3|Asic0|Ethernet116|6": { "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet132|6": { + }, + "dut-lc3|Asic0|Ethernet120|6": { "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet136|6": { + }, + "dut-lc3|Asic0|Ethernet124|6": { "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet140|6": { + }, + "dut-lc3|Asic0|Ethernet128|6": { "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet144|6": { + }, + "dut-lc3|Asic0|Ethernet132|6": { "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet148|6": { + }, + "dut-lc3|Asic0|Ethernet136|6": { "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet152|6": { + }, + "dut-lc3|Asic0|Ethernet140|6": { "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet156|6": { + }, + "dut-lc3|Asic0|Ethernet144|6": { "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet160|6": { + }, + "dut-lc3|Asic0|Ethernet148|6": { "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet164|6": { + }, + "dut-lc3|Asic0|Ethernet152|6": { "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet168|6": { + }, + "dut-lc3|Asic0|Ethernet156|6": { "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet172|6": { + }, + "dut-lc3|Asic0|Ethernet164|6": { "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet176|6": { + }, + "dut-lc3|Asic0|Ethernet176|6": { "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet180|6": { + }, + "dut-lc3|Asic0|Ethernet180|6": { "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet184|6": { + }, + "dut-lc3|Asic0|Ethernet184|6": { "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet188|6": { + }, + "dut-lc3|Asic0|Ethernet188|6": { "scheduler": "scheduler.0" - } + } } -} +} \ No newline at end of file diff --git a/src/sonic-config-engine/tests/sample_output/py3/qos-arista7800r3-48cqm2-lc.json b/src/sonic-config-engine/tests/sample_output/py3/qos-arista7800r3-48cqm2-lc.json index 32d49aa9709..4d1bf610c03 100644 --- a/src/sonic-config-engine/tests/sample_output/py3/qos-arista7800r3-48cqm2-lc.json +++ b/src/sonic-config-engine/tests/sample_output/py3/qos-arista7800r3-48cqm2-lc.json @@ -120,362 +120,362 @@ "Ethernet0": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet4": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet8": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet12": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet16": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet20": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet24": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet28": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet32": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet36": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet40": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet44": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet48": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet52": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet56": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet60": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet64": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet68": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet72": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet76": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet80": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet84": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet88": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet92": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet96": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet100": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet104": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet108": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet112": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet116": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet120": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet124": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet128": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet132": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet136": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet140": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet144": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet148": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet152": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet156": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet164": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet176": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet180": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet184": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet188": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" } }, "WRED_PROFILE": { @@ -497,1155 +497,957 @@ }, "QUEUE": { "dut-lc3|Asic0|Ethernet0|3": { - "scheduler" : "scheduler.1", + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc3|Asic0|Ethernet4|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet0|4": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc3|Asic0|Ethernet8|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet4|3": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc3|Asic0|Ethernet12|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet4|4": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc3|Asic0|Ethernet16|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet8|3": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc3|Asic0|Ethernet20|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet8|4": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc3|Asic0|Ethernet24|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet12|3": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc3|Asic0|Ethernet28|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet12|4": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc3|Asic0|Ethernet32|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet16|3": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc3|Asic0|Ethernet36|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet16|4": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc3|Asic0|Ethernet40|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet20|3": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc3|Asic0|Ethernet44|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet20|4": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc3|Asic0|Ethernet48|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet24|3": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc3|Asic0|Ethernet52|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet24|4": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc3|Asic0|Ethernet56|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet28|3": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc3|Asic0|Ethernet60|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet28|4": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc3|Asic0|Ethernet64|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet32|3": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc3|Asic0|Ethernet68|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet32|4": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc3|Asic0|Ethernet72|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet36|3": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc3|Asic0|Ethernet76|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet36|4": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc3|Asic0|Ethernet80|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet40|3": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc3|Asic0|Ethernet84|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet40|4": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc3|Asic0|Ethernet88|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet44|3": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc3|Asic0|Ethernet92|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet44|4": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc3|Asic0|Ethernet96|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet48|3": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc3|Asic0|Ethernet100|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet48|4": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc3|Asic0|Ethernet104|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet52|3": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc3|Asic0|Ethernet108|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet52|4": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc3|Asic0|Ethernet112|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet56|3": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc3|Asic0|Ethernet116|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet56|4": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc3|Asic0|Ethernet120|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet60|3": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc3|Asic0|Ethernet124|3": { - "scheduler" : "scheduler.1", + "dut-lc3|Asic0|Ethernet60|4": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - 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"dut-lc4|Asic0|Ethernet128|4": { - "scheduler" : "scheduler.1", + "dut-lc5|Asic0|Ethernet64|3": { "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc4|Asic0|Ethernet132|4": { - "scheduler" : "scheduler.1", + "dut-lc5|Asic0|Ethernet64|4": { "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc4|Asic0|Ethernet136|4": { - "scheduler" : "scheduler.1", + "dut-lc5|Asic0|Ethernet68|3": { "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc4|Asic0|Ethernet140|4": { - "scheduler" : "scheduler.1", + "dut-lc5|Asic0|Ethernet68|4": { "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc4|Asic0|Ethernet144|4": { - "scheduler" : "scheduler.1", + "dut-lc5|Asic0|Ethernet72|3": { "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc4|Asic0|Ethernet148|4": { - "scheduler" : "scheduler.1", + "dut-lc5|Asic0|Ethernet72|4": { "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc4|Asic0|Ethernet152|4": { - "scheduler" : "scheduler.1", + "dut-lc5|Asic0|Ethernet76|3": { "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc4|Asic0|Ethernet156|4": { - "scheduler" : "scheduler.1", + "dut-lc5|Asic0|Ethernet76|4": { "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc4|Asic0|Ethernet160|4": { - "scheduler" : "scheduler.1", + "dut-lc5|Asic0|Ethernet80|3": { "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc4|Asic0|Ethernet164|4": { - "scheduler" : "scheduler.1", + "dut-lc5|Asic0|Ethernet80|4": { "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc4|Asic0|Ethernet168|4": { - "scheduler" : "scheduler.1", + "dut-lc5|Asic0|Ethernet84|3": { "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc4|Asic0|Ethernet172|4": { - "scheduler" : "scheduler.1", + "dut-lc5|Asic0|Ethernet84|4": { "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc4|Asic0|Ethernet176|4": { - "scheduler" : "scheduler.1", + "dut-lc5|Asic0|Ethernet88|3": { "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc4|Asic0|Ethernet180|4": { - "scheduler" : "scheduler.1", + "dut-lc5|Asic0|Ethernet88|4": { "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc4|Asic0|Ethernet184|4": { - "scheduler" : "scheduler.1", + "dut-lc5|Asic0|Ethernet92|3": { "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc4|Asic0|Ethernet188|4": { - "scheduler" : "scheduler.1", + "dut-lc5|Asic0|Ethernet92|4": { "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc5|Asic0|Ethernet0|4": { - "scheduler" : "scheduler.1", + "dut-lc5|Asic0|Ethernet96|3": { "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc5|Asic0|Ethernet4|4": { - "scheduler" : "scheduler.1", + "dut-lc5|Asic0|Ethernet96|4": { "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc5|Asic0|Ethernet8|4": { - "scheduler" : "scheduler.1", + "dut-lc5|Asic0|Ethernet100|3": { "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc5|Asic0|Ethernet12|4": { - "scheduler" : "scheduler.1", + "dut-lc5|Asic0|Ethernet100|4": { "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc5|Asic0|Ethernet16|4": { - "scheduler" : "scheduler.1", + "dut-lc5|Asic0|Ethernet104|3": { "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc5|Asic0|Ethernet20|4": { - "scheduler" : "scheduler.1", + "dut-lc5|Asic0|Ethernet104|4": { "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc5|Asic0|Ethernet24|4": { - "scheduler" : "scheduler.1", + "dut-lc5|Asic0|Ethernet108|3": { "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc5|Asic0|Ethernet28|4": { - "scheduler" : "scheduler.1", + "dut-lc5|Asic0|Ethernet108|4": { "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc5|Asic0|Ethernet32|4": { - "scheduler" : "scheduler.1", + "dut-lc5|Asic0|Ethernet112|3": { "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc5|Asic0|Ethernet36|4": { - "scheduler" : "scheduler.1", + "dut-lc5|Asic0|Ethernet112|4": { "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc5|Asic0|Ethernet40|4": { - "scheduler" : "scheduler.1", + "dut-lc5|Asic0|Ethernet116|3": { "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc5|Asic0|Ethernet44|4": { - "scheduler" : "scheduler.1", + "dut-lc5|Asic0|Ethernet116|4": { "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc5|Asic0|Ethernet48|4": { - "scheduler" : "scheduler.1", + "dut-lc5|Asic0|Ethernet120|3": { "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc5|Asic0|Ethernet52|4": { - "scheduler" : "scheduler.1", + "dut-lc5|Asic0|Ethernet120|4": { "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc5|Asic0|Ethernet56|4": { - "scheduler" : "scheduler.1", + "dut-lc5|Asic0|Ethernet124|3": { "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc5|Asic0|Ethernet60|4": { - "scheduler" : "scheduler.1", + "dut-lc5|Asic0|Ethernet124|4": { "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc5|Asic0|Ethernet64|4": { - "scheduler" : "scheduler.1", + "dut-lc5|Asic0|Ethernet128|3": { "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc5|Asic0|Ethernet68|4": { - "scheduler" : "scheduler.1", + "dut-lc5|Asic0|Ethernet128|4": { "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc5|Asic0|Ethernet72|4": { - "scheduler" : "scheduler.1", + "dut-lc5|Asic0|Ethernet132|3": { "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc5|Asic0|Ethernet76|4": { - "scheduler" : "scheduler.1", + "dut-lc5|Asic0|Ethernet132|4": { "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc5|Asic0|Ethernet80|4": { - "scheduler" : "scheduler.1", + "dut-lc5|Asic0|Ethernet136|3": { "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc5|Asic0|Ethernet84|4": { - "scheduler" : "scheduler.1", + "dut-lc5|Asic0|Ethernet136|4": { "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc5|Asic0|Ethernet88|4": { - "scheduler" : "scheduler.1", + "dut-lc5|Asic0|Ethernet140|3": { "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc5|Asic0|Ethernet92|4": { - "scheduler" : "scheduler.1", + "dut-lc5|Asic0|Ethernet140|4": { "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc5|Asic0|Ethernet96|4": { - "scheduler" : "scheduler.1", + "dut-lc5|Asic0|Ethernet144|3": { "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc5|Asic0|Ethernet100|4": { - "scheduler" : "scheduler.1", + "dut-lc5|Asic0|Ethernet144|4": { "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc5|Asic0|Ethernet104|4": { - "scheduler" : "scheduler.1", + "dut-lc5|Asic0|Ethernet148|3": { "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc5|Asic0|Ethernet108|4": { - "scheduler" : "scheduler.1", + "dut-lc5|Asic0|Ethernet148|4": { "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc5|Asic0|Ethernet112|4": { - "scheduler" : "scheduler.1", + "dut-lc5|Asic0|Ethernet152|3": { "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc5|Asic0|Ethernet116|4": { - "scheduler" : "scheduler.1", + "dut-lc5|Asic0|Ethernet152|4": { "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc5|Asic0|Ethernet120|4": { - "scheduler" : "scheduler.1", + "dut-lc5|Asic0|Ethernet156|3": { "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc5|Asic0|Ethernet124|4": { - "scheduler" : "scheduler.1", + "dut-lc5|Asic0|Ethernet156|4": { "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc5|Asic0|Ethernet128|4": { - "scheduler" : "scheduler.1", + "dut-lc5|Asic0|Ethernet160|3": { "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc5|Asic0|Ethernet132|4": { - "scheduler" : "scheduler.1", + "dut-lc5|Asic0|Ethernet160|4": { "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc5|Asic0|Ethernet136|4": { - "scheduler" : "scheduler.1", + "dut-lc5|Asic0|Ethernet164|3": { "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc5|Asic0|Ethernet140|4": { - "scheduler" : "scheduler.1", + "dut-lc5|Asic0|Ethernet164|4": { "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc5|Asic0|Ethernet144|4": { - "scheduler" : "scheduler.1", + "dut-lc5|Asic0|Ethernet168|3": { "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc5|Asic0|Ethernet148|4": { - "scheduler" : "scheduler.1", + "dut-lc5|Asic0|Ethernet168|4": { "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc5|Asic0|Ethernet152|4": { - "scheduler" : "scheduler.1", + "dut-lc5|Asic0|Ethernet172|3": { "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc5|Asic0|Ethernet156|4": { - "scheduler" : "scheduler.1", + "dut-lc5|Asic0|Ethernet172|4": { "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc5|Asic0|Ethernet160|4": { - "scheduler" : "scheduler.1", + "dut-lc5|Asic0|Ethernet176|3": { "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc5|Asic0|Ethernet164|4": { - "scheduler" : "scheduler.1", + "dut-lc5|Asic0|Ethernet176|4": { "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc5|Asic0|Ethernet168|4": { - "scheduler" : "scheduler.1", + "dut-lc5|Asic0|Ethernet180|3": { "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc5|Asic0|Ethernet172|4": { - "scheduler" : "scheduler.1", + "dut-lc5|Asic0|Ethernet180|4": { "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc5|Asic0|Ethernet176|4": { - "scheduler" : "scheduler.1", + "dut-lc5|Asic0|Ethernet184|3": { "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc5|Asic0|Ethernet180|4": { - "scheduler" : "scheduler.1", + "dut-lc5|Asic0|Ethernet184|4": { "wred_profile": "AZURE_LOSSLESS" }, - "dut-lc5|Asic0|Ethernet184|4": { - "scheduler" : "scheduler.1", + "dut-lc5|Asic0|Ethernet188|3": { "wred_profile": "AZURE_LOSSLESS" }, "dut-lc5|Asic0|Ethernet188|4": { - "scheduler" : "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, "dut-lc3|Asic0|Ethernet0|0": { @@ -1768,18 +1570,9 @@ "dut-lc3|Asic0|Ethernet156|0": { "scheduler": "scheduler.0" }, - "dut-lc3|Asic0|Ethernet160|0": { - "scheduler": "scheduler.0" - }, "dut-lc3|Asic0|Ethernet164|0": { "scheduler": "scheduler.0" }, - "dut-lc3|Asic0|Ethernet168|0": { - "scheduler": "scheduler.0" - }, - "dut-lc3|Asic0|Ethernet172|0": { - "scheduler": "scheduler.0" - }, "dut-lc3|Asic0|Ethernet176|0": { "scheduler": "scheduler.0" }, @@ -1792,1878 +1585,545 @@ "dut-lc3|Asic0|Ethernet188|0": { "scheduler": "scheduler.0" }, - "dut-lc4|Asic0|Ethernet0|0": { - "scheduler": "scheduler.0" - }, - "dut-lc4|Asic0|Ethernet4|0": { - "scheduler": "scheduler.0" - }, - "dut-lc4|Asic0|Ethernet8|0": { - "scheduler": "scheduler.0" - }, - "dut-lc4|Asic0|Ethernet12|0": { - "scheduler": "scheduler.0" - }, - "dut-lc4|Asic0|Ethernet16|0": { - "scheduler": "scheduler.0" - }, - "dut-lc4|Asic0|Ethernet20|0": { - "scheduler": "scheduler.0" - }, - "dut-lc4|Asic0|Ethernet24|0": { - "scheduler": "scheduler.0" - }, - "dut-lc4|Asic0|Ethernet28|0": { - "scheduler": "scheduler.0" - }, - "dut-lc4|Asic0|Ethernet32|0": { - "scheduler": "scheduler.0" - }, - "dut-lc4|Asic0|Ethernet36|0": { - "scheduler": "scheduler.0" - }, - "dut-lc4|Asic0|Ethernet40|0": { - "scheduler": "scheduler.0" - }, - "dut-lc4|Asic0|Ethernet44|0": { - "scheduler": "scheduler.0" - }, - "dut-lc4|Asic0|Ethernet48|0": { - "scheduler": "scheduler.0" - }, - "dut-lc4|Asic0|Ethernet52|0": { - "scheduler": "scheduler.0" - }, - "dut-lc4|Asic0|Ethernet56|0": { - "scheduler": "scheduler.0" - }, - "dut-lc4|Asic0|Ethernet60|0": { - "scheduler": "scheduler.0" - }, - "dut-lc4|Asic0|Ethernet64|0": { - "scheduler": "scheduler.0" - }, - "dut-lc4|Asic0|Ethernet68|0": { - "scheduler": "scheduler.0" - }, - "dut-lc4|Asic0|Ethernet72|0": { - "scheduler": "scheduler.0" - }, - "dut-lc4|Asic0|Ethernet76|0": { - "scheduler": "scheduler.0" - }, - "dut-lc4|Asic0|Ethernet80|0": { - "scheduler": "scheduler.0" - }, - "dut-lc4|Asic0|Ethernet84|0": { - "scheduler": "scheduler.0" - }, - "dut-lc4|Asic0|Ethernet88|0": { - "scheduler": "scheduler.0" - }, - "dut-lc4|Asic0|Ethernet92|0": { - "scheduler": "scheduler.0" - }, - "dut-lc4|Asic0|Ethernet96|0": { - "scheduler": "scheduler.0" - }, - "dut-lc4|Asic0|Ethernet100|0": { - "scheduler": "scheduler.0" - }, - "dut-lc4|Asic0|Ethernet104|0": { - "scheduler": "scheduler.0" - }, - "dut-lc4|Asic0|Ethernet108|0": { - "scheduler": "scheduler.0" - }, - "dut-lc4|Asic0|Ethernet112|0": { - "scheduler": "scheduler.0" - }, - "dut-lc4|Asic0|Ethernet116|0": { - "scheduler": "scheduler.0" - }, - "dut-lc4|Asic0|Ethernet120|0": { - "scheduler": "scheduler.0" - }, - "dut-lc4|Asic0|Ethernet124|0": { - "scheduler": "scheduler.0" - }, - "dut-lc4|Asic0|Ethernet128|0": { - "scheduler": "scheduler.0" - }, - "dut-lc4|Asic0|Ethernet132|0": { - "scheduler": "scheduler.0" - }, - "dut-lc4|Asic0|Ethernet136|0": { - "scheduler": "scheduler.0" - }, - "dut-lc4|Asic0|Ethernet140|0": { + "dut-lc3|Asic0|Ethernet0|1": { "scheduler": "scheduler.0" }, - "dut-lc4|Asic0|Ethernet144|0": { + "dut-lc3|Asic0|Ethernet4|1": { "scheduler": "scheduler.0" }, - "dut-lc4|Asic0|Ethernet148|0": { + "dut-lc3|Asic0|Ethernet8|1": { "scheduler": "scheduler.0" }, - "dut-lc4|Asic0|Ethernet152|0": { + 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"dut-lc4|Asic0|Ethernet56|6": { - "scheduler": "scheduler.0" - }, "dut-lc4|Asic0|Ethernet60|6": { - "scheduler": "scheduler.0" - }, "dut-lc4|Asic0|Ethernet64|6": { - "scheduler": "scheduler.0" - }, "dut-lc4|Asic0|Ethernet68|6": { - "scheduler": "scheduler.0" - }, "dut-lc4|Asic0|Ethernet72|6": { - "scheduler": "scheduler.0" - }, "dut-lc4|Asic0|Ethernet76|6": { - "scheduler": "scheduler.0" - }, "dut-lc4|Asic0|Ethernet80|6": { - "scheduler": "scheduler.0" - }, "dut-lc4|Asic0|Ethernet84|6": { - "scheduler": "scheduler.0" - }, "dut-lc4|Asic0|Ethernet88|6": { - "scheduler": "scheduler.0" - }, "dut-lc4|Asic0|Ethernet92|6": { - "scheduler": "scheduler.0" - }, "dut-lc4|Asic0|Ethernet96|6": { - "scheduler": "scheduler.0" - }, "dut-lc4|Asic0|Ethernet100|6": { - "scheduler": "scheduler.0" - }, "dut-lc4|Asic0|Ethernet104|6": { - "scheduler": "scheduler.0" - }, "dut-lc4|Asic0|Ethernet108|6": { - "scheduler": "scheduler.0" - }, "dut-lc4|Asic0|Ethernet112|6": { - "scheduler": "scheduler.0" - }, "dut-lc4|Asic0|Ethernet116|6": { - "scheduler": "scheduler.0" - }, "dut-lc4|Asic0|Ethernet120|6": { - "scheduler": "scheduler.0" - }, "dut-lc4|Asic0|Ethernet124|6": { - "scheduler": "scheduler.0" - }, "dut-lc4|Asic0|Ethernet128|6": { - "scheduler": "scheduler.0" - }, "dut-lc4|Asic0|Ethernet132|6": { - "scheduler": "scheduler.0" - }, "dut-lc4|Asic0|Ethernet136|6": { - "scheduler": "scheduler.0" - }, "dut-lc4|Asic0|Ethernet140|6": { - "scheduler": "scheduler.0" - }, "dut-lc4|Asic0|Ethernet144|6": { - "scheduler": "scheduler.0" - }, "dut-lc4|Asic0|Ethernet148|6": { - "scheduler": "scheduler.0" - }, "dut-lc4|Asic0|Ethernet152|6": { - "scheduler": "scheduler.0" - }, "dut-lc4|Asic0|Ethernet156|6": { - "scheduler": "scheduler.0" - }, "dut-lc4|Asic0|Ethernet160|6": { - "scheduler": "scheduler.0" - }, "dut-lc4|Asic0|Ethernet164|6": { - "scheduler": "scheduler.0" - }, "dut-lc4|Asic0|Ethernet168|6": { - "scheduler": "scheduler.0" - }, "dut-lc4|Asic0|Ethernet172|6": { - "scheduler": "scheduler.0" - }, "dut-lc4|Asic0|Ethernet176|6": { - "scheduler": "scheduler.0" - }, "dut-lc4|Asic0|Ethernet180|6": { - "scheduler": "scheduler.0" - }, "dut-lc4|Asic0|Ethernet184|6": { - "scheduler": "scheduler.0" - }, "dut-lc4|Asic0|Ethernet188|6": { - "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet0|6": { - "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet4|6": { - "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet8|6": { - "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet12|6": { - "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet16|6": { + }, + "dut-lc3|Asic0|Ethernet4|6": { "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet20|6": { + }, + "dut-lc3|Asic0|Ethernet8|6": { "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet24|6": { + }, + "dut-lc3|Asic0|Ethernet12|6": { "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet28|6": { + }, + "dut-lc3|Asic0|Ethernet16|6": { "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet32|6": { + }, + "dut-lc3|Asic0|Ethernet20|6": { "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet36|6": { + }, + "dut-lc3|Asic0|Ethernet24|6": { "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet40|6": { + }, + "dut-lc3|Asic0|Ethernet28|6": { "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet44|6": { + }, + "dut-lc3|Asic0|Ethernet32|6": { "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet48|6": { + }, + "dut-lc3|Asic0|Ethernet36|6": { "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet52|6": { + }, + "dut-lc3|Asic0|Ethernet40|6": { "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet56|6": { + }, + "dut-lc3|Asic0|Ethernet44|6": { "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet60|6": { + }, + "dut-lc3|Asic0|Ethernet48|6": { "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet64|6": { + }, + "dut-lc3|Asic0|Ethernet52|6": { "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet68|6": { + }, + "dut-lc3|Asic0|Ethernet56|6": { "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet72|6": { + }, + "dut-lc3|Asic0|Ethernet60|6": { "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet76|6": { + }, + "dut-lc3|Asic0|Ethernet64|6": { "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet80|6": { + }, + "dut-lc3|Asic0|Ethernet68|6": { "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet84|6": { + }, + "dut-lc3|Asic0|Ethernet72|6": { "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet88|6": { + }, + "dut-lc3|Asic0|Ethernet76|6": { "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet92|6": { + }, + "dut-lc3|Asic0|Ethernet80|6": { "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet96|6": { + }, + "dut-lc3|Asic0|Ethernet84|6": { "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet100|6": { + }, + "dut-lc3|Asic0|Ethernet88|6": { "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet104|6": { + }, + "dut-lc3|Asic0|Ethernet92|6": { "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet108|6": { + }, + "dut-lc3|Asic0|Ethernet96|6": { "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet112|6": { + }, + "dut-lc3|Asic0|Ethernet100|6": { "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet116|6": { + }, + "dut-lc3|Asic0|Ethernet104|6": { "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet120|6": { + }, + "dut-lc3|Asic0|Ethernet108|6": { "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet124|6": { + }, + "dut-lc3|Asic0|Ethernet112|6": { "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet128|6": { + }, + "dut-lc3|Asic0|Ethernet116|6": { "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet132|6": { + }, + "dut-lc3|Asic0|Ethernet120|6": { "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet136|6": { + }, + "dut-lc3|Asic0|Ethernet124|6": { "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet140|6": { + }, + "dut-lc3|Asic0|Ethernet128|6": { "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet144|6": { + }, + "dut-lc3|Asic0|Ethernet132|6": { "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet148|6": { + }, + "dut-lc3|Asic0|Ethernet136|6": { "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet152|6": { + }, + "dut-lc3|Asic0|Ethernet140|6": { "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet156|6": { + }, + "dut-lc3|Asic0|Ethernet144|6": { "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet160|6": { + }, + "dut-lc3|Asic0|Ethernet148|6": { "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet164|6": { + }, + "dut-lc3|Asic0|Ethernet152|6": { "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet168|6": { + }, + "dut-lc3|Asic0|Ethernet156|6": { "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet172|6": { + }, + "dut-lc3|Asic0|Ethernet164|6": { "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet176|6": { + }, + "dut-lc3|Asic0|Ethernet176|6": { "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet180|6": { + }, + "dut-lc3|Asic0|Ethernet180|6": { "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet184|6": { + }, + "dut-lc3|Asic0|Ethernet184|6": { "scheduler": "scheduler.0" - }, "dut-lc5|Asic0|Ethernet188|6": { + }, + "dut-lc3|Asic0|Ethernet188|6": { "scheduler": "scheduler.0" - } + } } } diff --git a/src/sonic-config-engine/tests/sample_output/py3/qos-arista7800r3a-36dm2-c36-lc.json b/src/sonic-config-engine/tests/sample_output/py3/qos-arista7800r3a-36dm2-c36-lc.json index 1007b272c46..f5e9b9d4c4f 100644 --- a/src/sonic-config-engine/tests/sample_output/py3/qos-arista7800r3a-36dm2-c36-lc.json +++ b/src/sonic-config-engine/tests/sample_output/py3/qos-arista7800r3a-36dm2-c36-lc.json @@ -120,146 +120,146 @@ "Ethernet0": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet8": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet16": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet24": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet32": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet40": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet48": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet56": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet64": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet72": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet80": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet88": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet96": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet104": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet112": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet120": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet128": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet136": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" } }, "WRED_PROFILE": { @@ -280,3040 +280,1102 @@ } }, "QUEUE": { - "str2-7804-lc3-1|Asic0|Ethernet0|0": { - "scheduler": "scheduler.0" - }, - "str2-7804-lc3-1|Asic0|Ethernet0|1": { - "scheduler": "scheduler.0" - }, - "str2-7804-lc3-1|Asic0|Ethernet0|2": { - "scheduler": "scheduler.0" - }, "str2-7804-lc3-1|Asic0|Ethernet0|3": { - "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, "str2-7804-lc3-1|Asic0|Ethernet0|4": { - "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "str2-7804-lc3-1|Asic0|Ethernet0|5": { - "scheduler": "scheduler.0" - }, - "str2-7804-lc3-1|Asic0|Ethernet0|6": { - "scheduler": "scheduler.0" - }, - "str2-7804-lc3-1|Asic0|Ethernet4|0": { - "scheduler": "scheduler.0" - }, - "str2-7804-lc3-1|Asic0|Ethernet4|1": { - "scheduler": "scheduler.0" - }, - "str2-7804-lc3-1|Asic0|Ethernet4|2": { - "scheduler": "scheduler.0" - }, "str2-7804-lc3-1|Asic0|Ethernet4|3": { - "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, "str2-7804-lc3-1|Asic0|Ethernet4|4": { - "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "str2-7804-lc3-1|Asic0|Ethernet4|5": { - "scheduler": "scheduler.0" - }, - "str2-7804-lc3-1|Asic0|Ethernet4|6": { - "scheduler": "scheduler.0" - }, - "str2-7804-lc3-1|Asic0|Ethernet8|0": { - "scheduler": "scheduler.0" - }, - "str2-7804-lc3-1|Asic0|Ethernet8|1": { - "scheduler": "scheduler.0" - }, - "str2-7804-lc3-1|Asic0|Ethernet8|2": { - "scheduler": "scheduler.0" - }, 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{ "scheduler": "scheduler.0" }, - "str2-7804-lc7-1|Asic0|Ethernet148|3": { - "scheduler": "scheduler.1", - "wred_profile": "AZURE_LOSSLESS" - }, - "str2-7804-lc7-1|Asic0|Ethernet148|4": { - "scheduler": "scheduler.1", - "wred_profile": "AZURE_LOSSLESS" - }, - "str2-7804-lc7-1|Asic0|Ethernet148|5": { + "str2-7804-lc5-1|asic0|Ethernet136|1": { "scheduler": "scheduler.0" }, - "str2-7804-lc7-1|Asic0|Ethernet148|6": { + "str2-7804-lc5-1|asic0|Ethernet0|2": { "scheduler": "scheduler.0" }, - "str2-7804-lc7-1|Asic0|Ethernet152|0": { + "str2-7804-lc5-1|asic0|Ethernet8|2": { "scheduler": "scheduler.0" }, - "str2-7804-lc7-1|Asic0|Ethernet152|1": { + "str2-7804-lc5-1|asic0|Ethernet16|2": { "scheduler": "scheduler.0" }, - "str2-7804-lc7-1|Asic0|Ethernet152|2": { + "str2-7804-lc5-1|asic0|Ethernet24|2": { "scheduler": "scheduler.0" }, - "str2-7804-lc7-1|Asic0|Ethernet152|3": { - "scheduler": "scheduler.1", - "wred_profile": "AZURE_LOSSLESS" - }, - "str2-7804-lc7-1|Asic0|Ethernet152|4": { - "scheduler": "scheduler.1", - "wred_profile": "AZURE_LOSSLESS" - }, - "str2-7804-lc7-1|Asic0|Ethernet152|5": { + "str2-7804-lc5-1|asic0|Ethernet32|2": { "scheduler": "scheduler.0" }, - "str2-7804-lc7-1|Asic0|Ethernet152|6": { + "str2-7804-lc5-1|asic0|Ethernet40|2": { "scheduler": "scheduler.0" }, - "str2-7804-lc7-1|Asic0|Ethernet156|0": { + "str2-7804-lc5-1|asic0|Ethernet48|2": { "scheduler": "scheduler.0" }, - "str2-7804-lc7-1|Asic0|Ethernet156|1": { + "str2-7804-lc5-1|asic0|Ethernet56|2": { "scheduler": "scheduler.0" }, - "str2-7804-lc7-1|Asic0|Ethernet156|2": { + "str2-7804-lc5-1|asic0|Ethernet64|2": { "scheduler": "scheduler.0" }, - "str2-7804-lc7-1|Asic0|Ethernet156|3": { - "scheduler": "scheduler.1", - "wred_profile": "AZURE_LOSSLESS" - }, - "str2-7804-lc7-1|Asic0|Ethernet156|4": { - "scheduler": "scheduler.1", - "wred_profile": "AZURE_LOSSLESS" - }, - "str2-7804-lc7-1|Asic0|Ethernet156|5": { + "str2-7804-lc5-1|asic0|Ethernet72|2": { "scheduler": "scheduler.0" }, - "str2-7804-lc7-1|Asic0|Ethernet156|6": { + "str2-7804-lc5-1|asic0|Ethernet80|2": { "scheduler": "scheduler.0" }, - "str2-7804-lc7-1|Asic0|Ethernet160|0": { + "str2-7804-lc5-1|asic0|Ethernet88|2": { "scheduler": "scheduler.0" }, - "str2-7804-lc7-1|Asic0|Ethernet160|1": { + "str2-7804-lc5-1|asic0|Ethernet96|2": { "scheduler": "scheduler.0" }, - "str2-7804-lc7-1|Asic0|Ethernet160|2": { + "str2-7804-lc5-1|asic0|Ethernet104|2": { "scheduler": "scheduler.0" }, - "str2-7804-lc7-1|Asic0|Ethernet160|3": { - "scheduler": "scheduler.1", - "wred_profile": "AZURE_LOSSLESS" - }, - "str2-7804-lc7-1|Asic0|Ethernet160|4": { - "scheduler": "scheduler.1", - "wred_profile": "AZURE_LOSSLESS" - }, - "str2-7804-lc7-1|Asic0|Ethernet160|5": { + "str2-7804-lc5-1|asic0|Ethernet112|2": { "scheduler": "scheduler.0" }, - "str2-7804-lc7-1|Asic0|Ethernet160|6": { + "str2-7804-lc5-1|asic0|Ethernet120|2": { "scheduler": "scheduler.0" }, - "str2-7804-lc7-1|Asic0|Ethernet164|0": { + "str2-7804-lc5-1|asic0|Ethernet128|2": { "scheduler": "scheduler.0" }, - "str2-7804-lc7-1|Asic0|Ethernet164|1": { + "str2-7804-lc5-1|asic0|Ethernet136|2": { "scheduler": "scheduler.0" }, - "str2-7804-lc7-1|Asic0|Ethernet164|2": { + "str2-7804-lc5-1|asic0|Ethernet0|5": { "scheduler": "scheduler.0" }, - "str2-7804-lc7-1|Asic0|Ethernet164|3": { - "scheduler": "scheduler.1", - "wred_profile": "AZURE_LOSSLESS" - }, - "str2-7804-lc7-1|Asic0|Ethernet164|4": { - "scheduler": "scheduler.1", - "wred_profile": "AZURE_LOSSLESS" - }, - "str2-7804-lc7-1|Asic0|Ethernet164|5": { + "str2-7804-lc5-1|asic0|Ethernet8|5": { "scheduler": "scheduler.0" }, - "str2-7804-lc7-1|Asic0|Ethernet164|6": { + "str2-7804-lc5-1|asic0|Ethernet16|5": { "scheduler": "scheduler.0" }, - "str2-7804-lc7-1|Asic0|Ethernet168|0": { + "str2-7804-lc5-1|asic0|Ethernet24|5": { "scheduler": "scheduler.0" }, - "str2-7804-lc7-1|Asic0|Ethernet168|1": { + "str2-7804-lc5-1|asic0|Ethernet32|5": { "scheduler": "scheduler.0" }, - "str2-7804-lc7-1|Asic0|Ethernet168|2": { + "str2-7804-lc5-1|asic0|Ethernet40|5": { "scheduler": "scheduler.0" }, - "str2-7804-lc7-1|Asic0|Ethernet168|3": { - "scheduler": "scheduler.1", - "wred_profile": "AZURE_LOSSLESS" - }, - "str2-7804-lc7-1|Asic0|Ethernet168|4": { - "scheduler": "scheduler.1", - "wred_profile": "AZURE_LOSSLESS" - }, - "str2-7804-lc7-1|Asic0|Ethernet168|5": { + "str2-7804-lc5-1|asic0|Ethernet48|5": { "scheduler": "scheduler.0" }, - "str2-7804-lc7-1|Asic0|Ethernet168|6": { + "str2-7804-lc5-1|asic0|Ethernet56|5": { "scheduler": "scheduler.0" }, - "str2-7804-lc7-1|Asic0|Ethernet172|0": { + "str2-7804-lc5-1|asic0|Ethernet64|5": { "scheduler": "scheduler.0" }, - "str2-7804-lc7-1|Asic0|Ethernet172|1": { + "str2-7804-lc5-1|asic0|Ethernet72|5": { "scheduler": "scheduler.0" }, - "str2-7804-lc7-1|Asic0|Ethernet172|2": { + "str2-7804-lc5-1|asic0|Ethernet80|5": { "scheduler": "scheduler.0" }, - "str2-7804-lc7-1|Asic0|Ethernet172|3": { - "scheduler": "scheduler.1", - "wred_profile": "AZURE_LOSSLESS" - }, - "str2-7804-lc7-1|Asic0|Ethernet172|4": { - "scheduler": "scheduler.1", - "wred_profile": "AZURE_LOSSLESS" - }, - "str2-7804-lc7-1|Asic0|Ethernet172|5": { + "str2-7804-lc5-1|asic0|Ethernet88|5": { "scheduler": "scheduler.0" }, - "str2-7804-lc7-1|Asic0|Ethernet172|6": { + "str2-7804-lc5-1|asic0|Ethernet96|5": { "scheduler": "scheduler.0" }, - "str2-7804-lc7-1|Asic0|Ethernet176|0": { + "str2-7804-lc5-1|asic0|Ethernet104|5": { "scheduler": "scheduler.0" }, - "str2-7804-lc7-1|Asic0|Ethernet176|1": { + "str2-7804-lc5-1|asic0|Ethernet112|5": { "scheduler": "scheduler.0" }, - "str2-7804-lc7-1|Asic0|Ethernet176|2": { + "str2-7804-lc5-1|asic0|Ethernet120|5": { "scheduler": "scheduler.0" }, - "str2-7804-lc7-1|Asic0|Ethernet176|3": { - "scheduler": "scheduler.1", - "wred_profile": "AZURE_LOSSLESS" - }, - "str2-7804-lc7-1|Asic0|Ethernet176|4": { - "scheduler": "scheduler.1", - "wred_profile": "AZURE_LOSSLESS" - }, - "str2-7804-lc7-1|Asic0|Ethernet176|5": { + "str2-7804-lc5-1|asic0|Ethernet128|5": { "scheduler": "scheduler.0" }, - "str2-7804-lc7-1|Asic0|Ethernet176|6": { + "str2-7804-lc5-1|asic0|Ethernet136|5": { "scheduler": "scheduler.0" }, - "str2-7804-lc7-1|Asic0|Ethernet180|0": { + "str2-7804-lc5-1|asic0|Ethernet0|6": { "scheduler": "scheduler.0" }, - "str2-7804-lc7-1|Asic0|Ethernet180|1": { + "str2-7804-lc5-1|asic0|Ethernet8|6": { "scheduler": "scheduler.0" }, - "str2-7804-lc7-1|Asic0|Ethernet180|2": { + "str2-7804-lc5-1|asic0|Ethernet16|6": { "scheduler": "scheduler.0" }, - "str2-7804-lc7-1|Asic0|Ethernet180|3": { - "scheduler": "scheduler.1", - "wred_profile": "AZURE_LOSSLESS" - }, - "str2-7804-lc7-1|Asic0|Ethernet180|4": { - "scheduler": "scheduler.1", - "wred_profile": "AZURE_LOSSLESS" - }, - "str2-7804-lc7-1|Asic0|Ethernet180|5": { + "str2-7804-lc5-1|asic0|Ethernet24|6": { "scheduler": "scheduler.0" }, - "str2-7804-lc7-1|Asic0|Ethernet180|6": { + "str2-7804-lc5-1|asic0|Ethernet32|6": { "scheduler": "scheduler.0" }, - "str2-7804-lc7-1|Asic0|Ethernet184|0": { + "str2-7804-lc5-1|asic0|Ethernet40|6": { "scheduler": "scheduler.0" }, - "str2-7804-lc7-1|Asic0|Ethernet184|1": { + "str2-7804-lc5-1|asic0|Ethernet48|6": { "scheduler": "scheduler.0" }, - "str2-7804-lc7-1|Asic0|Ethernet184|2": { + "str2-7804-lc5-1|asic0|Ethernet56|6": { "scheduler": "scheduler.0" }, - "str2-7804-lc7-1|Asic0|Ethernet184|3": { - "scheduler": "scheduler.1", - "wred_profile": "AZURE_LOSSLESS" - }, - "str2-7804-lc7-1|Asic0|Ethernet184|4": { - "scheduler": "scheduler.1", - "wred_profile": "AZURE_LOSSLESS" + "str2-7804-lc5-1|asic0|Ethernet64|6": { + "scheduler": "scheduler.0" }, - "str2-7804-lc7-1|Asic0|Ethernet184|5": { + "str2-7804-lc5-1|asic0|Ethernet72|6": { "scheduler": "scheduler.0" }, - "str2-7804-lc7-1|Asic0|Ethernet184|6": { + "str2-7804-lc5-1|asic0|Ethernet80|6": { "scheduler": "scheduler.0" }, - "str2-7804-lc7-1|Asic0|Ethernet188|0": { + "str2-7804-lc5-1|asic0|Ethernet88|6": { "scheduler": "scheduler.0" }, - "str2-7804-lc7-1|Asic0|Ethernet188|1": { + "str2-7804-lc5-1|asic0|Ethernet96|6": { "scheduler": "scheduler.0" }, - "str2-7804-lc7-1|Asic0|Ethernet188|2": { + "str2-7804-lc5-1|asic0|Ethernet104|6": { "scheduler": "scheduler.0" }, - "str2-7804-lc7-1|Asic0|Ethernet188|3": { - "scheduler": "scheduler.1", - "wred_profile": "AZURE_LOSSLESS" + "str2-7804-lc5-1|asic0|Ethernet112|6": { + "scheduler": "scheduler.0" }, - "str2-7804-lc7-1|Asic0|Ethernet188|4": { - "scheduler": "scheduler.1", - "wred_profile": "AZURE_LOSSLESS" + "str2-7804-lc5-1|asic0|Ethernet120|6": { + "scheduler": "scheduler.0" }, - "str2-7804-lc7-1|Asic0|Ethernet188|5": { + "str2-7804-lc5-1|asic0|Ethernet128|6": { "scheduler": "scheduler.0" }, - "str2-7804-lc7-1|Asic0|Ethernet188|6": { + "str2-7804-lc5-1|asic0|Ethernet136|6": { "scheduler": "scheduler.0" } } diff --git a/src/sonic-config-engine/tests/sample_output/py3/qos-arista7800r3a-36dm2-d36-lc.json b/src/sonic-config-engine/tests/sample_output/py3/qos-arista7800r3a-36dm2-d36-lc.json index 027753a09f2..d4140204c96 100644 --- a/src/sonic-config-engine/tests/sample_output/py3/qos-arista7800r3a-36dm2-d36-lc.json +++ b/src/sonic-config-engine/tests/sample_output/py3/qos-arista7800r3a-36dm2-d36-lc.json @@ -120,146 +120,146 @@ "Ethernet0": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet8": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet16": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet24": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet32": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet40": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet48": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet56": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet64": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet72": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet80": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet88": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet96": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet104": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet112": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet120": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet128": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet136": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" } }, "WRED_PROFILE": { @@ -281,1059 +281,831 @@ }, "QUEUE": { "str3-7800-lc8-1|asic0|Ethernet0|3": { - "scheduler" : "scheduler.1", + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "str3-7800-lc8-1|asic0|Ethernet8|3": { - "scheduler" : "scheduler.1", + "str3-7800-lc8-1|asic0|Ethernet0|4": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "str3-7800-lc8-1|asic0|Ethernet16|3": { - "scheduler" : "scheduler.1", + "str3-7800-lc8-1|asic0|Ethernet8|3": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "str3-7800-lc8-1|asic0|Ethernet24|3": { - "scheduler" : "scheduler.1", + "str3-7800-lc8-1|asic0|Ethernet8|4": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "str3-7800-lc8-1|asic0|Ethernet32|3": { - "scheduler" : "scheduler.1", + "str3-7800-lc8-1|asic0|Ethernet16|3": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "str3-7800-lc8-1|asic0|Ethernet40|3": { - "scheduler" : "scheduler.1", + "str3-7800-lc8-1|asic0|Ethernet16|4": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "str3-7800-lc8-1|asic0|Ethernet48|3": { - "scheduler" : "scheduler.1", + "str3-7800-lc8-1|asic0|Ethernet24|3": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "str3-7800-lc8-1|asic0|Ethernet56|3": { - "scheduler" : "scheduler.1", + "str3-7800-lc8-1|asic0|Ethernet24|4": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "str3-7800-lc8-1|asic0|Ethernet64|3": { - "scheduler" : "scheduler.1", + "str3-7800-lc8-1|asic0|Ethernet32|3": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "str3-7800-lc8-1|asic0|Ethernet72|3": { - "scheduler" : "scheduler.1", + "str3-7800-lc8-1|asic0|Ethernet32|4": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "str3-7800-lc8-1|asic0|Ethernet80|3": { - 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"scheduler.0" - }, "str3-7800-lc8-1|asic1|Ethernet224|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc8-1|asic1|Ethernet232|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc8-1|asic1|Ethernet240|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc8-1|asic1|Ethernet248|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc8-1|asic1|Ethernet256|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc8-1|asic1|Ethernet264|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc8-1|asic1|Ethernet272|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc8-1|asic1|Ethernet280|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc1-1|Asic0|Ethernet0|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc1-1|Asic0|Ethernet4|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc1-1|Asic0|Ethernet8|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc1-1|Asic0|Ethernet12|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc1-1|Asic0|Ethernet16|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc1-1|Asic0|Ethernet20|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc1-1|Asic0|Ethernet24|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc1-1|Asic0|Ethernet28|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc1-1|Asic0|Ethernet32|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc1-1|Asic0|Ethernet36|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc1-1|Asic0|Ethernet40|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc1-1|Asic0|Ethernet44|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc1-1|Asic0|Ethernet48|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc1-1|Asic0|Ethernet52|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc1-1|Asic0|Ethernet56|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc1-1|Asic0|Ethernet60|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc1-1|Asic0|Ethernet64|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc1-1|Asic0|Ethernet68|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc1-1|Asic0|Ethernet72|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc1-1|Asic0|Ethernet76|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc1-1|Asic0|Ethernet80|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc1-1|Asic0|Ethernet84|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc1-1|Asic0|Ethernet88|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc1-1|Asic0|Ethernet92|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc1-1|Asic0|Ethernet96|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc1-1|Asic0|Ethernet100|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc1-1|Asic0|Ethernet104|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc1-1|Asic0|Ethernet108|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc1-1|Asic0|Ethernet112|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc1-1|Asic0|Ethernet116|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc1-1|Asic0|Ethernet120|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc1-1|Asic0|Ethernet124|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc1-1|Asic0|Ethernet128|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc1-1|Asic0|Ethernet132|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc1-1|Asic0|Ethernet136|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc1-1|Asic0|Ethernet140|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc1-1|Asic0|Ethernet144|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc1-1|Asic0|Ethernet148|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc1-1|Asic0|Ethernet152|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc1-1|Asic0|Ethernet156|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc1-1|Asic0|Ethernet160|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc1-1|Asic0|Ethernet164|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc1-1|Asic0|Ethernet168|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc1-1|Asic0|Ethernet172|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc1-1|Asic0|Ethernet176|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc1-1|Asic0|Ethernet180|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc1-1|Asic0|Ethernet184|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc1-1|Asic0|Ethernet188|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc2-1|Asic0|Ethernet0|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc2-1|Asic0|Ethernet4|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc2-1|Asic0|Ethernet8|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc2-1|Asic0|Ethernet12|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc2-1|Asic0|Ethernet16|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc2-1|Asic0|Ethernet20|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc2-1|Asic0|Ethernet24|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc2-1|Asic0|Ethernet28|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc2-1|Asic0|Ethernet32|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc2-1|Asic0|Ethernet36|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc2-1|Asic0|Ethernet40|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc2-1|Asic0|Ethernet44|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc2-1|Asic0|Ethernet48|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc2-1|Asic0|Ethernet52|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc2-1|Asic0|Ethernet56|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc2-1|Asic0|Ethernet60|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc2-1|Asic0|Ethernet64|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc2-1|Asic0|Ethernet68|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc2-1|Asic0|Ethernet72|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc2-1|Asic0|Ethernet76|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc2-1|Asic0|Ethernet80|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc2-1|Asic0|Ethernet84|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc2-1|Asic0|Ethernet88|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc2-1|Asic0|Ethernet92|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc2-1|Asic0|Ethernet96|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc2-1|Asic0|Ethernet100|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc2-1|Asic0|Ethernet104|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc2-1|Asic0|Ethernet108|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc2-1|Asic0|Ethernet112|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc2-1|Asic0|Ethernet116|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc2-1|Asic0|Ethernet120|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc2-1|Asic0|Ethernet124|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc2-1|Asic0|Ethernet128|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc2-1|Asic0|Ethernet132|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc2-1|Asic0|Ethernet136|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc2-1|Asic0|Ethernet140|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc2-1|Asic0|Ethernet144|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc2-1|Asic0|Ethernet148|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc2-1|Asic0|Ethernet152|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc2-1|Asic0|Ethernet156|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc2-1|Asic0|Ethernet160|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc2-1|Asic0|Ethernet164|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc2-1|Asic0|Ethernet168|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc2-1|Asic0|Ethernet172|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc2-1|Asic0|Ethernet176|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc2-1|Asic0|Ethernet180|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc2-1|Asic0|Ethernet184|6": { - "scheduler": "scheduler.0" - }, "str3-7800-lc2-1|Asic0|Ethernet188|6": { - "scheduler": "scheduler.0" - } + } } } diff --git a/src/sonic-config-engine/tests/sample_output/py3/qos-no-config.json b/src/sonic-config-engine/tests/sample_output/py3/qos-no-config.json new file mode 100644 index 00000000000..c5e40fac937 --- /dev/null +++ b/src/sonic-config-engine/tests/sample_output/py3/qos-no-config.json @@ -0,0 +1,860 @@ +{ + "TC_TO_PRIORITY_GROUP_MAP": { + "AZURE": { + "0": "0", + "1": "0", + "2": "0", + "3": "3", + "4": "4", + "5": "0", + "6": "0", + "7": "7" + } + }, + "MAP_PFC_PRIORITY_TO_QUEUE": { + "AZURE": { + "0": "0", + "1": "1", + "2": "2", + "3": "3", + "4": "4", + "5": "5", + "6": "6", + "7": "7" + } + }, + "TC_TO_QUEUE_MAP": { + "AZURE": { + "0": "0", + "1": "1", + "2": "2", + "3": "3", + "4": "4", + "5": "5", + "6": "6", + "7": "7" + } + }, + "DSCP_TO_TC_MAP": { + "AZURE": { + "0" : "1", + "1" : "1", + "2" : "1", + "3" : "3", + "4" : "4", + "5" : "2", + "6" : "1", + "7" : "1", + "8" : "0", + "9" : "1", + "10": "1", + "11": "1", + "12": "1", + "13": "1", + "14": "1", + "15": "1", + "16": "1", + "17": "1", + "18": "1", + "19": "1", + "20": "1", + "21": "1", + "22": "1", + "23": "1", + "24": "1", + "25": "1", + "26": "1", + "27": "1", + "28": "1", + "29": "1", + "30": "1", + "31": "1", + "32": "1", + "33": "1", + "34": "1", + "35": "1", + "36": "1", + "37": "1", + "38": "1", + "39": "1", + "40": "1", + "41": "1", + "42": "1", + "43": "1", + "44": "1", + "45": "1", + "46": "5", + "47": "1", + "48": "6", + "49": "1", + "50": "1", + "51": "1", + "52": "1", + "53": "1", + "54": "1", + "55": "1", + "56": "1", + "57": "1", + "58": "1", + "59": "1", + "60": "1", + "61": "1", + "62": "1", + "63": "1" + } + }, + "SCHEDULER": { + "scheduler.0": { + "type" : "DWRR", + "weight": "14" + }, + "scheduler.1": { + "type" : "DWRR", + "weight": "15" + } + }, + "PORT_QOS_MAP": { + "global": { + "dscp_to_tc_map" : "AZURE" + } + }, + "WRED_PROFILE": { + "AZURE_LOSSLESS" : { + "wred_green_enable" : "true", + "wred_yellow_enable" : "true", + "wred_red_enable" : "true", + "ecn" : "ecn_all", + "green_max_threshold" : "10000000", + "green_min_threshold" : "2000000", + "yellow_max_threshold" : "10000000", + "yellow_min_threshold" : "2000000", + "red_max_threshold" : "10000000", + "red_min_threshold" : "2000000", + "green_drop_probability" : "5", + "yellow_drop_probability": "5", + "red_drop_probability" : "5" + } + }, + "QUEUE": { + "sonic3|asic0|Ethernet0|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "sonic3|asic0|Ethernet0|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "sonic3|asic0|Ethernet8|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "sonic3|asic0|Ethernet8|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "sonic3|asic0|Ethernet16|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "sonic3|asic0|Ethernet16|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "sonic3|asic0|Ethernet24|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "sonic3|asic0|Ethernet24|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "sonic3|asic0|Ethernet32|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "sonic3|asic0|Ethernet32|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "sonic3|asic0|Ethernet40|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "sonic3|asic0|Ethernet40|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "sonic3|asic0|Ethernet48|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "sonic3|asic0|Ethernet48|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "sonic3|asic0|Ethernet56|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "sonic3|asic0|Ethernet56|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "sonic3|asic0|Ethernet64|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "sonic3|asic0|Ethernet64|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "sonic3|asic0|Ethernet72|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "sonic3|asic0|Ethernet72|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "sonic3|asic0|Ethernet80|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "sonic3|asic0|Ethernet80|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "sonic3|asic0|Ethernet88|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "sonic3|asic0|Ethernet88|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "sonic3|asic0|Ethernet96|3": { + "wred_profile": "AZURE_LOSSLESS" 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}, + "sonic2|asic0|Ethernet48|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "sonic2|asic0|Ethernet56|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "sonic2|asic0|Ethernet56|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "sonic2|asic0|Ethernet64|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "sonic2|asic0|Ethernet64|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "sonic2|asic0|Ethernet72|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "sonic2|asic0|Ethernet72|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "sonic2|asic0|Ethernet80|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "sonic2|asic0|Ethernet80|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "sonic2|asic0|Ethernet88|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "sonic2|asic0|Ethernet88|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "sonic2|asic0|Ethernet96|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "sonic2|asic0|Ethernet96|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "sonic2|asic0|Ethernet104|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "sonic2|asic0|Ethernet104|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "sonic2|asic0|Ethernet112|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "sonic2|asic0|Ethernet112|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "sonic2|asic0|Ethernet120|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "sonic2|asic0|Ethernet120|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "sonic2|asic0|Ethernet128|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "sonic2|asic0|Ethernet128|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "sonic2|asic0|Ethernet136|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "sonic2|asic0|Ethernet136|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "sonic2|asic1|Ethernet144|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "sonic2|asic1|Ethernet144|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "sonic2|asic1|Ethernet152|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "sonic2|asic1|Ethernet152|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "sonic2|asic1|Ethernet160|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "sonic2|asic1|Ethernet160|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "sonic2|asic1|Ethernet168|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "sonic2|asic1|Ethernet168|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "sonic2|asic1|Ethernet176|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "sonic2|asic1|Ethernet176|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "sonic2|asic1|Ethernet184|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "sonic2|asic1|Ethernet184|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "sonic2|asic1|Ethernet192|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "sonic2|asic1|Ethernet192|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "sonic2|asic1|Ethernet200|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "sonic2|asic1|Ethernet200|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "sonic2|asic1|Ethernet208|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "sonic2|asic1|Ethernet208|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "sonic2|asic1|Ethernet216|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "sonic2|asic1|Ethernet216|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "sonic2|asic1|Ethernet224|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "sonic2|asic1|Ethernet224|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "sonic2|asic1|Ethernet232|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "sonic2|asic1|Ethernet232|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "sonic2|asic1|Ethernet240|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "sonic2|asic1|Ethernet240|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "sonic2|asic1|Ethernet248|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "sonic2|asic1|Ethernet248|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "sonic2|asic1|Ethernet256|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "sonic2|asic1|Ethernet256|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "sonic2|asic1|Ethernet264|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "sonic2|asic1|Ethernet264|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "sonic2|asic1|Ethernet272|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "sonic2|asic1|Ethernet272|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "sonic2|asic1|Ethernet280|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "sonic2|asic1|Ethernet280|4": { + "wred_profile": "AZURE_LOSSLESS" + } } +} diff --git a/src/sonic-config-engine/tests/sample_output/py3/qos-nokia-ixr7250e-36x100g.json b/src/sonic-config-engine/tests/sample_output/py3/qos-nokia-ixr7250e-36x100g.json index 351c9cd8a50..93837070fe6 100644 --- a/src/sonic-config-engine/tests/sample_output/py3/qos-nokia-ixr7250e-36x100g.json +++ b/src/sonic-config-engine/tests/sample_output/py3/qos-nokia-ixr7250e-36x100g.json @@ -120,146 +120,146 @@ "Ethernet0": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet8": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet16": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet24": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet32": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet40": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet48": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet56": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet64": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet72": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet80": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet88": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet96": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet104": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet112": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet120": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet128": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet136": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" } }, "WRED_PROFILE": { @@ -281,867 +281,687 @@ }, "QUEUE": { "svcstr-7250-lc1-1|asic0|Ethernet0|3": { - "scheduler" : "scheduler.1", + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "svcstr-7250-lc1-1|asic0|Ethernet8|3": { - "scheduler" : "scheduler.1", + "svcstr-7250-lc1-1|asic0|Ethernet0|4": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "svcstr-7250-lc1-1|asic0|Ethernet16|3": { - "scheduler" : "scheduler.1", + "svcstr-7250-lc1-1|asic0|Ethernet8|3": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "svcstr-7250-lc1-1|asic0|Ethernet24|3": { - "scheduler" : "scheduler.1", + "svcstr-7250-lc1-1|asic0|Ethernet8|4": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "svcstr-7250-lc1-1|asic0|Ethernet32|3": { - "scheduler" : "scheduler.1", + "svcstr-7250-lc1-1|asic0|Ethernet16|3": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "svcstr-7250-lc1-1|asic0|Ethernet40|3": { - "scheduler" : "scheduler.1", + "svcstr-7250-lc1-1|asic0|Ethernet16|4": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "svcstr-7250-lc1-1|asic0|Ethernet48|3": { - "scheduler" : "scheduler.1", + "svcstr-7250-lc1-1|asic0|Ethernet24|3": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "svcstr-7250-lc1-1|asic0|Ethernet56|3": { - "scheduler" : "scheduler.1", + "svcstr-7250-lc1-1|asic0|Ethernet24|4": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "svcstr-7250-lc1-1|asic0|Ethernet64|3": { - "scheduler" : "scheduler.1", + "svcstr-7250-lc1-1|asic0|Ethernet32|3": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "svcstr-7250-lc1-1|asic0|Ethernet72|3": { - "scheduler" : "scheduler.1", + "svcstr-7250-lc1-1|asic0|Ethernet32|4": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "svcstr-7250-lc1-1|asic0|Ethernet80|3": { - "scheduler" : "scheduler.1", + "svcstr-7250-lc1-1|asic0|Ethernet40|3": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "svcstr-7250-lc1-1|asic0|Ethernet88|3": { - "scheduler" : "scheduler.1", + "svcstr-7250-lc1-1|asic0|Ethernet40|4": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "svcstr-7250-lc1-1|asic0|Ethernet96|3": { - "scheduler" : "scheduler.1", + "svcstr-7250-lc1-1|asic0|Ethernet48|3": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "svcstr-7250-lc1-1|asic0|Ethernet104|3": { - "scheduler" : "scheduler.1", + "svcstr-7250-lc1-1|asic0|Ethernet48|4": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "svcstr-7250-lc1-1|asic0|Ethernet112|3": { - "scheduler" : "scheduler.1", + "svcstr-7250-lc1-1|asic0|Ethernet56|3": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "svcstr-7250-lc1-1|asic0|Ethernet120|3": { - "scheduler" : "scheduler.1", + "svcstr-7250-lc1-1|asic0|Ethernet56|4": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "svcstr-7250-lc1-1|asic0|Ethernet128|3": { - "scheduler" : "scheduler.1", + "svcstr-7250-lc1-1|asic0|Ethernet64|3": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "svcstr-7250-lc1-1|asic0|Ethernet136|3": { - "scheduler" : "scheduler.1", + "svcstr-7250-lc1-1|asic0|Ethernet64|4": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "svcstr-7250-lc1-1|asic1|Ethernet144|3": { - "scheduler" : "scheduler.1", + "svcstr-7250-lc1-1|asic0|Ethernet72|3": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "svcstr-7250-lc1-1|asic1|Ethernet152|3": { - "scheduler" : "scheduler.1", + "svcstr-7250-lc1-1|asic0|Ethernet72|4": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "svcstr-7250-lc1-1|asic1|Ethernet160|3": { - "scheduler" : "scheduler.1", + "svcstr-7250-lc1-1|asic0|Ethernet80|3": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "svcstr-7250-lc1-1|asic1|Ethernet168|3": { - "scheduler" : "scheduler.1", + "svcstr-7250-lc1-1|asic0|Ethernet80|4": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "svcstr-7250-lc1-1|asic1|Ethernet176|3": { - "scheduler" : "scheduler.1", + "svcstr-7250-lc1-1|asic0|Ethernet88|3": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "svcstr-7250-lc1-1|asic1|Ethernet184|3": { - "scheduler" : "scheduler.1", + "svcstr-7250-lc1-1|asic0|Ethernet88|4": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "svcstr-7250-lc1-1|asic1|Ethernet192|3": { - "scheduler" : "scheduler.1", + "svcstr-7250-lc1-1|asic0|Ethernet96|3": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "svcstr-7250-lc1-1|asic1|Ethernet200|3": { - "scheduler" : "scheduler.1", + "svcstr-7250-lc1-1|asic0|Ethernet96|4": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "svcstr-7250-lc1-1|asic1|Ethernet208|3": { - "scheduler" : "scheduler.1", + "svcstr-7250-lc1-1|asic0|Ethernet104|3": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "svcstr-7250-lc1-1|asic1|Ethernet216|3": { - "scheduler" : "scheduler.1", + "svcstr-7250-lc1-1|asic0|Ethernet104|4": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "svcstr-7250-lc1-1|asic1|Ethernet224|3": { - "scheduler" : "scheduler.1", + "svcstr-7250-lc1-1|asic0|Ethernet112|3": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "svcstr-7250-lc1-1|asic1|Ethernet232|3": { - "scheduler" : "scheduler.1", + "svcstr-7250-lc1-1|asic0|Ethernet112|4": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "svcstr-7250-lc1-1|asic1|Ethernet240|3": { - "scheduler" : "scheduler.1", + "svcstr-7250-lc1-1|asic0|Ethernet120|3": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "svcstr-7250-lc1-1|asic1|Ethernet248|3": { - "scheduler" : "scheduler.1", + "svcstr-7250-lc1-1|asic0|Ethernet120|4": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "svcstr-7250-lc1-1|asic1|Ethernet256|3": { - "scheduler" : "scheduler.1", + "svcstr-7250-lc1-1|asic0|Ethernet128|3": { + "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "svcstr-7250-lc1-1|asic1|Ethernet264|3": { - "scheduler" : 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"svcstr-7250-lc3-1|asic1|Ethernet240|4": { - "scheduler" : "scheduler.1", + "svcstr-7250-lc3-1|asic1|Ethernet264|3": { "wred_profile": "AZURE_LOSSLESS" }, - "svcstr-7250-lc3-1|asic1|Ethernet248|4": { - "scheduler" : "scheduler.1", + "svcstr-7250-lc3-1|asic1|Ethernet264|4": { "wred_profile": "AZURE_LOSSLESS" }, - "svcstr-7250-lc3-1|asic1|Ethernet256|4": { - "scheduler" : "scheduler.1", + "svcstr-7250-lc3-1|asic1|Ethernet272|3": { "wred_profile": "AZURE_LOSSLESS" }, - "svcstr-7250-lc3-1|asic1|Ethernet264|4": { - "scheduler" : "scheduler.1", + "svcstr-7250-lc3-1|asic1|Ethernet272|4": { "wred_profile": "AZURE_LOSSLESS" }, - "svcstr-7250-lc3-1|asic1|Ethernet272|4": { - "scheduler" : "scheduler.1", + "svcstr-7250-lc3-1|asic1|Ethernet280|3": { "wred_profile": "AZURE_LOSSLESS" }, "svcstr-7250-lc3-1|asic1|Ethernet280|4": { - "scheduler" : "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, "svcstr-7250-lc1-1|asic0|Ethernet0|0": { @@ -1198,958 +1018,148 @@ "svcstr-7250-lc1-1|asic0|Ethernet136|0": { "scheduler": "scheduler.0" }, - "svcstr-7250-lc1-1|asic1|Ethernet144|0": { + "svcstr-7250-lc1-1|asic0|Ethernet0|1": { "scheduler": "scheduler.0" }, - "svcstr-7250-lc1-1|asic1|Ethernet152|0": { + "svcstr-7250-lc1-1|asic0|Ethernet8|1": { "scheduler": "scheduler.0" }, - "svcstr-7250-lc1-1|asic1|Ethernet160|0": { + "svcstr-7250-lc1-1|asic0|Ethernet16|1": { "scheduler": "scheduler.0" }, - "svcstr-7250-lc1-1|asic1|Ethernet168|0": { + "svcstr-7250-lc1-1|asic0|Ethernet24|1": { "scheduler": "scheduler.0" }, - "svcstr-7250-lc1-1|asic1|Ethernet176|0": { + "svcstr-7250-lc1-1|asic0|Ethernet32|1": { "scheduler": "scheduler.0" }, - "svcstr-7250-lc1-1|asic1|Ethernet184|0": { + "svcstr-7250-lc1-1|asic0|Ethernet40|1": { "scheduler": "scheduler.0" }, - "svcstr-7250-lc1-1|asic1|Ethernet192|0": { + "svcstr-7250-lc1-1|asic0|Ethernet48|1": { "scheduler": "scheduler.0" }, - "svcstr-7250-lc1-1|asic1|Ethernet200|0": { + "svcstr-7250-lc1-1|asic0|Ethernet56|1": { "scheduler": "scheduler.0" }, - "svcstr-7250-lc1-1|asic1|Ethernet208|0": { + "svcstr-7250-lc1-1|asic0|Ethernet64|1": { "scheduler": "scheduler.0" }, - "svcstr-7250-lc1-1|asic1|Ethernet216|0": { + "svcstr-7250-lc1-1|asic0|Ethernet72|1": { "scheduler": "scheduler.0" }, - "svcstr-7250-lc1-1|asic1|Ethernet224|0": { + "svcstr-7250-lc1-1|asic0|Ethernet80|1": { "scheduler": "scheduler.0" }, - "svcstr-7250-lc1-1|asic1|Ethernet232|0": { + "svcstr-7250-lc1-1|asic0|Ethernet88|1": { "scheduler": "scheduler.0" }, - "svcstr-7250-lc1-1|asic1|Ethernet240|0": { + "svcstr-7250-lc1-1|asic0|Ethernet96|1": { "scheduler": "scheduler.0" }, - "svcstr-7250-lc1-1|asic1|Ethernet248|0": { + "svcstr-7250-lc1-1|asic0|Ethernet104|1": { "scheduler": "scheduler.0" }, - "svcstr-7250-lc1-1|asic1|Ethernet256|0": { + "svcstr-7250-lc1-1|asic0|Ethernet112|1": { "scheduler": "scheduler.0" }, - "svcstr-7250-lc1-1|asic1|Ethernet264|0": { + "svcstr-7250-lc1-1|asic0|Ethernet120|1": { "scheduler": "scheduler.0" }, - "svcstr-7250-lc1-1|asic1|Ethernet272|0": { + "svcstr-7250-lc1-1|asic0|Ethernet128|1": { "scheduler": "scheduler.0" }, - "svcstr-7250-lc1-1|asic1|Ethernet280|0": { + "svcstr-7250-lc1-1|asic0|Ethernet136|1": { "scheduler": "scheduler.0" }, - "svcstr-7250-lc2-1|asic0|Ethernet0|0": { + "svcstr-7250-lc1-1|asic0|Ethernet0|2": { "scheduler": "scheduler.0" }, - "svcstr-7250-lc2-1|asic0|Ethernet8|0": { + "svcstr-7250-lc1-1|asic0|Ethernet8|2": { "scheduler": "scheduler.0" }, - "svcstr-7250-lc2-1|asic0|Ethernet16|0": { + "svcstr-7250-lc1-1|asic0|Ethernet16|2": { "scheduler": "scheduler.0" }, - "svcstr-7250-lc2-1|asic0|Ethernet24|0": { + "svcstr-7250-lc1-1|asic0|Ethernet24|2": { "scheduler": "scheduler.0" }, - "svcstr-7250-lc2-1|asic0|Ethernet32|0": { + "svcstr-7250-lc1-1|asic0|Ethernet32|2": { "scheduler": "scheduler.0" }, - "svcstr-7250-lc2-1|asic0|Ethernet40|0": { + "svcstr-7250-lc1-1|asic0|Ethernet40|2": { "scheduler": "scheduler.0" }, - "svcstr-7250-lc2-1|asic0|Ethernet48|0": { + "svcstr-7250-lc1-1|asic0|Ethernet48|2": { "scheduler": "scheduler.0" }, - "svcstr-7250-lc2-1|asic0|Ethernet56|0": { + "svcstr-7250-lc1-1|asic0|Ethernet56|2": { "scheduler": "scheduler.0" }, - "svcstr-7250-lc2-1|asic0|Ethernet64|0": { + "svcstr-7250-lc1-1|asic0|Ethernet64|2": { "scheduler": "scheduler.0" }, - "svcstr-7250-lc2-1|asic0|Ethernet72|0": { + "svcstr-7250-lc1-1|asic0|Ethernet72|2": { "scheduler": "scheduler.0" }, - "svcstr-7250-lc2-1|asic0|Ethernet80|0": { + "svcstr-7250-lc1-1|asic0|Ethernet80|2": { "scheduler": "scheduler.0" }, - "svcstr-7250-lc2-1|asic0|Ethernet88|0": { + "svcstr-7250-lc1-1|asic0|Ethernet88|2": { "scheduler": "scheduler.0" }, - "svcstr-7250-lc2-1|asic0|Ethernet96|0": { + "svcstr-7250-lc1-1|asic0|Ethernet96|2": { "scheduler": "scheduler.0" }, - "svcstr-7250-lc2-1|asic0|Ethernet104|0": { + "svcstr-7250-lc1-1|asic0|Ethernet104|2": { "scheduler": "scheduler.0" }, - "svcstr-7250-lc2-1|asic0|Ethernet112|0": { + "svcstr-7250-lc1-1|asic0|Ethernet112|2": { "scheduler": "scheduler.0" }, - "svcstr-7250-lc2-1|asic0|Ethernet120|0": { + "svcstr-7250-lc1-1|asic0|Ethernet120|2": { "scheduler": "scheduler.0" }, - "svcstr-7250-lc2-1|asic0|Ethernet128|0": { + "svcstr-7250-lc1-1|asic0|Ethernet128|2": { "scheduler": "scheduler.0" }, - "svcstr-7250-lc2-1|asic0|Ethernet136|0": { + "svcstr-7250-lc1-1|asic0|Ethernet136|2": { "scheduler": "scheduler.0" }, - "svcstr-7250-lc2-1|asic1|Ethernet144|0": { + "svcstr-7250-lc1-1|asic0|Ethernet0|5": { "scheduler": "scheduler.0" }, - "svcstr-7250-lc2-1|asic1|Ethernet152|0": { + "svcstr-7250-lc1-1|asic0|Ethernet8|5": { "scheduler": "scheduler.0" }, - "svcstr-7250-lc2-1|asic1|Ethernet160|0": { + "svcstr-7250-lc1-1|asic0|Ethernet16|5": { "scheduler": "scheduler.0" }, - "svcstr-7250-lc2-1|asic1|Ethernet168|0": { + "svcstr-7250-lc1-1|asic0|Ethernet24|5": { "scheduler": "scheduler.0" }, - "svcstr-7250-lc2-1|asic1|Ethernet176|0": { + "svcstr-7250-lc1-1|asic0|Ethernet32|5": { "scheduler": "scheduler.0" }, - "svcstr-7250-lc2-1|asic1|Ethernet184|0": { + "svcstr-7250-lc1-1|asic0|Ethernet40|5": { "scheduler": "scheduler.0" }, - "svcstr-7250-lc2-1|asic1|Ethernet192|0": { + "svcstr-7250-lc1-1|asic0|Ethernet48|5": { "scheduler": "scheduler.0" }, - "svcstr-7250-lc2-1|asic1|Ethernet200|0": { + "svcstr-7250-lc1-1|asic0|Ethernet56|5": { "scheduler": "scheduler.0" }, - "svcstr-7250-lc2-1|asic1|Ethernet208|0": { + "svcstr-7250-lc1-1|asic0|Ethernet64|5": { "scheduler": "scheduler.0" }, - "svcstr-7250-lc2-1|asic1|Ethernet216|0": { + "svcstr-7250-lc1-1|asic0|Ethernet72|5": { "scheduler": "scheduler.0" }, - "svcstr-7250-lc2-1|asic1|Ethernet224|0": { + "svcstr-7250-lc1-1|asic0|Ethernet80|5": { "scheduler": "scheduler.0" }, - "svcstr-7250-lc2-1|asic1|Ethernet232|0": { - "scheduler": "scheduler.0" - }, - "svcstr-7250-lc2-1|asic1|Ethernet240|0": { - "scheduler": "scheduler.0" - }, - "svcstr-7250-lc2-1|asic1|Ethernet248|0": { - "scheduler": "scheduler.0" - }, - "svcstr-7250-lc2-1|asic1|Ethernet256|0": { - "scheduler": "scheduler.0" - }, - "svcstr-7250-lc2-1|asic1|Ethernet264|0": { - "scheduler": "scheduler.0" - }, - "svcstr-7250-lc2-1|asic1|Ethernet272|0": { - "scheduler": "scheduler.0" - }, - "svcstr-7250-lc2-1|asic1|Ethernet280|0": { - "scheduler": "scheduler.0" - }, - "svcstr-7250-lc3-1|asic0|Ethernet0|0": { - "scheduler": "scheduler.0" - }, - "svcstr-7250-lc3-1|asic0|Ethernet8|0": { - "scheduler": "scheduler.0" - }, - "svcstr-7250-lc3-1|asic0|Ethernet16|0": { - "scheduler": "scheduler.0" - }, - "svcstr-7250-lc3-1|asic0|Ethernet24|0": { - "scheduler": "scheduler.0" - }, - "svcstr-7250-lc3-1|asic0|Ethernet32|0": { - "scheduler": "scheduler.0" - }, - "svcstr-7250-lc3-1|asic0|Ethernet40|0": { - "scheduler": "scheduler.0" - }, - "svcstr-7250-lc3-1|asic0|Ethernet48|0": { - "scheduler": "scheduler.0" - }, - "svcstr-7250-lc3-1|asic0|Ethernet56|0": { - "scheduler": "scheduler.0" - }, - "svcstr-7250-lc3-1|asic0|Ethernet64|0": { - "scheduler": "scheduler.0" - }, - "svcstr-7250-lc3-1|asic0|Ethernet72|0": { - "scheduler": "scheduler.0" - }, - "svcstr-7250-lc3-1|asic0|Ethernet80|0": { - "scheduler": "scheduler.0" - }, - "svcstr-7250-lc3-1|asic0|Ethernet88|0": { - "scheduler": "scheduler.0" - }, - "svcstr-7250-lc3-1|asic0|Ethernet96|0": { - "scheduler": "scheduler.0" - }, - "svcstr-7250-lc3-1|asic0|Ethernet104|0": { - "scheduler": "scheduler.0" - }, - "svcstr-7250-lc3-1|asic0|Ethernet112|0": { - "scheduler": "scheduler.0" - }, - "svcstr-7250-lc3-1|asic0|Ethernet120|0": { - "scheduler": "scheduler.0" - }, - "svcstr-7250-lc3-1|asic0|Ethernet128|0": { - "scheduler": "scheduler.0" - }, - "svcstr-7250-lc3-1|asic0|Ethernet136|0": { - "scheduler": "scheduler.0" - }, - "svcstr-7250-lc3-1|asic1|Ethernet144|0": { - "scheduler": "scheduler.0" - }, - "svcstr-7250-lc3-1|asic1|Ethernet152|0": { - "scheduler": "scheduler.0" - }, - "svcstr-7250-lc3-1|asic1|Ethernet160|0": { - "scheduler": "scheduler.0" - }, - "svcstr-7250-lc3-1|asic1|Ethernet168|0": { - "scheduler": "scheduler.0" - }, - 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"scheduler": "scheduler.0" - }, - "svcstr-7250-lc3-1|asic1|Ethernet280|0": { - "scheduler": "scheduler.0" - }, - "svcstr-7250-lc1-1|asic0|Ethernet0|1": { - "scheduler": "scheduler.0" - }, - "svcstr-7250-lc1-1|asic0|Ethernet8|1": { - "scheduler": "scheduler.0" - }, - "svcstr-7250-lc1-1|asic0|Ethernet16|1": { - "scheduler": "scheduler.0" - }, - "svcstr-7250-lc1-1|asic0|Ethernet24|1": { - "scheduler": "scheduler.0" - }, - "svcstr-7250-lc1-1|asic0|Ethernet32|1": { - "scheduler": "scheduler.0" - }, - "svcstr-7250-lc1-1|asic0|Ethernet40|1": { - "scheduler": "scheduler.0" - }, - "svcstr-7250-lc1-1|asic0|Ethernet48|1": { - "scheduler": "scheduler.0" - }, - "svcstr-7250-lc1-1|asic0|Ethernet56|1": { - "scheduler": "scheduler.0" - }, - "svcstr-7250-lc1-1|asic0|Ethernet64|1": { - "scheduler": "scheduler.0" - }, - "svcstr-7250-lc1-1|asic0|Ethernet72|1": { - "scheduler": "scheduler.0" - }, - "svcstr-7250-lc1-1|asic0|Ethernet80|1": { - "scheduler": "scheduler.0" - }, - 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"scheduler": "scheduler.0" - }, "svcstr-7250-lc2-1|asic1|Ethernet192|6": { - "scheduler": "scheduler.0" - }, "svcstr-7250-lc2-1|asic1|Ethernet200|6": { - "scheduler": "scheduler.0" - }, "svcstr-7250-lc2-1|asic1|Ethernet208|6": { - "scheduler": "scheduler.0" - }, "svcstr-7250-lc2-1|asic1|Ethernet216|6": { - "scheduler": "scheduler.0" - }, "svcstr-7250-lc2-1|asic1|Ethernet224|6": { - "scheduler": "scheduler.0" - }, "svcstr-7250-lc2-1|asic1|Ethernet232|6": { - "scheduler": "scheduler.0" - }, "svcstr-7250-lc2-1|asic1|Ethernet240|6": { - "scheduler": "scheduler.0" - }, "svcstr-7250-lc2-1|asic1|Ethernet248|6": { - "scheduler": "scheduler.0" - }, "svcstr-7250-lc2-1|asic1|Ethernet256|6": { - "scheduler": "scheduler.0" - }, "svcstr-7250-lc2-1|asic1|Ethernet264|6": { - "scheduler": "scheduler.0" - }, "svcstr-7250-lc2-1|asic1|Ethernet272|6": { - "scheduler": "scheduler.0" - }, "svcstr-7250-lc2-1|asic1|Ethernet280|6": { - "scheduler": "scheduler.0" - }, "svcstr-7250-lc3-1|asic0|Ethernet0|6": { - "scheduler": "scheduler.0" - }, "svcstr-7250-lc3-1|asic0|Ethernet8|6": { - "scheduler": "scheduler.0" - }, "svcstr-7250-lc3-1|asic0|Ethernet16|6": { - "scheduler": "scheduler.0" - }, "svcstr-7250-lc3-1|asic0|Ethernet24|6": { - "scheduler": "scheduler.0" - }, "svcstr-7250-lc3-1|asic0|Ethernet32|6": { - "scheduler": "scheduler.0" - }, "svcstr-7250-lc3-1|asic0|Ethernet40|6": { - "scheduler": "scheduler.0" - }, "svcstr-7250-lc3-1|asic0|Ethernet48|6": { - "scheduler": "scheduler.0" - }, "svcstr-7250-lc3-1|asic0|Ethernet56|6": { - "scheduler": "scheduler.0" - }, "svcstr-7250-lc3-1|asic0|Ethernet64|6": { - "scheduler": "scheduler.0" - }, "svcstr-7250-lc3-1|asic0|Ethernet72|6": { - "scheduler": "scheduler.0" - }, "svcstr-7250-lc3-1|asic0|Ethernet80|6": { - "scheduler": "scheduler.0" - }, "svcstr-7250-lc3-1|asic0|Ethernet88|6": { - "scheduler": "scheduler.0" - }, "svcstr-7250-lc3-1|asic0|Ethernet96|6": { - "scheduler": "scheduler.0" - }, "svcstr-7250-lc3-1|asic0|Ethernet104|6": { - "scheduler": "scheduler.0" - }, "svcstr-7250-lc3-1|asic0|Ethernet112|6": { - "scheduler": "scheduler.0" - }, "svcstr-7250-lc3-1|asic0|Ethernet120|6": { - "scheduler": "scheduler.0" - }, "svcstr-7250-lc3-1|asic0|Ethernet128|6": { - "scheduler": "scheduler.0" - }, "svcstr-7250-lc3-1|asic0|Ethernet136|6": { - "scheduler": "scheduler.0" - }, "svcstr-7250-lc3-1|asic1|Ethernet144|6": { - "scheduler": "scheduler.0" - }, "svcstr-7250-lc3-1|asic1|Ethernet152|6": { - "scheduler": "scheduler.0" - }, "svcstr-7250-lc3-1|asic1|Ethernet160|6": { - "scheduler": "scheduler.0" - }, "svcstr-7250-lc3-1|asic1|Ethernet168|6": { - "scheduler": "scheduler.0" - }, "svcstr-7250-lc3-1|asic1|Ethernet176|6": { - "scheduler": "scheduler.0" - }, "svcstr-7250-lc3-1|asic1|Ethernet184|6": { - "scheduler": "scheduler.0" - }, "svcstr-7250-lc3-1|asic1|Ethernet192|6": { - "scheduler": "scheduler.0" - }, "svcstr-7250-lc3-1|asic1|Ethernet200|6": { - "scheduler": "scheduler.0" - }, "svcstr-7250-lc3-1|asic1|Ethernet208|6": { - "scheduler": "scheduler.0" - }, "svcstr-7250-lc3-1|asic1|Ethernet216|6": { - "scheduler": "scheduler.0" - }, "svcstr-7250-lc3-1|asic1|Ethernet224|6": { - "scheduler": "scheduler.0" - }, "svcstr-7250-lc3-1|asic1|Ethernet232|6": { - "scheduler": "scheduler.0" - }, "svcstr-7250-lc3-1|asic1|Ethernet240|6": { - "scheduler": "scheduler.0" - }, "svcstr-7250-lc3-1|asic1|Ethernet248|6": { - "scheduler": "scheduler.0" - }, "svcstr-7250-lc3-1|asic1|Ethernet256|6": { - "scheduler": "scheduler.0" - }, "svcstr-7250-lc3-1|asic1|Ethernet264|6": { - "scheduler": "scheduler.0" - }, "svcstr-7250-lc3-1|asic1|Ethernet272|6": { - "scheduler": "scheduler.0" - }, "svcstr-7250-lc3-1|asic1|Ethernet280|6": { - "scheduler": "scheduler.0" - } + } } } diff --git a/src/sonic-config-engine/tests/sample_output/py3/qos-nokia-ixr7250e-36x400g.json b/src/sonic-config-engine/tests/sample_output/py3/qos-nokia-ixr7250e-36x400g.json index 5a5badc9d36..27793e8ed32 100644 --- a/src/sonic-config-engine/tests/sample_output/py3/qos-nokia-ixr7250e-36x400g.json +++ b/src/sonic-config-engine/tests/sample_output/py3/qos-nokia-ixr7250e-36x400g.json @@ -120,146 +120,146 @@ "Ethernet0": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet8": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet16": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet24": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet32": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet40": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet48": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet56": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet64": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet72": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet80": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet88": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet96": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet104": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet112": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet120": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet128": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" }, "Ethernet136": { "dscp_to_tc_map" : "AZURE", "tc_to_queue_map" : "AZURE", - "tc_to_pg_map" : "AZURE", - "pfc_to_queue_map": "AZURE", "pfc_enable" : "3,4", - "pfcwd_sw_enable" : "3,4" + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" } }, "WRED_PROFILE": { @@ -280,15 +280,6 @@ } }, "QUEUE": { - "str2-7250-lc1-1|asic0|Ethernet0|0": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic0|Ethernet0|1": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic0|Ethernet0|2": { - "scheduler": "scheduler.0" - }, "str2-7250-lc1-1|asic0|Ethernet0|3": { "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" @@ -297,21 +288,6 @@ "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "str2-7250-lc1-1|asic0|Ethernet0|5": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic0|Ethernet0|6": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic0|Ethernet8|0": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic0|Ethernet8|1": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic0|Ethernet8|2": { - "scheduler": "scheduler.0" - }, "str2-7250-lc1-1|asic0|Ethernet8|3": { "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" @@ -320,21 +296,6 @@ "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "str2-7250-lc1-1|asic0|Ethernet8|5": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic0|Ethernet8|6": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic0|Ethernet16|0": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic0|Ethernet16|1": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic0|Ethernet16|2": { - "scheduler": "scheduler.0" - }, "str2-7250-lc1-1|asic0|Ethernet16|3": { "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" @@ -343,21 +304,6 @@ "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "str2-7250-lc1-1|asic0|Ethernet16|5": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic0|Ethernet16|6": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic0|Ethernet24|0": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic0|Ethernet24|1": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic0|Ethernet24|2": { - "scheduler": "scheduler.0" - }, "str2-7250-lc1-1|asic0|Ethernet24|3": { "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" @@ -366,21 +312,6 @@ "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "str2-7250-lc1-1|asic0|Ethernet24|5": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic0|Ethernet24|6": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic0|Ethernet32|0": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic0|Ethernet32|1": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic0|Ethernet32|2": { - "scheduler": "scheduler.0" - }, "str2-7250-lc1-1|asic0|Ethernet32|3": { "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" @@ -389,21 +320,6 @@ "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "str2-7250-lc1-1|asic0|Ethernet32|5": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic0|Ethernet32|6": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic0|Ethernet40|0": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic0|Ethernet40|1": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic0|Ethernet40|2": { - "scheduler": "scheduler.0" - }, "str2-7250-lc1-1|asic0|Ethernet40|3": { "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" @@ -412,21 +328,6 @@ "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "str2-7250-lc1-1|asic0|Ethernet40|5": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic0|Ethernet40|6": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic0|Ethernet48|0": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic0|Ethernet48|1": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic0|Ethernet48|2": { - "scheduler": "scheduler.0" - }, "str2-7250-lc1-1|asic0|Ethernet48|3": { "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" @@ -435,21 +336,6 @@ "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "str2-7250-lc1-1|asic0|Ethernet48|5": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic0|Ethernet48|6": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic0|Ethernet56|0": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic0|Ethernet56|1": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic0|Ethernet56|2": { - "scheduler": "scheduler.0" - }, "str2-7250-lc1-1|asic0|Ethernet56|3": { "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" @@ -458,21 +344,6 @@ "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "str2-7250-lc1-1|asic0|Ethernet56|5": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic0|Ethernet56|6": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic0|Ethernet64|0": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic0|Ethernet64|1": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic0|Ethernet64|2": { - "scheduler": "scheduler.0" - }, "str2-7250-lc1-1|asic0|Ethernet64|3": { "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" @@ -481,21 +352,6 @@ "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "str2-7250-lc1-1|asic0|Ethernet64|5": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic0|Ethernet64|6": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic0|Ethernet72|0": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic0|Ethernet72|1": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic0|Ethernet72|2": { - "scheduler": "scheduler.0" - }, "str2-7250-lc1-1|asic0|Ethernet72|3": { "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" @@ -504,21 +360,6 @@ "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "str2-7250-lc1-1|asic0|Ethernet72|5": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic0|Ethernet72|6": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic0|Ethernet80|0": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic0|Ethernet80|1": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic0|Ethernet80|2": { - "scheduler": "scheduler.0" - }, "str2-7250-lc1-1|asic0|Ethernet80|3": { "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" @@ -527,21 +368,6 @@ "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "str2-7250-lc1-1|asic0|Ethernet80|5": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic0|Ethernet80|6": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic0|Ethernet88|0": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic0|Ethernet88|1": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic0|Ethernet88|2": { - "scheduler": "scheduler.0" - }, "str2-7250-lc1-1|asic0|Ethernet88|3": { "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" @@ -550,21 +376,6 @@ "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "str2-7250-lc1-1|asic0|Ethernet88|5": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic0|Ethernet88|6": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic0|Ethernet96|0": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic0|Ethernet96|1": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic0|Ethernet96|2": { - "scheduler": "scheduler.0" - }, "str2-7250-lc1-1|asic0|Ethernet96|3": { "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" @@ -573,21 +384,6 @@ "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "str2-7250-lc1-1|asic0|Ethernet96|5": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic0|Ethernet96|6": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic0|Ethernet104|0": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic0|Ethernet104|1": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic0|Ethernet104|2": { - "scheduler": "scheduler.0" - }, "str2-7250-lc1-1|asic0|Ethernet104|3": { "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" @@ -596,21 +392,6 @@ "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "str2-7250-lc1-1|asic0|Ethernet104|5": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic0|Ethernet104|6": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic0|Ethernet112|0": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic0|Ethernet112|1": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic0|Ethernet112|2": { - "scheduler": "scheduler.0" - }, "str2-7250-lc1-1|asic0|Ethernet112|3": { "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" @@ -619,21 +400,6 @@ "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "str2-7250-lc1-1|asic0|Ethernet112|5": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic0|Ethernet112|6": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic0|Ethernet120|0": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic0|Ethernet120|1": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic0|Ethernet120|2": { - "scheduler": "scheduler.0" - }, "str2-7250-lc1-1|asic0|Ethernet120|3": { "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" @@ -642,21 +408,6 @@ "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "str2-7250-lc1-1|asic0|Ethernet120|5": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic0|Ethernet120|6": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic0|Ethernet128|0": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic0|Ethernet128|1": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic0|Ethernet128|2": { - "scheduler": "scheduler.0" - }, "str2-7250-lc1-1|asic0|Ethernet128|3": { "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" @@ -665,21 +416,6 @@ "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "str2-7250-lc1-1|asic0|Ethernet128|5": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic0|Ethernet128|6": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic0|Ethernet136|0": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic0|Ethernet136|1": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic0|Ethernet136|2": { - "scheduler": "scheduler.0" - }, "str2-7250-lc1-1|asic0|Ethernet136|3": { "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" @@ -688,1252 +424,598 @@ "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "str2-7250-lc1-1|asic0|Ethernet136|5": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic0|Ethernet136|6": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic1|Ethernet144|0": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic1|Ethernet144|1": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic1|Ethernet144|2": { - "scheduler": "scheduler.0" - }, "str2-7250-lc1-1|asic1|Ethernet144|3": { - "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, "str2-7250-lc1-1|asic1|Ethernet144|4": { - "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "str2-7250-lc1-1|asic1|Ethernet144|5": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic1|Ethernet144|6": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic1|Ethernet152|0": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic1|Ethernet152|1": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic1|Ethernet152|2": { - "scheduler": "scheduler.0" - }, "str2-7250-lc1-1|asic1|Ethernet152|3": { - "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, "str2-7250-lc1-1|asic1|Ethernet152|4": { - "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "str2-7250-lc1-1|asic1|Ethernet152|5": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic1|Ethernet152|6": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic1|Ethernet160|0": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic1|Ethernet160|1": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic1|Ethernet160|2": { - "scheduler": "scheduler.0" - }, "str2-7250-lc1-1|asic1|Ethernet160|3": { - "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, "str2-7250-lc1-1|asic1|Ethernet160|4": { - "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "str2-7250-lc1-1|asic1|Ethernet160|5": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic1|Ethernet160|6": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic1|Ethernet168|0": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic1|Ethernet168|1": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic1|Ethernet168|2": { - "scheduler": "scheduler.0" - }, "str2-7250-lc1-1|asic1|Ethernet168|3": { - "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, "str2-7250-lc1-1|asic1|Ethernet168|4": { - "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "str2-7250-lc1-1|asic1|Ethernet168|5": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic1|Ethernet168|6": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic1|Ethernet176|0": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic1|Ethernet176|1": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic1|Ethernet176|2": { - "scheduler": "scheduler.0" - }, "str2-7250-lc1-1|asic1|Ethernet176|3": { - "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, "str2-7250-lc1-1|asic1|Ethernet176|4": { - "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "str2-7250-lc1-1|asic1|Ethernet176|5": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic1|Ethernet176|6": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic1|Ethernet184|0": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic1|Ethernet184|1": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic1|Ethernet184|2": { - "scheduler": "scheduler.0" - }, "str2-7250-lc1-1|asic1|Ethernet184|3": { - "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, "str2-7250-lc1-1|asic1|Ethernet184|4": { - "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "str2-7250-lc1-1|asic1|Ethernet184|5": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic1|Ethernet184|6": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic1|Ethernet192|0": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic1|Ethernet192|1": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic1|Ethernet192|2": { - "scheduler": "scheduler.0" - }, "str2-7250-lc1-1|asic1|Ethernet192|3": { - "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, "str2-7250-lc1-1|asic1|Ethernet192|4": { - "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "str2-7250-lc1-1|asic1|Ethernet192|5": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic1|Ethernet192|6": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic1|Ethernet200|0": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic1|Ethernet200|1": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic1|Ethernet200|2": { - "scheduler": "scheduler.0" - }, "str2-7250-lc1-1|asic1|Ethernet200|3": { - "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, "str2-7250-lc1-1|asic1|Ethernet200|4": { - "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "str2-7250-lc1-1|asic1|Ethernet200|5": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic1|Ethernet200|6": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic1|Ethernet208|0": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic1|Ethernet208|1": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic1|Ethernet208|2": { - "scheduler": "scheduler.0" - }, "str2-7250-lc1-1|asic1|Ethernet208|3": { - "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, "str2-7250-lc1-1|asic1|Ethernet208|4": { - "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "str2-7250-lc1-1|asic1|Ethernet208|5": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic1|Ethernet208|6": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic1|Ethernet216|0": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic1|Ethernet216|1": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic1|Ethernet216|2": { - "scheduler": "scheduler.0" - }, "str2-7250-lc1-1|asic1|Ethernet216|3": { - "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, "str2-7250-lc1-1|asic1|Ethernet216|4": { - "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "str2-7250-lc1-1|asic1|Ethernet216|5": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic1|Ethernet216|6": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic1|Ethernet224|0": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic1|Ethernet224|1": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic1|Ethernet224|2": { - "scheduler": "scheduler.0" - }, "str2-7250-lc1-1|asic1|Ethernet224|3": { - "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, "str2-7250-lc1-1|asic1|Ethernet224|4": { - "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "str2-7250-lc1-1|asic1|Ethernet224|5": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic1|Ethernet224|6": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic1|Ethernet232|0": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic1|Ethernet232|1": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic1|Ethernet232|2": { - "scheduler": "scheduler.0" - }, "str2-7250-lc1-1|asic1|Ethernet232|3": { - "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, "str2-7250-lc1-1|asic1|Ethernet232|4": { - "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "str2-7250-lc1-1|asic1|Ethernet232|5": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic1|Ethernet232|6": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic1|Ethernet240|0": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic1|Ethernet240|1": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic1|Ethernet240|2": { - "scheduler": "scheduler.0" - }, "str2-7250-lc1-1|asic1|Ethernet240|3": { - "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, "str2-7250-lc1-1|asic1|Ethernet240|4": { - "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "str2-7250-lc1-1|asic1|Ethernet240|5": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic1|Ethernet240|6": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic1|Ethernet248|0": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic1|Ethernet248|1": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic1|Ethernet248|2": { - "scheduler": "scheduler.0" - }, "str2-7250-lc1-1|asic1|Ethernet248|3": { - "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, "str2-7250-lc1-1|asic1|Ethernet248|4": { - "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "str2-7250-lc1-1|asic1|Ethernet248|5": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic1|Ethernet248|6": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic1|Ethernet256|0": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic1|Ethernet256|1": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic1|Ethernet256|2": { - "scheduler": "scheduler.0" - }, "str2-7250-lc1-1|asic1|Ethernet256|3": { - "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, "str2-7250-lc1-1|asic1|Ethernet256|4": { - "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, - "str2-7250-lc1-1|asic1|Ethernet256|5": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic1|Ethernet256|6": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic1|Ethernet264|0": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic1|Ethernet264|1": { - "scheduler": "scheduler.0" - }, - "str2-7250-lc1-1|asic1|Ethernet264|2": { - "scheduler": "scheduler.0" - }, "str2-7250-lc1-1|asic1|Ethernet264|3": { - "scheduler": "scheduler.1", "wred_profile": "AZURE_LOSSLESS" }, "str2-7250-lc1-1|asic1|Ethernet264|4": { - "scheduler": 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"scheduler.0" }, - "str2-7250-lc2-1|asic1|Ethernet280|5": { + "str2-7250-lc1-1|asic0|Ethernet128|6": { "scheduler": "scheduler.0" }, - "str2-7250-lc2-1|asic1|Ethernet280|6": { + "str2-7250-lc1-1|asic0|Ethernet136|6": { "scheduler": "scheduler.0" } } diff --git a/src/sonic-config-engine/tests/sample_output/py3/qos-pch-config.json b/src/sonic-config-engine/tests/sample_output/py3/qos-pch-config.json new file mode 100644 index 00000000000..496c4943261 --- /dev/null +++ b/src/sonic-config-engine/tests/sample_output/py3/qos-pch-config.json @@ -0,0 +1,885 @@ +{ + "TC_TO_PRIORITY_GROUP_MAP": { + "AZURE": { + "0": "0", + "1": "0", + "2": "0", + "3": "3", + "4": "4", + "5": "0", + "6": "0", + "7": "7" + } + }, + "MAP_PFC_PRIORITY_TO_QUEUE": { + "AZURE": { + "0": "0", + "1": "1", + "2": "2", + "3": "3", + "4": "4", + "5": "5", + "6": "6", + "7": "7" + } + }, + "TC_TO_QUEUE_MAP": { + "AZURE": { + "0": "0", + "1": "1", + "2": "2", + "3": "3", + "4": "4", + "5": "5", + "6": "6", + "7": "7" + } + }, + "DSCP_TO_TC_MAP": { + "AZURE": { + "0" : "1", + "1" : "1", + "2" : "1", + "3" : "3", + "4" : "4", + "5" : "2", + "6" : "1", + "7" : "1", + "8" : "0", + "9" : "1", + "10": "1", + "11": "1", + "12": "1", + "13": "1", + "14": "1", + "15": "1", + "16": "1", + "17": "1", + "18": "1", + "19": "1", + "20": "1", + "21": "1", + "22": "1", + "23": "1", + "24": "1", + "25": "1", + "26": "1", + "27": "1", + "28": "1", + "29": "1", + "30": "1", + "31": "1", + "32": "1", + "33": "1", + "34": "1", + "35": "1", + "36": "1", + "37": "1", + "38": "1", + "39": "1", + "40": "1", + "41": "1", + "42": "1", + "43": "1", + "44": "1", + "45": "1", + "46": "5", + "47": "1", + "48": "6", + "49": "1", + "50": "1", + "51": "1", + "52": "1", + "53": "1", + "54": "1", + "55": "1", + "56": "1", + "57": "1", + "58": "1", + "59": "1", + "60": "1", + "61": "1", + "62": "1", + "63": "1" + } + }, + "SCHEDULER": { + "scheduler.0": { + "type" : "DWRR", + "weight": "14" + }, + "scheduler.1": { + "type" : "DWRR", + "weight": "15" + } + }, + "PORT_QOS_MAP": { + "global": { + "dscp_to_tc_map" : "AZURE" + }, + "Ethernet0": { + "dscp_to_tc_map" : "AZURE", + "tc_to_queue_map" : "AZURE", + "pfc_enable" : "3,4", + "pfcwd_sw_enable" : "3,4", + "tc_to_pg_map" : "AZURE", + "pfc_to_queue_map": "AZURE" + } + }, + "WRED_PROFILE": { + "AZURE_LOSSLESS" : { + "wred_green_enable" : "true", + "wred_yellow_enable" : "true", + "wred_red_enable" : "true", + "ecn" : "ecn_all", + "green_max_threshold" : "10000000", + "green_min_threshold" : "2000000", + "yellow_max_threshold" : "10000000", + "yellow_min_threshold" : "2000000", + "red_max_threshold" : "10000000", + "red_min_threshold" : "2000000", + "green_drop_probability" : "5", + "yellow_drop_probability": "5", + "red_drop_probability" : "5" + } + }, + "QUEUE": { + "SONIC3|asic0|Ethernet0|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC3|asic0|Ethernet0|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC3|asic0|Ethernet8|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC3|asic0|Ethernet8|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC3|asic0|Ethernet16|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC3|asic0|Ethernet16|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC3|asic0|Ethernet24|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC3|asic0|Ethernet24|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC3|asic0|Ethernet32|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC3|asic0|Ethernet32|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC3|asic0|Ethernet40|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC3|asic0|Ethernet40|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC3|asic0|Ethernet48|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC3|asic0|Ethernet48|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC3|asic0|Ethernet56|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC3|asic0|Ethernet56|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC3|asic0|Ethernet64|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC3|asic0|Ethernet64|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC3|asic0|Ethernet72|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC3|asic0|Ethernet72|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC3|asic0|Ethernet80|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC3|asic0|Ethernet80|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC3|asic0|Ethernet88|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC3|asic0|Ethernet88|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC3|asic0|Ethernet96|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC3|asic0|Ethernet96|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC3|asic0|Ethernet104|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC3|asic0|Ethernet104|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC3|asic0|Ethernet112|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC3|asic0|Ethernet112|4": { + "wred_profile": "AZURE_LOSSLESS" + }, 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"AZURE_LOSSLESS" + }, "SONIC3|asic1|Ethernet176|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC3|asic1|Ethernet176|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC3|asic1|Ethernet184|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC3|asic1|Ethernet184|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC3|asic1|Ethernet192|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC3|asic1|Ethernet192|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC3|asic1|Ethernet200|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC3|asic1|Ethernet200|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC3|asic1|Ethernet208|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC3|asic1|Ethernet208|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC3|asic1|Ethernet216|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC3|asic1|Ethernet216|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC3|asic1|Ethernet224|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC3|asic1|Ethernet224|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC3|asic1|Ethernet232|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC3|asic1|Ethernet232|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC3|asic1|Ethernet240|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC3|asic1|Ethernet240|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC3|asic1|Ethernet248|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC3|asic1|Ethernet248|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC3|asic1|Ethernet256|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC3|asic1|Ethernet256|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC3|asic1|Ethernet264|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC3|asic1|Ethernet264|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC3|asic1|Ethernet272|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC3|asic1|Ethernet272|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC3|asic1|Ethernet280|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC3|asic1|Ethernet280|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC4|asic0|Ethernet0|3": { + "scheduler": "scheduler.1", + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC4|asic0|Ethernet0|4": { + "scheduler": "scheduler.1", + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC4|asic0|Ethernet8|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC4|asic0|Ethernet8|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC4|asic0|Ethernet16|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC4|asic0|Ethernet16|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC4|asic0|Ethernet24|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC4|asic0|Ethernet24|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC4|asic0|Ethernet32|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC4|asic0|Ethernet32|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC4|asic0|Ethernet40|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC4|asic0|Ethernet40|4": { + "wred_profile": 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"SONIC4|asic1|Ethernet264|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC4|asic1|Ethernet264|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC4|asic1|Ethernet272|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC4|asic1|Ethernet272|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC4|asic1|Ethernet280|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC4|asic1|Ethernet280|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC1|asic0|Ethernet0|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC1|asic0|Ethernet0|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC1|asic0|Ethernet8|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC1|asic0|Ethernet8|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC1|asic0|Ethernet16|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC1|asic0|Ethernet16|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC1|asic0|Ethernet24|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC1|asic0|Ethernet24|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC1|asic0|Ethernet32|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC1|asic0|Ethernet32|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC1|asic0|Ethernet40|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC1|asic0|Ethernet40|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC1|asic0|Ethernet48|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC1|asic0|Ethernet48|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC1|asic0|Ethernet56|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC1|asic0|Ethernet56|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC1|asic0|Ethernet64|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC1|asic0|Ethernet64|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC1|asic0|Ethernet72|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC1|asic0|Ethernet72|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC1|asic0|Ethernet80|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC1|asic0|Ethernet80|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC1|asic0|Ethernet88|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC1|asic0|Ethernet88|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC1|asic0|Ethernet96|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC1|asic0|Ethernet96|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC1|asic0|Ethernet104|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC1|asic0|Ethernet104|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC1|asic0|Ethernet112|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC1|asic0|Ethernet112|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC1|asic0|Ethernet120|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC1|asic0|Ethernet120|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC1|asic0|Ethernet128|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC1|asic0|Ethernet128|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC1|asic0|Ethernet136|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC1|asic0|Ethernet136|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC1|asic1|Ethernet144|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC1|asic1|Ethernet144|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC1|asic1|Ethernet152|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC1|asic1|Ethernet152|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC1|asic1|Ethernet160|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC1|asic1|Ethernet160|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC1|asic1|Ethernet168|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC1|asic1|Ethernet168|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC1|asic1|Ethernet176|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC1|asic1|Ethernet176|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC1|asic1|Ethernet184|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC1|asic1|Ethernet184|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC1|asic1|Ethernet192|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC1|asic1|Ethernet192|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC1|asic1|Ethernet200|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC1|asic1|Ethernet200|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC1|asic1|Ethernet208|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC1|asic1|Ethernet208|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC1|asic1|Ethernet216|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC1|asic1|Ethernet216|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC1|asic1|Ethernet224|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC1|asic1|Ethernet224|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC1|asic1|Ethernet232|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC1|asic1|Ethernet232|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC1|asic1|Ethernet240|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC1|asic1|Ethernet240|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC1|asic1|Ethernet248|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC1|asic1|Ethernet248|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC1|asic1|Ethernet256|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC1|asic1|Ethernet256|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC1|asic1|Ethernet264|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC1|asic1|Ethernet264|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC1|asic1|Ethernet272|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC1|asic1|Ethernet272|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC1|asic1|Ethernet280|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC1|asic1|Ethernet280|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC2|asic0|Ethernet0|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC2|asic0|Ethernet0|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC2|asic0|Ethernet8|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC2|asic0|Ethernet8|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC2|asic0|Ethernet16|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC2|asic0|Ethernet16|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC2|asic0|Ethernet24|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC2|asic0|Ethernet24|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC2|asic0|Ethernet32|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC2|asic0|Ethernet32|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC2|asic0|Ethernet40|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC2|asic0|Ethernet40|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC2|asic0|Ethernet48|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC2|asic0|Ethernet48|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC2|asic0|Ethernet56|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC2|asic0|Ethernet56|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC2|asic0|Ethernet64|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC2|asic0|Ethernet64|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC2|asic0|Ethernet72|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC2|asic0|Ethernet72|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC2|asic0|Ethernet80|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC2|asic0|Ethernet80|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC2|asic0|Ethernet88|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC2|asic0|Ethernet88|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC2|asic0|Ethernet96|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC2|asic0|Ethernet96|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC2|asic0|Ethernet104|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC2|asic0|Ethernet104|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC2|asic0|Ethernet112|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC2|asic0|Ethernet112|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC2|asic0|Ethernet120|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC2|asic0|Ethernet120|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC2|asic0|Ethernet128|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC2|asic0|Ethernet128|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC2|asic0|Ethernet136|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC2|asic0|Ethernet136|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC2|asic1|Ethernet144|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC2|asic1|Ethernet144|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC2|asic1|Ethernet152|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC2|asic1|Ethernet152|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC2|asic1|Ethernet160|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC2|asic1|Ethernet160|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC2|asic1|Ethernet168|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC2|asic1|Ethernet168|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC2|asic1|Ethernet176|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC2|asic1|Ethernet176|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC2|asic1|Ethernet184|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC2|asic1|Ethernet184|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC2|asic1|Ethernet192|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC2|asic1|Ethernet192|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC2|asic1|Ethernet200|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC2|asic1|Ethernet200|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC2|asic1|Ethernet208|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC2|asic1|Ethernet208|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC2|asic1|Ethernet216|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC2|asic1|Ethernet216|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC2|asic1|Ethernet224|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC2|asic1|Ethernet224|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC2|asic1|Ethernet232|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC2|asic1|Ethernet232|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC2|asic1|Ethernet240|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC2|asic1|Ethernet240|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC2|asic1|Ethernet248|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC2|asic1|Ethernet248|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC2|asic1|Ethernet256|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC2|asic1|Ethernet256|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC2|asic1|Ethernet264|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC2|asic1|Ethernet264|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC2|asic1|Ethernet272|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC2|asic1|Ethernet272|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC2|asic1|Ethernet280|3": { + "wred_profile": "AZURE_LOSSLESS" + }, + "SONIC2|asic1|Ethernet280|4": { + "wred_profile": "AZURE_LOSSLESS" + }, "SONIC4|asic0|Ethernet0|0": { + "scheduler": "scheduler.0" + }, + "SONIC4|asic0|Ethernet0|1": { + "scheduler": "scheduler.0" + }, + "SONIC4|asic0|Ethernet0|2": { + "scheduler": "scheduler.0" + }, + "SONIC4|asic0|Ethernet0|5": { + "scheduler": "scheduler.0" + }, + "SONIC4|asic0|Ethernet0|6": { + "scheduler": "scheduler.0" + } + } +} diff --git a/src/sonic-config-engine/tests/sample_output/py3/rsyslog.conf b/src/sonic-config-engine/tests/sample_output/py3/rsyslog.conf index 754b830a592..16f67e51660 100644 --- a/src/sonic-config-engine/tests/sample_output/py3/rsyslog.conf +++ b/src/sonic-config-engine/tests/sample_output/py3/rsyslog.conf @@ -13,24 +13,23 @@ #### MODULES #### ################# -$ModLoad imuxsock # provides support for local system logging +global(net.enableDNS="off") - - -$ModLoad imklog # provides kernel logging support -$KlogParseKernelTimestamp off -$KlogKeepKernelTimestamp on - -#$ModLoad immark # provides --MARK-- message capability +module(load="imuxsock" ) # provides support for local system logging +module(load="imklog" ParseKernelTimestamp="off" KeepKernelTimestamp="on") # provides kernel logging support +#module(load="immark") # provides --MARK-- message capability # provides UDP syslog reception -$ModLoad imudp -$UDPServerAddress 1.1.1.1 #bind to localhost before udp server run -$UDPServerRun 514 +module(load="imudp") +input(type="imudp" address="1.1.1.1" port="514") # provides TCP syslog reception -#$ModLoad imtcp -#$InputTCPServerRun 514 +#module(load="imtcp") +#input(type="imtcp" port="514") + +# provides RELP syslog reception +module(load="imrelp") +input(type="imrelp" address="1.1.1.1" port="2514") ########################### @@ -43,7 +42,7 @@ $UDPServerRun 514 #$ActionFileDefaultTemplate RSYSLOG_TraditionalFileFormat # Define a custom template -$template SONiCFileFormat,"%timegenerated:::date-year% %timegenerated%.%timegenerated:::date-subseconds% kvm-host %syslogseverity-text:::uppercase% %syslogtag%%msg:::sp-if-no-1st-sp%%msg:::drop-last-lf%\n" +$template SONiCFileFormat,"%TIMESTAMP:::date-year% %TIMESTAMP%.%TIMESTAMP:::date-subseconds% kvm-host %syslogseverity-text:::uppercase% %syslogtag%%msg:::sp-if-no-1st-sp%%msg:::drop-last-lf%\n" $ActionFileDefaultTemplate SONiCFileFormat $template SONiCForwardFormat,"<%PRI%>%TIMESTAMP:::date-rfc3339% kvm-host %syslogseverity-text:::uppercase% %syslogtag%%msg:::sp-if-no-1st-sp%%msg:::drop-last-lf%\n" $template SONiCForwardFormatWithOsVersion,"<%PRI%>%TIMESTAMP:::date-rfc3339% kvm-host %syslogseverity-text:::uppercase% %syslogtag%%msg:::sp-if-no-1st-sp%%msg:::drop-last-lf%\n" @@ -66,7 +65,7 @@ template(name="WelfRemoteFormat" type="string" string="%TIMESTAMP% id=firewall t *.* -action(type="omfwd" Target="3.3.3.3" Port="514" Protocol="udp" Template="SONiCForwardFormat") +action(type="omfwd" Target="3.3.3.3" Port="514" Protocol="udp" Template="SONiCForwardFormat" action.resumeRetryCount="60" queue.type="LinkedList" queue.size="20000") # diff --git a/src/sonic-config-engine/tests/sample_output/py3/rsyslog_same_ip.conf b/src/sonic-config-engine/tests/sample_output/py3/rsyslog_same_ip.conf new file mode 100644 index 00000000000..6ea58a4fdff --- /dev/null +++ b/src/sonic-config-engine/tests/sample_output/py3/rsyslog_same_ip.conf @@ -0,0 +1,97 @@ +############################################################################### +# Managed by Ansible +# file: ansible/roles/acs/templates/rsyslog.conf.j2 +############################################################################### +# +# /etc/rsyslog.conf Configuration file for rsyslog. +# +# For more information see +# /usr/share/doc/rsyslog-doc/html/rsyslog_conf.html + + +################# +#### MODULES #### +################# + +global(net.enableDNS="off") + +module(load="imuxsock" ) # provides support for local system logging +module(load="imklog" ParseKernelTimestamp="off" KeepKernelTimestamp="on") # provides kernel logging support +#module(load="immark") # provides --MARK-- message capability + +# provides UDP syslog reception +module(load="imudp") +input(type="imudp" address="2.2.2.2" port="514") + +# provides TCP syslog reception +#module(load="imtcp") +#input(type="imtcp" port="514") + +# provides RELP syslog reception +module(load="imrelp") +input(type="imrelp" address="2.2.2.2" port="2514") + + +########################### +#### GLOBAL DIRECTIVES #### +########################### +# +# Use traditional timestamp format. +# To enable high precision timestamps, comment out the following line. +# +#$ActionFileDefaultTemplate RSYSLOG_TraditionalFileFormat + +# Define a custom template +$template SONiCFileFormat,"%TIMESTAMP:::date-year% %TIMESTAMP%.%TIMESTAMP:::date-subseconds% kvm-host %syslogseverity-text:::uppercase% %syslogtag%%msg:::sp-if-no-1st-sp%%msg:::drop-last-lf%\n" +$ActionFileDefaultTemplate SONiCFileFormat +$template SONiCForwardFormat,"<%PRI%>%TIMESTAMP:::date-rfc3339% kvm-host %syslogseverity-text:::uppercase% %syslogtag%%msg:::sp-if-no-1st-sp%%msg:::drop-last-lf%\n" +$template SONiCForwardFormatWithOsVersion,"<%PRI%>%TIMESTAMP:::date-rfc3339% kvm-host %syslogseverity-text:::uppercase% %syslogtag%%msg:::sp-if-no-1st-sp%%msg:::drop-last-lf%\n" + +$ActionForwardDefaultTemplate SONiCForwardFormat + + +template(name="WelfRemoteFormat" type="string" string="%TIMESTAMP% id=firewall time=\"%timereported\ +:::date-year%-%timereported:::date-month%-%timereported:::date-day% %timereported:::date-hour%:%timereported:::date-minute%:%timereported\ +:::date-second%\" fw=\"kvm-host\" pri=%syslogpriority% msg=\"%syslogtag%%msg:::sp-if-no-1st-sp%%msg:::drop-last-lf%\"\n") + +# +# Remote syslog logging +# + +# The omfwd plug-in provides the core functionality of traditional message +# forwarding via UDP and plain TCP. It is a built-in module that does not need +# to be loaded. + + + +*.* +action(type="omfwd" Target="3.3.3.3" Port="514" Protocol="udp" Template="SONiCForwardFormat" action.resumeRetryCount="60" queue.type="LinkedList" queue.size="20000") + + +# +# Set the default permissions for all log files. +# +$FileOwner root +$FileGroup adm +$FileCreateMode 0640 +$DirCreateMode 0755 +$Umask 0022 + +# +# Where to place spool and state files +# +$WorkDirectory /var/spool/rsyslog + +# +# Include all config files in /etc/rsyslog.d/ +# +$IncludeConfig /etc/rsyslog.d/*.conf + +# +# Suppress duplicate messages and report "message repeated n times" +# +$RepeatedMsgReduction on + +############### +#### RULES #### +############### diff --git a/src/sonic-config-engine/tests/sample_output/py3/rsyslog_with_docker0.conf b/src/sonic-config-engine/tests/sample_output/py3/rsyslog_with_docker0.conf index 89b07b0fcd3..affa639c726 100644 --- a/src/sonic-config-engine/tests/sample_output/py3/rsyslog_with_docker0.conf +++ b/src/sonic-config-engine/tests/sample_output/py3/rsyslog_with_docker0.conf @@ -13,26 +13,25 @@ #### MODULES #### ################# -$ModLoad imuxsock # provides support for local system logging +global(net.enableDNS="off") - - -$ModLoad imklog # provides kernel logging support -$KlogParseKernelTimestamp off -$KlogKeepKernelTimestamp on - -#$ModLoad immark # provides --MARK-- message capability +module(load="imuxsock" ) # provides support for local system logging +module(load="imklog" ParseKernelTimestamp="off" KeepKernelTimestamp="on") # provides kernel logging support +#module(load="immark") # provides --MARK-- message capability # provides UDP syslog reception -$ModLoad imudp -$UDPServerAddress 1.1.1.1 #bind to localhost before udp server run -$UDPServerRun 514 -$UDPServerAddress 2.2.2.2 -$UDPServerRun 514 +module(load="imudp") +input(type="imudp" address="1.1.1.1" port="514") +input(type="imudp" address="2.2.2.2" port="514") # provides TCP syslog reception -#$ModLoad imtcp -#$InputTCPServerRun 514 +#module(load="imtcp") +#input(type="imtcp" port="514") + +# provides RELP syslog reception +module(load="imrelp") +input(type="imrelp" address="1.1.1.1" port="2514") +input(type="imrelp" address="2.2.2.2" port="2514") ########################### @@ -45,7 +44,7 @@ $UDPServerRun 514 #$ActionFileDefaultTemplate RSYSLOG_TraditionalFileFormat # Define a custom template -$template SONiCFileFormat,"%timegenerated:::date-year% %timegenerated%.%timegenerated:::date-subseconds% kvm-host %syslogseverity-text:::uppercase% %syslogtag%%msg:::sp-if-no-1st-sp%%msg:::drop-last-lf%\n" +$template SONiCFileFormat,"%TIMESTAMP:::date-year% %TIMESTAMP%.%TIMESTAMP:::date-subseconds% kvm-host %syslogseverity-text:::uppercase% %syslogtag%%msg:::sp-if-no-1st-sp%%msg:::drop-last-lf%\n" $ActionFileDefaultTemplate SONiCFileFormat $template SONiCForwardFormat,"<%PRI%>%TIMESTAMP:::date-rfc3339% kvm-host %syslogseverity-text:::uppercase% %syslogtag%%msg:::sp-if-no-1st-sp%%msg:::drop-last-lf%\n" $template SONiCForwardFormatWithOsVersion,"<%PRI%>%TIMESTAMP:::date-rfc3339% kvm-host %syslogseverity-text:::uppercase% %syslogtag%%msg:::sp-if-no-1st-sp%%msg:::drop-last-lf%\n" @@ -68,7 +67,7 @@ template(name="WelfRemoteFormat" type="string" string="%TIMESTAMP% id=firewall t *.* -action(type="omfwd" Target="3.3.3.3" Port="514" Protocol="udp" Template="SONiCForwardFormat") +action(type="omfwd" Target="3.3.3.3" Port="514" Protocol="udp" Template="SONiCForwardFormat" action.resumeRetryCount="60" queue.type="LinkedList" queue.size="20000") # diff --git a/src/sonic-config-engine/tests/sample_output/py3/two_mgmt_interfaces b/src/sonic-config-engine/tests/sample_output/py3/two_mgmt_interfaces index df2ac9ad30a..34eadb9ee39 100644 --- a/src/sonic-config-engine/tests/sample_output/py3/two_mgmt_interfaces +++ b/src/sonic-config-engine/tests/sample_output/py3/two_mgmt_interfaces @@ -22,8 +22,8 @@ iface eth0 inet static broadcast 10.0.0.255 ########## management network policy routing rules # management port up rules - up ip -4 route add default via 10.0.0.1 dev eth0 table default metric 201 up ip -4 route add 10.0.0.0/24 dev eth0 table default + up ip -4 route add default via 10.0.0.1 dev eth0 table default metric 201 up ip -4 rule add pref 32765 from 10.0.0.100/32 table default up ip rule add pref 32764 to 10.20.6.16/32 table default # management port down rules @@ -38,8 +38,8 @@ iface eth0 inet6 static broadcast 2603:10e2:0:2902:ffff:ffff:ffff:ffff ########## management network policy routing rules # management port up rules - up ip -6 route add default via 2603:10e2:0:2902::1 dev eth0 table default metric 201 up ip -6 route add 2603:10e2:0:2902::/64 dev eth0 table default + up ip -6 route add default via 2603:10e2:0:2902::1 dev eth0 table default metric 201 up ip -6 rule add pref 32765 from 2603:10e2:0:2902::8/128 table default # IPV6 default table not add to lookup by default, management server need this to access IPV6 address when BGP shutdown up ip -6 rule add pref 32767 lookup default @@ -55,8 +55,8 @@ iface eth1 inet static broadcast 10.0.10.255 ########## management network policy routing rules # management port up rules - up ip -4 route add default via 10.0.10.1 dev eth1 table default metric 201 up ip -4 route add 10.0.10.0/24 dev eth1 table default + up ip -4 route add default via 10.0.10.1 dev eth1 table default metric 201 up ip -4 rule add pref 32765 from 10.0.10.100/32 table default up ip rule add pref 32764 to 10.20.6.16/32 table default # management port down rules @@ -71,8 +71,8 @@ iface eth1 inet6 static broadcast 2603:10e2:0:abcd:ffff:ffff:ffff:ffff ########## management network policy routing rules # management port up rules - up ip -6 route add default via 2603:10e2:0:abcd::1 dev eth1 table default metric 201 up ip -6 route add 2603:10e2:0:abcd::/64 dev eth1 table default + up ip -6 route add default via 2603:10e2:0:abcd::1 dev eth1 table default metric 201 up ip -6 rule add pref 32765 from 2603:10e2:0:abcd::8/128 table default # IPV6 default table not add to lookup by default, management server need this to access IPV6 address when BGP shutdown up ip -6 rule add pref 32767 lookup default diff --git a/src/sonic-config-engine/tests/sample_output/t1-smartswitch.json b/src/sonic-config-engine/tests/sample_output/t1-smartswitch.json index fcc8e315d2c..7eb36607245 100644 --- a/src/sonic-config-engine/tests/sample_output/t1-smartswitch.json +++ b/src/sonic-config-engine/tests/sample_output/t1-smartswitch.json @@ -292,6 +292,7 @@ "DEVICE_METADATA": { "localhost": { "bgp_asn": "65100", + "dpu_auto_recovery": "enable", "hostname": "sonic", "hwsku": "SSwitch-32x1000Gb", "subtype": "SmartSwitch", diff --git a/src/sonic-config-engine/tests/simple-sample-device-desc-linecard.xml b/src/sonic-config-engine/tests/simple-sample-device-desc-linecard.xml new file mode 100644 index 00000000000..01ddfabc63a --- /dev/null +++ b/src/sonic-config-engine/tests/simple-sample-device-desc-linecard.xml @@ -0,0 +1,12 @@ + + Linecard + switch-linecard + 8800-LC + SEL20 + + 10.0.0.101/24 + + + FC00:1::33/64 + + diff --git a/src/sonic-config-engine/tests/simple-sample-device-desc-supervisor.xml b/src/sonic-config-engine/tests/simple-sample-device-desc-supervisor.xml new file mode 100644 index 00000000000..05f2836d7fa --- /dev/null +++ b/src/sonic-config-engine/tests/simple-sample-device-desc-supervisor.xml @@ -0,0 +1,12 @@ + + Supervisor + switch-supervisor + 8800-RP + SEL20 + + 10.0.0.100/24 + + + FC00:1::32/64 + + diff --git a/src/sonic-config-engine/tests/syslog-server-vrf.json b/src/sonic-config-engine/tests/syslog-server-vrf.json new file mode 100644 index 00000000000..6571b8100bb --- /dev/null +++ b/src/sonic-config-engine/tests/syslog-server-vrf.json @@ -0,0 +1,10 @@ +{ + "SYSLOG_SERVER": { + "10.3.145.8": { + "vrf": "mgmt" + }, + "100.127.20.21": { + "vrf": "default" + } + } +} diff --git a/src/sonic-config-engine/tests/t0-sample-graph-mgmt31.xml b/src/sonic-config-engine/tests/t0-sample-graph-mgmt31.xml new file mode 100644 index 00000000000..0e7d2de8889 --- /dev/null +++ b/src/sonic-config-engine/tests/t0-sample-graph-mgmt31.xml @@ -0,0 +1,938 @@ + + + + + + switch-t0 + 10.1.0.32 + BGPMonitor + 10.20.30.40 + 30 + 10 + 3 + + + false + switch-t0 + 10.0.0.56 + ARISTA01T1 + 10.0.0.57 + 1 + 180 + 60 + + + switch-t0 + FC00::71 + ARISTA01T1 + FC00::72 + 1 + 180 + 60 + + + false + switch-t0 + 10.0.0.58 + ARISTA02T1 + 10.0.0.59 + 1 + 180 + 60 + + + switch-t0 + FC00::75 + ARISTA02T1 + FC00::76 + 1 + 180 + 60 + + + false + switch-t0 + 10.0.0.60 + ARISTA03T1 + 10.0.0.61 + 1 + 180 + 60 + + + switch-t0 + FC00::79 + ARISTA03T1 + FC00::7A + 1 + 180 + 60 + + + false + switch-t0 + 10.0.0.62 + ARISTA04T1 + 10.0.0.63 + 1 + 180 + 60 + + + switch-t0 + FC00::7D + ARISTA04T1 + FC00::7E + 1 + 180 + 60 + + + + + 1 + + BGPMonitor + + + BGPPeer +
10.1.0.32
+ + + +
+
+ +
+ + 65100 + switch-t0 + + +
10.0.0.57
+ + + +
+ +
10.0.0.59
+ + + +
+ +
10.0.0.61
+ + + +
+ +
10.0.0.63
+ + + +
+
+ +
+ + 64600 + ARISTA01T1 + + + + 64600 + ARISTA02T1 + + + + 64600 + ARISTA03T1 + + + + 64600 + ARISTA04T1 + + +
+
+ + + + + + HostIP + Loopback0 + + 10.1.0.32/32 + + 10.1.0.32/32 + + + HostIP1 + Loopback0 + + FC00:1::32/128 + + FC00:1::32/128 + + + LoopbackIP1 + Loopback1 + + 10.10.0.99/32 + + 10.10.0.99/32 + + + LoopbackIP2 + Loopback2 + + 10.21.0.64/32 + + 10.21.0.64/32 + + + LoopbackIP3 + Loopback3 + + 10.21.64.2/32 + + 10.21.64.2/32 + + + + + HostIP + eth0 + + 10.10.4.13/31 + + 10.10.4.13/31 + + + HostIP + eth0 + + 2603:10e2:0:2902::8/64 + + 2603:10e2:0:2902::8/64 + + + + + + + switch-t0 + + + PortChannel01 + fortyGigE0/112 + + + + PortChannel02 + fortyGigE0/116 + + + + PortChannel03 + fortyGigE0/120 + + + + PortChannel04 + fortyGigE0/124 + + + + + + Vlan1000 + fortyGigE0/4;fortyGigE0/8;fortyGigE0/12;fortyGigE0/16;fortyGigE0/20;fortyGigE0/24;fortyGigE0/28;fortyGigE0/32;fortyGigE0/36;fortyGigE0/40;fortyGigE0/44;fortyGigE0/48;fortyGigE0/52;fortyGigE0/56;fortyGigE0/60;fortyGigE0/64;fortyGigE0/68;fortyGigE0/72;fortyGigE0/76;fortyGigE0/80;fortyGigE0/84;fortyGigE0/88;fortyGigE0/92;fortyGigE0/96 + False + 0.0.0.0/0 + + + 192.0.0.1;192.0.0.2 + fc02:2000::1;fc02:2000::2 + 1000 + 1000 + 192.168.0.0/27 + + + + + Vlan2000 + PortChannel01;PortChannel02;PortChannel03 + False + 0.0.0.0/0 + + + 192.0.0.3;192.0.0.4 + fc02:2000::3;fc02:2000::4 + 2000 + 2000 + 192.168.200.0/27 + + + + + Vlan99 + fortyGigE0/100 + False + 0.0.0.0/0 + + UserDefinedL2Vlan + 192.0.0.1;192.0.0.2 + 99 + 99 + + + + + + Vlan98 + fortyGigE0/100;PortChannel01;PortChannel03 + False + 0.0.0.0/0 + + UserDefinedL2Vlan + 192.0.0.1;192.0.0.2 + 98 + 98 + + + + + + + + + PortChannel01 + 10.0.0.56/31 + + + + PortChannel01 + FC00::71/126 + + + + PortChannel02 + 10.0.0.58/31 + + + + PortChannel02 + FC00::75/126 + + + + PortChannel03 + 10.0.0.60/31 + + + + PortChannel03 + FC00::79/126 + + + + PortChannel04 + 10.0.0.62/31 + + + + PortChannel04 + FC00::7D/126 + + + + Vlan1000 + 192.168.0.1/27 + + + + Vlan2000 + 192.168.200.1/27 + + + + + + ERSPAN + everflow + Everflow + + + ERSPANv6 + everflowV6 + Everflow + + + EGRESS_ERSPAN + everflow_egress + Everflow + + + PortChannel01;PortChannel02;PortChannel03;PortChannel04 + DataAclIngress + DataPlane + + + PortChannel01;PortChannel02;Vlan98 + DataAclEgress + DataPlane + + + SNMP + SNMP_ACL + SNMP + + + NTP + NTP_ACL + NTP + + + SSH + SSH_ACL + SSH + + + SSH + ROUTER-PROTECT + SSH + + + SNMP + ROUTER-PROTECT + SNMP + + + NTP + NTP_ACL + + + + + + + + + + DeviceInterfaceLink + ARISTA01T1 + Ethernet1/1 + switch-t0 + fortyGigE0/112 + + + DeviceInterfaceLink + ARISTA02T1 + Ethernet1/1 + switch-t0 + fortyGigE0/116 + + + DeviceInterfaceLink + ARISTA03T1 + Ethernet1/1 + switch-t0 + fortyGigE0/120 + + + DeviceInterfaceLink + ARISTA04T1 + Ethernet1/1 + switch-t0 + fortyGigE0/124 + 100000 + + + DeviceInterfaceLink + 100000 + switch-t0 + fortyGigE0/4 + true + ARISTA05T1 + Ethernet1/33 + true + + + DeviceInterfaceLink + Servers0 + eth0 + switch-t0 + fortyGigE0/4 + + + DeviceInterfaceLink + Servers100 + eth0 + switch-t0 + fortyGigE0/100 + + + + + switch-t0 + Force10-S6000 + + + ARISTA01T1 + Arista + + + ARISTA02T1 + Arista + + + ARISTA03T1 + Arista + + + ARISTA04T1 + Arista + + + + + + + + DeviceInterface + + true + 1 + Ethernet0 + + false + 0 + 0 + 40000 + + + DeviceInterface + + true + 1 + Ethernet8 + + false + 0 + 0 + 40000 + + + DeviceInterface + + true + 1 + Ethernet12 + + false + 0 + 0 + 40000 + + + DeviceInterface + + true + 1 + Ethernet16 + + false + 0 + 0 + 40000 + + + DeviceInterface + + true + 1 + Ethernet20 + + false + 0 + 0 + 40000 + + + DeviceInterface + + true + 1 + Ethernet24 + + false + 0 + 0 + 40000 + + + DeviceInterface + + true + 1 + Ethernet28 + + false + 0 + 0 + 40000 + + + DeviceInterface + + true + 1 + Ethernet32 + + false + 0 + 0 + 40000 + + + DeviceInterface + + true + 1 + Ethernet36 + + false + 0 + 0 + 40000 + + + DeviceInterface + + true + 1 + Ethernet40 + + false + 0 + 0 + 40000 + + + DeviceInterface + + true + 1 + Ethernet44 + + false + 0 + 0 + 40000 + + + DeviceInterface + + true + 1 + Ethernet48 + + false + 0 + 0 + 40000 + + + DeviceInterface + + true + 1 + Ethernet52 + + false + 0 + 0 + 40000 + + + DeviceInterface + + true + 1 + Ethernet56 + + false + 0 + 0 + 40000 + + + DeviceInterface + + true + 1 + Ethernet60 + + false + 0 + 0 + 40000 + + + DeviceInterface + + true + 1 + Ethernet64 + + false + 0 + 0 + 40000 + + + DeviceInterface + + true + 1 + Ethernet68 + + false + 0 + 0 + 40000 + + + DeviceInterface + + true + 1 + Ethernet72 + + false + 0 + 0 + 40000 + + + DeviceInterface + + true + 1 + Ethernet76 + + false + 0 + 0 + 40000 + + + DeviceInterface + + true + 1 + Ethernet80 + + false + 0 + 0 + 40000 + + + DeviceInterface + + true + 1 + Ethernet84 + + false + 0 + 0 + 40000 + + + DeviceInterface + + true + 1 + Ethernet88 + + false + 0 + 0 + 40000 + + + DeviceInterface + + true + 1 + Ethernet92 + + false + 0 + 0 + 40000 + + + DeviceInterface + + true + 1 + Ethernet96 + + false + 0 + 0 + 40000 + + + DeviceInterface + + true + 1 + Ethernet100 + + false + 0 + 0 + 40000 + + + DeviceInterface + + true + 1 + Ethernet104 + + false + 0 + 0 + 40000 + + + DeviceInterface + + true + 1 + Ethernet108 + + false + 0 + 0 + 40000 + + + DeviceInterface + + true + 1 + Ethernet112 + + false + 0 + 0 + 40000 + + + DeviceInterface + + true + 1 + Ethernet116 + + false + 0 + 0 + 40000 + + + DeviceInterface + + true + 1 + Ethernet120 + + false + 0 + 0 + 40000 + + + Force10-S6000 + + + + + + + switch-t0 + + + ErspanDestinationIpv4 + + 2.2.2.2 + + + + + + + + + + + + + AutoNegotiation + + True + + + FECDisabled + + True + + + ARISTA05T1:Ethernet1/33;switch-t0:fortyGigE0/4 + + + + + + AutoNegotiation + + False + + + FECDisabled + + True + + + ARISTA06T1:Ethernet1/34;switch-t0:fortyGigE0/8 + + + + + + + switch-t0 + + + DeploymentId + + 1 + + + + + + + switch-t0 + Force10-S6000 +
diff --git a/src/sonic-config-engine/tests/test_frr.py b/src/sonic-config-engine/tests/test_frr.py index c8453c91a28..d039b7d0a01 100644 --- a/src/sonic-config-engine/tests/test_frr.py +++ b/src/sonic-config-engine/tests/test_frr.py @@ -50,7 +50,7 @@ def run_diff(self, file1, file2): def run_case(self, template, target, extra_data=None): template_dir = os.path.join(self.test_dir, '..', '..', '..', 'dockers', 'docker-fpm-frr', "frr") conf_template = os.path.join(template_dir, template) - constants = os.path.join(self.test_dir, '..', '..', '..', 'files', 'image_config', 'constants', 'constants.yml') + constants = os.path.join(self.test_dir, 'data', 'constants.yml') cmd = ['-m', self.t0_minigraph, '-p', self.t0_port_config, '-y', constants, '-t', conf_template, '-T', template_dir] if extra_data: cmd = ['-a', json.dumps(extra_data)] + cmd diff --git a/src/sonic-config-engine/tests/test_j2files.py b/src/sonic-config-engine/tests/test_j2files.py index 38665c7080f..4ba6f319c1f 100644 --- a/src/sonic-config-engine/tests/test_j2files.py +++ b/src/sonic-config-engine/tests/test_j2files.py @@ -22,11 +22,13 @@ def setUp(self): self.ztp_inband_ip = os.path.join(self.test_dir, "sample-ztp-inband-ip.json") self.t0_minigraph = os.path.join(self.test_dir, 't0-sample-graph.xml') self.t0_minigraph_syslog = os.path.join(self.test_dir, 't0-sample-graph-syslog.xml') + self.syslog_server_vrf = os.path.join(self.test_dir, 'syslog-server-vrf.json') self.t0_minigraph_secondary_subnets = os.path.join(self.test_dir, 't0-sample-graph-secondary-subnets.xml') self.t0_minigraph_common_dhcp_relay = os.path.join(self.test_dir, 't0-sample-graph-common-dhcp-relay.xml') self.t0_mvrf_minigraph = os.path.join(self.test_dir, 't0-sample-graph-mvrf.xml') self.t0_minigraph_nomgmt = os.path.join(self.test_dir, 't0-sample-graph-nomgmt.xml') self.t0_minigraph_two_mgmt = os.path.join(self.test_dir, 't0-sample-graph-two-mgmt.xml') + self.t0_minigraph_mgmt31 = os.path.join(self.test_dir, 't0-sample-graph-mgmt31.xml') self.t0_mvrf_minigraph_nomgmt = os.path.join(self.test_dir, 't0-sample-graph-mvrf-nomgmt.xml') self.pc_minigraph = os.path.join(self.test_dir, 'pc-test-graph.xml') self.sonic_dhcp4relay_minigraph = os.path.join(self.test_dir, 't0-sonic-dhcp4relay-graph.xml') @@ -76,7 +78,8 @@ def create_machine_conf(self, platform, vendor): dir_exist = True mode = {'arista': 'aboot', 'dell': 'onie', - 'mellanox': 'onie' + 'mellanox': 'onie', + 'nexthop': 'onie' } echo_cmd1 = ["echo", '{}_platform={}'.format(mode[vendor], platform)] echo_cmd2 = ["sudo", "tee", "-a", "/host/machine.conf"] @@ -141,6 +144,11 @@ def test_interfaces(self): self.run_script(argument, output_file=self.output_file) self.assertTrue(utils.cmp(os.path.join(self.test_dir, 'sample_output', utils.PYvX_DIR, 'interfaces_syslog'), self.output_file)) + # ZTP disabled, MGMT_INTERFACE defined, SYSLOG_SERVER with per-server VRF + argument = ['-m', self.t0_minigraph_syslog, '-j', self.syslog_server_vrf, '-p', self.t0_port_config, '-a', '{\"hwaddr\":\"e4:1d:2d:a5:f3:ad\"}', '-t', interfaces_template] + self.run_script(argument, output_file=self.output_file) + self.assertTrue(utils.cmp(os.path.join(self.test_dir, 'sample_output', utils.PYvX_DIR, 'interfaces_syslog_vrf'), self.output_file)) + argument = ['-m', self.t0_mvrf_minigraph, '-p', self.t0_port_config, '-a', '{\"hwaddr\":\"e4:1d:2d:a5:f3:ad\"}', '-t', interfaces_template] self.run_script(argument, output_file=self.output_file) self.assertTrue(utils.cmp(os.path.join(self.test_dir, 'sample_output', utils.PYvX_DIR, 'mvrf_interfaces'), self.output_file)) @@ -149,6 +157,11 @@ def test_interfaces(self): self.run_script(argument, output_file=self.output_file) self.assertTrue(utils.cmp(os.path.join(self.test_dir, 'sample_output', utils.PYvX_DIR, 'two_mgmt_interfaces'), self.output_file), self.output_file) + # ZTP disabled, MGMT_INTERFACE with /31 subnet (no broadcast address) + argument = ['-m', self.t0_minigraph_mgmt31, '-p', self.t0_port_config, '-a', '{\"hwaddr\":\"e4:1d:2d:a5:f3:ad\"}', '-t', interfaces_template] + self.run_script(argument, output_file=self.output_file) + self.assertTrue(utils.cmp(os.path.join(self.test_dir, 'sample_output', utils.PYvX_DIR, 'interfaces_mgmt31'), self.output_file), self.output_file) + # ZTP disabled, no MGMT_INTERFACE defined argument = ['-m', self.t0_minigraph_nomgmt, '-p', self.t0_port_config, '-a', '{\"hwaddr\":\"e4:1d:2d:a5:f3:ad\"}', '-t', interfaces_template] self.run_script(argument, output_file=self.output_file) @@ -253,6 +266,13 @@ def test_lldp(self): self.run_script(argument, output_file=self.output_file) self.assertTrue(utils.cmp(expected_mgmt_ipv6, self.output_file)) + # Test generation of lldpd.conf with PORT table (aliases, special ports, missing alias) + mgmt_iface_ipv4_with_ports_json = os.path.join(self.test_dir, "data", "lldp", "mgmt_iface_ipv4_with_ports.json") + expected_mgmt_ipv4_with_ports = os.path.join(self.test_dir, 'sample_output', utils.PYvX_DIR, 'lldp_conf', 'lldpd-ipv4-iface-with-ports.conf') + argument = ['-j', mgmt_iface_ipv4_with_ports_json, '-t', lldpd_conf_template] + self.run_script(argument, output_file=self.output_file) + self.assertTrue(utils.cmp(expected_mgmt_ipv4_with_ports, self.output_file)) + def test_ipinip(self): ipinip_file = os.path.join(self.test_dir, '..', '..', '..', 'dockers', 'docker-orchagent', 'ipinip.json.j2') argument = ['-m', self.t0_minigraph, '-p', self.t0_port_config, '-t', ipinip_file] @@ -270,6 +290,66 @@ def test_ipinip_subnet_decap_enable(self): sample_output_file = os.path.join(self.test_dir, 'sample_output', utils.PYvX_DIR, 'ipinip_subnet_decap_enable.json') assert utils.cmp(sample_output_file, self.output_file), self.run_diff(sample_output_file, self.output_file) + def test_ipinip_backend_tor_mellanox_no_storage(self): + # Mellanox BackEndToRRouter without storage_device - guard should fire (empty output). + ipinip_file = os.path.join(self.test_dir, '..', '..', '..', 'dockers', 'docker-orchagent', 'ipinip.json.j2') + extra_data = {"ASIC_VENDOR": "mellanox", "DEVICE_METADATA": {"localhost": {"type": "BackEndToRRouter"}}} + argument = ['-m', self.t0_minigraph, '-p', self.t0_port_config, '-a', json.dumps(extra_data), '-t', ipinip_file] + self.run_script(argument, output_file=self.output_file) + + sample_output_file = os.path.join(self.test_dir, 'sample_output', utils.PYvX_DIR, 'ipinip_backend_no_storage.json') + assert utils.cmp(sample_output_file, self.output_file), self.run_diff(sample_output_file, self.output_file) + + def test_ipinip_backend_tor_mellanox_with_storage(self): + # Mellanox BackEndToRRouter with storage_device - guard bypassed, normal ipinip config rendered. + ipinip_file = os.path.join(self.test_dir, '..', '..', '..', 'dockers', 'docker-orchagent', 'ipinip.json.j2') + extra_data = {"ASIC_VENDOR": "mellanox", "DEVICE_METADATA": {"localhost": {"type": "BackEndToRRouter", "storage_device": "true"}}} + argument = ['-m', self.t0_minigraph, '-p', self.t0_port_config, '-a', json.dumps(extra_data), '-t', ipinip_file] + self.run_script(argument, output_file=self.output_file) + + sample_output_file = os.path.join(self.test_dir, 'sample_output', utils.PYvX_DIR, 'ipinip_backend_with_storage.json') + assert utils.cmp(sample_output_file, self.output_file), self.run_diff(sample_output_file, self.output_file) + + def test_ipinip_backend_tor_broadcom_no_storage(self): + # Broadcom BackEndToRRouter without storage_device - guard is Mellanox-only, normal config rendered. + ipinip_file = os.path.join(self.test_dir, '..', '..', '..', 'dockers', 'docker-orchagent', 'ipinip.json.j2') + extra_data = {"ASIC_VENDOR": "broadcom", "DEVICE_METADATA": {"localhost": {"type": "BackEndToRRouter"}}} + argument = ['-m', self.t0_minigraph, '-p', self.t0_port_config, '-a', json.dumps(extra_data), '-t', ipinip_file] + self.run_script(argument, output_file=self.output_file) + + sample_output_file = os.path.join(self.test_dir, 'sample_output', utils.PYvX_DIR, 'ipinip_backend_with_storage_broadcom.json') + assert utils.cmp(sample_output_file, self.output_file), self.run_diff(sample_output_file, self.output_file) + + def test_ipinip_backend_leaf_broadcom_no_storage(self): + # Broadcom BackEndLeafRouter - 'LeafRouter' substring match makes is_broadcom_t1 true, so dscp_mode "pipe". + ipinip_file = os.path.join(self.test_dir, '..', '..', '..', 'dockers', 'docker-orchagent', 'ipinip.json.j2') + extra_data = {"ASIC_VENDOR": "broadcom", "DEVICE_METADATA": {"localhost": {"type": "BackEndLeafRouter"}}} + argument = ['-m', self.t0_minigraph, '-p', self.t0_port_config, '-a', json.dumps(extra_data), '-t', ipinip_file] + self.run_script(argument, output_file=self.output_file) + + sample_output_file = os.path.join(self.test_dir, 'sample_output', utils.PYvX_DIR, 'ipinip_backend_with_storage.json') + assert utils.cmp(sample_output_file, self.output_file), self.run_diff(sample_output_file, self.output_file) + + def test_ipinip_backend_leaf_mellanox_no_storage(self): + # Mellanox BackEndLeafRouter without storage_device - guard should fire (empty output). + ipinip_file = os.path.join(self.test_dir, '..', '..', '..', 'dockers', 'docker-orchagent', 'ipinip.json.j2') + extra_data = {"ASIC_VENDOR": "mellanox", "DEVICE_METADATA": {"localhost": {"type": "BackEndLeafRouter"}}} + argument = ['-m', self.t0_minigraph, '-p', self.t0_port_config, '-a', json.dumps(extra_data), '-t', ipinip_file] + self.run_script(argument, output_file=self.output_file) + + sample_output_file = os.path.join(self.test_dir, 'sample_output', utils.PYvX_DIR, 'ipinip_backend_no_storage.json') + assert utils.cmp(sample_output_file, self.output_file), self.run_diff(sample_output_file, self.output_file) + + def test_ipinip_backend_spine_mellanox_no_storage(self): + # Mellanox BackEndSpineRouter without storage_device - guard should fire (empty output). + ipinip_file = os.path.join(self.test_dir, '..', '..', '..', 'dockers', 'docker-orchagent', 'ipinip.json.j2') + extra_data = {"ASIC_VENDOR": "mellanox", "DEVICE_METADATA": {"localhost": {"type": "BackEndSpineRouter"}}} + argument = ['-m', self.t0_minigraph, '-p', self.t0_port_config, '-a', json.dumps(extra_data), '-t', ipinip_file] + self.run_script(argument, output_file=self.output_file) + + sample_output_file = os.path.join(self.test_dir, 'sample_output', utils.PYvX_DIR, 'ipinip_backend_no_storage.json') + assert utils.cmp(sample_output_file, self.output_file), self.run_diff(sample_output_file, self.output_file) + def test_l2switch_template(self): argument = ['-k', 'Mellanox-SN2700', '--preset', 'l2', '-p', self.t0_port_config] output = self.run_script(argument) @@ -749,6 +829,39 @@ def test_buffers_lt2_ft2_render_template(self): minigraph=test_data[3], buffer_template=test_data[4], expected=test_data[5]) + + def test_buffers_frh_render_template(self): + if utils.PYvX_DIR != 'py3': + return + + self._test_buffers_render_template(vendor='arista', + platform='x86_64-arista_7060x6_64pe_b', + sku='Arista-7060X6-64PE-B-O128', + minigraph='sample-frh-b-o128-minigraph.xml', + buffer_template='buffers.json.j2', + expected='buffer-frh-b-o128.json') + + def test_buffers_urh_render_template(self): + if utils.PYvX_DIR != 'py3': + return + + self._test_buffers_render_template(vendor='nexthop', + platform='x86_64-nexthop_5010-r0', + sku='NH-5010-F-O64', + minigraph='sample-urh-nh5010-minigraph.xml', + buffer_template='buffers.json.j2', + expected='buffer-urh-nh5010.json') + + def test_buffers_lrh_render_template(self): + if utils.PYvX_DIR != 'py3': + return + + self._test_buffers_render_template(vendor='nexthop', + platform='x86_64-nexthop_5010-r0', + sku='NH-5010-F-O64', + minigraph='sample-lrh-nh5010-minigraph.xml', + buffer_template='buffers.json.j2', + expected='buffer-lrh-nh5010.json') def test_ipinip_multi_asic(self): ipinip_file = os.path.join(self.test_dir, '..', '..', '..', 'dockers', 'docker-orchagent', 'ipinip.json.j2') @@ -764,8 +877,7 @@ def test_swss_switch_render_template(self): 'switch.json.j2' ) constants_yml = os.path.join( - self.test_dir, '..', '..', '..', 'files', 'image_config', - 'constants', 'constants.yml' + self.test_dir, 'data', 'constants.yml' ) test_list = { "t1": { @@ -794,8 +906,7 @@ def test_swss_switch_render_template_multi_asic(self): 'switch.json.j2' ) constants_yml = os.path.join( - self.test_dir, '..', '..', '..', 'files', 'image_config', - 'constants', 'constants.yml' + self.test_dir, 'data', 'constants.yml' ) test_list = { "0": { @@ -824,8 +935,7 @@ def test_swss_switch_render_template_t2(self): 'switch.json.j2' ) constants_yml = os.path.join( - self.test_dir, '..', '..', '..', 'files', 'image_config', - 'constants', 'constants.yml' + self.test_dir, 'data', 'constants.yml' ) test_list = { "0": { @@ -944,10 +1054,6 @@ def test_buffers_edgezone_aggregator_render_template(self): self._test_buffers_render_template('arista', 'x86_64-arista_7060_cx32s', 'Arista-7060CX-32S-D48C8', 'sample-arista-7060-t0-minigraph.xml', 'buffers.json.j2', 'buffer-arista7060-t0.json') def test_rsyslog_conf(self): - if utils.PYvX_DIR != 'py3': - # Skip on python2 as the change will not be backported to previous version - return - conf_template = os.path.join(self.test_dir, '..', '..', '..', 'files', 'image_config', 'rsyslog', 'rsyslog.conf.j2') config_db_json = os.path.join(self.test_dir, "data", "rsyslog", "config_db.json") @@ -959,14 +1065,10 @@ def test_rsyslog_conf(self): pattern = r'^action.*Device="eth0".*' for line in file: assert not bool(re.match(pattern, line.strip())), "eth0 is not allowed in Mgfx device" - self.assertTrue(utils.cmp(os.path.join(self.test_dir, 'sample_output', utils.PYvX_DIR, 'rsyslog.conf'), - self.output_file)) + expected = os.path.join(self.test_dir, 'sample_output', utils.PYvX_DIR, 'rsyslog.conf') + self.assertTrue(utils.cmp(expected, self.output_file), self.run_diff(expected, self.output_file)) def test_rsyslog_conf_docker0_ip(self): - if utils.PYvX_DIR != 'py3': - # Skip on python2 as the change will not be backported to previous version - return - conf_template = os.path.join(self.test_dir, '..', '..', '..', 'files', 'image_config', 'rsyslog', 'rsyslog.conf.j2') config_db_json = os.path.join(self.test_dir, "data", "rsyslog", "config_db.json") @@ -975,8 +1077,20 @@ def test_rsyslog_conf_docker0_ip(self): argument = ['-j', config_db_json, '-t', conf_template, '-a', additional_data] self.run_script(argument, output_file=self.output_file) - self.assertTrue(utils.cmp(os.path.join(self.test_dir, 'sample_output', utils.PYvX_DIR, - 'rsyslog_with_docker0.conf'), self.output_file)) + expected = os.path.join(self.test_dir, 'sample_output', utils.PYvX_DIR, 'rsyslog_with_docker0.conf') + self.assertTrue(utils.cmp(expected, self.output_file), self.run_diff(expected, self.output_file)) + + def test_rsyslog_conf_same_ip(self): + conf_template = os.path.join(self.test_dir, '..', '..', '..', 'files', 'image_config', 'rsyslog', + 'rsyslog.conf.j2') + config_db_json = os.path.join(self.test_dir, "data", "rsyslog", "config_db.json") + additional_data = "{\"udp_server_ip\": \"2.2.2.2\", \"hostname\": \"kvm-host\", " + \ + "\"docker0_ip\": \"2.2.2.2\"}" + + argument = ['-j', config_db_json, '-t', conf_template, '-a', additional_data] + self.run_script(argument, output_file=self.output_file) + expected = os.path.join(self.test_dir, 'sample_output', utils.PYvX_DIR, 'rsyslog_same_ip.conf') + self.assertTrue(utils.cmp(expected, self.output_file), self.run_diff(expected, self.output_file)) def tearDown(self): os.environ["CFGGEN_UNIT_TESTING"] = "" diff --git a/src/sonic-config-engine/tests/test_j2files_t2_chassis_fe.py b/src/sonic-config-engine/tests/test_j2files_t2_chassis_fe.py index b23bb93ddd8..213823e7c18 100644 --- a/src/sonic-config-engine/tests/test_j2files_t2_chassis_fe.py +++ b/src/sonic-config-engine/tests/test_j2files_t2_chassis_fe.py @@ -43,7 +43,7 @@ def run_diff(self, file1, file2): def run_case(self, minigraph, template, target): template_dir = os.path.join(self.test_dir, '..', '..', '..', 'dockers', 'docker-fpm-frr', "frr") conf_template = os.path.join(template_dir, template) - constants = os.path.join(self.test_dir, '..', '..', '..', 'files', 'image_config', 'constants', 'constants.yml') + constants = os.path.join(self.test_dir, 'data', 'constants.yml') cmd = ["-m", minigraph, "-p", self.t2_chassis_fe_port_config, "-y", constants, "-t", conf_template, "-T", template_dir] self.run_script(cmd, output_file=self.output_file) diff --git a/src/sonic-config-engine/tests/test_minigraph_case.py b/src/sonic-config-engine/tests/test_minigraph_case.py index 9e19fbdaeaf..a98216ef240 100644 --- a/src/sonic-config-engine/tests/test_minigraph_case.py +++ b/src/sonic-config-engine/tests/test_minigraph_case.py @@ -23,6 +23,8 @@ def setUp(self): self.sample_subintf_graph = os.path.join(self.test_dir, 'sample-graph-subintf.xml') self.sample_simple_device_desc = os.path.join(self.test_dir, 'simple-sample-device-desc.xml') self.sample_simple_device_desc_ipv6_only = os.path.join(self.test_dir, 'simple-sample-device-desc-ipv6-only.xml') + self.sample_supervisor_device_desc = os.path.join(self.test_dir, 'simple-sample-device-desc-supervisor.xml') + self.sample_linecard_device_desc = os.path.join(self.test_dir, 'simple-sample-device-desc-linecard.xml') self.port_config = os.path.join(self.test_dir, 't0-sample-port-config.ini') def run_script(self, argument, check_stderr=False): @@ -557,6 +559,19 @@ def test_parse_device_desc_xml_mgmt_interface(self): self.assertTrue(('eth0', 'FC00:1::32/64') in mgmt_intf.keys()) self.assertTrue(ipaddress.ip_address(u'fc00:1::1') == mgmt_intf[('eth0', 'FC00:1::32/64')]['gwaddr']) + def test_parse_device_desc_xml_device_type(self): + # Regular device type is passed through as-is + result = minigraph.parse_device_desc_xml(self.sample_simple_device_desc) + self.assertEqual(result['DEVICE_METADATA']['localhost']['type'], 'ToRRouter') + + # Supervisor ElementType is mapped to SpineRouter + result = minigraph.parse_device_desc_xml(self.sample_supervisor_device_desc) + self.assertEqual(result['DEVICE_METADATA']['localhost']['type'], 'SpineRouter') + + # Linecard ElementType is mapped to SpineRouter + result = minigraph.parse_device_desc_xml(self.sample_linecard_device_desc) + self.assertEqual(result['DEVICE_METADATA']['localhost']['type'], 'SpineRouter') + def test_mgmt_device_disable_counters(self): expected_mgmt_disabled_counters = ["BUFFER_POOL_WATERMARK", "PFCWD", "PG_DROP", "PG_WATERMARK", "PORT_BUFFER_DROP", "QUEUE", "QUEUE_WATERMARK"] expected_mgmt_enabled_counters = ["ACL", "PORT", "RIF"] @@ -575,3 +590,25 @@ def test_mgmt_device_disable_counters(self): # TC2: For other minigraph, result should not contain FLEX_COUNTER_TABLE result = minigraph.parse_xml(self.sample_graph, port_config_file=self.port_config) self.assertNotIn('FLEX_COUNTER_TABLE', result) + + def test_multi_peer_switch_no_crash(self): + """Regression test: multiple peer switches should not crash (Python 3 dict.keys()[0] fix).""" + # Simulate link_metadata with two different PeerSwitch values + link_metadata = { + "Ethernet4": {"PeerSwitch": "switch2-t0"}, + "Ethernet8": {"PeerSwitch": "switch3-t0"}, + } + devices = { + "switch2-t0": {"lo_addr": "25.1.1.10/32"}, + "switch3-t0": {"lo_addr": "25.1.1.11/32"}, + } + peer_switch_table, mux_tunnel_name, peer_switch_ip = minigraph.get_peer_switch_info(link_metadata, devices) + + # Should have 2 entries + self.assertEqual(len(peer_switch_table), 2) + self.assertIn("switch2-t0", peer_switch_table) + self.assertIn("switch3-t0", peer_switch_table) + + # The code picks the first key — just verify it doesn't crash + first_peer = next(iter(peer_switch_table)) + self.assertIn(first_peer, ["switch2-t0", "switch3-t0"]) diff --git a/src/sonic-config-engine/tests/test_multinpu_cfggen.py b/src/sonic-config-engine/tests/test_multinpu_cfggen.py index 5f7646f48f1..c1303c7ace8 100644 --- a/src/sonic-config-engine/tests/test_multinpu_cfggen.py +++ b/src/sonic-config-engine/tests/test_multinpu_cfggen.py @@ -72,7 +72,7 @@ def run_diff(self, file1, file2): def run_frr_asic_case(self, template, target, asic, port_config): template_dir = os.path.join(self.test_dir, '..', '..', '..', 'dockers', 'docker-fpm-frr', "frr") conf_template = os.path.join(template_dir, template) - constants = os.path.join(self.test_dir, '..', '..', '..', 'files', 'image_config', 'constants', 'constants.yml') + constants = os.path.join(self.test_dir, 'data', 'constants.yml') cmd = ['-n', asic, '-m', self.sample_graph, '-p', port_config, '-y', constants, '-t', conf_template, '-T', template_dir] self.run_script(cmd, output_file=self.output_file) diff --git a/src/sonic-containercfgd/containercfgd/containercfgd.py b/src/sonic-containercfgd/containercfgd/containercfgd.py index 9569e4b8fb8..0e31f653169 100644 --- a/src/sonic-containercfgd/containercfgd/containercfgd.py +++ b/src/sonic-containercfgd/containercfgd/containercfgd.py @@ -103,8 +103,8 @@ class SyslogHandler: TMP_SYSLOG_CONF_PATH = '/tmp/rsyslog.conf' # Regular expressions to extract value from rsyslog.conf - INTERVAL_PATTERN = '.*SystemLogRateLimitInterval\s+(\d+).*' - BURST_PATTERN = '.*SystemLogRateLimitBurst\s+(\d+).*' + INTERVAL_PATTERN = r'.*SysSock.RateLimit.Interval="(\d+)".*' + BURST_PATTERN = r'.*SysSock.RateLimit.Burst="(\d+)".*' def __init__(self): self.current_interval, self.current_burst = self.parse_syslog_conf() diff --git a/src/sonic-containercfgd/tests/mock_rsyslog.conf b/src/sonic-containercfgd/tests/mock_rsyslog.conf index 68e917b9344..7e196681ea3 100644 --- a/src/sonic-containercfgd/tests/mock_rsyslog.conf +++ b/src/sonic-containercfgd/tests/mock_rsyslog.conf @@ -1,23 +1,23 @@ -$ModLoad imuxsock # provides support for local system logging - # # Set a rate limit on messages from the container # -$SystemLogRateLimitInterval 50 -$SystemLogRateLimitBurst 10002 - -#$ModLoad imklog # provides kernel logging support -#$ModLoad immark # provides --MARK-- message capability +module(load="imuxsock" SysSock.RateLimit.Interval="50" SysSock.RateLimit.Burst="10002") # provides support for local system logging +#module(load="imklog" ParseKernelTimestamp="off" KeepKernelTimestamp="on") # provides kernel logging support +#module(load="immark") # provides --MARK-- message capability # provides UDP syslog reception -#$ModLoad imudp -#$UDPServerRun 514 +#module(load="imudp") +#input(type="imudp" port="514") # provides TCP syslog reception -#$ModLoad imtcp -#$InputTCPServerRun 514 +#module(load="imtcp") +#input(type="imtcp" port="514") + +# provides RELP syslog reception +#module(load="imrelp") +#input(type="imrelp" address="1.1.1.1" port="2514") ########################### @@ -26,4 +26,4 @@ $SystemLogRateLimitBurst 10002 # Set remote syslog server template (name="ForwardFormatInContainer" type="string" string="<%PRI%>%TIMESTAMP:::date-rfc3339% %HOSTNAME% pmon#%syslogtag%%msg:::sp-if-no-1st-sp%%msg%") -*.* action(type="omfwd" target="127.0.0.1" port="514" protocol="udp" Template="ForwardFormatInContainer") +*.* action(type="omrelp" target="127.0.0.1" port="2514" action.resumeRetryCount="60" queue.type="LinkedList" queue.size="20000" Template="ForwardFormatInContainer") diff --git a/src/sonic-ctrmgrd-rs/Cargo.lock b/src/sonic-ctrmgrd-rs/Cargo.lock index 3faf27b8d24..4543428e23f 100644 --- a/src/sonic-ctrmgrd-rs/Cargo.lock +++ b/src/sonic-ctrmgrd-rs/Cargo.lock @@ -421,6 +421,7 @@ dependencies = [ "mockall", "serial_test", "sonic-rs-common", + "swss-common", "syslog-tracing", "thiserror", "tokio", diff --git a/src/sonic-ctrmgrd-rs/crates/docker-wait-any-rs/Cargo.toml b/src/sonic-ctrmgrd-rs/crates/docker-wait-any-rs/Cargo.toml index 6a8d7dcb071..ae4d84b0dd7 100644 --- a/src/sonic-ctrmgrd-rs/crates/docker-wait-any-rs/Cargo.toml +++ b/src/sonic-ctrmgrd-rs/crates/docker-wait-any-rs/Cargo.toml @@ -23,6 +23,8 @@ tracing = { workspace = true } tracing-subscriber = { workspace = true } syslog-tracing = { workspace = true } sonic-rs-common = { path = "../../../sonic-rs-common" } +swss-common = { path = "../../../sonic-swss-common/crates/swss-common" } + [dev-dependencies] serial_test = "1.0.0" diff --git a/src/sonic-ctrmgrd-rs/crates/docker-wait-any-rs/src/lib.rs b/src/sonic-ctrmgrd-rs/crates/docker-wait-any-rs/src/lib.rs index ec205c4ece2..5de8f218da5 100644 --- a/src/sonic-ctrmgrd-rs/crates/docker-wait-any-rs/src/lib.rs +++ b/src/sonic-ctrmgrd-rs/crates/docker-wait-any-rs/src/lib.rs @@ -21,6 +21,8 @@ pub enum Error { DeviceInfo(#[from] sonic_rs_common::device_info::DeviceInfoError), #[error("Syslog initialization error: {0}")] Syslog(String), + #[error("SWSS common error")] + SwssError(#[from] swss_common::Exception), } pub trait DockerApi: Send + Sync { @@ -86,7 +88,8 @@ pub async fn wait_for_container( info!("No longer waiting on container '{}'", container_name); if dependent_services.contains(&container_name) { - let warm_restart = device_info::is_warm_restart_enabled(&container_name)?; + let (service_name, namespace) = parse_container_name(&container_name); + let warm_restart = device_info::is_warm_restart_enabled_in_namespace(service_name, &namespace)?; let fast_reboot = device_info::is_fast_reboot_enabled()?; if warm_restart || fast_reboot { @@ -99,6 +102,18 @@ pub async fn wait_for_container( } } +fn parse_container_name(container_name: &str) -> (&str, String) { + match container_name.find(|c: char| c.is_digit(10)) { + Some(index) => { + let (service_name, namespace) = container_name.split_at(index); + (service_name, format!("asic{}", namespace)) + } + None => { + (container_name, "".to_string()) + } + } +} + pub async fn run_main( docker_client: Arc, service: Option>, diff --git a/src/sonic-ctrmgrd-rs/crates/docker-wait-any-rs/src/main.rs b/src/sonic-ctrmgrd-rs/crates/docker-wait-any-rs/src/main.rs index ae16dea9b00..f37d3f60c14 100644 --- a/src/sonic-ctrmgrd-rs/crates/docker-wait-any-rs/src/main.rs +++ b/src/sonic-ctrmgrd-rs/crates/docker-wait-any-rs/src/main.rs @@ -22,7 +22,7 @@ struct Cli { service: Option>, #[arg( - short = 'd', + short = 'd', long = "dependent", num_args = 0.., help = "other dependent services" @@ -33,6 +33,10 @@ struct Cli { #[tokio::main] async fn main() -> Result<(), Error> { + const DEFAULT_DATABASE_GLOBAL_CONFIG_PATH: &'static str = "/var/run/redis/sonic-db/database_global.json"; + if std::path::Path::new(DEFAULT_DATABASE_GLOBAL_CONFIG_PATH).exists() { + swss_common::sonic_db_config_initialize_global(DEFAULT_DATABASE_GLOBAL_CONFIG_PATH, true)?; + } let identity = CString::new("docker-wait-any-rs") .map_err(|e| Error::Syslog(format!("invalid identity string: {}", e)))?; let syslog = syslog_tracing::Syslog::new( diff --git a/src/sonic-ctrmgrd-rs/crates/docker-wait-any-rs/tests/docker_wait_any_test.rs b/src/sonic-ctrmgrd-rs/crates/docker-wait-any-rs/tests/docker_wait_any_test.rs index cf955cfdbec..4a3919d4a59 100644 --- a/src/sonic-ctrmgrd-rs/crates/docker-wait-any-rs/tests/docker_wait_any_test.rs +++ b/src/sonic-ctrmgrd-rs/crates/docker-wait-any-rs/tests/docker_wait_any_test.rs @@ -151,9 +151,71 @@ async fn test_teamd_exits_warm_restart_main_will_not_exit() { // Mock warm restart enabled using injectorpp - keep injector alive for entire test let mut injector = InjectorPP::new(); injector - .when_called(func!(sonic_rs_common::device_info::is_warm_restart_enabled, fn(&str) -> Result)) + .when_called(func!(sonic_rs_common::device_info::is_warm_restart_enabled_in_namespace, fn(&str, &str) -> Result)) .will_execute(fake!( - func_type: fn(container_name: &str) -> Result, + func_type: fn(container_name: &str, namespace: &str) -> Result, + returns: Ok(true) + )); + injector + .when_called(func!(sonic_rs_common::device_info::is_fast_reboot_enabled, fn() -> Result)) + .will_execute(fake!( + func_type: fn() -> Result, + returns: Ok(false) + )); + + // Test run_main - should timeout because warm restart is enabled and main will not exit + let result = timeout( + Duration::from_secs(3), + run_main(Arc::new(mock_docker), Some(services), Some(dependents)) + ) + .await; + + // Should timeout because warm restart is enabled and dependent service teamd exits but main continues + assert!(result.is_err(), "run_main should timeout when warm restart is enabled and teamd exits"); +} + +#[tokio::test] +#[serial] +async fn test_teamd_exits_warm_restart_main_will_not_exit_mutli_asic() { + + let services = vec!["swss1".to_string()]; + let dependents = vec!["syncd1".to_string(), "teamd1".to_string()]; + + let mut mock_docker = MockDockerApi::new(); + + // teamd exits (simulates container exit, warm restart will cause it to be called again) + mock_docker + .expect_wait_container() + .with(eq("teamd1".to_string()), always()) + .returning(|_, _| { + Box::pin(futures_util::stream::iter(vec![Ok( + bollard::models::ContainerWaitResponse { + status_code: 0, + error: None, + } + )]).then(|item| async move { + // Add context switch to allow timeout to work + tokio::task::yield_now().await; + item + })) + }); + + mock_docker + .expect_wait_container() + .with(eq("swss1".to_string()), always()) + .returning(|_, _| Box::pin(stream::pending())); + + mock_docker + .expect_wait_container() + .with(eq("syncd1".to_string()), always()) + .returning(|_, _| Box::pin(stream::pending())); + + // Mock warm restart enabled using injectorpp - keep injector alive for entire test + let mut injector = InjectorPP::new(); + injector + .when_called(func!(sonic_rs_common::device_info::is_warm_restart_enabled_in_namespace, fn(&str, &str) -> Result)) + .will_execute(fake!( + func_type: fn(container_name: &str, namespace: &str) -> Result, returns: Ok(true) )); injector diff --git a/src/sonic-ctrmgrd/ctrmgr/container_startup.py b/src/sonic-ctrmgrd/ctrmgr/container_startup.py index 7e1df7ac876..0f58b642f47 100755 --- a/src/sonic-ctrmgrd/ctrmgr/container_startup.py +++ b/src/sonic-ctrmgrd/ctrmgr/container_startup.py @@ -173,7 +173,6 @@ def update_state(state_db, feature, owner=None, version=None): CURRENT_OWNER: owner, DOCKER_ID: get_docker_id() if owner != "local" else feature, UPD_TIMESTAMP: str(datetime.datetime.now().strftime("%Y-%m-%d %H:%M:%S")), - "hello": "world", VERSION: version } diff --git a/src/sonic-ctrmgrd/ctrmgr/kube_commands.py b/src/sonic-ctrmgrd/ctrmgr/kube_commands.py index fd63f2cb12b..ff28db221c3 100755 --- a/src/sonic-ctrmgrd/ctrmgr/kube_commands.py +++ b/src/sonic-ctrmgrd/ctrmgr/kube_commands.py @@ -82,6 +82,34 @@ def _run_command(cmd, timeout=5): return (ret, output.strip(), err.strip()) +def _run_command_list(cmd, timeout=5): + """ Run command as a list with shell=False to avoid shell metacharacter injection. + Use this for commands assembled from untrusted input (e.g. CONFIG_DB/STATE_DB values). + cmd must be a list. + """ + ret = 0 + try: + proc = subprocess.Popen(cmd, shell=False, stdout=subprocess.PIPE, + stderr=subprocess.PIPE) + (o, e) = proc.communicate(timeout) + output = to_str(o) + err = to_str(e) + ret = proc.returncode + except subprocess.TimeoutExpired as error: + proc.kill() + output = "" + err = str(error) + ret = -1 + + log_debug("cmd:{}\nret={}".format(cmd, ret)) + if output: + log_debug("out:{}".format(output)) + if err: + log_debug("err:{}".format(err)) + + return (ret, output.strip(), err.strip()) + + def kube_read_labels(): """ Read current labels on node and return as dict. """ KUBECTL_GET_CMD = "kubectl --kubeconfig {} get nodes {} --show-labels --no-headers |tr -s ' ' | cut -f6 -d' '" @@ -95,7 +123,8 @@ def kube_read_labels(): for label in lst: tmp = label.split("=") - labels[tmp[0]] = tmp[1] + if len(tmp) == 2: + labels[tmp[0]] = tmp[1] # log_debug("{} kube labels {} ret={}".format( # "Applied" if ret == 0 else "Failed to apply", @@ -107,7 +136,8 @@ def kube_read_labels(): def kube_write_labels(set_labels): """ Set given set_labels. """ - KUBECTL_SET_CMD = "kubectl --kubeconfig {} label --overwrite nodes {} {}" + KUBECTL_SET_BASE = ["kubectl", "--kubeconfig", KUBE_ADMIN_CONF, + "label", "--overwrite", "nodes", get_device_name()] ret, node_labels = kube_read_labels() if ret != 0: @@ -115,33 +145,30 @@ def kube_write_labels(set_labels): format(str(set_labels))) return ret - del_label_str = "" - add_label_str = "" + del_label_args = [] + add_label_args = [] for (name, val) in set_labels.items(): skip = False if name in node_labels: if val != node_labels[name]: # label value can't be modified. Remove it first # and then add - del_label_str += "{}- ".format(name) + del_label_args.append("{}-".format(name)) else: # Already exists with same value. skip = True if not skip: # Add label - add_label_str += "{}={} ".format(name, val) + add_label_args.append("{}={}".format(name, val)) - - if add_label_str: + if add_label_args: # First remove if any - if del_label_str: - (ret, _, _) = _run_command(KUBECTL_SET_CMD.format( - KUBE_ADMIN_CONF, get_device_name(), del_label_str.strip())) - (ret, _, _) = _run_command(KUBECTL_SET_CMD.format( - KUBE_ADMIN_CONF, get_device_name(), add_label_str.strip())) + if del_label_args: + (ret, _, _) = _run_command_list(KUBECTL_SET_BASE + del_label_args) + (ret, _, _) = _run_command_list(KUBECTL_SET_BASE + add_label_args) log_debug("{} kube labels {} ret={}".format( - "Applied" if ret == 0 else "Failed to apply", add_label_str, ret)) + "Applied" if ret == 0 else "Failed to apply", add_label_args, ret)) else: log_debug("Given labels are in sync with node labels. Hence no-op") @@ -197,26 +224,6 @@ def _take_lock(): return lock_fd -def _download_file(server, port, insecure): - """ Download file from Kube master to assist join as node. """ - - if insecure: - r = urllib.request.urlopen(SERVER_ADMIN_URL.format(server), - context=ssl._create_unverified_context()) - else: - r = urllib.request.urlopen(SERVER_ADMIN_URL.format(server)) - - (h, fname) = tempfile.mkstemp(suffix="_kube_join") - data = r.read() - os.write(h, data) - os.close(h) - log_debug("Downloaded = {}".format(fname)) - - shutil.copyfile(fname, KUBE_ADMIN_CONF) - - log_debug("{} downloaded".format(KUBE_ADMIN_CONF)) - - def _gen_cli_kubeconf(server, port, insecure): """generate identity which can help authenticate and authorization to k8s cluster @@ -416,30 +423,41 @@ def _do_tag(docker_id, image_ver): err = "" out = "" ret = 1 - status, _, err = _run_command("docker ps |grep {}".format(docker_id)) + status, ps_out, err = _run_command_list(["docker", "ps"]) if status == 0: - _, image_item, err = _run_command("docker inspect {} |jq -r .[].Image".format(docker_id)) - if image_item: - image_id = image_item.split(":")[1][:12] - _, image_info, err = _run_command("docker images |grep {}".format(image_id)) - if image_info: - # Only need the docker repo name without acr domain - image_rep = image_info.split()[0].split("/")[-1] - tag_res, _, err = _run_command("docker tag {} {}:latest".format(image_id, image_rep)) - if tag_res == 0: - out = "docker tag {} {}:latest successfully".format(image_id, image_rep) - ret = 0 + if docker_id not in ps_out: + out = "New version {} is not running.".format(image_ver) + ret = -1 + return (ret, out, err) + insp_ret, insp_out, err = _run_command_list(["docker", "inspect", docker_id]) + if insp_ret == 0 and insp_out: + try: + insp_data = json.loads(insp_out) + image_full = insp_data[0]["Image"] + image_id = image_full.split(":")[1][:12] if ":" in image_full else image_full[:12] + except (ValueError, KeyError, IndexError) as e: + err = "Failed to parse docker inspect output for {}: {}".format(docker_id, str(e)) + return (ret, out, err) + img_ret, img_out, err = _run_command_list(["docker", "images"]) + if img_ret == 0 and img_out: + image_info = next((line for line in img_out.splitlines() if image_id in line), None) + if image_info: + # Only need the docker repo name without acr domain + image_rep = image_info.split()[0].split("/")[-1] + tag_res, _, err = _run_command_list(["docker", "tag", image_id, "{}:latest".format(image_rep)]) + if tag_res == 0: + out = "docker tag {} {}:latest successfully".format(image_id, image_rep) + ret = 0 + else: + err = "Failed to tag {}:{} to latest. Err: {}".format(image_rep, image_ver, err) else: - err = "Failed to tag {}:{} to latest. Err: {}".format(image_rep, image_ver, err) + err = "Failed to find image {} in docker images output".format(image_id) else: - err = "Failed to docker images |grep {} to get image repo. Err: {}".format(image_id, err) + err = "Failed to run docker images. Err: {}".format(err) else: - err = "Failed to inspect container:{} to get image id. Err: {}".format(docker_id, err) - elif err: - err = "Error happens when execute docker ps |grep {}. Err: {}".format(docker_id, err) + err = "Failed to inspect container: {}. Err: {}".format(docker_id, err) else: - out = "New version {} is not running.".format(image_ver) - ret = -1 + err = "Failed to run docker ps. Err: {}".format(err) return (ret, out, err) @@ -447,23 +465,29 @@ def _remove_container(feat): err = "" out = "" ret = 0 - _, feat_status, err = _run_command("docker inspect {} |jq -r .[].State.Running".format(feat)) - if feat_status: - if feat_status == 'true': + insp_ret, insp_out, insp_err = _run_command_list(["docker", "inspect", feat]) + if insp_ret == 0 and insp_out: + try: + insp_data = json.loads(insp_out) + feat_running = insp_data[0]["State"]["Running"] + except (ValueError, KeyError, IndexError) as e: + err = "Failed to parse docker inspect output for {}: {}".format(feat, str(e)) + ret = 1 + return (ret, out, err) + if feat_running: err = "Feature {} container is running, it's unexpected".format(feat) ret = 1 else: - rm_res, _, err = _run_command("docker rm {}".format(feat)) + rm_res, _, err = _run_command_list(["docker", "rm", feat]) if rm_res == 0: out = "Remove origin local {} container successfully".format(feat) else: err = "Failed to docker rm {}. Err: {}".format(feat, err) ret = 1 - elif err.startswith("Error: No such object"): + elif insp_err.startswith("Error: No such object"): out = "Origin local {} container has been removed before".format(feat) - err = "" else: - err = "Failed to docker inspect {} |jq -r .[].State.Running. Err: {}".format(feat, err) + err = "Failed to docker inspect {}. Err: {}".format(feat, insp_err) ret = 1 return (ret, out, err) diff --git a/src/sonic-ctrmgrd/tests/common_test.py b/src/sonic-ctrmgrd/tests/common_test.py index 2ce596e669d..1aa7fb3ec10 100755 --- a/src/sonic-ctrmgrd/tests/common_test.py +++ b/src/sonic-ctrmgrd/tests/common_test.py @@ -576,6 +576,9 @@ def set_mock_image_op(clean_image, tag_latest): def str_comp(needle, hay): + if isinstance(needle, list) and isinstance(hay, list): + return needle == hay + nlen = len(needle) hlen = len(hay) @@ -671,7 +674,7 @@ def mock_procs_init(): def mock_subproc_side_effect(cmd, shell=False, stdout=None, stderr=None): global procs_index - assert shell == True + assert shell == isinstance(cmd, str) assert stdout == subprocess.PIPE assert stderr == subprocess.PIPE index = procs_index diff --git a/src/sonic-ctrmgrd/tests/ctrmgr_iptables_test.py b/src/sonic-ctrmgrd/tests/ctrmgr_iptables_test.py index 028c5854643..2192780bca7 100755 --- a/src/sonic-ctrmgrd/tests/ctrmgr_iptables_test.py +++ b/src/sonic-ctrmgrd/tests/ctrmgr_iptables_test.py @@ -13,6 +13,22 @@ PROXY_FILE="http_proxy.conf" +# Deterministic DNS results for tests. Real socket.gethostbyname is +# environment-dependent (DNS hijacking, air-gapped build containers, etc.) +# and causes intermittent failures. See #23432. +import socket + +_DNS_MAP = { + "www.google.com": "142.250.80.4", # any plausible IP is fine +} + + +def _mock_gethostbyname(hostname): + """Return a deterministic IP for known test hostnames, raise for others.""" + if hostname in _DNS_MAP: + return _DNS_MAP[hostname] + raise socket.gaierror(f"[mock] Name does not resolve: {hostname}") + test_data = { "1": { "ip": "10.10.20.20", @@ -54,11 +70,12 @@ ], "post_rules": [ "DNAT tcp -- 20.20.0.0/0 172.16.1.1 tcp dpt:8080 to:100.127.20.21:8080", - "DNAT tcp -- 0.0.0.0/0 172.16.1.1 tcp dpt:3128 to:.*3128" - ] + "DNAT tcp -- 0.0.0.0/0 172.16.1.1 tcp dpt:3128 to:142.250.80.4:3128" + ], + "ret": "142.250.80.4:3128" }, "4": { - "ip": "www.google.comx", + "ip": "host.invalid", "port": "3128", "pre_rules": [ "DNAT tcp -- 20.20.0.0/0 172.16.1.1 tcp dpt:8080 to:100.127.20.21:8080", @@ -71,7 +88,7 @@ "ret": "" }, "5": { - "ip": "www.google.comx", + "ip": "host.invalid", "port": "3128", "conf_file": "no_proxy.conf", "pre_rules": [ @@ -152,8 +169,9 @@ def match_rules(pattern_list, str_list): class TestIPTableUpdate(object): + @patch("ctrmgr_iptables.socket.gethostbyname", side_effect=_mock_gethostbyname) @patch("ctrmgr_iptables.subprocess.run") - def test_table(self, mock_proc): + def test_table(self, mock_proc, mock_dns): global current_rules, current_tc mock_proc.side_effect = mock_subproc_run diff --git a/src/sonic-ctrmgrd/tests/ctrmgrd_test.py b/src/sonic-ctrmgrd/tests/ctrmgrd_test.py index df7e2729d56..4a4ab6ea428 100755 --- a/src/sonic-ctrmgrd/tests/ctrmgrd_test.py +++ b/src/sonic-ctrmgrd/tests/ctrmgrd_test.py @@ -401,7 +401,6 @@ common_test.KUBE_LABEL_TABLE: { "SET": { "foo": "bar", - "hello": "world" } } } @@ -411,7 +410,6 @@ "xyz": { "xxx": { "foo": "bar", - "hello": "world" } } } @@ -421,7 +419,6 @@ common_test.KUBE_LABEL_TABLE: { "SET": { "foo": "bar", - "hello": "world" } } } @@ -429,7 +426,6 @@ common_test.KUBE_CMD: { common_test.KUBE_WR: { "foo": "bar", - "hello": "world" } } }, @@ -442,7 +438,6 @@ common_test.KUBE_LABEL_TABLE: { "SET": { "foo": "bar", - "hello": "world" } } } @@ -452,7 +447,6 @@ common_test.KUBE_LABEL_TABLE: { "SET": { "foo": "bar", - "hello": "world" } } } @@ -468,7 +462,6 @@ common_test.KUBE_LABEL_TABLE: { "SET": { "foo": "bar", - "hello": "world" } } } @@ -478,7 +471,6 @@ common_test.KUBE_LABEL_TABLE: { "SET": { "foo": "bar", - "hello": "world" } } } @@ -486,7 +478,6 @@ common_test.KUBE_CMD: { common_test.KUBE_WR: { "foo": "bar", - "hello": "world" } } } diff --git a/src/sonic-ctrmgrd/tests/kube_commands_test.py b/src/sonic-ctrmgrd/tests/kube_commands_test.py index 4c0b3b24dc1..eec16d22e08 100755 --- a/src/sonic-ctrmgrd/tests/kube_commands_test.py +++ b/src/sonic-ctrmgrd/tests/kube_commands_test.py @@ -65,10 +65,8 @@ common_test.ARGS: { "foo": "bar", "hello": "World!", "test": "ok" }, common_test.PROC_CMD: [ "kubectl --kubeconfig {} get nodes none --show-labels --no-headers |tr -s ' ' | cut -f6 -d' '".format(KUBE_ADMIN_CONF), -"kubectl --kubeconfig {} label --overwrite nodes none hello-".format( - KUBE_ADMIN_CONF), -"kubectl --kubeconfig {} label --overwrite nodes none hello=World! test=ok".format( - KUBE_ADMIN_CONF) +["kubectl", "--kubeconfig", KUBE_ADMIN_CONF, "label", "--overwrite", "nodes", "none", "hello-"], +["kubectl", "--kubeconfig", KUBE_ADMIN_CONF, "label", "--overwrite", "nodes", "none", "hello=World!", "test=ok"] ], common_test.PROC_OUT: ["foo=bar,hello=world", "", ""] }, @@ -90,6 +88,16 @@ "kubectl --kubeconfig {} get nodes none --show-labels --no-headers |tr -s ' ' | cut -f6 -d' '".format(KUBE_ADMIN_CONF) ], common_test.PROC_ERR: ["read failed"] + }, + 3: { + common_test.DESCR: "write labels: injection attempt in name and value is not executed", + common_test.RETVAL: 0, + common_test.ARGS: { "foo; id>/tmp/pwned #": "bar; rm -rf / #" }, + common_test.PROC_CMD: [ +"kubectl --kubeconfig {} get nodes none --show-labels --no-headers |tr -s ' ' | cut -f6 -d' '".format(KUBE_ADMIN_CONF), +["kubectl", "--kubeconfig", KUBE_ADMIN_CONF, "label", "--overwrite", "nodes", "none", "foo; id>/tmp/pwned #=bar; rm -rf / #"] + ], + common_test.PROC_OUT: ["", ""] } } @@ -219,19 +227,19 @@ common_test.RETVAL: 0, common_test.ARGS: ["snmp", "123456", "v1"], common_test.PROC_CMD: [ - "docker ps |grep 123456", - "docker inspect 123456 |jq -r .[].Image", - "docker images |grep 5425bcbd23c5", - "docker tag 5425bcbd23c5 snmp:latest", - "docker inspect snmp |jq -r .[].State.Running", - "docker rm snmp" + ["docker", "ps"], + ["docker", "inspect", "123456"], + ["docker", "images"], + ["docker", "tag", "5425bcbd23c5", "snmp:latest"], + ["docker", "inspect", "snmp"], + ["docker", "rm", "snmp"] ], common_test.PROC_OUT: [ - "", - "sha256:5425bcbd23c54270d9de028c09634f8e9a014e9351387160c133ccf3a53ab3dc", + "abc 123456 snmp", + '[{"Image": "sha256:5425bcbd23c54270d9de028c09634f8e9a014e9351387160c133ccf3a53ab3dc"}]', "acr.io/snmp v1 5425bcbd23c5", "", - "false", + '[{"State": {"Running": false}}]', "" ] }, @@ -240,19 +248,17 @@ common_test.RETVAL: 0, common_test.ARGS: ["snmp", "123456", "v1"], common_test.PROC_CMD: [ - "docker ps |grep 123456", - "docker inspect 123456 |jq -r .[].Image", - "docker images |grep 5425bcbd23c5", - "docker tag 5425bcbd23c5 snmp:latest", - "docker inspect snmp |jq -r .[].State.Running", - "docker rm snmp" + ["docker", "ps"], + ["docker", "inspect", "123456"], + ["docker", "images"], + ["docker", "tag", "5425bcbd23c5", "snmp:latest"], + ["docker", "inspect", "snmp"] ], common_test.PROC_OUT: [ - "", - "sha256:5425bcbd23c54270d9de028c09634f8e9a014e9351387160c133ccf3a53ab3dc", + "abc 123456 snmp", + '[{"Image": "sha256:5425bcbd23c54270d9de028c09634f8e9a014e9351387160c133ccf3a53ab3dc"}]', "acr.io/snmp v1 5425bcbd23c5", "", - "", "" ], common_test.PROC_ERR: [ @@ -260,8 +266,7 @@ "", "", "", - "Error: No such object", - "" + "Error: No such object" ] }, 2: { @@ -269,10 +274,10 @@ common_test.RETVAL: -1, common_test.ARGS: ["snmp", "123456", "v1"], common_test.PROC_CMD: [ - "docker ps |grep 123456" + ["docker", "ps"] ], - common_test.PROC_CODE: [ - 1 + common_test.PROC_OUT: [ + "abc other_container" ] }, 3: { @@ -280,7 +285,7 @@ common_test.RETVAL: 1, common_test.ARGS: ["snmp", "123456", "v1"], common_test.PROC_CMD: [ - "docker ps |grep 123456" + ["docker", "ps"] ], common_test.PROC_ERR: [ "err" @@ -291,20 +296,18 @@ common_test.RETVAL: 1, common_test.ARGS: ["snmp", "123456", "v1"], common_test.PROC_CMD: [ - "docker ps |grep 123456", - "docker inspect 123456 |jq -r .[].Image", - "docker images |grep 5425bcbd23c5", - "docker tag 5425bcbd23c5 snmp:latest", - "docker inspect snmp |jq -r .[].State.Running", - "docker rm snmp" + ["docker", "ps"], + ["docker", "inspect", "123456"], + ["docker", "images"], + ["docker", "tag", "5425bcbd23c5", "snmp:latest"], + ["docker", "inspect", "snmp"] ], common_test.PROC_OUT: [ - "", - "sha256:5425bcbd23c54270d9de028c09634f8e9a014e9351387160c133ccf3a53ab3dc", + "abc 123456 snmp", + '[{"Image": "sha256:5425bcbd23c54270d9de028c09634f8e9a014e9351387160c133ccf3a53ab3dc"}]', "acr.io/snmp v1 5425bcbd23c5", "", - "true", - "" + '[{"State": {"Running": true}}]' ] } } diff --git a/src/sonic-dash-api b/src/sonic-dash-api index 4b78817b142..2ce7ce648ee 160000 --- a/src/sonic-dash-api +++ b/src/sonic-dash-api @@ -1 +1 @@ -Subproject commit 4b78817b1425117f4d8f4d71929c65129ac99d11 +Subproject commit 2ce7ce648ee77a76fcf567191eb4b9ed6cfeed38 diff --git a/src/sonic-dash-ha b/src/sonic-dash-ha index d01ed949d1c..5df5d644472 160000 --- a/src/sonic-dash-ha +++ b/src/sonic-dash-ha @@ -1 +1 @@ -Subproject commit d01ed949d1cd89d846deec20d474ccf59c6b81fb +Subproject commit 5df5d6444726cac0b636c0a0c375165013f50975 diff --git a/src/sonic-dbsyncd b/src/sonic-dbsyncd index 22335e06886..d030540bca6 160000 --- a/src/sonic-dbsyncd +++ b/src/sonic-dbsyncd @@ -1 +1 @@ -Subproject commit 22335e0688627429967d7c751c7ff8c9c6bb6d00 +Subproject commit d030540bca61cb32eda24699f6f83ece867860f8 diff --git a/src/sonic-device-data/Makefile b/src/sonic-device-data/Makefile index f2f8c0fcac4..c7d69893f87 100644 --- a/src/sonic-device-data/Makefile +++ b/src/sonic-device-data/Makefile @@ -27,101 +27,9 @@ $(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : done; \ fi; - # Create hwsku for virtual switch - for d in `find -L ../../../device -maxdepth 3 -mindepth 3 -type d | grep -vE "(plugins|led-code|sonic_platform)"`; do \ - # check if hwsku dir exists, if yes, then continue - if [ -d device/x86_64-kvm_x86_64-r0/$$(basename $$d) ]; then \ - cp ./sai.vs_profile device/x86_64-kvm_x86_64-r0/$$(basename $$d)/sai.profile; \ - cp ./sai_mlnx.vs_profile device/x86_64-kvm_x86_64-r0/$$(basename $$d)/sai_mlnx.profile; \ - cp ./sai_vpp.vs_profile device/x86_64-kvm_x86_64-r0/$$(basename $$d)/sai_vpp.profile; \ - cp ./pai.vs_profile device/x86_64-kvm_x86_64-r0/$$(basename $$d)/pai.profile; \ - cp ./fabriclanemap_vs.ini device/x86_64-kvm_x86_64-r0/$$(basename $$d)/fabriclanemap.ini; \ - continue; \ - fi; \ - cp -Lr $$d device/x86_64-kvm_x86_64-r0/ ; \ - if [ -f $$(dirname $$d)/asic.conf ]; then \ - cp $$(dirname $$d)/asic.conf device/x86_64-kvm_x86_64-r0/$$(basename $$d)/asic.conf; \ - fi; \ - cp ./sai.vs_profile device/x86_64-kvm_x86_64-r0/$$(basename $$d)/sai.profile; \ - cp ./sai_mlnx.vs_profile device/x86_64-kvm_x86_64-r0/$$(basename $$d)/sai_mlnx.profile; \ - cp ./sai_vpp.vs_profile device/x86_64-kvm_x86_64-r0/$$(basename $$d)/sai_vpp.profile; \ - cp ./pai.vs_profile device/x86_64-kvm_x86_64-r0/$$(basename $$d)/pai.profile; \ - cp ./fabriclanemap_vs.ini device/x86_64-kvm_x86_64-r0/$$(basename $$d)/fabriclanemap.ini; \ - if [ -f device/x86_64-kvm_x86_64-r0/$$(basename $$d)/port_config.ini ]; then \ - last_line=$$(tail -n 1 device/x86_64-kvm_x86_64-r0/$$(basename $$d)/port_config.ini); \ - num_columns=$$(echo $$last_line | awk '{print NF}'); \ - i=0; \ - if [ -f $$(dirname $$d)/chassisdb.conf ] && ! grep -q '^disaggregated_chassis=1' $$(dirname $$d)/platform_env.conf; then \ - echo "Reserve midplane interface for $$(dirname $$d)"; \ - i=$$(($$i+1)); \ - fi; \ - while IFS= read -r line || [ -n "$$line" ]; do \ - if ! grep -q "^#" <<< "$$line"; then \ - i=$$(($$i+1)); \ - lanes=$$(echo "$$line" | awk '{print $$2}'); \ - echo "eth$$i:$$lanes" >> device/x86_64-kvm_x86_64-r0/$$(basename $$d)/lanemap.ini; \ - if [ $$num_columns -ge 9 ]; then \ - core=$$(echo "$$line" | awk '{print $$8}'); \ - core_port=$$(echo "$$line" | awk '{print $$9}'); \ - echo "eth$$i:$$core,$$core_port" >> device/x86_64-kvm_x86_64-r0/$$(basename $$d)/coreportindexmap.ini; \ - fi; \ - fi; \ - done < device/x86_64-kvm_x86_64-r0/$$(basename $$d)/port_config.ini; \ - fi; \ - if [ -f device/x86_64-kvm_x86_64-r0/$$(basename $$d)/context_config.json ]; then \ - rm device/x86_64-kvm_x86_64-r0/$$(basename $$d)/context_config.json; \ - fi; \ - if [ -f $$(dirname $$d)/chassisdb.conf ]; then \ - # Append Cpu0 Port in lanemap.ini - if [ -f device/x86_64-kvm_x86_64-r0/$$(basename $$d)/lanemap.ini ]; then \ - echo "Cpu0:999" >> device/x86_64-kvm_x86_64-r0/$$(basename $$d)/lanemap.ini; \ - fi; \ - if [ -f device/x86_64-kvm_x86_64-r0/$$(basename $$d)/coreportindexmap.ini ]; then \ - echo "Cpu0:0,0" >> device/x86_64-kvm_x86_64-r0/$$(basename $$d)/coreportindexmap.ini; \ - fi; \ - fi; \ - i=0; \ - if [ -f $$(dirname $$d)/chassisdb.conf ] && ! grep -q '^disaggregated_chassis=1' $$(dirname $$d)/platform_env.conf; then \ - echo "Reserve midplane interface for $$(dirname $$d)"; \ - i=$$(($$i+1)); \ - fi; \ - subdirs="0 1 2"; \ - for subdir_idx in $$subdirs; do \ - subdir="device/x86_64-kvm_x86_64-r0/$$(basename $$d)/$$subdir_idx"; \ - if [ -d "$$subdir" ]; then \ - cp ./sai.vs_profile device/x86_64-kvm_x86_64-r0/$$(basename $$d)/$$(basename $$subdir)/sai.profile; \ - cp ./fabriclanemap_vs.ini device/x86_64-kvm_x86_64-r0/$$(basename $$d)/$$(basename $$subdir)/fabriclanemap.ini; \ - if [ -f device/x86_64-kvm_x86_64-r0/$$(basename $$d)/$$(basename $$subdir)/context_config.json ]; then \ - rm device/x86_64-kvm_x86_64-r0/$$(basename $$d)/$$(basename $$subdir)/context_config.json; \ - fi; \ - if [ -f device/x86_64-kvm_x86_64-r0/$$(basename $$d)/$$(basename $$subdir)/port_config.ini ]; then \ - last_line=$$(tail -n 1 device/x86_64-kvm_x86_64-r0/$$(basename $$d)/$$(basename $$subdir)/port_config.ini); \ - num_columns=$$(echo $$last_line | awk '{print NF}'); \ - while IFS= read -r line || [ -n "$$line" ]; do \ - if ! grep -q "^#" <<< "$$line"; then \ - i=$$(($$i+1)); \ - lanes=$$(echo "$$line" | awk '{print $$2}'); \ - echo "eth$$i:$$lanes" >> device/x86_64-kvm_x86_64-r0/$$(basename $$d)/$$(basename $$subdir)/lanemap.ini; \ - if [ $$num_columns -ge 9 ]; then \ - core=$$(echo "$$line" | awk '{print $$8}'); \ - core_port=$$(echo "$$line" | awk '{print $$9}'); \ - echo "eth$$i:$$core,$$core_port" >> device/x86_64-kvm_x86_64-r0/$$(basename $$d)/$$(basename $$subdir)/coreportindexmap.ini; \ - fi; \ - fi; \ - done < device/x86_64-kvm_x86_64-r0/$$(basename $$d)/$$(basename $$subdir)/port_config.ini; \ - fi; \ - if [ -f $$(dirname $$d)/chassisdb.conf ]; then \ - if [ -f device/x86_64-kvm_x86_64-r0/$$(basename $$d)/$$(basename $$subdir)/lanemap.ini ]; then \ - echo "Cpu0:999" >> device/x86_64-kvm_x86_64-r0/$$(basename $$d)/$$(basename $$subdir)/lanemap.ini; \ - i=$$(($$i+1)); \ - fi; \ - if [ -f device/x86_64-kvm_x86_64-r0/$$(basename $$d)/$$(basename $$subdir)/coreportindexmap.ini ]; then \ - echo "Cpu0:0,0" >> device/x86_64-kvm_x86_64-r0/$$(basename $$d)/$$(basename $$subdir)/coreportindexmap.ini; \ - fi; \ - fi; \ - fi; \ - done; \ - done; + # Generate VS HwSKU data (lanemap.ini, coreportindexmap.ini, profiles) + # Uses Python for ~200x faster processing than the equivalent bash loop + python3 ./generate_vs_hwsku.py ../../../device # Build the package ifeq ($(CROSS_BUILD_ENVIRON), y) diff --git a/src/sonic-device-data/src/generate_vs_hwsku.py b/src/sonic-device-data/src/generate_vs_hwsku.py new file mode 100755 index 00000000000..a626f9f9fa8 --- /dev/null +++ b/src/sonic-device-data/src/generate_vs_hwsku.py @@ -0,0 +1,204 @@ +#!/usr/bin/env python3 +"""Generate VS HwSKU data from platform device directories. + +Replaces the bash loop in sonic-device-data/src/Makefile that takes ~9 minutes +by processing all HwSKUs in parallel with native Python file I/O. +""" +import os +import shutil +import sys +from pathlib import Path + +def process_hwsku(hwsku_dir, src_dir, device_base, vs_platform="x86_64-kvm_x86_64-r0"): + """Process a single HwSKU directory for VS mapping.""" + hwsku_name = hwsku_dir.name + vs_hwsku = Path(src_dir, "device", vs_platform, hwsku_name) + parent = hwsku_dir.parent + + # Check if VS hwsku already exists (from device copy) + if vs_hwsku.exists(): + # Just copy profile files + for profile in ["sai.vs_profile:sai.profile", + "sai_mlnx.vs_profile:sai_mlnx.profile", + "sai_vpp.vs_profile:sai_vpp.profile", + "pai.vs_profile:pai.profile", + "fabriclanemap_vs.ini:fabriclanemap.ini"]: + src_name, dst_name = profile.split(":") + src_path = Path(src_dir, src_name) + if src_path.exists(): + shutil.copy2(str(src_path), str(vs_hwsku / dst_name)) + return + + # Copy HwSKU dir to VS platform + shutil.copytree(str(hwsku_dir), str(vs_hwsku), symlinks=False) + + # Copy asic.conf if exists + asic_conf = parent / "asic.conf" + if asic_conf.exists(): + shutil.copy2(str(asic_conf), str(vs_hwsku / "asic.conf")) + + # Copy profile files + for profile in ["sai.vs_profile:sai.profile", + "sai_mlnx.vs_profile:sai_mlnx.profile", + "sai_vpp.vs_profile:sai_vpp.profile", + "pai.vs_profile:pai.profile", + "fabriclanemap_vs.ini:fabriclanemap.ini"]: + src_name, dst_name = profile.split(":") + src_path = Path(src_dir, src_name) + if src_path.exists(): + shutil.copy2(str(src_path), str(vs_hwsku / dst_name)) + + # Remove context_config.json if exists + ctx_cfg = vs_hwsku / "context_config.json" + if ctx_cfg.exists(): + ctx_cfg.unlink() + + # Check for chassis and midplane + chassisdb = parent / "chassisdb.conf" + has_chassis = chassisdb.exists() + reserve_midplane = False + if has_chassis: + platform_env = parent / "platform_env.conf" + if platform_env.exists(): + with open(platform_env) as f: + reserve_midplane = not any( + line.strip().startswith("disaggregated_chassis=1") + for line in f + ) + else: + reserve_midplane = True + + # Generate lanemap.ini and coreportindexmap.ini from port_config.ini + port_config = vs_hwsku / "port_config.ini" + if port_config.exists(): + generate_lanemap(vs_hwsku, port_config, has_chassis, reserve_midplane) + + # Process numbered subdirectories (0, 1, 2) for multi-ASIC + i = 1 if reserve_midplane else 0 + for subdir_idx in ["0", "1", "2"]: + subdir = vs_hwsku / subdir_idx + if subdir.is_dir(): + # Copy profiles to subdir + for profile in ["sai.vs_profile:sai.profile", + "fabriclanemap_vs.ini:fabriclanemap.ini"]: + src_name, dst_name = profile.split(":") + src_path = Path(src_dir, src_name) + if src_path.exists(): + shutil.copy2(str(src_path), str(subdir / dst_name)) + + # Remove context_config.json + sub_ctx = subdir / "context_config.json" + if sub_ctx.exists(): + sub_ctx.unlink() + + # Generate lanemap for subdir + sub_port_config = subdir / "port_config.ini" + if sub_port_config.exists(): + i = generate_lanemap_for_subdir(subdir, sub_port_config, has_chassis, i) + +def generate_lanemap_for_subdir(target_dir, port_config_path, has_chassis, start_i): + """Generate lanemap.ini and coreportindexmap.ini, returning the updated i.""" + lanemap_lines = [] + coremap_lines = [] + i = start_i + num_columns = 0 + + with open(port_config_path) as f: + for line in f: + line = line.rstrip("\n") + if not line or not line.strip() or line.startswith("#"): + continue + parts = line.split() + if len(parts) < 2: + continue + num_columns = len(parts) + i += 1 + lanes = parts[1] + lanemap_lines.append(f"eth{i}:{lanes}") + if num_columns >= 9: + core = parts[7] + core_port = parts[8] + coremap_lines.append(f"eth{i}:{core},{core_port}") + + if lanemap_lines: + lanemap_path = target_dir / "lanemap.ini" + with open(lanemap_path, "w") as f: + f.write("\n".join(lanemap_lines) + "\n") + if has_chassis: + f.write("Cpu0:999\n") + i += 1 # bash loop increments i for Cpu0 if lanemap.ini is written + + if coremap_lines: + coremap_path = target_dir / "coreportindexmap.ini" + with open(coremap_path, "w") as f: + f.write("\n".join(coremap_lines) + "\n") + if has_chassis: + f.write("Cpu0:0,0\n") + + return i + +def generate_lanemap(target_dir, port_config_path, has_chassis, reserve_midplane): + """Generate lanemap.ini and coreportindexmap.ini from port_config.ini.""" + lanemap_lines = [] + coremap_lines = [] + i = 1 if reserve_midplane else 0 + num_columns = 0 + + with open(port_config_path) as f: + for line in f: + line = line.rstrip("\n") + if not line or not line.strip() or line.startswith("#"): + continue + parts = line.split() + if len(parts) < 2: + continue + num_columns = len(parts) + i += 1 + lanes = parts[1] + lanemap_lines.append(f"eth{i}:{lanes}") + if num_columns >= 9: + core = parts[7] + core_port = parts[8] + coremap_lines.append(f"eth{i}:{core},{core_port}") + + if lanemap_lines: + lanemap_path = target_dir / "lanemap.ini" + with open(lanemap_path, "w") as f: + f.write("\n".join(lanemap_lines) + "\n") + if has_chassis: + f.write("Cpu0:999\n") + + if coremap_lines: + coremap_path = target_dir / "coreportindexmap.ini" + with open(coremap_path, "w") as f: + f.write("\n".join(coremap_lines) + "\n") + if has_chassis: + f.write("Cpu0:0,0\n") +def main(): + script_dir = Path(__file__).resolve().parent + device_base = sys.argv[1] if len(sys.argv) > 1 else str(script_dir / ".." / ".." / ".." / "device") + src_dir = str(script_dir) + + # Find all HwSKU directories + hwsku_dirs = [] + for platform_dir in Path(device_base).iterdir(): + if not platform_dir.is_dir(): + continue + for vendor_dir in platform_dir.iterdir(): + if not vendor_dir.is_dir(): + continue + for hwsku_dir in vendor_dir.iterdir(): + if not hwsku_dir.is_dir(): + continue + # Match bash's grep -vE "(plugins|led-code|sonic_platform)" + name = hwsku_dir.name + if "plugins" in name or "led-code" in name or "sonic_platform" in name: + continue + hwsku_dirs.append(hwsku_dir) + + print(f"Processing {len(hwsku_dirs)} HwSKUs...", file=sys.stderr) + for hwsku_dir in hwsku_dirs: + process_hwsku(hwsku_dir, src_dir, device_base) + print(f"Done.", file=sys.stderr) +if __name__ == "__main__": + main() diff --git a/src/sonic-device-data/src/sai.vs_profile b/src/sonic-device-data/src/sai.vs_profile index ed9dd21bdcb..908e4cf5d78 100644 --- a/src/sonic-device-data/src/sai.vs_profile +++ b/src/sonic-device-data/src/sai.vs_profile @@ -3,3 +3,4 @@ SAI_VS_HOSTIF_USE_TAP_DEVICE=true SAI_VS_INTERFACE_LANE_MAP_FILE=/usr/share/sonic/hwsku/lanemap.ini SAI_VS_CORE_PORT_INDEX_MAP_FILE=/usr/share/sonic/hwsku/coreportindexmap.ini SAI_VS_INTERFACE_FABRIC_LANE_MAP_FILE=/usr/share/sonic/hwsku/fabriclanemap.ini +SAI_VS_USE_CONFIGURED_SPEED_AS_OPER_SPEED=true diff --git a/src/sonic-device-data/tests/media_checker b/src/sonic-device-data/tests/media_checker index 0c32caf124c..71fddcb8490 100755 --- a/src/sonic-device-data/tests/media_checker +++ b/src/sonic-device-data/tests/media_checker @@ -5,14 +5,48 @@ import json import re import sys -level1_keys = ["GLOBAL_MEDIA_SETTINGS","PORT_MEDIA_SETTINGS"] - -si_param_list = ["preemphasis", "idriver", "ipredriver", \ - "main", "pre1", "pre2", "pre3", \ - "post1", "post2", "post3", "attn", \ - "ob_m2lp", "ob_alev_out", "obplev", "obnlev", \ - "regn_bfm1p", "regn_bfm1n", "unreliable_los", \ - "rxpolarity", "interface_type"] +level1_keys = ["GLOBAL_MEDIA_SETTINGS","PORT_MEDIA_SETTINGS", "SPEED_MEDIA_SETTINGS", "GEARBOX_GLOBAL_MEDIA_SETTINGS", "GEARBOX_PORT_MEDIA_SETTINGS"] + +si_param_list = [ + "preemphasis", + "idriver", + "ipredriver", + "main", + "pre1", + "pre2", + "pre3", + "post1", + "post2", + "post3", + "gb_line_pre1", + "gb_line_pre2", + "gb_line_pre3", + "gb_line_main", + "gb_line_post1", + "gb_line_post2", + "gb_line_post3", + "gb_system_pre1", + "gb_system_pre2", + "gb_system_pre3", + "gb_system_main", + "gb_system_post1", + "gb_system_post2", + "gb_system_post3", + "attn", + "ob_m2lp", + "ob_alev_out", + "obplev", + "obnlev", + "regn_bfm1p", + "regn_bfm1n", + "unreliable_los", + "rxpolarity", + "tx_precoding", + "rx_precoding", + "interface_type", + "media_type" +] + lane_speed_key_prefix = 'speed:' lane_prefix = "lane" comma_separator = "," @@ -86,19 +120,25 @@ def check_valid_port(port_name): return False -def check_port_keys(port_media_dict): +def check_port_keys(port_media_dict, gearbox=False): for port in port_media_dict: if not check_valid_port(port): print("Invalid port name " + port) return False - if not check_media_dict(port_media_dict[port]): - return False + if gearbox: + if not check_media_dict(port_media_dict[port]["line"]): + return False + if not check_media_dict(port_media_dict[port]["system"]): + return False + else: + if not check_media_dict(port_media_dict[port]): + return False return True -def check_global_keys(global_media_dict): +def check_global_keys(global_media_dict, gearbox=False): for keys in global_media_dict: if comma_separator in keys: port_list = keys.split(comma_separator) @@ -125,8 +165,14 @@ def check_global_keys(global_media_dict): print("Invalid range " + keys) return False - if not check_media_dict(global_media_dict[keys]): - return False + if gearbox: + if not check_media_dict(global_media_dict[keys]["line"]): + return False + if not check_media_dict(global_media_dict[keys]["system"]): + return False + else: + if not check_media_dict(global_media_dict[keys]): + return False return True @@ -148,6 +194,13 @@ def check_file(media_settings_file): if "PORT_MEDIA_SETTINGS" in media_dict: if not check_port_keys(media_dict["PORT_MEDIA_SETTINGS"]): return False + if "GEARBOX_GLOBAL_MEDIA_SETTINGS" in media_dict: + if not check_global_keys(media_dict["GEARBOX_GLOBAL_MEDIA_SETTINGS"], gearbox=True): + return False + if "GEARBOX_PORT_MEDIA_SETTINGS" in media_dict: + if not check_port_keys(media_dict["GEARBOX_PORT_MEDIA_SETTINGS"], gearbox=True): + return False + except IOError: diff --git a/src/sonic-device-data/tests/permitted_list b/src/sonic-device-data/tests/permitted_list index 7efe9b040d9..255f21aaa59 100644 --- a/src/sonic-device-data/tests/permitted_list +++ b/src/sonic-device-data/tests/permitted_list @@ -362,7 +362,14 @@ fabric_num_pipes fabric_pipe_map_uc fabric_pipe_map_mc system_contains_multiple_pipe_device +xphy_primary_core_num +sai_mmu_max_buffer_profiles +sai_crm_hw_nh_group_cnt +sai_crm_hw_nh_group_member_cnt +sai_legacy_ledproc_linkscan_cb appl_param_rcy_mirror_ports_range rcy_mirror_to_forward_port_map port_priorities_sch sai_lag_default_crc_hash +sai_ecmp_group_members_increment +sai_instru_stat_accum_enable diff --git a/src/sonic-device-data/tests/platform_asic_checker b/src/sonic-device-data/tests/platform_asic_checker index a2b10b415c6..a6f57fdd870 100755 --- a/src/sonic-device-data/tests/platform_asic_checker +++ b/src/sonic-device-data/tests/platform_asic_checker @@ -39,8 +39,9 @@ def main(argv): # os.scandir().close() is only available in python 3.6 and later if callable(getattr(it, "close", None)): it.close() - # dnx platform is special broadcom platform, add it manually + # dnx and legacy-th platforms are special broadcom platforms, add them manually platforms.add('broadcom-dnx') + platforms.add('broadcom-legacy-th') device_folder = os.path.normpath(args.device_folder) base_level = len(device_folder.split(os.sep)) diff --git a/src/sonic-dhcp-utilities/dhcp_utilities/dhcprelayd/dhcprelayd.py b/src/sonic-dhcp-utilities/dhcp_utilities/dhcprelayd/dhcprelayd.py index 7b78f684625..4d6aed8b6b7 100644 --- a/src/sonic-dhcp-utilities/dhcp_utilities/dhcprelayd/dhcprelayd.py +++ b/src/sonic-dhcp-utilities/dhcp_utilities/dhcprelayd/dhcprelayd.py @@ -230,12 +230,20 @@ def _check_dhcp_relay_processes(self): """ procs = {} for proc in psutil.process_iter(): - try: - if proc.name() != "dhcrelay": - continue - procs[proc.pid] = [proc.ppid(), proc.cmdline()] - except psutil.NoSuchProcess: - continue + err = None + for i in range(5): + err = None + try: + if proc.name() == "dhcrelay": + procs[proc.pid] = [proc.ppid(), proc.cmdline()] + except psutil.NoSuchProcess: + pass + except Exception as e: + err = e + if err is None: + break + if err: + raise err # When there is network io, dhcrelay would create child process to proceed them, psutil has chance to get # duplicated cmdline. Hence ignore chlid process in here diff --git a/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcp_cfggen.py b/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcp_cfggen.py index fad5128f142..4813dc01b59 100755 --- a/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcp_cfggen.py +++ b/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcp_cfggen.py @@ -23,7 +23,7 @@ SMART_SWITCH_CHECKER = ["DpusTableEventChecker", "MidPlaneTableEventChecker"] LEASE_UPDATE_SCRIPT_PATH = "/etc/kea/lease_update.sh" DEFAULT_LEASE_TIME = 900 -DEFAULT_LEASE_PATH = "/tmp/kea-lease.csv" +DEFAULT_LEASE_PATH = "/var/lib/kea/kea-lease.csv" KEA_DHCP4_CONF_TEMPLATE_PATH = "/usr/share/sonic/templates/kea-dhcp4.conf.j2" SCRIPT_DIR = os.path.dirname(os.path.realpath(__file__)) DHCP_OPTION_FILE = f"{SCRIPT_DIR}/dhcp_option.csv" diff --git a/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcp_lease.py b/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcp_lease.py index e2e95fb7b53..d2b1c452bc8 100644 --- a/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcp_lease.py +++ b/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcp_lease.py @@ -8,7 +8,7 @@ from dhcp_utilities.common.utils import is_smart_switch DHCP_SERVER_IPV4_LEASE = "DHCP_SERVER_IPV4_LEASE" -KEA_LEASE_FILE_PATH = "/tmp/kea-lease.csv" +KEA_LEASE_FILE_PATH = "/var/lib/kea/kea-lease.csv" DEFAULE_LEASE_UPDATE_INTERVAL = 2 # unit: sec diff --git a/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcpservd.py b/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcpservd.py index 73a928eb08c..caf13e953ff 100644 --- a/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcpservd.py +++ b/src/sonic-dhcp-utilities/dhcp_utilities/dhcpservd/dhcpservd.py @@ -5,6 +5,7 @@ import subprocess import sys import syslog +import os from .dhcp_cfggen import DhcpServCfgGenerator from .dhcp_lease import LeaseManager from dhcp_utilities.common.utils import DhcpDbConnector @@ -15,7 +16,8 @@ KEA_DHCP4_CONFIG = "/etc/kea/kea-dhcp4.conf" KEA_DHCP4_PROC_NAME = "kea-dhcp4" -KEA_LEASE_FILE_PATH = "/tmp/kea-lease.csv" +KEA_LEASE_FILE_PATH = "/var/lib/kea/kea-lease.csv" +DHCPSERVD_READY_FLAG = "/tmp/dhcpservd_ready" REDIS_SOCK_PATH = "/var/run/redis/redis.sock" DHCP_SERVER_IPV4_SERVER_IP = "DHCP_SERVER_IPV4_SERVER_IP" DHCP_SERVER_INTERFACE = "eth0" @@ -79,16 +81,35 @@ def _update_dhcp_server_ip(self): "ip", dhcp_server_ip) return else: + syslog.syslog(syslog.LOG_WARNING, "Cannot get ip address of {}, retry in 5s".format(DHCP_SERVER_INTERFACE)) time.sleep(5) - syslog.syslog(syslog.LOG_INFO, "Cannot get ip address of {}".format(DHCP_SERVER_INTERFACE)) + syslog.syslog(syslog.LOG_ERR, "Failed to get ip address of {} after 10 retries, exiting".format(DHCP_SERVER_INTERFACE)) sys.exit(1) def start(self): + start_time = time.time() + syslog.syslog(syslog.LOG_INFO, "dhcpservd starting") self.dump_dhcp4_config() + syslog.syslog(syslog.LOG_INFO, "dump_dhcp4_config done, elapsed=%.3fs" % (time.time() - start_time)) self._update_dhcp_server_ip() + syslog.syslog(syslog.LOG_INFO, "update_dhcp_server_ip done, elapsed=%.3fs" % (time.time() - start_time)) self.dhcp_servd_monitor.enable_checkers(self.enabled_checker) lease_manager = LeaseManager(self.db_connector, KEA_LEASE_FILE_PATH) lease_manager.start() + self._signal_readiness() + syslog.syslog(syslog.LOG_INFO, "SIGUSR1 handler registered, ready flag written, total startup=%.3fs" % (time.time() - start_time)) + + def _signal_readiness(self): + """Write readiness flag so wait_for_dhcpservd.sh can gate kea-dhcp4 startup.""" + try: + with open(DHCPSERVD_READY_FLAG, "w") as f: + f.write(str(os.getpid())) + except OSError as err: + syslog.syslog( + syslog.LOG_ERR, + "Failed to write readiness flag {}: {}, exiting".format(DHCPSERVD_READY_FLAG, err) + ) + sys.exit(1) def wait(self): while True: diff --git a/src/sonic-dhcp-utilities/tests/conftest.py b/src/sonic-dhcp-utilities/tests/conftest.py index 2b3076d5acc..938caac6a2d 100644 --- a/src/sonic-dhcp-utilities/tests/conftest.py +++ b/src/sonic-dhcp-utilities/tests/conftest.py @@ -40,5 +40,5 @@ def mock_parse_port_map_alias(scope="function"): new_callable=PropertyMock), \ patch.object(DhcpServCfgGenerator, "lease_update_script_path", return_value="/etc/kea/lease_update.sh", new_callable=PropertyMock), \ - patch.object(DhcpServCfgGenerator, "lease_path", return_value="/tmp/kea-lease.csv", new_callable=PropertyMock): + patch.object(DhcpServCfgGenerator, "lease_path", return_value="/var/lib/kea/kea-lease.csv", new_callable=PropertyMock): yield mock_map diff --git a/src/sonic-dhcp-utilities/tests/test_data/kea-dhcp4.conf.j2 b/src/sonic-dhcp-utilities/tests/test_data/kea-dhcp4.conf.j2 index 7fe90d86f12..3c284f8360c 100644 --- a/src/sonic-dhcp-utilities/tests/test_data/kea-dhcp4.conf.j2 +++ b/src/sonic-dhcp-utilities/tests/test_data/kea-dhcp4.conf.j2 @@ -94,7 +94,7 @@ "name": "kea-dhcp4", "output_options": [ { - "output": "/var/log/kea-dhcp.log", + "output": "/var/log/kea/kea-dhcp4.log", "pattern": "%-5p %m\n" } ], diff --git a/src/sonic-dhcp-utilities/tests/test_dhcp_cfggen.py b/src/sonic-dhcp-utilities/tests/test_dhcp_cfggen.py index a2e68454f15..f5b6d0f05a5 100644 --- a/src/sonic-dhcp-utilities/tests/test_dhcp_cfggen.py +++ b/src/sonic-dhcp-utilities/tests/test_dhcp_cfggen.py @@ -37,7 +37,7 @@ "lease-database": { "type": "memfile", "persist": True, - "name": "/tmp/kea-lease.csv", + "name": "/var/lib/kea/kea-lease.csv", "lfc-interval": 3600 }, "subnet4": [ @@ -97,7 +97,7 @@ "name": "kea-dhcp4", "output_options": [ { - "output": "/var/log/kea-dhcp.log", + "output": "/var/log/kea/kea-dhcp4.log", "pattern": "%-5p %m\n" } ], @@ -151,7 +151,7 @@ "lease-database": { "type": "memfile", "persist": True, - "name": "/tmp/kea-lease.csv", + "name": "/var/lib/kea/kea-lease.csv", "lfc-interval": 3600 }, "subnet4": [ @@ -161,7 +161,7 @@ "name": "kea-dhcp4", "output_options": [ { - "output": "/var/log/kea-dhcp.log", + "output": "/var/log/kea/kea-dhcp4.log", "pattern": "%-5p %m\n" } ], @@ -270,7 +270,7 @@ {"name": "sonic-host:etp11", "condition": "substring(relay4[1].hex, -16, 16) == 'sonic-host:etp11'"} ], "lease_update_script_path": "/etc/kea/lease_update.sh", - "lease_path": "/tmp/kea-lease.csv", + "lease_path": "/var/lib/kea/kea-lease.csv", "customized_options": { "option223": { "id": "223", diff --git a/src/sonic-dhcp-utilities/tests/test_dhcpservd.py b/src/sonic-dhcp-utilities/tests/test_dhcpservd.py index b55703aeb41..ffaade23f27 100644 --- a/src/sonic-dhcp-utilities/tests/test_dhcpservd.py +++ b/src/sonic-dhcp-utilities/tests/test_dhcpservd.py @@ -121,6 +121,26 @@ def test_start(mock_swsscommon_dbconnector_init, mock_parse_port_map_alias, mock mock_update_dhcp_server_ip.assert_called_once_with() +def test_signal_readiness(mock_swsscommon_dbconnector_init): + with patch.object(DhcpDbConnector, "get_config_db_table", side_effect=mock_get_config_db_table), \ + patch("tempfile.NamedTemporaryFile"): + import tempfile, os + tmpdir = tempfile.mkdtemp() + test_flag = os.path.join(tmpdir, "dhcpservd_ready") + try: + dhcp_db_connector = DhcpDbConnector() + dhcpservd = DhcpServd(MagicMock(), dhcp_db_connector, MagicMock()) + with patch("dhcp_utilities.dhcpservd.dhcpservd.DHCPSERVD_READY_FLAG", test_flag): + dhcpservd._signal_readiness() + assert os.path.exists(test_flag), "readiness flag file was not created" + with open(test_flag) as f: + assert f.read() == str(os.getpid()) + finally: + if os.path.exists(test_flag): + os.remove(test_flag) + os.rmdir(tmpdir) + + class MockIntf(object): def __init__(self, family, address): self.family = family diff --git a/src/sonic-dhcp-utilities/tests/test_smart_switch.py b/src/sonic-dhcp-utilities/tests/test_smart_switch.py index e3c627347a7..2b0a54e8923 100644 --- a/src/sonic-dhcp-utilities/tests/test_smart_switch.py +++ b/src/sonic-dhcp-utilities/tests/test_smart_switch.py @@ -31,7 +31,7 @@ "lease-database": { "type": "memfile", "persist": True, - "name": "/tmp/kea-lease.csv", + "name": "/var/lib/kea/kea-lease.csv", "lfc-interval": 3600 }, "subnet4": [ @@ -76,7 +76,7 @@ "name": "kea-dhcp4", "output_options": [ { - "output": "/var/log/kea-dhcp.log", + "output": "/var/log/kea/kea-dhcp4.log", "pattern": "%-5p %m\n" } ], diff --git a/src/sonic-eventd/Makefile b/src/sonic-eventd/Makefile index f907a3a14d1..f12c7947c17 100644 --- a/src/sonic-eventd/Makefile +++ b/src/sonic-eventd/Makefile @@ -1,25 +1,29 @@ RM := rm -rf EVENTD_TARGET := eventd EVENTD_TEST := tests/tests +EVENTDB_TEST := tests/eventdb EVENTD_TOOL := tools/events_tool EVENTD_PUBLISH_TOOL := tools/events_publish_tool.py RSYSLOG-PLUGIN_TARGET := rsyslog_plugin/rsyslog_plugin RSYSLOG-PLUGIN_TEST := rsyslog_plugin_tests/tests EVENTD_MONIT := tools/events_monit_test.py EVENTD_MONIT_CONF := tools/monit_events +EVENTDB_TARGET := eventdb +EVENTDB_DEFAULT_PROFILE := var/evprofile/default.json +EVENTDB_PROF := etc/eventd.json CP := cp MKDIR := mkdir CC := g++ LIBS := -lhiredis -lswsscommon -lzmq -lboost_serialization -llua5.1 -TEST_LIBS := -L/usr/src/gtest -lgtest -lgtest_main -lgmock -lgmock_main +TEST_LIBS := -lgtest -lgtest_main -lgmock -lgmock_main CFLAGS += -Wall -std=c++17 -fPIE PWD := $(shell pwd) ifneq ($(MAKECMDGOALS),clean) ifneq ($(strip $(C_DEPS)),) --include $(C_DEPS) $(OBJS) +-include $(C_DEPS) $(OBJS) $(EVENTDB_OBJS) endif endif @@ -29,9 +33,9 @@ endif -include rsyslog_plugin/subdir.mk -include rsyslog_plugin_tests/subdir.mk -all: sonic-eventd eventd-tool rsyslog-plugin +all: sonic-eventd eventd-tool rsyslog-plugin sonic-eventdb -test: eventd-tests rsyslog-plugin-tests +test: eventd-tests rsyslog-plugin-tests eventdb-tests sonic-eventd: $(OBJS) @echo 'Building target: $@' @@ -40,6 +44,13 @@ sonic-eventd: $(OBJS) @echo 'Finished building target: $@' @echo ' ' +sonic-eventdb: $(EVENTDB_OBJS) + @echo 'Building target: $@' + @echo 'Invoking: G++ Linker' + $(CC) $(LDFLAGS) -o $(EVENTDB_TARGET) $(EVENTDB_OBJS) $(LIBS) + @echo 'Finished building target: $@' + @echo ' ' + eventd-tool: $(TOOL_OBJS) @echo 'Building target: $@' @echo 'Invoking: G++ Linker' @@ -63,6 +74,15 @@ eventd-tests: $(TEST_OBJS) @echo 'Finished running tests' @echo ' ' +eventdb-tests: $(EVENTDB_TEST_OBJS) + @echo 'Building target: $@' + @echo 'Invoking: G++ Linker' + $(CC) $(LDFLAGS) -o $(EVENTDB_TEST) $(EVENTDB_TEST_OBJS) $(LIBS) $(TEST_LIBS) + @echo 'Finished building target: $@' + $(EVENTDB_TEST) + @echo 'Finished running tests' + @echo ' ' + rsyslog-plugin-tests: $(RSYSLOG-PLUGIN-TEST_OBJS) @echo 'BUILDING target: $@' @echo 'Invoking G++ Linker' @@ -75,19 +95,23 @@ rsyslog-plugin-tests: $(RSYSLOG-PLUGIN-TEST_OBJS) install: $(MKDIR) -p $(DESTDIR)/usr/bin $(MKDIR) -p $(DESTDIR)/etc/monit/conf.d + $(MKDIR) -p $(DESTDIR)/etc/evprofile $(CP) $(EVENTD_TARGET) $(DESTDIR)/usr/bin $(CP) $(EVENTD_TOOL) $(DESTDIR)/usr/bin $(CP) $(EVENTD_PUBLISH_TOOL) $(DESTDIR)/usr/bin $(CP) $(RSYSLOG-PLUGIN_TARGET) $(DESTDIR)/usr/bin $(CP) $(EVENTD_MONIT) $(DESTDIR)/usr/bin $(CP) $(EVENTD_MONIT_CONF) $(DESTDIR)/etc/monit/conf.d + $(CP) $(EVENTDB_TARGET) $(DESTDIR)/usr/bin + $(CP) $(EVENTDB_PROF) $(DESTDIR)/etc/eventd.json + $(CP) $(EVENTDB_DEFAULT_PROFILE) $(DESTDIR)/etc/evprofile/default.json deinstall: $(RM) -rf $(DESTDIR)/usr $(RM) -rf $(DESTDIR)/etc clean: - -$(RM) $(EVENTD_TARGET) $(OBJS) $(EVENTD_TOOL) $(TOOL_OBJS) $(RSYSLOG-PLUGIN_TARGET) $(RSYSLOG-PLUGIN_OBJS) $(EVENTD_TEST) $(TEST_OBJS) $(RSYSLOG-PLUGIN_TEST) $(RSYSLOG-PLUGIN-TEST_OBJS) $(C_DEPS) + -$(RM) $(EVENTD_TARGET) $(OBJS) $(EVENTD_TOOL) $(TOOL_OBJS) $(RSYSLOG-PLUGIN_TARGET) $(RSYSLOG-PLUGIN_OBJS) $(EVENTD_TEST) $(TEST_OBJS) $(EVENTDB_TEST) $(EVENTDB_TEST_OBJS) $(RSYSLOG-PLUGIN_TEST) $(RSYSLOG-PLUGIN-TEST_OBJS) $(C_DEPS) -@echo ' ' .PHONY: all clean dependents diff --git a/src/sonic-eventd/debian/control b/src/sonic-eventd/debian/control index ebf61a9f69b..e6b207d9e09 100644 --- a/src/sonic-eventd/debian/control +++ b/src/sonic-eventd/debian/control @@ -2,7 +2,7 @@ Source: sonic-eventd Section: devel Priority: optional Maintainer: Renuka Manavalan -Build-Depends: debhelper (>= 12.0.0), libswsscommon-dev, liblua5.1-0, libzmq3-dev, libboost-serialization1.83-dev +Build-Depends: debhelper (>= 12.0.0), libswsscommon-dev, liblua5.1-0, libzmq3-dev, libboost-serialization1.83-dev, libgtest-dev, libgmock-dev Standards-Version: 3.9.3 Homepage: https://github.com/Azure/sonic-buildimage XS-Go-Import-Path: github.com/Azure/sonic-buildimage diff --git a/src/sonic-eventd/debian/sonic-eventd.install b/src/sonic-eventd/debian/sonic-eventd.install index bdba566c77b..273b07adf18 100644 --- a/src/sonic-eventd/debian/sonic-eventd.install +++ b/src/sonic-eventd/debian/sonic-eventd.install @@ -1,3 +1,6 @@ usr/bin/eventd +usr/bin/eventdb usr/bin/events_tool usr/bin/events_publish_tool.py +etc/evprofile/default.json +etc/eventd.json diff --git a/src/sonic-eventd/etc/eventd.json b/src/sonic-eventd/etc/eventd.json new file mode 100644 index 00000000000..ee441eb329f --- /dev/null +++ b/src/sonic-eventd/etc/eventd.json @@ -0,0 +1,5 @@ +{ + "__README__": "Specify size of event history table. Whichever limit is hit first, eventd wraps event history table around and deletes older records.", + "max-records": 40000, + "max-days": 30 +} diff --git a/src/sonic-eventd/src/eventconsume.cpp b/src/sonic-eventd/src/eventconsume.cpp new file mode 100644 index 00000000000..9c5b9357445 --- /dev/null +++ b/src/sonic-eventd/src/eventconsume.cpp @@ -0,0 +1,674 @@ + +#include +#include +#include +#include +#include +#include +#include "eventconsume.h" +#include "loghandler.h" +#include "eventutils.h" + + + +using namespace swss; +using namespace std; +using namespace std::chrono; + +// map to store sequence-id for alarms +unordered_map cal_lookup_map; + +// temporary map to hold merge of default map of events and any event profile +EventMap static_event_table; + +std::atomic reload_config_flag(false); // Definition and initialization + +volatile bool g_run = true; +uint64_t seq_id = 0; +uint64_t PURGE_SECONDS = 86400; + +typedef pair pi; +priority_queue, greater > event_history_list; + +map SYSLOG_SEVERITY = { + {EVENT_SEVERITY_CRITICAL_STR, LOG_ALERT}, + {EVENT_SEVERITY_MAJOR_STR, LOG_CRIT}, + {EVENT_SEVERITY_MINOR_STR, LOG_ERR}, + {EVENT_SEVERITY_WARNING_STR, LOG_WARNING}, + {EVENT_SEVERITY_INFORMATIONAL_STR, LOG_NOTICE} +}; + +map SYSLOG_SEVERITY_STR = { + {LOG_ALERT , EVENT_SEVERITY_CRITICAL_STR}, + {LOG_CRIT , EVENT_SEVERITY_MAJOR_STR}, + {LOG_ERR , EVENT_SEVERITY_MINOR_STR}, + {LOG_WARNING , EVENT_SEVERITY_WARNING_STR}, + {LOG_NOTICE , EVENT_SEVERITY_INFORMATIONAL_STR} +}; + +static string flood_ev_id; +static string flood_ev_action; +static string flood_ev_resource; +static string flood_ev_msg; + +EventConsume::EventConsume(DBConnector* dbConn, + string evProfile, + string dbProfile): + m_eventTable(dbConn, EVENT_HISTORY_TABLE_NAME), + m_alarmTable(dbConn, EVENT_CURRENT_ALARM_TABLE_NAME), + m_eventStatsTable(dbConn, EVENT_STATS_TABLE_NAME), + m_alarmStatsTable(dbConn, EVENT_ALARM_STATS_TABLE_NAME), + m_evProfile(evProfile), + m_dbProfile(dbProfile) { + + // open syslog connection + openSyslog(); + + // init stats + initStats(); + + // populate local queue of event histor table + read_events(); + + // read and apply eventd configuration files + // read eventd.json and apply it on history table. + // read default and custom profiles, build static_event_table + read_eventd_config(); + + SWSS_LOG_NOTICE("DONE WITH EventConsume constructor"); +} + +EventConsume::~EventConsume() { +} + +void EventConsume::run() +{ + + SWSS_LOG_ENTER(); + event_handle_t hsub = events_init_subscriber(false, 1000); + + if (hsub == nullptr) { + SWSS_LOG_ERROR("Failed to initialize event subscriber"); + return; + } + + while (g_run) { + event_receive_op_t evt; + + if (reload_config_flag.load()) { + read_eventd_config(); + reload_config_flag.store(false); + } + + int rc = event_receive(hsub, evt); + if (rc != 0) { + if (rc == 11) { + // Timeout - loop will check g_run + continue; + } + SWSS_LOG_ERROR("Failed to receive rc=%d", rc); + continue; + } + handle_notification(evt); + } + events_deinit_subscriber(hsub); +} + +void EventConsume::read_eventd_config(bool read_all) { + // read manifest file for config options + if (read_all) { + read_config_and_purge(); + } + + // read from default map + static_event_table.clear(); + if (!parse(m_evProfile.c_str(), static_event_table)) { + SWSS_LOG_INFO("Can not initialize event map"); + closeSyslog(); + exit(0); + } + + SWSS_LOG_NOTICE("Event map is built as follows:"); + for (auto& x: static_event_table) { + SWSS_LOG_NOTICE(" %s (%s %s %s)", x.first.c_str(), x.second.severity.c_str(), x.second.enable.c_str(), x.second.static_event_msg.c_str()); + } +} + + +void EventConsume::handle_notification(const event_receive_op_t& evt) +{ + string ev_id, ev_msg, ev_src, ev_act, ev_timestamp, ev_type("EVENT"), + ev_static_msg(""), ev_reckey; + string ev_sev = string(EVENT_SEVERITY_INFORMATIONAL_STR); + bool is_raise = false; + bool is_clear = false; + bool is_ack = false; + vector vec; + + fetchFieldValues(evt, vec, ev_id, ev_msg, ev_src, ev_act, ev_timestamp); + + // flood protection. If a rogue application sends same event repeatedly, throttle repeated instances of that event + if (isFloodedEvent(ev_src, ev_act, ev_id, ev_msg)) { + return; + } + + // get static info + if (!staticInfoExists(ev_id, ev_act, ev_sev, ev_static_msg, vec)) { + return; + } + + // increment save seq-id for the newly received event + uint64_t new_seq_id = seq_id + 1; + + FieldValueTuple seqfv("id", to_string(new_seq_id)); + vec.push_back(seqfv); + + if (ev_act.length() > 0) { + SWSS_LOG_DEBUG("ev_act %s", ev_act.c_str()); + ev_type = "ALARM"; + string almkey = ev_id; + if (!ev_src.empty()) { + almkey += "|" + ev_src; + } + + if (ev_act.compare(EVENT_ACTION_RAISE_STR) == 0) { + is_raise = true; + // add entry to the lookup map + cal_lookup_map.insert(make_pair(almkey, new_seq_id)); + + // add acknowledged field intializing it to false + FieldValueTuple seqfv1("acknowledged", "false"); + vec.push_back(seqfv1); + m_alarmTable.set(to_string(new_seq_id), vec); + + // update alarm counters + updateAlarmStatistics(ev_sev, ev_act); + } else if (ev_act.compare(EVENT_ACTION_CLEAR_STR) == 0) { + is_clear = true; + SWSS_LOG_DEBUG(" Received clear alarm for %s", almkey.c_str()); + + bool ack_flag = false; + // remove entry from local cache, alarm table + if (!udpateLocalCacheAndAlarmTable(almkey, ack_flag)) { + SWSS_LOG_ERROR("Received clear for non-existent alarm %s", almkey.c_str()); + return; + } + + // update alarm counters ONLY if it has not been ack'd before. + // This is because when alarm is ack'd, alarms/severity counter is reduced already. + if (!ack_flag) { + updateAlarmStatistics(ev_sev, ev_act); + } else { + // if it has been ack'd before, ack counter would have been incremented for this alrm. + // Now is the time reduce it. + clearAckAlarmStatistic(); + } + } else { + // ack/unack events comes with seq-id of raised alarm as resource field. + // fetch details of "raised" alarm record + string raise_act; + string raise_ack_flag; + string raise_ts; + + // fetch information from raised event record + if (!fetchRaiseInfo(vec, ev_src, ev_id, ev_sev, raise_act, raise_ack_flag, raise_ts)) + { + SWSS_LOG_ERROR("Action %s on a non-existent Alarm id %s", ev_act.c_str(), ev_src.c_str()); + return; + } + + if (ev_act.compare(EVENT_ACTION_ACK_STR) == 0) { + if (raise_ack_flag.compare("true") == 0) { + SWSS_LOG_INFO("%s/%s is already acknowledged", ev_id.c_str(), ev_src.c_str()); + return; + } + if (raise_act.compare(EVENT_ACTION_RAISE_STR) == 0) { + is_ack = true; + SWSS_LOG_DEBUG("Received acknowledge event - %s/%s", ev_id.c_str(), ev_src.c_str()); + + // update the record with ack flag and ack-time and stats + updateAckInfo(is_ack, ev_timestamp, ev_sev, ev_act, ev_src); + } else { + SWSS_LOG_ERROR("Alarm %s/%s not in RAISE state", ev_id.c_str(), ev_src.c_str()); + return; + } + } else if (ev_act.compare(EVENT_ACTION_UNACK_STR) == 0) { + if (raise_ack_flag.compare("true") == 0) { + SWSS_LOG_DEBUG(" received un-ACKnowledge event - %s/%s", ev_id.c_str(), ev_src.c_str()); + + // update the record with ack flag and ack-time and stats + updateAckInfo(is_ack, ev_timestamp, ev_sev, ev_act, ev_src); + } else { + SWSS_LOG_INFO(" %s/%s is already un-acknowledged", ev_id.c_str(), ev_src.c_str()); + return; + } + } + } + } + // verify the size of history table; delete older entry; add new entry + seq_id = new_seq_id; + update_events(to_string(seq_id), ev_timestamp, vec); + + updateEventStatistics(true, is_raise, is_ack, is_clear); + + // raise a syslog message + writeToSyslog(ev_id.c_str(), (int)(SYSLOG_SEVERITY.find(ev_sev)->second), ev_type.c_str(), ev_act.c_str(), + ev_src.c_str(), ev_msg.c_str(), ev_static_msg.c_str()); + + return; +} + +void EventConsume::read_events() { + vector tuples; + m_eventTable.getContent(tuples); + + SWSS_LOG_ENTER(); + // find out last sequence-id; build local history list + for (auto tuple: tuples) { + for (auto fv: kfvFieldsValues(tuple)) { + if (fvField(fv) == "time-created") { + char* end; + uint64_t seq = strtoull(kfvKey(tuple).c_str(), &end,10); + if (seq > seq_id) { + seq_id = seq; + } + uint64_t val = strtoull(fvValue(fv).c_str(), &end,10); + event_history_list.push(make_pair( seq, val )); + } + } + } + SWSS_LOG_NOTICE("eventd sequence-id intialized to %lu", seq_id); +} + +void EventConsume::updateAlarmStatistics(string ev_sev, string ev_act) { + vector vec; + vector temp; + + // severity counter names are of lower case + transform(ev_sev.begin(), ev_sev.end(), ev_sev.begin(), ::tolower); + + if (m_alarmStatsTable.get("state", vec)) { + for (auto fv: vec) { + if (!fv.first.compare("alarms")) { + if ((ev_act.compare(EVENT_ACTION_RAISE_STR) == 0) || (ev_act.compare(EVENT_ACTION_UNACK_STR) == 0)) { + fv.second = to_string(stoi(fv.second.c_str())+1); + } else { + fv.second = to_string(stoi(fv.second.c_str())-1); + } + temp.push_back(fv); + } else if (!fv.first.compare(ev_sev)) { + if ((ev_act.compare(EVENT_ACTION_RAISE_STR) == 0) || (ev_act.compare(EVENT_ACTION_UNACK_STR) == 0)) { + fv.second = to_string(stoi(fv.second.c_str())+1); + } else { + fv.second = to_string(stoi(fv.second.c_str())-1); + } + temp.push_back(fv); + } else if (!fv.first.compare("acknowledged")) { + if (ev_act.compare(EVENT_ACTION_ACK_STR) == 0) { + fv.second = to_string(stoi(fv.second.c_str())+1); + } else if (ev_act.compare(EVENT_ACTION_UNACK_STR) == 0) { + fv.second = to_string(stoi(fv.second.c_str())-1); + } + temp.push_back(fv); + } + } + m_alarmStatsTable.set("state", temp); + } else { + SWSS_LOG_ERROR("Can not update alarm statistics (table does not exist)"); + } +} + +void EventConsume::updateEventStatistics(bool is_add, bool is_raise, bool is_ack, bool is_clear) { + vector vec; + vector temp; + + if (m_eventStatsTable.get("state", vec)) { + for (auto fv: vec) { + if (!fv.first.compare("events")) { + if (is_add) { + fv.second = to_string(stoi(fv.second.c_str())+1); + } else { + fv.second = to_string(stoi(fv.second.c_str())-1); + } + } else if (!fv.first.compare("raised")) { + if (is_raise) { + if (is_add) { + fv.second = to_string(stoi(fv.second.c_str())+1); + } else { + fv.second = to_string(stoi(fv.second.c_str())-1); + } + } + } else if (!fv.first.compare("cleared")) { + if (is_clear) { + if (is_add) { + fv.second = to_string(stoi(fv.second.c_str())+1); + } else { + fv.second = to_string(stoi(fv.second.c_str())-1); + } + } + } else if (!fv.first.compare("acked")) { + if (is_ack) { + if (is_add) { + fv.second = to_string(stoi(fv.second.c_str())+1); + } else { + fv.second = to_string(stoi(fv.second.c_str())-1); + } + } + } + temp.push_back(fv); + } + + m_eventStatsTable.set("state", temp); + } else { + SWSS_LOG_ERROR("Can not update event statistics (table does not exist)"); + } +} + +void EventConsume::modifyEventStats(string seq_id) { + vector rec; + m_eventTable.get(seq_id, rec); + bool is_raise = false; + bool is_clear = false; + bool is_ack = false; + for (auto fvr: rec) { + if (!fvr.first.compare("action")) { + if (!fvr.second.compare(EVENT_ACTION_RAISE_STR)) { + is_raise = true; + } else if (!fvr.second.compare(EVENT_ACTION_CLEAR_STR)) { + is_clear = true; + } + } + if (!fvr.first.compare("acknowledged")) { + if (!fvr.second.compare("true")) { + is_ack = true; + } + } + } + updateEventStatistics(false, is_raise, is_ack, is_clear); +} + +void EventConsume::purge_events() { + + uint32_t size = event_history_list.size(); + + while (size >= m_count) { + pair oldest_entry = event_history_list.top(); + SWSS_LOG_NOTICE("Rollover based on count(%d/%d). Deleting %lu", size, m_count, oldest_entry.first); + modifyEventStats(to_string(oldest_entry.first)); + m_eventTable.del(to_string(oldest_entry.first)); + event_history_list.pop(); + --size; + } + + const auto p1 = system_clock::now(); + uint64_t tnow_seconds = duration_cast(p1.time_since_epoch()).count(); + + while (!event_history_list.empty()) { + pair oldest_entry = event_history_list.top(); + uint64_t old_seconds = oldest_entry.second / 1000000000ULL; + + if ((tnow_seconds - old_seconds) > PURGE_SECONDS) { + SWSS_LOG_NOTICE("Rollover based on time (%u days). Deleting %lu.. now %lu old %lu", m_days, oldest_entry.second, tnow_seconds, old_seconds); + modifyEventStats(to_string(oldest_entry.first)); + m_eventTable.del(to_string(oldest_entry.first)); + event_history_list.pop(); + } else { + return; + } + } + return; +} + +void EventConsume::read_config_and_purge() { + m_days = 0; + m_count = 0; + // read from the manifest file + parse_config(m_dbProfile.c_str(), m_days, m_count); + SWSS_LOG_NOTICE("max-days %d max-records %d", m_days, m_count); + + // calculate purge interval in seconds, 84600 seconds per day + PURGE_SECONDS = static_cast(m_days) * 86400; + + // purge events based on # of days + purge_events(); +} + +void EventConsume::update_events(string seq_id, string ts, vector vec) { + // purge events based on # of days + purge_events(); + + // now add the event to the event table + m_eventTable.set(seq_id, vec); + + // store it into the event history list + char* end; + uint64_t seq = strtoull(seq_id.c_str(), &end, 10); + uint64_t val = strtoull(ts.c_str(), &end, 10); + event_history_list.push(make_pair( seq, val )); +} + +void EventConsume::resetAlarmStats(int alarms, int critical, int major, int minor, int warning, int acknowledged) { + vector temp; + FieldValueTuple fv; + map::iterator it; + for (it = SYSLOG_SEVERITY_STR.begin(); it != SYSLOG_SEVERITY_STR.end(); it++) { + // there wont be any informational alarms + if (it->second.compare(EVENT_SEVERITY_CRITICAL_STR) == 0) { + fv = FieldValueTuple("critical", to_string(critical)); + temp.push_back(fv); + } else if (it->second.compare(EVENT_SEVERITY_MAJOR_STR) == 0) { + fv = FieldValueTuple("major", to_string(major)); + temp.push_back(fv); + } else if (it->second.compare(EVENT_SEVERITY_MINOR_STR) == 0) { + fv = FieldValueTuple("minor", to_string(minor)); + temp.push_back(fv); + } else if (it->second.compare(EVENT_SEVERITY_WARNING_STR) == 0) { + fv = FieldValueTuple("warning", to_string(warning)); + temp.push_back(fv); + } + } + fv = FieldValueTuple("alarms", to_string(alarms)); + temp.push_back(fv); + fv = FieldValueTuple("acknowledged", to_string(acknowledged)); + temp.push_back(fv); + m_alarmStatsTable.set("state", temp); +} + +void EventConsume::clearAckAlarmStatistic() { + vector vec; + vector temp; + + if (m_alarmStatsTable.get("state", vec)) { + bool ack_found = false; + for (auto fv: vec) { + if (!ack_found && !fv.first.compare("acknowledged")) { + fv.second = to_string(stoi(fv.second.c_str())-1); + ack_found = true; + } + temp.push_back(fv); + } + m_alarmStatsTable.set("state", temp); + } +} + + +void EventConsume::fetchFieldValues(const event_receive_op_t& evt, + vector& vec, + string& ev_id, + string& ev_msg, + string& ev_src, + string& ev_act, + string &ev_timestamp) { + + ev_timestamp = to_string(evt.publish_epoch_ms); + vec.push_back(FieldValueTuple("time-created", ev_timestamp)); + for (const auto& idx : evt.params) { + if (idx.first == "type-id") { + ev_id = idx.second; + vec.push_back(FieldValueTuple("type-id", ev_id)); + } else if (idx.first == "text") { + ev_msg = idx.second; + vec.push_back(FieldValueTuple("text", ev_msg)); + } else if (idx.first == "resource") { + ev_src = idx.second; + vec.push_back(idx); + } else if (idx.first == "action") { + ev_act = idx.second; + // for events, action is empty + if (!ev_act.empty()) { + vec.push_back(FieldValueTuple("action", ev_act)); + } + } + } +} + +bool EventConsume::isFloodedEvent(string ev_src, string ev_act, string ev_id, string ev_msg) { + // flood protection. If a rogue application sends same event repeatedly, throttle repeated instances of that event + if (!flood_ev_resource.compare(ev_src) && + !flood_ev_action.compare(ev_act) && + !flood_ev_id.compare(ev_id) && + !(flood_ev_msg.compare(ev_msg))) { + SWSS_LOG_INFO("Ignoring the event %s from %s action %s msg %s as it is repeated", ev_id.c_str(), ev_src.c_str(), ev_act.c_str(), ev_msg.c_str()); + return true; + } + + flood_ev_resource = ev_src; + flood_ev_action = ev_act; + flood_ev_id = ev_id; + flood_ev_msg = ev_msg; + return false; +} + +bool EventConsume::staticInfoExists(string &ev_id, string &ev_act, string &ev_sev, string &ev_static_msg, vector &vec) { + auto it = static_event_table.find(ev_id); + if (it != static_event_table.end()) { + EventInfo tmp = (EventInfo) (it->second); + // discard the event as event_static_map shows enable is false for this event + if (tmp.enable == EVENT_ENABLE_FALSE_STR) { + SWSS_LOG_NOTICE("Discarding event <%s> as it is set to disabled", ev_id.c_str()); + return false; + } + + // get severity in the map and store it in the db + ev_sev = tmp.severity; + ev_static_msg = tmp.static_event_msg; + SWSS_LOG_DEBUG("static info: <%s> <%s> ", tmp.severity.c_str(), tmp.static_event_msg.c_str()); + + FieldValueTuple seqfv1("severity", tmp.severity); + vec.push_back(seqfv1); + return true; + } else { + // dont process the incoming alarms if action is neither raise nor clear + // for ack/unack, no need for this check + if ((ev_act.compare(EVENT_ACTION_ACK_STR) && ev_act.compare(EVENT_ACTION_UNACK_STR))) { + // TODO currently, applications may raise events but default evprofile doesnt contain + // ID info. This is planned for later. + // Change it back to SWSS_LOG_ERROR once event profile contains event-ids + SWSS_LOG_DEBUG("static info NOT FOUND for <%s> ", ev_id.c_str()); + return false; + } + } + return true; +} + +bool EventConsume::udpateLocalCacheAndAlarmTable(string almkey, bool &ack_flag) { + // find and remove the raised alarm + uint64_t lookup_seq_id = 0; + auto it = cal_lookup_map.find(almkey); + if (it != cal_lookup_map.end()) { + lookup_seq_id = (uint64_t) (it->second); + cal_lookup_map.erase(almkey); + + // get status of is_aknowledged flag so that we dont decrement counters twice + vector alm_rec; + m_alarmTable.get(to_string(lookup_seq_id), alm_rec); + for (auto fvr: alm_rec) { + if (!fvr.first.compare("acknowledged")) { + ack_flag = (fvr.second.compare("true") == 0) ? true : false; + break; + } + } + + // delete the record from alarm table + m_alarmTable.del(to_string(lookup_seq_id)); + } else { + // possible - when event profile removes alarms for which enable is false and application cleared them later. + // ignore by logging a debug message.. + SWSS_LOG_INFO("Received alarm-clear for non-existing alarm %s", almkey.c_str()); + return false; + } + return true; +} + +void EventConsume::initStats() { + vector vec; + // possible after a cold-boot or very first time + if (! m_eventStatsTable.get("state", vec)) { + FieldValueTuple fv; + vector temp; + + SWSS_LOG_DEBUG("resetting Event Statistics table"); + fv = FieldValueTuple("events", to_string(0)); + temp.push_back(fv); + fv = FieldValueTuple("raised", to_string(0)); + temp.push_back(fv); + fv = FieldValueTuple("cleared", to_string(0)); + temp.push_back(fv); + fv = FieldValueTuple("acked", to_string(0)); + temp.push_back(fv); + m_eventStatsTable.set("state", temp); + } + if (! m_alarmStatsTable.get("state", vec)) { + SWSS_LOG_DEBUG("resetting Alarm Statistics table"); + resetAlarmStats(0, 0, 0, 0, 0, 0); + } +} + +void EventConsume::updateAckInfo(bool is_ack, string ev_timestamp, string ev_sev, string ev_act, string ev_src) { + vector ack_vec; + + FieldValueTuple seqfv1("acknowledged", (is_ack ? "true" : "false")); + ack_vec.push_back(seqfv1); + + FieldValueTuple seqfv2("acknowledge-time", ev_timestamp); + ack_vec.push_back(seqfv2); + + // update alarm stats + updateAlarmStatistics(ev_sev, ev_act); + + // update alarm/event tables for the "raise" record with ack flag and ack timestamp + // for ack/unack, ev_src contains the "seq-id" + m_alarmTable.set(ev_src, ack_vec); + m_eventTable.set(ev_src, ack_vec); +} + + +bool EventConsume::fetchRaiseInfo(vector &vec, string ev_src, string &ev_id, string &ev_sev, string &raise_act, + string &raise_ack_flag, string &raise_ts) { + vector raise_vec; + if (!m_alarmTable.get(ev_src, raise_vec)) { + return false; + } + for (auto fv: raise_vec) { + if (!fv.first.compare("type-id")) { + ev_id = fv.second; + vec.push_back(fv); + } + if (!fv.first.compare("severity")) { + ev_sev = fv.second; + vec.push_back(fv); + } + if (!fv.first.compare("action")) { + raise_act = fv.second; + } + if (!fv.first.compare("acknowledged")) { + raise_ack_flag = fv.second; + } + if (!fv.first.compare("time-created")) { + raise_ts = fv.second; + } + } + return true; +} + + diff --git a/src/sonic-eventd/src/eventconsume.h b/src/sonic-eventd/src/eventconsume.h new file mode 100644 index 00000000000..bd71a6f0b27 --- /dev/null +++ b/src/sonic-eventd/src/eventconsume.h @@ -0,0 +1,54 @@ +#ifndef __EVENTCONSUME_H__ +#define __EVENTCONSUME_H__ + +#include +#include +#include +#include +#include +#include "eventutils.h" + +extern std::atomic reload_config_flag; +extern volatile bool g_run; + +class EventConsume +{ +public: + EventConsume(swss::DBConnector *dbConn, + std::string evProfile =EVENTD_DEFAULT_MAP_FILE, + std::string dbProfile =EVENTD_CONF_FILE); + ~EventConsume(); + void read_eventd_config(bool read_all=true); + void run(); + +private: + swss::Table m_eventTable; + swss::Table m_alarmTable; + swss::Table m_eventStatsTable; + swss::Table m_alarmStatsTable; + u_int32_t m_days, m_count; + std::string m_evProfile; + std::string m_dbProfile; + + void handle_notification(const event_receive_op_t& evt); + void read_events(); + void updateAlarmStatistics(std::string ev_sev, std::string ev_act); + void updateEventStatistics(bool is_add, bool is_alarm, bool is_ack, bool is_clear); + void read_config_and_purge(); + void update_events(std::string seq_id, std::string ts, std::vector vec); + void purge_events(); + void modifyEventStats(std::string seq_id); + void clearAckAlarmStatistic(); + void resetAlarmStats(int, int, int, int, int, int); + void fetchFieldValues(const event_receive_op_t& evt , std::vector &, std::string &, std::string &, std::string &, std::string &, std::string &); + bool isFloodedEvent(std::string, std::string, std::string, std::string); + bool staticInfoExists(std::string &, std::string &, std::string &, std::string &, std::vector &); + bool udpateLocalCacheAndAlarmTable(std::string, bool &); + void initStats(); + void updateAckInfo(bool, std::string, std::string, std::string, std::string); + bool fetchRaiseInfo(std::vector &, std::string, std::string &, std::string &, std::string &, std::string &, std::string &); +}; + + +#endif /* __EVENTCONSUME_H__ */ + diff --git a/src/sonic-eventd/src/eventdb.cpp b/src/sonic-eventd/src/eventdb.cpp new file mode 100644 index 00000000000..5f41fc8d195 --- /dev/null +++ b/src/sonic-eventd/src/eventdb.cpp @@ -0,0 +1,26 @@ +#include "eventconsume.h" +#include + +void signalHandler(const int signal) { + + if (signal == SIGINT) { + reload_config_flag.store(true); + } +} + +int main() +{ + swss::Logger::getInstance().setMinPrio(swss::Logger::SWSS_NOTICE); + + swss::DBConnector eventDb("EVENT_DB", 0); + + // register signal handlers + signal(SIGINT, signalHandler); + + EventConsume evtd(&eventDb); + + evtd.run(); + + return 0; +} + diff --git a/src/sonic-eventd/src/eventutils.cpp b/src/sonic-eventd/src/eventutils.cpp new file mode 100644 index 00000000000..ad674379896 --- /dev/null +++ b/src/sonic-eventd/src/eventutils.cpp @@ -0,0 +1,112 @@ +#include "eventutils.h" +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +using namespace swss; +using namespace std; + +using json = nlohmann::json; + +bool isValidSeverity(string severityStr) { + transform(severityStr.begin(), severityStr.end(), severityStr.begin(), ::toupper); + if (severityStr == EVENT_SEVERITY_MAJOR_STR) return true; + if (severityStr == EVENT_SEVERITY_CRITICAL_STR) return true; + if (severityStr == EVENT_SEVERITY_MINOR_STR) return true; + if (severityStr == EVENT_SEVERITY_WARNING_STR) return true; + if (severityStr == EVENT_SEVERITY_INFORMATIONAL_STR) return true; + return false; +} + +bool isValidEnable(string enableStr) { + if (enableStr == EVENT_ENABLE_TRUE_STR) return true; + if (enableStr == EVENT_ENABLE_FALSE_STR) return true; + return false; +} + +bool parse_config(const char *filename, unsigned int& days, unsigned int& count) { + days = EHT_MAX_DAYS; + count = EHT_MAX_ELEMS; + ifstream ifs(filename); + + if (!ifs.is_open()) { + SWSS_LOG_ERROR("Failed to open file: %s", filename); + return false; + } + + json j; + try { + j = json::parse(ifs); + } + catch (const json::parse_error &e) { + SWSS_LOG_ERROR("Error parsing config file %s:%s ", filename, e.what()); + return false; + } + catch (const std::exception &e) { + SWSS_LOG_ERROR("Unexpected error parsing config file %s: %s", filename, e.what()); + return false; + } + + for (json::iterator it = j.begin(); it != j.end(); ++it) { + if(it.key() == "max-days") { + days = it.value(); + } + if(it.key() == "max-records") { + count = it.value(); + } + } + return true; +} + +bool parse(const char *filename, EventMap& tmp_event_table) { + ifstream file(filename); + if (!file.is_open()) { + SWSS_LOG_ERROR("Failed to open file: %s", filename); + return false; + } + + json j; + try { + j = json::parse(file); + } + catch (const json::parse_error &e) { + SWSS_LOG_ERROR("Error parsing profile file %s:%s ", filename, e.what()); + return false; + } + catch (const std::exception &e) { + SWSS_LOG_ERROR("Unexpected error parsing config file %s: %s", filename, e.what()); + return false; + } + + if (!j.contains("events") || j["events"].empty()) { + SWSS_LOG_NOTICE("No entries in 'events' field in %s", filename); + return false; + } + + + for (const auto& elem : j["events"]) { + if (!elem.contains("name") || !elem.contains("severity") || + !elem.contains("enable")) { + SWSS_LOG_ERROR("Missing required fields in event entry in %s", filename); + continue; + } + struct EventInfo_t ev_info; + string ev_name = elem["name"]; + ev_info.severity = elem["severity"]; + ev_info.enable = elem["enable"]; + if (elem.contains("message")) { + ev_info.static_event_msg = elem["message"]; + } + tmp_event_table.emplace(ev_name, ev_info); + } + + return true; +} + diff --git a/src/sonic-eventd/src/eventutils.h b/src/sonic-eventd/src/eventutils.h new file mode 100644 index 00000000000..40633893f4f --- /dev/null +++ b/src/sonic-eventd/src/eventutils.h @@ -0,0 +1,41 @@ +#ifndef __EVENTUTILS_H__ +#define __EVENTUTILS_H__ + +#include +#include + +const std::string EVENT_SEVERITY_CRITICAL_STR = "CRITICAL"; +const std::string EVENT_SEVERITY_MAJOR_STR = "MAJOR"; +const std::string EVENT_SEVERITY_MINOR_STR = "MINOR"; +const std::string EVENT_SEVERITY_WARNING_STR = "WARNING"; +const std::string EVENT_SEVERITY_INFORMATIONAL_STR = "INFORMATIONAL"; + +const std::string EVENT_ENABLE_TRUE_STR = "true"; +const std::string EVENT_ENABLE_FALSE_STR = "false"; + +const std::string EVENT_ACTION_RAISE_STR = "RAISE"; +const std::string EVENT_ACTION_CLEAR_STR = "CLEAR"; +const std::string EVENT_ACTION_ACK_STR = "ACKNOWLEDGE"; +const std::string EVENT_ACTION_UNACK_STR = "UNACKNOWLEDGE"; + +constexpr char EVENTD_DEFAULT_MAP_FILE[] = "/etc/evprofile/default.json"; + +constexpr size_t EHT_MAX_ELEMS = 40000; +constexpr size_t EHT_MAX_DAYS = 30; +constexpr char EVENTD_CONF_FILE[] = "/etc/eventd.json"; + +typedef struct EventInfo_t { + std::string severity; + std::string enable; + std::string static_event_msg; +} EventInfo; + +//unordered_map static_event_table; +typedef std::unordered_map EventMap; + +bool isValidSeverity(std::string severityStr); +bool isValidEnable(std::string enableStr); +bool parse_config(const char *filename, unsigned int& days, unsigned int& count); +bool parse(const char *filename, EventMap& tmp_event_table); + +#endif diff --git a/src/sonic-eventd/src/loghandler.cpp b/src/sonic-eventd/src/loghandler.cpp new file mode 100755 index 00000000000..4587241e322 --- /dev/null +++ b/src/sonic-eventd/src/loghandler.cpp @@ -0,0 +1,48 @@ +#include +#include +#include + + + +// Safe fallback for null or empty C-style strings +const char* safe(const char* s) { + return (s && std::strlen(s) > 0) ? s : ""; +} + + +extern "C" void openSyslog() { + openlog (NULL, LOG_CONS | LOG_PID | LOG_NDELAY, LOG_LOCAL4); +} + +extern "C" void writeToSyslog(const char* ev_id, int ev_sev, const char* ev_type, const char* ev_act, + const char* ev_src, const char* ev_msg, const char* ev_static_msg) { + int SYSLOG_FACILITY = LOG_LOCAL4; + + if (!ev_act || std::strlen(ev_act) == 0) { + const char LOG_FORMAT[] = "[%s], %%%s: %%%%%s: %s %s"; + // event Type + // Event Name + // Event Source + // Static Desc + // Dynamic Desc + + // raise a syslog message + syslog(LOG_MAKEPRI(ev_sev, SYSLOG_FACILITY), LOG_FORMAT, + safe(ev_type), safe(ev_id), safe(ev_src), safe(ev_static_msg), safe(ev_msg)); + } else { + const char LOG_FORMAT[] = "[%s] (%s), %%%s: %%%%%s: %s %s"; + // event Type + // event action + // Event Name + // Event Source + // Static Desc + // Dynamic Desc + // raise a syslog message + syslog(LOG_MAKEPRI(ev_sev, SYSLOG_FACILITY), LOG_FORMAT, + safe(ev_type), safe(ev_act), safe(ev_id), safe(ev_src), safe(ev_static_msg), safe(ev_msg)); + } +} + +extern "C" void closeSyslog() { + closelog (); +} diff --git a/src/sonic-eventd/src/loghandler.h b/src/sonic-eventd/src/loghandler.h new file mode 100644 index 00000000000..bb55d1bb6d7 --- /dev/null +++ b/src/sonic-eventd/src/loghandler.h @@ -0,0 +1,7 @@ +#include +extern "C" void openSyslog(); +extern "C" void writeToSyslog(const char* ev_id, int ev_sev, const char* ev_type, + const char* ev_act, const char* ev_src, const char* ev_msg, + const char* ev_static_msg); +extern "C" void closeSyslog(); + diff --git a/src/sonic-eventd/src/subdir.mk b/src/sonic-eventd/src/subdir.mk index eb067fd6e86..c56e4b17e63 100644 --- a/src/sonic-eventd/src/subdir.mk +++ b/src/sonic-eventd/src/subdir.mk @@ -1,9 +1,11 @@ CC := g++ TEST_OBJS += ./src/eventd.o +EVENTDB_TEST_OBJS += ./src/eventd.o ./src/eventconsume.o ./src/eventutils.o ./src/loghandler.o OBJS += ./src/eventd.o ./src/main.o +EVENTDB_OBJS += ./src/eventdb.o ./src/eventconsume.o ./src/loghandler.o ./src/eventutils.o -C_DEPS += ./src/eventd.d ./src/main.d +C_DEPS += ./src/eventd.d ./src/main.d ./src/eventdb.d ./src/eventconsume.d ./src/loghandler.d ./src/eventutils.d src/%.o: src/%.cpp @echo 'Building file: $<' diff --git a/src/sonic-eventd/tests/default.json b/src/sonic-eventd/tests/default.json new file mode 100755 index 00000000000..9a151118851 --- /dev/null +++ b/src/sonic-eventd/tests/default.json @@ -0,0 +1,24 @@ +{ + "__README__" : "This is default map of events that eventd uses. Developer can modify this file and send SIGINT to eventd to make it read and use the updated file. Alternatively developer can test the new event by adding it to a custom event profile and use 'event profile ' command to apply that profile without having to send SIGINT to eventd. Developer need to commit default.json file with the new event after testing it out. Supported severities are: CRITICAL, MAJOR, MINOR, WARNING and INFORMATIONAL. Supported enable flag values are: true and false.", + "events":[ + { + "name": "SYSTEM_STATE", + "severity": "INFORMATIONAL", + "enable": "true", + "message" : "" + }, + { + "name": "SENSOR_TEMP_HIGH", + "severity": "WARNING", + "enable": "true", + "message" : "" + }, + { + "name": "USER_LOGIN", + "severity": "INFORMATIONAL", + "enable": "true", + "message" : "" + } + ] +} + diff --git a/src/sonic-eventd/tests/eventd.json b/src/sonic-eventd/tests/eventd.json new file mode 100755 index 00000000000..2236e0c6a9e --- /dev/null +++ b/src/sonic-eventd/tests/eventd.json @@ -0,0 +1,5 @@ +{ + "__README__": "Specify size of event history table. Whichever limit is hit first, eventd wraps event history table around and deletes older records.", + "max-records": 200, + "max-days": 30 +} diff --git a/src/sonic-eventd/tests/eventdb_database_config.json b/src/sonic-eventd/tests/eventdb_database_config.json new file mode 100644 index 00000000000..3fb6d6339af --- /dev/null +++ b/src/sonic-eventd/tests/eventdb_database_config.json @@ -0,0 +1,107 @@ +{ + "INSTANCES": { + "redis":{ + "hostname" : "127.0.0.1", + "port": 6379, + "unix_socket_path": "/var/run/redis/redis.sock" + }, + "redis1":{ + "hostname" : "127.0.0.1", + "port": 6380, + "unix_socket_path": "/var/run/redis/redis1.sock" + }, + "redis2":{ + "hostname" : "127.0.0.1", + "port": 6381, + "unix_socket_path": "/var/run/redis/redis2.sock" + }, + "redis3":{ + "hostname" : "127.0.0.1", + "port": 6382, + "unix_socket_path": "/var/run/redis/redis3.sock" + }, + "redis4":{ + "hostname" : "127.0.0.1", + "port": 6383, + "unix_socket_path": "/var/run/redis/redis4.sock" + } + }, + "DATABASES" : { + "APPL_DB" : { + "id" : 0, + "separator": ":", + "instance" : "redis" + }, + "ASIC_DB" : { + "id" : 1, + "separator": ":", + "instance" : "redis" + }, + "COUNTERS_DB" : { + "id" : 2, + "separator": ":", + "instance" : "redis" + }, + "CONFIG_DB" : { + "id" : 4, + "separator": "|", + "instance" : "redis" + }, + "PFC_WD_DB" : { + "id" : 5, + "separator": ":", + "instance" : "redis" + }, + "FLEX_COUNTER_DB" : { + "id" : 5, + "separator": ":", + "instance" : "redis" + }, + "STATE_DB" : { + "id" : 6, + "separator": "|", + "instance" : "redis" + }, + "SNMP_OVERLAY_DB" : { + "id" : 7, + "separator": "|", + "instance" : "redis" + }, + "RESTAPI_DB": { + "id": 8, + "separator": "|", + "instance": "redis" + }, + "GB_ASIC_DB": { + "id": 9, + "separator": ":", + "instance": "redis" + }, + "GB_COUNTERS_DB": { + "id": 10, + "separator": ":", + "instance": "redis" + }, + "GB_FLEX_COUNTER_DB": { + "id": 11, + "separator": ":", + "instance": "redis" + }, + "STATE_DB2" : { + "id" : 13, + "separator": "|", + "instance" : "redis" + }, + "APPL_STATE_DB" : { + "id" : 14, + "separator": ":", + "instance" : "redis" + }, + "EVENT_DB" : { + "id" : 15, + "separator": ":", + "instance" : "redis" + } + }, + "VERSION" : "1.0" +} diff --git a/src/sonic-eventd/tests/eventdb_database_config_global.json b/src/sonic-eventd/tests/eventdb_database_config_global.json new file mode 100644 index 00000000000..e55e1ab1b18 --- /dev/null +++ b/src/sonic-eventd/tests/eventdb_database_config_global.json @@ -0,0 +1,8 @@ +{ + "INCLUDES" : [ + { + "include" : "eventdb_database_config.json" + } + ], + "VERSION" : "1.0" +} diff --git a/src/sonic-eventd/tests/eventdb_ut.cpp b/src/sonic-eventd/tests/eventdb_ut.cpp new file mode 100644 index 00000000000..1826c6abf16 --- /dev/null +++ b/src/sonic-eventd/tests/eventdb_ut.cpp @@ -0,0 +1,438 @@ +#include +#include "gtest/gtest.h" +#include +#include +#include +#include +#include + +#include +#include "../src/eventd.h" +#include "../src/eventconsume.h" + +using namespace std; +using namespace swss; + +extern volatile bool g_run; +extern uint64_t seq_id; +extern uint64_t PURGE_SECONDS; +extern unordered_map cal_lookup_map; +typedef pair pi; +extern priority_queue, greater > event_history_list; +extern EventMap static_event_table; + + +#define TEST_DB "APPL_DB" +#define TEST_NAMESPACE "asic0" +#define INVALID_NAMESPACE "invalid" + +//extern void run_pub(void *mock_pub, const string wr_source, internal_events_lst_t &lst); + +string existing_file = "./tests//eventdb_database_config.json"; +string nonexisting_file = "./tests//database_config_nonexisting.json"; +string global_existing_file = "./tests//eventdb_database_config_global.json"; + + + +typedef struct { + map ev_data; + string severity; +} ev_data_struct; +map, ev_data_struct> event_data_t = { + {{"SYSTEM_STATE","NOTIFY"}, + {{{"type-id","SYSTEM_STATE"}, {"resource", "system-state"}, {"text", "System Ready"}}, + "INFORMATIONAL"}}, + {{"INTERFACE_OPER_STATE", "NOTIFY"}, + {{{"type-id", "INTERFACE_OPER_STATE"}, {"resource", "Ethernet1"}, {"text", "Operational Down"}, {"state", "up"}}, + "INFORMATIONAL"}}, + {{"SENSOR_TEMP_HIGH", "RAISE"}, + {{{"type-id", "SENSOR_TEMP_HIGH"}, {"resource", "cpu_sensor"}, {"action", "RAISE"}, {"text", "sensor temp 55C, threshold temp 52C"}}, + "WARNING"}}, + {{"SENSOR_TEMP_HIGH", "CLEAR"}, + {{{"type-id", "SENSOR_TEMP_HIGH"}, {"resource", "cpu_sensor"}, {"action", "CLEAR"}, {"text", "sensor temp 50C, threshold temp 52C"}}, + "WARNING"}} +}; + + +typedef struct { + int id; + string source; + string tag; + string rid; + string seq; +} test_data_t; + +const string event_profile = "tests/default.json"; +const string event_db_profile = "tests/eventd.json"; + +void delete_evdb(DBConnector& dbConn) +{ + auto keys = dbConn.keys("*"); + for (const auto& key : keys) + { + dbConn.del(key); + } +} + +void clear_eventdb_data() +{ + g_run = true; + seq_id =0; + cal_lookup_map.clear(); + PURGE_SECONDS = 86400; + event_history_list = priority_queue, greater >(); + static_event_table.clear(); +} + +void run_pub(void *mock_pub, const string wr_source, internal_events_lst_t &lst) +{ + for(internal_events_lst_t::const_iterator itc = lst.begin(); itc != lst.end(); ++itc) { + EXPECT_EQ(0, zmq_message_send(mock_pub, wr_source, *itc)); + } +} + +class EventDbFixture : public ::testing::Test { + protected: + void SetUp() override { + g_run = true; + zctx = zmq_ctx_new(); + EXPECT_TRUE(NULL != zctx); + + /* Run proxy to enable receive as capture test needs to receive */ + pxy = new eventd_proxy(zctx); + EXPECT_TRUE(NULL != pxy); + + /* Starting proxy */ + EXPECT_EQ(0, pxy->init()); + eventDb = new DBConnector("EVENT_DB", 0, true); + //delete any entries in the EVENT_DB + delete_evdb(*eventDb); + evtConsume= new EventConsume(eventDb, event_profile, event_db_profile); + consumerThread = std::thread(&EventConsume::run, evtConsume); + } + + void TearDown() override { + g_run = false; + + if (consumerThread.joinable()) { + consumerThread.join(); // Wait for clean exit + } + + delete evtConsume; + evtConsume = nullptr; + + delete eventDb; + eventDb = nullptr; + + zmq_ctx_term(zctx); + zctx = nullptr; + + delete pxy; + pxy= nullptr; + + clear_eventdb_data(); + } + EventConsume *evtConsume; + DBConnector *eventDb; + void *zctx; + eventd_proxy *pxy; + std::thread consumerThread; +}; + + +void *init_publish(void *zctx) +{ + void *mock_pub = zmq_socket (zctx, ZMQ_PUB); + EXPECT_TRUE(NULL != mock_pub); + EXPECT_EQ(0, zmq_connect(mock_pub, get_config(XSUB_END_KEY).c_str())); + + /* Provide time for async connect to complete */ + this_thread::sleep_for(chrono::milliseconds(200)); + + return mock_pub; +} + +internal_event_t create_ev(const int id, const int ev_id, const string& event, + const string& action, + map> &verify_data) +{ + internal_event_t event_data; + stringstream ss; + + test_data_t data; + data.id = id; + data.source = "source" + to_string(id); + data.tag = "tag" + to_string(id); + data.rid = "guid-" + to_string(id); + data.seq = to_string(id); + + event_data[EVENT_STR_DATA] = convert_to_json( + data.source + ":" + data.tag, map(event_data_t[make_pair(event, action)].ev_data)); + event_data[EVENT_RUNTIME_ID] = data.rid; + event_data[EVENT_SEQUENCE] = data.seq; + auto timepoint = system_clock::now(); + ss << duration_cast(timepoint.time_since_epoch()).count(); + + event_data[EVENT_EPOCH] = ss.str(); + unordered_map ev_val(event_data_t[make_pair(event, action)].ev_data.begin(), + event_data_t[make_pair(event, action)].ev_data.end()); + ev_val.insert({{"id", to_string(ev_id)}}); + ev_val.insert({{"time-created", ss.str()}}); + ev_val.insert({{"severity", event_data_t[make_pair(event, action)].severity}}); + + if (action == "RAISE") { + ev_val.insert({{"acknowledged", "false"}}); + ev_val.insert({{"action", action}}); + } + verify_data.insert({to_string(ev_id), ev_val}); + + return event_data; +} + + +void verify_events(map> verifyData) +{ + DBConnector eventDb("EVENT_DB", 0, true); + auto dbKeys = eventDb.keys("EVENT:*"); + EXPECT_EQ(verifyData.size(), dbKeys.size()); + + for (const auto& vKey : verifyData) + { + string evtKey = "EVENT:" + vKey.first; + EXPECT_TRUE(count(dbKeys.begin(), dbKeys.end(), evtKey) == 1); + auto ev = eventDb.hgetall(evtKey); + EXPECT_TRUE(ev == verifyData[vKey.first]); + } +} + + +void verify_alarms_clear(map> verifyData) +{ + DBConnector eventDb("EVENT_DB", 0, true); + auto dbKeys = eventDb.keys("ALARM:*"); + EXPECT_EQ(0, dbKeys.size()); +} + +void verify_alarms_raise(map> verifyData) +{ + DBConnector eventDb("EVENT_DB", 0, true); + auto dbKeys = eventDb.keys("ALARM:*"); + EXPECT_EQ(verifyData.size(), dbKeys.size()); + + for (const auto& vKey : verifyData) + { + string almKey = "ALARM:" + vKey.first; + EXPECT_TRUE(count(dbKeys.begin(), dbKeys.end(), almKey) == 1); + auto ev = eventDb.hgetall(almKey); + EXPECT_TRUE(ev == verifyData[vKey.first]); + } +} + +TEST_F(EventDbFixture, validate_events) +{ + printf("Validate events TEST started\n"); + + internal_events_lst_t wr_evts; + string wr_source("eventd-test"); + + void *mock_pub = init_publish(zctx); + + map> verify_data; + + wr_evts.push_back(create_ev(1, 1, "SENSOR_TEMP_HIGH", "RAISE", verify_data)); + wr_evts.push_back(create_ev(2, 2, "SYSTEM_STATE", "NOTIFY", verify_data)); + + run_pub(mock_pub, wr_source, wr_evts); + + this_thread::sleep_for(chrono::milliseconds(2000)); + + // verify events logged in DB. + verify_events(verify_data); + + //send events to close eventdb task + g_run = false; + wr_evts.clear(); + wr_evts.push_back(create_ev(301, 3, "SYSTEM_STATE", "NOTIFY", verify_data)); + run_pub(mock_pub, wr_source, wr_evts); + this_thread::sleep_for(chrono::milliseconds(2000)); + zmq_close(mock_pub); + + printf("Validate events TEST completed\n"); + +} + + +TEST_F(EventDbFixture, validate_alarms) +{ + printf("Validate alarms TEST started\n"); + internal_events_lst_t wr_evts; + string wr_source("eventd-test"); + void *mock_pub = init_publish(zctx); + + map> verify_data; + wr_evts.push_back(create_ev(3, 1, "SENSOR_TEMP_HIGH", "RAISE", verify_data)); + + run_pub(mock_pub, wr_source, wr_evts); + + this_thread::sleep_for(chrono::milliseconds(2000)); + + // verify events logged in DB. + verify_events(verify_data); + verify_alarms_raise(verify_data); + + wr_evts.clear(); + wr_evts.push_back(create_ev(4, 2, "SENSOR_TEMP_HIGH", "CLEAR", verify_data)); + + run_pub(mock_pub, wr_source, wr_evts); + this_thread::sleep_for(chrono::milliseconds(2000)); + verify_events(verify_data); + verify_alarms_clear(verify_data); + g_run = false; + wr_evts.clear(); + wr_evts.push_back(create_ev(302, 3, "SYSTEM_STATE", "NOTIFY", verify_data)); + run_pub(mock_pub, wr_source, wr_evts); + this_thread::sleep_for(chrono::milliseconds(2000)); + zmq_close(mock_pub); + printf("Validate alarms TEST completed\n"); +} + + +TEST_F(EventDbFixture, expiry_purge) +{ + printf("Expiry purge TEST started\n"); + internal_events_lst_t wr_evts; + string wr_source("eventd-test"); + void *mock_pub = init_publish(zctx); + map> verify_data; + //set epoch time back to 31 days + auto timepoint = system_clock::now(); + auto epochTimeNs = duration_cast(timepoint.time_since_epoch()).count(); + epochTimeNs = epochTimeNs - (32UL * 24 * 60 * 60 * 1000 * 1000 * 1000); + auto ev_data = create_ev(5, 1, "SENSOR_TEMP_HIGH", "RAISE", verify_data); + + ev_data[EVENT_EPOCH] = to_string(epochTimeNs); + verify_data["1"]["time-created"] = ev_data[EVENT_EPOCH]; + wr_evts.push_back(ev_data); + + run_pub(mock_pub, wr_source, wr_evts); + this_thread::sleep_for(chrono::milliseconds(2000)); + + // verify events logged in DB. + verify_events(verify_data); + verify_alarms_raise(verify_data); + + wr_evts.clear(); + verify_data.clear(); + wr_evts.push_back(create_ev(6, 2, "SENSOR_TEMP_HIGH", "CLEAR", verify_data)); + run_pub(mock_pub, wr_source, wr_evts); + this_thread::sleep_for(chrono::milliseconds(2000)); + + verify_events(verify_data); + verify_alarms_clear(verify_data); + wr_evts.clear(); + g_run = false; + wr_evts.push_back(create_ev(303, 3, "SYSTEM_STATE", "NOTIFY", verify_data)); + run_pub(mock_pub, wr_source, wr_evts); + this_thread::sleep_for(chrono::milliseconds(2000)); + zmq_close(mock_pub); + printf("Expiry purge TEST completed\n"); +} + + +TEST_F(EventDbFixture, rollover_purge) +{ + printf("Rollover purge TEST started\n"); + internal_events_lst_t wr_evts; + string wr_source("eventd-test"); + void *mock_pub = init_publish(zctx); + map> verify_data; + int i=0,j=6; + + for (; i <= 198; i+=2, j+=2) + { + wr_evts.push_back(create_ev(j+1, i+1, "SENSOR_TEMP_HIGH", "RAISE", verify_data)); + wr_evts.push_back(create_ev(j+2, i+2, "SENSOR_TEMP_HIGH", "CLEAR", verify_data)); + } + + run_pub(mock_pub, wr_source, wr_evts); + + this_thread::sleep_for(chrono::milliseconds(5000)); + + // verify events logged in DB. + verify_events(verify_data); + // This will make it out of limit + wr_evts.push_back(create_ev(j+1, i+1, "SENSOR_TEMP_HIGH", "RAISE", verify_data)); + run_pub(mock_pub, wr_source, wr_evts); + + this_thread::sleep_for(chrono::milliseconds(2000)); + + DBConnector eventDb("EVENT_DB", 0, true); + auto dbKeys = eventDb.keys("EVENT:*"); + EXPECT_EQ(200, dbKeys.size()); + EXPECT_TRUE(count(dbKeys.begin(), dbKeys.end(), "EVENT:1") == 0); + EXPECT_TRUE(count(dbKeys.begin(), dbKeys.end(), "EVENT:2") == 1); + EXPECT_TRUE(count(dbKeys.begin(), dbKeys.end(), "EVENT:" + to_string(i+1)) == 1); + g_run = false; + wr_evts.push_back(create_ev(303, 3, "SYSTEM_STATE", "NOTIFY", verify_data)); + run_pub(mock_pub, wr_source, wr_evts); + this_thread::sleep_for(chrono::milliseconds(2000)); + zmq_close(mock_pub); + printf("Rollover purge TEST completed\n"); +} + +class SwsscommonEnvironment : public ::testing::Environment { +public: + // Override this to define how to set up the environment + void SetUp() override { + // by default , init should be false + cout << "Default : isInit = " << SonicDBConfig::isInit() << endl; + EXPECT_FALSE(SonicDBConfig::isInit()); + EXPECT_THROW(SonicDBConfig::initialize(nonexisting_file), runtime_error); + + EXPECT_FALSE(SonicDBConfig::isInit()); + + // load local config file, init should be true + SonicDBConfig::initialize(existing_file); + cout << "INIT: load local db config file, isInit = " << SonicDBConfig::isInit() << endl; + EXPECT_TRUE(SonicDBConfig::isInit()); + + // Test the database_global.json file + // by default , global_init should be false + cout << "Default : isGlobalInit = " << SonicDBConfig::isGlobalInit() << endl; + EXPECT_FALSE(SonicDBConfig::isGlobalInit()); + + // Call an API which actually needs the data populated by SonicDBConfig::initializeGlobalConfig + // EXPECT_THROW(SonicDBConfig::getDbId(EVENT_DB, TEST_NAMESPACE), runtime_error); + + // load local global file, init should be true + SonicDBConfig::initializeGlobalConfig(global_existing_file); + cout<<"INIT: load global db config file, isInit = "< +#include +#include +#include #include #include @@ -20,6 +23,24 @@ class SwsscommonEnvironment : public ::testing::Environment { public: // Override this to define how to set up the environment void SetUp() override { + // Set up ZMQ custom ports so other tests don't interfere + cout << "Setting custom ZMQ ports" << endl; + std::string configfilename = std::tmpnam(nullptr); + EXPECT_FALSE(configfilename.empty()); + ofstream configfile(configfilename); + EXPECT_TRUE(configfile.is_open()); + configfile << + "{\n" + " \"events\" : {\n" + " \"xsub_path\": \"tcp://127.0.0.1:25570\",\n" + " \"xpub_path\": \"tcp://127.0.0.1:25571\",\n" + " \"capture_path\": \"tcp://127.0.0.1:25573\"\n" + " }\n" + "}\n"; + configfile.close(); + read_init_config(configfilename.c_str()); + remove(configfilename.c_str()); + // by default , init should be false cout << "Default : isInit = " << SonicDBConfig::isInit() << endl; EXPECT_FALSE(SonicDBConfig::isInit()); diff --git a/src/sonic-eventd/tests/subdir.mk b/src/sonic-eventd/tests/subdir.mk index a251b4bea82..757d7bfdda9 100644 --- a/src/sonic-eventd/tests/subdir.mk +++ b/src/sonic-eventd/tests/subdir.mk @@ -1,8 +1,10 @@ CC := g++ -TEST_OBJS += ./tests/eventd_ut.o ./tests/main.o +TEST_OBJS += ./tests/eventd_ut.o ./tests/main.o -C_DEPS += ./tests/eventd_ut.d ./tests/main.d +C_DEPS += ./tests/eventd_ut.d ./tests/main.d ./tests/eventdb_ut.d + +EVENTDB_TEST_OBJS += ./tests/eventdb_ut.o tests/%.o: tests/%.cpp @echo 'Building file: $<' @@ -10,3 +12,4 @@ tests/%.o: tests/%.cpp $(CC) -D__FILENAME__="$(subst tests/,,$<)" $(CFLAGS) -c -fmessage-length=0 -MMD -MP -MF"$(@:%.o=%.d)" -MT"$(@)" -o "$@" "$<" @echo 'Finished building: $<' @echo ' ' + diff --git a/src/sonic-eventd/var/evprofile/default.json b/src/sonic-eventd/var/evprofile/default.json new file mode 100644 index 00000000000..af4166fc082 --- /dev/null +++ b/src/sonic-eventd/var/evprofile/default.json @@ -0,0 +1,7 @@ +{ + "__README__" : "This is default map of events that eventd uses. Developer can modify this file and send SIGINT to eventd to make it read and use the updated file. Alternatively developer can test the new event by adding it to a custom event profile and use 'event profile ' command to apply that profile without having to send SIGINT to eventd. Developer need to commit default.json file with the new event after testing it out. Supported severities are: CRITICAL, MAJOR, MINOR, WARNING and INFORMATIONAL. Supported enable flag values are: true and false.", + "events":[ + + ] +} + \ No newline at end of file diff --git a/src/sonic-frr-mgmt-framework/frrcfgd/frrcfgd.py b/src/sonic-frr-mgmt-framework/frrcfgd/frrcfgd.py index b0fccb10d4a..81098c9971b 100755 --- a/src/sonic-frr-mgmt-framework/frrcfgd/frrcfgd.py +++ b/src/sonic-frr-mgmt-framework/frrcfgd/frrcfgd.py @@ -46,14 +46,14 @@ def __repr__(self): def g_run_command(table, command, use_bgpd_client, daemons, ignore_fail = False): syslog.syslog(syslog.LOG_DEBUG, "execute command {} for table {}.".format(command, table)) - if not command.startswith('vtysh '): + if not (len(command) > 0 and command[0] == 'vtysh'): use_bgpd_client = False if use_bgpd_client: if not bgpd_client.run_vtysh_command(table, command, daemons) and not ignore_fail: syslog.syslog(syslog.LOG_ERR, 'command execution failure. Command: "{}"'.format(command)) return False else: - p = subprocess.Popen(command, shell=True, stdout=subprocess.PIPE) + p = subprocess.Popen(command, shell=False, stdout=subprocess.PIPE) stdout = p.communicate()[0] p.wait() if p.returncode != 0 and not ignore_fail: @@ -277,11 +277,18 @@ def __proc_command(self, command, daemons): resp += reply return (ret_val, resp) def run_vtysh_command(self, table, command, daemons): - if not command.startswith(self.VTYSH_MARK): + if len(command) == 0 or command[0] != 'vtysh': syslog.syslog(syslog.LOG_ERR, 'command %s is not for vtysh config' % command) return False - cmd_line = command[len(self.VTYSH_MARK):] - cmd_list = re.findall(r"-c\s+'([^']+)'\s*", cmd_line) + # Extract values after each -c flag + cmd_list = [] + i = 1 + while i < len(command): + if command[i] == '-c' and i + 1 < len(command): + cmd_list.append(command[i + 1]) + i += 2 + else: + i += 1 cmd_list.append('end') if daemons is None: daemons = self.TABLE_DAEMON.get(table, None) @@ -746,14 +753,14 @@ def run_command(self, daemon, table, data, prefix_list=None, *upper_vals): failed = False if len(cmd_list) > 0: run_cmd_cnt += 1 - cmd_prefix = 'vtysh ' + cmd_args = ['vtysh'] for pfx in prefix_list: - cmd_prefix += "-c '%s' " % pfx + cmd_args += ['-c', pfx] for cmd in cmd_list: ignore_fail = False if type(cmd) is tuple: cmd, ignore_fail = cmd - if not g_run_command(table, cmd_prefix + "-c '%s'" % cmd, True, key_map.daemons, ignore_fail): + if not g_run_command(table, cmd_args + ['-c', cmd], True, key_map.daemons, ignore_fail): syslog.syslog(syslog.LOG_ERR, 'failed running FRR command: %s' % cmd) failed = True break @@ -2161,6 +2168,10 @@ def __init__(self): self.config_mode = db_entry['docker_routing_config_mode'] else: self.config_mode = "separated" + if 'use_template_render_for_restore' in db_entry: + self.use_template_render_for_restore = db_entry['use_template_render_for_restore'] + else: + self.use_template_render_for_restore = 'true' # VRF ==> local_as self.bgp_asn = {} # VRF ==> confederation peer list @@ -2334,7 +2345,7 @@ def __init__(self): syslog.syslog(syslog.LOG_DEBUG, 'Init Cached DB data') for key, entry in self.table_data_cache.items(): syslog.syslog(syslog.LOG_DEBUG, ' %-20s : %s' % (key, entry)) - if self.config_mode == "unified": + if self.config_mode == "unified" and self.use_template_render_for_restore == 'false': for table, _ in self.table_handler_list: table_list = self.config_db.get_table(table) for key, data in table_list.items(): @@ -2379,28 +2390,28 @@ def bfd_handler(self, table, key, data): cmd = cmd + ' interface ' + key_params[2] if not data: #BFD peer is deleted - command = "vtysh -c 'configure terminal' -c 'bfd' -c 'no {}'".format(cmd) + command = ['vtysh', '-c', 'configure terminal', '-c', 'bfd', '-c', 'no {}'.format(cmd)] self.__run_command(table, command) else: #create/update case - command = "vtysh -c 'configure terminal' -c 'bfd' -c '{}'".format(cmd) + command = ['vtysh', '-c', 'configure terminal', '-c', 'bfd', '-c', '{}'.format(cmd)] for param in data: if param == 'transmit_interval': - command = command + " -c 'transmit-interval {}'".format(data[param]) + command += ['-c', 'transmit-interval {}'.format(data[param])] elif param == 'receive_interval': - command = command + " -c 'receive-interval {}'".format(data[param]) + command += ['-c', 'receive-interval {}'.format(data[param])] elif param == 'multiplier': - command = command + " -c 'detect-multiplier {}'".format(data[param]) + command += ['-c', 'detect-multiplier {}'.format(data[param])] elif param == 'echo_mode' and data[param] == 'true': - command = command + " -c 'echo-mode'" + command += ['-c', 'echo-mode'] elif param == 'echo_interval': - command = command + " -c 'echo-interval {}'".format(data[param]) + command += ['-c', 'echo-interval {}'.format(data[param])] elif param == 'label': - command = command + " -c 'label {}'".format(data[param]) + command += ['-c', 'label {}'.format(data[param])] elif param == 'admin_status' and data[param] == 'up': - command = command + " -c 'no shutdown'" + command += ['-c', 'no shutdown'] elif param == 'admin_status' and data[param] == 'down': - command = command + " -c 'shutdown'" + command += ['-c', 'shutdown'] self.__run_command(table, command) def vrf_handler(self, table, key, data): @@ -2410,23 +2421,23 @@ def vrf_handler(self, table, key, data): cmd = 'vrf {}'.format(key_params[0]) if not data: #VRF is deleted - command = "vtysh -c 'configure terminal' -c '{}'".format(cmd) + command = ['vtysh', '-c', 'configure terminal', '-c', '{}'.format(cmd)] if key_params[0] in self.vrf_vni_map: - command = command + " -c 'no vni {}'".format(self.vrf_vni_map[key_params[0]]) + command += ['-c', 'no vni {}'.format(self.vrf_vni_map[key_params[0]])] del self.vrf_vni_map[key_params[0]] self.__run_command(table, command) else: #create/update case - command = "vtysh -c 'configure terminal' -c '{}'".format(cmd) + command = ['vtysh', '-c', 'configure terminal', '-c', '{}'.format(cmd)] positive_execute = False for param in data: if param == 'vni': if data[param] != '0': - command = command + " -c 'vni {}'".format(data[param]) + command += ['-c', 'vni {}'.format(data[param])] self.vrf_vni_map[key_params[0]] = data[param] positive_execute = True elif key_params[0] in self.vrf_vni_map: - command = command + " -c 'no vni {}'".format(self.vrf_vni_map[key_params[0]]) + command += ['-c', 'no vni {}'.format(self.vrf_vni_map[key_params[0]])] del self.vrf_vni_map[key_params[0]] positive_execute = True if positive_execute == True: @@ -2447,11 +2458,10 @@ def __delete_vrf_asn(self, vrf, table, data): if local_asn is None: syslog.syslog(syslog.LOG_ERR, 'failed to get local ASN of VRF {} for delete'.format(vrf)) return False - command = "vtysh -c 'configure terminal' -c 'no router bgp {}".format(local_asn) if vrf != self.DEFAULT_VRF: - command += " vrf {}'".format(vrf) + command = ['vtysh', '-c', 'configure terminal', '-c', 'no router bgp {} vrf {}'.format(local_asn, vrf)] else: - command += "'" + command = ['vtysh', '-c', 'configure terminal', '-c', 'no router bgp {}'.format(local_asn)] if not self.__run_command(table, command): syslog.syslog(syslog.LOG_ERR, 'failed to delete local_asn for VRF %s' % vrf) return False @@ -2691,7 +2701,7 @@ def __update_bgp(self, data_list): if dval.op == CachedDataWithOp.OP_NONE: prog_asn = False if prog_asn: - command = "vtysh -c 'configure terminal' -c 'router bgp {} vrf {}' -c 'no bgp default ipv4-unicast'".format(dval.data, vrf) + command = ['vtysh', '-c', 'configure terminal', '-c', 'router bgp {} vrf {}'.format(dval.data, vrf), '-c', 'no bgp default ipv4-unicast'] if self.__run_command(table, command): syslog.syslog(syslog.LOG_DEBUG, 'set local_asn %s to VRF %s, re-apply all VRF related tables' % (dval.data, vrf)) self.bgp_asn[vrf] = dval.data @@ -2709,10 +2719,10 @@ def __update_bgp(self, data_list): continue cmd_prefix = ['configure terminal', 'router bgp {} vrf {}'.format(local_asn, vrf)] if 'srv6_locator' in data: - cmd = "vtysh -c 'configure terminal' " - cmd += " -c 'router bgp {} vrf {}' ".format(local_asn, vrf) - cmd += " -c 'segment-routing srv6' " - cmd += " -c 'locator {}' ".format(data['srv6_locator'].data) + cmd = ['vtysh', '-c', 'configure terminal', + '-c', 'router bgp {} vrf {}'.format(local_asn, vrf), + '-c', 'segment-routing srv6', + '-c', 'locator {}'.format(data['srv6_locator'].data)] if not self.__run_command(table, cmd): syslog.syslog(syslog.LOG_ERR, 'failed running SRV6 POLICY config command') continue @@ -2727,16 +2737,18 @@ def __update_bgp(self, data_list): if not del_table: locator_name = prefix prefix = data['prefix'] - cmd = "vtysh -c 'configure terminal' -c 'segment-routing' -c 'srv6' -c 'locators' " - cmd += " -c 'locator {}' ".format(locator_name) - cmd += " -c 'prefix {} block-len {} node-len {} func-bits {}' ".format(prefix.data, data['block_len'].data, data['node_len'].data, data['func_len'].data) + cmd = ['vtysh', '-c', 'configure terminal', + '-c', 'segment-routing', '-c', 'srv6', '-c', 'locators', + '-c', 'locator {}'.format(locator_name), + '-c', 'prefix {} block-len {} node-len {} func-bits {}'.format(prefix.data, data['block_len'].data, data['node_len'].data, data['func_len'].data)] if not self.__run_command(table, cmd): syslog.syslog(syslog.LOG_ERR, 'failed running SRV6 LOCATORS config command') continue elif table == 'SRV6_MY_SOURCE': source = data['source-address'] - cmd = "vtysh -c 'configure terminal' -c 'segment-routing' -c 'srv6' -c 'encapsulation' " - cmd += " -c 'source-address {}' ".format(source.data) + cmd = ['vtysh', '-c', 'configure terminal', + '-c', 'segment-routing', '-c', 'srv6', '-c', 'encapsulation', + '-c', 'source-address {}'.format(source.data)] if not self.__run_command(table, cmd): syslog.syslog(syslog.LOG_ERR, 'failed running SRV6 encap config command {}'.format(cmd)) continue @@ -2745,13 +2757,14 @@ def __update_bgp(self, data_list): syslog.syslog(syslog.LOG_ERR, 'invalid key for SRV6_MY_SIDS table') continue if not del_table: - cmd = "vtysh -c 'configure terminal' -c 'segment-routing' -c 'srv6' " - cmd +="-c 'static-sids' " + cmd = ['vtysh', '-c', 'configure terminal', + '-c', 'segment-routing', '-c', 'srv6', + '-c', 'static-sids'] uDTAction = ["uDT46", "uDT4", "uDT6"] if data['action'].data in uDTAction: - cmd +="-c 'sid {} locator {} behavior {} vrf {}' ".format(key, prefix, data['action'].data, data['decap_vrf'].data) + cmd += ['-c', 'sid {} locator {} behavior {} vrf {}'.format(key, prefix, data['action'].data, data['decap_vrf'].data)] elif data['action'].data == 'uN': - cmd +="-c 'sid {} locator {} behavior {} ' ".format(key, prefix, data['action'].data) + cmd += ['-c', 'sid {} locator {} behavior {} '.format(key, prefix, data['action'].data)] else: syslog.syslog(syslog.LOG_ERR, 'failed running SRV6 POLICY config command, not support action %s'.format(data['action'].data)) continue @@ -2784,16 +2797,18 @@ def __update_bgp(self, data_list): if is_peer_group: # if peer group is not created, create it before setting other attributes if key not in self.bgp_peer_group.setdefault(vrf, {}): - command = "vtysh -c 'configure terminal' -c 'router bgp {} vrf {}' ".format(local_asn, vrf) - command += "-c 'neighbor {} peer-group'".format(key) + command = ['vtysh', '-c', 'configure terminal', + '-c', 'router bgp {} vrf {}'.format(local_asn, vrf), + '-c', 'neighbor {} peer-group'.format(key)] if not self.__run_command(table, command): syslog.syslog(syslog.LOG_ERR, 'failed to create peer-group %s for VRF %s' % (key, vrf)) continue self.bgp_peer_group[vrf][key] = BGPPeerGroup(vrf) elif not self.__peer_is_ip(key): if key not in self.bgp_intf_nbr.setdefault(vrf, set()): - command = "vtysh -c 'configure terminal' -c 'router bgp {} vrf {}' ".format(local_asn, vrf) - command += "-c 'neighbor {} interface'".format(key) + command = ['vtysh', '-c', 'configure terminal', + '-c', 'router bgp {} vrf {}'.format(local_asn, vrf), + '-c', 'neighbor {} interface'.format(key)] if not self.__run_command(table, command): syslog.syslog(syslog.LOG_ERR, 'failed to create neighbor of interface %s for VRF %s' % (key, vrf)) continue @@ -2845,8 +2860,9 @@ def __update_bgp(self, data_list): if is_peer_group: # clear associated neighbor list in cache self.__delete_pg_neighbors(vrf, key) - command = "vtysh -c 'configure terminal' -c 'router bgp {} vrf {}' -c 'no neighbor {}'".\ - format(local_asn, vrf, key) + command = ['vtysh', '-c', 'configure terminal', + '-c', 'router bgp {} vrf {}'.format(local_asn, vrf), + '-c', 'no neighbor {}'.format(key)] if not self.__run_command(table, command): syslog.syslog(syslog.LOG_ERR, 'failed to delete VRF %s bgp neigbor %s' % (vrf, key)) self.__delete_vrf_neighbor(vrf, key, data, is_peer_group) @@ -2929,8 +2945,8 @@ def __update_bgp(self, data_list): syslog.syslog(syslog.LOG_ERR, 'prefix of {} with range {} not found from prefix-set {}'.\ format(ip_pfx, len_range, pfx_set_name)) continue - command = "vtysh -c 'configure terminal' -c 'no {} prefix-list {} {}'".\ - format(('ip' if af == socket.AF_INET else 'ipv6'), pfx_set_name, str(del_pfx)) + command = ['vtysh', '-c', 'configure terminal', + '-c', 'no {} prefix-list {} {}'.format(('ip' if af == socket.AF_INET else 'ipv6'), pfx_set_name, str(del_pfx))] if not self.__run_command(table, command, daemons): syslog.syslog(syslog.LOG_ERR, 'failed to delete prefix %s with range %s from set %s' % (ip_pfx, len_range, pfx_set_name)) @@ -2944,8 +2960,8 @@ def __update_bgp(self, data_list): syslog.syslog(syslog.LOG_ERR, 'failed to update prefix-set %s in cache with prefix %s range %s' % (pfx_set_name, ip_pfx, len_range)) continue - command = "vtysh -c 'configure terminal' -c '{} prefix-list {} {}'".\ - format(('ip' if af == socket.AF_INET else 'ipv6'), pfx_set_name, str(add_pfx)) + command = ['vtysh', '-c', 'configure terminal', + '-c', '{} prefix-list {} {}'.format(('ip' if af == socket.AF_INET else 'ipv6'), pfx_set_name, str(add_pfx))] if not self.__run_command(table, command, daemons): syslog.syslog(syslog.LOG_ERR, 'failed to add prefix %s with range %s to set %s' % (ip_pfx, len_range, pfx_set_name)) @@ -2961,8 +2977,8 @@ def __update_bgp(self, data_list): ip_addr_list = data['address'].data if pfx_set_name in self.prefix_set_list: af = self.prefix_set_list[pfx_set_name].af - command = "vtysh -c 'configure terminal' -c 'no {} prefix-list {}'".\ - format(('ip' if af == socket.AF_INET else 'ipv6'), pfx_set_name) + command = ['vtysh', '-c', 'configure terminal', + '-c', 'no {} prefix-list {}'.format(('ip' if af == socket.AF_INET else 'ipv6'), pfx_set_name)] if not self.__run_command(table, command): syslog.syslog(syslog.LOG_ERR, 'failed to delete existing prefix-set {}'.format(pfx_set_name)) continue @@ -2975,8 +2991,8 @@ def __update_bgp(self, data_list): except ValueError: continue for prefix in prefix_set: - command = "vtysh -c 'configure terminal' -c '{} prefix-list {} {}'".\ - format(('ip' if prefix_set.af == socket.AF_INET else 'ipv6'), pfx_set_name, str(prefix)) + command = ['vtysh', '-c', 'configure terminal', + '-c', '{} prefix-list {} {}'.format(('ip' if prefix_set.af == socket.AF_INET else 'ipv6'), pfx_set_name, str(prefix))] if not self.__run_command(table, command): syslog.syslog(syslog.LOG_ERR, 'failed to delete existing prefix-set {}'.format(pfx_set_name)) continue @@ -3025,19 +3041,19 @@ def __update_bgp(self, data_list): continue self.tmp_cache_key = '' if del_table: - cmd = "vtysh -c 'configure terminal'" - cmd += " -c 'router bgp {} vrf {}'".format(local_asn, vrf) - cmd += " -c 'address-family {} {}'".format(af, ip_type) - cmd += " -c 'no vni {}'".format(vni) + cmd = ['vtysh', '-c', 'configure terminal', + '-c', 'router bgp {} vrf {}'.format(local_asn, vrf), + '-c', 'address-family {} {}'.format(af, ip_type), + '-c', 'no vni {}'.format(vni)] if not self.__run_command(table, cmd): syslog.syslog(syslog.LOG_ERR, 'failed running BGP L2VPN_EVPN VNI unconfig command') continue else: if not data: - cmd = "vtysh -c 'configure terminal'" - cmd += " -c 'router bgp {} vrf {}'".format(local_asn, vrf) - cmd += " -c 'address-family {} {}'".format(af, ip_type) - cmd += " -c 'vni {}'".format(vni) + cmd = ['vtysh', '-c', 'configure terminal', + '-c', 'router bgp {} vrf {}'.format(local_asn, vrf), + '-c', 'address-family {} {}'.format(af, ip_type), + '-c', 'vni {}'.format(vni)] if not self.__run_command(table, cmd): syslog.syslog(syslog.LOG_ERR, 'failed running BGP L2VPN_EVPN VNI config command') continue @@ -3046,10 +3062,10 @@ def __update_bgp(self, data_list): af, ip_type = af_type.lower().split('_') nostr = "no " if del_table else "" syslog.syslog(syslog.LOG_INFO, 'Set address family for RT {} to {} {}'.format(rt, af, ip_type)) - cmd = "vtysh -c 'configure terminal'" - cmd += " -c 'router bgp {} vrf {}'".format(local_asn, vrf) - cmd += " -c 'address-family {} {}'".format(af, ip_type) - cmd += " -c '{}route-target {} {}'".format(nostr,data['route-target-type'].data, rt) + cmd = ['vtysh', '-c', 'configure terminal', + '-c', 'router bgp {} vrf {}'.format(local_asn, vrf), + '-c', 'address-family {} {}'.format(af, ip_type), + '-c', '{}route-target {} {}'.format(nostr, data['route-target-type'].data, rt)] cache_tbl_key = 'BGP_GLOBALS_EVPN_RT&&{}|L2VPN_EVPN|{}'.format(vrf, rt) if not del_table and cache_tbl_key in self.table_data_cache.keys(): new_rttype = data['route-target-type'].data @@ -3058,10 +3074,10 @@ def __update_bgp(self, data_list): old_rttype = cache_tbl_data['route-target-type'] if new_rttype == "export": if old_rttype == "import" or old_rttype == "both": - cmd += " -c 'no route-target import {}'".format(rt) + cmd += ['-c', 'no route-target import {}'.format(rt)] if new_rttype == "import": if old_rttype == "export" or old_rttype == "both": - cmd += " -c 'no route-target export {}'".format(rt) + cmd += ['-c', 'no route-target export {}'.format(rt)] if not self.__run_command(table, cmd): syslog.syslog(syslog.LOG_ERR, 'failed running BGP L2VPN_EVPN RT config command') continue @@ -3072,11 +3088,11 @@ def __update_bgp(self, data_list): af, ip_type = af_type.lower().split('_') nostr = "no " if del_table else "" syslog.syslog(syslog.LOG_INFO, 'Set address family for VNI {} RT {} to {} {}'.format(vni, rt, af, ip_type)) - cmd = "vtysh -c 'configure terminal'" - cmd += " -c 'router bgp {} vrf {}'".format(local_asn, vrf) - cmd += " -c 'address-family {} {}'".format(af, ip_type) - cmd += " -c 'vni {}'".format(vni) - cmd += " -c '{}route-target {} {}'".format(nostr,data['route-target-type'].data, rt) + cmd = ['vtysh', '-c', 'configure terminal', + '-c', 'router bgp {} vrf {}'.format(local_asn, vrf), + '-c', 'address-family {} {}'.format(af, ip_type), + '-c', 'vni {}'.format(vni), + '-c', '{}route-target {} {}'.format(nostr, data['route-target-type'].data, rt)] cache_tbl_key = 'BGP_GLOBALS_EVPN_VNI_RT&&{}|L2VPN_EVPN|{}|{}'.format(vrf, vni, rt) if not del_table and cache_tbl_key in self.table_data_cache.keys(): new_rttype = data['route-target-type'].data @@ -3085,10 +3101,10 @@ def __update_bgp(self, data_list): old_rttype = cache_tbl_data['route-target-type'] if new_rttype == "export": if old_rttype == "import" or old_rttype == "both": - cmd += " -c 'no route-target import {}'".format(rt) + cmd += ['-c', 'no route-target import {}'.format(rt)] if new_rttype == "import": if old_rttype == "export" or old_rttype == "both": - cmd += " -c 'no route-target export {}'".format(rt) + cmd += ['-c', 'no route-target export {}'.format(rt)] if not self.__run_command(table, cmd): syslog.syslog(syslog.LOG_ERR, 'failed running BGP L2VPN_EVPN VNI RT config command') continue @@ -3103,8 +3119,8 @@ def __update_bgp(self, data_list): if dval.op != CachedDataWithOp.OP_NONE: enable = (dval.op != CachedDataWithOp.OP_DELETE) no_arg = CommandArgument(self, enable) - command = "vtysh -c 'configure terminal' -c '{:no-prefix}route-map {} {} {}'".\ - format(no_arg, map_name, dval.data, seq_no) + command = ['vtysh', '-c', 'configure terminal', + '-c', '{:no-prefix}route-map {} {} {}'.format(no_arg, map_name, dval.data, seq_no)] if not self.__run_command(table, command): syslog.syslog(syslog.LOG_ERR, 'failed to configure route-map {} seq {}'.format(map_name, seq_no)) continue @@ -3128,8 +3144,8 @@ def __update_bgp(self, data_list): if map_name not in self.route_map or seq_no not in self.route_map[map_name]: syslog.syslog(syslog.LOG_ERR, 'route-map {} seq {} not found for delete'.format(map_name, seq_no)) continue - command = "vtysh -c 'configure terminal' -c 'no route-map {} {} {}'".\ - format(map_name, self.route_map[map_name][seq_no], seq_no) + command = ['vtysh', '-c', 'configure terminal', + '-c', 'no route-map {} {} {}'.format(map_name, self.route_map[map_name][seq_no], seq_no)] if not self.__run_command(table, command): syslog.syslog(syslog.LOG_ERR, 'failed running route-map delete command') continue @@ -3192,8 +3208,9 @@ def __update_bgp(self, data_list): suffix_cmd, oper = self.__bfd_handle_delete (data) if suffix_cmd and oper == CachedDataWithOp.OP_DELETE: - command = "vtysh -c 'configure terminal' -c 'bfd' -c 'peer {} local-address {} vrf {} interface {}' -c '{}'".\ - format(remoteaddr, localaddr, vrf, interface, suffix_cmd) + command = ['vtysh', '-c', 'configure terminal', '-c', 'bfd', + '-c', 'peer {} local-address {} vrf {} interface {}'.format(remoteaddr, localaddr, vrf, interface), + '-c', suffix_cmd] if not self.__run_command(table, command): syslog.syslog(syslog.LOG_ERR, 'failed to delete single-hop peer {}'.format(key)) @@ -3212,8 +3229,9 @@ def __update_bgp(self, data_list): suffix_cmd, oper = self.__bfd_handle_delete (data) if suffix_cmd and oper == CachedDataWithOp.OP_DELETE: - command = "vtysh -c 'configure terminal' -c 'bfd' -c 'peer {} vrf {} interface {}' -c '{}'".\ - format(remoteaddr, vrf, interface, suffix_cmd) + command = ['vtysh', '-c', 'configure terminal', '-c', 'bfd', + '-c', 'peer {} vrf {} interface {}'.format(remoteaddr, vrf, interface), + '-c', suffix_cmd] if not self.__run_command(table, command): syslog.syslog(syslog.LOG_ERR, 'failed to delete single-hop peer {}'.format(key)) @@ -3231,12 +3249,12 @@ def __update_bgp(self, data_list): dval = data['local-address'] localaddr = dval.data syslog.syslog(syslog.LOG_INFO, 'Delete BFD single hop to {} {} {}'.format(remoteaddr, vrf, interface, localaddr)) - command = "vtysh -c 'configure terminal' -c 'bfd' -c 'no peer {} local-address {} vrf {} interface {}'".\ - format(remoteaddr, localaddr, vrf, interface) + command = ['vtysh', '-c', 'configure terminal', '-c', 'bfd', + '-c', 'no peer {} local-address {} vrf {} interface {}'.format(remoteaddr, localaddr, vrf, interface)] else: syslog.syslog(syslog.LOG_INFO, 'Delete BFD single hop to {} {} {}'.format(remoteaddr, vrf, interface)) - command = "vtysh -c 'configure terminal' -c 'bfd' -c 'no peer {} vrf {} interface {}'".\ - format(remoteaddr, vrf, interface) + command = ['vtysh', '-c', 'configure terminal', '-c', 'bfd', + '-c', 'no peer {} vrf {} interface {}'.format(remoteaddr, vrf, interface)] if not self.__run_command(table, command): syslog.syslog(syslog.LOG_ERR, 'failed to delete single-hop peer {}'.format(key)) continue @@ -3249,11 +3267,13 @@ def __update_bgp(self, data_list): suffix_cmd, oper = self.__bfd_handle_delete (data) if suffix_cmd and oper == CachedDataWithOp.OP_DELETE: if not 'null' in interface: - command = "vtysh -c 'configure terminal' -c 'bfd' -c 'peer {} local-address {} vrf {} interface {}' -c '{}'".\ - format(remoteaddr, localaddr, vrf, interface, suffix_cmd) + command = ['vtysh', '-c', 'configure terminal', '-c', 'bfd', + '-c', 'peer {} local-address {} vrf {} interface {}'.format(remoteaddr, localaddr, vrf, interface), + '-c', suffix_cmd] else: - command = "vtysh -c 'configure terminal' -c 'bfd' -c 'peer {} local-address {} vrf {}' -c '{}'".\ - format(remoteaddr, localaddr, vrf, suffix_cmd) + command = ['vtysh', '-c', 'configure terminal', '-c', 'bfd', + '-c', 'peer {} local-address {} vrf {}'.format(remoteaddr, localaddr, vrf), + '-c', suffix_cmd] if not self.__run_command(table, command): syslog.syslog(syslog.LOG_ERR, 'failed to delete single-hop peer {}'.format(key)) @@ -3274,11 +3294,11 @@ def __update_bgp(self, data_list): else: syslog.syslog(syslog.LOG_INFO, 'Delete BFD multi hop to {} {} {} {}'.format(remoteaddr, vrf, localaddr, interface)) if not 'null' in interface: - command = "vtysh -c 'configure terminal' -c 'bfd' -c 'no peer {} vrf {} multihop local-address {} interface {}'".\ - format(remoteaddr, vrf, localaddr, interface) + command = ['vtysh', '-c', 'configure terminal', '-c', 'bfd', + '-c', 'no peer {} vrf {} multihop local-address {} interface {}'.format(remoteaddr, vrf, localaddr, interface)] else: - command = "vtysh -c 'configure terminal' -c 'bfd' -c 'no peer {} vrf {} multihop local-address {}'".\ - format(remoteaddr, vrf, localaddr) + command = ['vtysh', '-c', 'configure terminal', '-c', 'bfd', + '-c', 'no peer {} vrf {} multihop local-address {}'.format(remoteaddr, vrf, localaddr)] if not self.__run_command(table, command): syslog.syslog(syslog.LOG_ERR, 'failed to delete multihop peer {}'.format(key)) @@ -3315,8 +3335,10 @@ def __update_bgp(self, data_list): chk_icmp_attrs_dict = {'icmp_source_interface':'source-interface ', 'icmp_source_ip':'source-address ', 'icmp_size':'request-data-size ', 'icmp_vrf':'source-vrf ', 'icmp_tos':'tos ', 'icmp_ttl':'ttl '} for attr in chk_icmp_attrs: if attr in data and data[attr].op != CachedDataWithOp.OP_DELETE: - command = "vtysh -c 'configure terminal' -c 'ip sla {}' -c '{}' -c '{} {}'".\ - format(sla_id, icmp_cmd_mode, chk_icmp_attrs_dict[attr], data[attr].data) + command = ['vtysh', '-c', 'configure terminal', + '-c', 'ip sla {}'.format(sla_id), + '-c', icmp_cmd_mode, + '-c', '{} {}'.format(chk_icmp_attrs_dict[attr], data[attr].data)] syslog.syslog(syslog.LOG_INFO, 'Execute Icmp Cmd {}'.format(command)) if not self.__run_command(table, command): syslog.syslog(syslog.LOG_ERR, 'failed to add icmp config for ip sla {}'.format(sla_id)) @@ -3342,8 +3364,10 @@ def __update_bgp(self, data_list): chk_tcp_attrs_dict = {'tcp_source_interface':'source-interface ', 'tcp_source_ip':'source-address ', 'tcp_source_port':'source-port ', 'tcp_vrf':'source-vrf ', 'tcp_tos':'tos ', 'tcp_ttl':'ttl '} for attr in chk_tcp_attrs: if attr in data and data[attr].op != CachedDataWithOp.OP_DELETE: - command = "vtysh -c 'configure terminal' -c 'ip sla {}' -c '{}' -c '{} {}'".\ - format(sla_id, tcp_cmd_mode, chk_tcp_attrs_dict[attr], data[attr].data) + command = ['vtysh', '-c', 'configure terminal', + '-c', 'ip sla {}'.format(sla_id), + '-c', tcp_cmd_mode, + '-c', '{} {}'.format(chk_tcp_attrs_dict[attr], data[attr].data)] syslog.syslog(syslog.LOG_INFO, 'Execute Tcp Cmd {}'.format(command)) if not self.__run_command(table, command): syslog.syslog(syslog.LOG_ERR, 'failed to add Tcp config for ip sla {}'.format(sla_id)) @@ -3366,7 +3390,7 @@ def __update_bgp(self, data_list): # Always delete ip sla if it is not found in configdb if not found_in_configdb: - command = "vtysh -c 'configure terminal' -c 'no ip sla {}'".format(sla_id) + command = ['vtysh', '-c', 'configure terminal', '-c', 'no ip sla {}'.format(sla_id)] syslog.syslog(syslog.LOG_ERR, 'Entry deleted in ip sla config db') if not self.__run_command(table, command): syslog.syslog(syslog.LOG_ERR, 'failed to delete router ip sla {}'.format(sla_id)) @@ -3387,7 +3411,7 @@ def __update_bgp(self, data_list): syslog.syslog(syslog.LOG_ERR, 'failed running ospf config command') continue else: - command = "vtysh -c 'configure terminal' -c 'no router ospf vrf {}'".format(vrf) + command = ['vtysh', '-c', 'configure terminal', '-c', 'no router ospf vrf {}'.format(vrf)] if not self.__run_command(table, command): syslog.syslog(syslog.LOG_ERR, 'failed to delete router ospf vrf {}'.format(vrf)) @@ -3415,8 +3439,9 @@ def __update_bgp(self, data_list): syslog.syslog(syslog.LOG_INFO, 'Create router ospf vrf {}, Vlink: {}, tableop {}'.format(vrf, data, del_table)) if data == {}: - command = "vtysh -c 'configure terminal' -c 'router ospf vrf {}' -c 'no area {} virtual-link {}'".\ - format(vrf, area, vlinkid) + command = ['vtysh', '-c', 'configure terminal', + '-c', 'router ospf vrf {}'.format(vrf), + '-c', 'no area {} virtual-link {}'.format(area, vlinkid)] if not self.__run_command(table, command): syslog.syslog(syslog.LOG_ERR, 'failed to delete vlink {} {}'.format(area, vlinkid)) @@ -3432,8 +3457,9 @@ def __update_bgp(self, data_list): continue if del_table: - command = "vtysh -c 'configure terminal' -c 'router ospf vrf {}' -c 'no area {} virtual-link {}'".\ - format(vrf, area, vlinkid) + command = ['vtysh', '-c', 'configure terminal', + '-c', 'router ospf vrf {}'.format(vrf), + '-c', 'no area {} virtual-link {}'.format(area, vlinkid)] if not self.__run_command(table, command): syslog.syslog(syslog.LOG_ERR, 'failed to delete vlink {} {}'.format(area, vlinkid)) @@ -3450,15 +3476,17 @@ def __update_bgp(self, data_list): network = keyvals[1] if not del_table: - command = "vtysh -c 'configure terminal' -c 'router ospf vrf {}' -c 'network {} area {}'".\ - format(vrf, network, area) + command = ['vtysh', '-c', 'configure terminal', + '-c', 'router ospf vrf {}'.format(vrf), + '-c', 'network {} area {}'.format(network, area)] if not self.__run_command(table, command): syslog.syslog(syslog.LOG_ERR, 'failed to create network {} {}'.format(area, network)) continue else: - command = "vtysh -c 'configure terminal' -c 'router ospf vrf {}' -c 'no network {} area {}'".\ - format(vrf, network, area) + command = ['vtysh', '-c', 'configure terminal', + '-c', 'router ospf vrf {}'.format(vrf), + '-c', 'no network {} area {}'.format(network, area)] if not self.__run_command(table, command): syslog.syslog(syslog.LOG_ERR, 'failed to delete network {} {}'.format(area, network)) @@ -3477,15 +3505,17 @@ def __update_bgp(self, data_list): if data == {}: if not del_table: - command = "vtysh -c 'configure terminal' -c 'router ospf vrf {}' -c 'area {} range {}'".\ - format(vrf, area, range) + command = ['vtysh', '-c', 'configure terminal', + '-c', 'router ospf vrf {}'.format(vrf), + '-c', 'area {} range {}'.format(area, range)] if not self.__run_command(table, command): syslog.syslog(syslog.LOG_ERR, 'failed to create range {} {}'.format(area, range)) continue else: - command = "vtysh -c 'configure terminal' -c 'router ospf vrf {}' -c 'no area {} range {}'".\ - format(vrf, area, range) + command = ['vtysh', '-c', 'configure terminal', + '-c', 'router ospf vrf {}'.format(vrf), + '-c', 'no area {} range {}'.format(area, range)] if not self.__run_command(table, command): syslog.syslog(syslog.LOG_ERR, 'failed to delete range {} {}'.format(area, range)) @@ -3580,8 +3610,9 @@ def __update_bgp(self, data_list): else: cmd_suffix = "no distribute-list {} out {}".format(acclistname, protocol.lower()) - command = "vtysh -c 'configure terminal' -c 'router ospf vrf {}' -c '{}'".\ - format(vrf, cmd_suffix) + command = ['vtysh', '-c', 'configure terminal', + '-c', 'router ospf vrf {}'.format(vrf), + '-c', cmd_suffix] if not self.__run_command(table, command): syslog.syslog(syslog.LOG_ERR, 'failed to create distribute-list {} {}'.format(protocol, direction)) @@ -3600,8 +3631,9 @@ def __update_bgp(self, data_list): else: cmd_suffix = "no redistribute {}".format(protocol.lower()) + del_cmd_suffix - command = "vtysh -c 'configure terminal' -c 'router ospf vrf {}' -c '{}'".\ - format(vrf, cmd_suffix) + command = ['vtysh', '-c', 'configure terminal', + '-c', 'router ospf vrf {}'.format(vrf), + '-c', cmd_suffix] if not self.__run_command(table, command): syslog.syslog(syslog.LOG_ERR, 'failed to create default-info/redistribute {} {}'.format(protocol, direction)) @@ -3610,15 +3642,17 @@ def __update_bgp(self, data_list): self.__ospf_apply_config(data, rmapoper, metricoper, metrictypeoper, alwaysoper, acclistoper) else: if (direction == "IMPORT"): - command = "" + command = [] if (protocol == "DEFAULT_ROUTE"): - command = "vtysh -c 'configure terminal' -c 'router ospf vrf {}' -c 'no default-information originate'".\ - format(vrf) + command = ['vtysh', '-c', 'configure terminal', + '-c', 'router ospf vrf {}'.format(vrf), + '-c', 'no default-information originate'] else: - command = "vtysh -c 'configure terminal' -c 'router ospf vrf {}' -c 'no redistribute {}'".\ - format(vrf, protocol.lower()) + command = ['vtysh', '-c', 'configure terminal', + '-c', 'router ospf vrf {}'.format(vrf), + '-c', 'no redistribute {}'.format(protocol.lower())] - if (command != ""): + if command: if not self.__run_command(table, command): syslog.syslog(syslog.LOG_ERR, 'failed to delete default-info/redistribute {}'.format(protocol.lower())) continue @@ -3626,8 +3660,9 @@ def __update_bgp(self, data_list): self.__ospf_delete(data) else: if (acclistname != ""): - command = "vtysh -c 'configure terminal' -c 'router ospf vrf {}' -c 'no distribute-list {} out {}'".\ - format(vrf, acclistname, protocol.lower()) + command = ['vtysh', '-c', 'configure terminal', + '-c', 'router ospf vrf {}'.format(vrf), + '-c', 'no distribute-list {} out {}'.format(acclistname, protocol.lower())] if not self.__run_command(table, command): syslog.syslog(syslog.LOG_ERR, 'failed to delete distribute-list {} {}'.format(protocol, direction)) @@ -3710,15 +3745,17 @@ def __update_bgp(self, data_list): if data == {}: if not del_table: - command = "vtysh -c 'configure terminal' -c 'router ospf vrf {}' -c 'passive-interface {} {}'".\ - format(vrf, if_name, if_addr) + command = ['vtysh', '-c', 'configure terminal', + '-c', 'router ospf vrf {}'.format(vrf), + '-c', 'passive-interface {} {}'.format(if_name, if_addr)] if not self.__run_command(table, command): syslog.syslog(syslog.LOG_ERR, 'failed to create passive interface {} {}'.format(if_name, if_addr)) continue else: - command = "vtysh -c 'configure terminal' -c 'router ospf vrf {}' -c 'no passive-interface {} {}'".\ - format(vrf, if_name, if_addr) + command = ['vtysh', '-c', 'configure terminal', + '-c', 'router ospf vrf {}'.format(vrf), + '-c', 'no passive-interface {} {}'.format(if_name, if_addr)] if not self.__run_command(table, command): syslog.syslog(syslog.LOG_ERR, 'failed to delete passive interface {} {}'.format(if_name, if_addr)) diff --git a/src/sonic-frr-mgmt-framework/setup.py b/src/sonic-frr-mgmt-framework/setup.py index 28da6e24b40..e424af771da 100755 --- a/src/sonic-frr-mgmt-framework/setup.py +++ b/src/sonic-frr-mgmt-framework/setup.py @@ -14,8 +14,7 @@ install_requires = [ 'jinja2>=2.10', 'netaddr==0.8.0', - 'pyyaml==6.0.1', - 'zipp==1.2.0', # importlib-resources needs zipp and seems to have a bug where it will try to import too new of a version for Python 2 + 'pyyaml>=6.0.1', ], setup_requires = [ 'pytest-runner', diff --git a/src/sonic-frr-mgmt-framework/tests/test_config.py b/src/sonic-frr-mgmt-framework/tests/test_config.py index 7da2dc988c8..627af380b6b 100644 --- a/src/sonic-frr-mgmt-framework/tests/test_config.py +++ b/src/sonic-frr-mgmt-framework/tests/test_config.py @@ -53,11 +53,11 @@ def get_test_data(cls, test): return copy.deepcopy(cls.data_buf[test.table_name][test.key]) @staticmethod def compose_vtysh_cmd(cmd_list, negtive = False): - cmdline = 'vtysh' + result = ['vtysh'] for cmd in cmd_list: cmd = cmd.format('no ' if negtive else '') - cmdline += " -c '%s'" % cmd - return cmdline + result += ['-c', cmd] + return result def check_running_cmd(self, mock, is_del): if is_del: vtysh_cmd = self.vtysh_cmd if self.vtysh_neg_cmd is None else self.vtysh_neg_cmd @@ -82,7 +82,9 @@ def hdl_confed_peers_cmd(is_del, cmd_list, chk_data): if is_del: chk_data = list(reversed(chk_data)) for idx, cmd in enumerate(cmd_list): - last_cmd = re.findall(r"-c\s+'([^']+)'\s*", cmd)[-1] + # cmd is now a list: ['vtysh', '-c', ..., '-c', last_cmd] + # Extract last -c value + last_cmd = cmd[-1] if isinstance(cmd, list) else re.findall(r"-c\s+'([^']+)'\s*", cmd)[-1] neg_cmd = False if last_cmd.startswith('no '): neg_cmd = True @@ -266,3 +268,42 @@ def test_bgp_neighbor_shutdown(): # The neighbor shutdown msg test cases explicitly verify delete behavior, so skip the delete # verification data_set_del_test (else it would try the del of 'no ' commands as well and fail) data_set_del_test(neighbor_shutdown_data, skip_del=True) + + +@patch.dict('sys.modules', **mockmapping) +@patch('frrcfgd.frrcfgd.g_run_command') +def test_bgp_neighbor_description_injection(run_cmd): + """Regression test: shell metacharacters in BGP_NEIGHBOR description must be + passed as a literal vtysh argument, not interpreted by a shell.""" + from frrcfgd.frrcfgd import BGPConfigDaemon + daemon = BGPConfigDaemon() + + # Seed BGP_GLOBALS to set local ASN (reuse existing test data) + globals_seed = bgp_globals_data[0] # local_asn = 100 + CmdMapTestInfo.add_test_data(globals_seed) + bgp_globals_hdlr = [h for t, h in daemon.table_handler_list if t == 'BGP_GLOBALS'][0] + bgp_globals_hdlr('BGP_GLOBALS', globals_seed.key, CmdMapTestInfo.get_test_data(globals_seed)) + + # Now test BGP_NEIGHBOR description with injection payload + injection_payload = "'; id #" + run_cmd.reset_mock() + nbr_test = CmdMapTestInfo( + 'BGP_NEIGHBOR', 'default|10.0.0.1', + {'name': injection_payload}, + conf_bgp_cmd('default', 100) + [ + 'neighbor 10.0.0.1 description {}'.format(injection_payload) + ] + ) + CmdMapTestInfo.add_test_data(nbr_test) + nbr_hdlr = [h for t, h in daemon.table_handler_list if t == 'BGP_NEIGHBOR'][0] + nbr_hdlr('BGP_NEIGHBOR', nbr_test.key, CmdMapTestInfo.get_test_data(nbr_test)) + + # Verify g_run_command was called with a list (shell=False path) + assert run_cmd.called, "g_run_command was not called for BGP_NEIGHBOR description" + for call in run_cmd.call_args_list: + cmd = call[0][1] + assert isinstance(cmd, list), \ + "command must be a list (shell=False), got string: {}".format(cmd) + if any('description' in arg for arg in cmd): + assert any(injection_payload in arg for arg in cmd), \ + "injection payload not found as literal arg: {}".format(cmd) diff --git a/src/sonic-frr/Makefile b/src/sonic-frr/Makefile index 6852567ea32..1c821254b4d 100644 --- a/src/sonic-frr/Makefile +++ b/src/sonic-frr/Makefile @@ -4,42 +4,71 @@ SHELL = /bin/bash MAIN_TARGET = $(FRR) DERIVED_TARGET = $(FRR_PYTHONTOOLS) $(FRR_DBG) $(FRR_SNMP) $(FRR_SNMP_DBG) -SUFFIX = $(shell date +%Y%m%d\.%H%M%S) -STG_BRANCH = stg_temp.$(SUFFIX) +STG_PATCHED_BRANCH = $(FRR_TAG)-patched +PATCHSET_SHA_FILE = ../.sonic-frr-patch-$(STG_PATCHED_BRANCH).sha1 DPLANE_FPM_SONIC_MODULE = dplane_fpm_sonic/dplane_fpm_sonic.c # DEBEMAIL required by gpb dch export DEBEMAIL := sonicproject@googlegroups.com $(addprefix $(DEST)/, $(MAIN_TARGET)): $(DEST)/% : - # Build the package + + # Prepare source tree. + pushd ./frr - git fetch origin $(FRR_BRANCH) - git checkout -b $(FRR_BRANCH) origin/$(FRR_BRANCH) || git checkout $(FRR_BRANCH) + + # Rebuild the patched branch only when it is missing or patch inputs changed. + current_patch_hash=$$(cat ../patch/series ../patch/*.patch 2>/dev/null | sha1sum | awk '{print $$1}') + recorded_patch_hash="$$(cat $(PATCHSET_SHA_FILE) 2>/dev/null || true)" + patched_branch_exists=no + if git rev-parse --verify --quiet "refs/heads/$(STG_PATCHED_BRANCH)" >/dev/null; then + patched_branch_exists=yes + fi + if [[ "$$patched_branch_exists" == "no" || "$$current_patch_hash" != "$$recorded_patch_hash" ]]; then + git fetch origin tag $(FRR_TAG) + # Create a branch out of tag as stg needs a branch. + # Prefix branch name with "build-" to avoid conflicts with tag name. + git checkout -B build-$(FRR_TAG) refs/tags/$(FRR_TAG) ifeq ($(CROSS_BUILD_ENVIRON), y) - git reset --hard + git reset --hard endif - stg branch --create $(STG_BRANCH) $(FRR_TAG) - stg import -s ../patch/series - gbp dch --ignore-branch --new-version=$(FRR_VERSION)-sonic-$(FRR_SUBVERSION) --dch-opt="--force-bad-version" --commit --git-author + if [[ "$$patched_branch_exists" == "yes" ]]; then + stg branch --delete --force $(STG_PATCHED_BRANCH) + fi + stg branch --create $(STG_PATCHED_BRANCH) build-$(FRR_TAG) + stg import -s ../patch/series + gbp dch --ignore-branch --new-version=$(FRR_VERSION)-sonic-$(FRR_SUBVERSION) --dch-opt="--force-bad-version" --commit --git-author + echo "$$current_patch_hash" > $(PATCHSET_SHA_FILE) + else + # Reuse existing patched branch. + git checkout $(STG_PATCHED_BRANCH) + fi + + # Copy the sonic dplane module source file. cp ../$(DPLANE_FPM_SONIC_MODULE) zebra/ -ifeq ($(CROSS_BUILD_ENVIRON), y) - CFLAGS="-I $$CROSS_PERL_CORE_PATH" dpkg-buildpackage -rfakeroot -b -d -us -uc -Ppkg.frr.nortrlib -a$(CONFIGURED_ARCH) -Pcross,nocheck -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $(SONIC_DPKG_ADMINDIR) -else - dpkg-buildpackage -rfakeroot -b -us -uc -Ppkg.frr.nortrlib -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $(SONIC_DPKG_ADMINDIR) + # Clean artifacts in frr/debian directory from previous run. + fakeroot debian/rules clean + + # Also remove the cmake/autoconf build directory to prevent stale compiled + # binaries (e.g. lib/clippy) from a previous build against a different Python + # version (e.g. bookworm/3.11 vs trixie/3.13) from being reused. + rm -rf build/ + + # Build the package. + + FRR_BUILD_PROFILES="pkg.frr.nortrlib" +ifeq ($(ENABLE_FRR_TCMALLOC), y) + FRR_BUILD_PROFILES="$${FRR_BUILD_PROFILES},pkg.frr.tcmalloc" endif - stg undo || true - git clean -xfdf - git checkout $(FRR_BRANCH) - stg branch --delete --force $(STG_BRANCH) - git rev-parse --short HEAD | xargs git checkout + ifeq ($(CROSS_BUILD_ENVIRON), y) - git reset --hard + FRR_BUILD_PROFILES="$${FRR_BUILD_PROFILES},cross,nocheck" + CFLAGS="-I $$CROSS_PERL_CORE_PATH" dpkg-buildpackage -rfakeroot -b -d -us -uc -P$${FRR_BUILD_PROFILES} -a$(CONFIGURED_ARCH) -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $(SONIC_DPKG_ADMINDIR) +else + dpkg-buildpackage -rfakeroot -b -us -uc -P$${FRR_BUILD_PROFILES} -j$(SONIC_CONFIG_MAKE_JOBS) --admindir $(SONIC_DPKG_ADMINDIR) endif - git branch -f master origin/$(FRR_BRANCH) - git checkout master - git branch -D $(FRR_BRANCH) + popd mv $(DERIVED_TARGET) $* $(DEST)/ diff --git a/src/sonic-frr/dplane_fpm_sonic/dplane_fpm_sonic.c b/src/sonic-frr/dplane_fpm_sonic/dplane_fpm_sonic.c index 19312ae0bf1..c1c0e88aeb6 100644 --- a/src/sonic-frr/dplane_fpm_sonic/dplane_fpm_sonic.c +++ b/src/sonic-frr/dplane_fpm_sonic/dplane_fpm_sonic.c @@ -58,6 +58,8 @@ #include "zebra/zebra_srv6.h" #include "fpm/fpm.h" #include "lib/srv6.h" +#include "lib/vrf.h" +#include #define SOUTHBOUND_DEFAULT_ADDR INADDR_LOOPBACK #define SOUTHBOUND_DEFAULT_PORT 2620 @@ -120,7 +122,8 @@ enum custom_rtattr_srv6_localsid { FPM_SRV6_LOCALSID_OIF = 8, FPM_SRV6_LOCALSID_BPF = 9, FPM_SRV6_LOCALSID_SIDLIST = 10, - FPM_SRV6_LOCALSID_ENCAP_SRC_ADDR = 11, + FPM_SRV6_LOCALSID_ENCAP_SRC_ADDR = 11, + FPM_SRV6_LOCALSID_IFNAME = 12, }; enum custom_rtattr_encap_srv6 { @@ -1165,6 +1168,7 @@ static ssize_t netlink_srv6_localsid_msg_encode(int cmd, uint32_t action; uint32_t block_len, node_len, func_len, arg_len; bool is_usid = false; + struct interface *ifp; struct { struct nlmsghdr n; @@ -1196,7 +1200,7 @@ static ssize_t netlink_srv6_localsid_msg_encode(int cmd, req->n.nlmsg_flags = NLM_F_CREATE | NLM_F_REQUEST; if ((cmd == RTM_NEWSRV6LOCALSID) && - (zrouter.v6_rr_semantics)) + (zrouter.zav.v6_rr_semantics)) req->n.nlmsg_flags |= NLM_F_REPLACE; req->n.nlmsg_type = cmd; @@ -1314,6 +1318,13 @@ static ssize_t netlink_srv6_localsid_msg_encode(int cmd, FPM_SRV6_LOCALSID_NH6, &seg6local_ctx->nh6, sizeof(struct in6_addr))) return -1; + + ifp = if_lookup_by_index(seg6local_ctx->ifindex, VRF_DEFAULT); + if (ifp) + if (!nl_attr_put(&req->n, datalen, + FPM_SRV6_LOCALSID_IFNAME, ifp->name, + strlen(ifp->name) + 1)) + return -1; break; case ZEBRA_SEG6_LOCAL_ACTION_END_T: zvrf = vrf_lookup_by_table_id(seg6local_ctx->table); @@ -1455,7 +1466,7 @@ static ssize_t netlink_vpn_route_msg_encode(int cmd, req->n.nlmsg_flags = NLM_F_CREATE | NLM_F_REQUEST; if ((cmd == RTM_NEWROUTE) && - ((p->family == AF_INET) || zrouter.v6_rr_semantics)) + ((p->family == AF_INET) || zrouter.zav.v6_rr_semantics)) req->n.nlmsg_flags |= NLM_F_REPLACE; if(cmd == RTM_NEWROUTE) @@ -1629,7 +1640,7 @@ static ssize_t netlink_srv6_vpn_route_msg_encode(int cmd, req->n.nlmsg_flags = NLM_F_CREATE | NLM_F_REQUEST; if ((cmd == RTM_NEWROUTE) && - ((p->family == AF_INET) || zrouter.v6_rr_semantics)) + ((p->family == AF_INET) || zrouter.zav.v6_rr_semantics)) req->n.nlmsg_flags |= NLM_F_REPLACE; req->n.nlmsg_type = cmd; @@ -2439,6 +2450,179 @@ static ssize_t netlink_sidlist_msg_encode(int cmd, return NLMSG_ALIGN(req->n.nlmsg_len); } +static ssize_t +dplane_fpm_nl_send_br_port_shl_entries(const struct zebra_dplane_ctx *ctx, + uint8_t *nl_buf, size_t nl_buf_len) +{ + size_t i; + + /* + * The BR port update to FPM uses the private message extensions + * defined in kernel_netlink.h + */ + struct { + struct nlmsghdr n; + struct evpn_shl_msg e; + char buf[0]; + } *req = (void *)nl_buf; + enum dplane_op_e op = dplane_ctx_get_op(ctx); + + if (nl_buf_len < sizeof(*req)) + return -1; + + memset(req, 0, sizeof(*req)); + + req->n.nlmsg_len = NLMSG_LENGTH(sizeof(struct evpn_shl_msg)); + req->n.nlmsg_flags = NLM_F_CREATE | NLM_F_REQUEST; + + if (DPLANE_OP_BR_PORT_UPDATE == op) { + req->n.nlmsg_type = RTM_FPM_ADD_EVPN_SHL; + } else { + req->n.nlmsg_type = RTM_FPM_DEL_EVPN_SHL; + } + + req->e.esm_ifindex = dplane_ctx_get_ifindex(ctx); + req->e.esm_vid = dplane_ctx_get_br_port_vlan_id(ctx); + + if (dplane_ctx_get_br_port_sph_filter_cnt(ctx) > 0) { + const struct ipaddr *sph_filters = + dplane_ctx_get_br_port_sph_filters(ctx); + for (i = 0; i < dplane_ctx_get_br_port_sph_filter_cnt(ctx); + i++) { + if (IS_IPADDR_V4(&sph_filters[i])) { + if (!nl_attr_put(&req->n, nl_buf_len, + FPM_SHL_IPV4_ADDR, + &sph_filters[i].ipaddr_v4, + sizeof(sph_filters[i].ipaddr_v4))) + return 0; + } else if (IS_IPADDR_V6(&sph_filters[i])) { + if (!nl_attr_put(&req->n, nl_buf_len, + FPM_SHL_IPV6_ADDR, + &sph_filters[i].ipaddr_v6, + sizeof(sph_filters[i].ipaddr_v6))) + return 0; + } else { + /* Unknown address family in SPH filter; skip. */ + continue; + } + } + } + + return NLMSG_ALIGN(req->n.nlmsg_len); +} + +static ssize_t +dplane_fpm_nl_send_br_port_df_entries(const struct zebra_dplane_ctx *ctx, + uint8_t *nl_buf, size_t nl_buf_len) +{ + struct { + struct nlmsghdr n; + struct evpn_df_msg e; + char buf[0]; + } *req = (void *)nl_buf; + enum dplane_op_e op = dplane_ctx_get_op(ctx); + + if (nl_buf_len < sizeof(*req)) + return -1; + + memset(req, 0, sizeof(*req)); + + req->n.nlmsg_len = NLMSG_LENGTH(sizeof(struct evpn_df_msg)); + req->n.nlmsg_flags = NLM_F_CREATE | NLM_F_REQUEST; + + req->e.edm_ifindex = dplane_ctx_get_ifindex(ctx); + req->e.edm_vid = dplane_ctx_get_br_port_vlan_id(ctx); + + if (DPLANE_OP_BR_PORT_UPDATE == op) { + const uint32_t flags = dplane_ctx_get_br_port_flags(ctx); + + req->n.nlmsg_type = RTM_FPM_ADD_EVPN_DF; + req->e.edm_non_df = ((flags & DPLANE_BR_PORT_NON_DF) != 0); + } else { + req->n.nlmsg_type = RTM_FPM_DEL_EVPN_DF; + } + + return NLMSG_ALIGN(req->n.nlmsg_len); +} + +static ssize_t +dplane_fpm_nl_send_br_port_backup_nhg(const struct zebra_dplane_ctx *ctx, + uint8_t *nl_buf, size_t nl_buf_len) +{ + struct { + struct nlmsghdr n; + struct evpn_backup_nhg_msg e; + char buf[0]; + } *req = (void *)nl_buf; + + if (nl_buf_len < sizeof(*req)) + return -1; + + /* + * There is currently only a backup NHG per-port, so + * only send it on VLAN 0, which represents the entire port. + */ + if (dplane_ctx_get_br_port_vlan_id(ctx) != 0) + return 0; + + memset(req, 0, sizeof(*req)); + + req->n.nlmsg_len = NLMSG_LENGTH(sizeof(struct evpn_backup_nhg_msg)); + req->n.nlmsg_flags = NLM_F_CREATE | NLM_F_REQUEST; + + req->e.ebnm_ifindex = dplane_ctx_get_ifindex(ctx); + req->e.ebnm_backup_nhg_id = dplane_ctx_get_br_port_backup_nhg_id(ctx); + + if (req->e.ebnm_backup_nhg_id > 0) { + req->n.nlmsg_type = RTM_FPM_ADD_EVPN_ES_BACKUP_NHG; + } else { + req->n.nlmsg_type = RTM_FPM_DEL_EVPN_ES_BACKUP_NHG; + } + + return NLMSG_ALIGN(req->n.nlmsg_len); +} + +static ssize_t +dplane_fpm_nl_handle_br_port_update(const struct zebra_dplane_ctx *ctx, + uint8_t *nl_buf, size_t nl_buf_len) +{ + ssize_t buf_used = 0; + ssize_t rv = 0; + + /* + * DPLANE_OP_BR_PORT_UPDATE/DELETE is used in the context of + * EVPN updates. Encode SHL, DF, and backup NHG messages. + * SHL and DF always emit at least an nlmsghdr, so a 0/negative + * return signals a hard buffer-too-small failure: abort the + * BR_PORT encode rather than enqueue a partial update. + */ + rv = dplane_fpm_nl_send_br_port_shl_entries(ctx, nl_buf, nl_buf_len); + if (rv <= 0) + return rv; + buf_used += rv; + nl_buf += rv; + nl_buf_len -= rv; + + rv = dplane_fpm_nl_send_br_port_df_entries(ctx, nl_buf, nl_buf_len); + if (rv <= 0) + return rv; + buf_used += rv; + nl_buf += rv; + nl_buf_len -= rv; + + /* + * Backup NHG is per-port and only emitted on VLAN 0; a 0 return + * for VLAN != 0 is intentional. Only treat a negative return as + * a hard failure here. + */ + rv = dplane_fpm_nl_send_br_port_backup_nhg(ctx, nl_buf, nl_buf_len); + if (rv < 0) + return rv; + buf_used += rv; + + return buf_used; +} + #define DPLANE_FPM_NL_BUF_SIZE 65536 /** * Encode data plane operation context into netlink and enqueue it in the FPM @@ -2667,6 +2851,22 @@ static int fpm_nl_enqueue(struct fpm_nl_ctx *fnc, struct zebra_dplane_ctx *ctx) fnc, 0, &fnc->t_ribreset); break; + case DPLANE_OP_BR_PORT_UPDATE: + case DPLANE_OP_BR_PORT_DELETE: + rv = dplane_fpm_nl_handle_br_port_update(ctx, nl_buf, + sizeof(nl_buf)); + if (rv <= 0) { + if (IS_ZEBRA_DEBUG_FPM) + zlog_debug("%s: br_port encode returned %zd", + __func__, rv); + dplane_ctx_set_status(ctx, + ZEBRA_DPLANE_REQUEST_FAILURE); + return 0; + } + + nl_buf_len += (size_t)rv; + break; + /* Un-handled by FPM at this time. */ case DPLANE_OP_PW_INSTALL: case DPLANE_OP_PW_UNINSTALL: @@ -2683,7 +2883,6 @@ static int fpm_nl_enqueue(struct fpm_nl_ctx *fnc, struct zebra_dplane_ctx *ctx) case DPLANE_OP_RULE_DELETE: case DPLANE_OP_RULE_UPDATE: case DPLANE_OP_NEIGH_DISCOVER: - case DPLANE_OP_BR_PORT_UPDATE: case DPLANE_OP_IPTABLE_ADD: case DPLANE_OP_IPTABLE_DELETE: case DPLANE_OP_IPSET_ADD: @@ -2976,7 +3175,7 @@ static void fpm_enqueue_rmac_table(struct hash_bucket *bucket, void *arg) dplane_ctx_set_op(fra->ctx, DPLANE_OP_MAC_INSTALL); dplane_mac_init(fra->ctx, fra->zl3vni->vxlan_if, zif->brslave_info.br_if, vid, - &zrmac->macaddr, vni->vni, zrmac->fwd_info.r_vtep_ip, sticky, + &zrmac->macaddr, vni->vni, &zrmac->fwd_info.r_vtep_ip, sticky, 0 /*nhg*/, 0 /*update_flags*/); if (fpm_nl_enqueue(fra->fnc, fra->ctx) == -1) { event_add_timer(zrouter.master, fpm_rmac_send, @@ -3381,6 +3580,20 @@ static int fpm_nl_process(struct zebra_dplane_provider *prov) * anyway. */ if (fnc->socket != -1 && fnc->connecting == false) { + enum dplane_op_e op = dplane_ctx_get_op(ctx); + + /* + * Skip multicast routes: MRIB routes flow through + * the dataplane pipeline but should not be sent to + * FPM. Without this filter, MRIB ROUTE_DELETE events + * can remove valid unicast routes from APP_DB. + */ + if ((op == DPLANE_OP_ROUTE_DELETE || + op == DPLANE_OP_ROUTE_INSTALL || + op == DPLANE_OP_ROUTE_UPDATE) && + dplane_ctx_get_safi(ctx) == SAFI_MULTICAST) + goto skip; + frr_with_mutex (&fnc->ctxqueue_mutex) { dplane_ctx_enqueue_tail(&fnc->ctxqueue, ctx); cur_queue = @@ -3391,7 +3604,7 @@ static int fpm_nl_process(struct zebra_dplane_provider *prov) peak_queue = cur_queue; continue; } - +skip: dplane_ctx_set_status(ctx, ZEBRA_DPLANE_REQUEST_SUCCESS); dplane_provider_enqueue_out_ctx(prov, ctx); } diff --git a/src/sonic-frr/frr b/src/sonic-frr/frr index 88f5c06cbc1..4cb6d9e6bfe 160000 --- a/src/sonic-frr/frr +++ b/src/sonic-frr/frr @@ -1 +1 @@ -Subproject commit 88f5c06cbc1cc4d62e1cba3e7791f5cea4179ba5 +Subproject commit 4cb6d9e6bfe4ad503d1fab21e6f665804b0649ac diff --git a/src/sonic-frr/patch/0002-SONiC-ONLY-Allow-BGP-attr-NEXT_HOP-to-be-0.0.0.0-due-to-allevia.patch b/src/sonic-frr/patch/0002-SONiC-ONLY-Allow-BGP-attr-NEXT_HOP-to-be-0.0.0.0-due-to-allevia.patch deleted file mode 100644 index c70a24eaeb4..00000000000 --- a/src/sonic-frr/patch/0002-SONiC-ONLY-Allow-BGP-attr-NEXT_HOP-to-be-0.0.0.0-due-to-allevia.patch +++ /dev/null @@ -1,24 +0,0 @@ -[PATCH] From afff474c79e0c177e090d1b45d68c9f816a52e3e Mon Sep 17 - -From: Pavel Shirshov -Date: Mon, 16 Nov 2020 18:33:46 -0800 - 00:00:00 2001 Subject: [PATCH 4/8] Allow BGP attr NEXT_HOP to be 0.0.0.0 due - to alleviate ---- - bgpd/bgp_route.c | 3 +-- - 1 file changed, 1 insertion(+), 2 deletions(-) - -diff --git a/bgpd/bgp_route.c b/bgpd/bgp_route.c -index aa6c701ca..a8427bc3b 100644 ---- a/bgpd/bgp_route.c -+++ b/bgpd/bgp_route.c -@@ -4786,8 +4786,7 @@ bool bgp_update_martian_nexthop(struct bgp *bgp, afi_t afi, safi_t safi, - * E.g.: IPv6 prefix can be with nexthop: 0.0.0.0, and mp_nexthop: fc00::1. - */ - if (CHECK_FLAG(attr->flag, ATTR_FLAG_BIT(BGP_ATTR_NEXT_HOP))) -- nh_invalid = (attr->nexthop.s_addr == INADDR_ANY || -- !ipv4_unicast_valid(&attr->nexthop) || -+ nh_invalid = (!ipv4_unicast_valid(&attr->nexthop) || - bgp_nexthop_self(bgp, afi, type, stype, attr, dest)); - - /* If MP_NEXTHOP is present, validate it. */ diff --git a/src/sonic-frr/patch/0007-SONiC-ONLY-ignore-route-from-default-table.patch b/src/sonic-frr/patch/0007-SONiC-ONLY-ignore-route-from-default-table.patch deleted file mode 100644 index 823d0f4d639..00000000000 --- a/src/sonic-frr/patch/0007-SONiC-ONLY-ignore-route-from-default-table.patch +++ /dev/null @@ -1,31 +0,0 @@ -[PATCH] From ca66350aecf7db3354019480d11754fabae3a97c Mon Sep 17 - -From: Stepan Blyschak -Date: Thu, 20 Oct 2022 13:07:18 +0000 - 00:00:00 2001 Subject: [PATCH 09/13] ignore route from default table - -Signed-off-by: Stepan Blyschak ---- - zebra/dplane_fpm_nl.c | 9 +++++++++ - 1 file changed, 9 insertions(+) - -diff --git a/zebra/dplane_fpm_nl.c b/zebra/dplane_fpm_nl.c -index 41f603a9e..74225e6cb 100644 ---- a/zebra/dplane_fpm_nl.c -+++ b/zebra/dplane_fpm_nl.c -@@ -965,6 +965,15 @@ static int fpm_nl_enqueue(struct fpm_nl_ctx *fnc, struct zebra_dplane_ctx *ctx) - || op == DPLANE_OP_NH_UPDATE)) - return 0; - -+ /* -+ * Ignore route from default table, because when mgmt port goes down, -+ * zebra will remove the default route and causing ASIC to blackhole IO. -+ */ -+ if (dplane_ctx_get_table(ctx) == RT_TABLE_DEFAULT) { -+ zlog_debug("%s: discard default table route", __func__); -+ return 0; -+ } -+ - nl_buf_len = 0; - - /* diff --git a/src/sonic-frr/patch/0009-SONiC-ONLY-bgpd-Change-log-level-for-graceful-restart-events.patch b/src/sonic-frr/patch/0009-SONiC-ONLY-bgpd-Change-log-level-for-graceful-restart-events.patch index ee712406622..ee33de7aff9 100644 --- a/src/sonic-frr/patch/0009-SONiC-ONLY-bgpd-Change-log-level-for-graceful-restart-events.patch +++ b/src/sonic-frr/patch/0009-SONiC-ONLY-bgpd-Change-log-level-for-graceful-restart-events.patch @@ -1,19 +1,18 @@ -[PATCH] From c423bce4db804c1d07d65ce3d06a9e62c4eceb2b Mon Sep 17 +[PATCH] From c423bce4db804c1d07d65ce3d06a9e62c4eceb2b Mon Sep 17 00:00:00 2001 From: stormliang -Subject: [PATCH] From c423bce4db804c1d07d65ce3d06a9e62c4eceb2b Mon Sep 17 - 00:00:00 2001 Subject: [PATCH] change log level for graceful restart events ---- - bgpd/bgp_fsm.c | 37 ++++++++++++++++--------------------- - bgpd/bgpd.c | 10 ++++------ - 2 files changed, 20 insertions(+), 27 deletions(-) +Subject: [PATCH] change log level for graceful restart events +SONiC ONLY: Change log level for graceful restart events from +zlog_debug (only shown when debug is enabled) to zlog_info +(always shown) for easier diagnosis. +--- diff --git a/bgpd/bgp_fsm.c b/bgpd/bgp_fsm.c -index ce57ca53f..18798d345 100644 +index 58ea2d6c9..29c4daaa5 100644 --- a/bgpd/bgp_fsm.c +++ b/bgpd/bgp_fsm.c -@@ -765,8 +765,8 @@ static void bgp_graceful_restart_timer_expire(struct event *thread) +@@ -775,8 +775,8 @@ static void bgp_graceful_restart_timer_expire(struct event *thread) afi_t afi; safi_t safi; @@ -24,7 +23,7 @@ index ce57ca53f..18798d345 100644 peer, bgp_peer_get_connection_direction(connection)); FOREACH_AFI_SAFI (afi, safi) { -@@ -824,8 +824,8 @@ static void bgp_graceful_stale_timer_expire(struct event *thread) +@@ -834,8 +834,8 @@ static void bgp_graceful_stale_timer_expire(struct event *thread) afi_t afi; safi_t safi; @@ -35,7 +34,7 @@ index ce57ca53f..18798d345 100644 bgp_peer_get_connection_direction(connection)); /* NSF delete stale route */ -@@ -1411,19 +1411,16 @@ enum bgp_fsm_state_progress bgp_stop(struct peer_connection *connection) +@@ -1683,19 +1683,16 @@ enum bgp_fsm_state_progress bgp_stop(struct peer_connection *connection) /* graceful restart */ if (connection->t_gr_stale) { event_cancel(&connection->t_gr_stale); @@ -51,45 +50,45 @@ index ce57ca53f..18798d345 100644 - peer, peer->v_gr_restart, - bgp_peer_get_connection_direction(connection)); - zlog_debug("%pBP graceful restart stalepath timer started for %d sec for %s", -- peer, peer->bgp->stalepath_time, +- peer, bgp->stalepath_time, - bgp_peer_get_connection_direction(connection)); - } + zlog_info("%pBP graceful restart timer started for %d sec for %s", + peer, peer->v_gr_restart, + bgp_peer_get_connection_direction(connection)); + zlog_info("%pBP graceful restart stalepath timer started for %d sec for %s", -+ peer, peer->bgp->stalepath_time, ++ peer, bgp->stalepath_time, + bgp_peer_get_connection_direction(connection)); BGP_TIMER_ON(connection->t_gr_restart, bgp_graceful_restart_timer_expire, peer->v_gr_restart); -@@ -2282,17 +2279,15 @@ bgp_establish(struct peer_connection *connection) - UNSET_FLAG(peer->sflags, PEER_STATUS_NSF_MODE); - if (connection->t_gr_stale) { - event_cancel(&connection->t_gr_stale); -- if (bgp_debug_neighbor_events(peer)) -- zlog_debug("%pBP graceful restart stalepath timer stopped for %s", -- peer, bgp_peer_get_connection_direction(connection)); -+ zlog_info("%pBP graceful restart stalepath timer stopped for %s", -+ peer, bgp_peer_get_connection_direction(connection)); - } - } +@@ -2320,8 +2317,7 @@ static void bgp_peer_process_gr_cap_clear_stale(struct peer *peer) - if (connection->t_gr_restart) { - event_cancel(&connection->t_gr_restart); + if (peer->connection->t_gr_restart) { + event_cancel(&peer->connection->t_gr_restart); - if (bgp_debug_neighbor_events(peer)) -- zlog_debug("%pBP graceful restart timer stopped for %s", peer, -- bgp_peer_get_connection_direction(connection)); -+ zlog_info("%pBP graceful restart timer stopped for %s", peer, -+ bgp_peer_get_connection_direction(connection)); +- zlog_debug("%pBP: graceful restart timer stopped", peer); ++ zlog_info("%pBP: graceful restart timer stopped", peer); } - /* Reset uptime, turn on keepalives, send current table. */ + UNSET_FLAG(peer->sflags, PEER_STATUS_NSF_WAIT); +@@ -2362,9 +2358,8 @@ static void bgp_peer_process_gr_cap_clear_stale(struct peer *peer) + UNSET_FLAG(peer->sflags, PEER_STATUS_NSF_MODE); + if (peer->connection->t_gr_stale) { + event_cancel(&peer->connection->t_gr_stale); +- if (bgp_debug_neighbor_events(peer)) +- zlog_debug("%s: graceful restart stalepath timer stopped", +- peer->host); ++ zlog_info("%s: graceful restart stalepath timer stopped", ++ peer->host); + } + } + } diff --git a/bgpd/bgpd.c b/bgpd/bgpd.c -index c50568510..42f0914f2 100644 +index e3b26b37a..a725e9ea0 100644 --- a/bgpd/bgpd.c +++ b/bgpd/bgpd.c -@@ -2702,15 +2702,13 @@ void peer_nsf_stop(struct peer *peer) +@@ -2723,15 +2723,13 @@ void peer_nsf_stop(struct peer *peer) if (peer->connection->t_gr_restart) { event_cancel(&peer->connection->t_gr_restart); diff --git a/src/sonic-frr/patch/0011-SONiC-ONLY-cross-compile-changes.patch b/src/sonic-frr/patch/0011-SONiC-ONLY-cross-compile-changes.patch index 1a9e44c656f..26e634d7c2b 100644 --- a/src/sonic-frr/patch/0011-SONiC-ONLY-cross-compile-changes.patch +++ b/src/sonic-frr/patch/0011-SONiC-ONLY-cross-compile-changes.patch @@ -1,9 +1,9 @@ -[PATCH] From ece218405fe4c086017f2a4f2b2b4c86b9790db0 Mon Sep 17 +[PATCH] From ece218405fe4c086017f2a4f2b2b4c86b9790db0 Mon Sep 17 00:00:00 2001 From: Saikrishna Arcot Date: Wed, 6 Jul 2022 11:28:16 -0700 - 00:00:00 2001 Subject: [PATCH] Make changes to support crosscompilation in - SONiC + +Subject: [PATCH] Make changes to support crosscompilation in SONiC Signed-off-by: Saikrishna Arcot --- @@ -44,11 +44,11 @@ index 5a1b74cfc..000000000 -build/doc/manpages/_build/man/mtracebis.8 -build/doc/manpages/_build/man/vtysh.1 diff --git a/debian/rules b/debian/rules -index 74573c9a0..e0b626fbf 100755 +index 110326623..e77824233 100755 --- a/debian/rules +++ b/debian/rules -@@ -39,10 +39,17 @@ else - CONF_GRPC=--enable-grpc +@@ -45,10 +45,17 @@ else + CONF_ASAN=--enable-address-sanitizer endif +DEB_BUILD_ARCH ?= $(shell dpkg-architecture -qDEB_BUILD_ARCH) @@ -66,7 +66,7 @@ index 74573c9a0..e0b626fbf 100755 override_dh_auto_configure: $(shell dpkg-buildflags --export=sh); \ -@@ -80,10 +87,10 @@ override_dh_auto_configure: +@@ -87,10 +94,10 @@ override_dh_auto_configure: override_dh_auto_install: dh_auto_install diff --git a/src/sonic-frr/patch/0012-SONiC-ONLY-build-dplane-fpm-sonic-module.patch b/src/sonic-frr/patch/0012-SONiC-ONLY-build-dplane-fpm-sonic-module.patch index c23de09f4b2..d6cf2bb6e04 100644 --- a/src/sonic-frr/patch/0012-SONiC-ONLY-build-dplane-fpm-sonic-module.patch +++ b/src/sonic-frr/patch/0012-SONiC-ONLY-build-dplane-fpm-sonic-module.patch @@ -30,12 +30,12 @@ index f76744736..c222984ae 100644 @@ -252,6 +252,12 @@ zebra_dplane_fpm_nl_la_LDFLAGS = $(MODULE_LDFLAGS) zebra_dplane_fpm_nl_la_LIBADD = endif - + +module_LTLIBRARIES += zebra/dplane_fpm_sonic.la + +zebra_dplane_fpm_sonic_la_SOURCES = zebra/dplane_fpm_sonic.c +zebra_dplane_fpm_sonic_la_LDFLAGS = $(MODULE_LDFLAGS) -+zebra_dplane_fpm_sonic_la_LIBADD = ++zebra_dplane_fpm_sonic_la_LIBADD = -lnexthopgroup + if NETLINK_DEBUG zebra_zebra_SOURCES += \ diff --git a/src/sonic-frr/patch/0014-SONiC-ONLY-Adding-changes-to-write-ip-nht-resolve-via-default-c.patch b/src/sonic-frr/patch/0014-SONiC-ONLY-Adding-changes-to-write-ip-nht-resolve-via-default-c.patch index 3240004ba27..ea75865df62 100644 --- a/src/sonic-frr/patch/0014-SONiC-ONLY-Adding-changes-to-write-ip-nht-resolve-via-default-c.patch +++ b/src/sonic-frr/patch/0014-SONiC-ONLY-Adding-changes-to-write-ip-nht-resolve-via-default-c.patch @@ -49,7 +49,7 @@ index 3231b03b8..3beb552c6 100644 + else + vty_out(vty, "!\n"); + } -+ return 0; ++ return; + +} + diff --git a/src/sonic-frr/patch/0027-Dont-skip-kernel-routes-uninstall.patch b/src/sonic-frr/patch/0027-Dont-skip-kernel-routes-uninstall.patch index 3b8d164bbc7..73468949625 100644 --- a/src/sonic-frr/patch/0027-Dont-skip-kernel-routes-uninstall.patch +++ b/src/sonic-frr/patch/0027-Dont-skip-kernel-routes-uninstall.patch @@ -1,12 +1,27 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: Carmine Scarpitta +Subject: [PATCH] zebra: Don't skip kernel routes uninstall + +Remove the RIB_KERNEL_ROUTE guard on the delete path in rib_process() +so that kernel route deletions are propagated to dataplane providers +(FPM), restoring symmetry with the add path. + +Upstream: https://github.com/FRRouting/frr/issues/19637 + +Signed-off-by: Carmine Scarpitta +--- + zebra/zebra_rib.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + diff --git a/zebra/zebra_rib.c b/zebra/zebra_rib.c -index da49dc7e2..edc348d21 100644 +index 2b09fa9a9..a56dc893f 100644 --- a/zebra/zebra_rib.c +++ b/zebra/zebra_rib.c -@@ -1509,7 +1509,7 @@ static void rib_process(struct route_node *rn) +@@ -1498,7 +1498,7 @@ static void rib_process(struct route_node *rn) rib_process_update_fib(zvrf, rn, old_fib, new_fib); else if (new_fib) rib_process_add_fib(zvrf, rn, new_fib); -- else if (old_fib && !RIB_SYSTEM_ROUTE(old_fib)) +- else if (old_fib && !RIB_KERNEL_ROUTE(old_fib)) + else if (old_fib) rib_process_del_fib(zvrf, rn, old_fib); diff --git a/src/sonic-frr/patch/0028-zebra-EVPN-VXLAN-Multihome-extern-mode-Enable-kernel.patch b/src/sonic-frr/patch/0028-zebra-EVPN-VXLAN-Multihome-extern-mode-Enable-kernel.patch new file mode 100644 index 00000000000..48b217b36a0 --- /dev/null +++ b/src/sonic-frr/patch/0028-zebra-EVPN-VXLAN-Multihome-extern-mode-Enable-kernel.patch @@ -0,0 +1,211 @@ +From 3923c7bd4fe4805c3fa5962b510fa4b78831e71e Mon Sep 17 00:00:00 2001 +From: Mrinmoy Ghosh +Date: Tue, 19 Aug 2025 16:21:29 +0000 +Subject: zebra : EVPN VXLAN Multihome extern mode: Enable + --kernel-mac-ext-learn + +Introduction of "--kernel-mac-ext-learn" mode of operation in zebra. + +This is part of the change is to enable the + option '--kernel-mac-ext-learn' in zebra. + +Rationale: +EVPN Multihoming External Mode Support is to enable platforms doing +Hardware Based MAC Learning and Aging to support EVPN VXLAN Multihome. + +MAC's in this mode for both data and control plane will be + marked and programmed as 'extern_only' in kernel, so that kernel aging + is disabled for these MACs. Zebra along with Hardware(HW) will control + these MACs for control plane and data plane respectively. + +Per File change summary: +zebra/main.c: + Add option '--kernel-mac-ext-learn' in zebra startup. + Alignment changes for the other options to match the new option width + and keep description alignment consistent +zebra/zebra_router.c: + - zebra_router_init definition updation to pass + kernel_mac_ext_learn mode + - store kernel_mac_ext_learn in zrouter zav structure +zebra/zebra_router.h: + - new bool field 'kernel_mac_ext_learn' in zebra_router, to + store extern only mode +zebra/zebra_vxlan.h: + - Accessor for Extern Only mode i.e zebra_mac_ext_learn_mode + +Signed-off-by: Mrinmoy Ghosh +Signed-off-by: Mrinmoy Ghosh +Signed-off-by: Patrice Brissette +Signed-off-by: Tamer Ahmed +(cherry picked from commit e2f14ac2779a08e70eab1096da9f6765845af226) + +diff --git a/zebra/main.c b/zebra/main.c +index 67638afbb..d86753e9a 100644 +--- a/zebra/main.c ++++ b/zebra/main.c +@@ -80,6 +80,7 @@ uint32_t rt_table_main_id = RT_TABLE_MAIN; + #define OPTION_ASIC_OFFLOAD 2001 + #define OPTION_V6_WITH_V4_NEXTHOP 2002 + #define OPTION_NEXTHOP_WEIGHT_16_BIT 2003 ++#define OPTION_KERNEL_MAC_EXT_LEARN 2004 + + /* Command line options. */ + const struct option longopts[] = { +@@ -91,6 +92,7 @@ const struct option longopts[] = { + { "asic-offload", optional_argument, NULL, OPTION_ASIC_OFFLOAD }, + { "v6-with-v4-nexthops", no_argument, NULL, OPTION_V6_WITH_V4_NEXTHOP }, + { "nexthop-weight-16-bit", no_argument, NULL, OPTION_NEXTHOP_WEIGHT_16_BIT }, ++ { "kernel-mac-ext-learn", no_argument, NULL, OPTION_KERNEL_MAC_EXT_LEARN }, + #ifdef HAVE_NETLINK + { "vrfwnetns", no_argument, NULL, 'n' }, + { "nl-bufsize", required_argument, NULL, 's' }, +@@ -359,6 +361,7 @@ int main(int argc, char **argv) + bool v6_with_v4_nexthop = false; + bool notify_on_ack = true; + bool nexthop_weight_16_bit = false; ++ bool kernel_mac_ext_learn = false; + + zserv_path = NULL; + +@@ -373,22 +376,23 @@ int main(int argc, char **argv) + #endif + , + longopts, +- " -b, --batch Runs in batch mode\n" +- " -a, --allow_delete Allow other processes to delete zebra routes\n" +- " -z, --socket Set path of zebra socket\n" +- " -e, --ecmp Specify ECMP to use.\n" +- " -r, --retain When program terminates, retain added route by zebra.\n" +- " -A, --asic-offload FRR is interacting with an asic underneath the linux kernel\n" +- " --v6-with-v4-nexthops Underlying dataplane supports v6 routes with v4 nexthops\n" ++ " -b, --batch Runs in batch mode\n" ++ " -a, --allow_delete Allow other processes to delete zebra routes\n" ++ " -z, --socket Set path of zebra socket\n" ++ " -e, --ecmp Specify ECMP to use.\n" ++ " -r, --retain When program terminates, retain added route by zebra.\n" ++ " -A, --asic-offload FRR is interacting with an asic underneath the linux kernel\n" ++ " --v6-with-v4-nexthops Underlying dataplane supports v6 routes with v4 nexthops\n" + " --nexthop-weight-16-bit Use 16 bit nexthop weights instead of 8\n" ++ " --kernel-mac-ext-learn Enable kernel external learning for MAC\n" + #ifdef HAVE_NETLINK +- " -s, --nl-bufsize Set netlink receive buffer size\n" +- " -n, --vrfwnetns Use NetNS as VRF backend (deprecated, use -w)\n" +- " --v6-rr-semantics Use v6 RR semantics\n" ++ " -s, --nl-bufsize Set netlink receive buffer size\n" ++ " -n, --vrfwnetns Use NetNS as VRF backend (deprecated, use -w)\n" ++ " --v6-rr-semantics Use v6 RR semantics\n" + #else +- " -s, Set kernel socket receive buffer size\n" ++ " -s, Set kernel socket receive buffer size\n" + #endif /* HAVE_NETLINK */ +- " -R, --routing-table Set kernel routing table\n"); ++ " -R, --routing-table Set kernel routing table\n"); + + while (1) { + int opt = frr_getopt(argc, argv, NULL); +@@ -442,6 +446,9 @@ int main(int argc, char **argv) + case 'R': + rt_table_main_id = atoi(optarg); + break; ++ case OPTION_KERNEL_MAC_EXT_LEARN: ++ kernel_mac_ext_learn = true; ++ break; + #ifdef HAVE_NETLINK + case 'n': + fprintf(stderr, +@@ -474,7 +481,8 @@ int main(int argc, char **argv) + + /* Zebra related initialize. */ + libagentx_init(); +- zebra_router_init(asic_offload, notify_on_ack, v6_with_v4_nexthop, nexthop_weight_16_bit); ++ zebra_router_init(asic_offload, notify_on_ack, v6_with_v4_nexthop, nexthop_weight_16_bit, ++ kernel_mac_ext_learn); + zserv_init(); + zebra_rib_init(); + zebra_if_init(); +diff --git a/zebra/zebra_evpn.h b/zebra/zebra_evpn.h +index e6852eb59..41532cdef 100644 +--- a/zebra/zebra_evpn.h ++++ b/zebra/zebra_evpn.h +@@ -18,6 +18,7 @@ + #include "zebra/zebra_l2.h" + #include "zebra/interface.h" + #include "zebra/zebra_vxlan.h" ++#include "zebra/zebra_vxlan_if.h" + + #ifdef __cplusplus + extern "C" { +diff --git a/zebra/zebra_router.c b/zebra/zebra_router.c +index bd6d5cae6..089d3ed48 100644 +--- a/zebra/zebra_router.c ++++ b/zebra/zebra_router.c +@@ -15,6 +15,7 @@ + #include "zebra_mlag.h" + #include "zebra_nhg.h" + #include "zebra_neigh.h" ++#include "zebra_evpn.h" + #include "zebra/zebra_tc.h" + #include "debug.h" + #include "zebra_script.h" +@@ -285,7 +286,7 @@ bool zebra_router_notify_on_ack(void) + } + + void zebra_router_init(bool asic_offload, bool notify_on_ack, bool v6_with_v4_nexthop, +- bool nexthop_weight_16_bit) ++ bool nexthop_weight_16_bit, bool kernel_mac_ext_learn) + { + zrouter.sequence_num = 0; + +@@ -346,6 +347,7 @@ void zebra_router_init(bool asic_offload, bool notify_on_ack, bool v6_with_v4_ne + zrouter.zav.notify_on_ack = notify_on_ack; + zrouter.zav.v6_with_v4_nexthop = v6_with_v4_nexthop; + zrouter.zav.nexthop_weight_is_16bit = nexthop_weight_16_bit; ++ zrouter.zav.kernel_mac_ext_learn = kernel_mac_ext_learn; + + /* + * If you start using asic_notification_nexthop_control +diff --git a/zebra/zebra_router.h b/zebra/zebra_router.h +index 4904f59bb..7aa3dabda 100644 +--- a/zebra/zebra_router.h ++++ b/zebra/zebra_router.h +@@ -141,7 +141,10 @@ struct zebra_architectural_values { + */ + bool asic_notification_nexthop_control; + bool nexthop_weight_is_16bit; +- ++ /* ++ * Is zebra operating in Kernel MAC-EXT-LEARN mode ++ */ ++ bool kernel_mac_ext_learn; + }; + + struct zebra_router { +@@ -253,7 +256,7 @@ extern struct zebra_router zrouter; + extern uint32_t rcvbufsize; + + extern void zebra_router_init(bool asic_offload, bool notify_on_ack, bool v6_with_v4_nexthop, +- bool nexthop_weight_16_bit); ++ bool nexthop_weight_16_bit, bool kernel_mac_ext_learn); + extern void zebra_router_cleanup(void); + extern void zebra_router_terminate(void); + +diff --git a/zebra/zebra_vxlan.h b/zebra/zebra_vxlan.h +index ef4c39c06..95cdf70bd 100644 +--- a/zebra/zebra_vxlan.h ++++ b/zebra/zebra_vxlan.h +@@ -40,6 +40,12 @@ is_vxlan_flooding_head_end(void) + return (zvrf->vxlan_flood_ctrl == VXLAN_FLOOD_HEAD_END_REPL); + } + ++/* static function returning if the MAC-EXT-LEARN mode is set */ ++static inline bool zebra_mac_ext_learn_mode(void) ++{ ++ return zrouter.zav.kernel_mac_ext_learn; ++} ++ + /* VxLAN interface change flags of interest. */ + #define ZEBRA_VXLIF_LOCAL_IP_CHANGE (1 << 0) + #define ZEBRA_VXLIF_MASTER_CHANGE (1 << 1) +-- +2.43.0 + diff --git a/src/sonic-frr/patch/0029-zebra-New-protocol-RTPROT_HW-for-hardware-learnt-MAC.patch b/src/sonic-frr/patch/0029-zebra-New-protocol-RTPROT_HW-for-hardware-learnt-MAC.patch new file mode 100644 index 00000000000..2e8cc5f764b --- /dev/null +++ b/src/sonic-frr/patch/0029-zebra-New-protocol-RTPROT_HW-for-hardware-learnt-MAC.patch @@ -0,0 +1,40 @@ +From e7edfb7449a40eda0003449caa34e5d7b74e21db Mon Sep 17 00:00:00 2001 +From: Mrinmoy Ghosh +Date: Tue, 19 Aug 2025 22:52:23 +0000 +Subject: zebra: New protocol RTPROT_HW for hardware learnt MAC + +Protocol field is added in bridge FDB, to distinguish between + MAC addresses learned via the control plane and those learned + via the data plane with hardware aging. + +Protocol 'hw' (i.e RTPROT_HW aka hardware) for MAC learnt by hardware + will be used for data plane(hardware) learnt MAC while + existing protocol 'zebra' to be used for control plane learnt ones. + +Kernel Patch in review: +https://lore.kernel.org/netdev/20250818175258.275997-1-mrghosh@cisco.com/ +iproute2 patch in review: +https://lore.kernel.org/netdev/20250818193756.277327-1-mrghosh@cisco.com/ + +Signed-off-by: Mrinmoy Ghosh +Signed-off-by: Mrinmoy Ghosh +Signed-off-by: Patrice Brissette +Signed-off-by: Tamer Ahmed +(cherry picked from commit de5c8deda5cedae33962eab33905bb9568ae2aa9) + +diff --git a/include/linux/rtnetlink.h b/include/linux/rtnetlink.h +index d03ed4d16..542179414 100644 +--- a/include/linux/rtnetlink.h ++++ b/include/linux/rtnetlink.h +@@ -308,7 +308,7 @@ enum { + #define RTPROT_OSPF 188 /* OSPF Routes */ + #define RTPROT_RIP 189 /* RIP Routes */ + #define RTPROT_EIGRP 192 /* EIGRP Routes */ +- ++#define RTPROT_HW 193 /* Hardware Routes */ + /* rtm_scope + + Really it is not scope, but sort of distance to the destination. +-- +2.43.0 + diff --git a/src/sonic-frr/patch/0030-doc-zebra-Doc-update-for-zebra-option-kernel-mac-ext.patch b/src/sonic-frr/patch/0030-doc-zebra-Doc-update-for-zebra-option-kernel-mac-ext.patch new file mode 100644 index 00000000000..e3d36c9ea5e --- /dev/null +++ b/src/sonic-frr/patch/0030-doc-zebra-Doc-update-for-zebra-option-kernel-mac-ext.patch @@ -0,0 +1,36 @@ +From b439c5cfcb36eff8316d7eb6d3178eba9d1d9a70 Mon Sep 17 00:00:00 2001 +From: Mrinmoy Ghosh +Date: Tue, 19 Aug 2025 23:18:29 +0000 +Subject: doc: zebra: Doc update for zebra option kernel-mac-ext-learn + +Doc update for new zebra option '--kernel-mac-ext-learn' + +Signed-off-by: Mrinmoy Ghosh +Signed-off-by: Mrinmoy Ghosh +Signed-off-by: Tamer Ahmed +(cherry picked from commit 12d3632f8677004ea7f14cece117cb7ed8478a91) + +diff --git a/doc/user/zebra.rst b/doc/user/zebra.rst +index 91b1c9299..1716fc9cd 100644 +--- a/doc/user/zebra.rst ++++ b/doc/user/zebra.rst +@@ -120,6 +120,16 @@ Besides the common invocation options (:ref:`common-invocation-options`), the + 8 bit values are scaled to a range of 1-254 and 16 bit values are + scaled to a range of 1-65534. + ++.. option:: --kernel-mac-ext-learn ++ ++ Signal to zebra that its operating in MAC external learn mode. ++ In this mode, both MAC learning and the aging timer are managed ++ by the underlying hardware. As a result, kernel-based MAC learning ++ and aging are disabled. MAC addresses learned via both the ++ control plane and data plane are programmed in the kernel with the ++ 'extern_learn' attribute. ARP and Neighbor Discovery (ND) suppression ++ are not supported in this mode. ++ + .. _interface-commands: + + Configuration Addresses behaviour +-- +2.43.0 + diff --git a/src/sonic-frr/patch/0031-zebra-EVPN-VXLAN-MH-extern-mode-Update-debug-print-f.patch b/src/sonic-frr/patch/0031-zebra-EVPN-VXLAN-MH-extern-mode-Update-debug-print-f.patch new file mode 100644 index 00000000000..b252cfe7668 --- /dev/null +++ b/src/sonic-frr/patch/0031-zebra-EVPN-VXLAN-MH-extern-mode-Update-debug-print-f.patch @@ -0,0 +1,50 @@ +From 735552bed6594e60faacb6a36af8c9816bb3e123 Mon Sep 17 00:00:00 2001 +From: Mrinmoy Ghosh +Date: Tue, 19 Aug 2025 23:41:53 +0000 +Subject: zebra : EVPN VXLAN MH extern mode: Update debug print for + NDA_PROTOCOL + +This is to update netlink debug print, + to print 'protocol' i.e NDA_PROTOCOL field for netlink messages. + +Signed-off-by: Mrinmoy Ghosh +Signed-off-by: Mrinmoy Ghosh +Signed-off-by: Tamer Ahmed +(cherry picked from commit a4d7bb5623084d098e37f390fcad87f479683f09) + +diff --git a/zebra/debug_nl.c b/zebra/debug_nl.c +index d1d65f1e3..3b476073e 100644 +--- a/zebra/debug_nl.c ++++ b/zebra/debug_nl.c +@@ -571,6 +571,8 @@ const char *neigh_rta2str(int type) + return "MASTER"; + case NDA_LINK_NETNSID: + return "LINK_NETNSID"; ++ case NDA_PROTOCOL: ++ return "PROTOCOL"; + default: + return "UNKNOWN"; + } +@@ -1146,6 +1148,7 @@ static void nlneigh_dump(struct ndmsg *ndm, size_t msglen) + char bytestr[16]; + char dbuf[128]; + unsigned short rta_type; ++ uint8_t protocol = 0; + + #ifndef NDA_RTA + #define NDA_RTA(ndm) \ +@@ -1200,7 +1203,10 @@ next_rta: + vid = *(uint16_t *)RTA_DATA(rta); + zlog_debug(" %d", vid); + break; +- ++ case NDA_PROTOCOL: ++ protocol = *(uint8_t *)RTA_DATA(rta); ++ zlog_debug(" %d", protocol); ++ break; + default: + /* NOTHING: unhandled. */ + break; +-- +2.43.0 + diff --git a/src/sonic-frr/patch/0032-zebra-ARP-ND-Suppression-disabled-for-kernel-mac-ext.patch b/src/sonic-frr/patch/0032-zebra-ARP-ND-Suppression-disabled-for-kernel-mac-ext.patch new file mode 100644 index 00000000000..4e7ac874aae --- /dev/null +++ b/src/sonic-frr/patch/0032-zebra-ARP-ND-Suppression-disabled-for-kernel-mac-ext.patch @@ -0,0 +1,50 @@ +From bcca51bf037ac5ea6ed0ba426fa9041027b977ec Mon Sep 17 00:00:00 2001 +From: Mrinmoy Ghosh +Date: Wed, 20 Aug 2025 00:58:23 +0000 +Subject: zebra: ARP/ND Suppression disabled for kernel-mac-ext-learn mode + +For MAC External mode, presently ARP/ND Suppression is not supported, + thereby disabled. Remote Neighbor programming is also not required, + based on zebra_mac_ext_learn_mode. + +Signed-off-by: Mrinmoy Ghosh +Signed-off-by: Mrinmoy Ghosh +Signed-off-by: Patrice Brissette +Signed-off-by: Tamer Ahmed +(cherry picked from commit 153730e70645360ae525822f7f2940251248a4e5) + +diff --git a/zebra/zebra_evpn_neigh.c b/zebra/zebra_evpn_neigh.c +index 9da391891..7b4bcee80 100644 +--- a/zebra/zebra_evpn_neigh.c ++++ b/zebra/zebra_evpn_neigh.c +@@ -159,7 +159,11 @@ int zebra_evpn_rem_neigh_install(struct zebra_evpn *zevpn, + flags |= DPLANE_NTF_ROUTER; + ZEBRA_NEIGH_SET_ACTIVE(n); + +- dplane_rem_neigh_add(vlan_if, &n->ip, &n->emac, flags, was_static); ++ /* Skip Installation to Kernel, in mac external learn mode ++ * ARP/ND Suppression/Asymmetric IRB is not supported in MAC External learn mode ++ */ ++ if (!zebra_mac_ext_learn_mode()) ++ dplane_rem_neigh_add(vlan_if, &n->ip, &n->emac, flags, was_static); + + return ret; + } +@@ -861,8 +865,12 @@ static int zebra_evpn_neigh_uninstall(struct zebra_evpn *zevpn, + + ZEBRA_NEIGH_SET_INACTIVE(n); + n->loc_seq = 0; +- +- dplane_rem_neigh_delete(vlan_if, &n->ip); ++ /* Installation to Kernel is skipped, in mac external learn mode ++ * Hence no uninstall required ++ * ARP/ND Suppression/Asymmetric IRB is not supported in MAC External learn mode ++ */ ++ if (!zebra_mac_ext_learn_mode()) ++ dplane_rem_neigh_delete(vlan_if, &n->ip); + + return 0; + } +-- +2.43.0 + diff --git a/src/sonic-frr/patch/0033-zebra-netlink-message-handling-for-mac_extern_learn-.patch b/src/sonic-frr/patch/0033-zebra-netlink-message-handling-for-mac_extern_learn-.patch new file mode 100644 index 00000000000..003cda33f3d --- /dev/null +++ b/src/sonic-frr/patch/0033-zebra-netlink-message-handling-for-mac_extern_learn-.patch @@ -0,0 +1,222 @@ +From 435d29d7edefe7680afa4abf1e5a76c4c1491798 Mon Sep 17 00:00:00 2001 +From: Mrinmoy Ghosh +Date: Wed, 20 Aug 2025 01:44:26 +0000 +Subject: zebra: netlink message handling for mac_extern_learn mode + +Receive handling: +- Debounce of AF_BRIDGE netlink message based on 'protocol' field ZEBRA +- Update zlog to include protocol +- Ignore feedback netlink from zebra based on protocol zebra +- Ignore if "NTF_EXT_LEARNED" flag is not marked in the netlink message + for extern only mode of operation +Send Operation: +- Always mark MAC as NTF_EXT_LEARNED in extern only mode +- Mark Sync MAC as NTF_E_MH_PEER_SYNC, only in extern only mode +- Peer-Sync flag (i.e NTF_E_MH_PEER_SYNC) state print in Tx zlog + +Signed-off-by: Mrinmoy Ghosh +Signed-off-by: Mrinmoy Ghosh +Signed-off-by: Patrice Brissette +Signed-off-by: Tamer Ahmed +(cherry picked from commit dc5676a7e1328eb5892fdc65410e4a7ff306bec2) + +diff --git a/zebra/rt_netlink.c b/zebra/rt_netlink.c +index be8cb3687..dbf61361e 100644 +--- a/zebra/rt_netlink.c ++++ b/zebra/rt_netlink.c +@@ -4154,6 +4154,7 @@ static int netlink_macfdb_change(struct nlmsghdr *h, int len, ns_id_t ns_id) + vni_t vni = 0; + uint32_t nhg_id = 0; + enum dplane_op_e op; ++ uint8_t proto = RTPROT_UNSPEC; + + ndm = NLMSG_DATA(h); + +@@ -4182,6 +4183,9 @@ static int netlink_macfdb_change(struct nlmsghdr *h, int len, ns_id_t ns_id) + + memcpy(&mac, RTA_DATA(tb[NDA_LLADDR]), ETH_ALEN); + ++ if (tb[NDA_PROTOCOL]) ++ proto = *(uint8_t *)RTA_DATA(tb[NDA_PROTOCOL]); ++ + if (tb[NDA_VLAN]) { + vid_present = 1; + vid = *(uint16_t *)RTA_DATA(tb[NDA_VLAN]); +@@ -4225,12 +4229,10 @@ static int netlink_macfdb_change(struct nlmsghdr *h, int len, ns_id_t ns_id) + vni = *(vni_t *)RTA_DATA(tb[NDA_SRC_VNI]); + + if (IS_ZEBRA_DEBUG_KERNEL) +- zlog_debug( +- "Rx %s AF_BRIDGE IF %u%s st 0x%x fl 0x%x MAC %pEA%s nhg %d vni %d", +- nl_msg_type_to_str(h->nlmsg_type), ndm->ndm_ifindex, +- vid_present ? vid_buf : "", ndm->ndm_state, +- ndm->ndm_flags, &mac, dst_present ? dst_buf : "", +- nhg_id, vni); ++ zlog_debug("Rx %s AF_BRIDGE IF %u%s st 0x%x fl 0x%x MAC %pEA%s nhg %d vni %d proto %u", ++ nl_msg_type_to_str(h->nlmsg_type), ndm->ndm_ifindex, ++ vid_present ? vid_buf : "", ndm->ndm_state, ndm->ndm_flags, &mac, ++ dst_present ? dst_buf : "", nhg_id, vni, proto); + + sticky = !!(ndm->ndm_flags & NTF_STICKY); + +@@ -4241,6 +4243,19 @@ static int netlink_macfdb_change(struct nlmsghdr *h, int len, ns_id_t ns_id) + return 0; + } + ++ if (proto == RTPROT_ZEBRA) { ++ if (IS_ZEBRA_DEBUG_KERNEL) ++ zlog_debug(" Dropping entry because of protocol zebra"); ++ return 0; ++ } ++ ++ if (zebra_mac_ext_learn_mode() && !(ndm->ndm_flags & NTF_EXT_LEARNED)) { ++ if (IS_ZEBRA_DEBUG_KERNEL) ++ zlog_debug(" Should drop entry due to missing extern learn, FLAGS = 0x%x", ++ ndm->ndm_flags); ++ return 0; ++ } ++ + if (h->nlmsg_type == RTM_NEWNEIGH) + op = DPLANE_OP_NEIGH_INSTALL; + else if (h->nlmsg_type == RTM_DELNEIGH) +@@ -4253,7 +4268,6 @@ static int netlink_macfdb_change(struct nlmsghdr *h, int len, ns_id_t ns_id) + dplane_ctx_set_ns_id(ctx, ns_id); + dplane_ctx_set_ifindex(ctx, ndm->ndm_ifindex); + dplane_ctx_mac_set_addr(ctx, &mac); +- dplane_ctx_mac_set_nhg_id(ctx, nhg_id); + dplane_ctx_mac_set_ndm_state(ctx, ndm->ndm_state); + dplane_ctx_mac_set_ndm_flags(ctx, ndm->ndm_flags); + dplane_ctx_mac_set_dst_present(ctx, dst_present); +@@ -4477,6 +4491,7 @@ ssize_t netlink_macfdb_update_ctx(struct zebra_dplane_ctx *ctx, void *data, + uint32_t update_flags; + bool nfy = false; + uint8_t nfy_flags = 0; ++ uint32_t nda_ext_flags = 0; + int proto = RTPROT_ZEBRA; + + if (dplane_ctx_get_type(ctx) != 0) +@@ -4488,33 +4503,72 @@ ssize_t netlink_macfdb_update_ctx(struct zebra_dplane_ctx *ctx, void *data, + flags = NTF_MASTER; + state = NUD_REACHABLE; + +- update_flags = dplane_ctx_mac_get_update_flags(ctx); +- if (update_flags & DPLANE_MAC_REMOTE) { +- flags |= NTF_SELF; ++ if (zebra_mac_ext_learn_mode()) { ++ /* Update from zebra to kernel are always treated the same way: ++ * we are not relying on kernel to keep track of local vs remote ++ * and we are not using any form of ageing from it ++ */ + if (dplane_ctx_mac_is_sticky(ctx)) { +- /* NUD_NOARP prevents the entry from expiring */ +- state |= NUD_NOARP; + /* sticky the entry from moving */ + flags |= NTF_STICKY; +- } else { +- flags |= NTF_EXT_LEARNED; ++ /* NUD_NOARP: it will not time out, update or change in any way. ++ * Translate in bridge static entry in kernel. Apply to ARP/ND. ++ * It prevents ARP move. ++ */ ++ state |= NUD_NOARP; + } +- /* if it was static-local previously we need to clear the +- * notify flags on replace with remote ++ /* NTF_EXT_LEARNED: to indicate that they are external mac ++ * entries. The bridge will skip ageing FDB entries marked with ++ * NTF_EXT_LEARNED and it is the responsibility of the port ++ * driver/device to age out these entries. ++ * On Interface down, entries are flushed + */ +- if (update_flags & DPLANE_MAC_WAS_STATIC) +- nfy = true; ++ flags |= NTF_EXT_LEARNED; ++ /* ++ * NTF_SELF is required by the kernel in order to program the VxLAN ++ * driver with all of the destination information. ++ * ++ * The linux kernel stores FDB information in two places for VxLAN: ++ * 1) Bridge FDB: MAC + VLAN -> VxLAN IF/VNI ++ * 2) VxLAN FDB: MAC + VNI -> VxLAN IF + Destination (VTEP or NHG) ++ * ++ * It is also needed to trigger remote to sync mobility of a MAC to properly ++ * update the kernel bridge and vxlan fdb tables. ++ */ ++ update_flags = dplane_ctx_mac_get_update_flags(ctx); ++ if (update_flags & DPLANE_MAC_REMOTE) ++ flags |= NTF_SELF; ++ if (update_flags & DPLANE_MAC_SET_STATIC) ++ nda_ext_flags |= NTF_E_MH_PEER_SYNC; + } else { +- /* local mac */ +- if (update_flags & DPLANE_MAC_SET_STATIC) { +- nfy_flags |= FDB_NOTIFY_BIT; +- state |= NUD_NOARP; +- } ++ update_flags = dplane_ctx_mac_get_update_flags(ctx); ++ if (update_flags & DPLANE_MAC_REMOTE) { ++ flags |= NTF_SELF; ++ if (dplane_ctx_mac_is_sticky(ctx)) { ++ /* NUD_NOARP prevents the entry from expiring */ ++ state |= NUD_NOARP; ++ /* sticky the entry from moving */ ++ flags |= NTF_STICKY; ++ } else { ++ flags |= NTF_EXT_LEARNED; ++ } ++ /* if it was static-local previously we need to clear the ++ * notify flags on replace with remote ++ */ ++ if (update_flags & DPLANE_MAC_WAS_STATIC) ++ nfy = true; ++ } else { ++ /* local mac */ ++ if (update_flags & DPLANE_MAC_SET_STATIC) { ++ nfy_flags |= FDB_NOTIFY_BIT; ++ state |= NUD_NOARP; ++ } + +- if (update_flags & DPLANE_MAC_SET_INACTIVE) +- nfy_flags |= FDB_NOTIFY_INACTIVE_BIT; ++ if (update_flags & DPLANE_MAC_SET_INACTIVE) ++ nfy_flags |= FDB_NOTIFY_INACTIVE_BIT; + +- nfy = true; ++ nfy = true; ++ } + } + + nhg_id = dplane_ctx_mac_get_nhg_id(ctx); +@@ -4531,19 +4585,16 @@ ssize_t netlink_macfdb_update_ctx(struct zebra_dplane_ctx *ctx, void *data, + else + vid_buf[0] = '\0'; + +- zlog_debug( +- "Tx %s family %s IF %s(%u)%s %sMAC %pEA dst %pIA nhg %u%s%s%s%s%s", +- nl_msg_type_to_str(cmd), nl_family_to_str(AF_BRIDGE), +- dplane_ctx_get_ifname(ctx), dplane_ctx_get_ifindex(ctx), +- vid_buf, dplane_ctx_mac_is_sticky(ctx) ? "sticky " : "", +- mac, &vtep_ip, nhg_id, +- (update_flags & DPLANE_MAC_REMOTE) ? " rem" : "", +- (update_flags & DPLANE_MAC_WAS_STATIC) ? " clr_sync" +- : "", +- (update_flags & DPLANE_MAC_SET_STATIC) ? " static" : "", +- (update_flags & DPLANE_MAC_SET_INACTIVE) ? " inactive" +- : "", +- nfy ? " nfy" : ""); ++ zlog_debug("Tx %s family %s IF %s(%u)%s %sMAC %pEA dst %pIA nhg %u%s%s%s%s%s%s", ++ nl_msg_type_to_str(cmd), nl_family_to_str(AF_BRIDGE), ++ dplane_ctx_get_ifname(ctx), dplane_ctx_get_ifindex(ctx), vid_buf, ++ dplane_ctx_mac_is_sticky(ctx) ? "sticky " : "", mac, &vtep_ip, nhg_id, ++ (update_flags & DPLANE_MAC_REMOTE) ? " rem" : "", ++ (update_flags & DPLANE_MAC_WAS_STATIC) ? " clr_sync" : "", ++ (update_flags & DPLANE_MAC_SET_STATIC) ? " static" : "", ++ (update_flags & DPLANE_MAC_SET_INACTIVE) ? " inactive" : "", ++ (nda_ext_flags & NTF_E_MH_PEER_SYNC) ? " peer-sync" : "", ++ nfy ? " nfy" : ""); + } + + total = netlink_neigh_update_msg_encode( +-- +2.43.0 + diff --git a/src/sonic-frr/patch/0034-zebra-mac-sync-update-del-expiry-in-extern_learn-mod.patch b/src/sonic-frr/patch/0034-zebra-mac-sync-update-del-expiry-in-extern_learn-mod.patch new file mode 100644 index 00000000000..cf655950b9a --- /dev/null +++ b/src/sonic-frr/patch/0034-zebra-mac-sync-update-del-expiry-in-extern_learn-mod.patch @@ -0,0 +1,227 @@ +From f50f1e17c8719c4696790cdf2fce298a9771ea7d Mon Sep 17 00:00:00 2001 +From: Mrinmoy Ghosh +Date: Wed, 20 Aug 2025 05:21:06 +0000 +Subject: zebra: mac sync update/del/expiry in extern_learn mode + +Dataplane Sync MAC Update: +- Install sync local MAC only if its inactive +On hold timer expiry: +- Flush the MAC, and no reprogram, as no dynamic learn during static +Sync Del: +- Explicit MAC flush if MAC is inactive, if it has no PEER flags +Sync MAC update: +- In Peer Proxy, no additional BGP update computation +Netlink MAC Update processing: +- Ignore VXLAN Info message in extern mode +- Ignore MAC netlink update if interface is down. + Presently done only for extern mode + +Signed-off-by: Mrinmoy Ghosh +Signed-off-by: Mrinmoy Ghosh +Signed-off-by: Patrice Brissette +Signed-off-by: Tamer Ahmed +(cherry picked from commit e0fe630aefc0e93172a77db4167361b44c321941) + +diff --git a/zebra/zebra_evpn_mac.c b/zebra/zebra_evpn_mac.c +index baff68f9d..f7a046f5e 100644 +--- a/zebra/zebra_evpn_mac.c ++++ b/zebra/zebra_evpn_mac.c +@@ -1452,20 +1452,21 @@ int zebra_evpn_sync_mac_dp_install(struct zebra_mac *mac, bool set_inactive, + return 0; + } + +- if (IS_ZEBRA_DEBUG_EVPN_MH_MAC) { +- char mac_buf[MAC_BUF_SIZE]; ++ if (!zebra_mac_ext_learn_mode() || CHECK_FLAG(mac->flags, ZEBRA_MAC_LOCAL_INACTIVE)) { ++ /* For Extern Only mode: ++ * Update the dataplane only when the MAC is inactive ++ */ ++ if (IS_ZEBRA_DEBUG_EVPN_MH_MAC) { ++ char mac_buf[MAC_BUF_SIZE]; + +- zlog_debug("dp-install sync-mac vni %u mac %pEA es %s %s%s%s", +- zevpn->vni, &mac->macaddr, +- mac->es ? mac->es->esi_str : "-", +- zebra_evpn_zebra_mac_flag_dump(mac, mac_buf, +- sizeof(mac_buf)), +- set_static ? "static " : "", +- set_inactive ? "inactive " : ""); ++ zlog_debug("dp-install sync-mac vni %u mac %pEA es %s %s%s%s", zevpn->vni, ++ &mac->macaddr, mac->es ? mac->es->esi_str : "-", ++ zebra_evpn_zebra_mac_flag_dump(mac, mac_buf, sizeof(mac_buf)), ++ set_static ? "static " : "", set_inactive ? "inactive " : ""); ++ } ++ dplane_local_mac_add(ifp, br_ifp, vid, &mac->macaddr, sticky, set_static, ++ set_inactive); + } +- +- dplane_local_mac_add(ifp, br_ifp, vid, &mac->macaddr, sticky, +- set_static, set_inactive); + return 0; + } + +@@ -1519,16 +1520,23 @@ static void zebra_evpn_mac_hold_exp_cb(struct event *t) + sizeof(mac_buf))); + } + +- /* re-program the local mac in the dataplane if the mac is no +- * longer static +- */ +- if (old_static != new_static) +- zebra_evpn_sync_mac_dp_install(mac, false, false, __func__); ++ if (zebra_mac_ext_learn_mode()) { ++ vlanid_t vid; ++ struct interface *ifp; ++ /* Upon expiry, MAC is delete from DP. */ ++ zebra_evpn_mac_get_access_info(mac, &ifp, &vid); ++ zebra_evpn_flush_local_mac(mac, ifp); ++ } else { ++ /* re-program the local mac in the dataplane if the mac is no ++ * longer static ++ */ ++ if (old_static != new_static) ++ zebra_evpn_sync_mac_dp_install(mac, false, false, __func__); + +- /* inform bgp if needed */ +- if (old_bgp_ready != new_bgp_ready) +- zebra_evpn_mac_send_add_del_to_client(mac, old_bgp_ready, +- new_bgp_ready); ++ /* inform bgp if needed */ ++ if (old_bgp_ready != new_bgp_ready) ++ zebra_evpn_mac_send_add_del_to_client(mac, old_bgp_ready, new_bgp_ready); ++ } + } + + static inline void zebra_evpn_mac_start_hold_timer(struct zebra_mac *mac) +@@ -1588,7 +1596,15 @@ void zebra_evpn_sync_mac_del(struct zebra_mac *mac) + zebra_evpn_mac_start_hold_timer(mac); + new_static = zebra_evpn_mac_is_static(mac); + +- if (old_static != new_static) ++ if (zebra_mac_ext_learn_mode() && !new_static && ++ CHECK_FLAG(mac->flags, ZEBRA_MAC_LOCAL_INACTIVE)) { ++ /* Clear the MAC from Peer Proxy, as no age out will happen for extern mode */ ++ struct interface *ifp; ++ vlanid_t vid; ++ ++ zebra_evpn_mac_get_access_info(mac, &ifp, &vid); ++ zebra_evpn_flush_local_mac(mac, ifp); ++ } else if (old_static != new_static) + /* program the local mac in the kernel */ + zebra_evpn_sync_mac_dp_install(mac, false, false, __func__); + } +@@ -1800,8 +1816,16 @@ struct zebra_mac *zebra_evpn_proc_sync_mac_update(struct zebra_evpn *zevpn, + if (old_static != new_static) + inform_dataplane = true; + +- old_bgp_ready = zebra_evpn_mac_is_ready_for_bgp(old_flags); +- new_bgp_ready = zebra_evpn_mac_is_ready_for_bgp(mac->flags); ++ /* when going from peer-active to peer-proxy, nothing should be happening ++ * Route is maintain in BGP ++ */ ++ if (zebra_mac_ext_learn_mode() && CHECK_FLAG(new_flags, ZEBRA_MAC_ES_PEER_PROXY)) { ++ old_bgp_ready = false; ++ new_bgp_ready = false; ++ } else { ++ old_bgp_ready = zebra_evpn_mac_is_ready_for_bgp(old_flags); ++ new_bgp_ready = zebra_evpn_mac_is_ready_for_bgp(mac->flags); ++ } + if (old_bgp_ready != new_bgp_ready) + inform_bgp = true; + } +@@ -2386,7 +2410,9 @@ int zebra_evpn_del_local_mac(struct zebra_evpn *zevpn, struct zebra_mac *mac, + new_bgp_ready); + } + +- /* re-install the inactive entry in the kernel */ ++ /* In EXT-LEARN mode as well, the MAC will be reprogrammed as static, ++ * post age out, until proxy is withdrawn ++ */ + zebra_evpn_sync_mac_dp_install(mac, true, false, __func__); + + return 0; +diff --git a/zebra/zebra_evpn_mh.c b/zebra/zebra_evpn_mh.c +index 8ff787115..ade4ba8c5 100644 +--- a/zebra/zebra_evpn_mh.c ++++ b/zebra/zebra_evpn_mh.c +@@ -59,6 +59,8 @@ static void zebra_evpn_mh_update_protodown_es(struct zebra_evpn_es *es, + bool resync_dplane); + static void zebra_evpn_mh_clear_protodown_es(struct zebra_evpn_es *es); + static void zebra_evpn_mh_startup_delay_timer_start(const char *rc); ++static void zebra_evpn_es_bypass_update_macs(struct zebra_evpn_es *es, struct interface *ifp, ++ bool bypass); + + esi_t zero_esi_buf, *zero_esi = &zero_esi_buf; + +@@ -2106,8 +2108,7 @@ static void zebra_evpn_es_setup_evis(struct zebra_evpn_es *es) + } + } + +-static void zebra_evpn_flush_local_mac(struct zebra_mac *mac, +- struct interface *ifp) ++void zebra_evpn_flush_local_mac(struct zebra_mac *mac, struct interface *ifp) + { + vlanid_t vid; + struct zebra_if *zif; +@@ -2324,7 +2325,14 @@ static void zebra_evpn_es_local_info_set(struct zebra_evpn_es *es, + /* if there any local macs referring to the ES as dest we + * need to clear the contents and start over + */ +- zebra_evpn_es_flush_local_macs(es, zif->ifp, true); ++ if (zebra_mac_ext_learn_mode()) { ++ /* Note: though bypass route is called, but its effectively clearing all ++ * macs ++ */ ++ zebra_evpn_es_bypass_update_macs(es, zif->ifp, false); ++ } else { ++ zebra_evpn_es_flush_local_macs(es, zif->ifp, true); ++ } + + /* inherit EVPN protodown flags on the access port */ + zebra_evpn_mh_update_protodown_es(es, true /*resync_dplane*/); +diff --git a/zebra/zebra_evpn_mh.h b/zebra/zebra_evpn_mh.h +index f68e2eae6..cd9d79b93 100644 +--- a/zebra/zebra_evpn_mh.h ++++ b/zebra/zebra_evpn_mh.h +@@ -391,5 +391,6 @@ void zebra_evpn_es_bypass_cfg_update(struct zebra_if *zif, bool bypass); + void zebra_evpn_mh_uplink_cfg_update(struct zebra_if *zif, bool set); + + void zebra_evpn_mh_if_init(struct zebra_if *zif); ++void zebra_evpn_flush_local_mac(struct zebra_mac *mac, struct interface *ifp); + + #endif /* _ZEBRA_EVPN_MH_H */ +diff --git a/zebra/zebra_neigh.c b/zebra/zebra_neigh.c +index 39e83b7b7..d56a4ad5d 100644 +--- a/zebra/zebra_neigh.c ++++ b/zebra/zebra_neigh.c +@@ -591,6 +591,12 @@ static void zebra_neigh_macfdb_update(struct zebra_dplane_ctx *ctx) + } + + if (IS_ZEBRA_IF_VXLAN(ifp)) { ++ /* In mac-extern-learn mode the Linux kernel should never give us an entry ++ * with VxLAN info ++ */ ++ if (zebra_mac_ext_learn_mode()) ++ return; ++ + if (!dst_present) + return; + +@@ -603,6 +609,14 @@ static void zebra_neigh_macfdb_update(struct zebra_dplane_ctx *ctx) + !!(ndm_flags & ZEBRA_NTF_EXT_LEARNED)); + return; + } ++ if (zebra_mac_ext_learn_mode()) { ++ if (!if_is_operative(ifp)) { ++ if (IS_ZEBRA_DEBUG_KERNEL) ++ zlog_debug("Interface %s(%u) not operative:Ignore Mac update", ++ ifp->name, ifp->ifindex); ++ return; ++ } ++ } + + zebra_vxlan_local_mac_add_update(ifp, br_if, &mac, vid, sticky, local_inactive, + dp_static); +-- +2.43.0 + diff --git a/src/sonic-frr/patch/0035-tests-topotests-EVPN-VXLAN-MH-extern-learn-mode-test.patch b/src/sonic-frr/patch/0035-tests-topotests-EVPN-VXLAN-MH-extern-learn-mode-test.patch new file mode 100644 index 00000000000..3c2632ae195 --- /dev/null +++ b/src/sonic-frr/patch/0035-tests-topotests-EVPN-VXLAN-MH-extern-learn-mode-test.patch @@ -0,0 +1,1832 @@ +From be497c0d3175f849dae580296cd916e1cac6da17 Mon Sep 17 00:00:00 2001 +From: Mrinmoy Ghosh +Date: Wed, 20 Aug 2025 06:11:35 +0000 +Subject: tests: topotests: EVPN VXLAN MH extern learn mode tests + +Topotests added under bgp_evpn_mh_l2l3vni_ext_learn to: +- Validate correct ES discovery and advertisement for both local and + remote PEs. +- Check VTEP peer lists for accuracy, including handling of downed VTEPs + and ES state transitions. +- Ensure L2VNI and L3VNI are correctly instantiated and associated with the + appropriate VRFs and VXLAN interfaces. +- Test orphaned hosts, dual-attached hosts, and single-attached hosts + in various failure and recovery scenarios. +- MAC 'protocol' state transitions i.e data plane learnt to + control plane learnt and vice versa, delete, relearn in both peers + sequeunces +Utility and Parser Functions: +Utility functions in lib/bgp_evpn.py(new) are added. +These changes adds the test coverage and reliability for EVPN VXLAN + multihoming in external mode, making it easier to detect regressions and + validate new features. + +Signed-off-by: Mrinmoy Ghosh +Signed-off-by: Mrinmoy Ghosh +Signed-off-by: Patrice Brissette +Signed-off-by: Tamer Ahmed +(cherry picked from commit 391ca7e09fa99c106e99b5bb2519feb110c8e019) + +diff --git a/tests/topotests/bgp_evpn_mh/test_evpn_mh.py b/tests/topotests/bgp_evpn_mh/test_evpn_mh.py +index 1ab55ef36..9a5e86c69 100644 +--- a/tests/topotests/bgp_evpn_mh/test_evpn_mh.py ++++ b/tests/topotests/bgp_evpn_mh/test_evpn_mh.py +@@ -37,6 +37,9 @@ from lib import topotest + # Required to instantiate the topology builder class. + from lib.topogen import Topogen, TopoRouter, get_topogen + ++# bgp_evpn library ++from lib import bgp_evpn ++ + ##################################################### + ## + ## Network Topology Definition +@@ -210,36 +213,6 @@ host_es_map = { + } + + +-def config_bond(node, bond_name, bond_members, bond_ad_sys_mac, br): +- """ +- Used to setup bonds on the TORs and hosts for MH +- """ +- node.run("ip link add dev %s type bond mode 802.3ad" % bond_name) +- node.run("ip link set dev %s type bond lacp_rate 1" % bond_name) +- node.run("ip link set dev %s type bond miimon 100" % bond_name) +- node.run("ip link set dev %s type bond xmit_hash_policy layer3+4" % bond_name) +- node.run("ip link set dev %s type bond min_links 1" % bond_name) +- node.run( +- "ip link set dev %s type bond ad_actor_system %s" % (bond_name, bond_ad_sys_mac) +- ) +- +- for bond_member in bond_members: +- node.run("ip link set dev %s down" % bond_member) +- node.run("ip link set dev %s master %s" % (bond_member, bond_name)) +- node.run("ip link set dev %s up" % bond_member) +- +- node.run("ip link set dev %s up" % bond_name) +- +- # if bridge is specified add the bond as a bridge member +- if br: +- node.run(" ip link set dev %s master bridge" % bond_name) +- node.run("/sbin/bridge link set dev %s priority 8" % bond_name) +- node.run("/sbin/bridge vlan del vid 1 dev %s" % bond_name) +- node.run("/sbin/bridge vlan del vid 1 untagged pvid dev %s" % bond_name) +- node.run("/sbin/bridge vlan add vid 1000 dev %s" % bond_name) +- node.run("/sbin/bridge vlan add vid 1000 untagged pvid dev %s" % bond_name) +- +- + def config_mcast_tunnel_termination_device(node): + """ + The kernel requires a device to terminate VxLAN multicast tunnels +@@ -326,10 +299,10 @@ def config_tor(tor_name, tor, tor_ip, svi_pip): + else: + sys_mac = "44:38:39:ff:ff:02" + bond_member = tor_name + "-eth2" +- config_bond(tor, "hostbond1", [bond_member], sys_mac, "bridge") ++ bgp_evpn.config_bond(tor, "hostbond1", [bond_member], sys_mac, "bridge") + + bond_member = tor_name + "-eth3" +- config_bond(tor, "hostbond2", [bond_member], sys_mac, "bridge") ++ bgp_evpn.config_bond(tor, "hostbond2", [bond_member], sys_mac, "bridge") + + # create SVI + config_svi(tor, svi_pip) +@@ -349,25 +322,11 @@ def compute_host_ip_mac(host_name): + return host_ip, host_mac + + +-def config_host(host_name, host): +- """ +- Create the dual-attached bond on host nodes for MH +- """ +- bond_members = [] +- bond_members.append(host_name + "-eth0") +- bond_members.append(host_name + "-eth1") +- bond_name = "torbond" +- config_bond(host, bond_name, bond_members, "00:00:00:00:00:00", None) +- +- host_ip, host_mac = compute_host_ip_mac(host_name) +- host.run("ip addr add %s dev %s" % (host_ip, bond_name)) +- host.run("ip link set dev %s address %s" % (bond_name, host_mac)) +- +- + def config_hosts(tgen, hosts): + for host_name in hosts: + host = tgen.gears[host_name] +- config_host(host_name, host) ++ host_ip, host_mac = compute_host_ip_mac(host_name) ++ bgp_evpn.config_host(host_name, host, host_ip, host_mac) + + + def setup_module(module): +diff --git a/tests/topotests/bgp_evpn_mh_l2l3vni_ext_learn/spine1/frr.conf b/tests/topotests/bgp_evpn_mh_l2l3vni_ext_learn/spine1/frr.conf +new file mode 100644 +index 000000000..e23aff332 +--- /dev/null ++++ b/tests/topotests/bgp_evpn_mh_l2l3vni_ext_learn/spine1/frr.conf +@@ -0,0 +1,34 @@ ++int spine1-eth0 ++ ip addr 192.168.1.1/24 ++! ++int spine1-eth1 ++ ip addr 192.168.2.1/24 ++! ++int spine1-eth2 ++ ip addr 192.168.3.1/24 ++! ++int spine1-eth3 ++ ip addr 192.168.4.1/24 ++! ++int lo ++ ip addr 192.168.100.13/32 ++ ip addr 192.168.100.100/32 ++! ++frr defaults datacenter ++! ++router bgp 65001 ++ bgp router-id 192.168.100.13 ++ no bgp ebgp-requires-policy ++ ++ neighbor TRANSIT_OVERLAY peer-group ++ neighbor TRANSIT_OVERLAY remote-as external ++ ++ neighbor 192.168.1.2 peer-group TRANSIT_OVERLAY ++ neighbor 192.168.2.2 peer-group TRANSIT_OVERLAY ++ neighbor 192.168.3.2 peer-group TRANSIT_OVERLAY ++ neighbor 192.168.4.2 peer-group TRANSIT_OVERLAY ++ redistribute connected ++ address-family l2vpn evpn ++ neighbor TRANSIT_OVERLAY activate ++ exit-address-family ++! +\ No newline at end of file +diff --git a/tests/topotests/bgp_evpn_mh_l2l3vni_ext_learn/spine2/frr.conf b/tests/topotests/bgp_evpn_mh_l2l3vni_ext_learn/spine2/frr.conf +new file mode 100644 +index 000000000..b3916ef2c +--- /dev/null ++++ b/tests/topotests/bgp_evpn_mh_l2l3vni_ext_learn/spine2/frr.conf +@@ -0,0 +1,34 @@ ++int spine2-eth0 ++ ip addr 192.168.5.1/24 ++! ++int spine2-eth1 ++ ip addr 192.168.6.1/24 ++! ++int spine2-eth2 ++ ip addr 192.168.7.1/24 ++! ++int spine2-eth3 ++ ip addr 192.168.8.1/24 ++! ++int lo ++ ip addr 192.168.100.14/32 ++ ip addr 192.168.100.100/32 ++! ++frr defaults datacenter ++! ++router bgp 65002 ++ bgp router-id 192.168.100.14 ++ no bgp ebgp-requires-policy ++ ++ neighbor TRANSIT_OVERLAY peer-group ++ neighbor TRANSIT_OVERLAY remote-as external ++ ++ neighbor 192.168.5.2 peer-group TRANSIT_OVERLAY ++ neighbor 192.168.6.2 peer-group TRANSIT_OVERLAY ++ neighbor 192.168.7.2 peer-group TRANSIT_OVERLAY ++ neighbor 192.168.8.2 peer-group TRANSIT_OVERLAY ++ redistribute connected ++ address-family l2vpn evpn ++ neighbor TRANSIT_OVERLAY activate ++ exit-address-family ++! +diff --git a/tests/topotests/bgp_evpn_mh_l2l3vni_ext_learn/test_evpn_mh_l2l3vni_ext_learn.py b/tests/topotests/bgp_evpn_mh_l2l3vni_ext_learn/test_evpn_mh_l2l3vni_ext_learn.py +new file mode 100644 +index 000000000..c0249841f +--- /dev/null ++++ b/tests/topotests/bgp_evpn_mh_l2l3vni_ext_learn/test_evpn_mh_l2l3vni_ext_learn.py +@@ -0,0 +1,933 @@ ++#!/usr/bin/env python ++# SPDX-License-Identifier: ISC ++ ++# ++# test_evpn_mh_l2l3vni_ext_learn.py ++# ++# Copyright (c) 2025 by ++# Cisco Systems, Inc. ++# Patrice Brissette ++# ++# Permission to use, copy, modify, and/or distribute this software ++# for any purpose with or without fee is hereby granted, provided ++# that the above copyright notice and this permission notice appear ++# in all copies. ++# ++# THE SOFTWARE IS PROVIDED "AS IS" AND NETDEF DISCLAIMS ALL WARRANTIES ++# WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF ++# MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL NETDEF BE LIABLE FOR ++# ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY ++# DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, ++# WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ++# ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE ++# OF THIS SOFTWARE. ++# ++ ++""" ++test_evpn_mh_l2l3vni_ext_learn.py: Testing EVPN multihoming with L3VNI ++ ++""" ++ ++import os ++import sys ++import subprocess ++from functools import partial ++import time ++ ++import pytest ++import json ++import platform ++from functools import partial ++ ++pytestmark = [pytest.mark.bgpd, pytest.mark.pimd] ++ ++# Save the Current Working Directory to find configuration files. ++CWD = os.path.dirname(os.path.realpath(__file__)) ++sys.path.append(os.path.join(CWD, "../")) ++ ++# pylint: disable=C0413 ++# Import topogen and topotest helpers ++from lib import topotest ++ ++# Required to instantiate the topology builder class. ++from lib.topogen import Topogen, TopoRouter, get_topogen ++ ++# bgp_evpn library ++from lib import bgp_evpn ++ ++##################################################### ++## ++## Network Topology Definition ++## ++## See topology picture at evpn-mh-topo-tests.pdf ++##################################################### ++ ++ ++def build_topo(tgen): ++ """ ++ EVPN Multihoming Topology - ++ 1. Two level CLOS ++ 2. Two spine switches - spine1, spine2 ++ 3. Two racks with Top-of-Rack switches per rack - tormx1, tormx2 ++ 4. Dual attached hosts per-rack - hostd12, hostd21, hostd22 ++ 5. Single attached host - hostd11 to torm11 ++ 6. hostd22 is in a different subnet then hostd1x and hostd21 ++ 7. L2VNI with L3VNI setup on each leaf with SVI as IP gateway ++ 8. hostd33 is a orphan on torm11 ++ """ ++ ++ tgen.add_router("spine1") ++ tgen.add_router("spine2") ++ tgen.add_router("torm11") ++ tgen.add_router("torm12") ++ tgen.add_router("torm21") ++ tgen.add_router("torm22") ++ tgen.add_router("hostd11") ++ tgen.add_router("hostd12") ++ tgen.add_router("hostd21") ++ tgen.add_router("hostd22") ++ tgen.add_router("hostd33") ++ ++ # On main router ++ # First switch is for a dummy interface (for local network) ++ ++ ##################### spine1 ######################## ++ # spine1-eth0 is connected to torm11-eth0 ++ switch = tgen.add_switch("sw1") ++ switch.add_link(tgen.gears["spine1"]) ++ switch.add_link(tgen.gears["torm11"]) ++ ++ # spine1-eth1 is connected to torm12-eth0 ++ switch = tgen.add_switch("sw2") ++ switch.add_link(tgen.gears["spine1"]) ++ switch.add_link(tgen.gears["torm12"]) ++ ++ # spine1-eth2 is connected to torm21-eth0 ++ switch = tgen.add_switch("sw3") ++ switch.add_link(tgen.gears["spine1"]) ++ switch.add_link(tgen.gears["torm21"]) ++ ++ # spine1-eth3 is connected to torm22-eth0 ++ switch = tgen.add_switch("sw4") ++ switch.add_link(tgen.gears["spine1"]) ++ switch.add_link(tgen.gears["torm22"]) ++ ++ ##################### spine2 ######################## ++ # spine2-eth0 is connected to torm11-eth1 ++ switch = tgen.add_switch("sw5") ++ switch.add_link(tgen.gears["spine2"]) ++ switch.add_link(tgen.gears["torm11"]) ++ ++ # spine2-eth1 is connected to torm12-eth1 ++ switch = tgen.add_switch("sw6") ++ switch.add_link(tgen.gears["spine2"]) ++ switch.add_link(tgen.gears["torm12"]) ++ ++ # spine2-eth2 is connected to torm21-eth1 ++ switch = tgen.add_switch("sw7") ++ switch.add_link(tgen.gears["spine2"]) ++ switch.add_link(tgen.gears["torm21"]) ++ ++ # spine2-eth3 is connected to torm22-eth1 ++ switch = tgen.add_switch("sw8") ++ switch.add_link(tgen.gears["spine2"]) ++ switch.add_link(tgen.gears["torm22"]) ++ ++ ##################### torm11 ######################## ++ # torm11-eth2 is connected to hostd11-eth0 ++ switch = tgen.add_switch("sw9") ++ switch.add_link(tgen.gears["torm11"]) ++ switch.add_link(tgen.gears["hostd11"]) ++ ++ # torm11-eth3 is connected to hostd12-eth0 ++ switch = tgen.add_switch("sw10") ++ switch.add_link(tgen.gears["torm11"]) ++ switch.add_link(tgen.gears["hostd12"]) ++ ++ # torm11-eth4 is connected to hostd33-eth0 ++ # Its an orphan on torm11 ++ switch = tgen.add_switch("sw11") ++ switch.add_link(tgen.gears["torm11"]) ++ switch.add_link(tgen.gears["hostd33"]) ++ ++ ##################### torm12 ######################## ++ # keeping the hostd11 single-homed ++ # torm12-eth2 is connected to hostd11-eth1 ++ # switch = tgen.add_switch("sw11") ++ # switch.add_link(tgen.gears["torm12"]) ++ # switch.add_link(tgen.gears["hostd11"]) ++ ++ # torm12-eth3 is connected to hostd12-eth1 ++ switch = tgen.add_switch("sw12") ++ switch.add_link(tgen.gears["torm12"]) ++ switch.add_link(tgen.gears["hostd12"]) ++ ++ ##################### torm21 ######################## ++ # torm21-eth2 is connected to hostd21-eth0 ++ switch = tgen.add_switch("sw13") ++ switch.add_link(tgen.gears["torm21"]) ++ switch.add_link(tgen.gears["hostd21"]) ++ ++ # torm21-eth3 is connected to hostd22-eth0 ++ switch = tgen.add_switch("sw14") ++ switch.add_link(tgen.gears["torm21"]) ++ switch.add_link(tgen.gears["hostd22"]) ++ ++ ##################### torm22 ######################## ++ # torm22-eth2 is connected to hostd21-eth1 ++ switch = tgen.add_switch("sw15") ++ switch.add_link(tgen.gears["torm22"]) ++ switch.add_link(tgen.gears["hostd21"]) ++ ++ # torm22-eth3 is connected to hostd22-eth1 ++ switch = tgen.add_switch("sw16") ++ switch.add_link(tgen.gears["torm22"]) ++ switch.add_link(tgen.gears["hostd22"]) ++ ++ ++##################################################### ++## ++## Tests starting ++## ++##################################################### ++ ++tor_ips = { ++ "torm11": "192.168.100.15", ++ "torm12": "192.168.100.16", ++ "torm21": "192.168.100.17", ++ "torm22": "192.168.100.18", ++} ++tor_mac_macs = { ++ "torm11": "aa:bb:cc:00:00:11", ++ "torm12": "aa:bb:cc:00:00:12", ++ "torm21": "aa:bb:cc:00:00:21", ++ "torm22": "aa:bb:cc:00:00:22", ++} ++ ++svi_ips = { ++ "torm11": "45.0.0.2", ++ "torm12": "45.0.0.3", ++ "torm21": "45.0.0.4", ++ "torm22": "45.0.0.5", ++} ++svi2_ips = { ++ "torm11": "20.0.0.2", ++ "torm12": "20.0.0.3", ++ "torm21": "20.0.0.4", ++ "torm22": "20.0.0.5", ++} ++ ++tor_ips_rack_1 = {"torm11": "192.168.100.15", "torm12": "192.168.100.16"} ++ ++tor_ips_rack_2 = {"torm21": "192.168.100.17", "torm22": "192.168.100.18"} ++ ++host_es_map = { ++ "hostd12": "03:44:38:39:ff:ff:01:00:00:02", ++ "hostd21": "03:44:38:39:ff:ff:02:00:00:01", ++ "hostd22": "03:44:38:39:ff:ff:02:00:00:02", ++} ++ ++host_vni_map = { ++ "hostd12": 1000, ++ "hostd21": 1000, ++ "hostd22": 2000, ++} ++ ++ ++def config_tor(tor_name, tor, tor_ip, svi_pip, svi2_pip): ++ """ ++ Create the bond/vxlan-bridge on the TOR which acts as VTEP and EPN-PE ++ """ ++ ++ # create l3vni along with l3vni bridge ++ bgp_evpn.config_l3vni(tor_name, tor, tor_ip, tor_mac_macs) ++ ++ # create l2vni, bridge and associated SVI ++ bgp_evpn.config_l2vni(tor_name, tor, svi_pip, tor_ip) ++ if "torm2" in tor_name: ++ bgp_evpn.config_l2vni(tor_name, tor, svi2_pip, tor_ip, vni=2000, vid=2000) ++ ++ # create hostbonds and add them to the bridge ++ if "torm1" in tor_name: ++ sys_mac = "44:38:39:ff:ff:01" ++ else: ++ sys_mac = "44:38:39:ff:ff:02" ++ ++ # torm11 has 3 connections on the same subnet: hostbond1, hostbond2 & hostbond3 ++ if "torm11" in tor_name: ++ bond_member = tor_name + "-eth2" ++ bgp_evpn.config_bond(tor, "hostbond1", [bond_member], sys_mac, "br1000") ++ bond_member = tor_name + "-eth3" ++ bgp_evpn.config_bond(tor, "hostbond2", [bond_member], sys_mac, "br1000") ++ bond_member = tor_name + "-eth4" ++ bgp_evpn.config_bond(tor, "hostbond3", [bond_member], sys_mac, "br1000") ++ # torm12 has only 1 connection with hostbond2 ++ elif "torm12" in tor_name: ++ bond_member = tor_name + "-eth2" ++ bgp_evpn.config_bond(tor, "hostbond2", [bond_member], sys_mac, "br1000") ++ # torm2x has 2 connections but on different subnets ++ else: ++ bond_member = tor_name + "-eth2" ++ bgp_evpn.config_bond(tor, "hostbond1", [bond_member], sys_mac, "br1000") ++ bond_member = tor_name + "-eth3" ++ bgp_evpn.config_bond(tor, "hostbond2", [bond_member], sys_mac, "br2000") ++ ++ ++def config_tors(tgen, tors): ++ for tor_name in tors: ++ tor = tgen.gears[tor_name] ++ config_tor( ++ tor_name, ++ tor, ++ tor_ips.get(tor_name), ++ svi_ips.get(tor_name), ++ svi2_ips.get(tor_name), ++ ) ++ ++ ++def compute_host_ip_mac(host_name): ++ host_id = host_name.split("hostd")[1] ++ if host_name == "hostd22": ++ host_ip = "20.0.0." + host_id + "/24" ++ else: ++ host_ip = "45.0.0." + host_id + "/24" ++ host_mac = "00:00:00:00:00:" + host_id ++ return host_ip, host_mac ++ ++ ++def config_hosts(tgen, hosts): ++ for host_name in hosts: ++ host = tgen.gears[host_name] ++ host_ip, host_mac = compute_host_ip_mac(host_name) ++ bgp_evpn.config_host(host_name, host, host_ip, host_mac) ++ ++ ++def setup_module(module): ++ "Setup topology" ++ tgen = Topogen(build_topo, module.__name__) ++ tgen.start_topology() ++ ++ krel = platform.release() ++ if topotest.version_cmp(krel, "4.19") < 0: ++ tgen.errors = "kernel 4.19 needed for multihoming tests" ++ pytest.skip(tgen.errors) ++ ++ tors = [] ++ tors.append("torm11") ++ tors.append("torm12") ++ tors.append("torm21") ++ tors.append("torm22") ++ config_tors(tgen, tors) ++ ++ hosts = [] ++ hosts.append("hostd11") ++ hosts.append("hostd12") ++ hosts.append("hostd21") ++ hosts.append("hostd22") ++ hosts.append("hostd33") ++ config_hosts(tgen, hosts) ++ ++ # tgen.mininet_cli() ++ # This is a sample of configuration loading. ++ router_list = tgen.routers() ++ for rname, router in router_list.items(): ++ router.load_frr_config( ++ os.path.join(CWD, "{}/frr.conf".format(rname)), ++ [ ++ (TopoRouter.RD_ZEBRA, " --kernel-mac-ext-learn"), ++ (TopoRouter.RD_BGP, None), ++ ], ++ ) ++ tgen.start_router() ++ # tgen.mininet_cli() ++ ++ ++def teardown_module(_mod): ++ "Teardown the pytest environment" ++ tgen = get_topogen() ++ ++ # This function tears down the whole topology. ++ tgen.stop_topology() ++ ++ ++def test_evpn_es(): ++ """ ++ One ES is setup on torm1x ++ Two ES are setup on torm2x. This test checks if - ++ 1. ES peer has been added to the local ES (via Type-1/EAD route) ++ 2. The remote ESs are setup with the right list of PEs (via Type-1) ++ """ ++ ++ tgen = get_topogen() ++ ++ if tgen.routers_have_failure(): ++ pytest.skip(tgen.errors) ++ ++ dut_name = "torm11" ++ local_vteps = set([v for k, v in tor_ips_rack_1.items() if k != dut_name]) ++ remote_vteps = set([v for _, v in tor_ips_rack_2.items()]) ++ ++ dut = tgen.gears[dut_name] ++ test_fn = partial( ++ bgp_evpn.check_es, dut, host_es_map, host_vni_map, local_vteps, remote_vteps ++ ) ++ _, result = topotest.run_and_expect(test_fn, None, count=20, wait=3) ++ ++ assertmsg = '"{}" ES content incorrect'.format(dut_name) ++ assert result is None, assertmsg ++ ++ ++def test_evpn_df(): ++ """ ++ 1. Check the DF role on all the PEs on rack-1. ++ 2. Increase the DF preference on the non-DF and check if it becomes ++ the DF winner. ++ """ ++ ++ tgen = get_topogen() ++ ++ if tgen.routers_have_failure(): ++ pytest.skip(tgen.errors) ++ ++ # We will run the tests on just one ES ++ esi = host_es_map.get("hostd12") ++ intf = "hostbond2" ++ ++ tors = [] ++ tors.append(tgen.gears["torm11"]) ++ tors.append(tgen.gears["torm12"]) ++ df_node = "torm11" ++ ++ # check roles on rack-1 ++ for tor in tors: ++ role = "DF" if tor.name == df_node else "nonDF" ++ test_fn = partial(bgp_evpn.check_df_role, tor, esi, role) ++ _, result = topotest.run_and_expect(test_fn, None, count=20, wait=3) ++ assertmsg = '"{}" DF role incorrect'.format(tor.name) ++ assert result is None, assertmsg ++ ++ # change df preference on the nonDF to make it the df ++ torm12 = tgen.gears["torm12"] ++ torm12.vtysh_cmd("conf\ninterface %s\nevpn mh es-df-pref %d" % (intf, 60000)) ++ df_node = "torm12" ++ ++ # re-check roles on rack-1; we should have a new winner ++ for tor in tors: ++ role = "DF" if tor.name == df_node else "nonDF" ++ test_fn = partial(bgp_evpn.check_df_role, tor, esi, role) ++ _, result = topotest.run_and_expect(test_fn, None, count=20, wait=3) ++ assertmsg = '"{}" DF role incorrect'.format(tor.name) ++ assert result is None, assertmsg ++ ++ ++def test_mac_extern_learn_basic(): ++ """ ++ Test adding a MAC using bridge fdb command with extern_learn option on torm11 ++ and verify it appears in both TORs with correct flags ++ Precondition: bridge fdb, protocol support is needed for this test ++ """ ++ tgen = get_topogen() ++ ++ if tgen.routers_have_failure(): ++ pytest.skip(tgen.errors) ++ ++ # Setup for torm11 ++ dut_name = "torm11" ++ dut = tgen.gears[dut_name] ++ mac = "00:00:00:00:00:88" ++ dev = "hostbond2" ++ vlan = 1000 ++ vni = 1000 ++ ++ # Precondition check on support of 'bridge fdb' with protocol field ++ result = bgp_evpn.check_bridge_fdb_proto_supported(dut) ++ if result != None: ++ pytest.skip(result) ++ ++ # wait for protodown rc to clear after startup ++ test_fn = partial(bgp_evpn.check_protodown_rc, dut, None) ++ _, result = topotest.run_and_expect(test_fn, None, count=20, wait=3) ++ assertmsg = '"{}" protodown rc incorrect'.format(dut_name) ++ assert result is None, assertmsg ++ ++ # Also get reference to torm12 for cross-checking ++ dut2_name = "torm12" ++ dut2 = tgen.gears[dut2_name] ++ dev2 = "hostbond2" ++ ++ # Add MAC using bridge fdb command on torm11 ++ dut.run( ++ f"bridge fdb add {mac} dev {dev} vlan {vlan} master dynamic extern_learn proto hw" ++ ) ++ ++ # Check if MAC exists in torm11 kernel bridge FDB with proto hw ++ test_fn = partial(bgp_evpn.check_mac_in_bridge, dut, mac, dev, vlan, proto="hw") ++ _, result = topotest.run_and_expect(test_fn, None, count=15, wait=1) ++ assertmsg = f"Bridge FDB check failed for MAC {mac} on device {dev} vlan {vlan} with protocol hw" ++ assert result is None, assertmsg ++ ++ # Check if MAC exists in torm11's EVPN MAC table as local entry with peer-proxy flag (X) ++ test_fn = partial(bgp_evpn.check_mac_flag_in_evpn, dut, vni, mac, "X", "local") ++ _, result = topotest.run_and_expect(test_fn, None, count=20, wait=1) ++ assertmsg = f"EVPN MAC check failed for MAC {mac} on VNI {vni} with peer-proxy flag as local entry" ++ assert result is None, assertmsg ++ ++ # Check if MAC has been synced to torm12's kernel bridge FDB with proto zebra ++ test_fn = partial( ++ bgp_evpn.check_mac_in_bridge, dut2, mac, dev2, vlan, proto="zebra" ++ ) ++ _, result = topotest.run_and_expect(test_fn, None, count=15, wait=1) ++ assertmsg = f"Bridge FDB check failed for MAC {mac} on torm12 device {dev2} vlan {vlan} with protocol zebra" ++ assert result is None, assertmsg ++ ++ # Check if MAC exists in torm12's EVPN MAC table as local entry with peer-active and local-inactive flags (PI) ++ test_fn = partial(bgp_evpn.check_mac_flag_in_evpn, dut2, vni, mac, "PI", "local") ++ _, result = topotest.run_and_expect(test_fn, None, count=20, wait=1) ++ assertmsg = f"EVPN MAC check failed for MAC {mac} on torm12 VNI {vni} with peer-active and local-inactive flags" ++ assert result is None, assertmsg ++ ++ # Test MAC removal from torm11 ++ dut.run(f"bridge fdb del {mac} dev {dev} vlan {vlan} master") ++ ++ # Get the MAC holdtime from zebra and wait for that duration ++ holdtime = bgp_evpn.get_mac_holdtime(dut) ++ # Let the hold timer expire ++ time.sleep(holdtime) ++ ++ # Verify MAC is removed from torm11's kernel bridge FDB ++ test_fn = partial(bgp_evpn.check_mac_in_bridge, dut, mac, dev, vlan, expect=False) ++ _, result = topotest.run_and_expect(test_fn, None, count=20, wait=1) ++ assertmsg = f"Bridge FDB still contains MAC {mac} on device {dev} vlan {vlan} after deletion" ++ assert result is None, assertmsg ++ ++ # Verify MAC is removed from torm11's EVPN MAC table ++ test_fn = partial(bgp_evpn.check_mac_exists_in_evpn, dut, vni, mac, expect=False) ++ _, result = topotest.run_and_expect(test_fn, None, count=20, wait=1) ++ assertmsg = f"EVPN MAC table still contains MAC {mac} on VNI {vni} after deletion" ++ assert result is None, assertmsg ++ ++ # Verify MAC is also removed from torm12's kernel bridge FDB ++ test_fn = partial(bgp_evpn.check_mac_in_bridge, dut2, mac, dev2, vlan, expect=False) ++ _, result = topotest.run_and_expect(test_fn, None, count=15, wait=1) ++ assertmsg = ( ++ f"Bridge FDB on torm12 still contains MAC {mac} after deletion from torm11" ++ ) ++ assert result is None, assertmsg ++ ++ # Verify MAC is also removed from torm12's EVPN MAC table ++ test_fn = partial(bgp_evpn.check_mac_exists_in_evpn, dut2, vni, mac, expect=False) ++ _, result = topotest.run_and_expect(test_fn, None, count=20, wait=1) ++ assertmsg = ( ++ f"EVPN MAC table on torm12 still contains MAC {mac} after deletion from torm11" ++ ) ++ assert result is None, assertmsg ++ ++ ++def test_mac_extern_learn_both_tors(): ++ """ ++ Test adding the same MAC on both torm11 and torm12 with extern_learn ++ and verify both have it with peer-active flag ++ """ ++ tgen = get_topogen() ++ ++ if tgen.routers_have_failure(): ++ pytest.skip(tgen.errors) ++ ++ # Setup for torm11 ++ dut_name = "torm11" ++ dut = tgen.gears[dut_name] ++ mac = "00:00:00:00:00:99" ++ dev = "hostbond2" ++ vlan = 1000 ++ vni = 1000 ++ ++ # Precondition check on support of 'bridge fdb' with protocol field ++ result = bgp_evpn.check_bridge_fdb_proto_supported(dut) ++ if result != None: ++ pytest.skip(result) ++ ++ # Also get reference to torm12 ++ dut2_name = "torm12" ++ dut2 = tgen.gears[dut2_name] ++ dev2 = "hostbond2" ++ ++ # Add MAC using bridge fdb command on torm11 ++ dut.run( ++ f"bridge fdb add {mac} dev {dev} vlan {vlan} master dynamic extern_learn proto hw" ++ ) ++ ++ # Add same MAC using bridge fdb command on torm12 ++ dut2.run( ++ f"bridge fdb add {mac} dev {dev2} vlan {vlan} master dynamic extern_learn proto hw" ++ ) ++ ++ # Check if MAC exists in torm11 kernel bridge FDB with proto hw ++ test_fn = partial(bgp_evpn.check_mac_in_bridge, dut, mac, dev, vlan, proto="hw") ++ _, result = topotest.run_and_expect(test_fn, None, count=15, wait=1) ++ assertmsg = f"Bridge FDB check failed for MAC {mac} on torm11 device {dev} vlan {vlan} with protocol hw" ++ assert result is None, assertmsg ++ ++ # Check if MAC exists in torm12 kernel bridge FDB with proto hw ++ test_fn = partial(bgp_evpn.check_mac_in_bridge, dut2, mac, dev2, vlan, proto="hw") ++ _, result = topotest.run_and_expect(test_fn, None, count=15, wait=1) ++ assertmsg = f"Bridge FDB check failed for MAC {mac} on torm12 device {dev2} vlan {vlan} with protocol hw" ++ assert result is None, assertmsg ++ ++ # Check if MAC exists in torm11's EVPN MAC table as local entry with peer-active flag (P) ++ test_fn = partial(bgp_evpn.check_mac_flag_in_evpn, dut, vni, mac, "P", "local") ++ _, result = topotest.run_and_expect(test_fn, None, count=20, wait=1) ++ assertmsg = f"EVPN MAC check failed for MAC {mac} on torm11 VNI {vni} with peer-active flag as local entry" ++ assert result is None, assertmsg ++ ++ # Check if MAC exists in torm12's EVPN MAC table as local entry with peer-active flag (P) ++ test_fn = partial(bgp_evpn.check_mac_flag_in_evpn, dut2, vni, mac, "P", "local") ++ _, result = topotest.run_and_expect(test_fn, None, count=20, wait=1) ++ assertmsg = f"EVPN MAC check failed for MAC {mac} on torm12 VNI {vni} with peer-active flag as local entry" ++ assert result is None, assertmsg ++ ++ # Clean up: remove MACs from both torm11 and torm12 ++ dut.run(f"bridge fdb del {mac} dev {dev} vlan {vlan} master") ++ dut2.run(f"bridge fdb del {mac} dev {dev2} vlan {vlan} master") ++ ++ # Wait for MAC removal (using holdtime from first device) ++ holdtime = bgp_evpn.get_mac_holdtime(dut) ++ time.sleep(holdtime) ++ ++ # Verify MAC is removed from both TORs ++ test_fn = partial(bgp_evpn.check_mac_exists_in_evpn, dut, vni, mac, expect=False) ++ _, result = topotest.run_and_expect(test_fn, None, count=20, wait=1) ++ assertmsg = ( ++ f"EVPN MAC table still contains MAC {mac} on torm11 VNI {vni} after deletion" ++ ) ++ assert result is None, assertmsg ++ ++ test_fn = partial(bgp_evpn.check_mac_exists_in_evpn, dut2, vni, mac, expect=False) ++ _, result = topotest.run_and_expect(test_fn, None, count=20, wait=1) ++ assertmsg = ( ++ f"EVPN MAC table still contains MAC {mac} on torm12 VNI {vni} after deletion" ++ ) ++ assert result is None, assertmsg ++ ++ ++def test_mac_extern_learn_delete_readd(): ++ """ ++ Test MAC flag transitions when deleting from one TOR and quickly readding before hold timer expires ++ """ ++ tgen = get_topogen() ++ ++ if tgen.routers_have_failure(): ++ pytest.skip(tgen.errors) ++ ++ # Setup for torm11 ++ dut_name = "torm11" ++ dut = tgen.gears[dut_name] ++ mac = "00:00:00:00:00:77" ++ dev = "hostbond2" ++ vlan = 1000 ++ vni = 1000 ++ ++ # Precondition check on support of 'bridge fdb' with protocol field ++ result = bgp_evpn.check_bridge_fdb_proto_supported(dut) ++ if result != None: ++ pytest.skip(result) ++ ++ # Also get reference to torm12 ++ dut2_name = "torm12" ++ dut2 = tgen.gears[dut2_name] ++ dev2 = "hostbond2" ++ ++ # Add MAC using bridge fdb command on both torm11 and torm12 ++ dut.run( ++ f"bridge fdb add {mac} dev {dev} vlan {vlan} master dynamic extern_learn proto hw" ++ ) ++ dut2.run( ++ f"bridge fdb add {mac} dev {dev2} vlan {vlan} master dynamic extern_learn proto hw" ++ ) ++ ++ # Verify initial state: proto=hw on both sides, both show peer-active flag ++ test_fn = partial(bgp_evpn.check_mac_in_bridge, dut, mac, dev, vlan, proto="hw") ++ _, result = topotest.run_and_expect(test_fn, None, count=15, wait=1) ++ assertmsg = f"Initial check: Bridge FDB failed for MAC {mac} on torm11 device {dev} with proto hw" ++ assert result is None, assertmsg ++ ++ test_fn = partial(bgp_evpn.check_mac_in_bridge, dut2, mac, dev2, vlan, proto="hw") ++ _, result = topotest.run_and_expect(test_fn, None, count=15, wait=1) ++ assertmsg = f"Initial check: Bridge FDB failed for MAC {mac} on torm12 device {dev2} with proto hw" ++ assert result is None, assertmsg ++ ++ test_fn = partial(bgp_evpn.check_mac_flag_in_evpn, dut, vni, mac, "P", "local") ++ _, result = topotest.run_and_expect(test_fn, None, count=20, wait=1) ++ assertmsg = ( ++ f"Initial check: EVPN MAC failed for MAC {mac} on torm11 with peer-active flag" ++ ) ++ assert result is None, assertmsg ++ ++ test_fn = partial(bgp_evpn.check_mac_flag_in_evpn, dut2, vni, mac, "P", "local") ++ _, result = topotest.run_and_expect(test_fn, None, count=20, wait=1) ++ assertmsg = ( ++ f"Initial check: EVPN MAC failed for MAC {mac} on torm12 with peer-active flag" ++ ) ++ assert result is None, assertmsg ++ ++ # Delete MAC on torm11 only ++ dut.run(f"bridge fdb del {mac} dev {dev} vlan {vlan} master") ++ ++ # Sync in progress, don't wait for hold timer ++ # Check protocol has changed on torm11 (hw → zebra) ++ test_fn = partial(bgp_evpn.check_mac_in_bridge, dut, mac, dev, vlan, proto="zebra") ++ _, result = topotest.run_and_expect(test_fn, None, count=15, wait=1) ++ assertmsg = f"After torm11 deletion: Bridge FDB failed for MAC {mac} on torm11 - expected proto zebra" ++ assert result is None, assertmsg ++ ++ # Verify torm12 still shows proto=hw ++ test_fn = partial(bgp_evpn.check_mac_in_bridge, dut2, mac, dev2, vlan, proto="hw") ++ _, result = topotest.run_and_expect(test_fn, None, count=15, wait=1) ++ assertmsg = f"After torm11 deletion: Bridge FDB failed for MAC {mac} on torm12 - should stay proto hw" ++ assert result is None, assertmsg ++ ++ # Check flags on torm11: local, peer-active, local-inactive ++ test_fn = partial(bgp_evpn.check_mac_flag_in_evpn, dut, vni, mac, "PI", "local") ++ _, result = topotest.run_and_expect(test_fn, None, count=20, wait=1) ++ assertmsg = f"After torm11 deletion: EVPN MAC failed for MAC {mac} on torm11 - expected PI flags" ++ assert result is None, assertmsg ++ ++ # Check flags on torm12: local, peer-active, peer-proxy ++ test_fn = partial(bgp_evpn.check_mac_flag_in_evpn, dut2, vni, mac, "PX", "local") ++ _, result = topotest.run_and_expect(test_fn, None, count=20, wait=1) ++ assertmsg = f"After torm11 deletion: EVPN MAC failed for MAC {mac} on torm12 - expected PX flags" ++ assert result is None, assertmsg ++ ++ # Re-add MAC on torm11 before hold timer expires ++ dut.run( ++ f"bridge fdb add {mac} dev {dev} vlan {vlan} master dynamic extern_learn proto hw" ++ ) ++ ++ # Sync in progress ++ # Verify restored state: proto=hw on both sides, both show peer-active flag ++ test_fn = partial(bgp_evpn.check_mac_in_bridge, dut, mac, dev, vlan, proto="hw") ++ _, result = topotest.run_and_expect(test_fn, None, count=15, wait=1) ++ assertmsg = f"After re-add: Bridge FDB failed for MAC {mac} on torm11 device {dev} with proto hw" ++ assert result is None, assertmsg ++ ++ test_fn = partial(bgp_evpn.check_mac_in_bridge, dut2, mac, dev2, vlan, proto="hw") ++ _, result = topotest.run_and_expect(test_fn, None, count=15, wait=1) ++ assertmsg = f"After re-add: Bridge FDB failed for MAC {mac} on torm12 device {dev2} with proto hw" ++ assert result is None, assertmsg ++ ++ test_fn = partial(bgp_evpn.check_mac_flag_in_evpn, dut, vni, mac, "P", "local") ++ _, result = topotest.run_and_expect(test_fn, None, count=20, wait=1) ++ assertmsg = ( ++ f"After re-add: EVPN MAC failed for MAC {mac} on torm11 with peer-active flag" ++ ) ++ assert result is None, assertmsg ++ ++ test_fn = partial(bgp_evpn.check_mac_flag_in_evpn, dut2, vni, mac, "P", "local") ++ _, result = topotest.run_and_expect(test_fn, None, count=20, wait=1) ++ assertmsg = ( ++ f"After re-add: EVPN MAC failed for MAC {mac} on torm12 with peer-active flag" ++ ) ++ assert result is None, assertmsg ++ ++ # Final cleanup - remove MAC from both TORs ++ dut.run(f"bridge fdb del {mac} dev {dev} vlan {vlan} master") ++ dut2.run(f"bridge fdb del {mac} dev {dev2} vlan {vlan} master") ++ ++ # Wait for holdtime to expire ++ holdtime = bgp_evpn.get_mac_holdtime(dut) ++ time.sleep(holdtime) ++ ++ # Verify MAC is fully removed from both TORs ++ test_fn = partial(bgp_evpn.check_mac_exists_in_evpn, dut, vni, mac, expect=False) ++ _, result = topotest.run_and_expect(test_fn, None, count=20, wait=1) ++ assertmsg = f"Final cleanup: MAC {mac} still exists in torm11 EVPN table" ++ assert result is None, assertmsg ++ ++ test_fn = partial(bgp_evpn.check_mac_exists_in_evpn, dut2, vni, mac, expect=False) ++ _, result = topotest.run_and_expect(test_fn, None, count=20, wait=1) ++ assertmsg = f"Final cleanup: MAC {mac} still exists in torm12 EVPN table" ++ assert result is None, assertmsg ++ ++ ++def test_mac_extern_learn_transition(): ++ """ ++ Test MAC transition between TORs: ++ 1. Add MAC on torm11, verify flags ++ 2. Delete MAC from torm11, verify flags change ++ 3. Add MAC on torm12, verify flags change again ++ 4. Re-add MAC on torm11, verify flags return to both active ++ """ ++ tgen = get_topogen() ++ ++ if tgen.routers_have_failure(): ++ pytest.skip(tgen.errors) ++ ++ # Setup for torm11 ++ dut_name = "torm11" ++ dut = tgen.gears[dut_name] ++ mac = "00:00:00:00:00:55" ++ dev = "hostbond2" ++ vlan = 1000 ++ vni = 1000 ++ ++ # Precondition check on support of 'bridge fdb' with protocol field ++ result = bgp_evpn.check_bridge_fdb_proto_supported(dut) ++ if result != None: ++ pytest.skip(result) ++ ++ # Also get reference to torm12 ++ dut2_name = "torm12" ++ dut2 = tgen.gears[dut2_name] ++ dev2 = "hostbond2" ++ ++ # Step 1: Add MAC on torm11 only ++ dut.run( ++ f"bridge fdb add {mac} dev {dev} vlan {vlan} master dynamic extern_learn proto hw" ++ ) ++ ++ # Check if MAC exists in torm11 kernel bridge FDB with proto hw ++ test_fn = partial(bgp_evpn.check_mac_in_bridge, dut, mac, dev, vlan, proto="hw") ++ _, result = topotest.run_and_expect(test_fn, None, count=15, wait=1) ++ assertmsg = f"Step 1: Bridge FDB check failed for MAC {mac} on torm11 device {dev} with protocol hw" ++ assert result is None, assertmsg ++ ++ # Check if MAC exists in torm11's EVPN MAC table as local entry with peer-proxy flag (X) ++ test_fn = partial(bgp_evpn.check_mac_flag_in_evpn, dut, vni, mac, "X", "local") ++ _, result = topotest.run_and_expect(test_fn, None, count=20, wait=1) ++ assertmsg = ( ++ f"Step 1: EVPN MAC check failed for MAC {mac} on torm11 with peer-proxy flag" ++ ) ++ assert result is None, assertmsg ++ ++ # Check if MAC has been synced to torm12's kernel bridge FDB with proto zebra ++ test_fn = partial( ++ bgp_evpn.check_mac_in_bridge, dut2, mac, dev2, vlan, proto="zebra" ++ ) ++ _, result = topotest.run_and_expect(test_fn, None, count=15, wait=1) ++ assertmsg = ( ++ f"Step 1: Bridge FDB check failed for MAC {mac} on torm12 with protocol zebra" ++ ) ++ assert result is None, assertmsg ++ ++ # Check if MAC exists in torm12 with peer-active and local-inactive flags (PI) ++ test_fn = partial(bgp_evpn.check_mac_flag_in_evpn, dut2, vni, mac, "PI", "local") ++ _, result = topotest.run_and_expect(test_fn, None, count=20, wait=1) ++ assertmsg = f"Step 1: EVPN MAC check failed for MAC {mac} on torm12 with peer-active and local-inactive flags" ++ assert result is None, assertmsg ++ ++ # Step 2: Delete MAC from torm11 ++ dut.run(f"bridge fdb del {mac} dev {dev} vlan {vlan} master") ++ ++ # Sync to happen, don't wait for hold timer ++ # Verify MAC is removed from torm11's bridge FDB, but would be added back ++ test_fn = partial(bgp_evpn.check_mac_in_bridge, dut, mac, dev, vlan, proto="zebra") ++ _, result = topotest.run_and_expect(test_fn, None, count=15, wait=1) ++ assertmsg = f"Step 2: Bridge FDB check failed for MAC {mac} on torm11 - MAC should be present" ++ assert result is None, assertmsg ++ ++ # Check torm12 has proto zebra ++ test_fn = partial( ++ bgp_evpn.check_mac_in_bridge, dut2, mac, dev2, vlan, proto="zebra" ++ ) ++ _, result = topotest.run_and_expect(test_fn, None, count=15, wait=1) ++ assertmsg = f"Step 2: Bridge FDB check failed for MAC {mac} on torm12 - expected proto zebra" ++ assert result is None, assertmsg ++ ++ # Check flags on torm11: local, peer-proxy, local-inactive ++ test_fn = partial(bgp_evpn.check_mac_flag_in_evpn, dut, vni, mac, "XI", "local") ++ _, result = topotest.run_and_expect(test_fn, None, count=20, wait=1) ++ assertmsg = f"Step 2: EVPN MAC check failed for MAC {mac} on torm11 - expected peer-proxy and local-inactive flags" ++ assert result is None, assertmsg ++ ++ # Check flags on torm12: local, peer-active, local-inactive ++ test_fn = partial(bgp_evpn.check_mac_flag_in_evpn, dut2, vni, mac, "PI", "local") ++ _, result = topotest.run_and_expect(test_fn, None, count=20, wait=1) ++ assertmsg = f"Step 2: EVPN MAC check failed for MAC {mac} on torm12 - expected peer-active and local-inactive flags" ++ assert result is None, assertmsg ++ ++ # Step 3: Add MAC on torm12 ++ dut2.run( ++ f"bridge fdb add {mac} dev {dev2} vlan {vlan} master dynamic extern_learn proto hw" ++ ) ++ ++ # Check torm12 now has proto hw ++ test_fn = partial(bgp_evpn.check_mac_in_bridge, dut2, mac, dev2, vlan, proto="hw") ++ _, result = topotest.run_and_expect(test_fn, None, count=15, wait=1) ++ assertmsg = ( ++ f"Step 3: Bridge FDB check failed for MAC {mac} on torm12 - expected proto hw" ++ ) ++ assert result is None, assertmsg ++ ++ # Check flags on torm12: local with peer-proxy ++ test_fn = partial(bgp_evpn.check_mac_flag_in_evpn, dut2, vni, mac, "X", "local") ++ _, result = topotest.run_and_expect(test_fn, None, count=20, wait=1) ++ assertmsg = f"Step 3: EVPN MAC check failed for MAC {mac} on torm12 - expected peer-proxy flag" ++ assert result is None, assertmsg ++ ++ # Check torm11 still has proto zebra ++ test_fn = partial(bgp_evpn.check_mac_in_bridge, dut, mac, dev, vlan, proto="zebra") ++ _, result = topotest.run_and_expect(test_fn, None, count=15, wait=1) ++ assertmsg = f"Step 3: Bridge FDB check failed for MAC {mac} on torm11 - should still have proto zebra" ++ assert result is None, assertmsg ++ ++ # Check flags on torm11: local, peer-active, local-inactive ++ test_fn = partial(bgp_evpn.check_mac_flag_in_evpn, dut, vni, mac, "PI", "local") ++ _, result = topotest.run_and_expect(test_fn, None, count=20, wait=1) ++ assertmsg = f"Step 3: EVPN MAC check failed for MAC {mac} on torm11 - expected peer-active and local-inactive flags" ++ assert result is None, assertmsg ++ ++ # Step 4: Re-add MAC on torm11 ++ dut.run( ++ f"bridge fdb add {mac} dev {dev} vlan {vlan} master dynamic extern_learn proto hw" ++ ) ++ ++ # Verify proto=hw on torm11 ++ test_fn = partial(bgp_evpn.check_mac_in_bridge, dut, mac, dev, vlan, proto="hw") ++ _, result = topotest.run_and_expect(test_fn, None, count=15, wait=1) ++ assertmsg = ( ++ f"Step 4: Bridge FDB check failed for MAC {mac} on torm11 - expected proto hw" ++ ) ++ assert result is None, assertmsg ++ ++ # Verify proto=hw on torm12 ++ test_fn = partial(bgp_evpn.check_mac_in_bridge, dut2, mac, dev2, vlan, proto="hw") ++ _, result = topotest.run_and_expect(test_fn, None, count=15, wait=1) ++ assertmsg = ( ++ f"Step 4: Bridge FDB check failed for MAC {mac} on torm12 - expected proto hw" ++ ) ++ assert result is None, assertmsg ++ ++ # Check flags on torm11: local with peer-active ++ test_fn = partial(bgp_evpn.check_mac_flag_in_evpn, dut, vni, mac, "P", "local") ++ _, result = topotest.run_and_expect(test_fn, None, count=20, wait=1) ++ assertmsg = f"Step 4: EVPN MAC check failed for MAC {mac} on torm11 - expected peer-active flag" ++ assert result is None, assertmsg ++ ++ # Check flags on torm12: local with peer-active ++ test_fn = partial(bgp_evpn.check_mac_flag_in_evpn, dut2, vni, mac, "P", "local") ++ _, result = topotest.run_and_expect(test_fn, None, count=20, wait=1) ++ assertmsg = f"Step 4: EVPN MAC check failed for MAC {mac} on torm12 - expected peer-active flag" ++ assert result is None, assertmsg ++ ++ # Final cleanup - remove MAC from both TORs ++ dut.run(f"bridge fdb del {mac} dev {dev} vlan {vlan} master") ++ dut2.run(f"bridge fdb del {mac} dev {dev2} vlan {vlan} master") ++ ++ # Wait for holdtime to expire ++ holdtime = bgp_evpn.get_mac_holdtime(dut) ++ time.sleep(holdtime) ++ ++ # Verify MAC is fully removed from both TORs ++ test_fn = partial(bgp_evpn.check_mac_exists_in_evpn, dut, vni, mac, expect=False) ++ _, result = topotest.run_and_expect(test_fn, None, count=20, wait=1) ++ assertmsg = f"Final cleanup: MAC {mac} still exists in torm11 EVPN table" ++ assert result is None, assertmsg ++ ++ test_fn = partial(bgp_evpn.check_mac_exists_in_evpn, dut2, vni, mac, expect=False) ++ _, result = topotest.run_and_expect(test_fn, None, count=20, wait=1) ++ assertmsg = f"Final cleanup: MAC {mac} still exists in torm12 EVPN table" ++ assert result is None, assertmsg ++ ++ ++if __name__ == "__main__": ++ args = ["-s"] + sys.argv[1:] ++ sys.exit(pytest.main(args)) +diff --git a/tests/topotests/bgp_evpn_mh_l2l3vni_ext_learn/torm11/frr.conf b/tests/topotests/bgp_evpn_mh_l2l3vni_ext_learn/torm11/frr.conf +new file mode 100644 +index 000000000..4a1c92d70 +--- /dev/null ++++ b/tests/topotests/bgp_evpn_mh_l2l3vni_ext_learn/torm11/frr.conf +@@ -0,0 +1,76 @@ ++! debug zebra evpn mh es ++! debug zebra evpn mh mac ++! debug zebra evpn mh neigh ++! debug zebra evpn mh nh ++! debug zebra dplane ++! debug zebra vxlan ++! debug zebra kernel ++! debug zebra kernel msgdump ++ ++evpn mh startup-delay 3 ++evpn mh mac-holdtime 30 ++evpn mh neigh-holdtime 20 ++! ++int torm11-eth0 ++ ip addr 192.168.1.2/24 ++ evpn mh uplink ++! ++int torm11-eth1 ++ ip addr 192.168.5.2/24 ++ evpn mh uplink ++! ++int lo ++ ip addr 192.168.100.15/32 ++ ++interface hostbond2 ++ evpn mh es-id 2 ++ evpn mh es-sys-mac 44:38:39:ff:ff:01 ++ ++vrf vrf500 ++ vni 500 ++! ++frr defaults datacenter ++! ++! debug bgp evpn mh es ++! debug bgp evpn mh route ++! debug bgp zebra ++! ++! ++router bgp 65011 ++ bgp router-id 192.168.100.15 ++ no bgp ebgp-requires-policy ++ ++ neighbor TRANSIT_OVERLAY peer-group ++ neighbor TRANSIT_OVERLAY remote-as external ++ ++ neighbor 192.168.1.1 peer-group TRANSIT_OVERLAY ++ neighbor 192.168.5.1 peer-group TRANSIT_OVERLAY ++ ++ address-family ipv4 unicast ++ neighbor TRANSIT_OVERLAY activate ++ redistribute connected ++ exit-address-family ++ ++ address-family l2vpn evpn ++ neighbor TRANSIT_OVERLAY activate ++ advertise-all-vni ++! advertise-svi-ip ++ exit-address-family ++exit ++! ++ ++router bgp 65011 vrf vrf500 ++ address-family ipv4 unicast ++ redistribute connected ++ exit-address-family ++ ! ++ address-family ipv6 unicast ++ redistribute connected ++ exit-address-family ++! ++ address-family l2vpn evpn ++ advertise ipv4 unicast ++ advertise ipv6 unicast ++ exit-address-family ++! ++exit +diff --git a/tests/topotests/bgp_evpn_mh_l2l3vni_ext_learn/torm12/frr.conf b/tests/topotests/bgp_evpn_mh_l2l3vni_ext_learn/torm12/frr.conf +new file mode 100644 +index 000000000..f8138a1ac +--- /dev/null ++++ b/tests/topotests/bgp_evpn_mh_l2l3vni_ext_learn/torm12/frr.conf +@@ -0,0 +1,72 @@ ++! debug zebra evpn mh es ++! debug zebra evpn mh mac ++! debug zebra evpn mh neigh ++! debug zebra evpn mh nh ++! debug zebra dplane ++! debug zebra vxlan ++! debug zebra kernel ++! debug zebra kernel msgdump ++! ++evpn mh startup-delay 3 ++evpn mh mac-holdtime 30 ++evpn mh neigh-holdtime 20 ++! ++int torm12-eth0 ++ ip addr 192.168.2.2/24 ++ evpn mh uplink ++! ++int torm12-eth1 ++ ip addr 192.168.6.2/24 ++ evpn mh uplink ++! ++! ++int lo ++ ip addr 192.168.100.16/32 ++ ++interface hostbond2 ++ evpn mh es-id 2 ++ evpn mh es-sys-mac 44:38:39:ff:ff:01 ++! ++vrf vrf500 ++ vni 500 ++! ++frr defaults datacenter ++! ++! debug bgp evpn mh es ++! debug bgp evpn mh route ++! debug bgp zebra ++! ++! ++router bgp 65012 ++ bgp router-id 192.168.100.16 ++ no bgp ebgp-requires-policy ++ ++ neighbor TRANSIT_OVERLAY peer-group ++ neighbor TRANSIT_OVERLAY remote-as external ++ ++ neighbor 192.168.2.1 peer-group TRANSIT_OVERLAY ++ neighbor 192.168.6.1 peer-group TRANSIT_OVERLAY ++ ++ address-family ipv4 unicast ++ neighbor TRANSIT_OVERLAY activate ++ redistribute connected ++ exit-address-family ++ address-family l2vpn evpn ++ neighbor TRANSIT_OVERLAY activate ++ advertise-all-vni ++ advertise-svi-ip ++ exit-address-family ++! ++router bgp 65012 vrf vrf500 ++ address-family ipv4 unicast ++ exit-address-family ++! ++ address-family ipv6 unicast ++ exit-address-family ++! ++ address-family l2vpn evpn ++ advertise ipv4 unicast ++ advertise ipv6 unicast ++ exit-address-family ++! ++exit +diff --git a/tests/topotests/bgp_evpn_mh_l2l3vni_ext_learn/torm21/frr.conf b/tests/topotests/bgp_evpn_mh_l2l3vni_ext_learn/torm21/frr.conf +new file mode 100644 +index 000000000..13374f67f +--- /dev/null ++++ b/tests/topotests/bgp_evpn_mh_l2l3vni_ext_learn/torm21/frr.conf +@@ -0,0 +1,71 @@ ++! debug zebra evpn mh es ++! debug zebra evpn mh mac ++! debug zebra evpn mh neigh ++! debug zebra evpn mh nh ++! debug zebra vxlan ++! ++evpn mh startup-delay 1 ++! ++int torm21-eth0 ++ ip addr 192.168.3.2/24 ++ evpn mh uplink ++! ++! ++int torm21-eth1 ++ ip addr 192.168.7.2/24 ++ evpn mh uplink ++! ++! ++int lo ++ ip addr 192.168.100.17/32 ++! ++interface hostbond1 ++ evpn mh es-id 1 ++ evpn mh es-sys-mac 44:38:39:ff:ff:02 ++! ++interface hostbond2 ++ evpn mh es-id 2 ++ evpn mh es-sys-mac 44:38:39:ff:ff:02 ++! ++vrf vrf500 ++ vni 500 ++! ++frr defaults datacenter ++! ++! debug bgp evpn mh es ++! debug bgp evpn mh route ++! debug bgp zebra ++! ++! ++router bgp 65021 ++ bgp router-id 192.168.100.17 ++ no bgp ebgp-requires-policy ++ ++ neighbor TRANSIT_OVERLAY peer-group ++ neighbor TRANSIT_OVERLAY remote-as external ++ ++ neighbor 192.168.3.1 peer-group TRANSIT_OVERLAY ++ neighbor 192.168.7.1 peer-group TRANSIT_OVERLAY ++ ++ address-family ipv4 unicast ++ neighbor TRANSIT_OVERLAY activate ++ redistribute connected ++ exit-address-family ++ address-family l2vpn evpn ++ neighbor TRANSIT_OVERLAY activate ++ advertise-all-vni ++ exit-address-family ++! ++router bgp 65021 vrf vrf500 ++ address-family ipv4 unicast ++ exit-address-family ++! ++ address-family ipv6 unicast ++ exit-address-family ++! ++ address-family l2vpn evpn ++ advertise ipv4 unicast ++ advertise ipv6 unicast ++ exit-address-family ++! ++exit +diff --git a/tests/topotests/bgp_evpn_mh_l2l3vni_ext_learn/torm22/frr.conf b/tests/topotests/bgp_evpn_mh_l2l3vni_ext_learn/torm22/frr.conf +new file mode 100644 +index 000000000..dc330498c +--- /dev/null ++++ b/tests/topotests/bgp_evpn_mh_l2l3vni_ext_learn/torm22/frr.conf +@@ -0,0 +1,73 @@ ++! debug zebra evpn mh es ++! debug zebra evpn mh mac ++! debug zebra evpn mh neigh ++! debug zebra evpn mh nh ++! debug zebra vxlan ++! ++evpn mh startup-delay 1 ++! ++int torm22-eth0 ++ ip addr 192.168.4.2/24 ++ evpn mh uplink ++! ++! ++int torm22-eth1 ++ ip addr 192.168.8.2/24 ++ evpn mh uplink ++! ++! ++int lo ++ ip addr 192.168.100.18/32 ++! ++interface hostbond1 ++ evpn mh es-id 1 ++ evpn mh es-sys-mac 44:38:39:ff:ff:02 ++! ++interface hostbond2 ++ evpn mh es-id 2 ++ evpn mh es-sys-mac 44:38:39:ff:ff:02 ++! ++vrf vrf500 ++ vni 500 ++! ++! ++frr defaults datacenter ++! ++! debug bgp evpn mh es ++! debug bgp evpn mh route ++! debug bgp zebra ++! ++router bgp 65022 ++ bgp router-id 192.168.100.18 ++ no bgp ebgp-requires-policy ++ ++ neighbor TRANSIT_OVERLAY peer-group ++ neighbor TRANSIT_OVERLAY remote-as external ++ ++ neighbor 192.168.4.1 peer-group TRANSIT_OVERLAY ++ neighbor 192.168.8.1 peer-group TRANSIT_OVERLAY ++ ++ address-family ipv4 unicast ++ neighbor TRANSIT_OVERLAY activate ++ redistribute connected ++ exit-address-family ++ address-family l2vpn evpn ++ neighbor TRANSIT_OVERLAY activate ++ advertise-all-vni ++ exit-address-family ++! ++router bgp 65022 vrf vrf500 ++ address-family ipv4 unicast ++ redistribute connected ++ exit-address-family ++! ++ address-family ipv6 unicast ++ redistribute connected ++ exit-address-family ++! ++ address-family l2vpn evpn ++ advertise ipv4 unicast ++ advertise ipv6 unicast ++ exit-address-family ++! ++exit +diff --git a/tests/topotests/lib/bgp_evpn.py b/tests/topotests/lib/bgp_evpn.py +new file mode 100644 +index 000000000..c654b2426 +--- /dev/null ++++ b/tests/topotests/lib/bgp_evpn.py +@@ -0,0 +1,366 @@ ++#!/usr/bin/env python ++# SPDX-License-Identifier: ISC ++ ++# ++# bgp_evpn.py ++# Verification utility APIs and Classes for BGP/EVPN related testing ++# ++# Copyright (c) 2025 by ++# Cisco Systems, Inc. ++# Mrinmoy Ghosh ++# ++# Permission to use, copy, modify, and/or distribute this software ++# for any purpose with or without fee is hereby granted, provided ++# that the above copyright notice and this permission notice appear ++# in all copies. ++# ++# THE SOFTWARE IS PROVIDED "AS IS" AND NETDEF DISCLAIMS ALL WARRANTIES ++# WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF ++# MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL NETDEF BE LIABLE FOR ++# ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY ++# DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, ++# WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ++# ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE ++# OF THIS SOFTWARE. ++# ++ ++import json ++from lib import topotest ++ ++ ++### Configs ++def config_bond(node, bond_name, bond_members, bond_ad_sys_mac, br, vid=1000): ++ """ ++ Used to setup bonds on the TORs and hosts for MH ++ """ ++ node.run(f"ip link add dev {bond_name} type bond mode 802.3ad") ++ node.run(f"ip link set dev {bond_name} type bond lacp_rate 1") ++ node.run(f"ip link set dev {bond_name} type bond miimon 100") ++ node.run(f"ip link set dev {bond_name} type bond xmit_hash_policy layer3+4") ++ node.run(f"ip link set dev {bond_name} type bond min_links 1") ++ node.run(f"ip link set dev {bond_name} type bond ad_actor_system {bond_ad_sys_mac}") ++ ++ for bond_member in bond_members: ++ node.run(f"ip link set dev {bond_member} down") ++ node.run(f"ip link set dev {bond_member} master {bond_name}") ++ node.run(f"ip link set dev {bond_member} up") ++ ++ node.run(f"ip link set dev {bond_name} up") ++ ++ # if bridge is specified add the bond as a bridge member ++ if br: ++ node.run(f" ip link set dev {bond_name} master {br}") ++ node.run(f"/sbin/bridge link set dev {bond_name} priority 8") ++ node.run(f"/sbin/bridge vlan del vid 1 dev {bond_name}") ++ node.run(f"/sbin/bridge vlan del vid 1 untagged pvid dev {bond_name}") ++ node.run(f"/sbin/bridge vlan add vid {vid} dev {bond_name}") ++ node.run(f"/sbin/bridge vlan add vid {vid} untagged pvid dev {bond_name}") ++ ++ ++def config_host( ++ host_name, ++ host, ++ host_ip, ++ host_mac, ++ bond_name="torbond", ++ bond_member_suffixes=["-eth0", "-eth1"], ++ bond_ad_sys_mac="00:00:00:00:00:00", ++): ++ """ ++ Create the dual-attached bond on host nodes for MH ++ """ ++ bond_members = [] ++ ++ for suffix in bond_member_suffixes: ++ bond_members.append(host_name + suffix) ++ ++ config_bond(host, bond_name, bond_members, bond_ad_sys_mac, None) ++ host.run(f"ip addr add {host_ip} dev {bond_name}") ++ host.run(f"ip link set dev {bond_name} address {host_mac}") ++ ++ ++def config_l3vni(tor_name, node, vtep_ip, mac_map, vni=500, vrf="vrf500", svi="br500"): ++ """ ++ Create an L3VNI and its ip-vrf {vrf} on the TOR node. ++ The VNI is associated with SVI bridge {svi}. ++ The SVI is assigned a MAC address based on the tor_name using mac_map. ++ """ ++ node.run(f"ip link add {vrf} type vrf table {vni}") ++ node.run(f"ip link set {vrf} up") ++ ++ node.run(f"ip link add {svi} type bridge") ++ node.run(f"ip link set {svi} master {vrf} addrgenmode none") ++ ++ node.run(f"ip link set {svi} addr {mac_map[tor_name]}") ++ node.run( ++ f"ip link add vni{vni} type vxlan id {vni} local {vtep_ip} dstport 4789 nolearning" ++ ) ++ node.run(f"ip link set vni{vni} master {svi} addrgenmode none") ++ # node.run("/sbin/bridge link set dev vni500 learning off") ++ node.run(f"ip link set dev vni{vni} master {svi}") ++ node.run(f"ip link set dev {svi} up") ++ node.run(f"ip link set dev vni{vni} up") ++ ++ ++def config_l2vni(tor_name, node, svi_ip, vtep_ip, vni=1000, vid=1000, vrf="vrf500"): ++ """ ++ On torm1x amd torm21, ++ Create a VxLAN device for VNI 1000 and add it to the bridge. ++ VLAN-1000 is mapped to VNI-1000. ++ ++ On torm22, do the same + add another bridge and l2vni to create a different subnet ++ """ ++ bridge = f"br{vid}" ++ # on torm2x, there are 2 subnets. This required to different bridge domain, svi_ip and l2vni. ++ # subnets are connected to same vrf. Therefore, same L3VNI can be used ++ node.run(f"ip link add {bridge} type bridge") ++ node.run(f"ip link set {bridge} master {vrf}") ++ node.run(f"ip addr add {svi_ip}/24 dev {bridge}") ++ node.run(f"/sbin/sysctl net.ipv4.conf.{bridge}.arp_accept=1") ++ ++ node.run( ++ f"ip link add vni{vni} type vxlan local {vtep_ip} dstport 4789 id {vni} nolearning" ++ ) ++ node.run(f"ip link set vni{vni} master {bridge} addrgenmode none") ++ node.run(f"/sbin/bridge link set dev vni{vni} learning off") ++ node.run(f"ip link set vni{vni} up") ++ node.run(f"ip link set {bridge} up") ++ ++ node.run(f"/sbin/bridge vlan del vid 1 dev vni{vni}") ++ node.run(f"/sbin/bridge vlan del vid 1 untagged pvid dev vni{vni}") ++ node.run(f"/sbin/bridge vlan add vid {vid} dev vni{vni}") ++ node.run(f"/sbin/bridge vlan add vid {vid} untagged pvid dev vni{vni}") ++ ++ ++### Verifications ++def get_bgp_evpn_vni(dut): ++ """ ++ Check the output of 'show bgp evpn vni' command on the router ++ Parse 'show evpn vni json' output and return a dict of VNI to type. ++ Example return: {1000: "L2", 500: "L3"} ++ :param dut: Device under test ++ """ ++ ++ output = json.loads(dut.vtysh_cmd("show evpn vni json")) ++ vni_types = {} ++ for vni_str, vni_info in output.items(): ++ vni = int(vni_str) ++ vni_types[vni] = vni_info.get("type") ++ return vni_types ++ ++ ++def get_local_l2_vnis(dut): ++ """ ++ Returns list of L2VNIs configured and active on the DUT ++ :param dut: Device under test ++ """ ++ return [k for k, v in get_bgp_evpn_vni(dut).items() if v == "L2"] ++ ++ ++def check_es(dut, host_es_map, host_vni_map, local_vteps, remote_vteps): ++ """ ++ Verify list of PEs associated all ESs, local and remote ++ :param dut: Device under test ++ :param host_es_map: Mapping of hosts to their Ethernet Segment Identifiers (ESIs) ++ :param host_vni_map: Mapping of hosts to their Virtual Network Identifiers (VNIs) ++ :param local_vteps: Set of local VTEP IPs ++ :param remote_vteps: Set of remote VTEP IPs ++ """ ++ bgp_es = dut.vtysh_cmd("show bgp l2vp evpn es json") ++ bgp_es_json = json.loads(bgp_es) ++ ++ result = None ++ ++ expected_es_set = set( ++ [ ++ v1 ++ for k1, v1 in host_es_map.items() ++ for k2, v2 in host_vni_map.items() ++ if k1 == k2 and v2 in get_local_l2_vnis(dut) ++ ] ++ ) ++ curr_es_set = [] ++ ++ # check is ES content is correct ++ for es in bgp_es_json: ++ esi = es["esi"] ++ curr_es_set.append(esi) ++ types = es["type"] ++ vtep_ips = set() ++ for vtep in es.get("vteps", []): ++ vtep_ips.add(vtep["vtep_ip"]) ++ ++ if "local" in types: ++ diff = local_vteps.symmetric_difference(vtep_ips) ++ else: ++ diff = remote_vteps.symmetric_difference(vtep_ips) ++ result = (esi, diff) if diff else None ++ if result: ++ return result ++ ++ # check if all ESs are present ++ curr_es_set = set(curr_es_set) ++ result = curr_es_set.symmetric_difference(expected_es_set) ++ ++ return result if result else None ++ ++ ++def check_df_role(dut, esi, role): ++ """ ++ Return error string if the df role on the dut is different ++ """ ++ es_json = dut.vtysh_cmd("show evpn es %s json" % esi) ++ es = json.loads(es_json) ++ ++ if not es: ++ return "esi %s not found" % esi ++ ++ flags = es.get("flags", []) ++ curr_role = "nonDF" if "nonDF" in flags else "DF" ++ ++ if curr_role != role: ++ return "%s is %s for %s" % (dut.name, curr_role, esi) ++ ++ return None ++ ++ ++def check_ip_neigh(tgen, ip, mac, bridge, dut, expect=True): ++ """ ++ checks if neighbor entry is present in kernel ++ """ ++ output = tgen.gears[dut].run( ++ f"ip neigh show | grep {ip} | grep {mac} | grep {bridge}" ++ ) ++ if (ip in output) == expect: ++ return None ++ else: ++ return f"{'' if expect else 'Un-'}Expected IP Neighbor Entry on {dut}: {ip} {mac} {bridge}: Got {output}" ++ ++ ++def check_protodown_rc(dut, protodown_rc): ++ """ ++ check if specified protodown reason code is set ++ """ ++ ++ out = dut.vtysh_cmd("show evpn json") ++ ++ evpn_js = json.loads(out) ++ tmp_rc = evpn_js.get("protodownReasons", []) ++ ++ if protodown_rc: ++ if protodown_rc not in tmp_rc: ++ return "protodown %s missing in %s" % (protodown_rc, tmp_rc) ++ else: ++ if tmp_rc: ++ return "unexpected protodown rc %s" % (tmp_rc) ++ ++ return None ++ ++ ++def check_neigh(dut, vni, ip, mac, m_type, state, expect=True): ++ """ ++ checks if neighbor is present and if desination matches the one provided ++ """ ++ ++ out = dut.vtysh_cmd("show evpn arp-cache vni %d ip %s json" % (vni, ip)) ++ ++ if out == "": ++ return f"Could not find neighbor ip {ip}" if expect else None ++ nbr_js = json.loads(out) ++ tmp_ip = nbr_js.get("ip", "") ++ tmp_mac = nbr_js.get("mac", "") ++ tmp_m_type = nbr_js.get("type", "") ++ tmp_state = nbr_js.get("state", "") ++ if tmp_ip == ip and tmp_mac == mac and tmp_m_type == m_type and tmp_state == state: ++ return None if expect else f"Incorrectly found Neighbor {nbr_js}" ++ ++ return "invalid vni %d ip %s out %s" % (vni, ip, nbr_js) if expect else None ++ ++ ++def check_mac_in_bridge(dut, mac, dev, vlan, proto=None, expect=True): ++ """ ++ Check if a MAC entry exists in the kernel bridge FDB with specified protocol ++ """ ++ output = dut.run(f"bridge fdb show | grep '{mac} dev {dev} vlan {vlan}'") ++ ++ # Check if MAC exists ++ if (mac in output) != expect: ++ return f"MAC {'not' if expect else 'unexpectedly'} found in bridge FDB: {mac} dev {dev} vlan {vlan}" ++ ++ # If MAC exists and protocol check is requested ++ if expect and proto and (mac in output): ++ if f"proto {proto}" not in output: ++ return f"MAC {mac} found but with wrong protocol. Expected: {proto}, Got: {output}" ++ ++ return None ++ ++ ++def check_mac_flag_in_evpn(dut, vni, mac, flag, mac_type="local", expect=True): ++ """ ++ Check if a MAC exists in the EVPN MAC table with the specified flag and type ++ """ ++ out = dut.vtysh_cmd(f"show evpn mac vni {vni}") ++ ++ if not out or "Number of MACs" not in out: ++ return ( ++ None ++ if not expect ++ else f"MAC {mac} not found in EVPN MAC table for VNI {vni}" ++ ) ++ ++ found = False ++ for line in out.splitlines(): ++ if mac in line: ++ # Check both flag and type ++ if flag in line and mac_type in line: ++ found = True ++ break ++ ++ if found == expect: ++ return None ++ else: ++ return f"MAC {mac} {'not' if expect else 'unexpectedly'} found as {mac_type} with flag {flag} in EVPN MAC table for VNI {vni}" ++ ++ ++def get_mac_holdtime(dut): ++ """ ++ Get the MAC holdtime value from the 'show evpn' command ++ """ ++ out = dut.vtysh_cmd("show evpn json") ++ evpn_data = json.loads(out) ++ holdtime = evpn_data.get("macHoldtime", 300) # Default to 300 if not found ++ ++ # Convert to seconds ++ return int(holdtime) ++ ++ ++def check_mac_exists_in_evpn(dut, vni, mac, expect=True): ++ """ ++ Check if a MAC exists in the EVPN MAC table regardless of flags or type ++ """ ++ out = dut.vtysh_cmd(f"show evpn mac vni {vni}") ++ ++ if not out or "Number of MACs" not in out: ++ return None if not expect else f"EVPN MAC output missing for VNI {vni}" ++ ++ found = False ++ for line in out.splitlines(): ++ if mac in line: ++ found = True ++ break ++ ++ if found == expect: ++ return None ++ else: ++ return f"MAC {mac} {'not' if expect else 'unexpectedly'} found in EVPN MAC table for VNI {vni}" ++ ++ ++def check_bridge_fdb_proto_supported(dut): ++ """ ++ Check if the bridge FDB supports 'protocol' field ++ """ ++ out = dut.run("bridge fdb help 2>&1 | grep protocol | wc -l") ++ out = int(out.strip()) ++ if out > 0: ++ return None ++ return "Bridge FDB does not support protocol" +-- +2.43.0 + diff --git a/src/sonic-frr/patch/0036-bgpd-install-evpn-failure-logging.patch b/src/sonic-frr/patch/0036-bgpd-install-evpn-failure-logging.patch new file mode 100644 index 00000000000..66055d54eef --- /dev/null +++ b/src/sonic-frr/patch/0036-bgpd-install-evpn-failure-logging.patch @@ -0,0 +1,45 @@ +From c02596a15f646c55b0beb503e3b24f1bfc11e851 Mon Sep 17 00:00:00 2001 +From: Mrinmoy Ghosh +Date: Wed, 20 Aug 2025 06:34:43 +0000 +Subject: bgpd: install evpn failure logging + +flog_err added for evpn install to zebra failure for + ip and mac. + +Signed-off-by: Mrinmoy Ghosh +Signed-off-by: Mrinmoy Ghosh +Signed-off-by: Mike Mallin +Signed-off-by: Tamer Ahmed +(cherry picked from commit 8ccd5f023755af10a5f27d98ca99f29c7a0e4463) + +diff --git a/bgpd/bgp_evpn.c b/bgpd/bgp_evpn.c +index 4c809d079..c70911e5c 100644 +--- a/bgpd/bgp_evpn.c ++++ b/bgpd/bgp_evpn.c +@@ -3442,6 +3442,11 @@ static int install_evpn_route_entry_in_vni_ip(struct bgp *bgp, + + ret = install_evpn_route_entry_in_vni_common(bgp, vpn, p, dest, + parent_pi); ++ if (ret) { ++ flog_err(EC_BGP_EVPN_FAIL, ++ "%s (%u): Failed to install EVPN %pFX route in VNI %u IP table", ++ vrf_id_to_name(bgp->vrf_id), bgp->vrf_id, p, vpn->vni); ++ } + + bgp_dest_unlock_node(dest); + +@@ -3468,6 +3473,11 @@ static int install_evpn_route_entry_in_vni_mac(struct bgp *bgp, + + ret = install_evpn_route_entry_in_vni_common(bgp, vpn, p, dest, + parent_pi); ++ if (ret) { ++ flog_err(EC_BGP_EVPN_FAIL, ++ "%s (%u): Failed to install EVPN %pFX route in VNI %u MAC table", ++ vrf_id_to_name(bgp->vrf_id), bgp->vrf_id, p, vpn->vni); ++ } + + bgp_dest_unlock_node(dest); + +-- +2.43.0 + diff --git a/src/sonic-frr/patch/0037-lib-zebra-Make-Zebra-IPv6-VTEP-Aware.patch b/src/sonic-frr/patch/0037-lib-zebra-Make-Zebra-IPv6-VTEP-Aware.patch new file mode 100644 index 00000000000..91b056788d0 --- /dev/null +++ b/src/sonic-frr/patch/0037-lib-zebra-Make-Zebra-IPv6-VTEP-Aware.patch @@ -0,0 +1,3317 @@ +From 6f50cf506c788c93988df0a1c6cebbcc8febc3d4 Mon Sep 17 00:00:00 2001 +From: Mike RE Mallin +Date: Wed, 23 Apr 2025 10:26:15 -0400 +Subject: lib, zebra: Make Zebra IPv6 VTEP Aware + +- %pI4 to %pIA +- "struct in_addr" to "struct ipaddr" +- Stop changes at the ZAPI boundary until BGP is IPv6 VTEP aware +- Show command filter changes as necessary to support IPv6 VTEP + arguments +- Add "ipaddr_is_mcast" to lib/ipaddr.h + +This is intended to be a no-harm commit until more IPv6 VTEP code is +committed. + +Signed-off-by: Mike Mallin + +Co-authored-by: Tarek Saad +Co-authored-by: Ramanan Natarajan +(cherry picked from commit e455fd0b55027387535a3348dd2438e8d3b9573f) +Signed-off-by: Tamer Ahmed + +diff --git a/lib/ipaddr.h b/lib/ipaddr.h +index eb2c2d70f..fba48a225 100644 +--- a/lib/ipaddr.h ++++ b/lib/ipaddr.h +@@ -174,6 +174,20 @@ static inline bool ipaddr_is_same(const struct ipaddr *ip1, + return ipaddr_cmp(ip1, ip2) == 0; + } + ++static inline bool ipaddr_is_mcast(const struct ipaddr *ip) ++{ ++ switch (ip->ipa_type) { ++ case IPADDR_NONE: ++ return false; ++ case IPADDR_V4: ++ return IN_MULTICAST(ntohl(ip->ipaddr_v4.s_addr)); ++ case IPADDR_V6: ++ return IN6_IS_ADDR_MULTICAST(&(ip->ipaddr_v6)); ++ } ++ ++ return false; ++} ++ + /* clang-format off */ + #ifdef _FRR_ATTRIBUTE_PRINTFRR + #pragma FRR printfrr_ext "%pIA" (struct ipaddr *) +diff --git a/zebra/dplane_fpm_nl.c b/zebra/dplane_fpm_nl.c +index 3bfa30886..da3872132 100644 +--- a/zebra/dplane_fpm_nl.c ++++ b/zebra/dplane_fpm_nl.c +@@ -1377,9 +1377,8 @@ static void fpm_enqueue_rmac_table(struct hash_bucket *bucket, void *arg) + + dplane_ctx_reset(fra->ctx); + dplane_ctx_set_op(fra->ctx, DPLANE_OP_MAC_INSTALL); +- dplane_mac_init(fra->ctx, fra->zl3vni->vxlan_if, +- zif->brslave_info.br_if, vid, &zrmac->macaddr, vni->vni, +- zrmac->fwd_info.r_vtep_ip, sticky, 0 /*nhg*/, ++ dplane_mac_init(fra->ctx, fra->zl3vni->vxlan_if, zif->brslave_info.br_if, vid, ++ &zrmac->macaddr, vni->vni, &zrmac->fwd_info.r_vtep_ip, sticky, 0 /*nhg*/, + 0 /*update_flags*/); + if (fpm_nl_enqueue(fra->fnc, fra->ctx) == -1) { + event_add_timer(zrouter.master, fpm_rmac_send, fra->fnc, 1, +diff --git a/zebra/if_netlink.c b/zebra/if_netlink.c +index a21491417..930aa964a 100644 +--- a/zebra/if_netlink.c ++++ b/zebra/if_netlink.c +@@ -476,7 +476,6 @@ static int netlink_extract_vxlan_info(struct rtattr *link_data, + uint8_t svd = 0; + struct rtattr *attr[IFLA_VXLAN_MAX + 1]; + vni_t vni_in_msg; +- struct in_addr vtep_ip_in_msg; + ifindex_t ifindex_link; + + memset(vxl_info, 0, sizeof(*vxl_info)); +@@ -508,14 +507,22 @@ static int netlink_extract_vxlan_info(struct rtattr *link_data, + vxl_info->vni_info.iftype = ZEBRA_VXLAN_IF_SVD; + } + +- if (!attr[IFLA_VXLAN_LOCAL]) { ++ ++ if (attr[IFLA_VXLAN_LOCAL]) { ++ vxl_info->vtep_ip.ipaddr_v4 = *(struct in_addr *)RTA_DATA(attr[IFLA_VXLAN_LOCAL]); ++ SET_IPADDR_V4(&vxl_info->vtep_ip); ++ zlog_debug("IFLA_VXLAN_LOCAL VXLAN IF message, local address V4: %pIA", ++ &vxl_info->vtep_ip); ++ } else if (attr[IFLA_VXLAN_LOCAL6]) { ++ IPV6_ADDR_COPY(&vxl_info->vtep_ip.ipaddr_v6, ++ (struct in6_addr *)RTA_DATA(attr[IFLA_VXLAN_LOCAL6])); ++ SET_IPADDR_V6(&vxl_info->vtep_ip); ++ zlog_debug("IFLA_VXLAN_LOCAL VXLAN IF message, local address V6: %pIA", ++ &vxl_info->vtep_ip); ++ } else { + if (IS_ZEBRA_DEBUG_KERNEL) + zlog_debug( + "IFLA_VXLAN_LOCAL missing from VXLAN IF message"); +- } else { +- vtep_ip_in_msg = +- *(struct in_addr *)RTA_DATA(attr[IFLA_VXLAN_LOCAL]); +- vxl_info->vtep_ip = vtep_ip_in_msg; + } + + if (attr[IFLA_VXLAN_GROUP]) { +diff --git a/zebra/interface.c b/zebra/interface.c +index f9b31260a..5567769d3 100644 +--- a/zebra/interface.c ++++ b/zebra/interface.c +@@ -2572,8 +2572,8 @@ static void zebra_vxlan_if_dump_vty(struct vty *vty, struct zebra_if *zebra_if) + vxlan_info = &zebra_if->l2info.vxl; + vni_info = &vxlan_info->vni_info; + +- if (vxlan_info->vtep_ip.s_addr != INADDR_ANY) +- vty_out(vty, " VTEP IP: %pI4", &vxlan_info->vtep_ip); ++ if (!ipaddr_is_zero(&vxlan_info->vtep_ip)) ++ vty_out(vty, " VTEP IP: %pIA", &vxlan_info->vtep_ip); + + if (vxlan_info->ifindex_link && (vxlan_info->link_nsid != NS_UNKNOWN)) { + struct interface *ifp; +@@ -2941,9 +2941,8 @@ static void zebra_vxlan_if_dump_vty_json(json_object *json_if, + vxlan_info = &zebra_if->l2info.vxl; + vni_info = &vxlan_info->vni_info; + +- if (vxlan_info->vtep_ip.s_addr != INADDR_ANY) +- json_object_string_addf(json_if, "vtepIp", "%pI4", +- &vxlan_info->vtep_ip); ++ if (!ipaddr_is_zero(&vxlan_info->vtep_ip)) ++ json_object_string_addf(json_if, "vtepIp", "%pIA", &vxlan_info->vtep_ip); + + if (vxlan_info->ifindex_link && (vxlan_info->link_nsid != NS_UNKNOWN)) { + struct interface *ifp; +diff --git a/zebra/rib.h b/zebra/rib.h +index 872b313c9..f46c37233 100644 +--- a/zebra/rib.h ++++ b/zebra/rib.h +@@ -456,27 +456,19 @@ int zebra_rib_queue_evpn_route_del(vrf_id_t vrf_id, + const struct ipaddr *vtep_ip, + const struct prefix *host_prefix); + /* Enqueue EVPN remote ES for processing */ +-int zebra_rib_queue_evpn_rem_es_add(const esi_t *esi, +- const struct in_addr *vtep_ip, +- bool esr_rxed, uint8_t df_alg, +- uint16_t df_pref); +-int zebra_rib_queue_evpn_rem_es_del(const esi_t *esi, +- const struct in_addr *vtep_ip); ++int zebra_rib_queue_evpn_rem_es_add(const esi_t *esi, const struct ipaddr *vtep_ip, bool esr_rxed, ++ uint8_t df_alg, uint16_t df_pref); ++int zebra_rib_queue_evpn_rem_es_del(const esi_t *esi, const struct ipaddr *vtep_ip); + /* Enqueue EVPN remote macip update for processing */ + int zebra_rib_queue_evpn_rem_macip_del(vni_t vni, const struct ethaddr *macaddr, +- const struct ipaddr *ip, +- struct in_addr vtep_ip); ++ const struct ipaddr *ip, struct ipaddr *vtep_ip); + int zebra_rib_queue_evpn_rem_macip_add(vni_t vni, const struct ethaddr *macaddr, +- const struct ipaddr *ipaddr, +- uint8_t flags, uint32_t seq, +- struct in_addr vtep_ip, +- const esi_t *esi); ++ const struct ipaddr *ipaddr, uint8_t flags, uint32_t seq, ++ struct ipaddr *vtep_ip, const esi_t *esi); + /* Enqueue VXLAN remote vtep update for processing */ +-int zebra_rib_queue_evpn_rem_vtep_add(vrf_id_t vrf_id, vni_t vni, +- struct in_addr vtep_ip, ++int zebra_rib_queue_evpn_rem_vtep_add(vrf_id_t vrf_id, vni_t vni, struct ipaddr *vtep_ip, + int flood_control); +-int zebra_rib_queue_evpn_rem_vtep_del(vrf_id_t vrf_id, vni_t vni, +- struct in_addr vtep_ip); ++int zebra_rib_queue_evpn_rem_vtep_del(vrf_id_t vrf_id, vni_t vni, struct ipaddr *vtep_ip); + + extern void meta_queue_free(struct meta_queue *mq, struct zebra_vrf *zvrf); + extern int zebra_rib_labeled_unicast(struct route_entry *re); +diff --git a/zebra/rt.h b/zebra/rt.h +index e5dc26150..e2e0d1612 100644 +--- a/zebra/rt.h ++++ b/zebra/rt.h +@@ -102,7 +102,7 @@ extern void neigh_read_for_vlan(struct zebra_ns *zns, struct interface *ifp); + extern void neigh_read_specific_ip(const struct ipaddr *ip, + struct interface *vlan_if); + extern void route_read(struct zebra_ns *zns); +-extern int kernel_upd_mac_nh(uint32_t nh_id, struct in_addr vtep_ip); ++extern int kernel_upd_mac_nh(uint32_t nh_id, struct ipaddr *vtep_ip); + extern int kernel_del_mac_nh(uint32_t nh_id); + extern int kernel_upd_mac_nhg(uint32_t nhg_id, uint32_t nh_cnt, + struct nh_grp *nh_ids); +diff --git a/zebra/rt_netlink.c b/zebra/rt_netlink.c +index dbf61361e..bebad1c6a 100644 +--- a/zebra/rt_netlink.c ++++ b/zebra/rt_netlink.c +@@ -4144,7 +4144,7 @@ static int netlink_macfdb_change(struct nlmsghdr *h, int len, ns_id_t ns_id) + struct rtattr *tb[NDA_MAX + 1]; + struct ethaddr mac; + vlanid_t vid = 0; +- struct in_addr vtep_ip; ++ struct ipaddr vtep_ip; + int vid_present = 0, dst_present = 0; + char vid_buf[20]; + char dst_buf[30]; +@@ -4193,12 +4193,14 @@ static int netlink_macfdb_change(struct nlmsghdr *h, int len, ns_id_t ns_id) + } + + if (tb[NDA_DST]) { +- /* TODO: Only IPv4 supported now. */ + dst_present = 1; +- memcpy(&vtep_ip.s_addr, RTA_DATA(tb[NDA_DST]), +- IPV4_MAX_BYTELEN); +- snprintfrr(dst_buf, sizeof(dst_buf), " dst %pI4", +- &vtep_ip); ++ memset(&vtep_ip, 0, sizeof(struct ipaddr)); ++ if (RTA_PAYLOAD(tb[NDA_DST]) == sizeof(struct in_addr)) ++ SET_IPADDR_V4(&vtep_ip); ++ else ++ SET_IPADDR_V6(&vtep_ip); ++ memcpy(&vtep_ip.ip.addr, RTA_DATA(tb[NDA_DST]), RTA_PAYLOAD(tb[NDA_DST])); ++ snprintfrr(dst_buf, sizeof(dst_buf), " dst %pIA", &vtep_ip); + } else + memset(&vtep_ip, 0, sizeof(vtep_ip)); + +@@ -4572,8 +4574,7 @@ ssize_t netlink_macfdb_update_ctx(struct zebra_dplane_ctx *ctx, void *data, + } + + nhg_id = dplane_ctx_mac_get_nhg_id(ctx); +- vtep_ip.ipaddr_v4 = *(dplane_ctx_mac_get_vtep_ip(ctx)); +- SET_IPADDR_V4(&vtep_ip); ++ vtep_ip = *(dplane_ctx_mac_get_vtep_ip(ctx)); + + if (IS_ZEBRA_DEBUG_KERNEL) { + char vid_buf[20]; +@@ -5287,7 +5288,7 @@ ssize_t netlink_mpls_multipath_msg_encode(int cmd, struct zebra_dplane_ctx *ctx, + * MAC updates. Hence the use of the legacy style. It will be moved to + * the new dplane style pre-merge to master. XXX + */ +-static int netlink_fdb_nh_update(uint32_t nh_id, struct in_addr vtep_ip) ++static int netlink_fdb_nh_update(uint32_t nh_id, struct ipaddr *vtep_ip) + { + struct { + struct nlmsghdr n; +@@ -5307,21 +5308,28 @@ static int netlink_fdb_nh_update(uint32_t nh_id, struct in_addr vtep_ip) + req.n.nlmsg_flags = NLM_F_REQUEST; + req.n.nlmsg_flags |= (NLM_F_CREATE | NLM_F_REPLACE); + req.n.nlmsg_type = cmd; +- req.nhm.nh_family = AF_INET; ++ if (IS_IPADDR_V4(vtep_ip)) ++ req.nhm.nh_family = AF_INET; ++ else ++ req.nhm.nh_family = AF_INET6; + + if (!nl_attr_put32(&req.n, sizeof(req), NHA_ID, nh_id)) + return -1; + if (!nl_attr_put(&req.n, sizeof(req), NHA_FDB, NULL, 0)) + return -1; +- if (!nl_attr_put(&req.n, sizeof(req), NHA_GATEWAY, +- &vtep_ip, IPV4_MAX_BYTELEN)) +- return -1; +- +- if (IS_ZEBRA_DEBUG_KERNEL || IS_ZEBRA_DEBUG_EVPN_MH_NH) { +- zlog_debug("Tx %s fdb-nh 0x%x %pI4", +- nl_msg_type_to_str(cmd), nh_id, &vtep_ip); ++ if (req.nhm.nh_family == AF_INET) { ++ if (!nl_attr_put(&req.n, sizeof(req), NHA_GATEWAY, &vtep_ip->ipaddr_v4, ++ IPV4_MAX_BYTELEN)) ++ return -1; ++ } else { ++ if (!nl_attr_put(&req.n, sizeof(req), NHA_GATEWAY, &vtep_ip->ipaddr_v6, ++ IPV6_MAX_BYTELEN)) ++ return -1; + } + ++ if (IS_ZEBRA_DEBUG_KERNEL || IS_ZEBRA_DEBUG_EVPN_MH_NH) ++ zlog_debug("Tx %s fdb-nh 0x%x %pIA", nl_msg_type_to_str(cmd), nh_id, vtep_ip); ++ + return netlink_talk(netlink_talk_filter, &req.n, &zns->netlink_cmd, zns, + false); + } +@@ -5422,7 +5430,7 @@ static int netlink_fdb_nhg_del(uint32_t nhg_id) + return netlink_fdb_nh_del(nhg_id); + } + +-int kernel_upd_mac_nh(uint32_t nh_id, struct in_addr vtep_ip) ++int kernel_upd_mac_nh(uint32_t nh_id, struct ipaddr *vtep_ip) + { + return netlink_fdb_nh_update(nh_id, vtep_ip); + } +diff --git a/zebra/rt_socket.c b/zebra/rt_socket.c +index de0497860..f3eaf0141 100644 +--- a/zebra/rt_socket.c ++++ b/zebra/rt_socket.c +@@ -387,7 +387,7 @@ uint32_t kernel_get_speed(struct interface *ifp, int *error) + return ifp->speed; + } + +-int kernel_upd_mac_nh(uint32_t nh_id, struct in_addr vtep_ip) ++int kernel_upd_mac_nh(uint32_t nh_id, struct ipaddr *vtep_ip) + { + return 0; + } +diff --git a/zebra/zebra_dplane.c b/zebra/zebra_dplane.c +index 30ddcc942..c7b7117d7 100644 +--- a/zebra/zebra_dplane.c ++++ b/zebra/zebra_dplane.c +@@ -187,7 +187,7 @@ struct dplane_pw_info { + */ + struct dplane_br_port_info { + uint32_t sph_filter_cnt; +- struct in_addr sph_filters[ES_VTEP_MAX_CNT]; ++ struct ipaddr sph_filters[ES_VTEP_MAX_CNT]; + /* DPLANE_BR_PORT_XXX - see zebra_dplane.h*/ + uint32_t flags; + uint32_t backup_nhg_id; +@@ -266,7 +266,7 @@ struct dplane_mac_info { + ifindex_t br_ifindex; + struct ethaddr mac; + vni_t vni; +- struct in_addr vtep_ip; ++ struct ipaddr vtep_ip; + bool is_sticky; + uint32_t nhg_id; + uint32_t update_flags; +@@ -685,11 +685,11 @@ static enum zebra_dplane_result pw_update_internal(struct zebra_pw *pw, + static enum zebra_dplane_result intf_addr_update_internal( + const struct interface *ifp, const struct connected *ifc, + enum dplane_op_e op); +-static enum zebra_dplane_result +-mac_update_common(enum dplane_op_e op, const struct interface *ifp, +- const struct interface *br_ifp, vlanid_t vid, +- const struct ethaddr *mac, vni_t vni, struct in_addr vtep_ip, +- bool sticky, uint32_t nhg_id, uint32_t update_flags); ++static enum zebra_dplane_result mac_update_common(enum dplane_op_e op, const struct interface *ifp, ++ const struct interface *br_ifp, vlanid_t vid, ++ const struct ethaddr *mac, vni_t vni, ++ struct ipaddr *vtep_ip, bool sticky, ++ uint32_t nhg_id, uint32_t update_flags); + static enum zebra_dplane_result + neigh_update_internal(enum dplane_op_e op, const struct interface *ifp, + const void *link, int link_family, +@@ -2830,8 +2830,7 @@ vni_t dplane_ctx_mac_get_vni(const struct zebra_dplane_ctx *ctx) + return ctx->u.macinfo.vni; + } + +-const struct in_addr *dplane_ctx_mac_get_vtep_ip( +- const struct zebra_dplane_ctx *ctx) ++const struct ipaddr *dplane_ctx_mac_get_vtep_ip(const struct zebra_dplane_ctx *ctx) + { + DPLANE_CTX_VALID(ctx); + return &(ctx->u.macinfo.vtep_ip); +@@ -2922,7 +2921,7 @@ bool dplane_ctx_mac_get_dp_static(const struct zebra_dplane_ctx *ctx) + return ctx->u.macinfo.dp_static; + } + +-void dplane_ctx_mac_set_vtep_ip(struct zebra_dplane_ctx *ctx, const struct in_addr *vtep_ip) ++void dplane_ctx_mac_set_vtep_ip(struct zebra_dplane_ctx *ctx, const struct ipaddr *vtep_ip) + { + DPLANE_CTX_VALID(ctx); + +@@ -3419,8 +3418,7 @@ dplane_ctx_get_br_port_sph_filter_cnt(const struct zebra_dplane_ctx *ctx) + return ctx->u.br_port.sph_filter_cnt; + } + +-const struct in_addr * +-dplane_ctx_get_br_port_sph_filters(const struct zebra_dplane_ctx *ctx) ++const struct ipaddr *dplane_ctx_get_br_port_sph_filters(const struct zebra_dplane_ctx *ctx) + { + DPLANE_CTX_VALID(ctx); + +@@ -5241,10 +5239,10 @@ done: + /* + * Enqueue access br_port update. + */ +-enum zebra_dplane_result +-dplane_br_port_update(const struct interface *ifp, bool non_df, +- uint32_t sph_filter_cnt, +- const struct in_addr *sph_filters, uint32_t backup_nhg_id) ++enum zebra_dplane_result dplane_br_port_update(const struct interface *ifp, bool non_df, ++ uint32_t sph_filter_cnt, ++ const struct ipaddr *sph_filters, ++ uint32_t backup_nhg_id) + { + enum zebra_dplane_result result = ZEBRA_DPLANE_REQUEST_FAILURE; + uint32_t flags = 0; +@@ -5262,9 +5260,8 @@ dplane_br_port_update(const struct interface *ifp, bool non_df, + + vtep_str[0] = '\0'; + for (i = 0; i < sph_filter_cnt; ++i) { +- snprintfrr(vtep_str + strlen(vtep_str), +- sizeof(vtep_str) - strlen(vtep_str), "%pI4 ", +- &sph_filters[i]); ++ snprintfrr(vtep_str + strlen(vtep_str), sizeof(vtep_str) - strlen(vtep_str), ++ "%pIA ", &sph_filters[i]); + } + zlog_debug( + "init br_port ctx %s: ifp %s, flags 0x%x backup_nhg 0x%x sph %s", +@@ -5525,11 +5522,11 @@ enum zebra_dplane_result dplane_intf_update(const struct interface *ifp) + /* + * Enqueue vxlan/evpn mac add (or update). + */ +-enum zebra_dplane_result +-dplane_rem_mac_add(const struct interface *ifp, +- const struct interface *bridge_ifp, vlanid_t vid, +- const struct ethaddr *mac, vni_t vni, struct in_addr vtep_ip, +- bool sticky, uint32_t nhg_id, bool was_static) ++enum zebra_dplane_result dplane_rem_mac_add(const struct interface *ifp, ++ const struct interface *bridge_ifp, vlanid_t vid, ++ const struct ethaddr *mac, vni_t vni, ++ struct ipaddr *vtep_ip, bool sticky, uint32_t nhg_id, ++ bool was_static) + { + enum zebra_dplane_result result; + uint32_t update_flags = 0; +@@ -5549,10 +5546,9 @@ dplane_rem_mac_add(const struct interface *ifp, + * Enqueue vxlan/evpn mac delete. + */ + enum zebra_dplane_result dplane_rem_mac_del(const struct interface *ifp, +- const struct interface *bridge_ifp, +- vlanid_t vid, +- const struct ethaddr *mac, +- vni_t vni, struct in_addr vtep_ip) ++ const struct interface *bridge_ifp, vlanid_t vid, ++ const struct ethaddr *mac, vni_t vni, ++ struct ipaddr *vtep_ip) + { + enum zebra_dplane_result result; + uint32_t update_flags = 0; +@@ -5609,7 +5605,7 @@ enum zebra_dplane_result dplane_local_mac_add(const struct interface *ifp, + { + enum zebra_dplane_result result; + uint32_t update_flags = 0; +- struct in_addr vtep_ip; ++ struct ipaddr vtep_ip; + + if (set_static) + update_flags |= DPLANE_MAC_SET_STATIC; +@@ -5617,11 +5613,11 @@ enum zebra_dplane_result dplane_local_mac_add(const struct interface *ifp, + if (set_inactive) + update_flags |= DPLANE_MAC_SET_INACTIVE; + +- vtep_ip.s_addr = 0; ++ SET_IPADDR_NONE(&vtep_ip); + + /* Use common helper api */ +- result = mac_update_common(DPLANE_OP_MAC_INSTALL, ifp, bridge_ifp, vid, +- mac, 0, vtep_ip, sticky, 0, update_flags); ++ result = mac_update_common(DPLANE_OP_MAC_INSTALL, ifp, bridge_ifp, vid, mac, 0, &vtep_ip, ++ sticky, 0, update_flags); + return result; + } + +@@ -5634,13 +5630,13 @@ dplane_local_mac_del(const struct interface *ifp, + const struct ethaddr *mac) + { + enum zebra_dplane_result result; +- struct in_addr vtep_ip; ++ struct ipaddr vtep_ip; + +- vtep_ip.s_addr = 0; ++ SET_IPADDR_NONE(&vtep_ip); + + /* Use common helper api */ +- result = mac_update_common(DPLANE_OP_MAC_DELETE, ifp, bridge_ifp, vid, +- mac, 0, vtep_ip, false, 0, 0); ++ result = mac_update_common(DPLANE_OP_MAC_DELETE, ifp, bridge_ifp, vid, mac, 0, &vtep_ip, ++ false, 0, 0); + return result; + } + /* +@@ -5648,9 +5644,8 @@ dplane_local_mac_del(const struct interface *ifp, + * reset/cleared - for a MAC update. + */ + void dplane_mac_init(struct zebra_dplane_ctx *ctx, const struct interface *ifp, +- const struct interface *br_ifp, vlanid_t vid, +- const struct ethaddr *mac, vni_t vni, +- struct in_addr vtep_ip, bool sticky, uint32_t nhg_id, ++ const struct interface *br_ifp, vlanid_t vid, const struct ethaddr *mac, ++ vni_t vni, struct ipaddr *vtep_ip, bool sticky, uint32_t nhg_id, + uint32_t update_flags) + { + struct zebra_ns *zns; +@@ -5668,7 +5663,7 @@ void dplane_mac_init(struct zebra_dplane_ctx *ctx, const struct interface *ifp, + memset(&ctx->u.macinfo, 0, sizeof(ctx->u.macinfo)); + + ctx->u.macinfo.br_ifindex = br_ifp->ifindex; +- ctx->u.macinfo.vtep_ip = vtep_ip; ++ ctx->u.macinfo.vtep_ip = *vtep_ip; + ctx->u.macinfo.mac = *mac; + ctx->u.macinfo.vni = vni; + ctx->u.macinfo.vid = vid; +@@ -5680,19 +5675,19 @@ void dplane_mac_init(struct zebra_dplane_ctx *ctx, const struct interface *ifp, + /* + * Common helper api for MAC address/vxlan updates + */ +-static enum zebra_dplane_result +-mac_update_common(enum dplane_op_e op, const struct interface *ifp, +- const struct interface *br_ifp, vlanid_t vid, +- const struct ethaddr *mac, vni_t vni, struct in_addr vtep_ip, +- bool sticky, uint32_t nhg_id, uint32_t update_flags) ++static enum zebra_dplane_result mac_update_common(enum dplane_op_e op, const struct interface *ifp, ++ const struct interface *br_ifp, vlanid_t vid, ++ const struct ethaddr *mac, vni_t vni, ++ struct ipaddr *vtep_ip, bool sticky, ++ uint32_t nhg_id, uint32_t update_flags) + { + enum zebra_dplane_result result = ZEBRA_DPLANE_REQUEST_FAILURE; + int ret; + struct zebra_dplane_ctx *ctx = NULL; + + if (IS_ZEBRA_DEBUG_DPLANE_DETAIL) +- zlog_debug("init mac ctx %s: mac %pEA, ifp %s, vtep %pI4", +- dplane_op2str(op), mac, ifp->name, &vtep_ip); ++ zlog_debug("init mac ctx %s: mac %pEA, ifp %s, vtep %pIA", dplane_op2str(op), mac, ++ ifp->name, vtep_ip); + + ctx = dplane_ctx_alloc(); + ctx->zd_op = op; +@@ -5798,23 +5793,18 @@ enum zebra_dplane_result dplane_rem_neigh_delete(const struct interface *ifp, + /* + * Enqueue evpn VTEP add for the dataplane. + */ +-enum zebra_dplane_result dplane_vtep_add(const struct interface *ifp, +- const struct in_addr *ip, ++enum zebra_dplane_result dplane_vtep_add(const struct interface *ifp, const struct ipaddr *ip, + vni_t vni) + { + enum zebra_dplane_result result; + struct ethaddr mac = { {0, 0, 0, 0, 0, 0} }; +- struct ipaddr addr; + + if (IS_ZEBRA_DEBUG_VXLAN) +- zlog_debug("Install %pI4 into flood list for VNI %u intf %s(%u)", +- ip, vni, ifp->name, ifp->ifindex); +- +- SET_IPADDR_V4(&addr); +- addr.ipaddr_v4 = *ip; ++ zlog_debug("Install %pIA into flood list for VNI %u intf %s(%u)", ip, vni, ++ ifp->name, ifp->ifindex); + +- result = neigh_update_internal(DPLANE_OP_VTEP_ADD, ifp, &mac, +- AF_ETHERNET, &addr, vni, 0, 0, 0, 0); ++ result = neigh_update_internal(DPLANE_OP_VTEP_ADD, ifp, &mac, AF_ETHERNET, ip, vni, 0, 0, 0, ++ 0); + + return result; + } +@@ -5822,25 +5812,18 @@ enum zebra_dplane_result dplane_vtep_add(const struct interface *ifp, + /* + * Enqueue evpn VTEP add for the dataplane. + */ +-enum zebra_dplane_result dplane_vtep_delete(const struct interface *ifp, +- const struct in_addr *ip, ++enum zebra_dplane_result dplane_vtep_delete(const struct interface *ifp, const struct ipaddr *ip, + vni_t vni) + { + enum zebra_dplane_result result; + struct ethaddr mac = { {0, 0, 0, 0, 0, 0} }; +- struct ipaddr addr; + + if (IS_ZEBRA_DEBUG_VXLAN) +- zlog_debug( +- "Uninstall %pI4 from flood list for VNI %u intf %s(%u)", +- ip, vni, ifp->name, ifp->ifindex); +- +- SET_IPADDR_V4(&addr); +- addr.ipaddr_v4 = *ip; ++ zlog_debug("Uninstall %pIA from flood list for VNI %u intf %s(%u)", ip, vni, ++ ifp->name, ifp->ifindex); + +- result = neigh_update_internal(DPLANE_OP_VTEP_DELETE, ifp, +- (const void *)&mac, AF_ETHERNET, &addr, +- vni, 0, 0, 0, 0); ++ result = neigh_update_internal(DPLANE_OP_VTEP_DELETE, ifp, (const void *)&mac, AF_ETHERNET, ++ ip, vni, 0, 0, 0, 0); + + return result; + } +diff --git a/zebra/zebra_dplane.h b/zebra/zebra_dplane.h +index 631deeb84..854a0e862 100644 +--- a/zebra/zebra_dplane.h ++++ b/zebra/zebra_dplane.h +@@ -741,8 +741,7 @@ uint32_t dplane_ctx_mac_get_nhg_id(const struct zebra_dplane_ctx *ctx); + const struct ethaddr *dplane_ctx_mac_get_addr( + const struct zebra_dplane_ctx *ctx); + vni_t dplane_ctx_mac_get_vni(const struct zebra_dplane_ctx *ctx); +-const struct in_addr *dplane_ctx_mac_get_vtep_ip( +- const struct zebra_dplane_ctx *ctx); ++const struct ipaddr *dplane_ctx_mac_get_vtep_ip(const struct zebra_dplane_ctx *ctx); + ifindex_t dplane_ctx_mac_get_br_ifindex(const struct zebra_dplane_ctx *ctx); + uint32_t dplane_ctx_mac_get_dst_present(const struct zebra_dplane_ctx *ctx); + bool dplane_ctx_mac_get_local_inactive(const struct zebra_dplane_ctx *ctx); +@@ -756,7 +755,7 @@ void dplane_ctx_mac_set_vni(struct zebra_dplane_ctx *ctx, vni_t vni); + void dplane_ctx_mac_set_nhg_id(struct zebra_dplane_ctx *ctx, uint32_t nhg_id); + void dplane_ctx_mac_set_dst_present(struct zebra_dplane_ctx *ctx, uint32_t dst_present); + void dplane_ctx_mac_set_is_sticky(struct zebra_dplane_ctx *ctx, bool is_sticky); +-void dplane_ctx_mac_set_vtep_ip(struct zebra_dplane_ctx *ctx, const struct in_addr *vtep_ip); ++void dplane_ctx_mac_set_vtep_ip(struct zebra_dplane_ctx *ctx, const struct ipaddr *vtep_ip); + void dplane_ctx_mac_set_local_inactive(struct zebra_dplane_ctx *ctx, bool local_inactive); + void dplane_ctx_mac_set_dp_static(struct zebra_dplane_ctx *ctx, bool dp_static); + void dplane_ctx_mac_set_ndm_state(struct zebra_dplane_ctx *ctx, uint16_t ndm_state); //__u16 +@@ -851,8 +850,7 @@ void dplane_ctx_get_pbr_ipset_entry(const struct zebra_dplane_ctx *ctx, + uint32_t dplane_ctx_get_br_port_flags(const struct zebra_dplane_ctx *ctx); + uint32_t + dplane_ctx_get_br_port_sph_filter_cnt(const struct zebra_dplane_ctx *ctx); +-const struct in_addr * +-dplane_ctx_get_br_port_sph_filters(const struct zebra_dplane_ctx *ctx); ++const struct ipaddr *dplane_ctx_get_br_port_sph_filters(const struct zebra_dplane_ctx *ctx); + uint32_t + dplane_ctx_get_br_port_backup_nhg_id(const struct zebra_dplane_ctx *ctx); + +@@ -927,9 +925,10 @@ enum zebra_dplane_result dplane_route_notif_update( + /* + * Enqueue bridge port changes for the dataplane. + */ +-enum zebra_dplane_result dplane_br_port_update( +- const struct interface *ifp, bool non_df, uint32_t sph_filter_cnt, +- const struct in_addr *sph_filters, uint32_t backup_nhg_id); ++enum zebra_dplane_result dplane_br_port_update(const struct interface *ifp, bool non_df, ++ uint32_t sph_filter_cnt, ++ const struct ipaddr *sph_filters, ++ uint32_t backup_nhg_id); + + /* Forward ref of nhg_hash_entry */ + struct nhg_hash_entry; +@@ -1006,11 +1005,11 @@ enum zebra_dplane_result dplane_neigh_ip_update(enum dplane_op_e op, + /* + * Enqueue evpn mac operations for the dataplane. + */ +-enum zebra_dplane_result +-dplane_rem_mac_add(const struct interface *ifp, +- const struct interface *bridge_ifp, vlanid_t vid, +- const struct ethaddr *mac, vni_t vni, struct in_addr vtep_ip, +- bool sticky, uint32_t nhg_id, bool was_static); ++enum zebra_dplane_result dplane_rem_mac_add(const struct interface *ifp, ++ const struct interface *bridge_ifp, vlanid_t vid, ++ const struct ethaddr *mac, vni_t vni, ++ struct ipaddr *vtep_ip, bool sticky, uint32_t nhg_id, ++ bool was_static); + + enum zebra_dplane_result dplane_local_mac_add(const struct interface *ifp, + const struct interface *bridge_ifp, +@@ -1026,16 +1025,14 @@ dplane_local_mac_del(const struct interface *ifp, + const struct ethaddr *mac); + + enum zebra_dplane_result dplane_rem_mac_del(const struct interface *ifp, +- const struct interface *bridge_ifp, +- vlanid_t vid, +- const struct ethaddr *mac, +- vni_t vni, struct in_addr vtep_ip); ++ const struct interface *bridge_ifp, vlanid_t vid, ++ const struct ethaddr *mac, vni_t vni, ++ struct ipaddr *vtep_ip); + + /* Helper api to init an empty or new context for a MAC update */ + void dplane_mac_init(struct zebra_dplane_ctx *ctx, const struct interface *ifp, +- const struct interface *br_ifp, vlanid_t vid, +- const struct ethaddr *mac, vni_t vni, +- struct in_addr vtep_ip, bool sticky, uint32_t nhg_id, ++ const struct interface *br_ifp, vlanid_t vid, const struct ethaddr *mac, ++ vni_t vni, struct ipaddr *vtep_ip, bool sticky, uint32_t nhg_id, + uint32_t update_flags); + + /* +@@ -1056,11 +1053,9 @@ enum zebra_dplane_result dplane_rem_neigh_delete(const struct interface *ifp, + /* + * Enqueue evpn VTEP updates for the dataplane. + */ +-enum zebra_dplane_result dplane_vtep_add(const struct interface *ifp, +- const struct in_addr *ip, ++enum zebra_dplane_result dplane_vtep_add(const struct interface *ifp, const struct ipaddr *ip, + vni_t vni); +-enum zebra_dplane_result dplane_vtep_delete(const struct interface *ifp, +- const struct in_addr *ip, ++enum zebra_dplane_result dplane_vtep_delete(const struct interface *ifp, const struct ipaddr *ip, + vni_t vni); + + /* +diff --git a/zebra/zebra_evpn.c b/zebra/zebra_evpn.c +index 4fa1d76b6..911f8cce5 100644 +--- a/zebra/zebra_evpn.c ++++ b/zebra/zebra_evpn.c +@@ -127,7 +127,7 @@ void zebra_evpn_print(struct zebra_evpn *zevpn, void **ctxt) + (zevpn->svi_if ? zevpn->svi_if->name : "")); + vty_out(vty, " SVI ifIndex: %u\n", + (zevpn->svi_if ? zevpn->svi_if->ifindex : 0)); +- vty_out(vty, " Local VTEP IP: %pI4\n", &zevpn->local_vtep_ip); ++ vty_out(vty, " Local VTEP IP: %pIA\n", &zevpn->local_vtep_ip); + vty_out(vty, " Mcast group: %pI4\n", &zevpn->mcast_grp); + } else { + json_object_string_add(json, "vxlanInterface", zevpn->vxlan_if->name); +@@ -136,7 +136,7 @@ void zebra_evpn_print(struct zebra_evpn *zevpn, void **ctxt) + json_object_string_add(json, "sviInterface", zevpn->svi_if->name); + json_object_int_add(json, "sviIfindex", zevpn->svi_if->ifindex); + } +- json_object_string_addf(json, "vtepIp", "%pI4", &zevpn->local_vtep_ip); ++ json_object_string_addf(json, "vtepIp", "%pIA", &zevpn->local_vtep_ip); + json_object_string_addf(json, "mcastGroup", "%pI4", &zevpn->mcast_grp); + json_object_string_add(json, "advertiseGatewayMacip", + zevpn->advertise_gw_macip ? "Yes" : "No"); +@@ -160,10 +160,10 @@ void zebra_evpn_print(struct zebra_evpn *zevpn, void **ctxt) + zvtep_flood_str, zvtep->flood_control, VXLAN_FLOOD_STR_DEFAULT); + + if (json == NULL) { +- vty_out(vty, " %pI4 flood: %s\n", &zvtep->vtep_ip, flood_str); ++ vty_out(vty, " %pIA flood: %s\n", &zvtep->vtep_ip, flood_str); + } else { + json_vtep = json_object_new_object(); +- json_object_string_addf(json_vtep, "ip", "%pI4", &zvtep->vtep_ip); ++ json_object_string_addf(json_vtep, "ip", "%pIA", &zvtep->vtep_ip); + json_object_string_add(json_vtep, "flood", flood_str); + json_object_array_add(json_vtep_list, json_vtep); + } +@@ -242,7 +242,7 @@ void zebra_evpn_print_hash(struct hash_bucket *bucket, void *ctxt[]) + json_vtep_list = json_object_new_array(); + for (zvtep = zevpn->vteps; zvtep; zvtep = zvtep->next) { + json_ip_str = json_object_new_string( +- inet_ntop(AF_INET, &zvtep->vtep_ip, buf, sizeof(buf))); ++ ipaddr2str(&zvtep->vtep_ip, buf, sizeof(buf))); + json_object_array_add(json_vtep_list, json_ip_str); + } + json_object_object_add(json_evpn, "remoteVteps", json_vtep_list); +@@ -1108,7 +1108,8 @@ int zebra_evpn_send_add_to_client(struct zebra_evpn *zevpn) + + zclient_create_header(s, ZEBRA_VNI_ADD, zebra_vrf_get_evpn_id()); + stream_putl(s, zevpn->vni); +- stream_put_in_addr(s, &zevpn->local_vtep_ip); ++ /* Temporary until BGP supports IPv6 VTEPs */ ++ stream_put_in_addr(s, (const struct in_addr *)&zevpn->local_vtep_ip.ipaddr_v4.s_addr); + stream_put(s, &zevpn->vrf_id, sizeof(vrf_id_t)); /* tenant vrf */ + stream_put_in_addr(s, &zevpn->mcast_grp); + stream_put(s, &svi_index, sizeof(ifindex_t)); +@@ -1117,12 +1118,10 @@ int zebra_evpn_send_add_to_client(struct zebra_evpn *zevpn) + stream_putw_at(s, 0, stream_get_endp(s)); + + if (IS_ZEBRA_DEBUG_VXLAN) +- zlog_debug( +- "Send EVPN_ADD %u %pI4 tenant vrf %s(%u) SVI index %u to %s", +- zevpn->vni, &zevpn->local_vtep_ip, +- vrf_id_to_name(zevpn->vrf_id), zevpn->vrf_id, +- (zevpn->svi_if ? zevpn->svi_if->ifindex : 0), +- zebra_route_string(client->proto)); ++ zlog_debug("Send EVPN_ADD %u %pIA tenant vrf %s(%u) SVI index %u to %s", zevpn->vni, ++ &zevpn->local_vtep_ip, vrf_id_to_name(zevpn->vrf_id), zevpn->vrf_id, ++ (zevpn->svi_if ? zevpn->svi_if->ifindex : 0), ++ zebra_route_string(client->proto)); + + client->vniadd_cnt++; + rc = zserv_send_message(client, s); +@@ -1176,17 +1175,15 @@ int zebra_evpn_send_del_to_client(struct zebra_evpn *zevpn) + /* + * See if remote VTEP matches with prefix. + */ +-static int zebra_evpn_vtep_match(struct in_addr *vtep_ip, +- struct zebra_vtep *zvtep) ++static int zebra_evpn_vtep_match(struct ipaddr *vtep_ip, struct zebra_vtep *zvtep) + { +- return (IPV4_ADDR_SAME(vtep_ip, &zvtep->vtep_ip)); ++ return ipaddr_is_same(vtep_ip, &zvtep->vtep_ip); + } + + /* + * Locate remote VTEP in EVPN hash table. + */ +-struct zebra_vtep *zebra_evpn_vtep_find(struct zebra_evpn *zevpn, +- struct in_addr *vtep_ip) ++struct zebra_vtep *zebra_evpn_vtep_find(struct zebra_evpn *zevpn, struct ipaddr *vtep_ip) + { + struct zebra_vtep *zvtep; + +@@ -1204,8 +1201,7 @@ struct zebra_vtep *zebra_evpn_vtep_find(struct zebra_evpn *zevpn, + /* + * Add remote VTEP to EVPN hash table. + */ +-struct zebra_vtep *zebra_evpn_vtep_add(struct zebra_evpn *zevpn, +- struct in_addr *vtep_ip, ++struct zebra_vtep *zebra_evpn_vtep_add(struct zebra_evpn *zevpn, struct ipaddr *vtep_ip, + int flood_control) + + { +@@ -1282,7 +1278,7 @@ int zebra_evpn_vtep_install(struct zebra_evpn *zevpn, struct zebra_vtep *zvtep) + /* + * Uninstall remote VTEP from the kernel. + */ +-int zebra_evpn_vtep_uninstall(struct zebra_evpn *zevpn, struct in_addr *vtep_ip) ++int zebra_evpn_vtep_uninstall(struct zebra_evpn *zevpn, struct ipaddr *vtep_ip) + { + if (!zevpn->vxlan_if) { + if (IS_ZEBRA_DEBUG_VXLAN) +@@ -1401,10 +1397,9 @@ static void zebra_evpn_process_sync_macip_add(struct zebra_evpn *zevpn, + + /************************** remote mac-ip handling **************************/ + /* Process a remote MACIP add from BGP. */ +-void zebra_evpn_rem_macip_add(vni_t vni, const struct ethaddr *macaddr, +- uint16_t ipa_len, const struct ipaddr *ipaddr, +- uint8_t flags, uint32_t seq, +- struct in_addr vtep_ip, const esi_t *esi) ++void zebra_evpn_rem_macip_add(vni_t vni, const struct ethaddr *macaddr, uint16_t ipa_len, ++ const struct ipaddr *ipaddr, uint8_t flags, uint32_t seq, ++ struct ipaddr *vtep_ip, const esi_t *esi) + { + struct zebra_evpn *zevpn; + struct zebra_vtep *zvtep; +@@ -1460,10 +1455,10 @@ void zebra_evpn_rem_macip_add(vni_t vni, const struct ethaddr *macaddr, + * possible that when peering comes up, peer may advertise MACIP + * routes before advertising type-3 routes. + */ +- if (vtep_ip.s_addr) { +- zvtep = zebra_evpn_vtep_find(zevpn, &vtep_ip); ++ if (!ipaddr_is_zero(vtep_ip)) { ++ zvtep = zebra_evpn_vtep_find(zevpn, vtep_ip); + if (!zvtep) { +- zvtep = zebra_evpn_vtep_add(zevpn, &vtep_ip, VXLAN_FLOOD_DISABLED); ++ zvtep = zebra_evpn_vtep_add(zevpn, vtep_ip, VXLAN_FLOOD_DISABLED); + if (!zvtep) { + flog_err( + EC_ZEBRA_VTEP_ADD_FAILED, +@@ -1504,9 +1499,8 @@ void zebra_evpn_rem_macip_add(vni_t vni, const struct ethaddr *macaddr, + } + + /* Process a remote MACIP delete from BGP. */ +-void zebra_evpn_rem_macip_del(vni_t vni, const struct ethaddr *macaddr, +- uint16_t ipa_len, const struct ipaddr *ipaddr, +- struct in_addr vtep_ip) ++void zebra_evpn_rem_macip_del(vni_t vni, const struct ethaddr *macaddr, uint16_t ipa_len, ++ const struct ipaddr *ipaddr, struct ipaddr *vtep_ip) + { + struct zebra_evpn *zevpn; + struct zebra_mac *mac = NULL; +diff --git a/zebra/zebra_evpn.h b/zebra/zebra_evpn.h +index 41532cdef..f5d079fb2 100644 +--- a/zebra/zebra_evpn.h ++++ b/zebra/zebra_evpn.h +@@ -43,8 +43,7 @@ struct zebra_evpn_show { + */ + struct zebra_vtep { + /* Remote IP. */ +- /* NOTE: Can only be IPv4 right now. */ +- struct in_addr vtep_ip; ++ struct ipaddr vtep_ip; + /* Flood mode (one of enum vxlan_flood_control) based on the PMSI + * tunnel type advertised by the remote VTEP + */ +@@ -92,7 +91,7 @@ struct zebra_evpn { + struct zebra_vtep *vteps; + + /* Local IP */ +- struct in_addr local_vtep_ip; ++ struct ipaddr local_vtep_ip; + + /* PIM-SM MDT group for BUM flooding */ + struct in_addr mcast_grp; +@@ -189,25 +188,20 @@ struct zebra_evpn *zebra_evpn_add(vni_t vni); + int zebra_evpn_del(struct zebra_evpn *zevpn); + int zebra_evpn_send_add_to_client(struct zebra_evpn *zevpn); + int zebra_evpn_send_del_to_client(struct zebra_evpn *zevpn); +-struct zebra_vtep *zebra_evpn_vtep_find(struct zebra_evpn *zevpn, +- struct in_addr *vtep_ip); +-struct zebra_vtep *zebra_evpn_vtep_add(struct zebra_evpn *zevpn, +- struct in_addr *vtep_ip, ++struct zebra_vtep *zebra_evpn_vtep_find(struct zebra_evpn *zevpn, struct ipaddr *vtep_ip); ++struct zebra_vtep *zebra_evpn_vtep_add(struct zebra_evpn *zevpn, struct ipaddr *vtep_ip, + int flood_control); + int zebra_evpn_vtep_del(struct zebra_evpn *zevpn, struct zebra_vtep *zvtep); + int zebra_evpn_vtep_del_all(struct zebra_evpn *zevpn, int uninstall); + int zebra_evpn_vtep_install(struct zebra_evpn *zevpn, struct zebra_vtep *zvtep); +-int zebra_evpn_vtep_uninstall(struct zebra_evpn *zevpn, +- struct in_addr *vtep_ip); ++int zebra_evpn_vtep_uninstall(struct zebra_evpn *zevpn, struct ipaddr *vtep_ip); + void zebra_evpn_handle_flooding_remote_vteps(struct hash_bucket *bucket, void *args[]); + void zebra_evpn_cleanup_all(struct hash_bucket *bucket, void *arg); +-void zebra_evpn_rem_macip_add(vni_t vni, const struct ethaddr *macaddr, +- uint16_t ipa_len, const struct ipaddr *ipaddr, +- uint8_t flags, uint32_t seq, +- struct in_addr vtep_ip, const esi_t *esi); +-void zebra_evpn_rem_macip_del(vni_t vni, const struct ethaddr *macaddr, +- uint16_t ipa_len, const struct ipaddr *ipaddr, +- struct in_addr vtep_ip); ++void zebra_evpn_rem_macip_add(vni_t vni, const struct ethaddr *macaddr, uint16_t ipa_len, ++ const struct ipaddr *ipaddr, uint8_t flags, uint32_t seq, ++ struct ipaddr *vtep_ip, const esi_t *esi); ++void zebra_evpn_rem_macip_del(vni_t vni, const struct ethaddr *macaddr, uint16_t ipa_len, ++ const struct ipaddr *ipaddr, struct ipaddr *vtep_ip); + void zebra_evpn_cfg_cleanup(struct hash_bucket *bucket, void *ctxt); + + #ifdef __cplusplus +diff --git a/zebra/zebra_evpn_mac.c b/zebra/zebra_evpn_mac.c +index f7a046f5e..cb7c13e19 100644 +--- a/zebra/zebra_evpn_mac.c ++++ b/zebra/zebra_evpn_mac.c +@@ -189,7 +189,7 @@ int zebra_evpn_rem_mac_install(struct zebra_evpn *zevpn, struct zebra_mac *mac, + const struct interface *br_ifp; + vlanid_t vid; + uint32_t nhg_id; +- struct in_addr vtep_ip; ++ struct ipaddr vtep_ip; + + zif = zevpn->vxlan_if->info; + if (!zif) +@@ -205,6 +205,7 @@ int zebra_evpn_rem_mac_install(struct zebra_evpn *zevpn, struct zebra_mac *mac, + + sticky = !!CHECK_FLAG(mac->flags, + (ZEBRA_MAC_STICKY | ZEBRA_MAC_REMOTE_DEF_GW)); ++ memset(&vtep_ip, 0, sizeof(vtep_ip)); + + /* If nexthop group for the FDB entry is inactive (not programmed in + * the dataplane) the MAC entry cannot be installed +@@ -213,7 +214,7 @@ int zebra_evpn_rem_mac_install(struct zebra_evpn *zevpn, struct zebra_mac *mac, + if (!(mac->es->flags & ZEBRA_EVPNES_NHG_ACTIVE)) + return -1; + nhg_id = mac->es->nhg_id; +- vtep_ip.s_addr = 0; ++ SET_IPADDR_NONE(&vtep_ip); + } else { + nhg_id = 0; + vtep_ip = mac->fwd_info.r_vtep_ip; +@@ -226,8 +227,8 @@ int zebra_evpn_rem_mac_install(struct zebra_evpn *zevpn, struct zebra_mac *mac, + else + vid = 0; + +- res = dplane_rem_mac_add(zevpn->vxlan_if, br_ifp, vid, &mac->macaddr, +- vni->vni, vtep_ip, sticky, nhg_id, was_static); ++ res = dplane_rem_mac_add(zevpn->vxlan_if, br_ifp, vid, &mac->macaddr, vni->vni, &vtep_ip, ++ sticky, nhg_id, was_static); + if (res != ZEBRA_DPLANE_REQUEST_FAILURE) + return 0; + else +@@ -242,7 +243,7 @@ int zebra_evpn_rem_mac_uninstall(struct zebra_evpn *zevpn, + { + const struct zebra_if *zif, *br_zif; + struct zebra_vxlan_vni *vni; +- struct in_addr vtep_ip; ++ struct ipaddr vtep_ip; + const struct interface *ifp, *br_ifp; + vlanid_t vid; + enum zebra_dplane_result res; +@@ -281,8 +282,7 @@ int zebra_evpn_rem_mac_uninstall(struct zebra_evpn *zevpn, + ifp = zevpn->vxlan_if; + vtep_ip = mac->fwd_info.r_vtep_ip; + +- res = dplane_rem_mac_del(ifp, br_ifp, vid, &mac->macaddr, vni->vni, +- vtep_ip); ++ res = dplane_rem_mac_del(ifp, br_ifp, vid, &mac->macaddr, vni->vni, &vtep_ip); + if (res != ZEBRA_DPLANE_REQUEST_FAILURE) + return 0; + else +@@ -451,11 +451,9 @@ static void zebra_evpn_dad_mac_auto_recovery_exp(struct event *t) + } + } + +-static void zebra_evpn_dup_addr_detect_for_mac(struct zebra_vrf *zvrf, +- struct zebra_mac *mac, +- struct in_addr vtep_ip, +- bool do_dad, bool *is_dup_detect, +- bool is_local) ++static void zebra_evpn_dup_addr_detect_for_mac(struct zebra_vrf *zvrf, struct zebra_mac *mac, ++ struct ipaddr *vtep_ip, bool do_dad, ++ bool *is_dup_detect, bool is_local) + { + struct zebra_neigh *nbr; + struct listnode *node = NULL; +@@ -540,11 +538,9 @@ static void zebra_evpn_dup_addr_detect_for_mac(struct zebra_vrf *zvrf, + + if (mac->dad_count >= zvrf->dad_max_moves) { + flog_warn(EC_ZEBRA_DUP_MAC_DETECTED, +- "VNI %u: MAC %pEA detected as duplicate during %s VTEP %pI4", ++ "VNI %u: MAC %pEA detected as duplicate during %s VTEP %pIA", + mac->zevpn->vni, &mac->macaddr, +- is_local ? "local update, last" +- : "remote update, from", +- &vtep_ip); ++ is_local ? "local update, last" : "remote update, from", vtep_ip); + + SET_FLAG(mac->flags, ZEBRA_MAC_DUPLICATE); + +@@ -646,8 +642,7 @@ void zebra_evpn_print_mac(struct zebra_mac *mac, void *ctxt, json_object *json) + json_object_string_add(json_mac, "remoteEs", + mac->es->esi_str); + else +- json_object_string_addf(json_mac, "remoteVtep", +- "%pI4", ++ json_object_string_addf(json_mac, "remoteVtep", "%pIA", + &mac->fwd_info.r_vtep_ip); + } else if (CHECK_FLAG(mac->flags, ZEBRA_MAC_AUTO)) + json_object_string_add(json_mac, "type", "auto"); +@@ -746,7 +741,7 @@ void zebra_evpn_print_mac(struct zebra_mac *mac, void *ctxt, json_object *json) + if (mac->es) + vty_out(vty, " Remote ES: %s", mac->es->esi_str); + else +- vty_out(vty, " Remote VTEP: %pI4", ++ vty_out(vty, " Remote VTEP: %pIA", + &mac->fwd_info.r_vtep_ip); + } else if (CHECK_FLAG(mac->flags, ZEBRA_MAC_AUTO)) { + vty_out(vty, " Auto Mac "); +@@ -899,7 +894,7 @@ void zebra_evpn_print_mac_hash(struct hash_bucket *bucket, void *ctxt) + + } else if (CHECK_FLAG(mac->flags, ZEBRA_MAC_REMOTE)) { + if (CHECK_FLAG(wctx->flags, SHOW_REMOTE_MAC_FROM_VTEP) && +- !IPV4_ADDR_SAME(&mac->fwd_info.r_vtep_ip, &wctx->r_vtep_ip)) ++ !ipaddr_is_same(&mac->fwd_info.r_vtep_ip, &wctx->r_vtep_ip)) + return; + + if (json_mac_hdr == NULL) { +@@ -912,8 +907,7 @@ void zebra_evpn_print_mac_hash(struct hash_bucket *bucket, void *ctxt) + "Seq #'s"); + } + if (mac->es == NULL) +- inet_ntop(AF_INET, &mac->fwd_info.r_vtep_ip, +- addr_buf, sizeof(addr_buf)); ++ ipaddr2str(&mac->fwd_info.r_vtep_ip, addr_buf, sizeof(addr_buf)); + + vty_out(vty, "%-17s %-6s %-5s %-30s %-5s %u/%u\n", buf1, + "remote", +@@ -929,8 +923,7 @@ void zebra_evpn_print_mac_hash(struct hash_bucket *bucket, void *ctxt) + json_object_string_add(json_mac, "remoteEs", + mac->es->esi_str); + else +- json_object_string_addf(json_mac, "remoteVtep", +- "%pI4", ++ json_object_string_addf(json_mac, "remoteVtep", "%pIA", + &mac->fwd_info.r_vtep_ip); + json_object_object_add(json_mac_hdr, buf1, json_mac); + json_object_int_add(json_mac, "localSequence", +@@ -1197,7 +1190,7 @@ static bool zebra_evpn_check_mac_del_from_db(struct mac_walk_ctx *wctx, + return true; + else if (CHECK_FLAG(wctx->flags, DEL_REMOTE_MAC_FROM_VTEP) && + CHECK_FLAG(mac->flags, ZEBRA_MAC_REMOTE) && +- IPV4_ADDR_SAME(&mac->fwd_info.r_vtep_ip, &wctx->r_vtep_ip)) ++ ipaddr_is_same(&mac->fwd_info.r_vtep_ip, &wctx->r_vtep_ip)) + return true; + else if (CHECK_FLAG(wctx->flags, DEL_LOCAL_MAC) && + CHECK_FLAG(mac->flags, ZEBRA_MAC_AUTO) && +@@ -1995,11 +1988,9 @@ void zebra_evpn_print_dad_mac_hash_detail(struct hash_bucket *bucket, void *ctxt + zebra_evpn_print_mac_hash_detail(bucket, ctxt); + } + +-int zebra_evpn_mac_remote_macip_add(struct zebra_evpn *zevpn, +- struct zebra_vrf *zvrf, +- const struct ethaddr *macaddr, +- struct in_addr vtep_ip, uint8_t flags, +- uint32_t seq, const esi_t *esi) ++int zebra_evpn_mac_remote_macip_add(struct zebra_evpn *zevpn, struct zebra_vrf *zvrf, ++ const struct ethaddr *macaddr, struct ipaddr *vtep_ip, ++ uint8_t flags, uint32_t seq, const esi_t *esi) + { + bool sticky; + bool remote_gw; +@@ -2035,7 +2026,7 @@ int zebra_evpn_mac_remote_macip_add(struct zebra_evpn *zevpn, + if (!mac || !CHECK_FLAG(mac->flags, ZEBRA_MAC_REMOTE) || + sticky != !!CHECK_FLAG(mac->flags, ZEBRA_MAC_STICKY) || + remote_gw != !!CHECK_FLAG(mac->flags, ZEBRA_MAC_REMOTE_DEF_GW) || +- !IPV4_ADDR_SAME(&mac->fwd_info.r_vtep_ip, &vtep_ip) || ++ !ipaddr_is_same(&mac->fwd_info.r_vtep_ip, vtep_ip) || + memcmp(old_esi, esi, sizeof(esi_t)) || seq != mac->rem_seq) + update_mac = 1; + +@@ -2110,7 +2101,7 @@ int zebra_evpn_mac_remote_macip_add(struct zebra_evpn *zevpn, + zebra_evpn_mac_clear_fwd_info(mac); + UNSET_FLAG(mac->flags, ZEBRA_MAC_ALL_LOCAL_FLAGS); + SET_FLAG(mac->flags, ZEBRA_MAC_REMOTE); +- mac->fwd_info.r_vtep_ip = vtep_ip; ++ mac->fwd_info.r_vtep_ip = *vtep_ip; + + if (sticky) + SET_FLAG(mac->flags, ZEBRA_MAC_STICKY); +@@ -2122,10 +2113,8 @@ int zebra_evpn_mac_remote_macip_add(struct zebra_evpn *zevpn, + else + UNSET_FLAG(mac->flags, ZEBRA_MAC_REMOTE_DEF_GW); + +- zebra_evpn_dup_addr_detect_for_mac(zvrf, mac, +- mac->fwd_info.r_vtep_ip, +- do_dad, &is_dup_detect, +- false); ++ zebra_evpn_dup_addr_detect_for_mac(zvrf, mac, &mac->fwd_info.r_vtep_ip, do_dad, ++ &is_dup_detect, false); + + if (!is_dup_detect) { + zebra_evpn_process_neigh_on_remote_mac_add(zevpn, mac); +@@ -2152,7 +2141,7 @@ int zebra_evpn_add_update_local_mac(struct zebra_vrf *zvrf, + bool inform_client = false; + bool upd_neigh = false; + bool is_dup_detect = false; +- struct in_addr vtep_ip = { .s_addr = 0 }; ++ struct ipaddr vtep_ip = { 0 }; + bool es_change = false; + bool new_bgp_ready; + /* assume inactive if not present or if not local */ +@@ -2273,7 +2262,7 @@ int zebra_evpn_add_update_local_mac(struct zebra_vrf *zvrf, + */ + if (CHECK_FLAG(mac->flags, ZEBRA_MAC_STICKY)) { + flog_warn(EC_ZEBRA_STICKY_MAC_ALREADY_LEARNT, +- "MAC %pEA already learnt as remote sticky MAC behind VTEP %pI4 VNI %u", ++ "MAC %pEA already learnt as remote sticky MAC behind VTEP %pIA VNI %u", + macaddr, &mac->fwd_info.r_vtep_ip, + zevpn->vni); + return 0; +@@ -2305,8 +2294,7 @@ int zebra_evpn_add_update_local_mac(struct zebra_vrf *zvrf, + inform_client = true; + upd_neigh = true; + +- zebra_evpn_dup_addr_detect_for_mac(zvrf, mac, vtep_ip, +- do_dad, ++ zebra_evpn_dup_addr_detect_for_mac(zvrf, mac, &vtep_ip, do_dad, + &is_dup_detect, true); + if (is_dup_detect) { + inform_client = false; +diff --git a/zebra/zebra_evpn_mac.h b/zebra/zebra_evpn_mac.h +index 0febcbbf6..d85423381 100644 +--- a/zebra/zebra_evpn_mac.h ++++ b/zebra/zebra_evpn_mac.h +@@ -84,7 +84,7 @@ struct zebra_mac { + vlanid_t vid; + } local; + +- struct in_addr r_vtep_ip; ++ struct ipaddr r_vtep_ip; + } fwd_info; + + /* Local or remote ES */ +@@ -148,7 +148,7 @@ struct mac_walk_ctx { + #define DEL_REMOTE_MAC_FROM_VTEP 0x4 + #define SHOW_REMOTE_MAC_FROM_VTEP 0x8 + +- struct in_addr r_vtep_ip; /* To walk MACs from specific VTEP */ ++ struct ipaddr r_vtep_ip; /* To walk MACs from specific VTEP */ + + struct vty *vty; /* Used by VTY handlers */ + uint32_t count; /* Used by VTY handlers */ +@@ -242,11 +242,9 @@ void zebra_evpn_rem_mac_del(struct zebra_evpn *zevi, struct zebra_mac *mac); + void zebra_evpn_print_dad_mac_hash(struct hash_bucket *bucket, void *ctxt); + void zebra_evpn_print_dad_mac_hash_detail(struct hash_bucket *bucket, + void *ctxt); +-int zebra_evpn_mac_remote_macip_add(struct zebra_evpn *zevpn, +- struct zebra_vrf *zvrf, +- const struct ethaddr *macaddr, +- struct in_addr vtep_ip, uint8_t flags, +- uint32_t seq, const esi_t *esi); ++int zebra_evpn_mac_remote_macip_add(struct zebra_evpn *zevpn, struct zebra_vrf *zvrf, ++ const struct ethaddr *macaddr, struct ipaddr *vtep_ip, ++ uint8_t flags, uint32_t seq, const esi_t *esi); + + int zebra_evpn_add_update_local_mac(struct zebra_vrf *zvrf, + struct zebra_evpn *zevpn, +diff --git a/zebra/zebra_evpn_mh.c b/zebra/zebra_evpn_mh.c +index ade4ba8c5..7d8e80cbc 100644 +--- a/zebra/zebra_evpn_mh.c ++++ b/zebra/zebra_evpn_mh.c +@@ -1240,7 +1240,12 @@ static unsigned int zebra_evpn_nh_ip_hash_keymake(const void *p) + { + const struct zebra_evpn_l2_nh *nh = p; + +- return jhash_1word(nh->vtep_ip.s_addr, 0); ++ if (IS_IPADDR_V4(&nh->vtep_ip)) { ++ return jhash_1word(nh->vtep_ip.ipaddr_v4.s_addr, 0); ++ } else { ++ return jhash2(nh->vtep_ip.ipaddr_v6.s6_addr32, ++ array_size(nh->vtep_ip.ipaddr_v6.s6_addr32), 0); ++ } + } + + static bool zebra_evpn_nh_ip_cmp(const void *p1, const void *p2) +@@ -1254,7 +1259,7 @@ static bool zebra_evpn_nh_ip_cmp(const void *p1, const void *p2) + if (nh1 == NULL || nh2 == NULL) + return false; + +- return (nh1->vtep_ip.s_addr == nh2->vtep_ip.s_addr); ++ return ipaddr_is_same(&nh1->vtep_ip, &nh2->vtep_ip); + } + + static unsigned int zebra_evpn_nhg_hash_keymake(const void *p) +@@ -1423,14 +1428,13 @@ static void zebra_evpn_es_l2_nh_show_entry(struct zebra_evpn_l2_nh *nh, + json_object *json = NULL; + + json = json_object_new_object(); +- json_object_string_addf(json, "vtep", "%pI4", &nh->vtep_ip); ++ json_object_string_addf(json, "vtep", "%pIA", &nh->vtep_ip); + json_object_int_add(json, "nhId", nh->nh_id); + json_object_int_add(json, "refCnt", nh->ref_cnt); + + json_object_array_add(json_array, json); + } else { +- vty_out(vty, "%-16pI4 %-10u %u\n", &nh->vtep_ip, nh->nh_id, +- nh->ref_cnt); ++ vty_out(vty, "%-16pIA %-10u %u\n", &nh->vtep_ip, nh->nh_id, nh->ref_cnt); + } + } + +@@ -1463,23 +1467,23 @@ void zebra_evpn_l2_nh_show(struct vty *vty, bool uj) + vty_json(vty, json_array); + } + +-static struct zebra_evpn_l2_nh *zebra_evpn_l2_nh_find(struct in_addr vtep_ip) ++static struct zebra_evpn_l2_nh *zebra_evpn_l2_nh_find(struct ipaddr *vtep_ip) + { + struct zebra_evpn_l2_nh *nh; + struct zebra_evpn_l2_nh tmp; + +- tmp.vtep_ip.s_addr = vtep_ip.s_addr; ++ tmp.vtep_ip = *vtep_ip; + nh = hash_lookup(zmh_info->nh_ip_table, &tmp); + + return nh; + } + +-static struct zebra_evpn_l2_nh *zebra_evpn_l2_nh_alloc(struct in_addr vtep_ip) ++static struct zebra_evpn_l2_nh *zebra_evpn_l2_nh_alloc(struct ipaddr *vtep_ip) + { + struct zebra_evpn_l2_nh *nh; + + nh = XCALLOC(MTYPE_L2_NH, sizeof(*nh)); +- nh->vtep_ip = vtep_ip; ++ nh->vtep_ip = *vtep_ip; + (void)hash_get(zmh_info->nh_ip_table, nh, hash_alloc_intern); + + nh->nh_id = zebra_evpn_nhid_alloc(NULL); +@@ -1490,7 +1494,7 @@ static struct zebra_evpn_l2_nh *zebra_evpn_l2_nh_alloc(struct in_addr vtep_ip) + } + + /* install the NH in the dataplane */ +- kernel_upd_mac_nh(nh->nh_id, nh->vtep_ip); ++ kernel_upd_mac_nh(nh->nh_id, &nh->vtep_ip); + + return nh; + } +@@ -1510,22 +1514,20 @@ static void zebra_evpn_l2_nh_es_vtep_ref(struct zebra_evpn_es_vtep *es_vtep) + if (es_vtep->nh) + return; + +- es_vtep->nh = zebra_evpn_l2_nh_find(es_vtep->vtep_ip); ++ es_vtep->nh = zebra_evpn_l2_nh_find(&es_vtep->vtep_ip); + if (!es_vtep->nh) +- es_vtep->nh = zebra_evpn_l2_nh_alloc(es_vtep->vtep_ip); ++ es_vtep->nh = zebra_evpn_l2_nh_alloc(&es_vtep->vtep_ip); + + if (!es_vtep->nh) { +- zlog_warn("es %s vtep %pI4 nh ref failed", es_vtep->es->esi_str, +- &es_vtep->vtep_ip); ++ zlog_warn("es %s vtep %pIA nh ref failed", es_vtep->es->esi_str, &es_vtep->vtep_ip); + return; + } + + ++es_vtep->nh->ref_cnt; + + if (IS_ZEBRA_DEBUG_EVPN_MH_NH) +- zlog_debug("es %s vtep %pI4 nh %u ref %u", es_vtep->es->esi_str, +- &es_vtep->vtep_ip, es_vtep->nh->nh_id, +- es_vtep->nh->ref_cnt); ++ zlog_debug("es %s vtep %pIA nh %u ref %u", es_vtep->es->esi_str, &es_vtep->vtep_ip, ++ es_vtep->nh->nh_id, es_vtep->nh->ref_cnt); + + /* add the NH to the parent NHG */ + zebra_evpn_nhg_update(es_vtep->es); +@@ -1543,9 +1545,8 @@ static void zebra_evpn_l2_nh_es_vtep_deref(struct zebra_evpn_es_vtep *es_vtep) + --nh->ref_cnt; + + if (IS_ZEBRA_DEBUG_EVPN_MH_NH) +- zlog_debug("es %s vtep %pI4 nh %u deref %u", +- es_vtep->es->esi_str, &es_vtep->vtep_ip, nh->nh_id, +- nh->ref_cnt); ++ zlog_debug("es %s vtep %pIA nh %u deref %u", es_vtep->es->esi_str, ++ &es_vtep->vtep_ip, nh->nh_id, nh->ref_cnt); + + /* remove the NH from the parent NHG */ + zebra_evpn_nhg_update(es_vtep->es); +@@ -1576,18 +1577,18 @@ static int zebra_evpn_es_vtep_cmp(void *p1, void *p2) + const struct zebra_evpn_es_vtep *es_vtep1 = p1; + const struct zebra_evpn_es_vtep *es_vtep2 = p2; + +- return es_vtep1->vtep_ip.s_addr - es_vtep2->vtep_ip.s_addr; ++ return ipaddr_cmp(&es_vtep1->vtep_ip, &es_vtep2->vtep_ip); + } + +-static struct zebra_evpn_es_vtep *zebra_evpn_es_vtep_new( +- struct zebra_evpn_es *es, struct in_addr vtep_ip) ++static struct zebra_evpn_es_vtep *zebra_evpn_es_vtep_new(struct zebra_evpn_es *es, ++ struct ipaddr *vtep_ip) + { + struct zebra_evpn_es_vtep *es_vtep; + + es_vtep = XCALLOC(MTYPE_ZES_VTEP, sizeof(*es_vtep)); + + es_vtep->es = es; +- es_vtep->vtep_ip.s_addr = vtep_ip.s_addr; ++ es_vtep->vtep_ip = *vtep_ip; + listnode_init(&es_vtep->es_listnode, es_vtep); + listnode_add_sort(es->es_vtep_list, &es_vtep->es_listnode); + +@@ -1606,14 +1607,14 @@ static void zebra_evpn_es_vtep_free(struct zebra_evpn_es_vtep *es_vtep) + + + /* check if VTEP is already part of the list */ +-static struct zebra_evpn_es_vtep *zebra_evpn_es_vtep_find( +- struct zebra_evpn_es *es, struct in_addr vtep_ip) ++static struct zebra_evpn_es_vtep *zebra_evpn_es_vtep_find(struct zebra_evpn_es *es, ++ struct ipaddr *vtep_ip) + { + struct listnode *node = NULL; + struct zebra_evpn_es_vtep *es_vtep; + + for (ALL_LIST_ELEMENTS_RO(es->es_vtep_list, node, es_vtep)) { +- if (es_vtep->vtep_ip.s_addr == vtep_ip.s_addr) ++ if (ipaddr_is_same(&es_vtep->vtep_ip, vtep_ip)) + return es_vtep; + } + return NULL; +@@ -1622,7 +1623,7 @@ static struct zebra_evpn_es_vtep *zebra_evpn_es_vtep_find( + /* flush all the dataplane br-port info associated with the ES */ + static bool zebra_evpn_es_br_port_dplane_clear(struct zebra_evpn_es *es) + { +- struct in_addr sph_filters[ES_VTEP_MAX_CNT]; ++ struct ipaddr sph_filters[ES_VTEP_MAX_CNT]; + + if (!(es->flags & ZEBRA_EVPNES_BR_PORT)) + return false; +@@ -1649,7 +1650,7 @@ static bool zebra_evpn_es_br_port_dplane_update(struct zebra_evpn_es *es, + const char *caller) + { + uint32_t backup_nhg_id; +- struct in_addr sph_filters[ES_VTEP_MAX_CNT]; ++ struct ipaddr sph_filters[ES_VTEP_MAX_CNT]; + struct listnode *node = NULL; + struct zebra_evpn_es_vtep *es_vtep; + uint32_t sph_filter_cnt = 0; +@@ -1734,9 +1735,8 @@ static bool zebra_evpn_es_run_df_election(struct zebra_evpn_es *es, + /* If the ES is not ready (i.e. not completely configured) there + * is no need to setup the BUM block filter + */ +- if (!(es->flags & ZEBRA_EVPNES_LOCAL) +- || (es->flags & ZEBRA_EVPNES_BYPASS) +- || !zmh_info->es_originator_ip.s_addr) ++ if (!(es->flags & ZEBRA_EVPNES_LOCAL) || (es->flags & ZEBRA_EVPNES_BYPASS) || ++ ipaddr_is_zero(&zmh_info->es_originator_ip)) + return zebra_evpn_es_df_change(es, new_non_df, caller, + "not-ready"); + +@@ -1780,10 +1780,9 @@ static bool zebra_evpn_es_run_df_election(struct zebra_evpn_es *es, + * the peer-VTEP has higher preference (or) + * the pref is the same but peer's IP address is lower + */ +- if ((es_vtep->df_pref > es->df_pref) +- || ((es_vtep->df_pref == es->df_pref) +- && (es_vtep->vtep_ip.s_addr +- < zmh_info->es_originator_ip.s_addr))) { ++ if ((es_vtep->df_pref > es->df_pref) || ++ ((es_vtep->df_pref == es->df_pref) && ++ (ipaddr_cmp(&es_vtep->vtep_ip, &zmh_info->es_originator_ip) < 0))) { + new_non_df = true; + break; + } +@@ -1792,8 +1791,7 @@ static bool zebra_evpn_es_run_df_election(struct zebra_evpn_es *es, + return zebra_evpn_es_df_change(es, new_non_df, caller, "elected"); + } + +-static void zebra_evpn_es_vtep_add(struct zebra_evpn_es *es, +- struct in_addr vtep_ip, bool esr_rxed, ++static void zebra_evpn_es_vtep_add(struct zebra_evpn_es *es, struct ipaddr *vtep_ip, bool esr_rxed, + uint8_t df_alg, uint16_t df_pref) + { + struct zebra_evpn_es_vtep *es_vtep; +@@ -1804,8 +1802,7 @@ static void zebra_evpn_es_vtep_add(struct zebra_evpn_es *es, + + if (!es_vtep) { + if (IS_ZEBRA_DEBUG_EVPN_MH_ES) +- zlog_debug("es %s vtep %pI4 add", +- es->esi_str, &vtep_ip); ++ zlog_debug("es %s vtep %pIA add", es->esi_str, vtep_ip); + es_vtep = zebra_evpn_es_vtep_new(es, vtep_ip); + /* update the L2-NHG associated with the ES */ + zebra_evpn_l2_nh_es_vtep_ref(es_vtep); +@@ -1830,8 +1827,7 @@ static void zebra_evpn_es_vtep_add(struct zebra_evpn_es *es, + zebra_evpn_es_br_port_dplane_update(es, __func__); + } + +-static void zebra_evpn_es_vtep_del(struct zebra_evpn_es *es, +- struct in_addr vtep_ip) ++static void zebra_evpn_es_vtep_del(struct zebra_evpn_es *es, struct ipaddr *vtep_ip) + { + struct zebra_evpn_es_vtep *es_vtep; + bool dplane_updated = false; +@@ -1840,8 +1836,7 @@ static void zebra_evpn_es_vtep_del(struct zebra_evpn_es *es, + + if (es_vtep) { + if (IS_ZEBRA_DEBUG_EVPN_MH_ES) +- zlog_debug("es %s vtep %pI4 del", +- es->esi_str, &vtep_ip); ++ zlog_debug("es %s vtep %pIA del", es->esi_str, vtep_ip); + es_vtep->flags |= ZEBRA_EVPNES_VTEP_DEL_IN_PROG; + if (es_vtep->flags & ZEBRA_EVPNES_VTEP_RXED_ESR) { + es_vtep->flags &= ~ZEBRA_EVPNES_VTEP_RXED_ESR; +@@ -1969,7 +1964,8 @@ static int zebra_evpn_es_send_add_to_client(struct zebra_evpn_es *es) + + zclient_create_header(s, ZEBRA_LOCAL_ES_ADD, zebra_vrf_get_evpn_id()); + stream_put(s, &es->esi, sizeof(esi_t)); +- stream_put_ipv4(s, zmh_info->es_originator_ip.s_addr); ++ /* TODO_V6_VTEP FIXME v6 support */ ++ stream_put_ipv4(s, zmh_info->es_originator_ip.ipaddr_v4.s_addr); + oper_up = !!(es->flags & ZEBRA_EVPNES_OPER_UP); + stream_putc(s, oper_up); + stream_putw(s, es->df_pref); +@@ -1981,7 +1977,7 @@ static int zebra_evpn_es_send_add_to_client(struct zebra_evpn_es *es) + + if (IS_ZEBRA_DEBUG_EVPN_MH_ES) + zlog_debug( +- "send add local es %s %pI4 active %u df_pref %u%s to %s", ++ "send add local es %s %pIA active %u df_pref %u%s to %s", + es->esi_str, &zmh_info->es_originator_ip, oper_up, + es->df_pref, bypass ? " bypass" : "", + zebra_route_string(client->proto)); +@@ -2028,8 +2024,7 @@ static void zebra_evpn_es_re_eval_send_to_client(struct zebra_evpn_es *es, + + old_ready = !!(es->flags & ZEBRA_EVPNES_READY_FOR_BGP); + +- if ((es->flags & ZEBRA_EVPNES_LOCAL) && +- zmh_info->es_originator_ip.s_addr) ++ if ((es->flags & ZEBRA_EVPNES_LOCAL) && !ipaddr_is_zero(&zmh_info->es_originator_ip)) + es->flags |= ZEBRA_EVPNES_READY_FOR_BGP; + else + es->flags &= ~ZEBRA_EVPNES_READY_FOR_BGP; +@@ -2495,19 +2490,18 @@ static void zebra_evpn_local_es_update(struct zebra_if *zif) + zebra_evpn_es_local_info_set(es, zif); + } + +-int zebra_evpn_remote_es_del(const esi_t *esi, struct in_addr vtep_ip) ++int zebra_evpn_remote_es_del(const esi_t *esi, struct ipaddr *vtep_ip) + { + char buf[ESI_STR_LEN]; + struct zebra_evpn_es *es; + + if (IS_ZEBRA_DEBUG_EVPN_MH_ES) +- zlog_debug("remote es %s vtep %pI4 del", +- esi_to_str(esi, buf, sizeof(buf)), &vtep_ip); ++ zlog_debug("remote es %s vtep %pIA del", esi_to_str(esi, buf, sizeof(buf)), vtep_ip); + + es = zebra_evpn_es_find(esi); + if (!es) { +- zlog_warn("remote es %s vtep %pI4 del failed, es missing", +- esi_to_str(esi, buf, sizeof(buf)), &vtep_ip); ++ zlog_warn("remote es %s vtep %pIA del failed, es missing", ++ esi_to_str(esi, buf, sizeof(buf)), vtep_ip); + return -1; + } + +@@ -2527,42 +2521,36 @@ static void zebra_evpn_remote_es_flush(struct zebra_evpn_es **esp) + + for (ALL_LIST_ELEMENTS(es->es_vtep_list, node, nnode, es_vtep)) { + if (IS_ZEBRA_DEBUG_EVPN_MH_ES) +- zlog_debug("es %s vtep %pI4 flush", +- es->esi_str, +- &es_vtep->vtep_ip); ++ zlog_debug("es %s vtep %pIA flush", es->esi_str, &es_vtep->vtep_ip); + zebra_evpn_es_vtep_free(es_vtep); + } + zebra_evpn_es_remote_info_re_eval(esp); + } + +-int zebra_evpn_remote_es_add(const esi_t *esi, struct in_addr vtep_ip, +- bool esr_rxed, uint8_t df_alg, uint16_t df_pref) ++int zebra_evpn_remote_es_add(const esi_t *esi, struct ipaddr *vtep_ip, bool esr_rxed, ++ uint8_t df_alg, uint16_t df_pref) + { + char buf[ESI_STR_LEN]; + struct zebra_evpn_es *es; + + if (IS_ZEBRA_DEBUG_EVPN_MH_ES) +- zlog_debug("remote es %s vtep %pI4 add %s df_alg %d df_pref %d", +- esi_to_str(esi, buf, sizeof(buf)), +- &vtep_ip, esr_rxed ? "esr" : "", df_alg, +- df_pref); ++ zlog_debug("remote es %s vtep %pIA add %s df_alg %d df_pref %d", ++ esi_to_str(esi, buf, sizeof(buf)), vtep_ip, esr_rxed ? "esr" : "", ++ df_alg, df_pref); + + es = zebra_evpn_es_find(esi); + if (!es) { + es = zebra_evpn_es_new(esi); + if (!es) { +- zlog_warn( +- "remote es %s vtep %pI4 add failed, es missing", +- esi_to_str(esi, buf, sizeof(buf)), &vtep_ip); ++ zlog_warn("remote es %s vtep %pIA add failed, es missing", ++ esi_to_str(esi, buf, sizeof(buf)), vtep_ip); + return -1; + } + } + + if (df_alg != EVPN_MH_DF_ALG_PREF) +- zlog_warn( +- "remote es %s vtep %pI4 add %s with unsupported df_alg %d", +- esi_to_str(esi, buf, sizeof(buf)), &vtep_ip, +- esr_rxed ? "esr" : "", df_alg); ++ zlog_warn("remote es %s vtep %pIA add %s with unsupported df_alg %d", ++ esi_to_str(esi, buf, sizeof(buf)), vtep_ip, esr_rxed ? "esr" : "", df_alg); + + zebra_evpn_es_vtep_add(es, vtep_ip, esr_rxed, df_alg, df_pref); + zebra_evpn_es_remote_info_re_eval(&es); +@@ -2573,7 +2561,7 @@ int zebra_evpn_remote_es_add(const esi_t *esi, struct in_addr vtep_ip, + void zebra_evpn_proc_remote_es(ZAPI_HANDLER_ARGS) + { + struct stream *s; +- struct in_addr vtep_ip; ++ struct ipaddr vtep_ip; + esi_t esi; + + if (!is_evpn_enabled()) { +@@ -2587,7 +2575,9 @@ void zebra_evpn_proc_remote_es(ZAPI_HANDLER_ARGS) + s = msg; + + STREAM_GET(&esi, s, sizeof(esi_t)); +- STREAM_GET(&vtep_ip.s_addr, s, sizeof(vtep_ip.s_addr)); ++ /* Temporary until BGP supports IPv6 VTEP */ ++ SET_IPADDR_V4(&vtep_ip); ++ STREAM_GET(&vtep_ip.ipaddr_v4.s_addr, s, sizeof(vtep_ip.ipaddr_v4.s_addr)); + + if (hdr->command == ZEBRA_REMOTE_ES_VTEP_ADD) { + uint32_t zapi_flags; +@@ -3049,14 +3039,14 @@ static char *zebra_evpn_es_vtep_str(char *vtep_str, struct zebra_evpn_es *es, + if (first) { + first = false; + strlcat(vtep_str, +- inet_ntop(AF_INET, &zvtep->vtep_ip, ip_buf, +- sizeof(ip_buf)), ++ inet_ntop(ipaddr_family(&zvtep->vtep_ip), &zvtep->vtep_ip.ip.addr, ++ ip_buf, sizeof(ip_buf)), + vtep_str_size); + } else { + strlcat(vtep_str, ",", vtep_str_size); + strlcat(vtep_str, +- inet_ntop(AF_INET, &zvtep->vtep_ip, ip_buf, +- sizeof(ip_buf)), ++ inet_ntop(ipaddr_family(&zvtep->vtep_ip), &zvtep->vtep_ip.ip.addr, ++ ip_buf, sizeof(ip_buf)), + vtep_str_size); + } + } +@@ -3073,8 +3063,7 @@ static void zebra_evpn_es_json_vtep_fill(struct zebra_evpn_es *es, + + for (ALL_LIST_ELEMENTS_RO(es->es_vtep_list, node, es_vtep)) { + json_vtep_entry = json_object_new_object(); +- json_object_string_addf(json_vtep_entry, "vtep", "%pI4", +- &es_vtep->vtep_ip); ++ json_object_string_addf(json_vtep_entry, "vtep", "%pIA", &es_vtep->vtep_ip); + if (es_vtep->flags & ZEBRA_EVPNES_VTEP_RXED_ESR) { + json_object_string_add( + json_vtep_entry, "dfAlgorithm", +@@ -3253,8 +3242,7 @@ static void zebra_evpn_es_show_entry_detail(struct vty *vty, + vty_out(vty, " Nexthop group: %u\n", es->nhg_id); + vty_out(vty, " VTEPs:\n"); + for (ALL_LIST_ELEMENTS_RO(es->es_vtep_list, node, es_vtep)) { +- vty_out(vty, " %pI4", +- &es_vtep->vtep_ip); ++ vty_out(vty, " %pIA", &es_vtep->vtep_ip); + if (es_vtep->flags & ZEBRA_EVPNES_VTEP_RXED_ESR) + vty_out(vty, " df_alg: %s df_pref: %d", + evpn_es_df_alg2str(es_vtep->df_alg, +@@ -3422,16 +3410,13 @@ void zebra_evpn_es_set_base_evpn(struct zebra_evpn *zevpn) + } + + /* update local VTEP-IP */ +- if (zmh_info->es_originator_ip.s_addr == +- zmh_info->es_base_evpn->local_vtep_ip.s_addr) ++ if (ipaddr_is_same(&zmh_info->es_originator_ip, &zmh_info->es_base_evpn->local_vtep_ip)) + return; + +- zmh_info->es_originator_ip.s_addr = +- zmh_info->es_base_evpn->local_vtep_ip.s_addr; ++ zmh_info->es_originator_ip = zmh_info->es_base_evpn->local_vtep_ip; + + if (IS_ZEBRA_DEBUG_EVPN_MH_ES) +- zlog_debug("es originator ip set to %pI4", +- &zmh_info->es_base_evpn->local_vtep_ip); ++ zlog_debug("es originator ip set to %pIA", &zmh_info->es_base_evpn->local_vtep_ip); + + /* if originator ip changes we need to update bgp */ + for (ALL_LIST_ELEMENTS_RO(zmh_info->local_es_list, node, es)) { +@@ -3461,11 +3446,12 @@ void zebra_evpn_es_clear_base_evpn(struct zebra_evpn *zevpn) + zebra_evpn_es_get_one_base_evpn(); + + /* couldn't locate an eligible base evpn */ +- if (!zmh_info->es_base_evpn && zmh_info->es_originator_ip.s_addr) { ++ if (!zmh_info->es_base_evpn && !ipaddr_is_zero(&zmh_info->es_originator_ip)) { + if (IS_ZEBRA_DEBUG_EVPN_MH_ES) + zlog_debug("es originator ip cleared"); + +- zmh_info->es_originator_ip.s_addr = 0; ++ memset(&zmh_info->es_originator_ip, 0, sizeof(struct ipaddr)); ++ SET_IPADDR_V4(&zmh_info->es_originator_ip); + /* lost originator ip */ + for (ALL_LIST_ELEMENTS_RO(zmh_info->local_es_list, node, es)) { + zebra_evpn_es_re_eval_send_to_client(es, +@@ -3806,7 +3792,7 @@ void zebra_evpn_proc_remote_nh(ZAPI_HANDLER_ARGS) + memset(&dummy_prefix, 0, sizeof(dummy_prefix)); + dummy_prefix.family = AF_EVPN; + dummy_prefix.prefixlen = (sizeof(struct evpn_addr) * 8); +- dummy_prefix.prefix.route_type = BGP_EVPN_AD_ROUTE; /* XXX - fixup to type-1 def */ ++ dummy_prefix.prefix.route_type = BGP_EVPN_AD_ROUTE; + dummy_prefix.prefix.ead_addr.ip.ipa_type = nh.ipa_type; + + if (hdr->command == ZEBRA_EVPN_REMOTE_NH_ADD) { +diff --git a/zebra/zebra_evpn_mh.h b/zebra/zebra_evpn_mh.h +index cd9d79b93..11282aa1f 100644 +--- a/zebra/zebra_evpn_mh.h ++++ b/zebra/zebra_evpn_mh.h +@@ -127,7 +127,7 @@ struct zebra_evpn_es_evi { + * nexthop + */ + struct zebra_evpn_l2_nh { +- struct in_addr vtep_ip; ++ struct ipaddr vtep_ip; + + /* MAC nexthop id */ + uint32_t nh_id; +@@ -139,7 +139,7 @@ struct zebra_evpn_l2_nh { + /* PE attached to an ES */ + struct zebra_evpn_es_vtep { + struct zebra_evpn_es *es; /* parent ES */ +- struct in_addr vtep_ip; ++ struct ipaddr vtep_ip; + + uint32_t flags; + /* Rxed Type-4 route from this VTEP */ +@@ -217,7 +217,7 @@ struct zebra_evpn_mh_info { + * not be necessary + */ + struct zebra_evpn *es_base_evpn; +- struct in_addr es_originator_ip; ++ struct ipaddr es_originator_ip; + + /* L2 NH and NHG ids - + * Most significant 4 bits is type. Lower 28 bits is the value +@@ -324,9 +324,9 @@ extern void zebra_evpn_es_show_detail(struct vty *vty, bool uj); + extern void zebra_evpn_es_show_esi(struct vty *vty, bool uj, esi_t *esi); + extern void zebra_evpn_update_all_es(struct zebra_evpn *zevpn); + extern void zebra_evpn_proc_remote_es(ZAPI_HANDLER_ARGS); +-int zebra_evpn_remote_es_add(const esi_t *esi, struct in_addr vtep_ip, +- bool esr_rxed, uint8_t df_alg, uint16_t df_pref); +-int zebra_evpn_remote_es_del(const esi_t *esi, struct in_addr vtep_ip); ++int zebra_evpn_remote_es_add(const esi_t *esi, struct ipaddr *vtep_ip, bool esr_rxed, ++ uint8_t df_alg, uint16_t df_pref); ++int zebra_evpn_remote_es_del(const esi_t *esi, struct ipaddr *vtep_ip); + extern void zebra_evpn_es_evi_show(struct vty *vty, bool uj, int detail); + extern void zebra_evpn_es_evi_show_vni(struct vty *vty, bool uj, + vni_t vni, int detail); +diff --git a/zebra/zebra_evpn_neigh.c b/zebra/zebra_evpn_neigh.c +index 7b4bcee80..961b1a5d9 100644 +--- a/zebra/zebra_evpn_neigh.c ++++ b/zebra/zebra_evpn_neigh.c +@@ -118,6 +118,11 @@ void zebra_evpn_find_neigh_addr_width(struct hash_bucket *bucket, void *ctxt) + width = strlen(buf); + if (width > wctx->addr_width) + wctx->addr_width = width; ++ ++ ipaddr2str(&n->r_vtep_ip, buf, sizeof(buf)); ++ width = strlen(buf); ++ if (width > wctx->r_vtep_width) ++ wctx->r_vtep_width = width; + } + + /* +@@ -728,7 +733,7 @@ struct zebra_neigh *zebra_evpn_proc_sync_neigh_update( + } + /* clear old fwd info */ + n->rem_seq = 0; +- n->r_vtep_ip.s_addr = 0; ++ memset(&n->r_vtep_ip.ip.addr, 0, sizeof(n->r_vtep_ip.ip)); + + /* setup new flags */ + n->flags = 0; +@@ -884,12 +889,10 @@ static void zebra_evpn_neigh_del_hash_entry(struct hash_bucket *bucket, + struct neigh_walk_ctx *wctx = arg; + struct zebra_neigh *n = bucket->data; + +- if (((wctx->flags & DEL_LOCAL_NEIGH) && (n->flags & ZEBRA_NEIGH_LOCAL)) +- || ((wctx->flags & DEL_REMOTE_NEIGH) +- && (n->flags & ZEBRA_NEIGH_REMOTE)) +- || ((wctx->flags & DEL_REMOTE_NEIGH_FROM_VTEP) +- && (n->flags & ZEBRA_NEIGH_REMOTE) +- && IPV4_ADDR_SAME(&n->r_vtep_ip, &wctx->r_vtep_ip))) { ++ if (((wctx->flags & DEL_LOCAL_NEIGH) && (n->flags & ZEBRA_NEIGH_LOCAL)) || ++ ((wctx->flags & DEL_REMOTE_NEIGH) && (n->flags & ZEBRA_NEIGH_REMOTE)) || ++ ((wctx->flags & DEL_REMOTE_NEIGH_FROM_VTEP) && (n->flags & ZEBRA_NEIGH_REMOTE) && ++ ipaddr_is_same(&n->r_vtep_ip, &wctx->r_vtep_ip))) { + if (wctx->upd_client && (n->flags & ZEBRA_NEIGH_LOCAL)) + zebra_evpn_neigh_send_del_to_client( + wctx->zevpn->vni, &n->ip, &n->emac, n->flags, +@@ -1171,9 +1174,9 @@ static void zebra_evpn_dad_ip_auto_recovery_exp(struct event *t) + } + } + +-static void zebra_evpn_dup_addr_detect_for_neigh( +- struct zebra_vrf *zvrf, struct zebra_neigh *nbr, struct in_addr vtep_ip, +- bool do_dad, bool *is_dup_detect, bool is_local) ++static void zebra_evpn_dup_addr_detect_for_neigh(struct zebra_vrf *zvrf, struct zebra_neigh *nbr, ++ struct ipaddr *vtep_ip, bool do_dad, ++ bool *is_dup_detect, bool is_local) + { + + struct timeval elapsed = {0, 0}; +@@ -1256,12 +1259,10 @@ static void zebra_evpn_dup_addr_detect_for_neigh( + nbr->dad_count++; + + if (nbr->dad_count >= zvrf->dad_max_moves) { +- flog_warn( +- EC_ZEBRA_DUP_IP_DETECTED, +- "VNI %u: MAC %pEA IP %pIA detected as duplicate during %s VTEP %pI4", +- nbr->zevpn->vni, &nbr->emac, &nbr->ip, +- is_local ? "local update, last" : "remote update, from", +- &vtep_ip); ++ flog_warn(EC_ZEBRA_DUP_IP_DETECTED, ++ "VNI %u: MAC %pEA IP %pIA detected as duplicate during %s VTEP %pIA", ++ nbr->zevpn->vni, &nbr->emac, &nbr->ip, ++ is_local ? "local update, last" : "remote update, from", vtep_ip); + + SET_FLAG(nbr->flags, ZEBRA_NEIGH_DUPLICATE); + +@@ -1302,7 +1303,7 @@ int zebra_evpn_local_neigh_update(struct zebra_evpn *zevpn, + bool neigh_on_hold = false; + bool neigh_was_remote = false; + bool do_dad = false; +- struct in_addr vtep_ip = {.s_addr = 0}; ++ struct ipaddr vtep_ip = { 0 }; + bool inform_dataplane = false; + bool created = false; + bool new_static = false; +@@ -1508,7 +1509,7 @@ int zebra_evpn_local_neigh_update(struct zebra_evpn *zevpn, + vtep_ip = n->r_vtep_ip; + /* Mark appropriately */ + UNSET_FLAG(n->flags, ZEBRA_NEIGH_REMOTE); +- n->r_vtep_ip.s_addr = INADDR_ANY; ++ memset(&n->r_vtep_ip.ip.addr, 0, sizeof(n->r_vtep_ip.ip)); + SET_FLAG(n->flags, ZEBRA_NEIGH_LOCAL); + n->ifindex = ifp->ifindex; + } +@@ -1563,8 +1564,7 @@ int zebra_evpn_local_neigh_update(struct zebra_evpn *zevpn, + if (neigh_mac_change && neigh_was_remote) + do_dad = true; + +- zebra_evpn_dup_addr_detect_for_neigh(zvrf, n, vtep_ip, do_dad, +- &neigh_on_hold, true); ++ zebra_evpn_dup_addr_detect_for_neigh(zvrf, n, &vtep_ip, do_dad, &neigh_on_hold, true); + + if (inform_dataplane) + zebra_evpn_sync_neigh_dp_install(n, false /* set_inactive */, +@@ -1835,11 +1835,9 @@ void zebra_evpn_print_neigh(struct zebra_neigh *n, void *ctxt, + n->mac->es->esi_str); + } else { + if (json) +- json_object_string_addf(json, "remoteVtep", +- "%pI4", &n->r_vtep_ip); ++ json_object_string_addf(json, "remoteVtep", "%pIA", &n->r_vtep_ip); + else +- vty_out(vty, " Remote VTEP: %pI4\n", +- &n->r_vtep_ip); ++ vty_out(vty, " Remote VTEP: %pIA\n", &n->r_vtep_ip); + } + } + if (CHECK_FLAG(n->flags, ZEBRA_NEIGH_DEF_GW)) { +@@ -1891,9 +1889,8 @@ void zebra_evpn_print_neigh(struct zebra_neigh *n, void *ctxt, + void zebra_evpn_print_neigh_hdr(struct vty *vty, struct neigh_walk_ctx *wctx) + { + vty_out(vty, "Flags: I=local-inactive, P=peer-active, X=peer-proxy\n"); +- vty_out(vty, "%*s %-6s %-5s %-8s %-17s %-30s %s\n", -wctx->addr_width, +- "Neighbor", "Type", "Flags", "State", "MAC", "Remote ES/VTEP", +- "Seq #'s"); ++ vty_out(vty, "%*s %-6s %-5s %-8s %-17s %*s %s\n", -wctx->addr_width, "Neighbor", "Type", ++ "Flags", "State", "MAC", -wctx->r_vtep_width, "Remote ES/VTEP", "Seq #'s"); + } + + static char *zebra_evpn_print_neigh_flags(struct zebra_neigh *n, +@@ -1921,7 +1918,7 @@ void zebra_evpn_print_neigh_hash(struct hash_bucket *bucket, void *ctxt) + struct zebra_neigh *n; + char buf1[ETHER_ADDR_STRLEN]; + char buf2[INET6_ADDRSTRLEN]; +- char addr_buf[PREFIX_STRLEN]; ++ char addr_buf[INET6_ADDRSTRLEN]; + struct neigh_walk_ctx *wctx = ctxt; + const char *state_str; + char flags_buf[6]; +@@ -1938,11 +1935,10 @@ void zebra_evpn_print_neigh_hash(struct hash_bucket *bucket, void *ctxt) + return; + + if (json_evpn == NULL) { +- vty_out(vty, "%*s %-6s %-5s %-8s %-17s %-30s %u/%u\n", +- -wctx->addr_width, buf2, "local", +- zebra_evpn_print_neigh_flags(n, flags_buf, +- sizeof(flags_buf)), state_str, buf1, +- "", n->loc_seq, n->rem_seq); ++ vty_out(vty, "%*s %-6s %-5s %-8s %-17s %*s %u/%u\n", -wctx->addr_width, ++ buf2, "local", ++ zebra_evpn_print_neigh_flags(n, flags_buf, sizeof(flags_buf)), ++ state_str, buf1, -wctx->r_vtep_width, "", n->loc_seq, n->rem_seq); + } else { + json_row = json_object_new_object(); + +@@ -1967,8 +1963,8 @@ void zebra_evpn_print_neigh_hash(struct hash_bucket *bucket, void *ctxt) + } + wctx->count++; + } else if (CHECK_FLAG(n->flags, ZEBRA_NEIGH_REMOTE)) { +- if ((wctx->flags & SHOW_REMOTE_NEIGH_FROM_VTEP) +- && !IPV4_ADDR_SAME(&n->r_vtep_ip, &wctx->r_vtep_ip)) ++ if ((wctx->flags & SHOW_REMOTE_NEIGH_FROM_VTEP) && ++ !ipaddr_is_same(&n->r_vtep_ip, &wctx->r_vtep_ip)) + return; + + if (json_evpn == NULL) { +@@ -1977,15 +1973,13 @@ void zebra_evpn_print_neigh_hash(struct hash_bucket *bucket, void *ctxt) + zebra_evpn_print_neigh_hdr(vty, wctx); + + if (n->mac->es == NULL) +- inet_ntop(AF_INET, &n->r_vtep_ip, +- addr_buf, sizeof(addr_buf)); +- +- vty_out(vty, "%*s %-6s %-5s %-8s %-17s %-30s %u/%u\n", +- -wctx->addr_width, buf2, "remote", +- zebra_evpn_print_neigh_flags(n, flags_buf, +- sizeof(flags_buf)), state_str, buf1, +- n->mac->es ? n->mac->es->esi_str : addr_buf, +- n->loc_seq, n->rem_seq); ++ ipaddr2str(&n->r_vtep_ip, addr_buf, sizeof(addr_buf)); ++ ++ vty_out(vty, "%*s %-6s %-5s %-8s %-17s %*s %u/%u\n", -wctx->addr_width, ++ buf2, "remote", ++ zebra_evpn_print_neigh_flags(n, flags_buf, sizeof(flags_buf)), ++ state_str, buf1, -wctx->r_vtep_width, ++ n->mac->es ? n->mac->es->esi_str : addr_buf, n->loc_seq, n->rem_seq); + } else { + json_row = json_object_new_object(); + +@@ -1996,8 +1990,8 @@ void zebra_evpn_print_neigh_hash(struct hash_bucket *bucket, void *ctxt) + json_object_string_add(json_row, "remoteEs", + n->mac->es->esi_str); + else +- json_object_string_addf(json_row, "remoteVtep", +- "%pI4", &n->r_vtep_ip); ++ json_object_string_addf(json_row, "remoteVtep", "%pIA", ++ &n->r_vtep_ip); + if (CHECK_FLAG(n->flags, ZEBRA_NEIGH_DEF_GW)) + json_object_boolean_true_add(json_row, + "defaultGateway"); +@@ -2073,12 +2067,9 @@ void zebra_evpn_print_dad_neigh_hash_detail(struct hash_bucket *bucket, + zebra_evpn_print_neigh_hash_detail(bucket, ctxt); + } + +-void zebra_evpn_neigh_remote_macip_add(struct zebra_evpn *zevpn, +- struct zebra_vrf *zvrf, +- const struct ipaddr *ipaddr, +- struct zebra_mac *mac, +- struct in_addr vtep_ip, uint8_t flags, +- uint32_t seq) ++void zebra_evpn_neigh_remote_macip_add(struct zebra_evpn *zevpn, struct zebra_vrf *zvrf, ++ const struct ipaddr *ipaddr, struct zebra_mac *mac, ++ struct ipaddr *vtep_ip, uint8_t flags, uint32_t seq) + { + struct zebra_neigh *n; + int update_neigh = 0; +@@ -2096,10 +2087,10 @@ void zebra_evpn_neigh_remote_macip_add(struct zebra_evpn *zevpn, + * change. If so, create or update and then install the entry. + */ + n = zebra_evpn_neigh_lookup(zevpn, ipaddr); +- if (!n || !CHECK_FLAG(n->flags, ZEBRA_NEIGH_REMOTE) +- || is_router != !!CHECK_FLAG(n->flags, ZEBRA_NEIGH_ROUTER_FLAG) +- || (memcmp(&n->emac, &mac->macaddr, sizeof(struct ethaddr)) != 0) +- || !IPV4_ADDR_SAME(&n->r_vtep_ip, &vtep_ip) || seq != n->rem_seq) ++ if (!n || !CHECK_FLAG(n->flags, ZEBRA_NEIGH_REMOTE) || ++ is_router != !!CHECK_FLAG(n->flags, ZEBRA_NEIGH_ROUTER_FLAG) || ++ (memcmp(&n->emac, &mac->macaddr, sizeof(struct ethaddr)) != 0) || ++ !ipaddr_is_same(&n->r_vtep_ip, vtep_ip) || seq != n->rem_seq) + update_neigh = 1; + + if (update_neigh) { +@@ -2171,7 +2162,7 @@ void zebra_evpn_neigh_remote_macip_add(struct zebra_evpn *zevpn, + + /* Set "remote" forwarding info. */ + UNSET_FLAG(n->flags, ZEBRA_NEIGH_ALL_LOCAL_FLAGS); +- n->r_vtep_ip = vtep_ip; ++ n->r_vtep_ip = *vtep_ip; + SET_FLAG(n->flags, ZEBRA_NEIGH_REMOTE); + + /* Set router flag (R-bit) to this Neighbor entry */ +@@ -2191,8 +2182,8 @@ void zebra_evpn_neigh_remote_macip_add(struct zebra_evpn *zevpn, + } + + /* Check duplicate address detection for IP */ +- zebra_evpn_dup_addr_detect_for_neigh( +- zvrf, n, n->r_vtep_ip, do_dad, &is_dup_detect, false); ++ zebra_evpn_dup_addr_detect_for_neigh(zvrf, n, &n->r_vtep_ip, do_dad, &is_dup_detect, ++ false); + /* Install the entry. */ + if (!is_dup_detect) + zebra_evpn_rem_neigh_install(zevpn, n, old_static); +diff --git a/zebra/zebra_evpn_neigh.h b/zebra/zebra_evpn_neigh.h +index 21d1d1cc9..b7f3d1556 100644 +--- a/zebra/zebra_evpn_neigh.h ++++ b/zebra/zebra_evpn_neigh.h +@@ -74,7 +74,7 @@ struct zebra_neigh { + enum zebra_neigh_state state; + + /* Remote VTEP IP - applicable only for remote neighbors. */ +- struct in_addr r_vtep_ip; ++ struct ipaddr r_vtep_ip; + + /* + * Mobility sequence numbers associated with this entry. The rem_seq +@@ -120,11 +120,12 @@ struct neigh_walk_ctx { + #define DEL_REMOTE_NEIGH_FROM_VTEP 0x4 + #define SHOW_REMOTE_NEIGH_FROM_VTEP 0x8 + +- struct in_addr r_vtep_ip; /* To walk neighbors from specific VTEP */ ++ struct ipaddr r_vtep_ip; /* To walk neighbors from specific VTEP */ + + struct vty *vty; /* Used by VTY handlers */ + uint32_t count; /* Used by VTY handlers */ + uint8_t addr_width; /* Used by VTY handlers */ ++ uint8_t r_vtep_width; /* Used by VTY handlers */ + struct json_object *json; /* Used for JSON Output */ + }; + +@@ -256,12 +257,9 @@ void zebra_evpn_print_neigh_hash_detail(struct hash_bucket *bucket, void *ctxt); + void zebra_evpn_print_dad_neigh_hash(struct hash_bucket *bucket, void *ctxt); + void zebra_evpn_print_dad_neigh_hash_detail(struct hash_bucket *bucket, + void *ctxt); +-void zebra_evpn_neigh_remote_macip_add(struct zebra_evpn *zevpn, +- struct zebra_vrf *zvrf, +- const struct ipaddr *ipaddr, +- struct zebra_mac *mac, +- struct in_addr vtep_ip, uint8_t flags, +- uint32_t seq); ++void zebra_evpn_neigh_remote_macip_add(struct zebra_evpn *zevpn, struct zebra_vrf *zvrf, ++ const struct ipaddr *ipaddr, struct zebra_mac *mac, ++ struct ipaddr *vtep_ip, uint8_t flags, uint32_t seq); + int zebra_evpn_neigh_gw_macip_add(struct interface *ifp, + struct zebra_evpn *zevpn, struct ipaddr *ip, + struct zebra_mac *mac); +diff --git a/zebra/zebra_fpm.c b/zebra/zebra_fpm.c +index e2fb1c64a..7a605c2d2 100644 +--- a/zebra/zebra_fpm.c ++++ b/zebra/zebra_fpm.c +@@ -1616,7 +1616,7 @@ static int zfpm_trigger_rmac_update(struct zebra_mac *rmac, + fpm_mac = hash_get(zfpm_g->fpm_mac_info_table, &key, + zfpm_mac_info_alloc); + +- fpm_mac->r_vtep_ip.s_addr = rmac->fwd_info.r_vtep_ip.s_addr; ++ fpm_mac->r_vtep_ip.s_addr = rmac->fwd_info.r_vtep_ip.ipaddr_v4.s_addr; + fpm_mac->zebra_flags = rmac->flags; + fpm_mac->vxlan_if = vxlan_if ? vxlan_if->ifindex : 0; + fpm_mac->svi_if = svi_if ? svi_if->ifindex : 0; +diff --git a/zebra/zebra_l2.c b/zebra/zebra_l2.c +index c7a697b22..dd58c3985 100644 +--- a/zebra/zebra_l2.c ++++ b/zebra/zebra_l2.c +@@ -343,7 +343,7 @@ void zebra_l2_vxlanif_add_update(struct interface *ifp, + memset(&ctx, 0, sizeof(ctx)); + ctx.old_vtep_ip = zif->l2info.vxl.vtep_ip; + +- if (!IPV4_ADDR_SAME(&ctx.old_vtep_ip, &vxlan_info->vtep_ip)) { ++ if (!ipaddr_is_same(&ctx.old_vtep_ip, &vxlan_info->vtep_ip)) { + SET_FLAG(chgflags, ZEBRA_VXLIF_LOCAL_IP_CHANGE); + zif->l2info.vxl.vtep_ip = vxlan_info->vtep_ip; + } +diff --git a/zebra/zebra_l2.h b/zebra/zebra_l2.h +index ad5f5eeee..d15d4e08c 100644 +--- a/zebra/zebra_l2.h ++++ b/zebra/zebra_l2.h +@@ -100,7 +100,7 @@ struct zebra_vxlan_if_vlan_ctx { + + struct zebra_vxlan_if_update_ctx { + uint16_t chgflags; +- struct in_addr old_vtep_ip; ++ struct ipaddr old_vtep_ip; + struct zebra_vxlan_vni old_vni; + struct hash *old_vni_table; + }; +@@ -127,7 +127,7 @@ struct zebra_vxlan_vni_info { + /* zebra L2 interface information - VXLAN interface */ + struct zebra_l2info_vxlan { + struct zebra_vxlan_vni_info vni_info; +- struct in_addr vtep_ip; /* Local tunnel IP */ ++ struct ipaddr vtep_ip; /* Local tunnel IP */ + ifindex_t ifindex_link; /* Interface index of interface + * linked with VXLAN + */ +diff --git a/zebra/zebra_nb_state.c b/zebra/zebra_nb_state.c +index 543d4b38b..d88aaaee7 100644 +--- a/zebra/zebra_nb_state.c ++++ b/zebra/zebra_nb_state.c +@@ -167,7 +167,12 @@ lib_interface_zebra_state_remote_vtep_get_elem(struct nb_cb_get_elem_args *args) + zebra_if = ifp->info; + vxlan_info = &zebra_if->l2info.vxl; + +- return yang_data_new_ipv4(args->xpath, &vxlan_info->vtep_ip); ++ if (IS_IPADDR_V4(&vxlan_info->vtep_ip)) ++ return yang_data_new_ipv4(args->xpath, &vxlan_info->vtep_ip.ipaddr_v4); ++ else if (IS_IPADDR_V6(&vxlan_info->vtep_ip)) ++ return yang_data_new_ipv6(args->xpath, &vxlan_info->vtep_ip.ipaddr_v6); ++ else ++ return NULL; + } + + /* +diff --git a/zebra/zebra_neigh.c b/zebra/zebra_neigh.c +index d56a4ad5d..9166c8511 100644 +--- a/zebra/zebra_neigh.c ++++ b/zebra/zebra_neigh.c +@@ -328,7 +328,8 @@ static void zebra_neigh_handle_5549(uint32_t ndm_family, uint32_t ndm_state, str + } + + /* Is vni mcast group */ +-static bool is_mac_vni_mcast_group(struct ethaddr *mac, vni_t vni, struct in_addr grp_addr) ++static bool is_mac_vni_mcast_group(struct ethaddr *mac, vni_t vni, ++ const struct ipaddr *grp_addr) + { + if (!vni) + return false; +@@ -336,10 +337,7 @@ static bool is_mac_vni_mcast_group(struct ethaddr *mac, vni_t vni, struct in_add + if (!is_zero_mac(mac)) + return false; + +- if (!IN_MULTICAST(ntohl(grp_addr.s_addr))) +- return false; +- +- return true; ++ return ipaddr_is_mcast(grp_addr); + } + + static int zebra_nbr_entry_state_to_zclient(int nbr_state) +@@ -516,7 +514,7 @@ static void zebra_neigh_macfdb_update(struct zebra_dplane_ctx *ctx) + ifindex_t vni; + struct zebra_vxlan_vni *vnip; + struct ethaddr mac; +- struct in_addr vtep_ip; ++ const struct ipaddr *vtep_ip; + bool sticky; + bool local_inactive; + bool dp_static; +@@ -563,7 +561,7 @@ static void zebra_neigh_macfdb_update(struct zebra_dplane_ctx *ctx) + } + + mac = *dplane_ctx_mac_get_addr(ctx); +- vtep_ip = *dplane_ctx_mac_get_vtep_ip(ctx); ++ vtep_ip = dplane_ctx_mac_get_vtep_ip(ctx); + + /* Check if this is a mcast group update (svd case) */ + vni_mcast_grp = is_mac_vni_mcast_group(&mac, vni, vtep_ip); +@@ -601,7 +599,9 @@ static void zebra_neigh_macfdb_update(struct zebra_dplane_ctx *ctx) + return; + + if (vni_mcast_grp) { +- zebra_vxlan_if_vni_mcast_group_add_update(ifp, vni, &vtep_ip); ++ /* PIM does not yet support IPV6 */ ++ zebra_vxlan_if_vni_mcast_group_add_update( ++ ifp, vni, (struct in_addr *)&vtep_ip->ipaddr_v4.s_addr); + return; + } + +@@ -638,12 +638,14 @@ static void zebra_neigh_macfdb_update(struct zebra_dplane_ctx *ctx) + + if (dst_present) { + if (vni_mcast_grp) { +- zebra_vxlan_if_vni_mcast_group_del(ifp, vni, &vtep_ip); ++ /* PIM does not yet support IPV6 */ ++ zebra_vxlan_if_vni_mcast_group_del( ++ ifp, vni, (struct in_addr *)&vtep_ip->ipaddr_v4.s_addr); + return; + } + + if (is_zero_mac(&mac) && vni) { +- zebra_vxlan_check_readd_vtep(ifp, vni, vtep_ip); ++ zebra_vxlan_check_readd_vtep(ifp, vni, (struct ipaddr *)vtep_ip); + return; + } + return; +diff --git a/zebra/zebra_rib.c b/zebra/zebra_rib.c +index f04aa4db8..8ed455bbf 100644 +--- a/zebra/zebra_rib.c ++++ b/zebra/zebra_rib.c +@@ -209,7 +209,7 @@ struct wq_evpn_wrapper { + struct ipaddr ip; + struct ethaddr macaddr; + struct prefix prefix; +- struct in_addr vtep_ip; ++ struct ipaddr vtep_ip; + }; + + #define WQ_EVPN_WRAPPER_TYPE_VRFROUTE 0x01 +@@ -2561,11 +2561,10 @@ static void process_subq_evpn(struct listnode *lnode) + &w->prefix); + } else if (w->type == WQ_EVPN_WRAPPER_TYPE_REM_ES) { + if (w->add_p) +- zebra_evpn_remote_es_add(&w->esi, w->ip.ipaddr_v4, +- w->esr_rxed, w->df_alg, ++ zebra_evpn_remote_es_add(&w->esi, &w->ip, w->esr_rxed, w->df_alg, + w->df_pref); + else +- zebra_evpn_remote_es_del(&w->esi, w->ip.ipaddr_v4); ++ zebra_evpn_remote_es_del(&w->esi, &w->ip); + } else if (w->type == WQ_EVPN_WRAPPER_TYPE_REM_MACIP) { + uint16_t ipa_len = 0; + +@@ -2575,19 +2574,15 @@ static void process_subq_evpn(struct listnode *lnode) + ipa_len = IPV6_MAX_BYTELEN; + + if (w->add_p) +- zebra_evpn_rem_macip_add(w->vni, &w->macaddr, ipa_len, +- &w->ip, w->flags, w->seq, +- w->vtep_ip, &w->esi); ++ zebra_evpn_rem_macip_add(w->vni, &w->macaddr, ipa_len, &w->ip, w->flags, ++ w->seq, &w->vtep_ip, &w->esi); + else +- zebra_evpn_rem_macip_del(w->vni, &w->macaddr, ipa_len, +- &w->ip, w->vtep_ip); ++ zebra_evpn_rem_macip_del(w->vni, &w->macaddr, ipa_len, &w->ip, &w->vtep_ip); + } else if (w->type == WQ_EVPN_WRAPPER_TYPE_REM_VTEP) { + if (w->add_p) +- zebra_vxlan_remote_vtep_add(w->vrf_id, w->vni, +- w->vtep_ip, w->flags); ++ zebra_vxlan_remote_vtep_add(w->vrf_id, w->vni, &w->vtep_ip, w->flags); + else +- zebra_vxlan_remote_vtep_del(w->vrf_id, w->vni, +- w->vtep_ip); ++ zebra_vxlan_remote_vtep_del(w->vrf_id, w->vni, &w->vtep_ip); + } + + +@@ -3226,14 +3221,10 @@ static void process_subq_early_route_delete(struct zebra_early_route *ere) + memset(&vtep_ip, 0, sizeof(struct ipaddr)); + if (ere->afi == AFI_IP) { + vtep_ip.ipa_type = IPADDR_V4; +- memcpy(&(vtep_ip.ipaddr_v4), +- &(tmp_nh->gate.ipv4), +- sizeof(struct in_addr)); ++ vtep_ip.ipaddr_v4 = tmp_nh->gate.ipv4; + } else { + vtep_ip.ipa_type = IPADDR_V6; +- memcpy(&(vtep_ip.ipaddr_v6), +- &(tmp_nh->gate.ipv6), +- sizeof(struct in6_addr)); ++ vtep_ip.ipaddr_v6 = tmp_nh->gate.ipv6; + } + zebra_rib_queue_evpn_route_del(tmp_nh->vrf_id, &vtep_ip, &ere->p); + } +@@ -3735,10 +3726,8 @@ int zebra_rib_queue_evpn_route_del(vrf_id_t vrf_id, + } + + /* Enqueue EVPN remote ES for processing */ +-int zebra_rib_queue_evpn_rem_es_add(const esi_t *esi, +- const struct in_addr *vtep_ip, +- bool esr_rxed, uint8_t df_alg, +- uint16_t df_pref) ++int zebra_rib_queue_evpn_rem_es_add(const esi_t *esi, const struct ipaddr *vtep_ip, bool esr_rxed, ++ uint8_t df_alg, uint16_t df_pref) + { + struct wq_evpn_wrapper *w; + char buf[ESI_STR_LEN]; +@@ -3748,21 +3737,19 @@ int zebra_rib_queue_evpn_rem_es_add(const esi_t *esi, + w->type = WQ_EVPN_WRAPPER_TYPE_REM_ES; + w->add_p = true; + w->esi = *esi; +- w->ip.ipa_type = IPADDR_V4; +- w->ip.ipaddr_v4 = *vtep_ip; ++ w->ip = *vtep_ip; + w->esr_rxed = esr_rxed; + w->df_alg = df_alg; + w->df_pref = df_pref; + + if (IS_ZEBRA_DEBUG_RIB_DETAILED) +- zlog_debug("%s: vtep %pI4, esi %s enqueued", __func__, vtep_ip, ++ zlog_debug("%s: vtep %pIA, esi %s enqueued", __func__, vtep_ip, + esi_to_str(esi, buf, sizeof(buf))); + + return mq_add_handler(w, rib_meta_queue_evpn_add); + } + +-int zebra_rib_queue_evpn_rem_es_del(const esi_t *esi, +- const struct in_addr *vtep_ip) ++int zebra_rib_queue_evpn_rem_es_del(const esi_t *esi, const struct ipaddr *vtep_ip) + { + struct wq_evpn_wrapper *w; + char buf[ESI_STR_LEN]; +@@ -3772,8 +3759,7 @@ int zebra_rib_queue_evpn_rem_es_del(const esi_t *esi, + w->type = WQ_EVPN_WRAPPER_TYPE_REM_ES; + w->add_p = false; + w->esi = *esi; +- w->ip.ipa_type = IPADDR_V4; +- w->ip.ipaddr_v4 = *vtep_ip; ++ w->ip = *vtep_ip; + + if (IS_ZEBRA_DEBUG_RIB_DETAILED) { + if (memcmp(esi, zero_esi, sizeof(esi_t)) != 0) +@@ -3781,8 +3767,7 @@ int zebra_rib_queue_evpn_rem_es_del(const esi_t *esi, + else + strlcpy(buf, "-", sizeof(buf)); + +- zlog_debug("%s: vtep %pI4, esi %s enqueued", __func__, vtep_ip, +- buf); ++ zlog_debug("%s: vtep %pIA, esi %s enqueued", __func__, vtep_ip, buf); + } + + return mq_add_handler(w, rib_meta_queue_evpn_add); +@@ -3792,9 +3777,8 @@ int zebra_rib_queue_evpn_rem_es_del(const esi_t *esi, + * Enqueue EVPN remote macip update for processing + */ + int zebra_rib_queue_evpn_rem_macip_add(vni_t vni, const struct ethaddr *macaddr, +- const struct ipaddr *ipaddr, +- uint8_t flags, uint32_t seq, +- struct in_addr vtep_ip, const esi_t *esi) ++ const struct ipaddr *ipaddr, uint8_t flags, uint32_t seq, ++ struct ipaddr *vtep_ip, const esi_t *esi) + { + struct wq_evpn_wrapper *w; + char buf[ESI_STR_LEN]; +@@ -3808,7 +3792,7 @@ int zebra_rib_queue_evpn_rem_macip_add(vni_t vni, const struct ethaddr *macaddr, + w->ip = *ipaddr; + w->flags = flags; + w->seq = seq; +- w->vtep_ip = vtep_ip; ++ w->vtep_ip = *vtep_ip; + w->esi = *esi; + + if (IS_ZEBRA_DEBUG_RIB_DETAILED) { +@@ -3817,16 +3801,15 @@ int zebra_rib_queue_evpn_rem_macip_add(vni_t vni, const struct ethaddr *macaddr, + else + strlcpy(buf, "-", sizeof(buf)); + +- zlog_debug("%s: mac %pEA, vtep %pI4, esi %s enqueued", __func__, +- macaddr, &vtep_ip, buf); ++ zlog_debug("%s: mac %pEA, vtep %pIA, esi %s enqueued", __func__, macaddr, vtep_ip, ++ buf); + } + + return mq_add_handler(w, rib_meta_queue_evpn_add); + } + + int zebra_rib_queue_evpn_rem_macip_del(vni_t vni, const struct ethaddr *macaddr, +- const struct ipaddr *ip, +- struct in_addr vtep_ip) ++ const struct ipaddr *ip, struct ipaddr *vtep_ip) + { + struct wq_evpn_wrapper *w; + +@@ -3837,11 +3820,10 @@ int zebra_rib_queue_evpn_rem_macip_del(vni_t vni, const struct ethaddr *macaddr, + w->vni = vni; + w->macaddr = *macaddr; + w->ip = *ip; +- w->vtep_ip = vtep_ip; ++ w->vtep_ip = *vtep_ip; + + if (IS_ZEBRA_DEBUG_RIB_DETAILED) +- zlog_debug("%s: mac %pEA, vtep %pI4 enqueued", __func__, +- macaddr, &vtep_ip); ++ zlog_debug("%s: mac %pEA, vtep %pIA enqueued", __func__, macaddr, vtep_ip); + + return mq_add_handler(w, rib_meta_queue_evpn_add); + } +@@ -3849,8 +3831,8 @@ int zebra_rib_queue_evpn_rem_macip_del(vni_t vni, const struct ethaddr *macaddr, + /* + * Enqueue remote VTEP address for processing + */ +-int zebra_rib_queue_evpn_rem_vtep_add(vrf_id_t vrf_id, vni_t vni, +- struct in_addr vtep_ip, int flood_control) ++int zebra_rib_queue_evpn_rem_vtep_add(vrf_id_t vrf_id, vni_t vni, struct ipaddr *vtep_ip, ++ int flood_control) + { + struct wq_evpn_wrapper *w; + +@@ -3860,18 +3842,16 @@ int zebra_rib_queue_evpn_rem_vtep_add(vrf_id_t vrf_id, vni_t vni, + w->add_p = true; + w->vrf_id = vrf_id; + w->vni = vni; +- w->vtep_ip = vtep_ip; ++ w->vtep_ip = *vtep_ip; + w->flags = flood_control; + + if (IS_ZEBRA_DEBUG_RIB_DETAILED) +- zlog_debug("%s: vrf %u, vtep %pI4 enqueued", __func__, vrf_id, +- &vtep_ip); ++ zlog_debug("%s: vrf %u, vtep %pIA enqueued", __func__, vrf_id, vtep_ip); + + return mq_add_handler(w, rib_meta_queue_evpn_add); + } + +-int zebra_rib_queue_evpn_rem_vtep_del(vrf_id_t vrf_id, vni_t vni, +- struct in_addr vtep_ip) ++int zebra_rib_queue_evpn_rem_vtep_del(vrf_id_t vrf_id, vni_t vni, struct ipaddr *vtep_ip) + { + struct wq_evpn_wrapper *w; + +@@ -3881,11 +3861,10 @@ int zebra_rib_queue_evpn_rem_vtep_del(vrf_id_t vrf_id, vni_t vni, + w->add_p = false; + w->vrf_id = vrf_id; + w->vni = vni; +- w->vtep_ip = vtep_ip; ++ w->vtep_ip = *vtep_ip; + + if (IS_ZEBRA_DEBUG_RIB_DETAILED) +- zlog_debug("%s: vrf %u, vtep %pI4 enqueued", __func__, vrf_id, +- &vtep_ip); ++ zlog_debug("%s: vrf %u, vtep %pIA enqueued", __func__, vrf_id, vtep_ip); + + return mq_add_handler(w, rib_meta_queue_evpn_add); + } +diff --git a/zebra/zebra_script.c b/zebra/zebra_script.c +index b6bd2b2a4..1eff0a309 100644 +--- a/zebra/zebra_script.c ++++ b/zebra/zebra_script.c +@@ -188,7 +188,7 @@ void lua_pushzebra_dplane_ctx(lua_State *L, const struct zebra_dplane_ctx *ctx) + lua_setfield(L, -2, "br_ifindex"); + lua_pushethaddr(L, dplane_ctx_mac_get_addr(ctx)); + lua_setfield(L, -2, "mac"); +- lua_pushinaddr(L, dplane_ctx_mac_get_vtep_ip(ctx)); ++ lua_pushipaddr(L, dplane_ctx_mac_get_vtep_ip(ctx)); + lua_setfield(L, -2, "vtep_ip"); + lua_pushinteger(L, dplane_ctx_mac_is_sticky(ctx)); + lua_setfield(L, -2, "is_sticky"); +diff --git a/zebra/zebra_vty.c b/zebra/zebra_vty.c +index 1ce3c2137..ae40efffb 100644 +--- a/zebra/zebra_vty.c ++++ b/zebra/zebra_vty.c +@@ -3208,29 +3208,40 @@ DEFUN (show_evpn_mac_vni_all_detail, show_evpn_mac_vni_all_detail_cmd, + return CMD_SUCCESS; + } + +-DEFUN (show_evpn_mac_vni_all_vtep, ++DEFPY (show_evpn_mac_vni_all_vtep, + show_evpn_mac_vni_all_vtep_cmd, +- "show evpn mac vni all vtep A.B.C.D [json]", ++ "show evpn mac vni all vtep $ip [json]", + SHOW_STR + "EVPN\n" + "MAC addresses\n" + "VxLAN Network Identifier\n" + "All VNIs\n" + "Remote VTEP\n" +- "Remote VTEP IP address\n" ++ "Remote VTEP IPv4 address\n" ++ "Remote VTEP IPv6 address\n" + JSON_STR) + { + struct zebra_vrf *zvrf; +- struct in_addr vtep_ip; ++ struct ipaddr vtep_ip = { .ipa_type = IPADDR_NONE }; + bool uj = use_json(argc, argv); + +- if (!inet_aton(argv[6]->arg, &vtep_ip)) { ++ if (ip) { ++ if (sockunion_family(ip) == AF_INET) { ++ SET_IPADDR_V4(&vtep_ip); ++ vtep_ip.ipaddr_v4.s_addr = sockunion2ip(ip); ++ } else { ++ SET_IPADDR_V6(&vtep_ip); ++ memcpy(&vtep_ip.ipaddr_v6, &ip->sin6.sin6_addr, sizeof(struct in6_addr)); ++ } ++ } ++ ++ if (IS_IPADDR_NONE(&vtep_ip)) { + if (!uj) + vty_out(vty, "%% Malformed VTEP IP address\n"); + return CMD_WARNING; + } + zvrf = zebra_vrf_get_evpn(); +- zebra_vxlan_print_macs_all_vni_vtep(vty, zvrf, vtep_ip, uj); ++ zebra_vxlan_print_macs_all_vni_vtep(vty, zvrf, &vtep_ip, uj); + + return CMD_SUCCESS; + } +@@ -3264,32 +3275,41 @@ DEFUN (show_evpn_mac_vni_mac, + return CMD_SUCCESS; + } + +-DEFUN (show_evpn_mac_vni_vtep, ++DEFPY (show_evpn_mac_vni_vtep, + show_evpn_mac_vni_vtep_cmd, +- "show evpn mac vni " CMD_VNI_RANGE " vtep A.B.C.D" "[json]", ++ "show evpn mac vni " CMD_VNI_RANGE " vtep $ip" "[json]", + SHOW_STR + "EVPN\n" + "MAC addresses\n" + "VxLAN Network Identifier\n" + "VNI number\n" + "Remote VTEP\n" +- "Remote VTEP IP address\n" ++ "Remote VTEP IPv4 address\n" ++ "Remote VTEP IPv6 address\n" + JSON_STR) + { + struct zebra_vrf *zvrf; +- vni_t vni; +- struct in_addr vtep_ip; ++ struct ipaddr vtep_ip = { .ipa_type = IPADDR_NONE }; + bool uj = use_json(argc, argv); + +- vni = strtoul(argv[4]->arg, NULL, 10); +- if (!inet_aton(argv[6]->arg, &vtep_ip)) { ++ if (ip) { ++ if (sockunion_family(ip) == AF_INET) { ++ SET_IPADDR_V4(&vtep_ip); ++ vtep_ip.ipaddr_v4.s_addr = sockunion2ip(ip); ++ } else { ++ SET_IPADDR_V6(&vtep_ip); ++ memcpy(&vtep_ip.ipaddr_v6, &ip->sin6.sin6_addr, sizeof(struct in6_addr)); ++ } ++ } ++ ++ if (IS_IPADDR_NONE(&vtep_ip)) { + if (!uj) + vty_out(vty, "%% Malformed VTEP IP address\n"); + return CMD_WARNING; + } + + zvrf = zebra_vrf_get_evpn(); +- zebra_vxlan_print_macs_vni_vtep(vty, zvrf, vni, vtep_ip, uj); ++ zebra_vxlan_print_macs_vni_vtep(vty, zvrf, vni, &vtep_ip, uj); + return CMD_SUCCESS; + } + +@@ -3456,32 +3476,43 @@ DEFUN (show_evpn_neigh_vni_neigh, + return CMD_SUCCESS; + } + +-DEFUN (show_evpn_neigh_vni_vtep, ++DEFPY (show_evpn_neigh_vni_vtep, + show_evpn_neigh_vni_vtep_cmd, +- "show evpn arp-cache vni " CMD_VNI_RANGE " vtep A.B.C.D [json]", ++ "show evpn arp-cache vni " CMD_VNI_RANGE " vtep $ip [json]", + SHOW_STR + "EVPN\n" + "ARP and ND cache\n" + "VxLAN Network Identifier\n" + "VNI number\n" + "Remote VTEP\n" +- "Remote VTEP IP address\n" ++ "Remote VTEP IPv4 address\n" ++ "Remote VTEP IPv6 address\n" + JSON_STR) + { + struct zebra_vrf *zvrf; +- vni_t vni; +- struct in_addr vtep_ip; ++ struct ipaddr vtep_ip; + bool uj = use_json(argc, argv); + +- vni = strtoul(argv[4]->arg, NULL, 10); +- if (!inet_aton(argv[6]->arg, &vtep_ip)) { ++ if (ip) { ++ if (sockunion_family(ip) == AF_INET) { ++ SET_IPADDR_V4(&vtep_ip); ++ vtep_ip.ipaddr_v4.s_addr = sockunion2ip(ip); ++ } else { ++ SET_IPADDR_V6(&vtep_ip); ++ memcpy(&vtep_ip.ipaddr_v6, &ip->sin6.sin6_addr, sizeof(struct in6_addr)); ++ } ++ } else { ++ SET_IPADDR_NONE(&vtep_ip); ++ } ++ ++ if (IS_IPADDR_NONE(&vtep_ip)) { + if (!uj) + vty_out(vty, "%% Malformed VTEP IP address\n"); + return CMD_WARNING; + } + + zvrf = zebra_vrf_get_evpn(); +- zebra_vxlan_print_neigh_vni_vtep(vty, zvrf, vni, vtep_ip, uj); ++ zebra_vxlan_print_neigh_vni_vtep(vty, zvrf, vni, &vtep_ip, uj); + return CMD_SUCCESS; + } + +diff --git a/zebra/zebra_vxlan.c b/zebra/zebra_vxlan.c +index 8d5b1d2d8..25aadd8db 100644 +--- a/zebra/zebra_vxlan.c ++++ b/zebra/zebra_vxlan.c +@@ -269,6 +269,7 @@ static void zevpn_print_neigh_hash_all_evpn(struct hash_bucket *bucket, + wctx.zevpn = zevpn; + wctx.vty = vty; + wctx.addr_width = 15; ++ wctx.r_vtep_width = 30; + wctx.json = json_evpn; + hash_iterate(zevpn->neigh_table, zebra_evpn_find_neigh_addr_width, + &wctx); +@@ -335,6 +336,7 @@ static void zevpn_print_neigh_hash_all_evpn_detail(struct hash_bucket *bucket, + wctx.zevpn = zevpn; + wctx.vty = vty; + wctx.addr_width = 15; ++ wctx.r_vtep_width = 30; + wctx.json = json_evpn; + + if (print_dup) +@@ -408,14 +410,12 @@ static void zl3vni_print_rmac(struct zebra_mac *zrmac, struct vty *vty, + + if (!json) { + vty_out(vty, "MAC: %pEA\n", &zrmac->macaddr); +- vty_out(vty, " Remote VTEP: %pI4\n", +- &zrmac->fwd_info.r_vtep_ip); ++ vty_out(vty, " Remote VTEP: %pIA\n", &zrmac->fwd_info.r_vtep_ip); + } else { + json_nhs = json_object_new_array(); + json_object_string_addf(json, "routerMac", "%pEA", + &zrmac->macaddr); +- json_object_string_addf(json, "vtepIp", "%pI4", +- &zrmac->fwd_info.r_vtep_ip); ++ json_object_string_addf(json, "vtepIp", "%pIA", &zrmac->fwd_info.r_vtep_ip); + for (ALL_LIST_ELEMENTS_RO(zrmac->nh_list, node, vtep)) { + json_object_array_add(json_nhs, json_object_new_stringf( + "%pIA", vtep)); +@@ -718,15 +718,13 @@ static void zl3vni_print_rmac_hash(struct hash_bucket *bucket, void *ctx) + zrmac = (struct zebra_mac *)bucket->data; + + if (!json) { +- vty_out(vty, "%-17s %-21pI4\n", +- prefix_mac2str(&zrmac->macaddr, buf, sizeof(buf)), ++ vty_out(vty, "%-17s %-21pIA\n", prefix_mac2str(&zrmac->macaddr, buf, sizeof(buf)), + &zrmac->fwd_info.r_vtep_ip); + } else { + json_object_string_add( + json_rmac, "routerMac", + prefix_mac2str(&zrmac->macaddr, buf, sizeof(buf))); +- json_object_string_addf(json_rmac, "vtepIp", "%pI4", +- &zrmac->fwd_info.r_vtep_ip); ++ json_object_string_addf(json_rmac, "vtepIp", "%pIA", &zrmac->fwd_info.r_vtep_ip); + json_object_object_add( + json, prefix_mac2str(&zrmac->macaddr, buf, sizeof(buf)), + json_rmac); +@@ -753,8 +751,7 @@ static void zl3vni_print(struct zebra_l3vni *zl3vni, void **ctx) + vty_out(vty, " Vlan: %u\n", zl3vni->vid); + vty_out(vty, " Bridge: %s\n", + zl3vni->bridge_if ? zl3vni->bridge_if->name : "-"); +- vty_out(vty, " Local Vtep Ip: %pI4\n", +- &zl3vni->local_vtep_ip); ++ vty_out(vty, " Local Vtep Ip: %pIA\n", &zl3vni->local_vtep_ip); + vty_out(vty, " Vxlan-Intf: %s\n", + zl3vni_vxlan_if_name(zl3vni)); + vty_out(vty, " SVI-If: %s\n", zl3vni_svi_if_name(zl3vni)); +@@ -777,8 +774,7 @@ static void zl3vni_print(struct zebra_l3vni *zl3vni, void **ctx) + json_object_string_add(json, "type", "L3"); + json_object_string_add(json, "tenantVrf", + zl3vni_vrf_name(zl3vni)); +- json_object_string_addf(json, "localVtepIp", "%pI4", +- &zl3vni->local_vtep_ip); ++ json_object_string_addf(json, "localVtepIp", "%pIA", &zl3vni->local_vtep_ip); + json_object_string_add(json, "vxlanIntf", + zl3vni_vxlan_if_name(zl3vni)); + json_object_string_add(json, "sviIntf", +@@ -931,7 +927,7 @@ int zebra_evpn_vxlan_del(struct zebra_evpn *zevpn) + zevpn_bridge_if_set(zevpn, zevpn->bridge_if, false /* set */); + + /* Remove references to the BUM mcast grp */ +- zebra_vxlan_sg_deref(zevpn->local_vtep_ip, zevpn->mcast_grp); ++ zebra_vxlan_sg_deref(&zevpn->local_vtep_ip, zevpn->mcast_grp); + + return zebra_evpn_del(zevpn); + } +@@ -992,7 +988,7 @@ static int zevpn_build_vni_hash_table(struct zebra_if *zif, + + if (IS_ZEBRA_DEBUG_VXLAN) + zlog_debug( +- "Create L2-VNI hash for intf %s(%u) L2-VNI %u local IP %pI4", ++ "Create L2-VNI hash for intf %s(%u) L2-VNI %u local IP %pIA", + ifp->name, ifp->ifindex, vni, &vxl->vtep_ip); + + /* +@@ -1026,13 +1022,10 @@ static int zevpn_build_vni_hash_table(struct zebra_if *zif, + return 0; + } + +- if (zevpn->local_vtep_ip.s_addr != +- vxl->vtep_ip.s_addr || +- zevpn->mcast_grp.s_addr != vnip->mcast_grp.s_addr) { +- zebra_vxlan_sg_deref(zevpn->local_vtep_ip, +- zevpn->mcast_grp); +- zebra_vxlan_sg_ref(vxl->vtep_ip, +- vnip->mcast_grp); ++ if (!ipaddr_is_same(&zevpn->local_vtep_ip, &vxl->vtep_ip) || ++ !IPV4_ADDR_SAME(&zevpn->mcast_grp, &vnip->mcast_grp)) { ++ zebra_vxlan_sg_deref(&zevpn->local_vtep_ip, zevpn->mcast_grp); ++ zebra_vxlan_sg_ref(&vxl->vtep_ip, vnip->mcast_grp); + zevpn->local_vtep_ip = vxl->vtep_ip; + zevpn->mcast_grp = vnip->mcast_grp; + /* on local vtep-ip check if ES +@@ -1298,9 +1291,8 @@ static int zl3vni_rmac_install(struct zebra_l3vni *zl3vni, + else + vid = 0; + +- res = dplane_rem_mac_add(zl3vni->vxlan_if, br_ifp, vid, &zrmac->macaddr, +- vni->vni, zrmac->fwd_info.r_vtep_ip, 0, 0, +- false /*was_static*/); ++ res = dplane_rem_mac_add(zl3vni->vxlan_if, br_ifp, vid, &zrmac->macaddr, vni->vni, ++ &zrmac->fwd_info.r_vtep_ip, 0, 0, false /*was_static*/); + if (res != ZEBRA_DPLANE_REQUEST_FAILURE) + return 0; + else +@@ -1347,8 +1339,8 @@ static int zl3vni_rmac_uninstall(struct zebra_l3vni *zl3vni, + else + vid = 0; + +- res = dplane_rem_mac_del(zl3vni->vxlan_if, br_ifp, vid, &zrmac->macaddr, +- vni->vni, zrmac->fwd_info.r_vtep_ip); ++ res = dplane_rem_mac_del(zl3vni->vxlan_if, br_ifp, vid, &zrmac->macaddr, vni->vni, ++ &zrmac->fwd_info.r_vtep_ip); + if (res != ZEBRA_DPLANE_REQUEST_FAILURE) + return 0; + else +@@ -1362,18 +1354,6 @@ static int zl3vni_remote_rmac_add(struct zebra_l3vni *zl3vni, + { + struct zebra_mac *zrmac = NULL; + struct ipaddr *vtep = NULL; +- struct ipaddr ipv4_vtep; +- +- /* vtep_ip may be v4 or v6-mapped-v4. But zrmac->fwd_info +- * can only contain v4 version. So convert if needed +- */ +- memset(&ipv4_vtep, 0, sizeof(ipv4_vtep)); +- ipv4_vtep.ipa_type = IPADDR_V4; +- if (vtep_ip->ipa_type == IPADDR_V6) +- ipv4_mapped_ipv6_to_ipv4(&vtep_ip->ipaddr_v6, +- &(ipv4_vtep.ipaddr_v4)); +- else +- IPV4_ADDR_COPY(&(ipv4_vtep.ipaddr_v4), &vtep_ip->ipaddr_v4); + + zrmac = zl3vni_rmac_lookup(zl3vni, rmac); + if (!zrmac) { +@@ -1387,7 +1367,7 @@ static int zl3vni_remote_rmac_add(struct zebra_l3vni *zl3vni, + return -1; + } + memset(&zrmac->fwd_info, 0, sizeof(zrmac->fwd_info)); +- zrmac->fwd_info.r_vtep_ip = ipv4_vtep.ipaddr_v4; ++ zrmac->fwd_info.r_vtep_ip = *vtep_ip; + + vtep = XCALLOC(MTYPE_EVPN_VTEP, sizeof(struct ipaddr)); + memcpy(vtep, vtep_ip, sizeof(struct ipaddr)); +@@ -1401,12 +1381,12 @@ static int zl3vni_remote_rmac_add(struct zebra_l3vni *zl3vni, + /* install rmac in kernel */ + zl3vni_rmac_install(zl3vni, zrmac); + } else { +- if (!IPV4_ADDR_SAME(&zrmac->fwd_info.r_vtep_ip, &(ipv4_vtep.ipaddr_v4))) { ++ if (!ipaddr_is_same(&zrmac->fwd_info.r_vtep_ip, vtep_ip)) { + if (IS_ZEBRA_DEBUG_VXLAN) +- zlog_debug("L3VNI %u Remote VTEP change(%pI4 -> %pIA) for RMAC %pEA", ++ zlog_debug("L3VNI %u Remote VTEP change(%pIA -> %pIA) for RMAC %pEA", + zl3vni->vni, &zrmac->fwd_info.r_vtep_ip, vtep_ip, rmac); + +- zrmac->fwd_info.r_vtep_ip = ipv4_vtep.ipaddr_v4; ++ zrmac->fwd_info.r_vtep_ip = *vtep_ip; + + /* install rmac in kernel */ + zl3vni_rmac_install(zl3vni, zrmac); +@@ -1430,25 +1410,15 @@ static void zl3vni_remote_rmac_del(struct zebra_l3vni *zl3vni, + if (!zl3vni_nh_lookup(zl3vni, vtep_ip)) { + /* remove nh from rmac's list */ + l3vni_rmac_nh_list_nh_delete(zl3vni, zrmac, vtep_ip); +- /* If there are remaining entries, use IPv4 from one */ ++ /* If there are remaining entries, use IP from one */ + if (listcount(zrmac->nh_list)) { + struct ipaddr *vtep; +- struct ipaddr ipv4_vtep; + + vtep = listgetdata(listhead(zrmac->nh_list)); +- memset(&ipv4_vtep, 0, sizeof(ipv4_vtep)); +- ipv4_vtep.ipa_type = IPADDR_V4; +- if (vtep->ipa_type == IPADDR_V6) +- ipv4_mapped_ipv6_to_ipv4(&vtep->ipaddr_v6, +- &(ipv4_vtep.ipaddr_v4)); +- else +- IPV4_ADDR_COPY(&(ipv4_vtep.ipaddr_v4), +- &vtep->ipaddr_v4); +- zrmac->fwd_info.r_vtep_ip = ipv4_vtep.ipaddr_v4; ++ zrmac->fwd_info.r_vtep_ip = *vtep; + if (IS_ZEBRA_DEBUG_VXLAN) +- zlog_debug("L3VNI %u Remote VTEP nh change(%pIA -> %pI4) for RMAC %pEA", +- zl3vni->vni, vtep_ip, +- &zrmac->fwd_info.r_vtep_ip, ++ zlog_debug("L3VNI %u Remote VTEP nh change(%pIA -> %pIA) for RMAC %pEA", ++ zl3vni->vni, vtep_ip, &zrmac->fwd_info.r_vtep_ip, + &zrmac->macaddr); + + /* install rmac in kernel */ +@@ -2238,7 +2208,8 @@ static int zl3vni_send_add_to_client(struct zebra_l3vni *zl3vni) + zclient_create_header(s, ZEBRA_L3VNI_ADD, zl3vni_vrf_id(zl3vni)); + stream_putl(s, zl3vni->vni); + stream_put(s, &svi_rmac, sizeof(struct ethaddr)); +- stream_put_in_addr(s, &zl3vni->local_vtep_ip); ++ /* Temporary until BGP accepts IPv6 VTEPs */ ++ stream_put_in_addr(s, &zl3vni->local_vtep_ip.ipaddr_v4); + stream_put(s, &zl3vni->filter, sizeof(int)); + stream_putl(s, zl3vni->svi_if->ifindex); + stream_put(s, &vrr_rmac, sizeof(struct ethaddr)); +@@ -2248,12 +2219,11 @@ static int zl3vni_send_add_to_client(struct zebra_l3vni *zl3vni) + stream_putw_at(s, 0, stream_get_endp(s)); + + if (IS_ZEBRA_DEBUG_VXLAN) +- zlog_debug("Send L3VNI ADD %u VRF %s RMAC %pEA VRR %pEA local-ip %pI4 filter %s to %s", +- zl3vni->vni, vrf_id_to_name(zl3vni_vrf_id(zl3vni)), +- &svi_rmac, &vrr_rmac, &zl3vni->local_vtep_ip, +- CHECK_FLAG(zl3vni->filter, PREFIX_ROUTES_ONLY) +- ? "prefix-routes-only" +- : "none", ++ zlog_debug("Send L3VNI ADD %u VRF %s RMAC %pEA VRR %pEA local-ip %pIA filter %s to %s", ++ zl3vni->vni, vrf_id_to_name(zl3vni_vrf_id(zl3vni)), &svi_rmac, &vrr_rmac, ++ &zl3vni->local_vtep_ip, ++ CHECK_FLAG(zl3vni->filter, PREFIX_ROUTES_ONLY) ? "prefix-routes-only" ++ : "none", + zebra_route_string(client->proto)); + + client->l3vniadd_cnt++; +@@ -2948,6 +2918,7 @@ void zebra_vxlan_print_neigh_vni(struct vty *vty, struct zebra_vrf *zvrf, + wctx.zevpn = zevpn; + wctx.vty = vty; + wctx.addr_width = 15; ++ wctx.r_vtep_width = 30; + wctx.json = json; + hash_iterate(zevpn->neigh_table, zebra_evpn_find_neigh_addr_width, + &wctx); +@@ -3073,9 +3044,8 @@ void zebra_vxlan_print_specific_neigh_vni(struct vty *vty, + * Display neighbors for a VNI from specific VTEP (VTY command handler). + * By definition, these are remote neighbors. + */ +-void zebra_vxlan_print_neigh_vni_vtep(struct vty *vty, struct zebra_vrf *zvrf, +- vni_t vni, struct in_addr vtep_ip, +- bool use_json) ++void zebra_vxlan_print_neigh_vni_vtep(struct vty *vty, struct zebra_vrf *zvrf, vni_t vni, ++ struct ipaddr *vtep_ip, bool use_json) + { + struct zebra_evpn *zevpn; + uint32_t num_neigh; +@@ -3107,8 +3077,10 @@ void zebra_vxlan_print_neigh_vni_vtep(struct vty *vty, struct zebra_vrf *zvrf, + wctx.zevpn = zevpn; + wctx.vty = vty; + wctx.addr_width = 15; ++ /* r_vtep_width starts at 30 to print ESIs from remote MH neighbors */ ++ wctx.r_vtep_width = 30; + wctx.flags = SHOW_REMOTE_NEIGH_FROM_VTEP; +- wctx.r_vtep_ip = vtep_ip; ++ wctx.r_vtep_ip = *vtep_ip; + wctx.json = json; + hash_iterate(zevpn->neigh_table, zebra_evpn_find_neigh_addr_width, + &wctx); +@@ -3166,6 +3138,7 @@ void zebra_vxlan_print_neigh_vni_dad(struct vty *vty, + wctx.zevpn = zevpn; + wctx.vty = vty; + wctx.addr_width = 15; ++ wctx.r_vtep_width = 30; + wctx.json = json; + hash_iterate(zevpn->neigh_table, zebra_evpn_find_neigh_addr_width, + &wctx); +@@ -3174,9 +3147,8 @@ void zebra_vxlan_print_neigh_vni_dad(struct vty *vty, + vty_out(vty, + "Number of ARPs (local and remote) known for this VNI: %u\n", + num_neigh); +- vty_out(vty, "%*s %-6s %-8s %-17s %-30s\n", +- -wctx.addr_width, "IP", "Type", +- "State", "MAC", "Remote ES/VTEP"); ++ vty_out(vty, "%*s %-6s %-8s %-17s %*s\n", -wctx.addr_width, "IP", "Type", "State", ++ "MAC", -wctx.r_vtep_width, "Remote ES/VTEP"); + } else + json_object_int_add(json, "numArpNd", num_neigh); + +@@ -3325,9 +3297,8 @@ void zebra_vxlan_print_macs_all_vni_detail(struct vty *vty, + /* + * Display MACs for all VNIs (VTY command handler). + */ +-void zebra_vxlan_print_macs_all_vni_vtep(struct vty *vty, +- struct zebra_vrf *zvrf, +- struct in_addr vtep_ip, bool use_json) ++void zebra_vxlan_print_macs_all_vni_vtep(struct vty *vty, struct zebra_vrf *zvrf, ++ struct ipaddr *vtep_ip, bool use_json) + { + struct mac_walk_ctx wctx; + json_object *json = NULL; +@@ -3344,7 +3315,7 @@ void zebra_vxlan_print_macs_all_vni_vtep(struct vty *vty, + memset(&wctx, 0, sizeof(wctx)); + wctx.vty = vty; + wctx.flags = SHOW_REMOTE_MAC_FROM_VTEP; +- wctx.r_vtep_ip = vtep_ip; ++ wctx.r_vtep_ip = *vtep_ip; + wctx.json = json; + hash_iterate(zvrf->evpn_table, zevpn_print_mac_hash_all_evpn, &wctx); + +@@ -3759,9 +3730,8 @@ int zebra_vxlan_clear_dup_detect_vni(struct zebra_vrf *zvrf, vni_t vni) + /* + * Display MACs for a VNI from specific VTEP (VTY command handler). + */ +-void zebra_vxlan_print_macs_vni_vtep(struct vty *vty, struct zebra_vrf *zvrf, +- vni_t vni, struct in_addr vtep_ip, +- bool use_json) ++void zebra_vxlan_print_macs_vni_vtep(struct vty *vty, struct zebra_vrf *zvrf, vni_t vni, ++ struct ipaddr *vtep_ip, bool use_json) + { + struct zebra_evpn *zevpn; + uint32_t num_macs; +@@ -3799,7 +3769,7 @@ void zebra_vxlan_print_macs_vni_vtep(struct vty *vty, struct zebra_vrf *zvrf, + wctx.zevpn = zevpn; + wctx.vty = vty; + wctx.flags = SHOW_REMOTE_MAC_FROM_VTEP; +- wctx.r_vtep_ip = vtep_ip; ++ wctx.r_vtep_ip = *vtep_ip; + wctx.json = json_mac; + hash_iterate(zevpn->mac_table, zebra_evpn_print_mac_hash, &wctx); + +@@ -4172,11 +4142,10 @@ int zebra_vxlan_handle_kernel_neigh_update(struct interface *ifp, + return zebra_evpn_remote_neigh_update(zevpn, ifp, ip, macaddr, state); + } + +-static int32_t +-zebra_vxlan_remote_macip_helper(bool add, struct stream *s, vni_t *vni, +- struct ethaddr *macaddr, uint16_t *ipa_len, +- struct ipaddr *ip, struct in_addr *vtep_ip, +- uint8_t *flags, uint32_t *seq, esi_t *esi) ++static int32_t zebra_vxlan_remote_macip_helper(bool add, struct stream *s, vni_t *vni, ++ struct ethaddr *macaddr, uint16_t *ipa_len, ++ struct ipaddr *ip, struct ipaddr *vtep_ip, ++ uint8_t *flags, uint32_t *seq, esi_t *esi) + { + uint16_t l = 0; + +@@ -4197,17 +4166,18 @@ zebra_vxlan_remote_macip_helper(bool add, struct stream *s, vni_t *vni, + ip->ipa_type = IPADDR_V6; + else { + if (IS_ZEBRA_DEBUG_VXLAN) +- zlog_debug( +- "ipa_len *must* be %d or %d bytes in length not %d", +- IPV4_MAX_BYTELEN, IPV6_MAX_BYTELEN, +- *ipa_len); ++ zlog_err("ipa_len *must* be %d or %d bytes in length not %d", ++ IPV4_MAX_BYTELEN, IPV6_MAX_BYTELEN, *ipa_len); + goto stream_failure; + } + + STREAM_GET(&ip->ip.addr, s, *ipa_len); + } + l += 4 + ETH_ALEN + 4 + *ipa_len; +- STREAM_GET(&vtep_ip->s_addr, s, IPV4_MAX_BYTELEN); ++ ++ /* Temporary until BGP supports IPv6 VTEPs */ ++ SET_IPADDR_V4(vtep_ip); ++ STREAM_GET(&vtep_ip->ipaddr_v4, s, IPV4_MAX_BYTELEN); + l += IPV4_MAX_BYTELEN; + + if (add) { +@@ -4233,7 +4203,7 @@ void zebra_vxlan_remote_macip_del(ZAPI_HANDLER_ARGS) + vni_t vni; + struct ethaddr macaddr; + struct ipaddr ip; +- struct in_addr vtep_ip; ++ struct ipaddr vtep_ip; + uint16_t l = 0, ipa_len; + char buf1[INET6_ADDRSTRLEN]; + +@@ -4249,16 +4219,13 @@ void zebra_vxlan_remote_macip_del(ZAPI_HANDLER_ARGS) + + l += res_length; + if (IS_ZEBRA_DEBUG_VXLAN) +- zlog_debug( +- "Recv MACIP DEL VNI %u MAC %pEA%s%s Remote VTEP %pI4 from %s", +- vni, &macaddr, +- ipa_len ? " IP " : "", +- ipa_len ? +- ipaddr2str(&ip, buf1, sizeof(buf1)) : "", +- &vtep_ip, zebra_route_string(client->proto)); ++ zlog_debug("Recv MACIP DEL VNI %u MAC %pEA%s%s Remote VTEP %pIA from %s", ++ vni, &macaddr, ipa_len ? " IP " : "", ++ ipa_len ? ipaddr2str(&ip, buf1, sizeof(buf1)) : "", &vtep_ip, ++ zebra_route_string(client->proto)); + + /* Enqueue to workqueue for processing */ +- zebra_rib_queue_evpn_rem_macip_del(vni, &macaddr, &ip, vtep_ip); ++ zebra_rib_queue_evpn_rem_macip_del(vni, &macaddr, &ip, &vtep_ip); + } + + stream_failure: +@@ -4276,7 +4243,7 @@ void zebra_vxlan_remote_macip_add(ZAPI_HANDLER_ARGS) + vni_t vni; + struct ethaddr macaddr; + struct ipaddr ip; +- struct in_addr vtep_ip; ++ struct ipaddr vtep_ip; + uint16_t l = 0, ipa_len; + uint8_t flags = 0; + uint32_t seq; +@@ -4307,21 +4274,15 @@ void zebra_vxlan_remote_macip_add(ZAPI_HANDLER_ARGS) + esi_to_str(&esi, esi_buf, sizeof(esi_buf)); + else + strlcpy(esi_buf, "-", ESI_STR_LEN); +- zlog_debug( +- "Recv %sMACIP ADD VNI %u MAC %pEA%s%s flags 0x%x seq %u VTEP %pI4 ESI %s from %s", +- (flags & ZEBRA_MACIP_TYPE_SYNC_PATH) ? +- "sync-" : "", +- vni, &macaddr, +- ipa_len ? " IP " : "", +- ipa_len ? +- ipaddr2str(&ip, buf1, sizeof(buf1)) : "", +- flags, seq, &vtep_ip, esi_buf, +- zebra_route_string(client->proto)); ++ zlog_debug("Recv %sMACIP ADD VNI %u MAC %pEA%s%s flags 0x%x seq %u VTEP %pIA ESI %s from %s", ++ (flags & ZEBRA_MACIP_TYPE_SYNC_PATH) ? "sync-" : "", vni, ++ &macaddr, ipa_len ? " IP " : "", ++ ipa_len ? ipaddr2str(&ip, buf1, sizeof(buf1)) : "", flags, seq, ++ &vtep_ip, esi_buf, zebra_route_string(client->proto)); + } + + /* Enqueue to workqueue for processing */ +- zebra_rib_queue_evpn_rem_macip_add(vni, &macaddr, &ip, flags, +- seq, vtep_ip, &esi); ++ zebra_rib_queue_evpn_rem_macip_add(vni, &macaddr, &ip, flags, seq, &vtep_ip, &esi); + } + + stream_failure: +@@ -4331,8 +4292,7 @@ stream_failure: + /* + * Handle remote vtep delete by kernel; re-add the vtep if we have it + */ +-int zebra_vxlan_check_readd_vtep(struct interface *ifp, vni_t vni, +- struct in_addr vtep_ip) ++int zebra_vxlan_check_readd_vtep(struct interface *ifp, vni_t vni, struct ipaddr *vtep_ip) + { + struct zebra_if *zif; + struct zebra_vrf *zvrf = NULL; +@@ -4362,14 +4322,13 @@ int zebra_vxlan_check_readd_vtep(struct interface *ifp, vni_t vni, + return 0; + + /* If the remote vtep entry doesn't exists nothing to do */ +- zvtep = zebra_evpn_vtep_find(zevpn, &vtep_ip); ++ zvtep = zebra_evpn_vtep_find(zevpn, vtep_ip); + if (!zvtep) + return 0; + + if (IS_ZEBRA_DEBUG_VXLAN) +- zlog_debug( +- "Del MAC for remote VTEP %pI4 intf %s(%u) VNI %u - readd", +- &vtep_ip, ifp->name, ifp->ifindex, vni); ++ zlog_debug("Del MAC for remote VTEP %pIA intf %s(%u) VNI %u - readd", vtep_ip, ++ ifp->name, ifp->ifindex, vni); + + zebra_evpn_vtep_install(zevpn, zvtep); + return 0; +@@ -4626,7 +4585,7 @@ void zebra_vxlan_remote_vtep_del_zapi(ZAPI_HANDLER_ARGS) + struct stream *s; + unsigned short l = 0; + vni_t vni; +- struct in_addr vtep_ip; ++ struct ipaddr vtep_ip; + + if (!is_evpn_enabled()) { + if (IS_ZEBRA_DEBUG_VXLAN) +@@ -4649,7 +4608,10 @@ void zebra_vxlan_remote_vtep_del_zapi(ZAPI_HANDLER_ARGS) + /* Obtain each remote VTEP and process. */ + STREAM_GETL(s, vni); + l += 4; +- STREAM_GET(&vtep_ip.s_addr, s, IPV4_MAX_BYTELEN); ++ ++ /* Temporary until BGP supports IPv6 VTEPs */ ++ SET_IPADDR_V4(&vtep_ip); ++ STREAM_GET(&vtep_ip.ipaddr_v4.s_addr, s, IPV4_MAX_BYTELEN); + l += IPV4_MAX_BYTELEN; + + /* Flood control is intentionally ignored right now */ +@@ -4657,12 +4619,11 @@ void zebra_vxlan_remote_vtep_del_zapi(ZAPI_HANDLER_ARGS) + l += 4; + + if (IS_ZEBRA_DEBUG_VXLAN) +- zlog_debug("Recv VTEP DEL %pI4 VNI %u from %s", +- &vtep_ip, vni, ++ zlog_debug("Recv VTEP DEL %pIA VNI %u from %s", &vtep_ip, vni, + zebra_route_string(client->proto)); + + /* Enqueue for processing */ +- zebra_rib_queue_evpn_rem_vtep_del(zvrf_id(zvrf), vni, vtep_ip); ++ zebra_rib_queue_evpn_rem_vtep_del(zvrf_id(zvrf), vni, &vtep_ip); + } + + stream_failure: +@@ -4672,8 +4633,7 @@ stream_failure: + /* + * Handle message from client to delete a remote VTEP for an EVPN. + */ +-void zebra_vxlan_remote_vtep_del(vrf_id_t vrf_id, vni_t vni, +- struct in_addr vtep_ip) ++void zebra_vxlan_remote_vtep_del(vrf_id_t vrf_id, vni_t vni, struct ipaddr *vtep_ip) + { + struct zebra_evpn *zevpn; + struct zebra_vtep *zvtep; +@@ -4725,19 +4685,19 @@ void zebra_vxlan_remote_vtep_del(vrf_id_t vrf_id, vni_t vni, + * Otherwise, uninstall any remote MACs pointing to this VTEP + * and then, the VTEP entry itself and remove it. + */ +- zvtep = zebra_evpn_vtep_find(zevpn, &vtep_ip); ++ zvtep = zebra_evpn_vtep_find(zevpn, vtep_ip); + if (!zvtep) + return; + +- zebra_evpn_vtep_uninstall(zevpn, &vtep_ip); ++ zebra_evpn_vtep_uninstall(zevpn, vtep_ip); + zebra_evpn_vtep_del(zevpn, zvtep); + } + + /* + * Handle message from client to add a remote VTEP for an EVPN. + */ +-void zebra_vxlan_remote_vtep_add(vrf_id_t vrf_id, vni_t vni, +- struct in_addr vtep_ip, int flood_control) ++void zebra_vxlan_remote_vtep_add(vrf_id_t vrf_id, vni_t vni, struct ipaddr *vtep_ip, ++ int flood_control) + { + struct zebra_evpn *zevpn; + struct interface *ifp; +@@ -4785,17 +4745,17 @@ void zebra_vxlan_remote_vtep_add(vrf_id_t vrf_id, vni_t vni, + /* If down or not mapped to a bridge, we're done. */ + if (!if_is_operative(ifp) || !zif->brslave_info.br_if) { + if (IS_ZEBRA_DEBUG_KERNEL) +- zlog_debug("%s VNI %u VTEP %pI4 ifp %s oper %u br_if %u skipping update", +- __func__, zevpn->vni, &vtep_ip, ifp->name, if_is_operative(ifp), ++ zlog_debug("%s VNI %u VTEP %pIA ifp %s oper %u br_if %u skipping update", ++ __func__, zevpn->vni, vtep_ip, ifp->name, if_is_operative(ifp), + !zif->brslave_info.br_if); + return; + } + +- zvtep = zebra_evpn_vtep_find(zevpn, &vtep_ip); ++ zvtep = zebra_evpn_vtep_find(zevpn, vtep_ip); + if (zvtep) { + if (IS_ZEBRA_DEBUG_KERNEL) +- zlog_debug("%s: VTEP %pI4 already exists for VNI %u flood_control %d (received flood_control %d)", +- __func__, &vtep_ip, vni, zvtep->flood_control, flood_control); ++ zlog_debug("%s: VTEP %pIA already exists for VNI %u flood_control %d (received flood_control %d)", ++ __func__, vtep_ip, vni, zvtep->flood_control, flood_control); + + /* If the remote VTEP already exists check if + * the flood mode has changed +@@ -4806,16 +4766,16 @@ void zebra_vxlan_remote_vtep_add(vrf_id_t vrf_id, vni_t vni, + * is no longer; get rid of the HER fdb + * entry installed before + */ +- zebra_evpn_vtep_uninstall(zevpn, &vtep_ip); ++ zebra_evpn_vtep_uninstall(zevpn, vtep_ip); + zvtep->flood_control = flood_control; + zebra_evpn_vtep_install(zevpn, zvtep); + } + } else { + if (IS_ZEBRA_DEBUG_KERNEL) +- zlog_debug("%s: VTEP %pI4 does not exist for VNI %u flood_control %d, adding it", +- __func__, &vtep_ip, vni, flood_control); ++ zlog_debug("%s: VTEP %pIA does not exist for VNI %u flood_control %d, adding it", ++ __func__, vtep_ip, vni, flood_control); + +- zvtep = zebra_evpn_vtep_add(zevpn, &vtep_ip, flood_control); ++ zvtep = zebra_evpn_vtep_add(zevpn, vtep_ip, flood_control); + if (zvtep) + zebra_evpn_vtep_install(zevpn, zvtep); + else +@@ -4833,7 +4793,7 @@ void zebra_vxlan_remote_vtep_add_zapi(ZAPI_HANDLER_ARGS) + struct stream *s; + unsigned short l = 0; + vni_t vni; +- struct in_addr vtep_ip; ++ struct ipaddr vtep_ip; + int flood_control; + + if (!is_evpn_enabled()) { +@@ -4855,18 +4815,19 @@ void zebra_vxlan_remote_vtep_add_zapi(ZAPI_HANDLER_ARGS) + /* Obtain each remote VTEP and process. */ + STREAM_GETL(s, vni); + l += 4; +- STREAM_GET(&vtep_ip.s_addr, s, IPV4_MAX_BYTELEN); ++ ++ /* Temporary until BGP supports IPV6 VTEPs */ ++ SET_IPADDR_V4(&vtep_ip); ++ STREAM_GET(&vtep_ip.ipaddr_v4.s_addr, s, IPV4_MAX_BYTELEN); + STREAM_GETL(s, flood_control); + l += IPV4_MAX_BYTELEN + 4; + + if (IS_ZEBRA_DEBUG_VXLAN) +- zlog_debug("Recv VTEP ADD %pI4 VNI %u flood %d from %s", +- &vtep_ip, vni, flood_control, +- zebra_route_string(client->proto)); ++ zlog_debug("Recv VTEP ADD %pIA VNI %u flood %d from %s", &vtep_ip, vni, ++ flood_control, zebra_route_string(client->proto)); + + /* Enqueue for processing */ +- zebra_rib_queue_evpn_rem_vtep_add(zvrf_id(zvrf), vni, vtep_ip, +- flood_control); ++ zebra_rib_queue_evpn_rem_vtep_add(zvrf_id(zvrf), vni, &vtep_ip, flood_control); + } + + stream_failure: +@@ -6082,37 +6043,28 @@ zebra_vxlan_sg_do_ref(struct zebra_vrf *zvrf, const struct ipaddr *sip, + return vxlan_sg; + } + +-void zebra_vxlan_sg_deref(struct in_addr local_vtep_ip, struct in_addr mcast_grp) ++void zebra_vxlan_sg_deref(struct ipaddr *local_vtep_ip, struct in_addr mcast_grp) + { + struct zebra_vrf *zvrf; +- struct ipaddr local_vtep_ipaddr; + +- if (local_vtep_ip.s_addr == INADDR_ANY +- || mcast_grp.s_addr == INADDR_ANY) ++ if (ipaddr_is_zero(local_vtep_ip) || mcast_grp.s_addr == INADDR_ANY) + return; + + zvrf = vrf_info_lookup(VRF_DEFAULT); + +- SET_IPADDR_V4(&local_vtep_ipaddr); +- local_vtep_ipaddr.ipaddr_v4 = local_vtep_ip; +- +- zebra_vxlan_sg_do_deref(zvrf, &local_vtep_ipaddr, mcast_grp); ++ zebra_vxlan_sg_do_deref(zvrf, local_vtep_ip, mcast_grp); + } + +-void zebra_vxlan_sg_ref(struct in_addr local_vtep_ip, struct in_addr mcast_grp) ++void zebra_vxlan_sg_ref(struct ipaddr *local_vtep_ip, struct in_addr mcast_grp) + { + struct zebra_vrf *zvrf; +- struct ipaddr local_vtep_ipaddr; + +- if (local_vtep_ip.s_addr == INADDR_ANY || mcast_grp.s_addr == INADDR_ANY) ++ if (ipaddr_is_zero(local_vtep_ip) || mcast_grp.s_addr == INADDR_ANY) + return; + + zvrf = vrf_info_lookup(VRF_DEFAULT); + +- SET_IPADDR_V4(&local_vtep_ipaddr); +- local_vtep_ipaddr.ipaddr_v4 = local_vtep_ip; +- +- zebra_vxlan_sg_do_ref(zvrf, &local_vtep_ipaddr, mcast_grp); ++ zebra_vxlan_sg_do_ref(zvrf, local_vtep_ip, mcast_grp); + } + + static void zebra_vxlan_xg_pre_cleanup(struct hash_bucket *bucket, void *arg) +diff --git a/zebra/zebra_vxlan.h b/zebra/zebra_vxlan.h +index 95cdf70bd..87804d183 100644 +--- a/zebra/zebra_vxlan.h ++++ b/zebra/zebra_vxlan.h +@@ -65,10 +65,9 @@ extern void zebra_vxlan_remote_macip_add(ZAPI_HANDLER_ARGS); + extern void zebra_vxlan_remote_macip_del(ZAPI_HANDLER_ARGS); + extern void zebra_vxlan_remote_vtep_add_zapi(ZAPI_HANDLER_ARGS); + extern void zebra_vxlan_remote_vtep_del_zapi(ZAPI_HANDLER_ARGS); +-void zebra_vxlan_remote_vtep_add(vrf_id_t vrf_id, vni_t vni, +- struct in_addr vtep_ip, int flood_control); +-extern void zebra_vxlan_remote_vtep_del(vrf_id_t vrf_id, vni_t vni, +- struct in_addr vtep_ip); ++void zebra_vxlan_remote_vtep_add(vrf_id_t vrf_id, vni_t vni, struct ipaddr *vtep_ip, ++ int flood_control); ++extern void zebra_vxlan_remote_vtep_del(vrf_id_t vrf_id, vni_t vni, struct ipaddr *vtep_ip); + extern void zebra_vxlan_flood_control(ZAPI_HANDLER_ARGS); + extern void zebra_vxlan_advertise_subnet(ZAPI_HANDLER_ARGS); + extern void zebra_vxlan_advertise_svi_macip(ZAPI_HANDLER_ARGS); +@@ -102,18 +101,14 @@ extern void zebra_vxlan_print_macs_all_vni_detail(struct vty *vty, + struct zebra_vrf *zvrf, + bool print_dup, + bool use_json); +-extern void zebra_vxlan_print_macs_all_vni_vtep(struct vty *vty, +- struct zebra_vrf *zvrf, +- struct in_addr vtep_ip, +- bool use_json); ++extern void zebra_vxlan_print_macs_all_vni_vtep(struct vty *vty, struct zebra_vrf *zvrf, ++ struct ipaddr *vtep_ip, bool use_json); + extern void zebra_vxlan_print_specific_mac_vni(struct vty *vty, + struct zebra_vrf *zvrf, + vni_t vni, struct ethaddr *mac, + bool use_json); +-extern void zebra_vxlan_print_macs_vni_vtep(struct vty *vty, +- struct zebra_vrf *zvrf, vni_t vni, +- struct in_addr vtep_ip, +- bool use_json); ++extern void zebra_vxlan_print_macs_vni_vtep(struct vty *vty, struct zebra_vrf *zvrf, vni_t vni, ++ struct ipaddr *vtep_ip, bool use_json); + extern void zebra_vxlan_print_macs_vni_dad(struct vty *vty, + struct zebra_vrf *zvrf, vni_t vni, + bool use_json); +@@ -131,10 +126,8 @@ extern void zebra_vxlan_print_specific_neigh_vni(struct vty *vty, + struct zebra_vrf *zvrf, + vni_t vni, struct ipaddr *ip, + bool use_json); +-extern void zebra_vxlan_print_neigh_vni_vtep(struct vty *vty, +- struct zebra_vrf *zvrf, vni_t vni, +- struct in_addr vtep_ip, +- bool use_json); ++extern void zebra_vxlan_print_neigh_vni_vtep(struct vty *vty, struct zebra_vrf *zvrf, vni_t vni, ++ struct ipaddr *vtep_ip, bool use_json); + extern void zebra_vxlan_print_neigh_vni_dad(struct vty *vty, + struct zebra_vrf *zvrf, vni_t vni, + bool use_json); +@@ -176,8 +169,7 @@ extern int zebra_vxlan_local_mac_add_update(struct interface *ifp, + extern int zebra_vxlan_local_mac_del(struct interface *ifp, + struct interface *br_if, + struct ethaddr *mac, vlanid_t vid); +-extern int zebra_vxlan_check_readd_vtep(struct interface *ifp, vni_t vni, +- struct in_addr vtep_ip); ++extern int zebra_vxlan_check_readd_vtep(struct interface *ifp, vni_t vni, struct ipaddr *vtep_ip); + extern int zebra_vxlan_if_up(struct interface *ifp); + extern int zebra_vxlan_if_down(struct interface *ifp); + extern int zebra_vxlan_if_add(struct interface *ifp); +diff --git a/zebra/zebra_vxlan_if.c b/zebra/zebra_vxlan_if.c +index 5dac46087..c01401cab 100644 +--- a/zebra/zebra_vxlan_if.c ++++ b/zebra/zebra_vxlan_if.c +@@ -118,7 +118,7 @@ static int zebra_vxlan_if_del_vni(struct interface *ifp, + zebra_vxlan_process_l3vni_oper_down(zl3vni); + + /* remove the association with vxlan_if */ +- memset(&zl3vni->local_vtep_ip, 0, sizeof(struct in_addr)); ++ memset(&zl3vni->local_vtep_ip, 0, sizeof(zl3vni->local_vtep_ip)); + zl3vni->vxlan_if = NULL; + zl3vni->vid = 0; + br_if = zif->brslave_info.br_if; +@@ -192,11 +192,9 @@ static int zebra_vxlan_if_update_vni(struct interface *ifp, + if (zl3vni) { + + if (IS_ZEBRA_DEBUG_VXLAN) +- zlog_debug( +- "Update L3-VNI %u intf %s(%u) VLAN %u local IP %pI4 master %u chg 0x%x", +- vni, ifp->name, ifp->ifindex, vnip->access_vlan, +- &vxl->vtep_ip, zif->brslave_info.bridge_ifindex, +- chgflags); ++ zlog_debug("Update L3-VNI %u intf %s(%u) VLAN %u local IP %pIA master %u chg 0x%x", ++ vni, ifp->name, ifp->ifindex, vnip->access_vlan, &vxl->vtep_ip, ++ zif->brslave_info.bridge_ifindex, chgflags); + + /* Removed from bridge? Cleanup and return */ + if (CHECK_FLAG(chgflags, ZEBRA_VXLIF_MASTER_CHANGE) && +@@ -269,11 +267,9 @@ static int zebra_vxlan_if_update_vni(struct interface *ifp, + } + + if (IS_ZEBRA_DEBUG_VXLAN) +- zlog_debug( +- "Update L2-VNI %u intf %s(%u) VLAN %u local IP %pI4 master %u chg 0x%x", +- vni, ifp->name, ifp->ifindex, vnip->access_vlan, +- &vxl->vtep_ip, zif->brslave_info.bridge_ifindex, +- chgflags); ++ zlog_debug("Update L2-VNI %u intf %s(%u) VLAN %u local IP %pIA master %u chg 0x%x", ++ vni, ifp->name, ifp->ifindex, vnip->access_vlan, &vxl->vtep_ip, ++ zif->brslave_info.bridge_ifindex, chgflags); + + /* Removed from bridge? Cleanup and return */ + if (CHECK_FLAG(chgflags, ZEBRA_VXLIF_MASTER_CHANGE) && +@@ -301,11 +297,10 @@ static int zebra_vxlan_if_update_vni(struct interface *ifp, + vnip->access_vlan = access_vlan; + } + +- if (zevpn->local_vtep_ip.s_addr != vxl->vtep_ip.s_addr || +- zevpn->mcast_grp.s_addr != vnip->mcast_grp.s_addr) { +- zebra_vxlan_sg_deref(zevpn->local_vtep_ip, +- zevpn->mcast_grp); +- zebra_vxlan_sg_ref(vxl->vtep_ip, vnip->mcast_grp); ++ if (!ipaddr_is_same(&zevpn->local_vtep_ip, &vxl->vtep_ip) || ++ !IPV4_ADDR_SAME(&zevpn->mcast_grp, &vnip->mcast_grp)) { ++ zebra_vxlan_sg_deref(&zevpn->local_vtep_ip, zevpn->mcast_grp); ++ zebra_vxlan_sg_ref(&vxl->vtep_ip, vnip->mcast_grp); + zevpn->local_vtep_ip = vxl->vtep_ip; + zevpn->mcast_grp = vnip->mcast_grp; + /* on local vtep-ip check if ES orig-ip +@@ -386,11 +381,9 @@ static int zebra_vxlan_if_add_vni(struct interface *ifp, + + /* process if-add for l3-vni*/ + if (IS_ZEBRA_DEBUG_VXLAN) +- zlog_debug( +- "Add L3-VNI %u intf %s(%u) VLAN %u local IP %pI4 master %u", +- vni, ifp->name, ifp->ifindex, vnip->access_vlan, +- &vxl->vtep_ip, +- zif->brslave_info.bridge_ifindex); ++ zlog_debug("Add L3-VNI %u intf %s(%u) VLAN %u local IP %pIA master %u", vni, ++ ifp->name, ifp->ifindex, vnip->access_vlan, &vxl->vtep_ip, ++ zif->brslave_info.bridge_ifindex); + + /* associate with vxlan_if */ + zl3vni->local_vtep_ip = vxl->vtep_ip; +@@ -420,11 +413,10 @@ static int zebra_vxlan_if_add_vni(struct interface *ifp, + if (!zevpn) + zevpn = zebra_evpn_add(vni); + +- if (zevpn->local_vtep_ip.s_addr != vxl->vtep_ip.s_addr || +- zevpn->mcast_grp.s_addr != vnip->mcast_grp.s_addr) { +- zebra_vxlan_sg_deref(zevpn->local_vtep_ip, +- zevpn->mcast_grp); +- zebra_vxlan_sg_ref(vxl->vtep_ip, vnip->mcast_grp); ++ if (!ipaddr_is_same(&zevpn->local_vtep_ip, &vxl->vtep_ip) || ++ !IPV4_ADDR_SAME(&zevpn->mcast_grp, &vnip->mcast_grp)) { ++ zebra_vxlan_sg_deref(&zevpn->local_vtep_ip, zevpn->mcast_grp); ++ zebra_vxlan_sg_ref(&vxl->vtep_ip, vnip->mcast_grp); + zevpn->local_vtep_ip = vxl->vtep_ip; + zevpn->mcast_grp = vnip->mcast_grp; + /* on local vtep-ip check if ES orig-ip +@@ -446,13 +438,10 @@ static int zebra_vxlan_if_add_vni(struct interface *ifp, + } + + if (IS_ZEBRA_DEBUG_VXLAN) +- zlog_debug( +- "Add L2-VNI %u VRF %s intf %s(%u) VLAN %u local IP %pI4 mcast_grp %pI4 master %u", +- vni, +- vlan_if ? vlan_if->vrf->name : VRF_DEFAULT_NAME, +- ifp->name, ifp->ifindex, vnip->access_vlan, +- &vxl->vtep_ip, &vnip->mcast_grp, +- zif->brslave_info.bridge_ifindex); ++ zlog_debug("Add L2-VNI %u VRF %s intf %s(%u) VLAN %u local IP %pIA mcast_grp %pI4 master %u", ++ vni, vlan_if ? vlan_if->vrf->name : VRF_DEFAULT_NAME, ifp->name, ++ ifp->ifindex, vnip->access_vlan, &vxl->vtep_ip, &vnip->mcast_grp, ++ zif->brslave_info.bridge_ifindex); + + /* If down or not mapped to a bridge, we're done. */ + if (!if_is_operative(ifp) || !zif->brslave_info.br_if) +diff --git a/zebra/zebra_vxlan_private.h b/zebra/zebra_vxlan_private.h +index 002fc7db8..87df4362a 100644 +--- a/zebra/zebra_vxlan_private.h ++++ b/zebra/zebra_vxlan_private.h +@@ -40,7 +40,7 @@ struct zebra_l3vni { + struct interface *bridge_if; + + /* Local IP */ +- struct in_addr local_vtep_ip; ++ struct ipaddr local_vtep_ip; + + /* kernel interface for l3vni */ + struct interface *vxlan_if; +@@ -253,10 +253,8 @@ extern void zebra_vxlan_sync_mac_dp_install(struct zebra_mac *mac, + bool force_clear_static, + const char *caller); + extern bool zebra_evpn_do_dup_addr_detect(struct zebra_vrf *zvrf); +-extern void zebra_vxlan_sg_ref(struct in_addr local_vtep_ip, +- struct in_addr mcast_grp); +-extern void zebra_vxlan_sg_deref(struct in_addr local_vtep_ip, +- struct in_addr mcast_grp); ++extern void zebra_vxlan_sg_ref(struct ipaddr *local_vtep_ip, struct in_addr mcast_grp); ++extern void zebra_vxlan_sg_deref(struct ipaddr *local_vtep_ip, struct in_addr mcast_grp); + extern void zebra_vxlan_process_l3vni_oper_up(struct zebra_l3vni *zl3vni); + extern void zebra_vxlan_process_l3vni_oper_down(struct zebra_l3vni *zl3vni); + extern int zebra_evpn_vxlan_del(struct zebra_evpn *zevpn); +-- +2.43.0 + diff --git a/src/sonic-frr/patch/0038-zebra-Use-RTA_VIA-for-IPv4-hosts-over-IPv6-overlay-f.patch b/src/sonic-frr/patch/0038-zebra-Use-RTA_VIA-for-IPv4-hosts-over-IPv6-overlay-f.patch new file mode 100644 index 00000000000..106d099bced --- /dev/null +++ b/src/sonic-frr/patch/0038-zebra-Use-RTA_VIA-for-IPv4-hosts-over-IPv6-overlay-f.patch @@ -0,0 +1,214 @@ +From c6968fd49690e73e867896efe8453b92ec711141 Mon Sep 17 00:00:00 2001 +From: Mike RE Mallin +Date: Fri, 28 Mar 2025 13:27:19 -0400 +Subject: zebra: Use RTA_VIA for IPv4 hosts over IPv6 overlay forwarding + +This commit enables Kernel forwarding for IPv4 hosts which are reachable +over an IPv6 overlay. The RTA_VIA attribute is used for correct +forwarding in the kernel. + +LWTUNNEL Encapsulation is also updated to use the correct address family +for the underlying gateway address. + +A minor bugfix, when Zebra receives a route add, the nexthop type is +used instead of the route address family in order to decode the EVPN +Nexthop Address correctly. Otherwise it tries to truncate the IPv6 VTEP +address and use it as a IPv4 VTEP... + +Signed-off-by: Mike Mallin + +Co-authored-by: Barry Friedman +(cherry picked from commit d43d3dfda0a18567f737e62ec5219225db8df662) +Signed-off-by: Tamer Ahmed + +diff --git a/zebra/rt_netlink.c b/zebra/rt_netlink.c +index bebad1c6a..cd68c118c 100644 +--- a/zebra/rt_netlink.c ++++ b/zebra/rt_netlink.c +@@ -116,6 +116,28 @@ static bool is_route_v4_over_v6(unsigned char rtm_family, + return false; + } + ++static bool add_v4_over_v6_rta_via_attr(struct nlmsghdr *nlmsg, size_t req_size, ++ const struct nexthop *nexthop) ++{ ++ struct gw_family_t gw_fam = { ++ .family = AF_INET6, ++ }; ++ uint addr_num_bytes; ++ ++ if (nexthop->type == NEXTHOP_TYPE_IPV6 || nexthop->type == NEXTHOP_TYPE_IPV6_IFINDEX) { ++ gw_fam.family = AF_INET6; ++ memcpy(&gw_fam.gate.ipv6, &nexthop->gate.ipv6, sizeof(nexthop->gate.ipv6)); ++ addr_num_bytes = sizeof(nexthop->gate.ipv6); ++ } else { ++ gw_fam.family = AF_INET; ++ memcpy(&gw_fam.gate.ipv4, &ipv4_ll, sizeof(nexthop->gate.ipv4)); ++ addr_num_bytes = sizeof(nexthop->gate.ipv4); ++ } ++ ++ return nl_attr_put(nlmsg, req_size, RTA_VIA, &gw_fam.family, ++ addr_num_bytes + sizeof(gw_fam.family)); ++} ++ + /* Helper to control use of kernel-level nexthop ids */ + static bool kernel_nexthops_supported(void) + { +@@ -1715,7 +1737,7 @@ static bool _netlink_nexthop_encode_dvni_label(const struct nexthop *nexthop, + return false; + + } else { +- if (!nl_attr_put(nlmsg, buflen, LWTUNNEL_IP_DST, ++ if (!nl_attr_put(nlmsg, buflen, LWTUNNEL_IP6_DST, + &nexthop->gate.ipv6, 16)) + return false; + } +@@ -2108,7 +2130,7 @@ static bool _netlink_route_build_singlepath(const struct prefix *p, + + if (is_route_v4_over_v6(rtmsg->rtm_family, nexthop->type)) { + rtmsg->rtm_flags |= RTNH_F_ONLINK; +- if (!nl_attr_put(nlmsg, req_size, RTA_GATEWAY, &ipv4_ll, 4)) ++ if (!add_v4_over_v6_rta_via_attr(nlmsg, req_size, nexthop)) + return false; + if (!nl_attr_put32(nlmsg, req_size, RTA_OIF, nexthop->ifindex)) + return false; +@@ -2119,11 +2141,16 @@ static bool _netlink_route_build_singlepath(const struct prefix *p, + return false; + } + +- if (IS_ZEBRA_DEBUG_KERNEL) +- zlog_debug("%s: 5549 (%s): %pFX nexthop via %s %s if %u vrf %u", +- __func__, routedesc, p, ipv4_ll_buf, +- label_buf, nexthop->ifindex, ++ if (IS_ZEBRA_DEBUG_KERNEL) { ++ inet_ntop(nexthop->type == NEXTHOP_TYPE_IPV6 || ++ nexthop->type == NEXTHOP_TYPE_IPV6_IFINDEX ++ ? AF_INET6 ++ : AF_INET, ++ &nexthop->gate, addrstr, sizeof(addrstr)); ++ zlog_debug("%s: 5549 (%s): %pFX nexthop via %s %s if %u vrf %u", __func__, ++ routedesc, p, addrstr, label_buf, nexthop->ifindex, + nexthop->vrf_id); ++ } + return true; + } + +@@ -2152,8 +2179,8 @@ static bool _netlink_route_build_singlepath(const struct prefix *p, + } + } + +- if (nexthop->type == NEXTHOP_TYPE_IPV6 +- || nexthop->type == NEXTHOP_TYPE_IPV6_IFINDEX) { ++ if (!is_route_v4_over_v6(rtmsg->rtm_family, nexthop->type) && ++ (nexthop->type == NEXTHOP_TYPE_IPV6 || nexthop->type == NEXTHOP_TYPE_IPV6_IFINDEX)) { + if (!_netlink_route_add_gateway_info(rtmsg->rtm_family, + AF_INET6, nlmsg, req_size, + bytelen, nexthop)) +@@ -2293,6 +2320,7 @@ static bool _netlink_route_build_multipath(const struct prefix *p, + { + char label_buf[256]; + struct rtnexthop *rtnh; ++ char addrstr[INET6_ADDRSTRLEN]; + + rtnh = nl_attr_rtnh(nlmsg, req_size); + if (rtnh == NULL) +@@ -2309,7 +2337,7 @@ static bool _netlink_route_build_multipath(const struct prefix *p, + + if (is_route_v4_over_v6(rtmsg->rtm_family, nexthop->type)) { + rtnh->rtnh_flags |= RTNH_F_ONLINK; +- if (!nl_attr_put(nlmsg, req_size, RTA_GATEWAY, &ipv4_ll, 4)) ++ if (!add_v4_over_v6_rta_via_attr(nlmsg, req_size, nexthop)) + return false; + rtnh->rtnh_ifindex = nexthop->ifindex; + if (nexthop->weight) +@@ -2320,11 +2348,16 @@ static bool _netlink_route_build_multipath(const struct prefix *p, + else if (nexthop->src.ipv4.s_addr != INADDR_ANY) + *src = &nexthop->src; + +- if (IS_ZEBRA_DEBUG_KERNEL) +- zlog_debug( +- "%s: 5549 (%s): %pFX nexthop via %s %s if %u vrf %u", +- __func__, routedesc, p, ipv4_ll_buf, label_buf, +- nexthop->ifindex, nexthop->vrf_id); ++ if (IS_ZEBRA_DEBUG_KERNEL) { ++ inet_ntop(nexthop->type == NEXTHOP_TYPE_IPV6 || ++ nexthop->type == NEXTHOP_TYPE_IPV6_IFINDEX ++ ? AF_INET6 ++ : AF_INET, ++ &nexthop->gate, addrstr, sizeof(addrstr)); ++ zlog_debug("%s: 5549 (%s): %pFX nexthop via %s %s if %u vrf %u", __func__, ++ routedesc, p, addrstr, label_buf, nexthop->ifindex, ++ nexthop->vrf_id); ++ } + nl_attr_rtnh_end(nlmsg, rtnh); + return true; + } +@@ -2346,8 +2379,9 @@ static bool _netlink_route_build_multipath(const struct prefix *p, + __func__, routedesc, p, &nexthop->gate.ipv4, + label_buf, nexthop->ifindex, nexthop->vrf_id); + } +- if (nexthop->type == NEXTHOP_TYPE_IPV6 +- || nexthop->type == NEXTHOP_TYPE_IPV6_IFINDEX) { ++ ++ if (!is_route_v4_over_v6(rtmsg->rtm_family, nexthop->type) && ++ (nexthop->type == NEXTHOP_TYPE_IPV6 || nexthop->type == NEXTHOP_TYPE_IPV6_IFINDEX)) { + if (!_netlink_route_add_gateway_info(rtmsg->rtm_family, + AF_INET6, nlmsg, req_size, + bytelen, nexthop)) +@@ -3230,11 +3264,15 @@ ssize_t netlink_nexthop_msg_encode(uint16_t cmd, + const struct nexthop *nh = + dplane_ctx_get_nhe_ng(ctx)->nexthop; + afi_t afi = dplane_ctx_get_nhe_afi(ctx); ++ enum lwtunnel_encap_types nh_afi = LWTUNNEL_ENCAP_IP; + +- if (afi == AFI_IP) ++ if (afi == AFI_IP) { + req->nhm.nh_family = AF_INET; +- else if (afi == AFI_IP6) ++ nh_afi = LWTUNNEL_ENCAP_IP; ++ } else if (afi == AFI_IP6) { + req->nhm.nh_family = AF_INET6; ++ nh_afi = LWTUNNEL_ENCAP_IP6; ++ } + + switch (nh->type) { + case NEXTHOP_TYPE_IPV4: +@@ -3284,7 +3322,7 @@ ssize_t netlink_nexthop_msg_encode(uint16_t cmd, + if (num_labels && nh->nh_label_type == ZEBRA_LSP_EVPN) { + if (!nl_attr_put16(&req->n, buflen, + NHA_ENCAP_TYPE, +- LWTUNNEL_ENCAP_IP)) ++ nh_afi)) + return 0; + + nest = nl_attr_nest(&req->n, buflen, NHA_ENCAP); +diff --git a/zebra/zebra_rib.c b/zebra/zebra_rib.c +index 8ed455bbf..c4e30957e 100644 +--- a/zebra/zebra_rib.c ++++ b/zebra/zebra_rib.c +@@ -2830,12 +2830,20 @@ static void process_subq_early_route_add(struct zebra_early_route *ere) + if (CHECK_FLAG(tmp_nh->flags, NEXTHOP_FLAG_EVPN)) { + struct ipaddr vtep_ip = {}; + +- if (ere->afi == AFI_IP) { ++ switch (tmp_nh->type) { ++ case NEXTHOP_TYPE_IPV4_IFINDEX: + vtep_ip.ipa_type = IPADDR_V4; + vtep_ip.ipaddr_v4 = tmp_nh->gate.ipv4; +- } else { ++ break; ++ case NEXTHOP_TYPE_IPV6_IFINDEX: + vtep_ip.ipa_type = IPADDR_V6; + vtep_ip.ipaddr_v6 = tmp_nh->gate.ipv6; ++ break; ++ case NEXTHOP_TYPE_IFINDEX: ++ case NEXTHOP_TYPE_IPV4: ++ case NEXTHOP_TYPE_IPV6: ++ case NEXTHOP_TYPE_BLACKHOLE: ++ continue; + } + zebra_rib_queue_evpn_route_add(tmp_nh->vrf_id, &tmp_nh->rmac, + &vtep_ip, &ere->p); +-- +2.43.0 + diff --git a/src/sonic-frr/patch/0039-bgpd-Make-BGP-V6-VTEP-Aware-for-Single-Homing-VxLAN.patch b/src/sonic-frr/patch/0039-bgpd-Make-BGP-V6-VTEP-Aware-for-Single-Homing-VxLAN.patch new file mode 100644 index 00000000000..e52f5ac7db7 --- /dev/null +++ b/src/sonic-frr/patch/0039-bgpd-Make-BGP-V6-VTEP-Aware-for-Single-Homing-VxLAN.patch @@ -0,0 +1,1479 @@ +From cba0035833d0becf3bc1c89757dde93aef9575aa Mon Sep 17 00:00:00 2001 +From: Mike RE Mallin +Date: Mon, 31 Mar 2025 17:20:27 -0400 +Subject: bgpd: Make BGP V6 VTEP Aware for Single Homing VxLAN + +- %pI4 -> %pIA +- struct in_addr -> struct ip_addr +- Added zebra IPv6 VTEP handling code behind #if 0 (will enable in next + commit with the topotests for Single Homed IPv6 VTEP) +- Use either "mp_nexthop_global_in" (IPv4 VTEP) or "mp_nexthop_global" + (IPv6 VTEP) for sending/receiving the nexthop of the route +- Show commands with a VTEP filter will be extended for IPv6 support in + an upcoming commit + +Signed-off-by: Mike Mallin + +Co-authored-by: Tarek Saad +(cherry picked from commit be3aaddb71eb8082ac0a9bd855234a33fa3308c3) +Signed-off-by: Tamer Ahmed + +diff --git a/bgpd/bgp_debug.c b/bgpd/bgp_debug.c +index c26150c58..321341e3d 100644 +--- a/bgpd/bgp_debug.c ++++ b/bgpd/bgp_debug.c +@@ -651,8 +651,9 @@ static void bgp_debug_print_evpn_prefix(struct vty *vty, const char *desc, + } + } else if (p->u.prefix_evpn.route_type == BGP_EVPN_IMET_ROUTE) { + snprintfrr(evpn_desc, sizeof(evpn_desc), +- "l2vpn evpn type multicast ip %pI4", +- &p->u.prefix_evpn.imet_addr.ip.ipaddr_v4); ++ "l2vpn evpn type multicast ip %pIA", ++ &p->u.prefix_evpn.imet_addr.ip); ++ + } else if (p->u.prefix_evpn.route_type == BGP_EVPN_IP_PREFIX_ROUTE) { + uint8_t family = is_evpn_prefix_ipaddr_v4( + (struct prefix_evpn *)p) ? AF_INET +@@ -707,7 +708,7 @@ static int bgp_debug_parse_evpn_prefix(struct vty *vty, struct cmd_token **argv, + } + + build_evpn_type3_prefix((struct prefix_evpn *)argv_p, +- ip.ipaddr_v4); ++ &ip); + } else if (evpn_type == BGP_EVPN_IP_PREFIX_ROUTE) { + struct prefix ip_prefix; + +diff --git a/bgpd/bgp_evpn.c b/bgpd/bgp_evpn.c +index c70911e5c..92789b424 100644 +--- a/bgpd/bgp_evpn.c ++++ b/bgpd/bgp_evpn.c +@@ -77,7 +77,12 @@ static void bgp_evpn_remote_ip_hash_link_nexthop(struct hash_bucket *bucket, + void *args); + static void bgp_evpn_remote_ip_hash_unlink_nexthop(struct hash_bucket *bucket, + void *args); +-static struct in_addr zero_vtep_ip; ++static struct ipaddr zero_vtep_ip = { ++ .ipa_type = IPADDR_V4, ++ .ip = { ++ ._v4_addr = {0}, ++ } ++}; + + static uint32_t bgp_evpn_addpath_id_for_path(const struct bgp *bgp, const struct bgp_path_info *pi, + afi_t afi); +@@ -913,12 +918,12 @@ struct bgp_dest *bgp_evpn_vni_node_lookup(const struct bgpevpn *vpn, + */ + static enum zclient_send_status bgp_zebra_send_remote_macip( + struct bgp *bgp, struct bgpevpn *vpn, const struct prefix_evpn *p, +- const struct ethaddr *mac, struct in_addr remote_vtep_ip, int add, ++ const struct ethaddr *mac, struct ipaddr *remote_vtep_ip, int add, + uint8_t flags, uint32_t seq, esi_t *esi) + { + struct stream *s; + uint16_t ipa_len; +- static struct in_addr zero_remote_vtep_ip; ++ static struct ipaddr zero_remote_vtep_ip = { .ipa_type = IPADDR_V4, .ipaddr_v4 = { INADDR_ANY } }; + bool esi_valid; + + /* Check socket. */ +@@ -967,10 +972,18 @@ static enum zclient_send_status bgp_zebra_send_remote_macip( + */ + if (bgp_evpn_is_esi_valid(esi)) { + esi_valid = true; +- stream_put_in_addr(s, &zero_remote_vtep_ip); ++#if 1 ++ stream_put_in_addr(s, &zero_remote_vtep_ip.ipaddr_v4); ++#else ++ stream_put_ipaddr(s, &zero_remote_vtep_ip); ++#endif /* 1 */ + } else { + esi_valid = false; +- stream_put_in_addr(s, &remote_vtep_ip); ++#if 1 ++ stream_put_in_addr(s, &remote_vtep_ip->ipaddr_v4); ++#else ++ stream_put_ipaddr(s, &remote_vtep_ip); ++#endif + } + + /* TX flags - MAC sticky status and/or gateway mac */ +@@ -991,10 +1004,10 @@ static enum zclient_send_status bgp_zebra_send_remote_macip( + else + snprintf(esi_buf, sizeof(esi_buf), "-"); + zlog_debug( +- "Tx %s MACIP, VNI %u MAC %pEA IP %pIA flags 0x%x seq %u remote VTEP %pI4 esi %s", ++ "Tx %s MACIP, VNI %u MAC %pEA IP %pIA flags 0x%x seq %u remote VTEP %pIA esi %s", + add ? "ADD" : "DEL", (vpn ? vpn->vni : 0), + (mac ? mac : &p->prefix.macip_addr.mac), +- &p->prefix.macip_addr.ip, flags, seq, &remote_vtep_ip, ++ &p->prefix.macip_addr.ip, flags, seq, remote_vtep_ip, + esi_buf); + } + +@@ -1038,23 +1051,27 @@ bgp_zebra_send_remote_vtep(struct bgp *bgp, struct bgpevpn *vpn, + s, add ? ZEBRA_REMOTE_VTEP_ADD : ZEBRA_REMOTE_VTEP_DEL, + bgp->vrf_id); + stream_putl(s, vpn ? vpn->vni : 0); +- if (is_evpn_prefix_ipaddr_v4(p)) +- stream_put_in_addr(s, &p->prefix.imet_addr.ip.ipaddr_v4); +- else if (is_evpn_prefix_ipaddr_v6(p)) { +- flog_err( +- EC_BGP_VTEP_INVALID, +- "Bad remote IP when trying to %s remote VTEP for VNI %u", +- add ? "ADD" : "DEL", (vpn ? vpn->vni : 0)); +- return ZCLIENT_SEND_FAILURE; +- } ++#if 1 ++ if (is_evpn_prefix_ipaddr_v4(p)) ++ stream_put_in_addr(s, &p->prefix.imet_addr.ip.ipaddr_v4); ++ else if (is_evpn_prefix_ipaddr_v6(p)) { ++ flog_err( ++ EC_BGP_VTEP_INVALID, ++ "Bad remote IP when trying to %s remote VTEP for VNI %u", ++ add ? "ADD" : "DEL", (vpn ? vpn->vni : 0)); ++ return ZCLIENT_SEND_FAILURE; ++ } ++#else ++ stream_put_ipaddr(s, &p->prefix.imet_addr.ip); ++#endif + stream_putl(s, flood_control); + + stream_putw_at(s, 0, stream_get_endp(s)); + + if (bgp_debug_zebra(NULL)) +- zlog_debug("Tx %s Remote VTEP, VNI %u (flood control %d) remote VTEP %pI4", ++ zlog_debug("Tx %s Remote VTEP, VNI %u (flood control %d) remote VTEP %pIA", + add ? "ADD" : "DEL", (vpn ? vpn->vni : 0), flood_control, +- &p->prefix.imet_addr.ip.ipaddr_v4); ++ &p->prefix.imet_addr.ip); + + frrtrace(3, frr_bgp, evpn_bum_vtep_zsend, add, vpn, p); + +@@ -1292,6 +1309,7 @@ enum zclient_send_status evpn_zebra_install(struct bgp *bgp, struct bgpevpn *vpn + int flood_control = VXLAN_FLOOD_DISABLED; + uint32_t seq; + enum zclient_send_status ret = ZCLIENT_SEND_SUCCESS; ++ struct ipaddr vtep_ip; + + if (p->prefix.route_type == BGP_EVPN_MAC_IP_ROUTE) { + flags = 0; +@@ -1342,13 +1360,26 @@ enum zclient_send_status evpn_zebra_install(struct bgp *bgp, struct bgpevpn *vpn + ZEBRA_MACIP_TYPE_PROXY_ADVERT); + } + ++ uint8_t nhfamily = NEXTHOP_FAMILY(pi->attr->mp_nexthop_len); ++ ++ switch (nhfamily) { ++ case AF_INET: ++ SET_IPADDR_V4(&vtep_ip); ++ vtep_ip.ipaddr_v4 = pi->attr->mp_nexthop_global_in; ++ break; ++ case AF_INET6: ++ SET_IPADDR_V6(&vtep_ip); ++ IPV6_ADDR_COPY(&vtep_ip.ipaddr_v6, &pi->attr->mp_nexthop_global); ++ break; ++ } ++ + ret = bgp_zebra_send_remote_macip( + bgp, vpn, p, + (is_evpn_prefix_ipaddr_none(p) + ? NULL /* MAC update */ + : evpn_type2_path_info_get_mac( + pi) /* MAC-IP update */), +- pi->attr->nexthop, 1, flags, seq, ++ &vtep_ip, 1, flags, seq, + bgp_evpn_attr_get_esi(pi->attr)); + } else if (p->prefix.route_type == BGP_EVPN_AD_ROUTE) { + ret = bgp_evpn_remote_es_evi_add(bgp, vpn, p); +@@ -1386,6 +1417,22 @@ enum zclient_send_status evpn_zebra_uninstall(struct bgp *bgp, + bool is_sync) + { + enum zclient_send_status ret = ZCLIENT_SEND_SUCCESS; ++ struct ipaddr vtep_ip; ++ ++ if (p->prefix.route_type == BGP_EVPN_MAC_IP_ROUTE) { ++ uint8_t nhfamily = NEXTHOP_FAMILY(pi->attr->mp_nexthop_len); ++ ++ switch (nhfamily) { ++ case AF_INET: ++ SET_IPADDR_V4(&vtep_ip); ++ vtep_ip.ipaddr_v4 = pi->attr->mp_nexthop_global_in; ++ break; ++ case AF_INET6: ++ SET_IPADDR_V6(&vtep_ip); ++ IPV6_ADDR_COPY(&vtep_ip.ipaddr_v6, &pi->attr->mp_nexthop_global); ++ break; ++ } ++ } + + if (p->prefix.route_type == BGP_EVPN_MAC_IP_ROUTE) + ret = bgp_zebra_send_remote_macip( +@@ -1394,7 +1441,7 @@ enum zclient_send_status evpn_zebra_uninstall(struct bgp *bgp, + ? NULL /* MAC update */ + : evpn_type2_path_info_get_mac( + pi) /* MAC-IP update */), +- (is_sync ? zero_vtep_ip : pi->attr->nexthop), 0, 0, 0, ++ (is_sync ? &zero_vtep_ip : &vtep_ip), 0, 0, 0, + NULL); + else if (p->prefix.route_type == BGP_EVPN_AD_ROUTE) + ret = bgp_evpn_remote_es_evi_del(bgp, vpn, p); +@@ -1751,13 +1798,21 @@ static int update_evpn_type5_route(struct bgp *bgp_vrf, struct prefix_evpn *evp, + */ + if (!bgp_vrf->evpn_info->advertise_pip || + (!bgp_vrf->evpn_info->is_anycast_mac)) { +- attr.nexthop = bgp_vrf->originator_ip; +- attr.mp_nexthop_global_in = bgp_vrf->originator_ip; ++ if (IS_IPADDR_V4(&bgp_vrf->originator_ip)) { ++ attr.nexthop = bgp_vrf->originator_ip.ipaddr_v4; ++ attr.mp_nexthop_global_in = bgp_vrf->originator_ip.ipaddr_v4; ++ attr.mp_nexthop_len = BGP_ATTR_NHLEN_IPV4; ++ } else { ++ IPV6_ADDR_COPY(&attr.mp_nexthop_global, &bgp_vrf->originator_ip.ipaddr_v6); ++ attr.mp_nexthop_len = BGP_ATTR_NHLEN_IPV6_GLOBAL; ++ } + memcpy(&attr.rmac, &bgp_vrf->rmac, ETH_ALEN); + } else { + /* copy sys rmac */ + memcpy(&attr.rmac, &bgp_vrf->evpn_info->pip_rmac, ETH_ALEN); ++ attr.mp_nexthop_len = BGP_ATTR_NHLEN_IPV4; + if (bgp_vrf->evpn_info->pip_ip.s_addr != INADDR_ANY) { ++ /* V6_VTEP_PR_QUESTION: only V4 is configurable for PIP? */ + attr.nexthop = bgp_vrf->evpn_info->pip_ip; + attr.mp_nexthop_global_in = bgp_vrf->evpn_info->pip_ip; + } else if (bgp_vrf->evpn_info->pip_ip.s_addr == INADDR_ANY) +@@ -1769,15 +1824,13 @@ static int update_evpn_type5_route(struct bgp *bgp_vrf, struct prefix_evpn *evp, + + if (bgp_debug_zebra(NULL)) + zlog_debug( +- "VRF %s type-5 route evp %pFX RMAC %pEA nexthop %pI4", ++ "VRF %s type-5 route evp %pFX RMAC %pEA nexthop %pI4 mp_nexthop %pI6", + vrf_id_to_name(bgp_vrf->vrf_id), evp, &attr.rmac, +- &attr.nexthop); ++ &attr.nexthop, &attr.mp_nexthop_global); + + frrtrace(4, frr_bgp, evpn_advertise_type5, bgp_vrf->vrf_id, evp, + &attr.rmac, attr.nexthop); + +- attr.mp_nexthop_len = BGP_ATTR_NHLEN_IPV4; +- + if (src_afi == AFI_IP6 && + CHECK_FLAG(bgp_vrf->af_flags[AFI_L2VPN][SAFI_EVPN], + BGP_L2VPN_EVPN_ADV_IPV6_UNICAST_GW_IP)) { +@@ -2257,9 +2310,14 @@ static int update_evpn_route(struct bgp *bgp, struct bgpevpn *vpn, + + /* Build path-attribute for this route. */ + bgp_attr_default_set(&attr, bgp, BGP_ORIGIN_IGP); +- attr.nexthop = vpn->originator_ip; +- attr.mp_nexthop_global_in = vpn->originator_ip; +- attr.mp_nexthop_len = BGP_ATTR_NHLEN_IPV4; ++ if (IS_IPADDR_V4(&vpn->originator_ip)) { ++ attr.nexthop = vpn->originator_ip.ipaddr_v4; ++ attr.mp_nexthop_global_in = vpn->originator_ip.ipaddr_v4; ++ attr.mp_nexthop_len = BGP_ATTR_NHLEN_IPV4; ++ } else { ++ IPV6_ADDR_COPY(&attr.mp_nexthop_global, &vpn->originator_ip.ipaddr_v6); ++ attr.mp_nexthop_len = BGP_ATTR_NHLEN_IPV6_GLOBAL; ++ } + if (CHECK_FLAG(flags, ZEBRA_MACIP_TYPE_STICKY)) + SET_FLAG(attr.evpn_flags, ATTR_EVPN_FLAG_STICKY); + if (CHECK_FLAG(flags, ZEBRA_MACIP_TYPE_GW)) +@@ -2294,11 +2352,11 @@ static int update_evpn_route(struct bgp *bgp, struct bgpevpn *vpn, + char buf3[ESI_STR_LEN]; + + zlog_debug( +- "VRF %s vni %u type-%u route evp %pFX RMAC %pEA nexthop %pI4 esi %s", ++ "VRF %s vni %u type-%u route evp %pFX RMAC %pEA nexthop %pIA esi %s", + vpn->bgp_vrf ? vrf_id_to_name(vpn->bgp_vrf->vrf_id) + : "None", + vpn->vni, p->prefix.route_type, p, &attr.rmac, +- &attr.mp_nexthop_global_in, ++ &vpn->originator_ip, + esi_to_str(esi, buf3, sizeof(buf3))); + } + +@@ -2559,9 +2617,14 @@ void bgp_evpn_update_type2_route_entry(struct bgp *bgp, struct bgpevpn *vpn, + * attributes will be shared in the hash table. + */ + bgp_attr_default_set(&attr, bgp, BGP_ORIGIN_IGP); +- attr.nexthop = vpn->originator_ip; +- attr.mp_nexthop_global_in = vpn->originator_ip; +- attr.mp_nexthop_len = BGP_ATTR_NHLEN_IPV4; ++ if (IS_IPADDR_V4(&vpn->originator_ip)) { ++ attr.nexthop = vpn->originator_ip.ipaddr_v4; ++ attr.mp_nexthop_global_in = vpn->originator_ip.ipaddr_v4; ++ attr.mp_nexthop_len = BGP_ATTR_NHLEN_IPV4; ++ } else { ++ IPV6_ADDR_COPY(&attr.mp_nexthop_global, &vpn->originator_ip.ipaddr_v6); ++ attr.mp_nexthop_len = BGP_ATTR_NHLEN_IPV6_GLOBAL; ++ } + attr.evpn_flags = local_pi->attr->evpn_flags; + attr.es_flags = local_pi->attr->es_flags; + if (CHECK_FLAG(local_pi->attr->evpn_flags, ATTR_EVPN_FLAG_DEFAULT_GW)) { +@@ -2892,7 +2955,7 @@ int update_routes_for_vni(struct bgp *bgp, struct bgpevpn *vpn) + */ + if (bgp_evpn_vni_flood_mode_get(bgp, vpn) + == VXLAN_FLOOD_HEAD_END_REPL) { +- build_evpn_type3_prefix(&p, vpn->originator_ip); ++ build_evpn_type3_prefix(&p, &vpn->originator_ip); + ret = update_evpn_route(bgp, vpn, &p, 0, 0, NULL); + if (ret) + return ret; +@@ -2933,7 +2996,7 @@ static int delete_routes_for_vni(struct bgp *bgp, struct bgpevpn *vpn) + */ + delete_all_type2_routes(bgp, vpn); + +- build_evpn_type3_prefix(&p, vpn->originator_ip); ++ build_evpn_type3_prefix(&p, &vpn->originator_ip); + + /* + * To handle the following scenario: +@@ -2971,7 +3034,7 @@ static int bgp_evpn_mcast_grp_change(struct bgp *bgp, struct bgpevpn *vpn, + vpn->mcast_grp = mcast_grp; + + if (is_vni_live(vpn)) { +- build_evpn_type3_prefix(&p, vpn->originator_ip); ++ build_evpn_type3_prefix(&p, &vpn->originator_ip); + delete_evpn_route(bgp, vpn, &p); + } + +@@ -2989,10 +3052,10 @@ static int bgp_evpn_mcast_grp_change(struct bgp *bgp, struct bgpevpn *vpn, + */ + static void handle_tunnel_ip_change(struct bgp *bgp_vrf, struct bgp *bgp_evpn, + struct bgpevpn *vpn, +- struct in_addr originator_ip) ++ struct ipaddr *originator_ip) + { + struct prefix_evpn p; +- struct in_addr old_vtep_ip; ++ struct ipaddr old_vtep_ip; + + if (bgp_vrf) /* L3VNI */ + old_vtep_ip = bgp_vrf->originator_ip; +@@ -3000,20 +3063,20 @@ static void handle_tunnel_ip_change(struct bgp *bgp_vrf, struct bgp *bgp_evpn, + old_vtep_ip = vpn->originator_ip; + + /* TIP didn't change, nothing to do */ +- if (IPV4_ADDR_SAME(&old_vtep_ip, &originator_ip)) ++ if (ipaddr_is_same(&old_vtep_ip, originator_ip)) + return; + + /* If L2VNI is not live, we only need to update the originator_ip. + * L3VNIs are updated immediately, so we can't bail out early. + */ + if (!bgp_vrf && !is_vni_live(vpn)) { +- vpn->originator_ip = originator_ip; ++ vpn->originator_ip = *originator_ip; + return; + } + + /* Update the tunnel-ip hash */ + bgp_tip_del(bgp_evpn, &old_vtep_ip); +- if (bgp_tip_add(bgp_evpn, &originator_ip)) ++ if (bgp_tip_add(bgp_evpn, originator_ip)) + /* The originator_ip was not already present in the + * bgp martian next-hop table as a tunnel-ip, so we + * need to go back and filter routes matching the new +@@ -3026,12 +3089,12 @@ static void handle_tunnel_ip_change(struct bgp *bgp_vrf, struct bgp *bgp_evpn, + /* Need to withdraw type-3 route as the originator IP is part + * of the key. + */ +- build_evpn_type3_prefix(&p, vpn->originator_ip); ++ build_evpn_type3_prefix(&p, &vpn->originator_ip); + delete_evpn_route(bgp_evpn, vpn, &p); + +- vpn->originator_ip = originator_ip; ++ vpn->originator_ip = *originator_ip; + } else +- bgp_vrf->originator_ip = originator_ip; ++ bgp_vrf->originator_ip = *originator_ip; + + return; + } +@@ -4696,7 +4759,7 @@ static void update_advertise_vni_routes(struct bgp *bgp, struct bgpevpn *vpn) + */ + if (bgp_evpn_vni_flood_mode_get(bgp, vpn) + == VXLAN_FLOOD_HEAD_END_REPL) { +- build_evpn_type3_prefix(&p, vpn->originator_ip); ++ build_evpn_type3_prefix(&p, &vpn->originator_ip); + dest = bgp_evpn_vni_node_lookup(vpn, &p, NULL); + if (!dest) /* unexpected */ + return; +@@ -4750,7 +4813,7 @@ static int delete_withdraw_vni_routes(struct bgp *bgp, struct bgpevpn *vpn) + delete_global_type2_routes(bgp, vpn); + + /* Remove type-3 route for this VNI from global table. */ +- build_evpn_type3_prefix(&p, vpn->originator_ip); ++ build_evpn_type3_prefix(&p, &vpn->originator_ip); + global_dest = bgp_evpn_global_node_lookup(bgp->rib[afi][safi], safi, &p, + &vpn->prd, NULL); + if (global_dest) { +@@ -4826,7 +4889,7 @@ static void advertise_withdraw_type3(struct hash_bucket *bucket, void *data) + * This is invoked upon flooding mode changing to head-end replication. + */ + if (flood_control == VXLAN_FLOOD_HEAD_END_REPL) { +- build_evpn_type3_prefix(&p, vpn->originator_ip); ++ build_evpn_type3_prefix(&p, &vpn->originator_ip); + if (update_evpn_route(bgp, vpn, &p, 0, 0, NULL)) + flog_err(EC_BGP_EVPN_ROUTE_CREATE, + "Type3 route creation failure for VNI %u", vpn->vni); +@@ -4834,7 +4897,7 @@ static void advertise_withdraw_type3(struct hash_bucket *bucket, void *data) + /* Delete RT-3 for a VNI and schedule for processing and withdrawal. + * This is invoked upon flooding mode changing to drop BUM packets. + */ +- build_evpn_type3_prefix(&p, vpn->originator_ip); ++ build_evpn_type3_prefix(&p, &vpn->originator_ip); + delete_evpn_route(bgp, vpn, &p); + } + } +@@ -5042,8 +5105,11 @@ static int process_type3_route(struct peer *peer, afi_t afi, safi_t safi, + } + + if (ipaddr_len == IPV4_MAX_BITLEN) { +- p.prefix.imet_addr.ip.ipa_type = IPADDR_V4; ++ SET_IPADDR_V4(&p.prefix.imet_addr.ip); + memcpy(&p.prefix.imet_addr.ip.ip.addr, pfx, IPV4_MAX_BYTELEN); ++ } else if (ipaddr_len == IPV6_MAX_BITLEN) { ++ SET_IPADDR_V6(&p.prefix.imet_addr.ip); ++ IPV6_ADDR_COPY(&p.prefix.imet_addr.ip.ipaddr_v6, pfx); + } else { + flog_err( + EC_BGP_EVPN_ROUTE_INVALID, +@@ -6120,12 +6186,27 @@ void bgp_evpn_encode_prefix(struct stream *s, const struct prefix *p, + break; + + case BGP_EVPN_IMET_ROUTE: +- stream_putc(s, 17); // TODO: length - assumes IPv4 address +- stream_put(s, prd->val, 8); /* RD */ +- stream_putl(s, evp->prefix.imet_addr.eth_tag); /* Ethernet Tag ID */ +- stream_putc(s, IPV4_MAX_BITLEN); /* IP address Length - bits */ +- /* Originating Router's IP Addr */ +- stream_put_in_addr(s, &evp->prefix.imet_addr.ip.ipaddr_v4); ++ { ++ uint8_t orig_ip_bits = 0; ++ uint8_t total_bytes = 13; /* Fixed part excluding Originator IP */ ++ ++ /* If Originator IP, add bytes to sizes */ ++ if (IS_IPADDR_V4(&evp->prefix.imet_addr.ip)) { ++ orig_ip_bits = IPV4_MAX_BITLEN; ++ total_bytes += 4; /* V4 Originator IP */ ++ } else if (IS_IPADDR_V6(&evp->prefix.imet_addr.ip)) { ++ orig_ip_bits = IPV6_MAX_BITLEN; ++ total_bytes += 16; /* V6 Originator IP */ ++ } ++ ++ stream_putc(s, total_bytes); ++ stream_put(s, prd->val, 8); /* RD */ ++ stream_putl(s, evp->prefix.imet_addr.eth_tag); /* Ethernet Tag ID */ ++ ++ stream_putc(s, orig_ip_bits); /* Originator IP address Length - bits */ ++ if (orig_ip_bits) ++ stream_put(s, &evp->prefix.imet_addr.ip.ip, orig_ip_bits/8); ++ } + break; + + case BGP_EVPN_ES_ROUTE: +@@ -6444,7 +6525,7 @@ struct bgpevpn *bgp_evpn_lookup_vni(struct bgp *bgp, vni_t vni) + * Create a new vpn - invoked upon configuration or zebra notification. + */ + struct bgpevpn *bgp_evpn_new(struct bgp *bgp, vni_t vni, +- struct in_addr originator_ip, ++ struct ipaddr *originator_ip, + vrf_id_t tenant_vrf_id, + struct in_addr mcast_grp, + ifindex_t svi_ifindex) +@@ -6455,7 +6536,7 @@ struct bgpevpn *bgp_evpn_new(struct bgp *bgp, vni_t vni, + + /* Set values - RD and RT set to defaults. */ + vpn->vni = vni; +- vpn->originator_ip = originator_ip; ++ vpn->originator_ip = *originator_ip; + vpn->tenant_vrf_id = tenant_vrf_id; + vpn->mcast_grp = mcast_grp; + vpn->svi_ifindex = svi_ifindex; +@@ -6955,7 +7036,7 @@ static void link_l2vni_hash_to_l3vni(struct hash_bucket *bucket, + int bgp_evpn_local_l3vni_add(vni_t l3vni, vrf_id_t vrf_id, + struct ethaddr *svi_rmac, + struct ethaddr *vrr_rmac, +- struct in_addr originator_ip, int filter, ++ struct ipaddr *originator_ip, int filter, + ifindex_t svi_ifindex, + bool is_anycast_mac) + { +@@ -7285,7 +7366,7 @@ int bgp_evpn_local_vni_del(struct bgp *bgp, vni_t vni) + * about are for the local-tunnel-ip and the (tenant) VRF. + */ + int bgp_evpn_local_vni_add(struct bgp *bgp, vni_t vni, +- struct in_addr originator_ip, ++ struct ipaddr *originator_ip, + vrf_id_t tenant_vrf_id, + struct in_addr mcast_grp, + ifindex_t svi_ifindex) +@@ -7299,7 +7380,7 @@ int bgp_evpn_local_vni_add(struct bgp *bgp, vni_t vni, + if (vpn) { + + if (is_vni_live(vpn) +- && IPV4_ADDR_SAME(&vpn->originator_ip, &originator_ip) ++ && ipaddr_is_same(&vpn->originator_ip, originator_ip) + && IPV4_ADDR_SAME(&vpn->mcast_grp, &mcast_grp) + && vpn->tenant_vrf_id == tenant_vrf_id + && vpn->svi_ifindex == svi_ifindex) +@@ -7389,7 +7470,7 @@ int bgp_evpn_local_vni_add(struct bgp *bgp, vni_t vni, + /* Tunnel is newly active. + * Add TIP to tip_hash of the EVPN underlay instance (bgp_get_evpn()). + */ +- if (bgp_tip_add(bgp, &originator_ip)) ++ if (bgp_tip_add(bgp, originator_ip)) + /* The originator_ip was not already present in the + * bgp martian next-hop table as a tunnel-ip, so we + * need to go back and filter routes matching the new +@@ -7405,7 +7486,7 @@ int bgp_evpn_local_vni_add(struct bgp *bgp, vni_t vni, + */ + if (bgp_evpn_vni_flood_mode_get(bgp, vpn) + == VXLAN_FLOOD_HEAD_END_REPL) { +- build_evpn_type3_prefix(&p, vpn->originator_ip); ++ build_evpn_type3_prefix(&p, &vpn->originator_ip); + if (update_evpn_route(bgp, vpn, &p, 0, 0, NULL)) { + flog_err(EC_BGP_EVPN_ROUTE_CREATE, + "%u: Type3 route creation failure for VNI %u", +diff --git a/bgpd/bgp_evpn.h b/bgpd/bgp_evpn.h +index 69f752fab..5714ee61c 100644 +--- a/bgpd/bgp_evpn.h ++++ b/bgpd/bgp_evpn.h +@@ -159,13 +159,13 @@ extern int bgp_evpn_local_macip_add(struct bgp *bgp, vni_t vni, + extern int bgp_evpn_local_l3vni_add(vni_t vni, vrf_id_t vrf_id, + struct ethaddr *rmac, + struct ethaddr *vrr_rmac, +- struct in_addr originator_ip, int filter, ++ struct ipaddr *originator_ip, int filter, + ifindex_t svi_ifindex, bool is_anycast_mac); + extern int bgp_evpn_local_l3vni_del(vni_t vni, vrf_id_t vrf_id); + extern void bgp_evpn_instance_down(struct bgp *bgp); + extern int bgp_evpn_local_vni_del(struct bgp *bgp, vni_t vni); + extern int bgp_evpn_local_vni_add(struct bgp *bgp, vni_t vni, +- struct in_addr originator_ip, ++ struct ipaddr *originator_ip, + vrf_id_t tenant_vrf_id, + struct in_addr mcast_grp, + ifindex_t svi_ifindex); +diff --git a/bgpd/bgp_evpn_private.h b/bgpd/bgp_evpn_private.h +index 2d7cd68a6..4c500d1dc 100644 +--- a/bgpd/bgp_evpn_private.h ++++ b/bgpd/bgp_evpn_private.h +@@ -87,7 +87,7 @@ struct bgpevpn { + char *prd_pretty; + + /* Route type 3 field */ +- struct in_addr originator_ip; ++ struct ipaddr originator_ip; + + /* PIM-SM MDT group for BUM flooding */ + struct in_addr mcast_grp; +@@ -506,14 +506,17 @@ build_type5_prefix_from_ip_prefix(struct prefix_evpn *evp, + } + + static inline void build_evpn_type3_prefix(struct prefix_evpn *p, +- struct in_addr originator_ip) ++ struct ipaddr *originator_ip) + { + memset(p, 0, sizeof(struct prefix_evpn)); + p->family = AF_EVPN; + p->prefixlen = EVPN_ROUTE_PREFIXLEN; + p->prefix.route_type = BGP_EVPN_IMET_ROUTE; +- p->prefix.imet_addr.ip.ipa_type = IPADDR_V4; +- p->prefix.imet_addr.ip.ipaddr_v4 = originator_ip; ++ if (IS_IPADDR_V4(originator_ip)) ++ p->prefix.imet_addr.ip_prefix_length = IPV4_MAX_BITLEN; ++ else if (IS_IPADDR_V6(originator_ip)) ++ p->prefix.imet_addr.ip_prefix_length = IPV6_MAX_BITLEN; ++ p->prefix.imet_addr.ip = *originator_ip; + } + + static inline void build_evpn_type4_prefix(struct prefix_evpn *p, +@@ -723,7 +726,7 @@ extern void bgp_evpn_derive_auto_rd(struct bgp *bgp, struct bgpevpn *vpn); + extern void bgp_evpn_derive_auto_rd_for_vrf(struct bgp *bgp); + extern struct bgpevpn *bgp_evpn_lookup_vni(struct bgp *bgp, vni_t vni); + extern struct bgpevpn *bgp_evpn_new(struct bgp *bgp, vni_t vni, +- struct in_addr originator_ip, ++ struct ipaddr *originator_ip, + vrf_id_t tenant_vrf_id, + struct in_addr mcast_grp, + ifindex_t svi_ifindex); +diff --git a/bgpd/bgp_evpn_vty.c b/bgpd/bgp_evpn_vty.c +index 09f56010b..6d5f5b81d 100644 +--- a/bgpd/bgp_evpn_vty.c ++++ b/bgpd/bgp_evpn_vty.c +@@ -42,7 +42,7 @@ + struct vni_walk_ctx { + struct bgp *bgp; + struct vty *vty; +- struct in_addr vtep_ip; ++ struct ipaddr vtep_ip; + json_object *json; + int detail; + int type; +@@ -384,7 +384,7 @@ static void display_l3vni(struct vty *vty, struct bgp *bgp_vrf, + json_object_string_addf(json, "rd", + BGP_RD_AS_FORMAT(bgp_vrf->asnotation), + &bgp_vrf->vrf_prd); +- json_object_string_addf(json, "originatorIp", "%pI4", ++ json_object_string_addf(json, "originatorIp", "%pIA", + &bgp_vrf->originator_ip); + if (bgp_evpn && bgp_evpn->evpn_info) { + ecom_str = ecommunity_ecom2str( +@@ -418,7 +418,7 @@ static void display_l3vni(struct vty *vty, struct bgp *bgp_vrf, + vty_out(vty, BGP_RD_AS_FORMAT(bgp_vrf->asnotation), + &bgp_vrf->vrf_prd); + vty_out(vty, "\n"); +- vty_out(vty, " Originator IP: %pI4\n", ++ vty_out(vty, " Originator IP: %pIA\n", + &bgp_vrf->originator_ip); + if (bgp_evpn && bgp_evpn->evpn_info) { + ecom_str = ecommunity_ecom2str( +@@ -502,7 +502,7 @@ static void display_vni(struct vty *vty, struct bgpevpn *vpn, json_object *json) + is_vni_live(vpn) ? "True" : "False"); + json_object_string_addf( + json, "rd", BGP_RD_AS_FORMAT(asnotation), &vpn->prd); +- json_object_string_addf(json, "originatorIp", "%pI4", ++ json_object_string_addf(json, "originatorIp", "%pIA", + &vpn->originator_ip); + json_object_string_addf(json, "mcastGroup", "%pI4", + &vpn->mcast_grp); +@@ -553,7 +553,7 @@ static void display_vni(struct vty *vty, struct bgpevpn *vpn, json_object *json) + vty_out(vty, " RD: "); + vty_out(vty, BGP_RD_AS_FORMAT(asnotation), &vpn->prd); + vty_out(vty, "\n"); +- vty_out(vty, " Originator IP: %pI4\n", &vpn->originator_ip); ++ vty_out(vty, " Originator IP: %pIA\n", &vpn->originator_ip); + vty_out(vty, " Mcast group: %pI4\n", &vpn->mcast_grp); + if (bgp_evpn && bgp_evpn->evpn_info) { + ecom_str = ecommunity_ecom2str( +@@ -808,7 +808,7 @@ static void bgp_evpn_show_routes_mac_ip_global_es(struct vty *vty, esi_t *esi, + + static void show_vni_routes(struct bgp *bgp, struct bgpevpn *vpn, + struct vty *vty, int type, bool mac_table, +- struct in_addr vtep_ip, json_object *json, ++ struct ipaddr *vtep_ip, json_object *json, + int detail) + { + struct bgp_dest *dest; +@@ -862,9 +862,13 @@ static void show_vni_routes(struct bgp *bgp, struct bgpevpn *vpn, + struct prefix tmp_p; + json_object *json_path = NULL; + +- if (vtep_ip.s_addr != INADDR_ANY +- && !IPV4_ADDR_SAME(&(vtep_ip), +- &(pi->attr->nexthop))) ++ if (IS_IPADDR_V4(vtep_ip) ++ && !IPV4_ADDR_SAME(&(vtep_ip->ipaddr_v4), &pi->attr->nexthop)) ++ continue; ++ ++ if (IS_IPADDR_V6(vtep_ip) ++ && !IPV6_ADDR_SAME(&(vtep_ip->ipaddr_v6), ++ &(pi->attr->mp_nexthop_global))) + continue; + + if (evp->prefix.route_type == BGP_EVPN_MAC_IP_ROUTE) { +@@ -964,7 +968,7 @@ static void show_vni_routes_hash(struct hash_bucket *bucket, void *arg) + } + + show_vni_routes(wctx->bgp, vpn, wctx->vty, wctx->type, wctx->mac_table, +- wctx->vtep_ip, json_vni, wctx->detail); ++ &wctx->vtep_ip, json_vni, wctx->detail); + + if (json) + json_object_object_add(json, vni_str, json_vni); +@@ -988,7 +992,7 @@ static void show_vni_routes_all_hash(struct hash_bucket *bucket, void *arg) + vty_out(vty, "\nVNI: %u\n\n", vpn->vni); + } + +- show_vni_routes(wctx->bgp, vpn, wctx->vty, 0, false, wctx->vtep_ip, ++ show_vni_routes(wctx->bgp, vpn, wctx->vty, 0, false, &wctx->vtep_ip, + json_vni, wctx->detail); + + if (json) +@@ -999,7 +1003,7 @@ static void show_vni_routes_all_hash(struct hash_bucket *bucket, void *arg) + else + vty_out(vty, "\nVNI: %u MAC Table\n\n", vpn->vni); + +- show_vni_routes(wctx->bgp, vpn, wctx->vty, 0, true, wctx->vtep_ip, ++ show_vni_routes(wctx->bgp, vpn, wctx->vty, 0, true, &wctx->vtep_ip, + json_vni_mac, wctx->detail); + + if (json) +@@ -1039,7 +1043,7 @@ static void show_l3vni_entry(struct vty *vty, struct bgp *bgp, + json_object_int_add(json_vni, "vni", bgp->l3vni); + json_object_string_add(json_vni, "type", "L3"); + json_object_string_add(json_vni, "inKernel", "True"); +- json_object_string_addf(json_vni, "originatorIp", "%pI4", ++ json_object_string_addf(json_vni, "originatorIp", "%pIA", + &bgp->originator_ip); + json_object_string_addf(json_vni, "rd", + BGP_RD_AS_FORMAT(bgp->asnotation), +@@ -1184,7 +1188,7 @@ static void show_vni_entry(struct hash_bucket *bucket, void *args[]) + json_object_string_addf(json_vni, "rd", + BGP_RD_AS_FORMAT(asnotation), + &vpn->prd); +- json_object_string_addf(json_vni, "originatorIp", "%pI4", ++ json_object_string_addf(json_vni, "originatorIp", "%pIA", + &vpn->originator_ip); + json_object_string_addf(json_vni, "mcastGroup", "%pI4", + &vpn->mcast_grp); +@@ -2383,6 +2387,7 @@ static struct bgpevpn *evpn_create_update_vni(struct bgp *bgp, vni_t vni) + { + struct bgpevpn *vpn; + struct in_addr mcast_grp = {INADDR_ANY}; ++ struct ipaddr orignator_ip; + + vpn = bgp_evpn_lookup_vni(bgp, vni); + if (!vpn) { +@@ -2398,7 +2403,9 @@ static struct bgpevpn *evpn_create_update_vni(struct bgp *bgp, vni_t vni) + /* tenant vrf will be updated when we get local_vni_add from + * zebra + */ +- vpn = bgp_evpn_new(bgp, vni, bgp->router_id, 0, mcast_grp, 0); ++ SET_IPADDR_V4(&orignator_ip); ++ orignator_ip.ipaddr_v4 = bgp->router_id; ++ vpn = bgp_evpn_new(bgp, vni, &orignator_ip, 0, mcast_grp, 0); + } + + /* Mark as configured. */ +@@ -2476,7 +2483,7 @@ static void evpn_show_import_rts(struct vty *vty, struct bgp *bgp, + * Display EVPN routes for all VNIs - vty handler. + */ + static void evpn_show_routes_vni_all(struct vty *vty, struct bgp *bgp, int type, +- bool mac_table, struct in_addr vtep_ip, ++ bool mac_table, const union sockunion *vtep_ip, + json_object *json, int detail) + { + uint32_t num_vnis; +@@ -2490,7 +2497,16 @@ static void evpn_show_routes_vni_all(struct vty *vty, struct bgp *bgp, int type, + wctx.vty = vty; + wctx.type = type; + wctx.mac_table = mac_table; +- wctx.vtep_ip = vtep_ip; ++ SET_IPADDR_NONE(&wctx.vtep_ip); ++ if (vtep_ip) { ++ if (sockunion_family(vtep_ip) == AF_INET) { ++ SET_IPADDR_V4(&wctx.vtep_ip); ++ wctx.vtep_ip.ipaddr_v4 = vtep_ip->sin.sin_addr; ++ } else if (sockunion_family(vtep_ip) == AF_INET6) { ++ SET_IPADDR_V6(&wctx.vtep_ip); ++ wctx.vtep_ip.ipaddr_v6 = vtep_ip->sin6.sin6_addr; ++ } ++ } + wctx.json = json; + wctx.detail = detail; + hash_iterate(bgp->vnihash, (void (*)(struct hash_bucket *, +@@ -2502,7 +2518,7 @@ static void evpn_show_routes_vni_all(struct vty *vty, struct bgp *bgp, int type, + * Display EVPN routes for all VNIs & all types - vty handler. + */ + static void evpn_show_routes_vni_all_type_all(struct vty *vty, struct bgp *bgp, +- struct in_addr vtep_ip, ++ const union sockunion *vtep_ip, + json_object *json, int detail) + { + uint32_t num_vnis; +@@ -2515,7 +2531,16 @@ static void evpn_show_routes_vni_all_type_all(struct vty *vty, struct bgp *bgp, + memset(&wctx, 0, sizeof(struct vni_walk_ctx)); + wctx.bgp = bgp; + wctx.vty = vty; +- wctx.vtep_ip = vtep_ip; ++ SET_IPADDR_NONE(&wctx.vtep_ip); ++ if (vtep_ip) { ++ if (sockunion_family(vtep_ip) == AF_INET) { ++ SET_IPADDR_V4(&wctx.vtep_ip); ++ wctx.vtep_ip.ipaddr_v4 = vtep_ip->sin.sin_addr; ++ } else if (sockunion_family(vtep_ip) == AF_INET6) { ++ SET_IPADDR_V6(&wctx.vtep_ip); ++ wctx.vtep_ip.ipaddr_v6 = vtep_ip->sin6.sin6_addr; ++ } ++ } + wctx.json = json; + wctx.detail = detail; + hash_iterate(bgp->vnihash, +@@ -2528,7 +2553,7 @@ static void evpn_show_routes_vni_all_type_all(struct vty *vty, struct bgp *bgp, + * Display EVPN routes for a VNI -- for specific type-3 route (vty handler). + */ + static void evpn_show_route_vni_multicast(struct vty *vty, struct bgp *bgp, +- vni_t vni, struct in_addr orig_ip, ++ vni_t vni, struct ipaddr *orig_ip, + json_object *json) + { + struct bgpevpn *vpn; +@@ -2751,9 +2776,10 @@ static void evpn_show_routes_esi(struct vty *vty, struct bgp *bgp, + */ + static void evpn_show_routes_vni(struct vty *vty, struct bgp *bgp, vni_t vni, + int type, bool mac_table, +- struct in_addr vtep_ip, json_object *json) ++ const union sockunion *_vtep_ip, json_object *json) + { + struct bgpevpn *vpn; ++ struct ipaddr vtep_ip; + + /* Locate VNI. */ + vpn = bgp_evpn_lookup_vni(bgp, vni); +@@ -2763,8 +2789,18 @@ static void evpn_show_routes_vni(struct vty *vty, struct bgp *bgp, vni_t vni, + return; + } + ++ if (sockunion_family(_vtep_ip) == AF_INET) { ++ SET_IPADDR_V4(&vtep_ip); ++ vtep_ip.ipaddr_v4 = _vtep_ip->sin.sin_addr; ++ } else if (sockunion_family(_vtep_ip) == AF_INET6) { ++ SET_IPADDR_V6(&vtep_ip); ++ vtep_ip.ipaddr_v6 = _vtep_ip->sin6.sin6_addr; ++ } else { ++ SET_IPADDR_NONE(&vtep_ip); ++ } ++ + /* Walk this VNI's route table and display appropriate routes. */ +- show_vni_routes(bgp, vpn, vty, type, mac_table, vtep_ip, json, 0); ++ show_vni_routes(bgp, vpn, vty, type, mac_table, &vtep_ip, json, 0); + } + + /* +@@ -5118,8 +5154,8 @@ DEFUN(show_bgp_l2vpn_evpn_route_esi, + /* + * Display per-VNI EVPN routing table. + */ +-DEFUN(show_bgp_l2vpn_evpn_route_vni, show_bgp_l2vpn_evpn_route_vni_cmd, +- "show bgp l2vpn evpn route vni " CMD_VNI_RANGE " [ | vtep A.B.C.D>] [json]", ++DEFPY(show_bgp_l2vpn_evpn_route_vni, show_bgp_l2vpn_evpn_route_vni_cmd, ++ "show bgp l2vpn evpn route vni " CMD_VNI_RANGE " [ | vtep $vtep_ip>] [json]", + SHOW_STR + BGP_STR + L2VPN_HELP_STR +@@ -5134,16 +5170,14 @@ DEFUN(show_bgp_l2vpn_evpn_route_vni, show_bgp_l2vpn_evpn_route_vni_cmd, + EVPN_TYPE_2_HELP_STR + EVPN_TYPE_3_HELP_STR + EVPN_TYPE_3_HELP_STR +- "Remote VTEP\n" +- "Remote VTEP IP address\n" ++ "Remote VTEP address\n" ++ "Remote VTEP IPv4 address\n" ++ "Remote VTEP IPv6 address\n" + JSON_STR) + { +- vni_t vni; + struct bgp *bgp; +- struct in_addr vtep_ip; + int type = 0; + int idx = 0; +- int vtep_idx = 0; + bool uj = false; + json_object *json = NULL; + +@@ -5157,20 +5191,9 @@ DEFUN(show_bgp_l2vpn_evpn_route_vni, show_bgp_l2vpn_evpn_route_vni_cmd, + if (!argv_find(argv, argc, "evpn", &idx)) + return CMD_WARNING; + +- vtep_ip.s_addr = 0; +- +- vni = strtoul(argv[idx + 3]->arg, NULL, 10); +- + if (bgp_evpn_cli_parse_type(&type, argv, argc) < 0) + return CMD_WARNING; + +- if (argv_find(argv, argc, "vtep", &vtep_idx)) { +- if (!inet_aton(argv[vtep_idx + 1]->arg, &vtep_ip)) { +- vty_out(vty, "%% Malformed VTEP IP address\n"); +- return CMD_WARNING; +- } +- } +- + if (uj) + json = json_object_new_object(); + +@@ -5270,7 +5293,7 @@ DEFUN(show_bgp_l2vpn_evpn_route_vni_multicast, + vni_t vni; + struct bgp *bgp; + int ret; +- struct in_addr orig_ip; ++ struct ipaddr orig_ip; + int idx = 0; + bool uj = false; + json_object *json = NULL; +@@ -5289,7 +5312,8 @@ DEFUN(show_bgp_l2vpn_evpn_route_vni_multicast, + vni = strtoul(argv[idx + 3]->arg, NULL, 10); + + /* get the ip */ +- ret = inet_aton(argv[idx + 5]->arg, &orig_ip); ++ ret = inet_aton(argv[idx + 5]->arg, &orig_ip.ipaddr_v4); ++ SET_IPADDR_V4(&orig_ip); + if (!ret) { + vty_out(vty, "%% Malformed Originating Router IP address\n"); + return CMD_WARNING; +@@ -5298,7 +5322,7 @@ DEFUN(show_bgp_l2vpn_evpn_route_vni_multicast, + if (uj) + json = json_object_new_object(); + +- evpn_show_route_vni_multicast(vty, bgp, vni, orig_ip, json); ++ evpn_show_route_vni_multicast(vty, bgp, vni, &orig_ip, json); + + if (uj) + vty_json(vty, json); +@@ -5309,9 +5333,9 @@ DEFUN(show_bgp_l2vpn_evpn_route_vni_multicast, + /* + * Display per-VNI EVPN routing table - for all VNIs. + */ +-DEFUN(show_bgp_l2vpn_evpn_route_vni_all, ++DEFPY(show_bgp_l2vpn_evpn_route_vni_all, + show_bgp_l2vpn_evpn_route_vni_all_cmd, +- "show bgp l2vpn evpn route vni all [detail] [vtep A.B.C.D] [json]", ++ "show bgp l2vpn evpn route vni all [detail] [vtep $vtep_ip] [json]", + SHOW_STR + BGP_STR + L2VPN_HELP_STR +@@ -5321,11 +5345,11 @@ DEFUN(show_bgp_l2vpn_evpn_route_vni_all, + "All VNIs\n" + "Print Detailed Output\n" + "Remote VTEP\n" +- "Remote VTEP IP address\n" ++ "Remote VTEP IPv4 address\n" ++ "Remote VTEP IPv6 address\n" + JSON_STR) + { + struct bgp *bgp; +- struct in_addr vtep_ip; + int idx = 0; + bool uj = false; + json_object *json = NULL; +@@ -5345,17 +5369,6 @@ DEFUN(show_bgp_l2vpn_evpn_route_vni_all, + if (argv_find(argv, argc, "detail", &da)) + da = 1; + +- /* vtep-ip position depends on detail option */ +- vtep_ip.s_addr = 0; +- if ((!uj && (argc == (idx + 1 + 5 + da) && argv[idx + 5 + da]->arg)) +- || (uj +- && (argc == (idx + 1 + 6 + da) && argv[idx + 5 + da]->arg))) { +- if (!inet_aton(argv[idx + 5 + da]->arg, &vtep_ip)) { +- vty_out(vty, "%% Malformed VTEP IP address\n"); +- return CMD_WARNING; +- } +- } +- + if (uj) + json = json_object_new_object(); + +@@ -5374,13 +5387,14 @@ DEFUN(show_bgp_l2vpn_evpn_route_vni_all, + */ + DEFPY(show_bgp_vni_all, + show_bgp_vni_all_cmd, +- "show bgp vni all [vtep A.B.C.D$addr] [detail$detail] [json$uj]", ++ "show bgp vni all [vtep $addr] [detail$detail] [json$uj]", + SHOW_STR + BGP_STR + VNI_HELP_STR + VNI_ALL_HELP_STR + VTEP_HELP_STR + VTEP_IP_HELP_STR ++ VTEP_IPV6_HELP_STR + DETAIL_HELP_STR + JSON_STR) + { +@@ -5408,7 +5422,7 @@ DEFPY(show_bgp_vni_all, + */ + DEFPY(show_bgp_vni_all_ead, + show_bgp_vni_all_ead_cmd, +- "show bgp vni all type <1|ead> [vtep A.B.C.D$addr] []", ++ "show bgp vni all type <1|ead> [vtep $addr] []", + SHOW_STR + BGP_STR + VNI_HELP_STR +@@ -5418,6 +5432,7 @@ DEFPY(show_bgp_vni_all_ead, + EVPN_TYPE_1_HELP_STR + VTEP_HELP_STR + VTEP_IP_HELP_STR ++ VTEP_IPV6_HELP_STR + DETAIL_HELP_STR + JSON_STR) + { +@@ -5446,7 +5461,7 @@ DEFPY(show_bgp_vni_all_ead, + */ + DEFPY(show_bgp_vni_all_macip_mac, + show_bgp_vni_all_macip_mac_cmd, +- "show bgp vni all type <2|macip> mac [vtep A.B.C.D$addr] []", ++ "show bgp vni all type <2|macip> mac [vtep $addr] []", + SHOW_STR + BGP_STR + VNI_HELP_STR +@@ -5457,6 +5472,7 @@ DEFPY(show_bgp_vni_all_macip_mac, + "MAC Table\n" + VTEP_HELP_STR + VTEP_IP_HELP_STR ++ VTEP_IPV6_HELP_STR + DETAIL_HELP_STR + JSON_STR) + { +@@ -5485,7 +5501,7 @@ DEFPY(show_bgp_vni_all_macip_mac, + */ + DEFPY(show_bgp_vni_all_macip_ip, + show_bgp_vni_all_macip_ip_cmd, +- "show bgp vni all type <2|macip> ip [vtep A.B.C.D$addr] []", ++ "show bgp vni all type <2|macip> ip [vtep $addr] []", + SHOW_STR + BGP_STR + VNI_HELP_STR +@@ -5496,6 +5512,7 @@ DEFPY(show_bgp_vni_all_macip_ip, + "IP Table\n" + VTEP_HELP_STR + VTEP_IP_HELP_STR ++ VTEP_IPV6_HELP_STR + DETAIL_HELP_STR + JSON_STR) + { +@@ -5524,7 +5541,7 @@ DEFPY(show_bgp_vni_all_macip_ip, + */ + DEFPY(show_bgp_vni_all_imet, + show_bgp_vni_all_imet_cmd, +- "show bgp vni all type <3|multicast> [vtep A.B.C.D$addr] []", ++ "show bgp vni all type <3|multicast> [vtep $addr] []", + SHOW_STR + BGP_STR + VNI_HELP_STR +@@ -5534,6 +5551,7 @@ DEFPY(show_bgp_vni_all_imet, + EVPN_TYPE_3_HELP_STR + VTEP_HELP_STR + VTEP_IP_HELP_STR ++ VTEP_IPV6_HELP_STR + DETAIL_HELP_STR + JSON_STR) + { +@@ -5562,13 +5580,14 @@ DEFPY(show_bgp_vni_all_imet, + */ + DEFPY(show_bgp_vni, + show_bgp_vni_cmd, +- "show bgp vni "CMD_VNI_RANGE"$vni [vtep A.B.C.D$addr] [json$uj]", ++ "show bgp vni "CMD_VNI_RANGE"$vni [vtep $addr] [json$uj]", + SHOW_STR + BGP_STR + VNI_HELP_STR + VNI_NUM_HELP_STR + VTEP_HELP_STR + VTEP_IP_HELP_STR ++ VTEP_IPV6_HELP_STR + JSON_STR) + { + struct bgp *bgp; +@@ -5605,7 +5624,7 @@ DEFPY(show_bgp_vni, + */ + DEFPY(show_bgp_vni_ead, + show_bgp_vni_ead_cmd, +- "show bgp vni "CMD_VNI_RANGE"$vni type <1|ead> [vtep A.B.C.D$addr] [json$uj]", ++ "show bgp vni "CMD_VNI_RANGE"$vni type <1|ead> [vtep $addr] [json$uj]", + SHOW_STR + BGP_STR + VNI_HELP_STR +@@ -5615,6 +5634,7 @@ DEFPY(show_bgp_vni_ead, + EVPN_TYPE_1_HELP_STR + VTEP_HELP_STR + VTEP_IP_HELP_STR ++ VTEP_IPV6_HELP_STR + JSON_STR) + { + struct bgp *bgp; +@@ -5642,7 +5662,7 @@ DEFPY(show_bgp_vni_ead, + */ + DEFPY(show_bgp_vni_macip_mac, + show_bgp_vni_macip_mac_cmd, +- "show bgp vni "CMD_VNI_RANGE"$vni type <2|macip> mac [vtep A.B.C.D$addr] [json$uj]", ++ "show bgp vni "CMD_VNI_RANGE"$vni type <2|macip> mac [vtep $addr] [json$uj]", + SHOW_STR + BGP_STR + VNI_HELP_STR +@@ -5653,6 +5673,7 @@ DEFPY(show_bgp_vni_macip_mac, + "MAC Table\n" + VTEP_HELP_STR + VTEP_IP_HELP_STR ++ VTEP_IPV6_HELP_STR + JSON_STR) + { + struct bgp *bgp; +@@ -5680,7 +5701,7 @@ DEFPY(show_bgp_vni_macip_mac, + */ + DEFPY(show_bgp_vni_macip_ip, + show_bgp_vni_macip_ip_cmd, +- "show bgp vni "CMD_VNI_RANGE"$vni type <2|macip> ip [vtep A.B.C.D$addr] [json$uj]", ++ "show bgp vni "CMD_VNI_RANGE"$vni type <2|macip> ip [vtep $addr] [json$uj]", + SHOW_STR + BGP_STR + VNI_HELP_STR +@@ -5691,6 +5712,7 @@ DEFPY(show_bgp_vni_macip_ip, + "IP Table\n" + VTEP_HELP_STR + VTEP_IP_HELP_STR ++ VTEP_IPV6_HELP_STR + JSON_STR) + { + struct bgp *bgp; +@@ -5718,7 +5740,7 @@ DEFPY(show_bgp_vni_macip_ip, + */ + DEFPY(show_bgp_vni_imet, + show_bgp_vni_imet_cmd, +- "show bgp vni "CMD_VNI_RANGE"$vni type <3|multicast> [vtep A.B.C.D$addr] [json$uj]", ++ "show bgp vni "CMD_VNI_RANGE"$vni type <3|multicast> [vtep $addr] [json$uj]", + SHOW_STR + BGP_STR + VNI_HELP_STR +@@ -5728,6 +5750,7 @@ DEFPY(show_bgp_vni_imet, + EVPN_TYPE_3_HELP_STR + VTEP_HELP_STR + VTEP_IP_HELP_STR ++ VTEP_IPV6_HELP_STR + JSON_STR) + { + struct bgp *bgp; +@@ -5814,10 +5837,11 @@ DEFPY(show_bgp_vni_macip_ip_addr, show_bgp_vni_macip_ip_addr_cmd, + } else { + ip_addr.ipa_type = IPADDR_V6; + memcpy(&ip_addr.ipaddr_v6, &ip->sin6.sin6_addr, +- sizeof(struct in6_addr)); ++ sizeof(struct in6_addr)); + } + evpn_show_route_vni_macip(vty, bgp, vni, NULL, &ip_addr, json); + ++ + if (uj) + vty_json(vty, json); + +@@ -6530,7 +6554,7 @@ DEFUN (show_bgp_vrf_l3vni_info, + + if (!json) { + vty_out(vty, "BGP VRF: %s\n", name); +- vty_out(vty, " Local-Ip: %pI4\n", &bgp->originator_ip); ++ vty_out(vty, " Local-Ip: %pIA\n", &bgp->originator_ip); + vty_out(vty, " L3-VNI: %u\n", bgp->l3vni); + vty_out(vty, " Rmac: %s\n", + prefix_mac2str(&bgp->rmac, buf, sizeof(buf))); +@@ -6559,7 +6583,7 @@ DEFUN (show_bgp_vrf_l3vni_info, + vty_out(vty, "\n"); + } else { + json_object_string_add(json, "vrf", name); +- json_object_string_addf(json, "local-ip", "%pI4", ++ json_object_string_addf(json, "local-ip", "%pIA", + &bgp->originator_ip); + json_object_int_add(json, "l3vni", bgp->l3vni); + json_object_string_add( +diff --git a/bgpd/bgp_evpn_vty.h b/bgpd/bgp_evpn_vty.h +index 83c41a5ad..b9d287861 100644 +--- a/bgpd/bgp_evpn_vty.h ++++ b/bgpd/bgp_evpn_vty.h +@@ -17,7 +17,8 @@ extern void bgp_ethernetvpn_init(void); + #define VNI_ALL_HELP_STR "All VNIs\n" + #define DETAIL_HELP_STR "Print Detailed Output\n" + #define VTEP_HELP_STR "Remote VTEP\n" +-#define VTEP_IP_HELP_STR "Remote VTEP IP address\n" ++#define VTEP_IP_HELP_STR "Remote VTEP IPv4 address\n" ++#define VTEP_IPV6_HELP_STR "Remote VTEP IPv6 address\n" + + extern int argv_find_and_parse_oly_idx(struct cmd_token **argv, int argc, + int *oly_idx, +diff --git a/bgpd/bgp_nexthop.c b/bgpd/bgp_nexthop.c +index 0bc99a19d..33a18d0e1 100644 +--- a/bgpd/bgp_nexthop.c ++++ b/bgpd/bgp_nexthop.c +@@ -133,12 +133,12 @@ static void bgp_nexthop_cache_reset(struct bgp_nexthop_cache_head *tree) + + static void *bgp_tip_hash_alloc(void *p) + { +- const struct in_addr *val = (const struct in_addr *)p; ++ const struct ipaddr *val = (const struct ipaddr *)p; + struct tip_addr *addr; + + addr = XMALLOC(MTYPE_TIP_ADDR, sizeof(struct tip_addr)); + addr->refcnt = 0; +- addr->addr.s_addr = val->s_addr; ++ addr->addr = *val; + + return addr; + } +@@ -152,7 +152,12 @@ static unsigned int bgp_tip_hash_key_make(const void *p) + { + const struct tip_addr *addr = p; + +- return jhash_1word(addr->addr.s_addr, 0); ++ if (IS_IPADDR_V4(&addr->addr)) { ++ return jhash_1word(addr->addr.ipaddr_v4.s_addr, 0); ++ } else { ++ return jhash2(addr->addr.ipaddr_v6.s6_addr32, ++ array_size(addr->addr.ipaddr_v6.s6_addr32), 0); ++ } + } + + static bool bgp_tip_hash_cmp(const void *p1, const void *p2) +@@ -160,7 +165,7 @@ static bool bgp_tip_hash_cmp(const void *p1, const void *p2) + const struct tip_addr *addr1 = p1; + const struct tip_addr *addr2 = p2; + +- return addr1->addr.s_addr == addr2->addr.s_addr; ++ return ipaddr_is_same(&addr1->addr, &addr2->addr); + } + + void bgp_tip_hash_init(struct bgp *bgp) +@@ -181,7 +186,7 @@ void bgp_tip_hash_destroy(struct bgp *bgp) + * only need to update the refcnt, since the collection of known TIPs + * has not changed. + */ +-bool bgp_tip_add(struct bgp *bgp, struct in_addr *tip) ++bool bgp_tip_add(struct bgp *bgp, struct ipaddr *tip) + { + struct tip_addr tmp; + struct tip_addr *addr; +@@ -200,7 +205,7 @@ bool bgp_tip_add(struct bgp *bgp, struct in_addr *tip) + return tip_added; + } + +-void bgp_tip_del(struct bgp *bgp, struct in_addr *tip) ++void bgp_tip_del(struct bgp *bgp, struct ipaddr *tip) + { + struct tip_addr tmp; + struct tip_addr *addr; +@@ -566,14 +571,21 @@ bool bgp_nexthop_self(struct bgp *bgp, afi_t afi, uint8_t type, + + if (new_afi == AF_INET && hashcount(bgp->tip_hash)) { + memset(&tmp_tip, 0, sizeof(tmp_tip)); +- tmp_tip.addr = attr->nexthop; ++ SET_IPADDR_V4(&tmp_tip.addr); ++ IPV4_ADDR_COPY(&tmp_tip.addr.ipaddr_v4, &attr->nexthop); + + if (CHECK_FLAG(attr->flag, ATTR_FLAG_BIT(BGP_ATTR_NEXT_HOP))) { +- tmp_tip.addr = attr->nexthop; ++ IPV4_ADDR_COPY(&tmp_tip.addr.ipaddr_v4, &attr->nexthop); + } else if ((attr->mp_nexthop_len) && + ((attr->mp_nexthop_len == BGP_ATTR_NHLEN_IPV4) || + (attr->mp_nexthop_len == BGP_ATTR_NHLEN_VPNV4))) { +- tmp_tip.addr = attr->mp_nexthop_global_in; ++ IPV4_ADDR_COPY(&tmp_tip.addr.ipaddr_v4, &attr->mp_nexthop_global_in); ++ } else if ((attr->mp_nexthop_len == BGP_ATTR_NHLEN_IPV6_GLOBAL) || ++ (attr->mp_nexthop_len == BGP_ATTR_NHLEN_IPV6_GLOBAL_AND_LL) || ++ (attr->mp_nexthop_len == BGP_ATTR_NHLEN_VPNV6_GLOBAL) || ++ (attr->mp_nexthop_len == BGP_ATTR_NHLEN_VPNV6_GLOBAL_AND_LL)) { ++ SET_IPADDR_V6(&tmp_tip.addr); ++ IPV6_ADDR_COPY(&tmp_tip.addr.ipaddr_v6, &attr->mp_nexthop_global); + } + + tip = hash_lookup(bgp->tip_hash, &tmp_tip); +diff --git a/bgpd/bgp_nexthop.h b/bgpd/bgp_nexthop.h +index 99473b3b0..a0280ef02 100644 +--- a/bgpd/bgp_nexthop.h ++++ b/bgpd/bgp_nexthop.h +@@ -104,7 +104,7 @@ DECLARE_RBTREE_UNIQ(bgp_nexthop_cache, struct bgp_nexthop_cache, entry, + + /* Own tunnel-ip address structure */ + struct tip_addr { +- struct in_addr addr; ++ struct ipaddr addr; + int refcnt; + }; + +@@ -151,8 +151,8 @@ extern void bgp_scan_finish(struct bgp *bgp); + extern void bgp_scan_vty_init(void); + extern void bgp_address_init(struct bgp *bgp); + extern void bgp_address_destroy(struct bgp *bgp); +-extern bool bgp_tip_add(struct bgp *bgp, struct in_addr *tip); +-extern void bgp_tip_del(struct bgp *bgp, struct in_addr *tip); ++extern bool bgp_tip_add(struct bgp *bgp, struct ipaddr *tip); ++extern void bgp_tip_del(struct bgp *bgp, struct ipaddr *tip); + extern void bgp_tip_hash_init(struct bgp *bgp); + extern void bgp_tip_hash_destroy(struct bgp *bgp); + +diff --git a/bgpd/bgp_route.c b/bgpd/bgp_route.c +index a2b89866c..af57fc4f6 100644 +--- a/bgpd/bgp_route.c ++++ b/bgpd/bgp_route.c +@@ -7703,6 +7703,7 @@ void bgp_static_update(struct bgp *bgp, const struct prefix *p, + + if (safi == SAFI_EVPN || safi == SAFI_MPLS_VPN || safi == SAFI_ENCAP) { + if (afi == AFI_IP) { ++ /* TODO -- no support for V6 nexthop yet */ + attr.mp_nexthop_global_in = bgp_static->igpnexthop; + attr.mp_nexthop_len = IPV4_MAX_BYTELEN; + } +@@ -10595,12 +10596,29 @@ void route_vty_out(struct vty *vty, const struct prefix *p, + vty_out(vty, "%*s", len, " "); + } + } else if (safi == SAFI_EVPN) { ++ char buf[BUFSIZ]; ++ char nexthop[128]; ++ int af = NEXTHOP_FAMILY(attr->mp_nexthop_len); ++ ++ switch (af) { ++ case AF_INET: ++ snprintf(nexthop, sizeof(nexthop), "%s", ++ inet_ntop(af, &attr->mp_nexthop_global_in, buf, ++ BUFSIZ)); ++ break; ++ case AF_INET6: ++ snprintf(nexthop, sizeof(nexthop), "%s", ++ inet_ntop(af, &attr->mp_nexthop_global, buf, ++ BUFSIZ)); ++ break; ++ default: ++ snprintf(nexthop, sizeof(nexthop), "?"); ++ break; ++ } + if (json_paths) { + json_nexthop_global = json_object_new_object(); + +- json_object_string_addf(json_nexthop_global, "ip", +- "%pI4", +- &attr->mp_nexthop_global_in); ++ json_object_string_add(json_nexthop_global, "ip", nexthop); + + if (path->peer->hostname) + json_object_string_add(json_nexthop_global, +@@ -10608,17 +10626,17 @@ void route_vty_out(struct vty *vty, const struct prefix *p, + path->peer->hostname); + + json_object_string_add(json_nexthop_global, "afi", +- "ipv4"); ++ (af == AF_INET) ? "ipv4" : "ipv6"); + json_object_boolean_true_add(json_nexthop_global, + "used"); + } else { + if (nexthop_hostname) +- len = vty_out(vty, "%pI4(%s)%s", +- &attr->mp_nexthop_global_in, ++ len = vty_out(vty, "%s(%s)%s", ++ nexthop, + nexthop_hostname, vrf_id_str); + else +- len = vty_out(vty, "%pI4%s", +- &attr->mp_nexthop_global_in, ++ len = vty_out(vty, "%s%s", ++ nexthop, + vrf_id_str); + + len = wide ? (41 - len) : (16 - len); +diff --git a/bgpd/bgp_vty.c b/bgpd/bgp_vty.c +index 1054023c5..564a87ed3 100644 +--- a/bgpd/bgp_vty.c ++++ b/bgpd/bgp_vty.c +@@ -12080,7 +12080,7 @@ static void show_tip_entry(struct hash_bucket *bucket, void *args) + struct vty *vty = (struct vty *)args; + struct tip_addr *tip = (struct tip_addr *)bucket->data; + +- vty_out(vty, "addr: %pI4, count: %d\n", &tip->addr, tip->refcnt); ++ vty_out(vty, "addr: %pIA, count: %d\n", &tip->addr, tip->refcnt); + } + + static void bgp_show_martian_nexthops(struct vty *vty, struct bgp *bgp) +diff --git a/bgpd/bgp_zebra.c b/bgpd/bgp_zebra.c +index 861abe270..aeb38d8bb 100644 +--- a/bgpd/bgp_zebra.c ++++ b/bgpd/bgp_zebra.c +@@ -3261,7 +3261,7 @@ static int bgp_zebra_process_local_l3vni(ZAPI_CALLBACK_ARGS) + int filter = 0; + vni_t l3vni = 0; + struct ethaddr svi_rmac, vrr_rmac = {.octet = {0} }; +- struct in_addr originator_ip; ++ struct ipaddr originator_ip; + struct stream *s; + ifindex_t svi_ifindex; + bool is_anycast_mac = false; +@@ -3272,14 +3272,24 @@ static int bgp_zebra_process_local_l3vni(ZAPI_CALLBACK_ARGS) + l3vni = stream_getl(s); + if (cmd == ZEBRA_L3VNI_ADD) { + stream_get(&svi_rmac, s, sizeof(struct ethaddr)); +- originator_ip.s_addr = stream_get_ipv4(s); ++#if 1 ++ originator_ip.ipaddr_v4.s_addr = stream_get_ipv4(s); ++ SET_IPADDR_V4(&originator_ip); ++#else ++ STREAM_GETW(s, originator_ip.ipa_type); ++ if (originator_ip.ipa_type == IPADDR_V4) { ++ STREAM_GET(&originator_ip.ipaddr_v4, s, IPV4_MAX_BYTELEN); ++ } else if (originator_ip.ipa_type == IPADDR_V6) { ++ STREAM_GET(&originator_ip.ipaddr_v6, s, IPV6_MAX_BYTELEN); ++ } ++#endif /* 1 */ + stream_get(&filter, s, sizeof(int)); + svi_ifindex = stream_getl(s); + stream_get(&vrr_rmac, s, sizeof(struct ethaddr)); + is_anycast_mac = stream_getl(s); + + if (BGP_DEBUG(zebra, ZEBRA)) +- zlog_debug("Rx L3VNI ADD VRF %s VNI %u Originator-IP %pI4 RMAC svi-mac %pEA vrr-mac %pEA filter %s svi-if %u", ++ zlog_debug("Rx L3VNI ADD VRF %s VNI %u Originator-IP %pIA RMAC svi-mac %pEA vrr-mac %pEA filter %s svi-if %u", + vrf_id_to_name(vrf_id), l3vni, + &originator_ip, &svi_rmac, &vrr_rmac, + filter ? "prefix-routes-only" : "none", +@@ -3290,7 +3300,7 @@ static int bgp_zebra_process_local_l3vni(ZAPI_CALLBACK_ARGS) + svi_ifindex, is_anycast_mac); + + bgp_evpn_local_l3vni_add(l3vni, vrf_id, &svi_rmac, &vrr_rmac, +- originator_ip, filter, svi_ifindex, ++ &originator_ip, filter, svi_ifindex, + is_anycast_mac); + } else { + if (BGP_DEBUG(zebra, ZEBRA)) +@@ -3310,7 +3320,7 @@ static int bgp_zebra_process_local_vni(ZAPI_CALLBACK_ARGS) + struct stream *s; + vni_t vni; + struct bgp *bgp; +- struct in_addr vtep_ip = {INADDR_ANY}; ++ struct ipaddr vtep_ip = {0}; + vrf_id_t tenant_vrf_id = VRF_DEFAULT; + struct in_addr mcast_grp = {INADDR_ANY}; + ifindex_t svi_ifindex = 0; +@@ -3318,7 +3328,22 @@ static int bgp_zebra_process_local_vni(ZAPI_CALLBACK_ARGS) + s = zclient->ibuf; + vni = stream_getl(s); + if (cmd == ZEBRA_VNI_ADD) { +- vtep_ip.s_addr = stream_get_ipv4(s); ++#if 1 ++ SET_IPADDR_V4(&vtep_ip); ++ vtep_ip.ipaddr_v4.s_addr = stream_get_ipv4(s); ++#else ++ STREAM_GETW(s, vtep_ip.ipa_type); ++ if (vtep_ip.ipa_type == IPADDR_V4) { ++ STREAM_GET(&vtep_ip.ipaddr_v4, s, IPV4_MAX_BYTELEN); ++ } else if (vtep_ip.ipa_type == IPADDR_V6) { ++ STREAM_GET(&vtep_ip.ipaddr_v6, s, IPV6_MAX_BYTELEN); ++ } else { ++ if (BGP_DEBUG(zebra, ZEBRA)) ++ zlog_err( ++ "Unexpected VTEP IP address type=%u", vtep_ip.ipa_type); ++ return 0; ++ } ++#endif /* 1 */ + stream_get(&tenant_vrf_id, s, sizeof(vrf_id_t)); + mcast_grp.s_addr = stream_get_ipv4(s); + stream_get(&svi_ifindex, s, sizeof(ifindex_t)); +@@ -3335,13 +3360,18 @@ static int bgp_zebra_process_local_vni(ZAPI_CALLBACK_ARGS) + vrf_id_to_name(vrf_id), vni, + vrf_id_to_name(tenant_vrf_id), svi_ifindex); + ++ if (ipaddr_is_zero(&vtep_ip)) { ++ SET_IPADDR_V4(&vtep_ip); ++ vtep_ip.ipaddr_v4 = bgp->router_id; ++ } ++ + if (cmd == ZEBRA_VNI_ADD) { + frrtrace(4, frr_bgp, evpn_local_vni_add_zrecv, vni, vtep_ip, + tenant_vrf_id, mcast_grp); + + return bgp_evpn_local_vni_add( + bgp, vni, +- vtep_ip.s_addr != INADDR_ANY ? vtep_ip : bgp->router_id, ++ &vtep_ip, + tenant_vrf_id, mcast_grp, svi_ifindex); + } else { + frrtrace(1, frr_bgp, evpn_local_vni_del_zrecv, vni); +diff --git a/bgpd/bgpd.h b/bgpd/bgpd.h +index 5ca647fe0..690ada13e 100644 +--- a/bgpd/bgpd.h ++++ b/bgpd/bgpd.h +@@ -875,7 +875,7 @@ struct bgp { + struct ethaddr rmac; + + /* originator ip - to be used as NH for type-5 routes */ +- struct in_addr originator_ip; ++ struct ipaddr originator_ip; + + /* SVI associated with the L3-VNI corresponding to this vrf */ + ifindex_t l3vni_svi_ifindex; +-- +2.43.0 + diff --git a/src/sonic-frr/patch/0040-bgpd-zebra-tests-Enable-V6-VTEP-for-Single-Homing-Vx.patch b/src/sonic-frr/patch/0040-bgpd-zebra-tests-Enable-V6-VTEP-for-Single-Homing-Vx.patch new file mode 100644 index 00000000000..866e29faea4 --- /dev/null +++ b/src/sonic-frr/patch/0040-bgpd-zebra-tests-Enable-V6-VTEP-for-Single-Homing-Vx.patch @@ -0,0 +1,1463 @@ +From cf8802d4a2d9632aaf0cc7d2b14716d47e40e0e4 Mon Sep 17 00:00:00 2001 +From: Mike RE Mallin +Date: Tue, 1 Apr 2025 12:57:31 -0400 +Subject: bgpd, zebra, tests: Enable V6 VTEP for Single Homing VxLAN + +This commit switches the ZAPI messaging to send/receive "struct ipaddr" +between BGP and Zebra for L2VNI, L3VNI and MAC-IP. + +Revise the VTEP comparison logic in bgp_evpn_rt5 to accomodate +the changes + +A variant of bgp_evpn_rt5 for V6 VTEP is added to test the changes +from end-to-end. + +Signed-off-by: Mike Mallin +(cherry picked from commit d4f2cc7c97fca92b00bbfa649ae4ba153d1b4dfa) +Signed-off-by: Tamer Ahmed + +diff --git a/bgpd/bgp_evpn.c b/bgpd/bgp_evpn.c +index 92789b424..9565b7efd 100644 +--- a/bgpd/bgp_evpn.c ++++ b/bgpd/bgp_evpn.c +@@ -972,18 +972,10 @@ static enum zclient_send_status bgp_zebra_send_remote_macip( + */ + if (bgp_evpn_is_esi_valid(esi)) { + esi_valid = true; +-#if 1 +- stream_put_in_addr(s, &zero_remote_vtep_ip.ipaddr_v4); +-#else + stream_put_ipaddr(s, &zero_remote_vtep_ip); +-#endif /* 1 */ + } else { + esi_valid = false; +-#if 1 +- stream_put_in_addr(s, &remote_vtep_ip->ipaddr_v4); +-#else +- stream_put_ipaddr(s, &remote_vtep_ip); +-#endif ++ stream_put_ipaddr(s, remote_vtep_ip); + } + + /* TX flags - MAC sticky status and/or gateway mac */ +@@ -1051,19 +1043,7 @@ bgp_zebra_send_remote_vtep(struct bgp *bgp, struct bgpevpn *vpn, + s, add ? ZEBRA_REMOTE_VTEP_ADD : ZEBRA_REMOTE_VTEP_DEL, + bgp->vrf_id); + stream_putl(s, vpn ? vpn->vni : 0); +-#if 1 +- if (is_evpn_prefix_ipaddr_v4(p)) +- stream_put_in_addr(s, &p->prefix.imet_addr.ip.ipaddr_v4); +- else if (is_evpn_prefix_ipaddr_v6(p)) { +- flog_err( +- EC_BGP_VTEP_INVALID, +- "Bad remote IP when trying to %s remote VTEP for VNI %u", +- add ? "ADD" : "DEL", (vpn ? vpn->vni : 0)); +- return ZCLIENT_SEND_FAILURE; +- } +-#else + stream_put_ipaddr(s, &p->prefix.imet_addr.ip); +-#endif + stream_putl(s, flood_control); + + stream_putw_at(s, 0, stream_get_endp(s)); +diff --git a/bgpd/bgp_zebra.c b/bgpd/bgp_zebra.c +index aeb38d8bb..ab1af5aa0 100644 +--- a/bgpd/bgp_zebra.c ++++ b/bgpd/bgp_zebra.c +@@ -3272,17 +3272,7 @@ static int bgp_zebra_process_local_l3vni(ZAPI_CALLBACK_ARGS) + l3vni = stream_getl(s); + if (cmd == ZEBRA_L3VNI_ADD) { + stream_get(&svi_rmac, s, sizeof(struct ethaddr)); +-#if 1 +- originator_ip.ipaddr_v4.s_addr = stream_get_ipv4(s); +- SET_IPADDR_V4(&originator_ip); +-#else +- STREAM_GETW(s, originator_ip.ipa_type); +- if (originator_ip.ipa_type == IPADDR_V4) { +- STREAM_GET(&originator_ip.ipaddr_v4, s, IPV4_MAX_BYTELEN); +- } else if (originator_ip.ipa_type == IPADDR_V6) { +- STREAM_GET(&originator_ip.ipaddr_v6, s, IPV6_MAX_BYTELEN); +- } +-#endif /* 1 */ ++ stream_get_ipaddr(s, &originator_ip); + stream_get(&filter, s, sizeof(int)); + svi_ifindex = stream_getl(s); + stream_get(&vrr_rmac, s, sizeof(struct ethaddr)); +@@ -3328,22 +3318,11 @@ static int bgp_zebra_process_local_vni(ZAPI_CALLBACK_ARGS) + s = zclient->ibuf; + vni = stream_getl(s); + if (cmd == ZEBRA_VNI_ADD) { +-#if 1 +- SET_IPADDR_V4(&vtep_ip); +- vtep_ip.ipaddr_v4.s_addr = stream_get_ipv4(s); +-#else +- STREAM_GETW(s, vtep_ip.ipa_type); +- if (vtep_ip.ipa_type == IPADDR_V4) { +- STREAM_GET(&vtep_ip.ipaddr_v4, s, IPV4_MAX_BYTELEN); +- } else if (vtep_ip.ipa_type == IPADDR_V6) { +- STREAM_GET(&vtep_ip.ipaddr_v6, s, IPV6_MAX_BYTELEN); +- } else { ++ if (!stream_get_ipaddr(s, &vtep_ip)) { + if (BGP_DEBUG(zebra, ZEBRA)) +- zlog_err( +- "Unexpected VTEP IP address type=%u", vtep_ip.ipa_type); ++ zlog_err("Unable to read VTEP IP address from stream"); + return 0; + } +-#endif /* 1 */ + stream_get(&tenant_vrf_id, s, sizeof(vrf_id_t)); + mcast_grp.s_addr = stream_get_ipv4(s); + stream_get(&svi_ifindex, s, sizeof(ifindex_t)); +diff --git a/tests/topotests/bgp_evpn_rt5/r1/bgp_l2vpn_evpn_routes_all_v6_vtep.json b/tests/topotests/bgp_evpn_rt5/r1/bgp_l2vpn_evpn_routes_all_v6_vtep.json +new file mode 100644 +index 000000000..59f101c50 +--- /dev/null ++++ b/tests/topotests/bgp_evpn_rt5/r1/bgp_l2vpn_evpn_routes_all_v6_vtep.json +@@ -0,0 +1,191 @@ ++{ ++ "bgpLocalRouterId":"192.168.100.21", ++ "defaultLocPrf":100, ++ "localAS":65000, ++ "65000:201":{ ++ "rd":"65000:201", ++ "[5]:[0]:[32]:[192.168.101.41]":{ ++ "prefix":"[5]:[0]:[32]:[192.168.101.41]", ++ "prefixLen":352, ++ "paths":[ ++ { ++ "valid":true, ++ "bestpath":true, ++ "selectionReason":"First path received", ++ "pathFrom":"internal", ++ "routeType":5, ++ "ethTag":0, ++ "ipLen":32, ++ "ip":"192.168.101.41", ++ "metric":0, ++ "locPrf":100, ++ "weight":0, ++ "peerId":"192:168:100::41", ++ "path":"", ++ "origin":"IGP", ++ "nexthops":[ ++ { ++ "ip":"192:168:100::41", ++ "hostname":"r2", ++ "afi":"ipv6", ++ "used":true ++ } ++ ] ++ } ++ ] ++ }, ++ "[5]:[0]:[32]:[192.168.102.41]":{ ++ "prefix":"[5]:[0]:[32]:[192.168.102.41]", ++ "prefixLen":352, ++ "paths":[ ++ { ++ "valid":true, ++ "bestpath":true, ++ "selectionReason":"First path received", ++ "pathFrom":"internal", ++ "routeType":5, ++ "ethTag":0, ++ "ipLen":32, ++ "ip":"192.168.102.41", ++ "metric":0, ++ "locPrf":100, ++ "weight":0, ++ "peerId":"192:168:100::41", ++ "path":"", ++ "origin":"IGP", ++ "nexthops":[ ++ { ++ "ip":"192:168:100::41", ++ "hostname":"r2", ++ "afi":"ipv6", ++ "used":true ++ } ++ ] ++ } ++ ] ++ }, ++ "[5]:[0]:[128]:[fd00::2]":{ ++ "prefix":"[5]:[0]:[128]:[fd00::2]", ++ "prefixLen":352, ++ "paths":[ ++ { ++ "valid":true, ++ "bestpath":true, ++ "selectionReason":"First path received", ++ "pathFrom":"internal", ++ "routeType":5, ++ "ethTag":0, ++ "ipLen":128, ++ "ip":"fd00::2", ++ "metric":0, ++ "locPrf":100, ++ "weight":0, ++ "peerId":"192:168:100::41", ++ "path":"", ++ "origin":"IGP", ++ "nexthops":[ ++ { ++ "ip":"192:168:100::41", ++ "hostname":"r2", ++ "afi":"ipv6", ++ "used":true ++ } ++ ] ++ } ++ ] ++ }, ++ "[5]:[0]:[128]:[fd00::3]":{ ++ "prefix":"[5]:[0]:[128]:[fd00::3]", ++ "prefixLen":352, ++ "paths":[ ++ { ++ "valid":true, ++ "bestpath":true, ++ "selectionReason":"First path received", ++ "pathFrom":"internal", ++ "routeType":5, ++ "ethTag":0, ++ "ipLen":128, ++ "ip":"fd00::3", ++ "metric":0, ++ "locPrf":100, ++ "weight":0, ++ "peerId":"192:168:100::41", ++ "path":"", ++ "origin":"IGP", ++ "nexthops":[ ++ { ++ "ip":"192:168:100::41", ++ "hostname":"r2", ++ "afi":"ipv6", ++ "used":true ++ } ++ ] ++ } ++ ] ++ } ++ }, ++ "65000:101":{ ++ "rd":"65000:101", ++ "[5]:[0]:[32]:[192.168.102.21]":{ ++ "prefix":"[5]:[0]:[32]:[192.168.102.21]", ++ "prefixLen":352, ++ "paths":[ ++ { ++ "valid":true, ++ "bestpath":true, ++ "selectionReason":"First path received", ++ "pathFrom":"external", ++ "routeType":5, ++ "ethTag":0, ++ "ipLen":32, ++ "ip":"192.168.102.21", ++ "metric":0, ++ "weight":32768, ++ "peerId":"(unspec)", ++ "path":"", ++ "origin":"IGP", ++ "nexthops":[ ++ { ++ "ip":"192:168:100::21", ++ "hostname":"r1", ++ "afi":"ipv6", ++ "used":true ++ } ++ ] ++ } ++ ] ++ }, ++ "[5]:[0]:[128]:[fd00::1]":{ ++ "prefix":"[5]:[0]:[128]:[fd00::1]", ++ "prefixLen":352, ++ "paths":[ ++ { ++ "valid":true, ++ "bestpath":true, ++ "selectionReason":"First path received", ++ "pathFrom":"external", ++ "routeType":5, ++ "ethTag":0, ++ "ipLen":128, ++ "ip":"fd00::1", ++ "metric":0, ++ "weight":32768, ++ "peerId":"(unspec)", ++ "path":"", ++ "origin":"IGP", ++ "nexthops":[ ++ { ++ "ip":"192:168:100::21", ++ "hostname":"r1", ++ "afi":"ipv6", ++ "used":true ++ } ++ ] ++ } ++ ] ++ } ++ }, ++ "numPrefix":6, ++ "totalPrefix":6 ++} +diff --git a/tests/topotests/bgp_evpn_rt5/r1/bgp_l2vpn_evpn_routes_v6_vtep.json b/tests/topotests/bgp_evpn_rt5/r1/bgp_l2vpn_evpn_routes_v6_vtep.json +new file mode 100644 +index 000000000..d677396bd +--- /dev/null ++++ b/tests/topotests/bgp_evpn_rt5/r1/bgp_l2vpn_evpn_routes_v6_vtep.json +@@ -0,0 +1,131 @@ ++{ ++ "bgpLocalRouterId":"192.168.100.21", ++ "defaultLocPrf":100, ++ "localAS":65000, ++ "65000:201":{ ++ "rd":"65000:201", ++ "[5]:[0]:[32]:[192.168.101.41]":{ ++ "prefix":"[5]:[0]:[32]:[192.168.101.41]", ++ "prefixLen":352, ++ "paths":[ ++ { ++ "valid":true, ++ "bestpath":true, ++ "selectionReason":"First path received", ++ "pathFrom":"internal", ++ "routeType":5, ++ "ethTag":0, ++ "ipLen":32, ++ "ip":"192.168.101.41", ++ "metric":0, ++ "locPrf":100, ++ "weight":0, ++ "peerId":"192:168:100::41", ++ "path":"", ++ "origin":"IGP", ++ "nexthops":[ ++ { ++ "ip":"192:168:100::41", ++ "hostname":"r2", ++ "afi":"ipv6", ++ "used":true ++ } ++ ] ++ } ++ ] ++ }, ++ "[5]:[0]:[128]:[fd00::2]":{ ++ "prefix":"[5]:[0]:[128]:[fd00::2]", ++ "prefixLen":352, ++ "paths":[ ++ { ++ "valid":true, ++ "bestpath":true, ++ "selectionReason":"First path received", ++ "pathFrom":"internal", ++ "routeType":5, ++ "ethTag":0, ++ "ipLen":128, ++ "ip":"fd00::2", ++ "metric":0, ++ "locPrf":100, ++ "weight":0, ++ "peerId":"192:168:100::41", ++ "path":"", ++ "origin":"IGP", ++ "nexthops":[ ++ { ++ "ip":"192:168:100::41", ++ "hostname":"r2", ++ "afi":"ipv6", ++ "used":true ++ } ++ ] ++ } ++ ] ++ } ++ }, ++ "65000:101":{ ++ "rd":"65000:101", ++ "[5]:[0]:[32]:[192.168.102.21]":{ ++ "prefix":"[5]:[0]:[32]:[192.168.102.21]", ++ "prefixLen":352, ++ "paths":[ ++ { ++ "valid":true, ++ "bestpath":true, ++ "selectionReason":"First path received", ++ "pathFrom":"external", ++ "routeType":5, ++ "ethTag":0, ++ "ipLen":32, ++ "ip":"192.168.102.21", ++ "metric":0, ++ "weight":32768, ++ "peerId":"(unspec)", ++ "path":"", ++ "origin":"IGP", ++ "nexthops":[ ++ { ++ "ip":"192:168:100::21", ++ "hostname":"r1", ++ "afi":"ipv6", ++ "used":true ++ } ++ ] ++ } ++ ] ++ }, ++ "[5]:[0]:[128]:[fd00::1]":{ ++ "prefix":"[5]:[0]:[128]:[fd00::1]", ++ "prefixLen":352, ++ "paths":[ ++ { ++ "valid":true, ++ "bestpath":true, ++ "selectionReason":"First path received", ++ "pathFrom":"external", ++ "routeType":5, ++ "ethTag":0, ++ "ipLen":128, ++ "ip":"fd00::1", ++ "metric":0, ++ "weight":32768, ++ "peerId":"(unspec)", ++ "path":"", ++ "origin":"IGP", ++ "nexthops":[ ++ { ++ "ip":"192:168:100::21", ++ "hostname":"r1", ++ "afi":"ipv6", ++ "used":true ++ } ++ ] ++ } ++ ] ++ } ++ }, ++ "numPrefix":4, ++ "totalPrefix":4 ++} +diff --git a/tests/topotests/bgp_evpn_rt5/r1/frr-v6-vtep.conf b/tests/topotests/bgp_evpn_rt5/r1/frr-v6-vtep.conf +new file mode 100644 +index 000000000..f92d58e8a +--- /dev/null ++++ b/tests/topotests/bgp_evpn_rt5/r1/frr-v6-vtep.conf +@@ -0,0 +1,61 @@ ++! debug zebra vxlan ++! debug zebra kernel ++! debug zebra dplane ++! debug zebra rib ++! debug bgp neighbor-events ++! debug bgp updates ++! debug bgp zebra ++vrf r1-vrf-101 ++ vni 101 ++ exit-vrf ++! ++interface r1-eth0 ++ ipv6 address 192:168:100::21/96 ++! ++interface loop101 vrf r1-vrf-101 ++ ip address 192.168.102.21/32 ++ ipv6 address fd00::1/128 ++! ++router bgp 65000 ++ bgp router-id 192.168.100.21 ++ bgp log-neighbor-changes ++ no bgp default ipv4-unicast ++ no bgp ebgp-requires-policy ++ neighbor 192:168:100::41 remote-as 65000 ++ neighbor 192:168:100::41 capability extended-nexthop ++ neighbor 192:168:100::61 remote-as 65500 ++ neighbor 192:168:100::61 capability extended-nexthop ++ ! ++ address-family l2vpn evpn ++ neighbor 192:168:100::41 activate ++ neighbor 192:168:100::41 route-map rmap_r1 in ++ neighbor 192:168:100::61 activate ++ neighbor 192:168:100::61 route-map rmap_r3 in ++ advertise-all-vni ++ exit-address-family ++! ++router bgp 65000 vrf r1-vrf-101 ++ bgp router-id 192.168.102.21 ++ bgp log-neighbor-changes ++ no bgp network import-check ++ address-family ipv4 unicast ++ network 192.168.102.21/32 ++ exit-address-family ++ address-family ipv6 unicast ++ network fd00::1/128 ++ exit-address-family ++ address-family l2vpn evpn ++ rd 65000:101 ++ route-target both 65:101 ++ advertise ipv4 unicast ++ advertise ipv6 unicast ++ exit-address-family ++ ! ++route-map rmap_r3 deny 1 ++ match evpn vni 102 ++exit ++route-map rmap_r1 permit 1 ++ match evpn vni 101 ++exit ++ ++ +diff --git a/tests/topotests/bgp_evpn_rt5/r2/bgp_l2vpn_evpn_routes_v6_vtep.json b/tests/topotests/bgp_evpn_rt5/r2/bgp_l2vpn_evpn_routes_v6_vtep.json +new file mode 100644 +index 000000000..cc054f698 +--- /dev/null ++++ b/tests/topotests/bgp_evpn_rt5/r2/bgp_l2vpn_evpn_routes_v6_vtep.json +@@ -0,0 +1,131 @@ ++{ ++ "bgpLocalRouterId":"192.168.100.41", ++ "defaultLocPrf":100, ++ "localAS":65000, ++ "65000:201":{ ++ "rd":"65000:201", ++ "[5]:[0]:[32]:[192.168.101.41]":{ ++ "prefix":"[5]:[0]:[32]:[192.168.101.41]", ++ "prefixLen":352, ++ "paths":[ ++ { ++ "valid":true, ++ "bestpath":true, ++ "selectionReason":"First path received", ++ "pathFrom":"external", ++ "routeType":5, ++ "ethTag":0, ++ "ipLen":32, ++ "ip":"192.168.101.41", ++ "metric":0, ++ "weight":32768, ++ "peerId":"(unspec)", ++ "path":"", ++ "origin":"IGP", ++ "nexthops":[ ++ { ++ "ip":"192:168:100::41", ++ "hostname":"r2", ++ "afi":"ipv6", ++ "used":true ++ } ++ ] ++ } ++ ] ++ }, ++ "[5]:[0]:[128]:[fd00::2]":{ ++ "prefix":"[5]:[0]:[128]:[fd00::2]", ++ "prefixLen":352, ++ "paths":[ ++ { ++ "valid":true, ++ "bestpath":true, ++ "selectionReason":"First path received", ++ "pathFrom":"external", ++ "routeType":5, ++ "ethTag":0, ++ "ipLen":128, ++ "ip":"fd00::2", ++ "metric":0, ++ "weight":32768, ++ "peerId":"(unspec)", ++ "path":"", ++ "origin":"IGP", ++ "nexthops":[ ++ { ++ "ip":"192:168:100::41", ++ "hostname":"r2", ++ "afi":"ipv6", ++ "used":true ++ } ++ ] ++ } ++ ] ++ } ++ }, ++ "65000:101":{ ++ "rd":"65000:101", ++ "[5]:[0]:[32]:[192.168.102.21]":{ ++ "prefix":"[5]:[0]:[32]:[192.168.102.21]", ++ "prefixLen":352, ++ "paths":[ ++ { ++ "valid":true, ++ "bestpath":true, ++ "selectionReason":"First path received", ++ "pathFrom":"internal", ++ "routeType":5, ++ "ethTag":0, ++ "ipLen":32, ++ "ip":"192.168.102.21", ++ "metric":0, ++ "locPrf":100, ++ "weight":0, ++ "peerId":"192:168:100::21", ++ "path":"", ++ "origin":"IGP", ++ "nexthops":[ ++ { ++ "ip":"192:168:100::21", ++ "hostname":"r1", ++ "afi":"ipv6", ++ "used":true ++ } ++ ] ++ } ++ ] ++ }, ++ "[5]:[0]:[128]:[fd00::1]":{ ++ "prefix":"[5]:[0]:[128]:[fd00::1]", ++ "prefixLen":352, ++ "paths":[ ++ { ++ "valid":true, ++ "bestpath":true, ++ "selectionReason":"First path received", ++ "pathFrom":"internal", ++ "routeType":5, ++ "ethTag":0, ++ "ipLen":128, ++ "ip":"fd00::1", ++ "metric":0, ++ "locPrf":100, ++ "weight":0, ++ "peerId":"192:168:100::21", ++ "path":"", ++ "origin":"IGP", ++ "nexthops":[ ++ { ++ "ip":"192:168:100::21", ++ "hostname":"r1", ++ "afi":"ipv6", ++ "used":true ++ } ++ ] ++ } ++ ] ++ } ++ }, ++ "numPrefix":4, ++ "totalPrefix":4 ++} +diff --git a/tests/topotests/bgp_evpn_rt5/r2/frr-v6-vtep.conf b/tests/topotests/bgp_evpn_rt5/r2/frr-v6-vtep.conf +new file mode 100644 +index 000000000..95b440740 +--- /dev/null ++++ b/tests/topotests/bgp_evpn_rt5/r2/frr-v6-vtep.conf +@@ -0,0 +1,65 @@ ++! debug zebra vxlan ++! debug bgp neighbor-events ++! debug bgp updates ++! debug bgp zebra ++ ++vrf r2-vrf-101 ++ vni 101 ++ exit-vrf ++! ++interface loop101 vrf r2-vrf-101 ++ ip address 192.168.101.41/32 ++ ipv6 address fd00::2/128 ++! ++interface r2-eth0 ++ ipv6 address 192:168:100::41/96 ++! ++router bgp 65000 ++ bgp router-id 192.168.100.41 ++ bgp log-neighbor-changes ++ no bgp default ipv4-unicast ++ neighbor 192:168:100::21 peer-group ++ neighbor 192:168:100::21 remote-as 65000 ++ neighbor 192:168:100::21 capability extended-nexthop ++ ! ++ address-family l2vpn evpn ++ neighbor 192:168:100::21 activate ++ advertise-all-vni ++ exit-address-family ++! ++router bgp 65000 vrf r2-vrf-101 ++ bgp router-id 192.168.101.41 ++ bgp log-neighbor-changes ++ no bgp network import-check ++ address-family ipv4 unicast ++ network 192.168.101.41/32 ++ network 192.168.102.41/32 ++ exit-address-family ++ address-family ipv6 unicast ++ network fd00::2/128 ++ network fd00::3/128 ++ exit-address-family ++ address-family l2vpn evpn ++ rd 65000:201 ++ route-target both 65:101 ++ advertise ipv4 unicast route-map rmap4 ++ advertise ipv6 unicast route-map rmap6 ++ exit-address-family ++ ! ++ipv6 access-list acl6_1 seq 10 permit fd00::2/128 ++ipv6 access-list acl6_2 seq 10 permit fd00::3/128 ++access-list acl4_1 seq 10 permit 192.168.101.41/32 ++access-list acl4_2 seq 10 permit 192.168.102.41/32 ++route-map rmap4 permit 1 ++ match ip address acl4_1 ++exit ++route-map rmap4 deny 2 ++ match ip address acl4_2 ++exit ++route-map rmap6 permit 1 ++ match ipv6 address acl6_1 ++exit ++route-map rmap6 deny 2 ++ match ipv6 address acl6_2 ++exit ++ +diff --git a/tests/topotests/bgp_evpn_rt5/r3/frr-v6-vtep.conf b/tests/topotests/bgp_evpn_rt5/r3/frr-v6-vtep.conf +new file mode 100644 +index 000000000..b00cd634e +--- /dev/null ++++ b/tests/topotests/bgp_evpn_rt5/r3/frr-v6-vtep.conf +@@ -0,0 +1,46 @@ ++! debug bgp neighbor-events ++! debug bgp updates ++! debug bgp zebra ++vrf r3-vrf-102 ++ vni 102 ++ exit-vrf ++! ++interface r3-eth0 ++ ipv6 address 192:168:100::61/96 ++! ++interface loop102 vrf r3-vrf-102 ++ ip address 192.168.102.61/32 ++ ipv6 address fd00:6::1/128 ++! ++router bgp 65500 ++ bgp router-id 192.168.100.61 ++ bgp log-neighbor-changes ++ no bgp default ipv4-unicast ++ no bgp ebgp-requires-policy ++ neighbor 192:168:100::21 remote-as 65000 ++ neighbor 192:168:100::21 capability extended-nexthop ++ ! ++ address-family l2vpn evpn ++ neighbor 192:168:100::21 activate ++ advertise-all-vni ++ exit-address-family ++! ++router bgp 65000 vrf r3-vrf-102 ++ bgp router-id 192.168.100.61 ++ bgp log-neighbor-changes ++ no bgp network import-check ++ address-family ipv4 unicast ++ network 192.168.102.102/32 ++ exit-address-family ++ address-family ipv6 unicast ++ network fd00:102::1/128 ++ exit-address-family ++ address-family l2vpn evpn ++ rd 65000:302 ++ route-target both 65:101 ++ advertise ipv4 unicast ++ advertise ipv6 unicast ++ exit-address-family ++ ! ++ ++ +diff --git a/tests/topotests/bgp_evpn_rt5/test_bgp_evpn.py b/tests/topotests/bgp_evpn_rt5/test_bgp_evpn.py +index 18a4bc6ec..1f8d451b5 100644 +--- a/tests/topotests/bgp_evpn_rt5/test_bgp_evpn.py ++++ b/tests/topotests/bgp_evpn_rt5/test_bgp_evpn.py +@@ -965,20 +965,39 @@ def _validate_evpn_rmacs(router, expected): + and that VTEP IPs are unique for each VRF/VNI + """ + data = router.vtysh_cmd("show evpn rmac vni all json", isjson=True) +- cmp = topotest.json_cmp(data, expected, exact=False) +- if cmp is not None: +- return cmp ++ ++ # Each object (vni) in expected should be in the output ++ for vni in expected.keys(): ++ if vni not in data: ++ return "Failed to find expected VNI {}".format(vni) ++ ++ # Each rmac in expected should be in output ++ # the VTEP in each expected rmac object should be in output - in v4 or v6 form ++ # Each VTEP should be in vni only once... + + for vni, details in data.items(): + vtep_ips = [] ++ jvni = None ++ ++ if vni in expected: ++ jvni = expected[vni] ++ + for key, detail in details.items(): + if key == "numRmacs": + continue ++ + vtep_ip = detail["vtepIp"] ++ rmac = detail["routerMac"] ++ if jvni != None: ++ if rmac in jvni: ++ # Compare VTEP IPs - a forgiving comparison ++ if detail["vtepIp"].find(jvni[rmac]["vtepIp"]) < 0: ++ return "VTEP {} failed, not found in VNI {}".format( ++ detail["vtepIp"], vni) + if vtep_ip in vtep_ips: + # VTEP IP is occuring for more than one RMAC in the same VNI + return "Duplicate VTEP IP {} found in VNI {}".format(vtep_ip, vni) +- vtep_ips.append(detail["vtepIp"]) ++ vtep_ips.append(vtep_ip) + + return None + +diff --git a/tests/topotests/bgp_evpn_rt5/test_bgp_evpn_v6_vtep.py b/tests/topotests/bgp_evpn_rt5/test_bgp_evpn_v6_vtep.py +new file mode 100644 +index 000000000..797963867 +--- /dev/null ++++ b/tests/topotests/bgp_evpn_rt5/test_bgp_evpn_v6_vtep.py +@@ -0,0 +1,565 @@ ++#!/usr/bin/env python ++# SPDX-License-Identifier: ISC ++ ++# ++# test_bgp_evpn_v6_vtep.py ++# Part of NetDEF Topology Tests ++# ++# Copyright (c) 2019 by 6WIND ++# Copyright (c) 2025 by cisco Systems Inc. ++# ++ ++""" ++ test_bgp_evpn_v6_vtep.py: Test the FRR BGP daemon with BGP IPv6 interface, ++ IPv6 VTEP Address and with route advertisements on a separate netns. ++""" ++ ++import json ++from functools import partial ++import os ++import sys ++import pytest ++import platform ++ ++# Save the Current Working Directory to find configuration files. ++CWD = os.path.dirname(os.path.realpath(__file__)) ++sys.path.append(os.path.join(CWD, "../")) ++ ++# pylint: disable=C0413 ++# Import topogen and topotest helpers ++from lib import topotest ++from lib.bgp import verify_bgp_rib ++from lib.common_config import apply_raw_config ++from lib.topogen import Topogen, TopoRouter, get_topogen ++from lib.topolog import logger ++ ++# Required to instantiate the topology builder class. ++ ++pytestmark = [pytest.mark.bgpd] ++ ++ ++def build_topo(tgen): ++ "Build function" ++ ++ tgen.add_router("r1") ++ tgen.add_router("r2") ++ tgen.add_router("r3") ++ ++ switch = tgen.add_switch("s1") ++ switch.add_link(tgen.gears["r1"]) ++ switch.add_link(tgen.gears["r2"]) ++ switch.add_link(tgen.gears["r3"]) ++ ++ switch = tgen.add_switch("s2") ++ switch.add_link(tgen.gears["r1"]) ++ ++ switch = tgen.add_switch("s3") ++ switch.add_link(tgen.gears["r2"]) ++ ++ switch = tgen.add_switch("s4") ++ switch.add_link(tgen.gears["r3"]) ++ ++ ++def setup_module(mod): ++ "Sets up the pytest environment" ++ ++ tgen = Topogen(build_topo, mod.__name__) ++ tgen.start_topology() ++ ++ router_list = tgen.routers() ++ ++ krel = platform.release() ++ if topotest.version_cmp(krel, "4.18") < 0: ++ logger.info( ++ 'BGP EVPN RT5 NETNS tests will not run (have kernel "{}", but it requires 4.18)'.format( ++ krel ++ ) ++ ) ++ return pytest.skip("Skipping BGP EVPN RT5 NETNS Test. Kernel not supported") ++ ++ # create VRF vrf-101 on R1, R2, R3 ++ # create loop101 ++ cmds_vrflite = [ ++ "ip link add {0}-vrf-{1} type vrf table {1}", ++ "ip ru add oif {0}-vrf-{1} table {1}", ++ "ip ru add iif {0}-vrf-{1} table {1}", ++ "ip link set dev {0}-vrf-{1} up", ++ "ip link add loop{1} type dummy", ++ "ip link set dev loop{1} master {0}-vrf-{1}", ++ "ip link set dev loop{1} up", ++ ] ++ ++ cmds_r2 = [ # config routing 101 ++ "ip link add name bridge-101 up type bridge stp_state 0", ++ "ip link set bridge-101 master {}-vrf-101", ++ "ip link set dev bridge-101 up", ++ "ip link add name vxlan-101 type vxlan id 101 dstport 4789 dev r2-eth0 local 192:168:100::41", ++ "ip link set dev vxlan-101 master bridge-101", ++ "ip link set vxlan-101 up type bridge_slave learning off flood off mcast_flood off", ++ ] ++ ++ cmds_r3 = [ # config routing 102 ++ "ip link add name bridge-102 up type bridge stp_state 0", ++ "ip link set bridge-102 master {}-vrf-102", ++ "ip link set dev bridge-102 up", ++ "ip link add name vxlan-102 type vxlan id 102 dstport 4789 dev r3-eth0 local 192:168:100::61", ++ "ip link set dev vxlan-102 master bridge-102", ++ "ip link set vxlan-102 up type bridge_slave learning off flood off mcast_flood off", ++ ] ++ ++ # cmds_r1_netns_method3 = [ ++ # "ip link add name vxlan-{1} type vxlan id {1} dstport 4789 dev {0}-eth0 local 192:168:100::21", ++ # "ip link set dev vxlan-{1} netns {0}-vrf-{1}", ++ # "ip netns exec {0}-vrf-{1} ip li set dev lo up", ++ # "ip netns exec {0}-vrf-{1} ip link add name bridge-{1} up type bridge stp_state 0", ++ # "ip netns exec {0}-vrf-{1} ip link set dev vxlan-{1} master bridge-{1}", ++ # "ip netns exec {0}-vrf-{1} ip link set bridge-{1} up", ++ # "ip netns exec {0}-vrf-{1} ip link set vxlan-{1} up", ++ # ] ++ ++ router = tgen.gears["r1"] ++ ++ ns = "r1-vrf-101" ++ tgen.net["r1"].add_netns(ns) ++ tgen.net["r1"].cmd_raises("ip link add loop101 type dummy") ++ tgen.net["r1"].set_intf_netns("loop101", ns, up=True) ++ ++ router = tgen.gears["r2"] ++ for cmd in cmds_vrflite: ++ logger.info("cmd to r2: " + cmd.format("r2", 101)) ++ output = router.cmd_raises(cmd.format("r2", 101)) ++ logger.info("result: " + output) ++ ++ for cmd in cmds_r2: ++ logger.info("cmd to r2: " + cmd.format("r2")) ++ output = router.cmd_raises(cmd.format("r2")) ++ logger.info("result: " + output) ++ ++ router = tgen.gears["r3"] ++ for cmd in cmds_vrflite: ++ logger.info("cmd to r3: " + cmd.format("r3", 102)) ++ output = router.cmd_raises(cmd.format("r3", 102)) ++ logger.info("result: " + output) ++ ++ for cmd in cmds_r3: ++ logger.info("cmd to r3: " + cmd.format("r3")) ++ output = router.cmd_raises(cmd.format("r3")) ++ logger.info("result: " + output) ++ ++ tgen.net["r1"].cmd_raises( ++ "ip link add name vxlan-101 type vxlan id 101 dstport 4789 dev r1-eth0 local 192:168:100::21" ++ ) ++ tgen.net["r1"].set_intf_netns("vxlan-101", "r1-vrf-101", up=True) ++ tgen.net["r1"].cmd_raises("ip -n r1-vrf-101 link set lo up") ++ tgen.net["r1"].cmd_raises( ++ "ip -n r1-vrf-101 link add name bridge-101 up type bridge stp_state 0" ++ ) ++ tgen.net["r1"].cmd_raises( ++ "ip -n r1-vrf-101 link set dev vxlan-101 master bridge-101" ++ ) ++ tgen.net["r1"].cmd_raises("ip -n r1-vrf-101 link set bridge-101 up") ++ tgen.net["r1"].cmd_raises("ip -n r1-vrf-101 link set vxlan-101 up") ++ ++ for rname, router in tgen.routers().items(): ++ logger.info("Loading router %s" % rname) ++ if rname == "r1": ++ router.use_netns_vrf() ++ router.load_frr_config(os.path.join(CWD, "{}/frr-v6-vtep.conf".format(rname))) ++ else: ++ router.load_frr_config(os.path.join(CWD, "{}/frr-v6-vtep.conf".format(rname))) ++ ++ # Initialize all routers. ++ tgen.start_router() ++ ++ ++def teardown_module(_mod): ++ "Teardown the pytest environment" ++ tgen = get_topogen() ++ ++ tgen.net["r1"].delete_netns("r1-vrf-101") ++ tgen.stop_topology() ++ ++ ++def _test_evpn_ping_router(pingrouter, ipv4_only=False): ++ """ ++ internal function to check ping between r1 and r2 ++ """ ++ # Check IPv4 and IPv6 connectivity between r1 and r2 ( routing vxlan evpn) ++ logger.info( ++ "Check Ping IPv4 from R1(r1-vrf-101) to R2(r2-vrf-101 = 192.168.101.41)" ++ ) ++ output = pingrouter.run("ip netns exec r1-vrf-101 ping 192.168.101.41 -f -c 1000") ++ logger.info(output) ++ if "1000 packets transmitted, 1000 received" not in output: ++ assertmsg = ( ++ "expected ping IPv4 from R1(r1-vrf-101) to R2(192.168.101.41) should be ok" ++ ) ++ assert 0, assertmsg ++ else: ++ logger.info("Check Ping IPv4 from R1(r1-vrf-101) to R2(192.168.101.41) OK") ++ ++ if ipv4_only: ++ return ++ ++ logger.info("Check Ping IPv6 from R1(r1-vrf-101) to R2(r2-vrf-101 = fd00::2)") ++ output = pingrouter.run("ip netns exec r1-vrf-101 ping fd00::2 -f -c 1000") ++ logger.info(output) ++ if "1000 packets transmitted, 1000 received" not in output: ++ assert 0, "expected ping IPv6 from R1(r1-vrf-101) to R2(fd00::2) should be ok" ++ else: ++ logger.info("Check Ping IPv6 from R1(r1-vrf-101) to R2(fd00::2) OK") ++ ++ ++def test_protocols_convergence(): ++ """ ++ Assert that all protocols have converged ++ statuses as they depend on it. ++ """ ++ tgen = get_topogen() ++ if tgen.routers_have_failure(): ++ pytest.skip(tgen.errors) ++ # Check BGP IPv4 routing tables on r1 ++ logger.info("Checking BGP L2VPN EVPN routes for convergence on r1") ++ ++ for rname in ("r1", "r2"): ++ router = tgen.gears[rname] ++ json_file = "{}/{}/bgp_l2vpn_evpn_routes_v6_vtep.json".format(CWD, router.name) ++ if not os.path.isfile(json_file): ++ assert 0, "bgp_l2vpn_evpn_routes_v6_vtep.json file not found" ++ ++ expected = json.loads(open(json_file).read()) ++ test_func = partial( ++ topotest.router_json_cmp, ++ router, ++ "show bgp l2vpn evpn json", ++ expected, ++ ) ++ _, result = topotest.run_and_expect(test_func, None, count=20, wait=1) ++ assertmsg = '"{}" JSON output mismatches'.format(router.name) ++ assert result is None, assertmsg ++ ++ ++def test_protocols_dump_info(): ++ """ ++ Dump EVPN information ++ """ ++ tgen = get_topogen() ++ if tgen.routers_have_failure(): ++ pytest.skip(tgen.errors) ++ # Check IPv4/IPv6 routing tables. ++ output = tgen.gears["r1"].vtysh_cmd("show bgp l2vpn evpn", isjson=False) ++ logger.info("==== result from show bgp l2vpn evpn") ++ logger.info(output) ++ output = tgen.gears["r1"].vtysh_cmd( ++ "show bgp l2vpn evpn route detail", isjson=False ++ ) ++ logger.info("==== result from show bgp l2vpn evpn route detail") ++ logger.info(output) ++ output = tgen.gears["r1"].vtysh_cmd("show bgp vrf r1-vrf-101 ipv4", isjson=False) ++ logger.info("==== result from show bgp vrf r1-vrf-101 ipv4") ++ logger.info(output) ++ output = tgen.gears["r1"].vtysh_cmd("show bgp vrf r1-vrf-101 ipv6", isjson=False) ++ logger.info("==== result from show bgp vrf r1-vrf-101 ipv6") ++ logger.info(output) ++ output = tgen.gears["r1"].vtysh_cmd("show bgp vrf r1-vrf-101", isjson=False) ++ logger.info("==== result from show bgp vrf r1-vrf-101 ") ++ logger.info(output) ++ output = tgen.gears["r1"].vtysh_cmd("show ip route vrf r1-vrf-101", isjson=False) ++ logger.info("==== result from show ip route vrf r1-vrf-101") ++ logger.info(output) ++ output = tgen.gears["r1"].vtysh_cmd("show ipv6 route vrf r1-vrf-101", isjson=False) ++ logger.info("==== result from show ipv6 route vrf r1-vrf-101") ++ logger.info(output) ++ output = tgen.gears["r1"].vtysh_cmd("show evpn vni detail", isjson=False) ++ logger.info("==== result from show evpn vni detail") ++ logger.info(output) ++ output = tgen.gears["r1"].vtysh_cmd("show evpn next-hops vni all", isjson=False) ++ logger.info("==== result from show evpn next-hops vni all") ++ logger.info(output) ++ output = tgen.gears["r1"].vtysh_cmd("show evpn rmac vni all", isjson=False) ++ logger.info("==== result from show evpn rmac vni all") ++ logger.info(output) ++ ++ ++def test_router_check_ip(): ++ """ ++ Check routes are correctly installed ++ """ ++ tgen = get_topogen() ++ if tgen.routers_have_failure(): ++ pytest.skip(tgen.errors) ++ ++ expected = { ++ "fd00::2/128": [ ++ { ++ "prefix": "fd00::2/128", ++ "vrfName": "r1-vrf-101", ++ "nexthops": [ ++ { ++ "ip": "192:168:100::41", ++ } ++ ], ++ } ++ ] ++ } ++ result = topotest.router_json_cmp( ++ tgen.gears["r1"], "show ipv6 route vrf r1-vrf-101 fd00::2/128 json", expected ++ ) ++ assert result is None, "ipv6 route check failed" ++ ++ ++def _test_router_check_evpn_contexts(router): ++ """ ++ Check EVPN nexthops and RMAC number are correctly configured ++ """ ++ expected = { ++ "101": { ++ "numNextHops": 1, ++ "192:168:100::41": { ++ "nexthopIp": "192:168:100::41", ++ }, ++ } ++ } ++ ++ result = topotest.router_json_cmp( ++ router, "show evpn next-hops vni all json", expected ++ ) ++ assert result is None, "evpn next-hops check failed" ++ ++ expected = {"101": {"numRmacs": 1}} ++ result = topotest.router_json_cmp(router, "show evpn rmac vni all json", expected) ++ assert result is None, "evpn rmac number check failed" ++ ++ ++def test_router_check_evpn_contexts(): ++ """ ++ Check EVPN nexthops and RMAC number are correctly configured ++ """ ++ tgen = get_topogen() ++ if tgen.routers_have_failure(): ++ pytest.skip(tgen.errors) ++ ++ _test_router_check_evpn_contexts(tgen.gears["r1"]) ++ ++ ++def test_evpn_ping(): ++ """ ++ Check ping between R1 and R2 is ok ++ """ ++ tgen = get_topogen() ++ if tgen.routers_have_failure(): ++ pytest.skip(tgen.errors) ++ ++ _test_evpn_ping_router(tgen.gears["r1"]) ++ ++ ++def test_evpn_disable_routemap(): ++ """ ++ Check the removal of a route-map on R2. More EVPN Prefixes are expected ++ """ ++ tgen = get_topogen() ++ if tgen.routers_have_failure(): ++ pytest.skip(tgen.errors) ++ ++ tgen.gears["r2"].vtysh_cmd( ++ """ ++ configure terminal\n ++ router bgp 65000 vrf r2-vrf-101\n ++ address-family l2vpn evpn\n ++ advertise ipv4 unicast\n ++ advertise ipv6 unicast\n ++ """ ++ ) ++ router = tgen.gears["r1"] ++ json_file = "{}/{}/bgp_l2vpn_evpn_routes_all_v6_vtep.json".format(CWD, router.name) ++ if not os.path.isfile(json_file): ++ assert 0, "bgp_l2vpn_evpn_routes_all_v6_vtep.json file not found" ++ ++ expected = json.loads(open(json_file).read()) ++ test_func = partial( ++ topotest.router_json_cmp, ++ router, ++ "show bgp l2vpn evpn json", ++ expected, ++ ) ++ _, result = topotest.run_and_expect(test_func, None, count=20, wait=1) ++ assertmsg = '"{}" JSON output mismatches'.format(router.name) ++ assert result is None, assertmsg ++ ++ ++def test_evpn_remove_ip(): ++ """ ++ Check the removal of an EVPN route is correctly handled ++ """ ++ tgen = get_topogen() ++ if tgen.routers_have_failure(): ++ pytest.skip(tgen.errors) ++ ++ config_no_ipv6 = { ++ "r2": { ++ "raw_config": [ ++ "router bgp 65000 vrf r2-vrf-101", ++ "address-family ipv6 unicast", ++ "no network fd00::3/128", ++ "no network fd00::2/128", ++ ] ++ } ++ } ++ ++ logger.info("==== Remove IPv6 network on R2") ++ result = apply_raw_config(tgen, config_no_ipv6) ++ assert result is True, "Failed to remove IPv6 network on R2, Error: {} ".format( ++ result ++ ) ++ ipv6_routes = { ++ "r1": { ++ "static_routes": [ ++ { ++ "vrf": "r1-vrf-101", ++ "network": ["fd00::2/128"], ++ } ++ ] ++ } ++ } ++ result = verify_bgp_rib(tgen, "ipv6", "r1", ipv6_routes, expected=False) ++ assert result is not True, "expect IPv6 route fd00::2/128 withdrawn" ++ ++ output = tgen.gears["r1"].vtysh_cmd("show evpn next-hops vni all", isjson=False) ++ logger.info("==== result from show evpn next-hops vni all") ++ logger.info(output) ++ output = tgen.gears["r1"].vtysh_cmd("show evpn rmac vni all", isjson=False) ++ logger.info("==== result from show evpn next-hops vni all") ++ logger.info(output) ++ ++ ++def test_router_check_evpn_contexts_again(): ++ """ ++ Check EVPN nexthops and RMAC number are correctly configured ++ """ ++ tgen = get_topogen() ++ if tgen.routers_have_failure(): ++ pytest.skip(tgen.errors) ++ ++ _test_router_check_evpn_contexts(tgen.gears["r1"]) ++ ++ ++def test_evpn_ping_again(): ++ """ ++ Check ping between R1 and R2 is ok ++ """ ++ tgen = get_topogen() ++ if tgen.routers_have_failure(): ++ pytest.skip(tgen.errors) ++ ++ _test_evpn_ping_router(tgen.gears["r1"], ipv4_only=True) ++ ++ ++def _test_wait_for_multipath_convergence(router): ++ """ ++ Wait for multipath convergence on R2 ++ """ ++ expected = { ++ "192.168.102.21/32": [ ++ {"nexthops": [{"ip": "192:168:100::21"}, {"ip": "192:168:100::21"}]} ++ ] ++ } ++ # Using router_json_cmp instead of verify_fib_routes, because we need to check for ++ # two next-hops with the same IP address. ++ test_func = partial( ++ topotest.router_json_cmp, ++ router, ++ "show ip route vrf r2-vrf-101 192.168.102.21/32 json", ++ expected, ++ ) ++ _, result = topotest.run_and_expect(test_func, None, count=20, wait=1) ++ assert ( ++ result is None ++ ), "R2 does not have two next-hops for 192.168.102.21/32 JSON output mismatches" ++ ++ ++def _test_rmac_present(router): ++ """ ++ Check that the RMAC is present on R2 ++ """ ++ output = router.vtysh_cmd("show evpn rmac vni 101", isjson=False) ++ logger.info("==== result from show evpn rmac vni 101") ++ logger.info(output) ++ ++ expected = {"numRmacs": 1} ++ test_func = partial( ++ topotest.router_json_cmp, ++ router, ++ "show evpn rmac vni 101 json", ++ expected, ++ ) ++ _, result = topotest.run_and_expect(test_func, None, count=20, wait=1) ++ assert result is None, "evpn rmac is missing on router" ++ ++ ++def test_evpn_multipath(): ++ """ ++ Configure a second path between R1 and R2, then flap it a couple times. ++ As long as the route is present, the RMAC should be present at the same time. ++ """ ++ tgen = get_topogen() ++ if tgen.routers_have_failure(): ++ pytest.skip(tgen.errors) ++ ++ evpn_multipath = { ++ "r1": { ++ "raw_config": [ ++ "interface r1-eth0", ++ "ipv6 address 192:168:99::21/96", ++ "router bgp 65000", ++ "neighbor 192:168:99::41 remote-as 65000", ++ "neighbor 192:168:99::41 capability extended-nexthop", ++ "neighbor 192:168:99::41 update-source 192:168:99::21", ++ "address-family l2vpn evpn", ++ "neighbor 192:168:99::41 activate", ++ "neighbor 192:168:99::41 route-map rmap_r1 in", ++ ] ++ }, ++ "r2": { ++ "raw_config": [ ++ "interface r2-eth0", ++ "ipv6 address 192:168:99::41/96", ++ "router bgp 65000", ++ "neighbor 192:168:99::21 remote-as 65000", ++ "neighbor 192:168:99::21 capability extended-nexthop", ++ "neighbor 192:168:99::21 update-source 192:168:99::41", ++ "address-family l2vpn evpn", ++ "neighbor 192:168:99::21 activate", ++ ] ++ }, ++ } ++ ++ logger.info("==== Configure second path between R1 and R2") ++ result = apply_raw_config(tgen, evpn_multipath) ++ assert ( ++ result is True ++ ), "Failed to configure second path between R1 and R2, Error: {} ".format(result) ++ ++ dut = tgen.gears["r2"] ++ dut_peer = tgen.gears["r1"] ++ _test_wait_for_multipath_convergence(dut) ++ _test_rmac_present(dut) ++ ++ for i in range(4): ++ peer = "192:168:100::41" if i % 2 == 0 else "192:168:99::41" ++ dut_peer.vtysh_cmd("clear bgp {0}".format(peer)) ++ _test_wait_for_multipath_convergence(dut) ++ _test_rmac_present(dut) ++ ++ ++def test_memory_leak(): ++ "Run the memory leak test and report results." ++ tgen = get_topogen() ++ if not tgen.is_memleak_enabled(): ++ pytest.skip("Memory leak test/report is disabled") ++ ++ tgen.report_memory_leaks() ++ ++ ++if __name__ == "__main__": ++ args = ["-s"] + sys.argv[1:] ++ sys.exit(pytest.main(args)) +diff --git a/zebra/zebra_evpn.c b/zebra/zebra_evpn.c +index 911f8cce5..d0ff4193d 100644 +--- a/zebra/zebra_evpn.c ++++ b/zebra/zebra_evpn.c +@@ -1108,8 +1108,7 @@ int zebra_evpn_send_add_to_client(struct zebra_evpn *zevpn) + + zclient_create_header(s, ZEBRA_VNI_ADD, zebra_vrf_get_evpn_id()); + stream_putl(s, zevpn->vni); +- /* Temporary until BGP supports IPv6 VTEPs */ +- stream_put_in_addr(s, (const struct in_addr *)&zevpn->local_vtep_ip.ipaddr_v4.s_addr); ++ stream_put_ipaddr(s, &zevpn->local_vtep_ip); + stream_put(s, &zevpn->vrf_id, sizeof(vrf_id_t)); /* tenant vrf */ + stream_put_in_addr(s, &zevpn->mcast_grp); + stream_put(s, &svi_index, sizeof(ifindex_t)); +diff --git a/zebra/zebra_vxlan.c b/zebra/zebra_vxlan.c +index 25aadd8db..b27fb5608 100644 +--- a/zebra/zebra_vxlan.c ++++ b/zebra/zebra_vxlan.c +@@ -2208,8 +2208,7 @@ static int zl3vni_send_add_to_client(struct zebra_l3vni *zl3vni) + zclient_create_header(s, ZEBRA_L3VNI_ADD, zl3vni_vrf_id(zl3vni)); + stream_putl(s, zl3vni->vni); + stream_put(s, &svi_rmac, sizeof(struct ethaddr)); +- /* Temporary until BGP accepts IPv6 VTEPs */ +- stream_put_in_addr(s, &zl3vni->local_vtep_ip.ipaddr_v4); ++ stream_put_ipaddr(s, &zl3vni->local_vtep_ip); + stream_put(s, &zl3vni->filter, sizeof(int)); + stream_putl(s, zl3vni->svi_if->ifindex); + stream_put(s, &vrr_rmac, sizeof(struct ethaddr)); +@@ -4175,10 +4174,8 @@ static int32_t zebra_vxlan_remote_macip_helper(bool add, struct stream *s, vni_t + } + l += 4 + ETH_ALEN + 4 + *ipa_len; + +- /* Temporary until BGP supports IPv6 VTEPs */ +- SET_IPADDR_V4(vtep_ip); +- STREAM_GET(&vtep_ip->ipaddr_v4, s, IPV4_MAX_BYTELEN); +- l += IPV4_MAX_BYTELEN; ++ STREAM_GET_IPADDR(s, vtep_ip); ++ l += IPADDRSZ(vtep_ip); + + if (add) { + STREAM_GETC(s, *flags); +@@ -4609,10 +4606,8 @@ void zebra_vxlan_remote_vtep_del_zapi(ZAPI_HANDLER_ARGS) + STREAM_GETL(s, vni); + l += 4; + +- /* Temporary until BGP supports IPv6 VTEPs */ +- SET_IPADDR_V4(&vtep_ip); +- STREAM_GET(&vtep_ip.ipaddr_v4.s_addr, s, IPV4_MAX_BYTELEN); +- l += IPV4_MAX_BYTELEN; ++ STREAM_GET_IPADDR(s, &vtep_ip); ++ l += 2 + IPADDRSZ(&vtep_ip); + + /* Flood control is intentionally ignored right now */ + STREAM_GETL(s, flood_control); +@@ -4816,11 +4811,11 @@ void zebra_vxlan_remote_vtep_add_zapi(ZAPI_HANDLER_ARGS) + STREAM_GETL(s, vni); + l += 4; + +- /* Temporary until BGP supports IPV6 VTEPs */ +- SET_IPADDR_V4(&vtep_ip); +- STREAM_GET(&vtep_ip.ipaddr_v4.s_addr, s, IPV4_MAX_BYTELEN); ++ STREAM_GET_IPADDR(s, &vtep_ip); ++ l += 2 + IPADDRSZ(&vtep_ip); ++ + STREAM_GETL(s, flood_control); +- l += IPV4_MAX_BYTELEN + 4; ++ l += 4; + + if (IS_ZEBRA_DEBUG_VXLAN) + zlog_debug("Recv VTEP ADD %pIA VNI %u flood %d from %s", &vtep_ip, vni, +-- +2.43.0 + diff --git a/src/sonic-frr/patch/0041-tests-Add-V6-VTEP-variant-of-bgp_evpn_vxlan_topo1.patch b/src/sonic-frr/patch/0041-tests-Add-V6-VTEP-variant-of-bgp_evpn_vxlan_topo1.patch new file mode 100644 index 00000000000..beafca243d9 --- /dev/null +++ b/src/sonic-frr/patch/0041-tests-Add-V6-VTEP-variant-of-bgp_evpn_vxlan_topo1.patch @@ -0,0 +1,687 @@ +From a9f7f4505f29639f6d4ae3b5c3e16040b491f984 Mon Sep 17 00:00:00 2001 +From: Mike RE Mallin +Date: Tue, 1 Apr 2025 16:00:25 -0400 +Subject: tests: Add V6 VTEP variant of bgp_evpn_vxlan_topo1 + +Signed-off-by: Mike Mallin +(cherry picked from commit f282072d4b56a07fab8597e83993e6fb445e206a) +Signed-off-by: Tamer Ahmed + +diff --git a/tests/topotests/bgp_evpn_vxlan_topo1/P1/bgpd_v6_vtep.conf b/tests/topotests/bgp_evpn_vxlan_topo1/P1/bgpd_v6_vtep.conf +new file mode 100644 +index 000000000..cdf4cb4fe +--- /dev/null ++++ b/tests/topotests/bgp_evpn_vxlan_topo1/P1/bgpd_v6_vtep.conf +@@ -0,0 +1 @@ ++! +diff --git a/tests/topotests/bgp_evpn_vxlan_topo1/P1/ospfd_v6_vtep.conf b/tests/topotests/bgp_evpn_vxlan_topo1/P1/ospfd_v6_vtep.conf +new file mode 100644 +index 000000000..fd96d83ff +--- /dev/null ++++ b/tests/topotests/bgp_evpn_vxlan_topo1/P1/ospfd_v6_vtep.conf +@@ -0,0 +1,16 @@ ++! ++router ospf6 ++! ++int lo ++ ipv6 ospf6 area 0 ++! ++int P1-eth0 ++ ipv6 ospf6 hello-interval 2 ++ ipv6 ospf6 dead-interval 10 ++ ipv6 ospf6 area 0 ++! ++int P1-eth1 ++ ipv6 ospf6 hello-interval 2 ++ ipv6 ospf6 dead-interval 10 ++ ipv6 ospf6 area 0 ++! +diff --git a/tests/topotests/bgp_evpn_vxlan_topo1/P1/zebra_v6_vtep.conf b/tests/topotests/bgp_evpn_vxlan_topo1/P1/zebra_v6_vtep.conf +new file mode 100644 +index 000000000..44a338cf6 +--- /dev/null ++++ b/tests/topotests/bgp_evpn_vxlan_topo1/P1/zebra_v6_vtep.conf +@@ -0,0 +1,8 @@ ++! ++interface lo ++ ip address 10.20.20.20/32 ++ ipv6 address 10:20:20::20/128 ++interface P1-eth0 ++ ipv6 address 10:20:1::2/96 ++interface P1-eth1 ++ ipv6 address 10:20:2::2/96 +diff --git a/tests/topotests/bgp_evpn_vxlan_topo1/PE1/bgpd_v6_vtep.conf b/tests/topotests/bgp_evpn_vxlan_topo1/PE1/bgpd_v6_vtep.conf +new file mode 100644 +index 000000000..5191db0e7 +--- /dev/null ++++ b/tests/topotests/bgp_evpn_vxlan_topo1/PE1/bgpd_v6_vtep.conf +@@ -0,0 +1,11 @@ ++router bgp 65000 ++ timers bgp 3 9 ++ bgp router-id 10.10.10.10 ++ no bgp default ipv4-unicast ++ neighbor 10:30:30::30 remote-as 65000 ++ neighbor 10:30:30::30 update-source lo ++ neighbor 10:30:30::30 timers 3 10 ++ address-family l2vpn evpn ++ neighbor 10:30:30::30 activate ++ advertise-all-vni ++ advertise-svi-ip +diff --git a/tests/topotests/bgp_evpn_vxlan_topo1/PE1/evpn.vni.v6_vtep.json b/tests/topotests/bgp_evpn_vxlan_topo1/PE1/evpn.vni.v6_vtep.json +new file mode 100644 +index 000000000..96ce12c18 +--- /dev/null ++++ b/tests/topotests/bgp_evpn_vxlan_topo1/PE1/evpn.vni.v6_vtep.json +@@ -0,0 +1,17 @@ ++{ ++ "vni":101, ++ "type":"L2", ++ "tenantVrf":"default", ++ "vxlanInterface":"vxlan101", ++ "vtepIp":"10:10:10::10", ++ "mcastGroup":"0.0.0.0", ++ "advertiseGatewayMacip":"No", ++ "numRemoteVteps":1, ++ "remoteVteps":[ ++ { ++ "ip":"10:30:30::30", ++ "flood":"HER" ++ } ++ ] ++} ++ +diff --git a/tests/topotests/bgp_evpn_vxlan_topo1/PE1/ospfd_v6_vtep.conf b/tests/topotests/bgp_evpn_vxlan_topo1/PE1/ospfd_v6_vtep.conf +new file mode 100644 +index 000000000..b6901954d +--- /dev/null ++++ b/tests/topotests/bgp_evpn_vxlan_topo1/PE1/ospfd_v6_vtep.conf +@@ -0,0 +1,11 @@ ++! ++router ospf6 ++! ++int lo ++ ipv6 ospf6 area 0 ++! ++int PE1-eth1 ++ ipv6 ospf6 hello-interval 2 ++ ipv6 ospf6 dead-interval 10 ++ ipv6 ospf6 area 0 ++! +diff --git a/tests/topotests/bgp_evpn_vxlan_topo1/PE1/zebra_v6_vtep.conf b/tests/topotests/bgp_evpn_vxlan_topo1/PE1/zebra_v6_vtep.conf +new file mode 100644 +index 000000000..c667613e3 +--- /dev/null ++++ b/tests/topotests/bgp_evpn_vxlan_topo1/PE1/zebra_v6_vtep.conf +@@ -0,0 +1,9 @@ ++! ++log file zebra.log ++! ++interface lo ++ ip address 10.10.10.10/32 ++ ipv6 address 10:10:10::10/128 ++interface PE1-eth1 ++ ipv6 address 10:20:1::1/96 ++! +diff --git a/tests/topotests/bgp_evpn_vxlan_topo1/PE2/bgpd_v6_vtep.conf b/tests/topotests/bgp_evpn_vxlan_topo1/PE2/bgpd_v6_vtep.conf +new file mode 100644 +index 000000000..add88d581 +--- /dev/null ++++ b/tests/topotests/bgp_evpn_vxlan_topo1/PE2/bgpd_v6_vtep.conf +@@ -0,0 +1,12 @@ ++router bgp 65000 ++ timers bgp 3 9 ++ bgp router-id 10.30.30.30 ++ no bgp default ipv4-unicast ++ neighbor 10:10:10::10 remote-as 65000 ++ neighbor 10:10:10::10 update-source lo ++ neighbor 10:10:10::10 timers 3 10 ++ ! ++ address-family l2vpn evpn ++ neighbor 10:10:10::10 activate ++ advertise-all-vni ++ advertise-svi-ip +diff --git a/tests/topotests/bgp_evpn_vxlan_topo1/PE2/evpn.vni.v6_vtep.json b/tests/topotests/bgp_evpn_vxlan_topo1/PE2/evpn.vni.v6_vtep.json +new file mode 100644 +index 000000000..b95a6cf93 +--- /dev/null ++++ b/tests/topotests/bgp_evpn_vxlan_topo1/PE2/evpn.vni.v6_vtep.json +@@ -0,0 +1,16 @@ ++{ ++ "vni":101, ++ "type":"L2", ++ "tenantVrf":"default", ++ "vxlanInterface":"vxlan101", ++ "vtepIp":"10:30:30::30", ++ "mcastGroup":"0.0.0.0", ++ "advertiseGatewayMacip":"No", ++ "numRemoteVteps":1, ++ "remoteVteps":[ ++ { ++ "ip":"10:10:10::10", ++ "flood":"HER" ++ } ++ ] ++} +diff --git a/tests/topotests/bgp_evpn_vxlan_topo1/PE2/ospfd_v6_vtep.conf b/tests/topotests/bgp_evpn_vxlan_topo1/PE2/ospfd_v6_vtep.conf +new file mode 100644 +index 000000000..3f308bfdc +--- /dev/null ++++ b/tests/topotests/bgp_evpn_vxlan_topo1/PE2/ospfd_v6_vtep.conf +@@ -0,0 +1,11 @@ ++! ++router ospf6 ++! ++int lo ++ ipv6 ospf6 area 0 ++! ++int PE2-eth0 ++ ipv6 ospf6 hello-interval 2 ++ ipv6 ospf6 dead-interval 10 ++ ipv6 ospf6 area 0 ++! +diff --git a/tests/topotests/bgp_evpn_vxlan_topo1/PE2/zebra_v6_vtep.conf b/tests/topotests/bgp_evpn_vxlan_topo1/PE2/zebra_v6_vtep.conf +new file mode 100644 +index 000000000..5eebcae0c +--- /dev/null ++++ b/tests/topotests/bgp_evpn_vxlan_topo1/PE2/zebra_v6_vtep.conf +@@ -0,0 +1,7 @@ ++! ++interface lo ++ ip address 10.30.30.30/32 ++ ipv6 address 10:30:30::30/128 ++interface PE2-eth0 ++ ipv6 address 10:20:2::3/96 ++! +diff --git a/tests/topotests/bgp_evpn_vxlan_topo1/host1/bgpd_v6_vtep.conf b/tests/topotests/bgp_evpn_vxlan_topo1/host1/bgpd_v6_vtep.conf +new file mode 100644 +index 000000000..cdf4cb4fe +--- /dev/null ++++ b/tests/topotests/bgp_evpn_vxlan_topo1/host1/bgpd_v6_vtep.conf +@@ -0,0 +1 @@ ++! +diff --git a/tests/topotests/bgp_evpn_vxlan_topo1/host1/ospfd_v6_vtep.conf b/tests/topotests/bgp_evpn_vxlan_topo1/host1/ospfd_v6_vtep.conf +new file mode 100644 +index 000000000..cdf4cb4fe +--- /dev/null ++++ b/tests/topotests/bgp_evpn_vxlan_topo1/host1/ospfd_v6_vtep.conf +@@ -0,0 +1 @@ ++! +diff --git a/tests/topotests/bgp_evpn_vxlan_topo1/host1/zebra_v6_vtep.conf b/tests/topotests/bgp_evpn_vxlan_topo1/host1/zebra_v6_vtep.conf +new file mode 100644 +index 000000000..91fae9eeb +--- /dev/null ++++ b/tests/topotests/bgp_evpn_vxlan_topo1/host1/zebra_v6_vtep.conf +@@ -0,0 +1,3 @@ ++! ++int host1-eth0 ++ ip address 10.10.1.55/24 +diff --git a/tests/topotests/bgp_evpn_vxlan_topo1/host2/bgpd_v6_vtep.conf b/tests/topotests/bgp_evpn_vxlan_topo1/host2/bgpd_v6_vtep.conf +new file mode 100644 +index 000000000..cdf4cb4fe +--- /dev/null ++++ b/tests/topotests/bgp_evpn_vxlan_topo1/host2/bgpd_v6_vtep.conf +@@ -0,0 +1 @@ ++! +diff --git a/tests/topotests/bgp_evpn_vxlan_topo1/host2/ospfd_v6_vtep.conf b/tests/topotests/bgp_evpn_vxlan_topo1/host2/ospfd_v6_vtep.conf +new file mode 100644 +index 000000000..cdf4cb4fe +--- /dev/null ++++ b/tests/topotests/bgp_evpn_vxlan_topo1/host2/ospfd_v6_vtep.conf +@@ -0,0 +1 @@ ++! +diff --git a/tests/topotests/bgp_evpn_vxlan_topo1/host2/zebra_v6_vtep.conf b/tests/topotests/bgp_evpn_vxlan_topo1/host2/zebra_v6_vtep.conf +new file mode 100644 +index 000000000..df9adeb3b +--- /dev/null ++++ b/tests/topotests/bgp_evpn_vxlan_topo1/host2/zebra_v6_vtep.conf +@@ -0,0 +1,3 @@ ++! ++interface host2-eth0 ++ ip address 10.10.1.56/24 +diff --git a/tests/topotests/bgp_evpn_vxlan_topo1/test_bgp_evpn_vxlan_v6_vtep.py b/tests/topotests/bgp_evpn_vxlan_topo1/test_bgp_evpn_vxlan_v6_vtep.py +new file mode 100755 +index 000000000..d6456bfa3 +--- /dev/null ++++ b/tests/topotests/bgp_evpn_vxlan_topo1/test_bgp_evpn_vxlan_v6_vtep.py +@@ -0,0 +1,438 @@ ++#!/usr/bin/env python ++# SPDX-License-Identifier: ISC ++ ++# ++# test_bgp_evpn_vxlan.py ++# Part of NetDEF Topology Tests ++# ++# Copyright (c) 2020 by Volta Networks ++# Copyright (c) 2025 by cisco Systems Inc. (V6 VTEP Extensions) ++# ++ ++""" ++test_bgp_evpn_vxlan_v6_vtep.py: Test VXLAN EVPN MAC a route signalling ++over BGP with V6 VTEPs. ++""" ++ ++import os ++import sys ++import json ++from functools import partial ++from time import sleep ++import pytest ++ ++# Save the Current Working Directory to find configuration files. ++CWD = os.path.dirname(os.path.realpath(__file__)) ++sys.path.append(os.path.join(CWD, "../")) ++ ++# pylint: disable=C0413 ++# Import topogen and topotest helpers ++from lib import topotest ++from lib.topogen import Topogen, TopoRouter, get_topogen ++from lib.topolog import logger ++ ++# Required to instantiate the topology builder class. ++ ++pytestmark = [pytest.mark.bgpd, pytest.mark.ospfd] ++ ++ ++def build_topo(tgen): ++ "Build function" ++ ++ # This function only purpose is to define allocation and relationship ++ # between routers, switches and hosts. ++ # ++ # ++ # Create routers ++ tgen.add_router("P1") ++ tgen.add_router("PE1") ++ tgen.add_router("PE2") ++ tgen.add_router("host1") ++ tgen.add_router("host2") ++ ++ # Host1-PE1 ++ switch = tgen.add_switch("s1") ++ switch.add_link(tgen.gears["host1"]) ++ switch.add_link(tgen.gears["PE1"]) ++ ++ # PE1-P1 ++ switch = tgen.add_switch("s2") ++ switch.add_link(tgen.gears["PE1"]) ++ switch.add_link(tgen.gears["P1"]) ++ ++ # P1-PE2 ++ switch = tgen.add_switch("s3") ++ switch.add_link(tgen.gears["P1"]) ++ switch.add_link(tgen.gears["PE2"]) ++ ++ # PE2-host2 ++ switch = tgen.add_switch("s4") ++ switch.add_link(tgen.gears["PE2"]) ++ switch.add_link(tgen.gears["host2"]) ++ ++ ++def setup_module(mod): ++ "Sets up the pytest environment" ++ # This function initiates the topology build with Topogen... ++ tgen = Topogen(build_topo, mod.__name__) ++ # ... and here it calls Mininet initialization functions. ++ tgen.start_topology() ++ ++ pe1 = tgen.gears["PE1"] ++ pe2 = tgen.gears["PE2"] ++ p1 = tgen.gears["P1"] ++ ++ # set up PE bridges with the EVPN member interfaces facing the CE hosts ++ pe1.run("ip link add name br101 type bridge stp_state 0") ++ pe1.run("ip addr add 10.10.1.1/24 dev br101") ++ pe1.run("ip link set dev br101 up") ++ pe1.run( ++ "ip link add vxlan101 type vxlan id 101 dstport 4789 local 10:10:10::10 nolearning" ++ ) ++ pe1.run("ip link set dev vxlan101 master br101") ++ pe1.run("ip link set up dev vxlan101") ++ pe1.run("ip link set dev PE1-eth0 master br101") ++ ++ pe2.run("ip link add name br101 type bridge stp_state 0") ++ pe2.run("ip addr add 10.10.1.3/24 dev br101") ++ pe2.run("ip link set dev br101 up") ++ pe2.run( ++ "ip link add vxlan101 type vxlan id 101 dstport 4789 local 10:30:30::30 nolearning" ++ ) ++ pe2.run("ip link set dev vxlan101 master br101") ++ pe2.run("ip link set up dev vxlan101") ++ pe2.run("ip link set dev PE2-eth1 master br101") ++ p1.run("sysctl -w net.ipv4.ip_forward=1") ++ ++ # This is a sample of configuration loading. ++ router_list = tgen.routers() ++ ++ # For all registered routers, load the zebra configuration file ++ for rname, router in router_list.items(): ++ router.load_config( ++ TopoRouter.RD_ZEBRA, os.path.join(CWD, "{}/zebra_v6_vtep.conf".format(rname)) ++ ) ++ router.load_config( ++ TopoRouter.RD_OSPF6, os.path.join(CWD, "{}/ospfd_v6_vtep.conf".format(rname)) ++ ) ++ router.load_config( ++ TopoRouter.RD_BGP, os.path.join(CWD, "{}/bgpd_v6_vtep.conf".format(rname)) ++ ) ++ ++ # After loading the configurations, this function loads configured daemons. ++ tgen.start_router() ++ ++ ++def teardown_module(mod): ++ "Teardown the pytest environment" ++ tgen = get_topogen() ++ ++ # This function tears down the whole topology. ++ tgen.stop_topology() ++ ++ ++def show_vni_json_elide_ifindex(pe, vni, expected): ++ output_json = pe.vtysh_cmd("show evpn vni {} json".format(vni), isjson=True) ++ if "ifindex" in output_json: ++ output_json.pop("ifindex") ++ ++ return topotest.json_cmp(output_json, expected) ++ ++ ++def check_vni_macs_present(tgen, router, vni, maclist): ++ result = router.vtysh_cmd("show evpn mac vni {} json".format(vni), isjson=True) ++ for rname, ifname in maclist: ++ m = tgen.net.macs[(rname, ifname)] ++ if m not in result["macs"]: ++ return "MAC ({}) for interface {} on {} missing on {} from {}".format( ++ m, ifname, rname, router.name, json.dumps(result, indent=4) ++ ) ++ return None ++ ++ ++def test_pe1_converge_evpn(): ++ "Wait for protocol convergence" ++ ++ tgen = get_topogen() ++ # Don't run this test if we have any failure. ++ if tgen.routers_have_failure(): ++ pytest.skip(tgen.errors) ++ ++ pe1 = tgen.gears["PE1"] ++ json_file = "{}/{}/evpn.vni.v6_vtep.json".format(CWD, pe1.name) ++ expected = json.loads(open(json_file).read()) ++ ++ test_func = partial(show_vni_json_elide_ifindex, pe1, 101, expected) ++ _, result = topotest.run_and_expect(test_func, None, count=45, wait=1) ++ assertmsg = '"{}" JSON output mismatches'.format(pe1.name) ++ ++ # Let's ensure that the hosts have actually tried talking to ++ # each other. Otherwise under certain startup conditions ++ # they may not actually do any l2 arp'ing and as such ++ # the bridges won't know about the hosts on their networks ++ host1 = tgen.gears["host1"] ++ host1.run("ping -c 1 10.10.1.56") ++ host2 = tgen.gears["host2"] ++ host2.run("ping -c 1 10.10.1.55") ++ ++ test_func = partial( ++ check_vni_macs_present, ++ tgen, ++ pe1, ++ 101, ++ (("host1", "host1-eth0"), ("host2", "host2-eth0")), ++ ) ++ ++ _, result = topotest.run_and_expect(test_func, None, count=30, wait=1) ++ if result: ++ logger.warning("%s", result) ++ assert None, '"{}" missing expected MACs'.format(pe1.name) ++ ++ ++def test_pe2_converge_evpn(): ++ "Wait for protocol convergence" ++ ++ tgen = get_topogen() ++ # Don't run this test if we have any failure. ++ if tgen.routers_have_failure(): ++ pytest.skip(tgen.errors) ++ ++ pe2 = tgen.gears["PE2"] ++ json_file = "{}/{}/evpn.vni.v6_vtep.json".format(CWD, pe2.name) ++ expected = json.loads(open(json_file).read()) ++ ++ test_func = partial(show_vni_json_elide_ifindex, pe2, 101, expected) ++ _, result = topotest.run_and_expect(test_func, None, count=45, wait=1) ++ assertmsg = '"{}" JSON output mismatches'.format(pe2.name) ++ assert result is None, assertmsg ++ ++ test_func = partial( ++ check_vni_macs_present, ++ tgen, ++ pe2, ++ 101, ++ (("host1", "host1-eth0"), ("host2", "host2-eth0")), ++ ) ++ _, result = topotest.run_and_expect(test_func, None, count=30, wait=1) ++ if result: ++ logger.warning("%s", result) ++ assert None, '"{}" missing expected MACs'.format(pe2.name) ++ ++ ++def mac_learn_test(host, local): ++ "check the host MAC gets learned by the VNI" ++ ++ host_output = host.vtysh_cmd("show interface {}-eth0".format(host.name)) ++ int_lines = host_output.splitlines() ++ for line in int_lines: ++ line_items = line.split(": ") ++ if "HWaddr" in line_items[0]: ++ mac = line_items[1] ++ break ++ ++ mac_output = local.vtysh_cmd("show evpn mac vni 101 mac {} json".format(mac)) ++ mac_output_json = json.loads(mac_output) ++ assertmsg = "Local MAC output does not match interface mac {}".format(mac) ++ assert mac_output_json[mac]["type"] == "local", assertmsg ++ ++ ++def mac_test_local_remote(local, remote): ++ "test MAC transfer between local and remote" ++ ++ local_output = local.vtysh_cmd("show evpn mac vni all json") ++ remote_output = remote.vtysh_cmd("show evpn mac vni all json") ++ local_output_vni = local.vtysh_cmd("show evpn vni detail json") ++ local_output_json = json.loads(local_output) ++ remote_output_json = json.loads(remote_output) ++ local_output_vni_json = json.loads(local_output_vni) ++ ++ for vni in local_output_json: ++ mac_list = local_output_json[vni]["macs"] ++ for mac in mac_list: ++ if mac_list[mac]["type"] == "local" and mac_list[mac]["intf"] != "br101": ++ assertmsg = "JSON output mismatches local: {} remote: {}".format( ++ local_output_vni_json[0]["vtepIp"], ++ remote_output_json[vni]["macs"][mac]["remoteVtep"], ++ ) ++ assert ( ++ remote_output_json[vni]["macs"][mac]["remoteVtep"] ++ == local_output_vni_json[0]["vtepIp"] ++ ), assertmsg ++ ++ ++def test_learning_pe1(): ++ "test MAC learning on PE1" ++ ++ tgen = get_topogen() ++ # Don't run this test if we have any failure. ++ if tgen.routers_have_failure(): ++ pytest.skip(tgen.errors) ++ ++ host1 = tgen.gears["host1"] ++ pe1 = tgen.gears["PE1"] ++ mac_learn_test(host1, pe1) ++ ++ ++def test_learning_pe2(): ++ "test MAC learning on PE2" ++ ++ tgen = get_topogen() ++ # Don't run this test if we have any failure. ++ if tgen.routers_have_failure(): ++ pytest.skip(tgen.errors) ++ ++ host2 = tgen.gears["host2"] ++ pe2 = tgen.gears["PE2"] ++ mac_learn_test(host2, pe2) ++ ++ ++def test_local_remote_mac_pe1(): ++ "Test MAC transfer PE1 local and PE2 remote" ++ ++ tgen = get_topogen() ++ # Don't run this test if we have any failure. ++ if tgen.routers_have_failure(): ++ pytest.skip(tgen.errors) ++ ++ pe1 = tgen.gears["PE1"] ++ pe2 = tgen.gears["PE2"] ++ mac_test_local_remote(pe1, pe2) ++ ++ ++def test_local_remote_mac_pe2(): ++ "Test MAC transfer PE2 local and PE1 remote" ++ ++ tgen = get_topogen() ++ # Don't run this test if we have any failure. ++ if tgen.routers_have_failure(): ++ pytest.skip(tgen.errors) ++ ++ pe1 = tgen.gears["PE1"] ++ pe2 = tgen.gears["PE2"] ++ mac_test_local_remote(pe2, pe1) ++ ++ # Memory leak test template ++ ++ ++def ip_learn_test(tgen, host, local, remote, ip_addr): ++ "check the host IP gets learned by the VNI" ++ host_output = host.vtysh_cmd("show interface {}-eth0".format(host.name)) ++ int_lines = host_output.splitlines() ++ for line in int_lines: ++ line_items = line.split(": ") ++ if "HWaddr" in line_items[0]: ++ mac = line_items[1] ++ break ++ print(host_output) ++ ++ # check we have a local association between the MAC and IP ++ local_output = local.vtysh_cmd("show evpn mac vni 101 mac {} json".format(mac)) ++ print(local_output) ++ local_output_json = json.loads(local_output) ++ mac_type = local_output_json[mac]["type"] ++ assertmsg = "Failed to learn local IP address on host {}".format(host.name) ++ assert local_output_json[mac]["neighbors"] != "none", assertmsg ++ learned_ip = local_output_json[mac]["neighbors"]["active"][0] ++ ++ assertmsg = "local learned mac wrong type: {} ".format(mac_type) ++ assert mac_type == "local", assertmsg ++ ++ assertmsg = ( ++ "learned address mismatch with configured address host: {} learned: {}".format( ++ ip_addr, learned_ip ++ ) ++ ) ++ assert ip_addr == learned_ip, assertmsg ++ ++ # now lets check the remote ++ count = 0 ++ converged = False ++ while count < 30: ++ remote_output = remote.vtysh_cmd( ++ "show evpn mac vni 101 mac {} json".format(mac) ++ ) ++ print(remote_output) ++ remote_output_json = json.loads(remote_output) ++ type = remote_output_json[mac]["type"] ++ if not remote_output_json[mac]["neighbors"] == "none": ++ # due to a kernel quirk, learned IPs can be inactive ++ if ( ++ remote_output_json[mac]["neighbors"]["active"] ++ or remote_output_json[mac]["neighbors"]["inactive"] ++ ): ++ converged = True ++ break ++ count += 1 ++ sleep(1) ++ ++ print("tries: {}".format(count)) ++ assertmsg = "{} remote learned mac no address: {} ".format(host.name, mac) ++ # some debug for this failure ++ if not converged == True: ++ log_output = remote.run("cat zebra.log") ++ print(log_output) ++ ++ assert converged == True, assertmsg ++ if remote_output_json[mac]["neighbors"]["active"]: ++ learned_ip = remote_output_json[mac]["neighbors"]["active"][0] ++ else: ++ learned_ip = remote_output_json[mac]["neighbors"]["inactive"][0] ++ assertmsg = "remote learned mac wrong type: {} ".format(type) ++ assert type == "remote", assertmsg ++ ++ assertmsg = "remote learned address mismatch with configured address host: {} learned: {}".format( ++ ip_addr, learned_ip ++ ) ++ assert ip_addr == learned_ip, assertmsg ++ ++ ++def test_ip_pe1_learn(): ++ "run the IP learn test for PE1" ++ ++ tgen = get_topogen() ++ # Don't run this test if we have any failure. ++ if tgen.routers_have_failure(): ++ pytest.skip(tgen.errors) ++ ++ host1 = tgen.gears["host1"] ++ pe1 = tgen.gears["PE1"] ++ pe2 = tgen.gears["PE2"] ++ # pe2.vtysh_cmd("debug zebra vxlan") ++ # pe2.vtysh_cmd("debug zebra kernel") ++ # lets populate that arp cache ++ host1.run("ping -c1 10.10.1.1") ++ ip_learn_test(tgen, host1, pe1, pe2, "10.10.1.55") ++ # tgen.mininet_cli() ++ ++ ++def test_ip_pe2_learn(): ++ "run the IP learn test for PE2" ++ ++ tgen = get_topogen() ++ # Don't run this test if we have any failure. ++ if tgen.routers_have_failure(): ++ pytest.skip(tgen.errors) ++ ++ host2 = tgen.gears["host2"] ++ pe1 = tgen.gears["PE1"] ++ pe2 = tgen.gears["PE2"] ++ # pe1.vtysh_cmd("debug zebra vxlan") ++ # pe1.vtysh_cmd("debug zebra kernel") ++ # lets populate that arp cache ++ host2.run("ping -c1 10.10.1.3") ++ ip_learn_test(tgen, host2, pe2, pe1, "10.10.1.56") ++ # tgen.mininet_cli() ++ ++ ++def test_memory_leak(): ++ "Run the memory leak test and report results." ++ tgen = get_topogen() ++ if not tgen.is_memleak_enabled(): ++ pytest.skip("Memory leak test/report is disabled") ++ ++ tgen.report_memory_leaks() ++ ++ ++if __name__ == "__main__": ++ args = ["-s"] + sys.argv[1:] ++ sys.exit(pytest.main(args)) +-- +2.43.0 + diff --git a/src/sonic-frr/patch/0042-tests-Add-V6-VTEP-variant-for-bgp_evpn_vxlan_macvrf_.patch b/src/sonic-frr/patch/0042-tests-Add-V6-VTEP-variant-for-bgp_evpn_vxlan_macvrf_.patch new file mode 100644 index 00000000000..715fcb3013c --- /dev/null +++ b/src/sonic-frr/patch/0042-tests-Add-V6-VTEP-variant-for-bgp_evpn_vxlan_macvrf_.patch @@ -0,0 +1,1102 @@ +From 8bf7bb1914036c88a00c3a320e42249f4c41e69b Mon Sep 17 00:00:00 2001 +From: Mike RE Mallin +Date: Wed, 9 Apr 2025 11:47:58 -0400 +Subject: tests: Add V6 VTEP variant for bgp_evpn_vxlan_macvrf_soo_topo1 + +Signed-off-by: Mike Mallin +(cherry picked from commit d87761fe07876de9befc0f67c34e7991bf2efccc) +Signed-off-by: Tamer Ahmed + +diff --git a/tests/topotests/bgp_evpn_vxlan_macvrf_soo_topo1/P1/bgpd_v6_vtep.conf b/tests/topotests/bgp_evpn_vxlan_macvrf_soo_topo1/P1/bgpd_v6_vtep.conf +new file mode 100644 +index 000000000..cdf4cb4fe +--- /dev/null ++++ b/tests/topotests/bgp_evpn_vxlan_macvrf_soo_topo1/P1/bgpd_v6_vtep.conf +@@ -0,0 +1 @@ ++! +diff --git a/tests/topotests/bgp_evpn_vxlan_macvrf_soo_topo1/P1/ospfd6.conf b/tests/topotests/bgp_evpn_vxlan_macvrf_soo_topo1/P1/ospfd6.conf +new file mode 100644 +index 000000000..70b919c32 +--- /dev/null ++++ b/tests/topotests/bgp_evpn_vxlan_macvrf_soo_topo1/P1/ospfd6.conf +@@ -0,0 +1,16 @@ ++! ++router ospf6 ++! ++int l0 ++ ipv6 ospf6 area 0 ++! ++int P1-eth0 ++ ipv6 ospf6 hello-interval 2 ++ ipv6 ospf6 dead-interval 10 ++ ipv6 ospf6 area 0 ++! ++int P1-eth1 ++ ipv6 ospf6 hello-interval 2 ++ ipv6 ospf6 dead-interval 10 ++ ipv6 ospf6 area 0 ++! +diff --git a/tests/topotests/bgp_evpn_vxlan_macvrf_soo_topo1/P1/zebra_v6_vtep.conf b/tests/topotests/bgp_evpn_vxlan_macvrf_soo_topo1/P1/zebra_v6_vtep.conf +new file mode 100644 +index 000000000..44a338cf6 +--- /dev/null ++++ b/tests/topotests/bgp_evpn_vxlan_macvrf_soo_topo1/P1/zebra_v6_vtep.conf +@@ -0,0 +1,8 @@ ++! ++interface lo ++ ip address 10.20.20.20/32 ++ ipv6 address 10:20:20::20/128 ++interface P1-eth0 ++ ipv6 address 10:20:1::2/96 ++interface P1-eth1 ++ ipv6 address 10:20:2::2/96 +diff --git a/tests/topotests/bgp_evpn_vxlan_macvrf_soo_topo1/PE1/bgpd_v6_vtep.conf b/tests/topotests/bgp_evpn_vxlan_macvrf_soo_topo1/PE1/bgpd_v6_vtep.conf +new file mode 100644 +index 000000000..bef2a03e5 +--- /dev/null ++++ b/tests/topotests/bgp_evpn_vxlan_macvrf_soo_topo1/PE1/bgpd_v6_vtep.conf +@@ -0,0 +1,18 @@ ++router bgp 65000 ++ timers bgp 3 9 ++ bgp router-id 10.10.10.10 ++ no bgp default ipv4-unicast ++ neighbor 10:30:30::30 remote-as 65000 ++ neighbor 10:30:30::30 update-source lo ++ neighbor 10:30:30::30 timers 3 10 ++ ! ++ address-family l2vpn evpn ++ neighbor 10:30:30::30 activate ++ advertise-all-vni ++ advertise-svi-ip ++ vni 101 ++ rd 10.10.10.10:101 ++ route-target import 65000:101 ++ route-target export 65000:101 ++ exit-vni ++ advertise-svi-ip +diff --git a/tests/topotests/bgp_evpn_vxlan_macvrf_soo_topo1/PE1/evpn.vni.v6_vtep.json b/tests/topotests/bgp_evpn_vxlan_macvrf_soo_topo1/PE1/evpn.vni.v6_vtep.json +new file mode 100644 +index 000000000..98e5db3f3 +--- /dev/null ++++ b/tests/topotests/bgp_evpn_vxlan_macvrf_soo_topo1/PE1/evpn.vni.v6_vtep.json +@@ -0,0 +1,17 @@ ++{ ++ "vni":101, ++ "type":"L2", ++ "tenantVrf":"VRF-A", ++ "vxlanInterface":"vxlan101", ++ "vtepIp":"10:10:10::10", ++ "mcastGroup":"0.0.0.0", ++ "advertiseGatewayMacip":"No", ++ "numRemoteVteps":1, ++ "remoteVteps":[ ++ { ++ "ip":"10:30:30::30", ++ "flood":"HER" ++ } ++ ] ++} ++ +diff --git a/tests/topotests/bgp_evpn_vxlan_macvrf_soo_topo1/PE1/ospfd6.conf b/tests/topotests/bgp_evpn_vxlan_macvrf_soo_topo1/PE1/ospfd6.conf +new file mode 100644 +index 000000000..b6901954d +--- /dev/null ++++ b/tests/topotests/bgp_evpn_vxlan_macvrf_soo_topo1/PE1/ospfd6.conf +@@ -0,0 +1,11 @@ ++! ++router ospf6 ++! ++int lo ++ ipv6 ospf6 area 0 ++! ++int PE1-eth1 ++ ipv6 ospf6 hello-interval 2 ++ ipv6 ospf6 dead-interval 10 ++ ipv6 ospf6 area 0 ++! +diff --git a/tests/topotests/bgp_evpn_vxlan_macvrf_soo_topo1/PE1/zebra_v6_vtep.conf b/tests/topotests/bgp_evpn_vxlan_macvrf_soo_topo1/PE1/zebra_v6_vtep.conf +new file mode 100644 +index 000000000..c667613e3 +--- /dev/null ++++ b/tests/topotests/bgp_evpn_vxlan_macvrf_soo_topo1/PE1/zebra_v6_vtep.conf +@@ -0,0 +1,9 @@ ++! ++log file zebra.log ++! ++interface lo ++ ip address 10.10.10.10/32 ++ ipv6 address 10:10:10::10/128 ++interface PE1-eth1 ++ ipv6 address 10:20:1::1/96 ++! +diff --git a/tests/topotests/bgp_evpn_vxlan_macvrf_soo_topo1/PE2/bgpd_v6_vtep.conf b/tests/topotests/bgp_evpn_vxlan_macvrf_soo_topo1/PE2/bgpd_v6_vtep.conf +new file mode 100644 +index 000000000..c5e74e3ca +--- /dev/null ++++ b/tests/topotests/bgp_evpn_vxlan_macvrf_soo_topo1/PE2/bgpd_v6_vtep.conf +@@ -0,0 +1,18 @@ ++router bgp 65000 ++ timers bgp 3 9 ++ bgp router-id 10.30.30.30 ++ no bgp default ipv4-unicast ++ neighbor 10:10:10::10 remote-as 65000 ++ neighbor 10:10:10::10 update-source lo ++ neighbor 10:10:10::10 timers 3 10 ++ ! ++ address-family l2vpn evpn ++ neighbor 10:10:10::10 activate ++ advertise-all-vni ++ advertise-svi-ip ++ vni 101 ++ rd 10.30.30.30:101 ++ route-target import 65000:101 ++ route-target export 65000:101 ++ exit-vni ++ advertise-svi-ip +diff --git a/tests/topotests/bgp_evpn_vxlan_macvrf_soo_topo1/PE2/evpn.vni.v6_vtep.json b/tests/topotests/bgp_evpn_vxlan_macvrf_soo_topo1/PE2/evpn.vni.v6_vtep.json +new file mode 100644 +index 000000000..f4b4f2522 +--- /dev/null ++++ b/tests/topotests/bgp_evpn_vxlan_macvrf_soo_topo1/PE2/evpn.vni.v6_vtep.json +@@ -0,0 +1,16 @@ ++{ ++ "vni":101, ++ "type":"L2", ++ "tenantVrf":"VRF-A", ++ "vxlanInterface":"vxlan101", ++ "vtepIp":"10:30:30::30", ++ "mcastGroup":"0.0.0.0", ++ "advertiseGatewayMacip":"No", ++ "numRemoteVteps":1, ++ "remoteVteps":[ ++ { ++ "ip":"10:10:10::10", ++ "flood":"HER" ++ } ++ ] ++} +diff --git a/tests/topotests/bgp_evpn_vxlan_macvrf_soo_topo1/PE2/ospfd6.conf b/tests/topotests/bgp_evpn_vxlan_macvrf_soo_topo1/PE2/ospfd6.conf +new file mode 100644 +index 000000000..3f308bfdc +--- /dev/null ++++ b/tests/topotests/bgp_evpn_vxlan_macvrf_soo_topo1/PE2/ospfd6.conf +@@ -0,0 +1,11 @@ ++! ++router ospf6 ++! ++int lo ++ ipv6 ospf6 area 0 ++! ++int PE2-eth0 ++ ipv6 ospf6 hello-interval 2 ++ ipv6 ospf6 dead-interval 10 ++ ipv6 ospf6 area 0 ++! +diff --git a/tests/topotests/bgp_evpn_vxlan_macvrf_soo_topo1/PE2/zebra_v6_vtep.conf b/tests/topotests/bgp_evpn_vxlan_macvrf_soo_topo1/PE2/zebra_v6_vtep.conf +new file mode 100644 +index 000000000..5eebcae0c +--- /dev/null ++++ b/tests/topotests/bgp_evpn_vxlan_macvrf_soo_topo1/PE2/zebra_v6_vtep.conf +@@ -0,0 +1,7 @@ ++! ++interface lo ++ ip address 10.30.30.30/32 ++ ipv6 address 10:30:30::30/128 ++interface PE2-eth0 ++ ipv6 address 10:20:2::3/96 ++! +diff --git a/tests/topotests/bgp_evpn_vxlan_macvrf_soo_topo1/host1/bgpd_v6_vtep.conf b/tests/topotests/bgp_evpn_vxlan_macvrf_soo_topo1/host1/bgpd_v6_vtep.conf +new file mode 100644 +index 000000000..cdf4cb4fe +--- /dev/null ++++ b/tests/topotests/bgp_evpn_vxlan_macvrf_soo_topo1/host1/bgpd_v6_vtep.conf +@@ -0,0 +1 @@ ++! +diff --git a/tests/topotests/bgp_evpn_vxlan_macvrf_soo_topo1/host1/ospfd6.conf b/tests/topotests/bgp_evpn_vxlan_macvrf_soo_topo1/host1/ospfd6.conf +new file mode 100644 +index 000000000..cdf4cb4fe +--- /dev/null ++++ b/tests/topotests/bgp_evpn_vxlan_macvrf_soo_topo1/host1/ospfd6.conf +@@ -0,0 +1 @@ ++! +diff --git a/tests/topotests/bgp_evpn_vxlan_macvrf_soo_topo1/host1/zebra_v6_vtep.conf b/tests/topotests/bgp_evpn_vxlan_macvrf_soo_topo1/host1/zebra_v6_vtep.conf +new file mode 100644 +index 000000000..91fae9eeb +--- /dev/null ++++ b/tests/topotests/bgp_evpn_vxlan_macvrf_soo_topo1/host1/zebra_v6_vtep.conf +@@ -0,0 +1,3 @@ ++! ++int host1-eth0 ++ ip address 10.10.1.55/24 +diff --git a/tests/topotests/bgp_evpn_vxlan_macvrf_soo_topo1/host2/bgpd_v6_vtep.conf b/tests/topotests/bgp_evpn_vxlan_macvrf_soo_topo1/host2/bgpd_v6_vtep.conf +new file mode 100644 +index 000000000..cdf4cb4fe +--- /dev/null ++++ b/tests/topotests/bgp_evpn_vxlan_macvrf_soo_topo1/host2/bgpd_v6_vtep.conf +@@ -0,0 +1 @@ ++! +diff --git a/tests/topotests/bgp_evpn_vxlan_macvrf_soo_topo1/host2/ospfd6.conf b/tests/topotests/bgp_evpn_vxlan_macvrf_soo_topo1/host2/ospfd6.conf +new file mode 100644 +index 000000000..cdf4cb4fe +--- /dev/null ++++ b/tests/topotests/bgp_evpn_vxlan_macvrf_soo_topo1/host2/ospfd6.conf +@@ -0,0 +1 @@ ++! +diff --git a/tests/topotests/bgp_evpn_vxlan_macvrf_soo_topo1/host2/zebra_v6_vtep.conf b/tests/topotests/bgp_evpn_vxlan_macvrf_soo_topo1/host2/zebra_v6_vtep.conf +new file mode 100644 +index 000000000..df9adeb3b +--- /dev/null ++++ b/tests/topotests/bgp_evpn_vxlan_macvrf_soo_topo1/host2/zebra_v6_vtep.conf +@@ -0,0 +1,3 @@ ++! ++interface host2-eth0 ++ ip address 10.10.1.56/24 +diff --git a/tests/topotests/bgp_evpn_vxlan_macvrf_soo_topo1/test_bgp_evpn_vxlan_macvrf_soo_v6_vtep.py b/tests/topotests/bgp_evpn_vxlan_macvrf_soo_topo1/test_bgp_evpn_vxlan_macvrf_soo_v6_vtep.py +new file mode 100755 +index 000000000..881cb4ac3 +--- /dev/null ++++ b/tests/topotests/bgp_evpn_vxlan_macvrf_soo_topo1/test_bgp_evpn_vxlan_macvrf_soo_v6_vtep.py +@@ -0,0 +1,840 @@ ++#!/usr/bin/env python ++# SPDX-License-Identifier: GPL-2.0-or-later ++# ++# test_bgp_evpn_vxlan_macvrf_soo.py ++# ++# May 10 2023, Trey Aspelund ++# ++# Copyright (C) 2023 NVIDIA Corporation ++# ++# Test MAC-VRF Site-of-Origin feature. ++# Ensure: ++# - routes received with SoO are installed w/o "mac-vrf soo" config ++# - invalid "mac-vrf soo" config is rejected ++# - valid "mac-vrf soo" config is applied to local VNIs ++# - valid "mac-vrf soo" is set for locally originated type-2/3 routes ++# - routes received with SoO are unimported/uninstalled from L2VNI/zebra ++# - routes received with SoO are unimported/uninstalled from L3VNI/RIB ++# - routes received with SoO are still present in global EVPN loc-rib ++# ++ ++import os ++import sys ++import json ++from functools import partial ++from time import sleep ++import pytest ++ ++# Save the Current Working Directory to find configuration files. ++CWD = os.path.dirname(os.path.realpath(__file__)) ++sys.path.append(os.path.join(CWD, "../")) ++ ++# pylint: disable=C0413 ++# Import topogen and topotest helpers ++from lib import topotest ++from lib.topogen import Topogen, TopoRouter, get_topogen ++from lib.topolog import logger ++from lib.common_config import step ++ ++pytestmark = [pytest.mark.bgpd, pytest.mark.ospfd] ++ ++ ++def build_topo(tgen): ++ "Build function" ++ ++ # Create routers ++ tgen.add_router("P1") ++ tgen.add_router("PE1") ++ tgen.add_router("PE2") ++ tgen.add_router("host1") ++ tgen.add_router("host2") ++ ++ # Host1-PE1 ++ switch = tgen.add_switch("s1") ++ switch.add_link(tgen.gears["host1"]) ++ switch.add_link(tgen.gears["PE1"]) ++ ++ # PE1-P1 ++ switch = tgen.add_switch("s2") ++ switch.add_link(tgen.gears["PE1"]) ++ switch.add_link(tgen.gears["P1"]) ++ ++ # P1-PE2 ++ switch = tgen.add_switch("s3") ++ switch.add_link(tgen.gears["P1"]) ++ switch.add_link(tgen.gears["PE2"]) ++ ++ # PE2-host2 ++ switch = tgen.add_switch("s4") ++ switch.add_link(tgen.gears["PE2"]) ++ switch.add_link(tgen.gears["host2"]) ++ ++ ++def setup_module(mod): ++ "Sets up the pytest environment" ++ tgen = Topogen(build_topo, mod.__name__) ++ tgen.start_topology() ++ ++ pe1 = tgen.gears["PE1"] ++ pe2 = tgen.gears["PE2"] ++ p1 = tgen.gears["P1"] ++ host1 = tgen.gears["host1"] ++ host2 = tgen.gears["host2"] ++ ++ # Setup PEs with: ++ # - vrf: VRF-A ++ # - l3vni 404: vxlan404 / br404 ++ # - l2vni 101: vxlan101 / br101 ++ ++ ## Setup VRF ++ # pe1 ++ pe1.run("ip link add VRF-A type vrf table 4000") ++ pe1.run("ip link set VRF-A up") ++ # pe2 ++ pe2.run("ip link add VRF-A type vrf table 4000") ++ pe2.run("ip link set VRF-A up") ++ ++ ## Setup L3VNI bridge/vxlan ++ # pe1 ++ pe1.run("ip link add name br404 type bridge stp_state 0") ++ pe1.run("ip link set dev br404 addr aa:bb:cc:00:11:ff") ++ pe1.run("ip link set dev br404 master VRF-A addrgenmode none") ++ pe1.run("ip link set dev br404 up") ++ pe1.run( ++ "ip link add vxlan404 type vxlan id 404 dstport 4789 local 10:10:10::10 nolearning" ++ ) ++ pe1.run("ip link set dev vxlan404 master br404 addrgenmode none") ++ pe1.run("ip link set dev vxlan404 type bridge_slave neigh_suppress on learning off") ++ pe1.run("ip link set dev vxlan404 up") ++ # pe2 ++ pe2.run("ip link add name br404 type bridge stp_state 0") ++ pe2.run("ip link set dev br404 addr aa:bb:cc:00:22:ff") ++ pe2.run("ip link set dev br404 master VRF-A addrgenmode none") ++ pe2.run("ip link set dev br404 up") ++ pe2.run( ++ "ip link add vxlan404 type vxlan id 404 dstport 4789 local 10:30:30::30 nolearning" ++ ) ++ pe2.run("ip link set dev vxlan404 master br404 addrgenmode none") ++ pe2.run("ip link set dev vxlan404 type bridge_slave neigh_suppress on learning off") ++ pe2.run("ip link set dev vxlan404 up") ++ ++ ## Setup L2VNI bridge/vxlan + L2 PE/CE link ++ # pe1 ++ pe1.run("ip link add name br101 type bridge stp_state 0") ++ pe1.run("ip addr add 10.10.1.1/24 dev br101") ++ pe1.run("ip link set dev br101 addr aa:bb:cc:00:11:aa") ++ pe1.run("ip link set dev br101 master VRF-A") ++ pe1.run("ip link set dev br101 up") ++ pe1.run( ++ "ip link add vxlan101 type vxlan id 101 dstport 4789 local 10:10:10::10 nolearning" ++ ) ++ pe1.run("ip link set dev vxlan101 master br101") ++ pe1.run("ip link set dev vxlan101 type bridge_slave neigh_suppress on learning off") ++ pe1.run("ip link set dev vxlan101 up") ++ pe1.run("ip link set dev PE1-eth0 master br101") ++ pe1.run("ip link set dev PE1-eth0 up") ++ # pe2 ++ pe2.run("ip link add name br101 type bridge stp_state 0") ++ pe2.run("ip addr add 10.10.1.3/24 dev br101") ++ pe2.run("ip link set dev br101 addr aa:bb:cc:00:22:ff") ++ pe2.run("ip link set dev br101 master VRF-A") ++ pe2.run("ip link set dev br101 up") ++ pe2.run( ++ "ip link add vxlan101 type vxlan id 101 dstport 4789 local 10:30:30::30 nolearning" ++ ) ++ pe2.run("ip link set dev vxlan101 master br101") ++ pe2.run("ip link set dev vxlan101 type bridge_slave neigh_suppress on learning off") ++ pe2.run("ip link set dev vxlan101 up") ++ pe2.run("ip link set dev PE2-eth1 master br101") ++ pe2.run("ip link set dev PE2-eth1 up") ++ ++ ## Enable IPv4 Routing ++ p1.run("sysctl -w net.ipv4.ip_forward=1") ++ pe1.run("sysctl -w net.ipv4.ip_forward=1") ++ pe2.run("sysctl -w net.ipv4.ip_forward=1") ++ ++ ## tell hosts to send GARP upon IPv4 addr assignment ++ host1.run("sysctl -w net.ipv4.conf.host1-eth0.arp_announce=1") ++ host2.run("sysctl -w net.ipv4.conf.host2-eth0.arp_announce=1") ++ ++ ## Load FRR config on all nodes and start topo ++ router_list = tgen.routers() ++ for rname, router in router_list.items(): ++ router.load_config( ++ TopoRouter.RD_ZEBRA, os.path.join(CWD, "{}/zebra_v6_vtep.conf".format(rname)) ++ ) ++ router.load_config( ++ TopoRouter.RD_OSPF6, os.path.join(CWD, "{}/ospfd6.conf".format(rname)) ++ ) ++ router.load_config( ++ TopoRouter.RD_BGP, os.path.join(CWD, "{}/bgpd_v6_vtep.conf".format(rname)) ++ ) ++ tgen.start_router() ++ ++ ++def teardown_module(mod): ++ "Teardown the pytest environment" ++ tgen = get_topogen() ++ tgen.stop_topology() ++ ++ ++def show_vni_json_elide_ifindex(pe, vni, expected): ++ output_json = pe.vtysh_cmd("show evpn vni {} json".format(vni), isjson=True) ++ if "ifindex" in output_json: ++ output_json.pop("ifindex") ++ ++ return topotest.json_cmp(output_json, expected) ++ ++ ++def check_vni_macs_present(tgen, router, vni, maclist): ++ result = router.vtysh_cmd("show evpn mac vni {} json".format(vni), isjson=True) ++ for rname, ifname in maclist: ++ m = tgen.net.macs[(rname, ifname)] ++ if m not in result["macs"]: ++ return "MAC ({}) for interface {} on {} missing on {} from {}".format( ++ m, ifname, rname, router.name, json.dumps(result, indent=4) ++ ) ++ return None ++ ++ ++def test_pe1_converge_evpn(): ++ "Wait for protocol convergence" ++ ++ tgen = get_topogen() ++ # Don't run this test if we have any failure. ++ if tgen.routers_have_failure(): ++ pytest.skip(tgen.errors) ++ ++ pe1 = tgen.gears["PE1"] ++ json_file = "{}/{}/evpn.vni.v6_vtep.json".format(CWD, pe1.name) ++ expected = json.loads(open(json_file).read()) ++ ++ test_func = partial(show_vni_json_elide_ifindex, pe1, 101, expected) ++ _, result = topotest.run_and_expect(test_func, None, count=45, wait=1) ++ assertmsg = '"{}" JSON output mismatches'.format(pe1.name) ++ ++ # Let's ensure that the hosts have actually tried talking to ++ # each other. Otherwise under certain startup conditions ++ # they may not actually do any l2 arp'ing and as such ++ # the bridges won't know about the hosts on their networks ++ host1 = tgen.gears["host1"] ++ host1.run("ping -c 1 10.10.1.56") ++ host2 = tgen.gears["host2"] ++ host2.run("ping -c 1 10.10.1.55") ++ ++ test_func = partial( ++ check_vni_macs_present, ++ tgen, ++ pe1, ++ 101, ++ (("host1", "host1-eth0"), ("host2", "host2-eth0")), ++ ) ++ ++ _, result = topotest.run_and_expect(test_func, None, count=30, wait=1) ++ if result: ++ logger.warning("%s", result) ++ assert None, '"{}" missing expected MACs'.format(pe1.name) ++ ++ ++def test_pe2_converge_evpn(): ++ "Wait for protocol convergence" ++ ++ tgen = get_topogen() ++ # Don't run this test if we have any failure. ++ if tgen.routers_have_failure(): ++ pytest.skip(tgen.errors) ++ ++ pe2 = tgen.gears["PE2"] ++ json_file = "{}/{}/evpn.vni.v6_vtep.json".format(CWD, pe2.name) ++ expected = json.loads(open(json_file).read()) ++ ++ test_func = partial(show_vni_json_elide_ifindex, pe2, 101, expected) ++ _, result = topotest.run_and_expect(test_func, None, count=45, wait=1) ++ assertmsg = '"{}" JSON output mismatches'.format(pe2.name) ++ assert result is None, assertmsg ++ ++ test_func = partial( ++ check_vni_macs_present, ++ tgen, ++ pe2, ++ 101, ++ (("host1", "host1-eth0"), ("host2", "host2-eth0")), ++ ) ++ _, result = topotest.run_and_expect(test_func, None, count=30, wait=1) ++ if result: ++ logger.warning("%s", result) ++ assert None, '"{}" missing expected MACs'.format(pe2.name) ++ ++ ++def mac_learn_test(host, local): ++ "check the host MAC gets learned by the VNI" ++ ++ host_output = host.vtysh_cmd("show interface {}-eth0".format(host.name)) ++ int_lines = host_output.splitlines() ++ for line in int_lines: ++ line_items = line.split(": ") ++ if "HWaddr" in line_items[0]: ++ mac = line_items[1] ++ break ++ ++ mac_output = local.vtysh_cmd("show evpn mac vni 101 mac {} json".format(mac)) ++ mac_output_json = json.loads(mac_output) ++ assertmsg = "Local MAC output does not match interface mac {}".format(mac) ++ assert mac_output_json[mac]["type"] == "local", assertmsg ++ ++ ++def mac_test_local_remote(local, remote): ++ "test MAC transfer between local and remote" ++ ++ local_output = local.vtysh_cmd("show evpn mac vni all json") ++ remote_output = remote.vtysh_cmd("show evpn mac vni all json") ++ local_output_vni = local.vtysh_cmd("show evpn vni detail json") ++ local_output_json = json.loads(local_output) ++ remote_output_json = json.loads(remote_output) ++ local_output_vni_json = json.loads(local_output_vni) ++ ++ for vni in local_output_json: ++ mac_list = local_output_json[vni]["macs"] ++ for mac in mac_list: ++ if mac_list[mac]["type"] == "local" and mac_list[mac]["intf"] != "br101": ++ assertmsg = "JSON output mismatches local: {} remote: {}".format( ++ local_output_vni_json[0]["vtepIp"], ++ remote_output_json[vni]["macs"][mac]["remoteVtep"], ++ ) ++ assert ( ++ remote_output_json[vni]["macs"][mac]["remoteVtep"] ++ == local_output_vni_json[0]["vtepIp"] ++ ), assertmsg ++ ++ ++def test_learning_pe1(): ++ "test MAC learning on PE1" ++ ++ tgen = get_topogen() ++ # Don't run this test if we have any failure. ++ if tgen.routers_have_failure(): ++ pytest.skip(tgen.errors) ++ ++ host1 = tgen.gears["host1"] ++ pe1 = tgen.gears["PE1"] ++ mac_learn_test(host1, pe1) ++ ++ ++def test_learning_pe2(): ++ "test MAC learning on PE2" ++ ++ tgen = get_topogen() ++ # Don't run this test if we have any failure. ++ if tgen.routers_have_failure(): ++ pytest.skip(tgen.errors) ++ ++ host2 = tgen.gears["host2"] ++ pe2 = tgen.gears["PE2"] ++ mac_learn_test(host2, pe2) ++ ++ ++def test_local_remote_mac_pe1(): ++ "Test MAC transfer PE1 local and PE2 remote" ++ ++ tgen = get_topogen() ++ # Don't run this test if we have any failure. ++ if tgen.routers_have_failure(): ++ pytest.skip(tgen.errors) ++ ++ pe1 = tgen.gears["PE1"] ++ pe2 = tgen.gears["PE2"] ++ mac_test_local_remote(pe1, pe2) ++ ++ ++def test_local_remote_mac_pe2(): ++ "Test MAC transfer PE2 local and PE1 remote" ++ ++ tgen = get_topogen() ++ # Don't run this test if we have any failure. ++ if tgen.routers_have_failure(): ++ pytest.skip(tgen.errors) ++ ++ pe1 = tgen.gears["PE1"] ++ pe2 = tgen.gears["PE2"] ++ mac_test_local_remote(pe2, pe1) ++ ++ ++def ip_learn_test(tgen, host, local, remote, ip_addr): ++ "check the host IP gets learned by the VNI" ++ host_output = host.vtysh_cmd("show interface {}-eth0".format(host.name)) ++ int_lines = host_output.splitlines() ++ for line in int_lines: ++ line_items = line.split(": ") ++ if "HWaddr" in line_items[0]: ++ mac = line_items[1] ++ break ++ print(host_output) ++ ++ # check we have a local association between the MAC and IP ++ local_output = local.vtysh_cmd("show evpn mac vni 101 mac {} json".format(mac)) ++ print(local_output) ++ local_output_json = json.loads(local_output) ++ mac_type = local_output_json[mac]["type"] ++ assertmsg = "Failed to learn local IP address on host {}".format(host.name) ++ assert local_output_json[mac]["neighbors"] != "none", assertmsg ++ learned_ip = local_output_json[mac]["neighbors"]["active"][0] ++ ++ assertmsg = "local learned mac wrong type: {} ".format(mac_type) ++ assert mac_type == "local", assertmsg ++ ++ assertmsg = ( ++ "learned address mismatch with configured address host: {} learned: {}".format( ++ ip_addr, learned_ip ++ ) ++ ) ++ assert ip_addr == learned_ip, assertmsg ++ ++ # now lets check the remote ++ count = 0 ++ converged = False ++ while count < 30: ++ remote_output = remote.vtysh_cmd( ++ "show evpn mac vni 101 mac {} json".format(mac) ++ ) ++ print(remote_output) ++ remote_output_json = json.loads(remote_output) ++ type = remote_output_json[mac]["type"] ++ if not remote_output_json[mac]["neighbors"] == "none": ++ # due to a kernel quirk, learned IPs can be inactive ++ if ( ++ remote_output_json[mac]["neighbors"]["active"] ++ or remote_output_json[mac]["neighbors"]["inactive"] ++ ): ++ converged = True ++ break ++ count += 1 ++ sleep(1) ++ ++ print("tries: {}".format(count)) ++ assertmsg = "{} remote learned mac no address: {} ".format(host.name, mac) ++ # some debug for this failure ++ if not converged == True: ++ log_output = remote.run("cat zebra.log") ++ print(log_output) ++ ++ assert converged == True, assertmsg ++ if remote_output_json[mac]["neighbors"]["active"]: ++ learned_ip = remote_output_json[mac]["neighbors"]["active"][0] ++ else: ++ learned_ip = remote_output_json[mac]["neighbors"]["inactive"][0] ++ assertmsg = "remote learned mac wrong type: {} ".format(type) ++ assert type == "remote", assertmsg ++ ++ assertmsg = "remote learned address mismatch with configured address host: {} learned: {}".format( ++ ip_addr, learned_ip ++ ) ++ assert ip_addr == learned_ip, assertmsg ++ ++ ++def test_ip_pe1_learn(): ++ "run the IP learn test for PE1" ++ ++ tgen = get_topogen() ++ # Don't run this test if we have any failure. ++ if tgen.routers_have_failure(): ++ pytest.skip(tgen.errors) ++ ++ host1 = tgen.gears["host1"] ++ pe1 = tgen.gears["PE1"] ++ pe2 = tgen.gears["PE2"] ++ # pe2.vtysh_cmd("debug zebra vxlan") ++ # pe2.vtysh_cmd("debug zebra kernel") ++ # lets populate that arp cache ++ host1.run("ping -c1 10.10.1.1") ++ ip_learn_test(tgen, host1, pe1, pe2, "10.10.1.55") ++ # tgen.mininet_cli() ++ ++ ++def test_ip_pe2_learn(): ++ "run the IP learn test for PE2" ++ ++ tgen = get_topogen() ++ # Don't run this test if we have any failure. ++ if tgen.routers_have_failure(): ++ pytest.skip(tgen.errors) ++ ++ host2 = tgen.gears["host2"] ++ pe1 = tgen.gears["PE1"] ++ pe2 = tgen.gears["PE2"] ++ # pe1.vtysh_cmd("debug zebra vxlan") ++ # pe1.vtysh_cmd("debug zebra kernel") ++ # lets populate that arp cache ++ host2.run("ping -c1 10.10.1.3") ++ ip_learn_test(tgen, host2, pe2, pe1, "10.10.1.56") ++ # tgen.mininet_cli() ++ ++ ++def is_installed(json_paths, soo): ++ """ ++ check if any path has been selected as best. ++ optionally check for matching SoO on bestpath. ++ """ ++ best = False ++ soo_present = False ++ for path in json_paths: ++ path = path[0] ++ # sometimes "bestpath" is a bool, other times it's a dict ++ # either way, the key isn't present when the bool is false... ++ # so we may as well just check for the key's existence ++ best = "bestpath" in path ++ path_keys = path.keys() ++ if best: ++ if soo: ++ soo_present = soo in path["extendedCommunity"]["string"] ++ break ++ return (best and soo_present) if soo else best ++ ++ ++def change_soo(pe, soo, vni): ++ soo_cmd_str = "mac-vrf soo " ++ if soo: ++ soo_cmd_str += soo ++ else: ++ soo_cmd_str = "no " + soo_cmd_str ++ pe.vtysh_cmd( ++ """ ++ configure terminal ++ router bgp 65000 ++ address-family l2vpn evpn ++ {} ++ """.format( ++ soo_cmd_str ++ ) ++ ) ++ bgp_l2vni = get_bgp_l2vni_fields(pe, vni) ++ l2vni_soo = bgp_l2vni[2] ++ return l2vni_soo == soo ++ ++ ++def get_evpn_rt_json_str(vni, rd, oip=None, mac=None, ip=None): ++ "convert evpn route fields into a route string + global/l2vni cli syntax" ++ # type-3 ++ if oip: ++ ip_len = 128 if ":" in oip else 32 ++ rt_str = "[3]:[0]:[{}]:[{}]".format(ip_len, oip) ++ global_rt_cmd = "show bgp l2vpn evpn route rd {} type 3 json".format(rd) ++ l2vni_rt_cmd = "show bgp vni {} type 3 vtep {} json".format(vni, oip) ++ # type-2 ++ else: ++ rt_str = "[2]:[0]:[48]:[{}]".format(mac) ++ global_rt_cmd = "show bgp l2vpn evpn route rd {} type 2".format(rd) ++ l2vni_rt_cmd = "show bgp vni {} type 2 mac {}".format(vni, mac) ++ if ip: ++ ip_len = 128 if ":" in ip else 32 ++ rt_str += ":[{}]:[{}]".format(ip_len, ip) ++ l2vni_rt_cmd = "show bgp vni {} type 2 ip {}".format(vni, ip) ++ global_rt_cmd += " json" ++ l2vni_rt_cmd += " json" ++ return [rt_str, global_rt_cmd, l2vni_rt_cmd] ++ ++ ++def get_evpn_rt_json(pe, vni, rd, oip=None, mac=None, ip=None): ++ "get json global/l2vni json blobs for the corresponding evpn route" ++ rt = get_evpn_rt_json_str(vni, rd, oip, mac, ip) ++ rt_str = rt.pop(0) ++ global_rt_cmd = rt.pop(0) ++ l2vni_rt_cmd = rt.pop(0) ++ logger.info( ++ "collecting global/l2vni evpn routes for pfx {} on {}".format(rt_str, pe.name) ++ ) ++ global_rt_json = pe.vtysh_cmd(global_rt_cmd, isjson=True) ++ logger.info("global evpn route for pfx {} on {}".format(rt_str, pe.name)) ++ logger.info(global_rt_json) ++ l2vni_rt_json = pe.vtysh_cmd(l2vni_rt_cmd, isjson=True) ++ logger.info("l2vni evpn route for pfx {} on {}".format(rt_str, pe.name)) ++ logger.info(l2vni_rt_json) ++ return [rt_str, global_rt_json, l2vni_rt_json] ++ ++ ++def get_bgp_l2vni_fields(pe, vni): ++ bgp_vni_output = pe.vtysh_cmd( ++ "show bgp l2vpn evpn vni {} json".format(vni), isjson=True ++ ) ++ rd = bgp_vni_output["rd"] ++ oip = bgp_vni_output["originatorIp"] ++ soo = bgp_vni_output["siteOfOrigin"] ++ return [rd, oip, soo] ++ ++ ++def rt_test(pe, vni, rd, oip, mac, ip, soo): ++ """ ++ Check installation status of a given route. ++ @pe = router where bgp routes are collected from ++ @vni = l2vni ++ @rd = rd of the route ++ @oip = originator-ip, set only for type-3 route ++ @mac = nlri mac, set only for type-2 ++ @ip = nlri ip, optionally set for type-2 ++ @soo = MAC-VRF SoO string, set if SoO needs to be ++ on the rt to be considered installed. ++ """ ++ rt = get_evpn_rt_json(pe, vni, rd, oip, mac, ip) ++ rt_str = rt.pop(0) ++ rt_global_json = rt.pop(0) ++ rt_l2vni_json = rt.pop(0) ++ ++ if ( ++ not rt_global_json ++ or rd not in rt_global_json ++ or rt_str not in rt_global_json[rd] ++ ): ++ global_installed = False ++ else: ++ global_json_paths = rt_global_json[rd][rt_str]["paths"] ++ global_installed = is_installed(global_json_paths, soo) ++ if not rt_l2vni_json: ++ l2vni_installed = False ++ else: ++ if not oip: ++ # json for RT2s in l2vni don't key by route string ++ l2vni_json_paths = rt_l2vni_json["paths"] ++ l2vni_installed = is_installed(l2vni_json_paths, soo) ++ elif rt_str in rt_l2vni_json and "paths" in rt_l2vni_json[rt_str]: ++ l2vni_json_paths = rt_l2vni_json[rt_str]["paths"] ++ l2vni_installed = is_installed(l2vni_json_paths, soo) ++ else: ++ l2vni_installed = False ++ return [global_installed, l2vni_installed] ++ ++ ++def test_macvrf_soo(): ++ "Test MAC-VRF Site-of-Origin on pe1" ++ l2vni = 101 ++ l3vni = 404 ++ soo = "65000:0" ++ ++ tgen = get_topogen() ++ # Don't run this test if we have any failure. ++ if tgen.routers_have_failure(): ++ pytest.skip(tgen.errors) ++ ++ host1 = tgen.gears["host1"] ++ host2 = tgen.gears["host2"] ++ pe1 = tgen.gears["PE1"] ++ pe2 = tgen.gears["PE2"] ++ ++ # Collect pe2 RD/Originator-IP ++ pe2_bgp_vni = get_bgp_l2vni_fields(pe2, l2vni) ++ pe2_rd = pe2_bgp_vni[0] ++ pe2_oip = pe2_bgp_vni[1] ++ # Collect local addrs ++ h2_mac = host2.run("ip -br link show host2-eth0").split()[2] ++ h2_ip = host2.run("ip -4 -br addr show host2-eth0").split()[2].split("/")[0] ++ pe2_mac = pe2.run("ip -br link show br101").split()[2] ++ pe2_ip = pe2.run("ip -4 -br addr show br101").split()[2].split("/")[0] ++ # Route fields ++ pe2_svi_parms = [l2vni, pe2_rd, None, pe2_mac, pe2_ip] ++ pe2_imet_parms = [l2vni, pe2_rd, pe2_oip, None, None] ++ host2_mac_parms = [l2vni, pe2_rd, None, h2_mac, None] ++ host2_neigh_parms = [l2vni, pe2_rd, None, h2_mac, h2_ip] ++ # Route strings ++ pe2_svi_rt_str, _, _ = get_evpn_rt_json_str(*pe2_svi_parms) ++ pe2_imet_rt_str, _, _ = get_evpn_rt_json_str(*pe2_imet_parms) ++ host2_mac_rt_str, _, _ = get_evpn_rt_json_str(*host2_mac_parms) ++ host2_neigh_rt_str, _, _ = get_evpn_rt_json_str(*host2_neigh_parms) ++ ++ ## trigger mac/arp learn ++ host1.run("ping -c1 10.10.1.1") ++ host2.run("ping -c1 10.10.1.3") ++ ++ step("Test pe2/host2 routes are installed on pe1 (global/l2vni)") ++ ++ # expected state: ++ # - global table: present w/o soo ++ # - l2vni table: present w/o soo ++ assertmsg = "{} missing on {} in {}{} evpn table(s)" ++ global_parms = [pe2.name, "global", ""] ++ l2vni_parms = [pe2.name, "l2vni", l2vni] ++ # pe2's type-2 for l2vni 101 svi mac/ip ++ test_f = partial(rt_test, pe2, *pe2_svi_parms, None) ++ _, res = topotest.run_and_expect(test_f, [True, True], count=30, wait=1) ++ assert res[0] == True, assertmsg.format(pe2_svi_rt_str, *global_parms) ++ assert res[1] == True, assertmsg.format(pe2_svi_rt_str, *l2vni_parms) ++ # pe2's type-3 for l2vni 101 ++ test_f = partial(rt_test, pe2, *pe2_imet_parms, None) ++ _, res = topotest.run_and_expect(test_f, [True, True], count=30, wait=1) ++ assert res[0] == True, assertmsg.format(pe2_imet_rt_str, *global_parms) ++ assert res[1] == True, assertmsg.format(pe2_imet_rt_str, *l2vni_parms) ++ # mac-only type-2 for host2 ++ test_f = partial(rt_test, pe1, *host2_mac_parms, None) ++ _, res = topotest.run_and_expect(test_f, [True, True], count=30, wait=1) ++ assert res[0] == True, assertmsg.format(host2_mac_rt_str, *global_parms) ++ assert res[1] == True, assertmsg.format(host2_mac_rt_str, *l2vni_parms) ++ # mac+ip type-2 for host2 ++ test_f = partial(rt_test, pe1, *host2_neigh_parms, None) ++ _, res = topotest.run_and_expect(test_f, [True, True], count=30, wait=1) ++ assert res[0] == True, assertmsg.format(host2_neigh_rt_str, *global_parms) ++ assert res[1] == True, assertmsg.format(host2_neigh_rt_str, *l2vni_parms) ++ ++ step("Add valid SoO config to pe2") ++ test_f = partial(change_soo, pe2, soo, l2vni) ++ _, res = topotest.run_and_expect(test_f, True, count=10, wait=1) ++ assertmsg = "soo '{}' not properly applied on {}".format(soo, pe2.name) ++ assert res == True, assertmsg ++ ++ step("Test valid config applied to L2VNI on pe2") ++ ## expected state: ++ ## - global table: present w/ soo ++ ## - l2vni table: present w/ soo ++ assertmsg = "{} not originated with soo {} by {} in {}{} evpn table(s)" ++ global_parms = [soo, pe2.name, "global", ""] ++ l2vni_parms = [soo, pe2.name, "l2vni", l2vni] ++ # type-2 for l2vni 101 svi mac/ip ++ test_f = partial(rt_test, pe2, *pe2_svi_parms, soo) ++ _, res = topotest.run_and_expect(test_f, [True, True], count=30, wait=1) ++ assert res[0] == True, assertmsg.format(pe2_svi_rt_str, *global_parms) ++ assert res[1] == True, assertmsg.format(pe2_svi_rt_str, *l2vni_parms) ++ # type-3 for l2vni 101 ++ test_f = partial(rt_test, pe2, *pe2_imet_parms, soo) ++ _, res = topotest.run_and_expect(test_f, [True, True], count=30, wait=1) ++ assert res[0] == True, assertmsg.format(pe2_imet_rt_str, *global_parms) ++ assert res[1] == True, assertmsg.format(pe2_imet_rt_str, *l2vni_parms) ++ ++ step("Test invalid SoO config on pe2") ++ test_f = partial(change_soo, pe2, "1:1:1", l2vni) ++ _, res = topotest.run_and_expect(test_f, False, count=10, wait=1) ++ assertmsg = "soo '1:1:1' should not have been allowed on {}".format(pe2.name) ++ assert res == False, assertmsg ++ ++ step("Test valid SoO applied to host2 routes (mac-only + mac/ip) on pe2") ++ ++ ## expected state: ++ ## - global table: present w/ soo ++ ## - l2vni table: present w/ soo ++ assertmsg = "{} not originated with soo {} by {} in {}{} evpn table(s)" ++ global_parms = [soo, pe1.name, "global", ""] ++ l2vni_parms = [soo, pe1.name, "l2vni", l2vni] ++ # mac-only type-2 for host2 ++ test_f = partial(rt_test, pe2, *host2_mac_parms, soo) ++ _, res = topotest.run_and_expect(test_f, [True, True], count=30, wait=1) ++ assert res[0] == True, assertmsg.format(host2_mac_rt_str, *global_parms) ++ assert res[1] == True, assertmsg.format(host2_mac_rt_str, *l2vni_parms) ++ # mac+ip type-2 for host2 ++ test_f = partial(rt_test, pe2, *host2_neigh_parms, soo) ++ _, res = topotest.run_and_expect(test_f, [True, True], count=30, wait=1) ++ assert res[0] == True, assertmsg.format(host2_neigh_rt_str, *global_parms) ++ assert res[1] == True, assertmsg.format(host2_neigh_rt_str, *l2vni_parms) ++ ++ step("Add valid SoO to pe1") ++ test_f = partial(change_soo, pe1, soo, l2vni) ++ _, res = topotest.run_and_expect(test_f, True, count=10, wait=1) ++ assertmsg = "soo '{}' not properly applied on {}".format(soo, pe1.name) ++ assert res == True, assertmsg ++ ++ step("Test pe2's routes are filtered from l2vni on pe1.") ++ ## expected state: ++ ## - global table: present w/ soo ++ ## - l2vni table: not present ++ global_assertmsg = "{} with soo {} from {} missing from global evpn table" ++ l2vni_assertmsg = "{} with soo {} from {} not filtered from {}{} evpn table" ++ global_parms = [soo, pe1.name, "global", ""] ++ l2vni_parms = [soo, pe1.name, "l2vni", l2vni] ++ # pe2's svi route ++ test_f = partial(rt_test, pe1, *pe2_svi_parms, soo) ++ _, res = topotest.run_and_expect(test_f, [True, False], count=30, wait=1) ++ assert res[0] == True, global_assertmsg.format(pe2_svi_rt_str, *global_parms) ++ assert res[1] == False, l2vni_assertmsg.format(pe2_svi_rt_str, *l2vni_parms) ++ # pe2's imet route ++ test_f = partial(rt_test, pe1, *pe2_imet_parms, soo) ++ _, res = topotest.run_and_expect(test_f, [True, False], count=30, wait=1) ++ assert res[0] == True, global_assertmsg.format(pe2_imet_rt_str, *global_parms) ++ assert res[1] == False, l2vni_assertmsg.format(pe2_imet_rt_str, *l2vni_parms) ++ # mac-only type-2 for host2 ++ test_f = partial(rt_test, pe1, *host2_mac_parms, soo) ++ _, res = topotest.run_and_expect(test_f, [True, False], count=30, wait=1) ++ assert res[0] == True, global_assertmsg.format(host2_mac_rt_str, *global_parms) ++ assert res[1] == False, l2vni_assertmsg.format(host2_mac_rt_str, *l2vni_parms) ++ # mac+ip type-2 for host2 ++ test_f = partial(rt_test, pe1, *host2_neigh_parms, soo) ++ _, res = topotest.run_and_expect(test_f, [True, False], count=30, wait=1) ++ assert res[0] == True, global_assertmsg.format(host2_neigh_rt_str, *global_parms) ++ assert res[1] == False, l2vni_assertmsg.format(host2_neigh_rt_str, *l2vni_parms) ++ ++ step("Remove SoO from pe1") ++ test_f = partial(change_soo, pe1, "", l2vni) ++ _, res = topotest.run_and_expect(test_f, True, count=10, wait=1) ++ assertmsg = "soo '{}' not properly removed from {}".format(soo, pe1.name) ++ assert res == True, assertmsg ++ ++ step("Test pe2/host2 routes are installed on pe1 (global/l2vni)") ++ ## expected state: ++ ## - global table: present w/ soo ++ ## - l2vni table: present w/ soo ++ assertmsg = "{} with soo {} missing on {} in {}{} evpn table" ++ global_parms = [soo, pe1.name, "global", ""] ++ l2vni_parms = [soo, pe1.name, "l2vni", l2vni] ++ # pe2's type-2 for l2vni 101 svi mac/ip ++ test_f = partial(rt_test, pe1, *pe2_svi_parms, soo) ++ _, res = topotest.run_and_expect(test_f, [True, True], count=30, wait=1) ++ assert res[0] == True, assertmsg.format(pe2_svi_rt_str, *global_parms) ++ assert res[1] == True, assertmsg.format(pe2_svi_rt_str, *l2vni_parms) ++ # pe2's type-3 for l2vni 101 ++ test_f = partial(rt_test, pe1, *pe2_imet_parms, soo) ++ _, res = topotest.run_and_expect(test_f, [True, True], count=30, wait=1) ++ assert res[0] == True, assertmsg.format(pe2_imet_rt_str, *global_parms) ++ assert res[1] == True, assertmsg.format(pe2_imet_rt_str, *l2vni_parms) ++ # mac-only type-2 for host2 ++ test_f = partial(rt_test, pe1, *host2_mac_parms, soo) ++ _, res = topotest.run_and_expect(test_f, [True, True], count=30, wait=1) ++ assert res[0] == True, assertmsg.format(host2_mac_rt_str, *global_parms) ++ assert res[1] == True, assertmsg.format(host2_mac_rt_str, *l2vni_parms) ++ # mac+ip type-2 for host2 ++ test_f = partial(rt_test, pe1, *host2_neigh_parms, soo) ++ _, res = topotest.run_and_expect(test_f, [True, True], count=30, wait=1) ++ assert res[0] == True, assertmsg.format(host2_neigh_rt_str, *global_parms) ++ assert res[1] == True, assertmsg.format(host2_neigh_rt_str, *l2vni_parms) ++ ++ step("Remove SoO from pe2") ++ test_f = partial(change_soo, pe2, "", l2vni) ++ _, res = topotest.run_and_expect(test_f, True, count=10, wait=1) ++ assertmsg = "soo '{}' not properly removed from {}".format(soo, pe2.name) ++ assert res == True, assertmsg ++ ++ step("Test pe2's 'self' routes are installed on pe1 (global/l2vni)") ++ ## expected state: ++ ## - global table: present w/o soo ++ ## - l2vni table: present w/o soo ++ assertmsg = "{} missing on {} in {}{} evpn table(s)" ++ global_parms = [pe1.name, "global", ""] ++ l2vni_parms = [pe1.name, "l2vni", l2vni] ++ # pe2's type-2 for l2vni 101 svi mac/ip ++ test_f = partial(rt_test, pe1, *pe2_svi_parms, None) ++ _, res = topotest.run_and_expect(test_f, [True, True], count=30, wait=1) ++ assert res[0] == True, assertmsg.format(pe2_svi_rt_str, *global_parms) ++ assert res[1] == True, assertmsg.format(pe2_svi_rt_str, *l2vni_parms) ++ # pe2's type-3 for l2vni 101 ++ test_f = partial(rt_test, pe1, *pe2_imet_parms, None) ++ _, res = topotest.run_and_expect(test_f, [True, True], count=30, wait=1) ++ assert res[0] == True, assertmsg.format(pe2_imet_rt_str, *global_parms) ++ assert res[1] == True, assertmsg.format(pe2_imet_rt_str, *l2vni_parms) ++ # mac-only type-2 for host2 ++ test_f = partial(rt_test, pe1, *host2_mac_parms, None) ++ _, res = topotest.run_and_expect(test_f, [True, True], count=30, wait=1) ++ assert res[0] == True, assertmsg.format(host2_mac_rt_str, *global_parms) ++ assert res[1] == True, assertmsg.format(host2_mac_rt_str, *l2vni_parms) ++ # mac+ip type-2 for host2 ++ test_f = partial(rt_test, pe1, *host2_neigh_parms, None) ++ _, res = topotest.run_and_expect(test_f, [True, True], count=30, wait=1) ++ assert res[0] == True, assertmsg.format(host2_neigh_rt_str, *global_parms) ++ assert res[1] == True, assertmsg.format(host2_neigh_rt_str, *l2vni_parms) ++ ++ # tgen.mininet_cli() ++ ++ ++def test_memory_leak(): ++ "Run the memory leak test and report results." ++ tgen = get_topogen() ++ if not tgen.is_memleak_enabled(): ++ pytest.skip("Memory leak test/report is disabled") ++ ++ tgen.report_memory_leaks() ++ ++ ++if __name__ == "__main__": ++ args = ["-s"] + sys.argv[1:] ++ sys.exit(pytest.main(args)) +-- +2.43.0 + diff --git a/src/sonic-frr/patch/0043-doc-Extend-BGP-and-EVPN-to-reference-IPv6-VTEP-Suppo.patch b/src/sonic-frr/patch/0043-doc-Extend-BGP-and-EVPN-to-reference-IPv6-VTEP-Suppo.patch new file mode 100644 index 00000000000..fa2c545ac5e --- /dev/null +++ b/src/sonic-frr/patch/0043-doc-Extend-BGP-and-EVPN-to-reference-IPv6-VTEP-Suppo.patch @@ -0,0 +1,47 @@ +From cb5efd60c7926e018fccaf7cb130bf26ea155dd6 Mon Sep 17 00:00:00 2001 +From: Mike RE Mallin +Date: Wed, 9 Apr 2025 15:59:37 -0400 +Subject: doc: Extend BGP and EVPN to reference IPv6 VTEP Support + +Signed-off-by: Mike Mallin +(cherry picked from commit 258855bb64c36c975731b1af78e2376fd47de6e8) +Signed-off-by: Tamer Ahmed + +diff --git a/doc/user/bgp.rst b/doc/user/bgp.rst +index 3b8fc9fbc..da965e5d8 100644 +--- a/doc/user/bgp.rst ++++ b/doc/user/bgp.rst +@@ -3834,7 +3834,8 @@ EVPN Multihoming + + All-Active Multihoming is used for redundancy and load sharing. Servers + are attached to two or more PEs and the links are bonded (link-aggregation). +-This group of server links is referred to as an Ethernet Segment. ++This group of server links is referred to as an Ethernet Segment. Currently, ++IPv6 VTEP addresses are not supported with EVPN Multihoming. + + Ethernet Segments + """"""""""""""""" +diff --git a/doc/user/evpn.rst b/doc/user/evpn.rst +index a60f8b2fc..2c68d091b 100644 +--- a/doc/user/evpn.rst ++++ b/doc/user/evpn.rst +@@ -162,6 +162,8 @@ The VTEP-IP (100.64.0.1) needs to be reachable by other VTEPs in the EVPN + environment in order for VXLAN decapsulation to function. In this example we + will advertise our local VTEP-IP using BGP (via the ``network`` statement), but + static routes or other routing protocols like IS-IS or OSPF can also be used. ++The VTEP-IP can be either an IPv4 or IPv6 address for Singlehomed deployments. ++Only IPv4 is presently supported for Multihomed deployments. + + In order to enable EVPN for a BGP instance, we must use the command + ``advertise-all-vni``. In this example we will be using the default VRF to +@@ -250,6 +252,7 @@ environment described above. + Some high-level config considerations: + + * The local VTEP-IP should always be set to a reachable IP on the lo device. ++* The local VTEP-IP can be either an IPv4 or IPv6 address. + * An L3VNI should always have an SVI (aka the L3-SVI). + * An L3-SVI should not be assigned an IP address, link-local or otherwise. + +-- +2.43.0 + diff --git a/src/sonic-frr/patch/0044-bgpd-EVPNv6-MH-es-vtep-add-del-v6-aware.patch b/src/sonic-frr/patch/0044-bgpd-EVPNv6-MH-es-vtep-add-del-v6-aware.patch new file mode 100644 index 00000000000..25e1cba498d --- /dev/null +++ b/src/sonic-frr/patch/0044-bgpd-EVPNv6-MH-es-vtep-add-del-v6-aware.patch @@ -0,0 +1,539 @@ +From 45911819396d5e8602d80f8b704f7125d598c987 Mon Sep 17 00:00:00 2001 +From: Chirag Shah +Date: Tue, 11 Nov 2025 20:57:50 -0800 +Subject: bgpd: EVPNv6 MH es vtep add del v6 aware + +bgp_evpn_remote_es_evi_add/ bgp_evpn_remote_es_evi_del +were incorrectly using p->prefix.ead_addr.ip directly, +prefix (prefix in global table has IP zeroed out), +extracts the vtep_ip from the BGP path attributes + +Signed-off-by: Chirag Shah +Signed-off-by: Jared Mauch +(cherry picked from commit 3a0ce90911332cbb17654d76e42daded01726272) +Signed-off-by: Tamer Ahmed + +diff --git a/bgpd/bgp_evpn.c b/bgpd/bgp_evpn.c +index 9565b7efd..e80f5f991 100644 +--- a/bgpd/bgp_evpn.c ++++ b/bgpd/bgp_evpn.c +@@ -1362,7 +1362,7 @@ enum zclient_send_status evpn_zebra_install(struct bgp *bgp, struct bgpevpn *vpn + &vtep_ip, 1, flags, seq, + bgp_evpn_attr_get_esi(pi->attr)); + } else if (p->prefix.route_type == BGP_EVPN_AD_ROUTE) { +- ret = bgp_evpn_remote_es_evi_add(bgp, vpn, p); ++ ret = bgp_evpn_remote_es_evi_add(bgp, vpn, p, pi); + } else { + switch (bgp_attr_get_pmsi_tnl_type(pi->attr)) { + case PMSI_TNLTYPE_INGR_REPL: +@@ -1424,7 +1424,7 @@ enum zclient_send_status evpn_zebra_uninstall(struct bgp *bgp, + (is_sync ? &zero_vtep_ip : &vtep_ip), 0, 0, 0, + NULL); + else if (p->prefix.route_type == BGP_EVPN_AD_ROUTE) +- ret = bgp_evpn_remote_es_evi_del(bgp, vpn, p); ++ ret = bgp_evpn_remote_es_evi_del(bgp, vpn, p, pi); + else + ret = bgp_zebra_send_remote_vtep(bgp, vpn, p, + VXLAN_FLOOD_DISABLED, 0); +diff --git a/bgpd/bgp_evpn_mh.c b/bgpd/bgp_evpn_mh.c +index 590534992..6570075da 100644 +--- a/bgpd/bgp_evpn_mh.c ++++ b/bgpd/bgp_evpn_mh.c +@@ -47,11 +47,11 @@ static void bgp_evpn_local_type1_evi_route_del(struct bgp *bgp, + struct bgp_evpn_es *es); + static struct bgp_evpn_es_vtep * + bgp_evpn_es_vtep_add(struct bgp *bgp, struct bgp_evpn_es *es, +- struct in_addr vtep_ip, bool esr, uint8_t df_alg, ++ struct ipaddr vtep_ip, bool esr, uint8_t df_alg, + uint16_t df_pref, int *zret); + static enum zclient_send_status bgp_evpn_es_vtep_del(struct bgp *bgp, + struct bgp_evpn_es *es, +- struct in_addr vtep_ip, ++ struct ipaddr vtep_ip, + bool esr); + static void bgp_evpn_es_cons_checks_pend_add(struct bgp_evpn_es *es); + static void bgp_evpn_es_cons_checks_pend_del(struct bgp_evpn_es *es); +@@ -126,10 +126,29 @@ static int bgp_evpn_es_route_select_install(struct bgp *bgp, + && !CHECK_FLAG(old_select->flags, BGP_PATH_ATTR_CHANGED) + && !bgp_addpath_is_addpath_used(&bgp->tx_addpath, afi, safi)) { + if (bgp_zebra_has_route_changed(old_select)) { +- bgp_evpn_es_vtep_add(bgp, es, old_select->attr->nexthop, +- true /*esr*/, +- old_select->attr->df_alg, +- old_select->attr->df_pref, &zret); ++ struct ipaddr vtep_ip = {}; ++ uint8_t nhfamily = NEXTHOP_FAMILY(old_select->attr->mp_nexthop_len); ++ ++ if (nhfamily == AF_INET) { ++ SET_IPADDR_V4(&vtep_ip); ++ if (old_select->attr->mp_nexthop_len == BGP_ATTR_NHLEN_IPV4 || ++ old_select->attr->mp_nexthop_len == BGP_ATTR_NHLEN_VPNV4) ++ IPV4_ADDR_COPY(&vtep_ip.ipaddr_v4, ++ &old_select->attr->mp_nexthop_global_in); ++ else ++ IPV4_ADDR_COPY(&vtep_ip.ipaddr_v4, ++ &old_select->attr->nexthop); ++ } else if (nhfamily == AF_INET6) { ++ SET_IPADDR_V6(&vtep_ip); ++ IPV6_ADDR_COPY(&vtep_ip.ipaddr_v6, ++ &old_select->attr->mp_nexthop_global); ++ } else { ++ SET_IPADDR_V4(&vtep_ip); ++ IPV4_ADDR_COPY(&vtep_ip.ipaddr_v4, &old_select->attr->nexthop); ++ } ++ bgp_evpn_es_vtep_add(bgp, es, vtep_ip, true /*esr*/, ++ old_select->attr->df_alg, old_select->attr->df_pref, ++ &zret); + } + UNSET_FLAG(old_select->flags, BGP_PATH_MULTIPATH_CHG); + bgp_zebra_clear_route_change_flags(dest); +@@ -156,15 +175,47 @@ static int bgp_evpn_es_route_select_install(struct bgp *bgp, + + if (new_select && new_select->type == ZEBRA_ROUTE_BGP + && new_select->sub_type == BGP_ROUTE_IMPORTED) { +- bgp_evpn_es_vtep_add(bgp, es, new_select->attr->nexthop, +- true /*esr */, new_select->attr->df_alg, ++ struct ipaddr vtep_ip = {}; ++ uint8_t nhfamily = NEXTHOP_FAMILY(new_select->attr->mp_nexthop_len); ++ ++ if (nhfamily == AF_INET) { ++ SET_IPADDR_V4(&vtep_ip); ++ if (new_select->attr->mp_nexthop_len == BGP_ATTR_NHLEN_IPV4 || ++ new_select->attr->mp_nexthop_len == BGP_ATTR_NHLEN_VPNV4) ++ IPV4_ADDR_COPY(&vtep_ip.ipaddr_v4, ++ &new_select->attr->mp_nexthop_global_in); ++ else ++ IPV4_ADDR_COPY(&vtep_ip.ipaddr_v4, &new_select->attr->nexthop); ++ } else if (nhfamily == AF_INET6) { ++ SET_IPADDR_V6(&vtep_ip); ++ IPV6_ADDR_COPY(&vtep_ip.ipaddr_v6, &new_select->attr->mp_nexthop_global); ++ } else { ++ SET_IPADDR_V4(&vtep_ip); ++ IPV4_ADDR_COPY(&vtep_ip.ipaddr_v4, &new_select->attr->nexthop); ++ } ++ bgp_evpn_es_vtep_add(bgp, es, vtep_ip, true /*esr */, new_select->attr->df_alg, + new_select->attr->df_pref, &zret); + } else { +- if (old_select && old_select->type == ZEBRA_ROUTE_BGP +- && old_select->sub_type == BGP_ROUTE_IMPORTED) +- bgp_evpn_es_vtep_del( +- bgp, es, old_select->attr->nexthop, +- true /*esr*/); ++ if (old_select && old_select->type == ZEBRA_ROUTE_BGP && ++ old_select->sub_type == BGP_ROUTE_IMPORTED) { ++ struct ipaddr vtep_ip = {}; ++ uint8_t nhfamily = NEXTHOP_FAMILY(old_select->attr->mp_nexthop_len); ++ ++ if (nhfamily == AF_INET) { ++ SET_IPADDR_V4(&vtep_ip); ++ IPV4_ADDR_COPY(&vtep_ip.ipaddr_v4, ++ &old_select->attr->mp_nexthop_global_in); ++ } else if (nhfamily == AF_INET6) { ++ SET_IPADDR_V6(&vtep_ip); ++ IPV6_ADDR_COPY(&vtep_ip.ipaddr_v6, ++ &old_select->attr->mp_nexthop_global); ++ } else { ++ /* default condition */ ++ SET_IPADDR_V4(&vtep_ip); ++ IPV4_ADDR_COPY(&vtep_ip.ipaddr_v4, &old_select->attr->nexthop); ++ } ++ bgp_evpn_es_vtep_del(bgp, es, vtep_ip, true /*esr*/); ++ } + } + + /* Clear any route change flags. */ +@@ -1342,18 +1393,17 @@ static int bgp_evpn_es_vtep_cmp(void *p1, void *p2) + const struct bgp_evpn_es_vtep *es_vtep1 = p1; + const struct bgp_evpn_es_vtep *es_vtep2 = p2; + +- return es_vtep1->vtep_ip.s_addr - es_vtep2->vtep_ip.s_addr; ++ return ipaddr_cmp(&es_vtep1->vtep_ip, &es_vtep2->vtep_ip); + } + +-static struct bgp_evpn_es_vtep *bgp_evpn_es_vtep_new(struct bgp_evpn_es *es, +- struct in_addr vtep_ip) ++static struct bgp_evpn_es_vtep *bgp_evpn_es_vtep_new(struct bgp_evpn_es *es, struct ipaddr vtep_ip) + { + struct bgp_evpn_es_vtep *es_vtep; + + es_vtep = XCALLOC(MTYPE_BGP_EVPN_ES_VTEP, sizeof(*es_vtep)); + + es_vtep->es = es; +- es_vtep->vtep_ip.s_addr = vtep_ip.s_addr; ++ es_vtep->vtep_ip = vtep_ip; + inet_ntop(AF_INET, &es_vtep->vtep_ip, es_vtep->vtep_str, + sizeof(es_vtep->vtep_str)); + listnode_init(&es_vtep->es_listnode, es_vtep); +@@ -1377,13 +1427,13 @@ static void bgp_evpn_es_vtep_free(struct bgp_evpn_es_vtep *es_vtep) + + /* check if VTEP is already part of the list */ + static struct bgp_evpn_es_vtep *bgp_evpn_es_vtep_find(struct bgp_evpn_es *es, +- struct in_addr vtep_ip) ++ struct ipaddr vtep_ip) + { + struct listnode *node = NULL; + struct bgp_evpn_es_vtep *es_vtep; + + for (ALL_LIST_ELEMENTS_RO(es->es_vtep_list, node, es_vtep)) { +- if (es_vtep->vtep_ip.s_addr == vtep_ip.s_addr) ++ if (ipaddr_is_same(&es_vtep->vtep_ip, &vtep_ip)) + return es_vtep; + } + return NULL; +@@ -1424,7 +1474,7 @@ bgp_zebra_send_remote_es_vtep(struct bgp *bgp, struct bgp_evpn_es_vtep *es_vtep, + add ? ZEBRA_REMOTE_ES_VTEP_ADD : ZEBRA_REMOTE_ES_VTEP_DEL, + bgp->vrf_id); + stream_put(s, &es->esi, sizeof(esi_t)); +- stream_put_ipv4(s, es_vtep->vtep_ip.s_addr); ++ stream_put_ipaddr(s, &es_vtep->vtep_ip); + if (add) { + stream_putl(s, flags); + stream_putc(s, es_vtep->df_alg); +@@ -1434,8 +1484,8 @@ bgp_zebra_send_remote_es_vtep(struct bgp *bgp, struct bgp_evpn_es_vtep *es_vtep, + stream_putw_at(s, 0, stream_get_endp(s)); + + if (BGP_DEBUG(evpn_mh, EVPN_MH_ES)) +- zlog_debug("Tx %s Remote ESI %s VTEP %pI4", add ? "ADD" : "DEL", +- es->esi_str, &es_vtep->vtep_ip); ++ zlog_debug("Tx %s Remote ESI %s VTEP %pIA", add ? "ADD" : "DEL", es->esi_str, ++ &es_vtep->vtep_ip); + + frrtrace(3, frr_bgp, evpn_mh_vtep_zsend, add, es, es_vtep); + +@@ -1463,9 +1513,8 @@ static enum zclient_send_status bgp_evpn_es_vtep_re_eval_active( + if ((old_active != new_active) || (new_active && param_change)) { + + if (BGP_DEBUG(evpn_mh, EVPN_MH_ES)) +- zlog_debug("es %s vtep %pI4 %s df %u/%u", +- es_vtep->es->esi_str, &es_vtep->vtep_ip, +- new_active ? "active" : "inactive", ++ zlog_debug("es %s vtep %pIA %s df %u/%u", es_vtep->es->esi_str, ++ &es_vtep->vtep_ip, new_active ? "active" : "inactive", + es_vtep->df_alg, es_vtep->df_pref); + + /* send remote ES to zebra */ +@@ -1487,7 +1536,7 @@ static enum zclient_send_status bgp_evpn_es_vtep_re_eval_active( + + static struct bgp_evpn_es_vtep * + bgp_evpn_es_vtep_add(struct bgp *bgp, struct bgp_evpn_es *es, +- struct in_addr vtep_ip, bool esr, uint8_t df_alg, ++ struct ipaddr vtep_ip, bool esr, uint8_t df_alg, + uint16_t df_pref, int *zret) + { + struct bgp_evpn_es_vtep *es_vtep; +@@ -1499,9 +1548,8 @@ bgp_evpn_es_vtep_add(struct bgp *bgp, struct bgp_evpn_es *es, + es_vtep = bgp_evpn_es_vtep_new(es, vtep_ip); + + if (BGP_DEBUG(evpn_mh, EVPN_MH_ES)) +- zlog_debug("es %s vtep %pI4 add %s df %u/%u", +- es_vtep->es->esi_str, &es_vtep->vtep_ip, +- esr ? "esr" : "ead", df_alg, df_pref); ++ zlog_debug("es %s vtep %pIA add %s df %u/%u", es_vtep->es->esi_str, ++ &es_vtep->vtep_ip, esr ? "esr" : "ead", df_alg, df_pref); + + if (esr) { + SET_FLAG(es_vtep->flags, BGP_EVPNES_VTEP_ESR); +@@ -1528,8 +1576,8 @@ bgp_evpn_es_vtep_do_del(struct bgp *bgp, struct bgp_evpn_es_vtep *es_vtep, + enum zclient_send_status ret = ZCLIENT_SEND_SUCCESS; + + if (BGP_DEBUG(evpn_mh, EVPN_MH_ES)) +- zlog_debug("es %s vtep %pI4 del %s", es_vtep->es->esi_str, +- &es_vtep->vtep_ip, esr ? "esr" : "ead"); ++ zlog_debug("es %s vtep %pIA del %s", es_vtep->es->esi_str, &es_vtep->vtep_ip, ++ esr ? "esr" : "ead"); + if (esr) { + UNSET_FLAG(es_vtep->flags, BGP_EVPNES_VTEP_ESR); + if (es_vtep->df_pref || es_vtep->df_alg) { +@@ -1550,7 +1598,7 @@ bgp_evpn_es_vtep_do_del(struct bgp *bgp, struct bgp_evpn_es_vtep *es_vtep, + + static enum zclient_send_status bgp_evpn_es_vtep_del(struct bgp *bgp, + struct bgp_evpn_es *es, +- struct in_addr vtep_ip, ++ struct ipaddr vtep_ip, + bool esr) + { + struct bgp_evpn_es_vtep *es_vtep; +@@ -2893,10 +2941,9 @@ static void bgp_evpn_l3nhg_zebra_add_v4_or_v6(struct bgp_evpn_es_vrf *es_vrf, + + /* overwrite the gw */ + if (v4_nhg) +- nh.gate.ipv4 = es_vtep->vtep_ip; ++ nh.gate.ipv4 = es_vtep->vtep_ip.ipaddr_v4; + else +- ipv4_to_ipv4_mapped_ipv6(&nh.gate.ipv6, +- es_vtep->vtep_ip); ++ ipv4_to_ipv4_mapped_ipv6(&nh.gate.ipv6, es_vtep->vtep_ip.ipaddr_v4); + + /* convert to zapi format */ + api_nh = &api_nhg.nexthops[api_nhg.nexthop_num]; +@@ -2904,8 +2951,7 @@ static void bgp_evpn_l3nhg_zebra_add_v4_or_v6(struct bgp_evpn_es_vrf *es_vrf, + + ++api_nhg.nexthop_num; + if (BGP_DEBUG(evpn_mh, EVPN_MH_ES)) +- zlog_debug("nhg %u vtep %pI4 l3-svi %d", api_nhg.id, +- &es_vtep->vtep_ip, ++ zlog_debug("nhg %u vtep %pIA l3-svi %d", api_nhg.id, &es_vtep->vtep_ip, + es_vrf->bgp_vrf->l3vni_svi_ifindex); + + frrtrace(3, frr_bgp, evpn_mh_nh_zsend, nhg_id, es_vtep, es_vrf); +@@ -3421,18 +3467,18 @@ static int bgp_evpn_es_evi_vtep_cmp(void *p1, void *p2) + const struct bgp_evpn_es_evi_vtep *evi_vtep1 = p1; + const struct bgp_evpn_es_evi_vtep *evi_vtep2 = p2; + +- return evi_vtep1->vtep_ip.s_addr - evi_vtep2->vtep_ip.s_addr; ++ return ipaddr_cmp(&evi_vtep1->vtep_ip, &evi_vtep2->vtep_ip); + } + + static struct bgp_evpn_es_evi_vtep *bgp_evpn_es_evi_vtep_new( +- struct bgp_evpn_es_evi *es_evi, struct in_addr vtep_ip) ++ struct bgp_evpn_es_evi *es_evi, struct ipaddr vtep_ip) + { + struct bgp_evpn_es_evi_vtep *evi_vtep; + + evi_vtep = XCALLOC(MTYPE_BGP_EVPN_ES_EVI_VTEP, sizeof(*evi_vtep)); + + evi_vtep->es_evi = es_evi; +- evi_vtep->vtep_ip.s_addr = vtep_ip.s_addr; ++ evi_vtep->vtep_ip = vtep_ip; + listnode_init(&evi_vtep->es_evi_listnode, evi_vtep); + listnode_add_sort(es_evi->es_evi_vtep_list, &evi_vtep->es_evi_listnode); + +@@ -3453,13 +3499,13 @@ static void bgp_evpn_es_evi_vtep_free(struct bgp_evpn_es_evi_vtep *evi_vtep) + + /* check if VTEP is already part of the list */ + static struct bgp_evpn_es_evi_vtep *bgp_evpn_es_evi_vtep_find( +- struct bgp_evpn_es_evi *es_evi, struct in_addr vtep_ip) ++ struct bgp_evpn_es_evi *es_evi, struct ipaddr vtep_ip) + { + struct listnode *node = NULL; + struct bgp_evpn_es_evi_vtep *evi_vtep; + + for (ALL_LIST_ELEMENTS_RO(es_evi->es_evi_vtep_list, node, evi_vtep)) { +- if (evi_vtep->vtep_ip.s_addr == vtep_ip.s_addr) ++ if (ipaddr_is_same(&evi_vtep->vtep_ip, &vtep_ip)) + return evi_vtep; + } + return NULL; +@@ -3526,7 +3572,7 @@ bgp_evpn_es_evi_vtep_re_eval_active(struct bgp *bgp, + + static enum zclient_send_status + bgp_evpn_es_evi_vtep_add(struct bgp *bgp, struct bgp_evpn_es_evi *es_evi, +- struct in_addr vtep_ip, bool ead_es) ++ struct ipaddr vtep_ip, bool ead_es) + { + struct bgp_evpn_es_evi_vtep *evi_vtep; + +@@ -3555,7 +3601,7 @@ bgp_evpn_es_evi_vtep_add(struct bgp *bgp, struct bgp_evpn_es_evi *es_evi, + + static enum zclient_send_status + bgp_evpn_es_evi_vtep_del(struct bgp *bgp, struct bgp_evpn_es_evi *es_evi, +- struct in_addr vtep_ip, bool ead_es) ++ struct ipaddr vtep_ip, bool ead_es) + { + struct bgp_evpn_es_evi_vtep *evi_vtep; + enum zclient_send_status ret = ZCLIENT_SEND_SUCCESS; +@@ -3565,8 +3611,7 @@ bgp_evpn_es_evi_vtep_del(struct bgp *bgp, struct bgp_evpn_es_evi *es_evi, + return ret; + + if (BGP_DEBUG(evpn_mh, EVPN_MH_ES)) +- zlog_debug("del es %s evi %u vtep %pI4 %s", +- evi_vtep->es_evi->es->esi_str, ++ zlog_debug("del es %s evi %u vtep %pIA %s", evi_vtep->es_evi->es->esi_str, + evi_vtep->es_evi->vpn->vni, &evi_vtep->vtep_ip, + ead_es ? "ead_es" : "ead_evi"); + +@@ -3893,7 +3938,8 @@ int bgp_evpn_local_es_evi_add(struct bgp *bgp, esi_t *esi, vni_t vni) + */ + enum zclient_send_status bgp_evpn_remote_es_evi_add(struct bgp *bgp, + struct bgpevpn *vpn, +- const struct prefix_evpn *p) ++ const struct prefix_evpn *p, ++ struct bgp_path_info *pi) + { + char buf[ESI_STR_LEN]; + struct bgp_evpn_es *es; +@@ -3901,16 +3947,34 @@ enum zclient_send_status bgp_evpn_remote_es_evi_add(struct bgp *bgp, + bool ead_es; + const esi_t *esi = &p->prefix.ead_addr.esi; + enum zclient_send_status ret = ZCLIENT_SEND_SUCCESS; ++ struct ipaddr vtep_ip = {}; + + if (!vpn) + /* local EAD-ES need not be sent back to zebra */ + return ret; + ++ /* Extract VTEP IP from BGP path attributes, not from prefix ++ * (prefix in global table has IP zeroed out) ++ */ ++ if (pi && pi->attr) { ++ if (pi->attr->mp_nexthop_len == BGP_ATTR_NHLEN_IPV4 || ++ pi->attr->mp_nexthop_len == BGP_ATTR_NHLEN_VPNV4) { ++ SET_IPADDR_V4(&vtep_ip); ++ vtep_ip.ipaddr_v4 = pi->attr->mp_nexthop_global_in; ++ } else if (pi->attr->mp_nexthop_len == BGP_ATTR_NHLEN_IPV6_GLOBAL || ++ pi->attr->mp_nexthop_len == BGP_ATTR_NHLEN_IPV6_GLOBAL_AND_LL || ++ pi->attr->mp_nexthop_len == BGP_ATTR_NHLEN_VPNV6_GLOBAL || ++ pi->attr->mp_nexthop_len == BGP_ATTR_NHLEN_VPNV6_GLOBAL_AND_LL) { ++ SET_IPADDR_V6(&vtep_ip); ++ IPV6_ADDR_COPY(&vtep_ip.ipaddr_v6, &pi->attr->mp_nexthop_global); ++ } ++ } ++ + if (BGP_DEBUG(evpn_mh, EVPN_MH_ES)) +- zlog_debug("add remote %s es %s evi %u vtep %pI4", ++ zlog_debug("add remote %s es %s evi %u ead-ip %pIA vtep %pIA", + p->prefix.ead_addr.eth_tag ? "ead-es" : "ead-evi", +- esi_to_str(esi, buf, sizeof(buf)), vpn->vni, +- &p->prefix.ead_addr.ip.ipaddr_v4); ++ esi_to_str(esi, buf, sizeof(buf)), vpn->vni, &p->prefix.ead_addr.ip, ++ &vtep_ip); + + es = bgp_evpn_es_find(esi); + if (!es) +@@ -3921,8 +3985,7 @@ enum zclient_send_status bgp_evpn_remote_es_evi_add(struct bgp *bgp, + es_evi = bgp_evpn_es_evi_new(es, vpn); + + ead_es = !!p->prefix.ead_addr.eth_tag; +- ret = bgp_evpn_es_evi_vtep_add(bgp, es_evi, +- p->prefix.ead_addr.ip.ipaddr_v4, ead_es); ++ ret = bgp_evpn_es_evi_vtep_add(bgp, es_evi, vtep_ip, ead_es); + + bgp_evpn_es_evi_remote_info_re_eval(es_evi); + return ret; +@@ -3933,54 +3996,63 @@ enum zclient_send_status bgp_evpn_remote_es_evi_add(struct bgp *bgp, + */ + enum zclient_send_status bgp_evpn_remote_es_evi_del(struct bgp *bgp, + struct bgpevpn *vpn, +- const struct prefix_evpn *p) ++ const struct prefix_evpn *p, ++ struct bgp_path_info *pi) + { + char buf[ESI_STR_LEN]; + struct bgp_evpn_es *es; + struct bgp_evpn_es_evi *es_evi; + bool ead_es; + enum zclient_send_status ret = ZCLIENT_SEND_SUCCESS; ++ struct ipaddr vtep_ip = {}; + + if (!vpn) + /* local EAD-ES need not be sent back to zebra */ + return ret; + ++ /* Extract VTEP IP from BGP path attributes, not from prefix ++ * (prefix in global table has IP zeroed out) ++ */ ++ if (pi && pi->attr) { ++ if (pi->attr->mp_nexthop_len == BGP_ATTR_NHLEN_IPV4 || ++ pi->attr->mp_nexthop_len == BGP_ATTR_NHLEN_VPNV4) { ++ SET_IPADDR_V4(&vtep_ip); ++ vtep_ip.ipaddr_v4 = pi->attr->mp_nexthop_global_in; ++ } else if (pi->attr->mp_nexthop_len == BGP_ATTR_NHLEN_IPV6_GLOBAL || ++ pi->attr->mp_nexthop_len == BGP_ATTR_NHLEN_IPV6_GLOBAL_AND_LL || ++ pi->attr->mp_nexthop_len == BGP_ATTR_NHLEN_VPNV6_GLOBAL || ++ pi->attr->mp_nexthop_len == BGP_ATTR_NHLEN_VPNV6_GLOBAL_AND_LL) { ++ SET_IPADDR_V6(&vtep_ip); ++ IPV6_ADDR_COPY(&vtep_ip.ipaddr_v6, &pi->attr->mp_nexthop_global); ++ } ++ } + if (BGP_DEBUG(evpn_mh, EVPN_MH_ES)) +- zlog_debug( +- "del remote %s es %s evi %u vtep %pI4", +- p->prefix.ead_addr.eth_tag ? "ead-es" : "ead-evi", +- esi_to_str(&p->prefix.ead_addr.esi, buf, sizeof(buf)), +- vpn->vni, &p->prefix.ead_addr.ip.ipaddr_v4); ++ zlog_debug("del remote %s es %s evi %u ead_ip %pIA vtep %pIA", ++ p->prefix.ead_addr.eth_tag ? "ead-es" : "ead-evi", ++ esi_to_str(&p->prefix.ead_addr.esi, buf, sizeof(buf)), vpn->vni, ++ &p->prefix.ead_addr.ip, &vtep_ip); + + es = bgp_evpn_es_find(&p->prefix.ead_addr.esi); + if (!es) { + if (BGP_DEBUG(evpn_mh, EVPN_MH_ES)) +- zlog_debug( +- "del remote %s es %s evi %u vtep %pI4, NO es", +- p->prefix.ead_addr.eth_tag ? "ead-es" +- : "ead-evi", +- esi_to_str(&p->prefix.ead_addr.esi, buf, +- sizeof(buf)), +- vpn->vni, &p->prefix.ead_addr.ip.ipaddr_v4); ++ zlog_debug("del remote %s es %s evi %u vtep %pIA, NO es", ++ p->prefix.ead_addr.eth_tag ? "ead-es" : "ead-evi", ++ esi_to_str(&p->prefix.ead_addr.esi, buf, sizeof(buf)), vpn->vni, ++ &vtep_ip); + return ret; + } + es_evi = bgp_evpn_es_evi_find(es, vpn); + if (!es_evi) { + if (BGP_DEBUG(evpn_mh, EVPN_MH_ES)) +- zlog_debug( +- "del remote %s es %s evi %u vtep %pI4, NO es-evi", +- p->prefix.ead_addr.eth_tag ? "ead-es" +- : "ead-evi", +- esi_to_str(&p->prefix.ead_addr.esi, buf, +- sizeof(buf)), +- vpn->vni, +- &p->prefix.ead_addr.ip.ipaddr_v4); ++ zlog_debug("del remote %s es %s evi %u vtep %pIA, NO es-evi", ++ p->prefix.ead_addr.eth_tag ? "ead-es" : "ead-evi", ++ esi_to_str(&p->prefix.ead_addr.esi, buf, sizeof(buf)), vpn->vni, ++ &vtep_ip); + return ret; + } + + ead_es = !!p->prefix.ead_addr.eth_tag; +- ret = bgp_evpn_es_evi_vtep_del(bgp, es_evi, +- p->prefix.ead_addr.ip.ipaddr_v4, ead_es); ++ ret = bgp_evpn_es_evi_vtep_del(bgp, es_evi, vtep_ip, ead_es); + bgp_evpn_es_evi_remote_info_re_eval(es_evi); + + return ret; +@@ -4496,8 +4568,7 @@ static uint32_t bgp_evpn_es_run_consistency_checks(struct bgp_evpn_es *es) + bgp_evpn_es_evi_set_inconsistent(es_evi); + break; + } +- if (es_vtep->vtep_ip.s_addr != +- evi_vtep->vtep_ip.s_addr) { ++ if (!ipaddr_is_same(&es_vtep->vtep_ip, &evi_vtep->vtep_ip)) { + /* inconsistency detected; set it and move + * to the next evi + */ +diff --git a/bgpd/bgp_evpn_mh.h b/bgpd/bgp_evpn_mh.h +index fd5ed7758..b823615df 100644 +--- a/bgpd/bgp_evpn_mh.h ++++ b/bgpd/bgp_evpn_mh.h +@@ -154,7 +154,7 @@ RB_PROTOTYPE(bgp_es_rb_head, bgp_evpn_es, rb_node, bgp_es_rb_cmp); + /* PE attached to an ES */ + struct bgp_evpn_es_vtep { + struct bgp_evpn_es *es; /* parent ES */ +- struct in_addr vtep_ip; ++ struct ipaddr vtep_ip; + + char vtep_str[INET6_ADDRSTRLEN]; + +@@ -252,7 +252,7 @@ struct bgp_evpn_es_evi { + */ + struct bgp_evpn_es_evi_vtep { + struct bgp_evpn_es_evi *es_evi; /* parent ES-EVI */ +- struct in_addr vtep_ip; ++ struct ipaddr vtep_ip; + + uint32_t flags; + /* Rxed an EAD-per-ES route from the PE */ +@@ -420,10 +420,12 @@ extern int bgp_evpn_local_es_evi_add(struct bgp *bgp, esi_t *esi, vni_t vni); + extern int bgp_evpn_local_es_evi_del(struct bgp *bgp, esi_t *esi, vni_t vni); + extern enum zclient_send_status + bgp_evpn_remote_es_evi_add(struct bgp *bgp, struct bgpevpn *vpn, +- const struct prefix_evpn *p); ++ const struct prefix_evpn *p, ++ struct bgp_path_info *pi); + extern enum zclient_send_status + bgp_evpn_remote_es_evi_del(struct bgp *bgp, struct bgpevpn *vpn, +- const struct prefix_evpn *p); ++ const struct prefix_evpn *p, ++ struct bgp_path_info *pi); + extern void bgp_evpn_mh_init(void); + extern void bgp_evpn_mh_finish(void); + void bgp_evpn_vni_es_init(struct bgpevpn *vpn); +-- +2.43.0 + diff --git a/src/sonic-frr/patch/0045-zebra-EVPNv6-MH-remote-es-parse-ipaddr.patch b/src/sonic-frr/patch/0045-zebra-EVPNv6-MH-remote-es-parse-ipaddr.patch new file mode 100644 index 00000000000..04415a7d5c5 --- /dev/null +++ b/src/sonic-frr/patch/0045-zebra-EVPNv6-MH-remote-es-parse-ipaddr.patch @@ -0,0 +1,27 @@ +From 6778deca1a1ee6da6ef746d98e87b08a4e3000ae Mon Sep 17 00:00:00 2001 +From: Chirag Shah +Date: Wed, 12 Nov 2025 16:13:11 -0800 +Subject: zebra: EVPNv6 MH remote es parse ipaddr + +Signed-off-by: Chirag Shah +(cherry picked from commit 1adc95953ff0144180f6ea2f3a0f918a55009947) +Signed-off-by: Tamer Ahmed + +diff --git a/zebra/zebra_evpn_mh.c b/zebra/zebra_evpn_mh.c +index 7d8e80cbc..53b265349 100644 +--- a/zebra/zebra_evpn_mh.c ++++ b/zebra/zebra_evpn_mh.c +@@ -2575,9 +2575,7 @@ void zebra_evpn_proc_remote_es(ZAPI_HANDLER_ARGS) + s = msg; + + STREAM_GET(&esi, s, sizeof(esi_t)); +- /* Temporary until BGP supports IPv6 VTEP */ +- SET_IPADDR_V4(&vtep_ip); +- STREAM_GET(&vtep_ip.ipaddr_v4.s_addr, s, sizeof(vtep_ip.ipaddr_v4.s_addr)); ++ STREAM_GET_IPADDR(s, &vtep_ip); + + if (hdr->command == ZEBRA_REMOTE_ES_VTEP_ADD) { + uint32_t zapi_flags; +-- +2.43.0 + diff --git a/src/sonic-frr/patch/0046-bgpd-zebra-EVPNv6-MH-esi-v6-aware.patch b/src/sonic-frr/patch/0046-bgpd-zebra-EVPNv6-MH-esi-v6-aware.patch new file mode 100644 index 00000000000..3b1aab83441 --- /dev/null +++ b/src/sonic-frr/patch/0046-bgpd-zebra-EVPNv6-MH-esi-v6-aware.patch @@ -0,0 +1,342 @@ +From fa60bf2540c3e49df55fd550dd25ba0766c83db3 Mon Sep 17 00:00:00 2001 +From: Chirag Shah +Date: Fri, 14 Nov 2025 13:13:29 -0800 +Subject: bgpd,zebra: EVPNv6 MH esi v6 aware + +Signed-off-by: Chirag Shah +Signed-off-by: Jared Mauch +(cherry picked from commit 1f3fd19b60b07ee7de302d1a19540242217749ea) +Signed-off-by: Tamer Ahmed + +diff --git a/bgpd/bgp_evpn_mh.c b/bgpd/bgp_evpn_mh.c +index 6570075da..a21e922c7 100644 +--- a/bgpd/bgp_evpn_mh.c ++++ b/bgpd/bgp_evpn_mh.c +@@ -441,7 +441,7 @@ int bgp_evpn_mh_route_update(struct bgp *bgp, struct bgp_evpn_es *es, + if (remote_pi) { + flog_err( + EC_BGP_ES_INVALID, +- "%u ERROR: local es route for ESI: %s vtep %pI4 also learnt from remote", ++ "%u ERROR: local es route for ESI: %s vtep %pIA also learnt from remote", + bgp->vrf_id, es ? es->esi_str : "Null", + es ? &es->originator_ip : NULL); + return -1; +@@ -706,9 +706,15 @@ static int bgp_evpn_type4_route_update(struct bgp *bgp, + + /* Build path-attribute for this route. */ + bgp_attr_default_set(&attr, bgp, BGP_ORIGIN_IGP); +- attr.nexthop = es->originator_ip; +- attr.mp_nexthop_global_in = es->originator_ip; +- attr.mp_nexthop_len = BGP_ATTR_NHLEN_IPV4; ++ /* v4 vtep use v4 attr.nexthop, v6 vtep use mp_nexthop_global */ ++ if (IS_IPADDR_V4(&es->originator_ip)) { ++ attr.nexthop = es->originator_ip.ipaddr_v4; ++ attr.mp_nexthop_global_in = es->originator_ip.ipaddr_v4; ++ attr.mp_nexthop_len = BGP_ATTR_NHLEN_IPV4; ++ } else if (IS_IPADDR_V6(&es->originator_ip)) { ++ IPV6_ADDR_COPY(&attr.mp_nexthop_global, &es->originator_ip.ipaddr_v6); ++ attr.mp_nexthop_len = BGP_ATTR_NHLEN_IPV6_GLOBAL; ++ } + + /* Set up extended community. */ + bgp_evpn_type4_route_extcomm_build(es, &attr); +@@ -778,9 +784,9 @@ int bgp_evpn_type4_route_process(struct peer *peer, afi_t afi, safi_t safi, + { + esi_t esi; + uint8_t ipaddr_len; +- struct in_addr vtep_ip; ++ struct ipaddr vtep_ip = {}; + struct prefix_rd prd; +- struct prefix_evpn p; ++ struct prefix_evpn p = {}; + + /* Type-4 route should be either 23 or 35 bytes + * RD (8), ESI (10), ip-len (1), ip (4 or 16) +@@ -815,12 +821,15 @@ int bgp_evpn_type4_route_process(struct peer *peer, afi_t afi, safi_t safi, + } + + if (ipaddr_len == IPV4_MAX_BITLEN) { +- memcpy(&vtep_ip, pfx, IPV4_MAX_BYTELEN); ++ SET_IPADDR_V4(&vtep_ip); ++ memcpy(&vtep_ip.ipaddr_v4, pfx, IPV4_MAX_BYTELEN); ++ } else if (ipaddr_len == IPV6_MAX_BITLEN) { ++ SET_IPADDR_V6(&vtep_ip); ++ IPV6_ADDR_COPY(&vtep_ip.ipaddr_v6, (struct in6_addr *)pfx); + } else { +- flog_err( +- EC_BGP_EVPN_ROUTE_INVALID, +- "%u:%s - Rx EVPN Type-4 NLRI with unsupported IP address length %d", +- peer->bgp->vrf_id, peer->host, ipaddr_len); ++ flog_err(EC_BGP_EVPN_ROUTE_INVALID, ++ "%u:%s - Rx EVPN Type-4 NLRI with unsupported IP address length %d", ++ peer->bgp->vrf_id, peer->host, ipaddr_len); + return -1; + } + +@@ -1023,9 +1032,15 @@ static int bgp_evpn_type1_route_update(struct bgp *bgp, struct bgp_evpn_es *es, + + /* Build path-attribute for this route. */ + bgp_attr_default_set(&attr, bgp, BGP_ORIGIN_IGP); +- attr.nexthop = es->originator_ip; +- attr.mp_nexthop_global_in = es->originator_ip; +- attr.mp_nexthop_len = BGP_ATTR_NHLEN_IPV4; ++ if (IS_IPADDR_V4(&es->originator_ip)) { ++ attr.nexthop = es->originator_ip.ipaddr_v4; ++ attr.mp_nexthop_global_in = es->originator_ip.ipaddr_v4; ++ attr.mp_nexthop_len = BGP_ATTR_NHLEN_IPV4; ++ } else if (IS_IPADDR_V6(&es->originator_ip)) { ++ IPV6_ADDR_COPY(&attr.mp_nexthop_global, &es->originator_ip.ipaddr_v6); ++ attr.mp_nexthop_len = BGP_ATTR_NHLEN_IPV6_GLOBAL; ++ } ++ + + if (vpn) { + /* EAD-EVI route update */ +@@ -1044,7 +1059,7 @@ static int bgp_evpn_type1_route_update(struct bgp *bgp, struct bgp_evpn_es *es, + if (ret != 0) + flog_err( + EC_BGP_ES_INVALID, +- "%u Failed to update EAD-EVI route ESI: %s VNI %u VTEP %pI4", ++ "%u Failed to update EAD-EVI route ESI: %s VNI %u VTEP %pIA", + bgp->vrf_id, es->esi_str, vpn->vni, + &es->originator_ip); + global_rd = &vpn->prd; +@@ -1066,7 +1081,7 @@ static int bgp_evpn_type1_route_update(struct bgp *bgp, struct bgp_evpn_es *es, + if (ret != 0) { + flog_err( + EC_BGP_ES_INVALID, +- "%u ERROR: Failed to updated EAD-ES route ESI: %s VTEP %pI4", ++ "%u ERROR: Failed to updated EAD-ES route ESI: %s VTEP %pIA", + bgp->vrf_id, es->esi_str, &es->originator_ip); + } + global_rd = &es_frag->prd; +@@ -1261,7 +1276,7 @@ int bgp_evpn_type1_route_process(struct peer *peer, afi_t afi, safi_t safi, + esi_t esi; + uint32_t eth_tag; + mpls_label_t label[BGP_MAX_LABELS] = {}; +- struct in_addr vtep_ip; ++ struct ipaddr vtep_ip = {}; + struct prefix_evpn p; + + if (psize != BGP_EVPN_TYPE1_PSIZE) { +@@ -1291,7 +1306,8 @@ int bgp_evpn_type1_route_process(struct peer *peer, afi_t afi, safi_t safi, + /* EAD route prefix doesn't include the nexthop in the global + * table + */ +- vtep_ip.s_addr = INADDR_ANY; ++ vtep_ip.ipa_type = IPADDR_V4; ++ vtep_ip.ipaddr_v4.s_addr = INADDR_ANY; + build_evpn_type1_prefix(&p, eth_tag, &esi, vtep_ip); + /* Process the route. */ + if (attr) { +@@ -1404,8 +1420,7 @@ static struct bgp_evpn_es_vtep *bgp_evpn_es_vtep_new(struct bgp_evpn_es *es, str + + es_vtep->es = es; + es_vtep->vtep_ip = vtep_ip; +- inet_ntop(AF_INET, &es_vtep->vtep_ip, es_vtep->vtep_str, +- sizeof(es_vtep->vtep_str)); ++ ipaddr2str(&es_vtep->vtep_ip, es_vtep->vtep_str, sizeof(es_vtep->vtep_str)); + listnode_init(&es_vtep->es_listnode, es_vtep); + listnode_add_sort(es->es_vtep_list, &es_vtep->es_listnode); + +@@ -2458,8 +2473,7 @@ int bgp_evpn_local_es_del(struct bgp *bgp, esi_t *esi) + /* Handle device to ES id association. Results in the creation of a local + * ES. + */ +-int bgp_evpn_local_es_add(struct bgp *bgp, esi_t *esi, +- struct in_addr originator_ip, bool oper_up, ++int bgp_evpn_local_es_add(struct bgp *bgp, esi_t *esi, struct ipaddr originator_ip, bool oper_up, + uint16_t df_pref, bool bypass) + { + struct bgp_evpn_es *es; +@@ -2475,9 +2489,8 @@ int bgp_evpn_local_es_add(struct bgp *bgp, esi_t *esi, + es = bgp_evpn_es_new(bgp, esi); + + if (BGP_DEBUG(evpn_mh, EVPN_MH_ES)) +- zlog_debug("add local es %s orig-ip %pI4 df_pref %u %s", +- es->esi_str, &originator_ip, df_pref, +- bypass ? "bypass" : ""); ++ zlog_debug("add local es %s orig-ip %pIA df_pref %u %s", es->esi_str, ++ &originator_ip, df_pref, bypass ? "bypass" : ""); + + es->originator_ip = originator_ip; + if (df_pref != es->df_pref) { +@@ -3546,7 +3559,7 @@ bgp_evpn_es_evi_vtep_re_eval_active(struct bgp *bgp, + return ret; + + if (BGP_DEBUG(evpn_mh, EVPN_MH_ES)) +- zlog_debug("es %s evi %u vtep %pI4 %s", ++ zlog_debug("es %s evi %u vtep %pIA %s", + evi_vtep->es_evi->es->esi_str, + evi_vtep->es_evi->vpn->vni, &evi_vtep->vtep_ip, + new_active ? "active" : "inactive"); +@@ -3582,7 +3595,7 @@ bgp_evpn_es_evi_vtep_add(struct bgp *bgp, struct bgp_evpn_es_evi *es_evi, + evi_vtep = bgp_evpn_es_evi_vtep_new(es_evi, vtep_ip); + + if (BGP_DEBUG(evpn_mh, EVPN_MH_ES)) +- zlog_debug("add es %s evi %u vtep %pI4 %s", ++ zlog_debug("add es %s evi %u vtep %pIA %s", + evi_vtep->es_evi->es->esi_str, + evi_vtep->es_evi->vpn->vni, &evi_vtep->vtep_ip, + ead_es ? "ead_es" : "ead_evi"); +diff --git a/bgpd/bgp_evpn_mh.h b/bgpd/bgp_evpn_mh.h +index b823615df..5c4579754 100644 +--- a/bgpd/bgp_evpn_mh.h ++++ b/bgpd/bgp_evpn_mh.h +@@ -97,7 +97,7 @@ struct bgp_evpn_es { + struct bgp_evpn_es_frag *es_base_frag; + + /* [EVPNES_LOCAL] originator ip address */ +- struct in_addr originator_ip; ++ struct ipaddr originator_ip; + + /* [EVPNES_LOCAL] Route table for EVPN routes for this ESI- + * - Type-4 local and remote routes +@@ -412,9 +412,8 @@ int bgp_evpn_type1_route_process(struct peer *peer, afi_t afi, safi_t safi, + int bgp_evpn_type4_route_process(struct peer *peer, afi_t afi, safi_t safi, + struct attr *attr, uint8_t *pfx, int psize, + uint32_t addpath_id); +-extern int bgp_evpn_local_es_add(struct bgp *bgp, esi_t *esi, +- struct in_addr originator_ip, bool oper_up, +- uint16_t df_pref, bool bypass); ++extern int bgp_evpn_local_es_add(struct bgp *bgp, esi_t *esi, struct ipaddr originator_ip, ++ bool oper_up, uint16_t df_pref, bool bypass); + extern int bgp_evpn_local_es_del(struct bgp *bgp, esi_t *esi); + extern int bgp_evpn_local_es_evi_add(struct bgp *bgp, esi_t *esi, vni_t vni); + extern int bgp_evpn_local_es_evi_del(struct bgp *bgp, esi_t *esi, vni_t vni); +diff --git a/bgpd/bgp_evpn_private.h b/bgpd/bgp_evpn_private.h +index 4c500d1dc..abc1fde3c 100644 +--- a/bgpd/bgp_evpn_private.h ++++ b/bgpd/bgp_evpn_private.h +@@ -519,32 +519,41 @@ static inline void build_evpn_type3_prefix(struct prefix_evpn *p, + p->prefix.imet_addr.ip = *originator_ip; + } + +-static inline void build_evpn_type4_prefix(struct prefix_evpn *p, +- esi_t *esi, +- struct in_addr originator_ip) ++static inline void build_evpn_type4_prefix(struct prefix_evpn *p, esi_t *esi, ++ struct ipaddr originator_ip) + { + memset(p, 0, sizeof(struct prefix_evpn)); + p->family = AF_EVPN; + p->prefixlen = EVPN_ROUTE_PREFIXLEN; + p->prefix.route_type = BGP_EVPN_ES_ROUTE; +- p->prefix.es_addr.ip_prefix_length = IPV4_MAX_BITLEN; +- p->prefix.es_addr.ip.ipa_type = IPADDR_V4; +- p->prefix.es_addr.ip.ipaddr_v4 = originator_ip; ++ /* Set IP prefix length and address based on originator_ip type */ ++ p->prefix.es_addr.ip_prefix_length = IS_IPADDR_V4(&originator_ip) ? IPV4_MAX_BITLEN ++ : IPV6_MAX_BITLEN; ++ p->prefix.es_addr.ip = originator_ip; + memcpy(&p->prefix.es_addr.esi, esi, sizeof(esi_t)); + } + +-static inline void build_evpn_type1_prefix(struct prefix_evpn *p, +- uint32_t eth_tag, +- esi_t *esi, +- struct in_addr originator_ip) ++static inline void build_evpn_type1_prefix(struct prefix_evpn *p, uint32_t eth_tag, esi_t *esi, ++ struct ipaddr originator_ip) + { + memset(p, 0, sizeof(struct prefix_evpn)); + p->family = AF_EVPN; + p->prefixlen = EVPN_ROUTE_PREFIXLEN; + p->prefix.route_type = BGP_EVPN_AD_ROUTE; + p->prefix.ead_addr.eth_tag = eth_tag; +- p->prefix.ead_addr.ip.ipa_type = IPADDR_V4; +- p->prefix.ead_addr.ip.ipaddr_v4 = originator_ip; ++ /* Set IP address and type based on originator_ip */ ++ if (IS_IPADDR_V4(&originator_ip)) { ++ SET_IPADDR_V4(&p->prefix.ead_addr.ip); ++ IPV4_ADDR_COPY(&p->prefix.ead_addr.ip.ipaddr_v4, &originator_ip.ipaddr_v4); ++ } else if (IS_IPADDR_V6(&originator_ip)) { ++ SET_IPADDR_V6(&p->prefix.ead_addr.ip); ++ IPV6_ADDR_COPY(&p->prefix.ead_addr.ip.ipaddr_v6, &originator_ip.ipaddr_v6); ++ } else { ++ /* IPADDR_NONE - should not happen, but handle gracefully */ ++ p->prefix.ead_addr.ip.ipa_type = IPADDR_NONE; ++ memset(&p->prefix.ead_addr.ip.ipaddr_v4, 0, ++ sizeof(p->prefix.ead_addr.ip.ipaddr_v4)); ++ } + memcpy(&p->prefix.ead_addr.esi, esi, sizeof(esi_t)); + } + +diff --git a/bgpd/bgp_evpn_vty.c b/bgpd/bgp_evpn_vty.c +index 6d5f5b81d..070e1f99e 100644 +--- a/bgpd/bgp_evpn_vty.c ++++ b/bgpd/bgp_evpn_vty.c +@@ -5994,7 +5994,7 @@ DEFPY_HIDDEN(test_es_add, + int ret = 0; + esi_t esi; + struct bgp *bgp; +- struct in_addr vtep_ip; ++ struct ipaddr vtep_ip = {}; + bool oper_up; + + bgp = bgp_get_evpn(); +@@ -6019,7 +6019,8 @@ DEFPY_HIDDEN(test_es_add, + oper_up = true; + else + oper_up = false; +- vtep_ip = bgp->router_id; ++ SET_IPADDR_V4(&vtep_ip); ++ vtep_ip.ipaddr_v4 = bgp->router_id; + + ret = bgp_evpn_local_es_add(bgp, &esi, vtep_ip, oper_up, + EVPN_MH_DF_PREF_MIN, false); +diff --git a/bgpd/bgp_zebra.c b/bgpd/bgp_zebra.c +index ab1af5aa0..098c7606c 100644 +--- a/bgpd/bgp_zebra.c ++++ b/bgpd/bgp_zebra.c +@@ -3165,7 +3165,7 @@ static int bgp_zebra_process_local_es_add(ZAPI_CALLBACK_ARGS) + struct bgp *bgp = NULL; + struct stream *s = NULL; + char buf[ESI_STR_LEN]; +- struct in_addr originator_ip; ++ struct ipaddr originator_ip = { .ipa_type = IPADDR_V4 }; + uint8_t active; + uint8_t bypass; + uint16_t df_pref; +@@ -3176,16 +3176,19 @@ static int bgp_zebra_process_local_es_add(ZAPI_CALLBACK_ARGS) + + s = zclient->ibuf; + stream_get(&esi, s, sizeof(esi_t)); +- originator_ip.s_addr = stream_get_ipv4(s); ++ if (!stream_get_ipaddr(s, &originator_ip)) { ++ flog_err(EC_BGP_EVPN_ROUTE_INVALID, "%u: Failed to read originator IP for ESI %s", ++ vrf_id, esi_to_str(&esi, buf, sizeof(buf))); ++ return -1; ++ } + active = stream_getc(s); + df_pref = stream_getw(s); + bypass = stream_getc(s); + + if (BGP_DEBUG(zebra, ZEBRA)) +- zlog_debug( +- "Rx add ESI %s originator-ip %pI4 active %u df_pref %u %s", +- esi_to_str(&esi, buf, sizeof(buf)), &originator_ip, +- active, df_pref, bypass ? "bypass" : ""); ++ zlog_debug("Rx add ESI %s originator-ip %pIA active %u df_pref %u %s", ++ esi_to_str(&esi, buf, sizeof(buf)), &originator_ip, active, df_pref, ++ bypass ? "bypass" : ""); + + frrtrace(5, frr_bgp, evpn_mh_local_es_add_zrecv, &esi, originator_ip, + active, bypass, df_pref); +diff --git a/zebra/zebra_evpn_mh.c b/zebra/zebra_evpn_mh.c +index 53b265349..546268229 100644 +--- a/zebra/zebra_evpn_mh.c ++++ b/zebra/zebra_evpn_mh.c +@@ -1964,8 +1964,7 @@ static int zebra_evpn_es_send_add_to_client(struct zebra_evpn_es *es) + + zclient_create_header(s, ZEBRA_LOCAL_ES_ADD, zebra_vrf_get_evpn_id()); + stream_put(s, &es->esi, sizeof(esi_t)); +- /* TODO_V6_VTEP FIXME v6 support */ +- stream_put_ipv4(s, zmh_info->es_originator_ip.ipaddr_v4.s_addr); ++ stream_put_ipaddr(s, &zmh_info->es_originator_ip); + oper_up = !!(es->flags & ZEBRA_EVPNES_OPER_UP); + stream_putc(s, oper_up); + stream_putw(s, es->df_pref); +-- +2.43.0 + diff --git a/src/sonic-frr/patch/0047-bgpd-EVPNv6-check-vni-routes-nh-attr-v6-aware.patch b/src/sonic-frr/patch/0047-bgpd-EVPNv6-check-vni-routes-nh-attr-v6-aware.patch new file mode 100644 index 00000000000..1224db043b5 --- /dev/null +++ b/src/sonic-frr/patch/0047-bgpd-EVPNv6-check-vni-routes-nh-attr-v6-aware.patch @@ -0,0 +1,49 @@ +From fb94253035dd18118564561cd62c9ddfe56b1ea3 Mon Sep 17 00:00:00 2001 +From: Jared Mauch +Date: Sun, 16 Nov 2025 16:15:35 -0800 +Subject: bgpd: EVPNv6 check vni routes nh attr v6 aware + +Signed-off-by: Jared Mauch +(cherry picked from commit 7fa07cd6f4b9ea6eb4077855836ce214f26af2a3) +Signed-off-by: Tamer Ahmed + +diff --git a/bgpd/bgp_evpn.c b/bgpd/bgp_evpn.c +index e80f5f991..4199ac33a 100644 +--- a/bgpd/bgp_evpn.c ++++ b/bgpd/bgp_evpn.c +@@ -3379,8 +3379,31 @@ static int install_evpn_route_entry_in_vni_common( + bgp_path_info_restore(dest, pi); + + /* Mark if nexthop has changed. */ +- if (!IPV4_ADDR_SAME(&pi->attr->nexthop, &attr_new->nexthop)) ++ if (pi->attr->mp_nexthop_len != attr_new->mp_nexthop_len) { ++ /* Nexthop address family changed */ + SET_FLAG(pi->flags, BGP_PATH_IGP_CHANGED); ++ } else if (BGP_ATTR_MP_NEXTHOP_LEN_IP6(pi->attr)) { ++ /* IPv6 nexthop */ ++ if (!IPV6_ADDR_SAME(&pi->attr->mp_nexthop_global, ++ &attr_new->mp_nexthop_global)) ++ SET_FLAG(pi->flags, BGP_PATH_IGP_CHANGED); ++ /* Also check link-local nexthop if present */ ++ else if ((pi->attr->mp_nexthop_len == BGP_ATTR_NHLEN_IPV6_GLOBAL_AND_LL || ++ pi->attr->mp_nexthop_len == BGP_ATTR_NHLEN_VPNV6_GLOBAL_AND_LL) && ++ !IPV6_ADDR_SAME(&pi->attr->mp_nexthop_local, ++ &attr_new->mp_nexthop_local)) ++ SET_FLAG(pi->flags, BGP_PATH_IGP_CHANGED); ++ } else if (pi->attr->mp_nexthop_len == BGP_ATTR_NHLEN_IPV4 || ++ pi->attr->mp_nexthop_len == BGP_ATTR_NHLEN_VPNV4) { ++ /* IPv4 nexthop in mp_nexthop_global_in */ ++ if (!IPV4_ADDR_SAME(&pi->attr->mp_nexthop_global_in, ++ &attr_new->mp_nexthop_global_in)) ++ SET_FLAG(pi->flags, BGP_PATH_IGP_CHANGED); ++ } else { ++ /* IPv4 nexthop in nexthop field */ ++ if (!IPV4_ADDR_SAME(&pi->attr->nexthop, &attr_new->nexthop)) ++ SET_FLAG(pi->flags, BGP_PATH_IGP_CHANGED); ++ } + + old_local_es = bgp_evpn_attr_is_local_es(pi->attr); + new_local_es = bgp_evpn_attr_is_local_es(attr_new); +-- +2.43.0 + diff --git a/src/sonic-frr/patch/0048-bgpd-EVPNv6-path-nh-link-check-v4-vpn4-for-len.patch b/src/sonic-frr/patch/0048-bgpd-EVPNv6-path-nh-link-check-v4-vpn4-for-len.patch new file mode 100644 index 00000000000..4f786755842 --- /dev/null +++ b/src/sonic-frr/patch/0048-bgpd-EVPNv6-path-nh-link-check-v4-vpn4-for-len.patch @@ -0,0 +1,31 @@ +From 6910baa7bb67af122758dcfde89c09e5af08a5da Mon Sep 17 00:00:00 2001 +From: Jared Mauch +Date: Mon, 24 Nov 2025 16:25:56 -0800 +Subject: bgpd: EVPNv6 path nh link check v4 vpn4 for len + +Signed-off-by: Chirag Shah +Signed-off-by: Jared Mauch +(cherry picked from commit a867b4a08150d03e83784cdf1df35705cb409b19) +Signed-off-by: Tamer Ahmed + +diff --git a/bgpd/bgp_evpn_mh.c b/bgpd/bgp_evpn_mh.c +index a21e922c7..2bbeab08f 100644 +--- a/bgpd/bgp_evpn_mh.c ++++ b/bgpd/bgp_evpn_mh.c +@@ -4992,7 +4992,12 @@ static void bgp_evpn_path_nh_link(struct bgp *bgp_vrf, struct bgp_path_info *pi) + sizeof(ip.ipaddr_v6)); + } else { + SET_IPADDR_V4(&ip); +- memcpy(&ip.ipaddr_v4, &pi->attr->nexthop, sizeof(ip.ipaddr_v4)); ++ if (pi->attr->mp_nexthop_len == BGP_ATTR_NHLEN_IPV4 || ++ pi->attr->mp_nexthop_len == BGP_ATTR_NHLEN_VPNV4) ++ memcpy(&ip.ipaddr_v4, &pi->attr->mp_nexthop_global_in, ++ sizeof(ip.ipaddr_v4)); ++ else ++ memcpy(&ip.ipaddr_v4, &pi->attr->nexthop, sizeof(ip.ipaddr_v4)); + } + + nh = bgp_evpn_nh_find(bgp_vrf, &ip); +-- +2.43.0 + diff --git a/src/sonic-frr/patch/0049-lib-EVPNv6-MH-increase-pfx-string-len-for-v6-address.patch b/src/sonic-frr/patch/0049-lib-EVPNv6-MH-increase-pfx-string-len-for-v6-address.patch new file mode 100644 index 00000000000..061062ddb51 --- /dev/null +++ b/src/sonic-frr/patch/0049-lib-EVPNv6-MH-increase-pfx-string-len-for-v6-address.patch @@ -0,0 +1,39 @@ +From 31dfff54a70b6b4e3ad7a87c17b28d2adbd1d860 Mon Sep 17 00:00:00 2001 +From: Chirag Shah +Date: Mon, 29 Sep 2025 12:28:14 -0700 +Subject: lib: EVPNv6 MH increase pfx string len for v6 address + +The prefixlen is used for debug and cli purpose, +EVPNv6 add ipv6 address in EVPN prefix which spill over +current prefixlen limit. + +Before: +2025/09/29 19:02:12.474562 BGP: [WTJQB-H1EZQ] default (0): Installing EVPN +[1]:[4294967295]:[03:44:38:39:ff:ff:01:00:00:01]:[128]:[2001:c001:ff:f00d::4]:[ <<<< +route in VNI 1000 IP/MAC table + +After: +2025/09/29 19:26:13.025185 BGP: [WTJQB-H1EZQ] default (0): Installing EVPN +[1]:[4294967295]:[03:44:38:39:ff:ff:01:00:00:01]:[128]:[2001:c001:ff:f00d::4]:[0] +route in VNI 1000 IP/MAC table + +Signed-off-by: Chirag Shah +(cherry picked from commit dc32e11456df4b93a1767ca68e82d313c91639ed) +Signed-off-by: Tamer Ahmed + +diff --git a/lib/prefix.h b/lib/prefix.h +index cf6c488af..4f876c758 100644 +--- a/lib/prefix.h ++++ b/lib/prefix.h +@@ -320,7 +320,7 @@ union prefixconstptr { + #endif /* INET6_BUFSIZ */ + + /* Maximum string length of the result of prefix2str */ +-#define PREFIX_STRLEN 80 ++#define PREFIX_STRLEN 84 + + /* + * Longest possible length of a (S,G) string is 82 bytes +-- +2.43.0 + diff --git a/src/sonic-frr/patch/0050-bgpd-EVPNv6-MH-type-1-vni-copy-v6-aware.patch b/src/sonic-frr/patch/0050-bgpd-EVPNv6-MH-type-1-vni-copy-v6-aware.patch new file mode 100644 index 00000000000..e29cc1c88b6 --- /dev/null +++ b/src/sonic-frr/patch/0050-bgpd-EVPNv6-MH-type-1-vni-copy-v6-aware.patch @@ -0,0 +1,82 @@ +From 30ff6e6d236adf8c5a356f4140b547363574e8a7 Mon Sep 17 00:00:00 2001 +From: Chirag Shah +Date: Sun, 16 Nov 2025 16:37:47 -0800 +Subject: bgpd: EVPNv6 MH type-1 vni copy v6 aware + +Signed-off-by: Chirag Shah +Signed-off-by: Jared Mauch +(cherry picked from commit f2f29e9d9cd5355cbb705d2601695e854900165e) +Signed-off-by: Tamer Ahmed + +diff --git a/bgpd/bgp_evpn.c b/bgpd/bgp_evpn.c +index 4199ac33a..f7ec4e9a9 100644 +--- a/bgpd/bgp_evpn.c ++++ b/bgpd/bgp_evpn.c +@@ -792,8 +792,7 @@ struct bgp_dest *bgp_evpn_vni_ip_node_get(struct bgp_table *const table, + /* prefix in the global table doesn't include the VTEP-IP so + * we need to create a different copy for the VNI + */ +- evpn_type1_prefix_vni_ip_copy(&vni_p, evp, +- parent_pi->attr->nexthop); ++ evpn_type1_prefix_vni_ip_copy(&vni_p, evp, parent_pi->attr); + evp = &vni_p; + } else if (evp->prefix.route_type == BGP_EVPN_MAC_IP_ROUTE) { + /* Only MAC-IP should go into this table, not mac-only */ +@@ -823,8 +822,7 @@ bgp_evpn_vni_ip_node_lookup(const struct bgp_table *const table, + /* prefix in the global table doesn't include the VTEP-IP so + * we need to create a different copy for the VNI + */ +- evpn_type1_prefix_vni_ip_copy(&vni_p, evp, +- parent_pi->attr->nexthop); ++ evpn_type1_prefix_vni_ip_copy(&vni_p, evp, parent_pi->attr); + evp = &vni_p; + } else if (evp->prefix.route_type == BGP_EVPN_MAC_IP_ROUTE) { + /* Only MAC-IP should go into this table, not mac-only */ +@@ -4434,8 +4432,7 @@ static int bgp_evpn_install_uninstall_table(struct bgp *bgp, afi_t afi, + * we need to create a different copy for the VNI + */ + if (evp->prefix.route_type == BGP_EVPN_AD_ROUTE) +- evp = evpn_type1_prefix_vni_ip_copy(&ad_evp, evp, +- attr->nexthop); ++ evp = evpn_type1_prefix_vni_ip_copy(&ad_evp, evp, attr); + + ecom = bgp_attr_get_ecommunity(attr); + if (!ecom || !ecom->size) +diff --git a/bgpd/bgp_evpn_private.h b/bgpd/bgp_evpn_private.h +index abc1fde3c..eebaeb42a 100644 +--- a/bgpd/bgp_evpn_private.h ++++ b/bgpd/bgp_evpn_private.h +@@ -572,11 +572,27 @@ static inline void evpn_type1_prefix_global_copy(struct prefix_evpn *global_p, + static inline struct prefix_evpn * + evpn_type1_prefix_vni_ip_copy(struct prefix_evpn *vni_p, + const struct prefix_evpn *global_p, +- struct in_addr originator_ip) ++ const struct attr *attr) + { + memcpy(vni_p, global_p, sizeof(*vni_p)); +- vni_p->prefix.ead_addr.ip.ipa_type = IPADDR_V4; +- vni_p->prefix.ead_addr.ip.ipaddr_v4 = originator_ip; ++ /* Extract originator IP from attr based on nexthop length */ ++ if (attr->mp_nexthop_len == BGP_ATTR_NHLEN_IPV4 || ++ attr->mp_nexthop_len == BGP_ATTR_NHLEN_VPNV4) { ++ /* IPv4 nexthop */ ++ SET_IPADDR_V4(&vni_p->prefix.ead_addr.ip); ++ IPV4_ADDR_COPY(&vni_p->prefix.ead_addr.ip.ipaddr_v4, &attr->nexthop); ++ } else if (attr->mp_nexthop_len == BGP_ATTR_NHLEN_IPV6_GLOBAL || ++ attr->mp_nexthop_len == BGP_ATTR_NHLEN_IPV6_GLOBAL_AND_LL || ++ attr->mp_nexthop_len == BGP_ATTR_NHLEN_VPNV6_GLOBAL || ++ attr->mp_nexthop_len == BGP_ATTR_NHLEN_VPNV6_GLOBAL_AND_LL) { ++ /* IPv6 nexthop - use global address */ ++ SET_IPADDR_V6(&vni_p->prefix.ead_addr.ip); ++ IPV6_ADDR_COPY(&vni_p->prefix.ead_addr.ip.ipaddr_v6, &attr->mp_nexthop_global); ++ } else { ++ /* IPADDR_NONE - should not happen, but handle gracefully */ ++ vni_p->prefix.ead_addr.ip.ipa_type = IPADDR_NONE; ++ memset(&vni_p->prefix.ead_addr.ip, 0, sizeof(vni_p->prefix.ead_addr.ip)); ++ } + + return vni_p; + } +-- +2.43.0 + diff --git a/src/sonic-frr/patch/0051-bgpd-EVPNv6-MH-type-1-global-copy-v6-aware.patch b/src/sonic-frr/patch/0051-bgpd-EVPNv6-MH-type-1-global-copy-v6-aware.patch new file mode 100644 index 00000000000..3292b1425cd --- /dev/null +++ b/src/sonic-frr/patch/0051-bgpd-EVPNv6-MH-type-1-global-copy-v6-aware.patch @@ -0,0 +1,39 @@ +From 64e64d5185a9b7d2e246b5ca03ee22a6fe185e7f Mon Sep 17 00:00:00 2001 +From: Chirag Shah +Date: Sat, 8 Nov 2025 16:41:45 -0800 +Subject: bgpd: EVPNv6 MH type-1 global copy v6 aware + +Signed-off-by: Chirag Shah +(cherry picked from commit 10a76d82d7f75b203de7a3d5393797d73eabf8c7) +Signed-off-by: Tamer Ahmed + +diff --git a/bgpd/bgp_evpn_private.h b/bgpd/bgp_evpn_private.h +index eebaeb42a..ec5d2db76 100644 +--- a/bgpd/bgp_evpn_private.h ++++ b/bgpd/bgp_evpn_private.h +@@ -561,8 +561,20 @@ static inline void evpn_type1_prefix_global_copy(struct prefix_evpn *global_p, + const struct prefix_evpn *vni_p) + { + memcpy(global_p, vni_p, sizeof(*global_p)); +- global_p->prefix.ead_addr.ip.ipa_type = 0; +- global_p->prefix.ead_addr.ip.ipaddr_v4.s_addr = INADDR_ANY; ++ /* EAD prefix in global table doesn't include VTEP IP - zero it out ++ * but preserve ipa_type to maintain address family information ++ */ ++ if (IS_IPADDR_V4(&vni_p->prefix.ead_addr.ip)) { ++ global_p->prefix.ead_addr.ip.ipa_type = IPADDR_V4; ++ global_p->prefix.ead_addr.ip.ipaddr_v4.s_addr = INADDR_ANY; ++ } else if (IS_IPADDR_V6(&vni_p->prefix.ead_addr.ip)) { ++ global_p->prefix.ead_addr.ip.ipa_type = IPADDR_V6; ++ memset(&global_p->prefix.ead_addr.ip.ipaddr_v6, 0, sizeof(struct in6_addr)); ++ } else { ++ global_p->prefix.ead_addr.ip.ipa_type = IPADDR_NONE; ++ /* ipa_type is IPADDR_NONE, zero everything */ ++ memset(&global_p->prefix.ead_addr.ip, 0, sizeof(struct ipaddr)); ++ } + global_p->prefix.ead_addr.frag_id = 0; + } + +-- +2.43.0 + diff --git a/src/sonic-frr/patch/0052-bgpd-EVPNv6-MH-es-show-cmd-display-v6-vtep.patch b/src/sonic-frr/patch/0052-bgpd-EVPNv6-MH-es-show-cmd-display-v6-vtep.patch new file mode 100644 index 00000000000..d93642e61ac --- /dev/null +++ b/src/sonic-frr/patch/0052-bgpd-EVPNv6-MH-es-show-cmd-display-v6-vtep.patch @@ -0,0 +1,107 @@ +From 96b9355230c701e3d25889f247c5e6c79508e360 Mon Sep 17 00:00:00 2001 +From: Chirag Shah +Date: Thu, 20 Nov 2025 20:11:39 -0800 +Subject: bgpd: EVPNv6 MH es show cmd display v6 vtep + +Signed-off-by: Chirag Shah +(cherry picked from commit 5b8445dd36acf500e3662cd279481665d3cb042c) +Signed-off-by: Tamer Ahmed + +diff --git a/bgpd/bgp_evpn_mh.c b/bgpd/bgp_evpn_mh.c +index 2bbeab08f..ad21b7557 100644 +--- a/bgpd/bgp_evpn_mh.c ++++ b/bgpd/bgp_evpn_mh.c +@@ -2562,7 +2562,7 @@ static char *bgp_evpn_es_vteps_str(char *vtep_str, struct bgp_evpn_es *es, + struct listnode *node; + struct bgp_evpn_es_vtep *es_vtep; + bool first = true; +- char ip_buf[INET_ADDRSTRLEN]; ++ char ip_buf[INET6_ADDRSTRLEN]; + + vtep_str[0] = '\0'; + for (ALL_LIST_ELEMENTS_RO(es->es_vtep_list, node, es_vtep)) { +@@ -2579,10 +2579,8 @@ static char *bgp_evpn_es_vteps_str(char *vtep_str, struct bgp_evpn_es *es, + first = false; + else + strlcat(vtep_str, ",", vtep_str_size); +- strlcat(vtep_str, +- inet_ntop(AF_INET, &es_vtep->vtep_ip, ip_buf, +- sizeof(ip_buf)), +- vtep_str_size); ++ ipaddr2str(&es_vtep->vtep_ip, ip_buf, sizeof(ip_buf)); ++ strlcat(vtep_str, ip_buf, vtep_str_size); + strlcat(vtep_str, "(", vtep_str_size); + strlcat(vtep_str, vtep_flag_str, vtep_str_size); + strlcat(vtep_str, ")", vtep_str_size); +@@ -2600,8 +2598,7 @@ static void bgp_evpn_es_json_vtep_fill(json_object *json_vteps, + + json_vtep_entry = json_object_new_object(); + +- json_object_string_addf(json_vtep_entry, "vtep_ip", "%pI4", +- &es_vtep->vtep_ip); ++ json_object_string_addf(json_vtep_entry, "vtep_ip", "%pIA", &es_vtep->vtep_ip); + if (CHECK_FLAG(es_vtep->flags, + (BGP_EVPNES_VTEP_ESR | BGP_EVPNES_VTEP_ACTIVE))) { + json_flags = json_object_new_array(); +@@ -2642,8 +2639,7 @@ static void bgp_evpn_es_vteps_show_detail(struct vty *vty, + if (!strlen(vtep_flag_str)) + strlcat(vtep_flag_str, "-", sizeof(vtep_flag_str)); + +- vty_out(vty, " %pI4 flags: %s", &es_vtep->vtep_ip, +- vtep_flag_str); ++ vty_out(vty, " %pIA flags: %s", &es_vtep->vtep_ip, vtep_flag_str); + + if (CHECK_FLAG(es_vtep->flags, BGP_EVPNES_VTEP_ESR)) + vty_out(vty, " df_alg: %s df_pref: %u\n", +@@ -2739,8 +2735,7 @@ static void bgp_evpn_es_show_entry_detail(struct vty *vty, + json_array_string_add(json_flags, "bypass"); + json_object_object_add(json, "flags", json_flags); + } +- json_object_string_addf(json, "originator_ip", "%pI4", +- &es->originator_ip); ++ json_object_string_addf(json, "originator_ip", "%pIA", &es->originator_ip); + json_object_int_add(json, "remoteVniCount", + es->remote_es_evi_cnt); + json_object_int_add(json, "vrfCount", +@@ -2790,7 +2785,7 @@ static void bgp_evpn_es_show_entry_detail(struct vty *vty, + vty_out(vty, " Type: %s\n", type_str); + vty_out(vty, " RD: %pRDP\n", + es->es_base_frag ? &es->es_base_frag->prd : NULL); +- vty_out(vty, " Originator-IP: %pI4\n", &es->originator_ip); ++ vty_out(vty, " Originator-IP: %pIA\n", &es->originator_ip); + if (CHECK_FLAG(es->flags, BGP_EVPNES_LOCAL)) + vty_out(vty, " Local ES DF preference: %u\n", + es->df_pref); +@@ -4130,7 +4125,7 @@ static char *bgp_evpn_es_evi_vteps_str(char *vtep_str, + struct listnode *node; + struct bgp_evpn_es_evi_vtep *evi_vtep; + bool first = true; +- char ip_buf[INET_ADDRSTRLEN]; ++ char ip_buf[INET6_ADDRSTRLEN]; + + vtep_str[0] = '\0'; + for (ALL_LIST_ELEMENTS_RO(es_evi->es_evi_vtep_list, node, evi_vtep)) { +@@ -4146,9 +4141,7 @@ static char *bgp_evpn_es_evi_vteps_str(char *vtep_str, + first = false; + else + strlcat(vtep_str, ",", vtep_str_size); +- strlcat(vtep_str, +- inet_ntop(AF_INET, &evi_vtep->vtep_ip, ip_buf, +- sizeof(ip_buf)), ++ strlcat(vtep_str, ipaddr2str(&evi_vtep->vtep_ip, ip_buf, sizeof(ip_buf)), + vtep_str_size); + strlcat(vtep_str, "(", vtep_str_size); + strlcat(vtep_str, vtep_flag_str, vtep_str_size); +@@ -4166,8 +4159,7 @@ static void bgp_evpn_es_evi_json_vtep_fill(json_object *json_vteps, + + json_vtep_entry = json_object_new_object(); + +- json_object_string_addf(json_vtep_entry, "vtep_ip", "%pI4", +- &evi_vtep->vtep_ip); ++ json_object_string_addf(json_vtep_entry, "vtep_ip", "%pIA", &evi_vtep->vtep_ip); + if (CHECK_FLAG(evi_vtep->flags, (BGP_EVPN_EVI_VTEP_EAD_PER_ES | + BGP_EVPN_EVI_VTEP_EAD_PER_EVI))) { + json_flags = json_object_new_array(); +-- +2.43.0 + diff --git a/src/sonic-frr/patch/0053-lib-EVPNv6-MH-fix-type-1-ead-print.patch b/src/sonic-frr/patch/0053-lib-EVPNv6-MH-fix-type-1-ead-print.patch new file mode 100644 index 00000000000..6a5f1ad6388 --- /dev/null +++ b/src/sonic-frr/patch/0053-lib-EVPNv6-MH-fix-type-1-ead-print.patch @@ -0,0 +1,30 @@ +From 05e19d0e0e340fdbd9eec628aa6cd46339b8f3e5 Mon Sep 17 00:00:00 2001 +From: Chirag Shah +Date: Sat, 8 Nov 2025 16:35:04 -0800 +Subject: lib: EVPNv6 MH fix type-1 ead print + +Signed-off-by: Chirag Shah +(cherry picked from commit ebdd65beafcdb624dd60560b9ffb270a919363a0) +Signed-off-by: Tamer Ahmed + +diff --git a/lib/prefix.c b/lib/prefix.c +index 40277f060..ee320152f 100644 +--- a/lib/prefix.c ++++ b/lib/prefix.c +@@ -970,11 +970,12 @@ static const char *prefixevpn_ead2str(const struct prefix_evpn *p, char *str, + char buf1[INET6_ADDRSTRLEN]; + + family = IS_IPADDR_V4(&p->prefix.ead_addr.ip) ? AF_INET : AF_INET6; ++ + snprintf(str, size, "[%d]:[%u]:[%s]:[%d]:[%s]:[%u]", + p->prefix.route_type, p->prefix.ead_addr.eth_tag, + esi_to_str(&p->prefix.ead_addr.esi, buf, sizeof(buf)), + (family == AF_INET) ? IPV4_MAX_BITLEN : IPV6_MAX_BITLEN, +- inet_ntop(family, &p->prefix.ead_addr.ip.ipaddr_v4, buf1, ++ inet_ntop(family, &p->prefix.ead_addr.ip.ip.addr, buf1, + sizeof(buf1)), + p->prefix.ead_addr.frag_id); + return str; +-- +2.43.0 + diff --git a/src/sonic-frr/patch/0054-zebra-EVPN-remote-es-debug-to-add-df-alg-param.patch b/src/sonic-frr/patch/0054-zebra-EVPN-remote-es-debug-to-add-df-alg-param.patch new file mode 100644 index 00000000000..322085ca705 --- /dev/null +++ b/src/sonic-frr/patch/0054-zebra-EVPN-remote-es-debug-to-add-df-alg-param.patch @@ -0,0 +1,27 @@ +From 9ce32622a70358ead609a43c988553ef0d106cae Mon Sep 17 00:00:00 2001 +From: Chirag Shah +Date: Mon, 3 Nov 2025 10:23:47 -0800 +Subject: zebra: EVPN remote es debug to add df alg param + +Signed-off-by: Chirag Shah +(cherry picked from commit 36616d30e5accbb5fb1a5ee5325e25d1de23a768) +Signed-off-by: Tamer Ahmed + +diff --git a/zebra/zebra_rib.c b/zebra/zebra_rib.c +index c4e30957e..b8dab3924 100644 +--- a/zebra/zebra_rib.c ++++ b/zebra/zebra_rib.c +@@ -3751,8 +3751,8 @@ int zebra_rib_queue_evpn_rem_es_add(const esi_t *esi, const struct ipaddr *vtep_ + w->df_pref = df_pref; + + if (IS_ZEBRA_DEBUG_RIB_DETAILED) +- zlog_debug("%s: vtep %pIA, esi %s enqueued", __func__, vtep_ip, +- esi_to_str(esi, buf, sizeof(buf))); ++ zlog_debug("%s: vtep %pIA, esi %s df_alg %u df_pref %u enqueued", __func__, vtep_ip, ++ esi_to_str(esi, buf, sizeof(buf)), df_alg, df_pref); + + return mq_add_handler(w, rib_meta_queue_evpn_add); + } +-- +2.43.0 + diff --git a/src/sonic-frr/patch/0055-bgpd-EVPNv6-MH-debug-print-v4-v6-addr.patch b/src/sonic-frr/patch/0055-bgpd-EVPNv6-MH-debug-print-v4-v6-addr.patch new file mode 100644 index 00000000000..8c6f4ac824a --- /dev/null +++ b/src/sonic-frr/patch/0055-bgpd-EVPNv6-MH-debug-print-v4-v6-addr.patch @@ -0,0 +1,35 @@ +From f8184619d1a7a6b35f0cb7e3a1746f633b279b49 Mon Sep 17 00:00:00 2001 +From: Chirag Shah +Date: Mon, 24 Nov 2025 20:39:37 -0800 +Subject: bgpd: EVPNv6 MH debug print v4 v6 addr + +Signed-off-by: Chirag Shah +Signed-off-by: Jared Mauch +(cherry picked from commit 3fb166db24a1fb7db0c6862a0828849fa2cb6a5a) +Signed-off-by: Tamer Ahmed + +diff --git a/bgpd/bgp_evpn_mh.c b/bgpd/bgp_evpn_mh.c +index ad21b7557..ea2bddead 100644 +--- a/bgpd/bgp_evpn_mh.c ++++ b/bgpd/bgp_evpn_mh.c +@@ -553,7 +553,7 @@ static int bgp_evpn_mh_route_delete(struct bgp *bgp, struct bgp_evpn_es *es, + + if (BGP_DEBUG(evpn_mh, EVPN_MH_RT)) + zlog_debug( +- "local ES %s vni %u route-type %s nexthop %pI4 delete", ++ "local ES %s vni %u route-type %s nexthop %pIA delete", + es->esi_str, vpn ? vpn->vni : 0, + p->prefix.route_type == BGP_EVPN_ES_ROUTE + ? "esr" +@@ -729,7 +729,7 @@ static int bgp_evpn_type4_route_update(struct bgp *bgp, + if (ret != 0) + flog_err( + EC_BGP_ES_INVALID, +- "%u ERROR: Failed to updated ES route ESI: %s VTEP %pI4", ++ "%u ERROR: Failed to updated ES route ESI: %s VTEP %pIA", + bgp->vrf_id, es->esi_str, &es->originator_ip); + + assert(pi); +-- +2.43.0 + diff --git a/src/sonic-frr/patch/0056-tests-EVPNv6-MH-v6-vtep-aware-BGP-num-test.patch b/src/sonic-frr/patch/0056-tests-EVPNv6-MH-v6-vtep-aware-BGP-num-test.patch new file mode 100644 index 00000000000..5c44428bc6a --- /dev/null +++ b/src/sonic-frr/patch/0056-tests-EVPNv6-MH-v6-vtep-aware-BGP-num-test.patch @@ -0,0 +1,2542 @@ +From 1cb90ab2df4cc289fa99e0ab098a69facd226a76 Mon Sep 17 00:00:00 2001 +From: Chirag Shah +Date: Wed, 19 Nov 2025 21:11:11 -0800 +Subject: tests: EVPNv6 MH v6 vtep aware BGP num test + +This test is converted to from bgp_evpn_mh +to use `service integrated-vtysh-config` along +with BGP numbered underlay fabric with IPv6 VTEP. + +IPv6 VTEP address, BGP GUA address +IPv4: 10.0.0.x/32 and related underlay prefixes are from 10.0.0.0/8, +which is RFC 1918 private space and appropriate for internal tests. +IPv6: all the 2001:db8:... prefixes are from 2001:db8::/32, the RFC 3849 +documentation block, explicitly reserved for examples and non-production +use. + +Signed-off-by: Chirag Shah +(cherry picked from commit 0f1638773bf727f10be6a15430115c84d791e823) +Signed-off-by: Tamer Ahmed + +diff --git a/tests/topotests/bgp_evpn_mh_v4_v6_num/ipv6/README.md b/tests/topotests/bgp_evpn_mh_v4_v6_num/ipv6/README.md +new file mode 100644 +index 000000000..ae64aa85b +--- /dev/null ++++ b/tests/topotests/bgp_evpn_mh_v4_v6_num/ipv6/README.md +@@ -0,0 +1,273 @@ ++# BGP EVPN Multihoming with IPv4/IPv6 VTEPs and EBGP Numbered Peering ++ ++## Overview ++ ++This test validates BGP EVPN Multi-Homing functionality using: ++- **IPv6 VTEP addresses** for VXLAN tunnel endpoints (IPv4 support planned) ++- **EBGP numbered peering** with explicit IPv6 neighbor addresses ++- **Unified FRR configuration** using `service integrated-vtysh-config` ++- **PIM6** for IPv6 multicast BUM traffic handling ++ ++## Topology ++ ++``` ++ +--------+ +--------+ ++ | spine1 | | spine2 | ++ | AS6500 | | AS6500 | ++ +---+----+ +----+---+ ++ | \/ | ++ | /\ | ++ +---+----+ +----+---+ ++ | leaf1 | | leaf2 | ++ | AS6510 | | AS6510 | ++ +---+----+ +----+---+ ++ | \/ | ++ | /\ | ++ +--------------+--++--------+---+--------------+ ++ | | | | ++ +--+---+ +----+---+ +----+---+ +----+---+ ++ |torm11| |torm12 | |torm21 | |torm22 | ++ |AS6500| |AS6500 | |AS6500 | |AS6500 | ++ | 2 | | 3 | | 4 | | 5 | ++ +--+---+ +----+---+ +----+---+ +----+---+ ++ | \ / | | \ / | ++ | \ / | | \ / | ++ | \ / | | \ / | ++ +--+---+ +----+---+ | +--+---+ +------+---+ | ++ |hostd11 |hostd12 | |hostd21| |hostd22 | ++ +--------+----------+ +--------+-----------+ ++ (Rack 1) (Rack 2) ++``` ++ ++## Key Features ++ ++### 1. IPv6 VTEP Addressing ++ ++All VXLAN tunnel endpoints currently use IPv6 addresses: ++- **torm11**: `2001:db8:100::15/128` ++- **torm12**: `2001:db8:100::16/128` ++- **torm21**: `2001:db8:100::17/128` ++- **torm22**: `2001:db8:100::18/128` ++ ++### 2. IPv6 Point-to-Point Links (/127) ++ ++All inter-router links use `/127` addressing for efficient IPv6 P2P: ++- **spine1 ↔ leaf1**: `2001:db8:50::0/127` and `::1/127` ++- **spine1 ↔ leaf2**: `2001:db8:51::0/127` and `::1/127` ++- **spine2 ↔ leaf1**: `2001:db8:60::0/127` and `::1/127` ++- **spine2 ↔ leaf2**: `2001:db8:61::0/127` and `::1/127` ++- **leaf1 ↔ torm11**: `2001:db8:1::0/127` and `::1/127` ++- **leaf1 ↔ torm12**: `2001:db8:2::0/127` and `::1/127` ++- And so on... ++ ++### 3. AS Number Scheme (EBGP Numbered) ++ ++- **Spine layer**: AS 65001 ++- **Leaf layer**: AS 65101 ++- **TOR Rack 1**: AS 65002 (torm11), AS 65003 (torm12) ++- **TOR Rack 2**: AS 65004 (torm21), AS 65005 (torm22) ++ ++### 4. BGP Configuration ++ ++All BGP sessions use: ++- IPv6 neighbor addresses (EBGP numbered) ++- `capability extended-nexthop` for IPv4 over IPv6 BGP sessions ++- `no bgp default ipv4-unicast` (IPv6-only underlay for now) ++- L2VPN EVPN address family for EVPN routes ++ ++### 5. PIM6 for IPv6 Multicast ++ ++TOR routers use PIM6 for handling BUM (Broadcast, Unknown Unicast, Multicast) traffic: ++- IPv6 multicast group: `ff0e::100` ++- PIM6 enabled on uplink interfaces ++- Multicast termination device: `ipmr-lo` ++ ++### 6. EVPN Multihoming ++ ++Each rack has: ++- Two TORs acting as PEs (Provider Edge) ++- Dual-attached hosts with LACP bonds ++- ES-ID (Ethernet Segment Identifier) per host ++- ES system MAC for MH coordination ++ ++**Rack 1 ES Configuration:** ++- ES system MAC: `44:38:39:ff:ff:01` ++- hostd11 ES-ID: 1 ++- hostd12 ES-ID: 2 ++ ++**Rack 2 ES Configuration:** ++- ES system MAC: `44:38:39:ff:ff:02` ++- hostd21 ES-ID: 1 ++- hostd22 ES-ID: 2 ++ ++## Configuration Structure ++ ++### Unified FRR Configuration ++ ++Each router uses a single `frr.conf` file with: ++``` ++frr defaults datacenter ++service integrated-vtysh-config ++hostname ++! ++# Interface configurations ++# Routing protocol configurations ++! ++end ++``` ++ ++This approach: ++- Simplifies configuration management ++- Matches production deployments ++- Uses modern FRR best practices ++ ++## IPv6 Addressing Plan ++ ++### Loopback Addresses (VTEP) ++- `2001:db8:100::/64` - VTEP loopback addresses ++ - ::13 - spine1 ++ - ::14 - spine2 ++ - ::15 - torm11 (VTEP) ++ - ::16 - torm12 (VTEP) ++ - ::17 - torm21 (VTEP) ++ - ::18 - torm22 (VTEP) ++ ++### Spine Loopbacks ++- `2001:db8:200::/64` - Leaf/spine additional loopbacks ++ - ::13 - leaf1 ++ - ::14 - leaf2 ++ ++### Point-to-Point Links ++- `2001:db8:1::/127` through `2001:db8:8::/127` - TOR to Leaf links ++- `2001:db8:50::/127`, `2001:db8:51::/127` - Spine1 to Leaf links ++- `2001:db8:60::/127`, `2001:db8:61::/127` - Spine2 to Leaf links ++ ++### SVI (Switched Virtual Interface) ++- `2001:db8:45::/64` - VLAN 1000 SVI subnet ++ - ::1 - Anycast gateway ++ - ::2-::5 - TOR SVI addresses ++ - ::11, ::12, ::21, ::22 - Host addresses ++ ++## Test Coverage ++ ++The test suite validates: ++ ++1. **ES Peering** (`test_evpn_es`) ++ - Local ES peer discovery via Type-1 EAD routes ++ - Remote ES PE list correctness ++ ++2. **EAD Route Updates** (`test_evpn_ead_update`) ++ - Link flap handling ++ - EAD route withdrawal and re-advertisement ++ ++3. **MAC Learning** (`test_evpn_mac`) ++ - Local MAC sync between PEs ++ - Remote MAC installation ++ ++4. **DF Election** (`test_evpn_df`) ++ - Designated Forwarder role assignment ++ - DF preference changes ++ ++5. **Uplink Tracking** (`test_evpn_uplink_tracking`) ++ - Access port protodown on uplink failure ++ - Recovery on uplink restoration ++ ++## Running the Tests ++ ++```bash ++cd /work/penta-01/chirag/docker-home/tree/up/fr/frr/tests/topotests/bgp_evpn_mh_v4_v6_num ++ ++# Run all tests (fixture will run IPv6; IPv4 is currently skipped) ++pytest test_evpn_mh_v4_v6_numbered.py -v ++ ++# Run specific test ++pytest test_evpn_mh_v4_v6_numbered.py::test_evpn_es -v ++ ++# Run with debug output ++pytest test_evpn_mh_v4_v6_numbered.py -v -s ++``` ++ ++## Requirements ++ ++- **FRR**: 8.1 or later (with mgmtd support) ++- **Kernel**: 4.19 or later (for MH support) ++- **IPv6**: Fully enabled with forwarding ++- **Modules**: VXLAN, bridge, bonding, PIM6 ++ ++## Key Differences from Original test_evpn_mh ++ ++1. **IPv6 VTEP first**: Uses IPv6 for VXLAN tunnel endpoints (IPv4 VTEPs can be added later) ++2. **EBGP Numbered**: Explicit IPv6 neighbor addresses instead of unnumbered ++3. **Unified Config**: Single `frr.conf` per router instead of separate daemon configs ++4. **PIM6**: Uses IPv6 PIM instead of IPv4 PIM ++5. **IPv6 Multicast**: Uses `ff0e::100` instead of `239.1.1.100` ++6. **Pytest Fixture**: `tgen_and_ip_version` parametrizes the test for `"ipv4"` / `"ipv6"` underlay (IPv4 currently skipped) ++7. **Critical Fixes**: Includes IPv6 forwarding and DAD configuration before daemon startup ++ ++## Known Issues and Workarounds ++ ++### IPv6 DAD (Duplicate Address Detection) ++ ++DAD is disabled globally and per-interface to prevent address configuration delays: ++```python ++router.run("sysctl -w net.ipv6.conf.all.accept_dad=0") ++router.run("sysctl -w net.ipv6.conf.all.dad_transmits=0") ++``` ++ ++### mgmtd Requirement ++ ++Modern FRR requires mgmtd to be loaded before other daemons: ++```python ++router.load_config(TopoRouter.RD_MGMTD, "") ++``` ++ ++### IPv6 Forwarding ++ ++Must be enabled BEFORE starting FRR daemons: ++```python ++router.run("sysctl -w net.ipv6.conf.all.forwarding=1") ++``` ++ ++## Debugging ++ ++### View BGP EVPN ES Information ++```bash ++vtysh -c "show bgp l2vpn evpn es" ++vtysh -c "show bgp l2vpn evpn es detail" ++``` ++ ++### View MAC Addresses ++```bash ++vtysh -c "show evpn mac vni 1000" ++``` ++ ++### View BGP IPv6 Neighbors ++```bash ++vtysh -c "show bgp ipv6 unicast summary" ++``` ++ ++### View EVPN Routes ++```bash ++vtysh -c "show bgp l2vpn evpn route" ++``` ++ ++### View PIM6 Status ++```bash ++vtysh -c "show ipv6 pim interface" ++vtysh -c "show ipv6 mroute" ++``` ++ ++## References ++ ++- Original test: `tests/topotests/bgp_evpn_mh/` ++- IPv6 VTEP reference: `tests/topotests/bgp_evpn_three_tier_clos_topo1/` ++- FRR EVPN MH documentation: https://docs.frrouting.org/en/latest/evpn.html ++ ++## Authors ++ ++- Original test: Anuradha Karuppiah (Cumulus Networks) ++- IPv4/IPv6 VTEP and EBGP numbered adaptation: Chirag Shah (Nvidia), 2025 ++ ++## License ++ ++SPDX-License-Identifier: ISC +diff --git a/tests/topotests/bgp_evpn_mh_v4_v6_num/ipv6/TOPOLOGY.md b/tests/topotests/bgp_evpn_mh_v4_v6_num/ipv6/TOPOLOGY.md +new file mode 100644 +index 000000000..6e2a4593d +--- /dev/null ++++ b/tests/topotests/bgp_evpn_mh_v4_v6_num/ipv6/TOPOLOGY.md +@@ -0,0 +1,496 @@ ++# BGP EVPN MH IPv4/IPv6 Numbered - Network Topology ++ ++## Topology Diagram ++ ++``` ++ SPINE LAYER (AS 65001) ++ ┌─────────────────────────────┐ ++ │ │ ++ ┌───────┴────────┐ ┌────────┴────────┐ ++ │ spine1 │ │ spine2 │ ++ │ AS 65001 │ │ AS 65001 │ ++ │ lo: 2001:db8: │ │ lo: 2001:db8: │ ++ │ 100::13 │ │ 100::14 │ ++ └────┬──────┬────┘ └────┬──────┬─────┘ ++ │ │ │ │ ++ eth0 │ │ eth1 eth0 │ │ eth1 ++ ::50::1/127│ │::51::1/127 ::60::1/127 │::61::1/127 ++ │ │ │ │ ++ │ └─────────┐ ┏─────┘ │ ++ │ │ │ │ ++ ┌────┴──────┐ ┌────┴────┴──┐ ┌────┴────────┐ ++ │ leaf1 │ │ leaf2 │ │ │ ++ │ AS 65101 │ │ AS 65101 │ │ │ ++ │ lo: 2001:│ │ lo: 2001: │ │ │ ++ │ db8:200::│ │ db8:200:: │ │ │ ++ │ 13 │ │ 14 │ │ │ ++ └─┬──┬──┬──┬┘ └─┬──┬──┬───┬┘ │ │ ++ eth2 │ │ │ │ │ │ │ │ │ │ ++ │ │ │ └───────┘ │ │ └─────┘ │ ++ │ │ │ │ │ │ ++ │ │ └─────────────┼──┼────────────────────────┘ ++ │ │ │ │ ++ │ └────────────────┼──┼──────────────┐ ++ │ │ │ │ ++ │ eth3 eth4│ │eth5 eth2│ eth3 ++ │ │ │ │ ++ │ │ │ │ ++ ┌─┴─────────┐ ┌──────┴──┴────┐ ┌─────┴───────┐ ┌──────────────┐ ++ │ torm11 │ │ torm12 │ │ torm21 │ │ torm22 │ ++ │ AS 65002 │ │ AS 65003 │ │ AS 65004 │ │ AS 65005 │ ++ │ VTEP: │ │ VTEP: │ │ VTEP: │ │ VTEP: │ ++ │ 2001:db8: │ │ 2001:db8: │ │ 2001:db8: │ │ 2001:db8: │ ++ │ 100::15 │ │ 100::16 │ │ 100::17 │ │ 100::18 │ ++ └─┬───────┬─┘ └─┬────────┬───┘ └─┬───────┬───┘ └─┬────────┬───┘ ++ eth2 │ │eth3 │eth2 │eth3 │eth2 │eth3 │eth2 │eth3 ++ │ │ │ │ │ │ │ │ ++ │ └──────┼────┐ │ ┌────┼───────┘ │ ┌────┘ ++ │ │ │ │ │ │ │ │ ++ ┌─┴─────┐ ┌─────┴──┐ │ │ │ ┌──┴──────┐ ┌──────┴───┴──┐ ++ │hostd11│ │hostd12 │ │ │ │ │hostd21 │ │ hostd22 │ ++ │(bond) │ │(bond) │ │ │ │ │(bond) │ │ (bond) │ ++ └───┬───┘ └────┬───┘ │ │ │ └────┬────┘ └─────┬───────┘ ++ │ │ │ │ │ │ │ ++ └───────────┴─────┴───┴───┴──────┴─────────────┘ ++ Rack 1 Rack 2 ++ ES sys-mac: ES sys-mac: ++ 44:38:39:ff:ff:01 44:38:39:ff:ff:02 ++``` ++ ++## Layer Architecture ++ ++``` ++┌──────────────────────────────────────────────────────────────────┐ ++│ SPINE LAYER │ ++│ │ ++│ spine1 (AS 65001) spine2 (AS 65001) │ ++│ - BGP Route Reflector - BGP Route Reflector │ ++│ - L2VPN EVPN - L2VPN EVPN │ ++└──────────────────────────────────────────────────────────────────┘ ++ ▲ │ ++ │ ▼ ++┌──────────────────────────────────────────────────────────────────┐ ++│ LEAF LAYER │ ++│ │ ++│ leaf1 (AS 65101) leaf2 (AS 65101) │ ++│ - BGP Route Reflector - BGP Route Reflector │ ++│ - Aggregation - Aggregation │ ++└──────────────────────────────────────────────────────────────────┘ ++ ▲ │ ++ │ ▼ ++┌──────────────────────────────────────────────────────────────────┐ ++│ TOR LAYER (VTEP) │ ++│ │ ++│ Rack 1: Rack 2: │ ++│ ├─ torm11 (AS 65002) ├─ torm21 (AS 65004) │ ++│ │ VTEP: 2001:db8:100::15 │ VTEP: 2001:db8:100::17 │ ++│ └─ torm12 (AS 65003) └─ torm22 (AS 65005) │ ++│ VTEP: 2001:db8:100::16 VTEP: 2001:db8:100::18 │ ++│ │ ++│ Features: │ ++│ - EVPN Multihoming (ES-ID, ES sys-mac) │ ++│ - VXLAN (VNI 1000) │ ++│ - PIM6 for BUM traffic │ ++│ - SVI: VLAN 1000 │ ++└──────────────────────────────────────────────────────────────────┘ ++ ▲ │ ++ │ ▼ ++┌──────────────────────────────────────────────────────────────────┐ ++│ HOST LAYER │ ++│ │ ++│ Rack 1: Rack 2: │ ++│ ├─ hostd11 (dual-attached) ├─ hostd21 (dual-attached) │ ++│ └─ hostd12 (dual-attached) └─ hostd22 (dual-attached) │ ++│ │ ++│ - LACP bonds to both TORs │ ++│ - IPv6 addressing in VLAN 1000 │ ++└──────────────────────────────────────────────────────────────────┘ ++``` ++ ++## Detailed Connection Table ++ ++### Spine to Leaf Connections ++ ++| Source Device | Source Interface | Source IPv6 Address | Destination Device | Destination Interface | Destination IPv6 Address | AS Pair | ++|--------------|------------------|---------------------|-------------------|----------------------|--------------------------|---------| ++| spine1 | spine1-eth0 | 2001:db8:50::1/127 | leaf1 | leaf1-eth0 | 2001:db8:50::0/127 | 65001 ↔ 65101 | ++| spine1 | spine1-eth1 | 2001:db8:51::1/127 | leaf2 | leaf2-eth0 | 2001:db8:51::0/127 | 65001 ↔ 65101 | ++| spine2 | spine2-eth0 | 2001:db8:60::1/127 | leaf1 | leaf1-eth1 | 2001:db8:60::0/127 | 65001 ↔ 65101 | ++| spine2 | spine2-eth1 | 2001:db8:61::1/127 | leaf2 | leaf2-eth1 | 2001:db8:61::0/127 | 65001 ↔ 65101 | ++ ++### Leaf to TOR Connections (Rack 1) ++ ++| Source Device | Source Interface | Source IPv6 Address | Destination Device | Destination Interface | Destination IPv6 Address | AS Pair | ++|--------------|------------------|---------------------|-------------------|----------------------|--------------------------|---------| ++| leaf1 | leaf1-eth2 | 2001:db8:1::1/127 | torm11 | torm11-eth0 | 2001:db8:1::0/127 | 65101 ↔ 65002 | ++| leaf1 | leaf1-eth3 | 2001:db8:2::1/127 | torm12 | torm12-eth0 | 2001:db8:2::0/127 | 65101 ↔ 65003 | ++| leaf2 | leaf2-eth2 | 2001:db8:5::1/127 | torm11 | torm11-eth1 | 2001:db8:5::0/127 | 65101 ↔ 65002 | ++| leaf2 | leaf2-eth3 | 2001:db8:6::1/127 | torm12 | torm12-eth1 | 2001:db8:6::0/127 | 65101 ↔ 65003 | ++ ++### Leaf to TOR Connections (Rack 2) ++ ++| Source Device | Source Interface | Source IPv6 Address | Destination Device | Destination Interface | Destination IPv6 Address | AS Pair | ++|--------------|------------------|---------------------|-------------------|----------------------|--------------------------|---------| ++| leaf1 | leaf1-eth4 | 2001:db8:3::1/127 | torm21 | torm21-eth0 | 2001:db8:3::0/127 | 65101 ↔ 65004 | ++| leaf1 | leaf1-eth5 | 2001:db8:4::1/127 | torm22 | torm22-eth0 | 2001:db8:4::0/127 | 65101 ↔ 65005 | ++| leaf2 | leaf2-eth4 | 2001:db8:7::1/127 | torm21 | torm21-eth1 | 2001:db8:7::0/127 | 65101 ↔ 65004 | ++| leaf2 | leaf2-eth5 | 2001:db8:8::1/127 | torm22 | torm22-eth1 | 2001:db8:8::0/127 | 65101 ↔ 65005 | ++ ++### TOR to Host Connections (Rack 1) ++ ++| Source Device | Source Interface | Destination Device | Destination Interface | Bond Interface | ES-ID | ES System MAC | ++|--------------|------------------|-------------------|----------------------|----------------|-------|---------------| ++| torm11 | torm11-eth2 | hostd11 | hostd11-eth0 | hostbond1 | 1 | 44:38:39:ff:ff:01 | ++| torm11 | torm11-eth3 | hostd12 | hostd12-eth0 | hostbond2 | 2 | 44:38:39:ff:ff:01 | ++| torm12 | torm12-eth2 | hostd11 | hostd11-eth1 | hostbond1 | 1 | 44:38:39:ff:ff:01 | ++| torm12 | torm12-eth3 | hostd12 | hostd12-eth1 | hostbond2 | 2 | 44:38:39:ff:ff:01 | ++ ++### TOR to Host Connections (Rack 2) ++ ++| Source Device | Source Interface | Destination Device | Destination Interface | Bond Interface | ES-ID | ES System MAC | ++|--------------|------------------|-------------------|----------------------|----------------|-------|---------------| ++| torm21 | torm21-eth2 | hostd21 | hostd21-eth0 | hostbond1 | 1 | 44:38:39:ff:ff:02 | ++| torm21 | torm21-eth3 | hostd22 | hostd22-eth0 | hostbond2 | 2 | 44:38:39:ff:ff:02 | ++| torm22 | torm22-eth2 | hostd21 | hostd21-eth1 | hostbond1 | 1 | 44:38:39:ff:ff:02 | ++| torm22 | torm22-eth3 | hostd22 | hostd22-eth1 | hostbond2 | 2 | 44:38:39:ff:ff:02 | ++ ++## IPv6 Addressing Scheme ++ ++### Loopback Addresses (Dual-Stack) ++ ++All routers have both IPv4 and IPv6 loopback addresses for proper BGP router-id and IPv6 VTEP functionality. ++ ++#### Spine Routers ++| Device | IPv4 Loopback | IPv6 Loopback | BGP Router-ID | AS Number | ++|--------|--------------|---------------|---------------|-----------| ++| spine1 | 10.0.0.13/32 | 2001:db8:100::13/128 | 10.0.0.13 | 65001 | ++| spine2 | 10.0.0.14/32 | 2001:db8:100::14/128 | 10.0.0.14 | 65001 | ++ ++#### Leaf Routers ++| Device | IPv4 Loopback | IPv6 Loopback | BGP Router-ID | AS Number | ++|--------|--------------|---------------|---------------|-----------| ++| leaf1 | 10.0.0.13/32 | 2001:db8:200::13/128 | 10.0.0.13 | 65101 | ++| leaf2 | 10.0.0.14/32 | 2001:db8:200::14/128 | 10.0.0.14 | 65101 | ++ ++#### TOR Routers (VTEP) ++| Device | IPv4 Loopback | IPv6 Loopback (VTEP) | BGP Router-ID | AS Number | ++|--------|--------------|---------------------|---------------|-----------| ++| torm11 | 10.0.0.15/32 | **2001:db8:100::15/128** | 10.0.0.15 | 65002 | ++| torm12 | 10.0.0.16/32 | **2001:db8:100::16/128** | 10.0.0.16 | 65003 | ++| torm21 | 10.0.0.17/32 | **2001:db8:100::17/128** | 10.0.0.17 | 65004 | ++| torm22 | 10.0.0.18/32 | **2001:db8:100::18/128** | 10.0.0.18 | 65005 | ++ ++**Note**: TOR routers use IPv6 addresses (2001:db8:100::15-18) as VTEP source addresses for VXLAN tunnels. IPv4 loopbacks are configured for BGP router-id compatibility. ++ ++### Point-to-Point Link Addresses (/127 Networks) ++ ++#### Spine to Leaf Links ++| Network | Device 1 | Address 1 | Device 2 | Address 2 | ++|---------|----------|-----------|----------|-----------| ++| 2001:db8:50::/127 | spine1-eth0 | ::1 | leaf1-eth0 | ::0 | ++| 2001:db8:51::/127 | spine1-eth1 | ::1 | leaf2-eth0 | ::0 | ++| 2001:db8:60::/127 | spine2-eth0 | ::1 | leaf1-eth1 | ::0 | ++| 2001:db8:61::/127 | spine2-eth1 | ::1 | leaf2-eth1 | ::0 | ++ ++#### Leaf to TOR Links (Rack 1) ++| Network | Device 1 | Address 1 | Device 2 | Address 2 | ++|---------|----------|-----------|----------|-----------| ++| 2001:db8:1::/127 | leaf1-eth2 | ::1 | torm11-eth0 | ::0 | ++| 2001:db8:2::/127 | leaf1-eth3 | ::1 | torm12-eth0 | ::0 | ++| 2001:db8:5::/127 | leaf2-eth2 | ::1 | torm11-eth1 | ::0 | ++| 2001:db8:6::/127 | leaf2-eth3 | ::1 | torm12-eth1 | ::0 | ++ ++#### Leaf to TOR Links (Rack 2) ++| Network | Device 1 | Address 1 | Device 2 | Address 2 | ++|---------|----------|-----------|----------|-----------| ++| 2001:db8:3::/127 | leaf1-eth4 | ::1 | torm21-eth0 | ::0 | ++| 2001:db8:4::/127 | leaf1-eth5 | ::1 | torm22-eth0 | ::0 | ++| 2001:db8:7::/127 | leaf2-eth4 | ::1 | torm21-eth1 | ::0 | ++| 2001:db8:8::/127 | leaf2-eth5 | ::1 | torm22-eth1 | ::0 | ++ ++### SVI and Host Addresses (2001:db8:45::/64) ++ ++#### VLAN 1000 SVI Addresses ++| Device | SVI Address | Interface | Purpose | ++|--------|-------------|-----------|---------| ++| torm11 | 2001:db8:45::2/64 | vlan1000 | TOR SVI | ++| torm12 | 2001:db8:45::3/64 | vlan1000 | TOR SVI | ++| torm21 | 2001:db8:45::4/64 | vlan1000 | TOR SVI | ++| torm22 | 2001:db8:45::5/64 | vlan1000 | TOR SVI | ++| All TORs | 2001:db8:45::1/64 | vlan1000-v0 | **Anycast Gateway** | ++ ++#### Host Addresses ++| Device | Host Address | Interface | MAC Address | ++|--------|--------------|-----------|-------------| ++| hostd11 | 2001:db8:45::11/64 | torbond | 00:00:00:00:00:11 | ++| hostd12 | 2001:db8:45::12/64 | torbond | 00:00:00:00:00:12 | ++| hostd21 | 2001:db8:45::21/64 | torbond | 00:00:00:00:00:21 | ++| hostd22 | 2001:db8:45::22/64 | torbond | 00:00:00:00:00:22 | ++ ++## BGP AS Number Scheme ++ ++### AS Number Allocation ++| Layer | Device(s) | AS Number | Role | ++|-------|-----------|-----------|------| ++| Spine | spine1, spine2 | 65001 | Route Reflectors for Leaf layer | ++| Leaf | leaf1, leaf2 | 65101 | Aggregation, Route Reflectors for TOR layer | ++| TOR Rack1 | torm11 | 65002 | VTEP, EVPN PE | ++| TOR Rack1 | torm12 | 65003 | VTEP, EVPN PE | ++| TOR Rack2 | torm21 | 65004 | VTEP, EVPN PE | ++| TOR Rack2 | torm22 | 65005 | VTEP, EVPN PE | ++ ++### BGP Session Summary ++ ++**Total BGP Sessions**: 20 ++ ++#### Spine Layer (4 sessions) ++- spine1 ↔ leaf1 (AS 65001 ↔ 65101) ++- spine1 ↔ leaf2 (AS 65001 ↔ 65101) ++- spine2 ↔ leaf1 (AS 65001 ↔ 65101) ++- spine2 ↔ leaf2 (AS 65001 ↔ 65101) ++ ++#### Leaf to Rack 1 (8 sessions) ++- leaf1 ↔ torm11 (AS 65101 ↔ 65002) ++- leaf1 ↔ torm12 (AS 65101 ↔ 65003) ++- leaf2 ↔ torm11 (AS 65101 ↔ 65002) ++- leaf2 ↔ torm12 (AS 65101 ↔ 65003) ++ ++#### Leaf to Rack 2 (8 sessions) ++- leaf1 ↔ torm21 (AS 65101 ↔ 65004) ++- leaf1 ↔ torm22 (AS 65101 ↔ 65005) ++- leaf2 ↔ torm21 (AS 65101 ↔ 65004) ++- leaf2 ↔ torm22 (AS 65101 ↔ 65005) ++ ++## EVPN Multihoming Configuration ++ ++### Ethernet Segment Configuration ++ ++#### Rack 1 (ES System MAC: 44:38:39:ff:ff:01) ++| Host | TOR Interfaces | Bond Name | ES-ID | ES Type | ++|------|---------------|-----------|-------|---------| ++| hostd11 | torm11-eth2, torm12-eth2 | hostbond1 | 1 | All-Active | ++| hostd12 | torm11-eth3, torm12-eth3 | hostbond2 | 2 | All-Active | ++ ++**ESI Format**: 03:44:38:39:ff:ff:01:00:00:0X (where X = ES-ID) ++ ++#### Rack 2 (ES System MAC: 44:38:39:ff:ff:02) ++| Host | TOR Interfaces | Bond Name | ES-ID | ES Type | ++|------|---------------|-----------|-------|---------| ++| hostd21 | torm21-eth2, torm22-eth2 | hostbond1 | 1 | All-Active | ++| hostd22 | torm21-eth3, torm22-eth3 | hostbond2 | 2 | All-Active | ++ ++**ESI Format**: 03:44:38:39:ff:ff:02:00:00:0X (where X = ES-ID) ++ ++### VXLAN Configuration ++ ++| Parameter | Value | ++|-----------|-------| ++| VNI | 1000 | ++| VLAN | 1000 | ++| Multicast Group | ff0e::100 (IPv6) | ++| UDP Port | 4789 (standard VXLAN) | ++| MTU | 9152 | ++| TTL | 64 | ++| Learning | Disabled (EVPN control plane) | ++ ++## Interface Summary by Device ++ ++### spine1 ++``` ++lo : 10.0.0.13/32 (IPv4) + 2001:db8:100::13/128 (IPv6) ++spine1-eth0 : 2001:db8:50::1/127 → leaf1-eth0 ++spine1-eth1 : 2001:db8:51::1/127 → leaf2-eth0 ++``` ++ ++### spine2 ++``` ++lo : 10.0.0.14/32 (IPv4) + 2001:db8:100::14/128 (IPv6) ++spine2-eth0 : 2001:db8:60::1/127 → leaf1-eth1 ++spine2-eth1 : 2001:db8:61::1/127 → leaf2-eth1 ++``` ++ ++### leaf1 ++``` ++lo : 10.0.0.13/32 (IPv4) + 2001:db8:200::13/128 (IPv6) ++leaf1-eth0 : 2001:db8:50::0/127 → spine1-eth0 ++leaf1-eth1 : 2001:db8:60::0/127 → spine2-eth0 ++leaf1-eth2 : 2001:db8:1::1/127 → torm11-eth0 ++leaf1-eth3 : 2001:db8:2::1/127 → torm12-eth0 ++leaf1-eth4 : 2001:db8:3::1/127 → torm21-eth0 ++leaf1-eth5 : 2001:db8:4::1/127 → torm22-eth0 ++``` ++ ++### leaf2 ++``` ++lo : 10.0.0.14/32 (IPv4) + 2001:db8:200::14/128 (IPv6) ++leaf2-eth0 : 2001:db8:51::0/127 → spine1-eth1 ++leaf2-eth1 : 2001:db8:61::0/127 → spine2-eth1 ++leaf2-eth2 : 2001:db8:5::1/127 → torm11-eth1 ++leaf2-eth3 : 2001:db8:6::1/127 → torm12-eth1 ++leaf2-eth4 : 2001:db8:7::1/127 → torm21-eth1 ++leaf2-eth5 : 2001:db8:8::1/127 → torm22-eth1 ++``` ++ ++### torm11 (IPv6 VTEP: 2001:db8:100::15/128) ++``` ++lo : 10.0.0.15/32 (IPv4 router-id) + 2001:db8:100::15/128 (IPv6 VTEP) ++torm11-eth0 : 2001:db8:1::0/127 → leaf1-eth2 (PIM6, MH uplink) ++torm11-eth1 : 2001:db8:5::0/127 → leaf2-eth2 (PIM6, MH uplink) ++torm11-eth2 : L2 only → hostd11-eth0 (in hostbond1) ++torm11-eth3 : L2 only → hostd12-eth0 (in hostbond2) ++vlan1000 : 2001:db8:45::2/64 (SVI) ++vlan1000-v0 : 2001:db8:45::1/64 (Anycast GW) ++vx-1000 : VNI 1000, local 2001:db8:100::15, group ff0e::100 ++bridge : VLAN aware bridge ++ipmr-lo : Multicast termination device ++hostbond1 : ES-ID 1, sys-mac 44:38:39:ff:ff:01 ++hostbond2 : ES-ID 2, sys-mac 44:38:39:ff:ff:01 ++``` ++ ++### torm12 (IPv6 VTEP: 2001:db8:100::16/128) ++``` ++lo : 10.0.0.16/32 (IPv4 router-id) + 2001:db8:100::16/128 (IPv6 VTEP) ++torm12-eth0 : 2001:db8:2::0/127 → leaf1-eth3 (PIM6, MH uplink) ++torm12-eth1 : 2001:db8:6::0/127 → leaf2-eth3 (PIM6, MH uplink) ++torm12-eth2 : L2 only → hostd11-eth1 (in hostbond1) ++torm12-eth3 : L2 only → hostd12-eth1 (in hostbond2) ++vlan1000 : 2001:db8:45::3/64 (SVI) ++vlan1000-v0 : 2001:db8:45::1/64 (Anycast GW) ++vx-1000 : VNI 1000, local 2001:db8:100::16, group ff0e::100 ++bridge : VLAN aware bridge ++ipmr-lo : Multicast termination device ++hostbond1 : ES-ID 1, sys-mac 44:38:39:ff:ff:01 ++hostbond2 : ES-ID 2, sys-mac 44:38:39:ff:ff:01 ++``` ++ ++### torm21 (IPv6 VTEP: 2001:db8:100::17/128) ++``` ++lo : 10.0.0.17/32 (IPv4 router-id) + 2001:db8:100::17/128 (IPv6 VTEP) ++torm21-eth0 : 2001:db8:3::0/127 → leaf1-eth4 (PIM6, MH uplink) ++torm21-eth1 : 2001:db8:7::0/127 → leaf2-eth4 (PIM6, MH uplink) ++torm21-eth2 : L2 only → hostd21-eth0 (in hostbond1) ++torm21-eth3 : L2 only → hostd22-eth0 (in hostbond2) ++vlan1000 : 2001:db8:45::4/64 (SVI) ++vlan1000-v0 : 2001:db8:45::1/64 (Anycast GW) ++vx-1000 : VNI 1000, local 2001:db8:100::17, group ff0e::100 ++bridge : VLAN aware bridge ++ipmr-lo : Multicast termination device ++hostbond1 : ES-ID 1, sys-mac 44:38:39:ff:ff:02 ++hostbond2 : ES-ID 2, sys-mac 44:38:39:ff:ff:02 ++``` ++ ++### torm22 (IPv6 VTEP: 2001:db8:100::18/128) ++``` ++lo : 10.0.0.18/32 (IPv4 router-id) + 2001:db8:100::18/128 (IPv6 VTEP) ++torm22-eth0 : 2001:db8:4::0/127 → leaf1-eth5 (PIM6, MH uplink) ++torm22-eth1 : 2001:db8:8::0/127 → leaf2-eth5 (PIM6, MH uplink) ++torm22-eth2 : L2 only → hostd21-eth1 (in hostbond1) ++torm22-eth3 : L2 only → hostd22-eth1 (in hostbond2) ++vlan1000 : 2001:db8:45::5/64 (SVI) ++vlan1000-v0 : 2001:db8:45::1/64 (Anycast GW) ++vx-1000 : VNI 1000, local 2001:db8:100::18, group ff0e::100 ++bridge : VLAN aware bridge ++ipmr-lo : Multicast termination device ++hostbond1 : ES-ID 1, sys-mac 44:38:39:ff:ff:02 ++hostbond2 : ES-ID 2, sys-mac 44:38:39:ff:ff:02 ++``` ++ ++### hostd11 ++``` ++hostd11-eth0 : In bond torbond → torm11-eth2 ++hostd11-eth1 : In bond torbond → torm12-eth2 ++torbond : 2001:db8:45::11/64, MAC: 00:00:00:00:00:11 ++``` ++ ++### hostd12 ++``` ++hostd12-eth0 : In bond torbond → torm11-eth3 ++hostd12-eth1 : In bond torbond → torm12-eth3 ++torbond : 2001:db8:45::12/64, MAC: 00:00:00:00:00:12 ++``` ++ ++### hostd21 ++``` ++hostd21-eth0 : In bond torbond → torm21-eth2 ++hostd21-eth1 : In bond torbond → torm22-eth2 ++torbond : 2001:db8:45::21/64, MAC: 00:00:00:00:00:21 ++``` ++ ++### hostd22 ++``` ++hostd22-eth0 : In bond torbond → torm21-eth3 ++hostd22-eth1 : In bond torbond → torm22-eth3 ++torbond : 2001:db8:45::22/64, MAC: 00:00:00:00:00:22 ++``` ++ ++## Routing Protocol Summary ++ ++### BGP Configuration ++ ++| Device | BGP Features | ++|--------|-------------| ++| spine1, spine2 | IPv6 unicast, L2VPN EVPN, Route Reflector role | ++| leaf1, leaf2 | IPv6 unicast, L2VPN EVPN, Route Reflector role, Peer groups | ++| torm11-22 | IPv6 unicast, L2VPN EVPN, advertise-all-vni, advertise-svi-ip | ++ ++### PIM6 Configuration ++ ++Only on TOR routers: ++- Protocol: PIM6 (IPv6 PIM) ++- Interfaces: All uplink interfaces (eth0, eth1) and ipmr-lo ++- Join-Prune Interval: 5 seconds ++- Multicast Group: ff0e::100 (for VXLAN BUM traffic) ++ ++## Traffic Flow Examples ++ ++### East-West Traffic (hostd11 → hostd21) ++ ++``` ++hostd11 (2001:db8:45::11) ++ ↓ (torbond - LACP to torm11/torm12) ++torm11 or torm12 (DF election determines forwarder) ++ ↓ (VXLAN encapsulation with VTEP 2001:db8:100::15 or ::16) ++ ↓ (IPv6 underlay: through leaf1/leaf2 and spine1/spine2) ++ ↓ (Destination VTEP: 2001:db8:100::17 or ::18) ++torm21 or torm22 (ES load balancing) ++ ↓ (VXLAN decapsulation) ++ ↓ (hostbond1 - LACP) ++hostd21 (2001:db8:45::21) ++``` ++ ++### BUM Traffic (Broadcast/Unknown Unicast/Multicast) ++ ++``` ++Source TOR (e.g., torm11) ++ ↓ (Encapsulate in IPv6 multicast: ff0e::100) ++ ↓ (PIM6 distributes to all VTEPs) ++All other TORs (torm12, torm21, torm22) ++ ↓ (Receive via multicast, decapsulate) ++ ↓ (Forward to local hosts) ++``` ++ ++## Notes ++ ++1. **Dual-Stack Loopbacks**: All routers have both IPv4 and IPv6 loopback addresses ++ - IPv4: Used for BGP router-id (10.0.0.13-18) ++ - IPv6: Used for VTEP addresses and routing (2001:db8:100::x, 2001:db8:200::x) ++ ++2. **All P2P links use /127**: More efficient than /64 for IPv6 point-to-point ++ ++3. **EBGP Numbered**: Explicit neighbor IPv6 addresses configured ++ ++4. **Extended Nexthop**: Capability enabled for IPv4 over IPv6 BGP sessions ++ ++5. **IPv6-Only Links**: `no bgp default ipv4-unicast` - pure IPv6 underlay for BGP ++ ++6. **IPv6 VTEP Source**: TOR routers use IPv6 loopback (2001:db8:100::15-18) as VXLAN local address ++ ++7. **EVPN Type-1 Routes**: Used for ES discovery and EAD - advertise IPv6 VTEP ++ ++8. **EVPN Type-2 Routes**: Used for MAC/IP advertisement ++ ++9. **DF Election**: Based on ES-ID and modulo algorithm ++ ++10. **Anycast Gateway**: Same IPv6/MAC (2001:db8:45::1) on all TORs for first-hop redundancy ++ ++11. **PIM6**: IPv6 multicast (ff0e::100) for BUM traffic in VXLAN +diff --git a/tests/topotests/bgp_evpn_mh_v4_v6_num/ipv6/hostd11/frr.conf b/tests/topotests/bgp_evpn_mh_v4_v6_num/ipv6/hostd11/frr.conf +new file mode 100644 +index 000000000..501fce159 +--- /dev/null ++++ b/tests/topotests/bgp_evpn_mh_v4_v6_num/ipv6/hostd11/frr.conf +@@ -0,0 +1,6 @@ ++frr defaults datacenter ++service integrated-vtysh-config ++hostname hostd11 ++log syslog informational ++! ++end +diff --git a/tests/topotests/bgp_evpn_mh_v4_v6_num/ipv6/hostd12/frr.conf b/tests/topotests/bgp_evpn_mh_v4_v6_num/ipv6/hostd12/frr.conf +new file mode 100644 +index 000000000..2d7cf0cd2 +--- /dev/null ++++ b/tests/topotests/bgp_evpn_mh_v4_v6_num/ipv6/hostd12/frr.conf +@@ -0,0 +1,6 @@ ++frr defaults datacenter ++service integrated-vtysh-config ++hostname hostd12 ++log syslog informational ++! ++end +diff --git a/tests/topotests/bgp_evpn_mh_v4_v6_num/ipv6/hostd21/frr.conf b/tests/topotests/bgp_evpn_mh_v4_v6_num/ipv6/hostd21/frr.conf +new file mode 100644 +index 000000000..3851c1898 +--- /dev/null ++++ b/tests/topotests/bgp_evpn_mh_v4_v6_num/ipv6/hostd21/frr.conf +@@ -0,0 +1,6 @@ ++frr defaults datacenter ++service integrated-vtysh-config ++hostname hostd21 ++log syslog informational ++! ++end +diff --git a/tests/topotests/bgp_evpn_mh_v4_v6_num/ipv6/hostd22/frr.conf b/tests/topotests/bgp_evpn_mh_v4_v6_num/ipv6/hostd22/frr.conf +new file mode 100644 +index 000000000..c4e90312d +--- /dev/null ++++ b/tests/topotests/bgp_evpn_mh_v4_v6_num/ipv6/hostd22/frr.conf +@@ -0,0 +1,6 @@ ++frr defaults datacenter ++service integrated-vtysh-config ++hostname hostd22 ++log syslog informational ++! ++end +diff --git a/tests/topotests/bgp_evpn_mh_v4_v6_num/ipv6/leaf1/frr.conf b/tests/topotests/bgp_evpn_mh_v4_v6_num/ipv6/leaf1/frr.conf +new file mode 100644 +index 000000000..e3befec25 +--- /dev/null ++++ b/tests/topotests/bgp_evpn_mh_v4_v6_num/ipv6/leaf1/frr.conf +@@ -0,0 +1,74 @@ ++frr defaults datacenter ++service integrated-vtysh-config ++hostname leaf1 ++log syslog informational ++! ++interface lo ++ description Loopback ++ ip address 10.0.0.13/32 ++ ipv6 address 2001:db8:200::13/128 ++! ++interface leaf1-eth0 ++ description leaf1-eth0 -> spine1-eth0 ++ ipv6 address 2001:db8:50::0/127 ++! ++interface leaf1-eth1 ++ description leaf1-eth1 -> spine2-eth0 ++ ipv6 address 2001:db8:60::0/127 ++! ++interface leaf1-eth2 ++ description leaf1-eth2 -> torm11-eth0 ++ ipv6 address 2001:db8:1::1/127 ++! ++interface leaf1-eth3 ++ description leaf1-eth3 -> torm12-eth0 ++ ipv6 address 2001:db8:2::1/127 ++! ++interface leaf1-eth4 ++ description leaf1-eth4 -> torm21-eth0 ++ ipv6 address 2001:db8:3::1/127 ++! ++interface leaf1-eth5 ++ description leaf1-eth5 -> torm22-eth0 ++ ipv6 address 2001:db8:4::1/127 ++! ++router bgp 65101 ++ bgp router-id 10.0.0.13 ++ bgp bestpath as-path multipath-relax ++ no bgp default ipv4-unicast ++ neighbor SPINE peer-group ++ neighbor SPINE remote-as 65001 ++ neighbor SPINE capability extended-nexthop ++ neighbor SPINE timers 3 10 ++ neighbor TOR peer-group ++ neighbor TOR capability extended-nexthop ++ neighbor TOR timers 3 10 ++ neighbor 2001:db8:50::1 peer-group SPINE ++ neighbor 2001:db8:60::1 peer-group SPINE ++ neighbor 2001:db8:1::0 remote-as 65002 ++ neighbor 2001:db8:1::0 peer-group TOR ++ neighbor 2001:db8:2::0 remote-as 65003 ++ neighbor 2001:db8:2::0 peer-group TOR ++ neighbor 2001:db8:3::0 remote-as 65004 ++ neighbor 2001:db8:3::0 peer-group TOR ++ neighbor 2001:db8:4::0 remote-as 65005 ++ neighbor 2001:db8:4::0 peer-group TOR ++ ! ++ address-family ipv4 unicast ++ neighbor SPINE activate ++ neighbor TOR activate ++ redistribute connected ++ exit-address-family ++ ! ++ address-family ipv6 unicast ++ neighbor SPINE activate ++ neighbor TOR activate ++ redistribute connected ++ exit-address-family ++ ! ++ address-family l2vpn evpn ++ neighbor SPINE activate ++ neighbor TOR activate ++ exit-address-family ++! ++end +diff --git a/tests/topotests/bgp_evpn_mh_v4_v6_num/ipv6/leaf2/frr.conf b/tests/topotests/bgp_evpn_mh_v4_v6_num/ipv6/leaf2/frr.conf +new file mode 100644 +index 000000000..edbf97a38 +--- /dev/null ++++ b/tests/topotests/bgp_evpn_mh_v4_v6_num/ipv6/leaf2/frr.conf +@@ -0,0 +1,74 @@ ++frr defaults datacenter ++service integrated-vtysh-config ++hostname leaf2 ++log syslog informational ++! ++interface lo ++ description Loopback ++ ip address 10.0.0.14/32 ++ ipv6 address 2001:db8:200::14/128 ++! ++interface leaf2-eth0 ++ description leaf2-eth0 -> spine1-eth1 ++ ipv6 address 2001:db8:51::0/127 ++! ++interface leaf2-eth1 ++ description leaf2-eth1 -> spine2-eth1 ++ ipv6 address 2001:db8:61::0/127 ++! ++interface leaf2-eth2 ++ description leaf2-eth2 -> torm11-eth1 ++ ipv6 address 2001:db8:5::1/127 ++! ++interface leaf2-eth3 ++ description leaf2-eth3 -> torm12-eth1 ++ ipv6 address 2001:db8:6::1/127 ++! ++interface leaf2-eth4 ++ description leaf2-eth4 -> torm21-eth1 ++ ipv6 address 2001:db8:7::1/127 ++! ++interface leaf2-eth5 ++ description leaf2-eth5 -> torm22-eth1 ++ ipv6 address 2001:db8:8::1/127 ++! ++router bgp 65101 ++ bgp router-id 10.0.0.14 ++ bgp bestpath as-path multipath-relax ++ no bgp default ipv4-unicast ++ neighbor SPINE peer-group ++ neighbor SPINE remote-as 65001 ++ neighbor SPINE capability extended-nexthop ++ neighbor SPINE timers 3 10 ++ neighbor TOR peer-group ++ neighbor TOR capability extended-nexthop ++ neighbor TOR timers 3 10 ++ neighbor 2001:db8:51::1 peer-group SPINE ++ neighbor 2001:db8:61::1 peer-group SPINE ++ neighbor 2001:db8:5::0 remote-as 65002 ++ neighbor 2001:db8:5::0 peer-group TOR ++ neighbor 2001:db8:6::0 remote-as 65003 ++ neighbor 2001:db8:6::0 peer-group TOR ++ neighbor 2001:db8:7::0 remote-as 65004 ++ neighbor 2001:db8:7::0 peer-group TOR ++ neighbor 2001:db8:8::0 remote-as 65005 ++ neighbor 2001:db8:8::0 peer-group TOR ++ ! ++ address-family ipv4 unicast ++ neighbor SPINE activate ++ neighbor TOR activate ++ redistribute connected ++ exit-address-family ++ ! ++ address-family ipv6 unicast ++ neighbor SPINE activate ++ neighbor TOR activate ++ redistribute connected ++ exit-address-family ++ ! ++ address-family l2vpn evpn ++ neighbor SPINE activate ++ neighbor TOR activate ++ exit-address-family ++! ++end +diff --git a/tests/topotests/bgp_evpn_mh_v4_v6_num/ipv6/spine1/frr.conf b/tests/topotests/bgp_evpn_mh_v4_v6_num/ipv6/spine1/frr.conf +new file mode 100644 +index 000000000..0e72b82dd +--- /dev/null ++++ b/tests/topotests/bgp_evpn_mh_v4_v6_num/ipv6/spine1/frr.conf +@@ -0,0 +1,47 @@ ++frr defaults datacenter ++service integrated-vtysh-config ++hostname spine1 ++log syslog informational ++! ++interface lo ++ description Loopback ++ ip address 10.0.0.13/32 ++ ipv6 address 2001:db8:100::13/128 ++! ++interface spine1-eth0 ++ description spine1-eth0 -> leaf1-eth0 ++ ipv6 address 2001:db8:50::1/127 ++! ++interface spine1-eth1 ++ description spine1-eth1 -> leaf2-eth0 ++ ipv6 address 2001:db8:51::1/127 ++! ++router bgp 65001 ++ bgp router-id 10.0.0.13 ++ bgp bestpath as-path multipath-relax ++ no bgp default ipv4-unicast ++ neighbor 2001:db8:50::0 remote-as 65101 ++ neighbor 2001:db8:50::0 capability extended-nexthop ++ neighbor 2001:db8:50::0 timers 3 10 ++ neighbor 2001:db8:51::0 remote-as 65101 ++ neighbor 2001:db8:51::0 capability extended-nexthop ++ neighbor 2001:db8:51::0 timers 3 10 ++ ! ++ address-family ipv4 unicast ++ neighbor 2001:db8:50::0 activate ++ neighbor 2001:db8:51::0 activate ++ redistribute connected ++ exit-address-family ++ ! ++ address-family ipv6 unicast ++ neighbor 2001:db8:50::0 activate ++ neighbor 2001:db8:51::0 activate ++ redistribute connected ++ exit-address-family ++ ! ++ address-family l2vpn evpn ++ neighbor 2001:db8:50::0 activate ++ neighbor 2001:db8:51::0 activate ++ exit-address-family ++! ++end +diff --git a/tests/topotests/bgp_evpn_mh_v4_v6_num/ipv6/spine2/frr.conf b/tests/topotests/bgp_evpn_mh_v4_v6_num/ipv6/spine2/frr.conf +new file mode 100644 +index 000000000..92125024e +--- /dev/null ++++ b/tests/topotests/bgp_evpn_mh_v4_v6_num/ipv6/spine2/frr.conf +@@ -0,0 +1,47 @@ ++frr defaults datacenter ++service integrated-vtysh-config ++hostname spine2 ++log syslog informational ++! ++interface lo ++ description Loopback ++ ip address 10.0.0.14/32 ++ ipv6 address 2001:db8:100::14/128 ++! ++interface spine2-eth0 ++ description spine2-eth0 -> leaf1-eth1 ++ ipv6 address 2001:db8:60::1/127 ++! ++interface spine2-eth1 ++ description spine2-eth1 -> leaf2-eth1 ++ ipv6 address 2001:db8:61::1/127 ++! ++router bgp 65001 ++ bgp router-id 10.0.0.14 ++ bgp bestpath as-path multipath-relax ++ no bgp default ipv4-unicast ++ neighbor 2001:db8:60::0 remote-as 65101 ++ neighbor 2001:db8:60::0 capability extended-nexthop ++ neighbor 2001:db8:60::0 timers 3 10 ++ neighbor 2001:db8:61::0 remote-as 65101 ++ neighbor 2001:db8:61::0 capability extended-nexthop ++ neighbor 2001:db8:61::0 timers 3 10 ++ ! ++ address-family ipv4 unicast ++ neighbor 2001:db8:60::0 activate ++ neighbor 2001:db8:61::0 activate ++ redistribute connected ++ exit-address-family ++ ! ++ address-family ipv6 unicast ++ neighbor 2001:db8:60::0 activate ++ neighbor 2001:db8:61::0 activate ++ redistribute connected ++ exit-address-family ++ ! ++ address-family l2vpn evpn ++ neighbor 2001:db8:60::0 activate ++ neighbor 2001:db8:61::0 activate ++ exit-address-family ++! ++end +diff --git a/tests/topotests/bgp_evpn_mh_v4_v6_num/ipv6/torm11/frr.conf b/tests/topotests/bgp_evpn_mh_v4_v6_num/ipv6/torm11/frr.conf +new file mode 100644 +index 000000000..d26e44a74 +--- /dev/null ++++ b/tests/topotests/bgp_evpn_mh_v4_v6_num/ipv6/torm11/frr.conf +@@ -0,0 +1,107 @@ ++frr defaults datacenter ++service integrated-vtysh-config ++hostname torm11 ++log syslog ++log timestamp precision 6 ++! ++! debug bgp evpn mh es ++! debug bgp evpn mh route ++! debug bgp zebra ++! debug zebra evpn mh es ++! debug zebra evpn mh mac ++! debug zebra evpn mh neigh ++! debug zebra evpn mh nh ++! debug zebra vxlan ++! ++evpn mh startup-delay 1 ++! ++router pim6 ++ join-prune-interval 5 ++! ++interface lo ++ description Loopback VTEP ++ ip address 10.0.0.15/32 ++ ipv6 address 2001:db8:100::15/128 ++! ++interface torm11-eth0 ++ description torm11-eth0 -> leaf1-eth2 ++ ipv6 address 2001:db8:1::0/127 ++ ipv6 pim ++ evpn mh uplink ++! ++interface torm11-eth1 ++ description torm11-eth1 -> leaf2-eth2 ++ ipv6 address 2001:db8:5::0/127 ++ ipv6 pim ++ evpn mh uplink ++! ++interface hostbond1 ++ evpn mh es-id 1 ++ evpn mh es-sys-mac 44:38:39:ff:ff:01 ++! ++interface hostbond2 ++ evpn mh es-id 2 ++ evpn mh es-sys-mac 44:38:39:ff:ff:01 ++! ++interface ipmr-lo ++ ipv6 pim ++! ++interface vlan4000 ++ description L3VNI interface for VRF vrf1 ++! ++vrf vrf1 ++ vni 4000 ++! ++route-map ALLOW_LO permit 10 ++ match interface lo ++exit ++! ++router bgp 65002 ++ bgp router-id 10.0.0.15 ++ bgp bestpath as-path multipath-relax ++ no bgp ebgp-requires-policy ++ no bgp default ipv4-unicast ++ neighbor 2001:db8:1::1 remote-as 65101 ++ neighbor 2001:db8:1::1 capability extended-nexthop ++ neighbor 2001:db8:1::1 timers 3 10 ++ neighbor 2001:db8:5::1 remote-as 65101 ++ neighbor 2001:db8:5::1 capability extended-nexthop ++ neighbor 2001:db8:5::1 timers 3 10 ++ ! ++ address-family ipv4 unicast ++ neighbor 2001:db8:1::1 activate ++ neighbor 2001:db8:5::1 activate ++ redistribute connected route-map ALLOW_LO ++ exit-address-family ++ ! ++ address-family ipv6 unicast ++ neighbor 2001:db8:1::1 activate ++ neighbor 2001:db8:5::1 activate ++ redistribute connected route-map ALLOW_LO ++ exit-address-family ++ ! ++ address-family l2vpn evpn ++ neighbor 2001:db8:1::1 activate ++ neighbor 2001:db8:5::1 activate ++ advertise-all-vni ++ advertise-svi-ip ++ advertise-default-gw ++ exit-address-family ++! ++!router bgp 65002 vrf vrf1 ++! bgp router-id 10.0.0.15 ++! ! ++! address-family ipv4 unicast ++! redistribute connected ++! exit-address-family ++! ! ++! address-family ipv6 unicast ++! redistribute connected ++! exit-address-family ++! ! ++! address-family l2vpn evpn ++! advertise ipv4 unicast ++! advertise ipv6 unicast ++! exit-address-family ++! ++end +diff --git a/tests/topotests/bgp_evpn_mh_v4_v6_num/ipv6/torm12/frr.conf b/tests/topotests/bgp_evpn_mh_v4_v6_num/ipv6/torm12/frr.conf +new file mode 100644 +index 000000000..a78f36869 +--- /dev/null ++++ b/tests/topotests/bgp_evpn_mh_v4_v6_num/ipv6/torm12/frr.conf +@@ -0,0 +1,107 @@ ++frr defaults datacenter ++service integrated-vtysh-config ++hostname torm12 ++log syslog ++log timestamp precision 6 ++! ++! debug bgp evpn mh es ++! debug bgp evpn mh route ++! debug bgp zebra ++! debug zebra evpn mh es ++! debug zebra evpn mh mac ++! debug zebra evpn mh neigh ++! debug zebra evpn mh nh ++! debug zebra vxlan ++! ++evpn mh startup-delay 1 ++! ++router pim6 ++ join-prune-interval 5 ++! ++interface lo ++ description Loopback VTEP ++ ip address 10.0.0.16/32 ++ ipv6 address 2001:db8:100::16/128 ++! ++interface torm12-eth0 ++ description torm12-eth0 -> leaf1-eth3 ++ ipv6 address 2001:db8:2::0/127 ++ ipv6 pim ++ evpn mh uplink ++! ++interface torm12-eth1 ++ description torm12-eth1 -> leaf2-eth3 ++ ipv6 address 2001:db8:6::0/127 ++ ipv6 pim ++ evpn mh uplink ++! ++interface hostbond1 ++ evpn mh es-id 1 ++ evpn mh es-sys-mac 44:38:39:ff:ff:01 ++! ++interface hostbond2 ++ evpn mh es-id 2 ++ evpn mh es-sys-mac 44:38:39:ff:ff:01 ++! ++interface ipmr-lo ++ ipv6 pim ++! ++interface vlan4000 ++ description L3VNI interface for VRF vrf1 ++! ++vrf vrf1 ++ vni 4000 ++! ++route-map ALLOW_LO permit 10 ++ match interface lo ++exit ++! ++router bgp 65003 ++ bgp router-id 10.0.0.16 ++ bgp bestpath as-path multipath-relax ++ no bgp ebgp-requires-policy ++ no bgp default ipv4-unicast ++ neighbor 2001:db8:2::1 remote-as 65101 ++ neighbor 2001:db8:2::1 capability extended-nexthop ++ neighbor 2001:db8:2::1 timers 3 10 ++ neighbor 2001:db8:6::1 remote-as 65101 ++ neighbor 2001:db8:6::1 capability extended-nexthop ++ neighbor 2001:db8:6::1 timers 3 10 ++ ! ++ address-family ipv4 unicast ++ neighbor 2001:db8:2::1 activate ++ neighbor 2001:db8:6::1 activate ++ redistribute connected route-map ALLOW_LO ++ exit-address-family ++ ! ++ address-family ipv6 unicast ++ neighbor 2001:db8:2::1 activate ++ neighbor 2001:db8:6::1 activate ++ redistribute connected route-map ALLOW_LO ++ exit-address-family ++ ! ++ address-family l2vpn evpn ++ neighbor 2001:db8:2::1 activate ++ neighbor 2001:db8:6::1 activate ++ advertise-all-vni ++ advertise-svi-ip ++ advertise-default-gw ++ exit-address-family ++! ++!router bgp 65003 vrf vrf1 ++! bgp router-id 10.0.0.16 ++! ! ++! address-family ipv4 unicast ++! redistribute connected ++! exit-address-family ++! ! ++! address-family ipv6 unicast ++! redistribute connected ++! exit-address-family ++! ! ++! address-family l2vpn evpn ++! advertise ipv4 unicast ++! advertise ipv6 unicast ++! exit-address-family ++! ++end +diff --git a/tests/topotests/bgp_evpn_mh_v4_v6_num/ipv6/torm21/frr.conf b/tests/topotests/bgp_evpn_mh_v4_v6_num/ipv6/torm21/frr.conf +new file mode 100644 +index 000000000..56c074389 +--- /dev/null ++++ b/tests/topotests/bgp_evpn_mh_v4_v6_num/ipv6/torm21/frr.conf +@@ -0,0 +1,107 @@ ++frr defaults datacenter ++service integrated-vtysh-config ++hostname torm21 ++log syslog ++log timestamp precision 6 ++! ++! debug bgp evpn mh es ++! debug bgp evpn mh route ++! debug bgp zebra ++! debug zebra evpn mh es ++! debug zebra evpn mh mac ++! debug zebra evpn mh neigh ++! debug zebra evpn mh nh ++! debug zebra vxlan ++! ++evpn mh startup-delay 1 ++! ++router pim6 ++ join-prune-interval 5 ++! ++interface lo ++ description Loopback VTEP ++ ip address 10.0.0.17/32 ++ ipv6 address 2001:db8:100::17/128 ++! ++interface torm21-eth0 ++ description torm21-eth0 -> leaf1-eth4 ++ ipv6 address 2001:db8:3::0/127 ++ ipv6 pim ++ evpn mh uplink ++! ++interface torm21-eth1 ++ description torm21-eth1 -> leaf2-eth4 ++ ipv6 address 2001:db8:7::0/127 ++ ipv6 pim ++ evpn mh uplink ++! ++interface hostbond1 ++ evpn mh es-id 1 ++ evpn mh es-sys-mac 44:38:39:ff:ff:02 ++! ++interface hostbond2 ++ evpn mh es-id 2 ++ evpn mh es-sys-mac 44:38:39:ff:ff:02 ++! ++interface ipmr-lo ++ ipv6 pim ++! ++interface vlan4000 ++ description L3VNI interface for VRF vrf1 ++! ++vrf vrf1 ++ vni 4000 ++! ++route-map ALLOW_LO permit 10 ++ match interface lo ++exit ++! ++router bgp 65004 ++ bgp router-id 10.0.0.17 ++ bgp bestpath as-path multipath-relax ++ no bgp ebgp-requires-policy ++ no bgp default ipv4-unicast ++ neighbor 2001:db8:3::1 remote-as 65101 ++ neighbor 2001:db8:3::1 capability extended-nexthop ++ neighbor 2001:db8:3::1 timers 3 10 ++ neighbor 2001:db8:7::1 remote-as 65101 ++ neighbor 2001:db8:7::1 capability extended-nexthop ++ neighbor 2001:db8:7::1 timers 3 10 ++ ! ++ address-family ipv4 unicast ++ neighbor 2001:db8:3::1 activate ++ neighbor 2001:db8:7::1 activate ++ redistribute connected route-map ALLOW_LO ++ exit-address-family ++ ! ++ address-family ipv6 unicast ++ neighbor 2001:db8:3::1 activate ++ neighbor 2001:db8:7::1 activate ++ redistribute connected route-map ALLOW_LO ++ exit-address-family ++ ! ++ address-family l2vpn evpn ++ neighbor 2001:db8:3::1 activate ++ neighbor 2001:db8:7::1 activate ++ advertise-all-vni ++ advertise-svi-ip ++ advertise-default-gw ++ exit-address-family ++! ++!router bgp 65004 vrf vrf1 ++! bgp router-id 10.0.0.17 ++! ! ++! address-family ipv4 unicast ++! redistribute connected ++! exit-address-family ++! ! ++! address-family ipv6 unicast ++! redistribute connected ++! exit-address-family ++! ! ++! address-family l2vpn evpn ++! advertise ipv4 unicast ++! advertise ipv6 unicast ++! exit-address-family ++! ++end +diff --git a/tests/topotests/bgp_evpn_mh_v4_v6_num/ipv6/torm22/frr.conf b/tests/topotests/bgp_evpn_mh_v4_v6_num/ipv6/torm22/frr.conf +new file mode 100644 +index 000000000..e15f0c53c +--- /dev/null ++++ b/tests/topotests/bgp_evpn_mh_v4_v6_num/ipv6/torm22/frr.conf +@@ -0,0 +1,107 @@ ++frr defaults datacenter ++service integrated-vtysh-config ++hostname torm22 ++log syslog ++log timestamp precision 6 ++! ++! debug bgp evpn mh es ++! debug bgp evpn mh route ++! debug bgp zebra ++! debug zebra evpn mh es ++! debug zebra evpn mh mac ++! debug zebra evpn mh neigh ++! debug zebra evpn mh nh ++! debug zebra vxlan ++! ++evpn mh startup-delay 1 ++! ++router pim6 ++ join-prune-interval 5 ++! ++interface lo ++ description Loopback VTEP ++ ip address 10.0.0.18/32 ++ ipv6 address 2001:db8:100::18/128 ++! ++interface torm22-eth0 ++ description torm22-eth0 -> leaf1-eth5 ++ ipv6 address 2001:db8:4::0/127 ++ ipv6 pim ++ evpn mh uplink ++! ++interface torm22-eth1 ++ description torm22-eth1 -> leaf2-eth5 ++ ipv6 address 2001:db8:8::0/127 ++ ipv6 pim ++ evpn mh uplink ++! ++interface hostbond1 ++ evpn mh es-id 1 ++ evpn mh es-sys-mac 44:38:39:ff:ff:02 ++! ++interface hostbond2 ++ evpn mh es-id 2 ++ evpn mh es-sys-mac 44:38:39:ff:ff:02 ++! ++interface ipmr-lo ++ ipv6 pim ++! ++interface vlan4000 ++ description L3VNI interface for VRF vrf1 ++! ++vrf vrf1 ++ vni 4000 ++! ++route-map ALLOW_LO permit 10 ++ match interface lo ++exit ++! ++router bgp 65005 ++ bgp router-id 10.0.0.18 ++ bgp bestpath as-path multipath-relax ++ no bgp ebgp-requires-policy ++ no bgp default ipv4-unicast ++ neighbor 2001:db8:4::1 remote-as 65101 ++ neighbor 2001:db8:4::1 capability extended-nexthop ++ neighbor 2001:db8:4::1 timers 3 10 ++ neighbor 2001:db8:8::1 remote-as 65101 ++ neighbor 2001:db8:8::1 capability extended-nexthop ++ neighbor 2001:db8:8::1 timers 3 10 ++ ! ++ address-family ipv4 unicast ++ neighbor 2001:db8:4::1 activate ++ neighbor 2001:db8:8::1 activate ++ redistribute connected route-map ALLOW_LO ++ exit-address-family ++ ! ++ address-family ipv6 unicast ++ neighbor 2001:db8:4::1 activate ++ neighbor 2001:db8:8::1 activate ++ redistribute connected route-map ALLOW_LO ++ exit-address-family ++ ! ++ address-family l2vpn evpn ++ neighbor 2001:db8:4::1 activate ++ neighbor 2001:db8:8::1 activate ++ advertise-all-vni ++ advertise-svi-ip ++ advertise-default-gw ++ exit-address-family ++! ++! router bgp 65005 vrf vrf1 ++! bgp router-id 10.0.0.18 ++! ! ++! address-family ipv4 unicast ++! redistribute connected ++! exit-address-family ++! ! ++! address-family ipv6 unicast ++! redistribute connected ++! exit-address-family ++! ! ++! address-family l2vpn evpn ++! advertise ipv4 unicast ++! advertise ipv6 unicast ++! exit-address-family ++! ++end +diff --git a/tests/topotests/bgp_evpn_mh_v4_v6_num/test_evpn_mh_v4_v6_num.py b/tests/topotests/bgp_evpn_mh_v4_v6_num/test_evpn_mh_v4_v6_num.py +new file mode 100644 +index 000000000..54e71eee7 +--- /dev/null ++++ b/tests/topotests/bgp_evpn_mh_v4_v6_num/test_evpn_mh_v4_v6_num.py +@@ -0,0 +1,966 @@ ++#!/usr/bin/env python ++# SPDX-License-Identifier: ISC ++ ++# ++# test_evpn_mh_v6_numbered.py ++# ++# Copyright (c) 2020 by ++# Nvidia Corporation ++# Chirag Shah ++# Copyright (c) 2025 by ++# IPv6 VTEP EBGP Numbered Extensions ++# ++ ++""" ++test_evpn_mh_v6_numbered.py: Testing EVPN multihoming with IPv6 VTEP addresses ++and EBGP numbered peering ++ ++This is an IPv6 VTEP variant with EBGP numbered peering and unified FRR config ++""" ++ ++import os ++import sys ++import subprocess ++from functools import partial ++ ++import pytest ++import json ++import platform ++import time ++ ++pytestmark = [pytest.mark.bgpd, pytest.mark.pim6d, pytest.mark.evpn] ++ ++# Save the Current Working Directory to find configuration files. ++CWD = os.path.dirname(os.path.realpath(__file__)) ++sys.path.append(os.path.join(CWD, "../")) ++ ++# pylint: disable=C0413 ++# Import topogen and topotest helpers ++from lib import topotest ++ ++# Required to instantiate the topology builder class. ++from lib.topogen import Topogen, TopoRouter, get_topogen ++from lib.topolog import logger ++ ++##################################################### ++## ++## Network Topology Definition ++## ++## Same topology as test_evpn_mh.py but with IPv6 VTEP addresses ++## and EBGP numbered peering ++##################################################### ++ ++ ++def build_topo(tgen): ++ """ ++ EVPN Multihoming Topology - ++ 1. Two level CLOS ++ 2. Two spine switches - spine1, spine2 ++ 3. Two leaf switches - leaf1, leaf2 ++ 4. Two racks with Top-of-Rack switches per rack - tormx1, tormx2 ++ 5. Two dual attached hosts per-rack - hostdx1, hostdx2 ++ """ ++ ++ tgen.add_router("spine1") ++ tgen.add_router("spine2") ++ tgen.add_router("leaf1") ++ tgen.add_router("leaf2") ++ tgen.add_router("torm11") ++ tgen.add_router("torm12") ++ tgen.add_router("torm21") ++ tgen.add_router("torm22") ++ tgen.add_router("hostd11") ++ tgen.add_router("hostd12") ++ tgen.add_router("hostd21") ++ tgen.add_router("hostd22") ++ ++ ##################### spine1 ######################## ++ # spine1-eth0 is connected to leaf1-eth0 ++ switch = tgen.add_switch("sw1") ++ switch.add_link(tgen.gears["spine1"]) ++ switch.add_link(tgen.gears["leaf1"]) ++ ++ # spine1-eth1 is connected to leaf2-eth0 ++ switch = tgen.add_switch("sw2") ++ switch.add_link(tgen.gears["spine1"]) ++ switch.add_link(tgen.gears["leaf2"]) ++ ++ # spine2-eth0 is connected to leaf1-eth1 ++ switch = tgen.add_switch("sw3") ++ switch.add_link(tgen.gears["spine2"]) ++ switch.add_link(tgen.gears["leaf1"]) ++ ++ # spine2-eth1 is connected to leaf2-eth1 ++ switch = tgen.add_switch("sw4") ++ switch.add_link(tgen.gears["spine2"]) ++ switch.add_link(tgen.gears["leaf2"]) ++ ++ ################## leaf1 ########################## ++ # leaf1-eth2 is connected to torm11-eth0 ++ switch = tgen.add_switch("sw5") ++ switch.add_link(tgen.gears["leaf1"]) ++ switch.add_link(tgen.gears["torm11"]) ++ ++ # leaf1-eth3 is connected to torm12-eth0 ++ switch = tgen.add_switch("sw6") ++ switch.add_link(tgen.gears["leaf1"]) ++ switch.add_link(tgen.gears["torm12"]) ++ ++ # leaf1-eth4 is connected to torm21-eth0 ++ switch = tgen.add_switch("sw7") ++ switch.add_link(tgen.gears["leaf1"]) ++ switch.add_link(tgen.gears["torm21"]) ++ ++ # leaf1-eth5 is connected to torm22-eth0 ++ switch = tgen.add_switch("sw8") ++ switch.add_link(tgen.gears["leaf1"]) ++ switch.add_link(tgen.gears["torm22"]) ++ ++ ##################### leaf2 ######################## ++ # leaf2-eth2 is connected to torm11-eth1 ++ switch = tgen.add_switch("sw9") ++ switch.add_link(tgen.gears["leaf2"]) ++ switch.add_link(tgen.gears["torm11"]) ++ ++ # leaf2-eth3 is connected to torm12-eth1 ++ switch = tgen.add_switch("sw10") ++ switch.add_link(tgen.gears["leaf2"]) ++ switch.add_link(tgen.gears["torm12"]) ++ ++ # leaf2-eth4 is connected to torm21-eth1 ++ switch = tgen.add_switch("sw11") ++ switch.add_link(tgen.gears["leaf2"]) ++ switch.add_link(tgen.gears["torm21"]) ++ ++ # leaf2-eth5 is connected to torm22-eth1 ++ switch = tgen.add_switch("sw12") ++ switch.add_link(tgen.gears["leaf2"]) ++ switch.add_link(tgen.gears["torm22"]) ++ ++ ##################### torm11 ######################## ++ # torm11-eth2 is connected to hostd11-eth0 ++ switch = tgen.add_switch("sw13") ++ switch.add_link(tgen.gears["torm11"]) ++ switch.add_link(tgen.gears["hostd11"]) ++ ++ # torm11-eth3 is connected to hostd12-eth0 ++ switch = tgen.add_switch("sw14") ++ switch.add_link(tgen.gears["torm11"]) ++ switch.add_link(tgen.gears["hostd12"]) ++ ++ ##################### torm12 ######################## ++ # torm12-eth2 is connected to hostd11-eth1 ++ switch = tgen.add_switch("sw15") ++ switch.add_link(tgen.gears["torm12"]) ++ switch.add_link(tgen.gears["hostd11"]) ++ ++ # torm12-eth3 is connected to hostd12-eth1 ++ switch = tgen.add_switch("sw16") ++ switch.add_link(tgen.gears["torm12"]) ++ switch.add_link(tgen.gears["hostd12"]) ++ ++ ##################### torm21 ######################## ++ # torm21-eth2 is connected to hostd21-eth0 ++ switch = tgen.add_switch("sw17") ++ switch.add_link(tgen.gears["torm21"]) ++ switch.add_link(tgen.gears["hostd21"]) ++ ++ # torm21-eth3 is connected to hostd22-eth0 ++ switch = tgen.add_switch("sw18") ++ switch.add_link(tgen.gears["torm21"]) ++ switch.add_link(tgen.gears["hostd22"]) ++ ++ ##################### torm22 ######################## ++ # torm22-eth2 is connected to hostd21-eth1 ++ switch = tgen.add_switch("sw19") ++ switch.add_link(tgen.gears["torm22"]) ++ switch.add_link(tgen.gears["hostd21"]) ++ ++ # torm22-eth3 is connected to hostd22-eth1 ++ switch = tgen.add_switch("sw20") ++ switch.add_link(tgen.gears["torm22"]) ++ switch.add_link(tgen.gears["hostd22"]) ++ ++ ++##################################################### ++## ++## Tests starting ++## ++##################################################### ++ ++# IPv6 VTEP addresses ++tor_ips = { ++ "torm11": "2001:db8:100::15", ++ "torm12": "2001:db8:100::16", ++ "torm21": "2001:db8:100::17", ++ "torm22": "2001:db8:100::18", ++} ++ ++svi_ips = { ++ "torm11": "2001:db8:45::2", ++ "torm12": "2001:db8:45::3", ++ "torm21": "2001:db8:45::4", ++ "torm22": "2001:db8:45::5", ++} ++ ++tor_ips_rack_1 = {"torm11": "2001:db8:100::15", "torm12": "2001:db8:100::16"} ++ ++tor_ips_rack_2 = {"torm21": "2001:db8:100::17", "torm22": "2001:db8:100::18"} ++ ++host_es_map = { ++ "hostd11": "03:44:38:39:ff:ff:01:00:00:01", ++ "hostd12": "03:44:38:39:ff:ff:01:00:00:02", ++ "hostd21": "03:44:38:39:ff:ff:02:00:00:01", ++ "hostd22": "03:44:38:39:ff:ff:02:00:00:02", ++} ++ ++ ++def config_bond(node, bond_name, bond_members, bond_ad_sys_mac, br): ++ """ ++ Used to setup bonds on the TORs and hosts for MH ++ """ ++ node.run("ip link add dev %s type bond mode 802.3ad" % bond_name) ++ node.run("ip link set dev %s type bond lacp_rate 1" % bond_name) ++ node.run("ip link set dev %s type bond miimon 100" % bond_name) ++ node.run("ip link set dev %s type bond xmit_hash_policy layer3+4" % bond_name) ++ node.run("ip link set dev %s type bond min_links 1" % bond_name) ++ node.run( ++ "ip link set dev %s type bond ad_actor_system %s" % (bond_name, bond_ad_sys_mac) ++ ) ++ ++ for bond_member in bond_members: ++ node.run("ip link set dev %s down" % bond_member) ++ node.run("ip link set dev %s master %s" % (bond_member, bond_name)) ++ node.run("ip link set dev %s up" % bond_member) ++ ++ node.run("ip link set dev %s up" % bond_name) ++ ++ # if bridge is specified add the bond as a bridge member ++ if br: ++ node.run(" ip link set dev %s master bridge" % bond_name) ++ node.run("/sbin/bridge link set dev %s priority 8" % bond_name) ++ node.run("/sbin/bridge vlan del vid 1 dev %s" % bond_name) ++ node.run("/sbin/bridge vlan del vid 1 untagged pvid dev %s" % bond_name) ++ node.run("/sbin/bridge vlan add vid 1000 dev %s" % bond_name) ++ node.run("/sbin/bridge vlan add vid 1000 untagged pvid dev %s" % bond_name) ++ ++ ++def config_mcast_tunnel_termination_device(node): ++ """ ++ The kernel requires a device to terminate VxLAN multicast tunnels ++ when EVPN-PIM is used for flooded traffic ++ """ ++ node.run("ip link add dev ipmr-lo type dummy") ++ node.run("ip link set dev ipmr-lo mtu 16000") ++ node.run("ip link set dev ipmr-lo mode dormant") ++ node.run("ip link set dev ipmr-lo up") ++ ++ ++def config_bridge(node): ++ """ ++ Create a VLAN aware bridge ++ """ ++ node.run("ip link add dev bridge type bridge stp_state 0") ++ node.run("ip link set dev bridge type bridge vlan_filtering 1") ++ node.run("ip link set dev bridge mtu 9216") ++ node.run("ip link set dev bridge type bridge ageing_time 1800") ++ node.run("ip link set dev bridge type bridge mcast_snooping 0") ++ node.run("ip link set dev bridge type bridge vlan_stats_enabled 1") ++ node.run("ip link set dev bridge up") ++ node.run("/sbin/bridge vlan add vid 1000 dev bridge self") ++ ++ ++def config_vxlan(node, node_ip): ++ """ ++ Create a VxLAN device for VNI 1000 and add it to the bridge. ++ VLAN-1000 is mapped to VNI-1000. ++ Uses IPv6 VTEP address and IPv6 multicast group. ++ """ ++ # Create VXLAN with IPv6 local address and multicast group ++ node.run( ++ "ip link add dev vx-1000 type vxlan id 1000 dstport 4789 local %s dev ipmr-lo group ff0e::100 nolearning ttl 64" ++ % node_ip ++ ) ++ node.run("ip link set dev vx-1000 mtu 9152") ++ node.run("ip link set dev vx-1000 up") ++ ++ # bridge attrs ++ node.run("ip link set dev vx-1000 master bridge") ++ node.run("/sbin/bridge link set dev vx-1000 neigh_suppress on") ++ node.run("/sbin/bridge link set dev vx-1000 learning off") ++ node.run("/sbin/bridge link set dev vx-1000 priority 8") ++ node.run("/sbin/bridge vlan del vid 1 dev vx-1000") ++ node.run("/sbin/bridge vlan del vid 1 untagged pvid dev vx-1000") ++ node.run("/sbin/bridge vlan add vid 1000 dev vx-1000") ++ node.run("/sbin/bridge vlan add vid 1000 untagged pvid dev vx-1000") ++ ++ ++def config_l3vni(node, node_ip): ++ """ ++ Create L3VNI infrastructure for VRF vrf1 with L3VNI 4000. ++ VLAN-4000 is mapped to VNI-4000. ++ Uses IPv6 VTEP address and IPv6 multicast group. ++ """ ++ # Create L3VNI VXLAN device ++ node.run( ++ "ip link add dev vx-4000 type vxlan id 4000 dstport 4789 local %s dev ipmr-lo group ff0e::4000 nolearning ttl 64" ++ % node_ip ++ ) ++ node.run("ip link set dev vx-4000 mtu 9152") ++ node.run("ip link set dev vx-4000 up") ++ ++ # bridge attrs - Add L3VNI VXLAN to bridge ++ node.run("ip link set dev vx-4000 master bridge") ++ node.run("/sbin/bridge link set dev vx-4000 neigh_suppress on") ++ node.run("/sbin/bridge link set dev vx-4000 learning off") ++ node.run("/sbin/bridge link set dev vx-4000 priority 8") ++ node.run("/sbin/bridge vlan del vid 1 dev vx-4000") ++ node.run("/sbin/bridge vlan del vid 1 untagged pvid dev vx-4000") ++ node.run("/sbin/bridge vlan add vid 4000 dev vx-4000") ++ node.run("/sbin/bridge vlan add vid 4000 untagged pvid dev vx-4000") ++ ++ # Add VLAN 4000 to bridge for L3VNI ++ node.run("/sbin/bridge vlan add vid 4000 dev bridge self") ++ ++ ++def config_svi(node, svi_pip): ++ """ ++ Create an SVI for VLAN 1000 with IPv6 addressing ++ """ ++ node.run("ip link add link bridge name vlan1000 type vlan id 1000 protocol 802.1q") ++ node.run("ip -6 addr add %s/64 dev vlan1000" % svi_pip) ++ node.run("ip link set dev vlan1000 up") ++ node.run("/sbin/sysctl net.ipv6.conf.vlan1000.accept_dad=0") ++ node.run("/sbin/sysctl net.ipv6.conf.vlan1000.dad_transmits=0") ++ node.run("ip link add link vlan1000 name vlan1000-v0 type macvlan mode private") ++ node.run("/sbin/sysctl net.ipv6.conf.vlan1000-v0.accept_dad=0") ++ node.run("/sbin/sysctl net.ipv6.conf.vlan1000-v0.dad_transmits=0") ++ node.run("ip link set dev vlan1000-v0 address 00:00:5e:00:01:01") ++ node.run("ip link set dev vlan1000-v0 up") ++ node.run("ip -6 addr add 2001:db8:45::1/64 dev vlan1000-v0") ++ ++ ++def config_vrf_l3vni(node): ++ """ ++ Create VRF vrf1 and L3VNI VLAN interface for L3VNI 4000 ++ """ ++ # Create VRF vrf1 with table 1001 ++ node.run("ip link add vrf1 type vrf table 1001") ++ node.run("ip link set dev vrf1 up") ++ ++ # Create L3VNI VLAN interface (vlan4000) for VNI 4000 ++ node.run("ip link add link bridge name vlan4000 type vlan id 4000 protocol 802.1q") ++ node.run("ip link set dev vlan4000 master vrf1") ++ node.run("ip link set dev vlan4000 up") ++ node.run("/sbin/sysctl net.ipv6.conf.vlan4000.accept_dad=0") ++ node.run("/sbin/sysctl net.ipv6.conf.vlan4000.dad_transmits=0") ++ ++ ++def config_tor(tor_name, tor, tor_ip, svi_pip): ++ """ ++ Create the bond/vxlan-bridge on the TOR which acts as VTEP and EPN-PE ++ """ ++ # Add IPv4 and IPv6 addresses to loopback interface for VTEP ++ # These must be added before creating VXLAN device ++ # They match the addresses in frr.conf for consistency ++ tor_id = tor_name.replace("torm", "") # Extract number: 11, 12, 21, 22 ++ if tor_id == "11": ++ ipv4_lo = "10.0.0.15" ++ elif tor_id == "12": ++ ipv4_lo = "10.0.0.16" ++ elif tor_id == "21": ++ ipv4_lo = "10.0.0.17" ++ elif tor_id == "22": ++ ipv4_lo = "10.0.0.18" ++ ++ tor.run("ip addr add %s/32 dev lo" % ipv4_lo) ++ tor.run("ip -6 addr add %s/128 dev lo" % tor_ip) ++ ++ # create a device for terminating VxLAN multicast tunnels ++ config_mcast_tunnel_termination_device(tor) ++ ++ # create a vlan aware bridge ++ config_bridge(tor) ++ ++ # create vxlan device and add it to bridge ++ config_vxlan(tor, tor_ip) ++ ++ # create L3VNI infrastructure (VRF vrf1 with L3VNI 4000) ++ config_l3vni(tor, tor_ip) ++ config_vrf_l3vni(tor) ++ ++ # create hostbonds and add them to the bridge ++ if "torm1" in tor_name: ++ sys_mac = "44:38:39:ff:ff:01" ++ else: ++ sys_mac = "44:38:39:ff:ff:02" ++ bond_member = tor_name + "-eth2" ++ config_bond(tor, "hostbond1", [bond_member], sys_mac, "bridge") ++ ++ bond_member = tor_name + "-eth3" ++ config_bond(tor, "hostbond2", [bond_member], sys_mac, "bridge") ++ ++ # create SVI ++ config_svi(tor, svi_pip) ++ ++ ++def config_tors(tgen, tors): ++ for tor_name in tors: ++ tor = tgen.gears[tor_name] ++ config_tor(tor_name, tor, tor_ips.get(tor_name), svi_ips.get(tor_name)) ++ ++ ++def compute_host_ip_mac(host_name): ++ host_id = host_name.split("hostd")[1] ++ host_ip = "2001:db8:45::" + host_id + "/64" ++ host_mac = "00:00:00:00:00:" + host_id ++ ++ return host_ip, host_mac ++ ++ ++def config_host(host_name, host): ++ """ ++ Create the dual-attached bond on host nodes for MH ++ """ ++ bond_members = [] ++ bond_members.append(host_name + "-eth0") ++ bond_members.append(host_name + "-eth1") ++ bond_name = "torbond" ++ config_bond(host, bond_name, bond_members, "00:00:00:00:00:00", None) ++ ++ host_ip, host_mac = compute_host_ip_mac(host_name) ++ host.run("ip addr add %s dev %s" % (host_ip, bond_name)) ++ host.run("ip link set dev %s address %s" % (bond_name, host_mac)) ++ ++ ++def config_hosts(tgen, hosts): ++ for host_name in hosts: ++ host = tgen.gears[host_name] ++ config_host(host_name, host) ++ ++ ++def disable_dad_on_all_interfaces(tgen): ++ """ ++ Disable DAD (Duplicate Address Detection) on all interfaces for all routers. ++ This is necessary to prevent IPv6 address installation failures in test environments. ++ """ ++ router_list = tgen.routers() ++ for rname, router in router_list.items(): ++ # Disable DAD globally for all interfaces ++ router.run("/sbin/sysctl -w net.ipv6.conf.all.accept_dad=0 2>/dev/null || true") ++ router.run( ++ "/sbin/sysctl -w net.ipv6.conf.all.dad_transmits=0 2>/dev/null || true" ++ ) ++ router.run( ++ "/sbin/sysctl -w net.ipv6.conf.default.accept_dad=0 2>/dev/null || true" ++ ) ++ router.run( ++ "/sbin/sysctl -w net.ipv6.conf.default.dad_transmits=0 2>/dev/null || true" ++ ) ++ ++ # Get list of all interfaces and disable DAD on each ++ try: ++ # Get all interfaces ++ output = router.run( ++ "ip link show | grep -E '^[0-9]+:' | awk -F': ' '{print $2}' | awk '{print $1}'" ++ ) ++ interfaces = [line.strip() for line in output.split("\n") if line.strip()] ++ ++ for intf in interfaces: ++ # Skip loopback and special interfaces ++ if intf in ["lo", "ipmr-lo"]: ++ continue ++ # Disable DAD on this interface ++ router.run( ++ "/sbin/sysctl -w net.ipv6.conf.{}.accept_dad=0 2>/dev/null || true".format( ++ intf ++ ) ++ ) ++ router.run( ++ "/sbin/sysctl -w net.ipv6.conf.{}.dad_transmits=0 2>/dev/null || true".format( ++ intf ++ ) ++ ) ++ except Exception as e: ++ logger.warning( ++ "Failed to disable DAD on interfaces for {}: {}".format(rname, e) ++ ) ++ ++ ++@pytest.fixture(scope="module", params=["ipv4", "ipv6"]) ++def tgen_and_ip_version(request): ++ """ ++ Parametrized fixture to run the multihoming topology with IPv4 or IPv6 underlay. ++ ++ For now only the IPv6 underlay is implemented; the IPv4 variant is skipped ++ until dedicated configs and host plumbing are added. ++ """ ++ ++ ip_version = request.param ++ ++ if ip_version == "ipv4": ++ pytest.skip("IPv4 underlay is not yet implemented for this topology") ++ ++ # Build topology ++ tgen = Topogen(build_topo, request.module.__name__) ++ tgen.start_topology() ++ ++ # Basic kernel requirement check (same as original test) ++ krel = platform.release() ++ if topotest.version_cmp(krel, "4.19") < 0: ++ tgen.errors = "kernel 4.19 needed for multihoming tests" ++ pytest.skip(tgen.errors) ++ ++ # Configure TORs and hosts (IPv6-only for now) ++ tors = ["torm11", "torm12", "torm21", "torm22"] ++ config_tors(tgen, tors) ++ ++ # CRITICAL: Enable IPv6 and disable DAD BEFORE starting daemons ++ # This must be done before zebra tries to configure IPv6 addresses ++ router_list = tgen.routers() ++ for rname, router in router_list.items(): ++ # Enable IPv6 forwarding first ++ router.run("sysctl -w net.ipv6.conf.all.forwarding=1") ++ router.run("sysctl -w net.ipv6.conf.default.forwarding=1") ++ # Disable DAD globally to prevent address configuration delays/failures ++ router.run("sysctl -w net.ipv6.conf.all.accept_dad=0") ++ router.run("sysctl -w net.ipv6.conf.all.dad_transmits=0") ++ router.run("sysctl -w net.ipv6.conf.default.accept_dad=0") ++ router.run("sysctl -w net.ipv6.conf.default.dad_transmits=0") ++ ++ # Load unified FRR configurations using integrated-vtysh-config ++ config_dir = os.path.join(CWD, ip_version) ++ for rname, router in router_list.items(): ++ logger.info( ++ "Loading unified %s config for %s from %s", ip_version, rname, config_dir ++ ) ++ # Enable mgmtd first (required for modern FRR) ++ router.load_config(TopoRouter.RD_MGMTD, "") ++ # Load unified frr.conf from the IP-version specific config directory ++ router.load_frr_config(os.path.join(config_dir, "{}/frr.conf".format(rname))) ++ ++ logger.info("Starting all routers...") ++ tgen.start_router() ++ ++ # Give daemons a moment to stabilize ++ time.sleep(2) ++ ++ # Verify all routers started successfully ++ logger.info("Verifying router daemons started...") ++ for rname, router in router_list.items(): ++ status = router.check_router_running() ++ if status: ++ logger.error("Router %s has issues: %s", rname, status) ++ pytest.fail("Router {} failed to start properly: {}".format(rname, status)) ++ ++ # Configure hosts ++ hosts = ["hostd11", "hostd12", "hostd21", "hostd22"] ++ config_hosts(tgen, hosts) ++ ++ # Disable DAD on all interfaces (additional per-interface configuration) ++ disable_dad_on_all_interfaces(tgen) ++ ++ # Yield to tests ++ yield tgen, ip_version ++ ++ # Teardown ++ tgen.stop_topology() ++ ++ ++def check_local_es(esi, vtep_ips, dut_name, down_vteps): ++ """ ++ Check if ES peers are setup correctly on local ESs ++ """ ++ peer_ips = [] ++ if "torm1" in dut_name: ++ tor_ips_rack = tor_ips_rack_1 ++ else: ++ tor_ips_rack = tor_ips_rack_2 ++ ++ for tor_name, tor_ip in tor_ips_rack.items(): ++ if dut_name not in tor_name: ++ peer_ips.append(tor_ip) ++ ++ # remove down VTEPs from the peer check list ++ peer_set = set(peer_ips) ++ down_vtep_set = set(down_vteps) ++ peer_set = peer_set - down_vtep_set ++ ++ vtep_set = set(vtep_ips) ++ diff = peer_set.symmetric_difference(vtep_set) ++ ++ return (esi, diff) if diff else None ++ ++ ++def check_remote_es(esi, vtep_ips, dut_name, down_vteps): ++ """ ++ Verify list of PEs associated with a remote ES ++ """ ++ remote_ips = [] ++ ++ if "torm1" in dut_name: ++ tor_ips_rack = tor_ips_rack_2 ++ else: ++ tor_ips_rack = tor_ips_rack_1 ++ ++ for _, tor_ip in tor_ips_rack.items(): ++ remote_ips.append(tor_ip) ++ ++ # remove down VTEPs from the remote check list ++ remote_set = set(remote_ips) ++ down_vtep_set = set(down_vteps) ++ remote_set = remote_set - down_vtep_set ++ ++ vtep_set = set(vtep_ips) ++ diff = remote_set.symmetric_difference(vtep_set) ++ ++ return (esi, diff) if diff else None ++ ++ ++def check_es(dut): ++ """ ++ Verify list of PEs associated all ESs, local and remote ++ """ ++ bgp_es = dut.vtysh_cmd("show bgp l2vpn evpn es json") ++ bgp_es_json = json.loads(bgp_es) ++ ++ result = None ++ ++ expected_es_set = set([v for k, v in host_es_map.items()]) ++ curr_es_set = [] ++ ++ # check is ES content is correct ++ for es in bgp_es_json: ++ esi = es["esi"] ++ curr_es_set.append(esi) ++ if not es.get("type", False): ++ return None ++ types = es["type"] ++ vtep_ips = [] ++ for vtep in es.get("vteps", []): ++ vtep_ips.append(vtep["vtep_ip"]) ++ ++ if "local" in types: ++ result = check_local_es(esi, vtep_ips, dut.name, []) ++ else: ++ result = check_remote_es(esi, vtep_ips, dut.name, []) ++ ++ if result: ++ return result ++ ++ # check if all ESs are present ++ curr_es_set = set(curr_es_set) ++ result = curr_es_set.symmetric_difference(expected_es_set) ++ ++ return result if result else None ++ ++ ++def check_one_es(dut, esi, down_vteps): ++ """ ++ Verify list of PEs associated all ESs, local and remote ++ """ ++ bgp_es = dut.vtysh_cmd("show bgp l2vpn evpn es %s json" % esi) ++ es = json.loads(bgp_es) ++ ++ if not es: ++ return "esi %s not found" % esi ++ ++ esi = es["esi"] ++ if not es.get("type", False): ++ return None ++ types = es["type"] ++ vtep_ips = [] ++ for vtep in es.get("vteps", []): ++ vtep_ips.append(vtep["vtep_ip"]) ++ ++ if "local" in types: ++ result = check_local_es(esi, vtep_ips, dut.name, down_vteps) ++ else: ++ result = check_remote_es(esi, vtep_ips, dut.name, down_vteps) ++ ++ return result ++ ++ ++def test_evpn_es(tgen_and_ip_version): ++ """ ++ Two ES are setup on each rack. This test checks if - ++ 1. ES peer has been added to the local ES (via Type-1/EAD route) ++ 2. The remote ESs are setup with the right list of PEs (via Type-1) ++ """ ++ ++ tgen, ip_version = tgen_and_ip_version ++ ++ if tgen.routers_have_failure(): ++ pytest.skip(tgen.errors) ++ ++ dut_name = "torm11" ++ dut = tgen.gears[dut_name] ++ test_fn = partial(check_es, dut) ++ _, result = topotest.run_and_expect(test_fn, None, count=20, wait=3) ++ ++ assertmsg = '"{}" ES content incorrect. Result: {}'.format(dut_name, result) ++ assert result is None, assertmsg ++ ++ ++def test_evpn_ead_update(tgen_and_ip_version): ++ """ ++ Flap a host link one the remote rack and check if the EAD updates ++ are sent/processed for the corresponding ESI ++ """ ++ tgen, ip_version = tgen_and_ip_version ++ ++ if tgen.routers_have_failure(): ++ pytest.skip(tgen.errors) ++ ++ # dut on rack1 and host link flap on rack2 ++ dut_name = "torm11" ++ dut = tgen.gears[dut_name] ++ ++ remote_tor_name = "torm21" ++ remote_tor = tgen.gears[remote_tor_name] ++ ++ host_name = "hostd21" ++ host = tgen.gears[host_name] ++ esi = host_es_map.get(host_name) ++ ++ # check if the VTEP list is right to start with ++ down_vteps = [] ++ test_fn = partial(check_one_es, dut, esi, down_vteps) ++ _, result = topotest.run_and_expect(test_fn, None, count=20, wait=3) ++ assertmsg = '"{}" ES content incorrect'.format(dut_name) ++ assert result is None, assertmsg ++ ++ # down a remote host link and check if the EAD withdraw is rxed ++ # Note: LACP is not working as expected so I am temporarily shutting ++ # down the link on the remote TOR instead of the remote host ++ remote_tor.run("ip link set dev %s-%s down" % (remote_tor_name, "eth2")) ++ down_vteps.append(tor_ips.get(remote_tor_name)) ++ _, result = topotest.run_and_expect(test_fn, None, count=20, wait=3) ++ assertmsg = '"{}" ES incorrect after remote link down'.format(dut_name) ++ assert result is None, assertmsg ++ ++ # bring up remote host link and check if the EAD update is rxed ++ down_vteps.remove(tor_ips.get(remote_tor_name)) ++ remote_tor.run("ip link set dev %s-%s up" % (remote_tor_name, "eth2")) ++ _, result = topotest.run_and_expect(test_fn, None, count=20, wait=3) ++ assertmsg = '"{}" ES incorrect after remote link flap'.format(dut_name) ++ assert result is None, assertmsg ++ ++ ++def ping_anycast_gw(tgen): ++ # ping the anycast gw from the local and remote hosts to populate ++ # the mac address on the PEs ++ intf = "torbond" ++ ipaddr = "2001:db8:45::1" ++ for name in ("hostd11", "hostd21", "hostd12", "hostd22"): ++ host = tgen.net.hosts[name] ++ # Use ping6 to trigger neighbor discovery ++ ping_cmd = "ping6 -I {} -c 1 {}".format(intf, ipaddr) ++ _, stdout, _ = host.cmd_status(ping_cmd, warn=False, stderr=subprocess.STDOUT) ++ stdout = stdout.strip() ++ if stdout: ++ host.logger.debug( ++ "%s: ping6 on %s for %s returned: %s", name, intf, ipaddr, stdout ++ ) ++ ++ ++def check_mac(dut, vni, mac, m_type, esi, intf, ping_gw=False, tgen=None): ++ """ ++ checks if mac is present and if desination matches the one provided ++ """ ++ ++ if ping_gw: ++ ping_anycast_gw(tgen) ++ ++ out = dut.vtysh_cmd("show evpn mac vni %d mac %s json" % (vni, mac)) ++ ++ tmp_esi = None ++ mac_js = json.loads(out) ++ for mac, info in mac_js.items(): ++ tmp_esi = info.get("esi", "") ++ tmp_m_type = info.get("type", "") ++ tmp_intf = info.get("intf", "") if tmp_m_type == "local" else "" ++ if tmp_esi == esi and tmp_m_type == m_type and tmp_intf == intf: ++ return None ++ ++ return "invalid vni %d mac %s expected esi %s, %s m_type %s and intf %s out %s" % ( ++ vni, ++ mac, ++ tmp_esi, ++ esi, ++ m_type, ++ intf, ++ mac_js, ++ ) ++ ++ ++def test_evpn_mac(tgen_and_ip_version): ++ """ ++ 1. Add a MAC on hostd11 and check if the MAC is synced between ++ torm11 and torm12. And installed as a local MAC. ++ 2. Add a MAC on hostd21 and check if the MAC is installed as a ++ remote MAC on torm11 and torm12 ++ """ ++ ++ tgen, ip_version = tgen_and_ip_version ++ ++ local_host = tgen.gears["hostd11"] ++ remote_host = tgen.gears["hostd21"] ++ tors = [] ++ tors.append(tgen.gears["torm11"]) ++ tors.append(tgen.gears["torm12"]) ++ ++ vni = 1000 ++ ++ # check if the rack-1 host MAC is present on all rack-1 PEs ++ # and points to local access port ++ m_type = "local" ++ _, mac = compute_host_ip_mac(local_host.name) ++ esi = host_es_map.get(local_host.name) ++ intf = "hostbond1" ++ ++ for tor in tors: ++ test_fn = partial(check_mac, tor, vni, mac, m_type, esi, intf, True, tgen) ++ _, result = topotest.run_and_expect(test_fn, None, count=20, wait=3) ++ assertmsg = '"{}" local MAC content incorrect'.format(tor.name) ++ assert result is None, assertmsg ++ ++ # check if the rack-2 host MAC is present on all rack-1 PEs ++ # and points to the remote ES destination ++ m_type = "remote" ++ _, mac = compute_host_ip_mac(remote_host.name) ++ esi = host_es_map.get(remote_host.name) ++ intf = "" ++ ++ for tor in tors: ++ test_fn = partial(check_mac, tor, vni, mac, m_type, esi, intf) ++ _, result = topotest.run_and_expect(test_fn, None, count=20, wait=3) ++ assertmsg = '"{}" remote MAC content incorrect'.format(tor.name) ++ assert result is None, assertmsg ++ ++ ++def check_df_role(dut, esi, role): ++ """ ++ Return error string if the df role on the dut is different ++ """ ++ es_json = dut.vtysh_cmd("show evpn es %s json" % esi) ++ es = json.loads(es_json) ++ ++ if not es: ++ return "esi %s not found" % esi ++ ++ flags = es.get("flags", []) ++ curr_role = "nonDF" if "nonDF" in flags else "DF" ++ ++ if curr_role != role: ++ return "%s is %s for %s" % (dut.name, curr_role, esi) ++ ++ return None ++ ++ ++def test_evpn_df(tgen_and_ip_version): ++ """ ++ 1. Check the DF role on all the PEs on rack-1. ++ 2. Increase the DF preference on the non-DF and check if it becomes ++ the DF winner. ++ """ ++ ++ tgen, ip_version = tgen_and_ip_version ++ ++ if tgen.routers_have_failure(): ++ pytest.skip(tgen.errors) ++ ++ # We will run the tests on just one ES ++ esi = host_es_map.get("hostd11") ++ intf = "hostbond1" ++ ++ tors = [] ++ tors.append(tgen.gears["torm11"]) ++ tors.append(tgen.gears["torm12"]) ++ df_node = "torm11" ++ ++ # check roles on rack-1 ++ for tor in tors: ++ role = "DF" if tor.name == df_node else "nonDF" ++ test_fn = partial(check_df_role, tor, esi, role) ++ _, result = topotest.run_and_expect(test_fn, None, count=20, wait=3) ++ assertmsg = '"{}" DF role incorrect'.format(tor.name) ++ assert result is None, assertmsg ++ ++ # change df preference on the nonDF to make it the df ++ torm12 = tgen.gears["torm12"] ++ torm12.vtysh_cmd("conf\ninterface %s\nevpn mh es-df-pref %d" % (intf, 60000)) ++ df_node = "torm12" ++ ++ # re-check roles on rack-1; we should have a new winner ++ for tor in tors: ++ role = "DF" if tor.name == df_node else "nonDF" ++ test_fn = partial(check_df_role, tor, esi, role) ++ _, result = topotest.run_and_expect(test_fn, None, count=20, wait=3) ++ assertmsg = '"{}" DF role incorrect'.format(tor.name) ++ assert result is None, assertmsg ++ ++ ++def check_protodown_rc(dut, protodown_rc): ++ """ ++ check if specified protodown reason code is set ++ """ ++ ++ out = dut.vtysh_cmd("show evpn json") ++ ++ evpn_js = json.loads(out) ++ tmp_rc = evpn_js.get("protodownReasons", []) ++ ++ if protodown_rc: ++ if protodown_rc not in tmp_rc: ++ return "protodown %s missing in %s" % (protodown_rc, tmp_rc) ++ else: ++ if tmp_rc: ++ return "unexpected protodown rc %s" % (tmp_rc) ++ ++ return None ++ ++ ++def test_evpn_uplink_tracking(tgen_and_ip_version): ++ """ ++ 1. Wait for access ports to come out of startup-delay ++ 2. disable uplinks and check if access ports have been protodowned ++ 3. enable uplinks and check if access ports have been moved out ++ of protodown ++ """ ++ ++ tgen, ip_version = tgen_and_ip_version ++ ++ dut_name = "torm11" ++ dut = tgen.gears[dut_name] ++ ++ # wait for protodown rc to clear after startup ++ test_fn = partial(check_protodown_rc, dut, None) ++ _, result = topotest.run_and_expect(test_fn, None, count=20, wait=3) ++ assertmsg = '"{}" protodown rc incorrect'.format(dut_name) ++ assert result is None, assertmsg ++ ++ # disable the uplinks ++ dut.run("ip link set %s-eth0 down" % dut_name) ++ dut.run("ip link set %s-eth1 down" % dut_name) ++ ++ # check if the access ports have been protodowned ++ test_fn = partial(check_protodown_rc, dut, "uplinkDown") ++ _, result = topotest.run_and_expect(test_fn, None, count=20, wait=3) ++ assertmsg = '"{}" protodown rc incorrect'.format(dut_name) ++ assert result is None, assertmsg ++ ++ # enable the uplinks ++ dut.run("ip link set %s-eth0 up" % dut_name) ++ dut.run("ip link set %s-eth1 up" % dut_name) ++ ++ # check if the access ports have been moved out of protodown ++ test_fn = partial(check_protodown_rc, dut, None) ++ _, result = topotest.run_and_expect(test_fn, None, count=20, wait=3) ++ assertmsg = '"{}" protodown rc incorrect'.format(dut_name) ++ assert result is None, assertmsg ++ ++ ++if __name__ == "__main__": ++ args = ["-s"] + sys.argv[1:] ++ sys.exit(pytest.main(args)) +-- +2.43.0 + diff --git a/src/sonic-frr/patch/0057-tests-EVPNv6-MH-load-torm11-cfg-using-frr-reload.patch b/src/sonic-frr/patch/0057-tests-EVPNv6-MH-load-torm11-cfg-using-frr-reload.patch new file mode 100644 index 00000000000..497a9e2e71c --- /dev/null +++ b/src/sonic-frr/patch/0057-tests-EVPNv6-MH-load-torm11-cfg-using-frr-reload.patch @@ -0,0 +1,100 @@ +From e58fa08f24cf8590d3cfcb989fa83bf0f2574db6 Mon Sep 17 00:00:00 2001 +From: Chirag Shah +Date: Tue, 25 Nov 2025 10:06:22 -0800 +Subject: tests: EVPNv6 MH load torm11 cfg using frr-reload + +On torm-11 load the frr.conf using frr-reload script. +For this pass to topogen a flag to skip loading +vtysh -f frr.conf file for a given DUT based on the flag. + +Signed-off-by: Chirag Shah +(cherry picked from commit 34adbcfff2c975c4d93b4400c3f6013cd70c3cf9) +Signed-off-by: Tamer Ahmed + +diff --git a/tests/topotests/bgp_evpn_mh_v4_v6_num/test_evpn_mh_v4_v6_num.py b/tests/topotests/bgp_evpn_mh_v4_v6_num/test_evpn_mh_v4_v6_num.py +index 54e71eee7..6f6cc283a 100644 +--- a/tests/topotests/bgp_evpn_mh_v4_v6_num/test_evpn_mh_v4_v6_num.py ++++ b/tests/topotests/bgp_evpn_mh_v4_v6_num/test_evpn_mh_v4_v6_num.py +@@ -539,6 +539,12 @@ def tgen_and_ip_version(request): + # Load unified frr.conf from the IP-version specific config directory + router.load_frr_config(os.path.join(config_dir, "{}/frr.conf".format(rname))) + ++ # For torm11 we want to exercise config application via frr-reload.py ++ # instead of the default "vtysh -f /etc/frr/frr.conf" path in Router.startRouter. ++ torm11 = router_list.get("torm11") ++ if torm11 is not None: ++ torm11.skip_unified_vtysh = True ++ + logger.info("Starting all routers...") + tgen.start_router() + +@@ -553,6 +559,30 @@ def tgen_and_ip_version(request): + logger.error("Router %s has issues: %s", rname, status) + pytest.fail("Router {} failed to start properly: {}".format(rname, status)) + ++ # Explicitly exercise frr-reload on torm11 using the unified frr.conf. ++ # Run this inside the torm11 namespace so that vtysh talks to the correct daemons. ++ if torm11 is not None: ++ logger.info("Running frr-reload.py on torm11 unified config") ++ cmd = "/usr/lib/frr/frr-reload.py --reload /etc/frr/frr.conf" ++ # Run inside the torm11 namespace (TopoRouter.net is the underlying node) ++ rc, out, err = torm11.net.cmd_status(cmd, warn=False) ++ if rc: ++ logger.error( ++ "frr-reload failed on torm11 (rc=%s): stdout=%s stderr=%s", ++ rc, ++ out, ++ err, ++ ) ++ pytest.fail("frr-reload failed on torm11 (rc={})".format(rc)) ++ ++ # Sanity check that all expected daemons on torm11 are still healthy ++ status = torm11.check_router_running() ++ if status: ++ logger.error("Router torm11 has issues after frr-reload: %s", status) ++ pytest.fail( ++ "Router torm11 failed health-check after frr-reload: {}".format(status) ++ ) ++ + # Configure hosts + hosts = ["hostd11", "hostd12", "hostd21", "hostd22"] + config_hosts(tgen, hosts) +diff --git a/tests/topotests/lib/topotest.py b/tests/topotests/lib/topotest.py +index 420511295..f6872d0a6 100644 +--- a/tests/topotests/lib/topotest.py ++++ b/tests/topotests/lib/topotest.py +@@ -1489,6 +1489,11 @@ class Router(Node): + self.hasmpls = False + self.routertype = "frr" + self.unified_config = False ++ # Control how unified configs are initially rendered. By default we ++ # render /etc/frr/frr.conf via "vtysh -f" after daemons are up. ++ # Individual tests can override this flag (e.g., to drive config via ++ # tools/frr-reload.py instead). ++ self.skip_unified_vtysh = False + self.daemons = { + "zebra": 0, + "ripd": 0, +@@ -1902,7 +1907,18 @@ class Router(Node): + ) + return "Datastores are locked, cannot proceed with config load" + +- self.cmd("vtysh -f /etc/frr/frr.conf") ++ # By default, render frr.conf into the running config via vtysh. ++ # Tests that want to drive config via frr-reload.py (or other ++ # mechanisms) can set skip_unified_vtysh = True on the router ++ # instance before calling start_router(). ++ if not self.skip_unified_vtysh: ++ self.cmd("vtysh -f /etc/frr/frr.conf") ++ else: ++ logger.info( ++ "%s: skipping initial 'vtysh -f /etc/frr/frr.conf'; " ++ "config will be applied externally (e.g., via frr-reload.py)", ++ self.name, ++ ) + + return status + +-- +2.43.0 + diff --git a/src/sonic-frr/patch/0058-tests-EVPNv6-MH-use-linux-cmds-for-intf-addr.patch b/src/sonic-frr/patch/0058-tests-EVPNv6-MH-use-linux-cmds-for-intf-addr.patch new file mode 100644 index 00000000000..96e870f3000 --- /dev/null +++ b/src/sonic-frr/patch/0058-tests-EVPNv6-MH-use-linux-cmds-for-intf-addr.patch @@ -0,0 +1,175 @@ +From f62aba32db6d128cb9c36547889bc7a5be664c35 Mon Sep 17 00:00:00 2001 +From: Chirag Shah +Date: Tue, 25 Nov 2025 12:18:45 -0800 +Subject: tests: EVPNv6 MH use linux cmds for intf addr + +When configuring interface ip from frr.conf using +frr-reload there is a timing involved bgp is not +receiving fast enough either ipv4 or ipv6 address, +which leads to an issue where ipv4 route over ipv6 +bgp peer, uses the v4 mapped v6 address and route +becomes unreachable at the remote bgp peer end. + +To fix the timing configure ip address using +linux iproute2 commands. + +Signed-off-by: Chirag Shah +(cherry picked from commit 525eafb9a3dd708960afd37aea8bb682e9825e08) +Signed-off-by: Tamer Ahmed + +diff --git a/tests/topotests/bgp_evpn_mh_v4_v6_num/ipv6/torm11/frr.conf b/tests/topotests/bgp_evpn_mh_v4_v6_num/ipv6/torm11/frr.conf +index d26e44a74..d11fe495d 100644 +--- a/tests/topotests/bgp_evpn_mh_v4_v6_num/ipv6/torm11/frr.conf ++++ b/tests/topotests/bgp_evpn_mh_v4_v6_num/ipv6/torm11/frr.conf +@@ -20,18 +20,14 @@ router pim6 + ! + interface lo + description Loopback VTEP +- ip address 10.0.0.15/32 +- ipv6 address 2001:db8:100::15/128 + ! + interface torm11-eth0 + description torm11-eth0 -> leaf1-eth2 +- ipv6 address 2001:db8:1::0/127 + ipv6 pim + evpn mh uplink + ! + interface torm11-eth1 + description torm11-eth1 -> leaf2-eth2 +- ipv6 address 2001:db8:5::0/127 + ipv6 pim + evpn mh uplink + ! +diff --git a/tests/topotests/bgp_evpn_mh_v4_v6_num/ipv6/torm12/frr.conf b/tests/topotests/bgp_evpn_mh_v4_v6_num/ipv6/torm12/frr.conf +index a78f36869..230f89bbd 100644 +--- a/tests/topotests/bgp_evpn_mh_v4_v6_num/ipv6/torm12/frr.conf ++++ b/tests/topotests/bgp_evpn_mh_v4_v6_num/ipv6/torm12/frr.conf +@@ -20,18 +20,14 @@ router pim6 + ! + interface lo + description Loopback VTEP +- ip address 10.0.0.16/32 +- ipv6 address 2001:db8:100::16/128 + ! + interface torm12-eth0 + description torm12-eth0 -> leaf1-eth3 +- ipv6 address 2001:db8:2::0/127 + ipv6 pim + evpn mh uplink + ! + interface torm12-eth1 + description torm12-eth1 -> leaf2-eth3 +- ipv6 address 2001:db8:6::0/127 + ipv6 pim + evpn mh uplink + ! +diff --git a/tests/topotests/bgp_evpn_mh_v4_v6_num/ipv6/torm21/frr.conf b/tests/topotests/bgp_evpn_mh_v4_v6_num/ipv6/torm21/frr.conf +index 56c074389..9f033311b 100644 +--- a/tests/topotests/bgp_evpn_mh_v4_v6_num/ipv6/torm21/frr.conf ++++ b/tests/topotests/bgp_evpn_mh_v4_v6_num/ipv6/torm21/frr.conf +@@ -20,18 +20,14 @@ router pim6 + ! + interface lo + description Loopback VTEP +- ip address 10.0.0.17/32 +- ipv6 address 2001:db8:100::17/128 + ! + interface torm21-eth0 + description torm21-eth0 -> leaf1-eth4 +- ipv6 address 2001:db8:3::0/127 + ipv6 pim + evpn mh uplink + ! + interface torm21-eth1 + description torm21-eth1 -> leaf2-eth4 +- ipv6 address 2001:db8:7::0/127 + ipv6 pim + evpn mh uplink + ! +diff --git a/tests/topotests/bgp_evpn_mh_v4_v6_num/ipv6/torm22/frr.conf b/tests/topotests/bgp_evpn_mh_v4_v6_num/ipv6/torm22/frr.conf +index e15f0c53c..acdb013a7 100644 +--- a/tests/topotests/bgp_evpn_mh_v4_v6_num/ipv6/torm22/frr.conf ++++ b/tests/topotests/bgp_evpn_mh_v4_v6_num/ipv6/torm22/frr.conf +@@ -20,18 +20,14 @@ router pim6 + ! + interface lo + description Loopback VTEP +- ip address 10.0.0.18/32 +- ipv6 address 2001:db8:100::18/128 + ! + interface torm22-eth0 + description torm22-eth0 -> leaf1-eth5 +- ipv6 address 2001:db8:4::0/127 + ipv6 pim + evpn mh uplink + ! + interface torm22-eth1 + description torm22-eth1 -> leaf2-eth5 +- ipv6 address 2001:db8:8::0/127 + ipv6 pim + evpn mh uplink + ! +diff --git a/tests/topotests/bgp_evpn_mh_v4_v6_num/test_evpn_mh_v4_v6_num.py b/tests/topotests/bgp_evpn_mh_v4_v6_num/test_evpn_mh_v4_v6_num.py +index 6f6cc283a..3578de8e8 100644 +--- a/tests/topotests/bgp_evpn_mh_v4_v6_num/test_evpn_mh_v4_v6_num.py ++++ b/tests/topotests/bgp_evpn_mh_v4_v6_num/test_evpn_mh_v4_v6_num.py +@@ -214,6 +214,29 @@ host_es_map = { + "hostd22": "03:44:38:39:ff:ff:02:00:00:02", + } + ++# Underlay IPv6 addresses for TOR uplink interfaces. These mirror the interface ++# addresses configured in the per-router frr.conf files, but are applied early ++# using Linux iproute2 so that zebra/BGP always see stable interface addresses, ++# even when configuration is loaded via tools/frr-reload.py. ++tor_uplink_ipv6 = { ++ "torm11": { ++ "torm11-eth0": "2001:db8:1::0/127", ++ "torm11-eth1": "2001:db8:5::0/127", ++ }, ++ "torm12": { ++ "torm12-eth0": "2001:db8:2::0/127", ++ "torm12-eth1": "2001:db8:6::0/127", ++ }, ++ "torm21": { ++ "torm21-eth0": "2001:db8:3::0/127", ++ "torm21-eth1": "2001:db8:7::0/127", ++ }, ++ "torm22": { ++ "torm22-eth0": "2001:db8:4::0/127", ++ "torm22-eth1": "2001:db8:8::0/127", ++ }, ++} ++ + + def config_bond(node, bond_name, bond_members, bond_ad_sys_mac, br): + """ +@@ -361,8 +384,9 @@ def config_tor(tor_name, tor, tor_ip, svi_pip): + Create the bond/vxlan-bridge on the TOR which acts as VTEP and EPN-PE + """ + # Add IPv4 and IPv6 addresses to loopback interface for VTEP +- # These must be added before creating VXLAN device +- # They match the addresses in frr.conf for consistency ++ # These must be added before creating VXLAN device. ++ # They match the addresses in frr.conf for consistency and are applied ++ # via Linux iproute2 so that zebra/BGP learn them from the kernel. + tor_id = tor_name.replace("torm", "") # Extract number: 11, 12, 21, 22 + if tor_id == "11": + ipv4_lo = "10.0.0.15" +@@ -376,6 +400,14 @@ def config_tor(tor_name, tor, tor_ip, svi_pip): + tor.run("ip addr add %s/32 dev lo" % ipv4_lo) + tor.run("ip -6 addr add %s/128 dev lo" % tor_ip) + ++ # Add IPv6 underlay addresses on uplink interfaces using iproute2 as well. ++ # This avoids timing/race issues where, when using frr-reload.py, BGP may ++ # come up before interface addresses have been fully programmed by zebra ++ # from the FRR config, leading to incorrect (e.g. IPv4-mapped IPv6) nexthops. ++ uplinks = tor_uplink_ipv6.get(tor_name, {}) ++ for ifname, prefix in uplinks.items(): ++ tor.run("ip -6 addr add %s dev %s" % (prefix, ifname)) ++ + # create a device for terminating VxLAN multicast tunnels + config_mcast_tunnel_termination_device(tor) + +-- +2.43.0 + diff --git a/src/sonic-frr/patch/0059-tests-EVPNv6-MH-v6-vtep-aware-check-ip-addr-after-cf.patch b/src/sonic-frr/patch/0059-tests-EVPNv6-MH-v6-vtep-aware-check-ip-addr-after-cf.patch new file mode 100644 index 00000000000..0003d8f3e13 --- /dev/null +++ b/src/sonic-frr/patch/0059-tests-EVPNv6-MH-v6-vtep-aware-check-ip-addr-after-cf.patch @@ -0,0 +1,179 @@ +From 551d4a5b66427ca5527a543465ac01f44ede31eb Mon Sep 17 00:00:00 2001 +From: Chirag Shah +Date: Tue, 25 Nov 2025 12:39:01 -0800 +Subject: tests: EVPNv6 MH v6 vtep aware check ip addr after cfg + +Router instance to provide a knob to skip +flushing all interface ips when router instance +is created. + +Check bgp peer state and underlay network +right after torm-11 configured using +frr-reload script. + +Signed-off-by: Chirag Shah +(cherry picked from commit 1b07568a648f277275c5f46188e5bdd5940f32be) +Signed-off-by: Tamer Ahmed + +diff --git a/tests/topotests/bgp_evpn_mh_v4_v6_num/test_evpn_mh_v4_v6_num.py b/tests/topotests/bgp_evpn_mh_v4_v6_num/test_evpn_mh_v4_v6_num.py +index 3578de8e8..5642258d3 100644 +--- a/tests/topotests/bgp_evpn_mh_v4_v6_num/test_evpn_mh_v4_v6_num.py ++++ b/tests/topotests/bgp_evpn_mh_v4_v6_num/test_evpn_mh_v4_v6_num.py +@@ -22,6 +22,7 @@ import os + import sys + import subprocess + from functools import partial ++from ipaddress import ip_network + + import pytest + import json +@@ -238,6 +239,60 @@ tor_uplink_ipv6 = { + } + + ++def _normalize_prefix_for_ip_show(prefix): ++ """ ++ Given a prefix string as used in `ip -6 addr add` (e.g. "2001:db8:1::0/127"), ++ return the normalized form that `ip -6 addr show` prints (e.g. "2001:db8:1::/127"). ++ """ ++ try: ++ net = ip_network(prefix, strict=False) ++ return str(net) ++ except ValueError: ++ # Fallback: just return what we were given ++ return prefix ++ ++ ++def check_underlay_and_bgp_ipv6(dut, lo_prefix, uplink_prefixes, neighbors): ++ """ ++ Generic helper to verify: ++ ++ - Kernel IPv6 address on loopback matches `lo_prefix` ++ - Kernel IPv6 addresses on all uplink interfaces match `uplink_prefixes` ++ - All BGP IPv6 unicast neighbors in `neighbors` are Established ++ """ ++ ++ # Check loopback IPv6 ++ lo_out = dut.run("ip -6 addr show dev lo") ++ if lo_prefix not in lo_out: ++ return f"{dut.name}: loopback IPv6 missing in kernel: {lo_out}" ++ ++ # Check uplink IPv6 addresses ++ for ifname, prefix in uplink_prefixes.items(): ++ expected = _normalize_prefix_for_ip_show(prefix) ++ out = dut.run(f"ip -6 addr show dev {ifname}") ++ if expected not in out: ++ return f"{dut.name}: {ifname} IPv6 missing in kernel: {out}" ++ ++ # Check BGP IPv6 unicast neighbors ++ summary = dut.vtysh_cmd("show bgp ipv6 unicast summary json") ++ try: ++ js = json.loads(summary) ++ except Exception as exc: # pragma: no cover - defensive ++ return f"{dut.name}: failed to parse BGP IPv6 summary json: {summary} ({exc})" ++ ++ # Prefer modern layout, fall back if needed ++ peers = js.get("ipv6Unicast", {}).get("peers") ++ if not isinstance(peers, dict): ++ peers = js.get("peers", {}) if isinstance(js.get("peers"), dict) else {} ++ ++ for neigh in neighbors: ++ state = peers.get(neigh, {}).get("state", "") ++ if state != "Established": ++ return f"{dut.name}: neighbor {neigh} not Established (state={state})" ++ ++ return None ++ ++ + def config_bond(node, bond_name, bond_members, bond_ad_sys_mac, br): + """ + Used to setup bonds on the TORs and hosts for MH +@@ -571,11 +626,23 @@ def tgen_and_ip_version(request): + # Load unified frr.conf from the IP-version specific config directory + router.load_frr_config(os.path.join(config_dir, "{}/frr.conf".format(rname))) + +- # For torm11 we want to exercise config application via frr-reload.py +- # instead of the default "vtysh -f /etc/frr/frr.conf" path in Router.startRouter. ++ # For all TORs we now manage addresses directly via Linux iproute2 in ++ # config_tor(), not via FRR interface configuration. Prevent startRouter() ++ # from flushing those kernel IPs, and for torm11 specifically, exercise ++ # config application via frr-reload.py instead of the default ++ # "vtysh -f /etc/frr/frr.conf" path in Router.startRouter. + torm11 = router_list.get("torm11") +- if torm11 is not None: +- torm11.skip_unified_vtysh = True ++ for tor_name in tors: ++ tor = router_list.get(tor_name) ++ if tor is None: ++ continue ++ # `tor` is a TopoRouter wrapper; the actual FRR router object is ++ # `tor.net` (topotest.Router). Apply flags there so that ++ # Router.startRouter() sees them. ++ nrouter = tor.net ++ nrouter.skip_remove_ips = True ++ if tor_name == "torm11": ++ nrouter.skip_unified_vtysh = True + + logger.info("Starting all routers...") + tgen.start_router() +@@ -622,6 +689,21 @@ def tgen_and_ip_version(request): + # Disable DAD on all interfaces (additional per-interface configuration) + disable_dad_on_all_interfaces(tgen) + ++ # Final underlay/BGP sanity check on torm11: verify that loopback/uplink ++ # IPv6 addresses are present in the kernel and that IPv6 BGP neighbors ++ # towards leaf1/leaf2 establish. This uses the generic helper so it can be ++ # reused for other routers/AFs if needed. ++ if torm11 is not None: ++ check_fn = partial( ++ check_underlay_and_bgp_ipv6, ++ torm11, ++ lo_prefix="2001:db8:100::15/128", ++ uplink_prefixes=tor_uplink_ipv6["torm11"], ++ neighbors=["2001:db8:1::1", "2001:db8:5::1"], ++ ) ++ _, result = topotest.run_and_expect(check_fn, None, count=20, wait=3) ++ assert result is None, "torm11 underlay/BGP sanity failed: %s" % (result,) ++ + # Yield to tests + yield tgen, ip_version + +diff --git a/tests/topotests/lib/topotest.py b/tests/topotests/lib/topotest.py +index f6872d0a6..13f079647 100644 +--- a/tests/topotests/lib/topotest.py ++++ b/tests/topotests/lib/topotest.py +@@ -1494,6 +1494,12 @@ class Router(Node): + # Individual tests can override this flag (e.g., to drive config via + # tools/frr-reload.py instead). + self.skip_unified_vtysh = False ++ # Control whether startRouter() flushes all IP addresses from kernel ++ # interfaces before daemons are started. Some tests intentionally ++ # manage all interface addresses via Linux iproute2 (not via FRR ++ # interface config); they can set this to True to prevent those ++ # addresses from being removed. ++ self.skip_remove_ips = False + self.daemons = { + "zebra": 0, + "ripd": 0, +@@ -1816,8 +1822,16 @@ class Router(Node): + # TODO remove the following lines after all tests are migrated to Topogen. + # Try to find relevant old logfiles in /tmp and delete them + map(os.remove, glob.glob("{}/{}/*.log".format(self.logdir, self.name))) +- # Remove IP addresses from OS first - we have them in zebra.conf +- self.removeIPs() ++ # Remove IP addresses from OS first - we have them in zebra.conf, unless ++ # this router is explicitly configured to manage addresses purely via ++ # Linux iproute2. ++ if not self.skip_remove_ips: ++ self.removeIPs() ++ else: ++ logger.info( ++ "%s: skipping initial IP address flush; addresses managed externally", ++ self.name, ++ ) + # If ldp is used, check for LDP to be compiled and Linux Kernel to be 4.5 or higher + # No error - but return message and skip all the tests + if self.daemons["ldpd"] == 1: +-- +2.43.0 + diff --git a/src/sonic-frr/patch/0060-bgpd-Convert-bmp-path_info-tracking-from-hash-to-rbt.patch b/src/sonic-frr/patch/0060-bgpd-Convert-bmp-path_info-tracking-from-hash-to-rbt.patch deleted file mode 100644 index 1bc9b72a76c..00000000000 --- a/src/sonic-frr/patch/0060-bgpd-Convert-bmp-path_info-tracking-from-hash-to-rbt.patch +++ /dev/null @@ -1,101 +0,0 @@ -[PATCH] bgpd: Convert bmp path_info tracking from hash to rbtree - -From: Donald Sharp -Date: Wed, 10 Sep 2025 11:04:10 -0400 -Subject: [PATCH] bgpd: Convert bmp path_info tracking from hash to rbtree - -The current implementation has this cycle: - -a) As path_info comes in, bmp_process is called, this generates -an item on a hash. This typesafe hash was automatically growing -as more path info's were received. -b) This generation of items on the hash eventually causes pullwr_run -to happen, which pulls items off the hash, encodes them and sends them -to a peer. This causes the hash to automatically shrink. - -Now imagine a scenario where you have a large number of paths being -brought in upon initial startup. Run time starts to be dominated by -the hash_grow and hash_shrink functions because it involves reallocs -and memory manipulation: - -+ 99.17% 0.00% bgpd bgpd [.] _start -+ 99.17% 0.00% bgpd libc.so.6 [.] __libc_start_main -+ 99.17% 0.00% bgpd libc.so.6 [.] 0x00007f0188f2d249 -+ 99.17% 0.00% bgpd bgpd [.] main -+ 99.17% 0.00% bgpd libfrr.so.0.0.0 [.] frr_run -+ 99.10% 0.01% bgpd libfrr.so.0.0.0 [.] event_call -+ 64.01% 0.01% bgpd bgpd [.] bgp_process_packet -+ 63.95% 0.01% bgpd bgpd [.] bgp_update_receive -+ 63.92% 0.01% bgpd bgpd [.] bgp_nlri_parse_ip -+ 63.90% 0.04% bgpd bgpd [.] bgp_update -+ 63.62% 0.00% bgpd bgpd [.] hook_call_bgp_process (inlined) -+ 63.62% 0.00% bgpd bgpd_bmp.so [.] bmp_process -+ 63.61% 0.00% bgpd bgpd_bmp.so [.] bmp_process_one (inlined) -+ 63.61% 0.00% bgpd bgpd_bmp.so [.] bmp_qhash_add (inlined) -+ 63.59% 57.66% bgpd libfrr.so.0.0.0 [.] typesafe_hash_grow -+ 34.63% 0.00% bgpd libfrr.so.0.0.0 [.] pullwr_run -+ 34.39% 0.01% bgpd bgpd_bmp.so [.] bmp_wrfill -+ 34.39% 0.00% bgpd bgpd_bmp.so [.] bmp_wrqueue (inlined) -+ 34.17% 0.00% bgpd bgpd_bmp.so [.] bmp_pull (inlined) -+ 34.17% 0.00% bgpd bgpd_bmp.so [.] bmp_pull_from_queue -+ 34.17% 0.00% bgpd bgpd_bmp.so [.] bmp_qhash_del (inlined) -+ 34.17% 32.71% bgpd libfrr.so.0.0.0 [.] typesafe_hash_shrink - -As you can see run time is spending 57.66 + 32.71% of the time in -grow/shrink cycles as each side of the event system gets to run. - -Let's just convert the system to use a RB Tree to avoid this problem. - -Signed-off-by: Donald Sharp ---- - bgpd/bgp_bmp.c | 23 +---------------------- - bgpd/bgp_bmp.h | 2 +- - 2 files changed, 2 insertions(+), 23 deletions(-) - -diff --git a/bgpd/bgp_bmp.c b/bgpd/bgp_bmp.c -index 9441b5e34..58ec73c00 100644 ---- a/bgpd/bgp_bmp.c -+++ b/bgpd/bgp_bmp.c -@@ -197,28 +197,7 @@ static int bmp_qhash_cmp(const struct bmp_queue_entry *a, - return ret; - } - --static uint32_t bmp_qhash_hkey(const struct bmp_queue_entry *e) --{ -- uint32_t key; -- -- key = prefix_hash_key((void *)&e->p); -- key = jhash(&e->peerid, -- offsetof(struct bmp_queue_entry, refcount) -- - offsetof(struct bmp_queue_entry, peerid), -- key); -- if ((e->afi == AFI_L2VPN && e->safi == SAFI_EVPN) || -- (e->safi == SAFI_MPLS_VPN)) -- key = jhash(&e->rd, -- offsetof(struct bmp_queue_entry, rd) -- - offsetof(struct bmp_queue_entry, refcount) -- + PSIZE(e->rd.prefixlen), -- key); -- -- return key; --} -- --DECLARE_HASH(bmp_qhash, struct bmp_queue_entry, bhi, -- bmp_qhash_cmp, bmp_qhash_hkey); -+DECLARE_RBTREE_UNIQ(bmp_qhash, struct bmp_queue_entry, bhi, bmp_qhash_cmp); - - static int bmp_active_cmp(const struct bmp_active *a, - const struct bmp_active *b) -diff --git a/bgpd/bgp_bmp.h b/bgpd/bgp_bmp.h -index d81b8f9b0..5d4f657ab 100644 ---- a/bgpd/bgp_bmp.h -+++ b/bgpd/bgp_bmp.h -@@ -54,7 +54,7 @@ - */ - - PREDECL_DLIST(bmp_qlist); --PREDECL_HASH(bmp_qhash); -+PREDECL_RBTREE_UNIQ(bmp_qhash); - - struct bmp_queue_entry { - struct bmp_qlist_item bli; diff --git a/src/sonic-frr/patch/0060-tests-EVPNv6-MH-v6-vtep-aware-svd-multiple-vnis.patch b/src/sonic-frr/patch/0060-tests-EVPNv6-MH-v6-vtep-aware-svd-multiple-vnis.patch new file mode 100644 index 00000000000..1a02a813746 --- /dev/null +++ b/src/sonic-frr/patch/0060-tests-EVPNv6-MH-v6-vtep-aware-svd-multiple-vnis.patch @@ -0,0 +1,384 @@ +From 41412f34a43d360f40716ed64741ee16e47575b5 Mon Sep 17 00:00:00 2001 +From: Chirag Shah +Date: Tue, 25 Nov 2025 19:58:16 -0800 +Subject: tests: EVPNv6 MH v6 vtep aware svd multiple vnis + +Signed-off-by: Chirag Shah +(cherry picked from commit 2b315a23b600059ce635bfd7fa6b38dbd9c38c2a) +Signed-off-by: Tamer Ahmed + +diff --git a/tests/topotests/bgp_evpn_mh_v4_v6_num/ipv6/torm11/frr.conf b/tests/topotests/bgp_evpn_mh_v4_v6_num/ipv6/torm11/frr.conf +index d11fe495d..b323ca30e 100644 +--- a/tests/topotests/bgp_evpn_mh_v4_v6_num/ipv6/torm11/frr.conf ++++ b/tests/topotests/bgp_evpn_mh_v4_v6_num/ipv6/torm11/frr.conf +@@ -42,11 +42,10 @@ interface hostbond2 + interface ipmr-lo + ipv6 pim + ! +-interface vlan4000 +- description L3VNI interface for VRF vrf1 +-! + vrf vrf1 + vni 4000 ++vrf vrf2 ++ vni 4001 + ! + route-map ALLOW_LO permit 10 + match interface lo +diff --git a/tests/topotests/bgp_evpn_mh_v4_v6_num/ipv6/torm12/frr.conf b/tests/topotests/bgp_evpn_mh_v4_v6_num/ipv6/torm12/frr.conf +index 230f89bbd..c3a08c25c 100644 +--- a/tests/topotests/bgp_evpn_mh_v4_v6_num/ipv6/torm12/frr.conf ++++ b/tests/topotests/bgp_evpn_mh_v4_v6_num/ipv6/torm12/frr.conf +@@ -42,12 +42,12 @@ interface hostbond2 + interface ipmr-lo + ipv6 pim + ! +-interface vlan4000 +- description L3VNI interface for VRF vrf1 +-! + vrf vrf1 + vni 4000 + ! ++vrf vrf2 ++ vni 4001 ++! + route-map ALLOW_LO permit 10 + match interface lo + exit +diff --git a/tests/topotests/bgp_evpn_mh_v4_v6_num/ipv6/torm21/frr.conf b/tests/topotests/bgp_evpn_mh_v4_v6_num/ipv6/torm21/frr.conf +index 9f033311b..d2b327340 100644 +--- a/tests/topotests/bgp_evpn_mh_v4_v6_num/ipv6/torm21/frr.conf ++++ b/tests/topotests/bgp_evpn_mh_v4_v6_num/ipv6/torm21/frr.conf +@@ -42,12 +42,12 @@ interface hostbond2 + interface ipmr-lo + ipv6 pim + ! +-interface vlan4000 +- description L3VNI interface for VRF vrf1 +-! + vrf vrf1 + vni 4000 + ! ++vrf vrf2 ++ vni 4001 ++! + route-map ALLOW_LO permit 10 + match interface lo + exit +diff --git a/tests/topotests/bgp_evpn_mh_v4_v6_num/ipv6/torm22/frr.conf b/tests/topotests/bgp_evpn_mh_v4_v6_num/ipv6/torm22/frr.conf +index acdb013a7..ee4b80917 100644 +--- a/tests/topotests/bgp_evpn_mh_v4_v6_num/ipv6/torm22/frr.conf ++++ b/tests/topotests/bgp_evpn_mh_v4_v6_num/ipv6/torm22/frr.conf +@@ -42,12 +42,12 @@ interface hostbond2 + interface ipmr-lo + ipv6 pim + ! +-interface vlan4000 +- description L3VNI interface for VRF vrf1 +-! + vrf vrf1 + vni 4000 + ! ++vrf vrf2 ++ vni 4001 ++! + route-map ALLOW_LO permit 10 + match interface lo + exit +diff --git a/tests/topotests/bgp_evpn_mh_v4_v6_num/test_evpn_mh_v4_v6_num.py b/tests/topotests/bgp_evpn_mh_v4_v6_num/test_evpn_mh_v4_v6_num.py +index 5642258d3..c832ca234 100644 +--- a/tests/topotests/bgp_evpn_mh_v4_v6_num/test_evpn_mh_v4_v6_num.py ++++ b/tests/topotests/bgp_evpn_mh_v4_v6_num/test_evpn_mh_v4_v6_num.py +@@ -336,103 +336,121 @@ def config_mcast_tunnel_termination_device(node): + + def config_bridge(node): + """ +- Create a VLAN aware bridge ++ Create a VLAN aware bridge for SVD: ++ - Single bridge `br_default` ++ - VLANs 1000–1003 (L2VNIs) and 4000/4001 (L3VNIs for vrf1/vrf2) + """ +- node.run("ip link add dev bridge type bridge stp_state 0") +- node.run("ip link set dev bridge type bridge vlan_filtering 1") +- node.run("ip link set dev bridge mtu 9216") +- node.run("ip link set dev bridge type bridge ageing_time 1800") +- node.run("ip link set dev bridge type bridge mcast_snooping 0") +- node.run("ip link set dev bridge type bridge vlan_stats_enabled 1") +- node.run("ip link set dev bridge up") +- node.run("/sbin/bridge vlan add vid 1000 dev bridge self") ++ node.run("ip link del br_default 2>/dev/null || true") ++ node.run("ip link add dev br_default type bridge stp_state 0") ++ node.run("ip link set dev br_default type bridge vlan_filtering 1") ++ node.run("ip link set dev br_default mtu 9216") ++ node.run("ip link set dev br_default type bridge ageing_time 1800") ++ node.run("ip link set dev br_default type bridge mcast_snooping 0") ++ node.run("ip link set dev br_default type bridge vlan_stats_enabled 1") ++ node.run("ip link set dev br_default up") ++ # Self VLAN entries for all L2VNIs and L3VNI VLANs ++ for vid in (1000, 1001, 1002, 1003, 4000, 4001): ++ node.run(f"/sbin/bridge vlan add vid {vid} dev br_default self") + + + def config_vxlan(node, node_ip): + """ +- Create a VxLAN device for VNI 1000 and add it to the bridge. +- VLAN-1000 is mapped to VNI-1000. +- Uses IPv6 VTEP address and IPv6 multicast group. ++ Create a Single VXLAN Device (SVD) `vxlan48` and add it to the bridge. ++ VLANs 1000–1003 (L2VNIs) and 4000/4001 (L3VNIs for vrf1/vrf2) are mapped to ++ VNIs 1000–1003 and 4000/4001 respectively via tunnel_info, following the ++ same pattern as `setup_vtep` in bgp_evpn_three_tier_clos_topo1. + """ +- # Create VXLAN with IPv6 local address and multicast group ++ # Cleanup any existing vxlan48 ++ node.run("ip link del vxlan48 2>/dev/null || true") ++ ++ # Create VXLAN with IPv6 local address; BGP EVPN will control remote ++ # endpoints via the `external` flag. + node.run( +- "ip link add dev vx-1000 type vxlan id 1000 dstport 4789 local %s dev ipmr-lo group ff0e::100 nolearning ttl 64" +- % node_ip ++ "ip link add vxlan48 type vxlan dstport 4789 local %s " ++ "nolearning external ttl 64 ageing 18000" % node_ip + ) +- node.run("ip link set dev vx-1000 mtu 9152") +- node.run("ip link set dev vx-1000 up") ++ node.run("ip link set dev vxlan48 mtu 9152") ++ node.run("ip link set dev vxlan48 master br_default") ++ # Mirror SVD behavior: enable VLAN tunneling, suppress ARP/ND, disable learning ++ node.run("/sbin/bridge link set dev vxlan48 vlan_tunnel on") ++ node.run("/sbin/bridge link set dev vxlan48 neigh_suppress on") ++ node.run("/sbin/bridge link set dev vxlan48 learning off") ++ node.run("/sbin/bridge vlan del vid 1 dev vxlan48") ++ node.run("/sbin/bridge vlan del vid 1 untagged pvid dev vxlan48") ++ ++ # Map VLANs to VNIs ++ vni_map = { ++ 1000: 1000, ++ 1001: 1001, ++ 1002: 1002, ++ 1003: 1003, ++ 4000: 4000, ++ 4001: 4001, ++ } ++ for vid, vni in vni_map.items(): ++ # First add the VLAN membership on vxlan48, then add tunnel_info id ++ node.run(f"/sbin/bridge vlan add dev vxlan48 vid {vid}") ++ node.run( ++ f"/sbin/bridge vlan add dev vxlan48 vid {vid} tunnel_info id {vni}" ++ ) + +- # bridge attrs +- node.run("ip link set dev vx-1000 master bridge") +- node.run("/sbin/bridge link set dev vx-1000 neigh_suppress on") +- node.run("/sbin/bridge link set dev vx-1000 learning off") +- node.run("/sbin/bridge link set dev vx-1000 priority 8") +- node.run("/sbin/bridge vlan del vid 1 dev vx-1000") +- node.run("/sbin/bridge vlan del vid 1 untagged pvid dev vx-1000") +- node.run("/sbin/bridge vlan add vid 1000 dev vx-1000") +- node.run("/sbin/bridge vlan add vid 1000 untagged pvid dev vx-1000") ++ node.run("ip link set dev vxlan48 up") + + + def config_l3vni(node, node_ip): + """ +- Create L3VNI infrastructure for VRF vrf1 with L3VNI 4000. +- VLAN-4000 is mapped to VNI-4000. +- Uses IPv6 VTEP address and IPv6 multicast group. ++ L3VNI is handled by VLAN 4001 mapped to VNI 4001 on `vxlan48`, so this ++ function becomes a no-op placeholder kept for compatibility. + """ +- # Create L3VNI VXLAN device +- node.run( +- "ip link add dev vx-4000 type vxlan id 4000 dstport 4789 local %s dev ipmr-lo group ff0e::4000 nolearning ttl 64" +- % node_ip +- ) +- node.run("ip link set dev vx-4000 mtu 9152") +- node.run("ip link set dev vx-4000 up") +- +- # bridge attrs - Add L3VNI VXLAN to bridge +- node.run("ip link set dev vx-4000 master bridge") +- node.run("/sbin/bridge link set dev vx-4000 neigh_suppress on") +- node.run("/sbin/bridge link set dev vx-4000 learning off") +- node.run("/sbin/bridge link set dev vx-4000 priority 8") +- node.run("/sbin/bridge vlan del vid 1 dev vx-4000") +- node.run("/sbin/bridge vlan del vid 1 untagged pvid dev vx-4000") +- node.run("/sbin/bridge vlan add vid 4000 dev vx-4000") +- node.run("/sbin/bridge vlan add vid 4000 untagged pvid dev vx-4000") +- +- # Add VLAN 4000 to bridge for L3VNI +- node.run("/sbin/bridge vlan add vid 4000 dev bridge self") ++ del node ++ del node_ip + + + def config_svi(node, svi_pip): + """ +- Create an SVI for VLAN 1000 with IPv6 addressing ++ Create an SVI for VLAN 1000 with IPv6 addressing in vrf1. ++ SVIs for other VLANs (1001–1003) can be created similarly if needed. + """ +- node.run("ip link add link bridge name vlan1000 type vlan id 1000 protocol 802.1q") ++ node.run( ++ "ip link add link br_default name vlan1000 type vlan id 1000 protocol 802.1q" ++ ) + node.run("ip -6 addr add %s/64 dev vlan1000" % svi_pip) ++ node.run("ip link set dev vlan1000 master vrf1") + node.run("ip link set dev vlan1000 up") + node.run("/sbin/sysctl net.ipv6.conf.vlan1000.accept_dad=0") + node.run("/sbin/sysctl net.ipv6.conf.vlan1000.dad_transmits=0") +- node.run("ip link add link vlan1000 name vlan1000-v0 type macvlan mode private") +- node.run("/sbin/sysctl net.ipv6.conf.vlan1000-v0.accept_dad=0") +- node.run("/sbin/sysctl net.ipv6.conf.vlan1000-v0.dad_transmits=0") +- node.run("ip link set dev vlan1000-v0 address 00:00:5e:00:01:01") +- node.run("ip link set dev vlan1000-v0 up") +- node.run("ip -6 addr add 2001:db8:45::1/64 dev vlan1000-v0") + + + def config_vrf_l3vni(node): + """ +- Create VRF vrf1 and L3VNI VLAN interface for L3VNI 4000 ++ Create VRFs and the L3VNI VLAN interfaces for vrf1 (L3VNI 4000) ++ and vrf2 (L3VNI 4001). vrf1 and vrf2 are created here so that ++ config_svi() can attach SVIs. + """ +- # Create VRF vrf1 with table 1001 +- node.run("ip link add vrf1 type vrf table 1001") ++ # VRF vrf1 (table 1001) and vrf2 (table 1002) ++ node.run("ip link add vrf1 type vrf table 1001 2>/dev/null || true") + node.run("ip link set dev vrf1 up") ++ node.run("ip link add vrf2 type vrf table 1002 2>/dev/null || true") ++ node.run("ip link set dev vrf2 up") + +- # Create L3VNI VLAN interface (vlan4000) for VNI 4000 +- node.run("ip link add link bridge name vlan4000 type vlan id 4000 protocol 802.1q") ++ # L3VNI VLAN interface (vlan4000) for vrf1/L3VNI 4000 ++ node.run( ++ "ip link add link br_default name vlan4000 type vlan id 4000 protocol 802.1q" ++ ) + node.run("ip link set dev vlan4000 master vrf1") + node.run("ip link set dev vlan4000 up") + node.run("/sbin/sysctl net.ipv6.conf.vlan4000.accept_dad=0") + node.run("/sbin/sysctl net.ipv6.conf.vlan4000.dad_transmits=0") + ++ # L3VNI VLAN interface (vlan4001) for vrf2/L3VNI 4001 ++ node.run( ++ "ip link add link br_default name vlan4001 type vlan id 4001 protocol 802.1q" ++ ) ++ node.run("ip link set dev vlan4001 master vrf2") ++ node.run("ip link set dev vlan4001 up") ++ node.run("/sbin/sysctl net.ipv6.conf.vlan4001.accept_dad=0") ++ node.run("/sbin/sysctl net.ipv6.conf.vlan4001.dad_transmits=0") ++ + + def config_tor(tor_name, tor, tor_ip, svi_pip): + """ +@@ -463,38 +481,89 @@ def config_tor(tor_name, tor, tor_ip, svi_pip): + for ifname, prefix in uplinks.items(): + tor.run("ip -6 addr add %s dev %s" % (prefix, ifname)) + +- # create a device for terminating VxLAN multicast tunnels +- config_mcast_tunnel_termination_device(tor) +- +- # create a vlan aware bridge ++ # create VRFs and L3VNI VLAN 4001 + config_bridge(tor) +- +- # create vxlan device and add it to bridge + config_vxlan(tor, tor_ip) +- +- # create L3VNI infrastructure (VRF vrf1 with L3VNI 4000) +- config_l3vni(tor, tor_ip) + config_vrf_l3vni(tor) + +- # create hostbonds and add them to the bridge ++ # create hostbonds; we will attach them to the bridge explicitly + if "torm1" in tor_name: + sys_mac = "44:38:39:ff:ff:01" + else: + sys_mac = "44:38:39:ff:ff:02" + bond_member = tor_name + "-eth2" +- config_bond(tor, "hostbond1", [bond_member], sys_mac, "bridge") ++ config_bond(tor, "hostbond1", [bond_member], sys_mac, None) + + bond_member = tor_name + "-eth3" +- config_bond(tor, "hostbond2", [bond_member], sys_mac, "bridge") +- +- # create SVI ++ config_bond(tor, "hostbond2", [bond_member], sys_mac, None) ++ ++ # Attach host bonds to bridge with VLANs: ++ # - hostbond1 carries VLAN 1000 (vrf1) ++ # - hostbond2 carries VLAN 1001 (vrf1) ++ for bond, vid in (("hostbond1", 1000), ("hostbond2", 1001)): ++ tor.run(f"ip link set dev {bond} master br_default") ++ tor.run(f"/sbin/bridge vlan del vid 1 dev {bond}") ++ tor.run(f"/sbin/bridge vlan del vid 1 untagged pvid dev {bond}") ++ tor.run(f"/sbin/bridge vlan add vid {vid} dev {bond}") ++ tor.run(f"/sbin/bridge vlan add vid {vid} pvid untagged dev {bond}") ++ ++ # create SVI for VLAN 1000 in vrf1 (others can be added similarly as needed) + config_svi(tor, svi_pip) + + ++def setup_vtep_mh(tgen, tor_name, tor_ip, svi_pip): ++ """ ++ Configure SVD VXLAN (`vxlan48`) and bridge (`br_default`) on a TOR VTEP ++ in a manner similar to `setup_vtep` from bgp_evpn_three_tier_clos_topo1: ++ - Clean up any existing SVD state ++ - Create a single VLAN-aware bridge ++ - Create a single VXLAN device for all VNIs (L2 and L3) ++ - Create VRFs and L3VNI VLANs for vrf1 (4000) and vrf2 (4001) ++ - Attach host-facing bonds to the bridge with appropriate VLANs ++ """ ++ tor = tgen.gears[tor_name] ++ ++ # Cleanup any existing SVD-related interfaces ++ cleanup_cmds = [ ++ # SVIs and L3VNI VLANs ++ "ip link set dev vlan1000 down 2>/dev/null || true", ++ "ip link set dev vlan1001 down 2>/dev/null || true", ++ "ip link set dev vlan1002 down 2>/dev/null || true", ++ "ip link set dev vlan1003 down 2>/dev/null || true", ++ "ip link set dev vlan4000 down 2>/dev/null || true", ++ "ip link set dev vlan4001 down 2>/dev/null || true", ++ "ip link del vlan1000 2>/dev/null || true", ++ "ip link del vlan1001 2>/dev/null || true", ++ "ip link del vlan1002 2>/dev/null || true", ++ "ip link del vlan1003 2>/dev/null || true", ++ "ip link del vlan4000 2>/dev/null || true", ++ "ip link del vlan4001 2>/dev/null || true", ++ # VXLAN and bridge ++ "ip link set dev vxlan48 down 2>/dev/null || true", ++ "ip link del vxlan48 2>/dev/null || true", ++ "ip link set dev br_default down 2>/dev/null || true", ++ "ip link del br_default 2>/dev/null || true", ++ # VRFs ++ "ip link set dev vrf1 down 2>/dev/null || true", ++ "ip link set dev vrf2 down 2>/dev/null || true", ++ "ip link del vrf1 2>/dev/null || true", ++ "ip link del vrf2 2>/dev/null || true", ++ ] ++ for cmd in cleanup_cmds: ++ tor.run(cmd) ++ ++ # Now configure SVD data plane and host bonds using existing helper ++ config_tor(tor_name, tor, tor_ip, svi_pip) ++ ++ + def config_tors(tgen, tors): + for tor_name in tors: +- tor = tgen.gears[tor_name] +- config_tor(tor_name, tor, tor_ips.get(tor_name), svi_ips.get(tor_name)) ++ setup_vtep_mh( ++ tgen, ++ tor_name, ++ tor_ips.get(tor_name), ++ svi_ips.get(tor_name), ++ ) + + + def compute_host_ip_mac(host_name): +-- +2.43.0 + diff --git a/src/sonic-frr/patch/0061-bgpd-Fix-JSON-wrapper-brace-consistency-in-neighbor.patch b/src/sonic-frr/patch/0061-bgpd-Fix-JSON-wrapper-brace-consistency-in-neighbor.patch deleted file mode 100644 index df43b9aea72..00000000000 --- a/src/sonic-frr/patch/0061-bgpd-Fix-JSON-wrapper-brace-consistency-in-neighbor.patch +++ /dev/null @@ -1,173 +0,0 @@ -[PATCH] bgpd: Fix JSON wrapper brace consistency in neighbor commands - -From: Vaideesh Ravi Shankar -Date: Mon, 15 Sep 2025 14:42:00 -0700 -Subject: [PATCH] bgpd: Fix JSON wrapper brace consistency in neighbor commands - -The BGP neighbor adj-route commands (advertised-routes, received-routes, -filtered-routes) had inconsistent JSON wrapper brace handling. Only -advertised-routes and received-routes got wrapper braces from the command -handler, while filtered-routes used complete JSON objects. - -This caused malformed JSON output like: -{ { warning: message } } - -Fix by conditionally handling JSON output based on route type: -- advertised/received routes: output raw JSON fragments for CLI brace wrapping -- filtered routes: output complete JSON objects with vty_json - -This ensures proper JSON formatting for all route types while maintaining -backward compatibility. - -Signed-off-by: Vaideesh Ravi Shankar ---- - bgpd/bgp_route.c | 35 ++++++--- - .../test_bgp_received_routes_with_soft_inbound.py | 75 ++++++++++++++++++++ - 2 files changed, 99 insertions(+), 11 deletions(-) - -diff --git a/bgpd/bgp_route.c b/bgpd/bgp_route.c -index a8427bc3b..d928588e2 100644 ---- a/bgpd/bgp_route.c -+++ b/bgpd/bgp_route.c -@@ -6795,7 +6795,7 @@ static int clear_batch_rib_helper(struct bgp_clearing_info *cinfo) - /* This will resume the "inner" walk if necessary */ - ret = walk_batch_table_helper(cinfo, table, true /*inner*/); - if (ret != 0) { -- /* The "inner" resume info will be set; -+ /* The "inner" resume info will be set; - * capture the resume info we need - * from the outer afi/safi and dest - */ -@@ -15692,11 +15692,18 @@ static int peer_adj_routes(struct vty *vty, struct peer *peer, afi_t afi, - - if (!peer || !peer->afc[afi][safi]) { - if (use_json) { -- json_object_string_add( -- json, "warning", -- "No such neighbor or address family"); -- vty_out(vty, "%s\n", json_object_to_json_string(json)); -- json_object_free(json); -+ if (type == bgp_show_adj_route_advertised || -+ type == bgp_show_adj_route_received) { -+ /* Raw fragment for CLI brace wrapping */ -+ vty_out(vty, -+ "\"warning\": \"No such neighbor or address family\"\n"); -+ json_object_free(json); -+ } else { -+ /* Complete object for filtered/bestpath */ -+ json_object_string_add(json, "warning", -+ "No such neighbor or address family"); -+ vty_json(vty, json); -+ } - json_object_free(json_ar); - } else - vty_out(vty, "%% No such neighbor or address family\n"); -@@ -15709,11 +15716,17 @@ static int peer_adj_routes(struct vty *vty, struct peer *peer, afi_t afi, - && !CHECK_FLAG(peer->af_flags[afi][safi], - PEER_FLAG_SOFT_RECONFIG)) { - if (use_json) { -- json_object_string_add( -- json, "warning", -- "Inbound soft reconfiguration not enabled"); -- vty_out(vty, "%s\n", json_object_to_json_string(json)); -- json_object_free(json); -+ if (type == bgp_show_adj_route_received) { -+ /* Raw fragment for CLI brace wrapping */ -+ vty_out(vty, -+ "\"warning\": \"Inbound soft reconfiguration not enabled\"\n"); -+ json_object_free(json); -+ } else { -+ /* Complete object for filtered routes */ -+ json_object_string_add(json, "warning", -+ "Inbound soft reconfiguration not enabled"); -+ vty_json(vty, json); -+ } - json_object_free(json_ar); - } else - vty_out(vty, -diff --git a/tests/topotests/bgp_received_routes_with_soft_inbound/test_bgp_received_routes_with_soft_inbound.py b/tests/topotests/bgp_received_routes_with_soft_inbound/test_bgp_received_routes_with_soft_inbound.py -index 0b933add2..07a14b276 100644 ---- a/tests/topotests/bgp_received_routes_with_soft_inbound/test_bgp_received_routes_with_soft_inbound.py -+++ b/tests/topotests/bgp_received_routes_with_soft_inbound/test_bgp_received_routes_with_soft_inbound.py -@@ -98,6 +98,81 @@ def test_bgp_received_routes_with_soft_inbound(): - assert result is None, "Can't converge" - - -+def test_bgp_adj_routes_json_error_paths(): -+ """Test JSON formatting consistency for BGP adj-route error paths""" -+ tgen = get_topogen() -+ -+ if tgen.routers_have_failure(): -+ pytest.skip(tgen.errors) -+ -+ r1 = tgen.gears["r1"] -+ -+ # Disable soft-reconfiguration to trigger warning paths -+ r1.vtysh_cmd( -+ """ -+ configure terminal -+ router bgp 65001 -+ address-family ipv4 unicast -+ no neighbor 192.168.1.2 soft-reconfiguration inbound -+ end -+ """ -+ ) -+ -+ def _check_adj_route_json_consistency(): -+ """Check that all adj-route JSON outputs are well-formed""" -+ test_commands = [ -+ "show bgp ipv4 unicast neighbors 192.168.1.2 received-routes json", -+ "show bgp ipv4 unicast neighbors 192.168.1.2 advertised-routes json", -+ "show bgp ipv4 unicast neighbors 192.168.1.2 filtered-routes json", -+ ] -+ -+ for cmd in test_commands: -+ output = r1.vtysh_cmd(cmd) -+ -+ # Critical: JSON should ALWAYS be valid after our fix -+ try: -+ parsed = json.loads(output) -+ except json.JSONDecodeError as e: -+ pytest.fail(f"Malformed JSON in command '{cmd}': {e}\nOutput: {output}") -+ -+ # Test CONTENT for expected error messages -+ if "received-routes" in cmd or "filtered-routes" in cmd: -+ warning_msg = parsed.get("warning", "") -+ expected = "Inbound soft reconfiguration not enabled" -+ if warning_msg != expected: -+ return ( -+ f"Expected soft reconfig warning in {cmd}, " -+ f"got: '{warning_msg}'" -+ ) -+ -+ # Verify JSON structure is a single object, not double-nested -+ if not isinstance(parsed, dict): -+ return f"Expected dict object for {cmd}" -+ -+ # Critical: Should not have nested structure { { "warning": ... } } -+ warning_value = parsed.get("warning", "") -+ if isinstance(warning_value, dict): -+ # This indicates our fix failed - fail test immediately -+ pytest.fail(f"Warning should be string, not nested object in {cmd}") -+ -+ return None -+ -+ test_func = functools.partial(_check_adj_route_json_consistency) -+ _, result = topotest.run_and_expect(test_func, None, count=5, wait=3) -+ assert result is None, f"JSON consistency check failed: {result}" -+ -+ # Restore original configuration -+ r1.vtysh_cmd( -+ """ -+ configure terminal -+ router bgp 65001 -+ address-family ipv4 unicast -+ neighbor 192.168.1.2 soft-reconfiguration inbound -+ end -+ """ -+ ) -+ -+ - if __name__ == "__main__": - args = ["-s"] + sys.argv[1:] - sys.exit(pytest.main(args)) diff --git a/src/sonic-frr/patch/0061-tests-EVPNv6-MH-v6-vtep-aware-unified-vxlan-cfg.patch b/src/sonic-frr/patch/0061-tests-EVPNv6-MH-v6-vtep-aware-unified-vxlan-cfg.patch new file mode 100644 index 00000000000..79062752472 --- /dev/null +++ b/src/sonic-frr/patch/0061-tests-EVPNv6-MH-v6-vtep-aware-unified-vxlan-cfg.patch @@ -0,0 +1,195 @@ +From d156d4d8328201de7468142978589e35eb5e99d0 Mon Sep 17 00:00:00 2001 +From: Chirag Shah +Date: Thu, 27 Nov 2025 16:32:42 -0800 +Subject: tests: EVPNv6 MH v6 vtep aware unified vxlan cfg + +Signed-off-by: Chirag Shah +(cherry picked from commit cad234991983d0d1a49c5bb5744eb017b20ba160) +Signed-off-by: Tamer Ahmed + +diff --git a/tests/topotests/bgp_evpn_mh_v4_v6_num/test_evpn_mh_v4_v6_num.py b/tests/topotests/bgp_evpn_mh_v4_v6_num/test_evpn_mh_v4_v6_num.py +index c832ca234..dc6c4c435 100644 +--- a/tests/topotests/bgp_evpn_mh_v4_v6_num/test_evpn_mh_v4_v6_num.py ++++ b/tests/topotests/bgp_evpn_mh_v4_v6_num/test_evpn_mh_v4_v6_num.py +@@ -238,6 +238,26 @@ tor_uplink_ipv6 = { + }, + } + ++# Logical description of VLAN/VNI layout so we avoid hard-coding numbers ++# throughout the helper functions. ++# ++# - VLAN 1000, 1001 in vrf1, VNIs 1000, 1001 ++# - VLAN 1002, 1003 in vrf2, VNIs 1002, 1003 ++VLAN_VNI_VRF = { ++ 1000: (1000, "vrf1"), ++ 1001: (1001, "vrf1"), ++ 1002: (1002, "vrf2"), ++ 1003: (1003, "vrf2"), ++} ++ ++# L3VNIs: ++# - vrf1 -> L3VNI 4000 (VLAN 4000) ++# - vrf2 -> L3VNI 4001 (VLAN 4001) ++L3VNI_VRF = { ++ 4000: "vrf1", ++ 4001: "vrf2", ++} ++ + + def _normalize_prefix_for_ip_show(prefix): + """ +@@ -338,7 +358,7 @@ def config_bridge(node): + """ + Create a VLAN aware bridge for SVD: + - Single bridge `br_default` +- - VLANs 1000–1003 (L2VNIs) and 4000/4001 (L3VNIs for vrf1/vrf2) ++ - All L2 VLANs from VLAN_VNI_VRF and L3 VLANs from L3VNI_VRF + """ + node.run("ip link del br_default 2>/dev/null || true") + node.run("ip link add dev br_default type bridge stp_state 0") +@@ -348,17 +368,19 @@ def config_bridge(node): + node.run("ip link set dev br_default type bridge mcast_snooping 0") + node.run("ip link set dev br_default type bridge vlan_stats_enabled 1") + node.run("ip link set dev br_default up") +- # Self VLAN entries for all L2VNIs and L3VNI VLANs +- for vid in (1000, 1001, 1002, 1003, 4000, 4001): ++ # Self VLAN entries for all L2VNIs and L3VNI VLANs derived from the maps ++ for vid in sorted(VLAN_VNI_VRF.keys()): ++ node.run(f"/sbin/bridge vlan add vid {vid} dev br_default self") ++ for vid in sorted(L3VNI_VRF.keys()): + node.run(f"/sbin/bridge vlan add vid {vid} dev br_default self") + + + def config_vxlan(node, node_ip): + """ + Create a Single VXLAN Device (SVD) `vxlan48` and add it to the bridge. +- VLANs 1000–1003 (L2VNIs) and 4000/4001 (L3VNIs for vrf1/vrf2) are mapped to +- VNIs 1000–1003 and 4000/4001 respectively via tunnel_info, following the +- same pattern as `setup_vtep` in bgp_evpn_three_tier_clos_topo1. ++ All VLANs in VLAN_VNI_VRF and L3VNI_VRF are mapped to their VNIs via ++ tunnel_info, following the same pattern as `setup_vtep` in ++ bgp_evpn_three_tier_clos_topo1. + """ + # Cleanup any existing vxlan48 + node.run("ip link del vxlan48 2>/dev/null || true") +@@ -378,21 +400,17 @@ def config_vxlan(node, node_ip): + node.run("/sbin/bridge vlan del vid 1 dev vxlan48") + node.run("/sbin/bridge vlan del vid 1 untagged pvid dev vxlan48") + +- # Map VLANs to VNIs +- vni_map = { +- 1000: 1000, +- 1001: 1001, +- 1002: 1002, +- 1003: 1003, +- 4000: 4000, +- 4001: 4001, +- } ++ # Map VLANs to VNIs using the logical maps ++ vni_map = {} ++ for vid, (vni, _vrf) in VLAN_VNI_VRF.items(): ++ vni_map[vid] = vni ++ for vni, _vrf in L3VNI_VRF.items(): ++ vni_map[vni] = vni ++ + for vid, vni in vni_map.items(): + # First add the VLAN membership on vxlan48, then add tunnel_info id + node.run(f"/sbin/bridge vlan add dev vxlan48 vid {vid}") +- node.run( +- f"/sbin/bridge vlan add dev vxlan48 vid {vid} tunnel_info id {vni}" +- ) ++ node.run(f"/sbin/bridge vlan add dev vxlan48 vid {vid} tunnel_info id {vni}") + + node.run("ip link set dev vxlan48 up") + +@@ -408,48 +426,52 @@ def config_l3vni(node, node_ip): + + def config_svi(node, svi_pip): + """ +- Create an SVI for VLAN 1000 with IPv6 addressing in vrf1. +- SVIs for other VLANs (1001–1003) can be created similarly if needed. ++ Create SVIs and attach them to the appropriate VRFs: ++ - VLAN 1000, 1001 in vrf1 ++ - VLAN 1002, 1003 in vrf2 ++ ++ IPv6 addressing is configured only on VLAN 1000 using `svi_pip`, to ++ provide a single anycast GW for vrf1, mirroring the previous test. + """ +- node.run( +- "ip link add link br_default name vlan1000 type vlan id 1000 protocol 802.1q" +- ) ++ # Create SVIs for all access VLANs based on VLAN_VNI_VRF ++ for vid, (_vni, vrf) in VLAN_VNI_VRF.items(): ++ vlan_name = f"vlan{vid}" ++ node.run( ++ f"ip link add link br_default name {vlan_name} " ++ f"type vlan id {vid} protocol 802.1q" ++ ) ++ node.run(f"ip link set dev {vlan_name} master {vrf}") ++ node.run(f"ip link set dev {vlan_name} up") ++ node.run(f"/sbin/sysctl net.ipv6.conf.{vlan_name}.accept_dad=0") ++ node.run(f"/sbin/sysctl net.ipv6.conf.{vlan_name}.dad_transmits=0") ++ ++ # Assign IPv6 anycast GW only to VLAN 1000 in vrf1 + node.run("ip -6 addr add %s/64 dev vlan1000" % svi_pip) +- node.run("ip link set dev vlan1000 master vrf1") +- node.run("ip link set dev vlan1000 up") +- node.run("/sbin/sysctl net.ipv6.conf.vlan1000.accept_dad=0") +- node.run("/sbin/sysctl net.ipv6.conf.vlan1000.dad_transmits=0") + + + def config_vrf_l3vni(node): + """ +- Create VRFs and the L3VNI VLAN interfaces for vrf1 (L3VNI 4000) +- and vrf2 (L3VNI 4001). vrf1 and vrf2 are created here so that +- config_svi() can attach SVIs. ++ Create VRFs and the L3VNI VLAN interfaces based on L3VNI_VRF. ++ vrf1 and vrf2 are created here so that config_svi() can attach SVIs. + """ +- # VRF vrf1 (table 1001) and vrf2 (table 1002) +- node.run("ip link add vrf1 type vrf table 1001 2>/dev/null || true") +- node.run("ip link set dev vrf1 up") +- node.run("ip link add vrf2 type vrf table 1002 2>/dev/null || true") +- node.run("ip link set dev vrf2 up") +- +- # L3VNI VLAN interface (vlan4000) for vrf1/L3VNI 4000 +- node.run( +- "ip link add link br_default name vlan4000 type vlan id 4000 protocol 802.1q" +- ) +- node.run("ip link set dev vlan4000 master vrf1") +- node.run("ip link set dev vlan4000 up") +- node.run("/sbin/sysctl net.ipv6.conf.vlan4000.accept_dad=0") +- node.run("/sbin/sysctl net.ipv6.conf.vlan4000.dad_transmits=0") +- +- # L3VNI VLAN interface (vlan4001) for vrf2/L3VNI 4001 +- node.run( +- "ip link add link br_default name vlan4001 type vlan id 4001 protocol 802.1q" +- ) +- node.run("ip link set dev vlan4001 master vrf2") +- node.run("ip link set dev vlan4001 up") +- node.run("/sbin/sysctl net.ipv6.conf.vlan4001.accept_dad=0") +- node.run("/sbin/sysctl net.ipv6.conf.vlan4001.dad_transmits=0") ++ # Create VRF devices for all VRFs referenced in L3VNI_VRF ++ # Use static table IDs for now: vrf1 -> 1001, vrf2 -> 1002 ++ vrf_tables = {"vrf1": 1001, "vrf2": 1002} ++ for vrf, table in vrf_tables.items(): ++ node.run(f"ip link add {vrf} type vrf table {table} 2>/dev/null || true") ++ node.run(f"ip link set dev {vrf} up") ++ ++ # Create L3VNI VLAN interfaces and attach them to the appropriate VRFs ++ for l3vni, vrf in L3VNI_VRF.items(): ++ vlan_name = f"vlan{l3vni}" ++ node.run( ++ f"ip link add link br_default name {vlan_name} " ++ f"type vlan id {l3vni} protocol 802.1q" ++ ) ++ node.run(f"ip link set dev {vlan_name} master {vrf}") ++ node.run(f"ip link set dev {vlan_name} up") ++ node.run(f"/sbin/sysctl net.ipv6.conf.{vlan_name}.accept_dad=0") ++ node.run(f"/sbin/sysctl net.ipv6.conf.{vlan_name}.dad_transmits=0") + + + def config_tor(tor_name, tor, tor_ip, svi_pip): +-- +2.43.0 + diff --git a/src/sonic-frr/patch/0062-tests-EVPNv6-MH-v6-vtep-aware-tenant-vrf-ips.patch b/src/sonic-frr/patch/0062-tests-EVPNv6-MH-v6-vtep-aware-tenant-vrf-ips.patch new file mode 100644 index 00000000000..79995f9f3f1 --- /dev/null +++ b/src/sonic-frr/patch/0062-tests-EVPNv6-MH-v6-vtep-aware-tenant-vrf-ips.patch @@ -0,0 +1,81 @@ +From f9fa233f92ac6609ab44a796aef16f03c5fb490c Mon Sep 17 00:00:00 2001 +From: Chirag Shah +Date: Thu, 27 Nov 2025 18:07:27 -0800 +Subject: tests: EVPNv6 MH v6 vtep aware tenant vrf ips + +Signed-off-by: Chirag Shah +(cherry picked from commit ed2d26b6783322e2cee2ff85055c5937dfead01e) +Signed-off-by: Tamer Ahmed + +diff --git a/tests/topotests/bgp_evpn_mh_v4_v6_num/ipv6/TOPOLOGY.md b/tests/topotests/bgp_evpn_mh_v4_v6_num/ipv6/TOPOLOGY.md +index 6e2a4593d..9c914265f 100644 +--- a/tests/topotests/bgp_evpn_mh_v4_v6_num/ipv6/TOPOLOGY.md ++++ b/tests/topotests/bgp_evpn_mh_v4_v6_num/ipv6/TOPOLOGY.md +@@ -181,6 +181,24 @@ All routers have both IPv4 and IPv6 loopback addresses for proper BGP router-id + | torm22 | 10.0.0.18/32 | **2001:db8:100::18/128** | 10.0.0.18 | 65005 | + + **Note**: TOR routers use IPv6 addresses (2001:db8:100::15-18) as VTEP source addresses for VXLAN tunnels. IPv4 loopbacks are configured for BGP router-id compatibility. ++### VRF IPv4 Addresses (10.1.x.x) ++ ++Each TOR has unique IPv4 addresses assigned directly to its VRF devices. These ++act as loopback-style addresses within each VRF and are associated to L3VNIs: ++ ++- `vrf1` → L3VNI 400 ++- `vrf2` → L3VNI 4001 ++ ++| Device | VRF | VRF IPv4 Address | L3VNI | ++|--------|------|------------------|-------| ++| torm11 | vrf1 | 10.1.11.1/32 | 4000 | ++| torm11 | vrf2 | 10.1.11.2/32 | 4001 | ++| torm12 | vrf1 | 10.1.12.1/32 | 4000 | ++| torm12 | vrf2 | 10.1.12.2/32 | 4001 | ++| torm21 | vrf1 | 10.1.21.1/32 | 4000 | ++| torm21 | vrf2 | 10.1.21.2/32 | 4001 | ++| torm22 | vrf1 | 10.1.22.1/32 | 4000 | ++| torm22 | vrf2 | 10.1.22.2/32 | 4001 | + + ### Point-to-Point Link Addresses (/127 Networks) + +diff --git a/tests/topotests/bgp_evpn_mh_v4_v6_num/test_evpn_mh_v4_v6_num.py b/tests/topotests/bgp_evpn_mh_v4_v6_num/test_evpn_mh_v4_v6_num.py +index dc6c4c435..c480ecb4d 100644 +--- a/tests/topotests/bgp_evpn_mh_v4_v6_num/test_evpn_mh_v4_v6_num.py ++++ b/tests/topotests/bgp_evpn_mh_v4_v6_num/test_evpn_mh_v4_v6_num.py +@@ -258,6 +258,16 @@ L3VNI_VRF = { + 4001: "vrf2", + } + ++# Per-TOR IPv4 addresses for VRF devices. These are assigned directly to the ++# VRF interfaces (vrf1 and vrf2) as /32 loopback-style addresses in the ++# 10.1.x.x range, unique per TOR. ++VRF_IPV4 = { ++ "torm11": {"vrf1": "10.1.11.1/32", "vrf2": "10.1.11.2/32"}, ++ "torm12": {"vrf1": "10.1.12.1/32", "vrf2": "10.1.12.2/32"}, ++ "torm21": {"vrf1": "10.1.21.1/32", "vrf2": "10.1.21.2/32"}, ++ "torm22": {"vrf1": "10.1.22.1/32", "vrf2": "10.1.22.2/32"}, ++} ++ + + def _normalize_prefix_for_ip_show(prefix): + """ +@@ -503,11 +513,17 @@ def config_tor(tor_name, tor, tor_ip, svi_pip): + for ifname, prefix in uplinks.items(): + tor.run("ip -6 addr add %s dev %s" % (prefix, ifname)) + +- # create VRFs and L3VNI VLAN 4001 ++ # create VRFs and L3VNI VLANs based on L3VNI_VRF + config_bridge(tor) + config_vxlan(tor, tor_ip) + config_vrf_l3vni(tor) + ++ # Assign per-VRF IPv4 addresses (10.1.x.x/32) on vrf1 and vrf2 devices so ++ # each TOR has unique loopback-style addresses in each VRF. ++ vrf_ips = VRF_IPV4.get(tor_name, {}) ++ for vrf, addr in vrf_ips.items(): ++ tor.run(f"ip addr add {addr} dev {vrf}") ++ + # create hostbonds; we will attach them to the bridge explicitly + if "torm1" in tor_name: + sys_mac = "44:38:39:ff:ff:01" +-- +2.43.0 + diff --git a/src/sonic-frr/patch/0062-zebra-if-speed-change-check-fix.patch b/src/sonic-frr/patch/0062-zebra-if-speed-change-check-fix.patch deleted file mode 100644 index 9a3f9eea97d..00000000000 --- a/src/sonic-frr/patch/0062-zebra-if-speed-change-check-fix.patch +++ /dev/null @@ -1,28 +0,0 @@ -Zebra patch to fix a bug in zebra_ns_link_ifp() - -From: dileep - -This function should first check whether the given interface is valid (i.e. an -RTM_NEWLINK has been processed for the interface and it has a valid ifindex) before -updating zebra_ns.ifp_tree. ---- - zebra/zebra_ns.c | 6 ++++++ - 1 file changed, 6 insertions(+) - -diff --git a/zebra/zebra_ns.c b/zebra/zebra_ns.c -index 8edfc9f3f..e9e83ae33 100644 ---- a/zebra/zebra_ns.c -+++ b/zebra/zebra_ns.c -@@ -49,6 +49,12 @@ void zebra_ns_link_ifp(struct zebra_ns *zns, struct interface *ifp) - struct zebra_if *zif; - struct ifp_tree_link *link, tlink = {}; - -+ if (ifp->ifindex == IFINDEX_INTERNAL) { -+ if (IS_ZEBRA_DEBUG_EVENT) -+ zlog_debug("%s: interface %s not ready, ignoring", __func__, ifp->name); -+ return; -+ } -+ - zif = ifp->info; - assert(zif != NULL); - diff --git a/src/sonic-frr/patch/0063-tests-EVPNv6-MH-v6-vtep-aware-topology-doc-formattin.patch b/src/sonic-frr/patch/0063-tests-EVPNv6-MH-v6-vtep-aware-topology-doc-formattin.patch new file mode 100644 index 00000000000..9fd9315a0d1 --- /dev/null +++ b/src/sonic-frr/patch/0063-tests-EVPNv6-MH-v6-vtep-aware-topology-doc-formattin.patch @@ -0,0 +1,280 @@ +From 07b03581072617829d42c72b70471f835bea9108 Mon Sep 17 00:00:00 2001 +From: Chirag Shah +Date: Thu, 27 Nov 2025 18:16:37 -0800 +Subject: tests: EVPNv6 MH v6 vtep aware topology doc formatting + +Signed-off-by: Chirag Shah +(cherry picked from commit 3bcc12888b3abb740d2538d4aabdfc5e1627f3f4) +Signed-off-by: Tamer Ahmed + +diff --git a/tests/topotests/bgp_evpn_mh_v4_v6_num/ipv6/TOPOLOGY.md b/tests/topotests/bgp_evpn_mh_v4_v6_num/ipv6/TOPOLOGY.md +index 9c914265f..49dc978b8 100644 +--- a/tests/topotests/bgp_evpn_mh_v4_v6_num/ipv6/TOPOLOGY.md ++++ b/tests/topotests/bgp_evpn_mh_v4_v6_num/ipv6/TOPOLOGY.md +@@ -1,111 +1,31 @@ + # BGP EVPN MH IPv4/IPv6 Numbered - Network Topology + +-## Topology Diagram ++## Topology Overview + +-``` +- SPINE LAYER (AS 65001) +- ┌─────────────────────────────┐ +- │ │ +- ┌───────┴────────┐ ┌────────┴────────┐ +- │ spine1 │ │ spine2 │ +- │ AS 65001 │ │ AS 65001 │ +- │ lo: 2001:db8: │ │ lo: 2001:db8: │ +- │ 100::13 │ │ 100::14 │ +- └────┬──────┬────┘ └────┬──────┬─────┘ +- │ │ │ │ +- eth0 │ │ eth1 eth0 │ │ eth1 +- ::50::1/127│ │::51::1/127 ::60::1/127 │::61::1/127 +- │ │ │ │ +- │ └─────────┐ ┏─────┘ │ +- │ │ │ │ +- ┌────┴──────┐ ┌────┴────┴──┐ ┌────┴────────┐ +- │ leaf1 │ │ leaf2 │ │ │ +- │ AS 65101 │ │ AS 65101 │ │ │ +- │ lo: 2001:│ │ lo: 2001: │ │ │ +- │ db8:200::│ │ db8:200:: │ │ │ +- │ 13 │ │ 14 │ │ │ +- └─┬──┬──┬──┬┘ └─┬──┬──┬───┬┘ │ │ +- eth2 │ │ │ │ │ │ │ │ │ │ +- │ │ │ └───────┘ │ │ └─────┘ │ +- │ │ │ │ │ │ +- │ │ └─────────────┼──┼────────────────────────┘ +- │ │ │ │ +- │ └────────────────┼──┼──────────────┐ +- │ │ │ │ +- │ eth3 eth4│ │eth5 eth2│ eth3 +- │ │ │ │ +- │ │ │ │ +- ┌─┴─────────┐ ┌──────┴──┴────┐ ┌─────┴───────┐ ┌──────────────┐ +- │ torm11 │ │ torm12 │ │ torm21 │ │ torm22 │ +- │ AS 65002 │ │ AS 65003 │ │ AS 65004 │ │ AS 65005 │ +- │ VTEP: │ │ VTEP: │ │ VTEP: │ │ VTEP: │ +- │ 2001:db8: │ │ 2001:db8: │ │ 2001:db8: │ │ 2001:db8: │ +- │ 100::15 │ │ 100::16 │ │ 100::17 │ │ 100::18 │ +- └─┬───────┬─┘ └─┬────────┬───┘ └─┬───────┬───┘ └─┬────────┬───┘ +- eth2 │ │eth3 │eth2 │eth3 │eth2 │eth3 │eth2 │eth3 +- │ │ │ │ │ │ │ │ +- │ └──────┼────┐ │ ┌────┼───────┘ │ ┌────┘ +- │ │ │ │ │ │ │ │ +- ┌─┴─────┐ ┌─────┴──┐ │ │ │ ┌──┴──────┐ ┌──────┴───┴──┐ +- │hostd11│ │hostd12 │ │ │ │ │hostd21 │ │ hostd22 │ +- │(bond) │ │(bond) │ │ │ │ │(bond) │ │ (bond) │ +- └───┬───┘ └────┬───┘ │ │ │ └────┬────┘ └─────┬───────┘ +- │ │ │ │ │ │ │ +- └───────────┴─────┴───┴───┴──────┴─────────────┘ +- Rack 1 Rack 2 +- ES sys-mac: ES sys-mac: +- 44:38:39:ff:ff:01 44:38:39:ff:ff:02 +-``` ++- Spine layer (AS 65001): `spine1`, `spine2` ++- Leaf layer (AS 65101): `leaf1`, `leaf2` ++- TOR layer (VTEPs): ++ - Rack 1: `torm11` (AS 65002), `torm12` (AS 65003) ++ - Rack 2: `torm21` (AS 65004), `torm22` (AS 65005) ++- Host layer: ++ - Rack 1: `hostd11`, `hostd12` (dual-attached) ++ - Rack 2: `hostd21`, `hostd22` (dual-attached) + + ## Layer Architecture + +-``` +-┌──────────────────────────────────────────────────────────────────┐ +-│ SPINE LAYER │ +-│ │ +-│ spine1 (AS 65001) spine2 (AS 65001) │ +-│ - BGP Route Reflector - BGP Route Reflector │ +-│ - L2VPN EVPN - L2VPN EVPN │ +-└──────────────────────────────────────────────────────────────────┘ +- ▲ │ +- │ ▼ +-┌──────────────────────────────────────────────────────────────────┐ +-│ LEAF LAYER │ +-│ │ +-│ leaf1 (AS 65101) leaf2 (AS 65101) │ +-│ - BGP Route Reflector - BGP Route Reflector │ +-│ - Aggregation - Aggregation │ +-└──────────────────────────────────────────────────────────────────┘ +- ▲ │ +- │ ▼ +-┌──────────────────────────────────────────────────────────────────┐ +-│ TOR LAYER (VTEP) │ +-│ │ +-│ Rack 1: Rack 2: │ +-│ ├─ torm11 (AS 65002) ├─ torm21 (AS 65004) │ +-│ │ VTEP: 2001:db8:100::15 │ VTEP: 2001:db8:100::17 │ +-│ └─ torm12 (AS 65003) └─ torm22 (AS 65005) │ +-│ VTEP: 2001:db8:100::16 VTEP: 2001:db8:100::18 │ +-│ │ +-│ Features: │ +-│ - EVPN Multihoming (ES-ID, ES sys-mac) │ +-│ - VXLAN (VNI 1000) │ +-│ - PIM6 for BUM traffic │ +-│ - SVI: VLAN 1000 │ +-└──────────────────────────────────────────────────────────────────┘ +- ▲ │ +- │ ▼ +-┌──────────────────────────────────────────────────────────────────┐ +-│ HOST LAYER │ +-│ │ +-│ Rack 1: Rack 2: │ +-│ ├─ hostd11 (dual-attached) ├─ hostd21 (dual-attached) │ +-│ └─ hostd12 (dual-attached) └─ hostd22 (dual-attached) │ +-│ │ +-│ - LACP bonds to both TORs │ +-│ - IPv6 addressing in VLAN 1000 │ +-└──────────────────────────────────────────────────────────────────┘ +-``` ++- Spine layer: ++ - `spine1`, `spine2` (AS 65001) ++ - BGP route reflectors, EVPN core ++- Leaf layer: ++ - `leaf1`, `leaf2` (AS 65101) ++ - Aggregation, EVPN PE towards TORs ++- TOR layer (VTEP): ++ - Rack 1: `torm11` (AS 65002), `torm12` (AS 65003) ++ - Rack 2: `torm21` (AS 65004), `torm22` (AS 65005) ++ - EVPN multihoming, VXLAN (SVD `vxlan48` with VNIs 1000–1003, 4000, 4001) ++- Host layer: ++ - Rack 1: `hostd11`, `hostd12` (dual-attached via LACP bonds) ++ - Rack 2: `hostd21`, `hostd22` (dual-attached via LACP bonds) + + ## Detailed Connection Table + +@@ -113,28 +33,28 @@ + + | Source Device | Source Interface | Source IPv6 Address | Destination Device | Destination Interface | Destination IPv6 Address | AS Pair | + |--------------|------------------|---------------------|-------------------|----------------------|--------------------------|---------| +-| spine1 | spine1-eth0 | 2001:db8:50::1/127 | leaf1 | leaf1-eth0 | 2001:db8:50::0/127 | 65001 ↔ 65101 | +-| spine1 | spine1-eth1 | 2001:db8:51::1/127 | leaf2 | leaf2-eth0 | 2001:db8:51::0/127 | 65001 ↔ 65101 | +-| spine2 | spine2-eth0 | 2001:db8:60::1/127 | leaf1 | leaf1-eth1 | 2001:db8:60::0/127 | 65001 ↔ 65101 | +-| spine2 | spine2-eth1 | 2001:db8:61::1/127 | leaf2 | leaf2-eth1 | 2001:db8:61::0/127 | 65001 ↔ 65101 | ++| spine1 | spine1-eth0 | 2001:db8:50::1/127 | leaf1 | leaf1-eth0 | 2001:db8:50::0/127 | 65001 <-> 65101 | ++| spine1 | spine1-eth1 | 2001:db8:51::1/127 | leaf2 | leaf2-eth0 | 2001:db8:51::0/127 | 65001 <-> 65101 | ++| spine2 | spine2-eth0 | 2001:db8:60::1/127 | leaf1 | leaf1-eth1 | 2001:db8:60::0/127 | 65001 <-> 65101 | ++| spine2 | spine2-eth1 | 2001:db8:61::1/127 | leaf2 | leaf2-eth1 | 2001:db8:61::0/127 | 65001 <-> 65101 | + + ### Leaf to TOR Connections (Rack 1) + + | Source Device | Source Interface | Source IPv6 Address | Destination Device | Destination Interface | Destination IPv6 Address | AS Pair | + |--------------|------------------|---------------------|-------------------|----------------------|--------------------------|---------| +-| leaf1 | leaf1-eth2 | 2001:db8:1::1/127 | torm11 | torm11-eth0 | 2001:db8:1::0/127 | 65101 ↔ 65002 | +-| leaf1 | leaf1-eth3 | 2001:db8:2::1/127 | torm12 | torm12-eth0 | 2001:db8:2::0/127 | 65101 ↔ 65003 | +-| leaf2 | leaf2-eth2 | 2001:db8:5::1/127 | torm11 | torm11-eth1 | 2001:db8:5::0/127 | 65101 ↔ 65002 | +-| leaf2 | leaf2-eth3 | 2001:db8:6::1/127 | torm12 | torm12-eth1 | 2001:db8:6::0/127 | 65101 ↔ 65003 | ++| leaf1 | leaf1-eth2 | 2001:db8:1::1/127 | torm11 | torm11-eth0 | 2001:db8:1::0/127 | 65101 <-> 65002 | ++| leaf1 | leaf1-eth3 | 2001:db8:2::1/127 | torm12 | torm12-eth0 | 2001:db8:2::0/127 | 65101 <-> 65003 | ++| leaf2 | leaf2-eth2 | 2001:db8:5::1/127 | torm11 | torm11-eth1 | 2001:db8:5::0/127 | 65101 <-> 65002 | ++| leaf2 | leaf2-eth3 | 2001:db8:6::1/127 | torm12 | torm12-eth1 | 2001:db8:6::0/127 | 65101 <-> 65003 | + + ### Leaf to TOR Connections (Rack 2) + + | Source Device | Source Interface | Source IPv6 Address | Destination Device | Destination Interface | Destination IPv6 Address | AS Pair | + |--------------|------------------|---------------------|-------------------|----------------------|--------------------------|---------| +-| leaf1 | leaf1-eth4 | 2001:db8:3::1/127 | torm21 | torm21-eth0 | 2001:db8:3::0/127 | 65101 ↔ 65004 | +-| leaf1 | leaf1-eth5 | 2001:db8:4::1/127 | torm22 | torm22-eth0 | 2001:db8:4::0/127 | 65101 ↔ 65005 | +-| leaf2 | leaf2-eth4 | 2001:db8:7::1/127 | torm21 | torm21-eth1 | 2001:db8:7::0/127 | 65101 ↔ 65004 | +-| leaf2 | leaf2-eth5 | 2001:db8:8::1/127 | torm22 | torm22-eth1 | 2001:db8:8::0/127 | 65101 ↔ 65005 | ++| leaf1 | leaf1-eth4 | 2001:db8:3::1/127 | torm21 | torm21-eth0 | 2001:db8:3::0/127 | 65101 <-> 65004 | ++| leaf1 | leaf1-eth5 | 2001:db8:4::1/127 | torm22 | torm22-eth0 | 2001:db8:4::0/127 | 65101 <-> 65005 | ++| leaf2 | leaf2-eth4 | 2001:db8:7::1/127 | torm21 | torm21-eth1 | 2001:db8:7::0/127 | 65101 <-> 65004 | ++| leaf2 | leaf2-eth5 | 2001:db8:8::1/127 | torm22 | torm22-eth1 | 2001:db8:8::0/127 | 65101 <-> 65005 | + + ### TOR to Host Connections (Rack 1) + +@@ -262,22 +182,22 @@ act as loopback-style addresses within each VRF and are associated to L3VNIs: + **Total BGP Sessions**: 20 + + #### Spine Layer (4 sessions) +-- spine1 ↔ leaf1 (AS 65001 ↔ 65101) +-- spine1 ↔ leaf2 (AS 65001 ↔ 65101) +-- spine2 ↔ leaf1 (AS 65001 ↔ 65101) +-- spine2 ↔ leaf2 (AS 65001 ↔ 65101) ++- spine1 <-> leaf1 (AS 65001 <-> 65101) ++- spine1 <-> leaf2 (AS 65001 <-> 65101) ++- spine2 <-> leaf1 (AS 65001 <-> 65101) ++- spine2 <-> leaf2 (AS 65001 <-> 65101) + + #### Leaf to Rack 1 (8 sessions) +-- leaf1 ↔ torm11 (AS 65101 ↔ 65002) +-- leaf1 ↔ torm12 (AS 65101 ↔ 65003) +-- leaf2 ↔ torm11 (AS 65101 ↔ 65002) +-- leaf2 ↔ torm12 (AS 65101 ↔ 65003) ++- leaf1 <-> torm11 (AS 65101 <-> 65002) ++- leaf1 <-> torm12 (AS 65101 <-> 65003) ++- leaf2 <-> torm11 (AS 65101 <-> 65002) ++- leaf2 <-> torm12 (AS 65101 <-> 65003) + + #### Leaf to Rack 2 (8 sessions) +-- leaf1 ↔ torm21 (AS 65101 ↔ 65004) +-- leaf1 ↔ torm22 (AS 65101 ↔ 65005) +-- leaf2 ↔ torm21 (AS 65101 ↔ 65004) +-- leaf2 ↔ torm22 (AS 65101 ↔ 65005) ++- leaf1 <-> torm21 (AS 65101 <-> 65004) ++- leaf1 <-> torm22 (AS 65101 <-> 65005) ++- leaf2 <-> torm21 (AS 65101 <-> 65004) ++- leaf2 <-> torm22 (AS 65101 <-> 65005) + + ## EVPN Multihoming Configuration + +@@ -316,37 +236,37 @@ act as loopback-style addresses within each VRF and are associated to L3VNIs: + ### spine1 + ``` + lo : 10.0.0.13/32 (IPv4) + 2001:db8:100::13/128 (IPv6) +-spine1-eth0 : 2001:db8:50::1/127 → leaf1-eth0 +-spine1-eth1 : 2001:db8:51::1/127 → leaf2-eth0 ++spine1-eth0 : 2001:db8:50::1/127 -> leaf1-eth0 ++spine1-eth1 : 2001:db8:51::1/127 -> leaf2-eth0 + ``` + + ### spine2 + ``` + lo : 10.0.0.14/32 (IPv4) + 2001:db8:100::14/128 (IPv6) +-spine2-eth0 : 2001:db8:60::1/127 → leaf1-eth1 +-spine2-eth1 : 2001:db8:61::1/127 → leaf2-eth1 ++spine2-eth0 : 2001:db8:60::1/127 -> leaf1-eth1 ++spine2-eth1 : 2001:db8:61::1/127 -> leaf2-eth1 + ``` + + ### leaf1 + ``` + lo : 10.0.0.13/32 (IPv4) + 2001:db8:200::13/128 (IPv6) +-leaf1-eth0 : 2001:db8:50::0/127 → spine1-eth0 +-leaf1-eth1 : 2001:db8:60::0/127 → spine2-eth0 +-leaf1-eth2 : 2001:db8:1::1/127 → torm11-eth0 +-leaf1-eth3 : 2001:db8:2::1/127 → torm12-eth0 +-leaf1-eth4 : 2001:db8:3::1/127 → torm21-eth0 +-leaf1-eth5 : 2001:db8:4::1/127 → torm22-eth0 ++leaf1-eth0 : 2001:db8:50::0/127 -> spine1-eth0 ++leaf1-eth1 : 2001:db8:60::0/127 -> spine2-eth0 ++leaf1-eth2 : 2001:db8:1::1/127 -> torm11-eth0 ++leaf1-eth3 : 2001:db8:2::1/127 -> torm12-eth0 ++leaf1-eth4 : 2001:db8:3::1/127 -> torm21-eth0 ++leaf1-eth5 : 2001:db8:4::1/127 -> torm22-eth0 + ``` + + ### leaf2 + ``` + lo : 10.0.0.14/32 (IPv4) + 2001:db8:200::14/128 (IPv6) +-leaf2-eth0 : 2001:db8:51::0/127 → spine1-eth1 +-leaf2-eth1 : 2001:db8:61::0/127 → spine2-eth1 +-leaf2-eth2 : 2001:db8:5::1/127 → torm11-eth1 +-leaf2-eth3 : 2001:db8:6::1/127 → torm12-eth1 +-leaf2-eth4 : 2001:db8:7::1/127 → torm21-eth1 +-leaf2-eth5 : 2001:db8:8::1/127 → torm22-eth1 ++leaf2-eth0 : 2001:db8:51::0/127 -> spine1-eth1 ++leaf2-eth1 : 2001:db8:61::0/127 -> spine2-eth1 ++leaf2-eth2 : 2001:db8:5::1/127 -> torm11-eth1 ++leaf2-eth3 : 2001:db8:6::1/127 -> torm12-eth1 ++leaf2-eth4 : 2001:db8:7::1/127 -> torm21-eth1 ++leaf2-eth5 : 2001:db8:8::1/127 -> torm22-eth1 + ``` + + ### torm11 (IPv6 VTEP: 2001:db8:100::15/128) +-- +2.43.0 + diff --git a/src/sonic-frr/patch/0064-bgpd-Prevent-unnecessary-re-install-of-routes.patch b/src/sonic-frr/patch/0064-bgpd-Prevent-unnecessary-re-install-of-routes.patch deleted file mode 100644 index 29daf05ee66..00000000000 --- a/src/sonic-frr/patch/0064-bgpd-Prevent-unnecessary-re-install-of-routes.patch +++ /dev/null @@ -1,49 +0,0 @@ -From b7bd0b097586fbd492b0dc61346b89efb1a7b420 Mon Sep 17 00:00:00 2001 -From: Donald Sharp -Date: Sat, 18 Oct 2025 10:22:56 -0400 -Subject: [PATCH] bgpd: Prevent unnecessary re-install of routes - -There is this sequence of events that is happening: - -a) BGP registers for a nexthop resolution for address A -b)